diff --git a/.bazelignore b/.bazelignore
index 58c43f78e4268..64aacd46abc3f 100644
--- a/.bazelignore
+++ b/.bazelignore
@@ -3,3 +3,4 @@ build
 hw/ip/prim/util/vendor/google_verible_verilog_syntax_py
 sw/vendor/google_googletest
 util/lowrisc_misc-linters
+bazel-airgapped
diff --git a/.bazelrc b/.bazelrc
index 0fc1cebf1f156..8ef9f72fc5d91 100644
--- a/.bazelrc
+++ b/.bazelrc
@@ -2,23 +2,19 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+# Enable bzlmod with `MODULE.bazel` and disable the `WORKSPACE` system.
+common --enable_bzlmod
+common --enable_workspace=no
+
 # https://docs.opentitan.org/doc/rm/c_cpp_coding_style/#cxx-version specifies
-build --action_env=BAZEL_CXXOPTS="-std=gnu++14"
-build --cxxopt='-std=gnu++14'
+build --action_env=BAZEL_CXXOPTS="-std=gnu++17"
+build --cxxopt='-std=gnu++17'
 build --conlyopt='-std=gnu11'
 
 # Never strip debugging information so that we can produce annotated
 # disassemblies when compilation mode is fastbuild.
 build --strip='never'
 
-# Override default enablement of flags from @crt//common to control C compiler
-# warnings.
-build --features=-pedantic_warnings
-
-# Enable toolchain hardening features.
-# `guards` adds `unimp` guard instructions after unconditional jumps.
-build --features=guards
-
 # Use --config=disable_hardening to disable hardening to measure the
 # impact of the hardened sequences on code size.
 build:disable_hardening --features=-guards --copt=-DOT_DISABLE_HARDENING=1
@@ -32,7 +28,7 @@ build --workspace_status_command=util/get_workspace_status.sh
 
 # This enables convenient building for opentitan targets with the argument
 # --config=riscv32
-build:riscv32 --platforms=@crt//platforms/riscv32:opentitan
+build:riscv32 --platforms=@//toolchain:opentitan_platform
 
 # These options are required to build `cc_fuzz_test` targets. Enable with
 # --config=asan-libfuzzer
@@ -42,37 +38,27 @@ build:asan-libfuzzer --@rules_fuzzing//fuzzing:cc_engine=@rules_fuzzing//fuzzing
 build:asan-libfuzzer --@rules_fuzzing//fuzzing:cc_engine_instrumentation=libfuzzer
 build:asan-libfuzzer --@rules_fuzzing//fuzzing:cc_engine_sanitizer=asan
 
-# Shared configuration for clang's source-based coverage instrumentation.
-# Bazel seems to support this only partially, thus we have to perform some
-# additional processing. See
-# https://github.com/bazelbuild/bazel/commit/21b5eb627d78c09d47c4de957e9e6b56a9ae6fad
-# and `util/coverage/coverage_off_target.py`.
-build:ot_coverage --repo_env='CC=clang'
-build:ot_coverage --repo_env='BAZEL_USE_LLVM_NATIVE_COVERAGE=1'
-build:ot_coverage --java_runtime_version='remotejdk_11'
-# Docs state that bazel will fail to create coverage information if tests have
-# been cached previously. See
-# https://bazel.build/configure/coverage?hl=en#remote-execution
-coverage:ot_coverage --nocache_test_results
-
-# Configuration for measuring off-target coverage. Enable with
-# `--config=ot_coverage_off_target`.
-build:ot_coverage_off_target --config='ot_coverage'
-build:ot_coverage_off_target --collect_code_coverage
-coverage:ot_coverage_off_target --repo_env='GCOV=/usr/bin/llvm-profdata'
-coverage:ot_coverage_off_target --repo_env='BAZEL_LLVM_COV=/usr/bin/llvm-cov'
-
-# Configuration for measuring on-target coverage. Enable with
-# `--config=ot_coverage_on_target`.
-build:ot_coverage_on_target --config='ot_coverage'
-build:ot_coverage_on_target --platforms="@crt//platforms/riscv32:opentitan"
-build:ot_coverage_on_target --define='measure_coverage_on_target=true'
-# Instrument selectively to limit size overhead when measuring on-target coverage.
-# Note: We have to disable optimizations until the corresponding item in #16761 is
-# resolved.
-build:ot_coverage_on_target --per_file_copt='//sw/device/silicon_creator[/:].*,//sw/device/lib/base:.*@-fprofile-instr-generate,-fcoverage-mapping,-O0'
-# Needed to be able to build host binaries while collecting coverage.
-coverage:ot_coverage_on_target --platforms=""
+# Configuration for clang's source-based coverage instrumentation.
+coverage:ot_coverage --java_runtime_version='remotejdk_11'
+coverage:ot_coverage --instrumentation_filter="^//sw/device"
+coverage:ot_coverage --repo_env='BAZEL_USE_LLVM_NATIVE_COVERAGE=1'
+coverage:ot_coverage --experimental_use_llvm_covmap
+coverage:ot_coverage --experimental_generate_llvm_lcov
+coverage:ot_coverage --combined_report=lcov
+
+# Set coverage mode indicators
+coverage:ot_coverage --define='ot_coverage_enabled=true'
+coverage:ot_coverage --@rules_rust//:extra_rustc_flag='--cfg=feature="ot_coverage_enabled"'
+coverage:ot_coverage --@rules_rust//:extra_exec_rustc_flag='--cfg=feature="ot_coverage_enabled"'
+coverage:ot_coverage --//rules/coverage:enabled_flag
+coverage:ot_coverage --copt='-DOT_COVERAGE_ENABLED=1'
+
+# Host-side toolchain flags for unit tests
+# https://github.com/bazelbuild/bazel/blob/release-8.0.1/src/test/shell/bazel/bazel_coverage_cc_test_llvm.sh#L59-L64
+coverage:ot_coverage --repo_env='BAZEL_LLVM_COV=llvm-cov'
+coverage:ot_coverage --repo_env='BAZEL_LLVM_PROFDATA=llvm-profdata'
+coverage:ot_coverage --repo_env='CC=clang'
+coverage:ot_coverage --repo_env='GCOV=llvm-profdata'
 
 # Disable ccache if it happens to be installed
 build --define=CCACHE_DISABLE=true
@@ -134,7 +120,7 @@ build --@rules_rust//rust/toolchain/channel=nightly
 # Configure the rust 'clippy' linter.
 build --aspects=@rules_rust//rust:defs.bzl%rust_clippy_aspect
 build --output_groups=+clippy_checks
-build --@rules_rust//:clippy_flags="-Aclippy::bool_assert_comparison,-Aclippy::uninlined_format_args,-Wclippy::undocumented_unsafe_blocks,-Dwarnings"
+build --@rules_rust//:clippy_flags="-Aclippy::bool_assert_comparison,-Aclippy::uninlined_format_args,-Aclippy::needless_lifetimes,-Aclippy::precedence,-Wclippy::undocumented_unsafe_blocks,-Dwarnings"
 
 # Configure the module ID check.
 build --aspects=rules/quality.bzl%modid_check_aspect
@@ -148,3 +134,10 @@ build --flag_alias=ckms_cert_endorsement=//sw/device/silicon_creator/manuf/skus/
 
 # cquery output option.
 cquery --output=files
+
+common --legacy_external_runfiles
+
+# We have Verilator DPIs that use pseudoterminals, so we need to be able to use
+# these when running sandboxed tests.
+test --sandbox_explicit_pseudoterminal
+run --sandbox_explicit_pseudoterminal
diff --git a/.bazelversion b/.bazelversion
index 024b066c0bb7a..cd1d2e94f31d7 100644
--- a/.bazelversion
+++ b/.bazelversion
@@ -1 +1 @@
-6.2.1
+8.0.1
diff --git a/.gitattributes b/.gitattributes
index 786d9197caf99..c1462e9e4f150 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -26,3 +26,6 @@ sw/**/*.md  doc
 sw/**/*.svg doc
 sw/**/*.jpg doc
 sw/**/*.png doc
+
+# Generated lock files
+MODULE.bazel.lock linguist-generated=true
diff --git a/.github/CODEOWNERS b/.github/CODEOWNERS
index 19d4e226505a2..04820b47d1258 100644
--- a/.github/CODEOWNERS
+++ b/.github/CODEOWNERS
@@ -57,4 +57,4 @@ COPYING*            @mundaym
 
 # CI and testing
 /ci/                @rswarbrick
-azure-pipelines.yml @rswarbrick
+/.github            @rswarbrick
diff --git a/.github/actions/download-partial-build-bin/action.yml b/.github/actions/download-partial-build-bin/action.yml
new file mode 100644
index 0000000000000..42e1f9abdb53a
--- /dev/null
+++ b/.github/actions/download-partial-build-bin/action.yml
@@ -0,0 +1,31 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Download partial build-bin artifacts
+description:  Download partial build-bin and merge them
+
+inputs:
+  job-patterns:
+    description: Glob patterns of jobs to download artifact from
+    required: true
+
+runs:
+  using: composite
+  steps:
+    - name: Download partial build bins
+      uses: actions/download-artifact@v4
+      with:
+        pattern: partial-build-bin-${{ inputs.job-patterns }}
+        path: downloads
+    - name: Extract and merge bins
+      shell: bash
+      run: |
+        mkdir -p build-bin
+        find downloads -name "build-bin.tar" -exec \
+          tar -C build-bin --strip-components=1 -xvf {} \;
+        rm -rf downloads
+    - name: Show all downloads files
+      shell: bash
+      run: |
+        find build-bin
diff --git a/.github/actions/prepare-env/action.yml b/.github/actions/prepare-env/action.yml
new file mode 100644
index 0000000000000..418089b4f54ef
--- /dev/null
+++ b/.github/actions/prepare-env/action.yml
@@ -0,0 +1,158 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Prepare environment
+description: Install dependencies and prepare environment needed for OpenTitan
+
+inputs:
+  service_account_json:
+    description: Service account JSON for Google Cloud access
+    default: ''
+  verilator-version:
+    description: Verilator version to install
+    required: true
+    default: '4.210'
+  verilator-path:
+    description: Path at which to install Veriltator
+    required: true
+    default: /tools/verilator
+  verible-version:
+    description: Verible version to install
+    required: true
+    default: 'v0.0-3622-g07b310a3'
+  verible-path:
+    description: Path at which to install Verible
+    required: true
+    default: /tools/verible
+  configure-bazel:
+    description: Configure Bazel to use remote cache
+    required: true
+    default: true
+  working-directory:
+    description: Working directory
+    default: ${{ github.workspace }}
+
+runs:
+  using: composite
+  steps:
+    - name: Install system dependencies
+      run: |
+        sudo apt update
+        grep '^[^#]' apt-requirements.txt | xargs sudo apt install -y
+      shell: bash
+      working-directory: ${{ inputs.working-directory }}
+
+    - uses: astral-sh/setup-uv@v3
+      with:
+        version: '0.4.20'
+        enable-cache: true
+        cache-dependency-glob: |
+          ${{ inputs.working-directory }}/pyproject.toml
+          ${{ inputs.working-directory }}/python-requirements.txt
+
+    - name: Install Python
+      shell: bash
+      run: |
+        uv python install 3.9
+        # Create a virtual environment for UV
+        uv venv ~/.local/share/venv
+        echo "$HOME/.local/share/venv/bin" >> "$GITHUB_PATH"
+        echo "VIRTUAL_ENV=$HOME/.local/share/venv" >> "$GITHUB_ENV"
+      working-directory: ${{ inputs.working-directory }}
+
+    - name: Install Python dependencies
+      shell: bash
+      run: |
+        uv pip install -r python-requirements.txt --require-hashes
+      working-directory: ${{ inputs.working-directory }}
+
+    - name: Install Verilator
+      run: |
+        VERILATOR_TAR="verilator-v${{ inputs.verilator-version }}.tar.gz"
+        VERILATOR_URL="https://storage.googleapis.com/verilator-builds/${VERILATOR_TAR}"
+        sudo mkdir -p "${{ inputs.verilator-path }}"
+        curl -sSfL "$VERILATOR_URL" | sudo tar -C "${{ inputs.verilator-path }}" -xvzf -
+        echo "${{ inputs.verilator-path }}/v${{ inputs.verilator-version }}/bin" >> "$GITHUB_PATH"
+      shell: bash
+      working-directory: ${{ inputs.working-directory }}
+
+    - name: Install Verible
+      run: |
+        VERIBLE_TAR="verible-${{ inputs.verible-version }}-linux-static-x86_64.tar.gz"
+        VERIBLE_URL="https://github.com/chipsalliance/verible/releases/download/${{ inputs.verible-version }}/${VERIBLE_TAR}"
+        sudo mkdir -p "${{ inputs.verible-path }}"
+        curl -sSfL "$VERIBLE_URL" | sudo tar -C "${{ inputs.verible-path }}" -xvzf - --strip-components=1
+        # Fixup bin permission which is broken in tarball.
+        sudo chmod 755 "${{ inputs.verible-path }}/bin"
+        echo "${{ inputs.verible-path }}/bin" >> "$GITHUB_PATH"
+      shell: bash
+      working-directory: ${{ inputs.working-directory }}
+
+    # Log into Google Cloud using service account JSON.
+    # This can't be Workload Identity Federation because Bazel performance using WIF is terrible.
+    # This needs access to secrets and thus doesn't work for pull request.
+    - uses: google-github-actions/auth@v2
+      id: google_auth
+      if: github.event_name != 'pull_request' && inputs.service_account_json != ''
+      with:
+        credentials_json: '${{ inputs.service_account_json }}'
+
+    # The above action creates a credential file in workspace and it doesn't provide a way to configure
+    # it. This influences with a few scripts that assume clean workspace, and introduce security risk
+    # that it may be exposed when uploading to buckets.
+    - name: Move Google credentials out from workspace
+      if: github.event_name != 'pull_request' && inputs.service_account_json != ''
+      run: |
+        SOURCE=${{ steps.google_auth.outputs.credentials_file_path }}
+        TARGET=${{ runner.temp }}/$(basename "$SOURCE")
+        mv $SOURCE $TARGET
+        echo "CLOUDSDK_AUTH_CREDENTIAL_FILE_OVERRIDE=$TARGET" >> $GITHUB_ENV
+        echo "GOOGLE_APPLICATION_CREDENTIALS=$TARGET" >> $GITHUB_ENV
+        echo "GOOGLE_GHA_CREDS_PATH=$TARGET" >> $GITHUB_ENV
+      shell: bash
+
+    - uses: google-github-actions/setup-gcloud@v2
+      if: github.event_name != 'pull_request' && inputs.service_account_json != ''
+
+    - name: Configure ~/.bazelrc
+      if: inputs.configure-bazel == 'true'
+      run: |
+        cp ci/.bazelrc ~/.bazelrc
+        # Inject the OS version into a parameter used in the action key computation to
+        # avoid collisions between different operating systems in the caches.
+        # See #14695 for more information.
+        echo "build --remote_default_exec_properties=OSVersion=\"$(lsb_release -ds)\"" >> ~/.bazelrc
+
+        if ${{ github.event_name != 'pull_request' && inputs.service_account_json != '' }}; then
+          echo "Will upload to the cache." >&2
+          echo "build --google_default_credentials" >> ~/.bazelrc
+        else
+          echo "Download from cache only." >&2
+          echo "build --remote_upload_local_results=false" >> ~/.bazelrc
+        fi
+      shell: bash
+      working-directory: ${{ inputs.working-directory }}
+
+    - name: Install merge-junit
+      run: |
+        MERGE_JUNIT_PATH="/tools/merge-junit"
+        MERGE_JUNIT_TAR="merge-junit-v0.2.1-x86_64-unknown-linux-musl.tar.gz"
+        MERGE_JUNIT_URL="https://github.com/tobni/merge-junit/releases/download/v0.2.1/${MERGE_JUNIT_TAR}"
+        MERGE_JUNIT_SHA256="5c6a63063f3a155ea4da912d5cae2ec4a89022df31d7942f2aba463ee4790152"
+
+        curl -fLSs -o "/tmp/${MERGE_JUNIT_TAR}" "$MERGE_JUNIT_URL"
+        HASH=$(sha256sum "/tmp/$MERGE_JUNIT_TAR" | awk '{print $1}')
+        if [[ "$HASH" != "$MERGE_JUNIT_SHA256" ]]; then
+          echo "The hash of merge-junit does not match" >&2
+          echo "$HASH != $MERGE_JUNIT_SHA256" >&2
+          exit 1
+        fi
+
+        sudo mkdir -p $MERGE_JUNIT_PATH
+        sudo chmod 777 $MERGE_JUNIT_PATH
+        tar -C $MERGE_JUNIT_PATH -xvzf "/tmp/${MERGE_JUNIT_TAR}" --strip-components=1
+        echo $MERGE_JUNIT_PATH >> "$GITHUB_PATH"
+        rm "/tmp/${MERGE_JUNIT_TAR}"
+      shell: bash
+      working-directory: ${{ inputs.working-directory }}
diff --git a/.github/actions/publish-bazel-test-results/action.yml b/.github/actions/publish-bazel-test-results/action.yml
new file mode 100644
index 0000000000000..a1357399abb2c
--- /dev/null
+++ b/.github/actions/publish-bazel-test-results/action.yml
@@ -0,0 +1,58 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Publish Bazel test results
+description: Merge Bazel test results and publish the report
+
+inputs:
+  merged-results:
+    description: Path to place merged JUnit report
+    default: test_results.xml
+  artifact-name:
+    description: Name of uploaded artifact. Leave empty to skip upload.
+    default: ''
+  bucket-destination:
+    description: GCP bucket destination to upload report to.
+    default: ''
+
+runs:
+  using: composite
+  steps:
+    # Bazel produce one xml for each test. Merge them together.
+    - name: Merge JUnit reports
+      shell: bash
+      run: |
+        if find -L bazel-out -name "test.xml" | grep -F '' >> /tmp/test-xmls; then
+          cat /tmp/test-xmls | xargs merge-junit -o "${{ inputs.merged-results }}"
+        else
+          # merge-junit doesn't handle 0 inputs.
+          echo '<?xml version="1.0" encoding="UTF-8"?><testsuites/>' >> "${{ inputs.merged-results }}"
+        fi
+
+    - name: Add hostname to testsuites
+      shell: bash
+      run: |
+        xmlstarlet ed --inplace -i '/testsuites/testsuite' -t attr -n hostname -v "${{ runner.name }}" "${{ inputs.merged-results }}"
+
+    - name: Upload report as artifact
+      if: inputs.artifact-name != ''
+      uses: actions/upload-artifact@v4
+      with:
+        name: ${{ inputs.artifact-name }}
+        path: ${{ inputs.merged-results }}
+        # In case this is from a re-run
+        overwrite: true
+
+    - name: Upload report to Google Cloud
+      if: inputs.bucket-destination != ''
+      shell: bash
+      run: |
+        gcloud storage cp "${{ inputs.merged-results }}" "gs://${{ inputs.bucket-destination }}"
+
+    - name: Publish job summary
+      uses: mikepenz/action-junit-report@ec3a351c13e080dc4fa94c49ab7ad5bf778a9668 # v5
+      with:
+        report_paths: ${{ inputs.merged-results }}
+        annotate_only: true
+        detailed_summary: true
diff --git a/.github/workflows/bitstream.yml b/.github/workflows/bitstream.yml
new file mode 100644
index 0000000000000..01dea5947e039
--- /dev/null
+++ b/.github/workflows/bitstream.yml
@@ -0,0 +1,102 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: FPGA bitstream build
+on:
+  workflow_call:
+    inputs:
+      top_name:
+        type: string
+      design_suffix:
+        type: string
+      vivado_version:
+        default: "2021.1"
+        type: string
+
+jobs:
+  bitstream:
+    name: Build bitstream
+    runs-on: ubuntu-22.04-bitstream
+    timeout-minutes: 240
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required by get-bitstream-strategy.sh
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+
+      - name: Configure bitstream strategy
+        id: strategy
+        run: |
+          ci/scripts/get-bitstream-strategy.sh "chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}" \
+            ':!/third_party/rust/' \
+            ':!/sw/' \
+            ':!/*.hjson' \
+            ':!/*.tpl' \
+            ':!/site/' \
+            ':!/doc/' \
+            ':!/COMMITTERS' \
+            ':!/CLA' \
+            ':!/*.md' \
+            ':!/.github/' \
+            ':!/hw/**/dv/*' \
+            ':!/hw/dv/'
+
+      - name: Extract cached bitstream
+        if: steps.strategy.outputs.bitstreamStrategy == 'cached'
+        run: |
+          . util/build_consts.sh
+          bazel_package="//hw/bitstream"
+          design_name=chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}
+          cached_archive="${bazel_package}:${design_name}_cached_archive"
+          ./bazelisk.sh build "${cached_archive}"
+          bitstream_archive=$(./bazelisk.sh outquery "${cached_archive}")
+          cp -Lv ${bitstream_archive} build-bin.tar
+
+      - name: Build and splice bitstream with Vivado
+        if: steps.strategy.outputs.bitstreamStrategy != 'cached'
+        run: |
+          bazel_package=//hw/bitstream/vivado
+          bitstream_target=${bazel_package}:fpga_${{ inputs.design_suffix }}
+          archive_target=${bazel_package}:${{ inputs.top_name }}_${{ inputs.design_suffix }}_archive
+          trap 'get_logs' EXIT
+          get_logs() {
+            design_name=chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}
+            SUB_PATH="hw/top_${{ inputs.top_name }}/${design_name}"
+            mkdir -p "$OBJ_DIR/$SUB_PATH" "$BIN_DIR/$SUB_PATH"
+            # This can fail if the build result is from Bazel cache
+            cp -rLvt "$OBJ_DIR/$SUB_PATH/" \
+              $(./bazelisk.sh outquery-all ${bitstream_target}) || true
+            bitstream_archive=$(./bazelisk.sh outquery ${archive_target})
+            cp -Lv ${bitstream_archive} build-bin.tar
+          }
+
+          . util/build_consts.sh
+          module load "xilinx/vivado/${{inputs.vivado_version }}"
+          ./bazelisk.sh build ${archive_target}
+
+      - name: Display synthesis & implementation logs
+        if: steps.strategy.outputs.bitstreamStrategy != 'cached'
+        run: |
+          . util/build_consts.sh
+          echo "Synthesis log"
+          cat $OBJ_DIR/hw/top_${{ inputs.top_name }}/build.fpga_${{ inputs.design_suffix }}/synth-vivado/lowrisc_systems_chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}_0.1.runs/synth_1/runme.log || true
+
+          echo "Implementation log"
+          cat $OBJ_DIR/hw/top_${{ inputs.top_name }}/build.fpga_${{ inputs.design_suffix }}/synth-vivado/lowrisc_systems_chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}_0.1.runs/impl_1/runme.log || true
+
+      - name: Upload step outputs
+        uses: actions/upload-artifact@v4
+        with:
+          name: partial-build-bin-chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}
+          path: build-bin.tar
+
+      - name: Upload artifacts if build failed
+        if: failure()
+        uses: actions/upload-artifact@v4
+        with:
+          name: chip_${{ inputs.top_name }}_${{ inputs.design_suffix }}-build-out
+          path: build-out
diff --git a/.github/workflows/cherrypick.yml b/.github/workflows/cherrypick.yml
index 1e5e302a399b4..864a1c6d21bb7 100644
--- a/.github/workflows/cherrypick.yml
+++ b/.github/workflows/cherrypick.yml
@@ -16,10 +16,10 @@ jobs:
     # default token. We should in the future move to a PAT owned by lowrisc-bot and create pull request
     # on its behalf.
     permissions:
+      # Needed for authentication.
+      id-token: write
       # Needed for the action to create branch.
       contents: write
-      # Needed for the action to create a pull request.
-      pull-requests: write
 
     name: Cherry-pick Pull Request
     if: github.event.pull_request.merged == true && (github.event_name != 'labeled' || startsWith('CherryPick:', github.event.label.name))
@@ -29,18 +29,30 @@ jobs:
         with:
           ref: ${{ github.event.pull_request.head.sha }}
 
+      - name: Obtain token to create PR
+        id: pr_token
+        run: |
+          # Obtain OIDC token from GitHub
+          ID_TOKEN=$(curl -sSf -H "Authorization: Bearer $ACTIONS_ID_TOKEN_REQUEST_TOKEN" "$ACTIONS_ID_TOKEN_REQUEST_URL&audience=https://ca.lowrisc.org" | jq -r .value)
+          echo "::add-mask::$ID_TOKEN"
+          # Exchange for a token to create PR
+          PR_TOKEN=$(curl -sSf -X POST -H "Authorization: Bearer $ID_TOKEN" "https://ca.lowrisc.org/api/github/repos/${{ github.repository }}/token")
+          echo "::add-mask::$PR_TOKEN"
+          echo "pr_token=$PR_TOKEN" >> "$GITHUB_OUTPUT"
+
       - name: Create backport PRs
         id: backport
         uses: korthout/backport-action@e8161d6a0dbfa2651b7daa76cbb75bc7c925bbf3 # v2.4.1
         with:
           label_pattern: "^CherryPick:([^ ]+)$"
           pull_title: "Cherry-pick to ${target_branch}: ${pull_title}"
+          github_token: ${{ steps.pr_token.outputs.pr_token }}
           pull_description: |
             This is an automatic cherry-pick of #${pull_number} to branch `${target_branch}`.
 
       - name: Apply label for manually cherry picking
         if: ${{ steps.backport.outputs.was_successful == 'false' }}
         env:
-          GH_TOKEN: ${{ github.token }}
+          GH_TOKEN: ${{ steps.pr_token.outputs.pr_token }}
         run: |
           gh pr edit ${{ github.event.pull_request.number }} --add-label 'Manually CherryPick'
diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
new file mode 100644
index 0000000000000..a20963094b06b
--- /dev/null
+++ b/.github/workflows/ci.yml
@@ -0,0 +1,765 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: CI
+on:
+  pull_request:
+  push:
+    branches-ignore:
+      - "backport-*"
+    tags:
+      - "*"
+
+permissions:
+  contents: read
+  # Needed for workload identity federation
+  id-token: write
+
+concurrency:
+  group: ${{ github.workflow }}-${{ github.ref }}
+  cancel-in-progress: ${{ github.event_name == 'pull_request' }}
+
+env:
+  VIVADO_VERSION: "2021.1"
+  # Release tag from https://github.com/lowRISC/lowrisc-toolchains/releases
+  TOOLCHAIN_VERSION: 20220210-1
+
+jobs:
+  quick_lint:
+    name: Lint (quick)
+    runs-on: ubuntu-22.04
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required so we can lint commit messages.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Show environment
+        run: ./ci/scripts/show-env.sh
+      - name: Commit metadata
+        run: ./ci/scripts/lint-commits.sh "$GITHUB_BASE_REF"
+        if: ${{ github.event_name == 'pull_request' }}
+      - name: License headers
+        run: ./ci/scripts/check-licence-headers.sh "$GITHUB_BASE_REF"
+        if: ${{ github.event_name == 'pull_request' }}
+      - name: Executable bits
+        run: ./ci/scripts/exec-check.sh
+      - name: Non-ASCII characters
+        run: ./ci/scripts/check-ascii.sh
+      - name: Python (flake8)
+        run: ./ci/scripts/python-lint.sh "$GITHUB_BASE_REF"
+        if: ${{ github.event_name == 'pull_request' }}
+      - name: Python (mypy)
+        run: ./ci/scripts/mypy.sh
+      - name: Validate testplans with schema
+        run: ./ci/scripts/validate_testplans.sh
+      - name: C/C++ formatting
+        run: ./bazelisk.sh test //quality:clang_format_check
+      - name: Rust formatting
+        run: ./bazelisk.sh test //quality:rustfmt_check
+      - name: Shellcheck
+        run: ./bazelisk.sh test //quality:shellcheck_check
+      - name: Header guards
+        run: ./ci/scripts/include-guard.sh "$GITHUB_BASE_REF"
+        if: ${{ github.event_name == 'pull_request' }}
+      - name: Trailing whitespace
+        run: ./ci/scripts/whitespace.sh "$GITHUB_BASE_REF"
+        if: ${{ github.event_name == 'pull_request' }}
+      - name: Broken links
+        run: ./ci/scripts/check-links.sh
+      - name: Generated documentation
+        run: ./ci/scripts/check-cmdgen.sh
+
+  slow_lint:
+    name: Lint (slow)
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Bitstream cache requires all commits.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Countermeasures implemented (earlgrey)
+        run: ./ci/scripts/check-countermeasures.sh earlgrey
+        continue-on-error: true
+      - name: Countermeasures implemented (englishbreakfast)
+        run: ./ci/scripts/check-countermeasures.sh englishbreakfast
+        continue-on-error: true
+      - name: Bazel test suite tags
+        run: ./ci/scripts/check_bazel_test_suites.py
+        continue-on-error: true
+      # See #21973: disabled until Verilator tags are fixed.
+      # - name: Check Bazel tags
+      #   run: ./ci/scripts/check-bazel-tags.sh
+      #   continue-on-error: true
+      - name: Banned Bazel rules
+        run: ./ci/scripts/check-bazel-banned-rules.sh
+      - name: Bazel target names
+        run: ./ci/scripts/check_bazel_target_names.py
+        continue-on-error: true
+      - name: DV software images
+        run: ./ci/scripts/check_dv_sw_images.sh
+        continue-on-error: true
+      - name: Generated files
+        run: ./ci/scripts/check-generated.sh
+        env:
+          OT_DESTRUCTIVE: 1 # Required by the script to clean up.
+      - name: Buildifier
+        run: ./bazelisk.sh test //quality:buildifier_check
+      - name: Vendored files
+        run: ./ci/scripts/check-vendoring.sh
+      - name: Verible RTL
+        run: ./ci/scripts/verible-lint.sh rtl
+      - name: Verible DV
+        run: ./ci/scripts/verible-lint.sh dv
+      - name: Verible FPV
+        run: ./ci/scripts/verible-lint.sh fpv
+
+  build_docs:
+    name: Build documentation
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    env:
+      BUCKET: gold-hybrid-255313-prod
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Bitstream cache requires all commits.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Build documentation
+        run: util/site/build-docs.sh build
+      - name: Upload files
+        if: ${{ github.event_name != 'pull_request' && github.ref_name == 'earlgrey_1.0.0' }}
+        run: |
+          echo "::group::Upload all uncompressed files"
+          gcloud storage cp -R --gzip-in-flight=js,css,html "build-site/*" gs://$BUCKET/earlgrey_1.0.0
+          echo "::endgroup::"
+
+          # This script compresses the searchindex files, replacing the originals in-place.
+          # (This is how 'content-encoding'-tagged files should be uploaded to gcloud buckets)
+          util/site/post-build.sh compress_br
+
+          search_indexes=$(find build-site/ -type f -name '*searchindex.json')
+          for f in $search_indexes; do
+              echo "Uploading compressed file ${f}"
+              # Get directory of file, relative to the build directory.
+              # - var=${var#*//} # removes stuff from the begining up to //
+              dir=$(dirname "${f#*build-site/}")
+              # When serving from gcloud buckets, file should be uploaded with an identical name as the
+              # original, but compressed and with the matching 'content-encoding' and 'content-type' tags applied.
+              gcloud storage cp \
+                     --content-encoding=br \
+                     --content-type=application/json \
+                     -R \
+                     "$f" "gs://$BUCKET/earlgrey_1.0.0/${dir}/"
+          done
+
+  airgapped_build:
+    name: Airgapped build
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Bitstream cache requires all commits.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+          configure-bazel: false
+      - name: Free disk space
+        uses: jlumbroso/free-disk-space@54081f138730dfa15788a46383842cd2f914a1be
+      - name: Check disk space
+        run: |
+          df -h
+      - name: Prepare airgapped environment
+        run: ./util/prep-bazel-airgapped-build.sh
+      - name: Check disk space
+        run: |
+          df -h
+      - name: Build in the airgapped environment
+        run: ./ci/scripts/test-airgapped-build.sh
+
+  verible_lint:
+    name: Verible lint
+    runs-on: ubuntu-24.04
+    needs: quick_lint
+    if: ${{ github.event_name == 'pull_request' }}
+    env:
+      verible_config: hw/lint/tools/veriblelint/lowrisc-styleguide.rules.verible_lint
+      verible_version: v0.0-3430-g060bde0f
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare Verible config
+        run: |
+          echo "Concatenating Verible waivers"
+          find . -type f -name '*.vbl' -exec cat {} \; >> verible_waiver
+
+          echo "::group::Verible config"
+          cat "$verible_config"
+          echo "::endgroup::"
+
+          echo "::group::Verible waiver"
+          cat "verible_waiver"
+          echo "::endgroup::"
+      - name: Run Verible linter action
+        uses: chipsalliance/verible-linter-action@v2.0
+        with:
+          github_token: ${{ secrets.GITHUB_TOKEN }}
+          verible_version: ${{ env.verible_version }}
+          reviewdog_reporter: 'github-pr-check'
+          suggest_fixes: 'false'
+          config_file: ${{ env.verible_config }}
+          extra_args: "--waiver_files=verible_waiver"
+
+  otbn_standalone_tests:
+    name: Run OTBN smoke Test
+    needs: quick_lint
+    runs-on: ubuntu-22.04
+    timeout-minutes: 10
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Bitstream cache requires all commits.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Install toolchain
+        run: |
+          TOOLCHAIN_PATH=/tools/riscv
+          sudo util/get-toolchain.py \
+            --install-dir="$TOOLCHAIN_PATH" \
+            --release-version="$TOOLCHAIN_VERSION" \
+            --update
+          echo "$TOOLCHAIN_PATH/bin" >> $GITHUB_PATH
+      - name: Display environment
+        run: |
+          python3 --version
+          fusesoc --version
+          verilator --version
+      - name: OTBN ISS test
+        run: make -C hw/ip/otbn/dv/otbnsim test
+      - name: OBTN smoke test
+        run: ./hw/ip/otbn/dv/smoke/run_smoke.sh
+      - name: Assemble & link code snippets
+        run: make -C hw/ip/otbn/util asm-check
+
+  otbn_crypto_tests:
+    name: Run OTBN crypto tests
+    needs: quick_lint
+    runs-on: ubuntu-22.04
+    timeout-minutes: 60
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Bitstream cache requires all commits.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Execute tests
+        run: ./bazelisk.sh test --test_tag_filters=-nightly //sw/otbn/crypto/...
+
+  verilator_englishbreakfast:
+    name: Verilated English Breakfast
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Build simulator with Verilator
+        run: ./ci/scripts/build-chip-verilator.sh englishbreakfast
+      - name: Upload binary
+        uses: actions/upload-artifact@v4
+        with:
+          name: verilated_englishbreakfast
+          path: build-bin/hw/top_englishbreakfast/Vchip_englishbreakfast_verilator
+          overwrite: true
+      - name: Test
+        run: ./ci/scripts/run-english-breakfast-verilator-tests.sh
+
+  verilator_earlgrey:
+    name: Verilated Earl Grey
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    timeout-minutes: 240
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Run fast Verilator tests
+        run: ./ci/scripts/run-verilator-tests.sh
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: verilator_earlgrey-test-results
+
+  # Build CW305 variant of the English Breakfast toplevel design using Vivado
+  chip_englishbreakfast_cw305:
+    name: CW305's Bitstream
+    runs-on: ubuntu-22.04-bitstream
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Build bitstream
+        run: |
+          # Build CW305 test rom required by `build-bitstream-vivado.sh`
+          rom_path="sw/device/lib/testing/test_rom"
+          ./bazelisk.sh build "//${rom_path}:test_rom_fpga_cw305" \
+            --features=-rv32_bitmanip \
+            --copt=-DOT_IS_ENGLISH_BREAKFAST_REDUCED_SUPPORT_FOR_INTERNAL_USE_ONLY_
+          vmem="$(./bazelisk.sh cquery --output=files "//${rom_path}:test_rom_fpga_cw305" \
+            --features=-rv32_bitmanip \
+            --copt=-DOT_IS_ENGLISH_BREAKFAST_REDUCED_SUPPORT_FOR_INTERNAL_USE_ONLY_
+          )"
+          mkdir -p "build-bin/${rom_path}"
+          cp "$vmem" "build-bin/${rom_path}"
+
+          module load "xilinx/vivado/${VIVADO_VERSION}"
+          ci/scripts/build-bitstream-vivado.sh top_englishbreakfast cw305
+      - name: Upload bitstream
+        uses: actions/upload-artifact@v4
+        with:
+          name: chip_englishbreakfast_cw305
+          path: build-bin/hw/top_englishbreakfast/lowrisc_systems_chip_englishbreakfast_cw305_0.1.bit
+          overwrite: true
+
+  chip_earlgrey_cw310:
+    name: Earl Grey for CW310
+    needs: quick_lint
+    uses: ./.github/workflows/bitstream.yml
+    secrets: inherit
+    with:
+      top_name: earlgrey
+      design_suffix: cw310
+
+  chip_earlgrey_cw310_hyperdebug:
+    name: Earl Grey for CW310 Hyperdebug
+    needs: quick_lint
+    uses: ./.github/workflows/bitstream.yml
+    secrets: inherit
+    with:
+      top_name: earlgrey
+      design_suffix: cw310_hyperdebug
+
+  chip_earlgrey_cw340:
+    name: Earl Grey for CW340
+    needs: quick_lint
+    uses: ./.github/workflows/bitstream.yml
+    secrets: inherit
+    with:
+      top_name: earlgrey
+      design_suffix: cw340
+
+  cache_bitstreams:
+    name: Cache bitstreams to GCP
+    runs-on: ubuntu-22.04
+    if: ${{ github.event_name != 'pull_request' }}
+    needs:
+      - chip_earlgrey_cw310
+      - chip_earlgrey_cw310_hyperdebug
+      - chip_earlgrey_cw340
+    steps:
+      - uses: actions/checkout@v4
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Download partial build-bin
+        uses: ./.github/actions/download-partial-build-bin
+        with:
+          job-patterns: chip_earlgrey_{cw310,cw310_hyperdebug,cw340}
+      - name: Create bitstream cache archive
+        run: |
+          shopt -s globstar # Allow use of **
+          ./bazelisk.sh build //util/py/scripts:bitstream_cache_create
+          ./bazelisk.sh run //util/py/scripts:bitstream_cache_create -- \
+            --schema $PWD/rules/scripts/bitstreams_manifest.schema.json \
+            --stamp-file $PWD/bazel-out/volatile-status.txt \
+            --out $PWD/build-bin/bitstream-cache \
+            $PWD/build-bin/**/manifest.json
+      - name: Upload bitstreams to GCP bucket
+        run: |
+          BUCKET_URI=gs://opentitan-bitstreams/${{ github.ref_name }}
+          printf "$(date -u +%Y-%m-%dT%H:%M:%S)\n${{ github.sha }}" > latest.txt
+          gcloud storage cp build-bin/bitstream-cache/bitstream-cache.tar.gz $BUCKET_URI/bitstream-${{ github.sha }}.tar.gz
+          gcloud storage cp latest.txt $BUCKET_URI/latest.txt
+          gcloud storage cp $BUCKET_URI/bitstream-${{ github.sha }}.tar.gz $BUCKET_URI/bitstream-latest.tar.gz
+
+  # CW310 FPGA jobs.
+  execute_test_rom_fpga_tests_cw310:
+    name: CW310 Test ROM Tests
+    needs: chip_earlgrey_cw310
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_test_rom_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310
+      board: cw310
+      interface: cw310
+      tag_filters: cw310_test_rom
+
+  execute_rom_fpga_tests_cw310:
+    name: CW310 ROM Tests
+    needs: chip_earlgrey_cw310
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_rom_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310
+      board: cw310
+      interface: cw310
+      tag_filters: "cw310_rom_with_fake_keys,cw310_rom_with_real_keys,-manuf"
+      timeout: 90
+
+  execute_rom_ext_fpga_tests_cw310:
+    name: CW310 ROM_EXT Tests
+    needs: chip_earlgrey_cw310
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_rom_ext_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310
+      board: cw310
+      interface: cw310
+      tag_filters: cw310_rom_ext
+
+  execute_sival_fpga_tests_cw310:
+    name: CW310 SiVal Tests
+    needs: chip_earlgrey_cw310_hyperdebug
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_sival_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310_hyperdebug
+      board: cw310
+      interface: hyper310
+      tag_filters: "cw310_sival,-manuf"
+
+  execute_sival_rom_ext_fpga_tests_cw310:
+    name: CW310 SiVal ROM_EXT Tests
+    needs: chip_earlgrey_cw310_hyperdebug
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_sival_rom_ext_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310_hyperdebug
+      board: cw310
+      interface: hyper310
+      tag_filters: cw310_sival_rom_ext
+
+  execute_manuf_fpga_tests_cw310:
+    name: CW310 Manufacturing Tests
+    needs: chip_earlgrey_cw310_hyperdebug
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_manuf_fpga_tests_cw310
+      bitstream: chip_earlgrey_cw310_hyperdebug
+      board: cw310
+      interface: hyper310
+      tag_filters: "manuf,-cw340"
+
+  execute_fpga_rom_ext_tests_hyper310:
+    name: Hyper310 ROM_EXT Tests
+    needs: chip_earlgrey_cw310_hyperdebug
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_fpga_rom_ext_tests_hyper310
+      bitstream: chip_earlgrey_cw310_hyperdebug
+      board: cw310
+      interface: hyper310
+      tag_filters: hyper310_rom_ext
+
+  # CW340 FPGA jobs
+  execute_test_rom_fpga_tests_cw340:
+    name: CW340 Test ROM Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_test_rom_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: cw340_test_rom
+
+  execute_rom_fpga_tests_cw340:
+    name: CW340 ROM Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_rom_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: "cw340_rom_with_fake_keys,cw340_rom_with_real_keys,-manuf"
+
+  execute_rom_ext_fpga_tests_cw340:
+    name: CW340 ROM_EXT Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_rom_ext_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: cw340_rom_ext
+
+  execute_sival_fpga_tests_cw340:
+    name: CW340 SiVal Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_sival_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: "cw340_sival,-manuf"
+
+  execute_sival_rom_ext_fpga_tests_cw340:
+    name: CW340 SiVal ROM_EXT Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_sival_rom_ext_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: cw340_sival_rom_ext
+
+  execute_manuf_fpga_tests_cw340:
+    name: CW340 Manufacturing Tests
+    needs: chip_earlgrey_cw340
+    uses: ./.github/workflows/fpga.yml
+    secrets: inherit
+    with:
+      job_name: execute_manuf_fpga_tests_cw340
+      bitstream: chip_earlgrey_cw340
+      board: cw340
+      interface: cw340
+      tag_filters: "manuf,-hyper310"
+
+  verify_fpga_jobs:
+    name: Verify FPGA jobs
+    runs-on: ubuntu-22.04
+    needs:
+      - execute_test_rom_fpga_tests_cw310
+      - execute_rom_fpga_tests_cw310
+      - execute_rom_ext_fpga_tests_cw310
+      - execute_sival_fpga_tests_cw310
+      - execute_sival_rom_ext_fpga_tests_cw310
+      - execute_manuf_fpga_tests_cw310
+      - execute_fpga_rom_ext_tests_hyper310
+      - execute_test_rom_fpga_tests_cw340
+      - execute_rom_fpga_tests_cw340
+      - execute_rom_ext_fpga_tests_cw340
+      - execute_sival_fpga_tests_cw340
+      - execute_sival_rom_ext_fpga_tests_cw340
+      - execute_manuf_fpga_tests_cw340
+    if: success() || failure()
+    steps:
+      - uses: actions/checkout@v4
+      - name: Download target pattern files
+        uses: actions/download-artifact@v4
+        with:
+          pattern: execute_*-targets
+          path: verify_fpga_jobs
+      - name: List all target pattern files
+        run: |
+          find verify_fpga_jobs
+      - name: Checking for duplicate test runs
+        run: |
+          # Find and display all duplicates:
+          # - for each target file and each line, print '<job_name> <target>'
+          # - then sort by the target name
+          # - then keep all duplicated lines
+          pattern_files=$(find verify_fpga_jobs -name target_pattern_file.txt)
+          awk '{ print(gensub(/.*\/(.+)\/target_pattern_file.txt/, "\\1", "g", FILENAME) " " $0) }' $pattern_files | sort -k2 | uniq -D -f1 > duplicates.txt
+          if [ -s duplicates.txt ]; then
+            echo "The following tests ran in two or more jobs:"
+            cat duplicates.txt
+            false
+          fi
+      - name: Checking for missing test runs
+        if: success() || failure()
+        run: |
+          # Find and display tests that did not run:
+          ./ci/scripts/run-bazel-test-query.sh all_fpga.txt fpga,-manual,-broken,-skip_in_ci //... @manufacturer_test_hooks//...
+          sort -o all_fpga.txt all_fpga.txt
+          pattern_files=$(find verify_fpga_jobs -name target_pattern_file.txt)
+          sort $pattern_files > all_run.txt
+          comm -23 all_fpga.txt all_run.txt > missing.txt
+          if [ -s missing.txt ]; then
+            echo "The following tests did not run in any job:"
+            cat missing.txt
+            false
+          fi
+
+  build_docker_containers:
+    name: Build Docker Containers
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+      - name: Build Developer Utility Container
+        uses: docker/build-push-action@v6
+        env:
+          DOCKER_BUILD_SUMMARY: false
+          DOCKER_BUILD_RECORD_UPLOAD: false
+        with:
+          context: .
+          file: util/container/Dockerfile
+        continue-on-error: true
+      - name: Build Documentation Redirector Container
+        uses: docker/build-push-action@v6
+        env:
+          DOCKER_BUILD_SUMMARY: false
+          DOCKER_BUILD_RECORD_UPLOAD: false
+        with:
+          context: site/redirector/landing
+
+  sw_build_test:
+    name: Build and test software
+    runs-on: ubuntu-22.04-vivado
+    timeout-minutes: 120
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required for bitstream cache to work.
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Check Bazel build graph
+        run: |
+          # Test the graph with both an empty and filled bitstream cache.
+          ./ci/scripts/test-empty-bitstream-cache.sh
+          ./bazelisk.sh build --nobuild //...
+      - name: Select software targets
+        run: |
+          target_pattern_file="$(mktemp)"
+          echo "target_pattern_file=${target_pattern_file}" >> "$GITHUB_ENV"
+
+          # Start with building the whole graph.
+          echo '//...' > "$target_pattern_file"
+          # Exclude some targets:
+          #
+          # 1. `//hw/...` is out of scope.
+          # 2. `//quality/...` is tested by the lint jobs.
+          # 3. `//sw/otbn/crypto/...` is tested by the OTBN job.
+          # 4. `//third_party/...` which is not our code.
+          printf "%s\n"             \
+            "-//hw/..."             \
+            "-//quality/..."        \
+            "-//sw/otbn/crypto/..." \
+            "-//third_party/..."    \
+            >> "$target_pattern_file"
+          # Exclude anything that requires a bitstream splice.
+          ./bazelisk.sh cquery                               \
+            --noinclude_aspects                              \
+            --output=starlark                                \
+            --starlark:expr='"-{}".format(target.label)'     \
+            --define DISABLE_VERILATOR_BUILD=true            \
+            -- "rdeps(//..., kind(bitstream_splice, //...))" \
+            >> "$target_pattern_file"
+      - name: Build software targets
+        run: |
+          # Build everything we selected, excluding some tags.
+          ./bazelisk.sh build                                \
+            --build_tests_only=false                         \
+            --define DISABLE_VERILATOR_BUILD=true            \
+            --test_tag_filters=-broken,-cw310,-verilator,-dv \
+            --target_pattern_file="$target_pattern_file"
+      - name: Run software unit tests
+        run: |
+          ./bazelisk.sh test                                                \
+            --build_tests_only=false                                        \
+            --test_output=errors                                            \
+            --define DISABLE_VERILATOR_BUILD=true                           \
+            --test_tag_filters=-broken,-cw310,-verilator,-dv,-silicon,-qemu \
+            --target_pattern_file="$target_pattern_file"
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: sw_build_test-test-results
+      - name: Check for unrunnable tests
+        run: ./ci/scripts/check-unrunnable-tests.sh
+        continue-on-error: true
+
+  qemu_smoketest:
+    name: QEMU smoketest
+    runs-on: ubuntu-22.04-vivado
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Execute QEMU smoketest
+        run: |
+          ./bazelisk.sh test //sw/device/tests:rom_exit_immediately_sim_qemu_base
+
+  qemu_local_dev_test:
+    name: Test QEMU local development override
+    runs-on: ubuntu-22.04
+    needs: quick_lint
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          path: opentitan
+      - name: Prepare environment
+        uses: ./opentitan/.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+          working-directory: opentitan
+      - uses: actions/checkout@v4
+        with:
+          repository: lowRISC/qemu
+          ref: v9.2.0-2025-02-11
+          path: qemu
+      - name: Check that overrides works
+        run: |
+          # The following packages are required to build QEMU.
+          sudo apt-get install -y ninja-build libpixman-1-dev libglib2.0-dev
+          # We need to symlink the BUILD file and create an empty REPO file.
+          ln -s $PWD/opentitan/third_party/qemu/BUILD.qemu_opentitan.bazel qemu/BUILD.bazel
+          touch qemu/REPO.bazel
+          # Just make sure all expected targets are there after building.
+          opentitan/bazelisk.sh build --override_repository="+qemu+qemu_opentitan_src=$PWD/qemu/" //third_party/qemu/...
+      - name: Upload error logs
+        if: failure()
+        uses: actions/upload-artifact@v4
+        with:
+          name: qemu-override-build-logs
+          path: qemu/build/*.log
diff --git a/.github/workflows/fpga.yml b/.github/workflows/fpga.yml
new file mode 100644
index 0000000000000..e79120748cd0d
--- /dev/null
+++ b/.github/workflows/fpga.yml
@@ -0,0 +1,93 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: FPGA test
+on:
+  workflow_call:
+    inputs:
+      job_name:
+        required: true
+        type: string
+        description: Name of the job
+      bitstream:
+        required: true
+        type: string
+        description: Bitstream to use
+      board:
+        required: true
+        type: string
+        description: FPGA board to use
+      interface:
+        required: true
+        type: string
+        description: opentitantool interface to use
+      tag_filters:
+        required: true
+        type: string
+        description: Bazel tag filters for the tests
+      timeout:
+        default: 60
+        type: number
+        description: Timeout for the job in minutes
+      vivado_version:
+        default: "2021.1"
+        type: string
+
+jobs:
+  fpga:
+    name: FPGA test
+    runs-on: [ubuntu-22.04-fpga, "${{ inputs.board }}"]
+    timeout-minutes: ${{ inputs.timeout }}
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+      - name: Download bitstream
+        uses: ./.github/actions/download-partial-build-bin
+        with:
+          job-patterns: ${{ inputs.bitstream }}
+
+      - name: Update hyperdebug firmware
+        if: inputs.interface == 'hyper310'
+        run: |
+          ./bazelisk.sh run \
+              //sw/host/opentitantool:opentitantool -- \
+              --interface=hyperdebug_dfu transport update-firmware
+
+      - name: Execute tests
+        run: |
+          . util/build_consts.sh
+          module load "xilinx/vivado/${{ inputs.vivado_version }}"
+
+          # Execute a query to find all targets that match the test tags and store them in a file.
+          ci/scripts/run-bazel-test-query.sh \
+            target_pattern_file.txt \
+            "${{ inputs.tag_filters }}",-manual,-broken,-skip_in_ci \
+            //... @manufacturer_test_hooks//...
+
+          # Run FPGA tests
+          if [[ -s target_pattern_file.txt ]]; then
+            ci/scripts/run-fpga-tests.sh "${{ inputs.interface }}" target_pattern_file.txt || {
+              res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}";
+            }
+          else
+            echo "No tests to run after filtering"
+          fi
+
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: ${{ inputs.job_name }}-test-results
+
+      - name: Upload target pattern file
+        if: ${{ !cancelled() }}
+        uses: actions/upload-artifact@v4
+        with:
+          name: ${{ inputs.job_name }}-targets
+          path: target_pattern_file.txt
diff --git a/.github/workflows/nightly.yml b/.github/workflows/nightly.yml
new file mode 100644
index 0000000000000..83001cd0ffce8
--- /dev/null
+++ b/.github/workflows/nightly.yml
@@ -0,0 +1,188 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Nightly
+on:
+  schedule:
+    - cron: "00 04 * * *"
+
+  workflow_dispatch:
+    inputs:
+      branch:
+        description: 'Branch to run the nightly'
+        required: true
+        type: string
+
+permissions:
+  id-token: write
+  contents: read
+
+jobs:
+  fpga_cw310_sival_nightly:
+    name: FPGA CW310 SiVal tests
+    runs-on: [ubuntu-22.04-fpga, cw310]
+
+    env:
+      GS_PATH: opentitan-test-results
+
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required for the bitstream cache to work.
+          ref: ${{ inputs.branch || 'earlgrey_1.0.0' }} # Schedule only work on the default branch, but we want to run on a different branch.
+
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+
+      - name: Update hyperdebug
+        run: |
+          ./bazelisk.sh run //sw/host/opentitantool -- --interface=hyperdebug_dfu transport update-firmware
+
+      - name: Run tests after ROM boot stage
+        if: success() || failure()
+        run: |
+          module load xilinx/vivado
+          bazel_tests="$(mktemp)"
+          ./bazelisk.sh query 'attr("tags", "[\[ ]cw310_sival[,\]]", tests(//sw/device/...))' \
+                                                    | grep -v examples \
+                                                    | grep -v penetrationtests \
+                                                    > "$bazel_tests"
+          ./bazelisk.sh test --build_tests_only --test_tag_filters=-slow_test --target_pattern_file="$bazel_tests"
+
+      - name: Run tests after ROM_EXT boot stage
+        if: success() || failure()
+        run: |
+          module load xilinx/vivado
+          bazel_tests="$(mktemp)"
+          ./bazelisk.sh query 'attr("tags", "[\[ ]cw310_sival_rom_ext[,\]]", tests(//sw/device/...))' \
+                                                    | grep -v examples \
+                                                    | grep -v penetrationtests \
+                                                    > "$bazel_tests"
+          ./bazelisk.sh test --build_tests_only --test_tag_filters=-slow_test --target_pattern_file="$bazel_tests"
+
+      - name: Compute bucket destination
+        id: bucket_destination
+        if: ${{ !cancelled() }}
+        run: |
+          BUCKET_PATH=$GS_PATH/job/${{ github.job }}/branch/${{ inputs.branch || 'earlgrey_1.0.0'}}/$(date +%Y-%m-%d-%H%M%S)_test_results.xml
+          echo "BUCKET_PATH=$BUCKET_PATH" >> $GITHUB_OUTPUT
+
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: fpga_cw310_sival_nightly-test-results
+          bucket-destination: ${{ steps.bucket_destination.outputs.BUCKET_PATH }}
+
+  fpga_cw340_sival_nightly:
+    name: FPGA CW340 SiVal tests
+    runs-on: [ubuntu-22.04-fpga, cw340]
+
+    env:
+      GS_PATH: opentitan-test-results
+      BAZEL_TEST_RESULTS: test_results.xml
+
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required for the bitstream cache to work.
+          ref: ${{ inputs.branch || 'earlgrey_1.0.0' }} # Schedule only work on the default branch, but we want to run on a different branch.
+
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+
+      - name: Update hyperdebug
+        run: |
+          ./bazelisk.sh run //sw/host/opentitantool -- --interface=hyperdebug_dfu transport update-firmware
+
+      - name: Run tests after ROM boot stage
+        if: success() || failure()
+        run: |
+          module load xilinx/vivado
+          bazel_tests="$(mktemp)"
+          ./bazelisk.sh query 'attr("tags", "[\[ ]cw340_sival[,\]]", tests(//sw/device/...))' \
+                                                    | grep -v examples \
+                                                    | grep -v penetrationtests \
+                                                    > "$bazel_tests"
+          ./bazelisk.sh test --build_tests_only --test_tag_filters=-slow_test --target_pattern_file="$bazel_tests"
+
+      - name: Run tests after ROM_EXT boot stage
+        if: success() || failure()
+        run: |
+          module load xilinx/vivado
+          bazel_tests="$(mktemp)"
+          ./bazelisk.sh query 'attr("tags", "[\[ ]cw340_sival_rom_ext[,\]]", tests(//sw/device/...))' \
+                                                    | grep -v examples \
+                                                    | grep -v penetrationtests \
+                                                    > "$bazel_tests"
+          ./bazelisk.sh test --build_tests_only --test_tag_filters=-slow_test --target_pattern_file="$bazel_tests"
+
+      - name: Compute bucket destination
+        id: bucket_destination
+        if: ${{ !cancelled() }}
+        run: |
+          BUCKET_PATH=$GS_PATH/job/${{ github.job }}/branch/${{ inputs.branch || 'earlgrey_1.0.0'}}/$(date +%Y-%m-%d-%H%M%S)_test_results.xml
+          echo "BUCKET_PATH=$BUCKET_PATH" >> $GITHUB_OUTPUT
+
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: fpga_cw340_sival_nightly-test-results
+          bucket-destination: ${{ steps.bucket_destination.outputs.BUCKET_PATH }}
+
+  fpga_cw340_slow_sival_nightly:
+    name: FPGA CW340 slow SiVal tests
+    runs-on: [ubuntu-22.04-fpga, cw340]
+
+    env:
+      GS_PATH: opentitan-test-results
+      BAZEL_TEST_RESULTS: test_results.xml
+
+    steps:
+      - uses: actions/checkout@v4
+        with:
+          fetch-depth: 0 # Required for the bitstream cache to work.
+          ref: ${{ inputs.branch || 'earlgrey_1.0.0' }} # Schedule only work on the default branch, but we want to run on a different branch.
+
+      - name: Prepare environment
+        uses: ./.github/actions/prepare-env
+        with:
+          service_account_json: '${{ secrets.BAZEL_CACHE_CREDS }}'
+
+      - name: Update hyperdebug
+        run: |
+          ./bazelisk.sh run //sw/host/opentitantool -- --interface=hyperdebug_dfu transport update-firmware
+
+      - name: Run tests
+        if: success() || failure()
+        run: |
+          module load xilinx/vivado
+          bazel_tests="$(mktemp)"
+
+          ./bazelisk.sh query 'attr("tags", "[\[ ]cw340_sival_rom_ext[,\]]", tests(//sw/device/...))' \
+                      'intersect attr("tags", "slow_test", tests(//sw/device/...))' \
+                                                                  | grep -v examples \
+                                                                  | grep -v penetrationtests \
+                                                                  > "$bazel_tests"
+
+          ./bazelisk.sh test --build_tests_only --target_pattern_file="$bazel_tests"
+
+      - name: Compute bucket destination
+        id: bucket_destination
+        if: ${{ !cancelled() }}
+        run: |
+          BUCKET_PATH=$GS_PATH/job/${{ github.job }}/branch/${{ inputs.branch || 'earlgrey_1.0.0'}}/$(date +%Y-%m-%d-%H%M%S)_test_results.xml
+          echo "BUCKET_PATH=$BUCKET_PATH" >> $GITHUB_OUTPUT
+
+      - name: Publish Bazel test results
+        uses: ./.github/actions/publish-bazel-test-results
+        if: ${{ !cancelled() }}
+        with:
+          artifact-name: fpga_cw340_slow_sival_nightly-test-results
+          bucket-destination: ${{ steps.bucket_destination.outputs.BUCKET_PATH }}
diff --git a/.github/workflows/rerun.yml b/.github/workflows/rerun.yml
new file mode 100644
index 0000000000000..0570a8757661f
--- /dev/null
+++ b/.github/workflows/rerun.yml
@@ -0,0 +1,62 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: Rerun Failed Workflow
+on:
+  pull_request_target:
+    types: [labeled]
+
+permissions:
+  actions: write
+  contents: write # For repository dispatch
+  pull-requests: write # For label removal
+
+jobs:
+  rerun:
+    name: Rerun Failed CI
+    if: github.event.label.name == 'CI:Rerun'
+    runs-on: ubuntu-latest
+    steps:
+      - name: Rerun failed GitHub actions
+        uses: actions/github-script@v7
+        with:
+          script: |
+            for await (const response of github.paginate.iterator(
+              github.rest.actions.listWorkflowRunsForRepo,
+              {
+                owner: context.repo.owner,
+                repo: context.repo.repo,
+                // Only return completed workflows, not queued and in_progress.
+                status: 'completed',
+                head_sha: context.payload.pull_request.head.sha,
+              }
+            )) {
+              for (let run of response.data) {
+                if (run.conclusion !== 'failure') continue;
+
+                await github.rest.actions.reRunWorkflowFailedJobs({
+                  owner: context.repo.owner,
+                  repo: context.repo.repo,
+                  run_id: run.id,
+                });
+              }
+            }
+
+            // Trigger a cross-repo-ci-rerun event for private CI
+            github.rest.repos.createDispatchEvent({
+              owner: context.repo.owner,
+              repo: context.repo.repo,
+              event_type: 'cross-repo-ci-rerun',
+              client_payload: {
+                sha: context.payload.pull_request.head.sha,
+              }
+            });
+
+            // Remove label once failed job retriggered.
+            await github.rest.issues.removeLabel({
+              owner: context.repo.owner,
+              repo: context.repo.repo,
+              issue_number: context.issue.number,
+              name: 'CI:Rerun',
+            });
diff --git a/.gitignore b/.gitignore
index 110b2e68699ad..19e35c2f7a72c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,10 +3,12 @@
 *.swp
 *.swo
 tags
-__pycache__
 /.vscode
 opentitan-docs
 
+# Python
+__pycache__
+
 # fusesoc result
 build/
 
diff --git a/BUILD.bazel b/BUILD.bazel
index c51a52b8ea3d9..010504ddd88d8 100644
--- a/BUILD.bazel
+++ b/BUILD.bazel
@@ -5,7 +5,7 @@
 package(default_visibility = ["//visibility:public"])
 
 exports_files([
-    "WORKSPACE",
+    "MODULE.bazel",
     "python-requirements.txt",
     "tool_requirements.py",
 ])
diff --git a/MODULE.bazel b/MODULE.bazel
new file mode 100644
index 0000000000000..f93d757682b41
--- /dev/null
+++ b/MODULE.bazel
@@ -0,0 +1,354 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+module(name = "lowrisc_opentitan")
+
+# Dependencies:
+bazel_dep(name = "abseil-cpp", version = "20240116.1")
+bazel_dep(name = "bazel_skylib", version = "1.7.1")
+bazel_dep(name = "googletest", version = "1.14.0.bcr.1")
+bazel_dep(name = "platforms", version = "0.0.11")
+bazel_dep(name = "rules_cc", version = "0.1.2")
+bazel_dep(name = "rules_fuzzing", version = "0.5.2")
+bazel_dep(name = "rules_pkg", version = "1.0.1")
+
+# Dev dependencies:
+bazel_dep(
+    name = "buildifier_prebuilt",
+    version = "6.4.0",
+    dev_dependency = True,
+)
+bazel_dep(
+    name = "lowrisc_misc_linters",
+    dev_dependency = True,
+)
+archive_override(
+    module_name = "lowrisc_misc_linters",
+    integrity = "sha256-Nl/mfYFo/uGg/DrqS7gFiL9yHcT8g7QEY7CetQiXzaM=",
+    strip_prefix = "misc-linters-20240823_01",
+    urls = ["https://github.com/lowRISC/misc-linters/archive/refs/tags/20240823_01.tar.gz"],
+)
+
+################### originally from //third_party/rust:rust.MODULE.bazel
+
+# Dependencies:
+bazel_dep(name = "rules_rust", version = "0.59.2")
+bazel_dep(name = "rules_rust_bindgen", version = "0.59.2")
+bazel_dep(name = "toolchains_llvm", version = "1.1.2")
+
+# Overrides and patches:
+single_version_override(
+    module_name = "rules_rust",
+    patches = [
+        "@lowrisc_opentitan//third_party/rust/patches:rules_rust.extra_rustc_toolchain_dirs.patch",
+        "@lowrisc_opentitan//third_party/rust/patches:rules_rust.experimental.patch",
+    ],
+    version = "0.59.2",
+)
+
+single_version_override(
+    module_name = "rules_rust_bindgen",
+    patches = [
+        "@lowrisc_opentitan//third_party/rust/patches:rules_rust.bindgen_static_lib.patch",
+        "@lowrisc_opentitan//third_party/rust/patches:rules_rust.transition.patch",
+    ],
+    version = "0.59.2",
+)
+
+# Support ChromeOS SDK environment as a Debian variant
+single_version_override(
+    module_name = "toolchains_llvm",
+    patch_strip = 1,
+    patches = [
+        "@lowrisc_opentitan//third_party/toolchains_llvm/patches:toolchains_llvm-distroname.patch",
+    ],
+    version = "1.1.2",
+)
+
+# Rust toolchain:
+rust = use_extension("@rules_rust//rust:extensions.bzl", "rust")
+rust.repository_set(
+    name = "rust_host",
+    edition = "2024",
+    exec_triple = "x86_64-unknown-linux-gnu",
+    sha256s = {
+        "2025-01-03/rustc-nightly-x86_64-unknown-linux-gnu.tar.xz": "a7e713b2c38d2c16a2025d228480909a2281c91ad8fd225b1dacc3eda933724c",
+        "2025-01-03/clippy-nightly-x86_64-unknown-linux-gnu.tar.xz": "5d04b1e1a23c054cbb1775a32ece3d09f7bb158601b82a038f51bb998fce8ee8",
+        "2025-01-03/cargo-nightly-x86_64-unknown-linux-gnu.tar.xz": "e28f21e048490c2cc212169799b5ac3a01651e6946aca2f120adf0be6f3a70d9",
+        "2025-01-03/llvm-tools-nightly-x86_64-unknown-linux-gnu.tar.xz": "67e9e52780680c3a4b0dadc138864a9da0fb99a4af882d3477b90c8b2efe474c",
+        "2025-01-03/rust-std-nightly-x86_64-unknown-linux-gnu.tar.xz": "a5f96b464ace329963eef9e358303a17b5544cbd49b450474f4bc16cae0cc191",
+    },
+    target_compatible_with = [
+        "@platforms//cpu:x86_64",
+        "@platforms//os:linux",
+    ],
+    target_triple = "x86_64-unknown-linux-gnu",
+    # Use nightly that Rust 1.85 branches from.
+    versions = ["nightly/2025-01-03"],
+)
+rust.repository_set(
+    name = "rust_tock",
+    edition = "2021",
+    exec_triple = "x86_64-unknown-linux-gnu",
+    sha256s = {
+        "2023-07-30/rustc-nightly-x86_64-unknown-linux-gnu.tar.xz": "ecdee8821a57efbb699b7e3aa4cbfbd60b7970bce89a8cfb9bc7d65b9058ee42",
+        "2023-07-30/clippy-nightly-x86_64-unknown-linux-gnu.tar.xz": "76ee5aac81d1348bfebd3d94d5fb65c3f4ea0cf5fc2de834926f93772547380c",
+        "2023-07-30/cargo-nightly-x86_64-unknown-linux-gnu.tar.xz": "4ddb3ed2dd2acedf9097f4a1fe17b8cd571fdd7c9a49b1e31c228a284ec95049",
+        "2023-07-30/llvm-tools-nightly-x86_64-unknown-linux-gnu.tar.xz": "dc71b9ae6a4a4b9fa259724b29f4ad19467197ced89a8aad675f5af112c4fb77",
+        "2023-07-30/rust-std-nightly-riscv32imc-unknown-none-elf.tar.xz": "9790d50d4510443bbf4c13b68227a273345d28b84d29372bc5f5ea2d14d05f2d",
+        "2023-07-30/rust-std-nightly-x86_64-unknown-linux-gnu.tar.xz": "b5a589a243923c5fa2a1f08e7b902bb0a64ae08010067b9074501a6e1fb8b042",
+    },
+    target_compatible_with = [
+        "@platforms//cpu:riscv32",
+    ],
+    target_triple = "riscv32imc-unknown-none-elf",
+    # For RISC-V toolchain, we currently don't support LLVM 16+ due to old binutils version.
+    # Rust updated its LLVM 17 on 2023-08-08.
+    versions = ["nightly/2023-07-30"],
+)
+use_repo(rust, "rust_toolchains")
+
+register_toolchains("@rust_toolchains//:all")
+
+# Rust crates:
+crate = use_extension("@rules_rust//crate_universe:extension.bzl", "crate")
+crate.from_cargo(
+    name = "crate_index",
+    cargo_lockfile = "//third_party/rust:Cargo.lock",
+    manifests = ["//third_party/rust:Cargo.toml"],
+)
+crate.annotation(
+    crate = "libudev-sys",
+    patch_args = ["-p1"],
+    patches = ["@lowrisc_opentitan//third_party/rust/patches:libudev-sys-0.1.4.patch"],
+    repositories = ["crate_index"],
+)
+crate.annotation(
+    crate = "mdbook",
+    gen_binaries = ["mdbook"],
+    patch_args = ["-p1"],
+    patches = ["@lowrisc_opentitan//third_party/rust/patches:mdbook-landing-page-links.patch"],
+    repositories = ["crate_index"],
+)
+crate.annotation(
+    crate = "cryptoki",
+    patch_args = ["-p2"],
+    patches = [
+        "@lowrisc_opentitan//third_party/rust/patches:cryptoki-vendor-defined-mechanism-type.patch",
+        "@lowrisc_opentitan//third_party/rust/patches:cryptoki-profile.patch",
+    ],
+    repositories = ["crate_index"],
+)
+crate.annotation(
+    additive_build_file_content = """
+        filegroup(
+            name = "binding_srcs",
+            srcs = [
+                "src/lib.rs",
+                "src/bindings/x86_64-unknown-linux-gnu.rs",
+            ],
+        )
+    """,
+    crate = "cryptoki-sys",
+    extra_aliased_targets = {
+        "cryptoki-sys-binding-srcs": "binding_srcs",
+    },
+    repositories = ["crate_index"],
+)
+crate.annotation(
+    build_script_env = {
+        "PKG_CONFIG_PATH": "$(OPENSSL_PKG_CONFIG_PATH)",
+        "OPENSSL_STATIC": "1",
+    },
+    build_script_toolchains = ["@lowrisc_opentitan//third_party/rust:openssl_pkg_config_path"],
+    crate = "openssl-sys",
+    repositories = ["crate_index"],
+)
+use_repo(crate, "crate_index")
+
+# Tock crates (must be separated to avoid them depending on `std`):
+crate.from_cargo(
+    name = "tock_index",
+    cargo_lockfile = "//third_party/tock:Cargo.lock",
+    manifests = ["//third_party/tock:Cargo.toml"],
+)
+use_repo(crate, "tock_index")
+
+# Rust bindgen toolchain:
+register_toolchains("//third_party/rust:bindgen_toolchain")
+
+# LLVM toolchain used by bindgen for `libclang` (not for device software):
+llvm = use_extension("@toolchains_llvm//toolchain/extensions:llvm.bzl", "llvm")
+llvm.toolchain(
+    name = "llvm_toolchain",
+    llvm_versions = {"": "10.0.0"},
+)
+use_repo(llvm, "llvm_toolchain_llvm")
+
+################### originally from "//third_party/python:python.MODULE.bazel
+
+# Dependencies:
+bazel_dep(name = "rules_python", version = "1.2.0")
+
+# Python toolchain:
+python = use_extension("@rules_python//python/extensions:python.bzl", "python")
+python.toolchain(
+    # Required because CI containers currently run as the `root` user.
+    # We lose caching of `.pyc` files as a result.
+    # See <https://github.com/bazelbuild/rules_python/pull/713>.
+    ignore_root_user_error = True,
+    is_default = True,
+    python_version = "3.9",
+)
+use_repo(python, "pythons_hub")
+
+register_toolchains("@pythons_hub//:all")
+
+# We occasionally access the toolchain repositories directly to use interpreters.
+use_repo(python, python3 = "python_3_9", python3_host = "python_3_9_host")
+
+# Pip dependencies:
+pip = use_extension("@rules_python//python/extensions:pip.bzl", "pip")
+pip.parse(
+    hub_name = "ot_python_deps",
+    python_version = "3.9",
+    requirements_lock = "//:python-requirements.txt",
+)
+use_repo(pip, "ot_python_deps")
+
+################### originally from //third_party/foreign_cc:foreign_cc.MODULE.bazel
+
+# Dependencies:
+bazel_dep(name = "rules_foreign_cc", version = "0.9.0")
+
+# Overrides and patches:
+single_version_override(
+    module_name = "rules_foreign_cc",
+    patches = [
+        # Patch to remove all build log file output when using rules_foreign_cc
+        # toolchains to ensure deterministic Bazel builds. See upstream issue:
+        # https://github.com/bazel-contrib/rules_foreign_cc/issues/1313
+        "//third_party/foreign_cc/patches:rules_foreign_cc.remove_log_output.patch",
+    ],
+    version = "0.9.0",
+)
+
+###################
+
+# Repository rules:
+bitstreams_repo = use_repo_rule("//rules:bitstreams.bzl", "bitstreams_repo")
+
+bitstreams_repo(name = "bitstreams")
+
+nonhermetic_repo = use_repo_rule("//rules:nonhermetic.bzl", "nonhermetic_repo")
+
+nonhermetic_repo(name = "nonhermetic")
+
+# Source repositories (not Bazel-aware):
+github_tools = use_extension("//third_party/github:extensions.bzl", "github_tools")
+use_repo(github_tools, "com_github_gh")
+
+lychee = use_extension("//third_party/lychee:extensions.bzl", "lychee")
+use_repo(lychee, "lychee")
+
+serde_annotate = use_extension("//third_party/rust:extensions.bzl", "serde_annotate")
+use_repo(serde_annotate, "lowrisc_serde_annotate")
+
+shellcheck = use_extension("//third_party/shellcheck:extensions.bzl", "shellcheck")
+use_repo(shellcheck, "shellcheck")
+
+tock = use_extension("//third_party/tock:extensions.bzl", "tock")
+use_repo(tock, "elf2tab", "libtock", "tock")
+
+openocd = use_extension("//third_party/openocd:extensions.bzl", "openocd")
+use_repo(openocd, "openocd")
+
+freertos = use_extension("//third_party/freertos:extensions.bzl", "freertos")
+use_repo(freertos, "freertos")
+
+llvm_compiler_rt = use_extension("//third_party/llvm_compiler_rt:extensions.bzl", "llvm_compiler_rt")
+use_repo(llvm_compiler_rt, "llvm_compiler_rt")
+
+riscv_compliance = use_extension("//third_party/riscv-compliance:extensions.bzl", "riscv_compliance")
+use_repo(riscv_compliance, "riscv-compliance")
+
+coremark = use_extension("//third_party/coremark:extensions.bzl", "coremark")
+use_repo(coremark, "coremark")
+
+xkcp = use_extension("//third_party/xkcp:extensions.bzl", "xkcp")
+use_repo(xkcp, "xkcp")
+
+hsm = use_extension("//third_party/hsm:extensions.bzl", "hsm")
+use_repo(hsm, "cloud_kms_hsm", "opensc", "sc_hsm", "softhsm2")
+
+nist_cavp = use_extension("//third_party/nist_cavp_testvectors:extensions.bzl", "nist_cavp")
+use_repo(
+    nist_cavp,
+    "nist_cavp_aes_gcm",
+    "nist_cavp_aes_kat",
+    "nist_cavp_aes_kw_sp_800_38f",
+    "nist_cavp_drbg_sp_800_90a_root",
+    "nist_cavp_ecdh_sp_800_56a",
+    "nist_cavp_ecdsa_fips_186_4",
+    "nist_cavp_hmac_fips_198_1",
+    "nist_cavp_rsa_fips_186_3",
+    "nist_cavp_sha2_fips_180_4",
+    "nist_cavp_sha3_fips_202",
+    "nist_cavp_shake_fips_202",
+)
+
+wycheproof = use_extension("//third_party/wycheproof:extensions.bzl", "wycheproof")
+use_repo(wycheproof, "wycheproof")
+
+sphincsplus = use_extension("//third_party/sphincsplus:extensions.bzl", "sphincsplus")
+use_repo(
+    sphincsplus,
+    "sphincsplus_fips205_ipd",
+    "sphincsplus_sha256_kat",
+    "sphincsplus_shake256_kat",
+)
+
+open_dice = use_extension("//third_party/open-dice:extensions.bzl", "open_dice")
+use_repo(open_dice, "open-dice")
+
+hyperdebug = use_extension("//third_party/hyperdebug:extensions.bzl", "hyperdebug")
+use_repo(hyperdebug, "hyperdebug_firmware")
+
+hwtrust = use_extension("//third_party/hwtrust:extensions.bzl", "hwtrust")
+use_repo(hwtrust, "hwtrust")
+
+qemu = use_extension("//third_party/qemu:extensions.bzl", "qemu")
+use_repo(qemu, "qemu_opentitan", "qemu_opentitan_src")
+
+lowrisc_rv32imcb_toolchain = use_extension("//third_party/lowrisc:extensions.bzl", "lowrisc_rv32imcb_toolchain")
+use_repo(lowrisc_rv32imcb_toolchain, "lowrisc_rv32imcb_toolchain")
+
+# Extension for linking in externally managed test and provisioning customizations
+# for both secure/non-secure manufacturer domains.
+hooks = use_extension("//rules:extensions.bzl", "hooks")
+hooks.repo(
+    name = "manufacturer_test_hooks",
+    dummy = "@lowrisc_opentitan//:sw/device/tests/closed_source",
+    env = "MANUFACTURER_HOOKS_DIR",
+)
+hooks.repo(
+    name = "secure_manufacturer_test_hooks",
+    dummy = "@lowrisc_opentitan//:sw/device/tests/closed_source",
+    env = "SECURE_MANUFACTURER_HOOKS_DIR",
+)
+hooks.repo(
+    name = "provisioning_exts",
+    dummy = "@lowrisc_opentitan//:sw/device/silicon_creator/manuf/extensions",
+    env = "PROV_EXTS_DIR",
+)
+use_repo(
+    hooks,
+    "manufacturer_test_hooks",
+    "provisioning_exts",
+    "secure_manufacturer_test_hooks",
+)
+
+register_toolchains("//rules/opentitan:localtools")
+
+register_toolchains("//toolchain:cc_toolchain_opentitan")
diff --git a/MODULE.bazel.lock b/MODULE.bazel.lock
new file mode 100644
index 0000000000000..da51c2495f3fe
--- /dev/null
+++ b/MODULE.bazel.lock
@@ -0,0 +1,12521 @@
+{
+  "lockFileVersion": 16,
+  "registryFileHashes": {
+    "https://bcr.bazel.build/bazel_registry.json": "8a28e4aff06ee60aed2a8c281907fb8bcbf3b753c91fb5a5c57da3215d5b3497",
+    "https://bcr.bazel.build/modules/abseil-cpp/20210324.2/MODULE.bazel": "7cd0312e064fde87c8d1cd79ba06c876bd23630c83466e9500321be55c96ace2",
+    "https://bcr.bazel.build/modules/abseil-cpp/20211102.0/MODULE.bazel": "70390338f7a5106231d20620712f7cccb659cd0e9d073d1991c038eb9fc57589",
+    "https://bcr.bazel.build/modules/abseil-cpp/20230125.1/MODULE.bazel": "89047429cb0207707b2dface14ba7f8df85273d484c2572755be4bab7ce9c3a0",
+    "https://bcr.bazel.build/modules/abseil-cpp/20230802.0.bcr.1/MODULE.bazel": "1c8cec495288dccd14fdae6e3f95f772c1c91857047a098fad772034264cc8cb",
+    "https://bcr.bazel.build/modules/abseil-cpp/20230802.0/MODULE.bazel": "d253ae36a8bd9ee3c5955384096ccb6baf16a1b1e93e858370da0a3b94f77c16",
+    "https://bcr.bazel.build/modules/abseil-cpp/20230802.1/MODULE.bazel": "fa92e2eb41a04df73cdabeec37107316f7e5272650f81d6cc096418fe647b915",
+    "https://bcr.bazel.build/modules/abseil-cpp/20240116.1/MODULE.bazel": "37bcdb4440fbb61df6a1c296ae01b327f19e9bb521f9b8e26ec854b6f97309ed",
+    "https://bcr.bazel.build/modules/abseil-cpp/20240116.1/source.json": "9be551b8d4e3ef76875c0d744b5d6a504a27e3ae67bc6b28f46415fd2d2957da",
+    "https://bcr.bazel.build/modules/apple_support/1.17.1/MODULE.bazel": "655c922ab1209978a94ef6ca7d9d43e940cd97d9c172fb55f94d91ac53f8610b",
+    "https://bcr.bazel.build/modules/apple_support/1.17.1/source.json": "6b2b8c74d14e8d485528a938e44bdb72a5ba17632b9e14ef6e68a5ee96c8347f",
+    "https://bcr.bazel.build/modules/bazel_features/1.1.1/MODULE.bazel": "27b8c79ef57efe08efccbd9dd6ef70d61b4798320b8d3c134fd571f78963dbcd",
+    "https://bcr.bazel.build/modules/bazel_features/1.10.0/MODULE.bazel": "f75e8807570484a99be90abcd52b5e1f390362c258bcb73106f4544957a48101",
+    "https://bcr.bazel.build/modules/bazel_features/1.11.0/MODULE.bazel": "f9382337dd5a474c3b7d334c2f83e50b6eaedc284253334cf823044a26de03e8",
+    "https://bcr.bazel.build/modules/bazel_features/1.15.0/MODULE.bazel": "d38ff6e517149dc509406aca0db3ad1efdd890a85e049585b7234d04238e2a4d",
+    "https://bcr.bazel.build/modules/bazel_features/1.17.0/MODULE.bazel": "039de32d21b816b47bd42c778e0454217e9c9caac4a3cf8e15c7231ee3ddee4d",
+    "https://bcr.bazel.build/modules/bazel_features/1.18.0/MODULE.bazel": "1be0ae2557ab3a72a57aeb31b29be347bcdc5d2b1eb1e70f39e3851a7e97041a",
+    "https://bcr.bazel.build/modules/bazel_features/1.19.0/MODULE.bazel": "59adcdf28230d220f0067b1f435b8537dd033bfff8db21335ef9217919c7fb58",
+    "https://bcr.bazel.build/modules/bazel_features/1.21.0/MODULE.bazel": "675642261665d8eea09989aa3b8afb5c37627f1be178382c320d1b46afba5e3b",
+    "https://bcr.bazel.build/modules/bazel_features/1.28.0/MODULE.bazel": "4b4200e6cbf8fa335b2c3f43e1d6ef3e240319c33d43d60cc0fbd4b87ece299d",
+    "https://bcr.bazel.build/modules/bazel_features/1.28.0/source.json": "16a3fc5b4483cb307643791f5a4b7365fa98d2e70da7c378cdbde55f0c0b32cf",
+    "https://bcr.bazel.build/modules/bazel_features/1.4.1/MODULE.bazel": "e45b6bb2350aff3e442ae1111c555e27eac1d915e77775f6fdc4b351b758b5d7",
+    "https://bcr.bazel.build/modules/bazel_features/1.9.1/MODULE.bazel": "8f679097876a9b609ad1f60249c49d68bfab783dd9be012faf9d82547b14815a",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.0.3/MODULE.bazel": "bcb0fd896384802d1ad283b4e4eb4d718eebd8cb820b0a2c3a347fb971afd9d8",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.1.1/MODULE.bazel": "1add3e7d93ff2e6998f9e118022c84d163917d912f5afafb3058e3d2f1545b5e",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.2.0/MODULE.bazel": "44fe84260e454ed94ad326352a698422dbe372b21a1ac9f3eab76eb531223686",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.2.1/MODULE.bazel": "f35baf9da0efe45fa3da1696ae906eea3d615ad41e2e3def4aeb4e8bc0ef9a7a",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.3.0/MODULE.bazel": "20228b92868bf5cfc41bda7afc8a8ba2a543201851de39d990ec957b513579c5",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.4.1/MODULE.bazel": "a0dcb779424be33100dcae821e9e27e4f2901d9dfd5333efe5ac6a8d7ab75e1d",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.4.2/MODULE.bazel": "3bd40978e7a1fac911d5989e6b09d8f64921865a45822d8b09e815eaa726a651",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.5.0/MODULE.bazel": "32880f5e2945ce6a03d1fbd588e9198c0a959bb42297b2cfaf1685b7bc32e138",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.6.1/MODULE.bazel": "8fdee2dbaace6c252131c00e1de4b165dc65af02ea278476187765e1a617b917",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.7.0/MODULE.bazel": "0db596f4563de7938de764cc8deeabec291f55e8ec15299718b93c4423e9796d",
+    "https://bcr.bazel.build/modules/bazel_skylib/1.7.1/MODULE.bazel": "3120d80c5861aa616222ec015332e5f8d3171e062e3e804a2a0253e1be26e59b",
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+                "capsules/aes_gcm/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"capsules-aes-gcm\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"capsules_aes_gcm\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=capsules_aes_gcm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//kernel\",\n        \"//libraries/enum_primitive\",\n        \"//libraries/tickv\",\n        \"@tock_index//:ghash\",\n    ],\n)\n\n\n",
+                "capsules/core/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"capsules-core\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"capsules_core\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=capsules_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//kernel\",\n        \"//libraries/enum_primitive\",\n        \"//libraries/tickv\",\n    ],\n)\n\n\n",
+                "capsules/extra/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"capsules-extra\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"capsules_extra\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=capsules_extra\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//kernel\",\n        \"//libraries/enum_primitive\",\n        \"//libraries/tickv\",\n        \"//capsules/core:capsules-core\",\n    ],\n)\n\n\n",
+                "chips/earlgrey/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"earlgrey\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"earlgrey\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=earlgrey\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//chips/lowrisc\",\n        \"//arch/rv32i\",\n        \"//kernel\",\n    ],\n)\n\n\n",
+                "chips/lowrisc/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"lowrisc\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"lowrisc\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=lowrisc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//arch/rv32i\",\n        \"//kernel\",\n    ],\n)\n\n\n",
+                "libraries/enum_primitive/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"enum_primitive\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"enum_primitive\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=enum_primitive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \n    ],\n)\n\n\n",
+                "libraries/riscv-csr/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"riscv-csr\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"riscv_csr\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=riscv_csr\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//libraries/tock-register-interface:tock-registers\",\n    ],\n)\n\n\n",
+                "libraries/tickv/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"tickv\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"tickv\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tickv\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \n    ],\n)\n\n\n",
+                "libraries/tock-cells/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"tock-cells\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"tock_cells\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tock_cells\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \n    ],\n)\n\n\n",
+                "libraries/tock-tbf/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"tock-tbf\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"tock_tbf\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tock_tbf\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \n    ],\n)\n\n\n",
+                "libraries/tock-register-interface/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"tock-registers\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"register_types\",\n    ],\n    crate_name = \"tock_registers\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tock_registers\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \n    ],\n)\n\n\n",
+                "kernel/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"kernel\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"kernel\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=kernel\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//libraries/tock-register-interface:tock-registers\",\n        \"//libraries/tock-cells\",\n        \"//libraries/tock-tbf\",\n    ],\n)\n\n\n"
+              }
+            }
+          },
+          "libtock": {
+            "repoRuleId": "@@//rules:repo.bzl%bare_repository",
+            "attributes": {
+              "strip_prefix": "libtock-rs-a2c6ad80648e3ba073e7433b4330706df052a6ae",
+              "url": "https://github.com/tock/libtock-rs/archive/a2c6ad80648e3ba073e7433b4330706df052a6ae.tar.gz",
+              "sha256": "888d1925cd760e818385d13187286d6b87f763c548a4dc1bb26e55786dc95636",
+              "additional_files_content": {
+                "BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"libtock\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//apis/adc\",\n        \"//apis/air_quality\",\n        \"//apis/alarm\",\n        \"//apis/ambient_light\",\n        \"//apis/buttons\",\n        \"//apis/buzzer\",\n        \"//apis/console\",\n        \"//apis/gpio\",\n        \"//apis/leds\",\n        \"//apis/low_level_debug\",\n        \"//apis/ninedof\",\n        \"//apis/proximity\",\n        \"//apis/sound_pressure\",\n        \"//apis/temperature\",\n        \"//panic_handlers/debug_panic\",\n        \"//platform\",\n        \"//runtime\",\n    ],\n)\n\n\n",
+                "apis/adc/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"adc\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_adc\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_adc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/air_quality/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"air_quality\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_air_quality\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_air_quality\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/alarm/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"alarm\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_alarm\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_alarm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/ambient_light/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"ambient_light\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_ambient_light\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_ambient_light\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/buttons/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"buttons\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_buttons\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_buttons\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/buzzer/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"buzzer\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_buzzer\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_buzzer\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/console/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"console\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_console\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_console\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/gpio/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"gpio\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_gpio\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_gpio\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
+                "apis/leds/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"leds\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_leds\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_leds\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n    ],\n)\n\n\n",
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+                "apis/ninedof/BUILD": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by the crate_build function in\n# //rules:rust.bzl.\n###############################################################################\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\nrust_library(\n    name = \"ninedof\",\n    srcs = glob([\"**/*.rs\"]),\n    compile_data = glob(\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \n    ],\n    crate_name = \"libtock_ninedof\",\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libtock_ninedof\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.0\",\n    deps = [\n        \"//platform\",\n        \"@tock_index//:libm\",\n    ],\n)\n\n\n",
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+            "pypi__tomli",
+            "rules_python++internal_deps+pypi__tomli"
+          ],
+          [
+            "rules_python+",
+            "pypi__wheel",
+            "rules_python++internal_deps+pypi__wheel"
+          ],
+          [
+            "rules_python+",
+            "pypi__zipp",
+            "rules_python++internal_deps+pypi__zipp"
+          ],
+          [
+            "rules_python+",
+            "pythons_hub",
+            "rules_python++python+pythons_hub"
+          ],
+          [
+            "rules_python++python+pythons_hub",
+            "python_3_10_host",
+            "rules_python++python+python_3_10_host"
+          ],
+          [
+            "rules_python++python+pythons_hub",
+            "python_3_11_host",
+            "rules_python++python+python_3_11_host"
+          ],
+          [
+            "rules_python++python+pythons_hub",
+            "python_3_12_host",
+            "rules_python++python+python_3_12_host"
+          ],
+          [
+            "rules_python++python+pythons_hub",
+            "python_3_8_host",
+            "rules_python++python+python_3_8_host"
+          ],
+          [
+            "rules_python++python+pythons_hub",
+            "python_3_9_host",
+            "rules_python++python+python_3_9_host"
+          ]
+        ]
+      }
+    },
+    "@@rules_rust+//crate_universe:extension.bzl%crate": {
+      "general": {
+        "bzlTransitiveDigest": "tTZ5psFukCVz4oibDQ/H/c8PaeLW75dVz297sraRj+s=",
+        "usagesDigest": "y4aUC1vjFIjeME0DElLEesiBkkV0CFaf+ApZNcEHC3Q=",
+        "recordedFileInputs": {
+          "@@//third_party/rust/Cargo.lock": "1174b96ea73bc0976bad76e658fd1445510788585e34c4cafa9f0d61f535e2bf",
+          "@@//third_party/rust/Cargo.toml": "0ee40cf528f3ae57d9b0e5e27da36bff6dbd4e4baaef912a4278d2357d7a2686",
+          "@@//third_party/tock/Cargo.lock": "b5a7a833ae205f1e3697a510e97e3185b44b195d7a22879b4669bff95febd5c8",
+          "@@//third_party/tock/Cargo.toml": "5a939bd934aef4775b65a82e678f1180ec00aa78cf214f6052cc82353c975cc4"
+        },
+        "recordedDirentsInputs": {},
+        "envVariables": {
+          "CARGO_BAZEL_DEBUG": null,
+          "CARGO_BAZEL_GENERATOR_SHA256": null,
+          "CARGO_BAZEL_GENERATOR_URL": null,
+          "CARGO_BAZEL_ISOLATED": null,
+          "CARGO_BAZEL_REPIN": null,
+          "CARGO_BAZEL_REPIN_ONLY": null,
+          "REPIN": null
+        },
+        "generatedRepoSpecs": {
+          "crate_index": {
+            "repoRuleId": "@@rules_rust+//crate_universe:extensions.bzl%_generate_repo",
+            "attributes": {
+              "contents": {
+                "BUILD.bazel": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n    [\n        \"cargo-bazel.json\",\n        \"crates.bzl\",\n        \"defs.bzl\",\n    ] + glob(\n        allow_empty = True,\n        include = [\"*.bazel\"],\n    ),\n)\n\nfilegroup(\n    name = \"srcs\",\n    srcs = glob(\n        allow_empty = True,\n        include = [\n            \"*.bazel\",\n            \"*.bzl\",\n        ],\n    ),\n)\n\n# Workspace Member Dependencies\nalias(\n    name = \"aes-0.8.3\",\n    actual = \"@crate_index__aes-0.8.3//:aes\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"aes\",\n    actual = \"@crate_index__aes-0.8.3//:aes\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"anstyle-1.0.4\",\n    actual = \"@crate_index__anstyle-1.0.4//:anstyle\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"anstyle\",\n    actual = \"@crate_index__anstyle-1.0.4//:anstyle\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"anyhow-1.0.75\",\n    actual = \"@crate_index__anyhow-1.0.75//:anyhow\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"anyhow\",\n    actual = \"@crate_index__anyhow-1.0.75//:anyhow\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"arrayvec-0.7.4\",\n    actual = \"@crate_index__arrayvec-0.7.4//:arrayvec\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"arrayvec\",\n    actual = \"@crate_index__arrayvec-0.7.4//:arrayvec\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"asn1-0.15.5\",\n    actual = \"@crate_index__asn1-0.15.5//:asn1\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"asn1\",\n    actual = \"@crate_index__asn1-0.15.5//:asn1\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"base64-0.21.5\",\n    actual = \"@crate_index__base64-0.21.5//:base64\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"base64\",\n    actual = \"@crate_index__base64-0.21.5//:base64\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"base64ct-1.6.0\",\n    actual = \"@crate_index__base64ct-1.6.0//:base64ct\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"base64ct\",\n    actual = \"@crate_index__base64ct-1.6.0//:base64ct\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"bitflags-2.4.0\",\n    actual = \"@crate_index__bitflags-2.4.0//:bitflags\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"bitflags\",\n    actual = \"@crate_index__bitflags-2.4.0//:bitflags\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"bitvec-1.0.1\",\n    actual = \"@crate_index__bitvec-1.0.1//:bitvec\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"bitvec\",\n    actual = \"@crate_index__bitvec-1.0.1//:bitvec\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"byteorder-1.5.0\",\n    actual = \"@crate_index__byteorder-1.5.0//:byteorder\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"byteorder\",\n    actual = \"@crate_index__byteorder-1.5.0//:byteorder\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"chrono-0.4.40\",\n    actual = \"@crate_index__chrono-0.4.40//:chrono\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"chrono\",\n    actual = \"@crate_index__chrono-0.4.40//:chrono\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ciborium-0.2.2\",\n    actual = \"@crate_index__ciborium-0.2.2//:ciborium\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ciborium\",\n    actual = \"@crate_index__ciborium-0.2.2//:ciborium\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"clap-4.4.7\",\n    actual = \"@crate_index__clap-4.4.7//:clap\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"clap\",\n    actual = \"@crate_index__clap-4.4.7//:clap\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"clap-num-1.0.2\",\n    actual = \"@crate_index__clap-num-1.0.2//:clap_num\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"clap-num\",\n    actual = \"@crate_index__clap-num-1.0.2//:clap_num\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"const-oid-0.9.6\",\n    actual = \"@crate_index__const-oid-0.9.6//:const_oid\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"const-oid\",\n    actual = \"@crate_index__const-oid-0.9.6//:const_oid\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"coset-0.3.8\",\n    actual = \"@crate_index__coset-0.3.8//:coset\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"coset\",\n    actual = \"@crate_index__coset-0.3.8//:coset\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"crc-3.0.1\",\n    actual = \"@crate_index__crc-3.0.1//:crc\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"crc\",\n    actual = \"@crate_index__crc-3.0.1//:crc\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"cryptoki-0.8.0\",\n    actual = \"@crate_index__cryptoki-0.8.0//:cryptoki\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"cryptoki\",\n    actual = \"@crate_index__cryptoki-0.8.0//:cryptoki\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"cryptoki-sys-0.2.0\",\n    actual = \"@crate_index__cryptoki-sys-0.2.0//:cryptoki_sys\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"cryptoki-sys\",\n    actual = \"@crate_index__cryptoki-sys-0.2.0//:cryptoki_sys\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"cryptoki-sys-binding-srcs\",\n    actual = \"@crate_index__cryptoki-sys-0.2.0//:binding_srcs\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"der-0.7.8\",\n    actual = \"@crate_index__der-0.7.8//:der\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"der\",\n    actual = \"@crate_index__der-0.7.8//:der\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"deser-hjson-2.1.0\",\n    actual = \"@crate_index__deser-hjson-2.1.0//:deser_hjson\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"deser-hjson\",\n    actual = \"@crate_index__deser-hjson-2.1.0//:deser_hjson\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"directories-5.0.1\",\n    actual = \"@crate_index__directories-5.0.1//:directories\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"directories\",\n    actual = \"@crate_index__directories-5.0.1//:directories\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ecdsa-0.16.9\",\n    actual = \"@crate_index__ecdsa-0.16.9//:ecdsa\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ecdsa\",\n    actual = \"@crate_index__ecdsa-0.16.9//:ecdsa\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"elf-0.7.2\",\n    actual = \"@crate_index__elf-0.7.2//:elf\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"elf\",\n    actual = \"@crate_index__elf-0.7.2//:elf\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"elliptic-curve-0.13.8\",\n    actual = \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"elliptic-curve\",\n    actual = \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"embedded-hal-1.0.0\",\n    actual = \"@crate_index__embedded-hal-1.0.0//:embedded_hal\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"embedded-hal\",\n    actual = \"@crate_index__embedded-hal-1.0.0//:embedded_hal\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"env_logger-0.10.0\",\n    actual = \"@crate_index__env_logger-0.10.0//:env_logger\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"env_logger\",\n    actual = \"@crate_index__env_logger-0.10.0//:env_logger\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"erased-serde-0.3.31\",\n    actual = \"@crate_index__erased-serde-0.3.31//:erased_serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"erased-serde\",\n    actual = \"@crate_index__erased-serde-0.3.31//:erased_serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"foreign-types-0.3.2\",\n    actual = \"@crate_index__foreign-types-0.3.2//:foreign_types\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"foreign-types\",\n    actual = \"@crate_index__foreign-types-0.3.2//:foreign_types\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi-0.1.3\",\n    actual = \"@crate_index__ftdi-0.1.3//:ftdi\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi\",\n    actual = \"@crate_index__ftdi-0.1.3//:ftdi\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi-embedded-hal-0.22.0\",\n    actual = \"@crate_index__ftdi-embedded-hal-0.22.0//:ftdi_embedded_hal\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi-embedded-hal\",\n    actual = \"@crate_index__ftdi-embedded-hal-0.22.0//:ftdi_embedded_hal\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi-mpsse-0.1.1\",\n    actual = \"@crate_index__ftdi-mpsse-0.1.1//:ftdi_mpsse\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ftdi-mpsse\",\n    actual = \"@crate_index__ftdi-mpsse-0.1.1//:ftdi_mpsse\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"heck-0.4.1\",\n    actual = \"@crate_index__heck-0.4.1//:heck\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"heck\",\n    actual = \"@crate_index__heck-0.4.1//:heck\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"hex-0.4.3\",\n    actual = \"@crate_index__hex-0.4.3//:hex\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"hex\",\n    actual = \"@crate_index__hex-0.4.3//:hex\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"hmac-0.12.1\",\n    actual = \"@crate_index__hmac-0.12.1//:hmac\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"hmac\",\n    actual = \"@crate_index__hmac-0.12.1//:hmac\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"humantime-2.1.0\",\n    actual = \"@crate_index__humantime-2.1.0//:humantime\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"humantime\",\n    actual = \"@crate_index__humantime-2.1.0//:humantime\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"humantime-serde-1.1.1\",\n    actual = \"@crate_index__humantime-serde-1.1.1//:humantime_serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"humantime-serde\",\n    actual = \"@crate_index__humantime-serde-1.1.1//:humantime_serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indexmap-2.0.0\",\n    actual = \"@crate_index__indexmap-2.0.0//:indexmap\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indexmap\",\n    actual = \"@crate_index__indexmap-2.0.0//:indexmap\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indicatif-0.17.6\",\n    actual = \"@crate_index__indicatif-0.17.6//:indicatif\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indicatif\",\n    actual = \"@crate_index__indicatif-0.17.6//:indicatif\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indoc-2.0.4\",\n    actual = \"@crate_index__indoc-2.0.4//:indoc\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"indoc\",\n    actual = \"@crate_index__indoc-2.0.4//:indoc\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"inventory-0.3.17\",\n    actual = \"@crate_index__inventory-0.3.17//:inventory\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"inventory\",\n    actual = \"@crate_index__inventory-0.3.17//:inventory\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"itertools-0.13.0\",\n    actual = \"@crate_index__itertools-0.13.0//:itertools\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"itertools\",\n    actual = \"@crate_index__itertools-0.13.0//:itertools\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"libloading-0.8.3\",\n    actual = \"@crate_index__libloading-0.8.3//:libloading\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"libloading\",\n    actual = \"@crate_index__libloading-0.8.3//:libloading\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"log-0.4.20\",\n    actual = \"@crate_index__log-0.4.20//:log\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"log\",\n    actual = \"@crate_index__log-0.4.20//:log\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mdbook-0.4.34\",\n    actual = \"@crate_index__mdbook-0.4.34//:mdbook\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mdbook\",\n    actual = \"@crate_index__mdbook-0.4.34//:mdbook\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"memchr-2.6.4\",\n    actual = \"@crate_index__memchr-2.6.4//:memchr\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"memchr\",\n    actual = \"@crate_index__memchr-2.6.4//:memchr\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"memoffset-0.9.0\",\n    actual = \"@crate_index__memoffset-0.9.0//:memoffset\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"memoffset\",\n    actual = \"@crate_index__memoffset-0.9.0//:memoffset\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mio-0.8.8\",\n    actual = \"@crate_index__mio-0.8.8//:mio\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mio\",\n    actual = \"@crate_index__mio-0.8.8//:mio\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mio-signals-0.2.0\",\n    actual = \"@crate_index__mio-signals-0.2.0//:mio_signals\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"mio-signals\",\n    actual = \"@crate_index__mio-signals-0.2.0//:mio_signals\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num-bigint-dig-0.8.4\",\n    actual = \"@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num-bigint-dig\",\n    actual = \"@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num-traits-0.2.17\",\n    actual = \"@crate_index__num-traits-0.2.17//:num_traits\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num-traits\",\n    actual = \"@crate_index__num-traits-0.2.17//:num_traits\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num_enum-0.7.0\",\n    actual = \"@crate_index__num_enum-0.7.0//:num_enum\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"num_enum\",\n    actual = \"@crate_index__num_enum-0.7.0//:num_enum\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"object-0.36.7\",\n    actual = \"@crate_index__object-0.36.7//:object\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"object\",\n    actual = \"@crate_index__object-0.36.7//:object\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"once_cell-1.18.0\",\n    actual = \"@crate_index__once_cell-1.18.0//:once_cell\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"once_cell\",\n    actual = \"@crate_index__once_cell-1.18.0//:once_cell\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"openssl-0.10.64\",\n    actual = \"@crate_index__openssl-0.10.64//:openssl\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"openssl\",\n    actual = \"@crate_index__openssl-0.10.64//:openssl\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"openssl-sys-0.9.102\",\n    actual = \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"openssl-sys\",\n    actual = \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"p256-0.13.2\",\n    actual = \"@crate_index__p256-0.13.2//:p256\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"p256\",\n    actual = \"@crate_index__p256-0.13.2//:p256\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"p384-0.13.0\",\n    actual = \"@crate_index__p384-0.13.0//:p384\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"p384\",\n    actual = \"@crate_index__p384-0.13.0//:p384\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"paste-1.0.14\",\n    actual = \"@crate_index__paste-1.0.14//:paste\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"paste\",\n    actual = \"@crate_index__paste-1.0.14//:paste\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pem-rfc7468-0.7.0\",\n    actual = \"@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pem-rfc7468\",\n    actual = \"@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pest-2.7.3\",\n    actual = \"@crate_index__pest-2.7.3//:pest\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pest\",\n    actual = \"@crate_index__pest-2.7.3//:pest\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pest_derive-2.7.3\",\n    actual = \"@crate_index__pest_derive-2.7.3//:pest_derive\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"pest_derive\",\n    actual = \"@crate_index__pest_derive-2.7.3//:pest_derive\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"proc-macro2-1.0.95\",\n    actual = \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"proc-macro2\",\n    actual = \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"quote-1.0.40\",\n    actual = \"@crate_index__quote-1.0.40//:quote\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"quote\",\n    actual = \"@crate_index__quote-1.0.40//:quote\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rand-0.8.5\",\n    actual = \"@crate_index__rand-0.8.5//:rand\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rand\",\n    actual = \"@crate_index__rand-0.8.5//:rand\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rand_chacha-0.3.1\",\n    actual = \"@crate_index__rand_chacha-0.3.1//:rand_chacha\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rand_chacha\",\n    actual = \"@crate_index__rand_chacha-0.3.1//:rand_chacha\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"regex-1.9.4\",\n    actual = \"@crate_index__regex-1.9.4//:regex\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"regex\",\n    actual = \"@crate_index__regex-1.9.4//:regex\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"reqwest-0.12.12\",\n    actual = \"@crate_index__reqwest-0.12.12//:reqwest\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"reqwest\",\n    actual = \"@crate_index__reqwest-0.12.12//:reqwest\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ring-0.16.20\",\n    actual = \"@crate_index__ring-0.16.20//:ring\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ring\",\n    actual = \"@crate_index__ring-0.16.20//:ring\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rsa-0.9.2\",\n    actual = \"@crate_index__rsa-0.9.2//:rsa\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rsa\",\n    actual = \"@crate_index__rsa-0.9.2//:rsa\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rsa-der-0.3.0\",\n    actual = \"@crate_index__rsa-der-0.3.0//:rsa_der\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rsa-der\",\n    actual = \"@crate_index__rsa-der-0.3.0//:rsa_der\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rusb-0.9.4\",\n    actual = \"@crate_index__rusb-0.9.4//:rusb\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rusb\",\n    actual = \"@crate_index__rusb-0.9.4//:rusb\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rust-crypto-0.2.36\",\n    actual = \"@crate_index__rust-crypto-0.2.36//:crypto\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rust-crypto\",\n    actual = \"@crate_index__rust-crypto-0.2.36//:crypto\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rustix-0.38.10\",\n    actual = \"@crate_index__rustix-0.38.10//:rustix\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"rustix\",\n    actual = \"@crate_index__rustix-0.38.10//:rustix\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"scopeguard-1.2.0\",\n    actual = \"@crate_index__scopeguard-1.2.0//:scopeguard\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"scopeguard\",\n    actual = \"@crate_index__scopeguard-1.2.0//:scopeguard\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"secrecy-0.8.0\",\n    actual = \"@crate_index__secrecy-0.8.0//:secrecy\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"secrecy\",\n    actual = \"@crate_index__secrecy-0.8.0//:secrecy\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde-1.0.219\",\n    actual = \"@crate_index__serde-1.0.219//:serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde\",\n    actual = \"@crate_index__serde-1.0.219//:serde\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_bytes-0.11.12\",\n    actual = \"@crate_index__serde_bytes-0.11.12//:serde_bytes\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_bytes\",\n    actual = \"@crate_index__serde_bytes-0.11.12//:serde_bytes\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_json-1.0.107\",\n    actual = \"@crate_index__serde_json-1.0.107//:serde_json\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_json\",\n    actual = \"@crate_index__serde_json-1.0.107//:serde_json\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_with-3.4.0\",\n    actual = \"@crate_index__serde_with-3.4.0//:serde_with\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serde_with\",\n    actual = \"@crate_index__serde_with-3.4.0//:serde_with\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serialport-4.2.2\",\n    actual = \"@crate_index__serialport-4.2.2//:serialport\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"serialport\",\n    actual = \"@crate_index__serialport-4.2.2//:serialport\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"sha2-0.10.7\",\n    actual = \"@crate_index__sha2-0.10.7//:sha2\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"sha2\",\n    actual = \"@crate_index__sha2-0.10.7//:sha2\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"sha3-0.10.8\",\n    actual = \"@crate_index__sha3-0.10.8//:sha3\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"sha3\",\n    actual = \"@crate_index__sha3-0.10.8//:sha3\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"shellwords-1.1.0\",\n    actual = \"@crate_index__shellwords-1.1.0//:shellwords\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"shellwords\",\n    actual = \"@crate_index__shellwords-1.1.0//:shellwords\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"strum-0.25.0\",\n    actual = \"@crate_index__strum-0.25.0//:strum\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"strum\",\n    actual = \"@crate_index__strum-0.25.0//:strum\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"syn-2.0.101\",\n    actual = \"@crate_index__syn-2.0.101//:syn\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"syn\",\n    actual = \"@crate_index__syn-2.0.101//:syn\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tar-0.4.40\",\n    actual = \"@crate_index__tar-0.4.40//:tar\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tar\",\n    actual = \"@crate_index__tar-0.4.40//:tar\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tempfile-3.8.0\",\n    actual = \"@crate_index__tempfile-3.8.0//:tempfile\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tempfile\",\n    actual = \"@crate_index__tempfile-3.8.0//:tempfile\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"thiserror-1.0.49\",\n    actual = \"@crate_index__thiserror-1.0.49//:thiserror\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"thiserror\",\n    actual = \"@crate_index__thiserror-1.0.49//:thiserror\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tiny-keccak-2.0.2\",\n    actual = \"@crate_index__tiny-keccak-2.0.2//:tiny_keccak\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"tiny-keccak\",\n    actual = \"@crate_index__tiny-keccak-2.0.2//:tiny_keccak\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"typetag-0.2.20\",\n    actual = \"@crate_index__typetag-0.2.20//:typetag\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"typetag\",\n    actual = \"@crate_index__typetag-0.2.20//:typetag\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"x509-cert-0.2.5\",\n    actual = \"@crate_index__x509-cert-0.2.5//:x509_cert\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"x509-cert\",\n    actual = \"@crate_index__x509-cert-0.2.5//:x509_cert\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"zerocopy-0.8.27\",\n    actual = \"@crate_index__zerocopy-0.8.27//:zerocopy\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"zerocopy\",\n    actual = \"@crate_index__zerocopy-0.8.27//:zerocopy\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"zeroize-1.8.1\",\n    actual = \"@crate_index__zeroize-1.8.1//:zeroize\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"zeroize\",\n    actual = \"@crate_index__zeroize-1.8.1//:zeroize\",\n    tags = [\"manual\"],\n)\n\n# Binaries\nalias(\n    name = \"mdbook__mdbook\",\n    actual = \"@crate_index__mdbook-0.4.34//:mdbook__bin\",\n    tags = [\"manual\"],\n)\n",
+                "alias_rules.bzl": "\"\"\"Alias that transitions its target to `compilation_mode=opt`.  Use `transition_alias=\"opt\"` to enable.\"\"\"\n\nload(\"@rules_cc//cc:defs.bzl\", \"CcInfo\")\nload(\"@rules_rust//rust:rust_common.bzl\", \"COMMON_PROVIDERS\")\n\ndef _transition_alias_impl(ctx):\n    # `ctx.attr.actual` is a list of 1 item due to the transition\n    providers = [ctx.attr.actual[0][provider] for provider in COMMON_PROVIDERS]\n    if CcInfo in ctx.attr.actual[0]:\n        providers.append(ctx.attr.actual[0][CcInfo])\n    return providers\n\ndef _change_compilation_mode(compilation_mode):\n    def _change_compilation_mode_impl(_settings, _attr):\n        return {\n            \"//command_line_option:compilation_mode\": compilation_mode,\n        }\n\n    return transition(\n        implementation = _change_compilation_mode_impl,\n        inputs = [],\n        outputs = [\n            \"//command_line_option:compilation_mode\",\n        ],\n    )\n\ndef _transition_alias_rule(compilation_mode):\n    return rule(\n        implementation = _transition_alias_impl,\n        provides = COMMON_PROVIDERS,\n        attrs = {\n            \"actual\": attr.label(\n                mandatory = True,\n                doc = \"`rust_library()` target to transition to `compilation_mode=opt`.\",\n                providers = COMMON_PROVIDERS,\n                cfg = _change_compilation_mode(compilation_mode),\n            ),\n            \"_allowlist_function_transition\": attr.label(\n                default = \"@bazel_tools//tools/allowlists/function_transition_allowlist\",\n            ),\n        },\n        doc = \"Transitions a Rust library crate to the `compilation_mode=opt`.\",\n    )\n\ntransition_alias_dbg = _transition_alias_rule(\"dbg\")\ntransition_alias_fastbuild = _transition_alias_rule(\"fastbuild\")\ntransition_alias_opt = _transition_alias_rule(\"opt\")\n",
+                "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"new_git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n    \"\"\"Flatten a list of dependency maps into one dictionary.\n\n    Dependency maps have the following structure:\n\n    ```python\n    DEPENDENCIES_MAP = {\n        # The first key in the map is a Bazel package\n        # name of the workspace this file is defined in.\n        \"workspace_member_package\": {\n\n            # Not all dependencies are supported for all platforms.\n            # the condition key is the condition required to be true\n            # on the host platform.\n            \"condition\": {\n\n                # An alias to a crate target.     # The label of the crate target the\n                # Aliases are only crate names.   # package name refers to.\n                \"package_name\":                   \"@full//:label\",\n            }\n        }\n    }\n    ```\n\n    Args:\n        all_dependency_maps (list): A list of dicts as described above\n\n    Returns:\n        dict: A dictionary as described above\n    \"\"\"\n    dependencies = {}\n\n    for workspace_deps_map in all_dependency_maps:\n        for pkg_name, conditional_deps_map in workspace_deps_map.items():\n            if pkg_name not in dependencies:\n                non_frozen_map = dict()\n                for key, values in conditional_deps_map.items():\n                    non_frozen_map.update({key: dict(values.items())})\n                dependencies.setdefault(pkg_name, non_frozen_map)\n                continue\n\n            for condition, deps_map in conditional_deps_map.items():\n                # If the condition has not been recorded, do so and continue\n                if condition not in dependencies[pkg_name]:\n                    dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n                    continue\n\n                # Alert on any miss-matched dependencies\n                inconsistent_entries = []\n                for crate_name, crate_label in deps_map.items():\n                    existing = dependencies[pkg_name][condition].get(crate_name)\n                    if existing and existing != crate_label:\n                        inconsistent_entries.append((crate_name, existing, crate_label))\n                    dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n    return dependencies\n\ndef crate_deps(deps, package_name = None):\n    \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n    Args:\n        deps (list): The desired list of crate targets.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()`.\n\n    Returns:\n        list: A list of labels to generated rust targets (str)\n    \"\"\"\n\n    if not deps:\n        return []\n\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Join both sets of dependencies\n    dependencies = _flatten_dependency_maps([\n        _NORMAL_DEPENDENCIES,\n        _NORMAL_DEV_DEPENDENCIES,\n        _PROC_MACRO_DEPENDENCIES,\n        _PROC_MACRO_DEV_DEPENDENCIES,\n        _BUILD_DEPENDENCIES,\n        _BUILD_PROC_MACRO_DEPENDENCIES,\n    ]).pop(package_name, {})\n\n    # Combine all conditional packages so we can easily index over a flat list\n    # TODO: Perhaps this should actually return select statements and maintain\n    # the conditionals of the dependencies\n    flat_deps = {}\n    for deps_set in dependencies.values():\n        for crate_name, crate_label in deps_set.items():\n            flat_deps.update({crate_name: crate_label})\n\n    missing_crates = []\n    crate_targets = []\n    for crate_target in deps:\n        if crate_target not in flat_deps:\n            missing_crates.append(crate_target)\n        else:\n            crate_targets.append(flat_deps[crate_target])\n\n    if missing_crates:\n        fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n            missing_crates,\n            package_name,\n            dependencies,\n        ))\n\n    return crate_targets\n\ndef all_crate_deps(\n        normal = False, \n        normal_dev = False, \n        proc_macro = False, \n        proc_macro_dev = False,\n        build = False,\n        build_proc_macro = False,\n        package_name = None):\n    \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n    for the package where this macro is called.\n\n    If no parameters are set, all normal dependencies are returned. Setting any one flag will\n    otherwise impact the contents of the returned list.\n\n    Args:\n        normal (bool, optional): If True, normal dependencies are included in the\n            output list.\n        normal_dev (bool, optional): If True, normal dev dependencies will be\n            included in the output list..\n        proc_macro (bool, optional): If True, proc_macro dependencies are included\n            in the output list.\n        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n            included in the output list.\n        build (bool, optional): If True, build dependencies are included\n            in the output list.\n        build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n            included in the output list.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()` when unset.\n\n    Returns:\n        list: A list of labels to generated rust targets (str)\n    \"\"\"\n\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Determine the relevant maps to use\n    all_dependency_maps = []\n    if normal:\n        all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n    if normal_dev:\n        all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n    if proc_macro:\n        all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n    if proc_macro_dev:\n        all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n    if build:\n        all_dependency_maps.append(_BUILD_DEPENDENCIES)\n    if build_proc_macro:\n        all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n    # Default to always using normal dependencies\n    if not all_dependency_maps:\n        all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n    dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n    if not dependencies:\n        if dependencies == None:\n            fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n        else:\n            return []\n\n    crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n    for condition, deps in dependencies.items():\n        crate_deps += selects.with_or({\n            tuple(_CONDITIONS[condition]): deps.values(),\n            \"//conditions:default\": [],\n        })\n\n    return crate_deps\n\ndef aliases(\n        normal = False,\n        normal_dev = False,\n        proc_macro = False,\n        proc_macro_dev = False,\n        build = False,\n        build_proc_macro = False,\n        package_name = None):\n    \"\"\"Produces a map of Crate alias names to their original label\n\n    If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n    Setting any one flag will otherwise determine the contents of the returned dict.\n\n    Args:\n        normal (bool, optional): If True, normal dependencies are included in the\n            output list.\n        normal_dev (bool, optional): If True, normal dev dependencies will be\n            included in the output list..\n        proc_macro (bool, optional): If True, proc_macro dependencies are included\n            in the output list.\n        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n            included in the output list.\n        build (bool, optional): If True, build dependencies are included\n            in the output list.\n        build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n            included in the output list.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()` when unset.\n\n    Returns:\n        dict: The aliases of all associated packages\n    \"\"\"\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Determine the relevant maps to use\n    all_aliases_maps = []\n    if normal:\n        all_aliases_maps.append(_NORMAL_ALIASES)\n    if normal_dev:\n        all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n    if proc_macro:\n        all_aliases_maps.append(_PROC_MACRO_ALIASES)\n    if proc_macro_dev:\n        all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n    if build:\n        all_aliases_maps.append(_BUILD_ALIASES)\n    if build_proc_macro:\n        all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n    # Default to always using normal aliases\n    if not all_aliases_maps:\n        all_aliases_maps.append(_NORMAL_ALIASES)\n        all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n    aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n    if not aliases:\n        return dict()\n\n    common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n    # If there are only common items in the dictionary, immediately return them\n    if not len(aliases.keys()) == 1:\n        return dict(common_items)\n\n    # Build a single select statement where each conditional has accounted for the\n    # common set of aliases.\n    crate_aliases = {\"//conditions:default\": dict(common_items)}\n    for condition, deps in aliases.items():\n        condition_triples = _CONDITIONS[condition]\n        for triple in condition_triples:\n            if triple in crate_aliases:\n                crate_aliases[triple].update(deps)\n            else:\n                crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n    return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n    \"third_party/rust\": {\n        _COMMON_CONDITION: {\n            \"aes\": Label(\"@crate_index//:aes-0.8.3\"),\n            \"anstyle\": Label(\"@crate_index//:anstyle-1.0.4\"),\n            \"anyhow\": Label(\"@crate_index//:anyhow-1.0.75\"),\n            \"arrayvec\": Label(\"@crate_index//:arrayvec-0.7.4\"),\n            \"asn1\": Label(\"@crate_index//:asn1-0.15.5\"),\n            \"base64\": Label(\"@crate_index//:base64-0.21.5\"),\n            \"base64ct\": Label(\"@crate_index//:base64ct-1.6.0\"),\n            \"bitflags\": Label(\"@crate_index//:bitflags-2.4.0\"),\n            \"bitvec\": Label(\"@crate_index//:bitvec-1.0.1\"),\n            \"byteorder\": Label(\"@crate_index//:byteorder-1.5.0\"),\n            \"chrono\": Label(\"@crate_index//:chrono-0.4.40\"),\n            \"ciborium\": Label(\"@crate_index//:ciborium-0.2.2\"),\n            \"clap\": Label(\"@crate_index//:clap-4.4.7\"),\n            \"clap-num\": Label(\"@crate_index//:clap-num-1.0.2\"),\n            \"const-oid\": Label(\"@crate_index//:const-oid-0.9.6\"),\n            \"coset\": Label(\"@crate_index//:coset-0.3.8\"),\n            \"crc\": Label(\"@crate_index//:crc-3.0.1\"),\n            \"cryptoki\": Label(\"@crate_index//:cryptoki-0.8.0\"),\n            \"cryptoki-sys\": Label(\"@crate_index//:cryptoki-sys-0.2.0\"),\n            \"der\": Label(\"@crate_index//:der-0.7.8\"),\n            \"deser-hjson\": Label(\"@crate_index//:deser-hjson-2.1.0\"),\n            \"directories\": Label(\"@crate_index//:directories-5.0.1\"),\n            \"ecdsa\": Label(\"@crate_index//:ecdsa-0.16.9\"),\n            \"elf\": Label(\"@crate_index//:elf-0.7.2\"),\n            \"elliptic-curve\": Label(\"@crate_index//:elliptic-curve-0.13.8\"),\n            \"embedded-hal\": Label(\"@crate_index//:embedded-hal-1.0.0\"),\n            \"env_logger\": Label(\"@crate_index//:env_logger-0.10.0\"),\n            \"erased-serde\": Label(\"@crate_index//:erased-serde-0.3.31\"),\n            \"foreign-types\": Label(\"@crate_index//:foreign-types-0.3.2\"),\n            \"ftdi\": Label(\"@crate_index//:ftdi-0.1.3\"),\n            \"ftdi-embedded-hal\": Label(\"@crate_index//:ftdi-embedded-hal-0.22.0\"),\n            \"ftdi-mpsse\": Label(\"@crate_index//:ftdi-mpsse-0.1.1\"),\n            \"heck\": Label(\"@crate_index//:heck-0.4.1\"),\n            \"hex\": Label(\"@crate_index//:hex-0.4.3\"),\n            \"hmac\": Label(\"@crate_index//:hmac-0.12.1\"),\n            \"humantime\": Label(\"@crate_index//:humantime-2.1.0\"),\n            \"humantime-serde\": Label(\"@crate_index//:humantime-serde-1.1.1\"),\n            \"indexmap\": Label(\"@crate_index//:indexmap-2.0.0\"),\n            \"indicatif\": Label(\"@crate_index//:indicatif-0.17.6\"),\n            \"inventory\": Label(\"@crate_index//:inventory-0.3.17\"),\n            \"itertools\": Label(\"@crate_index//:itertools-0.13.0\"),\n            \"libloading\": Label(\"@crate_index//:libloading-0.8.3\"),\n            \"log\": Label(\"@crate_index//:log-0.4.20\"),\n            \"mdbook\": Label(\"@crate_index//:mdbook-0.4.34\"),\n            \"memchr\": Label(\"@crate_index//:memchr-2.6.4\"),\n            \"memoffset\": Label(\"@crate_index//:memoffset-0.9.0\"),\n            \"mio\": Label(\"@crate_index//:mio-0.8.8\"),\n            \"mio-signals\": Label(\"@crate_index//:mio-signals-0.2.0\"),\n            \"num-bigint-dig\": Label(\"@crate_index//:num-bigint-dig-0.8.4\"),\n            \"num-traits\": Label(\"@crate_index//:num-traits-0.2.17\"),\n            \"num_enum\": Label(\"@crate_index//:num_enum-0.7.0\"),\n            \"object\": Label(\"@crate_index//:object-0.36.7\"),\n            \"once_cell\": Label(\"@crate_index//:once_cell-1.18.0\"),\n            \"openssl\": Label(\"@crate_index//:openssl-0.10.64\"),\n            \"openssl-sys\": Label(\"@crate_index//:openssl-sys-0.9.102\"),\n            \"p256\": Label(\"@crate_index//:p256-0.13.2\"),\n            \"p384\": Label(\"@crate_index//:p384-0.13.0\"),\n            \"pem-rfc7468\": Label(\"@crate_index//:pem-rfc7468-0.7.0\"),\n            \"pest\": Label(\"@crate_index//:pest-2.7.3\"),\n            \"proc-macro2\": Label(\"@crate_index//:proc-macro2-1.0.95\"),\n            \"quote\": Label(\"@crate_index//:quote-1.0.40\"),\n            \"rand\": Label(\"@crate_index//:rand-0.8.5\"),\n            \"rand_chacha\": Label(\"@crate_index//:rand_chacha-0.3.1\"),\n            \"regex\": Label(\"@crate_index//:regex-1.9.4\"),\n            \"reqwest\": Label(\"@crate_index//:reqwest-0.12.12\"),\n            \"ring\": Label(\"@crate_index//:ring-0.16.20\"),\n            \"rsa\": Label(\"@crate_index//:rsa-0.9.2\"),\n            \"rsa-der\": Label(\"@crate_index//:rsa-der-0.3.0\"),\n            \"rusb\": Label(\"@crate_index//:rusb-0.9.4\"),\n            \"rust-crypto\": Label(\"@crate_index//:rust-crypto-0.2.36\"),\n            \"rustix\": Label(\"@crate_index//:rustix-0.38.10\"),\n            \"scopeguard\": Label(\"@crate_index//:scopeguard-1.2.0\"),\n            \"secrecy\": Label(\"@crate_index//:secrecy-0.8.0\"),\n            \"serde\": Label(\"@crate_index//:serde-1.0.219\"),\n            \"serde_bytes\": Label(\"@crate_index//:serde_bytes-0.11.12\"),\n            \"serde_json\": Label(\"@crate_index//:serde_json-1.0.107\"),\n            \"serde_with\": Label(\"@crate_index//:serde_with-3.4.0\"),\n            \"serialport\": Label(\"@crate_index//:serialport-4.2.2\"),\n            \"sha2\": Label(\"@crate_index//:sha2-0.10.7\"),\n            \"sha3\": Label(\"@crate_index//:sha3-0.10.8\"),\n            \"shellwords\": Label(\"@crate_index//:shellwords-1.1.0\"),\n            \"strum\": Label(\"@crate_index//:strum-0.25.0\"),\n            \"syn\": Label(\"@crate_index//:syn-2.0.101\"),\n            \"tar\": Label(\"@crate_index//:tar-0.4.40\"),\n            \"tempfile\": Label(\"@crate_index//:tempfile-3.8.0\"),\n            \"thiserror\": Label(\"@crate_index//:thiserror-1.0.49\"),\n            \"tiny-keccak\": Label(\"@crate_index//:tiny-keccak-2.0.2\"),\n            \"typetag\": Label(\"@crate_index//:typetag-0.2.20\"),\n            \"x509-cert\": Label(\"@crate_index//:x509-cert-0.2.5\"),\n            \"zerocopy\": Label(\"@crate_index//:zerocopy-0.8.27\"),\n            \"zeroize\": Label(\"@crate_index//:zeroize-1.8.1\"),\n        },\n    },\n}\n\n\n_NORMAL_ALIASES = {\n    \"third_party/rust\": {\n        _COMMON_CONDITION: {\n        },\n    },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n    \"third_party/rust\": {\n        _COMMON_CONDITION: {\n            \"paste\": Label(\"@crate_index//:paste-1.0.14\"),\n            \"pest_derive\": Label(\"@crate_index//:pest_derive-2.7.3\"),\n        },\n    },\n}\n\n\n_PROC_MACRO_ALIASES = {\n    \"third_party/rust\": {\n        _COMMON_CONDITION: {\n        },\n    },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n    \"third_party/rust\": {\n        _COMMON_CONDITION: {\n            \"indoc\": Label(\"@crate_index//:indoc-2.0.4\"),\n        },\n    },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_BUILD_DEPENDENCIES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_BUILD_ALIASES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n    \"third_party/rust\": {\n    },\n}\n\n\n_CONDITIONS = {\n    \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"aarch64-linux-android\": [],\n    \"aarch64-pc-windows-gnullvm\": [],\n    \"aarch64-pc-windows-msvc\": [],\n    \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"aarch64-uwp-windows-msvc\": [],\n    \"cfg(all(any(target_arch = \\\"x86_64\\\", target_arch = \\\"arm64ec\\\"), target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"cfg(all(any(target_os = \\\"android\\\", target_os = \\\"linux\\\"), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", target_endian = \\\"little\\\", any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [],\n    \"cfg(all(any(target_os = \\\"android\\\", target_os = \\\"linux\\\"), any(target_arch = \\\"aarch64\\\", target_arch = \\\"arm\\\")))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"cfg(all(not(rustix_use_libc), not(miri), target_os = \\\"linux\\\", target_endian = \\\"little\\\", any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \\\"linux\\\", target_endian = \\\"little\\\", any(target_arch = \\\"arm\\\", all(target_arch = \\\"aarch64\\\", target_pointer_width = \\\"64\\\"), target_arch = \\\"riscv64\\\", all(rustix_use_experimental_asm, target_arch = \\\"powerpc64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips32r6\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64\\\"), all(rustix_use_experimental_asm, target_arch = \\\"mips64r6\\\"), target_arch = \\\"x86\\\", all(target_arch = \\\"x86_64\\\", target_pointer_width = \\\"64\\\")))))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"windows\\\"))\": [],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(all(target_arch = \\\"wasm32\\\", target_vendor = \\\"unknown\\\", target_os = \\\"unknown\\\", target_env = \\\"\\\"))\": [\"@rules_rust//rust/platform:wasm32-unknown-unknown\"],\n    \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [],\n    \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"gnu\\\", not(windows_raw_dylib)))\": [],\n    \"cfg(all(target_arch = \\\"x86\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [],\n    \"cfg(all(target_arch = \\\"x86_64\\\", target_env = \\\"gnu\\\", not(target_abi = \\\"llvm\\\"), not(windows_raw_dylib)))\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(all(target_arch = \\\"x86_64\\\", target_env = \\\"msvc\\\", not(windows_raw_dylib)))\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"cfg(all(windows, target_env = \\\"msvc\\\"))\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"arm\\\", target_arch = \\\"x86\\\", target_arch = \\\"x86_64\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(any(target_arch = \\\"x86\\\", target_arch = \\\"x86_64\\\", all(any(target_arch = \\\"aarch64\\\", target_arch = \\\"arm\\\"), any(target_os = \\\"android\\\", target_os = \\\"fuchsia\\\", target_os = \\\"linux\\\"))))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(any(target_os = \\\"android\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(any(target_os = \\\"dragonfly\\\", target_os = \\\"freebsd\\\", target_os = \\\"illumos\\\", target_os = \\\"netbsd\\\", target_os = \\\"openbsd\\\", target_os = \\\"solaris\\\"))\": [],\n    \"cfg(any(target_os = \\\"ios\\\", target_os = \\\"macos\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(any(target_os = \\\"macos\\\", target_os = \\\"ios\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(any(unix, target_os = \\\"wasi\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(all(windows, target_env = \\\"msvc\\\")))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(all(windows, target_env = \\\"msvc\\\", not(target_vendor = \\\"uwp\\\"))))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(any(target_os = \\\"windows\\\", target_vendor = \\\"apple\\\")))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(any(windows, target_os = \\\"hermit\\\", target_os = \\\"unknown\\\")))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(target_arch = \\\"wasm32\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(windows))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(not(windows_raw_dylib))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(target_arch = \\\"aarch64\\\")\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"cfg(target_arch = \\\"spirv\\\")\": [],\n    \"cfg(target_arch = \\\"wasm32\\\")\": [\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"cfg(target_env = \\\"sgx\\\")\": [],\n    \"cfg(target_family = \\\"wasm\\\")\": [\"@rules_rust//rust/platform:wasm32-unknown-unknown\",\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"cfg(target_feature = \\\"atomics\\\")\": [],\n    \"cfg(target_os = \\\"android\\\")\": [],\n    \"cfg(target_os = \\\"fuchsia\\\")\": [],\n    \"cfg(target_os = \\\"haiku\\\")\": [],\n    \"cfg(target_os = \\\"hermit\\\")\": [],\n    \"cfg(target_os = \\\"linux\\\")\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(target_os = \\\"macos\\\")\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(target_os = \\\"redox\\\")\": [],\n    \"cfg(target_os = \\\"wasi\\\")\": [\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"cfg(target_os = \\\"windows\\\")\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"cfg(target_vendor = \\\"apple\\\")\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(tokio_taskdump)\": [],\n    \"cfg(unix)\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"cfg(windows)\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"i686-pc-windows-gnu\": [],\n    \"i686-pc-windows-gnullvm\": [],\n    \"i686-pc-windows-msvc\": [],\n    \"i686-uwp-windows-gnu\": [],\n    \"i686-uwp-windows-msvc\": [],\n    \"wasm32-unknown-unknown\": [\"@rules_rust//rust/platform:wasm32-unknown-unknown\"],\n    \"wasm32-wasip1\": [\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"x86_64-pc-windows-gnu\": [],\n    \"x86_64-pc-windows-gnullvm\": [],\n    \"x86_64-pc-windows-msvc\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"x86_64-unknown-nixos-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"x86_64-uwp-windows-gnu\": [],\n    \"x86_64-uwp-windows-msvc\": [],\n}\n\n###############################################################################\n\ndef crate_repositories():\n    \"\"\"A macro for defining repositories for all generated crates.\n\n    Returns:\n      A list of repos visible to the module through the module extension.\n    \"\"\"\n    maybe(\n        http_archive,\n        name = \"crate_index__CoreFoundation-sys-0.1.4\",\n        sha256 = \"d0e9889e6db118d49d88d84728d0e964d973a5680befb5f85f55141beea5c20b\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/CoreFoundation-sys/0.1.4/download\"],\n        strip_prefix = \"CoreFoundation-sys-0.1.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.CoreFoundation-sys-0.1.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__IOKit-sys-0.1.5\",\n        sha256 = \"99696c398cbaf669d2368076bdb3d627fb0ce51a26899d7c61228c5c0af3bf4a\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/IOKit-sys/0.1.5/download\"],\n        strip_prefix = \"IOKit-sys-0.1.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.IOKit-sys-0.1.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__addr2line-0.21.0\",\n        sha256 = \"8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/addr2line/0.21.0/download\"],\n        strip_prefix = \"addr2line-0.21.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.addr2line-0.21.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__adler-1.0.2\",\n        sha256 = \"f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/adler/1.0.2/download\"],\n        strip_prefix = \"adler-1.0.2\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.adler-1.0.2.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__aes-0.8.3\",\n        sha256 = \"ac1f845298e95f983ff1944b728ae08b8cebab80d684f0a832ed0fc74dfa27e2\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/aes/0.8.3/download\"],\n        strip_prefix = \"aes-0.8.3\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.aes-0.8.3.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__aho-corasick-1.0.5\",\n        sha256 = \"0c378d78423fdad8089616f827526ee33c19f2fddbd5de1629152c9593ba4783\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/aho-corasick/1.0.5/download\"],\n        strip_prefix = \"aho-corasick-1.0.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.aho-corasick-1.0.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__ammonia-3.3.0\",\n        sha256 = \"64e6d1c7838db705c9b756557ee27c384ce695a1c51a6fe528784cb1c6840170\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/ammonia/3.3.0/download\"],\n        strip_prefix = \"ammonia-3.3.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.ammonia-3.3.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__android-tzdata-0.1.1\",\n        sha256 = \"e999941b234f3131b00bc13c22d06e8c5ff726d1b6318ac7eb276997bbb4fef0\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/android-tzdata/0.1.1/download\"],\n        strip_prefix = \"android-tzdata-0.1.1\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.android-tzdata-0.1.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__android_system_properties-0.1.5\",\n        sha256 = \"819e7219dbd41043ac279b19830f2efc897156490d7fd6ea916720117ee66311\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/android_system_properties/0.1.5/download\"],\n        strip_prefix = \"android_system_properties-0.1.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.android_system_properties-0.1.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anstream-0.6.4\",\n        sha256 = \"2ab91ebe16eb252986481c5b62f6098f3b698a45e34b5b98200cf20dd2484a44\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anstream/0.6.4/download\"],\n        strip_prefix = \"anstream-0.6.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anstream-0.6.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anstyle-1.0.4\",\n        sha256 = \"7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anstyle/1.0.4/download\"],\n        strip_prefix = \"anstyle-1.0.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anstyle-1.0.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anstyle-parse-0.2.2\",\n        sha256 = \"317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anstyle-parse/0.2.2/download\"],\n        strip_prefix = \"anstyle-parse-0.2.2\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anstyle-parse-0.2.2.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anstyle-query-1.0.0\",\n        sha256 = \"5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anstyle-query/1.0.0/download\"],\n        strip_prefix = \"anstyle-query-1.0.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anstyle-query-1.0.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anstyle-wincon-3.0.1\",\n        sha256 = \"f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anstyle-wincon/3.0.1/download\"],\n        strip_prefix = \"anstyle-wincon-3.0.1\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anstyle-wincon-3.0.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__anyhow-1.0.75\",\n        sha256 = \"a4668cab20f66d8d020e1fbc0ebe47217433c1b6c8f2040faf858554e394ace6\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/anyhow/1.0.75/download\"],\n        strip_prefix = \"anyhow-1.0.75\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.anyhow-1.0.75.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__arrayvec-0.7.4\",\n        sha256 = \"96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/arrayvec/0.7.4/download\"],\n        strip_prefix = \"arrayvec-0.7.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.arrayvec-0.7.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__asn1-0.15.5\",\n        sha256 = \"ae3ecbce89a22627b5e8e6e11d69715617138290289e385cde773b1fe50befdb\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/asn1/0.15.5/download\"],\n        strip_prefix = \"asn1-0.15.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.asn1-0.15.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__asn1_derive-0.15.5\",\n        sha256 = \"861af988fac460ac69a09f41e6217a8fb9178797b76fcc9478444be6a59be19c\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/asn1_derive/0.15.5/download\"],\n        strip_prefix = \"asn1_derive-0.15.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.asn1_derive-0.15.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__atomic-waker-1.1.2\",\n        sha256 = \"1505bd5d3d116872e7271a6d4e16d81d0c8570876c8de68093a09ac269d8aac0\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/atomic-waker/1.1.2/download\"],\n        strip_prefix = \"atomic-waker-1.1.2\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.atomic-waker-1.1.2.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__autocfg-1.1.0\",\n        sha256 = \"d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/autocfg/1.1.0/download\"],\n        strip_prefix = \"autocfg-1.1.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.autocfg-1.1.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__backtrace-0.3.69\",\n        sha256 = \"2089b7e3f35b9dd2d0ed921ead4f6d318c27680d4a5bd167b3ee120edb105837\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/backtrace/0.3.69/download\"],\n        strip_prefix = \"backtrace-0.3.69\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.backtrace-0.3.69.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__base16ct-0.2.0\",\n        sha256 = \"4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/base16ct/0.2.0/download\"],\n        strip_prefix = \"base16ct-0.2.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.base16ct-0.2.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__base64-0.21.5\",\n        sha256 = \"35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/base64/0.21.5/download\"],\n        strip_prefix = \"base64-0.21.5\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.base64-0.21.5.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__base64-0.22.1\",\n        sha256 = \"72b3254f16251a8381aa12e40e3c4d2f0199f8c6508fbecb9d91f575e0fbb8c6\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/base64/0.22.1/download\"],\n        strip_prefix = \"base64-0.22.1\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.base64-0.22.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__base64ct-1.6.0\",\n        sha256 = \"8c3c1a368f70d6cf7302d78f8f7093da241fb8e8807c05cc9e51a125895a6d5b\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/base64ct/1.6.0/download\"],\n        strip_prefix = \"base64ct-1.6.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.base64ct-1.6.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bitflags-1.3.2\",\n        sha256 = \"bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bitflags/1.3.2/download\"],\n        strip_prefix = \"bitflags-1.3.2\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bitflags-1.3.2.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bitflags-2.4.0\",\n        sha256 = \"b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bitflags/2.4.0/download\"],\n        strip_prefix = \"bitflags-2.4.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bitflags-2.4.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bitvec-1.0.1\",\n        sha256 = \"1bc2832c24239b0141d5674bb9174f9d68a8b5b3f2753311927c172ca46f7e9c\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bitvec/1.0.1/download\"],\n        strip_prefix = \"bitvec-1.0.1\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bitvec-1.0.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__block-buffer-0.10.4\",\n        sha256 = \"3078c7629b62d3f0439517fa394996acacc5cbc91c5a20d8c658e77abd503a71\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/block-buffer/0.10.4/download\"],\n        strip_prefix = \"block-buffer-0.10.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.block-buffer-0.10.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bstr-1.6.2\",\n        sha256 = \"4c2f7349907b712260e64b0afe2f84692af14a454be26187d9df565c7f69266a\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bstr/1.6.2/download\"],\n        strip_prefix = \"bstr-1.6.2\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bstr-1.6.2.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bumpalo-3.14.0\",\n        sha256 = \"7f30e7476521f6f8af1a1c4c0b8cc94f0bee37d91763d0ca2665f299b6cd8aec\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bumpalo/3.14.0/download\"],\n        strip_prefix = \"bumpalo-3.14.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bumpalo-3.14.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__byteorder-1.5.0\",\n        sha256 = \"1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/byteorder/1.5.0/download\"],\n        strip_prefix = \"byteorder-1.5.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.byteorder-1.5.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__bytes-1.9.0\",\n        sha256 = \"325918d6fe32f23b19878fe4b34794ae41fc19ddbe53b10571a4874d44ffd39b\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/bytes/1.9.0/download\"],\n        strip_prefix = \"bytes-1.9.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.bytes-1.9.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__cc-1.0.83\",\n        sha256 = \"f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/cc/1.0.83/download\"],\n        strip_prefix = \"cc-1.0.83\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.cc-1.0.83.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__cfg-if-1.0.0\",\n        sha256 = \"baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/cfg-if/1.0.0/download\"],\n        strip_prefix = \"cfg-if-1.0.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.cfg-if-1.0.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__chrono-0.4.40\",\n        sha256 = \"1a7964611d71df112cb1730f2ee67324fcf4d0fc6606acbbe9bfe06df124637c\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/chrono/0.4.40/download\"],\n        strip_prefix = \"chrono-0.4.40\",\n        build_file = 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)\n\n    maybe(\n        http_archive,\n        name = \"crate_index__rsa-der-0.3.0\",\n        sha256 = \"a19473b2de3164677ff38e4309c42448ba8d0fe5ad5fa722e7d278f991859aa6\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/rsa-der/0.3.0/download\"],\n        strip_prefix = \"rsa-der-0.3.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.rsa-der-0.3.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__rusb-0.9.4\",\n        sha256 = \"ab9f9ff05b63a786553a4c02943b74b34a988448671001e9a27e2f0565cc05a4\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/rusb/0.9.4/download\"],\n        strip_prefix = \"rusb-0.9.4\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.rusb-0.9.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__rust-crypto-0.2.36\",\n        sha256 = \"f76d05d3993fd5f4af9434e8e436db163a12a9d40e1a58a726f27a01dfd12a2a\",\n  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maybe(\n        http_archive,\n        name = \"crate_index__rustls-pemfile-2.2.0\",\n        sha256 = \"dce314e5fee3f39953d46bb63bb8a46d40c2f8fb7cc5a3b6cab2bde9721d6e50\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/rustls-pemfile/2.2.0/download\"],\n        strip_prefix = \"rustls-pemfile-2.2.0\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.rustls-pemfile-2.2.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__rustls-pki-types-1.10.1\",\n        sha256 = \"d2bf47e6ff922db3825eb750c4e2ff784c6ff8fb9e13046ef6a1d1c5401b0b37\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/rustls-pki-types/1.10.1/download\"],\n        strip_prefix = \"rustls-pki-types-1.10.1\",\n        build_file = Label(\"@crate_index//crate_index:BUILD.rustls-pki-types-1.10.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"crate_index__rustls-webpki-0.102.8\",\n        sha256 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+              ],
+              "strip_prefix": "CoreFoundation-sys-0.1.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"CoreFoundation_sys\",\n    deps = [\n        \"@crate_index__CoreFoundation-sys-0.1.4//:build_script_build\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__mach-0.1.2//:mach\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=CoreFoundation-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.4\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    links = \"CoreFoundation\",\n    pkg_name = \"CoreFoundation-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=CoreFoundation-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.4\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__IOKit-sys-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "99696c398cbaf669d2368076bdb3d627fb0ce51a26899d7c61228c5c0af3bf4a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/IOKit-sys/0.1.5/download"
+              ],
+              "strip_prefix": "IOKit-sys-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"IOKit_sys\",\n    deps = [\n        \"@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys\",\n        \"@crate_index__IOKit-sys-0.1.5//:build_script_build\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__mach-0.1.2//:mach\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=IOKit-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    link_deps = [\n        \"@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys\",\n    ],\n    edition = \"2015\",\n    links = \"IOKit\",\n    pkg_name = \"IOKit-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=IOKit-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__addr2line-0.21.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/addr2line/0.21.0/download"
+              ],
+              "strip_prefix": "addr2line-0.21.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"addr2line\",\n    deps = [\n        \"@crate_index__gimli-0.28.0//:gimli\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=addr2line\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.21.0\",\n)\n"
+            }
+          },
+          "crate_index__adler-1.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/adler/1.0.2/download"
+              ],
+              "strip_prefix": "adler-1.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"adler\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=adler\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.2\",\n)\n"
+            }
+          },
+          "crate_index__aes-0.8.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ac1f845298e95f983ff1944b728ae08b8cebab80d684f0a832ed0fc74dfa27e2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/aes/0.8.3/download"
+              ],
+              "strip_prefix": "aes-0.8.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"aes\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__cipher-0.4.4//:cipher\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=aes\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.3\",\n)\n"
+            }
+          },
+          "crate_index__aho-corasick-1.0.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0c378d78423fdad8089616f827526ee33c19f2fddbd5de1629152c9593ba4783",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/aho-corasick/1.0.5/download"
+              ],
+              "strip_prefix": "aho-corasick-1.0.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"aho_corasick\",\n    deps = [\n        \"@crate_index__memchr-2.6.4//:memchr\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"perf-literal\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=aho-corasick\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.5\",\n)\n"
+            }
+          },
+          "crate_index__ammonia-3.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "64e6d1c7838db705c9b756557ee27c384ce695a1c51a6fe528784cb1c6840170",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ammonia/3.3.0/download"
+              ],
+              "strip_prefix": "ammonia-3.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ammonia\",\n    deps = [\n        \"@crate_index__html5ever-0.26.0//:html5ever\",\n        \"@crate_index__maplit-1.0.2//:maplit\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__tendril-0.4.3//:tendril\",\n        \"@crate_index__url-2.4.1//:url\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ammonia\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.3.0\",\n)\n"
+            }
+          },
+          "crate_index__android-tzdata-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e999941b234f3131b00bc13c22d06e8c5ff726d1b6318ac7eb276997bbb4fef0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/android-tzdata/0.1.1/download"
+              ],
+              "strip_prefix": "android-tzdata-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"android_tzdata\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=android-tzdata\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__android_system_properties-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "819e7219dbd41043ac279b19830f2efc897156490d7fd6ea916720117ee66311",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/android_system_properties/0.1.5/download"
+              ],
+              "strip_prefix": "android_system_properties-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"android_system_properties\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=android_system_properties\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n"
+            }
+          },
+          "crate_index__anstream-0.6.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2ab91ebe16eb252986481c5b62f6098f3b698a45e34b5b98200cf20dd2484a44",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anstream/0.6.4/download"
+              ],
+              "strip_prefix": "anstream-0.6.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anstream\",\n    deps = [\n        \"@crate_index__anstyle-1.0.4//:anstyle\",\n        \"@crate_index__anstyle-parse-0.2.2//:anstyle_parse\",\n        \"@crate_index__anstyle-query-1.0.0//:anstyle_query\",\n        \"@crate_index__colorchoice-1.0.0//:colorchoice\",\n        \"@crate_index__utf8parse-0.2.1//:utf8parse\",\n    ] + select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__anstyle-wincon-3.0.1//:anstyle_wincon\",  # x86_64-pc-windows-msvc\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"auto\",\n        \"default\",\n        \"wincon\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anstream\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.4\",\n)\n"
+            }
+          },
+          "crate_index__anstyle-1.0.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anstyle/1.0.4/download"
+              ],
+              "strip_prefix": "anstyle-1.0.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anstyle\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anstyle\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.4\",\n)\n"
+            }
+          },
+          "crate_index__anstyle-parse-0.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anstyle-parse/0.2.2/download"
+              ],
+              "strip_prefix": "anstyle-parse-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anstyle_parse\",\n    deps = [\n        \"@crate_index__utf8parse-0.2.1//:utf8parse\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"utf8\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anstyle-parse\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n"
+            }
+          },
+          "crate_index__anstyle-query-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anstyle-query/1.0.0/download"
+              ],
+              "strip_prefix": "anstyle-query-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anstyle_query\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anstyle-query\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "crate_index__anstyle-wincon-3.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anstyle-wincon/3.0.1/download"
+              ],
+              "strip_prefix": "anstyle-wincon-3.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anstyle_wincon\",\n    deps = [\n        \"@crate_index__anstyle-1.0.4//:anstyle\",\n    ] + select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anstyle-wincon\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.0.1\",\n)\n"
+            }
+          },
+          "crate_index__anyhow-1.0.75": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a4668cab20f66d8d020e1fbc0ebe47217433c1b6c8f2040faf858554e394ace6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/anyhow/1.0.75/download"
+              ],
+              "strip_prefix": "anyhow-1.0.75",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"anyhow\",\n    deps = [\n        \"@crate_index__anyhow-1.0.75//:build_script_build\",\n        \"@crate_index__backtrace-0.3.69//:backtrace\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"backtrace\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anyhow\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.75\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"backtrace\",\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"anyhow\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=anyhow\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.75\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__arrayvec-0.7.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "96d30a06541fbafbc7f82ed10c06164cfbd2c401138f6addd8404629c4b16711",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/arrayvec/0.7.4/download"
+              ],
+              "strip_prefix": "arrayvec-0.7.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"arrayvec\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"serde\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=arrayvec\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.4\",\n)\n"
+            }
+          },
+          "crate_index__asn1-0.15.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ae3ecbce89a22627b5e8e6e11d69715617138290289e385cde773b1fe50befdb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/asn1/0.15.5/download"
+              ],
+              "strip_prefix": "asn1-0.15.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"asn1\",\n    proc_macro_deps = [\n        \"@crate_index__asn1_derive-0.15.5//:asn1_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=asn1\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.15.5\",\n)\n"
+            }
+          },
+          "crate_index__asn1_derive-0.15.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "861af988fac460ac69a09f41e6217a8fb9178797b76fcc9478444be6a59be19c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/asn1_derive/0.15.5/download"
+              ],
+              "strip_prefix": "asn1_derive-0.15.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"asn1_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=asn1_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.15.5\",\n)\n"
+            }
+          },
+          "crate_index__atomic-waker-1.1.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1505bd5d3d116872e7271a6d4e16d81d0c8570876c8de68093a09ac269d8aac0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/atomic-waker/1.1.2/download"
+              ],
+              "strip_prefix": "atomic-waker-1.1.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"atomic_waker\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=atomic-waker\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.2\",\n)\n"
+            }
+          },
+          "crate_index__autocfg-1.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/autocfg/1.1.0/download"
+              ],
+              "strip_prefix": "autocfg-1.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"autocfg\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=autocfg\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.0\",\n)\n"
+            }
+          },
+          "crate_index__backtrace-0.3.69": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2089b7e3f35b9dd2d0ed921ead4f6d318c27680d4a5bd167b3ee120edb105837",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/backtrace/0.3.69/download"
+              ],
+              "strip_prefix": "backtrace-0.3.69",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"backtrace\",\n    deps = [\n        \"@crate_index__backtrace-0.3.69//:build_script_build\",\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__rustc-demangle-0.1.23//:rustc_demangle\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__addr2line-0.21.0//:addr2line\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n            \"@crate_index__object-0.32.1//:object\",  # cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=backtrace\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.69\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"backtrace\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=backtrace\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.3.69\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__base16ct-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "4c7f02d4ea65f2c1853089ffd8d2787bdbc63de2f0d29dedbcf8ccdfa0ccd4cf",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/base16ct/0.2.0/download"
+              ],
+              "strip_prefix": "base16ct-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"base16ct\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=base16ct\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
+          },
+          "crate_index__base64-0.21.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/base64/0.21.5/download"
+              ],
+              "strip_prefix": "base64-0.21.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"base64\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=base64\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.21.5\",\n)\n"
+            }
+          },
+          "crate_index__base64-0.22.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "72b3254f16251a8381aa12e40e3c4d2f0199f8c6508fbecb9d91f575e0fbb8c6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/base64/0.22.1/download"
+              ],
+              "strip_prefix": "base64-0.22.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"base64\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=base64\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.22.1\",\n)\n"
+            }
+          },
+          "crate_index__base64ct-1.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8c3c1a368f70d6cf7302d78f8f7093da241fb8e8807c05cc9e51a125895a6d5b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/base64ct/1.6.0/download"
+              ],
+              "strip_prefix": "base64ct-1.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"base64ct\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=base64ct\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.6.0\",\n)\n"
+            }
+          },
+          "crate_index__bitflags-1.3.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bef38d45163c2f1dde094a7dfd33ccf595c92905c8f8f4fdc18d06fb1037718a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bitflags/1.3.2/download"
+              ],
+              "strip_prefix": "bitflags-1.3.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bitflags\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bitflags\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.3.2\",\n)\n"
+            }
+          },
+          "crate_index__bitflags-2.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b4682ae6287fcf752ecaabbfcc7b6f9b72aa33933dc23a554d853aea8eea8635",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bitflags/2.4.0/download"
+              ],
+              "strip_prefix": "bitflags-2.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bitflags\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"serde\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bitflags\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.4.0\",\n)\n"
+            }
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+          "crate_index__bitvec-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1bc2832c24239b0141d5674bb9174f9d68a8b5b3f2753311927c172ca46f7e9c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bitvec/1.0.1/download"
+              ],
+              "strip_prefix": "bitvec-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bitvec\",\n    deps = [\n        \"@crate_index__funty-2.0.0//:funty\",\n        \"@crate_index__radium-0.7.0//:radium\",\n        \"@crate_index__tap-1.0.1//:tap\",\n        \"@crate_index__wyz-0.5.1//:wyz\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"atomic\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bitvec\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__block-buffer-0.10.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3078c7629b62d3f0439517fa394996acacc5cbc91c5a20d8c658e77abd503a71",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/block-buffer/0.10.4/download"
+              ],
+              "strip_prefix": "block-buffer-0.10.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"block_buffer\",\n    deps = [\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=block-buffer\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.4\",\n)\n"
+            }
+          },
+          "crate_index__bstr-1.6.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "4c2f7349907b712260e64b0afe2f84692af14a454be26187d9df565c7f69266a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bstr/1.6.2/download"
+              ],
+              "strip_prefix": "bstr-1.6.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bstr\",\n    deps = [\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__regex-automata-0.3.7//:regex_automata\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n        \"unicode\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bstr\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.6.2\",\n)\n"
+            }
+          },
+          "crate_index__bumpalo-3.14.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7f30e7476521f6f8af1a1c4c0b8cc94f0bee37d91763d0ca2665f299b6cd8aec",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bumpalo/3.14.0/download"
+              ],
+              "strip_prefix": "bumpalo-3.14.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bumpalo\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bumpalo\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.14.0\",\n)\n"
+            }
+          },
+          "crate_index__byteorder-1.5.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/byteorder/1.5.0/download"
+              ],
+              "strip_prefix": "byteorder-1.5.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"byteorder\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=byteorder\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.5.0\",\n)\n"
+            }
+          },
+          "crate_index__bytes-1.9.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "325918d6fe32f23b19878fe4b34794ae41fc19ddbe53b10571a4874d44ffd39b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/bytes/1.9.0/download"
+              ],
+              "strip_prefix": "bytes-1.9.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"bytes\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=bytes\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.9.0\",\n)\n"
+            }
+          },
+          "crate_index__cc-1.0.83": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f1174fb0b6ec23863f8b971027804a42614e347eafb0a95bf0b12cdae21fc4d0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cc/1.0.83/download"
+              ],
+              "strip_prefix": "cc-1.0.83",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cc\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.83\",\n)\n"
+            }
+          },
+          "crate_index__cfg-if-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cfg-if/1.0.0/download"
+              ],
+              "strip_prefix": "cfg-if-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cfg_if\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cfg-if\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "crate_index__chrono-0.4.40": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1a7964611d71df112cb1730f2ee67324fcf4d0fc6606acbbe9bfe06df124637c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/chrono/0.4.40/download"
+              ],
+              "strip_prefix": "chrono-0.4.40",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"chrono\",\n    deps = [\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__iana-time-zone-0.1.58//:iana_time_zone\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__iana-time-zone-0.1.58//:iana_time_zone\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__js-sys-0.3.64//:js_sys\",  # wasm32-unknown-unknown\n            \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",  # wasm32-unknown-unknown\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-link-0.1.1//:windows_link\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__iana-time-zone-0.1.58//:iana_time_zone\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__iana-time-zone-0.1.58//:iana_time_zone\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"android-tzdata\",\n        \"clock\",\n        \"default\",\n        \"iana-time-zone\",\n        \"js-sys\",\n        \"now\",\n        \"oldtime\",\n        \"std\",\n        \"wasm-bindgen\",\n        \"wasmbind\",\n        \"winapi\",\n        \"windows-link\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=chrono\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.40\",\n)\n"
+            }
+          },
+          "crate_index__ciborium-0.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "42e69ffd6f0917f5c029256a24d0161db17cea3997d185db0d35926308770f0e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ciborium/0.2.2/download"
+              ],
+              "strip_prefix": "ciborium-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ciborium\",\n    deps = [\n        \"@crate_index__ciborium-io-0.2.2//:ciborium_io\",\n        \"@crate_index__ciborium-ll-0.2.2//:ciborium_ll\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ciborium\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n"
+            }
+          },
+          "crate_index__ciborium-io-0.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "05afea1e0a06c9be33d539b876f1ce3692f4afea2cb41f740e7743225ed1c757",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ciborium-io/0.2.2/download"
+              ],
+              "strip_prefix": "ciborium-io-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ciborium_io\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ciborium-io\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n"
+            }
+          },
+          "crate_index__ciborium-ll-0.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "57663b653d948a338bfb3eeba9bb2fd5fcfaecb9e199e87e1eda4d9e8b240fd9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ciborium-ll/0.2.2/download"
+              ],
+              "strip_prefix": "ciborium-ll-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ciborium_ll\",\n    deps = [\n        \"@crate_index__ciborium-io-0.2.2//:ciborium_io\",\n        \"@crate_index__half-2.6.0//:half\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ciborium-ll\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n"
+            }
+          },
+          "crate_index__cipher-0.4.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "773f3b9af64447d2ce9850330c473515014aa235e6a783b02db81ff39e4a3dad",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cipher/0.4.4/download"
+              ],
+              "strip_prefix": "cipher-0.4.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cipher\",\n    deps = [\n        \"@crate_index__crypto-common-0.1.6//:crypto_common\",\n        \"@crate_index__inout-0.1.3//:inout\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cipher\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.4\",\n)\n"
+            }
+          },
+          "crate_index__clap-4.4.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ac495e00dcec98c83465d5ad66c5c4fabd652fd6686e7c6269b117e729a6f17b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap/4.4.7/download"
+              ],
+              "strip_prefix": "clap-4.4.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"clap\",\n    deps = [\n        \"@crate_index__clap_builder-4.4.7//:clap_builder\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__clap_derive-4.4.7//:clap_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cargo\",\n        \"color\",\n        \"default\",\n        \"deprecated\",\n        \"derive\",\n        \"env\",\n        \"error-context\",\n        \"help\",\n        \"std\",\n        \"suggestions\",\n        \"usage\",\n        \"wrap_help\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.4.7\",\n)\n"
+            }
+          },
+          "crate_index__clap-num-1.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "488557e97528174edaa2ee268b23a809e0c598213a4bbcb4f34575a46fda147e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap-num/1.0.2/download"
+              ],
+              "strip_prefix": "clap-num-1.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"clap_num\",\n    deps = [\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap-num\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.2\",\n)\n"
+            }
+          },
+          "crate_index__clap_builder-4.4.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c77ed9a32a62e6ca27175d00d29d05ca32e396ea1eb5fb01d8256b669cec7663",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap_builder/4.4.7/download"
+              ],
+              "strip_prefix": "clap_builder-4.4.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"clap_builder\",\n    deps = [\n        \"@crate_index__anstream-0.6.4//:anstream\",\n        \"@crate_index__anstyle-1.0.4//:anstyle\",\n        \"@crate_index__clap_lex-0.6.0//:clap_lex\",\n        \"@crate_index__strsim-0.10.0//:strsim\",\n        \"@crate_index__terminal_size-0.3.0//:terminal_size\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cargo\",\n        \"color\",\n        \"deprecated\",\n        \"env\",\n        \"error-context\",\n        \"help\",\n        \"std\",\n        \"suggestions\",\n        \"usage\",\n        \"wrap_help\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap_builder\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.4.7\",\n)\n"
+            }
+          },
+          "crate_index__clap_complete-4.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "586a385f7ef2f8b4d86bddaa0c094794e7ccbfe5ffef1f434fe928143fc783a5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap_complete/4.4.0/download"
+              ],
+              "strip_prefix": "clap_complete-4.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"clap_complete\",\n    deps = [\n        \"@crate_index__clap-4.4.7//:clap\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap_complete\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.4.0\",\n)\n"
+            }
+          },
+          "crate_index__clap_derive-4.4.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "cf9804afaaf59a91e75b022a30fb7229a7901f60c755489cc61c9b423b836442",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap_derive/4.4.7/download"
+              ],
+              "strip_prefix": "clap_derive-4.4.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"clap_derive\",\n    deps = [\n        \"@crate_index__heck-0.4.1//:heck\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"deprecated\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.4.7\",\n)\n"
+            }
+          },
+          "crate_index__clap_lex-0.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "702fc72eb24e5a1e48ce58027a675bc24edd52096d5397d4aea7c6dd9eca0bd1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/clap_lex/0.6.0/download"
+              ],
+              "strip_prefix": "clap_lex-0.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"clap_lex\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=clap_lex\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.0\",\n)\n"
+            }
+          },
+          "crate_index__colorchoice-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "acbf1af155f9b9ef647e42cdc158db4b64a1b61f743629225fde6f3e0be2a7c7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/colorchoice/1.0.0/download"
+              ],
+              "strip_prefix": "colorchoice-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"colorchoice\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=colorchoice\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "crate_index__console-0.15.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c926e00cc70edefdc64d3a5ff31cc65bb97a3460097762bd23afb4d8145fccf8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/console/0.15.7/download"
+              ],
+              "strip_prefix": "console-0.15.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"console\",\n    deps = [\n        \"@crate_index__lazy_static-1.4.0//:lazy_static\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__unicode-width-0.1.10//:unicode_width\",\n    ] + select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__encode_unicode-0.3.6//:encode_unicode\",  # cfg(windows)\n            \"@crate_index__windows-sys-0.45.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"ansi-parsing\",\n        \"unicode-width\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=console\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.15.7\",\n)\n"
+            }
+          },
+          "crate_index__const-oid-0.9.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/const-oid/0.9.6/download"
+              ],
+              "strip_prefix": "const-oid-0.9.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"const_oid\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"db\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=const-oid\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.6\",\n)\n"
+            }
+          },
+          "crate_index__core-foundation-0.9.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "sha256": "91e195e091a93c46f7102ec7818a2aa394e1e1771c3ab4825963fa03e45afb8f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/core-foundation/0.9.4/download"
+              ],
+              "strip_prefix": "core-foundation-0.9.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"core_foundation\",\n    deps = [\n        \"@crate_index__core-foundation-sys-0.8.7//:core_foundation_sys\",\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"link\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=core-foundation\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.4\",\n)\n"
+            }
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+          "crate_index__core-foundation-sys-0.8.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "773648b94d0e5d620f64f280777445740e61fe701025087ec8b57f45c791888b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/core-foundation-sys/0.8.7/download"
+              ],
+              "strip_prefix": "core-foundation-sys-0.8.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"core_foundation_sys\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"link\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=core-foundation-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.7\",\n)\n"
+            }
+          },
+          "crate_index__coset-0.3.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f4c8cc80f631f8307b887faca24dcc3abc427cd0367f6eb6188f6e8f5b7ad8fb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/coset/0.3.8/download"
+              ],
+              "strip_prefix": "coset-0.3.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"coset\",\n    deps = [\n        \"@crate_index__ciborium-0.2.2//:ciborium\",\n        \"@crate_index__ciborium-io-0.2.2//:ciborium_io\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=coset\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.8\",\n)\n"
+            }
+          },
+          "crate_index__cpufeatures-0.2.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cpufeatures/0.2.9/download"
+              ],
+              "strip_prefix": "cpufeatures-0.2.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cpufeatures\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(target_arch = \"aarch64\", target_vendor = \"apple\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cpufeatures\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.9\",\n)\n"
+            }
+          },
+          "crate_index__crc-3.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "86ec7a15cbe22e59248fc7eadb1907dab5ba09372595da4d73dd805ed4417dfe",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crc/3.0.1/download"
+              ],
+              "strip_prefix": "crc-3.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crc\",\n    deps = [\n        \"@crate_index__crc-catalog-2.2.0//:crc_catalog\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.0.1\",\n)\n"
+            }
+          },
+          "crate_index__crc-catalog-2.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9cace84e55f07e7301bae1c519df89cdad8cc3cd868413d3fdbdeca9ff3db484",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crc-catalog/2.2.0/download"
+              ],
+              "strip_prefix": "crc-catalog-2.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crc_catalog\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crc-catalog\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.2.0\",\n)\n"
+            }
+          },
+          "crate_index__crc32fast-1.3.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b540bd8bc810d3885c6ea91e2018302f68baba2129ab3e88f32389ee9370880d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crc32fast/1.3.2/download"
+              ],
+              "strip_prefix": "crc32fast-1.3.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crc32fast\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__crc32fast-1.3.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crc32fast\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.3.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"crc32fast\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crc32fast\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.3.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__crunchy-0.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7a81dae078cea95a014a339291cec439d2f232ebe854a9d672b796c6afafa9b7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crunchy/0.2.2/download"
+              ],
+              "strip_prefix": "crunchy-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crunchy\",\n    deps = [\n        \"@crate_index__crunchy-0.2.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"limit_128\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crunchy\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"limit_128\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"crunchy\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crunchy\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__crypto-bigint-0.5.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "cf4c2f4e1afd912bc40bfd6fed5d9dc1f288e0ba01bfcc835cc5bc3eb13efe15",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crypto-bigint/0.5.2/download"
+              ],
+              "strip_prefix": "crypto-bigint-0.5.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crypto_bigint\",\n    deps = [\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"generic-array\",\n        \"rand_core\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crypto-bigint\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.2\",\n)\n"
+            }
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+          "crate_index__crypto-common-0.1.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1bfb12502f3fc46cca1bb51ac28df9d618d813cdc3d2f25b9fe775a34af26bb3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/crypto-common/0.1.6/download"
+              ],
+              "strip_prefix": "crypto-common-0.1.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crypto_common\",\n    deps = [\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n        \"@crate_index__typenum-1.17.0//:typenum\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=crypto-common\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.6\",\n)\n"
+            }
+          },
+          "crate_index__cryptoki-0.8.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [
+                "-p2"
+              ],
+              "patch_tool": "",
+              "patches": [
+                "@@//third_party/rust/patches:cryptoki-profile.patch",
+                "@@//third_party/rust/patches:cryptoki-vendor-defined-mechanism-type.patch"
+              ],
+              "remote_patch_strip": 1,
+              "sha256": "2e45b5f1ddb06ae54aea3f6d60e88c493356c51f43b8e741c9d5ac661f4d02d3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cryptoki/0.8.0/download"
+              ],
+              "strip_prefix": "cryptoki-0.8.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cryptoki\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n        \"@crate_index__cryptoki-sys-0.2.0//:cryptoki_sys\",\n        \"@crate_index__libloading-0.7.4//:libloading\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__secrecy-0.8.0//:secrecy\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__paste-1.0.14//:paste\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cryptoki\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.0\",\n)\n"
+            }
+          },
+          "crate_index__cryptoki-sys-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "062316aeb324b15a0b10c9475a9e67d613b7409056c33fbe33b7c12027408cfb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cryptoki-sys/0.2.0/download"
+              ],
+              "strip_prefix": "cryptoki-sys-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cryptoki_sys\",\n    deps = [\n        \"@crate_index__cryptoki-sys-0.2.0//:build_script_build\",\n        \"@crate_index__libloading-0.7.4//:libloading\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cryptoki-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"cryptoki-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cryptoki-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n\n# Additive BUILD file content\n\nfilegroup(\n    name = \"binding_srcs\",\n    srcs = [\n        \"src/lib.rs\",\n        \"src/bindings/x86_64-unknown-linux-gnu.rs\",\n    ],\n)\n"
+            }
+          },
+          "crate_index__darling-0.20.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0209d94da627ab5605dcccf08bb18afa5009cfbef48d8a8b7d7bdbc79be25c5e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/darling/0.20.3/download"
+              ],
+              "strip_prefix": "darling-0.20.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"darling\",\n    deps = [\n        \"@crate_index__darling_core-0.20.3//:darling_core\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__darling_macro-0.20.3//:darling_macro\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"suggestions\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=darling\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.20.3\",\n)\n"
+            }
+          },
+          "crate_index__darling_core-0.20.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "177e3443818124b357d8e76f53be906d60937f0d3a90773a664fa63fa253e621",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/darling_core/0.20.3/download"
+              ],
+              "strip_prefix": "darling_core-0.20.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"darling_core\",\n    deps = [\n        \"@crate_index__fnv-1.0.7//:fnv\",\n        \"@crate_index__ident_case-1.0.1//:ident_case\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__strsim-0.10.0//:strsim\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"strsim\",\n        \"suggestions\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=darling_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.20.3\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "836a9bbc7ad63342d6d6e7b815ccab164bc77a2d95d84bc3117a8c0d5c98e2d5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/darling_macro/0.20.3/download"
+              ],
+              "strip_prefix": "darling_macro-0.20.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"darling_macro\",\n    deps = [\n        \"@crate_index__darling_core-0.20.3//:darling_core\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=darling_macro\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.20.3\",\n)\n"
+            }
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+          "crate_index__der-0.7.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fffa369a668c8af7dbf8b5e56c9f744fbd399949ed171606040001947de40b1c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/der/0.7.8/download"
+              ],
+              "strip_prefix": "der-0.7.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"der\",\n    deps = [\n        \"@crate_index__const-oid-0.9.6//:const_oid\",\n        \"@crate_index__flagset-0.4.7//:flagset\",\n        \"@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__der_derive-0.7.3//:der_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"derive\",\n        \"flagset\",\n        \"oid\",\n        \"pem\",\n        \"std\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=der\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.8\",\n)\n"
+            }
+          },
+          "crate_index__der_derive-0.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8034092389675178f570469e6c3b0465d3d30b4505c294a6550db47f3c17ad18",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/der_derive/0.7.3/download"
+              ],
+              "strip_prefix": "der_derive-0.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"der_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=der_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.3\",\n)\n"
+            }
+          },
+          "crate_index__deranged-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9c9e6a11ca8224451684bc0d7d5a7adbf8f2fd6887261a1cfc3c0432f9d4068e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/deranged/0.4.0/download"
+              ],
+              "strip_prefix": "deranged-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"deranged\",\n    deps = [\n        \"@crate_index__powerfmt-0.2.0//:powerfmt\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"powerfmt\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=deranged\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n"
+            }
+          },
+          "crate_index__deser-hjson-2.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "edc4f43e1fa39fc7d2e48824106097c78749ee5962e580c1e0b8564de7f138d3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/deser-hjson/2.1.0/download"
+              ],
+              "strip_prefix": "deser-hjson-2.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"deser_hjson\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=deser-hjson\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.1.0\",\n)\n"
+            }
+          },
+          "crate_index__digest-0.10.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9ed9a281f7bc9b7576e61468ba615a66a5c8cfdff42420a70aa82701a3b1e292",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/digest/0.10.7/download"
+              ],
+              "strip_prefix": "digest-0.10.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"digest\",\n    deps = [\n        \"@crate_index__block-buffer-0.10.4//:block_buffer\",\n        \"@crate_index__const-oid-0.9.6//:const_oid\",\n        \"@crate_index__crypto-common-0.1.6//:crypto_common\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"block-buffer\",\n        \"const-oid\",\n        \"core-api\",\n        \"default\",\n        \"mac\",\n        \"oid\",\n        \"std\",\n        \"subtle\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=digest\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.7\",\n)\n"
+            }
+          },
+          "crate_index__directories-5.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9a49173b84e034382284f27f1af4dcbbd231ffa358c0fe316541a7337f376a35",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/directories/5.0.1/download"
+              ],
+              "strip_prefix": "directories-5.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"directories\",\n    deps = [\n        \"@crate_index__dirs-sys-0.4.1//:dirs_sys\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=directories\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"5.0.1\",\n)\n"
+            }
+          },
+          "crate_index__dirs-sys-0.4.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "520f05a5cbd335fae5a99ff7a6ab8627577660ee5cfd6a94a6a929b52ff0321c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/dirs-sys/0.4.1/download"
+              ],
+              "strip_prefix": "dirs-sys-0.4.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"dirs_sys\",\n    deps = [\n        \"@crate_index__option-ext-0.2.0//:option_ext\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=dirs-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.1\",\n)\n"
+            }
+          },
+          "crate_index__ecdsa-0.16.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ee27f32b5c5292967d2d4a9d7f1e0b0aed2c15daded5a60300e4abb9d8020bca",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ecdsa/0.16.9/download"
+              ],
+              "strip_prefix": "ecdsa-0.16.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ecdsa\",\n    deps = [\n        \"@crate_index__der-0.7.8//:der\",\n        \"@crate_index__digest-0.10.7//:digest\",\n        \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n        \"@crate_index__rfc6979-0.4.0//:rfc6979\",\n        \"@crate_index__sha2-0.10.7//:sha2\",\n        \"@crate_index__signature-2.1.0//:signature\",\n        \"@crate_index__spki-0.7.3//:spki\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"arithmetic\",\n        \"default\",\n        \"der\",\n        \"digest\",\n        \"hazmat\",\n        \"pem\",\n        \"pkcs8\",\n        \"rfc6979\",\n        \"sha2\",\n        \"signing\",\n        \"spki\",\n        \"std\",\n        \"verifying\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ecdsa\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.16.9\",\n)\n"
+            }
+          },
+          "crate_index__either-1.13.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/either/1.13.0/download"
+              ],
+              "strip_prefix": "either-1.13.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"either\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"use_std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=either\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.13.0\",\n)\n"
+            }
+          },
+          "crate_index__elasticlunr-rs-3.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "41e83863a500656dfa214fee6682de9c5b9f03de6860fec531235ed2ae9f6571",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/elasticlunr-rs/3.0.2/download"
+              ],
+              "strip_prefix": "elasticlunr-rs-3.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"elasticlunr\",\n    deps = [\n        \"@crate_index__regex-1.9.4//:regex\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:serde_json\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__serde_derive-1.0.219//:serde_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=elasticlunr-rs\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.0.2\",\n)\n"
+            }
+          },
+          "crate_index__elf-0.7.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e2b183d6ce6ca4cf30e3db37abf5b52568b5f9015c97d9fbdd7026aa5dcdd758",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/elf/0.7.2/download"
+              ],
+              "strip_prefix": "elf-0.7.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"elf\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n        \"to_str\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=elf\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.2\",\n)\n"
+            }
+          },
+          "crate_index__elliptic-curve-0.13.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b5e6043086bf7973472e0c7dff2142ea0b680d30e18d9cc40f267efbf222bd47",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/elliptic-curve/0.13.8/download"
+              ],
+              "strip_prefix": "elliptic-curve-0.13.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"elliptic_curve\",\n    deps = [\n        \"@crate_index__base16ct-0.2.0//:base16ct\",\n        \"@crate_index__crypto-bigint-0.5.2//:crypto_bigint\",\n        \"@crate_index__digest-0.10.7//:digest\",\n        \"@crate_index__ff-0.13.0//:ff\",\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n        \"@crate_index__group-0.13.0//:group\",\n        \"@crate_index__hkdf-0.12.3//:hkdf\",\n        \"@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468\",\n        \"@crate_index__pkcs8-0.10.2//:pkcs8\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n        \"@crate_index__sec1-0.7.3//:sec1\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"arithmetic\",\n        \"default\",\n        \"digest\",\n        \"ecdh\",\n        \"ff\",\n        \"group\",\n        \"hazmat\",\n        \"pem\",\n        \"pkcs8\",\n        \"sec1\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=elliptic-curve\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.8\",\n)\n"
+            }
+          },
+          "crate_index__embedded-hal-0.2.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/embedded-hal/0.2.7/download"
+              ],
+              "strip_prefix": "embedded-hal-0.2.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"embedded_hal\",\n    deps = [\n        \"@crate_index__nb-0.1.3//:nb\",\n        \"@crate_index__void-1.0.2//:void\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"unproven\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=embedded-hal\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.7\",\n)\n"
+            }
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+          "crate_index__embedded-hal-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/embedded-hal/1.0.0/download"
+              ],
+              "strip_prefix": "embedded-hal-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"embedded_hal\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=embedded-hal\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "crate_index__embedded-hal-nb-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fba4268c14288c828995299e59b12babdbe170f6c6d73731af1b4648142e8605",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/embedded-hal-nb/1.0.0/download"
+              ],
+              "strip_prefix": "embedded-hal-nb-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"embedded_hal_nb\",\n    deps = [\n        \"@crate_index__embedded-hal-1.0.0//:embedded_hal\",\n        \"@crate_index__nb-1.1.0//:nb\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=embedded-hal-nb\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "crate_index__encode_unicode-0.3.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a357d28ed41a50f9c765dbfe56cbc04a64e53e5fc58ba79fbc34c10ef3df831f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/encode_unicode/0.3.6/download"
+              ],
+              "strip_prefix": "encode_unicode-0.3.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"encode_unicode\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=encode_unicode\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.6\",\n)\n"
+            }
+          },
+          "crate_index__encoding_rs-0.8.35": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "75030f3c4f45dafd7586dd6780965a8c7e8e285a5ecb86713e63a79c5b2766f3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/encoding_rs/0.8.35/download"
+              ],
+              "strip_prefix": "encoding_rs-0.8.35",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"encoding_rs\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=encoding_rs\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.35\",\n)\n"
+            }
+          },
+          "crate_index__env_logger-0.10.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "85cdab6a89accf66733ad5a1693a4dcced6aeff64602b634530dd73c1f3ee9f0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/env_logger/0.10.0/download"
+              ],
+              "strip_prefix": "env_logger-0.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"env_logger\",\n    deps = [\n        \"@crate_index__humantime-2.1.0//:humantime\",\n        \"@crate_index__is-terminal-0.4.9//:is_terminal\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__regex-1.9.4//:regex\",\n        \"@crate_index__termcolor-1.2.0//:termcolor\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"auto-color\",\n        \"color\",\n        \"default\",\n        \"humantime\",\n        \"regex\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=env_logger\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0\",\n)\n"
+            }
+          },
+          "crate_index__equivalent-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/equivalent/1.0.1/download"
+              ],
+              "strip_prefix": "equivalent-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"equivalent\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=equivalent\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__erased-serde-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6c138974f9d5e7fe373eb04df7cae98833802ae4b11c24ac7039a21d5af4b26c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/erased-serde/0.3.31/download"
+              ],
+              "strip_prefix": "erased-serde-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"erased_serde\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=erased-serde\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__erased-serde-0.4.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e004d887f51fcb9fef17317a2f3525c887d8aa3f4f50fed920816a688284a5b7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/erased-serde/0.4.6/download"
+              ],
+              "strip_prefix": "erased-serde-0.4.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"erased_serde\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__typeid-1.0.3//:typeid\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=erased-serde\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.6\",\n)\n"
+            }
+          },
+          "crate_index__errno-0.3.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ac3e13f66a2f95e32a39eaa81f6b95d42878ca0e1db0c7543723dfe12557e860",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/errno/0.3.5/download"
+              ],
+              "strip_prefix": "errno-0.3.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"errno\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(target_os = \"wasi\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=errno\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.5\",\n)\n"
+            }
+          },
+          "crate_index__fastrand-2.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6999dc1837253364c2ebb0704ba97994bd874e8f195d665c50b7548f6ea92764",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/fastrand/2.0.0/download"
+              ],
+              "strip_prefix": "fastrand-2.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"fastrand\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=fastrand\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.0\",\n)\n"
+            }
+          },
+          "crate_index__ff-0.13.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ded41244b729663b1e574f1b4fb731469f69f79c17667b5d776b16cda0479449",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ff/0.13.0/download"
+              ],
+              "strip_prefix": "ff-0.13.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ff\",\n    deps = [\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ff\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.0\",\n)\n"
+            }
+          },
+          "crate_index__filetime-0.2.22": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d4029edd3e734da6fe05b6cd7bd2960760a616bd2ddd0d59a0124746d6272af0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/filetime/0.2.22/download"
+              ],
+              "strip_prefix": "filetime-0.2.22",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"filetime\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=filetime\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.22\",\n)\n"
+            }
+          },
+          "crate_index__flagset-0.4.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b7ac824320a75a52197e8f2d787f6a38b6718bb6897a35142d749af3c0e8f4fe",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/flagset/0.4.7/download"
+              ],
+              "strip_prefix": "flagset-0.4.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"flagset\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=flagset\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.7\",\n)\n"
+            }
+          },
+          "crate_index__flate2-1.0.28": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "46303f565772937ffe1d394a4fac6f411c6013172fadde9dcdb1e147a086940e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/flate2/1.0.28/download"
+              ],
+              "strip_prefix": "flate2-1.0.28",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"flate2\",\n    deps = [\n        \"@crate_index__crc32fast-1.3.2//:crc32fast\",\n        \"@crate_index__miniz_oxide-0.7.1//:miniz_oxide\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"any_impl\",\n        \"default\",\n        \"miniz_oxide\",\n        \"rust_backend\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=flate2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.28\",\n)\n"
+            }
+          },
+          "crate_index__fnv-1.0.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3f9eec918d3f24069decb9af1554cad7c880e2da24a9afd88aca000531ab82c1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/fnv/1.0.7/download"
+              ],
+              "strip_prefix": "fnv-1.0.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"fnv\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=fnv\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.7\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f6f339eb8adc052cd2ca78910fda869aefa38d22d5cb648e6485e4d3fc06f3b1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/foreign-types/0.3.2/download"
+              ],
+              "strip_prefix": "foreign-types-0.3.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"foreign_types\",\n    deps = [\n        \"@crate_index__foreign-types-shared-0.1.1//:foreign_types_shared\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=foreign-types\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.2\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "00b0228411908ca8685dba7fc2cdd70ec9990a6e753e89b6ac91a84c40fbaf4b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/foreign-types-shared/0.1.1/download"
+              ],
+              "strip_prefix": "foreign-types-shared-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"foreign_types_shared\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=foreign-types-shared\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__form_urlencoded-1.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a62bc1cf6f830c2ec14a513a9fb124d0a213a629668a4186f329db21fe045652",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/form_urlencoded/1.2.0/download"
+              ],
+              "strip_prefix": "form_urlencoded-1.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"form_urlencoded\",\n    deps = [\n        \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=form_urlencoded\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.2.0\",\n)\n"
+            }
+          },
+          "crate_index__ftdi-0.1.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2f9c8c625c6b8634ce70cd8cbb2ab8a103e4c2b4185c86d9954d2e16b1ef7c4a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ftdi/0.1.3/download"
+              ],
+              "strip_prefix": "ftdi-0.1.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ftdi\",\n    deps = [\n        \"@crate_index__ftdi-mpsse-0.1.1//:ftdi_mpsse\",\n        \"@crate_index__libftdi1-sys-1.1.2//:libftdi1_sys\",\n        \"@crate_index__thiserror-1.0.49//:thiserror\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ftdi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.3\",\n)\n"
+            }
+          },
+          "crate_index__ftdi-embedded-hal-0.22.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5e328c2738c104e2649586bda4baabf376825db50014eb0d41bee74fb6064deb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ftdi-embedded-hal/0.22.0/download"
+              ],
+              "strip_prefix": "ftdi-embedded-hal-0.22.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ftdi_embedded_hal\",\n    deps = [\n        \"@crate_index__embedded-hal-0.2.7//:embedded_hal\",\n        \"@crate_index__embedded-hal-1.0.0//:embedded_hal\",\n        \"@crate_index__embedded-hal-nb-1.0.0//:embedded_hal_nb\",\n        \"@crate_index__ftdi-mpsse-0.1.1//:ftdi_mpsse\",\n        \"@crate_index__nb-1.1.0//:nb\",\n    ],\n    aliases = {\n        \"@crate_index__embedded-hal-0.2.7//:embedded_hal\": \"eh0\",\n        \"@crate_index__embedded-hal-1.0.0//:embedded_hal\": \"eh1\",\n        \"@crate_index__embedded-hal-nb-1.0.0//:embedded_hal_nb\": \"ehnb1\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ftdi-embedded-hal\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.22.0\",\n)\n"
+            }
+          },
+          "crate_index__ftdi-mpsse-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fa7cfcda69930a8d2fdcdd7ffb9234fe4c79a8c73934ed4904327d77bfb5078a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ftdi-mpsse/0.1.1/download"
+              ],
+              "strip_prefix": "ftdi-mpsse-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ftdi_mpsse\",\n    deps = [\n        \"@crate_index__static_assertions-1.1.0//:static_assertions\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ftdi-mpsse\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__fuchsia-cprng-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a06f77d526c1a601b7c4cdd98f54b5eaabffc14d5f2f0296febdc7f357c6d3ba",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/fuchsia-cprng/0.1.1/download"
+              ],
+              "strip_prefix": "fuchsia-cprng-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"fuchsia_cprng\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=fuchsia-cprng\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__funty-2.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e6d5a32815ae3f33302d95fdcb2ce17862f8c65363dcfd29360480ba1001fc9c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/funty/2.0.0/download"
+              ],
+              "strip_prefix": "funty-2.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"funty\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=funty\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.0\",\n)\n"
+            }
+          },
+          "crate_index__futf-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "df420e2e84819663797d1ec6544b13c5be84629e7bb00dc960d6917db2987843",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futf/0.1.5/download"
+              ],
+              "strip_prefix": "futf-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futf\",\n    deps = [\n        \"@crate_index__mac-0.1.1//:mac\",\n        \"@crate_index__new_debug_unreachable-1.0.4//:debug_unreachable\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futf\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n"
+            }
+          },
+          "crate_index__futures-channel-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2dff15bf788c671c1934e366d07e30c1814a8ef514e1af724a602e8a2fbe1b10",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-channel/0.3.31/download"
+              ],
+              "strip_prefix": "futures-channel-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_channel\",\n    deps = [\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-sink-0.3.31//:futures_sink\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"futures-sink\",\n        \"sink\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-channel\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__futures-core-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "05f29059c0c2090612e8d742178b0580d2dc940c837851ad723096f87af6663e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-core/0.3.31/download"
+              ],
+              "strip_prefix": "futures-core-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_core\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"std\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"default\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"default\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"default\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"default\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"default\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__futures-io-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9e5c1b78ca4aae1ac06c48a526a655760685149f0d465d21f37abfe57ce075c6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-io/0.3.31/download"
+              ],
+              "strip_prefix": "futures-io-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_io\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-io\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__futures-sink-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e575fab7d1e0dcb8d0c7bcf9a63ee213816ab51902e6d244a95819acacf1d4f7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-sink/0.3.31/download"
+              ],
+              "strip_prefix": "futures-sink-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_sink\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"alloc\",  # aarch64-apple-darwin\n            \"default\",  # aarch64-apple-darwin\n            \"std\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"alloc\",  # aarch64-unknown-linux-gnu\n            \"default\",  # aarch64-unknown-linux-gnu\n            \"std\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"alloc\",  # x86_64-pc-windows-msvc\n            \"default\",  # x86_64-pc-windows-msvc\n            \"std\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"alloc\",  # x86_64-unknown-linux-gnu\n            \"default\",  # x86_64-unknown-linux-gnu\n            \"std\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"alloc\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"default\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"std\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-sink\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__futures-task-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f90f7dce0722e95104fcb095585910c0977252f286e354b5e3bd38902cd99988",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-task/0.3.31/download"
+              ],
+              "strip_prefix": "futures-task-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_task\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-task\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__futures-util-0.3.31": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9fa08315bb612088cc391249efdc3bc77536f16c91f6cf495e6fbe85b20a4a81",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/futures-util/0.3.31/download"
+              ],
+              "strip_prefix": "futures-util-0.3.31",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"futures_util\",\n    deps = [\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-io-0.3.31//:futures_io\",\n        \"@crate_index__futures-sink-0.3.31//:futures_sink\",\n        \"@crate_index__futures-task-0.3.31//:futures_task\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__pin-utils-0.1.0//:pin_utils\",\n        \"@crate_index__slab-0.4.9//:slab\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"futures-io\",\n        \"futures-sink\",\n        \"io\",\n        \"memchr\",\n        \"sink\",\n        \"slab\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=futures-util\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.31\",\n)\n"
+            }
+          },
+          "crate_index__gcc-0.3.55": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8f5f3913fa0bfe7ee1fd8248b6b9f42a5af4b9d65ec2dd2c3c26132b950ecfc2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/gcc/0.3.55/download"
+              ],
+              "strip_prefix": "gcc-0.3.55",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"gcc\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=gcc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.55\",\n)\n"
+            }
+          },
+          "crate_index__generic-array-0.14.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/generic-array/0.14.7/download"
+              ],
+              "strip_prefix": "generic-array-0.14.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"generic_array\",\n    deps = [\n        \"@crate_index__generic-array-0.14.7//:build_script_build\",\n        \"@crate_index__typenum-1.17.0//:typenum\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"more_lengths\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=generic-array\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.14.7\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"more_lengths\",\n        \"zeroize\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__version_check-0.9.4//:version_check\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"generic-array\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=generic-array\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.14.7\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__getrandom-0.2.10": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "be4136b2a15dd319360be1c07d9933517ccf0be8f16bf62a3bee4f0d618df427",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/getrandom/0.2.10/download"
+              ],
+              "strip_prefix": "getrandom-0.2.10",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"getrandom\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__wasi-0.11.0-wasi-snapshot-preview1//:wasi\",  # cfg(target_os = \"wasi\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=getrandom\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.10\",\n)\n"
+            }
+          },
+          "crate_index__gimli-0.28.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6fb8d784f27acf97159b40fc4db5ecd8aa23b9ad5ef69cdd136d3bc80665f0c0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/gimli/0.28.0/download"
+              ],
+              "strip_prefix": "gimli-0.28.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"gimli\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"read\",\n        \"read-core\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=gimli\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.28.0\",\n)\n"
+            }
+          },
+          "crate_index__group-0.13.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f0f9ef7462f7c099f518d754361858f86d8a07af53ba9af0fe635bbccb151a63",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/group/0.13.0/download"
+              ],
+              "strip_prefix": "group-0.13.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"group\",\n    deps = [\n        \"@crate_index__ff-0.13.0//:ff\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=group\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.0\",\n)\n"
+            }
+          },
+          "crate_index__h2-0.4.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ccae279728d634d083c00f6099cb58f01cc99c145b84b8be2f6c74618d79922e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/h2/0.4.7/download"
+              ],
+              "strip_prefix": "h2-0.4.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"h2\",\n    deps = [\n        \"@crate_index__atomic-waker-1.1.2//:atomic_waker\",\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__fnv-1.0.7//:fnv\",\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-sink-0.3.31//:futures_sink\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__indexmap-2.0.0//:indexmap\",\n        \"@crate_index__slab-0.4.9//:slab\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__tokio-util-0.7.13//:tokio_util\",\n        \"@crate_index__tracing-0.1.41//:tracing\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=h2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.7\",\n)\n"
+            }
+          },
+          "crate_index__half-2.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "459196ed295495a68f7d7fe1d84f6c4b7ff0e21fe3017b2f283c6fac3ad803c9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/half/2.6.0/download"
+              ],
+              "strip_prefix": "half-2.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"half\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=half\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.6.0\",\n)\n"
+            }
+          },
+          "crate_index__handlebars-4.3.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "83c3372087601b532857d332f5957cbae686da52bb7810bf038c3e3c3cc2fa0d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/handlebars/4.3.7/download"
+              ],
+              "strip_prefix": "handlebars-4.3.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"handlebars\",\n    deps = [\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__pest-2.7.3//:pest\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:serde_json\",\n        \"@crate_index__thiserror-1.0.49//:thiserror\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__pest_derive-2.7.3//:pest_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=handlebars\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.3.7\",\n)\n"
+            }
+          },
+          "crate_index__hashbrown-0.12.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8a9ee70c43aaf417c914396645a0fa852624801b24ebb7ae78fe8272889ac888",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hashbrown/0.12.3/download"
+              ],
+              "strip_prefix": "hashbrown-0.12.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hashbrown\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hashbrown\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.12.3\",\n)\n"
+            }
+          },
+          "crate_index__hashbrown-0.14.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2c6201b9ff9fd90a5a3bac2e56a830d0caa509576f0e503818ee82c181b3437a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hashbrown/0.14.0/download"
+              ],
+              "strip_prefix": "hashbrown-0.14.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hashbrown\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"raw\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hashbrown\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.14.0\",\n)\n"
+            }
+          },
+          "crate_index__heck-0.4.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "95505c38b4572b2d910cecb0281560f54b440a19336cbbcb27bf6ce6adc6f5a8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/heck/0.4.1/download"
+              ],
+              "strip_prefix": "heck-0.4.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"heck\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=heck\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.1\",\n)\n"
+            }
+          },
+          "crate_index__hermit-abi-0.3.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d77f7ec81a6d05a3abb01ab6eb7590f6083d08449fe5a1c8b1e620283546ccb7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hermit-abi/0.3.3/download"
+              ],
+              "strip_prefix": "hermit-abi-0.3.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hermit_abi\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hermit-abi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.3\",\n)\n"
+            }
+          },
+          "crate_index__hex-0.4.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7f24254aa9a54b5c858eaee2f5bccdb46aaf0e486a595ed5fd8f86ba55232a70",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hex/0.4.3/download"
+              ],
+              "strip_prefix": "hex-0.4.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hex\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"serde\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hex\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.3\",\n)\n"
+            }
+          },
+          "crate_index__hkdf-0.12.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hkdf/0.12.3/download"
+              ],
+              "strip_prefix": "hkdf-0.12.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hkdf\",\n    deps = [\n        \"@crate_index__hmac-0.12.1//:hmac\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hkdf\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.12.3\",\n)\n"
+            }
+          },
+          "crate_index__hmac-0.12.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6c49c37c09c17a53d937dfbb742eb3a961d65a994e6bcdcf37e7399d0cc8ab5e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hmac/0.12.1/download"
+              ],
+              "strip_prefix": "hmac-0.12.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hmac\",\n    deps = [\n        \"@crate_index__digest-0.10.7//:digest\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"reset\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hmac\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.12.1\",\n)\n"
+            }
+          },
+          "crate_index__html5ever-0.26.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bea68cab48b8459f17cf1c944c67ddc572d272d9f2b274140f223ecb1da4a3b7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/html5ever/0.26.0/download"
+              ],
+              "strip_prefix": "html5ever-0.26.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"html5ever\",\n    deps = [\n        \"@crate_index__html5ever-0.26.0//:build_script_build\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__mac-0.1.1//:mac\",\n        \"@crate_index__markup5ever-0.11.0//:markup5ever\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=html5ever\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.26.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-1.0.109//:syn\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"html5ever\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=html5ever\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.26.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__http-1.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f16ca2af56261c99fba8bac40a10251ce8188205a4c448fbb745a2e4daa76fea",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/http/1.2.0/download"
+              ],
+              "strip_prefix": "http-1.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"http\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__fnv-1.0.7//:fnv\",\n        \"@crate_index__itoa-1.0.9//:itoa\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=http\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.2.0\",\n)\n"
+            }
+          },
+          "crate_index__http-body-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1efedce1fb8e6913f23e0c92de8e62cd5b772a67e7b3946df930a62566c93184",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/http-body/1.0.1/download"
+              ],
+              "strip_prefix": "http-body-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"http_body\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__http-1.2.0//:http\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=http-body\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__http-body-util-0.1.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "793429d76616a256bcb62c2a2ec2bed781c8307e797e2598c50010f2bee2544f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/http-body-util/0.1.2/download"
+              ],
+              "strip_prefix": "http-body-util-0.1.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"http_body_util\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__http-body-1.0.1//:http_body\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=http-body-util\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.2\",\n)\n"
+            }
+          },
+          "crate_index__httparse-1.9.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7d71d3574edd2771538b901e6549113b4006ece66150fb69c0fb6d9a2adae946",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/httparse/1.9.5/download"
+              ],
+              "strip_prefix": "httparse-1.9.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"httparse\",\n    deps = [\n        \"@crate_index__httparse-1.9.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=httparse\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.9.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"httparse\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=httparse\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.9.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__humantime-2.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9a3a5bfb195931eeb336b2a7b4d761daec841b97f947d34394601737a7bba5e4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/humantime/2.1.0/download"
+              ],
+              "strip_prefix": "humantime-2.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"humantime\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=humantime\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.1.0\",\n)\n"
+            }
+          },
+          "crate_index__humantime-serde-1.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "57a3db5ea5923d99402c94e9feb261dc5ee9b4efa158b0315f788cf549cc200c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/humantime-serde/1.1.1/download"
+              ],
+              "strip_prefix": "humantime-serde-1.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"humantime_serde\",\n    deps = [\n        \"@crate_index__humantime-2.1.0//:humantime\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=humantime-serde\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.1\",\n)\n"
+            }
+          },
+          "crate_index__hyper-1.5.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "256fb8d4bd6413123cc9d91832d78325c48ff41677595be797d90f42969beae0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hyper/1.5.2/download"
+              ],
+              "strip_prefix": "hyper-1.5.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hyper\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__futures-channel-0.3.31//:futures_channel\",\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__h2-0.4.7//:h2\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__http-body-1.0.1//:http_body\",\n        \"@crate_index__httparse-1.9.5//:httparse\",\n        \"@crate_index__itoa-1.0.9//:itoa\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__smallvec-1.13.2//:smallvec\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__want-0.3.1//:want\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"client\",\n        \"default\",\n        \"http1\",\n        \"http2\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hyper\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.5.2\",\n)\n"
+            }
+          },
+          "crate_index__hyper-rustls-0.27.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2d191583f3da1305256f22463b9bb0471acad48a4e534a5218b9963e9c1f59b2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hyper-rustls/0.27.5/download"
+              ],
+              "strip_prefix": "hyper-rustls-0.27.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hyper_rustls\",\n    deps = [\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__hyper-1.5.2//:hyper\",\n        \"@crate_index__hyper-util-0.1.10//:hyper_util\",\n        \"@crate_index__rustls-0.23.21//:rustls\",\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__tokio-rustls-0.26.1//:tokio_rustls\",\n        \"@crate_index__tower-service-0.3.3//:tower_service\",\n    ],\n    aliases = {\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\": \"pki_types\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hyper-rustls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.27.5\",\n)\n"
+            }
+          },
+          "crate_index__hyper-tls-0.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "70206fc6890eaca9fde8a0bf71caa2ddfc9fe045ac9e5c70df101a7dbde866e0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hyper-tls/0.6.0/download"
+              ],
+              "strip_prefix": "hyper-tls-0.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hyper_tls\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__http-body-util-0.1.2//:http_body_util\",\n        \"@crate_index__hyper-1.5.2//:hyper\",\n        \"@crate_index__hyper-util-0.1.10//:hyper_util\",\n        \"@crate_index__native-tls-0.2.12//:native_tls\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",\n        \"@crate_index__tower-service-0.3.3//:tower_service\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hyper-tls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.0\",\n)\n"
+            }
+          },
+          "crate_index__hyper-util-0.1.10": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "df2dcfbe0677734ab2f3ffa7fa7bfd4706bfdc1ef393f2ee30184aed67e631b4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/hyper-util/0.1.10/download"
+              ],
+              "strip_prefix": "hyper-util-0.1.10",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"hyper_util\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__futures-channel-0.3.31//:futures_channel\",\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__http-body-1.0.1//:http_body\",\n        \"@crate_index__hyper-1.5.2//:hyper\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__socket2-0.5.8//:socket2\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__tower-service-0.3.3//:tower_service\",\n        \"@crate_index__tracing-0.1.41//:tracing\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"client\",\n        \"client-legacy\",\n        \"default\",\n        \"http1\",\n        \"http2\",\n        \"tokio\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=hyper-util\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.10\",\n)\n"
+            }
+          },
+          "crate_index__iana-time-zone-0.1.58": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8326b86b6cff230b97d0d312a6c40a60726df3332e721f72a1b035f451663b20",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/iana-time-zone/0.1.58/download"
+              ],
+              "strip_prefix": "iana-time-zone-0.1.58",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"iana_time_zone\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__core-foundation-sys-0.8.7//:core_foundation_sys\",  # cfg(any(target_os = \"macos\", target_os = \"ios\"))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__js-sys-0.3.64//:js_sys\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__js-sys-0.3.64//:js_sys\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-core-0.51.1//:windows_core\",  # cfg(target_os = \"windows\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"fallback\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=iana-time-zone\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.58\",\n)\n"
+            }
+          },
+          "crate_index__iana-time-zone-haiku-0.1.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f31827a206f56af32e590ba56d5d2d085f558508192593743f16b2306495269f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/iana-time-zone-haiku/0.1.2/download"
+              ],
+              "strip_prefix": "iana-time-zone-haiku-0.1.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"iana_time_zone_haiku\",\n    deps = [\n        \"@crate_index__iana-time-zone-haiku-0.1.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=iana-time-zone-haiku\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"iana-time-zone-haiku\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=iana-time-zone-haiku\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__ident_case-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b9e0384b61958566e926dc50660321d12159025e767c18e043daf26b70104c39",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ident_case/1.0.1/download"
+              ],
+              "strip_prefix": "ident_case-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ident_case\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ident_case\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__idna-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7d20d6b07bfbc108882d88ed8e37d39636dcc260e15e30c45e6ba089610b917c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/idna/0.4.0/download"
+              ],
+              "strip_prefix": "idna-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"idna\",\n    deps = [\n        \"@crate_index__unicode-bidi-0.3.13//:unicode_bidi\",\n        \"@crate_index__unicode-normalization-0.1.22//:unicode_normalization\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=idna\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n"
+            }
+          },
+          "crate_index__indexmap-1.9.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bd070e393353796e801d209ad339e89596eb4c8d430d18ede6a1cced8fafbd99",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/indexmap/1.9.3/download"
+              ],
+              "strip_prefix": "indexmap-1.9.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"indexmap\",\n    deps = [\n        \"@crate_index__hashbrown-0.12.3//:hashbrown\",\n        \"@crate_index__indexmap-1.9.3//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=indexmap\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.9.3\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2021\",\n    pkg_name = \"indexmap\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=indexmap\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.9.3\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__indexmap-2.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d5477fe2230a79769d8dc68e0eabf5437907c0457a5614a9e8dddb67f65eb65d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/indexmap/2.0.0/download"
+              ],
+              "strip_prefix": "indexmap-2.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"indexmap\",\n    deps = [\n        \"@crate_index__equivalent-1.0.1//:equivalent\",\n        \"@crate_index__hashbrown-0.14.0//:hashbrown\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"serde\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=indexmap\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.0\",\n)\n"
+            }
+          },
+          "crate_index__indicatif-0.17.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0b297dc40733f23a0e52728a58fa9489a5b7638a324932de16b41adc3ef80730",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/indicatif/0.17.6/download"
+              ],
+              "strip_prefix": "indicatif-0.17.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"indicatif\",\n    deps = [\n        \"@crate_index__console-0.15.7//:console\",\n        \"@crate_index__number_prefix-0.4.0//:number_prefix\",\n        \"@crate_index__portable-atomic-1.4.3//:portable_atomic\",\n        \"@crate_index__unicode-width-0.1.10//:unicode_width\",\n    ] + select({\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__instant-0.1.12//:instant\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__instant-0.1.12//:instant\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"unicode-width\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=indicatif\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.17.6\",\n)\n"
+            }
+          },
+          "crate_index__indoc-2.0.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1e186cfbae8084e513daff4240b4797e342f988cecda4fb6c939150f96315fd8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/indoc/2.0.4/download"
+              ],
+              "strip_prefix": "indoc-2.0.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"indoc\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=indoc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.4\",\n)\n"
+            }
+          },
+          "crate_index__inout-0.1.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a0c10553d664a4d0bcff9f4215d0aac67a639cc68ef660840afe309b807bc9f5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/inout/0.1.3/download"
+              ],
+              "strip_prefix": "inout-0.1.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"inout\",\n    deps = [\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=inout\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.3\",\n)\n"
+            }
+          },
+          "crate_index__instant-0.1.12": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7a5bbe824c507c5da5956355e86a746d82e0e1464f65d862cc5e71da70e94b2c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/instant/0.1.12/download"
+              ],
+              "strip_prefix": "instant-0.1.12",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"instant\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=instant\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.12\",\n)\n"
+            }
+          },
+          "crate_index__inventory-0.3.17": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3b31349d02fe60f80bbbab1a9402364cad7460626d6030494b08ac4a2075bf81",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/inventory/0.3.17/download"
+              ],
+              "strip_prefix": "inventory-0.3.17",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"inventory\",\n    proc_macro_deps = select({\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__rustversion-1.0.14//:rustversion\",  # cfg(target_family = \"wasm\")\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__rustversion-1.0.14//:rustversion\",  # cfg(target_family = \"wasm\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=inventory\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.17\",\n)\n"
+            }
+          },
+          "crate_index__ipnet-2.10.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ddc24109865250148c2e0f3d25d4f0f479571723792d3802153c60922a4fb708",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ipnet/2.10.1/download"
+              ],
+              "strip_prefix": "ipnet-2.10.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ipnet\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ipnet\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.10.1\",\n)\n"
+            }
+          },
+          "crate_index__is-terminal-0.4.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "cb0889898416213fab133e1d33a0e5858a48177452750691bde3666d0fdbaf8b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/is-terminal/0.4.9/download"
+              ],
+              "strip_prefix": "is-terminal-0.4.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"is_terminal\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=is-terminal\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.9\",\n)\n"
+            }
+          },
+          "crate_index__itertools-0.13.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "413ee7dfc52ee1a4949ceeb7dbc8a33f2d6c088194d9f922fb8318faf1f01186",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/itertools/0.13.0/download"
+              ],
+              "strip_prefix": "itertools-0.13.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"itertools\",\n    deps = [\n        \"@crate_index__either-1.13.0//:either\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"use_alloc\",\n        \"use_std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=itertools\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.0\",\n)\n"
+            }
+          },
+          "crate_index__itoa-1.0.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "af150ab688ff2122fcef229be89cb50dd66af9e01a4ff320cc137eecc9bacc38",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/itoa/1.0.9/download"
+              ],
+              "strip_prefix": "itoa-1.0.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"itoa\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=itoa\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.9\",\n)\n"
+            }
+          },
+          "crate_index__js-sys-0.3.64": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c5f195fe497f702db0f318b07fdd68edb16955aed830df8363d837542f8f935a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/js-sys/0.3.64/download"
+              ],
+              "strip_prefix": "js-sys-0.3.64",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"js_sys\",\n    deps = [\n        \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=js-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.64\",\n)\n"
+            }
+          },
+          "crate_index__keccak-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ecc2af9a1119c51f12a14607e783cb977bde58bc069ff0c3da1095e635d70654",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/keccak/0.1.5/download"
+              ],
+              "strip_prefix": "keccak-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"keccak\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(target_arch = \"aarch64\")\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(target_arch = \"aarch64\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=keccak\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n"
+            }
+          },
+          "crate_index__lazy_static-1.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/lazy_static/1.4.0/download"
+              ],
+              "strip_prefix": "lazy_static-1.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"lazy_static\",\n    deps = [\n        \"@crate_index__spin-0.5.2//:spin\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"spin\",\n        \"spin_no_std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=lazy_static\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.4.0\",\n)\n"
+            }
+          },
+          "crate_index__libc-0.2.169": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b5aba8db14291edd000dfcc4d620c7ebfb122c613afb886ca8803fa4e128a20a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libc/0.2.169/download"
+              ],
+              "strip_prefix": "libc-0.2.169",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libc\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"extra_traits\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"extra_traits\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"extra_traits\",  # wasm32-unknown-unknown\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"extra_traits\",  # wasm32-wasip1\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"extra_traits\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"extra_traits\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.169\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"extra_traits\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"extra_traits\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"extra_traits\",  # wasm32-unknown-unknown\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"extra_traits\",  # wasm32-wasip1\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"extra_traits\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"extra_traits\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"libc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.169\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__libftdi1-sys-1.1.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3ff6928872c7d13bec3c8a60c4c92f41f6252f3369b7552a5b4f9c90c8ba2338",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libftdi1-sys/1.1.2/download"
+              ],
+              "strip_prefix": "libftdi1-sys-1.1.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libftdi1_sys\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__libftdi1-sys-1.1.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libftdi1-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__vcpkg-0.2.15//:vcpkg\",  # cfg(all(windows, target_env = \"msvc\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__pkg-config-0.3.27//:pkg_config\",  # cfg(not(all(windows, target_env = \"msvc\")))\n        ],\n        \"//conditions:default\": [],\n    }),\n    edition = \"2018\",\n    links = \"ftdi1\",\n    pkg_name = \"libftdi1-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libftdi1-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.1.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__libloading-0.7.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b67380fd3b2fbe7527a606e18729d21c6f3951633d0500574c4dc22d2d638b9f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libloading/0.7.4/download"
+              ],
+              "strip_prefix": "libloading-0.7.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libloading\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libloading\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.4\",\n)\n"
+            }
+          },
+          "crate_index__libloading-0.8.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0c2a198fb6b0eada2a8df47933734e6d35d350665a33a3593d7164fa52c75c19",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libloading/0.8.3/download"
+              ],
+              "strip_prefix": "libloading-0.8.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libloading\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-targets-0.52.6//:windows_targets\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libloading\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.3\",\n)\n"
+            }
+          },
+          "crate_index__libm-0.2.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "4ec2a862134d2a7d32d7983ddcdd1c4923530833c9f2ea1a44fc5fa473989058",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libm/0.2.8/download"
+              ],
+              "strip_prefix": "libm-0.2.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libm\",\n    deps = [\n        \"@crate_index__libm-0.2.8//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.8\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"libm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.8\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__libudev-0.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "78b324152da65df7bb95acfcaab55e3097ceaab02fb19b228a9eb74d55f135e0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libudev/0.3.0/download"
+              ],
+              "strip_prefix": "libudev-0.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libudev\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__libudev-sys-0.1.4//:libudev_sys\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libudev\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.0\",\n)\n"
+            }
+          },
+          "crate_index__libudev-sys-0.1.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [
+                "-p1"
+              ],
+              "patch_tool": "",
+              "patches": [
+                "@@//third_party/rust/patches:libudev-sys-0.1.4.patch"
+              ],
+              "remote_patch_strip": 1,
+              "sha256": "3c8469b4a23b962c1396b9b451dda50ef5b283e8dd309d69033475fa9b334324",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libudev-sys/0.1.4/download"
+              ],
+              "strip_prefix": "libudev-sys-0.1.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libudev_sys\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__libudev-sys-0.1.4//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libudev-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.4\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__pkg-config-0.3.27//:pkg_config\",\n    ],\n    edition = \"2015\",\n    links = \"libudev\",\n    pkg_name = \"libudev-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libudev-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.4\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__libusb1-sys-0.7.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "da050ade7ac4ff1ba5379af847a10a10a8e284181e060105bf8d86960ce9ce0f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libusb1-sys/0.7.0/download"
+              ],
+              "strip_prefix": "libusb1-sys-0.7.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libusb1_sys\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__libusb1-sys-0.7.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libusb1-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n        \"@crate_index__pkg-config-0.3.27//:pkg_config\",\n    ] + select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__vcpkg-0.2.15//:vcpkg\",  # cfg(target_os = \"windows\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    edition = \"2018\",\n    links = \"usb-1.0\",\n    pkg_name = \"libusb1-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libusb1-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.7.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__linux-raw-sys-0.4.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "57bcfdad1b858c2db7c38303a6d2ad4dfaf5eb53dfeb0910128b2c26d6158503",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/linux-raw-sys/0.4.5/download"
+              ],
+              "strip_prefix": "linux-raw-sys-0.4.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"linux_raw_sys\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"errno\",\n        \"general\",\n        \"if_ether\",\n        \"ioctl\",\n        \"net\",\n        \"netlink\",\n        \"no_std\",\n        \"prctl\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=linux-raw-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.5\",\n)\n"
+            }
+          },
+          "crate_index__lock_api-0.4.10": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c1cc9717a20b1bb222f333e6a92fd32f7d8a18ddc5a3191a11af45dcbf4dcd16",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/lock_api/0.4.10/download"
+              ],
+              "strip_prefix": "lock_api-0.4.10",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"lock_api\",\n    deps = [\n        \"@crate_index__lock_api-0.4.10//:build_script_build\",\n        \"@crate_index__scopeguard-1.2.0//:scopeguard\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"atomic_usize\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=lock_api\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.10\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"atomic_usize\",\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"lock_api\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=lock_api\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.4.10\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__log-0.4.20": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b5e6163cb8c49088c2c36f57875e58ccd8c87c7427f7fbd50ea6710b2f3f2e8f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/log/0.4.20/download"
+              ],
+              "strip_prefix": "log-0.4.20",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"log\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=log\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.20\",\n)\n"
+            }
+          },
+          "crate_index__mac-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c41e0c4fef86961ac6d6f8a82609f55f31b05e4fce149ac5710e439df7619ba4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mac/0.1.1/download"
+              ],
+              "strip_prefix": "mac-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mac\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mac\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__mach-0.1.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2fd13ee2dd61cc82833ba05ade5a30bb3d63f7ced605ef827063c63078302de9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mach/0.1.2/download"
+              ],
+              "strip_prefix": "mach-0.1.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mach\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mach\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.2\",\n)\n"
+            }
+          },
+          "crate_index__mach2-0.4.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6d0d1830bcd151a6fc4aea1369af235b36c1528fe976b8ff678683c9995eade8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mach2/0.4.1/download"
+              ],
+              "strip_prefix": "mach2-0.4.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mach2\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(any(target_os = \"macos\", target_os = \"ios\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mach2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.1\",\n)\n"
+            }
+          },
+          "crate_index__maplit-1.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3e2e65a1a2e43cfcb47a895c4c8b10d1f4a61097f9f254f183aee60cad9c651d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/maplit/1.0.2/download"
+              ],
+              "strip_prefix": "maplit-1.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"maplit\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=maplit\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.2\",\n)\n"
+            }
+          },
+          "crate_index__markup5ever-0.11.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7a2629bb1404f3d34c2e921f21fd34ba00b206124c81f65c50b43b6aaefeb016",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/markup5ever/0.11.0/download"
+              ],
+              "strip_prefix": "markup5ever-0.11.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"markup5ever\",\n    deps = [\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__markup5ever-0.11.0//:build_script_build\",\n        \"@crate_index__phf-0.10.1//:phf\",\n        \"@crate_index__string_cache-0.8.7//:string_cache\",\n        \"@crate_index__tendril-0.4.3//:tendril\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=markup5ever\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.11.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__phf_codegen-0.10.0//:phf_codegen\",\n        \"@crate_index__string_cache_codegen-0.5.2//:string_cache_codegen\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"markup5ever\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=markup5ever\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.11.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__mdbook-0.4.34": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [
+                "-p1"
+              ],
+              "patch_tool": "",
+              "patches": [
+                "@@//third_party/rust/patches:mdbook-landing-page-links.patch"
+              ],
+              "remote_patch_strip": 1,
+              "sha256": "c55eb7c4dad20cc5bc15181c2aaf43d5689d5c3e0b80b50cc4cf0b7fe72a26d9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mdbook/0.4.34/download"
+              ],
+              "strip_prefix": "mdbook-0.4.34",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\n    \"@rules_rust//rust:defs.bzl\",\n    \"rust_binary\",\n    \"rust_library\",\n)\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mdbook\",\n    deps = [\n        \"@crate_index__ammonia-3.3.0//:ammonia\",\n        \"@crate_index__anyhow-1.0.75//:anyhow\",\n        \"@crate_index__chrono-0.4.40//:chrono\",\n        \"@crate_index__clap-4.4.7//:clap\",\n        \"@crate_index__clap_complete-4.4.0//:clap_complete\",\n        \"@crate_index__elasticlunr-rs-3.0.2//:elasticlunr\",\n        \"@crate_index__env_logger-0.10.0//:env_logger\",\n        \"@crate_index__handlebars-4.3.7//:handlebars\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__opener-0.6.1//:opener\",\n        \"@crate_index__pulldown-cmark-0.9.3//:pulldown_cmark\",\n        \"@crate_index__regex-1.9.4//:regex\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:serde_json\",\n        \"@crate_index__shlex-1.1.0//:shlex\",\n        \"@crate_index__tempfile-3.8.0//:tempfile\",\n        \"@crate_index__toml-0.5.11//:toml\",\n        \"@crate_index__topological-sort-0.2.2//:topological_sort\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"search\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mdbook\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.34\",\n)\n\nrust_binary(\n    name = \"mdbook__bin\",\n    deps = [\n        \":mdbook\",\n        \"@crate_index__ammonia-3.3.0//:ammonia\",\n        \"@crate_index__anyhow-1.0.75//:anyhow\",\n        \"@crate_index__chrono-0.4.40//:chrono\",\n        \"@crate_index__clap-4.4.7//:clap\",\n        \"@crate_index__clap_complete-4.4.0//:clap_complete\",\n        \"@crate_index__elasticlunr-rs-3.0.2//:elasticlunr\",\n        \"@crate_index__env_logger-0.10.0//:env_logger\",\n        \"@crate_index__handlebars-4.3.7//:handlebars\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__opener-0.6.1//:opener\",\n        \"@crate_index__pulldown-cmark-0.9.3//:pulldown_cmark\",\n        \"@crate_index__regex-1.9.4//:regex\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:serde_json\",\n        \"@crate_index__shlex-1.1.0//:shlex\",\n        \"@crate_index__tempfile-3.8.0//:tempfile\",\n        \"@crate_index__toml-0.5.11//:toml\",\n        \"@crate_index__topological-sort-0.2.2//:topological_sort\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"search\",\n    ],\n    crate_root = \"src/main.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mdbook\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.34\",\n)\n"
+            }
+          },
+          "crate_index__memchr-2.6.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f665ee40bc4a3c5590afb1e9677db74a508659dfd71e126420da8274909a0167",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/memchr/2.6.4/download"
+              ],
+              "strip_prefix": "memchr-2.6.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"memchr\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=memchr\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.6.4\",\n)\n"
+            }
+          },
+          "crate_index__memoffset-0.9.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5a634b1c61a95585bd15607c6ab0c4e5b226e695ff2800ba0cdccddf208c406c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/memoffset/0.9.0/download"
+              ],
+              "strip_prefix": "memoffset-0.9.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"memoffset\",\n    deps = [\n        \"@crate_index__memoffset-0.9.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=memoffset\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"memoffset\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=memoffset\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.9.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__mime-0.3.17": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6877bb514081ee2a7ff5ef9de3281f14a4dd4bceac4c09388074a6b5df8a139a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mime/0.3.17/download"
+              ],
+              "strip_prefix": "mime-0.3.17",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mime\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mime\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.17\",\n)\n"
+            }
+          },
+          "crate_index__miniz_oxide-0.7.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e7810e0be55b428ada41041c41f32c9f1a42817901b4ccf45fa3d4b6561e74c7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/miniz_oxide/0.7.1/download"
+              ],
+              "strip_prefix": "miniz_oxide-0.7.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"miniz_oxide\",\n    deps = [\n        \"@crate_index__adler-1.0.2//:adler\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"with-alloc\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=miniz_oxide\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.1\",\n)\n"
+            }
+          },
+          "crate_index__mio-0.8.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "927a765cd3fc26206e66b296465fa9d3e5ab003e651c1b3c060e7956d96b19d2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mio/0.8.8/download"
+              ],
+              "strip_prefix": "mio-0.8.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mio\",\n    deps = [\n        \"@crate_index__log-0.4.20//:log\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(target_os = \"wasi\")\n            \"@crate_index__wasi-0.11.0-wasi-snapshot-preview1//:wasi\",  # cfg(target_os = \"wasi\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"log\",\n        \"net\",\n        \"os-ext\",\n        \"os-poll\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mio\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.8\",\n)\n"
+            }
+          },
+          "crate_index__mio-1.0.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2886843bf800fba2e3377cff24abf6379b4c4d5c6681eaf9ea5b0d15090450bd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mio/1.0.3/download"
+              ],
+              "strip_prefix": "mio-1.0.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mio\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(target_os = \"wasi\")\n            \"@crate_index__wasi-0.11.0-wasi-snapshot-preview1//:wasi\",  # cfg(target_os = \"wasi\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.52.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"net\",\n        \"os-ext\",\n        \"os-poll\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mio\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.3\",\n)\n"
+            }
+          },
+          "crate_index__mio-signals-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "21e9524e26c8749824640a1282b68a695b21d55862efa6d465b5f71107c93368",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/mio-signals/0.2.0/download"
+              ],
+              "strip_prefix": "mio-signals-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"mio_signals\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__mio-0.8.8//:mio\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=mio-signals\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
+          },
+          "crate_index__native-tls-0.2.12": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a8614eb2c83d59d1c8cc974dd3f920198647674a0a035e1af1fa58707e317466",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/native-tls/0.2.12/download"
+              ],
+              "strip_prefix": "native-tls-0.2.12",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"native_tls\",\n    deps = [\n        \"@crate_index__native-tls-0.2.12//:build_script_build\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(target_vendor = \"apple\")\n            \"@crate_index__security-framework-2.10.0//:security_framework\",  # cfg(target_vendor = \"apple\")\n            \"@crate_index__security-framework-sys-2.14.0//:security_framework_sys\",  # cfg(target_vendor = \"apple\")\n            \"@crate_index__tempfile-3.8.0//:tempfile\",  # cfg(target_os = \"macos\")\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-0.10.64//:openssl\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-probe-0.1.5//:openssl_probe\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-0.10.64//:openssl\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-probe-0.1.5//:openssl_probe\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-0.10.64//:openssl\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-probe-0.1.5//:openssl_probe\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__schannel-0.1.27//:schannel\",  # cfg(target_os = \"windows\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-0.10.64//:openssl\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-probe-0.1.5//:openssl_probe\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-0.10.64//:openssl\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-probe-0.1.5//:openssl_probe\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=native-tls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.12\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    link_deps = select({\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",  # cfg(not(any(target_os = \"windows\", target_vendor = \"apple\")))\n        ],\n        \"//conditions:default\": [],\n    }),\n    edition = \"2015\",\n    pkg_name = \"native-tls\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=native-tls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.12\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__nb-0.1.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "801d31da0513b6ec5214e9bf433a77966320625a37860f910be265be6e18d06f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/nb/0.1.3/download"
+              ],
+              "strip_prefix": "nb-0.1.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"nb\",\n    deps = [\n        \"@crate_index__nb-1.1.0//:nb\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"unstable\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=nb\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.3\",\n)\n"
+            }
+          },
+          "crate_index__nb-1.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/nb/1.1.0/download"
+              ],
+              "strip_prefix": "nb-1.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"nb\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=nb\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.0\",\n)\n"
+            }
+          },
+          "crate_index__new_debug_unreachable-1.0.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e4a24736216ec316047a1fc4252e27dabb04218aa4a3f37c6e7ddbf1f9782b54",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/new_debug_unreachable/1.0.4/download"
+              ],
+              "strip_prefix": "new_debug_unreachable-1.0.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"debug_unreachable\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=new_debug_unreachable\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.4\",\n)\n"
+            }
+          },
+          "crate_index__nix-0.26.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "598beaf3cc6fdd9a5dfb1630c2800c7acd31df7aaf0f565796fba2b53ca1af1b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/nix/0.26.4/download"
+              ],
+              "strip_prefix": "nix-0.26.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"nix\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"fs\",\n        \"ioctl\",\n        \"poll\",\n        \"process\",\n        \"signal\",\n        \"term\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=nix\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.26.4\",\n)\n"
+            }
+          },
+          "crate_index__normpath-1.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ec60c60a693226186f5d6edf073232bfb6464ed97eb22cf3b01c1e8198fd97f5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/normpath/1.1.1/download"
+              ],
+              "strip_prefix": "normpath-1.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"normpath\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=normpath\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.1\",\n)\n"
+            }
+          },
+          "crate_index__num-bigint-0.4.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "608e7659b5c3d7cba262d894801b9ec9d00de989e8a82bd4bef91d08da45cdc0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/num-bigint/0.4.4/download"
+              ],
+              "strip_prefix": "num-bigint-0.4.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_bigint\",\n    deps = [\n        \"@crate_index__num-bigint-0.4.4//:build_script_build\",\n        \"@crate_index__num-integer-0.1.45//:num_integer\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-bigint\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.4\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"num-bigint\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-bigint\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.4.4\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__num-bigint-dig-0.8.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "dc84195820f291c7697304f3cbdadd1cb7199c0efc917ff5eafd71225c136151",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/num-bigint-dig/0.8.4/download"
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+              "strip_prefix": "num-bigint-dig-0.8.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_bigint_dig\",\n    deps = [\n        \"@crate_index__byteorder-1.5.0//:byteorder\",\n        \"@crate_index__lazy_static-1.4.0//:lazy_static\",\n        \"@crate_index__libm-0.2.8//:libm\",\n        \"@crate_index__num-bigint-dig-0.8.4//:build_script_build\",\n        \"@crate_index__num-integer-0.1.45//:num_integer\",\n        \"@crate_index__num-iter-0.1.43//:num_iter\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n        \"@crate_index__rand-0.8.5//:rand\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__smallvec-1.13.2//:smallvec\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"i128\",\n        \"prime\",\n        \"rand\",\n        \"serde\",\n        \"std\",\n        \"u64_digit\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-bigint-dig\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.4\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"i128\",\n        \"prime\",\n        \"rand\",\n        \"serde\",\n        \"std\",\n        \"u64_digit\",\n        \"zeroize\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"num-bigint-dig\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-bigint-dig\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.8.4\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+              "remote_patch_strip": 1,
+              "sha256": "51d515d32fb182ee37cda2ccdcb92950d6a3c2893aa280e540671c2cd0f3b1d9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/num-conv/0.1.0/download"
+              ],
+              "strip_prefix": "num-conv-0.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_conv\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-conv\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.0\",\n)\n"
+            }
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+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/num-integer/0.1.45/download"
+              ],
+              "strip_prefix": "num-integer-0.1.45",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_integer\",\n    deps = [\n        \"@crate_index__num-integer-0.1.45//:build_script_build\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"i128\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-integer\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.45\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"i128\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"num-integer\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-integer\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.45\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
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+              "remote_patch_strip": 1,
+              "sha256": "7d03e6c028c5dc5cac6e2dec0efda81fc887605bb3d884578bb6d6bf7514e252",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/num-iter/0.1.43/download"
+              ],
+              "strip_prefix": "num-iter-0.1.43",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_iter\",\n    deps = [\n        \"@crate_index__num-integer-0.1.45//:num_integer\",\n        \"@crate_index__num-iter-0.1.43//:build_script_build\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-iter\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.43\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"num-iter\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-iter\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.1.43\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_traits\",\n    deps = [\n        \"@crate_index__libm-0.2.8//:libm\",\n        \"@crate_index__num-traits-0.2.17//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"i128\",\n        \"libm\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-traits\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.17\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"i128\",\n        \"libm\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"num-traits\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num-traits\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.17\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"num_enum\",\n    proc_macro_deps = [\n        \"@crate_index__num_enum_derive-0.7.0//:num_enum_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num_enum\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.0\",\n)\n"
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"num_enum_derive\",\n    deps = [\n        \"@crate_index__proc-macro-crate-1.3.1//:proc_macro_crate\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"proc-macro-crate\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=num_enum_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.0\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
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+              "type": "tar.gz",
+              "urls": [
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+              ],
+              "strip_prefix": "number_prefix-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"number_prefix\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=number_prefix\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n"
+            }
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+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/object/0.32.1/download"
+              ],
+              "strip_prefix": "object-0.32.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"object\",\n    deps = [\n        \"@crate_index__memchr-2.6.4//:memchr\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"archive\",\n        \"coff\",\n        \"elf\",\n        \"macho\",\n        \"pe\",\n        \"read_core\",\n        \"unaligned\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=object\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.32.1\",\n)\n"
+            }
+          },
+          "crate_index__object-0.36.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/object/0.36.7/download"
+              ],
+              "strip_prefix": "object-0.36.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"object\",\n    deps = [\n        \"@crate_index__flate2-1.0.28//:flate2\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__object-0.36.7//:build_script_build\",\n        \"@crate_index__ruzstd-0.7.3//:ruzstd\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"archive\",\n        \"coff\",\n        \"compression\",\n        \"default\",\n        \"elf\",\n        \"macho\",\n        \"pe\",\n        \"read\",\n        \"read_core\",\n        \"std\",\n        \"unaligned\",\n        \"xcoff\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=object\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.36.7\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"archive\",\n        \"coff\",\n        \"compression\",\n        \"default\",\n        \"elf\",\n        \"macho\",\n        \"pe\",\n        \"read\",\n        \"read_core\",\n        \"std\",\n        \"unaligned\",\n        \"xcoff\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"object\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=object\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.36.7\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__once_cell-1.18.0": {
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+              "urls": [
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+              ],
+              "strip_prefix": "once_cell-1.18.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"once_cell\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"race\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=once_cell\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.18.0\",\n)\n"
+            }
+          },
+          "crate_index__opener-0.6.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6c62dcb6174f9cb326eac248f07e955d5d559c272730b6c03e396b443b562788",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/opener/0.6.1/download"
+              ],
+              "strip_prefix": "opener-0.6.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"opener\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__bstr-1.6.2//:bstr\",  # cfg(target_os = \"linux\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__normpath-1.1.1//:normpath\",  # cfg(windows)\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__bstr-1.6.2//:bstr\",  # cfg(target_os = \"linux\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__bstr-1.6.2//:bstr\",  # cfg(target_os = \"linux\")\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=opener\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.1\",\n)\n"
+            }
+          },
+          "crate_index__openssl-0.10.64": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "95a0481286a310808298130d22dd1fef0fa571e05a8f44ec801801e84b216b1f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/openssl/0.10.64/download"
+              ],
+              "strip_prefix": "openssl-0.10.64",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"openssl\",\n    deps = [\n        \"@crate_index__bitflags-2.4.0//:bitflags\",\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__foreign-types-0.3.2//:foreign_types\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__openssl-0.10.64//:build_script_build\",\n        \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__openssl-macros-0.1.1//:openssl_macros\",\n    ],\n    aliases = {\n        \"@crate_index__openssl-sys-0.9.102//:openssl_sys\": \"ffi\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.64\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    link_deps = [\n        \"@crate_index__openssl-sys-0.9.102//:openssl_sys\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"openssl\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.10.64\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__openssl-macros-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a948666b637a0f465e8564c73e89d4dde00d72d4d473cc972f390fc3dcee7d9c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/openssl-macros/0.1.1/download"
+              ],
+              "strip_prefix": "openssl-macros-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"openssl_macros\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl-macros\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__openssl-probe-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/openssl-probe/0.1.5/download"
+              ],
+              "strip_prefix": "openssl-probe-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"openssl_probe\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl-probe\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n"
+            }
+          },
+          "crate_index__openssl-sys-0.9.102": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c597637d56fbc83893a35eb0dd04b2b8e7a50c91e64e9493e398b5df4fb45fa2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/openssl-sys/0.9.102/download"
+              ],
+              "strip_prefix": "openssl-sys-0.9.102",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"openssl_sys\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__openssl-sys-0.9.102//:build_script_main\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.102\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    build_script_env = {\n        \"OPENSSL_STATIC\": \"1\",\n        \"PKG_CONFIG_PATH\": \"$(OPENSSL_PKG_CONFIG_PATH)\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_main\",\n    crate_root = \"build/main.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n        \"@crate_index__pkg-config-0.3.27//:pkg_config\",\n        \"@crate_index__vcpkg-0.2.15//:vcpkg\",\n    ],\n    edition = \"2018\",\n    links = \"openssl\",\n    pkg_name = \"openssl-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=openssl-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    toolchains = [\"@@//third_party/rust:openssl_pkg_config_path\"],\n    version = \"0.9.102\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_main\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__option-ext-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "04744f49eae99ab78e0d5c0b603ab218f515ea8cfe5a456d7629ad883a3b6e7d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/option-ext/0.2.0/download"
+              ],
+              "strip_prefix": "option-ext-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"option_ext\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=option-ext\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
+          },
+          "crate_index__p256-0.13.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c9863ad85fa8f4460f9c48cb909d38a0d689dba1f6f6988a5e3e0d31071bcd4b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/p256/0.13.2/download"
+              ],
+              "strip_prefix": "p256-0.13.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"p256\",\n    deps = [\n        \"@crate_index__ecdsa-0.16.9//:ecdsa\",\n        \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n        \"@crate_index__primeorder-0.13.2//:primeorder\",\n        \"@crate_index__sha2-0.10.7//:sha2\",\n    ],\n    aliases = {\n        \"@crate_index__ecdsa-0.16.9//:ecdsa\": \"ecdsa_core\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"arithmetic\",\n        \"default\",\n        \"digest\",\n        \"ecdsa\",\n        \"ecdsa-core\",\n        \"pem\",\n        \"pkcs8\",\n        \"sha2\",\n        \"sha256\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=p256\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.2\",\n)\n"
+            }
+          },
+          "crate_index__p384-0.13.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "70786f51bcc69f6a4c0360e063a4cac5419ef7c5cd5b3c99ad70f3be5ba79209",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/p384/0.13.0/download"
+              ],
+              "strip_prefix": "p384-0.13.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"p384\",\n    deps = [\n        \"@crate_index__ecdsa-0.16.9//:ecdsa\",\n        \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n        \"@crate_index__primeorder-0.13.2//:primeorder\",\n        \"@crate_index__sha2-0.10.7//:sha2\",\n    ],\n    aliases = {\n        \"@crate_index__ecdsa-0.16.9//:ecdsa\": \"ecdsa_core\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"arithmetic\",\n        \"default\",\n        \"digest\",\n        \"ecdh\",\n        \"ecdsa\",\n        \"ecdsa-core\",\n        \"pem\",\n        \"pkcs8\",\n        \"sha2\",\n        \"sha384\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=p384\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.0\",\n)\n"
+            }
+          },
+          "crate_index__parking_lot-0.12.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3742b2c103b9f06bc9fff0a37ff4912935851bee6d36f3c02bcc755bcfec228f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/parking_lot/0.12.1/download"
+              ],
+              "strip_prefix": "parking_lot-0.12.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"parking_lot\",\n    deps = [\n        \"@crate_index__lock_api-0.4.10//:lock_api\",\n        \"@crate_index__parking_lot_core-0.9.8//:parking_lot_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=parking_lot\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.12.1\",\n)\n"
+            }
+          },
+          "crate_index__parking_lot_core-0.9.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "93f00c865fe7cabf650081affecd3871070f26767e7b2070a3ffae14c654b447",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/parking_lot_core/0.9.8/download"
+              ],
+              "strip_prefix": "parking_lot_core-0.9.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"parking_lot_core\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__parking_lot_core-0.9.8//:build_script_build\",\n        \"@crate_index__smallvec-1.13.2//:smallvec\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-targets-0.48.5//:windows_targets\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=parking_lot_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.8\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"parking_lot_core\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=parking_lot_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.9.8\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__paste-1.0.14": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "de3145af08024dea9fa9914f381a17b8fc6034dfb00f3a84013f7ff43f29ed4c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/paste/1.0.14/download"
+              ],
+              "strip_prefix": "paste-1.0.14",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"paste\",\n    deps = [\n        \"@crate_index__paste-1.0.14//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=paste\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.14\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"paste\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=paste\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.14\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__pem-rfc7468-0.7.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "88b39c9bfcfc231068454382784bb460aae594343fb030d46e9f50a645418412",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pem-rfc7468/0.7.0/download"
+              ],
+              "strip_prefix": "pem-rfc7468-0.7.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pem_rfc7468\",\n    deps = [\n        \"@crate_index__base64ct-1.6.0//:base64ct\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pem-rfc7468\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.0\",\n)\n"
+            }
+          },
+          "crate_index__percent-encoding-2.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9b2a4787296e9989611394c33f193f676704af1686e70b8f8033ab5ba9a35a94",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/percent-encoding/2.3.0/download"
+              ],
+              "strip_prefix": "percent-encoding-2.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"percent_encoding\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=percent-encoding\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.3.0\",\n)\n"
+            }
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+          "crate_index__pest-2.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d7a4d085fd991ac8d5b05a147b437791b4260b76326baf0fc60cf7c9c27ecd33",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pest/2.7.3/download"
+              ],
+              "strip_prefix": "pest-2.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pest\",\n    deps = [\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__thiserror-1.0.49//:thiserror\",\n        \"@crate_index__ucd-trie-0.1.6//:ucd_trie\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"memchr\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pest\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.7.3\",\n)\n"
+            }
+          },
+          "crate_index__pest_derive-2.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a2bee7be22ce7918f641a33f08e3f43388c7656772244e2bbb2477f44cc9021a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pest_derive/2.7.3/download"
+              ],
+              "strip_prefix": "pest_derive-2.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"pest_derive\",\n    deps = [\n        \"@crate_index__pest-2.7.3//:pest\",\n        \"@crate_index__pest_generator-2.7.3//:pest_generator\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pest_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.7.3\",\n)\n"
+            }
+          },
+          "crate_index__pest_generator-2.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d1511785c5e98d79a05e8a6bc34b4ac2168a0e3e92161862030ad84daa223141",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pest_generator/2.7.3/download"
+              ],
+              "strip_prefix": "pest_generator-2.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pest_generator\",\n    deps = [\n        \"@crate_index__pest-2.7.3//:pest\",\n        \"@crate_index__pest_meta-2.7.3//:pest_meta\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pest_generator\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.7.3\",\n)\n"
+            }
+          },
+          "crate_index__pest_meta-2.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b42f0394d3123e33353ca5e1e89092e533d2cc490389f2bd6131c43c634ebc5f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pest_meta/2.7.3/download"
+              ],
+              "strip_prefix": "pest_meta-2.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pest_meta\",\n    deps = [\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__pest-2.7.3//:pest\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pest_meta\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.7.3\",\n)\n"
+            }
+          },
+          "crate_index__phf-0.10.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fabbf1ead8a5bcbc20f5f8b939ee3f5b0f6f281b6ad3468b84656b658b455259",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/phf/0.10.1/download"
+              ],
+              "strip_prefix": "phf-0.10.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"phf\",\n    deps = [\n        \"@crate_index__phf_shared-0.10.0//:phf_shared\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=phf\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.1\",\n)\n"
+            }
+          },
+          "crate_index__phf_codegen-0.10.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "4fb1c3a8bc4dd4e5cfce29b44ffc14bedd2ee294559a294e2a4d4c9e9a6a13cd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/phf_codegen/0.10.0/download"
+              ],
+              "strip_prefix": "phf_codegen-0.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"phf_codegen\",\n    deps = [\n        \"@crate_index__phf_generator-0.10.0//:phf_generator\",\n        \"@crate_index__phf_shared-0.10.0//:phf_shared\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=phf_codegen\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0\",\n)\n"
+            }
+          },
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5d5285893bb5eb82e6aaf5d59ee909a06a16737a8970984dd7746ba9283498d6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/phf_generator/0.10.0/download"
+              ],
+              "strip_prefix": "phf_generator-0.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"phf_generator\",\n    deps = [\n        \"@crate_index__phf_shared-0.10.0//:phf_shared\",\n        \"@crate_index__rand-0.8.5//:rand\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=phf_generator\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b6796ad771acdc0123d2a88dc428b5e38ef24456743ddb1744ed628f9815c096",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/phf_shared/0.10.0/download"
+              ],
+              "strip_prefix": "phf_shared-0.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"phf_shared\",\n    deps = [\n        \"@crate_index__siphasher-0.3.11//:siphasher\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=phf_shared\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0\",\n)\n"
+            }
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+          "crate_index__pin-project-lite-0.2.16": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3b3cff922bd51709b605d9ead9aa71031d81447142d828eb4a6eba76fe619f9b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pin-project-lite/0.2.16/download"
+              ],
+              "strip_prefix": "pin-project-lite-0.2.16",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pin_project_lite\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pin-project-lite\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.16\",\n)\n"
+            }
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+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pin-utils/0.1.0/download"
+              ],
+              "strip_prefix": "pin-utils-0.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pin_utils\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pin-utils\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.0\",\n)\n"
+            }
+          },
+          "crate_index__pkcs1-0.7.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c8ffb9f10fa047879315e6625af03c164b16962a5368d724ed16323b68ace47f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pkcs1/0.7.5/download"
+              ],
+              "strip_prefix": "pkcs1-0.7.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pkcs1\",\n    deps = [\n        \"@crate_index__der-0.7.8//:der\",\n        \"@crate_index__pkcs8-0.10.2//:pkcs8\",\n        \"@crate_index__spki-0.7.3//:spki\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"pem\",\n        \"pkcs8\",\n        \"std\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pkcs1\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.5\",\n)\n"
+            }
+          },
+          "crate_index__pkcs8-0.10.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f950b2377845cebe5cf8b5165cb3cc1a5e0fa5cfa3e1f7f55707d8fd82e0a7b7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pkcs8/0.10.2/download"
+              ],
+              "strip_prefix": "pkcs8-0.10.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pkcs8\",\n    deps = [\n        \"@crate_index__der-0.7.8//:der\",\n        \"@crate_index__spki-0.7.3//:spki\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"pem\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pkcs8\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.2\",\n)\n"
+            }
+          },
+          "crate_index__pkg-config-0.3.27": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "26072860ba924cbfa98ea39c8c19b4dd6a4a25423dbdf219c1eca91aa0cf6964",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pkg-config/0.3.27/download"
+              ],
+              "strip_prefix": "pkg-config-0.3.27",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pkg_config\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pkg-config\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.27\",\n)\n"
+            }
+          },
+          "crate_index__portable-atomic-1.4.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "31114a898e107c51bb1609ffaf55a0e011cf6a4d7f1170d0015a165082c0338b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/portable-atomic/1.4.3/download"
+              ],
+              "strip_prefix": "portable-atomic-1.4.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"portable_atomic\",\n    deps = [\n        \"@crate_index__portable-atomic-1.4.3//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"fallback\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=portable-atomic\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.4.3\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"fallback\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"portable-atomic\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=portable-atomic\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.4.3\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__powerfmt-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/powerfmt/0.2.0/download"
+              ],
+              "strip_prefix": "powerfmt-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"powerfmt\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=powerfmt\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
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+          "crate_index__ppv-lite86-0.2.17": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5b40af805b3121feab8a3c29f04d8ad262fa8e0561883e7653e024ae4479e6de",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ppv-lite86/0.2.17/download"
+              ],
+              "strip_prefix": "ppv-lite86-0.2.17",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ppv_lite86\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"simd\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ppv-lite86\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.17\",\n)\n"
+            }
+          },
+          "crate_index__precomputed-hash-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "925383efa346730478fb4838dbe9137d2a47675ad789c546d150a6e1dd4ab31c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/precomputed-hash/0.1.1/download"
+              ],
+              "strip_prefix": "precomputed-hash-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"precomputed_hash\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=precomputed-hash\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__primeorder-0.13.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3c2fcef82c0ec6eefcc179b978446c399b3cdf73c392c35604e399eee6df1ee3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/primeorder/0.13.2/download"
+              ],
+              "strip_prefix": "primeorder-0.13.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"primeorder\",\n    deps = [\n        \"@crate_index__elliptic-curve-0.13.8//:elliptic_curve\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=primeorder\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.13.2\",\n)\n"
+            }
+          },
+          "crate_index__proc-macro-crate-1.3.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7f4c021e1093a56626774e81216a4ce732a735e5bad4868a03f3ed65ca0c3919",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/proc-macro-crate/1.3.1/download"
+              ],
+              "strip_prefix": "proc-macro-crate-1.3.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"proc_macro_crate\",\n    deps = [\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__toml_edit-0.19.14//:toml_edit\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=proc-macro-crate\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.3.1\",\n)\n"
+            }
+          },
+          "crate_index__proc-macro2-1.0.95": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "02b3e5e68a3a1a02aad3ec490a98007cbc13c37cbe84a3cd7b8e406d76e7f778",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/proc-macro2/1.0.95/download"
+              ],
+              "strip_prefix": "proc-macro2-1.0.95",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"proc_macro2\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:build_script_build\",\n        \"@crate_index__unicode-ident-1.0.12//:unicode_ident\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"proc-macro\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=proc-macro2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.95\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"proc-macro\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"proc-macro2\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=proc-macro2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.95\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__pulldown-cmark-0.9.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "77a1a2f1f0a7ecff9c31abbe177637be0e97a0aef46cf8738ece09327985d998",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/pulldown-cmark/0.9.3/download"
+              ],
+              "strip_prefix": "pulldown-cmark-0.9.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"pulldown_cmark\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__pulldown-cmark-0.9.3//:build_script_build\",\n        \"@crate_index__unicase-2.7.0//:unicase\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pulldown-cmark\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.3\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"pulldown-cmark\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=pulldown-cmark\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.9.3\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__quote-1.0.40": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1885c039570dc00dcb4ff087a89e185fd56bae234ddc7f056a945bf36467248d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/quote/1.0.40/download"
+              ],
+              "strip_prefix": "quote-1.0.40",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"quote\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"proc-macro\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=quote\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.40\",\n)\n"
+            }
+          },
+          "crate_index__radium-0.7.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "dc33ff2d4973d518d823d61aa239014831e521c75da58e3df4840d3f47749d09",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/radium/0.7.0/download"
+              ],
+              "strip_prefix": "radium-0.7.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"radium\",\n    deps = [\n        \"@crate_index__radium-0.7.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=radium\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"radium\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=radium\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.7.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rand-0.3.23": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "64ac302d8f83c0c1974bf758f6b041c6c8ada916fbb44a609158ca8b064cc76c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand/0.3.23/download"
+              ],
+              "strip_prefix": "rand-0.3.23",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__rand-0.4.6//:rand\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.23\",\n)\n"
+            }
+          },
+          "crate_index__rand-0.4.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "552840b97013b1a26992c11eac34bdd778e464601a4c2054b5f0bff7c6761293",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand/0.4.6/download"
+              ],
+              "strip_prefix": "rand-0.4.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"libc\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.6\",\n)\n"
+            }
+          },
+          "crate_index__rand-0.8.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "34af8d1a0e25924bc5b7c43c079c942339d8f0a8b57c39049bef581b46327404",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand/0.8.5/download"
+              ],
+              "strip_prefix": "rand-0.8.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand\",\n    deps = [\n        \"@crate_index__rand_chacha-0.3.1//:rand_chacha\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"getrandom\",\n        \"libc\",\n        \"rand_chacha\",\n        \"std\",\n        \"std_rng\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"small_rng\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"small_rng\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"small_rng\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"small_rng\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"small_rng\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.5\",\n)\n"
+            }
+          },
+          "crate_index__rand_chacha-0.3.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e6c10a63a0fa32252be49d21e7709d4d4baf8d231c2dbce1eaa8141b9b127d88",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand_chacha/0.3.1/download"
+              ],
+              "strip_prefix": "rand_chacha-0.3.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand_chacha\",\n    deps = [\n        \"@crate_index__ppv-lite86-0.2.17//:ppv_lite86\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand_chacha\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.1\",\n)\n"
+            }
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+          "crate_index__rand_core-0.3.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7a6fdeb83b075e8266dcc8762c22776f6877a63111121f5f8c7411e5be7eed4b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand_core/0.3.1/download"
+              ],
+              "strip_prefix": "rand_core-0.3.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand_core\",\n    deps = [\n        \"@crate_index__rand_core-0.4.2//:rand_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.1\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9c33a3c44ca05fa6f1807d8e6743f3824e8509beca625669633be0acbdf509dc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand_core/0.4.2/download"
+              ],
+              "strip_prefix": "rand_core-0.4.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand_core\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.2\",\n)\n"
+            }
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+          "crate_index__rand_core-0.6.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ec0be4795e2f6a28069bec0b5ff3e2ac9bafc99e6a9a7dc3547996c5c816922c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rand_core/0.6.4/download"
+              ],
+              "strip_prefix": "rand_core-0.6.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rand_core\",\n    deps = [\n        \"@crate_index__getrandom-0.2.10//:getrandom\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"getrandom\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rand_core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.4\",\n)\n"
+            }
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+          "crate_index__rdrand-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
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+              "remote_patch_strip": 1,
+              "sha256": "678054eb77286b51581ba43620cc911abf02758c91f93f479767aed0f90458b2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rdrand/0.4.0/download"
+              ],
+              "strip_prefix": "rdrand-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rdrand\",\n    deps = [\n        \"@crate_index__rand_core-0.3.1//:rand_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rdrand\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n"
+            }
+          },
+          "crate_index__redox_syscall-0.2.16": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fb5a58c1855b4b6819d59012155603f0b22ad30cad752600aadfcb695265519a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/redox_syscall/0.2.16/download"
+              ],
+              "strip_prefix": "redox_syscall-0.2.16",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"syscall\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=redox_syscall\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.16\",\n)\n"
+            }
+          },
+          "crate_index__redox_syscall-0.3.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "567664f262709473930a4bf9e51bf2ebf3348f2e748ccc50dea20646858f8f29",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/redox_syscall/0.3.5/download"
+              ],
+              "strip_prefix": "redox_syscall-0.3.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"syscall\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=redox_syscall\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.5\",\n)\n"
+            }
+          },
+          "crate_index__redox_users-0.4.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b033d837a7cf162d7993aded9304e30a83213c648b6e389db233191f891e5c2b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/redox_users/0.4.3/download"
+              ],
+              "strip_prefix": "redox_users-0.4.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"redox_users\",\n    deps = [\n        \"@crate_index__getrandom-0.2.10//:getrandom\",\n        \"@crate_index__redox_syscall-0.2.16//:syscall\",\n        \"@crate_index__thiserror-1.0.49//:thiserror\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=redox_users\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.3\",\n)\n"
+            }
+          },
+          "crate_index__regex-1.9.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "12de2eff854e5fa4b1295edd650e227e9d8fb0c9e90b12e7f36d6a6811791a29",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/regex/1.9.4/download"
+              ],
+              "strip_prefix": "regex-1.9.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"regex\",\n    deps = [\n        \"@crate_index__aho-corasick-1.0.5//:aho_corasick\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__regex-automata-0.3.7//:regex_automata\",\n        \"@crate_index__regex-syntax-0.7.5//:regex_syntax\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"perf\",\n        \"perf-backtrack\",\n        \"perf-cache\",\n        \"perf-dfa\",\n        \"perf-inline\",\n        \"perf-literal\",\n        \"perf-onepass\",\n        \"std\",\n        \"unicode\",\n        \"unicode-age\",\n        \"unicode-bool\",\n        \"unicode-case\",\n        \"unicode-gencat\",\n        \"unicode-perl\",\n        \"unicode-script\",\n        \"unicode-segment\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=regex\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.9.4\",\n)\n"
+            }
+          },
+          "crate_index__regex-automata-0.3.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "49530408a136e16e5b486e883fbb6ba058e8e4e8ae6621a77b048b314336e629",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/regex-automata/0.3.7/download"
+              ],
+              "strip_prefix": "regex-automata-0.3.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"regex_automata\",\n    deps = [\n        \"@crate_index__aho-corasick-1.0.5//:aho_corasick\",\n        \"@crate_index__memchr-2.6.4//:memchr\",\n        \"@crate_index__regex-syntax-0.7.5//:regex_syntax\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"dfa-onepass\",\n        \"hybrid\",\n        \"meta\",\n        \"nfa-backtrack\",\n        \"nfa-pikevm\",\n        \"nfa-thompson\",\n        \"perf-inline\",\n        \"perf-literal\",\n        \"perf-literal-multisubstring\",\n        \"perf-literal-substring\",\n        \"std\",\n        \"syntax\",\n        \"unicode\",\n        \"unicode-age\",\n        \"unicode-bool\",\n        \"unicode-case\",\n        \"unicode-gencat\",\n        \"unicode-perl\",\n        \"unicode-script\",\n        \"unicode-segment\",\n        \"unicode-word-boundary\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"dfa-search\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"dfa-search\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"dfa-search\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=regex-automata\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.7\",\n)\n"
+            }
+          },
+          "crate_index__regex-syntax-0.7.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/regex-syntax/0.7.5/download"
+              ],
+              "strip_prefix": "regex-syntax-0.7.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"regex_syntax\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n        \"unicode\",\n        \"unicode-age\",\n        \"unicode-bool\",\n        \"unicode-case\",\n        \"unicode-gencat\",\n        \"unicode-perl\",\n        \"unicode-script\",\n        \"unicode-segment\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=regex-syntax\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.5\",\n)\n"
+            }
+          },
+          "crate_index__reqwest-0.12.12": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "43e734407157c3c2034e0258f5e4473ddb361b1e85f95a66690d67264d7cd1da",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/reqwest/0.12.12/download"
+              ],
+              "strip_prefix": "reqwest-0.12.12",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"reqwest\",\n    deps = [\n        \"@crate_index__base64-0.22.1//:base64\",\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__http-1.2.0//:http\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:serde_json\",\n        \"@crate_index__serde_urlencoded-0.7.1//:serde_urlencoded\",\n        \"@crate_index__sync_wrapper-1.0.2//:sync_wrapper\",\n        \"@crate_index__tower-service-0.3.3//:tower_service\",\n        \"@crate_index__url-2.4.1//:url\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__encoding_rs-0.8.35//:encoding_rs\",  # aarch64-apple-darwin\n            \"@crate_index__futures-channel-0.3.31//:futures_channel\",  # aarch64-apple-darwin\n            \"@crate_index__h2-0.4.7//:h2\",  # aarch64-apple-darwin\n            \"@crate_index__http-body-1.0.1//:http_body\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__http-body-util-0.1.2//:http_body_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-1.5.2//:hyper\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-tls-0.6.0//:hyper_tls\",  # aarch64-apple-darwin\n            \"@crate_index__hyper-util-0.1.10//:hyper_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__ipnet-2.10.1//:ipnet\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__mime-0.3.17//:mime\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__native-tls-0.2.12//:native_tls\",  # aarch64-apple-darwin\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__rustls-pemfile-2.2.0//:rustls_pemfile\",  # aarch64-apple-darwin\n            \"@crate_index__system-configuration-0.6.1//:system_configuration\",  # aarch64-apple-darwin\n            \"@crate_index__tokio-1.43.0//:tokio\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",  # aarch64-apple-darwin\n            \"@crate_index__tower-0.5.2//:tower\",  # cfg(not(target_arch = \"wasm32\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__encoding_rs-0.8.35//:encoding_rs\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__futures-channel-0.3.31//:futures_channel\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__h2-0.4.7//:h2\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__http-body-1.0.1//:http_body\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__http-body-util-0.1.2//:http_body_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-1.5.2//:hyper\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-tls-0.6.0//:hyper_tls\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__hyper-util-0.1.10//:hyper_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__ipnet-2.10.1//:ipnet\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__mime-0.3.17//:mime\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__native-tls-0.2.12//:native_tls\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__rustls-pemfile-2.2.0//:rustls_pemfile\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__tokio-1.43.0//:tokio\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__tower-0.5.2//:tower\",  # cfg(not(target_arch = \"wasm32\"))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__js-sys-0.3.64//:js_sys\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-futures-0.4.37//:wasm_bindgen_futures\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__web-sys-0.3.64//:web_sys\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__js-sys-0.3.64//:js_sys\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__wasm-bindgen-futures-0.4.37//:wasm_bindgen_futures\",  # cfg(target_arch = \"wasm32\")\n            \"@crate_index__web-sys-0.3.64//:web_sys\",  # cfg(target_arch = \"wasm32\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__encoding_rs-0.8.35//:encoding_rs\",  # x86_64-pc-windows-msvc\n            \"@crate_index__futures-channel-0.3.31//:futures_channel\",  # x86_64-pc-windows-msvc\n            \"@crate_index__h2-0.4.7//:h2\",  # x86_64-pc-windows-msvc\n            \"@crate_index__http-body-1.0.1//:http_body\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__http-body-util-0.1.2//:http_body_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-1.5.2//:hyper\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-tls-0.6.0//:hyper_tls\",  # x86_64-pc-windows-msvc\n            \"@crate_index__hyper-util-0.1.10//:hyper_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__ipnet-2.10.1//:ipnet\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__mime-0.3.17//:mime\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__native-tls-0.2.12//:native_tls\",  # x86_64-pc-windows-msvc\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__rustls-pemfile-2.2.0//:rustls_pemfile\",  # x86_64-pc-windows-msvc\n            \"@crate_index__tokio-1.43.0//:tokio\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",  # x86_64-pc-windows-msvc\n            \"@crate_index__tower-0.5.2//:tower\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__windows-registry-0.2.0//:windows_registry\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__encoding_rs-0.8.35//:encoding_rs\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__futures-channel-0.3.31//:futures_channel\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__h2-0.4.7//:h2\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__http-body-1.0.1//:http_body\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__http-body-util-0.1.2//:http_body_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-1.5.2//:hyper\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-tls-0.6.0//:hyper_tls\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__hyper-util-0.1.10//:hyper_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__ipnet-2.10.1//:ipnet\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__mime-0.3.17//:mime\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__native-tls-0.2.12//:native_tls\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__rustls-pemfile-2.2.0//:rustls_pemfile\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__tokio-1.43.0//:tokio\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__tower-0.5.2//:tower\",  # cfg(not(target_arch = \"wasm32\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__encoding_rs-0.8.35//:encoding_rs\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__futures-channel-0.3.31//:futures_channel\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__h2-0.4.7//:h2\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__http-body-1.0.1//:http_body\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__http-body-util-0.1.2//:http_body_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-1.5.2//:hyper\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__hyper-tls-0.6.0//:hyper_tls\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__hyper-util-0.1.10//:hyper_util\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__ipnet-2.10.1//:ipnet\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__log-0.4.20//:log\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__mime-0.3.17//:mime\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__native-tls-0.2.12//:native_tls\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__rustls-pemfile-2.2.0//:rustls_pemfile\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__tokio-1.43.0//:tokio\",  # cfg(not(target_arch = \"wasm32\"))\n            \"@crate_index__tokio-native-tls-0.3.1//:tokio_native_tls\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__tower-0.5.2//:tower\",  # cfg(not(target_arch = \"wasm32\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    aliases = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": {\n            \"@crate_index__native-tls-0.2.12//:native_tls\": \"native_tls_crate\",  # aarch64-apple-darwin\n        },\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": {\n            \"@crate_index__native-tls-0.2.12//:native_tls\": \"native_tls_crate\",  # aarch64-unknown-linux-gnu\n        },\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": {\n            \"@crate_index__native-tls-0.2.12//:native_tls\": \"native_tls_crate\",  # x86_64-pc-windows-msvc\n        },\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": {\n            \"@crate_index__native-tls-0.2.12//:native_tls\": \"native_tls_crate\",  # x86_64-unknown-linux-gnu\n        },\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": {\n            \"@crate_index__native-tls-0.2.12//:native_tls\": \"native_tls_crate\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        },\n        \"//conditions:default\": {},\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"__tls\",\n        \"blocking\",\n        \"charset\",\n        \"default\",\n        \"default-tls\",\n        \"h2\",\n        \"http2\",\n        \"json\",\n        \"macos-system-configuration\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=reqwest\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.12.12\",\n)\n"
+            }
+          },
+          "crate_index__rfc6979-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f8dd2a808d456c4a54e300a23e9f5a67e122c3024119acbfd73e3bf664491cb2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rfc6979/0.4.0/download"
+              ],
+              "strip_prefix": "rfc6979-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rfc6979\",\n    deps = [\n        \"@crate_index__hmac-0.12.1//:hmac\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rfc6979\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n"
+            }
+          },
+          "crate_index__ring-0.16.20": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3053cf52e236a3ed746dfc745aa9cacf1b791d846bdaf412f60a8d7d6e17c8fc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ring/0.16.20/download"
+              ],
+              "strip_prefix": "ring-0.16.20",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ring\",\n    deps = [\n        \"@crate_index__ring-0.16.20//:build_script_build\",\n        \"@crate_index__untrusted-0.7.1//:untrusted\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(any(target_os = \"android\", target_os = \"linux\"))\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__spin-0.5.2//:spin\",  # cfg(any(target_arch = \"x86\", target_arch = \"x86_64\", all(any(target_arch = \"aarch64\", target_arch = \"arm\"), any(target_os = \"android\", target_os = \"fuchsia\", target_os = \"linux\"))))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__web-sys-0.3.64//:web_sys\",  # cfg(all(target_arch = \"wasm32\", target_vendor = \"unknown\", target_os = \"unknown\", target_env = \"\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__spin-0.5.2//:spin\",  # cfg(any(target_arch = \"x86\", target_arch = \"x86_64\", all(any(target_arch = \"aarch64\", target_arch = \"arm\"), any(target_os = \"android\", target_os = \"fuchsia\", target_os = \"linux\"))))\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(target_os = \"windows\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(any(target_os = \"android\", target_os = \"linux\"))\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__spin-0.5.2//:spin\",  # cfg(any(target_arch = \"x86\", target_arch = \"x86_64\", all(any(target_arch = \"aarch64\", target_arch = \"arm\"), any(target_os = \"android\", target_os = \"fuchsia\", target_os = \"linux\"))))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(any(target_os = \"android\", target_os = \"linux\"))\n            \"@crate_index__once_cell-1.18.0//:once_cell\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__spin-0.5.2//:spin\",  # cfg(any(target_arch = \"x86\", target_arch = \"x86_64\", all(any(target_arch = \"aarch64\", target_arch = \"arm\"), any(target_os = \"android\", target_os = \"fuchsia\", target_os = \"linux\"))))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"dev_urandom_fallback\",\n        \"once_cell\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ring\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.16.20\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"dev_urandom_fallback\",\n        \"once_cell\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n    ],\n    edition = \"2018\",\n    links = \"ring-asm\",\n    pkg_name = \"ring\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ring\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.16.20\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__ring-0.17.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c17fa4cb658e3583423e915b9f3acc01cceaee1860e33d59ebae66adc3a2dc0d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ring/0.17.8/download"
+              ],
+              "strip_prefix": "ring-0.17.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ring\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__getrandom-0.2.10//:getrandom\",\n        \"@crate_index__ring-0.17.8//:build_script_build\",\n        \"@crate_index__untrusted-0.9.0//:untrusted\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__spin-0.9.8//:spin\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"arm\", target_arch = \"x86\", target_arch = \"x86_64\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(any(target_os = \"android\", target_os = \"linux\"), any(target_arch = \"aarch64\", target_arch = \"arm\")))\n            \"@crate_index__spin-0.9.8//:spin\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"arm\", target_arch = \"x86\", target_arch = \"x86_64\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__spin-0.9.8//:spin\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"arm\", target_arch = \"x86\", target_arch = \"x86_64\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__spin-0.9.8//:spin\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"arm\", target_arch = \"x86\", target_arch = \"x86_64\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__spin-0.9.8//:spin\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"arm\", target_arch = \"x86\", target_arch = \"x86_64\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ring\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.17.8\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__cc-1.0.83//:cc\",\n    ],\n    edition = \"2021\",\n    links = \"ring_core_0_17_8\",\n    pkg_name = \"ring\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ring\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.17.8\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rsa-0.9.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6ab43bb47d23c1a631b4b680199a45255dce26fa9ab2fa902581f624ff13e6a8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rsa/0.9.2/download"
+              ],
+              "strip_prefix": "rsa-0.9.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rsa\",\n    deps = [\n        \"@crate_index__byteorder-1.5.0//:byteorder\",\n        \"@crate_index__const-oid-0.9.6//:const_oid\",\n        \"@crate_index__digest-0.10.7//:digest\",\n        \"@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig\",\n        \"@crate_index__num-integer-0.1.45//:num_integer\",\n        \"@crate_index__num-iter-0.1.43//:num_iter\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n        \"@crate_index__pkcs1-0.7.5//:pkcs1\",\n        \"@crate_index__pkcs8-0.10.2//:pkcs8\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n        \"@crate_index__signature-2.1.0//:signature\",\n        \"@crate_index__spki-0.7.3//:spki\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    aliases = {\n        \"@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig\": \"num_bigint\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"pem\",\n        \"std\",\n        \"u64_digit\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rsa\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.2\",\n)\n"
+            }
+          },
+          "crate_index__rsa-der-0.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a19473b2de3164677ff38e4309c42448ba8d0fe5ad5fa722e7d278f991859aa6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rsa-der/0.3.0/download"
+              ],
+              "strip_prefix": "rsa-der-0.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rsa_der\",\n    deps = [\n        \"@crate_index__simple_asn1-0.6.2//:simple_asn1\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rsa-der\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.0\",\n)\n"
+            }
+          },
+          "crate_index__rusb-0.9.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ab9f9ff05b63a786553a4c02943b74b34a988448671001e9a27e2f0565cc05a4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rusb/0.9.4/download"
+              ],
+              "strip_prefix": "rusb-0.9.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rusb\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__libusb1-sys-0.7.0//:libusb1_sys\",\n        \"@crate_index__rusb-0.9.4//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rusb\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.4\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    link_deps = [\n        \"@crate_index__libusb1-sys-0.7.0//:libusb1_sys\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"rusb\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rusb\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.9.4\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rust-crypto-0.2.36": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f76d05d3993fd5f4af9434e8e436db163a12a9d40e1a58a726f27a01dfd12a2a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rust-crypto/0.2.36/download"
+              ],
+              "strip_prefix": "rust-crypto-0.2.36",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"crypto\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__rand-0.3.23//:rand\",\n        \"@crate_index__rust-crypto-0.2.36//:build_script_build\",\n        \"@crate_index__rustc-serialize-0.3.25//:rustc_serialize\",\n        \"@crate_index__time-0.1.45//:time\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rust-crypto\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.36\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__gcc-0.3.55//:gcc\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"rust-crypto\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rust-crypto\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.36\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rustc-demangle-0.1.23": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d626bb9dae77e28219937af045c257c28bfd3f69333c512553507f5f9798cb76",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustc-demangle/0.1.23/download"
+              ],
+              "strip_prefix": "rustc-demangle-0.1.23",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustc_demangle\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustc-demangle\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.23\",\n)\n"
+            }
+          },
+          "crate_index__rustc-serialize-0.3.25": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fe834bc780604f4674073badbad26d7219cadfb4a2275802db12cbae17498401",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustc-serialize/0.3.25/download"
+              ],
+              "strip_prefix": "rustc-serialize-0.3.25",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustc_serialize\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustc-serialize\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.25\",\n)\n"
+            }
+          },
+          "crate_index__rustix-0.38.10": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ed6248e1caa625eb708e266e06159f135e8c26f2bb7ceb72dc4b2766d0340964",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustix/0.38.10/download"
+              ],
+              "strip_prefix": "rustix-0.38.10",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustix\",\n    deps = [\n        \"@crate_index__bitflags-2.4.0//:bitflags\",\n        \"@crate_index__rustix-0.38.10//:build_script_build\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__errno-0.3.5//:errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys\",  # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__errno-0.3.5//:errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__errno-0.3.5//:errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__errno-0.3.5//:errno\",  # cfg(windows)\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys\",  # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys\",  # cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))\n        ],\n        \"//conditions:default\": [],\n    }),\n    aliases = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": {\n            \"@crate_index__errno-0.3.5//:errno\": \"libc_errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        },\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": {\n            \"@crate_index__errno-0.3.5//:errno\": \"libc_errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        },\n        \"@rules_rust//rust/platform:wasm32-wasip1\": {\n            \"@crate_index__errno-0.3.5//:errno\": \"libc_errno\",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))\n        },\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": {\n            \"@crate_index__errno-0.3.5//:errno\": \"libc_errno\",  # cfg(windows)\n        },\n        \"//conditions:default\": {},\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"event\",\n        \"fs\",\n        \"net\",\n        \"process\",\n        \"std\",\n        \"stdio\",\n        \"termios\",\n        \"use-libc-auxv\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustix\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.38.10\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"event\",\n        \"fs\",\n        \"net\",\n        \"process\",\n        \"std\",\n        \"stdio\",\n        \"termios\",\n        \"use-libc-auxv\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"rustix\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustix\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.38.10\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rustls-0.23.21": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8f287924602bf649d949c63dc8ac8b235fa5387d394020705b80c4eb597ce5b8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustls/0.23.21/download"
+              ],
+              "strip_prefix": "rustls-0.23.21",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustls\",\n    deps = [\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__rustls-0.23.21//:build_script_build\",\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\",\n        \"@crate_index__rustls-webpki-0.102.8//:webpki\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    aliases = {\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\": \"pki_types\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.23.21\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"rustls\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.23.21\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__rustls-pemfile-2.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "dce314e5fee3f39953d46bb63bb8a46d40c2f8fb7cc5a3b6cab2bde9721d6e50",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustls-pemfile/2.2.0/download"
+              ],
+              "strip_prefix": "rustls-pemfile-2.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustls_pemfile\",\n    deps = [\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\",\n    ],\n    aliases = {\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\": \"pki_types\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustls-pemfile\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.2.0\",\n)\n"
+            }
+          },
+          "crate_index__rustls-pki-types-1.10.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d2bf47e6ff922db3825eb750c4e2ff784c6ff8fb9e13046ef6a1d1c5401b0b37",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustls-pki-types/1.10.1/download"
+              ],
+              "strip_prefix": "rustls-pki-types-1.10.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"rustls_pki_types\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustls-pki-types\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.10.1\",\n)\n"
+            }
+          },
+          "crate_index__rustls-webpki-0.102.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "64ca1bc8749bd4cf37b5ce386cc146580777b4e8572c7b97baf22c83f444bee9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustls-webpki/0.102.8/download"
+              ],
+              "strip_prefix": "rustls-webpki-0.102.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"webpki\",\n    deps = [\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\",\n        \"@crate_index__untrusted-0.9.0//:untrusted\",\n    ],\n    aliases = {\n        \"@crate_index__rustls-pki-types-1.10.1//:rustls_pki_types\": \"pki_types\",\n    },\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustls-webpki\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.102.8\",\n)\n"
+            }
+          },
+          "crate_index__rustversion-1.0.14": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7ffc183a10b4478d04cbbbfc96d0873219d962dd5accaff2ffbd4ceb7df837f4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/rustversion/1.0.14/download"
+              ],
+              "strip_prefix": "rustversion-1.0.14",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"rustversion\",\n    deps = [\n        \"@crate_index__rustversion-1.0.14//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustversion\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.14\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build/build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"rustversion\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=rustversion\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.14\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__ruzstd-0.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "fad02996bfc73da3e301efe90b1837be9ed8f4a462b6ed410aa35d00381de89f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ruzstd/0.7.3/download"
+              ],
+              "strip_prefix": "ruzstd-0.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ruzstd\",\n    deps = [\n        \"@crate_index__twox-hash-1.6.3//:twox_hash\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"hash\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ruzstd\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.3\",\n)\n"
+            }
+          },
+          "crate_index__ryu-1.0.15": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ryu/1.0.15/download"
+              ],
+              "strip_prefix": "ryu-1.0.15",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ryu\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ryu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.15\",\n)\n"
+            }
+          },
+          "crate_index__schannel-0.1.27": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1f29ebaa345f945cec9fbbc532eb307f0fdad8161f281b6369539c8d84876b3d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/schannel/0.1.27/download"
+              ],
+              "strip_prefix": "schannel-0.1.27",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"schannel\",\n    deps = [\n        \"@crate_index__windows-sys-0.59.0//:windows_sys\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=schannel\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.27\",\n)\n"
+            }
+          },
+          "crate_index__scopeguard-1.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "94143f37725109f92c262ed2cf5e59bce7498c01bcc1502d7b9afe439a4e9f49",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/scopeguard/1.2.0/download"
+              ],
+              "strip_prefix": "scopeguard-1.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"scopeguard\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"use_std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=scopeguard\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.2.0\",\n)\n"
+            }
+          },
+          "crate_index__sec1-0.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d3e97a565f76233a6003f9f5c54be1d9c5bdfa3eccfb189469f11ec4901c47dc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/sec1/0.7.3/download"
+              ],
+              "strip_prefix": "sec1-0.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"sec1\",\n    deps = [\n        \"@crate_index__base16ct-0.2.0//:base16ct\",\n        \"@crate_index__der-0.7.8//:der\",\n        \"@crate_index__generic-array-0.14.7//:generic_array\",\n        \"@crate_index__pkcs8-0.10.2//:pkcs8\",\n        \"@crate_index__subtle-2.5.0//:subtle\",\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"der\",\n        \"pem\",\n        \"pkcs8\",\n        \"point\",\n        \"std\",\n        \"subtle\",\n        \"zeroize\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=sec1\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.3\",\n)\n"
+            }
+          },
+          "crate_index__secrecy-0.8.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9bd1c54ea06cfd2f6b63219704de0b9b4f72dcc2b8fdef820be6cd799780e91e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/secrecy/0.8.0/download"
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+              "strip_prefix": "secrecy-0.8.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"secrecy\",\n    deps = [\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=secrecy\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.0\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "770452e37cad93e0a50d5abc3990d2bc351c36d0328f86cefec2f2fb206eaef6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/security-framework/2.10.0/download"
+              ],
+              "strip_prefix": "security-framework-2.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"security_framework\",\n    deps = [\n        \"@crate_index__bitflags-1.3.2//:bitflags\",\n        \"@crate_index__core-foundation-0.9.4//:core_foundation\",\n        \"@crate_index__core-foundation-sys-0.8.7//:core_foundation_sys\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__security-framework-sys-2.14.0//:security_framework_sys\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"OSX_10_10\",\n        \"OSX_10_11\",\n        \"OSX_10_9\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=security-framework\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.10.0\",\n)\n"
+            }
+          },
+          "crate_index__security-framework-sys-2.14.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "49db231d56a190491cb4aeda9527f1ad45345af50b0851622a7adb8c03b01c32",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/security-framework-sys/2.14.0/download"
+              ],
+              "strip_prefix": "security-framework-sys-2.14.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"security_framework_sys\",\n    deps = [\n        \"@crate_index__core-foundation-sys-0.8.7//:core_foundation_sys\",\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"OSX_10_10\",\n        \"OSX_10_11\",\n        \"OSX_10_12\",\n        \"OSX_10_9\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=security-framework-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.14.0\",\n)\n"
+            }
+          },
+          "crate_index__serde-1.0.219": {
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+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde/1.0.219/download"
+              ],
+              "strip_prefix": "serde-1.0.219",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serde\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:build_script_build\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__serde_derive-1.0.219//:serde_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"derive\",\n        \"serde_derive\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.219\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"derive\",\n        \"serde_derive\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"serde\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.219\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__serde_bytes-0.11.12": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ab33ec92f677585af6d88c65593ae2375adde54efdbf16d597f2cbc7a6d368ff",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_bytes/0.11.12/download"
+              ],
+              "strip_prefix": "serde_bytes-0.11.12",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serde_bytes\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_bytes\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.11.12\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5b0276cf7f2c73365f7157c8123c21cd9a50fbbd844757af28ca1f5925fc2a00",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_derive/1.0.219/download"
+              ],
+              "strip_prefix": "serde_derive-1.0.219",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"serde_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.219\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_json/1.0.107/download"
+              ],
+              "strip_prefix": "serde_json-1.0.107",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serde_json\",\n    deps = [\n        \"@crate_index__itoa-1.0.9//:itoa\",\n        \"@crate_index__ryu-1.0.15//:ryu\",\n        \"@crate_index__serde-1.0.219//:serde\",\n        \"@crate_index__serde_json-1.0.107//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_json\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.107\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"serde_json\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_json\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.107\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__serde_urlencoded-0.7.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d3491c14715ca2294c4d6a88f15e84739788c1d030eed8c110436aafdaa2f3fd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_urlencoded/0.7.1/download"
+              ],
+              "strip_prefix": "serde_urlencoded-0.7.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serde_urlencoded\",\n    deps = [\n        \"@crate_index__form_urlencoded-1.2.0//:form_urlencoded\",\n        \"@crate_index__itoa-1.0.9//:itoa\",\n        \"@crate_index__ryu-1.0.15//:ryu\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_urlencoded\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.1\",\n)\n"
+            }
+          },
+          "crate_index__serde_with-3.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "64cd236ccc1b7a29e7e2739f27c0b2dd199804abc4290e32f59f3b68d6405c23",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_with/3.4.0/download"
+              ],
+              "strip_prefix": "serde_with-3.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serde_with\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__serde_with_macros-3.4.0//:serde_with_macros\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"macros\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_with\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.4.0\",\n)\n"
+            }
+          },
+          "crate_index__serde_with_macros-3.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "93634eb5f75a2323b16de4748022ac4297f9e76b6dced2be287a099f41b5e788",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serde_with_macros/3.4.0/download"
+              ],
+              "strip_prefix": "serde_with_macros-3.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"serde_with_macros\",\n    deps = [\n        \"@crate_index__darling-0.20.3//:darling\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serde_with_macros\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.4.0\",\n)\n"
+            }
+          },
+          "crate_index__serialport-4.2.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c32634e2bd4311420caa504404a55fad2131292c485c97014cbed89a5899885f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/serialport/4.2.2/download"
+              ],
+              "strip_prefix": "serialport-4.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"serialport\",\n    deps = [\n        \"@crate_index__scopeguard-1.2.0//:scopeguard\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys\",  # cfg(any(target_os = \"ios\", target_os = \"macos\"))\n            \"@crate_index__IOKit-sys-0.1.5//:IOKit_sys\",  # cfg(any(target_os = \"ios\", target_os = \"macos\"))\n            \"@crate_index__bitflags-1.3.2//:bitflags\",  # cfg(unix)\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n            \"@crate_index__mach2-0.4.1//:mach2\",  # cfg(any(target_os = \"ios\", target_os = \"macos\"))\n            \"@crate_index__nix-0.26.4//:nix\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__bitflags-1.3.2//:bitflags\",  # cfg(unix)\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n            \"@crate_index__libudev-0.3.0//:libudev\",  # aarch64-unknown-linux-gnu\n            \"@crate_index__nix-0.26.4//:nix\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__regex-1.9.4//:regex\",  # cfg(windows)\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__bitflags-1.3.2//:bitflags\",  # cfg(unix)\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n            \"@crate_index__libudev-0.3.0//:libudev\",  # x86_64-unknown-linux-gnu\n            \"@crate_index__nix-0.26.4//:nix\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__bitflags-1.3.2//:bitflags\",  # cfg(unix)\n            \"@crate_index__cfg-if-1.0.0//:cfg_if\",  # cfg(unix)\n            \"@crate_index__libudev-0.3.0//:libudev\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"@crate_index__nix-0.26.4//:nix\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"libudev\",\n        \"serde\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=serialport\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"4.2.2\",\n)\n"
+            }
+          },
+          "crate_index__sha2-0.10.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "479fb9d862239e610720565ca91403019f2f00410f1864c5aa7479b950a76ed8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/sha2/0.10.7/download"
+              ],
+              "strip_prefix": "sha2-0.10.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"sha2\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__digest-0.10.7//:digest\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"oid\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=sha2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.7\",\n)\n"
+            }
+          },
+          "crate_index__sha3-0.10.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "75872d278a8f37ef87fa0ddbda7802605cb18344497949862c0d4dcb291eba60",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/sha3/0.10.8/download"
+              ],
+              "strip_prefix": "sha3-0.10.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"sha3\",\n    deps = [\n        \"@crate_index__digest-0.10.7//:digest\",\n        \"@crate_index__keccak-0.1.5//:keccak\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"oid\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=sha3\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.8\",\n)\n"
+            }
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+          "crate_index__shellwords-1.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "89e515aa4699a88148ed5ef96413ceef0048ce95b43fbc955a33bde0a70fcae6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/shellwords/1.1.0/download"
+              ],
+              "strip_prefix": "shellwords-1.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"shellwords\",\n    deps = [\n        \"@crate_index__lazy_static-1.4.0//:lazy_static\",\n        \"@crate_index__regex-1.9.4//:regex\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=shellwords\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.0\",\n)\n"
+            }
+          },
+          "crate_index__shlex-1.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "43b2853a4d09f215c24cc5489c992ce46052d359b5109343cbafbf26bc62f8a3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/shlex/1.1.0/download"
+              ],
+              "strip_prefix": "shlex-1.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"shlex\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=shlex\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.0\",\n)\n"
+            }
+          },
+          "crate_index__signature-2.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5e1788eed21689f9cf370582dfc467ef36ed9c707f073528ddafa8d83e3b8500",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/signature/2.1.0/download"
+              ],
+              "strip_prefix": "signature-2.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"signature\",\n    deps = [\n        \"@crate_index__digest-0.10.7//:digest\",\n        \"@crate_index__rand_core-0.6.4//:rand_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"digest\",\n        \"rand_core\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=signature\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.1.0\",\n)\n"
+            }
+          },
+          "crate_index__simple_asn1-0.6.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "adc4e5204eb1910f40f9cfa375f6f05b68c3abac4b6fd879c8ff5e7ae8a0a085",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/simple_asn1/0.6.2/download"
+              ],
+              "strip_prefix": "simple_asn1-0.6.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"simple_asn1\",\n    deps = [\n        \"@crate_index__num-bigint-0.4.4//:num_bigint\",\n        \"@crate_index__num-traits-0.2.17//:num_traits\",\n        \"@crate_index__thiserror-1.0.49//:thiserror\",\n        \"@crate_index__time-0.3.41//:time\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=simple_asn1\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.2\",\n)\n"
+            }
+          },
+          "crate_index__siphasher-0.3.11": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "38b58827f4464d87d377d175e90bf58eb00fd8716ff0a62f80356b5e61555d0d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/siphasher/0.3.11/download"
+              ],
+              "strip_prefix": "siphasher-0.3.11",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"siphasher\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=siphasher\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.11\",\n)\n"
+            }
+          },
+          "crate_index__slab-0.4.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8f92a496fb766b417c996b9c5e57daf2f7ad3b0bebe1ccfca4856390e3d3bb67",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/slab/0.4.9/download"
+              ],
+              "strip_prefix": "slab-0.4.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"slab\",\n    deps = [\n        \"@crate_index__slab-0.4.9//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=slab\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.9\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__autocfg-1.1.0//:autocfg\",\n    ],\n    edition = \"2018\",\n    pkg_name = \"slab\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=slab\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.4.9\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__smallvec-1.13.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/smallvec/1.13.2/download"
+              ],
+              "strip_prefix": "smallvec-1.13.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"smallvec\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"write\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"const_generics\",  # aarch64-apple-darwin\n            \"const_new\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"const_generics\",  # aarch64-unknown-linux-gnu\n            \"const_new\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"const_generics\",  # x86_64-pc-windows-msvc\n            \"const_new\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"const_generics\",  # x86_64-unknown-linux-gnu\n            \"const_new\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"const_generics\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"const_new\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=smallvec\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.13.2\",\n)\n"
+            }
+          },
+          "crate_index__socket2-0.5.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c970269d99b64e60ec3bd6ad27270092a5394c4e309314b18ae3fe575695fbe8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/socket2/0.5.8/download"
+              ],
+              "strip_prefix": "socket2-0.5.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"socket2\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.52.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"all\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=socket2\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.8\",\n)\n"
+            }
+          },
+          "crate_index__spin-0.5.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/spin/0.5.2/download"
+              ],
+              "strip_prefix": "spin-0.5.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"spin\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=spin\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.2\",\n)\n"
+            }
+          },
+          "crate_index__spin-0.9.8": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/spin/0.9.8/download"
+              ],
+              "strip_prefix": "spin-0.9.8",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"spin\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=spin\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.8\",\n)\n"
+            }
+          },
+          "crate_index__spki-0.7.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d91ed6c858b01f942cd56b37a94b3e0a1798290327d1236e4d9cf4eaca44d29d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/spki/0.7.3/download"
+              ],
+              "strip_prefix": "spki-0.7.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"spki\",\n    deps = [\n        \"@crate_index__der-0.7.8//:der\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"pem\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=spki\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.3\",\n)\n"
+            }
+          },
+          "crate_index__static_assertions-1.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a2eb9349b6444b326872e140eb1cf5e7c522154d69e7a0ffb0fb81c06b37543f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/static_assertions/1.1.0/download"
+              ],
+              "strip_prefix": "static_assertions-1.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"static_assertions\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=static_assertions\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.1.0\",\n)\n"
+            }
+          },
+          "crate_index__string_cache-0.8.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f91138e76242f575eb1d3b38b4f1362f10d3a43f47d182a5b359af488a02293b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/string_cache/0.8.7/download"
+              ],
+              "strip_prefix": "string_cache-0.8.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"string_cache\",\n    deps = [\n        \"@crate_index__new_debug_unreachable-1.0.4//:debug_unreachable\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__parking_lot-0.12.1//:parking_lot\",\n        \"@crate_index__phf_shared-0.10.0//:phf_shared\",\n        \"@crate_index__precomputed-hash-0.1.1//:precomputed_hash\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"serde\",\n        \"serde_support\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=string_cache\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.7\",\n)\n"
+            }
+          },
+          "crate_index__string_cache_codegen-0.5.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6bb30289b722be4ff74a408c3cc27edeaad656e06cb1fe8fa9231fa59c728988",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/string_cache_codegen/0.5.2/download"
+              ],
+              "strip_prefix": "string_cache_codegen-0.5.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"string_cache_codegen\",\n    deps = [\n        \"@crate_index__phf_generator-0.10.0//:phf_generator\",\n        \"@crate_index__phf_shared-0.10.0//:phf_shared\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=string_cache_codegen\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.2\",\n)\n"
+            }
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+          "crate_index__strsim-0.10.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "73473c0e59e6d5812c5dfe2a064a6444949f089e20eec9a2e5506596494e4623",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/strsim/0.10.0/download"
+              ],
+              "strip_prefix": "strsim-0.10.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"strsim\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=strsim\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0\",\n)\n"
+            }
+          },
+          "crate_index__strum-0.25.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "290d54ea6f91c969195bdbcd7442c8c2a2ba87da8bf60a7ee86a235d4bc1e125",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/strum/0.25.0/download"
+              ],
+              "strip_prefix": "strum-0.25.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"strum\",\n    proc_macro_deps = [\n        \"@crate_index__strum_macros-0.25.2//:strum_macros\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"derive\",\n        \"std\",\n        \"strum_macros\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=strum\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.25.0\",\n)\n"
+            }
+          },
+          "crate_index__strum_macros-0.25.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ad8d03b598d3d0fff69bf533ee3ef19b8eeb342729596df84bcc7e1f96ec4059",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/strum_macros/0.25.2/download"
+              ],
+              "strip_prefix": "strum_macros-0.25.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"strum_macros\",\n    deps = [\n        \"@crate_index__heck-0.4.1//:heck\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__rustversion-1.0.14//:rustversion\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=strum_macros\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.25.2\",\n)\n"
+            }
+          },
+          "crate_index__subtle-2.5.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "81cdd64d312baedb58e21336b31bc043b77e01cc99033ce76ef539f78e965ebc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/subtle/2.5.0/download"
+              ],
+              "strip_prefix": "subtle-2.5.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"subtle\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"i128\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=subtle\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.5.0\",\n)\n"
+            }
+          },
+          "crate_index__syn-1.0.109": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "72b64191b275b66ffe2469e8af2c1cfe3bafa67b529ead792a6d0160888b4237",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/syn/1.0.109/download"
+              ],
+              "strip_prefix": "syn-1.0.109",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"syn\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-1.0.109//:build_script_build\",\n        \"@crate_index__unicode-ident-1.0.12//:unicode_ident\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"clone-impls\",\n        \"default\",\n        \"derive\",\n        \"extra-traits\",\n        \"fold\",\n        \"full\",\n        \"parsing\",\n        \"printing\",\n        \"proc-macro\",\n        \"quote\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=syn\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.109\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"clone-impls\",\n        \"default\",\n        \"derive\",\n        \"extra-traits\",\n        \"fold\",\n        \"full\",\n        \"parsing\",\n        \"printing\",\n        \"proc-macro\",\n        \"quote\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"syn\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=syn\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.109\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__syn-2.0.101": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8ce2b7fc941b3a24138a0a7cf8e858bfc6a992e7978a068a5c760deb0ed43caf",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/syn/2.0.101/download"
+              ],
+              "strip_prefix": "syn-2.0.101",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"syn\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__unicode-ident-1.0.12//:unicode_ident\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"clone-impls\",\n        \"default\",\n        \"derive\",\n        \"parsing\",\n        \"printing\",\n        \"proc-macro\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"extra-traits\",  # aarch64-apple-darwin\n            \"full\",  # aarch64-apple-darwin\n            \"visit\",  # aarch64-apple-darwin\n            \"visit-mut\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"extra-traits\",  # aarch64-unknown-linux-gnu\n            \"full\",  # aarch64-unknown-linux-gnu\n            \"visit\",  # aarch64-unknown-linux-gnu\n            \"visit-mut\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"extra-traits\",  # x86_64-pc-windows-msvc\n            \"full\",  # x86_64-pc-windows-msvc\n            \"visit\",  # x86_64-pc-windows-msvc\n            \"visit-mut\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"extra-traits\",  # x86_64-unknown-linux-gnu\n            \"full\",  # x86_64-unknown-linux-gnu\n            \"visit\",  # x86_64-unknown-linux-gnu\n            \"visit-mut\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"extra-traits\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"full\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"visit\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n            \"visit-mut\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=syn\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.101\",\n)\n"
+            }
+          },
+          "crate_index__sync_wrapper-1.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0bf256ce5efdfa370213c1dabab5935a12e49f2c58d15e9eac2870d3b4f27263",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/sync_wrapper/1.0.2/download"
+              ],
+              "strip_prefix": "sync_wrapper-1.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"sync_wrapper\",\n    deps = [\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"futures\",\n        \"futures-core\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=sync_wrapper\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.2\",\n)\n"
+            }
+          },
+          "crate_index__system-configuration-0.6.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3c879d448e9d986b661742763247d3693ed13609438cf3d006f51f5368a5ba6b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/system-configuration/0.6.1/download"
+              ],
+              "strip_prefix": "system-configuration-0.6.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"system_configuration\",\n    deps = [\n        \"@crate_index__bitflags-2.4.0//:bitflags\",\n        \"@crate_index__core-foundation-0.9.4//:core_foundation\",\n        \"@crate_index__system-configuration-sys-0.6.0//:system_configuration_sys\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=system-configuration\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.1\",\n)\n"
+            }
+          },
+          "crate_index__system-configuration-sys-0.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8e1d1b10ced5ca923a1fcb8d03e96b8d3268065d724548c0211415ff6ac6bac4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/system-configuration-sys/0.6.0/download"
+              ],
+              "strip_prefix": "system-configuration-sys-0.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"system_configuration_sys\",\n    deps = [\n        \"@crate_index__core-foundation-sys-0.8.7//:core_foundation_sys\",\n        \"@crate_index__libc-0.2.169//:libc\",\n        \"@crate_index__system-configuration-sys-0.6.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=system-configuration-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"system-configuration-sys\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=system-configuration-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.6.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__tap-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "55937e1799185b12863d447f42597ed69d9928686b8d88a1df17376a097d8369",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tap/1.0.1/download"
+              ],
+              "strip_prefix": "tap-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tap\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tap\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__tar-0.4.40": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b16afcea1f22891c49a00c751c7b63b2233284064f11a200fc624137c51e2ddb",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tar/0.4.40/download"
+              ],
+              "strip_prefix": "tar-0.4.40",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tar\",\n    deps = [\n        \"@crate_index__filetime-0.2.22//:filetime\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n            \"@crate_index__xattr-1.0.1//:xattr\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n            \"@crate_index__xattr-1.0.1//:xattr\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n            \"@crate_index__xattr-1.0.1//:xattr\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # cfg(unix)\n            \"@crate_index__xattr-1.0.1//:xattr\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"xattr\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tar\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.40\",\n)\n"
+            }
+          },
+          "crate_index__tempfile-3.8.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "cb94d2f3cc536af71caac6b6fcebf65860b347e7ce0cc9ebe8f70d3e521054ef",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tempfile/3.8.0/download"
+              ],
+              "strip_prefix": "tempfile-3.8.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tempfile\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__fastrand-2.0.0//:fastrand\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(any(unix, target_os = \"wasi\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(any(unix, target_os = \"wasi\"))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(any(unix, target_os = \"wasi\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(any(unix, target_os = \"wasi\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(any(unix, target_os = \"wasi\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tempfile\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"3.8.0\",\n)\n"
+            }
+          },
+          "crate_index__tendril-0.4.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d24a120c5fc464a3458240ee02c299ebcb9d67b5249c8848b09d639dca8d7bb0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tendril/0.4.3/download"
+              ],
+              "strip_prefix": "tendril-0.4.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tendril\",\n    deps = [\n        \"@crate_index__futf-0.1.5//:futf\",\n        \"@crate_index__mac-0.1.1//:mac\",\n        \"@crate_index__utf-8-0.7.6//:utf8\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tendril\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.3\",\n)\n"
+            }
+          },
+          "crate_index__termcolor-1.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "be55cf8942feac5c765c2c993422806843c9a9a45d4d5c407ad6dd2ea95eb9b6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/termcolor/1.2.0/download"
+              ],
+              "strip_prefix": "termcolor-1.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"termcolor\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__winapi-util-0.1.5//:winapi_util\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=termcolor\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.2.0\",\n)\n"
+            }
+          },
+          "crate_index__terminal_size-0.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "21bebf2b7c9e0a515f6e0f8c51dc0f8e4696391e6f1ff30379559f8365fb0df7",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/terminal_size/0.3.0/download"
+              ],
+              "strip_prefix": "terminal_size-0.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"terminal_size\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.48.0//:windows_sys\",  # cfg(windows)\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__rustix-0.38.10//:rustix\",  # cfg(not(windows))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=terminal_size\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.0\",\n)\n"
+            }
+          },
+          "crate_index__thiserror-1.0.49": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1177e8c6d7ede7afde3585fd2513e611227efd6481bd78d2e82ba1ce16557ed4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/thiserror/1.0.49/download"
+              ],
+              "strip_prefix": "thiserror-1.0.49",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"thiserror\",\n    deps = [\n        \"@crate_index__thiserror-1.0.49//:build_script_build\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__thiserror-impl-1.0.49//:thiserror_impl\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=thiserror\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.49\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"thiserror\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=thiserror\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.49\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__thiserror-impl-1.0.49": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "10712f02019e9288794769fba95cd6847df9874d49d871d062172f9dd41bc4cc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/thiserror-impl/1.0.49/download"
+              ],
+              "strip_prefix": "thiserror-impl-1.0.49",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"thiserror_impl\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=thiserror-impl\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.49\",\n)\n"
+            }
+          },
+          "crate_index__time-0.1.45": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1b797afad3f312d1c66a56d11d0316f916356d11bd158fbc6ca6389ff6bf805a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/time/0.1.45/download"
+              ],
+              "strip_prefix": "time-0.1.45",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"time\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n    ] + select({\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__wasi-0.10.0-wasi-snapshot-preview1//:wasi\",  # cfg(target_os = \"wasi\")\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=time\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.45\",\n)\n"
+            }
+          },
+          "crate_index__time-0.3.41": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8a7619e19bc266e0f9c5e6686659d394bc57973859340060a69221e57dbc0c40",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/time/0.3.41/download"
+              ],
+              "strip_prefix": "time-0.3.41",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"time\",\n    deps = [\n        \"@crate_index__deranged-0.4.0//:deranged\",\n        \"@crate_index__itoa-1.0.9//:itoa\",\n        \"@crate_index__num-conv-0.1.0//:num_conv\",\n        \"@crate_index__powerfmt-0.2.0//:powerfmt\",\n        \"@crate_index__time-core-0.1.4//:time_core\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__time-macros-0.2.22//:time_macros\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"formatting\",\n        \"macros\",\n        \"parsing\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=time\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.41\",\n)\n"
+            }
+          },
+          "crate_index__time-core-0.1.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c9e9a38711f559d9e3ce1cdb06dd7c5b8ea546bc90052da6d06bb76da74bb07c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/time-core/0.1.4/download"
+              ],
+              "strip_prefix": "time-core-0.1.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"time_core\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=time-core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.4\",\n)\n"
+            }
+          },
+          "crate_index__time-macros-0.2.22": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3526739392ec93fd8b359c8e98514cb3e8e021beb4e5f597b00a0221f8ed8a49",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/time-macros/0.2.22/download"
+              ],
+              "strip_prefix": "time-macros-0.2.22",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"time_macros\",\n    deps = [\n        \"@crate_index__num-conv-0.1.0//:num_conv\",\n        \"@crate_index__time-core-0.1.4//:time_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"formatting\",\n        \"parsing\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=time-macros\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.22\",\n)\n"
+            }
+          },
+          "crate_index__tiny-keccak-2.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2c9d3793400a45f954c52e73d068316d76b6f4e36977e3fcebb13a2721e80237",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tiny-keccak/2.0.2/download"
+              ],
+              "strip_prefix": "tiny-keccak-2.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tiny_keccak\",\n    deps = [\n        \"@crate_index__crunchy-0.2.2//:crunchy\",\n        \"@crate_index__tiny-keccak-2.0.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cshake\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tiny-keccak\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.0.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cshake\",\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"tiny-keccak\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tiny-keccak\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"2.0.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__tinyvec-1.6.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "87cc5ceb3875bb20c2890005a4e226a4651264a5c75edb2421b52861a0a0cb50",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tinyvec/1.6.0/download"
+              ],
+              "strip_prefix": "tinyvec-1.6.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tinyvec\",\n    deps = [\n        \"@crate_index__tinyvec_macros-0.1.1//:tinyvec_macros\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"tinyvec_macros\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tinyvec\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.6.0\",\n)\n"
+            }
+          },
+          "crate_index__tinyvec_macros-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1f3ccbac311fea05f86f61904b462b55fb3df8837a366dfc601a0161d0532f20",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tinyvec_macros/0.1.1/download"
+              ],
+              "strip_prefix": "tinyvec_macros-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tinyvec_macros\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tinyvec_macros\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__tls_codec-0.4.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0de2e01245e2bb89d6f05801c564fa27624dbd7b1846859876c7dad82e90bf6b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tls_codec/0.4.2/download"
+              ],
+              "strip_prefix": "tls_codec-0.4.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tls_codec\",\n    deps = [\n        \"@crate_index__zeroize-1.8.1//:zeroize\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tls_codec\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.2\",\n)\n"
+            }
+          },
+          "crate_index__tls_codec_derive-0.4.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "2d2e76690929402faae40aebdda620a2c0e25dd6d3b9afe48867dfd95991f4bd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tls_codec_derive/0.4.2/download"
+              ],
+              "strip_prefix": "tls_codec_derive-0.4.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"tls_codec_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tls_codec_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.2\",\n)\n"
+            }
+          },
+          "crate_index__tokio-1.43.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3d61fa4ffa3de412bfea335c6ecff681de2b609ba3c77ef3e00e521813a9ed9e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tokio/1.43.0/download"
+              ],
+              "strip_prefix": "tokio-1.43.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tokio\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__mio-1.0.3//:mio\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__socket2-0.5.8//:socket2\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-apple-darwin\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # aarch64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-sys-0.52.0//:windows_sys\",  # x86_64-pc-windows-msvc\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__libc-0.2.169//:libc\",  # x86_64-unknown-linux-gnu, x86_64-unknown-nixos-gnu\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"bytes\",\n        \"default\",\n        \"io-util\",\n        \"libc\",\n        \"mio\",\n        \"net\",\n        \"rt\",\n        \"socket2\",\n        \"sync\",\n        \"time\",\n    ] + select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"windows-sys\",  # x86_64-pc-windows-msvc\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tokio\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.43.0\",\n)\n"
+            }
+          },
+          "crate_index__tokio-native-tls-0.3.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bbae76ab933c85776efabc971569dd6119c580d8f5d448769dec1764bf796ef2",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tokio-native-tls/0.3.1/download"
+              ],
+              "strip_prefix": "tokio-native-tls-0.3.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tokio_native_tls\",\n    deps = [\n        \"@crate_index__native-tls-0.2.12//:native_tls\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tokio-native-tls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.1\",\n)\n"
+            }
+          },
+          "crate_index__tokio-rustls-0.26.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5f6d0975eaace0cf0fcadee4e4aaa5da15b5c079146f2cffb67c113be122bf37",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tokio-rustls/0.26.1/download"
+              ],
+              "strip_prefix": "tokio-rustls-0.26.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tokio_rustls\",\n    deps = [\n        \"@crate_index__rustls-0.23.21//:rustls\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tokio-rustls\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.26.1\",\n)\n"
+            }
+          },
+          "crate_index__tokio-util-0.7.13": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d7fcaa8d55a2bdd6b83ace262b016eca0d79ee02818c5c1bcdf0305114081078",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tokio-util/0.7.13/download"
+              ],
+              "strip_prefix": "tokio-util-0.7.13",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tokio_util\",\n    deps = [\n        \"@crate_index__bytes-1.9.0//:bytes\",\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-sink-0.3.31//:futures_sink\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"codec\",\n        \"default\",\n        \"io\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tokio-util\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.13\",\n)\n"
+            }
+          },
+          "crate_index__toml-0.5.11": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f4f7f0dd8d50a853a531c426359045b1998f04219d88799810762cd4ad314234",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/toml/0.5.11/download"
+              ],
+              "strip_prefix": "toml-0.5.11",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"toml\",\n    deps = [\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=toml\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.11\",\n)\n"
+            }
+          },
+          "crate_index__toml_datetime-0.6.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7cda73e2f1397b1262d6dfdcef8aafae14d1de7748d66822d3bfeeb6d03e5e4b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/toml_datetime/0.6.3/download"
+              ],
+              "strip_prefix": "toml_datetime-0.6.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"toml_datetime\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=toml_datetime\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.6.3\",\n)\n"
+            }
+          },
+          "crate_index__toml_edit-0.19.14": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f8123f27e969974a3dfba720fdb560be359f57b44302d280ba72e76a74480e8a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/toml_edit/0.19.14/download"
+              ],
+              "strip_prefix": "toml_edit-0.19.14",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"toml_edit\",\n    deps = [\n        \"@crate_index__indexmap-2.0.0//:indexmap\",\n        \"@crate_index__toml_datetime-0.6.3//:toml_datetime\",\n        \"@crate_index__winnow-0.5.15//:winnow\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=toml_edit\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.19.14\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ea68304e134ecd095ac6c3574494fc62b909f416c4fca77e440530221e549d3d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/topological-sort/0.2.2/download"
+              ],
+              "strip_prefix": "topological-sort-0.2.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"topological_sort\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=topological-sort\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.2\",\n)\n"
+            }
+          },
+          "crate_index__tower-0.5.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "d039ad9159c98b70ecfd540b2573b97f7f52c3e8d9f8ad57a24b916a536975f9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tower/0.5.2/download"
+              ],
+              "strip_prefix": "tower-0.5.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tower\",\n    deps = [\n        \"@crate_index__futures-core-0.3.31//:futures_core\",\n        \"@crate_index__futures-util-0.3.31//:futures_util\",\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__sync_wrapper-1.0.2//:sync_wrapper\",\n        \"@crate_index__tokio-1.43.0//:tokio\",\n        \"@crate_index__tower-layer-0.3.3//:tower_layer\",\n        \"@crate_index__tower-service-0.3.3//:tower_service\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"__common\",\n        \"futures-core\",\n        \"futures-util\",\n        \"pin-project-lite\",\n        \"sync_wrapper\",\n        \"timeout\",\n        \"tokio\",\n        \"util\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tower\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.2\",\n)\n"
+            }
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+          "crate_index__tower-layer-0.3.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "121c2a6cda46980bb0fcd1647ffaf6cd3fc79a013de288782836f6df9c48780e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tower-layer/0.3.3/download"
+              ],
+              "strip_prefix": "tower-layer-0.3.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tower_layer\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tower-layer\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.3\",\n)\n"
+            }
+          },
+          "crate_index__tower-service-0.3.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8df9b6e13f2d32c91b9bd719c00d1958837bc7dec474d94952798cc8e69eeec3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tower-service/0.3.3/download"
+              ],
+              "strip_prefix": "tower-service-0.3.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tower_service\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tower-service\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.3\",\n)\n"
+            }
+          },
+          "crate_index__tracing-0.1.41": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "784e0ac535deb450455cbfa28a6f0df145ea1bb7ae51b821cf5e7927fdcfbdd0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tracing/0.1.41/download"
+              ],
+              "strip_prefix": "tracing-0.1.41",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tracing\",\n    deps = [\n        \"@crate_index__pin-project-lite-0.2.16//:pin_project_lite\",\n        \"@crate_index__tracing-core-0.1.33//:tracing_core\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tracing\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.41\",\n)\n"
+            }
+          },
+          "crate_index__tracing-core-0.1.33": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e672c95779cf947c5311f83787af4fa8fffd12fb27e4993211a84bdfd9610f9c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/tracing-core/0.1.33/download"
+              ],
+              "strip_prefix": "tracing-core-0.1.33",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"tracing_core\",\n    deps = [\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"once_cell\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=tracing-core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.33\",\n)\n"
+            }
+          },
+          "crate_index__try-lock-0.2.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/try-lock/0.2.5/download"
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+              "strip_prefix": "try-lock-0.2.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"try_lock\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=try-lock\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.5\",\n)\n"
+            }
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+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/twox-hash/1.6.3/download"
+              ],
+              "strip_prefix": "twox-hash-1.6.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"twox_hash\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__static_assertions-1.1.0//:static_assertions\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=twox-hash\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.6.3\",\n)\n"
+            }
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+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bc7d623258602320d5c55d1bc22793b57daff0ec7efc270ea7d55ce1d5f5471c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/typeid/1.0.3/download"
+              ],
+              "strip_prefix": "typeid-1.0.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"typeid\",\n    deps = [\n        \"@crate_index__typeid-1.0.3//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typeid\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.3\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"typeid\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typeid\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.0.3\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__typenum-1.17.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
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+              "remote_patch_strip": 1,
+              "sha256": "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/typenum/1.17.0/download"
+              ],
+              "strip_prefix": "typenum-1.17.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"typenum\",\n    deps = [\n        \"@crate_index__typenum-1.17.0//:build_script_main\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typenum\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.17.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_main\",\n    crate_root = \"build/main.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"typenum\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typenum\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"1.17.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_main\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__typetag-0.2.20": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "73f22b40dd7bfe8c14230cf9702081366421890435b2d625fa92b4acc4c3de6f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/typetag/0.2.20/download"
+              ],
+              "strip_prefix": "typetag-0.2.20",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"typetag\",\n    deps = [\n        \"@crate_index__erased-serde-0.4.6//:erased_serde\",\n        \"@crate_index__inventory-0.3.17//:inventory\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__serde-1.0.219//:serde\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__typetag-impl-0.2.20//:typetag_impl\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typetag\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.20\",\n)\n"
+            }
+          },
+          "crate_index__typetag-impl-0.2.20": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "35f5380909ffc31b4de4f4bdf96b877175a016aa2ca98cee39fcfd8c4d53d952",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/typetag-impl/0.2.20/download"
+              ],
+              "strip_prefix": "typetag-impl-0.2.20",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"typetag_impl\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=typetag-impl\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.20\",\n)\n"
+            }
+          },
+          "crate_index__ucd-trie-0.1.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ed646292ffc8188ef8ea4d1e0e0150fb15a5c2e12ad9b8fc191ae7a8a7f3c4b9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ucd-trie/0.1.6/download"
+              ],
+              "strip_prefix": "ucd-trie-0.1.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ucd_trie\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ucd-trie\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.6\",\n)\n"
+            }
+          },
+          "crate_index__unicase-2.7.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f7d2d4dafb69621809a81864c9c1b864479e1235c0dd4e199924b9742439ed89",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/unicase/2.7.0/download"
+              ],
+              "strip_prefix": "unicase-2.7.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"unicase\",\n    deps = [\n        \"@crate_index__unicase-2.7.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicase\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.7.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@crate_index__version_check-0.9.4//:version_check\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"unicase\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicase\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"2.7.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__unicode-bidi-0.3.13": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "92888ba5573ff080736b3648696b70cafad7d250551175acbaa4e0385b3e1460",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/unicode-bidi/0.3.13/download"
+              ],
+              "strip_prefix": "unicode-bidi-0.3.13",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"unicode_bidi\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"hardcoded-data\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicode-bidi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.13\",\n)\n"
+            }
+          },
+          "crate_index__unicode-ident-1.0.12": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "3354b9ac3fae1ff6755cb6db53683adb661634f67557942dea4facebec0fee4b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/unicode-ident/1.0.12/download"
+              ],
+              "strip_prefix": "unicode-ident-1.0.12",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"unicode_ident\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicode-ident\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.12\",\n)\n"
+            }
+          },
+          "crate_index__unicode-normalization-0.1.22": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5c5713f0fc4b5db668a2ac63cdb7bb4469d8c9fed047b1d0292cc7b0ce2ba921",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/unicode-normalization/0.1.22/download"
+              ],
+              "strip_prefix": "unicode-normalization-0.1.22",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"unicode_normalization\",\n    deps = [\n        \"@crate_index__tinyvec-1.6.0//:tinyvec\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicode-normalization\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.22\",\n)\n"
+            }
+          },
+          "crate_index__unicode-width-0.1.10": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c0edd1e5b14653f783770bce4a4dabb4a5108a5370a5f5d8cfe8710c361f6c8b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/unicode-width/0.1.10/download"
+              ],
+              "strip_prefix": "unicode-width-0.1.10",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"unicode_width\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=unicode-width\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.10\",\n)\n"
+            }
+          },
+          "crate_index__untrusted-0.7.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a156c684c91ea7d62626509bce3cb4e1d9ed5c4d978f7b4352658f96a4c26b4a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/untrusted/0.7.1/download"
+              ],
+              "strip_prefix": "untrusted-0.7.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"untrusted\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/untrusted.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=untrusted\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.1\",\n)\n"
+            }
+          },
+          "crate_index__untrusted-0.9.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8ecb6da28b8a351d773b68d5825ac39017e680750f980f3a1a85cd8dd28a47c1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/untrusted/0.9.0/download"
+              ],
+              "strip_prefix": "untrusted-0.9.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"untrusted\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=untrusted\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.0\",\n)\n"
+            }
+          },
+          "crate_index__url-2.4.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "143b538f18257fac9cad154828a57c6bf5157e1aa604d4816b5995bf6de87ae5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/url/2.4.1/download"
+              ],
+              "strip_prefix": "url-2.4.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"url\",\n    deps = [\n        \"@crate_index__form_urlencoded-1.2.0//:form_urlencoded\",\n        \"@crate_index__idna-0.4.0//:idna\",\n        \"@crate_index__percent-encoding-2.3.0//:percent_encoding\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=url\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"2.4.1\",\n)\n"
+            }
+          },
+          "crate_index__utf-8-0.7.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "09cc8ee72d2a9becf2f2febe0205bbed8fc6615b7cb429ad062dc7b7ddd036a9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/utf-8/0.7.6/download"
+              ],
+              "strip_prefix": "utf-8-0.7.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"utf8\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=utf-8\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.7.6\",\n)\n"
+            }
+          },
+          "crate_index__utf8parse-0.2.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "711b9620af191e0cdc7468a8d14e709c3dcdb115b36f838e601583af800a370a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/utf8parse/0.2.1/download"
+              ],
+              "strip_prefix": "utf8parse-0.2.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"utf8parse\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=utf8parse\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.1\",\n)\n"
+            }
+          },
+          "crate_index__vcpkg-0.2.15": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "accd4ea62f7bb7a82fe23066fb0957d48ef677f6eeb8215f372f52e48bb32426",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/vcpkg/0.2.15/download"
+              ],
+              "strip_prefix": "vcpkg-0.2.15",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"vcpkg\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=vcpkg\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.15\",\n)\n"
+            }
+          },
+          "crate_index__version_check-0.9.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/version_check/0.9.4/download"
+              ],
+              "strip_prefix": "version_check-0.9.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"version_check\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=version_check\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.4\",\n)\n"
+            }
+          },
+          "crate_index__void-1.0.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/void/1.0.2/download"
+              ],
+              "strip_prefix": "void-1.0.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"void\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=void\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.2\",\n)\n"
+            }
+          },
+          "crate_index__want-0.3.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "bfa7760aed19e106de2c7c0b581b509f2f25d3dacaf737cb82ac61bc6d760b0e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/want/0.3.1/download"
+              ],
+              "strip_prefix": "want-0.3.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"want\",\n    deps = [\n        \"@crate_index__try-lock-0.2.5//:try_lock\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=want\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.1\",\n)\n"
+            }
+          },
+          "crate_index__wasi-0.10.0-wasi-snapshot-preview1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1a143597ca7c7793eff794def352d41792a93c481eb1042423ff7ff72ba2c31f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasi/0.10.0+wasi-snapshot-preview1/download"
+              ],
+              "strip_prefix": "wasi-0.10.0+wasi-snapshot-preview1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasi\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.10.0+wasi-snapshot-preview1\",\n)\n"
+            }
+          },
+          "crate_index__wasi-0.11.0-wasi-snapshot-preview1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasi/0.11.0+wasi-snapshot-preview1/download"
+              ],
+              "strip_prefix": "wasi-0.11.0+wasi-snapshot-preview1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasi\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.11.0+wasi-snapshot-preview1\",\n)\n"
+            }
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+            "attributes": {
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+              "patches": [],
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+              "type": "tar.gz",
+              "urls": [
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+              ],
+              "strip_prefix": "wasm-bindgen-0.2.100",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasm_bindgen\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__once_cell-1.18.0//:once_cell\",\n        \"@crate_index__wasm-bindgen-0.2.100//:build_script_build\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__rustversion-1.0.14//:rustversion\",\n        \"@crate_index__wasm-bindgen-macro-0.2.100//:wasm_bindgen_macro\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"msrv\",\n        \"rustversion\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.100\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"msrv\",\n        \"rustversion\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"wasm-bindgen\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.100\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+              "urls": [
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasm_bindgen_backend\",\n    deps = [\n        \"@crate_index__bumpalo-3.14.0//:bumpalo\",\n        \"@crate_index__log-0.4.20//:log\",\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n        \"@crate_index__wasm-bindgen-shared-0.2.100//:wasm_bindgen_shared\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-backend\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.100\",\n)\n"
+            }
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+          "crate_index__wasm-bindgen-futures-0.4.37": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "c02dbc21516f9f1f04f187958890d7e6026df8d16540b7ad9492bc34a67cea03",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasm-bindgen-futures/0.4.37/download"
+              ],
+              "strip_prefix": "wasm-bindgen-futures-0.4.37",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasm_bindgen_futures\",\n    deps = [\n        \"@crate_index__cfg-if-1.0.0//:cfg_if\",\n        \"@crate_index__js-sys-0.3.64//:js_sys\",\n        \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-futures\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.37\",\n)\n"
+            }
+          },
+          "crate_index__wasm-bindgen-macro-0.2.100": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7fe63fc6d09ed3792bd0897b314f53de8e16568c2b3f7982f468c0bf9bd0b407",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasm-bindgen-macro/0.2.100/download"
+              ],
+              "strip_prefix": "wasm-bindgen-macro-0.2.100",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"wasm_bindgen_macro\",\n    deps = [\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__wasm-bindgen-macro-support-0.2.100//:wasm_bindgen_macro_support\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-macro\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.100\",\n)\n"
+            }
+          },
+          "crate_index__wasm-bindgen-macro-support-0.2.100": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8ae87ea40c9f689fc23f209965b6fb8a99ad69aeeb0231408be24920604395de",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasm-bindgen-macro-support/0.2.100/download"
+              ],
+              "strip_prefix": "wasm-bindgen-macro-support-0.2.100",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasm_bindgen_macro_support\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n        \"@crate_index__wasm-bindgen-backend-0.2.100//:wasm_bindgen_backend\",\n        \"@crate_index__wasm-bindgen-shared-0.2.100//:wasm_bindgen_shared\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-macro-support\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.100\",\n)\n"
+            }
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+          "crate_index__wasm-bindgen-shared-0.2.100": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1a05d73b933a847d6cccdda8f838a22ff101ad9bf93e33684f39c1f5f0eece3d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wasm-bindgen-shared/0.2.100/download"
+              ],
+              "strip_prefix": "wasm-bindgen-shared-0.2.100",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wasm_bindgen_shared\",\n    deps = [\n        \"@crate_index__unicode-ident-1.0.12//:unicode_ident\",\n        \"@crate_index__wasm-bindgen-shared-0.2.100//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-shared\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.100\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    links = \"wasm_bindgen\",\n    pkg_name = \"wasm-bindgen-shared\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wasm-bindgen-shared\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.100\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__web-sys-0.3.64": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9b85cbef8c220a6abc02aefd892dfc0fc23afb1c6a426316ec33253a3877249b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/web-sys/0.3.64/download"
+              ],
+              "strip_prefix": "web-sys-0.3.64",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"web_sys\",\n    deps = [\n        \"@crate_index__js-sys-0.3.64//:js_sys\",\n        \"@crate_index__wasm-bindgen-0.2.100//:wasm_bindgen\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"AbortController\",\n        \"AbortSignal\",\n        \"Blob\",\n        \"BlobPropertyBag\",\n        \"EventTarget\",\n        \"File\",\n        \"FormData\",\n        \"Headers\",\n        \"ReadableStream\",\n        \"Request\",\n        \"RequestCredentials\",\n        \"RequestInit\",\n        \"RequestMode\",\n        \"Response\",\n        \"ServiceWorkerGlobalScope\",\n        \"Window\",\n        \"WorkerGlobalScope\",\n    ] + select({\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"Crypto\",  # wasm32-unknown-unknown\n        ],\n        \"//conditions:default\": [],\n    }),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=web-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.64\",\n)\n"
+            }
+          },
+          "crate_index__winapi-0.3.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/winapi/0.3.9/download"
+              ],
+              "strip_prefix": "winapi-0.3.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"winapi\",\n    deps = [\n        \"@crate_index__winapi-0.3.9//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cguid\",\n        \"commapi\",\n        \"consoleapi\",\n        \"errhandlingapi\",\n        \"fileapi\",\n        \"guiddef\",\n        \"handleapi\",\n        \"libloaderapi\",\n        \"minwinbase\",\n        \"minwindef\",\n        \"ntdef\",\n        \"ntsecapi\",\n        \"processenv\",\n        \"profileapi\",\n        \"setupapi\",\n        \"shellapi\",\n        \"std\",\n        \"sysinfoapi\",\n        \"timezoneapi\",\n        \"winbase\",\n        \"wincon\",\n        \"winerror\",\n        \"winnt\",\n        \"wtypesbase\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.9\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"cguid\",\n        \"commapi\",\n        \"consoleapi\",\n        \"errhandlingapi\",\n        \"fileapi\",\n        \"guiddef\",\n        \"handleapi\",\n        \"libloaderapi\",\n        \"minwinbase\",\n        \"minwindef\",\n        \"ntdef\",\n        \"ntsecapi\",\n        \"processenv\",\n        \"profileapi\",\n        \"setupapi\",\n        \"shellapi\",\n        \"std\",\n        \"sysinfoapi\",\n        \"timezoneapi\",\n        \"winbase\",\n        \"wincon\",\n        \"winerror\",\n        \"winnt\",\n        \"wtypesbase\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"winapi\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.3.9\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__winapi-i686-pc-windows-gnu-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ac3b87c63620426dd9b991e5ce0329eff545bccbbb34f3be09ff6fb6ab51b7b6",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/winapi-i686-pc-windows-gnu/0.4.0/download"
+              ],
+              "strip_prefix": "winapi-i686-pc-windows-gnu-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"winapi_i686_pc_windows_gnu\",\n    deps = [\n        \"@crate_index__winapi-i686-pc-windows-gnu-0.4.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi-i686-pc-windows-gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"winapi-i686-pc-windows-gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi-i686-pc-windows-gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.4.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__winapi-util-0.1.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "70ec6ce85bb158151cae5e5c87f95a8e97d2c0c4b001223f33a334e3ce5de178",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/winapi-util/0.1.5/download"
+              ],
+              "strip_prefix": "winapi-util-0.1.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"winapi_util\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__winapi-0.3.9//:winapi\",  # cfg(windows)\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi-util\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.5\",\n)\n"
+            }
+          },
+          "crate_index__winapi-x86_64-pc-windows-gnu-0.4.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "712e227841d057c1ee1cd2fb22fa7e5a5461ae8e48fa2ca79ec42cfc1931183f",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/winapi-x86_64-pc-windows-gnu/0.4.0/download"
+              ],
+              "strip_prefix": "winapi-x86_64-pc-windows-gnu-0.4.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"winapi_x86_64_pc_windows_gnu\",\n    deps = [\n        \"@crate_index__winapi-x86_64-pc-windows-gnu-0.4.0//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi-x86_64-pc-windows-gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.0\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"winapi-x86_64-pc-windows-gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winapi-x86_64-pc-windows-gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.4.0\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows-core-0.51.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f1f8cf84f35d2db49a46868f947758c7a1138116f7fac3bc844f43ade1292e64",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-core/0.51.1/download"
+              ],
+              "strip_prefix": "windows-core-0.51.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_core\",\n    deps = [\n        \"@crate_index__windows-targets-0.48.5//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-core\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.51.1\",\n)\n"
+            }
+          },
+          "crate_index__windows-link-0.1.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "76840935b766e1b0a05c0066835fb9ec80071d4c09a16f6bd5f7e655e3c14c38",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-link/0.1.1/download"
+              ],
+              "strip_prefix": "windows-link-0.1.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_link\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-link\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.1\",\n)\n"
+            }
+          },
+          "crate_index__windows-registry-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "e400001bb720a623c1c69032f8e3e4cf09984deec740f007dd2b03ec864804b0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-registry/0.2.0/download"
+              ],
+              "strip_prefix": "windows-registry-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_registry\",\n    deps = [\n        \"@crate_index__windows-result-0.2.0//:windows_result\",\n        \"@crate_index__windows-strings-0.1.0//:windows_strings\",\n        \"@crate_index__windows-targets-0.52.6//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-registry\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-result-0.2.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1d1043d8214f791817bab27572aaa8af63732e11bf84aa21a45a78d6c317ae0e",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-result/0.2.0/download"
+              ],
+              "strip_prefix": "windows-result-0.2.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_result\",\n    deps = [\n        \"@crate_index__windows-targets-0.52.6//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-result\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-strings-0.1.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "4cd9b125c486025df0eabcb585e62173c6c9eddcec5d117d3b6e8c30e2ee4d10",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-strings/0.1.0/download"
+              ],
+              "strip_prefix": "windows-strings-0.1.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_strings\",\n    deps = [\n        \"@crate_index__windows-result-0.2.0//:windows_result\",\n        \"@crate_index__windows-targets-0.52.6//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-strings\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.1.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-sys-0.45.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "75283be5efb2831d37ea142365f009c02ec203cd29a3ebecbc093d52315b66d0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-sys/0.45.0/download"
+              ],
+              "strip_prefix": "windows-sys-0.45.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_sys\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__windows-targets-0.42.2//:windows_targets\",  # cfg(not(windows_raw_dylib))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"Win32\",\n        \"Win32_Foundation\",\n        \"Win32_Storage\",\n        \"Win32_Storage_FileSystem\",\n        \"Win32_System\",\n        \"Win32_System_Console\",\n        \"Win32_UI\",\n        \"Win32_UI_Input\",\n        \"Win32_UI_Input_KeyboardAndMouse\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.45.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-sys-0.48.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "677d2418bec65e3338edb076e806bc1ec15693c5d0104683f2efe857f61056a9",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-sys/0.48.0/download"
+              ],
+              "strip_prefix": "windows-sys-0.48.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_sys\",\n    deps = [\n        \"@crate_index__windows-targets-0.48.5//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"Win32\",\n        \"Win32_Foundation\",\n        \"Win32_Globalization\",\n        \"Win32_NetworkManagement\",\n        \"Win32_NetworkManagement_IpHelper\",\n        \"Win32_Networking\",\n        \"Win32_Networking_WinSock\",\n        \"Win32_Security\",\n        \"Win32_Storage\",\n        \"Win32_Storage_FileSystem\",\n        \"Win32_System\",\n        \"Win32_System_Com\",\n        \"Win32_System_Console\",\n        \"Win32_System_Diagnostics\",\n        \"Win32_System_Diagnostics_Debug\",\n        \"Win32_System_IO\",\n        \"Win32_System_Pipes\",\n        \"Win32_System_Threading\",\n        \"Win32_System_WindowsProgramming\",\n        \"Win32_UI\",\n        \"Win32_UI_Shell\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-sys-0.52.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-sys/0.52.0/download"
+              ],
+              "strip_prefix": "windows-sys-0.52.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_sys\",\n    deps = [\n        \"@crate_index__windows-targets-0.52.6//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"Wdk\",\n        \"Wdk_Foundation\",\n        \"Wdk_Storage\",\n        \"Wdk_Storage_FileSystem\",\n        \"Wdk_System\",\n        \"Wdk_System_IO\",\n        \"Win32\",\n        \"Win32_Foundation\",\n        \"Win32_Networking\",\n        \"Win32_Networking_WinSock\",\n        \"Win32_Security\",\n        \"Win32_Storage\",\n        \"Win32_Storage_FileSystem\",\n        \"Win32_System\",\n        \"Win32_System_IO\",\n        \"Win32_System_Pipes\",\n        \"Win32_System_SystemServices\",\n        \"Win32_System_Threading\",\n        \"Win32_System_WindowsProgramming\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.0\",\n)\n"
+            }
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+          "crate_index__windows-sys-0.59.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-sys/0.59.0/download"
+              ],
+              "strip_prefix": "windows-sys-0.59.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_sys\",\n    deps = [\n        \"@crate_index__windows-targets-0.52.6//:windows_targets\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"Win32\",\n        \"Win32_Foundation\",\n        \"Win32_Security\",\n        \"Win32_Security_Authentication\",\n        \"Win32_Security_Authentication_Identity\",\n        \"Win32_Security_Credentials\",\n        \"Win32_Security_Cryptography\",\n        \"Win32_System\",\n        \"Win32_System_LibraryLoader\",\n        \"Win32_System_Memory\",\n        \"Win32_System_SystemInformation\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-sys\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.59.0\",\n)\n"
+            }
+          },
+          "crate_index__windows-targets-0.42.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8e5180c00cd44c9b1c88adb3693291f1cd93605ded80c250a75d472756b4d071",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-targets/0.42.2/download"
+              ],
+              "strip_prefix": "windows-targets-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_targets\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows_x86_64_msvc-0.42.2//:windows_x86_64_msvc\",  # x86_64-pc-windows-msvc\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-targets\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n"
+            }
+          },
+          "crate_index__windows-targets-0.48.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9a2fa6e2155d7247be68c096456083145c183cbbbc2764150dda45a87197940c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-targets/0.48.5/download"
+              ],
+              "strip_prefix": "windows-targets-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_targets\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows_x86_64_msvc-0.48.5//:windows_x86_64_msvc\",  # cfg(all(target_arch = \"x86_64\", target_env = \"msvc\", not(windows_raw_dylib)))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__windows_x86_64_gnu-0.48.5//:windows_x86_64_gnu\",  # cfg(all(target_arch = \"x86_64\", target_env = \"gnu\", not(target_abi = \"llvm\"), not(windows_raw_dylib)))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__windows_x86_64_gnu-0.48.5//:windows_x86_64_gnu\",  # cfg(all(target_arch = \"x86_64\", target_env = \"gnu\", not(target_abi = \"llvm\"), not(windows_raw_dylib)))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-targets\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n"
+            }
+          },
+          "crate_index__windows-targets-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows-targets/0.52.6/download"
+              ],
+              "strip_prefix": "windows-targets-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_targets\",\n    deps = select({\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@crate_index__windows_x86_64_msvc-0.52.6//:windows_x86_64_msvc\",  # cfg(all(any(target_arch = \"x86_64\", target_arch = \"arm64ec\"), target_env = \"msvc\", not(windows_raw_dylib)))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@crate_index__windows_x86_64_gnu-0.52.6//:windows_x86_64_gnu\",  # cfg(all(target_arch = \"x86_64\", target_env = \"gnu\", not(target_abi = \"llvm\"), not(windows_raw_dylib)))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@crate_index__windows_x86_64_gnu-0.52.6//:windows_x86_64_gnu\",  # cfg(all(target_arch = \"x86_64\", target_env = \"gnu\", not(target_abi = \"llvm\"), not(windows_raw_dylib)))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows-targets\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n"
+            }
+          },
+          "crate_index__windows_aarch64_gnullvm-0.42.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "597a5118570b68bc08d8d59125332c54f1ba9d9adeedeef5b99b02ba2b0698f8",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_aarch64_gnullvm/0.42.2/download"
+              ],
+              "strip_prefix": "windows_aarch64_gnullvm-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_aarch64_gnullvm-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_aarch64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_aarch64_gnullvm-0.48.5": {
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+              "strip_prefix": "windows_aarch64_gnullvm-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_aarch64_gnullvm-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_aarch64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_aarch64_gnullvm-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "urls": [
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+              ],
+              "strip_prefix": "windows_aarch64_gnullvm-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_aarch64_gnullvm-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_aarch64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_aarch64_msvc-0.42.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_aarch64_msvc/0.42.2/download"
+              ],
+              "strip_prefix": "windows_aarch64_msvc-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_msvc\",\n    deps = [\n        \"@crate_index__windows_aarch64_msvc-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_aarch64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_aarch64_msvc-0.48.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "dc35310971f3b2dbbf3f0690a219f40e2d9afcf64f9ab7cc1be722937c26b4bc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_aarch64_msvc/0.48.5/download"
+              ],
+              "strip_prefix": "windows_aarch64_msvc-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_msvc\",\n    deps = [\n        \"@crate_index__windows_aarch64_msvc-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_aarch64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_aarch64_msvc-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_aarch64_msvc/0.52.6/download"
+              ],
+              "strip_prefix": "windows_aarch64_msvc-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_aarch64_msvc\",\n    deps = [\n        \"@crate_index__windows_aarch64_msvc-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_aarch64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_aarch64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_gnu\",\n    deps = [\n        \"@crate_index__windows_i686_gnu-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_i686_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_i686_gnu-0.48.5": {
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_gnu\",\n    deps = [\n        \"@crate_index__windows_i686_gnu-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_i686_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_i686_gnu-0.52.6": {
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+              ],
+              "strip_prefix": "windows_i686_gnu-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_gnu\",\n    deps = [\n        \"@crate_index__windows_i686_gnu-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_i686_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_i686_gnullvm-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66",
+              "type": "tar.gz",
+              "urls": [
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+              ],
+              "strip_prefix": "windows_i686_gnullvm-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_gnullvm\",\n    deps = [\n        \"@crate_index__windows_i686_gnullvm-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_i686_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_i686_msvc-0.42.2": {
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+              "strip_prefix": "windows_i686_msvc-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_msvc\",\n    deps = [\n        \"@crate_index__windows_i686_msvc-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_i686_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_msvc\",\n    deps = [\n        \"@crate_index__windows_i686_msvc-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_i686_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
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+              "strip_prefix": "windows_i686_msvc-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_i686_msvc\",\n    deps = [\n        \"@crate_index__windows_i686_msvc-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_i686_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_i686_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
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+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_gnu/0.42.2/download"
+              ],
+              "strip_prefix": "windows_x86_64_gnu-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnu\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnu-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_x86_64_gnu-0.48.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e",
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+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_gnu/0.48.5/download"
+              ],
+              "strip_prefix": "windows_x86_64_gnu-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnu\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnu-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+              ],
+              "strip_prefix": "windows_x86_64_gnu-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnu\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnu-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_x86_64_gnu\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnu\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_x86_64_gnullvm-0.42.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
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+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "26d41b46a36d453748aedef1486d5c7a85db22e56aff34643984ea85514e94a3",
+              "type": "tar.gz",
+              "urls": [
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+              ],
+              "strip_prefix": "windows_x86_64_gnullvm-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnullvm-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_x86_64_gnullvm-0.48.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_gnullvm/0.48.5/download"
+              ],
+              "strip_prefix": "windows_x86_64_gnullvm-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnullvm-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_x86_64_gnullvm-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_gnullvm/0.52.6/download"
+              ],
+              "strip_prefix": "windows_x86_64_gnullvm-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_gnullvm\",\n    deps = [\n        \"@crate_index__windows_x86_64_gnullvm-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_x86_64_gnullvm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_gnullvm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_x86_64_msvc-0.42.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "9aec5da331524158c6d1a4ac0ab1541149c0b9505fde06423b02f5ef0106b9f0",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_msvc/0.42.2/download"
+              ],
+              "strip_prefix": "windows_x86_64_msvc-0.42.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_msvc\",\n    deps = [\n        \"@crate_index__windows_x86_64_msvc-0.42.2//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.42.2\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.42.2\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
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+          "crate_index__windows_x86_64_msvc-0.48.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
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+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_msvc/0.48.5/download"
+              ],
+              "strip_prefix": "windows_x86_64_msvc-0.48.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_msvc\",\n    deps = [\n        \"@crate_index__windows_x86_64_msvc-0.48.5//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.48.5\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"windows_x86_64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.48.5\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__windows_x86_64_msvc-0.52.6": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/windows_x86_64_msvc/0.52.6/download"
+              ],
+              "strip_prefix": "windows_x86_64_msvc-0.52.6",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"windows_x86_64_msvc\",\n    deps = [\n        \"@crate_index__windows_x86_64_msvc-0.52.6//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.52.6\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"windows_x86_64_msvc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=windows_x86_64_msvc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.52.6\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__winnow-0.5.15": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "7c2e3184b9c4e92ad5167ca73039d0c42476302ab603e2fec4487511f38ccefc",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/winnow/0.5.15/download"
+              ],
+              "strip_prefix": "winnow-0.5.15",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"winnow\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=winnow\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.15\",\n)\n"
+            }
+          },
+          "crate_index__wyz-0.5.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "05f360fc0b24296329c78fda852a1e9ae82de9cf7b27dae4b7f62f118f77b9ed",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/wyz/0.5.1/download"
+              ],
+              "strip_prefix": "wyz-0.5.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"wyz\",\n    deps = [\n        \"@crate_index__tap-1.0.1//:tap\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=wyz\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.1\",\n)\n"
+            }
+          },
+          "crate_index__x509-cert-0.2.5": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1301e935010a701ae5f8655edc0ad17c44bad3ac5ce8c39185f75453b720ae94",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/x509-cert/0.2.5/download"
+              ],
+              "strip_prefix": "x509-cert-0.2.5",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"x509_cert\",\n    deps = [\n        \"@crate_index__const-oid-0.9.6//:const_oid\",\n        \"@crate_index__der-0.7.8//:der\",\n        \"@crate_index__spki-0.7.3//:spki\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"pem\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=x509-cert\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.5\",\n)\n"
+            }
+          },
+          "crate_index__xattr-1.0.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f4686009f71ff3e5c4dbcf1a282d0a44db3f021ba69350cd42086b3e5f1c6985",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/xattr/1.0.1/download"
+              ],
+              "strip_prefix": "xattr-1.0.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"xattr\",\n    deps = [\n        \"@crate_index__libc-0.2.169//:libc\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"unsupported\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=xattr\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.1\",\n)\n"
+            }
+          },
+          "crate_index__zerocopy-0.8.27": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "0894878a5fa3edfd6da3f88c4805f4c8558e2b996227a3d864f47fe11e38282c",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/zerocopy/0.8.27/download"
+              ],
+              "strip_prefix": "zerocopy-0.8.27",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"zerocopy\",\n    deps = [\n        \"@crate_index__zerocopy-0.8.27//:build_script_build\",\n    ],\n    proc_macro_deps = [\n        \"@crate_index__zerocopy-derive-0.8.27//:zerocopy_derive\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"derive\",\n        \"zerocopy-derive\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=zerocopy\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.27\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"derive\",\n        \"zerocopy-derive\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2021\",\n    pkg_name = \"zerocopy\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=zerocopy\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.8.27\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "crate_index__zerocopy-derive-0.8.27": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "88d2b8d9c68ad2b9e4340d7832716a4d21a22a1154777ad56ea55c51a9cf3831",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/zerocopy-derive/0.8.27/download"
+              ],
+              "strip_prefix": "zerocopy-derive-0.8.27",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"zerocopy_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=zerocopy-derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.8.27\",\n)\n"
+            }
+          },
+          "crate_index__zeroize-1.8.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ced3678a2879b30306d323f4542626697a464a97c0a07c9aebf7ebca65cd4dde",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/zeroize/1.8.1/download"
+              ],
+              "strip_prefix": "zeroize-1.8.1",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"zeroize\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"alloc\",\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=zeroize\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.8.1\",\n)\n"
+            }
+          },
+          "crate_index__zeroize_derive-1.4.2": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/zeroize_derive/1.4.2/download"
+              ],
+              "strip_prefix": "zeroize_derive-1.4.2",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_proc_macro\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_proc_macro(\n    name = \"zeroize_derive\",\n    deps = [\n        \"@crate_index__proc-macro2-1.0.95//:proc_macro2\",\n        \"@crate_index__quote-1.0.40//:quote\",\n        \"@crate_index__syn-2.0.101//:syn\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2021\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=zeroize_derive\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.4.2\",\n)\n"
+            }
+          },
+          "tock_index": {
+            "repoRuleId": "@@rules_rust+//crate_universe:extensions.bzl%_generate_repo",
+            "attributes": {
+              "contents": {
+                "BUILD.bazel": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\npackage(default_visibility = [\"//visibility:public\"])\n\nexports_files(\n    [\n        \"cargo-bazel.json\",\n        \"crates.bzl\",\n        \"defs.bzl\",\n    ] + glob(\n        allow_empty = True,\n        include = [\"*.bazel\"],\n    ),\n)\n\nfilegroup(\n    name = \"srcs\",\n    srcs = glob(\n        allow_empty = True,\n        include = [\n            \"*.bazel\",\n            \"*.bzl\",\n        ],\n    ),\n)\n\n# Workspace Member Dependencies\nalias(\n    name = \"ghash-0.4.4\",\n    actual = \"@tock_index__ghash-0.4.4//:ghash\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"ghash\",\n    actual = \"@tock_index__ghash-0.4.4//:ghash\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"libm-0.2.7\",\n    actual = \"@tock_index__libm-0.2.7//:libm\",\n    tags = [\"manual\"],\n)\n\nalias(\n    name = \"libm\",\n    actual = \"@tock_index__libm-0.2.7//:libm\",\n    tags = [\"manual\"],\n)\n",
+                "alias_rules.bzl": "\"\"\"Alias that transitions its target to `compilation_mode=opt`.  Use `transition_alias=\"opt\"` to enable.\"\"\"\n\nload(\"@rules_cc//cc:defs.bzl\", \"CcInfo\")\nload(\"@rules_rust//rust:rust_common.bzl\", \"COMMON_PROVIDERS\")\n\ndef _transition_alias_impl(ctx):\n    # `ctx.attr.actual` is a list of 1 item due to the transition\n    providers = [ctx.attr.actual[0][provider] for provider in COMMON_PROVIDERS]\n    if CcInfo in ctx.attr.actual[0]:\n        providers.append(ctx.attr.actual[0][CcInfo])\n    return providers\n\ndef _change_compilation_mode(compilation_mode):\n    def _change_compilation_mode_impl(_settings, _attr):\n        return {\n            \"//command_line_option:compilation_mode\": compilation_mode,\n        }\n\n    return transition(\n        implementation = _change_compilation_mode_impl,\n        inputs = [],\n        outputs = [\n            \"//command_line_option:compilation_mode\",\n        ],\n    )\n\ndef _transition_alias_rule(compilation_mode):\n    return rule(\n        implementation = _transition_alias_impl,\n        provides = COMMON_PROVIDERS,\n        attrs = {\n            \"actual\": attr.label(\n                mandatory = True,\n                doc = \"`rust_library()` target to transition to `compilation_mode=opt`.\",\n                providers = COMMON_PROVIDERS,\n                cfg = _change_compilation_mode(compilation_mode),\n            ),\n            \"_allowlist_function_transition\": attr.label(\n                default = \"@bazel_tools//tools/allowlists/function_transition_allowlist\",\n            ),\n        },\n        doc = \"Transitions a Rust library crate to the `compilation_mode=opt`.\",\n    )\n\ntransition_alias_dbg = _transition_alias_rule(\"dbg\")\ntransition_alias_fastbuild = _transition_alias_rule(\"fastbuild\")\ntransition_alias_opt = _transition_alias_rule(\"opt\")\n",
+                "defs.bzl": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\"\"\"\n# `crates_repository` API\n\n- [aliases](#aliases)\n- [crate_deps](#crate_deps)\n- [all_crate_deps](#all_crate_deps)\n- [crate_repositories](#crate_repositories)\n\n\"\"\"\n\nload(\"@bazel_tools//tools/build_defs/repo:git.bzl\", \"new_git_repository\")\nload(\"@bazel_tools//tools/build_defs/repo:http.bzl\", \"http_archive\")\nload(\"@bazel_tools//tools/build_defs/repo:utils.bzl\", \"maybe\")\nload(\"@bazel_skylib//lib:selects.bzl\", \"selects\")\nload(\"@rules_rust//crate_universe/private:local_crate_mirror.bzl\", \"local_crate_mirror\")\n\n###############################################################################\n# MACROS API\n###############################################################################\n\n# An identifier that represent common dependencies (unconditional).\n_COMMON_CONDITION = \"\"\n\ndef _flatten_dependency_maps(all_dependency_maps):\n    \"\"\"Flatten a list of dependency maps into one dictionary.\n\n    Dependency maps have the following structure:\n\n    ```python\n    DEPENDENCIES_MAP = {\n        # The first key in the map is a Bazel package\n        # name of the workspace this file is defined in.\n        \"workspace_member_package\": {\n\n            # Not all dependencies are supported for all platforms.\n            # the condition key is the condition required to be true\n            # on the host platform.\n            \"condition\": {\n\n                # An alias to a crate target.     # The label of the crate target the\n                # Aliases are only crate names.   # package name refers to.\n                \"package_name\":                   \"@full//:label\",\n            }\n        }\n    }\n    ```\n\n    Args:\n        all_dependency_maps (list): A list of dicts as described above\n\n    Returns:\n        dict: A dictionary as described above\n    \"\"\"\n    dependencies = {}\n\n    for workspace_deps_map in all_dependency_maps:\n        for pkg_name, conditional_deps_map in workspace_deps_map.items():\n            if pkg_name not in dependencies:\n                non_frozen_map = dict()\n                for key, values in conditional_deps_map.items():\n                    non_frozen_map.update({key: dict(values.items())})\n                dependencies.setdefault(pkg_name, non_frozen_map)\n                continue\n\n            for condition, deps_map in conditional_deps_map.items():\n                # If the condition has not been recorded, do so and continue\n                if condition not in dependencies[pkg_name]:\n                    dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))\n                    continue\n\n                # Alert on any miss-matched dependencies\n                inconsistent_entries = []\n                for crate_name, crate_label in deps_map.items():\n                    existing = dependencies[pkg_name][condition].get(crate_name)\n                    if existing and existing != crate_label:\n                        inconsistent_entries.append((crate_name, existing, crate_label))\n                    dependencies[pkg_name][condition].update({crate_name: crate_label})\n\n    return dependencies\n\ndef crate_deps(deps, package_name = None):\n    \"\"\"Finds the fully qualified label of the requested crates for the package where this macro is called.\n\n    Args:\n        deps (list): The desired list of crate targets.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()`.\n\n    Returns:\n        list: A list of labels to generated rust targets (str)\n    \"\"\"\n\n    if not deps:\n        return []\n\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Join both sets of dependencies\n    dependencies = _flatten_dependency_maps([\n        _NORMAL_DEPENDENCIES,\n        _NORMAL_DEV_DEPENDENCIES,\n        _PROC_MACRO_DEPENDENCIES,\n        _PROC_MACRO_DEV_DEPENDENCIES,\n        _BUILD_DEPENDENCIES,\n        _BUILD_PROC_MACRO_DEPENDENCIES,\n    ]).pop(package_name, {})\n\n    # Combine all conditional packages so we can easily index over a flat list\n    # TODO: Perhaps this should actually return select statements and maintain\n    # the conditionals of the dependencies\n    flat_deps = {}\n    for deps_set in dependencies.values():\n        for crate_name, crate_label in deps_set.items():\n            flat_deps.update({crate_name: crate_label})\n\n    missing_crates = []\n    crate_targets = []\n    for crate_target in deps:\n        if crate_target not in flat_deps:\n            missing_crates.append(crate_target)\n        else:\n            crate_targets.append(flat_deps[crate_target])\n\n    if missing_crates:\n        fail(\"Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`\".format(\n            missing_crates,\n            package_name,\n            dependencies,\n        ))\n\n    return crate_targets\n\ndef all_crate_deps(\n        normal = False, \n        normal_dev = False, \n        proc_macro = False, \n        proc_macro_dev = False,\n        build = False,\n        build_proc_macro = False,\n        package_name = None):\n    \"\"\"Finds the fully qualified label of all requested direct crate dependencies \\\n    for the package where this macro is called.\n\n    If no parameters are set, all normal dependencies are returned. Setting any one flag will\n    otherwise impact the contents of the returned list.\n\n    Args:\n        normal (bool, optional): If True, normal dependencies are included in the\n            output list.\n        normal_dev (bool, optional): If True, normal dev dependencies will be\n            included in the output list..\n        proc_macro (bool, optional): If True, proc_macro dependencies are included\n            in the output list.\n        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n            included in the output list.\n        build (bool, optional): If True, build dependencies are included\n            in the output list.\n        build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n            included in the output list.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()` when unset.\n\n    Returns:\n        list: A list of labels to generated rust targets (str)\n    \"\"\"\n\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Determine the relevant maps to use\n    all_dependency_maps = []\n    if normal:\n        all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n    if normal_dev:\n        all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)\n    if proc_macro:\n        all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)\n    if proc_macro_dev:\n        all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)\n    if build:\n        all_dependency_maps.append(_BUILD_DEPENDENCIES)\n    if build_proc_macro:\n        all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)\n\n    # Default to always using normal dependencies\n    if not all_dependency_maps:\n        all_dependency_maps.append(_NORMAL_DEPENDENCIES)\n\n    dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)\n\n    if not dependencies:\n        if dependencies == None:\n            fail(\"Tried to get all_crate_deps for package \" + package_name + \" but that package had no Cargo.toml file\")\n        else:\n            return []\n\n    crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())\n    for condition, deps in dependencies.items():\n        crate_deps += selects.with_or({\n            tuple(_CONDITIONS[condition]): deps.values(),\n            \"//conditions:default\": [],\n        })\n\n    return crate_deps\n\ndef aliases(\n        normal = False,\n        normal_dev = False,\n        proc_macro = False,\n        proc_macro_dev = False,\n        build = False,\n        build_proc_macro = False,\n        package_name = None):\n    \"\"\"Produces a map of Crate alias names to their original label\n\n    If no dependency kinds are specified, `normal` and `proc_macro` are used by default.\n    Setting any one flag will otherwise determine the contents of the returned dict.\n\n    Args:\n        normal (bool, optional): If True, normal dependencies are included in the\n            output list.\n        normal_dev (bool, optional): If True, normal dev dependencies will be\n            included in the output list..\n        proc_macro (bool, optional): If True, proc_macro dependencies are included\n            in the output list.\n        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are\n            included in the output list.\n        build (bool, optional): If True, build dependencies are included\n            in the output list.\n        build_proc_macro (bool, optional): If True, build proc_macro dependencies are\n            included in the output list.\n        package_name (str, optional): The package name of the set of dependencies to look up.\n            Defaults to `native.package_name()` when unset.\n\n    Returns:\n        dict: The aliases of all associated packages\n    \"\"\"\n    if package_name == None:\n        package_name = native.package_name()\n\n    # Determine the relevant maps to use\n    all_aliases_maps = []\n    if normal:\n        all_aliases_maps.append(_NORMAL_ALIASES)\n    if normal_dev:\n        all_aliases_maps.append(_NORMAL_DEV_ALIASES)\n    if proc_macro:\n        all_aliases_maps.append(_PROC_MACRO_ALIASES)\n    if proc_macro_dev:\n        all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)\n    if build:\n        all_aliases_maps.append(_BUILD_ALIASES)\n    if build_proc_macro:\n        all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)\n\n    # Default to always using normal aliases\n    if not all_aliases_maps:\n        all_aliases_maps.append(_NORMAL_ALIASES)\n        all_aliases_maps.append(_PROC_MACRO_ALIASES)\n\n    aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)\n\n    if not aliases:\n        return dict()\n\n    common_items = aliases.pop(_COMMON_CONDITION, {}).items()\n\n    # If there are only common items in the dictionary, immediately return them\n    if not len(aliases.keys()) == 1:\n        return dict(common_items)\n\n    # Build a single select statement where each conditional has accounted for the\n    # common set of aliases.\n    crate_aliases = {\"//conditions:default\": dict(common_items)}\n    for condition, deps in aliases.items():\n        condition_triples = _CONDITIONS[condition]\n        for triple in condition_triples:\n            if triple in crate_aliases:\n                crate_aliases[triple].update(deps)\n            else:\n                crate_aliases.update({triple: dict(deps.items() + common_items)})\n\n    return select(crate_aliases)\n\n###############################################################################\n# WORKSPACE MEMBER DEPS AND ALIASES\n###############################################################################\n\n_NORMAL_DEPENDENCIES = {\n    \"third_party/tock\": {\n        _COMMON_CONDITION: {\n            \"ghash\": Label(\"@tock_index//:ghash-0.4.4\"),\n            \"libm\": Label(\"@tock_index//:libm-0.2.7\"),\n        },\n    },\n}\n\n\n_NORMAL_ALIASES = {\n    \"third_party/tock\": {\n        _COMMON_CONDITION: {\n        },\n    },\n}\n\n\n_NORMAL_DEV_DEPENDENCIES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_NORMAL_DEV_ALIASES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_PROC_MACRO_DEPENDENCIES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_PROC_MACRO_ALIASES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_PROC_MACRO_DEV_DEPENDENCIES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_PROC_MACRO_DEV_ALIASES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_BUILD_DEPENDENCIES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_BUILD_ALIASES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_BUILD_PROC_MACRO_DEPENDENCIES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_BUILD_PROC_MACRO_ALIASES = {\n    \"third_party/tock\": {\n    },\n}\n\n\n_CONDITIONS = {\n    \"aarch64-apple-darwin\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"aarch64-linux-android\": [],\n    \"aarch64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_os = \\\"linux\\\"))\": [\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\"],\n    \"cfg(all(target_arch = \\\"aarch64\\\", target_vendor = \\\"apple\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\"],\n    \"cfg(any(target_arch = \\\"aarch64\\\", target_arch = \\\"x86_64\\\", target_arch = \\\"x86\\\"))\": [\"@rules_rust//rust/platform:aarch64-apple-darwin\",\"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\",\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\",\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n    \"wasm32-unknown-unknown\": [\"@rules_rust//rust/platform:wasm32-unknown-unknown\"],\n    \"wasm32-wasip1\": [\"@rules_rust//rust/platform:wasm32-wasip1\"],\n    \"x86_64-pc-windows-msvc\": [\"@rules_rust//rust/platform:x86_64-pc-windows-msvc\"],\n    \"x86_64-unknown-linux-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\"],\n    \"x86_64-unknown-nixos-gnu\": [\"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\"],\n}\n\n###############################################################################\n\ndef crate_repositories():\n    \"\"\"A macro for defining repositories for all generated crates.\n\n    Returns:\n      A list of repos visible to the module through the module extension.\n    \"\"\"\n    maybe(\n        http_archive,\n        name = \"tock_index__cfg-if-1.0.0\",\n        sha256 = \"baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/cfg-if/1.0.0/download\"],\n        strip_prefix = \"cfg-if-1.0.0\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.cfg-if-1.0.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__cpufeatures-0.2.9\",\n        sha256 = \"a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/cpufeatures/0.2.9/download\"],\n        strip_prefix = \"cpufeatures-0.2.9\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.cpufeatures-0.2.9.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__generic-array-0.14.7\",\n        sha256 = \"85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/generic-array/0.14.7/download\"],\n        strip_prefix = \"generic-array-0.14.7\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.generic-array-0.14.7.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__ghash-0.4.4\",\n        sha256 = \"1583cc1656d7839fd3732b80cf4f38850336cdb9b8ded1cd399ca62958de3c99\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/ghash/0.4.4/download\"],\n        strip_prefix = \"ghash-0.4.4\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.ghash-0.4.4.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__libc-0.2.147\",\n        sha256 = \"b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/libc/0.2.147/download\"],\n        strip_prefix = \"libc-0.2.147\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.libc-0.2.147.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__libm-0.2.7\",\n        sha256 = \"f7012b1bbb0719e1097c47611d3898568c546d597c2e74d66f6087edd5233ff4\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/libm/0.2.7/download\"],\n        strip_prefix = \"libm-0.2.7\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.libm-0.2.7.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__opaque-debug-0.3.0\",\n        sha256 = \"624a8340c38c1b80fd549087862da4ba43e08858af025b236e509b6649fc13d5\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/opaque-debug/0.3.0/download\"],\n        strip_prefix = \"opaque-debug-0.3.0\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.opaque-debug-0.3.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__polyval-0.5.3\",\n        sha256 = \"8419d2b623c7c0896ff2d5d96e2cb4ede590fed28fcc34934f4c33c036e620a1\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/polyval/0.5.3/download\"],\n        strip_prefix = \"polyval-0.5.3\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.polyval-0.5.3.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__subtle-2.4.1\",\n        sha256 = \"6bdef32e8150c2a081110b42772ffe7d7c9032b606bc226c8260fd97e0976601\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/subtle/2.4.1/download\"],\n        strip_prefix = \"subtle-2.4.1\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.subtle-2.4.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__typenum-1.16.0\",\n        sha256 = \"497961ef93d974e23eb6f433eb5fe1b7930b659f06d12dec6fc44a8f554c0bba\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/typenum/1.16.0/download\"],\n        strip_prefix = \"typenum-1.16.0\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.typenum-1.16.0.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__universal-hash-0.4.1\",\n        sha256 = \"9f214e8f697e925001e66ec2c6e37a4ef93f0f78c2eed7814394e10c62025b05\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/universal-hash/0.4.1/download\"],\n        strip_prefix = \"universal-hash-0.4.1\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.universal-hash-0.4.1.bazel\"),\n    )\n\n    maybe(\n        http_archive,\n        name = \"tock_index__version_check-0.9.4\",\n        sha256 = \"49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f\",\n        type = \"tar.gz\",\n        urls = [\"https://static.crates.io/crates/version_check/0.9.4/download\"],\n        strip_prefix = \"version_check-0.9.4\",\n        build_file = Label(\"@tock_index//tock_index:BUILD.version_check-0.9.4.bazel\"),\n    )\n\n    return [\n       struct(repo=\"tock_index__ghash-0.4.4\", is_dev_dep = False),\n       struct(repo=\"tock_index__libm-0.2.7\", is_dev_dep = False),\n    ]\n"
+              }
+            }
+          },
+          "tock_index__cfg-if-1.0.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cfg-if/1.0.0/download"
+              ],
+              "strip_prefix": "cfg-if-1.0.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cfg_if\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cfg-if\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"1.0.0\",\n)\n"
+            }
+          },
+          "tock_index__cpufeatures-0.2.9": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/cpufeatures/0.2.9/download"
+              ],
+              "strip_prefix": "cpufeatures-0.2.9",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"cpufeatures\",\n    deps = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@tock_index__libc-0.2.147//:libc\",  # cfg(all(target_arch = \"aarch64\", target_vendor = \"apple\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@tock_index__libc-0.2.147//:libc\",  # cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=cpufeatures\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.9\",\n)\n"
+            }
+          },
+          "tock_index__generic-array-0.14.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/generic-array/0.14.7/download"
+              ],
+              "strip_prefix": "generic-array-0.14.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"generic_array\",\n    deps = [\n        \"@tock_index__generic-array-0.14.7//:build_script_build\",\n        \"@tock_index__typenum-1.16.0//:typenum\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=generic-array\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.14.7\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    deps = [\n        \"@tock_index__version_check-0.9.4//:version_check\",\n    ],\n    edition = \"2015\",\n    pkg_name = \"generic-array\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=generic-array\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.14.7\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "tock_index__ghash-0.4.4": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "1583cc1656d7839fd3732b80cf4f38850336cdb9b8ded1cd399ca62958de3c99",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/ghash/0.4.4/download"
+              ],
+              "strip_prefix": "ghash-0.4.4",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"ghash\",\n    deps = [\n        \"@tock_index__opaque-debug-0.3.0//:opaque_debug\",\n        \"@tock_index__polyval-0.5.3//:polyval\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=ghash\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.4\",\n)\n"
+            }
+          },
+          "tock_index__libc-0.2.147": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libc/0.2.147/download"
+              ],
+              "strip_prefix": "libc-0.2.147",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libc\",\n    deps = [\n        \"@tock_index__libc-0.2.147//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.147\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n        \"std\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2015\",\n    pkg_name = \"libc\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libc\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.147\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "tock_index__libm-0.2.7": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "f7012b1bbb0719e1097c47611d3898568c546d597c2e74d66f6087edd5233ff4",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/libm/0.2.7/download"
+              ],
+              "strip_prefix": "libm-0.2.7",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\n    \"@rules_rust//cargo:defs.bzl\",\n    \"cargo_build_script\",\n    \"cargo_toml_env_vars\",\n)\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"libm\",\n    deps = [\n        \"@tock_index__libm-0.2.7//:build_script_build\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.2.7\",\n)\n\ncargo_build_script(\n    name = \"_bs\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \"**/*.rs\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_features = [\n        \"default\",\n    ],\n    crate_name = \"build_script_build\",\n    crate_root = \"build.rs\",\n    data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    edition = \"2018\",\n    pkg_name = \"libm\",\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=libm\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    version = \"0.2.7\",\n    visibility = [\"//visibility:private\"],\n)\n\nalias(\n    name = \"build_script_build\",\n    actual = \":_bs\",\n    tags = [\"manual\"],\n)\n"
+            }
+          },
+          "tock_index__opaque-debug-0.3.0": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "624a8340c38c1b80fd549087862da4ba43e08858af025b236e509b6649fc13d5",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/opaque-debug/0.3.0/download"
+              ],
+              "strip_prefix": "opaque-debug-0.3.0",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"opaque_debug\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=opaque-debug\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.3.0\",\n)\n"
+            }
+          },
+          "tock_index__polyval-0.5.3": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "8419d2b623c7c0896ff2d5d96e2cb4ede590fed28fcc34934f4c33c036e620a1",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/polyval/0.5.3/download"
+              ],
+              "strip_prefix": "polyval-0.5.3",
+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"polyval\",\n    deps = [\n        \"@tock_index__cfg-if-1.0.0//:cfg_if\",\n        \"@tock_index__opaque-debug-0.3.0//:opaque_debug\",\n        \"@tock_index__universal-hash-0.4.1//:universal_hash\",\n    ] + select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [\n            \"@tock_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [\n            \"@tock_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [\n            \"@tock_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [\n            \"@tock_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [\n            \"@tock_index__cpufeatures-0.2.9//:cpufeatures\",  # cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))\n        ],\n        \"//conditions:default\": [],\n    }),\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=polyval\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.5.3\",\n)\n"
+            }
+          },
+          "tock_index__subtle-2.4.1": {
+            "repoRuleId": "@@bazel_tools//tools/build_defs/repo:http.bzl%http_archive",
+            "attributes": {
+              "patch_args": [],
+              "patch_tool": "",
+              "patches": [],
+              "remote_patch_strip": 1,
+              "sha256": "6bdef32e8150c2a081110b42772ffe7d7c9032b606bc226c8260fd97e0976601",
+              "type": "tar.gz",
+              "urls": [
+                "https://static.crates.io/crates/subtle/2.4.1/download"
+              ],
+              "strip_prefix": "subtle-2.4.1",
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"universal_hash\",\n    deps = [\n        \"@tock_index__generic-array-0.14.7//:generic_array\",\n        \"@tock_index__subtle-2.4.1//:subtle\",\n    ],\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2018\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=universal-hash\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.4.1\",\n)\n"
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+              "build_file_content": "###############################################################################\n# @generated\n# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To \n# regenerate this file, run the following:\n#\n#     bazel mod show_repo 'lowrisc_opentitan'\n###############################################################################\n\nload(\"@rules_rust//cargo:defs.bzl\", \"cargo_toml_env_vars\")\n\nload(\"@rules_rust//rust:defs.bzl\", \"rust_library\")\n\n# buildifier: disable=bzl-visibility\nload(\"@rules_rust//crate_universe/private:selects.bzl\", \"selects\")\n\npackage(default_visibility = [\"//visibility:public\"])\n\ncargo_toml_env_vars(\n    name = \"cargo_toml_env_vars\",\n    src = \"Cargo.toml\",\n)\n\nrust_library(\n    name = \"version_check\",\n    compile_data = glob(\n        allow_empty = True,\n        include = [\"**\"],\n        exclude = [\n            \"**/* *\",\n            \".tmp_git_root/**/*\",\n            \"BUILD\",\n            \"BUILD.bazel\",\n            \"WORKSPACE\",\n            \"WORKSPACE.bazel\",\n        ],\n    ),\n    crate_root = \"src/lib.rs\",\n    edition = \"2015\",\n    rustc_env_files = [\n        \":cargo_toml_env_vars\",\n    ],\n    rustc_flags = [\n        \"--cap-lints=allow\",\n    ],\n    srcs = glob(\n        allow_empty = True,\n        include = [\"**/*.rs\"],\n    ),\n    tags = [\n        \"cargo-bazel\",\n        \"crate-name=version_check\",\n        \"manual\",\n        \"noclippy\",\n        \"norustfmt\",\n    ],\n    target_compatible_with = select({\n        \"@rules_rust//rust/platform:aarch64-apple-darwin\": [],\n        \"@rules_rust//rust/platform:aarch64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:wasm32-unknown-unknown\": [],\n        \"@rules_rust//rust/platform:wasm32-wasip1\": [],\n        \"@rules_rust//rust/platform:x86_64-pc-windows-msvc\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-linux-gnu\": [],\n        \"@rules_rust//rust/platform:x86_64-unknown-nixos-gnu\": [],\n        \"//conditions:default\": [\"@platforms//:incompatible\"],\n    }),\n    version = \"0.9.4\",\n)\n"
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+        },
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+            "rust_host_tools",
+            "rules_rust++rust_host_tools+rust_host_tools"
+          ]
+        ]
+      }
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+            "attributes": {
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+                "@@rules_rust+//crate_universe:src/api/lockfile.rs",
+                "@@rules_rust+//crate_universe:src/cli.rs",
+                "@@rules_rust+//crate_universe:src/cli/generate.rs",
+                "@@rules_rust+//crate_universe:src/cli/query.rs",
+                "@@rules_rust+//crate_universe:src/cli/render.rs",
+                "@@rules_rust+//crate_universe:src/cli/splice.rs",
+                "@@rules_rust+//crate_universe:src/cli/vendor.rs",
+                "@@rules_rust+//crate_universe:src/config.rs",
+                "@@rules_rust+//crate_universe:src/context.rs",
+                "@@rules_rust+//crate_universe:src/context/crate_context.rs",
+                "@@rules_rust+//crate_universe:src/context/platforms.rs",
+                "@@rules_rust+//crate_universe:src/lib.rs",
+                "@@rules_rust+//crate_universe:src/lockfile.rs",
+                "@@rules_rust+//crate_universe:src/main.rs",
+                "@@rules_rust+//crate_universe:src/metadata.rs",
+                "@@rules_rust+//crate_universe:src/metadata/cargo_bin.rs",
+                "@@rules_rust+//crate_universe:src/metadata/cargo_tree_resolver.rs",
+                "@@rules_rust+//crate_universe:src/metadata/cargo_tree_rustc_wrapper.bat",
+                "@@rules_rust+//crate_universe:src/metadata/cargo_tree_rustc_wrapper.sh",
+                "@@rules_rust+//crate_universe:src/metadata/dependency.rs",
+                "@@rules_rust+//crate_universe:src/metadata/metadata_annotation.rs",
+                "@@rules_rust+//crate_universe:src/metadata/workspace_discoverer.rs",
+                "@@rules_rust+//crate_universe:src/rendering.rs",
+                "@@rules_rust+//crate_universe:src/rendering/template_engine.rs",
+                "@@rules_rust+//crate_universe:src/rendering/templates/module_bzl.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/partials/header.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/partials/module/aliases_map.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/partials/module/deps_map.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/partials/module/repo_git.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/partials/module/repo_http.j2",
+                "@@rules_rust+//crate_universe:src/rendering/templates/vendor_module.j2",
+                "@@rules_rust+//crate_universe:src/rendering/verbatim/alias_rules.bzl",
+                "@@rules_rust+//crate_universe:src/select.rs",
+                "@@rules_rust+//crate_universe:src/splicing.rs",
+                "@@rules_rust+//crate_universe:src/splicing/cargo_config.rs",
+                "@@rules_rust+//crate_universe:src/splicing/crate_index_lookup.rs",
+                "@@rules_rust+//crate_universe:src/splicing/splicer.rs",
+                "@@rules_rust+//crate_universe:src/test.rs",
+                "@@rules_rust+//crate_universe:src/utils.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/glob.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/label.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/select.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/select_dict.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/select_list.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/select_scalar.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/select_set.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/serialize.rs",
+                "@@rules_rust+//crate_universe:src/utils/starlark/target_compatible_with.rs",
+                "@@rules_rust+//crate_universe:src/utils/symlink.rs",
+                "@@rules_rust+//crate_universe:src/utils/target_triple.rs"
+              ],
+              "binary": "cargo-bazel",
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+              "compressed_windows_toolchain_names": false
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+            "bazel_features++version_extension+bazel_features_version"
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+            "bazel_tools"
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+            "bazel_skylib+"
+          ],
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+              "cxx_standard": {},
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+              "link_flags": {},
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+            "bazel_tools",
+            "bazel_tools"
+          ],
+          [
+            "toolchains_llvm+",
+            "toolchains_llvm",
+            "toolchains_llvm+"
+          ]
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+      }
+    }
+  }
+}
diff --git a/SUMMARY.md b/SUMMARY.md
index 9a76b0e61d147..0425dac42f599 100644
--- a/SUMMARY.md
+++ b/SUMMARY.md
@@ -12,11 +12,13 @@
   - [Building (and Testing) Software](./doc/getting_started/build_sw.md)
   - [Building Documentation](./doc/getting_started/build_docs.md)
   - [Using OpenOCD](./doc/getting_started/using_openocd.md)
+  - [Using QEMU](./third_party/qemu/README.md)
 
 - [Tools Setup](./doc/getting_started/tools-setup.md)
   - [FPGA Setup](./doc/getting_started/setup_fpga.md)
   - [Verilator Setup](./doc/getting_started/setup_verilator.md)
   - [Installing Vivado](./doc/getting_started/install_vivado/README.md)
+  - [QEMU setup](./third_party/qemu/setup.md)
 
 - [Unofficial Guides](./doc/getting_started/unofficial/README.md)
   - [RedHat/Fedora](./doc/getting_started/unofficial/fedora.md)
@@ -407,7 +409,10 @@
 
 # Software
 - [Introduction](./sw/README.md)
+
 - [Build Software](./sw/doc/build_software.md)
+  - [External dependencies](./third_party/README.md)
+  - [RISC-V toolchain](./toolchain/README.md)
 
 - [Device Software](./sw/device/README.md)
   - [Build & Test Rules](./rules/opentitan/README.md)
@@ -467,6 +472,7 @@
       - [Shutdown Specification](./sw/device/silicon_creator/rom/doc/shutdown.md)
     - [ROM\_EXT](./sw/device/silicon_creator/rom_ext/README.md)
       - [ROM\_EXT for Silicon Validation](./sw/device/silicon_creator/rom_ext/doc/si_val.md)
+      - [ROM\_EXT Ownership Transfer](./sw/device/silicon_creator/rom_ext/doc/ownership.md)
       - [ROM\_EXT Rescue Protocol](./sw/device/silicon_creator/rom_ext/doc/rescue.md)
     - [Manifest Format](./sw/device/silicon_creator/rom_ext/doc/manifest.md)
     - [Boot Log](./sw/device/silicon_creator/doc/boot_log.md)
@@ -478,6 +484,7 @@
 
 - [Host Software](./sw/host/README.md)
   - [OpenTitanLib](./sw/host/opentitanlib/README.md)
+    - [Bitbanging](./sw/host/opentitanlib/doc/bitbanging.md)
   - [OpenTitanTool](./sw/host/opentitantool/README.md)
   - [OpenTitanSession](./sw/host/opentitansession/README.md)
   - [OpenTitan Certificate Generator](./sw/host/ot_certs/README.md)
diff --git a/WORKSPACE b/WORKSPACE
deleted file mode 100644
index 1d39a566b33ab..0000000000000
--- a/WORKSPACE
+++ /dev/null
@@ -1,175 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# If you're planning to add to this file, please read
-# //third_party/README.md first.
-
-workspace(name = "lowrisc_opentitan")
-
-# Bazel skylib library
-load("//third_party/skylib:repos.bzl", "bazel_skylib_repos")
-bazel_skylib_repos()
-load("@bazel_skylib//:workspace.bzl", "bazel_skylib_workspace")
-bazel_skylib_workspace()
-
-# CRT is the Compiler Repository Toolkit.  It contains the configuration for
-# the windows compiler.
-load("//third_party/crt:repos.bzl", "crt_repos")
-crt_repos()
-load("@crt//:repos.bzl", "crt_repos")
-crt_repos()
-load("@crt//:deps.bzl", "crt_deps")
-crt_deps()
-load("@crt//config:registration.bzl", "crt_register_toolchains")
-crt_register_toolchains(riscv32 = True)
-
-# Tools for release automation
-load("//third_party/github:repos.bzl", "github_tools_repos")
-github_tools_repos()
-
-# Go Toolchain (needed by the Buildifier linter)
-load("//third_party/go:repos.bzl", "go_repos")
-go_repos()
-load("//third_party/go:deps.bzl", "go_deps")
-go_deps()
-
-# Various linters
-load("//third_party/lint:repos.bzl", "lint_repos")
-lint_repos()
-load("//third_party/lint:deps.bzl", "lint_deps")
-lint_deps()
-
-# Lychee link checker.
-load("//third_party/lychee:repos.bzl", "lychee_repos")
-lychee_repos()
-
-# Python Toolchain + PIP Dependencies
-load("//third_party/python:repos.bzl", "python_repos")
-python_repos()
-load("//third_party/python:deps.bzl", "python_deps")
-python_deps()
-load("//third_party/python:pip.bzl", "pip_deps")
-pip_deps()
-
-# Google/Bazel dependencies.  This needs to be after Python initialization
-# so that our preferred python configuration takes precedence.
-load("//third_party/google:repos.bzl", "google_repos")
-google_repos()
-load("//third_party/google:deps.bzl", "google_deps")
-google_deps()
-
-# Rust Toolchain + crates.io Dependencies
-load("//third_party/rust:repos.bzl", "rust_repos")
-rust_repos()
-load("//third_party/rust:deps.bzl", "rust_deps")
-rust_deps()
-
-load("@rules_rust//crate_universe:repositories.bzl", "crate_universe_dependencies")
-crate_universe_dependencies(bootstrap = True)
-
-load("//third_party/rust/crates:crates.bzl", "crate_repositories")
-crate_repositories()
-
-# Shellcheck
-load("//third_party/shellcheck:repos.bzl", "shellcheck_repos")
-shellcheck_repos()
-
-# Tock dependencies.
-load("//third_party/tock/crates:crates.bzl", tock_crate_repositories = "crate_repositories")
-tock_crate_repositories()
-load("//third_party/tock:repos.bzl", tock_repos="tock_repos")
-tock_repos(
-    # For developing tock/libtock along side OpenTitan, set these parameters
-    # to your local checkout of tock and libtock-rs respectively.
-    #tock = "../tock",
-    #libtock = "../libtock-rs",
-)
-
-# OpenOCD
-load("//third_party/openocd:repos.bzl", "openocd_repos")
-openocd_repos()
-
-# Protobuf Toolchain
-load("//third_party/protobuf:repos.bzl", "protobuf_repos")
-protobuf_repos()
-load("//third_party/protobuf:deps.bzl", "protobuf_deps")
-protobuf_deps()
-
-# FreeRTOS; used by the OTTF
-load("//third_party/freertos:repos.bzl", "freertos_repos")
-freertos_repos()
-
-# LLVM Compiler Runtime for Profiling
-load("//third_party/llvm_compiler_rt:repos.bzl", "llvm_compiler_rt_repos")
-llvm_compiler_rt_repos()
-
-# RISC-V Compliance Tests
-load("//third_party/riscv-compliance:repos.bzl", "riscv_compliance_repos")
-riscv_compliance_repos()
-
-# CoreMark benchmark
-load("//third_party/coremark:repos.bzl", "coremark_repos")
-coremark_repos()
-
-# The standard Keccak algorithms
-load("//third_party/xkcp:repos.bzl", "xkcp_repos")
-xkcp_repos()
-
-# HSM related repositories (SoftHSM2, etc)
-load("//third_party/hsm:repos.bzl", "hsm_repos")
-hsm_repos()
-
-# NIST CAVP Test Vectors
-load("//third_party/nist_cavp_testvectors:repos.bzl", "nist_cavp_repos")
-nist_cavp_repos()
-
-# Wycheproof Test Vectors
-load("//third_party/wycheproof:repos.bzl", "wycheproof_repos")
-wycheproof_repos()
-
-# SPHINCS+ Test Vectors
-load("//third_party/sphincsplus:repos.bzl", "sphincsplus_repos")
-sphincsplus_repos()
-
-# Bitstreams from https://storage.googleapis.com/opentitan-bitstreams/
-load("//rules:bitstreams.bzl", "bitstreams_repo")
-bitstreams_repo(name = "bitstreams")
-
-# Setup for linking in externally managed test and provisioning customizations
-# for both secure/non-secure manufacturer domains.
-load("//rules:hooks_setup.bzl", "hooks_setup", "provisioning_exts_setup", "secure_hooks_setup")
-hooks_setup(
-    name = "hooks_setup",
-    dummy = "sw/device/tests/closed_source",
-)
-secure_hooks_setup(
-    name = "secure_hooks_setup",
-    dummy = "sw/device/tests/closed_source",
-)
-provisioning_exts_setup(
-    name = "provisioning_exts_setup",
-    dummy = "sw/device/silicon_creator/manuf/extensions",
-)
-
-# Declare the external repositories:
-#  - One for both manufacturer secure and non-secure domains.
-#  - One for provisioning source code extensions.
-load("@hooks_setup//:repos.bzl", "hooks_repo")
-load("@secure_hooks_setup//:repos.bzl", "secure_hooks_repo")
-load("@provisioning_exts_setup//:repos.bzl", "provisioning_exts_repo")
-hooks_repo(name = "manufacturer_test_hooks")
-secure_hooks_repo(name = "secure_manufacturer_test_hooks")
-provisioning_exts_repo(name = "provisioning_exts")
-
-# The nonhermetic_repo imports environment variables needed to run vivado.
-load("//rules:nonhermetic.bzl", "nonhermetic_repo")
-nonhermetic_repo(name = "nonhermetic")
-
-# Binary firmware image for HyperDebug
-load("//third_party/hyperdebug:repos.bzl", "hyperdebug_repos")
-hyperdebug_repos()
-
-register_toolchains(
-    "//rules/opentitan:localtools",
-)
diff --git a/apt-requirements.txt b/apt-requirements.txt
index fa2a4cad0ca1a..91d648f9395fe 100644
--- a/apt-requirements.txt
+++ b/apt-requirements.txt
@@ -16,7 +16,9 @@ build-essential
 clang-format
 cmake
 curl
+dfu-util
 doxygen
+file
 flex
 g++
 git
@@ -30,6 +32,7 @@ libftdi1-dev
 libncursesw5
 libpcsclite-dev
 libssl-dev
+libtool
 libudev-dev
 libusb-1.0-0
 lld
@@ -47,6 +50,9 @@ python3-urllib3
 python3-wheel
 srecord
 tree
+xmlstarlet
 xsltproc
-zlib1g-dev
+xxd
 xz-utils
+zip
+zlib1g-dev
diff --git a/azure-pipelines.yml b/azure-pipelines.yml
deleted file mode 100644
index e55daa9f6b25a..0000000000000
--- a/azure-pipelines.yml
+++ /dev/null
@@ -1,853 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-#
-# Azure Pipelines CI build configuration
-# Documentation at https://aka.ms/yaml
-
-variables:
-  #
-  # If updating VERILATOR_VERSION, TOOLCHAIN_VERSION, update the
-  # definitions in util/container/Dockerfile as well.
-  #
-  VERILATOR_VERSION: 4.210
-  TOOLCHAIN_PATH: /opt/buildcache/riscv
-  VERIBLE_VERSION: v0.0-3622-g07b310a3
-  # Release tag from https://github.com/lowRISC/lowrisc-toolchains/releases
-  TOOLCHAIN_VERSION: 20220210-1
-  # This controls where builds happen, and gets picked up by build_consts.sh.
-  BUILD_ROOT: $(Build.ArtifactStagingDirectory)
-  VIVADO_VERSION: "2021.1"
-
-trigger:
-  batch: true
-  branches:
-    include:
-    - "*"
-    # Don't run workflow on auto-created backport branches (PR workflow will be run)
-    exclude:
-    - "backport-*"
-  tags:
-    include:
-    - "*"
-pr:
-  branches:
-    include:
-    - "*"
-
-jobs:
-- job: checkout
-  displayName: Checkout repository
-  pool:
-    vmImage: ubuntu-20.04
-  steps:
-  - checkout: self
-    path: opentitan-repo
-  - bash: |
-      tar -C $(Pipeline.Workspace)/opentitan-repo -czf $(Pipeline.Workspace)/opentitan-repo.tar.gz .
-    displayName: Pack up repository
-  - publish: $(Pipeline.Workspace)/opentitan-repo.tar.gz
-    artifact: opentitan-repo
-    displayName: Upload repository
-
-- job: lint
-  displayName: Quality (quick lint)
-  # Run code quality checks (quick lint)
-  dependsOn: checkout
-  pool: ci-public
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-    ## !!!
-    ##
-    ##   The steps below here are duplicated in ci/jobs/quick-lint.sh
-    ##   to allow developers to "run CI" locally. Keep them in sync.
-    ##
-    ## !!!
-  - bash: ci/scripts/show-env.sh
-    displayName: Environment Info
-    # Display environment information
-  - bash: ci/scripts/lint-commits.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Commit metadata
-  - bash: ci/scripts/check-licence-headers.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Licence Headers
-  - bash: ci/scripts/exec-check.sh
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Executable Bits
-  - bash: ci/scripts/check-ascii.sh
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: ASCII Chars
-    # Check for non-ASCII characters in source code
-  - bash: ci/scripts/python-lint.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: flake8 (Python lint)
-    # Run Python lint (flake8)
-  - bash: ci/scripts/mypy.sh
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: mypy (Python lint)
-    # Run Python lint (mypy)
-  - bash: ci/scripts/clang-format.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: clang-format (C/C++ lint)
-    # Use clang-format to check C/C++ coding style
-  - bash: ci/scripts/rust-format.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: rustfmt
-  - bash: |
-      ci/bazelisk.sh test //quality:shellcheck_check || {
-        echo -n "##vso[task.logissue type=error]"
-        echo "Shellcheck failed. Run util/sh/scripts/run-shellcheck.sh to see errors."
-        exit 1
-      }
-    displayName: shellcheck
-  - bash: ci/scripts/include-guard.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Header guards
-    # Check formatting on header guards
-  - bash: ci/scripts/whitespace.sh $SYSTEM_PULLREQUEST_TARGETBRANCH
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Check trailing whitespace
-  - bash: ci/scripts/check-links.sh
-    displayName: Check File Links
-  - bash: ci/scripts/check-cmdgen.sh
-    displayName: Check CMDGEN Blocks
-  - bash: ci/scripts/get-build-type.sh "$SYSTEM_PULLREQUEST_TARGETBRANCH" "$(Build.Reason)"
-    displayName: Type of change
-    # Check what kinds of changes the PR contains
-    name: DetermineBuildType
-  - bash: ci/scripts/check-no-bazelrc-site.sh
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Confirm no .bazelrc-site files
-
-- job: airgapped_bazel_build
-  displayName: Test an airgapped Bazel build
-  timeoutInMinutes: 120
-  dependsOn: checkout
-  condition: eq(variables['Build.Reason'], 'PullRequest')
-  pool:
-    vmImage: ubuntu-20.04
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - bash: ci/scripts/test-airgapped-build.sh
-
-- job: slow_lints
-  displayName: Quality (in-depth lint)
-  # Run code quality checks (in-depth lint)
-  dependsOn: lint
-  pool:
-    vmImage: ubuntu-20.04
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  # Check that all earlgrey countermeasures are implemented.
-  - bash: ci/scripts/check-countermeasures.sh earlgrey
-    displayName: Check countermeasures for top_earlgrey
-    continueOnError: True
-  # Bazel test suites are a common cause of problematic tags. Check test suites
-  # before checking for other tag issues.
-  - bash:  ci/scripts/check_bazel_test_suites.py
-    displayName: Check Bazel test suites (Experimental)
-    continueOnError: True
-  # #21973: Disabled until Verilator tags are fixed in our build tree.
-  #- bash: ci/scripts/check-bazel-tags.sh
-  #  displayName: Check Bazel Tags (Experimental)
-  #  continueOnError: True
-  - bash: ci/scripts/check-bazel-banned-rules.sh
-    displayName: Check for banned rules
-  - bash:  ci/scripts/check_bazel_target_names.py
-    displayName: Check Bazel target names (Experimental)
-    continueOnError: True
-  - bash: ci/scripts/check_dv_sw_images.sh
-    displayName: Check DV software images (Experimental)
-    continueOnError: True
-  - bash: ci/scripts/build-docs.sh
-    displayName: Render documentation
-  # Define OT_DESTRUCTIVE=1 to enable ci/scripts/check-generated.sh to delete
-  # uncommitted changes.
-  - bash: OT_DESTRUCTIVE=1 ci/scripts/check-generated.sh
-    displayName: Check Generated
-    # Ensure all generated files are clean and up-to-date
-  - bash: ci/bazelisk.sh test //quality:buildifier_check --test_output=streamed
-    displayName: Buildifier (Bazel lint)
-  - bash: ci/scripts/check-vendoring.sh
-    displayName: Vendored directories
-  - bash: ci/scripts/verible-lint.sh rtl
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Verible RTL (Verilog lint)
-  - bash: ci/scripts/verible-lint.sh dv
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Verible DV (Verilog lint)
-  - bash: ci/scripts/verible-lint.sh fpv
-    condition: eq(variables['Build.Reason'], 'PullRequest')
-    displayName: Verible FPV (Verilog lint)
-
-- job: sw_build
-  displayName: Earl Grey SW Build
-  # Build software tests for the Earl Grey toplevel design
-  timeoutInMinutes: 120
-  dependsOn: lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool: ci-public
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -x -e
-
-      # Check the entire build graph for conflicts in loading or analysis
-      # phases. For context, see issue #18726.
-      # First, test with an empty bitstream cache entry.
-      ci/scripts/test-empty-bitstream-cache.sh
-      # Now redo with the real bitstream cache included.
-      ci/bazelisk.sh build --nobuild //...
-
-      # This command selects the unit tests to be built:
-      # * It excludes //quality because that's the purview of `slow_lints`.
-      # * It excludes //sw/otbn/crypto because that's tested in `otbn_crypto_tests`.
-      # * It excludes the tests from //third_party/riscv-compliance because
-      #   they're already covered by `execute_fpga_tests_cw310`.
-      # * It excludes //hw:all to avoid building Verilator, which is pulled in
-      #   because //... effectively asks to build //hw:verilator_real and other
-      #   targets in //hw:all that depend on it. Note that this is only a
-      #   shallow exclusion; tests deeper under //hw will still be found.
-      # * It excludes targets that depend on bitstream_splice rules, since the
-      #   environment does not have access to Vivado.
-      # * It excludes all <ip>_regs targets under //hw/ip_templates, since
-      #   it makes no sense to build these under ip_templates. These IPs need
-      #   to be updated as more migrate to ipgen.
-      TARGET_PATTERN_FILE=target_pattern.txt
-      echo //... > "${TARGET_PATTERN_FILE}"
-      echo -//quality/... >> "${TARGET_PATTERN_FILE}"
-      echo -//sw/otbn/crypto/... >> "${TARGET_PATTERN_FILE}"
-      echo -//third_party/riscv-compliance/... >> "${TARGET_PATTERN_FILE}"
-      echo -//hw:all >> "${TARGET_PATTERN_FILE}"
-      ci/bazelisk.sh cquery \
-        --noinclude_aspects \
-        --output=starlark \
-        --starlark:expr='"-{}".format(target.label)' \
-        --define DISABLE_VERILATOR_BUILD=true \
-        -- "rdeps(//..., kind(bitstream_splice, //...))" \
-        >> "${TARGET_PATTERN_FILE}"
-
-      # Build all unit tests and their dependencies.
-      ci/bazelisk.sh build \
-        --build_tests_only=false \
-        --define DISABLE_VERILATOR_BUILD=true \
-        --test_tag_filters=-broken,-cw310,-verilator,-dv \
-        --target_pattern_file="${TARGET_PATTERN_FILE}"
-    displayName: Build SW
-  - publish: target_pattern.txt
-    artifact: target_pattern_file
-  - bash: |
-      set -x -e
-      . util/build_consts.sh
-      # copy the rom to a specific location
-      ROM_TARGET="${BIN_DIR}/sw/device/silicon_creator/rom"
-      mkdir -p "${ROM_TARGET}"
-      ROM_REAL_TARGETS="//sw/device/silicon_creator/rom:package"
-      QUERY_CMD_ARGS=(outquery-all --noinclude_aspects --noimplicit_deps)
-      ROM_REAL_FILES=($(ci/bazelisk.sh "${QUERY_CMD_ARGS[@]}" "${ROM_REAL_TARGETS}" | sort | uniq))
-      cp -Lvt "${ROM_TARGET}" "${ROM_REAL_FILES[@]}"
-  - template: ci/upload-artifacts-template.yml
-    parameters:
-      includePatterns:
-        - "/sw/***"
-
-- job: sw_test
-  displayName: Earl Grey SW Test
-  timeoutInMinutes: 120
-  dependsOn: sw_build
-  pool: ci-public
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/load-bazel-cache-write-creds.yml
-  - download: current
-    artifact: target_pattern_file
-  - bash: |
-      TARGET_PATTERN_FILE="$(Pipeline.Workspace)/target_pattern_file/target_pattern.txt"
-      ci/bazelisk.sh test \
-        --build_tests_only=false \
-        --test_output=errors \
-        --define DISABLE_VERILATOR_BUILD=true \
-        --test_tag_filters=-broken,-cw310,-verilator,-dv,-silicon \
-        --target_pattern_file="${TARGET_PATTERN_FILE}"
-    displayName: Build & test SW
-  - template: ci/publish-bazel-test-results.yml
-
-- job: chip_englishbreakfast_verilator
-  displayName: Verilated English Breakfast (Build)
-  # Build Verilator simulation of the English Breakfast toplevel design
-  dependsOn: lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool:
-    vmImage: ubuntu-20.04
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - bash: |
-      python3 --version
-      fusesoc --version
-      verilator --version
-      verible-verilog-lint --version
-    displayName: Display environment
-  # Check that all englishbreakfast countermeasures are implemented.
-  - bash: ci/scripts/check-countermeasures.sh englishbreakfast
-    displayName: Check countermeasures for top_englishbreakfast
-    continueOnError: True
-  - bash: ci/scripts/build-chip-verilator.sh englishbreakfast
-    displayName: Build simulation with Verilator
-  - template: ci/upload-artifacts-template.yml
-    parameters:
-      includePatterns:
-        - "/hw/top_englishbreakfast/Vchip_englishbreakfast_verilator"
-
-- job: execute_verilated_tests
-  displayName: Fast Verilated Earl Grey tests
-  # Build and run fast tests on sim_verilator
-  pool: ci-public
-  timeoutInMinutes: 240
-  dependsOn: lint
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -x -e
-      ci/scripts/run-verilator-tests.sh
-    displayName: Build & execute tests
-  - template: ci/publish-bazel-test-results.yml
-  # TODO: build and cache the verilator model to avoid building twice (#12574)
-  # NOTE: The new build/test rules reference verilator as a dependency, but under the
-  #       platforms transition of that rule.  Therefore, verilator is built under a
-  #       configuration like 'k8-opt-exec-$host-FOR-$target'.  In order to get the
-  #       verilator binary, we query the output of one of the verilated tests and ask
-  #       for the verilator binary, which is in a subdir named 'build.verilator_<stuff>'.
-  - bash: |
-      . util/build_consts.sh
-      mkdir -p "$BIN_DIR/hw/top_earlgrey/"
-      cp $(ci/bazelisk.sh outquery-build.verilator //sw/device/tests:uart_smoketest_sim_verilator) \
-        "$BIN_DIR/hw/top_earlgrey/Vchip_earlgrey_verilator"
-    displayName: Copy verilated binary to $BIN_DIR
-  - template: ci/upload-artifacts-template.yml
-    parameters:
-      includePatterns:
-        - "/hw/top_earlgrey/Vchip_earlgrey_verilator"
-
-# Software targeting the English Breakfast top level is produced by patching
-# the source tree before building. This builds a selected subset of software
-# only.
-# TODO: This is a rather ugly hack, which will go away once we properly support
-# building more than one top-level design with different parametrizations.
-# Work towards this goal is tracked in issue #4669.
-- job: build_and_execute_verilated_tests_englishbreakfast
-  displayName: Verilated English Breakfast (Execute)
-  # Build and execute tests on the Verilated English Breakfast toplevel design with Bazel
-  pool:
-    vmImage: ubuntu-20.04
-  dependsOn: chip_englishbreakfast_verilator
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_englishbreakfast_verilator
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      . util/build_consts.sh
-      ci/scripts/run-english-breakfast-verilator-tests.sh
-    displayName: Execute tests
-  - bash: |
-      . util/build_consts.sh
-      mkdir -p "$BIN_DIR/sw/device/lib/testing/test_rom"
-      cp $(ci/scripts/target-location.sh \
-          //sw/device/lib/testing/test_rom:test_rom_fpga_cw305 \
-          --features=-rv32_bitmanip \
-          --copt=-DOT_IS_ENGLISH_BREAKFAST_REDUCED_SUPPORT_FOR_INTERNAL_USE_ONLY_) \
-        "$BIN_DIR/sw/device/lib/testing/test_rom"
-    displayName: Copy test_rom_fpga_cw305 to $BIN_DIR
-  - template: ci/upload-artifacts-template.yml
-    parameters:
-      includePatterns:
-        - "/sw/device/lib/testing/test_rom/test_rom_fpga_cw305.32.vmem"
-
-- job: otbn_standalone_tests
-  displayName: Run OTBN Smoke Test
-  dependsOn: lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool:
-    vmImage: ubuntu-20.04
-  timeoutInMinutes: 10
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - bash: |
-      set -x
-      sudo util/get-toolchain.py \
-        --install-dir="$TOOLCHAIN_PATH" \
-        --release-version="$TOOLCHAIN_VERSION" \
-        --update
-      echo "##vso[task.prependpath]$TOOLCHAIN_PATH/bin"
-    displayName: Install toolchain
-  - bash: |
-      python3 --version
-      fusesoc --version
-      verilator --version
-    displayName: Display environment
-  - bash: |
-      make -C hw/ip/otbn/dv/otbnsim test
-    displayName: OTBN ISS Test
-  - bash: |
-      ./hw/ip/otbn/dv/smoke/run_smoke.sh
-    displayName: OTBN Smoke Test
-  - bash: |
-      make -C hw/ip/otbn/util asm-check
-    displayName: Assemble & link code snippets
-
-- job: otbn_crypto_tests
-  displayName: Run OTBN crypto tests
-  dependsOn: lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool:
-    vmImage: ubuntu-20.04
-  timeoutInMinutes: 60
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      ci/bazelisk.sh test --test_tag_filters=-nightly //sw/otbn/crypto/...
-    displayName: Execute tests
-
-- job: chip_earlgrey_cw310
-  displayName: CW310's Earl Grey Bitstream
-  # Build CW310 variant of the Earl Grey toplevel design using Vivado
-  dependsOn:
-    - lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyDvChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool: ci-public-eda
-  timeoutInMinutes: 240
-  steps:
-  - template: ci/fpga-template.yml
-    parameters:
-      top_name: earlgrey
-      design_suffix: cw310
-
-- job: chip_earlgrey_cw310_hyperdebug
-  displayName: CW310's Earl Grey Bitstream for Hyperdebug
-  # Build CW310-hyperdebug variant of the Earl Grey toplevel design using Vivado
-  dependsOn:
-    - lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyDvChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool: ci-public-eda
-  timeoutInMinutes: 240
-  steps:
-  - template: ci/fpga-template.yml
-    parameters:
-      top_name: earlgrey
-      design_suffix: cw310_hyperdebug
-
-- job: chip_earlgrey_cw340
-  displayName: CW340's Earl Grey Bitstream
-  # Build CW340 variant of the Earl Grey toplevel design using Vivado
-  dependsOn:
-    - lint
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyDvChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool: ci-public-eda
-  timeoutInMinutes: 150
-  steps:
-  - template: ci/fpga-template.yml
-    parameters:
-      top_name: earlgrey
-      design_suffix: cw340
-
-- job: chip_englishbreakfast_cw305
-  displayName: CW305's Bitstream
-  # Build CW305 variant of the English Breakfast toplevel design using Vivado
-  dependsOn: build_and_execute_verilated_tests_englishbreakfast
-  condition: and(succeeded(), eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyDvChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  pool: ci-public-eda
-  timeoutInMinutes: 120 # 2 hours
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - build_and_execute_verilated_tests_englishbreakfast
-  - bash: |
-      set -e
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/build-bitstream-vivado.sh top_englishbreakfast cw305
-    displayName: Build bitstream
-  - template: ci/upload-artifacts-template.yml
-    parameters:
-      includePatterns:
-        - "/hw/top_englishbreakfast/lowrisc_systems_chip_englishbreakfast_cw305_0.1.bit"
-
-- job: cache_bitstreams
-  displayName: Cache bitstreams to GCP
-  pool:
-    vmImage: ubuntu-20.04
-  dependsOn:
-    - chip_earlgrey_cw310
-    - chip_earlgrey_cw310_hyperdebug
-    - chip_earlgrey_cw340
-  condition: eq(variables['Build.SourceBranchName'], 'master')
-  steps:
-    - template: ci/download-artifacts-template.yml
-      parameters:
-        downloadPartialBuildBinFrom:
-          - chip_earlgrey_cw310
-          - chip_earlgrey_cw310_hyperdebug
-          - chip_earlgrey_cw340
-    - bash: |
-        set -x
-        . util/build_consts.sh
-    - template: ci/gcp-upload-bitstream-template.yml
-      parameters:
-        fragmentFiles:
-          - "$BIN_DIR/hw/top_earlgrey/chip_earlgrey_cw310/manifest.json"
-          - "$BIN_DIR/hw/top_earlgrey/chip_earlgrey_cw310_hyperdebug/manifest.json"
-          - "$BIN_DIR/hw/top_earlgrey/chip_earlgrey_cw340/manifest.json"
-        gcpKeyFile: "gcpkey.json"
-        bucketURI: "gs://opentitan-bitstreams/master"
-
-- job: execute_test_rom_fpga_tests_cw310
-  displayName: CW310 Test ROM Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw310
-  timeoutInMinutes: 60
-  dependsOn:
-    - chip_earlgrey_cw310
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw310', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw310
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh cw310 cw310_test_rom,-manuf || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_rom_fpga_tests_cw310
-  displayName: CW310 ROM Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw310
-  timeoutInMinutes: 90
-  dependsOn:
-    - chip_earlgrey_cw310
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw310', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw310
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh cw310 cw310_rom_but_not_manuf_and_sival_tests || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_sival_fpga_tests_cw310
-  displayName: CW310 SiVal non-ROM_EXT Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw310
-  timeoutInMinutes: 75
-  dependsOn:
-    - chip_earlgrey_cw310_hyperdebug
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw310_hyperdebug', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw310_hyperdebug
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  # We run the update command twice to workaround an issue with udev on the container,
-  # where rusb cannot dynamically update its device list in CI (udev is not completely
-  # functional). If the device is in normal mode, the first thing that opentitantool
-  # does is to switch it to DFU mode and wait until it reconnects. This reconnection is
-  # never detected. But if we run the tool another time, the device list is queried again
-  # and opentitantool can finish the update. The device will now reboot in normal mode
-  # and work for the hyperdebug job.
-  - bash: |
-      ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware \
-      || ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware || true
-    displayName: "Update the hyperdebug firmware"
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh hyper310 cw310_sival_but_not_rom_ext_tests || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_sival_rom_ext_fpga_tests_cw310
-  displayName: CW310 SiVal ROM_EXT Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw310
-  timeoutInMinutes: 45
-  dependsOn:
-    - chip_earlgrey_cw310_hyperdebug
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw310_hyperdebug', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw310_hyperdebug
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  # We run the update command twice to workaround an issue with udev on the container,
-  # where rusb cannot dynamically update its device list in CI (udev is not completely
-  # functional). If the device is in normal mode, the first thing that opentitantool
-  # does is to switch it to DFU mode and wait until it reconnects. This reconnection is
-  # never detected. But if we run the tool another time, the device list is queried again
-  # and opentitantool can finish the update. The device will now reboot in normal mode
-  # and work for the hyperdebug job.
-  - bash: |
-      ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware \
-      || ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware || true
-    displayName: "Update the hyperdebug firmware"
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh hyper310 cw310_sival_rom_ext || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_rom_fpga_tests_cw340
-  displayName: CW340 ROM Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw340
-  timeoutInMinutes: 60
-  dependsOn:
-    - chip_earlgrey_cw340
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw340', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw340
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh cw340 cw340_rom_with_fake_keys,cw340_rom_with_real_keys,-manuf || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_sival_rom_ext_fpga_tests_cw340
-  displayName: CW340 SiVal ROM_EXT Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw340
-  timeoutInMinutes: 45
-  dependsOn:
-    - chip_earlgrey_cw340
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw340', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw340
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  # We run the update command twice to workaround an issue with udev on the container,
-  # where rusb cannot dynamically update its device list in CI (udev is not completely
-  # functional). If the device is in normal mode, the first thing that opentitantool
-  # does is to switch it to DFU mode and wait until it reconnects. This reconnection is
-  # never detected. But if we run the tool another time, the device list is queried again
-  # and opentitantool can finish the update. The device will now reboot in normal mode
-  # and work for the hyperdebug job.
-  - bash: |
-      ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware \
-      || ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware || true
-    displayName: "Update the hyperdebug firmware"
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh cw340 cw340_sival_rom_ext || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_fpga_manuf_tests_cw310
-  displayName: CW310 Manufacturing Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw310
-  timeoutInMinutes: 60
-  dependsOn:
-    - chip_earlgrey_cw310_hyperdebug
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw310_hyperdebug', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw310_hyperdebug
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  # We run the update command for the same reasons stated above.
-  - bash: |
-      ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware \
-      || ci/bazelisk.sh run \
-        //sw/host/opentitantool:opentitantool -- \
-        --interface=hyperdebug_dfu transport update-firmware || true
-    displayName: "Update the hyperdebug firmware"
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh hyper310 manuf,-cw310_sival,-broken,-cw340 || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: execute_fpga_manuf_tests_cw340
-  displayName: CW340 Manufacturing Tests
-  pool:
-    name: $(fpga_pool)
-    demands: BOARD -equals cw340
-  timeoutInMinutes: 60
-  dependsOn:
-    - chip_earlgrey_cw340
-    - sw_build
-  condition: succeeded( 'chip_earlgrey_cw340', 'sw_build' )
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - chip_earlgrey_cw340
-        - sw_build
-  - template: ci/load-bazel-cache-write-creds.yml
-  - bash: |
-      set -e
-      . util/build_consts.sh
-      module load "xilinx/vivado/$(VIVADO_VERSION)"
-      ci/scripts/run-fpga-tests.sh cw340 manuf,-cw340_sival,-broken,-hyper310 || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
-    displayName: Execute tests
-  - template: ci/publish-bazel-test-results.yml
-
-- job: deploy_release_artifacts
-  displayName: Package & deploy release
-  pool:
-    vmImage: ubuntu-20.04
-  dependsOn:
-    - lint
-    - sw_build
-    - execute_verilated_tests
-    - chip_earlgrey_cw310
-    - chip_englishbreakfast_verilator
-  condition: and(eq(dependencies.lint.outputs['DetermineBuildType.onlyDocChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyDvChanges'], '0'), eq(dependencies.lint.outputs['DetermineBuildType.onlyCdcChanges'], '0'))
-  steps:
-  - template: ci/checkout-template.yml
-  - template: ci/install-package-dependencies.yml
-  - template: ci/download-artifacts-template.yml
-    parameters:
-      downloadPartialBuildBinFrom:
-        - sw_build
-        - execute_verilated_tests
-        - chip_earlgrey_cw310
-        - chip_englishbreakfast_verilator
-  - bash: |
-      . util/build_consts.sh
-      ci/scripts/make_distribution.sh
-      tar --list -f $BIN_DIR/opentitan-*.tar.xz
-      # Put the resulting tar file into a directory the |publish| step below can reference.
-      mkdir "$BUILD_ROOT/dist-final"
-      mv $BIN_DIR/opentitan-*.tar.xz "$BUILD_ROOT/dist-final"
-    displayName: Create final dist
-  - publish: $(Build.ArtifactStagingDirectory)/dist-final
-    artifact: opentitan-dist
-    displayName: Upload release
-  - task: GithubRelease@0
-    displayName: Upload to GitHub releases (only tags)
-    condition: and(succeeded(), startsWith(variables['Build.SourceBranch'], 'refs/tags/'))
-    inputs:
-      gitHubConnection: opentitan-release-upload
-      repositoryName: lowrisc/opentitan
-      addChangeLog: false
-      assets: |
-          $(Build.ArtifactStagingDirectory)/dist-final/*
-
-- job: build_docker_containers
-  displayName: "Build Docker Containers"
-  pool:
-    vmImage: ubuntu-20.04
-  dependsOn:
-    - lint
-  steps:
-  - template: ci/checkout-template.yml
-  - task: Docker@2
-    displayName: Build Developer Utility Container
-    continueOnError: True
-    inputs:
-      command: build
-      Dockerfile: ./util/container/Dockerfile
-      buildContext: .
-  - task: Docker@2
-    displayName: Build Documentation Redirector Container
-    inputs:
-      command: build
-      Dockerfile: ./site/redirector/landing/Dockerfile
-      buildContext: ./site/redirector/landing
diff --git a/bazelisk.sh b/bazelisk.sh
index 963e8bcb12596..3e3173167cf69 100755
--- a/bazelisk.sh
+++ b/bazelisk.sh
@@ -20,10 +20,11 @@ cd "$(dirname "$0")"
 : "${BINDIR:=.bin}"
 : "${BAZEL_BIN:=$(which bazel 2>/dev/null)}"
 
-readonly release="v1.11.0"
+# Bazelisk (not Bazel) release. Keep this in sync with `util/container/Dockerfile`.
+readonly release="v1.24.1"
 declare -A hashes=(
-    # sha256sums for v1.11.0.  Update this if you update the release.
-    [linux-amd64]="231ec5ca8115e94c75a1f4fbada1a062b48822ca04f21f26e4cb1cd8973cd458"
+    # sha256sums for v1.24.1.  Update this if you update the release.
+    [linux-amd64]="0aee09c71828b0012750cb9b689ce3575da8e230f265bf8d6dcd454eee6ea842"
 )
 
 declare -A architectures=(
@@ -103,7 +104,8 @@ function do_outquery() {
 
     "$file" "${pre_cmd_args[@]}" cquery "$@" \
         --output=starlark --starlark:expr="$qexpr" \
-        --ui_event_filters=-info --noshow_progress
+        --ui_event_filters=-info --noshow_progress \
+        | sort | uniq
 }
 
 function main() {
@@ -111,6 +113,14 @@ function main() {
     local file="${BAZEL_BIN:-${bindir}/bazelisk}"
     local lockfile="${bindir}/bazelisk.lock"
 
+    # If the user has Bazel in their PATH, check its version.
+    # Fallback to bazelisk if it doesn't match.
+    if [ -x "$BAZEL_BIN" ]; then
+        if [ "$("$BAZEL_BIN" --version)" != "bazel $(cat .bazelversion)" ]; then
+            file="${bindir}/bazelisk"
+        fi
+    fi
+
     # Are we using bazel from the user's PATH or using bazelisk?
     if expr match "${file}" ".*bazelisk$" >/dev/null; then
         if ! up_to_date "$file"; then
@@ -168,6 +178,25 @@ function main() {
             # We are intentionally using $command_template as a format string.
             eval "$(printf "$command_template" "$outfile")"
             ;;
+        sync)
+            # The `sync` command has been disabled when using Bzlmod in favour of
+            # `fetch`. For some reason Bazel crashes when you try to use `sync`
+            # rather than printing a helpful error message.
+            #
+            # When run interactively, print a deprecation error and exit.
+            # When run in a script, intercept `sync` commands and forward them
+            # to `fetch` which is more or less identical. This ensures Git hooks
+            # will continue working on this branch and older branches which do
+            # not support `bazel fetch --configure` yet.
+            if [ -t 0 ]; then
+                echo 'ERROR: The `bazel sync` command has been deprecated.' >&2
+                echo '       Use `bazel fetch` instead.'                    >&2
+                exit 1
+            else
+                shift
+                exec "$file" "${pre_cmd_args[@]}" fetch "$@"
+            fi
+            ;;
         *)
             exec "$file" "${pre_cmd_args[@]}" "$@"
             ;;
diff --git a/ci/.bazelrc b/ci/.bazelrc
index 6a129db3197fa..c5e9037b363da 100644
--- a/ci/.bazelrc
+++ b/ci/.bazelrc
@@ -22,3 +22,6 @@ build --keep_going
 # Use the remote Bazel cache for CI.
 build --remote_cache=https://storage.googleapis.com/opentitan-bazel-cache
 build --remote_timeout=5
+
+# Print the full stdout and stderr of tests, not just the summary
+test --test_output=all
diff --git a/ci/README.snapshot b/ci/README.snapshot
deleted file mode 100644
index 4b00cb7cc5701..0000000000000
--- a/ci/README.snapshot
+++ /dev/null
@@ -1,13 +0,0 @@
-OpenTitan Snapshot Binary Release
-=================================
-
-This directory contains pre-built material produced from a development snapshot
-of the OpenTitan codebase. It includes content that is Copyright lowRISC
-contributors and licensed under the Apache License, Version 2.0. See the
-LICENSE file for details.
-
-Refer to the Quickstart Guide at https://docs.opentitan.org for information on
-how to get started in simulation and on an FPGA.
-
-For more information about the OpenTitan project please head over to
-https://www.opentitan.org.
diff --git a/ci/azp-private.yml b/ci/azp-private.yml
deleted file mode 100644
index 2a567d8f0ed0d..0000000000000
--- a/ci/azp-private.yml
+++ /dev/null
@@ -1,33 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-#
-# Private CI trigger.  Used to run tooling that can't currently be shared
-# publicly.
-
-trigger:
-  batch: true
-  branches:
-    include:
-    - '*'
-    exclude:
-    - 'backport-*'
-  tags:
-    include:
-    - "*"
-pr:
-  branches:
-    include:
-    - '*'
-
-# The runner used for private CI enforces the use of the template below. All
-# build steps need to be placed into the template.
-resources:
-  repositories:
-  - repository: opentitan-private-ci
-    type: github
-    endpoint: lowRISC
-    name: lowrisc/opentitan-private-ci
-
-extends:
-  template: jobs.yml@opentitan-private-ci
diff --git a/ci/bazelisk.sh b/ci/bazelisk.sh
index cdd6bd16080cf..a08b441c28ec2 100755
--- a/ci/bazelisk.sh
+++ b/ci/bazelisk.sh
@@ -3,6 +3,12 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+# In GitHub actions, we configure Bazel using ~/.bazelisk using .github/actions/prepare-env
+# So execute bazelisk.sh directly.
+if [[ -n "$GITHUB_ACTIONS" ]]; then
+    exec "$(dirname $0)"/../bazelisk.sh "$@"
+fi
+
 # This is the CI version of `bazelisk.sh`, which calls into the "usual" wrapper,
 # but adds various flags to produce CI-friendly output. It does so by prociding a
 # command-line specified .bazelrc (that is applied alongside //.bazelrc).
diff --git a/ci/checkout-template.yml b/ci/checkout-template.yml
deleted file mode 100644
index ef99fe35ffdfb..0000000000000
--- a/ci/checkout-template.yml
+++ /dev/null
@@ -1,27 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# This template downloads the version of the repository checked out in the first
-# pipeline job.
-# This ensures that every pipeline job runs on the same version of the
-# repository instead of having Azure perform the checkout each time. More
-# information can be found in #13993.
-
-# The first job in the pipeline must use the default Azure checkout job to
-# fetch the repository. It creates opentitan-repo.tar.gz and uploads it as an
-# artifact. This template downloads the repo into
-# $(Pipeline.Workspace)/opentitan-repo. The files are locaed in
-# $(Pipeline.Workspace)/opentitan-repo/opentitan-repo.tar.gz. This is untarred
-# into the working directory.
-
-steps:
-  - checkout: none # Suppress the default checkout action
-  - download: current
-    artifact: opentitan-repo
-    displayName: Download repository
-  - bash: |
-      tar -xf $(Pipeline.Workspace)/opentitan-repo/opentitan-repo.tar.gz --no-same-owner
-      # --no-same-owner is required since Azure runs this command as root which
-      # preserves ownership. Git will complain about this.
-    displayName: Unpack repository
diff --git a/ci/download-artifacts-template.yml b/ci/download-artifacts-template.yml
deleted file mode 100644
index cc191846e77d6..0000000000000
--- a/ci/download-artifacts-template.yml
+++ /dev/null
@@ -1,62 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for downloading pipeline step outputs and unpacking them.
-#
-# This template will download all artifacts from the upstream jobs listed in
-# `downloadPartialBuildBinFrom` (which are expected to use
-# upload-artifacts-template.yml) and unpack them.
-#
-# This template expects that a variable $BUILD_ROOT is set to a writeable
-# directory; the results will be available in $BIN_DIR. See
-# util/build_consts.sh for more information.
-
-parameters:
-  # Names of jobs to download a partial $BIN_DIR from.
-  # List all "upstream" jobs here which produce files in $BIN_DIR which are
-  # needed in the current job. In other words, list all jobs which need to be
-  # executed and produce some build outputs before this job can start. The
-  # current job will find all outputs from those upstream jobs in $BIN_DIR and
-  # can use them.
-  - name: downloadPartialBuildBinFrom
-    type: object
-    default: []
-
-steps:
-  - ${{ each job in parameters.downloadPartialBuildBinFrom }}:
-    - task: DownloadPipelineArtifact@2
-      inputs:
-        buildType: current
-        path: '$(BUILD_ROOT)/downloads/${{ job }}'
-        artifact: "partial-build-bin-${{ job }}"
-      displayName: Downloading partial build-bin directory from job ${{ job }}
-  - bash: |
-      set -e
-      test -n "$BUILD_ROOT"
-      . util/build_consts.sh
-
-      test -f "$BUILD_ROOT/upstream_bin_dir_contents.txt" && {
-        echo The download-artifacts-template.yml template can be called only once per job.
-        exit 1
-      }
-
-      mkdir -p "$BIN_DIR"
-
-      echo 'Extracting partial BIN_DIRs:'
-      find "$BUILD_ROOT/downloads" \
-        -name 'build-bin.tar' \
-        -exec \
-          tar -C "$BIN_DIR" \
-          --strip-components=1 \
-          -xvf {} \;
-
-      # Remember all files which were present in the upstream $BIN_DIRs.
-      find "$BIN_DIR" -type f -fprintf "$BUILD_ROOT/upstream_bin_dir_contents.txt" '%P\n'
-
-      echo
-      echo Upstream BIN_DIR contents:
-      echo vvvvvvvvvvvvvvvvvv
-      cat "$BUILD_ROOT/upstream_bin_dir_contents.txt"
-      echo ^^^^^^^^^^^^^^^^^^
-    displayName: Unpack upstream outputs
diff --git a/ci/fpga-job.yml b/ci/fpga-job.yml
new file mode 100644
index 0000000000000..734783553eed2
--- /dev/null
+++ b/ci/fpga-job.yml
@@ -0,0 +1,93 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Azure template for an FPGA test job.
+# This script runs an FPGA test job given the specified parameters. The job will
+# depend on the require bitstream and publish the results of the test as an artefact.
+
+parameters:
+# Name to display for the jobs.
+- name: display_name
+  type: string
+# Name of the job that other jobs can rely depend on.
+- name: job_name
+  type: string
+# Timeout for the job in minutes.
+- name: timeout
+  type: number
+# Bazel tag filters for the tests.
+- name: tag_filters
+  type: string
+# Bitstream to use.
+- name: bitstream
+  type: string
+# Azure pool board to use.
+- name: board
+  type: string
+# Opentitantool interface to use.
+- name: interface
+  type: string
+# Name of the file that holds the target patterns.
+- name: target_pattern_file
+  type: string
+  default: $(Pipeline.Workspace)/target_pattern_file.txt
+
+jobs:
+- job: ${{ parameters.job_name }}
+  displayName: ${{ parameters.display_name }}
+  pool:
+    name: $(fpga_pool)
+    demands: BOARD -equals ${{ parameters.board }}
+  timeoutInMinutes: ${{ parameters.timeout }}
+  dependsOn:
+    - ${{ parameters.bitstream }}
+    - sw_build
+  #condition: succeeded( ${{ parameters.bitstream }}, 'sw_build' )
+  condition: and(in(dependencies.${{ parameters.bitstream }}.result, 'Succeeded', 'SucceededWithIssues'), succeeded('sw_build'))
+  steps:
+  - template: ./checkout-template.yml
+  - template: ./install-package-dependencies.yml
+  - template: ./download-artifacts-template.yml
+    parameters:
+      downloadPartialBuildBinFrom:
+        - ${{ parameters.bitstream }}
+        - sw_build
+  - template: ./load-bazel-cache-write-creds.yml
+  # We run the update command twice to workaround an issue with udev on the container,
+  # where rusb cannot dynamically update its device list in CI (udev is not completely
+  # functional). If the device is in normal mode, the first thing that opentitantool
+  # does is to switch it to DFU mode and wait until it reconnects. This reconnection is
+  # never detected. But if we run the tool another time, the device list is queried again
+  # and opentitantool can finish the update. The device will now reboot in normal mode
+  # and work for the hyperdebug job.
+  - ${{ if eq(parameters.interface, 'hyper310') }}:
+    - bash: |
+        ci/bazelisk.sh run \
+            //sw/host/opentitantool:opentitantool -- \
+            --interface=hyperdebug_dfu transport update-firmware \
+        || ci/bazelisk.sh run \
+            //sw/host/opentitantool:opentitantool -- \
+            --interface=hyperdebug_dfu transport update-firmware || true
+      displayName: "Update the hyperdebug firmware"
+  - bash: |
+      set -e
+      . util/build_consts.sh
+      module load "xilinx/vivado/$(VIVADO_VERSION)"
+      # Execute a query to find all targets that match the test tags and store them in a file.
+      ci/scripts/run-bazel-test-query.sh \
+        "${{ parameters.target_pattern_file }}" \
+        "${{ parameters.tag_filters }}",-manual,-broken,-skip_in_ci \
+        //... @manufacturer_test_hooks//...
+      # Run FPGA tests.
+      if [ -s "${{ parameters.target_pattern_file }}" ]; then
+        ci/scripts/run-fpga-tests.sh "${{ parameters.interface }}" "${{ parameters.target_pattern_file }}" || { res=$?; echo "To reproduce failures locally, follow the instructions at https://opentitan.org/book/doc/getting_started/setup_fpga.html#reproducing-fpga-ci-failures-locally"; exit "${res}"; }
+      else
+        echo "No tests to run after filtering"
+      fi
+    displayName: Execute tests
+  - template: ./publish-bazel-test-results.yml
+  - publish: "${{ parameters.target_pattern_file }}"
+    artifact: ${{ parameters.job_name }}
+    displayName: "Upload target pattern file"
+    condition: succeededOrFailed()
diff --git a/ci/fpga-template.yml b/ci/fpga-template.yml
deleted file mode 100644
index 9258f8b38c578..0000000000000
--- a/ci/fpga-template.yml
+++ /dev/null
@@ -1,78 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for building an FPGA bitstream
-
-parameters:
-- name: top_name
-  type: string
-- name: design_suffix
-  type: string
-
-steps:
-- template: ./checkout-template.yml
-- template: ./install-package-dependencies.yml
-- bash: |
-    ci/scripts/get-bitstream-strategy.sh "chip_${{ parameters.top_name }}_${{ parameters.design_suffix }}" \
-      ':!/third_party/rust/' \
-      ':!/sw/' \
-      ':!/*.hjson' \
-      ':!/*.tpl' \
-      ':!/site/' \
-      ':!/doc/' \
-      ':!/COMMITTERS' \
-      ':!/CLA' \
-      ':!/*.md' \
-      ':!/.github/' \
-      ':!/hw/**/dv/*' \
-      ':!/hw/dv/'
-  displayName: Configure bitstream strategy
-- bash: |
-    set -ex
-    . util/build_consts.sh
-    bazel_package="//hw/bitstream"
-    design_name=chip_${{ parameters.top_name }}_${{ parameters.design_suffix }}
-    cached_archive="${bazel_package}:${design_name}_cached_archive"
-    ci/bazelisk.sh build "${cached_archive}"
-    bitstream_archive=$($REPO_TOP/bazelisk.sh outquery "${cached_archive}")
-    cp -Lv ${bitstream_archive} ${BUILD_ROOT}/build-bin.tar
-  condition: eq(variables.bitstreamStrategy, 'cached')
-  displayName: Extract cached bitstream
-- bash: |
-    set -ex
-    bazel_package=//hw/bitstream/vivado
-    bitstream_target=${bazel_package}:fpga_${{ parameters.design_suffix }}
-    archive_target=${bazel_package}:${{ parameters.top_name }}_${{ parameters.design_suffix }}_archive
-    trap 'get_logs' EXIT
-    get_logs() {
-      design_name=chip_${{ parameters.top_name }}_${{ parameters.design_suffix }}
-      SUB_PATH="hw/top_${{ parameters.top_name }}/${design_name}"
-      mkdir -p "$OBJ_DIR/$SUB_PATH" "$BIN_DIR/$SUB_PATH"
-      cp -rLvt "$OBJ_DIR/$SUB_PATH/" \
-        $($REPO_TOP/bazelisk.sh outquery-all ${bitstream_target})
-      bitstream_archive=$($REPO_TOP/bazelisk.sh outquery ${archive_target})
-      cp -Lv ${bitstream_archive} ${BUILD_ROOT}/build-bin.tar
-    }
-
-    . util/build_consts.sh
-    module load "xilinx/vivado/$(VIVADO_VERSION)"
-    ci/bazelisk.sh build ${archive_target}
-  condition: ne(variables.bitstreamStrategy, 'cached')
-  displayName: Build and splice bitstream with Vivado
-- bash: |
-    . util/build_consts.sh
-    echo "Synthesis log"
-    cat $OBJ_DIR/hw/top_${{ parameters.top_name }}/build.fpga_${{ parameters.design_suffix }}/synth-vivado/lowrisc_systems_chip_${{ parameters.top_name }}_${{ parameters.design_suffix }}_0.1.runs/synth_1/runme.log || true
-
-    echo "Implementation log"
-    cat $OBJ_DIR/hw/top_${{ parameters.top_name }}/build.fpga_${{ parameters.design_suffix }}/synth-vivado/lowrisc_systems_chip_${{ parameters.top_name }}_${{ parameters.design_suffix }}_0.1.runs/impl_1/runme.log || true
-  condition: ne(variables.bitstreamStrategy, 'cached')
-  displayName: Display synthesis & implementation logs
-- publish: "$(Build.ArtifactStagingDirectory)/build-bin.tar"
-  artifact: partial-build-bin-$(System.PhaseName)
-  displayName: Upload step outputs
-- publish: "$(Build.ArtifactStagingDirectory)"
-  artifact: chip_${{ parameters.top_name }}_cw310-build-out
-  displayName: Upload artifacts for CW310
-  condition: failed()
diff --git a/ci/gcp-upload-bitstream-template.yml b/ci/gcp-upload-bitstream-template.yml
deleted file mode 100644
index a44e0864aca57..0000000000000
--- a/ci/gcp-upload-bitstream-template.yml
+++ /dev/null
@@ -1,68 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for uploading artifacts to a Google Cloud Platform (GCP)
-# bucket.
-#
-# This template first installs gsutil to interact with GCP resources. Then,
-# files indicated by bitstream manifest fragments specified by fragmentFiles
-# will be packed into an archive (a tar.gz file) and uploaded to a GCP bucket
-# located at bucketURI using gsutil.
-#
-# Writing to a GCP bucket requires a GCP service account key with sufficient
-# permisions. This key must be uploaded to Azure as a Secure File. The name of
-# the key file should be provided as gcpKeyFile.
-#
-
-parameters:
-  - name: fragmentFiles
-    type: object
-    default: []
-  - name: gcpKeyFile
-    type: string
-    default: ""
-  - name: bucketURI
-    type: string
-    default: ""
-
-steps:
-  - task: DownloadSecureFile@1
-    name: gcpkey
-    inputs:
-      secureFile: ${{ parameters.gcpKeyFile }}
-  - bash: |
-      echo "Installing gsutil"
-      sudo apt-get install -y apt-transport-https ca-certificates gnupg
-      echo "deb [signed-by=/usr/share/keyrings/cloud.google.gpg] https://packages.cloud.google.com/apt cloud-sdk main" | \
-        sudo tee /etc/apt/sources.list.d/google-cloud-sdk.list
-      echo "vvvvvvvvv cat /etc/apt/sources.list.d/google-cloud-sdk.list"
-      cat /etc/apt/sources.list.d/google-cloud-sdk.list
-      echo "^^^^^^^^"
-      curl https://packages.cloud.google.com/apt/doc/apt-key.gpg | sudo tee /usr/share/keyrings/cloud.google.gpg
-      sudo apt-get update || {
-        error "Failed to run apt-get update"
-      }
-      sudo apt-get install -y google-cloud-cli
-
-      . util/build_consts.sh
-      printf "$(date -u +%Y-%m-%dT%H:%M:%S)\n$(Build.SourceVersion)" > latest.txt
-      ci/bazelisk.sh build //util/py/scripts:bitstream_cache_create
-      printf "${{ join('\n', parameters.fragmentFiles) }}" > fragment_files.txt
-      mapfile -t fragments < fragment_files.txt
-      ci/bazelisk.sh run //util/py/scripts:bitstream_cache_create -- \
-        --schema $REPO_TOP/rules/scripts/bitstreams_manifest.schema.json \
-        --stamp-file $REPO_TOP/bazel-out/volatile-status.txt \
-        --out $BIN_DIR/bitstream-cache \
-        "${fragments[@]}"
-      mv $BIN_DIR/bitstream-cache/bitstream-cache.tar.gz bitstream-latest.tar.gz
-
-      gsutil -o Credentials:gs_service_key_file=$(gcpkey.secureFilePath) \
-        cp latest.txt ${{ parameters.bucketURI }}/latest.txt
-      gsutil -o Credentials:gs_service_key_file=$(gcpkey.secureFilePath) \
-        cp -r bitstream-latest.tar.gz ${{ parameters.bucketURI }}/bitstream-latest.tar.gz
-      gsutil -o Credentials:gs_service_key_file=$(gcpkey.secureFilePath) \
-        cp -r ${{ parameters.bucketURI }}/bitstream-latest.tar.gz ${{ parameters.bucketURI }}/bitstream-$(Build.SourceVersion).tar.gz
-    condition: succeeded()
-    continueOnError: false
-    displayName: Upload bitstreams to GCP bucket
diff --git a/ci/install-package-dependencies.yml b/ci/install-package-dependencies.yml
deleted file mode 100644
index a920e5abfe05f..0000000000000
--- a/ci/install-package-dependencies.yml
+++ /dev/null
@@ -1,31 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for installing dependencies from various package managers,
-# necessary for building, testing, and packaging OpenTitan.
-#
-# This template can be included from pipelines in other repositories.
-# In this case, set the REPO_TOP parameter to point to the root of the
-# checked out opentitan repository.
-#
-# This template executes:
-# - apt-get (*) install for all packages listed in apt-requirements.txt
-# - pip install for all packages listed in python-requirements.txt
-#
-# * As an optimization, apt-fast is used instead of apt-get if it is available.
-
-parameters:
-- name: REPO_TOP
-  type: string
-  default: .
-
-steps:
-  - bash: |
-      set -e
-      cd ${{ parameters.REPO_TOP }}
-      ci/install-package-dependencies.sh \
-        --verilator-version $(VERILATOR_VERSION) \
-        --verible-version $(VERIBLE_VERSION)
-    retryCountOnTaskFailure: 3
-    displayName: 'Install package dependencies'
diff --git a/ci/jobs/quick-lint.sh b/ci/jobs/quick-lint.sh
index 7527dbf70c999..fbe17e6cb0b81 100755
--- a/ci/jobs/quick-lint.sh
+++ b/ci/jobs/quick-lint.sh
@@ -1,10 +1,10 @@
-#!/bin/bash
+#!/usr/bin/env bash
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
 # A wrapper that duplicates the code for the quick lint job in
-# azure-pipelines.yml. The two should be kept in sync.
+# .github/actions/ci.yml. The two should be kept in sync.
 #
 # This doesn't install dependencies, but should otherwise behave the
 # same as what CI would do on a pull request.
@@ -49,6 +49,9 @@ ci/scripts/python-lint.sh $tgt_branch || {
 echo -e "\n### Run Python lint (mypy)"
 ci/scripts/mypy.sh $tgt_branch
 
+echo -e "\n### Validate testplans with schema."
+ci/scripts/validate_testplans.sh
+
 echo -e "\n### Use clang-format to check C/C++ coding style"
 ci/scripts/clang-format.sh $tgt_branch
 
@@ -61,8 +64,5 @@ ci/scripts/rust-format.sh $tgt_branch
 echo -e "\n### Run shellcheck on all shell scripts"
 util/sh/scripts/run-shellcheck.sh
 
-echo -e "\n### Render landing site"
-ci/scripts/build-site.sh
-
 echo -e "\n### Check what kinds of changes the PR contains"
 ci/scripts/get-build-type.sh $tgt_branch PullRequest
diff --git a/ci/jobs/slow-lint.sh b/ci/jobs/slow-lint.sh
index 1bd22e686cc9f..f49117dd7fa7b 100755
--- a/ci/jobs/slow-lint.sh
+++ b/ci/jobs/slow-lint.sh
@@ -4,7 +4,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 # A wrapper that duplicates the code for the quick lint job in
-# azure-pipelines.yml. The two should be kept in sync.
+# .github/actions/ci.yml. The two should be kept in sync.
 #
 # This doesn't install dependencies, but should otherwise behave the
 # same as what CI would do on a pull request.
diff --git a/ci/load-bazel-cache-write-creds.yml b/ci/load-bazel-cache-write-creds.yml
deleted file mode 100644
index 105ca60cfd0cf..0000000000000
--- a/ci/load-bazel-cache-write-creds.yml
+++ /dev/null
@@ -1,17 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure Pipelines template for downloading a "secure file" containing the write
-# credentials for a GCP bucket where we store a Bazel cache.
-#
-# The path to the downloaded file is automatically stored in an environment
-# variable `GCP_BAZEL_CACHE_KEY_SECUREFILEPATH`. This file is loaded by the
-# `ci/bazelisk.sh` script.
-
-steps:
-  - task: DownloadSecureFile@1
-    condition: eq(variables['Build.SourceBranchName'], 'master')
-    name: GCP_BAZEL_CACHE_KEY
-    inputs:
-      secureFile: "bazel_cache_gcp_key.json"
diff --git a/ci/publish-bazel-test-results.yml b/ci/publish-bazel-test-results.yml
deleted file mode 100644
index 73d7392a169a7..0000000000000
--- a/ci/publish-bazel-test-results.yml
+++ /dev/null
@@ -1,19 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for publishing `bazel test` results on Azure and GitHub
-# checks.
-#
-# This template can be included from pipelines in other repositories.
-# It expects the source code to be checked out at $(Build.SourcesDirectory).
-#
-
-steps:
-  - task: PublishTestResults@2
-    inputs:
-      testResultsFormat: 'JUnit'
-      testResultsFiles: '**/test.xml'
-      searchFolder: ' $(Build.SourcesDirectory)/bazel-out'
-    displayName: 'Publish bazel test results'
-    condition: succeededOrFailed()
diff --git a/ci/scripts/README.md b/ci/scripts/README.md
index 21ef48dcaddcc..da5349aacb66b 100644
--- a/ci/scripts/README.md
+++ b/ci/scripts/README.md
@@ -1,4 +1,4 @@
 # CI scripts
 
 These scripts are run as part of CI. The top-level orchestration is
-contained in azure-pipelines.yml.
+contained in .github/actions/ci.yml.
diff --git a/ci/scripts/build-bitstream-vivado.sh b/ci/scripts/build-bitstream-vivado.sh
index badf8223e844d..29e039b712eb3 100755
--- a/ci/scripts/build-bitstream-vivado.sh
+++ b/ci/scripts/build-bitstream-vivado.sh
@@ -106,7 +106,4 @@ BITSTREAM_FNAME="lowrisc_systems_chip_${FLAVOUR}_${TARGET}_0.1.bit"
 BITSTREAM_PATH="$OBJ_DIR/hw/synth-vivado/$BITSTREAM_FNAME"
 cp "$BITSTREAM_PATH" "$TOPLEVEL_BIN_DIR"
 
-cp "$OBJ_DIR/hw/synth-vivado/rom.mmi" "$TOPLEVEL_BIN_DIR"
-if [ $HAS_OTP == 1 ]; then
-    cp "$OBJ_DIR/hw/synth-vivado/otp.mmi" "$TOPLEVEL_BIN_DIR"
-fi
+cp "$OBJ_DIR/hw/synth-vivado/memories.mmi" "$TOPLEVEL_BIN_DIR"
diff --git a/ci/scripts/build-docs.sh b/ci/scripts/build-docs.sh
index cefa003b1746d..c6d664a415a33 100755
--- a/ci/scripts/build-docs.sh
+++ b/ci/scripts/build-docs.sh
@@ -3,7 +3,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-# Build docs and tell the Azure runner to upload any doxygen warnings
+# Build docs and tell the GitHub Actions runner to upload any doxygen warnings
 
 set -e
 util/site/build-docs.sh build-local || {
diff --git a/ci/scripts/check-ascii.sh b/ci/scripts/check-ascii.sh
index 82245956ab23b..3656f2f80ed57 100755
--- a/ci/scripts/check-ascii.sh
+++ b/ci/scripts/check-ascii.sh
@@ -20,6 +20,7 @@ allowed_suffixes=(
     vsdx
     elf
     woff2
+    o
 
     md
     html
@@ -47,6 +48,7 @@ allowed_suffixes=(
     hh
 
     # Signature files are binary files.
+    ecdsa_sig
     rsa_sig
     spx_sig
 )
diff --git a/ci/scripts/check-bazel-banned-rules.sh b/ci/scripts/check-bazel-banned-rules.sh
index 010c0547c89b3..2d08a05d0a3be 100755
--- a/ci/scripts/check-bazel-banned-rules.sh
+++ b/ci/scripts/check-bazel-banned-rules.sh
@@ -6,9 +6,11 @@
 
 set -e
 
-GIT_REPOS=$(ci/bazelisk.sh query "kind('(new_)?git_repository', //external:*)")
-if [[ ${GIT_REPOS} ]]; then
+REPO_TOP="$(git rev-parse --show-toplevel)"
+cd "$REPO_TOP"
+
+if grep -r --include '*.bzl' git_repository; then
   echo "Bazel's 'git_repository' rule is insecure and incompatible with OpenTitan's airgapping strategy."
-  echo "Please replace $GIT_REPOS with our 'http_archive_or_local' rule and set a sha256 so it can be canonically reproducible."
+  echo "Please replace $GIT_REPOS with 'http_archive' rule and set a sha256 so it can be canonically reproducible."
   exit 1
 fi
diff --git a/ci/scripts/exec-check.sh b/ci/scripts/exec-check.sh
index f491b3e692de2..0797b031268ab 100755
--- a/ci/scripts/exec-check.sh
+++ b/ci/scripts/exec-check.sh
@@ -19,6 +19,7 @@ args=(
     -name .git -prune -o
     -name vendor -prune -o
     -name scratch -prune -o
+    -name build-site -prune -o
     # Filter to executable files.
     -type f
     -executable
diff --git a/ci/scripts/get-bitstream-strategy.sh b/ci/scripts/get-bitstream-strategy.sh
index 5ac3a10ddb2e2..4b9a8a86b14c5 100755
--- a/ci/scripts/get-bitstream-strategy.sh
+++ b/ci/scripts/get-bitstream-strategy.sh
@@ -63,3 +63,4 @@ fi
 echo
 echo "Bitstream strategy is ${bitstream_strategy}"
 echo "##vso[task.setvariable variable=bitstreamStrategy]${bitstream_strategy}"
+echo "bitstreamStrategy=${bitstream_strategy}" >> "${GITHUB_OUTPUT:-/dev/null}"
diff --git a/ci/scripts/make_distribution.sh b/ci/scripts/make_distribution.sh
deleted file mode 100755
index da0dcc98df7df..0000000000000
--- a/ci/scripts/make_distribution.sh
+++ /dev/null
@@ -1,63 +0,0 @@
-#!/bin/bash
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-set -e
-
-# make_distribution.sh takes distribution artifacts in $BIN_DIR and packs them
-# into a compressed TAR archive, which is deposited into $BIN_DIR. In
-# particular, this script should be run after make_build_bin.sh.
-#
-# The actual artifacts exported are described by the $DIST_ARTIFACTS variable
-# below.
-
-. util/build_consts.sh
-
-echo "\$OT_VERSION = $OT_VERSION" >&2
-
-# $DIST_ARTIFACTS is a list of |find| globs to be copied out of
-# $BIN_DIR and into the OpenTitan distribution archive.
-#
-# These globs are relative to $BIN_DIR.
-readonly DIST_ARTIFACTS=(
-  'sw/device/*.elf'
-  'sw/device/*.bin'
-  'sw/device/*.vmem'
-  'hw/top_earlgrey/Vchip_earlgrey_verilator'
-  'hw/top_earlgrey/chip_earlgrey_cw310/*'
-)
-
-DIST_DIR="$OBJ_DIR/$OT_VERSION"
-mkdir -p "$DIST_DIR"
-
-cp ci/README.snapshot "$DIST_DIR"
-cp LICENSE "$DIST_DIR"
-
-for pat in "${DIST_ARTIFACTS[@]}"; do
-  echo "Searching for $pat." >&2
-  found_file=false
-  # Looping over find output is a problem if our file paths have glob
-  # characters or spaces.  However, we do not have filenames like that in CI,
-  # and the alternative formulations of this for loop are less intuitive.
-
-  # shellcheck disable=SC2044
-  for file in $(find "$BIN_DIR" -type f -path "$BIN_DIR/$pat"); do
-    found_file=true
-    relative_file="${file#"$BIN_DIR/"}"
-    echo "Copying \$BIN_DIR/$relative_file." >&2
-
-    destination="$DIST_DIR/$(dirname "$relative_file")"
-    mkdir -p "$destination"
-    mv "$file" "$destination"
-  done
-  if [[ "$found_file" == "false" ]]; then
-    echo "Did not find any files matching $pat." >&2
-    echo "If this is intentional, delete that pattern." >&2
-    exit 1
-  fi
-done
-
-cd "$(dirname "$DIST_DIR")"
-tar -cJf "$BIN_DIR/$(basename "$DIST_DIR").tar.xz" \
-  "$(basename "$DIST_DIR")"
diff --git a/ci/scripts/run-bazel-test-query.sh b/ci/scripts/run-bazel-test-query.sh
new file mode 100755
index 0000000000000..0d26ac07fa020
--- /dev/null
+++ b/ci/scripts/run-bazel-test-query.sh
@@ -0,0 +1,56 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Usage:
+# run-bazel-test-query.sh <out_file> <test_tag_filters> <targets...>
+#
+# This script will perform a bazel query to include all tests specified
+# by the <targets...> but filtered according to the <test_tag_filters>
+# using the same filter logic as bazel's --test_tag_filters. The resulting
+# list of targets in placed in <out_file>
+
+set -x
+set -e
+
+if [ $# -lt 3 ]; then
+    echo >&2 "Usage: ./run-bazel-test-query.sh <out_file> <test_tag_filters> <targets...>"
+    echo >&2 "E.g. ./run-bazel-test-query.sh all_tests.txt cw310_rom_tests,-manuf //..."
+    exit 1
+fi
+out_file="$1"
+test_tags="$2"
+shift
+shift
+
+# Parse the tag filters and separate the positive from the negative ones
+declare -a positive_tags
+declare -a negative_tags
+IFS=',' read -ra tag_array <<< "$test_tags"
+for tag in "${tag_array[@]}"; do
+    if [ "${tag:0:1}" == "-" ]; then
+        negative_tags+=( "${tag:1}" )
+    else
+        positive_tags+=( "$tag" )
+    fi
+done
+# Now build a regular expression to match all tests that contain at least one positive tag.
+# Per the bazel query reference, when matching for attributes, the tags are converted to a
+# string of the form "[tag_1, tag_2, ...]", so for example "[rom, manuf, broken]" (note the
+# space after each comma). To make sure to match on entire tags, we look for the tag,
+# preceded either by "[" or a space, and followed by "]" or a comma.
+positive_tags_or=$(IFS="|"; echo "${positive_tags[*]}")
+negative_tags_or=$(IFS="|"; echo "${negative_tags[*]}")
+positive_regex="[\[ ](${positive_tags_or})[,\]]"
+negative_regex="[\[ ](${negative_tags_or})[,\]]"
+# List of targets
+targets=$(IFS="|"; echo "$*")
+targets="${targets/|/ union }"
+# Finally build the bazel query
+./ci/bazelisk.sh query \
+    --noimplicit_deps \
+    --noinclude_aspects \
+    --output=label \
+    "attr(\"tags\", \"${positive_regex}\", tests($targets)) except attr(\"tags\", \"${negative_regex}\", tests($targets))" \
+    >"${out_file}"
diff --git a/ci/scripts/run-fpga-tests.sh b/ci/scripts/run-fpga-tests.sh
index 7d7996b3e28c4..26ca1d779713e 100755
--- a/ci/scripts/run-fpga-tests.sh
+++ b/ci/scripts/run-fpga-tests.sh
@@ -9,13 +9,12 @@ set -e
 . util/build_consts.sh
 
 if [ $# == 0 ]; then
-    echo >&2 "Usage: run-fpga-tests.sh <fpga> <tags or test set name>"
-    echo >&2 "E.g. ./run-fpga-tests.sh cw310 manuf"
-    echo >&2 "E.g. ./run-fpga-tests.sh cw310 cw310_rom_tests"
+    echo >&2 "Usage: run-fpga-tests.sh <fpga> <target_pattern_file>"
+    echo >&2 "E.g. ./run-fpga-tests.sh cw310 list_of_test.txt"
     exit 1
 fi
 fpga="$1"
-fpga_tags="$2"
+target_pattern_file="$2"
 
 # Copy bitstreams and related files into the cache directory so Bazel will have
 # the corresponding targets in the @bitstreams workspace.
@@ -47,86 +46,6 @@ ci/bazelisk.sh run //sw/host/opentitantool -- --rcfile= --interface="$fpga" fpga
 # Print the SAM3X firmware version. HyperDebug transports don't currently support this, so we ignore errors.
 ci/bazelisk.sh run //sw/host/opentitantool -- --rcfile= --interface="$fpga" fpga get-sam3x-fw-version || true
 
-pattern_file=$(mktemp)
-# Recognize special test set names, otherwise we interpret it as a list of tags.
-test_args=""
-echo "tags: ${fpga_tags}"
-if [ "${fpga_tags}" == "cw310_sival_but_not_rom_ext_tests" ]
-then
-    # Only consider tests that are tagged `cw310_sival` but that do not have corresponding
-    # test tagged `cw310_sival_rom_ext`.
-
-    # The difficulty is that, technically, they are different tests since `opentitan_test` creates
-    # one target for each execution environment. The following query relies on the existence
-    # of the test suite created by `opentitan_test` that depends on all per-exec-env tests.
-    # This query only removes all tests that have sibling tagged `cw310_sival_rom_ext`. We
-    # then rely on test tag filters to only consider `cw310_sival`.
-    ci/bazelisk.sh query \
-    "
-        `# Find all tests that are dependencies of the test suite identified`
-        deps(
-            `# Find all test suites`
-            kind(
-                \"test_suite\",
-                //...
-            )
-            except
-            `# Remove all test suites depending on a test tagged cw310_sival_rom_ext`
-            `# but ignore those marked as broken or manual`
-            rdeps(
-                //...
-                except
-                attr(\"tags\",\"broken|manual\", //...),
-                `# Find all tests tagged cw310_sival_rom_ext`
-                attr(\"tags\",\"cw310_sival_rom_ext\", //...),
-                1
-            ),
-            1
-        )
-    " \
-    > "${pattern_file}"
-    # We need to remove tests tagged as manual since we are not using a wildcard target.
-    test_args="${test_args} --test_tag_filters=cw310_sival,-broken,-skip_in_ci,-manual"
-elif [ "${fpga_tags}" == "cw310_rom_but_not_manuf_and_sival_tests" ]
-then
-    # Only consider tests that are tagged `cw310_rom_with_fake_keys` or `cw310_rom_with_real_keys`
-    # but that do not have corresponding test tagged `cw310_sival` or `cw310_sival_rom_ext`. Also
-    # ignore tests tagged as `manuf`.
-
-    # This query only removes all tests that have sibling tagged  `cw310_sival` or `cw310_sival_rom_ext`.
-    # We then rely on test tag filters to only consider `cw310_sival`.
-    ci/bazelisk.sh query \
-    "
-        `# Find all tests that are dependencies of the test suite identified`
-        deps(
-            `# Find all test suites`
-            kind(
-                \"test_suite\",
-                //...
-            )
-            except
-            `# Remove all test suites depending on a test tagged cw310_sival[_rom_ext]`
-            `# but ignore those marked as broken or manual`
-            rdeps(
-                //...
-                except
-                attr(\"tags\",\"broken|manual\", //...),
-                `# Find all tests tagged cw310_sival_rom_ext`
-                attr(\"tags\",\"cw310_sival\", //...),
-                1
-            ),
-            1
-        )
-    " \
-    > "${pattern_file}"
-    # We need to remove tests tagged as manual since we are not using a wildcard target.
-    test_args="${test_args} --test_tag_filters=cw310_rom_with_fake_keys,cw310_rom_with_real_keys,-manuf,-broken,-skip_in_ci,-manual"
-else
-    test_args="${test_args} --test_tag_filters=${fpga_tags},-broken,-skip_in_ci"
-    echo "//..." > "${pattern_file}"
-    echo "@manufacturer_test_hooks//..." >> "${pattern_file}"
-fi
-
 ci/bazelisk.sh test \
     --define DISABLE_VERILATOR_BUILD=true \
     --nokeep_going \
@@ -135,5 +54,4 @@ ci/bazelisk.sh test \
     --build_tests_only \
     --define "$fpga"=lowrisc \
     --flaky_test_attempts=2 \
-    --target_pattern_file="${pattern_file}" \
-    ${test_args}
+    --target_pattern_file="${target_pattern_file}"
diff --git a/ci/scripts/run-verilator-tests.sh b/ci/scripts/run-verilator-tests.sh
index 5c0386df0509d..abf5a9d5df0bd 100755
--- a/ci/scripts/run-verilator-tests.sh
+++ b/ci/scripts/run-verilator-tests.sh
@@ -9,7 +9,7 @@ set -e
 
 ci/bazelisk.sh test \
     --build_tests_only=true \
-    --test_timeout=2400,2400,3600,-1 \
+    --test_timeout=2400,2400,4000,-1 \
     --local_test_jobs=8 \
     --local_cpu_resources=8 \
     --test_tag_filters=verilator,-broken \
diff --git a/ci/scripts/test-airgapped-build.sh b/ci/scripts/test-airgapped-build.sh
index 1e42deed181a5..a1ede591dab8b 100755
--- a/ci/scripts/test-airgapped-build.sh
+++ b/ci/scripts/test-airgapped-build.sh
@@ -8,6 +8,9 @@ set -ex
 # Prefetch bazel airgapped dependencies.
 util/prep-bazel-airgapped-build.sh -f
 
+# Clean out bazel cache so no remnants exist for test.
+"${PWD}/bazel-airgapped/bazel" clean --expunge
+
 # Remove the airgapped network namespace.
 remove_airgapped_netns() {
   sudo ip netns delete airgapped
@@ -20,26 +23,15 @@ sudo ip netns exec airgapped ip addr add 127.0.0.1/8 dev lo
 sudo ip netns exec airgapped ip link set dev lo up
 
 # Enter the network namespace and perform several builds.
-sudo ip netns exec airgapped sudo -u "$USER" bash -c \
-  "export BAZEL_BITSTREAMS_CACHE=$(pwd)/bazel-airgapped/bitstreams-cache;
-  export BITSTREAM=\"--offline latest\";
-  export BAZEL_PYTHON_WHEELS_REPO=$(pwd)/bazel-airgapped/ot_python_wheels;
-  TARGET_PATTERN_FILE=\$(mktemp)
-  echo //sw/device/silicon_creator/rom:mask_rom > \"\${TARGET_PATTERN_FILE}\"
-  bazel-airgapped/bazel cquery \
-    --distdir=$(pwd)/bazel-airgapped/bazel-distdir \
-    --repository_cache=$(pwd)/bazel-airgapped/bazel-cache \
-    --noinclude_aspects \
-    --output=starlark \
-    --starlark:expr='\"-{}\".format(target.label)' \
-    --define DISABLE_VERILATOR_BUILD=true \
-    -- \"rdeps(//..., kind(bitstream_splice, //...))\" \
-    >> \"\${TARGET_PATTERN_FILE}\"
-  echo Building target pattern:
-  cat \"\${TARGET_PATTERN_FILE}\"
-  bazel-airgapped/bazel build \
-    --distdir=$(pwd)/bazel-airgapped/bazel-distdir \
-    --repository_cache=$(pwd)/bazel-airgapped/bazel-cache \
-    --define DISABLE_VERILATOR_BUILD=true \
-    --target_pattern_file=\"\${TARGET_PATTERN_FILE}\""
+sudo ip netns exec airgapped sudo -u "$USER" \
+  env \
+    BAZEL_BITSTREAMS_CACHE="${PWD}/bazel-airgapped/bitstreams-cache" \
+    OT_AIRGAPPED="true"                                              \
+    BITSTREAM="--offline latest"                                     \
+  "${PWD}/bazel-airgapped/bazel" build                               \
+    --distdir="${PWD}/bazel-airgapped/bazel-distdir"                 \
+    --vendor_dir="${PWD}/bazel-airgapped/bazel-vendor"               \
+    --define DISABLE_VERILATOR_BUILD=true                            \
+    //sw/device/silicon_creator/rom:mask_rom
+
 exit 0
diff --git a/ci/scripts/validate_testplans.sh b/ci/scripts/validate_testplans.sh
new file mode 100755
index 0000000000000..08dfcd193b332
--- /dev/null
+++ b/ci/scripts/validate_testplans.sh
@@ -0,0 +1,26 @@
+#!/usr/bin/env bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Use a JSON schema to validate the testplan hjson files have the correct structure.
+
+set -e
+
+dirs_with_testplan_files=(
+    "hw/top_earlgrey/data"
+    "hw/top_earlgrey/data/ip"
+)
+testplan_schema="hw/lint/sival_testplan_schema.hjson"
+
+for dir in "${dirs_with_testplan_files[@]}"; do
+    echo "Validating testplans under $dir:"
+    util/validate_testplans.py --dir "$dir" --schema "$testplan_schema" || {
+        echo -n "##vso[task.logissue type=error]"
+        echo "Failed testplan validation in ${dir}."
+        echo "::error::Failed testplan validation in ${dir}."
+        exit 1
+    }
+done
+
+exit 0
diff --git a/ci/scripts/whitespace.sh b/ci/scripts/whitespace.sh
index 6d9f0867bb316..70b29b6ce8224 100755
--- a/ci/scripts/whitespace.sh
+++ b/ci/scripts/whitespace.sh
@@ -24,8 +24,10 @@ echo "Checking whitespace on files changed since $merge_base"
 
 set -o pipefail
 git diff --name-only --diff-filter=ACMRTUXB "$merge_base" -- \
-        ':!third_party/rust/crates/*' \
         ':!signing/softhsm/tokens/*' \
+        ':!sw/device/silicon_creator/rom/e2e/ate/binaries/*' \
+        ':!sw/device/silicon_creator/rom/e2e/ate/signatures/*' \
+        ':!*/testdata/*' \
         ':!*/vendor/*' | \
     xargs -r util/fix_trailing_whitespace.py --dry-run || {
     echo -n "##vso[task.logissue type=error]"
diff --git a/ci/upload-artifacts-template.yml b/ci/upload-artifacts-template.yml
deleted file mode 100644
index e42e6c7f130ab..0000000000000
--- a/ci/upload-artifacts-template.yml
+++ /dev/null
@@ -1,90 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Azure template for archiving pipeline step outputs and uploading them.
-#
-# This template will archive all of $BIN_DIR, and upload it for use by
-# downstream jobs using download-artifacts-template.yml.
-#
-# This template expects that a variable $BUILD_ROOT is set. See
-# util/build_consts.sh for more information.
-
-
-parameters:
-  # Rsync-style file patterns to include in the partial BIN_DIR output. If a
-  # file is captured by these patterns, but it was previously downloaded via
-  # ci/download-artifacts-template.yml, it will not be uploaded again.
-  - name: includePatterns
-    type: object
-    default: []
-  # Rsync-style file patterns to unconditionally include in the partial BIN_DIR
-  # output. If a file is captured by these patterns, it will be uploaded even if
-  # it came from ci/download-artifacts-template.yml.
-  - name: unconditionalIncludePatterns
-    type: object
-    default: []
-
-steps:
-  - bash: |
-      set -e
-      test -n "$BUILD_ROOT"
-      . util/build_consts.sh
-
-      # Write all sets of include patterns to files used by rsync.
-      echo -e "${{ join('\n', parameters.includePatterns) }}" > "$BUILD_ROOT/include_patterns.txt"
-      echo -e "${{ join('\n', parameters.unconditionalIncludePatterns) }}" > "$BUILD_ROOT/unconditional_include_patterns.txt"
-
-      echo
-      echo Files matching these patterns will be included in the binary build
-      echo artifact for this job unless they were downloaded from an upstream job:
-      echo vvvvvvvvvvvvvvvvvv
-      cat "$BUILD_ROOT/include_patterns.txt"
-      echo ^^^^^^^^^^^^^^^^^^
-
-      echo
-      echo Files matching these patterns will always be included in the binary
-      echo build artifact for this job:
-      echo vvvvvvvvvvvvvvvvvv
-      cat "$BUILD_ROOT/unconditional_include_patterns.txt"
-      echo ^^^^^^^^^^^^^^^^^^
-
-      # The file upstream_bin_dir_contents.txt lists all files which were part
-      # of an "upstream" BIN_DIR which got downloaded at the beginning of this
-      # job. Ensure that this file exists, even if no upstream BIN_DIR was
-      # downloaded.
-      touch "$BUILD_ROOT/upstream_bin_dir_contents.txt"
-
-      BIN_DIR_FULL="${BIN_DIR}.full"
-      mv "$BIN_DIR" "$BIN_DIR_FULL"
-      mkdir -p "$BIN_DIR"
-
-      echo
-      echo Copying files into the output archive:
-      rsync \
-        --archive \
-        --verbose \
-        --remove-source-files \
-        --prune-empty-dirs \
-        --include-from="$BUILD_ROOT/unconditional_include_patterns.txt" \
-        --exclude-from="$BUILD_ROOT/upstream_bin_dir_contents.txt" \
-        --include="*/" \
-        --include-from="$BUILD_ROOT/include_patterns.txt" \
-        --exclude="*" \
-        "${BIN_DIR_FULL}/" "${BIN_DIR}/"
-
-      echo
-      echo 'Files in $BIN_DIR not considered outputs of this job:'
-      echo vvvvvvvvvvvvvvvvvv
-      find "$BIN_DIR_FULL"
-      echo ^^^^^^^^^^^^^^^^^^
-
-      tar -C "$BUILD_ROOT" \
-        -cvf "$BUILD_ROOT/build-bin.tar" \
-        "${BIN_DIR#"$BUILD_ROOT/"}"
-    displayName: Archive step outputs
-  - publish: "$(Build.ArtifactStagingDirectory)/build-bin.tar"
-    # The PhaseName is the string after the "job" key in the build description,
-    # e.g. "job: my_phase_name".
-    artifact: partial-build-bin-$(System.PhaseName)
-    displayName: Upload step outputs
diff --git a/ci/verify-fpga-jobs.yml b/ci/verify-fpga-jobs.yml
new file mode 100644
index 0000000000000..89c95022ce465
--- /dev/null
+++ b/ci/verify-fpga-jobs.yml
@@ -0,0 +1,62 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Azure template for an FPGA test job verification.
+# This script downloads the target pattern file from all FPGA jobs that are
+# dependencies and performs some checks on them.
+
+parameters:
+# List of all FPGA jobs
+- name: 'fpga_jobs'
+  type: object
+# Test tag filter to find all FPGA tests
+- name: 'fpga_tags'
+  type: string
+
+jobs:
+- job: verify_fpga_jobs
+  displayName: Verify FPGA jobs
+  pool:
+    vmImage: ubuntu-20.04
+  dependsOn: ${{ parameters.fpga_jobs }}
+  # Run even if dependencies failed: some flaky tests might cause the job to fail
+  # but we still want to verify the FPGA jobs.
+  condition: succeededOrFailed()
+  steps:
+  - ${{ each job in parameters.fpga_jobs }}:
+    - task: DownloadPipelineArtifact@2
+      inputs:
+        buildType: current
+        targetPath: '$(Pipeline.Workspace)/verify_fpga_jobs/${{ job }}'
+        artifact: "${{ job }}"
+        patterns: target_pattern_file.txt
+      displayName: Download target pattern files from job ${{ job }}
+  - bash: |
+      ls -R $(Pipeline.Workspace)/verify_fpga_jobs
+  - bash: |
+      # Find and display all duplicates:
+      # - for each target file and each line, print '<job_name> <target>'
+      # - then sort by the target name
+      # - then keep all duplicated lines
+      pattern_files=$(find $(Pipeline.Workspace)/verify_fpga_jobs -name target_pattern_file.txt)
+      if [ -s duplicates.txt ]; then
+        echo "The following tests ran in two or more jobs:"
+        cat duplicates.txt
+        false
+      fi
+    displayName: Checking for duplicate test runs
+  - bash: |
+      # Find and display tests that did not run:
+      ./ci/scripts/run-bazel-test-query.sh all_fpga.txt "${{ parameters.fpga_tags }}",-manual,-broken,-skip_in_ci //... @manufacturer_test_hooks//...
+      sort -o all_fpga.txt all_fpga.txt
+      pattern_files=$(find $(Pipeline.Workspace)/verify_fpga_jobs -name target_pattern_file.txt)
+      sort $pattern_files > all_run.txt
+      comm -23 all_fpga.txt all_run.txt > missing.txt
+      if [ -s missing.txt ]; then
+        echo "The following tests did not run in any job:"
+        cat missing.txt
+        false
+      fi
+    displayName: Checking for missing test runs
+    condition: succeededOrFailed()
diff --git a/doc/contributing/ci/README.md b/doc/contributing/ci/README.md
index 7e56b3ed3e514..9a0b1b04e6659 100644
--- a/doc/contributing/ci/README.md
+++ b/doc/contributing/ci/README.md
@@ -21,7 +21,7 @@ Download the SVG from Google Draw, open it in Inkscape once and save it without
 -->
 ![CI Overview](continuous_integration_overview.svg)
 
-OpenTitan uses [Azure Pipelines](https://azure.microsoft.com/en-gb/services/devops/pipelines/) as continuous integration provider: test jobs are described in an Azure Pipelines-specific way, and then executed on compute resources, some of which are provided by Azure Pipelines, and others of which are provided by lowRISC.
+OpenTitan uses [GitHub Actions](https://github.com/features/actions) as continuous integration provider: test jobs are described in an GitHub Actions-specific way, and then executed on compute resources, some of which are provided by GitHub, and others of which are provided by lowRISC.
 
 Two things are special in the way OpenTitan does continuous integration: private CI, and testing on FPGA boards.
 
@@ -31,53 +31,43 @@ We run such test jobs in a separate environment where only OpenTitan project mem
 The test result (pass/fail) is still shared publicly to enable outside contributors to at least get some feedback if their pull request passed our tests.
 
 To test OpenTitan (both the hardware and the software) on FPGAs we have various FPGA boards connected to a machine at lowRISC.
-Azure Pipelines is configured to schedule test jobs on this machine when FPGA testing is required.
+We configure GitHub Actions to schedule test jobs on this machine when FPGA testing is required.
 The results and logs of these test runs are shown publicly.
 
-## Azure Pipelines projects
-
-OpenTitan CI uses two Azure DevOps projects (which Azure Pipelines is a part of):
-
-* https://dev.azure.com/lowrisc/opentitan/ for public CI.
-* https://dev.azure.com/lowrisc/opentitan-private/ for private CI.
-
 ## Test descriptions
 
-All tests are described in a Azure Pipelines-specific YAML syntax.
-`$REPO_TOP/azure-pipelines.yml` is the main configuration file for all public CI jobs.
+All tests are described in a GitHub Actions-specific YAML syntax.
+`$REPO_TOP/.github/workflows/ci.yml` is the main configuration file for all public CI jobs.
 The private CI jobs are described in a separate private repository, [lowrisc/opentitan-private-ci](https://github.com/lowRISC/opentitan-private-ci), to keep the job descriptions internal for legal reasons.
 
-The [YAML schema](https://docs.microsoft.com/en-us/azure/devops/pipelines/yaml-schema) is part of the Azure Pipelines documentation.
+GitHub Actions documentation can be found at https://docs.github.com/en/actions.
 
-## Compute resources: agent pools and agents
+## Compute resources: runners
 
-Each test in the YAML file also specifies which type of compute resource it wants to run on.
-Identical compute resources are grouped into *agent pools*, and an individual compute resource is called an *agent*.
+Each job in the YAML file also specifies which type of compute resource it wants to run on.
+An individual compute resource is called a *runner*, and we separate runners by giving them distinct labels for runners with different capability.
 
-For OpenTitan, we have the following agent pools available, which can also be seen in the [Azure Pipelines UI](https://dev.azure.com/lowrisc/opentitan/_settings/agentqueues):
-* The *Azure Pipelines* pool is a Microsoft-provided pool of VMs which are free of charge for us.
-  They are described in more detail in the [Azure Pipelines documentation](https://docs.microsoft.com/en-us/azure/devops/pipelines/agents/hosted).
-* The *ci-public* pool has a lowRISC-specific setup with tools such as Xilinx Vivado installed, but has no access to tools with special license restrictions.
-* The *ci-eda* pool has proprietary EDA tools installed and access to the respective licenses.
-* The *FPGA* pool currently consists of a single machine with our FPGA boards connected to it.
+For OpenTitan, we have the following runner labels available:
+* The *ubuntu-22.04* label is backed a GitHub-provided pool of VMs which are free of charge for us.
+  They are described in more detail in the [GitHub Actions documentation](https://docs.github.com/en/actions/using-github-hosted-runners/using-github-hosted-runners/about-github-hosted-runners).
+* The *ubuntu-22.04-vivado* label is backed by containers with a lowRISC-specific setup with Xilinx Vivado installed, but has no access to tools with special license restrictions.
+* The *ubuntu-22.04-&lt;vendor&gt;* labels have proprietary EDA tools installed and access to the respective licenses.
+* The *ubuntu-22.04-fpga* label currently consists of containers on a single machine with our FPGA boards connected to it.
 
-All pools except for the *Azure Pipelines* pool are managed by lowRISC IT.
+All self-hosted runners (i.e. non-GitHub runners) are managed by lowRISC IT.
 
-All agents provide ephemeral test environments: the test environment is initialized at the start of a test job and completely destroyed at the end.
+All runners provide ephemeral test environments: the test environment is initialized at the start of a test job and completely destroyed at the end.
 This is achieved by running tests in Docker containers which are recreated after each run.
-The base image used for all lowRISC-hosted agent pools is available [as lowrisc/container-ci-eda on DockerHub](https://hub.docker.com/r/lowrisc/container-ci-eda).
+The base image used for all lowRISC-hosted runners is available [as lowrisc/eda-runner-ubuntu-22.04 on DockerHub](https://hub.docker.com/r/lowrisc/eda-runner-ubuntu-22.04).
 (The build rules/Dockerfile for this image are lowRISC-internal.)
 
-lowRISC-provided agents run in a Kubernetes cluster on Google Cloud (GCP), where we also define the resources allocated for the individual agents.
-The agent pools are static in size, i.e. the number of agents doesn't increase and decrease depending on the number of scheduled jobs.
+lowRISC-provided runners run in a Kubernetes cluster on Google Cloud (GCP), where we also define the resources allocated for the individual runners.
+The number of runners automatically scale depending on the number of scheduled jobs and has an upper limit.
 
 ## Job scheduling, build triggers and status reporting
 
-Builds are triggered by GitHub, which sends notifications to Azure Pipelines on a range of events, e.g. the creation of new pull requests, the merge of code into a branch, etc.
-
-The Azure Pipelines scheduler consumes these events and compares them with the configured pipeline triggers in the `azure-pipelines.yml` file.
-It then processes the pipeline description and adds test jobs to the respective agent pool queues, taking test dependencies into account.
-
-After the agent has completed a test job it reports back the result to the Azure Pipelines scheduler, which makes this information (build artifacts and logs) available to users through the web UI.
+When an event, e.g. the creation of new pull requests, are triggered, GitHub Actions compares them with the configured workflow triggers in the `.github/workflows/ci.yml` file.
+It then processes the workflow description and queues and dispatches test jobs to the respective runners, taking test dependencies into account.
 
-Azure Pipelines also reports the test status back to GitHub, where it is displayed below a pull request, as marks next to commits, and in various other places.
+After the runner has completed a test job it reports back the result GitHub Actions, which makes this information (build artifacts and logs) available to users through the web UI.
+The status of GitHub Actions is displayed below a pull request, as marks next to commits, and in various other places.
diff --git a/doc/contributing/ci/continuous_integration_overview.svg b/doc/contributing/ci/continuous_integration_overview.svg
index b1a7fc19e6f8b..715f961f5fd1c 100644
--- a/doc/contributing/ci/continuous_integration_overview.svg
+++ b/doc/contributing/ci/continuous_integration_overview.svg
@@ -6,55 +6,56 @@
    stroke="none"
    stroke-linecap="square"
    stroke-miterlimit="10"
-   id="svg283"
+   id="svg141"
    sodipodi:docname="continuous_integration_overview.svg"
-   inkscape:version="1.1.1 (3bf5ae0d25, 2021-09-20)"
+   inkscape:version="1.3.2 (091e20ef0f, 2023-11-25)"
    xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
    xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
    xmlns="http://www.w3.org/2000/svg"
    xmlns:svg="http://www.w3.org/2000/svg">
   <defs
-     id="defs287" />
+     id="defs141" />
   <sodipodi:namedview
-     id="namedview285"
+     id="namedview141"
      pagecolor="#ffffff"
-     bordercolor="#666666"
-     borderopacity="1.0"
-     inkscape:pageshadow="2"
+     bordercolor="#000000"
+     borderopacity="0.25"
+     inkscape:showpageshadow="2"
      inkscape:pageopacity="0.0"
      inkscape:pagecheckerboard="0"
+     inkscape:deskcolor="#d1d1d1"
      showgrid="false"
-     inkscape:zoom="0.68834982"
-     inkscape:cx="470.69091"
-     inkscape:cy="123.48373"
-     inkscape:window-width="1920"
-     inkscape:window-height="1141"
-     inkscape:window-x="1920"
+     inkscape:zoom="1.078307"
+     inkscape:cx="464.15353"
+     inkscape:cy="290.73353"
+     inkscape:window-width="1504"
+     inkscape:window-height="931"
+     inkscape:window-x="0"
      inkscape:window-y="0"
      inkscape:window-maximized="1"
-     inkscape:current-layer="svg283" />
+     inkscape:current-layer="svg141" />
   <clipPath
      id="p.0">
     <path
        d="m0 0l928.30707 0l0 580.7244l-928.30707 0l0 -580.7244z"
        clip-rule="nonzero"
-       id="path2" />
+       id="path1" />
   </clipPath>
   <g
      clip-path="url(#p.0)"
-     id="g281">
+     id="g141">
     <path
        fill="#000000"
        fill-opacity="0.0"
        d="m0 0l928.30707 0l0 580.7244l-928.30707 0z"
        fill-rule="evenodd"
-       id="path5" />
+       id="path2" />
     <path
        fill="#000000"
        fill-opacity="0.0"
        d="m366.92126 0l555.9685 0l0 416.8189l-555.9685 0z"
        fill-rule="evenodd"
-       id="path7" />
+       id="path3" />
     <path
        stroke="#595959"
        stroke-width="1.0"
@@ -62,12 +63,12 @@
        stroke-linecap="butt"
        d="m366.92126 0l555.9685 0l0 416.8189l-555.9685 0z"
        fill-rule="evenodd"
-       id="path9" />
+       id="path4" />
     <path
        fill="#ead1dc"
        d="m382.33072 331.0866l334.4882 0l0 81.322845l-334.4882 0z"
        fill-rule="evenodd"
-       id="path11" />
+       id="path5" />
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+       id="path6" />
     <path
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1.171875 -0.390625q0.59375 -0.390625 0.921875 -1.140625zm-3.421875 -1.71875l3.875 0q0.015625 -0.1875 0.015625 -0.265625q0 -0.875 -0.453125 -1.34375q-0.4375 -0.484375 -1.125 -0.484375q-0.765625 0 -1.390625 0.53125q-0.609375 0.515625 -0.921875 1.5625z"
        fill-rule="nonzero"
-       id="path275" />
+       id="path139" />
     <path
        fill="#ead1dc"
        d="m760.5906 459.96063l26.897583 0l0 27.685028l-26.897583 0z"
        fill-rule="evenodd"
-       id="path277" />
+       id="path140" />
     <path
        stroke="#595959"
        stroke-width="1.0"
@@ -882,6 +893,6 @@
        stroke-linecap="butt"
        d="m760.5906 459.96063l26.897583 0l0 27.685028l-26.897583 0z"
        fill-rule="evenodd"
-       id="path279" />
+       id="path141" />
   </g>
 </svg>
diff --git a/doc/contributing/fpga/debugging_with_ila.md b/doc/contributing/fpga/debugging_with_ila.md
index d0a306437e632..e02032798645d 100644
--- a/doc/contributing/fpga/debugging_with_ila.md
+++ b/doc/contributing/fpga/debugging_with_ila.md
@@ -237,7 +237,7 @@ The path to the synthesis log file is usually `bazel-out/k8-fastbuild/bin/hw/bit
 
 Once Vivado has successfully generated a bitstream, locate its directory with `dirname $(./bazelisk.sh outquery-all //hw/bitstream:rom --define bitstream=vivado)` (it will usually be `bazel-out/k8-fastbuild/bin/hw/bitstream/vivado`).
 Append `/build.fpga_cw310/synth-vivado` to that path.
-In the resulting directory, you should find `otp.mmi`, `rom.mmi`, and `lowrisc_systems_chip_earlgrey_cw310_0.1.bit`.
+In the resulting directory, you should find `memories.mmi` and `lowrisc_systems_chip_earlgrey_cw310_0.1.bit`.
 We will next copy those files into a local bitstream cache that Bazel can use.
 
 If you don't have a local bitstream cache yet, create one as follows:
@@ -254,7 +254,7 @@ mkdir -p $BAZEL_BITSTREAMS_CACHE/cache
 Create a directory with the name of the Git hash for which you have built the bitstream under `$BAZEL_BITSTREAMS_CACHE/cache/` (e.g,. `$BAZEL_BITSTREAMS_CACHE/cache/2e5a31b7d80b6eb97e114b2ca8f9e132ec7c83a6`).
 (You can find the relevant Git hash with `git log`, for example.
 If you have not committed the changes to implement the ILA yet, we recommend doing so at least locally.)
-Copy `otp.mmi` and `rom.mmi` to that directory.
+Copy `memories.mmi` to that directory.
 Copy `lowrisc_systems_chip_earlgrey_cw310_0.1.bit` also to that directory, then rename the copy to `lowrisc_systems_chip_earlgrey_cw310_0.1.bit.orig`.
 
 Now instruct Bazel to use a bitstream from the local cache by setting an `--offline` argument in the `BITSTREAM` environment variable; for example:
diff --git a/doc/contributing/fpga/ref_manual_fpga.md b/doc/contributing/fpga/ref_manual_fpga.md
index 37d107b4f9128..61aa684bb30f4 100644
--- a/doc/contributing/fpga/ref_manual_fpga.md
+++ b/doc/contributing/fpga/ref_manual_fpga.md
@@ -130,7 +130,7 @@ For more information, consult the `:bitstream_bisect` tool directly!
 
 This section gives an overview of where bitstreams are generated, how they are uploaded to the GCP cache, and how Bazel reaches into the cache.
 
-OpenTitan runs CI tasks on Azure Pipelines that build FPGA bitstreams.
+OpenTitan runs CI tasks on GitHub Actions that build FPGA bitstreams.
 A full bitstream build can take hours, so we cache the output artifacts in a GCS bucket.
 These cached bitstreams can be downloaded and used as-is, or we can splice in freshly-compiled components, including the ROM and the OTP image.
 
@@ -143,8 +143,7 @@ The following files are produced as a result:
 * `fpga_cw310_rom.bit` (ROM, RMA OTP image)
 * `fpga_cw310_rom_otp_dev.bit` (ROM, DEV OTP image)
 * `lowrisc_systems_chip_earlgrey_cw310_0.1.bit` (test ROM, RMA OTP image)
-* `otp.mmi`
-* `rom.mmi`
+* `memories.mmi`
 
 If CI is working on the `master` branch, it puts selected build artifacts into a tarball, which it then uploads to the GCS bucket. The latest tarball is available here: https://storage.googleapis.com/opentitan-bitstreams/master/bitstream-latest.tar.gz
 
diff --git a/doc/contributing/hw/methodology.md b/doc/contributing/hw/methodology.md
index dc593a343f100..c285bea4e7828 100644
--- a/doc/contributing/hw/methodology.md
+++ b/doc/contributing/hw/methodology.md
@@ -193,7 +193,7 @@ Until that time, all generated files (see for example the output files from the
 [register generation tool](../../../util/reggen/README.md))
 are checked in.
 There is an over-arching build file in the repository under `hw/Makefile` that builds all of the `regtool` content.
-This is used by an Azure Pipelines pre-submit check script to ensure that the source files produce a generated file that is identical to the one being submitted.
+This is used by a GitHub Actions pre-submit check script to ensure that the source files produce a generated file that is identical to the one being submitted.
 
 ## Automatic SV Code Formatting using Verible (Open Source)
 
diff --git a/doc/contributing/style_guides/c_cpp_coding_style.md b/doc/contributing/style_guides/c_cpp_coding_style.md
index 8baead56dc2a5..64740ecfee50a 100644
--- a/doc/contributing/style_guides/c_cpp_coding_style.md
+++ b/doc/contributing/style_guides/c_cpp_coding_style.md
@@ -266,13 +266,13 @@ This is not necessary in a `.c` or `.cc` file, where this cannot cause downstrea
 
 ### C++ Version
 
-C++ code should target C++14.
+C++ code should target C++17.
 
 ### Aggregate Initializers
 
 ***C++20-style designated initializers are permitted in C++ code, when used with POD types.***
 
-While we target C++14, both GCC and Clang allow C++20 designated initializers in C++14-mode, as an extension:
+While we target C++17, both GCC and Clang allow C++20 designated initializers in C++17-mode, as an extension:
 ```
 struct Foo { int a, b; };
 
diff --git a/doc/contributing/sw/adding_python_depedencies.md b/doc/contributing/sw/adding_python_depedencies.md
index f03e41aafab83..99f523d82433f 100644
--- a/doc/contributing/sw/adding_python_depedencies.md
+++ b/doc/contributing/sw/adding_python_depedencies.md
@@ -1,8 +1,21 @@
-# Adding Python Dependencies to the Project
+# Python Dependency Management
 
 To comply with software supply chain security requirements of various project partner organizations, we pin our Python packages to specific versions, and provide hashes for each dependency (including transitive dependencies).
-We accomplish this with the help of the `pip-compile` tool, which is part of the `pip-tools` package.
+We accomplish this with the help of the `uv pip compile` command, which is part of the `uv` package.
+
+Additionally, to make it easier for downstream Bazel projects to dependend on this Bazel project (`@lowrisc_opentitan`), we vendor in the autogenerated `requirements.bzl` file produced by `rules_python`, see the `rules_python` [documentation](https://rules-python.readthedocs.io/en/0.39.0/pypi-dependencies.html#vendoring-the-requirements-bzl-file) for more details.
 
+# Adding Python Dependencies to the Project
 If you need to add another Python package to the project, do so by:
-1. adding the package and version number to the `python-requirements.in` file, in the form of `<package>==<version>`, and
-1. run the script `util/sh/scripts/gen-python-requirements.sh`, which will auto-generate the updated `python-requirements.txt` file.
+1. adding the package and version number to the `pyproject.toml` file, in the form of `<package>~=<version>`  (or `<package> == <version>` in case a specific version is needed),
+1. running the script `util/sh/scripts/gen-python-requirements.sh`, which will auto-generate the updated `python-requirements.txt` file as shown below, and
+1. running the `//third_party/python:vendor_requirements` Bazel target which will update the vendored in `requirements.bzl` file as shown below.
+
+```sh
+# Update autogenerated python package management files.
+./util/sh/scripts/gen-python-requirements.sh
+bazel run //third_party/python:vendor_requirements
+
+# Check that the package management files are up to date.
+bazel test //third_party/python/...
+```
diff --git a/doc/getting_started/setup_fpga.md b/doc/getting_started/setup_fpga.md
index 7a2bb87a027b9..98e0136652b18 100644
--- a/doc/getting_started/setup_fpga.md
+++ b/doc/getting_started/setup_fpga.md
@@ -240,8 +240,8 @@ On your CW340 base board (the red board):
     1. UART1 RX/TX (OpenTitan pins IOA0/1): JP3 & JP4
     1. JTAG TAP select straps (OpenTitan pins IOC5/8): JP11 & JP12
 1. Connect the following blue socket-to-socket jumpers in the middle of the board to `HD` (for "HyperDebug").
-    1. SPI Device: connect JP23 to JP25
-    1. JTAG: connect JP13 to JP15
+    1. SPI Device: connect J23 to J25
+    1. JTAG: connect J12 to J13
 
 ##### Connecting HyperDebug to the CW340 Base Board
 
@@ -251,7 +251,6 @@ On your CW340 base board (the red board):
 1. Ensure the HyperDebug jumper JP4 is set to select `1.8V`.
 1. Connect the HyperDebug board to the ST Zio connectors in the bottom left of the board.
 1. Connect the PC USB-C cable back to your HyperDebug board.
-1. Connect the PC USB-C cable back to your HyperDebug board.
 1. Power on the CW340 by setting the *Control Power* switch in the top left corner, *SW7*, to the left towards the barrel jack.
 
 ### Detecting the PC Connections to the Board(s)
@@ -614,23 +613,14 @@ The output of the disassemble should now contain additional information.
 ## Reproducing FPGA CI Failures Locally
 
 When an FPGA test fails in CI, it can be helpful to run the tests locally with the version of the bitstream generated by the failing CI run.
-To avoid rebuilding the bitstream, you can download the bitstream artifact from the Azure Pipeline CI run and use opentitantool to load the bitstream manually.
+To avoid rebuilding the bitstream, you can download the bitstream artifact from the GitHub Actions run and use opentitantool to load the bitstream manually.
 
 To download the bitstream:
 
 1. Open your PR on Github and navigate to the "Checks" tab.
-2. On the left sidebar, expand the "Azure Pipelines" menu.
-3. Open the "CI (CW340's Earl Grey Bitstream)" job and click on "View more details on Azure Pipelines".
-4. Click on "1 artifact produced".
-5. Click on the three dots for "partial-build-bin-chip_earlgrey_cw340".
-6. You can either download the artifact directly or download with the URL.
-
-Note that Azure does not allow you to download the artifact with `wget` or `curl` by default, so to use the download URL, you need to specify a `user-agent` header.
-For example, to download with `curl`, you can use the following command
-
-```console
-curl --output /tmp/artifact.tar.gz -H 'user-agent: Mozilla/5.0' <download_URL>
-```
+2. On the left sidebar, click the "CI" top-level item.
+3. Scroll down to bottom of the page.
+4. Download the artifact for "partial-build-bin-chip_earlgrey_cw340".
 
 After extracting the artifact, the bitstream is located at `build-bin/hw/top_earlgrey/lowrisc_systems_chip_earlgrey_cw340_0.1.bit.{splice,orig}`.
 The `.splice` bitstream has the ROM spliced in, and the `.orig` bitstream has the test ROM.
diff --git a/doc/rust_for_c_devs.md b/doc/rust_for_c_devs.md
index 6119d105d7203..9e4ab16fc0143 100644
--- a/doc/rust_for_c_devs.md
+++ b/doc/rust_for_c_devs.md
@@ -169,8 +169,8 @@ struct MyCStruct {
 ```
 This is guaranteed to lay out fields in declaration order, adding padding for alignment.
 `#[repr(Rust)]` is the implicit default.
-`#[repr(packed)]` is analogous to `__attribute__((packed))`, and will not produce any padding[^21].
-The alignment of the whole struct can be forced to a larger value using `#[repr(align(N))]`, similar to `_Alignas`.
+`#[repr(C, packed)]` is analogous to `__attribute__((packed))`, and will not produce any padding[^21].
+The alignment of the whole struct can be forced to a larger value using `#[repr(C, align(N))]`, similar to `_Alignas`.
 
 Fields can be accessed using the same dot syntax as C: `my_struct.foo`, `my_struct.bar = 5;`.
 
diff --git a/doc/security/cryptolib/cryptolib_api.md b/doc/security/cryptolib/cryptolib_api.md
index 7f48de6a9cb0e..dce876937b6e0 100644
--- a/doc/security/cryptolib/cryptolib_api.md
+++ b/doc/security/cryptolib/cryptolib_api.md
@@ -128,24 +128,17 @@ Data structures for key types and modes help the cryptolib recognize and prevent
 {{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_mode }}
 {{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_operation }}
 {{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_padding }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_tag_len }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_tag_len }}
 
 #### Elliptic curve data structures
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_eddsa_sign_mode }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecc_domain }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecc_curve_type }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecc_curve }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_eddsa_sign_mode }}
 
 #### Hash data structures
 
 {{#header-snippet sw/device/lib/crypto/include/datatypes.h otcrypto_hash_mode }}
 {{#header-snippet sw/device/lib/crypto/include/datatypes.h otcrypto_hash_digest }}
 
-#### Message authentication data structures
-
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_kmac_mode }}
-
 #### RSA data structures
 
 {{#header-snippet sw/device/lib/crypto/include/rsa.h otcrypto_rsa_padding }}
@@ -157,8 +150,8 @@ The following data structures are considered implementation specific.
 The caller knows their size and must allocate space for them.
 However, they are essentially scratchpad space for the underlying implementation and should not be modified directly.
 
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_hash_context }}
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_hmac_context }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_context }}
+{{#header-snippet sw/device/lib/crypto/include/hmac.h otcrypto_hmac_context }}
 
 ## AES
 
@@ -190,23 +183,14 @@ In streaming mode, it is strongly recommended not to process the decrypted data
 
 #### GCM - Authenticated Encryption and Decryption
 
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_encrypt }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_decrypt }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_encrypt_init }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_decrypt_init }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_update_aad }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_update_encrypted_data }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_encrypt_final }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_gcm_decrypt_final }}
-
-### AES-KWP
-
-Key Wrap with Padding (KWP) mode is used for the protection of cryptographic keys.
-AES-KWP is specified in [NIST SP800-38F][kwp-spec].
-
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_kwp_wrapped_len }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_kwp_wrap }}
-{{#header-snippet sw/device/lib/crypto/include/aes.h otcrypto_aes_kwp_unwrap }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_encrypt }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_decrypt }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_encrypt_init }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_decrypt_init }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_update_aad }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_update_encrypted_data }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_encrypt_final }}
+{{#header-snippet sw/device/lib/crypto/include/aes_gcm.h otcrypto_aes_gcm_decrypt_final }}
 
 ## Hash functions
 
@@ -222,26 +206,30 @@ Note that hardware support for one-shot SHA-256 means that the one-shot version
 
 This mode is used when the entire data to be hashed is available upfront.
 
-This is a generic hash API where the required digest type and length is passed as an input parameter.
-The supported hash modes are SHA256, SHA384, SHA512, SHA3-224, SHA3-256, SHA3-384 and SHA3-512.
-
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_hash }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_256 }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_384 }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_512 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_sha3_224 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_sha3_256 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_sha3_384 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_sha3_512 }}
 
 The cryptolib supports the SHAKE and cSHAKE extendable-output functions, which can produce a varaible-sized digest.
 To avoid locking up the KMAC block, only a one-shot mode is supported.
 
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_xof_shake }}
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_xof_cshake }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_shake128 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_shake256 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_cshake128 }}
+{{#header-snippet sw/device/lib/crypto/include/sha3.h otcrypto_cshake256 }}
 
 ### Streaming mode
 
 The streaming mode API is used for incremental hashing, where the data to be hashed is split and passed in multiple blocks.
-Streaming is supported **only for SHA2** hash modes (SHA256, SHA384, SHA512), because these hash functions are implemented in software and their state can therefore be saved without locking up hardware blocks.
-Attempting to use the streaming API for SHA3 will result in an error.
+Streaming is supported **only for SHA2** hash modes (SHA256, SHA384, SHA512), because the SHA-3 hardware does not support saving and restoring a hash context.
 
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_hash_init }}
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_hash_update }}
-{{#header-snippet sw/device/lib/crypto/include/hash.h otcrypto_hash_final }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_init }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_update }}
+{{#header-snippet sw/device/lib/crypto/include/sha2.h otcrypto_sha2_final }}
 
 ## Message Authentication
 
@@ -254,8 +242,8 @@ The [KMAC block][kmac] supports KMAC128 and KMAC256, with a key length of 128, 1
 
 ### One-shot mode
 
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_hmac }}
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_kmac }}
+{{#header-snippet sw/device/lib/crypto/include/hmac.h otcrypto_hmac }}
+{{#header-snippet sw/device/lib/crypto/include/kmac.h otcrypto_kmac }}
 
 ### Streaming mode
 
@@ -263,9 +251,9 @@ The streaming mode API is used for incremental hashing use-case, where the data
 
 To avoid locking up the KMAC hardware, the streaming mode is supported **only for HMAC**.
 
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_hmac_init }}
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_hmac_update }}
-{{#header-snippet sw/device/lib/crypto/include/mac.h otcrypto_hmac_final }}
+{{#header-snippet sw/device/lib/crypto/include/hmac.h otcrypto_hmac_init }}
+{{#header-snippet sw/device/lib/crypto/include/hmac.h otcrypto_hmac_update }}
+{{#header-snippet sw/device/lib/crypto/include/hmac.h otcrypto_hmac_final }}
 
 ## RSA
 
@@ -334,7 +322,7 @@ All ECC operations may be run [asynchronously](#asynchronous-operations) through
 ### Supported Curves
 
 Elliptic curves of the short Weierstrass form, Montgomery form, and twisted Edward form are supported.
-- For short Weierstrass form three predefined named curves are supported (NIST P-256, NIST P-384 and brainpool 256) along with support for user-defined generic curves.
+- For short Weierstrass form, NIST P-256 and P-384 are supported.
 - For the Montgomery form, only X25519 is supported.
 - For twisted Edwards form only Ed25519 is supported.
 
@@ -367,68 +355,97 @@ The two curves are birationally equivalent, in mathematical terms, so it is poss
 
 For ECDSA, the cryptography library supports keypair generation, signing, and signature verification.
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_keygen }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_sign }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_verify }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_sign }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_sign_verify }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_verify }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_sign }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_sign_verify }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_verify }}
 
 #### ECDH
 
 For ECDH (elliptic-curve Diffie-Hellman) key exchange, the cryptography library supports keypair generation and shared-key generation.
 Each party should generate a key pair, exchange public keys, and then generate the shared key using their own private key and the other party's public key.
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh_keygen }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256 }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384 }}
 
 #### Ed25519
 
 For Ed25519 (a curve-specialized version of EdDSA, the Edwards curve digital signature algorithm), the cryptography library supports keypair generation, signature generation, and signature verification.
-There is **no need to specify curve parameters for Ed25519**, since it operates on a specific curve already.
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_keygen }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_sign }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_verify }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_sign }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_verify }}
 
 #### X25519
 
 For x25519 key exchange, the cryptography library supports keypair generation and shared-key generation.
 Each party should generate a key pair, exchange public keys, and then generate the shared key using their own private key and the other party's public key.
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519_keygen }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519 }}
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519_keygen }}
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519 }}
 
 ### ECC Asynchronous API
 
 #### ECDSA
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_keygen_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_keygen_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_sign_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_sign_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_verify_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdsa_verify_async_finalize }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_sign_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_sign_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_verify_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdsa_p256_verify_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_sign_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_sign_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_verify_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdsa_p384_verify_async_finalize }}
 
 #### ECDH
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh_keygen_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh_keygen_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ecdh_async_finalize }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p256.h otcrypto_ecdh_p256_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ecc_p384.h otcrypto_ecdh_p384_async_finalize }}
 
 #### Ed25519
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_keygen_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_keygen_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_sign_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_sign_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_verify_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_ed25519_verify_async_finalize }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_sign_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_sign_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_verify_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/ed25519.h otcrypto_ed25519_verify_async_finalize }}
 
 #### X25519
 
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519_keygen_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519_keygen_async_finalize }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519_async_start }}
-{{#header-snippet sw/device/lib/crypto/include/ecc.h otcrypto_x25519_async_finalize }}
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519_keygen_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519_keygen_async_finalize }}
+
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519_async_start }}
+{{#header-snippet sw/device/lib/crypto/include/x25519.h otcrypto_x25519_async_finalize }}
 
 ## Deterministic random bit generation
 
@@ -471,17 +488,19 @@ To learn more about PRFs, various key derivation mechanisms and security conside
 
 ### API
 
-#### KDF-CTR
+#### HKDF
 
-{{#header-snippet sw/device/lib/crypto/include/kdf.h otcrypto_kdf_hmac_ctr }}
-{{#header-snippet sw/device/lib/crypto/include/kdf.h otcrypto_kdf_kmac }}
+{{#header-snippet sw/device/lib/crypto/include/hkdf.h otcrypto_hkdf }}
+{{#header-snippet sw/device/lib/crypto/include/hkdf.h otcrypto_hkdf_extract }}
+{{#header-snippet sw/device/lib/crypto/include/hkdf.h otcrypto_hkdf_expand }}
 
+#### KDF-CTR
 
-#### HKDF
+{{#header-snippet sw/device/lib/crypto/include/kdf_ctr.h otcrypto_kdf_ctr_hmac }}
+
+#### KMAC-KDF
 
-{{#header-snippet sw/device/lib/crypto/include/kdf.h otcrypto_kdf_hkdf }}
-{{#header-snippet sw/device/lib/crypto/include/kdf.h otcrypto_kdf_hkdf_extract }}
-{{#header-snippet sw/device/lib/crypto/include/kdf.h otcrypto_kdf_hkdf_expand }}
+{{#header-snippet sw/device/lib/crypto/include/kmac_kdf.h otcrypto_kmac_kdf }}
 
 ## Key transport
 
@@ -501,6 +520,15 @@ See the [key data structures](#key-data-structures) section for more details.
 
 {{#header-snippet sw/device/lib/crypto/include/key_transport.h otcrypto_hw_backed_key }}
 
+### Wrap and unwrap keys
+
+Secret keys can be encrypted (e.g. for storage) using the key wrap/unwrap routines.
+We use AES Key Wrapping with Padding (KWP), which is specified in [NIST SP800-38F][kwp-spec].
+
+{{#header-snippet sw/device/lib/crypto/include/key_transport.h otcrypto_wrapped_key_len }}
+{{#header-snippet sw/device/lib/crypto/include/key_transport.h otcrypto_key_wrap }}
+{{#header-snippet sw/device/lib/crypto/include/key_transport.h otcrypto_key_unwrap }}
+
 ### Import Symmetric Keys
 
 {{#header-snippet sw/device/lib/crypto/include/key_transport.h otcrypto_import_blinded_key }}
diff --git a/hw/BUILD b/hw/BUILD
index c6b06081767c7..ee25f1da704f5 100644
--- a/hw/BUILD
+++ b/hw/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_pkg//pkg:mappings.bzl", "pkg_files")
+load("@rules_pkg//pkg:mappings.bzl", "pkg_attributes", "pkg_files")
 load("//rules:fusesoc.bzl", "fusesoc_build")
 
 # This configuration exposes fusesoc's "verilator_options" option to the
@@ -123,6 +123,7 @@ filegroup(
 pkg_files(
     name = "package",
     srcs = ["verilator_bin"],
+    attributes = pkg_attributes(mode = "0755"),
     prefix = "earlgrey/verilator",
     visibility = ["//visibility:public"],
 )
diff --git a/hw/bitstream/BUILD b/hw/bitstream/BUILD
index 383526c2d9297..c0d313228e583 100644
--- a/hw/bitstream/BUILD
+++ b/hw/bitstream/BUILD
@@ -70,25 +70,13 @@ filegroup(
 )
 
 filegroup(
-    name = "rom_mmi",
+    name = "cw310_mmi",
     testonly = True,
     srcs = select({
         "bitstream_skip": ["//hw/bitstream/universal:none"],
-        "bitstream_vivado": ["//hw/bitstream/vivado:rom_mmi"],
-        "bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_rom_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_rom_mmi"],
-    }),
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "otp_mmi",
-    testonly = True,
-    srcs = select({
-        "bitstream_skip": ["//hw/bitstream/universal:none"],
-        "bitstream_vivado": ["//hw/bitstream/vivado:otp_mmi"],
-        "bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_otp_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_otp_mmi"],
+        "bitstream_vivado": ["//hw/bitstream/vivado:cw310_mmi"],
+        "bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_mmi"],
+        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_mmi"],
     }),
     tags = ["manual"],
 )
@@ -99,7 +87,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/lib/testing/test_rom:test_rom_fpga_cw310_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":cw310_mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -109,7 +98,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/silicon_creator/rom:mask_rom_fpga_cw310_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":cw310_mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -121,7 +111,8 @@ bitstream_splice(
         testonly = True,
         src = ":mask_rom",
         data = img_target,
-        meminfo = ":otp_mmi",
+        instance = "otp",
+        meminfo = ":cw310_mmi",
         tags = ["manual"],
         update_usr_access = True,
     )
@@ -133,8 +124,7 @@ bitstream_fragment_from_manifest(
     name = "chip_earlgrey_cw310_cached_fragment",
     srcs = [
         "@bitstreams//:chip_earlgrey_cw310_bitstream",
-        "@bitstreams//:chip_earlgrey_cw310_otp_mmi",
-        "@bitstreams//:chip_earlgrey_cw310_rom_mmi",
+        "@bitstreams//:chip_earlgrey_cw310_mmi",
     ],
     design = "chip_earlgrey_cw310",
     manifest = "@bitstreams//:manifest",
@@ -155,8 +145,7 @@ bitstream_fragment_from_manifest(
     name = "chip_earlgrey_cw310_hyperdebug_cached_fragment",
     srcs = [
         "@bitstreams//:chip_earlgrey_cw310_hyperdebug_bitstream",
-        "@bitstreams//:chip_earlgrey_cw310_hyperdebug_otp_mmi",
-        "@bitstreams//:chip_earlgrey_cw310_hyperdebug_rom_mmi",
+        "@bitstreams//:chip_earlgrey_cw310_hyperdebug_mmi",
     ],
     design = "chip_earlgrey_cw310_hyperdebug",
     manifest = "@bitstreams//:manifest",
@@ -177,8 +166,7 @@ bitstream_fragment_from_manifest(
     name = "chip_earlgrey_cw340_cached_fragment",
     srcs = [
         "@bitstreams//:chip_earlgrey_cw340_bitstream",
-        "@bitstreams//:chip_earlgrey_cw340_otp_mmi",
-        "@bitstreams//:chip_earlgrey_cw340_rom_mmi",
+        "@bitstreams//:chip_earlgrey_cw340_mmi",
     ],
     design = "chip_earlgrey_cw340",
     manifest = "@bitstreams//:manifest",
diff --git a/hw/bitstream/README.md b/hw/bitstream/README.md
index 40452865e5031..597c99a1acd12 100644
--- a/hw/bitstream/README.md
+++ b/hw/bitstream/README.md
@@ -35,7 +35,7 @@ opentitan_test(
     name = "individualize_sw_cfg_functest",
     srcs = ["individualize_sw_cfg_functest.c"],
     fpga = fpga_params(
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_unlocked0_manuf_initialized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_initialized",
         tags = ["manuf"],
     ),
     exec_env = {
diff --git a/hw/bitstream/cw340/BUILD b/hw/bitstream/cw340/BUILD
index 9443eaf57edbc..9f68169329a80 100644
--- a/hw/bitstream/cw340/BUILD
+++ b/hw/bitstream/cw340/BUILD
@@ -25,25 +25,13 @@ filegroup(
 )
 
 filegroup(
-    name = "rom_mmi",
+    name = "mmi",
     testonly = True,
     srcs = select({
         "//hw/bitstream:bitstream_skip": ["//hw/bitstream/universal:none"],
-        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:fpga_cw340_rom_mmi"],
-        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw340_rom_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw340_rom_mmi"],
-    }),
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "otp_mmi",
-    testonly = True,
-    srcs = select({
-        "//hw/bitstream:bitstream_skip": ["//hw/bitstream/universal:none"],
-        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:fpga_cw340_otp_mmi"],
-        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw340_otp_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw340_otp_mmi"],
+        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:cw340_mmi"],
+        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw340_mmi"],
+        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw340_mmi"],
     }),
     tags = ["manual"],
 )
@@ -54,7 +42,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/lib/testing/test_rom:test_rom_fpga_cw340_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -65,7 +54,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/silicon_creator/rom:mask_rom_fpga_cw340_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -77,7 +67,8 @@ bitstream_splice(
         testonly = True,
         src = ":mask_rom",
         data = img_target,
-        meminfo = ":otp_mmi",
+        instance = "otp",
+        meminfo = ":mmi",
         tags = ["manual"],
         update_usr_access = True,
     )
diff --git a/hw/bitstream/hyperdebug/BUILD b/hw/bitstream/hyperdebug/BUILD
index fcbddeccf46bb..077205ef53baa 100644
--- a/hw/bitstream/hyperdebug/BUILD
+++ b/hw/bitstream/hyperdebug/BUILD
@@ -21,25 +21,13 @@ filegroup(
 )
 
 filegroup(
-    name = "rom_mmi",
+    name = "mmi",
     testonly = True,
     srcs = select({
         "//hw/bitstream:bitstream_skip": ["//hw/bitstream/universal:none"],
-        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:rom_mmi_hyp"],
-        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_rom_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_rom_mmi"],
-    }),
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "otp_mmi",
-    testonly = True,
-    srcs = select({
-        "//hw/bitstream:bitstream_skip": ["//hw/bitstream/universal:none"],
-        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:otp_mmi_hyp"],
-        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_otp_mmi"],
-        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_otp_mmi"],
+        "//hw/bitstream:bitstream_vivado": ["//hw/bitstream/vivado:cw310_hyperdebug_mmi"],
+        "//hw/bitstream:bitstream_gcp_splice": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_mmi"],
+        "//conditions:default": ["@bitstreams//:chip_earlgrey_cw310_hyperdebug_mmi"],
     }),
     tags = ["manual"],
 )
@@ -50,7 +38,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/lib/testing/test_rom:test_rom_fpga_cw310_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -61,7 +50,8 @@ bitstream_splice(
     testonly = True,
     src = ":bitstream",
     data = "//sw/device/silicon_creator/rom:mask_rom_fpga_cw310_scr_vmem",
-    meminfo = ":rom_mmi",
+    instance = "rom",
+    meminfo = ":mmi",
     tags = ["manual"],
     update_usr_access = True,
 )
@@ -73,7 +63,8 @@ bitstream_splice(
         testonly = True,
         src = ":mask_rom",
         data = img_target,
-        meminfo = ":otp_mmi",
+        instance = "otp",
+        meminfo = ":mmi",
         tags = ["manual"],
         update_usr_access = True,
     )
diff --git a/hw/bitstream/universal/BUILD b/hw/bitstream/universal/BUILD
index 8e73aade0069f..8670738b5d159 100644
--- a/hw/bitstream/universal/BUILD
+++ b/hw/bitstream/universal/BUILD
@@ -29,8 +29,8 @@ label_flag(
 universal_splice(
     name = "splice",
     testonly = True,
-    # When the src bitstream, rom_mmi and otp_mmi fields are empty,
-    # the rule will use values from the exec_env.
+    # When the src bitstream and mmi fields are empty, the rule will use values
+    # from the exec_env.
     exec_env = ":env",
     otp = ":otp",
     rom = ":rom",
diff --git a/hw/bitstream/vivado/BUILD b/hw/bitstream/vivado/BUILD
index 398fcd5e542da..bfe1e6e804af6 100644
--- a/hw/bitstream/vivado/BUILD
+++ b/hw/bitstream/vivado/BUILD
@@ -52,8 +52,8 @@ fusesoc_build(
     ],
     output_groups = {
         "bitstream": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"],
-        "rom_mmi": ["synth-vivado/rom.mmi"],
-        "otp_mmi": ["synth-vivado/otp.mmi"],
+        "mmi": ["synth-vivado/memories.mmi"],
+        "logs": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw310_0.1.runs/"],
     },
     systems = ["lowrisc:systems:chip_earlgrey_cw310"],
     tags = ["manual"],
@@ -69,18 +69,10 @@ filegroup(
 )
 
 filegroup(
-    name = "rom_mmi",
+    name = "cw310_mmi",
     testonly = True,
     srcs = [":fpga_cw310"],
-    output_group = "rom_mmi",
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "otp_mmi",
-    testonly = True,
-    srcs = [":fpga_cw310"],
-    output_group = "otp_mmi",
+    output_group = "mmi",
     tags = ["manual"],
 )
 
@@ -101,8 +93,8 @@ fusesoc_build(
     ],
     output_groups = {
         "bitstream": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw310_hyperdebug_0.1.bit"],
-        "rom_mmi": ["synth-vivado/rom.mmi"],
-        "otp_mmi": ["synth-vivado/otp.mmi"],
+        "mmi": ["synth-vivado/memories.mmi"],
+        "logs": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw310_hyperdebug_0.1.runs/"],
     },
     systems = ["lowrisc:systems:chip_earlgrey_cw310_hyperdebug"],
     tags = ["manual"],
@@ -118,18 +110,10 @@ filegroup(
 )
 
 filegroup(
-    name = "rom_mmi_hyp",
-    testonly = True,
-    srcs = [":fpga_cw310_hyperdebug"],
-    output_group = "rom_mmi",
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "otp_mmi_hyp",
+    name = "cw310_hyperdebug_mmi",
     testonly = True,
     srcs = [":fpga_cw310_hyperdebug"],
-    output_group = "otp_mmi",
+    output_group = "mmi",
     tags = ["manual"],
 )
 
@@ -150,8 +134,8 @@ fusesoc_build(
     ],
     output_groups = {
         "bitstream": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw340_0.1.bit"],
-        "rom_mmi": ["synth-vivado/rom.mmi"],
-        "otp_mmi": ["synth-vivado/otp.mmi"],
+        "mmi": ["synth-vivado/memories.mmi"],
+        "logs": ["synth-vivado/lowrisc_systems_chip_earlgrey_cw340_0.1.runs/"],
     },
     systems = ["lowrisc:systems:chip_earlgrey_cw340"],
     tags = ["manual"],
@@ -167,18 +151,10 @@ filegroup(
 )
 
 filegroup(
-    name = "fpga_cw340_rom_mmi",
+    name = "cw340_mmi",
     testonly = True,
     srcs = [":fpga_cw340"],
-    output_group = "rom_mmi",
-    tags = ["manual"],
-)
-
-filegroup(
-    name = "fpga_cw340_otp_mmi",
-    testonly = True,
-    srcs = [":fpga_cw340"],
-    output_group = "otp_mmi",
+    output_group = "mmi",
     tags = ["manual"],
 )
 
@@ -189,10 +165,17 @@ bitstream_manifest_fragment(
     srcs = [":fpga_cw310"],
     bitstream = "bitstream",
     design = "chip_earlgrey_cw310",
-    memory_maps = {
-        "rom_mmi": "rom",
-        "otp_mmi": "otp",
-    },
+    memories = [
+        "rom",
+        "otp",
+        "flash0_info0",
+        "flash0_info1",
+        "flash0_info2",
+        "flash1_info0",
+        "flash1_info1",
+        "flash1_info2",
+    ],
+    memory_map_file = ":cw310_mmi",
     tags = ["manual"],
 )
 
@@ -212,10 +195,17 @@ bitstream_manifest_fragment(
     srcs = [":fpga_cw310_hyperdebug"],
     bitstream = "bitstream",
     design = "chip_earlgrey_cw310_hyperdebug",
-    memory_maps = {
-        "rom_mmi": "rom",
-        "otp_mmi": "otp",
-    },
+    memories = [
+        "rom",
+        "otp",
+        "flash0_info0",
+        "flash0_info1",
+        "flash0_info2",
+        "flash1_info0",
+        "flash1_info1",
+        "flash1_info2",
+    ],
+    memory_map_file = ":cw310_hyperdebug_mmi",
     tags = ["manual"],
 )
 
@@ -235,10 +225,17 @@ bitstream_manifest_fragment(
     srcs = [":fpga_cw340"],
     bitstream = "bitstream",
     design = "chip_earlgrey_cw340",
-    memory_maps = {
-        "rom_mmi": "rom",
-        "otp_mmi": "otp",
-    },
+    memories = [
+        "rom",
+        "otp",
+        "flash0_info0",
+        "flash0_info1",
+        "flash0_info2",
+        "flash1_info0",
+        "flash1_info1",
+        "flash1_info2",
+    ],
+    memory_map_file = ":cw340_mmi",
     tags = ["manual"],
 )
 
@@ -257,9 +254,8 @@ pkg_files(
     name = "standard",
     testonly = True,
     srcs = [
+        ":cw310_mmi",
         ":fpga_cw310_test_rom",
-        ":otp_mmi",
-        ":rom_mmi",
     ],
     prefix = "earlgrey/fpga_cw310/standard",
     tags = ["manual"],
@@ -269,9 +265,8 @@ pkg_files(
     name = "hyperdebug",
     testonly = True,
     srcs = [
+        ":cw310_hyperdebug_mmi",
         ":fpga_cw310_test_rom_hyp",
-        ":otp_mmi_hyp",
-        ":rom_mmi_hyp",
     ],
     prefix = "earlgrey/fpga_cw310/hyperdebug",
     tags = ["manual"],
diff --git a/hw/cdc/tools/dvsim/common_cdc_cfg.hjson b/hw/cdc/tools/dvsim/common_cdc_cfg.hjson
index 49c255a9b4c1f..7979e93d6cae2 100644
--- a/hw/cdc/tools/dvsim/common_cdc_cfg.hjson
+++ b/hw/cdc/tools/dvsim/common_cdc_cfg.hjson
@@ -16,7 +16,7 @@
   build_dir:        "{scratch_path}/{build_mode}"
   build_log:        "{build_dir}/cdc.log"
 
-  tool:             "verixcdc"
+  tool:             "meridiancdc"
 
   // We rely on Fusesoc to generate the file list for us
   sv_flist_gen_cmd:   "fusesoc"
diff --git a/hw/cdc/tools/dvsim/meridiancdc.hjson b/hw/cdc/tools/dvsim/meridiancdc.hjson
new file mode 100644
index 0000000000000..3504516091cfb
--- /dev/null
+++ b/hw/cdc/tools/dvsim/meridiancdc.hjson
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  // Environment variables that are needed in the CDC script
+  exports: [
+    { CONSTRAINT:          "{sdc_file}" }
+    { FOUNDRY_CONSTRAINT:  "{foundry_sdc_file}" }
+    { CDC_WAIVER_FILE:     "{cdc_waiver_file}" }
+    { ENV_FILE:            "{cdc_env_file}" }
+  ]
+
+  // Tool invocation
+  build_cmd:  "{job_prefix} mcdc "
+  build_opts: ["-i {cdc_root}/tools/{tool}/run-cdc.tcl"]
+
+  // CDC-specific report parsing script that is called after running the tool
+  // TODO(#24207): Implement this for MeridianCDC, then uncomment the lines below.
+  // report_cmd: "{proj_root}/util/dvsim/{tool}-report-parser.py"
+  // report_opts: ["--repdir {build_dir} ",
+  //               "--outfile {build_dir}/results.hjson"]
+}
diff --git a/hw/cdc/tools/dvsim/verixcdc.hjson b/hw/cdc/tools/dvsim/verixcdc.hjson
deleted file mode 100644
index 4634bcbebfa98..0000000000000
--- a/hw/cdc/tools/dvsim/verixcdc.hjson
+++ /dev/null
@@ -1,23 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-{
-  // Environment variables that are needed in the CDC script
-  exports: [
-    { CONSTRAINT:         "{sdc_file}" },
-    { FOUNDRY_CONSTRAINT: "{foundry_sdc_file}" },
-    { CDC_WAIVER_FILE:    "{cdc_waiver_file}" },
-    { ENV_FILE:           "{env_file}" },
-    { USER_ENV_FILE:      "{cdc_user_env}" },
-    { AST_LIB:            "{ast_lib}" },
-  ]
-
-  // Tool invocation
-  build_cmd:  "{job_prefix} vcdc "
-  build_opts: ["-i {cdc_root}/tools/{tool}/run-cdc.tcl"]
-
-  // CDC-specific results parsing script that is called after running the tool
-  report_cmd: "{proj_root}/util/dvsim/{tool}-report-parser.py"
-  report_opts: ["--repdir {build_dir} ",
-                "--outfile {build_dir}/results.hjson"]
-}
diff --git a/hw/cdc/tools/meridiancdc/run-cdc.tcl b/hw/cdc/tools/meridiancdc/run-cdc.tcl
new file mode 100644
index 0000000000000..c0832c1638053
--- /dev/null
+++ b/hw/cdc/tools/meridiancdc/run-cdc.tcl
@@ -0,0 +1,112 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Script to run MeridianCDC analysis (specific to OpenTitan but independent of the top-level design)
+
+proc get_env_var {name} {
+  if {[info exists ::env($name)]} {
+    set val "[set ::env([set name])]"
+    puts "::env($name) = $val"
+    return $val
+  } else {
+    puts "ERROR: Script run without $name environment variable."
+    quit
+  }
+}
+
+set FOUNDRY_ROOT        ""
+set SV_FLIST            [get_env_var "SV_FLIST"]
+set BUILD_DIR           [get_env_var "BUILD_DIR"]
+set DUT                 [get_env_var "DUT"]
+set CONSTRAINT          [get_env_var "CONSTRAINT"]
+set PARAMS              [get_env_var "PARAMS"]
+set CDC_WAIVER_FILE     [get_env_var "CDC_WAIVER_FILE"]
+set CDC_WAIVER_DIR      [file dirname $CDC_WAIVER_FILE]
+set ENV_FILE            [get_env_var "ENV_FILE"]
+
+# Used to disable some SDC constructs that are not needed by CDC.
+set IS_CDC_RUN 1
+
+# TODO(#24208): Increasing the `ri_max_total_range_bits` setting as below can help removing
+# black-box expressions, but it requires > 256 GiB of RAM, which is probably not available on
+# typical workstations.  We might want to enable this based on an environment variable.
+# set ri_max_total_range_bits 20
+
+# Analyze RTL code.
+set DEFINE ""
+if {$DEFINE != ""} {
+  analyze -sverilog +define+${DEFINE} -f ${SV_FLIST}
+} else {
+  analyze -sverilog -f ${SV_FLIST}
+}
+
+# Black-boxing prim_clock_div, prim_clock_gating, and prim_flash because each of them has a
+# tech-specific implementation, so analyzing RTL that won't be used on the chip is meaningless and
+# without this black box, MeridianCDC reports conflicts between how the design drives derived clocks
+# and how derived clocks are specified in the SDC.
+# TODO(#24208): ast_clks_byp should not be black-boxed, however.
+set BLACK_BOX_MODULES [list \
+  ast_clks_byp \
+  prim_clock_div \
+  prim_clock_gating \
+  prim_flash \
+]
+
+# Elaborate design.
+if {$PARAMS != ""} {
+  elaborate -params "$PARAMS" -black_box $BLACK_BOX_MODULES $DUT
+} else {
+  elaborate -black_box $BLACK_BOX_MODULES $DUT
+}
+
+# Define clock and reset synchronizer modules.
+set_user_cntl_synchronizer -name ot_cntl_synchronizer prim_flop_2sync
+set_user_reset_synchronizer -name ot_reset_synchronizer prim_rst_sync
+
+# Create and load ENV file from SDC.
+create_scenario { sdc env }
+set envs env_from_public_sdc.env
+read_sdc -scenario sdc -output_env $envs $CONSTRAINT
+current_scenario env
+read_env $envs
+
+# Create and load OpenTitan generic ENV file.
+set OT_ENV_FILE tmp.ot.env
+catch {rm $OT_ENV_FILE}
+set outfile [open $OT_ENV_FILE w]
+## For `prim_fifo_async`, derive clock domain of `rdata_o` from `rvalid_o`.
+puts $outfile "set_data_clock_domain rdata_o -module prim_fifo_async -derived_from rvalid_o"
+close $outfile
+read_env $OT_ENV_FILE
+
+# Load design-specific ENV file.
+touch $ENV_FILE
+read_env $ENV_FILE
+
+# Analyze the intents of the design.
+analyze_intent
+
+# Create directory for reports (if it doesn't exist already).
+set REPORT_DIR reports
+file mkdir $REPORT_DIR
+
+# Report setup check results.
+report_policy {ALL} -verbose -output $REPORT_DIR/setup_checks.rpt
+
+# Run CDC verification.
+verify_cdc
+
+# Load CDC waiver file.
+if {[string length $CDC_WAIVER_FILE] != 0} {
+  source $CDC_WAIVER_FILE
+}
+
+# Report CDC results.
+report_policy {ALL} -skip_empty_summary_status -verbose -output $REPORT_DIR/cdc.rpt
+report_policy {NEW} -skip_empty_summary_status -verbose -output $REPORT_DIR/cdc.new.rpt
+report_policy {WAIVED} -skip_empty_summary_status -verbose -output $REPORT_DIR/cdc.waived.rpt
+
+# Report clock domains.
+report_clock_domains -flops -output $REPORT_DIR/clocks.flops.rpt
+report_clock_matrix -output $REPORT_DIR/clocks.matrix.rpt
diff --git a/hw/cdc/tools/verixcdc/run-cdc.tcl b/hw/cdc/tools/verixcdc/run-cdc.tcl
deleted file mode 100644
index bd5a54474128b..0000000000000
--- a/hw/cdc/tools/verixcdc/run-cdc.tcl
+++ /dev/null
@@ -1,237 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-#####################
-##  PREPARE FLOW   ##
-#####################
-
-proc get_env_var {name} {
-  if {[info exists ::env($name)]} {
-    set val "[set ::env([set name])]"
-    puts "::env($name) = $val"
-    return $val
-  } else {
-    puts "ERROR: Script run without $name environment variable."
-    quit
-  }
-}
-
-set FOUNDRY_ROOT       [get_env_var "FOUNDRY_ROOT"]
-set SV_FLIST           [get_env_var "SV_FLIST"]
-set BUILD_DIR          [get_env_var "BUILD_DIR"]
-set DUT                [get_env_var "DUT"]
-set CONSTRAINT         [get_env_var "CONSTRAINT"]
-set FOUNDRY_CONSTRAINT [get_env_var "FOUNDRY_CONSTRAINT"]
-set PARAMS             [get_env_var "PARAMS"]
-set CDC_WAIVER_FILE    [get_env_var "CDC_WAIVER_FILE"]
-set CDC_WAIVER_DIR     [file dirname $CDC_WAIVER_FILE]
-set ENV_FILE           [get_env_var "ENV_FILE"]
-set USER_ENV_FILE      [get_env_var "USER_ENV_FILE"]
-set AST_LIB            [get_env_var "AST_LIB"]
-
-# Used to disable some SDC constructs that are not needed by CDC.
-set IS_CDC_RUN 1
-
-########################
-## Library Setup      ##
-########################
-
-# if the foundry root is specified, some more library setup is needed.
-if {$FOUNDRY_ROOT != ""} {
-  # TODO: add lib setup tcl file here
-  # this PRIM_DEFAULT_IMPL selects the appropriate technology by defining
-  # PRIM_DEFAULT_IMPL=prim_pkg::Impl<tech identifier>
-  # PRIM_DEFAULT_IMPL is set inside the library setup script
-  set DEFINE "PRIM_DEFAULT_IMPL=${PRIM_DEFAULT_IMPL}+${PRIM_STD_CELL_VARIANT}"
-  source "${FOUNDRY_ROOT}/cdc/verixcdc/setup.tcl"
-} else {
-  set DEFINE ""
-}
-
-########################
-## Configure CDC Tool ##
-########################
-
-# TODO: potentially more settings are needed.
-# set ri_enable_sva false
-set ri_create_outputs_in_create_env true
-set ri_print_module_nand2_counts true
-# enable analysis of large arrays
-set ri_max_total_range_bits 20
-set ri_prefer_liberty true
-
-############################
-## Apply Liberty File ##
-
-read_liberty $AST_LIB -db_dir ./RI_compiled_libs/verix_libs
-############################
-
-#########################
-## Analyze & Elaborate ##
-#########################
-
-if {$DEFINE != ""} {
-  analyze -sverilog +define+${DEFINE}  -f ${SV_FLIST}
-} else {
-  analyze -sverilog   -f ${SV_FLIST}
-}
-
-# TODO(#13197): two flops are accessing the same memory cells
-# prim_generic_ram_2p is not recognized as a CDC module by the tool
-# So, it's black-boxed while waiting for a tool patch
-if {$PARAMS != ""} {
-  elaborate -params "$PARAMS" $DUT -black_box prim_generic_ram_2p
-} else {
-  elaborate $DUT -black_box prim_generic_ram_2p
-}
-#################################
-## Define Common Synchronizers ##
-#################################
-
-# Glitch Free Mux
-# WARNING!!! prim_clock_mux2 is not a glitch free mux
-#set_user_glitch_free_muxes -name opentitan_clock_mux prim_generic_clock_mux2
-#set_user_glitch_free_muxes -name opentitan_glitchfree_mux prim_generic_clock_glitchfree_mux2
-
-# 2FF synchronizer.
-# TODO: Process dependent module name later
-set prim_2ff_modules {}
-
-# Find every derivated modules from 2FF synchronizer
-foreach mod [get_all_modules prim_flop_2sync] {
-  lappend prim_2ff_modules $mod
-  puts "Adding to list prim_2ff_modules: $mod"
-}
-
-set_user_cntl_synchronizer -name opentitan_2ff $prim_2ff_modules
-
-# Pulse synchronizer
-
-# Req/Ack synchronizer
-
-#########################
-## Apply Constraints   ##
-#########################
-
-#read_sdc $CONSTRAINT
-create_scenario {sdc env}
-current_scenario sdc
-read_sdc  $CONSTRAINT  -output_env constraints.sdc.env
-current_scenario env
-read_env constraints.sdc.env
-touch $USER_ENV_FILE
-read_env $USER_ENV_FILE
-
-# RI's recommended approach to filter out unnecessary errors on async_fifo
-catch {rm tmp.env}
-set outfile [open tmp.env  w]
-puts $outfile "set_data_clock_domain rdata_o -module prim_fifo_async -derived_from rvalid_o"
-# TODO: These should not be hardcoded here, instead, we need to create another variable called CDC_CONSTRAINT
-# where a top could specifically supply this
-puts $outfile "set_stable {{top_earlgrey.u_pinmux_aon.mio_oe_retreg_q[46:0]}}"
-puts $outfile "set_stable {{top_earlgrey.u_pinmux_aon.dio_out_retreg_q[15:0]}}"
-# TODO: Check why the original script sets these constraints.
-# This is commented out because it creates setup errors.
-# puts $outfile "set_clock_sense -stop_propagation -clocks { AST_EXT_CLK } { u_ast.clk_ast_ext_i }"
-
-close $outfile
-read_env tmp.env
-
-if {$FOUNDRY_CONSTRAINT != ""} {
-  read_sdc $FOUNDRY_CONSTRAINT
-}
-
-############################
-## Apply Environment File ##
-############################
-
-if {$ENV_FILE != ""} {
-  read_env $ENV_FILE
-}
-
-#########################
-## Run CDC             ##
-#########################
-
-#analyze_intent
-analyze_intent -disable_auto_intent_generation
-report_policy {ALL} -output setup_checks.rpt -compat -verbose
-
-verify_cdc
-
-#########################
-## Top Modules         ##
-#########################
-# TODO: modules are used after elaboration. If a module is instantiated
-# multiple times, the module name should be uniquified name.
-# Due to this, uart, i2c, spi_host reports are not correct.
-set modules {
-  spi_device
-  kmac
-  hmac
-  uart
-  gpio
-  spi_host
-  flash_ctrl
-  alert_handler
-  otp_ctrl
-  lc_ctrl
-  pwrmgr
-  clkmgr
-  rstmgr
-  keymgr
-  csrng
-  entropy_src
-  aes
-  rom_ctrl
-  edn
-}
-
-#########################
-## Read in Waivers     ##
-#########################
-
-source $CDC_WAIVER_FILE
-
-#########################
-## Write out report    ##
-#########################
-
-report_policy -verbose -skip_empty_summary_status -compat -output vcdc.rpt ALL
-
-file mkdir ../REPORT/
-
-foreach mod $modules {
-  # Find unique modules
-  set umods [get_all_modules $mod]
-  set umods_length [llength $umods]
-
-  puts "Generating Policy Reports for $mod ( $umods ) ..."
-
-  if {$umods_length == 1} {
-    # Just report as original module
-    report_policy -verbose -skip_empty_summary_status -compat   \
-      -output ../REPORT/vcdc.$mod.rpt -module [lindex $umods 0] \
-      {NEW TO_BE_FIXED DEFERRED}
-  } else {
-    # Report file name is increamental index not uniquified module name
-    set idx 0
-    foreach umod $umods {
-      report_policy -verbose -skip_empty_summary_status -compat \
-        -output ../REPORT/vcdc.$mod_$idx.rpt -module $umod      \
-        {NEW TO_BE_FIXED DEFERRED}
-      incr idx 1
-    }
-  }
-}
-
-# Report waived in a separate file
-report_policy -verbose -skip_empty_summary_status -compat -output ../REPORT/vcdc.new.rpt {NEW}
-report_policy -verbose -skip_empty_summary_status -compat -output ../REPORT/vcdc.waived.rpt {WAIVED}
-
-# report_messages -output verix_cdc.rpt
-
-# Clock report
-report_clock_domains -flops -output ../REPORT/clocks.flops.rpt
-report_clock_matrix -output ../REPORT/clocks.matrix.rpt
diff --git a/hw/dv/dpi/uartdpi/uartdpi.c b/hw/dv/dpi/uartdpi/uartdpi.c
index 1c9ebf328c93c..48ed73227a7a8 100644
--- a/hw/dv/dpi/uartdpi/uartdpi.c
+++ b/hw/dv/dpi/uartdpi/uartdpi.c
@@ -2,6 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+// The code below uses cfmakeraw, which comes from unistd.h. With glibc, it is
+// only provided if the _DEFAULT_SOURCE feature test macro is defined (because
+// it came from BSD in the first place, so needs pulling in explicitly).
+#define _DEFAULT_SOURCE
+
 #include "uartdpi.h"
 
 #ifdef __linux__
@@ -36,11 +41,17 @@ void *uartdpi_create(const char *name, const char *log_file_path) {
   int rv;
 
   // Initialize UART pseudo-terminal
+  rv = openpty(&ctx->host, &ctx->device, 0, 0, 0);
+  assert(rv == 0 && "failed to open pty for uart");
+
+  // Customise the slave side of the uart pseudo-terminal to be in "raw mode",
+  // using the BSD cfmakeraw function.
   struct termios tty;
+  rv = tcgetattr(ctx->device, &tty);
+  assert(rv == 0 && "failed to get device terminal attrs");
   cfmakeraw(&tty);
-
-  rv = openpty(&ctx->host, &ctx->device, 0, &tty, 0);
-  assert(rv != -1);
+  rv = tcsetattr(ctx->device, TCSANOW, &tty);
+  assert(rv == 0 && "failed to set new device terminal attrs");
 
   rv = ttyname_r(ctx->device, ctx->ptyname, 64);
   assert(rv == 0 && "ttyname_r failed");
diff --git a/hw/dv/dpi/usbdpi/usb_monitor.c b/hw/dv/dpi/usbdpi/usb_monitor.c
index d6d40f36cb66c..fd8195492d022 100644
--- a/hw/dv/dpi/usbdpi/usb_monitor.c
+++ b/hw/dv/dpi/usbdpi/usb_monitor.c
@@ -103,7 +103,7 @@ usb_monitor_ctx_t *usb_monitor_init(const char *filename,
   }
 
   // more useful for tail -f
-  setlinebuf(mon->file);
+  setvbuf(mon->file, NULL, _IOLBF, 0);
   printf(
       "\nUSBDPI: Monitor output file created at %s. Works well with tail:\n"
       "$ tail -f %s\n",
diff --git a/hw/dv/sv/alert_esc_agent/alert_esc_if.sv b/hw/dv/sv/alert_esc_agent/alert_esc_if.sv
index b942f0cdc5a9b..703df9ca6dd7e 100644
--- a/hw/dv/sv/alert_esc_agent/alert_esc_if.sv
+++ b/hw/dv/sv/alert_esc_agent/alert_esc_if.sv
@@ -181,7 +181,7 @@ interface alert_esc_if(input clk, input rst_n);
   endtask : wait_esc_ping
 
   logic alert_sva_active;
-  always_comb alert_sva_active = is_alert && !rst_n;
+  always_comb alert_sva_active = is_alert && rst_n;
 
   // Check the differential alert signals have no unknown values.
   `ASSERT_KNOWN(PingKnown_A, alert_rx.ping_p ^ alert_rx.ping_n, clk, !alert_sva_active)
diff --git a/hw/dv/sv/csr_utils/csr_utils_pkg.sv b/hw/dv/sv/csr_utils/csr_utils_pkg.sv
index 7eb6d0e660df4..2f78a3d5fe345 100644
--- a/hw/dv/sv/csr_utils/csr_utils_pkg.sv
+++ b/hw/dv/sv/csr_utils/csr_utils_pkg.sv
@@ -348,16 +348,6 @@ package csr_utils_pkg;
       status = UVM_IS_OK;
       return;
     end
-
-    // If we are under reset then we want to respond instantly with a bad return value and
-    // UVM_NOT_OK, rather than blocking indefinitely on the bus.
-    if (under_reset) begin
-      `uvm_info(msg_id, "Early-exit from csr_rd_sub because we are in reset", UVM_LOW)
-      value = '1;
-      status = UVM_NOT_OK;
-      return;
-    end
-
     fork
       begin : isolation_fork
         csr_field_t   csr_or_fld;
diff --git a/hw/dv/sv/csrng_agent/csrng_agent_cov.sv b/hw/dv/sv/csrng_agent/csrng_agent_cov.sv
index f3db7c4db8f5f..dddc3da9189bf 100644
--- a/hw/dv/sv/csrng_agent/csrng_agent_cov.sv
+++ b/hw/dv/sv/csrng_agent/csrng_agent_cov.sv
@@ -10,14 +10,15 @@
 
 `define CSRNG_STS_COVBIN \
     csrng_sts: coverpoint sts { \
-      bins pass = {0}; \
-      bins fail = {1}; \
+    bins pass =  {CMD_STS_SUCCESS}; \
+    bins fail = {CMD_STS_INVALID_ACMD, CMD_STS_INVALID_GEN_CMD, \
+                 CMD_STS_INVALID_CMD_SEQ, CMD_STS_RESEED_CNT_EXCEEDED}; \
     }
 
 // covergroups
 // Depends on whether the agent is device or host mode, the "csrng_cmd_cp" are slightly different:
 // In device mode: acmd INV, GENB, GENU are in the illegal bin.
-covergroup device_cmd_cg with function sample(csrng_item item, bit sts);
+covergroup device_cmd_cg with function sample(csrng_item item, csrng_cmd_sts_e sts);
   option.name         = "csrng_device_cmd_cg";
   option.per_instance = 1;
 
@@ -39,8 +40,9 @@ covergroup device_cmd_cg with function sample(csrng_item item, bit sts);
     bins mubi_false = {MuBi4False};
   }
   csrng_sts: coverpoint sts {
-    bins pass = {0};
-    bins fail = {1};
+    bins pass = {CMD_STS_SUCCESS};
+    bins fail = {CMD_STS_INVALID_ACMD, CMD_STS_INVALID_GEN_CMD,
+                 CMD_STS_INVALID_CMD_SEQ, CMD_STS_RESEED_CNT_EXCEEDED};
   }
 
   csrng_cmd_cross: cross csrng_cmd_cp, csrng_clen_cp, csrng_sts, csrng_flag_cp {
@@ -49,7 +51,7 @@ covergroup device_cmd_cg with function sample(csrng_item item, bit sts);
   }
 endgroup
 
-covergroup host_cmd_cg with function sample(csrng_item item, bit sts);
+covergroup host_cmd_cg with function sample(csrng_item item, csrng_cmd_sts_e sts);
   option.name         = "csrng_host_cmd_cg";
   option.per_instance = 1;
 
@@ -74,8 +76,9 @@ covergroup host_cmd_cg with function sample(csrng_item item, bit sts);
     bins mubi_false = {MuBi4False};
   }
   csrng_sts: coverpoint sts {
-    bins pass = {0};
-    bins fail = {1};
+    bins pass = {CMD_STS_SUCCESS};
+    bins fail = {CMD_STS_INVALID_ACMD, CMD_STS_INVALID_GEN_CMD,
+                 CMD_STS_INVALID_CMD_SEQ, CMD_STS_RESEED_CNT_EXCEEDED};
   }
 
   csrng_cmd_clen_flag_cross: cross csrng_cmd_cp, csrng_clen_cp, csrng_flag_cp;
@@ -83,10 +86,9 @@ covergroup host_cmd_cg with function sample(csrng_item item, bit sts);
   csrng_cmd_clen_flag_sts_cross: cross csrng_cmd_cp, csrng_clen_cp, csrng_flag_cp, csrng_sts {
     // Illegal commands (INV, GENB, GENU) don't get a response, thus don't have a status.
     ignore_bins illegal_cmds = binsof(csrng_cmd_cp) intersect {INV, GENB, GENU};
-    // All legal commands get a response, and the status must be OK.  Legal commands with an error
-    // status are thus illegal.
-    illegal_bins legal_cmds_with_error_sts = !binsof(csrng_cmd_cp) intersect {INV, GENB, GENU}
-                                             with (csrng_sts);
+    // Ignore status error responses for legal commands.
+    ignore_bins legal_cmds_with_error_sts = !binsof(csrng_cmd_cp) intersect {INV, GENB, GENU} &&
+                                            !binsof(csrng_sts) intersect {CMD_STS_SUCCESS};
   }
 
 endgroup
@@ -95,7 +97,7 @@ endgroup
 // different:
 // In device mode: csrng agent can drive `sts` to pass or fail randomly.
 // In host mode: DUT will also return pass for genbits data.
-covergroup device_genbits_cg with function sample(csrng_item item, bit sts);
+covergroup device_genbits_cg with function sample(csrng_item item, csrng_cmd_sts_e sts);
   option.name         = "csrng_device_genbits_cg";
   option.per_instance = 1;
 
@@ -105,7 +107,7 @@ covergroup device_genbits_cg with function sample(csrng_item item, bit sts);
   csrng_genbits_cross: cross csrng_glen, csrng_sts;
 endgroup
 
-covergroup host_genbits_cg with function sample(csrng_item item, bit sts);
+covergroup host_genbits_cg with function sample(csrng_item item, csrng_cmd_sts_e sts);
   option.name         = "csrng_host_genbits_cg";
   option.per_instance = 1;
 
@@ -114,7 +116,7 @@ covergroup host_genbits_cg with function sample(csrng_item item, bit sts);
 
   csrng_genbits_cross: cross csrng_glen, csrng_sts {
     // Generate may not return fail as status.
-    illegal_bins sts_fail = binsof(csrng_sts) intersect {1};
+    ignore_bins sts_fail = binsof(csrng_sts.fail);
   }
 endgroup
 
@@ -139,7 +141,7 @@ class csrng_agent_cov extends dv_base_agent_cov#(csrng_agent_cfg);
     end
   endfunction
 
-  function void sample_csrng_cmds(csrng_item item, bit sts);
+  function void sample_csrng_cmds(csrng_item item, csrng_cmd_sts_e sts);
     if (cfg.if_mode == dv_utils_pkg::Device) begin
       m_device_cmd_cg.sample(item, cfg.vif.cmd_rsp.csrng_rsp_sts);
       if (item.acmd == csrng_pkg::GEN) begin
diff --git a/hw/dv/sv/jtag_agent/jtag_driver.sv b/hw/dv/sv/jtag_agent/jtag_driver.sv
index 11a6877812240..d62b394505ef1 100644
--- a/hw/dv/sv/jtag_agent/jtag_driver.sv
+++ b/hw/dv/sv/jtag_agent/jtag_driver.sv
@@ -109,46 +109,36 @@ class jtag_driver extends dv_base_driver #(jtag_item, jtag_agent_cfg);
     `DV_CHECK_FATAL(cfg.if_mode == Host, "Only Host mode is supported", "jtag_driver")
 
     forever begin
-      // Wait until we either go into reset or we get an item to drive.
-      fork : isolation_fork
-        begin
-          fork
-            wait (! cfg.vif.trst_n);
-            seq_item_port.get_next_item(req);
-          join_any
-          disable fork;
-        end
-      join
+      // Read seq_item_port to get items to drive
+      seq_item_port.get_next_item(req);
 
-      if (!cfg.vif.trst_n) begin
-        @(posedge cfg.vif.trst_n);
-      end else begin
-        // Since trst_n is not 0, the get_next_item() task must have completed and has written the
-        // request to req
-        $cast(rsp, req.clone());
-        rsp.set_id_info(req);
+      $cast(rsp, req.clone());
+      rsp.set_id_info(req);
 
+      // If we're not currently in reset then we should actually drive the item (with tck enabled).
+      // Monitor the trst_n signal the whole time. If it becomes low, we immediately stop whatever
+      // we were doing.
+      enable_tck();
+      `DV_SPINWAIT_EXIT(
         // When we start an iteration of this loop, we always expect to either be in the
         // Run-Test/Idle FSM state (the normal situation) or in Test-Logic-Reset (which happens
         // after a test reset).
         //
         // Send a TCK cycle with tms=0. If we were in Run-Test/Idle, this is a no-op. If we were in
         // Test-Logic-Reset, this steps to Run-Test/Idle. As a side-effect, this also lines us up
-        // again with the negedge of tck.
-        enable_tck();
+        // again with the negedge of tck. Drop out early if trst_n goes low.
         cfg.vif.tms <= 1'b0;
         @(posedge cfg.vif.tck);
         @(`HOST_CB);
-        release_tck();
+        // Now drive the JTAG request itself.
+        drive_jtag_req(req, rsp);,
 
-        `uvm_info(`gfn, req.sprint(uvm_default_line_printer), UVM_HIGH)
-        `DV_SPINWAIT_EXIT(drive_jtag_req(req, rsp);,
-                          wait (!cfg.vif.trst_n);)
+        wait (!cfg.vif.trst_n);)
+      release_tck();
 
-        // Mark the item as having been handled. This passes the response (rsp) back to the
-        // sequencer, and also pops the request that we have been handling.
-        seq_item_port.item_done(rsp);
-      end
+      // Mark the item as having been handled. This passes the response (rsp) back to the
+      // sequencer, and also pops the request that we have been handling.
+      seq_item_port.item_done(rsp);
     end
   endtask
 
@@ -197,7 +187,9 @@ class jtag_driver extends dv_base_driver #(jtag_item, jtag_agent_cfg);
 
   // drive jtag req and retrieve rsp
   virtual task drive_jtag_req(jtag_item req, jtag_item rsp);
-    enable_tck();
+    // This task should only be called in situations where tck is already enabled.
+    `DV_CHECK_FATAL(tck_in_use)
+
     if (req.reset_tap_fsm) begin
       drive_jtag_test_logic_reset();
     end
@@ -230,7 +222,6 @@ class jtag_driver extends dv_base_driver #(jtag_item, jtag_agent_cfg);
                     req.dr_pause_cycle,
                     req.exit_to_rti_dr);
     end
-    release_tck();
   endtask
 
   task drive_jtag_ir(int len,
diff --git a/hw/dv/sv/jtag_agent/jtag_if.sv b/hw/dv/sv/jtag_agent/jtag_if.sv
index 589f155b37a4c..db933707a0d54 100644
--- a/hw/dv/sv/jtag_agent/jtag_if.sv
+++ b/hw/dv/sv/jtag_agent/jtag_if.sv
@@ -2,8 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-// jtag interface with default 50MHz tck
-interface jtag_if #(parameter int unsigned JtagDefaultTckPeriodPs = 20_000) ();
+// TODO(#24580): A JTAG UVM agent should configure the JTAG frequency (and not this interface)
+`ifdef GATE_LEVEL
+  // jtag interface with default 24MHz tck for GLS
+  interface jtag_if #(parameter int unsigned JtagDefaultTckPeriodPs = 41_664) ();
+`else
+  // jtag interface with default 50MHz tck for faster DV simulations
+  interface jtag_if #(parameter int unsigned JtagDefaultTckPeriodPs = 20_000) ();
+`endif
 
   // interface pins
   // TODO; make these wires and add `_oe` versions to internally control the driving of these
diff --git a/hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv b/hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
index c3354bb7436cf..e11e3468590f9 100644
--- a/hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
+++ b/hw/dv/sv/mem_bkdr_util/mem_bkdr_util.sv
@@ -57,13 +57,18 @@ class mem_bkdr_util extends uvm_object;
   event readmemh_event;
   event writememh_event;
 
+  // Number of PRINCE half rounds for scrambling, can be [1..5].
+  protected int num_prince_rounds_half;
+
   // Initialize the class instance.
   // `extra_bits_per_subword` is the width any additional metadata that is not captured in secded
   // package.
   function new(string name = "", string path, int unsigned depth,
                longint unsigned n_bits, err_detection_e err_detection_scheme,
+               int num_prince_rounds_half = 3,
                int extra_bits_per_subword = 0, int unsigned system_base_addr = 0);
 
+
     bit res;
     super.new(name);
     `DV_CHECK_FATAL(!(n_bits % depth), "n_bits must be divisible by depth.")
@@ -74,6 +79,7 @@ class mem_bkdr_util extends uvm_object;
     this.depth = depth;
     this.width = n_bits / depth;
     this.err_detection_scheme = err_detection_scheme;
+    this.num_prince_rounds_half = num_prince_rounds_half;
 
     if (`HAS_ECC) begin
       import prim_secded_pkg::prim_secded_e;
@@ -153,6 +159,10 @@ class mem_bkdr_util extends uvm_object;
     return err_detection_scheme;
   endfunction
 
+  function int get_num_prince_rounds_half();
+    return num_prince_rounds_half;
+  endfunction
+
   function uint32_t get_data_width();
     return data_width;
   endfunction
diff --git a/hw/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv b/hw/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
index 9fe8a69ce4590..09d4f86ce3150 100644
--- a/hw/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
+++ b/hw/dv/sv/mem_bkdr_util/mem_bkdr_util__sram.sv
@@ -67,7 +67,7 @@ function logic [38:0] get_sram_encrypt32_intg_data (
 
   wdata_arr = {<<{integ_data}};
   wdata_arr = sram_scrambler_pkg::encrypt_sram_data(
-      wdata_arr, 39, 39, addr_arr, full_addr_width, key_arr, nonce_arr
+      wdata_arr, 39, 39, addr_arr, full_addr_width, key_arr, nonce_arr, num_prince_rounds_half
   );
   scrambled_data = {<<{wdata_arr}};
   return scrambled_data;
@@ -110,7 +110,7 @@ local function logic [38:0] _sram_decrypt_read39(
   `uvm_info(`gfn, $sformatf("scr data: 0x%0x", rdata39), UVM_HIGH)
   rdata_arr = {<<{rdata39}};
   rdata_arr = sram_scrambler_pkg::decrypt_sram_data(
-      rdata_arr, 39, 39, addr_arr, full_addr_width, key_arr, nonce_arr
+      rdata_arr, 39, 39, addr_arr, full_addr_width, key_arr, nonce_arr, num_prince_rounds_half
   );
   rdata39 = {<<{rdata_arr}};
   return rdata39;
diff --git a/hw/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv b/hw/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
index b86dd4368cfb1..c053e7efe837c 100644
--- a/hw/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
+++ b/hw/dv/sv/mem_bkdr_util/sram_scrambler_pkg.sv
@@ -40,7 +40,7 @@ package sram_scrambler_pkg;
   // Fixed data block size - PRINCE cipher operates on 64-bit data blocks.
   parameter int SRAM_BLOCK_WIDTH = 64;
 
-  parameter int NUM_PRINCE_ROUNDS_HALF = 3;
+  parameter int NUM_PRINCE_ROUNDS_HALF_MAX = 5;
   parameter int NUM_SP_ROUNDS = 2;
 
   // Create a generic typedef for dynamic array of logic to be able to return these values.
@@ -147,8 +147,9 @@ package sram_scrambler_pkg;
   //
   // Should not be called directly.
   function automatic state_t gen_keystream(logic addr[], int addr_width,
-                                           logic key[], logic nonce[]);
-    logic [NUM_PRINCE_ROUNDS_HALF-1:0][SRAM_BLOCK_WIDTH-1:0] prince_result_arr;
+                                           logic key[], logic nonce[],
+                                           int num_prince_rounds_half = 3);
+    logic [NUM_PRINCE_ROUNDS_HALF_MAX-1:0][SRAM_BLOCK_WIDTH-1:0] prince_result_arr;
 
     logic [SRAM_BLOCK_WIDTH-1:0]  prince_plaintext;
     logic [SRAM_KEY_WIDTH-1:0]    prince_key;
@@ -183,7 +184,7 @@ package sram_scrambler_pkg;
                                                  .key(prince_key),
                                                  .old_key_schedule(0),
                                                  .ciphertext(prince_result_arr));
-    prince_result = prince_result_arr[NUM_PRINCE_ROUNDS_HALF-1];
+    prince_result = prince_result_arr[num_prince_rounds_half-1];
 
     key_out = {<< {prince_result}};
 
@@ -235,13 +236,15 @@ package sram_scrambler_pkg;
 
   endfunction : decrypt_sram_addr
 
-  // SRAM data encryption is more involved, we need to run 3 rounds of PRINCE on the nonce and key
-  // and then XOR the result with the data.
+  // SRAM data encryption is more involved, we need to run up to 5 half rounds of PRINCE on the
+  // nonce and key and then XOR the result with the data.
   //
   // Optionally, the XORed data can be passed through the S&P network.
   function automatic state_t encrypt_sram_data(logic data[], int data_width, int sp_width,
                                                logic addr[], int addr_width,
-                                               logic key[], logic nonce[], bit use_sp_layer = 0);
+                                               logic key[], logic nonce[],
+                                               int num_prince_rounds_half = 3,
+                                               bit use_sp_layer = 0);
     logic keystream[] = new[SRAM_BLOCK_WIDTH];
     logic data_enc[] = new[data_width];
     logic byte_to_enc[] = new[8];
@@ -255,7 +258,7 @@ package sram_scrambler_pkg;
     end
 
     // Generate the keystream
-    keystream = gen_keystream(addr, addr_width, key, nonce);
+    keystream = gen_keystream(addr, addr_width, key, nonce, num_prince_rounds_half);
 
     // XOR keystream with input data
     // Assumes ks_width <= 64.
@@ -299,7 +302,9 @@ package sram_scrambler_pkg;
 
   function automatic state_t decrypt_sram_data(logic data[], int data_width, int sp_width,
                                                logic addr[], int addr_width,
-                                               logic key[], logic nonce[], bit use_sp_layer = 0);
+                                               logic key[], logic nonce[],
+                                               int num_prince_rounds_half = 3,
+                                               bit use_sp_layer = 0);
     logic keystream[] = new[SRAM_BLOCK_WIDTH];
     logic data_dec[] = new[data_width];
     logic byte_to_dec[] = new[8];
@@ -313,7 +318,7 @@ package sram_scrambler_pkg;
     end
 
     // Generate the keystream
-    keystream = gen_keystream(addr, addr_width, key, nonce);
+    keystream = gen_keystream(addr, addr_width, key, nonce, num_prince_rounds_half);
 
     if (use_sp_layer) begin
       if (data_width == sp_width) begin
diff --git a/hw/dv/sv/ottf_spi_console/ottf_spi_console.core b/hw/dv/sv/ottf_spi_console/ottf_spi_console.core
new file mode 100644
index 0000000000000..8954305c1b73c
--- /dev/null
+++ b/hw/dv/sv/ottf_spi_console/ottf_spi_console.core
@@ -0,0 +1,21 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: "lowrisc:dv:ottf_spi_console"
+description: "Routines to interact with an OTTF SPI console using an OpenTitan spi_host agent."
+filesets:
+  files_dv:
+    depend:
+      - lowrisc:dv:dv_lib
+      - lowrisc:dv:spi_agent
+      - lowrisc:dv:csr_utils
+    files:
+      - ottf_spi_console_pkg.sv
+      - ottf_spi_console.sv: {is_include_file: true}
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_dv
diff --git a/hw/dv/sv/ottf_spi_console/ottf_spi_console.sv b/hw/dv/sv/ottf_spi_console/ottf_spi_console.sv
new file mode 100644
index 0000000000000..8f63f24f1aa4b
--- /dev/null
+++ b/hw/dv/sv/ottf_spi_console/ottf_spi_console.sv
@@ -0,0 +1,544 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This class can be instantiated as a testbench object to provide routines to interact
+// with an OTTF SPI console using an OpenTitan spi_host agent.
+//
+// See the ottf_spi_console_pkg header for a fuller description.
+
+class ottf_spi_console extends uvm_component;
+  `uvm_component_utils(ottf_spi_console)
+
+  function new(string name = "", uvm_component parent = null);
+    super.new(name, parent);
+  endfunction : new
+
+  virtual clk_rst_if clk_rst_vif;
+  virtual pins_if #(.Width(2), .PullStrength("Weak")) flow_ctrl_vif;
+
+  uvm_sequence seq_h;
+  spi_sequencer spi_host_sequencer_h;
+
+  // Define local macros which function like `uvm_create and `uvm_send, except using the
+  // class-local handles to the parent sequence 'seq_h' and sequencer 'spi_host_sequencer_h'.
+  `ifndef spi_console_uvm_create
+    // verilog_lint: waive macro-name-style
+    `define spi_console_uvm_create(SEQ_) \
+      begin \
+        uvm_object_wrapper type_var = SEQ_.get_type(); \
+        // Create item, returned attached to a uvm_sequence_item handle, so \
+        // cast to the original subclass sequence type handle \
+        $cast(SEQ_, spi_console_create_item(type_var, `"SEQ_`")); \
+      end
+  `endif
+  `ifndef spi_console_uvm_send
+    // verilog_lint: waive macro-name-style
+    `define spi_console_uvm_send(SEQ_) \
+      begin \
+        SEQ_.start(/*sequencer*/ spi_host_sequencer_h, /*parent_sequence*/ seq_h); \
+      end
+  `endif
+
+  // This function replaces the 'create_item()' method in the uvm base classes,
+  // except 'seq_h' is always used as the parent_seq, and 'spi_host_sequencer_h' is always
+  // used as the sequencer.
+  function uvm_sequence_item spi_console_create_item(uvm_object_wrapper type_var,
+                                                     string name = "");
+    // Get factory
+    uvm_coreservice_t cs = uvm_coreservice_t::get();
+    uvm_factory factory = cs.get_factory();
+    // Use factory to construct the object
+    uvm_object obj = factory.create_object_by_type(type_var, seq_h.get_full_name(), name);
+    // Cast object to assign to the uvm_sequence_item handle
+    uvm_sequence_item item;
+    $cast(item, obj);
+    // Attach new sequence object to parent sequence / sequencer registered with the class.
+    item.set_item_context(seq_h, spi_host_sequencer_h);
+
+    return item;
+  endfunction
+
+  // Helper-methods
+
+  // Checks for a pattern match in a sting using uvm_re_match(), and print upon success.
+  extern protected function bit findStrRe(string pattern, string str);
+  // Reverse byte endianess in a 32-bit word (0x12345678 -> 0x78563412)
+  extern protected function bit [31:0] reverse_endianess(bit [31:0] inp);
+  // Format an array of bytes as an ascii string.
+  extern protected function string byte_array_as_str(bit [7:0] q[]);
+  // Format a queue of bytes as an ascii string.
+  extern protected function string byte_q_as_str(bit [7:0] q[$]);
+  // Format a queue of bytes as a hexadecimal-formatted integer.
+  extern protected function string byte_q_as_hex(bit [7:0] q[$]);
+  // Wait for a given value of one of the console sideband flow control signals.
+  extern protected task await_flow_ctrl_signal(flow_ctrl_idx_e idx,
+                                               bit val = 1'b1,
+                                               uint timeout_ns = await_flow_ctrl_timeout_ns);
+
+  // spi_console implementation details (taken from the corresponding software components)
+  //
+  // CONSTANTS
+  // const SPI_FRAME_HEADER_SIZE           : usize =   12;
+  // const SPI_FLASH_READ_BUFFER_SIZE      : u32   = 2048;
+  // const SPI_FLASH_PAYLOAD_BUFFER_SIZE   : usize =  256;
+  // const SPI_MAX_DATA_LENGTH             : usize = 2036;
+  // const SPI_FRAME_MAGIC_NUMBER          : u32   = 0xa5a5beef;
+  // const SPI_TX_LAST_CHUNK_MAGIC_ADDRESS : u32   =      0x100;
+  // const SPI_BOOT_MAGIC_PATTERN          : u32   = 0xcafeb002;
+  //
+  //
+  // DEVICE->HOST transfers
+  // (READS)
+  //
+  //   FRAME STRUCTURE
+  //
+  //    -----------------------------------------------
+  //    |      Magic Number     | 4-bytes  |          |
+  //    -----------------------------------|          |
+  //    |      Frame Number     | 4-bytes  |  Header  |
+  //    -----------------------------------|          |
+  //    |   Data Length (bytes) | 4-bytes  |          |
+  //    -----------------------------------|----------|
+  //    |      Data (word aligned)         |          |
+  //    -----------------------------------|   Data   |
+  //    |     0xFF Pad Bytes    | <4-bytes |          |
+  //    -----------------------------------|----------|
+  //
+  //   - tx_ready_gpio (IOA5 here...)
+  //     - Flow-control mechanism for DEVICE->HOST transfers
+  //     - ENABLED for ft_personalize.c (`console_tx_indicator.enable = true`)
+  //     - The DEVICE sets the sideband 'tx_ready' gpio when the SPI console buffer has data,
+  //       and clears the gpio when there is no longer data available.
+  //     - When using the TX-indicator pin feature, we always write each SPI frame at the
+  //       beginning of the flash buffer, and wait for the host to read it out before writing
+  //       another frame.
+  //
+  //
+  // HOST->DEVICE transfers
+  // (WRITES)
+  //
+  //   - DEVICE signals ready by asserting a sideband RX-indicator pin (rx_ready)
+  //   - Message is chunked in payloads, each of which are written (via upload command) to
+  //     address zero.
+  //     - After each upload, HOST polls busy to await the DEVICE reading the buffer contents.
+  //   - For final chunk, HOST uploads it to a special address (SPI_TX_LAST_CHUNK_MAGIC_ADDRESS)
+  //   - After DEVICE reads the final chunk, it de-asserts the RX-indicator pin (rx_ready)
+
+  ///////////////////////
+  // CONSOLE READ IMPL //
+  ///////////////////////
+
+  // READ CONSTANTS
+  // (constants also taken from the corresponding software components)
+  uint SPI_FLASH_READ_BUFFER_SIZE = 2048; // To ensure we don't overwrite our PAYLOAD BUFFER
+  uint SPI_MAX_DATA_LENGTH = 2036;
+  uint SPI_FRAME_HEADER_SIZE = 12;
+  bit [31:0] SPI_FRAME_MAGIC_NUMBER = 32'ha5a5beef;
+  // Derived constants from ottf_console_internal.h
+  uint kSpiDeviceBufferPreservedSizeBytes = SPI_FRAME_HEADER_SIZE;
+  uint kSpiDeviceMaxFramePayloadSizeBytes = SPI_FLASH_READ_BUFFER_SIZE -
+                                            SPI_FRAME_HEADER_SIZE -
+                                            kSpiDeviceBufferPreservedSizeBytes - 4;
+
+  // READ METHODS
+  //
+  // Drive a single ReadNormal operation to the DEVICE spi_console.
+  extern protected task host_spi_console_read(input int        size,
+                                              input bit [31:0] addr,
+                                              output bit [7:0] chunk_q[$]);
+  // Read a single frame from the DEVICE spi console.
+  extern protected task host_spi_console_read_frame(ref bit [7:0] chunk_q[$]);
+  // Await the DEVICE signalling a read, and check the payload contains the given string.
+  extern task host_spi_console_read_wait_for(input string wait_for);
+  // Await the DEVICE signalling a read, and return the payload as an array of bytes.
+  //
+  // For this method, we know the maximum expected payload length. Keep awaiting new frames until
+  // either the maximum total payload length is reached/exceeded, or we see a frame which is less
+  // than the max length for a single frame.
+  extern task host_spi_console_read_payload(output bit [7:0] outbuf[], input int max_len);
+
+  ////////////////////////
+  // CONSOLE WRITE IMPL //
+  ////////////////////////
+
+  // WRITE CONSTANTS
+  //
+  uint SPI_FLASH_PAYLOAD_BUFFER_SIZE = 256; // Don't overwrite the PAYLOAD BUFFER
+  bit [31:0] SPI_TX_ADDRESS = '0;
+  bit [31:0] SPI_TX_LAST_CHUNK_MAGIC_ADDRESS = 9'h100;
+
+  // WRITE METHODS
+  //
+  // Poll the DEVICE flash busy bit, returning when a status of NOT-BUSY is returned.
+  extern protected task host_spi_console_wait_while_busy(uint timeout_ns = wait_on_busy_timeout_ns);
+  // Perform a single write operation, enabling writes and then waiting for not-busy after
+  // having driven the write_seq.
+  extern protected task host_spi_console_write_op(spi_host_flash_seq write_seq);
+  // Write a single buffer of data to the DEVICE.
+  // This task enforces a maximum buffer size of SPI_FLASH_PAYLOAD_BUFFER_SIZE, which prevents
+  // data-loss on the DEVICE side by overwriting the payload buffer.
+  extern protected task host_spi_console_write_buf(input bit [7:0] bytes_q[$],
+                                                   input bit [31:0] addr);
+  // Write a generic buffer of data to the console DEVICE. This method will chunk up the payload
+  // into smaller operations if it is larger than the DEVICE's payload buffer.
+  extern protected task host_spi_console_write(input bit [7:0] bytes[]);
+  // Wait until the DEVICE signals it is awaiting a write, then perform one or more console write
+  // operations. This task tries to write all given payloads successively before waiting for the
+  // device to clear the sideband flow_control signal, and cannot short-circuit or early return.
+  extern task host_spi_console_write_when_ready(input bit [7:0] bytes[][],
+                                                uint timeout_ns = write_completion_timeout_ns);
+
+endclass : ottf_spi_console
+
+/////////////
+// HELPERS //
+/////////////
+
+function bit ottf_spi_console::findStrRe(string pattern, string str);
+  string re_pattern = $sformatf("*%0s*", pattern);
+  bit    match = !uvm_re_match(re_pattern, str);
+  // After negation, match = 1 / nomatch = 0
+  if (match) begin
+    `uvm_info(`gfn,
+              $sformatf("findStrRe() MATCH=%0d, string: \"%s\", pattern: \"%s\"",
+                        match, str, re_pattern),
+              UVM_DEBUG)
+  end
+  return match;
+endfunction
+
+function bit [31:0] ottf_spi_console::reverse_endianess(bit [31:0] inp);
+  return {>>{ {<<8{inp}} }};
+endfunction
+
+function string ottf_spi_console::byte_array_as_str(bit [7:0] q[]);
+  string str = "";
+  foreach (q[i]) $sformat(str, "%s%0s", str, q[i]);
+  return str;
+endfunction
+
+function string ottf_spi_console::byte_q_as_str(bit [7:0] q[$]);
+  string str = "";
+  foreach (q[i]) $sformat(str, "%s%0s", str, q[i]);
+  return str;
+endfunction
+
+function string ottf_spi_console::byte_q_as_hex(bit [7:0] q[$]);
+  string str = "";
+  foreach (q[i]) $sformat(str, "%s%02x", str, q[i]);
+  return str;
+endfunction
+
+task ottf_spi_console::await_flow_ctrl_signal(flow_ctrl_idx_e idx,
+                                              bit val = 1'b1,
+                                              uint timeout_ns = await_flow_ctrl_timeout_ns);
+  `uvm_info(`gfn, $sformatf("Waiting for pin:%0d to be %0d now...", idx, val), UVM_HIGH)
+  `DV_WAIT(
+    /*WAIT_COND_*/  flow_ctrl_vif.pins[idx] == val,
+    /*MSG_*/        $sformatf("Timed out waiting for pin '%0s' to be 1'b%0b.", idx.name(), val),
+    /*TIMEOUT_NS_*/ timeout_ns)
+  `uvm_info(`gfn, $sformatf("Saw idx:%0d as %0d now!", idx, val), UVM_HIGH)
+endtask: await_flow_ctrl_signal
+
+//////////////////
+// CONSOLE READ //
+//////////////////
+
+task ottf_spi_console::host_spi_console_read(input int        size,
+                                             input bit [31:0] addr,
+                                             output bit [7:0] chunk_q[$]);
+  // Set the flash read address
+  bit [7:0] byte_addr_q[$] = {addr[23:16], addr[15:8], addr[7:0]};
+
+  spi_host_flash_seq m_spi_host_seq;
+  `spi_console_uvm_create(m_spi_host_seq);
+
+  `DV_CHECK_RANDOMIZE_WITH_FATAL(m_spi_host_seq,
+    opcode == SpiFlashReadNormal;
+    address_q.size() == byte_addr_q.size();
+    foreach (byte_addr_q[i]) address_q[i] == byte_addr_q[i];
+    payload_q.size() == size;
+    read_size == size;
+  )
+
+  `uvm_info(`gfn, "host_spi_console_read() - Start.", UVM_HIGH)
+  `spi_console_uvm_send(m_spi_host_seq)
+  `uvm_info(`gfn, "host_spi_console_read() - End.", UVM_HIGH)
+  // Get data out of the sequence once completed.
+  foreach (m_spi_host_seq.rsp.payload_q[i]) chunk_q.push_back(m_spi_host_seq.rsp.payload_q[i]);
+
+endtask : host_spi_console_read
+
+task ottf_spi_console::host_spi_console_read_frame(ref bit [7:0] chunk_q[$]);
+  bit [31:0] header_data_bytes = 0;
+
+  // First, get the header of the current frame.
+  begin : get_header
+    bit [31:0] header_magic_number;
+    bit [31:0] header_frame_number;
+    bit [7:0]  header_q[$];
+    host_spi_console_read(.size(SPI_FRAME_HEADER_SIZE), .addr(0), .chunk_q(header_q));
+    header_magic_number = reverse_endianess({>>{header_q[0:3]}});
+    header_frame_number = reverse_endianess({>>{header_q[4:7]}});
+    header_data_bytes   = reverse_endianess({>>{header_q[8:11]}});
+    `uvm_info(`gfn, $sformatf("Got header : 0x%0s", byte_q_as_hex(header_q)), UVM_HIGH)
+    `uvm_info(`gfn,
+              $sformatf("Magic Number : 0x%02x Frame Number : 0x%02x, Num_Data_Bytes : 0x%02x",
+                        header_magic_number, header_frame_number, header_data_bytes),
+              UVM_HIGH)
+    `DV_CHECK_EQ(header_magic_number, SPI_FRAME_MAGIC_NUMBER, "Bad spi_console Header MAGIC_NUM")
+    `DV_CHECK_LT(header_data_bytes, SPI_MAX_DATA_LENGTH, "Cannot handle this many data bytes!")
+  end
+
+  // Add an arbitrary delay here to slow things down.
+  // The ottf_console_spi.c code in spi_device_send_frame() relies on manually querying the
+  // value of CSB (via reading the HW status register) and observing it change state 4 times
+  // to know that two full SPI transfers have taken place.
+  // If there is not adequate space between the two transfers, the software will miss its
+  // measurement here of the chip select returning high/inactive.
+  #(min_interval_ns);
+
+  // Next, get all the data_bytes from the frame.
+  while (header_data_bytes > 0) begin
+    bit [7:0] data_q[$] = {};
+    host_spi_console_read(.size(header_data_bytes),
+                          .addr(SPI_FRAME_HEADER_SIZE),
+                          .chunk_q(data_q));
+    `uvm_info(`gfn, $sformatf("Got data_bytes in chunk : %0s", byte_q_as_str(data_q)), UVM_HIGH)
+    // #TODO Assume we read all bytes in one go, for now. The DV_CHECK_EQ in the header block will
+    // stop us dead for now if the payload is too large.
+    header_data_bytes = 0;
+
+    // Append the bytes from this read transfer to the overall queue.
+    chunk_q = {chunk_q, data_q};
+  end
+
+  // Again, add the arbitrary delay to allow the DEVICE sw time to ready CSB low to detect the
+  // end of the frame.
+  #(min_interval_ns);
+
+endtask : host_spi_console_read_frame
+
+task ottf_spi_console::host_spi_console_read_wait_for(input string wait_for);
+  bit [7:0] chunk_q[$];
+  string    chunk_q_as_str;
+
+  `uvm_info(`gfn, $sformatf("Waiting to read the following string in the spi_console : %0s",
+    wait_for), UVM_LOW)
+
+  `uvm_info(`gfn, "Waiting for the DEVICE to set 'tx_ready' (IOA5)", UVM_HIGH)
+  await_flow_ctrl_signal(tx_ready, 1'b1);
+  `uvm_info(`gfn, "DEVICE set 'tx_ready' now.", UVM_HIGH)
+
+  // Next, get all the data_bytes from the frame until we see the expected message in the buffer.
+  do begin
+    bit [7:0] data_q[$] = {};
+    host_spi_console_read_frame(.chunk_q(data_q));
+    `uvm_info(`gfn, $sformatf("Got data_bytes : %0s", byte_q_as_str(data_q)), UVM_HIGH)
+    // Append the bytes from this read transfer to the overall queue.
+    chunk_q = {chunk_q, data_q};
+  end while (!findStrRe(wait_for, byte_q_as_str(chunk_q)));
+  `uvm_info(`gfn, $sformatf("Got expected string from spi_console : '%0s'", wait_for), UVM_LOW)
+
+  // (If not already de-asserted) wait for the SPI console TX ready to be cleared by the DEVICE.
+  `uvm_info(`gfn, "Waiting for the DEVICE to clear 'tx_ready' (IOA5)", UVM_HIGH)
+  await_flow_ctrl_signal(tx_ready, 1'b0);
+  `uvm_info(`gfn, "DEVICE cleared 'tx_ready' now.", UVM_HIGH)
+
+endtask : host_spi_console_read_wait_for
+
+task ottf_spi_console::host_spi_console_read_payload(output bit [7:0] outbuf[],
+                                                     input int        max_len);
+  bit [7:0] payload_byte_q[$] = {};
+  int       len_ctr = 0;
+  `uvm_info(`gfn, $sformatf("Awaiting read_payload. (max %0d bytes)", max_len), UVM_LOW)
+
+  `uvm_info(`gfn, "Waiting for the DEVICE to set 'tx_ready' (IOA5)", UVM_HIGH)
+  await_flow_ctrl_signal(tx_ready, 1'b1);
+  `uvm_info(`gfn, "DEVICE set 'tx_ready' now.", UVM_HIGH)
+
+  // Keep getting spi console frames until we determine the payload has completed by length.
+  while (len_ctr < max_len) begin
+    bit [7:0] frame_byte_q[$] = {};
+
+    fork
+      // Capture a single spi_console frame. Return as soon as the data transfer has completed.
+      begin : capture_frames
+        host_spi_console_read_frame(.chunk_q(frame_byte_q));
+        payload_byte_q = {payload_byte_q, frame_byte_q};
+        len_ctr += frame_byte_q.size();
+        `uvm_info(`gfn, $sformatf("Got %0d data bytes in frame : %0s", frame_byte_q.size(),
+          byte_q_as_str(frame_byte_q)), UVM_MEDIUM)
+        `uvm_info(`gfn, $sformatf("Got %0d / %0d(max) data bytes in expected payload.",
+          len_ctr, max_len), UVM_MEDIUM)
+      end
+      // The DEVICE will de-assert tx_ready after the first CSB edge, knowing that both sides
+      // understand that two full spi transfers need to complete (header + data). It won't
+      // re-assert tx_ready until after the 4th CSB edge (the end of the second transfer)
+      begin : await_tx_ready_deassert
+        `uvm_info(`gfn, "Waiting for the DEVICE to clear 'tx_ready' (IOA5)", UVM_HIGH)
+        await_flow_ctrl_signal(tx_ready, 1'b0);
+        `uvm_info(`gfn, "DEVICE cleared 'tx_ready' now.", UVM_HIGH)
+      end
+    join
+
+    // If the frame is any less than the maximum size, assume this is the end of the
+    // payload. I'm not going to implement a message parser / deserializer here.
+    if (frame_byte_q.size() < kSpiDeviceMaxFramePayloadSizeBytes) begin
+      `uvm_info(`gfn, "Got less-than-max-size frame, assuming payload end now.", UVM_MEDIUM)
+      break;
+    end
+
+    // If the payload isn't complete, wait for the device to indicate the next frame is ready...
+    if (len_ctr < max_len) begin
+      `uvm_info(`gfn, "Payload not yet complete, awaiting next frame...", UVM_MEDIUM)
+      await_flow_ctrl_signal(tx_ready, 1'b1);
+    end
+
+  end
+
+  outbuf = {>>{payload_byte_q}};
+
+endtask : host_spi_console_read_payload
+
+///////////////////
+// CONSOLE WRITE //
+///////////////////
+
+task ottf_spi_console::host_spi_console_wait_while_busy(uint timeout_ns = wait_on_busy_timeout_ns);
+  spi_host_flash_seq m_spi_host_seq;
+  `spi_console_uvm_create(m_spi_host_seq);
+
+  `DV_SPINWAIT(
+    // WAIT_
+    do begin
+      `uvm_info(`gfn, "host_spi_console_wait_while_busy() - Polling DEVICE busy bit...", UVM_DEBUG)
+
+      // Wait before polling.
+      #(min_interval_ns);
+      clk_rst_vif.wait_clks($urandom_range(1, 100));
+
+      `DV_CHECK_RANDOMIZE_WITH_FATAL(m_spi_host_seq,
+        opcode == SpiFlashReadSts1;
+        address_q.size() == 0;
+        payload_q.size() == 1;
+        read_size == 1;
+      )
+      `spi_console_uvm_send(m_spi_host_seq)
+
+      // Check the busy bit (bit[0]) and loop while the DEVICE still reports busy (==1)
+    end while (m_spi_host_seq.rsp.payload_q[0][0] === 1);,
+    // MSG_
+    "Timed-out awaiting the spi_console DEVICE to report not-busy after a write operation",
+    // TIMEOUT_NS_
+    timeout_ns
+  )
+
+  `uvm_info(`gfn, "host_spi_console_wait_while_busy() - DEVICE not-busy, continuing...", UVM_DEBUG)
+endtask : host_spi_console_wait_while_busy
+
+task ottf_spi_console::host_spi_console_write_op(spi_host_flash_seq write_seq);
+
+  // First, enable writes.
+  spi_host_flash_seq m_spi_host_seq;
+  `spi_console_uvm_create(m_spi_host_seq);
+  m_spi_host_seq.opcode = SpiFlashWriteEnable;
+  `spi_console_uvm_send(m_spi_host_seq)
+
+  // Next, perform the write
+  `spi_console_uvm_send(write_seq)
+
+  // Finally, wait for the busy status bit to be cleared
+  host_spi_console_wait_while_busy();
+
+endtask : host_spi_console_write_op
+
+task ottf_spi_console::host_spi_console_write_buf(input bit [7:0]  bytes_q[$],
+                                                  input bit [31:0] addr);
+  uint bytes_q_size = bytes_q.size();
+
+  spi_host_flash_seq m_spi_host_seq;
+  `spi_console_uvm_create(m_spi_host_seq);
+
+  m_spi_host_seq.opcode = SpiFlashPageProgram;
+  m_spi_host_seq.address_q = {addr[23:16], addr[15:8], addr[7:0]};
+  `DV_CHECK(bytes_q_size <= SPI_FLASH_PAYLOAD_BUFFER_SIZE)
+  for (int i = 0; i < bytes_q_size; i++) begin
+    m_spi_host_seq.payload_q.push_back(bytes_q.pop_front());
+  end
+
+  `uvm_info(`gfn, $sformatf("Sending payload data_bytes(hex) : 0x%0s",
+    byte_q_as_hex(m_spi_host_seq.payload_q)), UVM_HIGH)
+  `uvm_info(`gfn, $sformatf("Sending payload data_bytes(str) : %0s",
+    byte_q_as_str(m_spi_host_seq.payload_q)), UVM_HIGH)
+
+  host_spi_console_write_op(m_spi_host_seq);
+endtask : host_spi_console_write_buf
+
+task ottf_spi_console::host_spi_console_write(input bit [7:0] bytes[]);
+  uint written_data_len = 0;
+
+  `uvm_info(`gfn, $sformatf("console_write() :: len=%0d : %0s", $size(bytes),
+    byte_array_as_str(bytes)), UVM_MEDIUM)
+
+  do begin
+    // - chunk_len holds the size of the current chunk we are about to write
+    // - write_address is the address the current chunk will be written to
+    uint chunk_len;
+    bit [31:0] write_address;
+
+    uint remaining_len = $size(bytes) - written_data_len;
+
+    if (remaining_len > SPI_FLASH_PAYLOAD_BUFFER_SIZE) begin
+      // If the remaining data cannot fit inside a single write operation
+      // (limited by the size of the DEVICE payload buffer size), then
+      // just send a max-size chunk this time around.
+      chunk_len = SPI_FLASH_PAYLOAD_BUFFER_SIZE;
+      write_address = SPI_TX_ADDRESS;
+    end else begin
+      // The remaining data fits in a single chunk. Send this chunk to the
+      // MAGIC_ADDRESS to signal to the DEVICE it is the final chunk.
+      chunk_len = remaining_len;
+      write_address = SPI_TX_LAST_CHUNK_MAGIC_ADDRESS;
+    end
+    `uvm_info(`gfn,
+              $sformatf("console_write() :: remaining=%0d, chunk_len=%0d, addr=32'h%8x",
+                        remaining_len, chunk_len, write_address),
+              UVM_DEBUG)
+    begin : write_chunk
+      bit [7:0] bytes_q[$];
+      for (int i = 0; i < chunk_len; i++) begin
+        bytes_q.push_back(bytes[i + written_data_len]);
+      end
+      host_spi_console_write_buf(bytes_q, write_address);
+    end
+    written_data_len += chunk_len;
+
+  end while ($size(bytes) - written_data_len > 0);
+
+endtask : host_spi_console_write
+
+task ottf_spi_console::host_spi_console_write_when_ready(
+  input bit [7:0] bytes[][],
+  uint timeout_ns = write_completion_timeout_ns
+);
+
+  `uvm_info(`gfn, "Waiting for the DEVICE to set 'rx_ready' (IOA6)", UVM_HIGH)
+  await_flow_ctrl_signal(rx_ready, 1'b1);
+  `uvm_info(`gfn, "DEVICE set 'rx_ready' now.", UVM_HIGH)
+
+  `DV_SPINWAIT(
+    /* WAIT_ */       foreach (bytes[i]) host_spi_console_write(bytes[i]);,
+    /* MSG_ */        "Timeout waiting for spi_console_write_when_ready() to complete.",
+    /* TIMEOUT_NS_ */ timeout_ns
+  )
+
+  `uvm_info(`gfn, "Waiting for the DEVICE to clear 'rx_ready' (IOA6)", UVM_HIGH)
+  await_flow_ctrl_signal(rx_ready, 1'b0);
+  `uvm_info(`gfn, "DEVICE cleared 'rx_ready' now.", UVM_HIGH)
+
+endtask : host_spi_console_write_when_ready
+
+`undef spi_console_uvm_create
+`undef spi_console_uvm_send
diff --git a/hw/dv/sv/ottf_spi_console/ottf_spi_console_pkg.sv b/hw/dv/sv/ottf_spi_console/ottf_spi_console_pkg.sv
new file mode 100644
index 0000000000000..a2b2d5f93cdd6
--- /dev/null
+++ b/hw/dv/sv/ottf_spi_console/ottf_spi_console_pkg.sv
@@ -0,0 +1,79 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// Routines to interact with an OTTF SPI console using an OpenTitan spi_host agent.
+//
+// This package provides the 'ottf_spi_console' class which can be instantiated as a testbench
+// component to provide methods to drive HOST-side communications of an OpenTitan OTTF SPI console.
+// The env can configure this object by connecting the virtual interfaces (clk_rst and flow_ctrl),
+// and the base_vseq should assign handles for the parent sequence (seq_h) and the sequencer for
+// the OpenTitan spi_host UVC (spi_host_sequencer_h).
+//
+// After configuration, the primary interface for sequences to make use of this are the methods:
+// - host_spi_console_read_wait_for()
+// - host_spi_console_read_payload()
+// - host_spi_console_write_when_ready()
+//
+// Note.
+// This is a bare-bones library for driving a console interaction. The methods here are crude.
+// Many methods fatally timeout if they see no stimulus or response to stimulus within a relatively
+// short window of time, and they are not currently written to handle errors / timeouts robustly.
+// They should be used with prior knowledge about how the DEVICE-side will behave with regards to
+// message types and message content.
+// It also only works with the sideband wired indicator signal-based flow control mechanism.
+
+package ottf_spi_console_pkg;
+
+  import dv_utils_pkg::uint;
+
+  import uvm_pkg::*;
+  import spi_agent_pkg::*;
+  import csr_utils_pkg::*;
+
+  `include "uvm_macros.svh"
+  `include "dv_macros.svh"
+
+  // Default timeouts and delays used in this package.
+  // Due to console activity being very slow relative to many other parts of the system, these
+  // delays and timeouts are large. They are also very top and application specific, and would
+  // require tuning for significantly different use cases.
+  // Note that this stimulus may be timing-sensitive due to interactions with the software running
+  // the DEVICE-side of the OTTF SPI Console, so test appropriately if changing these values.
+  uint await_flow_ctrl_timeout_ns  = 200_000_000; // 200ms
+  uint wait_on_busy_timeout_ns     = 200_000_000; // 200ms
+  uint write_completion_timeout_ns = 200_000_000; // 200ms
+  uint min_interval_ns             =       3_000; //   3us
+
+  // Typical opcodes used by SPI NOR-flash devices.
+  // Ensure that both parties are using the same encodings.
+  typedef enum bit [7:0] {
+    SpiFlashReadJedec    = 8'h9F,
+    SpiFlashReadSfdp     = 8'h5A,
+    SpiFlashReadNormal   = 8'h03,
+    SpiFlashReadFast     = 8'h0B,
+    SpiFlashReadDual     = 8'h3B,
+    SpiFlashReadQuad     = 8'h6B,
+    SpiFlashReadSts1     = 8'h05,
+    SpiFlashReadSts2     = 8'h35,
+    SpiFlashReadSts3     = 8'h15,
+    SpiFlashWriteDisable = 8'h04,
+    SpiFlashWriteEnable  = 8'h06,
+    SpiFlashWriteSts1    = 8'h01,
+    SpiFlashWriteSts2    = 8'h31,
+    SpiFlashWriteSts3    = 8'h11,
+    SpiFlashChipErase    = 8'hC7,
+    SpiFlashSectorErase  = 8'h20,
+    SpiFlashPageProgram  = 8'h02,
+    SpiFlashEn4B         = 8'hB7,
+    SpiFlashEx4B         = 8'hE9
+  } spi_flash_cmd_e;
+
+  typedef enum int {
+    rx_ready = 1,
+    tx_ready = 0
+  } flow_ctrl_idx_e;
+
+  `include "ottf_spi_console.sv"
+
+endpackage : ottf_spi_console_pkg
diff --git a/hw/dv/sv/usb20_agent/usb20_agent_cfg.sv b/hw/dv/sv/usb20_agent/usb20_agent_cfg.sv
index ceb00fd435628..b263d07a9bf52 100644
--- a/hw/dv/sv/usb20_agent/usb20_agent_cfg.sv
+++ b/hw/dv/sv/usb20_agent/usb20_agent_cfg.sv
@@ -52,6 +52,9 @@ class usb20_agent_cfg extends dv_base_agent_cfg;
   // ACKnowledged an IN packet or it has been marked as `pend` by the hardware.
   bit rtl_sending_clear_requires_ack = 1'b1;
 
+  // RTL will report CRC errors even if the PID is truncated, for DATA packets.
+  bit rtl_limited_crc_checking = 1'b1;
+
   // --------------------------------------------------------------------------
 
 endclass
diff --git a/hw/dv/sv/usb20_agent/usb20_driver.sv b/hw/dv/sv/usb20_agent/usb20_driver.sv
index a52ff828863f4..06f0d796084e9 100644
--- a/hw/dv/sv/usb20_agent/usb20_driver.sv
+++ b/hw/dv/sv/usb20_agent/usb20_driver.sv
@@ -103,10 +103,10 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
     drive_packet("Token", pkt);
     // Attempt to collect a response only to full speed IN transactions; this should be DATA0|1
     // or ACK/NAK. For fault injection purposes we may sometimes want to avoid waiting for any
-    // response.
+    // response. Likewise for aborted transmissions.
     if (req_item.m_pid_type == PidTypeInToken && req_item.await_response &&
-        !req_item.low_speed) begin
-      device_response(rsp_item);
+        !req_item.low_speed && req_item.bits_to_transmit == 0) begin
+      device_response(rsp_item, req_item.bits_to_receive);
       seq_item_port.item_done(rsp_item);
       `uvm_info (`gfn, $sformatf("In drive afer In packet : \n %0s", rsp_item.sprint()), UVM_DEBUG)
     end else begin
@@ -125,11 +125,13 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
     pkt.data = {<<{pkt.data}};
     pkt.crc16 = {<<{pkt.crc16}};
     drive_packet("Data", pkt);
-    // Isochronous OUT transactions and low speed transactions do not yield a response.
-    if (req_item.m_usb_transfer == IsoTrans || req_item.low_speed) begin
+    // Isochronous OUT transactions, low speed transactions and aborted transmissions do not yield a
+    // response.
+    if (req_item.m_usb_transfer == IsoTrans || req_item.low_speed ||
+        req_item.bits_to_transmit != 0) begin
       seq_item_port.item_done();
     end else begin
-      device_response(rsp_item);
+      device_response(rsp_item, req_item.bits_to_receive);
       seq_item_port.item_done(rsp_item);
     end
   endtask
@@ -190,12 +192,14 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
   endtask
 
   // Drive out the main body of a packet, prefixing with the SYNC signaling, performing NRZI
-  // encoding and bit stuffing.
+  // encoding and bit stuffing. Optionally a non-zero value may be specified for 'bits_to_transmit'
+  // to truncate the packet.
   //
   // Note that since this task is used both to drive out the PRE PID and then subsequently the
   // low speed packet that follows it, the EOP is not emitted and must be appended by the caller
   // where appropriate.
-  task drive_packet_body(string pkt_type, bit valid_sync, bit driver_pkt[], bit low_speed = 1'b0);
+  task drive_packet_body(string pkt_type, bit valid_sync, bit driver_pkt[], bit low_speed = 1'b0,
+                         int unsigned bits_to_transmit = 0);
     bit comp_pkt[];
     bit nrzi_out[];
     bit bit_stuff_out[];
@@ -231,8 +235,13 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
       nrzi_out[1] ^= 1'b1;
       `uvm_info(`gfn, "Driver chose to corrupt bit 1 of SYNC signal (limited)", UVM_MEDIUM)
     end
-    // Drive out each bit in turn.
-    for (int i = 0; i < nrzi_out.size(); i++) begin
+    // Drive out each bit in turn, unless we've been asked to truncate the packet.
+    if (bits_to_transmit) begin
+      `uvm_info(`gfn, $sformatf("Driver asked to abort transmission after %0d bits",
+                                bits_to_transmit), UVM_MEDIUM)
+      if (bits_to_transmit > nrzi_out.size()) bits_to_transmit = nrzi_out.size();
+    end else bits_to_transmit = nrzi_out.size();
+    for (int i = 0; i < bits_to_transmit; i++) begin
       drive_bit_interval(nrzi_out[i] ? USB20Sym_J : USB20Sym_K, low_speed);
     end
   endtask
@@ -266,8 +275,15 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
     end
     // Pack into bitstream format.
     void'(item.pack(driver_pkt));
-    drive_packet_body(pkt_type, valid_sync, driver_pkt, item.low_speed);
-    end_of_packet(item.valid_eop, item.low_speed);
+    drive_packet_body(pkt_type, valid_sync, driver_pkt, item.low_speed, item.bits_to_transmit);
+    // Skip the EOP if we've been instructed to abort the transmission.
+    if (|item.bits_to_transmit) begin
+      `uvm_info(`gfn, "Skipping EOP transmission", UVM_MEDIUM)
+      // We need to remove the drivers from the DP/DN lines, however, and let them float.
+      @(posedge cfg.bif.clk_i)
+      cfg.bif.drive_p = 1'bZ;
+      cfg.bif.drive_n = 1'bZ;
+    end else end_of_packet(item.valid_eop, item.low_speed);
   endtask
 
   // EOP Task
@@ -433,9 +449,12 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
   // Upon receiving the IN token/OUT packet, the device is expected to initiate a response.
   // This task monitors whether the device initiates the response in the form of a
   // handshake or data packet within the specified timeout period.
+  // Optionally a non-zero value may be specified for 'bits_to_receive' to receive no more than
+  // that number of bits.
+  //
   // If no response is detected within timeout frame that is 18 bit times(from section 7.1.19.1),
   // it send timeout response to sequence.
-  task device_response(ref usb20_item rsp_item);
+  task device_response(ref usb20_item rsp_item, input int unsigned bits_to_receive);
     bit timed_out = 1'b0;
     `uvm_info(`gfn, "After drive Packet in wait to check usb_dp_en_o signal", UVM_MEDIUM)
     fork begin : isolation_fork
@@ -452,7 +471,7 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
             disable get_device_response;
           end
         end
-        get_device_response(rsp_item);
+        get_device_response(rsp_item, bits_to_receive);
       join
       `uvm_info(`gfn, $sformatf("timed_out = %d", timed_out), UVM_MEDIUM)
       // this bit will indicate if device didn't repond within timeout period.
@@ -486,7 +505,8 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
     end
   endfunction
 
-  task get_device_response(ref usb20_item rsp_item);
+  task get_device_response(ref usb20_item rsp_item, input int unsigned bits_to_receive);
+    bit truncate_input = |bits_to_receive;
     bit received_pkt[];
     bit nrzi_out_pkt[];
     bit decoded_received_pkt[];
@@ -494,12 +514,23 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
     bit [7:0] received_pid = 0;
     bit bitstuff_err;
     bit use_negedge;
+    if (truncate_input) begin
+      `uvm_info(`gfn, $sformatf("Driver asked to receive at most %0d bits", bits_to_receive),
+                UVM_MEDIUM)
+    end
+    // Remember the initial count of transferred bits, in the event that we truncate this packet.
+    rsp_item.bits_to_receive = bits_to_receive;
     // TODO: DV should not be stealing access to the driver enable of the DUT and would ideally
     // be able to synchronize to just the USB_P/N signals are they are received.
     `uvm_info(`gfn, "After drive Packet in wait to check usb_dp_en_o signal", UVM_DEBUG)
     wait(cfg.bif.usb_dp_en_o);
     while (cfg.bif.usb_dp_en_o) begin
       usb_symbol_e sym;
+      if (truncate_input && ~|bits_to_receive) begin
+        // Do not consume any more simulation time; we're expecting to generate a bus event at this
+        // point, to interfere with the transmission from the DUT.
+        return;
+      end
       @(posedge cfg.bif.clk_i);
       @(posedge cfg.bif.clk_i);
       // Detect SE0 signaling which indicates End Of Packet
@@ -510,7 +541,10 @@ class usb20_driver extends dv_base_driver #(usb20_item, usb20_agent_cfg);
       receive_index = receive_index + 1;
       @(posedge cfg.bif.clk_i);
       @(posedge cfg.bif.clk_i);
+      if (truncate_input) bits_to_receive--;
     end
+    // Indicate that truncation was not performed.
+    rsp_item.bits_to_receive = 0;
     // Check SE0 signaling; we've hopefully sampled in the middle of the first bit,
     // so there should be 1.5 bit intervals of additional SE0 signaling; check throughout the
     // full bit interval, but avoid the transition to Idle because the agent and DUT frequencies
diff --git a/hw/dv/sv/usb20_agent/usb20_item.sv b/hw/dv/sv/usb20_agent/usb20_item.sv
index e253708ae8230..a43dbdefde03c 100644
--- a/hw/dv/sv/usb20_agent/usb20_item.sv
+++ b/hw/dv/sv/usb20_agent/usb20_item.sv
@@ -26,6 +26,14 @@ class usb20_item extends uvm_sequence_item;
   // the device.
   bit await_response;
 
+  // For a SETUP/OUT token packet, OUT DATA packet or an IN DATA request, this indicates how many
+  // bits shall be transmitted, as a precursor to then issuing a bus-level event such as a Bus Reset
+  // to test the DUT's recovery logic. (0 = default; transmit the entire packet.)
+  int unsigned bits_to_transmit;
+  // For an IN DATA request, this indicates how many bits of any response shall be received.
+  // (0 = default; receive the entire response.)
+  int unsigned bits_to_receive;
+
   // Validity indicators that apply to all packet types; used by the monitor at metadata for the
   // scoreboard.
   bit valid_sync;      // SYNC signal properly formed.
@@ -51,6 +59,12 @@ class usb20_item extends uvm_sequence_item;
     valid_eop = 1'b1;
     // Await response to IN token packet?
     await_response = 1'b1;
+    // Normally the entire packet will be transmitted; this field may be used to truncate a packet
+    // transfer prematurely to test recovery behavior.
+    bits_to_transmit = 0;
+    // Normally the entirety of any response will be received; this field may be used to collect
+    // only part of the response, to test recovery behavior.
+    bits_to_receive = 0;
     // Timed out awaiting a response from the device?
     timed_out = 1'b0;
   endfunction
@@ -68,6 +82,12 @@ class usb20_item extends uvm_sequence_item;
     m_pkt_type          = rhs_.m_pkt_type;
     m_usb_transfer      = rhs_.m_usb_transfer;
     timed_out           = rhs_.timed_out;
+    // Await response to IN packet?
+    await_response      = rhs_.await_response;
+    // Number of bits to transmit, if truncating.
+    bits_to_transmit    = rhs_.bits_to_transmit;
+    // Number of response bits to receive, if truncating.
+    bits_to_receive     = rhs_.bits_to_receive;
     // Low speed signaling?
     low_speed           = rhs_.low_speed;
     // Validity indicators; used to instruct the driver to perform fault injection, and completed
diff --git a/hw/dv/sv/usb20_agent/usb20_monitor.sv b/hw/dv/sv/usb20_agent/usb20_monitor.sv
index bf338b2b65e26..a761fff71ec92 100644
--- a/hw/dv/sv/usb20_agent/usb20_monitor.sv
+++ b/hw/dv/sv/usb20_agent/usb20_monitor.sv
@@ -251,7 +251,9 @@ class usb20_monitor extends dv_base_monitor #(
     // of the Bus Reset to signal its occurrence, otherwise the scoreboard will be informed way
     // too late.
     while (sym == USB20Sym_SE0 && bit_cnt < 36) begin
-      bit_cnt++;
+      // Do not measure the passage of time if the DUT is under reset because the DUT will not be
+      // measuring the duration of the SE0 state.
+      if (cfg.bif.rst_ni) bit_cnt++;
       collect_symbol(sym);
     end
     // Bus Reset Signaling requires SE0 state for > 2.5 microseconds.
@@ -265,7 +267,9 @@ class usb20_monitor extends dv_base_monitor #(
     // Consume the rest of the Bus Reset, which could be many milliseconds.
     collect_symbol(sym);
     while (sym == USB20Sym_SE0) begin
-      bit_cnt++;
+      // Do not measure the passage of time if the DUT is under reset because the DUT will not be
+      // measuring the duration of the SE0 state.
+      if (cfg.bif.rst_ni) bit_cnt++;
       collect_symbol(sym);
     end
     `uvm_info(`gfn, $sformatf("Bus Reset of %d bit intervals detected", bit_cnt), UVM_MEDIUM)
@@ -292,11 +296,13 @@ class usb20_monitor extends dv_base_monitor #(
     int unsigned bit_cnt = 0;
     usb_symbol_e sym;
     bit valid;
-    collect_symbol(sym);
     // Scoreboard must be notified almost immediately that Resume Signaling has been detected but
     // is not yet completed, so that it can update its prediction of the link state. Resume
     // Signaling typically takes at least 20ms.
+    //
+    // Note that we have already collected a 'K' symbol at this point.
     resume_signaling_detected(1, .completed(1'b0));
+    collect_symbol(sym);
     while (sym == USB20Sym_K) begin
       bit_cnt++;
       collect_symbol(sym);
@@ -333,12 +339,13 @@ class usb20_monitor extends dv_base_monitor #(
     int unsigned bitcnt = 1;
     bit [15:0] sync_pid = 0;
     int unsigned initb = 0;
+    int unsigned maxb = 8;
+    bit valid_sync = 1'b1;
     int bit_intervals = 0;
     bit low_speed = 1'b0;
     bit valid_stuffing;
     usb_symbol_e sym;
     bit from_driver;
-    bit valid_sync;
     bit valid_eop;
     bit packet[$];
 
@@ -357,7 +364,6 @@ class usb20_monitor extends dv_base_monitor #(
       // Check whether we have seen only K state for a number of bit intervals.
       if (resuming && sym == USB20Sym_K) begin
         if (++bit_intervals >= 8) begin
-          resuming = 1'b1;
           return;
         end
       end else resuming = 1'b0;
@@ -386,30 +392,49 @@ class usb20_monitor extends dv_base_monitor #(
       end
       collect_symbol(sym, low_speed);
     end
+    resuming = 1'b0;
+
     // TODO: Consider 'dribble' tolerance here.
     // Detect and validate the EOP signaling.
     while (sym == USB20Sym_SE0) begin
-      eop_bits++;
+      // If this is actually a DUT reset drop the traffic entirely at this point because writing
+      // to the analysis port will leave a spurious item awaiting collection.
+      if (!cfg.bif.rst_ni) return;
+      // After 2.5 microseconds of SE0 a device is permitted to initiate a reset; allow 3
+      // microseconds before abandoning packet collection.
+      if (++eop_bits >= (low_speed ? 4 : 32)) begin
+        `uvm_info(`gfn, "Abandoning packet collection because of Reset Signaling", UVM_LOW)
+        // The incomplete packet must still be forwarded to the scoreboard for predictions because
+        // the DUT shall not consider it a link reset immediately; it may flag errors.
+        break;
+      end
       collect_symbol(sym, low_speed);
     end
-    valid_eop = cfg.single_bit_SE0 ? (eop_bits >= 1) : (eop_bits == 2);
+    valid_eop = (eop_bits == 2) || (cfg.single_bit_SE0 && eop_bits == 1);
 
     `uvm_info(`gfn, $sformatf("Complete monitored packet = %p", packet), UVM_MEDIUM)
-    `DV_CHECK_GT(packet.size(), 8, "Incomplete SYNC signal detected")
-    valid_sync = 1'b1;
-    // See explanation in `usb20_agent_cfg.sv` => check only bits 2 to 8
+    if (packet.size() < 8) begin
+      `uvm_info(`gfn, $sformatf("Incomplete SYNC signal of %0d bits detected", packet.size()),
+                UVM_MEDIUM)
+      maxb = packet.size();
+      valid_sync = 1'b0;
+    end
+    // See explanation in `usb20_agent_cfg.sv` => check only bit 2 onwards.
     if (cfg.rtl_limited_sync_recovery) initb = 2;
-    for (int unsigned b = initb; b < 8; b++) begin
+    for (int unsigned b = initb; b < maxb; b++) begin
       if (packet[b] != sync[b]) begin
         `uvm_info(`gfn, $sformatf("Invalid SYNC signal detected %p", packet), UVM_MEDIUM)
         valid_sync = 1'b0;
       end
     end
-
-    nrzi_decoder(packet, monitored_decoded_packet);
-    bit_destuffing(monitored_decoded_packet, valid_stuffing, destuffed_packet);
-    classifies_packet(low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet,
-                      from_driver);
+    // 'Packets' so damaged that there aren't enough bits to constitute a SYNC signal may be
+    // discarded.
+    if (maxb >= 8) begin
+      nrzi_decoder(packet, monitored_decoded_packet);
+      bit_destuffing(monitored_decoded_packet, valid_stuffing, destuffed_packet);
+      classifies_packet(low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet,
+                        from_driver);
+    end
   endtask
 
 
@@ -417,42 +442,76 @@ class usb20_monitor extends dv_base_monitor #(
   function void classifies_packet(bit low_speed, bit valid_sync, bit valid_eop, bit valid_stuffing,
                                   ref bit destuffed_packet[$], input bit from_driver);
     // Read the Packet IDentifier and check its validity.
-    pid_type_e pid_e;
+    int unsigned pmax = destuffed_packet.size();
+    bit pid_complete = (pmax >= 16);
     bit [7:0] pid;
-    for (int i = 0; i < 8; i++) begin
-      pid[i] = destuffed_packet[i + 8];
+    if (pid_complete) pmax = 16;
+    // Collect all of the PID bits present.
+    for (int i = 8; i < pmax; i++) begin
+      pid[i - 8] = destuffed_packet[i];
     end
     `uvm_info(`gfn, $sformatf(".......Packet PID = %b", pid), UVM_HIGH)
-    pid_e = pid_type_e'(pid);
-    case (pid)
-      // Token PID Types.
-      PidTypeOutToken,
-      PidTypeInToken,
-      PidTypeSetupToken: begin
-        `DV_CHECK_EQ(from_driver, 1'b1, "Only driver should transmit token packets")
-        token_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet);
-      end
-      PidTypeSofToken: begin
-        `DV_CHECK_EQ(from_driver, 1'b1, "Only driver should transmit SOF packets")
-         sof_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet);
-      end
-      // Data PID Types.
-      PidTypeData0,
-      PidTypeData1,
-      PidTypeData2,
-      PidTypeMData: data_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
-                                destuffed_packet, from_driver);
-      // Handshake PID Types.
-      PidTypeAck,
-      PidTypeNak,
-      PidTypeStall,
-      PidTypeNyet: handshake_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
-                                    destuffed_packet, from_driver);
-
-      // Invalid PIDs are only those produced by fault injection, or DUT error.
-      default: invalid_packet_pid(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
+    if (pid_complete) begin
+      pid_type_e pid_e = pid_type_e'(pid);
+      case (pid)
+        // Token PID Types.
+        PidTypeOutToken,
+        PidTypeInToken,
+        PidTypeSetupToken: begin
+          `DV_CHECK_EQ(from_driver, 1'b1, "Only driver should transmit token packets")
+          token_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet);
+        end
+        PidTypeSofToken: begin
+          `DV_CHECK_EQ(from_driver, 1'b1, "Only driver should transmit SOF packets")
+           sof_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing, destuffed_packet);
+        end
+        // Data PID Types.
+        PidTypeData0,
+        PidTypeData1,
+        PidTypeData2,
+        PidTypeMData: data_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
                                   destuffed_packet, from_driver);
-    endcase
+        // Handshake PID Types.
+        PidTypeAck,
+        PidTypeNak,
+        PidTypeStall,
+        PidTypeNyet: handshake_packet(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
+                                      destuffed_packet, from_driver);
+
+        // Invalid PIDs are only those produced by fault injection, or DUT error.
+        default: invalid_packet_pid(pid_e, low_speed, valid_sync, valid_eop, valid_stuffing,
+                                    destuffed_packet, from_driver);
+      endcase
+    end else begin
+      // Packets that are too short to include a valid PID may be produced by some sequences that
+      // disrupt transmission to inject a bus event; treat these as token packets. It's impossible
+      // to tell really in some cases.
+      if (cfg.rtl_limited_crc_checking && pmax <= 15) begin
+        if (pmax == 15 && pid[0]) begin
+          // The RTL does not check for the completeness of the PID before raising a crc5/16_error.
+          // Specifically if 7 bits of the PID have been received then the LSB will determine
+          // whether an incomplete packet is regarded as a token packet or data packet for the
+          // purpose of raising spurious CRC errors. (usb_fs_rx.sv:521).
+          pid[7] = pid[3];  // Ensure the PID is invalid; only the first 7 bits have been read.
+          data_packet(pid_type_e'(pid), low_speed, valid_sync, valid_eop, valid_stuffing,
+                      destuffed_packet, from_driver);
+        end else begin
+          pid[7:4] = pid[3:0];  // Ensure the PID is invalid, but perhaps leave a clue.
+          if (pmax == 15) begin
+            token_packet(pid_type_e'(pid), low_speed, valid_sync, valid_eop, valid_stuffing,
+                         destuffed_packet);
+          end else begin
+            // If even the PID is not complete then we do not expect a CRC error.
+            handshake_packet(pid_type_e'(pid), low_speed, valid_sync, valid_eop, valid_stuffing,
+                             destuffed_packet, from_driver);
+          end
+        end
+      end else begin
+        pid[7:4] = pid[3:0];  // Ensure the PID is invalid, but perhaps leave a clue as to its type.
+        token_packet(pid_type_e'(pid), low_speed, valid_sync, valid_eop, valid_stuffing,
+                     destuffed_packet);
+      end
+    end
   endfunction
 
 //-------------------------------------------SOF Packet-------------------------------------------//
diff --git a/hw/dv/tools/dvsim/bazel.hjson b/hw/dv/tools/dvsim/bazel.hjson
index 407bfb119bf38..09578cf042437 100644
--- a/hw/dv/tools/dvsim/bazel.hjson
+++ b/hw/dv/tools/dvsim/bazel.hjson
@@ -2,6 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 {
-  sw_build_cmd: "bazel"
+  sw_build_cmd: [
+    "python",
+    "{proj_root}/util/py/scripts/build_sw_collateral_for_sim.py",
+	  "--sw-images='{sw_images}'",
+	  "--sw-build-opts='{sw_build_opts}'",
+	  "--sw-build-device={sw_build_device}",
+	  "--seed={seed}",
+	  "--run-dir={run_dir}",
+  ]
   sw_build_opts: []
 }
diff --git a/hw/dv/tools/dvsim/sim.mk b/hw/dv/tools/dvsim/sim.mk
index 23822cb1aca7d..3054a5aa6552f 100644
--- a/hw/dv/tools/dvsim/sim.mk
+++ b/hw/dv/tools/dvsim/sim.mk
@@ -15,7 +15,7 @@ all: build run
 build: build_result
 
 pre_build:
-	@echo "[make]: pre_build"
+	@echo -e "\n[make]: pre_build"
 	mkdir -p ${build_dir}
 ifneq (${pre_build_cmds},)
 	# pre_build_cmds are likely changing the in-tree sources. We hence use FLOCK
@@ -26,178 +26,51 @@ ifneq (${pre_build_cmds},)
 endif
 
 gen_sv_flist: pre_build
-	@echo "[make]: gen_sv_flist"
+	@echo -e "\n[make]: gen_sv_flist"
 ifneq (${sv_flist_gen_cmd},)
 	cd ${build_dir} && ${sv_flist_gen_cmd} ${sv_flist_gen_opts}
 endif
 
 do_build: gen_sv_flist
-	@echo "[make]: build"
+	@echo -e "\n[make]: build"
 	cd ${sv_flist_gen_dir} && ${build_cmd} ${build_opts}
 
 post_build: do_build
-	@echo "[make]: post_build"
+	@echo -e "\n[make]: post_build"
 ifneq (${post_build_cmds},)
 	cd ${build_dir} && ${post_build_cmds}
 endif
 
 build_result: post_build
-	@echo "[make]: build_result"
+	@echo -e "\n[make]: build_result"
 
 run: run_result
 
 pre_run:
-	@echo "[make]: pre_run"
+	@echo -e "\n[make]: pre_run"
 	mkdir -p ${run_dir}
 ifneq (${pre_run_cmds},)
 	cd ${run_dir} && ${pre_run_cmds}
 endif
 
 sw_build: pre_run
-	@echo "[make]: sw_build"
+	@echo -e "\n[make]: sw_build"
 ifneq (${sw_images},)
-	# Loop through the list of sw_images and invoke Bazel on each.
-	# `sw_images` is a space-separated list of tests to be built into an image.
-	# Optionally, each item in the list can have additional metadata / flags using
-	# the delimiter ':'. The format is as follows:
-	# <Bazel label>:<index>:<flag1>:<flag2>
-	#
-	# If one delimiter is detected, then the full string is considered to be the
-	# <Bazel label>. If two delimiters are detected, then it must be <Bazel label>
-	# followed by <index>. The <flag> is considered optional.
-	#
-	# After the images are built, we use `bazel cquery ...` to locate the built
-	# software artifacts so they can be copied to the test bench run directory.
-	# We only copy device SW images, and do not copy host-side artifacts (like
-	# opentitantool) that are also dependencies of the Bazel test target that
-	# encode the software image targets.
-	set -e; \
-	for sw_image in ${sw_images}; do \
-		if [[ -z $$sw_image ]]; then \
-			echo "ERROR: SW image \"$$sw_image\" is malformed."; \
-			echo "Expected format: <Bazel label>:<index>:<optional-flags>."; \
-			exit 1; \
-		fi; \
-		prebuilt_path=`echo $$sw_image | cut -d: -f 1`; \
-		bazel_target=`echo $$sw_image | cut -d: -f 2`; \
-		index=`echo $$sw_image | cut -d: -f 3`; \
-		flags=(`echo $$sw_image | cut -d: -f 4- --output-delimiter " "`); \
-		bazel_label="`echo $$sw_image | cut -d: -f 1-2`"; \
-		if [[ $${index} != 4 && $${index} != 5 ]]; then \
-			if [[ $${flags[@]} =~ "silicon_creator" ]]; then \
-				bazel_label="$${bazel_label}_silicon_creator"; \
-			else \
-				bazel_label="$${bazel_label}_$${sw_build_device}"; \
-			fi; \
-			bazel_cquery="labels(data, $${bazel_label}) union labels(srcs, $${bazel_label})"; \
-		else \
-			bazel_cquery="$${bazel_label}"; \
-		fi; \
-		cd ${proj_root}; \
-		if [[ $${flags[@]} =~ "prebuilt" ]]; then \
-			echo "SW image \"$$bazel_label\" is prebuilt - copying sources."; \
-			cp ${proj_root}/$${prebuilt_path} $${run_dir}/`basename $${prebuilt_path}`; \
-		else \
-			echo "Building SW image \"$${bazel_label}\"."; \
-			bazel_airgapped_opts=""; \
-			bazel_opts="${sw_build_opts} --define DISABLE_VERILATOR_BUILD=true"; \
-			bazel_opts+=" --//hw/ip/otp_ctrl/data:img_seed=${seed}"; \
-			if [[ "${build_seed}" != "None" ]]; then \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:lc_seed=${build_seed}"; \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:otp_seed=${build_seed}"; \
-			fi; \
-			if [[ -n $${BAZEL_OTP_DATA_PERM_FLAG} ]]; then \
-				bazel_opts+=" --//hw/ip/otp_ctrl/data:data_perm=$${BAZEL_OTP_DATA_PERM_FLAG}"; \
-			fi; \
-			if [[ -z $${BAZEL_PYTHON_WHEELS_REPO} ]]; then \
-				echo "Building \"$${bazel_label}\" on network connected machine."; \
-				bazel_cmd="./bazelisk.sh"; \
-			else \
-				echo "Building \"$${bazel_label}\" on air-gapped machine."; \
-				bazel_airgapped_opts+=" --define SPECIFY_BINDGEN_LIBSTDCXX=true"; \
-				bazel_airgapped_opts+=" --distdir=$${BAZEL_DISTDIR}"; \
-				bazel_airgapped_opts+=" --repository_cache=$${BAZEL_CACHE}"; \
-				bazel_cmd="bazel"; \
-			fi; \
-			echo "Building with command: $${bazel_cmd} build $${bazel_opts} $${bazel_label}"; \
-			$${bazel_cmd} build $${bazel_airgapped_opts} $${bazel_opts} $${bazel_label}; \
-			kind=$$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
-				$${bazel_label} \
-				--ui_event_filters=-info \
-				--noshow_progress \
-				--output=label_kind | cut -f1 -d' '); \
-			if [[ $${kind} == "opentitan_test" ]]; then \
-				for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
-					$${bazel_label} \
-					--ui_event_filters=-info \
-					--noshow_progress \
-					--output=starlark \
-					`# An opentitan_test rule has all of its needed files in its runfiles.` \
-					--starlark:expr='"\n".join([f.path for f in target.data_runfiles.files.to_list()])'); do \
-						cp -f $${artifact} $${run_dir}/$$(basename $${artifact}); \
-						if [[ $$artifact == *.bin && \
-							-f "$$(echo $${artifact} | cut -d. -f 1).elf" ]]; then \
-							cp -f "$$(echo $${artifact} | cut -d. -f 1).elf" \
-								$${run_dir}/$$(basename -s .bin $${artifact}).elf; \
-						fi; \
-				done; \
-			elif [[ $${kind} == "alias" || $${kind} == "opentitan_binary" ]]; then \
-				for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
-					$${bazel_label} \
-					--ui_event_filters=-info \
-					--noshow_progress \
-					--output=starlark \
-					`# An opentitan_binary rule has all of its needed files in its runfiles.` \
-					--starlark:expr='"\n".join([f.path for f in target.files.to_list()])'); do \
-						cp -f $${artifact} $${run_dir}/$$(basename $${artifact}); \
-						if [[ $$artifact == *.bin && \
-							-f "$$(echo $${artifact} | cut -d. -f 1).elf" ]]; then \
-							cp -f "$$(echo $${artifact} | cut -d. -f 1).elf" \
-								$${run_dir}/$$(basename -s .bin $${artifact}).elf; \
-						fi; \
-				done; \
-			else \
-				for dep in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} \
-					$${bazel_cquery} \
-					--ui_event_filters=-info \
-					--noshow_progress \
-					--output=starlark \
-					`# Bazel 6 cquery outputs repository targets in canonical format (@//blabla) whereas bazel 5 does not, ` \
-					`# so we use a custom starlark printer to remove in leading @ when needed.` \
-					--starlark:expr='str(target.label)[1:] if str(target.label).startswith("@//") else target.label'); do \
-					if [[ $$dep == //hw/ip/otp_ctrl/data* ]] || \
-					  ([[ $$dep != //hw* ]] && [[ $$dep != //util* ]] && [[ $$dep != //sw/host* ]]); then \
-						for artifact in $$($${bazel_cmd} cquery $${bazel_airgapped_opts} $${dep} \
-							--ui_event_filters=-info \
-							--noshow_progress \
-							--output=starlark \
-							--starlark:expr="\"\\n\".join([f.path for f in target.files.to_list()])"); do \
-							cp -f $${artifact} $${run_dir}/$$(basename $${artifact}); \
-							if [[ $$artifact == *.bin && \
-								-f "$$(echo $${artifact} | cut -d. -f 1).elf" ]]; then \
-								cp -f "$$(echo $${artifact} | cut -d. -f 1).elf" \
-									$${run_dir}/$$(basename -s .bin $${artifact}).elf; \
-							fi; \
-						done; \
-					fi; \
-				done; \
-			fi; \
-		fi; \
-	done;
+	cd ${proj_root} && ${sw_build_cmd} --build-seed=${build_seed}
 endif
 
 simulate: sw_build
-	@echo "[make]: simulate"
+	@echo -e "\n[make]: simulate"
 	cd ${run_dir} && ${run_cmd} ${run_opts}
 
 post_run: simulate
-	@echo "[make]: post_run"
+	@echo -e "\n[make]: post_run"
 ifneq (${post_run_cmds},)
 	cd ${run_dir} && ${post_run_cmds}
 endif
 
 run_result: post_run
-	@echo "[make]: run_result"
+	@echo -e "\n[make]: run_result"
 
 #######################
 ## Load waves target ##
@@ -209,19 +82,20 @@ debug_waves:
 ## coverage rated targets ##
 ############################
 cov_unr_build: gen_sv_flist
-	@echo "[make]: cov_unr_build"
+	@echo -e "\n[make]: cov_unr_build"
 	cd ${sv_flist_gen_dir} && ${cov_unr_build_cmd} ${cov_unr_build_opts}
 
 cov_unr_vcs: cov_unr_build
-	@echo "[make]: cov_unr"
+	@echo -e "\n[make]: cov_unr"
 	cd ${sv_flist_gen_dir} && ${cov_unr_run_cmd} ${cov_unr_run_opts}
 
 cov_unr_xcelium:
-	@echo "[make]: cov_unr"
+	@echo -e "\n[make]: cov_unr"
 	mkdir -p ${cov_unr_dir}
 	cd ${cov_unr_dir} && ${cov_unr_run_cmd} ${cov_unr_run_opts}
 
 cov_unr_merge:
+	@echo -e "\n[make]: cov_unr_merge"
 	cd ${cov_unr_dir} && ${job_prefix} ${cov_merge_cmd} -init ${cov_unr_dir}/jgproject/sessionLogs/session_0/unr_imc_coverage_merge.cmd
 
 ifeq (${SIMULATOR}, xcelium)
@@ -232,17 +106,17 @@ endif
 
 # Merge coverage if there are multiple builds.
 cov_merge:
-	@echo "[make]: cov_merge"
+	@echo -e "\n[make]: cov_merge"
 	${job_prefix} ${cov_merge_cmd} ${cov_merge_opts}
 
 # Generate coverage reports.
 cov_report:
-	@echo "[make]: cov_report"
+	@echo -e "\n[make]: cov_report"
 	${cov_report_cmd} ${cov_report_opts}
 
 # Open coverage tool to review and create report or exclusion file.
 cov_analyze:
-	@echo "[make]: cov_analyze"
+	@echo -e "\n[make]: cov_analyze"
 	${cov_analyze_cmd} ${cov_analyze_opts}
 
 .PHONY: build \
diff --git a/hw/dv/tools/dvsim/vcs.hjson b/hw/dv/tools/dvsim/vcs.hjson
index b11e601f81442..5d98d5d9500c2 100644
--- a/hw/dv/tools/dvsim/vcs.hjson
+++ b/hw/dv/tools/dvsim/vcs.hjson
@@ -38,6 +38,15 @@
                // and final value of the selection input at the end of a simulation timestep.
                // See https://github.com/lowRISC/ibex/issues/845.
                "-xlrm uniq_prior_final",
+               // Newer compiler versions have escalated these warnings into an error by default, and
+               // VCS generates code to build the simulation executable which fails these checks.
+               // De-escalate the error (only when building the simv itself.)
+               // > rmapats.c:20:9: error: implicit declaration of function 'vcs_simpSetEBlkEvtID'
+               // >  [-Wimplicit-function-declaration]
+               // > rmapats.c:466:36: error: passing argument 1 of 'setChildClockWriteFuncAndPcode' makes
+               // > integer from pointer without a cast
+               // >  [-Wint-conversion]
+               "-Xcflags='-Wno-error=implicit-function-declaration -Wno-error=int-conversion'",
                // Force DPI-C compilation in C99 mode. The -fno-extended-identifiers flag tells g++
                // not to worry about unicode. For some bizarre reason, the VCS DPI code contains
                // preprocessor macros with smart quotes, which causes GCC 10.2 and later to choke
@@ -45,10 +54,9 @@
                // that gets passed to Make (stripping one level of quotes), and then needs to
                // result in an argument with an embedded space (the other one).
                "-CFLAGS --std=c99 -CFLAGS -fno-extended-identifiers",
-               // C++11 standard is enforced for all sources, including the DPI-C constructs.
-               // TODO, may need to update to c++14 to meet our requirements
+               // C++17 standard is enforced for all sources, including the DPI-C constructs.
                // Refer to https://docs.opentitan.org/doc/ug/install_instructions
-               "-CFLAGS --std=c++11",
+               "-CFLAGS --std=c++17",
                // Without this magic LDFLAGS argument below, we get compile time errors with
                // VCS on Google Linux machines that look like this:
                // .../libvcsnew.so: undefined reference to `snpsReallocFunc'
diff --git a/hw/formal/tools/jaspergold/conn.tcl b/hw/formal/tools/jaspergold/conn.tcl
index 8542c2c08ebc6..4ac33312ed40c 100644
--- a/hw/formal/tools/jaspergold/conn.tcl
+++ b/hw/formal/tools/jaspergold/conn.tcl
@@ -51,10 +51,15 @@ elaborate -top $env(DUT_TOP)
 
 # Currently only for top_earlgrey
 if {$env(DUT_TOP) == "chip_earlgrey_asic"} {
-  # Because in JasperGold we can only drive primary inputs. We put a stopat to
-  # aovid clock input from being driven internally.
+  # Because in JasperGold we can only drive primary inputs, we put a stopat to
+  # avoid the clock and reset inputs from being driven internally. Any logic
+  # driving these signals is not included in the analysis. This includes e.g.:
+  # - The disablement of the AST external clock input on IOC6. This is an MIO.
+  # - The pull-up functionality on the power-on reset input pin which is
+  #   enabled by default.
   stopat -env IOC6
   clock IOC6
+  stopat -env POR_N
   reset -expr {POR_N}
   # Add this assumption to avoid a false functional loop.
   assume -env {top_earlgrey.u_pinmux_aon.reg2hw.mio_pad_sleep_status == '1}
diff --git a/hw/ip/aes/pre_dv/aes_cipher_core_tb/aes_cipher_core_tb.core b/hw/ip/aes/pre_dv/aes_cipher_core_tb/aes_cipher_core_tb.core
index f72890d9c2058..d9df99f48109b 100644
--- a/hw/ip/aes/pre_dv/aes_cipher_core_tb/aes_cipher_core_tb.core
+++ b/hw/ip/aes/pre_dv/aes_cipher_core_tb/aes_cipher_core_tb.core
@@ -43,7 +43,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_cipher_core_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_cipher_core_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # XXX: Cleanup all warnings and remove this option
diff --git a/hw/ip/aes/pre_dv/aes_sbox_tb/aes_sbox_tb.core b/hw/ip/aes/pre_dv/aes_sbox_tb/aes_sbox_tb.core
index 3ef9b2b858854..da97f17615dc1 100644
--- a/hw/ip/aes/pre_dv/aes_sbox_tb/aes_sbox_tb.core
+++ b/hw/ip/aes/pre_dv/aes_sbox_tb/aes_sbox_tb.core
@@ -43,7 +43,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_sbox_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_sbox_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # XXX: Cleanup all warnings and remove this option
diff --git a/hw/ip/aes/pre_dv/aes_wrap_tb/aes_wrap_tb.core b/hw/ip/aes/pre_dv/aes_wrap_tb/aes_wrap_tb.core
index 593344d5ea77b..37f3a1bfa7492 100644
--- a/hw/ip/aes/pre_dv/aes_wrap_tb/aes_wrap_tb.core
+++ b/hw/ip/aes/pre_dv/aes_wrap_tb/aes_wrap_tb.core
@@ -43,7 +43,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_wrap_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=aes_wrap_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # XXX: Cleanup all warnings and remove this option
diff --git a/hw/ip/csrng/README.md b/hw/ip/csrng/README.md
index ddbf805510615..d16f254c4dd18 100644
--- a/hw/ip/csrng/README.md
+++ b/hw/ip/csrng/README.md
@@ -60,17 +60,15 @@ The CSRNG IP consists of four main components:
 2. The CTR_DRBG state-machine (`ctr_drbg_fsm`) which drives the AES primitive, performing the various encryption sequences prescribed for approved DRBGs in SP 800-90A.
 These include:
 
-    1. **The Derivation Function:**
-       Part of the instantiation and reseed routines, this routine assembles the previous seed material (on reseed only), application inputs, and entropy.
-    2. **The Instantiation Routine:**
-       Combines application inputs, external entropy and nonce (more entropy) via the derivation function.
-    3. **The Reseed Routine:**
-       Combines the previous seed material with external entropy to generate a new seed.
-    4. **The Generate Routine:**
-       Generates up to CSRNG_MAX_GENERATE random bits.
-       If called with prediction_resistance_flag, forces a reseed.
-    5. **The Update Routine:**
-       Updates the internal state of the DRNG instance after each generate call.
+    1. **The Instantiation Routine:**
+       Takes external entropy and/or additional data (personalization string) to instantiate the DRNG instance.
+    1. **The Reseed Routine:**
+       Combines the previous seed material with external entropy and/or additional data (personalization string) to generate a new seed.
+    1. **The Generate Routine:**
+       Generates up to 4095 * 128 random bits, which is less than the maximum 2<sup>19</sup> bits allowed by NIST (referenced to as <tt>max_number_of_bits_per_request</tt>).
+    1. **The Update Routine:**
+       Updates the internal state of the DRNG instance.
+       It is automatically executed during instantiate, reseed and generate calls, but can also be explicitly called to combine additional data with the internal state of the DRNG instance.
 3. State vectors for each DRNG instance.
 4. Interface logic and access control for each instance.
 
diff --git a/hw/ip/csrng/doc/programmers_guide.md b/hw/ip/csrng/doc/programmers_guide.md
index 32942a80216f8..b3e0fad0b7e8a 100644
--- a/hw/ip/csrng/doc/programmers_guide.md
+++ b/hw/ip/csrng/doc/programmers_guide.md
@@ -4,9 +4,31 @@ This section discusses how software can interface with CSRNG.
 
 ## Module enable and disable
 
-CSRNG may only be enabled if `ENTROPY_SRC` is enabled.
 CSRNG may only be disabled if all EDNs are disabled.
-Once disabled, CSRNG may only be re-enabled after `ENTROPY_SRC` has been disabled and re-enabled.
+
+The recommended enable sequence for the entropy complex is to first enable ENTROPY_SRC, then CSRNG, and finally the EDNs.
+
+## Running CSRNG with ENTROPY_SRC disabled
+
+Once the entropy complex has been enabled and all configured CSRNG instances have been seeded with entropy, software can again disable ENTROPY_SRC (and the PTRNG noise source to e.g. save power) while CSRNG and the EDNs remain running to keep serving entropy to consumers.
+
+Depending on the mode in which the CSRNG instance is running, software can use a different mechanism to efficiently operate the entropy complex without having the ENTROPY_SRC continuously running:
+
+### Regular, non-deterministic mode
+
+If a CSRNG instance is running in regular, non-deterministic mode (`flag0` being false, see [Generated Bits (`genbits`) Interface](theory_of_operation.md#generated-bits-genbits-interface) for details), the `cs_entropy_req` interrupt will assert whenever the instance requests entropy from ENTROPY_SRC.
+Once software observes the interrupt, it has to enable ENTROPY_SRC.
+The ENTROPY_SRC block will then perform the startup health testing and eventually deliver a new seed to the CSRNG instance.
+Note that the startup health testing may take a non-negligible time (see [Startup Health Testing](../../entropy_src/doc/theory_of_operation.md#startup-health-testing) during which the CSRNG instance is blocked.
+Thus, it is recommended that software tracks the age of the seed currently in use via the corresponding [`RESEED_COUNTER`](registers.md#reseed_counter) register to re-enable ENTROPY_SRC ahead of the `cs_entropy_req` interrupt firing.
+
+### Fully deterministic mode
+
+For CSRNG instances running in fully deterministic mode (`flag0` being true, see [Generated Bits (`genbits`) Interface](theory_of_operation.md#generated-bits-genbits-interface) for details), software has to provide entropy for instantiation and reseeding via the additional data field of the <tt>instantiate</tt> and <tt>reseed</tt> command, respectively.
+If no additional data is provided, CSRNG will use an all-zero seed.
+Additional entropy can be provided via the additional data field of every <tt>generate</tt> command.
+The entropy to be provided to these commands can for example be generated by running the ENTROPY_SRC block in a dedicated mode, see [Reading Entropy Output](../../entropy_src/doc/programmers_guide.md#reading-entropy-output) for details.
+Software is recommended to manage a buffer of seeds which is filled whenever it enables ENTROPY_SRC in this mode to reduce the duty cycle of ENTROPY_SRC (and the PTRNG noise source) thereby improving power efficiency and latency.
 
 ## Endianness and Known-Answer Tests
 
diff --git a/hw/ip/csrng/doc/theory_of_operation.md b/hw/ip/csrng/doc/theory_of_operation.md
index 2b226a9fb7bcd..a3d2b455d8c46 100644
--- a/hw/ip/csrng/doc/theory_of_operation.md
+++ b/hw/ip/csrng/doc/theory_of_operation.md
@@ -308,16 +308,18 @@ This initial seed is tested to ensure some minimum quality for obfuscation use-
 
 #### Handshaking signals
 
-The application command signal `csrng_req_bus` is accompanied by a `csrng_valid_signal`, which is asserted by the requester when the command is valid.
-CSRNG may stall incoming commands by de-asserting the `csrng_req_ready` signal.
+The application interface signal `csrng_req_t` comprises a `csrng_req_valid` bit, which is asserted by the requester when the command request on `csrng_req_bus` is valid.
+CSRNG may stall incoming commands by de-asserting the `csrng_req_ready` bit of the `csrng_rsp_t` signal.
 A command is considered received whenever both `csrng_req_valid` and `csrng_req_ready` are asserted in the same clock cycle.
 
-Likewise a requester must only consider data on the `genbits` bus to be valid when the `genbits_valid` signal is asserted, and should assert `genbits_ready` whenever it is ready to accept the `genbits` data.
-The `genbits` data is considered successfully transmitted whenever `genbits_valid` and `genbits_ready` are asserted in the same clock cycle.
+Likewise a requester must only consider data on the `genbits_bus` signal to be valid when the `genbits_valid` signal is asserted, and should assert `genbits_ready` whenever it is ready to accept the data on `genbits_bus`.
+The `genbits_bus` data is considered successfully transmitted whenever `genbits_valid` and `genbits_ready` are asserted in the same clock cycle.
 
-A requester must always be ready to receive `csrng_req_sts` signals.
+A requester must always be ready to receive `csrng_rsp_ack` and `csrng_rsp_sts` signals.
 (There is no "ready" signal for command response messages sent to hardware.)
 
+**NOTE**: Between the command request handshake involving `csrng_req_valid/ready` and between signaling the command response on `csrng_rsp_ack/sts`, the application interface does not accept further commands.
+
 #### Waveforms
 
 ##### Application Interface: Instantiate Request
@@ -365,6 +367,11 @@ A requester must always be ready to receive `csrng_req_sts` signals.
 ]}
 ```
 
+**NOTE**: Between the command request handshake involving `csrng_req_valid/ready` and between signaling the command response on `csrng_rsp_ack/sts`, the application interface does not accept further commands including `uninstantiate` commands.
+For `generate` commands, this means the requestor has to first consume all entropy generated from the current command.
+Depending on the configuration of the system, this may take a very long time.
+For details on how to accelerate this process, refer to [Uninstantiating CSRNG through EDN](../../edn/doc/programmers_guide.md#uninstantiating-csrng-through-edn).
+
 ##### Application Interface:  Update Request
 
 ```wavejson
diff --git a/hw/ip/csrng/dv/cov/csrng_cov_if.sv b/hw/ip/csrng/dv/cov/csrng_cov_if.sv
index 6e0c2552938b7..fb1c74bdaa8b8 100644
--- a/hw/ip/csrng/dv/cov/csrng_cov_if.sv
+++ b/hw/ip/csrng/dv/cov/csrng_cov_if.sv
@@ -212,8 +212,12 @@ interface csrng_cov_if (
     }
 
     cp_sw_cmd_sts_cmd_sts: coverpoint u_reg.sw_cmd_sts_cmd_sts_qs {
-      bins success = { 1'b0 };
-      bins error   = { 1'b1 };
+      bins success             = { CMD_STS_SUCCESS };
+      bins invalid_acmd        = { CMD_STS_INVALID_ACMD };
+      // TODO(#24224): Uncomment or delete this line based on the decision in the issue.
+      // bins invalid_gen_cmd     = { CMD_STS_INVALID_GEN_CMD };
+      bins invalid_cmd_seq     = { CMD_STS_INVALID_CMD_SEQ };
+      bins reseed_cnt_exceeded = { CMD_STS_RESEED_CNT_EXCEEDED };
     }
 
   endgroup : csrng_sts_cg
diff --git a/hw/ip/csrng/dv/env/csrng_env_cfg.sv b/hw/ip/csrng/dv/env/csrng_env_cfg.sv
index 3292983bd535a..0bdae4cd38ea2 100644
--- a/hw/ip/csrng/dv/env/csrng_env_cfg.sv
+++ b/hw/ip/csrng/dv/env/csrng_env_cfg.sv
@@ -66,6 +66,15 @@ class csrng_env_cfg extends cip_base_env_cfg #(.RAL_T(csrng_reg_block));
   int NApps = NHwApps + 1;
   int Sp2VWidth = 3;
 
+  rand csrng_pkg::acmd_e which_cmd_inv_seq;
+  constraint  which_cmd_inv_seq_c { which_cmd_inv_seq inside {INS, RES, GEN, UPD};}
+
+  rand csrng_pkg::acmd_e which_invalid_acmd;
+  constraint  which_invalid_acmd_c { which_invalid_acmd inside {INV, GENB, GENU};}
+
+  rand bit [31:0] reseed_interval;
+  constraint  reseed_interval_c { reseed_interval inside {[1:10]};}
+
   rand uint   which_app_err_alert;
   constraint  which_app_err_alert_c { which_app_err_alert inside {[0:NApps-1]};}
 
diff --git a/hw/ip/csrng/dv/env/seq_lib/csrng_intr_vseq.sv b/hw/ip/csrng/dv/env/seq_lib/csrng_intr_vseq.sv
index 4c3df89924e9d..fdbebe68a0fe4 100644
--- a/hw/ip/csrng/dv/env/seq_lib/csrng_intr_vseq.sv
+++ b/hw/ip/csrng/dv/env/seq_lib/csrng_intr_vseq.sv
@@ -12,48 +12,7 @@ class csrng_intr_vseq extends csrng_base_vseq;
 
   csrng_item   cs_item;
   string       path1, path2, path3, path4, path_push, path_full, path_pop, path_not_empty, path;
-
-  // TODO(#22869): Instead of forcing ack_sts, actually generate the different error conditions.
-  task force_ack_and_ack_sts(int inst_idx, csrng_cmd_sts_e cmd_status);
-    bit [31:0] value_ack_sts;
-    string path_ack, path_ack_sts;
-
-    // Get paths
-    // ack is a 1D packed array - 1 bit per instance
-    path_ack = $sformatf("tb.dut.u_csrng_core.cmd_stage_ack[%0d]", inst_idx);
-    // ack_sts is a 1D packed array of enums -> a 2D packed array where the first packed dimension
-    // indexes the enum
-    path_ack_sts = "tb.dut.u_csrng_core.cmd_stage_ack_sts";
-
-    // Check paths and read the current ack_sts value
-    if (!uvm_hdl_check_path(path_ack)) begin
-      `uvm_fatal(`gfn, $sformatf("Path %s not found", path_ack))
-    end
-    if (!uvm_hdl_check_path(path_ack_sts)) begin
-      `uvm_fatal(`gfn, $sformatf("Path %s not found", path_ack_sts))
-    end else if (!uvm_hdl_read(path_ack_sts, value_ack_sts)) begin
-      `uvm_error(`gfn, $sformatf("Path %s could not be read", path_ack_sts))
-    end
-
-    // Inject the defined status bits at the correct positon.
-    // ack_sts is a 1D packed array of enums. This corresponds to a 2D packed array where the first
-    // packed dimension indexes the enum. We have to interpret this as a flat 1D packed array.
-    value_ack_sts =
-        value_ack_sts & ~({CSRNG_CMD_STS_WIDTH{1'b1}} << (CSRNG_CMD_STS_WIDTH * inst_idx));
-    value_ack_sts = value_ack_sts | ({cmd_status} << (CSRNG_CMD_STS_WIDTH * inst_idx));
-
-    // Force signals
-    if (!uvm_hdl_force(path_ack, 1'b1)) begin
-      `uvm_error(`gfn, $sformatf("Path %s could not be forced", path_ack))
-    end else begin
-      `uvm_info(`gfn, $sformatf("Path %s forced to 1", path_ack), UVM_MEDIUM)
-    end
-    if (!uvm_hdl_force(path_ack_sts, value_ack_sts)) begin
-      `uvm_error(`gfn, $sformatf("Path %s could not be forced", path_ack))
-    end else begin
-      `uvm_info(`gfn, $sformatf("Path %s forced to %b", path_ack_sts, value_ack_sts), UVM_MEDIUM)
-    end
-  endtask
+  bit [31:0]   backdoor_err_code_val;
 
   task release_ack_and_ack_sts(int inst_idx);
     string path_ack, path_ack_sts;
@@ -134,46 +93,101 @@ class csrng_intr_vseq extends csrng_base_vseq;
     send_cmd_req(SW_APP, cs_item);
   endtask // test_cs_entropy_req
 
-  task test_cs_sw_cmd_sts();
-    // TODO(#22869): Instead of forcing ack_sts, actually generate the different error conditions.
-    // Force error on SW instance
-    force_ack_and_ack_sts(2, CMD_STS_INVALID_CMD_SEQ);
-    // Wait for SW_CMD_STS getting set
-    csr_spinwait(.ptr(ral.sw_cmd_sts.cmd_sts), .exp_data(CMD_STS_INVALID_CMD_SEQ));
-    cov_vif.cg_err_code_sample(.err_code(32'b0));
-    release_ack_and_ack_sts(2);
-  endtask
+  task trigger_invalid_acmd_sts_err(uint app);
+    // Write an invalid command and expect the corresponding status response.
+    cs_item.randomize();
+    cs_item.clen  = 'h0;
+    cs_item.acmd  = cfg.which_invalid_acmd;
+    `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+    send_cmd_req(app, cs_item, .exp_sts(CMD_STS_INVALID_ACMD));
+
+    if (app != SW_APP) begin
+      // Expect/Clear interrupt bit
+      check_interrupts(.interrupts((1 << HwInstExc)), .check_set(1'b1));
+      cfg.clk_rst_vif.wait_clks(100);
+      // Make sure the interrupt bit is cleared
+      csr_rd_check(.ptr(ral.intr_state.cs_hw_inst_exc), .compare_value(1'b0));
+    end
 
-  task test_cs_hw_inst_exc();
-    // TODO(#22869): Instead of forcing ack_sts, actually generate the different error conditions.
-    bit [31:0] backdoor_err_code_val;
+    csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
+    cov_vif.cg_err_code_sample(.err_code(backdoor_err_code_val));
+  endtask // trigger_invalid_acmd_sts_err
+
+  task trigger_invalid_seq_sts_err(uint app);
+    // Write an invalid sequence of commands and expect the corresponding status response.
+    if (cfg.which_cmd_inv_seq == INS) begin
+      cs_item.randomize();
+      cs_item.acmd  = cfg.which_cmd_inv_seq;
+      `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+      send_cmd_req(app, cs_item);
+    end
 
-    // Force error on HW instance 0.
-    force_ack_and_ack_sts(0, CMD_STS_INVALID_CMD_SEQ);
-    // Wait for cs_hw_inst_exc interrupt
-    csr_spinwait(.ptr(ral.intr_state.cs_hw_inst_exc), .exp_data(1'b1));
-    cov_vif.cg_err_code_sample(.err_code(32'b0));
+    cs_item.randomize();
+    cs_item.acmd  = cfg.which_cmd_inv_seq;
+    cs_item.clen  = 'h0;
+    `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+    send_cmd_req(app, cs_item, .exp_sts(CMD_STS_INVALID_CMD_SEQ), .await_genbits(0));
+
+    if (app != SW_APP) begin
+      // Expect/Clear interrupt bit
+      check_interrupts(.interrupts((1 << HwInstExc)), .check_set(1'b1));
+      cfg.clk_rst_vif.wait_clks(100);
+      // Make sure the interrupt bit is cleared
+      csr_rd_check(.ptr(ral.intr_state.cs_hw_inst_exc), .compare_value(1'b0));
+    end
 
-    // Force errors on both HW instance 1 and 0.
-    force_ack_and_ack_sts(1, CMD_STS_INVALID_CMD_SEQ);
-    cfg.clk_rst_vif.wait_clks(100);
-    cov_vif.cg_err_code_sample(.err_code(32'b0));
+    csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
+    cov_vif.cg_err_code_sample(.err_code(backdoor_err_code_val));
+  endtask // trigger_invalid_seq_sts_err
 
-    release_ack_and_ack_sts(0);
+  task trigger_reseed_interval_sts_err(uint app);
+    // Send cfg.reseed_interval + 1 generate commands and expect the corresponding status response.
+    csr_wr(.ptr(ral.reseed_interval), .value(cfg.reseed_interval));
 
-    // Now only have error on HW instance 1.
-    cfg.clk_rst_vif.wait_clks(100);
-    cov_vif.cg_err_code_sample(.err_code(32'b0));
+    if (cfg.which_cmd_inv_seq != INS) begin
+      cs_item.randomize();
+      cs_item.acmd  = INS;
+      `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+      send_cmd_req(app, cs_item);
+    end
+    `uvm_info(`gfn, $sformatf("Setting the reseed interval to %d", cfg.reseed_interval), UVM_DEBUG)
+    for (int i = 0; i < cfg.reseed_interval; i++) begin
+      cs_item.randomize();
+      cs_item.acmd  = GEN;
+      cs_item.glen  = 'h1;
+      `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+      send_cmd_req(app, cs_item);
+    end
+    cs_item.randomize();
+    cs_item.acmd  = GEN;
+    cs_item.glen  = 'h1;
+    cs_item.clen  = 'h0;
+    `uvm_info(`gfn, $sformatf("%s", cs_item.convert2string()), UVM_DEBUG)
+    send_cmd_req(app, cs_item, .exp_sts(CMD_STS_RESEED_CNT_EXCEEDED), .await_genbits(0));
+
+    if (app != SW_APP) begin
+      // Expect/Clear interrupt bit
+      check_interrupts(.interrupts((1 << HwInstExc)), .check_set(1'b1));
+      cfg.clk_rst_vif.wait_clks(100);
+      // Make sure the interrupt bit is cleared
+      csr_rd_check(.ptr(ral.intr_state.cs_hw_inst_exc), .compare_value(1'b0));
+    end
+
+    csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
+    cov_vif.cg_err_code_sample(.err_code(backdoor_err_code_val));
+  endtask // trigger_reseed_interval_sts_err
 
-    // Release last error so that we're back to normal operation.
-    release_ack_and_ack_sts(1);
+  task test_cmd_sts_errs(uint app);
+    trigger_invalid_acmd_sts_err(app);
+    trigger_invalid_seq_sts_err(app);
+    trigger_reseed_interval_sts_err(app);
 
-    // Expect/Clear interrupt bit
-    check_interrupts(.interrupts((1 << HwInstExc)), .check_set(1'b1));
+    ral.ctrl.enable.set(prim_mubi_pkg::MuBi4False);
+    csr_update(.csr(ral.ctrl));
     cfg.clk_rst_vif.wait_clks(100);
-    // Make sure the interrupt bit is cleared
-    csr_rd_check(.ptr(ral.intr_state.cs_hw_inst_exc), .compare_value(1'b0));
-  endtask // test_cs_hw_inst_exc
+    ral.ctrl.enable.set(prim_mubi_pkg::MuBi4True);
+    csr_update(.csr(ral.ctrl));
+  endtask // test_cmd_sts_errs
 
   task test_cs_fatal_err();
     string        path, path1, path2;
@@ -189,7 +203,6 @@ class csrng_intr_vseq extends csrng_base_vseq;
     string        fifo_err_path [2][string];
     bit           fifo_err_value [2][string];
     string        path_key;
-    bit [31:0]    backdoor_err_code_val;
 
     fifo_err_path[0] = '{"write": "push", "read": "pop", "state": "full"};
     fifo_err_path[1] = '{"write": "full", "read": "not_empty", "state": "not_empty"};
@@ -338,6 +351,12 @@ class csrng_intr_vseq extends csrng_base_vseq;
 
   task body();
     super.body();
+    // Create EDN host sequences.
+    for (int i = 0; i < NUM_HW_APPS; i++) begin
+      m_edn_push_seq[i] = push_pull_host_seq#(csrng_pkg::CSRNG_CMD_WIDTH)::type_id::create
+                                              ($sformatf("m_edn_push_seq[%0d]", i));
+    end
+
     // Turn off fatal alert check
     expect_fatal_alerts = 1'b1;
 
@@ -357,11 +376,11 @@ class csrng_intr_vseq extends csrng_base_vseq;
     // Test cs_entropy_req interrupt
     test_cs_entropy_req();
 
-    // Test cs_hw_inst_exc interrupt
-    test_cs_hw_inst_exc();
-
-    // Test faulty SW APP response by forcing sts output
-    test_cs_sw_cmd_sts();
+    // Test the command status response errors and for the HW apps
+    // the cs_hw_inst_exc interrupt.
+    for (int app = 0; app <= SW_APP; app++) begin
+      test_cmd_sts_errs(app);
+    end
 
     // Test cs_fatal_err interrupt
     test_cs_fatal_err();
diff --git a/hw/ip/edn/data/edn.hjson b/hw/ip/edn/data/edn.hjson
index 3ed66d4c2841d..35fc924b8ed57 100644
--- a/hw/ip/edn/data/edn.hjson
+++ b/hw/ip/edn/data/edn.hjson
@@ -206,10 +206,12 @@
           name: "BOOT_REQ_MODE",
           mubi: true,
           desc: '''
-                Setting this field to kMultiBitBool4True will enable the feature where the EDN block
-                will automatically send a boot-time request to the CSRNG application interface.
-                The purpose of this feature is to request entropy as fast as possible after reset,
-                and during chip boot-time.
+                Setting this field to kMultiBitBool4True enables the boot-time request mode.
+                In this mode, EDN automatically sends a boot-time request to the CSRNG application interface.
+                The purpose of this mode is to request entropy as fast as possible after reset, and during chip boot time.
+
+                Note that this takes precedence over the AUTO_REQ_MODE field: If both fields are set, EDN enters boot-time request mode.
+                If none of the fields are set, EDN enters Software Port Mode upon enabling.
                 '''
           // keep this in line with the resval parameters above
           resval: false
@@ -218,16 +220,15 @@
           name: "AUTO_REQ_MODE",
           mubi: true,
           desc: '''
-                Setting this field to kMultiBitBool4True will enable the EDN block to automatically
-                send another request to CSRNG application interface. It is assumed that a CSRNG
-                instantiate command will be issued using the !!SW_CMD_REQ register interface.
-                When this command has an command ack returned from CSRNG, a
-                new generate command will be send out again without software intervention. It is
-                expected that the generate command will be sent repeatedly so that a continuous
-                supply of entropy can be delivered to the endpoints. Reseed commands will be sent
-                on a programmable basic between generate commands.
-                The !!GENERATE_CMD, !!RESEED_CMD, and !!MAX_NUM_REQS_BETWEEN_RESEEDS registers must
-                set up before the !!SW_CMD_REQ register command is issued.
+                Setting this field to kMultiBitBool4True enables auto request mode.
+                In this mode, EDN automatically sends `generate` and `reseed` command requests to the CSRNG application interface.
+                The purpose of this mode is to continuously deliver entropy to endpoints without firmware intervention.
+
+                For this to work, firmware has to 1) configure the !!GENERATE_CMD, !!RESEED_CMD, and !!MAX_NUM_REQS_BETWEEN_RESEEDS registers, and 2) to issue the first `instantiate` command via the !!SW_CMD_REQ register.
+                Once this command has been acknowledged by CSRNG, the first `generate` command is sent out automatically, and a `reseed` command is sent after every MAX_NUM_REQS_BETWEEN_RESEEDS number of `generate` commands.
+
+                Note that the BOOT_REQ_MODE field takes precedence over this field: If both fields are set, EDN enters boot-time request mode.
+                If none of the fields are set, EDN enters Software Port Mode upon enabling.
                 '''
           // keep this in line with the resval parameters above
           resval: false
@@ -256,7 +257,12 @@
         { bits: "31:0",
           name: "BOOT_INS_CMD",
           desc: '''
-                This field is used as the value for Instantiate command at boot time.
+                This field is used as the value for the `instantiate` command at boot time.
+
+                See [Command Header](../../csrng/doc/theory_of_operation.md#command-header) for the meaning of the individual bits.
+                Note that the hardware only supports a value of 0 for the `clen` field.
+                If `clen` has a different value, EDN will hang.
+                Fixing this requires disabling and restarting both EDN and CSRNG.
                 '''
          // keep this in line with the resval parameters above
          resval: 0x0000_0901
@@ -273,7 +279,12 @@
         { bits: "31:0",
           name: "BOOT_GEN_CMD",
           desc: '''
-                This field is used as the value for generate command at boot time.
+                This field is used as the value for the `generate` command at boot time.
+
+                See [Command Header](../../csrng/doc/theory_of_operation.md#command-header) for the meaning of the individual bits.
+                Note that the hardware only supports a value of 0 for the `clen` field.
+                If `clen` has a different value, EDN will hang.
+                Fixing this requires disabling and restarting both EDN and CSRNG.
                 '''
          // keep this in line with the resval parameters above
          resval: 0x00ff_f003
@@ -290,16 +301,13 @@
         { bits: "31:0",
           name: "SW_CMD_REQ",
           desc: '''
-                Any CSRNG action can be initiated by writing a CSRNG command to this
-                register. The application interface must wait for the "ack" to
-                return before issuing new commands. This interface is intended
-                to be controlled solely by software.
+                Any CSRNG action can be initiated by writing a CSRNG command to this register.
+                Before any write operation to this register, firmware must read !!SW_CMD_STS to check whether EDN is ready to receive a new command or the next word of a previously started command.
+
+                While !!CTRL.AUTO_REQ_MODE is set, only the first instantiate command has any effect.
+                After that command has been processed, writes to this register will have no effect on operation, until !!CTRL.AUTO_REQ_MODE is de-asserted and the state machine of EDN enters the `SwPortMode` state.
 
-                If !!CTRL.AUTO_REQ_MODE is set, only the first instantiate command has any
-                effect.  After that command has been processed, writes to this register
-                register will have no effect on operation.
-                Note that CSRNG command format details can be found
-                in the CSRNG documentation.
+                Refer to the [CSRNG documentation](../../csrng/doc/theory_of_operation.md#general-command-format) for details on the command format.
                 '''
         }
       ]
@@ -423,15 +431,13 @@
           name: "RESEED_CMD",
           desc: '''
                 Writing this register will fill a FIFO with up to 13 command words (32b words).
-                This FIFO will be used to automatically send out a reseed command to the CSRNG
-                application interface when in !!CTRL.AUTO_REQ_MODE. This command will be sent only after
-                the MAX_NUM_REQS_BETWEEN_RESEEDS counter value has reached zero.
+                When running in auto request mode, this FIFO is used to automatically send out a `reseed` command to the CSRNG application interface after every MAX_NUM_REQS_BETWEEN_RESEEDS number of `generate` commands.
 
-                If more than 13 entires are written to the FIFO, the design will automatically generate
-                a fatal alert.
+                See [General Command Format](../../csrng/doc/theory_of_operation.md#general-command-format) for details about the command format.
 
-                Note that CSRNG command format details can be found
-                in the CSRNG documentation.
+                Note that the number of additional data words provided must match the value of the `clen` field of the first word.
+                Otherwise, undefined behavior may result.
+                If more than 13 entries are written to the FIFO, they are ignored and EDN signals an `edn_fatal_err` interrupt as well as a fatal alert.
                 '''
         }
       ]
@@ -447,15 +453,14 @@
           name: "GENERATE_CMD",
           desc: '''
                 Writing this register will fill a FIFO with up to 13 command words (32b words).
-                This FIFO will be used to automatically send out a generate command to the CSRNG
-                appl interface when in !!CTRL.AUTO_REQ_MODE. This command will be sent only after
-                receiving a command ack from the previous command.
+                When running auto request mode, this FIFO is used to automatically send out `generate` commands to the CSRNG
+                application interface.
 
-                If more than 13 entires are written to the FIFO, the design will automatically generate
-                a fatal alert.
+                See [General Command Format](../../csrng/doc/theory_of_operation.md#general-command-format) for details about the command format.
 
-                Note that CSRNG command format details can be found
-                in the CSRNG documentation.
+                Note that the number of additional data words provided must match the value of the `clen` field of the first word.
+                Otherwise, undefined behavior may result.
+                If more than 13 entries are written to the FIFO, they are ignored and EDN signals an `edn_fatal_err` interrupt as well as a fatal alert.
                 '''
         }
       ]
@@ -469,11 +474,13 @@
         { bits: "31:0",
           name: "MAX_NUM_REQS_BETWEEN_RESEEDS",
           desc: '''
-                Setting this field will set the number of generate requests that can be made
-                to CSRNG before a reseed request is made. This value only has meaning when in
-                !!CTRL.AUTO_REQ_MODE. This register supports a maximum of 2^32 requests between reseeds.
-                This register will be used by a counter that counts down, triggering an
-                automatic reseed when it reaches zero.
+                Setting this field will set the number of `generate` command requests that are made
+                to CSRNG before a reseed request is made.
+                This value only has meaning when running in auto request mode.
+                This register supports a maximum of 2^32 `generate` requests between reseeds.
+                This register will be used by a counter that counts down, triggering an automatic `reseed` request when it reaches zero.
+
+                Note that this value must be chosen smaller than or equal to the value configured in the [`RESEED_INTERVAL` register of CSRNG](../../csrng/doc/registers.md#reseed-interval).
                 '''
         }
       ]
@@ -529,8 +536,7 @@
         { bits: "13",
           name: "CSRNG_ACK_ERR",
           desc: '''
-                This bit is set when the CSRNG returns an acknowledgement where the status
-                signal is high.
+                This bit is set when the CSRNG returns an acknowledgement where the status signal is non-zero.
                 Writing a zero resets this status bit.
                 '''
         }
diff --git a/hw/ip/edn/doc/edn_blk_diag.svg b/hw/ip/edn/doc/edn_blk_diag.svg
index 64ddc73df0f5a..4ecd6f7f649b8 100644
--- a/hw/ip/edn/doc/edn_blk_diag.svg
+++ b/hw/ip/edn/doc/edn_blk_diag.svg
@@ -8,7 +8,7 @@
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diff --git a/hw/ip/edn/doc/programmers_guide.md b/hw/ip/edn/doc/programmers_guide.md
index 82dd129792b20..8c31b7c065674 100644
--- a/hw/ip/edn/doc/programmers_guide.md
+++ b/hw/ip/edn/doc/programmers_guide.md
@@ -1,28 +1,67 @@
 # Programmer's Guide
 
-## Initialization
+This section discusses how firmware can interface with EDN.
 
-The following code snippet demonstrates initializing the EDN block.
+## Module enable and disable
 
-```cpp
+EDN may only be enabled if CSRNG is enabled.
+Once disabled, EDN may only be re-enabled after CSRNG has been disabled and re-enabled.
+The only exception to this is when firmware takes care of properly uninstantiating the associated CSRNG instance before disabling EDN.
+EDN can then be safely re-enabled without disabling and re-enabling CSRNG first.
+For details, refer to [Uninstantiating CSRNG instance through EDN](#uninstantiating-csrng-through-edn).
 
-void edn_init(unsigned int enable) {
+The recommended enable sequence for the entropy complex is to first enable ENTROPY_SRC, then CSRNG, and finally EDN.
 
-  // set the control register enable bit
-  *CTRL_REG = enable; // should be 0x1 by default
+## Uninstantiating CSRNG through EDN
 
-  // the EDN interrupts can optionally be enabled
-}
-```
+To disable and re-enable EDN without disabling and re-enabling CSRNG, firmware must ensure the associated CSRNG instance is properly uninstantiated.
+Otherwise, EDN and the associated CSRNG application interface may get out of sync at which point both EDN and CSRNG have to be disabled and re-enabled.
+This means unrelated CSRNG instances and EDNs also get disabled and then need to be re-configured.
 
-## Module enable and disable
+The procedure for uninstantiating the associated CSRNG instance depends on the mode in which EDN is operating.
+- When running in **Software Port Mode**, firmware has to individually trigger commands via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
+  The status of the current command can be inferred using the [`SW_CMD_STS`](registers.md#sw_cmd_sts) register.
+  For details, refer to [Interaction with CSRNG Application Interface Ports](./theory_of_operation.md#interaction-with-CSRNG-application-interface-ports).
+  In case the current command is a `generate` command, firmware must wait for all entropy generated from this command to be consumed before the command is acknowledged by CSRNG (indicated by the `CMD_ACK` bit of the [`SW_CMD_STS`](registers.md#sw_cmd_sts) register being set).
+  Firmware can then issue an `uninstantiate` command to destroy the associated CSRNG instance.
+  Once the `uninstantiate` command is acknowledged, firmware can safely reconfigure EDN.
 
-EDN may only be enabled if CSRNG is enabled.
-Once disabled, EDN may only be re-enabled after CSRNG has been disabled and re-enabled.
+- When running in **[Boot-Time Request Mode](./theory_of_operation.md#boot-time-request-mode)**, firmware must first de-assert the `BOOT_REQ_MODE` and `AUTO_REQ_MODE` fields in [`CTRL`](registers.md#ctrl) and then must wait for all boot-time entropy to be consumed.
+  EDN then automatically issues an `uninstantiate` command to destroy the associated CSRNG instance.
+  Upon completion, the state machine of EDN enters the `SWPortMode` state.
+  At this point, EDN has entered Software Port Mode (see above) and firmware can then safely reconfigure EDN.
+
+- When running in **[Auto Request Mode](./theory_of_operation.md#auto-request-mode)**, firmware must first de-assert the `AUTO_REQ_MODE` and `BOOT_REQ_MODE` fields in [`CTRL`](registers.md#ctrl) and then must wait for the current command to complete, after which the state machine of EDN enters the `SWPortMode` state.
+  At this point, EDN has entered Software Port Mode (see above), and firmware can issue an `uninstantiate` command to destroy the associated CSRNG instance.
+  Once the `uninstantiate` command is acknowledged, firmware can safely reconfigure EDN.
+
+Notes:
+- Firmware can infer the EDN state using the [`MAIN_SM_STATE`](registers.md#main_sm_state) register.
+- The de-assertion of the `BOOT_REQ_MODE` and `AUTO_REQ_MODE` fields in [`CTRL`](registers.md#ctrl) is only registered by the EDN state machine upon completion of the current command.
+  In case of the `generate` command, this means to wait for all entropy generated from this command to have been consumed, which depending on the configuration of the system, may take a very long time.
+  To accelerate this process, firmware can for example do the following:
+  - For EDN0, repeatedly trigger reseeding operations of the AES PRNGs via the [`PRNG_RESEED` bit of the AES `TRIGGER` register](../../aes/doc/registers.md#trigger--prng_reseed).
+    Once all entropy is consumed, the reseed operation doesn't finish anymore and the [`IDLE` bit of the AES `STATUS` register](../../aes/doc/registers.md#status--idle) remains de-asserted.
+  - For EDN1 which only interfaces the RND port of OTBN, load and repeatedly run an OTBN program snippet that reads from the RND port such as [`randomness.s`](https://github.com/lowRISC/opentitan/blob/master/sw/otbn/code-snippets/randomness.s).
+    Once all entropy is consumed, the program doesn't finish anymore and the [`STATUS` register](../../otbn/doc/registers.md#status) remains at `BUSY_EXECUTE`.
+
+  Future versions of EDN will likely support an automated way for consuming any remaining entropy, see also [Issue #22850](https://github.com/lowRISC/opentitan/issues/22850).
+
+## Running EDN in Auto Request Mode with ENTROPY_SRC disabled
+
+Once the entropy complex has been enabled and all configured CSRNG instances have been seeded with entropy, firmware can again disable ENTROPY_SRC (and the PTRNG noise source to e.g. save power) while CSRNG and EDN remain running to keep serving entropy to consumers.
+
+Depending on the mode in which EDN and the associated CSRNG instance are running, firmware can use a different mechanism to efficiently operate the entropy complex without having the ENTROPY_SRC continuously running:
+
+### Regular, non-deterministic mode
+
+The same guidance applies as for [CSRNG](../../csrng/doc/programmers_guide.md#regular-non-deterministic-mode).
 
-## Error conditions
+### Fully deterministic mode
 
-Need to alert the system of a FIFO overflow condition.
+The same guidance applies as for [CSRNG](../../csrng/doc/programmers_guide.md#fully-deterministic-mode).
+However, the `generate` and `reseed` commands including the additional data fields can only be configured before starting **[Auto Request Mode](./theory_of_operation.md#auto-request-mode)** via the [`GENERATE_CMD`](registers.md#generate_cmd) and [`RESEED_CMD`](registers.md#reseed_cmd) FIFOs.
+To inject fresh entropy, firmware thus has to [uninstantiate the CSRNG instance through EDN](#uninstantiating-csrng-through-edn), disable EDN, configure the FIFOs and then re-enable EDN in Auto Request Mode, and finally trigger the `instantiate` command.
 
 ## Device Interface Functions (DIFs)
 
diff --git a/hw/ip/edn/doc/registers.md b/hw/ip/edn/doc/registers.md
index 6cdfc44eec92d..b166caa8b6f7a 100644
--- a/hw/ip/edn/doc/registers.md
+++ b/hw/ip/edn/doc/registers.md
@@ -141,22 +141,23 @@ set to the reset state by software before any further commands can be issued to
 these FIFOs.
 
 ### CTRL . AUTO_REQ_MODE
-Setting this field to kMultiBitBool4True will enable the EDN block to automatically
-send another request to CSRNG application interface. It is assumed that a CSRNG
-instantiate command will be issued using the [`SW_CMD_REQ`](#sw_cmd_req) register interface.
-When this command has an command ack returned from CSRNG, a
-new generate command will be send out again without software intervention. It is
-expected that the generate command will be sent repeatedly so that a continuous
-supply of entropy can be delivered to the endpoints. Reseed commands will be sent
-on a programmable basic between generate commands.
-The [`GENERATE_CMD`](#generate_cmd), [`RESEED_CMD`](#reseed_cmd), and [`MAX_NUM_REQS_BETWEEN_RESEEDS`](#max_num_reqs_between_reseeds) registers must
-set up before the [`SW_CMD_REQ`](#sw_cmd_req) register command is issued.
+Setting this field to kMultiBitBool4True enables auto request mode.
+In this mode, EDN automatically sends `generate` and `reseed` command requests to the CSRNG application interface.
+The purpose of this mode is to continuously deliver entropy to endpoints without firmware intervention.
+
+For this to work, firmware has to 1) configure the [`GENERATE_CMD`](#generate_cmd), [`RESEED_CMD`](#reseed_cmd), and [`MAX_NUM_REQS_BETWEEN_RESEEDS`](#max_num_reqs_between_reseeds) registers, and 2) to issue the first `instantiate` command via the [`SW_CMD_REQ`](#sw_cmd_req) register.
+Once this command has been acknowledged by CSRNG, the first `generate` command is sent out automatically, and a `reseed` command is sent after every MAX_NUM_REQS_BETWEEN_RESEEDS number of `generate` commands.
+
+Note that the BOOT_REQ_MODE field takes precedence over this field: If both fields are set, EDN enters boot-time request mode.
+If none of the fields are set, EDN enters Software Port Mode upon enabling.
 
 ### CTRL . BOOT_REQ_MODE
-Setting this field to kMultiBitBool4True will enable the feature where the EDN block
-will automatically send a boot-time request to the CSRNG application interface.
-The purpose of this feature is to request entropy as fast as possible after reset,
-and during chip boot-time.
+Setting this field to kMultiBitBool4True enables the boot-time request mode.
+In this mode, EDN automatically sends a boot-time request to the CSRNG application interface.
+The purpose of this mode is to request entropy as fast as possible after reset, and during chip boot time.
+
+Note that this takes precedence over the AUTO_REQ_MODE field: If both fields are set, EDN enters boot-time request mode.
+If none of the fields are set, EDN enters Software Port Mode upon enabling.
 
 ### CTRL . EDN_ENABLE
 Setting this field to kMultiBitBool4True enables the EDN module. The modules of the
@@ -175,9 +176,17 @@ EDN boot instantiate command register
 {"reg": [{"name": "BOOT_INS_CMD", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name         | Description                                                           |
-|:------:|:------:|:-------:|:-------------|:----------------------------------------------------------------------|
-|  31:0  |   rw   |  0x901  | BOOT_INS_CMD | This field is used as the value for Instantiate command at boot time. |
+|  Bits  |  Type  |  Reset  | Name                                        |
+|:------:|:------:|:-------:|:--------------------------------------------|
+|  31:0  |   rw   |  0x901  | [BOOT_INS_CMD](#boot_ins_cmd--boot_ins_cmd) |
+
+### BOOT_INS_CMD . BOOT_INS_CMD
+This field is used as the value for the `instantiate` command at boot time.
+
+See [Command Header](../../csrng/doc/theory_of_operation.md#command-header) for the meaning of the individual bits.
+Note that the hardware only supports a value of 0 for the `clen` field.
+If `clen` has a different value, EDN will hang.
+Fixing this requires disabling and restarting both EDN and CSRNG.
 
 ## BOOT_GEN_CMD
 EDN boot generate command register
@@ -191,9 +200,17 @@ EDN boot generate command register
 {"reg": [{"name": "BOOT_GEN_CMD", "bits": 32, "attr": ["rw"], "rotate": 0}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset   | Name         | Description                                                        |
-|:------:|:------:|:--------:|:-------------|:-------------------------------------------------------------------|
-|  31:0  |   rw   | 0xfff003 | BOOT_GEN_CMD | This field is used as the value for generate command at boot time. |
+|  Bits  |  Type  |  Reset   | Name                                        |
+|:------:|:------:|:--------:|:--------------------------------------------|
+|  31:0  |   rw   | 0xfff003 | [BOOT_GEN_CMD](#boot_gen_cmd--boot_gen_cmd) |
+
+### BOOT_GEN_CMD . BOOT_GEN_CMD
+This field is used as the value for the `generate` command at boot time.
+
+See [Command Header](../../csrng/doc/theory_of_operation.md#command-header) for the meaning of the individual bits.
+Note that the hardware only supports a value of 0 for the `clen` field.
+If `clen` has a different value, EDN will hang.
+Fixing this requires disabling and restarting both EDN and CSRNG.
 
 ## SW_CMD_REQ
 EDN csrng app command request register
@@ -212,16 +229,13 @@ EDN csrng app command request register
 |  31:0  |   wo   |    x    | [SW_CMD_REQ](#sw_cmd_req--sw_cmd_req) |
 
 ### SW_CMD_REQ . SW_CMD_REQ
-Any CSRNG action can be initiated by writing a CSRNG command to this
-register. The application interface must wait for the "ack" to
-return before issuing new commands. This interface is intended
-to be controlled solely by software.
+Any CSRNG action can be initiated by writing a CSRNG command to this register.
+Before any write operation to this register, firmware must read [`SW_CMD_STS`](#sw_cmd_sts) to check whether EDN is ready to receive a new command or the next word of a previously started command.
 
-If [`CTRL.AUTO_REQ_MODE`](#ctrl) is set, only the first instantiate command has any
-effect.  After that command has been processed, writes to this register
-register will have no effect on operation.
-Note that CSRNG command format details can be found
-in the CSRNG documentation.
+While [`CTRL.AUTO_REQ_MODE`](#ctrl) is set, only the first instantiate command has any effect.
+After that command has been processed, writes to this register will have no effect on operation, until [`CTRL.AUTO_REQ_MODE`](#ctrl) is de-asserted and the state machine of EDN enters the `SwPortMode` state.
+
+Refer to the [CSRNG documentation](../../csrng/doc/theory_of_operation.md#general-command-format) for details on the command format.
 
 ## SW_CMD_STS
 EDN software command status register
@@ -336,15 +350,13 @@ EDN csrng reseed command register
 
 ### RESEED_CMD . RESEED_CMD
 Writing this register will fill a FIFO with up to 13 command words (32b words).
-This FIFO will be used to automatically send out a reseed command to the CSRNG
-application interface when in [`CTRL.AUTO_REQ_MODE.`](#ctrl) This command will be sent only after
-the MAX_NUM_REQS_BETWEEN_RESEEDS counter value has reached zero.
+When running in auto request mode, this FIFO is used to automatically send out a `reseed` command to the CSRNG application interface after every MAX_NUM_REQS_BETWEEN_RESEEDS number of `generate` commands.
 
-If more than 13 entires are written to the FIFO, the design will automatically generate
-a fatal alert.
+See [General Command Format](../../csrng/doc/theory_of_operation.md#general-command-format) for details about the command format.
 
-Note that CSRNG command format details can be found
-in the CSRNG documentation.
+Note that the number of additional data words provided must match the value of the `clen` field of the first word.
+Otherwise, undefined behavior may result.
+If more than 13 entries are written to the FIFO, they are ignored and EDN signals an `edn_fatal_err` interrupt as well as a fatal alert.
 
 ## GENERATE_CMD
 EDN csrng generate command register
@@ -364,15 +376,14 @@ EDN csrng generate command register
 
 ### GENERATE_CMD . GENERATE_CMD
 Writing this register will fill a FIFO with up to 13 command words (32b words).
-This FIFO will be used to automatically send out a generate command to the CSRNG
-appl interface when in [`CTRL.AUTO_REQ_MODE.`](#ctrl) This command will be sent only after
-receiving a command ack from the previous command.
+When running auto request mode, this FIFO is used to automatically send out `generate` commands to the CSRNG
+application interface.
 
-If more than 13 entires are written to the FIFO, the design will automatically generate
-a fatal alert.
+See [General Command Format](../../csrng/doc/theory_of_operation.md#general-command-format) for details about the command format.
 
-Note that CSRNG command format details can be found
-in the CSRNG documentation.
+Note that the number of additional data words provided must match the value of the `clen` field of the first word.
+Otherwise, undefined behavior may result.
+If more than 13 entries are written to the FIFO, they are ignored and EDN signals an `edn_fatal_err` interrupt as well as a fatal alert.
 
 ## MAX_NUM_REQS_BETWEEN_RESEEDS
 EDN maximum number of requests between reseeds register
@@ -391,11 +402,13 @@ EDN maximum number of requests between reseeds register
 |  31:0  |   rw   |   0x0   | [MAX_NUM_REQS_BETWEEN_RESEEDS](#max_num_reqs_between_reseeds--max_num_reqs_between_reseeds) |
 
 ### MAX_NUM_REQS_BETWEEN_RESEEDS . MAX_NUM_REQS_BETWEEN_RESEEDS
-Setting this field will set the number of generate requests that can be made
-to CSRNG before a reseed request is made. This value only has meaning when in
-[`CTRL.AUTO_REQ_MODE.`](#ctrl) This register supports a maximum of 2^32 requests between reseeds.
-This register will be used by a counter that counts down, triggering an
-automatic reseed when it reaches zero.
+Setting this field will set the number of `generate` command requests that are made
+to CSRNG before a reseed request is made.
+This value only has meaning when running in auto request mode.
+This register supports a maximum of 2^32 `generate` requests between reseeds.
+This register will be used by a counter that counts down, triggering an automatic `reseed` request when it reaches zero.
+
+Note that this value must be chosen smaller than or equal to the value configured in the [`RESEED_INTERVAL` register of CSRNG](../../csrng/doc/registers.md#reseed-interval).
 
 ## RECOV_ALERT_STS
 Recoverable alert status register
@@ -412,7 +425,7 @@ Recoverable alert status register
 |  Bits  |  Type  |  Reset  | Name                      | Description                                                                                                                                                                                     |
 |:------:|:------:|:-------:|:--------------------------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
 | 31:14  |        |         |                           | Reserved                                                                                                                                                                                        |
-|   13   |  rw0c  |   0x0   | CSRNG_ACK_ERR             | This bit is set when the CSRNG returns an acknowledgement where the status signal is high. Writing a zero resets this status bit.                                                               |
+|   13   |  rw0c  |   0x0   | CSRNG_ACK_ERR             | This bit is set when the CSRNG returns an acknowledgement where the status signal is non-zero. Writing a zero resets this status bit.                                                           |
 |   12   |  rw0c  |   0x0   | EDN_BUS_CMP_ALERT         | This bit is set when the interal entropy bus value is equal to the prior valid value on the bus, indicating a possible attack. Writing a zero resets this status bit.                           |
 |  11:4  |        |         |                           | Reserved                                                                                                                                                                                        |
 |   3    |  rw0c  |   0x0   | CMD_FIFO_RST_FIELD_ALERT  | This bit is set when the CMD_FIFO_RST field is set to an illegal value, something other than kMultiBitBool4True or kMultiBitBool4False. Writing a zero resets this status bit.                  |
diff --git a/hw/ip/edn/doc/theory_of_operation.md b/hw/ip/edn/doc/theory_of_operation.md
index e3983bd193575..8b19a782fce35 100644
--- a/hw/ip/edn/doc/theory_of_operation.md
+++ b/hw/ip/edn/doc/theory_of_operation.md
@@ -15,6 +15,8 @@ Whenever commands are directly forwarded from firmware to the CSRNG through the
 `CMD_RDY` indicates whether the EDN is ready to receive a new command, whereas `CMD_REG_RDY` indicates whether the EDN is ready to accept the next word of the command.
 Each command consists of a command header, which is represented by a single word.
 Furthermore, a command can have up to 12 words of additional data.
+(In case firmware erroneously configures a `clen` value greater than 12, the EDN hardware expects it to indeed provide the specified number words of additional data.
+CSRNG itself will only consider the first 12 words of additional data and will silently discard the rest.)
 To check whether a command has been acknowledged by the CSRNG, the `CMD_ACK` bit of the [`SW_CMD_STS`](registers.md#sw_cmd_sts) register can be polled.
 Whenever `CMD_ACK` is high, the `CMD_STS` bit can be checked to find out if an error occured.
 
@@ -30,17 +32,23 @@ Random values are needed by peripherals almost immediately after reset, so to si
 In boot-time request mode, the command sequence is fully hardware-controlled and no command customization is possible.
 In this mode, the EDN automatically issues a special reduced-latency `instantiate` command followed by the default `generate` commands.
 This means, for instance, that no personalization strings or additional data may be passed to the CSRNG application interface port in this mode.
-On exiting, the EDN issues an `uninstantiate` command to destroy the associated CSRNG instance.
 
 Once firmware initialization is complete, it is important to exit this mode if the endpoints ever need FIPS-approved random values.
-Should another generate command be needed, it can only be issued after exiting boot mode.
-This is done by either *clearing* the `EDN_ENABLE` field or *clearing* the `BOOT_REQ_MODE` field in [`CTRL`](registers.md#ctrl) to halt the boot-time request state machine.
-Firmware must then wait for the transition of the state machine by polling the `CMD_RDY` field of the [`SW_CMD_STS`](registers.md#sw_cmd_sts) register or wait for the state machine to enter the SW mode by polling the [`MAIN_SM_STATE`](registers.md#main_sm_state) register.
+Should another `generate` command be needed, it can only be issued after exiting boot-time request mode.
+
+There are two ways that firmware can exit boot-time request mode:
+1. Clear the `EDN_ENABLE` field in [`CTRL`](registers.md#ctrl) to disable the EDN immediately.
+   This likely causes the EDN and the associated CSRNG instance to go out of sync.
+   Before re-enabling EDN, CSRNG has to first be disabled and then re-enabled.
+2. Clear the `BOOT_REQ_MODE` field in [`CTRL`](registers.md#ctrl).
+   Firmware must then wait for the state machine to leave the boot-time request mode by polling the `CMD_RDY` field of the [`SW_CMD_STS`](registers.md#sw_cmd_sts) register or by polling the [`MAIN_SM_STATE`](registers.md#main_sm_state) register.
+   Upon exiting boot-time request mode this way, the EDN issues an `uninstantiate` command to destroy the associated CSRNG instance.
+   Once the state machine arrives at the `SWPortMode` state, new firmware-driven commands can be passed to the CSRNG via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
 
 It should be noted that when in boot-time request mode, no status will be updated that is used for the software port operation.
 If some hang condition were to occur when in this mode, the main state machine debug register should be read to determine if a hang condition is present.
 There is a limit to how much entropy can be requested in the boot-time request mode BOOT_GEN_CMD command (GLEN = 4K).
-It is the responsibility of software to switch to the software mode of operation before the command has completed.
+It is the responsibility of firmware to switch to the software port operation.
 If the BOOT_GEN_CMD command ends while an endpoint is requesting, EDN will never ack and the endpoint bus will hang.
 
 #### Note on Security Considerations when Using Boot-time Request Mode
@@ -62,28 +70,32 @@ To ensure that the most recently enabled EDN will get next priority for physical
 Once that has happened, the next EDN can be enabled.
 
 If using boot-time request mode, the CSRNG seed material used for the first-activated EDN is the special pre-FIPS seed, which is specifically tested quickly to improve latency.
-The first random values distributed from this EDN will therefore be available roughly 2ms after reset.
+For [Top Earlgrey](../../../top_earlgrey/README.md), the first random values distributed from this EDN are therefore expected to be available roughly 2ms after reset.
+
 The `entropy_src` only creates one pre-FIPS seed, so any other EDNs must wait for their seeds to pass the full FIPS-recommended health checks.
-This means that each subsequent EDN must wait an additional 5ms before it can start distributing data.
+This means that for [Top Earlgrey](../../../top_earlgrey/README.md), each subsequent EDN must wait an additional 5ms before it can start distributing data.
 For instance, if there are three boot-time request mode EDN's in the system, the first will start distributing data 2ms after reset, the second will start distributing data 7ms after reset, and the third will start distributing data 12ms after reset.
 
 ### Auto Request Mode
 
-Before entering auto request mode, it is the responsibility of firmware to first generate an `instantiate` command for the EDN-associated instance via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
-The required `generate` and `reseed` commands must also be custom generated by firmware and loaded into the respective command replay FIFOs via the [`GENERATE_CMD`](registers.md#generate_cmd) and [`RESEED_CMD`](registers.md#reseed_cmd) registers.
+Before enabling auto request mode, firmware must configure the EDN's `generate` and `reseed` commands.
+These can be loaded into their respective command replay FIFOs through the [`GENERATE_CMD`](registers.md#generate_cmd) and [`RESEED_CMD`](registers.md#reseed_cmd) registers.
 These `generate` commands will be issued as necessary to meet the bandwidth requirements of the endpoints.
-The `reseed` commands will be issued once every `MAX_NUM_REQS_BETWEEN_RESEEDS` generate requests.
-The reset value is `0`.
-This implies that no generate commands will be issued unless this value is changed by firmware.
+The `reseed` commands will be issued once every `MAX_NUM_REQS_BETWEEN_RESEEDS` `generate` requests.
+Before enabling auto request mode, firmware must configure a non-zero value in the [`MAX_NUM_REQS_BETWEEN_RESEEDS`](registers.md#max-num-reqs-between-reseeds) register.
+The reset value is `0`, which means no `generate` commands are issued.
 For details on the options for application interface commands please see the [CSRNG IP Documentation](../../csrng/README.md).
-Once the CSRNG instance has been instantiated, and the `generate` and `reseed` commands have been loaded, auto request mode can be entered by programming the [`CTRL`](registers.md#ctrl) register with `EDN_ENABLE` and `AUTO_REQ_MODE` fields are enabled.
-Note that if BOOT_REQ_MODE is asserted the state machine will enter boot-time request mode, even if AUTO_REQ_MODE is asserted.
+Auto request mode can then be entered by programming the [`CTRL`](registers.md#ctrl) register with the `EDN_ENABLE` and the `AUTO_REQ_MODE` fields asserted.
+Note that if `BOOT_REQ_MODE` is asserted, the state machine will enter boot-time request mode, even if `AUTO_REQ_MODE` is asserted.
+Upon enabling auto request mode, firmware must first generate an `instantiate` command for the EDN-associated instance via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
 
-To issue any new commands other than those stored in the generate or reseed FIFOs, it is important to disable auto request mode, by deasserting the `AUTO_REQ_MODE` field in the [`CTRL`](registers.md#ctrl) register.
+To issue any new commands other than those stored in the generate or reseed FIFOs, it is important to disable auto request mode, by de-asserting the `AUTO_REQ_MODE` field in the [`CTRL`](registers.md#ctrl) register.
 Firmware must then wait until the current command is completed by polling the [`MAIN_SM_STATE`](registers.md#main_sm_state) register.
-Once the state machine returns to the `Idle` or `SWPortMode` states, new firmware-driven commands can be passed to the CSRNG via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
+Once the state machine returns to the `SWPortMode` state, new firmware-driven commands can be passed to the CSRNG via the [`SW_CMD_REQ`](registers.md#sw_cmd_req) register.
+Unlike when exiting from boot-time request mode, the EDN does not automatically trigger an `uninstantiate` command when leaving auto request mode.
+
 The generate and reseed FIFOs are reset under four circumstances.
-These circumstances are (a) when the EDN is disabled, (b) when the `SWPortMode` state is entered, (c) when the boot sequence has completed, or (d) when the EDN enters the `Idle` state after it finishes operation in auto mode.
+These circumstances are (a) when the EDN is disabled, (b) when the `SWPortMode` state is entered, (c) when the boot sequence has completed, or (d) when the EDN enters the `Idle` state after it finishes operation in auto request mode.
 
 It should be noted that when in auto request mode, no status will be updated that is used for the software port operation once the `instantiate` command has completed.
 If some hang condition were to occur when in this mode, the main state machine debug register should be read to determine if a hang condition is present.
@@ -91,9 +103,9 @@ If some hang condition were to occur when in this mode, the main state machine d
 ### Note on State Machine Shutdown Delays
 
 When leaving boot-time request mode or auto request mode, the EDN state machine waits for completion of the last command, before sending a shutdown acknowledgement to firmware.
-The longest possible commands are the `instantiate` or `reseed` requests, which typically take about 5ms, due to the time required to gather the necessary physical entropy.
+The longest possible commands are the `instantiate` or `reseed` requests, which typically take about 5ms in [Top Earlgrey](../../../top_earlgrey/README.md), due to the time required to gather the necessary physical entropy.
 By contrast, the largest possible `generate` command allowed by [NIST SP 800-90A](https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-90Ar1.pdf) is for 2<sup>19</sup> bits (or 4096 AES codewords).
-Assuming an AES encryption delay of 16 clocks, and a 100 MHz clock frequency, the longest allowable `generate` command would take only 0.7 ms to complete.
+Assuming an AES encryption delay of 16 clocks, a 100 MHz clock frequency, and that entropy consumers are able to immediately consume the distributed entropy, the longest allowable `generate` command would take only 0.7 ms to complete.
 
 ### Note on Sharing of CSRNG Instance State Variables
 
@@ -130,15 +142,6 @@ At this point, firmware can later come and reconfigure the EDN block for a diffe
 
 The recommended write sequence for the entire entropy system is one configuration write to ENTROPY_SRC, then CSRNG, and finally to EDN (also see [Module enable and disable](./programmers_guide.md#module-enable-and-disable)).
 
-### Interrupts
-
-The EDN module has two interrupts: `edn_cmd_req_done` and `edn_fatal_err`.
-
-The `edn_cmd_req_done` interrupt should be used when a CSRNG command is issued and firmware is waiting for completion.
-
-The `edn_fatal_err` interrupt will fire when a fatal error has been detected.
-The conditions that cause this to happen are FIFO error, a state machine error state transition, or a prim_count error.
-
 #### Waveforms
 
 See the [CSRNG IP](../../csrng/README.md) waveform section for the CSRNG application interface commands.
diff --git a/hw/ip/edn/dv/cov/edn_cov_if.sv b/hw/ip/edn/dv/cov/edn_cov_if.sv
index 076966d8b52ab..74d46c8d0ca2d 100644
--- a/hw/ip/edn/dv/cov/edn_cov_if.sv
+++ b/hw/ip/edn/dv/cov/edn_cov_if.sv
@@ -227,14 +227,11 @@ interface edn_cov_if (
     cp_recov_alert_cg: coverpoint recov_alert;
   endgroup : edn_alert_cg
 
-  covergroup edn_cs_cmd_response_cg with function sample(bit csrng_rsp_sts);
+  covergroup edn_cs_cmd_response_cg with function sample(csrng_pkg::csrng_cmd_sts_e csrng_rsp_sts);
     option.name         = "edn_cs_cmd_response_cg";
     option.per_instance = 1;
 
-    cp_csrng_rsp_sts_cg: coverpoint csrng_rsp_sts {
-      bins error   = { 1'b1 };
-      bins success = { 1'b0 };
-    }
+    cp_csrng_rsp_sts_cg: coverpoint csrng_rsp_sts;
   endgroup : edn_cs_cmd_response_cg
 
   covergroup edn_sw_cmd_sts_cg with function sample(bit cmd_rdy, bit cmd_reg_rdy,
@@ -367,7 +364,8 @@ interface edn_cov_if (
     end
   endfunction : cg_alert_sample
 
-  function automatic void cg_cs_cmd_response_sample(bit csrng_rsp_sts, bit csrng_rsp_ack);
+  function automatic void cg_cs_cmd_response_sample(csrng_pkg::csrng_cmd_sts_e csrng_rsp_sts,
+                                                    bit csrng_rsp_ack);
     if (csrng_rsp_ack) begin
       edn_cs_cmd_response_cg_inst.sample(csrng_rsp_sts);
     end
diff --git a/hw/ip/edn/dv/env/seq_lib/edn_common_vseq.sv b/hw/ip/edn/dv/env/seq_lib/edn_common_vseq.sv
index 09f9166dd510d..85b581d85a005 100644
--- a/hw/ip/edn/dv/env/seq_lib/edn_common_vseq.sv
+++ b/hw/ip/edn/dv/env/seq_lib/edn_common_vseq.sv
@@ -29,7 +29,20 @@ class edn_common_vseq extends edn_base_vseq;
 
   virtual task check_sec_cm_fi_resp(sec_cm_pkg::sec_cm_base_if_proxy if_proxy);
     bit [31:0] backdoor_err_code_val;
-    if (!uvm_re_match("*.cnt_q*", if_proxy.path)) begin
+    bit [3:0] edn_enable;
+    bit exp_fifo_err;
+    // The error output of the prim_count primitive is flopped, leading to a total delay of 2 clock
+    // cycles until error become visible via CSRs.
+    if (!uvm_re_match("*.u_prim_count_max_reqs_cntr", if_proxy.path) ||
+        !uvm_re_match("*.u_fifo_cnt.gen_secure_ptrs*", if_proxy.path)) begin
+      cfg.clk_rst_vif.wait_n_clks(2);
+    end
+
+    // FIFO errors are only signaled via the ERR_CODE CSR while EDN is enabled.
+    csr_rd(.ptr(ral.ctrl.edn_enable), .value(edn_enable), .backdoor(1'b1));
+    exp_fifo_err = edn_enable == prim_mubi_pkg::MuBi4True;
+
+    if (!uvm_re_match("*.u_prim_count_max_reqs_cntr", if_proxy.path)) begin
       csr_rd_check(.ptr(ral.err_code.edn_cntr_err), .compare_value(1'b1));
       if (cfg.en_cov) begin
         csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
@@ -47,6 +60,26 @@ class edn_common_vseq extends edn_base_vseq;
         csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
         cov_vif.cg_error_sample(.err_code(backdoor_err_code_val));
       end
+    end else if (!uvm_re_match("*.u_prim_fifo_sync_gencmd*", if_proxy.path)) begin
+      `uvm_info(`gfn,
+          $sformatf("Expecting FIFO errors to be signaled via ERR_CODE CSR: %0d", exp_fifo_err),
+          UVM_MEDIUM)
+      csr_rd_check(.ptr(ral.err_code.sfifo_gencmd_err), .compare_value(exp_fifo_err));
+      csr_rd_check(.ptr(ral.err_code.fifo_state_err), .compare_value(exp_fifo_err));
+      if (cfg.en_cov) begin
+        csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
+        cov_vif.cg_error_sample(.err_code(backdoor_err_code_val));
+      end
+    end else if (!uvm_re_match("*.u_prim_fifo_sync_rescmd*", if_proxy.path)) begin
+      `uvm_info(`gfn,
+          $sformatf("Expecting FIFO errors to be signaled via ERR_CODE CSR: %0d", exp_fifo_err),
+          UVM_MEDIUM)
+      csr_rd_check(.ptr(ral.err_code.sfifo_rescmd_err), .compare_value(exp_fifo_err));
+      csr_rd_check(.ptr(ral.err_code.fifo_state_err), .compare_value(exp_fifo_err));
+      if (cfg.en_cov) begin
+        csr_rd(.ptr(ral.err_code), .value(backdoor_err_code_val));
+        cov_vif.cg_error_sample(.err_code(backdoor_err_code_val));
+      end
     end
 
     // Check main_sm_state goes to error st.
diff --git a/hw/ip/entropy_src/doc/programmers_guide.md b/hw/ip/entropy_src/doc/programmers_guide.md
index 3e1cc19196810..53d54703841b1 100644
--- a/hw/ip/entropy_src/doc/programmers_guide.md
+++ b/hw/ip/entropy_src/doc/programmers_guide.md
@@ -20,8 +20,6 @@ Since there exists another feature to avoid power spikes between ENTROPY_SRC and
 Bit 16 in the [`DEBUG_STATUS`](registers.md#debug_status) should be polled after the ENTROPY_SRC enable bits are cleared in the [`CONF`](registers.md#conf) register.
 After the handshakes with CSRNG are finished, the above bit should be set and the ENTROPY_SRC block can be safely enabled again.
 
-ENTROPY_SRC may only be disabled if CSRNG is disabled.
-
 Disabling Entropy Source does not clear the bits in `RECOV_ALERT_STS` (see [*Handling a Recoverable Alert*](#handling-a-recoverable-alert)).
 
 
diff --git a/hw/ip/entropy_src/doc/theory_of_operation.md b/hw/ip/entropy_src/doc/theory_of_operation.md
index 4def1d5278874..0f507f01c465f 100644
--- a/hw/ip/entropy_src/doc/theory_of_operation.md
+++ b/hw/ip/entropy_src/doc/theory_of_operation.md
@@ -145,8 +145,8 @@ However, if the ENTROPY_SRC block experiences internal back pressure, health tes
   Note that this may also happen in [Firmware Override: Observe mode](programmers_guide.md#firmware_override_-_observe).
   Firmware should thus explicitly check the [`RECOV_ALERT_STS.POSTHT_ENTROPY_DROP_ALERT`](registers.md#recov_alert_sts--postht_entropy_drop_alert) bit to ensure the bits retrieved from the Observe FIFO are indeed contiguous.
 
-The reduce the probability of dropping post-health test entropy bits, the **Distribution FIFO** can be used.
-This FIFO has pass-through mode enabled meaning it doesn't add latency to hardware pipeline.
+To reduce the probability of dropping post-health test entropy bits, the **Distribution FIFO** can be used.
+This FIFO has pass-through mode enabled meaning it doesn't add latency to the hardware pipeline.
 It has a width of 32 bits.
 Its depth is configurable via compile-time Verilog parameter and should match the expected level of conditioner back pressure.
 The level of conditioner back pressure depends on the following factors:
diff --git a/hw/ip/hmac/data/hmac.hjson b/hw/ip/hmac/data/hmac.hjson
index 929a41281e0e1..94dbc4f44ab53 100644
--- a/hw/ip/hmac/data/hmac.hjson
+++ b/hw/ip/hmac/data/hmac.hjson
@@ -195,7 +195,7 @@
           desc: '''SHA-2 enable.
 
                  If 0, the SHA engine will not initiate compression, this is used to stop operation of the SHA-2 engine until configuration has been done.
-                 When the SHA-2 engine is disabled the digest is cleared, and the digest can be written to from SW which enables restoring context (to support context switching).'''
+                 When the SHA-2 engine is disabled the digest is cleared.'''
           tags: [// don't enable hmac and sha data paths - we will do that in functional tests
                  "excl:CsrNonInitTests:CsrExclWrite"]
         }
@@ -376,7 +376,9 @@
       fields: [
         { bits: "0",
           name: "hmac_idle",
-          desc: "HMAC idle status."
+          desc: '''HMAC idle status.
+                When IDLE, the `DIGEST` and the `MSG_LENGTH_LOWER`/`MSG_LENGTH_UPPER` can be written to from SW which enables restoring context (to support context switching).
+                '''
           resval: "1"
         }
         { bits: "1",
@@ -462,7 +464,8 @@
               For SHA-2 384, {DIGEST12-DIGEST15} are truncated; they are irrelevant and should not be read out.
 
               The digest gets cleared when `CFG.sha_en` transitions from 1 to 0.
-              When `CFG.sha_en` is 0, these registers can be written to by software.
+              When `STATUS.hmac_idle` is 1, these registers may be written to by software.
+              Outside of this window, writes can cause unpredictable behavior.
               ''',
         count: "NumDigestWords",
         cname: "HMAC",
@@ -485,7 +488,8 @@
             Message is byte granularity.
             Lower 3 bits [2:0] are ignored.
 
-            When `CFG.sha_en` is 0, this register can be written by software.
+            When `STATUS.hmac_idle` is 1, this register may be written by software.
+            Outside of this window, writes can cause unpredictable behavior.
             ''',
       swaccess: "rw",
       hwaccess: "hrw",
@@ -498,7 +502,8 @@
     { name: "MSG_LENGTH_UPPER",
       desc: '''Received Message Length calculated by the HMAC in bits [63:32]
 
-            When `CFG.sha_en` is 0, this register can be written by software.
+            When `STATUS.hmac_idle` is 1, this register may be written by software.
+            Outside of this window, writes can cause unpredictable behavior.
             For SHA-2-2 256 computations, message length is 64-bit {MSG_LENGTH_UPPER, MSG_LENGTH_LOWER}.f
             For SHA-2 384/512 message length is extended to 128-bit in line with [nist-fips-180-4] where the upper 64 bits get zero-padded: {32'b0, 32'b0, MSG_LENGTH_UPPER, MSG_LENGTH_LOWER}.
             ''',
diff --git a/hw/ip/hmac/doc/programmers_guide.md b/hw/ip/hmac/doc/programmers_guide.md
index 05948e4200f9e..a0cac8d829787 100644
--- a/hw/ip/hmac/doc/programmers_guide.md
+++ b/hw/ip/hmac/doc/programmers_guide.md
@@ -88,17 +88,24 @@ When SW doesn't know each instant at which a full message block is available, it
 
 The context that needs to be saved and restored is in the following registers: [`CFG`](registers.md#cfg), [`DIGEST_*`](registers.md#digest), and [`MSG_LENGTH_*`](registers.md#msg_length_lower).
 
+**Due to an RTL bug, the hardware may not be able to easily recover from a `CMD.hash_stop` command (for more details, refer to [Issue #24767](https://github.com/lowRISC/opentitan/issues/24767)).
+To avoid the hardware from entering this state, a stop-gap software workaround solution should be used (see [PR #24944](https://github.com/lowRISC/opentitan/pull/24944) for details).
+The example usage below includes this stop-gap workaround solution marked in italics whereas the original guidance is crossed out.**
+
 Each new message stream needs to be started *once* by setting the `CMD.hash_start` bit and finalized *once* by setting the `CMD.hash_process` bit.
-To switch from one message stream to another, set the `CMD.hash_stop` bit, wait for the `hmac_done` interrupt (or status bit), save one context and restore the other, and then set the `CMD.hash_continue` bit.
+To switch from one message stream to another, ~~set the `CMD.hash_stop` bit, wait for the `hmac_done` interrupt (or status bit)~~ _at a block boundary, insert delay which should be equivalent to at least 80 clock cycles_, save one context, _trigger `CMD.hash_process` to move the FSMs into a stable state_ and restore the other context, and then set the `CMD.hash_continue` bit.
 
 Here is an example usage pattern of this feature:
 1. Start processing message stream A by configuring HMAC and then setting the `CMD.hash_start` bit.
 1. Write an arbitrary number of message blocks to HMAC's `MSG_FIFO`.
-1. Stop HMAC by setting the `CMD.hash_stop` bit and wait for the `hmac_done` interrupt (or poll the interrupt status register).
+1. _Insert a delay of least 80 clock cycles._
+~~1. Stop HMAC by setting the `CMD.hash_stop` bit and wait for the `hmac_done` interrupt (or poll the interrupt status register).~~
 1. Save the context by reading the `DIGEST_0`..`15` and `MSG_LENGTH_`{`LOWER`,`UPPER`} registers.
 If the operation is keyed HMAC, the values of `KEY_0`..`X` registers also need to be maintained as part of the context, where `X` is the last register used for the given key length (e.g. for HMAC-256, `X=7`).
 However, key registers cannot be read from SW, therefore SW must maintain key values as part of its own context during initialization.
 Similarly, the value of the `CFG` register must also be preserved, and SW should keep its value separately, instead of reading it from `CFG` register.
+1. _Trigger `CMD.hash_process`._
+1. _Wait for the `hmac_done` interrupt (or poll the interrupt status register)._
 1. Disable `sha_en` by updating `CFG` register, in order to clear the digest from stream A.
 This is necessary to also prevent leakage of intermediate context of one SW thread to another.
 1. Repeat steps 1-5 for message stream B.
diff --git a/hw/ip/hmac/doc/registers.md b/hw/ip/hmac/doc/registers.md
index b328c79f0ce39..2ca2180f2fe91 100644
--- a/hw/ip/hmac/doc/registers.md
+++ b/hw/ip/hmac/doc/registers.md
@@ -238,7 +238,7 @@ From a hardware perspective byte swaps are performed on a TL-UL word granularity
 SHA-2 enable.
 
  If 0, the SHA engine will not initiate compression, this is used to stop operation of the SHA-2 engine until configuration has been done.
- When the SHA-2 engine is disabled the digest is cleared, and the digest can be written to from SW which enables restoring context (to support context switching).
+ When the SHA-2 engine is disabled the digest is cleared.
 
 ### CFG . hmac_en
 HMAC datapath enable.
@@ -292,14 +292,14 @@ HMAC Status register
 {"reg": [{"name": "hmac_idle", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "fifo_empty", "bits": 1, "attr": ["ro"], "rotate": -90}, {"name": "fifo_full", "bits": 1, "attr": ["ro"], "rotate": -90}, {"bits": 1}, {"name": "fifo_depth", "bits": 6, "attr": ["ro"], "rotate": 0}, {"bits": 22}], "config": {"lanes": 1, "fontsize": 10, "vspace": 120}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name       | Description                                                                                        |
-|:------:|:------:|:-------:|:-----------|:---------------------------------------------------------------------------------------------------|
-| 31:10  |        |         |            | Reserved                                                                                           |
-|  9:4   |   ro   |    x    | fifo_depth | FIFO entry count.                                                                                  |
-|   3    |        |         |            | Reserved                                                                                           |
-|   2    |   ro   |    x    | fifo_full  | FIFO full. Data written to the FIFO whilst it is full will cause back-pressure on the interconnect |
-|   1    |   ro   |   0x1   | fifo_empty | FIFO empty                                                                                         |
-|   0    |   ro   |   0x1   | hmac_idle  | HMAC idle status.                                                                                  |
+|  Bits  |  Type  |  Reset  | Name       | Description                                                                                                                                                                       |
+|:------:|:------:|:-------:|:-----------|:----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| 31:10  |        |         |            | Reserved                                                                                                                                                                          |
+|  9:4   |   ro   |    x    | fifo_depth | FIFO entry count.                                                                                                                                                                 |
+|   3    |        |         |            | Reserved                                                                                                                                                                          |
+|   2    |   ro   |    x    | fifo_full  | FIFO full. Data written to the FIFO whilst it is full will cause back-pressure on the interconnect                                                                                |
+|   1    |   ro   |   0x1   | fifo_empty | FIFO empty                                                                                                                                                                        |
+|   0    |   ro   |   0x1   | hmac_idle  | HMAC idle status. When IDLE, the `DIGEST` and the `MSG_LENGTH_LOWER`/`MSG_LENGTH_UPPER` can be written to from SW which enables restoring context (to support context switching). |
 
 ## ERR_CODE
 HMAC Error Code
@@ -407,7 +407,8 @@ For SHA-2 256 order of the 256-bit digest[255:0] = {DIGEST0, DIGEST1, DIGEST2, D
 For SHA-2 384, {DIGEST12-DIGEST15} are truncated; they are irrelevant and should not be read out.
 
 The digest gets cleared when `CFG.sha_en` transitions from 1 to 0.
-When `CFG.sha_en` is 0, these registers can be written to by software.
+When `STATUS.hmac_idle` is 1, these registers may be written to by software.
+Outside of this window, writes can cause unpredictable behavior.
 - Reset default: `0x0`
 - Reset mask: `0xffffffff`
 
@@ -449,7 +450,8 @@ Received Message Length calculated by the HMAC in bits [31:0]
 Message is byte granularity.
 Lower 3 bits [2:0] are ignored.
 
-When `CFG.sha_en` is 0, this register can be written by software.
+When `STATUS.hmac_idle` is 1, this register may be written by software.
+Outside of this window, writes can cause unpredictable behavior.
 - Offset: `0xe4`
 - Reset default: `0x0`
 - Reset mask: `0xffffffff`
@@ -467,7 +469,8 @@ When `CFG.sha_en` is 0, this register can be written by software.
 ## MSG_LENGTH_UPPER
 Received Message Length calculated by the HMAC in bits [63:32]
 
-When `CFG.sha_en` is 0, this register can be written by software.
+When `STATUS.hmac_idle` is 1, this register may be written by software.
+Outside of this window, writes can cause unpredictable behavior.
 For SHA-2-2 256 computations, message length is 64-bit {MSG_LENGTH_UPPER, MSG_LENGTH_LOWER}.f
 For SHA-2 384/512 message length is extended to 128-bit in line with [nist-fips-180-4] where the upper 64 bits get zero-padded: {32'b0, 32'b0, MSG_LENGTH_UPPER, MSG_LENGTH_LOWER}.
 - Offset: `0xe8`
diff --git a/hw/ip/i2c/doc/I2C_state_diagram_target.svg b/hw/ip/i2c/doc/I2C_state_diagram_target.svg
deleted file mode 100644
index 31a1fb6aca082..0000000000000
--- a/hw/ip/i2c/doc/I2C_state_diagram_target.svg
+++ /dev/null
@@ -1 +0,0 @@
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-<title>Read&#45;&gt;PopFifo</title>
-<path fill="none" stroke="black" d="M465.65,-360.76C468.22,-294.87 473.17,-167.76 475.96,-96.22"/>
-<polygon fill="black" stroke="black" points="479.47,-96.21 476.36,-86.08 472.47,-95.93 479.47,-96.21"/>
-<text text-anchor="middle" x="523.5" y="-219.8" font-family="Times,serif" font-size="14.00">[completed] &amp;</text>
-<text text-anchor="middle" x="523.5" y="-204.8" font-family="Times,serif" font-size="14.00">(~STOP)</text>
-</g>
-<!-- Stop&#45;&gt;PopFifo -->
-<g id="edge11" class="edge">
-<title>Stop&#45;&gt;PopFifo</title>
-<path fill="none" stroke="black" d="M369.49,-173.27C369.09,-156.51 371.05,-137.54 379,-122 390.42,-99.69 411.45,-81.73 431.19,-68.69"/>
-<polygon fill="black" stroke="black" points="433.25,-71.53 439.83,-63.23 429.51,-65.61 433.25,-71.53"/>
-<text text-anchor="middle" x="421.5" y="-125.8" font-family="Times,serif" font-size="14.00">[completed]</text>
-</g>
-<!-- PopFifo&#45;&gt;Idle -->
-<g id="edge12" class="edge">
-<title>PopFifo:e&#45;&gt;Idle</title>
-<path fill="none" stroke="black" d="M522,-43C646.11,-43 742,-90.89 742,-215 742,-593 742,-593 742,-593 742,-652.01 692.24,-703.23 654.06,-733.86"/>
-<polygon fill="black" stroke="black" points="651.83,-731.16 646.11,-740.07 656.14,-736.67 651.83,-731.16"/>
-<text text-anchor="middle" x="795" y="-400.3" font-family="Times,serif" font-size="14.00">fmt_fifo_empty</text>
-</g>
-<!-- PopFifo&#45;&gt;Active -->
-<g id="edge13" class="edge">
-<title>PopFifo:ne&#45;&gt;Active</title>
-<path fill="none" stroke="black" d="M509,-75C546.85,-112.85 562.67,-122.03 579,-173 590.66,-209.4 583.28,-221.02 579,-259 566.03,-374.07 569.04,-407.64 521,-513 515.01,-526.14 506.6,-539.26 498.08,-550.9"/>
-<polygon fill="black" stroke="black" points="495.13,-549 491.88,-559.08 500.71,-553.22 495.13,-549"/>
-<text text-anchor="middle" x="634" y="-306.3" font-family="Times,serif" font-size="14.00">~fmt_fifo_empty</text>
-</g>
-</g>
-</svg>
diff --git a/hw/ip/i2c/doc/programmers_guide.md b/hw/ip/i2c/doc/programmers_guide.md
index 9af3df144594f..56fc217e67bbd 100644
--- a/hw/ip/i2c/doc/programmers_guide.md
+++ b/hw/ip/i2c/doc/programmers_guide.md
@@ -30,12 +30,13 @@ The values of these parameters will depend primarily on three bus details:
     - See table 10 of the I2C specification for more details.
 - (optional) The desired SCL cycle period, t<sub>SCL,user</sub> in ns.
     - By default the device should operate at the maximum frequency for that mode.
-    However, If the system developer wishes to operate at slower than the mode-specific maximum, a larger than minimum period  could be allowed as an additional functional parameter when calculating the timing parameters.
+    However, If the system developer wishes to operate at slower than the mode-specific maximum, a larger than minimum period could be allowed as an additional functional parameter when calculating the timing parameters.
 
 Additional Constraints
-- To guarantee clock stretching works correctly in Controller-Mode, there is a requirement of `THIGH >= 4`.
+- To guarantee clock stretching works correctly with the Controller Module, there is a requirement of `THIGH >= 4 + InputDelayCycles`.
 This constraint derives from the fact that there is a latency between the Controller FSM driving the bus and observing the effect of driving the bus.
 The implementation requires `THIGH` to be at least this large to guarantee that if the Target stretches the clock, we can observe it in time, and react accordingly.
+Note that `InputDelayCycles` is a hardware instance parameter provided by the top-level integration.
 
 Based on the inputs, the timing parameters may be chosen using the following algorithm:
 1. The physical timing parameters t<sub>HD,STA</sub>, t<sub>SU,STA</sub>, t<sub>HD.DAT</sub>, t<sub>SU,DAT</sub>, t<sub>BUF</sub>, and t<sub>STO</sub>, t<sub>HIGH</sub>, and t<sub>LOW</sub> all have minimum allowed values which depend on the choice of speed mode (Standard-mode, Fast-mode or Fast-mode Plus).
@@ -76,10 +77,9 @@ $$ \textrm{TIMING0.TLOW}=\textrm{TLOW_MIN} $$
 1. THIGH is then set to satisfy both constraints in the desired SCL period and in the minimum permissible values for t<sub>HIGH</sub>:
 $$ \textrm{TIMING0.THIGH}=\max(\textrm{PERIOD}-\textrm{T_R} - \textrm{TIMING0.TLOW} -\textrm{T_F}, \textrm{THIGH_MIN}) $$
 
-We are aware of two issues with timing calculations.
-First, the fall time (T_F) is counted twice in controller mode as is tracked in [issue #18958](https://github.com/lowRISC/opentitan/issues/18958).
-Second, the high time (THIGH) is 3 cycles longer when no clock stretching is detected as tracked in [issue #18962](https://github.com/lowRISC/opentitan/issues/18962).
-Due to these two discrepancies and the tendency of the above equations to create an underestimate of the eventual clock frequency, we recommend that the internal clock is driven at least 50x higher than the line speed.
+Note that the actual frequency will generally be lower, due to the need to round up counts after dividing.
+In addition, clock stretching can delay transitions.
+To achieve nominal rates within 5% or so, we recommend that the internal clock is driven at least 24x higher than the desired line speed.
 
 #### Timing parameter examples
 
@@ -112,31 +112,37 @@ All other parameters in registers `TIMING2`, `TIMING3`, `TIMING4` are unchanged
 | TIMING1.T_R     | 0                | 134        | 402            | Atypically high line capacitance             |
 | SCL Period      | 1000             | N/A        | 395            | Forced longer than minimum by long T_R        |
 
-## Writing `n` bytes to a device:
+## Controller Module Operations
+### Writing `n` bytes to a device:
 1. Address the device for writing by writing to:
-   - `FDATA.START` = 1;
-   - `FDATA.FBYTE` = <7-bit address + write bit>.
-2. Fill the TX_FIFO by writing to `FDATA.FBYTE` `n`-1 times.
+  - `FDATA.START` = 1;
+  - `FDATA.FBYTE` = <7-bit address + write bit>.
+2. Fill the FMT FIFO by writing to `FDATA.FBYTE` `n`-1 times.
 3. Send last byte with the stop bit by writing to:
-    - `FDATA.STOP` = 1;
-    - `FDATA.FBYTE` = <last byte>.
-
-<!-- TODO: Fix #18917 and remove the FMT_FIFO empty check before adding the full transaction to the FMT_FIFO -->
-## Reading `n` bytes from a device:
-1. Address the device for reading by writing to:
-   - `FDATA.START` = 1;
-   - `FDATA.FBYTE` = <7-bit address + read bit>.
-2. Wait the write transaction to finish by either checking:
-    - If `STATUS.FMTEMPTY` bit is 1.
-    - **Or** if `INTR_STATE.fmt_threshold` bit is 1 ( as long as `FIFO_CTRL.FMTILVL` is set to 1).
-3. If `INTR_STATE.nak` bit is 1, then go back to step 1, else proceed.
-4. Issue a read transaction by writing to.
-    - `FDATA.READ` = 1;
-    - `FDATA.STOP` = 1;
-    - `FDATA.FBYTE` = <`n`>.
-5. Wait for the read transaction to finish by checking:
-    -  `STATUS.FMTEMPTY` bit is 1.
-6. Retrieve the data from the FIFO by reading `RDATA` `n` times.
+  - `FDATA.STOP` = 1;
+  - `FDATA.FBYTE` = <last byte>.
+4. Wait for and check the result of the transaction.
+  - If `INTR_STATE.CONTROLLER_HALT` is 1, the transaction failed.
+    - Check `CONTROLLER_EVENTS` for the reason, reset the FMT FIFO with `FIFO_CTRL.FMTRST`, and clear the latched events.
+  - Otherwise, if `INTR_STATE.CMD_COMPLETE` is 1 and `STATUS.FMTEMPTY` is 1, the transaction succeeded.
+
+### Reading `n` bytes from a device:
+1. Address the device for reading by writing to the FMT FIFO:
+  - `FDATA.START` = 1;
+  - `FDATA.FBYTE` = <7-bit address + read bit>.
+2. Issue a read transfer by writing to the FMT FIFO.
+  - `FDATA.READ` = 1;
+  - `FDATA.STOP` = 1;
+  - `FDATA.FBYTE` = <`n`>.
+3. Wait for the transfer to finish or interrupt by checking:
+  - If `STATUS.FMTEMPTY` bit is 1.
+    - **Or** if `INTR_STATE.FMT_THRESHOLD` bit is 1 ( as long as `FIFO_CTRL.FMTILVL` is set to 1).
+  - If `INTR_STATE.CONTROLLER_HALT` is 1.
+4. If the `INTR_STATE.CONTROLLER_HALT` bit is 1, then set `FIFO_CTRL.FMTRST` to reset the FMT FIFO, clear latched events in `CONTROLLER_EVENTS`, and go back to step 1. Otherwise, proceed.
+5. If `STATUS.FMTEMPTY` is 1, the read transfer has completed.
+  - Retrieve the data from the FIFO by reading `RDATA` `n` times.
+
+<!-- TODO: Add target module operations. -->
 
 ## Device Interface Functions (DIFs)
 
diff --git a/hw/ip/i2c/doc/theory_of_operation.md b/hw/ip/i2c/doc/theory_of_operation.md
index 2465019a0a4a9..1800ddb4ca312 100644
--- a/hw/ip/i2c/doc/theory_of_operation.md
+++ b/hw/ip/i2c/doc/theory_of_operation.md
@@ -366,17 +366,20 @@ Firmware can configure the threshold value via the register [`HOST_FIFO_CONFIG.F
 
 If the RX FIFO receives an additional write request when its FIFO is full, the interrupt `rx_overflow` is asserted and the character is dropped.
 
-If the module transmits a byte and the 9th bit is a NACK from the Target/Bus, the `nack` interrupt is usually asserted (modulo the effect of [`FDATA.NAKOK`](registers.md#fdata)).
-If the 'nack' interrupt is asserted, the Controller Module FSM will halt until the interrupt has been acknowledged.
+If the module transmits a byte and the 9th bit is a NACK from the Target/Bus, the `controller_halt` interrupt is usually asserted (modulo the effect of [`FDATA.NAKOK`](registers.md#fdata)).
+If the `controller_halt` interrupt is asserted, the Controller Module FSM will halt until the interrupt has been acknowledged.
 See [the Controller NACK handling section](#controller-nack-handling) above for more details on this behaviour.
+In addition, the interrupt will be asserted if any of the other halt-causing events occur, such as a bus timeout or a loss of arbitration.
+This interrupt is a status type that requires clearing all triggering event latches before it will deassert.
 
-When the I2C module is in transmit mode, the `scl_interference` or `sda_interference` interrupts will be asserted if the IP identifies that some other device (controller or target) on the bus is forcing either signal low and interfering with the transmission.
+When the Controller Module is actively transmitting, the `scl_interference` or `sda_interference` interrupts will be asserted if the IP identifies that some other device (controller or target) on the bus is forcing either signal low and interfering with the transmission.
 It should be noted that the `scl_interference` interrupt is not raised in the case when the target device is stretching the clock.
-(However, it may be raised if the target allows SCL to go high and then pulls SCL down before the end of the current clock cycle.)
+However, it may be raised if the target allows SCL to go high and then pulls SCL down before the end of the current clock cycle.
+The `scl_interference` interrupt should be masked in multi-controller environments, since clock synchronization between controllers can trigger its assertion.
 
-A target device should never assert 0 on the SDA lines, and in the absence of multi-controller support, the `sda_interference` interrupt is raised whenever the controller IP detects that another device is pulling SDA low.
+The `sda_interference` interrupt is raised whenever the Controller Module detects that another device is pulling SDA low while the Controller Module is trying to transmit logic high.
 
-On the other hand, it is legal for the a target device to assert SCL low for clock stretching purposes.
+On the other hand, it is legal for a target device to assert SCL low for clock stretching purposes.
 With clock stretching, the target can delay the start of the following SCL pulse by holding SCL low between clock pulses.
 However the target device must assert SCL low before the start of the SCL pulse.
 If SCL is pulled low during an SCL pulse which has already started, this interruption of the SCL pulse will be registered as an exception by the I2C core, which will then assert the `scl_interference` interrupt.
@@ -393,8 +396,8 @@ If SCL is pulled low during an SCL pulse which has already started, this interru
 ```
 
 
-Though normal clock stretching does not count as SCL interference, if the module detects that a target device has held SCL low and stretched the any given SCL cycle for more than [`TIMEOUT_CTRL.VAL`](registers.md#timeout_ctrl) clock ticks this will cause the stretch timeout interrupt to be asserted.
-This interrupt is suppressed, however, if [`TIMEOUT_CTRL.EN`](registers.md#timeout_ctrl) is deasserted low.
+Though normal clock stretching does not count as SCL interference, if the module detects that a target device has held SCL low and stretched any given SCL cycle for more than [`TIMEOUT_CTRL.VAL`](registers.md#timeout_ctrl) clock ticks this will cause the stretch timeout interrupt to be asserted.
+This interrupt is suppressed, however, if [`TIMEOUT_CTRL.EN`](registers.md#timeout_ctrl) is deasserted low or if the bus timeout is selected for [`TIMEOUT_CTRL.MODE`](registers.md#timeout_ctrl).
 
 ```wavejson
 {signal: [
@@ -411,22 +414,24 @@ This interrupt is suppressed, however, if [`TIMEOUT_CTRL.EN`](registers.md#timeo
 ```
 
 Except for START and STOP symbols, the I2C specification requires that the SDA signal remains constant whenever SCL is high.
-The `sda_unstable` interrupt is asserted if, when receiving data or acknowledgement pulse, the value of the SDA signal does not remain constant over the duration of the SCL pulse.
-
-Transactions are terminated by a STOP signal.
-The controller may send a repeated START signal instead of a STOP, which also terminates the preceding transaction.
-In both cases, the `cmd_complete` interrupt is asserted, in the beginning of a repeated START or at the end of a STOP.
+The `sda_unstable` interrupt is asserted if, when receiving data or acknowledgement pulse, the value of the SDA signal does not remain constant over the duration of the SCL pulse, causing an unexpected START or STOP symbol.
 
+Transactions are terminated by a STOP signal, but individual transfers within a transaction can be completed by a STOP signal *or* a repeated START signal.
+When a transfer completes, the `cmd_complete` interrupt is asserted, in the beginning of a repeated START or at the end of a STOP.
+This interrupt is overloaded and represents the full IP's participation in any bus transactions.
+The Target Module's transfers also signal `cmd_complete`.
 
 #### Target Module
 
-The interrupt `cmd_complete` is asserted whenever a RESTART or a STOP bit is observed by the target.
+As mentioned above, the interrupt `cmd_complete` is asserted whenever a RESTART or a STOP bit is observed by the target, for a transfer that addressed the Target Module.
 
-The interrupt `tx_stretch` is asserted whenever target intends to transmit data but cannot.
-See [stretching during read]({{< relref "#stretching-during-read" >}}).
+The interrupt `tx_stretch` is asserted whenever the Target Module intends to transmit data but cannot.
+If software sets the bit [`CTRL.TX_STRETCH_CTRL_EN`](registers.md#ctrl), the Target Module will require software to confirm release of the TX FIFO at the beginning of every read transfer addressed to it.
+This behaviour may be useful to software, as any remaining data in the TX FIFO after a Sr/P condition may no longer apply to the next transfer, so it may have to be cleared out via [`FIFO_CTRL.TXRST`](registers.md#fifo_ctrl).
+For more on stretching on read transfers, see [stretching during read]({{< relref "#stretching-during-read" >}}).
 
 When a controller receives enough data from a target, it usually signals the end of the transaction by sending a NACK followed by a STOP or a repeated START.
-In a case when a target receives a STOP without the prerequisite NACK, the interrupt `unexp_stop` is asserted.
+In a case when the Target Module receives a STOP without the prerequisite NACK, the interrupt `unexp_stop` is asserted.
 This interrupt just means that a STOP was unexpectedly observed during a controller read.
 It is not necessarily harmful, but software can be made aware just in case.
 
@@ -436,18 +441,14 @@ Firmware can configure the threshold value via the register [`TARGET_FIFO_CONFIG
 Whilst the TX FIFO level is below a designated number of entries the `tx_threshold` interrupt is asserted.
 Firmware can configure the threshold value via the register [`TARGET_FIFO_CONFIG.TX_THRESH`](registers.md#target_fifo_config).
 
-If firmware sets the bit [`TARGET_FIFO_CONFIG.TXRST_ON_COND`](registers.md#target_fifo_config), the TX FIFO will be reset whenever a RSTART or STOP condition is seen on the bus during an active Target-Mode transaction.
-This behaviour may be useful to software, as any remaining data in the TXFIFO after a Sr/P condition is probably no-longer applicable to the next transfer, so will likely have to be cleared out anyway.
-Keeping this behaviour as a toggle allows software to observe the fifo state before resetting it, which may be useful to understand how much of the previous transfer completed if that information is helpful or relevant.
-
-If the Target module stretches the clock as a target-receiver, the interrupt `acq_stretch` is asserted.
+If the Target Module stretches the clock as a target-receiver, the interrupt `acq_stretch` is asserted.
 This can be due to a full ACQ FIFO, or it can be due to an ACK Control Mode stretch request.
 If ACK Control Mode is enabled, check the relevant bits in [`STATUS`](registers.md#status) to determine the reason(s).
 The `acq_stretch` interrupt is a Status type, so it will only de-assert once the stretch conditions are cleared.
 
 If a controller ceases to send SCL pulses at any point during an ongoing transaction, the target waits for a specified time period and then asserts the interrupt `host_timeout`.
-Controller sending an address and R/W bit to all target devices, writing to the selected target, or reading from the target are examples of ongoing transactions.
-The time period is counted from the last low-to-high SCL transition.
+A controller sending an address and R/W bit to all target devices, writing to the selected target, or reading from the target are examples of ongoing transactions.
+The time period is counted from the last low-to-high SCL transition and continues counting until SCL goes low.
 Firmware can configure the timeout value via the register [`HOST_TIMEOUT_CTRL`](registers.md#host_timeout_ctrl).
 
 ### Implementation Details: Format Flag Parsing
@@ -464,11 +465,87 @@ Each sub-sequence has a terminal event--generically labeled "[completed]" which
 
 However, all transitions which are dependent on formatting flags are shown explicitly in this figure.
 
-![](../doc/i2c_controller_states.svg)
+```mermaid
+stateDiagram-v2
+    Idle:       IDLE
+    Active:     ACTIVE
+    Start:      [Issue Start]
+    Transmit:   [Transmit\nByte]
+    Read:       [Read R\nBytes]
+    Stop:       [Issue Stop]
+    PopFifo:    POP_FMT_\nFIFO
+
+    [*]      --> Idle
+    Idle     --> Idle     : fmt_fifo_empty
+    Idle     --> Active   : ~fmt_fifo_empty
+    Active   --> Read     : READB
+    Active   --> Start    : (~READB) &\nSTART
+    Active   --> Transmit : (~READB) &\n(~START)
+    Read     --> PopFifo  : [completed] &\n(~STOP)
+    Read     --> Stop     : [completed] &\nSTOP
+    Start    --> Transmit : [completed]
+    Transmit --> Stop     : [completed] &\nSTOP
+    Transmit --> PopFifo  : [completed] &\n~STOP
+    Stop     --> PopFifo  : [completed]
+    PopFifo  --> Idle     : fmt_fifo_empty
+    PopFifo  --> Active   : ~fmt_fifo_empty
+```
 
 Similarly, the figure below shows a simplified version of the `I2C_Target` state machine.
 
-![](../doc/I2C_state_diagram_target.svg)
+```mermaid
+stateDiagram-v2
+
+    IdleStart    : [IdleStart]
+    AddrRead     : AddrRead
+    AddrAck      : [AddrAck]
+    StretchAddr  : StretchAddr
+    StretchTx    : [StretchTx]
+    TxByte       : [TxByte]
+    TxAck        : [TxAck]
+    AcquireByte  : AcquireByte
+    AcquireAck   : [AcquireAck]
+    StretchAcq   : StretchAcq
+    WaitForStop  : WaitForStop
+
+    [*]              --> IdleStart    : reset | stop_det | start_det
+    IdleStart        --> AddrRead
+    AddrRead         --> WaitForStop  : !address_match
+    AddrRead         --> AddrAck
+
+    state rnw_fork <<fork>>
+    AddrAck          --> StretchAddr  : stretch_addr
+    AddrAck          --> rnw_fork     : !stretch_addr
+    StretchAddr      --> rnw_fork     : !stretch_addr
+    rnw_fork         --> Tx           : !R/W
+    rnw_fork         --> Rx           : R/W
+
+    state Tx {
+        state tx_fork <<fork>>
+        [*]          --> tx_fork
+        tx_fork      --> TxByte       : tx_fifo_rvalid & !tx_halt
+        tx_fork      --> StretchTx    : !tx_fifo_rvalid & !tx_halt
+        StretchTx    --> TxByte       : tx_fifo_rvalid & !tx_halt
+        TxByte       --> TxAck
+        TxAck        --> tx_fork      : ack
+        TxAck        --> [*]          : !ack
+    }
+
+    state Rx {
+        state rx_fork <<fork>>
+        [*]          --> rx_fork
+        rx_fork      --> StretchAcq   : !acq_fifo_wready | !can_auto_ack
+        StretchAcq   --> AcquireByte  : acq_fifo_wready & can_auto_ack
+        rx_fork      --> AcquireByte  : acq_fifo_wready & can_auto_ack
+        AcquireByte  --> AcquireAck
+        AcquireAck   --> rx_fork      : ack
+        AcquireAck   --> [*]          : !ack
+    }
+
+    Tx               --> WaitForStop
+    Rx               --> WaitForStop
+    WaitForStop      --> [*]
+```
 
 In this diagram, "R/W" stands for a R/W bit value. The controller is reading when R/W bit is "1" and writing when R/W bit is "0".
 
diff --git a/hw/ip/kmac/data/kmac.hjson b/hw/ip/kmac/data/kmac.hjson
index 866062bf47868..a8db799c8dab2 100644
--- a/hw/ip/kmac/data/kmac.hjson
+++ b/hw/ip/kmac/data/kmac.hjson
@@ -475,8 +475,9 @@
           desc: '''Entropy Mode
 
           Using this field, software can configure mode of operation of the internal pseudo-random number generator (PRNG).
-          For the hardware to actually switch to an entropy mode other than the default idle_mode, software further needs to set the !!CFG_SHADOWED.entropy_ready bit.
-          After that point, the hardware cannot be made to return to idle_mode unless the module is reset.
+
+          Note that once software has configured a value different from `idle_mode` after reset, and set the !!CFG_SHADOWED.entropy_ready bit afterwards, the PRNG configuration cannot be changed anymore (unless an EDN request timeout occurs when running in EDN mode).
+          Further writes to this field will change the value received upon reading the register, but they will be ignored by the internal hardware.
           '''
 
           enum: [
@@ -489,8 +490,6 @@
               The internal PRNG is not reseeded with fresh entropy, nor updated while the core operates.
               It should therefore not be used after this very initial stage.
               Software should setup a different mode and set !!CFG_SHADOWED.entropy_ready as early as possible.
-
-              The module cannot be made to return to idle_mode once any of the other modes have been used.
               '''
             }
             { value: "1"
@@ -503,9 +502,16 @@
               Only after that, the module can start processing commands.
               Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core.
 
-              Depending on !!ENTROPY_PERIOD, the module will periodically reseed the internal PRNG with fresh entropy from EDN.
-              Using !!CMD.entropy_req software can manually initiate the reseeding.
+              The module will then automatically reseed the internal PRNG with fresh entropy from EDN every !!ENTROPY_REFRESH_THRESHOLD_SHADOWED messages in KMAC mode.
+              More precisely, automatic reseed operations are always triggered directly after the key absorption phase.
+              How close the module is to automatically trigger a reseed operation can be inferred from !!ENTROPY_REFRESH_HASH_CNT.
+              Alternatively, software can manually initiate reseeding operations using !!CMD.entropy_req while the module is idle.
+              This will also clear !!ENTROPY_REFRESH_HASH_CNT.
 
+              Depending on the state of the system, it may take a very long or even indefinite time for the entropy to be delivered.
+              As such, the configuration values for the !!ENTROPY_REFRESH_THRESHOLD_SHADOWED and !!ENTROPY_PERIOD registers should be chosen carefully.
+              Also, if the entropy complex becomes unavailable, there is a way to leave this mode and enter the fall-back software mode.
+              For guidance, refer to [EDN Entropy Mode](programmers_guide.md#edn-entropy-mode).
               '''
             }
             { value: "2"
@@ -514,12 +520,15 @@
 
               This entropy mode is a fall-back option to be used if the entropy complex is not available.
 
-              Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module will wait for software to write each of the !!ENTROPY_SEED_0 - !!ENTROPY_SEED_4 registers exactly once and in ascending order.
+              Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module will wait for software to write the !!ENTROPY_SEED register 6 times.
+              Upon each write, the written value is loaded into the corresponding state chunk of the entropy generator.
               Only after that, the module can start processing commands.
               Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core.
 
-              After this point, the PRNG can no longer be reseeded by software - also after switching back into this mode from edn_mode.
-              However, it is possible to switch to edn_mode.
+              After this point, the PRNG can no longer be reseeded by software.
+              Without a full reset of the KMAC block, there is no way to further change the configured mode.
+              Further writes to this field only change the value received upon reading the register.
+              The changes are ignored by the internal hardware.
               '''
             }
           ]
@@ -638,14 +647,18 @@
         } // f: cmd
         { bits: "8"
           name: "entropy_req"
-          desc: '''SW triggered Entropy Request
+          desc: '''
+                Software can set this bit to 1 to manually trigger the reseeding of the internal PRNG when running in EDN mode.
+                This will also clear !!ENTROPY_REFRESH_HASH_CNT.
 
-          If writes 1 to this field
-          '''
-        } // f: entropy_req
+                Note that the hardware may miss the trigger pulse if the module is not idle, or if the module is currently performing a reseed operation.
+                '''
+        }
         { bits: "9"
           name: "hash_cnt_clr"
-          desc: "If writes 1, it clears the hash (KMAC) counter in the entropy module"
+          desc: '''
+                Software can set this bit to 1 to manually clear !!ENTROPY_REFRESH_HASH_CNT.
+                '''
         }
         { bits: "10"
           name: err_processed
@@ -816,10 +829,10 @@
             Entropy seed register for the integrated entropy generator.
 
             If !!CFG_SHADOWED.entropy_mode is set to sw_mode, software first needs to set !!CFG_SHADOWED.entropy_ready.
-            Then, software needs to write the !!ENTROPY_SEED register 9 times.
+            Then, software needs to write the !!ENTROPY_SEED register 6 times.
             Upon each write, the written value is loaded into the corresponding state chunk of the entropy generator.
 
-            After writing the !!ENTROPY_SEED register 9 times, the entropy generator will start its operation.
+            After writing the !!ENTROPY_SEED register 6 times, the entropy generator will start its operation.
             After this point, writing this register has no longer any effect.
             '''
       hwext: "true"
diff --git a/hw/ip/kmac/doc/programmers_guide.md b/hw/ip/kmac/doc/programmers_guide.md
index 0a3cba947084b..ad1e1b99b07d4 100644
--- a/hw/ip/kmac/doc/programmers_guide.md
+++ b/hw/ip/kmac/doc/programmers_guide.md
@@ -63,6 +63,134 @@ The software writes `0x4d4b2001` into [`PREFIX0`](registers.md#prefix) and `0x??
 Upper 2 bytes can vary depending on the customization input string `S`.
 
 
+## EDN Entropy Mode
+
+For regular operation, [`CFG_SHADOWED.entropy_mode`](registers.md#cfg_shadowed--entropy_mode) should be set to EDN mode.
+In this mode, the module automatically reseeds the internal PRNG with fresh entropy from EDN after every [`ENTROPY_REFRESH_THRESHOLD_SHADOWED`](registers.md#entropy_refresh_threshold_shadowed) key absorption phases in KMAC mode.
+Alternatively, software can manually initiate reseeding operations using the [`CMD.entropy_req`](registers.md#cmd--entropy_req) bit while the module is idle.
+
+
+### Preventing potential deadlocks in EDN mode
+
+Under normal operating conditions, the SHA3 engine will process data a lot faster than software can push it to the Message FIFO.
+However, the Message FIFO may run full while the SHA3 engine is busy.
+In particular, this might happen because KMAC is waiting for fresh entropy from EDN.
+If software then tries to push further data to the Message FIFO, the processor will get stalled and if the entropy is not delivered (on time), the system may deadlock (see [Empty and Full status](theory_of_operation.md#empty-and-full-status) for details).
+
+To avoid this deadlock scenario, software should either:
+- Manually trigger PRNG reseed operations after ensuring the entropy complex is up and running (recommended), or
+- Check the Message FIFO depth before pushing data.
+
+Since the latter option can be inconvenient for software, especially when processing long messages, manually triggering PRNG reseed operations is the recommended approach.
+In the following, both approaches are outlined in more detail.
+
+
+#### Manually triggering PRNG reseeds
+
+Since automatic reseeds of the internal PRNG are always triggered after the key absorption phase in KMAC mode ([`CFG_SHADOWED.kmac_en`](registers.md#cfg_shadowed--kmac_en) set to 1), and since every message in KMAC mode has only one such phase, it is sufficient for software to check the [`ENTROPY_REFRESH_HASH_CNT`](registers.md#entropy_refresh_hash_cnt) register after finishing a KMAC message.
+
+If the value of [`ENTROPY_REFRESH_HASH_CNT`](registers.md#entropy_refresh_hash_cnt) gets sufficiently close to the value of [`ENTROPY_REFRESH_THRESHOLD_SHADOWED`](registers.md#entropy_refresh_threshold_shadowed), software should:
+
+1. Ensure that the entropy complex is running.
+2. Check that the KMAC module is idle by reading the [`STATUS.sha3_idle`](registers.md#status--sha3_idle) bit.
+3. Trigger a manual reseed operation by setting the [`CMD.entropy_req`](registers.md#cmd--entropy_req) bit.
+4. Configure the module to process a message in cSHAKE mode (but not in KMAC mode).
+   More precisely, set [`CFG_SHADOWED.mode`](registers.md#cfg_shadowed--mode) to `0x3` and [`CFG_SHADOWED.kmac_en`](registers.md#cfg_shadowed--kmac_en) to 0.
+5. Configure the module to use the PRNG and block any hashing operation if the PRNG is not ready by setting [`CFG_SHADOWED.entropy_fast_process`](registers.md#cfg_shadowed--entropy_fast_process) to 0.
+6. Send the `start` command to the [`CMD`](registers.md#cmd) register.
+   The SHA3 engine will start loading and hashing the function name `N` and the customization string `S` first.
+7. Send the `process` command to the [`CMD`](registers.md#cmd) register.
+8. Wait for the [`STATUS.sha3_squeeze`](registers.md#status--sha3_squeeze) bit to get set.
+   Due to the ongoing reseed operation, the [`STATUS.sha3_squeeze`](registers.md#status--sha3_squeeze) bit should remain 0 for an extended period of time.
+9. Send the `done` command to the [`CMD`](registers.md#cmd) register to finish processing.
+
+The [`ENTROPY_REFRESH_HASH_CNT`](registers.md#entropy_refresh_hash_cnt) register should now read as 0.
+Note however that if the manual reseed operation is triggered while the KMAC module is busy, the reseed operation may get skipped despite the hash counter being cleared back to 0.
+
+
+#### Checking Message FIFO depth before pushing data
+
+Alternatively, software can avoid ever pushing data into the Message FIFO while the FIFO is full by regularly checking the FIFO depth.
+In particular, software can then:
+
+1. Check the FIFO depth [`STATUS.fifo_depth`](registers.md#status--fifo_depth).
+   This represents the number of entry slots currently occupied in the FIFO.
+2. Calculate the remaining size as (`<max number of FIFO entries> - <STATUS.fifo_depth>) * <entry size>`.
+3. Write data to fill at most the calculated remaining size.
+4. Repeat until all data is written.
+   In case the FIFO runs full (check [`STATUS.fifo_full`](registers.md#status--fifo_full)), software should check the entropy complex is running and can then optionally wait for the `fifo_empty` status interrupt before continuing.
+
+In code, this looks something like:
+```c
+/**
+ * Absorb input data into the Keccak computation.
+ *
+ * Assumes that the KMAC block is in the "absorb" state; it is the caller's
+ * responsibility to check before calling.
+ *
+ * @param in Input buffer.
+ * @param in_len Length of input buffer (bytes).
+ * @return Number of bytes written.
+ */
+size_t kmac_absorb(const uint8_t *in, size_t in_len) {
+    // Read FIFO depth from the status register.
+    uint32_t status = abs_mmio_read32(kBase + KMAC_STATUS_REG_OFFSET);
+    uint32_t fifo_depth =
+        bitfield_field32_read(status, KMAC_STATUS_FIFO_DEPTH_FIELD);
+
+    // Calculate the remaining space in the FIFO using auto-generated KMAC
+    // parameters and take the minimum of that space and the input length.
+    size_t free_entries = (KMAC_PARAM_NUM_ENTRIES_MSG_FIFO - fifo_depth);
+    size_t max_len = free_entries * KMAC_PARAM_NUM_BYTES_MSG_FIFO_ENTRY;
+    size_t write_len = (in_len < max_len) ? in_len : max_len;
+
+    // Note: this example uses byte-writes for simplicity, but in practice it
+    // would be more efficient to use word-writes for aligned full words and
+    // byte-writes only as needed at the beginning and end of the input.
+    for (size_t i = 0; i < write_len; i++) {
+      abs_mmio_write8(kBase + KMAC_MSG_FIFO_REG_OFFSET, in[i]);
+    }
+
+    return write_len;
+}
+```
+
+Note that for modes other than KMAC, i.e., if [`CFG_SHADOWED.kmac_en`](registers.md#cfg_shadowed--kmac_en) is 0, the KMAC module will not increment the [`ENTROPY_REFRESH_HASH_CNT`](registers.md#entropy_refresh_hash_cnt) register and thus not trigger automatic reseeds.
+It is safe to push to the Message FIFO without checking the [`STATUS.fifo_depth`](registers.md#status--fifo_depth) register.
+
+
+### Configuring ENTROPY_PERIOD
+
+The [`ENTROPY_PERIOD`](registers.md#entropy_period) register defines how long the module should wait for entropy during a PRNG reseed before triggering an error.
+The configuration value should be carefully chosen based on how the entropy complex is operated.
+
+If CSRNG is running in [fully deterministic mode](../../csrng/doc/programmers_guide.md#fully-deterministic-mode), any EDN request will be answered fairly quickly.
+An [`ENTROPY_PERIOD.wait_timer`](registers.md#entropy_period--wait_timer) value of 5000 in combination with an [`ENTROPY_PERIOD.prescaler`](registers.md#entropy_period--prescaler) value of 0 is adequate.
+
+If CSRNG is running in [regular, non-deterministic mode](../../csrng/doc/programmers_guide.md#regular-non-deterministic-mode), it can happen that the PRNG reseed request of the KMAC module triggers a reseed request from EDN0 to CSRNG.
+For [Top Earlgrey](../../../top_earlgrey/README.md), producing a single CSRNG seed value is expected to take roughly 5ms.
+In the worst case, ENTROPY_SRC must first generate two more seeds to reseed all the other two CSRNG instances.
+In this case, the PRNG reseed request of KMAC should get served after roughly 15ms.
+If the ENTROPY_SRC is disabled, the interrupt latency and the delay for the startup health testing of the ENTROPY_SRC also need to be factored in to define the [`ENTROPY_PERIOD`](registers.md#entropy_period) configuration value.
+
+
+### Leaving EDN mode
+
+If the entropy complex becomes unavailable, software can cause the module to leave EDN mode as follows.
+Note that for this to work reliably, it is recommended to configure the [`ENTROPY_PERIOD`](registers.md#entropy_period) register to a non-zero value (see [`Configuring ENTROPY_PERIOD`](#configuring-entropy_period)).
+Otherwise, an already ongoing reseed operation may prevent the following procedure from working.
+
+1. Configure the [`ENTROPY_PERIOD`](registers.md#entropy_period) to a sufficiently small value such as `wait_timer` equals 1 and `prescaler` equals 0, or disable EDN0 which interfaces KMAC.
+2. Check that the KMAC module is idle by reading the [`STATUS.sha3_idle`](registers.md#status--sha3_idle) bit.
+3. Trigger a PRNG reseed operation via the [`CMD.entropy_req`](registers.md#cmd--entropy_req) bit.
+4. Wait for the entropy request to timeout and the `kmac_err` interrupt to fire.
+   The [`ERR_CODE`](registers.md#err_code) should now read `ErrWaitTimerExpired`.
+5. De-assert the [`CFG_SHADOWED.entropy_ready`](registers.md#cfg_shadowed--entropy_ready) bit.
+6. Set the [`CMD.err_processed`](registers.md#cmd--err_processed) bit to signal the processing of the error condition (see also [Error Handling](#error-handling)).
+
+The FSM controlling the PRNG then goes back into its reset state and software can re-configure the desired mode in the [`CFG_SHADOWED.entropy_mode`](registers.md#cfg_shadowed--entropy_mode) field and set the [`CFG_SHADOWED.entropy_ready`](registers.md#cfg_shadowed--entropy_ready) bit afterwards to latch the configuration.
+
+
 ## Error Handling
 
 When the KMAC HW IP encounters an error, it raises the `kmac_err` IRQ.
@@ -76,7 +204,7 @@ If the error occurred while the KMAC HW IP was being used from SW (i.e., not via
 
 ## KMAC/SHA3 context switching
 
-This version of KMAC/SHA3 HWIP _does not_ support the software context switching.
+This version of KMAC/SHA3 HWIP _does not_ support context switching.
 A context switching scheme would allow software to save the current hashing engine state and initiate a new high priority hashing operation.
 It could restore the previous hashing state later and continue the operation.
 
diff --git a/hw/ip/kmac/doc/registers.md b/hw/ip/kmac/doc/registers.md
index 87fcf0beabcb4..aa7564b770981 100644
--- a/hw/ip/kmac/doc/registers.md
+++ b/hw/ip/kmac/doc/registers.md
@@ -248,14 +248,15 @@ channel leakage.
 Entropy Mode
 
 Using this field, software can configure mode of operation of the internal pseudo-random number generator (PRNG).
-For the hardware to actually switch to an entropy mode other than the default idle_mode, software further needs to set the [`CFG_SHADOWED.entropy_ready`](#cfg_shadowed) bit.
-After that point, the hardware cannot be made to return to idle_mode unless the module is reset.
 
-| Value   | Name      | Description                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
-|:--------|:----------|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
-| 0x0     | idle_mode | Default mode after reset. The sole purpose of this mode is to enable ROM_CTRL operation right after coming out of reset. The internal PRNG is not reseeded with fresh entropy, nor updated while the core operates. It should therefore not be used after this very initial stage. Software should setup a different mode and set !!CFG_SHADOWED.entropy_ready as early as possible. The module cannot be made to return to idle_mode once any of the other modes have been used.                                                                                                                                                                                                                                                                                       |
-| 0x1     | edn_mode  | Receive fresh entropy from EDN for reseeding the internal PRNG. This entropy mode is to be used for regular operation. Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module requests fresh entropy from EDN for reseeding the internal PRNG. Only after that, the module can start processing commands. Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core. Depending on !!ENTROPY_PERIOD, the module will periodically reseed the internal PRNG with fresh entropy from EDN. Using !!CMD.entropy_req software can manually initiate the reseeding.                                                                                             |
-| 0x2     | sw_mode   | Receive initial entropy from software for reseeding the internal PRNG. This entropy mode is a fall-back option to be used if the entropy complex is not available. Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module will wait for software to write each of the !!ENTROPY_SEED_0 - !!ENTROPY_SEED_4 registers exactly once and in ascending order. Only after that, the module can start processing commands. Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core. After this point, the PRNG can no longer be reseeded by software - also after switching back into this mode from edn_mode. However, it is possible to switch to edn_mode. |
+Note that once software has configured a value different from `idle_mode` after reset, and set the [`CFG_SHADOWED.entropy_ready`](#cfg_shadowed) bit afterwards, the PRNG configuration cannot be changed anymore (unless an EDN request timeout occurs when running in EDN mode).
+Further writes to this field will change the value received upon reading the register, but they will be ignored by the internal hardware.
+
+| Value   | Name      | Description                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      |
+|:--------|:----------|:---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+| 0x0     | idle_mode | Default mode after reset. The sole purpose of this mode is to enable ROM_CTRL operation right after coming out of reset. The internal PRNG is not reseeded with fresh entropy, nor updated while the core operates. It should therefore not be used after this very initial stage. Software should setup a different mode and set !!CFG_SHADOWED.entropy_ready as early as possible.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+| 0x1     | edn_mode  | Receive fresh entropy from EDN for reseeding the internal PRNG. This entropy mode is to be used for regular operation. Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module requests fresh entropy from EDN for reseeding the internal PRNG. Only after that, the module can start processing commands. Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core. The module will then automatically reseed the internal PRNG with fresh entropy from EDN every !!ENTROPY_REFRESH_THRESHOLD_SHADOWED messages in KMAC mode. More precisely, automatic reseed operations are always triggered directly after the key absorption phase. How close the module is to automatically trigger a reseed operation can be inferred from !!ENTROPY_REFRESH_HASH_CNT. Alternatively, software can manually initiate reseeding operations using !!CMD.entropy_req while the module is idle. This will also clear !!ENTROPY_REFRESH_HASH_CNT. Depending on the state of the system, it may take a very long or even indefinite time for the entropy to be delivered. As such, the configuration values for the !!ENTROPY_REFRESH_THRESHOLD_SHADOWED and !!ENTROPY_PERIOD registers should be chosen carefully. Also, if the entropy complex becomes unavailable, there is a way to leave this mode and enter the fall-back software mode. For guidance, refer to [EDN Entropy Mode](programmers_guide.md#edn-entropy-mode). |
+| 0x2     | sw_mode   | Receive initial entropy from software for reseeding the internal PRNG. This entropy mode is a fall-back option to be used if the entropy complex is not available. Once the !!CFG_SHADOWED.entropy_ready bit is set after reset, the module will wait for software to write the !!ENTROPY_SEED register 6 times. Upon each write, the written value is loaded into the corresponding state chunk of the entropy generator. Only after that, the module can start processing commands. Depending on !!CFG_SHADOWED, the internal PRNG is then used for (re-)masking inputs (prefix, key, message) and intermediate results of the Keccak core. After this point, the PRNG can no longer be reseeded by software. Without a full reset of the KMAC block, there is no way to further change the configured mode. Further writes to this field only change the value received upon reading the register. The changes are ignored by the internal hardware.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
 
 Other values are reserved.
 
@@ -363,12 +364,13 @@ When error occurs and one of the state machine stays at
  ERR_CODE, then let FSM back to the reset state
 
 ### CMD . hash_cnt_clr
-If writes 1, it clears the hash (KMAC) counter in the entropy module
+Software can set this bit to 1 to manually clear [`ENTROPY_REFRESH_HASH_CNT.`](#entropy_refresh_hash_cnt)
 
 ### CMD . entropy_req
-SW triggered Entropy Request
+Software can set this bit to 1 to manually trigger the reseeding of the internal PRNG when running in EDN mode.
+This will also clear [`ENTROPY_REFRESH_HASH_CNT.`](#entropy_refresh_hash_cnt)
 
-If writes 1 to this field
+Note that the hardware may miss the trigger pulse if the module is not idle, or if the module is currently performing a reseed operation.
 
 ### CMD . cmd
 Issue a command to the KMAC/SHA3 IP. The command is sparse
@@ -551,10 +553,10 @@ Entropy Seed
 Entropy seed register for the integrated entropy generator.
 
 If [`CFG_SHADOWED.entropy_mode`](#cfg_shadowed) is set to sw_mode, software first needs to set [`CFG_SHADOWED.entropy_ready.`](#cfg_shadowed)
-Then, software needs to write the [`ENTROPY_SEED`](#entropy_seed) register 9 times.
+Then, software needs to write the [`ENTROPY_SEED`](#entropy_seed) register 6 times.
 Upon each write, the written value is loaded into the corresponding state chunk of the entropy generator.
 
-After writing the [`ENTROPY_SEED`](#entropy_seed) register 9 times, the entropy generator will start its operation.
+After writing the [`ENTROPY_SEED`](#entropy_seed) register 6 times, the entropy generator will start its operation.
 After this point, writing this register has no longer any effect.
 - Offset: `0x2c`
 - Reset default: `0x0`
diff --git a/hw/ip/kmac/doc/theory_of_operation.md b/hw/ip/kmac/doc/theory_of_operation.md
index 7251d140f0d57..11ec123caf3ae 100644
--- a/hw/ip/kmac/doc/theory_of_operation.md
+++ b/hw/ip/kmac/doc/theory_of_operation.md
@@ -143,69 +143,29 @@ Default design parameters assume the system characteristics as below:
 - `kmac_pkg::RegLatency`: The register write takes 5 cycles.
 - `kmac_pkg::Sha3Latency`: Keccak round latency takes 96 cycles, which is the masked version of the Keccak round.
 
-#### FIFO Depth and Empty status
+#### Empty and Full status
 
-If the SW is slow and the SHA3 engine pops the data fast enough, the Message FIFO's depth may remain **0**.
-The Message FIFO's `fifo_empty` status bit, however, is lowered for a cycle.
+Under normal operating conditions, the SHA3 engine will process data a lot faster than software can push it to the Message FIFO.
+The Message FIFO depth observable from [`STATUS.fifo_depth`](registers.md#status--fifo_depth) will remain **0** while the [`STATUS.fifo_empty`](registers.md#status--fifo_empty) status bit is lowered for one clock cycle whenever software provides new data.
 
 However, if the SHA3 engine is currently busy or if the KMAC block is waiting for fresh entropy from EDN, the Message FIFO may actually run full (indicated by the `fifo_full` status bit).
 Resolving these conditions may take hundreds of cycles or more.
 After the SHA3 engine starts popping the data again, the Message FIFO will eventually run empty again and the `fifo_empty` status interrupt will fire.
 Note that the `fifo_empty` status interrupt will not fire if i) one of the hardware application interfaces is using the KMAC block, ii) the SHA3 core is not in the `Absorb` state, or iii) after software has written the `Process` command.
 
-The recommended approach for software to write messages is:
-
-1. Check the FIFO depth [`STATUS.fifo_depth`](registers.md#status). This represents the number of entry slots currently occupied in the FIFO.
-2. Calculate the remaining size as `<max number of fifo entries> - <STATUS.fifo_depth>) * <entry size>`.
-3. Write data to fill the remaining size.
-4. Repeat until all data is written.
-   In case the FIFO runs full (check [`STATUS.fifo_full`](registers.md#status)), software can optionally wait for the `fifo_empty` status interrupt before continuing.
-
-In code, this looks something like:
-```c
-/**
- * Absorb input data into the Keccak computation.
- *
- * Assumes that the KMAC block is in the "absorb" state; it is the caller's
- * responsibility to check before calling.
- *
- * @param in Input buffer.
- * @param in_len Length of input buffer (bytes).
- * @return Number of bytes written.
- */
-size_t kmac_absorb(const uint8_t *in, size_t in_len) {
-    // Read FIFO depth from the status register.
-    uint32_t status = abs_mmio_read32(kBase + KMAC_STATUS_REG_OFFSET);
-    uint32_t fifo_depth =
-        bitfield_field32_read(status, KMAC_STATUS_FIFO_DEPTH_FIELD);
-
-    // Calculate the remaining space in the FIFO using auto-generated KMAC
-    // parameters and take the minimum of that space and the input length.
-    size_t free_entries = (KMAC_PARAM_NUM_ENTRIES_MSG_FIFO - fifo_depth);
-    size_t max_len = free_entries * KMAC_PARAM_NUM_BYTES_MSG_FIFO_ENTRY;
-    size_t write_len = (in_len < max_len) ? in_len : max_len;
-
-    // Note: this example uses byte-writes for simplicity, but in practice it
-    // would be more efficient to use word-writes for aligned full words and
-    // byte-writes only as needed at the beginning and end of the input.
-    for (size_t i = 0; i < write_len; i++) {
-      abs_mmio_write8(kBase + KMAC_MSG_FIFO_REG_OFFSET, in[i]);
-    }
-
-    return write_len;
-}
-```
-
-The method recommended above is always safe.
-However, in specific contexts, it may be okay to skip polling `STATUS.fifo_depth`.
-Normally, KMAC will process data faster than software can write it, and back pressure on the FIFO interface, should ensure that writes from software will simply block until KMAC can process messages.
-The only reason for polling, then, is to prevent a specific deadlock scenario:
-1. Software has configured KMAC to wait forever for entropy.
-2. There is a problem with the EDN, so entropy is never coming.
-3. The FIFO is full and KMAC is waiting for entropy to process it.
-
-If either the entropy wait timer is nonzero or `kmac_en` is false (so KMAC will not be refreshing entropy), it is safe to write to the FIFO without polling `STATUS.fifo_depth`.
-However, this should be done carefully, and tests should always cover the scenario in which EDN is locked up.
+If software pushes data to the Message FIFO while it is full, the write operation is blocked until there is again space in the FIFO.
+This means the processor is effectively stalled.
+If the SHA3 engine is currently running and software fills up the Message FIFO, the resulting stall won't take more than 100 clock cycles.
+The stall mechanism prevents data loss and the upper bound on the wait time avoids software needing to poll the [`STATUS.fifo_depth`](registers.md#status--fifo_depth) field before writing data.
+
+However, the FIFO can also become full because the KMAC block is waiting for fresh entropy from EDN.
+Resolving this condition can take much longer, and it can even result in deadlocking the system if the following conditions are met:
+1. Software attempts to push data to the Message FIFO while it is full.
+1. The fresh entropy is not delivered and the value of the [`ENTROPY_PERIOD`](registers.md#entropy_period) register is 0, meaning the wait timer never expires.
+
+The entropy not getting delivered in time can in particular happen if the entropy complex or parts of it are disabled, e.g., [to save power](../../csrng/doc/programmers_guide.md#running-csrng-with-entropy_src-disabled).
+Refer to [Preventing potential deadlocks in EDN mode](programmers_guide.md#preventing-potential-deadlocks-in-edn-mode) for guidance on how to safely avoid this scenario.
+
 
 #### Masking
 
diff --git a/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson b/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson
index 53564c26c4d79..80a8aaf5f0337 100644
--- a/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson
+++ b/hw/ip/kmac/dv/kmac_base_sim_cfg.hjson
@@ -95,6 +95,7 @@
       name: "{name}_long_msg_and_output"
       uvm_test_seq: kmac_long_msg_and_output_vseq
       run_opts: ["+test_timeout_ns=10_000_000_000"]
+      run_timeout_mins: 90
     }
     {
       name: "{name}_sideload"
@@ -112,6 +113,7 @@
       run_opts: ["+test_vectors_dir={build_dir}/src/lowrisc_dv_test_vectors_0",
                  "+test_timeout_ns=5_000_000_000",
                  "+test_vectors_sha3_variant=224"]
+      run_timeout_mins: 90
     }
     {
       name: "{name}_test_vectors_sha3_256"
@@ -119,6 +121,7 @@
       run_opts: ["+test_vectors_dir={build_dir}/src/lowrisc_dv_test_vectors_0",
                  "+test_timeout_ns=5_000_000_000",
                  "+test_vectors_sha3_variant=256"]
+      run_timeout_mins: 90
     }
     {
       name: "{name}_test_vectors_sha3_384"
@@ -140,7 +143,7 @@
       run_opts: ["+test_vectors_dir={build_dir}/src/lowrisc_dv_test_vectors_0",
                  "+test_timeout_ns=5_000_000_000",
                  "+test_vectors_shake_variant=128"]
-      run_timeout_mins: 120
+      run_timeout_mins: 180
     }
     {
       name: "{name}_test_vectors_shake_256"
@@ -148,7 +151,7 @@
       run_opts: ["+test_vectors_dir={build_dir}/src/lowrisc_dv_test_vectors_0",
                  "+test_timeout_ns=5_000_000_000",
                  "+test_vectors_shake_variant=256"]
-      run_timeout_mins: 120
+      run_timeout_mins: 180
     }
     {
       name: "{name}_test_vectors_kmac"
diff --git a/hw/ip/kmac/pre_dv/kmac_reduced_tb/kmac_reduced_tb.core b/hw/ip/kmac/pre_dv/kmac_reduced_tb/kmac_reduced_tb.core
index e116b150cba94..48b4289cc02b7 100644
--- a/hw/ip/kmac/pre_dv/kmac_reduced_tb/kmac_reduced_tb.core
+++ b/hw/ip/kmac/pre_dv/kmac_reduced_tb/kmac_reduced_tb.core
@@ -44,7 +44,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=kmac_reduced_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=kmac_reduced_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # This TB is mainly used for developing and prototyping security
diff --git a/hw/ip/lc_ctrl/data/lc_ctrl.hjson b/hw/ip/lc_ctrl/data/lc_ctrl.hjson
index d5b0a890cfa26..eb8fc6304d0a0 100644
--- a/hw/ip/lc_ctrl/data/lc_ctrl.hjson
+++ b/hw/ip/lc_ctrl/data/lc_ctrl.hjson
@@ -17,7 +17,7 @@
   sw_checklist:       "/sw/device/lib/dif/dif_lc_ctrl",
   version:            "2.0.0",
   life_stage:         "L1",
-  design_stage:       "D2S",
+  design_stage:       "D3",
   verification_stage: "V2S",
   dif_stage:          "S2",
   clocking: [
diff --git a/hw/ip/lc_ctrl/doc/checklist.md b/hw/ip/lc_ctrl/doc/checklist.md
index e03383c150060..4d7f03dc478b4 100644
--- a/hw/ip/lc_ctrl/doc/checklist.md
+++ b/hw/ip/lc_ctrl/doc/checklist.md
@@ -102,15 +102,15 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 --------------|-------------------------|-------------|------------------
 Documentation | [NEW_FEATURES_D3][]     | Done        |
 RTL           | [TODO_COMPLETE][]       | Done        |
-Code Quality  | [LINT_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | Waiver files approved by TC on 2024-08-08.
 Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
 Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_RTL][]          | Done        |
 Review        | [REVIEW_DELETED_FF][]   | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_SW_CHANGE][]    | Done        |
 Review        | [REVIEW_SW_ERRATA][]    | Done        |
-Review        | Reviewer(s)             | Done        | msf@ rswarbrick@ chencindy@ ttrippel@
-Review        | Signoff date            | Done        | 2022-05-24
+Review        | Reviewer(s)             | Done        | rswarbrick@ vogelpi@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/ip/otbn/dv/otbnsim/sim/dmem.py b/hw/ip/otbn/dv/otbnsim/sim/dmem.py
index 603a3a5a9ba43..166f9380d2692 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/dmem.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/dmem.py
@@ -52,7 +52,7 @@ def __init__(self) -> None:
         # if the word has invalid integrity bits and we'll get an error if we
         # try to read it. Otherwise, we store the integer value.
         num_words = dmem_size // 4
-        self.data = [None] * num_words  # type: List[Optional[int]]
+        self.data: List[Optional[int]] = [None] * num_words
 
         # Because it's an actual memory, stores to DMEM take two cycles in the
         # RTL. We wouldn't need to model this except that a DMEM invalidation
@@ -63,11 +63,11 @@ def __init__(self) -> None:
         # this cycle. However, the first commit() will then move it to the
         # self.pending list. Entries here will only make it to self.data on the
         # next commit().
-        self.trace = []  # type: List[TraceDmemStore]
-        self.pending = {}  # type: Dict[int, int]
+        self.trace: List[TraceDmemStore] = []
+        self.pending: Dict[int, int] = {}
 
-    def _load_5byte_le_words(self, data: bytes) -> None:
-        '''Replace the start of memory with data
+    def _load_5byte_le_words(self, data: bytes, word_offset: int) -> None:
+        '''Replace the memory start at word_offset with data
 
         The bytes loaded should represent each 32-bit word with 5 bytes,
         consisting of a validity byte (0 or 1) followed by 4 bytes for the word
@@ -97,10 +97,10 @@ def _load_5byte_le_words(self, data: bytes) -> None:
                 raise ValueError('The validity byte for 32-bit word {} '
                                  'in the input data is {}, not 0 or 1.'
                                  .format(idx32, vld))
-            self.data[idx32] = u32 if vld else None
+            self.data[idx32 + word_offset] = u32 if vld else None
 
-    def _load_4byte_le_words(self, data: bytes) -> None:
-        '''Replace the start of memory with data
+    def _load_4byte_le_words(self, data: bytes, word_offset: int) -> None:
+        '''Replace the memory start at word_offset with data
 
         The bytes loaded should represent each 32-bit word with 4 bytes in
         little-endian format.
@@ -116,19 +116,19 @@ def _load_4byte_le_words(self, data: bytes) -> None:
             data = data + b'0' * (32 - (len(data) % 32))
 
         for idx32, u32 in enumerate(struct.iter_unpack('<I', data)):
-            self.data[idx32] = u32[0]
+            self.data[idx32 + word_offset] = u32[0]
 
-    def load_le_words(self, data: bytes, has_validity: bool) -> None:
-        '''Replace the start of memory with data
+    def load_le_words(self, data: bytes, has_validity: bool, word_offset: int) -> None:
+        '''Replace the memory start at word_offset with data
 
         Uses the 5-byte format if has_validity is true and the 4-byte format
         otherwise.
 
         '''
         if has_validity:
-            self._load_5byte_le_words(data)
+            self._load_5byte_le_words(data, word_offset)
         else:
-            self._load_4byte_le_words(data)
+            self._load_4byte_le_words(data, word_offset)
 
     def dump_le_words(self) -> bytes:
         '''Return the contents of memory as bytes.
diff --git a/hw/ip/otbn/dv/otbnsim/sim/edn_client.py b/hw/ip/otbn/dv/otbnsim/sim/edn_client.py
index b0c840d1629f9..d50ed978f111d 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/edn_client.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/edn_client.py
@@ -18,12 +18,12 @@ def __init__(self) -> None:
         # non-None if we're in the middle of reading a value from the EDN. This
         # should always have length <= ACC_LEN (sending an extra beat of data
         # causes an error).
-        self._acc = None  # type: Optional[List[int]]
+        self._acc: Optional[List[int]] = None
 
         # A counter of the number of beats we've been waiting since self._acc
         # became full before being told that CDC was done. This is None unless
         # self._acc contains a list of ACC_LEN values.
-        self._cdc_counter = None  # type: Optional[int]
+        self._cdc_counter: Optional[int] = None
 
         # If true, the next transaction that completes will be discarded.
         self._poisoned = False
@@ -35,7 +35,7 @@ def __init__(self) -> None:
         self._fips_err = False
         self._rep_err = False
 
-        self._last_word = None  # type: Optional[int]
+        self._last_word: Optional[int] = None
 
     def request(self) -> None:
         '''Start a request if there isn't one pending'''
diff --git a/hw/ip/otbn/dv/otbnsim/sim/ext_regs.py b/hw/ip/otbn/dv/otbnsim/sim/ext_regs.py
index f49a62481991b..55cc8259d3629 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/ext_regs.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/ext_regs.py
@@ -129,8 +129,8 @@ class RGReg:
     def __init__(self, fields: List[RGField], double_flopped: bool):
         self.fields = fields
         self.double_flopped = double_flopped
-        self._changes = []  # type: List[ExtRegChange]
-        self._next_changes = []  # type: List[ExtRegChange]
+        self._changes: List[ExtRegChange] = []
+        self._next_changes: List[ExtRegChange] = []
 
     @staticmethod
     def from_register(reg: Register, double_flopped: bool) -> 'RGReg':
@@ -254,7 +254,7 @@ class OTBNExtRegs:
     def __init__(self) -> None:
         _, reg_block = load_registers()
 
-        self.regs = {}  # type: Dict[str, RGReg]
+        self.regs: Dict[str, RGReg] = {}
         self._dirty = 0
 
         assert isinstance(reg_block, RegBlock)
diff --git a/hw/ip/otbn/dv/otbnsim/sim/flags.py b/hw/ip/otbn/dv/otbnsim/sim/flags.py
index 9dae8eb07f3f5..b8cee7e88d2cf 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/flags.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/flags.py
@@ -38,7 +38,7 @@ def __init__(self, C: bool, M: bool, L: bool, Z: bool):
         self.L = L
         self.Z = Z
 
-        self._new_val = None  # type: Optional['FlagReg']
+        self._new_val: Optional['FlagReg'] = None
 
     def set_flags(self, other: 'FlagReg') -> None:
         self._new_val = other
diff --git a/hw/ip/otbn/dv/otbnsim/sim/isa.py b/hw/ip/otbn/dv/otbnsim/sim/isa.py
index 1df37750a7c66..1aa957e122098 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/isa.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/isa.py
@@ -54,7 +54,7 @@ class OTBNInsn:
 
     # A class variable that holds the Insn subclass corresponding to this
     # instruction.
-    insn = DummyInsn()  # type: Insn
+    insn: Insn = DummyInsn()
 
     # A class variable that is set by Insn subclasses that represent
     # instructions that affect control flow (and are not allowed at the end of
@@ -76,7 +76,7 @@ def __init__(self, raw: int, op_vals: Dict[str, int]):
         # Memoized disassembly for this instruction. We store the PC at which
         # we disassembled too (which should be the same next time around, but
         # it can't hurt to check).
-        self._disasm = None  # type: Optional[Tuple[int, str]]
+        self._disasm: Optional[Tuple[int, str]] = None
 
     def execute(self, state: OTBNState) -> Optional[Iterator[None]]:
         '''Execute the instruction
diff --git a/hw/ip/otbn/dv/otbnsim/sim/load_elf.py b/hw/ip/otbn/dv/otbnsim/sim/load_elf.py
index 68a5abded7621..b44f10fe673d9 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/load_elf.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/load_elf.py
@@ -89,5 +89,6 @@ def load_elf(sim: OTBNSim, path: str) -> Optional[int]:
     sim.load_program(imem_insns)
     sim.loop_warps = loop_warps
     sim.load_data(dmem_bytes, has_validity=False)
+    sim.symbols = symbols
 
     return exp_end
diff --git a/hw/ip/otbn/dv/otbnsim/sim/reg.py b/hw/ip/otbn/dv/otbnsim/sim/reg.py
index 7aaae27bfa680..7a221d26403fd 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/reg.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/reg.py
@@ -39,7 +39,7 @@ def __init__(self,
         self._width = width
 
         self._uval = uval
-        self._next_uval = None  # type: Optional[int]
+        self._next_uval: Optional[int] = None
 
     def read_unsigned(self, backdoor: bool = False) -> int:
         return self._uval
@@ -99,7 +99,7 @@ def __init__(self,
         self._name_pfx = name_pfx
         self._width = width
         self._registers = [Reg(self, i, width, 0) for i in range(depth)]
-        self._pending_writes = set()  # type: Set[int]
+        self._pending_writes: Set[int] = set()
 
     def mark_written(self, idx: int) -> None:
         '''Mark a register as having been written'''
diff --git a/hw/ip/otbn/dv/otbnsim/sim/sim.py b/hw/ip/otbn/dv/otbnsim/sim/sim.py
index 8bbd79a419e0e..6caf46c090394 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/sim.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/sim.py
@@ -25,11 +25,12 @@
 class OTBNSim:
     def __init__(self) -> None:
         self.state = OTBNState()
-        self.program = []  # type: List[OTBNInsn]
-        self.loop_warps = {}  # type: LoopWarps
-        self.stats = None  # type: Optional[ExecutionStats]
-        self._execute_generator = None  # type: Optional[Iterator[None]]
-        self._next_insn = None  # type: Optional[OTBNInsn]
+        self.program: List[OTBNInsn] = []
+        self.loop_warps: LoopWarps = {}
+        self.stats: Optional[ExecutionStats] = None
+        self.symbols: Dict[str, int] = {}
+        self._execute_generator: Optional[Iterator[None]] = None
+        self._next_insn: Optional[OTBNInsn] = None
 
     def load_program(self, program: List[OTBNInsn]) -> None:
         self.program = program.copy()
@@ -49,7 +50,7 @@ def load_data(self, data: bytes, has_validity: bool) -> None:
         format.
 
         '''
-        self.state.dmem.load_le_words(data, has_validity)
+        self.state.dmem.load_le_words(data, has_validity, word_offset=0)
 
     def start(self, collect_stats: bool) -> None:
         '''Prepare to start the execution.
@@ -137,12 +138,12 @@ def _on_retire(self,
 
         return changes
 
-    def _delayed_insn_cnt_zero(self) -> None:
+    def _delayed_insn_cnt_zero(self, delay_if_locking: int) -> None:
         '''Zero INSN_CNT if we are in a wiping state and are going to lock
         after wipe.
 
-        This is delayed by a cycle (using the zero_insn_cnt_next flag) to match
-        the timing in the RTL.
+        This is delayed by delay_if_locking (using state.time_to_insn_cnt_zero)
+        to match the timing in the RTL.
         '''
         assert self.state.get_fsm_state() in [FsmState.PRE_WIPE,
                                               FsmState.WIPING]
@@ -156,12 +157,23 @@ def _delayed_insn_cnt_zero(self) -> None:
         if self.state.ext_regs.read('INSN_CNT', True) == 0:
             return
 
-        if self.state.zero_insn_cnt_next or not self.state.lock_immediately:
+        # In this case, we know we want to zero INSN_CNT. There might be an
+        # operation to do so that has already been enqueued. If not (or if it
+        # would be waiting longer than delay_if_locking), switch to a new
+        # counter.
+        if self.state.time_to_insn_cnt_zero is None:
+            self.state.time_to_insn_cnt_zero = delay_if_locking
+        count = min(self.state.time_to_insn_cnt_zero, delay_if_locking)
+
+        if count == 0:
+            # If _time_to_insn_cnt_zero is now zero, it means that this is the
+            # cycle to update insn_cnt.
             self.state.ext_regs.write('INSN_CNT', 0, True)
-            self.state.zero_insn_cnt_next = False
-        if self.state.lock_immediately:
-            # Zero INSN_CNT in the *next* cycle to match RTL control flow.
-            self.state.zero_insn_cnt_next = True
+            self.state.time_to_insn_cnt_zero = None
+        else:
+            # If _time_to_insn_cnt_zero isn't zero, we should decrement it
+            # (maybe we'll update insn_cnt next cycle).
+            self.state.time_to_insn_cnt_zero = count - 1
 
     def step(self, verbose: bool) -> StepRes:
         '''Run a single cycle.
@@ -215,7 +227,7 @@ def _step_idle(self, verbose: bool) -> StepRes:
         # If we are IDLE and get an RMA request, we want to start a secure
         # wipe, which will eventually put us into the LOCKED state.
         if self.state.rma_req == LcTx.ON and not is_locked:
-            self.state.ext_regs.write('STATUS', Status.BUSY_SEC_WIPE_INT, True)
+            self.state.ext_regs.write('STATUS', Status.LOCKED, True)
             self.state.set_fsm_state(FsmState.PRE_WIPE)
             self.state.lock_after_wipe = True
             self.state.wipe_rounds_done = 0
@@ -363,6 +375,20 @@ def _step_exec(self, verbose: bool) -> StepRes:
     def _step_pre_wipe(self, verbose: bool) -> StepRes:
         '''Step the simulation when waiting for a URND seed for wipe'''
 
+        # This is a bit of a hack to model a bug in the design where the STATUS
+        # register has a value of 0xff for a single cycle before it becomes
+        # BUSY_SEC_WIPE_INT.
+        #
+        # This happens when responding to an RMA request in _step_idle. If we
+        # update the register to be BUSY_SEC_WIPE_INT on each cycle (and the
+        # first one we are here in particular!), we will get analogous
+        # behaviour.
+        #
+        # TODO(#23903): Fix the bug in the design then drop this code (and
+        # change the STATUS value in _step_idle from LOCKED to
+        # BUSY_SEC_WIPE_INT).
+        self.state.ext_regs.write('STATUS', Status.BUSY_SEC_WIPE_INT, True)
+
         # If we get an RMA request before we've managed to run any rounds of
         # wiping then we are waiting for our first URND seed. The entropy
         # complex might not be up, so we don't want to wait for a seed. Handle
@@ -378,7 +404,7 @@ def _step_pre_wipe(self, verbose: bool) -> StepRes:
             self.state.ext_regs.write('WIPE_START', 0, True)
 
         # Zero INSN_CNT once if we're going to lock after wipe.
-        self._delayed_insn_cnt_zero()
+        self._delayed_insn_cnt_zero(0)
 
         if self.state.wsrs.URND.running:
             # Reflect wiping in STATUS register if it has not been updated yet.
@@ -418,7 +444,7 @@ def _step_wiping(self, verbose: bool) -> StepRes:
             self.state.lock_after_wipe = True
 
         # Zero INSN_CNT once if we're going to lock after wipe.
-        self._delayed_insn_cnt_zero()
+        self._delayed_insn_cnt_zero(1)
 
         if self.state.wipe_cycles == 1:
             # This is the penultimate clock cycle of a wipe round. We want to
diff --git a/hw/ip/otbn/dv/otbnsim/sim/standalonesim.py b/hw/ip/otbn/dv/otbnsim/sim/standalonesim.py
index bb3babcc0c827..20665caafd0d6 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/standalonesim.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/standalonesim.py
@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 from itertools import cycle
-from typing import Optional, TextIO
+from typing import Dict, Optional, TextIO
 from .sim import OTBNSim
 from .state import FsmState
 
@@ -59,6 +59,25 @@ def run(self, verbose: bool, dump_file: Optional[TextIO]) -> int:
 
         return insn_count
 
+    def load_dmem_vars(self, dmem_vars: Dict[str, bytes]) -> None:
+        for label, value in dmem_vars.items():
+            offset = self.symbols.get(label)
+            if offset is None:
+                raise KeyError(f'Symbol {label} does not exist in the elf')
+            assert offset % 4 == 0, "Only word-aligned variables are supported."
+            self.state.dmem.load_le_words(value, has_validity=False, word_offset=offset // 4)
+
+    def load_regs_vars(self, regs: Dict[str, int]) -> None:
+        for label, value in regs.items():
+            if label.startswith('x'):
+                gpr_idx = int(label[1:])
+                self.state.gprs.get_reg(gpr_idx).write_unsigned(value)
+            elif label.startswith('w'):
+                wdr_idx = int(label[1:])
+                self.state.wdrs.get_reg(wdr_idx).write_unsigned(value)
+            else:
+                self.state.ext_regs.write(label, value, from_hw=False)
+
     def dump_regs(self, tgt: TextIO) -> None:
         for reg in ['ERR_BITS', 'INSN_CNT', 'STOP_PC']:
             value = self.state.ext_regs.read(reg, False)
diff --git a/hw/ip/otbn/dv/otbnsim/sim/state.py b/hw/ip/otbn/dv/otbnsim/sim/state.py
index fcc93f74db523..f198e31e53c9a 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/state.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/state.py
@@ -85,7 +85,7 @@ def __init__(self) -> None:
         self.csrs = CSRFile()
 
         self.pc = 0
-        self._pc_next_override = None  # type: Optional[int]
+        self._pc_next_override: Optional[int] = None
 
         self.imem_size = get_memory_layout().imem_size_bytes
 
@@ -119,7 +119,7 @@ def __init__(self) -> None:
         # model except for matching its timing) has a copy of the next
         # instruction. Make this a counter, decremented once per cycle. When we
         # get to zero, we set the flag.
-        self._time_to_imem_invalidation = None  # type: Optional[int]
+        self._time_to_imem_invalidation: Optional[int] = None
         self.invalidated_imem = False
 
         # This is the number of cycles left for wiping. When we're in the
@@ -138,7 +138,12 @@ def __init__(self) -> None:
         # cancelled).
         self.injected_err_bits = 0
         self.lock_immediately = False
-        self.zero_insn_cnt_next = False
+
+        # OTBN might zero its insn_cnt register during a secure wipe. The
+        # precise cycle that this happens depends slightly on how we decide to
+        # do so. If this is not None, it is a counter of the number of cycles
+        # before the zeroing should happen.
+        self.time_to_insn_cnt_zero: Optional[int] = None
 
         # If this is set, all software errors should result in the model status
         # being locked.
@@ -257,7 +262,7 @@ def in_loop(self) -> bool:
         return bool(self.loop_stack.stack)
 
     def changes(self) -> List[Trace]:
-        c = []  # type: List[Trace]
+        c: List[Trace] = []
         c += self.gprs.changes()
         if self._pc_next_override is not None:
             # Only append the next program counter to the trace if it has
diff --git a/hw/ip/otbn/dv/otbnsim/sim/stats.py b/hw/ip/otbn/dv/otbnsim/sim/stats.py
index da9ec5fa2ec9d..491490fdd7341 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/stats.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/stats.py
@@ -2,9 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-from collections import Counter
-import typing
-from typing import Dict, List, Optional, Tuple
+from collections import Counter, defaultdict, namedtuple
+from typing import Dict, Iterator, List, Optional
 
 from elftools.dwarf.dwarfinfo import DWARFInfo  # type: ignore
 from elftools.elf.elffile import ELFFile  # type: ignore
@@ -22,13 +21,16 @@ def __init__(self, program: List[OTBNInsn]) -> None:
         self.program = program
 
         self.stall_count = 0
-        self.insn_histo = Counter()  # type: typing.Counter[str]
-        self.func_calls = []  # type: List[Dict[str, int]]
-        self.loops = []  # type: List[Dict[str, int]]
+        self.insn_histo: Counter[str] = Counter()
+        self.func_calls: List[Dict[str, int]] = []
+        self.loops: List[Dict[str, int]] = []
 
         # Histogram indexed by the length of the (extended) basic block.
-        self.basic_block_histo = Counter()  # type: typing.Counter[int]
-        self.ext_basic_block_histo = Counter()  # type: typing.Counter[int]
+        self.basic_block_histo: Counter[int] = Counter()
+        self.ext_basic_block_histo: Counter[int] = Counter()
+
+        # Coverage map indexed by pc.
+        self.coverage: Counter[int] = Counter()
 
         self._current_basic_block_len = 0
         self._current_ext_basic_block_len = 0
@@ -58,6 +60,7 @@ def record_insn(self,
 
         '''
         pc = state_bc.pc
+        self.coverage[pc] += 1
 
         is_jump = isinstance(insn, JAL) or isinstance(insn, JALR)
         is_branch = isinstance(insn, BEQ) or isinstance(insn, BNE)
@@ -128,31 +131,44 @@ def record_insn(self,
             self._current_ext_basic_block_len = 0
 
 
-def _dwarf_decode_file_line(dwarf_info: DWARFInfo,
-                            address: int) -> Optional[Tuple[str, int]]:
-    # Go over all the line programs in the DWARF information, looking for
-    # one that describes the given address.
+SourceLine = namedtuple('SourceLine', ['addr', 'path', 'lineno'])
+
+
+def _dwarf_iter_file_line(dwarf_info: DWARFInfo,
+                          full_path: bool = False) -> Iterator[Optional[SourceLine]]:
+    # Go over all the line programs in the DWARF information.
     for CU in dwarf_info.iter_CUs():
         # First, look at line programs to find the file/line for the address
         lineprog = dwarf_info.line_program_for_CU(CU)
-        prevstate = None
         for entry in lineprog.get_entries():
             # We're interested in those entries where a new state is assigned
             if entry.state is None:
                 continue
-            if entry.state.end_sequence:
-                # if the line number sequence ends, clear prevstate.
-                prevstate = None
+            state = entry.state
+
+            if state.end_sequence:
+                yield None
                 continue
-            # Looking for a range of addresses in two consecutive states that
-            # contain the required address.
-            if ((prevstate and
-                 prevstate.address <= address < entry.state.address)):
-                raw_name = lineprog['file_entry'][prevstate.file - 1].name
-                filename = raw_name.decode('utf-8')
-                line = prevstate.line
-                return filename, line
-            prevstate = entry.state
+
+            file_ent = lineprog['file_entry'][state.file - 1]
+            raw_path = file_ent.name
+            dir_index = file_ent.dir_index
+            if full_path and len(lineprog['include_directory']) > 0 and dir_index > 0:
+                dir = lineprog['include_directory'][dir_index - 1]
+                raw_path = dir + b'/' + raw_path
+            path = raw_path.decode('utf-8')
+            yield SourceLine(state.address, path, state.line)
+
+
+def _dwarf_decode_file_line(dwarf_info: DWARFInfo, address: int) -> Optional[SourceLine]:
+    # Go over all the line programs in the DWARF information, looking for
+    # one that describes the given address.
+    lines = list(_dwarf_iter_file_line(dwarf_info, full_path=False))
+    for before, after in zip(lines, lines[1:]):
+        if before is None or after is None:
+            continue
+        if before.addr <= address < after.addr:
+            return before
     return None
 
 
@@ -197,7 +213,7 @@ def _describe_imem_addr(self, address: int) -> str:
         if symbol_name:
             add_info.append(f"{symbol_name}")
         if file_line:
-            add_info.append(f"at {file_line[0]}:{file_line[1]}")
+            add_info.append(f"at {file_line.path}:{file_line.lineno}")
 
         str = f"{address:#x}"
         if add_info:
@@ -275,9 +291,9 @@ def _dump_function_call_stats(self) -> str:
         # The call graphs are on function granularity; the call sites
         # dictionary is indexed by the called function, but uses the call site
         # as value.
-        callgraph = {}  # type: Dict[int, typing.Counter[int]]
-        rev_callgraph = {}  # type: Dict[int, typing.Counter[int]]
-        rev_callsites = {}  # type: Dict[int, typing.Counter[int]]
+        callgraph: Dict[int, Counter[int]] = {}  # type
+        rev_callgraph: Dict[int, Counter[int]] = {}
+        rev_callsites: Dict[int, Counter[int]] = {}
         for c in self._stats.func_calls:
             if c['caller_func'] not in callgraph:
                 callgraph[c['caller_func']] = Counter()
@@ -373,3 +389,24 @@ def _dump_loop_stats(self) -> str:
             out += f"avg: {loop_iterations_avg:.02f}\n"
 
         return out
+
+    def dump_lcov_coverage(self) -> str:
+        if not self._elf_file.has_dwarf_info():
+            return ''
+        dwarf_info = self._elf_file.get_dwarf_info()
+
+        hits_by_path: defaultdict[str, Dict[int, int]] = defaultdict(dict)
+        for info in _dwarf_iter_file_line(dwarf_info, full_path=True):
+            if info is None:
+                continue
+            hit = self._stats.coverage.get(info.addr, 0)
+            hits_by_path[info.path][info.lineno] = hit
+
+        out = []
+        for path, hits in hits_by_path.items():
+            out.append(f'SF:{path}')
+            for line, hit in hits.items():
+                out.append(f'DA:{line},{hit}')
+            out.append('end_of_record')
+
+        return '\n'.join(out) + '\n'
diff --git a/hw/ip/otbn/dv/otbnsim/sim/wsr.py b/hw/ip/otbn/dv/otbnsim/sim/wsr.py
index 6b9b3bc2a3875..ea96d3a3f0e28 100644
--- a/hw/ip/otbn/dv/otbnsim/sim/wsr.py
+++ b/hw/ip/otbn/dv/otbnsim/sim/wsr.py
@@ -78,7 +78,7 @@ class DumbWSR(WSR):
     def __init__(self, name: str):
         super().__init__(name)
         self._value = 0
-        self._next_value = None  # type: Optional[int]
+        self._next_value: Optional[int] = None
 
     def on_start(self) -> None:
         self._value = 0
@@ -124,8 +124,8 @@ class RandWSR(WSR):
     def __init__(self, name: str, ext_regs: OTBNExtRegs):
         super().__init__(name)
 
-        self._random_value = None  # type: Optional[int]
-        self._next_random_value = None  # type: Optional[int]
+        self._random_value: Optional[int] = None
+        self._next_random_value: Optional[int] = None
         self._ext_regs = ext_regs
 
         # The pending_request flag says that we've started an instruction that
@@ -289,8 +289,8 @@ class SideloadKey:
     '''Represents a sideloaded key, with 384 bits of data and a valid signal'''
     def __init__(self, name: str):
         self.name = name
-        self._value = None  # type: Optional[int]
-        self._new_value = None  # type: Optional[Tuple[bool, int]]
+        self._value: Optional[int] = None
+        self._new_value: Optional[Tuple[bool, int]] = None
 
     def has_value(self) -> bool:
         return self._value is not None
@@ -424,7 +424,7 @@ def abort(self) -> None:
         self.KeyS1.commit()
 
     def changes(self) -> List[Trace]:
-        ret = []  # type: List[Trace]
+        ret: List[Trace] = []
         ret += self.MOD.changes()
         ret += self.RND.changes()
         ret += self.ACC.changes()
diff --git a/hw/ip/otbn/dv/otbnsim/standalone.py b/hw/ip/otbn/dv/otbnsim/standalone.py
index 44db995fe6461..1da3311d911c7 100755
--- a/hw/ip/otbn/dv/otbnsim/standalone.py
+++ b/hw/ip/otbn/dv/otbnsim/standalone.py
@@ -4,17 +4,25 @@
 # SPDX-License-Identifier: Apache-2.0
 
 import argparse
+import os
 import sys
 
 from sim.load_elf import load_elf
 from sim.standalonesim import StandaloneSim
 from sim.stats import ExecutionStatAnalyzer
+from shared.testcase import OtbnTestCase
 
 
 def main() -> int:
     parser = argparse.ArgumentParser()
     parser.add_argument('elf')
     parser.add_argument('-v', '--verbose', action='store_true')
+    parser.add_argument(
+        '--testcase',
+        type=argparse.FileType('r'),
+        metavar="FILE",
+        help="Path to a testcase hjson file.",
+    )
     parser.add_argument(
         '--dump-dmem',
         metavar="FILE",
@@ -41,15 +49,33 @@ def main() -> int:
 
     collect_stats = args.dump_stats is not None
 
+    # Check if Bazel is requesting coverage output
+    coverage_dat = os.environ.get('COVERAGE_OUTPUT_FILE', None)
+    if coverage_dat:
+        collect_stats = True
+
     sim = StandaloneSim()
     exp_end_addr = load_elf(sim, args.elf)
+
+    testcase = None
+    if args.testcase:
+        testcase = OtbnTestCase.from_hjson(args.testcase.read(), sim.symbols)
+
     key0 = int((str("deadbeef") * 12), 16)
     key1 = int((str("baadf00d") * 12), 16)
     sim.state.wsrs.set_sideload_keys(key0, key1)
 
+    if testcase:
+        sim.load_dmem_vars(testcase.input.dmem)
+        sim.load_regs_vars(testcase.input.regs)
+
     sim.state.ext_regs.commit()
 
     sim.start(collect_stats)
+
+    if testcase and testcase.entrypoint:
+        sim.state.pc = testcase.entrypoint
+
     sim.run(verbose=args.verbose, dump_file=args.dump_regs)
 
     if exp_end_addr is not None:
@@ -65,7 +91,12 @@ def main() -> int:
     if collect_stats:
         assert sim.stats is not None
         stat_analyzer = ExecutionStatAnalyzer(sim.stats, args.elf)
-        args.dump_stats.write(stat_analyzer.dump())
+        if args.dump_stats:
+            args.dump_stats.write(stat_analyzer.dump())
+        if coverage_dat:
+            with open(coverage_dat, 'w') as f:
+                f.write(stat_analyzer.dump_lcov_coverage())
+            print(f'Coverage dumped to {coverage_dat}')
 
     return 0
 
diff --git a/hw/ip/otbn/dv/rig/rig/config.py b/hw/ip/otbn/dv/rig/rig/config.py
index e81399d3a66d9..41966f4d57d5f 100644
--- a/hw/ip/otbn/dv/rig/rig/config.py
+++ b/hw/ip/otbn/dv/rig/rig/config.py
@@ -17,7 +17,7 @@ def __init__(self, what: str, yml: object):
                              'but was actually a {}.'
                              .format(what, type(yml).__name__))
 
-        self.values = {}  # type: Dict[str, float]
+        self.values: Dict[str, float] = {}
         for key, value in yml.items():
             if not isinstance(key, str):
                 raise ValueError('{} had key {!r}, which is not a string.'
@@ -58,8 +58,8 @@ def __init__(self, what: str, yml: object):
                              'but was actually a {}.'
                              .format(what, type(yml).__name__))
 
-        self.min_values = {}  # type: Dict[str, int]
-        self.max_values = {}  # type: Dict[str, int]
+        self.min_values: Dict[str, int] = {}
+        self.max_values: Dict[str, int] = {}
 
         for key, value in yml.items():
             if not isinstance(key, str):
diff --git a/hw/ip/otbn/dv/rig/rig/gens/loop_dup_end.py b/hw/ip/otbn/dv/rig/rig/gens/loop_dup_end.py
index b89aa96ee5d74..d5adf8e0f80e4 100644
--- a/hw/ip/otbn/dv/rig/rig/gens/loop_dup_end.py
+++ b/hw/ip/otbn/dv/rig/rig/gens/loop_dup_end.py
@@ -19,7 +19,7 @@ class LoopDupEndInner(Loop):
     '''The generator used by LoopDupEnd to make the inner loop'''
     def __init__(self, cfg: Config, insns_file: InsnsFile) -> None:
         super().__init__(cfg, insns_file)
-        self.loop_end_stack = []  # type: List[int]
+        self.loop_end_stack: List[int] = []
 
     def gen_with_end(self,
                      loop_end: int,
diff --git a/hw/ip/otbn/dv/rig/rig/snippet_gens.py b/hw/ip/otbn/dv/rig/rig/snippet_gens.py
index 49ae3652b2568..de37484fa409c 100644
--- a/hw/ip/otbn/dv/rig/rig/snippet_gens.py
+++ b/hw/ip/otbn/dv/rig/rig/snippet_gens.py
@@ -66,8 +66,8 @@ class SnippetGens:
     ]
 
     def __init__(self, cfg: Config, insns_file: InsnsFile) -> None:
-        self._cont_generators = []  # type: List[Tuple[SnippetGen, float]]
-        self._end_generators = []   # type: List[Tuple[SnippetGen, float]]
+        self._cont_generators: List[Tuple[SnippetGen, float]] = []
+        self._end_generators: List[Tuple[SnippetGen, float]] = []
 
         # Grab an ECall generator. We'll use it in self.gens to append an ECALL
         # instruction if necessary.
@@ -193,7 +193,7 @@ def _gens(self,
         model.pc at the place where the next instruction should be inserted).
 
         '''
-        children = []  # type: List[Snippet]
+        children: List[Snippet] = []
         while True:
             gen_ecall = False
             # If we've run out of space and end is False, we stop immediately.
diff --git a/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_ctrl_redun_vseq.sv b/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_ctrl_redun_vseq.sv
index d46e92059c540..d184d5e89cbed 100644
--- a/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_ctrl_redun_vseq.sv
+++ b/hw/ip/otbn/dv/uvm/env/seq_lib/otbn_ctrl_redun_vseq.sv
@@ -103,7 +103,7 @@ class otbn_ctrl_redun_vseq extends otbn_single_vseq;
       2: begin
         logic [3:0] good_op, bad_op;
         logic       selected_flags_C;
-        bit         avoid_addc = 1'b0, avoid_subb = 1'b0;
+        bit         avoid_addc = 1'b0;
 
         string alu_path = "tb.dut.u_otbn_core.u_otbn_alu_bignum";
         string op_path = {alu_path, ".operation_i.op"};
@@ -125,27 +125,40 @@ class otbn_ctrl_redun_vseq extends otbn_single_vseq;
           // around again.
         end
 
-        // We know that we won't spot conversions between add/addc and sub/subb if the selected
-        // flags register happens to be zero (because the change in opcode won't actually have any
-        // effect). Constrain the randomisation to avoid doing one of those conversions if we're in
-        // that situation.
+        // We also know that the pre-decode check won't spot conversions between add/addc and
+        // sub/subb if the selected flags register happens to be zero (because the change in opcode
+        // won't actually have any effect). We want to constrain the randomisation to avoid doing
+        // one of those conversions if we're in that situation.
+        //
+        //  - Do this by adding an avoid_addc flag that avoids a conversion between add/addc when
+        //    the carry flag is zero. (This also applies to subtractions: see the point below)
+        //
+        // It also isn't strict enough to spot conversions between addX and subX for any X. We can
+        // avoid requiring that it should by adding two constraints:
+        //
+        //  - Constraining the difference between good_op and bad_op not to be 3. Because there are
+        //    three add instructions this guarantees we won't convert between addX and subX for any
+        //    X.
+        //
+        //  - Extend the avoid_addc flag (which would normally avoid trying to distinguish between
+        //    add/addc, sub/subb when the carry flag was zero) so that they apply to both either
+        //    additions or subtractions. This will avoid e.g. converting between add and subb.
         `DV_CHECK_FATAL(uvm_hdl_read(carry_path, selected_flags_C))
         if (!selected_flags_C) begin
-          if (good_op inside {otbn_pkg::AluOpBignumAdd, otbn_pkg::AluOpBignumAddc}) begin
+          if (good_op inside {otbn_pkg::AluOpBignumAdd, otbn_pkg::AluOpBignumAddc,
+                              otbn_pkg::AluOpBignumSub, otbn_pkg::AluOpBignumSubb}) begin
             avoid_addc = 1'b1;
           end
-          if (good_op inside {otbn_pkg::AluOpBignumSub, otbn_pkg::AluOpBignumSubb}) begin
-            avoid_subb = 1'b1;
-          end
         end
 
         `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(bad_op,
                                            bad_op != good_op;
                                            bad_op != otbn_pkg::AluOpBignumNone;
                                            avoid_addc -> (bad_op != otbn_pkg::AluOpBignumAdd &&
-                                                          bad_op != otbn_pkg::AluOpBignumAddc);
-                                           avoid_subb -> (bad_op != otbn_pkg::AluOpBignumSub &&
-                                                          bad_op != otbn_pkg::AluOpBignumSubb);)
+                                                          bad_op != otbn_pkg::AluOpBignumAddc &&
+                                                          bad_op != otbn_pkg::AluOpBignumSub &&
+                                                          bad_op != otbn_pkg::AluOpBignumSubb);
+                                           bad_op != good_op + 3; good_op != bad_op + 3;)
 
         `uvm_info(`gfn,
                   $sformatf("Forcing %0s from %0d to %0d", err_path, good_op, bad_op),
diff --git a/hw/ip/otbn/dv/uvm/get-toolchain-paths.sh b/hw/ip/otbn/dv/uvm/get-toolchain-paths.sh
index 647d2879fbe15..dca8a497d4b55 100755
--- a/hw/ip/otbn/dv/uvm/get-toolchain-paths.sh
+++ b/hw/ip/otbn/dv/uvm/get-toolchain-paths.sh
@@ -13,18 +13,18 @@ if [[ -n ${BAZEL_CACHE} ]]; then
   ${BAZEL_CMD} fetch \
     --distdir="${BAZEL_DISTDIR}" \
     --repository_cache="${BAZEL_CACHE}" \
-    @lowrisc_rv32imcb_files//...
+    @lowrisc_rv32imcb_toolchain//...
 else
   BAZEL_CMD="./bazelisk.sh"
-  ${BAZEL_CMD} fetch @lowrisc_rv32imcb_files//...
+  ${BAZEL_CMD} fetch @lowrisc_rv32imcb_toolchain//...
 fi
 
 # Set environment variables for the RV32 linker and assembler.
 RV32_TOOL_LD=$(${BAZEL_CMD} query \
-  'deps(@lowrisc_rv32imcb_files//:bin/riscv32-unknown-elf-ld)' \
+  'deps(@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ld)' \
   --output location | cut -f1 -d:)
 RV32_TOOL_AS=$(${BAZEL_CMD} query \
-  'deps(@lowrisc_rv32imcb_files//:bin/riscv32-unknown-elf-as)' \
+  'deps(@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-as)' \
   --output location | cut -f1 -d:)
 export RV32_TOOL_LD
 export RV32_TOOL_AS
diff --git a/hw/ip/otbn/dv/verilator/otbn_top_sim.core b/hw/ip/otbn/dv/verilator/otbn_top_sim.core
index 2b02aabc7c0a5..be330e043e0a0 100644
--- a/hw/ip/otbn/dv/verilator/otbn_top_sim.core
+++ b/hw/ip/otbn/dv/verilator/otbn_top_sim.core
@@ -64,7 +64,7 @@ targets:
           - '--trace-structs'
           - '--trace-params'
           - '--trace-max-array 1024'
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=otbn_top_sim"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=otbn_top_sim"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # RAM primitives wider than 64bit (required for ECC) fail to build in
diff --git a/hw/ip/otbn/util/BUILD b/hw/ip/otbn/util/BUILD
index 6a60e9018a9bf..b3bd91cc71747 100644
--- a/hw/ip/otbn/util/BUILD
+++ b/hw/ip/otbn/util/BUILD
@@ -64,6 +64,8 @@ py_binary(
     srcs = ["otbn_sim_test.py"],
     deps = [
         "//hw/ip/otbn/util/shared:check",
+        "//hw/ip/otbn/util/shared:mem_layout",
         "//hw/ip/otbn/util/shared:reg_dump",
+        requirement("pyelftools"),
     ],
 )
diff --git a/hw/ip/otbn/util/check_const_time.py b/hw/ip/otbn/util/check_const_time.py
index 168ea7b215f46..88db042d499e9 100755
--- a/hw/ip/otbn/util/check_const_time.py
+++ b/hw/ip/otbn/util/check_const_time.py
@@ -26,6 +26,13 @@ def main() -> int:
         required=False,
         help=('The specific subroutine to check. If not provided, the start '
               'point is _imem_start (whole program).'))
+    parser.add_argument(
+        '--ignore',
+        nargs='+',
+        type=str,
+        required=False,
+        help=('The specific subroutines to ignore. Use this argument '
+              'if violations should be ignored for a subroutine.'))
     parser.add_argument(
         '--constants',
         nargs='+',
@@ -68,6 +75,14 @@ def main() -> int:
         _, _, control_deps = get_subroutine_iflow(program, graph,
                                                   args.subroutine, constants)
 
+    control_deps_ignore = {}
+    if args.ignore is not None:
+        for subroutine in args.ignore:
+            graph = subroutine_control_graph(program, subroutine)
+            _, _, control_deps_ignore_temp = get_subroutine_iflow(program, graph,
+                                                                  subroutine, {})
+            control_deps_ignore.update(control_deps_ignore_temp)
+
     if args.secrets is None:
         if args.verbose:
             print(
@@ -85,12 +100,15 @@ def main() -> int:
             for node, pcs in control_deps.items() if node in args.secrets
         }
 
+    secret_control_deps_filt = {k: v for k, v in secret_control_deps.items()
+                                if v not in control_deps_ignore.values()}
+
     out = CheckResult()
 
-    if len(secret_control_deps) != 0:
+    if len(secret_control_deps_filt) != 0:
         msg = 'The following secrets may influence control flow:\n  '
         msg += '\n  '.join(stringify_control_deps(program,
-                                                  secret_control_deps))
+                                                  secret_control_deps_filt))
         out.err(msg)
 
     if args.verbose or out.has_errors() or out.has_warnings():
diff --git a/hw/ip/otbn/util/docs/get_impl.py b/hw/ip/otbn/util/docs/get_impl.py
index f805cb39bc674..f51d7c3595917 100644
--- a/hw/ip/otbn/util/docs/get_impl.py
+++ b/hw/ip/otbn/util/docs/get_impl.py
@@ -57,9 +57,9 @@ def make(lhs: cst.BaseAssignTargetExpression,
 class ImplTransformer(cst.CSTTransformer):
     '''An AST visitor used to extract documentation from the ISS'''
     def __init__(self) -> None:
-        self.impls = {}  # type: Dict[str, Sequence[cst.BaseStatement]]
+        self.impls: Dict[str, Sequence[cst.BaseStatement]] = {}
 
-        self.cur_class = None  # type: Optional[str]
+        self.cur_class: Optional[str] = None
 
     def visit_ClassDef(self, node: cst.ClassDef) -> Optional[bool]:
         assert self.cur_class is None
diff --git a/hw/ip/otbn/util/otbn_as.py b/hw/ip/otbn/util/otbn_as.py
index e414161323604..19d9b50c1818b 100755
--- a/hw/ip/otbn/util/otbn_as.py
+++ b/hw/ip/otbn/util/otbn_as.py
@@ -614,11 +614,12 @@ class Transformer:
 
     '''
 
-    def __init__(self, out_handle: TextIO, in_path: str, insns_file: InsnsFile,
-                 glued_insns_dec_len: List[Insn],
+    def __init__(self, out_handle: TextIO, in_path: str, in_idx: int,
+                 insns_file: InsnsFile, glued_insns_dec_len: List[Insn],
                  mnem_to_rve: Dict[str, RVEncoding]) -> None:
         self.out_handle = out_handle
         self.in_path = in_path
+        self.in_idx = in_idx
         self.insns_file = insns_file
         self.glued_insns_dec_len = glued_insns_dec_len
         self.mnem_to_rve = mnem_to_rve
@@ -642,7 +643,10 @@ def __init__(self, out_handle: TextIO, in_path: str, insns_file: InsnsFile,
 
         # Write .file and .line directives to tell the assembler where the code
         # came from.
-        out_handle.write('.file "{}"\n.line 1\n'.format(in_path))
+        out_handle.write(f'.file {in_idx + 1} "{in_path}"\n')
+        out_handle.write(f'.loc {in_idx + 1} 0\n')
+        out_handle.write(f'.file "{in_path}"\n')
+        out_handle.write('.line 1\n')
 
     def mk_raw_line(self, insn: Insn, op_to_expr: Dict[str,
                                                        Optional[str]]) -> str:
@@ -791,8 +795,9 @@ def gen_line(self, insn: Insn, op_to_expr: Dict[str,
             self.out_handle.write(
                 '# pseudo-expansion for: {}\n'.format(reconstructed))
             for entry in expansion:
-                self.out_handle.write('.line {}\n{}\n'.format(
-                    self.line_number - 1, entry))
+                self.out_handle.write(f'.line {self.line_number - 1}\n')
+                self.out_handle.write(f'.loc {self.in_idx + 1} {self.line_number}\n')
+                self.out_handle.write(f'{entry}\n')
             return
 
         # If this instruction comes from the rv32i instruction set, we can just
@@ -801,8 +806,9 @@ def gen_line(self, insn: Insn, op_to_expr: Dict[str,
         # part of the rv32i instruction set, but we want to do some work to
         # resolve CSR names.
         if insn.rv32i and not insn.uses_isr:
-            self.out_handle.write('.line {}\n{}\n'.format(
-                self.line_number - 1, reconstructed))
+            self.out_handle.write(f'.line {self.line_number - 1}\n')
+            self.out_handle.write(f'.loc {self.in_idx + 1} {self.line_number}\n')
+            self.out_handle.write(f'{reconstructed}\n')
             return
 
         # If we don't know an encoding for this instruction, we're not going to
@@ -834,8 +840,10 @@ def gen_line(self, insn: Insn, op_to_expr: Dict[str,
         else:
             line = self.mk_raw_line(insn, op_to_expr)
 
-        self.out_handle.write('# {}\n.line {}\n{}\n'.format(
-            reconstructed, self.line_number - 1, line))
+        self.out_handle.write(f'# {reconstructed}\n')
+        self.out_handle.write(f'.line {self.line_number - 1}\n')
+        self.out_handle.write(f'.loc {self.in_idx + 1} {self.line_number}\n')
+        self.out_handle.write(f'{line}\n')
 
     def _continue_block_comment(self, line: str, pos: int) -> int:
         '''Continue whitespace matching in a block comment
@@ -1120,10 +1128,11 @@ def at_eof(self) -> None:
 
 
 def transform_input(out_handle: TextIO, in_path: str, in_handle: TextIO,
-                    insns_file: InsnsFile, glued_insns_dec_len: List[Insn],
+                    in_idx: int, insns_file: InsnsFile,
+                    glued_insns_dec_len: List[Insn],
                     mnem_to_rve: Dict[str, RVEncoding]) -> None:
     '''Transform an input file to make it suitable for riscv as'''
-    transformer = Transformer(out_handle, in_path, insns_file,
+    transformer = Transformer(out_handle, in_path, in_idx, insns_file,
                               glued_insns_dec_len, mnem_to_rve)
     for line in in_handle:
         transformer.take_line(line)
@@ -1151,7 +1160,7 @@ def transform_inputs(out_dir: str, inputs: List[str], insns_file: InsnsFile,
             if not just_translate:
                 out_handle = open(out_path, 'w')
 
-            transform_input(out_handle, pretty_in_path, in_handle, insns_file,
+            transform_input(out_handle, pretty_in_path, in_handle, idx, insns_file,
                             glued_insns_dec_len, mnem_to_rve)
 
         finally:
@@ -1180,6 +1189,8 @@ def run_binutils_as(other_args: List[str], inputs: List[str]) -> int:
         '-mno-arch-attr',
         # OTBN is based on RV32I without any hard float support.
         '-mabi=ilp32',
+        # Produce debug info for source line mapping.
+        '-g',
     ]
 
     cmd = [as_name] + default_args + other_args + inputs
diff --git a/hw/ip/otbn/util/otbn_sim_test.py b/hw/ip/otbn/util/otbn_sim_test.py
index ca57576a21614..42d6f9cee1c74 100755
--- a/hw/ip/otbn/util/otbn_sim_test.py
+++ b/hw/ip/otbn/util/otbn_sim_test.py
@@ -10,9 +10,13 @@
 import sys
 from enum import IntEnum
 from typing import List
+import tempfile
 
 from shared.check import CheckResult
+from shared.elf import read_elf
 from shared.reg_dump import parse_reg_dump
+from shared.dmem_dump import parse_dmem_exp, parse_actual_dmem
+from shared.testcase import OtbnTestCase
 
 # Names of special registers
 ERR_BITS = 'ERR_BITS'
@@ -54,7 +58,7 @@ def main() -> int:
     parser = argparse.ArgumentParser()
     parser.add_argument('simulator',
                         help='Path to the standalone OTBN simulator.')
-    parser.add_argument('expected',
+    parser.add_argument('--expected_regs',
                         metavar='FILE',
                         type=argparse.FileType('r'),
                         help=(f'File containing expected register values. '
@@ -63,23 +67,79 @@ def main() -> int:
                               f'{ERR_BITS} is not listed, the test will assume '
                               f'there are no errors expected (i.e. {ERR_BITS}'
                               f'= 0).'))
+    parser.add_argument('--expected_dmem',
+                        metavar='FILE',
+                        type=argparse.FileType('r'),
+                        help=('File containing expected dmem values. '
+                              'Addresses that are not listed are allowed to '
+                              'have any value.'))
+    parser.add_argument('--testcase',
+                        metavar='FILE',
+                        type=argparse.FileType('r'),
+                        help='Path to a testcase hjson file.')
     parser.add_argument('elf',
                         help='Path to the .elf file for the OTBN program.')
     parser.add_argument('-v', '--verbose', action='store_true')
     args = parser.parse_args()
 
+    if args.testcase and (args.expected_dmem or args.expected_regs):
+        parser.error("Cannot specify --testcase together with --expected_dmem or --expected_regs.")
+
+    _, _, symbols = read_elf(args.elf)
+
     # Parse expected values.
     result = CheckResult()
-    expected_regs = parse_reg_dump(args.expected.read())
 
-    # Run the simulation and produce a register dump.
-    cmd = [args.simulator, '--dump-regs', '-', args.elf]
-    sim_proc = subprocess.run(cmd, check=True,
-                              stdout=subprocess.PIPE, universal_newlines=True)
-    actual_regs = parse_reg_dump(sim_proc.stdout)
+    cmd_flags = []
+
+    testcase = None
+    if args.testcase:
+        testcase = OtbnTestCase.from_hjson(args.testcase.read(), symbols)
+        cmd_flags.extend([
+            "--testcase",
+            args.testcase.name,
+        ])
+
+    with tempfile.NamedTemporaryFile() as regs_file, tempfile.NamedTemporaryFile() as dmem_file:
+        cmd = [
+            args.simulator,
+            *cmd_flags,
+            "--dump-regs",
+            regs_file.name,
+            "--dump-dmem",
+            dmem_file.name,
+            "--",
+            args.elf,
+        ]
+        # Run the simulation and produce a register and dmem dump.
+        subprocess.run(
+            cmd, check=True, universal_newlines=True
+        )
+
+        dmem_file.seek(0)
+        actual_dmem = parse_actual_dmem(dmem_file.read())
+        actual_regs = parse_reg_dump(regs_file.read().decode('utf-8'))
+
+    expected_err = 0
+    expected_regs = {}
+    if args.expected_regs is not None:
+        expected_regs = parse_reg_dump(args.expected_regs.read())
+
+    expected_dmem = {}
+    if args.expected_dmem is not None:
+        expected_dmem = parse_dmem_exp(args.expected_dmem.read())
+
+    if testcase:
+        expected_dmem = testcase.output.dmem
+        expected_regs = testcase.output.regs
 
-    # Special handling for the ERR_BITS register.
     expected_err = expected_regs.get(ERR_BITS, 0)
+
+    if testcase and testcase.entrypoint and not expected_err:
+        # expect call stack error since we overwrite the entrypoint.
+        expected_err = 0x00000004
+
+    # Special handling for the ERR_BITS register.
     actual_err = actual_regs[ERR_BITS]
     insn_cnt = actual_regs[INSN_CNT]
     stop_pc = actual_regs[STOP_PC]
@@ -88,24 +148,40 @@ def main() -> int:
         # case, give a special error message and exit rather than print all the
         # mismatched registers.
         if actual_err != 0:
-            err_names = ', '.join(get_err_names(actual_err))
-            result.err(f'OTBN encountered an unexpected error: {err_names}.\n'
-                       f'  {ERR_BITS}\t= {actual_err:#010x}\n'
-                       f'  {INSN_CNT}\t= {insn_cnt:#010x}\n'
-                       f'  {STOP_PC}\t= {stop_pc:#010x}')
+            err_names = ", ".join(get_err_names(actual_err))
+            result.err(f"OTBN encountered an unexpected error: {err_names}.\n"
+                       f"  {ERR_BITS}\t= {actual_err:#010x}\n"
+                       f"  {INSN_CNT}\t= {insn_cnt:#010x}\n"
+                       f"  {STOP_PC}\t= {stop_pc:#010x}")
+
     else:
         for reg, expected_value in expected_regs.items():
             actual_value = actual_regs.get(reg, None)
             if actual_value != expected_value:
-                if reg.startswith('w'):
-                    expected_str = f'{expected_value:#066x}'
-                    actual_str = f'{actual_value:#066x}'
+                if reg.startswith("w"):
+                    expected_str = f"{expected_value:#066x}"
+                    actual_str = f"{actual_value:#066x}"
                 else:
-                    expected_str = f'{expected_value:#010x}'
-                    actual_str = f'{actual_value:#010x}'
-                result.err(f'Mismatch for register {reg}:\n'
-                           f'  Expected: {expected_str}\n'
-                           f'  Actual:   {actual_str}')
+                    expected_str = f"{expected_value:#010x}"
+                    actual_str = f"{actual_value:#010x}"
+                result.err(f"Mismatch for register {reg}:\n"
+                           f"  Expected: {expected_str}\n"
+                           f"  Actual:   {actual_str}")
+
+        for label, value in expected_dmem.items():
+            try:
+                offset = symbols[label]
+                actual = actual_dmem[offset:offset + len(value)]
+                if actual != value:
+                    result.err(
+                        f"Mismatch for dmem {label}:\n"
+                        f"  Expected:     {value.hex()}\n"
+                        f"  Actual:       {actual.hex()}\n"
+                        f"  Expected(BE): {value[::-1].hex()}\n"
+                        f"  Actual(BE):   {actual[::-1].hex()}"
+                    )
+            except KeyError:
+                result.err(f'No label "{label}" found in elf-file.')
 
     if result.has_errors() or result.has_warnings() or args.verbose:
         print(result.report())
diff --git a/hw/ip/otbn/util/shared/dmem_dump.py b/hw/ip/otbn/util/shared/dmem_dump.py
new file mode 100644
index 0000000000000..a56fa839f8b05
--- /dev/null
+++ b/hw/ip/otbn/util/shared/dmem_dump.py
@@ -0,0 +1,58 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import re
+import struct
+from typing import Dict
+
+from hw.ip.otbn.util.shared.mem_layout import get_memory_layout
+
+_DMEM_RE = re.compile(
+    r'\s*(?P<label>[a-zA-Z0-9_]+)\s*:\s*(?P<val>(:?[0-9a-f]+))$')
+
+
+def parse_dmem_exp(dump: str) -> Dict[str, int]:
+    '''Parse the expected dmem.
+
+    Format:
+        label: hex_data
+
+    Returns a dictionary mapping labels to the expected bytes.
+    '''
+
+    out = {}
+    for line in dump.split('\n'):
+        # Remove comments and ignore blank lines.
+        line = line.split('#', 1)[0].strip()
+        if not line:
+            continue
+        m = _DMEM_RE.match(line)
+        if not m:
+            raise ValueError(f'Failed to parse dmem dump line ({line}).')
+        label = m.group('label')
+        value = bytes.fromhex(m.group('val'))
+        value = value[::-1]  # big-endian -> little-endian
+
+        if label in out:
+            raise ValueError(f'DMEM dump contains multiple values '
+                             f'for {label}.')
+        out[label] = value
+
+    return out
+
+
+def parse_actual_dmem(dump: bytes) -> bytes:
+    '''Parse the dmem dump.
+
+    Returns the dmem bytes except integrity info.
+    '''
+    dmem_bytes = []
+    # 8 32-bit data words + 1 byte integrity info per word = 40 bytes
+    bytes_w_integrity = 8 * 4 + 8
+    for w in struct.iter_unpack(f"<{bytes_w_integrity}s", dump):
+        # discard byte indicating integrity status
+        for v in struct.iter_unpack("<BI", w[0]):
+            dmem_bytes += v[1].to_bytes(4, "little")
+    assert len(dmem_bytes) == get_memory_layout().dmem_size_bytes
+    return bytes(dmem_bytes)
diff --git a/hw/ip/otbn/util/shared/insn_yaml.py b/hw/ip/otbn/util/shared/insn_yaml.py
index 1b9ea95143317..e8fbb048280e0 100644
--- a/hw/ip/otbn/util/shared/insn_yaml.py
+++ b/hw/ip/otbn/util/shared/insn_yaml.py
@@ -404,7 +404,7 @@ def load_file(path: str, isrs: Optional[IsrMaps]) -> InsnsFile:
 def make_isr_dict(path: str) -> IsrMap:
     '''Load a YAML file at path and return a map from name to Isr.'''
     try:
-        name_to_isr = {}  # type: Dict[str, Isr]
+        name_to_isr: Dict[str, Isr] = {}
         for isr in read_isrs(path):
             name = isr.name.lower()
             if name in name_to_isr:
@@ -417,7 +417,7 @@ def make_isr_dict(path: str) -> IsrMap:
                            .format(path, err)) from None
 
 
-_DEFAULT_INSNS_FILE = None  # type: Optional[InsnsFile]
+_DEFAULT_INSNS_FILE: Optional[InsnsFile] = None
 
 
 def load_insns_yaml() -> InsnsFile:
diff --git a/hw/ip/otbn/util/shared/mem_layout.py b/hw/ip/otbn/util/shared/mem_layout.py
index 12e87ef7a917f..0fe47b79f77af 100644
--- a/hw/ip/otbn/util/shared/mem_layout.py
+++ b/hw/ip/otbn/util/shared/mem_layout.py
@@ -67,7 +67,7 @@ def __init__(self, windows: Dict[str, _Window]):
         self.dmem_size_bytes = dmem_window[1] + _DmemScratchSizeBytes
 
 
-_LAYOUT = None  # type: Optional[OtbnMemoryLayout]
+_LAYOUT: Optional[OtbnMemoryLayout] = None
 
 
 def get_memory_layout() -> OtbnMemoryLayout:
diff --git a/hw/ip/otbn/util/shared/otbn_reggen.py b/hw/ip/otbn/util/shared/otbn_reggen.py
index 0d66c87eb9604..e66b9868dc11c 100644
--- a/hw/ip/otbn/util/shared/otbn_reggen.py
+++ b/hw/ip/otbn/util/shared/otbn_reggen.py
@@ -9,7 +9,7 @@
 
 from reggen import ip_block, reg_block
 
-_LR_RETVAL = None  # type: Optional[Tuple[int, object]]
+_LR_RETVAL: Optional[Tuple[int, object]] = None
 
 
 def load_registers() -> Tuple[int, object]:
diff --git a/hw/ip/otbn/util/shared/testcase.py b/hw/ip/otbn/util/shared/testcase.py
new file mode 100644
index 0000000000000..3122fcd381ed6
--- /dev/null
+++ b/hw/ip/otbn/util/shared/testcase.py
@@ -0,0 +1,150 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from dataclasses import dataclass
+import hjson  # type: ignore
+import re
+from typing import Dict
+
+
+def _get_symbol(symbols: Dict[str, int], label: str) -> int:
+    try:
+        return symbols[label]
+    except KeyError:
+        raise KeyError(f'Symbol {label} does not exist in the elf')
+
+
+def _is_numeric_str(value: str) -> bool:
+    return bool(re.match(r'(0x)?[0-9a-fA-F\s]+$', value))
+
+
+def _get_str_keyed_dict(data: Dict[str, object], key: str) -> Dict[str, object]:
+    res = data.get(key, {})
+    assert isinstance(res, dict), f'Value of {key} must be a str-keyed dictionary'
+    for label in res.keys():
+        assert isinstance(label, str), f'{label} must be a string, got {type(label)}'
+    return res
+
+
+def _to_bytes_dict(input_dict: Dict[str, object],
+                   symbols: Dict[str, int]) -> Dict[str, bytes]:
+    dmem: Dict[str, bytes] = {}
+    for label, value in input_dict.items():
+        assert isinstance(value, str), f"{label} value must be an ELF symbol or a BE hex string"
+        value = value.strip()
+        if _is_numeric_str(value):
+            value = re.sub(r'\s', '', value)
+            if not value.startswith('0x'):
+                # Raise an error to avoid confusion with decimal values.
+                raise ValueError('Numeric hex string must start with "0x"')
+            value = value.removeprefix("0x")
+            value = '0' * (len(value) % 2) + value
+            data_bytes = bytes.fromhex(value)[::-1]  # big-endian -> little-endian
+        else:
+            value_int = _get_symbol(symbols, value)
+            data_bytes = value_int.to_bytes(4, 'little')
+        dmem[label] = data_bytes
+    return dmem
+
+
+def _to_int_dict(input_dict: Dict[str, object],
+                 symbols: Dict[str, int]) -> Dict[str, int]:
+    bytes_dict = _to_bytes_dict(input_dict, symbols)
+    return {k: int.from_bytes(v, 'little') for k, v in bytes_dict.items()}
+
+
+@dataclass
+class StateExpectations:
+    dmem: Dict[str, bytes]  # dmem variable label -> little-endian data bytes
+    regs: Dict[str, int]  # register label (e.g. x1) -> value
+
+    @staticmethod
+    def _from_dict(data: Dict[str, object],
+                   symbols: Dict[str, int]) -> 'StateExpectations':
+        unknown_keys = set(data.keys()) - {'dmem', 'regs'}
+        if len(unknown_keys):
+            raise ValueError(f'Got unknown keys in testcase input/output: {unknown_keys}')
+
+        return StateExpectations(
+            dmem=_to_bytes_dict(_get_str_keyed_dict(data, 'dmem'), symbols),
+            regs=_to_int_dict(_get_str_keyed_dict(data, 'regs'), symbols)
+        )
+
+
+@dataclass
+class OtbnTestCase:
+    entrypoint: int
+    input: StateExpectations
+    output: StateExpectations
+
+    @staticmethod
+    def from_hjson(hjson_str: str,
+                   symbols: Dict[str, int]) -> 'OtbnTestCase':
+        """
+        Parse a testcase HJSON string into a OtbnTestCase object.
+
+        The HJSON schema is defined as follows:
+        ```
+            {
+                entrypoint: str = "0"  // Address or symbol of entrypoint
+                input: StateExpectations
+                output: StateExpectations
+            }
+        ```
+
+        The StateExpectations schema is defined as follows:
+        ```
+            {
+                dmem: {
+                    // Label can be address hex (e.g. "0xbeef") or symbol in ELF (e.g. "symbol").
+                    //
+                    // Value can be hex string (e.g. "0xdeadbeef") or symbol in ELF (e.g. "symbol").
+                    // The number of bytes to be written/compared is inferred from the hex string's
+                    // length or is 4 bytes if the value is a symbol.
+                    //
+                    // In the case of a hex string, its length must be a multiple of 2.
+                    <label>: <value>
+                },
+                regs: {
+                    // Register name can be `x0-x31`, `w0-w31`, or those ext_regs like `ERR_BITS`.
+                    //
+                    // Value is hex string (e.g. "0xdeadbeef") or symbol in ELF (e.g. "symbol").
+                    // The size of the register is determined by the hardware spec.
+                    //
+                    // In the case of a hex string, its length must be a multiple of 2.
+                    <reg_name>: <value>
+                }
+            }
+        ```
+
+        Args:
+            hjson_str: The HJSON string to parse.
+            symbols: A dict from symbol name (str) to value (int). This should contain
+                     all symbols from the program being tested.
+
+        Returns:
+            A OtbnTestCase object representing the parsed testcase.
+        """
+        data: Dict[str, object] = hjson.loads(hjson_str)
+
+        unknown_keys = set(data.keys()) - {'entrypoint', 'input', 'output'}
+        if len(unknown_keys):
+            raise ValueError(f'Got unknown keys in testcase: {unknown_keys}')
+
+        entrypoint = data.get('entrypoint', 0)
+        if isinstance(entrypoint, int):
+            entrypoint_addr = entrypoint
+        elif isinstance(entrypoint, str):
+            if _is_numeric_str(entrypoint):
+                entrypoint_addr = int(entrypoint, 0)
+            else:
+                entrypoint_addr = _get_symbol(symbols, entrypoint)
+        else:
+            raise ValueError(f'Entrypoint must be int or str, got {type(entrypoint)}')
+
+        return OtbnTestCase(
+            entrypoint=entrypoint_addr,
+            input=StateExpectations._from_dict(_get_str_keyed_dict(data, 'input'), symbols),
+            output=StateExpectations._from_dict(_get_str_keyed_dict(data, 'output'), symbols),
+        )
diff --git a/hw/ip/otp_ctrl/data/BUILD b/hw/ip/otp_ctrl/data/BUILD
index 952f25d9d2b87..7cbac51afed3e 100644
--- a/hw/ip/otp_ctrl/data/BUILD
+++ b/hw/ip/otp_ctrl/data/BUILD
@@ -2,18 +2,20 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@bazel_skylib//rules:common_settings.bzl", "int_flag", "string_flag")
+load("@rules_pkg//pkg:mappings.bzl", "pkg_files")
 load(
     "//rules:autogen.bzl",
     "autogen_hjson_c_header",
     "autogen_hjson_rust_header",
 )
+load("//rules:const.bzl", "CONST", "EARLGREY_ALERTS", "EARLGREY_LOC_ALERTS")
 load(
     "//rules:otp.bzl",
     "OTP_SIGVERIFY_FAKE_KEYS",
     "STD_OTP_OVERLAYS",
     "otp_alert_classification",
     "otp_alert_digest",
-    "otp_bytestring",
     "otp_hex",
     "otp_image",
     "otp_json",
@@ -22,9 +24,6 @@ load(
     "otp_per_class_ints",
     "otp_per_class_lists",
 )
-load("@rules_pkg//pkg:mappings.bzl", "pkg_files")
-load("@bazel_skylib//rules:common_settings.bzl", "int_flag", "string_flag")
-load("//rules:const.bzl", "CONST", "EARLGREY_ALERTS", "EARLGREY_LOC_ALERTS")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -90,8 +89,8 @@ otp_json(
         otp_partition(
             name = "CREATOR_SW_CFG",
             items = {
-                # Disable SPX+ signature verification. See the definitions of
-                # `kSigverifySpxDisabledOtp` and `kSigverifySpxEnabledOtp` in
+                # Disable SPX+ signature verification. See the definition of
+                # `kSigverifySpxDisabledOtp` in
                 # sw/device/silicon_creator/lib/sigverify/spx_verify.h.
                 "CREATOR_SW_CFG_SIGVERIFY_SPX_EN": otp_hex(0x8d6c8c17),
                 # Enable use of entropy for countermeasures. See the definition
@@ -616,3 +615,9 @@ pkg_files(
     srcs = [":otp_imgs"],
     prefix = "earlgrey/otp",
 )
+
+# Partition used to set a fixed seed value in `otp_image_consts` targets.
+otp_json(
+    name = "otp_json_baseline",
+    seed = "85452983286950371191603618368782861611109037138182535346147818831008789508651",
+)
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/emulation/BUILD b/hw/ip/otp_ctrl/data/earlgrey_skus/emulation/BUILD
new file mode 100644
index 0000000000000..a51330b94a6a4
--- /dev/null
+++ b/hw/ip/otp_ctrl/data/earlgrey_skus/emulation/BUILD
@@ -0,0 +1,369 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# This file contains the build rules for the OTP data for pre-silicon and
+# post-silicon simulation and emulation targets.
+
+load(
+    "//rules:const.bzl",
+    "CONST",
+    "EARLGREY_ALERTS",
+    "EARLGREY_LOC_ALERTS",
+    "get_lc_items",
+)
+load(
+    "//rules:otp.bzl",
+    "OTP_SIGVERIFY_FAKE_KEYS",
+    "otp_alert_classification",
+    "otp_alert_digest",
+    "otp_hex",
+    "otp_image",
+    "otp_image_consts",
+    "otp_json",
+    "otp_partition",
+    "otp_per_class_bytes",
+    "otp_per_class_ints",
+    "otp_per_class_lists",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+otp_json(
+    name = "otp_json_creator_sw_cfg",
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items = {
+                # Enable AST initialization.
+                # CREATOR_SW_CFG_AST_CFG is handled by the manufacturing flow
+                # and not listed directly in this configuration.
+                "CREATOR_SW_CFG_AST_INIT_EN": otp_hex(CONST.MUBI4_TRUE),
+                "CREATOR_SW_CFG_ROM_EXT_SKU": otp_hex(0x0),
+                # Enable SPX+ signature verification. See the definitions of
+                # `kSigverifySpxDisabledOtp` in
+                # sw/device/silicon_creator/lib/sigverify/spx_verify.h for
+                # details on how to disable this feature.
+                "CREATOR_SW_CFG_SIGVERIFY_SPX_EN": otp_hex(0x0),
+                # Enable flash data page scrambling and ECC.
+                "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG": "0000090606",
+                "CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG": otp_hex(0x0),
+                "CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE": otp_hex(0x0),
+                # Disable use of entropy for countermeasures. See the definition
+                # of `hardened_bool_t` in sw/device/lib/base/hardened.h.
+                "CREATOR_SW_CFG_RNG_EN": otp_hex(CONST.HARDENED_FALSE),
+                "CREATOR_SW_CFG_JITTER_EN": otp_hex(CONST.MUBI4_FALSE),
+                "CREATOR_SW_CFG_RET_RAM_RESET_MASK": otp_hex(0x0),
+                "CREATOR_SW_CFG_MANUF_STATE": otp_hex(CONST.MANUF_STATE.PERSONALIZED),
+                # ROM execution is enabled if this item is set to a non-zero
+                # value.
+                "CREATOR_SW_CFG_ROM_EXEC_EN": otp_hex(0xffffffff),
+                # Value to write to the cpuctrl CSR in `rom_init()`.
+                # See:
+                # https://ibex-core.readthedocs.io/en/latest/03_reference/cs_registers.html#cpu-control-register-cpuctrl
+                # CPUCTRL = 0x1 enables ICACHE.
+                "CREATOR_SW_CFG_CPUCTRL": otp_hex(0x1),
+                # Value of the min_security_version_rom_ext field of the
+                # default boot data.
+                "CREATOR_SW_CFG_MIN_SEC_VER_ROM_EXT": otp_hex(0x0),
+                # Value of the min_security_version_bl0 field of the default
+                # boot data.
+                "CREATOR_SW_CFG_MIN_SEC_VER_BL0": otp_hex(0x0),
+                # Enable the default boot data in PROD and PROD_END life cycle
+                # states. See the definition of `hardened_bool_t` in
+                # sw/device/lib/base/hardened.h.
+                "CREATOR_SW_CFG_DEFAULT_BOOT_DATA_IN_PROD_EN": otp_hex(CONST.HARDENED_TRUE),
+                # This enables a busyloop in the ROM to give time to
+                # trigger an RMA lifecycle transition via JTAG.
+                # TODO: The following value needs to be updated once we have an
+                # idea of how many cycles are needed to enter RMA.
+                "CREATOR_SW_CFG_RMA_SPIN_EN": otp_hex(CONST.HARDENED_TRUE),
+                "CREATOR_SW_CFG_RMA_SPIN_CYCLES": otp_hex(0x2000000),
+                # Entropy source health check default values. This needs to be
+                # populated when `CREATOR_SW_CFG_RNG_EN` is set to true.
+                "CREATOR_SW_CFG_RNG_REPCNT_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_REPCNTS_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_ADAPTP_HI_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_ADAPTP_LO_THRESHOLDS": otp_hex(0x0),
+                "CREATOR_SW_CFG_RNG_BUCKET_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_MARKOV_HI_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_MARKOV_LO_THRESHOLDS": otp_hex(0x0),
+                "CREATOR_SW_CFG_RNG_EXTHT_HI_THRESHOLDS": otp_hex(0xffffffff),
+                "CREATOR_SW_CFG_RNG_EXTHT_LO_THRESHOLDS": otp_hex(0x0),
+                "CREATOR_SW_CFG_RNG_ALERT_THRESHOLD": otp_hex(0xfffd0002),
+                "CREATOR_SW_CFG_RNG_HEALTH_CONFIG_DIGEST": otp_hex(0x8264cf75),
+
+                # Any value different than `CONST.HARDENED_FALSE` will force
+                # main SRAM scramble key rotation.
+                "CREATOR_SW_CFG_SRAM_KEY_RENEW_EN": otp_hex(0x0),
+
+                # Disable the use of the ROM_EXT immutable section.
+                "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN": otp_hex(CONST.HARDENED_FALSE),
+            },
+        ),
+    ],
+)
+
+otp_json(
+    name = "otp_json_owner_sw_cfg",
+    partitions = [
+        otp_partition(
+            name = "OWNER_SW_CFG",
+            items = {
+                # Report errors without any redaction.
+                "OWNER_SW_CFG_ROM_ERROR_REPORTING": otp_hex(CONST.SHUTDOWN.REDACT.NONE),
+                # Enable bootstrap. See `hardened_bool_t` in
+                # sw/device/lib/base/hardened.h.
+                "OWNER_SW_CFG_ROM_BOOTSTRAP_DIS": otp_hex(CONST.HARDENED_FALSE),
+                # Set the enables to kAlertEnableNone.
+                # See `alert_enable_t` in
+                # sw/device/silicon_creator/lib/drivers/alert.h
+                "OWNER_SW_CFG_ROM_ALERT_CLASS_EN": otp_per_class_bytes(
+                    A = CONST.ALERT.NONE,
+                    B = CONST.ALERT.NONE,
+                    C = CONST.ALERT.NONE,
+                    D = CONST.ALERT.NONE,
+                ),
+                # Set the escalation policies to kAlertEscalateNone.
+                # See `alert_escalate_t` in
+                # sw/device/silicon_creator/lib/drivers/alert.h
+                "OWNER_SW_CFG_ROM_ALERT_ESCALATION": otp_per_class_bytes(
+                    A = CONST.ALERT.ESC_NONE,
+                    B = CONST.ALERT.ESC_NONE,
+                    C = CONST.ALERT.ESC_NONE,
+                    D = CONST.ALERT.ESC_NONE,
+                ),
+                # Set the classifications to kAlertClassX.
+                # See `alert_class_t` in
+                # sw/device/silicon_creator/lib/drivers/alert.h
+                "OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION": otp_alert_classification(
+                    alert_list = EARLGREY_ALERTS,
+                    # The ordering is "prod, prod_end, dev, rma"
+                    default = "X, X, X, X",
+                ),
+                # Set the classifications to kAlertClassX. See `alert_class_t` in
+                # sw/device/silicon_creator/lib/drivers/alert.h
+                "OWNER_SW_CFG_ROM_LOCAL_ALERT_CLASSIFICATION": otp_alert_classification(
+                    alert_list = EARLGREY_LOC_ALERTS,
+                    # The ordering is "prod, prod_end, dev, rma"
+                    default = "X, X, X, X",
+                ),
+                # Set the alert accumulation thresholds to 0 per class.
+                "OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH": otp_per_class_ints(
+                    A = 0,
+                    B = 0,
+                    C = 0,
+                    D = 0,
+                ),
+                # Set the alert timeout cycles to 0 per class.
+                "OWNER_SW_CFG_ROM_ALERT_TIMEOUT_CYCLES": otp_per_class_ints(
+                    A = 0,
+                    B = 0,
+                    C = 0,
+                    D = 0,
+                ),
+                # Set the alert phase cycles to 0,10,10,0xFFFFFFFF for classes
+                # A and B, and to all zeros for classes C and D.
+                "OWNER_SW_CFG_ROM_ALERT_PHASE_CYCLES": otp_per_class_lists(
+                    A = "0x0, 0xa, 0xa, 0xffffffff",
+                    B = "0x0, 0xa, 0xa, 0xffffffff",
+                    C = "0x0, 0x0, 0x0, 0x0",
+                    D = "0x0, 0x0, 0x0, 0x0",
+                ),
+                "OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES": otp_hex(0x0),
+                # Set to 0x739 to use the OTP hash measurement of the software
+                # readable OTP partitions as the key manager attestation binding
+                # value. Since our attestation scheme is not finalized, we keep
+                # this unprovisioned (disabled).
+                "OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN": otp_hex(0x0),
+                "OWNER_SW_CFG_MANUF_STATE": otp_hex(0x0),
+                "OWNER_SW_CFG_ROM_RSTMGR_INFO_EN": otp_hex(0x0),
+                # Disable ROM_EXT recovery feature.
+                "OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN": otp_hex(0x0),
+                # Disable SRAM readback for both ret-ram and main sram.
+                "OWNER_SW_CFG_ROM_SRAM_READBACK_EN": otp_hex(CONST.MUBI4_FALSE << 4 | CONST.MUBI4_FALSE),
+                "OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN": otp_hex(CONST.HARDENED_FALSE),
+                "OWNER_SW_CFG_ROM_RESET_REASON_CHECK_VALUE": otp_hex(CONST.HARDENED_FALSE << 16 | CONST.HARDENED_FALSE),
+                "OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN": otp_hex(CONST.HARDENED_TRUE),
+                # By default, the sensor_ctrl should disable all sensors and mark
+                # alerts as recoverable.
+                "OWNER_SW_CFG_ROM_SENSOR_CTRL_ALERT_CFG": [
+                    otp_hex(0x69696969),
+                    otp_hex(0x69696969),
+                    otp_hex(0x69696969),
+                ],
+            },
+        ),
+    ],
+)
+
+# Create an overlay for the alert_handler digest.
+otp_alert_digest(
+    name = "alert_digest_cfg",
+    otp_img = ":otp_json_owner_sw_cfg",
+)
+
+# Create an overlay that enalbes the rv_dm late debug feature.
+otp_json(
+    name = "otp_json_hw_cfg1_enable_rv_dm_late_debug",
+    partitions = [
+        otp_partition(
+            name = "HW_CFG1",
+            items = {
+                # Use legacy behavior and disable late debug enable.
+                "DIS_RV_DM_LATE_DEBUG": False,
+            },
+            lock = True,
+        ),
+    ],
+)
+
+# The `LC_MISSION_STATES` object contains the set of mission mode life cycle
+# states. A device is considered to be mission mode configured if it has a
+# matching `MANUF_PERSONALIZED` OTP configuration.
+LC_MISSION_STATES = get_lc_items(
+    CONST.LCV.DEV,
+    CONST.LCV.PROD,
+    CONST.LCV.PROD_END,
+)
+
+# The `MANUF_INITIALIZED` OTP profile configures the SECRET0 partition to
+# enable the device to transition between test_unlock and test_locked states,
+# as well as to transition out of test_unlock into any mission mode state.
+# This profile represents the OTP state of a device that has completed CP
+# provisioning.
+MANUF_INITIALIZED = [
+    "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
+]
+
+# The `MANUF_SW_INITIALIZED` OTP profile configures the following partitions:
+# - CREATOR_SW_CFG, and
+# - OWNER_SW_CFG.
+# This profile is used to construct the `MANUF_INDIVIDUALIZED` profile below.
+MANUF_SW_INITIALIZED = [
+    ":alert_digest_cfg",
+    ":otp_json_creator_sw_cfg",
+    ":otp_json_owner_sw_cfg",
+]
+
+# The `MANUF_INDIVIDUALIZED` OTP profile configures the following partitions:
+# - CREATOR_SW_CFG,
+# - OWNER_SW_CFG,
+# - ROT_CREATOR_AUTH_CODESIGN,
+# - ROT_CREATOR_AUTH_STATE, and
+# - HW_CFG0/1.
+# It also includes the `MANUF_INITIALIZED` profile defined above. It represents
+# the OTP state of a device that has completed FT individualize provisioning.
+MANUF_INDIVIDUALIZED = MANUF_INITIALIZED + MANUF_SW_INITIALIZED + OTP_SIGVERIFY_FAKE_KEYS + [
+    "//hw/ip/otp_ctrl/data:otp_json_hw_cfg0",
+    "//hw/ip/otp_ctrl/data:otp_json_hw_cfg1",
+]
+
+# The `MANUF_PERSONALIZED` OTP profile configures the SECRET1 and SECRET2 OTP
+# partitions. It also includes the `MANUF_INDIVIDUALIZED` profile. It represents
+# the OTP state of a device that has completed all provisioning steps.
+MANUF_PERSONALIZED = MANUF_INDIVIDUALIZED + [
+    "//hw/ip/otp_ctrl/data:otp_json_secret1",
+    "//hw/ip/otp_ctrl/data:otp_json_fixed_secret2",
+]
+
+# OTP *_SW_CFG and ROT_CREATOR_AUTH_* constants used to generate an FT
+# individualization binary.
+otp_image_consts(
+    name = "otp_consts_c_file",
+    src = "//hw/ip/otp_ctrl/data:otp_json_baseline",
+    # Do not add additional overlays here. Update the `MANUF_SW_INITIALIZED`
+    # OTP profile instead.
+    overlays = MANUF_SW_INITIALIZED + OTP_SIGVERIFY_FAKE_KEYS,
+)
+
+# Library containing {CREATOR,OWNER}_SW_CFG and
+# ROT_CREATOR_AUTH_{CODESIGN,STATE} partition constants.
+cc_library(
+    name = "otp_consts",
+    srcs = [":otp_consts_c_file"],
+    deps = [
+        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+        "//sw/device/silicon_creator/manuf/lib:otp_img_types",
+    ],
+)
+
+# Initial test_unlocked state. Only applicable for test_unlocked0. All other
+# test states require the SECRET0 partition to be configured.
+# In this configuration, ROM execution is disabled by default. JTAG should be
+# used to bootstrap code into SRAM or FLASH.
+# See sw/device/tests/doc/sival/devguide.md for more details.
+otp_image(
+    name = "otp_img_test_unlocked0_manuf_empty",
+    src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked0",
+)
+
+# `MANUF_INITIALIZED` configuration. This configuration will be generally used
+# to lock the chips before shipping to the Final-Test test house.
+# See sw/device/tests/doc/sival/devguide.md for more details.
+otp_image(
+    name = "otp_img_test_locked0_manuf_initialized",
+    src = "//hw/ip/otp_ctrl/data:otp_json_test_locked0",
+    overlays = MANUF_INITIALIZED,
+)
+
+# `MANUF_INITIALIZED` OTP configuration. Available on TEST_UNLOCK states 1-7.
+# See sw/device/tests/doc/sival/devguide.md for more details.
+[
+    otp_image(
+        name = "otp_img_test_unlocked{}_manuf_initialized".format(i),
+        src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked{}".format(i),
+        overlays = MANUF_INITIALIZED,
+    )
+    for i in range(1, 8)
+]
+
+# `MANUF_INDIVIDUALIZED` configuration. Available on TEST_UNLOCK states 1-7, as
+# well as DEV, PROD, PROD_END and RMA. This configuration has flash scrambling
+# disabled. See the personalized OTP configuration for targets requiring flash
+# scrambling enabled.
+# See sw/device/tests/doc/sival/devguide.md for more details.
+[
+    otp_image(
+        name = "otp_img_{}_manuf_individualized".format(lc_state),
+        src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
+        overlays = MANUF_INDIVIDUALIZED,
+    )
+    for lc_state, _ in get_lc_items(
+        CONST.LCV.TEST_UNLOCKED1,
+        CONST.LCV.TEST_UNLOCKED2,
+        CONST.LCV.TEST_UNLOCKED3,
+        CONST.LCV.TEST_UNLOCKED4,
+        CONST.LCV.TEST_UNLOCKED5,
+        CONST.LCV.TEST_UNLOCKED6,
+        CONST.LCV.TEST_UNLOCKED7,
+        CONST.LCV.DEV,
+        CONST.LCV.PROD,
+        CONST.LCV.PROD_END,
+    )
+]
+
+# `MANUF_PERSONALIZED` configuration. Available on `LC_MISSION_STATES` life
+# cycle states.
+# See sw/device/tests/doc/sival/devguide.md for more details.
+[
+    otp_image(
+        name = "otp_img_{}_manuf_personalized".format(lc_state),
+        src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
+        overlays = MANUF_PERSONALIZED,
+    )
+    for lc_state, _ in LC_MISSION_STATES
+]
+
+otp_image(
+    name = "otp_img_dev_manuf_personalized_enable_rv_dm_late_debug_enable",
+    src = "//hw/ip/otp_ctrl/data:otp_json_dev",
+    overlays = MANUF_PERSONALIZED + [":otp_json_hw_cfg1_enable_rv_dm_late_debug"],
+)
+
+# `MANUF_PERSONALIZED` configuration for RMA. Only available in secure environments.
+otp_image(
+    name = "otp_img_rma_manuf_personalized",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = MANUF_PERSONALIZED,
+)
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/prodc/BUILD b/hw/ip/otp_ctrl/data/earlgrey_skus/prodc/BUILD
deleted file mode 100644
index 1e5beb48eefd0..0000000000000
--- a/hw/ip/otp_ctrl/data/earlgrey_skus/prodc/BUILD
+++ /dev/null
@@ -1,416 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# SKU: ProdC for integration testing. ASCII code `PC00`.
-# The ProdC SKU is intended to be used in early integration testing stages
-# of Earl Grey silicon. Some of the countermeasures in the ROM are disabled
-# to de-risk silicon evaluation.
-
-load(
-    "//rules:const.bzl",
-    "CONST",
-    "EARLGREY_ALERTS",
-    "EARLGREY_LOC_ALERTS",
-    "get_lc_items",
-)
-load(
-    "//rules:otp.bzl",
-    "otp_alert_classification",
-    "otp_alert_digest",
-    "otp_hex",
-    "otp_image",
-    "otp_image_consts",
-    "otp_json",
-    "otp_partition",
-    "otp_per_class_bytes",
-    "otp_per_class_ints",
-    "otp_per_class_lists",
-)
-
-package(default_visibility = ["//visibility:public"])
-
-# Partition used to set a fixed seed value in `otp_image_consts` targets.
-otp_json(
-    name = "otp_json_baseline",
-    seed = "85452983286950371191603618368782861611109037138182535346147818831008789508651",
-)
-
-otp_json(
-    name = "otp_json_creator_sw_cfg",
-    partitions = [
-        otp_partition(
-            name = "CREATOR_SW_CFG",
-            items = {
-                # Enable AST initialization.
-                # CREATOR_SW_CFG_AST_CFG is handled by the manufacturing flow
-                # and not listed directly in this configuration.
-                "CREATOR_SW_CFG_AST_INIT_EN": otp_hex(CONST.MUBI4_TRUE),
-                "CREATOR_SW_CFG_ROM_EXT_SKU": otp_hex(0x0),
-                # Disable SPX+ signature verification. See the definitions of
-                # `kSigverifySpxDisabledOtp` and `kSigverifySpxEnabledOtp` in
-                # sw/device/silicon_creator/lib/sigverify/spx_verify.h.
-                "CREATOR_SW_CFG_SIGVERIFY_SPX_EN": otp_hex(0x8d6c8c17),
-                # Enable flash data page scrambling and ECC.
-                "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG": "0000090606",
-                "CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG": otp_hex(0x0),
-                "CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE": otp_hex(0x0),
-                # Disable use of entropy for countermeasures. See the definition
-                # of `hardened_bool_t` in sw/device/lib/base/hardened.h.
-                "CREATOR_SW_CFG_RNG_EN": otp_hex(CONST.HARDENED_FALSE),
-                "CREATOR_SW_CFG_JITTER_EN": otp_hex(CONST.MUBI4_FALSE),
-                "CREATOR_SW_CFG_RET_RAM_RESET_MASK": otp_hex(0x0),
-                "CREATOR_SW_CFG_MANUF_STATE": otp_hex(CONST.MANUF_STATE.PRODC),
-                # ROM execution is enabled if this item is set to a non-zero
-                # value.
-                "CREATOR_SW_CFG_ROM_EXEC_EN": otp_hex(0xffffffff),
-                # Value to write to the cpuctrl CSR in `rom_init()`.
-                # See:
-                # https://ibex-core.readthedocs.io/en/latest/03_reference/cs_registers.html#cpu-control-register-cpuctrl
-                # CPUCTRL = 0x1 enables ICACHE.
-                "CREATOR_SW_CFG_CPUCTRL": otp_hex(0x1),
-                # Value of the min_security_version_rom_ext field of the
-                # default boot data.
-                "CREATOR_SW_CFG_MIN_SEC_VER_ROM_EXT": otp_hex(0x0),
-                # Value of the min_security_version_bl0 field of the default
-                # boot data.
-                "CREATOR_SW_CFG_MIN_SEC_VER_BL0": otp_hex(0x0),
-                # Enable the default boot data in PROD and PROD_END life cycle
-                # states. See the definition of `hardened_bool_t` in
-                # sw/device/lib/base/hardened.h.
-                "CREATOR_SW_CFG_DEFAULT_BOOT_DATA_IN_PROD_EN": otp_hex(CONST.HARDENED_TRUE),
-                # This enables a busyloop in the ROM to give time to
-                # trigger an RMA lifecycle transition via JTAG.
-                # TODO: The following value needs to be updated once we have an
-                # idea of how many cycles are needed to enter RMA.
-                "CREATOR_SW_CFG_RMA_SPIN_EN": otp_hex(CONST.HARDENED_TRUE),
-                "CREATOR_SW_CFG_RMA_SPIN_CYCLES": otp_hex(0x2000000),
-                # Entropy source health check default values. This needs to be
-                # populated when `CREATOR_SW_CFG_RNG_EN` is set to true.
-                "CREATOR_SW_CFG_RNG_REPCNT_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_REPCNTS_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_ADAPTP_HI_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_ADAPTP_LO_THRESHOLDS": otp_hex(0x0),
-                "CREATOR_SW_CFG_RNG_BUCKET_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_MARKOV_HI_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_MARKOV_LO_THRESHOLDS": otp_hex(0x0),
-                "CREATOR_SW_CFG_RNG_EXTHT_HI_THRESHOLDS": otp_hex(0xffffffff),
-                "CREATOR_SW_CFG_RNG_EXTHT_LO_THRESHOLDS": otp_hex(0x0),
-                "CREATOR_SW_CFG_RNG_ALERT_THRESHOLD": otp_hex(0xfffd0002),
-                "CREATOR_SW_CFG_RNG_HEALTH_CONFIG_DIGEST": otp_hex(0x8264cf75),
-
-                # Any value different than `CONST.HARDENED_FALSE` will force
-                # main SRAM scramble key rotation.
-                "CREATOR_SW_CFG_SRAM_KEY_RENEW_EN": otp_hex(0x0),
-            },
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_owner_sw_cfg",
-    partitions = [
-        otp_partition(
-            name = "OWNER_SW_CFG",
-            items = {
-                # Report errors without any redaction.
-                "OWNER_SW_CFG_ROM_ERROR_REPORTING": otp_hex(CONST.SHUTDOWN.REDACT.NONE),
-                # Enable bootstrap. See `hardened_bool_t` in
-                # sw/device/lib/base/hardened.h.
-                "OWNER_SW_CFG_ROM_BOOTSTRAP_DIS": otp_hex(CONST.HARDENED_FALSE),
-                # Set the enables to kAlertEnableNone.
-                # See `alert_enable_t` in
-                # sw/device/silicon_creator/lib/drivers/alert.h
-                "OWNER_SW_CFG_ROM_ALERT_CLASS_EN": otp_per_class_bytes(
-                    A = CONST.ALERT.NONE,
-                    B = CONST.ALERT.NONE,
-                    C = CONST.ALERT.NONE,
-                    D = CONST.ALERT.NONE,
-                ),
-                # Set the escalation policies to kAlertEscalateNone.
-                # See `alert_escalate_t` in
-                # sw/device/silicon_creator/lib/drivers/alert.h
-                "OWNER_SW_CFG_ROM_ALERT_ESCALATION": otp_per_class_bytes(
-                    A = CONST.ALERT.ESC_NONE,
-                    B = CONST.ALERT.ESC_NONE,
-                    C = CONST.ALERT.ESC_NONE,
-                    D = CONST.ALERT.ESC_NONE,
-                ),
-                # Set the classifications to kAlertClassX.
-                # See `alert_class_t` in
-                # sw/device/silicon_creator/lib/drivers/alert.h
-                "OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION": otp_alert_classification(
-                    alert_list = EARLGREY_ALERTS,
-                    # The ordering is "prod, prod_end, dev, rma"
-                    default = "X, X, X, X",
-                ),
-                # Set the classifications to kAlertClassX. See `alert_class_t` in
-                # sw/device/silicon_creator/lib/drivers/alert.h
-                "OWNER_SW_CFG_ROM_LOCAL_ALERT_CLASSIFICATION": otp_alert_classification(
-                    alert_list = EARLGREY_LOC_ALERTS,
-                    # The ordering is "prod, prod_end, dev, rma"
-                    default = "X, X, X, X",
-                ),
-                # Set the alert accumulation thresholds to 0 per class.
-                "OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH": otp_per_class_ints(
-                    A = 0,
-                    B = 0,
-                    C = 0,
-                    D = 0,
-                ),
-                # Set the alert timeout cycles to 0 per class.
-                "OWNER_SW_CFG_ROM_ALERT_TIMEOUT_CYCLES": otp_per_class_ints(
-                    A = 0,
-                    B = 0,
-                    C = 0,
-                    D = 0,
-                ),
-                # Set the alert phase cycles to 0,10,10,0xFFFFFFFF for classes
-                # A and B, and to all zeros for classes C and D.
-                "OWNER_SW_CFG_ROM_ALERT_PHASE_CYCLES": otp_per_class_lists(
-                    A = "0x0, 0xa, 0xa, 0xffffffff",
-                    B = "0x0, 0xa, 0xa, 0xffffffff",
-                    C = "0x0, 0x0, 0x0, 0x0",
-                    D = "0x0, 0x0, 0x0, 0x0",
-                ),
-                "OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES": otp_hex(0x0),
-                # Set to 0x739 to use the OTP hash measurement of the software
-                # readable OTP partitions as the key manager attestation binding
-                # value. Since our attestation scheme is not finalized, we keep
-                # this unprovisioned (disabled).
-                "OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN": otp_hex(0x0),
-                "OWNER_SW_CFG_MANUF_STATE": otp_hex(0x0),
-                "OWNER_SW_CFG_ROM_RSTMGR_INFO_EN": otp_hex(0x0),
-                # Disable ROM_EXT recovery feature.
-                "OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN": otp_hex(0x0),
-                # Disable SRAM readback for both ret-ram and main sram.
-                "OWNER_SW_CFG_ROM_SRAM_READBACK_EN": otp_hex(CONST.MUBI4_FALSE << 4 | CONST.MUBI4_FALSE),
-                # TODO(#23411): The customer wants this to be HARDENED_TRUE
-                # for production chips.
-                "OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN": otp_hex(CONST.HARDENED_FALSE),
-                "OWNER_SW_CFG_ROM_RESET_REASON_CHECK_VALUE": otp_hex(CONST.HARDENED_FALSE << 16 | CONST.HARDENED_FALSE),
-                "OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN": otp_hex(CONST.HARDENED_TRUE),
-                # By default, the sensor_ctrl should disable all sensors and mark
-                # alerts as recoverable.
-                "OWNER_SW_CFG_ROM_SENSOR_CTRL_ALERT_CFG": [
-                    otp_hex(0x69696969),
-                    otp_hex(0x69696969),
-                    otp_hex(0x69696969),
-                ],
-            },
-        ),
-    ],
-)
-
-# Create an overlay for the alert_handler digest.
-otp_alert_digest(
-    name = "alert_digest_cfg",
-    otp_img = ":otp_json_owner_sw_cfg",
-)
-
-otp_json(
-    name = "otp_json_hw_cfg0",
-    partitions = [
-        otp_partition(
-            name = "HW_CFG0",
-            items = {
-                "DEVICE_ID": "<random>",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_hw_cfg1",
-    partitions = [
-        otp_partition(
-            name = "HW_CFG1",
-            items = {
-                # Enable code execution from SRAM in PROD state.
-                "EN_SRAM_IFETCH": True,
-                # Cryptolib and chip-level tests require access to the CSRNG
-                # software interfaces.
-                "EN_CSRNG_SW_APP_READ": True,
-                # Use legacy behavior and disable late debug enable.
-                "DIS_RV_DM_LATE_DEBUG": True,
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_secret1",
-    partitions = [
-        otp_partition(
-            name = "SECRET1",
-            items = {
-                "FLASH_ADDR_KEY_SEED": "<random>",
-                "FLASH_DATA_KEY_SEED": "<random>",
-                "SRAM_DATA_KEY_SEED": "<random>",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_fixed_secret2",
-    partitions = [
-        otp_partition(
-            name = "SECRET2",
-            items = {
-                # We aren't testing keymgr for ROM_EXT tests and we want
-                # reproducible bitstreams for all tests.
-                "RMA_TOKEN": "0x1faf9056acde66561685549803a28bec",
-                "CREATOR_ROOT_KEY_SHARE0": "1111111111111111111111111111111111111111111111111111111111111111",
-                "CREATOR_ROOT_KEY_SHARE1": "2222222222222222222222222222222222222222222222222222222222222222",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-# The `LC_MISSION_STATES` object contains the set of mission mode life cycle
-# states. A device is considered to be mission mode configured if it has a
-# matching `MANUF_PERSONALIZED` OTP configuration.
-LC_MISSION_STATES = get_lc_items(
-    CONST.LCV.DEV,
-    CONST.LCV.PROD,
-    CONST.LCV.PROD_END,
-)
-
-# The `MANUF_INITIALIZED` OTP profile configures the SECRET0 partition to
-# enable the device to transition between test_unlock and test_locked states,
-# as well as to transition out of test_unlock into any of the
-# `LC_MISSION_STATES`.
-MANUF_INITIALIZED = [
-    "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
-    "//sw/device/silicon_creator/rom/keys/fake/otp:json_rot_keys",
-]
-
-MANUF_SW_INITIALIZED = [
-    ":alert_digest_cfg",
-    ":otp_json_creator_sw_cfg",
-    ":otp_json_owner_sw_cfg",
-]
-
-# The `MANUF_INDIVIDUALIZED` OTP profile configures the HW_CFG0/1, CREATOR_SW and
-# OWNER_SW OTP partitions. It also includes the `MANUF_INITIALIZED`.
-MANUF_INDIVIDUALIZED = MANUF_INITIALIZED + MANUF_SW_INITIALIZED + [
-    ":otp_json_hw_cfg0",
-    ":otp_json_hw_cfg1",
-]
-
-# The `MANUF_PERSONALIZED` OTP profile configures the SECRET1 and SECRET2 OTP
-# partitions. It also includes the `MANUF_INDIVIDUALIZED` profile.
-MANUF_PERSONALIZED = MANUF_INDIVIDUALIZED + [
-    ":otp_json_secret1",
-    ":otp_json_fixed_secret2",
-]
-
-# OTP SW Configuration. Used to generate a configuration program used during
-# manufacturing. The `MANUF_SW_INITIALIZED` OTP profile is also used to derive
-# OTP profiles representing the state of the device after running manufacturing
-# steps consuming this dependency.
-otp_image_consts(
-    name = "otp_sw_cfg_c_file",
-    src = ":otp_json_baseline",
-    # Do not add additional overlays here. Update the `MANUF_SW_INITIALIZED`
-    # OTP profile instead.
-    overlays = MANUF_SW_INITIALIZED,
-)
-
-cc_library(
-    name = "otp_sw_cfg",
-    srcs = [":otp_sw_cfg_c_file"],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/silicon_creator/manuf/lib:otp_img_types",
-    ],
-)
-
-# Initial test_unlocked state. Only applicable for test_unlocked0. All other
-# test states require the SECRET0 partition to be configured.
-# In this configuration, ROM execution is disabled by default. JTAG should be
-# used to bootstrap code into SRAM or FLASH.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-otp_image(
-    name = "otp_img_test_unlocked0_manuf_empty",
-    src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked0",
-)
-
-# `MANUF_INITIALIZED` configuration. This configuration will be generally used
-# to lock the chips before shipping to the Final-Test test house.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-otp_image(
-    name = "otp_img_test_locked0_manuf_initialized",
-    src = "//hw/ip/otp_ctrl/data:otp_json_test_locked0",
-    overlays = MANUF_INITIALIZED,
-)
-
-# `MANUF_INITIALIZED` OTP configuration. Available on TEST_UNLOCK states 1-7.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-[
-    otp_image(
-        name = "otp_img_test_unlocked{}_manuf_initialized".format(i),
-        src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked{}".format(i),
-        overlays = MANUF_INITIALIZED,
-    )
-    for i in range(1, 8)
-]
-
-# `MANUF_INDIVIDUALIZED` configuration. Available on TEST_UNLOCK states 1-7, as
-# well as dev, prod, prod_end and rma. This configuration has flash scrambling
-# disabled. See the personalized OTP configuration for targets requiring flash
-# scrambling enabled.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-[
-    otp_image(
-        name = "otp_img_{}_manuf_individualized".format(lc_state),
-        src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
-        overlays = MANUF_INDIVIDUALIZED,
-    )
-    for lc_state, _ in get_lc_items(
-        CONST.LCV.TEST_UNLOCKED1,
-        CONST.LCV.TEST_UNLOCKED2,
-        CONST.LCV.TEST_UNLOCKED3,
-        CONST.LCV.TEST_UNLOCKED4,
-        CONST.LCV.TEST_UNLOCKED5,
-        CONST.LCV.TEST_UNLOCKED6,
-        CONST.LCV.TEST_UNLOCKED7,
-        CONST.LCV.DEV,
-        CONST.LCV.PROD,
-        CONST.LCV.PROD_END,
-    )
-]
-
-# `MANUF_PERSONALIZED` configuration. Available on `LC_MISSION_STATES` life
-# cycle states.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-[
-    otp_image(
-        name = "otp_img_{}_manuf_personalized".format(lc_state),
-        src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
-        overlays = MANUF_PERSONALIZED,
-    )
-    for lc_state, _ in LC_MISSION_STATES
-]
-
-# `MANUF_PERSONALIZED` configuration for RMA. Only available in secure environments.
-otp_image(
-    name = "otp_img_rma_manuf_personalized",
-    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
-    overlays = MANUF_PERSONALIZED,
-)
-
-# `MANUF_PERSONALIZED` configuration for RMA with SPHINCS+ signature verification
-# enabled for secure boot. Only available in secure environments.
-otp_image(
-    name = "otp_img_rma_manuf_personalized_spx_enabled",
-    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
-    overlays = MANUF_PERSONALIZED + [
-        "//sw/device/silicon_creator/rom/e2e/sigverify_spx:otp_json_sigverify_spx_enabled_true",
-    ],
-)
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD
index f52092b530d11..8854c54e02a37 100644
--- a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD
+++ b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD
@@ -30,11 +30,9 @@ load(
 
 package(default_visibility = ["//visibility:public"])
 
-# Partition used to set a fixed seed value in `otp_image_consts` targets.
-otp_json(
-    name = "otp_json_baseline",
-    seed = "85452983286950371191603618368782861611109037138182535346147818831008789508651",
-)
+OTP_SIGVERIFY_REAL_KEYS = [
+    "//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:ecdsa_root_keys",
+]
 
 otp_json(
     name = "otp_json_creator_sw_cfg",
@@ -47,11 +45,11 @@ otp_json(
                 # and not listed directly in this configuration.
                 "CREATOR_SW_CFG_AST_INIT_EN": otp_hex(CONST.MUBI4_TRUE),
                 "CREATOR_SW_CFG_ROM_EXT_SKU": otp_hex(0x0),
-                # Enable SPX+ signature verification. See the definitions of
+                # Disable SPX+ signature verification. See the definitions of
                 # `kSigverifySpxDisabledOtp` in
                 # sw/device/silicon_creator/lib/sigverify/spx_verify.h for
                 # details on how to disable this feature.
-                "CREATOR_SW_CFG_SIGVERIFY_SPX_EN": otp_hex(0x0),
+                "CREATOR_SW_CFG_SIGVERIFY_SPX_EN": otp_hex(0x8d6c8c17),
                 # Enable flash data page scrambling and ECC.
                 "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG": "0000090606",
                 "CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG": otp_hex(0x0),
@@ -61,7 +59,7 @@ otp_json(
                 "CREATOR_SW_CFG_RNG_EN": otp_hex(CONST.HARDENED_FALSE),
                 "CREATOR_SW_CFG_JITTER_EN": otp_hex(CONST.MUBI4_FALSE),
                 "CREATOR_SW_CFG_RET_RAM_RESET_MASK": otp_hex(0x0),
-                "CREATOR_SW_CFG_MANUF_STATE": otp_hex(CONST.MANUF_STATE.SIVAL),
+                "CREATOR_SW_CFG_MANUF_STATE": otp_hex(CONST.MANUF_STATE.PERSONALIZED),
                 # ROM execution is enabled if this item is set to a non-zero
                 # value.
                 "CREATOR_SW_CFG_ROM_EXEC_EN": otp_hex(0xffffffff),
@@ -103,6 +101,9 @@ otp_json(
                 # Any value different than `CONST.HARDENED_FALSE` will force
                 # main SRAM scramble key rotation.
                 "CREATOR_SW_CFG_SRAM_KEY_RENEW_EN": otp_hex(0x0),
+
+                # Disable the use of the ROM_EXT immutable section.
+                "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN": otp_hex(CONST.HARDENED_FALSE),
             },
         ),
     ],
@@ -207,219 +208,72 @@ otp_alert_digest(
     otp_img = ":otp_json_owner_sw_cfg",
 )
 
-otp_json(
-    name = "otp_json_hw_cfg0",
-    partitions = [
-        otp_partition(
-            name = "HW_CFG0",
-            items = {
-                "DEVICE_ID": "<random>",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_hw_cfg1",
-    partitions = [
-        otp_partition(
-            name = "HW_CFG1",
-            items = {
-                # Enable code execution from SRAM in PROD state.
-                "EN_SRAM_IFETCH": True,
-                # Cryptolib and chip-level tests require access to the CSRNG
-                # software interfaces.
-                "EN_CSRNG_SW_APP_READ": True,
-                # Use legacy behavior and disable late debug enable.
-                "DIS_RV_DM_LATE_DEBUG": True,
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_hw_cfg1_enable_rv_dm_late_debug",
-    partitions = [
-        otp_partition(
-            name = "HW_CFG1",
-            items = {
-                # Use legacy behavior and disable late debug enable.
-                "DIS_RV_DM_LATE_DEBUG": False,
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_secret1",
-    partitions = [
-        otp_partition(
-            name = "SECRET1",
-            items = {
-                "FLASH_ADDR_KEY_SEED": "<random>",
-                "FLASH_DATA_KEY_SEED": "<random>",
-                "SRAM_DATA_KEY_SEED": "<random>",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-otp_json(
-    name = "otp_json_fixed_secret2",
-    partitions = [
-        otp_partition(
-            name = "SECRET2",
-            items = {
-                # We aren't testing keymgr for ROM_EXT tests and we want
-                # reproducible bitstreams for all tests.
-                "RMA_TOKEN": "0x1faf9056acde66561685549803a28bec",
-                "CREATOR_ROOT_KEY_SHARE0": "1111111111111111111111111111111111111111111111111111111111111111",
-                "CREATOR_ROOT_KEY_SHARE1": "2222222222222222222222222222222222222222222222222222222222222222",
-            },
-            lock = True,
-        ),
-    ],
-)
-
-# The `LC_MISSION_STATES` object contains the set of mission mode life cycle
-# states. A device is considered to be mission mode configured if it has a
-# matching `MANUF_PERSONALIZED` OTP configuration.
-LC_MISSION_STATES = get_lc_items(
-    CONST.LCV.DEV,
-    CONST.LCV.PROD,
-    CONST.LCV.PROD_END,
-)
-
-# The `MANUF_INITIALIZED` OTP profile configures the SECRET0 partition to
-# enable the device to transition between test_unlock and test_locked states,
-# as well as to transition out of test_unlock into any of the
-# `LC_MISSION_STATES`.
-MANUF_INITIALIZED = [
-    "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
-    "//sw/device/silicon_creator/rom/keys/fake/otp:json_rot_keys",
-]
-
-MANUF_SW_INITIALIZED = [
-    ":alert_digest_cfg",
-    ":otp_json_creator_sw_cfg",
-    ":otp_json_owner_sw_cfg",
-]
-
-# The `MANUF_INDIVIDUALIZED` OTP profile configures the HW_CFG0/1, CREATOR_SW and
-# OWNER_SW OTP partitions. It also includes the `MANUF_INITIALIZED`.
-MANUF_INDIVIDUALIZED = MANUF_INITIALIZED + MANUF_SW_INITIALIZED + [
-    ":otp_json_hw_cfg0",
-    ":otp_json_hw_cfg1",
-]
-
-# The `MANUF_PERSONALIZED` OTP profile configures the SECRET1 and SECRET2 OTP
-# partitions. It also includes the `MANUF_INDIVIDUALIZED` profile.
-MANUF_PERSONALIZED = MANUF_INDIVIDUALIZED + [
-    ":otp_json_secret1",
-    ":otp_json_fixed_secret2",
-]
-
-# OTP SW Configuration. Used to generate a configuration program used during
-# manufacturing. The `MANUF_SW_INITIALIZED` OTP profile is also used to derive
-# OTP profiles representing the state of the device after running manufacturing
-# steps consuming this dependency.
+# OTP *_SW_CFG and ROT_CREATOR_AUTH_* constants used to generate an FT
+# individualization binary.
 otp_image_consts(
-    name = "otp_sw_cfg_c_file",
-    src = ":otp_json_baseline",
-    # Do not add additional overlays here. Update the `MANUF_SW_INITIALIZED`
-    # OTP profile instead.
-    overlays = MANUF_SW_INITIALIZED,
+    name = "otp_consts_c_file",
+    src = "//hw/ip/otp_ctrl/data:otp_json_baseline",
+    overlays = [
+        ":alert_digest_cfg",
+        ":otp_json_creator_sw_cfg",
+        ":otp_json_owner_sw_cfg",
+    ] + OTP_SIGVERIFY_REAL_KEYS,
 )
 
+# Library containing {CREATOR,OWNER}_SW_CFG and
+# ROT_CREATOR_AUTH_{CODESIGN,STATE} partition constants.
 cc_library(
-    name = "otp_sw_cfg",
-    srcs = [":otp_sw_cfg_c_file"],
+    name = "otp_consts",
+    srcs = [":otp_consts_c_file"],
     deps = [
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//sw/device/silicon_creator/manuf/lib:otp_img_types",
     ],
 )
 
-# Initial test_unlocked state. Only applicable for test_unlocked0. All other
-# test states require the SECRET0 partition to be configured.
-# In this configuration, ROM execution is disabled by default. JTAG should be
-# used to bootstrap code into SRAM or FLASH.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-otp_image(
-    name = "otp_img_test_unlocked0_manuf_empty",
-    src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked0",
-)
-
-# `MANUF_INITIALIZED` configuration. This configuration will be generally used
-# to lock the chips before shipping to the Final-Test test house.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-otp_image(
-    name = "otp_img_test_locked0_manuf_initialized",
-    src = "//hw/ip/otp_ctrl/data:otp_json_test_locked0",
-    overlays = MANUF_INITIALIZED,
+# The `LC_MISSION_STATES` object contains the set of mission mode life cycle
+# states.
+LC_MISSION_STATES = get_lc_items(
+    CONST.LCV.DEV,
+    CONST.LCV.PROD,
+    CONST.LCV.PROD_END,
 )
 
-# `MANUF_INITIALIZED` OTP configuration. Available on TEST_UNLOCK states 1-7.
-# See sw/device/tests/doc/sival/devguide.md for more details.
-[
-    otp_image(
-        name = "otp_img_test_unlocked{}_manuf_initialized".format(i),
-        src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked{}".format(i),
-        overlays = MANUF_INITIALIZED,
-    )
-    for i in range(1, 8)
-]
-
-# `MANUF_INDIVIDUALIZED` configuration. Available on TEST_UNLOCK states 1-7, as
-# well as dev, prod, prod_end and rma. This configuration has flash scrambling
-# disabled. See the personalized OTP configuration for targets requiring flash
-# scrambling enabled.
-# See sw/device/tests/doc/sival/devguide.md for more details.
+# Individualized configuration for DV and FPGA testing. Available in all mission
+# mode LC states. This configuration has flash scrambling enabled.
 [
     otp_image(
         name = "otp_img_{}_manuf_individualized".format(lc_state),
         src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
-        overlays = MANUF_INDIVIDUALIZED,
-    )
-    for lc_state, _ in get_lc_items(
-        CONST.LCV.TEST_UNLOCKED1,
-        CONST.LCV.TEST_UNLOCKED2,
-        CONST.LCV.TEST_UNLOCKED3,
-        CONST.LCV.TEST_UNLOCKED4,
-        CONST.LCV.TEST_UNLOCKED5,
-        CONST.LCV.TEST_UNLOCKED6,
-        CONST.LCV.TEST_UNLOCKED7,
-        CONST.LCV.DEV,
-        CONST.LCV.PROD,
-        CONST.LCV.PROD_END,
+        overlays = [
+            "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
+            ":alert_digest_cfg",
+            ":otp_json_creator_sw_cfg",
+            ":otp_json_owner_sw_cfg",
+            "//hw/ip/otp_ctrl/data:otp_json_hw_cfg0",
+            "//hw/ip/otp_ctrl/data:otp_json_hw_cfg1",
+        ] + OTP_SIGVERIFY_REAL_KEYS,
     )
+    for lc_state, _ in LC_MISSION_STATES
 ]
 
-# `MANUF_PERSONALIZED` configuration. Available on `LC_MISSION_STATES` life
-# cycle states.
+# Personalized configuration for FPGA testing. Available on `LC_MISSION_STATES`
+# life cycle states.
 # See sw/device/tests/doc/sival/devguide.md for more details.
 [
     otp_image(
         name = "otp_img_{}_manuf_personalized".format(lc_state),
         src = "//hw/ip/otp_ctrl/data:otp_json_{}".format(lc_state),
-        overlays = MANUF_PERSONALIZED,
+        overlays = [
+            "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
+            ":alert_digest_cfg",
+            ":otp_json_creator_sw_cfg",
+            ":otp_json_owner_sw_cfg",
+            "//hw/ip/otp_ctrl/data:otp_json_hw_cfg0",
+            "//hw/ip/otp_ctrl/data:otp_json_hw_cfg1",
+            "//hw/ip/otp_ctrl/data:otp_json_secret1",
+            "//hw/ip/otp_ctrl/data:otp_json_fixed_secret2",
+        ] + OTP_SIGVERIFY_REAL_KEYS,
     )
     for lc_state, _ in LC_MISSION_STATES
 ]
-
-otp_image(
-    name = "otp_img_dev_manuf_personalized_enable_rv_dm_late_debug_enable",
-    src = "//hw/ip/otp_ctrl/data:otp_json_dev",
-    overlays = MANUF_PERSONALIZED + [":otp_json_hw_cfg1_enable_rv_dm_late_debug"],
-)
-
-# `MANUF_PERSONALIZED` configuration for RMA. Only available in secure environments.
-otp_image(
-    name = "otp_img_rma_manuf_personalized",
-    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
-    overlays = MANUF_PERSONALIZED,
-)
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/BUILD b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/BUILD
new file mode 100644
index 0000000000000..22c3a950edd15
--- /dev/null
+++ b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/BUILD
@@ -0,0 +1,72 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:signing.bzl", "keyset")
+load("//rules:const.bzl", "CONST")
+load(
+    "//rules:otp.bzl",
+    "otp_hex",
+    "otp_json_rot_keys",
+    "otp_partition",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+keyset(
+    name = "keyset",
+    build_setting_default = "",
+    keys = {
+        "sv00-earlgrey-a1-root-ecdsa-prod-0.pub.der": "sv00-earlgrey-a1-root-ecdsa-prod-0",
+        "sv00-earlgrey-a1-root-ecdsa-prod-1.pub.der": "sv00-earlgrey-a1-root-ecdsa-prod-1",
+        "sv00-earlgrey-a1-root-ecdsa-prod-2.pub.der": "sv00-earlgrey-a1-root-ecdsa-prod-2",
+        "sv00-earlgrey-a1-root-ecdsa-test-0.pub.der": "sv00-earlgrey-a1-root-ecdsa-test-0",
+    },
+    profile = "earlgrey_a1_sival_root",
+    tool = "//signing:token",
+)
+
+keyset(
+    name = "endorsement",
+    build_setting_default = "",
+    keys = {
+        "sv00-earlgrey-a1-ca-dice-0.pub.der": "sv00-earlgrey-a1-ca-dice-0",
+    },
+    profile = "earlgrey_a1_sival_root",
+    tool = "//signing:token",
+)
+
+otp_json_rot_keys(
+    name = "ecdsa_root_keys",
+    partitions = [
+        otp_partition(
+            name = "ROT_CREATOR_AUTH_CODESIGN",
+            items = {
+                # sv00-earlgrey-a1-root-ecdsa-prod-0.pub.der
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE0": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY0": "0x112eb53614cd78573bfb44005f1f81f71ad8bc614f9b1f0848650d82b6cbbebac48c696274cbb86ede569ca56444702e91e7b09d661f560151ea3f688aa047bb",
+
+                # sv00-earlgrey-a1-root-ecdsa-prod-1.pub.der
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE1": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY1": "0x8f522f2bcf8ca3f443d70b86f2479b3cc73d4c1384363edc38cf545ad6aaf46d2a7f529f489446e9d29e7624af46824f2964ca991cd5c4d84adc632bc436fc3d",
+
+                # sv00-earlgrey-a1-root-ecdsa-prod-2.pub.der
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE2": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY2": "0x1295b177eaec69f04c421e8f58bb55f89c8001ba1c3e5f45bec154fb25136e20bde6d117d7ff3af127348cb63574ccc3da8a1db44660350908384089a7948feb",
+
+                # sv00-earlgrey-a1-root-ecdsa-test-0.pub.der
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE3": otp_hex(CONST.SIGVERIFY.KEY_TYPE.TEST),
+                "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY3": "0x39dc04654afd697af53f530a3806de08f4d513f4e7bdb33ede83bf38960005ea3b4c161ce2acf000babd10689f8da3a3132eff0b3bbdf26acacaa3d3473d006d",
+            },
+        ),
+        otp_partition(
+            name = "ROT_CREATOR_AUTH_STATE",
+            items = {
+                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY0": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
+                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY1": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
+                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY2": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
+                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY3": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
+            },
+        ),
+    ],
+)
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-ca-dice-0.pub.der b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-ca-dice-0.pub.der
new file mode 100644
index 0000000000000..ced0d17365fb0
Binary files /dev/null and b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-ca-dice-0.pub.der differ
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-0.pub.der b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-0.pub.der
new file mode 100644
index 0000000000000..34f370bb0a486
Binary files /dev/null and b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-0.pub.der differ
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-1.pub.der b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-1.pub.der
new file mode 100644
index 0000000000000..3550043886148
Binary files /dev/null and b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-1.pub.der differ
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-2.pub.der b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-2.pub.der
new file mode 100644
index 0000000000000..9d9c3fd94af49
Binary files /dev/null and b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-prod-2.pub.der differ
diff --git a/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-test-0.pub.der b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-test-0.pub.der
new file mode 100644
index 0000000000000..a3b8f5de1fc7f
Binary files /dev/null and b/hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys/sv00-earlgrey-a1-root-ecdsa-test-0.pub.der differ
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl.hjson b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
index 3d426cf44e275..44844724b52a8 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl.hjson
@@ -43,7 +43,7 @@
     {
       version:            "2.0.0",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
       notes:              "",
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl.hjson.tpl b/hw/ip/otp_ctrl/data/otp_ctrl.hjson.tpl
index b03935e6a78be..f9e96a5c05193 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl.hjson.tpl
+++ b/hw/ip/otp_ctrl/data/otp_ctrl.hjson.tpl
@@ -53,7 +53,7 @@ otp_size_as_uint32 = otp_size_as_bytes // 4
     {
       version:            "2.0.0",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
       notes:              "",
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl_img.c.tpl b/hw/ip/otp_ctrl/data/otp_ctrl_img.c.tpl
index 7da66c2c58cb9..5c370cf0ff9ce 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl_img.c.tpl
+++ b/hw/ip/otp_ctrl/data/otp_ctrl_img.c.tpl
@@ -64,7 +64,13 @@ ${fileheader}
       raise f"Invalid alignment: {alignment}"
 
     base_declaration = f"const {type_str} {ToConstLabelValue(item['name'])}"
-    if item["name"] != "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG":
+    if item['name'] not in [
+        'CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN',
+        'CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG',
+        'CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG',
+        'CREATOR_SW_CFG_MANUF_STATE',
+        'OWNER_SW_CFG_ROM_BOOTSTRAP_DIS',
+    ]:
       base_declaration = "static " + base_declaration
 
     if item["num_items"] == 1:
@@ -100,8 +106,7 @@ ${fileheader}
 // OTP values
 % for partition_name in data:
 <%
-  if len(data[partition_name]["items"]) == 0:
-    continue
+  assert(len(data[partition_name]["items"]))
   alignment = data[partition_name]["alignment"]
 %>
 // Partition ${partition_name} values
@@ -114,8 +119,7 @@ ${ConstTypeDefinition(item, data[partition_name]["alignment"])}
 
 % for partition_name in data:
 <%
-  if len(data[partition_name]["items"]) == 0:
-    continue
+  assert(len(data[partition_name]["items"]))
   alignment = data[partition_name]["alignment"]
 %>
 // Partition ${partition_name}
@@ -124,7 +128,7 @@ const otp_kv_t ${"kOtpKv" + ToPascalCase(partition_name)}[] = {
   % for item in data[partition_name]["items"]:
   {
     .type = ${ToOtpValType(alignment)},
-    .offset = ${"OTP_CTRL_PARAM_" + item["name"] + "_OFFSET"},
+    .offset = ${"OTP_CTRL_PARAM_" + item["offset_name"]},
     .num_values = ${int(item["num_items"])},
     ${RefValue(item, alignment)},
   },
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson b/hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson
index 51d07920717c7..e899557319c51 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl_img_creator_sw_cfg.hjson
@@ -18,9 +18,8 @@
                 },
                 {
                     name: "CREATOR_SW_CFG_SIGVERIFY_SPX_EN",
-                    // Disable SPX+ signature verification. See the definitions
-                    // of `kSigverifySpxDisabledOtp` and
-                    // `kSigverifySpxEnabledOtp` in
+                    // Disable SPX+ signature verification. See the definition
+                    // of `kSigverifySpxDisabledOtp` in
                     // sw/device/silicon_creator/lib/sigverify/spx_verify.h.
                     value: "0x8d6c8c17",
                 },
diff --git a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
index 9d83e1912fa1b..8726a8b2aabbc 100644
--- a/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
+++ b/hw/ip/otp_ctrl/data/otp_ctrl_mmap.hjson
@@ -114,127 +114,302 @@
             items: [
                 {
                     name: "CREATOR_SW_CFG_AST_CFG",
-                    size: "156"
+                    size: "156",
+                    desc: '''
+                    AST configuration data. These values get blindly copied to
+                    the AST CSRs during ROM execution.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_AST_INIT_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Controls whether or not the CREATOR_SW_CFG_AST_CFG values
+                    get copied to the AST CSRs during ROM execution.
+                    A value of kMultiBitBool4True enables copying; all other
+                    values disable.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_ROM_EXT_SKU",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    SKU identifier metadata. Unused by SiliconCreator software.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_SIGVERIFY_SPX_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Controls whether or not SPHINCS+ signature verification will
+                    be executed when the ROM attempts to boot the ROM_EXT.
+                    A value of kSigverifySpxDisabledOtp disables SPHINCS+
+                    signature verification, while all other values enable it.
+                    Note, SPHINCS+ signature verification is always disabled in
+                    TEST_UNLOCKED* LC states.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The default scrambling, ECC, and high endurance
+                    configuration settings for flash data pages set during ROM
+                    execution.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The scrambling, ECC, and high endurance configuration
+                    settings for the boot data flash info pages set during ROM
+                    execution.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Scrambling and ECC configuration overrides (set by the ROM)
+                    for the Creator and OwnerSeed flash info pages (pages 1 and
+                    2 in partition 0) that are hardwired to the keygmr. By
+                    default, scrambling and ECC on these flash info pages must
+                    be enabled in order to successfully crank the keygmr (in the
+                    ROM_EXT). However, values of kMultiBitBool4True for each
+                    subfield in this field will disable this requirement. See
+                    the HW_INFO_CFG_OVERRIDE flash_ctrl CSR for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to enable use of hardware generated entropy
+                    (from the entropy complex via EDN) in the `rnd_uint32`
+                    function. A value of kHardenedBoolTrue enables the use of
+                    hardware generated entropy, while all other values disable.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_JITTER_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to enable clock jitter. A value of
+                    kMultiBitBool4False disables, while all other values enable.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RET_RAM_RESET_MASK",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Reset reason mask used to initialize (by overwriting with
+                    random data) retention SRAM during ROM execution. A value of
+                    0 only initializes retention SRAM on power-on-resets.See
+                    rstmgr RESET_INFO CSR documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_MANUF_STATE",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Manufacturing state binding field. For use by
+                    SiliconCreators or SiliconOwners to bind ROM_EXT images to a
+                    specific device or set of devices.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_ROM_EXEC_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to enable execution of ROM. A value of 0
+                    disables, while all other values enable. This enables
+                    provisioning flows to attach JTAG connections and halt the
+                    CPU before the device has been fully provisioned. All SKUs
+                    should set this field to a non-zero value. Provisioning
+                    flows shall take care to program this field at the
+                    appropriate time during.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_CPUCTRL",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Value to write to the Ibex CPUCTRL CSR during ROM execution.
+                    This field controls settings such as ICACHE enablement. See
+                    Ibex documentation for more information.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_MIN_SEC_VER_ROM_EXT",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Value of the min_security_version_rom_ext field of the
+                    default boot data.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_MIN_SEC_VER_BL0",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Value of the min_security_version_bl0 field of the
+                    default boot data.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_DEFAULT_BOOT_DATA_IN_PROD_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to enable the default boot data in PROD and
+                    PROD_END life cycle states. A value of kHardenedBoolTrue
+                    enables, all other values disable. If left disabled,
+                    provisioning flows are required to setup boot data pages
+                    prior to enabling ROM execution. The default personalization
+                    flow in `ft_personalize.c` configures these pages.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RMA_SPIN_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to enable a busy-wait delay loop in the ROM,
+                    when a specific SW strapping configuration is applied during
+                    boot, to provide time to trigger an RMA lifecycle transition
+                    over JTAG. A value of kHardenedBoolTrue enables, all other
+                    values disable.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RMA_SPIN_CYCLES",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The number of Ibex clock cycles to spin for when waiting for
+                    an RMA transition. Used in combination with the
+                    CREATOR_SW_CFG_RMA_SPIN_EN field.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_REPCNT_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The repetition count health test thresholds to enable
+                    entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_REPCNTS_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The repetition count symbol health test thresholds to enable
+                    entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_ADAPTP_HI_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The adaptive proportion health test high thresholds to
+                    enable entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_ADAPTP_LO_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The adaptive proportion health test low thresholds to enable
+                    entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_BUCKET_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The bucket health test thresholds to enable entropy_src with
+                    during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_MARKOV_HI_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The Markov health test high thresholds to enable entropy_src
+                    with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_MARKOV_LO_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The Markov health test low thresholds to enable entropy_src
+                    with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_EXTHT_HI_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The external health test high thresholds to enable the
+                    entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_EXTHT_LO_THRESHOLDS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The external health test low thresholds to enable the
+                    entropy_src with during ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_ALERT_THRESHOLD",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The alert threshold to configure the entropy_src with during
+                    ROM execution.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RNG_HEALTH_CONFIG_DIGEST",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    A CRC32 digest of all entropy_src health test threshold
+                    configuration fields above.
+                    This must be configured if CREATOR_SW_CFG_RNG_EN is true.
+                    See entropy_src documentation for more details.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_SRAM_KEY_RENEW_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not the ROM should request SRAM to be rescrambled
+                    with a new key on every boot. kHardenedBoolFalse disables,
+                    while all other values enable.
+                    '''
                 }
                 {
                     name: "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN",
-                    size: "4"
+                    size: "4",
                     desc: '''
                     Enablement of the ROM_EXT immutable code section.
                     A value of kHardenedBoolTrue enables the feature.
@@ -243,7 +418,7 @@
                 }
                 {
                     name: "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_START_OFFSET",
-                    size: "4"
+                    size: "4",
                     desc: '''
                     Relative offset from the start of the ROM_EXT slot to
                     find the immutable code section at.
@@ -251,26 +426,30 @@
                 }
                 {
                     name: "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_LENGTH",
-                    size: "4"
+                    size: "4",
                     desc: '''
                     Length (in bytes) of the immutable code section.
                     '''
                 }
                 {
                     name: "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH",
-                    size: "32"
+                    size: "32",
                     desc: '''
                     SHA256 hash of the immutable ROM_EXT section.
                     '''
                 }
                 {
                     name: "CREATOR_SW_CFG_RESERVED",
-                    size: "32"
+                    size: "32",
+                    desc: '''
+                    Unused bits in the CREATOR_SW_CFG OTP partition. These can
+                    be claimed by software as needed.
+                    '''
                 }
             ],
             desc: '''Software configuration partition.
-            This is for device-specific calibration data. For example, clock,
-            LDO, RNG.
+            This is for device-specific calibration data, e.g, clock, LDO, RNG,
+            and configuration settings set by the ROM.
             '''
         }
         {
@@ -288,93 +467,259 @@
             items: [
                 {
                     name: "OWNER_SW_CFG_ROM_ERROR_REPORTING",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    The shutdown error reporting verbosity used by the ROM.
+                    Should be configured to one of several
+                    `shutdown_error_redact_t` values. See
+                    `sw/device/silicon_creator/lib/shutdown.h` for more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_BOOTSTRAP_DIS",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to disable ROM bootstrap mechanism. A value
+                    of kHardenedBoolTrue disable bootstrap mechanism in the ROM,
+                    while all other values enable it. Note, the provisioning
+                    flow should take care when to program this field if it is
+                    used by a SKU, as there is no way to get firmware into flash
+                    in a PROD LC state if a valid ROM_EXT does not already exist
+                    in flash once this value is configured to true.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_CLASS_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    A four byte packed field, where each byte controls whether
+                    or not the ROM enables each alert class (A through D) of the
+                    alert_handler. The byte-sized subfields are arranged from D
+                    to A, MSB to LSB. Each byte should be set to an
+                    `alert_enable_t` value accordingly. See the alert_handler
+                    documentation for more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_ESCALATION",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    A four byte packed field, where each byte controls the
+                    escalation configuration for each alert class (A through D)
+                    of the alert_handler configured by the ROM. The byte-sized
+                    subfields are arranged from D to A, MSB to LSB. Each byte
+                    should be set to an `alert_escalate_t` value accordingly.
+                    See the alert_handler documentation for more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION",
-                    size: "320"
+                    size: "320",
+                    desc: '''
+                    The alert classifications (A through D) for each alert
+                    source of the alert_handler to be configured by the ROM. The
+                    field consists of a contiguous 320-byte block, or 80 32-bit
+                    words. The four bytes in each word encode the configuration
+                    of a single alert source across four lifecycle states, in
+                    order from LSB to MSB: PROD, PROD_END, DEV, and RMA. Each
+                    byte should be set to an `alert_class_t` value accordingly.
+                    The order of the 80 32-bit words, from LSB to MSB can be
+                    found in the EARLGREY_ALERTS list in `rules/const.bzl`.
+                    See the alert_handler documentation for more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_LOCAL_ALERT_CLASSIFICATION",
-                    size: "64"
+                    size: "64",
+                    desc: '''
+                    Same as the `OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION` field,
+                    except these configuration correspond to the local alert
+                    sources found in the `EARLGREY_LOC_ALERTS list in
+                    `rules/const.bzl`.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH",
-                    size: "16"
+                    size: "16",
+                    desc: '''
+                    The alert accumulation threshold values for each alert class
+                    (A through D) of the alert_handler to be configured by the
+                    ROM. This field consists of four 32-bit words encoding the
+                    accumulation thresholds for each alert class A through D
+                    arranged LSW to MSW. See the alert_handler documentation for
+                    more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_TIMEOUT_CYCLES",
-                    size: "16"
+                    size: "16",
+                    desc: '''
+                    Same as the `OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH` field,
+                    except each value corresponds to the interrupt timeout
+                    configuration of an alert class.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_PHASE_CYCLES",
-                    size: "64"
+                    size: "64",
+                    desc: '''
+                    The alert escalation phase durations, measured in clock
+                    cycles, the ROM will configure the four alert phases for
+                    each alert class of the alert_handler. This field consists
+                    of a contiguous 64-byte block, or an array of four 128-bit
+                    fields. Each 128-bit subfield encodes four 32-bit words that
+                    contain the alert phase cycle count configurations for alert
+                    escalation phases 0 to 3, from LSW to MSW. Each 128-bit
+                    subfield is contains all cofigurations for a single alert
+                    class, arranged from class A to D, from LS to MS. For
+                    example, the cycle durations of each escalation phase in
+                    this field should be configured as such, from LSB to MSB:
+                    <classA,phase0>...<classA,phase3>...<classD,phase0>...
+                    <classD,phase3>. See the alert_handler documentation for
+                    more details.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD",
                     size: "4",
+                    desc: '''
+                    The expected CRC32 digest over all of the alert_handler
+                    configurations set up by the ROM for a device operating in
+                    the PROD LC state. The ROM reads this field and checks it
+                    against a digest it computes over the alert_handler
+                    configuration it programmed. This field is expected to be
+                    automatically computed by the `otp_alert_digest()` Bazel
+                    rule. See the `alert_config_crc32()` function in the
+                    SiliconCreator alert_handler driver for more details on what
+                    configurations are included in this digest.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD_END",
                     size: "4",
+                    desc: '''
+                    Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field,
+                    except the expected digest is for chips operating in the
+                    PROD_END LC state.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_DIGEST_DEV",
                     size: "4",
+                    desc: '''
+                    Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field,
+                    except the expected digest is for chips operating in the
+                    DEV LC state.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_ALERT_DIGEST_RMA",
                     size: "4",
+                    desc: '''
+                    Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field,
+                    except the expected digest is for chips operating in the
+                    RMA LC state.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Watchdog timer bite threshold (in cycles) configured by the ROM.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not to configure the attestation SW binding CSRs
+                    of the keymgr with the value in ROM_EXT manifest or the
+                    measurement of the OTP CreatorSwCfg, OwnerSwCfg, and
+                    secure boot key integrity digest. A value of
+                    kHardenedBoolTrue uses the ROM computed OTP measurements,
+                    while all other values trigger the use of the binding values
+                    included in the ROM_EXT manifest.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_MANUF_STATE",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Manufacturing state binding field. For use by
+                    SiliconCreators or SiliconOwners to bind BL0 images to a
+                    specific device or set of devices.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_RSTMGR_INFO_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    A two byte packed word that indicates the expected rstmgr
+                    alert and CPU info dump enable states, configured in the
+                    rstmgr's ALERT_INFO_CTRL and CPU_INFO_CTRL CSRs respectively.
+                    The expected format of this fields is
+                    {0,0,kHardenedBool*,kHardenedBool*}, read MSB to LSB, where
+                    the left most kHardenedBool* entry indicates the expected
+                    enablement state of the ALERT_INFO_CTRL, and the right most
+                    indicates the enablement state of the CPU_INFO_CTRL. Since
+                    the ROM expects both to be disabled upon handing over
+                    execution control to the ROM_EXT, this entire OTP field
+                    **should be left unprovisioned, or set to all 0**.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Unused. Set to 0.
+                    '''
                 }
                 {
                     // Datatype: packed bytes per alert.  Each byte is a pair
                     // of Mubi4: [Recoverable, Enabled].
                     name: "OWNER_SW_CFG_ROM_SENSOR_CTRL_ALERT_CFG",
-                    size: "12" // 2 settings per alert (disabled, fatal), 4 bit per setting, space for 12 alerts (currently 11 used)
+                    size: "12",
+                    desc: '''
+                    Alert configuration values for the sensor_ctrl block
+                    that will be configured by the ROM. This field is 12 bytes
+                    long, where each byte contains two 4-bit packed subfields,
+                    encoding two four bit boolean values (kMultiBitBool4False or
+                    kMultiBitBool4True), as follows (read MSB to LSB):
+                    {fatality, enablement}. For example, the byte 0x69 would
+                    encode the alert is: 1) recoverable, and 2) disabled.
+
+                    Currently, there are only 11 alerts in sensor_ctrl to
+                    configure, thus only the least significant bytes in this
+                    field are used.
+                    '''
                 }
                 {
                     // Datatype: Two packed Mubi4s:
                     // [ret-ram readback enable][main sram readback en].
                     name: "OWNER_SW_CFG_ROM_SRAM_READBACK_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    This field encodes the enablements of the readback security
+                    features for the main and retention SRAMs to be configured
+                    by the ROM. This field is four bytes, but the LSB contains
+                    two 4-bit packed kMultiBitBool4* values that indicate the
+                    enablement of the feature for the retention SRAM and
+                    main SRAM, from MSB to LSB respectively. See the READBACK
+                    CSR of the sram_ctrl for more details on this feature.
+                    '''
                 }
                 {
                     // Datatype: hardened_bool_t.
                     // True preserves, all other values default behavior.
                     name: "OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not the ROM should preserve the reset reasons CSR
+                    state in the rstmgr, or clear it. A value of
+                    kHardenedBoolTrue preserves the CSR, while other values
+                    trigger the ROM to clear the CSR after copying the reason to
+                    the retention SRAM.
+                    '''
                 }
                 {
                     // Datatype: 2x16-bit hardened_bool_t values.
@@ -384,23 +729,55 @@
                     // If the value is any other value and the reset reason validation
                     // fails, the chip will fault during bootup.
                     name: "OWNER_SW_CFG_ROM_RESET_REASON_CHECK_VALUE",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Two packed 16-bit values that indicate whether the ROM
+                    should perform a validation check on the the reset reasons
+                    during boot. The validation check is a hardening mechanism
+                    that checks the reset reasons for consistency at two
+                    different points in time. Both packed values should be the
+                    same. Values of kHardenedBoolFalse will instruct the ROM to
+                    skip the reset reasons validation check, while all other
+                    values will instruct the ROM to perform the check.
+                    '''
                 }
                 {
                     // Datatype: hardened_bool_t.
                     // False disables, all other values default behavior.
                     name: "OWNER_SW_CFG_ROM_BANNER_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not the ROM should print a banner message to the
+                    console UART during boot. A value of kHardenedBoolFalse
+                    disables the message printing, while all other values enable
+                    it.
+                    '''
                 }
                 {
                     // Datatype: hardended_bool_t
                     // True enables, all other values default behavior.
                     name: "OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN",
-                    size: "4"
+                    size: "4",
+                    desc: '''
+                    Whether or not the ROM should use the flash ECC exception
+                    handler during execution. A value of kHardenedBoolTrue
+                    allows the ROM to use an the exception handler that recovers
+                    gracefully and continues the boot process if a flash ECC
+                    error is encountered during verification of a specific
+                    ROM_EXT slot. This enables the ROM to attempt booting the
+                    next ROM_EXT slot if the first slot attempted has been
+                    corrupted. All other values trigger default ROM exception
+                    handling, which is all exceptions trigger a chip shutdown
+                    and reset.
+                    '''
                 }
                 {
                     name: "OWNER_SW_CFG_RESERVED",
-                    size: "128"
+                    size: "128",
+                    desc: '''
+                    Unused bits in the OWNER_SW_CFG OTP partition. These can be
+                    claimed by software as needed.
+                    '''
                 }
             ],
             desc: '''Software configuration partition.
@@ -596,17 +973,24 @@
                     // initialized or is in error state. If not specified,
                     // a value of '0 will be used.
                     inv_default: "<random>",
+                    desc: '''
+                    Unique device identifier that is always exposed through the
+                    lifecycle JTAG tap. See OpenTitan documentation on Device
+                    Identifiers.
+                    '''
                 },
                 {
                     name:        "MANUF_STATE",
                     size:        "32",
                     inv_default: "<random>",
+                    desc: '''
+                    Field to capture manufacturing status. Currently unused. Set
+                    to 0.
+                    '''
                 },
             ],
             desc: '''Hardware configuration 0 partition.
-            This contains
-            - DEVICE_ID: Unique device identifier.
-            - MANUF_STATE: Vector for capturing the manufacturing status.
+            This contains a device identifier and manufacturing state.
             '''
         }
         {
@@ -625,28 +1009,41 @@
                     name:        "EN_SRAM_IFETCH",
                     size:        "1",
                     ismubi:      true,
-                    inv_default: false
+                    inv_default: false,
+                    desc: '''
+                    Enablement of execute from SRAM switch in the sram_ctrl (see
+                    EXEC CSR). A kMultiBitBool8True value enables, while all
+                    other values disable.
+                    '''
                 },
                 {
                     name:        "EN_CSRNG_SW_APP_READ",
                     size:        "1",
                     ismubi:      true,
-                    inv_default: false
+                    inv_default: false,
+                    desc: '''
+                    Enablement of CSRNG software application interface. A
+                    kMultiBitBool8True value enables, while all other values
+                    disable. Enablement is required to extract output from
+                    CSRNG via software.
+                    '''
                 },
                 {
                     name:        "DIS_RV_DM_LATE_DEBUG",
                     size:        "1",
                     ismubi:      true,
-                    inv_default: false
+                    inv_default: false,
+                    desc: '''
+                    Disablement of RV_DM late debug feature (see rv_dm
+                    documentation). A kMultiBitBool8True disables the late debug
+                    feature and renders the rv_dm fully ungated in DEV lifecycle
+                    states. All other values gate rv_dm reachability based on
+                    the value of LATE_DEBUG_ENABLE CSR in the rv_dm block.
+                    '''
                 },
             ],
             desc: '''Hardware configuration 1 partition.
-            This contains
-            - EN_SRAM_IFETCH: Enable / disable execute from SRAM CSR switch.
-            - EN_CSRNG_SW_APP_READ: This input efuse is used to enable access to the
-              NIST internal state per instance.
-            - DIS_RV_DM_LATE_DEBUG: Setting this to true bypasses the late debug
-              enablement of RV_DM in the DEV life cycle state.
+            This contains several hardware feature switches.
             '''
         }
         {
diff --git a/hw/ip/otp_ctrl/doc/checklist.md b/hw/ip/otp_ctrl/doc/checklist.md
index 5554f2328490e..1fab63e8fa9b4 100644
--- a/hw/ip/otp_ctrl/doc/checklist.md
+++ b/hw/ip/otp_ctrl/doc/checklist.md
@@ -102,15 +102,15 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 --------------|-------------------------|-------------|------------------
 Documentation | [NEW_FEATURES_D3][]     | Done        |
 RTL           | [TODO_COMPLETE][]       | Done        |
-Code Quality  | [LINT_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | Waiver files approved by TC on 2024-08-08.
 Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
 Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_RTL][]          | Done        |
 Review        | [REVIEW_DELETED_FF][]   | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_SW_CHANGE][]    | Done        |
 Review        | [REVIEW_SW_ERRATA][]    | Done        |
-Review        | Reviewer(s)             | Done        | msf@ gac@ chencindy@ awill@
-Review        | Signoff date            | Done        | 2022-06-27
+Review        | Reviewer(s)             | Done        | adk@ vogelpi@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/ip/otp_ctrl/doc/otp_ctrl_field_descriptions.md b/hw/ip/otp_ctrl/doc/otp_ctrl_field_descriptions.md
new file mode 100644
index 0000000000000..69d6a8aa9fc6e
--- /dev/null
+++ b/hw/ip/otp_ctrl/doc/otp_ctrl_field_descriptions.md
@@ -0,0 +1,101 @@
+<!--
+DO NOT EDIT THIS FILE DIRECTLY.
+It has been generated with ./util/design/gen-otp-mmap.py
+-->
+
+|         Partition         |                      Item                       |  Size [B]  | Description                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               |
+|:-------------------------:|:-----------------------------------------------:|:----------:|:------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------|
+|      CREATOR_SW_CFG       |             CREATOR_SW_CFG_AST_CFG              |    156     | AST configuration data. These values get blindly copied to the AST CSRs during ROM execution.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |           CREATOR_SW_CFG_AST_INIT_EN            |     4      | Controls whether or not the CREATOR_SW_CFG_AST_CFG values get copied to the AST CSRs during ROM execution. A value of kMultiBitBool4True enables copying; all other values disable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       |
+|                           |           CREATOR_SW_CFG_ROM_EXT_SKU            |     4      | SKU identifier metadata. Unused by SiliconCreator software.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               |
+|                           |         CREATOR_SW_CFG_SIGVERIFY_SPX_EN         |     4      | Controls whether or not SPHINCS+ signature verification will be executed when the ROM attempts to boot the ROM_EXT. A value of kSigverifySpxDisabledOtp disables SPHINCS+ signature verification, while all other values enable it. Note, SPHINCS+ signature verification is always disabled in TEST_UNLOCKED* LC states.                                                                                                                                                                                                                                                                                                                                                                                                                                                                 |
+|                           |      CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG      |     4      | The default scrambling, ECC, and high endurance configuration settings for flash data pages set during ROM execution.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     |
+|                           |     CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG     |     4      | The scrambling, ECC, and high endurance configuration settings for the boot data flash info pages set during ROM execution.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               |
+|                           |    CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE    |     4      | Scrambling and ECC configuration overrides (set by the ROM) for the Creator and OwnerSeed flash info pages (pages 1 and 2 in partition 0) that are hardwired to the keygmr. By default, scrambling and ECC on these flash info pages must be enabled in order to successfully crank the keygmr (in the ROM_EXT). However, values of kMultiBitBool4True for each subfield in this field will disable this requirement. See the HW_INFO_CFG_OVERRIDE flash_ctrl CSR for more details.                                                                                                                                                                                                                                                                                                       |
+|                           |              CREATOR_SW_CFG_RNG_EN              |     4      | Whether or not to enable use of hardware generated entropy (from the entropy complex via EDN) in the `rnd_uint32` function. A value of kHardenedBoolTrue enables the use of hardware generated entropy, while all other values disable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   |
+|                           |            CREATOR_SW_CFG_JITTER_EN             |     4      | Whether or not to enable clock jitter. A value of kMultiBitBool4False disables, while all other values enable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           |        CREATOR_SW_CFG_RET_RAM_RESET_MASK        |     4      | Reset reason mask used to initialize (by overwriting with random data) retention SRAM during ROM execution. A value of 0 only initializes retention SRAM on power-on-resets.See rstmgr RESET_INFO CSR documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     |
+|                           |           CREATOR_SW_CFG_MANUF_STATE            |     4      | Manufacturing state binding field. For use by SiliconCreators or SiliconOwners to bind ROM_EXT images to a specific device or set of devices.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |           CREATOR_SW_CFG_ROM_EXEC_EN            |     4      | Whether or not to enable execution of ROM. A value of 0 disables, while all other values enable. This enables provisioning flows to attach JTAG connections and halt the CPU before the device has been fully provisioned. All SKUs should set this field to a non-zero value. Provisioning flows shall take care to program this field at the appropriate time during.                                                                                                                                                                                                                                                                                                                                                                                                                   |
+|                           |             CREATOR_SW_CFG_CPUCTRL              |     4      | Value to write to the Ibex CPUCTRL CSR during ROM execution. This field controls settings such as ICACHE enablement. See Ibex documentation for more information.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |       CREATOR_SW_CFG_MIN_SEC_VER_ROM_EXT        |     4      | Value of the min_security_version_rom_ext field of the default boot data.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 |
+|                           |         CREATOR_SW_CFG_MIN_SEC_VER_BL0          |     4      | Value of the min_security_version_bl0 field of the default boot data.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     |
+|                           |   CREATOR_SW_CFG_DEFAULT_BOOT_DATA_IN_PROD_EN   |     4      | Whether or not to enable the default boot data in PROD and PROD_END life cycle states. A value of kHardenedBoolTrue enables, all other values disable. If left disabled, provisioning flows are required to setup boot data pages prior to enabling ROM execution. The default personalization flow in `ft_personalize.c` configures these pages.                                                                                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |           CREATOR_SW_CFG_RMA_SPIN_EN            |     4      | Whether or not to enable a busy-wait delay loop in the ROM, when a specific SW strapping configuration is applied during boot, to provide time to trigger an RMA lifecycle transition over JTAG. A value of kHardenedBoolTrue enables, all other values disable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |         CREATOR_SW_CFG_RMA_SPIN_CYCLES          |     4      | The number of Ibex clock cycles to spin for when waiting for an RMA transition. Used in combination with the CREATOR_SW_CFG_RMA_SPIN_EN field.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           |      CREATOR_SW_CFG_RNG_REPCNT_THRESHOLDS       |     4      | The repetition count health test thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    |
+|                           |      CREATOR_SW_CFG_RNG_REPCNTS_THRESHOLDS      |     4      | The repetition count symbol health test thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |     CREATOR_SW_CFG_RNG_ADAPTP_HI_THRESHOLDS     |     4      | The adaptive proportion health test high thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           |     CREATOR_SW_CFG_RNG_ADAPTP_LO_THRESHOLDS     |     4      | The adaptive proportion health test low thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |      CREATOR_SW_CFG_RNG_BUCKET_THRESHOLDS       |     4      | The bucket health test thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              |
+|                           |     CREATOR_SW_CFG_RNG_MARKOV_HI_THRESHOLDS     |     4      | The Markov health test high thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |     CREATOR_SW_CFG_RNG_MARKOV_LO_THRESHOLDS     |     4      | The Markov health test low thresholds to enable entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |     CREATOR_SW_CFG_RNG_EXTHT_HI_THRESHOLDS      |     4      | The external health test high thresholds to enable the entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                   |
+|                           |     CREATOR_SW_CFG_RNG_EXTHT_LO_THRESHOLDS      |     4      | The external health test low thresholds to enable the entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    |
+|                           |       CREATOR_SW_CFG_RNG_ALERT_THRESHOLD        |     4      | The alert threshold to configure the entropy_src with during ROM execution. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                     |
+|                           |     CREATOR_SW_CFG_RNG_HEALTH_CONFIG_DIGEST     |     4      | A CRC32 digest of all entropy_src health test threshold configuration fields above. This must be configured if CREATOR_SW_CFG_RNG_EN is true. See entropy_src documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |        CREATOR_SW_CFG_SRAM_KEY_RENEW_EN         |     4      | Whether or not the ROM should request SRAM to be rescrambled with a new key on every boot. kHardenedBoolFalse disables, while all other values enable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                    |
+|                           |       CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN       |     4      | Enablement of the ROM_EXT immutable code section. A value of kHardenedBoolTrue enables the feature. All other values disable it.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |  CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_START_OFFSET  |     4      | Relative offset from the start of the ROM_EXT slot to find the immutable code section at.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 |
+|                           |     CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_LENGTH     |     4      | Length (in bytes) of the immutable code section.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |  CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH   |     32     | SHA256 hash of the immutable ROM_EXT section.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |             CREATOR_SW_CFG_RESERVED             |     32     | Unused bits in the CREATOR_SW_CFG OTP partition. These can be claimed by software as needed.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              |
+|       OWNER_SW_CFG        |        OWNER_SW_CFG_ROM_ERROR_REPORTING         |     4      | The shutdown error reporting verbosity used by the ROM. Should be configured to one of several `shutdown_error_redact_t` values. See `sw/device/silicon_creator/lib/shutdown.h` for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |         OWNER_SW_CFG_ROM_BOOTSTRAP_DIS          |     4      | Whether or not to disable ROM bootstrap mechanism. A value of kHardenedBoolTrue disable bootstrap mechanism in the ROM, while all other values enable it. Note, the provisioning flow should take care when to program this field if it is used by a SKU, as there is no way to get firmware into flash in a PROD LC state if a valid ROM_EXT does not already exist in flash once this value is configured to true.                                                                                                                                                                                                                                                                                                                                                                      |
+|                           |         OWNER_SW_CFG_ROM_ALERT_CLASS_EN         |     4      | A four byte packed field, where each byte controls whether or not the ROM enables each alert class (A through D) of the alert_handler. The byte-sized subfields are arranged from D to A, MSB to LSB. Each byte should be set to an `alert_enable_t` value accordingly. See the alert_handler documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
+|                           |        OWNER_SW_CFG_ROM_ALERT_ESCALATION        |     4      | A four byte packed field, where each byte controls the escalation configuration for each alert class (A through D) of the alert_handler configured by the ROM. The byte-sized subfields are arranged from D to A, MSB to LSB. Each byte should be set to an `alert_escalate_t` value accordingly. See the alert_handler documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                   |
+|                           |      OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION      |    320     | The alert classifications (A through D) for each alert source of the alert_handler to be configured by the ROM. The field consists of a contiguous 320-byte block, or 80 32-bit words. The four bytes in each word encode the configuration of a single alert source across four lifecycle states, in order from LSB to MSB: PROD, PROD_END, DEV, and RMA. Each byte should be set to an `alert_class_t` value accordingly. The order of the 80 32-bit words, from LSB to MSB can be found in the EARLGREY_ALERTS list in `rules/const.bzl`. See the alert_handler documentation for more details.                                                                                                                                                                                        |
+|                           |   OWNER_SW_CFG_ROM_LOCAL_ALERT_CLASSIFICATION   |     64     | Same as the `OWNER_SW_CFG_ROM_ALERT_CLASSIFICATION` field, except these configuration correspond to the local alert sources found in the `EARLGREY_LOC_ALERTS list in `rules/const.bzl`.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  |
+|                           |       OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH       |     16     | The alert accumulation threshold values for each alert class (A through D) of the alert_handler to be configured by the ROM. This field consists of four 32-bit words encoding the accumulation thresholds for each alert class A through D arranged LSW to MSW. See the alert_handler documentation for more details.                                                                                                                                                                                                                                                                                                                                                                                                                                                                    |
+|                           |      OWNER_SW_CFG_ROM_ALERT_TIMEOUT_CYCLES      |     16     | Same as the `OWNER_SW_CFG_ROM_ALERT_ACCUM_THRESH` field, except each value corresponds to the interrupt timeout configuration of an alert class.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |       OWNER_SW_CFG_ROM_ALERT_PHASE_CYCLES       |     64     | The alert escalation phase durations, measured in clock cycles, the ROM will configure the four alert phases for each alert class of the alert_handler. This field consists of a contiguous 64-byte block, or an array of four 128-bit fields. Each 128-bit subfield encodes four 32-bit words that contain the alert phase cycle count configurations for alert escalation phases 0 to 3, from LSW to MSW. Each 128-bit subfield is contains all cofigurations for a single alert class, arranged from class A to D, from LS to MS. For example, the cycle durations of each escalation phase in this field should be configured as such, from LSB to MSB: <classA,phase0>...<classA,phase3>...<classD,phase0>... <classD,phase3>. See the alert_handler documentation for more details. |
+|                           |       OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD        |     4      | The expected CRC32 digest over all of the alert_handler configurations set up by the ROM for a device operating in the PROD LC state. The ROM reads this field and checks it against a digest it computes over the alert_handler configuration it programmed. This field is expected to be automatically computed by the `otp_alert_digest()` Bazel rule. See the `alert_config_crc32()` function in the SiliconCreator alert_handler driver for more details on what configurations are included in this digest.                                                                                                                                                                                                                                                                         |
+|                           |     OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD_END      |     4      | Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field, except the expected digest is for chips operating in the PROD_END LC state.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                       |
+|                           |        OWNER_SW_CFG_ROM_ALERT_DIGEST_DEV        |     4      | Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field, except the expected digest is for chips operating in the DEV LC state.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           |        OWNER_SW_CFG_ROM_ALERT_DIGEST_RMA        |     4      | Same as the `OWNER_SW_CFG_ROM_ALERT_DIGEST_PROD` field, except the expected digest is for chips operating in the RMA LC state.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           | OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES |     4      | Watchdog timer bite threshold (in cycles) configured by the ROM.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                          |
+|                           |       OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN       |     4      | Whether or not to configure the attestation SW binding CSRs of the keymgr with the value in ROM_EXT manifest or the measurement of the OTP CreatorSwCfg, OwnerSwCfg, and secure boot key integrity digest. A value of kHardenedBoolTrue uses the ROM computed OTP measurements, while all other values trigger the use of the binding values included in the ROM_EXT manifest.                                                                                                                                                                                                                                                                                                                                                                                                            |
+|                           |            OWNER_SW_CFG_MANUF_STATE             |     4      | Manufacturing state binding field. For use by SiliconCreators or SiliconOwners to bind BL0 images to a specific device or set of devices.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 |
+|                           |         OWNER_SW_CFG_ROM_RSTMGR_INFO_EN         |     4      | A two byte packed word that indicates the expected rstmgr alert and CPU info dump enable states, configured in the rstmgr's ALERT_INFO_CTRL and CPU_INFO_CTRL CSRs respectively. The expected format of this fields is {0,0,kHardenedBool*,kHardenedBool*}, read MSB to LSB, where the left most kHardenedBool* entry indicates the expected enablement state of the ALERT_INFO_CTRL, and the right most indicates the enablement state of the CPU_INFO_CTRL. Since the ROM expects both to be disabled upon handing over execution control to the ROM_EXT, this entire OTP field **should be left unprovisioned, or set to all 0**.                                                                                                                                                      |
+|                           |        OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN        |     4      | Unused. Set to 0.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |     OWNER_SW_CFG_ROM_SENSOR_CTRL_ALERT_CFG      |     12     | Alert configuration values for the sensor_ctrl block that will be configured by the ROM. This field is 12 bytes long, where each byte contains two 4-bit packed subfields, encoding two four bit boolean values (kMultiBitBool4False or kMultiBitBool4True), as follows (read MSB to LSB): {fatality, enablement}. For example, the byte 0x69 would encode the alert is: 1) recoverable, and 2) disabled.  Currently, there are only 11 alerts in sensor_ctrl to configure, thus only the least significant bytes in this field are used.                                                                                                                                                                                                                                                 |
+|                           |        OWNER_SW_CFG_ROM_SRAM_READBACK_EN        |     4      | This field encodes the enablements of the readback security features for the main and retention SRAMs to be configured by the ROM. This field is four bytes, but the LSB contains two 4-bit packed kMultiBitBool4* values that indicate the enablement of the feature for the retention SRAM and main SRAM, from MSB to LSB respectively. See the READBACK CSR of the sram_ctrl for more details on this feature.                                                                                                                                                                                                                                                                                                                                                                         |
+|                           |    OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN    |     4      | Whether or not the ROM should preserve the reset reasons CSR state in the rstmgr, or clear it. A value of kHardenedBoolTrue preserves the CSR, while other values trigger the ROM to clear the CSR after copying the reason to the retention SRAM.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        |
+|                           |    OWNER_SW_CFG_ROM_RESET_REASON_CHECK_VALUE    |     4      | Two packed 16-bit values that indicate whether the ROM should perform a validation check on the the reset reasons during boot. The validation check is a hardening mechanism that checks the reset reasons for consistency at two different points in time. Both packed values should be the same. Values of kHardenedBoolFalse will instruct the ROM to skip the reset reasons validation check, while all other values will instruct the ROM to perform the check.                                                                                                                                                                                                                                                                                                                      |
+|                           |           OWNER_SW_CFG_ROM_BANNER_EN            |     4      | Whether or not the ROM should print a banner message to the console UART during boot. A value of kHardenedBoolFalse disables the message printing, while all other values enable it.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                      |
+|                           |    OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN    |     4      | Whether or not the ROM should use the flash ECC exception handler during execution. A value of kHardenedBoolTrue allows the ROM to use an the exception handler that recovers gracefully and continues the boot process if a flash ECC error is encountered during verification of a specific ROM_EXT slot. This enables the ROM to attempt booting the next ROM_EXT slot if the first slot attempted has been corrupted. All other values trigger default ROM exception handling, which is all exceptions trigger a chip shutdown and reset.                                                                                                                                                                                                                                             |
+|                           |              OWNER_SW_CFG_RESERVED              |    128     | Unused bits in the OWNER_SW_CFG OTP partition. These can be claimed by software as needed.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                |
+| ROT_CREATOR_AUTH_CODESIGN |    ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE0    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |      ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY0       |     64     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE1    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |      ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY1       |     64     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE2    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |      ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY2       |     64     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE3    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |      ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY3       |     64     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |     ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE0     |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |       ROT_CREATOR_AUTH_CODESIGN_SPX_KEY0        |     32     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG0    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |     ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE1     |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |       ROT_CREATOR_AUTH_CODESIGN_SPX_KEY1        |     32     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG1    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |     ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE2     |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |       ROT_CREATOR_AUTH_CODESIGN_SPX_KEY2        |     32     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG2    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |     ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE3     |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |       ROT_CREATOR_AUTH_CODESIGN_SPX_KEY3        |     32     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |    ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG3    |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |  ROT_CREATOR_AUTH_CODESIGN_BLOCK_SHA2_256_HASH  |     32     |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|  ROT_CREATOR_AUTH_STATE   |        ROT_CREATOR_AUTH_STATE_ECDSA_KEY0        |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |        ROT_CREATOR_AUTH_STATE_ECDSA_KEY1        |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |        ROT_CREATOR_AUTH_STATE_ECDSA_KEY2        |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |        ROT_CREATOR_AUTH_STATE_ECDSA_KEY3        |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |         ROT_CREATOR_AUTH_STATE_SPX_KEY0         |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |         ROT_CREATOR_AUTH_STATE_SPX_KEY1         |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |         ROT_CREATOR_AUTH_STATE_SPX_KEY2         |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|                           |         ROT_CREATOR_AUTH_STATE_SPX_KEY3         |     4      |                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                           |
+|          HW_CFG0          |                    DEVICE_ID                    |     32     | Unique device identifier that is always exposed through the lifecycle JTAG tap. See OpenTitan documentation on Device Identifiers.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        |
+|                           |                   MANUF_STATE                   |     32     | Field to capture manufacturing status. Currently unused. Set to 0.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                        |
+|          HW_CFG1          |                 EN_SRAM_IFETCH                  |     1      | Enablement of execute from SRAM switch in the sram_ctrl (see EXEC CSR). A kMultiBitBool8True value enables, while all other values disable.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               |
+|                           |              EN_CSRNG_SW_APP_READ               |     1      | Enablement of CSRNG software application interface. A kMultiBitBool8True value enables, while all other values disable. Enablement is required to extract output from CSRNG via software.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                 |
+|                           |              DIS_RV_DM_LATE_DEBUG               |     1      | Disablement of RV_DM late debug feature (see rv_dm documentation). A kMultiBitBool8True disables the late debug feature and renders the rv_dm fully ungated in DEV lifecycle states. All other values gate rv_dm reachability based on the value of LATE_DEBUG_ENABLE CSR in the rv_dm block.                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             |
diff --git a/hw/ip/otp_ctrl/doc/otp_ctrl_partitions.md b/hw/ip/otp_ctrl/doc/otp_ctrl_partitions.md
index 49bcdc89ad536..e19aad14717b8 100644
--- a/hw/ip/otp_ctrl/doc/otp_ctrl_partitions.md
+++ b/hw/ip/otp_ctrl/doc/otp_ctrl_partitions.md
@@ -3,62 +3,55 @@ DO NOT EDIT THIS FILE DIRECTLY.
 It has been generated with ./util/design/gen-otp-mmap.py
 -->
 
-|         Partition         |  Secret  |  Buffered  |  Integrity  |  WR Lockable  |  RD Lockable  | Description                                                              |
-|:-------------------------:|:--------:|:----------:|:-----------:|:-------------:|:-------------:|:-------------------------------------------------------------------------|
-|        VENDOR_TEST        |    no    |     no     |     no      | yes (Digest)  |   yes (CSR)   | Vendor test partition.                                                   |
-|                           |          |            |             |               |               | This is reserved for manufacturing smoke checks. The OTP wrapper         |
-|                           |          |            |             |               |               | control logic inside prim_otp is allowed to read/write to this           |
-|                           |          |            |             |               |               | region. ECC uncorrectable errors seen on the functional prim_otp         |
-|                           |          |            |             |               |               | interface will not lead to an alert for this partition.                  |
-|                           |          |            |             |               |               | Instead, such errors will be reported as correctable ECC errors.         |
-|      CREATOR_SW_CFG       |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | Software configuration partition.                                        |
-|                           |          |            |             |               |               | This is for device-specific calibration data. For example, clock,        |
-|                           |          |            |             |               |               | LDO, RNG.                                                                |
-|       OWNER_SW_CFG        |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | Software configuration partition.                                        |
-|                           |          |            |             |               |               | This contains data that changes software behavior in the ROM, for        |
-|                           |          |            |             |               |               | example enabling defensive features in ROM or selecting failure          |
-|                           |          |            |             |               |               | modes if verification fails.                                             |
-| ROT_CREATOR_AUTH_CODESIGN |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | This OTP partition is used to store four P-256 keys                      |
-|                           |          |            |             |               |               | and four Sphincs+ keys. The partition requires 464                       |
-|                           |          |            |             |               |               | bytes of software visible storage. The partition is                      |
-|                           |          |            |             |               |               | locked at manufacturing time to protect against                          |
-|                           |          |            |             |               |               | malicious write attempts.                                                |
-|  ROT_CREATOR_AUTH_STATE   |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | This OTP partition is used to capture the state of                       |
-|                           |          |            |             |               |               | each key slot. Each key can be in one of the                             |
-|                           |          |            |             |               |               | following states: BLANK, ENABLED, DISABLED. The                          |
-|                           |          |            |             |               |               | encoded values are such that transitions between                         |
-|                           |          |            |             |               |               | BLANK -> ENABLED ->  DISABLED are possible without                       |
-|                           |          |            |             |               |               | causing ECC errors (this is a mechanism similar to                       |
-|                           |          |            |             |               |               | how we manage life cycle state transitions). The                         |
-|                           |          |            |             |               |               | partition is left unlocked to allow STATE updates in                     |
-|                           |          |            |             |               |               | the field. The ROM_EXT is required to lock access to                     |
-|                           |          |            |             |               |               | the OTP Direct Access Interface to prevent DoS                           |
-|                           |          |            |             |               |               | attacks from malicious code executing on Silicon                         |
-|                           |          |            |             |               |               | Owner partitions. DAI write locking is available in                      |
-|                           |          |            |             |               |               | EarlGrey.                                                                |
-|          HW_CFG0          |    no    |    yes     |     yes     | yes (Digest)  |      no       | Hardware configuration 0 partition.                                      |
-|                           |          |            |             |               |               | This contains                                                            |
-|                           |          |            |             |               |               | - DEVICE_ID: Unique device identifier.                                   |
-|                           |          |            |             |               |               | - MANUF_STATE: Vector for capturing the manufacturing status.            |
-|          HW_CFG1          |    no    |    yes     |     yes     | yes (Digest)  |      no       | Hardware configuration 1 partition.                                      |
-|                           |          |            |             |               |               | This contains                                                            |
-|                           |          |            |             |               |               | - EN_SRAM_IFETCH: Enable / disable execute from SRAM CSR switch.         |
-|                           |          |            |             |               |               | - EN_CSRNG_SW_APP_READ: This input efuse is used to enable access to the |
-|                           |          |            |             |               |               | NIST internal state per instance.                                        |
-|                           |          |            |             |               |               | - DIS_RV_DM_LATE_DEBUG: Setting this to true bypasses the late debug     |
-|                           |          |            |             |               |               | enablement of RV_DM in the DEV life cycle state.                         |
-|          SECRET0          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 0.                                                      |
-|                           |          |            |             |               |               | This contains TEST lifecycle unlock tokens.                              |
-|          SECRET1          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 1.                                                      |
-|                           |          |            |             |               |               | This contains SRAM and flash scrambling keys.                            |
-|          SECRET2          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 2.                                                      |
-|                           |          |            |             |               |               | This contains RMA unlock token, creator root key, and creator seed.      |
-|        LIFE_CYCLE         |    no    |    yes     |     yes     |      no       |      no       | Lifecycle partition.                                                     |
-|                           |          |            |             |               |               | This contains lifecycle transition count and state. This partition       |
-|                           |          |            |             |               |               | cannot be locked since the life cycle state needs to advance to RMA      |
-|                           |          |            |             |               |               | in-field. Note that while this partition is not marked secret, it        |
-|                           |          |            |             |               |               | is not readable nor writeable via the DAI. Only the LC controller        |
-|                           |          |            |             |               |               | can access this partition, and even via the LC controller it is not      |
-|                           |          |            |             |               |               | possible to read the raw manufacturing life cycle state in encoded       |
-|                           |          |            |             |               |               | form, since that encoding is considered a netlist secret. The LC         |
-|                           |          |            |             |               |               | controller only exposes a decoded version of this state.                 |
+|         Partition         |  Secret  |  Buffered  |  Integrity  |  WR Lockable  |  RD Lockable  | Description                                                         |
+|:-------------------------:|:--------:|:----------:|:-----------:|:-------------:|:-------------:|:--------------------------------------------------------------------|
+|        VENDOR_TEST        |    no    |     no     |     no      | yes (Digest)  |   yes (CSR)   | Vendor test partition.                                              |
+|                           |          |            |             |               |               | This is reserved for manufacturing smoke checks. The OTP wrapper    |
+|                           |          |            |             |               |               | control logic inside prim_otp is allowed to read/write to this      |
+|                           |          |            |             |               |               | region. ECC uncorrectable errors seen on the functional prim_otp    |
+|                           |          |            |             |               |               | interface will not lead to an alert for this partition.             |
+|                           |          |            |             |               |               | Instead, such errors will be reported as correctable ECC errors.    |
+|      CREATOR_SW_CFG       |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | Software configuration partition.                                   |
+|                           |          |            |             |               |               | This is for device-specific calibration data, e.g, clock, LDO, RNG, |
+|                           |          |            |             |               |               | and configuration settings set by the ROM.                          |
+|       OWNER_SW_CFG        |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | Software configuration partition.                                   |
+|                           |          |            |             |               |               | This contains data that changes software behavior in the ROM, for   |
+|                           |          |            |             |               |               | example enabling defensive features in ROM or selecting failure     |
+|                           |          |            |             |               |               | modes if verification fails.                                        |
+| ROT_CREATOR_AUTH_CODESIGN |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | This OTP partition is used to store four P-256 keys                 |
+|                           |          |            |             |               |               | and four Sphincs+ keys. The partition requires 464                  |
+|                           |          |            |             |               |               | bytes of software visible storage. The partition is                 |
+|                           |          |            |             |               |               | locked at manufacturing time to protect against                     |
+|                           |          |            |             |               |               | malicious write attempts.                                           |
+|  ROT_CREATOR_AUTH_STATE   |    no    |     no     |     yes     | yes (Digest)  |   yes (CSR)   | This OTP partition is used to capture the state of                  |
+|                           |          |            |             |               |               | each key slot. Each key can be in one of the                        |
+|                           |          |            |             |               |               | following states: BLANK, ENABLED, DISABLED. The                     |
+|                           |          |            |             |               |               | encoded values are such that transitions between                    |
+|                           |          |            |             |               |               | BLANK -> ENABLED ->  DISABLED are possible without                  |
+|                           |          |            |             |               |               | causing ECC errors (this is a mechanism similar to                  |
+|                           |          |            |             |               |               | how we manage life cycle state transitions). The                    |
+|                           |          |            |             |               |               | partition is left unlocked to allow STATE updates in                |
+|                           |          |            |             |               |               | the field. The ROM_EXT is required to lock access to                |
+|                           |          |            |             |               |               | the OTP Direct Access Interface to prevent DoS                      |
+|                           |          |            |             |               |               | attacks from malicious code executing on Silicon                    |
+|                           |          |            |             |               |               | Owner partitions. DAI write locking is available in                 |
+|                           |          |            |             |               |               | EarlGrey.                                                           |
+|          HW_CFG0          |    no    |    yes     |     yes     | yes (Digest)  |      no       | Hardware configuration 0 partition.                                 |
+|                           |          |            |             |               |               | This contains a device identifier and manufacturing state.          |
+|          HW_CFG1          |    no    |    yes     |     yes     | yes (Digest)  |      no       | Hardware configuration 1 partition.                                 |
+|                           |          |            |             |               |               | This contains several hardware feature switches.                    |
+|          SECRET0          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 0.                                                 |
+|                           |          |            |             |               |               | This contains TEST lifecycle unlock tokens.                         |
+|          SECRET1          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 1.                                                 |
+|                           |          |            |             |               |               | This contains SRAM and flash scrambling keys.                       |
+|          SECRET2          |   yes    |    yes     |     yes     | yes (Digest)  | yes (Digest)  | Secret partition 2.                                                 |
+|                           |          |            |             |               |               | This contains RMA unlock token, creator root key, and creator seed. |
+|        LIFE_CYCLE         |    no    |    yes     |     yes     |      no       |      no       | Lifecycle partition.                                                |
+|                           |          |            |             |               |               | This contains lifecycle transition count and state. This partition  |
+|                           |          |            |             |               |               | cannot be locked since the life cycle state needs to advance to RMA |
+|                           |          |            |             |               |               | in-field. Note that while this partition is not marked secret, it   |
+|                           |          |            |             |               |               | is not readable nor writeable via the DAI. Only the LC controller   |
+|                           |          |            |             |               |               | can access this partition, and even via the LC controller it is not |
+|                           |          |            |             |               |               | possible to read the raw manufacturing life cycle state in encoded  |
+|                           |          |            |             |               |               | form, since that encoding is considered a netlist secret. The LC    |
+|                           |          |            |             |               |               | controller only exposes a decoded version of this state.            |
diff --git a/hw/ip/otp_ctrl/doc/programmers_guide.md b/hw/ip/otp_ctrl/doc/programmers_guide.md
index c6c471de19393..71a31cc01cbcd 100644
--- a/hw/ip/otp_ctrl/doc/programmers_guide.md
+++ b/hw/ip/otp_ctrl/doc/programmers_guide.md
@@ -15,8 +15,9 @@ The only initialization steps that SW should perform are:
 
 1. Check that the OTP controller has successfully initialized by reading [`STATUS`](registers.md#status). I.e., make sure that none of the ERROR bits are set, and that the DAI is idle ([`STATUS.DAI_IDLE`](registers.md#status)).
 2. Set up the periodic background checks:
-    - Choose whether to enable periodic [background checks](#partition-checks) by programming nonzero mask values to [`INTEGRITY_CHECK_PERIOD`](registers.md#integrity_check_period) and [`CONSISTENCY_CHECK_PERIOD`](registers.md#consistency_check_period).
-    - Choose whether such checks shall be subject to a timeout by programming a nonzero timeout cycle count to [`CHECK_TIMEOUT`](registers.md#check_timeout).
+    - Choose whether the periodic [background checks](#partition-checks) shall be subject to a timeout by programming a nonzero timeout cycle count to [`CHECK_TIMEOUT`](registers.md#check_timeout).
+      In this case, the [`CHECK_TIMEOUT`](registers.md#check_timeout) register must be set before the [`INTEGRITY_CHECK_PERIOD`](registers.md#integrity_check_period) and [`CONSISTENCY_CHECK_PERIOD`](registers.md#consistency_check_period) registers (see next point).
+    - Enable periodic [background checks](#partition-checks) by programming nonzero mask values to [`INTEGRITY_CHECK_PERIOD`](registers.md#integrity_check_period) and [`CONSISTENCY_CHECK_PERIOD`](registers.md#consistency_check_period).
     - It is recommended to lock down the background check registers via [`CHECK_REGWEN`](registers.md#check_regwen), once the background checks have been set up.
 
 If needed, one-off integrity and consistency checks can be triggered via [`CHECK_TRIGGER`](registers.md#check_trigger).
@@ -148,7 +149,8 @@ In addition, all unrecoverable OTP `Macro*` errors (codes 0x1, 0x3) trigger a `f
 
 If software receives an `otp_error` interrupt, but all error codes read back as 0x0 (`NoError`), this should be treated as a fatal error condition, and the system should be shut down as soon as possible.
 
-Note that while the `MacroWriteBlankError` is marked as a recoverable error, the affected OTP word may be in an inconsistent state after this error has been returned.
+Note that the `MacroWriteBlankError` will only be generated if the write attempt over already written data fails within the OTP macro after applying any means supported within it to enable a write on existing data, e.g., a bit-reversal option.
+Also note that while this error is marked as a recoverable error, the affected OTP word may be in an inconsistent state after this error has been returned.
 This can cause several issues when the word is accessed again (either as part of a regular read operation, as part of the readout at boot, or as part of a background check).
 It is important that SW ensures that each word is only written once, since this can render the device useless.
 
@@ -182,6 +184,12 @@ Digest calculation can be triggered via the DAI.
 Finally, it should be noted that the RMA_TOKEN and CREATOR_ROOT_KEY_SHARE0 / CREATOR_ROOT_KEY_SHARE1 items can only be programmed when the device is in the DEV, PROD, PROD_END and RMA stages.
 Please consult the [life cycle controller documentation](../../lc_ctrl/README.md) documentation for more information.
 
+## OTP Field Descriptions
+
+The table below describes what each field in the OTP partitions is used for.
+
+{{#include otp_ctrl_field_descriptions.md}}
+
 ## Examples
 
 ### Provisioning Items
diff --git a/hw/ip/pinmux/data/pinmux.hjson b/hw/ip/pinmux/data/pinmux.hjson
index 70a67e6704bfb..987555390b3ab 100644
--- a/hw/ip/pinmux/data/pinmux.hjson
+++ b/hw/ip/pinmux/data/pinmux.hjson
@@ -439,6 +439,7 @@
                             Muxed pad attributes.
                             This register has WARL behavior since not each pad type may support
                             all attributes.
+                            The muxed pad that is used for TAP strap 0 has a different reset value, with `pull_en` set to 1.
                             ''',
                   count:        "NMioPads",
                   compact:      "false",
@@ -509,7 +510,8 @@
                   // read back the same value that was written to them.
                   // further, they have hardware side effects since they drive the
                   // pad attributes, and hence no random data should be written to them.
-                  tags: ["excl:CsrAllTests:CsrExclWrite"]
+                  // Additionally, their reset value is defined by the RTL implementation and may not equal `resval` for all instances (#24621).
+                  tags: ["excl:CsrAllTests:CsrExclAll"]
                 }
     },
 
diff --git a/hw/ip/pinmux/data/pinmux.hjson.tpl b/hw/ip/pinmux/data/pinmux.hjson.tpl
index b977b833880e2..93ffa7040fb36 100644
--- a/hw/ip/pinmux/data/pinmux.hjson.tpl
+++ b/hw/ip/pinmux/data/pinmux.hjson.tpl
@@ -556,6 +556,7 @@
                             Muxed pad attributes.
                             This register has WARL behavior since not each pad type may support
                             all attributes.
+                            The muxed pad that is used for TAP strap 0 has a different reset value, with `pull_en` set to 1.
                             ''',
                   count:        "NMioPads",
                   compact:      "false",
@@ -626,7 +627,8 @@
                   // read back the same value that was written to them.
                   // further, they have hardware side effects since they drive the
                   // pad attributes, and hence no random data should be written to them.
-                  tags: ["excl:CsrAllTests:CsrExclWrite"]
+                  // Additionally, their reset value is defined by the RTL implementation and may not equal `resval` for all instances (#24621).
+                  tags: ["excl:CsrAllTests:CsrExclAll"]
                 }
     },
 
diff --git a/hw/ip/pinmux/doc/registers.md b/hw/ip/pinmux/doc/registers.md
index 2409dbe42013a..e9e19b4aafc10 100644
--- a/hw/ip/pinmux/doc/registers.md
+++ b/hw/ip/pinmux/doc/registers.md
@@ -965,6 +965,7 @@ Register write enable for MIO PAD attributes.
 Muxed pad attributes.
 This register has WARL behavior since not each pad type may support
 all attributes.
+The muxed pad that is used for TAP strap 0 has a different reset value, with `pull_en` set to 1.
 - Reset default: `0x0`
 - Reset mask: `0xf300ff`
 
diff --git a/hw/ip/pinmux/lint/pinmux.waiver b/hw/ip/pinmux/lint/pinmux.waiver
index 037428311ddec..f62b61eeefc6f 100644
--- a/hw/ip/pinmux/lint/pinmux.waiver
+++ b/hw/ip/pinmux/lint/pinmux.waiver
@@ -37,3 +37,6 @@ waive -rules CLOCK_USE -location {pinmux.sv} -regexp {'(dio_wkup_mux\[12\]|dio_w
 
 waive -rules CLOCK_MUX -location {pinmux.sv} -regexp {Clock 'dio_in_i\[12\]' reaches a multiplexer here, used as a clock 'clk_i'} \
       -comment "This mux is required to filter designated scan clock inputs (e.g. 'DioSpiDeviceSck' at index 12) from wakeup detector inputs"
+
+waive -rules RESET_ONLY -location {pinmux.sv} -regexp {'mio_pad_attr_q\[0\]' is asynchronously reset but has no other assignments in this block} \
+      -comment "This error can safely be ignored: The signal is obviously driven further down in the very same block, changing the TargetCfg.tap_strap0_idx value to a non-zero value (which it actually is in the Earlgrey top level) makes the error go away."
diff --git a/hw/ip/pinmux/rtl/pinmux.sv b/hw/ip/pinmux/rtl/pinmux.sv
index 44f18c50397c4..b24c590e6dce4 100644
--- a/hw/ip/pinmux/rtl/pinmux.sv
+++ b/hw/ip/pinmux/rtl/pinmux.sv
@@ -161,7 +161,17 @@ module pinmux
   always_ff @(posedge clk_i or negedge rst_ni) begin : p_regs
     if (!rst_ni) begin
       dio_pad_attr_q <= '0;
-      mio_pad_attr_q <= '0;
+      for (int kk = 0; kk < NMioPads; kk++) begin
+        if (kk == TargetCfg.tap_strap0_idx) begin
+          // TAP strap 0 is sampled after reset (and only once for life cycle states that are not
+          // TEST_UNLOCKED* or RMA).  To ensure it gets sampled as 0 unless driven to 1 from an
+          // external source (and specifically that it gets sampled as 0 when left floating / not
+          // connected), this enables the pull-down of the pad at reset.
+          mio_pad_attr_q[kk] <= '{pull_en: 1'b1, default: '0};
+        end else begin
+          mio_pad_attr_q[kk] <= '0;
+        end
+      end
     end else begin
       // dedicated pads
       for (int kk = 0; kk < NDioPads; kk++) begin
diff --git a/hw/ip/prim/doc/prim_ram_1p_scr.md b/hw/ip/prim/doc/prim_ram_1p_scr.md
index ad67d18fe2ccd..1eafce8a15077 100644
--- a/hw/ip/prim/doc/prim_ram_1p_scr.md
+++ b/hw/ip/prim/doc/prim_ram_1p_scr.md
@@ -2,9 +2,10 @@
 
 # Overview
 
-The scrambling primitive `prim_ram_1p_scr` employs a reduced-round (7 instead of 11) PRINCE block cipher in CTR mode to scramble the data.
+The scrambling primitive `prim_ram_1p_scr` employs a reduced-round (5 or 7 instead of 11) PRINCE block cipher in CTR mode to scramble the data.
 The PRINCE lightweight block cipher has been selected due to its low latency and low area characteristics, see also [prim_prince](./prim_prince.md) for more information on PRINCE.
-The number of rounds is reduced to 7 in order to ease timing pressure and ensure single cycle operation (the number of rounds can always be increased if it turns out that there is enough timing slack).
+In the default configuration, the number of rounds is reduced to 7 in order to ease timing pressure and ensure single cycle operation (the number of rounds can always be increased via the `NumPrinceRoundsHalf` parameter if it turns out that there is enough timing slack).
+To ease timing closure at the top level, the number of rounds used for scrambling the main SRAM and the instruction cache of the Ibex processor core is 5 (`NumPrinceRoundsHalf` = 2).
 
 In [CTR mode](https://en.wikipedia.org/wiki/Block_cipher_mode_of_operation#Counter_(CTR)), the block cipher is used to encrypt a 64bit IV with the scrambling key in order to create a 64bit keystream block that is bitwise XOR'ed with the data in order to transform plaintext into ciphertext and vice versa.
 The IV is assembled by concatenating a nonce with the word address.
diff --git a/hw/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core b/hw/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
index 23118823d12d8..4a23eee7b1520 100644
--- a/hw/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
+++ b/hw/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core
@@ -53,7 +53,7 @@ targets:
           - '--trace-structs'
           - '--trace-params'
           - '--trace-max-array 1024'
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_crc32_sim"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_crc32_sim"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # RAM primitives wider than 64bit (required for ECC) fail to build in
diff --git a/hw/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core b/hw/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
index 21fd9adc3f01b..6c402cd306a9b 100644
--- a/hw/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
+++ b/hw/ip/prim/pre_dv/prim_sync_reqack/prim_sync_reqack_tb.core
@@ -43,7 +43,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_sync_reqack_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_sync_reqack_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # XXX: Cleanup all warnings and remove this option
diff --git a/hw/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core b/hw/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
index f86d00c8cee0f..ad149c8637e30 100644
--- a/hw/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
+++ b/hw/ip/prim/pre_dv/prim_trivium/prim_trivium_tb.core
@@ -43,7 +43,7 @@ targets:
 # -O
 #   Optimization levels have a large impact on the runtime performance of the
 #   simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_trivium_tb -g -O0"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_trivium_tb -g -O0"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - "-Wall"
           # XXX: Cleanup all warnings and remove this option
diff --git a/hw/ip/prim_xilinx/prim_xilinx_default_pkg.core b/hw/ip/prim_xilinx/prim_xilinx_default_pkg.core
new file mode 100644
index 0000000000000..efcff71f05a70
--- /dev/null
+++ b/hw/ip/prim_xilinx/prim_xilinx_default_pkg.core
@@ -0,0 +1,19 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_xilinx:prim_xilinx_default_pkg"
+description: "Single port RAM"
+virtual:
+  - lowrisc:prim_xilinx:prim_xilinx_pkg
+filesets:
+  files_rtl:
+    files:
+      - rtl/prim_xilinx_pkg.sv
+    file_type: systemVerilogSource
+
+targets:
+  default: &default_target
+    filesets:
+      - files_rtl
diff --git a/hw/ip/prim_xilinx/prim_xilinx_ram_1p.core b/hw/ip/prim_xilinx/prim_xilinx_ram_1p.core
new file mode 100644
index 0000000000000..3ee8918a2bfa7
--- /dev/null
+++ b/hw/ip/prim_xilinx/prim_xilinx_ram_1p.core
@@ -0,0 +1,44 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_xilinx:ram_1p"
+description: "Single port RAM"
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:prim:assert
+      - lowrisc:prim:ram_1p_pkg
+      # Note that prim_xilinx_pkg is a virtual core that the top should provide.
+      # It maps parameters to instructions for how to split memories into
+      # logical groups of bits. See prim_xilinx_default_pkg for an example.
+      - lowrisc:prim_xilinx:prim_xilinx_pkg
+      - lowrisc:prim_generic:ram_1p
+      - lowrisc:prim:util_memload
+    files:
+      - rtl/prim_xilinx_ram_1p.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+targets:
+  default:
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_pkg.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_pkg.sv
new file mode 100644
index 0000000000000..cf46bc19512c4
--- /dev/null
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_pkg.sv
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package prim_xilinx_pkg;
+
+  // Returns the maximum width of an individual xpm memory. Note that this API
+  // may evolve over time, but currently it uses the width and depth
+  // parameters to identify memories that may need to be broken up into
+  // separate groups. This can help work around updatemem's maximum width for
+  // words, which is 64 bits at the time of writing.
+  function automatic int get_ram_max_width(int width, int depth);
+    return 0;
+  endfunction
+
+endpackage : prim_xilinx_pkg
diff --git a/hw/ip/prim_xilinx/rtl/prim_xilinx_ram_1p.sv b/hw/ip/prim_xilinx/rtl/prim_xilinx_ram_1p.sv
new file mode 100644
index 0000000000000..582fa2a1f239b
--- /dev/null
+++ b/hw/ip/prim_xilinx/rtl/prim_xilinx_ram_1p.sv
@@ -0,0 +1,77 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Synchronous single-port SRAM model
+
+`include "prim_assert.sv"
+
+module prim_xilinx_ram_1p import prim_ram_1p_pkg::*; #(
+  parameter  int Width           = 32, // bit
+  parameter  int Depth           = 128,
+  parameter  int DataBitsPerMask = 1, // Number of data bits per bit of write mask
+  parameter      MemInitFile     = "", // VMEM file to initialize the memory with
+
+  localparam int Aw              = $clog2(Depth)  // derived parameter
+) (
+  input  logic             clk_i,
+
+  input  logic             req_i,
+  input  logic             write_i,
+  input  logic [Aw-1:0]    addr_i,
+  input  logic [Width-1:0] wdata_i,
+  input  logic [Width-1:0] wmask_i,
+  output logic [Width-1:0] rdata_o, // Read data. Data is returned one cycle after req_i is high.
+  input ram_1p_cfg_t       cfg_i
+);
+
+  localparam int PrimMaxWidth = prim_xilinx_pkg::get_ram_max_width(Width, Depth);
+
+  if (PrimMaxWidth <= 0) begin : gen_generic
+    prim_generic_ram_1p #(
+      .Width(Width),
+      .Depth(Depth),
+      .DataBitsPerMask(DataBitsPerMask),
+      .MemInitFile(MemInitFile)
+    ) u_ram_1p (
+      .*
+    );
+  end else begin : gen_xpm
+    logic wr_en;
+    assign wr_en = write_i & wmask_i[0];
+
+    logic unused_cfg_i;
+    assign unused_cfg_i = cfg_i;
+
+    for (genvar k = 0; k < Width; k = k + PrimMaxWidth) begin : gen_split
+      localparam int PrimWidth = ((Width - k) > PrimMaxWidth) ? PrimMaxWidth : Width - k;
+      localparam string PrimMemoryInitFile = (MemInitFile != "") ? MemInitFile : "none";
+
+      xpm_memory_spram #(
+        .ADDR_WIDTH_A(Aw),
+        .BYTE_WRITE_WIDTH_A(PrimWidth), // Masks are not supported
+        .MEMORY_INIT_FILE(PrimMemoryInitFile),
+        .MEMORY_SIZE(Depth * PrimWidth),
+        .READ_DATA_WIDTH_A(PrimWidth),
+        .READ_LATENCY_A(1),
+        .USE_MEM_INIT_MMI(1),
+        .WRITE_DATA_WIDTH_A(PrimWidth)
+      ) u_ram_1p (
+        .clka(clk_i),
+        .addra(addr_i),
+        .dbiterra(),
+        .dina(wdata_i[k +: PrimWidth]),
+        .douta(rdata_o[k +: PrimWidth]),
+        .ena(req_i),
+        .injectdbiterra(1'b0),
+        .injectsbiterra(1'b0),
+        .regcea(1'b1),
+        .rsta(1'b0),
+        .sbiterra(),
+        .sleep(1'b0),
+        .wea(wr_en)
+      );
+    end
+  end
+
+endmodule
diff --git a/hw/ip/prim_xilinx_ultrascale/prim_xilinx_ultrascale_ram_1p.core b/hw/ip/prim_xilinx_ultrascale/prim_xilinx_ultrascale_ram_1p.core
new file mode 100644
index 0000000000000..720fe34c26e52
--- /dev/null
+++ b/hw/ip/prim_xilinx_ultrascale/prim_xilinx_ultrascale_ram_1p.core
@@ -0,0 +1,19 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_xilinx_ultrascale:ram_1p"
+description: "Single port RAM"
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:prim_xilinx:ram_1p
+    files:
+      - rtl/prim_xilinx_ultrascale_ram_1p.sv
+    file_type: systemVerilogSource
+
+targets:
+  default:
+    filesets:
+      - files_rtl
diff --git a/hw/ip/prim_xilinx_ultrascale/rtl/prim_xilinx_ultrascale_ram_1p.sv b/hw/ip/prim_xilinx_ultrascale/rtl/prim_xilinx_ultrascale_ram_1p.sv
new file mode 100644
index 0000000000000..741a51ebc1fb5
--- /dev/null
+++ b/hw/ip/prim_xilinx_ultrascale/rtl/prim_xilinx_ultrascale_ram_1p.sv
@@ -0,0 +1,35 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// Synchronous single-port SRAM model
+
+`include "prim_assert.sv"
+
+module prim_xilinx_ultrascale_ram_1p import prim_ram_1p_pkg::*; #(
+  parameter  int Width           = 32, // bit
+  parameter  int Depth           = 128,
+  parameter  int DataBitsPerMask = 1, // Number of data bits per bit of write mask
+  parameter      MemInitFile     = "", // VMEM file to initialize the memory with
+
+  localparam int Aw              = $clog2(Depth)  // derived parameter
+) (
+  input  logic             clk_i,
+
+  input  logic             req_i,
+  input  logic             write_i,
+  input  logic [Aw-1:0]    addr_i,
+  input  logic [Width-1:0] wdata_i,
+  input  logic [Width-1:0] wmask_i,
+  output logic [Width-1:0] rdata_o, // Read data. Data is returned one cycle after req_i is high.
+  input ram_1p_cfg_t       cfg_i
+);
+
+  prim_xilinx_ram_1p #(
+      .Width(Width),
+      .Depth(Depth),
+      .DataBitsPerMask(DataBitsPerMask),
+      .MemInitFile(MemInitFile)
+  ) u_inst (.*);
+
+endmodule
diff --git a/hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv b/hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv
index d34480c8627b2..2fd74d8a8510c 100644
--- a/hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv
+++ b/hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv
@@ -114,10 +114,17 @@ class rom_ctrl_scoreboard extends cip_base_scoreboard #(
   endfunction
 
   // Update the RAL model with expected values for the digest registers
+  //
+  // This works by using the predict function with UVM_PREDICT_READ. This tells the register model
+  // that we've just read the given value from the registers. We do this rather than using
+  // UVM_PREDICT_DIRECT (the default) because it avoids UVM thinking that there might be a race
+  // against CSR operations that are already in flight.
   virtual function void update_ral_digests();
     for (int i = 0; i < DIGEST_SIZE / TL_DW; i++) begin
-      `DV_CHECK(ral.digest[i].predict(kmac_digest[i*TL_DW+:TL_DW]))
-      `DV_CHECK(ral.exp_digest[i].predict(expected_digest[i*TL_DW+:TL_DW]))
+      `DV_CHECK(ral.digest[i].predict(.value(kmac_digest[i*TL_DW+:TL_DW]),
+                                      .kind(UVM_PREDICT_READ)))
+      `DV_CHECK(ral.exp_digest[i].predict(.value(expected_digest[i*TL_DW+:TL_DW]),
+                                          .kind(UVM_PREDICT_READ)))
     end
   endfunction
 
diff --git a/hw/ip/rom_ctrl/util/mem.py b/hw/ip/rom_ctrl/util/mem.py
index f2a6dea2c7280..b84451c54c5b8 100644
--- a/hw/ip/rom_ctrl/util/mem.py
+++ b/hw/ip/rom_ctrl/util/mem.py
@@ -109,7 +109,7 @@ def _parse_line(width: int, line: str) -> Tuple[int, List[int]]:
     def _load_preproc(width: int, infile: IO[str]) -> 'MemFile':
         '''Load a pre-processed file'''
         chunks = []
-        next_chunk = None  # type: Optional[MemChunk]
+        next_chunk: Optional[MemChunk] = None
         for line in infile:
             # If the line is empty or whitespace, skip it.
             if not line or line.isspace():
@@ -166,7 +166,7 @@ def load_vmem(width: int, infile: TextIO) -> 'MemFile':
     def load_elf32(infile: BinaryIO, base_addr: int) -> 'MemFile':
         '''Read a little-endian 32-bit ELF file'''
         elf_file = ELFFile(infile)
-        segments = []  # type: List[Tuple[int, int, bytes]]
+        segments: List[Tuple[int, int, bytes]] = []
         for segment in elf_file.iter_segments():
             seg_type = segment['p_type']
 
@@ -213,7 +213,7 @@ def load_elf32(infile: BinaryIO, base_addr: int) -> 'MemFile':
         # Merge any adjacent segments, bridging any sub-word gaps. This doesn't
         # do any other right padding: we'll do that on the final pass that
         # converts to 32-bit words.
-        merged_segments = []  # type: List[Tuple[int, int, bytes]]
+        merged_segments: List[Tuple[int, int, bytes]] = []
         next_word = 0
         for lma, top, data in segments:
             # Round the LMA down to the previous word boundary. The non-overlap
@@ -248,7 +248,7 @@ def load_elf32(infile: BinaryIO, base_addr: int) -> 'MemFile':
         # Assemble the bytes in each segment into little-endian 32-bit words.
         # Zero-extend any partial word at the end of a segment. Because of the
         # merging in the previous pass, we know this won't cause any overlaps.
-        chunks = []  # type: List[MemChunk]
+        chunks: List[MemChunk] = []
         for lma_word, _, data in merged_segments:
             words = []
             word = 0
diff --git a/hw/ip/rom_ctrl/util/scramble_image.py b/hw/ip/rom_ctrl/util/scramble_image.py
index a6db1b95a09a2..3275a3e6faab7 100755
--- a/hw/ip/rom_ctrl/util/scramble_image.py
+++ b/hw/ip/rom_ctrl/util/scramble_image.py
@@ -6,7 +6,7 @@
 
 import argparse
 import sys
-from typing import Dict, List
+from typing import Dict, List, IO
 
 import hjson  # type: ignore
 from Crypto.Hash import cSHAKE256
@@ -110,7 +110,7 @@ class Scrambler:
     subst_perm_rounds = 2
     num_rounds_half = 3
 
-    def __init__(self, nonce: int, key: int, rom_size_words: int):
+    def __init__(self, nonce: int, key: int, rom_size_words: int, hash_file: IO[str]):
         assert 0 <= nonce < (1 << 64)
         assert 0 <= key < (1 << 128)
         assert 0 < rom_size_words < (1 << 64)
@@ -119,6 +119,7 @@ def __init__(self, nonce: int, key: int, rom_size_words: int):
         self.key = key
         self.rom_size_words = rom_size_words
         self.config = load_secded_config()
+        self.hash_file = hash_file
 
         self._addr_width = (rom_size_words - 1).bit_length()
 
@@ -163,7 +164,7 @@ def _get_param_value(params: Dict[str, _UDict], name: str,
         return int_val
 
     @staticmethod
-    def from_hjson_path(path: str, rom_size_words: int) -> 'Scrambler':
+    def from_hjson_path(path: str, rom_size_words: int, hash_file: IO[str]) -> 'Scrambler':
         assert 0 < rom_size_words
 
         with open(path) as handle:
@@ -179,7 +180,7 @@ def from_hjson_path(path: str, rom_size_words: int) -> 'Scrambler':
         nonce = Scrambler._get_param_value(params, 'RndCnstScrNonce', 64)
         key = Scrambler._get_param_value(params, 'RndCnstScrKey', 128)
 
-        return Scrambler(nonce, key, rom_size_words)
+        return Scrambler(nonce, key, rom_size_words, hash_file)
 
     def flatten(self, mem: MemFile) -> MemFile:
         '''Flatten and pad mem up to the correct size
@@ -322,6 +323,9 @@ def add_hash(self, scr_mem: MemFile) -> None:
         # invalid ECC checksums.
         mask32 = (1 << 32) - 1
         first_digest_idx = self.rom_size_words - num_digest_words
+        # Create a file to store the ROM hash.
+        print('#include <stdint.h>\n', file = self.hash_file)
+        print(f'const uint32_t kRomImageHash[{num_digest_words}] = {{', file = self.hash_file)
         for digest_idx in range(num_digest_words):
             log_addr = first_digest_idx + digest_idx
             w32 = (digest256 >> (32 * digest_idx)) & mask32
@@ -344,6 +348,8 @@ def add_hash(self, scr_mem: MemFile) -> None:
 
             phy_addr = self.addr_sp_enc(log_addr)
             scr_chunk.words[phy_addr] = w32
+            print(f'  {w32:#08x},', file = self.hash_file)
+        print('};', file = self.hash_file)
 
 
 def main() -> int:
@@ -351,9 +357,10 @@ def main() -> int:
     parser.add_argument('hjson')
     parser.add_argument('infile', type=argparse.FileType('rb'))
     parser.add_argument('outfile', type=argparse.FileType('w'))
+    parser.add_argument('hashfile', type=argparse.FileType('w'))
 
     args = parser.parse_args()
-    scrambler = Scrambler.from_hjson_path(args.hjson, ROM_SIZE_WORDS)
+    scrambler = Scrambler.from_hjson_path(args.hjson, ROM_SIZE_WORDS, args.hashfile)
 
     # Load the input ELF file
     clr_mem = MemFile.load_elf32(args.infile, 4 * ROM_BASE_WORD)
diff --git a/hw/ip/rv_dm/dv/cov/rv_dm_cov_excl.el b/hw/ip/rv_dm/dv/cov/rv_dm_cov_excl.el
index 86796ba20ee98..d481ba0606dfe 100644
--- a/hw/ip/rv_dm/dv/cov/rv_dm_cov_excl.el
+++ b/hw/ip/rv_dm/dv/cov/rv_dm_cov_excl.el
@@ -1,8 +1,9 @@
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
-//
 
+// The following exclusions were manually added.
+//
 // In dm_mem.sv, a location that can be read is at WhereToAddr. This is supposed to contain a JAL
 // instruction that points at the first instruction of the current abstract command. This location
 // is either the start of the program buffer or the start of the abstract command. Deciding which is
@@ -13,3 +14,247 @@ INSTANCE: tb.dut.u_dm_top.i_dm_mem
 ANNOTATION: "Cannot have running command other than AccessRegister"
 Condition 5 "3588663374" "((cmd_i.cmdtype == AccessRegister) && ((!ac_ar.transfer)) && ac_ar.postexec) 1 -1" (1 "011")
 Condition 6 "3885215629" "(cmd_i.cmdtype == AccessRegister) 1 -1" (1 "0")
+
+// The following exclusions were generated by UNR.
+//
+//==================================================
+// This file contains the Excluded objects
+// Generated By User: miguelosorio
+// Format Version: 2
+// Date: Thu Aug  1 16:04:51 2024
+// ExclMode: default
+//==================================================
+CHECKSUM: "2345259249 2478537381"
+INSTANCE: tb.dut.dap.i_dmi_jtag_tap
+ANNOTATION: "VC_COV_UNR"
+Block 69 "637783920" ";"
+CHECKSUM: "1794274355 4209686271"
+INSTANCE: tb.dut.u_tlul_lc_gate_sba.u_tlul_err_resp
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "1610943811" "(err_rsp_pending && tl_h_i.d_ready) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "4156730590" "(tl_h_i.a_valid && tl_h_o_int.a_ready) 1 -1" (2 "10")
+CHECKSUM: "1519521893 1155107467"
+INSTANCE: tb.dut
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "254063376" "(ndmreset_ack && ndmreset_pending_q) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1831429135" "(ndmreset_ack && lc_rst_pending_q) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 9 "3864289575" "(regs_intg_error | rom_intg_error | sba_gate_intg_error | rom_gate_intg_error) 1 -1" (2 "0001")
+ANNOTATION: "VC_COV_UNR"
+Condition 9 "3864289575" "(regs_intg_error | rom_intg_error | sba_gate_intg_error | rom_gate_intg_error) 1 -1" (3 "0010")
+ANNOTATION: "VC_COV_UNR"
+Condition 13 "879101139" "(ndmreset_pending_q && lc_rst_pending_q && ((!ndmreset_req)) && ((!lc_rst_asserted)) && reset_req_en) 1 -1" (1 "01111")
+CHECKSUM: "1519521893 1864293086"
+INSTANCE: tb.dut
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 regs_tl_d_o.d_user.rsp_intg [6] "logic regs_tl_d_o.d_user.rsp_intg[6:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 regs_tl_d_o.d_user.rsp_intg [6] "logic regs_tl_d_o.d_user.rsp_intg[6:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 regs_tl_d_o.d_sink [0] "logic regs_tl_d_o.d_sink[0:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 regs_tl_d_o.d_sink [0] "logic regs_tl_d_o.d_sink[0:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 regs_tl_d_o.d_param [0] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 regs_tl_d_o.d_param [0] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 regs_tl_d_o.d_param [1] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 regs_tl_d_o.d_param [1] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 regs_tl_d_o.d_param [2] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 regs_tl_d_o.d_param [2] "logic regs_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 mem_tl_d_o.d_user.rsp_intg [6] "logic mem_tl_d_o.d_user.rsp_intg[6:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 mem_tl_d_o.d_user.rsp_intg [6] "logic mem_tl_d_o.d_user.rsp_intg[6:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 mem_tl_d_o.d_sink [0] "logic mem_tl_d_o.d_sink[0:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 mem_tl_d_o.d_sink [0] "logic mem_tl_d_o.d_sink[0:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 mem_tl_d_o.d_param [0] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 mem_tl_d_o.d_param [0] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 mem_tl_d_o.d_param [1] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 mem_tl_d_o.d_param [1] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 mem_tl_d_o.d_param [2] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 mem_tl_d_o.d_param [2] "logic mem_tl_d_o.d_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_user.rsvd [0] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_user.rsvd [0] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_user.rsvd [1] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_user.rsvd [1] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_user.rsvd [2] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_user.rsvd [2] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_user.rsvd [3] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_user.rsvd [3] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_user.rsvd [4] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_user.rsvd [4] "logic sba_tl_h_o.a_user.rsvd[4:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_address [0] "logic sba_tl_h_o.a_address[31:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_address [0] "logic sba_tl_h_o.a_address[31:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_address [1] "logic sba_tl_h_o.a_address[31:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_address [1] "logic sba_tl_h_o.a_address[31:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [0] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [0] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [1] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [1] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [2] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [2] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [3] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [3] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [4] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [4] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [5] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [5] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [6] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [6] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_source [7] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_source [7] "logic sba_tl_h_o.a_source[7:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_size [0] "logic sba_tl_h_o.a_size[1:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_size [0] "logic sba_tl_h_o.a_size[1:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_param [0] "logic sba_tl_h_o.a_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_param [0] "logic sba_tl_h_o.a_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_param [1] "logic sba_tl_h_o.a_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_param [1] "logic sba_tl_h_o.a_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 0to1 sba_tl_h_o.a_param [2] "logic sba_tl_h_o.a_param[2:0]"
+ANNOTATION: "VC_COV_UNR"
+Toggle 1to0 sba_tl_h_o.a_param [2] "logic sba_tl_h_o.a_param[2:0]"
+CHECKSUM: "2709971803 591200431"
+INSTANCE: tb.dut.u_dm_top.i_dm_mem
+ANNOTATION: "VC_COV_UNR"
+Block 33 "2798412932" ";"
+ANNOTATION: "VC_COV_UNR"
+Block 61 "2723844228" "if ((dc < (dm::DataCount - 1)))"
+ANNOTATION: "VC_COV_UNR"
+Block 62 "2398373540" "data_bits[(dc + 1)][((i - 4) * 8)+:8] = wdata_i[(i * 8)+:8];"
+ANNOTATION: "VC_COV_UNR"
+Block 106 "2684304032" "err_d = 1'b1;"
+CHECKSUM: "4224194069 2881513198"
+INSTANCE: tb.dut.u_tlul_lc_gate_sba
+ANNOTATION: "VC_COV_UNR"
+Block 36 "3828992405" "err_o = 1'b1;"
+CHECKSUM: "4224194069 2881513198"
+INSTANCE: tb.dut.u_tlul_lc_gate_rom
+ANNOTATION: "VC_COV_UNR"
+Block 36 "3828992405" "err_o = 1'b1;"
+CHECKSUM: "1340377389 4238305272"
+INSTANCE: tb.dut.u_dm_top.i_dm_sba
+ANNOTATION: "VC_COV_UNR"
+Block 46 "2865494160" "state_d = Idle;"
+CHECKSUM: "74367784 3785313510"
+INSTANCE: tb.dut.u_reg_regs.u_reg_if
+ANNOTATION: "VC_COV_UNR"
+Condition 18 "3340270436" "(addr_align_err | malformed_meta_err | tl_err | instr_error | intg_error) 1 -1" (5 "01000")
+CHECKSUM: "74367784 3656090703"
+INSTANCE: tb.dut.i_tlul_adapter_reg
+ANNOTATION: "VC_COV_UNR"
+Condition 15 "3340270436" "(addr_align_err | malformed_meta_err | tl_err | instr_error | intg_error) 1 -1" (5 "01000")
+CHECKSUM: "4224194069 639524789"
+INSTANCE: tb.dut.u_tlul_lc_gate_sba
+ANNOTATION: "VC_COV_UNR"
+Condition 7 "121936459" "(tl_h2d_i.d_ready & tl_d2h_o.d_valid) 1 -1" (1 "01")
+CHECKSUM: "4224194069 639524789"
+INSTANCE: tb.dut.u_tlul_lc_gate_rom
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "1380914983" "(a_ack && ((!d_ack))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "2824798557" "(d_ack && ((!a_ack))) 1 -1" (2 "10")
+CHECKSUM: "7115036 3679981882"
+INSTANCE: tb.dut.u_dm_top.i_dm_csrs.i_fifo
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "2709971803 889438022"
+INSTANCE: tb.dut.u_dm_top.i_dm_mem
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1851980116" "(resumereq_aligned[hartsel] && ((!resuming_q_aligned[hartsel])) && ((!haltreq_aligned[hartsel])) && halted_q_aligned[hartsel]) 1 -1" (2 "1011")
+ANNOTATION: "VC_COV_UNR"
+Condition 12 "788256892" "((32'(ac_ar.aarsize) < MaxAar) && ac_ar.transfer && ((!ac_ar.write))) 1 -1" (3 "110")
+CHECKSUM: "1340377389 1421269835"
+INSTANCE: tb.dut.u_dm_top.i_dm_sba
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "4269836655" "state_q" (7) "state_q Read ,-,-,-,0,-,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "4269836655" "state_q" (20) "state_q default,-,-,-,-,-,-,-,-,-,-,-,-"
+CHECKSUM: "487869288 3696802595"
+INSTANCE: tb.dut.u_dm_top.i_dm_csrs
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3574190413" "(hartsel_idx0 < 15'((((NrHarts - 1) / (2 ** 5)) + 1)))" (1) "(hartsel_idx0 < 15'((((NrHarts - 1) / (2 ** 5)) + 1))) 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1789205363" "(hartsel_idx1 < 10'((((NrHarts - 1) / (2 ** 10)) + 1)))" (1) "(hartsel_idx1 < 10'((((NrHarts - 1) / (2 ** 10)) + 1))) 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "4150080586" "(hartsel_idx2 < 5'((((NrHarts - 1) / (2 ** 15)) + 1)))" (1) "(hartsel_idx2 < 5'((((NrHarts - 1) / (2 ** 15)) + 1))) 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 4 "3849421052" "((dmi_req_ready_o && dmi_req_valid_i) && (dtm_op == DTM_WRITE))" (3) "((dmi_req_ready_o && dmi_req_valid_i) && (dtm_op == DTM_WRITE)) 1,Data0 DataEnd ,0,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 12 "1524828153" "(selected_hart <= 1'((NrHarts - 1)))" (1) "(selected_hart <= 1'((NrHarts - 1))) 0"
+CHECKSUM: "2345259249 3039402680"
+INSTANCE: tb.dut.dap.i_dmi_jtag_tap
+ANNOTATION: "VC_COV_UNR"
+Branch 11 "1673691078" "tap_state_q" (32) "tap_state_q default,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
+CHECKSUM: "4224194069 3219254590"
+INSTANCE: tb.dut.u_tlul_lc_gate_sba
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "1850090820" "state_q" (8) "state_q StFlush ,-,-,-,0,0,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "1850090820" "state_q" (13) "state_q default,-,-,-,-,-,-,-"
+CHECKSUM: "4224194069 3219254590"
+INSTANCE: tb.dut.u_tlul_lc_gate_rom
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "1850090820" "state_q" (13) "state_q default,-,-,-,-,-,-,-"
+CHECKSUM: "704952876 424853"
+INSTANCE: tb.dut.dap.i_dmi_cdc.i_cdc_resp.u_prim_sync_reqack
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "3560579867" "gen_rz_hs_protocol.dst_fsm_q" (1) "gen_rz_hs_protocol.dst_fsm_q LoSt ,1,0,-"
+CHECKSUM: "2709971803 2063590459"
+INSTANCE: tb.dut.u_dm_top.i_dm_mem
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "2494332144" "state_q" (11) "state_q default,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 9 "2350155233" "req_i" (11) "req_i 1,-,1"
diff --git a/hw/ip/rv_dm/dv/env/rv_dm_scoreboard.sv b/hw/ip/rv_dm/dv/env/rv_dm_scoreboard.sv
index dec84a828e476..7ad130463f89a 100644
--- a/hw/ip/rv_dm/dv/env/rv_dm_scoreboard.sv
+++ b/hw/ip/rv_dm/dv/env/rv_dm_scoreboard.sv
@@ -84,9 +84,6 @@ class rv_dm_scoreboard extends cip_base_scoreboard #(
           void'(selected_dtm_csr.predict(.value(item.dr), .kind(UVM_PREDICT_WRITE)));
         end
         "idcode": begin
-          // TODO: The upper bits of an IDCODE read should really all be zero, but the current value
-          //       depends on the td_i that we passed(!). See:
-          //       https://github.com/pulp-platform/riscv-dbg/issues/170
           `DV_CHECK_EQ(item.dout[31:0], selected_dtm_csr.get_mirrored_value())
           void'(selected_dtm_csr.predict(.value(item.dr), .kind(UVM_PREDICT_WRITE)));
         end
diff --git a/hw/ip/rv_dm/dv/env/seq_lib/rv_dm_progbuf_read_write_execute_vseq.sv b/hw/ip/rv_dm/dv/env/seq_lib/rv_dm_progbuf_read_write_execute_vseq.sv
index 9f843f7d1f629..21ff46d813223 100644
--- a/hw/ip/rv_dm/dv/env/seq_lib/rv_dm_progbuf_read_write_execute_vseq.sv
+++ b/hw/ip/rv_dm/dv/env/seq_lib/rv_dm_progbuf_read_write_execute_vseq.sv
@@ -6,18 +6,29 @@ class rv_dm_progbuf_read_write_execute_vseq extends rv_dm_base_vseq;
   `uvm_object_utils(rv_dm_progbuf_read_write_execute_vseq)
   `uvm_object_new
 
-  task progbuf_rw(int idx);
-    uvm_reg_data_t data = $urandom;
-    uvm_reg_data_t r_data;
-    csr_wr(.ptr(jtag_dmi_ral.progbuf[idx]), .value(data));
-    csr_rd(.ptr(tl_mem_ral.program_buffer[idx]), .value(r_data));
-    `DV_CHECK_EQ(data, r_data)
-  endtask
-
   task body();
-    // Call the task from base_vseq to halt the hart.
+    uvm_status_e reg_status;
+    bit[31:0]    words[8];
+
+    `DV_CHECK_STD_RANDOMIZE_FATAL(words)
+
+    // Ask the debug module to send a halt request, then respond as the hart to say that we are
+    // halted.
     request_halt();
-    for (int i = 0; i < 8; i++) progbuf_rw(i);
+
+    // Fill the program buffer by writing the words to the PROGBUF multiregister. We expect these
+    // writes to be refected on the TL side in PROGRAM_BUFFER, so predict the values there to match.
+    for (int i = 0; i < 8; i++) begin
+      jtag_dmi_ral.progbuf[i].write(.status(reg_status), .value(words[i]));
+      `DV_CHECK_EQ(reg_status, UVM_IS_OK)
+      `DV_CHECK(tl_mem_ral.program_buffer[i].predict(.value(words[i]), .kind(UVM_PREDICT_DIRECT)))
+    end
+
+    // Now read the program buffer back, this time over TL from the PROGRAM_BUFFER multiregister
+    for (int i = 0; i < 8; i++) begin
+      tl_mem_ral.program_buffer[i].mirror(.status(reg_status), .check(UVM_CHECK));
+      `DV_CHECK_EQ(reg_status, UVM_IS_OK)
+    end
   endtask
 
 endclass : rv_dm_progbuf_read_write_execute_vseq
diff --git a/hw/ip/spi_host/rtl/spi_host_fsm.sv b/hw/ip/spi_host/rtl/spi_host_fsm.sv
index b59e3376d72bc..1fe1077386c3e 100644
--- a/hw/ip/spi_host/rtl/spi_host_fsm.sv
+++ b/hw/ip/spi_host/rtl/spi_host_fsm.sv
@@ -591,7 +591,6 @@ module spi_host_fsm
     if (!rst_ni) begin
       sd_en_ff_q <= 0;
     end
-    //TODO: do we need an enable signal?
     else begin
       sd_en_ff_q <= sd_en_ff_d;
     end
@@ -612,36 +611,33 @@ module spi_host_fsm
     if (&csb_o) begin
       sd_en_o[3:0] = 4'h0;
     end else begin
-      // Only update the sd_en_o on the right clock transition. Since sck_o
-      // is generated from the sys clock we ensure we only drive the data on the
-      // right clock edge
-      if( (drive_posedge && sck_o) ||
-          (!drive_posedge && !sck_o) ) begin
-        unique case (speed_o)
-          Standard: begin
-            sd_en_o[0]   = cmd_wr_en_q | cmd_wr_en_last_bit;
-            sd_en_o[1]   = 1'b0;
-            sd_en_o[3:2] = 2'b00;
-          end
-          Dual:     begin
-            sd_en_o[1:0] = {2{cmd_wr_en_q}};
-            sd_en_o[3:2] = 2'b00;
-          end
-          Quad:     begin
-            sd_en_o[3:0] = {4{cmd_wr_en_q}};
-          end
-          default: begin
-            // invalid speed
-            sd_en_o[3:0] = 4'h0;
-          end
-        endcase
-      end
-      else begin
-        sd_en_o  = sd_en_ff_q;
-      end
+      unique case (speed_o)
+        Standard: begin
+          sd_en_o[0]   = cmd_wr_en_q | cmd_wr_en_last_bit;
+          sd_en_o[1]   = 1'b0;
+          sd_en_o[3:2] = 2'b00;
+        end
+        Dual:     begin
+          sd_en_o[1:0] = {2{cmd_wr_en_q}};
+          sd_en_o[3:2] = 2'b00;
+        end
+        Quad:     begin
+          sd_en_o[3:0] = {4{cmd_wr_en_q}};
+        end
+        default: begin
+          // invalid speed
+          sd_en_o[3:0] = 4'h0;
+        end
+      endcase
     end // else: !if(&csb_o)
   end
 
+  // The following signals are unused since their usages got removed in an ECO.  In order to
+  // minimize the netlist diff, the signals are kept in this code.
+  logic unused_sd_en_ff, unused_drive_posedge;
+  assign unused_sd_en_ff = ^{sd_en_ff_d, sd_en_ff_q};
+  assign unused_drive_posedge = drive_posedge;
+
   //
   // Assertions confirming valid user input.
   //
diff --git a/hw/ip/sram_ctrl/data/sram_ctrl.hjson b/hw/ip/sram_ctrl/data/sram_ctrl.hjson
index 4706329941290..835356f82351f 100644
--- a/hw/ip/sram_ctrl/data/sram_ctrl.hjson
+++ b/hw/ip/sram_ctrl/data/sram_ctrl.hjson
@@ -86,6 +86,13 @@
       expose:    "true",
       default:   "1"
     },
+    { name:      "NumPrinceRoundsHalf",
+      desc:      "Number of PRINCE half rounds for the SRAM scrambling feature",
+      type:      "int",
+      local:     "false",
+      expose:    "true",
+      default:   "3"
+    },
   ]
 
   features: [
diff --git a/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson b/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson
index 09b6313ccba57..d7e7ea85f988e 100644
--- a/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson
+++ b/hw/ip/sram_ctrl/dv/sram_ctrl_main_sim_cfg.hjson
@@ -12,5 +12,6 @@
 
   // These parameters are used for top_earlgrey main sram
   build_opts: ["+define+SRAM_ADDR_WIDTH=15",
-               "+define+INSTR_EXEC=1"]
+               "+define+INSTR_EXEC=1",
+               "+define+NUM_PRINCE_ROUNDS_HALF=2"]
 }
diff --git a/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson b/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson
index 576d5a7cb5cb2..0b2e75eb29974 100644
--- a/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson
+++ b/hw/ip/sram_ctrl/dv/sram_ctrl_ret_sim_cfg.hjson
@@ -12,5 +12,6 @@
 
   // These parameters are used for top_earlgrey retention sram
   build_opts: ["+define+SRAM_ADDR_WIDTH=10",
-               "+define+INSTR_EXEC=0"]
+               "+define+INSTR_EXEC=0",
+               "+define+NUM_PRINCE_ROUNDS_HALF=3"]
 }
diff --git a/hw/ip/sram_ctrl/dv/tb.sv b/hw/ip/sram_ctrl/dv/tb.sv
index d86f827642066..61e8d05a2a00e 100644
--- a/hw/ip/sram_ctrl/dv/tb.sv
+++ b/hw/ip/sram_ctrl/dv/tb.sv
@@ -63,7 +63,9 @@ module tb;
   sram_ctrl #(
     // memory size in bytes
     .MemSizeRam(4 * 2 ** `SRAM_ADDR_WIDTH),
-    .InstrExec(`INSTR_EXEC)
+    .InstrExec(`INSTR_EXEC),
+    // number of PRINCE half rounds for the SRAM scrambling feature
+    .NumPrinceRoundsHalf(`NUM_PRINCE_ROUNDS_HALF)
   ) dut (
     // main clock
     .clk_i               (clk                       ),
@@ -112,7 +114,8 @@ module tb;
                           .n_bits($bits(`SRAM_CTRL_MEM_HIER)),
                           // Due to the end-to-end bus integrity scheme, the memory primitive itself
                           // does not encode and decode the redundancy information.
-                          .err_detection_scheme(mem_bkdr_util_pkg::ErrDetectionNone));
+                          .err_detection_scheme(mem_bkdr_util_pkg::ErrDetectionNone),
+                          .num_prince_rounds_half(`NUM_PRINCE_ROUNDS_HALF));
 
     // drive clk and rst_n from clk_if
     clk_rst_if.set_active();
diff --git a/hw/ip/sram_ctrl/rtl/sram_ctrl.sv b/hw/ip/sram_ctrl/rtl/sram_ctrl.sv
index 52438c86c59b4..dad9dfee9327f 100644
--- a/hw/ip/sram_ctrl/rtl/sram_ctrl.sv
+++ b/hw/ip/sram_ctrl/rtl/sram_ctrl.sv
@@ -17,6 +17,11 @@ module sram_ctrl
   parameter logic [NumAlerts-1:0] AlertAsyncOn          = {NumAlerts{1'b1}},
   // Enables the execute from SRAM feature.
   parameter bit InstrExec                               = 1,
+  // Number of PRINCE half rounds for the SRAM scrambling feature, can be [1..5].
+  // Note that this needs to be low-latency, hence we have to keep the amount of cipher rounds low.
+  // PRINCE has 5 half rounds in its original form, which corresponds to 2*5 + 1 effective rounds.
+  // Setting this to 3 lowers this to approximately 7 effective rounds.
+  parameter int NumPrinceRoundsHalf                     = 3,
   // Random netlist constants
   parameter otp_ctrl_pkg::sram_key_t   RndCnstSramKey   = RndCnstSramKeyDefault,
   parameter otp_ctrl_pkg::sram_nonce_t RndCnstSramNonce = RndCnstSramNonceDefault,
@@ -535,7 +540,8 @@ module sram_ctrl
     .Width(DataWidth),
     .Depth(Depth),
     .EnableParity(0),
-    .DataBitsPerMask(DataWidth)
+    .DataBitsPerMask(DataWidth),
+    .NumPrinceRoundsHalf(NumPrinceRoundsHalf)
   ) u_prim_ram_1p_scr (
     .clk_i,
     .rst_ni,
diff --git a/hw/ip/tlul/data/tlul_testplan.hjson b/hw/ip/tlul/data/tlul_testplan.hjson
index fd53a303914ae..d181b27ce6df9 100644
--- a/hw/ip/tlul/data/tlul_testplan.hjson
+++ b/hw/ip/tlul/data/tlul_testplan.hjson
@@ -10,12 +10,14 @@
       name: xbar_smoke
       desc: '''Sequentially test each host to access any device'''
       stage: V1
+      si_stage: NA
       tests: ["xbar_smoke"]
     }
     {
       name: xbar_base_random_sequence
       desc: '''Enable all hosts to randomly send transactions to any device'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_random"]
     }
     {
@@ -25,6 +27,7 @@
             - Large delay from 0 ~ 1000 cycles
             - Small delay (0-10 cycles) for a_channel, large delay (0-1000 cycles) for d_channel'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_smoke_zero_delays", "xbar_smoke_large_delays", "xbar_smoke_slow_rsp",
               "xbar_random_zero_delays", "xbar_random_large_delays", "xbar_random_slow_rsp"]
     }
@@ -35,6 +38,7 @@
             - Ensure DUT returns d_error=1 if address is unmapped and transaction isn't passed down
               to any device'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_unmapped_addr", "xbar_error_and_unmapped_addr"]
     }
     {
@@ -43,6 +47,7 @@
             - Drive any random value on size, mask, opcode in both channels
             - Ensure everything just pass through host to device or device to host'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_error_random", "xbar_error_and_unmapped_addr"]
     }
     {
@@ -52,12 +57,14 @@
             - If the device isn't accessible for the host, let the host randomly access the other
               devices'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_access_same_device", "xbar_access_same_device_slow_rsp"]
     }
     {
       name: xbar_all_hosts_use_same_source_id
       desc: '''Test all hosts use same ID at the same same'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_same_source"]
     }
     {
@@ -66,6 +73,7 @@
             - Combine all sequences and run in parallel
             - Add random reset between each iteration'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_stress_all", "xbar_stress_all_with_error"]
     }
     {
@@ -75,6 +83,7 @@
               stress seq and then start a new stress seq
             - Run a few iteration to ensure reset doesn't break the design'''
       stage: V2
+      si_stage: NA
       tests: ["xbar_stress_all_with_rand_reset", "xbar_stress_all_with_reset_error"]
     }
   ]
diff --git a/hw/ip/tlul/rtl/tlul_sram_byte.sv b/hw/ip/tlul/rtl/tlul_sram_byte.sv
index f827f4f534949..d4ca08a4771a4 100644
--- a/hw/ip/tlul/rtl/tlul_sram_byte.sv
+++ b/hw/ip/tlul/rtl/tlul_sram_byte.sv
@@ -262,8 +262,8 @@ module tlul_sram_byte import tlul_pkg::*; #(
             rdback_wait    = 1'b1;
             rdback_check_d = MuBi4False;
 
-            // Perform the readback check. Omit the check if the transaction contains an error.
-            if (!rdback_chk_ok && !error_i) begin
+            // Perform the readback check.
+            if (!rdback_chk_ok) begin
               alert_o = 1'b1;
             end
           end
diff --git a/hw/ip/usbdev/data/usbdev_testplan.hjson b/hw/ip/usbdev/data/usbdev_testplan.hjson
index 329f4666082e5..30810b1463571 100644
--- a/hw/ip/usbdev/data/usbdev_testplan.hjson
+++ b/hw/ip/usbdev/data/usbdev_testplan.hjson
@@ -1193,6 +1193,30 @@
       stage: V2
       tests: ["usbdev_fifo_rst"]
     }
+    {
+      name: usbdev_tx_rx_disruption
+      desc: '''
+            Verify that the DUT is still capable of transmitting and receiving after a spontaneous
+            disruption to the connection during transmission or reception, without requiring an
+            IP block reset. On some implementations resetting of individual IP blocks may not be
+            an option.
+
+            Note that after a Bus Reset the USB host must restart the entire device addressing and
+            configuration sequence, so the first transmissions will be SOF and SETUP packets.
+
+            - Configure the device, choosing an endpoint and choose whether to transmit or receive.
+            - Choose the moment at which the link reset shall occur.
+            - Transmit/receive a partial transaction before instructing the driver to perform a
+              USB Bus Reset.
+            - Reconfigure the device _without_ resetting the block or even the FIFO state, since
+              normally the software will rely upon its knowledge of the device state in handling
+              a Bus Reset.
+            - Retry transmission or reception to/from the device both to the previously-active
+              endpoint and to a different endpoint to guard against persistent internal state.
+            '''
+      stage: V2
+      tests: ["usbdev_tx_rx_disruption"]
+    }
     {
       name: dpi_config_host
       desc: '''
diff --git a/hw/ip/usbdev/dv/cov/usbdev_unr_excl.el b/hw/ip/usbdev/dv/cov/usbdev_unr_excl.el
new file mode 100644
index 0000000000000..165fddc759256
--- /dev/null
+++ b/hw/ip/usbdev/dv/cov/usbdev_unr_excl.el
@@ -0,0 +1,442 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//==================================================
+// This file contains the Excluded objects
+// Generated By User: gdessouky
+// Format Version: 2
+// Date: Wed Aug  7 13:33:09 2024
+// ExclMode: default
+//==================================================
+CHECKSUM: "3387628951 1792109872"
+INSTANCE: tb.dut.u_reg.u_wake_events_cdc.u_src_to_dst_req
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2359369666" "(src_level ^ src_pulse_i) 1 -1" (3 "10")
+CHECKSUM: "2629070671 4199846824"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_in_pe
+ANNOTATION: "VC_COV_UNR"
+Condition 8 "2275772612" "((in_xact_state == StSendData) && tx_data_get_i) 1 -1" (1 "01")
+CHECKSUM: "3215070453 3446030929"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_sramreqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Block 19 "4019242409" "wptr_wrap_cnt_q <= (wptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+ANNOTATION: "VC_COV_UNR"
+Block 28 "1113085816" "rptr_wrap_cnt_q <= (rptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+CHECKSUM: "3215070453 3446030929"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_rspfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Block 19 "4019242409" "wptr_wrap_cnt_q <= (wptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+ANNOTATION: "VC_COV_UNR"
+Block 28 "1113085816" "rptr_wrap_cnt_q <= (rptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+CHECKSUM: "3215070453 3446030929"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_reqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Block 19 "4019242409" "wptr_wrap_cnt_q <= (wptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+ANNOTATION: "VC_COV_UNR"
+Block 28 "1113085816" "rptr_wrap_cnt_q <= (rptr_wrap_cnt_q + {{(WrapPtrW - 1) {1'b0}}, 1'b1});"
+CHECKSUM: "2422748304 4058302001"
+INSTANCE: tb.dut.usbdev_impl.u_usbdev_linkstate
+ANNOTATION: "VC_COV_UNR"
+Block 45 "3824467478" "link_state_d = LinkDisconnected;"
+ANNOTATION: "VC_COV_UNR"
+Block 64 "1515454339" "link_rst_state_d = NoRst;"
+ANNOTATION: "VC_COV_UNR"
+Block 83 "3162102996" "link_inac_state_d = Active;"
+CHECKSUM: "3366248665 2379607661"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx
+ANNOTATION: "VC_COV_UNR"
+Block 50 "2865494160" "state_d = Idle;"
+ANNOTATION: "VC_COV_UNR"
+Block 84 "1129912420" "out_state_d = OsIdle;"
+CHECKSUM: "1206032831 4011300726"
+INSTANCE: tb.dut.usbdev_impl
+ANNOTATION: "VC_COV_UNR"
+Block 22 "3369720822" "wdata_d[7:0] = out_ep_data;"
+CHECKSUM: "2629070671 675897418"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_in_pe
+ANNOTATION: "VC_COV_UNR"
+Block 34 "2490421007" "in_xact_state_next = StWaitAckStart;"
+ANNOTATION: "VC_COV_UNR"
+Block 52 "2498383491" "in_xact_state_next = StIdle;"
+CHECKSUM: "2829124083 2534056014"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_out_pe
+ANNOTATION: "VC_COV_UNR"
+Block 59 "2995797590" "out_xact_state_next = StIdle;"
+CHECKSUM: "1249231444 3329409487"
+INSTANCE: tb.dut.u_reg.u_wake_events_cdc
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2345700748" "((src_busy_q && src_ack) || (src_update && ((!busy)))) 1 -1" (3 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "833137803" "(src_busy_q && src_ack) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "833137803" "(src_busy_q && src_ack) 1 -1" (3 "11")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "566298183" "(src_update && ((!busy))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 5 "2123224275" "(src_busy_q & ((!src_ack))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 5 "2123224275" "(src_busy_q & ((!src_ack))) 1 -1" (3 "11")
+CHECKSUM: "2629070671 2432947071"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_in_pe
+Fsm in_xact_state "2432947071"
+ANNOTATION: "VC_COV_UNR"
+Transition StSendData->StWaitAckStart "2->4"
+CHECKSUM: "2551375121 3386447066"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_rx
+ANNOTATION: "VC_COV_UNR"
+Condition 15 "3993770507" "(token_payload_done && pkt_is_token) 1 -1" (2 "10")
+CHECKSUM: "2422748304 1897192179"
+INSTANCE: tb.dut.usbdev_impl.u_usbdev_linkstate
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "4200481268" "(see_pwr_sense & usb_pullup_en_i) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "4200481268" "(see_pwr_sense & usb_pullup_en_i) 1 -1" (2 "10")
+CHECKSUM: "4228571573 631566033"
+INSTANCE: tb.dut
+ANNOTATION: "VC_COV_UNR"
+Condition 26 "711018649" "(reg2hw.rxfifo.ep.re | reg2hw.rxfifo.setup.re | reg2hw.rxfifo.size.re | reg2hw.rxfifo.buffer.re) 1 -1" (2 "0001")
+ANNOTATION: "VC_COV_UNR"
+Condition 26 "711018649" "(reg2hw.rxfifo.ep.re | reg2hw.rxfifo.setup.re | reg2hw.rxfifo.size.re | reg2hw.rxfifo.buffer.re) 1 -1" (3 "0010")
+ANNOTATION: "VC_COV_UNR"
+Condition 26 "711018649" "(reg2hw.rxfifo.ep.re | reg2hw.rxfifo.setup.re | reg2hw.rxfifo.size.re | reg2hw.rxfifo.buffer.re) 1 -1" (4 "0100")
+ANNOTATION: "VC_COV_UNR"
+Condition 26 "711018649" "(reg2hw.rxfifo.ep.re | reg2hw.rxfifo.setup.re | reg2hw.rxfifo.size.re | reg2hw.rxfifo.buffer.re) 1 -1" (5 "1000")
+ANNOTATION: "VC_COV_UNR"
+Condition 30 "4133145744" "(reg2hw.out_data_toggle.status.qe & reg2hw.out_data_toggle.mask.qe) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 30 "4133145744" "(reg2hw.out_data_toggle.status.qe & reg2hw.out_data_toggle.mask.qe) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 31 "251117446" "(reg2hw.in_data_toggle.status.qe & reg2hw.in_data_toggle.mask.qe) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 31 "251117446" "(reg2hw.in_data_toggle.status.qe & reg2hw.in_data_toggle.mask.qe) 1 -1" (2 "10")
+CHECKSUM: "1746381268 1271541636"
+INSTANCE: tb.dut.u_reg.u_socket
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "118253128" "(tl_t_o.a_valid & tl_t_i.a_ready) 1 -1" (1 "01")
+CHECKSUM: "74367784 3785313510"
+INSTANCE: tb.dut.u_reg.u_reg_if
+ANNOTATION: "VC_COV_UNR"
+Condition 18 "3340270436" "(addr_align_err | malformed_meta_err | tl_err | instr_error | intg_error) 1 -1" (5 "01000")
+CHECKSUM: "2815520955 4109606122"
+INSTANCE: tb.dut.u_reg.u_wake_events_cdc.u_arb
+ANNOTATION: "VC_COV_UNR"
+Condition 5 "593451913" "(((!gen_wr_req.dst_req)) && gen_wr_req.dst_lat_d) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 7 "2602167579" "(dst_update_i & (dst_qs_o != dst_ds_i)) 1 -1" (1 "01")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_intr_state_pkt_received
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_intr_state_pkt_sent
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_intr_state_av_out_empty
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_intr_state_rx_full
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_intr_state_av_setup_empty
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_wake_events_module_active
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_wake_events_disconnected
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_wake_events_bus_reset
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "4255502330 3274445021"
+INSTANCE: tb.dut.u_reg.u_wake_events_bus_not_idle
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2397158838" "(wr_en ? wr_data : qs) 1 -1" (1 "0")
+CHECKSUM: "2203170140 405589182"
+INSTANCE: tb.dut.u_ctr_out
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "274091365" "((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0) 1 -1" (1 "0")
+CHECKSUM: "2203170140 405589182"
+INSTANCE: tb.dut.u_ctr_in
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "274091365" "((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0) 1 -1" (1 "0")
+CHECKSUM: "2203170140 405589182"
+INSTANCE: tb.dut.u_ctr_nodata_in
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "274091365" "((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0) 1 -1" (1 "0")
+CHECKSUM: "2203170140 3717373046"
+INSTANCE: tb.dut.u_ctr_errors
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2105047783" "(((|((ev_enables & event_i) & (~event_q)))) & ep_enabled) 1 -1" (2 "10")
+CHECKSUM: "3576666508 1200292870"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "3638058042" "(rspfifo_rdata.error | reqfifo_rdata.error) 1 -1" (3 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 8 "3066913128" "(intg_error | rsp_fifo_error | sramreqfifo_error | reqfifo_error | intg_error_q) 1 -1" (2 "00001")
+ANNOTATION: "VC_COV_UNR"
+Condition 21 "3623514242" "(d_valid & reqfifo_rvalid & rspfifo_rvalid & (reqfifo_rdata.op == OpRead)) 1 -1" (1 "0111")
+ANNOTATION: "VC_COV_UNR"
+Condition 21 "3623514242" "(d_valid & reqfifo_rvalid & rspfifo_rvalid & (reqfifo_rdata.op == OpRead)) 1 -1" (2 "1011")
+ANNOTATION: "VC_COV_UNR"
+Condition 21 "3623514242" "(d_valid & reqfifo_rvalid & rspfifo_rvalid & (reqfifo_rdata.op == OpRead)) 1 -1" (4 "1110")
+ANNOTATION: "VC_COV_UNR"
+Condition 24 "1059982851" "(vld_rd_rsp & ((~d_error))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 25 "2807788926" "((vld_rd_rsp && reqfifo_rdata.error) ? error_blanking_integ : (vld_rd_rsp ? rspfifo_rdata.data_intg : prim_secded_pkg::SecdedInv3932ZeroEcc)) 1 -1" (2 "1")
+ANNOTATION: "VC_COV_UNR"
+Condition 26 "561780173" "(vld_rd_rsp && reqfifo_rdata.error) 1 -1" (3 "11")
+ANNOTATION: "VC_COV_UNR"
+Condition 34 "201396280" "(d_valid && d_error) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 35 "3680494467" "((gnt_i | missed_err_gnt_q) & reqfifo_wready & sramreqfifo_wready & sramreqaddrfifo_wready) 1 -1" (3 "1101")
+ANNOTATION: "VC_COV_UNR"
+Condition 37 "2164803938" "(tl_i_int.a_valid & reqfifo_wready & ((~error_internal))) 1 -1" (1 "011")
+ANNOTATION: "VC_COV_UNR"
+Condition 43 "721931741" "(rvalid_i & reqfifo_rvalid) 1 -1" (2 "10")
+ANNOTATION: "vcs_gen_start:i=0:vcs_gen_end:VC_COV_UNR"
+Condition 47 "1163750833" "(((|wmask_intg)) & ((|wdata_intg))) 1 -1" (1 "01")
+CHECKSUM: "7115036 2825631531"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_sramreqfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "101")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (1 "011")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "101")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "7115036 2432857915"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_rspfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "101")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (1 "011")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 6 "4208363759" "(gen_normal_fifo.fifo_empty && wvalid_i) 1 -1" (1 "01")
+CHECKSUM: "7115036 3660765074"
+INSTANCE: tb.dut.usbdev_avsetupfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "7115036 3660765074"
+INSTANCE: tb.dut.usbdev_avoutfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "7115036 3923796707"
+INSTANCE: tb.dut.usbdev_rxfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "101")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "7115036 3923796707"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_reqfifo
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "1709501387" "(((~gen_normal_fifo.empty)) & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (2 "101")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "786039886" "(wvalid_i & wready_o & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (1 "011")
+ANNOTATION: "VC_COV_UNR"
+Condition 4 "1324655787" "(rvalid_o & rready_i & ((~gen_normal_fifo.under_rst))) 1 -1" (3 "110")
+CHECKSUM: "3643792208 1147758610"
+INSTANCE: tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "700807773" "(dst_req_o & dst_ack_i) 1 -1" (1 "01")
+ANNOTATION: "VC_COV_UNR"
+Condition 2 "700807773" "(dst_req_o & dst_ack_i) 1 -1" (2 "10")
+CHECKSUM: "3215070453 33318353"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_reqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2532211833" "(incr_wptr_i & (wptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "2597027294" "(incr_rptr_i & (rptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 8 "1599734576" "((wptr_wrap_msb == rptr_wrap_msb) ? ((1'(wptr_o) - 1'(rptr_o))) : (((1'(Depth) - 1'(rptr_o)) + 1'(wptr_o)))) 1 -1" (1 "0")
+ANNOTATION: "VC_COV_UNR"
+Condition 9 "446195871" "(wptr_wrap_msb == rptr_wrap_msb) 1 -1" (1 "0")
+CHECKSUM: "3215070453 33318353"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_sramreqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2532211833" "(incr_wptr_i & (wptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "2597027294" "(incr_rptr_i & (rptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 8 "1599734576" "((wptr_wrap_msb == rptr_wrap_msb) ? ((1'(wptr_o) - 1'(rptr_o))) : (((1'(Depth) - 1'(rptr_o)) + 1'(wptr_o)))) 1 -1" (1 "0")
+ANNOTATION: "VC_COV_UNR"
+Condition 9 "446195871" "(wptr_wrap_msb == rptr_wrap_msb) 1 -1" (1 "0")
+CHECKSUM: "3215070453 33318353"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_rspfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Condition 1 "2532211833" "(incr_wptr_i & (wptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 3 "2597027294" "(incr_rptr_i & (rptr_o == 1'((Depth - 1)))) 1 -1" (2 "10")
+ANNOTATION: "VC_COV_UNR"
+Condition 8 "1599734576" "((wptr_wrap_msb == rptr_wrap_msb) ? ((1'(wptr_o) - 1'(rptr_o))) : (((1'(Depth) - 1'(rptr_o)) + 1'(wptr_o)))) 1 -1" (1 "0")
+ANNOTATION: "VC_COV_UNR"
+Condition 9 "446195871" "(wptr_wrap_msb == rptr_wrap_msb) 1 -1" (1 "0")
+CHECKSUM: "2629070671 1575945479"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_in_pe
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "631187576" "in_xact_state" (7) "in_xact_state StSendData ,-,-,-,-,1,0,1,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "631187576" "in_xact_state" (20) "in_xact_state default,-,-,-,-,-,-,-,-,-,-,-,-,-,-"
+CHECKSUM: "2829124083 11221466"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_nb_out_pe
+ANNOTATION: "VC_COV_UNR"
+Branch 3 "1318794972" "out_xact_state" (17) "out_xact_state default,-,-,-,-,-,-,-,-,-,-,-,-"
+CHECKSUM: "3366248665 981789331"
+INSTANCE: tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx
+ANNOTATION: "VC_COV_UNR"
+Branch 6 "3692372780" "state_q" (18) "state_q default,-,-,-,-,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 12 "3476938316" "out_state_q" (6) "out_state_q default,-,-,-"
+CHECKSUM: "1206032831 770330853"
+INSTANCE: tb.dut.usbdev_impl
+ANNOTATION: "VC_COV_UNR"
+Branch 8 "87426669" "out_ep_put_addr[1:0]" (4) "out_ep_put_addr[1:0] default"
+CHECKSUM: "2422748304 2960503212"
+INSTANCE: tb.dut.usbdev_impl.u_usbdev_linkstate
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "2905358650" "((!see_pwr_sense) || (!usb_pullup_en_i))" (2) "((!see_pwr_sense) || (!usb_pullup_en_i)) 0,LinkDisconnected ,0,-,-,-,-,-,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "2905358650" "((!see_pwr_sense) || (!usb_pullup_en_i))" (21) "((!see_pwr_sense) || (!usb_pullup_en_i)) 0,default,-,-,-,-,-,-,-,-,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 3 "2411977692" "link_rst_state_q" (8) "link_rst_state_q default,-,-,-,-,-"
+ANNOTATION: "VC_COV_UNR"
+Branch 5 "1387831816" "link_inac_state_q" (8) "link_inac_state_q default,-,-,-,-,-"
+CHECKSUM: "1746381268 3161287359"
+INSTANCE: tb.dut.u_reg.u_socket
+ANNOTATION: "VC_COV_UNR"
+Branch 4 "3202860295" "(!rst_ni)" (2) "(!rst_ni) 0,1,0,-"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_intr_state_pkt_received
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_intr_state_pkt_sent
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_intr_state_av_out_empty
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_intr_state_rx_full
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_intr_state_av_setup_empty
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_wake_events_module_active
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_wake_events_disconnected
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_wake_events_bus_reset
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "4255502330 3554514034"
+INSTANCE: tb.dut.u_reg.u_wake_events_bus_not_idle
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "3759852512" "wr_en" (1) "wr_en 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1017474648" "(!rst_ni)" (2) "(!rst_ni) 0,0"
+CHECKSUM: "2203170140 3043321356"
+INSTANCE: tb.dut.u_ctr_out
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "2609099084" "(ep_i < 4'(NEndpoints))" (1) "(ep_i < 4'(NEndpoints)) 0"
+CHECKSUM: "2203170140 3043321356"
+INSTANCE: tb.dut.u_ctr_in
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "2609099084" "(ep_i < 4'(NEndpoints))" (1) "(ep_i < 4'(NEndpoints)) 0"
+CHECKSUM: "2203170140 3043321356"
+INSTANCE: tb.dut.u_ctr_nodata_in
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "2609099084" "(ep_i < 4'(NEndpoints))" (1) "(ep_i < 4'(NEndpoints)) 0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "1367129303" "(!rst_ni)" (4) "(!rst_ni) 0,-,0"
+CHECKSUM: "2203170140 521126612"
+INSTANCE: tb.dut.u_ctr_errors
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "1367129303" "(!rst_ni)" (2) "(!rst_ni) 0,0,-"
+CHECKSUM: "3576666508 1924774061"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "1058271942" "(vld_rd_rsp && reqfifo_rdata.error)" (0) "(vld_rd_rsp && reqfifo_rdata.error) 1,-"
+CHECKSUM: "3215070453 1827096802"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_reqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "721764659" "full_o" (2) "full_o 0,0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "2417346495" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "456961687" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
+CHECKSUM: "3215070453 1827096802"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_sramreqfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "721764659" "full_o" (2) "full_o 0,0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "2417346495" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "456961687" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
+CHECKSUM: "3215070453 1827096802"
+INSTANCE: tb.dut.gen_no_stubbed_memory.u_tlul2sram.u_rspfifo.gen_normal_fifo.u_fifo_cnt
+ANNOTATION: "VC_COV_UNR"
+Branch 0 "721764659" "full_o" (2) "full_o 0,0"
+ANNOTATION: "VC_COV_UNR"
+Branch 1 "2417346495" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
+ANNOTATION: "VC_COV_UNR"
+Branch 2 "456961687" "(!rst_ni)" (3) "(!rst_ni) 0,0,0,1"
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_base_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_base_vseq.sv
index e6b9930057264..f737a046302d5 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_base_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_base_vseq.sv
@@ -50,6 +50,10 @@ bit inject_invalid_data_sync = 1'b0;
 bit inject_bad_token_crc5 = 1'b0;
 bit inject_bad_data_crc16 = 1'b0;
 
+// Truncated transmission and reception of packets.
+int unsigned disrupt_tx_bits = 0;  // 0 = no disruption; transmit entire packet.
+int unsigned disrupt_rx_bits = 0;  // 0 = receive entire response.
+
 // Bus events/stimuli to be presented during the sequence
 //   (these are used in the `aon_wake_` and `rand_bus...` tests points).
 bit do_reset_signaling  = 1'b0;
@@ -287,16 +291,20 @@ endtask
 
   // Wait for the DUT to enter one of the given link states, with an optional timeout
   //   (the default of -1 disables the timeout).
+  //
   // Link state transitions occur in response to bus activity from the host driving the USB.
+  // The link state is polled via the `usbstat` register every 128 clock ticks unless the requested
+  // timeout is shorter than that.
   virtual task wait_for_link_state(usbdev_link_state_e states[], int timeout_clks = -1,
                                    bit fatal = 1);
     // Wait until the given state is attained or the (optionally
     usbdev_link_state_e rd;
     do begin
+      int delay_clks = (timeout_clks >= 0 && timeout_clks < 128) ? timeout_clks : 128;
       uvm_reg_data_t data;
       // Delay and if timeout was requested, decrease the cycle count.
-      cfg.clk_rst_vif.wait_clks(128);
-      if (timeout_clks >= 0) timeout_clks -= (timeout_clks > 128) ? 128 : timeout_clks;
+      cfg.clk_rst_vif.wait_clks(delay_clks);
+      if (timeout_clks >= 0) timeout_clks -= delay_clks;
       csr_rd(.ptr(ral.usbstat.link_state), .value(data));
       rd = usbdev_link_state_e'(data);
     end while (!(rd inside {states}) && (timeout_clks != 0));
@@ -327,6 +335,10 @@ endtask
     assert(m_token_pkt.randomize() with {m_token_pkt.address == target_addr;
                                          m_token_pkt.endpoint == ep;});
     m_token_pkt.await_response = await_response;
+    // Number of bit intervals after which to stop transmission (0 = send entire packet).
+    m_token_pkt.bits_to_transmit = disrupt_tx_bits;
+    // Number of bit intervals of any data packet to receive.
+    m_token_pkt.bits_to_receive = disrupt_rx_bits;
     // Any fault injections requested?
     if (inject_invalid_token_sync) m_token_pkt.valid_sync = 1'b0;
     if (inject_bad_token_crc5) m_token_pkt.crc5 = ~m_token_pkt.crc5;
@@ -346,6 +358,10 @@ endtask
       m_data_pkt.m_usb_transfer = usb_transfer_e'(IsoTrans);
     end
     m_data_pkt.set_data(data);  // This also completes the CRC16.
+    // Number of bit intervals after which to stop transmission (0 = send entire packet).
+    m_data_pkt.bits_to_transmit = disrupt_tx_bits;
+    // Number of bit intervals of any handshake packet to receive.
+    m_data_pkt.bits_to_receive = disrupt_rx_bits;
     // Any fault injections requested?
     if (inject_invalid_data_sync) m_data_pkt.valid_sync = 1'b0;
     if (inject_bad_data_crc16) m_data_pkt.crc16 = ~m_data_pkt.crc16;
@@ -368,6 +384,8 @@ endtask
     end
     `DV_CHECK_RANDOMIZE_WITH_FATAL(m_data_pkt,
                                    !randomize_length -> m_data_pkt.data.size() == num_of_bytes;)
+    // Number of bit intervals after which to stop transmission (0 = send entire packet).
+    m_data_pkt.bits_to_transmit = disrupt_tx_bits;
     // Any fault injections requested?
     if (inject_invalid_data_sync) m_data_pkt.valid_sync = 1'b0;
     if (inject_bad_data_crc16) m_data_pkt.crc16 = ~m_data_pkt.crc16;
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_bitstuff_err_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_bitstuff_err_vseq.sv
index efa382e1ac5c5..970ad48ffe3eb 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_bitstuff_err_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_bitstuff_err_vseq.sv
@@ -23,6 +23,11 @@ class usbdev_bitstuff_err_vseq extends usbdev_base_vseq;
       // so ensure that the endpoint has its MSB clear.
       `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(ep_default, ep_default < 8;)
       sel = sel & 1;  // We can only exercise cases 0 and 1.
+
+      // We also must ensure that a randomly-chosen device address and endpoint cannot, in
+      // combination with the OUT PID, produce a bit stuffing error in the OUT token packet. Doing
+      // so could lead to a PID error being reported too.
+      `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(dev_addr, dev_addr < 7'h40 && !dev_addr[0];)
     end
 
     configure_out_trans(ep_default);
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_iso_retraction_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_iso_retraction_vseq.sv
index 0e9765c8ee048..a979c03414f1e 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_iso_retraction_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_iso_retraction_vseq.sv
@@ -180,5 +180,10 @@ class usbdev_iso_retraction_vseq extends usbdev_base_vseq;
       end
     end
     if (pkts_rcvd != pkts_sent) `uvm_fatal(`gfn, "Device- and host-side do not agree")
+
+    // Deactivate the DUT.
+    usbdev_disconnect();
+    csr_wr(.ptr(ral.in_iso[0].iso[ep_default]), .value(1'b0));
+    csr_wr(.ptr(ral.ep_in_enable[0].enable[ep_default]), .value(1'b0));
   endtask
 endclass : usbdev_iso_retraction_vseq
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_link_suspend_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_link_suspend_vseq.sv
index e1464a50a3980..49e3199412ca7 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_link_suspend_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_link_suspend_vseq.sv
@@ -14,10 +14,13 @@ class usbdev_link_suspend_vseq extends usbdev_pkt_sent_vseq;
   // Generate traffic at the start of the test?
   rand bit gen_traffic;
 
+  // Generate a VBUS Disconnection when not (yet) Suspended?
+  rand bit gen_disconnect_not_suspended;
+
   // Generate a Bus Reset when not (yet) Suspended?
   rand bit gen_reset_not_suspended;
 
-  // Generate a Bus Reset when ..Suspended?
+  // Generate a Bus Reset when (Powered)Suspended?
   rand bit gen_reset_suspended;
 
   // Duration of Bus Reset Signaling in microseconds.
@@ -44,11 +47,28 @@ class usbdev_link_suspend_vseq extends usbdev_pkt_sent_vseq;
   //  (Start Of Frame packets are 1ms apart, and 32 bits in duration like other token packets.)
   uint inter_sof_delay_clks = 1_000 * 48 - (32 * 4);  // 4 times oversampling per bit.
 
+  // Disconnect and reconnect the VBUS/SENSE signal.
+  task disconnect_and_reconnect();
+    set_vbus_state(0);
+
+    // VBUS/SENSE signal is filtered, so this link state change takes slightly longer than some
+    // other state changes.
+    wait_for_link_state({LinkDisconnected}, .timeout_clks(12), .fatal(1));
+
+    set_vbus_state(1);
+
+    // Wait a couple of microseconds with the USB in Idle because the next thing we must do is
+    // perform a Bus Reset.
+    cfg.clk_rst_vif.wait_clks(2 * 48);
+  endtask
+
   // Configure, run and suspend the DUT; this task is called by derived sequences.
   task run_and_suspend();
     // Declare our choices.
     `uvm_info(`gfn, $sformatf("Traffic %0d reset_not_suspended %0d reset_suspended %0d",
                               gen_traffic, gen_reset_not_suspended, gen_reset_suspended), UVM_LOW)
+    `uvm_info(`gfn, $sformatf(" disconnect_not_suspended %0d", gen_disconnect_not_suspended),
+              UVM_LOW)
 
     if (gen_traffic) begin
       // Send transaction to make link active
@@ -83,8 +103,10 @@ class usbdev_link_suspend_vseq extends usbdev_pkt_sent_vseq;
     // Ensure the interrupt is not presently asserted.
     csr_wr(.ptr(ral.intr_state), .value(1 << IntrLinkSuspend));
 
-    // Shall we try generating a Bus Reset from the `Powered`/`Active` state?
-    if (gen_reset_not_suspended) begin
+    // Shall we try generating a VBUS Disconnect/Bus Reset from the `Powered`/`Active` state?
+    if (gen_disconnect_not_suspended) disconnect_and_reconnect();
+    // ... if we've just disconnected and reconnected we must perform a Bus Reset now anyway.
+    if (gen_disconnect_not_suspended | gen_reset_not_suspended) begin
       send_bus_reset(link_bus_reset_usecs);
 
       // Either should transition us to `ActiveNoSOF` because the USB link is now up but we have not
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_low_speed_traffic_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_low_speed_traffic_vseq.sv
index 5228fe1617e3f..d76877837f95b 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_low_speed_traffic_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_low_speed_traffic_vseq.sv
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-class usbdev_low_speed_traffic_vseq extends usbdev_max_non_iso_usb_traffic_vseq;
+class usbdev_low_speed_traffic_vseq extends usbdev_max_usb_traffic_vseq;
   `uvm_object_utils(usbdev_low_speed_traffic_vseq)
 
   `uvm_object_new
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_spray_packets_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_spray_packets_vseq.sv
index 98c0b2828b2d7..09e5febd7bec6 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_spray_packets_vseq.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_spray_packets_vseq.sv
@@ -140,7 +140,13 @@ class usbdev_spray_packets_vseq extends usbdev_base_vseq;
   task transaction_pre(bit acceptable, bit stall_expected, ref byte unsigned data[$],
                       output bit rx_expected);
     low_speed_traffic = 1'b1;
-    send_setup_packet(target_ep, data, target_addr);
+    // Send all three transaction types as if to a Low Speed device; downstream traffic to actual
+    // Low Speed device is propagated by hubs, but must be ignored by the DUT.
+    randcase
+      1: send_setup_packet(target_ep, data, target_addr);
+      1: send_token_packet(target_ep, PidTypeInToken, target_addr);
+      1: send_out_packet(target_ep, ($urandom & 1) ? PidTypeData1 : PidTypeData0, data);
+    endcase
     low_speed_traffic = 1'b0;
     // Low Speed traffic prefixed with a PRE token shall never be received!
     rx_expected = 0;
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_tx_rx_disruption_vseq.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_tx_rx_disruption_vseq.sv
new file mode 100644
index 0000000000000..a3741e6b70c86
--- /dev/null
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_tx_rx_disruption_vseq.sv
@@ -0,0 +1,145 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class usbdev_tx_rx_disruption_vseq extends usbdev_smoke_vseq;
+  `uvm_object_utils(usbdev_tx_rx_disruption_vseq)
+
+  `uvm_object_new
+
+  // The type of disruption stimulus to generate.
+  typedef enum {
+    StimType_IPReset,
+    StimType_BusReset,
+    StimType_Disconnect
+  } stim_type_e;
+
+  // The type of transaction to interrupt.
+  typedef enum {
+    TxnType_SETUP,
+    TxnType_OUT,
+    TxnType_IN
+  } txn_type_e;
+
+  rand txn_type_e txn_type;   // The type of transaction to disrupt.
+  rand bit disrupt_data;      // Disrupt the DATA packet rather than the token packet?
+  rand stim_type_e stim_type; // Type of stimulus to be applied.
+
+  // We run this sequence in normal differential mode (DP/DN for both IN and OUT) as well as
+  // using 'd_se0' for transmission to help with coverage numbers.
+  virtual task pre_start();
+    phy_tx_use_d_se0 = $urandom & 1;
+    super.pre_start();
+  endtask
+
+  virtual task body;
+    // It can take 3-4 microseconds for the DUT to spot a link reset condition and we wish to be
+    // able to induce one whilst it is still within what it thinks is the data field of a DATA
+    // packet, so that must take at least 4 microseconds to transmit; this is 4 x 12 = 48 bit
+    // intervals, or 6 bytes; making them appreciably longer just makes it less likely that we hit
+    // the CRC bytes.
+    byte unsigned data[$];
+    // For attaining coverage numbers, however, we also want to ensure the 'out_state_q' FSM in
+    // `usb_fs_tx` is observed moving through each of its 4 transitions, and there's only a 1/32
+    // probability of a `link_reset` starting in the single cycle of fetch a new byte from the
+    // packet buffer RAM, so use some longer packets too.
+    uint data_bytes = ($urandom & 1) ? MaxPktSizeByte : 8;
+    // Report choices.
+    string stim_desc;
+    case (stim_type)
+      StimType_IPReset:    stim_desc = "IP Reset";
+      StimType_BusReset:   stim_desc = "Bus Reset";
+      StimType_Disconnect: stim_desc = "Disconnect";
+      default:             `uvm_fatal(`gfn, $sformatf("Invalid/unsupported stimulus %p", stim_type))
+    endcase
+    `uvm_info(`gfn, $sformatf("Disrupting %p data %0d with %s", txn_type, disrupt_data, stim_desc),
+              UVM_LOW)
+    // Use zeros for transferred data to avoid bit stuffing; we then guarantee that the tx/rx
+    // _can_ be disrupted in the CRC at the packet end.
+    repeat (data_bytes) data.push_back(0);
+
+    // Set up the device and run the smoke sequence.
+    super.body();
+
+    // Initiate the transaction that we are going to disrupt.
+    //
+    // Keep the packets short; greater likelihood of disruption within the packet overhead (SYNC,
+    // PID, CRC...), and it's also compatible with standard SETUP DATA packets.
+    case (txn_type)
+      TxnType_SETUP, TxnType_OUT: begin
+        disrupt_tx_bits = disrupt_data ? 0 : $urandom_range(1, 31);  // Token packets are 32 bits.
+        if (txn_type == TxnType_SETUP) send_token_packet(ep_default, PidTypeSetupToken);
+        else send_token_packet(ep_default, PidTypeOutToken);
+        if (disrupt_data) begin
+          // Variable delay between OUT token packet and the ensuing DATA packet.
+          inter_packet_delay();
+          // Minimum length, with no bit stuffing, minus 1 becomes the upper bound.
+          disrupt_tx_bits = $urandom_range(1, 31 + data_bytes * 8);
+          // The selected PID type does not matter, for once; we're about to interrupt the
+          // transmission.
+          send_data_packet(PidTypeData0, data);
+        end
+      end
+      TxnType_IN: begin
+        configure_in_trans(ep_default, in_buffer_id, data_bytes);
+        write_buffer(in_buffer_id, data);
+        disrupt_tx_bits = disrupt_data ? 0 : $urandom_range(1, 31);  // Token packets are 32 bits.
+        // Minimum length, with no bit stuffing, minus 1 becomes the upper bound.
+        disrupt_rx_bits = disrupt_data ? $urandom_range(1, 31 + data_bytes * 8) : 0;
+        send_token_packet(ep_default, PidTypeInToken);
+        if (disrupt_data) begin
+          RSP rsp;
+          get_response(rsp);
+        end
+      end
+      default: `uvm_fatal(`gfn, "Invalid/unrecognised transaction type")
+    endcase
+    // Switch off disruption before causing any further confusion.
+    disrupt_tx_bits = 0;
+    disrupt_rx_bits = 0;
+    // Apply the disruption stimulus immediately.
+    `uvm_info(`gfn, $sformatf("Applying %s stimulus to disrupt traffic", stim_desc), UVM_LOW)
+    case (stim_type)
+      StimType_BusReset: begin
+        send_bus_reset(100);
+        // After the Bus Reset we must reinstate the device address.
+        `uvm_info(`gfn, $sformatf("Setting device address to 0x%02x", dev_addr), UVM_MEDIUM)
+        usbdev_set_address(dev_addr);
+      end
+      StimType_IPReset: begin
+        apply_reset();
+        // After an IP block reset the entire device configuration must be reinstated.
+        usbdev_init(dev_addr, phy_use_diff_rcvr, phy_tx_use_d_se0, phy_pinflip);
+      end
+      StimType_Disconnect: begin
+        bit remove_pullup = $urandom & 1;
+        set_vbus_state(0);
+        // Wait for 100 microseconds; a pretty arbitrary choice. VBUS disconnections would usually
+        // be longer in practice.
+        cfg.clk_rst_vif.wait_clks(100 * 48);
+        if (remove_pullup) begin
+          usbdev_disconnect();
+          set_vbus_state(1);
+          // Wait a little before reinstating pull up
+          cfg.clk_rst_vif.wait_clks(4 * 48);
+          usbdev_connect();
+        end else set_vbus_state(1);
+        // Allow a little time before VBUS connection and the host supplying the Bus Reset.
+        cfg.clk_rst_vif.wait_clks(10 * 48);
+        send_bus_reset(100);
+        // After the Bus Reset we must reinstate the device address.
+        `uvm_info(`gfn, $sformatf("Setting device address to 0x%02x", dev_addr), UVM_MEDIUM)
+        usbdev_set_address(dev_addr);
+      end
+      default: `uvm_fatal(`gfn, $sformatf("Unexpected stimulus %p", stim_type))
+    endcase
+
+    // Try the smoke sequence again.
+    super.body();
+    // Choose another endpoint.
+    ep_default = (|ep_default ? ep_default : NEndpoints) - 1;
+    // Retry the smoke sequence.
+    super.body();
+  endtask
+
+endclass : usbdev_tx_rx_disruption_vseq
diff --git a/hw/ip/usbdev/dv/env/seq_lib/usbdev_vseq_list.sv b/hw/ip/usbdev/dv/env/seq_lib/usbdev_vseq_list.sv
index 44720bdbb03e2..2e12bf88e4e01 100644
--- a/hw/ip/usbdev/dv/env/seq_lib/usbdev_vseq_list.sv
+++ b/hw/ip/usbdev/dv/env/seq_lib/usbdev_vseq_list.sv
@@ -56,6 +56,7 @@
 `include "usbdev_stall_priority_over_nak_vseq.sv"
 `include "usbdev_stall_trans_vseq.sv"
 `include "usbdev_stream_len_max_vseq.sv"
+`include "usbdev_tx_rx_disruption_vseq.sv"
 
 // These depend on usbdev_spray_packets_vseq, so need to come after it.
 `include "usbdev_device_address_vseq.sv"
diff --git a/hw/ip/usbdev/dv/env/timed_reg.sv b/hw/ip/usbdev/dv/env/timed_reg.sv
index 130c3a42f511b..5af4387d1d6c6 100644
--- a/hw/ip/usbdev/dv/env/timed_reg.sv
+++ b/hw/ip/usbdev/dv/env/timed_reg.sv
@@ -30,6 +30,9 @@ class timed_reg_field extends uvm_object;
   // Maximum expected delay for a predicted change to be met.
   int unsigned       max_delay;
 
+  // Initial value of this register field; to be reinstated after a DUT reset.
+  uvm_reg_data_t     init_val;
+
   // Latest matched value of this field; used in predicting CSR read data.
   uvm_reg_data_t     read_latest;
 
@@ -137,19 +140,34 @@ class timed_reg_field extends uvm_object;
                                   field.get_name(), pred.id, pred.val_new), UVM_HIGH)
         void'(pred_q.pop_front());
         obs_latest = act_val;
-      end else if (!(pred.latest_time - time_now > 0)) begin
-        `uvm_info(`gfn, $sformatf("Reg %p field %s (ID 0x%0x) did NOT meet expectation 0x%0x",
-                                  reg_name, field.get_name(), pred.id, pred.val_new), UVM_MEDIUM)
-        `uvm_info(`gfn, $sformatf(" (time_now 0x%0x)", time_now), UVM_MEDIUM)
-        // Report the mismatched value.
-        `DV_CHECK_EQ(act_val, pred.val_new);
       end else begin
-        // Check that it still matches the previous value.
-        `DV_CHECK_EQ(act_val, pred.val_prev);
-        break;
+        // Check that the latest time on this prediction has not yet passed; the expression of the
+        // comparison copes with timer wraparound too.
+        if (!(pred.latest_time - time_now > 0)) begin
+          `uvm_info(`gfn, $sformatf("Reg %p field %s (ID 0x%0x) did NOT meet expectation 0x%0x",
+                                    reg_name, field.get_name(), pred.id, pred.val_new), UVM_MEDIUM)
+          `uvm_info(`gfn, $sformatf(" (time_now 0x%0x)", time_now), UVM_MEDIUM)
+          // Report the mismatched value.
+          `DV_CHECK_EQ(act_val, pred.val_new);
+        end else begin
+          // Check that it still matches the previous value.
+          `DV_CHECK_EQ(act_val, pred.val_prev);
+          break;
+        end
       end
     end while (pred_q.size() > 0);
   endfunction
+
+  // Reset the state of the timed register field/predictions in response to a DUT reset.
+  function void reset();
+    `uvm_info(`gfn, $sformatf("Field %s resetting to 0x%0x", field.get_name(), init_val), UVM_HIGH)
+    // State for CSR reading.
+    read_latest = init_val;
+    pred_valid = 1'b0;
+    // State for `timed_checker` process.
+    obs_latest = init_val;
+    pred_q.delete();
+  endfunction
 endclass : timed_reg_field
 
 //-----------------------------------------------------------------------------
@@ -181,11 +199,10 @@ class timed_reg extends uvm_object;
     // Update the 'unpredictable bits' mask.
     mask = (1 << field.get_n_bits()) - 1;
     unpred_mask &= ~(mask << field.get_lsb_pos());
-    // State for CSR reading.
-    trf.read_latest = init_val;
-    trf.pred_valid = 1'b0;
-    // State for `timed_checker` process.
-    trf.obs_latest = init_val;
+    // Remember the initial state to be reinstated after device reset.
+    trf.init_val = init_val;
+    // Set the initial post-reset state of the field.
+    trf.reset();
     fields.push_back(trf);
   endfunction
 
@@ -228,4 +245,9 @@ class timed_reg extends uvm_object;
       if (fields[f].preds_pending()) fields[f].check_pred(time_now, reg_name, act_data);
     end
   endfunction
+
+  // Reset the state of the timed register/predictions in response to a DUT reset.
+  function void reset();
+    for (int unsigned f = 0; f < fields.size(); f++) fields[f].reset();
+  endfunction
 endclass : timed_reg
diff --git a/hw/ip/usbdev/dv/env/usbdev_bfm.sv b/hw/ip/usbdev/dv/env/usbdev_bfm.sv
index 6dc3408578e78..c2bdd90635da4 100644
--- a/hw/ip/usbdev/dv/env/usbdev_bfm.sv
+++ b/hw/ip/usbdev/dv/env/usbdev_bfm.sv
@@ -116,6 +116,14 @@ class usbdev_bfm extends uvm_component;
   // within this bank are replaced when actual bytes are received from the USB. (usbdev_usbif.sv)
   bit [31:0] wdata_q;
 
+  // The decision on whether and how to respond to an IN request cannot be actioned imediately
+  // because the CSR state may change in the interim; we introduce a short delay before deciding
+  // how to respond to an IN request.
+  token_pkt in_token;
+
+  // Count of elapsed DUT clock ticks whilst timing (currently just for servicing IN requests).
+  int unsigned tick_cnt = 0;
+
   `uvm_component_new
 
   function void build_phase(uvm_phase phase);
@@ -130,6 +138,8 @@ class usbdev_bfm extends uvm_component;
 
   // Reset assertion to the DUT; this is a reset of the IP block; not a Bus Reset on the USB.
   function void dut_reset();
+    configin_t configin_rst;  // Defaults to zeros throughout.
+    `uvm_info(`gfn, "Modeling DUT reset", UVM_LOW)
     powered = 1'b1;
     // Assigned device address is discarded and the DUT returns to the disconnected state.
     dev_address = 0;
@@ -163,8 +173,38 @@ class usbdev_bfm extends uvm_component;
     // Note: packet buffer contents are unmodified by DUT reset, but the bank of 32 flops is reset.
     wdata_q <= 32'b0;
     // Note: AON/Wake state also unaffected.
-    // Record that there is no IN transmission in progress.
+    // Note: `sense` line is unaffected; it's an external input to the DUT.
+    // Record that there is no IN transmission configured or in progress.
+    for (int unsigned ep = 0; ep < NEndpoints; ep++) configin[ep] = configin_rst;
     tx_ep = InvalidEP;
+    // Nor any in-progress reception.
+    rx_token = null;
+  endfunction
+
+  //------------------------------------------------------------------------------------------------
+  // Timing model.
+  //------------------------------------------------------------------------------------------------
+
+  // Returns 1 iff there is a need to track the passage of time in clock ticks; caller shall invoke
+  // `send_delayed_response()` once per clock cycle of the DUT whilst this is the case.
+  function bit timing();
+    return (in_token != null);
+  endfunction
+
+  // Advance by one clock tick and action any timed response that is now due; returns an indication
+  // of whether a response is expected from the DUT, and the response itself via 'rsp'.
+  function bit send_delayed_response(output usb20_item rsp);
+    bit send_rsp = 1'b0;
+    tick_cnt++;
+    `uvm_info(`gfn, $sformatf("BFM advanced tick count to 0x%0x", tick_cnt), UVM_MEDIUM)
+    if (tick_cnt >= 2 && in_token != null) begin
+      // Decide how to respond to the IN token packet.
+      rsp = in_packet(in_token);
+      send_rsp = 1'b1;
+      // Forget the IN request.
+      in_token = null;
+    end
+    return send_rsp;
   endfunction
 
   //------------------------------------------------------------------------------------------------
@@ -315,6 +355,8 @@ class usbdev_bfm extends uvm_component;
       // 'sending' and setting the 'pend' bit.
       for (int unsigned ep = 0; ep < NEndpoints; ep++) retire_in_packet(ep);
       tx_ep = InvalidEP;
+      // Discard any memory of a token packet from before the Reset Signaling.
+      rx_token = null;
     end
     // Link state changes occur only when the Reset Signaling is complete.
     if (powered && sense && enable) begin
@@ -396,6 +438,8 @@ class usbdev_bfm extends uvm_component;
 
   // Cancel any in-progress IN transaction and update state.
   function void cancel_in();
+    // Forget any IN request about which we have not made a decision.
+    in_token = null;
     // Was there an IN transmission in progress?
     if (tx_ep != InvalidEP) begin
       configin[tx_ep].sending = 1'b0;
@@ -445,7 +489,14 @@ class usbdev_bfm extends uvm_component;
       if (exp_crc_error) intr_state[IntrRxCrcErr] = 1'b1;
     end
     if (!item.valid_crc()) intr_state[IntrRxCrcErr] = 1'b1;
-    return &{item.valid_pid(), item.valid_length, item.valid_stuffing, item.valid_crc()};
+    // The expectation is that an invalid length/EOP will also induce a CRC error if it's known to
+    // be a token or data packet.
+    if ((item.m_pkt_type == PktTypeToken || item.m_pkt_type == PktTypeData) &&
+        (!item.valid_length || !item.valid_eop)) begin
+      intr_state[IntrRxCrcErr] = 1'b1;
+    end
+    return &{item.valid_pid(), item.valid_length, item.valid_stuffing, item.valid_crc(),
+             item.valid_eop};
   endfunction
 
   // Complete an in-progress Isochronous IN transaction.
@@ -465,7 +516,7 @@ class usbdev_bfm extends uvm_component;
   // Process a Start of Frame packet from the USB host controller.
   function void sof_packet(ref sof_pkt sof);
     cancel_transaction();
-    if (!(sof.valid_sync & sof.valid_eop)) return;
+    if (!(sof.valid_sync)) return;
     void'(valid_packet(sof)); // Ensure errors are reported.
     if (sof.valid_pid()) begin
       // The frame number itself shall be used only if the CRC matches.
@@ -479,7 +530,7 @@ class usbdev_bfm extends uvm_component;
   // Process a token packet from the USB host controller.
   function bit token_packet(ref token_pkt token, output usb20_item rsp);
     cancel_transaction();
-    if (|{token.low_speed, !token.valid_sync, !token.valid_eop}) return 0;
+    if (|{token.low_speed, !token.valid_sync}) return 0;
     if (valid_packet(token)) begin
       case (token.m_pid_type)
         PidTypeSetupToken, PidTypeOutToken: begin
@@ -501,7 +552,14 @@ class usbdev_bfm extends uvm_component;
           // state.
         end
         PidTypeInToken: begin
-          return in_packet(token, rsp);
+          // Basic check of whether we should do anything at all for this transaction.
+          bit [3:0] ep = token.endpoint;
+          if (token.address != dev_address || ep >= NEndpoints || !ep_in_enable[ep]) return 0;
+
+          // Remember the IN token packet and, after a short delay, decide whether and how to
+          // respond.
+          `downcast(in_token, token.clone());
+          tick_cnt = 0;
         end
         default: begin
           // DUT shall ignore all other token packets; not relevant to Full Speed devices.
@@ -518,7 +576,7 @@ class usbdev_bfm extends uvm_component;
   function bit data_packet(ref data_pkt data, output usb20_item rsp);
     bit valid_crc = data.valid_crc();
     cancel_in();
-    if (|{data.low_speed, !data.valid_sync, !data.valid_eop}) return 0;
+    if (|{data.low_speed, !data.valid_sync}) return 0;
     if (valid_packet(data) && (data.m_pid_type == PidTypeData0 ||
                                data.m_pid_type == PidTypeData1)) begin
       // Consult the most recent token packet to decide how to handle the DATA packet.
@@ -536,19 +594,16 @@ class usbdev_bfm extends uvm_component;
     return 0;
   endfunction
 
-  // Process an IN transaction from the USB host controller; returns an indication of whether
-  // a response packet is expected from the DUT, and the response itself via `rsp`.
-  // The response may be 'stall', 'data' or 'nak.'
-  function bit in_packet(ref token_pkt token, output usb20_item rsp);
+  // Process an IN transaction from the USB host controller; returns an expectation of the DUT
+  // response packet. The response may be 'stall', 'data' or 'nak.'
+  function usb20_item in_packet(ref token_pkt token);
+    usb20_item rsp;
     bit [3:0] ep;
 
     // Validate inputs.
     assert(token.m_ev_type  == EvPacket);
     assert(token.m_pkt_type == PktTypeToken);
-
-    // Basic check of whether we should do anything at all for this transaction.
     ep = token.endpoint;
-    if (token.address != dev_address || ep >= NEndpoints || !ep_in_enable[ep]) return 0;
 
     if (in_stall[ep] & (!in_iso[ep] | rxenable_setup[ep])) begin
       usb20_item stall = handshake_pkt::type_id::create("stall");
@@ -571,6 +626,8 @@ class usbdev_bfm extends uvm_component;
           in_iso_completed(ep);
           // Always use DATA0 for Full Speed Isochronous transactions.
           data.m_pid_type = PidTypeData0;
+          // Forget any IN request about which we have not made a decision.
+          in_token = null;
           tx_ep = InvalidEP;
         end else begin
           // Remember the endpoint involved in the IN transmission so that the handshake response
@@ -589,13 +646,13 @@ class usbdev_bfm extends uvm_component;
         rsp = nak;
       end
     end
-    return 1;
+    return rsp;
   endfunction
 
   // Process a handshake packet, in response to an attempted transaction to the given endpoint.
   function void handshake_packet(ref handshake_pkt handshake);
     cancel_out();
-    if (|{handshake.low_speed, !handshake.valid_sync, !handshake.valid_eop}) return;
+    if (|{handshake.low_speed, !handshake.valid_sync}) return;
     if (!handshake.valid_pid()) intr_state[IntrRxPidErr] = 1'b1;
     if (tx_ep < NEndpoints) begin
       case (handshake.m_pid_type)
diff --git a/hw/ip/usbdev/dv/env/usbdev_env.core b/hw/ip/usbdev/dv/env/usbdev_env.core
index 460f6f17cd821..383cecf5be526 100644
--- a/hw/ip/usbdev/dv/env/usbdev_env.core
+++ b/hw/ip/usbdev/dv/env/usbdev_env.core
@@ -91,6 +91,7 @@ filesets:
       - seq_lib/usbdev_stall_trans_vseq.sv: {is_include_file: true}
       - seq_lib/usbdev_streaming_vseq.sv: {is_include_file: true}
       - seq_lib/usbdev_stream_len_max_vseq.sv: {is_include_file: true}
+      - seq_lib/usbdev_tx_rx_disruption_vseq.sv: {is_include_file: true}
     file_type: systemVerilogSource
 
 generate:
diff --git a/hw/ip/usbdev/dv/env/usbdev_env_cfg.sv b/hw/ip/usbdev/dv/env/usbdev_env_cfg.sv
index 641d6e93b6710..07bd785b82245 100644
--- a/hw/ip/usbdev/dv/env/usbdev_env_cfg.sv
+++ b/hw/ip/usbdev/dv/env/usbdev_env_cfg.sv
@@ -58,6 +58,12 @@ class usbdev_env_cfg extends cip_base_env_cfg #(.RAL_T(usbdev_reg_block));
   bit en_scb_rdchk_link_in_err = 1'b1;
   // Enable checking of `intr_state.link_resume` register field?
   bit en_scb_rdchk_link_resume = 1'b1;
+  // Enable checking of `intr_state.rx_pid_err` register field?
+  bit en_scb_rdchk_rx_pid_err = 1'b1;
+  // Enable checking of `intr_state.rx_crc_err` register field?
+  bit en_scb_rdchk_rx_crc_err = 1'b1;
+  // Enable checking of `intr_state.rx_bitstuff_err` register field?
+  bit en_scb_rdchk_rx_bitstuff_err = 1'b1;
 
   `uvm_object_utils_begin(usbdev_env_cfg)
     `uvm_field_object(m_usb20_agent_cfg,  UVM_DEFAULT)
diff --git a/hw/ip/usbdev/dv/env/usbdev_scoreboard.sv b/hw/ip/usbdev/dv/env/usbdev_scoreboard.sv
index e5f3228858fad..d50412d92083c 100644
--- a/hw/ip/usbdev/dv/env/usbdev_scoreboard.sv
+++ b/hw/ip/usbdev/dv/env/usbdev_scoreboard.sv
@@ -67,6 +67,20 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
     cfg.en_scb_rdchk_linkstate = 1'b1;
     void'($value$plusargs("en_scb_rdchk_linkstate=%0b", cfg.en_scb_rdchk_linkstate));
 
+    // Monitor and model cannot be used to predict with absolute certainty when a PID/CRC error
+    // will be reported when truncating a packet transmission to the DUT because `usb_fs_rx` can
+    // sample the SE0 state of a spontaneous Bus Reset and complete the PID even though not all
+    // of the PID bits were transmitted. The CRC can simply be a false positive match,
+    // particularly the CRC5 of a token packet.
+    // Reporting of bit stuffing violations is a similar situation to that with PID bits; whether or
+    // not they will be detected and reported is data-dependent.
+    cfg.en_scb_rdchk_rx_pid_err = 1'b1;
+    void'($value$plusargs("en_scb_rdchk_rx_pid_err=%0b", cfg.en_scb_rdchk_rx_pid_err));
+    cfg.en_scb_rdchk_rx_crc_err = 1'b1;
+    void'($value$plusargs("en_scb_rdchk_rx_crc_err=%0b", cfg.en_scb_rdchk_rx_crc_err));
+    cfg.en_scb_rdchk_rx_bitstuff_err = 1'b1;
+    void'($value$plusargs("en_scb_rdchk_rx_bitstuff_err=%0b", cfg.en_scb_rdchk_rx_bitstuff_err));
+
     super.build_phase(phase);
     // Bus Functional Model of USBDEV.
     bfm = new();
@@ -92,16 +106,64 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
       fork
         process_usb20_req();
         process_usb20_rsp();
-        timed_regs.check_predictions();
+        // Prediction checker will discard any predictions over a DUT reset since they can no longer
+        // be considered relevant; the CSR state will be reset.
+        timed_regs.check_predictions(cfg.under_reset);
+        handle_resets();
       join_none
     end
   endtask
 
+  // Handle DUT resets and ensure that the BFM is informed.
+  virtual task handle_resets();
+    forever begin
+      wait (cfg.under_reset);
+      bfm.dut_reset();
+      // Capture the post-reset state of the loosely-timed registers.
+      capture_timed_regs(prev_timed_regs);
+      wait (!cfg.under_reset);
+    end
+  endtask
+
   // Receive and model the request from the host/driver to the DUT.
   virtual task process_usb20_req();
     usb20_item item;
     forever begin
-      req_usb20_fifo.get(item);
+      // Does the model presently have any timed activity pending?
+      if (bfm.timing()) begin
+        if (!req_usb20_fifo.try_get(item)) begin
+          // Delayed response to received packet, if any.
+          usb20_item rsp;
+          cfg.clk_rst_vif.wait_clks(1);
+          // Inform the model of the passage of time (in terms of DUT clock ticks) and post an
+          // expectation of a delayed response, if appropriate.
+          if (bfm.send_delayed_response(rsp)) begin
+            expected_rsp_q.push_back(rsp);
+            update_timed_regs();
+          end
+          continue;
+        end
+      end else begin
+        // Since we presently do not ever transition from '!timing -> timing' in response to CSR
+        // activity, we can safely block until the monitor informs us that something else has
+        // happened on the USB; with a more sophisticated model of Idle bus time this may not be
+        // possible.
+        req_usb20_fifo.get(item);
+      end
+      if (item.m_ev_type == EvPacket) begin
+        // Ignore all USB packets if the DUT is under reset.
+        if (cfg.under_reset) begin
+          `uvm_info(`gfn, $sformatf("Ignoring monitor packet (PID 0x%0x) because of IP reset",
+                                    item.m_pid_type), UVM_LOW)
+          continue;
+        end
+      end else if (expected_rsp_q.size() > 0) begin
+        // Any non-packet event signaled by the monitor invalidates any response packets that the
+        // functional model has already predicted; this occurs only if a transaction is interrupted.
+        `uvm_info(`gfn, $sformatf("Dropping expected response(s) because of bus event %p",
+                                  item.m_ev_type), UVM_LOW)
+        expected_rsp_q.delete();
+      end
       case (item.m_ev_type)
         // Non-packet events on the USB.
         EvBusReset: begin
@@ -189,6 +251,9 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
     forever begin
       // Collect an actual response from the DUT.
       rsp_usb20_fifo.get(act_item);
+      // Ignore all DUT response packets if the DUT is under reset or disconnected from the USB;
+      // they will be incomplete responses when the reset/disconnection interrupted a transaction.
+      if (cfg.under_reset || !cfg.m_usb20_agent_cfg.bif.usb_vbus) continue;
       // Collect coverage for IN traffic from the DUT.
       collect_dut_rsp_cov(act_item);
       `uvm_info(`gfn, "Comparing DUT response against the BFM expected response:", UVM_MEDIUM)
@@ -265,6 +330,10 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
     // PRE token used on the USB.
     if (handshake.low_speed) pid = PidTypePre;  // Coverage should show that PRE has been received.
     cov.pids_to_dut_cg.sample(pid);
+    // The endpoint to which the handshake is sent has been retained from the IN token packet.
+    if (bfm.tx_ep != usbdev_bfm::InvalidEP) begin
+      cov.data_tog_endp_cg.sample(handshake.m_pid_type, .dir_in(1'b1), .endp(bfm.tx_ep));
+    end
   endfunction
 
   // Collection of functional coverage for DUT responses.
@@ -353,8 +422,10 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
               // `pkt_sent` interrupt state much sooner than the DUT, which waits until the
               // data has been transmitted. 64 bytes to transmit => 4*(4+32+64*8*7/6) clock cycles.
               "pkt_sent": max_delay = 2800;
-              // Link reset may arrive 2 microseconds behind the signaling from the monitor.
-              "link_reset": max_delay = 2 * 48;
+              // Link reset may arrive 2 microseconds behind the signaling from the monitor, but we
+              // must also allow for the different clock frequencies; 2us is 96 clock cycles, extend
+              // to 100.
+              "link_reset": max_delay = 100;
               // The monitor is compelled to signal the transition to Suspended as much as 90
               // microseconds before the DUT transitions, because the DUT ignores its own non-Idle
               // signaling in timing the Suspend signaling and the DUT could be running faster.
@@ -372,6 +443,24 @@ class usbdev_scoreboard extends cip_base_scoreboard #(
                 if (cfg.en_scb_rdchk_link_resume) max_delay = 3 * 8 * 4;
                 else include_field = 1'b0;
               end
+              "rx_crc_err": begin
+                // Monitor and model cannot be used to predict with absolute certainty when a
+                // PID/CRC error will be reported when truncating a packet transmission to the DUT
+                // because `usb_fs_rx` can sample the SE0 state of a spontaneous Bus Reset and
+                // complete the PID even though not all of the PID bits were transmitted. The CRC
+                // can simply be a false positive match, particularly the CRC5 of a token packet.
+                // Reporting of bit stuffing violations is a similar situation to that with PID
+                // bits; whether or not they will be detected and reported is data-dependent.
+                if (!cfg.en_scb_rdchk_rx_crc_err) include_field = 1'b0;
+              end
+              "rx_pid_err": begin
+                // See `rx_crc_err` above.
+                if (!cfg.en_scb_rdchk_rx_pid_err) include_field = 1'b0;
+              end
+              "rx_bitstuff_err": begin
+                // See `rx_crc_err` above.
+                if (!cfg.en_scb_rdchk_rx_bitstuff_err) include_field = 1'b0;
+              end
               // Most interrupts should be reflected almost immediately.
               default: begin
                 max_delay = 16;
diff --git a/hw/ip/usbdev/dv/env/usbdev_timed_regs.sv b/hw/ip/usbdev/dv/env/usbdev_timed_regs.sv
index e23ace46f0154..c6123f5686e69 100644
--- a/hw/ip/usbdev/dv/env/usbdev_timed_regs.sv
+++ b/hw/ip/usbdev/dv/env/usbdev_timed_regs.sv
@@ -80,7 +80,7 @@ class usbdev_timed_regs extends uvm_object;
 
   // This process checks every prediction that is made, using backdoor csr_rd in zero time to avoid
   // interfering with actual CSR reads and the timing of the simulation.
-  task check_predictions();
+  task check_predictions(ref bit under_reset);
     // Collect the initial values post-reset.
     wait (clk_rst_vif.rst_n === 1'b1);
     forever begin
@@ -92,7 +92,11 @@ class usbdev_timed_regs extends uvm_object;
       // Check each of the timed registers for expired expectations.
       r = r.first();
       forever begin
-        if (timed[r].preds_pending()) begin
+        if (under_reset) begin
+          `uvm_info(`gfn, $sformatf("Resetting timed register predictions at 0x%0x", time_now),
+                    UVM_LOW)
+          timed[r].reset();
+        end else if (timed[r].preds_pending()) begin
           uvm_reg_data_t act_data;
           // Something is expected to happen to this register field.
           read_act_data(r, act_data);
diff --git a/hw/ip/usbdev/dv/usbdev_sim_cfg.hjson b/hw/ip/usbdev/dv/usbdev_sim_cfg.hjson
index 7ba5d97df7206..f29d8f05be5cb 100644
--- a/hw/ip/usbdev/dv/usbdev_sim_cfg.hjson
+++ b/hw/ip/usbdev/dv/usbdev_sim_cfg.hjson
@@ -41,6 +41,9 @@
   // Default iterations for all tests - each test entry can override this.
   reseed: 50
 
+  // Add usbdev specific exclusion files.
+  vcs_cov_excl_files: ["{proj_root}/hw/ip/usbdev/dv/cov/usbdev_unr_excl.el"]
+
   // Default UVM test and seq class name.
   uvm_test: usbdev_base_test
   uvm_test_seq: usbdev_base_vseq
@@ -291,6 +294,9 @@
     {
       name: usbdev_low_speed_traffic
       uvm_test_seq: usbdev_low_speed_traffic_vseq
+      // Model has no concept of elapsed time, and cannot change state in the
+      // absence of a missing USB host controller handshake (Isochronous IN traffic).
+      run_opts: ["+en_scb_rdchk_configin=0"]
     }
     {
       name: usbdev_max_inter_pkt_delay
@@ -541,6 +547,27 @@
       name: usbdev_stream_len_max
       uvm_test_seq: usbdev_stream_len_max_vseq
     }
+    {
+      name: usbdev_tx_rx_disruption
+      uvm_test_seq: usbdev_tx_rx_disruption_vseq
+      // Monitor and model cannot be used to predict with absolute certainty when a PID/CRC error
+      // will be reported when truncating a packet transmission to the DUT because `usb_fs_rx` can
+      // sample the SE0 state of a spontaneous Bus Reset and complete the PID even though not all
+      // of the PID bits were transmitted. The CRC can simply be a false positive match,
+      // particularly the CRC5 of a token packet.
+      // We also cannot readily predict whether we shall raise a `link_in_err` by issuing a bus
+      // reset during an IN DATA packet.
+      // Reliable prediction of reported bit stuffing violations would require examination of the
+      // OUT traffic to the device prior to the instant of a Bus Reset or VBUS Disconnection.
+      // These notifications are just informative in any case.
+      run_opts: [
+        "+en_scb_rdchk_rx_pid_err=0",
+        "+en_scb_rdchk_rx_crc_err=0",
+        "+en_scb_rdchk_link_in_err=0",
+        "+en_scb_rdchk_rx_bitstuff_err=0"
+      ]
+      reseed: 500
+    }
   ]
 
   // List of regressions.
diff --git a/hw/ip_templates/alert_handler/doc/checklist.md b/hw/ip_templates/alert_handler/doc/checklist.md
index 48fda1b4f7439..d398772f97776 100644
--- a/hw/ip_templates/alert_handler/doc/checklist.md
+++ b/hw/ip_templates/alert_handler/doc/checklist.md
@@ -104,8 +104,8 @@ Review        | [REVIEW_RTL][]          | Done        |
 Review        | [REVIEW_DELETED_FF][]   | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_SW_CHANGE][]    | Done        |
 Review        | [REVIEW_SW_ERRATA][]    | Done        |
-Review        | Reviewer(s)             | Done        | msf@ vogelpi@ chencindy@ ttrippel@ tjaychen@
-Review        | Signoff date            | Done        | 2022-07-11
+Review        | Reviewer(s)             | Done        | adk@ vogelpi@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/ip_templates/clkmgr/data/clkmgr.hjson.tpl b/hw/ip_templates/clkmgr/data/clkmgr.hjson.tpl
index b16fd3531d744..cfb3a6041b655 100644
--- a/hw/ip_templates/clkmgr/data/clkmgr.hjson.tpl
+++ b/hw/ip_templates/clkmgr/data/clkmgr.hjson.tpl
@@ -30,7 +30,7 @@
     {
       version:            "1.0.1",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
@@ -409,8 +409,7 @@
           name: "EN",
           resval: "1"
           desc: '''
-            When 1, the value of !!JITTER_ENABLE can be changed.  When 0, writes have no
-            effect.
+            This register has no effect.
           '''
         },
       ]
@@ -429,13 +428,14 @@
           name: "VAL",
           desc: '''
             Enable jittery clock.
-            A value of kMultiBitBool4False disables the jittery clock,
-            while all other values enable jittery clock.
+            At reset, this register reads as kMultiBitBool4False and the jittery clock is disabled.
+            Any write to the register turns the value to kMultiBitBool4True and enables the jittery clock.
+            The value written doesn't matter.
+            The value then remains kMultiBitBool4True until reset.
           ''',
           resval: false
-          // avoid writing random values to this register as it could trigger transient checks
-          // in mubi sync
-          tags: ["excl:CsrAllTests:CsrExclWrite"]
+          // Exclude this register from any automated CSR tests as the behavior is non-standard.
+          tags: ["excl:CsrAllTests:CsrExclAll"]
         }
       ]
     },
diff --git a/hw/ip_templates/clkmgr/doc/checklist.md b/hw/ip_templates/clkmgr/doc/checklist.md
index f685650e418e1..28ac5395584b9 100644
--- a/hw/ip_templates/clkmgr/doc/checklist.md
+++ b/hw/ip_templates/clkmgr/doc/checklist.md
@@ -100,17 +100,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | With waivers approved by TC on 2024-08-08
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | matutem@, vogelpi@, adk@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/ip_templates/clkmgr/doc/registers.md.tpl b/hw/ip_templates/clkmgr/doc/registers.md.tpl
index 97acd1e8857d0..c48236c620cf9 100644
--- a/hw/ip_templates/clkmgr/doc/registers.md.tpl
+++ b/hw/ip_templates/clkmgr/doc/registers.md.tpl
@@ -148,10 +148,10 @@ ${"###"} Fields
 {"reg": [{"name": "EN", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name   | Description                                                                                            |
-|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------|
-|  31:1  |        |         |        | Reserved                                                                                               |
-|   0    |  rw0c  |   0x1   | EN     | When 1, the value of [`JITTER_ENABLE`](#jitter_enable) can be changed.  When 0, writes have no effect. |
+|  Bits  |  Type  |  Reset  | Name   | Description                  |
+|:------:|:------:|:-------:|:-------|:-----------------------------|
+|  31:1  |        |         |        | Reserved                     |
+|   0    |  rw0c  |   0x1   | EN     | This register has no effect. |
 
 ${"##"} JITTER_ENABLE
 Enable jittery clock
@@ -165,10 +165,17 @@ ${"###"} Fields
 {"reg": [{"name": "VAL", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name   | Description                                                                                                                   |
-|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------|
-|  31:4  |        |         |        | Reserved                                                                                                                      |
-|  3:0   |   rw   |   0x9   | VAL    | Enable jittery clock. A value of kMultiBitBool4False disables the jittery clock, while all other values enable jittery clock. |
+|  Bits  |  Type  |  Reset  | Name                       |
+|:------:|:------:|:-------:|:---------------------------|
+|  31:4  |        |         | Reserved                   |
+|  3:0   |   rw   |   0x9   | [VAL](#jitter_enable--val) |
+
+${"###"} JITTER_ENABLE . VAL
+Enable jittery clock.
+At reset, this register reads as kMultiBitBool4False and the jittery clock is disabled.
+Any write to the register turns the value to kMultiBitBool4True and enables the jittery clock.
+The value written doesn't matter.
+The value then remains kMultiBitBool4True until reset.
 
 ${"##"} CLK_ENABLES
 Clock enable for software gateable clocks.
diff --git a/hw/ip_templates/clkmgr/dv/env/clkmgr_scoreboard.sv b/hw/ip_templates/clkmgr/dv/env/clkmgr_scoreboard.sv
index 820925dd9af5b..399350fe98b22 100644
--- a/hw/ip_templates/clkmgr/dv/env/clkmgr_scoreboard.sv
+++ b/hw/ip_templates/clkmgr/dv/env/clkmgr_scoreboard.sv
@@ -290,7 +290,13 @@ class clkmgr_scoreboard extends cip_base_scoreboard #(
     // If incoming access is a write to a valid csr, update prediction right away.
     if (addr_phase_write) begin
       `uvm_info(`gfn, $sformatf("Writing 0x%0x to %s", item.a_data, csr.get_name()), UVM_MEDIUM)
-      void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
+      if (csr.get_name() == "jitter_enable") begin
+        // Any write to the jitter_enable CSR turns the value to MuBi4True. The value written
+        // doesn't matter.
+        void'(csr.predict(.value(prim_mubi_pkg::MuBi4True), .kind(UVM_PREDICT_WRITE)));
+      end else begin
+        void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
+      end
     end
 
     // Process the csr req:
@@ -318,8 +324,8 @@ class clkmgr_scoreboard extends cip_base_scoreboard #(
       "jitter_regwen": begin
       end
       "jitter_enable": begin
-        if (addr_phase_write && `gmv(ral.jitter_regwen)) begin
-          `DV_CHECK_EQ(prim_mubi_pkg::mubi4_t'(item.a_data), cfg.clkmgr_vif.jitter_enable_csr)
+        if (data_phase_write) begin
+          `DV_CHECK_EQ(prim_mubi_pkg::MuBi4True, cfg.clkmgr_vif.jitter_enable_csr)
         end
       end
       "clk_enables": begin
diff --git a/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv b/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
index ec5d4896a650d..edfb77d4f6313 100644
--- a/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
+++ b/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
@@ -9,6 +9,21 @@ class clkmgr_regwen_vseq extends clkmgr_base_vseq;
 
   `uvm_object_new
 
+  task check_jitter_regwen();
+    bit enable;
+    mubi4_t prev_value;
+    mubi4_t new_value;
+
+    `DV_CHECK_STD_RANDOMIZE_FATAL(enable)
+    new_value = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2));
+    `uvm_info(`gfn, $sformatf("Check jitter regwen set to %b begin", enable), UVM_MEDIUM)
+    csr_wr(.ptr(ral.jitter_regwen), .value(enable));
+    csr_rd(.ptr(ral.jitter_enable), .value(prev_value));
+    csr_wr(.ptr(ral.jitter_enable), .value(new_value));
+    csr_rd_check(.ptr(ral.jitter_enable), .compare_value(MuBi4True));
+    `uvm_info(`gfn, "Check jitter regwen end", UVM_MEDIUM)
+  endtask : check_jitter_regwen
+
   task check_extclk_regwen();
     bit enable;
     int prev_value;
@@ -67,6 +82,7 @@ class clkmgr_regwen_vseq extends clkmgr_base_vseq;
 
     `uvm_info(`gfn, $sformatf("Will run %0d rounds", num_trans), UVM_MEDIUM)
     for (int i = 0; i < num_trans; ++i) begin
+      check_jitter_regwen();
       check_extclk_regwen();
       check_meas_ctrl_regwen();
       apply_reset("HARD");
diff --git a/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv b/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
index 6807809aec382..85a817ec66af8 100644
--- a/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
+++ b/hw/ip_templates/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
@@ -24,16 +24,18 @@ class clkmgr_smoke_vseq extends clkmgr_base_vseq;
   // This needs to be done outside the various CSR tests, since they update the jitter_enable
   // CSR, but the scoreboard is disabled for those tests.
   task test_jitter();
-    prim_mubi_pkg::mubi4_t jitter_value;
-    for (int i = 0; i < (1 << $bits(prim_mubi_pkg::mubi4_t)); ++i) begin
-      jitter_value = prim_mubi_pkg::mubi4_t'(i);
-      csr_wr(.ptr(ral.jitter_enable), .value(jitter_value));
-      csr_rd_check(.ptr(ral.jitter_enable), .compare_value(jitter_value));
-      // And set it back.
-      cfg.clk_rst_vif.wait_clks(6);
-      csr_wr(.ptr(ral.jitter_enable), .value('0));
-      csr_rd_check(.ptr(ral.jitter_enable), .compare_value('0));
+    prim_mubi_pkg::mubi4_t jitter_enable_value;
+    // Read the current value.
+    csr_rd(.ptr(ral.jitter_enable), .value(jitter_enable_value));
+    if (jitter_enable_value == prim_mubi_pkg::MuBi4False) begin
+      // Write a random 4-bit value to the register. This will set it to enabled.
+      csr_wr(.ptr(ral.jitter_enable), .value($urandom_range(0, 15)));
+      csr_rd_check(.ptr(ral.jitter_enable), .compare_value(prim_mubi_pkg::MuBi4True));
     end
+    // Try to set it back - it must stay enabled until reset.
+    cfg.clk_rst_vif.wait_clks(6);
+    csr_wr(.ptr(ral.jitter_enable), .value(prim_mubi_pkg::MuBi4False));
+    csr_rd_check(.ptr(ral.jitter_enable), .compare_value(prim_mubi_pkg::MuBi4True));
   endtask
 
   // Flips all clk_enables bits from the reset value with all enabled. All is checked
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env.core b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env.core
index 735c3fb1f3aba..f5956d7761c8a 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env.core
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env.core
@@ -96,6 +96,7 @@ filesets:
       - seq_lib/flash_ctrl_hw_read_seed_err_vseq.sv: {is_include_file: true}
       - seq_lib/flash_ctrl_hw_prog_rma_wipe_err_vseq.sv: {is_include_file: true}
       - seq_lib/flash_ctrl_rd_ooo_vseq.sv: {is_include_file: true}
+      - seq_lib/flash_ctrl_basic_rw_vseq.sv: {is_include_file: true}
     file_type: systemVerilogSource
 
 generate:
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
index 74f01f325b681..ae7c9156c0e72 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
@@ -698,7 +698,6 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
       `uvm_create_obj(flash_otf_item, item)
       flash_mem_otf_read(flash_op, item.fq);
       flash_op.otf_addr = flash_op.addr;
-      flash_op.otf_addr[BusAddrByteW-2:OTFHostId] = 'h0;
 
       item.region.scramble_en = MuBi4True;
       item.region.ecc_en = (ecc_en)? MuBi4True : MuBi4False;
@@ -1146,9 +1145,8 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   // Increase outstanding table entry.
   function void inc_otd_tbl(bit bank, addr_t addr, flash_dv_part_e part);
     rd_cache_t ent;
-    addr[2:0] = 3'h0;
     ent.bank = bank;
-    ent.addr = addr;
+    ent.addr = align_to_flash_word(addr);
     ent.part = part;
     if (!derr_otd.exists(ent)) begin
       derr_otd[ent] = 1;
@@ -1160,9 +1158,8 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   // Descrease outstanding table entry.
   function void dec_otd_tbl(bit bank, addr_t addr, flash_dv_part_e part);
     rd_cache_t ent;
-    addr[2:0] = 3'h0;
     ent.bank = bank;
-    ent.addr = addr;
+    ent.addr = align_to_flash_word(addr);
     ent.part = part;
     if (!derr_otd.exists(ent)) begin
       `uvm_error("dec_otd_tbl", $sformatf("addr %x %s doesn't exits", addr, part.name))
@@ -1188,46 +1185,52 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   virtual function void load_otf_mem_page(flash_dv_part_e part,
                                           int bank,
                                           int page);
-    addr_t addr;
+    addr_t addr = '0;
     addr[OTFBankId-1:11] = page;
-    for (int i = 0; i < 256; i++) begin
-      update_otf_mem_read_zone(part, bank, addr);
-      addr += 8;
-    end
+    `uvm_info(`gfn, $sformatf("in load_otf_mem_page bank:%0d %s, page:%0d", bank, part.name, page),
+              UVM_HIGH)
+    update_otf_mem_read_zone(part, bank, addr, addr + BytesPerPage - 1);
   endfunction : load_otf_mem_page
 
-  function void update_otf_mem_read_zone(flash_dv_part_e part, int bank, addr_t addr);
-    flash_otf_item item;
-    int page;
-    bit [BankAddrW-1:0] mem_addr;
+  function void update_otf_mem_read_zone(flash_dv_part_e part, int bank,
+                                         addr_t start_addr, addr_t end_addr);
+    start_addr = align_to_flash_word(start_addr);
+    `uvm_info(`gfn, $sformatf(
+              "mem_bkdr initializing bank:%0d %s from 0x%x to 0x%x per attributes",
+              bank, part.name, start_addr, end_addr),
+              UVM_HIGH)
+    for (addr_t addr = start_addr; addr <= end_addr; addr += 8) begin
+      flash_otf_item item;
+      int page;
+      bit [BankAddrW-1:0] mem_addr;
 
-    `uvm_create_obj(flash_otf_item, item)
-    item.dq.push_back($urandom());
-    item.dq.push_back($urandom());
-    if (part == FlashPartData) begin
-      addr[OTFBankId] = bank;
-      page = addr2page(addr);
-      item.region = get_region(page, 0);
-      // back to per bank addr
-      addr[OTFBankId] = 0;
-    end else begin
-      page = addr2page(addr);
-      item.region = get_region_from_info(mp_info[bank][part>>1][page]);
+      `uvm_create_obj(flash_otf_item, item)
+      item.dq.push_back($urandom());
+      item.dq.push_back($urandom());
+      if (part == FlashPartData) begin
+        addr_t pd_addr = addr;
+        pd_addr[OTFBankId] = bank;
+        page = addr2page(pd_addr);
+        item.region = get_region(page, 0);
+      end else begin
+        page = addr2page(addr);
+        item.region = get_region_from_info(mp_info[bank][part>>1][page]);
+      end
+      item.page = page;
+      `uvm_info(`gfn, $sformatf(
+                "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x orig data:0x%0x%0x",
+                part, bank, addr, item.dq[1], item.dq[0]), UVM_HIGH)
+      item.scramble(otp_addr_key, otp_data_key, addr, 0);
+      `uvm_info(`gfn, $sformatf(
+                "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x scr data:0x%x",
+                part, bank, addr, item.fq[0]), UVM_HIGH)
+
+      mem_bkdr_util_h[part][bank].write(addr, item.fq[0]);
+      // address should be mem_addr
+      mem_addr = addr >> 3;
+      if (part == FlashPartData) otf_scb_h.data_mem[bank][mem_addr] = item.fq[0];
+      else otf_scb_h.info_mem[bank][part>>1][mem_addr] = item.fq[0];
     end
-    item.page = page;
-    `uvm_info(`gfn, $sformatf(
-              "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x orig data:0x%0x%0x",
-              part, bank, addr, item.dq[1], item.dq[0]), UVM_HIGH)
-    item.scramble(otp_addr_key, otp_data_key, addr, 0);
-    `uvm_info(`gfn, $sformatf(
-              "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x scr data:0x%x",
-              part, bank, addr, item.fq[0]), UVM_HIGH)
-
-    mem_bkdr_util_h[part][bank].write(addr, item.fq[0]);
-    // address should be mem_addr
-    mem_addr = addr >> 3;
-    if (part == FlashPartData) otf_scb_h.data_mem[bank][mem_addr] = item.fq[0];
-    else otf_scb_h.info_mem[bank][part>>1][mem_addr] = item.fq[0];
   endfunction : update_otf_mem_read_zone
 
   // Update memory with random data through backdoor.
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
index 45c7206720e9d..23bf85557829e 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
@@ -408,10 +408,7 @@ package flash_ctrl_env_pkg;
     bit [FlashDataWidth-1:0]                                    masked_data;
     bit [FlashNumRoundsHalf-1:0][FlashDataWidth-1:0]            scrambled_data;
 
-    // These parameters will be removed once it is included in mem_bkdr_util.sv
-    int                                                         addr_lsb = 3;
-
-    word_addr = byte_addr >> addr_lsb;
+    word_addr = byte_addr >> FlashDataByteWidth;
     mask = flash_galois_multiply(flash_addr_key, word_addr);
     masked_data = data ^ mask;
     crypto_dpi_prince_pkg::sv_dpi_prince_encrypt(.plaintext(masked_data), .key(flash_data_key),
@@ -543,6 +540,10 @@ package flash_ctrl_env_pkg;
     end
   endfunction
 
+  function automatic addr_t align_to_flash_word(addr_t addr);
+     return {addr[$bits(addr_t) - 1 : FlashDataByteWidth], {FlashDataByteWidth{1'b0}}};
+  endfunction
+
   // Round an address down to a program resolution window.
   function automatic addr_t round_to_prog_resolution(addr_t addr);
     return addr - (addr & (BusPgmResBytes - 1));
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
index f720e6b3c0fb0..b3af4ae728d27 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
@@ -518,16 +518,23 @@ class flash_ctrl_otf_scoreboard extends uvm_scoreboard;
         skip_comp = 1;
       end
 
+      // Data will be corrupted if some bits to be written cannot be flipped to 1.
       if (rcv.mem_part == FlashPartData) begin
         if (data_mem[bank].exists(rcv.mem_addr)) begin
-          corrupt_entry[entry] = 1;
           rd_data = data_mem[bank][rcv.mem_addr];
-          if (cfg.seq_cfg.use_vendor_flash == 0) begin
-            exp.req.prog_full_data &= rd_data;
-          end else begin
-            skip_comp = 1;
+          if ((exp.req.prog_full_data & rd_data) != exp.req.prog_full_data) begin
+            corrupt_entry[entry] = 1;
+            `uvm_info(`gfn, $sformatf(
+                      "Overwriting data bank:%0d, %s, addr:0x%x, data:0x%x, wr_data:0x%x",
+                      bank, rcv.mem_part.name, entry.addr, rd_data, exp.req.prog_full_data),
+                      UVM_MEDIUM)
+            if (cfg.seq_cfg.use_vendor_flash == 0) begin
+              exp.req.prog_full_data &= rd_data;
+            end else begin
+              skip_comp = 1;
+            end
+            data_mem[bank].delete(rcv.mem_addr);
           end
-          data_mem[bank].delete(rcv.mem_addr);
         end
         data_mem[bank][rcv.mem_addr] = exp.req.prog_full_data;
       end else begin
@@ -536,14 +543,24 @@ class flash_ctrl_otf_scoreboard extends uvm_scoreboard;
         `uvm_info(`gfn, $sformatf("scb_rd_data:%x prog_data:%x",
              info_mem[bank][rcv.mem_info_sel][rcv.mem_addr], exp.req.prog_full_data), UVM_HIGH)
         if (info_mem[bank][rcv.mem_info_sel].exists(rcv.mem_addr)) begin
-          corrupt_entry[entry] = 1;
           rd_data = info_mem[bank][rcv.mem_info_sel][rcv.mem_addr];
-          if (cfg.seq_cfg.use_vendor_flash == 0) begin
-            exp.req.prog_full_data &= rd_data;
-          end else begin
-            skip_comp = 1;
+          if ((exp.req.prog_full_data & rd_data) != exp.req.prog_full_data) begin
+            corrupt_entry[entry] = 1;
+            `uvm_info(`gfn, $sformatf(
+                      "Overwriting data bank:%0d, %s, addr:0x%x, data:0x%x, wr_data:0x%x",
+                      bank, rcv.mem_part.name, entry.addr, rd_data, exp.req.prog_full_data),
+                      UVM_MEDIUM)
+            if (cfg.seq_cfg.use_vendor_flash == 0) begin
+              exp.req.prog_full_data &= rd_data;
+            end else begin
+              skip_comp = 1;
+            end
+            info_mem[bank][rcv.mem_info_sel].delete(rcv.mem_addr);
           end
-          info_mem[bank][rcv.mem_info_sel].delete(rcv.mem_addr);
+          `uvm_info(`gfn, $sformatf(
+                    "Updating info_mem bank:%0d, info:%0d, addr:0x%x",
+                    bank, rcv.mem_info_sel, rcv.mem_addr << 3),
+                    UVM_MEDIUM)
         end
         info_mem[bank][rcv.mem_info_sel][rcv.mem_addr] = exp.req.prog_full_data;
       end
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_mem_bkdr_util.sv b/hw/ip_templates/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
index 1bd56ed97f96c..d4f00f6db3937 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
@@ -9,8 +9,10 @@ class flash_mem_bkdr_util extends mem_bkdr_util;
   function new(string name = "", string path, int unsigned depth,
                longint unsigned n_bits, err_detection_e err_detection_scheme,
                int extra_bits_per_subword = 0, int unsigned system_base_addr = 0);
-    super.new(name, path, depth, n_bits, err_detection_scheme, extra_bits_per_subword,
-              system_base_addr);
+    super.new(.name(name), .path(path), .depth(depth), .n_bits(n_bits),
+              .err_detection_scheme(err_detection_scheme),
+              .extra_bits_per_subword(extra_bits_per_subword),
+              .system_base_addr(system_base_addr));
     // Error detection scheme is assumed to be 76_68, otherwise, the overrides below won't work.
     `DV_CHECK_EQ_FATAL(err_detection_scheme, mem_bkdr_util_pkg::EccHamming_76_68)
   endfunction
diff --git a/hw/ip_templates/flash_ctrl/dv/env/flash_otf_item.sv b/hw/ip_templates/flash_ctrl/dv/env/flash_otf_item.sv
index 7b41ff21401f4..8bdb0fd2f66b3 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/flash_otf_item.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/flash_otf_item.sv
@@ -139,6 +139,7 @@ class flash_otf_item extends uvm_object;
       data = raw_fq[i][FlashDataWidth-1:0];
       if (ecc_en) begin
         data_with_icv = prim_secded_pkg::prim_secded_hamming_72_64_enc(raw_fq[i][63:0]);
+        `uvm_info("icv", $sformatf("ICV:%4b", data_with_icv[67:64]), UVM_DEBUG)
         if (add_icv_err) begin
           `uvm_info("icv_debug", $sformatf("before:%4b after:%4b",
                     data_with_icv[67:64], ~data_with_icv[67:64]), UVM_DEBUG)
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
index f9f0899ede0a0..49e280d53c3d2 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
@@ -69,6 +69,9 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
 
   function void add_address_range(input int bank, input flash_dv_part_e part,
                                   input addr_t first_address, input addr_t last_address);
+    `uvm_info("address_written", $sformatf(
+              "Adding address_range bank:%0d %s: [0x%x : 0x%x]",
+              bank, part.name, first_address, last_address), UVM_MEDIUM)
     part_address_ranges_written[bank][part].push_back('{first: first_address, last: last_address});
   endfunction
 
@@ -92,26 +95,29 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     end
   endfunction
 
-  // This is a binary search for an address in the address ranges. It also returns the index
-  // of the last range examined, which is useful for the caller.
+  // This is a binary search for any overlap of an address range with any in the address ranges.
   local function bit address_in_ranges(input int bank, input flash_dv_part_e part,
-                                       input address_ranges_t ranges, input addr_t addr,
-                                       ref int index);
+                                       input address_ranges_t ranges,
+                                       input address_range_t addr_range);
     int bottom = 0;
     int top = ranges.size() - 1;
     do
       begin
-        index = (top + bottom) / 2;
+        int index = (top + bottom) / 2;
         `uvm_info("address_written", $sformatf(
                   "bot:%0d, index:%0d, top:%0d, [0x%x : 0x%x]", bottom, index, top,
                   ranges[index].first, ranges[index].last), UVM_MEDIUM)
-        if (addr < ranges[index].first) top = index - 1;
-        else if (addr <= ranges[index].last) begin
-           `uvm_info("address_written", $sformatf(
-                     "addr:0x%x found in range [0x%x : 0x%x] for bank:%0d, part %s", addr,
-                     ranges[index].first, ranges[index].last, bank, part.name), UVM_MEDIUM)
+        if (addr_range.last < ranges[index].first) top = index - 1;
+        else if (addr_range.first > ranges[index].last) bottom = index + 1;
+        else begin
+          `DV_CHECK(
+              addr_range.last >= ranges[index].first && addr_range.first <= ranges[index].last)
+          `uvm_info("address_written", $sformatf(
+                    "address range:[0x%x : 0x%x] overlaps [0x%x : 0x%x] for bank:%0d, part %s",
+                    addr_range.first, addr_range.last, ranges[index].first, ranges[index].last,
+                    bank, part.name), UVM_MEDIUM)
           return 1;
-        end else bottom = index + 1;
+        end
       end
      while (top >= bottom);
      return 1'b0;
@@ -125,22 +131,9 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
       input int bank, input flash_dv_part_e part,
       input addr_t start_addr, input addr_t end_addr);
     if (part_address_ranges_written[bank].exists(part)) begin
+      address_range_t range = '{start_addr, end_addr};
       address_ranges_t ranges = part_address_ranges_written[bank][part];
-      int index;
-      bit success = address_in_ranges(bank, part, ranges, start_addr, index);
-      if (success) return 1'b1;
-      else begin
-        `uvm_info("address_written", $sformatf(
-                  "end range [0x%x : 0x%x]", ranges[index].first, ranges[index].last), UVM_MEDIUM)
-        if (ranges[index].first > start_addr) begin
-          if (ranges[index].first <= end_addr) begin
-            `uvm_info("address_written", $sformatf(
-                      "range [0x%x : 0x%x] overlaps [0x%x : 0x%x]", ranges[index].first,
-                      ranges[index].last, start_addr, end_addr), UVM_MEDIUM)
-            return 1'b1;
-          end
-        end
-      end
+      return address_in_ranges(bank, part, ranges, range);
     end
     return 1'b0;
   endfunction
@@ -157,20 +150,17 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
                                              input addr_t addr);
     if (part_address_ranges_written[bank].exists(part)) begin
       address_ranges_t ranges = part_address_ranges_written[bank][part];
-      int index;
-      if (address_in_ranges(bank, part, ranges, addr, index)) begin
+      address_range_t range = '{addr, addr + FlashBankBytesPerWord - 1};
+      if (address_in_ranges(bank, part, ranges, range)) begin
         return 1'b1;
       end
     end
-    if (addr >= 16'h800 && addr < 16'h2000) return 1'b1;
     return address_in_words(bank, part, addr);
   endfunction
 
   // Returns 1 if any address between start_addr and end_addr were written.
   protected function bit address_range_was_written(input int bank, input flash_dv_part_e part,
                                                    input addr_t start_addr, input addr_t end_addr);
-    int index;
-
     `uvm_info(`gfn, $sformatf(
               "Query address_range_written from %x to %x in bank:%0d %0s",
               start_addr, end_addr, bank, part.name),
@@ -179,7 +169,6 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
       return 1'b1;
     end
     `uvm_info("address_written", "Cleared ranges", UVM_MEDIUM)
-    if (start_addr >= 16'h800 && end_addr < 16'h2000) return 1'b1;
     for (addr_t addr = start_addr; addr < end_addr; addr += FlashBankBytesPerWord) begin
       if (address_in_words(bank, part, addr)) begin
         `uvm_info("address_words", $sformatf("addr:0x%x is already written", addr), UVM_MEDIUM)
@@ -342,26 +331,26 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     update_mp_region_cfg_mubifalse(region_cfg);
     data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].en, data,
                                           region_cfg.en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].rd_en, data,
-                                                 region_cfg.read_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].prog_en, data,
-                                                 region_cfg.program_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].erase_en, data,
-                                                 region_cfg.erase_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].scramble_en,
-                                                 data, region_cfg.scramble_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].ecc_en, data,
-                                                 region_cfg.ecc_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].he_en, data,
-                                                 region_cfg.he_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].rd_en, data,
+                                          region_cfg.read_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].prog_en, data,
+                                          region_cfg.program_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].erase_en, data,
+                                          region_cfg.erase_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].scramble_en,
+                                          data, region_cfg.scramble_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].ecc_en, data,
+                                          region_cfg.ecc_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].he_en, data,
+                                          region_cfg.he_en);
     csr_wr(.ptr(ral.mp_region_cfg[index]), .value(data));
 
     // reset for base/size register
     data = 0;
     data = get_csr_val_with_updated_field(ral.mp_region[index].base, data,
                                           region_cfg.start_page);
-    data = data | get_csr_val_with_updated_field(ral.mp_region[index].size, data,
-                                                 region_cfg.num_pages);
+    data = get_csr_val_with_updated_field(ral.mp_region[index].size, data,
+                                          region_cfg.num_pages);
     csr_wr(.ptr(ral.mp_region[index]), .value(data));
   endtask : flash_ctrl_mp_region_cfg
 
@@ -383,14 +372,11 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     cfg.default_region_cfg.he_en = he_en;
 
     data = get_csr_val_with_updated_field(ral.default_region.rd_en, data, read_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.prog_en, data, program_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.erase_en, data, erase_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.scramble_en, data, scramble_en);
-    data = data | get_csr_val_with_updated_field(ral.default_region.ecc_en, data, ecc_en);
-    data = data | get_csr_val_with_updated_field(ral.default_region.he_en, data, he_en);
+    data = get_csr_val_with_updated_field(ral.default_region.prog_en, data, program_en);
+    data = get_csr_val_with_updated_field(ral.default_region.erase_en, data, erase_en);
+    data = get_csr_val_with_updated_field(ral.default_region.scramble_en, data, scramble_en);
+    data = get_csr_val_with_updated_field(ral.default_region.ecc_en, data, ecc_en);
+    data = get_csr_val_with_updated_field(ral.default_region.he_en, data, he_en);
     csr_wr(.ptr(ral.default_region), .value(data));
   endtask : flash_ctrl_default_region_cfg
 
@@ -412,19 +398,20 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     `uvm_info("mp_info_page_cfg", $sformatf("%s: %p", csr_name, page_cfg), UVM_DEBUG)
     csr = ral.get_reg_by_name(csr_name);
     update_mp_info_cfg_mubifalse(page_cfg);
-    data = get_csr_val_with_updated_field(csr.get_field_by_name("en"), data, page_cfg.en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("rd_en"), data, page_cfg.read_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("prog_en"), data, page_cfg.program_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("erase_en"), data, page_cfg.erase_en);
-    data = data | get_csr_val_with_updated_field(csr.get_field_by_name("scramble_en"), data,
-                                                 page_cfg.scramble_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("ecc_en"), data, page_cfg.ecc_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("he_en"), data, page_cfg.he_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("en"),
+                                          data, page_cfg.en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("rd_en"),
+                                          data, page_cfg.read_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("prog_en"),
+                                          data, page_cfg.program_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("erase_en"),
+                                          data, page_cfg.erase_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("scramble_en"),
+                                          data, page_cfg.scramble_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("ecc_en"),
+                                          data, page_cfg.ecc_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("he_en"),
+                                          data, page_cfg.he_en);
     csr_wr(.ptr(csr), .value(data));
   endtask : flash_ctrl_mp_info_page_cfg
 
@@ -520,12 +507,12 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     partition_sel = flash_part_e'(|flash_op.partition);
     info_sel = flash_op.partition >> 1;
     data = get_csr_val_with_updated_field(ral.control.start, data, 1'b1);
-    data = data | get_csr_val_with_updated_field(ral.control.op, data, flash_op.op);
-    data = data | get_csr_val_with_updated_field(ral.control.prog_sel, data, flash_op.prog_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.erase_sel, data, flash_op.erase_type);
-    data = data | get_csr_val_with_updated_field(ral.control.partition_sel, data, partition_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.info_sel, data, info_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.num, data, flash_op.num_words - 1);
+    data = get_csr_val_with_updated_field(ral.control.op, data, flash_op.op);
+    data = get_csr_val_with_updated_field(ral.control.prog_sel, data, flash_op.prog_sel);
+    data = get_csr_val_with_updated_field(ral.control.erase_sel, data, flash_op.erase_type);
+    data = get_csr_val_with_updated_field(ral.control.partition_sel, data, partition_sel);
+    data = get_csr_val_with_updated_field(ral.control.info_sel, data, info_sel);
+    data = get_csr_val_with_updated_field(ral.control.num, data, flash_op.num_words - 1);
     csr_wr(.ptr(ral.control), .value(data));
   endtask : flash_ctrl_start_op
 
@@ -1179,7 +1166,6 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
 
     if (cfg.seq_cfg.check_mem_post_tran) begin
       flash_op_copy.otf_addr = flash_op_copy.addr;
-      flash_op_copy.otf_addr[BusAddrByteW-2:OTFHostId] = 'h0;
       cfg.flash_mem_bkdr_read_check(flash_op_copy, exp_data, check_match, scr_en, ecc_en);
     end
   endtask : flash_ctrl_write_extra
@@ -1619,14 +1605,16 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     uvm_hdl_data_t data;
     flash_otf_item item;
     bit [BankAddrW-1:0] mem_addr;
-    int                 page = 1;
+    int start_page = 1;
+    int number_of_secret_pages = 3;
     `uvm_info(`gfn, $sformatf("Updating secret partition with addr_key:%x, data_key:%x",
               otp_addr_key, otp_data_key), UVM_MEDIUM)
 
-    repeat(3) begin
-      int page_st_addr = page*2048;
+    for (int page = start_page; page < start_page + number_of_secret_pages; ++page) begin
       mubi4_t scramble_en;
       mubi4_t ecc_en;
+      int page_st_addr = page * BytesPerPage;
+      int page_en_addr = page_st_addr + BytesPerPage - 1;
       // Only scr/ecc enable matter; cfg.ovrd_src_dis can be randomized in directed test,
       // but otherwise it has the same default value as HW_INFO_CFG_OVERRIDE.
       if (page != 3) begin
@@ -1638,9 +1626,11 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
         scramble_en = flash_ctrl_pkg::CfgAllowRead.scramble_en;
         ecc_en = flash_ctrl_pkg::CfgAllowRead.ecc_en;
       end
-      `uvm_info(`gfn, $sformatf("info page %0d scr_en:%x, ecc_en:%x", page, scramble_en, ecc_en),
+      `uvm_info(`gfn, $sformatf(
+                "info page %0d [0x%x : 0x%x] scr_en:%x, ecc_en:%x",
+                page, page_st_addr, page_st_addr + BytesPerPage - 1, scramble_en, ecc_en),
                 UVM_MEDIUM)
-      for (int addr = page_st_addr; addr < (page_st_addr + 8*256); addr += 8) begin
+      for (int addr = page_st_addr; addr <= page_en_addr; addr += 8) begin
         `uvm_create_obj(flash_otf_item, item)
         data = cfg.mem_bkdr_util_h[FlashPartInfo][0].read(addr);
         item.dq.push_back(data[31:0]);
@@ -1654,8 +1644,10 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
         cfg.scb_flash_info[addr] = item.fq[0][31:0];
         cfg.scb_flash_info[addr+4] = item.fq[0][63:32];
       end
-      page++;
     end
+    add_address_range(0, FlashPartInfo, start_page * BytesPerPage,
+                      (start_page + number_of_secret_pages) * BytesPerPage - 1);
+    sort_all_address_ranges();
   endfunction // update_secret_partition
 
    function void update_mp_region_cfg_mubifalse(ref flash_mp_region_cfg_t cfg);
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv
new file mode 100644
index 0000000000000..fb48dfcb2e36f
--- /dev/null
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv
@@ -0,0 +1,164 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// flash_ctrl_basic_rw
+
+// This test does the following in a loop:
+// 0. randomize scramble_en, ecc_en, data, address
+// 1. initialize flash with all ones
+// 2. program flash with random data
+// 3. read back data through host interface
+// 4. read back data through controller interface
+
+class flash_ctrl_basic_rw_vseq extends flash_ctrl_base_vseq;
+  `uvm_object_utils(flash_ctrl_basic_rw_vseq)
+
+  `uvm_object_new
+
+  // Class Members
+  rand data_q_t flash_op_data;
+  rand flash_op_t flash_op;
+  rand uint bank;
+  rand mubi4_t instr_type;
+  rand uint num_trans;
+  rand mubi4_t scramble_en, ecc_en;
+
+  constraint bank_c {bank inside {[0 : flash_ctrl_pkg::NumBanks - 1]};}
+  constraint scramble_c {scramble_en inside {MuBi4True, MuBi4False};}
+  constraint ecc_c {ecc_en inside {MuBi4True, MuBi4False};}
+
+  constraint num_trans_c {num_trans < 100;}
+
+  // Constraint for controller address to be in relevant range for the selected partition.
+  constraint addr_c {
+    solve bank before flash_op;
+    flash_op.addr inside {[BytesPerBank * bank : BytesPerBank * (bank + 1)]};
+    flash_op.addr[2:0] == '0;
+  }
+
+  constraint flash_op_c {
+    // Bank Erase is only supported for Data & 1st Info Partitions
+    flash_op.partition == FlashPartData;
+
+    flash_op.op inside {flash_ctrl_pkg::FlashOpProgram,
+                        flash_ctrl_pkg::FlashOpRead};
+
+    flash_op.num_words >= 10;
+    flash_op.num_words <= (FlashNumBusWords - flash_op.addr[TL_AW-1:TL_SZW]);
+    flash_op.num_words <= 256;
+    flash_op.num_words < (FlashPgmRes - flash_op.addr[TL_SZW+:FlashPgmResWidth]);
+  }
+
+  // Flash ctrl operation data queue - used for programming or reading the flash.
+  constraint flash_op_data_c {
+    solve flash_op before flash_op_data;
+
+    flash_op_data.size() == flash_op.num_words;
+  }
+
+  // Body
+  virtual task body();
+
+    // Local Variables
+    addr_t read_addr;
+    data_t rdata;
+    bit comp, exp_err;
+    data_q_t flash_op_rdata;
+
+    // Scoreboard knob for Blocking Read Data Checking
+    // Checks performed in this test
+    cfg.block_host_rd = 0;
+
+    // enable code execution
+    csr_wr(.ptr(ral.exec), .value(CODE_EXEC_KEY));
+
+    // Enable All Regions
+
+    // disable randomization for num_trans (loop variable)
+    num_trans.rand_mode(0);
+
+    for (int k = 0; k < num_trans; k++) begin
+
+      // re-randomize all variables
+      randomize();
+
+      // 0. initialize regions
+      init_flash_regions(scramble_en, ecc_en);
+
+      // 1. init flash memory to all ones
+      cfg.flash_mem_bkdr_init(FlashPartData, FlashMemInitSet);
+
+      // 2. program random data to flash
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        `uvm_info(`gfn, $sformatf("DATA %p", flash_op_data[i]), UVM_HIGH)
+      end
+      flash_op.op = flash_ctrl_pkg::FlashOpProgram;
+      flash_ctrl_base_vseq::flash_ctrl_write_extra(flash_op, flash_op_data, 1,
+                                                   mubi4_test_true_strict(scramble_en),
+                                                   mubi4_test_true_strict(ecc_en));
+
+      exp_err = 0;
+
+      // 3. Read from memory interface (direct read)
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        read_addr = flash_op.addr + 4 * i;
+        instr_type = get_rand_mubi4_val(.t_weight(2),
+                                        .f_weight(2),
+                                        .other_weight(0));
+
+
+        do_direct_read(.addr(read_addr), .mask('1), .blocking(cfg.block_host_rd), .check_rdata(1),
+                       .instr_type(instr_type), .rdata(rdata), .exp_rdata(flash_op_data[i]),
+                       .exp_err_rsp(exp_err), .completed(comp));
+        cfg.clk_rst_vif.wait_clks($urandom_range(1, 10));
+      end
+      csr_utils_pkg::wait_no_outstanding_access();
+
+      // 4. Read from controller interface
+      flash_op.op = flash_ctrl_pkg::FlashOpRead;
+      flash_ctrl_read_extra(flash_op, flash_op_rdata);
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        if (flash_op_data[i] !== flash_op_rdata[i])
+          `uvm_error("rd-err", $sformatf("Read-back error: exp: %x is: %x", flash_op_data[i],
+                    flash_op_rdata[i]))
+      csr_utils_pkg::wait_no_outstanding_access();
+      end
+    end
+
+  endtask : body
+
+  // Task to initialize the Flash Access
+  virtual task init_flash_regions(mubi4_t scramble_en, mubi4_t ecc_en);
+
+    // Memory Protection Regions
+    flash_mp_region_cfg_t mp_regions[flash_ctrl_pkg::MpRegions];
+
+    for (int i = 0; i<flash_ctrl_pkg::MpRegions; i++) begin
+      mp_regions[i].en = MuBi4False;
+      mp_regions[i].read_en = MuBi4True;
+      mp_regions[i].program_en = MuBi4True;
+      mp_regions[i].erase_en = MuBi4True;
+      mp_regions[i].scramble_en = scramble_en;
+      mp_regions[i].ecc_en = ecc_en;
+      mp_regions[i].he_en = MuBi4False;
+      mp_regions[i].start_page = 0;
+      mp_regions[i].num_pages = FlashNumPages;
+    end
+    mp_regions[0].en = MuBi4True;
+
+    // Initialize MP Regions
+    foreach (mp_regions[k]) begin
+      flash_ctrl_mp_region_cfg(k, mp_regions[k]);
+      `uvm_info(`gfn, $sformatf("MP regions values %p", mp_regions[k]), UVM_HIGH)
+    end
+
+    // Initialize Default Regions
+    flash_ctrl_default_region_cfg(
+        .read_en(MuBi4True), .program_en(MuBi4True),
+        .erase_en(MuBi4True), .scramble_en(scramble_en),
+        .ecc_en(ecc_en), .he_en(MuBi4False));
+
+  endtask : init_flash_regions
+
+endclass : flash_ctrl_basic_rw_vseq
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
index a8d78e0dd120f..4650487181608 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
@@ -43,13 +43,6 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
   }
 
   constraint flash_op_c {
-    // Add read only constraint for closed source env
-    if (cfg.seq_cfg.op_readonly_on_info_partition) {
-      flash_op.partition == FlashPartInfo -> flash_op.op == flash_ctrl_pkg::FlashOpRead;
-    }
-    if (cfg.seq_cfg.op_readonly_on_info1_partition) {
-      flash_op.partition == FlashPartInfo1 -> flash_op.op == flash_ctrl_pkg::FlashOpRead;
-    }
     flash_op.addr inside {[0 : FlashSizeBytes - 1]};
     // 8Byte (2 words) aligned.
     // With scramble enabled, odd size of word access (or address) will cause
@@ -60,6 +53,14 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
     flash_op.num_words <= cfg.seq_cfg.op_max_words;
     flash_op.num_words < FlashPgmRes - flash_op.addr[TL_SZW+:FlashPgmResWidth];
     flash_op.num_words % 2 == 0;
+
+    // This added because in some extending env the info2 has special use.
+    if (cfg.seq_cfg.exclude_info2) {
+      flash_op.partition dist { FlashPartData := 1, [FlashPartInfo:FlashPartInfo1] :/ 1};
+    } else {
+      flash_op.partition dist { FlashPartData := 1, [FlashPartInfo:FlashPartInfo2] :/ 1};
+    }
+
   }
 
   // Memory protection regions settings.
@@ -161,6 +162,7 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
       flash_ctrl_mp_info_page_cfg(i, j, k, mp_info_pages[i][j][k]);
       `uvm_info(`gfn, $sformatf("MP INFO regions values %p", mp_info_pages[i][j][k]), UVM_HIGH)
     end
+
     //Enable Bank erase
     bank_erase_en = {NumBanks{1'b1}};
     flash_ctrl_bank_erase_cfg(.bank_erase_en(bank_erase_en));
@@ -168,32 +170,53 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
     flash_op_inv = flash_op;
     flash_op_rd  = flash_op;
     flash_op_er  = flash_op;
-    cfg.flash_mem_bkdr_write(.flash_op(flash_op), .scheme(FlashMemInitSet));
-    flash_ctrl_start_op(flash_op);
-    flash_ctrl_write(flash_op_data, poll_fifo_status);
-    wait_flash_op_done(.clear_op_status(0), .timeout_ns(cfg.seq_cfg.prog_timeout_ns));
-    // Add guard time between previous alert detection complete and set the next expected alert
-    cfg.clk_rst_vif.wait_clks(100);
-
-    expect_alert          = 1;
-    cfg.scb_h.expected_alert["recov_err"].expected = 1;
-    cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
-    flash_op_inv.op       = FlashOpInvalid;
-    flash_ctrl_start_op(flash_op_inv);
-    wait_flash_op_done();
-
-    ral.err_code.op_err.predict(expect_alert);
-    check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
-    cfg.scb_h.expected_alert["recov_err"].expected = 0;
-
-    flash_op_rd.op = FlashOpRead;
-    flash_op_data = {};
-    flash_ctrl_start_op(flash_op_rd);
-    flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
-    wait_flash_op_done();
-    flash_op_er.op = FlashOpErase;
-    flash_ctrl_start_op(flash_op_er);
-    wait_flash_op_done(.timeout_ns(cfg.seq_cfg.erase_timeout_ns));
+    // When testing RO partitions, skip the program and erase parts.
+    if ((cfg.seq_cfg.op_readonly_on_info_partition && flash_op.partition == FlashPartInfo) ||
+        (cfg.seq_cfg.op_readonly_on_info1_partition && flash_op.partition == FlashPartInfo1)) begin
+      expect_alert          = 1;
+      cfg.scb_h.expected_alert["recov_err"].expected = 1;
+      cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
+      flash_op_inv.op       = FlashOpInvalid;
+      flash_ctrl_start_op(flash_op_inv);
+      wait_flash_op_done();
+
+      ral.err_code.op_err.predict(expect_alert);
+      check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
+      cfg.scb_h.expected_alert["recov_err"].expected = 0;
+
+      flash_op_rd.op = FlashOpRead;
+      flash_op_data = {};
+      flash_ctrl_start_op(flash_op_rd);
+      flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
+      wait_flash_op_done();
+    end else begin
+      cfg.flash_mem_bkdr_write(.flash_op(flash_op), .scheme(FlashMemInitSet));
+      flash_ctrl_start_op(flash_op);
+      flash_ctrl_write(flash_op_data, poll_fifo_status);
+      wait_flash_op_done(.clear_op_status(0), .timeout_ns(cfg.seq_cfg.prog_timeout_ns));
+      // Add guard time between previous alert detection complete and set the next expected alert
+      cfg.clk_rst_vif.wait_clks(100);
+
+      expect_alert          = 1;
+      cfg.scb_h.expected_alert["recov_err"].expected = 1;
+      cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
+      flash_op_inv.op       = FlashOpInvalid;
+      flash_ctrl_start_op(flash_op_inv);
+      wait_flash_op_done();
+
+      ral.err_code.op_err.predict(expect_alert);
+      check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
+      cfg.scb_h.expected_alert["recov_err"].expected = 0;
+
+      flash_op_rd.op = FlashOpRead;
+      flash_op_data = {};
+      flash_ctrl_start_op(flash_op_rd);
+      flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
+      wait_flash_op_done();
+      flash_op_er.op = FlashOpErase;
+      flash_ctrl_start_op(flash_op_er);
+      wait_flash_op_done(.timeout_ns(cfg.seq_cfg.erase_timeout_ns));
+    end
 
     flash_op_inv.op = FlashOpInvalid;
     cfg.scb_h.expected_alert["recov_err"].expected = 1;
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
index 60daf60a3c3c5..13ff4e2fb98d4 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
@@ -709,8 +709,8 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
 
       cfg.otf_read_entry.insert(rd_entry, flash_op);
       if (derr_is_set) begin
-        `uvm_info("read_flash", $sformatf("assert_derr 0x%x",
-                                          {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+        `uvm_info("read_flash", $sformatf("assert_derr 0x%x", align_to_flash_word(flash_op.addr)),
+                  UVM_MEDIUM)
         global_derr_is_set = 1;
         if (cfg.scb_h.do_alert_check == 1) begin
           cfg.scb_h.expected_alert["fatal_err"].expected = 1;
@@ -867,11 +867,13 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
           if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
             cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
           end
-          derr_is_set = cfg.address_has_derr({flash_op.addr[TL_AW-1:3],3'h0}, flash_op.partition);
-          ierr_is_set = cfg.address_has_ierr({flash_op.addr[TL_AW-1:3],3'h0}, flash_op.partition);
+          derr_is_set = cfg.address_has_derr(align_to_flash_word(flash_op.addr),
+                                             flash_op.partition);
+          ierr_is_set = cfg.address_has_ierr(align_to_flash_word(flash_op.addr),
+                                             flash_op.partition);
           if (derr_is_set) begin
             `uvm_info("direct_read", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
-            cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
+            cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
             global_derr_is_set = 1;
           end
           if (ierr_is_set) begin
@@ -881,18 +883,21 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
           `uvm_info("direct_read", $sformatf(
                     "ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
                     cfg.ierr_created[ReadTaskHost], derr_is_set,
-                    cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0})),
+                    cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr))),
                     UVM_MEDIUM)
           cfg.ierr_created[ReadTaskHost] = 0;
         end
-        if (cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0}) | derr_is_set) derr = 1;
+        if (cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr)) ||
+            derr_is_set) begin
+          derr = 1;
+        end
       end
       cfg.otf_read_entry.insert(rd_entry, flash_op);
       `uvm_info("direct_read", $sformatf({"num_i:%0d bank:%0d exec: page:%0d(%0d)",
                                           " 0x%x derr:%0d in_err:%0d"},
                                          i, bank, tl_addr, page, (page % 256),
                                          derr, in_err), UVM_MEDIUM)
-      if (in_err) cfg.scb_h.in_error_addr[{tl_addr[31:3],3'h0}] = 1;
+      if (in_err) cfg.scb_h.in_error_addr[align_to_flash_word(tl_addr)] = 1;
 
       derr |= in_err;
 
@@ -999,17 +1004,17 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
         drop |= validate_flash_op(flash_op, my_region);
         exp_item.ctrl_rd_region_q.push_back(my_region);
 
-         rd_entry.addr = flash_op.otf_addr;
-         // Address has to be 8byte aligned
-         rd_entry.addr[2:0] = 'h0;
-         rd_entry.part = flash_op.partition;
-         if (drop == 0 &&
-             my_region.ecc_en == MuBi4True &&
-             cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
-            `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                                  {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
-            derr_is_set |= 1;
-         end
+        rd_entry.addr = flash_op.otf_addr;
+        // Address has to be 8byte aligned
+        rd_entry.addr[2:0] = 'h0;
+        rd_entry.part = flash_op.partition;
+        if (drop == 0 &&
+            my_region.ecc_en == MuBi4True &&
+            cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
+          `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
+                                                 align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
+          derr_is_set |= 1;
+        end
 
         flash_op.addr += 8;
         flash_op.otf_addr += 8;
@@ -1034,7 +1039,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
             my_region.ecc_en == MuBi4True &&
             cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
           `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                                {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+                                                align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
           derr_is_set |= 1;
         end
       end
@@ -1085,7 +1090,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
 
       if (derr_is_set) begin
         `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                          {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+                                          align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
         global_derr_is_set = 1;
         exp_item.derr = 1;
 
@@ -1139,8 +1144,8 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
     end // for (int i = 0; i < num; i++)
   endtask
 
-   task direct_readback(bit [OTFBankId-1:0] addr, int bank, int num);
-     bit[TL_AW-1:0] tl_addr, st_addr, end_addr;
+  task direct_readback(bit [OTFBankId-1:0] addr, int bank, int num);
+    bit[TL_AW-1:0] tl_addr, st_addr, end_addr;
     data_4s_t rdata;
     flash_otf_item exp_item;
     int page;
@@ -1161,7 +1166,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
     // Capture for the print in sb.
     st_addr = tl_addr;
 
-     for (int i = 0; i < num ; i++) begin
+    for (int i = 0; i < num ; i++) begin
       drop = 0;
       derr = 0;
 
@@ -1183,48 +1188,49 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
       rd_entry.addr[2:0] = 'h0;
       rd_entry.part = FlashPartData;
 
-        if (cfg.ecc_mode > FlashEccEnabled) begin
-          if (exp_item.region.ecc_en == MuBi4True) begin
-            flash_op.addr = tl_addr;
-            // host can only access data partitions.
-            flash_op.partition = FlashPartData;
-            flash_op.num_words = 1;
-            if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
-              cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
-              derr_is_set = cfg.address_has_derr(flash_op.addr, flash_op.partition);
-            end
-            if (derr_is_set) begin
-              `uvm_info("direct_readback", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
-              cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
-              global_derr_is_set = 1;
-            end
-            if (cfg.derr_once == 0) cfg.derr_created[ReadTaskHost] = 0;
-            `uvm_info("direct_readback",
-                      $sformatf("ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
-                                cfg.ierr_created[ReadTaskHost], derr_is_set,
-                                cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0})),
-                      UVM_MEDIUM)
-            cfg.ierr_created[ReadTaskHost] = 0;
+      if (cfg.ecc_mode > FlashEccEnabled) begin
+        if (exp_item.region.ecc_en == MuBi4True) begin
+          flash_op.addr = tl_addr;
+          // host can only access data partitions.
+          flash_op.partition = FlashPartData;
+          flash_op.num_words = 1;
+          if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
+            cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
+            derr_is_set = cfg.address_has_derr(flash_op.addr, flash_op.partition);
           end
-          if (cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0}) | derr_is_set) begin
-            derr = 1;
+          if (derr_is_set) begin
+            `uvm_info("direct_readback", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
+            cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
+            global_derr_is_set = 1;
+          end
+          if (cfg.derr_once == 0) cfg.derr_created[ReadTaskHost] = 0;
+          `uvm_info("direct_readback",
+                    $sformatf("ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
+                              cfg.ierr_created[ReadTaskHost], derr_is_set,
+                              cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr))),
+                    UVM_MEDIUM)
+          cfg.ierr_created[ReadTaskHost] = 0;
+        end
+        if (cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr)) |
+            derr_is_set) begin
+          derr = 1;
+        end
+      end // if (cfg.ecc_mode > FlashEccEnabled)
+
+      cfg.otf_read_entry.insert(rd_entry, flash_op);
+      if (my_region.ecc_en == MuBi4True && cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
+        bit local_derr = 0;
+        check_mem_intg(exp_item, bank, local_derr);
+        if (local_derr) begin
+          exp_item.derr = 1;
+          derr = 1;
+          cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
+          if (derr & cfg.scb_h.do_alert_check) begin
+            cfg.scb_h.expected_alert["fatal_err"].expected = 1;
+            cfg.scb_h.expected_alert["fatal_err"].max_delay = 2000;
+            cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
           end
-        end // if (cfg.ecc_mode > FlashEccEnabled)
-
-       cfg.otf_read_entry.insert(rd_entry, flash_op);
-       if (my_region.ecc_en == MuBi4True && cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
-         bit local_derr = 0;
-         check_mem_intg(exp_item, bank, local_derr);
-         if (local_derr) begin
-           exp_item.derr = 1;
-           derr = 1;
-           cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
-           if (derr & cfg.scb_h.do_alert_check) begin
-             cfg.scb_h.expected_alert["fatal_err"].expected = 1;
-             cfg.scb_h.expected_alert["fatal_err"].max_delay = 2000;
-             cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
-           end
-         end
+        end
       end
 
       `uvm_info("direct_readback", $sformatf("idx:%0d: bank:%0d exec: 0x%x page:%0d derr:%0d",
@@ -1250,8 +1256,6 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
       cfg.otf_host_rd_rcvd++;
       tl_addr += 4;
      end // for (int i = 0; i < num ; i++)
-
-
    endtask
 
    task erase_flash(flash_op_t flash_op, int bank, bit in_err = 0);
@@ -1304,16 +1308,13 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
         if (part == FlashPartData) begin
           // Allocate a quarter of each bank to each read target.
           int byte_size = BytesPerBank / 4;
-          `DV_CHECK_EQ(byte_size, 64 * 256 * 8)
           for (flash_tgt_prefix_e j = TgtRd; j <= TgtDr; j = j.next()) begin : targets
             // 8byte aligned
             addr_t st_addr, ed_addr;
             st_addr = 'h0;
             st_addr[18:17] = cfg.tgt_pre[part][j];
             ed_addr = st_addr + byte_size - 1;
-            for (addr_t addr = st_addr; addr <= ed_addr; addr += 8) begin
-              cfg.update_otf_mem_read_zone(part, i, addr);
-            end
+            cfg.update_otf_mem_read_zone(part, i, st_addr, ed_addr);
             add_address_range(i, part, st_addr, ed_addr);
             `uvm_info("flash_otf_init",
                       $sformatf("part:%s pre:%s bank:%0d st:%x ed:%x",
@@ -1333,9 +1334,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
             for (int k = 0; k < InfoTypeSize[part>>1]; k++) begin : pages
               st_addr[DVPageMSB:DVPageLSB] = k; // page
               ed_addr = st_addr + byte_size - 1;
-              for (addr_t addr = st_addr; addr <= ed_addr; addr += 8) begin
-                cfg.update_otf_mem_read_zone(part, i, addr);
-              end
+              cfg.update_otf_mem_read_zone(part, i, st_addr, ed_addr);
               add_address_range(i, part, st_addr, ed_addr);
               `uvm_info("flash_otf_init",
                         $sformatf("part:%s pre:%s bank:%0d page:%0d st:%x ed:%x",
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
index a24e2df39b3a9..c79001619fa45 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
@@ -21,7 +21,7 @@ class flash_ctrl_phy_ack_consistency_vseq extends flash_ctrl_phy_host_grant_err_
     cfg.scb_h.skip_alert_chk["recov_err"] = 1;
 
     cfg.scb_h.expected_alert["fatal_err"].expected = 1;
-    cfg.scb_h.expected_alert["fatal_err"].max_delay = 20000;
+    cfg.scb_h.expected_alert["fatal_err"].max_delay = 2_000_000;
     cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
     $assertoff(0, "tb.dut.u_eflash.gen_flash_cores[0].u_host_rsp_fifo.gen_normal_fifo.u_fifo_cnt");
 
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
index 81e163a107ee6..a8393c8609f68 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
@@ -17,47 +17,53 @@ class flash_ctrl_read_word_sweep_vseq extends flash_ctrl_otf_base_vseq;
   // It begs a better way to handle this, like just stopping the loop below.
   constraint partition_c {rand_op.partition == FlashPartData;}
 
+  localparam int InitializedMemBytes = 1024;
+
+  local function void initialize_memory(flash_dv_part_e partition, int bank,
+                                        otf_addr_t start_addr, otf_addr_t end_addr);
+    `uvm_info("read_word_sweep", $sformatf(
+              "Initializing bank:%0d %s from addr:0x%x to:0x%x",
+              bank, partition.name, start_addr, end_addr),
+              UVM_MEDIUM)
+    cfg.update_otf_mem_read_zone(partition, bank, start_addr, end_addr);
+  endfunction
+
   virtual task body();
     flash_op_t ctrl;
     addr_t start_addr, max_addr;
+    addr_t addr;
 
     int num, bank;
     int mywd;
 
     `DV_CHECK_RANDOMIZE_FATAL(this)
 
+    bank = rand_op.addr[OTFBankId];
+    start_addr = rand_op.addr;
+    max_addr = start_addr + InitializedMemBytes - 1;
+
     // It may be better to initialize the data right before each individual read.
-    begin
-      addr_t addr;
-      addr = rand_op.addr;
-      addr[2] = 1'b0;
-      `uvm_info("read_word_sweep", $sformatf(
-                "Initializing data from addr:0x%x to:0x%x", addr, addr + 256 * 4 - 1),
-                UVM_MEDIUM)
-       for (int w = 0; w < 256; w += 2) begin
-         cfg.update_otf_mem_read_zone(rand_op.partition, rand_op.addr[OTFBankId], addr);
-         addr += 8;
-       end
-    end
+    initialize_memory(rand_op.partition, bank, start_addr, max_addr);
 
     ctrl = rand_op;
     num = 1;
     mywd = 1;
-    start_addr = rand_op.addr;
-    max_addr = start_addr;
+    addr = start_addr;
     repeat(20) begin
-      addr_t end_addr = ctrl.addr + num * mywd - 1;
-      if (end_addr > max_addr) max_addr = end_addr;
+      addr_t end_addr = addr + num * mywd * 4 - 1;
+      // Don't read uninitialized memory to avoid trouble.
+      if (end_addr > max_addr) break;
+      ctrl.addr = addr;
+      ctrl.otf_addr = addr;
       print_flash_op(ctrl, UVM_MEDIUM);
       `uvm_info("read_word_sweep", $sformatf(
                 "Reading from addr:0x%x, otf_addr:0x%x, num:%0d, wd:%0d",
                 ctrl.addr, ctrl.otf_addr, num, mywd),
                 UVM_MEDIUM)
       read_flash(ctrl, bank, num, mywd);
+      addr += num * mywd * 4;
       mywd = (mywd % 16) + 1;
     end
-    `uvm_info(`gfn, $sformatf("Total test address span: min 0x%x, max 0x%x", start_addr, max_addr),
-              UVM_MEDIUM)
   endtask
 
 endclass : flash_ctrl_read_word_sweep_vseq
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
index 5debb869aeaed..7acd29c211a74 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
@@ -45,12 +45,13 @@ class flash_ctrl_rw_evict_vseq extends flash_ctrl_legacy_base_vseq;
           `DV_CHECK(try_create_prog_op(ctrl, bank, num), "Could not create a prog flash op")
           ctrl.num_words = fractions;
           if (evict_start && addr_q.size >= TargetAddrQSize) begin
+            string entries = $sformatf("%p", addr_q);
             addr_q.shuffle();
             entry = addr_q.pop_front();
             ctrl.addr = entry.addr;
             ctrl.otf_addr = entry.addr;
             `uvm_info(`gfn, $sformatf(
-                      "The address to evict is 0x%x, chosen from %p", entry.addr, addr_q),
+                      "The address to evict is 0x%x, chosen from %s", entry.addr, entries),
                       UVM_MEDIUM)
             ctrl.partition = entry.part;
             init_ctrl = ctrl;
@@ -120,6 +121,9 @@ class flash_ctrl_rw_evict_vseq extends flash_ctrl_legacy_base_vseq;
 
   // We evict two bus words (one flash word).
   virtual task send_evict(flash_op_t ctrl, int bank);
+    `uvm_info(`gfn, $sformatf(
+              "Sending eviction write bank:%0d %s addr:0x%x",
+              bank, ctrl.partition.name, ctrl.addr), UVM_MEDIUM)
     prog_flash(ctrl, bank, /*num=*/1, /*wd=*/2);
   endtask : send_evict
 
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
index 39e506743fa11..37d29f0f87939 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
@@ -65,3 +65,4 @@
 `include "flash_ctrl_hw_read_seed_err_vseq.sv"
 `include "flash_ctrl_hw_prog_rma_wipe_err_vseq.sv"
 `include "flash_ctrl_rd_ooo_vseq.sv"
+`include "flash_ctrl_basic_rw_vseq.sv"
diff --git a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
index 74320381dad2b..f8bf49b88d905 100644
--- a/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
+++ b/hw/ip_templates/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
@@ -14,14 +14,20 @@ class flash_ctrl_write_word_sweep_vseq extends flash_ctrl_otf_base_vseq;
     flash_op_t ctrl;
     int num, bank;
     int mywd;
+    addr_t addr;
 
     // Don't select a partition defined as read-only
     cfg.seq_cfg.avoid_ro_partitions = 1'b1;
     `DV_CHECK(try_create_prog_op(ctrl, bank, num), "Could not create a prog flash op")
+    num = 1;
     mywd = fractions;
     `DV_CHECK_EQ(mywd, 2)
+    addr = ctrl.addr;
     repeat(10) begin
+      ctrl.addr = addr;
+      ctrl.otf_addr = addr;
       prog_flash(ctrl, bank, num, mywd);
+      addr += num * mywd * 4;
       mywd = (mywd % 16) + 2;
     end
   endtask
diff --git a/hw/ip_templates/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson b/hw/ip_templates/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
index cd24fdc18b702..f27d0374a0f32 100644
--- a/hw/ip_templates/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
+++ b/hw/ip_templates/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
@@ -348,7 +348,7 @@
       name: flash_ctrl_rw_evict_all_en
       uvm_test_seq: flash_ctrl_rw_evict_vseq
       run_opts: ["+scb_otf_en=1", "+ecc_mode=1", "+en_always_read=1",
-                 "+en_always_prog=1", "en_rnd_data=0"]
+                 "+en_always_prog=1", "+en_rnd_data=0"]
       reseed: 40
     }
     {
@@ -477,6 +477,11 @@
                  "+otf_num_hr=100", "+en_always_read=1"]
       reseed: 3
     }
+    {
+      name: flash_ctrl_basic_rw
+      uvm_test_seq: flash_ctrl_basic_rw_vseq
+      reseed: 3
+    }
  ]
 
   // List of regressions.
diff --git a/hw/ip_templates/pwrmgr/data/pwrmgr.hjson.tpl b/hw/ip_templates/pwrmgr/data/pwrmgr.hjson.tpl
index bcf850c94016e..19400b1b067c7 100644
--- a/hw/ip_templates/pwrmgr/data/pwrmgr.hjson.tpl
+++ b/hw/ip_templates/pwrmgr/data/pwrmgr.hjson.tpl
@@ -34,7 +34,7 @@
     {
       version:            "1.0.1",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
diff --git a/hw/ip_templates/pwrmgr/doc/checklist.md b/hw/ip_templates/pwrmgr/doc/checklist.md
index 1fe8d2a7ae2d7..fcdabc29bbd02 100644
--- a/hw/ip_templates/pwrmgr/doc/checklist.md
+++ b/hw/ip_templates/pwrmgr/doc/checklist.md
@@ -95,17 +95,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        |
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | @matutem, @vogelpi, @adk
+Review        | Signoff date            | Done        | 2024-08-06
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/ip_templates/rstmgr/data/rstmgr.hjson.tpl b/hw/ip_templates/rstmgr/data/rstmgr.hjson.tpl
index f7518a04efed2..ab1818f4eb811 100644
--- a/hw/ip_templates/rstmgr/data/rstmgr.hjson.tpl
+++ b/hw/ip_templates/rstmgr/data/rstmgr.hjson.tpl
@@ -39,7 +39,7 @@
     {
       version:            "1.0.0",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
diff --git a/hw/ip_templates/rstmgr/doc/checklist.md b/hw/ip_templates/rstmgr/doc/checklist.md
index 44a4205802bae..1e01155675d9d 100644
--- a/hw/ip_templates/rstmgr/doc/checklist.md
+++ b/hw/ip_templates/rstmgr/doc/checklist.md
@@ -95,17 +95,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | With waivers approved by TC on 2024-08-08
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | matutem@, vogelpi@, adk@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/lint/sival_testplan_schema.hjson b/hw/lint/sival_testplan_schema.hjson
new file mode 100644
index 0000000000000..30ac9392a3097
--- /dev/null
+++ b/hw/lint/sival_testplan_schema.hjson
@@ -0,0 +1,78 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "$schema": "https://json-schema.org/draft/2019-09/schema",
+  "properties": {
+    "name": {
+      "type": "string"
+    },
+    "additionalProperties": false,
+    "testpoints": {
+      "type": "array",
+      "items": {
+        "additionalProperties": false,
+        "type": "object",
+        "properties": {
+          "name": {
+            "type": "string"
+          },
+          "desc": {
+            "type": "string"
+          },
+          "stage": {
+            "enum": ["V1", "V2", "V2S", "V3"]
+          },
+          "si_stage": {
+            "enum": ["SV1", "SV2", "SV3", "SV4", "SV5", "NA", "None"]
+          },
+          "bazel": {
+            "type": "array"
+          },
+          "boot_stages": {
+            "type": "array",
+            "items": {
+              "enum": ["rom_ext", "silicon_owner"]
+            }
+          },
+          "lc_states": {
+            "type": "array",
+            "items": {
+              "enum": ["PROD", "TEST_UNLOCKED", "RAW", "SCRAP", "TEST_LOCKED",
+                "TEST_LOCKED0", "DEV", "RMA", "TEST_UNLOCKED0", "PROD_END"]
+            }
+          },
+          "features": {
+            "type": "array"
+          },
+          "tests": {
+            "type": "array"
+          },
+          "otp_mutate": {
+            "type": "boolean"
+          },
+          "host_support": {
+            "type": "boolean"
+          },
+          "tags": {
+            "type": "array"
+          }
+        },
+        // If the si_stage is not tagged NA, then require the bazel property be present.
+        "if": {
+          "properties": {
+            "si_stage": {
+              "not": {
+                "const": "NA"
+              }
+            }
+          }
+        },
+        "then": {
+          "required": ["bazel"]
+        },
+        "required": ["name", "desc", "stage", "si_stage", "tests"]
+      }
+    }
+  }
+}
diff --git a/hw/top_earlgrey/BUILD b/hw/top_earlgrey/BUILD
index 6774df1d426e8..d9fbfe3865802 100644
--- a/hw/top_earlgrey/BUILD
+++ b/hw/top_earlgrey/BUILD
@@ -2,14 +2,18 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("//hw/top_earlgrey:defs.bzl", "EARLGREY_SLOTS")
 load(
     "//rules:autogen.bzl",
     "autogen_hjson_c_header",
     "autogen_hjson_rust_header",
 )
+load(
+    "//rules:manifest.bzl",
+    "manifest",
+)
 load(
     "//rules/opentitan:defs.bzl",
-    "CLEAR_KEY_SET",
     "DEFAULT_TEST_FAILURE_MSG",
     "DEFAULT_TEST_SUCCESS_MSG",
     "fpga_cw305",
@@ -17,8 +21,10 @@ load(
     "fpga_cw340",
     "silicon",
     "sim_dv",
+    "sim_qemu",
     "sim_verilator",
 )
+load("//rules/opentitan:qemu.bzl", "qemu_cfg", "qemu_flash", "qemu_otp")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -60,6 +66,14 @@ filegroup(
     ],
 )
 
+# The following definition is used to define a null manifest in the signing
+# configuration for execution environments (exec_env) and opentitan_test
+# and opentitan_binary rules. When building the binaries, if the manifest equals
+# to this null manifest, then the signing will be skipped.
+CLEAR_MANIFEST = manifest(d = {
+    "name": "none_manifest",
+})
+
 ###########################################################################
 # FPGA CW310 Environments
 ###########################################################################
@@ -73,6 +87,7 @@ fpga_cw310(
     ],
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = "testing-not-supported",
 )
 
@@ -84,22 +99,21 @@ fpga_cw310(
         "--logging=info",
         "--interface={interface}",
     ] + select({
-        "@//ci:lowrisc_fpga_cw310": ["--uarts=/dev/ttyACM_CW310_1,/dev/ttyACM_CW310_0"],
+        "//ci:lowrisc_fpga_cw310": ["--uarts=/dev/ttyACM_CW310_1,/dev/ttyACM_CW310_0"],
         "//conditions:default": [],
     }),
     base = ":fpga_cw310",
     base_bitstream = "//hw/bitstream:bitstream",
     exec_env = "fpga_cw310_test_rom",
+    mmi = "//hw/bitstream:cw310_mmi",
     openocd_adapter_config = "//third_party/openocd:jtag_olimex_cfg",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
-    otp_mmi = "//hw/bitstream:otp_mmi",
     param = {
         "interface": "cw310",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
     rom = "//sw/device/lib/testing/test_rom:test_rom",
-    rom_mmi = "//hw/bitstream:rom_mmi",
     test_cmd = """
         --exec="transport init"
         --exec="fpga load-bitstream {bitstream}"
@@ -113,17 +127,121 @@ fpga_cw310(
     name = "fpga_cw310_rom_with_fake_keys",
     testonly = True,
     base = ":fpga_cw310_test_rom",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
     exec_env = "fpga_cw310_rom_with_fake_keys",
     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
     rom = "//sw/device/silicon_creator/rom:mask_rom",
 )
 
+sim_qemu(
+    name = "sim_qemu_base",
+    args = [
+        "--rcfile=",
+        "--logging=info",
+        "--interface={interface}",
+        "--qemu-monitor-tty=qemu-monitor",
+        "--qemu-quit",
+    ],
+    design = "earlgrey",
+    exec_env = "sim_qemu_base",
+    libs = [
+        "//sw/device/lib/arch:boot_stage_rom_ext",
+        "//sw/device/lib/arch:sim_qemu",
+    ],
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+    otp = "//hw/ip/otp_ctrl/data:img_rma",
+    param = {
+        "interface": "qemu",
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
+    test_cmd = """
+        --exec="transport init"
+        {bootstrap_cmd}
+        --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+        no-op
+    """,
+)
+
+sim_qemu(
+    name = "sim_qemu_rom_with_fake_keys",
+    testonly = True,
+    base = ":sim_qemu_base",
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
+    exec_env = "sim_qemu_rom_with_fake_keys",
+    manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+    rom = "//sw/device/silicon_creator/rom:mask_rom",
+)
+
+sim_qemu(
+    name = "sim_qemu_sival",
+    testonly = True,
+    base = ":sim_qemu_base",
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+    exec_env = "sim_qemu_sival",
+    manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    rom = "//sw/device/silicon_creator/rom:mask_rom",
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+)
+
+sim_qemu(
+    name = "sim_qemu_rom_ext",
+    testonly = True,
+    base = ":sim_qemu_base",
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    exec_env = "sim_qemu_rom_ext",
+    libs = [
+        "//sw/device/lib/arch:boot_stage_owner",
+        "//sw/device/lib/arch:sim_qemu",
+    ],
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+    manifest = "//sw/device/silicon_owner:manifest",
+    otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma",
+    param = {
+        "interface": "qemu",
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+    },
+    rom = "//sw/device/silicon_creator/rom:mask_rom",
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+)
+
+sim_qemu(
+    name = "sim_qemu_sival_rom_ext",
+    testonly = True,
+    base = ":sim_qemu_base",
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    exec_env = "sim_qemu_sival_rom_ext",
+    libs = [
+        "//sw/device/lib/arch:boot_stage_owner",
+        "//sw/device/lib/arch:sim_qemu",
+    ],
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+    manifest = "//sw/device/silicon_owner:manifest",
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    param = {
+        "interface": "qemu",
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+    },
+    rom = "//sw/device/silicon_creator/rom:mask_rom",
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+)
+
 fpga_cw310(
     name = "fpga_cw310_rom_ext",
     testonly = True,
     base = ":fpga_cw310_test_rom",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = select({
+        "//signing:test_keys": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        # We choose key zero in the appkey's keyset, which should be app-key-prod-0.
+        "//conditions:default": {"//signing:appkey": "0"},
+    }),
     exec_env = "fpga_cw310_rom_ext",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
@@ -136,11 +254,13 @@ fpga_cw310(
         "interface": "cw310",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
-        "assemble": "{rom_ext}@0 {firmware}@0x10000",
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
     },
     rom = "//sw/device/silicon_creator/rom:mask_rom",
-    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-    rsa_key = {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
+    rom_ext = select({
+        "//signing:test_keys": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "//conditions:default": "//sw/device/silicon_creator/rom_ext/sival/binaries:rom_ext_dice_x509_prod",
+    }),
 )
 
 fpga_cw310(
@@ -153,18 +273,17 @@ fpga_cw310(
     ],
     base = ":fpga_cw310",
     base_bitstream = "//hw/bitstream/hyperdebug:bitstream",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
     exec_env = "fpga_hyper310_rom_with_fake_keys",
     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+    mmi = "//hw/bitstream/hyperdebug:mmi",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
-    otp_mmi = "//hw/bitstream/hyperdebug:otp_mmi",
     param = {
         "interface": "hyper310",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
     rom = "//sw/device/silicon_creator/rom:mask_rom",
-    rom_mmi = "//hw/bitstream/hyperdebug:rom_mmi",
     test_cmd = """
         --exec="transport init"
         --exec="fpga load-bitstream {bitstream}"
@@ -178,7 +297,7 @@ fpga_cw310(
     name = "fpga_hyper310_rom_ext",
     testonly = True,
     base = ":fpga_hyper310_rom_with_fake_keys",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
     exec_env = "fpga_hyper310_rom_ext",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
@@ -191,10 +310,9 @@ fpga_cw310(
         "interface": "hyper310",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
-        "assemble": "{rom_ext}@0 {firmware}@0x10000",
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
     },
-    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-    rsa_key = {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
 )
 
 # FPGA configuration used to emulate silicon targets. This rule can be used by
@@ -210,10 +328,10 @@ fpga_cw310(
     # PROD keys are allowed to run across all life cycle stages. This prod key
     # is used to enable execution across life cycle stages with a single
     # binary.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     exec_env = "fpga_cw310_sival",
-    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
     tags = ["cw310_sival"],
 )
 
@@ -225,15 +343,14 @@ fpga_cw310(
     name = "fpga_cw310_sival_rom_ext",
     testonly = True,
     base = ":fpga_hyper310_rom_ext",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
     exec_env = "fpga_cw310_sival_rom_ext",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
         "//sw/device/lib/arch:fpga_cw310",
     ],
-    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
-    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-    rsa_key = {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_prod_private_key_0": "prod_key_0"},
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
     tags = ["cw310_sival_rom_ext"],
 )
 
@@ -254,6 +371,7 @@ fpga_cw305(
     ],
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = "testing-not-supported",
 )
 
@@ -271,7 +389,7 @@ fpga_cw340(
         "--logging=info",
         "--interface={interface}",
     ] + select({
-        "@//ci:lowrisc_fpga_cw340": ["--uarts=/dev/ttyACM_CW340_1,/dev/ttyACM_CW340_0"],
+        "//ci:lowrisc_fpga_cw340": ["--uarts=/dev/ttyACM_CW340_1,/dev/ttyACM_CW340_0"],
         "//conditions:default": [],
     }),
     design = "earlgrey",
@@ -287,6 +405,7 @@ fpga_cw340(
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = "testing-not-supported",
 )
 
@@ -296,10 +415,9 @@ fpga_cw340(
     base = ":fpga_cw340",
     base_bitstream = "//hw/bitstream/cw340:bitstream",
     exec_env = "fpga_cw340_test_rom",
+    mmi = "//hw/bitstream/cw340:mmi",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
-    otp_mmi = "//hw/bitstream/cw340:otp_mmi",
     rom = "//sw/device/lib/testing/test_rom:test_rom",
-    rom_mmi = "//hw/bitstream/cw340:rom_mmi",
     test_cmd = """
         --exec="transport init"
         --exec="fpga load-bitstream {bitstream}"
@@ -314,13 +432,12 @@ fpga_cw340(
     testonly = True,
     base = ":fpga_cw340",
     base_bitstream = "//hw/bitstream/cw340:bitstream",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
     exec_env = "fpga_cw340_rom_with_fake_keys",
     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+    mmi = "//hw/bitstream/cw340:mmi",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
-    otp_mmi = "//hw/bitstream/cw340:otp_mmi",
     rom = "//sw/device/silicon_creator/rom:mask_rom",
-    rom_mmi = "//hw/bitstream/cw340:rom_mmi",
     test_cmd = """
         --exec="transport init"
         --exec="fpga load-bitstream {bitstream}"
@@ -334,7 +451,11 @@ fpga_cw340(
     name = "fpga_cw340_rom_ext",
     testonly = True,
     base = ":fpga_cw340_rom_with_fake_keys",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = select({
+        "//signing:test_keys": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        # We choose key zero in the appkey's keyset, which should be app-key-prod-0.
+        "//conditions:default": {"//signing:appkey": "0"},
+    }),
     exec_env = "fpga_cw340_rom_ext",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
@@ -347,10 +468,12 @@ fpga_cw340(
         "interface": "hyper340",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
-        "assemble": "{rom_ext}@0 {firmware}@0x10000",
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
     },
-    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-    rsa_key = {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
+    rom_ext = select({
+        "//signing:test_keys": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "//conditions:default": "//sw/device/silicon_creator/rom_ext/sival/binaries:rom_ext_dice_x509_prod",
+    }),
 )
 
 # FPGA configuration used to emulate silicon targets. This rule can be used by
@@ -366,10 +489,10 @@ fpga_cw340(
     # PROD keys are allowed to run across all life cycle stages. This prod key
     # is used to enable execution across life cycle stages with a single
     # binary.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     exec_env = "fpga_cw340_sival",
-    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
     tags = ["cw340_sival"],
 )
 
@@ -381,15 +504,14 @@ fpga_cw340(
     name = "fpga_cw340_sival_rom_ext",
     testonly = True,
     base = ":fpga_cw340_rom_ext",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
     exec_env = "fpga_cw340_sival_rom_ext",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
         "//sw/device/lib/arch:fpga_cw340",
     ],
-    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
-    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-    rsa_key = {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_prod_private_key_0": "prod_key_0"},
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
     tags = ["cw340_sival_rom_ext"],
 )
 
@@ -405,9 +527,14 @@ silicon(
         "--interface={interface}",
     ],
     design = "earlgrey",
-    # TODO: Add switch to enable privdate key.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
+    ecdsa_key = select({
+        "//signing:test_keys": {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
+        # We choose key zero in the keyset, which should be `*-earlgrey-a1-root-ecdsa-prod-0`.
+        "//conditions:default": {"//signing:appkey": "0"},
+    }),
     exec_env = "silicon_creator",
+    extract_sw_logs = "//util/device_sw_utils:extract_sw_logs_db",
+    flash_scramble_tool = "//util/design:gen-flash-img",
     libs = [
         "//sw/device/lib/arch:boot_stage_rom_ext",
         "//sw/device/lib/arch:silicon",
@@ -420,6 +547,7 @@ silicon(
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = """
         --exec="transport init"
         --exec="bootstrap --clear-uart=true {firmware}"
@@ -437,8 +565,14 @@ silicon(
         "--interface={interface}",
     ],
     design = "earlgrey",
-    ecdsa_key = CLEAR_KEY_SET,
+    ecdsa_key = select({
+        "//signing:test_keys": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        # We choose key zero in the appkey's keyset, which should be app-key-prod-0.
+        "//conditions:default": {"//signing:appkey": "0"},
+    }),
     exec_env = "silicon_owner_sival_rom_ext",
+    extract_sw_logs = "//util/device_sw_utils:extract_sw_logs_db",
+    flash_scramble_tool = "//util/design:gen-flash-img",
     libs = [
         "//sw/device/lib/arch:boot_stage_owner",
         "//sw/device/lib/arch:silicon",
@@ -449,19 +583,13 @@ silicon(
         "interface": "teacup",
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
-        "assemble": "{rom_ext}@0 {firmware}@0x10000",
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
     },
-    # The //conditions:default ROM_EXT needs to be updated to use the following
-    # target once available:
-    # //sw/device/silicon_creator/rom_ext/sival/binaries:rom_ext_real_prod_signed_slot_a
     rom_ext = select({
-        "//signing:test_keys": "//sw/device/silicon_creator/rom_ext/sival:rom_ext_fake_prod_signed_slot_a",
-        "//conditions:default": "//sw/device/silicon_creator/rom_ext/sival:rom_ext_fake_prod_signed_slot_a",
-    }),
-    rsa_key = select({
-        "//signing:test_keys": {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
-        "//conditions:default": {"//sw/device/silicon_creator/rom_ext/sival/keys:keyset": "earlgrey_z0_sival_1"},
+        "//signing:test_keys": "//sw/device/silicon_creator/rom_ext/sival:rom_ext_dice_x509_fake_slot_a",
+        "//conditions:default": "//sw/device/silicon_creator/rom_ext/sival/binaries:rom_ext_dice_x509_prod",
     }),
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = """
         --exec="transport init"
         --exec="bootstrap --clear-uart=true {firmware}"
@@ -470,25 +598,6 @@ silicon(
     """,
 )
 
-silicon(
-    name = "silicon_owner_prodc_rom_ext",
-    testonly = True,
-    base = ":silicon_owner_sival_rom_ext",
-    ecdsa_key = CLEAR_KEY_SET,
-    exec_env = "silicon_owner_prodc_rom_ext",
-    # The //conditions:default ROM_EXT needs to be updated to use the following
-    # target once available:
-    # //sw/device/silicon_creator/rom_ext/prodc/binaries:rom_ext_real_prod_signed_slot_a.
-    rom_ext = select({
-        "//signing:test_keys": "//sw/device/silicon_creator/rom_ext/prodc:rom_ext_fake_prod_signed_slot_a",
-        "//conditions:default": "//sw/device/silicon_creator/rom_ext/prodc:rom_ext_fake_prod_signed_slot_a",
-    }),
-    rsa_key = select({
-        "//signing:test_keys": {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
-        "//conditions:default": {"//sw/device/silicon_creator/rom_ext/prodc/keys:keyset": "earlgrey_z1_prodc_1"},
-    }),
-)
-
 ###########################################################################
 # Sim Verilator Environments
 #
@@ -506,6 +615,7 @@ sim_verilator(
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
     otp = "//hw/ip/otp_ctrl/data:img_rma",
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
     test_cmd = "testing-not-supported",
 )
 
@@ -542,7 +652,7 @@ sim_verilator(
     name = "sim_verilator_rom_with_fake_keys",
     testonly = True,
     base = ":sim_verilator",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
     rom = "//sw/device/silicon_creator/rom:mask_rom_sim_verilator",
 )
@@ -569,6 +679,7 @@ sim_dv(
     otp_mmap = "//hw/ip/otp_ctrl/data:otp_ctrl_mmap.hjson",
     otp_seed = "//hw/ip/otp_ctrl/data:otp_seed",
     rom_scramble_config = "//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
+    slot_spec = EARLGREY_SLOTS,
 )
 
 sim_dv(
diff --git a/hw/top_earlgrey/cdc/chip_earlgrey_asic_cdc_cfg.hjson b/hw/top_earlgrey/cdc/chip_earlgrey_asic_cdc_cfg.hjson
index e1be0631ece40..020ad93b23ac7 100644
--- a/hw/top_earlgrey/cdc/chip_earlgrey_asic_cdc_cfg.hjson
+++ b/hw/top_earlgrey/cdc/chip_earlgrey_asic_cdc_cfg.hjson
@@ -11,7 +11,7 @@
   import_cfgs: [// Project wide common synthesis config file
                 "{proj_root}/hw/cdc/tools/dvsim/common_cdc_cfg.hjson"]
 
-  tool: verixcdc
+  tool: meridiancdc
 
   // Overrides
   overrides: [
@@ -24,17 +24,11 @@
   // Timing constraints for this module
   sdc_file: "{proj_root}/hw/top_earlgrey/syn/chip_earlgrey_asic.sdc"
 
-  // Verix environment file with additional definitions (may have to populate later)
-  env_file: ""
-
   // Main CDC waiver file
-  cdc_waiver_file: "{proj_root}/hw/top_earlgrey/cdc/cdc_waivers.tcl"
-
-  // CDC customized env file for ast integration
-  cdc_user_env: "{proj_root}/hw/top_earlgrey/cdc/top_user.env"
+  cdc_waiver_file: ""
 
-  // AST.lib
-  ast_lib: "{proj_root}/hw/top_earlgrey/ip/ast/lib/ast.lib"
+  // CDC customized env file
+  cdc_env_file: "{proj_root}/hw/top_earlgrey/cdc/user_intent.env"
 
   // Technology path for this module (empty for open-source runs)
   foundry_root: ""
diff --git a/hw/top_earlgrey/cdc/user_intent.env b/hw/top_earlgrey/cdc/user_intent.env
new file mode 100644
index 0000000000000..d865eb5b98478
--- /dev/null
+++ b/hw/top_earlgrey/cdc/user_intent.env
@@ -0,0 +1,5 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# MeridianCDC user intent file
diff --git a/hw/top_earlgrey/chip_earlgrey_cw310.core b/hw/top_earlgrey/chip_earlgrey_cw310.core
index ea79d3f5419dc..63a60d53d2940 100644
--- a/hw/top_earlgrey/chip_earlgrey_cw310.core
+++ b/hw/top_earlgrey/chip_earlgrey_cw310.core
@@ -7,6 +7,7 @@ description: "Earl Grey toplevel for the ChipWhisperer CW310 board"
 filesets:
   files_rtl_cw310:
     depend:
+      - lowrisc:prim_xilinx:earlgrey_xilinx_prim_pkg
       - lowrisc:systems:top_earlgrey:0.1
       - lowrisc:systems:top_earlgrey_pkg
       - lowrisc:systems:ast
diff --git a/hw/top_earlgrey/chip_earlgrey_cw310_hyperdebug.core b/hw/top_earlgrey/chip_earlgrey_cw310_hyperdebug.core
index 5c04b28f56a40..2b9d8a98b1983 100644
--- a/hw/top_earlgrey/chip_earlgrey_cw310_hyperdebug.core
+++ b/hw/top_earlgrey/chip_earlgrey_cw310_hyperdebug.core
@@ -7,6 +7,7 @@ description: "Earl Grey toplevel for the ChipWhisperer CW310 board's hyperdebug
 filesets:
   files_rtl_cw310:
     depend:
+      - lowrisc:prim_xilinx:earlgrey_xilinx_prim_pkg
       - lowrisc:systems:top_earlgrey:0.1
       - lowrisc:systems:top_earlgrey_pkg
       - lowrisc:systems:ast
diff --git a/hw/top_earlgrey/chip_earlgrey_cw340.core b/hw/top_earlgrey/chip_earlgrey_cw340.core
index e8adf5346d96d..9aa63ad4ea0ab 100644
--- a/hw/top_earlgrey/chip_earlgrey_cw340.core
+++ b/hw/top_earlgrey/chip_earlgrey_cw340.core
@@ -7,6 +7,7 @@ description: "Earl Grey toplevel for the ChipWhisperer CW340 board"
 filesets:
   files_rtl_cw340:
     depend:
+      - lowrisc:prim_xilinx:earlgrey_xilinx_prim_pkg
       - lowrisc:systems:top_earlgrey:0.1
       - lowrisc:systems:top_earlgrey_pkg
       - lowrisc:systems:ast
diff --git a/hw/top_earlgrey/data/BUILD b/hw/top_earlgrey/data/BUILD
index 668e8fd717534..dda56de039e27 100644
--- a/hw/top_earlgrey/data/BUILD
+++ b/hw/top_earlgrey/data/BUILD
@@ -4,8 +4,6 @@
 
 package(default_visibility = ["//visibility:public"])
 
-exports_files(glob(["autogen/**"]))
-
 filegroup(
     name = "all_files",
     srcs = glob(["**"]),
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 800e2edd505dc..3428d20d4bf31 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -4760,6 +4760,14 @@
           expose: "true"
           name_top: SramCtrlRetAonInstrExec
         }
+        {
+          name: NumPrinceRoundsHalf
+          desc: Number of PRINCE half rounds for the SRAM scrambling feature
+          type: int
+          default: "3"
+          expose: "true"
+          name_top: SramCtrlRetAonNumPrinceRoundsHalf
+        }
       ]
       inter_signal_list:
       [
@@ -7257,6 +7265,7 @@
       param_decl:
       {
         InstrExec: "1"
+        NumPrinceRoundsHalf: "2"
       }
       base_addrs:
       {
@@ -7341,6 +7350,14 @@
           expose: "true"
           name_top: SramCtrlMainInstrExec
         }
+        {
+          name: NumPrinceRoundsHalf
+          desc: Number of PRINCE half rounds for the SRAM scrambling feature
+          type: int
+          default: "2"
+          expose: "true"
+          name_top: SramCtrlMainNumPrinceRoundsHalf
+        }
       ]
       inter_signal_list:
       [
diff --git a/hw/top_earlgrey/data/chip_testplan.hjson b/hw/top_earlgrey/data/chip_testplan.hjson
index d84004b551be1..6ebadde18919b 100644
--- a/hw/top_earlgrey/data/chip_testplan.hjson
+++ b/hw/top_earlgrey/data/chip_testplan.hjson
@@ -18,13 +18,16 @@
     // Manufacturing test cases are part of the Silicon Validation (SiVal) test plan.
     "sw/device/silicon_creator/manuf/data/manuf_testplan.hjson"
 
+    // Cryptolib tests are also part of silicon validation.
+    "sw/device/lib/crypto/data/crypto_testplan.hjson"
+
     // IP block specific top level test plans.
-    "hw/top_earlgrey/data/ip/chip_aes_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_aes_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_aon_timer_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_csrng_testplan.hjson",
-    "hw/top_earlgrey/data/ip/chip_sysrst_ctrl_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_edn_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_entropy_src_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson",
@@ -34,19 +37,22 @@
     "hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_otbn_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_pwm_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson"
     "hw/top_earlgrey/data/ip/chip_rv_plic_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_rv_timer_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson",
+    "hw/top_earlgrey/data/ip/chip_sysrst_ctrl_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_uart_testplan.hjson",
     "hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson",
-    "hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson",
-    "hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson"
   ]
 
   testpoints: [
@@ -110,6 +116,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_padctrl_attributes"]
+      bazel: ["//sw/device/tests:gpio_pinmux_test"]
     }
     {
       name: chip_padctrl_attributes
@@ -129,6 +136,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_padctrl_attributes"]
+      bazel: ["//sw/device/tests:gpio_pinmux_test"]
     }
     {
       name: chip_sw_sleep_pin_mio_dio_val
@@ -170,7 +178,8 @@
       stage: V2
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["chip_sw_sleep_pin_wake"]
+      tests: ["chip_sw_sleep_pin_wake"],
+      bazel: ["//sw/device/tests:sleep_pin_wake_test"]
     }
     {
       name: chip_sw_sleep_pin_retention
@@ -218,7 +227,10 @@
       lc_states: ["TEST_UNLOCKED", "DEV", "PROD", "RMA"]
       tests: ["chip_tap_straps_dev", "chip_tap_straps_prod", "chip_tap_straps_rma",
               "chip_tap_straps_testunlock0"]
-      bazel: ["//sw/device/tests:rv_dm_jtag_tap_sel"],
+      bazel: ["//sw/device/tests:rv_dm_jtag_tap_sel_test_unlocked1",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_dev",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_prod",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_rma"],
     }
 
     // PATTGEN (pre-verified IP) integration tests:
@@ -253,6 +265,7 @@
       si_stage: SV2
       lc_states: ["PROD"]
       tests: ["chip_sw_pattgen_ios"]
+      bazel: ["//sw/device/tests:pattgen_ios_test"]
     }
 
     // PWM (pre-verified IP) integration tests:
@@ -370,6 +383,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_ast_clk_rst_inputs"]
+      bazel: []
     }
     {
       name: chip_sw_ast_sys_clk_jitter
@@ -390,6 +404,7 @@
               "chip_sw_kmac_mode_kmac_jitter_en",
               "chip_sw_sram_ctrl_scrambled_access_jitter_en",
               "chip_sw_edn_entropy_reqs_jitter"]
+      bazel: []
     }
     {
       name: chip_sw_ast_usb_clk_calib
@@ -410,6 +425,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_usb_ast_clk_calib"]
+      bazel: []
     }
 
     // SENSOR_CTRL tests:
@@ -441,6 +457,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_sensor_ctrl_status"]
+      bazel: []
     }
     {
       name: chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup
@@ -452,6 +469,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup"]
+      bazel: ["//sw/device/tests:sensor_ctrl_alert_test", "//sw/device/tests:sensor_ctrl_wakeup_test"]
     }
 
     ////////////////////////////
@@ -704,7 +722,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_power_idle_load"]
-      bazel: ["//sw/device/tests:chip_power_idle_load"]
+      bazel: ["//sw/device/tests:chip_power_idle_load_test"]
     }
     {
       name: chip_sw_power_sleep_load
@@ -734,6 +752,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_power_sleep_load"]
+      bazel: ["//sw/device/tests:chip_power_sleep_load_test"]
     }
 
     {
diff --git a/hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson
index 719b2b40d4e38..f444d5b990461 100644
--- a/hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_adc_ctrl_testplan.hjson
@@ -29,6 +29,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_adc_ctrl_sleep_debug_cable_wakeup"]
+      bazel: []
     }
     {
       name: chip_sw_adc_ctrl_sleep_debug_cable_wakeup
@@ -54,6 +55,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_adc_ctrl_sleep_debug_cable_wakeup"]
+      bazel: []
     }
     {
       name: chip_sw_adc_ctrl_normal
@@ -63,6 +65,7 @@
       si_stage: SV2
       lc_states: ["PROD"]
       tests: []
+      bazel: []
     }
     {
       name: chip_sw_adc_ctrl_oneshot
@@ -72,6 +75,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
+      bazel: []
     }
   ]
 }
diff --git a/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson b/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson
index d41a200e2bc0b..03c63b28c39a7 100644
--- a/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_aes_testplan.hjson
@@ -112,6 +112,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
+      bazel: ["//sw/device/tests:aes_interrupt_encryption_test"]
     }
     {
       name: chip_sw_aes_entropy
@@ -143,34 +144,65 @@
     }
     {
       name: chip_sw_aes_prng_reseed
-      desc: '''Verify that PRNG reseeding is triggered
-
-            This test should start encryption, disable the EDN, and verify that the
-            encryption stalls when reseed is required. Afterwards it should verify that AES
-            finishes encryption after EDN is re-enabled.
+      desc: ''' Verify that the AES module halts when a PRNG reseed is
+            required but the entropy complex is disabled, and resumes
+            encryption once the entropy complex is re-enabled.
 
             Procedure:
-            -Configure encryption using the ECB mode, desired key length, and set the engine to
-            automatic operation.
-                -Set the mask_reseeding to once per 64 blocks (kDifAesReseedPer64Block)
-            -Using dif_aes_process_data() encrypt some number of blocks (fewer than 64).
-            -Disable the EDN using dif_edn_stop().
-            -Encrypt more blocks and verify that encryption stalls after 64 blocks.
-                -Once the first 64 blocks are encrypted, a reseed request will be sent to EDN.
-                Since the EDN should be disabled at this point, this should cause encryption
-                to stall.
-            -Re-enable EDN. In order to do this it is required to first disable and re-enable the
-             CSRNG. In order to re-enable CSRNG, it is required to first disable and re-enable
-             the entropy source. The following sequence of steps should be used:
-                -Disable CSRNG
-                -Disable Entropy Source
-                -Enable Entropy Source
-                -Enable CSRNG
-                -Enable EDN
-            -Verify that the AES completes encryption of the remaining blocks.
+            - After proper initialization of the AES and entropy modules,
+              configure the AES encryption operation to process a number of
+              blocks with:
+              - Operation: Encrypt
+              - Mode: ECB
+              - Key Length: 128 bits
+              - Key Provider: Software-provided key
+              - Manual Operation: Disabled (Automatic operation)
+              - Mask Reseeding: Reseed per 64 blocks
+                (`kDifAesReseedPer64Block`)
+              - Reseed on Key Change: Enabled
+              - Force Masks: Disabled
+
+            - Generate AES key.
+
+            - Initialize the AES module and start the AES operation using
+              `dif_aes_start()`.
+
+            - Process blocks using the following steps:
+              - Disable entropy for a block fewer than 64.
+              - For each block,
+                  - Continue encrypting blocks (fewer than 64 blocks)
+                  - Once processing reaches the block where the entropy complex
+                    is disabled
+                    - Disable the entire entropy complex using
+                      `entropy_testutils_stop_all()`.
+                    - This will halt the AES module when a PRNG reseed is
+                      required (i.e after 64 blocks).
+                  - Re-enable the entropy complex to resume encryption:
+                    - Verify that the AES module is halted by checking that
+                      `kDifAesStatusOutputValid` is not set for the 63rd block
+                    - Re-enable the entropy complex using
+                      `entropy_testutils_auto_mode_init()`.
+                    - Wait for some time for the entropy complex to stabilize.
+                    - Wait for the AES module to produce output valid
+                      (`kDifAesStatusOutputValid`).
+                    - Read the encrypted output data using
+                      `dif_aes_read_output()`.
+
+            - Finish the AES encryption operation by calling `dif_aes_end()`.
 
-            -Repeat the test for a reseed rate kDifAesReseedPer8kBlock and a message longer than 8K
-            blocks.
+            - Verify that the AES module is idle at the end of the encryption
+              operation (`kDifAesStatusIdle`).
+            - Repeat the test for a reseed rate kDifAesReseedPer8kBlock and
+              a message longer than 8K blocks.
+
+            Expected Outcome:
+            - The AES module halts when a PRNG reseed is required but the
+              entropy complex is disabled.
+            - After re-enabling the entropy complex, the AES module resumes
+              encryption and produces the expected output.
+            - The test verifies that the AES module correctly handles halting
+              and resuming based on the availability of entropy and the
+              configured mask reseeding rate.
             '''
       features: [
         "AES.MODE.ECB",
@@ -179,31 +211,54 @@
       stage: V2
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["chip_sw_aes_prng_reseed"]
+      tests: []
+      bazel: ["//sw/device/tests:aes_prng_reseed_test"]
     }
     {
       name: chip_sw_aes_force_prng_reseed
-      desc: '''Verify that when KEY_TOUCH_FORCES_RESEED is set, the PRNG reseed is
-               triggered every time a key changes
+      desc: '''Verify that the AES module stalls/halts when the entropy
+            complex is disabled before starting encryption and enables
+            output of encryption once the entropy complex is re-enabled.
 
             Procedure:
-            -Configures the auxiliary options for AES to enable KEY_TOUCH_FORCES_RESEED
-            -Disable the EDN using dif_edn_stop()
-            -Configure the encryption operation, mode, key length, and set the engine to manual
-             operation.
-            -Set up encryption using aes_testutils_setup_encryption()
-              -At this point dif_aes_start() will write the key register which will trigger reseed
-               request. This request will stall the encryption until EDN is re-enabled.
-            -Verify that the encryption stalls.
-            -Re-enable EDN. In order to do this it is required to first disable and re-enable the
-             CSRNG. In order to re-enable CSRNG, it is required to first disable and re-enable
-             the entropy source. The following sequence of steps should be used:
-                -Disable CSRNG
-                -Disable Entropy Source
-                -Enable Entropy Source
-                -Enable CSRNG
-                -Enable EDN
-            -Verify that the AES completes encryption.
+            - After proper initialization of AES and entropy modules, disable
+              the entire entropy complex using `entropy_testutils_stop_all()`.
+              - Configure the AES encryption operation to process some number of
+                blocks with:
+                - Operation: Encrypt
+                - Mode: ECB
+                - Key Length: 128 bits
+                - Key Provider: Software-provided key
+                - Manual Operation: Enabled
+                - Mask Reseeding: Reseed per block
+                - Reseed on Key Change: Enabled (When KEY_TOUCH_FORCES_RESEED is
+                  set, the PRNG reseed is triggered every time a key changes)
+                - Force Masks: Enabled
+              - Generate AES key.
+              - At this point dif_aes_start() will write the key register which
+                will trigger reseed request.
+              - This request will stall the output of the encrypted data until
+                entropy is re-enabled.
+              - Verify that the AES module is halted by checking that
+                `kDifAesStatusOutputValid` is not set.
+              - Re-enable the entropy complex using
+                `entropy_testutils_auto_mode_init()`.
+              - Wait for some time for the entropy complex to stabilize.
+              - Wait for the AES module to produce output valid
+                (`kDifAesStatusOutputValid`).
+              - Read the encrypted output data using `dif_aes_read_output()`.
+              - Process all the blocks and ensure AES completes encryption
+                operation.
+                - Verify that the AES module is idle at the end of encryption
+                  operation (`kDifAesStatusIdle`).
+
+              Expected Outcome:
+              - The AES module halts output when the entropy complex is disabled
+                before starting encryption.
+              - After re-enabling the entropy complex, the AES module resumes
+                encryption and produces the expected output.
+              - The test verifies that the AES module correctly handles halting
+                and resuming based on the availability of entropy.
             '''
       features: [
         "AES.MODE.ECB",
@@ -212,7 +267,53 @@
       stage: V2
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["chip_sw_aes_force_prng_reseed"]
+      tests: []
+      bazel: ["//sw/device/tests:aes_force_prng_reseed_test"]
+    }
+    {
+      name: chip_sw_aes_stall_test
+      desc: '''Verify that the AES module's stall bit assertion
+            when multiple input blocks are loaded without reading
+            output data, and resumes encryption once the output data is read.
+
+            Procedure:
+            - Initialize the AES.
+            - Configure the AES encryption operation with the following settings:
+              - Operation: Encrypt
+              - Mode: ECB
+              - Key Length: 128 bits
+              - Key Provider: Software-provided key
+              - Mask Reseeding: Reseed per block
+              - Manual Operation: Auto
+              - Reseed on Key Change: Enabled
+              - Force Masks: Enabled
+            - Generate an AES key and load it for encryption.
+            - Prepare input blocks with random plaintext data.
+            - Load multiple blocks into AES without reading output data to simulate
+              a stall condition.
+              - Verify that `kDifAesStatusStall` is set.
+            - Once the AES is stalled, read the output blocks one by one.
+              - Verify that reading the output clears the stall condition.
+            - Ensure the AES encryption operation completes successfully
+              and that the AES module reaches the idle state at the end of the test.
+
+            Expected Outcome:
+            - AES enters a stall condition when multiple input blocks are loaded without
+              reading output.
+            - Reading the output clears the stall condition, allowing AES to resume
+              encryption.
+            - The test verifies correct handling of the stall condition and that
+              the AES operation completes as expected.
+            '''
+      features: [
+        "AES.MODE.ECB",
+        "AES.STATUS.STALL",
+      ]
+      stage: V3
+      si_stage: SV3
+      lc_states: ["PROD"]
+      tests: []
+      bazel: ["//sw/device/tests:aes_stall_test"]
     }
     {
       name: chip_sw_aes_idle
@@ -263,7 +364,7 @@
       bazel: [
         "//sw/device/tests/crypto:aes_sideload_functest",
         "//sw/device/tests/crypto:aes_kwp_sideload_functest",
-        "//sw/device/tests/crypto:keymgr_sideload_aes_test",
+        "//sw/device/tests:keymgr_sideload_aes_test",
       ]
     }
     {
diff --git a/hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson b/hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson
index e660717b4eb45..8e8b34f77bccf 100644
--- a/hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_alert_handler_testplan.hjson
@@ -43,6 +43,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_alert_handler_escalation"]
+      bazel: ["//sw/device/tests:alert_handler_escalation_test"]
       otp_mutate: true
       host_support: true
     }
@@ -67,6 +68,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
+      bazel: []
       otp_mutate: false
     }
     {
@@ -85,6 +87,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
+      bazel: []
     }
     {
       name: chip_sw_all_escalation_resets
@@ -120,8 +123,12 @@
       stage: V2
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["chip_plic_all_irqs"]
-      bazel: ["//sw/device/tests/autogen:plic_all_irqs_test_0"]
+      tests: ["chip_plic_all_irqs_0", "chip_plic_all_irqs_10", "chip_plic_all_irqs_20"]
+      bazel: [
+        "//sw/device/tests/autogen:plic_all_irqs_test_0",
+        "//sw/device/tests/autogen:plic_all_irqs_test_10",
+        "//sw/device/tests/autogen:plic_all_irqs_test_20",
+      ]
     }
     {
       name: chip_sw_alert_handler_entropy
@@ -151,7 +158,7 @@
             '''
       features: ["ALERT_HANDLER.CRASH_DUMP"]
       stage: V2
-      si_stage: SV3
+      si_stage: SV1
       lc_states: ["PROD"]
       tests: ["chip_sw_rstmgr_alert_info"]
       bazel: ["//sw/device/tests:rstmgr_alert_info_test"]
@@ -190,6 +197,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_alert_handler_lpg_sleep_mode_alerts"]
+      bazel: []
     }
     {
       name: chip_sw_alert_handler_lpg_sleep_mode_pings
diff --git a/hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson b/hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson
index 806f5c2863316..5e4e4c5cc4523 100644
--- a/hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_clkmgr_testplan.hjson
@@ -188,8 +188,13 @@
             jitter_o clkmgr output to toggle. Verify this output is connected to AST's
             clk_src_sys_jen_i input using formal.
 
+            Test the following properties of jitter enable:
+            - The reset value of jitter_enable is off.
+            - Any write to jitter_enable turns jitter on.
+            - jitter_regwen has no impact on jitter_enable.
+
             X-ref with various specific jitter enable tests.
-            SiVal: This is a connectivity test only, not suitable for sival.
+            SiVal: CPU must be enabled, but no other OTP or lifecycle dependencies.
             '''
       stage: V2
       si_stage: NA
@@ -211,7 +216,14 @@
       name: chip_sw_clkmgr_jitter_cycle_measurements
       desc: '''Verify jitter via clock cycle measurements after calibration.
             The clock count thresholds for main clk need to be set wider than when jitter is disabled.
-            SiVal: This is only useful on real silicon.
+            Check when jitter is enabled:
+            - Using jitter thresholds no errors are detected.
+            - Using normal thresholds results in recoverable errors.
+            - Don't test normal thresholds for FPGAs since they don't support jitter and no errors will occur.
+            Check when jitter is disabled:
+            - Using either sets of thresholds result in no errors.
+
+            SiVal: This is only useful on real silicon since FPGAs don't support jitter.
             Should be done after clock calibration.
             '''
       stage: V3
diff --git a/hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson
index a7a8fb1057653..3a175374c2675 100644
--- a/hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_flash_ctrl_testplan.hjson
@@ -94,6 +94,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_flash_rma_unlocked"]
+      bazel: []
     }
     {
       name: chip_sw_flash_scramble
@@ -160,8 +161,14 @@
       lc_states: ["TEST_LOCKED", "DEV", "PROD", "SCRAP"]
       boot_stages: ["rom_ext"]
       tests: ["chip_sw_flash_ctrl_lc_rw_en"]
-      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_states",
-              "//sw/device/tests:flash_ctrl_info_access_lc_states_personalized"]
+      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_dev",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_end",
+              "//sw/device/tests:flash_ctrl_info_access_lc_rma",
+              "//sw/device/tests:flash_ctrl_info_access_lc_test_unlocked0",
+              "//sw/device/tests:flash_ctrl_info_access_lc_dev_personalized",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_personalized",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_end_personalized"]
 
     }
     {
@@ -193,7 +200,11 @@
       lc_states: ["TEST_LOCKED", "DEV", "PROD", "SCRAP"]
       tests: ["chip_sw_flash_ctrl_lc_rw_en"]
       boot_stages: ["rom_ext"]
-      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_states"]
+      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_dev",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_end",
+              "//sw/device/tests:flash_ctrl_info_access_lc_rma",
+              "//sw/device/tests:flash_ctrl_info_access_lc_test_unlocked0"]
     }
     {
       name: chip_sw_flash_lc_iso_part_sw_rd_en
@@ -213,7 +224,11 @@
       lc_states: ["DEV", "PROD", "SCRAP"]
       tests: ["chip_sw_flash_ctrl_lc_rw_en"]
       boot_stages: ["rom_ext"]
-      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_states"]
+      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_dev",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_end",
+              "//sw/device/tests:flash_ctrl_info_access_lc_rma",
+              "//sw/device/tests:flash_ctrl_info_access_lc_test_unlocked0"]
     }
     {
       name: chip_sw_flash_lc_iso_part_sw_wr_en
@@ -233,7 +248,11 @@
       lc_states: ["TEST_LOCKED", "DEV", "PROD", "SCRAP"]
       tests: ["chip_sw_flash_ctrl_lc_rw_en"]
       boot_stages: ["rom_ext"]
-      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_states"]
+      bazel: ["//sw/device/tests:flash_ctrl_info_access_lc_dev",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod",
+              "//sw/device/tests:flash_ctrl_info_access_lc_prod_end",
+              "//sw/device/tests:flash_ctrl_info_access_lc_rma",
+              "//sw/device/tests:flash_ctrl_info_access_lc_test_unlocked0"]
     }
     {
       name: chip_sw_flash_lc_seed_hw_rd_en
@@ -251,6 +270,7 @@
       lc_states: ["DEV", "PROD", "PROD_END", "RMA"]
       boot_stages: ["rom_ext"]
       tests: ["chip_sw_flash_ctrl_lc_rw_en"]
+      bazel: []
     }
     {
       name: chip_sw_flash_lc_escalate_en
diff --git a/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson b/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson
index d3ce6b865d9bd..3dda20961f590 100644
--- a/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_hmac_testplan.hjson
@@ -98,7 +98,7 @@
       name: chip_sw_hmac_sha2_stress
       desc: '''Verify SHA2 mode of operation.
 
-            - Verify the following digest sizes: 256
+            - Verify the following digest sizes: 256, 384, 512
             - Verify input message size of 0 bytes.
             - Verify multiple input message sizes as defined in NIST test vectors.
             - Use endianness configuration used in the crypto library.
@@ -109,15 +109,22 @@
       lc_states: ["PROD"]
       tests: []
       bazel: [
-        "//sw/device/tests/crypto/cryptotest:hash_kat",
-        "//sw/device/tests/crypto:hmac_sha256_functest",
+        "//sw/device/tests/crypto/cryptotest:sha256_kat",
+        "//sw/device/tests/crypto/cryptotest:sha384_kat",
+        "//sw/device/tests/crypto/cryptotest:sha512_kat",
+        "//sw/device/tests/crypto:sha256_functest",
+        "//sw/device/tests/crypto:sha384_functest",
+        "//sw/device/tests/crypto:sha512_functest",
       ]
     }
     {
       name: chip_sw_hmac_stress
       desc: '''Verify HMAC mode of operation.
 
-            - Verify the following security configurations: HMAC-SHA2-256
+            - Verify all HMAC modes of operation:
+              - HMAC-SHA2-256
+              - HMAC-SHA2-384
+              - HMAC-SHA2-512
             - Verify input message size of 0 bytes.
             - Verify multiple input message sizes as defined in NIST test vectors.
             - Use endianness configuration used in the crypto library.
@@ -128,10 +135,13 @@
       lc_states: ["PROD"]
       tests: []
       bazel: [
-        "//sw/device/tests/crypto/cryptotest:hmac_kat",
-        "//sw/device/tests/crypto:kmac_functest_hardcoded",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha256_kat",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha384_kat",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha512_kat",
+        "//sw/device/tests/crypto:hmac_functest",
+        "//sw/device/tests/crypto:hmac_sha256_functest",
+        "//sw/device/tests/crypto:hmac_sha384_functest",
         "//sw/device/tests/crypto:hmac_sha512_functest",
-        "//sw/device/tests/crypto:hmac_sha384_functest"
       ]
     }
     {
@@ -151,7 +161,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/tests:hmac_endianness_test"]
     }
     {
       name: chip_sw_hmac_secure_wipe
@@ -182,13 +192,14 @@
             - `SwUpdateSecretKeyInProcess`: Update secret key when hash is in progress.
             - `SwHashStartWhenActive`: Issue hash start when hash is in progress.
             - `SwPushMsgWhenDisallowed`: Push message when HMAC is not idle.
+	    - `SwInvalidConfig`: Issue when HMAC configured with incorrect digest-size or key-length
             '''
       features: []
       stage: V3
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/tests:hmac_error_conditions_test"]
     }
   ]
 }
diff --git a/hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson b/hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson
index 75f58c7ec76a1..7cbae9821b15f 100644
--- a/hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_keymgr_testplan.hjson
@@ -43,6 +43,7 @@
         "chip_sw_keymgr_key_derivation",
         "chip_sw_keymgr_key_derivation_jitter_en",
       ]
+      bazel: ["//sw/device/tests:keymgr_key_derivation_test"]
     }
     {
       name: chip_sw_keymgr_sideload_kmac_error
@@ -97,7 +98,10 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_keymgr_sideload_kmac"]
-      bazel: ["//sw/device/tests:keymgr_sideload_kmac_test"]
+      bazel: [
+        "//sw/device/tests:keymgr_sideload_kmac_test",
+        "//sw/device/tests/crypto:kmac_sideload_functest_hardcoded",
+      ]
     }
     {
       name: chip_sw_keymgr_sideload_aes
@@ -133,6 +137,8 @@
       bazel: [
         "//sw/device/tests/crypto:ecdh_p256_sideload_functest",
         "//sw/device/tests/crypto:ecdsa_p256_sideload_functest",
+        "//sw/device/tests/crypto:ecdh_p384_sideload_functest",
+        "//sw/device/tests/crypto:ecdsa_p384_sideload_functest",
       ]
     }
     {
@@ -141,7 +147,6 @@
 
             - For each keymgr operational state: `CreatorRootKey`, `OwnerIntKey` and `OwnerKey`:
               - Generate identity SW output for the Attestation CDI.
-              - Generate SW output for the Attestation CDI.
               - Generate OTBN sideload output for the Attestation CDI.
             - Ensure that the key output changes after calculating the previous steps after a
               keymgr advance operation.
@@ -168,8 +173,12 @@
             stage: V3
             si_stage: SV2
             lc_states: ["PROD"]
-            tests: []
-            bazel: []
+            tests: ["chip_sw_keymgr_derive_attestation"]
+            bazel: [
+              // Covers all points in the test except for the software binding registers.
+              "//sw/device/silicon_creator/lib:otbn_boot_services_functest",
+              "//sw/device/tests:keymgr_derive_attestation_test",
+            ]
     }
     {
       name: chip_sw_keymgr_derive_sealing
@@ -192,8 +201,8 @@
             stage: V3
             si_stage: SV3
             lc_states: ["PROD"]
-            tests: []
-            bazel: []
+            tests: ["chip_sw_keymgr_derive_sealing"]
+            bazel: ["//sw/device/tests:keymgr_derive_sealing_test"]
     }
   ]
 }
diff --git a/hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson b/hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson
index fa1347c614a53..ea8ca537bf0f3 100644
--- a/hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_kmac_testplan.hjson
@@ -68,6 +68,9 @@
       stage: V2
       si_stage: NA
       tests: ["chip_sw_kmac_app_rom"]
+      bazel: [
+        "//sw/device/tests:kmac_app_rom_test",
+      ]
     }
     {
       name: chip_sw_kmac_entropy
@@ -96,6 +99,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_kmac_entropy"]
+      bazel: ["//sw/device/tests:kmac_entropy_test"]
     }
     {
       name: chip_sw_kmac_idle
@@ -132,7 +136,9 @@
       lc_states: ["PROD"]
       tests: []
       bazel: [
-        "//sw/device/tests/crypto/cryptotest:hash_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_256_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_384_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_512_kat",
       ]
     }
     {
@@ -154,7 +160,8 @@
       lc_states: ["PROD"]
       tests: []
       bazel: [
-        "//sw/device/tests/crypto/cryptotest:hash_kat",
+        "//sw/device/tests/crypto/cryptotest:shake128_kat",
+        "//sw/device/tests/crypto/cryptotest:shake256_kat",
       ]
     }
     {
@@ -176,8 +183,8 @@
       lc_states: ["PROD"]
       tests: []
       bazel: [
-        "//sw/device/tests/crypto/cryptotest:hash_kat",
         "//sw/device/tests:kmac_mode_cshake_test",
+        "//sw/device/tests/crypto/cryptotest:cshake_kat",
       ]
     }
     {
@@ -188,17 +195,16 @@
             - Verify input message size of 0 bytes.
             - Verify multiple input message sizes as defined in NIST test vectors.
             - Use endianess configuration used in the crypto library.
-            - Verify multiple XOF configurations.
             '''
       features: [
         "KMAC.MODE.KMAC",
-        "KMAC.MODE.XOF",
       ]
       stage: V3
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
       bazel: [
+        "//sw/device/tests/crypto:kmac_functest_hardcoded",
         "//sw/device/tests/crypto/cryptotest:kmac_kat",
       ]
     }
@@ -211,6 +217,7 @@
             - Configure the keymgr to sideload a key to KMAC.
             - Generate a KMAC output and store it in retention RAM.
             - Clear sideload key from keymgr.
+            - Create a new sideload key with a different salt using keymgr.
             - Verify that KMAC can no longer reproduce the same KMAC output.
             - Perform software initiated reset.
             - Configure the keymgr again to sideload a key to KMAC.
@@ -226,7 +233,9 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: []
+      bazel: [
+        "//sw/device/tests:kmac_kmac_key_sideload_test",
+      ]
     }
     {
       name: chip_sw_kmac_endianess
@@ -245,7 +254,9 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: []
+      bazel: [
+        "//sw/device/tests:kmac_endianess_test",
+      ]
     }
     {
       name: chip_sw_kmac_entropy_stress
@@ -269,7 +280,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: ["//sw/device/tests/crypto:kmac_functest_hardcoded"]
+      bazel: ["//sw/device/tests:kmac_entropy_stress_test"]
     }
     {
       name: chip_sw_kmac_error_conditions
@@ -288,6 +299,10 @@
             - ErrIncorrectFunctionName: covers that the function name is configured incorrectly
                                         when KMAC mode is enabled
             - ErrSwCmdSequence: covers that SW issues commands to the KMAC out of order
+            - Shadow register update alert: covers that the an recoverable alert is triggered on active
+                                            shadow register update error
+            - ErrSwHashingWithoutEntropyReady: covers that starting a hash operation when the entropy is
+                                               not ready triggers an error
 
             Some of the error conditions may be difficult to reproduce in silicon. In such cases,
             update the test description to capture any limitations.
@@ -297,7 +312,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/tests:kmac_error_conditions_test"]
     }
   ]
 }
diff --git a/hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson
index 467e7de9d059c..3a02ce15cb313 100644
--- a/hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_lc_ctrl_testplan.hjson
@@ -135,7 +135,7 @@
       otp_mutate: true
       lc_states: ["RAW", "TEST_UNLOCKED", "TEST_LOCKED", "DEV", "PROD", "PROD_END"]
       tests: ["chip_sw_lc_ctrl_transition"]
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_device_info_flash_wr_test_unlocked0_to_prod_functest"]
     }
     {
       name: chip_sw_lc_ctrl_key_div
@@ -288,11 +288,13 @@
              Verify that the features that should indeed be disabled are indeed disabled.
              '''
       stage: V2
+      si_stage: None
       tests: ["chip_sw_lc_walkthrough_dev",
               "chip_sw_lc_walkthrough_prod",
               "chip_sw_lc_walkthrough_prodend",
               "chip_sw_lc_walkthrough_rma",
               "chip_sw_lc_walkthrough_testunlocks"]
+      bazel: []
     }
     {
       name: chip_sw_lc_ctrl_volatile_raw_unlock
diff --git a/hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson
index 8debc4c16fde6..1761c5047d713 100644
--- a/hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_otp_ctrl_testplan.hjson
@@ -48,6 +48,7 @@
               "chip_sw_keymgr_key_derivation",
               "chip_sw_otbn_mem_scramble",
               "chip_sw_rv_core_ibex_icache_invalidate"]
+      bazel: ["//sw/device/silicon_creator/manuf/lib:individualize_functest"]
     }
     {
       name: chip_sw_otp_ctrl_entropy
@@ -68,6 +69,7 @@
               "chip_sw_keymgr_key_derivation",
               "chip_sw_otbn_mem_scramble",
               "chip_sw_rv_core_ibex_icache_invalidate"]
+      bazel: ["//sw/device/silicon_creator/manuf/base:ft_provision_sival"]
     }
     {
       name: chip_sw_otp_ctrl_program
@@ -90,6 +92,7 @@
       si_stage: SV1
       lc_states: ["PROD"]
       tests: ["chip_sw_lc_ctrl_transition"]
+      bazel: ["//sw/device/silicon_creator/manuf/lib:individualize_functest"]
     }
     {
       name: chip_sw_otp_ctrl_program_error
@@ -128,7 +131,7 @@
       si_stage: SV1
       tests: ["chip_sw_lc_ctrl_otp_hw_cfg0"]
       lc_states: ["PROD"]
-      bazel: ["//sw/device/tests:lc_ctrl_otp_hw_cfg_test"]
+      bazel: ["//sw/device/tests:lc_ctrl_otp_hw_cfg0_test"]
     }
     {
       name: chip_sw_otp_ctrl_lc_signals
@@ -180,6 +183,7 @@
       si_stage: SV3
       lc_states: ["TEST_UNLOCKED", "RMA"]
       tests: ["chip_prim_tl_access"]
+      bazel: []
     }
     {
       name: chip_sw_otp_ctrl_vendor_test_csr_access
@@ -232,6 +236,7 @@
       si_stage: SV1
       lc_states: ["TEST_UNLOCKED"]
       tests: []
+      bazel: []
     }
     {
       name: otp_ctrl_partition_access_locked
diff --git a/hw/top_earlgrey/data/ip/chip_pwm_testplan.hjson b/hw/top_earlgrey/data/ip/chip_pwm_testplan.hjson
new file mode 100644
index 0000000000000..69495bee54100
--- /dev/null
+++ b/hw/top_earlgrey/data/ip/chip_pwm_testplan.hjson
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  name: pwm
+  testpoints: [
+    {
+      name: chip_sw_pwm_smoketest
+      desc: '''Verify that the PWM outputs correct wave.
+
+              - Program the PWM to output waves of 24hz, 48, 98hz.
+              - Program the duty cycle to 11%, 36%, 50%, 71%, and 91%.
+              - The test harness should check that the frequency and duty cycle is correct within a tolerance of 2%.
+            '''
+      features:["PWM.DUTYCYCLE", "PWM.CLOCKDIVIDER"]
+      stage: V3
+      si_stage: SV3
+      lc_states: ["PROD"]
+      tests: []
+      bazel: ["//sw/device/tests:pwm_smoketest"]
+    }
+  ]
+}
diff --git a/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson b/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson
index b57cc12560dcc..d870b93ae1b24 100644
--- a/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_pwrmgr_testplan.hjson
@@ -79,10 +79,9 @@
             `wakeup_en` CSR, bring the chip to normal sleep, optionally disabling the source's
             clock, have the source issue a wakeup event and verify `wake_info` indicates the
             expected wakeup.
-            SiVal: No need to run this, run chip_sw_pwrmgr_random_sleep_all_wake_ups instead.
             '''
       stage: V2
-      si_stage: NA
+      si_stage: SV3
       tests: ["chip_sw_pwrmgr_normal_sleep_all_wake_ups"]
       bazel: ["//sw/device/tests:pwrmgr_normal_sleep_all_wake_ups"]
     }
@@ -135,10 +134,9 @@
             This verifies ALL wake up sources. This also verifies that the pwrmgr sequencing is
             working correctly as expected. X-ref'ed with all individual IP tests. Similar to
             chip_pwrmgr_sleep_all_wake_ups, except `control.main_pd_n` is set to 0.
-            SiVal: No need to run this, run chip_sw_pwrmgr_random_sleep_all_wake_ups instead.
             '''
       stage: V2
-      si_stage: NA
+      si_stage: SV3
       tests: ["chip_sw_pwrmgr_deep_sleep_all_wake_ups"]
       bazel: ["//sw/device/tests:pwrmgr_deep_sleep_all_wake_ups"]
     }
@@ -160,7 +158,7 @@
             No need to run this, run chip_sw_pwrmgr_random_sleep_all_reset_reqs instead.
             '''
       stage: V2
-      si_stage: NA
+      si_stage: SV3
       features: [
         "PWRMGR.LOW_POWER.ENTRY",
         "PWRMGR.LOW_POWER.DISABLE_POWER"
diff --git a/hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson
index 33948d8dd842d..4dee84b78b545 100644
--- a/hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_rom_ctrl_testplan.hjson
@@ -13,7 +13,13 @@
       features: ["ROM_CTRL.SCRAMBLED"]
       stage: V2
       si_stage: SV1
-      bazel:["//sw/device/silicon_creator/rom/e2e/jtag_inject:rom_e2e_openocd_debug_test"]
+      bazel: [
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_dev",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_prod",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_prod_end",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_rma",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_test_unlocked0"
+      ]
       lc_states: ["PROD"]
       tests: ["chip_sw_rom_ctrl_integrity_check"]
     }
@@ -77,6 +83,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: []
+      bazel: ["//sw/device/tests:kmac_app_rom_test"]
     }
   ]
 }
diff --git a/hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson b/hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson
index 5c4e335a650b3..2070556b20db2 100644
--- a/hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_rstmgr_testplan.hjson
@@ -70,7 +70,9 @@
         "RSTMGR.RESET_INFO.CLEAR",
       ]
       tests: ["chip_rv_dm_ndm_reset_req"]
-      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req"],
+      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req_test_unlocked1",
+              "//sw/device/tests:rv_dm_ndm_reset_req_dev",
+              "//sw/device/tests:rv_dm_ndm_reset_req_rma"],
     }
     {
       name: chip_sw_rstmgr_cpu_info
@@ -86,7 +88,7 @@
             This test already runs in CW310.
             '''
       stage: V2
-      si_stage: SV2
+      si_stage: SV1
       lc_states: ["PROD"]
       features: [
         "RSTMGR.CPU_INFO.CAPTURE",
@@ -133,7 +135,7 @@
             This can be an important diagnostic tool, so setting it to SV3.
             '''
       stage: V2
-      si_stage: SV3
+      si_stage: SV1
       lc_states: ["PROD"]
       features: [
         "RSTMGR.ALERT_INFO.CAPTURE",
diff --git a/hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson b/hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson
index ea938cdef102a..2ea76536fdc8d 100644
--- a/hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_rv_core_ibex_testplan.hjson
@@ -143,7 +143,8 @@
        stage: V2
        si_stage: SV1
        tests: []
-       bazel: ["//sw/device/tests:rv_core_ibex_isa_test"]
+       bazel: ["//sw/device/tests:rv_core_ibex_isa_test_prod",
+               "//sw/device/tests:rv_core_ibex_isa_test_test_unlocked0"]
        lc_states: ["PROD"]
        features: [
          "RV_CORE_IBEX.CPU.ISA"
@@ -209,7 +210,8 @@
          "RV_CORE_IBEX.CPU.ICACHE",
          "RV_CORE_IBEX.CPU.MEMORY"
        ]
-       bazel: ["//sw/device/tests:rv_core_ibex_mem_test"]
+       bazel: ["//sw/device/tests:rv_core_ibex_mem_test_prod",
+               "//sw/device/tests:rv_core_ibex_mem_test_test_unlocked0"]
     }
     {
      name: chip_sw_rv_core_ibex_lockstep_glitch
@@ -220,8 +222,9 @@
               - Inputs into the lockstep core are corrupted.
            '''
      stage: V2S
-     si_stage: None
+     si_stage: NA
      tests: ["chip_sw_rv_core_ibex_lockstep_glitch"]
+     bazel: []
     }
     {
       name: chip_sw_rv_core_ibex_alerts
diff --git a/hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson b/hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson
index 4e614922625ab..066ade4450bac 100644
--- a/hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_rv_dm_testplan.hjson
@@ -22,9 +22,12 @@
       stage: V2
       si_stage: SV3
       tests: ["chip_jtag_csr_rw"]
-      bazel: ["//sw/device/tests:rv_dm_csr_rw"],
+      bazel: ["//sw/device/tests:rv_dm_csr_rw_test_unlocked1",
+              "//sw/device/tests:rv_dm_csr_rw_dev_rv_dm_default_enabled",
+              "//sw/device/tests:rv_dm_csr_rw_dev_rv_dm_delayed_enabled",
+              "//sw/device/tests:rv_dm_csr_rw_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM"
@@ -53,9 +56,12 @@
       stage: V2
       si_stage: SV3
       tests: ["chip_jtag_mem_access"]
-      bazel: ["//sw/device/tests:rv_dm_mem_access"],
+      bazel: ["//sw/device/tests:rv_dm_mem_access_test_unlocked1",
+              "//sw/device/tests:rv_dm_mem_access_dev_rv_dm_default_enabled",
+              "//sw/device/tests:rv_dm_mem_access_dev_rv_dm_delayed_enabled",
+              "//sw/device/tests:rv_dm_mem_access_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
@@ -93,9 +99,15 @@
       si_stage: SV3
       tests: ["rom_e2e_jtag_debug_test_unlocked0", "rom_e2e_jtag_debug_dev",
               "rom_e2e_jtag_debug_rma"]
-      bazel: ["//sw/device/silicon_creator/rom/e2e/jtag_inject:rom_e2e_openocd_debug_test"],
+      bazel: [
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_dev",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_prod",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_prod_end",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_rma",
+        "//sw/device/silicon_creator/rom/e2e/jtag_inject:openocd_debug_test_otp_test_unlocked0"
+      ],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
@@ -117,9 +129,11 @@
       stage: V2
       si_stage: SV2
       tests: ["chip_rv_dm_ndm_reset_req"]
-      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req"],
+      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req_test_unlocked1",
+              "//sw/device/tests:rv_dm_ndm_reset_req_dev",
+              "//sw/device/tests:rv_dm_ndm_reset_req_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
@@ -149,9 +163,11 @@
       stage: V2
       si_stage: SV3
       tests: ["chip_sw_rv_dm_ndm_reset_req_when_cpu_halted"]
-      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted"],
+      bazel: ["//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_test_unlocked1",
+              "//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_dev",
+              "//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
@@ -170,9 +186,11 @@
       stage: V2
       si_stage: SV3
       tests: ["chip_sw_rv_dm_access_after_wakeup"]
-      bazel: ["//sw/device/tests:rv_dm_access_after_wakeup"],
+      bazel: ["//sw/device/tests:rv_dm_access_after_wakeup_test_unlocked1",
+              "//sw/device/tests:rv_dm_access_after_wakeup_dev",
+              "//sw/device/tests:rv_dm_access_after_wakeup_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM"
@@ -188,7 +206,9 @@
       stage: V3
       si_stage: SV3
       tests: ["chip_sw_rv_dm_access_after_escalation_reset"]
-      bazel: ["//sw/device/tests:rv_dm_access_after_hw_reset"],
+      bazel: ["//sw/device/tests:rv_dm_access_after_hw_reset_test_unlocked1",
+              "//sw/device/tests:rv_dm_access_after_hw_reset_dev",
+              "//sw/device/tests:rv_dm_access_after_hw_reset_rma"],
       lc_states: ["DEV"]
       features: [
         "RV_DM.JTAG.FSM",
@@ -207,9 +227,12 @@
       stage: V2
       si_stage: SV2
       tests: ["chip_tap_straps_rma"]
-      bazel: ["//sw/device/tests:rv_dm_jtag_tap_sel"],
+      bazel: ["//sw/device/tests:rv_dm_jtag_tap_sel_test_unlocked1",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_dev",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_prod",
+              "//sw/device/tests:rv_dm_jtag_tap_sel_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM"
@@ -250,12 +273,21 @@
       si_stage: SV2
       tests: ["chip_rv_dm_lc_disabled"],
       bazel: [
-        "//sw/device/tests:rv_dm_lc_disabled_tl",
-        "//sw/device/tests:rv_dm_lc_disabled_jtag",
+        "//sw/device/tests:rv_dm_lc_disabled_tl_test_unlocked1",
+        "//sw/device/tests:rv_dm_lc_disabled_tl_dev",
+        "//sw/device/tests:rv_dm_lc_disabled_tl_prod",
+        "//sw/device/tests:rv_dm_lc_disabled_tl_prod_end",
+        "//sw/device/tests:rv_dm_lc_disabled_tl_rma",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_test_unlocked1",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_test_locked0",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_dev",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_prod",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_prod_end",
+        "//sw/device/tests:rv_dm_lc_disabled_jtag_rma",
       ],
       lc_states: ["RAW", "TEST_LOCKED", "TEST_UNLOCKED", "DEV", "RMA", "PROD",
         "PROD_END", "SCRAP"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM"
@@ -273,9 +305,13 @@
       stage: V2
       si_stage: SV3
       tests: []
-      bazel: ["//sw/device/tests:rv_dm_jtag"],
+      bazel: [
+        "//sw/device/tests:rv_dm_jtag_test_unlocked1",
+        "//sw/device/tests:rv_dm_jtag_dev",
+        "//sw/device/tests:rv_dm_jtag_rma",
+      ],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
       ]
@@ -292,9 +328,11 @@
       stage: V2
       si_stage: SV3
       tests: []
-      bazel: ["//sw/device/tests:rv_dm_dtm"],
+      bazel: ["//sw/device/tests:rv_dm_dtm_test_unlocked1",
+              "//sw/device/tests:rv_dm_dtm_dev",
+              "//sw/device/tests:rv_dm_dtm_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
@@ -321,9 +359,11 @@
       stage: V2
       si_stage: SV3
       tests: []
-      bazel: ["//sw/device/tests:rv_dm_control_status"],
+      bazel: ["//sw/device/tests:rv_dm_control_status_test_unlocked1",
+              "//sw/device/tests:rv_dm_control_status_dev",
+              "//sw/device/tests:rv_dm_control_status_rma"],
       lc_states: ["DEV"]
-      host_support: "true"
+      host_support: true
       features: [
         "RV_DM.JTAG.FSM",
         "RV_DM.JTAG.DTM",
diff --git a/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson b/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson
index d96f186a674a3..eee1dbd5957ab 100644
--- a/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_spi_device_testplan.hjson
@@ -79,7 +79,8 @@
         "SPI_DEVICE.HW.LANES",
         "SPI_DEVICE.MODE.PASSTHROUGH.CMD_FILTER",
       ]
-      tests: ["//sw/device/tests:spi_passthru_test"]
+      tests: []
+      bazel: ["//sw/device/tests:spi_passthru_test"]
     }
     {
       name: chip_sw_spi_device_pass_through_collision
@@ -99,7 +100,7 @@
                 - Clears the busy bit to allow the upstream SPI host to proceed to the next command.
             '''
       stage: V2
-      si_stage: SV3
+      si_stage: NA
       lc_states: [ "PROD" ]
       features: [
         "SPI_DEVICE.MODE.PASSTHROUGH",
@@ -161,7 +162,7 @@
                which is why the "features" list is empty. It may be reclassifed in the future.
              '''
       stage: V3
-      si_stage: None
+      si_stage: SV3
       lc_states: [ "PROD" ]
       features: ["SPI_DEVICE.CFG",
                  "SPI_DEVICE.JEDEC_CC",
diff --git a/hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson b/hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson
index 602ad3cc64cba..0e944dbf0b9d0 100644
--- a/hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_spi_host_testplan.hjson
@@ -32,7 +32,7 @@
       tests: ["chip_sw_spi_host_tx_rx"]
       bazel: [
         "//sw/device/tests:spi_host_winbond_flash_test",
-        "//sw/device/tests/pmod:spi_host_macronix_flash_test"
+        "//sw/device/tests/pmod:spi_host_macronix1Gb_flash_test"
       ]
     }
     {
@@ -53,7 +53,8 @@
       stage: V3
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["//sw/device/tests:spi_passthru_test"]
+      tests: []
+      bazel: ["//sw/device/tests:spi_passthru_test"]
     }
     {
       name: chip_sw_spi_host_configuration
@@ -69,7 +70,8 @@
       stage: V3
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: ["//sw/device/tests:spi_host_config_test"]
+      tests: []
+      bazel: ["//sw/device/tests:spi_host_config_test"]
     }
     {
       name: chip_sw_spi_host_events
diff --git a/hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson b/hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson
index 1d86bc8bf1736..7af059ba9d7b1 100644
--- a/hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_sram_ctrl_testplan.hjson
@@ -127,7 +127,7 @@
       lc_states: ["RMA"]
       tests: ["chip_sw_all_escalation_resets",
               "chip_sw_data_integrity_escalation"]
-      bazel: ["//sw/device/tests:sram_ctrl_lc_escalation"]
+      bazel: ["//sw/device/tests:sram_ctrl_lc_escalation_test"]
     }
 
     {
diff --git a/hw/top_earlgrey/data/ip/chip_uart_testplan.hjson b/hw/top_earlgrey/data/ip/chip_uart_testplan.hjson
index 7dce9c7b4ee9b..483f5e6dd6ea3 100644
--- a/hw/top_earlgrey/data/ip/chip_uart_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_uart_testplan.hjson
@@ -93,7 +93,7 @@
       lc_states: ["PROD"]
       features: ["UART.PARITY"]
       tests: []
-      bazel: ["//sw/device/tests:uart_parity_test"]
+      bazel: ["//sw/device/tests:uart_parity_break_test"]
     }
     {
       name: chip_sw_uart_line_loopback
diff --git a/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson b/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson
index 04263cdb48b23..bf7be1695c191 100644
--- a/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson
+++ b/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson
@@ -107,10 +107,10 @@
         "USBDEV.CONN.REF_PULSE",
       ]
       stage: V2
-      si_stage: SV3
+      si_stage: NA
       lc_states: ["PROD"]
       tests: []
-      bazel: ["//sw/device/tests:usbdev_sof_test"]
+      bazel: []
     }
     {
       name: chip_sw_usbdev_setup_rx
@@ -221,7 +221,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_usbdev_dpi"]
-      bazel: []
+      bazel: ["//sw/device/tests:usbdev_test"]
     }
     {
       name: chip_sw_usbdev_stream
@@ -410,18 +410,22 @@
       desc: '''Verify that the USB device is able to save and restore arbitrary permutations
             of the Data Toggle flags on both the IN and OUT sides.
 
-            - With the USB device powered but not connected (pull up not enabled),
-              set the IN and OUT Data Toggle flags for all endpoints to known state.
+            - With the USB device powered and recently connected (pull up enabled),
+              wait until the link comes out of reset. Do NOT enable any endpoints because
+              USB traffic will interfere with testing of the Data Toggle bits.
+            - Set the IN and OUT Data Toggle flags for all endpoints to a known state.
             - Verify that the IN and OUT Data Toggle flags may be read back correctly.
+            - Check that each Data Toggle bit may be set and reset independently.
             - This functionality is required when Resuming from Deep Sleep.
             - Note that this test does not exercise any low power states or Suspend/Resume.
-            - NOTE: This test should be SV4 and requires prod-only RTL changes.
+            - Note: This test requires the RTL changes for the production part; it will not
+              pass on ES.
             '''
       features: ["USBDEV.POWER.TOGGLE_RESTORE"]
-      stage: V3
+      stage: V2
       si_stage: SV3
       lc_states: ["PROD"]
-      tests: []
+      tests: ["chip_sw_usbdev_toggle_restore"]
       bazel: ["//sw/device/tests:usbdev_toggle_restore_test"]
     }
   ]
diff --git a/hw/top_earlgrey/data/standalone_sw_testplan.hjson b/hw/top_earlgrey/data/standalone_sw_testplan.hjson
deleted file mode 100644
index ddc95ecbffe41..0000000000000
--- a/hw/top_earlgrey/data/standalone_sw_testplan.hjson
+++ /dev/null
@@ -1,35 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-{
-  name: "self-contained-tests"
-
-  testpoints: [
-    {
-      name: flash_ctrl
-      desc: '''This test checks for correct sanity behavior of the flash.
-            It ensures the flash controller is able to program, read, and page erase fixed locations in multiple flash banks.
-            It also performs a sanity region protection check to make sure a protected page cannot be modified.
-            When the test passes, it will output "PASS!".'''
-      stage: V1
-      tests: ["flash_test"]
-    }
-    {
-      name: hmac
-      desc: '''This test checks for basic functionality of the sha256 engine inside HMAC.
-            It computes the hash of a known input and compares it against the known digest.
-            When the test passes, it will output "PASS!".'''
-      stage: V1
-      tests: ["sha256_test"]
-    }
-    {
-      name: rv_timer
-      desc: '''This test checks for basic timer and interrupt functionality.
-            The test rests in a loop and does not break out until the interrupt handling routine sets a specific value.
-            If the interrupt handling is incorrect, the test will never complete.
-            When the test passes, it will output "PASS!".'''
-      stage: V1
-      tests: ["rv_timer_test"]
-    }
-  ]
-}
diff --git a/hw/top_earlgrey/data/top_earlgrey.hjson b/hw/top_earlgrey/data/top_earlgrey.hjson
index 114208178c3ce..b2e8c38bb38a8 100644
--- a/hw/top_earlgrey/data/top_earlgrey.hjson
+++ b/hw/top_earlgrey/data/top_earlgrey.hjson
@@ -727,6 +727,7 @@
       reset_connections: {rst_ni: "lc", rst_otp_ni: "lc_io_div4"},
       param_decl: {
         InstrExec: "1",
+        NumPrinceRoundsHalf: "2",
       },
       base_addrs: {regs: "0x411C0000", ram: "0x10000000"},
       // Memory regions must be associated with a dedicated
diff --git a/hw/top_earlgrey/defs.bzl b/hw/top_earlgrey/defs.bzl
new file mode 100644
index 0000000000000..abdfe6a0bc175
--- /dev/null
+++ b/hw/top_earlgrey/defs.bzl
@@ -0,0 +1,24 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+EARLGREY_SLOTS_NORMAL = {
+    "rom_ext_slot_a": "0x0",
+    "rom_ext_slot_b": "0x80000",
+    "owner_slot_a": "0x10000",
+    "owner_slot_b": "0x90000",
+    "rom_ext_size": "0x10000",
+}
+
+EARLGREY_SLOTS_COVERAGE = {
+    "rom_ext_slot_a": "0x0",
+    "rom_ext_slot_b": "0x80000",
+    "owner_slot_a": "0x20000",
+    "owner_slot_b": "0xa0000",
+    "rom_ext_size": "0x20000",
+}
+
+EARLGREY_SLOTS = select({
+    "@lowrisc_opentitan//rules/coverage:enabled": EARLGREY_SLOTS_COVERAGE,
+    "//conditions:default": EARLGREY_SLOTS_NORMAL,
+})
diff --git a/hw/top_earlgrey/dv/chip_manuf_ate_tests.hjson b/hw/top_earlgrey/dv/chip_manuf_ate_tests.hjson
new file mode 100644
index 0000000000000..24670e156b9f4
--- /dev/null
+++ b/hw/top_earlgrey/dv/chip_manuf_ate_tests.hjson
@@ -0,0 +1,88 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  # This auxiliary chip sim cfg specification focuses on chip level manufacturing tests.
+  # Please see chip_sim_cfg.hjson for full setup details.
+
+  # Note: Please maintain alphabetical order.
+  tests: [
+    {
+      name: ate_bootstrap_flash_erase
+      uvm_test_seq: chip_sw_ate_bootstrap_flash_erase_vseq
+      # We do not need to load any flash images as this test is entirely host driven.
+      sw_images: []
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=160_000_000"
+        "+skip_flash_bkdr_load=1",
+        "+use_spi_load_bootstrap=1",
+      ]
+      run_timeout_mins: 180
+    }
+    {
+      name: ate_bootstrap_one_frame
+      uvm_test_seq: chip_sw_ate_bootstrap_one_frame_vseq
+      sw_images: ["//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_prod:1:new_rules"]
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=160_000_000"
+        "+skip_flash_bkdr_load=1",
+        "+use_spi_load_bootstrap=1",
+      ]
+      run_timeout_mins: 180
+    }
+    {
+      name: ate_bootstrap_disjoint
+      uvm_test_seq: chip_sw_ate_bootstrap_disjoint_vseq
+      sw_images: ["//sw/device/silicon_creator/manuf/tests:multislot_empty_test:1:new_rules"]
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=1_000_000_000"
+        "+skip_flash_bkdr_load=1",
+        "+use_spi_load_bootstrap=1",
+      ]
+      run_timeout_mins: 800
+    }
+    {
+      name: rom_e2e_bootstrap_ate_smoke
+      uvm_test_seq: chip_sw_rom_e2e_ate_smoke_vseq
+      sw_images: [
+        "//sw/device/silicon_creator/rom/e2e/ate/binaries:ate_gpio_toggle_test:1:silicon_creator:signed",
+        "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized:4"
+      ]
+      en_run_modes: ["sw_test_mode_mask_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=1000000000",
+        "+use_otp_image=OtpTypeCustom",
+        "+skip_flash_bkdr_load=1",
+      ]
+      run_timeout_mins: 800
+    }
+    {
+      name: rom_e2e_ft_personalize_sival
+      uvm_test_seq: chip_sw_rom_e2e_ft_perso_vseq
+      sw_images: [
+        "//sw/device/silicon_creator/manuf/base/binaries:ft_personalize_sival:1:silicon_creator:signed",
+        "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_individualized:4"
+      ]
+      en_run_modes: ["sw_test_mode_mask_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=1000000000",
+        "+use_otp_image=OtpTypeCustom",
+        "+skip_flash_bkdr_load=1",
+      ]
+      run_timeout_mins: 800
+    }
+  ]
+
+  regressions: [
+    {
+      name: ate_tests
+      tests: [
+        "rom_e2e_bootstrap_ate_smoke",
+        "rom_e2e_ft_personalize_sival",
+      ]
+    }
+  ]
+}
diff --git a/hw/top_earlgrey/dv/chip_rom_tests.hjson b/hw/top_earlgrey/dv/chip_rom_tests.hjson
index c20fb611131d1..b234741137190 100644
--- a/hw/top_earlgrey/dv/chip_rom_tests.hjson
+++ b/hw/top_earlgrey/dv/chip_rom_tests.hjson
@@ -803,7 +803,7 @@
     // macro into the netlist.
     // {
     //   name: rom_e2e_self_hash_no_bkdr_rom_load
-    //   uvm_test_seq: chip_sw_base_vseq
+    //   uvm_test_seq: chip_sw_rom_e2e_self_hash_gls_vseq
     //   sw_images: [
     //     "//sw/device/silicon_creator/rom/e2e/release:rom_e2e_self_hash_test:1:new_rules:silicon_creator",
     //     "//sw/device/silicon_creator/rom/e2e/release:otp_img_sigverify_spx_prod:4",
@@ -815,6 +815,7 @@
     //   en_run_modes: ["sw_test_mode_common"]
     //   run_opts: [
     //     "+skip_rom_bkdr_load=1",
+    //     "+uart_baud_rate=115200",
     //     "+sw_test_timeout_ns=200_000_000",
     //     "+use_otp_image=OtpTypeCustom",
     //   ]
diff --git a/hw/top_earlgrey/dv/chip_sim_cfg.hjson b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
index e29568b01768a..86f1e1cbf918d 100644
--- a/hw/top_earlgrey/dv/chip_sim_cfg.hjson
+++ b/hw/top_earlgrey/dv/chip_sim_cfg.hjson
@@ -55,6 +55,7 @@
                 "{proj_root}/hw/ip/otbn/dv/memutil/otbn_memutil_sim_opts.hjson",
                 "{proj_root}/hw/ip/otbn/dv/tracer/otbn_tracer_sim_opts.hjson",
                 "{top_dv_path}/chip_smoketests.hjson",
+                "{top_dv_path}/chip_manuf_ate_tests.hjson",
                 "{top_dv_path}/chip_rom_tests.hjson",
                 // Enable C compilation of chip level dpi
                 "{proj_root}/hw/dv/dpi/dpi_sim_cfg.hjson",
@@ -323,22 +324,43 @@
       run_opts: ["+accelerate_cold_power_up_time=3",
                  "+accelerate_regulators_power_up_time=2"]
     }
+    {
+      // Format SW image names into output file names separated by commas to feed into
+      // +sw_images plusarg. Image names are just Bazel labels concatenated with an index
+      // and/or flags.
+      // The input is a space-seperated list in the variable 'sw_images'.
+      // The result is saved to the same variable 'sw_images'.
+      //
+      // For example, for an input of:
+      // [
+      //   "//sw/device/tests:uart_tx_rx_test:1",
+      //   "//sw/device/lib/testing/test_rom:test_rom:0"
+      // ]
+      //
+      // ..then the result will be:
+      //
+      //   "uart_tx_rx_test:1,test_rom:0".
+      //
+      name: format_sw_images
+      run_opts: [
+        "+sw_build_device={sw_build_device}",
+        '''
+          +sw_images={eval_cmd} \
+            reformatted_sw_images=; \
+            for image in {sw_images}; do \
+              reformatted_sw_images="$reformatted_sw_images `echo $image | cut -d: -f2-`"; \
+            done; \
+            echo $reformatted_sw_images | sed -E 's/\s+/,/g'
+        '''
+      ]
+    }
+    {
+      name: sw_test_mode_base
+      en_run_modes: ["format_sw_images"]
+    }
     {
       name: sw_test_mode_common
-      run_opts: ["+sw_build_device={sw_build_device}",
-                 // Format SW image names (which are Bazel labels concatenated with an index
-                 // and/or flags, see below) into output file names separated by commas to feed into
-                 // +sw_images plusarg. For example, if the input list of SW images is
-                 // ["//sw/device/tests:uart_tx_rx_test:1",
-                 //  "//sw/device/lib/testing/test_rom:test_rom:0"], then the output of this eval_cmd
-                 // will be: "uart_tx_rx_test:1,test_rom:0".
-                 '''+sw_images={eval_cmd} \
-                 reformatted_sw_images=; \
-                 for image in {sw_images}; do \
-                   reformatted_sw_images="$reformatted_sw_images `echo $image | cut -d: -f2-`"; \
-                 done; \
-                 echo $reformatted_sw_images | sed -E 's/\s+/,/g' ''']
-      en_run_modes: ["gen_otp_images_mode"]
+      en_run_modes: ["sw_test_mode_base", "gen_otp_images_mode"]
     }
     {
       name: sw_test_mode_test_rom
@@ -495,7 +517,7 @@
     {
       name: chip_sw_sleep_pin_wake
       uvm_test_seq: chip_sw_sleep_pin_wake_vseq
-      sw_images: ["//sw/device/tests/sim_dv:sleep_pin_wake_test:1:new_rules"]
+      sw_images: ["//sw/device/tests:sleep_pin_wake_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
       // Starting the chip in prod LC state frees up all MIOs for this test.
       run_opts: ["+use_otp_image=OtpTypeLcStProd"]
@@ -515,7 +537,7 @@
     {
       name: chip_sw_pattgen_ios
       uvm_test_seq: chip_sw_patt_ios_vseq
-      sw_images: ["//sw/device/tests/sim_dv:pattgen_ios_test:1:new_rules"]
+      sw_images: ["//sw/device/tests:pattgen_ios_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
       run_opts: ["+sw_test_timeout_ns=5_000_000"]
     }
@@ -627,6 +649,14 @@
       run_timeout_mins: 120
       reseed: 1
     }
+    {
+      name: chip_sw_usbdev_toggle_restore
+      uvm_test_seq: chip_sw_usbdev_dpi_vseq
+      sw_images: ["//sw/device/tests:usbdev_toggle_restore_test:1:new_rules"]
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: ["+uart_idx=0", "+calibrate_usb_clk=1"]
+      reseed: 1
+    }
     {
       name: chip_sw_inject_scramble_seed
       uvm_test_seq: chip_sw_inject_scramble_seed_vseq
@@ -866,12 +896,40 @@
       run_timeout_mins: 120
       reseed: 1
     }
+    {
+      name: chip_sw_otp_ctrl_rot_auth_config
+      uvm_test_seq: chip_sw_rom_e2e_jtag_inject_vseq
+      sw_images: [
+        "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty:4",
+        "//sw/device/tests:otp_ctrl_rot_auth_config_test:5",
+      ]
+      en_run_modes: ["sw_test_mode_mask_rom"]
+      run_opts: [
+        "+sw_test_timeout_ns=160_000_000",
+        "+use_jtag_dmi=1",
+        "+use_otp_image=OtpTypeCustom",
+      ]
+      reseed: 1
+      run_timeout_mins: 240
+    }
     {
       name: chip_sw_otp_ctrl_ecc_error_vendor_test
       uvm_test_seq: chip_sw_otp_ctrl_vendor_test_ecc_error_vseq
       sw_images: ["//sw/device/tests/sim_dv:otp_ctrl_vendor_test_ecc_error_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }
+    {
+      name: chip_sw_otp_ctrl_descrambling
+      uvm_test_seq: chip_sw_base_vseq
+      sw_images: [
+        "//sw/device/tests:otp_ctrl_descrambling_test:1:new_rules",
+        "//sw/device/tests:otp_ctrl_descrambling_otp_image:4",
+      ]
+      en_run_modes: ["sw_test_mode_test_rom"]
+      run_opts: [
+        "+use_otp_image=OtpTypeCustom",
+      ]
+    }
     {
       // Set higher reseed value to reach all kmac_data to lc_ctrl toggle coverage.
       name: chip_sw_lc_ctrl_transition
@@ -1288,7 +1346,7 @@
     {
       name: chip_sw_alert_handler_escalation
       uvm_test_seq: chip_sw_alert_handler_escalation_vseq
-      sw_images: ["//sw/device/tests/sim_dv:alert_handler_escalation_test:1:new_rules"]
+      sw_images: ["//sw/device/tests:alert_handler_escalation_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
       // Disable scoreboard to avoid incorrect alert prediction from the alert_monitor. Due to the
       // cross-domain alert senders and receivers, the monitor from the chip level did not support
@@ -1582,7 +1640,8 @@
     {
       name: chip_sw_kmac_app_rom
       uvm_test_seq: chip_sw_base_vseq
-      sw_images: ["//sw/device/tests:kmac_app_rom_test:1:new_rules"]
+      // The `sim_dv` prefix is necessary due to how the targets are created, see BUILD file.
+      sw_images: ["//sw/device/tests:kmac_app_rom_test_sim_dv:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
@@ -2102,13 +2161,13 @@
     {
       name: chip_sw_power_idle_load
       uvm_test_seq: chip_sw_power_idle_load_vseq
-      sw_images: ["//sw/device/tests:chip_power_idle_load:1:new_rules"]
+      sw_images: ["//sw/device/tests:chip_power_idle_load_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
       name: chip_sw_power_sleep_load
       uvm_test_seq: chip_sw_power_sleep_load_vseq
-      sw_images: ["//sw/device/tests:chip_power_sleep_load:1:new_rules"]
+      sw_images: ["//sw/device/tests:chip_power_sleep_load_test:1:new_rules"]
       en_run_modes: ["sw_test_mode_test_rom"]
     }
     {
@@ -2209,7 +2268,9 @@
     }
     {
       name: xcelium_ci_0
-      tests: ["chip_plic_all_irqs",
+      tests: ["chip_plic_all_irqs_0",
+              "chip_plic_all_irqs_10",
+              "chip_plic_all_irqs_20",
               "chip_sw_kmac_app_rom",
               "chip_sw_rstmgr_sw_rst",
               "chip_sw_hmac_enc",
diff --git a/hw/top_earlgrey/dv/env/chip_env.core b/hw/top_earlgrey/dv/env/chip_env.core
index 03762ed3282e0..0a449cf2a5b45 100644
--- a/hw/top_earlgrey/dv/env/chip_env.core
+++ b/hw/top_earlgrey/dv/env/chip_env.core
@@ -24,6 +24,7 @@ filesets:
       - lowrisc:dv:ralgen
       - lowrisc:dv:spi_agent
       - lowrisc:dv:spi_host_sva
+      - lowrisc:dv:ottf_spi_console
       - lowrisc:dv:str_utils
       - lowrisc:dv:sw_test_status
       - lowrisc:dv:sw_logger_if
@@ -139,13 +140,19 @@ filesets:
       - seq_lib/chip_sw_aes_masking_off_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_flash_host_gnt_err_inj_vseq.sv: {is_include_file: true}
       - seq_lib/chip_padctrl_attributes_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_ate_bootstrap_disjoint_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_ate_bootstrap_flash_erase_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_ate_bootstrap_one_frame_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_base_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_rom_e2e_ate_smoke_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_rom_e2e_ft_perso_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_shutdown_exception_c_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_shutdown_output_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_sigverify_always_a_bad_b_bad_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_asm_init_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_jtag_debug_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_rom_e2e_jtag_inject_vseq.sv: {is_include_file: true}
+      - seq_lib/chip_sw_rom_e2e_self_hash_gls_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_power_idle_load_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_power_sleep_load_vseq.sv: {is_include_file: true}
       - seq_lib/chip_sw_power_virus_vseq.sv: {is_include_file: true}
diff --git a/hw/top_earlgrey/dv/env/chip_env.sv b/hw/top_earlgrey/dv/env/chip_env.sv
index 1b40c4b6a0450..8b4a4b29f636a 100644
--- a/hw/top_earlgrey/dv/env/chip_env.sv
+++ b/hw/top_earlgrey/dv/env/chip_env.sv
@@ -134,6 +134,12 @@ class chip_env extends cip_base_env #(
     foreach (LIST_OF_ALERTS[i]) begin
       cfg.m_alert_agent_cfgs[LIST_OF_ALERTS[i]].is_active = 0;
     end
+
+    // Initialize the spi_console object.
+    cfg.ottf_spi_console_h = ottf_spi_console::type_id::create("m_ottf_spi_console", this);
+    // Connect the spi_console object to the VIFs.
+    cfg.ottf_spi_console_h.clk_rst_vif = cfg.clk_rst_vif;
+    cfg.ottf_spi_console_h.flow_ctrl_vif = cfg.chip_vif.spi_host_console_flow_ctrl_if;
   endfunction
 
   function void connect_phase(uvm_phase phase);
diff --git a/hw/top_earlgrey/dv/env/chip_env_cfg.sv b/hw/top_earlgrey/dv/env/chip_env_cfg.sv
index 1556e7ac44812..b05c4bf260ab0 100644
--- a/hw/top_earlgrey/dv/env/chip_env_cfg.sv
+++ b/hw/top_earlgrey/dv/env/chip_env_cfg.sv
@@ -20,6 +20,10 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
   // skip ROM backdoor loading (when using ROM macro block)
   bit                 skip_rom_bkdr_load = 0;
 
+  // skip flash backdoor loading (when using mask ROM with SPI bootstrap, e.g.,
+  // for ATE sims)
+  bit                 skip_flash_bkdr_load = 0;
+
   // chip top interfaces
   virtual chip_if       chip_vif;
 
@@ -110,6 +114,9 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
   // The JTAG RV debugger model.
   jtag_rv_debugger debugger;
 
+  // Instantiate an object to handle OTTF SPI Console interaction.
+  ottf_spi_console ottf_spi_console_h;
+
   // Run small page rma
   bit   en_small_rma = 0;
 
@@ -431,19 +438,19 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
             sw_images[i] = $sformatf("%0s_%0s", sw_images[i], sw_build_device);
           end
         end else if (i inside {SwTypeTestSlotA, SwTypeTestSlotB}) begin
+          // If the tag `silicon_creator` is inside the list of flags, we want
+          // to use a flash image built for the `silicon_creator` device. This
+          // is used for GLS tests that integrate the ROM macro, which is built
+          // for the `silicon_creator` device, not the `sim_dv` device.
+          if ("silicon_creator" inside {sw_image_flags[i]}) begin
+            sw_images[i] = $sformatf("%0s_silicon_creator", sw_images[i]);
           // If test type is `opentitan_test` and the flash image was generated
           // by the `opentitan_test` Bazel macro itself, or it was generated
           // by the `opentitan_flash_binary` or `opentitan_binary` Bazel macros,
           // then we only need to append the device suffix.
-          if ("ot_flash_binary" inside {sw_image_flags[i]} ||
+          end else if ("ot_flash_binary" inside {sw_image_flags[i]} ||
               "new_rules" inside {sw_image_flags[i]}) begin
             sw_images[i] = $sformatf("%0s_%0s", sw_images[i], sw_build_device);
-          // If the tag `silicon_creator` is inside the list of flags, we want
-          // to use a flash image built for the `silicon_creator` device. This
-          // is used for GLS tests that integrate the ROM macro, which is built
-          // for the `silicon_creator` device, not the `sim_dv` device.
-          end else if ("silicon_creator" inside {sw_image_flags[i]}) begin
-            sw_images[i] = $sformatf("%0s_silicon_creator", sw_images[i]);
           // If test type is `opentitan_functest` (the legacy OpenTitan Bazel
           // test macro), and said macro generated the flash image, then we
           // need to tweak the name, as the flash binary target has the `_prog`
@@ -455,7 +462,7 @@ class chip_env_cfg #(type RAL_T = chip_ral_pkg::chip_reg_block) extends cip_base
           // A flash image could be signed, and if it is, Bazel will attach a
           // suffix to the image name.
           if ("signed" inside {sw_image_flags[i]}) begin
-            // Options match DEFAULT_SIGNING_KEYS in `rules/opentitan.bzl`.
+            // Options match DEFAULT_SIGNING_KEYS in `rules/opentitan/keyutils.bzl`.
             if ("fake_ecdsa_dev_key_0" inside {sw_image_flags[i]}) begin
               sw_images[i] = $sformatf("%0s.fake_ecdsa_dev_key_0.signed", sw_images[i]);
             end else if ("fake_ecdsa_prod_key_0" inside {sw_image_flags[i]}) begin
diff --git a/hw/top_earlgrey/dv/env/chip_env_pkg.sv b/hw/top_earlgrey/dv/env/chip_env_pkg.sv
index d35be39fa7278..5aaa97109ce0a 100644
--- a/hw/top_earlgrey/dv/env/chip_env_pkg.sv
+++ b/hw/top_earlgrey/dv/env/chip_env_pkg.sv
@@ -51,6 +51,7 @@ package chip_env_pkg;
   import rv_core_ibex_reg_pkg::RV_CORE_IBEX_DV_SIM_WINDOW_OFFSET;
   import i2c_agent_pkg::*;
   import pattgen_agent_pkg::*;
+  import ottf_spi_console_pkg::*;
 
   // macro includes
   `include "uvm_macros.svh"
@@ -167,6 +168,11 @@ package chip_env_pkg;
     SpiFlashEx4B         = 8'hE9
   } spi_flash_cmd_e;
 
+  typedef enum int {
+    ottf_spi_console_flow_ctrl_mio_idx_rx_ready = top_earlgrey_pkg::MioPadIoa6,
+    ottf_spi_console_flow_ctrl_mio_idx_tx_ready = top_earlgrey_pkg::MioPadIoa5
+  } ottf_spi_console_flow_ctrl_mio_idx_e;
+
   // package sources
   `include "chip_env_cfg.sv"
   `include "chip_env_cov.sv"
diff --git a/hw/top_earlgrey/dv/env/chip_if.sv b/hw/top_earlgrey/dv/env/chip_if.sv
index 0015dd616526a..08bcbccf58c7a 100644
--- a/hw/top_earlgrey/dv/env/chip_if.sv
+++ b/hw/top_earlgrey/dv/env/chip_if.sv
@@ -225,6 +225,12 @@ interface chip_if;
     end while (1);
   end
 
+  // Bind the sideband signals used to flow-control the OTTF spi_console into a interface.
+  pins_if#(.Width(2), .PullStrength("Weak")) spi_host_console_flow_ctrl_if (
+    .pins({mios[ottf_spi_console_flow_ctrl_mio_idx_rx_ready],
+           mios[ottf_spi_console_flow_ctrl_mio_idx_tx_ready]})
+  );
+
   // Functional (dedicated) interface: SPI device 0 interface (receives traffic from the chip).
   // TODO: Update spi_if to emit all signals as inout ports and internal drivers on all ports.
   bit [NUM_SPI_HOSTS-1:0] __enable_spi_device;
@@ -664,7 +670,7 @@ interface chip_if;
   clk_rst_if io_div4_clk_rst_if(.clk(io_div4_clk), .rst_n(io_div4_rst_n));
 
 `ifdef GATE_LEVEL
-  wire lc_ready = `LC_CTRL_HIER.u_lc_ctrl_fsm.idle_o;
+  wire lc_ready = !`LC_CTRL_HIER.u_lc_ctrl_fsm.idle_o_BAR;
 `else
   wire lc_ready = `LC_CTRL_HIER.u_reg.u_status_ready.qs;
 `endif
@@ -681,8 +687,8 @@ interface chip_if;
   wire rv_core_ibex_icache_otp_key_req = 0;
   wire rv_core_ibex_icache_otp_key_ack = 0;
 
-  wire sram_main_init_done = 0;
-  wire sram_ret_init_done = 0;
+  wire sram_main_init_done = `SRAM_CTRL_MAIN_HIER.u_reg_regs.u_status_init_done.qs[0:0];
+  wire sram_ret_init_done = `SRAM_CTRL_RET_HIER.u_reg_regs.u_status_init_done.qs[0:0];
 
   wire flash_core1_host_req = 0;
 `else
@@ -791,13 +797,82 @@ interface chip_if;
   wire [31:0] pmp_addr[16];
   // TODO: merge with probed_cpu_csrs_t below.
 `ifdef GATE_LEVEL
-  assign pmp_mseccfg = 0;
-  for(genvar i = 0; i < 16; i++) begin : gen_ibex_pmp_cfg_conn
-    assign pmp_cfg[i] = 0;
-    assign pmp_addr[i] = 0;
-  end : gen_ibex_pmp_cfg_conn
+  assign pmp_mseccfg =  {
+                          `IBEX_CSRS_HIER.g_pmp_registers_u_pmp_mseccfg.rd_data_o[2]
+                          , 1'b1
+                          ,`IBEX_CSRS_HIER.g_pmp_registers_u_pmp_mseccfg.rd_data_o[0]
+                        };
+
+  // pmp_cfg
+  assign pmp_cfg[0] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_0__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[1] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_1__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[2] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_2__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[3] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_3__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[4] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_4__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[5] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_5__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[6] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_6__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[7] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_7__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[8] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_8__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[9] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_9__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[10] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_10__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[11] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_11__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[12] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_12__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[13] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_13__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[14] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_14__u_pmp_cfg_csr.rd_data_o[5:0];
+  assign pmp_cfg[15] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_15__u_pmp_cfg_csr.rd_data_o[5:0];
+
+  // pmp_addr
+  assign pmp_addr[0] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_0__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[1] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_1__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[2] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_2__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[3] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_3__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[4] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_4__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[5] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_5__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[6] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_6__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[7] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_7__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[8] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_9__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[9] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_9__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[10] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_10__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[11] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_11__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[12] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_12__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[13] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_13__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[14] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_14__u_pmp_addr_csr.rd_data_o[31:0];
+  assign pmp_addr[15] =
+    `IBEX_CSRS_HIER.g_pmp_registers_g_pmp_csrs_15__u_pmp_addr_csr.rd_data_o[31:0];
+
+  wire mstatus_mie = `IBEX_CSRS_HIER.u_mstatus_csr.rd_data_o[5];
 
-  wire mstatus_mie = 0;
 `else
   assign pmp_mseccfg = `IBEX_CSRS_HIER.g_pmp_registers.pmp_mseccfg_q;
   for(genvar i = 0; i < 16; i++) begin : gen_ibex_pmp_cfg_conn
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_disjoint_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_disjoint_vseq.sv
new file mode 100644
index 0000000000000..64cc497cbee8d
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_disjoint_vseq.sv
@@ -0,0 +1,124 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This test performs a the first two steps of a ROM bootstrap operation, i.e.,
+// flash erase followed by a single page program operation. It them confirms
+// flash has been programmed by backdoor reading back the first data page.
+
+class chip_sw_ate_bootstrap_disjoint_vseq extends chip_sw_base_vseq;
+  `uvm_object_utils(chip_sw_ate_bootstrap_disjoint_vseq)
+  `uvm_object_new
+
+  local function automatic void _check_flash_data_page(input integer address,
+                                                       input integer expected);
+    logic [TL_DW-1:0] actual;
+    actual = cfg.mem_bkdr_util_h[FlashBank0Data].read32(address);
+    `DV_CHECK_EQ(actual, expected)
+  endfunction
+
+  virtual task body();
+    spi_host_flash_seq m_spi_host_seq;
+    bit skip_page = 0;
+    byte sw_byte_q[$];
+    uint bytes_to_write;
+    uint byte_cnt = 0;
+    uint page_cnt = 0;
+    uint SPI_FLASH_PAGE_SIZE = 256;
+
+    super.body();
+
+    // Drive SW straps for bootstrap.
+    `uvm_info(`gfn, "Driving SW straps high for bootstrap.", UVM_LOW)
+    cfg.chip_vif.sw_straps_if.drive(3'h7);
+
+    // Set CSB inactive times to reasonable values. sys_clk is at 24 MHz, and
+    // it needs to capture CSB pulses.
+    cfg.m_spi_host_agent_cfg.min_idle_ns_after_csb_drop = 50;
+    cfg.m_spi_host_agent_cfg.max_idle_ns_after_csb_drop = 200;
+
+    // Configure the spi_agent for flash mode and add command info.
+    `uvm_info(`gfn, "Configuring SPI flash commands.", UVM_LOW)
+    spi_agent_configure_flash_cmds(cfg.m_spi_host_agent_cfg);
+
+    // Wait for the SPI flash commands to be configured by the (test) ROM.
+    `uvm_info(`gfn, "Waiting for SPI flash cmds on device to load ...", UVM_LOW)
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadSfdp].opcode),
+      .exp_data(SpiFlashReadSfdp),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadStatus1].opcode),
+      .exp_data(SpiFlashReadSts1),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info_wren.opcode),
+      .exp_data(SpiFlashWriteEnable),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+
+    `uvm_info(`gfn, "Reading SW image frames ...", UVM_LOW)
+    `uvm_info(`gfn, $sformatf("SW Image : %0s\n",
+      {cfg.sw_images[SwTypeTestSlotA], ".64.vmem"}), UVM_LOW);
+    read_sw_frames({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"}, sw_byte_q);
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Send the SPI flash erase command.
+    `uvm_info(`gfn, "Sending SPI flash erase command ...", UVM_LOW)
+    `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
+    m_spi_host_seq.opcode = SpiFlashChipErase;
+    spi_host_flash_issue_write_cmd(
+      .write_command(m_spi_host_seq),
+      .busy_timeout_ns(50_000_000),
+      .busy_poll_interval_ns(2_000_000));
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Send the SPI flash page program commands.
+    `uvm_info(`gfn, "Sending SPI flash page program commands ...", UVM_LOW)
+    while (sw_byte_q.size > byte_cnt) begin
+      `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
+      m_spi_host_seq.opcode = SpiFlashPageProgram;
+      m_spi_host_seq.address_q = {byte_cnt[23:16], byte_cnt[15:8], byte_cnt[7:0]};
+      if (SPI_FLASH_PAGE_SIZE < (sw_byte_q.size() - byte_cnt)) begin
+        bytes_to_write = SPI_FLASH_PAGE_SIZE;
+      end else begin
+        bytes_to_write = sw_byte_q.size() - byte_cnt;
+      end
+      // Skip page programs for pages that are all 0xFF (i.e., empty).
+      skip_page = 1;
+      for (int i = 0; i < bytes_to_write; i++) begin
+        skip_page &= sw_byte_q[byte_cnt + 1] == 8'hFF;
+      end
+      if (!skip_page) begin
+        for (int i = 0; i < bytes_to_write; i++) begin
+          m_spi_host_seq.payload_q.push_back(sw_byte_q[byte_cnt + i]);
+        end
+        spi_host_flash_issue_write_cmd(m_spi_host_seq);
+        `uvm_info(`gfn, $sformatf("Writing page %d ...\n", page_cnt), UVM_LOW);
+      end
+      byte_cnt += bytes_to_write;
+      page_cnt += 1;
+    end
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Read back the programmed flash data page to confirm it has been
+    // programmed correctly.
+    `uvm_info(`gfn, "Checking page program succeeded ...\n", UVM_LOW);
+    for (int a = 0; a < (sw_byte_q.size - 4); a += 4) begin
+      logic [TL_DW-1:0] expected_word = {sw_byte_q[a + 3], sw_byte_q[a + 2],
+                                         sw_byte_q[a + 1], sw_byte_q[a + 0]};
+      `uvm_info(`gfn, $sformatf("  Checking SW image word at address %08x: %08x ...\n",
+        a, expected_word), UVM_LOW);
+      _check_flash_data_page(a, expected_word);
+    end
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Set test passed.
+    cfg.chip_vif.sw_straps_if.drive(3'h0);
+    assert_por_reset();
+    override_test_status_and_finish(.passed(1'b1));
+  endtask
+
+endclass : chip_sw_ate_bootstrap_disjoint_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_flash_erase_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_flash_erase_vseq.sv
new file mode 100644
index 0000000000000..4bfcdeef5aa39
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_flash_erase_vseq.sv
@@ -0,0 +1,76 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This test performs a the first step of a ROM bootstrap operation, i.e.,
+// flash erase. It them confirms flash has been erased by reading back a few
+// SPI flash frames to check they are all 1s (which matches the erased state).
+
+class chip_sw_ate_bootstrap_flash_erase_vseq extends chip_sw_base_vseq;
+  `uvm_object_utils(chip_sw_ate_bootstrap_flash_erase_vseq)
+  `uvm_object_new
+
+  local function automatic void _check_flash_data_page(input integer address,
+                                                       input integer expected);
+    logic [TL_DW-1:0] actual;
+    actual = cfg.mem_bkdr_util_h[FlashBank0Data].read32(address);
+    `DV_CHECK_EQ(actual, expected)
+  endfunction
+
+  virtual task body();
+    spi_host_flash_seq m_spi_host_seq;
+
+    super.body();
+
+    // Drive SW straps for bootstrap.
+    `uvm_info(`gfn, "Driving SW straps high for bootstrap.", UVM_LOW)
+    cfg.chip_vif.sw_straps_if.drive(3'h7);
+
+    // Set CSB inactive times to reasonable values. sys_clk is at 24 MHz, and
+    // it needs to capture CSB pulses.
+    cfg.m_spi_host_agent_cfg.min_idle_ns_after_csb_drop = 50;
+    cfg.m_spi_host_agent_cfg.max_idle_ns_after_csb_drop = 200;
+
+    // Configure the spi_agent for flash mode and add command info.
+    `uvm_info(`gfn, "Configuring SPI flash commands.", UVM_LOW)
+    spi_agent_configure_flash_cmds(cfg.m_spi_host_agent_cfg);
+
+    // Wait for the SPI flash commands to be configured by the (test) ROM.
+    `uvm_info(`gfn, "Waiting for SPI flash cmds on device to load ...", UVM_LOW)
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadSfdp].opcode),
+      .exp_data(SpiFlashReadSfdp),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadStatus1].opcode),
+      .exp_data(SpiFlashReadSts1),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info_wren.opcode),
+      .exp_data(SpiFlashWriteEnable),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+
+    // Send the SPI flash erase command.
+    `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
+    m_spi_host_seq.opcode = SpiFlashChipErase;
+    `uvm_info(`gfn, "Sending SPI flash erase command ...", UVM_LOW)
+    spi_host_flash_issue_write_cmd(
+      .write_command(m_spi_host_seq),
+      .busy_timeout_ns(50_000_000),
+      .busy_poll_interval_ns(2_000_000));
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Read first flash data word to confirm they are erased.
+    _check_flash_data_page('h0, 32'hFFFF_FFFF);
+    `uvm_info(`gfn, "SPI flash erase done.", UVM_LOW)
+
+    // Set test passed.
+    cfg.chip_vif.sw_straps_if.drive(3'h0);
+    assert_por_reset();
+    override_test_status_and_finish(.passed(1'b1));
+  endtask
+
+endclass : chip_sw_ate_bootstrap_flash_erase_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_one_frame_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_one_frame_vseq.sv
new file mode 100644
index 0000000000000..b100ff813c9b1
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_ate_bootstrap_one_frame_vseq.sv
@@ -0,0 +1,109 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This test performs a the first two steps of a ROM bootstrap operation, i.e.,
+// flash erase followed by a single page program operation. It them confirms
+// flash has been programmed by backdoor reading back the first data page.
+
+class chip_sw_ate_bootstrap_one_frame_vseq extends chip_sw_base_vseq;
+  `uvm_object_utils(chip_sw_ate_bootstrap_one_frame_vseq)
+  `uvm_object_new
+
+  local function automatic void _check_flash_data_page(input integer address,
+                                                       input integer expected);
+    logic [TL_DW-1:0] actual;
+    actual = cfg.mem_bkdr_util_h[FlashBank0Data].read32(address);
+    `DV_CHECK_EQ(actual, expected)
+  endfunction
+
+  virtual task body();
+    spi_host_flash_seq m_spi_host_seq;
+    byte sw_byte_q[$];
+    uint start_addr = 0;
+    uint SPI_FLASH_PAGE_SIZE = 256;
+
+    super.body();
+
+    // Drive SW straps for bootstrap.
+    `uvm_info(`gfn, "Driving SW straps high for bootstrap.", UVM_LOW)
+    cfg.chip_vif.sw_straps_if.drive(3'h7);
+
+    // Set CSB inactive times to reasonable values. sys_clk is at 24 MHz, and
+    // it needs to capture CSB pulses.
+    cfg.m_spi_host_agent_cfg.min_idle_ns_after_csb_drop = 50;
+    cfg.m_spi_host_agent_cfg.max_idle_ns_after_csb_drop = 200;
+
+    // Configure the spi_agent for flash mode and add command info.
+    `uvm_info(`gfn, "Configuring SPI flash commands.", UVM_LOW)
+    spi_agent_configure_flash_cmds(cfg.m_spi_host_agent_cfg);
+
+    // Wait for the SPI flash commands to be configured by the (test) ROM.
+    `uvm_info(`gfn, "Waiting for SPI flash cmds on device to load ...", UVM_LOW)
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadSfdp].opcode),
+      .exp_data(SpiFlashReadSfdp),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadStatus1].opcode),
+      .exp_data(SpiFlashReadSts1),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+    csr_spinwait(
+      .ptr(ral.spi_device.cmd_info_wren.opcode),
+      .exp_data(SpiFlashWriteEnable),
+      .backdoor(1),
+      .spinwait_delay_ns(5000));
+
+    `uvm_info(`gfn, "Reading SW image frames ...", UVM_LOW)
+    `uvm_info(`gfn, $sformatf("SW Image : %0s\n",
+      {cfg.sw_images[SwTypeTestSlotA], ".64.vmem"}), UVM_LOW);
+    read_sw_frames({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"}, sw_byte_q);
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Send the SPI flash erase command.
+    `uvm_info(`gfn, "Sending SPI flash erase command ...", UVM_LOW)
+    `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
+    m_spi_host_seq.opcode = SpiFlashChipErase;
+    spi_host_flash_issue_write_cmd(
+      .write_command(m_spi_host_seq),
+      .busy_timeout_ns(50_000_000),
+      .busy_poll_interval_ns(2_000_000));
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Send the SPI flash (single) page program command.
+    `uvm_info(`gfn, "Sending SPI flash page program command ...", UVM_LOW)
+    `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
+    // Program the first page of flash after the manifest.
+    start_addr = 32'h400;
+    m_spi_host_seq.opcode = SpiFlashPageProgram;
+    m_spi_host_seq.address_q = {start_addr[23:16], start_addr[15:8], start_addr[7:0]};
+    for (int i = 0; i < SPI_FLASH_PAGE_SIZE; i++) begin
+      m_spi_host_seq.payload_q.push_back(sw_byte_q[start_addr + i]);
+    end
+    spi_host_flash_issue_write_cmd(
+      .write_command(m_spi_host_seq),
+      .busy_timeout_ns(10_000_000),
+      .busy_poll_interval_ns(500_000));
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Read back the programmed flash data page to confirm it has been
+    // programmed correctly.
+    `uvm_info(`gfn, $sformatf("Checking page program succeeded ...\n"), UVM_LOW);
+    for (int a = start_addr; a < start_addr + SPI_FLASH_PAGE_SIZE; a += 4) begin
+      logic [TL_DW-1:0] expected_word = {sw_byte_q[a + 3], sw_byte_q[a + 2],
+                                         sw_byte_q[a + 1], sw_byte_q[a + 0]};
+      `uvm_info(`gfn, $sformatf("  Checking SW image word at address %08x: %08x ...\n",
+        a, expected_word), UVM_LOW);
+      _check_flash_data_page(a, expected_word);
+    end
+    `uvm_info(`gfn, "Done.", UVM_LOW)
+
+    // Set test passed.
+    cfg.chip_vif.sw_straps_if.drive(3'h0);
+    assert_por_reset();
+    override_test_status_and_finish(.passed(1'b1));
+  endtask
+
+endclass : chip_sw_ate_bootstrap_one_frame_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_base_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_base_vseq.sv
index f6255ef574d55..083da92643e13 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_base_vseq.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_base_vseq.sv
@@ -112,20 +112,22 @@ class chip_sw_base_vseq extends chip_base_vseq;
 `endif
     end
 
-    if (cfg.sw_images.exists(SwTypeTestSlotA)) begin
-      if (cfg.use_spi_load_bootstrap) begin
-        `uvm_info(`gfn, "Initializing SPI flash bootstrap", UVM_MEDIUM)
-        spi_device_load_bootstrap({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"});
-        cfg.use_spi_load_bootstrap = 1'b0;
-      end else begin
-        cfg.mem_bkdr_util_h[FlashBank0Data].load_mem_from_file(
-            {cfg.sw_images[SwTypeTestSlotA], ".64.scr.vmem"});
+    if (cfg.skip_flash_bkdr_load == 0) begin
+      if (cfg.sw_images.exists(SwTypeTestSlotA)) begin
+        if (cfg.use_spi_load_bootstrap) begin
+          `uvm_info(`gfn, "Initializing SPI flash bootstrap", UVM_MEDIUM)
+          spi_device_load_bootstrap({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"});
+          cfg.use_spi_load_bootstrap = 1'b0;
+        end else begin
+          cfg.mem_bkdr_util_h[FlashBank0Data].load_mem_from_file(
+              {cfg.sw_images[SwTypeTestSlotA], ".64.scr.vmem"});
+        end
+      end
+      if (cfg.sw_images.exists(SwTypeTestSlotB)) begin
+        // TODO: support bootstrapping entire flash address space, not just slot A.
+        cfg.mem_bkdr_util_h[FlashBank1Data].load_mem_from_file(
+            {cfg.sw_images[SwTypeTestSlotB], ".64.scr.vmem"});
       end
-    end
-    if (cfg.sw_images.exists(SwTypeTestSlotB)) begin
-      // TODO: support bootstrapping entire flash address space, not just slot A.
-      cfg.mem_bkdr_util_h[FlashBank1Data].load_mem_from_file(
-          {cfg.sw_images[SwTypeTestSlotB], ".64.scr.vmem"});
     end
 
     config_jitter();
@@ -519,9 +521,11 @@ class chip_sw_base_vseq extends chip_base_vseq;
     cfg.m_spi_host_agent_cfg.min_idle_ns_after_csb_drop = 50;
     cfg.m_spi_host_agent_cfg.max_idle_ns_after_csb_drop = 200;
 
+    `uvm_info(`gfn, "Configuring SPI flash commands.", UVM_LOW)
     // Configure the spi_agent for flash mode and add command info.
     spi_agent_configure_flash_cmds(cfg.m_spi_host_agent_cfg);
 
+    `uvm_info(`gfn, "Wait for SPI flash commands to be ready.", UVM_LOW)
     // Wait for the commands to be ready
     csr_spinwait(
       .ptr(ral.spi_device.cmd_info[spi_device_pkg::CmdInfoReadSfdp].opcode),
@@ -539,15 +543,20 @@ class chip_sw_base_vseq extends chip_base_vseq;
       .backdoor(1),
       .spinwait_delay_ns(5000));
 
+    `uvm_info(`gfn, "Reading SW image frames ...", UVM_LOW)
     read_sw_frames(sw_image, sw_byte_q);
+    `uvm_info(`gfn, "Done.", UVM_LOW)
 
     `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
     m_spi_host_seq.opcode = SpiFlashChipErase;
+    `uvm_info(`gfn, "Sending SPI flash erase command ...", UVM_LOW)
     spi_host_flash_issue_write_cmd(
       .write_command(m_spi_host_seq),
       .busy_timeout_ns(200_000_000),
       .busy_poll_interval_ns(1_000_000));
+    `uvm_info(`gfn, "Done.", UVM_LOW)
 
+    `uvm_info(`gfn, "Sending page program commands ...", UVM_LOW)
     while (sw_byte_q.size > byte_cnt) begin
       `uvm_create_on(m_spi_host_seq, p_sequencer.spi_host_sequencer_h)
       m_spi_host_seq.opcode = SpiFlashPageProgram;
@@ -563,7 +572,9 @@ class chip_sw_base_vseq extends chip_base_vseq;
       spi_host_flash_issue_write_cmd(m_spi_host_seq);
       byte_cnt += bytes_to_write;
     end
+    `uvm_info(`gfn, "Done.", UVM_LOW)
 
+    `uvm_info(`gfn, "Resetting SW straps and chip.", UVM_LOW)
     cfg.chip_vif.sw_straps_if.drive(3'h0);
     assert_por_reset();
   endtask
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_patt_ios_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_patt_ios_vseq.sv
index 3238a12a749df..ee5e06d1d51e6 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_patt_ios_vseq.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_patt_ios_vseq.sv
@@ -51,7 +51,7 @@ class chip_sw_patt_ios_vseq extends chip_sw_base_vseq;
     cfg.m_pattgen_agent_cfg.en_monitor = 0;
 
     byte_arr = {chan_en};
-    sw_symbol_backdoor_overwrite("kChannelEnable", byte_arr);
+    sw_symbol_backdoor_overwrite("kChannelEnableDV", byte_arr);
     `uvm_info(`gfn, $sformatf("PATT_IOS CHAN_EN: %2b", chan_en), UVM_MEDIUM)
 
     for (int i = 0; i < NUM_PATTGEN_CH; i++) begin
@@ -65,34 +65,34 @@ class chip_sw_patt_ios_vseq extends chip_sw_base_vseq;
 
 
     byte_arr = {exp_cfg[0].polarity};
-    sw_symbol_backdoor_overwrite("kPattPol0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattPol0DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[0].clk_div}}}};
-    sw_symbol_backdoor_overwrite("kPattDiv0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattDiv0DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[0].patt_lower}}}};
-    sw_symbol_backdoor_overwrite("kPattLower0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattLower0DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[0].patt_upper}}}};
-    sw_symbol_backdoor_overwrite("kPattUpper0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattUpper0DV", byte_arr);
     byte_arr = {exp_cfg[0].len};
-    sw_symbol_backdoor_overwrite("kPattLen0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattLen0DV", byte_arr);
     byte_arr = {<<8{{<<16{exp_cfg[0].rep}}}};
-    sw_symbol_backdoor_overwrite("kPattRep0", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattRep0DV", byte_arr);
 
     if (chan_en[0]) begin
       `uvm_info(`gfn, $sformatf("PATT_IOS CH0: cfg %p", exp_cfg[0]), UVM_MEDIUM)
     end
 
     byte_arr = {exp_cfg[1].polarity};
-    sw_symbol_backdoor_overwrite("kPattPol1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattPol1DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[1].clk_div}}}};
-    sw_symbol_backdoor_overwrite("kPattDiv1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattDiv1DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[1].patt_lower}}}};
-    sw_symbol_backdoor_overwrite("kPattLower1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattLower1DV", byte_arr);
     byte_arr = {<<8{{<<32{exp_cfg[1].patt_upper}}}};
-    sw_symbol_backdoor_overwrite("kPattUpper1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattUpper1DV", byte_arr);
     byte_arr = {exp_cfg[1].len};
-    sw_symbol_backdoor_overwrite("kPattLen1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattLen1DV", byte_arr);
     byte_arr = {<<8{{<<16{exp_cfg[1].rep}}}};
-    sw_symbol_backdoor_overwrite("kPattRep1", byte_arr);
+    sw_symbol_backdoor_overwrite("kPattRep1DV", byte_arr);
     if (chan_en[1]) begin
       `uvm_info(`gfn, $sformatf("PATT_IOS CH1: cfg %p", exp_cfg[1]), UVM_MEDIUM)
     end
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ate_smoke_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ate_smoke_vseq.sv
new file mode 100644
index 0000000000000..5c7f25fedc334
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ate_smoke_vseq.sv
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class chip_sw_rom_e2e_ate_smoke_vseq extends
+  chip_sw_rom_e2e_base_vseq;
+  `uvm_object_utils(chip_sw_rom_e2e_ate_smoke_vseq)
+  `uvm_object_new
+
+  virtual task body();
+    super.body();
+
+    // Drive SW straps for bootstrap.
+    `uvm_info(`gfn, "Driving SW straps high for bootstrap.", UVM_LOW)
+    cfg.chip_vif.sw_straps_if.drive(3'h7);
+    `uvm_info(`gfn, "Initializing SPI flash bootstrap.", UVM_LOW)
+    spi_device_load_bootstrap({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"});
+    `uvm_info(`gfn, "SPI flash bootstrap done.", UVM_LOW)
+
+    // Wait for SRAM initialization to complete a second time (after bootstrap).
+    `uvm_info(`gfn, "Waiting for SRAM initialization to complete (after bootstrap).", UVM_LOW)
+    `DV_WAIT(cfg.chip_vif.sram_ret_init_done == 1,
+             $sformatf({"Timeout occurred when waiting for SRAM initialization; ",
+                        "Current sram_ret_init_done = 1'%0b, Timeout value = %0dns"},
+                        cfg.chip_vif.sram_ret_init_done,
+                        cfg.sw_test_timeout_ns),
+             cfg.sw_test_timeout_ns)
+    `uvm_info(`gfn, "ROM SRAM initialization done.", UVM_LOW)
+
+    // Wait for GPIO 0 (IOA5) to toggle.
+    `DV_WAIT(cfg.chip_vif.mios[top_earlgrey_pkg::MioPadIoa5] == '1,
+             $sformatf("Timed out waiting for IOA5 to go high."),
+             cfg.sw_test_timeout_ns)
+
+    // Set test passed.
+    override_test_status_and_finish(.passed(1'b1));
+  endtask
+
+endclass : chip_sw_rom_e2e_ate_smoke_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_base_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_base_vseq.sv
index 42aa07f72068b..4ee013427a4f2 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_base_vseq.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_base_vseq.sv
@@ -30,7 +30,9 @@ class chip_sw_rom_e2e_base_vseq extends chip_sw_base_vseq;
     // Wait until we receive the expected boot fault message length of bytes over UART0.
     `DV_WAIT(uart_tx_data_q.size() == exp_msg.len(),
       "Timeout waiting for UART FIFO to fill.", 200_000_000)
-    `uvm_info(`gfn, "Checking the UART TX data matches expected boot fault msg ...", UVM_LOW)
+    `uvm_info(`gfn,
+      $sformatf("Checking UART TX data matches '%s'...", exp_msg),
+      UVM_LOW);
     actual_msg = {>>{uart_tx_data_q}};
     `DV_CHECK_STREQ(actual_msg, exp_msg)
   endtask
@@ -52,7 +54,14 @@ class chip_sw_rom_e2e_base_vseq extends chip_sw_base_vseq;
     // prevent X's propagating as a result of multiple drivers on pins IOC3 and IOC4 (due to DFT
     // strap sampling in TestUnlocked* and RMA lifecycle states). Once the retention SRAM is
     // initialized, we have made it to `rom_main()`.
-    `DV_WAIT(cfg.chip_vif.sram_ret_init_done == 1)
+    `uvm_info(`gfn, "Waiting for SRAM initialization to complete.", UVM_LOW)
+    `DV_WAIT(cfg.chip_vif.sram_ret_init_done == 1,
+             $sformatf({"Timeout occurred when waiting for SRAM initialization; ",
+                        "Current sram_ret_init_done = 1'%0b, Timeout value = %0dns"},
+                        cfg.chip_vif.sram_ret_init_done,
+                        cfg.sw_test_timeout_ns),
+             cfg.sw_test_timeout_ns)
+    `uvm_info(`gfn, "ROM SRAM initialization done.", UVM_LOW)
   endtask
 
 endclass : chip_sw_rom_e2e_base_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ft_perso_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ft_perso_vseq.sv
new file mode 100644
index 0000000000000..0f120311ac547
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_ft_perso_vseq.sv
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class chip_sw_rom_e2e_ft_perso_vseq extends
+  chip_sw_rom_e2e_base_vseq;
+  `uvm_object_utils(chip_sw_rom_e2e_ft_perso_vseq)
+  `uvm_object_new
+
+  virtual task body();
+    super.body();
+
+    // Drive SW straps for bootstrap.
+    `uvm_info(`gfn, "Driving SW straps high for bootstrap.", UVM_LOW)
+    cfg.chip_vif.sw_straps_if.drive(3'h7);
+    `uvm_info(`gfn, "Initializing SPI flash bootstrap.", UVM_LOW)
+    spi_device_load_bootstrap({cfg.sw_images[SwTypeTestSlotA], ".64.vmem"});
+    `uvm_info(`gfn, "SPI flash bootstrap done.", UVM_LOW)
+
+    // Wait for SRAM initialization to complete a second time (after bootstrap).
+    `uvm_info(`gfn, "Waiting for SRAM initialization to complete (after bootstrap).", UVM_LOW)
+    `DV_WAIT(cfg.chip_vif.sram_ret_init_done == 1,
+             $sformatf({"Timeout occurred when waiting for SRAM initialization; ",
+                        "Current sram_ret_init_done = 1'%0b, Timeout value = %0dns"},
+                        cfg.chip_vif.sram_ret_init_done,
+                        cfg.sw_test_timeout_ns),
+             cfg.sw_test_timeout_ns)
+    `uvm_info(`gfn, "ROM SRAM initialization done.", UVM_LOW)
+
+    // Wait for IOA1 (perso done GPIO indicator) to toggle on.
+    `DV_WAIT(cfg.chip_vif.mios[top_earlgrey_pkg::MioPadIoa1] == '1,
+             $sformatf("Timed out waiting for IOA1 to go high."),
+             cfg.sw_test_timeout_ns)
+
+    // Set test passed.
+    override_test_status_and_finish(.passed(1'b1));
+  endtask
+
+endclass : chip_sw_rom_e2e_ft_perso_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_self_hash_gls_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_self_hash_gls_vseq.sv
new file mode 100644
index 0000000000000..dc2a6726825cd
--- /dev/null
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_self_hash_gls_vseq.sv
@@ -0,0 +1,33 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class chip_sw_rom_e2e_self_hash_gls_vseq extends
+  chip_sw_rom_e2e_base_vseq;
+  `uvm_object_utils(chip_sw_rom_e2e_self_hash_gls_vseq)
+  `uvm_object_new
+
+  // Must match the `kSiliconGoldenRomHash` value in
+  // `sw/device/silicon_creator/rom/e2e/release/rom_e2e_self_hash_test.c`.
+  localparam string ROM_HASH = "4f41f620ca885ef2198ce068ac8c89a57ee119d1e73816f2ddec31a15eb4c370";
+
+  virtual task body();
+    super.body();
+    // Wait until we start executing from flash.
+    `DV_WAIT(cfg.chip_vif.probed_cpu_pc.pc_wb >= 32'h2000_0000,
+             $sformatf({"Timeout occurred when waiting for flash execution; ",
+                        "Current pc_wb = 32x%0x, Timeout value = %0dns"},
+                        cfg.chip_vif.probed_cpu_pc.pc_wb,
+                        cfg.sw_test_timeout_ns),
+             cfg.sw_test_timeout_ns)
+    connect_rom_uart_agent();
+    check_uart_output_msg($sformatf("ROM Hash: 0x%s\x0d\n", ROM_HASH));
+
+    // DV test status window is not written to for silicon SW images, so we
+    // must force the test pass flag to end the simulation.
+    apply_reset();
+    override_test_status_and_finish(.passed(1'b1));
+    disconnect_rom_uart_agent();
+  endtask
+
+endclass : chip_sw_rom_e2e_self_hash_gls_vseq
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv
index aef0218c94665..9a701bfeca607 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_sw_spi_passthrough_vseq.sv
@@ -14,7 +14,11 @@ class chip_sw_spi_passthrough_vseq extends chip_sw_base_vseq;
   // Frequencies to use for testing the sequences.
   time sck_periods_ps[] = '{
     41_000, // 24 MHz
+`ifndef GATE_LEVEL
+    //TODO return 30MHz for GLS simulation when issue #24597 is fixed
+    // 30Mhz SCK is not supported when CMD_INFO.read_pipeline_mode is set to 0x0 or 0x1
     33_000, // 30 MHz
+`endif
     167_000 // 6 MHz
   };
   // A bit map of command slots that will have passthrough filters enabled.
diff --git a/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv b/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
index b22734524c30a..6085cd7999f44 100644
--- a/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
+++ b/hw/top_earlgrey/dv/env/seq_lib/chip_vseq_list.sv
@@ -97,12 +97,18 @@
 `include "chip_sw_flash_host_gnt_err_inj_vseq.sv"
 `include "chip_padctrl_attributes_vseq.sv"
 `include "chip_sw_rom_e2e_base_vseq.sv"
+`include "chip_sw_rom_e2e_ate_smoke_vseq.sv"
+`include "chip_sw_rom_e2e_ft_perso_vseq.sv"
 `include "chip_sw_rom_e2e_shutdown_exception_c_vseq.sv"
 `include "chip_sw_rom_e2e_shutdown_output_vseq.sv"
 `include "chip_sw_rom_e2e_sigverify_always_a_bad_b_bad_vseq.sv"
 `include "chip_sw_rom_e2e_asm_init_vseq.sv"
 `include "chip_sw_rom_e2e_jtag_debug_vseq.sv"
 `include "chip_sw_rom_e2e_jtag_inject_vseq.sv"
+`include "chip_sw_rom_e2e_self_hash_gls_vseq.sv"
+`include "chip_sw_ate_bootstrap_disjoint_vseq.sv"
+`include "chip_sw_ate_bootstrap_flash_erase_vseq.sv"
+`include "chip_sw_ate_bootstrap_one_frame_vseq.sv"
 `include "chip_sw_power_idle_load_vseq.sv"
 `include "chip_sw_power_sleep_load_vseq.sv"
 `include "chip_sw_ast_clk_rst_inputs_vseq.sv"
diff --git a/hw/top_earlgrey/dv/tb/tb.sv b/hw/top_earlgrey/dv/tb/tb.sv
index dd49ad90c68c9..33e88586145ca 100644
--- a/hw/top_earlgrey/dv/tb/tb.sv
+++ b/hw/top_earlgrey/dv/tb/tb.sv
@@ -193,6 +193,9 @@ module tb;
   // Knob to skip ROM backdoor logging (for sims that use ROM macro). Set below.
   logic skip_rom_bkdr_load;
 
+  // Knob to skip flash backdoor loading. Set below.
+  logic skip_flash_bkdr_load;
+
   // Instantiate & connect the simulation SRAM inside the CPU (rv_core_ibex) using forces.
   bit en_sim_sram = 1'b1;
   wire sel_sim_sram = !dut.chip_if.stub_cpu & en_sim_sram;
@@ -477,7 +480,13 @@ module tb;
           .n_bits($bits(`FLASH0_INFO_MEM_HIER)),
           .err_detection_scheme(mem_bkdr_util_pkg::EccHamming_76_68),
           .system_base_addr    (top_earlgrey_pkg::TOP_EARLGREY_EFLASH_BASE_ADDR));
-      `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[FlashBank0Info], `FLASH0_INFO_MEM_HIER)
+      // Knob to skip flash backdoor loading (for ATE sims).
+      if (!$value$plusargs("skip_flash_bkdr_load=%0b", skip_flash_bkdr_load)) begin
+        skip_flash_bkdr_load = 0;
+      end
+      if (!skip_flash_bkdr_load) begin
+        `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[FlashBank0Info], `FLASH0_INFO_MEM_HIER)
+      end
 
       `uvm_info("tb.sv", "Creating mem_bkdr_util instance for flash 1 data", UVM_MEDIUM)
       m_mem_bkdr_util[FlashBank1Data] = new(
@@ -488,7 +497,13 @@ module tb;
           .err_detection_scheme(mem_bkdr_util_pkg::EccHamming_76_68),
           .system_base_addr    (top_earlgrey_pkg::TOP_EARLGREY_EFLASH_BASE_ADDR +
               top_earlgrey_pkg::TOP_EARLGREY_EFLASH_SIZE_BYTES / flash_ctrl_pkg::NumBanks));
-      `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[FlashBank1Data], `FLASH1_DATA_MEM_HIER)
+      // Knob to skip flash backdoor loading (for ATE sims).
+      if (!$value$plusargs("skip_flash_bkdr_load=%0b", skip_flash_bkdr_load)) begin
+        skip_flash_bkdr_load = 0;
+      end
+      if (!skip_flash_bkdr_load) begin
+        `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[FlashBank1Data], `FLASH1_DATA_MEM_HIER)
+      end
 
       `uvm_info("tb.sv", "Creating mem_bkdr_util instance for flash 1 info", UVM_MEDIUM)
       m_mem_bkdr_util[FlashBank1Info] = new(
@@ -555,6 +570,7 @@ module tb;
           .depth ($size(`RAM_MAIN_MEM_HIER)),
           .n_bits($bits(`RAM_MAIN_MEM_HIER)),
           .err_detection_scheme(mem_bkdr_util_pkg::EccInv_39_32),
+          .num_prince_rounds_half(2),
           .system_base_addr    (top_earlgrey_pkg::TOP_EARLGREY_RAM_MAIN_BASE_ADDR));
       `MEM_BKDR_UTIL_FILE_OP(m_mem_bkdr_util[RamMain0], `RAM_MAIN_MEM_HIER)
 
diff --git a/hw/top_earlgrey/dv/tests/chip_base_test.sv b/hw/top_earlgrey/dv/tests/chip_base_test.sv
index 489b8f0097ea3..db2f4d73d4311 100644
--- a/hw/top_earlgrey/dv/tests/chip_base_test.sv
+++ b/hw/top_earlgrey/dv/tests/chip_base_test.sv
@@ -76,6 +76,10 @@ class chip_base_test extends cip_base_test #(
     // Knob to skip ROM backdoor logging (for sims that use ROM macro).
     void'($value$plusargs("skip_rom_bkdr_load=%0b", cfg.skip_rom_bkdr_load));
 
+    // Knob to skip backdoor loading of flash (for sims that use mask ROM but
+    // want to also perform SPI bootstrap operation).
+    void'($value$plusargs("skip_flash_bkdr_load=%0b", cfg.skip_flash_bkdr_load));
+
     // Knob to add vendor flash write latency
     void'($value$plusargs("flash_write_latency_in_us=%d", cfg.flash_write_latency_in_us));
 
diff --git a/hw/top_earlgrey/dv/verilator/chip_sim.core b/hw/top_earlgrey/dv/verilator/chip_sim.core
index a5b58502a030f..cecd815a2579a 100644
--- a/hw/top_earlgrey/dv/verilator/chip_sim.core
+++ b/hw/top_earlgrey/dv/verilator/chip_sim.core
@@ -109,7 +109,7 @@ targets:
           - '--unroll-count 512'
           # TODO: Variable expansion depends on edalize internals. Find better solution.
           #       (Applies to LDFLAGS expansion below as well)
-          - '-CFLAGS "$(CFLAGS_FOR_BUILD) -std=c++11 -Wall -DVM_TRACE_FMT_FST -DVL_USER_STOP -DTOPLEVEL_NAME=chip_sim_tb"'
+          - '-CFLAGS "$(CFLAGS_FOR_BUILD) -std=c++17 -Wall -DVM_TRACE_FMT_FST -DVL_USER_STOP -DTOPLEVEL_NAME=chip_sim_tb"'
           - '-LDFLAGS "$(LDFLAGS_FOR_BUILD) -pthread -lutil -lelf"'
           - '-Wall'
           # Execute simulation with four threads by default, which works best
diff --git a/hw/top_earlgrey/earlgrey_xilinx_prim_pkg.core b/hw/top_earlgrey/earlgrey_xilinx_prim_pkg.core
new file mode 100644
index 0000000000000..2284fd3ba0b9a
--- /dev/null
+++ b/hw/top_earlgrey/earlgrey_xilinx_prim_pkg.core
@@ -0,0 +1,19 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+name: "lowrisc:prim_xilinx:earlgrey_xilinx_prim_pkg"
+description: "Single port RAM"
+virtual:
+  - lowrisc:prim_xilinx:prim_xilinx_pkg
+filesets:
+  files_rtl:
+    files:
+      - rtl/prim_xilinx_pkg.sv
+    file_type: systemVerilogSource
+
+targets:
+  default: &default_target
+    filesets:
+      - files_rtl
diff --git a/hw/top_earlgrey/ip/BUILD b/hw/top_earlgrey/ip/BUILD
index f36c294f489d2..70d633bfa0f70 100644
--- a/hw/top_earlgrey/ip/BUILD
+++ b/hw/top_earlgrey/ip/BUILD
@@ -9,13 +9,13 @@ filegroup(
     srcs = glob(["**"]) + [
         "//hw/top_earlgrey/ip/ast:all_files",
         "//hw/top_earlgrey/ip/pinmux:all_files",
-        "//hw/top_earlgrey/ip_autogen/clkmgr:all_files",
-        "//hw/top_earlgrey/ip_autogen/flash_ctrl:all_files",
-        "//hw/top_earlgrey/ip_autogen/pwrmgr:all_files",
-        "//hw/top_earlgrey/ip_autogen/rstmgr:all_files",
         "//hw/top_earlgrey/ip/sensor_ctrl:all_files",
         "//hw/top_earlgrey/ip/xbar:all_files",
         "//hw/top_earlgrey/ip/xbar_main:all_files",
         "//hw/top_earlgrey/ip/xbar_peri:all_files",
+        "//hw/top_earlgrey/ip_autogen/clkmgr:all_files",
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:all_files",
+        "//hw/top_earlgrey/ip_autogen/pwrmgr:all_files",
+        "//hw/top_earlgrey/ip_autogen/rstmgr:all_files",
     ],
 )
diff --git a/hw/top_earlgrey/ip/ast/ast.core b/hw/top_earlgrey/ip/ast/ast.core
index c37f2a7854cc9..887d8d26bbede 100644
--- a/hw/top_earlgrey/ip/ast/ast.core
+++ b/hw/top_earlgrey/ip/ast/ast.core
@@ -126,5 +126,5 @@ targets:
       - files_rtl
     tools:
       vcs:
-        vcs_options: [-sverilog -ntb_opts uvm-1.2 -CFLAGS --std=c99 -CFLAGS -fno-extended-identifiers -CFLAGS --std=c++11 -timescale=1ns/1ps -l vcs.log]
+        vcs_options: [-sverilog -ntb_opts uvm-1.2 -CFLAGS --std=c99 -CFLAGS -fno-extended-identifiers -CFLAGS --std=c++17 -timescale=1ns/1ps -l vcs.log]
     toplevel: ast
diff --git a/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson b/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
index 8b5e3a168da65..ebe98fb937109 100644
--- a/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
+++ b/hw/top_earlgrey/ip/pinmux/data/autogen/pinmux.hjson
@@ -552,6 +552,7 @@
                             Muxed pad attributes.
                             This register has WARL behavior since not each pad type may support
                             all attributes.
+                            The muxed pad that is used for TAP strap 0 has a different reset value, with `pull_en` set to 1.
                             ''',
                   count:        "NMioPads",
                   compact:      "false",
@@ -622,7 +623,8 @@
                   // read back the same value that was written to them.
                   // further, they have hardware side effects since they drive the
                   // pad attributes, and hence no random data should be written to them.
-                  tags: ["excl:CsrAllTests:CsrExclWrite"]
+                  // Additionally, their reset value is defined by the RTL implementation and may not equal `resval` for all instances (#24621).
+                  tags: ["excl:CsrAllTests:CsrExclAll"]
                 }
     },
 
diff --git a/hw/top_earlgrey/ip/sensor_ctrl/doc/checklist.md b/hw/top_earlgrey/ip/sensor_ctrl/doc/checklist.md
index 9a8ea166dda3e..9566b5af6a6a1 100644
--- a/hw/top_earlgrey/ip/sensor_ctrl/doc/checklist.md
+++ b/hw/top_earlgrey/ip/sensor_ctrl/doc/checklist.md
@@ -104,8 +104,8 @@ Review        | [REVIEW_RTL][]          | Done        |
 Review        | [REVIEW_DELETED_FF][]   | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_SW_CHANGE][]    | Done        |
 Review        | [REVIEW_SW_ERRATA][]    | Done        |
-Review        | Reviewer(s)             | Done        | msf@ sriyer@ tjaychen@ a-will@
-Review        | Signoff date            | Done        | 2022-08-18
+Review        | Reviewer(s)             | Done        | adk@ vogelpi@
+Review        | Signoff date            | Done        | 2024-08-06
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/top_earlgrey/ip_autogen/alert_handler/doc/checklist.md b/hw/top_earlgrey/ip_autogen/alert_handler/doc/checklist.md
index 48fda1b4f7439..d398772f97776 100644
--- a/hw/top_earlgrey/ip_autogen/alert_handler/doc/checklist.md
+++ b/hw/top_earlgrey/ip_autogen/alert_handler/doc/checklist.md
@@ -104,8 +104,8 @@ Review        | [REVIEW_RTL][]          | Done        |
 Review        | [REVIEW_DELETED_FF][]   | Waived      | No block-level flow available - waived to top-level signoff.
 Review        | [REVIEW_SW_CHANGE][]    | Done        |
 Review        | [REVIEW_SW_ERRATA][]    | Done        |
-Review        | Reviewer(s)             | Done        | msf@ vogelpi@ chencindy@ ttrippel@ tjaychen@
-Review        | Signoff date            | Done        | 2022-07-11
+Review        | Reviewer(s)             | Done        | adk@ vogelpi@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/data/clkmgr.hjson b/hw/top_earlgrey/ip_autogen/clkmgr/data/clkmgr.hjson
index 57cdd5228e50e..d486cbc704049 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/data/clkmgr.hjson
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/data/clkmgr.hjson
@@ -25,7 +25,7 @@
     {
       version:            "1.0.1",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
@@ -414,8 +414,7 @@
           name: "EN",
           resval: "1"
           desc: '''
-            When 1, the value of !!JITTER_ENABLE can be changed.  When 0, writes have no
-            effect.
+            This register has no effect.
           '''
         },
       ]
@@ -434,13 +433,14 @@
           name: "VAL",
           desc: '''
             Enable jittery clock.
-            A value of kMultiBitBool4False disables the jittery clock,
-            while all other values enable jittery clock.
+            At reset, this register reads as kMultiBitBool4False and the jittery clock is disabled.
+            Any write to the register turns the value to kMultiBitBool4True and enables the jittery clock.
+            The value written doesn't matter.
+            The value then remains kMultiBitBool4True until reset.
           ''',
           resval: false
-          // avoid writing random values to this register as it could trigger transient checks
-          // in mubi sync
-          tags: ["excl:CsrAllTests:CsrExclWrite"]
+          // Exclude this register from any automated CSR tests as the behavior is non-standard.
+          tags: ["excl:CsrAllTests:CsrExclAll"]
         }
       ]
     },
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/doc/checklist.md b/hw/top_earlgrey/ip_autogen/clkmgr/doc/checklist.md
index f685650e418e1..28ac5395584b9 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/doc/checklist.md
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/doc/checklist.md
@@ -100,17 +100,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | With waivers approved by TC on 2024-08-08
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | matutem@, vogelpi@, adk@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/doc/registers.md b/hw/top_earlgrey/ip_autogen/clkmgr/doc/registers.md
index a3ea64371ffe5..8214a604eeaeb 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/doc/registers.md
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/doc/registers.md
@@ -148,10 +148,10 @@ Jitter write enable
 {"reg": [{"name": "EN", "bits": 1, "attr": ["rw0c"], "rotate": -90}, {"bits": 31}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name   | Description                                                                                            |
-|:------:|:------:|:-------:|:-------|:-------------------------------------------------------------------------------------------------------|
-|  31:1  |        |         |        | Reserved                                                                                               |
-|   0    |  rw0c  |   0x1   | EN     | When 1, the value of [`JITTER_ENABLE`](#jitter_enable) can be changed.  When 0, writes have no effect. |
+|  Bits  |  Type  |  Reset  | Name   | Description                  |
+|:------:|:------:|:-------:|:-------|:-----------------------------|
+|  31:1  |        |         |        | Reserved                     |
+|   0    |  rw0c  |   0x1   | EN     | This register has no effect. |
 
 ## JITTER_ENABLE
 Enable jittery clock
@@ -165,10 +165,17 @@ Enable jittery clock
 {"reg": [{"name": "VAL", "bits": 4, "attr": ["rw"], "rotate": 0}, {"bits": 28}], "config": {"lanes": 1, "fontsize": 10, "vspace": 80}}
 ```
 
-|  Bits  |  Type  |  Reset  | Name   | Description                                                                                                                   |
-|:------:|:------:|:-------:|:-------|:------------------------------------------------------------------------------------------------------------------------------|
-|  31:4  |        |         |        | Reserved                                                                                                                      |
-|  3:0   |   rw   |   0x9   | VAL    | Enable jittery clock. A value of kMultiBitBool4False disables the jittery clock, while all other values enable jittery clock. |
+|  Bits  |  Type  |  Reset  | Name                       |
+|:------:|:------:|:-------:|:---------------------------|
+|  31:4  |        |         | Reserved                   |
+|  3:0   |   rw   |   0x9   | [VAL](#jitter_enable--val) |
+
+### JITTER_ENABLE . VAL
+Enable jittery clock.
+At reset, this register reads as kMultiBitBool4False and the jittery clock is disabled.
+Any write to the register turns the value to kMultiBitBool4True and enables the jittery clock.
+The value written doesn't matter.
+The value then remains kMultiBitBool4True until reset.
 
 ## CLK_ENABLES
 Clock enable for software gateable clocks.
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/clkmgr_scoreboard.sv b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/clkmgr_scoreboard.sv
index 820925dd9af5b..399350fe98b22 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/clkmgr_scoreboard.sv
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/clkmgr_scoreboard.sv
@@ -290,7 +290,13 @@ class clkmgr_scoreboard extends cip_base_scoreboard #(
     // If incoming access is a write to a valid csr, update prediction right away.
     if (addr_phase_write) begin
       `uvm_info(`gfn, $sformatf("Writing 0x%0x to %s", item.a_data, csr.get_name()), UVM_MEDIUM)
-      void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
+      if (csr.get_name() == "jitter_enable") begin
+        // Any write to the jitter_enable CSR turns the value to MuBi4True. The value written
+        // doesn't matter.
+        void'(csr.predict(.value(prim_mubi_pkg::MuBi4True), .kind(UVM_PREDICT_WRITE)));
+      end else begin
+        void'(csr.predict(.value(item.a_data), .kind(UVM_PREDICT_WRITE), .be(item.a_mask)));
+      end
     end
 
     // Process the csr req:
@@ -318,8 +324,8 @@ class clkmgr_scoreboard extends cip_base_scoreboard #(
       "jitter_regwen": begin
       end
       "jitter_enable": begin
-        if (addr_phase_write && `gmv(ral.jitter_regwen)) begin
-          `DV_CHECK_EQ(prim_mubi_pkg::mubi4_t'(item.a_data), cfg.clkmgr_vif.jitter_enable_csr)
+        if (data_phase_write) begin
+          `DV_CHECK_EQ(prim_mubi_pkg::MuBi4True, cfg.clkmgr_vif.jitter_enable_csr)
         end
       end
       "clk_enables": begin
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
index ec5d4896a650d..edfb77d4f6313 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_regwen_vseq.sv
@@ -9,6 +9,21 @@ class clkmgr_regwen_vseq extends clkmgr_base_vseq;
 
   `uvm_object_new
 
+  task check_jitter_regwen();
+    bit enable;
+    mubi4_t prev_value;
+    mubi4_t new_value;
+
+    `DV_CHECK_STD_RANDOMIZE_FATAL(enable)
+    new_value = get_rand_mubi4_val(.t_weight(1), .f_weight(1), .other_weight(2));
+    `uvm_info(`gfn, $sformatf("Check jitter regwen set to %b begin", enable), UVM_MEDIUM)
+    csr_wr(.ptr(ral.jitter_regwen), .value(enable));
+    csr_rd(.ptr(ral.jitter_enable), .value(prev_value));
+    csr_wr(.ptr(ral.jitter_enable), .value(new_value));
+    csr_rd_check(.ptr(ral.jitter_enable), .compare_value(MuBi4True));
+    `uvm_info(`gfn, "Check jitter regwen end", UVM_MEDIUM)
+  endtask : check_jitter_regwen
+
   task check_extclk_regwen();
     bit enable;
     int prev_value;
@@ -67,6 +82,7 @@ class clkmgr_regwen_vseq extends clkmgr_base_vseq;
 
     `uvm_info(`gfn, $sformatf("Will run %0d rounds", num_trans), UVM_MEDIUM)
     for (int i = 0; i < num_trans; ++i) begin
+      check_jitter_regwen();
       check_extclk_regwen();
       check_meas_ctrl_regwen();
       apply_reset("HARD");
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
index 6807809aec382..85a817ec66af8 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/dv/env/seq_lib/clkmgr_smoke_vseq.sv
@@ -24,16 +24,18 @@ class clkmgr_smoke_vseq extends clkmgr_base_vseq;
   // This needs to be done outside the various CSR tests, since they update the jitter_enable
   // CSR, but the scoreboard is disabled for those tests.
   task test_jitter();
-    prim_mubi_pkg::mubi4_t jitter_value;
-    for (int i = 0; i < (1 << $bits(prim_mubi_pkg::mubi4_t)); ++i) begin
-      jitter_value = prim_mubi_pkg::mubi4_t'(i);
-      csr_wr(.ptr(ral.jitter_enable), .value(jitter_value));
-      csr_rd_check(.ptr(ral.jitter_enable), .compare_value(jitter_value));
-      // And set it back.
-      cfg.clk_rst_vif.wait_clks(6);
-      csr_wr(.ptr(ral.jitter_enable), .value('0));
-      csr_rd_check(.ptr(ral.jitter_enable), .compare_value('0));
+    prim_mubi_pkg::mubi4_t jitter_enable_value;
+    // Read the current value.
+    csr_rd(.ptr(ral.jitter_enable), .value(jitter_enable_value));
+    if (jitter_enable_value == prim_mubi_pkg::MuBi4False) begin
+      // Write a random 4-bit value to the register. This will set it to enabled.
+      csr_wr(.ptr(ral.jitter_enable), .value($urandom_range(0, 15)));
+      csr_rd_check(.ptr(ral.jitter_enable), .compare_value(prim_mubi_pkg::MuBi4True));
     end
+    // Try to set it back - it must stay enabled until reset.
+    cfg.clk_rst_vif.wait_clks(6);
+    csr_wr(.ptr(ral.jitter_enable), .value(prim_mubi_pkg::MuBi4False));
+    csr_rd_check(.ptr(ral.jitter_enable), .compare_value(prim_mubi_pkg::MuBi4True));
   endtask
 
   // Flips all clk_enables bits from the reset value with all enabled. All is checked
diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/rtl/clkmgr_reg_top.sv b/hw/top_earlgrey/ip_autogen/clkmgr/rtl/clkmgr_reg_top.sv
index 2f83766422648..1cf5e9ccffe93 100644
--- a/hw/top_earlgrey/ip_autogen/clkmgr/rtl/clkmgr_reg_top.sv
+++ b/hw/top_earlgrey/ip_autogen/clkmgr/rtl/clkmgr_reg_top.sv
@@ -874,7 +874,7 @@ module clkmgr_reg_top (
 
     // from register interface
     .we     (jitter_enable_we),
-    .wd     (jitter_enable_wd),
+    .wd     (prim_mubi_pkg::MuBi4True),
 
     // from internal hardware
     .de     (1'b0),
@@ -1763,6 +1763,18 @@ module clkmgr_reg_top (
   //   F[hi]: 9:0
   logic async_main_meas_ctrl_shadowed_hi_err_update;
   logic async_main_meas_ctrl_shadowed_hi_err_storage;
+  logic deglitched_main_meas_ctrl_shadowed_hi_err_storage;
+
+  // flop storage error to filter combinational glitches before sending it across CDC
+  prim_flop #(
+    .Width(1),
+    .ResetValue('0)
+  ) u_main_meas_ctrl_shadowed_hi_err_storage_deglitch (
+    .clk_i (clk_main_i),
+    .rst_ni(rst_main_ni),
+    .d_i   (async_main_meas_ctrl_shadowed_hi_err_storage),
+    .q_o   (deglitched_main_meas_ctrl_shadowed_hi_err_storage)
+  );
 
   // storage error is persistent and can be sampled at any time
   prim_flop_2sync #(
@@ -1771,7 +1783,7 @@ module clkmgr_reg_top (
   ) u_main_meas_ctrl_shadowed_hi_err_storage_sync (
     .clk_i,
     .rst_ni,
-    .d_i(async_main_meas_ctrl_shadowed_hi_err_storage),
+    .d_i(deglitched_main_meas_ctrl_shadowed_hi_err_storage),
     .q_o(main_meas_ctrl_shadowed_hi_storage_err)
   );
 
@@ -1822,6 +1834,18 @@ module clkmgr_reg_top (
   //   F[lo]: 19:10
   logic async_main_meas_ctrl_shadowed_lo_err_update;
   logic async_main_meas_ctrl_shadowed_lo_err_storage;
+  logic deglitched_main_meas_ctrl_shadowed_lo_err_storage;
+
+  // flop storage error to filter combinational glitches before sending it across CDC
+  prim_flop #(
+    .Width(1),
+    .ResetValue('0)
+  ) u_main_meas_ctrl_shadowed_lo_err_storage_deglitch (
+    .clk_i (clk_main_i),
+    .rst_ni(rst_main_ni),
+    .d_i   (async_main_meas_ctrl_shadowed_lo_err_storage),
+    .q_o   (deglitched_main_meas_ctrl_shadowed_lo_err_storage)
+  );
 
   // storage error is persistent and can be sampled at any time
   prim_flop_2sync #(
@@ -1830,7 +1854,7 @@ module clkmgr_reg_top (
   ) u_main_meas_ctrl_shadowed_lo_err_storage_sync (
     .clk_i,
     .rst_ni,
-    .d_i(async_main_meas_ctrl_shadowed_lo_err_storage),
+    .d_i(deglitched_main_meas_ctrl_shadowed_lo_err_storage),
     .q_o(main_meas_ctrl_shadowed_lo_storage_err)
   );
 
@@ -2803,6 +2827,11 @@ module clkmgr_reg_top (
 
   // Unused signal tieoff
 
+  // Any write to the jitter_enable CSR writes MuBi4True.
+  // The actual write data is ignored.
+  logic unused_jitter_enable_wd;
+  assign unused_jitter_enable_wd = ^jitter_enable_wd;
+
   // wdata / byte enable are not always fully used
   // add a blanket unused statement to handle lint waivers
   logic unused_wdata;
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env.core b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env.core
index 735c3fb1f3aba..f5956d7761c8a 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env.core
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env.core
@@ -96,6 +96,7 @@ filesets:
       - seq_lib/flash_ctrl_hw_read_seed_err_vseq.sv: {is_include_file: true}
       - seq_lib/flash_ctrl_hw_prog_rma_wipe_err_vseq.sv: {is_include_file: true}
       - seq_lib/flash_ctrl_rd_ooo_vseq.sv: {is_include_file: true}
+      - seq_lib/flash_ctrl_basic_rw_vseq.sv: {is_include_file: true}
     file_type: systemVerilogSource
 
 generate:
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
index 74f01f325b681..ae7c9156c0e72 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_cfg.sv
@@ -698,7 +698,6 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
       `uvm_create_obj(flash_otf_item, item)
       flash_mem_otf_read(flash_op, item.fq);
       flash_op.otf_addr = flash_op.addr;
-      flash_op.otf_addr[BusAddrByteW-2:OTFHostId] = 'h0;
 
       item.region.scramble_en = MuBi4True;
       item.region.ecc_en = (ecc_en)? MuBi4True : MuBi4False;
@@ -1146,9 +1145,8 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   // Increase outstanding table entry.
   function void inc_otd_tbl(bit bank, addr_t addr, flash_dv_part_e part);
     rd_cache_t ent;
-    addr[2:0] = 3'h0;
     ent.bank = bank;
-    ent.addr = addr;
+    ent.addr = align_to_flash_word(addr);
     ent.part = part;
     if (!derr_otd.exists(ent)) begin
       derr_otd[ent] = 1;
@@ -1160,9 +1158,8 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   // Descrease outstanding table entry.
   function void dec_otd_tbl(bit bank, addr_t addr, flash_dv_part_e part);
     rd_cache_t ent;
-    addr[2:0] = 3'h0;
     ent.bank = bank;
-    ent.addr = addr;
+    ent.addr = align_to_flash_word(addr);
     ent.part = part;
     if (!derr_otd.exists(ent)) begin
       `uvm_error("dec_otd_tbl", $sformatf("addr %x %s doesn't exits", addr, part.name))
@@ -1188,46 +1185,52 @@ class flash_ctrl_env_cfg extends cip_base_env_cfg #(
   virtual function void load_otf_mem_page(flash_dv_part_e part,
                                           int bank,
                                           int page);
-    addr_t addr;
+    addr_t addr = '0;
     addr[OTFBankId-1:11] = page;
-    for (int i = 0; i < 256; i++) begin
-      update_otf_mem_read_zone(part, bank, addr);
-      addr += 8;
-    end
+    `uvm_info(`gfn, $sformatf("in load_otf_mem_page bank:%0d %s, page:%0d", bank, part.name, page),
+              UVM_HIGH)
+    update_otf_mem_read_zone(part, bank, addr, addr + BytesPerPage - 1);
   endfunction : load_otf_mem_page
 
-  function void update_otf_mem_read_zone(flash_dv_part_e part, int bank, addr_t addr);
-    flash_otf_item item;
-    int page;
-    bit [BankAddrW-1:0] mem_addr;
+  function void update_otf_mem_read_zone(flash_dv_part_e part, int bank,
+                                         addr_t start_addr, addr_t end_addr);
+    start_addr = align_to_flash_word(start_addr);
+    `uvm_info(`gfn, $sformatf(
+              "mem_bkdr initializing bank:%0d %s from 0x%x to 0x%x per attributes",
+              bank, part.name, start_addr, end_addr),
+              UVM_HIGH)
+    for (addr_t addr = start_addr; addr <= end_addr; addr += 8) begin
+      flash_otf_item item;
+      int page;
+      bit [BankAddrW-1:0] mem_addr;
 
-    `uvm_create_obj(flash_otf_item, item)
-    item.dq.push_back($urandom());
-    item.dq.push_back($urandom());
-    if (part == FlashPartData) begin
-      addr[OTFBankId] = bank;
-      page = addr2page(addr);
-      item.region = get_region(page, 0);
-      // back to per bank addr
-      addr[OTFBankId] = 0;
-    end else begin
-      page = addr2page(addr);
-      item.region = get_region_from_info(mp_info[bank][part>>1][page]);
+      `uvm_create_obj(flash_otf_item, item)
+      item.dq.push_back($urandom());
+      item.dq.push_back($urandom());
+      if (part == FlashPartData) begin
+        addr_t pd_addr = addr;
+        pd_addr[OTFBankId] = bank;
+        page = addr2page(pd_addr);
+        item.region = get_region(page, 0);
+      end else begin
+        page = addr2page(addr);
+        item.region = get_region_from_info(mp_info[bank][part>>1][page]);
+      end
+      item.page = page;
+      `uvm_info(`gfn, $sformatf(
+                "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x orig data:0x%0x%0x",
+                part, bank, addr, item.dq[1], item.dq[0]), UVM_HIGH)
+      item.scramble(otp_addr_key, otp_data_key, addr, 0);
+      `uvm_info(`gfn, $sformatf(
+                "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x scr data:0x%x",
+                part, bank, addr, item.fq[0]), UVM_HIGH)
+
+      mem_bkdr_util_h[part][bank].write(addr, item.fq[0]);
+      // address should be mem_addr
+      mem_addr = addr >> 3;
+      if (part == FlashPartData) otf_scb_h.data_mem[bank][mem_addr] = item.fq[0];
+      else otf_scb_h.info_mem[bank][part>>1][mem_addr] = item.fq[0];
     end
-    item.page = page;
-    `uvm_info(`gfn, $sformatf(
-              "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x orig data:0x%0x%0x",
-              part, bank, addr, item.dq[1], item.dq[0]), UVM_HIGH)
-    item.scramble(otp_addr_key, otp_data_key, addr, 0);
-    `uvm_info(`gfn, $sformatf(
-              "update_otf_mem_read_zone part:%0d, bank:%0d addr:0x%08x scr data:0x%x",
-              part, bank, addr, item.fq[0]), UVM_HIGH)
-
-    mem_bkdr_util_h[part][bank].write(addr, item.fq[0]);
-    // address should be mem_addr
-    mem_addr = addr >> 3;
-    if (part == FlashPartData) otf_scb_h.data_mem[bank][mem_addr] = item.fq[0];
-    else otf_scb_h.info_mem[bank][part>>1][mem_addr] = item.fq[0];
   endfunction : update_otf_mem_read_zone
 
   // Update memory with random data through backdoor.
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
index 45c7206720e9d..23bf85557829e 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_env_pkg.sv
@@ -408,10 +408,7 @@ package flash_ctrl_env_pkg;
     bit [FlashDataWidth-1:0]                                    masked_data;
     bit [FlashNumRoundsHalf-1:0][FlashDataWidth-1:0]            scrambled_data;
 
-    // These parameters will be removed once it is included in mem_bkdr_util.sv
-    int                                                         addr_lsb = 3;
-
-    word_addr = byte_addr >> addr_lsb;
+    word_addr = byte_addr >> FlashDataByteWidth;
     mask = flash_galois_multiply(flash_addr_key, word_addr);
     masked_data = data ^ mask;
     crypto_dpi_prince_pkg::sv_dpi_prince_encrypt(.plaintext(masked_data), .key(flash_data_key),
@@ -543,6 +540,10 @@ package flash_ctrl_env_pkg;
     end
   endfunction
 
+  function automatic addr_t align_to_flash_word(addr_t addr);
+     return {addr[$bits(addr_t) - 1 : FlashDataByteWidth], {FlashDataByteWidth{1'b0}}};
+  endfunction
+
   // Round an address down to a program resolution window.
   function automatic addr_t round_to_prog_resolution(addr_t addr);
     return addr - (addr & (BusPgmResBytes - 1));
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
index f720e6b3c0fb0..b3af4ae728d27 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_ctrl_otf_scoreboard.sv
@@ -518,16 +518,23 @@ class flash_ctrl_otf_scoreboard extends uvm_scoreboard;
         skip_comp = 1;
       end
 
+      // Data will be corrupted if some bits to be written cannot be flipped to 1.
       if (rcv.mem_part == FlashPartData) begin
         if (data_mem[bank].exists(rcv.mem_addr)) begin
-          corrupt_entry[entry] = 1;
           rd_data = data_mem[bank][rcv.mem_addr];
-          if (cfg.seq_cfg.use_vendor_flash == 0) begin
-            exp.req.prog_full_data &= rd_data;
-          end else begin
-            skip_comp = 1;
+          if ((exp.req.prog_full_data & rd_data) != exp.req.prog_full_data) begin
+            corrupt_entry[entry] = 1;
+            `uvm_info(`gfn, $sformatf(
+                      "Overwriting data bank:%0d, %s, addr:0x%x, data:0x%x, wr_data:0x%x",
+                      bank, rcv.mem_part.name, entry.addr, rd_data, exp.req.prog_full_data),
+                      UVM_MEDIUM)
+            if (cfg.seq_cfg.use_vendor_flash == 0) begin
+              exp.req.prog_full_data &= rd_data;
+            end else begin
+              skip_comp = 1;
+            end
+            data_mem[bank].delete(rcv.mem_addr);
           end
-          data_mem[bank].delete(rcv.mem_addr);
         end
         data_mem[bank][rcv.mem_addr] = exp.req.prog_full_data;
       end else begin
@@ -536,14 +543,24 @@ class flash_ctrl_otf_scoreboard extends uvm_scoreboard;
         `uvm_info(`gfn, $sformatf("scb_rd_data:%x prog_data:%x",
              info_mem[bank][rcv.mem_info_sel][rcv.mem_addr], exp.req.prog_full_data), UVM_HIGH)
         if (info_mem[bank][rcv.mem_info_sel].exists(rcv.mem_addr)) begin
-          corrupt_entry[entry] = 1;
           rd_data = info_mem[bank][rcv.mem_info_sel][rcv.mem_addr];
-          if (cfg.seq_cfg.use_vendor_flash == 0) begin
-            exp.req.prog_full_data &= rd_data;
-          end else begin
-            skip_comp = 1;
+          if ((exp.req.prog_full_data & rd_data) != exp.req.prog_full_data) begin
+            corrupt_entry[entry] = 1;
+            `uvm_info(`gfn, $sformatf(
+                      "Overwriting data bank:%0d, %s, addr:0x%x, data:0x%x, wr_data:0x%x",
+                      bank, rcv.mem_part.name, entry.addr, rd_data, exp.req.prog_full_data),
+                      UVM_MEDIUM)
+            if (cfg.seq_cfg.use_vendor_flash == 0) begin
+              exp.req.prog_full_data &= rd_data;
+            end else begin
+              skip_comp = 1;
+            end
+            info_mem[bank][rcv.mem_info_sel].delete(rcv.mem_addr);
           end
-          info_mem[bank][rcv.mem_info_sel].delete(rcv.mem_addr);
+          `uvm_info(`gfn, $sformatf(
+                    "Updating info_mem bank:%0d, info:%0d, addr:0x%x",
+                    bank, rcv.mem_info_sel, rcv.mem_addr << 3),
+                    UVM_MEDIUM)
         end
         info_mem[bank][rcv.mem_info_sel][rcv.mem_addr] = exp.req.prog_full_data;
       end
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_mem_bkdr_util.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
index 1bd56ed97f96c..d4f00f6db3937 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_mem_bkdr_util.sv
@@ -9,8 +9,10 @@ class flash_mem_bkdr_util extends mem_bkdr_util;
   function new(string name = "", string path, int unsigned depth,
                longint unsigned n_bits, err_detection_e err_detection_scheme,
                int extra_bits_per_subword = 0, int unsigned system_base_addr = 0);
-    super.new(name, path, depth, n_bits, err_detection_scheme, extra_bits_per_subword,
-              system_base_addr);
+    super.new(.name(name), .path(path), .depth(depth), .n_bits(n_bits),
+              .err_detection_scheme(err_detection_scheme),
+              .extra_bits_per_subword(extra_bits_per_subword),
+              .system_base_addr(system_base_addr));
     // Error detection scheme is assumed to be 76_68, otherwise, the overrides below won't work.
     `DV_CHECK_EQ_FATAL(err_detection_scheme, mem_bkdr_util_pkg::EccHamming_76_68)
   endfunction
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_otf_item.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_otf_item.sv
index 7b41ff21401f4..8bdb0fd2f66b3 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_otf_item.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/flash_otf_item.sv
@@ -139,6 +139,7 @@ class flash_otf_item extends uvm_object;
       data = raw_fq[i][FlashDataWidth-1:0];
       if (ecc_en) begin
         data_with_icv = prim_secded_pkg::prim_secded_hamming_72_64_enc(raw_fq[i][63:0]);
+        `uvm_info("icv", $sformatf("ICV:%4b", data_with_icv[67:64]), UVM_DEBUG)
         if (add_icv_err) begin
           `uvm_info("icv_debug", $sformatf("before:%4b after:%4b",
                     data_with_icv[67:64], ~data_with_icv[67:64]), UVM_DEBUG)
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
index f9f0899ede0a0..49e280d53c3d2 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_base_vseq.sv
@@ -69,6 +69,9 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
 
   function void add_address_range(input int bank, input flash_dv_part_e part,
                                   input addr_t first_address, input addr_t last_address);
+    `uvm_info("address_written", $sformatf(
+              "Adding address_range bank:%0d %s: [0x%x : 0x%x]",
+              bank, part.name, first_address, last_address), UVM_MEDIUM)
     part_address_ranges_written[bank][part].push_back('{first: first_address, last: last_address});
   endfunction
 
@@ -92,26 +95,29 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     end
   endfunction
 
-  // This is a binary search for an address in the address ranges. It also returns the index
-  // of the last range examined, which is useful for the caller.
+  // This is a binary search for any overlap of an address range with any in the address ranges.
   local function bit address_in_ranges(input int bank, input flash_dv_part_e part,
-                                       input address_ranges_t ranges, input addr_t addr,
-                                       ref int index);
+                                       input address_ranges_t ranges,
+                                       input address_range_t addr_range);
     int bottom = 0;
     int top = ranges.size() - 1;
     do
       begin
-        index = (top + bottom) / 2;
+        int index = (top + bottom) / 2;
         `uvm_info("address_written", $sformatf(
                   "bot:%0d, index:%0d, top:%0d, [0x%x : 0x%x]", bottom, index, top,
                   ranges[index].first, ranges[index].last), UVM_MEDIUM)
-        if (addr < ranges[index].first) top = index - 1;
-        else if (addr <= ranges[index].last) begin
-           `uvm_info("address_written", $sformatf(
-                     "addr:0x%x found in range [0x%x : 0x%x] for bank:%0d, part %s", addr,
-                     ranges[index].first, ranges[index].last, bank, part.name), UVM_MEDIUM)
+        if (addr_range.last < ranges[index].first) top = index - 1;
+        else if (addr_range.first > ranges[index].last) bottom = index + 1;
+        else begin
+          `DV_CHECK(
+              addr_range.last >= ranges[index].first && addr_range.first <= ranges[index].last)
+          `uvm_info("address_written", $sformatf(
+                    "address range:[0x%x : 0x%x] overlaps [0x%x : 0x%x] for bank:%0d, part %s",
+                    addr_range.first, addr_range.last, ranges[index].first, ranges[index].last,
+                    bank, part.name), UVM_MEDIUM)
           return 1;
-        end else bottom = index + 1;
+        end
       end
      while (top >= bottom);
      return 1'b0;
@@ -125,22 +131,9 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
       input int bank, input flash_dv_part_e part,
       input addr_t start_addr, input addr_t end_addr);
     if (part_address_ranges_written[bank].exists(part)) begin
+      address_range_t range = '{start_addr, end_addr};
       address_ranges_t ranges = part_address_ranges_written[bank][part];
-      int index;
-      bit success = address_in_ranges(bank, part, ranges, start_addr, index);
-      if (success) return 1'b1;
-      else begin
-        `uvm_info("address_written", $sformatf(
-                  "end range [0x%x : 0x%x]", ranges[index].first, ranges[index].last), UVM_MEDIUM)
-        if (ranges[index].first > start_addr) begin
-          if (ranges[index].first <= end_addr) begin
-            `uvm_info("address_written", $sformatf(
-                      "range [0x%x : 0x%x] overlaps [0x%x : 0x%x]", ranges[index].first,
-                      ranges[index].last, start_addr, end_addr), UVM_MEDIUM)
-            return 1'b1;
-          end
-        end
-      end
+      return address_in_ranges(bank, part, ranges, range);
     end
     return 1'b0;
   endfunction
@@ -157,20 +150,17 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
                                              input addr_t addr);
     if (part_address_ranges_written[bank].exists(part)) begin
       address_ranges_t ranges = part_address_ranges_written[bank][part];
-      int index;
-      if (address_in_ranges(bank, part, ranges, addr, index)) begin
+      address_range_t range = '{addr, addr + FlashBankBytesPerWord - 1};
+      if (address_in_ranges(bank, part, ranges, range)) begin
         return 1'b1;
       end
     end
-    if (addr >= 16'h800 && addr < 16'h2000) return 1'b1;
     return address_in_words(bank, part, addr);
   endfunction
 
   // Returns 1 if any address between start_addr and end_addr were written.
   protected function bit address_range_was_written(input int bank, input flash_dv_part_e part,
                                                    input addr_t start_addr, input addr_t end_addr);
-    int index;
-
     `uvm_info(`gfn, $sformatf(
               "Query address_range_written from %x to %x in bank:%0d %0s",
               start_addr, end_addr, bank, part.name),
@@ -179,7 +169,6 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
       return 1'b1;
     end
     `uvm_info("address_written", "Cleared ranges", UVM_MEDIUM)
-    if (start_addr >= 16'h800 && end_addr < 16'h2000) return 1'b1;
     for (addr_t addr = start_addr; addr < end_addr; addr += FlashBankBytesPerWord) begin
       if (address_in_words(bank, part, addr)) begin
         `uvm_info("address_words", $sformatf("addr:0x%x is already written", addr), UVM_MEDIUM)
@@ -342,26 +331,26 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     update_mp_region_cfg_mubifalse(region_cfg);
     data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].en, data,
                                           region_cfg.en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].rd_en, data,
-                                                 region_cfg.read_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].prog_en, data,
-                                                 region_cfg.program_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].erase_en, data,
-                                                 region_cfg.erase_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].scramble_en,
-                                                 data, region_cfg.scramble_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].ecc_en, data,
-                                                 region_cfg.ecc_en);
-    data = data | get_csr_val_with_updated_field(ral.mp_region_cfg[index].he_en, data,
-                                                 region_cfg.he_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].rd_en, data,
+                                          region_cfg.read_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].prog_en, data,
+                                          region_cfg.program_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].erase_en, data,
+                                          region_cfg.erase_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].scramble_en,
+                                          data, region_cfg.scramble_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].ecc_en, data,
+                                          region_cfg.ecc_en);
+    data = get_csr_val_with_updated_field(ral.mp_region_cfg[index].he_en, data,
+                                          region_cfg.he_en);
     csr_wr(.ptr(ral.mp_region_cfg[index]), .value(data));
 
     // reset for base/size register
     data = 0;
     data = get_csr_val_with_updated_field(ral.mp_region[index].base, data,
                                           region_cfg.start_page);
-    data = data | get_csr_val_with_updated_field(ral.mp_region[index].size, data,
-                                                 region_cfg.num_pages);
+    data = get_csr_val_with_updated_field(ral.mp_region[index].size, data,
+                                          region_cfg.num_pages);
     csr_wr(.ptr(ral.mp_region[index]), .value(data));
   endtask : flash_ctrl_mp_region_cfg
 
@@ -383,14 +372,11 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     cfg.default_region_cfg.he_en = he_en;
 
     data = get_csr_val_with_updated_field(ral.default_region.rd_en, data, read_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.prog_en, data, program_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.erase_en, data, erase_en);
-    data = data |
-        get_csr_val_with_updated_field(ral.default_region.scramble_en, data, scramble_en);
-    data = data | get_csr_val_with_updated_field(ral.default_region.ecc_en, data, ecc_en);
-    data = data | get_csr_val_with_updated_field(ral.default_region.he_en, data, he_en);
+    data = get_csr_val_with_updated_field(ral.default_region.prog_en, data, program_en);
+    data = get_csr_val_with_updated_field(ral.default_region.erase_en, data, erase_en);
+    data = get_csr_val_with_updated_field(ral.default_region.scramble_en, data, scramble_en);
+    data = get_csr_val_with_updated_field(ral.default_region.ecc_en, data, ecc_en);
+    data = get_csr_val_with_updated_field(ral.default_region.he_en, data, he_en);
     csr_wr(.ptr(ral.default_region), .value(data));
   endtask : flash_ctrl_default_region_cfg
 
@@ -412,19 +398,20 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     `uvm_info("mp_info_page_cfg", $sformatf("%s: %p", csr_name, page_cfg), UVM_DEBUG)
     csr = ral.get_reg_by_name(csr_name);
     update_mp_info_cfg_mubifalse(page_cfg);
-    data = get_csr_val_with_updated_field(csr.get_field_by_name("en"), data, page_cfg.en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("rd_en"), data, page_cfg.read_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("prog_en"), data, page_cfg.program_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("erase_en"), data, page_cfg.erase_en);
-    data = data | get_csr_val_with_updated_field(csr.get_field_by_name("scramble_en"), data,
-                                                 page_cfg.scramble_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("ecc_en"), data, page_cfg.ecc_en);
-    data = data |
-        get_csr_val_with_updated_field(csr.get_field_by_name("he_en"), data, page_cfg.he_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("en"),
+                                          data, page_cfg.en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("rd_en"),
+                                          data, page_cfg.read_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("prog_en"),
+                                          data, page_cfg.program_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("erase_en"),
+                                          data, page_cfg.erase_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("scramble_en"),
+                                          data, page_cfg.scramble_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("ecc_en"),
+                                          data, page_cfg.ecc_en);
+    data = get_csr_val_with_updated_field(csr.get_field_by_name("he_en"),
+                                          data, page_cfg.he_en);
     csr_wr(.ptr(csr), .value(data));
   endtask : flash_ctrl_mp_info_page_cfg
 
@@ -520,12 +507,12 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     partition_sel = flash_part_e'(|flash_op.partition);
     info_sel = flash_op.partition >> 1;
     data = get_csr_val_with_updated_field(ral.control.start, data, 1'b1);
-    data = data | get_csr_val_with_updated_field(ral.control.op, data, flash_op.op);
-    data = data | get_csr_val_with_updated_field(ral.control.prog_sel, data, flash_op.prog_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.erase_sel, data, flash_op.erase_type);
-    data = data | get_csr_val_with_updated_field(ral.control.partition_sel, data, partition_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.info_sel, data, info_sel);
-    data = data | get_csr_val_with_updated_field(ral.control.num, data, flash_op.num_words - 1);
+    data = get_csr_val_with_updated_field(ral.control.op, data, flash_op.op);
+    data = get_csr_val_with_updated_field(ral.control.prog_sel, data, flash_op.prog_sel);
+    data = get_csr_val_with_updated_field(ral.control.erase_sel, data, flash_op.erase_type);
+    data = get_csr_val_with_updated_field(ral.control.partition_sel, data, partition_sel);
+    data = get_csr_val_with_updated_field(ral.control.info_sel, data, info_sel);
+    data = get_csr_val_with_updated_field(ral.control.num, data, flash_op.num_words - 1);
     csr_wr(.ptr(ral.control), .value(data));
   endtask : flash_ctrl_start_op
 
@@ -1179,7 +1166,6 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
 
     if (cfg.seq_cfg.check_mem_post_tran) begin
       flash_op_copy.otf_addr = flash_op_copy.addr;
-      flash_op_copy.otf_addr[BusAddrByteW-2:OTFHostId] = 'h0;
       cfg.flash_mem_bkdr_read_check(flash_op_copy, exp_data, check_match, scr_en, ecc_en);
     end
   endtask : flash_ctrl_write_extra
@@ -1619,14 +1605,16 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
     uvm_hdl_data_t data;
     flash_otf_item item;
     bit [BankAddrW-1:0] mem_addr;
-    int                 page = 1;
+    int start_page = 1;
+    int number_of_secret_pages = 3;
     `uvm_info(`gfn, $sformatf("Updating secret partition with addr_key:%x, data_key:%x",
               otp_addr_key, otp_data_key), UVM_MEDIUM)
 
-    repeat(3) begin
-      int page_st_addr = page*2048;
+    for (int page = start_page; page < start_page + number_of_secret_pages; ++page) begin
       mubi4_t scramble_en;
       mubi4_t ecc_en;
+      int page_st_addr = page * BytesPerPage;
+      int page_en_addr = page_st_addr + BytesPerPage - 1;
       // Only scr/ecc enable matter; cfg.ovrd_src_dis can be randomized in directed test,
       // but otherwise it has the same default value as HW_INFO_CFG_OVERRIDE.
       if (page != 3) begin
@@ -1638,9 +1626,11 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
         scramble_en = flash_ctrl_pkg::CfgAllowRead.scramble_en;
         ecc_en = flash_ctrl_pkg::CfgAllowRead.ecc_en;
       end
-      `uvm_info(`gfn, $sformatf("info page %0d scr_en:%x, ecc_en:%x", page, scramble_en, ecc_en),
+      `uvm_info(`gfn, $sformatf(
+                "info page %0d [0x%x : 0x%x] scr_en:%x, ecc_en:%x",
+                page, page_st_addr, page_st_addr + BytesPerPage - 1, scramble_en, ecc_en),
                 UVM_MEDIUM)
-      for (int addr = page_st_addr; addr < (page_st_addr + 8*256); addr += 8) begin
+      for (int addr = page_st_addr; addr <= page_en_addr; addr += 8) begin
         `uvm_create_obj(flash_otf_item, item)
         data = cfg.mem_bkdr_util_h[FlashPartInfo][0].read(addr);
         item.dq.push_back(data[31:0]);
@@ -1654,8 +1644,10 @@ class flash_ctrl_base_vseq extends cip_base_vseq #(
         cfg.scb_flash_info[addr] = item.fq[0][31:0];
         cfg.scb_flash_info[addr+4] = item.fq[0][63:32];
       end
-      page++;
     end
+    add_address_range(0, FlashPartInfo, start_page * BytesPerPage,
+                      (start_page + number_of_secret_pages) * BytesPerPage - 1);
+    sort_all_address_ranges();
   endfunction // update_secret_partition
 
    function void update_mp_region_cfg_mubifalse(ref flash_mp_region_cfg_t cfg);
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv
new file mode 100644
index 0000000000000..fb48dfcb2e36f
--- /dev/null
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_basic_rw_vseq.sv
@@ -0,0 +1,164 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// flash_ctrl_basic_rw
+
+// This test does the following in a loop:
+// 0. randomize scramble_en, ecc_en, data, address
+// 1. initialize flash with all ones
+// 2. program flash with random data
+// 3. read back data through host interface
+// 4. read back data through controller interface
+
+class flash_ctrl_basic_rw_vseq extends flash_ctrl_base_vseq;
+  `uvm_object_utils(flash_ctrl_basic_rw_vseq)
+
+  `uvm_object_new
+
+  // Class Members
+  rand data_q_t flash_op_data;
+  rand flash_op_t flash_op;
+  rand uint bank;
+  rand mubi4_t instr_type;
+  rand uint num_trans;
+  rand mubi4_t scramble_en, ecc_en;
+
+  constraint bank_c {bank inside {[0 : flash_ctrl_pkg::NumBanks - 1]};}
+  constraint scramble_c {scramble_en inside {MuBi4True, MuBi4False};}
+  constraint ecc_c {ecc_en inside {MuBi4True, MuBi4False};}
+
+  constraint num_trans_c {num_trans < 100;}
+
+  // Constraint for controller address to be in relevant range for the selected partition.
+  constraint addr_c {
+    solve bank before flash_op;
+    flash_op.addr inside {[BytesPerBank * bank : BytesPerBank * (bank + 1)]};
+    flash_op.addr[2:0] == '0;
+  }
+
+  constraint flash_op_c {
+    // Bank Erase is only supported for Data & 1st Info Partitions
+    flash_op.partition == FlashPartData;
+
+    flash_op.op inside {flash_ctrl_pkg::FlashOpProgram,
+                        flash_ctrl_pkg::FlashOpRead};
+
+    flash_op.num_words >= 10;
+    flash_op.num_words <= (FlashNumBusWords - flash_op.addr[TL_AW-1:TL_SZW]);
+    flash_op.num_words <= 256;
+    flash_op.num_words < (FlashPgmRes - flash_op.addr[TL_SZW+:FlashPgmResWidth]);
+  }
+
+  // Flash ctrl operation data queue - used for programming or reading the flash.
+  constraint flash_op_data_c {
+    solve flash_op before flash_op_data;
+
+    flash_op_data.size() == flash_op.num_words;
+  }
+
+  // Body
+  virtual task body();
+
+    // Local Variables
+    addr_t read_addr;
+    data_t rdata;
+    bit comp, exp_err;
+    data_q_t flash_op_rdata;
+
+    // Scoreboard knob for Blocking Read Data Checking
+    // Checks performed in this test
+    cfg.block_host_rd = 0;
+
+    // enable code execution
+    csr_wr(.ptr(ral.exec), .value(CODE_EXEC_KEY));
+
+    // Enable All Regions
+
+    // disable randomization for num_trans (loop variable)
+    num_trans.rand_mode(0);
+
+    for (int k = 0; k < num_trans; k++) begin
+
+      // re-randomize all variables
+      randomize();
+
+      // 0. initialize regions
+      init_flash_regions(scramble_en, ecc_en);
+
+      // 1. init flash memory to all ones
+      cfg.flash_mem_bkdr_init(FlashPartData, FlashMemInitSet);
+
+      // 2. program random data to flash
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        `uvm_info(`gfn, $sformatf("DATA %p", flash_op_data[i]), UVM_HIGH)
+      end
+      flash_op.op = flash_ctrl_pkg::FlashOpProgram;
+      flash_ctrl_base_vseq::flash_ctrl_write_extra(flash_op, flash_op_data, 1,
+                                                   mubi4_test_true_strict(scramble_en),
+                                                   mubi4_test_true_strict(ecc_en));
+
+      exp_err = 0;
+
+      // 3. Read from memory interface (direct read)
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        read_addr = flash_op.addr + 4 * i;
+        instr_type = get_rand_mubi4_val(.t_weight(2),
+                                        .f_weight(2),
+                                        .other_weight(0));
+
+
+        do_direct_read(.addr(read_addr), .mask('1), .blocking(cfg.block_host_rd), .check_rdata(1),
+                       .instr_type(instr_type), .rdata(rdata), .exp_rdata(flash_op_data[i]),
+                       .exp_err_rsp(exp_err), .completed(comp));
+        cfg.clk_rst_vif.wait_clks($urandom_range(1, 10));
+      end
+      csr_utils_pkg::wait_no_outstanding_access();
+
+      // 4. Read from controller interface
+      flash_op.op = flash_ctrl_pkg::FlashOpRead;
+      flash_ctrl_read_extra(flash_op, flash_op_rdata);
+      for (int i = 0; i < flash_op.num_words; i++) begin
+        if (flash_op_data[i] !== flash_op_rdata[i])
+          `uvm_error("rd-err", $sformatf("Read-back error: exp: %x is: %x", flash_op_data[i],
+                    flash_op_rdata[i]))
+      csr_utils_pkg::wait_no_outstanding_access();
+      end
+    end
+
+  endtask : body
+
+  // Task to initialize the Flash Access
+  virtual task init_flash_regions(mubi4_t scramble_en, mubi4_t ecc_en);
+
+    // Memory Protection Regions
+    flash_mp_region_cfg_t mp_regions[flash_ctrl_pkg::MpRegions];
+
+    for (int i = 0; i<flash_ctrl_pkg::MpRegions; i++) begin
+      mp_regions[i].en = MuBi4False;
+      mp_regions[i].read_en = MuBi4True;
+      mp_regions[i].program_en = MuBi4True;
+      mp_regions[i].erase_en = MuBi4True;
+      mp_regions[i].scramble_en = scramble_en;
+      mp_regions[i].ecc_en = ecc_en;
+      mp_regions[i].he_en = MuBi4False;
+      mp_regions[i].start_page = 0;
+      mp_regions[i].num_pages = FlashNumPages;
+    end
+    mp_regions[0].en = MuBi4True;
+
+    // Initialize MP Regions
+    foreach (mp_regions[k]) begin
+      flash_ctrl_mp_region_cfg(k, mp_regions[k]);
+      `uvm_info(`gfn, $sformatf("MP regions values %p", mp_regions[k]), UVM_HIGH)
+    end
+
+    // Initialize Default Regions
+    flash_ctrl_default_region_cfg(
+        .read_en(MuBi4True), .program_en(MuBi4True),
+        .erase_en(MuBi4True), .scramble_en(scramble_en),
+        .ecc_en(ecc_en), .he_en(MuBi4False));
+
+  endtask : init_flash_regions
+
+endclass : flash_ctrl_basic_rw_vseq
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
index a8d78e0dd120f..4650487181608 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_invalid_op_vseq.sv
@@ -43,13 +43,6 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
   }
 
   constraint flash_op_c {
-    // Add read only constraint for closed source env
-    if (cfg.seq_cfg.op_readonly_on_info_partition) {
-      flash_op.partition == FlashPartInfo -> flash_op.op == flash_ctrl_pkg::FlashOpRead;
-    }
-    if (cfg.seq_cfg.op_readonly_on_info1_partition) {
-      flash_op.partition == FlashPartInfo1 -> flash_op.op == flash_ctrl_pkg::FlashOpRead;
-    }
     flash_op.addr inside {[0 : FlashSizeBytes - 1]};
     // 8Byte (2 words) aligned.
     // With scramble enabled, odd size of word access (or address) will cause
@@ -60,6 +53,14 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
     flash_op.num_words <= cfg.seq_cfg.op_max_words;
     flash_op.num_words < FlashPgmRes - flash_op.addr[TL_SZW+:FlashPgmResWidth];
     flash_op.num_words % 2 == 0;
+
+    // This added because in some extending env the info2 has special use.
+    if (cfg.seq_cfg.exclude_info2) {
+      flash_op.partition dist { FlashPartData := 1, [FlashPartInfo:FlashPartInfo1] :/ 1};
+    } else {
+      flash_op.partition dist { FlashPartData := 1, [FlashPartInfo:FlashPartInfo2] :/ 1};
+    }
+
   }
 
   // Memory protection regions settings.
@@ -161,6 +162,7 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
       flash_ctrl_mp_info_page_cfg(i, j, k, mp_info_pages[i][j][k]);
       `uvm_info(`gfn, $sformatf("MP INFO regions values %p", mp_info_pages[i][j][k]), UVM_HIGH)
     end
+
     //Enable Bank erase
     bank_erase_en = {NumBanks{1'b1}};
     flash_ctrl_bank_erase_cfg(.bank_erase_en(bank_erase_en));
@@ -168,32 +170,53 @@ class flash_ctrl_invalid_op_vseq extends flash_ctrl_base_vseq;
     flash_op_inv = flash_op;
     flash_op_rd  = flash_op;
     flash_op_er  = flash_op;
-    cfg.flash_mem_bkdr_write(.flash_op(flash_op), .scheme(FlashMemInitSet));
-    flash_ctrl_start_op(flash_op);
-    flash_ctrl_write(flash_op_data, poll_fifo_status);
-    wait_flash_op_done(.clear_op_status(0), .timeout_ns(cfg.seq_cfg.prog_timeout_ns));
-    // Add guard time between previous alert detection complete and set the next expected alert
-    cfg.clk_rst_vif.wait_clks(100);
-
-    expect_alert          = 1;
-    cfg.scb_h.expected_alert["recov_err"].expected = 1;
-    cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
-    flash_op_inv.op       = FlashOpInvalid;
-    flash_ctrl_start_op(flash_op_inv);
-    wait_flash_op_done();
-
-    ral.err_code.op_err.predict(expect_alert);
-    check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
-    cfg.scb_h.expected_alert["recov_err"].expected = 0;
-
-    flash_op_rd.op = FlashOpRead;
-    flash_op_data = {};
-    flash_ctrl_start_op(flash_op_rd);
-    flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
-    wait_flash_op_done();
-    flash_op_er.op = FlashOpErase;
-    flash_ctrl_start_op(flash_op_er);
-    wait_flash_op_done(.timeout_ns(cfg.seq_cfg.erase_timeout_ns));
+    // When testing RO partitions, skip the program and erase parts.
+    if ((cfg.seq_cfg.op_readonly_on_info_partition && flash_op.partition == FlashPartInfo) ||
+        (cfg.seq_cfg.op_readonly_on_info1_partition && flash_op.partition == FlashPartInfo1)) begin
+      expect_alert          = 1;
+      cfg.scb_h.expected_alert["recov_err"].expected = 1;
+      cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
+      flash_op_inv.op       = FlashOpInvalid;
+      flash_ctrl_start_op(flash_op_inv);
+      wait_flash_op_done();
+
+      ral.err_code.op_err.predict(expect_alert);
+      check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
+      cfg.scb_h.expected_alert["recov_err"].expected = 0;
+
+      flash_op_rd.op = FlashOpRead;
+      flash_op_data = {};
+      flash_ctrl_start_op(flash_op_rd);
+      flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
+      wait_flash_op_done();
+    end else begin
+      cfg.flash_mem_bkdr_write(.flash_op(flash_op), .scheme(FlashMemInitSet));
+      flash_ctrl_start_op(flash_op);
+      flash_ctrl_write(flash_op_data, poll_fifo_status);
+      wait_flash_op_done(.clear_op_status(0), .timeout_ns(cfg.seq_cfg.prog_timeout_ns));
+      // Add guard time between previous alert detection complete and set the next expected alert
+      cfg.clk_rst_vif.wait_clks(100);
+
+      expect_alert          = 1;
+      cfg.scb_h.expected_alert["recov_err"].expected = 1;
+      cfg.scb_h.expected_alert["recov_err"].max_delay = 1000;
+      flash_op_inv.op       = FlashOpInvalid;
+      flash_ctrl_start_op(flash_op_inv);
+      wait_flash_op_done();
+
+      ral.err_code.op_err.predict(expect_alert);
+      check_exp_alert_status(expect_alert, "op_err", flash_op_inv, flash_op_data);
+      cfg.scb_h.expected_alert["recov_err"].expected = 0;
+
+      flash_op_rd.op = FlashOpRead;
+      flash_op_data = {};
+      flash_ctrl_start_op(flash_op_rd);
+      flash_ctrl_read(flash_op_rd.num_words, flash_op_data, poll_fifo_status);
+      wait_flash_op_done();
+      flash_op_er.op = FlashOpErase;
+      flash_ctrl_start_op(flash_op_er);
+      wait_flash_op_done(.timeout_ns(cfg.seq_cfg.erase_timeout_ns));
+    end
 
     flash_op_inv.op = FlashOpInvalid;
     cfg.scb_h.expected_alert["recov_err"].expected = 1;
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
index 60daf60a3c3c5..13ff4e2fb98d4 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_otf_base_vseq.sv
@@ -709,8 +709,8 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
 
       cfg.otf_read_entry.insert(rd_entry, flash_op);
       if (derr_is_set) begin
-        `uvm_info("read_flash", $sformatf("assert_derr 0x%x",
-                                          {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+        `uvm_info("read_flash", $sformatf("assert_derr 0x%x", align_to_flash_word(flash_op.addr)),
+                  UVM_MEDIUM)
         global_derr_is_set = 1;
         if (cfg.scb_h.do_alert_check == 1) begin
           cfg.scb_h.expected_alert["fatal_err"].expected = 1;
@@ -867,11 +867,13 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
           if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
             cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
           end
-          derr_is_set = cfg.address_has_derr({flash_op.addr[TL_AW-1:3],3'h0}, flash_op.partition);
-          ierr_is_set = cfg.address_has_ierr({flash_op.addr[TL_AW-1:3],3'h0}, flash_op.partition);
+          derr_is_set = cfg.address_has_derr(align_to_flash_word(flash_op.addr),
+                                             flash_op.partition);
+          ierr_is_set = cfg.address_has_ierr(align_to_flash_word(flash_op.addr),
+                                             flash_op.partition);
           if (derr_is_set) begin
             `uvm_info("direct_read", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
-            cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
+            cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
             global_derr_is_set = 1;
           end
           if (ierr_is_set) begin
@@ -881,18 +883,21 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
           `uvm_info("direct_read", $sformatf(
                     "ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
                     cfg.ierr_created[ReadTaskHost], derr_is_set,
-                    cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0})),
+                    cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr))),
                     UVM_MEDIUM)
           cfg.ierr_created[ReadTaskHost] = 0;
         end
-        if (cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0}) | derr_is_set) derr = 1;
+        if (cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr)) ||
+            derr_is_set) begin
+          derr = 1;
+        end
       end
       cfg.otf_read_entry.insert(rd_entry, flash_op);
       `uvm_info("direct_read", $sformatf({"num_i:%0d bank:%0d exec: page:%0d(%0d)",
                                           " 0x%x derr:%0d in_err:%0d"},
                                          i, bank, tl_addr, page, (page % 256),
                                          derr, in_err), UVM_MEDIUM)
-      if (in_err) cfg.scb_h.in_error_addr[{tl_addr[31:3],3'h0}] = 1;
+      if (in_err) cfg.scb_h.in_error_addr[align_to_flash_word(tl_addr)] = 1;
 
       derr |= in_err;
 
@@ -999,17 +1004,17 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
         drop |= validate_flash_op(flash_op, my_region);
         exp_item.ctrl_rd_region_q.push_back(my_region);
 
-         rd_entry.addr = flash_op.otf_addr;
-         // Address has to be 8byte aligned
-         rd_entry.addr[2:0] = 'h0;
-         rd_entry.part = flash_op.partition;
-         if (drop == 0 &&
-             my_region.ecc_en == MuBi4True &&
-             cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
-            `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                                  {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
-            derr_is_set |= 1;
-         end
+        rd_entry.addr = flash_op.otf_addr;
+        // Address has to be 8byte aligned
+        rd_entry.addr[2:0] = 'h0;
+        rd_entry.part = flash_op.partition;
+        if (drop == 0 &&
+            my_region.ecc_en == MuBi4True &&
+            cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
+          `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
+                                                 align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
+          derr_is_set |= 1;
+        end
 
         flash_op.addr += 8;
         flash_op.otf_addr += 8;
@@ -1034,7 +1039,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
             my_region.ecc_en == MuBi4True &&
             cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
           `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                                {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+                                                align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
           derr_is_set |= 1;
         end
       end
@@ -1085,7 +1090,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
 
       if (derr_is_set) begin
         `uvm_info("readback_flash", $sformatf("read corrupted entry 0x%x",
-                                          {flash_op.addr[31:3], 3'h0}), UVM_MEDIUM)
+                                          align_to_flash_word(flash_op.addr)), UVM_MEDIUM)
         global_derr_is_set = 1;
         exp_item.derr = 1;
 
@@ -1139,8 +1144,8 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
     end // for (int i = 0; i < num; i++)
   endtask
 
-   task direct_readback(bit [OTFBankId-1:0] addr, int bank, int num);
-     bit[TL_AW-1:0] tl_addr, st_addr, end_addr;
+  task direct_readback(bit [OTFBankId-1:0] addr, int bank, int num);
+    bit[TL_AW-1:0] tl_addr, st_addr, end_addr;
     data_4s_t rdata;
     flash_otf_item exp_item;
     int page;
@@ -1161,7 +1166,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
     // Capture for the print in sb.
     st_addr = tl_addr;
 
-     for (int i = 0; i < num ; i++) begin
+    for (int i = 0; i < num ; i++) begin
       drop = 0;
       derr = 0;
 
@@ -1183,48 +1188,49 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
       rd_entry.addr[2:0] = 'h0;
       rd_entry.part = FlashPartData;
 
-        if (cfg.ecc_mode > FlashEccEnabled) begin
-          if (exp_item.region.ecc_en == MuBi4True) begin
-            flash_op.addr = tl_addr;
-            // host can only access data partitions.
-            flash_op.partition = FlashPartData;
-            flash_op.num_words = 1;
-            if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
-              cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
-              derr_is_set = cfg.address_has_derr(flash_op.addr, flash_op.partition);
-            end
-            if (derr_is_set) begin
-              `uvm_info("direct_readback", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
-              cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
-              global_derr_is_set = 1;
-            end
-            if (cfg.derr_once == 0) cfg.derr_created[ReadTaskHost] = 0;
-            `uvm_info("direct_readback",
-                      $sformatf("ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
-                                cfg.ierr_created[ReadTaskHost], derr_is_set,
-                                cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0})),
-                      UVM_MEDIUM)
-            cfg.ierr_created[ReadTaskHost] = 0;
+      if (cfg.ecc_mode > FlashEccEnabled) begin
+        if (exp_item.region.ecc_en == MuBi4True) begin
+          flash_op.addr = tl_addr;
+          // host can only access data partitions.
+          flash_op.partition = FlashPartData;
+          flash_op.num_words = 1;
+          if (cfg.ecc_mode == FlashSerrTestMode || tl_addr[2] == 0) begin
+            cfg.add_bit_err(flash_op, ReadTaskHost, exp_item);
+            derr_is_set = cfg.address_has_derr(flash_op.addr, flash_op.partition);
           end
-          if (cfg.scb_h.ecc_error_addr.exists({tl_addr[31:3],3'h0}) | derr_is_set) begin
-            derr = 1;
+          if (derr_is_set) begin
+            `uvm_info("direct_readback", $sformatf("assert_derr 0x%x", tl_addr), UVM_MEDIUM)
+            cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
+            global_derr_is_set = 1;
+          end
+          if (cfg.derr_once == 0) cfg.derr_created[ReadTaskHost] = 0;
+          `uvm_info("direct_readback",
+                    $sformatf("ierr_created[ReadTaskHost]:%0d  derr_is_set:%0d exists:%0d",
+                              cfg.ierr_created[ReadTaskHost], derr_is_set,
+                              cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr))),
+                    UVM_MEDIUM)
+          cfg.ierr_created[ReadTaskHost] = 0;
+        end
+        if (cfg.scb_h.ecc_error_addr.exists(align_to_flash_word(tl_addr)) |
+            derr_is_set) begin
+          derr = 1;
+        end
+      end // if (cfg.ecc_mode > FlashEccEnabled)
+
+      cfg.otf_read_entry.insert(rd_entry, flash_op);
+      if (my_region.ecc_en == MuBi4True && cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
+        bit local_derr = 0;
+        check_mem_intg(exp_item, bank, local_derr);
+        if (local_derr) begin
+          exp_item.derr = 1;
+          derr = 1;
+          cfg.scb_h.ecc_error_addr[align_to_flash_word(tl_addr)] = 1;
+          if (derr & cfg.scb_h.do_alert_check) begin
+            cfg.scb_h.expected_alert["fatal_err"].expected = 1;
+            cfg.scb_h.expected_alert["fatal_err"].max_delay = 2000;
+            cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
           end
-        end // if (cfg.ecc_mode > FlashEccEnabled)
-
-       cfg.otf_read_entry.insert(rd_entry, flash_op);
-       if (my_region.ecc_en == MuBi4True && cfg.otf_scb_h.corrupt_entry.exists(rd_entry) == 1) begin
-         bit local_derr = 0;
-         check_mem_intg(exp_item, bank, local_derr);
-         if (local_derr) begin
-           exp_item.derr = 1;
-           derr = 1;
-           cfg.scb_h.ecc_error_addr[{tl_addr[31:3],3'h0}] = 1;
-           if (derr & cfg.scb_h.do_alert_check) begin
-             cfg.scb_h.expected_alert["fatal_err"].expected = 1;
-             cfg.scb_h.expected_alert["fatal_err"].max_delay = 2000;
-             cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
-           end
-         end
+        end
       end
 
       `uvm_info("direct_readback", $sformatf("idx:%0d: bank:%0d exec: 0x%x page:%0d derr:%0d",
@@ -1250,8 +1256,6 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
       cfg.otf_host_rd_rcvd++;
       tl_addr += 4;
      end // for (int i = 0; i < num ; i++)
-
-
    endtask
 
    task erase_flash(flash_op_t flash_op, int bank, bit in_err = 0);
@@ -1304,16 +1308,13 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
         if (part == FlashPartData) begin
           // Allocate a quarter of each bank to each read target.
           int byte_size = BytesPerBank / 4;
-          `DV_CHECK_EQ(byte_size, 64 * 256 * 8)
           for (flash_tgt_prefix_e j = TgtRd; j <= TgtDr; j = j.next()) begin : targets
             // 8byte aligned
             addr_t st_addr, ed_addr;
             st_addr = 'h0;
             st_addr[18:17] = cfg.tgt_pre[part][j];
             ed_addr = st_addr + byte_size - 1;
-            for (addr_t addr = st_addr; addr <= ed_addr; addr += 8) begin
-              cfg.update_otf_mem_read_zone(part, i, addr);
-            end
+            cfg.update_otf_mem_read_zone(part, i, st_addr, ed_addr);
             add_address_range(i, part, st_addr, ed_addr);
             `uvm_info("flash_otf_init",
                       $sformatf("part:%s pre:%s bank:%0d st:%x ed:%x",
@@ -1333,9 +1334,7 @@ class flash_ctrl_otf_base_vseq extends flash_ctrl_base_vseq;
             for (int k = 0; k < InfoTypeSize[part>>1]; k++) begin : pages
               st_addr[DVPageMSB:DVPageLSB] = k; // page
               ed_addr = st_addr + byte_size - 1;
-              for (addr_t addr = st_addr; addr <= ed_addr; addr += 8) begin
-                cfg.update_otf_mem_read_zone(part, i, addr);
-              end
+              cfg.update_otf_mem_read_zone(part, i, st_addr, ed_addr);
               add_address_range(i, part, st_addr, ed_addr);
               `uvm_info("flash_otf_init",
                         $sformatf("part:%s pre:%s bank:%0d page:%0d st:%x ed:%x",
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
index a24e2df39b3a9..c79001619fa45 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_phy_ack_consistency_vseq.sv
@@ -21,7 +21,7 @@ class flash_ctrl_phy_ack_consistency_vseq extends flash_ctrl_phy_host_grant_err_
     cfg.scb_h.skip_alert_chk["recov_err"] = 1;
 
     cfg.scb_h.expected_alert["fatal_err"].expected = 1;
-    cfg.scb_h.expected_alert["fatal_err"].max_delay = 20000;
+    cfg.scb_h.expected_alert["fatal_err"].max_delay = 2_000_000;
     cfg.scb_h.exp_alert_contd["fatal_err"] = 10000;
     $assertoff(0, "tb.dut.u_eflash.gen_flash_cores[0].u_host_rsp_fifo.gen_normal_fifo.u_fifo_cnt");
 
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
index 81e163a107ee6..a8393c8609f68 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_read_word_sweep_vseq.sv
@@ -17,47 +17,53 @@ class flash_ctrl_read_word_sweep_vseq extends flash_ctrl_otf_base_vseq;
   // It begs a better way to handle this, like just stopping the loop below.
   constraint partition_c {rand_op.partition == FlashPartData;}
 
+  localparam int InitializedMemBytes = 1024;
+
+  local function void initialize_memory(flash_dv_part_e partition, int bank,
+                                        otf_addr_t start_addr, otf_addr_t end_addr);
+    `uvm_info("read_word_sweep", $sformatf(
+              "Initializing bank:%0d %s from addr:0x%x to:0x%x",
+              bank, partition.name, start_addr, end_addr),
+              UVM_MEDIUM)
+    cfg.update_otf_mem_read_zone(partition, bank, start_addr, end_addr);
+  endfunction
+
   virtual task body();
     flash_op_t ctrl;
     addr_t start_addr, max_addr;
+    addr_t addr;
 
     int num, bank;
     int mywd;
 
     `DV_CHECK_RANDOMIZE_FATAL(this)
 
+    bank = rand_op.addr[OTFBankId];
+    start_addr = rand_op.addr;
+    max_addr = start_addr + InitializedMemBytes - 1;
+
     // It may be better to initialize the data right before each individual read.
-    begin
-      addr_t addr;
-      addr = rand_op.addr;
-      addr[2] = 1'b0;
-      `uvm_info("read_word_sweep", $sformatf(
-                "Initializing data from addr:0x%x to:0x%x", addr, addr + 256 * 4 - 1),
-                UVM_MEDIUM)
-       for (int w = 0; w < 256; w += 2) begin
-         cfg.update_otf_mem_read_zone(rand_op.partition, rand_op.addr[OTFBankId], addr);
-         addr += 8;
-       end
-    end
+    initialize_memory(rand_op.partition, bank, start_addr, max_addr);
 
     ctrl = rand_op;
     num = 1;
     mywd = 1;
-    start_addr = rand_op.addr;
-    max_addr = start_addr;
+    addr = start_addr;
     repeat(20) begin
-      addr_t end_addr = ctrl.addr + num * mywd - 1;
-      if (end_addr > max_addr) max_addr = end_addr;
+      addr_t end_addr = addr + num * mywd * 4 - 1;
+      // Don't read uninitialized memory to avoid trouble.
+      if (end_addr > max_addr) break;
+      ctrl.addr = addr;
+      ctrl.otf_addr = addr;
       print_flash_op(ctrl, UVM_MEDIUM);
       `uvm_info("read_word_sweep", $sformatf(
                 "Reading from addr:0x%x, otf_addr:0x%x, num:%0d, wd:%0d",
                 ctrl.addr, ctrl.otf_addr, num, mywd),
                 UVM_MEDIUM)
       read_flash(ctrl, bank, num, mywd);
+      addr += num * mywd * 4;
       mywd = (mywd % 16) + 1;
     end
-    `uvm_info(`gfn, $sformatf("Total test address span: min 0x%x, max 0x%x", start_addr, max_addr),
-              UVM_MEDIUM)
   endtask
 
 endclass : flash_ctrl_read_word_sweep_vseq
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
index 5debb869aeaed..7acd29c211a74 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_rw_evict_vseq.sv
@@ -45,12 +45,13 @@ class flash_ctrl_rw_evict_vseq extends flash_ctrl_legacy_base_vseq;
           `DV_CHECK(try_create_prog_op(ctrl, bank, num), "Could not create a prog flash op")
           ctrl.num_words = fractions;
           if (evict_start && addr_q.size >= TargetAddrQSize) begin
+            string entries = $sformatf("%p", addr_q);
             addr_q.shuffle();
             entry = addr_q.pop_front();
             ctrl.addr = entry.addr;
             ctrl.otf_addr = entry.addr;
             `uvm_info(`gfn, $sformatf(
-                      "The address to evict is 0x%x, chosen from %p", entry.addr, addr_q),
+                      "The address to evict is 0x%x, chosen from %s", entry.addr, entries),
                       UVM_MEDIUM)
             ctrl.partition = entry.part;
             init_ctrl = ctrl;
@@ -120,6 +121,9 @@ class flash_ctrl_rw_evict_vseq extends flash_ctrl_legacy_base_vseq;
 
   // We evict two bus words (one flash word).
   virtual task send_evict(flash_op_t ctrl, int bank);
+    `uvm_info(`gfn, $sformatf(
+              "Sending eviction write bank:%0d %s addr:0x%x",
+              bank, ctrl.partition.name, ctrl.addr), UVM_MEDIUM)
     prog_flash(ctrl, bank, /*num=*/1, /*wd=*/2);
   endtask : send_evict
 
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
index 39e506743fa11..37d29f0f87939 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_vseq_list.sv
@@ -65,3 +65,4 @@
 `include "flash_ctrl_hw_read_seed_err_vseq.sv"
 `include "flash_ctrl_hw_prog_rma_wipe_err_vseq.sv"
 `include "flash_ctrl_rd_ooo_vseq.sv"
+`include "flash_ctrl_basic_rw_vseq.sv"
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
index 74320381dad2b..f8bf49b88d905 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/env/seq_lib/flash_ctrl_write_word_sweep_vseq.sv
@@ -14,14 +14,20 @@ class flash_ctrl_write_word_sweep_vseq extends flash_ctrl_otf_base_vseq;
     flash_op_t ctrl;
     int num, bank;
     int mywd;
+    addr_t addr;
 
     // Don't select a partition defined as read-only
     cfg.seq_cfg.avoid_ro_partitions = 1'b1;
     `DV_CHECK(try_create_prog_op(ctrl, bank, num), "Could not create a prog flash op")
+    num = 1;
     mywd = fractions;
     `DV_CHECK_EQ(mywd, 2)
+    addr = ctrl.addr;
     repeat(10) begin
+      ctrl.addr = addr;
+      ctrl.otf_addr = addr;
       prog_flash(ctrl, bank, num, mywd);
+      addr += num * mywd * 4;
       mywd = (mywd % 16) + 2;
     end
   endtask
diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
index cd24fdc18b702..f27d0374a0f32 100644
--- a/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
+++ b/hw/top_earlgrey/ip_autogen/flash_ctrl/dv/flash_ctrl_base_sim_cfg.hjson
@@ -348,7 +348,7 @@
       name: flash_ctrl_rw_evict_all_en
       uvm_test_seq: flash_ctrl_rw_evict_vseq
       run_opts: ["+scb_otf_en=1", "+ecc_mode=1", "+en_always_read=1",
-                 "+en_always_prog=1", "en_rnd_data=0"]
+                 "+en_always_prog=1", "+en_rnd_data=0"]
       reseed: 40
     }
     {
@@ -477,6 +477,11 @@
                  "+otf_num_hr=100", "+en_always_read=1"]
       reseed: 3
     }
+    {
+      name: flash_ctrl_basic_rw
+      uvm_test_seq: flash_ctrl_basic_rw_vseq
+      reseed: 3
+    }
  ]
 
   // List of regressions.
diff --git a/hw/top_earlgrey/ip_autogen/pwrmgr/data/pwrmgr.hjson b/hw/top_earlgrey/ip_autogen/pwrmgr/data/pwrmgr.hjson
index 22e8608983392..e94a3d900409c 100644
--- a/hw/top_earlgrey/ip_autogen/pwrmgr/data/pwrmgr.hjson
+++ b/hw/top_earlgrey/ip_autogen/pwrmgr/data/pwrmgr.hjson
@@ -29,7 +29,7 @@
     {
       version:            "1.0.1",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
diff --git a/hw/top_earlgrey/ip_autogen/pwrmgr/doc/checklist.md b/hw/top_earlgrey/ip_autogen/pwrmgr/doc/checklist.md
index 1fe8d2a7ae2d7..fcdabc29bbd02 100644
--- a/hw/top_earlgrey/ip_autogen/pwrmgr/doc/checklist.md
+++ b/hw/top_earlgrey/ip_autogen/pwrmgr/doc/checklist.md
@@ -95,17 +95,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        |
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | @matutem, @vogelpi, @adk
+Review        | Signoff date            | Done        | 2024-08-06
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/top_earlgrey/ip_autogen/rstmgr/data/rstmgr.hjson b/hw/top_earlgrey/ip_autogen/rstmgr/data/rstmgr.hjson
index ab19db733a0c6..fa8db466c94f0 100644
--- a/hw/top_earlgrey/ip_autogen/rstmgr/data/rstmgr.hjson
+++ b/hw/top_earlgrey/ip_autogen/rstmgr/data/rstmgr.hjson
@@ -27,7 +27,7 @@
     {
       version:            "1.0.0",
       life_stage:         "L1",
-      design_stage:       "D2S",
+      design_stage:       "D3",
       verification_stage: "V2S",
       dif_stage:          "S2",
     }
diff --git a/hw/top_earlgrey/ip_autogen/rstmgr/doc/checklist.md b/hw/top_earlgrey/ip_autogen/rstmgr/doc/checklist.md
index 44a4205802bae..1e01155675d9d 100644
--- a/hw/top_earlgrey/ip_autogen/rstmgr/doc/checklist.md
+++ b/hw/top_earlgrey/ip_autogen/rstmgr/doc/checklist.md
@@ -95,17 +95,17 @@ Security      | [SEC_CM_COUNCIL_REVIEWED][]  | Done        |
 
  Type         | Item                    | Resolution  | Note/Collaterals
 --------------|-------------------------|-------------|------------------
-Documentation | [NEW_FEATURES_D3][]     | Not Started |
-RTL           | [TODO_COMPLETE][]       | Not Started |
-Code Quality  | [LINT_COMPLETE][]       | Not Started |
-Code Quality  | [CDC_COMPLETE][]        | Not Started |
-Code Quality  | [RDC_COMPLETE][]        | Not Started |
-Review        | [REVIEW_RTL][]          | Not Started |
-Review        | [REVIEW_DELETED_FF][]   | Not Started |
-Review        | [REVIEW_SW_CHANGE][]    | Not Started |
-Review        | [REVIEW_SW_ERRATA][]    | Not Started |
-Review        | Reviewer(s)             | Not Started |
-Review        | Signoff date            | Not Started |
+Documentation | [NEW_FEATURES_D3][]     | Done        |
+RTL           | [TODO_COMPLETE][]       | Done        |
+Code Quality  | [LINT_COMPLETE][]       | Done        | With waivers approved by TC on 2024-08-08
+Code Quality  | [CDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Code Quality  | [RDC_COMPLETE][]        | Waived      | No block-level flow available - waived to top-level signoff.
+Review        | [REVIEW_RTL][]          | Done        |
+Review        | [REVIEW_DELETED_FF][]   | Done        |
+Review        | [REVIEW_SW_CHANGE][]    | Done        |
+Review        | [REVIEW_SW_ERRATA][]    | Done        |
+Review        | Reviewer(s)             | Done        | matutem@, vogelpi@, adk@
+Review        | Signoff date            | Done        | 2024-08-08
 
 [NEW_FEATURES_D3]:      ../../../../../doc/project_governance/checklist/README.md#new_features_d3
 [TODO_COMPLETE]:        ../../../../../doc/project_governance/checklist/README.md#todo_complete
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
index 2cac97e53df2a..bdc806ad2dd7f 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
@@ -1086,9 +1086,9 @@ module chip_earlgrey_cw310 #(
     .KeymgrKmacEnMasking(0),
     .SecKmacCmdDelay(0),
     .SecKmacIdleAcceptSwMsg(1'b0),
+    .RvCoreIbexSecureIbex(0),
     .RomCtrlBootRomInitFile(BootRomInitFile),
     .RvCoreIbexRegFile(ibex_pkg::RegFileFPGA),
-    .RvCoreIbexSecureIbex(0),
     .SramCtrlMainInstrExec(1),
     .PinmuxAonTargetCfg(PinmuxTargetCfg)
   ) top_earlgrey (
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw340.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw340.sv
index fc1d7f090ed3c..16725fde06bbb 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw340.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw340.sv
@@ -1070,9 +1070,9 @@ module chip_earlgrey_cw340 #(
     .KmacEnMasking(1),
     .KmacSwKeyMasked(1),
     .KeymgrKmacEnMasking(1),
+    .RvCoreIbexSecureIbex(1),
     .RomCtrlBootRomInitFile(BootRomInitFile),
     .RvCoreIbexRegFile(ibex_pkg::RegFileFPGA),
-    .RvCoreIbexSecureIbex(0),
     .SramCtrlMainInstrExec(1),
     .PinmuxAonTargetCfg(PinmuxTargetCfg)
   ) top_earlgrey (
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index 7df0f3f9f0d98..7bbfb7875374c 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -59,6 +59,7 @@ module top_earlgrey #(
   // parameters for sensor_ctrl_aon
   // parameters for sram_ctrl_ret_aon
   parameter bit SramCtrlRetAonInstrExec = 0,
+  parameter int SramCtrlRetAonNumPrinceRoundsHalf = 3,
   // parameters for flash_ctrl
   parameter bit SecFlashCtrlScrambleEn = 1,
   parameter int FlashCtrlProgFifoDepth = 4,
@@ -96,6 +97,7 @@ module top_earlgrey #(
   // parameters for edn1
   // parameters for sram_ctrl_main
   parameter bit SramCtrlMainInstrExec = 1,
+  parameter int SramCtrlMainNumPrinceRoundsHalf = 2,
   // parameters for rom_ctrl
   parameter RomCtrlBootRomInitFile = "",
   parameter bit SecRomCtrlDisableScrambling = 1'b0,
@@ -2067,7 +2069,8 @@ module top_earlgrey #(
     .RndCnstLfsrSeed(RndCnstSramCtrlRetAonLfsrSeed),
     .RndCnstLfsrPerm(RndCnstSramCtrlRetAonLfsrPerm),
     .MemSizeRam(4096),
-    .InstrExec(SramCtrlRetAonInstrExec)
+    .InstrExec(SramCtrlRetAonInstrExec),
+    .NumPrinceRoundsHalf(SramCtrlRetAonNumPrinceRoundsHalf)
   ) u_sram_ctrl_ret_aon (
       // [34]: fatal_error
       .alert_tx_o  ( alert_tx[34:34] ),
@@ -2534,7 +2537,8 @@ module top_earlgrey #(
     .RndCnstLfsrSeed(RndCnstSramCtrlMainLfsrSeed),
     .RndCnstLfsrPerm(RndCnstSramCtrlMainLfsrPerm),
     .MemSizeRam(131072),
-    .InstrExec(SramCtrlMainInstrExec)
+    .InstrExec(SramCtrlMainInstrExec),
+    .NumPrinceRoundsHalf(SramCtrlMainNumPrinceRoundsHalf)
   ) u_sram_ctrl_main (
       // [59]: fatal_error
       .alert_tx_o  ( alert_tx[59:59] ),
diff --git a/hw/top_earlgrey/rtl/prim_xilinx_pkg.sv b/hw/top_earlgrey/rtl/prim_xilinx_pkg.sv
new file mode 100644
index 0000000000000..aa1a2b0b8f6c4
--- /dev/null
+++ b/hw/top_earlgrey/rtl/prim_xilinx_pkg.sv
@@ -0,0 +1,20 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+package prim_xilinx_pkg;
+
+  // Accommodates updatemem by breaking up flash info arrays into data and
+  // metadata subarrays. The 76-bit width and 1 BRAM depth identifies these
+  // memories in earlgrey, and we limit the subarray size to 64 bits, which is
+  // the size of the data portion. The leftover 12 bits get placed into their
+  // own memory with a unique hierarchical path. See prim_xilinx_ram_1p.sv to
+  // see how this works.
+  function automatic int get_ram_max_width(int width, int depth);
+    if (width == 76 && depth < 4096) begin
+      return 64;
+    end
+    return 0;
+  endfunction
+
+endpackage : prim_xilinx_pkg
diff --git a/hw/top_earlgrey/syn/chip_earlgrey_asic.sdc b/hw/top_earlgrey/syn/chip_earlgrey_asic.sdc
index bfe809b976a97..6f96fef392714 100644
--- a/hw/top_earlgrey/syn/chip_earlgrey_asic.sdc
+++ b/hw/top_earlgrey/syn/chip_earlgrey_asic.sdc
@@ -5,12 +5,16 @@
 # Generic constraints file for simple testsynthesis flow
 
 # Note that we do not fix hold timing in this flow
+if { $synopsys_program_name eq "pt_shell" } {
+set SETUP_CLOCK_UNCERTAINTY 0.05
+} else {
 set SETUP_CLOCK_UNCERTAINTY 0.5
-set CLK_PERIOD_FACTOR 0.95 ;# clock period over constraining factor
+}
+set CLK_PERIOD_FACTOR $CLK_PERIOD_FACTOR ;# clock period over constraining factor
 puts "Applying constraints for top level"
 
 # Note: the netlist does include pads at this level, but not all IO interfaces
-# have been properly constrained yet. The clocks are generated inside AST and
+# have been constrained. The clocks are generated inside AST and
 # for the purpose of test synthesis, these clock nets are just set to ideal networks.
 
 #####################
@@ -30,29 +34,29 @@ if {!$IS_CDC_RUN} {
 #####################
 # main clock        #
 #####################
-set MAIN_CLK_PIN u_ast/clk_src_sys_o
+set MAIN_CLK_PIN $MAIN_CLK_PIN
 set MAIN_RST_PIN IO_RST_N
 # target is 100MHz, overconstrain by factor
 set MAIN_TCK_TARGET_PERIOD  10
-set MAIN_TCK_FACTOR 0.85
+set MAIN_TCK_FACTOR $MAIN_TCK_FACTOR
 set MAIN_TCK_PERIOD [expr $MAIN_TCK_TARGET_PERIOD*$MAIN_TCK_FACTOR] ;# over constraining
 # For now we remove this as clock is, by default, ideal. Reset, we'll try w/o ideal_network.
 #set_ideal_network [get_pins ${MAIN_CLK_PIN}]
 #set_ideal_network [get_ports ${MAIN_RST_PIN}]
 
-create_clock -name MAIN_CLK -period ${MAIN_TCK_PERIOD} [get_pins ${MAIN_CLK_PIN}]
+create_clock -name MAIN_CLK -period ${MAIN_TCK_PERIOD} [get_pins ${MAIN_CLK_PIN}] -add
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks MAIN_CLK]
 #set_false_path -from [get_clocks ${MAIN_CLK_PIN_AST}] -to [get_clocks ${MAIN_CLK_PIN}]
 #####################
 # USB clock         #
 #####################
-set USB_CLK_PIN u_ast/clk_src_usb_o
+set USB_CLK_PIN $USB_CLK_PIN
 # target is 48MHz, overconstrain by 5%
 set USB_TCK_TARGET_PERIOD 20.8
 set USB_TCK_PERIOD [expr $USB_TCK_TARGET_PERIOD*$CLK_PERIOD_FACTOR]
 # USB clock uncertainty needs to be within 2500ppm
 set USB_CLOCK_UNCERTAINTY [expr $USB_TCK_PERIOD * .0025]
-create_clock -name USB_CLK -period ${USB_TCK_PERIOD} [get_pins ${USB_CLK_PIN}]
+create_clock -name USB_CLK -period ${USB_TCK_PERIOD} [get_pins ${USB_CLK_PIN}] -add
 set_clock_uncertainty ${USB_CLOCK_UNCERTAINTY} [get_clocks USB_CLK]
 
 # This requires knowledge of actual pin names, hence we only run this if we're compiling against
@@ -64,7 +68,7 @@ if {$FOUNDRY_ROOT != ""} {
   set_max_delay 5 -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_*_flop/${FLOP_PATH}/Q] \
                   -to   [get_ports USB_*]
   set_max_delay 5 -from [get_ports USB_*] \
-                  -to   [get_pins top_earlgrey/u_usbdev/i_usbdev_iomux/cdc_io_to_usb/u_sync_1/${FLOP_PATH}/D]
+                  -to   [get_pins top_earlgrey/u_usbdev/i_usbdev_iomux/cdc_io_to_usb/gen_generic_u_impl_generic/u_sync_1/${FLOP_PATH}/D]
 
   # The USB 2.0 spec specifies that full-speed driver rise/fall times can be 4ns to 20ns, and that
   # differential edges should be within +-10% to minimize skew. Assuming the fastest rise/fall time
@@ -75,20 +79,21 @@ if {$FOUNDRY_ROOT != ""} {
 
   # output enable timing
   set_max_delay ${MAX_USB_DELAY} -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_oe_flop/${FLOP_PATH}/Q*] \
-                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/OE"]
+                                 -to  [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/OE"]
   # dp output timing
   # note that there is a path to the OE as well due to virtual open drain emulation in the pad wrapper (although it is likely not being used for USB).
   set_max_delay ${MAX_USB_DELAY} -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_usb_dp_o_flop/${FLOP_PATH}/Q*] \
-                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/OE"]
+                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/OE"]
   set_max_delay ${MAX_USB_DELAY} -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_usb_dp_o_flop/${FLOP_PATH}/Q*] \
-                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/A"]
+                                 -to  [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/A"]
 
   # dn output timing
   # note that there is a path to the OE as well due to virtual open drain emulation in the pad wrapper (although it is likely not being used for USB).
   set_max_delay ${MAX_USB_DELAY} -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_usb_dn_o_flop/${FLOP_PATH}/Q*] \
-                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/OE"]
+                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/OE"]
   set_max_delay ${MAX_USB_DELAY} -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_usb_dn_o_flop/${FLOP_PATH}/Q*] \
-                                 -to   [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/A"]
+                                 -to  [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/A"]
+
 
   # We reuse the same set_max_delay constraints as for the driver paths to stay on the safe side
   # (there is more skew budget on the receiver side according to the spec, but we shouldn't be using that
@@ -111,38 +116,37 @@ if {$FOUNDRY_ROOT != ""} {
                                           [get_pins u_prim_usb_diff_rx/input_ni]]]
 
   # dp/dn input timing to regular regs
-  set_max_delay ${MAX_USB_DELAY} -from [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*/*/Y"] \
-                                 -to   [get_pins top_earlgrey/u_usbdev/i_usbdev_iomux/cdc_io_to_usb/u_sync_1/${FLOP_PATH}/D]
+  set_max_delay ${MAX_USB_DELAY} -from [get_pins -hierarchical -filter "full_name =~ *u_dio_pad*usb_pad_wrap/u_pad_macro_PBIDIR_*/Y"] \
+                                 -to   [get_pins top_earlgrey/u_usbdev/i_usbdev_iomux/cdc_io_to_usb/gen_generic_u_impl_generic/u_sync_1/${FLOP_PATH}/D]
 }
 
 #####################
 # IO clk            #
 #####################
-set IO_CLK_PIN u_ast/clk_src_io_o
+set IO_CLK_PIN $IO_CLK_PIN
 # target is 96MHz, overconstrain by factor
 set IO_TCK_TARGET_PERIOD 10.416
 set IO_TCK_PERIOD [expr $IO_TCK_TARGET_PERIOD*$CLK_PERIOD_FACTOR]
 
-create_clock -name IO_CLK -period ${IO_TCK_PERIOD} [get_pins ${IO_CLK_PIN}]
+create_clock -name IO_CLK -period ${IO_TCK_PERIOD} [get_pins ${IO_CLK_PIN}] -add
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks IO_CLK]
 
 # This requires knowledge of actual port name
-set CLK_DST_NAME clk_o
+set CLK_DST_NAME $CLK_DST_PIN
 
 # generated clocks (div2/div4)
 set CLK_PATH top_earlgrey/u_clkmgr_aon/u_no_scan_io_div2_div
 create_generated_clock -name IO_DIV2_CLK  \
-    -source [get_pins ${IO_CLK_PIN}] -divide_by 2 [get_pins ${CLK_PATH}/${CLK_DST_NAME}]
+    -source [get_pins ${IO_CLK_PIN}] -divide_by 2 [get_pins ${CLK_PATH}/${CLK_DST_NAME}] -master IO_CLK -add
 
 set CLK_PATH top_earlgrey/u_clkmgr_aon/u_no_scan_io_div4_div
 create_generated_clock -name IO_DIV4_CLK  \
-    -source [get_pins ${IO_CLK_PIN}] -divide_by 4 [get_pins ${CLK_PATH}/${CLK_DST_NAME}]
+    -source [get_pins ${IO_CLK_PIN}] -divide_by 4 [get_pins ${CLK_PATH}/${CLK_DST_NAME}] -master IO_CLK -add
 
 # Define these variables for later use
 set IO_DIV2_TCK_PERIOD [expr $IO_TCK_PERIOD * 2]
 set IO_DIV4_TCK_PERIOD [expr $IO_TCK_PERIOD * 4]
 
-# TODO: these are dummy constraints and likely incorrect, need to properly constrain min/max
 # note that due to the muxing, additional timing views with set_case_analysis may be needed.
 
 # aggregate all IO banks
@@ -152,15 +156,15 @@ append_to_collection IO_BANKS [get_ports IOC*]
 append_to_collection IO_BANKS [get_ports IOR*]
 
 # constrain muxed IOs running on IO_DIV2_CLK and IO_DIV4_CLK
-set IO_IN_DEL_FRACTION 0.4
-set IO_OUT_DEL_FRACTION 0.4
+set IO_IN_DEL_FRACTION 0.40
+set IO_OUT_DEL_FRACTION 0.40
 
 # IO_DIV2_CLK
 set IO_DIV2_IN_DEL    [expr ${IO_IN_DEL_FRACTION} * ${IO_TCK_PERIOD} * 2.0]
 set IO_DIV2_OUT_DEL   [expr ${IO_OUT_DEL_FRACTION} * ${IO_TCK_PERIOD} * 2.0]
 
-set_input_delay ${IO_DIV2_IN_DEL}   ${IO_BANKS} -clock IO_DIV2_CLK
-set_output_delay ${IO_DIV2_OUT_DEL} ${IO_BANKS} -clock IO_DIV2_CLK
+set_input_delay ${IO_DIV2_IN_DEL}   ${IO_BANKS} -clock IO_DIV2_CLK -add_delay
+set_output_delay ${IO_DIV2_OUT_DEL} ${IO_BANKS} -clock IO_DIV2_CLK -add_delay
 
 # IO_DIV4_CLK
 set IO_DIV4_IN_DEL    [expr ${IO_IN_DEL_FRACTION} * ${IO_TCK_PERIOD} * 4.0]
@@ -180,13 +184,13 @@ set_max_delay -from ${IO_BANKS} -to ${IO_BANKS} -through [get_cells top_earlgrey
 #####################
 # AON clk           #
 #####################
-set AON_CLK_PIN u_ast/clk_src_aon_o
+set AON_CLK_PIN $AON_CLK_PIN
 # target is 200KHz, overconstrain by factor
 set AON_TCK_TARGET_PERIOD 5000.0
 set AON_TCK_PERIOD [expr $AON_TCK_TARGET_PERIOD*$CLK_PERIOD_FACTOR]
 #set_ideal_network [get_pins ${AON_CLK_PIN}]
 
-create_clock -name AON_CLK -period ${AON_TCK_PERIOD} [get_pins ${AON_CLK_PIN}]
+create_clock -name AON_CLK -period ${AON_TCK_PERIOD} [get_pins ${AON_CLK_PIN}] -add
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks AON_CLK]
 
 #####################
@@ -197,15 +201,15 @@ set JTAG_CLK_PIN IOR3
 set JTAG_TCK_TARGET_PERIOD 33.3
 set JTAG_TCK_PERIOD [expr $JTAG_TCK_TARGET_PERIOD*$CLK_PERIOD_FACTOR]
 
-create_clock -name JTAG_TCK -period $JTAG_TCK_PERIOD [get_ports $JTAG_CLK_PIN]
+create_clock -name JTAG_TCK -period $JTAG_TCK_PERIOD [get_ports $JTAG_CLK_PIN] -add
 #set_ideal_network [get_ports $JTAG_CLK_PIN]
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks JTAG_TCK]
 set_propagated_clock JTAG_TCK
 
 create_generated_clock -name LC_JTAG_TCK -source [get_ports IOR3] -divide_by 1 \
-    [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_lc/prim_clock_buf_tck/clk_o]
+    [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_lc/prim_clock_buf_tck/clk_o] -master_clock JTAG_TCK -add
 create_generated_clock -name RV_JTAG_TCK -source [get_ports IOR3] -divide_by 1 \
-    [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_rv/prim_clock_buf_tck/clk_o]
+    [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_rv/prim_clock_buf_tck/clk_o] -master_clock JTAG_TCK -add
 
 set LC_JTAG_TCK_INV_PIN \
   [get_pins -leaf -filter {@pin_direction == out} -of_objects \
@@ -231,13 +235,21 @@ set_input_delay  -add_delay -clock_fall -clock JTAG_TCK -max  8.0 [get_ports {IO
 
 # Don't apply these constraints to the DFT TAP. Leave this to the
 # implementation.
+if { $synopsys_program_name eq "pt_shell" || $synopsys_program_name eq "icc2_shell" || $synopsys_program_name eq "dc_shell"  } {
+set_clock_sense -stop_propagation -clock JTAG_TCK \
+  [get_pins -leaf -filter "@pin_direction == out" -of_objects \
+    [get_nets -segments -of_objects \
+      [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_dft/prim_clock_buf_tck/clk_o] \
+    ] \
+  ]
+} else {
 set_clock_sense -logical_stop_propagation -clock JTAG_TCK \
   [get_pins -leaf -filter "@pin_direction == out" -of_objects \
     [get_nets -segments -of_objects \
       [get_pins top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_pinmux_jtag_buf_dft/prim_clock_buf_tck/clk_o] \
     ] \
   ]
-
+}
 # Don't carry the JTAG clock through the pinmux.
 set_clock_sense -stop_propagation -clock JTAG_TCK \
   [get_pins -leaf -filter "@pin_direction == out" -of_objects \
@@ -263,7 +275,7 @@ set AST_EXT_CLK_PIN IOC6
 set AST_EXT_TCK_TARGET_PERIOD [expr $IO_TCK_TARGET_PERIOD*2]
 set AST_EXT_TCK_PERIOD [expr $AST_EXT_TCK_TARGET_PERIOD*$CLK_PERIOD_FACTOR]
 
-create_clock -name AST_EXT_CLK -period ${AST_EXT_TCK_PERIOD} [get_ports ${AST_EXT_CLK_PIN}]
+create_clock -name AST_EXT_CLK -period ${AST_EXT_TCK_PERIOD} [get_ports ${AST_EXT_CLK_PIN}] -add
 set_clock_uncertainty -setup  ${SETUP_CLOCK_UNCERTAINTY} [get_clocks AST_EXT_CLK]
 
 # This is not needed by CDC runs because io_clk/usb_clk/main_clk/aon_clk are propagated from ast_ext_clk in ast.lib
@@ -286,7 +298,7 @@ set PCB_SKEW 0.51
 set HOST_SETUP_DEL 5
 set HOST_HOLD_DEL -5
 # Limit hold requirements for full-cycle sampling.
-set HOST_HOLD_DEL_FULL_CYCLE -3
+set HOST_HOLD_DEL_FULL_CYCLE -2
 
 # external spi host clk-to-q
 set HOST_OUT_DEL_MIN -2
@@ -300,6 +312,70 @@ set STORAGE_HOLD_DEL -3
 set STORAGE_OUT_DEL_MIN 0
 set STORAGE_OUT_DEL_MAX 9
 
+###################################################
+# SPI input outpt delay based Ziv Spec
+###################################################
+# Note: below values apply if the spec_constr variable is set to "false".
+# If the spec_constr variable is set to true:
+# - below values are not used, and
+# - the values defined in other sections of this SDC are used instead (see e.g. "SPI_HOST_1 timing (full-cycle sampling)").
+#
+# For Earlgrey-PROD, both sets of constraints (spec_constr "true" and "false") have been verified.
+# In the future, those can ideally be merged together.
+
+if { $synopsys_program_name eq "pt_shell" } {
+set out_val 0
+} else {
+set out_val 3
+}
+
+set spi_host_inp_max             11.5
+set spi_host_inp_min               -1
+set spi_host_out_val_max          [expr 5.5 + $out_val]
+set spi_host_out_val_min          -9
+
+set spi_host1_inp_max                8
+set spi_host1_inp_min                0
+set spi_host1_out_val_max          [expr 4.5 + $out_val]
+set spi_host1_out_val_min          -0.5
+
+set spi_dev_inp_max                 5
+set spi_dev_inp_min                -7
+set spi_dev_inp_csb_max             5
+set spi_dev_inp_csb_min            -3
+set spi_dev_out_val_max           [expr 7.5 + $out_val]
+set spi_dev_out_val_min            -2
+
+set spi_tpm_inp_max                18
+set spi_tpm_inp_min               -17
+set spi_tpm_inp_csb_max            15
+set spi_tpm_inp_csb_min           -17
+set spi_tpm_out_val_max           [expr 7.5 + $out_val]
+set spi_tpm_out_val_min           -22
+
+set spi_dev_hc_inp_max             15
+set spi_dev_hc_inp_min            -17
+set spi_dev_hc_inp_csb_max         15
+set spi_dev_hc_inp_csb_min        -17
+set spi_dev_hc_out_val_max        [expr 7.5 + $out_val]
+set spi_dev_hc_out_val_min        -22
+
+set spi_fast_pass_host_inp_max     16
+set spi_fast_pass_host_inp_min      0
+
+set spi_fast_pass_dev_out_val_max   [expr 12.5 + $out_val]
+set spi_fast_pass_dev_out_val_min   -2
+
+set spi_fast_pass_soc_in_max        4.8
+set spi_fast_pass_soc_in_min       -5
+set spi_fast_pass_flsh_out_max     [expr  5 + $out_val]
+set spi_fast_pass_flsh_out_min     -4.8
+
+set spi_slow_pass_flsh_in_max    10.7
+set spi_slow_pass_flsh_in_min       0
+set spi_slow_pass_soc_out_max      [expr 6.7 + $out_val]
+set spi_slow_pass_soc_out_min      -2
+
 #################
 # SPI DEV clock #
 #################
@@ -323,42 +399,66 @@ set SPI_DEV_OUT_DEL_MIN ${HOST_HOLD_DEL}
 set SPI_DEV_OUT_DEL_MIN_FC ${HOST_HOLD_DEL_FULL_CYCLE}
 set SPI_DEV_OUT_DEL_MAX [expr ${HOST_SETUP_DEL} + 2 * ${PCB_DEL}]
 
-create_clock -name SPI_DEV_CLK  -period ${SPI_DEV_TCK} [get_ports ${SPI_DEV_CLK_PIN}]
+create_clock -name SPI_DEV_CLK  -period ${SPI_DEV_TCK} [get_ports ${SPI_DEV_CLK_PIN}] -add
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_DEV_CLK]
 set_propagated_clock SPI_DEV_CLK
 
 create_generated_clock -name SPI_DEV_IN_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/${CLK_PIN}] -master_clock SPI_DEV_CLK -add
 create_generated_clock -name SPI_DEV_OUT_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 -invert \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/${CLK_PIN}] -master_clock SPI_DEV_CLK -add
 
 # bidir ports
 set SPI_DEV_DATA_PORTS [get_ports {SPI_DEV_D0 SPI_DEV_D1 SPI_DEV_D2 SPI_DEV_D3}]
+if {$spec_constr} {
 set_input_delay -min ${SPI_DEV_IN_DEL_MIN} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_CLK -add_delay
 set_input_delay -max ${SPI_DEV_IN_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_CLK -add_delay
-
+} else {
+set_input_delay -min $spi_dev_inp_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_CLK -add_delay
+set_input_delay -max $spi_dev_inp_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_CLK -add_delay
+}
 # Full-cycle sampling has the host on the next falling edge.
+if {$spec_constr} {
 set_output_delay -min ${SPI_DEV_OUT_DEL_MIN_FC} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_CLK -add_delay
 set_output_delay -max ${SPI_DEV_OUT_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_CLK -add_delay
+} else {
+set_output_delay -min $spi_dev_out_val_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_CLK -add_delay
+set_output_delay -max $spi_dev_out_val_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_CLK -add_delay
+}
 set_multicycle_path -setup 2 -from [get_clocks SPI_DEV_IN_CLK] \
     -to [get_clocks SPI_DEV_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
+#leonids updated based on interaction with Alex
+set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_IN_CLK] \
+    -to [get_clocks SPI_DEV_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
 
 # SPI DEV CSB, the chip-select for non-TPM modes, acts as clock, data, and
 # reset.
 create_clock -name SPI_DEV_CSB_CLK -period [expr 2 * ${SPI_DEV_TCK}] \
     -waveform "${SPI_DEV_TCK_HALF} [expr ${SPI_DEV_TCK_HALF} + ${SPI_DEV_TCK}]" \
-    [get_ports SPI_DEV_CS_L]
+    [get_ports SPI_DEV_CS_L] -add
+if {$spec_constr} {
 set_clock_latency -source -min ${SPI_DEV_IN_DEL_MIN} [get_clocks SPI_DEV_CSB_CLK]
 set_clock_latency -source -max ${SPI_DEV_IN_DEL_MAX} [get_clocks SPI_DEV_CSB_CLK]
+} else {
+set_clock_latency -source -min $spi_dev_inp_csb_min [get_clocks SPI_DEV_CSB_CLK]
+set_clock_latency -source -max $spi_dev_inp_csb_max [get_clocks SPI_DEV_CSB_CLK]
+}
 set_propagated_clock [get_clocks SPI_DEV_CSB_CLK]
+if { $synopsys_program_name eq "pt_shell" || $synopsys_program_name eq "icc2_shell" || $synopsys_program_name eq "dc_shell"  } {
+set_clock_sense -stop_propagation [get_pins -leaf -of_objects top_earlgrey/u_spi_device/u_csb_buf/out_o[0]]
+} else {
 set_clock_sense -logical_stop_propagation [get_pins -leaf -of_objects [get_pins top_earlgrey/u_spi_device/u_csb_buf/out_o[0]]]
-
+}
 # CSB-clocked status bits to various negedge-triggered flops, especially in the
 # serializer.
 # Advance the hold edge by one cycle, since CSB changes nominally on the same
@@ -388,19 +488,6 @@ set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_CLK] \
 # real.
 ##
 
-# These two false paths are slated to be removed. The originating nodes were
-# observed to all come from the generic mode module, which has been removed.
-#set_false_path -hold -from [get_clocks SPI_DEV_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_valid_i]]]
-#set_false_path -hold -from [get_clocks SPI_DEV_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_i*]]]
-
 # This path is from locality logic that is on the *_IN_CLK domain and selects
 # between fixed values or the return-by-hw register value. The flopped bits
 # settle in the middle of the command/address phase, many cycles before the
@@ -430,40 +517,60 @@ set SPI_DEV_CLK_PIN SPI_DEV_CLK
 set SPI_DEV_HC_TCK 40.0
 set SPI_DEV_HC_TCK_HALF [expr ${SPI_DEV_HC_TCK} / 2]
 
-create_clock -name SPI_DEV_HC_CLK -period ${SPI_DEV_HC_TCK} [get_ports ${SPI_DEV_CLK_PIN}]
-set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_DEV_CLK]
+create_clock -name SPI_DEV_HC_CLK -period ${SPI_DEV_HC_TCK} [get_ports ${SPI_DEV_CLK_PIN}] -add
+set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_DEV_HC_CLK]
 set_propagated_clock SPI_DEV_HC_CLK
 
 create_generated_clock -name SPI_DEV_HC_IN_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/${CLK_PIN}] -add -master_clock SPI_DEV_HC_CLK
 create_generated_clock -name SPI_DEV_HC_OUT_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 -invert \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/${CLK_PIN}] -add -master_clock SPI_DEV_HC_CLK
 
 # bidir ports
 set SPI_DEV_DATA_PORTS [get_ports {SPI_DEV_D0 SPI_DEV_D1 SPI_DEV_D2 SPI_DEV_D3}]
+if {$spec_constr} {
 set_input_delay -min ${SPI_DEV_IN_DEL_MIN} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_HC_CLK -add_delay
 set_input_delay -max ${SPI_DEV_IN_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_HC_CLK -add_delay
-
+} else {
+set_input_delay -min $spi_dev_hc_inp_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_HC_CLK -add_delay
+set_input_delay -max $spi_dev_hc_inp_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_HC_CLK -add_delay
+}
 # Half-cycle sampling has the host on the next rising edge.
+if {$spec_constr} {
 set_output_delay -min ${SPI_DEV_OUT_DEL_MIN} ${SPI_DEV_DATA_PORTS} \
     -clock SPI_DEV_HC_CLK -add_delay
 set_output_delay -max ${SPI_DEV_OUT_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock SPI_DEV_HC_CLK -add_delay
-
+} else {
+set_output_delay -min $spi_dev_hc_out_val_min ${SPI_DEV_DATA_PORTS} \
+    -clock SPI_DEV_HC_CLK -add_delay
+set_output_delay -max $spi_dev_hc_out_val_max ${SPI_DEV_DATA_PORTS} \
+    -clock SPI_DEV_HC_CLK -add_delay
+}
 # SPI DEV CSB, the chip-select for non-TPM modes, acts as clock, data, and
 # reset.
 create_clock -name SPI_DEV_HC_CSB_CLK -period [expr 2 * ${SPI_DEV_HC_TCK}] \
-    -waveform "${SPI_DEV_HC_TCK_HALF} [expr ${SPI_DEV_TCK_HALF} + ${SPI_DEV_TCK}]" \
-    [get_ports SPI_DEV_CS_L]
+    -waveform "${SPI_DEV_HC_TCK_HALF} [expr ${SPI_DEV_HC_TCK_HALF} + ${SPI_DEV_HC_TCK}]" \
+    [get_ports SPI_DEV_CS_L] -add
+if {$spec_constr} {
 set_clock_latency -source -min ${SPI_DEV_IN_DEL_MIN} [get_clocks SPI_DEV_HC_CSB_CLK]
 set_clock_latency -source -max ${SPI_DEV_IN_DEL_MAX} [get_clocks SPI_DEV_HC_CSB_CLK]
+} else {
+set_clock_latency -source -min $spi_dev_hc_inp_csb_min [get_clocks SPI_DEV_HC_CSB_CLK]
+set_clock_latency -source -max $spi_dev_hc_inp_csb_max [get_clocks SPI_DEV_HC_CSB_CLK]
+}
 set_propagated_clock [get_clocks SPI_DEV_HC_CSB_CLK]
-set_clock_sense -logical_stop_propagation [get_pins -leaf -of_objects [get_pins top_earlgrey/u_spi_device/u_csb_buf/out_o[0]]]
-
+if { $synopsys_program_name eq "pt_shell" || $synopsys_program_name eq "icc2_shell" || $synopsys_program_name eq "dc_shell"  } {
+set_clock_sense -stop_propagation [get_pins -leaf -of_objects top_earlgrey/u_spi_device/u_csb_buf/out_o[0]]
+} else {
+set_clock_sense -logical_stop_propagation [get_pins -leaf -of_objects top_earlgrey/u_spi_device/u_csb_buf/out_o[0]]
+}
 # CSB-clocked status bits to various negedge-triggered flops, especially in the
 # serializer.
 # Advance the hold edge by one cycle, since CSB changes nominally on the same
@@ -493,19 +600,6 @@ set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_HC_CLK] \
 # real.
 ##
 
-# These two false paths are slated to be removed. The originating nodes were
-# observed to all come from the generic mode module, which has been removed.
-#set_false_path -hold -from [get_clocks SPI_DEV_HC_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_valid_i]]]
-#set_false_path -hold -from [get_clocks SPI_DEV_HC_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_i*]]]
-
 # This path is from locality logic that is on the *_IN_CLK domain and selects
 # between fixed values or the return-by-hw register value. The flopped bits
 # settle in the middle of the command/address phase, many cycles before the
@@ -523,6 +617,17 @@ set_false_path -from [get_clocks SPI_DEV_HC_CSB_CLK] \
         [get_nets -segments -of_objects \
             [get_pins u_ast/u_scan_rst_n/in_i*]]]
 
+# false path from spi_cmdparse to the ports on SPI_DEV_HC_CLK
+set_false_path -hold -from [get_clocks SPI_DEV_HC_IN_CLK] \
+    -to [get_clocks SPI_DEV_HC_CLK] \
+    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
+        [get_cells -filter "@is_sequential" top_earlgrey/u_spi_device/u_cmdparse/*]]
+
+set_false_path -hold -from [get_clocks SPI_DEV_HC_IN_CLK] \
+    -to [get_clocks SPI_DEV_HC_CLK] \
+    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
+        [get_cells -filter "@is_sequential" top_earlgrey/u_spi_device/u_passthrough/cmd_info_reg_read_pipeline_mode*]]
+
 ####################
 # SPI DEV TPM mode #
 ####################
@@ -534,9 +639,9 @@ set_false_path -from [get_clocks SPI_DEV_HC_CSB_CLK] \
 set SPI_TPM_TCK 40.0
 set SPI_TPM_TCK_HALF [expr ${SPI_TPM_TCK} / 2]
 set SPI_TPM_CSB_HOLD 5.0
-set SPI_TPM_CSB_SETUP 5.0
-set SPI_TPM_MOSI_HOLD 3.0
-set SPI_TPM_MOSI_SETUP 2.0
+set SPI_TPM_CSB_SETUP 10.0
+set SPI_TPM_MOSI_HOLD 5.0
+set SPI_TPM_MOSI_SETUP 10.0
 set SPI_TPM_MISO_CLKQ_MIN 0.0
 set SPI_TPM_MISO_CLKQ_MAX 12.6
 set SPI_TPM_CSB_IN_DEL_MIN [expr ${SPI_TPM_CSB_HOLD} - ${SPI_TPM_TCK_HALF}]
@@ -546,49 +651,68 @@ set SPI_TPM_MOSI_IN_DEL_MAX [expr ${SPI_TPM_TCK_HALF} - ${SPI_TPM_MOSI_SETUP}]
 set SPI_TPM_MISO_OUT_DEL_MIN ${SPI_TPM_MISO_CLKQ_MIN}
 set SPI_TPM_MISO_OUT_DEL_MAX [expr ${SPI_TPM_TCK_HALF} - ${SPI_TPM_MISO_CLKQ_MAX}]
 
-create_clock -name SPI_TPM_CLK -add -period ${SPI_TPM_TCK} [get_ports ${SPI_DEV_CLK_PIN}]
+create_clock -name SPI_TPM_CLK -add -period ${SPI_TPM_TCK} [get_ports ${SPI_DEV_CLK_PIN}] -add
 set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_TPM_CLK]
 set_propagated_clock SPI_TPM_CLK
 
 create_generated_clock -name SPI_TPM_IN_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 \
     -master_clock SPI_TPM_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/${CLK_PIN}]
 create_generated_clock -name SPI_TPM_OUT_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 -invert \
     -master_clock SPI_TPM_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/${CLK_PIN}]
 
 # bidir ports
+if {$spec_constr} {
 set_input_delay -min ${SPI_TPM_MOSI_IN_DEL_MIN} [get_ports SPI_DEV_D0] \
     -clock_fall -clock SPI_TPM_CLK -add_delay
 set_input_delay -max ${SPI_TPM_MOSI_IN_DEL_MAX} [get_ports SPI_DEV_D0] \
     -clock_fall -clock SPI_TPM_CLK -add_delay
-
+} else {
+set_input_delay -min $spi_tpm_inp_min [get_ports SPI_DEV_D0] \
+    -clock_fall -clock SPI_TPM_CLK -add_delay
+set_input_delay -max $spi_tpm_inp_max [get_ports SPI_DEV_D0] \
+    -clock_fall -clock SPI_TPM_CLK -add_delay
+}
 # Half-cycle sampling has the host on the next rising edge.
+if {$spec_constr} {
 set_output_delay -min ${SPI_TPM_MISO_OUT_DEL_MIN} [get_ports SPI_DEV_D1] \
     -clock SPI_TPM_CLK -add_delay
 set_output_delay -max ${SPI_TPM_MISO_OUT_DEL_MAX} [get_ports SPI_DEV_D1] \
     -clock SPI_TPM_CLK -add_delay
-
+} else {
+set_output_delay -min $spi_tpm_out_val_min [get_ports SPI_DEV_D1] \
+    -clock SPI_TPM_CLK -add_delay
+set_output_delay -max $spi_tpm_out_val_max [get_ports SPI_DEV_D1] \
+    -clock SPI_TPM_CLK -add_delay
+}
 # SPI TPM CSB, the chip-select for TPM mode.
-# Any muxed port could be a SPI TPM CSB, but we only guarantee IOA7 meets
-# timing.
-set TPM_CSB_PORT [get_ports IOA7]
+# Any muxed port could be a SPI TPM CSB, but:
+# - IOA7 has been selected as the primary target and we guarantee it meets timing.
+# - IOA2 was selected as a secondary opportunistic target.
+set TPM_CSB_PORT [get_ports {IOA7 IOA2}]
 
 # TPM CSB input delays.
+if {$spec_constr} {
 set_input_delay -min ${SPI_TPM_CSB_IN_DEL_MIN} [get_ports ${TPM_CSB_PORT}] \
     -clock SPI_TPM_CLK -clock_fall -add_delay
 set_input_delay -max ${SPI_TPM_CSB_IN_DEL_MAX} [get_ports ${TPM_CSB_PORT}] \
     -clock SPI_TPM_CLK -clock_fall -add_delay
-
+} else {
+set_input_delay -min $spi_tpm_inp_csb_min [get_ports ${TPM_CSB_PORT}] \
+    -clock SPI_TPM_CLK -clock_fall -add_delay
+set_input_delay -max $spi_tpm_inp_csb_max [get_ports ${TPM_CSB_PORT}] \
+    -clock SPI_TPM_CLK -clock_fall -add_delay
+}
 # Relax hold path for TPM CSB, since CSB changes nominally on the same edge as
 # SPI_TPM_OUT_CLK, but the latter isn't actually toggling.
 set_multicycle_path -hold -end 1 -from [get_ports ${TPM_CSB_PORT}] \
     -to [get_clocks SPI_TPM_OUT_CLK] \
     -through [get_pins -leaf -filter "@pin_direction == in" -of_objects \
         [get_nets -segments -of_objects \
-            [get_pins top_earlgrey/u_spi_device/u_spi_tpm/rst_n]]]
+            [get_pins top_earlgrey/u_spi_device/u_spi_tpm/rst_ni]]]
 # Relax the hold time constraint for the passthrough clock gate. Really this is
 # to accommodate the gate for the inverted clock, which isn't active for the
 # modes used for these constraints. However, it would be an okay outcome if the
@@ -661,6 +785,15 @@ set_false_path -hold -from [get_clocks SPI_TPM_IN_CLK] \
 # Remove scan paths for timing analysis
 set_clock_sense -stop_propagation -clock SPI_TPM_CLK [get_pins -leaf -filter "@pin_direction == in" -of_objects [get_nets -segments -of_objects [get_pins u_ast/u_scan_clk/in_i*]]]
 
+set_false_path -hold -from [get_clocks SPI_TPM_IN_CLK] \
+    -to [get_clocks SPI_TPM_CLK] \
+    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
+        [get_cells -filter "@is_sequential" top_earlgrey/u_spi_device/u_cmdparse/*]]
+
+set_false_path -hold -from [get_clocks SPI_TPM_CLK] \
+    -to [get_clocks SPI_TPM_CLK] \
+    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
+        [get_cells -filter "@is_sequential" top_earlgrey/u_spi_device/u_passthrough/cmd_info_reg_read_pipeline_mode*]]
 
 ##################
 # SPI HOST clock #
@@ -682,7 +815,7 @@ if {$FOUNDRY_ROOT != ""} {
 
 # cascaded generated clock on the port
 create_generated_clock -name SPI_HOST_CLK -source [get_pins ${IO_CLK_PIN}] \
-                       -divide_by 2 [get_ports SPI_HOST_CLK]
+                       -divide_by 2 [get_ports SPI_HOST_CLK] -master_clock  IO_CLK -add
 
 # Multi-cycle path to adjust the hold edge, since launch and capture edges are
 # opposite in the SPI_HOST_CLK domain.
@@ -703,6 +836,7 @@ set SPI_HOST_IN_DEL_MAX  [expr ${STORAGE_OUT_DEL_MAX} + 2 * ${PCB_DEL}]
 
 # bidir ports, with the downstream device launching on falling edge
 set SPI_HOST_DATA_PORTS [get_ports SPI_HOST_D*]
+if {$spec_constr} {
 set_input_delay -min ${SPI_HOST_IN_DEL_MIN} ${SPI_HOST_DATA_PORTS} \
     -clock_fall -clock SPI_HOST_CLK -add_delay
 set_input_delay -max ${SPI_HOST_IN_DEL_MAX} ${SPI_HOST_DATA_PORTS} \
@@ -713,7 +847,18 @@ set_output_delay -min ${SPI_HOST_OUT_DEL_MIN} \
 set_output_delay -max ${SPI_HOST_OUT_DEL_MAX} \
     [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
     -clock SPI_HOST_CLK -add_delay
-
+} else {
+set_input_delay -min $spi_host_inp_min ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_CLK -add_delay
+set_input_delay -max $spi_host_inp_max ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_CLK -add_delay
+set_output_delay -min $spi_host_out_val_min \
+    [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
+    -clock SPI_HOST_CLK -add_delay
+set_output_delay -max $spi_host_out_val_max \
+    [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
+    -clock SPI_HOST_CLK -add_delay
+}
 
 ##########################################
 # SPI DEV SLOW clock Passthru Operation  #
@@ -740,11 +885,11 @@ set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_DEV_SLOW_PASS_C
 create_generated_clock -name SPI_DEV_SLOW_PASS_IN_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 \
     -master_clock SPI_DEV_SLOW_PASS_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/${CLK_PIN}]
 create_generated_clock -name SPI_DEV_SLOW_PASS_OUT_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 -invert \
     -master_clock SPI_DEV_SLOW_PASS_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/${CLK_PIN}]
 
 
 # clocks accounting for propagation delay to the other side
@@ -760,6 +905,9 @@ set_propagated_clock [get_clock SPI_DEV_SLOW_PASS_CLK]
 set_propagated_clock [get_clock SPI_HOST_SLOW_PASS_CLK]
 
 # bidir ports facing host, with full-cycle sampling at the upstream host
+if {$spec_constr} {
+# This is the fast passthrough mode: Check the direct timing paths from an upstream host to a downstream Flash device.
+# SPI Device is defined as input and SPI Host is defined as output.
 set_input_delay -min ${SPI_DEV_IN_DEL_MIN} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_SLOW_PASS_CLK -add_delay
 set_input_delay -max ${SPI_DEV_IN_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
@@ -768,10 +916,25 @@ set_output_delay -min ${SPI_DEV_OUT_DEL_MIN_FC} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_SLOW_PASS_CLK -add_delay
 set_output_delay -max ${SPI_DEV_OUT_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_SLOW_PASS_CLK -add_delay
+} else {
+# This is the slow passthrough mode: Check the direct timing paths from a downstream Flash device to an upstream host.
+# SPI Device is defined as output only and SPI Host is defined as input.
+# No set_input_delay constraints for SPI Device (these are applied for the fast passthrough mode and for other SPI modes).
+set_output_delay -min $spi_slow_pass_soc_out_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_SLOW_PASS_CLK -add_delay
+set_output_delay -max $spi_slow_pass_soc_out_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_SLOW_PASS_CLK -add_delay
+}
 set_multicycle_path -setup 2 -from [get_clocks SPI_DEV_SLOW_PASS_IN_CLK] \
     -to [get_clocks SPI_DEV_SLOW_PASS_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
+#leonids updated based on interaction with Alex
+set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_SLOW_PASS_IN_CLK] \
+    -to [get_clocks SPI_DEV_SLOW_PASS_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
 
 # bidir ports facing storage device
+if {$spec_constr} {
+# This is the fast passthrough mode: Check the direct timing paths from an upstream host to a downstream Flash device.
+# SPI Device is defined as input and SPI Host is defined as output.
 set_input_delay -min ${SPI_HOST_IN_DEL_MIN} ${SPI_HOST_DATA_PORTS} \
     -clock_fall -clock SPI_HOST_SLOW_PASS_CLK -add_delay
 set_input_delay -max ${SPI_HOST_IN_DEL_MAX} ${SPI_HOST_DATA_PORTS} \
@@ -782,16 +945,31 @@ set_output_delay -min ${SPI_HOST_OUT_DEL_MIN} \
 set_output_delay -max ${SPI_HOST_OUT_DEL_MAX} \
     [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
     -clock SPI_HOST_SLOW_PASS_CLK -add_delay
-
+} else {
+# This is the slow passthrough mode: Check the direct timing paths from a downstream Flash device to an upstream host.
+# SPI Device is defined as output only and SPI Host is defined as input.
+# No set_output_delay constraints for SPI Host (these are applied for the fast passthrough mode and for other SPI modes).
+set_input_delay -min $spi_slow_pass_flsh_in_min ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_SLOW_PASS_CLK -add_delay
+set_input_delay -max $spi_slow_pass_flsh_in_max ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_SLOW_PASS_CLK -add_delay
+}
 # CSB clock from top-level port (added to SPI_DEV_CSB_CLK)
 create_clock -name SPI_DEV_SLOW_PASS_CSB_CLK -add \
     -period [expr 2 * ${SPI_DEV_SLOW_PASS_TCK}] \
     -waveform "${SPI_DEV_SLOW_PASS_TCK_HALF} [expr ${SPI_DEV_SLOW_PASS_TCK_HALF} + ${SPI_DEV_SLOW_PASS_TCK}]" \
     [get_ports SPI_DEV_CS_L]
+if {$spec_constr} {
 set_clock_latency -source -min ${SPI_DEV_IN_DEL_MIN} \
     -clock SPI_DEV_SLOW_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
 set_clock_latency -source -max ${SPI_DEV_IN_DEL_MAX} \
     -clock SPI_DEV_SLOW_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+} else {
+set_clock_latency -source -min $spi_dev_inp_csb_min \
+    -clock SPI_DEV_SLOW_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+set_clock_latency -source -max $spi_dev_inp_csb_max \
+    -clock SPI_DEV_SLOW_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+}
 set_propagated_clock [get_clock SPI_DEV_SLOW_PASS_CSB_CLK]
 
 # CSB-clocked status bits to various negedge-triggered flops, especially in the
@@ -824,19 +1002,6 @@ set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_SLOW_PASS_CLK] \
 # real.
 ##
 
-# These two false paths are slated to be removed. The originating nodes were
-# observed to all come from the generic mode module, which has been removed.
-#set_false_path -hold -from [get_clocks SPI_DEV_SLOW_PASS_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_valid_i]]]
-#set_false_path -hold -from [get_clocks SPI_DEV_SLOW_PASS_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_i*]]]
-
 # This path is from locality logic that is on the *_IN_CLK domain and selects
 # between fixed values or the return-by-hw register value. The flopped bits
 # settle in the middle of the command/address phase, many cycles before the
@@ -879,11 +1044,11 @@ set_clock_uncertainty ${SETUP_CLOCK_UNCERTAINTY} [get_clocks SPI_DEV_FAST_PASS_C
 create_generated_clock -name SPI_DEV_FAST_PASS_IN_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 \
     -master_clock SPI_DEV_FAST_PASS_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_in_buf/${CLK_PIN}]
 create_generated_clock -name SPI_DEV_FAST_PASS_OUT_CLK \
     -source [get_ports ${SPI_DEV_CLK_PIN}] -divide_by 1 -invert \
     -master_clock SPI_DEV_FAST_PASS_CLK -add \
-    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/clk_o]
+    [get_pins top_earlgrey/u_spi_device/u_clk_spi_out_buf/${CLK_PIN}]
 
 
 # clocks accounting for propagation delay to the other side
@@ -899,6 +1064,7 @@ set_propagated_clock [get_clock SPI_DEV_FAST_PASS_CLK]
 set_propagated_clock [get_clock SPI_HOST_FAST_PASS_CLK]
 
 # bidir ports facing host, with full-cycle sampling at the upstream host
+if {$spec_constr} {
 set_input_delay -min ${SPI_DEV_IN_DEL_MIN} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
 set_input_delay -max ${SPI_DEV_IN_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
@@ -907,10 +1073,24 @@ set_output_delay -min ${SPI_DEV_OUT_DEL_MIN_FC} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
 set_output_delay -max ${SPI_DEV_OUT_DEL_MAX} ${SPI_DEV_DATA_PORTS} \
     -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
+} else {
+set_input_delay -min $spi_fast_pass_soc_in_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
+set_input_delay -max $spi_fast_pass_soc_in_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
+set_output_delay -min $spi_fast_pass_dev_out_val_min ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
+set_output_delay -max $spi_fast_pass_dev_out_val_max ${SPI_DEV_DATA_PORTS} \
+    -clock_fall -clock SPI_DEV_FAST_PASS_CLK -add_delay
+}
 set_multicycle_path -setup 2 -from [get_clocks SPI_DEV_FAST_PASS_IN_CLK] \
     -to [get_clocks SPI_DEV_FAST_PASS_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
+#leonids updated based on interaction with Alex
+set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_FAST_PASS_IN_CLK] \
+    -to [get_clocks SPI_DEV_FAST_PASS_CLK] -through [get_ports ${SPI_DEV_DATA_PORTS}]
 
 # bidir ports facing storage device
+if {$spec_constr} {
 set_input_delay -min ${SPI_HOST_IN_DEL_MIN} ${SPI_HOST_DATA_PORTS} \
     -clock_fall -clock SPI_HOST_FAST_PASS_CLK -add_delay
 set_input_delay -max ${SPI_HOST_IN_DEL_MAX} ${SPI_HOST_DATA_PORTS} \
@@ -921,22 +1101,45 @@ set_output_delay -min ${SPI_HOST_OUT_DEL_MIN} \
 set_output_delay -max ${SPI_HOST_OUT_DEL_MAX} \
     [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
     -clock SPI_HOST_FAST_PASS_CLK -add_delay
-
+} else {
+set_input_delay -min $spi_fast_pass_host_inp_min ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_FAST_PASS_CLK -add_delay
+set_input_delay -max $spi_fast_pass_host_inp_max ${SPI_HOST_DATA_PORTS} \
+    -clock_fall -clock SPI_HOST_FAST_PASS_CLK -add_delay
+set_output_delay -min $spi_fast_pass_flsh_out_min \
+    [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
+    -clock SPI_HOST_FAST_PASS_CLK -add_delay
+set_output_delay -max $spi_fast_pass_flsh_out_max \
+    [get_ports "SPI_HOST_CS_L ${SPI_HOST_DATA_PORTS}"] \
+    -clock SPI_HOST_FAST_PASS_CLK -add_delay
+}
 # Fast commands must use the fast read pipeline. Disable timing for the
 # combinatorial passthrough path.
 set_false_path -from [get_clocks SPI_HOST_FAST_PASS_CLK] \
     -through [get_ports ${SPI_DEV_DATA_PORTS}] \
     -to [get_clocks SPI_DEV_FAST_PASS_CLK]
 
+#leonids 03/06/2024 Updated based on interaction with Alex
+# full-cycle sampling flops
+set_false_path -from [get_clocks SPI_HOST_FAST_PASS_CLK] \
+    -to [get_clocks SPI_DEV_FAST_PASS_IN_CLK]
+
 # CSB clock from top-level port (added to SPI_DEV_CSB_CLK)
 create_clock -name SPI_DEV_FAST_PASS_CSB_CLK -add \
     -period [expr 2 * ${SPI_DEV_FAST_PASS_TCK}] \
     -waveform "${SPI_DEV_FAST_PASS_TCK_HALF} [expr ${SPI_DEV_FAST_PASS_TCK_HALF} + ${SPI_DEV_FAST_PASS_TCK}]" \
     [get_ports SPI_DEV_CS_L]
+if {$spec_constr} {
 set_clock_latency -source -min ${SPI_DEV_IN_DEL_MIN} \
     -clock SPI_DEV_FAST_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
 set_clock_latency -source -max ${SPI_DEV_IN_DEL_MAX} \
     -clock SPI_DEV_FAST_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+} else {
+set_clock_latency -source -min $spi_dev_inp_csb_min \
+    -clock SPI_DEV_FAST_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+set_clock_latency -source -max $spi_dev_inp_csb_max \
+    -clock SPI_DEV_FAST_PASS_CSB_CLK [get_ports SPI_DEV_CS_L]
+}
 set_propagated_clock [get_clock SPI_DEV_FAST_PASS_CSB_CLK]
 
 # CSB-clocked status bits to various negedge-triggered flops, especially in the
@@ -969,19 +1172,6 @@ set_multicycle_path -hold -end 1 -from [get_clocks SPI_DEV_FAST_PASS_CLK] \
 # real.
 ##
 
-# These two false paths are slated to be removed. The originating nodes were
-# observed to all come from the generic mode module, which has been removed.
-#set_false_path -hold -from [get_clocks SPI_DEV_FAST_PASS_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_valid_i]]]
-#set_false_path -hold -from [get_clocks SPI_DEV_FAST_PASS_IN_CLK] \
-#    -to [get_ports ${SPI_DEV_DATA_PORTS}] \
-#    -through [get_pins -leaf -filter "@pin_direction == out" -of_objects \
-#               [get_nets -segments -of_objects \
-#                 [get_pins top_earlgrey/u_spi_device/u_p2s/data_i*]]]
-
 # This path is from locality logic that is on the *_IN_CLK domain and selects
 # between fixed values or the return-by-hw register value. The flopped bits
 # settle in the middle of the command/address phase, many cycles before the
@@ -999,6 +1189,401 @@ set_false_path -from [get_clocks SPI_DEV_FAST_PASS_CSB_CLK] \
         [get_nets -segments -of_objects \
             [get_pins u_ast/u_scan_rst_n/in_i*]]]
 
+# Alex Williams SPI_TPM constraints
+set_false_path -from [get_clocks SPI_TPM_CLK] -through [get_pins -leaf -filter "@pin_direction == out" -of_objects [get_nets -segments -of_objects  [get_pins top_earlgrey/u_spi_device/u_s2p/data_valid_o]]]
+set_false_path -from [get_clocks SPI_TPM_CLK] -through [get_pins -leaf -filter "@pin_direction == out" -of_objects [get_nets -segments -of_objects [get_pins top_earlgrey/u_spi_device/u_s2p/data_o*]]]
+ set_false_path -from [get_clocks SPI_TPM_CLK] -to [get_pins -leaf -filter "@pin_direction == in" -of_objects [get_cells -filter "@is_sequential" top_earlgrey/u_spi_device/u_passthrough/*]]
+
+#leonids updated based on interaction with Alex
+set_multicycle_path -setup 2 -from [get_ports ${TPM_CSB_PORT}]     -to [get_clocks SPI_TPM_CLK]
+set_multicycle_path -hold -end 1 -from [get_ports ${TPM_CSB_PORT}] -to [get_clocks SPI_TPM_CLK]
+
+
+set_false_path -from [get_clocks SPI_DEV_CLK] -through [get_cells top_earlgrey/u_sysrst_ctrl_aon/*]
+set_false_path -from [get_clocks SPI_DEV_HC_CLK] -through [get_cells top_earlgrey/u_sysrst_ctrl_aon/*]
+set_false_path -from [get_clocks SPI_HOST_CLK] -through [get_cells top_earlgrey/u_sysrst_ctrl_aon/*]
+set_false_path -from [get_clocks SPI_DEV_FAST_PASS_CLK] -through [get_cells top_earlgrey/u_sysrst_ctrl_aon/*] ; #leonids updated based on interaction with Alex
+
+set_false_path -from SPI_HOST_D* -to SPI_HOST_D*
+set_false_path -from SPI_DEV_D* -to SPI_DEV_D*
+set_false_path -from SPI_DEV_CS_L -to SPI_DEV_D*
+
+##########################################
+# SPI HOST 1                             #
+##########################################
+
+# 1. Rework the blanket constraints for the muxed I/Os to only apply to the IO_DIV4_CLK IPs. Only SPI_HOST1 is on IO_DIV2_CLK, and its constraints are special:
+# aggregate all IO banks
+set IO_BANKS [get_ports IOA*]
+append_to_collection IO_BANKS [get_ports IOB*]
+append_to_collection IO_BANKS [get_ports IOC*]
+append_to_collection IO_BANKS [get_ports IOR*]
+
+# constrain muxed IOs running on IO_DIV4_CLK. Note that IO_DIV2_CLK is only used
+# for SPI_HOST1, which has special constraints that are defined later.
+set IO_IN_DEL_FRACTION 0.4
+set IO_OUT_DEL_FRACTION 0.4
+
+# IO_DIV4_CLK IPs are all either asynchronous or have a loose skew requirement.
+# Constrain the max delay from reg to port and port to reg, and ignore hold time.
+set IO_DIV4_IN_DEL    [expr ${IO_IN_DEL_FRACTION} * ${IO_TCK_PERIOD} * 4.0]
+set IO_DIV4_OUT_DEL   [expr ${IO_OUT_DEL_FRACTION} * ${IO_TCK_PERIOD} * 4.0]
+
+set_input_delay ${IO_DIV4_IN_DEL}   ${IO_BANKS} -clock IO_DIV4_CLK -add_delay
+set_output_delay ${IO_DIV4_OUT_DEL} ${IO_BANKS} -clock IO_DIV4_CLK -add_delay
+
+# 2. Create the generated clocks for SPI_HOST1, input and output delays, and multi-cycle paths just like SPI_HOST0. Place these after the SPI_HOST0 constraints.
+
+###########################################
+# SPI_HOST_1 timing (full-cycle sampling) #
+###########################################
+# Preferred sites for SPI HOST 1
+set SPI_HOST1_CLK_PORT IOB3
+set SPI_HOST1_DATA_PORTS "IOB0 IOB1 IOB2"
+
+set SPI_HOST1_SRC_CLK [get_pins top_earlgrey/u_spi_host1/u_spi_core/u_fsm/u_sck_flop/*/clk_i]
+set SPI_HOST1_DIV_CLK [get_pins top_earlgrey/u_spi_host1/u_spi_core/u_fsm/u_sck_flop/*/q_o[0]]
+
+# First model the clock divider that generates a new frequency internally.
+create_generated_clock -name SPI_HOST1_INTERNAL_CLK -divide_by 2 -add \
+  -source ${SPI_HOST1_SRC_CLK} \
+  -master_clock [get_clocks IO_DIV2_CLK] \
+  [get_pins ${SPI_HOST1_DIV_CLK}]
+
+# Then create a derived clock at the top-level port for input and output delays.
+create_generated_clock -name SPI_HOST1_CLK -divide_by 1 -add \
+  -source [get_pins ${SPI_HOST1_DIV_CLK}] \
+  -master_clock [get_clocks SPI_HOST1_INTERNAL_CLK] \
+  [get_ports ${SPI_HOST1_CLK_PORT}]
+
+if {$spec_constr} {
+set_input_delay  -clock SPI_HOST1_CLK -clock_fall -min ${SPI_HOST_IN_DEL_MIN} \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] -add_delay
+set_input_delay  -clock SPI_HOST1_CLK -clock_fall -max ${SPI_HOST_IN_DEL_MAX} \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] -add_delay
+set_output_delay -clock SPI_HOST1_CLK -min ${SPI_HOST_OUT_DEL_MIN} \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] -add_delay
+set_output_delay -clock SPI_HOST1_CLK -max ${SPI_HOST_OUT_DEL_MAX} \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] -add_delay
+} else {
+set_input_delay -min $spi_host1_inp_min  [get_ports ${SPI_HOST1_DATA_PORTS}] \
+    -clock_fall -clock SPI_HOST1_CLK -add_delay
+set_input_delay -max $spi_host1_inp_max  [get_ports ${SPI_HOST1_DATA_PORTS}] \
+    -clock_fall -clock SPI_HOST1_CLK -add_delay
+set_output_delay -min $spi_host1_out_val_min \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] \
+    -clock SPI_HOST1_CLK -add_delay
+set_output_delay -max $spi_host1_out_val_max \
+    [get_ports ${SPI_HOST1_DATA_PORTS}] \
+    -clock SPI_HOST1_CLK -add_delay
+}
+# Multi-cycle path to adjust the hold edge, since launch and capture edges are
+# opposite in the SPI_HOST1_CLK domain.
+set_multicycle_path -setup -start 1 \
+    -from [get_clocks IO_DIV2_CLK] \
+    -to [get_clocks SPI_HOST1_CLK]
+set_multicycle_path -hold -start 1 \
+    -from [get_clocks IO_DIV2_CLK] \
+    -to [get_clocks SPI_HOST1_CLK]
+
+# set multicycle path for data going from SPI_HOST1_CLK to logic
+# the SPI host logic will read these paths at "full cycle"
+set_multicycle_path -setup -end 2 \
+    -from [get_clocks SPI_HOST1_CLK] \
+    -to [get_clocks IO_DIV2_CLK]
+set_multicycle_path -hold -end 1 \
+    -from [get_clocks SPI_HOST1_CLK] \
+    -to [get_clocks IO_DIV2_CLK]
+
+# 3. Adjust the asynchronous clock groups so SPI_HOST1_CLK is grouped with IO_DIV2_CLK.
+
+# -    -group [get_clocks IO_DIV2_CLK                                  ] \
+# +    -group [get_clocks {IO_DIV2_CLK SPI_HOST1_CLK}                  ] \
+
+# Approved by Ziv
+#  SPI_HOST_D0
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_9__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_HOST_D1
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_10__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_HOST_D2
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_11__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_HOST_D3
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_12__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_DEV_D0
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_15__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_DEV_D1
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_16__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_DEV_D2
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_17__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#  SPI_DEV_D3
+set_false_path -hold -fall_through [get_pins u_padring/gen_dio_pads_18__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#IOB0
+set_false_path -hold -fall_through [get_pins u_padring/gen_mio_pads_9__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#IOB1
+set_false_path -hold -fall_through [get_pins u_padring/gen_mio_pads_10__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#IOB2
+set_false_path -hold -fall_through [get_pins u_padring/gen_mio_pads_11__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+#IOB3
+set_false_path -hold -fall_through [get_pins u_padring/gen_mio_pads_12__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE]
+
+# For SPI_HOST1, I/O timing is only closed on pads IOB0, IOB1, IOB2, and IOB3 (see below for details).
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA0
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA1
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA2
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA3
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA4
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA5
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA6
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA7
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOA8
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB10
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB11
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB12
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB4
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB5
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB6
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB7
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB8
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB9
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC0
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC1
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC10
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC11
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC12
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC2
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC3
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC4
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC5
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC6
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC7
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC8
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOC9
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR0
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR10
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR11
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR12
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR13
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR2
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR3
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR4
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR5
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR6
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOR7
+
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB0 -to IO_DIV2_CLK
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB1 -to IO_DIV2_CLK
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB2 -to IO_DIV2_CLK
+set_false_path  -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOR1 -to IO_DIV2_CLK
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOR1 -to IO_DIV2_CLK
+
+## begin: SPI Host 1 constraints for PrimeTime
+
+########################################
+# SPI Host 1 constraints for PrimeTime #
+########################################
+# Note that these set_case_analysis and set_false_path constraints have not been used for synthesis but as PrimeTime waivers only.
+if { $synopsys_program_name eq "pt_shell"  } {
+# SPI_HOST1 CSB (MioOut 51 -> mux sel 54) drives IOB0 (MIO pad 9):
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[0]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[1]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[2]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[3]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[4]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[5]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_9/q[6]
+
+# SPI_HOST1 SD0 (MioOut 38 -> mux sel 41) drives IOB1 (MIO pad 10):
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[0]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[1]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[2]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[3]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[4]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[5]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_10/q[6]
+
+# IOB2 (MIO pad 11 -> mux sel 13) drives SPI_HOST1 SD1 (MioIn 39):
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[0]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[1]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[2]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[3]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[4]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_periph_insel_39/q[5]
+
+# SPI_HOST1 does not drive IOB2.
+set_false_path -from IO_DIV2_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -to IOB2
+
+# SPI_HOST1 SCK (MioOut 50 -> mux 53) drives IOB3 (MIO pad 12):
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[0]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[1]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[2]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[3]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[4]
+set_case_analysis 1 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[5]
+set_case_analysis 0 top_earlgrey/u_pinmux_aon/u_reg/u_mio_outsel_12/q[6]
+
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB0 -to IO_DIV2_CLK
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB1 -to IO_DIV2_CLK
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -through [get_cells -hierarchical -filter "full_name =~ *u_spi_host1*"] -through IOB2 -to IO_DIV2_CLK
+
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA0
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA1
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA2
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA3
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA4
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA5
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA6
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA7
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOA8
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB10
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB11
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB12
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB4
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB5
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB6
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB7
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB8
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOB9
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC0
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC1
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC10
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC11
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC12
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC2
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC3
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC4
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC5
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC6
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC7
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC8
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOC9
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR0
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR10
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR11
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR12
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR13
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR2
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR3
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR4
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR5
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR6
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR7
+set_false_path  -from SPI_HOST1_INTERNAL_CLK -to   IOR1
+}
+## end: SPI Host 1 constraints for PrimeTime
+
+set_false_path  -through   [get_pins -hierarchical -filter "full_name =~ *PI2C_33_50_T_DR/IE"] -through [get_pins -hierarchical -filter "full_name =~ *PI2C_33_50_T_DR/Y"]
+
+#leonids 06Jul False path that prevent SPI report
+set_false_path -from [get_clocks SPI*] -through [get_cells -hierarchical -filter "full_name =~ *u_ast_dft*"]
+
+#leonids 06Jul24 updated based on interaction with Alex
+# For the false clock-gating check, we could try something like this to remove the CSB "clock" from the analysis:
+set_sense -stop_propagation  \
+    -clocks SPI_DEV_CSB_CLK \
+    [get_pins -leaf \
+        -filter "@pin_direction == in and full_name =~ top_earlgrey/u_spi_device/u_passthrough/*" \
+        -of_objects \
+            [get_nets -segments -of_objects \
+                [get_pins top_earlgrey/u_spi_device/u_passthrough/rst_ni] \
+            ] \
+    ]
+set_sense -stop_propagation  \
+    -clocks SPI_DEV_*PASS_CSB_CLK \
+    [get_pins -leaf \
+        -filter "@pin_direction == in and full_name =~ top_earlgrey/u_spi_device/u_passthrough/*" \
+        -of_objects \
+            [get_nets -segments -of_objects \
+                [get_pins top_earlgrey/u_spi_device/u_passthrough/rst_ni] \
+            ] \
+    ]
+#leonids updated constraints probided by Alex do not prevent repot - Temp use of the next set_disable_clock_gating_check
+set_disable_clock_gating_check [get_cells -of_objects [gpo top_earlgrey/u_spi_device/u_passthrough/passthrough_o_csb]]
+
+# SPI Slew Rate and Drive Strength Constraints
+
+#  SPI_HOST_D0
+set_case_analysis 0 u_padring/gen_dio_pads_9__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_9__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_9__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_9__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_HOST_D1
+set_case_analysis 0 u_padring/gen_dio_pads_10__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_10__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_10__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_10__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_HOST_D2
+set_case_analysis 0 u_padring/gen_dio_pads_11__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_11__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_11__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_11__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_HOST_D3
+set_case_analysis 0 u_padring/gen_dio_pads_12__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_12__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_12__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_12__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_HOST_CLK
+set_case_analysis 0 u_padring/gen_dio_pads_13__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_13__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_13__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 1 u_padring/gen_dio_pads_13__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+set_case_analysis 1 u_padring/gen_dio_pads_13__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE
+#  SPI_HOST_CS_L
+set_case_analysis 0 u_padring/gen_dio_pads_14__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_14__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_14__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 1 u_padring/gen_dio_pads_14__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+set_case_analysis 1 u_padring/gen_dio_pads_14__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/OE
+#  SPI_DEV_D0
+set_case_analysis 0 u_padring/gen_dio_pads_15__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_15__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_15__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_15__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_DEV_D1
+set_case_analysis 0 u_padring/gen_dio_pads_16__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_16__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_16__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_16__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_DEV_D2
+set_case_analysis 0 u_padring/gen_dio_pads_17__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_17__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_17__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_17__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_DEV_D3
+set_case_analysis 0 u_padring/gen_dio_pads_18__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_18__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_18__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 0 u_padring/gen_dio_pads_18__u_dio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_DEV_CLK
+set_case_analysis 0 u_padring/gen_dio_pads_19__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_19__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_19__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 1 u_padring/gen_dio_pads_19__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#  SPI_DEV_CS_L
+set_case_analysis 0 u_padring/gen_dio_pads_20__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_dio_pads_20__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_dio_pads_20__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+set_case_analysis 1 u_padring/gen_dio_pads_20__u_dio_pad/gen_techlib_u_impl_techlib/gen_input_only_u_pad_macro_PBIDIR_33_33_FS_DR/IS
+#IOA7
+# Open drain pads have just one drive strength bit.
+set_case_analysis 1 u_padring/gen_mio_pads_7__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_od_compat_u_pad_macro_PI2C_33_50_T_DR/DS
+set_case_analysis 1 u_padring/gen_mio_pads_7__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_od_compat_u_pad_macro_PI2C_33_50_T_DR/IS
+#IOB0
+set_case_analysis 0 u_padring/gen_mio_pads_9__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_mio_pads_9__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_mio_pads_9__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+#IOB1
+set_case_analysis 0 u_padring/gen_mio_pads_10__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_mio_pads_10__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_mio_pads_10__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+#IOB2
+set_case_analysis 0 u_padring/gen_mio_pads_11__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_mio_pads_11__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_mio_pads_11__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+#IOB3
+set_case_analysis 0 u_padring/gen_mio_pads_12__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/SR
+set_case_analysis 1 u_padring/gen_mio_pads_12__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS0
+set_case_analysis 1 u_padring/gen_mio_pads_12__u_mio_pad/gen_techlib_u_impl_techlib/gen_bidir_u_pad_macro_PBIDIR_33_33_FS_DR/DS1
+
 ####################
 # SPI-specific CDC #
 ####################
@@ -1013,7 +1598,6 @@ set_clock_groups -physically_exclusive \
 #####################
 # CDC               #
 #####################
-# NOTE: Bad CDCs?
 # SPI_DEV_CSB_CLK -> SPI_HOST_CLK
 #
 set SPI_DEV_CLKS "SPI_DEV_CLK SPI_DEV_IN_CLK SPI_DEV_OUT_CLK SPI_DEV_CSB_CLK"
@@ -1031,7 +1615,7 @@ set_clock_groups -name group1 -async                                  \
     -group [get_clocks USB_CLK                                      ] \
     -group [get_clocks "${SPI_DEV_CLKS} ${SPI_DEV_HC_CLKS} ${SPI_DEV_SLOW_PASS_CLKS} ${SPI_DEV_FAST_PASS_CLKS} ${SPI_TPM_CLKS}"] \
     -group [get_clocks {IO_CLK SPI_HOST_CLK}       ] \
-    -group [get_clocks IO_DIV2_CLK                                  ] \
+    -group [get_clocks {IO_DIV2_CLK SPI_HOST1_CLK SPI_HOST1_INTERNAL_CLK} ] \
     -group [get_clocks IO_DIV4_CLK                                  ] \
     -group [get_clocks "JTAG_TCK RV_JTAG_TCK LC_JTAG_TCK"           ] \
     -group [get_clocks AON_CLK                                      ]
@@ -1076,3 +1660,31 @@ puts "Done applying constraints for top level"
 
 # assume a value of 0 for the open drain pad attribute
 set_case_analysis 0 [get_pins u_padring/*_pad/attr_i?od_en*]
+
+#SPI propagation through flop
+set_sense -stop_propagation top_earlgrey/u_spi_device/u_reg/u_control_mode/q_reg*/Q
+set_sense -stop_propagation top_earlgrey/u_pinmux_aon/dio_pad_attr_q_reg_*__invert/Q
+set_sense -stop_propagation top_earlgrey/u_pinmux_aon/dio_out_retreg_q_reg*/Q
+set_sense -stop_propagation top_earlgrey/u_pinmux_aon/u_reg/u_dio_pad_sleep_status_en*/q_reg*/Q
+
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_prim_lc_sync_lc_dft_en/gen_flops_u_prim_flop_2sync/gen_generic_u_impl_generic/u_sync_2/gen_techlib_u_impl_techlib/gen_flops*_u_size_only_reg/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_prim_lc_sender_pinmux_hw_debug_en/gen_flops_u_prim_flop/u_secure_anchor_flop/gen_techlib_u_impl_techlib/gen_flops*_u_size_only_reg/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/mio_pad_attr_q_reg_*input_disable/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/tap_strap_q_reg*/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/mio_pad_attr_q_reg*invert/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/mio_pad_attr_q_reg*input_disable/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_prim_lc_sender_pinmux_hw_debug_en/gen_flops_u_prim_flop/u_secure_anchor_flop/gen_techlib_u_impl_techlib/gen_flops_*u_size_only_reg/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/u_prim_lc_sync_lc_dft_en/gen_flops_u_prim_flop_2sync/gen_generic_u_impl_generic/u_sync_2/gen_techlib_u_impl_techlib/gen_flops_*u_size_only_reg/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/u_pinmux_strap_sampling/tap_strap_q_reg*/CK -to [get_ports IO*]
+set_false_path -from top_earlgrey/u_pinmux_aon/dio_pad_attr_q_reg*input_disable/CK -to [get_ports IO*]
+
+if { $synopsys_program_name  == "pt_shell" } {
+  set_max_delay 5 -from [get_pins top_earlgrey/u_usbdev/usbdev_impl/u_usb_fs_nb_pe/u_usb_fs_tx/u_*_flop/${FLOP_PATH}/Q] \
+                  -to   [get_ports USB_*] -probe
+  set_max_delay 5 -from [get_ports USB_*] \
+                  -to   [get_pins top_earlgrey/u_usbdev/i_usbdev_iomux/cdc_io_to_usb/gen_generic_u_impl_generic/u_sync_1/gen_techlib_u_impl_techlib/gen_flops_0__gen_reset_to_0_u_size_only_reg/D] -probe
+  set_max_delay -from ${IO_BANKS} -to ${IO_BANKS} -through [get_cells top_earlgrey/u_sysrst_ctrl_aon/*] ${SYSRST_MAXDELAY} -probe
+}
+
+set_clock_uncertainty -setup  ${SETUP_CLOCK_UNCERTAINTY} [get_clocks IO_DIV2_CLK]
+set_clock_uncertainty -setup  ${SETUP_CLOCK_UNCERTAINTY} [get_clocks IO_DIV4_CLK]
diff --git a/hw/top_earlgrey/syn/ot.sdc_setup.tcl b/hw/top_earlgrey/syn/ot.sdc_setup.tcl
new file mode 100644
index 0000000000000..40897dfcbe110
--- /dev/null
+++ b/hw/top_earlgrey/syn/ot.sdc_setup.tcl
@@ -0,0 +1,14 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Generic parameters for sdc file
+
+set CLK_PERIOD_FACTOR 0.95
+set MAIN_TCK_FACTOR   0.85
+set MAIN_CLK_PIN u_ast/clk_src_sys_o
+set USB_CLK_PIN  u_ast/clk_src_usb_o
+set IO_CLK_PIN   u_ast/clk_src_io_o
+set CLK_PIN      clk_o
+set CLK_DST_PIN  clk_o
+set AON_CLK_PIN  u_ast/clk_src_aon_o
diff --git a/hw/top_earlgrey/util/vivado_hook_write_bitstream_pre.tcl b/hw/top_earlgrey/util/vivado_hook_write_bitstream_pre.tcl
index a399145c43827..e0138e072edf0 100644
--- a/hw/top_earlgrey/util/vivado_hook_write_bitstream_pre.tcl
+++ b/hw/top_earlgrey/util/vivado_hook_write_bitstream_pre.tcl
@@ -19,89 +19,127 @@ set_property BITSTREAM.CONFIG.USR_ACCESS TIMESTAMP [current_design]
 #
 # Args:
 #   filename:            Path to the output file.
-#   brams:               A list of BRAM cells.
-#   mem_type:            The BRAM type, e.g. "RAMB36".
-#   fake_word_width:     If non-zero, pretend that $brams covers
-#                        `fake_word_width` bits. Influences the values of the
-#                        MMI's <AddressSpace> and <DataWidth> tags.
-#   addr_end_multiplier: A coefficient applied to the address space. Influences
-#                        the values of the MMI's <AddressSpace> and
-#                        <AddressRange> tags.
+#   mem_info:            Dictionary of dictionaries with following properties for each (inner) value:
+#       brams:               A list of BRAM cells.
+#       mem_type_regex:      The BRAM type regex, dividing the mem type and site, e.g. {(RAMB\d+)_(\w+)}.
+#       fake_word_width:     If non-zero, pretend that $brams covers
+#                            `fake_word_width` bits. Influences the values of the
+#                            MMI's <AddressSpace> and <DataWidth> tags.
+#       addr_end_multiplier: A coefficient applied to the address space. Influences
+#                            the values of the MMI's <AddressSpace> and
+#                            <AddressRange> tags.
+#       schema:              Either "Processor" or "MemoryArray"
 #   designtask_count:    A number used for logging with `send_msg`.
-proc generate_mmi {filename brams mem_type fake_word_width addr_end_multiplier designtask_count} {
+proc generate_mmi {filename mem_infos designtask_count} {
     send_msg "${designtask_count}-1" INFO "Dumping MMI to ${filename}"
 
-    if {[llen $brams] == 0} {
-        send_msg "${designtask_count}-1" INFO "Cannot make MMI for zero BRAMs"
-        return
-    }
-
     set workroot [file dirname [info script]]
     set filepath "${workroot}/${filename}"
     set fileout [open $filepath "w"]
-
-    set fake_slice_width [expr $fake_word_width / [llen $brams]]
-
-    # Calculate the overall address space.
-    set space 0
-    foreach inst [lsort -dictionary $brams] {
-        set slice_begin [get_property ram_slice_begin [get_cells $inst]]
-        set slice_end [get_property ram_slice_end [get_cells $inst]]
-        if {$slice_begin eq {} || $slice_end eq {}} {
-            send_msg "${designtask_count}-2" ERROR "Extraction of ${filename} information failed."
-        }
-        set slice_width [expr {$slice_end - $slice_begin + 1}]
-        if {$slice_width < $fake_slice_width} {
-            set slice_end [expr {$slice_begin + $fake_slice_width - 1}]
-            set slice_width $fake_slice_width
-        }
-        set addr_begin [get_property ram_addr_begin [get_cells $inst]]
-        set addr_end [get_property ram_addr_end [get_cells $inst]]
-        if {$addr_begin eq {} || $addr_end eq {}} {
-            send_msg "${designtask_count}-3" ERROR "Extraction of ${filename} MMI information failed."
-        }
-
-        # Calculate total number of bits.
-        set space [expr {$space + ($addr_end - $addr_begin + 1) * $slice_width}]
-        set last_slice_width $slice_width
-    }
-    set space [expr {($space * $addr_end_multiplier / 8) - 1}]
-
-    # Generate the MMI.
+    set part [get_property PART [current_design]]
     puts $fileout "<?xml version=\"1.0\" encoding=\"UTF-8\"?>"
     puts $fileout "<MemInfo Version=\"1\" Minor=\"1\">"
-    puts $fileout "  <Processor Endianness=\"Little\" InstPath=\"dummy\">"
-    puts $fileout "  <AddressSpace Name=\"dummy_addrspace\" Begin=\"0\" End=\"$space\">"
-    puts $fileout "      <BusBlock>"
 
-    set loc_prefix "${mem_type}_"
+    dict for {id mem_info} $mem_infos {
+        dict with mem_info {
+            if {[llen $brams] == 0} {
+                send_msg "${designtask_count}-1" INFO "Cannot make MMI for zero BRAMs"
+                return
+            }
 
-    set part [get_property PART [current_design]]
-    foreach inst [lsort -dictionary $brams] {
-        set loc [get_property LOC [get_cells $inst]]
-        set loc [string trimleft $loc $loc_prefix]
-        set slice_begin [get_property ram_slice_begin [get_cells $inst]]
-        set slice_end [get_property ram_slice_end [get_cells $inst]]
-        set slice_width [expr {$slice_end - $slice_begin + 1}]
-        if {$slice_width < $fake_slice_width} {
-            set slice_end [expr {$slice_begin + $fake_slice_width - 1}]
-            set slice_width $fake_slice_width
+            set fake_slice_width [expr $fake_word_width / [llen $brams]]
+
+            # Calculate the overall address space.
+            set space 0
+            set width 0
+            foreach inst [lsort -dictionary $brams] {
+                set slice_begin [get_property ram_slice_begin [get_cells $inst]]
+                set slice_end [get_property ram_slice_end [get_cells $inst]]
+                if {$slice_begin eq {} || $slice_end eq {}} {
+                    send_msg "${designtask_count}-2" ERROR "Extraction of ${filename} information failed."
+                }
+                set slice_width [expr {$slice_end - $slice_begin + 1}]
+                if {$slice_width < $fake_slice_width} {
+                    set slice_end [expr {$slice_begin + $fake_slice_width - 1}]
+                    set slice_width $fake_slice_width
+                }
+                set addr_begin [get_property ram_addr_begin [get_cells $inst]]
+                set addr_end [get_property ram_addr_end [get_cells $inst]]
+                if {$addr_begin eq {} || $addr_end eq {}} {
+                    send_msg "${designtask_count}-3" ERROR "Extraction of ${filename} MMI information failed."
+                }
+
+                # Calculate total number of bits.
+                set space [expr {$space + ($addr_end - $addr_begin + 1) * $slice_width}]
+                set width [expr {$width + $slice_width}]
+                set last_slice_width $slice_width
+            }
+            set space [expr {($space * $addr_end_multiplier / 8) - 1}]
+
+            # Generate the MMI.
+            if { $schema eq "Processor" } {
+                puts $fileout "  <Processor Endianness=\"Little\" InstPath=\"$id\">"
+                puts $fileout "    <AddressSpace Name=\"dummy_addrspace\" Begin=\"0\" End=\"$space\">"
+                puts $fileout "      <BusBlock>"
+            } else {
+                puts $fileout "  <MemoryArray InstPath=\"$id\" MemoryPrimitive=\"auto\" MemoryConfiguration=\"enabled_configuration\">"
+                # Memory type could be retrieved from the RTL_RAM_TYPE property, if desired,
+                # but we hard-code it here for now.
+                puts $fileout "    <MemoryLayout Name=\"$id\" CoreMemory_Width=\"$width\" MemoryType=\"RAM_SP\">"
+            }
+
+            foreach inst [lsort -dictionary $brams] {
+                set loc [get_property LOC [get_cells $inst]]
+                set loc_matches [regexp $mem_type_regex $loc loc_match loc_prefix loc_suffix]
+                if {$loc_matches == 0} {
+                    send_msg "${designtask_count}-4" ERROR "Extraction of ${filename} mem location failed."
+                }
+                set slice_begin [get_property ram_slice_begin [get_cells $inst]]
+                set slice_end [get_property ram_slice_end [get_cells $inst]]
+                set slice_width [expr {$slice_end - $slice_begin + 1}]
+                if {$slice_width < $fake_slice_width} {
+                    set slice_end [expr {$slice_begin + $fake_slice_width - 1}]
+                    set slice_width $fake_slice_width
+                }
+                set addr_begin [get_property ram_addr_begin [get_cells $inst]]
+                set addr_end [get_property ram_addr_end [get_cells $inst]]
+                set addr_end [expr {($addr_end + 1) * $addr_end_multiplier - 1}]
+                set bit_layout [get_property "MEM.PORTA.DATA_BIT_LAYOUT" [get_cells $inst]]
+                set read_width_a [get_property "READ_WIDTH_A" [get_cells $inst]]
+                set read_width_b [get_property "READ_WIDTH_B" [get_cells $inst]]
+                set slr_index [get_property "SLR_INDEX" [get_cells $inst]]
+                if {$schema eq "Processor"} {
+                    puts $fileout "        <BitLane MemType=\"$loc_prefix\" Placement=\"$loc_suffix\">"
+                    puts $fileout "          <DataWidth MSB=\"$slice_end\" LSB=\"$slice_begin\"/>"
+                    puts $fileout "          <AddressRange Begin=\"$addr_begin\" End=\"$addr_end\"/>"
+                    puts $fileout "          <Parity ON=\"false\" NumBits=\"0\"/>"
+                    puts $fileout "        </BitLane>"
+                } else {
+                    puts $fileout "      <BRAM MemType=\"$loc_prefix\" Placement=\"$loc_suffix\" Read_Width_A=\"$read_width_a\" Read_Width_B=\"$read_width_b\" SLR_INDEX=\"$slr_index\">"
+                    puts $fileout "        <DataWidth_PortA MSB=\"$slice_end\" LSB=\"$slice_begin\"/>"
+                    puts $fileout "        <AddressRange_PortA Begin=\"$addr_begin\" End=\"$addr_end\"/>"
+                    puts $fileout "        <BitLayout_PortA pattern=\"$bit_layout\"/>"
+                    puts $fileout "        <DataWidth_PortB MSB=\"0\" LSB=\"0\"/>"
+                    puts $fileout "        <AddressRange_PortB Begin=\"0\" End=\"0\"/>"
+                    puts $fileout "        <BitLayout_PortB pattern=\"\"/>"
+                    puts $fileout "        <Parity ON=\"false\" NumBits=\"0\"/>"
+                    puts $fileout "      </BRAM>"
+                }
+            }
+            if {$schema eq "Processor"} {
+                puts $fileout "      </BusBlock>"
+                puts $fileout "    </AddressSpace>"
+                puts $fileout "  </Processor>"
+            } else {
+                puts $fileout "    </MemoryLayout>"
+                puts $fileout "  </MemoryArray>"
+            }
         }
-        set addr_begin [get_property ram_addr_begin [get_cells $inst]]
-        set addr_end [get_property ram_addr_end [get_cells $inst]]
-        set addr_end [expr {($addr_end + 1) * $addr_end_multiplier - 1}]
-        puts $fileout "        <BitLane MemType=\"$mem_type\" Placement=\"$loc\">"
-        puts $fileout "          <DataWidth MSB=\"$slice_end\" LSB=\"$slice_begin\"/>"
-        puts $fileout "          <AddressRange Begin=\"$addr_begin\" End=\"$addr_end\"/>"
-        puts $fileout "          <Parity ON=\"false\" NumBits=\"0\"/>"
-        puts $fileout "        </BitLane>"
     }
-    puts $fileout "      </BusBlock>"
-    puts $fileout "    </AddressSpace>"
-    puts $fileout "  </Processor>"
-    puts $fileout "<Config>"
-    puts $fileout "  <Option Name=\"Part\" Val=\"$part\"/>"
-    puts $fileout "</Config>"
+
+    puts $fileout "  <Config>"
+    puts $fileout "    <Option Name=\"Part\" Val=\"$part\"/>"
+    puts $fileout "  </Config>"
     puts $fileout "</MemInfo>"
     close $fileout
     send_msg "${designtask_count}-4" INFO "MMI dumped to ${filepath}"
@@ -161,6 +199,15 @@ switch ${fpga_family} {
     set bram_regex "BMEM.*.*"
   }
 }
+set mem_type_regex {(RAMB\d+)_(\w+)}
+
+set gen_mem_info {{brams mem_type_regex fake_word_width addr_end_multiplier schema} {
+  dict set mem_info brams $brams
+  dict set mem_info mem_type_regex $mem_type_regex
+  dict set mem_info fake_word_width $fake_word_width
+  dict set mem_info addr_end_multiplier $addr_end_multiplier
+  return [dict set mem_info schema $schema]
+}}
 
 # The scrambled Boot ROM is actually 39 bits wide, but we need to pretend that
 # it's 40 bits, or else we will be unable to encode our ROM data in a MEM file
@@ -177,7 +224,7 @@ switch ${fpga_family} {
 # A hack that works is to pretend the data width is actually 40 bits. Updatemem
 # seems to write that extra zero bit into the ether without complaint.
 set rom_brams [split [get_cells -hierarchical -filter " PRIMITIVE_TYPE =~ ${bram_regex} && NAME =~ *u_rom_ctrl*"] " "]
-generate_mmi "rom.mmi" $rom_brams "RAMB36" 40 1 1
+dict set memInfo rom [apply $gen_mem_info $rom_brams $mem_type_regex 40 1 "Processor"]
 
 # OTP does not require faking the word width, but it has its own quirk. It seems
 # each 22-bit OTP word is followed by 15 zero words. The MMI's <AddressSpace>
@@ -185,7 +232,19 @@ generate_mmi "rom.mmi" $rom_brams "RAMB36" 40 1 1
 # that its data input overruns the address space. The workaround is to pretend
 # the address space is 16 times larger than we would normally compute.
 set otp_brams [split [get_cells -hierarchical -filter " PRIMITIVE_TYPE =~ ${bram_regex} && NAME =~ *u_otp_ctrl*"] " "]
-generate_mmi "otp.mmi" $otp_brams "RAMB18" 0 16 2
+dict set memInfo otp [apply $gen_mem_info $otp_brams $mem_type_regex 0 16 "Processor"]
+
+# The flash banks have 76-bit wide words. 64 bits are data, and 12 bits are metadata / integrity.
+for {set bank 0} {$bank < 2} {incr bank} {
+  for {set partition 0} {$partition < 3} {incr partition} {
+    set flash_info_brams [split [get_cells -hierarchical -filter " PRIMITIVE_TYPE =~ ${bram_regex} && NAME =~ *u_flash_ctrl*gen_prim_flash_banks[${bank}]*gen_info_types[${partition}].u_info_mem*gen_xpm.gen_split[0].*"] " "]
+    dict set memInfo "flash${bank}_info${partition}_data" [apply $gen_mem_info $flash_info_brams $mem_type_regex 0 1 "MemoryArray"]
+    set flash_info_brams [split [get_cells -hierarchical -filter " PRIMITIVE_TYPE =~ ${bram_regex} && NAME =~ *u_flash_ctrl*gen_prim_flash_banks[${bank}]*gen_info_types[${partition}].u_info_mem*gen_xpm.gen_split[64].*"] " "]
+    dict set memInfo "flash${bank}_info${partition}_intg" [apply $gen_mem_info $flash_info_brams $mem_type_regex 0 1 "MemoryArray"]
+  }
+}
+
+generate_mmi "memories.mmi" $memInfo 1
 
 # For debugging purposes, dump the INIT_XX strings for ROM and OTP.
 dump_init_strings "rom_init_strings.txt" $rom_brams 3
diff --git a/hw/top_englishbreakfast/chip_englishbreakfast_cw305.core b/hw/top_englishbreakfast/chip_englishbreakfast_cw305.core
index edacf154d3857..22b0e1d6d588a 100644
--- a/hw/top_englishbreakfast/chip_englishbreakfast_cw305.core
+++ b/hw/top_englishbreakfast/chip_englishbreakfast_cw305.core
@@ -8,6 +8,7 @@ description: "English Breakfast toplevel for the ChipWhisperer CW305 board"
 filesets:
   files_rtl_cw305:
     depend:
+      - lowrisc:prim_xilinx:prim_xilinx_default_pkg
       - lowrisc:systems:top_englishbreakfast:0.1
       - lowrisc:systems:ast
       - lowrisc:systems:topgen
diff --git a/hw/top_englishbreakfast/chip_englishbreakfast_verilator.core b/hw/top_englishbreakfast/chip_englishbreakfast_verilator.core
index a3002ac3a9e03..97d46ffe10d96 100644
--- a/hw/top_englishbreakfast/chip_englishbreakfast_verilator.core
+++ b/hw/top_englishbreakfast/chip_englishbreakfast_verilator.core
@@ -106,7 +106,7 @@ targets:
           - '--trace-params'
           - '--trace-max-array 1024'
           - '--unroll-count 512'
-          - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DVL_USER_STOP -DTOPLEVEL_NAME=chip_englishbreakfast_verilator"'
+          - '-CFLAGS "-std=c++17 -Wall -DVM_TRACE_FMT_FST -DVL_USER_STOP -DTOPLEVEL_NAME=chip_englishbreakfast_verilator"'
           - '-LDFLAGS "-pthread -lutil -lelf"'
           - '-Wall'
           # Execute simulation with four threads by default, which works best
diff --git a/hw/vendor/lowrisc_ibex.lock.hjson b/hw/vendor/lowrisc_ibex.lock.hjson
index 0de87ae676217..e5d2c04c98340 100644
--- a/hw/vendor/lowrisc_ibex.lock.hjson
+++ b/hw/vendor/lowrisc_ibex.lock.hjson
@@ -9,6 +9,6 @@
   upstream:
   {
     url: https://github.com/lowRISC/ibex.git
-    rev: 96a1c02ba03400a8b0d69f08b97004adc436dfb7
+    rev: 38c070939183cc10940b66c8e9e04eeca6b65470
   }
 }
diff --git a/hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv b/hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
index 79c2a87ecdae6..e764af0ebd6d1 100644
--- a/hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
+++ b/hw/vendor/lowrisc_ibex/rtl/ibex_controller.sv
@@ -352,7 +352,7 @@ module ibex_controller #(
 
     // As integrity error is the only internal interrupt implement, set irq_nm_* signals directly
     // within this generate block.
-    assign irq_nm_int       = mem_resp_intg_err_irq_set | mem_resp_intg_err_irq_pending_q;
+    assign irq_nm_int       = mem_resp_intg_err_irq_pending_q;
     assign irq_nm_int_cause = NMI_INT_CAUSE_ECC;
     assign irq_nm_int_mtval = mem_resp_intg_err_addr_q;
   end else begin : g_no_intg_irq_int
diff --git a/hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv b/hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv
index c78e510ee41e2..b4dc7ec347378 100644
--- a/hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv
+++ b/hw/vendor/lowrisc_ibex/rtl/ibex_counter.sv
@@ -55,8 +55,12 @@ module ibex_counter #(
   localparam int DspPragma = CounterWidth < 49 ? "yes" : "no";
   (* use_dsp = DspPragma *) logic [CounterWidth-1:0] counter_q;
 
-  // DSP output register requires synchronous reset.
-  `define COUNTER_FLOP_RST posedge clk_i
+  if (CounterWidth < 49) begin : g_dsp_counter
+    // DSP output register requires synchronous reset.
+    `define COUNTER_FLOP_RST posedge clk_i
+  end else begin : g_no_dsp_counter
+    `define COUNTER_FLOP_RST posedge clk_i or negedge rst_ni
+  end
 `else
   logic [CounterWidth-1:0] counter_q;
 
diff --git a/hw/vendor/lowrisc_ibex/rtl/ibex_register_file_fpga.sv b/hw/vendor/lowrisc_ibex/rtl/ibex_register_file_fpga.sv
index 7a0ae34b151fa..73e0afab2fab1 100644
--- a/hw/vendor/lowrisc_ibex/rtl/ibex_register_file_fpga.sv
+++ b/hw/vendor/lowrisc_ibex/rtl/ibex_register_file_fpga.sv
@@ -147,14 +147,14 @@ module ibex_register_file_fpga #(
       .out_o (mem_o_b)
     );
 
-    assign rdata_a_o = (raddr_a_i == '0) ? '0 : mem_o_a;
-    assign rdata_b_o = (raddr_b_i == '0) ? '0 : mem_o_b;
+    assign rdata_a_o = (raddr_a_i == '0) ? WordZeroVal : mem_o_a;
+    assign rdata_b_o = (raddr_b_i == '0) ? WordZeroVal : mem_o_b;
   end else begin : gen_no_rdata_mux_check
     // async_read a
-    assign rdata_a_o = (raddr_a_i == '0) ? '0 : mem[raddr_a_i];
+    assign rdata_a_o = (raddr_a_i == '0) ? WordZeroVal : mem[raddr_a_i];
 
     // async_read b
-    assign rdata_b_o = (raddr_b_i == '0) ? '0 : mem[raddr_b_i];
+    assign rdata_b_o = (raddr_b_i == '0) ? WordZeroVal : mem[raddr_b_i];
   end
 
   // we select
diff --git a/hw/vendor/patches/lowrisc_ibex/rtl/0001-Fix-fpga-register-file.patch b/hw/vendor/patches/lowrisc_ibex/rtl/0001-Fix-fpga-register-file.patch
new file mode 100644
index 0000000000000..2c63d084c0261
--- /dev/null
+++ b/hw/vendor/patches/lowrisc_ibex/rtl/0001-Fix-fpga-register-file.patch
@@ -0,0 +1,23 @@
+diff --git a/ibex_register_file_fpga.sv b/ibex_register_file_fpga.sv
+index 7a0ae34b15..73e0afab2f 100644
+--- a/ibex_register_file_fpga.sv
++++ b/ibex_register_file_fpga.sv
+@@ -147,14 +147,14 @@ module ibex_register_file_fpga #(
+       .out_o (mem_o_b)
+     );
+ 
+-    assign rdata_a_o = (raddr_a_i == '0) ? '0 : mem_o_a;
+-    assign rdata_b_o = (raddr_b_i == '0) ? '0 : mem_o_b;
++    assign rdata_a_o = (raddr_a_i == '0) ? WordZeroVal : mem_o_a;
++    assign rdata_b_o = (raddr_b_i == '0) ? WordZeroVal : mem_o_b;
+   end else begin : gen_no_rdata_mux_check
+     // async_read a
+-    assign rdata_a_o = (raddr_a_i == '0) ? '0 : mem[raddr_a_i];
++    assign rdata_a_o = (raddr_a_i == '0) ? WordZeroVal : mem[raddr_a_i];
+ 
+     // async_read b
+-    assign rdata_b_o = (raddr_b_i == '0) ? '0 : mem[raddr_b_i];
++    assign rdata_b_o = (raddr_b_i == '0) ? WordZeroVal : mem[raddr_b_i];
+   end
+ 
+   // we select
diff --git a/hw/vendor/patches/lowrisc_ibex/rtl/0002-Fix-fpga-counter-reset.patch b/hw/vendor/patches/lowrisc_ibex/rtl/0002-Fix-fpga-counter-reset.patch
new file mode 100644
index 0000000000000..f2e0506dd2368
--- /dev/null
+++ b/hw/vendor/patches/lowrisc_ibex/rtl/0002-Fix-fpga-counter-reset.patch
@@ -0,0 +1,19 @@
+diff --git a/ibex_counter.sv b/ibex_counter.sv
+index c78e510ee4..b4dc7ec347 100644
+--- a/ibex_counter.sv
++++ b/ibex_counter.sv
+@@ -55,8 +55,12 @@ module ibex_counter #(
+   localparam int DspPragma = CounterWidth < 49 ? "yes" : "no";
+   (* use_dsp = DspPragma *) logic [CounterWidth-1:0] counter_q;
+ 
+-  // DSP output register requires synchronous reset.
+-  `define COUNTER_FLOP_RST posedge clk_i
++  if (CounterWidth < 49) begin : g_dsp_counter
++    // DSP output register requires synchronous reset.
++    `define COUNTER_FLOP_RST posedge clk_i
++  end else begin : g_no_dsp_counter
++    `define COUNTER_FLOP_RST posedge clk_i or negedge rst_ni
++  end
+ `else
+   logic [CounterWidth-1:0] counter_q;
+ 
diff --git a/pyproject.toml b/pyproject.toml
new file mode 100644
index 0000000000000..c933b7bc49400
--- /dev/null
+++ b/pyproject.toml
@@ -0,0 +1,95 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+[project]
+name = "opentitan"
+version = "0.0.0"
+description = "Open-source hardware root-of-trust"
+requires-python = ">=3.8"
+
+dependencies = [
+  # Dependency management
+  "uv==0.4.10",
+
+   # Polyfill library
+  "importlib-resources ~= 5.12", # Need for Python<3.9
+  # This are condition dependency of importlib-resources
+  # Add it here otherwise it'll get dropped when uv/pip tries to lock dependency with Python>=3.10.
+  "zipp ~= 3.16", # Need for Python<3.10
+
+  # Keep sorted
+  "beautifulsoup4==4.12.2",
+  "hjson==3.1.0",
+  "libclang==16.0.0",
+  "libcst == 1.1.0", # 1.2.0+ needs Python 3.9+
+  "lxml ~= 5.0",
+  "mako==1.1.6",
+  "pluralizer==1.2.0",
+  "pycryptodome==3.15.0",
+  "pyelftools==0.29",
+  "pytest-timeout==2.1.0",
+  "pytest==7.0.1",
+  "pyyaml ~= 6.0.2",
+  "rich==12.6.0", # maximum version compatible with Python 3.6.8 (used on CentOS7 nightly regression machines)
+  "semantic_version==2.10.0",
+  "tabulate==0.8.10",
+  "typer==0.6.1",
+
+  # Dependencies: bitstreams cache
+  "jsonschema==4.17.3",
+  # These are conditional dependency of jsonschema when Python<3.9.
+  # Add them here otherwise they'll get dropped when uv/pip tries to lock dependency with Python>=3.9.
+  "pkgutil_resolve_name==1.3.10",
+
+  # Dependencies: gen-flash-img.py
+  "pyfinite==1.9.1",
+
+  # Dependencies: dv_sim
+  "enlighten==1.10.2",
+  "mistletoe==0.9.0",
+  # Premailer 3.9.0 broke the API by introducing an allow_loading_external_files
+  # argument that is now mandatory, but didn't exist in previous versions.
+  # To relax the constraint we either need to do a runtime detection, or switch all
+  # users to a newer version.
+  "premailer==3.8.0",
+
+  # Dependencies: check_dif_statuses.py
+  "pydriller==2.1",
+  "termcolor==1.1.0",
+
+  # Linters
+  "flake8 ~= 7.1",
+  "isort==5.10.1",
+  "mypy==0.971",
+  "yapf==0.32.0",
+
+  # Type stubs for mypy checking.
+  "types-pyyaml==6.0.11",
+  "types-tabulate==0.8.11",
+
+  # Dependencies of rules_fuzzing.
+  "absl-py==2.0.0",
+  "six==1.16.0",
+
+  # Dependency of sw/host/vendor/google_verible_verilog_syntax_py
+  "anytree==2.8.0",
+
+  # Dependency of third_party/tock
+  "tockloader==1.13",
+
+  # Development version with OT-specific changes
+  "fusesoc@https://github.com/lowRISC/fusesoc/archive/refs/tags/ot-0.5.dev0.zip",
+
+  # Development version with OT-specific changes
+  "edalize@https://github.com/lowRISC/edalize/archive/refs/tags/v0.4.0.zip",
+
+  # Development version of minimal ChipWhisperer toolchain with latest features
+  # and bug fixes. We fix the version for improved stability and manually update
+  # if necessary.
+  "chipwhisperer@https://github.com/newaetech/chipwhisperer-minimal/archive/2643131b71e528791446ee1bab7359120288f4ab.zip",
+]
+
+[tool.setuptools]
+# This is actually not a python project, we just use pyproject.toml to manage dependencies.
+py-modules = []
diff --git a/python-requirements.in b/python-requirements.in
deleted file mode 100644
index cfd2501f45e92..0000000000000
--- a/python-requirements.in
+++ /dev/null
@@ -1,72 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-# Keep sorted.
-beautifulsoup4==4.12.2
-hjson==3.1.0
-importlib_metadata==6.8.0
-libclang==16.0.0
-libcst==0.4.1
-lxml==4.9.2
-mako==1.1.6
-pip==23.2.1
-pip-tools==7.1.0
-pluralizer==1.2.0
-pycryptodome==3.15.0
-pyelftools==0.29
-pytest-timeout==2.1.0
-pytest==7.0.1
-pyyaml==6.0
-rich==12.6.0  # maximum version compatible with Python 3.6.8 (used on CentOS7 nightly regression machines)
-semantic_version==2.10.0
-tabulate==0.8.10
-typer==0.6.1
-
-# Dependencies: jsonschema, required for bitsreams cache
-importlib-resources==1.4.0; python_version >= "3.7"
-jsonschema==4.17.3; python_version >= "3.7"
-pkgutil_resolve_name==1.3.10; python_version >= "3.7"
-
-# Dependencies: gen-flash-img.py
-pyfinite==1.9.1
-
-# Dependencies: dv_sim
-enlighten==1.10.2
-mistletoe==0.9.0
-# Premailer 3.9.0 broke the API by introducing an allow_loading_external_files
-# argument that is now mandatory, but didn't exist in previous versions.
-# To relax the constraint we either need to do a runtime detection, or switch all
-# users to a newer version.
-premailer==3.8.0
-
-# Dependencies: check_dif_statuses.py
-pydriller==2.1
-termcolor==1.1.0
-
-# Linters
-flake8==5.0.4
-isort==5.10.1
-mypy==0.971
-yapf==0.32.0
-
-# Type stubs for mypy checking.
-# types-dataclasses is only needed for Python <= 3.6.
-types-dataclasses==0.6.6
-types-pkg_resources==0.1.3
-types-pyyaml==6.0.11
-types-tabulate==0.8.11
-
-# Dependency of sw/host/vendor/google_verible_verilog_syntax_py
-anytree==2.8.0
-
-# Development version with OT-specific changes
-https://github.com/lowRISC/fusesoc/archive/refs/tags/ot-0.5.dev0.zip
-
-# Development version with OT-specific changes
-https://github.com/lowRISC/edalize/archive/refs/tags/v0.4.0.zip
-
-# Development version of minimal ChipWhisperer toolchain with latest features
-# and bug fixes. We fix the version for improved stability and manually update
-# if necessary.
-https://github.com/newaetech/chipwhisperer-minimal/archive/2643131b71e528791446ee1bab7359120288f4ab.zip
diff --git a/python-requirements.txt b/python-requirements.txt
index 933ad5bc7eb5c..c16b24f3e19e3 100644
--- a/python-requirements.txt
+++ b/python-requirements.txt
@@ -5,217 +5,242 @@
 # THIS FILE HAS BEEN GENERATED, DO NOT EDIT MANUALLY. COMMAND:
 # ./util/sh/scripts/gen-python-requirements.sh
 
+absl-py==2.0.0 \
+    --hash=sha256:9a28abb62774ae4e8edbe2dd4c49ffcd45a6a848952a5eccc6a49f3f0fc1e2f3 \
+    --hash=sha256:d9690211c5fcfefcdd1a45470ac2b5c5acd45241c3af71eed96bc5441746c0d5
 anytree==2.8.0 \
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 beautifulsoup4==4.12.2 \
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+    --hash=sha256:b010a7a4fd316c3c484d482922d13044979e78d1861f0e0650423144c616a46a \
+    --hash=sha256:b1ac5992a838106edb89654e0aebfc24f5848ae2547d22c2c3f66454daa11971 \
+    --hash=sha256:b7b2d86dd06bfc2ade3312a83a5c364c7ec2e3498f8734282c6c3d4b07b346b8 \
+    --hash=sha256:b97e690a2118911e39b4042088092771b4ae3fc3aa86518f84b8cf6888dbdb41 \
+    --hash=sha256:bc2722592d8998c870fa4e290c2eec2c1569b87fe58618e67d38b4665dfa680d \
+    --hash=sha256:c0429126cf75e16c4f0ad00ee0eae4242dc652290f940152ca8c75c3a4b6ee8f \
+    --hash=sha256:c30197aa96e8eed02200a83fba2657b4c3acd0f0aa4bdc9f6c1af8e8962e0757 \
+    --hash=sha256:c4c3e6da02df6fa1410a7680bd3f63d4f710232d3139089536310d027950696a \
+    --hash=sha256:c75cb2a3e389853835e84a2d8fb2b81a10645b503eca9bcb98df6b5a43eb8886 \
+    --hash=sha256:c96836c97b1238e9c9e3fe90844c947d5afbf4f4c92762679acfe19927d81d77 \
+    --hash=sha256:d7f50a1f8c450f3925cb367d011448c39239bb3eb4117c36a6d354794de4ce76 \
+    --hash=sha256:d973f03c0cb71c5ed99037b870f2be986c3c05e63622c017ea9816881d2dd247 \
+    --hash=sha256:d98b1668f06378c6dbefec3b92299716b931cd4e6061f3c875a71ced1780ab85 \
+    --hash=sha256:d9c3cdf5390dcd29aa8056d13e8e99526cda0305acc038b96b30352aff5ff2bb \
+    --hash=sha256:dad3e487649f498dd991eeb901125411559b22e8d7ab25d3aeb1af367df5efd7 \
+    --hash=sha256:dccbe65bd2f7f7ec22c4ff99ed56faa1e9f785482b9bbd7c717e26fd723a1d1e \
+    --hash=sha256:dd78cfcda14a1ef52584dbb008f7ac81c1328c0f58184bf9a84c49c605002da6 \
+    --hash=sha256:e218488cd232553829be0664c2292d3af2eeeb94b32bea483cf79ac6a694e037 \
+    --hash=sha256:e358e64305fe12299a08e08978f51fc21fac060dcfcddd95453eabe5b93ed0e1 \
+    --hash=sha256:ea0d8d539afa5eb2728aa1932a988a9a7af94f18582ffae4bc10b3fbdad0626e \
+    --hash=sha256:eab677309cdb30d047996b36d34caeda1dc91149e4fdca0b1a039b3f79d9a807 \
+    --hash=sha256:eb8178fe3dba6450a3e024e95ac49ed3400e506fd4e9e5c32d30adda88cbd407 \
+    --hash=sha256:ecddf25bee22fe4fe3737a399d0d177d72bc22be6913acfab364b40bce1ba83c \
+    --hash=sha256:eea6ee1db730b3483adf394ea72f808b6e18cf3cb6454b4d86e04fa8c4327a12 \
+    --hash=sha256:f08ff5e948271dc7e18a35641d2f11a4cd8dfd5634f55228b691e62b37125eb3 \
+    --hash=sha256:f30bf9fd9be89ecb2360c7d94a711f00c09b976258846efe40db3d05828e8089 \
+    --hash=sha256:fa88b843d6e211393a37219e6a1c1df99d35e8fd90446f1118f4216e307e48cd \
+    --hash=sha256:fc54db6c8593ef7d4b2a331b58653356cf04f67c960f584edb7c3d8c97e8f39e \
+    --hash=sha256:fd4ec41f914fa74ad1b8304bbc634b3de73d2a0889bd32076342a573e0779e00 \
+    --hash=sha256:ffc9202a29ab3920fa812879e95a9e78b2465fd10be7fcbd042899695d75e616
 chipwhisperer @ https://github.com/newaetech/chipwhisperer-minimal/archive/2643131b71e528791446ee1bab7359120288f4ab.zip \
     --hash=sha256:efe11002e895a82be0605679207e70dde23ae18fb840afbff2408abb4aeff059
-click==8.1.7 \
-    --hash=sha256:ae74fb96c20a0277a1d615f1e4d73c8414f5a98db8b799a7931d1582f3390c28 \
-    --hash=sha256:ca9853ad459e787e2192211578cc907e7594e294c7ccc834310722b41b9ca6de
+click==8.1.8 \
+    --hash=sha256:63c132bbbed01578a06712a2d1f497bb62d9c1c0d329b7903a866228027263b2 \
+    --hash=sha256:ed53c9d8990d83c2a27deae68e4ee337473f6330c040a31d4225c9574d16096a
+colorama==0.4.6 \
+    --hash=sha256:08695f5cb7ed6e0531a20572697297273c47b8cae5a63ffc6d6ed5c201be6e44 \
+    --hash=sha256:4f1d9991f5acc0ca119f9d443620b77f9d6b33703e51011c16baf57afb285fc6
 commonmark==0.9.1 \
     --hash=sha256:452f9dc859be7f06631ddcb328b6919c67984aca654e5fefb3914d54691aed60 \
     --hash=sha256:da2f38c92590f83de410ba1a3cbceafbc74fee9def35f9251ba9a971d6d66fd9
-cssselect==1.2.0 \
-    --hash=sha256:666b19839cfaddb9ce9d36bfe4c969132c647b92fc9088c4e23f786b30f1b3dc \
-    --hash=sha256:da1885f0c10b60c03ed5eccbb6b68d6eff248d91976fcde348f395d54c9fd35e
-cssutils==2.7.1 \
-    --hash=sha256:1e92e0d9dab2ec8af9f38d715393964ba533dc3beacab9b072511dfc241db775 \
-    --hash=sha256:340ecfd9835d21df8f98500f0dfcea0aee41cb4e19ecbc2cf94f0a6d36d7cb6c
-cython==3.0.1 \
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-    --hash=sha256:02e2cdaff5795875aa4441068c20a04edb727a145dd45518926f7ae692ec0061 \
-    --hash=sha256:05dba6b214a12aa66421d810d24d0298ff37cb6036d00d4e851b61a54948540c \
-    --hash=sha256:08dc403e6fc2b105b83759c72980bc8d7b729b03dfe94c8345a5e999dfd07d15 \
-    --hash=sha256:119786513aad3bd8e483040d3757f11cec808e3f9d42c965c086db7fe62b69b1 \
-    --hash=sha256:137ec3f7abda49f53621c8c7f427d93ad5ac33a5f4e112e04594c1aad0bd0613 \
-    --hash=sha256:182ae584dbaa6fd73161a6f8cc7d350eeefc43c091cabc2b70fa1a802a7ef729 \
-    --hash=sha256:3194c330dc4c07c01f7d802868960ff053ef5c026aea17e03b025e307c9d94fe \
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-    --hash=sha256:49f13d342a810947685759597013e1e4fdc9875d74372fa6121cb190913100d4 \
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-    --hash=sha256:db6a823a86a10532934f83b6445f07634b2ad872fe52577ab0861a0f074e3036 \
-    --hash=sha256:dc65a9cdeb29b553bfcdc90499b672a75bc85ed7d4b212018e513463244f59ae \
-    --hash=sha256:e02c1c06d2b0138effead19c6c352ac1b99b2c431d97b6379ff4e17c9348bf61 \
-    --hash=sha256:e5481c4ee02fd178e3ef1b2d98b0a828a79fda92998d9541088a00f70d83f9a7 \
-    --hash=sha256:e69223fb6b99addff8b6d8a3e9f5ae044438bbf48dc08a3495eb99b13e62273c \
-    --hash=sha256:e7d42293809ff45d7743fb81bda64ecdb24a269d5bfcbd22cf74f2b8d112039f \
-    --hash=sha256:f02fcd11da42739a6fe3b5e1a3b21e644e10d02fb47757b1be239cabe3312d51 \
-    --hash=sha256:f3e49c4eaaa11345486ac0fa2b350636e44a4b45bd7521a6b133924c5ff20bba \
-    --hash=sha256:f663c9206475675d5f1c086dcab0404bc7a732241f951a9c89258392601c26f8 \
-    --hash=sha256:f8fde8dfec6a1fe5d9d035dbb740aacc1d7aea7f0dbcaa5ce61e9a8dea0c8888 \
-    --hash=sha256:fba7d0d5978a5ddb5e3cd59ce2b5bfeace6cabdad8aa7b5f740028e8b3126b88 \
-    --hash=sha256:fc1452139e1eb044b6e906a71c92e5580fec4deabe75cb440324d17b1163b038 \
-    --hash=sha256:ff571d41e2673678929ad1f5fee68e1757bd8e42c0082c3359138da56fc25263
-distro==1.8.0 \
-    --hash=sha256:02e111d1dc6a50abb8eed6bf31c3e48ed8b0830d1ea2a1b78c61765c2513fdd8 \
-    --hash=sha256:99522ca3e365cac527b44bde033f64c6945d90eb9f769703caaec52b09bbd3ff
+crcmod==1.7 \
+    --hash=sha256:dc7051a0db5f2bd48665a990d3ec1cc305a466a77358ca4492826f41f283601e
+cssselect==1.3.0 \
+    --hash=sha256:56d1bf3e198080cc1667e137bc51de9cadfca259f03c2d4e09037b3e01e30f0d \
+    --hash=sha256:57f8a99424cfab289a1b6a816a43075a4b00948c86b4dcf3ef4ee7e15f7ab0c7
+cssutils==2.11.1 \
+    --hash=sha256:0563a76513b6af6eebbe788c3bf3d01c920e46b3f90c8416738c5cfc773ff8e2 \
+    --hash=sha256:a67bfdfdff4f3867fab43698ec4897c1a828eca5973f4073321b3bccaf1199b1
+cython==3.0.12 \
+    --hash=sha256:0038c9bae46c459669390e53a1ec115f8096b2e4647ae007ff1bf4e6dee92806 \
+    --hash=sha256:0faa5e39e5c8cdf6f9c3b1c3f24972826e45911e7f5b99cf99453fca5432f45e \
+    --hash=sha256:120681093772bf3600caddb296a65b352a0d3556e962b9b147efcfb8e8c9801b \
+    --hash=sha256:1e5eadef80143026944ea8f9904715a008f5108d1d644a89f63094cc37351e73 \
+    --hash=sha256:25529ee948f44d9a165ff960c49d4903267c20b5edf2df79b45924802e4cca6e \
+    --hash=sha256:2d53de996ed340e9ab0fc85a88aaa8932f2591a2746e1ab1c06e262bd4ec4be7 \
+    --hash=sha256:3083465749911ac3b2ce001b6bf17f404ac9dd35d8b08469d19dc7e717f5877a \
+    --hash=sha256:309c081057930bb79dc9ea3061a1af5086c679c968206e9c9c2ec90ab7cb471a \
+    --hash=sha256:3109e1d44425a2639e9a677b66cd7711721a5b606b65867cb2d8ef7a97e2237b \
+    --hash=sha256:34ce459808f7d8d5d4007bc5486fe50532529096b43957af6cbffcb4d9cc5c8d \
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+    --hash=sha256:398d4576c1e1f6316282aa0b4a55139254fbed965cba7813e6d9900d3092b128 \
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+    --hash=sha256:c3238a29f37999e27494d120983eca90d14896b2887a0bd858a381204549137a \
+    --hash=sha256:d3a8f81980ffbd74e52f9186d8f1654e347d0c44bfea6b5997028977f481a179 \
+    --hash=sha256:d4b70fc339adba1e2111b074ee6119fe9fd6072c957d8597bce9a0dd1c3c6784 \
+    --hash=sha256:d6945694c5b9170cfbd5f2c0d00ef7487a2de7aba83713a64ee4ebce7fad9e05 \
+    --hash=sha256:d6c6cd6a75c8393e6805d17f7126b96a894f310a1a9ea91c47d141fb9341bfa8 \
+    --hash=sha256:dcdc3e5d4ce0e7a4af6903ed580833015641e968d18d528d8371e2435a34132c \
+    --hash=sha256:dfdbea486e702c328338314adb8e80f5f9741f06a0ae83aaec7463bc166d12e8 \
+    --hash=sha256:e62564457851db1c40399bd95a5346b9bb99e17a819bf583b362f418d8f3457a \
+    --hash=sha256:ea3a0e19ab77266c738aa110684a753a04da4e709472cadeff487133354d6ab8 \
+    --hash=sha256:ebc24609613fa06d0d896309f7164ba168f7e8d71c1e490ed2a08d23351c3f41 \
+    --hash=sha256:f39640f8df0400cde6882e23c734f15bb8196de0a008ae5dc6c8d1ec5957d7c8 \
+    --hash=sha256:fe030d4a00afb2844f5f70896b7f2a1a0d7da09bf3aa3d884cbe5f73fff5d310 \
+    --hash=sha256:feb86122a823937cc06e4c029d80ff69f082ebb0b959ab52a5af6cdd271c5dc3 \
+    --hash=sha256:ff5c0b6a65b08117d0534941d404833d516dac422eee88c6b4fd55feb409a5ed
 edalize @ https://github.com/lowRISC/edalize/archive/refs/tags/v0.4.0.zip \
     --hash=sha256:da816ef1040d8063d4aa7377ef1fea33f0bffeca1f79a68b7a8930ef9d90c7c8
 enlighten==1.10.2 \
     --hash=sha256:7a5b83cd0f4d095e59d80c648ebb5f7ffca0cd8bcf7ae6639828ee1ad000632a \
     --hash=sha256:b237fe562b320bf9f1d4bb76d0c98e0daf914372a76ab87c35cd02f57aa9d8c1
-flake8==5.0.4 \
-    --hash=sha256:6fbe320aad8d6b95cec8b8e47bc933004678dc63095be98528b7bdd2a9f510db \
-    --hash=sha256:7a1cf6b73744f5806ab95e526f6f0d8c01c66d7bbe349562d22dfca20610b248
+flake8==7.2.0 \
+    --hash=sha256:93b92ba5bdb60754a6da14fa3b93a9361fd00a59632ada61fd7b130436c40343 \
+    --hash=sha256:fa558ae3f6f7dbf2b4f22663e5343b6b6023620461f8d4ff2019ef4b5ee70426
 fusesoc @ https://github.com/lowRISC/fusesoc/archive/refs/tags/ot-0.5.dev0.zip \
     --hash=sha256:6d1d9b202748d160bc6da70ea8cf7a700ca80e1e7e4a78cbc1ec039bde595c65
-gitdb==4.0.10 \
-    --hash=sha256:6eb990b69df4e15bad899ea868dc46572c3f75339735663b81de79b06f17eb9a \
-    --hash=sha256:c286cf298426064079ed96a9e4a9d39e7f3e9bf15ba60701e95f5492f28415c7
-gitpython==3.1.32 \
-    --hash=sha256:8d9b8cb1e80b9735e8717c9362079d3ce4c6e5ddeebedd0361b228c3a67a62f6 \
-    --hash=sha256:e3d59b1c2c6ebb9dfa7a184daf3b6dd4914237e7488a1730a6d8f6f5d0b4187f
+gitdb==4.0.12 \
+    --hash=sha256:5ef71f855d191a3326fcfbc0d5da835f26b13fbcba60c32c21091c349ffdb571 \
+    --hash=sha256:67073e15955400952c6565cc3e707c554a4eea2e428946f7a4c162fab9bd9bcf
+gitpython==3.1.44 \
+    --hash=sha256:9e0e10cda9bed1ee64bc9a6de50e7e38a9c9943241cd7f585f6df3ed28011110 \
+    --hash=sha256:c87e30b26253bf5418b01b0660f818967f3c503193838337fe5e573331249269
 hjson==3.1.0 \
     --hash=sha256:55af475a27cf83a7969c808399d7bccdec8fb836a07ddbd574587593b9cdcf75 \
     --hash=sha256:65713cdcf13214fb554eb8b4ef803419733f4f5e551047c9b711098ab7186b89
-idna==3.4 \
-    --hash=sha256:814f528e8dead7d329833b91c5faa87d60bf71824cd12a7530b5526063d02cb4 \
-    --hash=sha256:90b77e79eaa3eba6de819a0c442c0b4ceefc341a7a2ab77d7562bf49f425c5c2
-importlib-metadata==6.8.0 \
-    --hash=sha256:3ebb78df84a805d7698245025b975d9d67053cd94c79245ba4b3eb694abe68bb \
-    --hash=sha256:dbace7892d8c0c4ac1ad096662232f831d4e64f4c4545bd53016a3e9d4654743
-importlib-resources==1.4.0 ; python_version >= "3.7" \
-    --hash=sha256:4019b6a9082d8ada9def02bece4a76b131518866790d58fdda0b5f8c603b36c2 \
-    --hash=sha256:dd98ceeef3f5ad2ef4cc287b8586da4ebad15877f351e9688987ad663a0a29b8
-iniconfig==2.0.0 \
-    --hash=sha256:2d91e135bf72d31a410b17c16da610a82cb55f6b0477d1a902134b24a455b8b3 \
-    --hash=sha256:b6a85871a79d2e3b22d2d1b94ac2824226a63c6b741c88f7ae975f18b6778374
+idna==3.10 \
+    --hash=sha256:12f65c9b470abda6dc35cf8e63cc574b1c52b11df2c86030af0ac09b01b13ea9 \
+    --hash=sha256:946d195a0d259cbba61165e88e65941f16e9b36ea6ddb97f00452bae8b1287d3
+importlib-resources==5.13.0 \
+    --hash=sha256:82d5c6cca930697dbbd86c93333bb2c2e72861d4789a11c2662b933e5ad2b528 \
+    --hash=sha256:9f7bd0c97b79972a6cce36a366356d16d5e13b09679c11a58f1014bfdf8e64b2
+iniconfig==2.1.0 \
+    --hash=sha256:3abbd2e30b36733fee78f9c7f7308f2d0050e88f0087fd25c2645f63c773e1c7 \
+    --hash=sha256:9deba5723312380e77435581c6bf4935c94cbfab9b1ed33ef8d238ea168eb760
 isort==5.10.1 \
     --hash=sha256:6f62d78e2f89b4500b080fe3a81690850cd254227f27f75c3a0c491a1f351ba7 \
     --hash=sha256:e8443a5e7a020e9d7f97f1d7d9cd17c88bcb3bc7e218bf9cf5095fe550be2951
-jinja2==3.1.2 \
-    --hash=sha256:31351a702a408a9e7595a8fc6150fc3f43bb6bf7e319770cbc0db9df9437e852 \
-    --hash=sha256:6088930bfe239f0e6710546ab9c19c9ef35e29792895fed6e6e31a023a182a61
-jsonschema==4.17.3 ; python_version >= "3.7" \
+jinja2==3.1.6 \
+    --hash=sha256:0137fb05990d35f1275a587e9aee6d56da821fc83491a0fb838183be43f66d6d \
+    --hash=sha256:85ece4451f492d0c13c5dd7c13a64681a86afae63a5f347908daf103ce6d2f67
+jsonschema==4.17.3 \
     --hash=sha256:0f864437ab8b6076ba6707453ef8f98a6a0d512a80e93f8abdb676f737ecb60d \
     --hash=sha256:a870ad254da1a8ca84b6a2905cac29d265f805acc57af304784962a2aa6508f6
 libclang==16.0.0 \
@@ -227,182 +252,250 @@ libclang==16.0.0 \
     --hash=sha256:bf4628fc4da7a1dd06a244f9b8e121c5ec68076a763c59d6b13cbb103acc935b \
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     --hash=sha256:ee20bf93e3dd330f71fc50cdbf13b92ced0aec8e540be64251db53502a9b33f7
-libcst==0.4.1 \
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-    --hash=sha256:06de1bc753d789f928f19f5bba5bc83b1b4b304a1b95f537b87c8d5d5cb4b9ce \
-    --hash=sha256:2473609db1218ee3a3d69d39f97e97b65f6fdb90b2bfce0af7680448578ed6eb \
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-    --hash=sha256:ce228e20216bce09ddb4eceed9a669f7fb52568ff300edf99a8850a4d6ab9e86 \
-    --hash=sha256:e02d3141ce6960f8df5b3c2615ea112a7a5065a60e81e56ca65a498c2c7f2490 \
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-    --hash=sha256:f8f75ed9981ec9a96835f78809360847661cc9c8033d404dcc65c346ce480f4d \
-    --hash=sha256:fe162be926af39bf307dd69b1ceb89af5ccdbfe21e1d92ba24ef7faa9d62be7b
-libusb1==3.0.0 \
-    --hash=sha256:083f75e5d15cb5e2159e64c308c5317284eae926a820d6dce53a9505d18be3b2 \
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-    --hash=sha256:6f6bb010632ada35c661d17a65e135077beef0fbb2434d5ffdb3a4a911fd9490
-lizard==1.17.10 \
-    --hash=sha256:62d78acd64724be28b5f4aa27a630dfa4b4afbd1596d1f25d5ad1c1a3a075adc \
-    --hash=sha256:686748cc003de54d3e37f84b6cbbdd975be41a2094f0a779cb7fef65e70fc53e
-lxml==4.9.2 \
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+    --hash=sha256:d90b729fd2732df28130c064aac9bb8aff14ba20baa4aee7bd0795ff1187545f \
+    --hash=sha256:dc0af80267edc68adf85f2a5d9be1cdf062f973db6790c1d065e45025fa26140 \
+    --hash=sha256:de5b4e1088523e2b6f730d0509a9a813355b7f5659d70eb4f319c76beea2e250 \
+    --hash=sha256:de6f6bb8a7840c7bf216fb83eec4e2f79f7325eca8858167b68708b929ab2172 \
+    --hash=sha256:df53330a3bff250f10472ce96a9af28628ff1f4efc51ccba351a8820bca2a8ba \
+    --hash=sha256:e094ec83694b59d263802ed03a8384594fcce477ce484b0cbcd0008a211ca751 \
+    --hash=sha256:e794f698ae4c5084414efea0f5cc9f4ac562ec02d66e1484ff822ef97c2cadff \
+    --hash=sha256:e7bc6df34d42322c5289e37e9971d6ed114e3776b45fa879f734bded9d1fea9c \
+    --hash=sha256:eaf24066ad0b30917186420d51e2e3edf4b0e2ea68d8cd885b14dc8afdcf6556 \
+    --hash=sha256:ecf4c4b83f1ab3d5a7ace10bafcb6f11df6156857a3c418244cef41ca9fa3e44 \
+    --hash=sha256:ef5a7178fcc73b7d8c07229e89f8eb45b2908a9238eb90dcfc46571ccf0383b8 \
+    --hash=sha256:f5cb182f6396706dc6cc1896dd02b1c889d644c081b0cdec38747573db88a7d7 \
+    --hash=sha256:fa0e294046de09acd6146be0ed6727d1f42ded4ce3ea1e9a19c11b6774eea27c \
+    --hash=sha256:fb54f7c6bafaa808f27166569b1511fc42701a7713858dddc08afdde9746849e \
+    --hash=sha256:fd3be6481ef54b8cfd0e1e953323b7aa9d9789b94842d0e5b142ef4bb7999539
 mako==1.1.6 \
     --hash=sha256:4e9e345a41924a954251b95b4b28e14a301145b544901332e658907a7464b6b2 \
     --hash=sha256:afaf8e515d075b22fad7d7b8b30e4a1c90624ff2f3733a06ec125f5a5f043a57
-markupsafe==2.1.3 \
-    --hash=sha256:05fb21170423db021895e1ea1e1f3ab3adb85d1c2333cbc2310f2a26bc77272e \
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-    --hash=sha256:3fd4abcb888d15a94f32b75d8fd18ee162ca0c064f35b11134be77050296d6ba \
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-    --hash=sha256:e4dd52d80b8c83fdce44e12478ad2e85c64ea965e75d66dbeafb0a3e77308fcc \
-    --hash=sha256:fec21693218efe39aa7f8599346e90c705afa52c5b31ae019b2e57e8f6542bb2
+markupsafe==3.0.2 \
+    --hash=sha256:0bff5e0ae4ef2e1ae4fdf2dfd5b76c75e5c2fa4132d05fc1b0dabcd20c7e28c4 \
+    --hash=sha256:0f4ca02bea9a23221c0182836703cbf8930c5e9454bacce27e767509fa286a30 \
+    --hash=sha256:1225beacc926f536dc82e45f8a4d68502949dc67eea90eab715dea3a21c1b5f0 \
+    --hash=sha256:131a3c7689c85f5ad20f9f6fb1b866f402c445b220c19fe4308c0b147ccd2ad9 \
+    --hash=sha256:15ab75ef81add55874e7ab7055e9c397312385bd9ced94920f2802310c930396 \
+    --hash=sha256:1a9d3f5f0901fdec14d8d2f66ef7d035f2157240a433441719ac9a3fba440b13 \
+    --hash=sha256:1c99d261bd2d5f6b59325c92c73df481e05e57f19837bdca8413b9eac4bd8028 \
+    --hash=sha256:1e084f686b92e5b83186b07e8a17fc09e38fff551f3602b249881fec658d3eca \
+    --hash=sha256:2181e67807fc2fa785d0592dc2d6206c019b9502410671cc905d132a92866557 \
+    --hash=sha256:2cb8438c3cbb25e220c2ab33bb226559e7afb3baec11c4f218ffa7308603c832 \
+    --hash=sha256:3169b1eefae027567d1ce6ee7cae382c57fe26e82775f460f0b2778beaad66c0 \
+    --hash=sha256:3809ede931876f5b2ec92eef964286840ed3540dadf803dd570c3b7e13141a3b \
+    --hash=sha256:38a9ef736c01fccdd6600705b09dc574584b89bea478200c5fbf112a6b0d5579 \
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+    --hash=sha256:6381026f158fdb7c72a168278597a5e3a5222e83ea18f543112b2662a9b699c5 \
+    --hash=sha256:6af100e168aa82a50e186c82875a5893c5597a0c1ccdb0d8b40240b1f28b969a \
+    --hash=sha256:6c89876f41da747c8d3677a2b540fb32ef5715f97b66eeb0c6b66f5e3ef6f59d \
+    --hash=sha256:6e296a513ca3d94054c2c881cc913116e90fd030ad1c656b3869762b754f5f8a \
+    --hash=sha256:70a87b411535ccad5ef2f1df5136506a10775d267e197e4cf531ced10537bd6b \
+    --hash=sha256:7e94c425039cde14257288fd61dcfb01963e658efbc0ff54f5306b06054700f8 \
+    --hash=sha256:846ade7b71e3536c4e56b386c2a47adf5741d2d8b94ec9dc3e92e5e1ee1e2225 \
+    --hash=sha256:88416bd1e65dcea10bc7569faacb2c20ce071dd1f87539ca2ab364bf6231393c \
+    --hash=sha256:88b49a3b9ff31e19998750c38e030fc7bb937398b1f78cfa599aaef92d693144 \
+    --hash=sha256:8c4e8c3ce11e1f92f6536ff07154f9d49677ebaaafc32db9db4620bc11ed480f \
+    --hash=sha256:8e06879fc22a25ca47312fbe7c8264eb0b662f6db27cb2d3bbbc74b1df4b9b87 \
+    --hash=sha256:9025b4018f3a1314059769c7bf15441064b2207cb3f065e6ea1e7359cb46db9d \
+    --hash=sha256:93335ca3812df2f366e80509ae119189886b0f3c2b81325d39efdb84a1e2ae93 \
+    --hash=sha256:9778bd8ab0a994ebf6f84c2b949e65736d5575320a17ae8984a77fab08db94cf \
+    --hash=sha256:9e2d922824181480953426608b81967de705c3cef4d1af983af849d7bd619158 \
+    --hash=sha256:a123e330ef0853c6e822384873bef7507557d8e4a082961e1defa947aa59ba84 \
+    --hash=sha256:a904af0a6162c73e3edcb969eeeb53a63ceeb5d8cf642fade7d39e7963a22ddb \
+    --hash=sha256:ad10d3ded218f1039f11a75f8091880239651b52e9bb592ca27de44eed242a48 \
+    --hash=sha256:b424c77b206d63d500bcb69fa55ed8d0e6a3774056bdc4839fc9298a7edca171 \
+    --hash=sha256:b5a6b3ada725cea8a5e634536b1b01c30bcdcd7f9c6fff4151548d5bf6b3a36c \
+    --hash=sha256:ba8062ed2cf21c07a9e295d5b8a2a5ce678b913b45fdf68c32d95d6c1291e0b6 \
+    --hash=sha256:ba9527cdd4c926ed0760bc301f6728ef34d841f405abf9d4f959c478421e4efd \
+    --hash=sha256:bbcb445fa71794da8f178f0f6d66789a28d7319071af7a496d4d507ed566270d \
+    --hash=sha256:bcf3e58998965654fdaff38e58584d8937aa3096ab5354d493c77d1fdd66d7a1 \
+    --hash=sha256:c0ef13eaeee5b615fb07c9a7dadb38eac06a0608b41570d8ade51c56539e509d \
+    --hash=sha256:cabc348d87e913db6ab4aa100f01b08f481097838bdddf7c7a84b7575b7309ca \
+    --hash=sha256:cdb82a876c47801bb54a690c5ae105a46b392ac6099881cdfb9f6e95e4014c6a \
+    --hash=sha256:cfad01eed2c2e0c01fd0ecd2ef42c492f7f93902e39a42fc9ee1692961443a29 \
+    --hash=sha256:d16a81a06776313e817c951135cf7340a3e91e8c1ff2fac444cfd75fffa04afe \
+    --hash=sha256:d8213e09c917a951de9d09ecee036d5c7d36cb6cb7dbaece4c71a60d79fb9798 \
+    --hash=sha256:e07c3764494e3776c602c1e78e298937c3315ccc9043ead7e685b7f2b8d47b3c \
+    --hash=sha256:e17c96c14e19278594aa4841ec148115f9c7615a47382ecb6b82bd8fea3ab0c8 \
+    --hash=sha256:e444a31f8db13eb18ada366ab3cf45fd4b31e4db1236a4448f68778c1d1a5a2f \
+    --hash=sha256:e6a2a455bd412959b57a172ce6328d2dd1f01cb2135efda2e4576e8a23fa3b0f \
+    --hash=sha256:eaa0a10b7f72326f1372a713e73c3f739b524b3af41feb43e4921cb529f5929a \
+    --hash=sha256:eb7972a85c54febfb25b5c4b4f3af4dcc731994c7da0d8a0b4a6eb0640e1d178 \
+    --hash=sha256:ee55d3edf80167e48ea11a923c7386f4669df67d7994554387f84e7d8b0a2bf0 \
+    --hash=sha256:f3818cb119498c0678015754eba762e0d61e5b52d34c8b13d770f0719f7b1d79 \
+    --hash=sha256:f8b3d067f2e40fe93e1ccdd6b2e1d16c43140e76f02fb1319a05cf2b79d99430 \
+    --hash=sha256:fcabf5ff6eea076f859677f5f0b6b5c1a51e70a376b0579e0eadef8db48c6b50
 mccabe==0.7.0 \
     --hash=sha256:348e0240c33b60bbdf4e523192ef919f28cb2c3d7d5c7794f74009290f236325 \
     --hash=sha256:6c2d30ab6be0e4a46919781807b4f0d834ebdd6c6e3dca0bda5a15f863427b6e
 mistletoe==0.9.0 \
     --hash=sha256:11316e2fe0be422a8248293ad0efbee9ad0c6f3683b2f45bc6b989ea17a68c74 \
     --hash=sha256:3cb96d78226d08f0d3bf09efcaf330d23902492006e18b2c06558e8b86bf7faf
+more-itertools==10.7.0 \
+    --hash=sha256:9fddd5403be01a94b204faadcff459ec3568cf110265d3c54323e1e866ad29d3 \
+    --hash=sha256:d43980384673cb07d2f7d2d918c616b30c659c089ee23953f601d6609c67510e
 msgpack-python==0.5.6 \
     --hash=sha256:378cc8a6d3545b532dfd149da715abae4fda2a3adb6d74e525d0d5e51f46909b
 mypy==0.971 \
@@ -429,38 +522,41 @@ mypy==0.971 \
     --hash=sha256:d744f72eb39f69312bc6c2abf8ff6656973120e2eb3f3ec4f758ed47e414a4bf \
     --hash=sha256:ef943c72a786b0f8d90fd76e9b39ce81fb7171172daf84bf43eaf937e9f220a9 \
     --hash=sha256:f2899a3cbd394da157194f913a931edfd4be5f274a88041c9dc2d9cdcb1c315c
-mypy-extensions==1.0.0 \
-    --hash=sha256:4392f6c0eb8a5668a69e23d168ffa70f0be9ccfd32b5cc2d26a34ae5b844552d \
-    --hash=sha256:75dbf8955dc00442a438fc4d0666508a9a97b6bd41aa2f0ffe9d2f2725af0782
-okonomiyaki==1.4.0 \
-    --hash=sha256:174af185f866fc42fdb58b2d6c7107d870f795e3f404b9c6278f8e62f87f0f83 \
-    --hash=sha256:508008004a12e09f565d8b4e4145bd7500787fdd6810d898fdc8e5c61a3f41e5
-packaging==23.1 \
-    --hash=sha256:994793af429502c4ea2ebf6bf664629d07c1a9fe974af92966e4b8d2df7edc61 \
-    --hash=sha256:a392980d2b6cffa644431898be54b0045151319d1e7ec34f0cfed48767dd334f
-pip-tools==7.1.0 \
-    --hash=sha256:4e60b7d05b046f49ad5bf3c2818df8e78dec5820e9b331cd9898cff5ec19ff2f \
-    --hash=sha256:f6ead499e726c8cfee04b2dea6282a9faf29663c378d9a4aca2ea6b86c8ec715
-pkgutil-resolve-name==1.3.10 ; python_version >= "3.7" \
+mypy-extensions==1.1.0 \
+    --hash=sha256:1be4cccdb0f2482337c4743e60421de3a356cd97508abadd57d47403e94f5505 \
+    --hash=sha256:52e68efc3284861e772bbcd66823fde5ae21fd2fdb51c62a211403730b916558
+okonomiyaki==3.0.0 \
+    --hash=sha256:a5193286e9db0ded2d3ae80d7c3ebb9923bca89e94ba03d612bb9c2c0948cd77 \
+    --hash=sha256:f5de606542d27821fda1a59c4e13dfa9adf227a0e4dc28a408e280918b54b70e
+packaging==25.0 \
+    --hash=sha256:29572ef2b1f17581046b3a2227d5c611fb25ec70ca1ba8554b24b0e69331a484 \
+    --hash=sha256:d443872c98d677bf60f6a1f2f8c1cb748e8fe762d2bf9d3148b5599295b0fc4f
+pathspec==0.12.1 \
+    --hash=sha256:a0d503e138a4c123b27490a4f7beda6a01c6f288df0e4a8b79c7eb0dc7b4cc08 \
+    --hash=sha256:a482d51503a1ab33b1c67a6c3813a26953dbdc71c31dacaef9a838c4e29f5712
+pkgutil-resolve-name==1.3.10 \
     --hash=sha256:357d6c9e6a755653cfd78893817c0853af365dd51ec97f3d358a819373bbd174 \
     --hash=sha256:ca27cc078d25c5ad71a9de0a7a330146c4e014c2462d9af19c6b828280649c5e
-pluggy==1.2.0 \
-    --hash=sha256:c2fd55a7d7a3863cba1a013e4e2414658b1d07b6bc57b3919e0c63c9abb99849 \
-    --hash=sha256:d12f0c4b579b15f5e054301bb226ee85eeeba08ffec228092f8defbaa3a4c4b3
+pluggy==1.5.0 \
+    --hash=sha256:2cffa88e94fdc978c4c574f15f9e59b7f4201d439195c3715ca9e2486f1d0cf1 \
+    --hash=sha256:44e1ad92c8ca002de6377e165f3e0f1be63266ab4d554740532335b9d75ea669
 pluralizer==1.2.0 \
     --hash=sha256:d8f92ffa787661d9e704d1e0d8abc6c6c4bbaae9e790d7c709707eafbe17ed12 \
     --hash=sha256:fe3fb8e1e53fabf372e77d8cbebe04b0f8fc7db853aeff50095dbd5628ac39c5
-prefixed==0.7.0 \
-    --hash=sha256:0b54d15e602eb8af4ac31b1db21a37ea95ce5890e0741bb0dd9ded493cefbbe9 \
-    --hash=sha256:537b0e4ff4516c4578f277a41d7104f769d6935ae9cdb0f88fed82ec7b3c0ca5
+prefixed==0.9.0 \
+    --hash=sha256:164403fa9ebc83280bbc4705f4b243a28837e164310b4e65c38ccab1ebafeeb3 \
+    --hash=sha256:3cdb74bfc4cf0aba28f3574662b13afdcac27c463dcbef320fe5d03f4c5fbca8
 premailer==3.8.0 \
     --hash=sha256:4d4e157244cee945a00c14feaa9e6a3aeb2faf2623ff6a8ba08afdf505fa0f25
+prompt-toolkit==3.0.51 \
+    --hash=sha256:52742911fde84e2d423e2f9a4cf1de7d7ac4e51958f648d9540e0fb8db077b07 \
+    --hash=sha256:931a162e3b27fc90c86f1b48bb1fb2c528c2761475e57c9c06de13311c7b54ed
 py==1.11.0 \
     --hash=sha256:51c75c4126074b472f746a24399ad32f6053d1b34b68d2fa41e558e6f4a98719 \
     --hash=sha256:607c53218732647dff4acdfcd50cb62615cedf612e72d1724fb1a0cc6405b378
-pycodestyle==2.9.1 \
-    --hash=sha256:2c9607871d58c76354b697b42f5d57e1ada7d261c261efac224b664affdc5785 \
-    --hash=sha256:d1735fc58b418fd7c5f658d28d943854f8a849b01a5d0a1e6f3f3fdd0166804b
+pycodestyle==2.13.0 \
+    --hash=sha256:35863c5974a271c7a726ed228a14a4f6daf49df369d8c50cd9a6f58a5e143ba9 \
+    --hash=sha256:c8415bf09abe81d9c7f872502a6eee881fbe85d8763dd5b9924bb0a01d67efae
 pycryptodome==3.15.0 \
     --hash=sha256:045d75527241d17e6ef13636d845a12e54660aa82e823b3b3341bcf5af03fa79 \
     --hash=sha256:0926f7cc3735033061ef3cf27ed16faad6544b14666410727b31fea85a5b16eb \
@@ -502,46 +598,48 @@ pyelftools==0.29 \
     --hash=sha256:ec761596aafa16e282a31de188737e5485552469ac63b60cfcccf22263fd24ff
 pyfinite==1.9.1 \
     --hash=sha256:33f58a04e814a30dcddaa73a16c46e32bc13741b097c0a4b57c7090bf5acfec0
-pyflakes==2.5.0 \
-    --hash=sha256:4579f67d887f804e67edb544428f264b7b24f435b263c4614f384135cea553d2 \
-    --hash=sha256:491feb020dca48ccc562a8c0cbe8df07ee13078df59813b83959cbdada312ea3
-pygments==2.16.1 \
-    --hash=sha256:13fc09fa63bc8d8671a6d247e1eb303c4b343eaee81d861f3404db2935653692 \
-    --hash=sha256:1daff0494820c69bc8941e407aa20f577374ee88364ee10a98fdbe0aece96e29
-pyparsing==3.1.1 \
-    --hash=sha256:32c7c0b711493c72ff18a981d24f28aaf9c1fb7ed5e9667c9e84e3db623bdbfb \
-    --hash=sha256:ede28a1a32462f5a9705e07aea48001a08f7cf81a021585011deba701581a0db
-pyproject-hooks==1.0.0 \
-    --hash=sha256:283c11acd6b928d2f6a7c73fa0d01cb2bdc5f07c57a2eeb6e83d5e56b97976f8 \
-    --hash=sha256:f271b298b97f5955d53fb12b72c1fb1948c22c1a6b70b315c54cedaca0264ef5
-pyrsistent==0.19.3 \
-    --hash=sha256:016ad1afadf318eb7911baa24b049909f7f3bb2c5b1ed7b6a8f21db21ea3faa8 \
-    --hash=sha256:1a2994773706bbb4995c31a97bc94f1418314923bd1048c6d964837040376440 \
-    --hash=sha256:20460ac0ea439a3e79caa1dbd560344b64ed75e85d8703943e0b66c2a6150e4a \
-    --hash=sha256:3311cb4237a341aa52ab8448c27e3a9931e2ee09561ad150ba94e4cfd3fc888c \
-    --hash=sha256:3a8cb235fa6d3fd7aae6a4f1429bbb1fec1577d978098da1252f0489937786f3 \
-    --hash=sha256:3ab2204234c0ecd8b9368dbd6a53e83c3d4f3cab10ecaf6d0e772f456c442393 \
-    --hash=sha256:42ac0b2f44607eb92ae88609eda931a4f0dfa03038c44c772e07f43e738bcac9 \
-    --hash=sha256:49c32f216c17148695ca0e02a5c521e28a4ee6c5089f97e34fe24163113722da \
-    --hash=sha256:4b774f9288dda8d425adb6544e5903f1fb6c273ab3128a355c6b972b7df39dcf \
-    --hash=sha256:4c18264cb84b5e68e7085a43723f9e4c1fd1d935ab240ce02c0324a8e01ccb64 \
-    --hash=sha256:5a474fb80f5e0d6c9394d8db0fc19e90fa540b82ee52dba7d246a7791712f74a \
-    --hash=sha256:64220c429e42a7150f4bfd280f6f4bb2850f95956bde93c6fda1b70507af6ef3 \
-    --hash=sha256:878433581fc23e906d947a6814336eee031a00e6defba224234169ae3d3d6a98 \
-    --hash=sha256:99abb85579e2165bd8522f0c0138864da97847875ecbd45f3e7e2af569bfc6f2 \
-    --hash=sha256:a2471f3f8693101975b1ff85ffd19bb7ca7dd7c38f8a81701f67d6b4f97b87d8 \
-    --hash=sha256:aeda827381f5e5d65cced3024126529ddc4289d944f75e090572c77ceb19adbf \
-    --hash=sha256:b735e538f74ec31378f5a1e3886a26d2ca6351106b4dfde376a26fc32a044edc \
-    --hash=sha256:c147257a92374fde8498491f53ffa8f4822cd70c0d85037e09028e478cababb7 \
-    --hash=sha256:c4db1bd596fefd66b296a3d5d943c94f4fac5bcd13e99bffe2ba6a759d959a28 \
-    --hash=sha256:c74bed51f9b41c48366a286395c67f4e894374306b197e62810e0fdaf2364da2 \
-    --hash=sha256:c9bb60a40a0ab9aba40a59f68214eed5a29c6274c83b2cc206a359c4a89fa41b \
-    --hash=sha256:cc5d149f31706762c1f8bda2e8c4f8fead6e80312e3692619a75301d3dbb819a \
-    --hash=sha256:ccf0d6bd208f8111179f0c26fdf84ed7c3891982f2edaeae7422575f47e66b64 \
-    --hash=sha256:e42296a09e83028b3476f7073fcb69ffebac0e66dbbfd1bd847d61f74db30f19 \
-    --hash=sha256:e8f2b814a3dc6225964fa03d8582c6e0b6650d68a232df41e3cc1b66a5d2f8d1 \
-    --hash=sha256:f0774bf48631f3a20471dd7c5989657b639fd2d285b861237ea9e82c36a415a9 \
-    --hash=sha256:f0e7c4b2f77593871e918be000b96c8107da48444d57005b6a6bc61fb4331b2c
+pyflakes==3.3.2 \
+    --hash=sha256:5039c8339cbb1944045f4ee5466908906180f13cc99cc9949348d10f82a5c32a \
+    --hash=sha256:6dfd61d87b97fba5dcfaaf781171ac16be16453be6d816147989e7f6e6a9576b
+pygments==2.19.1 \
+    --hash=sha256:61c16d2a8576dc0649d9f39e089b5f02bcd27fba10d8fb4dcc28173f7a45151f \
+    --hash=sha256:9ea1544ad55cecf4b8242fab6dd35a93bbce657034b0611ee383099054ab6d8c
+pyparsing==3.2.3 \
+    --hash=sha256:a749938e02d6fd0b59b356ca504a24982314bb090c383e3cf201c95ef7e2bfcf \
+    --hash=sha256:b9c13f1ab8b3b542f72e28f634bad4de758ab3ce4546e4301970ad6fa77c38be
+pyrsistent==0.20.0 \
+    --hash=sha256:0724c506cd8b63c69c7f883cc233aac948c1ea946ea95996ad8b1380c25e1d3f \
+    --hash=sha256:09848306523a3aba463c4b49493a760e7a6ca52e4826aa100ee99d8d39b7ad1e \
+    --hash=sha256:0f3b1bcaa1f0629c978b355a7c37acd58907390149b7311b5db1b37648eb6958 \
+    --hash=sha256:21cc459636983764e692b9eba7144cdd54fdec23ccdb1e8ba392a63666c60c34 \
+    --hash=sha256:2e14c95c16211d166f59c6611533d0dacce2e25de0f76e4c140fde250997b3ca \
+    --hash=sha256:2e2c116cc804d9b09ce9814d17df5edf1df0c624aba3b43bc1ad90411487036d \
+    --hash=sha256:4021a7f963d88ccd15b523787d18ed5e5269ce57aa4037146a2377ff607ae87d \
+    --hash=sha256:4c48f78f62ab596c679086084d0dd13254ae4f3d6c72a83ffdf5ebdef8f265a4 \
+    --hash=sha256:4f5c2d012671b7391803263419e31b5c7c21e7c95c8760d7fc35602353dee714 \
+    --hash=sha256:58b8f6366e152092194ae68fefe18b9f0b4f89227dfd86a07770c3d86097aebf \
+    --hash=sha256:59a89bccd615551391f3237e00006a26bcf98a4d18623a19909a2c48b8e986ee \
+    --hash=sha256:5cdd7ef1ea7a491ae70d826b6cc64868de09a1d5ff9ef8d574250d0940e275b8 \
+    --hash=sha256:6288b3fa6622ad8a91e6eb759cfc48ff3089e7c17fb1d4c59a919769314af224 \
+    --hash=sha256:6d270ec9dd33cdb13f4d62c95c1a5a50e6b7cdd86302b494217137f760495b9d \
+    --hash=sha256:79ed12ba79935adaac1664fd7e0e585a22caa539dfc9b7c7c6d5ebf91fb89054 \
+    --hash=sha256:7d29c23bdf6e5438c755b941cef867ec2a4a172ceb9f50553b6ed70d50dfd656 \
+    --hash=sha256:8441cf9616d642c475684d6cf2520dd24812e996ba9af15e606df5f6fd9d04a7 \
+    --hash=sha256:881bbea27bbd32d37eb24dd320a5e745a2a5b092a17f6debc1349252fac85423 \
+    --hash=sha256:8c3aba3e01235221e5b229a6c05f585f344734bd1ad42a8ac51493d74722bbce \
+    --hash=sha256:a14798c3005ec892bbada26485c2eea3b54109cb2533713e355c806891f63c5e \
+    --hash=sha256:b14decb628fac50db5e02ee5a35a9c0772d20277824cfe845c8a8b717c15daa3 \
+    --hash=sha256:b318ca24db0f0518630e8b6f3831e9cba78f099ed5c1d65ffe3e023003043ba0 \
+    --hash=sha256:c1beb78af5423b879edaf23c5591ff292cf7c33979734c99aa66d5914ead880f \
+    --hash=sha256:c55acc4733aad6560a7f5f818466631f07efc001fd023f34a6c203f8b6df0f0b \
+    --hash=sha256:ca52d1ceae015859d16aded12584c59eb3825f7b50c6cfd621d4231a6cc624ce \
+    --hash=sha256:cae40a9e3ce178415040a0383f00e8d68b569e97f31928a3a8ad37e3fde6df6a \
+    --hash=sha256:e78d0c7c1e99a4a45c99143900ea0546025e41bb59ebc10182e947cf1ece9174 \
+    --hash=sha256:ef3992833fbd686ee783590639f4b8343a57f1f75de8633749d984dc0eb16c86 \
+    --hash=sha256:f058a615031eea4ef94ead6456f5ec2026c19fb5bd6bfe86e9665c4158cf802f \
+    --hash=sha256:f5ac696f02b3fc01a710427585c855f65cd9c640e14f52abe52020722bb4906b \
+    --hash=sha256:f920385a11207dc372a028b3f1e1038bb244b3ec38d448e6d8e43c6b3ba20e98 \
+    --hash=sha256:fed2c3216a605dc9a6ea50c7e84c82906e3684c4e80d2908208f662a6cbf9022
 pyserial==3.5 \
     --hash=sha256:3c77e014170dfffbd816e6ffc205e9842efb10be9f58ec16d3e8675b4925cddb \
     --hash=sha256:c4451db6ba391ca6ca299fb3ec7bae67a5c55dde170964c7a14ceefec02f2cf0
@@ -551,126 +649,182 @@ pytest==7.0.1 \
 pytest-timeout==2.1.0 \
     --hash=sha256:c07ca07404c612f8abbe22294b23c368e2e5104b521c1790195561f37e1ac3d9 \
     --hash=sha256:f6f50101443ce70ad325ceb4473c4255e9d74e3c7cd0ef827309dfa4c0d975c6
-pytz==2023.3 \
-    --hash=sha256:1d8ce29db189191fb55338ee6d0387d82ab59f3d00eac103412d64e0ebd0c588 \
-    --hash=sha256:a151b3abb88eda1d4e34a9814df37de2a80e301e68ba0fd856fb9b46bfbbbffb
-pyyaml==6.0 \
-    --hash=sha256:01b45c0191e6d66c470b6cf1b9531a771a83c1c4208272ead47a3ae4f2f603bf \
-    --hash=sha256:0283c35a6a9fbf047493e3a0ce8d79ef5030852c51e9d911a27badfde0605293 \
-    --hash=sha256:055d937d65826939cb044fc8c9b08889e8c743fdc6a32b33e2390f66013e449b \
-    --hash=sha256:07751360502caac1c067a8132d150cf3d61339af5691fe9e87803040dbc5db57 \
-    --hash=sha256:0b4624f379dab24d3725ffde76559cff63d9ec94e1736b556dacdfebe5ab6d4b \
-    --hash=sha256:0ce82d761c532fe4ec3f87fc45688bdd3a4c1dc5e0b4a19814b9009a29baefd4 \
-    --hash=sha256:1e4747bc279b4f613a09eb64bba2ba602d8a6664c6ce6396a4d0cd413a50ce07 \
-    --hash=sha256:213c60cd50106436cc818accf5baa1aba61c0189ff610f64f4a3e8c6726218ba \
-    --hash=sha256:231710d57adfd809ef5d34183b8ed1eeae3f76459c18fb4a0b373ad56bedcdd9 \
-    --hash=sha256:277a0ef2981ca40581a47093e9e2d13b3f1fbbeffae064c1d21bfceba2030287 \
-    --hash=sha256:2cd5df3de48857ed0544b34e2d40e9fac445930039f3cfe4bcc592a1f836d513 \
-    --hash=sha256:40527857252b61eacd1d9af500c3337ba8deb8fc298940291486c465c8b46ec0 \
-    --hash=sha256:432557aa2c09802be39460360ddffd48156e30721f5e8d917f01d31694216782 \
-    --hash=sha256:473f9edb243cb1935ab5a084eb238d842fb8f404ed2193a915d1784b5a6b5fc0 \
-    --hash=sha256:48c346915c114f5fdb3ead70312bd042a953a8ce5c7106d5bfb1a5254e47da92 \
-    --hash=sha256:50602afada6d6cbfad699b0c7bb50d5ccffa7e46a3d738092afddc1f9758427f \
-    --hash=sha256:68fb519c14306fec9720a2a5b45bc9f0c8d1b9c72adf45c37baedfcd949c35a2 \
-    --hash=sha256:77f396e6ef4c73fdc33a9157446466f1cff553d979bd00ecb64385760c6babdc \
-    --hash=sha256:81957921f441d50af23654aa6c5e5eaf9b06aba7f0a19c18a538dc7ef291c5a1 \
-    --hash=sha256:819b3830a1543db06c4d4b865e70ded25be52a2e0631ccd2f6a47a2822f2fd7c \
-    --hash=sha256:897b80890765f037df3403d22bab41627ca8811ae55e9a722fd0392850ec4d86 \
-    --hash=sha256:98c4d36e99714e55cfbaaee6dd5badbc9a1ec339ebfc3b1f52e293aee6bb71a4 \
-    --hash=sha256:9df7ed3b3d2e0ecfe09e14741b857df43adb5a3ddadc919a2d94fbdf78fea53c \
-    --hash=sha256:9fa600030013c4de8165339db93d182b9431076eb98eb40ee068700c9c813e34 \
-    --hash=sha256:a80a78046a72361de73f8f395f1f1e49f956c6be882eed58505a15f3e430962b \
-    --hash=sha256:afa17f5bc4d1b10afd4466fd3a44dc0e245382deca5b3c353d8b757f9e3ecb8d \
-    --hash=sha256:b3d267842bf12586ba6c734f89d1f5b871df0273157918b0ccefa29deb05c21c \
-    --hash=sha256:b5b9eccad747aabaaffbc6064800670f0c297e52c12754eb1d976c57e4f74dcb \
-    --hash=sha256:bfaef573a63ba8923503d27530362590ff4f576c626d86a9fed95822a8255fd7 \
-    --hash=sha256:c5687b8d43cf58545ade1fe3e055f70eac7a5a1a0bf42824308d868289a95737 \
-    --hash=sha256:cba8c411ef271aa037d7357a2bc8f9ee8b58b9965831d9e51baf703280dc73d3 \
-    --hash=sha256:d15a181d1ecd0d4270dc32edb46f7cb7733c7c508857278d3d378d14d606db2d \
-    --hash=sha256:d4b0ba9512519522b118090257be113b9468d804b19d63c71dbcf4a48fa32358 \
-    --hash=sha256:d4db7c7aef085872ef65a8fd7d6d09a14ae91f691dec3e87ee5ee0539d516f53 \
-    --hash=sha256:d4eccecf9adf6fbcc6861a38015c2a64f38b9d94838ac1810a9023a0609e1b78 \
-    --hash=sha256:d67d839ede4ed1b28a4e8909735fc992a923cdb84e618544973d7dfc71540803 \
-    --hash=sha256:daf496c58a8c52083df09b80c860005194014c3698698d1a57cbcfa182142a3a \
-    --hash=sha256:dbad0e9d368bb989f4515da330b88a057617d16b6a8245084f1b05400f24609f \
-    --hash=sha256:e61ceaab6f49fb8bdfaa0f92c4b57bcfbea54c09277b1b4f7ac376bfb7a7c174 \
-    --hash=sha256:f84fbc98b019fef2ee9a1cb3ce93e3187a6df0b2538a651bfb890254ba9f90b5
-requests==2.31.0 \
-    --hash=sha256:58cd2187c01e70e6e26505bca751777aa9f2ee0b7f4300988b709f44e013003f \
-    --hash=sha256:942c5a758f98d790eaed1a29cb6eefc7ffb0d1cf7af05c3d2791656dbd6ad1e1
+pytz==2025.2 \
+    --hash=sha256:360b9e3dbb49a209c21ad61809c7fb453643e048b38924c765813546746e81c3 \
+    --hash=sha256:5ddf76296dd8c44c26eb8f4b6f35488f3ccbf6fbbd7adee0b7262d43f0ec2f00
+pyyaml==6.0.2 \
+    --hash=sha256:01179a4a8559ab5de078078f37e5c1a30d76bb88519906844fd7bdea1b7729ff \
+    --hash=sha256:0833f8694549e586547b576dcfaba4a6b55b9e96098b36cdc7ebefe667dfed48 \
+    --hash=sha256:0a9a2848a5b7feac301353437eb7d5957887edbf81d56e903999a75a3d743086 \
+    --hash=sha256:0b69e4ce7a131fe56b7e4d770c67429700908fc0752af059838b1cfb41960e4e \
+    --hash=sha256:0ffe8360bab4910ef1b9e87fb812d8bc0a308b0d0eef8c8f44e0254ab3b07133 \
+    --hash=sha256:11d8f3dd2b9c1207dcaf2ee0bbbfd5991f571186ec9cc78427ba5bd32afae4b5 \
+    --hash=sha256:17e311b6c678207928d649faa7cb0d7b4c26a0ba73d41e99c4fff6b6c3276484 \
+    --hash=sha256:1e2120ef853f59c7419231f3bf4e7021f1b936f6ebd222406c3b60212205d2ee \
+    --hash=sha256:1f71ea527786de97d1a0cc0eacd1defc0985dcf6b3f17bb77dcfc8c34bec4dc5 \
+    --hash=sha256:23502f431948090f597378482b4812b0caae32c22213aecf3b55325e049a6c68 \
+    --hash=sha256:24471b829b3bf607e04e88d79542a9d48bb037c2267d7927a874e6c205ca7e9a \
+    --hash=sha256:29717114e51c84ddfba879543fb232a6ed60086602313ca38cce623c1d62cfbf \
+    --hash=sha256:2e99c6826ffa974fe6e27cdb5ed0021786b03fc98e5ee3c5bfe1fd5015f42b99 \
+    --hash=sha256:39693e1f8320ae4f43943590b49779ffb98acb81f788220ea932a6b6c51004d8 \
+    --hash=sha256:3ad2a3decf9aaba3d29c8f537ac4b243e36bef957511b4766cb0057d32b0be85 \
+    --hash=sha256:3b1fdb9dc17f5a7677423d508ab4f243a726dea51fa5e70992e59a7411c89d19 \
+    --hash=sha256:41e4e3953a79407c794916fa277a82531dd93aad34e29c2a514c2c0c5fe971cc \
+    --hash=sha256:43fa96a3ca0d6b1812e01ced1044a003533c47f6ee8aca31724f78e93ccc089a \
+    --hash=sha256:50187695423ffe49e2deacb8cd10510bc361faac997de9efef88badc3bb9e2d1 \
+    --hash=sha256:5ac9328ec4831237bec75defaf839f7d4564be1e6b25ac710bd1a96321cc8317 \
+    --hash=sha256:5d225db5a45f21e78dd9358e58a98702a0302f2659a3c6cd320564b75b86f47c \
+    --hash=sha256:6395c297d42274772abc367baaa79683958044e5d3835486c16da75d2a694631 \
+    --hash=sha256:688ba32a1cffef67fd2e9398a2efebaea461578b0923624778664cc1c914db5d \
+    --hash=sha256:68ccc6023a3400877818152ad9a1033e3db8625d899c72eacb5a668902e4d652 \
+    --hash=sha256:70b189594dbe54f75ab3a1acec5f1e3faa7e8cf2f1e08d9b561cb41b845f69d5 \
+    --hash=sha256:797b4f722ffa07cc8d62053e4cff1486fa6dc094105d13fea7b1de7d8bf71c9e \
+    --hash=sha256:7c36280e6fb8385e520936c3cb3b8042851904eba0e58d277dca80a5cfed590b \
+    --hash=sha256:7e7401d0de89a9a855c839bc697c079a4af81cf878373abd7dc625847d25cbd8 \
+    --hash=sha256:80bab7bfc629882493af4aa31a4cfa43a4c57c83813253626916b8c7ada83476 \
+    --hash=sha256:82d09873e40955485746739bcb8b4586983670466c23382c19cffecbf1fd8706 \
+    --hash=sha256:8388ee1976c416731879ac16da0aff3f63b286ffdd57cdeb95f3f2e085687563 \
+    --hash=sha256:8824b5a04a04a047e72eea5cec3bc266db09e35de6bdfe34c9436ac5ee27d237 \
+    --hash=sha256:8b9c7197f7cb2738065c481a0461e50ad02f18c78cd75775628afb4d7137fb3b \
+    --hash=sha256:9056c1ecd25795207ad294bcf39f2db3d845767be0ea6e6a34d856f006006083 \
+    --hash=sha256:936d68689298c36b53b29f23c6dbb74de12b4ac12ca6cfe0e047bedceea56180 \
+    --hash=sha256:9b22676e8097e9e22e36d6b7bda33190d0d400f345f23d4065d48f4ca7ae0425 \
+    --hash=sha256:a4d3091415f010369ae4ed1fc6b79def9416358877534caf6a0fdd2146c87a3e \
+    --hash=sha256:a8786accb172bd8afb8be14490a16625cbc387036876ab6ba70912730faf8e1f \
+    --hash=sha256:a9f8c2e67970f13b16084e04f134610fd1d374bf477b17ec1599185cf611d725 \
+    --hash=sha256:bc2fa7c6b47d6bc618dd7fb02ef6fdedb1090ec036abab80d4681424b84c1183 \
+    --hash=sha256:c70c95198c015b85feafc136515252a261a84561b7b1d51e3384e0655ddf25ab \
+    --hash=sha256:cc1c1159b3d456576af7a3e4d1ba7e6924cb39de8f67111c735f6fc832082774 \
+    --hash=sha256:ce826d6ef20b1bc864f0a68340c8b3287705cae2f8b4b1d932177dcc76721725 \
+    --hash=sha256:d584d9ec91ad65861cc08d42e834324ef890a082e591037abe114850ff7bbc3e \
+    --hash=sha256:d7fded462629cfa4b685c5416b949ebad6cec74af5e2d42905d41e257e0869f5 \
+    --hash=sha256:d84a1718ee396f54f3a086ea0a66d8e552b2ab2017ef8b420e92edbc841c352d \
+    --hash=sha256:d8e03406cac8513435335dbab54c0d385e4a49e4945d2909a581c83647ca0290 \
+    --hash=sha256:e10ce637b18caea04431ce14fabcf5c64a1c61ec9c56b071a4b7ca131ca52d44 \
+    --hash=sha256:ec031d5d2feb36d1d1a24380e4db6d43695f3748343d99434e6f5f9156aaa2ed \
+    --hash=sha256:ef6107725bd54b262d6dedcc2af448a266975032bc85ef0172c5f059da6325b4 \
+    --hash=sha256:efdca5630322a10774e8e98e1af481aad470dd62c3170801852d752aa7a783ba \
+    --hash=sha256:f753120cb8181e736c57ef7636e83f31b9c0d1722c516f7e86cf15b7aa57ff12 \
+    --hash=sha256:ff3824dc5261f50c9b0dfb3be22b4567a6f938ccce4587b38952d85fd9e9afe4
+questionary==2.1.0 \
+    --hash=sha256:44174d237b68bc828e4878c763a9ad6790ee61990e0ae72927694ead57bab8ec \
+    --hash=sha256:6302cdd645b19667d8f6e6634774e9538bfcd1aad9be287e743d96cacaf95587
+requests==2.32.3 \
+    --hash=sha256:55365417734eb18255590a9ff9eb97e9e1da868d4ccd6402399eaf68af20a760 \
+    --hash=sha256:70761cfe03c773ceb22aa2f671b4757976145175cdfca038c02654d061d6dcc6
 rich==12.6.0 \
     --hash=sha256:a4eb26484f2c82589bd9a17c73d32a010b1e29d89f1604cd9bf3a2097b81bb5e \
     --hash=sha256:ba3a3775974105c221d31141f2c116f4fd65c5ceb0698657a11e9f295ec93fd0
 semantic-version==2.10.0 \
     --hash=sha256:bdabb6d336998cbb378d4b9db3a4b56a1e3235701dc05ea2690d9a997ed5041c \
     --hash=sha256:de78a3b8e0feda74cabc54aab2da702113e33ac9d9eb9d2389bcf1f58b7d9177
-simplesat==0.8.2 \
-    --hash=sha256:1943f32735b03b048e20953a0145b2b61d2eb7a9dcc471a74f214afe9fa8d858 \
-    --hash=sha256:76dd637db54c998badb988baafbc2bd4cc6689364580588487bc2634a6ab55fd
+simplesat==0.9.2 \
+    --hash=sha256:8cb800d09289bdc051126e725949368f8ac25105d40865cb93aa20eae9d46a9c \
+    --hash=sha256:dde724538ccc5bddfdf57aa366cfb0cec0e3cae8c5d1ebc56f4cfb47948a8f97
+siphash==0.0.1 \
+    --hash=sha256:aee97fe95e09a2995819c058a5e4ac6d96661a898d7fe0ad55e3b72c9a31d461
 six==1.16.0 \
     --hash=sha256:1e61c37477a1626458e36f7b1d82aa5c9b094fa4802892072e49de9c60c4c926 \
     --hash=sha256:8abb2f1d86890a2dfb989f9a77cfcfd3e47c2a354b01111771326f8aa26e0254
-smmap==5.0.0 \
-    --hash=sha256:2aba19d6a040e78d8b09de5c57e96207b09ed71d8e55ce0959eeee6c8e190d94 \
-    --hash=sha256:c840e62059cd3be204b0c9c9f74be2c09d5648eddd4580d9314c3ecde0b30936
-soupsieve==2.4.1 \
-    --hash=sha256:1c1bfee6819544a3447586c889157365a27e10d88cde3ad3da0cf0ddf646feb8 \
-    --hash=sha256:89d12b2d5dfcd2c9e8c22326da9d9aa9cb3dfab0a83a024f05704076ee8d35ea
+smmap==5.0.2 \
+    --hash=sha256:26ea65a03958fa0c8a1c7e8c7a58fdc77221b8910f6be2131affade476898ad5 \
+    --hash=sha256:b30115f0def7d7531d22a0fb6502488d879e75b260a9db4d0819cfb25403af5e
+soupsieve==2.7 \
+    --hash=sha256:6e60cc5c1ffaf1cebcc12e8188320b72071e922c2e897f737cadce79ad5d30c4 \
+    --hash=sha256:ad282f9b6926286d2ead4750552c8a6142bc4c783fd66b0293547c8fe6ae126a
 tabulate==0.8.10 \
     --hash=sha256:0ba055423dbaa164b9e456abe7920c5e8ed33fcc16f6d1b2f2d152c8e1e8b4fc \
     --hash=sha256:6c57f3f3dd7ac2782770155f3adb2db0b1a269637e42f27599925e64b114f519
 termcolor==1.1.0 \
     --hash=sha256:1d6d69ce66211143803fbc56652b41d73b4a400a2891d7bf7a1cdf4c02de613b
-tomli==2.0.1 \
-    --hash=sha256:939de3e7a6161af0c887ef91b7d41a53e7c5a1ca976325f429cb46ea9bc30ecc \
-    --hash=sha256:de526c12914f0c550d15924c62d72abc48d6fe7364aa87328337a31007fe8a4f
+tockloader==1.13.0 \
+    --hash=sha256:0f51cdb3a3d5f2cd60796a0f2922e26a8298376b357a32f6a2d72d153bf6795d \
+    --hash=sha256:276a9deb4416af48b847e8478739dd3a6c28a92a4a30dc0d8cb9acafdaacc76c
+toml==0.10.2 \
+    --hash=sha256:806143ae5bfb6a3c6e736a764057db0e6a0e05e338b5630894a5f779cabb4f9b \
+    --hash=sha256:b3bda1d108d5dd99f4a20d24d9c348e91c4db7ab1b749200bded2f839ccbe68f
+tomli==2.2.1 \
+    --hash=sha256:023aa114dd824ade0100497eb2318602af309e5a55595f76b626d6d9f3b7b0a6 \
+    --hash=sha256:02abe224de6ae62c19f090f68da4e27b10af2b93213d36cf44e6e1c5abd19fdd \
+    --hash=sha256:286f0ca2ffeeb5b9bd4fcc8d6c330534323ec51b2f52da063b11c502da16f30c \
+    --hash=sha256:2d0f2fdd22b02c6d81637a3c95f8cd77f995846af7414c5c4b8d0545afa1bc4b \
+    --hash=sha256:33580bccab0338d00994d7f16f4c4ec25b776af3ffaac1ed74e0b3fc95e885a8 \
+    --hash=sha256:400e720fe168c0f8521520190686ef8ef033fb19fc493da09779e592861b78c6 \
+    --hash=sha256:40741994320b232529c802f8bc86da4e1aa9f413db394617b9a256ae0f9a7f77 \
+    --hash=sha256:465af0e0875402f1d226519c9904f37254b3045fc5084697cefb9bdde1ff99ff \
+    --hash=sha256:4a8f6e44de52d5e6c657c9fe83b562f5f4256d8ebbfe4ff922c495620a7f6cea \
+    --hash=sha256:4e340144ad7ae1533cb897d406382b4b6fede8890a03738ff1683af800d54192 \
+    --hash=sha256:678e4fa69e4575eb77d103de3df8a895e1591b48e740211bd1067378c69e8249 \
+    --hash=sha256:6972ca9c9cc9f0acaa56a8ca1ff51e7af152a9f87fb64623e31d5c83700080ee \
+    --hash=sha256:7fc04e92e1d624a4a63c76474610238576942d6b8950a2d7f908a340494e67e4 \
+    --hash=sha256:889f80ef92701b9dbb224e49ec87c645ce5df3fa2cc548664eb8a25e03127a98 \
+    --hash=sha256:8d57ca8095a641b8237d5b079147646153d22552f1c637fd3ba7f4b0b29167a8 \
+    --hash=sha256:8dd28b3e155b80f4d54beb40a441d366adcfe740969820caf156c019fb5c7ec4 \
+    --hash=sha256:9316dc65bed1684c9a98ee68759ceaed29d229e985297003e494aa825ebb0281 \
+    --hash=sha256:a198f10c4d1b1375d7687bc25294306e551bf1abfa4eace6650070a5c1ae2744 \
+    --hash=sha256:a38aa0308e754b0e3c67e344754dff64999ff9b513e691d0e786265c93583c69 \
+    --hash=sha256:a92ef1a44547e894e2a17d24e7557a5e85a9e1d0048b0b5e7541f76c5032cb13 \
+    --hash=sha256:ac065718db92ca818f8d6141b5f66369833d4a80a9d74435a268c52bdfa73140 \
+    --hash=sha256:b82ebccc8c8a36f2094e969560a1b836758481f3dc360ce9a3277c65f374285e \
+    --hash=sha256:c954d2250168d28797dd4e3ac5cf812a406cd5a92674ee4c8f123c889786aa8e \
+    --hash=sha256:cb55c73c5f4408779d0cf3eef9f762b9c9f147a77de7b258bef0a5628adc85cc \
+    --hash=sha256:cd45e1dc79c835ce60f7404ec8119f2eb06d38b1deba146f07ced3bbc44505ff \
+    --hash=sha256:d3f5614314d758649ab2ab3a62d4f2004c825922f9e370b29416484086b264ec \
+    --hash=sha256:d920f33822747519673ee656a4b6ac33e382eca9d331c87770faa3eef562aeb2 \
+    --hash=sha256:db2b95f9de79181805df90bedc5a5ab4c165e6ec3fe99f970d0e302f384ad222 \
+    --hash=sha256:e59e304978767a54663af13c07b3d1af22ddee3bb2fb0618ca1593e4f593a106 \
+    --hash=sha256:e85e99945e688e32d5a35c1ff38ed0b3f41f43fad8df0bdf79f72b2ba7bc5272 \
+    --hash=sha256:ece47d672db52ac607a3d9599a9d48dcb2f2f735c6c2d1f34130085bb12b112a \
+    --hash=sha256:f4039b9cbc3048b2416cc57ab3bda989a6fcf9b36cf8937f01a6e731b64f80d7
+tqdm==4.67.1 \
+    --hash=sha256:26445eca388f82e72884e0d580d5464cd801a3ea01e63e5601bdff9ba6a48de2 \
+    --hash=sha256:f8aef9c52c08c13a65f30ea34f4e5aac3fd1a34959879d7e59e63027286627f2
 typer==0.6.1 \
     --hash=sha256:2d5720a5e63f73eaf31edaa15f6ab87f35f0690f8ca233017d7d23d743a91d73 \
     --hash=sha256:54b19e5df18654070a82f8c2aa1da456a4ac16a2a83e6dcd9f170e291c56338e
-types-dataclasses==0.6.6 \
-    --hash=sha256:4b5a2fcf8e568d5a1974cd69010e320e1af8251177ec968de7b9bb49aa49f7b9 \
-    --hash=sha256:a0a1ab5324ba30363a15c9daa0f053ae4fff914812a1ebd8ad84a08e5349574d
-types-pkg-resources==0.1.3 \
-    --hash=sha256:0cb9972cee992249f93fff1a491bf2dc3ce674e5a1926e27d4f0866f7d9b6d9c \
-    --hash=sha256:834a9b8d3dbea343562fd99d5d3359a726f6bf9d3733bccd2b4f3096fbab9dae
-types-pytz==2023.3.0.1 \
-    --hash=sha256:1a7b8d4aac70981cfa24478a41eadfcd96a087c986d6f150d77e3ceb3c2bdfab \
-    --hash=sha256:65152e872137926bb67a8fe6cc9cfd794365df86650c5d5fdc7b167b0f38892e
+types-pytz==2025.2.0.20250326 \
+    --hash=sha256:3c397fd1b845cd2b3adc9398607764ced9e578a98a5d1fbb4a9bc9253edfb162 \
+    --hash=sha256:deda02de24f527066fc8d6a19e284ab3f3ae716a42b4adb6b40e75e408c08d36
 types-pyyaml==6.0.11 \
     --hash=sha256:7f7da2fd11e9bc1e5e9eb3ea1be84f4849747017a59fc2eee0ea34ed1147c2e0 \
     --hash=sha256:8f890028123607379c63550179ddaec4517dc751f4c527a52bb61934bf495989
 types-tabulate==0.8.11 \
     --hash=sha256:17a5fa3b5ca453815778fc9865e8ecd0118b07b2b9faff3e2b06fe448174dd5e \
     --hash=sha256:af811268241e8fb87b63c052c87d1e329898a93191309d5d42111372232b2e0e
-typing-extensions==4.7.1 \
-    --hash=sha256:440d5dd3af93b060174bf433bccd69b0babc3b15b1a8dca43789fd7f61514b36 \
-    --hash=sha256:b75ddc264f0ba5615db7ba217daeb99701ad295353c45f9e95963337ceeeffb2
+typing-extensions==4.13.2 \
+    --hash=sha256:a439e7c04b49fec3e5d3e2beaa21755cadbbdc391694e28ccdd36ca4a1408f8c \
+    --hash=sha256:e6c81219bd689f51865d9e372991c540bda33a0379d5573cddb9a3a23f7caaef
 typing-inspect==0.9.0 \
     --hash=sha256:9ee6fc59062311ef8547596ab6b955e1b8aa46242d854bfc78f4f6b0eff35f9f \
     --hash=sha256:b23fc42ff6f6ef6954e4852c1fb512cdd18dbea03134f91f856a95ccc9461f78
-urllib3==2.0.4 \
-    --hash=sha256:8d22f86aae8ef5e410d4f539fde9ce6b2113a001bb4d189e0aed70642d602b11 \
-    --hash=sha256:de7df1803967d2c2a98e4b11bb7d6bd9210474c46e8a0401514e3a42a75ebde4
-wcwidth==0.2.6 \
-    --hash=sha256:795b138f6875577cd91bba52baf9e445cd5118fd32723b460e30a0af30ea230e \
-    --hash=sha256:a5220780a404dbe3353789870978e472cfe477761f06ee55077256e509b156d0
-wheel==0.41.2 \
-    --hash=sha256:0c5ac5ff2afb79ac23ab82bab027a0be7b5dbcf2e54dc50efe4bf507de1f7985 \
-    --hash=sha256:75909db2664838d015e3d9139004ee16711748a52c8f336b52882266540215d8
+urllib3==2.4.0 \
+    --hash=sha256:414bc6535b787febd7567804cc015fee39daab8ad86268f1310a9250697de466 \
+    --hash=sha256:4e16665048960a0900c702d4a66415956a584919c03361cac9f1df5c5dd7e813
+uv==0.4.10 \
+    --hash=sha256:0784f75093a75390d8d480cc8a444516e78f08849db9a13c21791a5f651df4a1 \
+    --hash=sha256:0f8b9ba4ecfbea343a00e46d509669606e55fe233d800752c4c25650473df358 \
+    --hash=sha256:1b6b6c6b8cc0c4e54ab25e3b46e49d1e583e26c194572eb42bfeebf71b39cca2 \
+    --hash=sha256:1ff5130b6f3af79c4e47f63db03215aed15e78cb4f1f51682af6f9949c2bcf00 \
+    --hash=sha256:2ff29a2f55a697e78d787a41ab41d4b26421d200728289b88b6241d3b486c436 \
+    --hash=sha256:30d1f8348a2b18e21a35c97ce42528781f242d0303881fc92fbacdcb653c8bca \
+    --hash=sha256:3be73788db9ceacb94a521cf67ca5cc08bac512aef71145b904ab62a3acabdae \
+    --hash=sha256:444e1cdb36d7ef103e52185f918800527c255dc369c9f90eb1f198dfa3f4d5bc \
+    --hash=sha256:6ba1cc3070e5c63ce0a1421fbed28bd1b3ff520671d7badda11a501504c78394 \
+    --hash=sha256:8fa510dfbbde4f8ad5cd2769568c7b0c3e867b74deaf4beabcca79e74e7550cc \
+    --hash=sha256:97a1187e11a9df70d55bc577721ad4a19441cda56e4d69fb2f38d88c7650d2a0 \
+    --hash=sha256:99954a94dd6c4bff8a9a963c05bc3988214ea39e7511a52fda35112e1a478447 \
+    --hash=sha256:a9dc1f8fca5c4a2f73054d9f56c7397e9fc6ba43baefc503d6f0128d72ea662f \
+    --hash=sha256:b89dfd213359a23797155ff8175e5202ed6b84aadeb20df92132127608d46acf \
+    --hash=sha256:bc87d6c581cfed0979e0f5ee93383d46006c6d4a5e4eb9f43ef13bce61b50cc2 \
+    --hash=sha256:bc99e6b45303f0881a8dc199f0b7ea8261dd1779e576e8477a7721ceeeaafcc7 \
+    --hash=sha256:e99e3f761875962942e0743b868bd666021d5e14c3df494e820ef8f45fb88578 \
+    --hash=sha256:ff9046a8c5e836e892ac7741e672ee016e92e55c659fa8195595df65a1f3accf
+wcwidth==0.2.13 \
+    --hash=sha256:3da69048e4540d84af32131829ff948f1e022c1c6bdb8d6102117aac784f6859 \
+    --hash=sha256:72ea0c06399eb286d978fdedb6923a9eb47e1c486ce63e9b4e64fc18303972b5
 yapf==0.32.0 \
     --hash=sha256:8fea849025584e486fd06d6ba2bed717f396080fd3cc236ba10cb97c4c51cf32 \
     --hash=sha256:a3f5085d37ef7e3e004c4ba9f9b3e40c54ff1901cd111f05145ae313a7c67d1b
-zipfile2==0.0.12 \
-    --hash=sha256:7376f7c968717ac895ef862da913e790cf1b518caf56c4822c04684c46a8a608 \
-    --hash=sha256:b9adf577d825461480e485027116c035f666b72ac3911af71aa93da6e0579eb8
-zipp==3.17.0 \
-    --hash=sha256:0e923e726174922dce09c53c59ad483ff7bbb8e572e00c7f7c46b88556409f31 \
-    --hash=sha256:84e64a1c28cf7e91ed2078bb8cc8c259cb19b76942096c8d7b84947690cabaf0
-
-# The following packages are considered to be unsafe in a requirements file:
-pip==23.2.1 \
-    --hash=sha256:7ccf472345f20d35bdc9d1841ff5f313260c2c33fe417f48c30ac46cccabf5be \
-    --hash=sha256:fb0bd5435b3200c602b5bf61d2d43c2f13c02e29c1707567ae7fbc514eb9faf2
-setuptools==68.1.2 \
-    --hash=sha256:3d4dfa6d95f1b101d695a6160a7626e15583af71a5f52176efa5d39a054d475d \
-    --hash=sha256:3d8083eed2d13afc9426f227b24fd1659489ec107c0e86cec2ffdde5c92e790b
+zipp==3.21.0 \
+    --hash=sha256:2c9958f6430a2040341a52eb608ed6dd93ef4392e02ffe219417c1b28b5dd1f4 \
+    --hash=sha256:ac1bbe05fd2991f160ebce24ffbac5f6d11d83dc90891255885223d42b3cd931
diff --git a/quality/BUILD.bazel b/quality/BUILD.bazel
index 96eb902ea350e..62f7ac15d2d7f 100644
--- a/quality/BUILD.bazel
+++ b/quality/BUILD.bazel
@@ -2,8 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@ot_hack_bazelbuild_buildtools//buildifier:def.bzl", "buildifier", "buildifier_test")
-load("@lowrisc_lint//rules:rules.bzl", "licence_test")
+load("@buildifier_prebuilt//:rules.bzl", "buildifier", "buildifier_test")
+load("@lowrisc_misc_linters//rules:rules.bzl", "licence_test")
 load("//rules:quality.bzl", "clang_format_check", "clang_format_test", "clang_tidy_rv_test", "clang_tidy_test", "html_coverage_report", "rustfmt_fix")
 load("@rules_rust//rust:defs.bzl", "rustfmt_test")
 
@@ -77,7 +77,7 @@ licence_test(
     Licensed under the Apache License, Version 2.0, see LICENSE for details.
     SPDX-License-Identifier: Apache-2.0
     """,
-    workspace = "//:WORKSPACE",
+    workspace = "//:MODULE.bazel",
 )
 
 format_exclude = [
@@ -97,7 +97,7 @@ clang_format_test(
     name = "clang_format_check",
     exclude_patterns = format_exclude,
     mode = "diff",
-    workspace = "//:WORKSPACE",
+    workspace = "//:MODULE.bazel",
 )
 
 clang_format_check(
@@ -139,10 +139,8 @@ test_suite(
 )
 
 buildifier_exclude = [
-    "./WORKSPACE",  # Prevent Buildifier from inserting unnecessary newlines.
     "./**/vendor/**",
     "./build/**",
-    "./third_party/rust/crates/crates.bzl",  # Autogenerated by cargo-raze
 ]
 
 buildifier(
@@ -157,7 +155,7 @@ buildifier_test(
     mode = "diff",
     no_sandbox = True,
     verbose = True,
-    workspace = "//:WORKSPACE",
+    workspace = "//:MODULE.bazel",
 )
 
 # TODO(cfrantz): Find a way to keep this list of rust targets synchronized
@@ -170,19 +168,25 @@ RUST_TARGETS = [
     "//sw/host/cryptotest:cryptotest_parser_test",
     "//sw/host/hsmtool:hsmlib",
     "//sw/host/hsmtool:hsmlib_test",
-    "//sw/host/ot_certs:ot_certs",
-    "//sw/host/ot_certs:ot_certs_test",
+    "//sw/host/hsmtool/acorn:acorn",
     "//sw/host/opentitanlib:opentitanlib",
     "//sw/host/opentitanlib:opentitanlib_test",
     "//sw/host/opentitansession:opentitansession",
     "//sw/host/opentitantool:opentitantool",
-    "//sw/host/tests/chip/gpio:gpio",
+    "//sw/host/ot_certs:ot_certs",
+    "//sw/host/ot_certs:ot_certs_test",
+    "//sw/host/tests/chip/gpio:gpio_pinmux",
+    "//sw/host/tests/chip/gpio:gpio_intr",
     "//sw/host/tests/chip/power_virus:power_virus",
+    "//sw/host/tests/chip/spi_device:spi_passthru",
+    "//sw/host/tests/ownership:rescue_limit_test",
+    "//sw/host/tests/ownership:rescue_permission_test",
+    "//sw/host/tests/ownership:transfer_lib",
+    "//sw/host/tests/ownership:transfer_test",
     "//sw/host/tests/rom/e2e_bootstrap_disabled:e2e_bootstrap_disabled",
     "//sw/host/tests/rom/e2e_bootstrap_entry:e2e_bootstrap_entry",
     "//sw/host/tests/rom/e2e_chip_specific_startup:e2e_chip_specific_startup",
     "//sw/host/tests/rom/sw_strap_value:sw_strap_value",
-    "//sw/host/tests/chip/spi_device:spi_passthru",
     "//sw/host/tests/xmodem:lrzsz_test",
     "//sw/host/tests/xmodem:xmodem",
     "//sw/host/sphincsplus:sphincsplus",
@@ -206,7 +210,15 @@ sh_test(
     name = "shellcheck_check",
     srcs = ["//util/sh/scripts:run-shellcheck.sh"],
     data = [
-        "//:WORKSPACE",
+        "//:MODULE.bazel",
         "@shellcheck",
     ],
+    env = {
+        "SHELLCHECK": "$(location @shellcheck//:shellcheck)",
+    },
+    tags = [
+        "external",
+        "no-cache",
+        "no-sandbox",
+    ],
 )
diff --git a/release/devbundle/BUILD b/release/devbundle/BUILD
new file mode 100644
index 0000000000000..35522ad6101a0
--- /dev/null
+++ b/release/devbundle/BUILD
@@ -0,0 +1,89 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_pkg//pkg:mappings.bzl", "pkg_filegroup", "pkg_files")
+load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
+load("//rules/opentitan:splice.bzl", "bitstream_splice")
+
+package(default_visibility = ["//visibility:public"])
+
+bitstream_splice(
+    name = "bitstream_fpga_hyper310",
+    testonly = True,
+    # When the src bitstream and mmi fields are empty, the rule will use values
+    # from the exec_env.
+    exec_env = "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+    otp = "//hw/bitstream/universal:none",
+    rom = "//hw/bitstream/universal:none",
+    tags = ["manual"],
+)
+
+bitstream_splice(
+    name = "bitstream_fpga_hyper340",
+    testonly = True,
+    # When the src bitstream and mmi fields are empty, the rule will use values
+    # from the exec_env.
+    exec_env = "//hw/top_earlgrey:fpga_cw340_rom_ext",
+    otp = "//hw/bitstream/universal:none",
+    rom = "//hw/bitstream/universal:none",
+    tags = ["manual"],
+)
+
+pkg_files(
+    name = "bitstreams",
+    testonly = True,
+    srcs = [
+        ":bitstream_fpga_hyper310",
+        ":bitstream_fpga_hyper340",
+    ],
+    tags = ["manual"],
+)
+
+pkg_filegroup(
+    name = "bitstreams_pkg",
+    testonly = True,
+    srcs = [
+        ":bitstreams",
+    ],
+    prefix = "earlgrey/bitstreams",
+    tags = ["manual"],
+)
+
+pkg_files(
+    name = "bazel",
+    srcs = [
+        "build_bazel",
+        "module_bazel",
+    ],
+    renames = {
+        "build_bazel": "BUILD.bazel",
+        "module_bazel": "MODULE.bazel",
+    },
+)
+
+# TODO(cfrantz): Implement release automation so we don't have to publish the artifact manually.
+# Upload this to the GCS bucket `artifacts.opentitan.org` and name the file
+# with a date tag (e.g. devbundle-YYYYMMDD.tar.xz).
+#
+# For example:
+# $ gcloud --acount=foo@opentitan.org \
+#       storage cp \
+#           bazel-bin/release/devbundle/devbundle.tar.xz \
+#           gs://artifacts.opentitan.org/dev_bundle/devbundle-20250718.tar.xz
+pkg_tar(
+    name = "devbundle",
+    testonly = True,
+    srcs = [
+        ":bazel",
+        ":bitstreams_pkg",
+        "//hw:package",
+        "//hw/ip/otp_ctrl/data:package",
+        "//sw/device/lib/testing/test_rom:package",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:fpga_dev_pkg",
+        "//sw/device/silicon_creator/rom_ext:fpga_dev_pkg",
+        "//sw/host/opentitantool:package",
+    ],
+    extension = "tar.xz",
+    tags = ["manual"],
+)
diff --git a/release/devbundle/build_bazel b/release/devbundle/build_bazel
new file mode 100644
index 0000000000000..c8dcacd88fdb5
--- /dev/null
+++ b/release/devbundle/build_bazel
@@ -0,0 +1,7 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
diff --git a/release/devbundle/module_bazel b/release/devbundle/module_bazel
new file mode 100644
index 0000000000000..a5fd6c4990837
--- /dev/null
+++ b/release/devbundle/module_bazel
@@ -0,0 +1,7 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+module(
+    name = "opentitan_devbundle",
+)
diff --git a/rules/BUILD b/rules/BUILD
index 236c611808537..33673aa5d984e 100644
--- a/rules/BUILD
+++ b/rules/BUILD
@@ -2,15 +2,29 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_PLATFORM")
+load("//rules:autogen.bzl", "autogen_stamp_include")
 load("//rules:stamp.bzl", "stamp_flag")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_PLATFORM")
 
 package(default_visibility = ["//visibility:public"])
 
-config_setting(
-    name = "opentitan_platform",
-    values = {"platforms": OPENTITAN_PLATFORM},
-)
-
 # See stamp.bzl for explanation.
 stamp_flag(name = "stamp_flag")
+
+# This target provides a C header containing all stamping variables.
+#
+#  By default, or when building with --nostamp, this rule produces an empty
+#  C header file.
+#
+#  When building with --stamp, this rule will output a C header like the
+#  following example:
+#    #define BAZEL_BUILD_SCM_REVISION_SHORT 0d6b3555
+#    #define BAZEL_BUILD_SCM_STATUS clean
+#    #define BAZEL_BUILD_TIMESTAMP 1743189267
+#    ...
+#
+# To avoid rebuilding to all dependents as transitive header, this generated
+# file should be included in srcs instead of deps.
+autogen_stamp_include(
+    name = "autogen_stamp_include",
+)
diff --git a/rules/actions.bzl b/rules/actions.bzl
new file mode 100644
index 0000000000000..8e70806cf8328
--- /dev/null
+++ b/rules/actions.bzl
@@ -0,0 +1,6 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+OT_ACTION_OBJDUMP = "objdump"
+OT_ACTION_LLVM_PROFDATA = "llvm-profdata"
diff --git a/rules/autogen.bzl b/rules/autogen.bzl
index 9b46c795e8860..403298389d149 100644
--- a/rules/autogen.bzl
+++ b/rules/autogen.bzl
@@ -140,7 +140,7 @@ autogen_hjson_rust_header = rule(
     } | stamp_attr(-1, "//rules:stamp_flag"),
 )
 
-def _chip_info_src(ctx):
+def _build_info_src(ctx):
     stamp_args = []
     stamp_files = []
     if stamping_enabled(ctx):
@@ -148,13 +148,13 @@ def _chip_info_src(ctx):
         stamp_args.append("--ot_version_file")
         stamp_args.append(ctx.version_file.path)
     else:
-        print("NOTE: stamping is disabled, the chip_info section will use a fixed version string")
+        print("NOTE: stamping is disabled, the build_info section will use a fixed version string")
         stamp_args.append("--default_version")
 
         # The script expects a 20-character long hash: "OpenTitanOpenTitanOT"
         stamp_args.append("4f70656e546974616e4f70656e546974616e4f54")
 
-    out_source = ctx.actions.declare_file("chip_info.c")
+    out_source = ctx.actions.declare_file("build_info.c")
     ctx.actions.run(
         outputs = [
             out_source,
@@ -173,35 +173,105 @@ def _chip_info_src(ctx):
         DefaultInfo(files = depset([out_source])),
     ]
 
-autogen_chip_info_src = rule(
-    implementation = _chip_info_src,
+autogen_build_info_src = rule(
+    implementation = _build_info_src,
     attrs = {
         "_tool": attr.label(
-            default = "//util:rom_chip_info",
+            default = "//util:build_info",
             executable = True,
             cfg = "exec",
         ),
     } | stamp_attr(-1, "//rules:stamp_flag"),
 )
 
-def autogen_chip_info(name):
-    """Generates a cc_library named `name` that defines chip info."""
+def autogen_build_info(name):
+    """Generates a cc_library named `name` that defines the build ID."""
 
-    # Generate a C source file that defines the chip info struct. This is an
+    # Generate a C source file that defines the build ID struct. This is an
     # implementation detail and should not be depended on externally.
-    chip_info_src_target = name + "_gen_src"
-    autogen_chip_info_src(name = chip_info_src_target)
+    build_info_src_target = name + "_gen_src"
+    autogen_build_info_src(name = build_info_src_target)
 
     # Package up the generated source file with its corresponding header file
-    # and dependencies. Any target that wants access to the chip info should
+    # and dependencies. Any target that wants access to the build ID should
     # depend on this.
     native.cc_library(
         name = name,
-        srcs = [chip_info_src_target],
-        hdrs = ["//sw/device/silicon_creator/lib:chip_info.h"],
+        srcs = [build_info_src_target],
+        hdrs = ["//sw/device/silicon_creator/lib:build_info.h"],
         deps = [
             "//sw/device/lib/base:macros",
         ],
+        # Make sure to participate in linking so that the symbol is not discarded
+        # (since it is not meant to be directly used).
+        alwayslink = True,
+    )
+
+def _cryptolib_build_info_src(ctx):
+    stamp_args = []
+    stamp_files = []
+    if stamping_enabled(ctx):
+        stamp_files = [ctx.version_file]
+        stamp_args.append("--ot_version_file")
+        stamp_args.append(ctx.version_file.path)
+    else:
+        print("NOTE: stamping is disabled, the build_info section will use a fixed version string")
+        stamp_args.append("--default_version")
+
+        # The script expects a 20-character long hash: "OpenTitanOpenTitanOT"
+        stamp_args.append("4f70656e546974616e4f70656e546974616e4f54")
+
+    out_source = ctx.actions.declare_file("cryptolib_build_info.c")
+    ctx.actions.run(
+        outputs = [
+            out_source,
+        ],
+        inputs = [
+            ctx.executable._tool,
+        ] + stamp_files,
+        arguments = [
+            "-o",
+            out_source.dirname,
+        ] + stamp_args,
+        executable = ctx.executable._tool,
+    )
+
+    return [
+        DefaultInfo(files = depset([out_source])),
+    ]
+
+autogen_cryptolib_build_info_src = rule(
+    implementation = _cryptolib_build_info_src,
+    attrs = {
+        "_tool": attr.label(
+            default = "//util:cryptolib_build_info",
+            executable = True,
+            cfg = "exec",
+        ),
+    } | stamp_attr(-1, "//rules:stamp_flag"),
+)
+
+def autogen_cryptolib_build_info(name):
+    """Generates a cc_library named `name` that defines the cryptolib ID."""
+
+    # Generate a C source file that defines the build ID struct. This is an
+    # implementation detail and should not be depended on externally.
+    cryptolib_build_info_src_target = name + "_gen_src"
+    autogen_cryptolib_build_info_src(name = cryptolib_build_info_src_target)
+
+    # Package up the generated source file with its corresponding header file
+    # and dependencies. Any target that wants access to the build ID should
+    # depend on this.
+    native.cc_library(
+        name = name,
+        srcs = [cryptolib_build_info_src_target],
+        hdrs = ["//sw/device/lib/crypto/drivers:cryptolib_build_info.h"],
+        deps = [
+            "//sw/device/lib/crypto/include:datatypes",
+        ],
+        # Make sure to participate in linking so that the symbol is not discarded
+        # (since it is not meant to be directly used).
+        alwayslink = True,
     )
 
 def _cryptotest_hjson_external(ctx):
@@ -311,3 +381,39 @@ autogen_cryptotest_header = rule(
         ),
     },
 )
+
+def _autogen_stamp_include(ctx):
+    """
+    Bazel rule for generating C header containing all stamping variables.
+
+    This rule is instantiated as //rules:autogen_stamp_include.
+    Please see the entry in rules/BUILD for explanation.
+    """
+    output = ctx.actions.declare_file("{}.inc".format(ctx.attr.name))
+
+    if stamping_enabled(ctx):
+        ctx.actions.run_shell(
+            outputs = [output],
+            inputs = [ctx.version_file, ctx.info_file],
+            arguments = [
+                ctx.version_file.path,
+                ctx.info_file.path,
+                output.path,
+            ],
+            command = """
+                cat $1 $2 \
+                | sed -E 's/^(\\w+) (.*)/#define BAZEL_\\1 \\2/' \
+                > $3
+            """,
+        )
+    else:
+        ctx.actions.write(output, "")
+
+    return [
+        DefaultInfo(files = depset([output])),
+    ]
+
+autogen_stamp_include = rule(
+    implementation = _autogen_stamp_include,
+    attrs = stamp_attr(-1, "//rules:stamp_flag"),
+)
diff --git a/rules/bitstreams.bzl b/rules/bitstreams.bzl
index ce5d5160cb5fc..77b7cc928f62e 100644
--- a/rules/bitstreams.bzl
+++ b/rules/bitstreams.bzl
@@ -48,18 +48,6 @@ particular bitstream or use cached version for the next cache entry, for each
 design (i.e. mix-and-match).
 """
 
-load("@python3//:defs.bzl", "interpreter")
-load("@ot_python_deps//:requirements.bzl", "all_requirements")
-
-def _make_pythonpath(rctx):
-    # Create a PYTHONPATH with all the pip deps from requirements.txt
-    directories = [
-        rctx.path(Label(pip_req + ":BUILD.bazel")).dirname
-        for pip_req in all_requirements
-    ]
-    pythonpath = ":".join([str(directory) for directory in directories])
-    return pythonpath
-
 def _bitstreams_repo_impl(rctx):
     # First, check if an existing pre-built bitstream cache repo exists, and if
     # so, use it instead of building one.
@@ -71,20 +59,18 @@ def _bitstreams_repo_impl(rctx):
         [
             rctx.path(rctx.attr.python_interpreter),
             rctx.attr._cache_manager,
+            "--branch=earlgrey_1.0.0",
             "--build-file=BUILD.bazel",
             "--bucket-url={}".format(rctx.attr.bucket_url),
             "--cache={}".format(cache_path),
             "--refresh-time={}".format(rctx.attr.refresh_time),
         ],
-        environment = {
-            "PYTHONPATH": _make_pythonpath(rctx),
-        },
         quiet = False,
     )
     if result.return_code != 0:
         fail("Bitstream cache not initialized properly.")
 
-# The bitstream repo should be evaluated with `bazel sync --configure` after
+# The bitstream repo should be evaluated with `bazel fetch --configure` after
 # every Git checkout. Once the cache is initialized, a typical invocation will
 # find the latest cached artifacts and map them to Bazel targets.
 #
@@ -125,7 +111,7 @@ bitstreams_repo = repository_rule(
             default = 18 * 3600,  # Refresh every 18h
         ),
         "python_interpreter": attr.label(
-            default = interpreter,
+            default = "@python3_host//:python",
             allow_single_file = True,
             doc = "Python interpreter to use.",
         ),
@@ -138,7 +124,7 @@ bitstreams_repo = repository_rule(
     # This rule depends on the Git repository, but there's no ergonomic way to
     # encode the dependency in Bazel. Instead, indicate that the rule depends on
     # something outside of Bazel's dependency graph and rely on the user calling
-    # `bazel sync --configure` when checking out new revisions. For historical
+    # `bazel fetch --configure` when checking out new revisions. For historical
     # context, see <https://github.com/lowRISC/opentitan/issues/16832>.
     configure = True,
 )
@@ -166,9 +152,14 @@ BitstreamManifestFragmentInfo = provider(
     },
 )
 
-def _bitstream_generate_manifest_fragment(design, srcs, bitstream, memory_maps):
+def _bitstream_generate_manifest_fragment(
+        design,
+        srcs,
+        bitstream,
+        memory_map_file,
+        memories):
     fragment = {
-        "schema_version": 2,
+        "schema_version": 3,
         "designs": {},
     }
     metadata = {}
@@ -189,19 +180,14 @@ def _bitstream_generate_manifest_fragment(design, srcs, bitstream, memory_maps):
             }
             deps.append(bitstream_outputs[0])
 
-        memory_map_info = {}
-        for output_group, mem_id in memory_maps.items():
-            if output_group in output_groups:
-                memory_files = output_groups[output_group].to_list()
-                if len(memory_files) != 1:
-                    fail("Too many memory map outputs for output group")
-                file_path = "/".join([design, memory_files[0].basename])
-                memory_map_info[mem_id] = {
-                    "file": file_path,
-                    "build_target": str(src.label),
-                }
-                deps.append(memory_files[0])
-        metadata["memory_map_info"] = memory_map_info
+    file_path = "/".join([design, memory_map_file.basename])
+    memory_map_info = {
+        "file": file_path,
+        "build_target": str(src.label),
+        "memories": memories,
+    }
+    deps.append(memory_map_file)
+    metadata["memory_map_info"] = memory_map_info
     fragment["designs"][design] = metadata
     return (fragment, deps)
 
@@ -212,7 +198,8 @@ def _bitstream_manifest_fragment_impl(ctx):
         ctx.attr.design,
         ctx.attr.srcs,
         ctx.attr.bitstream,
-        ctx.attr.memory_maps,
+        ctx.file.memory_map_file,
+        ctx.attr.memories,
     )
     for dep in deps:
         file_path = "/".join([ctx.attr.name, ctx.attr.design, dep.basename])
@@ -256,9 +243,12 @@ bitstream_manifest_fragment = rule(
             doc = "The output group for the programmable bitstream file.",
             mandatory = True,
         ),
-        "memory_maps": attr.string_dict(
-            doc = """A map from memory map files' output groups to their memory
-IDs (e.g. rom, otp, etc.)""",
+        "memories": attr.string_list(
+            doc = """List of memory names supported by the memory map file.""",
+        ),
+        "memory_map_file": attr.label(
+            doc = """A file containing the memory map info of the design.""",
+            allow_single_file = True,
         ),
     },
 )
diff --git a/rules/certificates.bzl b/rules/certificates.bzl
index 8c89c0ae328ff..c1d1c9b7dc53b 100644
--- a/rules/certificates.bzl
+++ b/rules/certificates.bzl
@@ -33,6 +33,7 @@ def _certificate_codegen_impl(ctx):
             "--output-c={}".format(pre_c.path),
             "--output-h={}".format(pre_h.path),
             "--output-unittest={}".format(pre_ut.path),
+            "--cert-format={}".format(ctx.attr.cert_format),
         ],
         executable = tc.tools.opentitantool,
         mnemonic = "GenCertTemplate",
@@ -70,12 +71,16 @@ certificate_codegen = rule(
     attrs = {
         "template": attr.label(allow_single_file = True, doc = "path to the hjson template file"),
         "clang_format": attr.label(
-            default = "@lowrisc_rv32imcb_files//:bin/clang-format",
+            default = "@lowrisc_rv32imcb_toolchain//:bin/clang-format",
             allow_single_file = True,
             cfg = "host",
             executable = True,
             doc = "The clang-format executable",
         ),
+        "cert_format": attr.string(
+            values = ["cwt", "x509"],
+            doc = "certificate format of the template",
+        ),
     },
     toolchains = [LOCALTOOLS_TOOLCHAIN],
 )
@@ -88,10 +93,11 @@ certificate_codegen = rule(
 # - <name>_hdrs: filegroup corresponding to the `headers` output group of <name>
 # - <name>_library: cc_library that compiles the sources, exports the headers and links to the asn1
 #   library.
-def certificate_template(name, template):
+def certificate_template(name, template, cert_format = "x509"):
     certificate_codegen(
         name = name,
         template = template,
+        cert_format = cert_format,
     )
 
     native.filegroup(
@@ -111,13 +117,21 @@ def certificate_template(name, template):
         output_group = "unittest",
     )
 
+    if cert_format == "x509":
+        runtime_deps = [
+            "@//sw/device/silicon_creator/lib/cert:asn1",
+            "@//sw/device/silicon_creator/lib/cert:template",
+        ]
+    else:
+        runtime_deps = [
+            "@//sw/device/silicon_creator/lib/cert:cbor",
+        ]
+
     native.cc_library(
         name = "{}_library".format(name),
         srcs = [":{}_srcs".format(name)],
         hdrs = [":{}_hdrs".format(name)],
-        deps = [
-            ":asn1",
-        ],
+        deps = runtime_deps,
     )
 
     native.cc_test(
diff --git a/rules/const.bzl b/rules/const.bzl
index 9cb7c0d6ee884..09dd3703b4086 100644
--- a/rules/const.bzl
+++ b/rules/const.bzl
@@ -87,6 +87,12 @@ CONST = struct(
             LOAD_ACCESS = 0x05495202,
             STORE_ACCESS = 0x07495202,
         ),
+        ROM_EXT_INTR = struct(
+            INSTRUCTION_ACCESS = 0x01524902,
+            ILLEGAL_INSTRUCTION = 0x02524902,
+            LOAD_ACCESS = 0x05524902,
+            STORE_ACCESS = 0x07524902,
+        ),
         SIGVERIFY = struct(
             BAD_RSA_SIGNATURE = 0x01535603,
             BAD_RSA_KEY = 0x04535603,
@@ -108,6 +114,13 @@ CONST = struct(
             WRITE_CHECK = 0x0242440d,
             DATA_INVALID = 0x0342440d,
         ),
+        ROM = struct(
+            IMM_SECTION = 0x034d5203,
+        ),
+        ISFB = struct(
+            STRIKE_MASK = 0x624f5707,
+            PRODUCT_EXP = 0x634f5707,
+        ),
         UNKNOWN = 0xffffffff,
         OK = 0x739,
     ),
@@ -141,8 +154,8 @@ CONST = struct(
         ESC_PHASE_3 = 0x76,
     ),
     MANUF_STATE = struct(
-        SIVAL = 0x30305653,  # ASCII `SV00`.
-        PRODC = 0x30304350,  # ASCII `PC00`.
+        PERSO_INITIAL = 0x00000000,
+        PERSONALIZED = 0x53524550,  # ASCII `PERS`.
     ),
 )
 
diff --git a/rules/coverage/BUILD b/rules/coverage/BUILD
new file mode 100644
index 0000000000000..0931a6a21f9b5
--- /dev/null
+++ b/rules/coverage/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_skylib//rules:common_settings.bzl", "bool_flag")
+
+package(default_visibility = ["//visibility:public"])
+
+config_setting(
+    name = "enabled",
+    define_values = {"ot_coverage_enabled": "true"},
+)
+
+# Instrumented setting should include all constraints from the "enabled"
+# setting, allowing both to be used within the same select statement.
+config_setting(
+    name = "instrumented",
+    define_values = {"ot_coverage_enabled": "true"},
+    values = {"collect_code_coverage": "true"},
+)
+
+bool_flag(
+    name = "enabled_flag",
+    build_setting_default = False,
+)
diff --git a/rules/cross_platform.bzl b/rules/cross_platform.bzl
index 4cb32a33cb39f..d3cdb9e75168c 100644
--- a/rules/cross_platform.bzl
+++ b/rules/cross_platform.bzl
@@ -22,7 +22,7 @@ def _merge_and_split_inputs(inputs):
 
 def dual_cc_library(
         name,
-        on_device_config_setting = "//rules:opentitan_platform",
+        on_device_config_setting = "//toolchain:on_device_config",
         srcs = [],
         hdrs = [],
         copts = [],
diff --git a/rules/extensions.bzl b/rules/extensions.bzl
new file mode 100644
index 0000000000000..b3417ba34549f
--- /dev/null
+++ b/rules/extensions.bzl
@@ -0,0 +1,41 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:local.bzl", "local_repository")
+
+def _copy_from_label_impl(rctx):
+    src_dir = rctx.path(rctx.attr.src)
+    for p in src_dir.readdir():
+        contents = rctx.read(p)
+        rel_path = str(p)[len(str(src_dir)):].lstrip("/")
+        rctx.file(rel_path, contents)
+
+copy_from_label = repository_rule(
+    implementation = _copy_from_label_impl,
+    attrs = {
+        "src": attr.label(),
+    },
+)
+
+def _hooks_impl(rctx):
+    for mod in rctx.modules:
+        for repo in mod.tags.repo:
+            d = rctx.getenv(repo.env)
+            if d:
+                local_repository(name = repo.name, path = d)
+            else:
+                copy_from_label(name = repo.name, src = repo.dummy)
+
+_repo_class = tag_class(
+    attrs = {
+        "name": attr.string(mandatory = True),
+        "env": attr.string(mandatory = True),
+        "dummy": attr.label(mandatory = True),
+    },
+)
+
+hooks = module_extension(
+    implementation = _hooks_impl,
+    tag_classes = {"repo": _repo_class},
+)
diff --git a/rules/files.bzl b/rules/files.bzl
index 7a1ba8bf296d5..9be958095ef2f 100644
--- a/rules/files.bzl
+++ b/rules/files.bzl
@@ -51,3 +51,68 @@ output_groups = rule(
         ),
     },
 )
+
+def _matches_filter(val, filt):
+    if not filt:
+        return True
+    for f in filt:
+        if f in val:
+            return True
+    return False
+
+def _copy_files(ctx):
+    files = []
+    for file in ctx.files.srcs:
+        if _matches_filter(file.basename, ctx.attr.filter):
+            files.append(file)
+
+    out_file = ctx.actions.declare_file(ctx.label.name + ".bash")
+    substitutions = {
+        # This is maybe a bit naughty: we rely on the fact that the `package`
+        # portion of the `relative_to` label looks just like the dirname
+        # of the file and the package is relative to the root of the
+        # workspace in which the rule resides.
+        "__DEST__": ctx.attr.relative_to.label.package,
+        "__FILES__": " ".join([f.path for f in files]),
+        "__WORKSPACE__": ctx.attr.workspace_env,
+    }
+    ctx.actions.expand_template(
+        template = ctx.file._runner,
+        output = out_file,
+        substitutions = substitutions,
+        is_executable = True,
+    )
+
+    return [DefaultInfo(
+        runfiles = ctx.runfiles(files = files),
+        executable = out_file,
+    )]
+
+copy_files = rule(
+    implementation = _copy_files,
+    attrs = {
+        "srcs": attr.label_list(
+            mandatory = True,
+            allow_files = True,
+            doc = "Targets producing file outputs",
+        ),
+        "relative_to": attr.label(
+            mandatory = True,
+            allow_single_file = True,
+            doc = "Label of a file in the same subdir that the files should be copied to.",
+        ),
+        "filter": attr.string_list(
+            default = [],
+            doc = "Substrings that must match the filename to qualify the file for copying.  The rule will copy files if any one of the substrings matches.",
+        ),
+        "workspace_env": attr.string(
+            default = "BUILD_WORKSPACE_DIRECTORY",
+            doc = "An environment variable that holds the path to the root of the workspace.",
+        ),
+        "_runner": attr.label(
+            default = "//rules/scripts:copy_files.template.sh",
+            allow_single_file = True,
+        ),
+    },
+    executable = True,
+)
diff --git a/rules/fusesoc.bzl b/rules/fusesoc.bzl
index 824af3f9bf718..2d40d7c439699 100644
--- a/rules/fusesoc.bzl
+++ b/rules/fusesoc.bzl
@@ -3,7 +3,6 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@nonhermetic//:env.bzl", "ENV")
-load("@ot_python_deps//:requirements.bzl", "entry_point")
 
 """Rules for running FuseSoC.
 
@@ -26,15 +25,29 @@ def _corefiles2rootarg(core):
     return core.dirname
 
 def _fusesoc_build_impl(ctx):
-    dirname = "build.{}".format(ctx.label.name)
-    out_dir = ctx.actions.declare_directory(dirname)
+    build_dir = "build.{}".format(ctx.label.name)
+    out_dir = "{}/{}/{}".format(ctx.bin_dir.path, ctx.label.package, build_dir)
     flags = [ctx.expand_location(f, ctx.attr.srcs) for f in ctx.attr.flags]
-    outputs = [out_dir]
+    outputs = []
     groups = {}
+
+    cache_dir = "{}/fusesoc-cache".format(out_dir)
+    cfg_file_path = "build.{}.fusesoc_config.toml".format(ctx.label.name)
+    cfg_file = ctx.actions.declare_file(cfg_file_path)
+    cfg_str = "[main]\n  cache_root = {}".format(cache_dir)
+    ctx.actions.write(cfg_file, cfg_str)
+
     args = ctx.actions.args()
+    args.add(cfg_file.path, format = "--config=%s")
 
     for group, files in ctx.attr.output_groups.items():
-        deps = [ctx.actions.declare_file("{}/{}".format(dirname, f)) for f in files]
+        deps = []
+        for file in files:
+            path = "{}/{}".format(build_dir, file)
+            if file.endswith("/"):
+                deps.append(ctx.actions.declare_directory(path))
+            else:
+                deps.append(ctx.actions.declare_file(path))
         outputs.extend(deps)
         groups[group] = depset(deps)
 
@@ -62,7 +75,7 @@ def _fusesoc_build_impl(ctx):
         "--setup",
         "--build",
     ])
-    args.add(out_dir.path, format = "--build-root=%s")
+    args.add(out_dir, format = "--build-root=%s")
 
     args.add_all(ctx.attr.systems)
     args.add_all(flags)
@@ -72,7 +85,9 @@ def _fusesoc_build_impl(ctx):
     ctx.actions.run(
         mnemonic = "FuseSoC",
         outputs = outputs,
-        inputs = ctx.files.srcs + ctx.files.cores + ctx.files._fusesoc,
+        inputs = ctx.files.srcs + ctx.files.cores + ctx.files._fusesoc + [
+            cfg_file,
+        ],
         arguments = [args],
         executable = ctx.executable._fusesoc,
         use_default_shell_env = False,
@@ -97,7 +112,14 @@ fusesoc_build = rule(
         "flags": attr.string_list(doc = "Flags controlling the FuseSOC system build"),
         "output_groups": attr.string_list_dict(
             allow_empty = True,
-            doc = "Mapping of group name to lists of files in that named group",
+            doc = """
+                Mappings from output group names to lists of paths contained in
+                that group.
+
+                Paths to directories must have a trailing `/`. It is not
+                possible to output both a directory and a file from within that
+                directory.
+            """,
         ),
         "verilator_options": attr.label(),
         "make_options": attr.label(),
diff --git a/rules/hooks_setup.bzl b/rules/hooks_setup.bzl
deleted file mode 100644
index 03be439529368..0000000000000
--- a/rules/hooks_setup.bzl
+++ /dev/null
@@ -1,79 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-_HOOKS_TEMPLATE = """
-def hooks_repo(name):
-    native.local_repository(
-        name = name,
-        path = "{hooks_dir}",
-    )
-"""
-
-_SECURE_HOOKS_TEMPLATE = """
-def secure_hooks_repo(name):
-    native.local_repository(
-        name = name,
-        path = "{hooks_dir}",
-    )
-"""
-
-_PROV_EXTS_TEMPLATE = """
-def provisioning_exts_repo(name):
-    native.local_repository(
-        name = name,
-        path = "{provisioning_exts_dir}",
-    )
-"""
-
-_BUILD = """
-exports_files(glob(["**"]))
-"""
-
-def _hooks_setup_impl(rctx):
-    hooks_dir = rctx.os.environ.get("MANUFACTURER_HOOKS_DIR", rctx.attr.dummy)
-    rctx.file("repos.bzl", _HOOKS_TEMPLATE.format(hooks_dir = hooks_dir))
-    rctx.file("BUILD.bazel", _BUILD)
-
-hooks_setup = repository_rule(
-    implementation = _hooks_setup_impl,
-    attrs = {
-        "dummy": attr.string(
-            mandatory = True,
-            doc = "Location of the dummy hooks directory.",
-        ),
-    },
-    environ = ["MANUFACTURER_HOOKS_DIR"],
-)
-
-def _secure_hooks_setup_impl(rctx):
-    secure_hooks_dir = rctx.os.environ.get("SECURE_MANUFACTURER_HOOKS_DIR", rctx.attr.dummy)
-    rctx.file("repos.bzl", _SECURE_HOOKS_TEMPLATE.format(hooks_dir = secure_hooks_dir))
-    rctx.file("BUILD.bazel", _BUILD)
-
-secure_hooks_setup = repository_rule(
-    implementation = _secure_hooks_setup_impl,
-    attrs = {
-        "dummy": attr.string(
-            mandatory = True,
-            doc = "Location of the dummy hooks directory.",
-        ),
-    },
-    environ = ["SECURE_MANUFACTURER_HOOKS_DIR"],
-)
-
-def _provisioning_exts_setup_impl(rctx):
-    provisioning_exts_dir = rctx.os.environ.get("PROV_EXTS_DIR", rctx.attr.dummy)
-    rctx.file("repos.bzl", _PROV_EXTS_TEMPLATE.format(provisioning_exts_dir = provisioning_exts_dir))
-    rctx.file("BUILD.bazel", _BUILD)
-
-provisioning_exts_setup = repository_rule(
-    implementation = _provisioning_exts_setup_impl,
-    attrs = {
-        "dummy": attr.string(
-            mandatory = True,
-            doc = "Location of the dummy provisioning extensions directory.",
-        ),
-    },
-    environ = ["PROV_EXTS_DIR"],
-)
diff --git a/rules/linker.bzl b/rules/linker.bzl
index 04242e59cbd0f..db3e35979b24a 100644
--- a/rules/linker.bzl
+++ b/rules/linker.bzl
@@ -5,7 +5,7 @@
 """Rules for declaring linker scripts and linker script fragments."""
 
 def _ld_library_impl(ctx):
-    files = [] + ctx.files.includes
+    files = []
     user_link_flags = []
 
     # Disable non-volatile scratch region and counters if building for english
@@ -20,6 +20,13 @@ def _ld_library_impl(ctx):
             "-Wl,-nmagic",
         ]
 
+    if ctx.files.includes:
+        files += ctx.files.includes
+        user_link_flags += [
+            "-Wl,-L,{}".format(include.dirname)
+            for include in ctx.files.includes
+        ]
+
     if ctx.file.script:
         files += ctx.files.script
         user_link_flags += [
diff --git a/rules/manifest.bzl b/rules/manifest.bzl
index 548ced2777a50..aba3fadcc5ba4 100644
--- a/rules/manifest.bzl
+++ b/rules/manifest.bzl
@@ -9,6 +9,57 @@ _SEL_MANUF_STATE_CREATOR = (1 << 8)
 _SEL_MANUF_STATE_OWNER = (1 << 9)
 _SEL_LIFE_CYCLE_STATE = (1 << 10)
 
+def product_expr(name, mask, value):
+    """Create a Product Expression JSON object.
+
+    Args:
+        name: The name of the product expression (unused).
+        mask: The mask for the product expression.
+        value: The value for the product expression.
+    Returns:
+        A dictionary representing the product expression.
+    """
+    return {
+        "mask": mask,
+        "value": value,
+    }
+
+def integrator_specific_firmware_binding(name, strike_mask, product_exprs):
+    """Create an Integrator Specific Firmware Block (ISFB) JSON object.
+
+    Args:
+        name: The name of the ISFB (unused).
+        strike_mask: The strike mask for the ISFB.
+        product_exprs: A list of product expressions for the ISFB.
+
+    Returns:
+        A JSON string representing the ISFB.
+    """
+    isfb = {}
+
+    if strike_mask:
+        isfb["strike_mask"] = strike_mask
+
+    if product_exprs:
+        if len(product_exprs) > 16:
+            fail("Too many product expressions ({}), maximum is 16.".format(len(product_exprs)))
+
+        isfb["product_expr"] = product_exprs
+
+    return json.encode(isfb)
+
+def isfb_erase_allowed_policy(name, erase_allowed):
+    """Create an ISFB Erase Allowed Policy JSON object.
+
+    Args:
+        name: The name of the policy (unused).
+        erase_allowed: A boolean indicating if erasing is allowed.
+
+    Returns:
+        A JSON string representing the policy.
+    """
+    return json.encode({"erase_allowed": erase_allowed})
+
 def _manifest_impl(ctx):
     mf = {}
     mf_version = {}
@@ -107,14 +158,15 @@ def _manifest_impl(ctx):
     mf["usage_constraints"] = uc
 
     if ctx.attr.extensions:
-        mf["extensions"] = ctx.attr.extensions
+        extensions = [e or None for e in ctx.attr.extensions]
+        mf["extensions"] = extensions
     else:
         mf["extensions"] = [
             "spx_key",
             "spx_signature",
-            None,
-            None,
-            None,
+            "secver_write",
+            "isfb",
+            "isfb_erase",
             None,
             None,
             None,
@@ -127,6 +179,36 @@ def _manifest_impl(ctx):
             None,
         ]
 
+    mf["extension_params"] = []
+    if ctx.attr.integrator_specific_firmware_binding:
+        mf["extension_params"].append(
+            {
+                "integrator_specific_firmware_binding": json.decode(ctx.attr.integrator_specific_firmware_binding),
+            },
+        )
+
+    secver_write = ctx.attr.secver_write
+    if secver_write == "none":
+        # nothing to do
+        pass
+    elif secver_write in ("false", "true"):
+        mf["extension_params"].append(
+            {
+                "secver_write": {
+                    "secver_write": json.decode(secver_write),
+                },
+            },
+        )
+    else:
+        fail("Unknown value for secver_write:", secver_write)
+
+    if ctx.attr.isfb_erase_allowed_policy:
+        mf["extension_params"].append(
+            {
+                "isfb_erase_policy": json.decode(ctx.attr.isfb_erase_allowed_policy),
+            },
+        )
+
     file = ctx.actions.declare_file("{}.json".format(ctx.attr.name))
     ctx.actions.write(file, json.encode_indent(mf))
     return DefaultInfo(
@@ -161,6 +243,9 @@ _manifest = rule(
         "code_end": attr.string(doc = "End offset of the executable region in the image as a 0x-prefixed hex-encoded string"),
         "entry_point": attr.string(doc = "Offset of the first instruction in the image as a 0x-prefixed hex-encoded string"),
         "extensions": attr.string_list(doc = "Names of the manifest extensions as an array of strings"),
+        "integrator_specific_firmware_binding": attr.string(doc = "Create an Integrator Specific Firmware Block (ISFB) JSON object"),
+        "isfb_erase_allowed_policy": attr.string(doc = "Create an ISFB Erase Allowed Policy JSON object"),
+        "secver_write": attr.string(default = "none", values = ["none", "false", "true"], doc = "Add the secver_write extension with the specified value"),
     },
 )
 
diff --git a/rules/manuf.bzl b/rules/manuf.bzl
new file mode 100644
index 0000000000000..fef2a41bbe037
--- /dev/null
+++ b/rules/manuf.bzl
@@ -0,0 +1,95 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
+
+def _device_id_header_gen_impl(ctx):
+    tc = ctx.toolchains[LOCALTOOLS_TOOLCHAIN]
+
+    # Output files before/after autoformatting.
+    pre_formatted_c = ctx.actions.declare_file("{}.pre.c".format(ctx.attr.name))
+    formatted_c = ctx.actions.declare_file("{}.c".format(ctx.attr.name))
+
+    # Generate CP or FT device ID C file from a template.
+    args = [
+        "--mode={}".format(ctx.attr.mode),
+        "--sku-config={}".format(ctx.file.sku_config.path),
+        "--output={}".format(pre_formatted_c.path),
+        "--template={}".format(ctx.file.template.path),
+    ]
+
+    ctx.actions.run(
+        outputs = [pre_formatted_c],
+        inputs = [
+            ctx.file.sku_config,
+            ctx.file.template,
+        ],
+        arguments = args,
+        executable = tc.tools.gen_devid,
+        mnemonic = "GenDeviceId",
+    )
+
+    # Run clang-format on header file.
+    ctx.actions.run_shell(
+        outputs = [formatted_c],
+        inputs = [pre_formatted_c, ctx.executable.clang_format],
+        command = "{} {} > {}".format(
+            ctx.executable.clang_format.path,
+            pre_formatted_c.path,
+            formatted_c.path,
+        ),
+        mnemonic = "ClangFormat",
+    )
+
+    return [
+        DefaultInfo(files = depset([formatted_c])),
+        OutputGroupInfo(
+            sources = depset([formatted_c]),
+        ),
+    ]
+
+device_id_header_gen = rule(
+    implementation = _device_id_header_gen_impl,
+    attrs = {
+        "sku_config": attr.label(
+            allow_single_file = True,
+            doc = "Path to the hjson SKU config file.",
+        ),
+        "template": attr.label(
+            allow_single_file = True,
+            doc = "Path to the template C file that script will fill in.",
+        ),
+        "clang_format": attr.label(
+            default = "@lowrisc_rv32imcb_toolchain//:bin/clang-format",
+            allow_single_file = True,
+            cfg = "exec",
+            executable = True,
+            doc = "The clang-format executable",
+        ),
+        "mode": attr.string(
+            mandatory = True,
+            values = ["cp", "ft"],
+            doc = "The device ID portion to generate (cp or ft).",
+        ),
+    },
+    toolchains = [LOCALTOOLS_TOOLCHAIN],
+)
+
+def device_id_header(name, mode, headers, sku_config, template):
+    device_id_header_gen(
+        name = name,
+        mode = mode,
+        sku_config = sku_config,
+        template = template,
+    )
+    native.filegroup(
+        name = "{}_srcs".format(name),
+        srcs = [":{}".format(name)],
+        output_group = "sources",
+    )
+    native.cc_library(
+        name = "{}_library".format(name),
+        srcs = [":{}_srcs".format(name)],
+        hdrs = headers,
+    )
diff --git a/rules/opentitan.bzl b/rules/opentitan.bzl
deleted file mode 100644
index 54e3664f05c59..0000000000000
--- a/rules/opentitan.bzl
+++ /dev/null
@@ -1,1218 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:const.bzl", "CONST")
-load("//rules:signing.bzl", "sign_bin")
-load("@rules_cc//cc:action_names.bzl", "ACTION_NAMES")
-load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
-load(
-    "@lowrisc_opentitan//rules:rv.bzl",
-    "rv_rule",
-    _OPENTITAN_CPU = "OPENTITAN_CPU",
-    _OPENTITAN_PLATFORM = "OPENTITAN_PLATFORM",
-    _opentitan_transition = "opentitan_transition",
-)
-load("@crt//rules:transition.bzl", "platform_target")
-load("@bazel_skylib//rules:common_settings.bzl", "BuildSettingInfo")
-load("@bazel_skylib//lib:structs.bzl", "structs")
-load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
-
-"""Rules to build OpenTitan for the RISC-V target"""
-
-# Re-exports of names from transition.bzl; many files in the repo use opentitan.bzl
-# to get to them.
-OPENTITAN_CPU = _OPENTITAN_CPU
-OPENTITAN_PLATFORM = _OPENTITAN_PLATFORM
-opentitan_transition = _opentitan_transition
-
-_targets_compatible_with = {
-    OPENTITAN_PLATFORM: [OPENTITAN_CPU],
-}
-
-# This constant holds a dictionary of per-device dependencies which are used to
-# generate slightly different binaries for each hardware target, including two
-# simulation platforms (DV and Verilator), and two FPGA platforms (CW305
-# and CW310).
-PER_DEVICE_DEPS = {
-    "sim_verilator": ["@//sw/device/lib/arch:sim_verilator"],
-    "sim_dv": ["@//sw/device/lib/arch:sim_dv"],
-    "fpga_cw305": ["@//sw/device/lib/arch:fpga_cw305"],
-    "fpga_cw310": ["@//sw/device/lib/arch:fpga_cw310"],
-    "fpga_cw340": ["@//sw/device/lib/arch:fpga_cw340"],
-}
-
-def create_key_(name, label, hw_lc_states):
-    return struct(
-        name = name,
-        label = label,
-        hw_lc_states = hw_lc_states,
-    )
-
-def create_test_key(name, label):
-    return create_key_(name, label, [
-        CONST.LCV.TEST_UNLOCKED0,
-        CONST.LCV.TEST_UNLOCKED1,
-        CONST.LCV.TEST_UNLOCKED2,
-        CONST.LCV.TEST_UNLOCKED3,
-        CONST.LCV.TEST_UNLOCKED4,
-        CONST.LCV.TEST_UNLOCKED5,
-        CONST.LCV.TEST_UNLOCKED6,
-        CONST.LCV.TEST_UNLOCKED7,
-        CONST.LCV.RMA,
-    ])
-
-def create_dev_key(name, label):
-    return create_key_(name, label, [
-        CONST.LCV.DEV,
-    ])
-
-def create_prod_key(name, label):
-    return create_key_(name, label, [
-        CONST.LCV.TEST_UNLOCKED0,
-        CONST.LCV.TEST_UNLOCKED1,
-        CONST.LCV.TEST_UNLOCKED2,
-        CONST.LCV.TEST_UNLOCKED3,
-        CONST.LCV.TEST_UNLOCKED4,
-        CONST.LCV.TEST_UNLOCKED5,
-        CONST.LCV.TEST_UNLOCKED6,
-        CONST.LCV.TEST_UNLOCKED7,
-        CONST.LCV.DEV,
-        CONST.LCV.PROD,
-        CONST.LCV.PROD_END,
-        CONST.LCV.RMA,
-    ])
-
-def create_key_struct(ecdsa_key, rsa_key, spx_key):
-    return struct(
-        ecdsa = ecdsa_key,
-        rsa = rsa_key,
-        spx = spx_key,
-    )
-
-# Keys available in the repo
-SILICON_CREATOR_KEYS = struct(
-    FAKE = struct(
-        ECDSA = struct(
-            TEST = [
-                create_test_key("fake_ecdsa_test_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256"),
-            ],
-            DEV = [
-                create_dev_key("fake_ecdsa_dev_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:dev_key_0_ecdsa_p256"),
-            ],
-            PROD = [
-                create_prod_key("fake_ecdsa_prod_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256"),
-            ],
-        ),
-        SPX = struct(
-            TEST = [
-                create_test_key("fake_spx_test_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:test_key_0_spx"),
-            ],
-            DEV = [
-                create_dev_key("fake_spx_dev_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:dev_key_0_spx"),
-            ],
-            PROD = [
-                create_prod_key("fake_spx_prod_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx"),
-            ],
-        ),
-    ),
-    # We can't expose real private keys publicly.
-    REAL = None,
-    UNAUTHORIZED = struct(
-        SPX = [
-            create_key_("spx_unauthorized_0", "@//sw/device/silicon_creator/rom/keys/unauthorized/spx:unauthorized_0_spx", []),
-        ],
-    ),
-)
-
-SILICON_OWNER_KEYS = struct(
-    FAKE = struct(
-        RSA = struct(
-            TEST = [
-                create_test_key("fake_rsa_rom_ext_test_key_0", "@//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0"),
-            ],
-            DEV = [
-                create_dev_key("fake_rsa_rom_ext_dev_key_0", "@//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_dev_private_key_0"),
-            ],
-            PROD = None,
-        ),
-        # We can't expose real private keys publicly.
-        REAL = None,
-        UNAUTHORIZED = None,
-    ),
-)
-
-def flatten(l):
-    return [item for ll in l for item in ll]
-
-def key_allowed_in_lc_state(key, hw_lc_state_val):
-    all_hw_lc_state_vals = structs.to_dict(CONST.LCV).values()
-    if not hw_lc_state_val in all_hw_lc_state_vals:
-        fail("Wrong life cycle state value: '{}', must be one of {}. Did you pass a string instead of the integer value?".format(hw_lc_state_val, all_hw_lc_state_vals))
-    return hw_lc_state_val in key.hw_lc_states
-
-def filter_key_structs_for_lc_state(key_structs, hw_lc_state):
-    return [k for k in key_structs if (
-        (not k.rsa or key_allowed_in_lc_state(k.rsa, hw_lc_state)) and
-        (not k.ecdsa or key_allowed_in_lc_state(k.ecdsa, hw_lc_state)) and
-        (not k.spx or key_allowed_in_lc_state(k.spx, hw_lc_state))
-    )]
-
-ECDSA_ONLY_KEY_STRUCTS = [
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.TEST[0], None, None),
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.DEV[0], None, None),
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.PROD[0], None, None),
-]
-
-ECDSA_SPX_KEY_STRUCTS = [
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.TEST[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.TEST[0]),
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.DEV[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.DEV[0]),
-    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.PROD[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.PROD[0]),
-]
-
-RSA_ONLY_ROM_EXT_KEY_STRUCTS = [
-    create_key_struct(None, SILICON_OWNER_KEYS.FAKE.RSA.TEST[0], None),
-    create_key_struct(None, SILICON_OWNER_KEYS.FAKE.RSA.DEV[0], None),
-]
-
-def _obj_transform_impl(ctx):
-    cc_toolchain = find_cc_toolchain(ctx).cc
-    outputs = []
-    for src in ctx.files.srcs:
-        binary = ctx.actions.declare_file(
-            "{}.{}".format(
-                src.basename.replace("." + src.extension, ""),
-                ctx.attr.suffix,
-            ),
-        )
-        outputs.append(binary)
-        ctx.actions.run(
-            outputs = [binary],
-            inputs = [src] + cc_toolchain.all_files.to_list(),
-            arguments = [
-                "--output-target",
-                ctx.attr.format,
-                src.path,
-                binary.path,
-            ],
-            executable = cc_toolchain.objcopy_executable,
-        )
-    return [DefaultInfo(files = depset(outputs), data_runfiles = ctx.runfiles(files = outputs))]
-
-obj_transform = rv_rule(
-    implementation = _obj_transform_impl,
-    attrs = {
-        "srcs": attr.label_list(allow_files = True),
-        "suffix": attr.string(default = "bin"),
-        "format": attr.string(default = "binary"),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
-    },
-    toolchains = ["@rules_cc//cc:toolchain_type"],
-)
-
-# A provider for device-specific archive files that hold binaries of SRAM programs.
-ArchiveInfo = provider(fields = ["archive_infos"])
-
-def _bin_to_archive_impl(ctx):
-    cc_infos = []
-    cc_toolchain = find_cc_toolchain(ctx).cc
-    cc_info_dict = {}
-    num_devices = len(ctx.attr.devices)
-    num_binaries = len(ctx.attr.binaries)
-    if num_devices != num_binaries:
-        fail("Number of devices", num_devices, "must be equal to number of binaries", num_binaries)
-    for (device, binary_target) in zip(ctx.attr.devices, ctx.attr.binaries):
-        devname = "{}_{}".format(ctx.attr.name, device)
-        binary_file = binary_target.files.to_list()[0]
-        object_file = ctx.actions.declare_file("{}.o".format(devname))
-        renamed_object_file = ctx.actions.declare_file("{}.renamed.o".format(devname))
-        archive_file = ctx.actions.declare_file("{}.a".format(devname))
-
-        # Create a CcInfo to be able to use this rule as a dependency in other rules.
-        # See https://bazel.build/docs/integrating-with-rules-cc.
-        feature_configuration = cc_common.configure_features(
-            ctx = ctx,
-            cc_toolchain = cc_toolchain,
-            requested_features = ctx.features,
-            unsupported_features = ctx.disabled_features,
-        )
-        action_name = ACTION_NAMES.cpp_link_executable
-        c_linker_path = cc_common.get_tool_for_action(
-            feature_configuration = feature_configuration,
-            action_name = action_name,
-        )
-        c_link_variables = cc_common.create_link_variables(
-            feature_configuration = feature_configuration,
-            cc_toolchain = cc_toolchain,
-            output_file = object_file.path,
-        )
-        command_line = cc_common.get_memory_inefficient_command_line(
-            feature_configuration = feature_configuration,
-            action_name = action_name,
-            variables = c_link_variables,
-        )
-        env = cc_common.get_environment_variables(
-            feature_configuration = feature_configuration,
-            action_name = action_name,
-            variables = c_link_variables,
-        )
-        linker_path = cc_common.get_tool_for_action(
-            feature_configuration = feature_configuration,
-            action_name = action_name,
-        )
-
-        # Create an object file that contains the binary.
-        ctx.actions.run(
-            executable = cc_toolchain.ld_executable,
-            arguments = [
-                "-r",
-                "-b",
-                "binary",
-                "-o",
-                object_file.path,
-                binary_file.path,
-            ],
-            use_default_shell_env = False,
-            env = env,
-            inputs = depset(
-                direct = [binary_file],
-                transitive = [cc_toolchain.all_files],
-            ),
-            outputs = [object_file],
-            mnemonic = "CppLink",
-        )
-
-        # Rename symbols to make them more manageable.
-        sym_prefix = "_binary_" + binary_file.path.replace(".", "_").replace("/", "_").replace("-", "_")
-        suffixes = ["start", "end", "size"]
-        rename_args = []
-        for suffix in suffixes:
-            old_name = "{}_{}".format(sym_prefix, suffix)
-            new_name = "_{}_{}".format(ctx.attr.archive_symbol_prefix, suffix)
-            rename_args.extend(["--redefine-sym", "{}={}".format(old_name, new_name)])
-        rename_args.extend(["--rename-section", ".data=.data.sram_program"])
-        rename_args.extend([object_file.path, renamed_object_file.path])
-        ctx.actions.run(
-            executable = cc_toolchain.objcopy_executable,
-            arguments = rename_args,
-            use_default_shell_env = False,
-            env = env,
-            inputs = depset(
-                direct = [object_file],
-                transitive = [cc_toolchain.all_files],
-            ),
-            outputs = [renamed_object_file],
-            mnemonic = "RenameSymbols",
-        )
-
-        # Create an archive that contains the object file.
-        ctx.actions.run(
-            executable = cc_toolchain.ar_executable,
-            arguments = [
-                "r",
-                archive_file.path,
-                renamed_object_file.path,
-            ],
-            use_default_shell_env = False,
-            env = env,
-            inputs = depset(
-                direct = [renamed_object_file],
-                transitive = [cc_toolchain.all_files],
-            ),
-            outputs = [archive_file],
-            mnemonic = "Archive",
-        )
-
-        cc_info_dict[device] = CcInfo(
-            compilation_context = cc_common.create_compilation_context(
-                headers = depset(direct = ctx.attr.hdrs[0].files.to_list()),
-            ),
-            linking_context = cc_common.create_linking_context(
-                linker_inputs = depset([cc_common.create_linker_input(
-                    owner = ctx.label,
-                    libraries = depset([cc_common.create_library_to_link(
-                        actions = ctx.actions,
-                        feature_configuration = feature_configuration,
-                        cc_toolchain = cc_toolchain,
-                        static_library = archive_file,
-                    )]),
-                )]),
-            ),
-        )
-
-    return ArchiveInfo(archive_infos = cc_info_dict)
-
-bin_to_archive = rv_rule(
-    implementation = _bin_to_archive_impl,
-    attrs = {
-        "binaries": attr.label_list(allow_files = True),
-        "devices": attr.string_list(),
-        "hdrs": attr.label_list(allow_files = True),
-        "archive_symbol_prefix": attr.string(),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
-    },
-    fragments = ["cpp"],
-    toolchains = ["@rules_cc//cc:toolchain_type"],
-)
-
-def _elf_to_disassembly_impl(ctx):
-    cc_toolchain = find_cc_toolchain(ctx).cc
-    outputs = []
-    for src in ctx.files.srcs:
-        disassembly = ctx.actions.declare_file(
-            "{}.dis".format(
-                src.basename.replace("." + src.extension, ""),
-            ),
-        )
-        outputs.append(disassembly)
-        ctx.actions.run_shell(
-            outputs = [disassembly],
-            inputs = [src] + cc_toolchain.all_files.to_list(),
-            arguments = [
-                cc_toolchain.objdump_executable,
-                src.path,
-                disassembly.path,
-            ],
-            execution_requirements = {
-                "no-sandbox": "1",
-            },
-            command = "$1 -wx --disassemble --headers --line-numbers --disassemble-zeroes --source --visualize-jumps $2 | expand > $3",
-        )
-        return [DefaultInfo(files = depset(outputs), data_runfiles = ctx.runfiles(files = outputs))]
-
-elf_to_disassembly = rv_rule(
-    implementation = _elf_to_disassembly_impl,
-    attrs = {
-        "srcs": attr.label_list(allow_files = True),
-        "platform": attr.string(default = OPENTITAN_PLATFORM),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
-    },
-    toolchains = ["@rules_cc//cc:toolchain_type"],
-    incompatible_use_toolchain_transition = True,
-)
-
-def _elf_to_scrambled_rom_impl(ctx):
-    outputs = []
-    for src in ctx.files.srcs:
-        if src.extension != "elf":
-            fail("only ROM images in the ELF format may be converted to the VMEM format and scrambled.")
-        scrambled = ctx.actions.declare_file(
-            "{}.39.scr.vmem".format(
-                # Remove ".elf" from file basename.
-                src.basename.replace("." + src.extension, ""),
-            ),
-        )
-        outputs.append(scrambled)
-        ctx.actions.run(
-            outputs = [scrambled],
-            inputs = [
-                src,
-                ctx.executable._scramble_tool,
-                ctx.file._config,
-            ],
-            arguments = [
-                ctx.file._config.path,
-                src.path,
-                scrambled.path,
-            ],
-            executable = ctx.executable._scramble_tool,
-        )
-    return [DefaultInfo(
-        files = depset(outputs),
-        data_runfiles = ctx.runfiles(files = outputs),
-    )]
-
-elf_to_scrambled_rom_vmem = rv_rule(
-    implementation = _elf_to_scrambled_rom_impl,
-    attrs = {
-        "srcs": attr.label_list(allow_files = True),
-        "data": attr.label_list(allow_files = True),
-        "_scramble_tool": attr.label(
-            default = "@//hw/ip/rom_ctrl/util:scramble_image",
-            executable = True,
-            cfg = "exec",
-        ),
-        "_config": attr.label(
-            default = "@//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson",
-            allow_single_file = True,
-        ),
-    },
-)
-
-def _bin_to_vmem_impl(ctx):
-    outputs = []
-    vmem = ctx.actions.declare_file("{}.{}.vmem".format(
-        # Remove ".bin" from file basename.
-        ctx.file.bin.basename.replace("." + ctx.file.bin.extension, ""),
-        ctx.attr.word_size,
-    ))
-    outputs.append(vmem)
-    ctx.actions.run(
-        outputs = [vmem],
-        inputs = [
-            ctx.file.bin,
-        ],
-        arguments = [
-            ctx.file.bin.path,
-            "--binary",
-            # Reverse the endianness of every word.
-            "--offset",
-            "0x0",
-            "--byte-swap",
-            str(ctx.attr.word_size // 8),
-            # Pad to word alignment.
-            "--fill",
-            "0xff",
-            "-within",
-            ctx.file.bin.path,
-            "-binary",
-            "-range-pad",
-            str(ctx.attr.word_size // 8),
-            # Output a VMEM file with specified word size
-            "--output",
-            vmem.path,
-            "--vmem",
-            str(ctx.attr.word_size),
-        ],
-        # This this executable is expected to be installed (as required by the
-        # srecord package in apt-requirements.txt).
-        executable = "srec_cat",
-        use_default_shell_env = True,
-    )
-    return [DefaultInfo(
-        files = depset(outputs),
-        data_runfiles = ctx.runfiles(files = outputs),
-    )]
-
-bin_to_vmem = rv_rule(
-    implementation = _bin_to_vmem_impl,
-    attrs = {
-        "bin": attr.label(allow_single_file = True),
-        "word_size": attr.int(
-            default = 64,
-            doc = "Word size of VMEM file.",
-            mandatory = True,
-            values = [32, 64],
-        ),
-    },
-)
-
-def _scramble_flash_vmem_impl(ctx):
-    # Declare outputs.
-    outputs = []
-    scrambled_vmem = ctx.actions.declare_file("{}.scr.vmem".format(
-        # Remove ".vmem" from file basename.
-        ctx.file.vmem.basename.replace("." + ctx.file.vmem.extension, ""),
-    ))
-    outputs.append(scrambled_vmem)
-
-    # Build arguments / inputs to `gen-flash-img.py` script.
-    arguments = [
-        "--in-flash-vmem",
-        ctx.file.vmem.path,
-        "--out-flash-vmem",
-        scrambled_vmem.path,
-    ]
-    inputs = [
-        ctx.file.vmem,
-        ctx.executable._tool,
-    ]
-    if ctx.file.otp:
-        arguments.extend([
-            "--in-otp-vmem",
-            ctx.file.otp.path,
-            "--in-otp-mmap",
-            ctx.file.otp_mmap.path,
-        ])
-        inputs.extend([
-            ctx.file.otp,
-            ctx.file.otp_mmap,
-        ])
-        arguments.extend([
-            "--otp-seed",
-            str(ctx.attr.otp_seed[BuildSettingInfo].value),
-        ])
-        if ctx.attr.otp_data_perm:
-            arguments.extend([
-                "--otp-data-perm",
-                ctx.attr.otp_data_perm[BuildSettingInfo].value,
-            ])
-
-    # Run the action script.
-    ctx.actions.run(
-        outputs = outputs,
-        inputs = inputs,
-        arguments = arguments,
-        executable = ctx.executable._tool,
-    )
-    return [DefaultInfo(
-        files = depset(outputs),
-        data_runfiles = ctx.runfiles(files = outputs),
-    )]
-
-scramble_flash_vmem = rv_rule(
-    implementation = _scramble_flash_vmem_impl,
-    attrs = {
-        "otp": attr.label(allow_single_file = True),
-        "otp_mmap": attr.label(
-            allow_single_file = True,
-            default = "//hw/ip/otp_ctrl/data:otp_ctrl_mmap.hjson",
-            doc = "OTP memory map configuration HJSON file.",
-        ),
-        "otp_seed": attr.label(
-            default = "//hw/ip/otp_ctrl/data:otp_seed",
-            doc = "Configuration override seed used to randomize OTP netlist constants.",
-        ),
-        "vmem": attr.label(allow_single_file = True),
-        "otp_data_perm": attr.label(
-            default = "//hw/ip/otp_ctrl/data:data_perm",
-            doc = "Option to indicate OTP VMEM file bit layout.",
-        ),
-        "_tool": attr.label(
-            default = "@//util/design:gen-flash-img",
-            executable = True,
-            cfg = "exec",
-        ),
-    },
-)
-
-def _gen_sim_dv_logs_db_impl(ctx):
-    outputs = []
-    for src in ctx.files.srcs:
-        if src.extension != "elf":
-            fail("can only generate DV logs database files from ELF files.")
-        logs_db = ctx.actions.declare_file("{}.logs.txt".format(
-            src.basename.replace("." + src.extension, ""),
-        ))
-        rodata = ctx.actions.declare_file("{}.rodata.txt".format(
-            src.basename.replace("." + src.extension, ""),
-        ))
-        outputs.append(logs_db)
-        outputs.append(rodata)
-
-        ctx.actions.run(
-            outputs = outputs,
-            inputs = [src],
-            arguments = [
-                "--elf-file",
-                src.path,
-                "--logs-fields-section",
-                ".logs.fields",
-                "--name",
-                src.basename.replace("." + src.extension, ""),
-                "--outdir",
-                logs_db.dirname,
-            ],
-            executable = ctx.executable._tool,
-        )
-    return [DefaultInfo(
-        files = depset(outputs),
-        data_runfiles = ctx.runfiles(files = outputs),
-    )]
-
-gen_sim_dv_logs_db = rule(
-    implementation = _gen_sim_dv_logs_db_impl,
-    cfg = opentitan_transition,
-    attrs = {
-        "srcs": attr.label_list(allow_files = True),
-        "platform": attr.string(default = OPENTITAN_PLATFORM),
-        "_tool": attr.label(
-            default = "@//util/device_sw_utils:extract_sw_logs_db",
-            cfg = "exec",
-            executable = True,
-        ),
-        "_allowlist_function_transition": attr.label(
-            default = "@bazel_tools//tools/allowlists/function_transition_allowlist",
-        ),
-    },
-)
-
-def _assemble_flash_image_impl(ctx):
-    tc = ctx.toolchains[LOCALTOOLS_TOOLCHAIN]
-    output = ctx.actions.declare_file(ctx.attr.output)
-    outputs = [output]
-    inputs = []
-    arguments = [
-        "--rcfile=",
-        "image",
-        "assemble",
-        "--mirror",
-        "false",
-        "--output",
-        output.path,
-    ]
-    if ctx.attr.image_size:
-        arguments.append("--size={}".format(ctx.attr.image_size))
-    for binary, offset in ctx.attr.binaries.items():
-        inputs.extend(binary.files.to_list())
-        arguments.append("{}@{}".format(binary.files.to_list()[0].path, offset))
-    ctx.actions.run(
-        outputs = outputs,
-        inputs = inputs,
-        arguments = arguments,
-        executable = tc.tools.opentitantool,
-    )
-    return [DefaultInfo(
-        files = depset(outputs),
-        data_runfiles = ctx.runfiles(files = outputs),
-    )]
-
-assemble_flash_image = rv_rule(
-    implementation = _assemble_flash_image_impl,
-    attrs = {
-        "image_size": attr.int(default = 0, doc = "Size of the assembled image"),
-        "output": attr.string(),
-        "binaries": attr.label_keyed_string_dict(allow_empty = False),
-    },
-    toolchains = [LOCALTOOLS_TOOLCHAIN],
-)
-
-def opentitan_binary(
-        name,
-        platform = OPENTITAN_PLATFORM,
-        extract_sw_logs_db = False,
-        testonly = False,
-        **kwargs):
-    """A helper macro for generating OpenTitan binary artifacts.
-
-    This macro is mostly a wrapper around cc_binary, but creates artifacts
-    compatible with OpenTitan binaries. The actual artifacts created are outputs
-    of the rules listed below.
-    Args:
-      @param name: The name of this rule.
-      @param platform: The target platform for the artifacts.
-      @param extract_sw_logs_db: Whether to emit a log database for DV testbench.
-      @param **kwargs: Arguments to forward to `cc_binary`.
-    Emits rules:
-      cc_binary             named: <name>.elf
-      cc_binary+transition  named: <name>_elf_transition
-      obj_transform         named: <name>_bin
-      elf_to_dissassembly   named: <name>_dis
-      Optionally:
-        gen_sim_dv_logs_db  named: <name>_logs_db
-    Returns:
-      List of targets generated by all of the above rules.
-    """
-
-    copts = kwargs.pop("copts", []) + [
-        "-nostdlib",
-        "-ffreestanding",
-    ]
-    linkopts = kwargs.pop("linkopts", []) + [
-        "-nostartfiles",
-        "-nostdlib",
-    ]
-    deps = kwargs.pop("deps", [])
-    targets = []
-
-    native_binary_name = "{}.elf".format(name)
-    native.cc_binary(
-        name = native_binary_name,
-        deps = deps,
-        target_compatible_with = _targets_compatible_with[platform],
-        copts = copts,
-        linkopts = linkopts,
-        testonly = testonly,
-        **kwargs
-    )
-    elf_transition_binary_name = "{}_elf_transition".format(name)
-    targets.append(":" + elf_transition_binary_name)
-    platform_target(
-        name = elf_transition_binary_name,
-        platform = platform,
-        target = native_binary_name,
-        testonly = testonly,
-    )
-
-    bin_name = "{}_{}".format(name, "bin")
-    targets.append(":" + bin_name)
-    obj_transform(
-        name = bin_name,
-        srcs = [native_binary_name],
-        platform = platform,
-        testonly = testonly,
-    )
-
-    dis_name = "{}_{}".format(name, "dis")
-    targets.append(":" + dis_name)
-    elf_to_disassembly(
-        name = dis_name,
-        srcs = [native_binary_name],
-        platform = platform,
-        testonly = testonly,
-    )
-
-    # Generate log message database for DV sim testbench
-    if extract_sw_logs_db:
-        logs_db_name = "{}_{}".format(name, "logs_db")
-        targets.append(":" + logs_db_name)
-        gen_sim_dv_logs_db(
-            name = logs_db_name,
-            srcs = [native_binary_name],
-            platform = platform,
-            testonly = testonly,
-        )
-
-    return targets
-
-def opentitan_rom_binary(
-        name,
-        devices = PER_DEVICE_DEPS.keys(),
-        platform = OPENTITAN_PLATFORM,
-        testonly = False,
-        **kwargs):
-    """A helper macro for generating OpenTitan binary artifacts for ROM.
-
-    This macro is mostly a wrapper around the `opentitan_binary` macro, but also
-    creates artifacts for each of the keys in `PER_DEVICE_DEPS`. The actual
-    artifacts created are outputs of the rules emitted by the `opentitan_binary`
-    macro and those listed below.
-    Args:
-      @param name: The name of this rule.
-      @param devices: List of devices to build the target for.
-      @param platform: The target platform for the artifacts.
-      @param **kwargs: Arguments to forward to `opentitan_binary`.
-    Emits rules:
-      For each device in per_device_deps entry:
-        rules emitted by `opentitan_binary` named: see `opentitan_binary` macro
-        bin_to_rom_vmem                     named: <name>_<device>_vmem
-        elf_to_scrambled_rom_vmem           named: <name>_<device>_scr_vmem
-        filegroup                           named: <name>_<device>
-          Containing all targets for a single device for the above generated rules.
-        filegroup                           named: <name>
-          Containing all targets across all devices for the above generated rules.
-    """
-    deps = kwargs.pop("deps", [])
-    all_targets = []
-    for device in devices:
-        if device not in PER_DEVICE_DEPS:
-            fail("invalid device; device must be in {}".format(PER_DEVICE_DEPS.keys()))
-        dev_deps = PER_DEVICE_DEPS[device]
-        devname = "{}_{}".format(name, device)
-        dev_targets = []
-
-        # Generate ELF, Binary, Disassembly, and (maybe) sim_dv logs database
-        dev_targets.extend(opentitan_binary(
-            name = devname,
-            deps = deps + dev_deps,
-            extract_sw_logs_db = device == "sim_dv",
-            testonly = testonly,
-            **kwargs
-        ))
-
-        # We need to generate VMEM files even for FPGA devices, because we use
-        # them for bitstream splicing.
-        elf_name = "{}.{}".format(devname, "elf")
-        bin_name = "{}_{}".format(devname, "bin")
-
-        # Generate Un-scrambled ROM VMEM
-        vmem_name = "{}_vmem".format(devname)
-        dev_targets.append(":" + vmem_name)
-        bin_to_vmem(
-            name = vmem_name,
-            bin = bin_name,
-            platform = platform,
-            testonly = testonly,
-            word_size = 32,
-        )
-
-        # Generate Scrambled ROM VMEM
-        scr_vmem_name = "{}_scr_vmem".format(devname)
-        dev_targets.append(":" + scr_vmem_name)
-        elf_to_scrambled_rom_vmem(
-            name = scr_vmem_name,
-            srcs = [elf_name],
-            platform = platform,
-            testonly = testonly,
-        )
-
-        # Create a filegroup with just the current device's targets.
-        native.filegroup(
-            name = devname,
-            srcs = dev_targets,
-            testonly = testonly,
-        )
-        all_targets.extend(dev_targets)
-
-    # Create a filegroup with just all targets from all devices.
-    native.filegroup(
-        name = name,
-        srcs = all_targets,
-        testonly = testonly,
-    )
-
-def _pick_correct_archive_for_device(ctx):
-    cc_infos = []
-    for dep in ctx.attr.deps:
-        if CcInfo in dep:
-            cc_info = dep[CcInfo]
-        elif ArchiveInfo in dep:
-            cc_info = dep[ArchiveInfo].archive_infos[ctx.attr.device]
-        else:
-            fail("Expected either a CcInfo or an ArchiveInfo")
-        cc_infos.append(cc_info)
-    return [cc_common.merge_cc_infos(cc_infos = cc_infos)]
-
-pick_correct_archive_for_device = rv_rule(
-    implementation = _pick_correct_archive_for_device,
-    attrs = {
-        "deps": attr.label_list(allow_files = True),
-        "device": attr.string(),
-    },
-    fragments = ["cpp"],
-    toolchains = ["@rules_cc//cc:toolchain_type"],
-)
-
-def opentitan_multislot_flash_binary(
-        name,
-        srcs,
-        image_size = 0,
-        devices = PER_DEVICE_DEPS.keys(),
-        platform = OPENTITAN_PLATFORM,
-        testonly = False):
-    """A helper macro for generating multislot OpenTitan binary flash images.
-
-    This macro is mostly a wrapper around the `assemble_flash_image` rule, that
-    invokes `opentitantool` to stitch together multiple `opentitan_flash_binary`
-    images to create a single image for bootstrapping. Since bootstrap erases
-    the flash for programming this is the only way to load multiple
-    (A/B/Virtual) slots and (silicon creator, ROM_EXT, and owner, BL0) stages at
-    the same time.
-    Args:
-      @param name: The name of this rule.
-      @param srcs: A dictionary of `opentitan_flash_binary` targets (to stitch
-                   together) as keys, and key/offset configurations as values.
-      @param image_size: The final flash image_size to pass to `opentitantool`
-                         (optional).
-      @param devices: List of devices to build the target for.
-      @param platform: The target platform for the artifacts.
-    Emits rules:
-      For each device in per_device_deps entry:
-        rules emitted by `opentitan_binary` named: see `opentitan_binary` macro
-        assemble_flash_image named: <name>_<device>_bin_signed
-        bin_to_vmem          named: <name>_<device>_vmem64_signed
-        scrambled_flash_vmem named: <name>_<device>_scr_vmem64_signed
-        filegroup            named: <name>_<device>
-          Containing all targets for a single device for the above generated rules.
-        filegroup            named: <name>
-          Containing all targets across all devices for the above generated rules.
-    """
-    all_targets = []
-    for device in devices:
-        if device not in PER_DEVICE_DEPS:
-            fail("invalid device; device must be in {}".format(PER_DEVICE_DEPS.keys()))
-        devname = "{}_{}".format(name, device)
-        dev_targets = []
-        signed_dev_binaries = {}
-        for src, configs in srcs.items():
-            if "key" not in configs:
-                fail("Missing signing key for binary: {}".format(src))
-            if "offset" not in configs:
-                fail("Missing offset for binary: {}".format(src))
-            signed_dev_binary = "{}_{}_bin_signed_{}".format(
-                src,
-                device,
-                configs["key"] if type(configs["key"]) == "string" else configs["key"].rsa.name,
-                testonly = testonly,
-            )
-            signed_dev_binaries[signed_dev_binary] = configs["offset"]
-
-        # Assemble the signed binaries into a single binary.
-        signed_bin_name = "{}_bin_signed".format(devname)
-        dev_targets.append(":" + signed_bin_name)
-        assemble_flash_image(
-            name = signed_bin_name,
-            output = "{}.signed.bin".format(devname),
-            image_size = image_size,
-            binaries = signed_dev_binaries,
-            testonly = testonly,
-        )
-
-        # We only need to generate VMEM files for sim devices.
-        if device in ["sim_dv", "sim_verilator"]:
-            # Generate a VMEM64 from the binary.
-            signed_vmem_name = "{}_vmem64_signed".format(devname)
-            dev_targets.append(":" + signed_vmem_name)
-            bin_to_vmem(
-                name = signed_vmem_name,
-                bin = signed_bin_name,
-                platform = platform,
-                testonly = testonly,
-                word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
-            )
-
-            # Scramble signed VMEM64.
-            scr_signed_vmem_name = "{}_scr_vmem64_signed".format(devname)
-            dev_targets.append(":" + scr_signed_vmem_name)
-            scramble_flash_vmem(
-                name = scr_signed_vmem_name,
-                vmem = signed_vmem_name,
-                platform = platform,
-                testonly = testonly,
-            )
-
-        # Create a filegroup with just the current device's targets.
-        native.filegroup(
-            name = devname,
-            srcs = dev_targets,
-            testonly = testonly,
-        )
-        dev_targets.extend(dev_targets)
-
-    # Create a filegroup with all assembled flash images.
-    native.filegroup(
-        name = name,
-        srcs = all_targets,
-        testonly = testonly,
-    )
-
-def opentitan_flash_binary(
-        name,
-        devices = PER_DEVICE_DEPS.keys(),
-        platform = OPENTITAN_PLATFORM,
-        signing_key_structs = ECDSA_ONLY_KEY_STRUCTS + RSA_ONLY_ROM_EXT_KEY_STRUCTS,
-        signed = True,
-        sim_otp = None,
-        testonly = False,
-        manifest = "//sw/device/silicon_creator/rom_ext:manifest",
-        **kwargs):
-    """A helper macro for generating OpenTitan binary artifacts for flash.
-
-    This macro is mostly a wrapper around the `opentitan_binary` macro, but also
-    creates artifacts for each of the keys in `PER_DEVICE_DEPS`, and if signing
-    is enabled, each of the keys in `signing_key_structs`. The actual artifacts created
-    artifacts created are outputs of the rules emitted by the `opentitan_binary`
-    macro and those listed below.
-    Args:
-      @param name: The name of this rule.
-      @param devices: List of devices to build the target for.
-      @param platform: The target platform for the artifacts.
-      @param signing_key_structs: The signing keys to sign each BIN file with.
-      @param signed: Whether or not to emit signed binary/VMEM files.
-      @param sim_otp: OTP image that contains flash scrambling keys / enablement flag
-                      (only relevant for VMEM files built for sim targets).
-      @param manifest: Partially populated manifest to set boot stage/slot configs.
-      @param **kwargs: Arguments to forward to `opentitan_binary`.
-    Emits rules:
-      For each device in per_device_deps entry:
-        rules emitted by `opentitan_binary` named: see `opentitan_binary` macro
-        bin_to_vmem                         named: <name>_<device>_vmem64
-        scrambled_flash_vmem                named: <name>_<device>_scr_vmem64
-        Optionally:
-          sign_bin             named: <name>_<device>_bin_signed_<key_name>
-          bin_to_vmem          named: <name>_<device>_vmem64_signed_<key_name>
-          scrambled_flash_vmem named: <name>_<device>_scr_vmem64_signed_<key_name>
-        filegroup              named: <name>_<device>
-          Containing all targets for a single device for the above generated rules.
-        filegroup              named: <name>
-          Containing all targets across all devices for the above generated rules.
-    """
-    deps = kwargs.pop("deps", [])
-    all_targets = []
-    binaries = []
-    for device in devices:
-        if device not in PER_DEVICE_DEPS:
-            fail("invalid device; device must be in {}".format(PER_DEVICE_DEPS.keys()))
-        dev_deps = PER_DEVICE_DEPS[device]
-        devname = "{}_{}".format(name, device)
-        dev_targets = []
-
-        depname = "{}_deps".format(devname)
-        pick_correct_archive_for_device(
-            name = depname,
-            deps = deps + dev_deps,
-            device = device,
-            testonly = testonly,
-        )
-
-        # Generate ELF, Binary, Disassembly, and (maybe) sim_dv logs database
-        dev_targets.extend(opentitan_binary(
-            name = devname,
-            deps = [depname],
-            extract_sw_logs_db = device == "sim_dv",
-            testonly = testonly,
-            **kwargs
-        ))
-        bin_name = "{}_{}".format(devname, "bin")
-        binaries.append(":" + bin_name)
-
-        # Sign BIN (if required) and generate scrambled VMEM images.
-        if signed:
-            if manifest == None:
-                fail("A 'manifest' must be provided in order to sign flash images.")
-            for key_struct in signing_key_structs:
-                if key_struct.spx:
-                    # Sign the binary using RSA and SPX+.
-                    key_name = "{}_{}".format(key_struct.rsa.name, key_struct.spx.name)
-                    signed_bin_name = "{}_bin_signed_{}".format(devname, key_name)
-                    dev_targets.append(":" + signed_bin_name)
-                    sign_bin(
-                        name = signed_bin_name,
-                        bin = bin_name,
-                        rsa_key = {key_struct.rsa.label: key_struct.rsa.name},
-                        spx_key = {key_struct.spx.label: key_struct.spx.name},
-                        manifest = manifest,
-                        testonly = testonly,
-                    )
-                else:
-                    # Sign the binary using RSA only.
-                    key_name = "{}".format(key_struct.rsa.name)
-                    signed_bin_name = "{}_bin_signed_{}".format(devname, key_name)
-                    dev_targets.append(":" + signed_bin_name)
-                    sign_bin(
-                        name = signed_bin_name,
-                        bin = bin_name,
-                        rsa_key = {key_struct.rsa.label: key_struct.rsa.name},
-                        manifest = manifest,
-                        testonly = testonly,
-                    )
-
-                # We only need to generate VMEM files for sim devices.
-                if device in ["sim_dv", "sim_verilator"]:
-                    # Generate a VMEM64 from the signed binary.
-                    signed_vmem_name = "{}_vmem64_signed_{}".format(
-                        devname,
-                        key_name,
-                    )
-                    dev_targets.append(":" + signed_vmem_name)
-                    bin_to_vmem(
-                        name = signed_vmem_name,
-                        bin = signed_bin_name,
-                        platform = platform,
-                        testonly = testonly,
-                        word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
-                    )
-
-                    # Scramble / compute ECC for signed VMEM64.
-                    scr_signed_vmem_name = "{}_scr_vmem64_signed_{}".format(
-                        devname,
-                        key_name,
-                    )
-                    dev_targets.append(":" + scr_signed_vmem_name)
-                    scramble_flash_vmem(
-                        name = scr_signed_vmem_name,
-                        otp = sim_otp,
-                        vmem = signed_vmem_name,
-                        platform = platform,
-                        testonly = testonly,
-                    )
-
-        # We only need to generate VMEM files for sim devices.
-        if device in ["sim_dv", "sim_verilator"]:
-            # Generate a VMEM64 from the binary.
-            vmem_name = "{}_vmem64".format(devname)
-            dev_targets.append(":" + vmem_name)
-            bin_to_vmem(
-                name = vmem_name,
-                bin = bin_name,
-                platform = platform,
-                testonly = testonly,
-                word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
-            )
-
-            # Scramble / compute ECC for VMEM64.
-            scr_vmem_name = "{}_scr_vmem64".format(devname)
-            dev_targets.append(":" + scr_vmem_name)
-            scramble_flash_vmem(
-                name = scr_vmem_name,
-                otp = sim_otp,
-                vmem = vmem_name,
-                platform = platform,
-                testonly = testonly,
-            )
-
-        # Create a filegroup with just the current device's targets.
-        native.filegroup(
-            name = devname,
-            srcs = dev_targets,
-            testonly = testonly,
-        )
-        all_targets.extend(dev_targets)
-
-    # Create a filegroup with all targets from all devices.
-    native.filegroup(
-        name = name,
-        srcs = all_targets,
-        testonly = testonly,
-    )
-
-    # Create a filegroup with all binary targets.
-    native.filegroup(
-        name = name + "_bin",
-        srcs = binaries,
-        testonly = testonly,
-    )
-
-def opentitan_ram_binary(
-        name,
-        archive_symbol_prefix,
-        devices = PER_DEVICE_DEPS.keys(),
-        platform = OPENTITAN_PLATFORM,
-        testonly = False,
-        **kwargs):
-    """A helper macro for generating OpenTitan binary artifacts for RAM.
-
-    This macro is mostly a wrapper around the `opentitan_binary` macro, but also
-    creates artifacts for each of the keys in `PER_DEVICE_DEPS`. The actual
-    artifacts created are outputs of the rules emitted by the `opentitan_binary`
-    macro and those listed below.
-    Args:
-      @param name: The name of this rule.
-      @param archive_symbol_prefix: Prefix used to rename symbols in the binary.
-      @param devices: List of devices to build the target for.
-      @param platform: The target platform for the artifacts.
-      @param **kwargs: Arguments to forward to `opentitan_binary`.
-    Emits rules:
-      For each device in per_device_deps entry:
-        rules emitted by `opentitan_binary` named: see `opentitan_binary` macro
-      bin_to_archive            named: <name>
-      bin_to_vmem               named: <name>_<device>_vmem
-    """
-    deps = kwargs.pop("deps", [])
-    hdrs = kwargs.pop("hdrs", [])
-    binaries = []
-    for device in devices:
-        if device not in PER_DEVICE_DEPS:
-            fail("invalid device; device must be in {}".format(PER_DEVICE_DEPS.keys()))
-        dev_deps = PER_DEVICE_DEPS[device]
-        devname = "{}_{}".format(name, device)
-        dev_targets = []
-
-        # Generate the binary.
-        dev_targets.extend(opentitan_binary(
-            name = devname,
-            deps = deps + dev_deps,
-            extract_sw_logs_db = device == "sim_dv",
-            testonly = testonly,
-            **kwargs
-        ))
-        bin_name = "{}_{}".format(devname, "bin")
-        binaries.append(":" + bin_name)
-
-        # Generate Un-scrambled RAM VMEM (for testing SRAM injection in DV)
-        vmem_name = "{}_vmem".format(devname)
-        dev_targets.append(":" + vmem_name)
-        bin_to_vmem(
-            name = vmem_name,
-            bin = bin_name,
-            platform = platform,
-            testonly = testonly,
-            word_size = 32,
-        )
-
-        # Create a filegroup with just the current device's targets.
-        native.filegroup(
-            name = devname,
-            srcs = dev_targets,
-            testonly = testonly,
-        )
-
-    # Generate the archive file.
-    bin_to_archive(
-        name = name,
-        hdrs = hdrs,
-        binaries = binaries,
-        devices = PER_DEVICE_DEPS.keys(),
-        archive_symbol_prefix = archive_symbol_prefix,
-        testonly = testonly,
-    )
diff --git a/rules/opentitan/cc.bzl b/rules/opentitan/cc.bzl
index 941b763215140..48f99fdea5da9 100644
--- a/rules/opentitan/cc.bzl
+++ b/rules/opentitan/cc.bzl
@@ -2,28 +2,19 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
-load(
-    "@lowrisc_opentitan//rules:rv.bzl",
-    "rv_rule",
-    _OPENTITAN_CPU = "OPENTITAN_CPU",
-    _OPENTITAN_PLATFORM = "OPENTITAN_PLATFORM",
-    _opentitan_transition = "opentitan_transition",
-)
-load("@lowrisc_opentitan//rules:signing.bzl", "sign_binary")
-load("@lowrisc_opentitan//rules/opentitan:exec_env.bzl", "ExecEnvInfo")
-load("@lowrisc_opentitan//rules/opentitan:util.bzl", "get_fallback", "get_override")
 load(
     "@lowrisc_opentitan//rules/opentitan:transform.bzl",
+    "convert_to_vmem",
     "obj_disassemble",
     "obj_transform",
 )
-
-# Re-exports of names from transition.bzl; many files in the repo use opentitan.bzl
-# to get to them.
-OPENTITAN_CPU = _OPENTITAN_CPU
-OPENTITAN_PLATFORM = _OPENTITAN_PLATFORM
-opentitan_transition = _opentitan_transition
+load("@lowrisc_opentitan//rules:signing.bzl", "sign_binary")
+load("@lowrisc_opentitan//rules/opentitan:exec_env.bzl", "ExecEnvInfo")
+load("@lowrisc_opentitan//rules/opentitan:util.bzl", "get_fallback", "get_override")
+load("@lowrisc_opentitan//rules:rv.bzl", "rv_rule")
+load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
+load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
+load("//rules/opentitan:util.bzl", "assemble_for_test", "recursive_format")
 
 def _expand(ctx, name, items):
     """Perform location and make_variable expansion on a list of items.
@@ -53,11 +44,11 @@ def ot_binary(ctx, **kwargs):
         includes: Include directories to pass to the compiler.
         deps: Dependencies for this binary.
         linker_script: Linker script for this binary.
-        linkopts: Linker options for this binary.
+        linkopts: Extra linker options for this binary.
     Returns:
       (elf_file, map_file) File objects.
     """
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
     features = cc_common.configure_features(
         ctx = ctx,
         cc_toolchain = cc_toolchain,
@@ -102,10 +93,16 @@ def ot_binary(ctx, **kwargs):
         linking_contexts.append(linker_script[CcInfo].linking_context)
     mapfile = kwargs.get("mapfile", "{}.map".format(name))
     mapfile = ctx.actions.declare_file(mapfile)
+
+    extra_linkopts = (ctx.attr.linkopts or []) + kwargs.get("linkopts", [])
+
     linkopts = [
         "-Wl,-Map={}".format(mapfile.path),
         "-nostdlib",
-    ] + _expand(ctx, "linkopts", get_override(ctx, "attr.linkopts", kwargs))
+    ] + _expand(ctx, "linkopts", extra_linkopts)
+
+    if ctx.var.get("ot_coverage_enabled", "false") == "true":
+        linkopts.append("-Wl,--defsym=_ot_coverage_enabled=1")
 
     lout = cc_common.link(
         name = name + ".elf",
@@ -176,21 +173,32 @@ def _build_binary(ctx, exec_env, name, deps, kind):
       (dict, dict): A dict of output artifacts and a dict of signing artifacts.
     """
     linker_script = get_fallback(ctx, "attr.linker_script", exec_env)
+
+    slot_spec = dict(exec_env.slot_spec)
+    slot_spec.update(ctx.attr.slot_spec)
+
+    linkopts = ["-Wl,--defsym=_{}={}".format(key, value) for key, value in slot_spec.items()]
+
     elf, mapfile = ot_binary(
         ctx,
         name = name,
         deps = deps,
         linker_script = linker_script,
+        linkopts = linkopts,
     )
     binary = obj_transform(
         ctx,
         name = name,
+        strip_llvm_prf_cnts = True,
         suffix = "bin",
         format = "binary",
         src = elf,
     )
 
     manifest = get_fallback(ctx, "file.manifest", exec_env)
+    if manifest and str(manifest.owner).endswith("@//hw/top_earlgrey:none_manifest"):
+        manifest = None
+
     ecdsa_key = get_fallback(ctx, "attr.ecdsa_key", exec_env)
     rsa_key = get_fallback(ctx, "attr.rsa_key", exec_env)
     spx_key = get_fallback(ctx, "attr.spx_key", exec_env)
@@ -232,15 +240,17 @@ def _opentitan_binary(ctx):
     providers = []
     default_info = []
     groups = {}
-    for exec_env in ctx.attr.exec_env:
-        exec_env = exec_env[ExecEnvInfo]
+    for exec_env_target in ctx.attr.exec_env:
+        exec_env = exec_env_target[ExecEnvInfo]
         name = _binary_name(ctx, exec_env)
         deps = ctx.attr.deps + exec_env.libs
+
         kind = ctx.attr.kind
         provides, signed = _build_binary(ctx, exec_env, name, deps, kind)
-        providers.append(exec_env.provider(**provides))
+        providers.append(exec_env.provider(kind = kind, **provides))
         default_info.append(provides["default"])
         default_info.append(provides["elf"])
+        default_info.append(provides["disassembly"])
 
         # FIXME(cfrantz): logs are a special case and get added into
         # the DefaultInfo provider.
@@ -331,6 +341,16 @@ common_binary_attrs = {
         executable = True,
         cfg = "exec",
     ),
+    "slot_spec": attr.string_dict(
+        default = {},
+        doc = "Firmware slot spec to use in this environment",
+    ),
+    "_check_initial_coverage": attr.label(
+        doc = "Tool to check the coverage counter initialization.",
+        default = "//util/coverage:check_initial_coverage",
+        executable = True,
+        cfg = "exec",
+    ),
 }
 
 opentitan_binary = rv_rule(
@@ -378,9 +398,19 @@ def _opentitan_test(ctx):
         p = None
 
     executable, runfiles = exec_env.test_dispatch(ctx, exec_env, p)
+    if ctx.attr.test_harness != None:
+        harness_runfiles = ctx.attr.test_harness[DefaultInfo].default_runfiles
+    else:
+        harness_runfiles = ctx.runfiles()
+
+    if ctx.var.get("ot_coverage_enabled", "false") == "true":
+        coverage_runfiles = ctx.attr._collect_cc_coverage[DefaultInfo].default_runfiles
+    else:
+        coverage_runfiles = ctx.runfiles()
+
     return DefaultInfo(
         executable = executable,
-        runfiles = ctx.runfiles(files = runfiles),
+        runfiles = ctx.runfiles(files = runfiles).merge_all([harness_runfiles, coverage_runfiles]),
     )
 
 opentitan_test = rv_rule(
@@ -393,6 +423,7 @@ opentitan_test = rv_rule(
         "test_harness": attr.label(
             executable = True,
             cfg = "exec",
+            allow_files = True,
         ),
         "binaries": attr.label_keyed_string_dict(
             allow_files = True,
@@ -447,8 +478,122 @@ opentitan_test = rv_rule(
             doc = "OpenOCD adapter configuration override for this test",
         ),
         "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+        "_lcov_merger": attr.label(
+            default = configuration_field(fragment = "coverage", name = "output_generator"),
+            executable = True,
+            cfg = "exec",
+        ),
+        "_collect_cc_coverage": attr.label(
+            default = "//util/coverage/collect_cc_coverage",
+            executable = True,
+            cfg = "exec",
+        ),
     }.items()),
     fragments = ["cpp"],
     toolchains = ["@rules_cc//cc:toolchain_type"],
     test = True,
 )
+
+def _opentitan_binary_assemble_impl(ctx):
+    assembled_bins = []
+    result = []
+    tc = ctx.toolchains[LOCALTOOLS_TOOLCHAIN]
+    for env in ctx.attr.exec_env:
+        exec_env = env[ExecEnvInfo]
+        exec_env_name = exec_env.exec_env
+        exec_env_provider = exec_env.provider
+        name = "{}_{}".format(ctx.attr.name, exec_env_name)
+        spec = []
+        input_bins = []
+        for binary, offset in ctx.attr.bins.items():
+            if binary[exec_env_provider].kind != "flash":
+                fail("Only flash binaries can be assembled.")
+            input_bins.append(binary[exec_env_provider].default)
+            spec.append("{}@{}".format(binary[exec_env_provider].default.path, offset))
+
+        action_param = {}
+        action_param.update(exec_env.slot_spec)
+
+        spec = " ".join(spec)
+        spec = recursive_format(spec, action_param)
+        spec = spec.split(" ")
+
+        # Generate the multislot bin.
+        bin = assemble_for_test(ctx, name, spec, input_bins, tc.tools.opentitantool)
+
+        # Generate unscrambled VMEM files.
+        #
+        # Multi-slot binaries are currently only used for bootstrap operations,
+        # i.e., non-backdoor loaded sim environments and FPGA/silicon
+        # environments. Therefore we only need unscrambled VMEM files.
+        vmem = convert_to_vmem(
+            ctx,
+            name = name,
+            src = bin,
+            word_size = 64,
+        )
+        result.append(exec_env_provider(default = bin, kind = "flash", vmem = vmem))
+        assembled_bins.append(bin)
+        assembled_bins.append(vmem)
+    return result + [DefaultInfo(files = depset(assembled_bins))]
+
+opentitan_binary_assemble = rule(
+    implementation = _opentitan_binary_assemble_impl,
+    attrs = {
+        "bins": attr.label_keyed_string_dict(
+            allow_files = True,
+            mandatory = True,
+            doc = "Dictionary of binaries and the offsets they should be placed.",
+        ),
+        "exec_env": attr.label_list(
+            providers = [ExecEnvInfo],
+            doc = "List of execution environments for this target.",
+        ),
+    },
+    toolchains = [LOCALTOOLS_TOOLCHAIN],
+)
+
+def _exec_env_filegroup(ctx):
+    files = {v: k for k, v in ctx.attr.files.items()}
+    exec_env = {v: k for k, v in ctx.attr.exec_env.items()}
+
+    fset = {k: 1 for k in files.keys()}
+    eset = {k: 1 for k in exec_env.keys()}
+
+    if fset != eset:
+        fail("The set of files and exec_envs must be matched: files =", fset.keys(), ", exec_env =", eset.keys())
+
+    result = []
+    default_files = []
+    for k in files.keys():
+        provider = exec_env[k][ExecEnvInfo].provider
+        f = files[k].files.to_list()
+        if len(f) != 1:
+            fail("files[{}] must supply exactly one file".format(k))
+
+        # Return the exec_env's provider so this rule can be consumed by
+        # opentitan_test rules.
+        result.append(provider(default = f[0], kind = ctx.attr.kind))
+        default_files.append(f[0])
+
+    # Also return a DefaultInfo provider so this rule can be consumed by other
+    # filegroup or packaging rules.
+    result.append(DefaultInfo(files = depset(default_files)))
+    return result
+
+exec_env_filegroup = rule(
+    implementation = _exec_env_filegroup,
+    attrs = {
+        "files": attr.label_keyed_string_dict(
+            allow_files = True,
+            mandatory = True,
+            doc = "Dictionary of files to exec_envs.",
+        ),
+        "exec_env": attr.label_keyed_string_dict(
+            providers = [ExecEnvInfo],
+            mandatory = True,
+            doc = "Dictionary of execution environments for this target.",
+        ),
+        "kind": attr.string(default = "flash", doc = "The kind of binary"),
+    },
+)
diff --git a/rules/opentitan/ci.bzl b/rules/opentitan/ci.bzl
new file mode 100644
index 0000000000000..2242f4e76f84d
--- /dev/null
+++ b/rules/opentitan/ci.bzl
@@ -0,0 +1,41 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_skylib//lib:sets.bzl", "sets")
+
+# List of execution environments among which only one should run. The list
+# is sorted by priority: the first available will be picked.
+#
+# Important note: since only one of the those will be chosen, it is important
+# that every one of the execution environments be run in some CI job, otherwise
+# some tests will not run at all in CI.
+_ONLY_RUN_ONE_IN_CI_SORTED = [
+    "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+    "//hw/top_earlgrey:fpga_cw310_rom_ext",
+    "//hw/top_earlgrey:fpga_cw310_sival",
+    "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+    "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    "//hw/top_earlgrey:fpga_cw310_test_rom",
+    "//hw/top_earlgrey:fpga_cw340_sival_rom_ext",
+    "//hw/top_earlgrey:fpga_cw340_sival",
+    "//hw/top_earlgrey:fpga_cw340_rom_ext",
+    "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+    "//hw/top_earlgrey:fpga_cw340_test_rom",
+]
+
+def ci_orchestrator(test_name, exec_envs):
+    """
+    Given a list of execution environments, return the subset of this list
+    that should be skipped in CI.
+    """
+    exec_env_sets = sets.make(exec_envs)
+    found_one = False
+    skip_in_ci = []
+    for env in _ONLY_RUN_ONE_IN_CI_SORTED:
+        if sets.contains(exec_env_sets, env):
+            if found_one:
+                skip_in_ci.append(env)
+            found_one = True
+
+    return skip_in_ci
diff --git a/rules/opentitan/defs.bzl b/rules/opentitan/defs.bzl
index 8a238cf34e413..24f52759093c7 100644
--- a/rules/opentitan/defs.bzl
+++ b/rules/opentitan/defs.bzl
@@ -22,29 +22,47 @@ load(
     _fpga_cw340 = "fpga_cw340",
     _fpga_params = "fpga_params",
 )
+load(
+    "@lowrisc_opentitan//rules/opentitan:keyutils.bzl",
+    _ecdsa_key_by_name = "ecdsa_key_by_name",
+    _ecdsa_key_for_lc_state = "ecdsa_key_for_lc_state",
+    _rsa_key_by_name = "rsa_key_by_name",
+    _rsa_key_for_lc_state = "rsa_key_for_lc_state",
+    _spx_key_by_name = "spx_key_by_name",
+    _spx_key_for_lc_state = "spx_key_for_lc_state",
+)
+load(
+    "@lowrisc_opentitan//rules/opentitan:manual.bzl",
+    _opentitan_manual_test = "opentitan_manual_test",
+)
 load(
     "@lowrisc_opentitan//rules/opentitan:silicon.bzl",
     _silicon = "silicon",
     _silicon_params = "silicon_params",
 )
+load(
+    "@lowrisc_opentitan//rules/opentitan:sim_dv.bzl",
+    _dv_params = "dv_params",
+    _sim_dv = "sim_dv",
+)
 load(
     "@lowrisc_opentitan//rules/opentitan:sim_verilator.bzl",
     _sim_verilator = "sim_verilator",
     _verilator_params = "verilator_params",
 )
 load(
-    "@lowrisc_opentitan//rules/opentitan:sim_dv.bzl",
-    _dv_params = "dv_params",
-    _sim_dv = "sim_dv",
+    "@lowrisc_opentitan//rules/opentitan:ci.bzl",
+    "ci_orchestrator",
 )
 load(
-    "@lowrisc_opentitan//rules/opentitan:keyutils.bzl",
-    _ecdsa_key_by_name = "ecdsa_key_by_name",
-    _ecdsa_key_for_lc_state = "ecdsa_key_for_lc_state",
-    _rsa_key_by_name = "rsa_key_by_name",
-    _rsa_key_for_lc_state = "rsa_key_for_lc_state",
-    _spx_key_by_name = "spx_key_by_name",
-    _spx_key_for_lc_state = "spx_key_for_lc_state",
+    "@provisioning_exts//:cfg.bzl",
+    "EXT_EXEC_ENV_SILICON_ROM_EXT",
+)
+load("@bazel_skylib//lib:sets.bzl", "sets")
+load(
+    "@lowrisc_opentitan//rules/opentitan:qemu.bzl",
+    _qemu_params = "qemu_params",
+    _sim_qemu = "sim_qemu",
 )
 
 # The following definition is used to clear the key set in the signing
@@ -52,8 +70,7 @@ load(
 # and opentitan_binary rules.
 CLEAR_KEY_SET = {"//signing:none_key": "none_key"}
 
-# Re-exports of names from transition.bzl; many files in the repo use opentitan.bzl
-# to get to them.
+# Re-exports of names from transition.bzl
 OPENTITAN_CPU = _OPENTITAN_CPU
 OPENTITAN_PLATFORM = _OPENTITAN_PLATFORM
 opentitan_transition = _opentitan_transition
@@ -76,6 +93,9 @@ verilator_params = _verilator_params
 sim_dv = _sim_dv
 dv_params = _dv_params
 
+sim_qemu = _sim_qemu
+qemu_params = _qemu_params
+
 ecdsa_key_for_lc_state = _ecdsa_key_for_lc_state
 ecdsa_key_by_name = _ecdsa_key_by_name
 
@@ -85,19 +105,22 @@ rsa_key_by_name = _rsa_key_by_name
 spx_key_for_lc_state = _spx_key_for_lc_state
 spx_key_by_name = _spx_key_by_name
 
+opentitan_manual_test = _opentitan_manual_test
+
 # The default set of test environments for Earlgrey.
 EARLGREY_TEST_ENVS = {
     "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
     "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
     "//hw/top_earlgrey:sim_dv": None,
     "//hw/top_earlgrey:sim_verilator": None,
+    "//hw/top_earlgrey:sim_qemu_sival_rom_ext": None,
+    "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
 }
 
 # The default set of test environments for Earlgrey.
 EARLGREY_SILICON_OWNER_ROM_EXT_ENVS = {
     "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
-    "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": None,
-}
+} | EXT_EXEC_ENV_SILICON_ROM_EXT
 
 # All CW340 test environments for Earlgrey.
 EARLGREY_CW340_TEST_ENVS = {
@@ -135,6 +158,8 @@ def _parameter_name(env, pname):
             pname = "dv"
         elif "silicon" in suffix:
             pname = "silicon"
+        elif "qemu" in suffix:
+            pname = "qemu"
         else:
             fail("Unable to identify parameter block name:", env)
     return pname
@@ -143,23 +168,25 @@ def _hacky_tags(env):
     (_, suffix) = env.split(":")
     tags = []
     if suffix.startswith("fpga"):
+        tags.append("fpga")
+
         # We have tags like "cw310_rom_with_real_keys" or "cw310_test_rom"
         # applied to our tests.  Since there is no way to adjust tags in a
         # rule's implementation, we have to infer these tag names from the
         # label name.
         subtag = suffix[5:]
         tags.append(subtag)
-        if subtag.startswith("cw305"):
-            tags.append("cw305")
-        elif subtag.startswith("cw310"):
-            tags.append("cw310")
-        elif subtag.startswith("hyper310"):
-            tags.append("hyper310")
-        elif subtag.startswith("cw340"):
-            tags.append("cw340")
-    if suffix.startswith("silicon"):
-        # We add the entire suffix for silicon exec environments to be able
-        # to filter tests by them. "silicon_creator" and
+
+        # Also add the kind of FPGA by itself (e.g. "hyper310" or "cw340").
+        fpga_kind = subtag.split("_")[0]
+        tags.append(fpga_kind)
+    if suffix.startswith("sim"):
+        # Add the kind of simulator by itself (e.g. "verilator" or "qemu").
+        sim_kind = suffix.split("_")[1]
+        tags.append(sim_kind)
+    if suffix.startswith("silicon") or suffix.startswith("sim"):
+        # We add the entire suffix for silicon and sim exec environments
+        # to be able to filter tests by them. "silicon_creator" and
         # "silicon_owner_sival_rom_ext" have different target configurations.
         tags.append(suffix)
     return tags
@@ -170,6 +197,7 @@ def opentitan_test(
         kind = "flash",
         deps = [],
         copts = [],
+        data = [],
         defines = [],
         local_defines = [],
         includes = [],
@@ -184,7 +212,8 @@ def opentitan_test(
         dv = _dv_params(),
         silicon = _silicon_params(),
         verilator = _verilator_params(),
-        data = [],
+        qemu = _qemu_params(),
+        run_in_ci = None,
         **kwargs):
     """Instantiate a test per execution environment.
 
@@ -212,6 +241,8 @@ def opentitan_test(
       dv: Execution overrides for a DV-based test.
       silicon: Execution overrides for a silicon-based test.
       verilator: Execution overrides for a verilator-based test.
+      qemu: Execution overrides for a QEUM-based test.
+      run_in_ci: Override the automatic selection of execution environments to run in CI and run exactly those environments.
       kwargs: Additional execution overrides identified by the `exec_env` dict.
     """
     test_parameters = {
@@ -220,11 +251,13 @@ def opentitan_test(
         "dv": dv,
         "silicon": silicon,
         "verilator": verilator,
+        "qemu": qemu,
     }
     test_parameters.update(kwargs)
     kwargs_unused = kwargs.keys()
 
-    all_tests = []
+    # Precompute parameters.
+    all_test_params = []
     for (env, pname) in exec_env.items():
         pname = _parameter_name(env, pname)
 
@@ -237,6 +270,28 @@ def opentitan_test(
         tparam = test_parameters[pname]
         if pname in kwargs_unused:
             kwargs_unused.remove(pname)
+        all_test_params.append((env, pname, tparam, extra_tags))
+
+    # Find all exec_envs which are not marked as broken.
+    non_broken_exec_env = []
+    for (env, pname, tparam, extra_tags) in all_test_params:
+        if not ("broken" in tparam.tags + extra_tags):
+            non_broken_exec_env.append(env)
+
+    if run_in_ci == None:
+        skip_in_ci = sets.make(ci_orchestrator(name, non_broken_exec_env))
+        all_envs = sets.make([env for (env, _, _, _) in all_test_params])
+        run_in_ci = sets.difference(all_envs, skip_in_ci)
+    else:
+        run_in_ci = sets.make(run_in_ci)
+
+    all_tests = []
+    for (env, pname, tparam, extra_tags) in all_test_params:
+        # Tag test if it must not run in CI.
+        skip_in_ci = []
+        if not sets.contains(run_in_ci, env):
+            skip_in_ci.append("skip_in_ci")
+
         (_, suffix) = env.split(":")
         test_name = "{}_{}".format(name, suffix)
         all_tests.append(":" + test_name)
@@ -254,9 +309,8 @@ def opentitan_test(
             exec_env = env,
             naming_convention = "{name}",
             # Tagging and timeout info always comes from a param block.
-            tags = tparam.tags + extra_tags,
+            tags = tparam.tags + extra_tags + skip_in_ci,
             timeout = tparam.timeout,
-            local = tparam.local,
             # Override parameters in the test rule.
             test_harness = tparam.test_harness,
             binaries = tparam.binaries,
diff --git a/rules/opentitan/exec_env.bzl b/rules/opentitan/exec_env.bzl
index b4416c413d425..74e7a9c0d00ec 100644
--- a/rules/opentitan/exec_env.bzl
+++ b/rules/opentitan/exec_env.bzl
@@ -18,10 +18,9 @@ _FIELDS = {
     "spx_key": ("attr.spx_key", False),
     "manifest": ("file.manifest", False),
     "rom": ("attr.rom", False),
-    "rom_mmi": ("file.rom_mmi", False),
     "rom_ext": ("attr.rom_ext", False),
     "otp": ("file.otp", False),
-    "otp_mmi": ("file.otp_mmi", False),
+    "mmi": ("file.mmi", False),
     "base_bitstream": ("file.base_bitstream", False),
     "args": ("attr.args", False),
     "test_cmd": ("attr.test_cmd", False),
@@ -35,6 +34,7 @@ _FIELDS = {
     "rom_scramble_config": ("file.rom_scramble_config", False),
     "openocd": ("attr.openocd", False),
     "openocd_adapter_config": ("attr.openocd_adapter_config", False),
+    "slot_spec": ("attr.slot_spec", False),
 }
 
 ExecEnvInfo = provider(
@@ -146,25 +146,24 @@ def exec_env_common_attrs(**kwargs):
             allow_files = True,
             doc = "ROM image to use in this environment",
         ),
-        "rom_mmi": attr.label(
-            default = kwargs.get("rom_mmi"),
-            allow_single_file = True,
-            doc = "Memory layout description for ROM splicing",
-        ),
         "rom_ext": attr.label(
             default = kwargs.get("rom_ext"),
             allow_files = True,
             doc = "ROM_EXT image to use in this environment",
         ),
+        "slot_spec": attr.string_dict(
+            default = kwargs.get("slot_spec", {}),
+            doc = "Firmware slot addresses to use in this environment",
+        ),
         "otp": attr.label(
             default = kwargs.get("otp"),
             allow_single_file = True,
             doc = "OTP image to use in this environment",
         ),
-        "otp_mmi": attr.label(
-            default = kwargs.get("otp_mmi"),
+        "mmi": attr.label(
+            default = kwargs.get("mmi"),
             allow_single_file = True,
-            doc = "Memory layout description for OTP splicing",
+            doc = "Memory layout description for splicing",
         ),
         "base_bitstream": attr.label(
             default = kwargs.get("base_bitstream"),
@@ -316,10 +315,19 @@ def update_file_attr(name, attr, provider, data_files, param, action_param = Non
     elif provider and provider in attr:
         update_file_provider(name, attr[provider], data_files, param, action_param, default)
     elif DefaultInfo in attr:
-        file = attr[DefaultInfo].files.to_list()
-        if len(file) > 1:
-            fail("Expected to find exactly one file in", attr)
-        _update(name, file[0], data_files, param, action_param)
+        # Filter out disassembly files.
+        file_list = attr[DefaultInfo].files.to_list()
+        file = None
+        num_files = 0
+        for f in file_list:
+            if f.extension == "dis":
+                continue
+            else:
+                file = f
+                num_files += 1
+        if num_files > 1:
+            fail("Expected to find exactly one file in", attr, ", but got", num_files)
+        _update(name, file, data_files, param, action_param)
     else:
         fail("No file providers in", attr)
 
@@ -391,4 +399,10 @@ def common_test_setup(ctx, exec_env, firmware):
         data_files += get_files(jtag_data)
         param["jtag_test_cmd"] = jtag_test_cmd
 
+    # Update the actual firmware slot spec
+    slot_spec = dict(exec_env.slot_spec)
+    slot_spec.update(ctx.attr.slot_spec)
+    action_param.update(slot_spec)
+    param.update(slot_spec)
+
     return test_harness, data_labels, data_files, param, action_param
diff --git a/rules/opentitan/fpga.bzl b/rules/opentitan/fpga.bzl
index 399a5e6c6abe0..2b287975ed035 100644
--- a/rules/opentitan/fpga.bzl
+++ b/rules/opentitan/fpga.bzl
@@ -12,6 +12,7 @@ load(
     "@lowrisc_opentitan//rules/opentitan:util.bzl",
     "assemble_for_test",
     "get_fallback",
+    "recursive_format",
 )
 load(
     "//rules/opentitan:exec_env.bzl",
@@ -61,9 +62,9 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
     Returns:
       dict: A dict of fields to create in the provider.
     """
-
+    hashfile = None
     if ctx.attr.kind == "rom":
-        rom = convert_to_scrambled_rom_vmem(
+        (rom, hashfile) = convert_to_scrambled_rom_vmem(
             ctx,
             name = name,
             src = elf,
@@ -101,6 +102,7 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
         "signed_bin": signed_bin,
         "disassembly": disassembly,
         "mapfile": mapfile,
+        "hashfile": hashfile,
     }
 
 def _test_dispatch(ctx, exec_env, firmware):
@@ -122,12 +124,13 @@ def _test_dispatch(ctx, exec_env, firmware):
     # assemble the image.  Replace the firmware param with the newly assembled
     # image.
     if "assemble" in param:
-        assemble = param["assemble"].format(**action_param)
+        assemble = param.get("assemble")
+        assemble = recursive_format(assemble, action_param)
         assemble = ctx.expand_location(assemble, data_labels)
         image = assemble_for_test(
             ctx,
             name = ctx.attr.name,
-            spec = assemble.split(" "),
+            spec = assemble.strip().split(" "),
             data_files = data_files,
             opentitantool = exec_env._opentitantool,
         )
@@ -217,7 +220,6 @@ fpga_cw340 = rule(
 def fpga_params(
         tags = [],
         timeout = "short",
-        local = True,
         test_harness = None,
         binaries = {},
         rom = None,
@@ -235,7 +237,6 @@ def fpga_params(
     Args:
       tags: The test tags to apply to the test rule.
       timeout: The timeout to apply to the test rule.
-      local: Whether to set the `local` flag on this test.
       test_harness: Use an alternative test harness for this test.
       binaries: Dict of binary labels to substitution parameter names.
       rom: Use an alternate ROM for this test.
@@ -265,7 +266,6 @@ def fpga_params(
         # via the "_hacky_tags" macro in "rules/opentitan/defs.bzl".
         tags = ["exclusive"] + (["changes_otp"] if changes_otp else []) + tags,
         timeout = timeout,
-        local = local,
         test_harness = test_harness,
         binaries = binaries,
         rom = rom,
diff --git a/rules/opentitan/keyutils.bzl b/rules/opentitan/keyutils.bzl
index 9d36f06fe591f..9e59316498195 100644
--- a/rules/opentitan/keyutils.bzl
+++ b/rules/opentitan/keyutils.bzl
@@ -2,92 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "key_allowed_in_lc_state")
-load("//rules:signing.bzl", "KeyInfo")
-
-def _build_key_info_handler(id):
-    """Return a handler that creates a KeyInfo provider.
-
-    Args:
-        id: Identifier used by the consumers of the provider to determine the key algorithm.
-    Returns:
-        A handler that creates a KeyInfo provider.
-    """
-
-    def key_info_handler(ctx):
-        return [KeyInfo(
-            id = id,
-            config = ctx.attr.config,
-            method = ctx.attr.method,
-            pub_key = ctx.file.pub_key,
-            private_key = ctx.file.private_key,
-            type = ctx.attr.type,
-        )]
-
-    return key_info_handler
-
-key_sphincs_plus = rule(
-    implementation = _build_key_info_handler("sphincs_plus"),
-    attrs = {
-        "pub_key": attr.label(
-            allow_single_file = [".pem"],
-            doc = "Public key in pem format.",
-        ),
-        "private_key": attr.label(
-            allow_single_file = [".pem"],
-            doc = "Private key in pem format.",
-        ),
-        "type": attr.string(
-            default = "TestKey",
-            doc = "The type of the key. Can be TestKey, DevKey or ProdKey.",
-            values = ["TestKey", "DevKey", "ProdKey"],
-        ),
-        "config": attr.string(
-            default = "Sha2128s",
-            doc = "The config of the key. Can be Sha2128s[Q20][Prehash].",
-            values = ["Sha2128s", "Sha2128sQ20", "Sha2128sPrehash", "Sha2128sQ20Prehash"],
-        ),
-        "method": attr.string(
-            doc = "Mechanism used to access the key. Can be local or hsmtool.",
-            values = ["local", "hsmtool"],
-        ),
-    },
-)
-
-key_ecdsa = rule(
-    implementation = _build_key_info_handler("ecdsa"),
-    attrs = {
-        "pub_key": attr.label(
-            allow_single_file = [".der"],
-            doc = "Public key in DER format.",
-        ),
-        "private_key": attr.label(
-            allow_single_file = [".der"],
-            doc = "Private key in DER format.",
-        ),
-        "type": attr.string(
-            default = "TestKey",
-            doc = "The type of the key. Can be TestKey, DevKey or ProdKey.",
-            values = ["TestKey", "DevKey", "ProdKey"],
-        ),
-        "config": attr.string(
-            default = "EcdsaP256",
-            doc = "The config of the key. Only EcdsaP256 is supported at the moment.",
-            values = ["EcdsaP256"],
-        ),
-        # TODO(cfrantz, moidx, #22155): To support signing with opentitantool or
-        # hsmtool, the `method` should be replaced with a `token` and `profile`
-        # similar to the `keyset` rule.  The `token` is used to get access to
-        # the appropriate PKCS11 resources (shared libs, config files, etc) and
-        # the `profile` refers to a configuration in
-        # $XDG_CONFIG_HOME/hsmtool/profiles.json that refers to the user's
-        # physical token name and credentials.
-        "method": attr.string(
-            doc = "Mechanism used to access the key. Can be local or hsmtool.",
-            values = ["local", "hsmtool"],
-        ),
-    },
-)
+load("//rules:const.bzl", "CONST")
+load("@bazel_skylib//lib:structs.bzl", "structs")
 
 def ecdsa_key_for_lc_state(key_structs, hw_lc_state):
     """Return a dictionary containing a single key that can be used in the given
@@ -161,3 +77,120 @@ def spx_key_by_name(key_structs, nickname):
     return {
         keys[0].spx.label: keys[0].spx.name,
     }
+
+def key_allowed_in_lc_state(key, hw_lc_state_val):
+    all_hw_lc_state_vals = structs.to_dict(CONST.LCV).values()
+    if not hw_lc_state_val in all_hw_lc_state_vals:
+        fail("Wrong life cycle state value: '{}', must be one of {}. Did you pass a string instead of the integer value?".format(hw_lc_state_val, all_hw_lc_state_vals))
+    return hw_lc_state_val in key.hw_lc_states
+
+def filter_key_structs_for_lc_state(key_structs, hw_lc_state):
+    return [k for k in key_structs if (
+        (not k.rsa or key_allowed_in_lc_state(k.rsa, hw_lc_state)) and
+        (not k.ecdsa or key_allowed_in_lc_state(k.ecdsa, hw_lc_state)) and
+        (not k.spx or key_allowed_in_lc_state(k.spx, hw_lc_state))
+    )]
+
+def create_key_(name, label, hw_lc_states):
+    return struct(
+        name = name,
+        label = label,
+        hw_lc_states = hw_lc_states,
+    )
+
+def create_test_key(name, label):
+    return create_key_(name, label, [
+        CONST.LCV.TEST_UNLOCKED0,
+        CONST.LCV.TEST_UNLOCKED1,
+        CONST.LCV.TEST_UNLOCKED2,
+        CONST.LCV.TEST_UNLOCKED3,
+        CONST.LCV.TEST_UNLOCKED4,
+        CONST.LCV.TEST_UNLOCKED5,
+        CONST.LCV.TEST_UNLOCKED6,
+        CONST.LCV.TEST_UNLOCKED7,
+        CONST.LCV.RMA,
+    ])
+
+def create_dev_key(name, label):
+    return create_key_(name, label, [
+        CONST.LCV.TEST_UNLOCKED0,
+        CONST.LCV.TEST_UNLOCKED1,
+        CONST.LCV.TEST_UNLOCKED2,
+        CONST.LCV.TEST_UNLOCKED3,
+        CONST.LCV.TEST_UNLOCKED4,
+        CONST.LCV.TEST_UNLOCKED5,
+        CONST.LCV.TEST_UNLOCKED6,
+        CONST.LCV.TEST_UNLOCKED7,
+        CONST.LCV.RMA,
+        CONST.LCV.DEV,
+    ])
+
+def create_prod_key(name, label):
+    return create_key_(name, label, [
+        CONST.LCV.TEST_UNLOCKED0,
+        CONST.LCV.TEST_UNLOCKED1,
+        CONST.LCV.TEST_UNLOCKED2,
+        CONST.LCV.TEST_UNLOCKED3,
+        CONST.LCV.TEST_UNLOCKED4,
+        CONST.LCV.TEST_UNLOCKED5,
+        CONST.LCV.TEST_UNLOCKED6,
+        CONST.LCV.TEST_UNLOCKED7,
+        CONST.LCV.DEV,
+        CONST.LCV.PROD,
+        CONST.LCV.PROD_END,
+        CONST.LCV.RMA,
+    ])
+
+def create_key_struct(ecdsa_key, rsa_key, spx_key):
+    return struct(
+        ecdsa = ecdsa_key,
+        rsa = rsa_key,
+        spx = spx_key,
+    )
+
+# Keys available in the repo
+SILICON_CREATOR_KEYS = struct(
+    FAKE = struct(
+        ECDSA = struct(
+            TEST = [
+                create_test_key("test_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset"),
+            ],
+            DEV = [
+                create_dev_key("dev_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset"),
+            ],
+            PROD = [
+                create_prod_key("prod_key_0", "@//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset"),
+            ],
+        ),
+        SPX = struct(
+            TEST = [
+                create_test_key("test_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset"),
+            ],
+            DEV = [
+                create_dev_key("dev_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset"),
+            ],
+            PROD = [
+                create_prod_key("prod_key_0", "@//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset"),
+            ],
+        ),
+    ),
+    # We can't expose real private keys publicly.
+    REAL = None,
+    UNAUTHORIZED = struct(
+        SPX = [
+            create_key_("unauthorized_key_0", "@//sw/device/silicon_creator/rom/keys/unauthorized/spx:spx_keyset", []),
+        ],
+    ),
+)
+
+ECDSA_ONLY_KEY_STRUCTS = [
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.TEST[0], None, None),
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.DEV[0], None, None),
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.PROD[0], None, None),
+]
+
+ECDSA_SPX_KEY_STRUCTS = [
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.TEST[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.TEST[0]),
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.DEV[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.DEV[0]),
+    create_key_struct(SILICON_CREATOR_KEYS.FAKE.ECDSA.PROD[0], None, SILICON_CREATOR_KEYS.FAKE.SPX.PROD[0]),
+]
diff --git a/rules/opentitan/legacy.bzl b/rules/opentitan/legacy.bzl
index 036dc0770a20f..03409861e1ab1 100644
--- a/rules/opentitan/legacy.bzl
+++ b/rules/opentitan/legacy.bzl
@@ -2,6 +2,14 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load(
+    "@lowrisc_opentitan//rules/opentitan:transform.bzl",
+    "convert_to_vmem",
+    "scramble_flash",
+    _obj_transform = "obj_transform",
+)
+load("@lowrisc_opentitan//rules:rv.bzl", "rv_rule")
+
 def legacy_rom_targets(target, suffixes, testonly = False):
     """Create filegroups for legacy ROM rule target names.
 
@@ -27,3 +35,84 @@ def legacy_rom_targets(target, suffixes, testonly = False):
             actual = ":{}_{}".format(target, suffix),
             testonly = testonly,
         )
+
+def _obj_transform_impl(ctx):
+    outputs = [_obj_transform(ctx)]
+    return [
+        DefaultInfo(
+            files = depset(outputs),
+            data_runfiles = ctx.runfiles(files = outputs),
+        ),
+    ]
+
+obj_transform = rv_rule(
+    implementation = _obj_transform_impl,
+    attrs = {
+        "src": attr.label(allow_single_file = True),
+        "suffix": attr.string(default = "bin"),
+        "format": attr.string(default = "binary"),
+        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+    },
+    fragments = ["cpp"],
+    toolchains = ["@rules_cc//cc:toolchain_type"],
+)
+
+def _vmem_file_impl(ctx):
+    outputs = [convert_to_vmem(ctx)]
+    return [
+        DefaultInfo(
+            files = depset(outputs),
+            data_runfiles = ctx.runfiles(files = outputs),
+        ),
+    ]
+
+vmem_file = rv_rule(
+    implementation = _vmem_file_impl,
+    attrs = {
+        "src": attr.label(
+            allow_single_file = True,
+            doc = "Binary file to convert to vmem format",
+        ),
+        "word_size": attr.int(
+            default = 64,
+            doc = "Word size of VMEM file",
+            mandatory = True,
+            values = [32, 64],
+        ),
+    },
+)
+
+def _scramble_flash_vmem_impl(ctx):
+    outputs = [scramble_flash(ctx, suffix = "src.vmem")]
+    return [
+        DefaultInfo(
+            files = depset(outputs),
+            data_runfiles = ctx.runfiles(files = outputs),
+        ),
+    ]
+
+scramble_flash_vmem = rv_rule(
+    implementation = _scramble_flash_vmem_impl,
+    attrs = {
+        "src": attr.label(allow_single_file = True),
+        "otp": attr.label(allow_single_file = True),
+        "otp_mmap": attr.label(
+            allow_single_file = True,
+            default = "//hw/ip/otp_ctrl/data:otp_ctrl_mmap.hjson",
+            doc = "OTP memory map configuration HJSON file.",
+        ),
+        "otp_seed": attr.label(
+            default = "//hw/ip/otp_ctrl/data:otp_seed",
+            doc = "Configuration override seed used to randomize OTP netlist constants.",
+        ),
+        "otp_data_perm": attr.label(
+            default = "//hw/ip/otp_ctrl/data:data_perm",
+            doc = "Option to indicate OTP VMEM file bit layout.",
+        ),
+        "_tool": attr.label(
+            default = "@//util/design:gen-flash-img",
+            executable = True,
+            cfg = "exec",
+        ),
+    },
+)
diff --git a/rules/opentitan/manual.bzl b/rules/opentitan/manual.bzl
new file mode 100644
index 0000000000000..dba86d3f63298
--- /dev/null
+++ b/rules/opentitan/manual.bzl
@@ -0,0 +1,42 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+def _opentitan_manual_test_impl(ctx):
+    executable = ctx.actions.declare_file("manual_test_wrapper")
+    ctx.actions.write(
+        output = executable,
+        content = "{runner} {testplan}".format(
+            runner = ctx.executable._runner.short_path,
+            testplan = ctx.file.testplan.short_path,
+        ),
+    )
+    return [
+        DefaultInfo(
+            runfiles = ctx.runfiles(
+                files = [
+                    ctx.executable._runner,
+                    ctx.file.testplan,
+                ],
+            ).merge(ctx.attr._runner[DefaultInfo].default_runfiles),
+            executable = executable,
+        ),
+    ]
+
+opentitan_manual_test = rule(
+    _opentitan_manual_test_impl,
+    attrs = {
+        "testplan": attr.label(
+            allow_single_file = [".hjson"],
+            doc = "Testplan with manual testpoints",
+            mandatory = True,
+        ),
+        "_runner": attr.label(
+            default = "//util:run_manual_tests",
+            executable = True,
+            cfg = "exec",
+        ),
+    },
+    doc = "Walks through the manual testpoints in a testplan",
+    test = True,
+)
diff --git a/rules/opentitan/providers.bzl b/rules/opentitan/providers.bzl
index e0358cdc05717..5d460b14d8bc6 100644
--- a/rules/opentitan/providers.bzl
+++ b/rules/opentitan/providers.bzl
@@ -28,12 +28,17 @@ SimVerilatorBinaryInfo = provider(
     doc = "Verilator Binary Info",
 )
 
+SimQemuBinaryInfo = provider(
+    doc = "QEMU Binary Info",
+)
+
 ALL_BINARY_PROVIDERS = [
     Cw310BinaryInfo,
     Cw340BinaryInfo,
     SiliconBinaryInfo,
     SimDvBinaryInfo,
     SimVerilatorBinaryInfo,
+    SimQemuBinaryInfo,
 ]
 
 PROVIDER_FIELDS = [
diff --git a/rules/opentitan/qemu.bzl b/rules/opentitan/qemu.bzl
new file mode 100644
index 0000000000000..97d26e3bfaa98
--- /dev/null
+++ b/rules/opentitan/qemu.bzl
@@ -0,0 +1,566 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "@lowrisc_opentitan//rules/opentitan:providers.bzl",
+    "SimQemuBinaryInfo",
+)
+load(
+    "@lowrisc_opentitan//rules/opentitan:util.bzl",
+    "assemble_for_test",
+    "get_fallback",
+    "get_override",
+    "recursive_format",
+)
+load(
+    "//rules/opentitan:exec_env.bzl",
+    "ExecEnvInfo",
+    "common_test_setup",
+    "exec_env_as_dict",
+    "exec_env_common_attrs",
+)
+load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
+
+def qemu_params(
+        tags = [],
+        timeout = "short",
+        local = True,
+        test_harness = None,
+        binaries = {},
+        rom = None,
+        rom_ext = None,
+        otp = None,
+        bitstream = None,
+        needs_jtag = False,
+        test_cmd = "",
+        data = [],
+        defines = [],
+        icount = 6,
+        globals = {},
+        traces = [],
+        qemu_args = [],
+        bootstrap = False,
+        **kwargs):
+    extra_params = {
+        "icount": str(icount),
+        "qemu_args": json.encode(qemu_args),
+        # We have to stringify this dictionary here because `_opentitan_test` only accepts
+        # a dict with string values, not more dicts.
+        "globals": json.encode(globals),
+        # The same goes for this array of strings:
+        "traces": json.encode(traces),
+        # And these Booleans:
+        "bootstrap": json.encode(bootstrap),
+    }
+
+    return struct(
+        tags = tags,
+        timeout = timeout,
+        local = local,
+        test_harness = test_harness,
+        binaries = binaries,
+        rom = rom,
+        rom_ext = rom_ext,
+        otp = otp,
+        bitstream = bitstream,
+        test_cmd = ("""
+            {jtag_test_cmd}
+        """ if needs_jtag else "") + test_cmd,
+        data = data,
+        param = kwargs | extra_params,
+        defines = defines,
+        needs_jtag = needs_jtag,
+    )
+
+def gen_cfg(ctx, **kwargs):
+    """Generate a QEMU `readconfig` INI file containing OpenTitan RTL secrets"""
+    name = get_override(ctx, "label.name", kwargs)
+    cfggen = get_override(ctx, "executable.cfggen", kwargs)
+
+    otp_sv = get_override(ctx, "file.otp_sv", kwargs)
+    lc_sv = get_override(ctx, "file.lc_sv", kwargs)
+    top_hjson = get_override(ctx, "file.top_hjson", kwargs)
+
+    top_name = get_override(ctx, "attr.top_name", kwargs)
+
+    out = ctx.actions.declare_file(name + ".ini")
+
+    ctx.actions.run(
+        inputs = [otp_sv, lc_sv, top_hjson],
+        outputs = [out],
+        executable = cfggen[DefaultInfo].files_to_run,
+        arguments = [
+            "--out",
+            out.path,
+            "--top",
+            top_name,
+            "--topcfg",
+            top_hjson.path,
+            "--otpconst",
+            otp_sv.path,
+            "--lifecycle",
+            lc_sv.path,
+            ".",
+        ],
+        mnemonic = "CfgGen",
+    )
+    return out
+
+qemu_cfg = rule(
+    implementation = lambda ctx: [DefaultInfo(files = depset([gen_cfg(ctx)]))],
+    attrs = {
+        "top_name": attr.string(),
+        "top_hjson": attr.label(allow_single_file = True),
+        "otp_sv": attr.label(allow_single_file = True),
+        "lc_sv": attr.label(allow_single_file = True),
+        "cfggen": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:cfggen"),
+        ),
+    },
+)
+
+def gen_otp(ctx, **kwargs):
+    """Generate a QEMU-compatible OTP image"""
+    name = get_override(ctx, "label.name", kwargs)
+    out = ctx.actions.declare_file(name + ".raw")
+
+    vmem = get_override(ctx, "file.vmem", kwargs)
+    otptool = get_override(ctx, "executable.otptool", kwargs)
+
+    ctx.actions.run(
+        inputs = [vmem],
+        outputs = [out],
+        executable = otptool[DefaultInfo].files_to_run,
+        arguments = [
+            "-m",
+            vmem.path,
+            "-r",
+            out.path,
+            "-k",
+            "otp",
+        ],
+        mnemonic = "OtpGen",
+    )
+    return out
+
+qemu_otp = rule(
+    implementation = lambda ctx: [DefaultInfo(files = depset([gen_otp(ctx)]))],
+    attrs = {
+        "vmem": attr.label(allow_single_file = True),
+        "otptool": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:otptool"),
+        ),
+    },
+)
+
+# NOTE: currently only single-bank flash programs are supported.
+def gen_flash(ctx, **kwargs):
+    """\
+    Generate a QEMU-compatible flash image.
+
+    NOTE: currently only single-bank flash images are supported.
+    """
+    name = get_override(ctx, "label.name", kwargs)
+    out = ctx.actions.declare_file(name + ".qemu_bin")
+
+    firmware_bin = get_override(ctx, "file.firmware_bin", kwargs)
+    firmware_elf = get_override(ctx, "file.firmware_elf", kwargs)
+
+    check_elfs = get_override(ctx, "file.check_elfs", kwargs)
+
+    flashgen = get_override(ctx, "executable.flashgen", kwargs)
+
+    flashgen_inputs = []
+    flashgen_args = []
+
+    # Add the firmware binary, which will be placed at 0x0 and as such
+    # should contain relevant padding to offset from the start of flash.
+    # Firmware binaries can be placed across flash banks, i.e. they can
+    # be mirrored.
+    if firmware_bin:
+        flashgen_inputs += [firmware_bin]
+        flashgen_args += ["-t", "{}@0x0".format(firmware_bin.path)]
+        # TODO: currently firmware_elf is unused due to lacking support in QEMU
+
+    if check_elfs:
+        # Skip `flashgen`'s ELF/binary mtime checks - it will fail if the
+        # binary is older than the ELF which usually suggests that the
+        # binary has not been regenerated, however Bazel often messes with
+        # mtimes causing false negatives.
+        flashgen_args += ["--ignore-time"]
+    else:
+        flashgen_args += ["--unsafe-elf"]
+
+    flashgen_args += [out.path]
+
+    ctx.actions.run(
+        inputs = flashgen_inputs,
+        outputs = [out],
+        executable = flashgen[DefaultInfo].files_to_run,
+        arguments = flashgen_args,
+        mnemonic = "FlashGen",
+    )
+    return out
+
+qemu_flash = rule(
+    implementation = lambda ctx: [DefaultInfo(files = depset([gen_flash(ctx)]))],
+    attrs = {
+        "firmware_bin": attr.label(
+            allow_single_file = True,
+            doc = "Binary firmware to be run after the ROM, usually signed, placed at the start of flash",
+        ),
+        "firmware_elf": attr.label(
+            allow_single_file = True,
+            doc = "ELF version of the `firmware_bin` attribute for symbol tracking",
+        ),
+        "check_elfs": attr.bool(
+            default = True,
+            doc = "Whether to sanity check ELF sizes against binaries. Should be `false` if using signed binaries",
+        ),
+        "flashgen": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:flashgen"),
+        ),
+    },
+)
+
+def _sim_qemu(ctx):
+    fields = exec_env_as_dict(ctx)
+    return ExecEnvInfo(
+        provider = SimQemuBinaryInfo,
+        test_dispatch = _test_dispatch,
+        transform = _transform,
+        qemu = ctx.executable.qemu,
+        cfggen = ctx.attr.cfggen,
+        otptool = ctx.attr.otptool,
+        flashgen = ctx.attr.flashgen,
+        otp_sv = ctx.file.otp_sv,
+        lc_sv = ctx.file.lc_sv,
+        top_hjson = ctx.file.top_hjson,
+        test_script = ctx.file._test_script,
+        **fields
+    )
+
+sim_qemu = rule(
+    implementation = _sim_qemu,
+    attrs = exec_env_common_attrs() | {
+        "opentitantool": attr.label(
+            executable = True,
+            cfg = "exec",
+            default = Label("//sw/host/opentitantool"),
+        ),
+        "qemu": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:qemu-system-riscv32"),
+        ),
+        "cfggen": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:cfggen"),
+        ),
+        "otptool": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:otptool"),
+        ),
+        "flashgen": attr.label(
+            executable = True,
+            cfg = "exec",
+            allow_files = True,
+            default = Label("//third_party/qemu:flashgen"),
+        ),
+        "otp_sv": attr.label(
+            allow_single_file = True,
+            # TODO: should we really use Earl Grey as the default?
+            default = Label("//hw/ip/otp_ctrl:rtl/otp_ctrl_part_pkg.sv"),
+        ),
+        "lc_sv": attr.label(
+            allow_single_file = True,
+            default = Label("//hw/ip/lc_ctrl:rtl/lc_ctrl_state_pkg.sv"),
+        ),
+        "top_hjson": attr.label(
+            allow_single_file = True,
+            default = Label("//hw/top_earlgrey/data:autogen/top_earlgrey.gen.hjson"),
+        ),
+        "_test_script": attr.label(
+            allow_single_file = True,
+            default = "//rules/scripts:qemu_test.sh",
+        ),
+    },
+    toolchains = [LOCALTOOLS_TOOLCHAIN],
+)
+
+def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfile):
+    if ctx.attr.kind == "rom":
+        default = elf
+        rom = elf
+    elif ctx.attr.kind == "ram":
+        default = elf
+        rom = None
+    elif ctx.attr.kind == "flash":
+        default = signed_bin if signed_bin else binary
+        rom = None
+    else:
+        fail("Not implemented: kind == ", ctx.attr.kind)
+
+    return {
+        "elf": elf,
+        "binary": binary,
+        "default": default,
+        "rom": rom,
+        "rom32": None,
+        "signed_bin": signed_bin,
+        "disassembly": disassembly,
+        "mapfile": mapfile,
+        "hashfile": None,
+    }
+
+def _test_dispatch(ctx, exec_env, firmware):
+    """Dispatch a test for the sim_qemu environment.
+
+    Args:
+      ctx: The rule context.
+      exec_env: The ExecEnvInfo for this environment.
+      firmware: A label with a SimQemuBinaryInfo provider attached.
+    Returns:
+      (File, List[File]) The test script and needed runfiles.
+    """
+
+    test_harness, data_labels, data_files, param, action_param = common_test_setup(ctx, exec_env, firmware)
+
+    # If the test requested an assembled image, then use opentitantool to
+    # assemble the image.
+    if "assemble" in param:
+        assemble = param.get("assemble")
+        assemble = recursive_format(assemble, action_param)
+        assemble = ctx.expand_location(assemble, data_labels)
+        image = assemble_for_test(
+            ctx,
+            name = ctx.attr.name,
+            spec = assemble.strip().split(" "),
+            data_files = data_files,
+            opentitantool = exec_env._opentitantool,
+        )
+        data_files.append(image)
+    elif firmware:
+        image = firmware.signed_bin or firmware.default
+    else:
+        image = None
+
+    # Replace the firmware param with the newly assembled image.
+    if image:
+        param["firmware"] = image.short_path
+        action_param["firmware"] = image.path
+
+    data_files += [exec_env.qemu]
+
+    # Add arguments to pass directly to QEMU.
+    qemu_args = []
+    test_script_fmt = {}
+
+    qemu_args += ["-display", "none"]
+    qemu_args += ["-M", "ot-{}".format(exec_env.design)]
+
+    # Generate the OpenTitan machine config for QEMU emulation
+    qemu_cfg = gen_cfg(
+        ctx,
+        cfggen = exec_env.cfggen,
+        otp_sv = exec_env.otp_sv,
+        lc_sv = exec_env.lc_sv,
+        top_hjson = exec_env.top_hjson,
+        top_name = exec_env.design,
+    )
+    data_files += [qemu_cfg]
+    qemu_args += ["-readconfig", "{}".format(qemu_cfg.short_path)]
+
+    # Attach the ROM that QEMU should run
+    qemu_args += ["-object", "ot-rom_img,id=rom,file={}".format(param["rom"])]
+
+    # Generate the OTP backend image for QEMU emulation
+    otp_image = gen_otp(
+        ctx,
+        otptool = exec_env.otptool,
+        vmem = get_fallback(ctx, "file.otp", exec_env),
+    )
+    data_files += [otp_image]
+    qemu_args += ["-drive", "if=pflash,file=otp_img.raw,format=raw"]
+    test_script_fmt |= {
+        "otp": otp_image.short_path,
+    }
+
+    # If real bootstrapping is requested then prepare the correct command, otherwise we need
+    # to prepare a QEMU drive containing flash contents.
+    # Ideally, relevant info pages would be spliced in at this step, but that is
+    # not yet supported by either flashgen or by Bazel.
+    if param["bootstrap"] and json.decode(param["bootstrap"]):
+        if ctx.attr.test_harness:
+            fail("cannot specify both `bootstrap = True` and a test harness (harnesses bootstrap manually)")
+        test_script_fmt |= {"flash": ""}
+        bootstrap_cmd = "bootstrap --clear-uart=true {firmware}".format(**param)
+        param["bootstrap_cmd"] = '--exec="{}"'.format(bootstrap_cmd)
+    else:
+        # Generate the flash backend image for QEMU emulation
+        flash_image = gen_flash(
+            ctx,
+            flashgen = exec_env.flashgen,
+            firmware_bin = image,
+            # TODO: no support for convenience debug symbols from ELFs for now
+            firmware_elf = None,
+            # Do not sanity check ELFs, because we do not expect the binary to
+            # match the ELF because of the added manifest extensions (e.g. SPX
+            # signatures) present in the signed binary.
+            check_elfs = False,
+        )
+        data_files += [flash_image]
+        qemu_args += ["-drive", "if=mtd,id=eflash,bus=2,file=flash_img.bin,format=raw"]
+        test_script_fmt |= {
+            "flash": flash_image.short_path,
+        }
+        param["bootstrap_cmd"] = '--exec="no-op" # SKIPPING BOOTSTRAP'
+
+    # Get the pre-test_cmd args.
+    args = get_fallback(ctx, "attr.args", exec_env)
+    args = " ".join(args).format(**param)
+    args = ctx.expand_location(args, data_labels)
+
+    # Connect the monitor to a PTY for test harnesses / OpenTitanTool to speak to:
+    qemu_args += ["-chardev", "pty,id=monitor,path=qemu-monitor"]
+    qemu_args += ["-mon", "chardev=monitor,mode=control"]
+
+    # Create chardevs for each UART:
+    qemu_args += ["-chardev", "pty,id=uart0"]
+    qemu_args += ["-chardev", "pty,id=uart1"]
+    qemu_args += ["-chardev", "pty,id=uart2"]
+    qemu_args += ["-chardev", "pty,id=uart3"]
+    qemu_args += ["-serial", "chardev:uart0"]
+    qemu_args += ["-serial", "chardev:uart1"]
+    qemu_args += ["-serial", "chardev:uart2"]
+    qemu_args += ["-serial", "chardev:uart3"]
+
+    # Create a chardev for the log device:
+    qemu_args += ["-chardev", "pty,id=log"]
+    qemu_args += ["-global", "ot-ibex_wrapper.logdev=log"]
+
+    # Create a chardev for the SPI device:
+    qemu_args += ["-chardev", "pty,id=spidev"]
+
+    # Create a chardev and proxy device for each I2C bus:
+    qemu_args += ["-chardev", "pty,id=i2c0"]
+    qemu_args += ["-chardev", "pty,id=i2c1"]
+    qemu_args += ["-chardev", "pty,id=i2c2"]
+    qemu_args += ["-device", "ot-i2c_host_proxy,bus=ot-i2c0,chardev=i2c0"]
+    qemu_args += ["-device", "ot-i2c_host_proxy,bus=ot-i2c1,chardev=i2c1"]
+    qemu_args += ["-device", "ot-i2c_host_proxy,bus=ot-i2c2,chardev=i2c2"]
+
+    # Create a chardev for the GPIO:
+    qemu_args += ["-chardev", "pty,id=gpio"]
+    qemu_args += ["-global", "ot-gpio-eg.chardev=gpio"]
+
+    # Create a chardev for the USBDEV control:
+    qemu_args += ["-chardev", "pty,id=usbdev-cmd"]
+    qemu_args += ["-chardev", "pty,id=usbdev-host"]
+
+    # Create a chardev for the RV_DM JTAG TAP:
+    qemu_args += ["-chardev", "socket,id=taprbb,path=qemu-jtag.sock,server=on,wait=off"]
+
+    # Scale the Ibex clock by an `icount` factor.
+    qemu_args += ["-icount", "shift={}".format(param["icount"])]
+
+    # Do not exit QEMU on resets by default.
+    qemu_args += ["-global", "ot-rstmgr.fatal_reset=0"]
+
+    # Spawn QEMU stopped and in the background so we can run OpenTitanTool.
+    # The emulation will start when OpenTitanTool releases the reset pin and `cont`
+    # is sent over the monitor.
+    qemu_args += ["-daemonize", "-S"]
+
+    # Write any QEMU log messages to a file to be read at the end of the test.
+    qemu_args += ["-D", "qemu.log"]
+    qemu_args += ["-d", "guest_errors,unimp"]
+
+    if param["traces"]:
+        traces = json.decode(param["traces"])
+        for trace in traces:
+            qemu_args += ["--trace", "{}".format(trace)]
+
+    # Because flash info pages are not spliced and QEMU does not currently
+    # support flash scrambling/ECCs, any uninitialised seeds read from the flash
+    # creator/owner secret pages will be all `0xFF...`. This will cause the
+    # keymgr to error when advancing to the OwnerIntermediate state, preventing
+    # further use. Temporarily disable the relevant keymgr data validity check
+    # via an opt-in QEMU property.
+    # TODO: remove this property when either QEMU flash info page splicing
+    # is available, or the QEMU `flash_ctrl` implements scrambling & ECC support.
+    qemu_args += ["-global", "ot-keymgr.disable-flash-seed-check=true"]
+
+    # By default QEMU will exit when the test status register is written.
+    # OpenTitanTool expects to be able to do multiple resets, for example after
+    # bootstrapping, and then execute the test. Resetting could cause the test
+    # to run, finish, and exit, which we don't want to happen.
+    qemu_args += ["-global", "ot-ibex_wrapper.dv-sim-status-exit=off"]
+
+    # To enable limited support for UART rescue in the ROM_EXT, we need to
+    # be able to toggle break signals on/off in QEMU's UART and mock this
+    # in the oversampled `VAL` register.
+    qemu_args += ["-global", "ot-uart.oversample-break=true"]
+    qemu_args += ["-global", "ot-uart.toggle-break=true"]
+
+    # QEMU will by default interpret quit commands over JTAG to the TAP Ctrls
+    # as signals to exit VM execution. We want to be able to disconnect from
+    # JTAG without stopping execution completely for tests.
+    qemu_args += ["-global", "tap-ctrl-rbb.quit=false"]
+
+    # Add parameter-specified globals.
+    if param["globals"]:
+        globals = json.decode(param["globals"])
+        for key, val in globals.items():
+            qemu_args += ["-global", "{}={}".format(key, val)]
+
+    if param["qemu_args"]:
+        qemu_args += json.decode(param["qemu_args"])
+
+    qemu_args = " ".join(qemu_args)
+
+    # Construct the test script
+    script = ctx.actions.declare_file(ctx.attr.name + ".bash")
+
+    # Pair the `test_cmd` with the test harness - if overridden, don't use the
+    # default `test_cmd`.
+    if ctx.attr.test_harness:
+        test_cmd = ctx.attr.test_cmd
+    else:
+        test_cmd = exec_env.test_cmd
+    test_cmd = test_cmd.format(**param)
+    test_cmd = ctx.expand_location(test_cmd, data_labels)
+
+    test_script_fmt.update({
+        "qemu": exec_env.qemu.short_path,
+        "qemu_args": qemu_args,
+        "args": args,
+        "test_harness": test_harness.executable.short_path,
+        "test_cmd": test_cmd,
+    })
+    ctx.actions.expand_template(
+        template = exec_env.test_script,
+        output = script,
+        is_executable = True,
+        substitutions = {
+            "__" + key + "__": val
+            for (key, val) in test_script_fmt.items()
+        },
+    )
+
+    return script, data_files
diff --git a/rules/opentitan/silicon.bzl b/rules/opentitan/silicon.bzl
index 04fbf6dee83fb..226ddbc8cc552 100644
--- a/rules/opentitan/silicon.bzl
+++ b/rules/opentitan/silicon.bzl
@@ -6,6 +6,13 @@ load(
     "@lowrisc_opentitan//rules/opentitan:providers.bzl",
     "SiliconBinaryInfo",
 )
+load(
+    "@lowrisc_opentitan//rules/opentitan:transform.bzl",
+    "convert_to_scrambled_rom_vmem",
+    "convert_to_vmem",
+    "extract_software_logs",
+    "scramble_flash",
+)
 load(
     "@lowrisc_opentitan//rules/opentitan:util.bzl",
     "assemble_for_test",
@@ -18,10 +25,6 @@ load(
     "exec_env_as_dict",
     "exec_env_common_attrs",
 )
-load(
-    "@lowrisc_opentitan//rules/opentitan:transform.bzl",
-    "convert_to_scrambled_rom_vmem",
-)
 load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
 
 _TEST_SCRIPT = """#!/bin/bash
@@ -47,8 +50,9 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
     Returns:
       dict: A dict of fields to create in the provider.
     """
+    hashfile = None
     if ctx.attr.kind == "rom":
-        rom = convert_to_scrambled_rom_vmem(
+        (rom, hashfile) = convert_to_scrambled_rom_vmem(
             ctx,
             name = name,
             src = elf,
@@ -61,12 +65,43 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
     elif ctx.attr.kind == "ram":
         default = elf
         rom = None
+        vmem = convert_to_vmem(
+            ctx,
+            name = name,
+            src = signed_bin if signed_bin else binary,
+            word_size = 32,
+        )
     elif ctx.attr.kind == "flash":
         default = signed_bin if signed_bin else binary
         rom = None
+
+        # Build VMEM images to enable GLS testing.
+        vmem_base = convert_to_vmem(
+            ctx,
+            name = name,
+            src = default,
+            word_size = 64,
+        )
+        vmem = scramble_flash(
+            ctx,
+            name = name,
+            suffix = "64.scr.vmem",
+            src = vmem_base,
+            otp = get_fallback(ctx, "file.otp", exec_env),
+            otp_mmap = exec_env.otp_mmap,
+            otp_seed = exec_env.otp_seed,
+            otp_data_perm = exec_env.otp_data_perm,
+            _tool = exec_env.flash_scramble_tool.files_to_run,
+        )
     else:
         fail("Not implemented: kind ==", ctx.attr.kind)
 
+    logs = extract_software_logs(
+        ctx,
+        name = name,
+        src = elf,
+        _tool = exec_env.extract_sw_logs.files_to_run,
+    )
     return {
         "elf": elf,
         "binary": binary,
@@ -75,6 +110,9 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
         "signed_bin": signed_bin,
         "disassembly": disassembly,
         "mapfile": mapfile,
+        "hashfile": hashfile,
+        "vmem": vmem,
+        "logs": logs,
     }
 
 def _test_dispatch(ctx, exec_env, firmware):
@@ -150,7 +188,6 @@ silicon = rule(
 def silicon_params(
         tags = [],
         timeout = "short",
-        local = True,
         rom_ext = None,
         test_harness = None,
         binaries = {},
@@ -165,7 +202,6 @@ def silicon_params(
     Args:
       tags: The test tags to apply to the test rule.
       timeout: The timeout to apply to the test rule.
-      local: Whether to set the `local` flag on this test.
       test_harness: Use an alternative test harness for this test.
       binaries: Dict of binary labels to substitution parameter names.
       rom_ext: Use an alternate ROM_EXT for this test.
@@ -180,7 +216,6 @@ def silicon_params(
     return struct(
         tags = ["silicon", "exclusive"] + (["changes_otp"] if changes_otp else []) + tags,
         timeout = timeout,
-        local = local,
         test_harness = test_harness,
         binaries = binaries,
         rom = None,
diff --git a/rules/opentitan/sim_dv.bzl b/rules/opentitan/sim_dv.bzl
index f6387d22ebb14..f9c45b3d944a8 100644
--- a/rules/opentitan/sim_dv.bzl
+++ b/rules/opentitan/sim_dv.bzl
@@ -44,8 +44,9 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
     Returns:
       dict: A dict of fields to create in the provider.
     """
+    hashfile = None
     if ctx.attr.kind == "rom":
-        rom = convert_to_scrambled_rom_vmem(
+        (rom, hashfile) = convert_to_scrambled_rom_vmem(
             ctx,
             name = name,
             src = elf,
@@ -111,6 +112,7 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
         "logs": logs,
         "mapfile": mapfile,
         "vmem": vmem,
+        "hashfile": hashfile,
     }
 
 def _test_dispatch(ctx, exec_env, firmware):
@@ -167,7 +169,6 @@ sim_dv = rule(
 def dv_params(
         tags = [],
         timeout = "short",
-        local = False,
         test_harness = None,
         binaries = None,
         rom = None,
@@ -182,7 +183,6 @@ def dv_params(
     Args:
       tags: The test tags to apply to the test rule.
       timeout: The timeout to apply to the test rule.
-      local: Whether to set the `local` flag on this test.
       test_harness: Use an alternative test harness for this test.
       binaries: Dict of binaries labels to substitution parameter names.
       rom: Use an alternate ROM for this test.
@@ -197,7 +197,6 @@ def dv_params(
     return struct(
         tags = ["dv"] + tags,
         timeout = timeout,
-        local = local,
         test_harness = test_harness,
         binaries = binaries,
         rom = rom,
diff --git a/rules/opentitan/sim_verilator.bzl b/rules/opentitan/sim_verilator.bzl
index 29889acae6038..cc6694fbf284d 100644
--- a/rules/opentitan/sim_verilator.bzl
+++ b/rules/opentitan/sim_verilator.bzl
@@ -41,8 +41,9 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
     Returns:
       dict: A dict of fields to create in the provider.
     """
+    hashfile = None
     if ctx.attr.kind == "rom":
-        rom = convert_to_scrambled_rom_vmem(
+        (rom, hashfile) = convert_to_scrambled_rom_vmem(
             ctx,
             name = name,
             src = elf,
@@ -96,6 +97,7 @@ def _transform(ctx, exec_env, name, elf, binary, signed_bin, disassembly, mapfil
         "mapfile": mapfile,
         "vmem": vmem,
         "rom32": rom32,
+        "hashfile": hashfile,
     }
 
 def _test_dispatch(ctx, exec_env, firmware):
@@ -160,7 +162,6 @@ sim_verilator = rule(
 def verilator_params(
         tags = [],
         timeout = "moderate",
-        local = True,
         test_harness = None,
         binaries = {},
         rom = None,
@@ -175,7 +176,6 @@ def verilator_params(
     Args:
       tags: The test tags to apply to the test rule.
       timeout: The timeout to apply to the test rule.
-      local: Whether to set the `local` flag on this test.
       test_harness: Use an alternative test harness for this test.
       binaries: Dict of binaries labels to substitution parameter names.
       rom: Use an alternate ROM for this test.
@@ -190,7 +190,6 @@ def verilator_params(
     return struct(
         tags = ["verilator", "cpu:5"] + tags,
         timeout = timeout,
-        local = local,
         test_harness = test_harness,
         binaries = binaries,
         rom = rom,
diff --git a/rules/opentitan/splice.bzl b/rules/opentitan/splice.bzl
index 5478c02b8deb4..bb1891e5b3c66 100644
--- a/rules/opentitan/splice.bzl
+++ b/rules/opentitan/splice.bzl
@@ -35,7 +35,7 @@ def gen_vivado_mem_file(ctx, name, src, tool, swap_nibbles = True):
     )
     return update
 
-def vivado_updatemem(ctx, name, src, mmi, update, debug = False):
+def vivado_updatemem(ctx, name, src, instance, mmi, update, debug = False):
     spliced = ctx.actions.declare_file("{}.bit".format(name))
 
     # Vivado's `updatemem` only accepts bitstream filenames that end with `.bit`.
@@ -52,7 +52,7 @@ def vivado_updatemem(ctx, name, src, mmi, update, debug = False):
     args.add("--meminfo", mmi)
     args.add("--data", update)
     args.add("--bit", src)
-    args.add("--proc", "dummy")
+    args.add("--proc", instance)
     args.add("--out", spliced)
 
     ctx.actions.run(
@@ -129,7 +129,8 @@ def _bitstream_splice_impl(ctx):
             ctx = ctx,
             name = "{}-rom".format(ctx.label.name),
             src = src,
-            mmi = get_fallback(ctx, "file.rom_mmi", exec_env),
+            instance = "rom",
+            mmi = get_fallback(ctx, "file.mmi", exec_env),
             update = mem,
             debug = ctx.attr.debug,
         )
@@ -151,7 +152,8 @@ def _bitstream_splice_impl(ctx):
             ctx = ctx,
             name = "{}-otp".format(ctx.label.name),
             src = src,
-            mmi = get_fallback(ctx, "file.otp_mmi", exec_env),
+            instance = "otp",
+            mmi = get_fallback(ctx, "file.mmi", exec_env),
             update = mem,
             debug = ctx.attr.debug,
         )
@@ -169,9 +171,8 @@ bitstream_splice_ = rule(
     attrs = {
         "src": attr.label(allow_single_file = True, doc = "The bitstream to splice"),
         "otp": attr.label(allow_single_file = True, doc = "The OTP image to splice into the bitstream"),
-        "otp_mmi": attr.label(allow_single_file = True, doc = "The OTP meminfo file"),
+        "mmi": attr.label(allow_single_file = True, doc = "The meminfo file"),
         "rom": attr.label(doc = "The ROM image to splice into the bitstream"),
-        "rom_mmi": attr.label(allow_single_file = True, doc = "The ROM meminfo file"),
         "exec_env": attr.label(providers = [[ExecEnvInfo], [DefaultInfo]], mandatory = True, doc = "The exec_env to splice for"),
         "swap_nibbles": attr.bool(default = True, doc = "Swap nybbles while preparing the memory image"),
         "debug": attr.bool(default = False, doc = "Emit debug info while updating"),
diff --git a/rules/opentitan/static_library.bzl b/rules/opentitan/static_library.bzl
index 6ace5cf8cfcb4..fb12a26e9d2ba 100644
--- a/rules/opentitan/static_library.bzl
+++ b/rules/opentitan/static_library.bzl
@@ -7,6 +7,7 @@
 # Inspired by:
 # https://gist.github.com/shareefj/4e314b16148fded3a8ec874e71b07143
 
+load("@rules_cc//cc:action_names.bzl", "CPP_LINK_STATIC_LIBRARY_ACTION_NAME")
 load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
 load("@lowrisc_opentitan//rules:rv.bzl", "rv_rule")
 
@@ -14,7 +15,17 @@ def _ot_static_library_impl(ctx):
     output_lib = ctx.actions.declare_file("lib{}.a".format(ctx.attr.name))
     output_flags = ctx.actions.declare_file("lib{}.link".format(ctx.attr.name))
 
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
+    feature_config = cc_common.configure_features(
+        ctx = ctx,
+        cc_toolchain = cc_toolchain,
+        requested_features = ctx.features,
+        unsupported_features = ctx.disabled_features,
+    )
+    archiver = cc_common.get_tool_for_action(
+        feature_configuration = feature_config,
+        action_name = CPP_LINK_STATIC_LIBRARY_ACTION_NAME,
+    )
 
     # Aggregate linker inputs of all dependencies
     lib_sets = []
@@ -42,11 +53,9 @@ def _ot_static_library_impl(ctx):
 
     lib_paths = [lib.path for lib in libs]
 
-    ar_path = cc_toolchain.ar_executable
-
     ctx.actions.run_shell(
         command = "\"{0}\" rcT {1} {2} && echo -e 'create {1}\naddlib {1}\nsave\nend' | \"{0}\" -M".format(
-            ar_path,
+            archiver,
             output_lib.path,
             " ".join(lib_paths),
         ),
diff --git a/rules/opentitan/toolchain.bzl b/rules/opentitan/toolchain.bzl
index 36d095871a7ad..b52c5de149c7c 100644
--- a/rules/opentitan/toolchain.bzl
+++ b/rules/opentitan/toolchain.bzl
@@ -8,6 +8,7 @@ LOCALTOOLS_TOOLCHAIN = "@lowrisc_opentitan//rules/opentitan:localtools_type"
 
 LocalToolInfo = provider(fields = [
     "opentitantool",
+    "gen_devid",
     "gen_mem_image",
     "gen_otp_rot_auth_json",
     "gen_otp_immutable_rom_ext_json",
@@ -16,6 +17,7 @@ LocalToolInfo = provider(fields = [
 def _localtools_toolchain(ctx):
     tools = LocalToolInfo(
         opentitantool = ctx.attr.opentitantool[0].files_to_run,
+        gen_devid = ctx.attr.gen_devid[0].files_to_run,
         gen_mem_image = ctx.attr.gen_mem_image[0].files_to_run,
         gen_otp_rot_auth_json = ctx.attr.gen_otp_rot_auth_json[0].files_to_run,
         gen_otp_immutable_rom_ext_json = ctx.attr.gen_otp_immutable_rom_ext_json[0].files_to_run,
@@ -33,6 +35,11 @@ localtools_toolchain = rule(
             executable = True,
             cfg = host_tools_transition,
         ),
+        "gen_devid": attr.label(
+            default = "//sw/host/provisioning/orchestrator/src:devid_header_gen",
+            executable = True,
+            cfg = host_tools_transition,
+        ),
         "gen_mem_image": attr.label(
             default = "//hw/ip/rom_ctrl/util:gen_vivado_mem_image",
             executable = True,
diff --git a/rules/opentitan/transform.bzl b/rules/opentitan/transform.bzl
index 23118699167d5..0c73e54204008 100644
--- a/rules/opentitan/transform.bzl
+++ b/rules/opentitan/transform.bzl
@@ -3,11 +3,13 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@bazel_skylib//rules:common_settings.bzl", "BuildSettingInfo")
+load("@rules_cc//cc:action_names.bzl", "OBJ_COPY_ACTION_NAME")
 load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
 load("@bazel_skylib//lib:paths.bzl", "paths")
 load("@lowrisc_opentitan//rules/opentitan:util.bzl", "get_override")
+load("//rules:actions.bzl", "OT_ACTION_OBJDUMP")
 
-def obj_transform(ctx, **kwargs):
+def obj_transform(ctx, strip_llvm_prf_cnts = False, **kwargs):
     """Transform an object file via objcopy.
 
     Args:
@@ -17,10 +19,22 @@ def obj_transform(ctx, **kwargs):
                  if not specified.
         src: The src File object.
         format: The objcopy output-format.
+        strip_llvm_prf_cnts: Whether to strip the llvm coverage counter section.
     Returns:
       The transformed File.
     """
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
+    feature_config = cc_common.configure_features(
+        ctx = ctx,
+        cc_toolchain = cc_toolchain,
+        requested_features = ctx.features,
+        unsupported_features = ctx.disabled_features,
+    )
+    objcopy = cc_common.get_tool_for_action(
+        feature_configuration = feature_config,
+        action_name = OBJ_COPY_ACTION_NAME,
+    )
+
     output = kwargs.get("output")
     if not output:
         name = get_override(ctx, "attr.name", kwargs)
@@ -28,20 +42,54 @@ def obj_transform(ctx, **kwargs):
         output = "{}.{}".format(name, suffix)
 
     output = ctx.actions.declare_file(output)
-    src = get_override(ctx, "attr.src", kwargs)
+    src = get_override(ctx, "file.src", kwargs)
     out_format = get_override(ctx, "attr.format", kwargs)
 
+    transform_inputs = [src]
+    transform_flags = ["--output-target", out_format]
+
+    if strip_llvm_prf_cnts:
+        # Extract the initial contents of the `__llvm_prf_cnts` section.
+        prf_cnts = ctx.actions.declare_file("{}.prf_cnts".format(output))
+        ctx.actions.run(
+            outputs = [prf_cnts],
+            inputs = [src] + cc_toolchain.all_files.to_list(),
+            arguments = [
+                "--output-target",
+                out_format,
+                "--only-section",
+                "__llvm_prf_cnts",
+                "--gap-fill",
+                "0xa5",
+                src.path,
+                prf_cnts.path,
+            ],
+            executable = objcopy,
+        )
+
+        # Checks the initial contents of the `__llvm_prf_cnts` section.
+        prf_cnts_res = ctx.actions.declare_file("{}.prf_cnts_res".format(output))
+        ctx.actions.run(
+            outputs = [prf_cnts_res],
+            inputs = [prf_cnts],
+            arguments = [prf_cnts.path, prf_cnts_res.path],
+            executable = ctx.executable._check_initial_coverage,
+        )
+
+        transform_inputs.append(prf_cnts_res)
+        transform_flags.extend(["--remove-section", "__llvm_prf_cnts"])
+
+    # Transforms the firmware format.
     ctx.actions.run(
         outputs = [output],
-        inputs = [src] + cc_toolchain.all_files.to_list(),
-        arguments = [
-            "--output-target",
-            out_format,
+        inputs = transform_inputs + cc_toolchain.all_files.to_list(),
+        arguments = transform_flags + [
             src.path,
             output.path,
         ],
-        executable = cc_toolchain.objcopy_executable,
+        executable = objcopy,
     )
+
     return output
 
 def obj_disassemble(ctx, **kwargs):
@@ -56,7 +104,18 @@ def obj_disassemble(ctx, **kwargs):
     Returns:
       The disassembled File.
     """
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
+    feature_config = cc_common.configure_features(
+        ctx = ctx,
+        cc_toolchain = cc_toolchain,
+        requested_features = ctx.features,
+        unsupported_features = ctx.disabled_features,
+    )
+    objdump = cc_common.get_tool_for_action(
+        feature_configuration = feature_config,
+        action_name = OT_ACTION_OBJDUMP,
+    )
+
     output = kwargs.get("output")
     if not output:
         name = get_override(ctx, "attr.name", kwargs)
@@ -69,7 +128,7 @@ def obj_disassemble(ctx, **kwargs):
         outputs = [output],
         inputs = [src] + cc_toolchain.all_files.to_list(),
         arguments = [
-            cc_toolchain.objdump_executable,
+            objdump,
             src.path,
             output.path,
         ],
@@ -100,7 +159,7 @@ def convert_to_vmem(ctx, **kwargs):
         output = "{}.{}.vmem".format(name, word_size)
 
     output = ctx.actions.declare_file(output)
-    src = get_override(ctx, "attr.src", kwargs)
+    src = get_override(ctx, "file.src", kwargs)
 
     ctx.actions.run(
         outputs = [output],
@@ -160,7 +219,7 @@ def scramble_flash(ctx, **kwargs):
         output = "{}.{}".format(name, suffix)
 
     output = ctx.actions.declare_file(output)
-    src = get_override(ctx, "attr.src", kwargs)
+    src = get_override(ctx, "file.src", kwargs)
     otp = get_override(ctx, "file.otp", kwargs)
 
     inputs = [src]
@@ -243,7 +302,7 @@ def convert_to_scrambled_rom_vmem(ctx, **kwargs):
         rom_scramble_config: The scrambling config.
         rom_scramble_tool: The scrambling tool.
     Returns:
-      The transformed File.
+      (The transformed File, The hashfile)
     """
     output = kwargs.get("output")
     if not output:
@@ -252,19 +311,23 @@ def convert_to_scrambled_rom_vmem(ctx, **kwargs):
         output = "{}.{}".format(name, suffix)
 
     output = ctx.actions.declare_file(output)
+
+    hashfile = ctx.actions.declare_file("{}.hash.c".format(output.basename))
+
     src = get_override(ctx, "attr.src", kwargs)
 
     config = get_override(ctx, "file.rom_scramble_config", kwargs)
     tool = get_override(ctx, "executable.rom_scramble_tool", kwargs)
 
     ctx.actions.run(
-        outputs = [output],
+        outputs = [output, hashfile],
         inputs = [src, tool, config],
         arguments = [
             config.path,
             src.path,
             output.path,
+            hashfile.path,
         ],
         executable = tool,
     )
-    return output
+    return (output, hashfile)
diff --git a/rules/opentitan/util.bzl b/rules/opentitan/util.bzl
index 21c81392c246b..97d9edb1d6ebb 100644
--- a/rules/opentitan/util.bzl
+++ b/rules/opentitan/util.bzl
@@ -81,3 +81,41 @@ def assemble_for_test(ctx, name, spec, data_files, opentitantool):
         executable = opentitantool,
     )
     return image
+
+def recursive_format(spec, variables, max_depth = 10):
+    """Recursively apply string formatting to a string.
+
+    This function repeatedly applies `str.format()` using the provided
+    `variables` until all placeholders are resolved or `max_depth` is
+    reached. This is useful for handling nested variable substitutions.
+
+    All `format` placeholders like `{something}` are recursively resolved,
+    and escaped sequences `{{` are unescaped only once to `{`.
+
+    Examples:
+      "{{ blah }}"                      =>  "{ blah }"
+      "{  blah  }",  blah="{{ blah }}"  =>  "{ blah }"
+      "{  blah  }",  blah="   blah   "  =>  "   blah   "
+      "{  blah  }",  blah="{  blah  }"  =>  error
+      "{"                               =>  error
+
+    Args:
+      spec: The string to be formatted.
+      variables: A dictionary of variables to use for formatting.
+      max_depth: The maximum number of times to apply formatting.
+
+    Returns:
+      The fully formatted string.
+
+    Raises:
+      If the spec cannot be fully evaluated within `max_depth` iterations.
+    """
+    for _ in range(max_depth):
+        spec = spec.replace("{{", "{{{{").replace("}}", "}}}}")
+        spec = spec.format(**variables)
+
+    spec_without_escape = spec.replace("{{", "").replace("}}", "")
+    if "{" in spec_without_escape or "}" in spec_without_escape:
+        fail("RecursionError: the spec cannot be fully evaluated after ", max_depth, " levels: ", spec)
+
+    return spec.format()
diff --git a/rules/opentitan_test.bzl b/rules/opentitan_test.bzl
deleted file mode 100644
index 955fae616f3d6..0000000000000
--- a/rules/opentitan_test.bzl
+++ /dev/null
@@ -1,712 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load(
-    "@//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-    "opentitan_flash_binary",
-    "opentitan_rom_binary",
-)
-load("@bazel_skylib//lib:shell.bzl", "shell")
-load("@bazel_skylib//lib:collections.bzl", "collections")
-
-def _fpga_from_fpga_target(target):
-    """
-    Return the FPGA part of an FPGA target name:
-      cw310_rom_with_fake_key -> cw310
-    """
-    return target.split("_")[0]
-
-def _rom_from_fpga_target(target):
-    """
-    Return the ROM part of an FPGA target name:
-      cw310_rom_with_fake_key -> rom_with_fake_key
-    """
-    return target.partition("_")[2]
-
-def _fpga_target(fpga, rom):
-    """
-    Return the target name for a given FPGA and ROM.
-    """
-    return "{}_{}".format(fpga, rom)
-
-_FPGAS = ["cw310", "cw340"]
-_ROMS = ["rom_with_fake_keys", "rom_with_real_keys", "test_rom"]
-
-# We do not have a signed CW340 ROM yet.
-_BLACKLIST_TARGETS = [("cw340", "rom_with_real_keys")]
-FPGA_TARGETS = [
-    _fpga_target(fpga, rom)
-    for fpga in _FPGAS
-    for rom in _ROMS
-    if (fpga, rom) not in _BLACKLIST_TARGETS
-]
-FPGA_DEFAULT_TARGETS = [
-    _fpga_target("cw310", "rom_with_fake_keys"),
-    _fpga_target("cw310", "test_rom"),
-]
-VALID_TARGETS = ["dv", "verilator"] + FPGA_TARGETS
-
-# By default, only build CW310 targets to avoid overloading the CI
-DEFAULT_TARGETS = ["dv", "verilator"] + FPGA_DEFAULT_TARGETS
-
-OTTF_SUCCESS_MSG = r"PASS.*\n"
-OTTF_FAILURE_MSG = r"(FAIL|FAULT).*\n"
-ROM_BOOT_FAILURE_MSG = "BFV:[0-9a-f]{8}"
-
-# These are defined for positive test cases and should be flipped for negative
-# test cases, i.e., when a test failure is the expected outcome.
-DEFAULT_TEST_SUCCESS_MSG = OTTF_SUCCESS_MSG
-DEFAULT_TEST_FAILURE_MSG = "({})|({})".format(
-    OTTF_FAILURE_MSG,
-    ROM_BOOT_FAILURE_MSG,
-)
-
-# This constant holds a dictionary of slot-specific linker script dependencies
-# that determine how an `opentitan_flash_binary` is built.
-_FLASH_SLOTS = {
-    "silicon_creator_a": ["@//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a"],
-    "silicon_creator_b": ["@//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_b"],
-    "silicon_creator_virtual": ["@//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_virtual"],
-}
-
-_BASE_PARAMS = {
-    "args": [],  # Passed to test runner as arguments.
-    "data": [],
-    "local": True,
-    "otp": "@//hw/ip/otp_ctrl/data:img_rma",
-    "rom": "@//sw/device/lib/testing/test_rom",
-    "tags": [],
-    "test_runner": "@//util:opentitan_functest_runner.sh",
-    "test_cmds": [],  # Passed to test_runner via TEST_CMDS env var.
-    "timeout": "moderate",  # 5 minutes
-    "exit_success": DEFAULT_TEST_SUCCESS_MSG,
-    "exit_failure": DEFAULT_TEST_FAILURE_MSG,
-}
-
-def dv_params(
-        # Base Parameters
-        args = _BASE_PARAMS["args"] + [
-            "$(location {dvsim_config})",
-        ],
-        data = _BASE_PARAMS["data"],
-        local = _BASE_PARAMS["local"],
-        otp = _BASE_PARAMS["otp"],
-        rom = _BASE_PARAMS["rom"],
-        tags = _BASE_PARAMS["tags"],
-        timeout = _BASE_PARAMS["timeout"],
-        test_runner = "@//util:dvsim_test_runner.sh",
-        test_cmds = [],
-        # DV-specific Parameters
-        dvsim_config = "@//hw/top_earlgrey/dv:chip_sim_cfg.hjson",
-        **kwargs):
-    """A macro to create DV sim parameters for OpenTitan functional tests.
-
-    This macro emits a dictionary of parameters which are pasted into the DV
-    simulation specific test rule.
-
-    Parameters:
-        @param args: Extra arguments to pass to the test runner (`dvsim.py`).
-        @param data: Data dependencies of the test.
-        @param local: Whether the test should be run locally without sandboxing.
-        @param otp: The OTP image to use.
-        @param rom: The ROM image to use.
-        @param tags: The test tags to apply to the test rule.
-        @param timeout: The timeout to apply to the test rule.
-        @param test_cmds: A list of required commands and args that make up the
-                          immutable portion of the harness invocation.
-        @param dvsim_config: The dvsim.py Hjson config file for the toplevel.
-    """
-    required_test_cmds = [
-        "-i",
-        "chip_sw_{name}",
-        "--",
-    ]
-    required_data = [
-        dvsim_config,
-        "@//util/dvsim",
-        "@//hw:all_files",
-        "@//hw:fusesoc_ignore",
-    ]
-    required_tags = ["dv"]
-    kwargs.update(
-        args = args,
-        data = required_data + data,
-        local = local,
-        otp = otp,
-        rom = rom,
-        tags = required_tags + tags,
-        test_runner = test_runner,
-        test_cmds = required_test_cmds + test_cmds,
-        timeout = timeout,
-        dvsim_config = dvsim_config,
-    )
-    return kwargs
-
-def verilator_params(
-        # Base Parameters
-        args = _BASE_PARAMS["args"],
-        data = _BASE_PARAMS["data"],
-        exit_success = _BASE_PARAMS["exit_success"],
-        exit_failure = _BASE_PARAMS["exit_failure"],
-        local = _BASE_PARAMS["local"],
-        otp = _BASE_PARAMS["otp"],
-        rom = _BASE_PARAMS["rom"],
-        tags = _BASE_PARAMS["tags"],
-        timeout = _BASE_PARAMS["timeout"],
-        test_runner = _BASE_PARAMS["test_runner"],
-        test_cmds = _BASE_PARAMS["test_cmds"] + [
-            "console",
-            "--exit-success={exit_success}",
-            "--exit-failure={exit_failure}",
-        ],
-        # Verilator-specific Parameters
-        # None
-        **kwargs):
-    """A macro to create Verilator sim parameters for OpenTitan functional tests.
-
-    This macro emits a dictionary of parameters which are pasted into the
-    Verilator simulation specific test rule.
-
-    Parameters:
-        @param args: Extra arguments to pass to the test runner (`opentitantool`).
-        @param data: Data dependencies of the test.
-        @param local: Whether the test should be run locally without sandboxing.
-        @param otp: The OTP image to use.
-        @param rom: The ROM image to use.
-        @param tags: The test tags to apply to the test rule.
-        @param timeout: The timeout to apply to the test rule.
-        @param test_cmds: A list of required commands and args that make up the
-                          immutable portion of the harness invocation.
-    """
-    default_args = [
-        "--rcfile=",
-        "--logging={logging}",
-    ]
-    required_test_cmds = [
-        "--interface=verilator",
-        "--verilator-bin=$(location @//hw:verilator)",
-        "--verilator-rom=$(location {rom})",
-        "--verilator-flash=$(location {flash})",
-        "--verilator-otp=$(location {otp})",
-    ]
-    required_data = [
-        "@//hw:verilator",
-        "@//hw:fusesoc_ignore",
-    ]
-    required_tags = ["verilator", "cpu:5"]
-    kwargs.update(
-        args = default_args + args,
-        data = required_data + data,
-        exit_success = exit_success,
-        exit_failure = exit_failure,
-        local = local,
-        otp = otp,
-        rom = rom,
-        tags = required_tags + tags,
-        test_runner = test_runner,
-        test_cmds = required_test_cmds + test_cmds,
-        timeout = timeout,
-    )
-    return kwargs
-
-def fpga_params(
-        # Base Parameters
-        args = _BASE_PARAMS["args"],
-        data = _BASE_PARAMS["data"] + ["{bitstream}"],
-        exit_success = _BASE_PARAMS["exit_success"],
-        exit_failure = _BASE_PARAMS["exit_failure"],
-        local = _BASE_PARAMS["local"],
-        otp = _BASE_PARAMS["otp"],
-        tags = _BASE_PARAMS["tags"],
-        test_runner = _BASE_PARAMS["test_runner"],
-        test_cmds = [
-            "--exec=\"transport init\"",
-            "--exec=\"fpga load-bitstream $(location {bitstream})\"",
-            "--exec=\"bootstrap --clear-uart=true $(location {flash})\"",
-            "--exec=\"console --non-interactive --exit-success={exit_success} --exit-failure={exit_failure}\"",
-            "{clear_bitstream}",
-        ],
-        # CW-specific Parameters
-        bitstream = None,  # A bitstream value of None will cause the default bitstream values to be used
-        clear_bitstream = False,
-        # None
-        timeout = "short",
-        interface = None,
-        **kwargs):
-    """A macro to create ChipWhisperer parameters for OpenTitan functional tests.
-
-    This macro emits a dictionary of parameters which are pasted into the
-    ChipWhisperer FPGA specific test rule.
-
-    Parameters:
-        @param args: Extra arguments to pass the test runner `opentitantool`.
-        @param data: Data dependencies of the test.
-        @param local: Whether the test should be run locally without sandboxing.
-        @param interface: Which communication interface to use with opentitantool.
-        @param otp: The OTP image to use.
-        @param tags: The test tags to apply to the test rule.
-        @param test_cmds: A list of required commands and args that make up the
-                          immutable portion of the harness invocation.
-        @param timeout: The timeout to apply to the test rule.
-        @param bitstream: The bitstream to load into the FPGA (this specifies
-                          the ROM image that is also used, since the ROM is
-                          baked into the bitstream).
-        @param clear_bitstream: Clear FPGA bitstream at the end of the test.
-    """
-    default_args = [
-        "--rcfile=",
-        "--logging={logging}",
-    ]
-    required_test_cmds = [
-        "--interface={}".format(interface),
-    ]
-    required_tags = [
-        interface,
-        "exclusive",
-    ]
-    kwargs.update(
-        args = default_args + args,
-        data = data,
-        exit_success = exit_success,
-        exit_failure = exit_failure,
-        local = local,
-        interface = interface,
-        otp = otp,
-        tags = required_tags + tags,
-        test_runner = test_runner,
-        test_cmds = required_test_cmds + test_cmds,
-        timeout = timeout,
-        bitstream = bitstream,
-        clear_bitstream = clear_bitstream,
-    )
-    return kwargs
-
-def cw310_params(
-        interface = "cw310",
-        **kwargs):
-    """A macro to create CW310-specific parameters for OpenTitan functional tests.
-
-    Parameters:
-        @param interface: Which communication interface to use with the CW310
-                          board.  Choices are "cw310" or "hyper310".
-    All others parameters are forwarded to fpga_params()
-    """
-    if interface not in ("cw310", "hyper310"):
-        fail("The interface must be either 'cw310' or 'hyper310'")
-    kwargs.update(interface = interface)
-    return fpga_params(**kwargs)
-
-def cw340_params(
-        interface = "cw340",
-        **kwargs):
-    """A macro to create CW340-specific parameters for OpenTitan functional tests.
-
-    Parameters:
-        @param interface: Which communication interface to use with the CW340
-                          board.  Choices are "cw340".
-    All others parameters are forwarded to fpga_params()
-    """
-    if interface not in ("cw340", "hyper340"):
-        fail("The interface must be either 'cw340' or 'hyper340'.")
-    kwargs.update(interface = interface)
-    return fpga_params(**kwargs)
-
-def opentitan_functest(
-        name,
-        targets = DEFAULT_TARGETS,
-        args = [],
-        data = [],
-        test_in_rom = False,
-        ot_flash_binary = None,
-        signed = True,
-        manifest = "@//sw/device/silicon_creator/rom_ext:manifest",
-        slot = "silicon_creator_a",
-        test_harness = "@//sw/host/opentitantool",
-        key_struct = ECDSA_ONLY_KEY_STRUCTS[0],
-        logging = "info",
-        dv = None,
-        verilator = None,
-        **kwargs):
-    """A helper macro for generating OpenTitan functional tests.
-
-    This macro is mostly a wrapper around `opentitan_flash_binary`, but creates
-    testing artifacts for each of the hardware targets in `targets`. The testing
-    artifacts are then given to an `sh_test` rule which dispatches the test to
-    the corresponding hardware target via `opentitantool`.
-    Parameters:
-      @param name: The name of this rule.
-      @param targets: A list of hardware targets on which to dispatch tests.
-      @param args: Extra arguments (in addition to those defined in the target-
-                   specific parameter dictionary) to pass to the test harness
-                   (e.g., `opentitantool`).
-      @param data: Extra data dependencies (in addition to those defined in the
-                   target-specific parameter dictionary) needed while executing
-                   the test.
-      @param test_in_rom: Whether to run the test from ROM, runs from flash by
-                          default.
-      @param ot_flash_binary: Use the named `opentitan_flash_binary` as the
-                              flash image for the test rather than building one
-                              from srcs/deps.
-      @param signed: Whether to sign the test image. Signed by default.
-      @param manifest: Partially populated manifest to set boot stage/slot configs.
-      @param slot: What slot to build the image for.
-      @param test_harness: The binary on the host side that runs the test.
-      @param key_struct: Which signed test image (by key set) to use.
-      @param dv: DV test parameters.
-      @param verilator: Verilator test parameters.
-      @param cw310: CW310 test parameters.
-      @param cw340: CW340 test parameters.
-      @param **kwargs: Arguments to forward to `opentitan_flash_binary`.
-
-    This macro emits the following rules:
-        if `test_in_rom`:
-          opentitan_rom_binary named: {name}_rom_prog (and all emitted rules).
-        opentitan_flash_binary named: {name}_prog (and all emitted rules).
-        sh_test                named: {name}_sim_dv
-        sh_test                named: {name}_sim_verilator
-        sh_test                named: {name}_fpga_cw310
-        test_suite             named: {name}
-    """
-    deps = kwargs.pop("deps", [])
-    all_tests = []
-    target_params = {}
-
-    fpga_params_ = {}
-    for fpga in _FPGAS:
-        fpga_params_[fpga] = kwargs.pop(fpga, fpga_params(interface = fpga))
-
-    # Only build SW for devices we are running tests on.
-    devices_to_build_for = []
-    for target in targets:
-        if target == "dv":
-            devices_to_build_for.append("sim_dv")
-            target_params["sim_dv"] = dv_params() if not dv else dv
-        elif target == "verilator":
-            devices_to_build_for.append("sim_verilator")
-            target_params["sim_verilator"] = verilator_params() if not verilator else verilator
-        elif target in FPGA_TARGETS:
-            fpga_name = _fpga_from_fpga_target(target)
-            rom_name = _rom_from_fpga_target(target)
-            devices_to_build_for.append("fpga_{}".format(fpga_name))
-
-            # Copy parameters for each `target`. This is not a deep copy, thus we
-            # also copy tags below.
-            params = dict(fpga_params_[fpga_name].items())
-            params["tags"] = [t for t in params["tags"]]
-
-            # If the parameter was not provided or was provided without
-            # the bitstream field, determine the bitstream argument based on
-            # the target. Otherwise, use the provided bitstream argument.
-            _DEFAULT_BITSTREAM_PATH = {
-                "cw310": {
-                    "cw310": "@//hw/bitstream",
-                    "hyper310": "@//hw/bitstream/hyperdebug",
-                },
-                "cw340": {
-                    "cw340": "@//hw/bitstream/cw340",
-                    "hyper340": "@//hw/bitstream/cw340",
-                },
-            }
-            if params.get("bitstream") == None:
-                if fpga_name not in _DEFAULT_BITSTREAM_PATH:
-                    fail("Could not find a default bitstream for FPGA target '{}'", fpga_name)
-                intf = params["interface"]
-                if intf not in _DEFAULT_BITSTREAM_PATH[fpga_name]:
-                    fail(
-                        "Could not find a default bitstream for interface {} for FPGA target '{}'",
-                        intf,
-                        fpga_name,
-                    )
-                params["bitstream"] = "{}:{}".format(
-                    _DEFAULT_BITSTREAM_PATH[fpga_name][intf],
-                    rom_name,
-                )
-
-            # If the bitstream field was provided, it will already have been copied into the parameters.
-
-            # Fill in the remaining arguments
-            params["tags"].append(target)
-            target_params[target] = params
-        else:
-            fail("Invalid target {}. Target must be in {}".format(target, VALID_TARGETS))
-    devices_to_build_for = collections.uniq(devices_to_build_for)
-
-    # Handle the special case were the test is run at the ROM stage.
-    if test_in_rom:
-        if ot_flash_binary:
-            fail("Tests that run in ROM stage cannot use pre-built flash binary.")
-        if target in FPGA_TARGETS:
-            fail("Tests that run in ROM stage cannot run on FPGA.")
-        ot_flash_binary = name + "_rom_prog"
-        opentitan_rom_binary(
-            name = ot_flash_binary,
-            deps = deps,
-            devices = devices_to_build_for,
-            testonly = True,
-            **kwargs
-        )
-
-    # Generate SW artifacts for the tests.
-    if not ot_flash_binary:
-        # Set the linker script for the specified slot.
-        if slot not in _FLASH_SLOTS:
-            fail("Invalid slot: {}. Valid slots are: silicon_creator_{a,b,virtual}".format(slot))
-        deps += _FLASH_SLOTS[slot]
-
-        # Get OTP image for sim targets. We need to pass the OTP image to the
-        # flash scrambling script since it contains the seeds to derive the
-        # scrambling keys. No need to worry about flash image scrambling for
-        # FPGA targets as the flash is loaded through bootstrap (i.e., the front
-        # door), unlike the sim targets which load via backdoor.
-        sim_otp_ = None
-        if "sim_dv" in target_params:
-            sim_otp_ = target_params["sim_dv"]["otp"]
-        elif "sim_verilator" in target_params:
-            sim_otp_ = target_params["sim_verilator"]["otp"]
-        ot_flash_binary = name + "_prog"
-        opentitan_flash_binary(
-            name = ot_flash_binary,
-            signed = signed,
-            sim_otp = sim_otp_,
-            deps = deps,
-            devices = devices_to_build_for,
-            manifest = manifest,
-            testonly = True,
-            **kwargs
-        )
-
-    for target, params in target_params.items():
-        # Set test name.
-        test_name = "{}_{}".format(name, target)
-
-        all_tests.append(test_name)
-
-        # The args/data lists will hold all of the test arguments/artifacts that
-        # need to be present at runtime.
-        target_args = args
-        target_data = data + [test_harness]
-        target_test_cmds = []
-
-        ########################################################################
-        # Retrieve host-side test components.
-        ########################################################################
-        # Environment variables to pass to the `sh_test`.
-        env = {}
-
-        # Set the test runner (i.e., the script that invokes the "test harness").
-        test_runner = params.pop("test_runner")
-
-        # Set the test harness (i.e., the host-side test component, or
-        # `opentitantool` in most cases).
-        env["TEST_HARNESS"] = "$(location {})".format(test_harness)
-
-        ########################################################################
-        # Retrieve device-side test components.
-        ########################################################################
-        # Set ROM image.
-        # Note: FPGA targets will not specify a ROM image as the ROM imaged is
-        # specified via the `bitstream` parameter (since the ROM is baked into
-        # the bitstream).
-        rom = params.pop("rom", None)
-        if rom:
-            if test_in_rom:
-                rom_filegroup = "{}_rom_prog_{}".format(name, target)
-                rom = "{}_scr_vmem".format(rom_filegroup)
-            else:
-                rom_label = Label(rom)
-                rom_filegroup = "@{}//{}:{}_{}".format(
-                    rom_label.workspace_name,
-                    rom_label.package,
-                    rom_label.name,
-                    target,
-                )
-                rom = "{}_scr_vmem".format(rom_filegroup)
-            target_data.append(rom)
-            target_data.append(rom_filegroup)
-
-        # Set flash image.
-        if target in ["sim_dv", "sim_verilator"]:
-            flash = "{}_{}_scr_vmem64".format(ot_flash_binary, target)
-        elif target in FPGA_TARGETS:
-            flash = "{}_fpga_{}_bin".format(ot_flash_binary, _fpga_from_fpga_target(target))
-        else:
-            fail("Unexpected target: {}".format(target))
-        if signed:
-            flash += "_signed"
-
-            # Multislot flash binaries could have different slots / stages
-            # signed with different keys. Therefore, the key name will not be
-            # part of the target name for such images.
-            if key_struct != "multislot":
-                if type(key_struct) == "string":
-                    suffix = key_struct
-                else:
-                    suffix_parts = []
-                    if key_struct.rsa:
-                        suffix_parts.append(key_struct.rsa.name)
-                    if key_struct.spx:
-                        suffix_parts.append(key_struct.spx.name)
-                    suffix = "_".join(suffix_parts)
-                flash += "_{}".format(suffix)
-
-        # If test is to be run in ROM we load the same image into flash as a
-        # as a placeholder (since execution will never reach flash). Moreover,
-        # there is no need to update the data dependencies list as the ROM
-        # targets were already added above.
-        if test_in_rom:
-            flash = rom
-        else:
-            target_data.append(flash)
-            if target in FPGA_TARGETS:
-                target_data.append("{}_fpga_{}".format(ot_flash_binary, _fpga_from_fpga_target(target)))
-            else:
-                target_data.append("{}_{}".format(ot_flash_binary, target))
-
-        # Set OTP image.
-        otp = params.pop("otp")
-        target_data.append(otp)
-
-        ########################################################################
-        # Retrieve hardware-target-specific parameters.
-        ########################################################################
-        interface = params.pop("interface", None)
-
-        # Set Bitstream (for FPGA targets).
-        bitstream = params.pop("bitstream", None)
-        clear_bitstream = "no-op"
-        if params.pop("clear_bitstream", False):
-            clear_bitstream = "fpga clear-bitstream"
-
-        # Set success/failure strings for target platforms that print test
-        # results over the UART (e.g., Verilator and FPGA).
-        exit_strings_kwargs = {}
-        if target in FPGA_TARGETS + ["sim_verilator"]:
-            exit_strings_kwargs = {
-                "exit_success": shell.quote(params.pop("exit_success")),
-                "exit_failure": shell.quote(params.pop("exit_failure")),
-            }
-
-        # Set dvsim configuration file (for DV simulation target).
-        dvsim_config = params.pop("dvsim_config", None)
-
-        ########################################################################
-        # Format arguments to send to the test running scripts/tools.
-        ########################################################################
-        # Concatenate args / data passed into the opentitan_functest macro with
-        # args / data from device-specific params.
-        target_args = target_args + params.pop("args")
-        target_data = target_data + params.pop("data")
-        target_test_cmds = target_test_cmds + params.pop("test_cmds")
-
-        # Fill placeholders in arg/data lists.
-        format_dict = {
-            "name": name,
-            "flash": flash,
-            "rom": rom,
-            "otp": otp,
-            "dvsim_config": dvsim_config,
-            "clear_bitstream": clear_bitstream,
-            "bitstream": bitstream,
-            "logging": params.pop("logging", logging),
-        }
-        format_dict.update(exit_strings_kwargs)
-        target_args = [a.format(**format_dict) for a in target_args]
-        target_data = [d.format(**format_dict) for d in target_data]
-        target_test_cmds = [s.format(**format_dict) for s in target_test_cmds]
-        env["TEST_CMDS"] = " ".join(target_test_cmds)
-
-        if target in FPGA_TARGETS:
-            # We attach the UART configuration to the front of the command line
-            # so that they'll be parsed as global options rather than
-            # command-specific options.
-            select_options = {
-                "//conditions:default": [],
-            }
-            fpga_name = _fpga_from_fpga_target(target)
-            if fpga_name == "cw310":
-                select_options["@//ci:lowrisc_fpga_cw310"] = ["--uarts=/dev/ttyACM_CW310_1,/dev/ttyACM_CW310_0"]
-            elif fpga_name == "cw340":
-                # The CW340 supports different options for the UARTs: they can be wired to the SAM3x or the FTDI.
-                # The CI currently uses the FTDI.
-                select_options["@//ci:lowrisc_fpga_cw340"] = ["--uarts=/dev/ttyCW340_FTDI_2,/dev/ttyCW340_FTDI_3"]
-
-            target_args = select(select_options) + target_args
-
-        ########################################################################
-        # Instantiate the test rule.
-        ########################################################################
-        native.sh_test(
-            name = test_name,
-            srcs = [test_runner],
-            args = target_args,
-            data = target_data,
-            env = env,
-            **params
-        )
-
-    # Guarantee that the test suite will only run tests in `all_tests`. This
-    # check is necessary because `test_suite()` defaults to all the tests in the
-    # caller's BUILD file when its `tests` attribute is the empty list.
-    if all_tests == []:
-        fail("Zero tests generated for :{}, test_suite() would run the wrong tests.".format(name))
-
-    ############################################################################
-    # Instantiate a suite of tests to run the same test on each hardware target.
-    ############################################################################
-    native.test_suite(
-        name = name,
-        tests = all_tests,
-        # In test_suites, tags perform a filtering function and will select
-        # matching tags internally instead of allowing filters to select
-        # test_suites.
-        # There are exceptions: "small", "medium", "large", "enourmous", "manual"
-        tags = [
-            # The manual tag is a special case and is applied to the test suite
-            # it prevents it from being included in wildcards so that
-            # --build_tag_filters=-verilator works as expected and excludes
-            # building verilator tests so the verilator build wont be invoked.
-            "manual",
-            # For more see https://bazel.build/reference/be/general#test_suite.tags
-        ],
-    )
-
-def _manual_test_impl(ctx):
-    executable = ctx.actions.declare_file("manual_test_wrapper")
-    ctx.actions.write(
-        output = executable,
-        content = "{runner} {testplan}".format(
-            runner = ctx.executable._runner.short_path,
-            testplan = ctx.file.testplan.short_path,
-        ),
-    )
-    return [
-        DefaultInfo(
-            runfiles = ctx.runfiles(
-                files = [
-                    ctx.executable._runner,
-                    ctx.file.testplan,
-                ],
-            ).merge(ctx.attr._runner[DefaultInfo].default_runfiles),
-            executable = executable,
-        ),
-    ]
-
-manual_test = rule(
-    _manual_test_impl,
-    attrs = {
-        "testplan": attr.label(
-            allow_single_file = [".hjson"],
-            doc = "Testplan with manual testpoints",
-            mandatory = True,
-        ),
-        "_runner": attr.label(
-            default = "//util:run_manual_tests",
-            executable = True,
-            cfg = "exec",
-        ),
-    },
-    doc = "Walks through the manual testpoints in a testplan",
-    test = True,
-)
diff --git a/rules/otbn.bzl b/rules/otbn.bzl
index b6036edc4bd85..48f30244e9919 100644
--- a/rules/otbn.bzl
+++ b/rules/otbn.bzl
@@ -5,51 +5,44 @@
 load("//rules:rv.bzl", "rv_rule")
 load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
 
-def _get_assembler(cc_toolchain):
-    """Find the path to riscv-unknown-elf-as."""
-
-    # Note: the toolchain config doesn"t appear to have a good way to get
-    # access to the assembler.  We should be able to access it via the
-    # the compiler, but I had trouble with //hw/ip/otbn/util/otbn_as.py invoking
-    # the compiler as assembler.
-    return [f for f in cc_toolchain.all_files.to_list() if f.basename.endswith("as")][0]
-
 def _otbn_assemble_sources(ctx, additional_srcs = []):
-    """Helper function that, for each source file in the provided context, adds
-    an action to the context that invokes the otbn assember (otbn_as.py),
-    producing a corresponding object file. Returns a list of all object files
-    that will be generated by these actions.
+    """Helper function that, in the provided context, adds an action to the
+    context that invokes the otbn assember (otbn_as.py), producing a
+    corresponding object file by assembling the provided src files.
+    Returns an object file that will be generated by these actions.
     """
-    cc_toolchain = find_cc_toolchain(ctx).cc
-    assembler = _get_assembler(cc_toolchain)
-
-    objs = []
-    for src in ctx.files.srcs + additional_srcs:
-        obj = ctx.actions.declare_file(src.basename.replace("." + src.extension, ".o"))
-        objs.append(obj)
-        ctx.actions.run(
-            outputs = [obj],
-            inputs = ([src] +
-                      cc_toolchain.all_files.to_list() +
-                      [ctx.executable._otbn_as]),
-            env = {
-                "RV32_TOOL_AS": assembler.path,
-            },
-            arguments = ["-o", obj.path, src.path] + ctx.attr.args,
-            executable = ctx.executable._otbn_as,
-        )
-
-    return objs
+    cc_toolchain = find_cc_toolchain(ctx)
+
+    obj = ctx.actions.declare_file(
+        ctx.attr.name + ".o",
+    )
+
+    files = ctx.files.srcs + additional_srcs
+    paths = [src.path for src in ctx.files.srcs + additional_srcs]
+
+    ctx.actions.run(
+        outputs = [obj],
+        inputs = depset(
+            direct = files + [ctx.executable._otbn_as],
+            transitive = [cc_toolchain.all_files],
+        ),
+        env = {
+            "RV32_TOOL_AS": ctx.executable._riscv32_as.path,
+        },
+        arguments = ["-o", obj.path] + paths + ctx.attr.args,
+        executable = ctx.executable._otbn_as,
+    )
+
+    return obj
 
 def _otbn_library(ctx):
-    """Produces a collection of object files, one per source file, that can be
-    used as a dependency for otbn binaries."""
-    objs = _otbn_assemble_sources(ctx)
+    """Produces an object file used as a dependency for otbn binaries."""
+    obj = _otbn_assemble_sources(ctx)
 
     return [
         DefaultInfo(
-            files = depset(objs),
-            data_runfiles = ctx.runfiles(files = objs),
+            files = depset([obj]),
+            data_runfiles = ctx.runfiles(files = [obj]),
         ),
     ]
 
@@ -77,16 +70,24 @@ def _otbn_binary(ctx, additional_srcs = []):
     We achieve by having `otbn_build.py` emit a conventional RV32I library
     that other rules can depend on in their `deps`.
     """
-    cc_toolchain = find_cc_toolchain(ctx).cc
-    assembler = _get_assembler(cc_toolchain)
+    binary = getattr(ctx.attr, "binary", None)
+    if binary != None:
+        # Found prebuilt binary target
+        return [
+            binary[DefaultInfo],
+            binary[OutputGroupInfo],
+            binary[CcInfo],
+        ]
+
+    cc_toolchain = find_cc_toolchain(ctx)
 
-    # Run the otbn assembler on source files to produce object (.o) files.
-    objs = _otbn_assemble_sources(ctx, additional_srcs)
+    # Run the otbn assembler on source files to produce an object (.o) file.
+    obj = _otbn_assemble_sources(ctx, additional_srcs)
 
     # Declare output files.
     elf = ctx.actions.declare_file(ctx.attr.name + ".elf")
     rv32embed = ctx.actions.declare_file(ctx.attr.name + ".rv32embed.o")
-    archive = ctx.actions.declare_file(ctx.attr.name + ".rv32embed.a")
+    archive = ctx.actions.declare_file("lib" + ctx.attr.name + ".rv32embed.a")
 
     deps = [f for dep in ctx.attr.deps for f in dep.files.to_list()]
 
@@ -94,23 +95,23 @@ def _otbn_binary(ctx, additional_srcs = []):
     # dependencies.
     ctx.actions.run(
         outputs = [elf, rv32embed, archive],
-        inputs = (objs +
+        inputs = ([obj] +
                   deps +
                   cc_toolchain.all_files.to_list() +
                   ctx.files._otbn_data +
                   [ctx.executable._wrapper]),
         env = {
-            "RV32_TOOL_AS": assembler.path,
-            "RV32_TOOL_AR": cc_toolchain.ar_executable,
-            "RV32_TOOL_LD": cc_toolchain.ld_executable,
-            "RV32_TOOL_OBJCOPY": cc_toolchain.objcopy_executable,
+            "RV32_TOOL_AS": ctx.executable._riscv32_as.path,
+            "RV32_TOOL_AR": ctx.executable._riscv32_ar.path,
+            "RV32_TOOL_LD": ctx.executable._riscv32_ld.path,
+            "RV32_TOOL_OBJCOPY": ctx.executable._riscv32_objcopy.path,
         },
         arguments = [
             "--app-name={}".format(ctx.attr.name),
             "--archive",
             "--no-assembler",
             "--out-dir={}".format(elf.dirname),
-        ] + [obj.path for obj in (objs + deps)],
+        ] + [o.path for o in ([obj] + deps)],
         executable = ctx.executable._wrapper,
     )
 
@@ -121,11 +122,11 @@ def _otbn_binary(ctx, additional_srcs = []):
         unsupported_features = ctx.disabled_features,
     )
 
-    outputs = objs + [elf, rv32embed, archive]
+    outputs = [obj] + [elf, rv32embed, archive]
     return [
         DefaultInfo(files = depset(outputs), data_runfiles = ctx.runfiles(files = outputs)),
         OutputGroupInfo(
-            otbn_objs = depset(objs + deps),
+            otbn_objs = depset([obj] + deps),
             elf = depset([elf]),
             rv32embed = depset([rv32embed]),
             archive = depset([archive]),
@@ -147,24 +148,38 @@ def _otbn_binary(ctx, additional_srcs = []):
         ),
     ]
 
-def _run_sim_test(ctx, exp, additional_srcs = []):
+def _run_sim_test(ctx, exp, dexp, testcase = None, additional_srcs = []):
     providers = _otbn_binary(ctx, additional_srcs)
 
     # Extract the output .elf file from the output group.
     elf = providers[1].elf.to_list()[0]
 
+    exp_content = ""
+    exp_files = []
+    if exp != None:
+        exp_content += "--expected_regs {} ".format(exp.short_path)
+        exp_files.append(exp)
+    if dexp != None:
+        exp_content += "--expected_dmem {}".format(dexp.short_path)
+        exp_files.append(dexp)
+    if testcase != None:
+        if exp != None or dexp != None:
+            fail("Testcase with legacy exp or dexp specified.")
+        exp_content += "--testcase {} ".format(testcase.short_path)
+        exp_files.append(testcase)
+
     # Create a simple script that runs the OTBN test wrapper on the .elf file
     # using the provided simulator path.
     sim_test_wrapper = ctx.executable._sim_test_wrapper
     simulator = ctx.executable._simulator
     ctx.actions.write(
         output = ctx.outputs.executable,
-        content = "{} {} {} {}".format(sim_test_wrapper.short_path, simulator.short_path, exp.short_path, elf.short_path),
+        content = "{} {} -- {} {}".format(sim_test_wrapper.short_path, exp_content, simulator.short_path, elf.short_path),
     )
 
     # Runfiles include sources, the .elf file, the simulator and test wrapper
     # themselves, and all the simulator and test wrapper runfiles.
-    runfiles = ctx.runfiles(files = (ctx.files.srcs + additional_srcs + [elf, exp, ctx.executable._simulator, ctx.executable._sim_test_wrapper]))
+    runfiles = ctx.runfiles(files = (ctx.files.srcs + additional_srcs + exp_files + [elf, ctx.executable._simulator, ctx.executable._sim_test_wrapper]))
     runfiles = runfiles.merge(ctx.attr._simulator[DefaultInfo].default_runfiles)
     runfiles = runfiles.merge(ctx.attr._sim_test_wrapper[DefaultInfo].default_runfiles)
     return [
@@ -180,7 +195,27 @@ def _otbn_sim_test(ctx):
     them on the simulator. Tests are expected to count failures in the w0
     register; the test checks that w0=0 to determine if the test passed.
     """
-    return _run_sim_test(ctx, ctx.file.exp)
+    return _run_sim_test(ctx, ctx.file.exp, ctx.file.dexp, testcase = ctx.file.testcase)
+
+def otbn_sim_test_suite(name, tests, **kwargs):
+    def testname(target):
+        target = target.rsplit("/", 1)[-1]
+        target = target.rsplit(":", 1)[-1]
+        target = target.split(".", 1)[0]
+        return name + "case_" + target
+
+    tests = {testname(t): t for t in tests}
+
+    for test_name, testcase in tests.items():
+        otbn_sim_test(name = test_name, testcase = testcase, **kwargs)
+
+    # manual test_suite to group all individual testcases
+    tags = kwargs.get("tags", []) + ["manual"]
+    native.test_suite(
+        name = name,
+        tests = tests.keys(),
+        tags = tags,
+    )
 
 def _otbn_autogen_sim_test_impl(ctx):
     """
@@ -209,7 +244,7 @@ def _otbn_autogen_sim_test_impl(ctx):
         executable = ctx.executable.testgen,
     )
 
-    return _run_sim_test(ctx, exp, additional_srcs = [data])
+    return _run_sim_test(ctx, exp, None, additional_srcs = [data])
 
 def _otbn_consttime_test_impl(ctx):
     """This rule checks if a program or subroutine is constant-time.
@@ -235,6 +270,8 @@ def _otbn_consttime_test_impl(ctx):
     script_content = "{} {} --verbose".format(ctx.executable._checker.short_path, elf.short_path)
     if ctx.attr.subroutine:
         script_content += " --subroutine {}".format(ctx.attr.subroutine)
+    if ctx.attr.ignore:
+        script_content += " --ignore {}".format(" ".join(ctx.attr.ignore))
     if ctx.attr.secrets:
         script_content += " --secrets {}".format(" ".join(ctx.attr.secrets))
     if ctx.attr.initial_constants:
@@ -277,8 +314,11 @@ otbn_library = rv_rule(
     attrs = {
         "srcs": attr.label_list(allow_files = True),
         "args": attr.string_list(),
-        "_cc_toolchain": attr.label(
-            default = Label("@bazel_tools//tools/cpp:current_cc_toolchain"),
+        "_riscv32_as": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-as"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
         ),
         "_otbn_as": attr.label(
             default = "//hw/ip/otbn/util:otbn_as",
@@ -297,7 +337,30 @@ otbn_binary = rv_rule(
         "srcs": attr.label_list(allow_files = True),
         "deps": attr.label_list(providers = [DefaultInfo]),
         "args": attr.string_list(),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+        "_riscv32_ar": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ar"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_as": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-as"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_ld": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ld"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_objcopy": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-objcopy"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
         "_otbn_as": attr.label(
             default = "//hw/ip/otbn/util:otbn_as",
             executable = True,
@@ -324,8 +387,34 @@ otbn_sim_test = rv_rule(
     attrs = {
         "srcs": attr.label_list(allow_files = True),
         "deps": attr.label_list(providers = [DefaultInfo]),
+        "binary": attr.label(providers = [DefaultInfo, OutputGroupInfo, CcInfo]),
         "exp": attr.label(allow_single_file = True),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+        "dexp": attr.label(allow_single_file = True),
+        "testcase": attr.label(allow_single_file = True),
+        "_riscv32_ar": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ar"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_as": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-as"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_ld": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ld"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_objcopy": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-objcopy"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
         "_otbn_as": attr.label(
             default = "//hw/ip/otbn/util:otbn_as",
             executable = True,
@@ -362,7 +451,30 @@ otbn_autogen_sim_test = rv_rule(
     attrs = {
         "srcs": attr.label_list(allow_files = True),
         "deps": attr.label_list(providers = [DefaultInfo]),
-        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+        "_riscv32_ar": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ar"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_as": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-as"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_ld": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-ld"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+        "_riscv32_objcopy": attr.label(
+            default = Label("@lowrisc_rv32imcb_toolchain//:bin/riscv32-unknown-elf-objcopy"),
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
         "testgen": attr.label(
             mandatory = True,
             executable = True,
@@ -406,6 +518,7 @@ otbn_consttime_test = rule(
         "srcs": attr.label_list(allow_files = True),
         "deps": attr.label_list(providers = [OutputGroupInfo]),
         "subroutine": attr.string(),
+        "ignore": attr.string_list(),
         "secrets": attr.string_list(),
         "initial_constants": attr.string_list(),
         "_checker": attr.label(
diff --git a/rules/otp.bzl b/rules/otp.bzl
index 2634fa4ffd027..885337342d2fa 100644
--- a/rules/otp.bzl
+++ b/rules/otp.bzl
@@ -40,6 +40,7 @@ load("@bazel_skylib//lib:new_sets.bzl", "sets")
 load("@bazel_skylib//rules:common_settings.bzl", "BuildSettingInfo")
 load("//rules:const.bzl", "CONST", "hex")
 load("//rules/opentitan:toolchain.bzl", "LOCALTOOLS_TOOLCHAIN")
+load("//rules:stamp.bzl", "stamp_attr", "stamping_enabled")
 
 def get_otp_images():
     """Returns a list of (otp_name, img_target) tuples.
@@ -222,6 +223,8 @@ def _otp_image(ctx):
     args = ctx.actions.args()
     if not ctx.attr.verbose:
         args.add("--quiet")
+    if stamping_enabled(ctx):
+        args.add("--stamp")
     args.add("--lc-state-def", ctx.file.lc_state_def)
     args.add("--mmap-def", ctx.file.mmap_def)
     if ctx.attr.img_seed:
@@ -293,7 +296,7 @@ otp_image = rule(
             executable = True,
             cfg = "exec",
         ),
-    },
+    } | stamp_attr(-1, "//rules:stamp_flag"),
 )
 
 def _otp_image_consts_impl(ctx):
@@ -301,6 +304,8 @@ def _otp_image_consts_impl(ctx):
     args = ctx.actions.args()
     if not ctx.attr.verbose:
         args.add("--quiet")
+    if stamping_enabled(ctx):
+        args.add("--stamp")
     args.add("--lc-state-def", ctx.file.lc_state_def)
     args.add("--mmap-def", ctx.file.mmap_def)
     args.add("--img-seed", ctx.attr.img_seed[BuildSettingInfo].value)
@@ -372,7 +377,7 @@ otp_image_consts = rule(
             executable = True,
             cfg = "exec",
         ),
-    },
+    } | stamp_attr(-1, "//rules:stamp_flag"),
 )
 
 # The following overlays are used to generate a generic OTP image with fake
@@ -426,7 +431,7 @@ def _parse_str_list(s):
     """
     return s.replace(" ", "").split(",")
 
-def otp_alert_classification(alert_list, default = None, **kwargs):
+def otp_alert_classification(alert_list, default = None, ordered_params = {}, **kwargs):
     """Create an array specifying the alert classifications.
 
     This function creates an array of bytestrings that specifies the alert
@@ -438,6 +443,14 @@ def otp_alert_classification(alert_list, default = None, **kwargs):
         default: default classification for all alerts that are not specified
             in kwargs. If kwargs does not include all alerts, a value must be
             specified for default.
+        ordered_params: a mapping of the format '{"alert_name": alert_class_string}'.
+            alert_name is an alert in the alert_list argument.
+            alert_class_string is a comma-delimited string that can contain
+            spaces and is intended to be parsed by the _parse_str_list macro.
+            This string must indicate exactly 4 alert classes for the prod,
+            prod_end, dev, and rma LC states in that order.
+            Use this argument instead of kwargs to ensure the order of the
+            alert classes is maintained in the bazel build file.
         kwargs: a mapping of the format 'alert_name = alert_class_string'.
             alert_name is an alert in the alert_list argument.
             alert_class_string is a comma-delimited string that can contain
@@ -470,6 +483,9 @@ def otp_alert_classification(alert_list, default = None, **kwargs):
     for alert, class_str in kwargs.items():
         provided_alerts[alert] = _parse_alert_class_string(class_str)
 
+    for alert, class_str in ordered_params.items():
+        provided_alerts[alert] = _parse_alert_class_string(class_str)
+
     alert_set = sets.make(alert_list)
     provided_alert_set = sets.make(provided_alerts.keys())
 
diff --git a/rules/quality.bzl b/rules/quality.bzl
index b0cfb080c90bd..7f5e7eb2c4209 100644
--- a/rules/quality.bzl
+++ b/rules/quality.bzl
@@ -63,7 +63,7 @@ clang_format_attrs = {
         doc = "Command to execute to display diffs",
     ),
     "clang_format": attr.label(
-        default = "@lowrisc_rv32imcb_files//:bin/clang-format",
+        default = "@lowrisc_rv32imcb_toolchain//:bin/clang-format",
         allow_single_file = True,
         cfg = "host",
         executable = True,
@@ -121,7 +121,7 @@ def _cc_aspect_impl(target, ctx, action_callback):
         return [make_output_group_info()]
     cc_compile_ctx = cc_info.compilation_context
 
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
     feature_configuration = cc_common.configure_features(
         ctx = ctx,
         cc_toolchain = cc_toolchain,
@@ -191,7 +191,7 @@ def _cc_aspect_impl(target, ctx, action_callback):
 
 # To see which checks clang-tidy knows about, run this command:
 #
-#  ./bazelisk.sh run @lowrisc_rv32imcb_files//:bin/clang-tidy -- --checks='*' --list-checks
+#  ./bazelisk.sh run @lowrisc_rv32imcb_toolchain//:bin/clang-tidy -- --checks='*' --list-checks
 _CLANG_TIDY_CHECKS = [
     "clang-analyzer-core.*",
     # Disable advice to replace `memcpy` with `mempcy_s`.
@@ -264,7 +264,7 @@ def _make_clang_tidy_aspect(enable_fix):
                 executable = True,
             ),
             "_clang_tidy": attr.label(
-                default = "@lowrisc_rv32imcb_files//:bin/clang-tidy",
+                default = "@lowrisc_rv32imcb_toolchain//:bin/clang-tidy",
                 allow_single_file = True,
                 cfg = "host",
                 executable = True,
diff --git a/rules/repo.bzl b/rules/repo.bzl
index 47f59dc139631..f5217da8685c2 100644
--- a/rules/repo.bzl
+++ b/rules/repo.bzl
@@ -2,53 +2,12 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@python3//:defs.bzl", "interpreter")
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-load("@bazel_skylib//lib:paths.bzl", "paths")
-
-def http_archive_or_local(local = None, **kwargs):
-    if not local:
-        http_archive(**kwargs)
-    elif ("build_file" in kwargs or
-          "build_file_content" in kwargs or
-          "workspace_file" in kwargs or
-          "workspace_file_content" in kwargs):
-        native.new_local_repository(
-            name = kwargs.get("name"),
-            path = local,
-            build_file = kwargs.get("build_file"),
-            build_file_content = kwargs.get("build_file_content"),
-            workspace_file = kwargs.get("workspace_file"),
-            workspace_file_content = kwargs.get("workspace_file_content"),
-        )
-    else:
-        native.local_repository(
-            name = kwargs.get("name"),
-            path = local,
-        )
-
 def _bare_repository_impl(rctx):
-    if rctx.attr.local:
-        workspace_root = str(rctx.path(rctx.attr.workspace).dirname.realpath)
-        result = rctx.execute(
-            [
-                rctx.path(rctx.attr.python_interpreter),
-                rctx.attr._symlink_tree,
-                paths.join(workspace_root, rctx.attr.local),
-                ".",
-            ],
-            quiet = False,
-        )
-        if result.return_code != 0:
-            fail("Error initializing repo for {}".format(rctx.attr.local))
-    elif rctx.attr.url:
-        rctx.download_and_extract(
-            url = rctx.attr.url,
-            sha256 = rctx.attr.sha256,
-            stripPrefix = rctx.attr.strip_prefix,
-        )
-    else:
-        fail("Specify a `url` or `local` path")
+    rctx.download_and_extract(
+        url = rctx.attr.url,
+        sha256 = rctx.attr.sha256,
+        stripPrefix = rctx.attr.strip_prefix,
+    )
 
     for rpath, lpath in rctx.attr.additional_files.items():
         rctx.symlink(rctx.path(lpath), rpath)
@@ -58,31 +17,18 @@ def _bare_repository_impl(rctx):
 bare_repository = repository_rule(
     implementation = _bare_repository_impl,
     attrs = {
-        "url": attr.string(doc = "Location of an archive file (exclusive with `local`)."),
+        "url": attr.string(
+            mandatory = True,
+            doc = "Location of an archive file (exclusive with `local`).",
+        ),
         "sha256": attr.string(doc = "SHA256 of the archive."),
         "strip_prefix": attr.string(doc = "Prefix to strip when extracting the archive."),
-        "local": attr.string(doc = "Path to a local subdirectory (exclusive with `url`)."),
         "additional_files": attr.string_dict(
             doc = "Additional files to place in the repository (mapping repo filename to local file).",
         ),
         "additional_files_content": attr.string_dict(
             doc = "Additional files to place in the repository (mapping repo filename to strings).",
         ),
-        "python_interpreter": attr.label(
-            default = interpreter,
-            allow_single_file = True,
-            doc = "Python interpreter to use.",
-        ),
-        "_symlink_tree": attr.label(
-            default = Label("//rules/scripts:symlink_tree.py"),
-            allow_files = True,
-            doc = "Script to create symlink trees for the `local` case.",
-        ),
-        "workspace": attr.label(
-            default = Label("//:WORKSPACE"),
-            allow_single_file = True,
-            doc = "Root workspace.",
-        ),
     },
     doc = """
         A bare_repository is a repo that needs additional files (such as a BUILD hierarchy)
diff --git a/rules/rv.bzl b/rules/rv.bzl
index 48368231fb30b..0d168865a5acc 100644
--- a/rules/rv.bzl
+++ b/rules/rv.bzl
@@ -5,7 +5,7 @@
 """Helpers for transitioning to the RISC-V target."""
 
 OPENTITAN_CPU = "@platforms//cpu:riscv32"
-OPENTITAN_PLATFORM = "@crt//platforms/riscv32:opentitan"
+OPENTITAN_PLATFORM = "//toolchain:opentitan_platform"
 
 # This constant holds a dictionary of per-device dependencies which are used to
 # generate slightly different binaries for each hardware target, including two
@@ -19,10 +19,15 @@ PER_DEVICE_DEPS = {
 }
 
 def _opentitan_transition_impl(settings, attr):
+    features = settings["//command_line_option:features"] + attr.extra_bazel_features
+    coverage = settings["//command_line_option:collect_code_coverage"]
+    if attr.collect_code_coverage != -1:
+        coverage = bool(attr.collect_code_coverage)
     return {
         "//command_line_option:platforms": attr.platform,
         "//command_line_option:copt": settings["//command_line_option:copt"],
-        "//command_line_option:features": settings["//command_line_option:features"],
+        "//command_line_option:features": features,
+        "//command_line_option:collect_code_coverage": coverage,
         "//hw/bitstream/universal:rom": "//hw/bitstream/universal:none",
         "//hw/bitstream/universal:otp": "//hw/bitstream/universal:none",
         "//hw/bitstream/universal:env": "//hw/bitstream/universal:none",
@@ -38,11 +43,13 @@ opentitan_transition = transition(
     inputs = [
         "//command_line_option:copt",
         "//command_line_option:features",
+        "//command_line_option:collect_code_coverage",
     ],
     outputs = [
         "//command_line_option:platforms",
         "//command_line_option:copt",
         "//command_line_option:features",
+        "//command_line_option:collect_code_coverage",
         "//hw/bitstream/universal:rom",
         "//hw/bitstream/universal:otp",
         "//hw/bitstream/universal:env",
@@ -58,6 +65,18 @@ def rv_rule(**kwargs):
     attrs = kwargs.pop("attrs", {})
     if "platform" not in attrs:
         attrs["platform"] = attr.string(default = OPENTITAN_PLATFORM)
+    if "extra_bazel_features" not in attrs:
+        attrs["extra_bazel_features"] = attr.string_list(default = [])
+    if "collect_code_coverage" not in attrs:
+        attrs["collect_code_coverage"] = attr.int(
+            default = -1,
+            doc = """Whether to collect coverage for this target.
+
+            When set to -1 (the default), the decision is inherited from the global setting.
+            When set to 0, coverage collection is always disabled for this target.
+            When set to 1, coverage collection is always enabled for this target.
+            """,
+        )
     attrs["_allowlist_function_transition"] = attr.label(
         default = "@bazel_tools//tools/allowlists/function_transition_allowlist",
     )
diff --git a/rules/scripts/BUILD b/rules/scripts/BUILD
index 8879754528112..5abf01dd67dfa 100644
--- a/rules/scripts/BUILD
+++ b/rules/scripts/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_python//python:defs.bzl", "py_test")
+load("@rules_python//python:defs.bzl", "py_binary", "py_library", "py_test")
 load("@ot_python_deps//:requirements.bzl", "requirement")
 
 package(default_visibility = ["//visibility:public"])
diff --git a/rules/scripts/bitstreams_manifest.example.json b/rules/scripts/bitstreams_manifest.example.json
index 5daa94742fbd9..2c2209e9d053d 100644
--- a/rules/scripts/bitstreams_manifest.example.json
+++ b/rules/scripts/bitstreams_manifest.example.json
@@ -1,5 +1,5 @@
 {
-  "schema_version": 2,
+  "schema_version": 3,
   "designs": {
     "chip_earlgrey_cw310": {
       "build_id": "aabbcc",
@@ -8,14 +8,12 @@
         "build_target": "//hw/bitstream/vivado:fpga_cw310"
       },
       "memory_map_info": {
-        "otp": {
-          "file": "otp.mmi",
-          "build_target": "//hw/bitstream/vivado:fpga_cw310"
-        },
-        "rom": {
-          "file": "rom.mmi",
-          "build_target": "//hw/bitstream/vivado:fpga_cw310"
-        }
+        "file": "memories.mmi",
+        "build_target": "//hw/bitstream/vivado:fpga_cw310",
+        "memories": [
+          "otp",
+          "rom"
+        ]
       }
     },
     "chip_earlgrey_cw310_hyperdebug": {
@@ -25,14 +23,12 @@
         "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
       },
       "memory_map_info": {
-        "otp": {
-          "file": "chip_earlgrey_cw310_hyperdebug/otp.mmi",
-          "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
-        },
-        "rom": {
-          "file": "chip_earlgrey_cw310_hyperdebug/rom.mmi",
-          "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
-        }
+        "file": "chip_earlgrey_cw310_hyperdebug/memories.mmi",
+        "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug",
+        "memories": [
+          "otp",
+          "rom"
+        ]
       }
     }
   }
diff --git a/rules/scripts/bitstreams_manifest.schema.json b/rules/scripts/bitstreams_manifest.schema.json
index e88ed5b11f5d5..8f0dbfc52d813 100644
--- a/rules/scripts/bitstreams_manifest.schema.json
+++ b/rules/scripts/bitstreams_manifest.schema.json
@@ -1,7 +1,7 @@
 {
   "$schema": "https://json-schema.org/draft/2020-12/schema",
   "$id": "https://raw.githubusercontent.com/lowRISC/opentitan/master/rules/scripts/bitstreams_manifest.schema.json",
-  "title": "Bitstreams Cache Manifest v2",
+  "title": "Bitstreams Cache Manifest v3",
   "description":
       "A manifest of bitstreams in a cache entry, informing what is there and how to reproduce",
   "type": "object",
@@ -9,8 +9,8 @@
     "schema_version": {
       "description": "Version number of this manifest's schema",
       "type": "number",
-      "minimum": 2,
-      "maximum": 2
+      "minimum": 3,
+      "maximum": 3
     },
     "designs": {
       "description": "Map of designs to their files and metadata objects",
@@ -51,6 +51,14 @@
         "build_target": {
           "description": "Build target that generated the output",
           "type": "string"
+        },
+        "memories": {
+          "description": "Memory names or keys supported by the file",
+          "type": "array",
+          "items": {
+            "description": "Identifier for a memory in the MMI file",
+            "type": "string"
+          }
         }
       },
       "required": [
@@ -66,11 +74,7 @@
           "type": "string"
         },
         "bitstream": { "$ref": "#/$defs/bitstream_info" },
-        "memory_map_info": {
-          "description": "Map of name or key identifying the associated memory to file describing contents",
-          "type": "object",
-          "additionalProperties": { "$ref": "#/$defs/memory_map_info" }
-        }
+        "memory_map_info": { "$ref": "#/$defs/memory_map_info" }
       },
       "required": [
         "bitstream"
diff --git a/rules/scripts/bitstreams_manifest_v2.example.json b/rules/scripts/bitstreams_manifest_v2.example.json
new file mode 100644
index 0000000000000..5daa94742fbd9
--- /dev/null
+++ b/rules/scripts/bitstreams_manifest_v2.example.json
@@ -0,0 +1,39 @@
+{
+  "schema_version": 2,
+  "designs": {
+    "chip_earlgrey_cw310": {
+      "build_id": "aabbcc",
+      "bitstream": {
+        "file": "lowrisc_systems_chip_earlgrey_cw310_0.1.bit",
+        "build_target": "//hw/bitstream/vivado:fpga_cw310"
+      },
+      "memory_map_info": {
+        "otp": {
+          "file": "otp.mmi",
+          "build_target": "//hw/bitstream/vivado:fpga_cw310"
+        },
+        "rom": {
+          "file": "rom.mmi",
+          "build_target": "//hw/bitstream/vivado:fpga_cw310"
+        }
+      }
+    },
+    "chip_earlgrey_cw310_hyperdebug": {
+      "build_id": "ddeeff",
+      "bitstream": {
+        "file": "chip_earlgrey_cw310_hyperdebug/lowrisc_systems_chip_earlgrey_cw310_hyperdebug_0.1.bit",
+        "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
+      },
+      "memory_map_info": {
+        "otp": {
+          "file": "chip_earlgrey_cw310_hyperdebug/otp.mmi",
+          "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
+        },
+        "rom": {
+          "file": "chip_earlgrey_cw310_hyperdebug/rom.mmi",
+          "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug"
+        }
+      }
+    }
+  }
+}
diff --git a/rules/scripts/bitstreams_manifest_v2.schema.json b/rules/scripts/bitstreams_manifest_v2.schema.json
new file mode 100644
index 0000000000000..e9cb187c75e0b
--- /dev/null
+++ b/rules/scripts/bitstreams_manifest_v2.schema.json
@@ -0,0 +1,80 @@
+{
+  "$schema": "https://json-schema.org/draft/2020-12/schema",
+  "$id": "https://raw.githubusercontent.com/lowRISC/opentitan/master/rules/scripts/bitstreams_manifest_v2.schema.json",
+  "title": "Bitstreams Cache Manifest v2",
+  "description":
+      "A manifest of bitstreams in a cache entry, informing what is there and how to reproduce",
+  "type": "object",
+  "properties": {
+    "schema_version": {
+      "description": "Version number of this manifest's schema",
+      "type": "number",
+      "minimum": 2,
+      "maximum": 2
+    },
+    "designs": {
+      "description": "Map of designs to their files and metadata objects",
+      "type": "object",
+      "additionalProperties": { "$ref": "#/$defs/design" }
+    }
+  },
+  "required": [
+    "schema_version",
+    "designs"
+  ],
+  "$defs": {
+    "bitstream_info": {
+      "description": "Bitstream build output",
+      "type": "object",
+      "properties": {
+        "file": {
+          "description": "Path to bitstream file relative to root",
+          "type": "string"
+        },
+        "build_target": {
+          "description": "Build target that generated the output",
+          "type": "string"
+        }
+      },
+      "required": [
+        "file"
+      ]
+    },
+    "memory_map_info": {
+      "description": "Build output that maps memories to cells in a hardware implementation",
+      "type": "object",
+      "properties": {
+        "file": {
+          "description": "Path to file with memory contents, relative to root",
+          "type": "string"
+        },
+        "build_target": {
+          "description": "Build target that generated the output",
+          "type": "string"
+        }
+      },
+      "required": [
+        "file"
+      ]
+    },
+    "design": {
+      "description": "Files and metadata related to a design",
+      "type": "object",
+      "properties": {
+        "build_id": {
+          "description": "Build ID associated with this design's output (typically a git hash)",
+          "type": "string"
+        },
+        "bitstream": { "$ref": "#/$defs/bitstream_info" },
+        "memory_map_info": {
+          "description": "Map of name or key identifying the associated memory to file describing contents",
+          "type": "object",
+          "additionalProperties": { "$ref": "#/$defs/memory_map_info" }
+        }
+      },
+      "required": [
+        "bitstream"
+      ]
+    }
+  }
+}
diff --git a/rules/scripts/bitstreams_workspace.py b/rules/scripts/bitstreams_workspace.py
index 5ca2075254c70..2ef7334c0882a 100755
--- a/rules/scripts/bitstreams_workspace.py
+++ b/rules/scripts/bitstreams_workspace.py
@@ -20,12 +20,11 @@
 from pathlib import Path
 from typing import Dict, Set
 
-import jsonschema
-
 # The schema version used for legacy cache entries, JSON files missing a version
 # entry, and entries that use a higher version of the schema than supported here
 # (attempted in case there is forwards compatibility).
-MANIFEST_SCHEMA_VERSION = 2
+MANIFEST_SCHEMA_VERSION_MIN = 2
+MANIFEST_SCHEMA_VERSION_MAX = 3
 
 # Default location of the bitstreams cache.
 CACHE_DIR = '~/.cache/opentitan-bitstreams'
@@ -39,18 +38,15 @@
 KNOWN_DESIGNS = {
     "chip_earlgrey_cw310": {
         "bitstream": "@//hw/bitstream/vivado:fpga_cw310_test_rom",
-        "rom_mmi": "@//hw/bitstream/vivado:rom_mmi",
-        "otp_mmi": "@//hw/bitstream/vivado:otp_mmi",
+        "mmi": "@//hw/bitstream/vivado:cw310_mmi",
     },
     "chip_earlgrey_cw310_hyperdebug": {
         "bitstream": "@//hw/bitstream/vivado:fpga_cw310_test_rom_hyp",
-        "rom_mmi": "@//hw/bitstream/vivado:rom_mmi_hyp",
-        "otp_mmi": "@//hw/bitstream/vivado:otp_mmi_hyp",
+        "mmi": "@//hw/bitstream/vivado:cw310_hyperdebug_mmi",
     },
     "chip_earlgrey_cw340": {
         "bitstream": "@//hw/bitstream/vivado:fpga_cw340_test_rom",
-        "rom_mmi": "@//hw/bitstream/vivado:fpga_cw340_rom_mmi",
-        "otp_mmi": "@//hw/bitstream/vivado:fpga_cw340_otp_mmi",
+        "mmi": "@//hw/bitstream/vivado:cw340_mmi",
     },
 }
 
@@ -63,6 +59,9 @@
 parser.add_argument('--latest-update',
                     default='latest.txt',
                     help='Last time the cache was updated')
+parser.add_argument('--branch',
+                    default="master",
+                    help='Upstream git branch to search for bitstreams.')
 parser.add_argument('--bucket-url', default=BUCKET_URL, help='GCP Bucket URL')
 parser.add_argument('--build-file',
                     default='BUILD.bazel',
@@ -162,7 +161,7 @@ def Get(self, file, **kwargs):
         response = urllib.request.urlopen(url)
         return response.read()
 
-    def GetBitstreamsAvailable(self, refresh, load_latest_update=True):
+    def GetBitstreamsAvailable(self, branch, refresh, load_latest_update=True):
         """Inventory which bitstreams are available.
 
         Args:
@@ -210,7 +209,7 @@ def GetBitstreamsAvailable(self, refresh, load_latest_update=True):
             else:
                 break
 
-        latest = self.Get('master/latest.txt').decode('utf-8').split('\n')
+        latest = self.Get(f'{branch}/latest.txt').decode('utf-8').split('\n')
         self.available['latest'] = latest[1]
 
     def GetClosest(self, repodir, key):
@@ -278,7 +277,7 @@ def _GetFromRemote(self, key):
         if not os.path.exists(self.latest_update):
             self.Touch(key)
 
-    def _GenerateLegacyManifest(self, key: str, files: [str]) -> Dict:
+    def _GenerateMemoryMapFromV2(self, key: str, mmi_v2: Dict) -> Dict:
         """Generate a manifest for old cache entries without them.
 
         Args:
@@ -287,59 +286,75 @@ def _GenerateLegacyManifest(self, key: str, files: [str]) -> Dict:
         Returns:
             A dictionary mapping file paths to manifest entries
         """
-        legacy_files = {
-            "chip_earlgrey_cw310": {
-                "build_id": key,
-                "bitstream": {
-                    "file": "lowrisc_systems_chip_earlgrey_cw310_0.1.bit.orig",
-                    "build_target": "//hw/bitstream/vivado:fpga_cw310",
-                },
-                "memory_map_info": {
-                    "otp": {
-                        "file": "otp.mmi",
-                        "build_target": "//hw/bitstream/vivado:fpga_cw310",
-                    },
-                    "rom": {
-                        "file": "rom.mmi",
-                        "build_target": "//hw/bitstream/vivado:fpga_cw310",
-                    },
-                },
-            },
-            "chip_earlgrey_cw310_hyperdebug": {
-                "build_id": key,
-                "bitstream": {
-                    "file": "chip_earlgrey_cw310_hyperdebug/"
-                            "lowrisc_systems_chip_earlgrey_cw310_hyperdebug_0.1.bit",
-                    "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug",
-                },
-                "memory_map_info": {
-                    "otp": {
-                        "file": "chip_earlgrey_cw310_hyperdebug/otp.mmi",
-                        "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug",
-                    },
-                    "rom": {
-                        "file": "chip_earlgrey_cw310_hyperdebug/rom.mmi",
-                        "build_target": "//hw/bitstream/vivado:fpga_cw310_hyperdebug",
-                    },
-                },
-            },
+        filepath = None
+        memories = []
+        cache_path = os.path.join("cache", key)
+        merged_tree = None
+        merged_root = None
+        for memory, info in mmi_v2.items():
+            mmi_path = os.path.join(cache_path, info["file"])
+            mmi_tree = xml.etree.ElementTree.parse(mmi_path)
+            mmi_root = mmi_tree.getroot()
+            assert mmi_root.tag == "MemInfo"
+            processor_elem = mmi_root.findall("Processor")
+            assert len(processor_elem) == 1
+            processor_elem = processor_elem[0]
+            # Adjust the Processor element's InstPath to use the memory ID
+            processor_elem.attrib["InstPath"] = memory
+            memories.append(memory)
+
+            if filepath is None:
+                filepath = os.path.dirname(mmi_path)
+                filepath = os.path.join(filepath, "memories.mmi")
+            if merged_root is None:
+                merged_tree = mmi_tree
+                merged_root = mmi_root
+                continue
+            else:
+                merged_root.append(processor_elem)
+
+        # The Config element must be at the end
+        config_elem = merged_root.findall("Config")
+        assert len(config_elem) == 1
+        config_elem = config_elem[0]
+        merged_root.remove(config_elem)
+        merged_root.append(config_elem)
+
+        # Write the merged XML file
+        merged_tree.write(filepath)
+
+        # Rewrite memory map info in v3 format
+        memory_map_info = {
+            "file": os.path.relpath(filepath, cache_path),
+            "memories": memories,
         }
-        designs = collections.defaultdict(dict)
+        return memory_map_info
 
-        for design, metadata in legacy_files.items():
-            design_is_present = True
-            required_files = [metadata["bitstream"]["file"]]
-            for mmi in metadata["memory_map_info"].values():
-                required_files.append(mmi["file"])
-            for required_file in required_files:
-                if os.path.join("cache", key, required_file) not in files:
-                    design_is_present = False
-                    break
-            if design_is_present:
-                designs[design] = metadata
-
-        manifest = {"schema_version": MANIFEST_SCHEMA_VERSION,
-                    "designs": designs}
+    def _GenerateV3ManifestFromV2(self, key: str, manifest: Dict) -> Dict:
+        """Generate a manifest for cache entries in old v2 format.
+
+        Aggregates MMI files into one merged file, per v3 requirements.
+
+        Args:
+            manifest: The v2 manifest in the cache entry
+        Returns:
+            An updated manifest Dict with v3 memory map info
+        """
+        try:
+            import jsonschema
+        except ImportError:
+            logging.warning("jsonschema not found, skipping schema validation")
+        else:
+            schema_path = os.path.join(MANIFESTS_DIR, "bitstreams_manifest_v2.schema.json")
+            with open(schema_path) as schema_file:
+                schema = json.load(schema_file)
+            jsonschema.validate(manifest, schema)
+
+        for design, metadata in manifest["designs"].items():
+            memory_map_info = metadata["memory_map_info"]
+            memory_map_info = self._GenerateMemoryMapFromV2(key, memory_map_info)
+            metadata["memory_map_info"] = memory_map_info
+        manifest["schema_version"] = 3
         return manifest
 
     def GetFromCache(self, key: str) -> (Dict, Path):
@@ -356,20 +371,16 @@ def GetFromCache(self, key: str) -> (Dict, Path):
             files = self._GetFromLocal(key)
 
         manifest_path = os.path.join("cache", key, "manifest.json")
-        if manifest_path not in files:
-            logging.warning("No manifest found."
-                            " Attempting to generate manifest from legacy file"
-                            " paths.")
-            return (self._GenerateLegacyManifest(key, files), None)
-
         with open(manifest_path, "r") as manifest_file:
             manifest = json.load(manifest_file)
 
-        if "schema_version" not in manifest:
-            logging.error("schema is missing a version number."
-                          " Generating legacy manifest instead...")
-            return (self._GenerateLegacyManifest(key, files), None)
+        assert "schema_version" in manifest
+        schema_version = int(manifest["schema_version"])
+        assert schema_version >= MANIFEST_SCHEMA_VERSION_MIN
+        assert schema_version <= MANIFEST_SCHEMA_VERSION_MAX
 
+        if schema_version == 2:
+            return (self._GenerateV3ManifestFromV2(key, manifest), None)
         return (manifest, manifest_path)
 
     @staticmethod
@@ -381,36 +392,27 @@ def _WriteSubstituteManifest(contents: Dict, path: Path):
         with open(path, "w") as manifest_file:
             json.dump(contents, manifest_file, indent=True)
 
-    def _ConstructBazelString(self, build_file: Path, key: str) -> str:
-        # If `key` passed in is "latest", this updates the `key` to be the hash
-        # that "latest" points to.
-        if key == 'latest':
-            key = self.available['latest']
-
-        (manifest, manifest_path) = self.GetFromCache(key)
-
-        # Schema version 1 was never used and is not valid
-        if manifest["schema_version"] <= 1:
-            msg_template = "Invalid schema_version {} found in manifest"
-            raise Exception(msg_template.format(manifest["schema_version"]))
-
+    def _ConstructBazelString(self, build_file: Path, key: str, manifest: Dict,
+                              manifest_path: Path) -> str:
         designs = collections.defaultdict(dict)
-        if manifest["schema_version"] > MANIFEST_SCHEMA_VERSION:
-            logging.warning("Warning: Manifest is newer than available schemas")
-            logging.warning("Will try parsing an available schema with highest version")
-            manifest["schema_version"] = MANIFEST_SCHEMA_VERSION
 
-        if manifest["schema_version"] == 2:
+        # Attempt to check the schema if `jsonschema` is available.
+        try:
+            import jsonschema
+        except ImportError:
+            logging.warning("jsonschema not found, skipping schema validation")
+        else:
             schema_path = os.path.join(MANIFESTS_DIR, "bitstreams_manifest.schema.json")
             with open(schema_path) as schema_file:
                 schema = json.load(schema_file)
             jsonschema.validate(manifest, schema)
-            for design_name, metadata in manifest["designs"].items():
-                design = collections.defaultdict(dict)
-                design["bitstream"] = metadata["bitstream"]["file"]
-                for mmi_id, mmi_entry in metadata["memory_map_info"].items():
-                    design[mmi_id + "_mmi"] = mmi_entry["file"]
-                designs[design_name] = design
+
+        for design_name, metadata in manifest["designs"].items():
+            design = collections.defaultdict(dict)
+            design["bitstream"] = metadata["bitstream"]["file"]
+            design["mmi"] = metadata["memory_map_info"]["file"]
+            # What to do about the memory list?
+            designs[design_name] = design
 
         bazel_lines = [
             '# This file was autogenerated. Do not edit!',
@@ -469,14 +471,6 @@ def alias_lines(name, target):
 
                 bazel_lines += filegroup_lines(target_name, target_file)
 
-        if manifest_path is None:
-            # Write substitute manifest if none came with the cache entry.
-            manifest_path = os.path.join(cache_base_dir,
-                                         "substitute_manifest.json")
-            abs_manifest_path = os.path.join(self.cachedir,
-                                             "substitute_manifest.json")
-            self._WriteSubstituteManifest(manifest, abs_manifest_path)
-
         bazel_lines += filegroup_lines("manifest", manifest_path)
 
         for design_name in sorted(KNOWN_DESIGNS.keys()):
@@ -496,12 +490,25 @@ def WriteBazelFiles(self, build_file: Path, key: str) -> str:
         Returns:
             Either `key` or the corresponding commit hash if `key` is 'latest'.
         """
+        # If `key` passed in is "latest", this updates the `key` to be the hash
+        # that "latest" points to.
+        if key == 'latest':
+            key = self.available['latest']
+
+        (manifest, manifest_path) = self.GetFromCache(key)
+
+        if manifest_path is None:
+            # Write substitute manifest if none came with the cache entry.
+            manifest_path = os.path.join("cache", key,
+                                         "substitute_manifest.json")
+            abs_manifest_path = os.path.join(self.cachedir, key,
+                                             "substitute_manifest.json")
+            self._WriteSubstituteManifest(manifest, abs_manifest_path)
+
         with open(build_file, 'wt') as f:
-            f.write(self._ConstructBazelString(build_file, key))
+            f.write(self._ConstructBazelString(build_file, key, manifest, manifest_path))
 
-        if key != 'latest':
-            return key
-        return self.available[key]
+        return key
 
 
 def main(argv):
@@ -534,7 +541,7 @@ def main(argv):
                     cache.NeedRefresh(args.refresh_time))
     # Do we need to load the latest_update file?
     load_latest_update = (desired_bitstream == 'latest')
-    cache.GetBitstreamsAvailable(need_refresh and not args.offline,
+    cache.GetBitstreamsAvailable(args.branch, need_refresh and not args.offline,
                                  load_latest_update)
 
     # If commanded to print bitstream availability, do so.
diff --git a/rules/scripts/bitstreams_workspace_test.py b/rules/scripts/bitstreams_workspace_test.py
index a43b95a675a7c..20f1ebd79255e 100644
--- a/rules/scripts/bitstreams_workspace_test.py
+++ b/rules/scripts/bitstreams_workspace_test.py
@@ -8,6 +8,24 @@
 
 from bitstreams_workspace import BitstreamCache
 
+MOCK_MANIFEST = """{
+   "schema_version": 3,
+   "designs": {
+       "chip_earlgrey_cw310": {
+           "build_id": "abcd",
+           "bitstream": {
+               "file": "lowrisc_systems_chip_earlgrey_cw310_0.1.bit",
+               "build_target": "//hw/bitstream/vivado:fpga_cw310"
+           },
+           "memory_map_info": {
+               "file": "memories.mmi",
+               "build_target": "//hw/bitstream/vivado:fpga_cw310",
+               "memories": ["otp", "rom"]
+           }
+       }
+   }
+}"""
+
 
 class TestBitstreamCache(unittest.TestCase):
 
@@ -17,13 +35,12 @@ def test_make_with_default(self):
         BitstreamCache.MakeWithDefaults()
 
     def test_get_from_cache(self):
-        BITSTREAM_ORIG = 'lowrisc_systems_chip_earlgrey_cw310_0.1.bit.orig'
-        BITSTREAM_SPLICE = 'lowrisc_systems_chip_earlgrey_cw310_0.1.bit.splice'
+        MOCK_BITSTREAM = 'lowrisc_systems_chip_earlgrey_cw310_0.1.bit'
 
         MOCKED_OS_WALK_RETURN = [
             # os.walk() yields tuples of the form (root, dir, files).
             ('cache/abcd', [],
-             [BITSTREAM_ORIG, BITSTREAM_SPLICE, 'rom.mmi', 'otp.mmi']),
+             [MOCK_BITSTREAM, 'manifest.json', 'memories.mmi']),
         ]
         os.walk = unittest.mock.MagicMock(name='os.walk',
                                           return_value=MOCKED_OS_WALK_RETURN)
@@ -34,31 +51,30 @@ def test_get_from_cache(self):
                                offline=True)
         cache.InitRepository = unittest.mock.MagicMock(name='method')
 
-        (cached_files, manifest_path) = cache.GetFromCache('abcd')
+        m = unittest.mock.mock_open(read_data=MOCK_MANIFEST)
+        with unittest.mock.patch('bitstreams_workspace.open', m):
+            (manifest, manifest_path) = cache.GetFromCache('abcd')
+        m.assert_called_once_with('cache/abcd/manifest.json', 'r')
 
         # This is more of an implementation detail, but it verifies that we hit
         # the mocked `os.walk` function as expected.
         os.walk.assert_called_once_with('cache/abcd')
 
+        self.maxDiff = None
         self.assertEqual(
-            dict(cached_files), {
-                "schema_version": 2,
+            manifest, {
+                "schema_version": 3,
                 "designs": {
                     "chip_earlgrey_cw310": {
                         "build_id": "abcd",
                         "bitstream": {
-                            "file": BITSTREAM_ORIG,
+                            "file": MOCK_BITSTREAM,
                             "build_target": "//hw/bitstream/vivado:fpga_cw310",
                         },
                         "memory_map_info": {
-                            "otp": {
-                                "file": "otp.mmi",
-                                "build_target": "//hw/bitstream/vivado:fpga_cw310",
-                            },
-                            "rom": {
-                                "file": "rom.mmi",
-                                "build_target": "//hw/bitstream/vivado:fpga_cw310",
-                            },
+                            "file": "memories.mmi",
+                            "build_target": "//hw/bitstream/vivado:fpga_cw310",
+                            "memories": ["otp", "rom"],
                         },
                     },
                 },
@@ -73,7 +89,7 @@ def test_write_build_file(self):
         MOCKED_OS_WALK_RETURN = [
             # os.walk() yields tuples of the form (root, dir, files).
             ('cache/abcd', [],
-             [BITSTREAM_ORIG, BITSTREAM_SPLICE, 'rom.mmi', 'otp.mmi']),
+             [BITSTREAM_ORIG, BITSTREAM_SPLICE, 'manifest.json', 'memories.mmi']),
         ]
         os.walk = unittest.mock.MagicMock(name='os.walk',
                                           return_value=MOCKED_OS_WALK_RETURN)
@@ -86,10 +102,25 @@ def test_write_build_file(self):
                                '/tmp/cache/opentitan-bitstreams',
                                'latest.txt',
                                offline=True)
-        cache.InitRepository = unittest.mock.MagicMock(name='method')
-        cache._WriteSubstituteManifest = unittest.mock.MagicMock(name='method')
-
-        bazel_string = cache._ConstructBazelString('BUILD.mock', 'abcd')
+        manifest = {
+            "schema_version": 3,
+            "designs": {
+                "chip_earlgrey_cw310": {
+                    "build_id": "abcd",
+                    "bitstream": {
+                        "file": "lowrisc_systems_chip_earlgrey_cw310_0.1.bit.orig",
+                        "build_target": "//hw/bitstream/vivado:fpga_cw310",
+                    },
+                    "memory_map_info": {
+                        "file": "memories.mmi",
+                        "build_target": "//hw/bitstream/vivado:fpga_cw310",
+                        "memories": ["otp", "rom"],
+                    },
+                },
+            },
+        }
+        manifest_path = "cache/abcd/substitute_manifest.json"
+        bazel_string = cache._ConstructBazelString('BUILD.mock', 'abcd', manifest, manifest_path)
         self.maxDiff = None
         self.assertEqual(
             bazel_string, '''# This file was autogenerated. Do not edit!
@@ -106,13 +137,8 @@ def test_write_build_file(self):
 )
 
 filegroup(
-    name = "chip_earlgrey_cw310_otp_mmi",
-    srcs = ["cache/abcd/otp.mmi"],
-)
-
-filegroup(
-    name = "chip_earlgrey_cw310_rom_mmi",
-    srcs = ["cache/abcd/rom.mmi"],
+    name = "chip_earlgrey_cw310_mmi",
+    srcs = ["cache/abcd/memories.mmi"],
 )
 
 filegroup(
@@ -126,13 +152,8 @@ def test_write_build_file(self):
 )
 
 alias(
-    name = "chip_earlgrey_cw310_hyperdebug_rom_mmi",
-    actual = "@//hw/bitstream/vivado:rom_mmi_hyp",
-)
-
-alias(
-    name = "chip_earlgrey_cw310_hyperdebug_otp_mmi",
-    actual = "@//hw/bitstream/vivado:otp_mmi_hyp",
+    name = "chip_earlgrey_cw310_hyperdebug_mmi",
+    actual = "@//hw/bitstream/vivado:cw310_hyperdebug_mmi",
 )
 
 alias(
@@ -141,20 +162,11 @@ def test_write_build_file(self):
 )
 
 alias(
-    name = "chip_earlgrey_cw340_rom_mmi",
-    actual = "@//hw/bitstream/vivado:fpga_cw340_rom_mmi",
-)
-
-alias(
-    name = "chip_earlgrey_cw340_otp_mmi",
-    actual = "@//hw/bitstream/vivado:fpga_cw340_otp_mmi",
+    name = "chip_earlgrey_cw340_mmi",
+    actual = "@//hw/bitstream/vivado:cw340_mmi",
 )
 ''')
 
-        # This is more of an implementation detail, but it verifies that we hit
-        # the mocked `os.walk` function as expected.
-        os.walk.assert_called_once_with('cache/abcd')
-
 
 class TestFetchAvailableBitstreams(unittest.TestCase):
     """
@@ -201,7 +213,7 @@ def test_fetch_available_bitstreams_single_page(self):
             name='cache.Get',
             side_effect=MOCKED_GET_RETURN,
         )
-        self.cache.GetBitstreamsAvailable(refresh=True)
+        self.cache.GetBitstreamsAvailable(branch="earlgrey_1.0.0", refresh=True)
         self.assertEqual(self.cache.Get.call_count, 2)
         self.assertEqual(self.cache.available, {
             "0": "master/bitstream-0.tar.gz",
@@ -257,7 +269,7 @@ def test_fetch_available_bitstreams_with_pagination(self):
             name='cache.Get',
             side_effect=MOCKED_GET_RETURN,
         )
-        self.cache.GetBitstreamsAvailable(refresh=True)
+        self.cache.GetBitstreamsAvailable(branch="earlgrey_1.0.0", refresh=True)
         self.assertEqual(self.cache.Get.call_count, 3)
         self.assertEqual(
             self.cache.available, {
diff --git a/rules/scripts/clang_format.template.sh b/rules/scripts/clang_format.template.sh
index 286db050401c2..5b6a4265197fa 100644
--- a/rules/scripts/clang_format.template.sh
+++ b/rules/scripts/clang_format.template.sh
@@ -16,7 +16,7 @@ elif [[ ! -z "${BUILD_WORKSPACE_DIRECTORY+is_set}" ]]; then
     cd ${BUILD_WORKSPACE_DIRECTORY} || exit 1
 else
     echo "Neither WORKSPACE nor BUILD_WORKSPACE_DIRECTORY were set."
-    echo "If this is a test rule, add 'workspace = \"//:WORKSPACE\"' to your rule."
+    echo "If this is a test rule, add 'workspace = \"//:MODULE.bazel\"' to your rule."
     exit 1
 fi
 
diff --git a/rules/scripts/copy_files.template.sh b/rules/scripts/copy_files.template.sh
new file mode 100644
index 0000000000000..c81afea02d8cd
--- /dev/null
+++ b/rules/scripts/copy_files.template.sh
@@ -0,0 +1,35 @@
+#!/usr/bin/env bash
+#
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+DEST="__DEST__"
+FILES=(__FILES__)
+
+# Change directory into the root of the project.
+if [[ ! -z "${BUILD_WORKSPACE_DIRECTORY+is_set}" ]]; then
+    cd ${BUILD_WORKSPACE_DIRECTORY} || exit 1
+else
+    echo "BUILD_WORKSPACE_DIRECTORY was not set."
+    echo "This rule should be executable and invoked with 'bazel run'."
+    exit 1
+fi
+
+# Since we may be building resources in an externally attached workspace,
+# determine the real path to that workspace.
+if [[ -z "${__WORKSPACE__+is_set}" ]]; then
+    echo "__WORKSPACE__ was not set."
+    exit 1
+fi
+
+WORKSPACE="$(realpath "${__WORKSPACE__}")"
+if [[ ! -d "$WORKSPACE" ]]; then
+    echo "$WORKSPACE isn't a directory."
+    exit 1
+fi
+
+# Copy the files from the source (e.g. bazel-out) to the destination.
+for f in "${FILES[@]}"; do
+  cp --no-preserve=mode "$f" "$WORKSPACE/$DEST"
+done
diff --git a/rules/scripts/qemu_test.sh b/rules/scripts/qemu_test.sh
new file mode 100644
index 0000000000000..d09532d395b0c
--- /dev/null
+++ b/rules/scripts/qemu_test.sh
@@ -0,0 +1,75 @@
+#!/bin/bash
+#
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# WARNING This is a template where some x strings will be expanded by
+# the rules in qemu.bzl.
+set -e
+
+qemu=__qemu__
+qemu_args=( __qemu_args__  )
+test_harness="__test_harness__"
+otp="__otp__"
+flash="__flash__"
+test_cmd=( __test_cmd__ )
+args=( __args__ )
+
+mutable_flash="flash_img.bin"
+mutable_otp="otp_img.raw"
+
+test_args=( "$@" )
+qemu_test_args=()
+harness_test_args=()
+# Intercept all test args of the form --qemu-arg=X
+# and pass X to qemu directly.
+# For convenience, a variant with "--qemu-args=X Y Z" is also
+# supported when all space-separated substrings of the arguments
+# will be expanded to different QEMU arguments.
+# Everything else will be passed as-in to the test harness.
+for this_arg in "${test_args[@]}"; do
+    if [[ $this_arg == --qemu-arg=* ]]; then
+        qemu_test_args+=( "${this_arg#--qemu-arg=}" )
+    elif [[ $this_arg == --qemu-args=* ]]; then
+        # See https://stackoverflow.com/a/45201229
+        # and https://unix.stackexchange.com/a/519917
+        readarray -t -d ' ' a < <(printf '%s' "${this_arg#--qemu-args=}")
+        qemu_test_args+=( "${a[@]}" )
+    else
+        harness_test_args+=( "$this_arg" )
+    fi
+done
+
+qemu_pid=""
+
+cleanup() {
+    set +e
+    echo "Stopping QEMU: $qemu_pid"
+    # Ask nicely QEMU to stop and then kill it after one second.
+    ( sleep 1 ; echo "Killing QEMU"; kill -KILL "$qemu_pid" ) &
+    kill "$qemu_pid"
+    wait "$qemu_pid"
+
+    rm -f "${mutable_otp}" "${mutable_flash}"
+    rm -f qemu-monitor qemu.log
+}
+trap cleanup EXIT
+
+# QEMU requires mutable flash and OTP files but Bazel only provides RO
+# files so we have to create copies unique to this test run.
+cp "${otp}" "${mutable_otp}" && chmod +w "${mutable_otp}"
+if [ -n "${flash}" ]; then
+    cp "${flash}" "${mutable_flash}" && chmod +w "${mutable_flash}"
+fi
+
+# QEMU disconnects from `stdout` when it daemonizes so we need to stream
+# the log through a pipe:
+mkfifo qemu.log && cat qemu.log &
+
+echo "Starting QEMU: ${qemu} ${qemu_test_args[*]} ${qemu_args[*]}"
+"${qemu}" "${qemu_test_args[@]}" "${qemu_args[@]}"
+qemu_pid=$!
+
+echo "Invoking test: ${test_harness} ${args[*]} ${harness_test_args[*]} ${test_cmd[*]}"
+"${test_harness}" "${args[@]}" "${harness_test_args[@]}" "${test_cmd[@]}"
diff --git a/rules/scripts/rustfmt.template.sh b/rules/scripts/rustfmt.template.sh
index 24bbc882f2581..789288df6e36c 100644
--- a/rules/scripts/rustfmt.template.sh
+++ b/rules/scripts/rustfmt.template.sh
@@ -15,7 +15,7 @@ elif [[ ! -z "${BUILD_WORKSPACE_DIRECTORY+is_set}" ]]; then
     cd ${BUILD_WORKSPACE_DIRECTORY} || exit 1
 else
     echo "Neither WORKSPACE nor BUILD_WORKSPACE_DIRECTORY were set."
-    echo "If this is a test rule, add 'workspace = \"//:WORKSPACE\"' to your rule."
+    echo "If this is a test rule, add 'workspace = \"//:MODULE.bazel\"' to your rule."
     exit 1
 fi
 
diff --git a/rules/scripts/sival_signature_test.template.sh b/rules/scripts/sival_signature_test.template.sh
new file mode 100644
index 0000000000000..6ca9655a245cf
--- /dev/null
+++ b/rules/scripts/sival_signature_test.template.sh
@@ -0,0 +1,74 @@
+#!/usr/bin/env bash
+#
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+set -o pipefail
+
+FILES_TO_CHECK=(@FILES@)
+
+IS_NEGATIVE_TEST=@IS_NEGATIVE_TEST@
+OPENTITANTOOL=@OPENTITANTOOL@
+VERIFY_ARGS=(@VERIFY_ARGS@)
+ECDSA_KEY=@ECDSA_KEY@
+SPX_KEY=@SPX_KEY@
+KEY_ARGS=()
+RESULT_STATUS=0
+
+echo "___Starting signature verification & manifest key verification___"
+
+# If ECDSA key is provided, include it in the manifest update
+if [[ ! -z "$ECDSA_KEY" ]]; then
+  KEY_ARGS+=("--ecdsa-key=${ECDSA_KEY}")
+fi
+
+# If SPX key is provided, include it in the manifest update
+if [[ ! -z "$SPX_KEY" ]]; then
+  KEY_ARGS+=("--spx-key=${SPX_KEY}")
+fi
+
+for file in "${FILES_TO_CHECK[@]}"
+do
+  # TEST 1: ECDSA key and/or SPX key integrity
+  # If there are keys to verify, perform manifest update
+  if [[ ${#KEY_ARGS[@]} -ne 0 ]]; then
+    echo -n "Checking key material in ${file}..."
+        ${OPENTITANTOOL}  --rcfile= image manifest update \
+          --private-keys-sign=false \
+          "${KEY_ARGS[@]}" \
+          --output=/tmp/manifest_test_key_verify.$$ \
+          ${file}
+
+    cmp ${file} /tmp/manifest_test_key_verify.$$
+
+    if [[ $? -eq 0 ]]; then
+      echo "ok."
+    else
+      echo "failed."
+      RESULT_STATUS=1
+    fi
+  fi
+
+  echo -n "Checking signature of ${file}..."
+
+  # TEST 2: Signature verification
+  ${OPENTITANTOOL} --rcfile= image manifest verify "${VERIFY_ARGS[@]}" ${file}
+
+  if [[ $? -eq 0 ]]; then
+    echo "ok."
+  else
+    echo "failed."
+    RESULT_STATUS=1
+  fi
+done
+
+# If this is a negative test, invert the result status
+if [[ "$IS_NEGATIVE_TEST" == "True" ]]; then
+  echo "Negative test, inverting result status."
+  RESULT_STATUS=$((1 - $RESULT_STATUS))
+fi
+
+echo "Status: $RESULT_STATUS"
+
+exit $RESULT_STATUS
diff --git a/rules/scripts/symlink_tree.py b/rules/scripts/symlink_tree.py
deleted file mode 100755
index aee1ace57a31d..0000000000000
--- a/rules/scripts/symlink_tree.py
+++ /dev/null
@@ -1,82 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import argparse
-import os
-import os.path
-import stat
-import sys
-
-parser = argparse.ArgumentParser(description='Symlink Tree Creator')
-parser.add_argument('SRC', help='Source directory')
-parser.add_argument('DST',
-                    help='Destination directory (location of symlink tree)')
-
-
-class SymlinkTree(object):
-
-    def __init__(self, src):
-        if not os.path.exists(src):
-            raise FileNotFoundError(src)
-        self.src = src
-        # Inventory of original paths to destination-relative paths
-        self.inventory = {}
-        # Extra symlinks to create (e.g. directory symlinks)
-        self.extra_links = {}
-
-    def _symlink(self, src, dst):
-        if os.path.lexists(dst):
-            os.remove(dst)
-        os.symlink(src, dst)
-
-    def link(self, dst):
-        os.makedirs(dst, exist_ok=True)
-        for (root, dirs, files) in os.walk(self.src):
-            rel = os.path.relpath(root, self.src)
-            real = os.path.realpath(root)
-            dpath = os.path.join(dst, rel)
-
-            self.inventory[real] = rel
-            # Make a subdir for this root within the src walk
-            os.makedirs(dpath, exist_ok=True)
-
-            # Look for any dir symlinks within the dirs and remember them.
-            for d in dirs:
-                orig = os.path.join(root, d)
-                new = os.path.join(rel, d)
-                st = os.stat(orig, follow_symlinks=False)
-                if stat.S_ISLNK(st.st_mode):
-                    self.extra_links[new] = os.path.realpath(orig)
-
-            # For each file, create a symlink to the original
-            for f in files:
-                orig = os.path.join(real, f)
-                new = os.path.join(dpath, f)
-                self._symlink(orig, new)
-
-        # Now, for "directory" symlinks, resolve and create new links
-        for (new, orig) in self.extra_links.items():
-            if orig in self.inventory:
-                # Symlink points within the src tree and should go to a newly
-                # created directory.
-                orig = os.path.realpath(os.path.join(dst,
-                                                     self.inventory[orig]))
-                new = os.path.join(dst, new)
-                self._symlink(orig, new)
-            else:
-                # Symlink points elsewhere and should be linked directly.
-                new = os.path.realpath(new)
-                self._symlink(orig, new)
-
-
-def main():
-    args = parser.parse_args()
-    tree = SymlinkTree(args.SRC)
-    tree.link(args.DST)
-    return 0
-
-
-if __name__ == '__main__':
-    sys.exit(main())
diff --git a/rules/signing.bzl b/rules/signing.bzl
index fc4201ef0da09..ac809f0084db2 100644
--- a/rules/signing.bzl
+++ b/rules/signing.bzl
@@ -10,22 +10,7 @@ load("//rules:host.bzl", "host_tools_transition")
 
 PreSigningBinaryInfo = provider(fields = ["files"])
 SigningToolInfo = provider(fields = ["tool", "data", "env", "location"])
-KeySetInfo = provider(fields = ["keys", "selected_key", "profile", "sign", "tool"])
-
-KeyInfo = provider(
-    """Key Information.
-
-    Used to capture all required information about a key.
-    """,
-    fields = {
-        "id": "Identifier used by the consumers of the provider to determine the key algorithm.",
-        "config": "The config of the key. Specific to the key algorithm.",
-        "method": "Mechanism used to access the key. Can be local or hsmtool.",
-        "pub_key": "Public key `file`.",
-        "private_key": "Private key `file`. May be None when method is set to hsmtool.",
-        "type": "The type of the key. Can be TestKey, DevKey or ProdKey.",
-    },
-)
+KeySetInfo = provider(fields = ["keys", "config", "selected_key", "profile", "sign", "tool"])
 
 def _label_str(label):
     return "@{}//{}:{}".format(label.workspace_name, label.package, label.name)
@@ -52,18 +37,17 @@ def key_from_dict(key, attr_name):
         ksi = key[KeySetInfo]
         if ksi.selected_key:
             name = ksi.selected_key
+        elif name.isdigit():
+            # If the nickname is a number, we assume it is the index of the key in
+            # the dictionary.
+            name = int(name)
+            name = ksi.keys.keys()[name]
         return struct(
             label = key,
             file = ksi.keys[name],
             name = name,
-        )
-    elif KeyInfo in key:
-        key_info = key[KeyInfo]
-        return struct(
-            label = key,
-            file = None,
-            name = name,
-            info = key_info,
+            info = None,
+            config = ksi.config[name],
         )
     elif DefaultInfo in key:
         key_file = key[DefaultInfo].files.to_list()
@@ -73,6 +57,7 @@ def key_from_dict(key, attr_name):
             label = key,
             file = key_file[0],
             name = name,
+            config = {},
         )
     return None
 
@@ -163,23 +148,7 @@ def _presigning_artifacts(ctx, opentitantool, src, manifest, ecdsa_key, rsa_key,
 
     ecdsa_or_rsa_args = []
     if ecdsa_key:
-        # Check if the provider is KeyInfo or KeySetInfo
-        info = getattr(ecdsa_key, "info", None)
         selected_ecdsa_key = getattr(ecdsa_key, "file", None)
-        if info:
-            # Provider is KeyInfo; get the key file.
-            if info.private_key:
-                selected_ecdsa_key = ecdsa_key.info.private_key
-            elif info.pub_key:
-                selected_ecdsa_key = ecdsa_key.info.pub_key
-            else:
-                fail("Expected an ECDSA key with a private_key or pub_key attributes.")
-        elif selected_ecdsa_key:
-            # Provider is KeySetInfo; we already have the key file.
-            pass
-        else:
-            fail("Expected either KeyInfo or KeySetInfo; got neither")
-
         ecdsa_or_rsa_args.append("--ecdsa-key={}".format(selected_ecdsa_key.path))
         inputs.append(selected_ecdsa_key)
     elif rsa_key:
@@ -187,9 +156,12 @@ def _presigning_artifacts(ctx, opentitantool, src, manifest, ecdsa_key, rsa_key,
         inputs.append(rsa_key.file)
 
     spx_args = []
+    spx_domain = None
     if spx_key:
-        spx_args.append("--spx-key={}".format(spx_key.file.path))
-        inputs.append(spx_key.file)
+        spx_domain = spx_key.config.get("domain", "Pure")
+        selected_spx_key = getattr(spx_key, "file", None)
+        spx_args.append("--spx-key={}".format(selected_spx_key.path))
+        inputs.append(selected_spx_key)
     ctx.actions.run(
         outputs = [pre],
         inputs = inputs,
@@ -200,6 +172,7 @@ def _presigning_artifacts(ctx, opentitantool, src, manifest, ecdsa_key, rsa_key,
             "manifest",
             "update",
             "--manifest={}".format(manifest.path),
+            "--domain={}".format(spx_domain),
             "--output={}".format(pre.path),
             src.path,
         ] + ecdsa_or_rsa_args + spx_args,
@@ -248,23 +221,44 @@ def _presigning_artifacts(ctx, opentitantool, src, manifest, ecdsa_key, rsa_key,
     # Compute message to be signed with SPX+.
     spxmsg = None
     if spx_key:
-        spxmsg = ctx.actions.declare_file("{}.spx-message".format(basename))
-        ctx.actions.run(
-            outputs = [spxmsg],
-            inputs = [pre],
-            arguments = [
-                "--rcfile=",
-                "--quiet",
-                "image",
-                "spx-message",
-                "--output={}".format(spxmsg.path),
-                pre.path,
-            ],
-            executable = opentitantool,
-            mnemonic = "PreSigningSpxMessage",
-        )
-        # TODO(cfrantz): After adding SPX support to hsmtool, append an appropriate
-        # signing directive here.
+        if spx_domain.lower() == "prehashedsha256":
+            spxmsg = digest
+            rev = spx_key.config.get("byte-reversal-bug", "false")
+            fmt = "Sha256HashReversed" if rev == "true" else "Sha256Hash"
+            signing_directives.append(struct(
+                command = "spx-sign",
+                id = None,
+                label = spx_key.name,
+                format = fmt,
+                domain = spx_domain,
+                output = "{}.spx_sig".format(basename),
+                input = "{}.digest".format(basename),
+            ))
+        else:
+            spxmsg = ctx.actions.declare_file("{}.spx-message".format(basename))
+            ctx.actions.run(
+                outputs = [spxmsg],
+                inputs = [pre],
+                arguments = [
+                    "--rcfile=",
+                    "--quiet",
+                    "image",
+                    "spx-message",
+                    "--output={}".format(spxmsg.path),
+                    pre.path,
+                ],
+                executable = opentitantool,
+                mnemonic = "PreSigningSpxMessage",
+            )
+            signing_directives.append(struct(
+                command = "spx-sign",
+                id = None,
+                label = spx_key.name,
+                format = "PlainText",
+                domain = spx_domain,
+                output = "{}.spx_sig".format(basename),
+                input = "{}.spx-message".format(basename),
+            ))
 
     return struct(pre = pre, digest = digest, spxmsg = spxmsg, script = signing_directives)
 
@@ -294,8 +288,8 @@ def _local_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key =
         key_command = "rsa"
     elif ecdsa_key:
         output_sig = ctx.actions.declare_file(paths.replace_extension(digest.basename, ".ecdsa_sig"))
-        inputs.append(ecdsa_key.info.private_key)
-        key_path = ecdsa_key.info.private_key.path
+        inputs.append(ecdsa_key.file)
+        key_path = ecdsa_key.file.path
         key_command = "ecdsa"
     else:
         fail("Expected an ECDSA or RSA key")
@@ -317,19 +311,24 @@ def _local_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key =
     )
 
     spx_sig = None
-    if spxmsg and spx_key.file:
+    if spxmsg and spx_key:
+        private_key = spx_key.file
         spx_sig = ctx.actions.declare_file(paths.replace_extension(spxmsg.basename, ".spx_sig"))
+        domain = spx_key.config.get("domain", "Pure")
+        rev = spx_key.config.get("byte-reversal-bug", "false")
         ctx.actions.run(
             outputs = [spx_sig],
-            inputs = [spxmsg, spx_key.file],
+            inputs = [spxmsg, private_key],
             arguments = [
                 "--rcfile=",
                 "--quiet",
                 "spx",
                 "sign",
+                "--spx-hash-reversal-bug={}".format(rev),
+                "--domain={}".format(domain),
                 "--output={}".format(spx_sig.path),
                 spxmsg.path,
-                spx_key.file.path,
+                private_key.path,
             ],
             executable = tool.tool,
             mnemonic = "LocalSpxSign",
@@ -343,7 +342,7 @@ def _local_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key =
         fail("Expected an ECDSA or RSA key")
 
 def _hsmtool_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key = None, profile = None):
-    """Sign a digest with a local on-disk RSA private key.
+    """Sign a digest with a token-provided private key.
 
     Args:
         ctx: The rule context.
@@ -357,8 +356,6 @@ def _hsmtool_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key
     Returns:
         file, file, file: The RSA and SPX signature files.
     """
-    if spxmsg or spx_key:
-        fail("hsmtool currently does not support SPX+ signing")
     if not profile:
         fail("Missing the `hsmtool` profile")
 
@@ -366,11 +363,13 @@ def _hsmtool_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key
         cmd = "rsa"
         sig = ctx.actions.declare_file(paths.replace_extension(digest.basename, ".rsa-sig"))
         label = rsa_key.name
+        mnemonic = "HsmtoolRsaSign"
         retval = (None, sig, None)
     elif ecdsa_key:
         cmd = "ecdsa"
         sig = ctx.actions.declare_file(paths.replace_extension(digest.basename, ".ecdsa-sig"))
         label = ecdsa_key.name
+        mnemonic = "HsmtoolEcdsaSign"
         retval = (sig, None, None)
     else:
         fail("Expected either rsa_key or ecdsa_key; got neither")
@@ -395,9 +394,53 @@ def _hsmtool_sign(ctx, tool, digest, ecdsa_key, rsa_key, spxmsg = None, spx_key
             "no-sandbox": "",
         },
         env = tool.env,
-        mnemonic = "HsmtoolRsaSign",
+        mnemonic = mnemonic,
     )
-    return retval
+
+    spx_sig = None
+    if spxmsg and spx_key:
+        domain = spx_key.config.get("domain", "Pure")
+        if domain.lower() == "prehashedsha256":
+            rev = spx_key.config.get("byte-reversal-bug", "false")
+            fmt = "sha256-hash-reversed" if rev == "true" else "sha256-hash"
+            args = [
+                "--little-endian",
+                "--format={}".format(fmt),
+                "--domain={}".format(domain),
+            ]
+        else:
+            args = [
+                "--format=plain-text",
+                "--domain={}".format(domain),
+            ]
+        spx_sig = ctx.actions.declare_file(paths.replace_extension(spxmsg.basename, ".spx-sig"))
+        ctx.actions.run(
+            outputs = [spx_sig],
+            inputs = [spxmsg, tool.tool] + tool.data,
+            arguments = [
+                "--quiet",
+                "--lockfile=/tmp/hsmtool.lock",
+                "--profile={}".format(profile),
+                "spx",
+                "sign",
+                "--label={}".format(spx_key.name),
+                "--output={}".format(spx_sig.path),
+                spxmsg.path,
+            ] + args,
+            executable = tool.tool,
+            execution_requirements = {
+                "no-sandbox": "",
+            },
+            env = tool.env,
+            mnemonic = "HsmtoolSpxSign",
+        )
+
+    if rsa_key:
+        return None, sig, spx_sig
+    elif ecdsa_key:
+        return sig, None, spx_sig
+    else:
+        fail("Expected an ECDSA or RSA key")
 
 def _post_signing_attach(ctx, opentitantool, pre, ecdsa_sig, rsa_sig, spx_sig):
     """Attach signatures to an unsigned binary.
@@ -638,9 +681,6 @@ def _clear_if_none_key(key_attr):
 
     key, _ = key_attr.items()[0]
 
-    if KeyInfo in key:
-        return key_attr
-
     if key.label.name == "none_key":
         return None
 
@@ -794,11 +834,22 @@ signing_tool = rule(
 
 def _keyset(ctx):
     keys = {}
+    config = {}
     for k, v in ctx.attr.keys.items():
         keyfile = k.files.to_list()
+
+        # Parse the value (nickname and parameters) into a param dictionary
+        # so we keep the per-key configuration parameters in the KeySetInfo
+        # provider `config` field.
+        param = v.split(":")
+        if "=" not in param[0]:
+            param[0] = "name=" + param[0]
+        param = [p.split("=", 1) for p in param]
+        param = {p[0]: p[1] for p in param}
         if len(keyfile) != 1:
             fail("keyset key labels must resolve to exactly one file.")
-        keys[v] = keyfile[0]
+        keys[param["name"]] = keyfile[0]
+        config[param["name"]] = param
 
     tool = ctx.attr.tool[SigningToolInfo]
     if tool.location == "local" and ctx.attr.profile != "local":
@@ -814,7 +865,10 @@ def _keyset(ctx):
         sign = _local_sign
     else:
         sign = _hsmtool_sign
-    return [KeySetInfo(keys = keys, selected_key = selected_key, profile = ctx.attr.profile, sign = sign, tool = tool)]
+    return [
+        KeySetInfo(keys = keys, config = config, selected_key = selected_key, profile = ctx.attr.profile, sign = sign, tool = tool),
+        DefaultInfo(files = depset(keys.values()), data_runfiles = ctx.runfiles(files = keys.values())),
+    ]
 
 keyset = rule(
     implementation = _keyset,
@@ -823,7 +877,7 @@ keyset = rule(
         "keys": attr.label_keyed_string_dict(
             allow_files = True,
             mandatory = True,
-            doc = "A mapping of key files to key names.  When a key file is a public key whose private component is held in an HSM, the name should be the same as the HSM label of that key.",
+            doc = "A mapping of key files to key names.  When a key file is a public key whose private component is held in an HSM, the name should be the same as the HSM label of that key.  Additional key parameters may be specified with colon-separated key=value pairs.",
         ),
         "profile": attr.string(
             mandatory = True,
@@ -835,3 +889,80 @@ keyset = rule(
         ),
     },
 )
+
+def _signature_test_impl(ctx):
+    keys = []
+    tc = ctx.toolchains[LOCALTOOLS_TOOLCHAIN]
+    script = ctx.actions.declare_file("{}.bash".format(ctx.label.name))
+    verify_args = ""
+    ecdsa_key = key_from_dict(ctx.attr.ecdsa_key, "ecdsa_key")
+    spx_key = key_from_dict(ctx.attr.spx_key, "spx_key")
+
+    selected_ecdsa_key_path = ""
+    selected_spx_key_path = ""
+
+    if ctx.attr.spx_domain != "":
+        verify_args = "--spx --domain " + ctx.attr.spx_domain
+    if ecdsa_key:
+        selected_ecdsa_key_path = ecdsa_key.file.path
+        keys.append(ecdsa_key.file)
+    if spx_key:
+        selected_spx_key_path = spx_key.file.path
+        keys.append(spx_key.file)
+
+    files = [f.short_path for f in ctx.files.srcs]
+    ctx.actions.expand_template(
+        template = ctx.file._script,
+        output = script,
+        substitutions = {
+            "@FILES@": " ".join(files),
+            "@OPENTITANTOOL@": tc.tools.opentitantool.executable.short_path,
+            "@VERIFY_ARGS@": verify_args,
+            "@ECDSA_KEY@": selected_ecdsa_key_path,
+            "@SPX_KEY@": selected_spx_key_path,
+            "@IS_NEGATIVE_TEST@": str(ctx.attr.negative_test),
+        },
+        is_executable = True,
+    )
+
+    return [
+        DefaultInfo(
+            runfiles = ctx.runfiles(files = ctx.files.srcs + keys + [tc.tools.opentitantool.executable]),
+            executable = script,
+        ),
+    ]
+
+signature_test = rule(
+    implementation = _signature_test_impl,
+    attrs = {
+        "srcs": attr.label_list(allow_files = True, doc = "help string"),
+        "ecdsa_key": attr.label_keyed_string_dict(
+            providers = [[KeySetInfo], [DefaultInfo]],
+            allow_files = True,
+            doc = "ECDSA public key to validate this image",
+        ),
+        "spx_key": attr.label_keyed_string_dict(
+            providers = [[KeySetInfo], [DefaultInfo]],
+            allow_files = True,
+            doc = "SPX public key to validate this image",
+        ),
+        "negative_test": attr.bool(
+            default = False,
+            doc = "Whether this is a negative test case.",
+        ),
+        "spx_domain": attr.string(
+            default = "",
+            values = ["", "Pure", "PrehashedSha256"],
+            doc = "The SPHINCS+ domain to use for signing.",
+        ),
+        "_script": attr.label(
+            default = "//rules/scripts:sival_signature_test.template.sh",
+            doc = "The shell script to execute for the test.",
+            allow_single_file = True,
+            executable = True,
+            cfg = "exec",
+        ),
+    },
+    toolchains = [LOCALTOOLS_TOOLCHAIN],
+    test = True,
+)
diff --git a/rules/splice.bzl b/rules/splice.bzl
index 0bc4fbdbf8ad3..43ed796e0c9a6 100644
--- a/rules/splice.bzl
+++ b/rules/splice.bzl
@@ -45,7 +45,7 @@ def _bitstream_splice_impl(ctx):
     updatemem_args.add("--meminfo", ctx.file.meminfo)
     updatemem_args.add("--data", update)
     updatemem_args.add("--bit", tmpsrc)
-    updatemem_args.add("--proc", "dummy")
+    updatemem_args.add("--proc", ctx.attr.instance)
     updatemem_args.add("--out", spliced)
     if ctx.attr.debug:
         updatemem_args.add("--debug")
@@ -105,6 +105,7 @@ bitstream_splice_ = rule(
         "meminfo": attr.label(allow_single_file = True, doc = "Memory layout info file (an .mmi file)"),
         "src": attr.label(allow_single_file = True, doc = "The bitstream to splice"),
         "data": attr.label(allow_single_file = True, doc = "The memory image to splice into the bitstream"),
+        "instance": attr.string(mandatory = True, doc = "The instance ID for the memory to splice into the bitstream"),
         "swap_nybbles": attr.bool(default = True, doc = "Swap nybbles while preparing the memory image"),
         "debug": attr.bool(default = False, doc = "Emit debug info while updating"),
         "update_usr_access": attr.bool(default = False, doc = "Update the USR_ACCESS value of the bitstream, breaks hermeticity"),
diff --git a/rules/tests/BUILD b/rules/tests/BUILD
index c639665e6108a..1738851d632de 100644
--- a/rules/tests/BUILD
+++ b/rules/tests/BUILD
@@ -4,7 +4,41 @@
 
 load("//rules/tests:const_unittest.bzl", "const_test_suite")
 load("//rules/tests:otp_unittest.bzl", "otp_test_suite")
+load("//rules:signing.bzl", "signature_test")
 
 const_test_suite()
 
 otp_test_suite()
+
+signature_test(
+    name = "corrupt_signature_test",
+    srcs = [
+        "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_corrupted_fpga_cw310_rom_with_fake_keys.prod_key_0.signed.bin",
+    ],
+    negative_test = True,
+)
+
+signature_test(
+    name = "wrong_ecdsa_key_test",
+    srcs = ["//sw/device/silicon_creator/rom_ext:signed_spx_binaries"],
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "dev_key_0"},
+    negative_test = True,
+)
+
+signature_test(
+    name = "wrong_spx_key_test",
+    srcs = ["//sw/device/silicon_creator/rom_ext:signed_spx_binaries"],
+    negative_test = True,
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "dev_key_0"},
+)
+
+signature_test(
+    name = "wrong_domain_signature_test",
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext:signed_spx_binaries",
+    ],
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+    negative_test = True,
+    spx_domain = "PrehashedSha256",  # "Pure", "PrehashedSha256"
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+)
diff --git a/rules/tock.bzl b/rules/tock.bzl
index d9e594f7039cd..a1aa1ec7e1386 100644
--- a/rules/tock.bzl
+++ b/rules/tock.bzl
@@ -5,6 +5,7 @@
 """Rules for assembling Tock binaries.
 """
 
+load("@rules_cc//cc:action_names.bzl", "OBJ_COPY_ACTION_NAME")
 load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
 load(
     "//rules:rv.bzl",
@@ -12,7 +13,6 @@ load(
     _OPENTITAN_CPU = "OPENTITAN_CPU",
     _OPENTITAN_PLATFORM = "OPENTITAN_PLATFORM",
 )
-load("@tockloader_deps//:requirements.bzl", "entry_point")
 
 TockApplication = provider(
     fields = {
@@ -98,7 +98,17 @@ opt_mode = transition(
 )
 
 def _tock_image_impl(ctx):
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
+    feature_config = cc_common.configure_features(
+        ctx = ctx,
+        cc_toolchain = cc_toolchain,
+        requested_features = ctx.features,
+        unsupported_features = ctx.disabled_features,
+    )
+    objcopy = cc_common.get_tool_for_action(
+        feature_configuration = feature_config,
+        action_name = OBJ_COPY_ACTION_NAME,
+    )
 
     kernel_binary = ctx.actions.declare_file("{}_kernel.bin".format(ctx.attr.name))
     images = [ctx.actions.declare_file("{}0.bin".format(ctx.attr.name))]
@@ -111,7 +121,7 @@ def _tock_image_impl(ctx):
             ctx.file.kernel.path,
             kernel_binary.path,
         ],
-        executable = cc_toolchain.objcopy_executable,
+        executable = objcopy,
     )
 
     ctx.actions.run(
@@ -138,7 +148,8 @@ def _tock_image_impl(ctx):
 
         ctx.actions.run_shell(
             outputs = [output_image],
-            inputs = [input_image, tab, ctx.executable._tockloader],
+            inputs = [input_image, tab],
+            tools = [ctx.executable._tockloader],
             command = "\
               cp {} {} &&\
               chmod +rw {} &&\
@@ -182,13 +193,11 @@ tock_image = rv_rule(
         "debug": attr.bool(default = True, doc = "Tockloader debug output"),
         "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
         "_tockloader": attr.label(
-            default = entry_point(
-                pkg = "tockloader",
-                script = "tockloader",
-            ),
+            default = "//third_party/tock:tockloader",
             executable = True,
             cfg = "exec",
         ),
     },
+    fragments = ["cpp"],
     toolchains = ["@rules_cc//cc:toolchain_type"],
 )
diff --git a/rules/ujson.bzl b/rules/ujson.bzl
index e8b34bc455a3d..97f794d7ff89d 100644
--- a/rules/ujson.bzl
+++ b/rules/ujson.bzl
@@ -7,7 +7,7 @@ load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
 """Rust generation rules for `ujson`."""
 
 def _ujson_rust(ctx):
-    cc_toolchain = find_cc_toolchain(ctx).cc
+    cc_toolchain = find_cc_toolchain(ctx)
     module = ctx.actions.declare_file("{}.rs".format(ctx.label.name))
     ujson_lib = ctx.attr.ujson_lib[CcInfo].compilation_context.headers.to_list()
 
diff --git a/signing/BUILD b/signing/BUILD
index e68909fe7b8f4..110d2d9ca1917 100644
--- a/signing/BUILD
+++ b/signing/BUILD
@@ -2,6 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@bazel_skylib//rules:common_settings.bzl", "string_flag")
+
 package(default_visibility = ["//visibility:public"])
 
 label_flag(
@@ -9,6 +11,14 @@ label_flag(
     build_setting_default = "//signing/tokens:local",
 )
 
+# The appkey selects the keyset used for signing application (post-ROM_EXT)
+# code.  This should match the keys that are in the ownershp configuration
+# deployed into the chip.
+label_flag(
+    name = "appkey",
+    build_setting_default = "//sw/device/silicon_creator/rom_ext/sival/keys:keyset",
+)
+
 config_setting(
     name = "test_keys",
     flag_values = {
@@ -16,6 +26,54 @@ config_setting(
     },
 )
 
+# TODO(#24641): Simplify key selection after eliminating RSA keys.
+# The currently released ROM_EXT binary for ES silicon (version 0.4) supports
+# only RSA keys.  The next release will eliminate RSA keys in favor of ECDSA
+# keys.  In order to allow current users to continue to build RSA-signed
+# applications (e.g. tests), we default to an `owner_key_type` of RSA.  Ad-hoc
+# testing on ES DEV parts running the as-yet unreleased ROM_EXT (at the head
+# of this branch) can select ECDSA keys.
+#
+# Note that the FPGA targets always run the ROM_EXT from head, and always
+# select an ECDSA key regardless of the `owner_key_type` setting.
+#
+# This key-type selection will be removed when we finish converting to ECDSA
+# and eliminate RSA keys for application signing.
+string_flag(
+    name = "owner_key_type",
+    build_setting_default = "rsa",
+    values = [
+        "rsa",
+        "ecdsa",
+    ],
+)
+
+config_setting(
+    name = "owner_key_rsa",
+    flag_values = {":owner_key_type": "rsa"},
+)
+
+config_setting(
+    name = "owner_key_ecdsa",
+    flag_values = {":owner_key_type": "ecdsa"},
+)
+
+config_setting(
+    name = "test_keys_rsa",
+    flag_values = {
+        ":token": "//signing/tokens:local",
+        ":owner_key_type": "rsa",
+    },
+)
+
+config_setting(
+    name = "test_keys_ecdsa",
+    flag_values = {
+        ":token": "//signing/tokens:local",
+        ":owner_key_type": "ecdsa",
+    },
+)
+
 filegroup(
     name = "none_key",
     srcs = ["skip.bit"],
diff --git a/signing/README.md b/signing/README.md
index bf011c7a43ada..0b916f13a157b 100644
--- a/signing/README.md
+++ b/signing/README.md
@@ -2,7 +2,7 @@
 
 ## Configuration of NitroKeys
 
-> The following configuration only works in the `earlgrey_es_sival` branch.
+> The following configuration only works in the `earlgrey_1.0.0` branch.
 
 NitroKeys are a personal security token used to hold the signing keys for
 TEST and DEV devices.  NitroKeys can be used to sign tests and binaries for
@@ -13,7 +13,7 @@ NitroKey.  The profile is defined by the keyset you want to use for signing.
 The configuration should map the profile name to the specific token holding
 the private key material for the named keyset.
 
-For example, a configuration for `//sw/device/silicon_creator/rom/keys/real/rsa:keyset`
+For example, a configuration for `//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset`
 might look like the following:
 
 >Locate this file in $HOME/.config/hsmtool/profiles.json and set the file
@@ -21,8 +21,8 @@ mode to 600.
 
 ```json
 {
-  "earlgrey_a0": {
-    "token": "earlgrey_a0_000",
+  "earlgrey_a1_sival_root": {
+    "token": "earlgrey_a1_000",
     "user": "user",
     "pin": "xxxxxx"
   }
@@ -37,7 +37,7 @@ Once a profile configuration is in place, you can build binaries signed by
 the keyset by telling bazel that you want to use a token.
 
 In the example below, we instruct bazel to use a NitroKey as the token
-and to sign with the key specified by the `rsa_key` attribute of the target
+and to sign with the key specified by the `ecdsa_key` attribute of the target
 (or the target's `exec_env`).
 
 ```console
@@ -45,13 +45,13 @@ bazel build --//signing:token=//signing/tokens:nitrokey //label-of-target
 ```
 
 To sign with an alternate key, you can override the key label via the
-keyset in question.  For `silicon_creator` code, the keyset is
-`//sw/device/silicon_creator/rom/keys/real/rsa:keyset`.
+keyset in question.  For the `sival` sku, the keyset is
+`//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset`:
 
 ```console
 bazel build \
     --//signing:token=//signing/tokens:nitrokey \
-    --//sw/device/silicon_creator/rom/keys/real/rsa:keyset=earlgrey_a0_dev_0 \
+    --//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset=sv00-earlgrey-a1-root-ecdsa-test-0 \
     //label-of-target
 ```
 
@@ -68,8 +68,8 @@ mode to 600.
 
 ```json
 {
-  "earlgrey_z0_sival": {
-    "token": "ot-earlgrey-z0-sival",
+  "earlgrey_a1_sival_owner": {
+    "token": "ot-earlgrey-a1-sival",
     "user": "user"
   }
 }
@@ -80,13 +80,13 @@ example:
 
 ```json
 {
-  "earlgrey_a0": {
-    "token": "earlgrey_a0_000",
+  "earlgrey_a1_sival_root": {
+    "token": "earlgrey_a1",
     "user": "user",
     "pin": "XXXXXX"
   },
-  "earlgrey_z0_sival": {
-    "token": "ot-earlgrey-z0-sival",
+  "earlgrey_a1_sival": {
+    "token": "ot-earlgrey-a1-sival",
     "user": "user"
   }
 }
diff --git a/signing/examples/BUILD b/signing/examples/BUILD
index b308c4cabaff6..1863f3e9e52ce 100644
--- a/signing/examples/BUILD
+++ b/signing/examples/BUILD
@@ -23,7 +23,7 @@ offline_presigning_artifacts(
     # This is left as a fake key so that the presigning artifacts will be
     # appropriate for the `fake_sign` rule below.
     ecdsa_key = {
-        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "fake_test_key_0",
+        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0",
     },
     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
     tags = ["manual"],
@@ -46,7 +46,7 @@ offline_fake_ecdsa_sign(
     testonly = True,
     srcs = [":presigning"],
     ecdsa_key = {
-        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "fake_test_key_0",
+        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0",
     },
     tags = ["manual"],
 )
diff --git a/signing/examples/signatures/BUILD b/signing/examples/signatures/BUILD
index 58a31b9e9b3fc..b68e04d47597b 100644
--- a/signing/examples/signatures/BUILD
+++ b/signing/examples/signatures/BUILD
@@ -6,10 +6,16 @@ package(default_visibility = ["//visibility:public"])
 
 filegroup(
     name = "ecdsa_signatures",
-    srcs = glob(["*.ecdsa_sig"]),
+    srcs = glob(
+        ["*.ecdsa_sig"],
+        allow_empty = True,
+    ),
 )
 
 filegroup(
     name = "spx_signatures",
-    srcs = glob(["*.spx_sig"]),
+    srcs = glob(
+        ["*.spx_sig"],
+        allow_empty = True,
+    ),
 )
diff --git a/signing/logs/2025-02-07.md b/signing/logs/2025-02-07.md
new file mode 100644
index 0000000000000..7eb62060d9557
--- /dev/null
+++ b/signing/logs/2025-02-07.md
@@ -0,0 +1,184 @@
+# Signing Ceremony 2025-02-07
+
+- Purpose:
+    - Create new a ROM\_EXT release for Earlgrey A1 silicon.
+    - Correct the ROM_EXT flash protection regions.
+    - Introduce ECDSA P256 + SLH-DSA hybrid signing for application payloads.
+- Participants: cfrantz (leader), moidx(witness), ttrippel (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+At opentitan commit fa29558e3d605600db08350d1dffb681f65b7472 on branch
+`earlgrey_1.0.0`, we ran:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    @provisioning_exts//shared/rom_ext/gb:digests
+
+sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/external/provisioning_exts/shared/rom_ext/gb/digests.tar
+eacd161fd033b4383cd7396d0c13122a1a086049dd9d722087a3b87fb3282b45  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+49bc29af1e4771e0f5248777f197a07b9665f92896251771777b7124d604729d  bazel-out/k8-fastbuild/bin/external/provisioning_exts/shared/rom_ext/gb/digests.tar
+
+```
+
+Note: there is a build reproducibility error with the `dice_cwt` variant of the ROM_EXT.  We verified that the `dice_x509` ROM_EXTs are reproducible by examining the SHA256 digets of the digest files:
+
+```
+sival$ sha256sum *x509*.digest
+be1a9f502cb7419b2b980e288a9ba7e2629a23744dc788711ac732a2d5ebfc0d  rom_ext_dice_x509_prod_slot_a_fpga_cw310.digest
+be1a9f502cb7419b2b980e288a9ba7e2629a23744dc788711ac732a2d5ebfc0d  rom_ext_dice_x509_prod_slot_a_fpga_cw340.digest
+bdf03ffd4972d216c7d8c9990c6c5310aa7165f2cea39e20d5541efb58454a96  rom_ext_dice_x509_prod_slot_a_silicon_creator.digest
+1ad4c3e1cc4155645457cc2ac556bf42e6e789b1cbb52546c11e7d14f83eadaa  rom_ext_dice_x509_prod_slot_b_fpga_cw310.digest
+1ad4c3e1cc4155645457cc2ac556bf42e6e789b1cbb52546c11e7d14f83eadaa  rom_ext_dice_x509_prod_slot_b_fpga_cw340.digest
+b1dc4d7351f36832acede7d0db5090c10466c96eb154af3232428ff1f093c035  rom_ext_dice_x509_prod_slot_b_silicon_creator.digest
+e67c1e6e4d8b159de67f6970ec0da5ba0ae321a84905077fea2d17d91c1d78b3  rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.digest
+e67c1e6e4d8b159de67f6970ec0da5ba0ae321a84905077fea2d17d91c1d78b3  rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.digest
+be38e349ba3331b3081103ba1c2ca136488b22b42a5c25cd612884b002ba6ae8  rom_ext_dice_x509_prod_slot_virtual_silicon_creator.digest
+
+gb$ sha256sum *x509*.digest
+9b96c73872a8ef7fb24fac722805d64dd3919b409a6d558b05bc44dd98e8fff0  rom_ext_dice_x509_prod_slot_a_fpga_cw310.digest
+9b96c73872a8ef7fb24fac722805d64dd3919b409a6d558b05bc44dd98e8fff0  rom_ext_dice_x509_prod_slot_a_fpga_cw340.digest
+1ce702517305ae501c3a5b52c24a9300add0518eb866e1a9c5f1e94de96bd6aa  rom_ext_dice_x509_prod_slot_a_silicon_creator.digest
+2517e453520009e7933500519a928553014f15c0b631b3af9a9e61bb12513c6c  rom_ext_dice_x509_prod_slot_b_fpga_cw310.digest
+2517e453520009e7933500519a928553014f15c0b631b3af9a9e61bb12513c6c  rom_ext_dice_x509_prod_slot_b_fpga_cw340.digest
+224de5da6fee9721f3663135fdb44de9e74366b29d7baa60d33a2dbacef6ccc3  rom_ext_dice_x509_prod_slot_b_silicon_creator.digest
+66925ca85ccf19fee3fe98644eb887b253305ca18a2ee6cffa2722ed0b2b5014  rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.digest
+66925ca85ccf19fee3fe98644eb887b253305ca18a2ee6cffa2722ed0b2b5014  rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.digest
+d0117ca73a009d2dc2cbede1372df93a2c7417acc3cbe993ac95f6e0d80a2675  rom_ext_dice_x509_prod_slot_virtual_silicon_creator.digest
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ~/siging/sival.tar
+cp bazel-out/k8-fastbuild/bin/external/provisioning_exts/shared/rom_ext/gb/digests.tar ~/signing/gb.tar
+cp bazel-out/k8-fastbuild/bin/sw/host/hsmtool/hsmtool ~/signing
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ~/signing
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1 (UserPIN)",
+      "manufacturer_id": "www.CardContact.de",
+      "model": "PKCS#15 emulated",
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1_opensc` which supplies the username and PIN.
+
+### Sival signatures
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1_opensc exec presigning.json
+```
+
+### GB signatures
+
+```
+$ mkdir gb
+$ cd gb
+$ tar xvf ../gb.tar
+$ ../hsmtool --profile earlgrey_a1_opensc exec presigning.json
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+gb/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_a_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_a_silicon_creator.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_b_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_b_silicon_creator.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.spx_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.spx_sig
+gb/rom_ext_dice_x509_prod_slot_a_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_a_fpga_cw310.spx_sig
+gb/rom_ext_dice_x509_prod_slot_a_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_a_fpga_cw340.spx_sig
+gb/rom_ext_dice_x509_prod_slot_a_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_a_silicon_creator.spx_sig
+gb/rom_ext_dice_x509_prod_slot_b_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_b_fpga_cw310.spx_sig
+gb/rom_ext_dice_x509_prod_slot_b_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_b_fpga_cw340.spx_sig
+gb/rom_ext_dice_x509_prod_slot_b_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_b_silicon_creator.spx_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.spx_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.spx_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.ecdsa_sig
+gb/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.spx_sig
+sival/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_a_silicon_creator.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_b_silicon_creator.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_a_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_a_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_a_silicon_creator.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_b_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_b_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_b_silicon_creator.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.ecdsa_sig
+sival/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.ecdsa_sig
+
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    @provisioning_exts//shared/rom_ext/gb:signed
+```
diff --git a/signing/logs/2025-02-08.md b/signing/logs/2025-02-08.md
new file mode 100644
index 0000000000000..0dc5382a29e35
--- /dev/null
+++ b/signing/logs/2025-02-08.md
@@ -0,0 +1,102 @@
+# Signing Ceremony 2025-02-08
+
+- Purpose:
+    - Sign FT personalization binaries.
+    - Introduce ECDSA P256 + SLH-DSA hybrid signing for personalization binaries.
+- Participants: cfrantz(leader), timothytrippel (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+At opentitan commit 1105200082c529b7ec7e4096b7c927fb4a19c335 on branch
+`earlgrey_1.0.0`, we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests
+    //sw/host/hsmtool
+$ sha256sum bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+d2286a3a07950e9824cbd67d3812e28f41f9fa872632b82764b66b85b87b92be  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+Note: there is a build reproducibility error with perso images that use the CWT DICE certificate format.
+We verified that the perso images that use X.509 DICE certificate formats are reproducible by examining the SHA256 digests of the individual personalization binaries themselves:
+
+```
+$ sha256sum *.digest
+6076b9f552e06abf94019576f5ca8218cb42b69bff011690ca6fa7de25227b3d  ft_personalize_gb_cros_fpga_cw340_rom_with_fake_keys.digest
+9b3f76398ee6780aacda936e9c73e06832515449a90c6583fba91758970a410f  ft_personalize_gb_cros_fpga_hyper310_rom_with_fake_keys.digest
+8054747ebe96f51c7f4577f06dd4b4fc5385bf339829e5ca3c34c56e90f57d67  ft_personalize_gb_cros_silicon_creator.digest
+ee1e5d98180f54ba01df473c96cabe0ec5c67cbd5293152ed526924dfc53a889  ft_personalize_gb_ti_fpga_cw340_rom_with_fake_keys.digest
+b0cd8b35eb64a52f2ed3902025a667d28091b8f79e4376c6665a8b070e283eca  ft_personalize_gb_ti_fpga_hyper310_rom_with_fake_keys.digest
+15c8a7729aa1681357c0ba4675298c56be9b3358ed0d7f8ad757bcadc3e852e6  ft_personalize_gb_ti_silicon_creator.digest
+dcb636b23138c58498cf5fd64993b1fcee1f395f97b97e0eb7a1a42d06ade830  ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest
+9f3d0d768693b0ccb31638fe2088c4c031c857446041f9540bd5ac506606c38e  ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest
+f26c2a9de7070a713dbd2e12cd8dfd7918f3982cb20bdaa6aaa4274243839dd6  ft_personalize_sival_silicon_creator.digest
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../digests.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_gb_cros.json
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_gb_ti.json
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the personalization binaries:
+
+```
+bazel build --stamp //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-03-07.md b/signing/logs/2025-03-07.md
new file mode 100644
index 0000000000000..4ec3174cadf80
--- /dev/null
+++ b/signing/logs/2025-03-07.md
@@ -0,0 +1,114 @@
+# Signing Ceremony 2025-03-07
+
+- Purpose:
+    - Create new ROM\_EXT release for Earlgrey A1 silicon.
+    - Create new FT personalization binary release for Earlgrey A1 silicon.
+- Participants: timothytrippel(leader), cfrantz (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+At opentitan commit 1a07e5f0860b735d2b3b94d961310a3431be4f30 on branch
+`earlgrey_1.0.0`, we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    @provisioning_exts//shared/rom_ext/gb:digests \
+    //sw/host/hsmtool
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/external/provisioning_exts/shared/rom_ext/gb/digests.tar
+e0850d4f16146af25dffd6857fbb638d84ee610cd6377307b17c26f691ce9995  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+7c6a7955bdcb8800c2173338fcfd717456e43853734b0e1dc9e9a71cb9d901e5  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+3f3083f2d86f4e979af363ec2e069acc647bc570c7713df9cc0ad8c7c85fd9a5  bazel-out/k8-fastbuild/bin/external/provisioning_exts/shared/rom_ext/gb/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Sival ROM\_EXT signatures
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1_opensc exec presigning.json
+```
+
+### GB ROM\_EXT signatures
+
+```
+$ mkdir gb
+$ cd gb
+$ tar xvf ../gb.tar
+$ ../hsmtool --profile earlgrey_a1_opensc exec presigning.json
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../digests.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_gb_cros.json
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_gb_ti.json
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the personalization binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:signed \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    @provisioning_exts//shared/rom_ext/gb:signed
+```
diff --git a/signing/logs/2025-03-30.md b/signing/logs/2025-03-30.md
new file mode 100644
index 0000000000000..0132060aa2fcc
--- /dev/null
+++ b/signing/logs/2025-03-30.md
@@ -0,0 +1,108 @@
+# Signing Ceremony 2025-03-30
+
+- Purpose:
+  - Release new ROM\_EXT (version 0.104) binaries for prod Earlgrey A* silicon SKUs.
+  - Release new FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` on commit a5c3410dcdf83ba5a63e4c39e0fa42a8f783ddcb,
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/host/hsmtool
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+28f696233ee45765267ce8c00cb789c7d667a8958d3d60921d624c0ab94a06fc  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest
+b1e2c4cc64da30a45b52d1ebab07c1440ad5df3890d998c329f6b2b61037c565  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest
+164c7851de04f9744ab78e3a89e22840684ebf4486db27e78696f26223c46670  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+0662ce7115b81b2ceae7015f8deb04d0c3284ea55d3699399d148ca3823588e4 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/rom_ext.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Sival ROM\_EXT signatures
+
+```
+$ mkdir rom_ext
+$ cd rom_ext
+$ tar xvf ../rom_ext.tar
+$ ../hsmtool --profile earlgrey_a1_opensc exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the ROM\_EXT and personalization binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:signed \
+    //sw/device/silicon_creator/rom_ext/sival:signed
+```
diff --git a/signing/logs/2025-04-08.md b/signing/logs/2025-04-08.md
new file mode 100644
index 0000000000000..9ed15443cb05c
--- /dev/null
+++ b/signing/logs/2025-04-08.md
@@ -0,0 +1,91 @@
+# Signing Ceremony 2025-04-08
+
+- Purpose:
+  - Release new FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` on commit 58289a2f026c2aa07d061cfffb54a63c5d318db9,
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+95bf00a13bff28bcaa27f11e612797d25a4fa624196ecd1fc8ad60d538d39e67 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest
+d433dc418199c356364869355fe7543ef96a28ccd7641def3e98f1d9f69078fa bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest
+c84e747b5a887dbc5388f24528fe9229ae3d33f48b3e417d65ae8e2820e413c8 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the personalization binaries:
+
+```
+bazel build --stamp //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-04-15.md b/signing/logs/2025-04-15.md
new file mode 100644
index 0000000000000..0b025cb4024df
--- /dev/null
+++ b/signing/logs/2025-04-15.md
@@ -0,0 +1,91 @@
+# Signing Ceremony 2025-04-15
+
+- Purpose:
+  - Release new FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` on commit c8d8998452e63619e9e220fbf96b01bcc820beee,
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+b763fd261a3a1a06bc24c733333a103b190a0e8f5c52a05d1821e3652e4b77e6  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest
+974ab22d8ee3647a31096fee65a55ea91da4a24e4c571b5ece86e1d44a3bc272  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest
+c817998a0018adf932812b4ce6cba8d91b878f17b8f06180a684ee309bed1979  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the personalization binaries:
+
+```
+bazel build --stamp //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-04-21.md b/signing/logs/2025-04-21.md
new file mode 100644
index 0000000000000..07d03ef3c2b1c
--- /dev/null
+++ b/signing/logs/2025-04-21.md
@@ -0,0 +1,91 @@
+# Signing Ceremony 2025-04-21
+
+- Purpose:
+  - Release new FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz (witness), moidx (witness).
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` on commit db8d24bc6c8b4b425e26368949c1a133bdf8e409,
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+f9ea10d1291c894eb50c8d91ed2d8d19267dbd82cb215df79fa15e8bcfdaea3b  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.digest
+57f43c4c42e053f0a9a2d82b6a65c8ccb794ef2176027f8b30431bbe5c0dc346  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.digest
+37916e979be6de21263527925805244e8de4f40147d34b703c0d4f9e84641e95  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/ft_personalize_sival_silicon_creator.digest
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107146"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool -t earlgrey_a1 -u user -p ${PIN} exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following command was used to attach the signatures to the personalization binaries:
+
+```
+bazel build --stamp //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-05-07.md b/signing/logs/2025-05-07.md
new file mode 100644
index 0000000000000..540e8188109ce
--- /dev/null
+++ b/signing/logs/2025-05-07.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-05-07
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: cfrantz(leader), timothytrippel(witness)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit e342a1ca5ea6f212d3e881b701318e360f198c18
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+1d497484834775c5bafc5ef307f5c778746bf17c53556e6d5c243cec2544dd38  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+07e1b96ff4e470f88d236f78c816f9afe52645dcb318903516f80c75b2b53f56  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/manuf/base:signed \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+```
diff --git a/signing/logs/2025-05-21.md b/signing/logs/2025-05-21.md
new file mode 100644
index 0000000000000..da395edd941e2
--- /dev/null
+++ b/signing/logs/2025-05-21.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-05-21
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: cfrantz(leader), timothytrippel(witness)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit ff7da13469e3d9ad28a83d87d503b6c0a1736d09
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+9c917c8b16808f0880c6cdd51c8f39c3e1d4bbab6552df95eac4053a45eff0ac  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+1d0c3f7bb564a33d3b1e7c74b2561509d890262838eb919876f46427ce7f724e  bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-06-04.md b/signing/logs/2025-06-04.md
new file mode 100644
index 0000000000000..c22ee2fa79e1c
--- /dev/null
+++ b/signing/logs/2025-06-04.md
@@ -0,0 +1,103 @@
+# Signing Ceremony 2025-06-04
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: cfrantz(witness), timothytrippel(leader)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit 3185b58024c8d144aa7e7cb994bb957b1e6dadbb
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+d5d8abb77d598a8e854bbc420af94e9169e9778f844f0e178725efe091da8933 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+bfb1413863c83349a952e0a5e5fbda02e1c95d46223abcd3a7f3984a6cff36ff bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-06-11.md b/signing/logs/2025-06-11.md
new file mode 100644
index 0000000000000..f4fe5cf7620e1
--- /dev/null
+++ b/signing/logs/2025-06-11.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-06-11
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: cfrantz(witness), timothytrippel(leader)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit c8ba1aba4a7840581c65bae53a86d52cd7e1b440
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+db91264118dc11c327be75356641664209c5d15f13cd1f2e9a2e42ceb18e825e bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+d72430f313a9bffd239d039026559ef1c40f8281cb6ae5c3177d1bd0af5b0dcc bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-06-20.md b/signing/logs/2025-06-20.md
new file mode 100644
index 0000000000000..0c4b9854e893f
--- /dev/null
+++ b/signing/logs/2025-06-20.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-06-20
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: moidx(witness), timothytrippel(leader)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit 5537996adffdbc1dd3ddb89a1d579e775a39bb9d
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+d36dc6ad9bab13629132fb36a43b04c5ef4550424507474a210d16fce0dda081 bazel-out/k10-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+0f7b62be18fb5c2064c7b19f824ad1ea64d48d6f6c3f27cadb7cae22de2833a0 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-07-01.md b/signing/logs/2025-07-01.md
new file mode 100644
index 0000000000000..9eabe52e23561
--- /dev/null
+++ b/signing/logs/2025-07-01.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-07-01
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz(witness)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit b2b48791b1786962de17a3f56a026ff4d7846836
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+c1cefbd181db3b5b0d8b10b23c52af9f744073b359b04240f751e269335f056b bazel-out/k10-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+b9247f766deb179cbb82a4ed73a57ade5c006d98643f239cdc8d6922cbbebe9a bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-07-10.md b/signing/logs/2025-07-10.md
new file mode 100644
index 0000000000000..a5f4c73cf80b1
--- /dev/null
+++ b/signing/logs/2025-07-10.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-07-10
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz(witness)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit 14ddd8d91814f06dc80fa564856df3e61764e485
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+61e98094c3274797152161c08b526c608546b3919e0d170a0f1b21b80f46a1db bazel-out/k10-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+28b895edc608df5b7402aeeaa38a615308198cf9423011c5aa6abb60f9e8afd3 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/logs/2025-08-20.md b/signing/logs/2025-08-20.md
new file mode 100644
index 0000000000000..fdaafde6ef20c
--- /dev/null
+++ b/signing/logs/2025-08-20.md
@@ -0,0 +1,104 @@
+# Signing Ceremony 2025-08-20
+
+- Purpose:
+  - Release new ROM\_EXT and FT personalization binaries for prod Earlgrey A* silicon SKUs.
+- Participants: timothytrippel(leader), cfrantz(witness)
+
+## Ceremony Prolog
+
+Before the ceremony, we double checked build reproducibility.
+With the following repos at their respective commits:
+- `opentitan:earlgrey_1.0.0` at commit 536735b1762ef7df7fd88d446547142e159d35b7
+we ran:
+
+```
+$ bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:digests \
+    //sw/device/silicon_creator/manuf/base:digests \
+    //sw/host/hsmtool
+
+$ sha256sum \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar \
+    bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+1c2ffc04ecefbaf329b6f85ddcea08fce6d6e623dcc1271d1ca5941fb09a07dc bazel-out/k10-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar
+2d61cfadba7c02a71c327b7c3010210aba0bcf9623b1f81e99cf5aa5d2cdb109 bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar
+```
+
+We copied the digests and `hsmtool` to a staging subdirectory.
+```
+$ mkdir -p ${STAGING_DIR}
+$ cp bazel-bin/sw/host/hsmtool/hsmtool ${STAGING_DIR}
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/rom_ext/sival/digests.tar ${STAGING_DIR}/sival.tar
+$ cp bazel-out/k8-fastbuild/bin/sw/device/silicon_creator/manuf/base/digests.tar ${STAGING_DIR}/perso.tar
+```
+
+## NitroKey Preparation
+
+In order to communicate with the NitroKey token holding the key material, we used the `opensc` package.
+
+## Ceremony
+
+### Setup & Authenticate to the HSM
+
+```
+$ cd ${STAGING_DIR}
+$ export HSMTOOL_MODULE=/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so
+$ ./hsmtool token list
+{
+  "tokens": [
+    {
+      "label": "earlgrey_a1",
+      "manufacturer_id": "www.cardcontact.de",
+      "model": "SmartCard-HSM"
+      "serial_number": "DENK0107124"
+    }
+  ]
+}
+$ export HSMTOOL_SPX_MODULE=pkcs11-ef
+```
+
+## Signing
+
+Signing was performed in the staging subdirectory.
+I have an `hsmtool` profile defined named `earlgrey_a1` which supplies the username and PIN.
+
+### ROM\_EXT signatures (SiVAL SKU)
+
+```
+$ mkdir sival
+$ cd sival
+$ tar xvf ../sival.tar
+$ ../hsmtool --profile earlgrey_a1 exec presigning.json
+$ cd ..
+```
+
+### Personalization signatures
+
+```
+$ mkdir perso
+$ cd perso
+$ tar xvf ../perso.tar
+$ ../hsmtool --profile earlgrey_a1 exec provisioning_sival.json
+$ cd ..
+```
+
+## Ceremony Epilog
+
+After signing, the signatures were collected so they could be tested prior to
+publishing the signatures and binaries.
+
+```
+$ tar cvf signatures.tar */*_sig
+...
+$ exit
+```
+
+### Attaching signatures
+
+The following commands were used to attach the signatures to the personalization and ROM\_EXT binaries:
+
+```
+bazel build --stamp \
+    //sw/device/silicon_creator/rom_ext/sival:signed \
+    //sw/device/silicon_creator/manuf/base:signed
+```
diff --git a/signing/softhsm/README.md b/signing/softhsm/README.md
index 83ce94dc921f8..c31857bf54a99 100644
--- a/signing/softhsm/README.md
+++ b/signing/softhsm/README.md
@@ -11,3 +11,22 @@ softhsm2-util --init-token --label fake_keys --so-pin officer_pin --pin 123456 -
 ```
 
 Where `softhsm-util` is one of the binaries emitted by the `@softhsm2//:softhsm2` target.
+
+## Keys
+
+The softhsm instance contains a few keys needed for testing.  These were
+imported with hsmtool.
+
+```
+export HSMTOOL_MODULE=bazel-out/k8-fastbuild/bin/external/softhsm2/softhsm2/lib/softhsm/libsofthsm2.so
+export HSMTOOL_SPX_MODULE=pkcs11-ef
+export SOFTHSM2_CONF=signing/softhsm/softhsm.conf
+
+hsmtool -t fake_keys -u user -p 123456 \
+    ecdsa import --label fake_app_prod_ecdsa \
+    sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der
+
+hsmtool -t fake_keys -u user -p 123456 \
+    spx import --label fake_app_prod_spx \
+    sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem
+```
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/71c8ac67-2b1f-7107-25d9-b3e9e4f1db9e.lock b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/71c8ac67-2b1f-7107-25d9-b3e9e4f1db9e.lock
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/71c8ac67-2b1f-7107-25d9-b3e9e4f1db9e.object b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/71c8ac67-2b1f-7107-25d9-b3e9e4f1db9e.object
new file mode 100644
index 0000000000000..7c3cd22c5dd05
Binary files /dev/null and b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/71c8ac67-2b1f-7107-25d9-b3e9e4f1db9e.object differ
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/73153cc5-c025-2ee0-c7f7-24ba6ba1361a.lock b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/73153cc5-c025-2ee0-c7f7-24ba6ba1361a.lock
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/73153cc5-c025-2ee0-c7f7-24ba6ba1361a.object b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/73153cc5-c025-2ee0-c7f7-24ba6ba1361a.object
new file mode 100644
index 0000000000000..c76280a7b4dcb
Binary files /dev/null and b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/73153cc5-c025-2ee0-c7f7-24ba6ba1361a.object differ
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/ef3261cb-77ce-b359-0c9f-43fa2d34f8d3.lock b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/ef3261cb-77ce-b359-0c9f-43fa2d34f8d3.lock
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/ef3261cb-77ce-b359-0c9f-43fa2d34f8d3.object b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/ef3261cb-77ce-b359-0c9f-43fa2d34f8d3.object
new file mode 100644
index 0000000000000..28c046363daa0
Binary files /dev/null and b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/ef3261cb-77ce-b359-0c9f-43fa2d34f8d3.object differ
diff --git a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/token.object b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/token.object
index fe69f2e1be79d..bc4ef1c0a27c5 100644
Binary files a/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/token.object and b/signing/softhsm/tokens/1fb9bf0b-6f47-74b5-05b9-e1ccf1488ff0/token.object differ
diff --git a/signing/tokens/BUILD b/signing/tokens/BUILD
index 75f726c766d16..bc2110c7d3b4a 100644
--- a/signing/tokens/BUILD
+++ b/signing/tokens/BUILD
@@ -2,8 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:signing.bzl", "signing_tool")
 load("@nonhermetic//:env.bzl", "ENV")
+load("//rules:signing.bzl", "signing_tool")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -15,9 +15,11 @@ signing_tool(
 
 signing_tool(
     name = "nitrokey",
-    data = ["@sc_hsm//:gen_dir"],
+    data = ["@opensc//:gen_dir"],
     env = {
-        "HSMTOOL_MODULE": "$(location @sc_hsm//:gen_dir)/lib/libsc-hsm-pkcs11.so",
+        "LD_LIBRARY_PATH": "$(location @opensc//:gen_dir)/lib",
+        "HSMTOOL_MODULE": "$(location @opensc//:gen_dir)/lib/opensc-pkcs11.so",
+        "HSMTOOL_SPX_MODULE": "pkcs11-ef",
     },
     location = "token",
     tool = "//sw/host/hsmtool",
@@ -26,24 +28,7 @@ signing_tool(
 signing_tool(
     name = "cloud_kms_sival",
     data = [
-        "earlgrey_z1_sival.yaml",
-        "@cloud_kms_hsm//:libkmsp11",
-    ],
-    env = {
-        # The Cloud KMS PKCS11 provider needs to know where the user's home
-        # is in order to load the gclould credentials.
-        "HOME": ENV["HOME"],
-        "HSMTOOL_MODULE": "$(location @cloud_kms_hsm//:libkmsp11)",
-        "KMS_PKCS11_CONFIG": "$(location earlgrey_z1_sival.yaml)",
-    },
-    location = "token",
-    tool = "//sw/host/hsmtool",
-)
-
-signing_tool(
-    name = "cloud_kms_prodc",
-    data = [
-        "earlgrey_z1_prodc.yaml",
+        "ot-earlgrey-a1-sival.yaml",
         "@cloud_kms_hsm//:libkmsp11",
     ],
     env = {
@@ -51,7 +36,7 @@ signing_tool(
         # is in order to load the gclould credentials.
         "HOME": ENV["HOME"],
         "HSMTOOL_MODULE": "$(location @cloud_kms_hsm//:libkmsp11)",
-        "KMS_PKCS11_CONFIG": "$(location earlgrey_z1_prodc.yaml)",
+        "KMS_PKCS11_CONFIG": "$(location ot-earlgrey-a1-sival.yaml)",
     },
     location = "token",
     tool = "//sw/host/hsmtool",
diff --git a/signing/tokens/earlgrey_z1_prodc.yaml b/signing/tokens/earlgrey_z1_prodc.yaml
deleted file mode 100644
index dd9c40e5868d5..0000000000000
--- a/signing/tokens/earlgrey_z1_prodc.yaml
+++ /dev/null
@@ -1,9 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
----
-tokens:
-  - key_ring: "projects/opentitan/locations/us-west1/keyRings/ot-earlgrey-z1-prodc"
-    label: "ot-earlgrey-z1-prodc"
-log_directory: "/tmp"
diff --git a/signing/tokens/earlgrey_z1_sival.yaml b/signing/tokens/earlgrey_z1_sival.yaml
deleted file mode 100644
index 745b184de491a..0000000000000
--- a/signing/tokens/earlgrey_z1_sival.yaml
+++ /dev/null
@@ -1,9 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
----
-tokens:
-  - key_ring: "projects/otkms-407107/locations/us-west1/keyRings/ot-earlgrey-z0-sival"
-    label: "ot-earlgrey-z0-sival"
-log_directory: "/tmp"
diff --git a/signing/tokens/ot-earlgrey-a1-sival.yaml b/signing/tokens/ot-earlgrey-a1-sival.yaml
new file mode 100644
index 0000000000000..7368ac7130996
--- /dev/null
+++ b/signing/tokens/ot-earlgrey-a1-sival.yaml
@@ -0,0 +1,9 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+---
+tokens:
+  - key_ring: "projects/otkms-407107/locations/us-west1/keyRings/ot-earlgrey-a1-sival"
+    label: "ot-earlgrey-a1-sival"
+log_directory: "/tmp"
diff --git a/sw/.rustfmt.toml b/sw/.rustfmt.toml
new file mode 100644
index 0000000000000..64d577a64a0d7
--- /dev/null
+++ b/sw/.rustfmt.toml
@@ -0,0 +1,5 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+edition = "2024"
diff --git a/sw/device/BUILD b/sw/device/BUILD
index 157cebb3bc6f1..dc5268d9ad63a 100644
--- a/sw/device/BUILD
+++ b/sw/device/BUILD
@@ -9,6 +9,9 @@ package(default_visibility = ["//visibility:public"])
 ld_library(
     name = "info_sections",
     includes = ["info_sections.ld"],
+    deps = [
+        "//sw/device/lib/coverage:coverage_sections",
+    ],
 )
 
 # FIXME(lowRISC/opentitan#12065) This is a hack to work around currently
@@ -23,8 +26,9 @@ config_setting(
 config_setting(
     name = "measure_coverage_on_target",
     define_values = {
-        "measure_coverage_on_target": "true",
+        "ot_coverage_enabled": "true",
     },
+    deprecation = "Please use //rules/coverage:enabled instead.",
 )
 
 cc_library(
diff --git a/sw/device/examples/hello_usbdev/BUILD b/sw/device/examples/hello_usbdev/BUILD
index d6e765f54c74b..7a419d2daca15 100644
--- a/sw/device/examples/hello_usbdev/BUILD
+++ b/sw/device/examples/hello_usbdev/BUILD
@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("//rules/opentitan:defs.bzl", "opentitan_binary")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 opentitan_binary(
     name = "hello_usbdev",
diff --git a/sw/device/examples/sram_program/sram_program.ld b/sw/device/examples/sram_program/sram_program.ld
index cad27f7955d3c..bfc178f8cbded 100644
--- a/sw/device/examples/sram_program/sram_program.ld
+++ b/sw/device/examples/sram_program/sram_program.ld
@@ -59,23 +59,23 @@ SECTIONS {
      * hopefully only take one instruction. Other data will likely need
      * multiple instructions to load, so we're less concerned about address
      * materialisation taking more than one instruction. */
-    KEEP(*(.srodata))
-    KEEP(*(.srodata.*))
-    KEEP(*(.rodata))
-    KEEP(*(.rodata.*))
+    *(.srodata)
+    *(.srodata.*)
+    *(.rodata)
+    *(.rodata.*)
     . = ALIGN(4);
-    KEEP(*(.sdata))
-    KEEP(*(.sdata.*))
-    KEEP(*(.data))
-    KEEP(*(.data.*))
+    *(.sdata)
+    *(.sdata.*)
+    *(.data)
+    *(.data.*)
     . = ALIGN(4);
-    KEEP(*(.text))
-    KEEP(*(.text.*))
+    *(.text)
+    *(.text.*)
     . = ALIGN(4);
-    KEEP(*(.sbss))
-    KEEP(*(.sbss.*))
-    KEEP(*(.bss))
-    KEEP(*(.bss.*))
+    *(.sbss)
+    *(.sbss.*)
+    *(.bss)
+    *(.bss.*)
     . = ALIGN(4);
   } > ram_main
 
diff --git a/sw/device/examples/teacup_demos/BUILD b/sw/device/examples/teacup_demos/BUILD
index 7a6e8c9b15681..8cc167e9907fb 100644
--- a/sw/device/examples/teacup_demos/BUILD
+++ b/sw/device/examples/teacup_demos/BUILD
@@ -13,7 +13,6 @@ opentitan_test(
     name = "teacup_leds_demo",
     srcs = ["teacup_leds_demo.c"],
     exec_env = {
-        "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": None,
         "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
     },
     deps = [
@@ -31,7 +30,6 @@ opentitan_test(
     name = "teacup_leds_and_screen_demo",
     srcs = ["teacup_leds_and_screen_demo.c"],
     exec_env = {
-        "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": None,
         "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
     },
     deps = [
diff --git a/sw/device/examples/teacup_demos/data/BUILD b/sw/device/examples/teacup_demos/data/BUILD
index b6ad685aecf6f..025ca91bbfddb 100644
--- a/sw/device/examples/teacup_demos/data/BUILD
+++ b/sw/device/examples/teacup_demos/data/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/examples/teacup_demos/teacup_leds_and_screen_demo.c b/sw/device/examples/teacup_demos/teacup_leds_and_screen_demo.c
index 9842aecfed21e..d4df5d44b678a 100644
--- a/sw/device/examples/teacup_demos/teacup_leds_and_screen_demo.c
+++ b/sw/device/examples/teacup_demos/teacup_leds_and_screen_demo.c
@@ -150,7 +150,8 @@ static status_t peripheral_init(void) {
 
 static status_t configure_led_i2c_controller(void) {
   TRY(dif_i2c_host_set_enabled(&i2c, kDifToggleEnabled));
-  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedFastPlus));
+  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedFastPlus,
+                              /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
   TRY(leds_i2c_controller_configure(&i2c));
   return OK_STATUS();
 }
diff --git a/sw/device/examples/teacup_demos/teacup_leds_demo.c b/sw/device/examples/teacup_demos/teacup_leds_demo.c
index f0f71fad45845..c5bfe8dee86c3 100644
--- a/sw/device/examples/teacup_demos/teacup_leds_demo.c
+++ b/sw/device/examples/teacup_demos/teacup_leds_demo.c
@@ -77,7 +77,8 @@ static status_t peripheral_init(void) {
 
 static status_t configure_led_i2c_controller(void) {
   TRY(dif_i2c_host_set_enabled(&i2c, kDifToggleEnabled));
-  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedFastPlus));
+  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedFastPlus,
+                              /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
   TRY(leds_i2c_controller_configure(&i2c));
   return OK_STATUS();
 }
diff --git a/sw/device/info_sections.ld b/sw/device/info_sections.ld
index 2cb1fecef0249..3195e2cfffc93 100644
--- a/sw/device/info_sections.ld
+++ b/sw/device/info_sections.ld
@@ -38,18 +38,12 @@
 /**
  * The following section contains log fields constructed from the logs using
  * the log_fields_t struct defined in sw/device/lib/runtime/log.h. The size of
- * each log field is fixed - 20 bytes.
+ * each log field is fixed - 20 bytes. To distinguish between the fields of
+ * different ELF files we add an offset to the address. We register that offset
+ * here as a header before the log fields.
  */
-.logs.fields _dv_log_offset (INFO): {
-  /* Force this section to always be emitted. The logs extraction script expects
-   * this section to be present in the ELF file, but the linker will not emit it
-   * if there are no outputs (i.e, the *(.logs.fields) statement) with contents.
-   *
-   * However, almost any assignment will implicitly create even an empty section,
-   * including the very silly . = . (set the program counter to itself).
-   *
-   * See https://sourceware.org/binutils/docs-2.29/ld/Output-Section-Discarding.html. */
-  . = .;
+.logs.fields 0 (INFO): {
+  LONG(_dv_log_offset);
   *(.logs.fields)
 }
 
@@ -57,6 +51,9 @@
  * End DV Sections
  */
 
+/* Coverage Runtime Sections. */
+INCLUDE sw/device/lib/coverage/info.ld
+
 /* ELF-internal Sections. */
 .symtab 0x0 : { *(.symtab) }
 .strtab 0x0 : { *(.strtab) }
diff --git a/sw/device/lib/arch/BUILD b/sw/device/lib/arch/BUILD
index cb77ea55d7a3e..ec42def179bff 100644
--- a/sw/device/lib/arch/BUILD
+++ b/sw/device/lib/arch/BUILD
@@ -103,3 +103,16 @@ cc_library(
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
     ],
 )
+
+cc_library(
+    name = "sim_qemu",
+    srcs = ["device_sim_qemu.c"],
+    deps = [
+        ":device",
+        "//hw/ip/rv_core_ibex/data:rv_core_ibex_c_regs",
+        "//hw/ip/uart/data:uart_c_regs",
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib/drivers:ibex",
+        "//sw/device/silicon_creator/lib/drivers:uart",
+    ],
+)
diff --git a/sw/device/lib/arch/device.h b/sw/device/lib/arch/device.h
index 48aab52c5b09c..fb22693f867ab 100644
--- a/sw/device/lib/arch/device.h
+++ b/sw/device/lib/arch/device.h
@@ -66,6 +66,11 @@ typedef enum device_type {
    * Silicon.
    */
   kDeviceSilicon = 5,
+  /**
+   * Represents the "QEMU" device, i.e. an emulation of OpenTitan written
+   * independently of the RTL.
+   */
+  kDeviceSimQemu = 6,
 } device_type_t;
 
 /**
diff --git a/sw/device/lib/arch/device_sim_qemu.c b/sw/device/lib/arch/device_sim_qemu.c
new file mode 100644
index 0000000000000..cca8c6d5dfbd0
--- /dev/null
+++ b/sw/device/lib/arch/device_sim_qemu.c
@@ -0,0 +1,79 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/ibex.h"
+#include "sw/device/silicon_creator/lib/drivers/uart.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated
+#include "rv_core_ibex_regs.h"                        // Generated
+#include "uart_regs.h"                                // Generated
+
+/**
+ * @file
+ * @brief Device-specific symbol definitions for the QEMU emulation.
+ */
+
+const device_type_t kDeviceType = kDeviceSimQemu;
+
+const uint64_t kClockFreqCpuMhz = 24;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+
+const uint64_t kClockFreqHiSpeedPeripheralHz = 24 * 1000 * 1000;  // 24MHz
+
+const uint64_t kClockFreqPeripheralHz = 6 * 1000 * 1000;  // 6MHz
+
+const uint64_t kClockFreqUsbHz = 48 * 1000 * 1000;  // 48MHz
+
+const uint64_t kClockFreqAonHz = 250 * 1000;  // 250kHz
+
+const uint64_t kUartBaudrate = 115200;
+
+const uint32_t kUartNCOValue =
+    CALCULATE_UART_NCO(kUartBaudrate, kClockFreqPeripheralHz);
+
+const uint32_t kUartBaud115K =
+    CALCULATE_UART_NCO(115200, kClockFreqPeripheralHz);
+const uint32_t kUartBaud230K =
+    CALCULATE_UART_NCO(115200 * 2, kClockFreqPeripheralHz);
+const uint32_t kUartBaud460K =
+    CALCULATE_UART_NCO(115200 * 4, kClockFreqPeripheralHz);
+const uint32_t kUartBaud921K =
+    CALCULATE_UART_NCO(115200 * 8, kClockFreqPeripheralHz);
+const uint32_t kUartBaud1M33 =
+    CALCULATE_UART_NCO(1333333, kClockFreqPeripheralHz);
+const uint32_t kUartBaud1M50 =
+    CALCULATE_UART_NCO(1500000, kClockFreqPeripheralHz);
+
+const uint32_t kUartTxFifoCpuCycles = CALCULATE_UART_TX_FIFO_CPU_CYCLES(
+    kUartBaudrate, kClockFreqCpuHz, UART_PARAM_TX_FIFO_DEPTH);
+
+const uint32_t kAstCheckPollCpuCycles =
+    CALCULATE_AST_CHECK_POLL_CPU_CYCLES(kClockFreqCpuHz);
+
+// QEMU supports the DV_SIM register for terminating when a test status has been
+// written.
+const uintptr_t kDeviceTestStatusAddress =
+    TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR +
+    RV_CORE_IBEX_DV_SIM_WINDOW_REG_OFFSET;
+
+const uintptr_t kDeviceLogBypassUartAddress = 0;
+
+// Although QEMU isn't an FPGA, there's no harm in us printing the version here.
+void device_fpga_version_print(void) {
+  uint32_t version = ibex_fpga_version();
+  //                       : M O R
+  const uint32_t kRom = 0x3a4d4f52;
+  uart_write_imm(kRom);
+  // The cast to unsigned int stops GCC from complaining about uint32_t
+  // being a `long unsigned int` while the %x specifier takes `unsigned int`.
+  const uint32_t kNewline = 0x0a0d;
+  uart_write_hex(version, sizeof(version), kNewline);
+}
diff --git a/sw/device/lib/base/BUILD b/sw/device/lib/base/BUILD
index 4e6328162cd99..77a9007717405 100644
--- a/sw/device/lib/base/BUILD
+++ b/sw/device/lib/base/BUILD
@@ -39,6 +39,12 @@ dual_cc_library(
     ),
 )
 
+# Make the non-mock version of CRC32 visible outside of this package.
+alias(
+    name = "crc32_device_library",
+    actual = dual_cc_device_library_of(":crc32"),
+)
+
 cc_test(
     name = "crc32_unittest",
     srcs = ["crc32_unittest.cc"],
@@ -105,7 +111,12 @@ cc_test(
     ],
     linkopts = [
         "-fsanitize=undefined",
-    ],
+    ] + select({
+        "@rules_cc//cc/compiler:clang": [
+            "-fsanitize-link-c++-runtime",
+        ],
+        "//conditions:default": [],
+    }),
     deps = [
         ":global_mock",
         "@googletest//:gtest_main",
@@ -139,7 +150,7 @@ cc_library(
 alias(
     name = "math_builtins",
     actual = select({
-        "//sw/device:measure_coverage_on_target": "//sw/device:nothing",
+        "//rules/coverage:enabled": "//sw/device:nothing",
         "//conditions:default": ":math_polyfills",
     }),
     visibility = ["//visibility:private"],
@@ -251,7 +262,19 @@ cc_library(
     name = "random_order",
     srcs = ["random_order.c"],
     hdrs = ["random_order.h"],
-    deps = [":bitfield"],
+    deps = [
+        ":bitfield",
+        ":hardened",
+    ],
+)
+
+cc_test(
+    name = "random_order_unittest",
+    srcs = ["random_order_unittest.cc"],
+    deps = [
+        ":random_order",
+        "@googletest//:gtest_main",
+    ],
 )
 
 cc_library(
@@ -263,6 +286,7 @@ cc_library(
         ":macros",
         ":memory",
         ":random_order",
+        "//sw/device/lib/crypto/impl:status",
     ],
 )
 
diff --git a/sw/device/lib/base/crc32.c b/sw/device/lib/base/crc32.c
index 2cf44f5ef4d19..9b0b35dff6ce0 100644
--- a/sw/device/lib/base/crc32.c
+++ b/sw/device/lib/base/crc32.c
@@ -10,26 +10,37 @@
 #include "sw/device/lib/base/memory.h"
 
 #ifdef OT_PLATFORM_RV32
+enum {
+  /**
+   * CRC32 polynomial.
+   */
+  kCrc32Poly = 0xedb88320,
+  kCrc32Mu = 0xf7011641,
+};
+
 OT_WARN_UNUSED_RESULT
-static uint32_t crc32_internal_add8(uint32_t ctx, uint8_t byte) {
-  ctx ^= byte;
+static uint32_t crc32_i(uint32_t x) {
+  uint32_t result;
   asm(".option push;"
-      ".option arch, +zbr0p93;"
-      "crc32.b %0, %1;"
+      ".option arch, +zbc;"
+      "clmul %[result], %[x], %[mu];"
+      "clmulr %[result], %[result], %[poly];"
       ".option pop;"
-      : "+r"(ctx));
-  return ctx;
+      : [result] "=&r"(result)
+      : [x] "r"(x), [mu] "r"(kCrc32Mu), [poly] "r"(kCrc32Poly));
+  return result;
+}
+
+OT_WARN_UNUSED_RESULT
+static uint32_t crc32_internal_add8(uint32_t ctx, uint8_t byte) {
+  ctx ^= byte;
+  return crc32_i(ctx << 24) ^ (ctx >> 8);
 }
 
 OT_WARN_UNUSED_RESULT
 static uint32_t crc32_internal_add32(uint32_t ctx, uint32_t word) {
   ctx ^= word;
-  asm(".option push;"
-      ".option arch, +zbr0p93;"
-      "crc32.w %0, %1;"
-      ".option pop;"
-      : "+r"(ctx));
-  return ctx;
+  return crc32_i(ctx);
 }
 #else
 enum {
diff --git a/sw/device/lib/base/hardened.h b/sw/device/lib/base/hardened.h
index 1c5fc324dc986..d998ebe40175d 100644
--- a/sw/device/lib/base/hardened.h
+++ b/sw/device/lib/base/hardened.h
@@ -241,7 +241,8 @@ inline uint32_t launder32(uint32_t val) {
 
   // When we're building for static analysis, reduce false positives by
   // short-circuiting the inline assembly block.
-#if OT_BUILD_FOR_STATIC_ANALYZER || OT_DISABLE_HARDENING
+#if OT_BUILD_FOR_STATIC_ANALYZER || \
+    (defined(OT_DISABLE_HARDENING) && OT_DISABLE_HARDENING)
   return val;
 #endif
 
@@ -263,7 +264,8 @@ inline uint32_t launder32(uint32_t val) {
  */
 OT_WARN_UNUSED_RESULT
 inline uintptr_t launderw(uintptr_t val) {
-#if OT_BUILD_FOR_STATIC_ANALYZER || OT_DISABLE_HARDENING
+#if OT_BUILD_FOR_STATIC_ANALYZER || \
+    (defined(OT_DISABLE_HARDENING) && OT_DISABLE_HARDENING)
   return val;
 #endif
   asm volatile("" : "+r"(val));
diff --git a/sw/device/lib/base/hardened_memory.c b/sw/device/lib/base/hardened_memory.c
index d9e418fdaceb9..a720a094acb83 100644
--- a/sw/device/lib/base/hardened_memory.c
+++ b/sw/device/lib/base/hardened_memory.c
@@ -10,8 +10,8 @@
 
 // NOTE: The three hardened_mem* functions have similar contents, but the parts
 // that are shared between them are commented only in `memcpy()`.
-void hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src,
-                     size_t word_len) {
+status_t hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src,
+                         size_t word_len) {
   random_order_t order;
   random_order_init(&order, word_len);
 
@@ -24,19 +24,8 @@ void hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src,
   uintptr_t src_addr = (uintptr_t)src;
   uintptr_t dest_addr = (uintptr_t)dest;
 
-  // `decoys` is a small stack array that is filled with uninitialized memory.
-  // It is scratch space for us to do "extra" operations, when the number of
-  // iteration indices the chosen random order is different from `word_len`.
-  //
-  // These extra operations also introduce noise that an attacker must do work
-  // to filter, such as by applying side-channel analysis to obtain an address
-  // trace.
-  uint32_t decoys[8];
-  uintptr_t decoy_addr = (uintptr_t)&decoys;
-
   // We need to launder `count`, so that the SW.LOOP-COMPLETION check is not
   // deleted by the compiler.
-  size_t byte_len = word_len * sizeof(uint32_t);
   for (; launderw(count) < expected_count; count = launderw(count) + 1) {
     // The order values themselves are in units of words, but we need `byte_idx`
     // to be in units of bytes.
@@ -49,40 +38,20 @@ void hardened_memcpy(uint32_t *restrict dest, const uint32_t *restrict src,
     // happens-before among indices consistent with `order`.
     barrierw(byte_idx);
 
-    // Compute putative offsets into `src`, `dest`, and `decoys`. Some of these
-    // may go off the end of `src` and `dest`, but they will not be cast to
-    // pointers in that case. (Note that casting out-of-range addresses to
-    // pointers is UB.)
-    uintptr_t srcp = src_addr + byte_idx;
-    uintptr_t destp = dest_addr + byte_idx;
-    uintptr_t decoy1 = decoy_addr + (byte_idx % sizeof(decoys));
-    uintptr_t decoy2 =
-        decoy_addr + ((byte_idx + sizeof(decoys) / 2) % sizeof(decoys));
-
-    // Branchlessly select whether to do a "real" copy or a decoy copy,
-    // depending on whether we've gone off the end of the array or not.
-    //
-    // Pretty much everything needs to be laundered: we need to launder
-    // `byte_idx` for obvious reasons, and we need to launder the result of the
-    // select, so that the compiler cannot delete the resulting loads and
-    // stores. This is similar to having used `volatile uint32_t *`.
-    void *src = (void *)launderw(
-        ct_cmovw(ct_sltuw(launderw(byte_idx), byte_len), srcp, decoy1));
-    void *dest = (void *)launderw(
-        ct_cmovw(ct_sltuw(launderw(byte_idx), byte_len), destp, decoy2));
+    // Calculate pointers.
+    void *src = (void *)launderw(src_addr + byte_idx);
+    void *dest = (void *)launderw(dest_addr + byte_idx);
 
     // Perform the copy, without performing a typed dereference operation.
     write_32(read_32(src), dest);
   }
-
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
   HARDENED_CHECK_EQ(count, expected_count);
-}
 
-// The source of randomness for shred, which may be replaced at link-time.
-OT_WEAK
-uint32_t hardened_memshred_random_word(void) { return 0xcaffe17e; }
+  return OTCRYPTO_OK;
+}
 
-void hardened_memshred(uint32_t *dest, size_t word_len) {
+status_t hardened_memshred(uint32_t *dest, size_t word_len) {
   random_order_t order;
   random_order_init(&order, word_len);
 
@@ -91,25 +60,21 @@ void hardened_memshred(uint32_t *dest, size_t word_len) {
 
   uintptr_t data_addr = (uintptr_t)dest;
 
-  uint32_t decoys[8];
-  uintptr_t decoy_addr = (uintptr_t)&decoys;
-
-  size_t byte_len = word_len * sizeof(uint32_t);
   for (; count < expected_count; count = launderw(count) + 1) {
     size_t byte_idx = launderw(random_order_advance(&order)) * sizeof(uint32_t);
     barrierw(byte_idx);
 
-    uintptr_t datap = data_addr + byte_idx;
-    uintptr_t decoy = decoy_addr + (byte_idx % sizeof(decoys));
-
-    void *data = (void *)launderw(
-        ct_cmovw(ct_sltuw(launderw(byte_idx), byte_len), datap, decoy));
+    // Calculate pointer.
+    void *data = (void *)launderw(data_addr + byte_idx);
 
     // Write a freshly-generated random word to `*data`.
     write_32(hardened_memshred_random_word(), data);
   }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
 
   HARDENED_CHECK_EQ(count, expected_count);
+
+  return OTCRYPTO_OK;
 }
 
 hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs,
@@ -123,35 +88,18 @@ hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs,
   uintptr_t lhs_addr = (uintptr_t)lhs;
   uintptr_t rhs_addr = (uintptr_t)rhs;
 
-  // `decoys` needs to be filled with equal values this time around. It
-  // should be filled with values with a Hamming weight of around 16, which is
-  // the most common hamming weight among 32-bit words.
-  uint32_t decoys[8] = {
-      0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa,
-      0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa,
-  };
-  uintptr_t decoy_addr = (uintptr_t)&decoys;
-
   uint32_t zeros = 0;
   uint32_t ones = UINT32_MAX;
 
   // The loop is almost token-for-token the one above, but the copy is
   // replaced with something else.
-  size_t byte_len = word_len * sizeof(uint32_t);
   for (; count < expected_count; count = launderw(count) + 1) {
     size_t byte_idx = launderw(random_order_advance(&order)) * sizeof(uint32_t);
     barrierw(byte_idx);
 
-    uintptr_t ap = lhs_addr + byte_idx;
-    uintptr_t bp = rhs_addr + byte_idx;
-    uintptr_t decoy1 = decoy_addr + (byte_idx % sizeof(decoys));
-    uintptr_t decoy2 =
-        decoy_addr + ((byte_idx + sizeof(decoys) / 2) % sizeof(decoys));
-
-    void *av = (void *)launderw(
-        ct_cmovw(ct_sltuw(launderw(byte_idx), byte_len), ap, decoy1));
-    void *bv = (void *)launderw(
-        ct_cmovw(ct_sltuw(launderw(byte_idx), byte_len), bp, decoy2));
+    // Calculate pointers.
+    void *av = (void *)launderw(lhs_addr + byte_idx);
+    void *bv = (void *)launderw(rhs_addr + byte_idx);
 
     uint32_t a = read_32(av);
     uint32_t b = read_32(bv);
@@ -167,6 +115,7 @@ hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs,
     // has no chance to strength-reduce this operation.
     ones = launder32(ones) & (launder32(a) ^ ~b);
   }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
 
   HARDENED_CHECK_EQ(count, expected_count);
   if (launder32(zeros) == 0) {
@@ -177,3 +126,88 @@ hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs,
   HARDENED_CHECK_NE(ones, UINT32_MAX);
   return kHardenedBoolFalse;
 }
+
+status_t hardened_xor(const uint32_t *restrict x, const uint32_t *restrict y,
+                      size_t word_len, uint32_t *restrict dest) {
+  // Randomize the content of the output buffer before writing to it.
+  hardened_memshred(dest, word_len);
+
+  // Create a random variable rand.
+  uint32_t rand[word_len];
+  hardened_memshred(rand, word_len);
+
+  // Cast pointers to `uintptr_t` to erase their provenance.
+  uintptr_t x_addr = (uintptr_t)x;
+  uintptr_t y_addr = (uintptr_t)y;
+  uintptr_t dest_addr = (uintptr_t)dest;
+  uintptr_t rand_addr = (uintptr_t)&rand;
+
+  // Generate a random ordering.
+  random_order_t order;
+  random_order_init(&order, word_len);
+  size_t count = 0;
+  size_t expected_count = random_order_len(&order);
+
+  // XOR the mask with the first share. This loop is modelled off the one in
+  // `hardened_memcpy`; see the comments there for more details.
+  for (; launderw(count) < expected_count; count = launderw(count) + 1) {
+    size_t byte_idx = launderw(random_order_advance(&order)) * sizeof(uint32_t);
+
+    // Prevent the compiler from re-ordering the loop.
+    barrierw(byte_idx);
+
+    // Calculate pointers.
+    uintptr_t xp = x_addr + byte_idx;
+    uintptr_t yp = y_addr + byte_idx;
+    uintptr_t destp = dest_addr + byte_idx;
+    uintptr_t randp = rand_addr + byte_idx;
+
+    // Set the pointers.
+    void *xv = (void *)launderw(xp);
+    void *yv = (void *)launderw(yp);
+    void *destv = (void *)launderw(destp);
+    void *randv = (void *)launderw(randp);
+
+    // Perform the XORs: dest = ((x ^ rand) ^ y) ^ rand
+    write_32(read_32(xv) ^ read_32(randv), destv);
+    write_32(read_32(destv) ^ read_32(yv), destv);
+    write_32(read_32(destv) ^ read_32(randv), destv);
+  }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
+  HARDENED_CHECK_EQ(count, expected_count);
+
+  return OTCRYPTO_OK;
+}
+
+status_t hardened_xor_in_place(uint32_t *restrict x, const uint32_t *restrict y,
+                               size_t word_len) {
+  // Generate a random ordering.
+  random_order_t order;
+  random_order_init(&order, word_len);
+  size_t count = 0;
+  size_t expected_count = random_order_len(&order);
+
+  // Cast pointers to `uintptr_t` to erase their provenance.
+  uintptr_t x_addr = (uintptr_t)x;
+  uintptr_t y_addr = (uintptr_t)y;
+
+  // XOR the mask with the first share. This loop is modelled off the one in
+  // `hardened_memcpy`; see the comments there for more details.
+  for (; launderw(count) < expected_count; count = launderw(count) + 1) {
+    size_t byte_idx = launderw(random_order_advance(&order)) * sizeof(uint32_t);
+
+    // Prevent the compiler from re-ordering the loop.
+    barrierw(byte_idx);
+
+    // Calculate pointers.
+    void *xv = (void *)launderw(x_addr + byte_idx);
+    void *yv = (void *)launderw(y_addr + byte_idx);
+
+    // Perform an XOR in the array.
+    write_32(read_32(xv) ^ read_32(yv), xv);
+  }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
+  HARDENED_CHECK_EQ(count, expected_count);
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/base/hardened_memory.h b/sw/device/lib/base/hardened_memory.h
index 1f310b92ca982..1edeb9f7f4801 100644
--- a/sw/device/lib/base/hardened_memory.h
+++ b/sw/device/lib/base/hardened_memory.h
@@ -15,11 +15,19 @@
 
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/crypto/impl/status.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif  // __cplusplus
 
+/**
+ * Expects some external implementation of randomness to be linked.
+ *
+ * @return A fresh random word.
+ */
+extern uint32_t hardened_memshred_random_word(void);
+
 /**
  * Copies 32-bit words between non-overlapping regions.
  *
@@ -36,9 +44,10 @@ extern "C" {
  * @param dest The destination of the copy.
  * @param src The source of the copy.
  * @param word_len The number of words to copy.
+ * @return OK or error.
  */
-void hardened_memcpy(uint32_t *OT_RESTRICT dest,
-                     const uint32_t *OT_RESTRICT src, size_t word_len);
+status_t hardened_memcpy(uint32_t *OT_RESTRICT dest,
+                         const uint32_t *OT_RESTRICT src, size_t word_len);
 
 /**
  * Fills a 32-bit aligned region of memory with random data.
@@ -56,8 +65,9 @@ void hardened_memcpy(uint32_t *OT_RESTRICT dest,
  *
  * @param dest The destination of the set.
  * @param word_len The number of words to write.
+ * @return OK or error.
  */
-void hardened_memshred(uint32_t *dest, size_t word_len);
+status_t hardened_memshred(uint32_t *dest, size_t word_len);
 
 /**
  * Compare two potentially-overlapping 32-bit aligned regions of memory for
@@ -83,6 +93,41 @@ void hardened_memshred(uint32_t *dest, size_t word_len);
 hardened_bool_t hardened_memeq(const uint32_t *lhs, const uint32_t *rhs,
                                size_t word_len);
 
+/**
+ * Combines two word buffers with XOR and store the result in the dest. buffer.
+ *
+ * Performs dest = ((rand ^ x) ^ y) ^ rand
+ *
+ * Callers should ensure the entropy complex is up before calling this
+ * function. The implementation uses random-order hardening primitives for
+ * side-channel defense. Moreover, calles should ensure that the dest. buffer
+ * is different from the source buffers.
+ *
+ * @param x Pointer to the first operand.
+ * @param y Pointer to the second operand.
+ * @param word_len Length in words of each operand.
+ * @param dest[out] Pointer to the output buffer.
+ * @return OK or error.
+ */
+status_t hardened_xor(const uint32_t *OT_RESTRICT x,
+                      const uint32_t *OT_RESTRICT y, size_t word_len,
+                      uint32_t *OT_RESTRICT dest);
+
+/**
+ * Combines two word buffers with XOR in-place.
+ *
+ * Callers should ensure the entropy complex is up before calling this
+ * function. The implementation uses random-order hardening primitives for
+ * side-channel defense.
+ *
+ * @param[in,out] x Pointer to the first operand (modified in-place).
+ * @param y Pointer to the second operand.
+ * @param word_len Length in words of each operand.
+ * @return OK or error.
+ */
+status_t hardened_xor_in_place(uint32_t *OT_RESTRICT x,
+                               const uint32_t *OT_RESTRICT y, size_t word_len);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/lib/base/hardened_memory_unittest.cc b/sw/device/lib/base/hardened_memory_unittest.cc
index fda21d1c8e4ce..c10bfb947d091 100644
--- a/sw/device/lib/base/hardened_memory_unittest.cc
+++ b/sw/device/lib/base/hardened_memory_unittest.cc
@@ -33,7 +33,10 @@ constexpr uint32_t kRandomWord = 0xdeadbeef;
 
 // Override whatever the default randomness source is so we can verify it
 // actually gets used.
-extern "C" size_t hardened_memshred_random_word() { return kRandomWord; }
+extern "C" uint32_t hardened_memshred_random_word() { return kRandomWord; }
+
+// Provides "randomness" for random_order.
+extern "C" uint32_t random_order_random_word() { return kRandomWord; }
 
 TEST(HardenedMemory, MemShred) {
   std::vector<uint32_t> xs = {1, 2, 3, 4, 5, 6, 7, 8};
diff --git a/sw/device/lib/base/macros.h b/sw/device/lib/base/macros.h
index b18e09739a2ba..19f11bb8d7608 100644
--- a/sw/device/lib/base/macros.h
+++ b/sw/device/lib/base/macros.h
@@ -689,8 +689,9 @@ class SignConverter {
 };
 }  // namespace
 }
-#define OT_SIGNED(value) (SignConverter<typeof(value)>::as_signed((value)))
-#define OT_UNSIGNED(value) (SignConverter<typeof(value)>::as_unsigned((value)))
+#define OT_SIGNED(value) (SignConverter<__typeof__(value)>::as_signed((value)))
+#define OT_UNSIGNED(value) \
+  (SignConverter<__typeof__(value)>::as_unsigned((value)))
 #endif  // __cplusplus
 #endif  // !defined(__ASSEMBLER__) && !defined(NOSTDINC) &&
         // !defined(RUST_PREPROCESSOR_EMIT)
@@ -718,4 +719,35 @@ class SignConverter {
 // need to be saved.  The two that do not are `sp` and `gp` (x2 and x3).
 #define OT_CONTEXT_SIZE (OT_WORD_SIZE * 30)
 
+/**
+ * A macro that returns the minimum of two values.
+ *
+ * @param a First value.
+ * @param b Second value.
+ */
+#ifndef MIN
+#define MIN(a, b)       \
+  ({                    \
+    typeof(a) _a = (a); \
+    typeof(b) _b = (b); \
+    _a < _b ? _a : _b;  \
+  })
+#endif
+
+/**
+ * A macro that returns the maximum of two values.
+ *
+ * @param a First value.
+ * @param b Second value.
+ *
+ */
+#ifndef MAX
+#define MAX(a, b)       \
+  ({                    \
+    typeof(a) _a = (a); \
+    typeof(b) _b = (b); \
+    _a > _b ? _a : _b;  \
+  })
+#endif
+
 #endif  // OPENTITAN_SW_DEVICE_LIB_BASE_MACROS_H_
diff --git a/sw/device/lib/base/memory_unittest.cc b/sw/device/lib/base/memory_unittest.cc
index 8fd19572118a6..5ae32988c4c4b 100644
--- a/sw/device/lib/base/memory_unittest.cc
+++ b/sw/device/lib/base/memory_unittest.cc
@@ -245,6 +245,54 @@ TEST_P(MemCmpTest, Properties) {
   EXPECT_GT(memcmp_func(zs, xs, kLen), 0);
 }
 
+TEST_P(MemCmpTest, UnalignedHeadTest) {
+  auto memcmp_func = GetParam();
+
+  constexpr size_t kLen = 8;
+  alignas(uint32_t) constexpr uint8_t xs[kLen] = {0, 0, 0, 0, 0, 0, 0, 0};
+  alignas(uint32_t) constexpr uint8_t ys[kLen] = {0, 1, 0, 0, 0, 0, 0, 0};
+
+  // Reflexive property.
+  EXPECT_EQ(memcmp_func(xs + 1, xs + 1, kLen - 1), 0);
+  EXPECT_EQ(memcmp_func(ys + 1, ys + 1, kLen - 1), 0);
+  // Transitive property for less-than result.
+  EXPECT_LT(memcmp_func(xs + 1, ys + 1, kLen - 1), 0);
+  // Transitive property for greater-than result.
+  EXPECT_GT(memcmp_func(ys + 1, xs + 1, kLen - 1), 0);
+}
+
+TEST_P(MemCmpTest, UnalignedTailTest) {
+  auto memcmp_func = GetParam();
+
+  constexpr size_t kLen = 6;
+  alignas(uint32_t) constexpr uint8_t xs[kLen] = {0, 0, 0, 0, 0, 0};
+  alignas(uint32_t) constexpr uint8_t ys[kLen] = {0, 0, 0, 0, 0, 1};
+
+  // Reflexive property.
+  EXPECT_EQ(memcmp_func(xs, xs, kLen), 0);
+  EXPECT_EQ(memcmp_func(ys, ys, kLen), 0);
+  // Transitive property for less-than result.
+  EXPECT_LT(memcmp_func(xs, ys, kLen), 0);
+  // Transitive property for greater-than result.
+  EXPECT_GT(memcmp_func(ys, xs, kLen), 0);
+}
+
+TEST_P(MemCmpTest, AlignedBodyTest) {
+  auto memcmp_func = GetParam();
+
+  constexpr size_t kLen = 4;
+  alignas(uint32_t) constexpr uint8_t xs[kLen] = {0, 0, 0, 0};
+  alignas(uint32_t) constexpr uint8_t ys[kLen] = {0, 0, 0, 1};
+
+  // Reflexive property.
+  EXPECT_EQ(memcmp_func(xs, xs, kLen), 0);
+  EXPECT_EQ(memcmp_func(ys, ys, kLen), 0);
+  // Transitive property for less-than result.
+  EXPECT_LT(memcmp_func(xs, ys, kLen), 0);
+  // Transitive property for greater-than result.
+  EXPECT_GT(memcmp_func(ys, xs, kLen), 0);
+}
+
 TEST_P(MemCmpTest, DoesNotUseSystemEndianness) {
   auto memcmp_func = GetParam();
 
diff --git a/sw/device/lib/base/random_order.c b/sw/device/lib/base/random_order.c
index c6d367c7fe79b..53246671ac991 100644
--- a/sw/device/lib/base/random_order.c
+++ b/sw/device/lib/base/random_order.c
@@ -5,15 +5,32 @@
 #include "sw/device/lib/base/random_order.h"
 
 #include "sw/device/lib/base/bitfield.h"
-
-// TODO: The current implementation is just a skeleton, and currently just
-// traverses from 0 to `min_len * 2`.
+#include "sw/device/lib/base/hardened.h"
 
 void random_order_init(random_order_t *ctx, size_t min_len) {
-  ctx->state = 0;
-  ctx->max = min_len * 2;
+  ctx->ctr = 0;
+  if (min_len > 0) {
+    ctx->state = random_order_random_word() % min_len;
+  } else {
+    ctx->state = 0;
+  }
+  ctx->max = min_len;
 }
 
 size_t random_order_len(const random_order_t *ctx) { return ctx->max; }
 
-size_t random_order_advance(random_order_t *ctx) { return ctx->state++; }
+size_t random_order_advance(random_order_t *ctx) {
+  size_t out = ctx->state;
+  // Compute the next value and next value if we overflow max.
+  size_t next = ctx->state + 1;
+  size_t next_overflow = next - ctx->max;
+
+  // Is next strictly less than max?
+  ct_bool32_t which = ct_sltu32(next, ctx->max);
+  // If yes, choose next, else next_overflow.
+  ctx->state = ct_cmov32(which, next, next_overflow);
+
+  ctx->ctr = launder32(ctx->ctr) + 1;
+  HARDENED_CHECK_LE(ctx->state, ctx->max);
+  return out;
+}
diff --git a/sw/device/lib/base/random_order.h b/sw/device/lib/base/random_order.h
index 87e28cecd03ce..9039cf855bfe7 100644
--- a/sw/device/lib/base/random_order.h
+++ b/sw/device/lib/base/random_order.h
@@ -6,6 +6,9 @@
 #define OPENTITAN_SW_DEVICE_LIB_BASE_RANDOM_ORDER_H_
 
 #include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -16,34 +19,58 @@ extern "C" {
  * @brief Functions for generating random traversal orders.
  */
 
+/**
+ * Expects some external implementation of randomness to be linked.
+ *
+ * @return A fresh random word.
+ */
+extern uint32_t random_order_random_word(void);
+
 /**
  * Context for a random traversal order.
  *
  * A "random traversal order" specifies a random order to walk through some
  * buffer of length `n`, which is an important building block for
  * constant-power code. Given `n`, the random order emits integers in the
- * range `0..m`, where `m` is an implementation-defined, per-random-order
- * value greater than `n`. The order is guaranteed to visit each integer in
- * `0..n` at least once, but with some caveats:
- * - Values greater than `n` may be returned.
- * - The same value may be returned multiple times.
- *
- * Users must be mindful of these constraints when using `random_order_t`.
- * These caveats are intended to allow for implementation flexibility, such as
- * intentionally adding decoys to the sequence.
+ * range `[0..n)` with a randomized starting point in that range.
  */
 typedef struct random_order {
+  /**
+   * Next index to return.
+   */
   size_t state;
+  /**
+   * Maximum index to return (exclusive).
+   */
   size_t max;
+  /**
+   * Total number of iterations so far.
+   */
+  size_t ctr;
 } random_order_t;
 
+/**
+ * Hardened check that a random_order iteration is complete.
+ *
+ * @param ctx The context to check.
+ */
+#define RANDOM_ORDER_HARDENED_CHECK_DONE(ctx_) \
+  HARDENED_CHECK_EQ(ctx_.max, ctx_.ctr)
+
 /**
  * Constructs a new, randomly-seeded traversal order,
  * running from `0` to at least `min_len`.
  *
+ * NOTE: although it is not an error to initialize a context with a length of
+ * zero, it is an error to `advance` when the length is zero.
+ *
  * This function does not take a seed as input; instead, the seed is
  * extracted, in some manner or another, from the hardware by this function.
  *
+ * The EDN must be initialized before calling this function, since it uses the
+ * Ibex RND interface and will wait until entropy is available.
+ *
+ * @param rnd Function to call for fresh randomness.
  * @param ctx The context to initialize.
  * @param min_len The minimum length this traversal order must visit.
  */
@@ -52,10 +79,6 @@ void random_order_init(random_order_t *ctx, size_t min_len);
 /**
  * Returns the length of the sequence represented by `ctx`.
  *
- * This value may be greater than `min_len` specified in
- * `random_order_init()`, but the sequence is guaranteed to contain every
- * integer in `0..min_len`.
- *
  * This value represents the number of times `random_order_advance()` may be
  * called.
  *
diff --git a/sw/device/lib/base/random_order_unittest.cc b/sw/device/lib/base/random_order_unittest.cc
new file mode 100644
index 0000000000000..76192cc7d4003
--- /dev/null
+++ b/sw/device/lib/base/random_order_unittest.cc
@@ -0,0 +1,92 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/random_order.h"
+
+#include <vector>
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+
+namespace random_order_unittest {
+namespace {
+
+using ::testing::Each;
+using ::testing::ElementsAre;
+
+uint32_t current_random_word = 0xdeadbeef;
+
+extern "C" uint32_t random_order_random_word(void) {
+  return current_random_word;
+}
+
+/**
+ * Basic invariant checks on a random order context.
+ *
+ * @param ctx Context to check.
+ * @param len Length of the target iteration sequence.
+ */
+static void ctx_check(random_order_t *ctx, size_t len) {
+  // `state` should always be strictly less than the max when
+  // the max is non-zero.
+  if (ctx->max > 0) {
+    EXPECT_LT(ctx->state, ctx->max);
+  } else {
+    EXPECT_EQ(ctx->state, ctx->max);
+  }
+}
+
+TEST(RandomOrder, InitSmallTest) {
+  // Check that values are OK for several small `min_len` values.
+  random_order_t ctx;
+  for (size_t i = 0; i < 100; i++) {
+    random_order_init(&ctx, i);
+    ctx_check(&ctx, i);
+  }
+}
+
+TEST(RandomOrder, InitLargeTest) {
+  // Check that values are OK for several large `min_len` values.
+  random_order_t ctx;
+  for (size_t i = 0; i < 100; i++) {
+    uint32_t len = UINT32_MAX - i;
+    random_order_init(&ctx, len);
+    ctx_check(&ctx, len);
+  }
+}
+
+TEST(RandomOrder, InitRndZeroTest) {
+  // Check that zeroes are handled appropriately.
+  size_t len = 10;
+  uint32_t tmp = current_random_word;
+  current_random_word = 0;
+  random_order_t ctx;
+  random_order_init(&ctx, len);
+  ctx_check(&ctx, len);
+  current_random_word = tmp;
+}
+
+TEST(RandomOrder, SpecTest) {
+  // Ensure that advancing through the random order struct hits all numbers in
+  // the target sequence.
+  size_t len = 100;
+  random_order_t ctx;
+  random_order_init(&ctx, len);
+
+  std::vector<bool> hit(len);
+  for (size_t i = 0; i < len; i++) {
+    hit[i] = false;
+  }
+
+  for (size_t i = 0; i < random_order_len(&ctx); i++) {
+    uint32_t j = random_order_advance(&ctx);
+    hit[j] = true;
+  }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(ctx);
+
+  EXPECT_THAT(hit, Each(true));
+}
+
+}  // namespace
+}  // namespace random_order_unittest
diff --git a/sw/device/lib/base/status.c b/sw/device/lib/base/status.c
index 5a4e3a4be64f2..30a1b88f825ea 100644
--- a/sw/device/lib/base/status.c
+++ b/sw/device/lib/base/status.c
@@ -11,14 +11,17 @@
 
 const uint32_t MODULE_ID = 0;
 
-static const char *basename(const char *file) {
+static const char *basename(const char *file, size_t *basename_len) {
   const char *f = file;
   // Go to the end of the string.
   while (*f)
     ++f;
   // Back up to the start of the last filename path component.
-  while (f > file && f[-1] != '/' && f[-1] != '\\')
+  *basename_len = 0;
+  while (f > file && f[-1] != '/' && f[-1] != '\\') {
+    ++(*basename_len);
     --f;
+  }
   return f;
 }
 
@@ -47,8 +50,10 @@ status_t status_create(absl_status_t code, uint32_t module_id, const char *file,
    */
   if (module_id == 0) {
     // First three characters of the filename.
-    const char *f = basename(file);
-    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+    size_t basename_len = 0;
+    const char *f = basename(file, &basename_len);
+    module_id = basename_len >= 3 ? MAKE_MODULE_ID(f[0], f[1], f[2])
+                                  : MAKE_MODULE_ID('u', 'n', 'd');
   }
   // At this point, the module_id is already packed into the correct bitfield.
   return (status_t){
diff --git a/sw/device/lib/coverage/BUILD b/sw/device/lib/coverage/BUILD
new file mode 100644
index 0000000000000..64ca763f35444
--- /dev/null
+++ b/sw/device/lib/coverage/BUILD
@@ -0,0 +1,118 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:linker.bzl", "ld_library")
+load("@bazel_skylib//rules:common_settings.bzl", "bool_flag")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
+
+package(default_visibility = ["//visibility:public"])
+
+cc_library(
+    name = "api",
+    hdrs = ["api.h"],
+    deps = [
+        "//sw/device/lib/base:macros",
+    ],
+)
+
+cc_library(
+    name = "api_asm",
+    hdrs = ["api_asm.h"],
+    deps = [
+        ":api",
+    ],
+)
+
+cc_library(
+    name = "printer",
+    srcs = ["printer.c"],
+    hdrs = ["printer.h"],
+    features = ["-coverage"],
+    deps = [
+        "//sw/device/lib/base:crc32",
+        "//sw/device/lib/base:macros",
+    ],
+    alwayslink = True,  # replacing weak symbol
+)
+
+cc_library(
+    name = "ottf_runtime_real",
+    srcs = ["ottf_runtime.c"],
+    features = ["-coverage"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":printer",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing/test_framework:ottf_console",
+    ],
+    alwayslink = True,  # replacing weak symbol
+)
+
+cc_library(
+    name = "ottf_runtime_skip",
+    srcs = ["ottf_runtime_skip.c"],
+    features = ["-coverage"],
+    deps = [
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing/test_framework:ottf_console",
+    ],
+    alwayslink = True,  # replacing weak symbol
+)
+
+alias(
+    name = "ottf_runtime",
+    actual = select({
+        "//rules/coverage:instrumented": ":ottf_runtime_real",
+        "//rules/coverage:enabled": ":ottf_runtime_skip",
+        "//conditions:default": "//sw/device:nothing",
+    }),
+)
+
+cc_library(
+    name = "uart_runtime_real",
+    srcs = ["uart_runtime.c"],
+    features = ["-coverage"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":printer",
+        "//sw/device/lib/arch:device",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib/drivers:pinmux",
+        "//sw/device/silicon_creator/lib/drivers:uart",
+    ],
+    alwayslink = True,  # replacing weak symbol
+)
+
+cc_library(
+    name = "uart_runtime_skip",
+    srcs = ["uart_runtime_skip.c"],
+    features = ["-coverage"],
+    deps = [
+        "//sw/device/lib/arch:device",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib/drivers:pinmux",
+        "//sw/device/silicon_creator/lib/drivers:uart",
+    ],
+    alwayslink = True,  # replacing weak symbol
+)
+
+alias(
+    name = "uart_runtime",
+    actual = select({
+        "//rules/coverage:instrumented": ":uart_runtime_real",
+        "//rules/coverage:enabled": ":uart_runtime_skip",
+        "//conditions:default": "//sw/device:nothing",
+    }),
+)
+
+ld_library(
+    name = "coverage_sections",
+    includes = [
+        "bss.ld",
+        "info.ld",
+        "rodata.ld",
+    ],
+)
diff --git a/sw/device/lib/coverage/api.h b/sw/device/lib/coverage/api.h
new file mode 100644
index 0000000000000..e97ab36a040e0
--- /dev/null
+++ b/sw/device/lib/coverage/api.h
@@ -0,0 +1,61 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_H_
+#define OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+
+#ifdef OT_COVERAGE_ENABLED
+
+/**
+ * Initializes the coverage counter region in RAM to an "uncovered" state.
+ *
+ * The validity flag is set after initialization.
+ *
+ * This function is no-op in non-coverage builds.
+ */
+void coverage_init(void);
+
+/**
+ * Triggers a coverage report dump.
+ *
+ * If the coverage data is valid, it compresses the counter data and sends the
+ * report.
+ *
+ * The function is usually called from shutdown hooks (e.g., shutdown_finalize),
+ * before boot stage handoff, or at the end of a test.
+ *
+ * This function is no-op in non-coverage builds.
+ */
+void coverage_report(void);
+
+/**
+ * Invalidates the coverage data.
+ *
+ * Called before handing off execution to a subsequent boot stage (e.g., from
+ * ROM_EXT to the owner software) to prevent reporting data from a previous
+ * stage.
+ *
+ * This function is no-op in non-coverage builds.
+ */
+void coverage_invalidate(void);
+
+#else  // OT_COVERAGE_ENABLED
+
+#define coverage_init(...) \
+  do {                     \
+  } while (0)
+#define coverage_report(...) \
+  do {                       \
+  } while (0)
+#define coverage_invalidate(...) \
+  do {                           \
+  } while (0)
+
+#endif  // OT_COVERAGE_ENABLED
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_H_
diff --git a/sw/device/lib/coverage/api_asm.h b/sw/device/lib/coverage/api_asm.h
new file mode 100644
index 0000000000000..fe48afbce6548
--- /dev/null
+++ b/sw/device/lib/coverage/api_asm.h
@@ -0,0 +1,33 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_ASM_H_
+#define OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_ASM_H_
+
+#ifdef OT_COVERAGE_INSTRUMENTED
+
+/**
+ * Initializes the coverage counter region in RAM to an "uncovered" state.
+ *
+ * The validity flag is set after initialization.
+ *
+ * This function is no-op in non-coverage builds.
+ */
+#define COVERAGE_ASM_INIT() call coverage_init;
+
+/**
+ * Initializes the transport runtime to send coverage report.
+ *
+ * This function is no-op in non-coverage builds.
+ */
+#define COVERAGE_ASM_TRANSPORT_INIT() call coverage_transport_init;
+
+#else  // OT_COVERAGE_INSTRUMENTED
+
+#define COVERAGE_ASM_INIT(...)
+#define COVERAGE_ASM_TRANSPORT_INIT(...)
+
+#endif  // OT_COVERAGE_INSTRUMENTED
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_COVERAGE_API_ASM_H_
diff --git a/sw/device/lib/coverage/bss.ld b/sw/device/lib/coverage/bss.ld
new file mode 100644
index 0000000000000..d11787399428d
--- /dev/null
+++ b/sw/device/lib/coverage/bss.ld
@@ -0,0 +1,48 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Partial Linker Script for OpenTitan Coverage Runtime
+ *
+ * This Linker Script contains all the bss sections that we need in the ELF file
+ * for the coverage runtime. This script is usually included after the last RAM
+ * section in the main linker script to minimize the difference between normal
+ * build and coverage build.
+ *
+ * This partial linker script requires the main linker script to define the
+ * following memory region or alias:
+ * - ram_main
+ */
+
+/* BSS Sections for LLVM coverage runtime. */
+__ot_coverage_bss (NOLOAD) : ALIGN(8) {
+  KEEP(*(__ot_coverage_bss))
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__ot_coverage_bss) == 0,
+    "__ot_coverage_bss section must be empty when coverage is disabled.");
+} > ram_main :NONE
+
+/* LLVM coverage counters. */
+. = ALIGN(8);
+__llvm_prf_cnts : AT(0x0) ALIGN(8) {
+  /* Set gap fill pattern to 0xa5 */
+  FILL(0xa5a5a5a5);
+
+  __llvm_prf_cnts_start = .;
+  KEEP(*(__llvm_prf_cnts_head))
+  KEEP(*(__llvm_prf_cnts))
+  __llvm_prf_cnts_values_end = .;
+  . = ALIGN(8);
+
+  __llvm_prf_cnts_end = .;
+
+  ASSERT(
+    _stack_start > ABSOLUTE(.),
+    "Allocated RAM overflow to stack region");
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__llvm_prf_cnts) == 0,
+    "__llvm_prf_cnts section must be empty when coverage is disabled.");
+} > ram_main :NONE
diff --git a/sw/device/lib/coverage/info.ld b/sw/device/lib/coverage/info.ld
new file mode 100644
index 0000000000000..80e8fc3325551
--- /dev/null
+++ b/sw/device/lib/coverage/info.ld
@@ -0,0 +1,66 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Partial Linker Script for OpenTitan Coverage Tools
+ *
+ * This Linker Script contains all the info sections that we need in the ELF
+ * file for the coverage tools.
+ *
+ * This script is included by the global one (sw/device/info_sections.ld).
+ */
+
+/**
+ * Profile data and names are moved to the INFO section due to device-side
+ * memory constraints. These data will be used with the counters on the host
+ * to reconstruct the LLVM profile.
+ */
+__llvm_prf_data 0x0 (INFO) : ALIGN(8) {
+  __llvm_prf_data_start = .;
+  KEEP(*(__llvm_prf_data))
+  __llvm_prf_data_end = .;
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__llvm_prf_data) == 0,
+    "__llvm_prf_data section must be empty when coverage is disabled.");
+}
+
+/**
+ * Profile data and names are moved to the INFO section due to device-side
+ * memory constraints. These data will be used with the counters on the host
+ * to reconstruct the LLVM profile.
+ */
+__llvm_prf_names 0x0 (INFO) : ALIGN(1) {
+  __llvm_prf_names_start = .;
+  KEEP(*(__llvm_prf_names))
+  __llvm_prf_names_end = .;
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__llvm_prf_names) == 0,
+    "__llvm_prf_names section must be empty when coverage is disabled.");
+}
+
+/**
+ * Sections required by the `llvm-cov` tool to map the collected profiles to
+ * source code lines.
+ */
+__llvm_covmap 0x0 (INFO) : ALIGN(8) {
+  KEEP(*(__llvm_covmap))
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__llvm_covmap) == 0,
+    "__llvm_covmap section must be empty when coverage is disabled.");
+}
+
+/**
+ * Sections required by the `llvm-cov` tool to map the collected profiles to
+ * source code lines.
+ */
+__llvm_covfun 0x0 (INFO) : ALIGN(8) {
+  KEEP(*(__llvm_covfun))
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(__llvm_covfun) == 0,
+    "__llvm_covfun section must be empty when coverage is disabled.");
+}
diff --git a/sw/device/lib/coverage/ottf_runtime.c b/sw/device/lib/coverage/ottf_runtime.c
new file mode 100644
index 0000000000000..c0f0c65ffe266
--- /dev/null
+++ b/sw/device/lib/coverage/ottf_runtime.c
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/coverage/printer.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+
+void coverage_transport_init(void) {
+  ottf_console_init();
+  base_printf("COVERAGE:OTTF\r\n");
+}
+
+void coverage_report(void) {
+  if (coverage_is_valid()) {
+    base_printf("== COVERAGE PROFILE START ==\r\n");
+    coverage_printer_run();
+    base_printf("== COVERAGE PROFILE END ==\r\n");
+  } else {
+    base_printf("== COVERAGE PROFILE INVALID ==\r\n");
+  }
+}
+
+void coverage_printer_sink(const void *data, size_t size) {
+  for (size_t i = 0; i < size; ++i) {
+    base_printf("%02x", ((uint8_t *)data)[i]);
+  }
+}
diff --git a/sw/device/lib/coverage/ottf_runtime_skip.c b/sw/device/lib/coverage/ottf_runtime_skip.c
new file mode 100644
index 0000000000000..ed2985bd742b7
--- /dev/null
+++ b/sw/device/lib/coverage/ottf_runtime_skip.c
@@ -0,0 +1,17 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+
+void coverage_transport_init(void) {
+  ottf_console_init();
+  base_printf("COV_SKIP:OTTF\r\n");
+}
+
+void coverage_init(void) {}
+
+void coverage_report(void) { base_printf("== COVERAGE PROFILE SKIP ==\r\n"); }
+
+void coverage_invalidate(void) {}
diff --git a/sw/device/lib/coverage/printer.c b/sw/device/lib/coverage/printer.c
new file mode 100644
index 0000000000000..ec5a53b5b4bc0
--- /dev/null
+++ b/sw/device/lib/coverage/printer.c
@@ -0,0 +1,186 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/coverage/printer.h"
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/crc32.h"
+#include "sw/device/lib/base/macros.h"
+
+enum {
+  // SHA-1 build ID
+  kBuildIdSize = 20,
+
+  // File magic: \x81OTCove\xff
+  kFileMagic = 0xff65766f43544f81ULL,
+};
+
+// symbols generated by linker.
+extern char __llvm_prf_cnts_start[];
+extern char __llvm_prf_cnts_end[];
+extern char _build_id_start[];
+extern char _build_id_end[];
+
+#define BUILD_ID ((uint8_t *)_build_id_end - kBuildIdSize)
+
+// The `build_id | 1` indicates the coverage data in the RAM is valid for the
+// binary with this build ID.
+#define VALID_COVERAGE ((*(uint32_t *)BUILD_ID) | 1)
+
+OT_SET_BSS_SECTION(
+    "__ot_coverage_bss",
+
+    /**
+     * When the linker finds a definition of this symbol, it knows to skip
+     * loading the object which contains the profiling runtime's static
+     * initializer. See
+     * https://clang.llvm.org/docs/SourceBasedCodeCoverage.html#using-the-profiling-runtime-without-static-initializers
+     * for more information.
+     */
+    int __llvm_profile_runtime;
+
+    /**
+     * Stores the current coverage counters validity.
+     *
+     * The `coverage_status` field stores the `build_id | 1` if the coverage
+     * report is valid. It gets cleared when the coverage report is invalidated.
+     */
+    static uint32_t coverage_status;
+
+    /**
+     * Stores the CRC of the ongoing coverage report stream.
+     */
+    static uint32_t coverage_crc;
+
+    /**
+     * End of `__ot_coverage_bss` section.
+     */
+);
+
+static void coverage_printer_sink_with_crc(const void *buf, size_t size) {
+  crc32_add(&coverage_crc, buf, size);
+  coverage_printer_sink(buf, size);
+}
+
+/**
+ * Compresses and send a span of `size` bytes of `tag` using RLE.
+ *
+ * @param tag The byte value that is being compressed (0x00 or 0xff).
+ * @param size The size of the span.
+ */
+static void coverage_compress_rle(uint8_t tag, uint32_t size) {
+  // assumption: the device is little-endian.
+  uint32_t buf[2] = {0, size};
+  if (size <= 0xfd) {
+    //  00    XX
+    // [tag][size]
+    buf[0] = 0x00000000 | ((uint32_t)tag << 24);
+    coverage_printer_sink_with_crc((uint8_t *)buf + 3, 2);
+  } else if (size <= 0xffff) {
+    //  00   fe  XXXX
+    // [tag][fe][size]
+    buf[0] = 0xfe000000 | ((uint32_t)tag << 16);
+    coverage_printer_sink_with_crc((uint8_t *)buf + 2, 4);
+  } else {
+    //  00   ff  XXXXXX
+    // [tag][ff][ size ]
+    buf[0] = 0xff000000 | ((uint32_t)tag << 16);
+    coverage_printer_sink_with_crc((uint8_t *)buf + 2, 5);
+  }
+}
+
+/**
+ * Compresses and send the `data` buffer using RLE and bit-packing.
+ *
+ * It assumes `data` only contains 0x00 and 0xff bytes.
+ *
+ * @param data The buffer to compress.
+ * @param size The size of the buffer.
+ */
+static void coverage_compress(unsigned char *data, size_t size) {
+  size_t i = 0;
+
+  // assumption: `coverage_is_valid` checks all bytes are either 0x00 or 0xff.
+  while (i < size) {
+    // Find next span.
+    size_t start = i;
+    uint8_t tag = data[i++];
+    while (i < size && data[i] == tag) {
+      i++;
+    }
+    size_t span_size = i - start;
+
+    // Check for fast alternating sequence
+    if (span_size < 8 && start + 8 <= size) {
+      // Pack next 8 bits as one byte, 0x00 as bit 1, 0xff as bit 0.
+      uint8_t packed_byte = 0;
+      for (uint8_t k = 0; k < 8; ++k) {
+        packed_byte |= ((data[start + k] + 1) << k);
+      }
+      coverage_printer_sink_with_crc(&packed_byte, 1);
+      i = start + 8;
+    } else {
+      coverage_compress_rle(tag, span_size);
+    }
+  }
+}
+
+void coverage_init(void) {
+  if (!coverage_is_valid()) {
+    // Initialize all coverage counter bytes to 0xff (uncovered).
+    //
+    // The linker script ensure the prf cnts section is aligned to 4-byte
+    // boundary.
+    uint32_t *ptr = (uint32_t *)__llvm_prf_cnts_start;
+    while (ptr < (uint32_t *)__llvm_prf_cnts_end) {
+      *ptr++ = 0xffffffff;
+    }
+
+    // Set the report as valid.
+    coverage_status = VALID_COVERAGE;
+  }
+}
+
+void coverage_printer_run(void) {
+  crc32_init(&coverage_crc);
+
+  const uint64_t magic = kFileMagic;
+  coverage_printer_sink_with_crc(&magic, sizeof(magic));
+  coverage_printer_sink_with_crc((unsigned char *)BUILD_ID, kBuildIdSize);
+
+  size_t cnts_size =
+      (size_t)__llvm_prf_cnts_end - (size_t)__llvm_prf_cnts_start;
+  uint8_t *cnts = (uint8_t *)__llvm_prf_cnts_start;
+  coverage_compress(cnts, cnts_size);
+
+  coverage_crc = crc32_finish(&coverage_crc);
+  coverage_printer_sink(&coverage_crc, sizeof(coverage_crc));
+}
+
+void coverage_invalidate(void) {
+  // Set to any even value (i.e., without LSB).
+  coverage_status = 0;
+}
+
+bool coverage_is_valid(void) {
+  if (coverage_status != VALID_COVERAGE) {
+    return false;
+  }
+
+  // Ensures all coverage counters are either 0x00 or 0xff.
+  //
+  // We use Clang's single-byte coverage mode. Each counter byte is a boolean
+  // representing whether the corresponding region is either covered (0x00) or
+  // uncovered (0xff).
+  uint8_t *ptr = (uint8_t *)__llvm_prf_cnts_start;
+  while (ptr < (uint8_t *)__llvm_prf_cnts_end) {
+    uint8_t counter = *ptr++;
+    if (counter != 0x00 && counter != 0xff) {
+      return false;
+    }
+  }
+
+  return true;
+}
diff --git a/sw/device/lib/coverage/printer.h b/sw/device/lib/coverage/printer.h
new file mode 100644
index 0000000000000..c1537e157ae31
--- /dev/null
+++ b/sw/device/lib/coverage/printer.h
@@ -0,0 +1,72 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_COVERAGE_PRINTER_H_
+#define OPENTITAN_SW_DEVICE_LIB_COVERAGE_PRINTER_H_
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/* External common runtime APIs */
+
+/**
+ * @brief Checks if the current coverage report is valid.
+ *
+ * A report can be invalidated if the device resets or if
+ * `coverage_invalidate()` is explicitly called.
+ *
+ * @return true if the report is valid.
+ */
+bool coverage_is_valid(void);
+
+/**
+ * @brief Invalidates the current coverage report.
+ *
+ * This function sets an internal status flag to mark the current coverage data
+ * as invalid, typically used to indicate a failed test or an unexpected reset.
+ */
+void coverage_invalidate(void);
+
+/**
+ * @brief Initializes the coverage data.
+ *
+ * This function initializes the LLVM coverage counters to a uncovered (0xFF)
+ * and sets up the initial validity status for the coverage report.
+ */
+void coverage_init(void);
+
+/* Internal APIs for actual runtime */
+
+/**
+ * @brief Console sink provided by the actual runtime.
+ *
+ * This function is an external dependency that must be implemented by the
+ * specific runtime environment (e.g., UART, OTTF) to output the raw coverage
+ * data.
+ *
+ * @param data Pointer to the data buffer to be sent.
+ * @param size The number of bytes to send.
+ */
+extern void coverage_printer_sink(const void *data, size_t size);
+
+/**
+ * @brief Constructs the profile report and sends it via
+ * `coverage_printer_sink`.
+ *
+ * This function gathers the LLVM coverage counter data, compresses it,
+ * calculates a CRC, and sends the final report through the
+ * `coverage_printer_sink`.
+ */
+void coverage_printer_run(void);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_COVERAGE_PRINTER_H_
diff --git a/sw/device/lib/coverage/rodata.ld b/sw/device/lib/coverage/rodata.ld
new file mode 100644
index 0000000000000..b68a342e182dc
--- /dev/null
+++ b/sw/device/lib/coverage/rodata.ld
@@ -0,0 +1,30 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Partial Linker Script for OpenTitan Coverage Runtime
+ *
+ * This Linker Script contains all the rodata sections that we need in the ELF
+ * file for the coverage runtime. This script is usually included after the last
+ * rodata section in the main linker script to minimize the difference between
+ * normal build and coverage build.
+ *
+ * This partial linker script requires the main linker script to define the
+ * following memory region or alias:
+ * - coverage_flash
+ */
+
+/**
+ * Build ID for coverage profile correlation.
+ */
+.note.gnu.build-id : ALIGN(4) {
+  _build_id_start = .;
+  *(.note.build-id)
+  *(.note.gnu.build-id)
+  _build_id_end = .;
+
+  ASSERT(
+    DEFINED(_ot_coverage_enabled) || SIZEOF(.note.gnu.build-id) == 0,
+    "Build ID section must be empty when coverage is disabled.");
+} > coverage_flash
diff --git a/sw/device/lib/coverage/uart_runtime.c b/sw/device/lib/coverage/uart_runtime.c
new file mode 100644
index 0000000000000..67a513a1537fb
--- /dev/null
+++ b/sw/device/lib/coverage/uart_runtime.c
@@ -0,0 +1,38 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/coverage/printer.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
+#include "sw/device/silicon_creator/lib/drivers/uart.h"
+
+void coverage_transport_init(void) {
+  pinmux_init_uart0_tx();
+  uart_init(kUartNCOValue);
+
+  dbg_puts("COVERAGE:UART\r\n");
+  while (!uart_tx_idle()) {
+  }
+}
+
+void coverage_report(void) {
+  if (coverage_is_valid()) {
+    dbg_puts("== COVERAGE PROFILE START ==\r\n");
+    coverage_printer_run();
+    dbg_puts("== COVERAGE PROFILE END ==\r\n");
+  } else {
+    dbg_puts("== COVERAGE PROFILE INVALID ==\r\n");
+  }
+
+  // Wait until the report is sent.
+  while (!uart_tx_idle()) {
+  }
+}
+
+void coverage_printer_sink(const void *data, size_t size) {
+  for (size_t i = 0; i < size; ++i) {
+    uart_write_hex(((uint8_t *)data)[i], 1, 0);
+  }
+}
diff --git a/sw/device/lib/coverage/uart_runtime_skip.c b/sw/device/lib/coverage/uart_runtime_skip.c
new file mode 100644
index 0000000000000..0311c31dbbe58
--- /dev/null
+++ b/sw/device/lib/coverage/uart_runtime_skip.c
@@ -0,0 +1,29 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
+#include "sw/device/silicon_creator/lib/drivers/uart.h"
+
+void coverage_transport_init(void) {
+  pinmux_init_uart0_tx();
+  uart_init(kUartNCOValue);
+
+  dbg_puts("COV_SKIP:UART\r\n");
+  while (!uart_tx_idle()) {
+  }
+}
+
+void coverage_init(void) {}
+
+void coverage_report(void) {
+  dbg_puts("== COVERAGE PROFILE SKIP ==\r\n");
+
+  // Wait until the report is sent.
+  while (!uart_tx_idle()) {
+  }
+}
+
+void coverage_invalidate(void) {}
diff --git a/sw/device/lib/crt/BUILD b/sw/device/lib/crt/BUILD
index a75f6c90b2d14..ef32aad8eb7d5 100644
--- a/sw/device/lib/crt/BUILD
+++ b/sw/device/lib/crt/BUILD
@@ -4,7 +4,7 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 cc_library(
     name = "crt",
diff --git a/sw/device/lib/crypto/BUILD b/sw/device/lib/crypto/BUILD
index 83af3193c001e..8d8b4fb518317 100644
--- a/sw/device/lib/crypto/BUILD
+++ b/sw/device/lib/crypto/BUILD
@@ -14,13 +14,21 @@ ot_static_library(
     name = "otcrypto",
     deps = [
         "//sw/device/lib/crypto/impl:aes",
+        "//sw/device/lib/crypto/impl:aes_gcm",
         "//sw/device/lib/crypto/impl:drbg",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:kdf",
+        "//sw/device/lib/crypto/impl:ecc_p256",
+        "//sw/device/lib/crypto/impl:ecc_p384",
+        "//sw/device/lib/crypto/impl:ed25519",
+        "//sw/device/lib/crypto/impl:hkdf",
+        "//sw/device/lib/crypto/impl:hmac",
+        "//sw/device/lib/crypto/impl:kdf_ctr",
         "//sw/device/lib/crypto/impl:key_transport",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:kmac",
+        "//sw/device/lib/crypto/impl:kmac_kdf",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/impl:sha3",
+        "//sw/device/lib/crypto/impl:x25519",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
diff --git a/sw/device/lib/crypto/data/crypto_testplan.hjson b/sw/device/lib/crypto/data/crypto_testplan.hjson
index d243e55a0405d..09cc9cd4b78d1 100644
--- a/sw/device/lib/crypto/data/crypto_testplan.hjson
+++ b/sw/device/lib/crypto/data/crypto_testplan.hjson
@@ -11,7 +11,7 @@
             Run the hash algorithms Sha256, Sha384 and Sha512 and compare the digist against
             the NIST test vector.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: [
@@ -31,10 +31,9 @@
             Run the follow operations and compare the result against the NIST test vector:
              - ECDSA signature.
              - ECDSA signature verification.
-             - ECDH signature.
-             - ECDH signature verification.
+             - ECDH key exchange.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: [
@@ -54,9 +53,9 @@
             platform (FPGA or Silicon).
             For each key pair:
              - Sign a message with the private key.
-             - Verify the signarue with public key.
+             - Verify the signature with the public key.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: [
@@ -75,7 +74,7 @@
              - RSA signature verification.
             With the keys sizes 2048, 3072 and 4096 bits.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: [
@@ -84,8 +83,6 @@
         "//sw/device/tests/crypto:rsa_2048_signature_functest",
         "//sw/device/tests/crypto:rsa_3072_encryption_functest",
         "//sw/device/tests/crypto:rsa_3072_signature_functest",
-        "//sw/device/tests/crypto:rsa_3072_verify_functest_hardcoded",
-        "//sw/device/tests/crypto:rsa_3072_verify_functest_wycheproof",
         "//sw/device/tests/crypto:rsa_4096_encryption_functest",
         "//sw/device/tests/crypto:rsa_4096_signature_functest",
       ]
@@ -96,12 +93,12 @@
       desc: '''Check that the aes implementation is correct.
 
             Run the following operations and compare the result against the NIST test vector:
-             - AES-CDC encryption.
-             - AES-CDC decryption.
+             - AES-CBC encryption.
+             - AES-CBC decryption.
              - AES-GCM encryption.
              - AES-GCM decryption.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: [
@@ -119,7 +116,7 @@
             Generate symmetric keys using entropy from the CSRNG and check it quality using
             a statistical test.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: ["//sw/device/tests/crypto:symmetric_keygen_functest"]
@@ -131,7 +128,7 @@
 
             Initialize the PRNG with a known seed and compare the entropy generated against a test vector.
       '''
-      stage: NA
+      stage: N.A.
       si_stage: SV3
       tests: []
       bazel: ["//sw/device/tests/crypto/cryptotest:drbg_kat"]
diff --git a/sw/device/lib/crypto/drivers/BUILD b/sw/device/lib/crypto/drivers/BUILD
index 9daa671f30aa3..383e7931abbe4 100644
--- a/sw/device/lib/crypto/drivers/BUILD
+++ b/sw/device/lib/crypto/drivers/BUILD
@@ -4,13 +4,21 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules:autogen.bzl", "autogen_cryptolib_build_info")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
+load(
+    "//rules:cross_platform.bzl",
+    "dual_cc_device_library_of",
+    "dual_cc_library",
+    "dual_inputs",
+)
 load(
     "//rules/opentitan:defs.bzl",
     "EARLGREY_TEST_ENVS",
     "cw310_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
     "verilator_params",
 )
 load(
@@ -18,17 +26,22 @@ load(
     "dicts",
 )
 
+autogen_cryptolib_build_info(name = "cryptolib_build_info")
+
 cc_library(
     name = "aes",
     srcs = ["aes.c"],
     hdrs = ["aes.h"],
     deps = [
         ":entropy",
+        ":rv_core_ibex",
         "//hw/ip/aes/data:aes_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:crc32",
         "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/impl:status",
     ],
@@ -43,6 +56,7 @@ opentitan_test(
     ),
     deps = [
         ":aes",
+        ":rv_core_ibex",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/impl:status",
@@ -59,10 +73,12 @@ cc_library(
     ],
     deps = [
         ":entropy",
+        ":rv_core_ibex",
         "//hw/ip/keymgr/data:keymgr_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/impl:status",
         "//sw/device/lib/runtime:hart",
@@ -78,8 +94,10 @@ opentitan_test(
         {
             # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:sim_qemu_sival_rom_ext": "qemu_broken",
         },
     ),
+    qemu_broken = qemu_params(tags = ["broken"]),
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -103,6 +121,7 @@ cc_library(
     ],
     deps = [
         ":entropy",
+        ":rv_core_ibex",
         "//hw/ip/kmac/data:kmac_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
@@ -113,23 +132,30 @@ cc_library(
     ],
 )
 
-cc_library(
+dual_cc_library(
     name = "entropy",
-    srcs = ["entropy.c"],
+    srcs = dual_inputs(
+        device = ["entropy.c"],
+        host = ["mock_entropy.cc"],
+    ),
     hdrs = ["entropy.h"],
-    deps = [
-        "//hw/ip/csrng/data:csrng_c_regs",
-        "//hw/ip/edn/data:edn_c_regs",
-        "//hw/ip/entropy_src/data:entropy_src_c_regs",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:abs_mmio",
-        "//sw/device/lib/base:bitfield",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:macros",
-        "//sw/device/lib/base:math",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/crypto/impl:status",
-    ],
+    deps = dual_inputs(
+        device = [
+            "//hw/ip/csrng/data:csrng_c_regs",
+            "//hw/ip/edn/data:edn_c_regs",
+            "//hw/ip/entropy_src/data:entropy_src_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:abs_mmio",
+            "//sw/device/lib/base:bitfield",
+            "//sw/device/lib/base:hardened",
+            "//sw/device/lib/base:macros",
+            "//sw/device/lib/base:math",
+            "//sw/device/lib/base:memory",
+        ],
+        shared = [
+            "//sw/device/lib/crypto/impl:status",
+        ],
+    ),
 )
 
 cc_library(
@@ -175,14 +201,62 @@ cc_library(
     srcs = ["hmac.c"],
     hdrs = ["hmac.h"],
     deps = [
+        ":entropy",
         "//hw/ip/hmac/data:hmac_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:crc32",
         "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl:status",
+        "//sw/device/lib/runtime:ibex",
+    ],
+)
+
+dual_cc_library(
+    name = "rv_core_ibex",
+    srcs = dual_inputs(
+        device = ["rv_core_ibex.c"],
+        host = ["mock_rv_core_ibex.cc"],
+    ),
+    hdrs = dual_inputs(
+        shared = ["rv_core_ibex.h"],
+    ),
+    deps = dual_inputs(
+        device = [
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//hw/ip/rv_core_ibex/data:rv_core_ibex_c_regs",
+            "//sw/device/lib/base:abs_mmio",
+            "//sw/device/lib/base:csr",
+        ],
+        shared = [
+            "//sw/device/lib/base:hardened",
+            "//sw/device/lib/crypto/impl:status",
+        ],
+    ),
+)
+
+opentitan_test(
+    name = "rv_core_ibex_test",
+    srcs = ["rv_core_ibex_test.c"],
+    exec_env = EARLGREY_TEST_ENVS,
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        ":rv_core_ibex",
+        "//hw/ip/rv_core_ibex/data:rv_core_ibex_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
@@ -196,7 +270,9 @@ cc_library(
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:crc32",
         "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:random_order",
         "//sw/device/lib/crypto/impl:status",
     ],
 )
diff --git a/sw/device/lib/crypto/drivers/aes.c b/sw/device/lib/crypto/drivers/aes.c
index 33e25e8746f22..07ff97f6f2703 100644
--- a/sw/device/lib/crypto/drivers/aes.c
+++ b/sw/device/lib/crypto/drivers/aes.c
@@ -6,10 +6,13 @@
 
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/crc32.h"
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
 #include "aes_regs.h"  // Generated.
@@ -24,6 +27,7 @@ enum {
   kAesKeyWordLen128 = 128 / (sizeof(uint32_t) * 8),
   kAesKeyWordLen192 = 192 / (sizeof(uint32_t) * 8),
   kAesKeyWordLen256 = 256 / (sizeof(uint32_t) * 8),
+  kAesKeyWordLenMax = kAesKeyWordLen256,
 };
 
 /**
@@ -47,6 +51,8 @@ static status_t spin_until(uint32_t bit) {
  *
  * If the key is sideloaded, this is a no-op.
  *
+ * Consumes randomness; the caller must ensure the entropy complex is up.
+ *
  * @param key AES key.
  * @return result, OK or error.
  */
@@ -61,26 +67,18 @@ static status_t aes_write_key(aes_key_t key) {
   uint32_t share0 = kBase + AES_KEY_SHARE0_0_REG_OFFSET;
   uint32_t share1 = kBase + AES_KEY_SHARE1_0_REG_OFFSET;
 
-  // Handle key shares in two separate loops to avoid dealing with
+  // Handle key shares in two separate hardened_memcpys to avoid dealing with
   // corresponding parts too close together, which could risk power
-  // side-channel leakage in the ALU.
-  // TODO: randomize iteration order.
-  size_t i = 0;
-  for (; i < key.key_len; ++i) {
-    abs_mmio_write32(share0 + i * sizeof(uint32_t), key.key_shares[0][i]);
-  }
-  HARDENED_CHECK_EQ(i, key.key_len);
-  for (i = 0; i < key.key_len; ++i) {
-    abs_mmio_write32(share1 + i * sizeof(uint32_t), key.key_shares[1][i]);
-  }
-  HARDENED_CHECK_EQ(i, key.key_len);
+  // side-channel leakage in the ALU. Before writing the key shares, initialize
+  // the registers with random data.
+  hardened_memshred((uint32_t *)share0, kAesKeyWordLenMax);
+  hardened_memcpy((uint32_t *)share0, key.key_shares[0], key.key_len);
+  hardened_memshred((uint32_t *)share1, kAesKeyWordLenMax);
+  hardened_memcpy((uint32_t *)share1, key.key_shares[1], key.key_len);
+
+  // Check the integrity of the key written to the AES core.
+  HARDENED_CHECK_EQ(aes_key_integrity_checksum_check(&key), kHardenedBoolTrue);
 
-  // NOTE: all eight share registers must be written; in the case we don't have
-  // enough key data, we fill it with zeroes.
-  for (size_t i = key.key_len; i < 8; ++i) {
-    abs_mmio_write32(share0 + i * sizeof(uint32_t), 0);
-    abs_mmio_write32(share1 + i * sizeof(uint32_t), 0);
-  }
   return spin_until(AES_STATUS_IDLE_BIT);
 }
 
@@ -104,102 +102,113 @@ static status_t aes_begin(aes_key_t key, const aes_block_t *iv,
   uint32_t ctrl_reg = AES_CTRL_SHADOWED_REG_RESVAL;
 
   // Set the operation (encrypt or decrypt).
-  hardened_bool_t operation_written = kHardenedBoolFalse;
+  hardened_bool_t operation_enc = launder32(0);
   switch (encrypt) {
     case kHardenedBoolTrue:
       ctrl_reg =
           bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_OPERATION_FIELD,
                                  AES_CTRL_SHADOWED_OPERATION_VALUE_AES_ENC);
-      operation_written = launder32(kHardenedBoolTrue);
+      operation_enc = launder32(operation_enc) | kHardenedBoolTrue;
       break;
     case kHardenedBoolFalse:
       ctrl_reg =
           bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_OPERATION_FIELD,
                                  AES_CTRL_SHADOWED_OPERATION_VALUE_AES_DEC);
-      operation_written = launder32(kHardenedBoolTrue);
+      operation_enc = launder32(operation_enc) | kHardenedBoolFalse;
       break;
     default:
       // Invalid value.
       return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(operation_written, kHardenedBoolTrue);
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(operation_enc), encrypt);
 
   // Indicate whether the key will be sideloaded.
-  hardened_bool_t sideload_written = kHardenedBoolFalse;
+  hardened_bool_t which_sideload = launder32(0);
   switch (key.sideload) {
     case kHardenedBoolTrue:
       ctrl_reg =
           bitfield_bit32_write(ctrl_reg, AES_CTRL_SHADOWED_SIDELOAD_BIT, true);
-      sideload_written = launder32(kHardenedBoolTrue);
+      which_sideload = launder32(which_sideload) | kHardenedBoolTrue;
       break;
     case kHardenedBoolFalse:
       ctrl_reg =
           bitfield_bit32_write(ctrl_reg, AES_CTRL_SHADOWED_SIDELOAD_BIT, false);
-      sideload_written = launder32(kHardenedBoolTrue);
+      which_sideload = launder32(which_sideload) | kHardenedBoolFalse;
       break;
     default:
       // Invalid value.
       return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(sideload_written, kHardenedBoolTrue);
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(which_sideload), key.sideload);
 
   // Translate the cipher mode to the hardware-encoding value and write the
   // control reg field.
-  aes_cipher_mode_t mode_written;
+  aes_cipher_mode_t mode_written = launder32(0);
   switch (launder32(key.mode)) {
     case kAesCipherModeEcb:
       ctrl_reg = bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_MODE_FIELD,
                                         AES_CTRL_SHADOWED_MODE_VALUE_AES_ECB);
-      mode_written = launder32(kAesCipherModeEcb);
+      mode_written = launder32(mode_written) | kAesCipherModeEcb;
       break;
     case kAesCipherModeCbc:
       ctrl_reg = bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_MODE_FIELD,
                                         AES_CTRL_SHADOWED_MODE_VALUE_AES_CBC);
-      mode_written = launder32(kAesCipherModeCbc);
+      mode_written = launder32(mode_written) | kAesCipherModeCbc;
       break;
     case kAesCipherModeCfb:
       ctrl_reg = bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_MODE_FIELD,
                                         AES_CTRL_SHADOWED_MODE_VALUE_AES_CFB);
-      mode_written = launder32(kAesCipherModeCfb);
+      mode_written = launder32(mode_written) | kAesCipherModeCfb;
       break;
     case kAesCipherModeOfb:
       ctrl_reg = bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_MODE_FIELD,
                                         AES_CTRL_SHADOWED_MODE_VALUE_AES_OFB);
-      mode_written = launder32(kAesCipherModeOfb);
+      mode_written = launder32(mode_written) | kAesCipherModeOfb;
       break;
     case kAesCipherModeCtr:
       ctrl_reg = bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_MODE_FIELD,
                                         AES_CTRL_SHADOWED_MODE_VALUE_AES_CTR);
-      mode_written = launder32(kAesCipherModeCtr);
+      mode_written = launder32(mode_written) | kAesCipherModeCtr;
       break;
     default:
       // Invalid value.
       return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(mode_written, key.mode);
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(mode_written), key.mode);
 
   // Translate the key length to the hardware-encoding value and write the
   // control reg field.
+  size_t key_len_written;
   switch (key.key_len) {
     case kAesKeyWordLen128:
       ctrl_reg =
           bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_KEY_LEN_FIELD,
                                  AES_CTRL_SHADOWED_KEY_LEN_VALUE_AES_128);
+      key_len_written = launder32(kAesKeyWordLen128);
       break;
     case kAesKeyWordLen192:
       ctrl_reg =
           bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_KEY_LEN_FIELD,
                                  AES_CTRL_SHADOWED_KEY_LEN_VALUE_AES_192);
+      key_len_written = launder32(kAesKeyWordLen192);
       break;
     case kAesKeyWordLen256:
       ctrl_reg =
           bitfield_field32_write(ctrl_reg, AES_CTRL_SHADOWED_KEY_LEN_FIELD,
                                  AES_CTRL_SHADOWED_KEY_LEN_VALUE_AES_256);
+      key_len_written = launder32(kAesKeyWordLen256);
       break;
     default:
       // Invalid value.
       return OTCRYPTO_BAD_ARGS;
   }
+  HARDENED_CHECK_EQ(key_len_written, key.key_len);
 
   // Never enable manual operation.
   ctrl_reg = bitfield_bit32_write(
@@ -225,6 +234,10 @@ static status_t aes_begin(aes_key_t key, const aes_block_t *iv,
     }
   }
 
+  // Read back the AES configuration and compare to the expected configuration.
+  HARDENED_CHECK_EQ(abs_mmio_read32(kBase + AES_CTRL_SHADOWED_REG_OFFSET),
+                    launder32(ctrl_reg));
+
   // Check that AES is ready to receive input data.
   uint32_t status = abs_mmio_read32(kBase + AES_STATUS_REG_OFFSET);
   if (!bitfield_bit32_read(launder32(status), AES_STATUS_INPUT_READY_BIT)) {
@@ -260,18 +273,24 @@ status_t aes_update(aes_block_t *dest, const aes_block_t *src) {
     HARDENED_TRY(spin_until(AES_STATUS_OUTPUT_VALID_BIT));
 
     uint32_t offset = kBase + AES_DATA_OUT_0_REG_OFFSET;
-    for (size_t i = 0; i < ARRAYSIZE(dest->data); ++i) {
+    size_t i;
+    for (i = 0; launder32(i) < ARRAYSIZE(dest->data); ++i) {
       dest->data[i] = abs_mmio_read32(offset + i * sizeof(uint32_t));
     }
+    // Check that the loop ran for the correct number of iterations.
+    HARDENED_CHECK_EQ(i, ARRAYSIZE(dest->data));
   }
 
   if (src != NULL) {
     HARDENED_TRY(spin_until(AES_STATUS_INPUT_READY_BIT));
 
     uint32_t offset = kBase + AES_DATA_IN_0_REG_OFFSET;
-    for (size_t i = 0; i < ARRAYSIZE(src->data); ++i) {
+    size_t i;
+    for (i = 0; launder32(i) < ARRAYSIZE(src->data); ++i) {
       abs_mmio_write32(offset + i * sizeof(uint32_t), src->data[i]);
     }
+    // Check that the loop ran for the correct number of iterations.
+    HARDENED_CHECK_EQ(i, ARRAYSIZE(src->data));
   }
 
   return OTCRYPTO_OK;
@@ -286,9 +305,12 @@ status_t aes_end(aes_block_t *iv) {
   if (iv != NULL) {
     // Read back the current IV from the hardware.
     uint32_t iv_offset = kBase + AES_IV_0_REG_OFFSET;
-    for (size_t i = 0; i < ARRAYSIZE(iv->data); ++i) {
+    size_t i;
+    for (i = 0; launder32(i) < ARRAYSIZE(iv->data); ++i) {
       iv->data[i] = abs_mmio_read32(iv_offset + i * sizeof(uint32_t));
     }
+    // Check that the loop ran for the correct number of iterations.
+    HARDENED_CHECK_EQ(i, ARRAYSIZE(iv->data));
   }
 
   uint32_t trigger_reg = 0;
@@ -300,3 +322,26 @@ status_t aes_end(aes_block_t *iv) {
 
   return spin_until(AES_STATUS_IDLE_BIT);
 }
+
+uint32_t aes_key_integrity_checksum(const aes_key_t *key) {
+  uint32_t ctx;
+  crc32_init(&ctx);
+  crc32_add32(&ctx, key->mode);
+  crc32_add32(&ctx, key->sideload);
+  crc32_add32(&ctx, key->key_len);
+  // Compute the checksum only over a single share to avoid side-channel
+  // leakage. From a FI perspective only covering one key share is fine as
+  // (a) manipulating the second share with FI has only limited use to an
+  // adversary and (b) when manipulating the entire pointer to the key structure
+  // the checksum check fails.
+  crc32_add(&ctx, (unsigned char *)key->key_shares[0], key->key_len);
+  return crc32_finish(&ctx);
+}
+
+hardened_bool_t aes_key_integrity_checksum_check(const aes_key_t *key) {
+  if (key->checksum == launder32(aes_key_integrity_checksum(key))) {
+    HARDENED_CHECK_EQ(key->checksum, aes_key_integrity_checksum(key));
+    return kHardenedBoolTrue;
+  }
+  return kHardenedBoolFalse;
+}
diff --git a/sw/device/lib/crypto/drivers/aes.h b/sw/device/lib/crypto/drivers/aes.h
index 5e2e9396775d2..ca90d882636cc 100644
--- a/sw/device/lib/crypto/drivers/aes.h
+++ b/sw/device/lib/crypto/drivers/aes.h
@@ -73,6 +73,11 @@ typedef struct aes_key {
    * of sufficient length.
    */
   const uint32_t *key_shares[2];
+
+  /**
+   * The checksum of the key structure.
+   */
+  uint32_t checksum;
 } aes_key_t;
 
 /**
@@ -152,6 +157,28 @@ status_t aes_update(aes_block_t *dest, const aes_block_t *src);
 OT_WARN_UNUSED_RESULT
 status_t aes_end(aes_block_t *iv);
 
+/**
+ * Compute the checksum of an AES key.
+ *
+ * Call this routine after creating or modifying the aes key structure.
+ *
+ * @param key AES key.
+ * @returns Checksum value.
+ */
+uint32_t aes_key_integrity_checksum(const aes_key_t *key);
+
+/**
+ * Perform an integrity check on the AES key.
+ *
+ * Returns `kHardenedBoolTrue` if the check passed and `kHardenedBoolFalse`
+ * otherwise.
+ *
+ * @param key AES key.
+ * @returns Whether the integrity check passed.
+ */
+OT_WARN_UNUSED_RESULT
+hardened_bool_t aes_key_integrity_checksum_check(const aes_key_t *key);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/lib/crypto/drivers/aes_test.c b/sw/device/lib/crypto/drivers/aes_test.c
index a05e5807055ba..33808eb0b785a 100644
--- a/sw/device/lib/crypto/drivers/aes_test.c
+++ b/sw/device/lib/crypto/drivers/aes_test.c
@@ -88,6 +88,9 @@ static status_t run_aes_test(void) {
       .key_len = 4,
       .key_shares = {share0, share1},
   };
+  // Create the checksum of the key and store it in the key structure.
+  key.checksum = aes_key_integrity_checksum(&key);
+
   TRY(aes_encrypt_begin(key, &kIv));
 
   aes_block_t ciphertext[ARRAYSIZE(kCiphertext)] = {0};
diff --git a/sw/device/lib/crypto/drivers/cryptolib_build_info.h b/sw/device/lib/crypto/drivers/cryptolib_build_info.h
new file mode 100644
index 0000000000000..ed85ba3e73cdd
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/cryptolib_build_info.h
@@ -0,0 +1,61 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_CRYPTOLIB_BUILD_INFO_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_CRYPTOLIB_BUILD_INFO_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+/**
+ * A truncated commit hash from the sw/device/lib/crypto directory from
+ * the open-source OpenTitan repo that can be used to reproduce the
+ * cryptolib binary.
+ */
+typedef struct cryptolib_build_info_scm_revision {
+  /**
+   * Least significant word of the truncated commit hash.
+   */
+  uint32_t scm_revision_low;
+  /**
+   * Most significant word of the truncated commit hash.
+   */
+  uint32_t scm_revision_high;
+} cryptolib_build_info_scm_revision_t;
+
+typedef struct cryptolib_build_info {
+  /**
+   * Truncated commit hash.
+   */
+  cryptolib_build_info_scm_revision_t scm_revision;
+  /**
+   * Cryptolib version.
+   */
+  uint32_t version;
+  /**
+   * Cryptolib released.
+   */
+  bool released;
+} cryptolib_build_info_t;
+
+enum {
+  /**
+   * Cryptolib version.
+   * Currently the CL is in development, so this version is not
+   * frozen.
+   */
+  kCryptoLibVersion = kOtcryptoLibVersion1,
+  /**
+   * Indicates whether the cryptolib is released or not.
+   */
+  kCryptoLibReleased = false,
+};
+
+/**
+ * The build information.
+ */
+extern const cryptolib_build_info_t kCryptoLibBuildInfo;
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_CRYPTOLIB_BUILD_INFO_H_
diff --git a/sw/device/lib/crypto/drivers/entropy.c b/sw/device/lib/crypto/drivers/entropy.c
index 43f6cd6f1720f..6342052ffdf03 100644
--- a/sw/device/lib/crypto/drivers/entropy.c
+++ b/sw/device/lib/crypto/drivers/entropy.c
@@ -532,10 +532,17 @@ static status_t edn_configure(const edn_config_t *config) {
       config->base_address + EDN_MAX_NUM_REQS_BETWEEN_RESEEDS_REG_OFFSET,
       config->reseed_interval);
 
-  uint32_t reg =
-      bitfield_field32_write(0, EDN_CTRL_EDN_ENABLE_FIELD, kMultiBitBool4True);
+  // Clear the EDN recoverable alert status register.
+  abs_mmio_write32(config->base_address + EDN_RECOV_ALERT_STS_REG_OFFSET, 0);
+
+  uint32_t reg = bitfield_field32_write(
+      EDN_CTRL_REG_RESVAL, EDN_CTRL_EDN_ENABLE_FIELD, kMultiBitBool4True);
   reg = bitfield_field32_write(reg, EDN_CTRL_AUTO_REQ_MODE_FIELD,
                                kMultiBitBool4True);
+  reg = bitfield_field32_write(reg, EDN_CTRL_BOOT_REQ_MODE_FIELD,
+                               kMultiBitBool4False);
+  reg = bitfield_field32_write(reg, EDN_CTRL_CMD_FIFO_RST_FIELD,
+                               kMultiBitBool4False);
   abs_mmio_write32(config->base_address + EDN_CTRL_REG_OFFSET, reg);
 
   HARDENED_TRY(edn_ready_block(config->base_address));
@@ -767,7 +774,7 @@ static status_t entropy_src_check(const entropy_src_config_t *config) {
       config->alert_threshold);
   exp_reg = bitfield_field32_write(
       exp_reg, ENTROPY_SRC_ALERT_THRESHOLD_ALERT_THRESHOLD_INV_FIELD,
-      ~config->alert_threshold);
+      ~(uint32_t)config->alert_threshold);
   if (exp_reg != abs_mmio_read32(kBaseEntropySrc +
                                  ENTROPY_SRC_ALERT_THRESHOLD_REG_OFFSET)) {
     return OTCRYPTO_RECOV_ERR;
diff --git a/sw/device/lib/crypto/drivers/hmac.c b/sw/device/lib/crypto/drivers/hmac.c
index 3d10c2d962f6e..b4842d4971a05 100644
--- a/sw/device/lib/crypto/drivers/hmac.c
+++ b/sw/device/lib/crypto/drivers/hmac.c
@@ -6,9 +6,14 @@
 
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/crc32.h"
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/runtime/ibex.h"
 
 #include "hmac_regs.h"  // Generated.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -67,37 +72,80 @@ OT_ASSERT_ENUM_VALUE(HMAC_DIGEST_15_REG_OFFSET, HMAC_DIGEST_14_REG_OFFSET + 4);
 enum {
   /* The beginning of the address space of HMAC. */
   kHmacBaseAddr = TOP_EARLGREY_HMAC_BASE_ADDR,
+  /* Timeout value for the polling
+   * As min 3 clock cycles are required to perform a read access to the STATUS
+   * hmac_idle register. And as we should observe 240 cycles (80 for the inner
+   * key, 80 for the outer key, and 80 for the result of the first round), plus
+   * 80 for msg itself -> 360 cycles in total as max (when HMAC is enabled).
+   * Which means, 360/3=120 loops before having the IDLE state.
+   * Let's take a large margin and consider that 200 loops are enough.
+   */
+  kNumIterTimeout = 200,
+  /* Temporary delay linked to issue #24767, which should be equivalent to at
+   * least 80 clock cycles of the HMAC clock plus a margin.
+   */
+  kHmacTmpDelay = 200,
 };
 
+/**
+ * Digest size selector values.
+ *
+ * These values can be directly written into the configuration register.
+ */
+typedef enum hmac_digest_length {
+  kDigestLengthSha256 = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256,
+  kDigestLengthSha384 = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_384,
+  kDigestLengthSha512 = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_512,
+} hmac_digest_length_t;
+
+/**
+ * Key length selector values.
+ *
+ * These values can be directly written into the configuration register.
+ *
+ * As per the HMAC documentation, the key length can also be between these
+ * values; in this case, select the next size up and pad with zeroes.
+ */
+typedef enum hmac_key_length {
+  kKeyLength128 = HMAC_CFG_KEY_LENGTH_VALUE_KEY_128,
+  kKeyLength256 = HMAC_CFG_KEY_LENGTH_VALUE_KEY_256,
+  kKeyLength384 = HMAC_CFG_KEY_LENGTH_VALUE_KEY_384,
+  kKeyLength512 = HMAC_CFG_KEY_LENGTH_VALUE_KEY_512,
+  kKeyLength1024 = HMAC_CFG_KEY_LENGTH_VALUE_KEY_1024,
+  kKeyLengthNone = HMAC_CFG_KEY_LENGTH_VALUE_KEY_NONE,
+} hmac_key_length_t;
+
 /**
  * Wait until HMAC becomes idle.
  *
  * It returns error if HMAC HWIP becomes idle without firing `hmac_done`
  * interrupt.
  *
- * TODO(#23191): It might be beneficial to have a timeout value for the polling.
- *
  * @return Result of the operation.
  */
 OT_WARN_UNUSED_RESULT
 static status_t hmac_idle_wait(void) {
-  // Verify that HMAC HWIP is idle.
-  // Initialize `status_reg = 0` so that the loop starts with the assumption
-  // that HMAC HWIP is not idle.
-  uint32_t status_reg = 0;
-  while (bitfield_bit32_read(status_reg, HMAC_STATUS_HMAC_IDLE_BIT) == 0) {
-    status_reg = abs_mmio_read32(kHmacBaseAddr + HMAC_STATUS_REG_OFFSET);
+  // Initialize `status = 0` so that the loop starts with the assumption
+  // that HMAC is not idle.
+  uint32_t status = 0;
+  uint32_t attempt_cnt = 0;
+  while (bitfield_bit32_read(status, HMAC_STATUS_HMAC_IDLE_BIT) == 0) {
+    status = abs_mmio_read32(kHmacBaseAddr + HMAC_STATUS_REG_OFFSET);
+    attempt_cnt++;
+    if (attempt_cnt >= kNumIterTimeout) {
+      return OTCRYPTO_FATAL_ERR;
+    }
   }
 
   // Verify that HMAC HWIP raises `hmac_done` bit.
-  uint32_t intr_reg =
+  uint32_t intr_state =
       abs_mmio_read32(kHmacBaseAddr + HMAC_INTR_STATE_REG_OFFSET);
-  if (bitfield_bit32_read(intr_reg, HMAC_INTR_STATE_HMAC_DONE_BIT) == 0) {
+  if (bitfield_bit32_read(intr_state, HMAC_INTR_STATE_HMAC_DONE_BIT) == 0) {
     return OTCRYPTO_FATAL_ERR;
   }
 
   // Clear the interrupt by writing 1, because `INTR_STATE` is rw1c type.
-  abs_mmio_write32(kHmacBaseAddr + HMAC_INTR_STATE_REG_OFFSET, intr_reg);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_INTR_STATE_REG_OFFSET, intr_state);
   return OTCRYPTO_OK;
 }
 
@@ -110,15 +158,19 @@ static status_t hmac_idle_wait(void) {
  *
  * It also clears the internal state of HMAC HWIP by overwriting sensitive
  * values with 1s.
+ *
+ * @return Result of the operation.
  */
-static void hmac_hwip_clear(void) {
+static status_t clear(void) {
   // Do not clear the config yet, we just need to deassert sha_en, see #23014.
-  uint32_t cfg_reg = abs_mmio_read32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET);
-  cfg_reg = bitfield_bit32_write(cfg_reg, HMAC_CFG_SHA_EN_BIT, false);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg_reg);
+  uint32_t cfg = abs_mmio_read32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET);
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_SHA_EN_BIT, false);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg);
 
-  // TODO(#23191): Use a random value from EDN to wipe.
-  abs_mmio_write32(kHmacBaseAddr + HMAC_WIPE_SECRET_REG_OFFSET, UINT32_MAX);
+  // Use a random value from EDN to wipe HMAC.
+  abs_mmio_write32(kHmacBaseAddr + HMAC_WIPE_SECRET_REG_OFFSET,
+                   (uint32_t)ibex_rnd32_read());
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -129,13 +181,32 @@ static void hmac_hwip_clear(void) {
  * caller must ensure that HMAC HWIP is in an idle state that accepts writing
  * key words.
  *
- * @param key The buffer that points to the key.
- * @param key_wordlen The length of the key in words.
+ * The key may be NULL.
+ *
+ * @param key The buffer that points to the hmac_key_t key structure.
+ * @return Result of the operation.
  */
-static void key_write(const uint32_t *key, size_t key_wordlen) {
-  for (size_t i = 0; i < key_wordlen; i++) {
-    abs_mmio_write32(kHmacBaseAddr + HMAC_KEY_0_REG_OFFSET + 4 * i, key[i]);
+static status_t key_write(const hmac_key_t *key) {
+  if (key != NULL) {
+    uint32_t key_reg = kHmacBaseAddr + HMAC_KEY_0_REG_OFFSET;
+    HARDENED_TRY(
+        hardened_memcpy((uint32_t *)key_reg, key->key_block, key->key_len));
+    // We only check the integrity of the key when entering the CryptoLib. This
+    // check here will catch any manipulations of the key or the pointer to the
+    // key that might have happend in the meanwhile. We do it at this point as
+    // the key just got written into the HMAC core in the `hardened_memcpy()`
+    // above.
+    if (launder32(key->key_len) != 0) {
+      HARDENED_CHECK_EQ(hmac_key_integrity_checksum_check(key),
+                        kHardenedBoolTrue);
+    } else {
+      HARDENED_CHECK_EQ(key->key_len, 0);
+    }
+  } else {
+    HARDENED_CHECK_EQ(key, NULL);
   }
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -152,62 +223,64 @@ static void key_write(const uint32_t *key, size_t key_wordlen) {
  */
 static void digest_read(uint32_t *digest, size_t digest_wordlen) {
   for (size_t i = 0; i < digest_wordlen; i++) {
-    digest[i] =
-        abs_mmio_read32(kHmacBaseAddr + HMAC_DIGEST_0_REG_OFFSET + 4 * i);
+    digest[i] = abs_mmio_read32(kHmacBaseAddr + HMAC_DIGEST_0_REG_OFFSET +
+                                sizeof(uint32_t) * i);
   }
 }
 
 /**
- * Restore the internal state of HMAC HWIP from `ctx` struct, and resume the
- * operation.
- *
- * The first HMAC HWIP operation requires the call of `start` instead of
- * `continue`. Therefore, `ctx->hw_started` flag is used to distinguish
- * the first call. This function also updated `ctx->hw_started` after
- * the first such call.
+ * Resume a streaming operation from a saved context.
  *
- * If this function is being called from `ctx` object with previously stored
- * context (i.e. `ctx->hw_started = true`), then this state is restored.
- *
- * @param ctx Context from which values are written to CSRs.
+ * @param ctx Context object from which to restore.
+ * @return Result of the operation.
  */
-static void context_restore(hmac_ctx_t *ctx) {
-  // Restore CFG register from `ctx->cfg_reg`.
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, ctx->cfg_reg);
+static status_t context_restore(hmac_ctx_t *ctx) {
+  // The previous caller should have left it clean, but it doesn't hurt to
+  // clear again.
+  HARDENED_TRY(clear());
+
+  // Restore CFG register from `ctx->cfg_reg`. We need to keep `sha_en` low
+  // until context is restored, see #23014.
+  uint32_t cfg = bitfield_bit32_write(ctx->cfg_reg, HMAC_CFG_SHA_EN_BIT, false);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg);
 
   // Write to KEY registers for HMAC operations. If the operation is SHA-2,
   // `key_wordlen` is set to 0 during `ctx` initialization.
-  key_write(ctx->key, ctx->key_wordlen);
+  HARDENED_TRY(key_write(&ctx->key));
 
-  uint32_t cmd_reg = HMAC_CMD_REG_RESVAL;
+  uint32_t cmd = HMAC_CMD_REG_RESVAL;
   // Decide if we need to invoke `start` or `continue` command.
-  if (ctx->hw_started) {
-    cmd_reg = bitfield_bit32_write(cmd_reg, HMAC_CMD_HASH_CONTINUE_BIT, 1);
+  if (ctx->upper == 0 && ctx->lower == 0) {
+    cmd = bitfield_bit32_write(cmd, HMAC_CMD_HASH_START_BIT, 1);
+  } else {
+    cmd = bitfield_bit32_write(cmd, HMAC_CMD_HASH_CONTINUE_BIT, 1);
 
     // For SHA-256 and HMAC-256, we do not need to write to the second half of
     // DIGEST registers, but we do it anyway to keep the driver simple.
-    for (size_t i = 0; i < kHmacMaxDigestWords; i++) {
-      abs_mmio_write32(kHmacBaseAddr + HMAC_DIGEST_0_REG_OFFSET + 4 * i,
-                       ctx->H[i]);
+    size_t i = 0;
+    for (; launder32(i) < kHmacMaxDigestWords; i++) {
+      abs_mmio_write32(
+          kHmacBaseAddr + HMAC_DIGEST_0_REG_OFFSET + sizeof(uint32_t) * i,
+          ctx->H[i]);
     }
+    // Check that the loop ran for the correct number of iterations.
+    HARDENED_CHECK_EQ(i, kHmacMaxDigestWords);
     abs_mmio_write32(kHmacBaseAddr + HMAC_MSG_LENGTH_LOWER_REG_OFFSET,
                      ctx->lower);
     abs_mmio_write32(kHmacBaseAddr + HMAC_MSG_LENGTH_UPPER_REG_OFFSET,
                      ctx->upper);
-  } else {
-    cmd_reg = bitfield_bit32_write(cmd_reg, HMAC_CMD_HASH_START_BIT, 1);
-    ctx->hw_started = 1;
   }
 
   // We could not set `sha_en` before updating context registers (see #23014).
   // Now that context registers are restored, enable `sha_en`.
-  uint32_t cfg_reg = abs_mmio_read32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET);
-  cfg_reg = bitfield_bit32_write(cfg_reg, HMAC_CFG_SHA_EN_BIT, true);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg_reg);
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_SHA_EN_BIT, true);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg);
 
   // Now we can finally write the command to the register to actually issue
   // `start` or `continue`.
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd);
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -228,297 +301,528 @@ static void context_save(hmac_ctx_t *ctx) {
       abs_mmio_read32(kHmacBaseAddr + HMAC_MSG_LENGTH_UPPER_REG_OFFSET);
 }
 
+/**
+ * Wipes the ctx struct by replacing sensitive data with randomness from the
+ * Ibex EDN interface. Non-sensitive variables are zeroized.
+ *
+ * @param[out] ctx Initialized context object for SHA2/HMAC-SHA2 operations.
+ * @return Result of the operation.
+ */
+static status_t hmac_context_wipe(hmac_ctx_t *ctx) {
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Randomize sensitive data.
+  HARDENED_TRY(hardened_memshred(ctx->key.key_block, kHmacMaxBlockWords));
+  HARDENED_TRY(hardened_memshred(ctx->H, kHmacMaxDigestWords));
+  HARDENED_TRY(hardened_memshred((uint32_t *)(ctx->partial_block),
+                                 kHmacMaxBlockBytes / sizeof(uint32_t)));
+  // Zero the remaining ctx fields.
+  ctx->cfg_reg = 0;
+  ctx->key.key_len = 0;
+  ctx->key.checksum = 0;
+  ctx->msg_block_wordlen = 0;
+  ctx->digest_wordlen = 0;
+  ctx->lower = 0;
+  ctx->upper = 0;
+  ctx->partial_block_bytelen = 0;
+
+  return OTCRYPTO_OK;
+}
+
 /**
  * Write given byte array into the `MSG_FIFO`. This function should only be
  * called when HMAC HWIP is already running and expecting further message bytes.
  *
  * @param message The incoming message buffer to be fed into HMAC_FIFO.
  * @param message_len The length of `message` in bytes.
+ * @return Result of the operation.
  */
-static void msg_fifo_write(const uint8_t *message, size_t message_len) {
+static status_t msg_fifo_write(const uint8_t *message, size_t message_len) {
   // TODO(#23191): Should we handle backpressure here?
   // Begin by writing a one byte at a time until the data is aligned.
   size_t i = 0;
-  for (; misalignment32_of((uintptr_t)(&message[i])) > 0 && i < message_len;
+  for (; misalignment32_of((uintptr_t)(&message[i])) > 0 &&
+         launder32(i) < message_len;
        i++) {
     abs_mmio_write8(kHmacBaseAddr + HMAC_MSG_FIFO_REG_OFFSET, message[i]);
   }
 
   // Write one word at a time as long as there is a full word available.
-  for (; i + sizeof(uint32_t) <= message_len; i += sizeof(uint32_t)) {
+  for (; launder32(i + sizeof(uint32_t)) <= message_len;
+       i += sizeof(uint32_t)) {
     uint32_t next_word = read_32(&message[i]);
     abs_mmio_write32(kHmacBaseAddr + HMAC_MSG_FIFO_REG_OFFSET, next_word);
   }
 
   // For the last few bytes, we need to write one byte at a time again.
-  for (; i < message_len; i++) {
+  for (; launder32(i) < message_len; i++) {
     abs_mmio_write8(kHmacBaseAddr + HMAC_MSG_FIFO_REG_OFFSET, message[i]);
   }
+  // Check that the loops ran for the correct number of iterations.
+  HARDENED_CHECK_EQ(i, message_len);
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Temporary workaround linked to issue #24767
+ *
+ * The HMAC HWIP is not told to stop. This will cause the HW to be in an
+ * unexpected state, which could be exited by trigerring a simple HASH process
+ * operation. Before doing that, the context should be saved (message length
+ * and digest). This context is only available after a duration equivalent to
+ * 64 clock cycles in SHA2-256 and 80 clock cycles in SHA2-384/512, after the
+ * message length is on a block boundary (512 for SHA2-256 or 1024 bits for
+ * SHA2-384/512).
+ *
+ * @param[out] ctx Context to which values are written.
+ */
+static status_t tmp_avoid_hw_hang(hmac_ctx_t *ctx) {
+  // Insert a delay
+  ibex_timeout_t timeout;
+  timeout.cycles = kHmacTmpDelay;
+  timeout.start = ibex_mcycle_read();
+  while (!ibex_timeout_check(&timeout)) {
+    // NULL statement
+  }
+
+  // Save current context as it is updated after each block even if stop is not
+  // triggered
+  context_save(ctx);
+
+  // Trigger hash_process
+  uint32_t cmd_reg = abs_mmio_read32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET);
+  cmd_reg = bitfield_bit32_write(cmd_reg, HMAC_CMD_HASH_PROCESS_BIT, true);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+
+  // Wait for HMAC HWIP operation to be completed.
+  return hmac_idle_wait();
 }
 
 /**
  * For given `hmac_mode`, derive the matching CFG value and block/digest
  * lengths.
  *
- * @param hmac_mode The input `hmac_mode_t` value that determines which
- * SHA-2/HMAC algorithm is being used.
- * @param[out] cfg_reg The value that needs to be set to HMAC HWIP for given
- * `hmac_mode`.
- * @param[out] msg_block_bytelen The internal block length associated with
- * `hmac_mode` in bytes.
- * @param[out] digest_wordlen The digest length associated with `hmac_mode` in
- * words.
+ * @param hmac_en Whether to enable HMAC (false for hashing only).
+ * @param digest_len Digest length selector.
+ * @param key_len Key length selector.
+ * @return Configuration register.
  */
-OT_WARN_UNUSED_RESULT
-static status_t cfg_derive(hmac_mode_t hmac_mode, uint32_t *cfg_reg,
-                           size_t *msg_block_bytelen, size_t *digest_wordlen) {
-  *cfg_reg = HMAC_CFG_REG_RESVAL;
+static uint32_t cfg_get(bool hmac_en, hmac_digest_length_t digest_len,
+                        hmac_key_length_t key_len) {
+  uint32_t cfg = HMAC_CFG_REG_RESVAL;
   // The endianness is fixed at driver level and not exposed to the caller.
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_KEY_SWAP_BIT, true);
+
   // Digest should be big-endian to match the SHA-256 specification.
-  *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_KEY_SWAP_BIT, true);
-  *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_DIGEST_SWAP_BIT, true);
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_DIGEST_SWAP_BIT, true);
+
   // Message should be little-endian to match Ibex's endianness.
-  *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_ENDIAN_SWAP_BIT, false);
-
-  // We need to keep `sha_en` low until context is restored, see #23014.
-  *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_SHA_EN_BIT, false);
-
-  // Default value for `hmac_en` is false, HMAC calls set it to true below.
-  *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_HMAC_EN_BIT, false);
-
-  switch (hmac_mode) {
-    case kHmacModeHmac256:
-      *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_HMAC_EN_BIT, true);
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_KEY_LENGTH_FIELD,
-                                        HMAC_CFG_KEY_LENGTH_VALUE_KEY_512);
-      OT_FALLTHROUGH_INTENDED;
-    case kHmacModeSha256:
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_DIGEST_SIZE_FIELD,
-                                        HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256);
-      *msg_block_bytelen = kHmacSha256BlockBytes;
-      *digest_wordlen = kHmacSha256DigestWords;
-      break;
-    case kHmacModeHmac384:
-      *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_HMAC_EN_BIT, true);
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_KEY_LENGTH_FIELD,
-                                        HMAC_CFG_KEY_LENGTH_VALUE_KEY_1024);
-      OT_FALLTHROUGH_INTENDED;
-    case kHmacModeSha384:
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_DIGEST_SIZE_FIELD,
-                                        HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_384);
-      *msg_block_bytelen = kHmacSha512BlockBytes;
-      *digest_wordlen = kHmacSha384DigestWords;
-      break;
-    case kHmacModeHmac512:
-      *cfg_reg = bitfield_bit32_write(*cfg_reg, HMAC_CFG_HMAC_EN_BIT, true);
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_KEY_LENGTH_FIELD,
-                                        HMAC_CFG_KEY_LENGTH_VALUE_KEY_1024);
-      OT_FALLTHROUGH_INTENDED;
-    case kHmacModeSha512:
-      *cfg_reg = bitfield_field32_write(*cfg_reg, HMAC_CFG_DIGEST_SIZE_FIELD,
-                                        HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_512);
-      *msg_block_bytelen = kHmacSha512BlockBytes;
-      *digest_wordlen = kHmacSha512DigestWords;
-      break;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-  return OTCRYPTO_OK;
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_ENDIAN_SWAP_BIT, false);
+
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_SHA_EN_BIT, true);
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_HMAC_EN_BIT, hmac_en);
+  cfg = bitfield_field32_write(cfg, HMAC_CFG_KEY_LENGTH_FIELD, key_len);
+  cfg = bitfield_field32_write(cfg, HMAC_CFG_DIGEST_SIZE_FIELD, digest_len);
+  return cfg;
 }
 
-status_t hmac_init(hmac_ctx_t *ctx, const hmac_mode_t hmac_mode,
-                   const uint32_t *key, size_t key_wordlen) {
-  if (ctx == NULL) {
-    return OTCRYPTO_BAD_ARGS;
+/**
+ * Checks that the HMAC block is idle and returns an error otherwise.
+ *
+ * @return OK if the block is idle, OTCRYPTO_RECOV_ERR otherwise.
+ */
+static status_t ensure_idle(void) {
+  uint32_t status = abs_mmio_read32(kHmacBaseAddr + HMAC_STATUS_REG_OFFSET);
+  if (bitfield_bit32_read(status, HMAC_STATUS_HMAC_IDLE_BIT) == 0) {
+    return OTCRYPTO_RECOV_ERR;
   }
-  // TODO(#23191) Zeroise or randomly populate ctx struct during init.
+  return OTCRYPTO_OK;
+}
 
-  HARDENED_TRY(cfg_derive(hmac_mode, &ctx->cfg_reg, &ctx->msg_block_bytelen,
-                          &ctx->digest_wordlen));
+/**
+ * One-shot HMAC block operation.
+ *
+ * Configures the block, sends the START command, processes the message, and
+ * reads the digest.
+ *
+ * @param cfg HMAC block configuration register.
+ * @param key Key input for HMAC (may be NULL if `key_wordlen` is 0).
+ * @param msg Message data.
+ * @param msg_len Length of message data in bytes.
+ * @param digest_wordlen Digest length in 32-bit words.
+ * @param[out] digest Buffer for the digest.
+ */
+static status_t oneshot(const uint32_t cfg, const hmac_key_t *key,
+                        const uint8_t *msg, size_t msg_len,
+                        size_t digest_wordlen, uint32_t *digest) {
+  // Check that the block is idle.
+  HARDENED_TRY(ensure_idle());
 
-  if (hmac_mode == kHmacModeHmac256 || hmac_mode == kHmacModeHmac384 ||
-      hmac_mode == kHmacModeHmac512) {
-    if (key == NULL) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // Ensure that the key length matches the internal block size.
-    if (ctx->msg_block_bytelen != key_wordlen * sizeof(uint32_t)) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    ctx->key_wordlen = key_wordlen;
-    for (size_t i = 0; i < ctx->key_wordlen; i++) {
-      ctx->key[i] = key[i];
-    }
-  } else {
-    // Ensure that `key` is NULL for hashing operations.
-    if (key != NULL) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // Set `key_wordlen` to 0, so that it is clear this is hash operation. This
-    // value is later used to skip writing to KEY registers.
-    ctx->key_wordlen = 0;
-  }
+  // Configure the HMAC block.
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg);
 
-  ctx->hw_started = 0;
-  ctx->partial_block_len = 0;
+  // Write the key (no-op if the key length is 0, e.g. for hashing).
+  HARDENED_TRY(key_write(key));
 
-  return OTCRYPTO_OK;
-}
+  // Read back the HMAC configuration and compare to the expected configuration.
+  HARDENED_CHECK_EQ(abs_mmio_read32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET),
+                    launder32(cfg));
 
-status_t hmac_update(hmac_ctx_t *ctx, const uint8_t *data, size_t len) {
-  if (ctx == NULL || (data == NULL && len > 0)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
+  // Send the START command.
+  uint32_t cmd =
+      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_START_BIT, 1);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd);
 
-  // Check if incoming message bits with `ctx->partial_block` together has
-  // enough bits to fill an internal SHA-2 block. Otherwise, this function just
-  // appends the incoming bits to partial_block and returns without invoking
-  // HMAC HWIP operation.
-  if (ctx->partial_block_len + len < ctx->msg_block_bytelen) {
-    memcpy(ctx->partial_block + ctx->partial_block_len, data, len);
-    ctx->partial_block_len += len;
-    return OTCRYPTO_OK;
-  }
+  // Write the message.
+  HARDENED_TRY(msg_fifo_write(msg, msg_len));
 
-  // `leftover` bits refers to the size of the next partial block, after we
-  // handle the current partial block and the incoming message bytes.
-  size_t leftover_len = (ctx->partial_block_len + len) % ctx->msg_block_bytelen;
+  // Send the PROCESS command.
+  cmd = bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_PROCESS_BIT, 1);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd);
 
-  // The previous caller should have left it clean, but it doesn't hurt to
-  // clear again.
-  hmac_hwip_clear();
-  // Retore context will restore the context and also hit start or continue
-  // button as necessary.
-  context_restore(ctx);
+  // Wait for the digest to be ready, then read it.
+  HARDENED_TRY(hmac_idle_wait());
+  digest_read(digest, digest_wordlen);
 
-  // Write `partial_block` to MSG_FIFO
-  msg_fifo_write(ctx->partial_block, ctx->partial_block_len);
+  HARDENED_TRY(clear());
+  return OTCRYPTO_OK;
+}
 
-  // Keep writing incoming bytes
-  msg_fifo_write(data, len - leftover_len);
+status_t hmac_hash_sha256(const uint8_t *msg, size_t msg_len,
+                          uint32_t *digest) {
+  uint32_t cfg =
+      cfg_get(/*hmac_en=*/false, kDigestLengthSha256, kKeyLengthNone);
+  return oneshot(cfg, /*key=*/NULL, msg, msg_len, kHmacSha256DigestWords,
+                 digest);
+}
 
-  // Time to tell HMAC HWIP to stop, because we do not have enough message
-  // bytes for another round.
-  uint32_t cmd_reg =
-      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_STOP_BIT, 1);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+status_t hmac_hash_sha384(const uint8_t *msg, size_t msg_len,
+                          uint32_t *digest) {
+  uint32_t cfg =
+      cfg_get(/*hmac_en=*/false, kDigestLengthSha384, kKeyLengthNone);
+  return oneshot(cfg, /*key=*/NULL, msg, msg_len, kHmacSha384DigestWords,
+                 digest);
+}
 
-  // Wait for HMAC HWIP operation to be completed.
-  HARDENED_TRY(hmac_idle_wait());
+status_t hmac_hash_sha512(const uint8_t *msg, size_t msg_len,
+                          uint32_t *digest) {
+  uint32_t cfg =
+      cfg_get(/*hmac_en=*/false, kDigestLengthSha512, kKeyLengthNone);
+  return oneshot(cfg, /*key=*/NULL, msg, msg_len, kHmacSha512DigestWords,
+                 digest);
+}
 
-  // Store context into `ctx`.
-  context_save(ctx);
+status_t hmac_hmac_sha256_cl(const hmac_key_t *key, const uint8_t *msg,
+                             size_t msg_len, uint32_t *tag) {
+  // Always configure the key length as the underlying message block size.
+  uint32_t cfg = cfg_get(/*hmac_en=*/true, kDigestLengthSha256, kKeyLength512);
+  return oneshot(cfg, key, msg, msg_len, kHmacSha256DigestWords, tag);
+}
 
-  // Write leftover bytes to `partial_block`, so that future update/final call
-  // can feed them to HMAC HWIP.
-  memcpy(ctx->partial_block, data + len - leftover_len, leftover_len);
-  ctx->partial_block_len = leftover_len;
+status_t hmac_hmac_sha256_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag) {
+  uint32_t o_key_pad[kHmacSha256BlockWords];
+  uint32_t i_key_pad[kHmacSha256BlockWords];
+  memset(o_key_pad, 0, kHmacSha256BlockBytes);
+  memset(i_key_pad, 0, kHmacSha256BlockBytes);
+
+  // XOR the key K with the outer (opad) and inner (ipad) padding.
+  uint32_t opad[kHmacSha256BlockWords];
+  uint32_t ipad[kHmacSha256BlockWords];
+  memset(opad, 0x5c5c5c5c, kHmacSha256BlockBytes);
+  memset(ipad, 0x36363636, kHmacSha256BlockBytes);
+  TRY(hardened_xor(key->key_block, opad, kHmacSha256BlockWords, o_key_pad));
+  TRY(hardened_xor(key->key_block, ipad, kHmacSha256BlockWords, i_key_pad));
+
+  // Concatenate the message with the inner padded key.
+  uint8_t i_key_pad_msg[kHmacSha256BlockBytes + msg_len];
+  memset(i_key_pad_msg, 0, sizeof(i_key_pad_msg));
+  memcpy(i_key_pad_msg, i_key_pad, kHmacSha256BlockBytes);
+  memcpy(i_key_pad_msg + kHmacSha256BlockBytes, msg, msg_len);
+
+  // h_i_key_pad_msg = H(i_key_pad || m).
+  uint32_t h_i_key_pad_msg[kHmacSha256DigestWords];
+  memset(h_i_key_pad_msg, 0, sizeof(h_i_key_pad_msg));
+  HARDENED_TRY(hmac_hash_sha256(i_key_pad_msg, kHmacSha256BlockBytes + msg_len,
+                                h_i_key_pad_msg));
+
+  // Concatenate the outer padded key with h_i_key_pad_msg.
+  uint8_t o_key_pad_hash[kHmacSha256BlockBytes + kHmacSha256DigestBytes];
+  memset(o_key_pad_hash, 0, sizeof(o_key_pad_hash));
+  memcpy(o_key_pad_hash, o_key_pad, kHmacSha256BlockBytes);
+  memcpy(o_key_pad_hash + kHmacSha256BlockBytes, h_i_key_pad_msg,
+         kHmacSha256DigestBytes);
+
+  // hmac = H(o_key_pad || h_i_key_pad_msg).
+  return hmac_hash_sha256(o_key_pad_hash,
+                          kHmacSha256BlockBytes + kHmacSha256DigestBytes, tag);
+}
 
-  // Clean up HMAC HWIP so it can be reused by other driver calls.
-  hmac_hwip_clear();
-  return OTCRYPTO_OK;
+status_t hmac_hmac_sha384(const hmac_key_t *key, const uint8_t *msg,
+                          size_t msg_len, uint32_t *tag) {
+  // Always configure the key length as the underlying message block size.
+  uint32_t cfg = cfg_get(/*hmac_en=*/true, kDigestLengthSha384, kKeyLength1024);
+  return oneshot(cfg, key, msg, msg_len, kHmacSha384DigestWords, tag);
 }
 
-status_t hmac_final(hmac_ctx_t *ctx, uint32_t *digest, size_t digest_wordlen) {
-  if (ctx == NULL || digest == NULL) {
-    return OTCRYPTO_BAD_ARGS;
+status_t hmac_hmac_sha384_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag) {
+  uint32_t o_key_pad[kHmacSha384BlockWords];
+  uint32_t i_key_pad[kHmacSha384BlockWords];
+  memset(o_key_pad, 0, kHmacSha384BlockBytes);
+  memset(i_key_pad, 0, kHmacSha384BlockBytes);
+
+  // XOR the key K with the outer (opad) and inner (ipad) padding.
+  for (size_t it = 0; it < kHmacSha384BlockWords; it++) {
+    o_key_pad[it] = key->key_block[it] ^ 0x5c5c5c5c;
+    i_key_pad[it] = key->key_block[it] ^ 0x36363636;
   }
 
-  // Check that `digest_wordlen` matches the one from ctx.
-  if (ctx->digest_wordlen != digest_wordlen) {
-    return OTCRYPTO_BAD_ARGS;
-  }
+  // Concatenate the message with the inner padded key.
+  uint8_t i_key_pad_msg[kHmacSha384BlockBytes + msg_len];
+  memset(i_key_pad_msg, 0, sizeof(i_key_pad_msg));
+  memcpy(i_key_pad_msg, i_key_pad, kHmacSha384BlockBytes);
+  memcpy(i_key_pad_msg + kHmacSha384BlockBytes, msg, msg_len);
+
+  // h_i_key_pad_msg = H(i_key_pad || m).
+  uint32_t h_i_key_pad_msg[kHmacSha384DigestWords];
+  memset(h_i_key_pad_msg, 0, sizeof(h_i_key_pad_msg));
+  HARDENED_TRY(hmac_hash_sha384(i_key_pad_msg, kHmacSha384BlockBytes + msg_len,
+                                h_i_key_pad_msg));
+
+  // Concatenate the outer padded key with h_i_key_pad_msg.
+  uint8_t o_key_pad_hash[kHmacSha384BlockBytes + kHmacSha384DigestBytes];
+  memset(o_key_pad_hash, 0, sizeof(o_key_pad_hash));
+  memcpy(o_key_pad_hash, o_key_pad, kHmacSha384BlockBytes);
+  memcpy(o_key_pad_hash + kHmacSha384BlockBytes, h_i_key_pad_msg,
+         kHmacSha384DigestBytes);
+
+  // hmac = H(o_key_pad || h_i_key_pad_msg).
+  return hmac_hash_sha384(o_key_pad_hash,
+                          kHmacSha384BlockBytes + kHmacSha384DigestBytes, tag);
+}
 
-  // The previous caller should have left it clean, but it doesn't hurt to
-  // clear again.
-  hmac_hwip_clear();
+status_t hmac_hmac_sha512(const hmac_key_t *key, const uint8_t *msg,
+                          size_t msg_len, uint32_t *tag) {
+  // Always configure the key length as the underlying message block size.
+  uint32_t cfg = cfg_get(/*hmac_en=*/true, kDigestLengthSha512, kKeyLength1024);
+  return oneshot(cfg, key, msg, msg_len, kHmacSha512DigestWords, tag);
+}
 
-  // Retore context will restore the context and also hit start or continue
-  // button as necessary.
-  context_restore(ctx);
+status_t hmac_hmac_sha512_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag) {
+  uint32_t o_key_pad[kHmacSha512BlockWords];
+  uint32_t i_key_pad[kHmacSha512BlockWords];
+  memset(o_key_pad, 0, kHmacSha512BlockBytes);
+  memset(i_key_pad, 0, kHmacSha512BlockBytes);
+
+  // XOR the key K with the outer (opad) and inner (ipad) padding.
+  for (size_t it = 0; it < kHmacSha512BlockWords; it++) {
+    o_key_pad[it] = key->key_block[it] ^ 0x5c5c5c5c;
+    i_key_pad[it] = key->key_block[it] ^ 0x36363636;
+  }
 
-  // Feed the final leftover bytes to HMAC HWIP.
-  msg_fifo_write(ctx->partial_block, ctx->partial_block_len);
+  // Concatenate the message with the inner padded key.
+  uint8_t i_key_pad_msg[kHmacSha512BlockBytes + msg_len];
+  memset(i_key_pad_msg, 0, sizeof(i_key_pad_msg));
+  memcpy(i_key_pad_msg, i_key_pad, kHmacSha512BlockBytes);
+  memcpy(i_key_pad_msg + kHmacSha512BlockBytes, msg, msg_len);
+
+  // h_i_key_pad_msg = H(i_key_pad || m).
+  uint32_t h_i_key_pad_msg[kHmacSha512DigestWords];
+  memset(h_i_key_pad_msg, 0, sizeof(h_i_key_pad_msg));
+  HARDENED_TRY(hmac_hash_sha512(i_key_pad_msg, kHmacSha512BlockBytes + msg_len,
+                                h_i_key_pad_msg));
+
+  // Concatenate the outer padded key with h_i_key_pad_msg.
+  uint8_t o_key_pad_hash[kHmacSha512BlockBytes + kHmacSha512DigestBytes];
+  memset(o_key_pad_hash, 0, sizeof(o_key_pad_hash));
+  memcpy(o_key_pad_hash, o_key_pad, kHmacSha512BlockBytes);
+  memcpy(o_key_pad_hash + kHmacSha512BlockBytes, h_i_key_pad_msg,
+         kHmacSha512DigestBytes);
+
+  // hmac = H(o_key_pad || h_i_key_pad_msg).
+  return hmac_hash_sha512(o_key_pad_hash,
+                          kHmacSha512BlockBytes + kHmacSha512DigestBytes, tag);
+}
 
-  // All message bytes are fed, now hit the process button.
-  uint32_t cmd_reg =
-      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_PROCESS_BIT, 1);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
-  HARDENED_TRY(hmac_idle_wait());
+/**
+ * Initialize the context for a hashing operation.
+ *
+ * The `msg_block_wordlen` and `digest_wordlen` fields of `ctx` is not set by
+ * this operation.
+ *
+ * @param key Key data for HMAC.
+ * @param key_wordlen Length of the key in words.
+ * @param digest_len Digest length selector.
+ * @param[out] ctx Initialized context object.
+ */
+static void sha2_init(hmac_digest_length_t digest_len, hmac_ctx_t *ctx) {
+  ctx->cfg_reg = cfg_get(/*hmac_en=*/false, digest_len, kKeyLengthNone);
+  ctx->key.key_len = 0;
+  ctx->key.checksum = 0;
+  ctx->lower = 0;
+  ctx->upper = 0;
+  ctx->partial_block_bytelen = 0;
+}
 
-  digest_read(digest, ctx->digest_wordlen);
+/**
+ * Initialize the context for an HMAC operation.
+ *
+ * The `msg_block_wordlen`, `digest_wordlen`, `key`, and `key_wordlen` fields
+ * of `ctx` are not set by this operation.
+ *
+ * @param key_len Key length selector.
+ * @param digest_len Digest length selector.
+ * @param[out] ctx Initialized context object.
+ */
+static void hmac_init(hmac_key_length_t key_len,
+                      hmac_digest_length_t digest_len, hmac_ctx_t *ctx) {
+  ctx->cfg_reg = cfg_get(/*hmac_en=*/true, digest_len, key_len);
+  ctx->lower = 0;
+  ctx->upper = 0;
+  ctx->partial_block_bytelen = 0;
+}
 
-  // Clean up HMAC HWIP so it can be reused by other driver calls.
-  hmac_hwip_clear();
+void hmac_hash_sha256_init(hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha256BlockWords,
+  ctx->digest_wordlen = kHmacSha256DigestWords,
+  sha2_init(kDigestLengthSha256, ctx);
+}
 
-  // TODO(#23191): Destroy sensitive values in the ctx object.
-  return OTCRYPTO_OK;
+void hmac_hash_sha384_init(hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha384BlockWords,
+  ctx->digest_wordlen = kHmacSha384DigestWords,
+  sha2_init(kDigestLengthSha384, ctx);
 }
 
-status_t hmac(const hmac_mode_t hmac_mode, const uint32_t *key,
-              size_t key_wordlen, const uint8_t *data, size_t len,
-              uint32_t *digest, size_t digest_wordlen) {
-  if (data == NULL && len > 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
+void hmac_hash_sha512_init(hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha512BlockWords,
+  ctx->digest_wordlen = kHmacSha512DigestWords,
+  sha2_init(kDigestLengthSha512, ctx);
+}
 
-  // The previous caller should have left it clean, but it doesn't hurt to
-  // clear again.
-  hmac_hwip_clear();
+void hmac_hmac_sha256_init_cl(const hmac_key_t key, hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha256BlockWords,
+  ctx->digest_wordlen = kHmacSha256DigestWords;
+  ctx->key.key_len = key.key_len;
+  ctx->key.checksum = key.checksum;
+  hardened_memcpy(ctx->key.key_block, key.key_block, key.key_len);
+  hmac_init(kKeyLength512, kDigestLengthSha256, ctx);
+}
 
-  uint32_t cfg_reg;
-  // Derived values below are only used for verifying their corresponding input
-  // arguments.
-  size_t derived_msg_block_bytelen;
-  size_t derived_digest_wordlen;
+void hmac_hmac_sha384_init(const hmac_key_t key, hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha384BlockWords,
+  ctx->digest_wordlen = kHmacSha384DigestWords;
+  ctx->key.key_len = key.key_len;
+  ctx->key.checksum = key.checksum;
+  hardened_memcpy(ctx->key.key_block, key.key_block, key.key_len);
+  hmac_init(kKeyLength1024, kDigestLengthSha384, ctx);
+}
 
-  HARDENED_TRY(cfg_derive(hmac_mode, &cfg_reg, &derived_msg_block_bytelen,
-                          &derived_digest_wordlen));
+void hmac_hmac_sha512_init(const hmac_key_t key, hmac_ctx_t *ctx) {
+  ctx->msg_block_wordlen = kHmacSha512BlockWords,
+  ctx->digest_wordlen = kHmacSha512DigestWords;
+  ctx->key.key_len = key.key_len;
+  ctx->key.checksum = key.checksum;
+  hardened_memcpy(ctx->key.key_block, key.key_block, key.key_len);
+  hmac_init(kKeyLength1024, kDigestLengthSha512, ctx);
+}
 
-  // We need to write CFG before key, because it includes `key_swap` endiannes
-  // option.
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg_reg);
+uint32_t hmac_key_integrity_checksum(const hmac_key_t *key) {
+  uint32_t ctx;
+  crc32_init(&ctx);
+  crc32_add32(&ctx, key->key_len);
+  crc32_add(&ctx, (unsigned char *)key->key_block, key->key_len);
+  return crc32_finish(&ctx);
+}
 
-  if (digest_wordlen != derived_digest_wordlen) {
-    return OTCRYPTO_BAD_ARGS;
+hardened_bool_t hmac_key_integrity_checksum_check(const hmac_key_t *key) {
+  if (key->checksum == launder32(hmac_key_integrity_checksum(key))) {
+    HARDENED_CHECK_EQ(key->checksum, hmac_key_integrity_checksum(key));
+    return kHardenedBoolTrue;
   }
+  return kHardenedBoolFalse;
+}
 
-  if (hmac_mode == kHmacModeHmac256 || hmac_mode == kHmacModeHmac384 ||
-      hmac_mode == kHmacModeHmac512) {
-    if (key == NULL ||
-        derived_msg_block_bytelen != key_wordlen * sizeof(uint32_t)) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    key_write(key, key_wordlen);
-  } else {
-    // Ensure that `key` is NULL and `key_wordlen = 0` for hashing operations.
-    if (key != NULL || key_wordlen != 0) {
-      return OTCRYPTO_BAD_ARGS;
-    }
+status_t hmac_update(hmac_ctx_t *ctx, const uint8_t *data, size_t len) {
+  // If we don't have enough new bytes to fill a block, just update the partial
+  // block and return.
+  size_t block_bytelen = ctx->msg_block_wordlen * sizeof(uint32_t);
+  if (len < block_bytelen - ctx->partial_block_bytelen) {
+    memcpy((unsigned char *)(ctx->partial_block) + ctx->partial_block_bytelen,
+           data, len);
+    ctx->partial_block_bytelen += len;
+    return OTCRYPTO_OK;
   }
 
-  // `sha_en` is not set by `cfg_derive` so we need to explicity set it now.
-  cfg_reg = bitfield_bit32_write(cfg_reg, HMAC_CFG_SHA_EN_BIT, true);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CFG_REG_OFFSET, cfg_reg);
+  // Calculate the number of bytes that will be in the next partial block.
+  // Reduce `len` modulo the block length preemptively to protect against
+  // integer overflow when adding to the partial length.
+  size_t len_rem = len % block_bytelen;
+  size_t leftover_len = (ctx->partial_block_bytelen + len_rem) % block_bytelen;
 
-  uint32_t cmd_reg =
-      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_START_BIT, 1);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+  // Retore context will restore the context and also hit start or continue
+  // button as necessary.
+  HARDENED_TRY(context_restore(ctx));
+
+  // Write the partial block, then the new bytes.
+  HARDENED_TRY(msg_fifo_write((unsigned char *)ctx->partial_block,
+                              ctx->partial_block_bytelen));
+  HARDENED_TRY(msg_fifo_write(data, len - leftover_len));
+
+  /*
+   * TODO should be uncommented once the issue #24767 will be solved in the HW
+   * and tmp_avoid_hw_hang should be removed.
+   *
+   * // Time to tell HMAC HWIP to stop, because we do not have enough message
+   * // bytes for another round.
+   * uint32_t cmd_reg =
+   *     bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_STOP_BIT, 1);
+   * abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+   *
+   * // Wait for HMAC HWIP operation to be completed.
+   * HARDENED_TRY(hmac_idle_wait());
+   *
+   * // Store context into `ctx`.
+   * context_save(ctx);
+   */
+
+  tmp_avoid_hw_hang(ctx);
 
-  msg_fifo_write(data, len);
+  // Write leftover bytes to `partial_block`, so that future update/final call
+  // can feed them to HMAC HWIP.
+  memcpy(ctx->partial_block, data + (len - leftover_len), leftover_len);
+  ctx->partial_block_bytelen = leftover_len;
 
-  cmd_reg =
-      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_PROCESS_BIT, 1);
-  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd_reg);
+  // Clean up.
+  HARDENED_TRY(clear());
+  return OTCRYPTO_OK;
+}
 
-  // Wait for HMAC HWIP operation to be completed.
-  HARDENED_TRY(hmac_idle_wait());
+status_t hmac_final(hmac_ctx_t *ctx, uint32_t *digest) {
+  // Retore context will restore the context and also hit start or continue
+  // button as necessary.
+  HARDENED_TRY(context_restore(ctx));
 
-  digest_read(digest, digest_wordlen);
+  // Feed the final leftover bytes to HMAC HWIP.
+  HARDENED_TRY(msg_fifo_write((unsigned char *)ctx->partial_block,
+                              ctx->partial_block_bytelen));
+
+  // All message bytes are fed, now hit the process button.
+  uint32_t cmd =
+      bitfield_bit32_write(HMAC_CMD_REG_RESVAL, HMAC_CMD_HASH_PROCESS_BIT, 1);
+  abs_mmio_write32(kHmacBaseAddr + HMAC_CMD_REG_OFFSET, cmd);
 
-  // Clean up HMAC HWIP so it can be reused by other driver calls.
-  hmac_hwip_clear();
+  // Wait for HMAC to be done, then read the digest.
+  HARDENED_TRY(hmac_idle_wait());
+  digest_read(digest, ctx->digest_wordlen);
 
   // TODO(#23191): Destroy sensitive values in the ctx object.
+
+  // Clean up.
+  HARDENED_TRY(clear());
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/drivers/hmac.h b/sw/device/lib/crypto/drivers/hmac.h
index 56ac6049aa2c9..17bcc0f262e70 100644
--- a/sw/device/lib/crypto/drivers/hmac.h
+++ b/sw/device/lib/crypto/drivers/hmac.h
@@ -18,39 +18,58 @@ extern "C" {
 #endif
 
 enum {
-  /* Digest size for SHA-256/HMAC-256 in bits, bytes and word respectively. */
-  kHmacSha256DigestBits = 256,
-  kHmacSha256DigestBytes = kHmacSha256DigestBits / 8,
+  /* Size of a SHA256 or HMAC-SHA256 digest in bytes. */
+  kHmacSha256DigestBytes = 256 / 8,
+  /* Size of a SHA256 or HMAC-SHA256 digest in 32-bit words. */
   kHmacSha256DigestWords = kHmacSha256DigestBytes / sizeof(uint32_t),
-  /* Digest size for SHA-384/HMAC-384 in bits, bytes and word respectively. */
-  kHmacSha384DigestBits = 384,
-  kHmacSha384DigestBytes = kHmacSha384DigestBits / 8,
+  /* Size of a SHA384 or HMAC-SHA384 digest in bytes. */
+  kHmacSha384DigestBytes = 384 / 8,
+  /* Size of a SHA384 or HMAC-SHA384 digest in 32-bit words. */
   kHmacSha384DigestWords = kHmacSha384DigestBytes / sizeof(uint32_t),
-  /* Digest size for SHA-512/HMAC-512 in bits, bytes and word respectively. */
-  kHmacSha512DigestBits = 512,
-  kHmacSha512DigestBytes = kHmacSha512DigestBits / 8,
+  /* Size of a SHA512 or HMAC-SHA512 digest in bytes. */
+  kHmacSha512DigestBytes = 512 / 8,
+  /* Size of a SHA512 or HMAC-SHA512 digest in 32-bit words. */
   kHmacSha512DigestWords = kHmacSha512DigestBytes / sizeof(uint32_t),
-  /* Internal block size for SHA-256/HMAC-256 in bits, bytes and word
-     respectively. */
-  kHmacSha256BlockBits = 2 * kHmacSha256DigestBits,
-  kHmacSha256BlockBytes = kHmacSha256BlockBits / 8,
+  /* Size of the underlying message block for SHA256 in bytes. */
+  kHmacSha256BlockBytes = 512 / 8,
+  /* Size of the underlying message block for SHA256 in 32-bit words. */
   kHmacSha256BlockWords = kHmacSha256BlockBytes / sizeof(uint32_t),
-  /* Internal block size for SHA-384/512 and HMAC-384/512 in bits, bytes and
-     word respectively. */
-  kHmacSha512BlockBits = 2 * kHmacSha512DigestBits,
-  kHmacSha512BlockBytes = kHmacSha512BlockBits / 8,
+  /* Size of the underlying message block for SHA384 in bytes. */
+  kHmacSha384BlockBytes = 1024 / 8,
+  /* Size of the underlying message block for SHA384 in 32-bit words. */
+  kHmacSha384BlockWords = kHmacSha384BlockBytes / sizeof(uint32_t),
+  /* Size of the underlying message block for SHA512 in bytes. */
+  kHmacSha512BlockBytes = 1024 / 8,
+  /* Size of the underlying message block for SHA512 in 32-bit words. */
   kHmacSha512BlockWords = kHmacSha512BlockBytes / sizeof(uint32_t),
-  /* Maximum digest size supported by HW natively in bits, bytes and words
-     respectively. */
-  kHmacMaxDigestBits = kHmacSha512DigestBits,
-  kHmacMaxDigestBytes = kHmacMaxDigestBits / 8,
+  /* Maximum digest size supported by the hardware, in bytes. */
+  kHmacMaxDigestBytes = kHmacSha512DigestBytes,
+  /* Maximum digest size supported by the hardware, in 32-bit words. */
   kHmacMaxDigestWords = kHmacMaxDigestBytes / sizeof(uint32_t),
-  /* Maximum internal block size bits, bytes and words respectively. */
-  kHmacMaxBlockBits = kHmacSha512BlockBits,
-  kHmacMaxBlockBytes = kHmacMaxBlockBits / 8,
+  /* Maximum block size supported by the hardware, in bytes. */
+  kHmacMaxBlockBytes = kHmacSha512BlockBytes,
+  /* Maximum block size supported by the hardware, in 32-bit words. */
   kHmacMaxBlockWords = kHmacMaxBlockBytes / sizeof(uint32_t),
 };
 
+/**
+ * The HMAC key structure.
+ */
+typedef struct hmac_key {
+  /**
+   * The length of the key (in 32-bit words).
+   */
+  size_t key_len;
+  /**
+   * Key storage buffer.
+   */
+  uint32_t key_block[kHmacMaxBlockWords];
+  /**
+   * Checksum of this HMAC key structure.
+   */
+  uint32_t checksum;
+} hmac_key_t;
+
 /**
  * A context struct maintained for streaming operations.
  */
@@ -58,160 +77,267 @@ typedef struct hmac_ctx {
   // A copy of `CFG` register used during resumption.
   uint32_t cfg_reg;
   // A copy of `KEY` to be used during start or resumption.
-  uint32_t key[kHmacMaxBlockWords];
-  // key_wordlen == 0 is used to infer that this is SHA-2 operation.
-  size_t key_wordlen;
+  hmac_key_t key;
   // The internal (message) block size of SHA-2 for this operation.
-  size_t msg_block_bytelen;
+  size_t msg_block_wordlen;
   size_t digest_wordlen;
   // The following fields are saved and restored during streaming.
   uint32_t H[kHmacMaxDigestWords];
   uint32_t lower;
   uint32_t upper;
-  // The following flags are used exclusively by the driver to determine whether
-  // or not the driver needs to pass the incoming requests to HMAC HWIP.
-  uint32_t hw_started;
-  uint8_t partial_block[kHmacMaxBlockBytes];
+  uint32_t partial_block[kHmacMaxBlockWords];
   // The number of valid bytes in `partial_block`.
-  size_t partial_block_len;
+  size_t partial_block_bytelen;
 } hmac_ctx_t;
 
-typedef enum hmac_mode {
-  // SHA2-256
-  kHmacModeSha256,
-  // SHA2-384
-  kHmacModeSha384,
-  // SHA2-512
-  kHmacModeSha512,
-  // HMAC-256
-  kHmacModeHmac256,
-  // HMAC-384
-  kHmacModeHmac384,
-  // HMAC-512
-  kHmacModeHmac512,
-} hmac_mode_t;
-
-/**
- * Initializes the context `ctx` according to given `hmac_mode` and `key`.
- *
- * This function does not invoke a HMAC HWIP operation, but instead prepares
- * `ctx` with necessary data for the streaming operations to be called later:
- *
- * i) Prepare CFG register value (with the exception of `sha_en` bit, #23014)
- * and store it into `ctx`. This value is repetitively loaded into HWIP during
- * future `hmac_update` and `hmac_final` calls.
- * ii) Copy given key and its length into `ctx` if the operation is HMAC.
- * iii) Initialize `hw_started` flag to false which indicates whether the very
- * first HWIP operation is executed or not. This helps decide whether start or
- * continue operation needs to be issues to HMAC HWIP later.
- * iv) Compute and store message block length and digest len fields to `ctx`.
- *
- * For SHA-2 operation, it must be that `key = NULL` and `key_wordlen = 0`.
- * For HMAC operations, `key` must point to a key buffer that contains the
- * processed key denoted as k0 in FIPS 198-1, Section 4. Therefore, the size of
- * the key must match the internal block size of the underlying hash function.
- * In other words, it means that:
- *   For HMAC-256, `key_wordlen = 64` with `key` referring to the value of k0,
- * which consists of exactly 64 words.
- *   For HMAC-384/512, `key_wordlen = 128`, with `key` referring to the value
- * of k0, which consists of exactly 128 words.
- *
- * @param[out] ctx Initialized context object for SHA2/HMAC-SHA2 operations.
- * @param hmac_mode Specifies the mode among SHA2-256/384/512, HMAC-256/384/512.
- * @param key Processed HMAC key.
- * @param key_wordlen The length of HMAC key, which must match the internal
- * block size of the underlying hash function.
- * @return Result of the operation.
+/**
+ * One-shot SHA256 hash computation.
+ *
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] digest Resulting digest (`kHmacSha256DigestWords` words).
+ * @return OK or error.
  */
 OT_WARN_UNUSED_RESULT
-status_t hmac_init(hmac_ctx_t *ctx, const hmac_mode_t hmac_mode,
-                   const uint32_t *key, size_t key_wordlen);
+status_t hmac_hash_sha256(const uint8_t *msg, size_t msg_len, uint32_t *digest);
 
 /**
- * Updates the state of `ctx` with given additional messsage bytes.
+ * One-shot SHA384 hash computation.
  *
- * This function first checks whether incoming byte messages together with the
- * pending bytes `ctx->partial_block` are larger than the SHA-2/HMAC internal
- * block size implied by `ctx`.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] digest Resulting digest (`kHmacSha384DigestWords` words).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hash_sha384(const uint8_t *msg, size_t msg_len, uint32_t *digest);
+
+/**
+ * One-shot SHA512 hash computation.
  *
- * If the available message bytes are larger than the internal block size, then
- * the state of HWIP is restored from `ctx` and message bytes are fed into
- * MSG_FIFO in internal block granularity. When all blocks are processed, HWIP
- * is stopped and the state of HWIP is saved to `ctx`. The leftover message
- * bytes that are not sufficient to be a block are stored in `ctx-partial_block`
- * to be used in future `hmac_update` or `hmac_final` calls. Finally, the state
- * of HWIP is cleared.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] digest Resulting digest (`kHmacSha512DigestWords` words).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hash_sha512(const uint8_t *msg, size_t msg_len, uint32_t *digest);
 
- * If the available message bytes are smaller than a single internal block,
- * `ctx->partial_block` is appended with the incoming bytes and no HWIP
- * operation is issued.
+/**
+ * One-shot HMAC-SHA256 hash computation.
  *
- * @param ctx Context object referring to a particular SHA-2/HMAC stream.
- * @param data Incoming message bytes to be processed into the stream.
- * @param len size of the `data` buffer in bytes.
- * @return Result of the operation.
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha256DigestWords` bytes).
+ * @return OK or error.
  */
 OT_WARN_UNUSED_RESULT
-status_t hmac_update(hmac_ctx_t *ctx, const uint8_t *data, size_t len);
+status_t hmac_hmac_sha256_cl(const hmac_key_t *key, const uint8_t *msg,
+                             size_t msg_len, uint32_t *tag);
 
 /**
- * Finalize the SHA-2/HMAC stream and return digest/tag.
+ * Redundant implementation for a one-shot HMAC-SHA256 hash computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
  *
- * This function works similar to `hmac_update`, in terms of how reamining
- * message bytes are handled, if there are any.
+ * To be used together with hmac_hmac_sha256() to mitigate FI attacks. This
+ * implementation is different to hmac_hmac_sha256() as it manually assembles
+ * the HMAC functionality using SHA256. By using two different HMAC
+ * implementations, injecting two identical faults affect different parts during
+ * the HMAC compuation, which can be detected.
  *
- * First, the state of HWIP is restored. Then, any remaining message byte from
- * `ctx->partial_block` are fed to MSG_FIFO. At the end, process command is
- * invoked at HWIP to conclude SHA-2/HMAC operation and produce the digest/tag.
- * The result is read from HWIP into `digest` and the state of HWIP is cleared.
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha256DigestWords` bytes).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hmac_sha256_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag);
+
+/**
+ * One-shot HMAC-SHA384 hash computation.
  *
- * `digest` should point to a sufficiently large buffer to accommodate
- * the resulting digest. `digest_wordlen` must match the digest length implied
- * by the mode used during the initialization of `ctx`, otherwise an error is
- * returned.
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
  *
- * @param ctx Context object referring to a particular stream.
- * @param[out] digest The digest value to be returned.
- * @param digest_wordlen The length of the digest in words.
- * @return Result of the operation.
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha384DigestWords` bytes).
+ * @return OK or error.
  */
 OT_WARN_UNUSED_RESULT
-status_t hmac_final(hmac_ctx_t *ctx, uint32_t *digest, size_t digest_wordlen);
-
-/**
- * One-shot SHA-2/HMAC call.
- *
- * This function uses `hmac_mode` to determine whether to run SHA-2 or HMAC
- * including the digest size. See `hmac_mode_t` for possible values.
- *
- * For SHA-2 operation, it must be that `key = NULL` and `key_wordlen = 0`.
- * For HMAC operations, `key` must point to a key buffer that contains the
- * processed key denoted as k0 in FIPS 198-1, Section 4. Therefore, the size of
- * the key must match the internal block size of the underlying hash function.
- * In other words, it means that:
- *   For HMAC-256, `key_wordlen = 64` with `key` referring to the value of k0,
- * which consists of exactly 64 words.
- *   For HMAC-384/512, `key_wordlen = 128`, with `key` referring to the value
- * of k0, which consists of exactly 128 words.
- *
- * `digest` should point to a sufficiently large buffer to accommodate
- * the resulting digest. `digest_wordlen` must match the digest length implied
- * by the mode used during the initialization of `ctx`, otherwise an error is
- * returned.
- *
- * @param[out] ctx Initialized context object for SHA2/HMAC-SHA2 operations.
- * @param hmac_mode Specifies the mode among SHA2-256/384/512, HMAC-256/384/512.
- * @param key Processed HMAC key.
- * @param key_wordlen The length of HMAC key, which must match the internal
- * block size of the underlying hash function.
- * @param[out] digest The digest value to be returned.
- * @param digest_wordlen The length of the digest in words.
- * @return Result of the operation.
+status_t hmac_hmac_sha384(const hmac_key_t *key, const uint8_t *msg,
+                          size_t msg_len, uint32_t *tag);
+
+/**
+ * Redundant implementation for a one-shot HMAC-SHA384 hash computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * To be used together with hmac_hmac_sha384() to mitigate FI attacks. This
+ * implementation is different to hmac_hmac_sha384() as it manually assembles
+ * the HMAC functionality using SHA384. By using two different HMAC
+ * implementations, injecting two identical faults affect different parts during
+ * the HMAC compuation, which can be detected.
+ *
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha384DigestWords` bytes).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hmac_sha384_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag);
+
+/**
+ * One-shot HMAC-SHA512 hash computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha512DigestWords` bytes).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hmac_sha512(const hmac_key_t *key, const uint8_t *msg,
+                          size_t msg_len, uint32_t *tag);
+
+/**
+ * Redundant implementation for a one-shot HMAC-SHA512 hash computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * To be used together with hmac_hmac_sha512() to mitigate FI attacks. This
+ * implementation is different to hmac_hmac_sha512() as it manually assembles
+ * the HMAC functionality using SHA512. By using two different HMAC
+ * implementations, injecting two identical faults affect different parts during
+ * the HMAC compuation, which can be detected.
+ *
+ * @param key HMAC key.
+ * @param msg Input message.
+ * @param msg_len Message length in bytes.
+ * @param[out] tag Authentication tag (`kHmacSha512DigestWords` bytes).
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_hmac_sha512_redundant(const hmac_key_t *key, const uint8_t *msg,
+                                    size_t msg_len, uint32_t *tag);
+
+/**
+ * Initializes the context for a streaming SHA256 hash computation.
+ *
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hash_sha256_init(hmac_ctx_t *ctx);
+
+/**
+ * Initializes the context for a streaming SHA384 hash computation.
+ *
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hash_sha384_init(hmac_ctx_t *ctx);
+
+/**
+ * Initializes the context for a streaming SHA512 hash computation.
+ *
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hash_sha512_init(hmac_ctx_t *ctx);
+
+/**
+ * Initializes the context for a streaming HMAC-SHA256 computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * @param key The key used for HMAC.
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hmac_sha256_init_cl(const hmac_key_t key, hmac_ctx_t *ctx);
+
+/**
+ * Initializes the context for a streaming HMAC-SHA384 computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * @param key The key used for HMAC.
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hmac_sha384_init(const hmac_key_t key, hmac_ctx_t *ctx);
+
+/**
+ * Initializes the context for a streaming HMAC-SHA512 computation.
+ *
+ * The key should be pre-processed into a buffer the size of a full message
+ * block, according to FIPS 198-1, section 4.
+ *
+ * @param key The key used for HMAC.
+ * @param[out] ctx Initialized context object.
+ */
+void hmac_hmac_sha512_init(const hmac_key_t key, hmac_ctx_t *ctx);
+
+/**
+ * Compute the checksum of an HMAC key.
+ *
+ * Call this routine after creating or modifying the HMAC key structure.
+ *
+ * @param key HMAC key.
+ * @returns Checksum value.
+ */
+uint32_t hmac_key_integrity_checksum(const hmac_key_t *key);
+
+/**
+ * Perform an integrity check on the HMAC key.
+ *
+ * Returns `kHardenedBoolTrue` if the check passed and `kHardenedBoolFalse`
+ * otherwise.
+ *
+ * @param key HMAC key.
+ * @returns Whether the integrity check passed.
+ */
+hardened_bool_t hmac_key_integrity_checksum_check(const hmac_key_t *key);
+
+/**
+ * Update the context with additional messsage data.
+ *
+ * This function can be used with all SHA2 and HMAC operations, and may be
+ * called multiple times between init() and final().
+ *
+ * @param ctx Context object referring to a particular SHA-2/HMAC stream.
+ * @param data Incoming message bytes to be processed into the stream.
+ * @param len Size of the `data` buffer in bytes.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t hmac_update(hmac_ctx_t *ctx, const uint8_t *data, size_t len);
+
+/**
+ * Finalize the SHA-2/HMAC stream and return the digest/tag.
+ *
+ * The caller must ensure that `ctx->digest_wordlen` words of space are
+ * available at the buffer pointed to by `digest`.
+ *
+ * @param ctx Context object referring to a particular stream.
+ * @param[out] digest Resulting digest or authentication tag.
+ * @return OK or error.
  */
 OT_WARN_UNUSED_RESULT
-status_t hmac(const hmac_mode_t hmac_mode, const uint32_t *key,
-              size_t key_wordlen, const uint8_t *data, size_t len,
-              uint32_t *digest, size_t digest_wordlen);
+status_t hmac_final(hmac_ctx_t *ctx, uint32_t *digest);
 
 #ifdef __cplusplus
 }
diff --git a/sw/device/lib/crypto/drivers/keymgr.c b/sw/device/lib/crypto/drivers/keymgr.c
index cb6a1d903d364..5e7869259d0d9 100644
--- a/sw/device/lib/crypto/drivers/keymgr.c
+++ b/sw/device/lib/crypto/drivers/keymgr.c
@@ -6,6 +6,7 @@
 
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/status.h"
@@ -72,9 +73,12 @@ static void keymgr_start(keymgr_diversification_t diversification) {
  * Wait for the key manager to finish an operation.
  *
  * Polls the key manager until it is no longer busy. If the operation completed
- * successfully or the key manager was already idle, returns OTCRYPTO_OK. If
- * there was an error during the operation, reads and clears the error code
- * and returns OTCRYPTO_RECOV_ERR; the operation can be retried afterwards.
+ * successfully, returns OTCRYPTO_OK. If there was an error during the
+ * operation, reads and clears the error code and returns OTCRYPTO_RECOV_ERR;
+ * the operation can be retried afterwards.
+ *
+ * This function assumes an operation has already been started by the caller.
+ * The function traps if the keymgr is already idle.
  *
  * @return OK or error.
  */
@@ -91,12 +95,12 @@ static status_t keymgr_wait_until_done(void) {
   // Clear OP_STATUS by writing back the value we read.
   abs_mmio_write32(kBaseAddr + KEYMGR_OP_STATUS_REG_OFFSET, reg);
 
-  // Check if the key manager reported errors. If it is already idle or
-  // completed an operation successfully, return an OK status. No other
-  // statuses (e.g. WIP) should be possible.
+  // Check if the key manager reported errors. If it completed an operation
+  // successfully, return an OK status. No other statuses (e.g. WIP) should
+  // be possible.
+  // The `IDLE` status is left unhandled because the keymgr should never be
+  // idle after an operation has been started by the caller.
   switch (status) {
-    case KEYMGR_OP_STATUS_STATUS_VALUE_IDLE:
-      return OTCRYPTO_OK;
     case KEYMGR_OP_STATUS_STATUS_VALUE_DONE_SUCCESS:
       return OTCRYPTO_OK;
     case KEYMGR_OP_STATUS_STATUS_VALUE_DONE_ERROR: {
@@ -149,18 +153,17 @@ status_t keymgr_generate_key_sw(keymgr_diversification_t diversification,
   keymgr_start(diversification);
   HARDENED_TRY(keymgr_wait_until_done());
 
-  // Collect output.
-  // TODO: for SCA hardening, randomize the order of these reads.
-  for (size_t i = 0; i < kKeymgrOutputShareNumWords; i++) {
-    key->share0[i] =
-        abs_mmio_read32(kBaseAddr + KEYMGR_SW_SHARE0_OUTPUT_0_REG_OFFSET +
-                        (i * sizeof(uint32_t)));
-  }
-  for (size_t i = 0; i < kKeymgrOutputShareNumWords; i++) {
-    key->share1[i] =
-        abs_mmio_read32(kBaseAddr + KEYMGR_SW_SHARE1_OUTPUT_0_REG_OFFSET +
-                        (i * sizeof(uint32_t)));
-  }
+  // Collect the output. To avoid side-channel lekage, first randomize the
+  // destination buffers using memshred. Then copy the key using a hardened
+  // memcpy.
+  uint32_t share0 = kBaseAddr + KEYMGR_SW_SHARE0_OUTPUT_0_REG_OFFSET;
+  uint32_t share1 = kBaseAddr + KEYMGR_SW_SHARE1_OUTPUT_0_REG_OFFSET;
+  HARDENED_TRY(hardened_memshred(key->share0, kKeymgrOutputShareNumWords));
+  HARDENED_TRY(hardened_memcpy(key->share0, (uint32_t *)share0,
+                               kKeymgrOutputShareNumWords));
+  HARDENED_TRY(hardened_memshred(key->share1, kKeymgrOutputShareNumWords));
+  HARDENED_TRY(hardened_memcpy(key->share1, (uint32_t *)share1,
+                               kKeymgrOutputShareNumWords));
 
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/drivers/kmac.c b/sw/device/lib/crypto/drivers/kmac.c
index 10260cb2f057d..d6e5070f26df0 100644
--- a/sw/device/lib/crypto/drivers/kmac.c
+++ b/sw/device/lib/crypto/drivers/kmac.c
@@ -8,6 +8,7 @@
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -38,10 +39,10 @@ typedef enum kmac_security_str {
  * - Bit 1-2: Keccak hashing mode (e.g. SHA, SHAKE, or cSHAKE).
  */
 typedef enum kmac_operation {
-  kKmacOperationSHA3 = KMAC_CFG_SHADOWED_MODE_VALUE_SHA3 << 1 | 0,
-  kKmacOperationSHAKE = KMAC_CFG_SHADOWED_MODE_VALUE_SHAKE << 1 | 0,
-  kKmacOperationCSHAKE = KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE << 1 | 0,
-  kKmacOperationKMAC = KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE << 1 | 1,
+  kKmacOperationSha3 = KMAC_CFG_SHADOWED_MODE_VALUE_SHA3 << 1 | 0,
+  kKmacOperationShake = KMAC_CFG_SHADOWED_MODE_VALUE_SHAKE << 1 | 0,
+  kKmacOperationCshake = KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE << 1 | 0,
+  kKmacOperationKmac = KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE << 1 | 1,
 } kmac_operation_t;
 
 /**
@@ -480,7 +481,7 @@ static status_t kmac_init(kmac_operation_t operation,
 
   // If the operation is KMAC, ensure that the entropy complex has been
   // initialized for masking.
-  if (operation == kKmacOperationKMAC) {
+  if (operation == kKmacOperationKmac) {
     HARDENED_TRY(entropy_complex_check());
   }
 
@@ -516,54 +517,31 @@ static status_t kmac_init(kmac_operation_t operation,
   return OTCRYPTO_OK;
 }
 
-/**
- * Configure the prefix registers with customization string.
- *
- * For KMAC, this function ignores `func_name` and uses "KMAC" instead.
- *
- * The caller must ensure that `func_name` and `cust_str` have properly
- * allocated `data` fields whose length matches their `len` fields.
- *
- * In total `func_name` and `cust_str` can be at most `kKmacPrefixMaxSize`
- * bytes.
- *
- * @param operation The KMAC or cSHAKE operation.
- * @param func_name The function name, used for cSHAKE.
- * @param func_name_len Length of the function name in bytes.
- * @param cust_str The customization string (both for cSHAKE and KMAC).
- * @param cust_str_len Length of the customization string in bytes.
- * @return Error code.
- */
-OT_WARN_UNUSED_RESULT
-static status_t kmac_write_prefix_block(kmac_operation_t operation,
-                                        const unsigned char *func_name,
-                                        size_t func_name_len,
-                                        const unsigned char *cust_str,
-                                        size_t cust_str_len) {
-  if (operation == kKmacOperationCSHAKE) {
-    return kmac_set_prefix_regs(func_name, func_name_len, cust_str,
-                                cust_str_len);
-  } else if (operation == kKmacOperationKMAC) {
-    return kmac_set_prefix_regs(kKmacFuncNameKMAC, sizeof(kKmacFuncNameKMAC),
-                                cust_str, cust_str_len);
-  }
-  return OTCRYPTO_BAD_ARGS;
-}
-
 /**
  * Update the key registers with given key shares.
  *
- * The caller must ensure that `key` struct is properly populated (no NULL
- * pointers and matching `len`).
- *
  * The accepted `key->len` values are {128 / 8, 192 / 8, 256 / 8, 384 / 8,
  * 512 / 8}, otherwise an error will be returned.
  *
+ * If the key is hardware-backed, this is a no-op.
+ *
+ * Uses hardening primitives internally that consume entropy; the caller must
+ * ensure the entropy complex is up before calling.
+ *
  * @param key The input key passed as a struct.
  * @return Error code.
  */
 OT_WARN_UNUSED_RESULT
 static status_t kmac_write_key_block(kmac_blinded_key_t *key) {
+  if (launder32(key->hw_backed) == kHardenedBoolTrue) {
+    // Nothing to do.
+    return OTCRYPTO_OK;
+  } else if (launder32(key->hw_backed) != kHardenedBoolFalse) {
+    // Invalid value.
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(key->hw_backed, kHardenedBoolFalse);
+
   kmac_key_len_t key_len_enum;
   HARDENED_TRY(kmac_get_key_len_bytes(key->len, &key_len_enum));
 
@@ -571,9 +549,20 @@ static status_t kmac_write_key_block(kmac_blinded_key_t *key) {
       KMAC_KEY_LEN_REG_RESVAL, KMAC_KEY_LEN_LEN_FIELD, key_len_enum);
   abs_mmio_write32(kKmacBaseAddr + KMAC_KEY_LEN_REG_OFFSET, key_len_reg);
 
-  for (size_t i = 0; i < key->len; i += 4) {
-    abs_mmio_write32(kKmacKeyShare0Addr + i, key->share0[i / 4]);
-    abs_mmio_write32(kKmacKeyShare1Addr + i, key->share1[i / 4]);
+  // Write random words to the key registers first for SCA defense.
+  for (size_t i = 0; i * sizeof(uint32_t) < key->len; i++) {
+    abs_mmio_write32(kKmacKeyShare0Addr + i * sizeof(uint32_t),
+                     ibex_rnd32_read());
+  }
+  for (size_t i = 0; i * sizeof(uint32_t) < key->len; i++) {
+    abs_mmio_write32(kKmacKeyShare0Addr + i * sizeof(uint32_t), key->share0[i]);
+  }
+  for (size_t i = 0; i * sizeof(uint32_t) < key->len; i++) {
+    abs_mmio_write32(kKmacKeyShare1Addr + i * sizeof(uint32_t),
+                     ibex_rnd32_read());
+  }
+  for (size_t i = 0; i * sizeof(uint32_t) < key->len; i++) {
+    abs_mmio_write32(kKmacKeyShare1Addr + i * sizeof(uint32_t), key->share1[i]);
   }
 
   return OTCRYPTO_OK;
@@ -595,20 +584,23 @@ static status_t kmac_write_key_block(kmac_blinded_key_t *key) {
  * The caller must ensure that `message_len` bytes (rounded up to the next 32b
  * word) are allocated at the location pointed to by `message`, and similarly
  * that `digest_len_words` 32-bit words are allocated at the location pointed
- * to by `digest`.
+ * to by `digest`. If `masked_digest` is set, then `digest` must contain 2x
+ * `digest_len_words` to fit both shares.
  *
  * @param operation The operation type.
  * @param message Input message string.
  * @param message_len Message length in bytes.
  * @param digest The struct to which the result will be written.
  * @param digest_len_words Requested digest length in 32-bit words.
+ * @param masked_digest Whether to return the digest in two shares.
  * @return Error code.
  */
 OT_WARN_UNUSED_RESULT
 static status_t kmac_process_msg_blocks(kmac_operation_t operation,
                                         const uint8_t *message,
                                         size_t message_len, uint32_t *digest,
-                                        size_t digest_len_words) {
+                                        size_t digest_len_words,
+                                        hardened_bool_t masked_digest) {
   // Block until KMAC is idle.
   HARDENED_TRY(wait_status_bit(KMAC_STATUS_SHA3_IDLE_BIT, 1));
 
@@ -642,7 +634,7 @@ static status_t kmac_process_msg_blocks(kmac_operation_t operation,
   }
 
   // If operation=KMAC, then we need to write `right_encode(digest->len)`
-  if (operation == kKmacOperationKMAC) {
+  if (operation == kKmacOperationKmac) {
     uint32_t digest_len_bits = 8 * sizeof(uint32_t) * digest_len_words;
     if (digest_len_bits / (8 * sizeof(uint32_t)) != digest_len_words) {
       return OTCRYPTO_BAD_ARGS;
@@ -691,14 +683,38 @@ static status_t kmac_process_msg_blocks(kmac_operation_t operation,
     // Read words from the state registers (either `digest_len_words` or the
     // maximum number of words available).
     size_t offset = 0;
-    for (; launder32(idx) < digest_len_words && offset < keccak_rate_words;
-         offset++) {
-      uint32_t share0 =
-          abs_mmio_read32(kKmacStateShare0Addr + offset * sizeof(uint32_t));
-      uint32_t share1 =
-          abs_mmio_read32(kKmacStateShare1Addr + offset * sizeof(uint32_t));
-      digest[idx] = share0 ^ share1;
-      ++idx;
+    if (launder32(masked_digest) == kHardenedBoolTrue) {
+      HARDENED_CHECK_EQ(masked_digest, kHardenedBoolTrue);
+      // Read the digest into each share in turn. Do this in separate loops so
+      // corresponding shares aren't handled close together.
+      for (offset = 0; launder32(idx + offset) < digest_len_words &&
+                       offset < keccak_rate_words;
+           offset++) {
+        digest[idx + offset] =
+            abs_mmio_read32(kKmacStateShare0Addr + offset * sizeof(uint32_t));
+      }
+      for (offset = 0; launder32(idx + offset) < digest_len_words &&
+                       offset < keccak_rate_words;
+           offset++) {
+        digest[idx + offset + digest_len_words] =
+            abs_mmio_read32(kKmacStateShare1Addr + offset * sizeof(uint32_t));
+      }
+      idx += offset;
+    } else {
+      // Skip right to the hardened check here instead of returning
+      // `OTCRYPTO_BAD_ARGS` if the value is not `kHardenedBoolFalse`; this
+      // value always comes from within the cryptolib, so we expect it to be
+      // valid and should be suspicious if it's not.
+      HARDENED_CHECK_EQ(masked_digest, kHardenedBoolFalse);
+      // Unmask the digest as we read it.
+      for (; launder32(idx) < digest_len_words && offset < keccak_rate_words;
+           offset++) {
+        digest[idx] =
+            abs_mmio_read32(kKmacStateShare0Addr + offset * sizeof(uint32_t));
+        digest[idx] ^=
+            abs_mmio_read32(kKmacStateShare1Addr + offset * sizeof(uint32_t));
+        idx++;
+      }
     }
 
     // If we read all the remaining words and still need more digest, issue
@@ -725,146 +741,121 @@ static status_t kmac_process_msg_blocks(kmac_operation_t operation,
   return OTCRYPTO_OK;
 }
 
-status_t kmac_sha3_224(const uint8_t *message, size_t message_len,
-                       uint32_t *digest) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHA3, kKmacSecurityStrength224,
-                         /*hw_backed=*/kHardenedBoolFalse));
-
-  size_t digest_len_words = kSha3_224DigestWords;
-  return kmac_process_msg_blocks(kKmacOperationSHA3, message, message_len,
-                                 digest, digest_len_words);
-}
+/**
+ * Perform a one-shot SHA3, SHAKE, or cSHAKE operation.
+ *
+ * Do not use this routine for KMAC operations.
+ *
+ * @param operation Hash function to perform.
+ * @param strength Security strength parameter.
+ * @param message Message data to hash.
+ * @param message_len Length of message data in bytes.
+ * @param digest_wordlen Length of digest in words.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t hash(kmac_operation_t operation, kmac_security_str_t strength,
+                     const uint8_t *message, size_t message_len,
+                     size_t digest_wordlen, uint32_t *digest) {
+  // Note: to save code size, we check for null pointers here instead of
+  // separately for every different Keccak hash operation.
+  if (digest == NULL || (message == NULL && message_len != 0)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
 
-status_t kmac_sha3_256(const uint8_t *message, size_t message_len,
-                       uint32_t *digest) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHA3, kKmacSecurityStrength256,
+  HARDENED_TRY(kmac_init(operation, strength,
                          /*hw_backed=*/kHardenedBoolFalse));
 
-  size_t digest_len_words = kSha3_256DigestWords;
-  return kmac_process_msg_blocks(kKmacOperationSHA3, message, message_len,
-                                 digest, digest_len_words);
+  return kmac_process_msg_blocks(operation, message, message_len, digest,
+                                 digest_wordlen,
+                                 /*masked_digest=*/kHardenedBoolFalse);
 }
 
-status_t kmac_sha3_384(const uint8_t *message, size_t message_len,
-                       uint32_t *digest) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHA3, kKmacSecurityStrength384,
-                         /*hw_backed=*/kHardenedBoolFalse));
-
-  size_t digest_len_words = kSha3_384DigestWords;
-  return kmac_process_msg_blocks(kKmacOperationSHA3, message, message_len,
-                                 digest, digest_len_words);
+inline status_t kmac_sha3_224(const uint8_t *message, size_t message_len,
+                              uint32_t *digest) {
+  return hash(kKmacOperationSha3, kKmacSecurityStrength224, message,
+              message_len, kKmacSha3224DigestWords, digest);
 }
 
-status_t kmac_sha3_512(const uint8_t *message, size_t message_len,
-                       uint32_t *digest) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHA3, kKmacSecurityStrength512,
-                         /*hw_backed=*/kHardenedBoolFalse));
-
-  size_t digest_len_words = kSha3_512DigestWords;
-  return kmac_process_msg_blocks(kKmacOperationSHA3, message, message_len,
-                                 digest, digest_len_words);
+inline status_t kmac_sha3_256(const uint8_t *message, size_t message_len,
+                              uint32_t *digest) {
+  return hash(kKmacOperationSha3, kKmacSecurityStrength256, message,
+              message_len, kKmacSha3256DigestWords, digest);
 }
 
-status_t kmac_shake_128(const uint8_t *message, size_t message_len,
-                        uint32_t *digest, size_t digest_len) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHAKE, kKmacSecurityStrength128,
-                         /*hw_backed=*/kHardenedBoolFalse));
+inline status_t kmac_sha3_384(const uint8_t *message, size_t message_len,
+                              uint32_t *digest) {
+  return hash(kKmacOperationSha3, kKmacSecurityStrength384, message,
+              message_len, kKmacSha3384DigestWords, digest);
+}
 
-  return kmac_process_msg_blocks(kKmacOperationSHAKE, message, message_len,
-                                 digest, digest_len);
+inline status_t kmac_sha3_512(const uint8_t *message, size_t message_len,
+                              uint32_t *digest) {
+  return hash(kKmacOperationSha3, kKmacSecurityStrength512, message,
+              message_len, kKmacSha3512DigestWords, digest);
 }
 
-status_t kmac_shake_256(const uint8_t *message, size_t message_len,
-                        uint32_t *digest, size_t digest_len) {
-  HARDENED_TRY(kmac_init(kKmacOperationSHAKE, kKmacSecurityStrength256,
-                         /*hw_backed=*/kHardenedBoolFalse));
+inline status_t kmac_shake_128(const uint8_t *message, size_t message_len,
+                               uint32_t *digest, size_t digest_len) {
+  return hash(kKmacOperationShake, kKmacSecurityStrength128, message,
+              message_len, digest_len, digest);
+}
 
-  return kmac_process_msg_blocks(kKmacOperationSHAKE, message, message_len,
-                                 digest, digest_len);
+inline status_t kmac_shake_256(const uint8_t *message, size_t message_len,
+                               uint32_t *digest, size_t digest_len) {
+  return hash(kKmacOperationShake, kKmacSecurityStrength256, message,
+              message_len, digest_len, digest);
 }
 
 status_t kmac_cshake_128(const uint8_t *message, size_t message_len,
                          const unsigned char *func_name, size_t func_name_len,
                          const unsigned char *cust_str, size_t cust_str_len,
                          uint32_t *digest, size_t digest_len) {
-  HARDENED_TRY(kmac_init(kKmacOperationCSHAKE, kKmacSecurityStrength128,
-                         /*hw_backed=*/kHardenedBoolFalse));
-
-  HARDENED_TRY(kmac_write_prefix_block(kKmacOperationCSHAKE, func_name,
-                                       func_name_len, cust_str, cust_str_len));
-
-  return kmac_process_msg_blocks(kKmacOperationCSHAKE, message, message_len,
-                                 digest, digest_len);
+  HARDENED_TRY(wait_status_bit(KMAC_STATUS_SHA3_IDLE_BIT, 1));
+  HARDENED_TRY(
+      kmac_set_prefix_regs(func_name, func_name_len, cust_str, cust_str_len));
+  return hash(kKmacOperationCshake, kKmacSecurityStrength128, message,
+              message_len, digest_len, digest);
 }
 
 status_t kmac_cshake_256(const uint8_t *message, size_t message_len,
                          const unsigned char *func_name, size_t func_name_len,
                          const unsigned char *cust_str, size_t cust_str_len,
                          uint32_t *digest, size_t digest_len) {
-  HARDENED_TRY(kmac_init(kKmacOperationCSHAKE, kKmacSecurityStrength256,
-                         /*hw_backed=*/kHardenedBoolFalse));
-
-  HARDENED_TRY(kmac_write_prefix_block(kKmacOperationCSHAKE, func_name,
-                                       func_name_len, cust_str, cust_str_len));
-
-  return kmac_process_msg_blocks(kKmacOperationCSHAKE, message, message_len,
-                                 digest, digest_len);
+  HARDENED_TRY(wait_status_bit(KMAC_STATUS_SHA3_IDLE_BIT, 1));
+  HARDENED_TRY(
+      kmac_set_prefix_regs(func_name, func_name_len, cust_str, cust_str_len));
+  return hash(kKmacOperationCshake, kKmacSecurityStrength256, message,
+              message_len, digest_len, digest);
 }
 
-status_t kmac_kmac_128(kmac_blinded_key_t *key, const uint8_t *message,
-                       size_t message_len, const unsigned char *cust_str,
-                       size_t cust_str_len, uint32_t *digest,
-                       size_t digest_len) {
+status_t kmac_kmac_128(kmac_blinded_key_t *key, hardened_bool_t masked_digest,
+                       const uint8_t *message, size_t message_len,
+                       const unsigned char *cust_str, size_t cust_str_len,
+                       uint32_t *digest, size_t digest_len) {
   HARDENED_TRY(
-      kmac_init(kKmacOperationKMAC, kKmacSecurityStrength128, key->hw_backed));
+      kmac_init(kKmacOperationKmac, kKmacSecurityStrength128, key->hw_backed));
 
-  if (key->hw_backed == kHardenedBoolTrue) {
-    if (key->share0 != NULL || key->share1 != NULL ||
-        key->len != kKmacSideloadKeyLength / 8) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-  } else if (key->hw_backed == kHardenedBoolFalse) {
-    if (key->share0 == NULL || key->share1 == NULL) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_TRY(kmac_write_key_block(key));
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  HARDENED_TRY(kmac_write_prefix_block(kKmacOperationKMAC, /*func_name=*/NULL,
-                                       /*func_name_len=*/0, cust_str,
-                                       cust_str_len));
+  HARDENED_TRY(kmac_write_key_block(key));
+  HARDENED_TRY(kmac_set_prefix_regs(
+      kKmacFuncNameKMAC, sizeof(kKmacFuncNameKMAC), cust_str, cust_str_len));
 
-  return kmac_process_msg_blocks(kKmacOperationKMAC, message, message_len,
-                                 digest, digest_len);
+  return kmac_process_msg_blocks(kKmacOperationKmac, message, message_len,
+                                 digest, digest_len, masked_digest);
 }
 
-status_t kmac_kmac_256(kmac_blinded_key_t *key, const uint8_t *message,
-                       size_t message_len, const unsigned char *cust_str,
-                       size_t cust_str_len, uint32_t *digest,
-                       size_t digest_len) {
+status_t kmac_kmac_256(kmac_blinded_key_t *key, hardened_bool_t masked_digest,
+                       const uint8_t *message, size_t message_len,
+                       const unsigned char *cust_str, size_t cust_str_len,
+                       uint32_t *digest, size_t digest_len) {
   HARDENED_TRY(
-      kmac_init(kKmacOperationKMAC, kKmacSecurityStrength256, key->hw_backed));
-
-  if (key->hw_backed == kHardenedBoolTrue) {
-    if (key->share0 != NULL || key->share1 != NULL ||
-        key->len != kKmacSideloadKeyLength / 8) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-  } else if (key->hw_backed == kHardenedBoolFalse) {
-    if (key->share0 == NULL || key->share1 == NULL) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_TRY(kmac_write_key_block(key));
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
+      kmac_init(kKmacOperationKmac, kKmacSecurityStrength256, key->hw_backed));
 
-  HARDENED_TRY(kmac_write_prefix_block(kKmacOperationKMAC, /*func_name=*/NULL,
-                                       /*func_name_len=*/0, cust_str,
-                                       cust_str_len));
+  HARDENED_TRY(kmac_write_key_block(key));
+  HARDENED_TRY(kmac_set_prefix_regs(
+      kKmacFuncNameKMAC, sizeof(kKmacFuncNameKMAC), cust_str, cust_str_len));
 
-  return kmac_process_msg_blocks(kKmacOperationKMAC, message, message_len,
-                                 digest, digest_len);
+  return kmac_process_msg_blocks(kKmacOperationKmac, message, message_len,
+                                 digest, digest_len, masked_digest);
 }
diff --git a/sw/device/lib/crypto/drivers/kmac.h b/sw/device/lib/crypto/drivers/kmac.h
index cfa421cd7c26d..d08ae8dbcd526 100644
--- a/sw/device/lib/crypto/drivers/kmac.h
+++ b/sw/device/lib/crypto/drivers/kmac.h
@@ -27,21 +27,21 @@ enum {
   // Keymgr hjson files from HW, so we need to hardcode it for the moment.
   kKmacSideloadKeyLength = 256,
   // Length of a SHA3-224 digest in bytes.
-  kSha3_224DigestBytes = 224 / 8,
+  kKmacSha3224DigestBytes = 224 / 8,
   // Length of a SHA3-224 digest in 32-bit words.
-  kSha3_224DigestWords = kSha3_224DigestBytes / sizeof(uint32_t),
+  kKmacSha3224DigestWords = kKmacSha3224DigestBytes / sizeof(uint32_t),
   // Length of a SHA3_256 digest in bytes.
-  kSha3_256DigestBytes = 256 / 8,
+  kKmacSha3256DigestBytes = 256 / 8,
   // Length of a SHA3_256 digest in 32-bit words.
-  kSha3_256DigestWords = kSha3_256DigestBytes / sizeof(uint32_t),
+  kKmacSha3256DigestWords = kKmacSha3256DigestBytes / sizeof(uint32_t),
   // Length of a SHA3_384 digest in bytes.
-  kSha3_384DigestBytes = 384 / 8,
+  kKmacSha3384DigestBytes = 384 / 8,
   // Length of a SHA3_384 digest in 32-bit words.
-  kSha3_384DigestWords = kSha3_384DigestBytes / sizeof(uint32_t),
+  kKmacSha3384DigestWords = kKmacSha3384DigestBytes / sizeof(uint32_t),
   // Length of a SHA3_512 digest in bytes.
-  kSha3_512DigestBytes = 512 / 8,
+  kKmacSha3512DigestBytes = 512 / 8,
   // Length of a SHA3_512 digest in 32-bit words.
-  kSha3_512DigestWords = kSha3_512DigestBytes / sizeof(uint32_t),
+  kKmacSha3512DigestWords = kKmacSha3512DigestBytes / sizeof(uint32_t),
 };
 
 /**
@@ -240,8 +240,12 @@ status_t kmac_cshake_256(const uint8_t *message, size_t message_len,
  * pointers must be correctly configured and `len` must match the key length.
  *
  * The caller must ensure that `digest_len` words are allocated at the location
- * pointed to by `digest`. `cust_str_len` must not exceed `kKmacCustStrMaxSize`.
+ * pointed to by `digest`. `cust_str_len` must not exceed
+ * `kKmacCustStrMaxSize`. If `masked_digest` is true, the `digest` buffer must
+ * have enough space for 2x `digest_len` words.
  *
+ * @param key The KMAC key.
+ * @param masked_digest Whether to return the digest in concatenated shares.
  * @param message The input message.
  * @param message_len The input message length in bytes.
  * @param cust_str The customization string.
@@ -251,10 +255,10 @@ status_t kmac_cshake_256(const uint8_t *message, size_t message_len,
  * @return Error status.
  */
 OT_WARN_UNUSED_RESULT
-status_t kmac_kmac_128(kmac_blinded_key_t *key, const uint8_t *message,
-                       size_t message_len, const unsigned char *cust_str,
-                       size_t cust_str_len, uint32_t *digest,
-                       size_t digest_len);
+status_t kmac_kmac_128(kmac_blinded_key_t *key, hardened_bool_t masked_digest,
+                       const uint8_t *message, size_t message_len,
+                       const unsigned char *cust_str, size_t cust_str_len,
+                       uint32_t *digest, size_t digest_len);
 
 /**
  * Compute KMAC-256 in one-shot.
@@ -269,8 +273,12 @@ status_t kmac_kmac_128(kmac_blinded_key_t *key, const uint8_t *message,
  * pointers must be correctly configured and `len` must match the key length.
  *
  * The caller must ensure that `digest_len` words are allocated at the location
- * pointed to by `digest`. `cust_str_len` must not exceed `kKmacCustStrMaxSize`.
+ * pointed to by `digest`. `cust_str_len` must not exceed
+ * `kKmacCustStrMaxSize`. If `masked_digest` is true, the `digest` buffer must
+ * have enough space for 2x `digest_len` words.
  *
+ * @param key The KMAC key.
+ * @param masked_digest Whether to return the digest in concatenated shares.
  * @param message The input message.
  * @param message_len The input message length in bytes.
  * @param cust_str The customization string.
@@ -280,10 +288,10 @@ status_t kmac_kmac_128(kmac_blinded_key_t *key, const uint8_t *message,
  * @return Error status.
  */
 OT_WARN_UNUSED_RESULT
-status_t kmac_kmac_256(kmac_blinded_key_t *key, const uint8_t *message,
-                       size_t message_len, const unsigned char *cust_str,
-                       size_t cust_str_len, uint32_t *digest,
-                       size_t digest_len);
+status_t kmac_kmac_256(kmac_blinded_key_t *key, hardened_bool_t masked_digest,
+                       const uint8_t *message, size_t message_len,
+                       const unsigned char *cust_str, size_t cust_str_len,
+                       uint32_t *digest, size_t digest_len);
 
 #ifdef __cplusplus
 }
diff --git a/sw/device/lib/crypto/drivers/mock_entropy.cc b/sw/device/lib/crypto/drivers/mock_entropy.cc
new file mode 100644
index 0000000000000..6ca12b0df4e56
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/mock_entropy.cc
@@ -0,0 +1,61 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+/**
+ * Basic mock of the entropy complex driver.
+ *
+ * Enables on-host unit tests of code that uses `entropy_complex_check()`.
+ */
+
+namespace test {
+extern "C" {
+
+const entropy_seed_material_t kEntropyEmptySeed = {
+    .len = 0,
+    .data = {0},
+};
+
+status_t entropy_complex_init(void) { return OTCRYPTO_OK; }
+
+status_t entropy_complex_check(void) { return OTCRYPTO_OK; }
+
+status_t entropy_csrng_instantiate(
+    hardened_bool_t disable_trng_input,
+    const entropy_seed_material_t *seed_material) {
+  return OTCRYPTO_OK;
+}
+
+status_t entropy_csrng_reseed(hardened_bool_t disable_trng_input,
+                              const entropy_seed_material_t *seed_material) {
+  return OTCRYPTO_OK;
+}
+
+status_t entropy_csrng_update(const entropy_seed_material_t *seed_material) {
+  return OTCRYPTO_OK;
+}
+
+status_t entropy_csrng_generate_start(
+    const entropy_seed_material_t *seed_material, size_t len) {
+  return OTCRYPTO_OK;
+}
+
+status_t entropy_csrng_generate_data_get(uint32_t *buf, size_t len,
+                                         hardened_bool_t fips_check) {
+  // This mock does not support actually generating random values.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+status_t entropy_csrng_generate(const entropy_seed_material_t *seed_material,
+                                uint32_t *buf, size_t len,
+                                hardened_bool_t fips_check) {
+  // This mock does not support actually generating random values.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+status_t entropy_csrng_uninstantiate(void) { return OTCRYPTO_OK; }
+}
+}  // namespace test
diff --git a/sw/device/lib/crypto/drivers/mock_rv_core_ibex.cc b/sw/device/lib/crypto/drivers/mock_rv_core_ibex.cc
new file mode 100644
index 0000000000000..aa5b5f6d0a45c
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/mock_rv_core_ibex.cc
@@ -0,0 +1,18 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
+
+namespace test {
+extern "C" {
+
+// Since this mock library is for tests only, the randomness does not need to be
+// real. https://xkcd.com/221/
+uint32_t ibex_rnd32_read(void) { return 4; }
+
+uint32_t hardened_memshred_random_word(void) { return ibex_rnd32_read(); }
+
+uint32_t random_order_random_word(void) { return ibex_rnd32_read(); }
+}
+}  // namespace test
diff --git a/sw/device/lib/crypto/drivers/otbn.c b/sw/device/lib/crypto/drivers/otbn.c
index 899084498e56f..2bdebe37d327d 100644
--- a/sw/device/lib/crypto/drivers/otbn.c
+++ b/sw/device/lib/crypto/drivers/otbn.c
@@ -6,10 +6,11 @@
 
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/crc32.h"
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/random_order.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -113,35 +114,58 @@ static status_t otbn_assert_idle(void) {
   return OTCRYPTO_ASYNC_INCOMPLETE;
 }
 
-/**
- * Helper function for writing to OTBN's DMEM or IMEM.
- *
- * @param dest_addr Destination address.
- * @param src Source buffer.
- * @param num_words Number of words to copy.
- */
-static void otbn_write(uint32_t dest_addr, const uint32_t *src,
-                       size_t num_words) {
-  // TODO: replace 0 with a random index like the silicon_creator driver
-  // (requires an interface to Ibex's RND valid bit and data register).
-  size_t i = ((uint64_t)0 * (uint64_t)num_words) >> 32;
-  enum { kStep = 1 };
-  size_t iter_cnt = 0;
-  for (; launder32(iter_cnt) < num_words; ++iter_cnt) {
-    abs_mmio_write32(dest_addr + i * sizeof(uint32_t), src[i]);
-    i += kStep;
-    if (launder32(i) >= num_words) {
-      i -= num_words;
-    }
-    HARDENED_CHECK_LT(i, num_words);
-  }
-  HARDENED_CHECK_EQ(iter_cnt, num_words);
-}
-
 status_t otbn_dmem_write(size_t num_words, const uint32_t *src,
                          otbn_addr_t dest) {
   HARDENED_TRY(check_offset_len(dest, num_words, kOtbnDMemSizeBytes));
-  otbn_write(kBase + OTBN_DMEM_REG_OFFSET + dest, src, num_words);
+
+  // Reset the LOAD_CHECKSUM register.
+  abs_mmio_write32(kBase + OTBN_LOAD_CHECKSUM_REG_OFFSET, 0);
+
+  // Initialize the CRC.
+  uint32_t ctx;
+  crc32_init(&ctx);
+
+  // Setup the random order construct.
+  random_order_t order;
+  random_order_init(&order, num_words);
+
+  size_t count = 0;
+  size_t expected_count = random_order_len(&order);
+
+  for (; launderw(count) < expected_count; count = launderw(count) + 1) {
+    // The value obtained from `advance()` is laundered, to prevent
+    // implementation details from leaking across procedures.
+    size_t idx = launderw(random_order_advance(&order));
+    size_t idx_word = idx * sizeof(uint32_t);
+
+    // Prevent the compiler from reordering the loop; this ensures a
+    // happens-before among indices consistent with `order`.
+    barrierw(idx);
+
+    // Perform the write.
+    abs_mmio_write32(kBase + OTBN_DMEM_REG_OFFSET + dest + idx_word, src[idx]);
+
+    // Update the CRC. According to the OTBN documentation, each CRC update
+    // consists of 48-bit: {imem, idx, wdata}
+    // imem: set to 0 for DMEM writes.
+    // idx: the index padded to 15b.
+    // wdata: the 32b word written into DMEM.
+    char crc_data[6];
+    memset(crc_data, 0, sizeof(crc_data));
+    uint32_t offset = ((dest + idx_word) >> 2) & 0x7FFF;
+    memcpy(crc_data, &src[idx], sizeof(uint32_t));
+    memcpy(crc_data + sizeof(uint32_t), &offset, 2);
+    crc32_add(&ctx, crc_data, sizeof(crc_data));
+  }
+  RANDOM_ORDER_HARDENED_CHECK_DONE(order);
+  HARDENED_CHECK_EQ(count, expected_count);
+
+  // Get the computed (expected) checksum, fetch the checksum from the OTBN
+  // LOAD_CHECKSUM register, and compare both registers.
+  uint32_t checksum_expected = crc32_finish(&ctx);
+  uint32_t checksum = abs_mmio_read32(kBase + OTBN_LOAD_CHECKSUM_REG_OFFSET);
+  HARDENED_CHECK_EQ(checksum, checksum_expected);
+
   return OTCRYPTO_OK;
 }
 
@@ -173,10 +197,6 @@ status_t otbn_dmem_read(size_t num_words, otbn_addr_t src, uint32_t *dest) {
 }
 
 status_t otbn_execute(void) {
-  // Ensure that the entropy complex is in a good state (for the RND
-  // instruction and data wiping).
-  HARDENED_TRY(entropy_complex_check());
-
   // Ensure OTBN is idle before attempting to run a command.
   HARDENED_TRY(otbn_assert_idle());
 
@@ -226,7 +246,6 @@ uint32_t otbn_instruction_count_get(void) {
 }
 
 status_t otbn_imem_sec_wipe(void) {
-  HARDENED_TRY(entropy_complex_check());
   HARDENED_TRY(otbn_assert_idle());
   abs_mmio_write32(kBase + OTBN_CMD_REG_OFFSET, kOtbnCmdSecWipeImem);
   HARDENED_TRY(otbn_busy_wait_for_done());
@@ -234,7 +253,6 @@ status_t otbn_imem_sec_wipe(void) {
 }
 
 status_t otbn_dmem_sec_wipe(void) {
-  HARDENED_TRY(entropy_complex_check());
   HARDENED_TRY(otbn_assert_idle());
   abs_mmio_write32(kBase + OTBN_CMD_REG_OFFSET, kOtbnCmdSecWipeDmem);
   HARDENED_TRY(otbn_busy_wait_for_done());
diff --git a/sw/device/lib/crypto/drivers/otbn.h b/sw/device/lib/crypto/drivers/otbn.h
index b75df6d181196..becb1f4ddb7e0 100644
--- a/sw/device/lib/crypto/drivers/otbn.h
+++ b/sw/device/lib/crypto/drivers/otbn.h
@@ -15,6 +15,27 @@
 extern "C" {
 #endif
 
+/**
+ * Hardened version of the `TRY` macro that wipes DMEM() on an error.
+ *
+ * Returns an error if either expr_ represents an error, or if the OK code does
+ * not match the expected hardened value.
+ *
+ * @param expr_ An expression that evaluates to a `status_t`.
+ * @return The enclosed OK value.
+ */
+#define HARDENED_TRY_WIPE_DMEM(expr_)                                   \
+  do {                                                                  \
+    status_t status_ = expr_;                                           \
+    if (launder32(OT_UNSIGNED(status_.value)) != kHardenedBoolTrue) {   \
+      otbn_dmem_sec_wipe();                                             \
+      return (status_t){                                                \
+          .value = (int32_t)(OT_UNSIGNED(status_.value) | 0x80000000)}; \
+    }                                                                   \
+    HARDENED_CHECK_EQ(status_.value, kHardenedBoolTrue);                \
+    status_.value;                                                      \
+  } while (false)
+
 /**
  * Constants related to OTBN wide words
  */
@@ -191,6 +212,8 @@ typedef struct otbn_app {
 /**
  * Write to OTBN's data memory (DMEM)
  *
+ * To mitigate SCA, write in random order to the DMEM.
+ *
  * Only 32b-aligned 32b word accesses are allowed. If `dest` is not
  * word-aligned or if the length and offset exceed the DMEM size, this function
  * will return an error.
@@ -242,6 +265,11 @@ status_t otbn_dmem_read(size_t num_words, otbn_addr_t src, uint32_t *dest);
  *
  * This function returns an error if called when OTBN is not idle.
  *
+ * The caller is responsible for initializing the entropy complex before
+ * calling this function, even if the RND register is not being used. OTBN
+ * still consumes randomness for the secure wipe of its internal state before
+ * exiting the program, and will lock if entropy is unavailable.
+ *
  * @return Result of the operation.
  */
 status_t otbn_execute(void);
@@ -284,6 +312,10 @@ uint32_t otbn_instruction_count_get(void);
  * This function returns an error if called when OTBN is not idle, and blocks
  * until the secure wipe is complete.
  *
+ * The caller is responsible for initializing the entropy complex before
+ * calling this function, since it consumes randomness. If entropy is not
+ * available, OTBN will lock itself.
+ *
  * @return Result of the operation.
  */
 status_t otbn_imem_sec_wipe(void);
@@ -294,6 +326,10 @@ status_t otbn_imem_sec_wipe(void);
  * This function returns an error if called when OTBN is not idle, and blocks
  * until the secure wipe is complete.
  *
+ * The caller is responsible for initializing the entropy complex before
+ * calling this function, since it consumes randomness. If entropy is not
+ * available, OTBN will lock itself.
+ *
  * @return Result of the operation.
  */
 status_t otbn_dmem_sec_wipe(void);
@@ -319,6 +355,9 @@ status_t otbn_set_ctrl_software_errs_fatal(bool enable);
  *
  * This function will return an error if called when OTBN is not idle.
  *
+ * Because this function uses the OTBN secure wipe functionality before
+ * loading, it will lock OTBN if the entropy complex is not initialized.
+ *
  * @param ctx The context object.
  * @param app The application to load into OTBN.
  * @return The result of the operation.
diff --git a/sw/device/lib/crypto/drivers/rv_core_ibex.c b/sw/device/lib/crypto/drivers/rv_core_ibex.c
new file mode 100644
index 0000000000000..5c3977c139ff6
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/rv_core_ibex.c
@@ -0,0 +1,76 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/csr.h"
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_core_ibex_regs.h"
+
+enum {
+  kBaseAddr = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR,
+  /**
+   * CSR_REG_CPUCTRL[0] is the iCache configuration field.
+   */
+  kCpuctrlICacheMask = 1,
+};
+
+/**
+ * Blocks until data is ready in the RND register.
+ */
+static void wait_rnd_valid(void) {
+  while (true) {
+    uint32_t reg =
+        abs_mmio_read32(kBaseAddr + RV_CORE_IBEX_RND_STATUS_REG_OFFSET);
+    if (bitfield_bit32_read(reg, RV_CORE_IBEX_RND_STATUS_RND_DATA_VALID_BIT)) {
+      return;
+    }
+  }
+}
+
+status_t ibex_disable_icache(hardened_bool_t *icache_enabled) {
+  // Check if the instruction cache is already disabled.
+  uint32_t csr;
+  CSR_READ(CSR_REG_CPUCTRL, &csr);
+  if ((csr & kCpuctrlICacheMask) == 1) {
+    *icache_enabled = kHardenedBoolTrue;
+  } else {
+    *icache_enabled = kHardenedBoolFalse;
+    HARDENED_CHECK_EQ(launder32((csr & kCpuctrlICacheMask)), 0);
+  }
+
+  // If the instruction cache is enabled, disable it.
+  if (*icache_enabled == kHardenedBoolTrue) {
+    CSR_CLEAR_BITS(CSR_REG_CPUCTRL, kCpuctrlICacheMask);
+  } else {
+    HARDENED_CHECK_EQ(launder32(*icache_enabled), kHardenedBoolFalse);
+  }
+
+  return OTCRYPTO_OK;
+}
+
+void ibex_restore_icache(hardened_bool_t icache_enabled) {
+  // If the instruction cache was enabled before the CL disabled it, enable it
+  // again.
+  if (icache_enabled == kHardenedBoolTrue) {
+    CSR_SET_BITS(CSR_REG_CPUCTRL, kCpuctrlICacheMask);
+  }
+}
+
+uint32_t ibex_rnd32_read(void) {
+  wait_rnd_valid();
+  return abs_mmio_read32(kBaseAddr + RV_CORE_IBEX_RND_DATA_REG_OFFSET);
+}
+
+// Provides the source of randomness for `hardened_memshred` (see
+// `hardened_memory.h`).
+uint32_t hardened_memshred_random_word(void) { return ibex_rnd32_read(); }
+
+// Provides the source of randomness for `random_order` (see `random_order.h`).
+uint32_t random_order_random_word(void) { return ibex_rnd32_read(); }
diff --git a/sw/device/lib/crypto/drivers/rv_core_ibex.h b/sw/device/lib/crypto/drivers/rv_core_ibex.h
new file mode 100644
index 0000000000000..68e64a01ab7e2
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/rv_core_ibex.h
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_RV_CORE_IBEX_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_RV_CORE_IBEX_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+/**
+ * Disable the Ibex Instruction Cache if it is enabled.
+ *
+ * Reads out the current state of the instruction cache. If it is enabled,
+ * disable it for the crypto lib.
+ *
+ * @param[out] icache_enabled kHardenedBoolTrue if the iCache was enabled before
+ * we disabled it.
+ * @return Error status.
+ */
+status_t ibex_disable_icache(hardened_bool_t *icache_enabled);
+
+/**
+ * Enables the Ibex Instruction Cache if icache_enabled is set.
+ *
+ * If icache_enabled == kHardenedBoolTrue, this function enables the iCache by
+ * writing to CPUCTRL.
+ */
+void ibex_restore_icache(hardened_bool_t icache_enabled);
+
+/**
+ * Get random data from the EDN0 interface.
+ *
+ * Important: this function will hang if the entropy complex is not
+ * initialized. Callers are responsible for checking first.
+ *
+ * @return 32 bits of randomness from EDN0.
+ */
+uint32_t ibex_rnd32_read(void);
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_DRIVERS_RV_CORE_IBEX_H_
diff --git a/sw/device/lib/crypto/drivers/rv_core_ibex_test.c b/sw/device/lib/crypto/drivers/rv_core_ibex_test.c
new file mode 100644
index 0000000000000..fb39caf38f195
--- /dev/null
+++ b/sw/device/lib/crypto/drivers/rv_core_ibex_test.c
@@ -0,0 +1,38 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_core_ibex_regs.h"
+
+enum {
+  kBase = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR,
+};
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static status_t ibex_entropy_test(void) {
+  uint32_t rnd_status;
+  uint32_t rnd_data[2];
+
+  // Read the initial value of the RND_DATA CSR.
+  uint32_t rnd_data0 = ibex_rnd32_read();
+  // Read RND_DATA again and check if it changed.
+  uint32_t rnd_data1 = ibex_rnd32_read();
+  TRY_CHECK(rnd_data0 != rnd_data1);
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, ibex_entropy_test);
+  return status_ok(result);
+}
diff --git a/sw/device/lib/crypto/impl/BUILD b/sw/device/lib/crypto/impl/BUILD
index 2697d790300fe..e6378c5d462e6 100644
--- a/sw/device/lib/crypto/impl/BUILD
+++ b/sw/device/lib/crypto/impl/BUILD
@@ -4,7 +4,7 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 config_setting(
     name = "crypto_status_debug",
@@ -23,8 +23,36 @@ cc_library(
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:aes",
+        "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
+cc_library(
+    name = "aes_gcm",
+    srcs = ["aes_gcm.c"],
+    hdrs = ["//sw/device/lib/crypto/include:aes_gcm.h"],
+    deps = [
+        ":integrity",
+        ":keyblob",
+        "//sw/device/lib/base:hardened_memory",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:aes",
+        "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl/aes_gcm",
-        "//sw/device/lib/crypto/impl/aes_kwp",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_build_info",
+    srcs = ["cryptolib_build_info.c"],
+    hdrs = ["//sw/device/lib/crypto/include:cryptolib_build_info.h"],
+    deps = [
+        ":status",
+        "//sw/device/lib/crypto/drivers:cryptolib_build_info",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -38,40 +66,60 @@ cc_library(
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:math",
         "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
 
 cc_library(
-    name = "ecc",
-    srcs = ["ecc.c"],
-    hdrs = ["//sw/device/lib/crypto/include:ecc.h"],
+    name = "ecc_p256",
+    srcs = ["ecc_p256.c"],
+    hdrs = ["//sw/device/lib/crypto/include:ecc_p256.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":keyblob",
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:hmac",
-        "//sw/device/lib/crypto/impl/ecc:ecdh_p256",
-        "//sw/device/lib/crypto/impl/ecc:ecdh_p384",
-        "//sw/device/lib/crypto/impl/ecc:ecdsa_p256",
-        "//sw/device/lib/crypto/impl/ecc:ecdsa_p384",
+        "//sw/device/lib/crypto/impl/ecc:p256",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
 
 cc_library(
-    name = "hash",
-    srcs = ["hash.c"],
-    hdrs = [
-        "//sw/device/lib/crypto/include:hash.h",
+    name = "ecc_p384",
+    srcs = ["ecc_p384.c"],
+    hdrs = ["//sw/device/lib/crypto/include:ecc_p384.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":keyblob",
+        "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:hmac",
+        "//sw/device/lib/crypto/impl/ecc:p384",
+        "//sw/device/lib/crypto/include:datatypes",
     ],
+)
+
+cc_library(
+    name = "ed25519",
+    srcs = ["ed25519.c"],
+    hdrs = ["//sw/device/lib/crypto/include:ed25519.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":status",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:hmac",
-        "//sw/device/lib/crypto/drivers:kmac",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
+cc_library(
+    name = "hkdf",
+    srcs = ["hkdf.c"],
+    hdrs = ["//sw/device/lib/crypto/include:hkdf.h"],
+    deps = [
+        ":hmac",
+        ":integrity",
+        ":keyblob",
+        ":status",
+        "//sw/device/lib/base:math",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -81,22 +129,22 @@ cc_library(
     srcs = ["integrity.c"],
     hdrs = ["integrity.h"],
     deps = [
+        "//sw/device/lib/base:crc32_device_library",  # force non-mock version in unit tests
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
 
 cc_library(
-    name = "kdf",
-    srcs = ["kdf.c"],
-    hdrs = ["//sw/device/lib/crypto/include:kdf.h"],
+    name = "kdf_ctr",
+    srcs = ["kdf_ctr.c"],
+    hdrs = ["//sw/device/lib/crypto/include:kdf_ctr.h"],
     deps = [
+        ":hmac",
         ":integrity",
         ":keyblob",
-        ":mac",
         ":status",
         "//sw/device/lib/base:math",
-        "//sw/device/lib/crypto/drivers:kmac",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -110,7 +158,9 @@ cc_library(
         ":status",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:math",
+        "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:keymgr",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -130,9 +180,11 @@ cc_library(
     hdrs = ["//sw/device/lib/crypto/include:key_transport.h"],
     deps = [
         ":status",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl:drbg",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl/aes_kwp",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -146,6 +198,22 @@ cc_test(
     ],
 )
 
+cc_library(
+    name = "kmac_kdf",
+    srcs = ["kmac_kdf.c"],
+    hdrs = ["//sw/device/lib/crypto/include:kmac_kdf.h"],
+    deps = [
+        ":integrity",
+        ":keyblob",
+        ":status",
+        "//sw/device/lib/base:hardened_memory",
+        "//sw/device/lib/base:math",
+        "//sw/device/lib/crypto/drivers:kmac",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
 cc_library(
     name = "rsa",
     srcs = ["rsa.c"],
@@ -155,9 +223,44 @@ cc_library(
         ":status",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl/rsa:rsa_encryption",
-        "//sw/device/lib/crypto/impl/rsa:rsa_keygen",
         "//sw/device/lib/crypto/impl/rsa:rsa_signature",
+        "//sw/device/lib/crypto/impl/rsa:run_rsa_key_from_cofactor",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
+cc_library(
+    name = "sha2",
+    srcs = ["sha2.c"],
+    hdrs = [
+        "//sw/device/lib/crypto/include:sha2.h",
+    ],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":status",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
+        "//sw/device/lib/crypto/drivers:hmac",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+        "//sw/device/lib/crypto/include:datatypes",
+    ],
+)
+
+cc_library(
+    name = "sha3",
+    srcs = ["sha3.c"],
+    hdrs = [
+        "//sw/device/lib/crypto/include:sha3.h",
+    ],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":status",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
+        "//sw/device/lib/crypto/drivers:kmac",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/include:datatypes",
     ],
 )
@@ -200,18 +303,46 @@ cc_test(
 )
 
 cc_library(
-    name = "mac",
-    srcs = ["mac.c"],
+    name = "hmac",
+    srcs = ["hmac.c"],
     hdrs = [
-        "//sw/device/lib/crypto/include:mac.h",
+        "//sw/device/lib/crypto/include:hmac.h",
     ],
     deps = [
-        ":hash",
         ":integrity",
         ":keyblob",
+        ":sha2",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
+        "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:hmac",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+    ],
+)
+
+cc_library(
+    name = "kmac",
+    srcs = ["kmac.c"],
+    hdrs = [
+        "//sw/device/lib/crypto/include:kmac.h",
+    ],
+    deps = [
+        ":integrity",
+        ":keyblob",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/crypto/drivers:kmac",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+    ],
+)
+
+cc_library(
+    name = "x25519",
+    srcs = ["x25519.c"],
+    hdrs = ["//sw/device/lib/crypto/include:x25519.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":status",
+        "//sw/device/lib/crypto/include:datatypes",
     ],
 )
diff --git a/sw/device/lib/crypto/impl/aes.c b/sw/device/lib/crypto/impl/aes.c
index 5acf1428e1437..adeeda195dad6 100644
--- a/sw/device/lib/crypto/impl/aes.c
+++ b/sw/device/lib/crypto/impl/aes.c
@@ -9,10 +9,8 @@
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/aes.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/drivers/keymgr.h"
-#include "sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h"
-#include "sw/device/lib/crypto/impl/aes_gcm/ghash.h"
-#include "sw/device/lib/crypto/impl/aes_kwp/aes_kwp.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/impl/status.h"
@@ -29,50 +27,6 @@ OT_ASSERT_ENUM_VALUE(kAesCipherModeCfb, (uint32_t)kOtcryptoAesModeCfb);
 OT_ASSERT_ENUM_VALUE(kAesCipherModeOfb, (uint32_t)kOtcryptoAesModeOfb);
 OT_ASSERT_ENUM_VALUE(kAesCipherModeCtr, (uint32_t)kOtcryptoAesModeCtr);
 
-// Check GHASH context size against the underlying implementation.
-static_assert(sizeof(otcrypto_aes_gcm_context_t) >= sizeof(aes_gcm_context_t),
-              "Size of AES-GCM context object for top-level API must be at "
-              "least as large as the context for the "
-              "underlying implementation.");
-static_assert(alignof(aes_gcm_context_t) >= alignof(uint32_t),
-              "Internal AES-GCM context object must be word-aligned for use "
-              "with `hardened_memcpy`.");
-static_assert(sizeof(otcrypto_key_config_t) % sizeof(uint32_t) == 0,
-              "Key configuration size should be a multiple of 32 bits");
-
-// Ensure the internal AES-GCM context size is a multiple of the word size and
-// calculate the number of words.
-static_assert(sizeof(aes_gcm_context_t) % sizeof(uint32_t) == 0,
-              "Internal AES-GCM context object must be a multiple of the word "
-              "size for use with `hardened_memcpy`.");
-enum {
-  kAesGcmContextNumWords = sizeof(aes_gcm_context_t) / sizeof(uint32_t),
-};
-
-/**
- * Save an AES-GCM context.
- *
- * @param internal_ctx Internal context object to save.
- * @param[out] api_ctx Resulting API-facing context object.
- */
-static inline void gcm_context_save(aes_gcm_context_t *internal_ctx,
-                                    otcrypto_aes_gcm_context_t *api_ctx) {
-  hardened_memcpy(api_ctx->data, (uint32_t *)internal_ctx,
-                  kAesGcmContextNumWords);
-}
-
-/**
- * Restore an AES-GCM context.
- *
- * @param api_ctx API-facing context object to restore from.
- * @param[out] internal_ctx Resulting internal context object.
- */
-static inline void gcm_context_restore(otcrypto_aes_gcm_context_t *api_ctx,
-                                       aes_gcm_context_t *internal_ctx) {
-  hardened_memcpy((uint32_t *)internal_ctx, api_ctx->data,
-                  kAesGcmContextNumWords);
-}
-
 /**
  * Extract an AES key from the blinded key struct.
  *
@@ -80,12 +34,15 @@ static inline void gcm_context_restore(otcrypto_aes_gcm_context_t *api_ctx,
  * function is only for basic AES modes; do not use for AES-GCM or AES-KWP keys
  * since they will fail the mode check.
  *
+ * Re-masks the key after checking its integrity. The caller should ensure the
+ * entropy complex is up before calling this function.
+ *
  * @param blinded_key Blinded key struct.
  * @param aes_mode Block cipher mode.
  * @param[out] aes_key Destination AES key struct.
  * @return Result of the operation.
  */
-static status_t aes_key_construct(const otcrypto_blinded_key_t *blinded_key,
+static status_t aes_key_construct(otcrypto_blinded_key_t *blinded_key,
                                   const otcrypto_aes_mode_t aes_mode,
                                   aes_key_t *aes_key) {
   // Key integrity check.
@@ -105,6 +62,9 @@ static status_t aes_key_construct(const otcrypto_blinded_key_t *blinded_key,
     aes_key->key_shares[0] = NULL;
     aes_key->key_shares[1] = NULL;
   } else if (blinded_key->config.hw_backed == kHardenedBoolFalse) {
+    // Remask the key.
+    HARDENED_TRY(keyblob_remask(blinded_key));
+
     // Get pointers to the individual shares.
     uint32_t *share0;
     uint32_t *share1;
@@ -122,25 +82,40 @@ static status_t aes_key_construct(const otcrypto_blinded_key_t *blinded_key,
   }
 
   // Set the block cipher mode based on the key mode.
+  otcrypto_key_mode_t blinded_key_mode_used = launder32(0);
   switch (blinded_key->config.key_mode) {
     case kOtcryptoKeyModeAesEcb:
       aes_key->mode = kAesCipherModeEcb;
+      blinded_key_mode_used =
+          launder32(blinded_key_mode_used) | kOtcryptoKeyModeAesEcb;
       break;
     case kOtcryptoKeyModeAesCbc:
-      aes_key->mode = kAesCipherModeCbc;
+      aes_key->mode = launder32(kAesCipherModeCbc);
+      blinded_key_mode_used =
+          launder32(blinded_key_mode_used) | kOtcryptoKeyModeAesCbc;
       break;
     case kOtcryptoKeyModeAesCfb:
-      aes_key->mode = kAesCipherModeCfb;
+      aes_key->mode = launder32(kAesCipherModeCfb);
+      blinded_key_mode_used =
+          launder32(blinded_key_mode_used) | kOtcryptoKeyModeAesCfb;
       break;
     case kOtcryptoKeyModeAesOfb:
-      aes_key->mode = kAesCipherModeOfb;
+      aes_key->mode = launder32(kAesCipherModeOfb);
+      blinded_key_mode_used =
+          launder32(blinded_key_mode_used) | kOtcryptoKeyModeAesOfb;
       break;
     case kOtcryptoKeyModeAesCtr:
-      aes_key->mode = kAesCipherModeCtr;
+      aes_key->mode = launder32(kAesCipherModeCtr);
+      blinded_key_mode_used =
+          launder32(blinded_key_mode_used) | kOtcryptoKeyModeAesCtr;
       break;
     default:
       return OTCRYPTO_BAD_ARGS;
   }
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(blinded_key_mode_used),
+                    blinded_key->config.key_mode);
 
   // Check that the key mode matches the requested block cipher mode.
   if (memcmp(&aes_key->mode, &aes_mode, sizeof(aes_key->mode)) != 0) {
@@ -151,6 +126,11 @@ static status_t aes_key_construct(const otcrypto_blinded_key_t *blinded_key,
   // Set the AES key length (in words).
   aes_key->key_len = keyblob_share_num_words(blinded_key->config);
 
+  if (aes_key->sideload == kHardenedBoolFalse) {
+    // Create the checksum of the key and store it in the key structure.
+    aes_key->checksum = aes_key_integrity_checksum(aes_key);
+  }
+
   return OTCRYPTO_OK;
 }
 
@@ -180,18 +160,19 @@ static status_t aes_padding_apply(otcrypto_aes_padding_t padding_mode,
   // Pad a full block if the last block is full, otherwise just fill the last
   // block.
   size_t padding_len = kAesBlockNumBytes - partial_data_len;
-  hardened_bool_t padding_written = kHardenedBoolFalse;
+  otcrypto_aes_padding_t padding_written = launder32(0);
   switch (launder32(padding_mode)) {
     case kOtcryptoAesPaddingPkcs7:
       // Pads with value same as the number of padding bytes.
       memset(padding, (uint8_t)padding_len, padding_len);
-      padding_written = kHardenedBoolTrue;
+      padding_written = launder32(padding_written) | kOtcryptoAesPaddingPkcs7;
       break;
     case kOtcryptoAesPaddingIso9797M2:
       // Pads with 0x80 (0b10000000), followed by zero bytes.
       memset(padding, 0x0, padding_len);
       padding[0] = 0x80;
-      padding_written = kHardenedBoolTrue;
+      padding_written =
+          launder32(padding_written) | kOtcryptoAesPaddingIso9797M2;
       break;
     case kOtcryptoAesPaddingNull:
       // This routine should not be called if padding is not needed.
@@ -200,7 +181,9 @@ static status_t aes_padding_apply(otcrypto_aes_padding_t padding_mode,
       // Unrecognized padding mode.
       return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(padding_written, kHardenedBoolTrue);
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(padding_written), padding_mode);
 
   return OTCRYPTO_OK;
 }
@@ -237,6 +220,9 @@ static status_t num_padded_blocks_get(size_t plaintext_len,
 /**
  * Return the block at index i for the given input and padding mode.
  *
+ * Uses hardening primitives internally that consume entropy; check the entropy
+ * complex is up before calling.
+ *
  * @param input Input data buffer.
  * @param padding Padding mode.
  * @param index Block index.
@@ -254,6 +240,9 @@ static status_t get_block(otcrypto_const_byte_buf_t input,
   // padding.
   HARDENED_CHECK_LE(index, num_full_blocks + 1);
 
+  // Randomize the destination buffer.
+  HARDENED_TRY(hardened_memshred(block->data, ARRAYSIZE(block->data)));
+
   if (launder32(index) < num_full_blocks) {
     HARDENED_CHECK_LT(index, num_full_blocks);
     // No need to worry about padding, just copy the data into the output
@@ -285,13 +274,24 @@ otcrypto_status_t otcrypto_aes_padded_plaintext_length(
   return OTCRYPTO_OK;
 }
 
-otcrypto_status_t otcrypto_aes(const otcrypto_blinded_key_t *key,
-                               otcrypto_word32_buf_t iv,
-                               otcrypto_aes_mode_t aes_mode,
-                               otcrypto_aes_operation_t aes_operation,
-                               otcrypto_const_byte_buf_t cipher_input,
-                               otcrypto_aes_padding_t aes_padding,
-                               otcrypto_byte_buf_t cipher_output) {
+/**
+ * Performs the AES operation.
+ *
+ * @param key Pointer to the blinded key struct with key shares.
+ * @param iv Initialization vector, used for CBC, CFB, OFB, CTR modes. May be
+ *           NULL if mode is ECB.
+ * @param aes_mode Required AES mode of operation.
+ * @param aes_operation Required AES operation (encrypt or decrypt).
+ * @param cipher_input Input data to be ciphered.
+ * @param aes_padding Padding scheme to be used for the data.
+ * @param[out] cipher_output Output data after cipher operation.
+ * @return The result of the cipher operation.
+ */
+static otcrypto_status_t otcrypto_aes_impl(
+    otcrypto_blinded_key_t *key, otcrypto_word32_buf_t iv,
+    otcrypto_aes_mode_t aes_mode, otcrypto_aes_operation_t aes_operation,
+    otcrypto_const_byte_buf_t cipher_input, otcrypto_aes_padding_t aes_padding,
+    otcrypto_byte_buf_t cipher_output) {
   // Check for NULL pointers in input pointers and data buffers.
   if (key == NULL || (aes_mode != kOtcryptoAesModeEcb && iv.data == NULL) ||
       cipher_input.data == NULL || cipher_output.data == NULL) {
@@ -336,7 +336,7 @@ otcrypto_status_t otcrypto_aes(const otcrypto_blinded_key_t *key,
       return OTCRYPTO_BAD_ARGS;
     }
     HARDENED_CHECK_EQ(iv.len, kAesBlockNumWords);
-    hardened_memcpy(aes_iv.data, iv.data, kAesBlockNumWords);
+    HARDENED_TRY(hardened_memcpy(aes_iv.data, iv.data, kAesBlockNumWords));
   }
 
   // Parse the AES key.
@@ -344,694 +344,174 @@ otcrypto_status_t otcrypto_aes(const otcrypto_blinded_key_t *key,
   HARDENED_TRY(aes_key_construct(key, aes_mode, &aes_key));
 
   // Start the operation (encryption or decryption).
+  otcrypto_aes_operation_t aes_operation_started = launder32(0);
   switch (aes_operation) {
     case kOtcryptoAesOperationEncrypt:
       HARDENED_TRY(aes_encrypt_begin(aes_key, &aes_iv));
+      aes_operation_started =
+          launder32(aes_operation_started) | kOtcryptoAesOperationEncrypt;
       break;
     case kOtcryptoAesOperationDecrypt:
       HARDENED_TRY(aes_decrypt_begin(aes_key, &aes_iv));
+      aes_operation_started =
+          launder32(aes_operation_started) | kOtcryptoAesOperationDecrypt;
       break;
     default:
       return OTCRYPTO_BAD_ARGS;
   }
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(aes_operation_started), aes_operation);
 
-  // Perform the cipher operation for all full blocks (excluding last block).
-  // The input and output are offset by one, so if unrolled this loop would
-  // look like:
+  // Perform the cipher operation for all full blocks. The input and output are
+  // offset by `block_offset` number of blocks, where `block_offset` can be 1
+  // or 2. So if unrolled, these loops would look like:
+  //
+  // - block_offset == 1
   //   aes_update(NULL, input[0]);
   //   aes_update(output[0], input[1]);
   //   aes_update(output[1], input[2]);
-  //   ...
+  //   aes_update(output[2], NULL);
+  //
+  // - block_offset == 2
+  //   aes_update(NULL, input[0]);
+  //   aes_update(NULL, input[1]);
+  //   aes_update(output[0], input[2]); // The HW is processing input[1].
+  //   aes_update(output[1], input[3]); // The HW is processing input[2].
+  //   aes_update(output[2], NULL);
+  //   aes_update(output[3], NULL);
+  //
+  // Using a `block_offset` of 2 allows having 3 blocks in flight which is
+  // beneficial from a hardening and performance point of view:
+  // - Software retrieves Block x-1 from the data output registers.
+  // - Hardware processes Block x.
+  // - Software provides  Block x+1 via the data input registers.
+  //
   // See the AES driver for details.
+  const size_t block_offset = input_nblocks >= 3 ? 2 : 1;
   aes_block_t block_in;
   aes_block_t block_out;
   size_t i;
-  for (i = 0; launder32(i) < input_nblocks; i++) {
-    HARDENED_TRY(get_block(cipher_input, aes_padding, i, &block_in));
 
-    // Call the AES cipher and copy data to output buffer if needed.
-    if (launder32(i) == 0) {
-      HARDENED_CHECK_EQ(i, 0);
-      HARDENED_TRY(aes_update(/*dest=*/NULL, &block_in));
-    } else {
-      HARDENED_TRY(aes_update(&block_out, &block_in));
-      // TODO(#17711) Change to `hardened_memcpy`.
-      memcpy(&cipher_output.data[(i - 1) * kAesBlockNumBytes], block_out.data,
-             kAesBlockNumBytes);
-    }
+  // Provide the first `block_offset` number of input blocks and call the AES
+  // cipher.
+  for (i = 0; launder32(i) < block_offset; ++i) {
+    HARDENED_TRY(get_block(cipher_input, aes_padding, i, &block_in));
+    HARDENED_TRY(aes_update(/*dest=*/NULL, &block_in));
   }
+  // Check that the loop ran for the correct number of iterations.
+  HARDENED_CHECK_EQ(i, block_offset);
 
+  // Call the AES cipher while providing new input and copying data to the
+  // output buffer.
+  for (i = block_offset; launder32(i) < input_nblocks; ++i) {
+    HARDENED_TRY(get_block(cipher_input, aes_padding, i, &block_in));
+    HARDENED_TRY(hardened_memshred(block_out.data, ARRAYSIZE(block_out.data)));
+    HARDENED_TRY(aes_update(&block_out, &block_in));
+    // TODO(#17711) Change to `hardened_memcpy`.
+    memcpy(&cipher_output.data[(i - block_offset) * kAesBlockNumBytes],
+           block_out.data, kAesBlockNumBytes);
+  }
   // Check that the loop ran for the correct number of iterations.
   HARDENED_CHECK_EQ(i, input_nblocks);
 
-  // Retrieve the output from the final block (providing no input).
-  HARDENED_TRY(aes_update(&block_out, /*src=*/NULL));
-  // TODO(#17711) Change to `hardened_memcpy`.
-  memcpy(&cipher_output.data[(input_nblocks - 1) * kAesBlockNumBytes],
-         block_out.data, kAesBlockNumBytes);
+  // Retrieve the output from the final `block_offset` blocks (providing no
+  // input).
+  for (i = block_offset; launder32(i) > 0; --i) {
+    HARDENED_TRY(aes_update(&block_out, /*src=*/NULL));
+    // TODO(#17711) Change to `hardened_memcpy`.
+    memcpy(&cipher_output.data[(input_nblocks - i) * kAesBlockNumBytes],
+           block_out.data, kAesBlockNumBytes);
+  }
+  // Check that the loop ran for the correct number of iterations.
+  HARDENED_CHECK_EQ(i, 0);
 
   // Deinitialize the AES block and update the IV (in ECB mode, skip the IV).
   if (aes_mode == launder32(kAesCipherModeEcb)) {
     HARDENED_TRY(aes_end(NULL));
   } else {
     HARDENED_TRY(aes_end(&aes_iv));
-    hardened_memcpy(iv.data, aes_iv.data, kAesBlockNumWords);
-  }
-
-  // If the key was sideloaded, clear it.
-  if (key->config.hw_backed == kHardenedBoolTrue) {
-    HARDENED_TRY(keymgr_sideload_clear_aes());
-  }
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Construct the underlying AES key for AES-GCM.
- *
- * Also performs integrity, mode, and null-pointer checks on the key.
- *
- * @param blinded_key Blinded key struct.
- * @param[out] aes_key Destination AES key struct.
- * @return Result of the operation.
- */
-static status_t aes_gcm_key_construct(const otcrypto_blinded_key_t *blinded_key,
-                                      aes_key_t *aes_key) {
-  // Key integrity check.
-  if (launder32(integrity_blinded_key_check(blinded_key)) !=
-      kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(blinded_key),
-                    kHardenedBoolTrue);
-
-  // Check the key mode.
-  if (launder32((uint32_t)blinded_key->config.key_mode) !=
-      kOtcryptoKeyModeAesGcm) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(blinded_key->config.key_mode, kOtcryptoKeyModeAesGcm);
-
-  // Set the mode of the underlying AES key to CTR (since this is the
-  // underlying block cipher mode for GCM).
-  aes_key->mode = kAesCipherModeCtr;
-
-  // Set the AES key length (in words).
-  aes_key->key_len = keyblob_share_num_words(blinded_key->config);
-
-  // Check for null pointer.
-  if (blinded_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(blinded_key->config.hw_backed) == kHardenedBoolTrue) {
-    // In this case, we use an implementation-specific representation; the
-    // first "share" is the keyblob and the second share is ignored.
-    if (launder32(blinded_key->keyblob_length) != kKeyblobHwBackedBytes) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_CHECK_EQ(blinded_key->keyblob_length, kKeyblobHwBackedBytes);
-    aes_key->key_shares[0] = blinded_key->keyblob;
-    aes_key->key_shares[1] = NULL;
-    aes_key->sideload = launder32(kHardenedBoolTrue);
-  } else if (launder32(blinded_key->config.hw_backed) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(blinded_key->config.hw_backed, kHardenedBoolFalse);
-    // Get pointers to the individual shares.
-    uint32_t *share0;
-    uint32_t *share1;
-    HARDENED_TRY(keyblob_to_shares(blinded_key, &share0, &share1));
-    aes_key->key_shares[0] = share0;
-    aes_key->key_shares[1] = share1;
-    aes_key->sideload = launder32(kHardenedBoolFalse);
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(aes_key->sideload, blinded_key->config.hw_backed);
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Checks if the given byte-length matches the tag length enum value.
- *
- * @param word_len Allocated tag length in 32-bit words.
- * @param tag_len Tag length enum value.
- * @return OK if the tag length is acceptable, BAD_ARGS otherwise.
- */
-status_t aes_gcm_check_tag_length(size_t word_len,
-                                  otcrypto_aes_gcm_tag_len_t tag_len) {
-  size_t bit_len = 0;
-  switch (launder32(tag_len)) {
-    case kOtcryptoAesGcmTagLen128:
-      HARDENED_CHECK_EQ(tag_len, kOtcryptoAesGcmTagLen128);
-      bit_len = 128;
-      break;
-    case kOtcryptoAesGcmTagLen96:
-      HARDENED_CHECK_EQ(tag_len, kOtcryptoAesGcmTagLen96);
-      bit_len = 96;
-      break;
-    case kOtcryptoAesGcmTagLen64:
-      HARDENED_CHECK_EQ(tag_len, kOtcryptoAesGcmTagLen64);
-      bit_len = 64;
-      break;
-    case kOtcryptoAesGcmTagLen32:
-      HARDENED_CHECK_EQ(tag_len, kOtcryptoAesGcmTagLen32);
-      bit_len = 32;
-      break;
-    default:
-      // Invalid tag length.
-      return OTCRYPTO_BAD_ARGS;
+    HARDENED_TRY(hardened_memcpy(iv.data, aes_iv.data, kAesBlockNumWords));
   }
-  HARDENED_CHECK_GT(bit_len, 0);
-  HARDENED_CHECK_EQ(bit_len % 32, 0);
 
-  if (launder32(word_len) != bit_len / 32) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(word_len, bit_len / 32);
-
-  // Extra hardening checks; the word length must be nonzero and at most the
-  // size of an AES block.
-  HARDENED_CHECK_LT(0, word_len);
-  HARDENED_CHECK_LE(word_len, kAesBlockNumWords);
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Actuate the key manager to generate a sideloaded AES-GCM key.
- *
- * The AES driver will not load or clear sideloaded keys by itself, so we need
- * to do it separately at each stage of the AES-GCM operation.
- *
- * Sideloaded keys are stored in the `aes_key_t` struct in a format specific to
- * this AES-GCM implementation: the first "key share" is the diversification
- * data as it would be stored in a blinded keyblob, and the second "share" is
- * completely ignored.
- *
- * If the key is not a sideloaded key, this function does nothing.
- *
- * @param key Key to load.
- * @return OK or errror.
- */
-static status_t load_key_if_sideloaded(const aes_key_t key) {
-  if (launder32(key.sideload) == kHardenedBoolFalse) {
-    return OTCRYPTO_OK;
-  } else if (key.sideload != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(key.sideload, kHardenedBoolTrue);
-  keymgr_diversification_t diversification;
-  HARDENED_TRY(keyblob_buffer_to_keymgr_diversification(
-      key.key_shares[0], kOtcryptoKeyModeAesGcm, &diversification));
-  return keymgr_generate_key_aes(diversification);
-}
-
-/**
- * Clear the sideload slot if the AES key was sideloaded.
- *
- * It is important to clear the sideload slot before returning to the caller so
- * that other applications can't access the key in between operations.
- *
- * If the key is not a sideloaded key, this function does nothing.
- *
- * @param key Key that was possibly loaded.
- * @return OK or errror.
- */
-static status_t clear_key_if_sideloaded(const aes_key_t key) {
-  if (launder32(key.sideload) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(key.sideload, kHardenedBoolFalse);
-    return OTCRYPTO_OK;
-  } else if (launder32(key.sideload) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(key.sideload, kHardenedBoolTrue);
+  // In case the key was sideloaded, clear it.
   return keymgr_sideload_clear_aes();
 }
 
-otcrypto_status_t otcrypto_aes_gcm_encrypt(const otcrypto_blinded_key_t *key,
-                                           otcrypto_const_byte_buf_t plaintext,
-                                           otcrypto_const_word32_buf_t iv,
-                                           otcrypto_const_byte_buf_t aad,
-                                           otcrypto_aes_gcm_tag_len_t tag_len,
-                                           otcrypto_byte_buf_t ciphertext,
-                                           otcrypto_word32_buf_t auth_tag) {
-  // Check for NULL pointers in input pointers and required-nonzero-length data
-  // buffers.
-  if (key == NULL || iv.data == NULL || auth_tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Conditionally check for null pointers in data buffers that may be
-  // 0-length.
-  if ((aad.len != 0 && aad.data == NULL) ||
-      (ciphertext.len != 0 && ciphertext.data == NULL) ||
-      (plaintext.len != 0 && plaintext.data == NULL)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Ensure the plaintext and ciphertext lengths match.
-  if (launder32(ciphertext.len) != plaintext.len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(ciphertext.len, plaintext.len);
-
-  // Check the tag length.
-  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
-
-  // Construct the AES key.
-  aes_key_t aes_key;
-  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
-  HARDENED_TRY(load_key_if_sideloaded(aes_key));
-
-  // Call the core encryption operation.
-  HARDENED_TRY(aes_gcm_encrypt(aes_key, iv.len, iv.data, plaintext.len,
-                               plaintext.data, aad.len, aad.data, auth_tag.len,
-                               auth_tag.data, ciphertext.data));
-
-  HARDENED_TRY(clear_key_if_sideloaded(aes_key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_decrypt(
-    const otcrypto_blinded_key_t *key, otcrypto_const_byte_buf_t ciphertext,
-    otcrypto_const_word32_buf_t iv, otcrypto_const_byte_buf_t aad,
-    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_const_word32_buf_t auth_tag,
-    otcrypto_byte_buf_t plaintext, hardened_bool_t *success) {
-  // Check for NULL pointers in input pointers and required-nonzero-length data
-  // buffers.
-  if (key == NULL || iv.data == NULL || auth_tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Conditionally check for null pointers in data buffers that may be
-  // 0-length.
-  if ((aad.len != 0 && aad.data == NULL) ||
-      (ciphertext.len != 0 && ciphertext.data == NULL) ||
-      (plaintext.len != 0 && plaintext.data == NULL)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Construct the AES key.
-  aes_key_t aes_key;
-  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
-  HARDENED_TRY(load_key_if_sideloaded(aes_key));
-
-  // Ensure the plaintext and ciphertext lengths match.
-  if (launder32(ciphertext.len) != plaintext.len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(ciphertext.len, plaintext.len);
-
-  // Check the tag length.
-  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
-
-  // Call the core decryption operation.
-  HARDENED_TRY(aes_gcm_decrypt(aes_key, iv.len, iv.data, ciphertext.len,
-                               ciphertext.data, aad.len, aad.data, auth_tag.len,
-                               auth_tag.data, plaintext.data, success));
-
-  HARDENED_TRY(clear_key_if_sideloaded(aes_key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_encrypt_init(
-    const otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
-    otcrypto_aes_gcm_context_t *ctx) {
-  if (key == NULL || key->keyblob == NULL || iv.data == NULL || ctx == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Construct the AES key.
-  aes_key_t aes_key;
-  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
-  HARDENED_TRY(load_key_if_sideloaded(aes_key));
-
-  // Call the internal init operation.
-  aes_gcm_context_t internal_ctx;
-  HARDENED_TRY(aes_gcm_encrypt_init(aes_key, iv.len, iv.data, &internal_ctx));
-
-  // Save the context and clear the key if needed.
-  gcm_context_save(&internal_ctx, ctx);
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_decrypt_init(
-    const otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
-    otcrypto_aes_gcm_context_t *ctx) {
-  if (key == NULL || key->keyblob == NULL || iv.data == NULL || ctx == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Construct the AES key.
-  aes_key_t aes_key;
-  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
-  HARDENED_TRY(load_key_if_sideloaded(aes_key));
-
-  // Call the internal init operation.
-  aes_gcm_context_t internal_ctx;
-  HARDENED_TRY(aes_gcm_decrypt_init(aes_key, iv.len, iv.data, &internal_ctx));
-
-  // Save the context and clear the key if needed.
-  gcm_context_save(&internal_ctx, ctx);
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_update_aad(otcrypto_aes_gcm_context_t *ctx,
-                                              otcrypto_const_byte_buf_t aad) {
-  if (ctx == NULL || aad.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (aad.len == 0) {
-    // Nothing to do.
-    return OTCRYPTO_OK;
-  }
-
-  // Restore the AES-GCM context object and load the key if needed.
-  aes_gcm_context_t internal_ctx;
-  gcm_context_restore(ctx, &internal_ctx);
-  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
-
-  // Call the internal update operation.
-  HARDENED_TRY(aes_gcm_update_aad(&internal_ctx, aad.len, aad.data));
-
-  // Save the context and clear the key if needed.
-  gcm_context_save(&internal_ctx, ctx);
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_update_encrypted_data(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_byte_buf_t input,
-    otcrypto_byte_buf_t output, size_t *output_bytes_written) {
-  if (ctx == NULL || input.data == NULL || output.data == NULL ||
-      output_bytes_written == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  *output_bytes_written = 0;
-
-  if (input.len == 0) {
-    // Nothing to do.
-    return OTCRYPTO_OK;
-  }
-
-  // Restore the AES-GCM context object and load the key if needed.
-  aes_gcm_context_t internal_ctx;
-  gcm_context_restore(ctx, &internal_ctx);
-  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
-
-  // The output buffer must be long enough to hold all full blocks that will
-  // exist after `input` is added.
-  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
-  if (input.len > UINT32_MAX - partial_block_len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  size_t min_output_blocks =
-      (partial_block_len + input.len) / kAesBlockNumBytes;
-  size_t min_output_len = min_output_blocks * kAesBlockNumBytes;
-  if (output.len < min_output_len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Call the internal update operation.
-  HARDENED_TRY(aes_gcm_update_encrypted_data(
-      &internal_ctx, input.len, input.data, output_bytes_written, output.data));
-
-  // Save the context and clear the key if needed.
-  gcm_context_save(&internal_ctx, ctx);
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_encrypt_final(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_aes_gcm_tag_len_t tag_len,
-    otcrypto_byte_buf_t ciphertext, size_t *ciphertext_bytes_written,
-    otcrypto_word32_buf_t auth_tag) {
-  if (ctx == NULL || ciphertext_bytes_written == NULL ||
-      auth_tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  if (ciphertext.len != 0 && ciphertext.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  *ciphertext_bytes_written = 0;
-
-  // Check the tag length.
-  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
-
-  // Restore the AES-GCM context object and load the key if needed.
-  aes_gcm_context_t internal_ctx;
-  gcm_context_restore(ctx, &internal_ctx);
-  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
-
-  // If the partial block is nonempty, the output must be at least as long as
-  // the partial block.
-  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
-  if (ciphertext.len < partial_block_len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Call the internal final operation.
-  HARDENED_TRY(aes_gcm_encrypt_final(&internal_ctx, auth_tag.len, auth_tag.data,
-                                     ciphertext_bytes_written,
-                                     ciphertext.data));
-
-  // Clear the context and the key if needed.
-  hardened_memshred(ctx->data, ARRAYSIZE(ctx->data));
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_gcm_decrypt_final(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_word32_buf_t auth_tag,
-    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_byte_buf_t plaintext,
-    size_t *plaintext_bytes_written, hardened_bool_t *success) {
-  if (ctx == NULL || plaintext_bytes_written == NULL || auth_tag.data == NULL ||
-      success == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  if (plaintext.len != 0 && plaintext.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  *plaintext_bytes_written = 0;
-  *success = kHardenedBoolFalse;
-
-  // Check the tag length.
-  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
-
-  // Restore the AES-GCM context object and load the key if needed.
-  aes_gcm_context_t internal_ctx;
-  gcm_context_restore(ctx, &internal_ctx);
-  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
-
-  // If the partial block is nonempty, the output must be at least as long as
-  // the partial block.
-  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
-  if (plaintext.len < partial_block_len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Call the internal final operation.
-  HARDENED_TRY(aes_gcm_decrypt_final(&internal_ctx, auth_tag.len, auth_tag.data,
-                                     plaintext_bytes_written, plaintext.data,
-                                     success));
-
-  // Clear the context and the key if needed.
-  hardened_memshred(ctx->data, ARRAYSIZE(ctx->data));
-  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_kwp_wrapped_len(
-    const otcrypto_key_config_t config, size_t *wrapped_num_words) {
-  // Check that the total wrapped key length will fit in 32 bits.
-  size_t config_num_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
-  if (keyblob_num_words(config) > UINT32_MAX - config_num_words - 2) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // A wrapped key includes:
-  //   - The full key configuration
-  //   - The key checksum (32 bits)
-  //   - The keyblob length (in words) as a 32-bit word
-  //   - The keyblob
-  *wrapped_num_words = config_num_words + 2 + keyblob_num_words(config);
-
-  // We need to add 64 bits for the AES-KWP prefix.
-  *wrapped_num_words += 2;
-
-  // The number of words needs to be rounded up to the next multiple of 64 bits.
-  if (*wrapped_num_words % 2 == 1) {
-    *wrapped_num_words += 1;
-  }
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Extract an AES-KWP key encryption key from the blinded key struct.
- *
- * Also checks the key's integrity and mode.
- *
- * @param key_kek Blinded key encryption key.
- * @param[out] aes_key Destination AES key struct.
- * @return Result of the operation.
- */
-static status_t aes_kwp_key_construct(const otcrypto_blinded_key_t *key_kek,
-                                      aes_key_t *aes_key) {
-  // Key integrity check.
-  if (launder32(integrity_blinded_key_check(key_kek)) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(key_kek), kHardenedBoolTrue);
-
-  // Check the key mode.
-  if (launder32((uint32_t)key_kek->config.key_mode) != kOtcryptoKeyModeAesKwp) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(key_kek->config.key_mode, kOtcryptoKeyModeAesKwp);
-
-  // Set the mode of the underlying AES key to ECB (since this is the
-  // underlying block cipher mode for KWP).
-  aes_key->mode = kAesCipherModeEcb;
-
-  if (key_kek->config.hw_backed == kHardenedBoolTrue) {
-    // Call keymgr to sideload the key into AES.
-    keymgr_diversification_t diversification;
-    HARDENED_TRY(keyblob_to_keymgr_diversification(key_kek, &diversification));
-    HARDENED_TRY(keymgr_generate_key_aes(diversification));
-  } else if (key_kek->config.hw_backed != kHardenedBoolFalse) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  aes_key->sideload = key_kek->config.hw_backed;
-
-  // Set the AES key length (in words).
-  aes_key->key_len = keyblob_share_num_words(key_kek->config);
-
-  // Get pointers to the individual shares.
-  uint32_t *share0;
-  uint32_t *share1;
-  HARDENED_TRY(keyblob_to_shares(key_kek, &share0, &share1));
-  aes_key->key_shares[0] = share0;
-  aes_key->key_shares[1] = share1;
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_aes_kwp_wrap(
-    const otcrypto_blinded_key_t *key_to_wrap,
-    const otcrypto_blinded_key_t *key_kek, otcrypto_word32_buf_t wrapped_key) {
-  if (key_to_wrap == NULL || key_to_wrap->keyblob == NULL || key_kek == NULL ||
-      key_kek->keyblob == NULL || wrapped_key.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the integrity of the key material we are wrapping.
-  if (launder32(integrity_blinded_key_check(key_to_wrap)) !=
-      kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(key_to_wrap),
-                    kHardenedBoolTrue);
-
-  // Check the length of the output buffer.
-  size_t exp_len;
-  HARDENED_TRY(otcrypto_aes_kwp_wrapped_len(key_to_wrap->config, &exp_len));
-  if (wrapped_key.len != exp_len) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the integrity/lengths/mode of the key encryption key, and construct
-  // an internal AES key.
-  aes_key_t kek;
-  HARDENED_TRY(aes_kwp_key_construct(key_kek, &kek));
-
-  // Check the keyblob length.
-  uint32_t keyblob_words = keyblob_num_words(key_to_wrap->config);
-  if (key_to_wrap->keyblob_length != keyblob_words * sizeof(uint32_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check that the configuration is aligned.
-  if (misalignment32_of((uintptr_t)&key_to_wrap->config) != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Create the plaintext by copying the key configuration, checksum, keyblob
-  // length, and keyblob into a buffer.
-  uint32_t config_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
-  size_t plaintext_num_words = config_words + 2 + keyblob_words;
-  uint32_t plaintext[plaintext_num_words];
-  hardened_memcpy(plaintext, (uint32_t *)&key_to_wrap->config, config_words);
-  plaintext[config_words] = key_to_wrap->checksum;
-  plaintext[config_words + 1] = keyblob_words;
-  hardened_memcpy(plaintext + config_words + 2, key_to_wrap->keyblob,
-                  keyblob_words);
-
-  // Wrap the key.
-  return aes_kwp_wrap(kek, plaintext, sizeof(plaintext), wrapped_key.data);
-}
-
-otcrypto_status_t otcrypto_aes_kwp_unwrap(
-    otcrypto_const_word32_buf_t wrapped_key,
-    const otcrypto_blinded_key_t *key_kek, hardened_bool_t *success,
-    otcrypto_blinded_key_t *unwrapped_key) {
-  *success = kHardenedBoolFalse;
-
-  if (wrapped_key.data == NULL || key_kek == NULL || key_kek->keyblob == NULL ||
-      success == NULL || unwrapped_key == NULL ||
-      unwrapped_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the integrity/lengths/mode of the key encryption key, and construct
-  // an internal AES key.
-  aes_key_t kek;
-  HARDENED_TRY(aes_kwp_key_construct(key_kek, &kek));
-
-  // Check that the configuration is aligned.
-  if (misalignment32_of((uintptr_t)&unwrapped_key->config) != 0) {
+otcrypto_status_t otcrypto_aes(otcrypto_blinded_key_t *key,
+                               otcrypto_word32_buf_t iv,
+                               otcrypto_aes_mode_t aes_mode,
+                               otcrypto_aes_operation_t aes_operation,
+                               otcrypto_const_byte_buf_t cipher_input,
+                               otcrypto_aes_padding_t aes_padding,
+                               otcrypto_byte_buf_t cipher_output) {
+  // Check for NULL pointers in input pointers and data buffers.
+  if (key == NULL || (aes_mode != kOtcryptoAesModeEcb && iv.data == NULL) ||
+      cipher_input.data == NULL || cipher_output.data == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
 
-  // Unwrap the key.
-  uint32_t plaintext[wrapped_key.len];
-  HARDENED_TRY(aes_kwp_unwrap(kek, wrapped_key.data,
-                              wrapped_key.len * sizeof(uint32_t), success,
-                              plaintext));
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
 
-  if (launder32(*success) != kHardenedBoolTrue) {
-    *success = kHardenedBoolFalse;
-    return OTCRYPTO_OK;
-  }
-  HARDENED_CHECK_EQ(*success, kHardenedBoolTrue);
-
-  // Set back to false while we check other conditions.
-  *success = kHardenedBoolFalse;
-
-  // Extract the key configuration.
-  uint32_t config_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
-  hardened_memcpy((uint32_t *)&unwrapped_key->config, plaintext, config_words);
-
-  // Extract the checksum and keyblob length.
-  unwrapped_key->checksum = plaintext[config_words];
-  uint32_t keyblob_words = plaintext[config_words + 1];
-  if (keyblob_words != keyblob_num_words(unwrapped_key->config)) {
-    *success = kHardenedBoolFalse;
-    return OTCRYPTO_OK;
-  }
+  if (launder32(key->config.security_level) == kOtcryptoKeySecurityLevelLow) {
+    HARDENED_CHECK_EQ(key->config.security_level, kOtcryptoKeySecurityLevelLow);
+    // No additional FI protection.
+    return otcrypto_aes_impl(key, iv, aes_mode, aes_operation, cipher_input,
+                             aes_padding, cipher_output);
+  } else {
+    HARDENED_CHECK_NE(key->config.security_level, kOtcryptoKeySecurityLevelLow);
+    // Protect the AES computation against faults. Recomputes the ciphertext or
+    // plaintexts after the actual AES operation and compares it to the input.
+
+    // Copy the IV for the second AES computation.
+    uint32_t iv_data[iv.len];
+    memcpy(iv_data, iv.data, sizeof(iv_data));
+    otcrypto_word32_buf_t iv_redundant = {
+        .data = iv_data,
+        .len = iv.len,
+    };
+
+    // First AES operation using the intended AES mode (encryption or
+    // decryption).
+    HARDENED_TRY(otcrypto_aes_impl(key, iv, aes_mode, aes_operation,
+                                   cipher_input, aes_padding, cipher_output));
+
+    // Second AES operation using the counterpart of the AES mode (decryption or
+    // encryption).
+    otcrypto_aes_operation_t aes_operation_inverse;
+    size_t len_bytes;
+    if (aes_operation == kOtcryptoAesOperationEncrypt) {
+      aes_operation_inverse = kOtcryptoAesOperationDecrypt;
+      len_bytes = cipher_output.len;
+    } else {
+      aes_operation_inverse = kOtcryptoAesOperationEncrypt;
+      TRY(otcrypto_aes_padded_plaintext_length(cipher_output.len, aes_padding,
+                                               &len_bytes));
+    }
 
-  // Extract the keyblob.
-  if (unwrapped_key->keyblob_length != keyblob_words * sizeof(uint32_t)) {
-    return OTCRYPTO_BAD_ARGS;
+    // Create the input buffer that contains the cipher_output of the first AES
+    // operation.
+    otcrypto_const_byte_buf_t cipher_input_redundant = {
+        .data = cipher_output.data,
+        .len = cipher_output.len,
+    };
+    // Create the output buffer.
+    uint32_t output_buf[len_bytes / sizeof(uint32_t)];
+    otcrypto_byte_buf_t cipher_input_recomputed = {
+        .data = (unsigned char *)output_buf,
+        .len = len_bytes,
+    };
+    HARDENED_TRY(otcrypto_aes_impl(
+        key, iv_redundant, aes_mode, aes_operation_inverse,
+        cipher_input_redundant, aes_padding, cipher_input_recomputed));
+
+    // Comparison.
+    HARDENED_CHECK_EQ(
+        hardened_memeq((const uint32_t *)cipher_input.data, output_buf,
+                       cipher_input.len / sizeof(uint32_t)),
+        kHardenedBoolTrue);
   }
-  hardened_memcpy(unwrapped_key->keyblob, plaintext + config_words + 2,
-                  keyblob_words);
 
-  // Finally, check the integrity of the key material we unwrapped.
-  *success = integrity_blinded_key_check(unwrapped_key);
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/impl/aes_gcm.c b/sw/device/lib/crypto/impl/aes_gcm.c
new file mode 100644
index 0000000000000..f797ce6fcf75a
--- /dev/null
+++ b/sw/device/lib/crypto/impl/aes_gcm.c
@@ -0,0 +1,650 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/aes_gcm.h"
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/crypto/drivers/aes.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/keymgr.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
+#include "sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h"
+#include "sw/device/lib/crypto/impl/aes_gcm/ghash.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('a', 'g', 'c')
+
+// Check GHASH context size against the underlying implementation.
+static_assert(sizeof(otcrypto_aes_gcm_context_t) >= sizeof(aes_gcm_context_t),
+              "Size of AES-GCM context object for top-level API must be at "
+              "least as large as the context for the "
+              "underlying implementation.");
+static_assert(alignof(aes_gcm_context_t) >= alignof(uint32_t),
+              "Internal AES-GCM context object must be word-aligned for use "
+              "with `hardened_memcpy`.");
+static_assert(sizeof(otcrypto_key_config_t) % sizeof(uint32_t) == 0,
+              "Key configuration size should be a multiple of 32 bits");
+
+// Ensure the internal AES-GCM context size is a multiple of the word size and
+// calculate the number of words.
+static_assert(sizeof(aes_gcm_context_t) % sizeof(uint32_t) == 0,
+              "Internal AES-GCM context object must be a multiple of the word "
+              "size for use with `hardened_memcpy`.");
+enum {
+  kAesGcmContextNumWords = sizeof(aes_gcm_context_t) / sizeof(uint32_t),
+};
+
+/**
+ * Save an AES-GCM context.
+ *
+ * @param internal_ctx Internal context object to save.
+ * @param[out] api_ctx Resulting API-facing context object.
+ * @return Result of the operation.
+ */
+static inline status_t gcm_context_save(aes_gcm_context_t *internal_ctx,
+                                        otcrypto_aes_gcm_context_t *api_ctx) {
+  return hardened_memcpy(api_ctx->data, (uint32_t *)internal_ctx,
+                         kAesGcmContextNumWords);
+}
+
+/**
+ * Restore an AES-GCM context.
+ *
+ * @param api_ctx API-facing context object to restore from.
+ * @param[out] internal_ctx Resulting internal context object.
+ * @return Result of the operation.
+ */
+static inline status_t gcm_context_restore(otcrypto_aes_gcm_context_t *api_ctx,
+                                           aes_gcm_context_t *internal_ctx) {
+  return hardened_memcpy((uint32_t *)internal_ctx, api_ctx->data,
+                         kAesGcmContextNumWords);
+}
+
+/**
+ * Remask the key if it is not sideloaded.
+ *
+ * Generate a fresh mask and apply it to the current key.
+ *
+ * @param[in,out] internal_ctx Internal context object.
+ * @return Result of the operation.
+ */
+status_t gcm_remask_key(aes_gcm_context_t *internal_ctx) {
+  if (launder32(internal_ctx->key.sideload) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(internal_ctx->key.sideload, kHardenedBoolFalse);
+
+    // Generate a fresh mask the size of one share.
+    uint32_t mask[internal_ctx->key.key_len];
+    HARDENED_TRY(hardened_memshred(mask, internal_ctx->key.key_len));
+
+    // XOR each share with the mask.
+    HARDENED_TRY(
+        hardened_xor_in_place((uint32_t *)internal_ctx->key.key_shares[0], mask,
+                              internal_ctx->key.key_len));
+    HARDENED_TRY(
+        hardened_xor_in_place((uint32_t *)internal_ctx->key.key_shares[1], mask,
+                              internal_ctx->key.key_len));
+    // Update the checksum.
+    internal_ctx->key.checksum = aes_key_integrity_checksum(&internal_ctx->key);
+  } else {
+    HARDENED_CHECK_EQ(internal_ctx->key.sideload, kHardenedBoolTrue);
+  }
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Construct the underlying AES key for AES-GCM.
+ *
+ * Also performs integrity, mode, and null-pointer checks on the key.
+ *
+ * Re-masks the key after checking its integrity. The caller should ensure the
+ * entropy complex is up before calling this function.
+ *
+ * @param blinded_key Blinded key struct.
+ * @param[out] aes_key Destination AES key struct.
+ * @return Result of the operation.
+ */
+static status_t aes_gcm_key_construct(otcrypto_blinded_key_t *blinded_key,
+                                      aes_key_t *aes_key) {
+  // Key integrity check.
+  if (launder32(integrity_blinded_key_check(blinded_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(blinded_key),
+                    kHardenedBoolTrue);
+
+  // Check the key mode.
+  if (launder32((uint32_t)blinded_key->config.key_mode) !=
+      kOtcryptoKeyModeAesGcm) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(blinded_key->config.key_mode, kOtcryptoKeyModeAesGcm);
+
+  // Set the mode of the underlying AES key to CTR (since this is the
+  // underlying block cipher mode for GCM).
+  aes_key->mode = kAesCipherModeCtr;
+
+  // Set the AES key length (in words).
+  aes_key->key_len = keyblob_share_num_words(blinded_key->config);
+
+  // Check for null pointer.
+  if (blinded_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(blinded_key->config.hw_backed) == kHardenedBoolTrue) {
+    // In this case, we use an implementation-specific representation; the
+    // first "share" is the keyblob and the second share is ignored.
+    if (launder32(blinded_key->keyblob_length) != kKeyblobHwBackedBytes) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+    HARDENED_CHECK_EQ(blinded_key->keyblob_length, kKeyblobHwBackedBytes);
+    aes_key->key_shares[0] = blinded_key->keyblob;
+    aes_key->key_shares[1] = NULL;
+    aes_key->sideload = launder32(kHardenedBoolTrue);
+  } else if (launder32(blinded_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(blinded_key->config.hw_backed, kHardenedBoolFalse);
+
+    // Remask the key.
+    HARDENED_TRY(keyblob_remask(blinded_key));
+
+    // Get pointers to the individual shares.
+    uint32_t *share0;
+    uint32_t *share1;
+    HARDENED_TRY(keyblob_to_shares(blinded_key, &share0, &share1));
+    aes_key->key_shares[0] = share0;
+    aes_key->key_shares[1] = share1;
+    aes_key->sideload = launder32(kHardenedBoolFalse);
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(aes_key->sideload, blinded_key->config.hw_backed);
+
+  // Create the checksum of the key and store it in the key structure.
+  aes_key->checksum = aes_key_integrity_checksum(aes_key);
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Checks if the given byte-length matches the tag length enum value.
+ *
+ * @param word_len Allocated tag length in 32-bit words.
+ * @param tag_len Tag length enum value.
+ * @return OK if the tag length is acceptable, BAD_ARGS otherwise.
+ */
+status_t aes_gcm_check_tag_length(size_t word_len,
+                                  otcrypto_aes_gcm_tag_len_t tag_len) {
+  size_t bit_len = 0;
+  otcrypto_aes_gcm_tag_len_t tag_len_set = launder32(0);
+  switch (launder32(tag_len)) {
+    case kOtcryptoAesGcmTagLen128:
+      bit_len = 128;
+      tag_len_set = launder32(tag_len_set) | kOtcryptoAesGcmTagLen128;
+      break;
+    case kOtcryptoAesGcmTagLen96:
+      bit_len = 96;
+      tag_len_set = launder32(tag_len_set) | kOtcryptoAesGcmTagLen96;
+      break;
+    case kOtcryptoAesGcmTagLen64:
+      bit_len = 64;
+      tag_len_set = launder32(tag_len_set) | kOtcryptoAesGcmTagLen64;
+      break;
+    case kOtcryptoAesGcmTagLen32:
+      bit_len = 32;
+      tag_len_set = launder32(tag_len_set) | kOtcryptoAesGcmTagLen32;
+      break;
+    default:
+      // Invalid tag length.
+      return OTCRYPTO_BAD_ARGS;
+  }
+  // Check if we landed in the correct case statement. Use ORs for this to
+  // avoid that multiple cases were executed.
+  HARDENED_CHECK_EQ(launder32(tag_len_set), tag_len);
+  HARDENED_CHECK_GT(bit_len, 0);
+  HARDENED_CHECK_EQ(bit_len % 32, 0);
+
+  if (launder32(word_len) != bit_len / 32) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(word_len, bit_len / 32);
+
+  // Extra hardening checks; the word length must be nonzero and at most the
+  // size of an AES block.
+  HARDENED_CHECK_LT(0, word_len);
+  HARDENED_CHECK_LE(word_len, kAesBlockNumWords);
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Actuate the key manager to generate a sideloaded AES-GCM key.
+ *
+ * The AES driver will not load or clear sideloaded keys by itself, so we need
+ * to do it separately at each stage of the AES-GCM operation.
+ *
+ * Sideloaded keys are stored in the `aes_key_t` struct in a format specific to
+ * this AES-GCM implementation: the first "key share" is the diversification
+ * data as it would be stored in a blinded keyblob, and the second "share" is
+ * completely ignored.
+ *
+ * If the key is not a sideloaded key, this function does nothing.
+ *
+ * @param key Key to load.
+ * @return OK or errror.
+ */
+static status_t load_key_if_sideloaded(const aes_key_t key) {
+  if (launder32(key.sideload) == kHardenedBoolFalse) {
+    return OTCRYPTO_OK;
+  } else if (key.sideload != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(key.sideload, kHardenedBoolTrue);
+  keymgr_diversification_t diversification;
+  HARDENED_TRY(keyblob_buffer_to_keymgr_diversification(
+      key.key_shares[0], kOtcryptoKeyModeAesGcm, &diversification));
+  return keymgr_generate_key_aes(diversification);
+}
+
+/**
+ * Clear the sideload slot if the AES key was sideloaded.
+ *
+ * It is important to clear the sideload slot before returning to the caller so
+ * that other applications can't access the key in between operations.
+ *
+ * If the key is not a sideloaded key, this function does nothing.
+ *
+ * @param key Key that was possibly loaded.
+ * @return OK or errror.
+ */
+static status_t clear_key_if_sideloaded(const aes_key_t key) {
+  if (launder32(key.sideload) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(key.sideload, kHardenedBoolFalse);
+    return OTCRYPTO_OK;
+  } else if (launder32(key.sideload) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(key.sideload, kHardenedBoolTrue);
+  return keymgr_sideload_clear_aes();
+}
+
+otcrypto_status_t otcrypto_aes_gcm_encrypt(otcrypto_blinded_key_t *key,
+                                           otcrypto_const_byte_buf_t plaintext,
+                                           otcrypto_const_word32_buf_t iv,
+                                           otcrypto_const_byte_buf_t aad,
+                                           otcrypto_aes_gcm_tag_len_t tag_len,
+                                           otcrypto_byte_buf_t ciphertext,
+                                           otcrypto_word32_buf_t auth_tag) {
+  // Check for NULL pointers in input pointers and required-nonzero-length data
+  // buffers.
+  if (key == NULL || iv.data == NULL || auth_tag.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Conditionally check for null pointers in data buffers that may be
+  // 0-length.
+  if ((aad.len != 0 && aad.data == NULL) ||
+      (ciphertext.len != 0 && ciphertext.data == NULL) ||
+      (plaintext.len != 0 && plaintext.data == NULL)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the plaintext and ciphertext lengths match.
+  if (launder32(ciphertext.len) != plaintext.len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ciphertext.len, plaintext.len);
+
+  // Check the tag length.
+  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Construct the AES key.
+  aes_key_t aes_key;
+  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
+  HARDENED_TRY(load_key_if_sideloaded(aes_key));
+
+  // Call the core encryption operation.
+  HARDENED_TRY(aes_gcm_encrypt(aes_key, iv.len, iv.data, plaintext.len,
+                               plaintext.data, aad.len, aad.data, auth_tag.len,
+                               auth_tag.data, ciphertext.data));
+
+  HARDENED_TRY(clear_key_if_sideloaded(aes_key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_decrypt(
+    otcrypto_blinded_key_t *key, otcrypto_const_byte_buf_t ciphertext,
+    otcrypto_const_word32_buf_t iv, otcrypto_const_byte_buf_t aad,
+    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_const_word32_buf_t auth_tag,
+    otcrypto_byte_buf_t plaintext, hardened_bool_t *success) {
+  // Check for NULL pointers in input pointers and required-nonzero-length data
+  // buffers.
+  if (key == NULL || iv.data == NULL || auth_tag.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Conditionally check for null pointers in data buffers that may be
+  // 0-length.
+  if ((aad.len != 0 && aad.data == NULL) ||
+      (ciphertext.len != 0 && ciphertext.data == NULL) ||
+      (plaintext.len != 0 && plaintext.data == NULL)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Construct the AES key.
+  aes_key_t aes_key;
+  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
+  HARDENED_TRY(load_key_if_sideloaded(aes_key));
+
+  // Ensure the plaintext and ciphertext lengths match.
+  if (launder32(ciphertext.len) != plaintext.len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ciphertext.len, plaintext.len);
+
+  // Check the tag length.
+  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
+
+  // Call the core decryption operation.
+  HARDENED_TRY(aes_gcm_decrypt(aes_key, iv.len, iv.data, ciphertext.len,
+                               ciphertext.data, aad.len, aad.data, auth_tag.len,
+                               auth_tag.data, plaintext.data, success));
+
+  HARDENED_TRY(clear_key_if_sideloaded(aes_key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_encrypt_init(
+    otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
+    otcrypto_aes_gcm_context_t *ctx) {
+  if (key == NULL || key->keyblob == NULL || iv.data == NULL || ctx == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Construct the AES key.
+  aes_key_t aes_key;
+  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
+  HARDENED_TRY(load_key_if_sideloaded(aes_key));
+
+  // Call the internal init operation.
+  aes_gcm_context_t internal_ctx;
+  internal_ctx.security_level = key->config.security_level;
+  HARDENED_TRY(aes_gcm_encrypt_init(aes_key, iv.len, iv.data, &internal_ctx));
+
+  // Save the context and clear the key if needed.
+  HARDENED_TRY(gcm_context_save(&internal_ctx, ctx));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_decrypt_init(
+    otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
+    otcrypto_aes_gcm_context_t *ctx) {
+  if (key == NULL || key->keyblob == NULL || iv.data == NULL || ctx == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Construct the AES key.
+  aes_key_t aes_key;
+  HARDENED_TRY(aes_gcm_key_construct(key, &aes_key));
+  HARDENED_TRY(load_key_if_sideloaded(aes_key));
+
+  // Call the internal init operation.
+  aes_gcm_context_t internal_ctx;
+  internal_ctx.security_level = key->config.security_level;
+  HARDENED_TRY(aes_gcm_decrypt_init(aes_key, iv.len, iv.data, &internal_ctx));
+
+  // Save the context and clear the key if needed.
+  HARDENED_TRY(gcm_context_save(&internal_ctx, ctx));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_update_aad(otcrypto_aes_gcm_context_t *ctx,
+                                              otcrypto_const_byte_buf_t aad) {
+  if (ctx == NULL || aad.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  if (aad.len == 0) {
+    // Nothing to do.
+    return OTCRYPTO_OK;
+  }
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Restore the AES-GCM context object and load the key if needed.
+  aes_gcm_context_t internal_ctx;
+  HARDENED_TRY(gcm_context_restore(ctx, &internal_ctx));
+  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
+
+  // Call the internal update operation.
+  HARDENED_TRY(aes_gcm_update_aad(&internal_ctx, aad.len, aad.data));
+
+  // Save the context and clear the key if needed.
+  HARDENED_TRY(gcm_context_save(&internal_ctx, ctx));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_update_encrypted_data(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_byte_buf_t input,
+    otcrypto_byte_buf_t output, size_t *output_bytes_written) {
+  if (ctx == NULL || input.data == NULL || output.data == NULL ||
+      output_bytes_written == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  *output_bytes_written = 0;
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  if (input.len == 0) {
+    // Nothing to do.
+    return OTCRYPTO_OK;
+  }
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Restore the AES-GCM context object and load the key if needed.
+  aes_gcm_context_t internal_ctx;
+  HARDENED_TRY(gcm_context_restore(ctx, &internal_ctx));
+  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
+  // Remask the key if it is not sideloaded.
+  HARDENED_TRY(gcm_remask_key(&internal_ctx));
+
+  // The output buffer must be long enough to hold all full blocks that will
+  // exist after `input` is added.
+  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
+  if (input.len > UINT32_MAX - partial_block_len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  size_t min_output_blocks =
+      (partial_block_len + input.len) / kAesBlockNumBytes;
+  size_t min_output_len = min_output_blocks * kAesBlockNumBytes;
+  if (output.len < min_output_len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Call the internal update operation.
+  HARDENED_TRY(aes_gcm_update_encrypted_data(
+      &internal_ctx, input.len, input.data, output_bytes_written, output.data));
+
+  // Save the context and clear the key if needed.
+  HARDENED_TRY(gcm_context_save(&internal_ctx, ctx));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_encrypt_final(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_aes_gcm_tag_len_t tag_len,
+    otcrypto_byte_buf_t ciphertext, size_t *ciphertext_bytes_written,
+    otcrypto_word32_buf_t auth_tag) {
+  if (ctx == NULL || ciphertext_bytes_written == NULL ||
+      auth_tag.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (ciphertext.len != 0 && ciphertext.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  *ciphertext_bytes_written = 0;
+
+  // Ensure entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Check the tag length.
+  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
+
+  // Restore the AES-GCM context object and load the key if needed.
+  aes_gcm_context_t internal_ctx;
+  HARDENED_TRY(gcm_context_restore(ctx, &internal_ctx));
+  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
+  // Remask the key if it is not sideloaded.
+  HARDENED_TRY(gcm_remask_key(&internal_ctx));
+
+  // If the partial block is nonempty, the output must be at least as long as
+  // the partial block.
+  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
+  if (ciphertext.len < partial_block_len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Call the internal final operation.
+  HARDENED_TRY(aes_gcm_encrypt_final(&internal_ctx, auth_tag.len, auth_tag.data,
+                                     ciphertext_bytes_written,
+                                     ciphertext.data));
+
+  // Clear the context and the key if needed.
+  HARDENED_TRY(hardened_memshred(ctx->data, ARRAYSIZE(ctx->data)));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_aes_gcm_decrypt_final(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_word32_buf_t auth_tag,
+    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_byte_buf_t plaintext,
+    size_t *plaintext_bytes_written, hardened_bool_t *success) {
+  if (ctx == NULL || plaintext_bytes_written == NULL || auth_tag.data == NULL ||
+      success == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (plaintext.len != 0 && plaintext.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  *plaintext_bytes_written = 0;
+  *success = kHardenedBoolFalse;
+
+  // Entropy complex needs to be initialized for `memshred`.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Store the iCache state (on or off) and disable it when it is on.
+  hardened_bool_t icache_saved_state;
+  HARDENED_TRY(ibex_disable_icache(&icache_saved_state));
+
+  // Check the tag length.
+  HARDENED_TRY(aes_gcm_check_tag_length(auth_tag.len, tag_len));
+
+  // Restore the AES-GCM context object and load the key if needed.
+  aes_gcm_context_t internal_ctx;
+  HARDENED_TRY(gcm_context_restore(ctx, &internal_ctx));
+  HARDENED_TRY(load_key_if_sideloaded(internal_ctx.key));
+  // Remask the key if it is not sideloaded.
+  HARDENED_TRY(gcm_remask_key(&internal_ctx));
+
+  // If the partial block is nonempty, the output must be at least as long as
+  // the partial block.
+  size_t partial_block_len = internal_ctx.input_len % kAesBlockNumBytes;
+  if (plaintext.len < partial_block_len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Call the internal final operation.
+  HARDENED_TRY(aes_gcm_decrypt_final(&internal_ctx, auth_tag.len, auth_tag.data,
+                                     plaintext_bytes_written, plaintext.data,
+                                     success));
+
+  // Clear the context and the key if needed.
+  HARDENED_TRY(hardened_memshred(ctx->data, ARRAYSIZE(ctx->data)));
+  HARDENED_TRY(clear_key_if_sideloaded(internal_ctx.key));
+
+  // Enable the iCache if it was previously enabled.
+  ibex_restore_icache(icache_saved_state);
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/aes_gcm/BUILD b/sw/device/lib/crypto/impl/aes_gcm/BUILD
index e0ed0378dcca1..1f67983f4a02a 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/BUILD
+++ b/sw/device/lib/crypto/impl/aes_gcm/BUILD
@@ -14,6 +14,8 @@ cc_library(
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:aes",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+        "//sw/device/lib/crypto/include:datatypes",
     ],
 )
 
@@ -22,8 +24,10 @@ cc_library(
     srcs = ["ghash.c"],
     hdrs = ["ghash.h"],
     deps = [
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
     ],
 )
 
diff --git a/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.c b/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.c
index b2f982cbf23d4..e97c4f21ee44b 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.c
+++ b/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.c
@@ -61,13 +61,38 @@ static inline void block_inc32(aes_block_t *block) {
  * One-shot version of the AES encryption API for a single block.
  */
 OT_WARN_UNUSED_RESULT
-static status_t aes_encrypt_block(const aes_key_t key, const aes_block_t *iv,
-                                  const aes_block_t *input,
-                                  aes_block_t *output) {
-  HARDENED_TRY(aes_encrypt_begin(key, iv));
-  HARDENED_TRY(aes_update(/*dest=*/NULL, input));
-  HARDENED_TRY(aes_update(output, /*src=*/NULL));
-  return aes_end(NULL);
+static status_t aes_encrypt_block(
+    const aes_key_t key, const aes_block_t *iv, const aes_block_t *input,
+    aes_block_t *output, otcrypto_key_security_level_t security_level) {
+  if (launder32(security_level) == kOtcryptoKeySecurityLevelLow) {
+    HARDENED_CHECK_EQ(security_level, kOtcryptoKeySecurityLevelLow);
+    // No additional FI protection.
+    HARDENED_TRY(aes_encrypt_begin(key, iv));
+    HARDENED_TRY(aes_update(/*dest=*/NULL, input));
+    HARDENED_TRY(aes_update(output, /*src=*/NULL));
+    return aes_end(NULL);
+  } else {
+    HARDENED_CHECK_NE(security_level, kOtcryptoKeySecurityLevelLow);
+    // Additional FI hardening.
+    // First AES operation. Encrypt the input.
+    HARDENED_TRY(aes_encrypt_begin(key, iv));
+    HARDENED_TRY(aes_update(/*dest=*/NULL, input));
+    HARDENED_TRY(aes_update(output, /*src=*/NULL));
+
+    // Second AES operation. Decrypt the output of the first AES operation and
+    // check whether the same input is retrieved.
+    aes_block_t input_recalculated = (aes_block_t){.data = {0}};
+    HARDENED_TRY(aes_decrypt_begin(key, iv));
+    HARDENED_TRY(aes_update(/*dest=*/NULL, output));
+    HARDENED_TRY(aes_update(&input_recalculated, /*src=*/NULL));
+    HARDENED_TRY(aes_end(NULL));
+
+    HARDENED_CHECK_EQ(
+        hardened_memeq((const uint32_t *)input_recalculated.data,
+                       (const uint32_t *)input->data, kAesBlockNumWords),
+        kHardenedBoolTrue);
+    return OTCRYPTO_OK;
+  }
 }
 
 /**
@@ -78,12 +103,15 @@ static status_t aes_encrypt_block(const aes_key_t key, const aes_block_t *iv,
  * @param key The AES key
  * @param iv Initialization vector, 128 bits
  * @param input Input block
+ * @param security_level Security level configuration
  * @param[out] output Output block
  */
 OT_WARN_UNUSED_RESULT
 static status_t gctr_process_block(const aes_key_t key, aes_block_t *iv,
-                                   aes_block_t *input, aes_block_t *output) {
-  HARDENED_TRY(aes_encrypt_block(key, iv, input, output));
+                                   aes_block_t *input,
+                                   otcrypto_key_security_level_t security_level,
+                                   aes_block_t *output) {
+  HARDENED_TRY(aes_encrypt_block(key, iv, input, output, security_level));
   block_inc32(iv);
   return OTCRYPTO_OK;
 }
@@ -114,6 +142,7 @@ static status_t gctr_process_block(const aes_key_t key, aes_block_t *iv,
  * @param partial Partial AES block.
  * @param input_len Number of bytes for input and output
  * @param input Pointer to input buffer (may be NULL if `len` is 0)
+ * @param security_level Security level of the key
  * @param[out] output_len Number of output bytes written
  * @param[out] output Pointer to output buffer
  */
@@ -121,6 +150,7 @@ OT_WARN_UNUSED_RESULT
 static status_t aes_gcm_gctr(const aes_key_t key, aes_block_t *iv,
                              size_t partial_len, aes_block_t *partial,
                              size_t input_len, const uint8_t *input,
+                             otcrypto_key_security_level_t security_level,
                              size_t *output_len, uint8_t *output) {
   // Key must be intended for CTR mode.
   if (key.mode != kAesCipherModeCtr) {
@@ -131,6 +161,7 @@ static status_t aes_gcm_gctr(const aes_key_t key, aes_block_t *iv,
     // Not enough data for a full block; copy into the partial block.
     unsigned char *partial_bytes = (unsigned char *)partial->data;
     memcpy(partial_bytes + partial_len, input, input_len);
+    *output_len = 0;
   } else {
     // Construct a block from the partial data and the start of the new data.
     unsigned char *partial_bytes = (unsigned char *)partial->data;
@@ -140,7 +171,8 @@ static status_t aes_gcm_gctr(const aes_key_t key, aes_block_t *iv,
 
     // Process the block.
     aes_block_t block_out;
-    HARDENED_TRY(gctr_process_block(key, iv, partial, &block_out));
+    HARDENED_TRY(
+        gctr_process_block(key, iv, partial, security_level, &block_out));
     memcpy(output, block_out.data, kAesBlockNumBytes);
     output += kAesBlockNumBytes;
     *output_len = kAesBlockNumBytes;
@@ -148,7 +180,8 @@ static status_t aes_gcm_gctr(const aes_key_t key, aes_block_t *iv,
     // Process any remaining full blocks of input.
     while (input_len >= kAesBlockNumBytes) {
       memcpy(partial->data, input, kAesBlockNumBytes);
-      HARDENED_TRY(gctr_process_block(key, iv, partial, &block_out));
+      HARDENED_TRY(
+          gctr_process_block(key, iv, partial, security_level, &block_out));
       memcpy(output, block_out.data, kAesBlockNumBytes);
       output += kAesBlockNumBytes;
       *output_len += kAesBlockNumBytes;
@@ -170,21 +203,37 @@ static status_t aes_gcm_gctr(const aes_key_t key, aes_block_t *iv,
  * output should not be used.
  *
  * @param key AES key
+ * @param security_level The security level of the key
  * @param[out] ctx Destination GHASH context object
  * @return OK or error
  */
 OT_WARN_UNUSED_RESULT
-static status_t aes_gcm_hash_subkey(const aes_key_t key, ghash_context_t *ctx) {
+static status_t aes_gcm_hash_subkey(
+    const aes_key_t key, otcrypto_key_security_level_t security_level,
+    ghash_context_t *ctx) {
   // Compute the initial hash subkey H = AES_K(0). Note that to get this
   // result from AES_CTR, we set both the IV and plaintext to zero; this way,
   // AES-CTR's final XOR with the plaintext does nothing.
   aes_block_t zero;
   memset(zero.data, 0, kAesBlockNumBytes);
   aes_block_t hash_subkey;
-  HARDENED_TRY(aes_encrypt_block(key, &zero, &zero, &hash_subkey));
+  HARDENED_TRY(
+      aes_encrypt_block(key, &zero, &zero, &hash_subkey, security_level));
+
+  // Create two shares of the hash subkey.
+  aes_block_t hash_subkey_share0;
+  aes_block_t hash_subkey_share1;
+
+  // Share 0: random data.
+  hardened_memshred(hash_subkey_share0.data, kAesBlockNumWords);
+
+  // Share 1: hash_subkey ^ hash_subkey_share0
+  hardened_xor(hash_subkey_share0.data, hash_subkey.data, kAesBlockNumWords,
+               hash_subkey_share1.data);
 
   // Set the key for the GHASH context.
-  ghash_init_subkey(hash_subkey.data, ctx);
+  ghash_init_subkey(hash_subkey_share0.data, ctx->tbl0);
+  ghash_init_subkey(hash_subkey_share1.data, ctx->tbl1);
 
   return OTCRYPTO_OK;
 }
@@ -206,12 +255,34 @@ static status_t aes_gcm_counter(const size_t iv_len, const uint32_t *iv,
                                 ghash_context_t *ctx, aes_block_t *j0) {
   if (iv_len == 3) {
     // If the IV is 96 bits, then J0 = (IV || {0}^31 || 1).
-    hardened_memcpy(j0->data, iv, iv_len);
+    HARDENED_TRY(hardened_memcpy(j0->data, iv, iv_len));
     // Set the last word to 1 (as a big-endian integer).
     j0->data[kAesBlockNumWords - 1] = __builtin_bswap32(1);
   } else if (iv_len == 4) {
     // If the IV is 128 bits, then J0 = GHASH(H, IV || {0}^120 || 0x80), where
     // {0}^120 means 120 zero bits (15 0x00 bytes).
+
+    // As the encrypted initial counter block S only can be computed AFTER
+    // aes_gcm_counter(), set S0 and S1 to random.
+    aes_block_t enc_initial_counter_block;
+    hardened_memshred(enc_initial_counter_block.data, kAesBlockNumWords);
+
+    // Split the initial counter block S into two shares S0 and S1.
+    // S0: random data.
+    aes_block_t enc_initial_counter_block0;
+    hardened_memshred(enc_initial_counter_block0.data, kAesBlockNumWords);
+
+    // S1: S ^ S0
+    aes_block_t enc_initial_counter_block1;
+    hardened_xor(enc_initial_counter_block0.data,
+                 enc_initial_counter_block.data, kAesBlockNumWords,
+                 enc_initial_counter_block1.data);
+
+    // Calculate the masking correction terms and store the encrypted initial
+    // counter blocks S0 and S1.
+    ghash_handle_enc_initial_counter_block(
+        enc_initial_counter_block0.data, enc_initial_counter_block1.data, ctx);
+
     ghash_init(ctx);
     ghash_update(ctx, iv_len * sizeof(uint32_t), (unsigned char *)iv);
     uint8_t buffer[kAesBlockNumBytes];
@@ -219,6 +290,11 @@ static status_t aes_gcm_counter(const size_t iv_len, const uint32_t *iv,
     buffer[kAesBlockNumBytes - 1] = 0x80;
     ghash_update(ctx, kAesBlockNumBytes, buffer);
     ghash_final(ctx, j0->data);
+    // In the masking scheme, the GHASH function now actually XORs the initial
+    // counter block S to the output. As we do not want to have this for J0,
+    // correct the output.
+    hardened_xor_in_place(j0->data, enc_initial_counter_block.data,
+                          kAesBlockNumWords);
   } else {
     // Should not happen; invalid IV length.
     return OTCRYPTO_BAD_ARGS;
@@ -248,29 +324,16 @@ static status_t aes_gcm_get_tag(aes_gcm_context_t *ctx, size_t tag_len,
       __builtin_bswap64(((uint64_t)ctx->input_len) * 8),
   };
 
-  // Finish computing S by appending (len64(A) || len64(C)).
+  // Append (len64(A) || len64(C)) and XOR the result with S1 to get the final
+  // tag.
   ghash_update(&ctx->ghash_ctx, kAesBlockNumBytes, (unsigned char *)last_block);
-  aes_block_t s;
-  ghash_final(&ctx->ghash_ctx, s.data);
-
-  // Compute the tag T = GCTR(K, J0, S).
-  uint32_t full_tag[kAesBlockNumWords];
-  size_t full_tag_len;
-  aes_block_t empty = {.data = {0}};
-  HARDENED_TRY(aes_gcm_gctr(ctx->key, &ctx->initial_counter_block,
-                            /*partial_len=*/0, &empty, kAesBlockNumBytes,
-                            (unsigned char *)s.data, &full_tag_len,
-                            (unsigned char *)full_tag));
-
-  // Sanity check.
-  if (full_tag_len != kAesBlockNumBytes) {
-    return OTCRYPTO_FATAL_ERR;
-  }
+  aes_block_t full_tag;
+  ghash_final(&ctx->ghash_ctx, full_tag.data);
 
   // Truncate the tag if needed. NIST requires we take the most significant
   // bits in big-endian representation, which corresponds to the least
   // significant bits in Ibex's little-endian representation.
-  hardened_memcpy(tag, full_tag, tag_len);
+  HARDENED_TRY(hardened_memcpy(tag, full_tag.data, tag_len));
   return OTCRYPTO_OK;
 }
 
@@ -310,12 +373,36 @@ static status_t aes_gcm_init(const aes_key_t key, const size_t iv_len,
   }
 
   // Initialize the hash subkey H.
-  HARDENED_TRY(aes_gcm_hash_subkey(key, &ctx->ghash_ctx));
+  HARDENED_TRY(aes_gcm_hash_subkey(key, ctx->security_level, &ctx->ghash_ctx));
 
   // Compute the counter block (called J0 in the NIST specification).
   HARDENED_TRY(aes_gcm_counter(iv_len, iv, &ctx->ghash_ctx,
                                &ctx->initial_counter_block));
 
+  // Create the encrypted initial counter block S.
+  aes_block_t zero;
+  memset(zero.data, 0, kAesBlockNumBytes);
+  aes_block_t enc_initial_counter_block;
+  HARDENED_TRY(aes_encrypt_block(key, &ctx->initial_counter_block, &zero,
+                                 &enc_initial_counter_block,
+                                 ctx->security_level));
+
+  // Split the initial counter block S into two shares S0 and S1.
+  // S0: random data.
+  aes_block_t enc_initial_counter_block0;
+  hardened_memshred(enc_initial_counter_block0.data, kAesBlockNumWords);
+
+  // S1: S ^ S0
+  aes_block_t enc_initial_counter_block1;
+  hardened_xor(enc_initial_counter_block0.data, enc_initial_counter_block.data,
+               kAesBlockNumWords, enc_initial_counter_block1.data);
+
+  // Calculate the masking correction terms and store the encrypted initial
+  // counter blocks.
+  ghash_handle_enc_initial_counter_block(enc_initial_counter_block0.data,
+                                         enc_initial_counter_block1.data,
+                                         &ctx->ghash_ctx);
+
   // Set the initial IV for GCTR to inc32(J0).
   // The eventual ciphertext is C = GCTR(K, inc32(J0), plaintext).
   memcpy(ctx->gctr_iv.data, ctx->initial_counter_block.data, kAesBlockNumBytes);
@@ -413,7 +500,7 @@ status_t aes_gcm_update_encrypted_data(aes_gcm_context_t *ctx, size_t input_len,
   size_t partial_aes_block_len = ctx->input_len % kAesBlockNumBytes;
   HARDENED_TRY(aes_gcm_gctr(ctx->key, &ctx->gctr_iv, partial_aes_block_len,
                             &ctx->partial_aes_block, input_len, input,
-                            output_len, output));
+                            ctx->security_level, output_len, output));
 
   // Accumulate any new ciphertext to the GHASH context. The ciphertext is the
   // output for encryption, and the input for decryption.
@@ -478,7 +565,8 @@ status_t aes_gcm_final(aes_gcm_context_t *ctx, size_t tag_len, uint32_t *tag,
            kAesBlockNumBytes - partial_aes_block_len);
     aes_block_t block_out;
     HARDENED_TRY(gctr_process_block(ctx->key, &ctx->gctr_iv,
-                                    &ctx->partial_aes_block, &block_out));
+                                    &ctx->partial_aes_block,
+                                    ctx->security_level, &block_out));
     memcpy(output, block_out.data, partial_aes_block_len);
     *output_len = partial_aes_block_len;
   }
diff --git a/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h b/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h
index 80273ce5ade82..3c98608f84f7a 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h
+++ b/sw/device/lib/crypto/impl/aes_gcm/aes_gcm.h
@@ -12,6 +12,7 @@
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/crypto/drivers/aes.h"
 #include "sw/device/lib/crypto/impl/aes_gcm/ghash.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -29,6 +30,10 @@ typedef struct aes_gcm_context {
    * Underlying AES-CTR key.
    */
   aes_key_t key;
+  /**
+   * Security level of the underlying AES-CTR key.
+   */
+  otcrypto_key_security_level_t security_level;
   /**
    * Initial counter block (J0 in the spec).
    */
diff --git a/sw/device/lib/crypto/impl/aes_gcm/ghash.c b/sw/device/lib/crypto/impl/aes_gcm/ghash.c
index 0d4426d328ba3..d3f510ebb25e6 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/ghash.c
+++ b/sw/device/lib/crypto/impl/aes_gcm/ghash.c
@@ -4,6 +4,7 @@
 
 #include "sw/device/lib/crypto/impl/aes_gcm/ghash.h"
 
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 
@@ -143,11 +144,11 @@ static uint8_t reverse_bits(uint8_t byte) {
   return out;
 }
 
-void ghash_init_subkey(const uint32_t *hash_subkey, ghash_context_t *ctx) {
+void ghash_init_subkey(const uint32_t *hash_subkey, ghash_block_t *tbl) {
   // Initialize 0 * H = 0.
-  memset(ctx->tbl[0].data, 0, kGhashBlockNumBytes);
+  memset(tbl[0].data, 0, kGhashBlockNumBytes);
   // Initialize 1 * H = H.
-  memcpy(ctx->tbl[0x8].data, hash_subkey, kGhashBlockNumBytes);
+  memcpy(tbl[0x8].data, hash_subkey, kGhashBlockNumBytes);
 
   // To get remaining entries, we use a variant of "shift and add"; in
   // polynomial terms, a shift is a multiplication by x. Note that, because the
@@ -157,16 +158,19 @@ void ghash_init_subkey(const uint32_t *hash_subkey, ghash_context_t *ctx) {
   for (uint8_t i = 2; i < 16; i += 2) {
     // Find the product corresponding to (i >> 1) * H and multiply by x to
     // shift 1; this will be i * H.
-    galois_mulx(&ctx->tbl[reverse_bits(i >> 1)], &ctx->tbl[reverse_bits(i)]);
+    galois_mulx(&tbl[reverse_bits(i >> 1)], &tbl[reverse_bits(i)]);
 
     // Add H to i * H to get (i + 1) * H.
-    block_xor(&ctx->tbl[reverse_bits(i)], &ctx->tbl[0x8],
-              &ctx->tbl[reverse_bits(i + 1)]);
+    block_xor(&tbl[reverse_bits(i)], &tbl[0x8], &tbl[reverse_bits(i + 1)]);
   }
 }
 
 void ghash_init(ghash_context_t *ctx) {
-  memset(ctx->state.data, 0, kGhashBlockNumBytes);
+  // Randomize the initial state.
+  hardened_memshred(ctx->state0.data, kGhashBlockNumWords);
+  hardened_memshred(ctx->state1.data, kGhashBlockNumWords);
+  // Initialize the ghash block counter.
+  ctx->ghash_block_cnt = 0;
 }
 
 /**
@@ -182,9 +186,12 @@ void ghash_init(ghash_context_t *ctx) {
  * This operation corresponds to multiplication in the Galois field with order
  * 2^128, modulo the polynomial x^128 +  x^8 + x^2 + x + 1
  *
- * @param ctx GHASH context, updated in place.
+ * @param state GHASH state.
+ * @param tbl Product table for the masked hash subkey.
+ * @return Multiplication of the state and the hash subkey.
  */
-static void galois_mul_state_key(ghash_context_t *ctx) {
+static ghash_block_t galois_mul_state_key(ghash_block_t state,
+                                          ghash_block_t tbl[16]) {
   // Initialize the multiplication result to 0.
   ghash_block_t result;
   memset(result.data, 0, kGhashBlockNumBytes);
@@ -217,7 +224,7 @@ static void galois_mul_state_key(ghash_context_t *ctx) {
     // Add the product of the next window and H to `result`. We process the
     // windows starting with the most significant polynomial terms, which means
     // starting from the last byte and proceeding to the first.
-    uint8_t tbl_index = block_byte_get(&ctx->state, (kNumWindows - 1 - i) >> 1);
+    uint8_t tbl_index = block_byte_get(&state, (kNumWindows - 1 - i) >> 1);
 
     // Select the less significant 4 bits if i is even, or the more significant
     // 4 bits if i is odd. This does not need to be constant time, since the
@@ -227,10 +234,9 @@ static void galois_mul_state_key(ghash_context_t *ctx) {
     } else {
       tbl_index &= 0x0f;
     }
-    block_xor(&result, &ctx->tbl[tbl_index], &result);
+    block_xor(&result, &tbl[tbl_index], &result);
   }
-
-  memcpy(ctx->state.data, result.data, kGhashBlockNumBytes);
+  return result;
 }
 
 /**
@@ -240,10 +246,67 @@ static void galois_mul_state_key(ghash_context_t *ctx) {
  * @param block Block to incorporate.
  */
 static void ghash_process_block(ghash_context_t *ctx, ghash_block_t *block) {
-  // XOR `state` with the next input block.
-  block_xor(&ctx->state, block, &ctx->state);
-  // Multiply state by H in-place.
-  galois_mul_state_key(ctx);
+  ghash_block_t s0_tmp;
+  ghash_block_t s1_tmp;
+  if (ctx->ghash_block_cnt == 0) {
+    // Process share 0.
+    // share0_tmp = (S0 + T0) * H0
+    hardened_memcpy(s0_tmp.data, block->data, kGhashBlockNumWords);
+    hardened_xor_in_place(s0_tmp.data, ctx->enc_initial_counter_block0.data,
+                          kGhashBlockNumWords);
+    s0_tmp = galois_mul_state_key(s0_tmp, ctx->tbl0);
+
+    // Apply the correction terms for state share 0.
+    // share0 = share0_tmp + (S0*(H0+1))
+    hardened_memcpy(ctx->state0.data, s0_tmp.data, kGhashBlockNumWords);
+    hardened_xor_in_place(ctx->state0.data, ctx->correction_term0.data,
+                          kGhashBlockNumWords);
+
+    // TODO(#28013): randomize register file content before processing the
+    // second share.
+
+    // Process share 1.
+    // share1_tmp = (S1 + T0) * H1
+    hardened_memcpy(s1_tmp.data, block->data, kGhashBlockNumWords);
+    hardened_xor_in_place(s1_tmp.data, ctx->enc_initial_counter_block1.data,
+                          kGhashBlockNumWords);
+    s1_tmp = galois_mul_state_key(s1_tmp, ctx->tbl1);
+
+    // Apply the correction terms for state share 1.
+    // share1 = share1_tmp + correction_term1
+    hardened_memcpy(ctx->state1.data, s1_tmp.data, kGhashBlockNumWords);
+    hardened_xor_in_place(ctx->state1.data, ctx->correction_term1_init.data,
+                          kGhashBlockNumWords);
+  } else {
+    // Process share 0.
+    // tmp = (share0+TN-1)+share1
+    ghash_block_t tmp;
+    hardened_memcpy(tmp.data, block->data, kGhashBlockNumWords);
+    hardened_xor_in_place(tmp.data, ctx->state0.data, kGhashBlockNumWords);
+    hardened_xor_in_place(tmp.data, ctx->state1.data, kGhashBlockNumWords);
+
+    // s0_tmp = tmp * H0
+    s0_tmp = galois_mul_state_key(tmp, ctx->tbl0);
+
+    // Apply the correction terms for state share 0.
+    // share0 = share0_tmp + (S0*(H0+1))
+    hardened_memcpy(ctx->state0.data, s0_tmp.data, kGhashBlockNumWords);
+    hardened_xor_in_place(ctx->state0.data, ctx->correction_term0.data,
+                          kGhashBlockNumWords);
+
+    // Process share 1.
+    // share1_tmp = tmp * H1
+    s1_tmp = galois_mul_state_key(tmp, ctx->tbl1);
+
+    // Apply the correction terms for state share 1.
+    // share1 = share1_tmp + (S0*H0)
+    hardened_memcpy(ctx->state1.data, s1_tmp.data, kGhashBlockNumWords);
+    hardened_xor_in_place(ctx->state1.data, ctx->correction_term1.data,
+                          kGhashBlockNumWords);
+  }
+
+  // Increment the number of processed ghash block counter.
+  ctx->ghash_block_cnt++;
 }
 
 void ghash_process_full_blocks(ghash_context_t *ctx, size_t partial_len,
@@ -293,6 +356,39 @@ void ghash_update(ghash_context_t *ctx, size_t input_len,
   }
 }
 
+void ghash_handle_enc_initial_counter_block(
+    const uint32_t *enc_initial_counter_block0,
+    const uint32_t *enc_initial_counter_block1, ghash_context_t *ctx) {
+  // correction_term0 = S0 * (H0 + 1).
+  ghash_block_t s0;
+  hardened_memcpy(s0.data, enc_initial_counter_block0, kGhashBlockNumWords);
+  ghash_block_t mul_tmp = galois_mul_state_key(s0, ctx->tbl0);
+  block_xor(&mul_tmp, &s0, &ctx->correction_term0);
+
+  // correction_term1 = S0 * H1.
+  ctx->correction_term1 = galois_mul_state_key(s0, ctx->tbl1);
+
+  // correction_term1_init = S1 * H1.
+  ghash_block_t s1;
+  hardened_memcpy(s1.data, enc_initial_counter_block1, kGhashBlockNumWords);
+  ctx->correction_term1_init = galois_mul_state_key(s1, ctx->tbl1);
+
+  // Save the encrypted initial counter blocks into the ghash context as we
+  // need them throughout the ghash computations.
+  hardened_memcpy(ctx->enc_initial_counter_block0.data,
+                  enc_initial_counter_block0, kGhashBlockNumWords);
+  hardened_memcpy(ctx->enc_initial_counter_block1.data,
+                  enc_initial_counter_block1, kGhashBlockNumWords);
+}
+
 void ghash_final(ghash_context_t *ctx, uint32_t *result) {
-  memcpy(result, ctx->state.data, kGhashBlockNumBytes);
+  // Tag = (state0 + state1) + S1
+  ghash_block_t tmp_block;
+  ghash_block_t final_block;
+  hardened_xor(ctx->state0.data, ctx->state1.data, kGhashBlockNumWords,
+               tmp_block.data);
+  hardened_xor(tmp_block.data, ctx->enc_initial_counter_block1.data,
+               kGhashBlockNumWords, final_block.data);
+
+  memcpy(result, final_block.data, kGhashBlockNumBytes);
 }
diff --git a/sw/device/lib/crypto/impl/aes_gcm/ghash.h b/sw/device/lib/crypto/impl/aes_gcm/ghash.h
index d7f05638c910e..688cd2c7a9d1a 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/ghash.h
+++ b/sw/device/lib/crypto/impl/aes_gcm/ghash.h
@@ -32,13 +32,45 @@ typedef struct ghash_block {
 
 typedef struct ghash_context {
   /**
-   * Precomputed product table for the hash subkey.
+   * Precomputed product table for the hash subkey share 0.
    */
-  ghash_block_t tbl[16];
+  ghash_block_t tbl0[16];
   /**
-   * Cipher block representing the current GHASH state.
+   * Precomputed product table for the hash subkey share 1.
    */
-  ghash_block_t state;
+  ghash_block_t tbl1[16];
+  /**
+   * Cipher block representing the current GHASH state for share 0.
+   */
+  ghash_block_t state0;
+  /**
+   * Cipher block representing the current GHASH state for share 1.
+   */
+  ghash_block_t state1;
+  /**
+   * Precomputed correction term (S0 * (H0+1)) for state share 0.
+   */
+  ghash_block_t correction_term0;
+  /**
+   * Precomputed correction term (S0 * H1) for state share 1.
+   */
+  ghash_block_t correction_term1;
+  /**
+   * Precomputed initial correction term (S1 * H1) for state share 1.
+   */
+  ghash_block_t correction_term1_init;
+  /**
+   * Encrypted initial counter block share 0.
+   */
+  ghash_block_t enc_initial_counter_block0;
+  /**
+   * Encrypted initial counter block share 1.
+   */
+  ghash_block_t enc_initial_counter_block1;
+  /**
+   * Number of processed ghash blocks.
+   */
+  size_t ghash_block_cnt;
 } ghash_context_t;
 
 /**
@@ -55,9 +87,9 @@ typedef struct ghash_context {
  *
  * @param hash_subkey Subkey for the GHASH operation (`kGhashBlockNumWords`
  * words).
- * @param[out] ctx Context object with product table populated.
+ * @param[out] tbl The populated product table.
  */
-void ghash_init_subkey(const uint32_t *hash_subkey, ghash_context_t *ctx);
+void ghash_init_subkey(const uint32_t *hash_subkey, ghash_block_t *tbl);
 
 /**
  * Start a GHASH operation.
@@ -106,6 +138,21 @@ void ghash_process_full_blocks(ghash_context_t *ctx, size_t partial_len,
  */
 void ghash_update(ghash_context_t *ctx, size_t input_len, const uint8_t *input);
 
+/**
+ * Computes the correction terms needed for the masking scheme.
+ *
+ * correction_term0 = S0 * (H0 + 1).
+ * correction_term1 = S0 * H1.
+ * correction_term1_init = S1 * H1.
+ *
+ * @param enc_initial_counter_block0 Pointer to S0.
+ * @param enc_initial_counter_block1 Pointer to S1.
+ * @param ctx Context object.
+ */
+void ghash_handle_enc_initial_counter_block(
+    const uint32_t *enc_initial_counter_block0,
+    const uint32_t *enc_initial_counter_block1, ghash_context_t *ctx);
+
 /**
  * Update the state of a GHASH operation.
  *
diff --git a/sw/device/lib/crypto/impl/aes_gcm/ghash_unittest.cc b/sw/device/lib/crypto/impl/aes_gcm/ghash_unittest.cc
index cb6061de0f31a..456dfebc86470 100644
--- a/sw/device/lib/crypto/impl/aes_gcm/ghash_unittest.cc
+++ b/sw/device/lib/crypto/impl/aes_gcm/ghash_unittest.cc
@@ -13,6 +13,14 @@ namespace ghash_unittest {
 namespace {
 using ::testing::ElementsAreArray;
 
+// Zero block.
+std::array<uint32_t, 4> Zero = {
+    0x0,
+    0x0,
+    0x0,
+    0x0,
+};
+
 TEST(Ghash, McGrawViegaTestCase1) {
   // GHASH computation from test case 1 of:
   // https://csrc.nist.rip/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-spec.pdf
@@ -31,7 +39,9 @@ TEST(Ghash, McGrawViegaTestCase1) {
 
   // Compute GHASH(H, A, C).
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
   ghash_init(&ctx);
   uint32_t result[kGhashBlockNumWords];
   ghash_final(&ctx, result);
@@ -59,11 +69,11 @@ TEST(Ghash, ProcessFullBlocksOneByte) {
 
   // Initialize context.
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
   ghash_init(&ctx);
-  EXPECT_THAT(ctx.state.data, testing::ElementsAreArray(zero_block));
   ghash_process_full_blocks(&ctx, partial_len, &partial, input_len, input);
-  EXPECT_THAT(ctx.state.data, testing::ElementsAreArray(zero_block));
   EXPECT_EQ(partial.data[0], input_word);
   EXPECT_EQ(partial.data[1], 0);
   EXPECT_EQ(partial.data[2], 0);
@@ -85,9 +95,10 @@ TEST(Ghash, Mul1) {
   uint8_t one = 0x80;
 
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
   ghash_init(&ctx);
-  EXPECT_THAT(ctx.state.data, testing::ElementsAreArray(zero));
 
   ghash_block_t partial = {.data = {0}};
   size_t partial_len = 0;
@@ -96,10 +107,9 @@ TEST(Ghash, Mul1) {
   ghash_process_full_blocks(&ctx, partial_len, &partial, input_len, input);
   EXPECT_LT(input_len, kGhashBlockNumBytes - partial_len);
   EXPECT_EQ(partial.data[0], one);
-  EXPECT_THAT(ctx.state.data, testing::ElementsAreArray(zero));
 
   ghash_update(&ctx, 1, &one);
-  EXPECT_THAT(ctx.state.data, testing::ElementsAreArray(H));
+  EXPECT_THAT(ctx.state0.data, testing::ElementsAreArray(H));
   uint32_t result[kGhashBlockNumWords];
   ghash_final(&ctx, result);
 
@@ -144,7 +154,9 @@ TEST(Ghash, McGrawViegaTestCase2) {
 
   // Compute GHASH(H, A, C).
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
   ghash_init(&ctx);
   ghash_update(&ctx, A.size() * sizeof(uint32_t), (unsigned char *)A.data());
   ghash_update(&ctx, C.size() * sizeof(uint32_t), (unsigned char *)C.data());
@@ -190,7 +202,9 @@ TEST(Ghash, ContextReset) {
 
   // Initialize the hash subkey (should only need to do this once).
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
 
   // Compute GHASH(H, A, C).
   ghash_init(&ctx);
@@ -254,7 +268,9 @@ TEST(Ghash, McGrawViegaTestCase18) {
 
   // Compute GHASH(H, A, C).
   ghash_context_t ctx;
-  ghash_init_subkey(H.data(), &ctx);
+  ghash_init_subkey(H.data(), ctx.tbl0);
+  ghash_init_subkey(Zero.data(), ctx.tbl1);
+  ghash_handle_enc_initial_counter_block(Zero.data(), Zero.data(), &ctx);
   ghash_init(&ctx);
   ghash_update(&ctx, A.size() * sizeof(uint32_t), (unsigned char *)A.data());
   ghash_update(&ctx, C.size() * sizeof(uint32_t), (unsigned char *)C.data());
diff --git a/sw/device/lib/crypto/impl/aes_kwp/BUILD b/sw/device/lib/crypto/impl/aes_kwp/BUILD
index 1eaba217a7f0f..7659dcceae965 100644
--- a/sw/device/lib/crypto/impl/aes_kwp/BUILD
+++ b/sw/device/lib/crypto/impl/aes_kwp/BUILD
@@ -14,5 +14,6 @@ cc_library(
         "//sw/device/lib/base:math",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:aes",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
     ],
 )
diff --git a/sw/device/lib/crypto/impl/aes_kwp/aes_kwp.c b/sw/device/lib/crypto/impl/aes_kwp/aes_kwp.c
index ccc9a2f353f24..04315ca4c188f 100644
--- a/sw/device/lib/crypto/impl/aes_kwp/aes_kwp.c
+++ b/sw/device/lib/crypto/impl/aes_kwp/aes_kwp.c
@@ -56,8 +56,9 @@ status_t aes_kwp_wrap(const aes_key_t kek, const uint32_t *plaintext,
 
   // Initialize the output buffer with (A || plaintext || padding).
   size_t plaintext_words = ceil_div(plaintext_len, sizeof(uint32_t));
-  hardened_memcpy(ciphertext, block.data, kSemiblockWords);
-  hardened_memcpy(ciphertext + kSemiblockWords, plaintext, plaintext_words);
+  HARDENED_TRY(hardened_memcpy(ciphertext, block.data, kSemiblockWords));
+  HARDENED_TRY(hardened_memcpy(ciphertext + kSemiblockWords, plaintext,
+                               plaintext_words));
   unsigned char *pad_start =
       ((unsigned char *)ciphertext) + kSemiblockBytes + plaintext_len;
   memset(pad_start, 0, pad_len);
@@ -66,8 +67,9 @@ status_t aes_kwp_wrap(const aes_key_t kek, const uint32_t *plaintext,
   for (size_t j = 0; j < 6; j++) {
     for (size_t i = 1; i <= plaintext_semiblocks; i++) {
       // Copy R[i] into the block (A should already be present).
-      hardened_memcpy(block.data + kSemiblockWords,
-                      ciphertext + i * kSemiblockWords, kSemiblockWords);
+      HARDENED_TRY(hardened_memcpy(block.data + kSemiblockWords,
+                                   ciphertext + i * kSemiblockWords,
+                                   kSemiblockWords));
       HARDENED_TRY(aes_update(/*dest=*/NULL, &block));
       HARDENED_TRY(aes_update(&block, /*src=*/NULL));
 
@@ -78,13 +80,14 @@ status_t aes_kwp_wrap(const aes_key_t kek, const uint32_t *plaintext,
       t++;
 
       // Copy the last two words back into R[i].
-      hardened_memcpy(ciphertext + i * kSemiblockWords,
-                      block.data + kSemiblockWords, kSemiblockWords);
+      HARDENED_TRY(hardened_memcpy(ciphertext + i * kSemiblockWords,
+                                   block.data + kSemiblockWords,
+                                   kSemiblockWords));
     }
   }
 
   // Copy A into the first semiblock of the ciphertext.
-  hardened_memcpy(ciphertext, block.data, kSemiblockWords);
+  HARDENED_TRY(hardened_memcpy(ciphertext, block.data, kSemiblockWords));
   return OTCRYPTO_OK;
 }
 
@@ -120,7 +123,7 @@ status_t aes_kwp_unwrap(const aes_key_t kek, const uint32_t *ciphertext,
 
   // Initialize the working buffer, R.
   uint32_t r[(ciphertext_semiblocks - 1) * kSemiblockWords];
-  hardened_memcpy(r, ciphertext + kSemiblockWords, ARRAYSIZE(r));
+  HARDENED_TRY(hardened_memcpy(r, ciphertext + kSemiblockWords, ARRAYSIZE(r)));
 
   uint64_t t = 6 * ((uint64_t)ciphertext_semiblocks - 1);
   for (size_t j = 0; j < 6; j++) {
@@ -131,14 +134,16 @@ status_t aes_kwp_unwrap(const aes_key_t kek, const uint32_t *ciphertext,
       t--;
 
       // Copy R[i] into the block (A ^ t should already be present).
-      hardened_memcpy(block.data + kSemiblockWords,
-                      r + (i - 1) * kSemiblockWords, kSemiblockWords);
+      HARDENED_TRY(hardened_memcpy(block.data + kSemiblockWords,
+                                   r + (i - 1) * kSemiblockWords,
+                                   kSemiblockWords));
       HARDENED_TRY(aes_update(/*dest=*/NULL, &block));
       HARDENED_TRY(aes_update(&block, /*src=*/NULL));
 
       // Copy the last two words back into R[i].
-      hardened_memcpy(r + (i - 1) * kSemiblockWords,
-                      block.data + kSemiblockWords, kSemiblockWords);
+      HARDENED_TRY(hardened_memcpy(r + (i - 1) * kSemiblockWords,
+                                   block.data + kSemiblockWords,
+                                   kSemiblockWords));
     }
   }
 
@@ -174,7 +179,7 @@ status_t aes_kwp_unwrap(const aes_key_t kek, const uint32_t *ciphertext,
 
   // Copy the plaintext into the destination buffer.
   size_t plaintext_words = ceil_div(plaintext_len, sizeof(uint32_t));
-  hardened_memcpy(plaintext, r, plaintext_words);
+  HARDENED_TRY(hardened_memcpy(plaintext, r, plaintext_words));
 
   // Return success.
   *success = kHardenedBoolTrue;
diff --git a/sw/device/lib/crypto/impl/cryptolib_build_info.c b/sw/device/lib/crypto/impl/cryptolib_build_info.c
new file mode 100644
index 0000000000000..ac609fcb19f2e
--- /dev/null
+++ b/sw/device/lib/crypto/impl/cryptolib_build_info.c
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/cryptolib_build_info.h"
+
+#include "sw/device/lib/crypto/drivers/cryptolib_build_info.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('c', 'b', 'i')
+
+otcrypto_status_t otcrypto_build_info(uint32_t *version, bool *released,
+                                      uint32_t *build_hash_low,
+                                      uint32_t *build_hash_high) {
+  *version = kCryptoLibBuildInfo.version;
+  *released = kCryptoLibBuildInfo.released;
+  *build_hash_low = kCryptoLibBuildInfo.scm_revision.scm_revision_low;
+  *build_hash_high = kCryptoLibBuildInfo.scm_revision.scm_revision_high;
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/drbg.c b/sw/device/lib/crypto/impl/drbg.c
index a18977a860ea7..3f8639a461773 100644
--- a/sw/device/lib/crypto/impl/drbg.c
+++ b/sw/device/lib/crypto/impl/drbg.c
@@ -25,7 +25,7 @@
  * @param[out] seed_material Resulting entropy complex seed.
  * @return OK or error.
  */
-static otcrypto_status_t seed_material_construct(
+static status_t seed_material_construct(
     otcrypto_const_byte_buf_t value, entropy_seed_material_t *seed_material) {
   if (value.len > kEntropySeedBytes) {
     return OTCRYPTO_BAD_ARGS;
@@ -34,17 +34,14 @@ static otcrypto_status_t seed_material_construct(
   size_t nwords = ceil_div(value.len, sizeof(uint32_t));
   seed_material->len = nwords;
 
-  // Initialize the set words to zero.
-  memset(seed_material->data, 0, nwords * sizeof(uint32_t));
-
-  if (value.len == 0) {
-    return OTCRYPTO_OK;
-  }
-
   // Copy seed data.
   // TODO(#17711) Change to `hardened_memcpy`.
   memcpy(seed_material->data, value.data, value.len);
 
+  // Set any unset bytes to zero.
+  size_t unset_bytes = nwords * sizeof(uint32_t) - value.len;
+  memset(((unsigned char *)seed_material->data) + value.len, 0, unset_bytes);
+
   return OTCRYPTO_OK;
 }
 
@@ -91,7 +88,12 @@ otcrypto_status_t otcrypto_drbg_instantiate(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   entropy_seed_material_t seed_material;
+  HARDENED_TRY(
+      hardened_memshred(seed_material.data, ARRAYSIZE(seed_material.data)));
   seed_material_construct(perso_string, &seed_material);
 
   HARDENED_TRY(entropy_csrng_uninstantiate());
@@ -106,7 +108,12 @@ otcrypto_status_t otcrypto_drbg_reseed(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   entropy_seed_material_t seed_material;
+  HARDENED_TRY(
+      hardened_memshred(seed_material.data, ARRAYSIZE(seed_material.data)));
   seed_material_construct(additional_input, &seed_material);
 
   return entropy_csrng_reseed(/*disable_trng_input=*/kHardenedBoolFalse,
@@ -189,6 +196,12 @@ static otcrypto_status_t generate(hardened_bool_t fips_check,
 otcrypto_status_t otcrypto_drbg_generate(
     otcrypto_const_byte_buf_t additional_input,
     otcrypto_word32_buf_t drbg_output) {
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Randomize destination buffer.
+  HARDENED_TRY(hardened_memshred(drbg_output.data, drbg_output.len));
+
   return generate(/*fips_check=*/kHardenedBoolTrue, additional_input,
                   drbg_output);
 }
diff --git a/sw/device/lib/crypto/impl/ecc.c b/sw/device/lib/crypto/impl/ecc.c
deleted file mode 100644
index f88fc575fc878..0000000000000
--- a/sw/device/lib/crypto/impl/ecc.c
+++ /dev/null
@@ -1,1313 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/include/ecc.h"
-
-#include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/drivers/hmac.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdh_p256.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdh_p384.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p256.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384.h"
-#include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/datatypes.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('e', 'c', 'c')
-
-otcrypto_status_t otcrypto_ecdsa_keygen(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  HARDENED_TRY(otcrypto_ecdsa_keygen_async_start(elliptic_curve, private_key));
-  return otcrypto_ecdsa_keygen_async_finalize(elliptic_curve, private_key,
-                                              public_key);
-}
-
-otcrypto_status_t otcrypto_ecdsa_sign(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest,
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_word32_buf_t signature) {
-  HARDENED_TRY(otcrypto_ecdsa_sign_async_start(private_key, message_digest,
-                                               elliptic_curve));
-  return otcrypto_ecdsa_sign_async_finalize(elliptic_curve, signature);
-}
-
-otcrypto_status_t otcrypto_ecdsa_verify(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature,
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    hardened_bool_t *verification_result) {
-  HARDENED_TRY(otcrypto_ecdsa_verify_async_start(public_key, message_digest,
-                                                 signature, elliptic_curve));
-  return otcrypto_ecdsa_verify_async_finalize(elliptic_curve, signature,
-                                              verification_result);
-}
-
-otcrypto_status_t otcrypto_ecdh_keygen(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  HARDENED_TRY(otcrypto_ecdh_keygen_async_start(elliptic_curve, private_key));
-  return otcrypto_ecdh_keygen_async_finalize(elliptic_curve, private_key,
-                                             public_key);
-}
-
-otcrypto_status_t otcrypto_ecdh(const otcrypto_blinded_key_t *private_key,
-                                const otcrypto_unblinded_key_t *public_key,
-                                const otcrypto_ecc_curve_t *elliptic_curve,
-                                otcrypto_blinded_key_t *shared_secret) {
-  HARDENED_TRY(
-      otcrypto_ecdh_async_start(private_key, public_key, elliptic_curve));
-  return otcrypto_ecdh_async_finalize(elliptic_curve, shared_secret);
-}
-
-otcrypto_status_t otcrypto_ed25519_keygen(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_sign(
-    const otcrypto_blinded_key_t *private_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_verify(
-    const otcrypto_unblinded_key_t *public_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_const_word32_buf_t signature,
-    hardened_bool_t *verification_result) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519_keygen(otcrypto_blinded_key_t *private_key,
-                                         otcrypto_unblinded_key_t *public_key) {
-  // TODO: Connect X25519 operations to API.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519(const otcrypto_blinded_key_t *private_key,
-                                  const otcrypto_unblinded_key_t *public_key,
-                                  otcrypto_blinded_key_t *shared_secret) {
-  // TODO: Connect X25519 operations to API.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-/**
- * Calls keymgr to sideload key material into OTBN.
- *
- * This routine should only ever be called on hardware-backed keys.
- *
- * @param private_key Sideloaded key handle.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t sideload_key_seed(const otcrypto_blinded_key_t *private_key) {
-  keymgr_diversification_t diversification;
-  HARDENED_TRY(
-      keyblob_to_keymgr_diversification(private_key, &diversification));
-  return keymgr_generate_key_otbn(diversification);
-}
-
-otcrypto_status_t otcrypto_ecdsa_keygen_async_start(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    const otcrypto_blinded_key_t *private_key) {
-  if (elliptic_curve == NULL || private_key == NULL ||
-      private_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the key mode.
-  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsa) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsa);
-
-  // Check that the entropy complex is initialized.
-  HARDENED_TRY(entropy_complex_check());
-
-  // Select the correct keygen operation and start it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-        HARDENED_TRY(sideload_key_seed(private_key));
-        return ecdsa_p256_sideload_keygen_start();
-      } else if (launder32(private_key->config.hw_backed) ==
-                 kHardenedBoolFalse) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-        return ecdsa_p256_keygen_start();
-      } else {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      return OTCRYPTO_OK;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-        HARDENED_TRY(sideload_key_seed(private_key));
-        return ecdsa_p384_sideload_keygen_start();
-      } else if (launder32(private_key->config.hw_backed) ==
-                 kHardenedBoolFalse) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-        return ecdsa_p384_keygen_start();
-      } else {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      return OTCRYPTO_OK;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-/**
- * Check the lengths of private keys for curve P-256.
- *
- * Checks the length of caller-allocated buffers for a P-256 private key. This
- * function may be used for both ECDSA and ECDH keys, since the key structure
- * is the same.
- *
- * If this check passes and `hw_backed` is false, it is safe to interpret
- * `private_key->keyblob` as a `p256_masked_scalar_t *`.
- *
- * @param private_key Private key struct to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p256_private_key_length_check(
-    const otcrypto_blinded_key_t *private_key) {
-  if (private_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Skip the length check in this case; if the salt is the wrong length, the
-    // keyblob library will catch it before we sideload the key.
-    return OTCRYPTO_OK;
-  }
-  HARDENED_CHECK_NE(private_key->config.hw_backed, kHardenedBoolTrue);
-
-  // Check the unmasked length.
-  if (launder32(private_key->config.key_length) != kP256ScalarBytes) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_length, kP256ScalarBytes);
-
-  // Check the single-share length.
-  if (launder32(keyblob_share_num_words(private_key->config)) !=
-      kP256MaskedScalarShareWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(keyblob_share_num_words(private_key->config),
-                    kP256MaskedScalarShareWords);
-
-  // Check the keyblob length.
-  if (launder32(private_key->keyblob_length) != sizeof(p256_masked_scalar_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->keyblob_length, sizeof(p256_masked_scalar_t));
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Check the lengths of public keys for curve P-256.
- *
- * Checks the length of caller-allocated buffers for a P-256 public key. This
- * function may be used for both ECDSA and ECDH keys, since the key structure
- * is the same.
- *
- * If this check passes, it is safe to interpret public_key->key as a
- * `p256_point_t *`.
- *
- * @param public_key Public key struct to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p256_public_key_length_check(
-    const otcrypto_unblinded_key_t *public_key) {
-  if (launder32(public_key->key_length) != sizeof(p256_point_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(public_key->key_length, sizeof(p256_point_t));
-  return OTCRYPTO_OK;
-}
-
-/**
- * Check the lengths of private keys for curve P-384.
- *
- * Checks the length of caller-allocated buffers for a P-384 private key. This
- * function may be used for both ECDSA and ECDH keys, since the key structure
- * is the same.
- *
- * If this check passes and `hw_backed` is false, it is safe to interpret
- * `private_key->keyblob` as a `p384_masked_scalar_t *`.
- *
- * @param private_key Private key struct to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p384_private_key_length_check(
-    const otcrypto_blinded_key_t *private_key) {
-  if (private_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Skip the length check in this case; if the salt is the wrong length, the
-    // keyblob library will catch it before we sideload the key.
-    return OTCRYPTO_OK;
-  }
-  HARDENED_CHECK_NE(private_key->config.hw_backed, kHardenedBoolTrue);
-
-  // Check the unmasked length.
-  if (launder32(private_key->config.key_length) != kP384ScalarBytes) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_length, kP384ScalarBytes);
-
-  // Check the single-share length.
-  if (launder32(keyblob_share_num_words(private_key->config)) !=
-      kP384MaskedScalarShareWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(keyblob_share_num_words(private_key->config),
-                    kP384MaskedScalarShareWords);
-
-  // Check the keyblob length.
-  if (launder32(private_key->keyblob_length) != sizeof(p384_masked_scalar_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->keyblob_length, sizeof(p384_masked_scalar_t));
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Check the lengths of public keys for curve P-384.
- *
- * Checks the length of caller-allocated buffers for a P-384 public key. This
- * function may be used for both ECDSA and ECDH keys, since the key structure
- * is the same.
- *
- * If this check passes, it is safe to interpret public_key->key as a
- * `p384_point_t *`.
- *
- * @param public_key Public key struct to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p384_public_key_length_check(
-    const otcrypto_unblinded_key_t *public_key) {
-  if (launder32(public_key->key_length) != sizeof(p384_point_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(public_key->key_length, sizeof(p384_point_t));
-  return OTCRYPTO_OK;
-}
-
-/**
- * Finalize an ECDSA key generation operation for curve P-256.
- *
- * This function assumes that space is already allocated for all key material
- * and that the length parameters on the structs are set accordingly, in the
- * same way as for `otcrypto_ecdsa_keygen_async_finalize`.
- *
- * @param[out] private_key Private key to populate.
- * @param[out] public_key Public key to populate.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p256_keygen_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check the lengths of caller-allocated buffers.
-  HARDENED_TRY(p256_private_key_length_check(private_key));
-  HARDENED_TRY(p256_public_key_length_check(public_key));
-
-  // Interpret the key buffer as a P-256 point.
-  p256_point_t *pk = (p256_point_t *)public_key->key;
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Note: This operation wipes DMEM after retrieving the keys, so if an error
-    // occurs after this point then the keys would be unrecoverable. This should
-    // be the last potentially error-causing line before returning to the
-    // caller.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(ecdsa_p256_sideload_keygen_finalize(pk));
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    p256_masked_scalar_t *sk = (p256_masked_scalar_t *)private_key->keyblob;
-    // Note: This operation wipes DMEM after retrieving the keys, so if an error
-    // occurs after this point then the keys would be unrecoverable. This should
-    // be the last potentially error-causing line before returning to the
-    // caller.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    HARDENED_TRY(ecdsa_p256_keygen_finalize(sk, pk));
-    private_key->checksum = integrity_blinded_checksum(private_key);
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  public_key->checksum = integrity_unblinded_checksum(public_key);
-  return OTCRYPTO_OK;
-}
-
-/**
- * Finalize an ECDSA key generation operation for curve P-384.
- *
- * This function assumes that space is already allocated for all key material
- * and that the length parameters on the structs are set accordingly, in the
- * same way as for `otcrypto_ecdsa_keygen_async_finalize`.
- *
- * @param[out] private_key Private key to populate.
- * @param[out] public_key Public key to populate.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p384_keygen_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check the lengths of caller-allocated buffers.
-  HARDENED_TRY(p384_private_key_length_check(private_key));
-  HARDENED_TRY(p384_public_key_length_check(public_key));
-
-  // Interpret the key buffer as a P-384 point.
-  p384_point_t *pk = (p384_point_t *)public_key->key;
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Note: This operation wipes DMEM after retrieving the keys, so if an error
-    // occurs after this point then the keys would be unrecoverable. This should
-    // be the last potentially error-causing line before returning to the
-    // caller.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(ecdsa_p384_sideload_keygen_finalize(pk));
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    p384_masked_scalar_t *sk = (p384_masked_scalar_t *)private_key->keyblob;
-    // Note: This operation wipes DMEM after retrieving the keys, so if an error
-    // occurs after this point then the keys would be unrecoverable. This should
-    // be the last potentially error-causing line before returning to the
-    // caller.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    HARDENED_TRY(ecdsa_p384_keygen_finalize(sk, pk));
-    private_key->checksum = integrity_blinded_checksum(private_key);
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  public_key->checksum = integrity_unblinded_checksum(public_key);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_ecdsa_keygen_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check for any NULL pointers.
-  if (elliptic_curve == NULL || private_key == NULL || public_key == NULL ||
-      private_key->keyblob == NULL || public_key->key == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the key modes.
-  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsa ||
-      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsa) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsa);
-  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsa);
-
-  // Select the correct keygen operation and finalize it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(
-          internal_ecdsa_p256_keygen_finalize(private_key, public_key));
-      break;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(
-          internal_ecdsa_p384_keygen_finalize(private_key, public_key));
-      break;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Clear the OTBN sideload slot (in case the seed was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-/**
- * Start an ECDSA signature generation operation for curve P-256.
- *
- * @param private_key Private key to sign with.
- * @param message_digest Message digest to sign.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p256_sign_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest) {
-  // Check the digest length.
-  if (launder32(message_digest.len) != kP256ScalarWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(message_digest.len, kP256ScalarWords);
-
-  // Check the key length.
-  HARDENED_TRY(p256_private_key_length_check(private_key));
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    // Start the asynchronous signature-generation routine.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p256_masked_scalar_t *sk = (p256_masked_scalar_t *)private_key->keyblob;
-    return ecdsa_p256_sign_start(message_digest.data, sk);
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Load the key and start in sideloaded-key mode.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(sideload_key_seed(private_key));
-    return ecdsa_p256_sideload_sign_start(message_digest.data);
-  }
-
-  // Invalid value for private_key->hw_backed.
-  return OTCRYPTO_BAD_ARGS;
-}
-
-/**
- * Start an ECDSA signature generation operation for curve P-384.
- *
- * @param private_key Private key to sign with.
- * @param message_digest Message digest to sign.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p384_sign_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest) {
-  // Check the digest length.
-  if (launder32(message_digest.len) != kP384ScalarWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(message_digest.len, kP384ScalarWords);
-
-  // Check the key length.
-  HARDENED_TRY(p384_private_key_length_check(private_key));
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    // Start the asynchronous signature-generation routine.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p384_masked_scalar_t *sk = (p384_masked_scalar_t *)private_key->keyblob;
-    return ecdsa_p384_sign_start(message_digest.data, sk);
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    // Load the key and start in sideloaded-key mode.
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(sideload_key_seed(private_key));
-    return ecdsa_p384_sideload_sign_start(message_digest.data);
-  }
-
-  // Invalid value for private_key->hw_backed.
-  return OTCRYPTO_BAD_ARGS;
-}
-
-otcrypto_status_t otcrypto_ecdsa_sign_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest,
-    const otcrypto_ecc_curve_t *elliptic_curve) {
-  if (private_key == NULL || private_key->keyblob == NULL ||
-      elliptic_curve == NULL || message_digest.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the integrity of the private key.
-  if (launder32(integrity_blinded_key_check(private_key)) !=
-      kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
-                    kHardenedBoolTrue);
-
-  // Check the private key mode.
-  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsa) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsa);
-
-  // Check that the entropy complex is initialized.
-  HARDENED_TRY(entropy_complex_check());
-
-  // Select the correct signing operation and start it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(internal_ecdsa_p256_sign_start(private_key, message_digest));
-      return OTCRYPTO_OK;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(internal_ecdsa_p384_sign_start(private_key, message_digest));
-      return OTCRYPTO_OK;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-/**
- * Check the length of a signature buffer for ECDSA with P-256.
- *
- * If this check passes on `signature.len`, it is safe to interpret
- * `signature.data` as `ecdsa_p256_signature_t *`.
- *
- * @param len Length to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p256_signature_length_check(size_t len) {
-  if (launder32(len) > UINT32_MAX / sizeof(uint32_t) ||
-      launder32(len) * sizeof(uint32_t) != sizeof(ecdsa_p256_signature_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(len * sizeof(uint32_t), sizeof(ecdsa_p256_signature_t));
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Check the length of a signature buffer for ECDSA with P-384.
- *
- * If this check passes on `signature.len`, it is safe to interpret
- * `signature.data` as `ecdsa_p384_signature_t *`.
- *
- * @param len Length to check.
- * @return OK if the lengths are correct or BAD_ARGS otherwise.
- */
-OT_WARN_UNUSED_RESULT
-static status_t p384_signature_length_check(size_t len) {
-  if (launder32(len) > UINT32_MAX / sizeof(uint32_t) ||
-      launder32(len) * sizeof(uint32_t) != sizeof(ecdsa_p384_signature_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(len * sizeof(uint32_t), sizeof(ecdsa_p384_signature_t));
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_ecdsa_sign_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_word32_buf_t signature) {
-  if (elliptic_curve == NULL || signature.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Select the correct signing operation and finalize it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(p256_signature_length_check(signature.len));
-      ecdsa_p256_signature_t *sig_p256 =
-          (ecdsa_p256_signature_t *)signature.data;
-      // Note: This operation wipes DMEM, so if an error occurs after this
-      // point then the signature would be unrecoverable. This should be the
-      // last potentially error-causing line before returning to the caller.
-      HARDENED_TRY(ecdsa_p256_sign_finalize(sig_p256));
-      break;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(p384_signature_length_check(signature.len));
-      ecdsa_p384_signature_t *sig_p384 =
-          (ecdsa_p384_signature_t *)signature.data;
-      // Note: This operation wipes DMEM, so if an error occurs after this
-      // point then the signature would be unrecoverable. This should be the
-      // last potentially error-causing line before returning to the caller.
-      HARDENED_TRY(ecdsa_p384_sign_finalize(sig_p384));
-      break;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Clear the OTBN sideload slot (in case the key was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-/**
- * Start an ECDSA signature verification operation for curve P-256.
- *
- * @param public_key Public key to check against.
- * @param message_digest Message digest to check against.
- * @param signature Signature to verify.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p256_verify_start(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature) {
-  // Check the public key size.
-  HARDENED_TRY(p256_public_key_length_check(public_key));
-  p256_point_t *pk = (p256_point_t *)public_key->key;
-
-  // Check the digest length.
-  if (launder32(message_digest.len) != kP256ScalarWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(message_digest.len, kP256ScalarWords);
-
-  // Check the signature lengths.
-  HARDENED_TRY(p256_signature_length_check(signature.len));
-  ecdsa_p256_signature_t *sig = (ecdsa_p256_signature_t *)signature.data;
-
-  // Start the asynchronous signature-verification routine.
-  return ecdsa_p256_verify_start(sig, message_digest.data, pk);
-}
-
-/**
- * Start an ECDSA signature verification operation for curve P-384.
- *
- * @param public_key Public key to check against.
- * @param message_digest Message digest to check against.
- * @param signature Signature to verify.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdsa_p384_verify_start(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature) {
-  // Check the public key size.
-  HARDENED_TRY(p384_public_key_length_check(public_key));
-  p384_point_t *pk = (p384_point_t *)public_key->key;
-
-  // Check the digest length.
-  if (launder32(message_digest.len) != kP384ScalarWords) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(message_digest.len, kP384ScalarWords);
-
-  // Check the signature lengths.
-  HARDENED_TRY(p384_signature_length_check(signature.len));
-  ecdsa_p384_signature_t *sig = (ecdsa_p384_signature_t *)signature.data;
-
-  // Start the asynchronous signature-verification routine.
-  return ecdsa_p384_verify_start(sig, message_digest.data, pk);
-}
-
-otcrypto_status_t otcrypto_ecdsa_verify_async_start(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature,
-    const otcrypto_ecc_curve_t *elliptic_curve) {
-  if (public_key == NULL || elliptic_curve == NULL || signature.data == NULL ||
-      message_digest.data == NULL || public_key->key == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the public key mode.
-  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsa) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsa);
-
-  // Check the integrity of the public key.
-  if (launder32(integrity_unblinded_key_check(public_key)) !=
-      kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
-                    kHardenedBoolTrue);
-
-  // Select the correct verification operation and start it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(internal_ecdsa_p256_verify_start(public_key, message_digest,
-                                                    signature));
-      return OTCRYPTO_OK;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(internal_ecdsa_p384_verify_start(public_key, message_digest,
-                                                    signature));
-      return OTCRYPTO_OK;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-otcrypto_status_t otcrypto_ecdsa_verify_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_const_word32_buf_t signature,
-    hardened_bool_t *verification_result) {
-  if (elliptic_curve == NULL || verification_result == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Select the correct verification operation and finalize it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(p256_signature_length_check(signature.len));
-      ecdsa_p256_signature_t *sig_p256 =
-          (ecdsa_p256_signature_t *)signature.data;
-      return ecdsa_p256_verify_finalize(sig_p256, verification_result);
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(p384_signature_length_check(signature.len));
-      ecdsa_p384_signature_t *sig_p384 =
-          (ecdsa_p384_signature_t *)signature.data;
-      return ecdsa_p384_verify_finalize(sig_p384, verification_result);
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-otcrypto_status_t otcrypto_ecdh_keygen_async_start(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    const otcrypto_blinded_key_t *private_key) {
-  if (elliptic_curve == NULL || private_key == NULL ||
-      private_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the key mode.
-  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdh) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdh);
-
-  // Check that the entropy complex is initialized.
-  HARDENED_TRY(entropy_complex_check());
-
-  // Select the correct keygen operation and start it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-        HARDENED_TRY(sideload_key_seed(private_key));
-        return ecdh_p256_sideload_keypair_start();
-      } else if (launder32(private_key->config.hw_backed) ==
-                 kHardenedBoolFalse) {
-        return ecdh_p256_keypair_start();
-      }
-      return OTCRYPTO_BAD_ARGS;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-        HARDENED_TRY(sideload_key_seed(private_key));
-        return ecdh_p384_sideload_keypair_start();
-      } else if (launder32(private_key->config.hw_backed) ==
-                 kHardenedBoolFalse) {
-        HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-        return ecdh_p384_keypair_start();
-      }
-      return OTCRYPTO_BAD_ARGS;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-/**
- * Finalize an ECDH keypair generation operation for curve P-256.
- *
- * This function assumes that space is already allocated for all key material
- * and that the length parameters on the structs are set accordingly, in the
- * same way as for `otcrypto_ecdh_keygen_async_finalize`.
- *
- * @param[out] private_key Private key to populate.
- * @param[out] public_key Public key to populate.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p256_keygen_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check the lengths of caller-allocated buffers.
-  HARDENED_TRY(p256_private_key_length_check(private_key));
-  HARDENED_TRY(p256_public_key_length_check(public_key));
-  p256_point_t *pk = (p256_point_t *)public_key->key;
-
-  // Note: The `finalize` operations wipe DMEM after retrieving the keys, so if
-  // an error occurs after this point then the keys would be unrecoverable.
-  // The `finalize` call should be the last potentially error-causing line
-  // before returning to the caller.
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(ecdh_p256_sideload_keypair_finalize(pk));
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p256_masked_scalar_t *sk = (p256_masked_scalar_t *)private_key->keyblob;
-    HARDENED_TRY(ecdh_p256_keypair_finalize(sk, pk));
-    private_key->checksum = integrity_blinded_checksum(private_key);
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Prepare the public key.
-  public_key->checksum = integrity_unblinded_checksum(public_key);
-
-  // Clear the OTBN sideload slot (in case the seed was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-/**
- * Finalize an ECDH keypair generation operation for curve P-384.
- *
- * This function assumes that space is already allocated for all key material
- * and that the length parameters on the structs are set accordingly, in the
- * same way as for `otcrypto_ecdh_keygen_async_finalize`.
- *
- * @param[out] private_key Private key to populate.
- * @param[out] public_key Public key to populate.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p384_keygen_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check the lengths of caller-allocated buffers.
-  HARDENED_TRY(p384_private_key_length_check(private_key));
-  HARDENED_TRY(p384_public_key_length_check(public_key));
-  p384_point_t *pk = (p384_point_t *)public_key->key;
-
-  // Note: The `finalize` operations wipe DMEM after retrieving the keys, so if
-  // an error occurs after this point then the keys would be unrecoverable.
-  // The `finalize` call should be the last potentially error-causing line
-  // before returning to the caller.
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(ecdh_p384_sideload_keypair_finalize(pk));
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p384_masked_scalar_t *sk = (p384_masked_scalar_t *)private_key->keyblob;
-    HARDENED_TRY(ecdh_p384_keypair_finalize(sk, pk));
-    private_key->checksum = integrity_blinded_checksum(private_key);
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Prepare the public key.
-  public_key->checksum = integrity_unblinded_checksum(public_key);
-
-  // Clear the OTBN sideload slot (in case the seed was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-otcrypto_status_t otcrypto_ecdh_keygen_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // Check for any NULL pointers.
-  if (elliptic_curve == NULL || private_key == NULL || public_key == NULL ||
-      private_key->keyblob == NULL || public_key->key == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the key modes.
-  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdh ||
-      launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdh) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdh);
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdh);
-
-  // Select the correct keygen operation and finalize it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(internal_ecdh_p256_keygen_finalize(private_key, public_key));
-      break;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(internal_ecdh_p384_keygen_finalize(private_key, public_key));
-      break;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Clear the OTBN sideload slot (in case the key was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-/**
- * Start an ECDH shared key generation operation for curve P-256.
- *
- * @param private_key Private key for key exchange.
- * @param public_key Public key for key exchange.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p256_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key) {
-  HARDENED_TRY(p256_private_key_length_check(private_key));
-  HARDENED_TRY(p256_public_key_length_check(public_key));
-  p256_point_t *pk = (p256_point_t *)public_key->key;
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(sideload_key_seed(private_key));
-    return ecdh_p256_sideload_shared_key_start(pk);
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p256_masked_scalar_t *sk = (p256_masked_scalar_t *)private_key->keyblob;
-    return ecdh_p256_shared_key_start(sk, pk);
-  }
-
-  // Invalid value for `hw_backed`.
-  return OTCRYPTO_BAD_ARGS;
-}
-
-/**
- * Start an ECDH shared key generation operation for curve P-384.
- *
- * @param private_key Private key for key exchange.
- * @param public_key Public key for key exchange.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p384_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key) {
-  HARDENED_TRY(p384_private_key_length_check(private_key));
-  HARDENED_TRY(p384_public_key_length_check(public_key));
-  p384_point_t *pk = (p384_point_t *)public_key->key;
-
-  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
-    HARDENED_TRY(sideload_key_seed(private_key));
-    return ecdh_p384_sideload_shared_key_start(pk);
-  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
-    p384_masked_scalar_t *sk = (p384_masked_scalar_t *)private_key->keyblob;
-    return ecdh_p384_shared_key_start(sk, pk);
-  }
-
-  // Invalid value for `hw_backed`.
-  return OTCRYPTO_BAD_ARGS;
-}
-
-otcrypto_status_t otcrypto_ecdh_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_ecc_curve_t *elliptic_curve) {
-  if (private_key == NULL || public_key == NULL || elliptic_curve == NULL ||
-      public_key->key == NULL || private_key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the integrity of the keys.
-  if (launder32(integrity_blinded_key_check(private_key)) !=
-          kHardenedBoolTrue ||
-      launder32(integrity_unblinded_key_check(public_key)) !=
-          kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
-                    kHardenedBoolTrue);
-  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
-                    kHardenedBoolTrue);
-
-  // Check the key modes.
-  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdh ||
-      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdh) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdh);
-  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdh);
-
-  // Select the correct ECDH operation and start it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(internal_ecdh_p256_start(private_key, public_key));
-      return OTCRYPTO_OK;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(internal_ecdh_p384_start(private_key, public_key));
-      return OTCRYPTO_OK;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should never get here.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-/**
- * Finish an ECDH shared key generation operation for curve P-256.
- *
- * @param[out] shared_secret Resulting shared secret.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p256_finalize(
-    otcrypto_blinded_key_t *shared_secret) {
-  if (launder32(shared_secret->config.hw_backed) != kHardenedBoolFalse) {
-    // Shared keys cannot be sideloaded because they are software-generated.
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(shared_secret->config.hw_backed, kHardenedBoolFalse);
-
-  if (shared_secret->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(shared_secret->config.key_length) != kP256CoordBytes) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(shared_secret->config.key_length, kP256CoordBytes);
-
-  if (launder32(shared_secret->keyblob_length) !=
-      keyblob_num_words(shared_secret->config) * sizeof(uint32_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(
-      shared_secret->keyblob_length,
-      keyblob_num_words(shared_secret->config) * sizeof(uint32_t));
-
-  // Note: This operation wipes DMEM after retrieving the keys, so if an error
-  // occurs after this point then the keys would be unrecoverable. This should
-  // be the last potentially error-causing line before returning to the caller.
-  ecdh_p256_shared_key_t ss;
-  HARDENED_TRY(ecdh_p256_shared_key_finalize(&ss));
-
-  keyblob_from_shares(ss.share0, ss.share1, shared_secret->config,
-                      shared_secret->keyblob);
-
-  // Set the checksum.
-  shared_secret->checksum = integrity_blinded_checksum(shared_secret);
-
-  // Clear the OTBN sideload slot (in case the seed was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-/**
- * Finish an ECDH shared key generation operation for curve P-384.
- *
- * @param[out] shared_secret Resulting shared secret.
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-static status_t internal_ecdh_p384_finalize(
-    otcrypto_blinded_key_t *shared_secret) {
-  if (launder32(shared_secret->config.hw_backed) != kHardenedBoolFalse) {
-    // Shared keys cannot be sideloaded because they are software-generated.
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(shared_secret->config.hw_backed, kHardenedBoolFalse);
-
-  if (shared_secret->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(shared_secret->config.key_length) != kP384CoordBytes) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(shared_secret->config.key_length, kP384CoordBytes);
-
-  if (launder32(shared_secret->keyblob_length) !=
-      keyblob_num_words(shared_secret->config) * sizeof(uint32_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(
-      shared_secret->keyblob_length,
-      keyblob_num_words(shared_secret->config) * sizeof(uint32_t));
-
-  // Note: This operation wipes DMEM after retrieving the keys, so if an error
-  // occurs after this point then the keys would be unrecoverable. This should
-  // be the last potentially error-causing line before returning to the caller.
-  ecdh_p384_shared_key_t ss;
-  HARDENED_TRY(ecdh_p384_shared_key_finalize(&ss));
-
-  keyblob_from_shares(ss.share0, ss.share1, shared_secret->config,
-                      shared_secret->keyblob);
-
-  // Set the checksum.
-  shared_secret->checksum = integrity_blinded_checksum(shared_secret);
-
-  // Clear the OTBN sideload slot (in case the seed was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-otcrypto_status_t otcrypto_ecdh_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *shared_secret) {
-  if (shared_secret == NULL || elliptic_curve == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Select the correct ECDH operation and finalize it.
-  switch (launder32(elliptic_curve->curve_type)) {
-    case kOtcryptoEccCurveTypeNistP256:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP256);
-      HARDENED_TRY(internal_ecdh_p256_finalize(shared_secret));
-      break;
-    case kOtcryptoEccCurveTypeNistP384:
-      HARDENED_CHECK_EQ(elliptic_curve->curve_type,
-                        kOtcryptoEccCurveTypeNistP384);
-      HARDENED_TRY(internal_ecdh_p384_finalize(shared_secret));
-      break;
-    case kEccCurveTypeBrainpoolP256R1:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoEccCurveTypeCustom:
-      // TODO: Implement support for other curves.
-      return OTCRYPTO_NOT_IMPLEMENTED;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Clear the OTBN sideload slot (in case the key was sideloaded).
-  return keymgr_sideload_clear_otbn();
-}
-
-otcrypto_status_t otcrypto_ed25519_keygen_async_start(
-    const otcrypto_blinded_key_t *private_key) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_keygen_async_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_sign_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_sign_async_finalize(
-    otcrypto_word32_buf_t signature) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_verify_async_start(
-    const otcrypto_unblinded_key_t *public_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode,
-    otcrypto_const_word32_buf_t signature) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_ed25519_verify_async_finalize(
-    hardened_bool_t *verification_result) {
-  // TODO: Ed25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519_keygen_async_start(
-    const otcrypto_blinded_key_t *private_key) {
-  // TODO: X25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519_keygen_async_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
-  // TODO: X25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key) {
-  // TODO: X25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
-
-otcrypto_status_t otcrypto_x25519_async_finalize(
-    otcrypto_blinded_key_t *shared_secret) {
-  // TODO: X25519 is not yet implemented.
-  return OTCRYPTO_NOT_IMPLEMENTED;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/BUILD b/sw/device/lib/crypto/impl/ecc/BUILD
index 66e1bbc763f1c..384376c62afdf 100644
--- a/sw/device/lib/crypto/impl/ecc/BUILD
+++ b/sw/device/lib/crypto/impl/ecc/BUILD
@@ -4,135 +4,34 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 cc_library(
-    name = "ecdh_p256",
-    srcs = ["ecdh_p256.c"],
-    hdrs = ["ecdh_p256.h"],
+    name = "p256",
+    srcs = ["p256.c"],
+    hdrs = ["p256.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
-        ":p256_common",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p256_ecdh",
-    ],
-)
-
-cc_library(
-    name = "ecdsa_p256",
-    srcs = ["ecdsa_p256.c"],
-    hdrs = ["ecdsa_p256.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p256_common",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p256_ecdsa",
-    ],
-)
-
-cc_library(
-    name = "p256_common",
-    srcs = ["p256_common.c"],
-    hdrs = ["p256_common.h"],
-    deps = [
-        "//sw/device/lib/crypto/drivers:otbn",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl:status",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
 cc_library(
-    name = "ecdh_p384",
-    srcs = ["ecdh_p384.c"],
-    hdrs = ["ecdh_p384.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p384_common",
-        ":p384_curve_point_valid",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p384_ecdh",
-    ],
-)
-
-cc_library(
-    name = "ecdsa_p384",
-    hdrs = ["ecdsa_p384.h"],
+    name = "p384",
+    srcs = ["p384.c"],
+    hdrs = ["p384.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
-        ":ecdsa_p384_keygen",
-        ":ecdsa_p384_sign",
-        ":ecdsa_p384_verify",
-    ],
-)
-
-cc_library(
-    name = "ecdsa_p384_keygen",
-    srcs = ["ecdsa_p384_keygen.c"],
-    hdrs = ["ecdsa_p384_keygen.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p384_common",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p384_ecdsa_keygen",
-    ],
-)
-
-cc_library(
-    name = "ecdsa_p384_sign",
-    srcs = ["ecdsa_p384_sign.c"],
-    hdrs = ["ecdsa_p384_sign.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p384_common",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p384_ecdsa_sign",
-    ],
-)
-
-cc_library(
-    name = "ecdsa_p384_verify",
-    srcs = ["ecdsa_p384_verify.c"],
-    hdrs = ["ecdsa_p384_verify.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p384_common",
-        ":p384_curve_point_valid",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p384_ecdsa_verify",
-    ],
-)
-
-cc_library(
-    name = "p384_common",
-    srcs = ["p384_common.c"],
-    hdrs = ["p384_common.h"],
-    deps = [
-        "//sw/device/lib/crypto/drivers:otbn",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl:status",
-    ],
-)
-
-cc_library(
-    name = "p384_curve_point_valid",
-    srcs = ["p384_curve_point_valid.c"],
-    hdrs = ["p384_curve_point_valid.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":p384_common",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:hardened_memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:p384_curve_point_valid",
+        "//sw/otbn/crypto:run_p384",
     ],
 )
diff --git a/sw/device/lib/crypto/impl/ecc/ecdh_p256.c b/sw/device/lib/crypto/impl/ecc/ecdh_p256.c
deleted file mode 100644
index b8aca50575b28..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdh_p256.c
+++ /dev/null
@@ -1,179 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdh_p256.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '2', 'x')
-
-OTBN_DECLARE_APP_SYMBOLS(p256_ecdh);        // The OTBN ECDSH/P-256 app.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh, mode);  // ECDH application mode.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh, x);     // The public key x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh, y);     // The public key y-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh,
-                         d0);  // The private key scalar d (share 0).
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh,
-                         d1);             // The private key scalar d (share 1).
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdh, ok);  // Public key validity.
-
-static const otbn_app_t kOtbnAppEcdh = OTBN_APP_T_INIT(p256_ecdh);
-static const otbn_addr_t kOtbnVarEcdhMode = OTBN_ADDR_T_INIT(p256_ecdh, mode);
-static const otbn_addr_t kOtbnVarEcdhX = OTBN_ADDR_T_INIT(p256_ecdh, x);
-static const otbn_addr_t kOtbnVarEcdhY = OTBN_ADDR_T_INIT(p256_ecdh, y);
-static const otbn_addr_t kOtbnVarEcdhD0 = OTBN_ADDR_T_INIT(p256_ecdh, d0);
-static const otbn_addr_t kOtbnVarEcdhD1 = OTBN_ADDR_T_INIT(p256_ecdh, d1);
-static const otbn_addr_t kOtbnVarEcdhOk = OTBN_ADDR_T_INIT(p256_ecdh, ok);
-
-enum {
-  /*
-   * Mode is represented by a single word.
-   */
-  kOtbnEcdhModeWords = 1,
-  /*
-   * Mode to generate a new random keypair.
-   */
-  kOtbnEcdhModeKeypairRandom = 0x3f1,
-  /*
-   * Mode to generate a new shared key.
-   */
-  kOtbnEcdhModeSharedKey = 0x5ec,
-  /*
-   * Mode to generate a new sideloaded keypair.
-   */
-  kOtbnEcdhModeKeypairFromSeed = 0x29f,
-  /*
-   * Mode to generate a new sideloaded shared key.
-   */
-  kOtbnEcdhModeSharedKeyFromSeed = 0x74b,
-};
-
-status_t ecdh_p256_keypair_start(void) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into keygen.
-  uint32_t mode = kOtbnEcdhModeKeypairRandom;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p256_keypair_finalize(p256_masked_scalar_t *private_key,
-                                    p256_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the masked private key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarEcdhD0,
-                              private_key->share0));
-  HARDENED_TRY(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarEcdhD1,
-                              private_key->share1));
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p256_shared_key_start(const p256_masked_scalar_t *private_key,
-                                    const p256_point_t *public_key) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into shared-key generation.
-  uint32_t mode = kOtbnEcdhModeSharedKey;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Set the private key shares.
-  HARDENED_TRY(
-      p256_masked_scalar_write(private_key, kOtbnVarEcdhD0, kOtbnVarEcdhD1));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarEcdhX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarEcdhY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p256_shared_key_finalize(ecdh_p256_shared_key_t *shared_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the code indicating if the public key is valid.
-  uint32_t ok;
-  HARDENED_TRY(otbn_dmem_read(1, kOtbnVarEcdhOk, &ok));
-  if (launder32(ok) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
-
-  // Read the shares of the key from OTBN dmem (at vars x and y).
-  HARDENED_TRY(
-      otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhX, shared_key->share0));
-  HARDENED_TRY(
-      otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhY, shared_key->share1));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p256_sideload_keypair_start(void) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into sideloaded keygen.
-  uint32_t mode = kOtbnEcdhModeKeypairFromSeed;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p256_sideload_keypair_finalize(p256_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdhY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p256_sideload_shared_key_start(const p256_point_t *public_key) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into shared-key generation.
-  uint32_t mode = kOtbnEcdhModeSharedKeyFromSeed;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarEcdhX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarEcdhY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdh_p256.h b/sw/device/lib/crypto/impl/ecc/ecdh_p256.h
deleted file mode 100644
index 6062734b0d9ba..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdh_p256.h
+++ /dev/null
@@ -1,120 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P256_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P256_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * A type that holds a blinded ECDH shared secret key.
- *
- * The key is boolean-masked (XOR of the two shares).
- */
-typedef struct ecdh_p256_shared_key {
-  uint32_t share0[kP256CoordWords];
-  uint32_t share1[kP256CoordWords];
-} ecdh_p256_shared_key_t;
-
-/**
- * Start an async ECDH/P-256 keypair generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_keypair_start(void);
-
-/**
- * Finish an async ECDH/P-256 keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] private_key Generated private key.
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_keypair_finalize(p256_masked_scalar_t *private_key,
-                                    p256_point_t *public_key);
-
-/**
- * Start an async ECDH/P-256 shared key generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param private_key Private key (d).
- * @param public_key Public key (Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_shared_key_start(const p256_masked_scalar_t *private_key,
-                                    const p256_point_t *public_key);
-
-/**
- * Finish an async ECDH/P-256 shared key generation operation on OTBN.
- *
- * Blocks until OTBN is idle. May be used after either
- * `ecdh_p256_shared_key_start` or `ecdh_p256_sideload_shared_key_start`; the
- * operation is the same.
- *
- * @param[out] shared_key Shared secret key (x-coordinate of d*Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_shared_key_finalize(ecdh_p256_shared_key_t *shared_key);
-
-/**
- * Start an async ECDH/P-256 sideloaded keypair generation operation on OTBN.
- *
- * Generates the keypair from a key manager seed. The key manager should
- * already have sideloaded the key into OTBN before this operation is called.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_sideload_keypair_start(void);
-
-/**
- * Finish an async ECDH/P-256 sideloaded keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle. Returns only the public key.
- *
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_sideload_keypair_finalize(p256_point_t *public_key);
-
-/**
- * Start an async ECDH/P-256 shared key generation operation on OTBN.
- *
- * Uses a private key generated from a key manager seed. The key manager should
- * already have sideloaded the key into OTBN before this operation is called.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param public_key Public key (Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p256_sideload_shared_key_start(const p256_point_t *public_key);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P256_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdh_p384.c b/sw/device/lib/crypto/impl/ecc/ecdh_p384.c
deleted file mode 100644
index 1ce7ad5a7d04c..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdh_p384.c
+++ /dev/null
@@ -1,178 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdh_p384.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '3', 'x')
-
-OTBN_DECLARE_APP_SYMBOLS(p384_ecdh);        // The OTBN ECDSH/P-384 app.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdh, mode);  // ECDH application mode.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdh, x);     // The public key x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdh, y);     // The public key y-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdh,
-                         d0);  // The private key scalar d (share 0).
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdh,
-                         d1);  // The private key scalar d (share 1).
-
-static const otbn_app_t kOtbnAppEcdh = OTBN_APP_T_INIT(p384_ecdh);
-static const otbn_addr_t kOtbnVarEcdhMode = OTBN_ADDR_T_INIT(p384_ecdh, mode);
-static const otbn_addr_t kOtbnVarEcdhX = OTBN_ADDR_T_INIT(p384_ecdh, x);
-static const otbn_addr_t kOtbnVarEcdhY = OTBN_ADDR_T_INIT(p384_ecdh, y);
-static const otbn_addr_t kOtbnVarEcdhD0 = OTBN_ADDR_T_INIT(p384_ecdh, d0);
-static const otbn_addr_t kOtbnVarEcdhD1 = OTBN_ADDR_T_INIT(p384_ecdh, d1);
-
-enum {
-  /*
-   * Mode is represented by a single word.
-   */
-  kOtbnEcdhModeWords = 1,
-  /*
-   * Mode to generate a new random keypair.
-   */
-  kOtbnEcdhModeKeypairRandom = 0x3f1,
-  /*
-   * Mode to generate a new shared key.
-   */
-  kOtbnEcdhModeSharedKey = 0x5ec,
-  /*
-   * Mode to generate a new sideloaded keypair.
-   */
-  kOtbnEcdhModeKeypairFromSeed = 0x29f,
-  /*
-   * Mode to generate a new sideloaded shared key.
-   */
-  kOtbnEcdhModeSharedKeyFromSeed = 0x74b,
-};
-
-status_t ecdh_p384_keypair_start(void) {
-  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into keygen.
-  uint32_t mode = kOtbnEcdhModeKeypairRandom;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p384_keypair_finalize(p384_masked_scalar_t *private_key,
-                                    p384_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the masked private key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarEcdhD0,
-                              private_key->share0));
-  HARDENED_TRY(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarEcdhD1,
-                              private_key->share1));
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p384_shared_key_start(const p384_masked_scalar_t *private_key,
-                                    const p384_point_t *public_key) {
-  // Check if public key is valid
-  HARDENED_TRY(p384_curve_point_validate_start(public_key));
-  HARDENED_TRY(p384_curve_point_validate_finalize());
-
-  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into shared-key generation.
-  uint32_t mode = kOtbnEcdhModeSharedKey;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Set the private key shares.
-  HARDENED_TRY(
-      p384_masked_scalar_write(private_key, kOtbnVarEcdhD0, kOtbnVarEcdhD1));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->x, kOtbnVarEcdhX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->y, kOtbnVarEcdhY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p384_shared_key_finalize(ecdh_p384_shared_key_t *shared_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the shares of the key from OTBN dmem (at vars x and y).
-  HARDENED_TRY(
-      otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhX, shared_key->share0));
-  HARDENED_TRY(
-      otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhY, shared_key->share1));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p384_sideload_keypair_start(void) {
-  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into keygen.
-  uint32_t mode = kOtbnEcdhModeKeypairFromSeed;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdh_p384_sideload_keypair_finalize(p384_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdhY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdh_p384_sideload_shared_key_start(const p384_point_t *public_key) {
-  // Check if public key is valid
-  HARDENED_TRY(p384_curve_point_validate_start(public_key));
-  HARDENED_TRY(p384_curve_point_validate_finalize());
-
-  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdh));
-
-  // Set mode so start() will jump into shared-key generation.
-  uint32_t mode = kOtbnEcdhModeSharedKeyFromSeed;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdhModeWords, &mode, kOtbnVarEcdhMode));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->x, kOtbnVarEcdhX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->y, kOtbnVarEcdhY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdh_p384.h b/sw/device/lib/crypto/impl/ecc/ecdh_p384.h
deleted file mode 100644
index 61fb586b84692..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdh_p384.h
+++ /dev/null
@@ -1,120 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P384_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P384_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * A type that holds a blinded ECDH shared secret key.
- *
- * The key is boolean-masked (XOR of the two shares).
- */
-typedef struct ecdh_p384_shared_key {
-  uint32_t share0[kP384CoordWords];
-  uint32_t share1[kP384CoordWords];
-} ecdh_p384_shared_key_t;
-
-/**
- * Start an async ECDH/P-384 keypair generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_keypair_start(void);
-
-/**
- * Finish an async ECDH/P-384 keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] private_key Generated private key.
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_keypair_finalize(p384_masked_scalar_t *private_key,
-                                    p384_point_t *public_key);
-
-/**
- * Start an async ECDH/P-384 shared key generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param private_key Private key (d).
- * @param public_key Public key (Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_shared_key_start(const p384_masked_scalar_t *private_key,
-                                    const p384_point_t *public_key);
-
-/**
- * Finish an async ECDH/P-384 shared key generation operation on OTBN.
- *
- * Blocks until OTBN is idle. May be used after either
- * `ecdh_p384_shared_key_start` or `ecdh_p384_sideload_shared_key_start`; the
- * operation is the same.
- *
- * @param[out] shared_key Shared secret key (x-coordinate of d*Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_shared_key_finalize(ecdh_p384_shared_key_t *shared_key);
-
-/**
- * Start an async ECDH/P-384 sideloaded keypair generation operation on OTBN.
- *
- * Generates the keypair from a key manager seed. The key manager should
- * already have sideloaded the key into OTBN before this operation is called.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_sideload_keypair_start(void);
-
-/**
- * Finish an async ECDH/P-384 sideloaded keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle. Returns only the public key.
- *
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_sideload_keypair_finalize(p384_point_t *public_key);
-
-/**
- * Start an async ECDH/P-384 shared key generation operation on OTBN.
- *
- * Uses a private key generated from a key manager seed. The key manager should
- * already have sideloaded the key into OTBN before this operation is called.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param public_key Public key (Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdh_p384_sideload_shared_key_start(const p384_point_t *public_key);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDH_P384_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p256.c b/sw/device/lib/crypto/impl/ecc/ecdsa_p256.c
deleted file mode 100644
index 2a58e4d8d7841..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p256.c
+++ /dev/null
@@ -1,268 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p256.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '2', 's')
-
-OTBN_DECLARE_APP_SYMBOLS(p256_ecdsa);        // The OTBN ECDSA/P-256 app.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, mode);  // ECDSA mode (sign or verify).
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, msg);   // Message digest.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, r);     // The signature scalar R.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, s);     // The signature scalar S.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, x);     // The public key x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, y);     // The public key y-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa,
-                         d0);  // The private key scalar d (share 0).
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa,
-                         d1);  // The private key scalar d (share 1).
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, x_r);  // Verification result.
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, ok);   // Status code.
-
-static const otbn_app_t kOtbnAppEcdsa = OTBN_APP_T_INIT(p256_ecdsa);
-static const otbn_addr_t kOtbnVarEcdsaMode = OTBN_ADDR_T_INIT(p256_ecdsa, mode);
-static const otbn_addr_t kOtbnVarEcdsaMsg = OTBN_ADDR_T_INIT(p256_ecdsa, msg);
-static const otbn_addr_t kOtbnVarEcdsaR = OTBN_ADDR_T_INIT(p256_ecdsa, r);
-static const otbn_addr_t kOtbnVarEcdsaS = OTBN_ADDR_T_INIT(p256_ecdsa, s);
-static const otbn_addr_t kOtbnVarEcdsaX = OTBN_ADDR_T_INIT(p256_ecdsa, x);
-static const otbn_addr_t kOtbnVarEcdsaY = OTBN_ADDR_T_INIT(p256_ecdsa, y);
-static const otbn_addr_t kOtbnVarEcdsaD0 = OTBN_ADDR_T_INIT(p256_ecdsa, d0);
-static const otbn_addr_t kOtbnVarEcdsaD1 = OTBN_ADDR_T_INIT(p256_ecdsa, d1);
-static const otbn_addr_t kOtbnVarEcdsaXr = OTBN_ADDR_T_INIT(p256_ecdsa, x_r);
-static const otbn_addr_t kOtbnVarEcdsaOk = OTBN_ADDR_T_INIT(p256_ecdsa, ok);
-
-enum {
-  /*
-   * Mode is represented by a single word.
-   */
-  kOtbnEcdsaModeWords = 1,
-  /*
-   * Mode to generate a new random keypair.
-   *
-   * Value taken from `p256_ecdsa.s`.
-   */
-  kOtbnEcdsaModeKeygen = 0x3d4,
-  /*
-   * Mode to generate a signature.
-   *
-   * Value taken from `p256_ecdsa.s`.
-   */
-  kOtbnEcdsaModeSign = 0x15b,
-  /*
-   * Mode to verify a signature.
-   *
-   * Value taken from `p256_ecdsa.s`.
-   */
-  kOtbnEcdsaModeVerify = 0x727,
-  /*
-   * Mode to generate a sideloaded key.
-   *
-   * Value taken from `p256_ecdsa.s`.
-   */
-  kOtbnEcdsaModeSideloadKeygen = 0x5e8,
-  /*
-   * Mode to sign with a sideloaded key.
-   *
-   * Value taken from `p256_ecdsa.s`.
-   */
-  kOtbnEcdsaModeSideloadSign = 0x49e,
-};
-
-status_t ecdsa_p256_keygen_start(void) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsa));
-
-  // Set mode so start() will jump into keygen.
-  uint32_t mode = kOtbnEcdsaModeKeygen;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p256_sideload_keygen_start(void) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsa));
-
-  // Set mode so start() will jump into sideload-keygen.
-  uint32_t mode = kOtbnEcdsaModeSideloadKeygen;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p256_keygen_finalize(p256_masked_scalar_t *private_key,
-                                    p256_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the masked private key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarEcdsaD0,
-                              private_key->share0));
-  HARDENED_TRY(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarEcdsaD1,
-                              private_key->share1));
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdsaX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdsaY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdsa_p256_sideload_keygen_finalize(p256_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdsaX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP256CoordWords, kOtbnVarEcdsaY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Set the message digest for signature generation or verification.
- *
- * OTBN requires the digest in little-endian form, so this routine flips the
- * bytes.
- *
- * @param digest Digest to set (big-endian).
- * @return OK or error.
- */
-static status_t set_message_digest(const uint32_t digest[kP256ScalarWords]) {
-  // Set the message digest. We swap all the bytes so that OTBN can interpret
-  // the digest as a little-endian integer, which is a more natural fit for the
-  // architecture than the big-endian form requested by the specification (FIPS
-  // 186-5, section B.2.1).
-  uint32_t digest_little_endian[kP256ScalarWords];
-  size_t i = 0;
-  for (; launder32(i) < kP256ScalarWords; i++) {
-    digest_little_endian[i] =
-        __builtin_bswap32(digest[kP256ScalarWords - 1 - i]);
-  }
-  HARDENED_CHECK_EQ(i, kP256ScalarWords);
-  return otbn_dmem_write(kP256ScalarWords, digest_little_endian,
-                         kOtbnVarEcdsaMsg);
-}
-
-status_t ecdsa_p256_sign_start(const uint32_t digest[kP256ScalarWords],
-                               const p256_masked_scalar_t *private_key) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsa));
-
-  // Set mode so start() will jump into signing.
-  uint32_t mode = kOtbnEcdsaModeSign;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest));
-
-  // Set the private key shares.
-  HARDENED_TRY(
-      p256_masked_scalar_write(private_key, kOtbnVarEcdsaD0, kOtbnVarEcdsaD1));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p256_sideload_sign_start(
-    const uint32_t digest[kP256ScalarWords]) {
-  // Load the ECDSA/P-256 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsa));
-
-  // Set mode so start() will jump into sideloaded signing.
-  uint32_t mode = kOtbnEcdsaModeSideloadSign;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p256_sign_finalize(ecdsa_p256_signature_t *result) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read signature R out of OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256ScalarWords, kOtbnVarEcdsaR, result->r));
-
-  // Read signature S out of OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP256ScalarWords, kOtbnVarEcdsaS, result->s));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdsa_p256_verify_start(const ecdsa_p256_signature_t *signature,
-                                 const uint32_t digest[kP256ScalarWords],
-                                 const p256_point_t *public_key) {
-  // Load the ECDSA/P-256 app and set up data pointers
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsa));
-
-  // Set mode so start() will jump into verifying.
-  uint32_t mode = kOtbnEcdsaModeVerify;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest));
-
-  // Set the signature R.
-  HARDENED_TRY(otbn_dmem_write(kP256ScalarWords, signature->r, kOtbnVarEcdsaR));
-
-  // Set the signature S.
-  HARDENED_TRY(otbn_dmem_write(kP256ScalarWords, signature->s, kOtbnVarEcdsaS));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarEcdsaX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarEcdsaY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p256_verify_finalize(const ecdsa_p256_signature_t *signature,
-                                    hardened_bool_t *result) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the status code out of DMEM (false if basic checks on the validity of
-  // the signature and public key failed).
-  uint32_t ok;
-  HARDENED_TRY(otbn_dmem_read(1, kOtbnVarEcdsaOk, &ok));
-  if (launder32(ok) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
-
-  // Read x_r (recovered R) out of OTBN dmem.
-  uint32_t x_r[kP256ScalarWords];
-  HARDENED_TRY(otbn_dmem_read(kP256ScalarWords, kOtbnVarEcdsaXr, x_r));
-
-  *result = hardened_memeq(x_r, signature->r, kP256ScalarWords);
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p256.h b/sw/device/lib/crypto/impl/ecc/ecdsa_p256.h
deleted file mode 100644
index eb9a40dd94d18..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p256.h
+++ /dev/null
@@ -1,159 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P256_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P256_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * A type that holds an ECDSA/P-256 signature.
- *
- * The signature consists of two integers r and s, computed modulo n.
- */
-typedef struct ecdsa_p256_signature_t {
-  uint32_t r[kP256ScalarWords];
-  uint32_t s[kP256ScalarWords];
-} ecdsa_p256_signature_t;
-
-/**
- * Start an async ECDSA/P-256 keypair generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_keygen_start(void);
-
-/**
- * Start an async ECDSA/P-256 sideloaded keypair generation operation on OTBN.
- *
- * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
- * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_sideload_keygen_start(void);
-
-/**
- * Finish an async ECDSA/P-256 keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] private_key Generated private key.
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_keygen_finalize(p256_masked_scalar_t *private_key,
-                                    p256_point_t *public_key);
-
-/**
- * Start an async ECDSA/P-256 sideloaded keypair generation operation on OTBN.
- *
- * This routine will only read back the public key, instead of both public and
- * private as with `ecdsa_p256_keygen_finalize`. Blocks until OTBN is idle.
- *
- * @param[out] public_key Public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_sideload_keygen_finalize(p256_point_t *public_key);
-
-/**
- * Start an async ECDSA/P-256 signature generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param digest Digest of the message to sign.
- * @param private_key Secret key to sign the message with.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_sign_start(const uint32_t digest[kP256ScalarWords],
-                               const p256_masked_scalar_t *private_key);
-
-/**
- * Start an async ECDSA/P-256 signature generation operation on OTBN.
- *
- * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
- * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param digest Digest of the message to sign.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_sideload_sign_start(
-    const uint32_t digest[kP256ScalarWords]);
-
-/**
- * Finish an async ECDSA/P-256 signature generation operation on OTBN.
- *
- * See the documentation of `ecdsa_p256_sign` for details.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] result Buffer in which to store the generated signature.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_sign_finalize(ecdsa_p256_signature_t *result);
-
-/**
- * Start an async ECDSA/P-256 signature verification operation on OTBN.
- *
- * See the documentation of `ecdsa_p256_verify` for details.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param signature Signature to be verified.
- * @param digest Digest of the message to check the signature against.
- * @param public_key Key to check the signature against.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_verify_start(const ecdsa_p256_signature_t *signature,
-                                 const uint32_t digest[kP256ScalarWords],
-                                 const p256_point_t *public_key);
-
-/**
- * Finish an async ECDSA/P-256 signature verification operation on OTBN.
- *
- * See the documentation of `ecdsa_p256_verify` for details.
- *
- * Blocks until OTBN is idle.
- *
- * If the signature is valid, writes `kHardenedBoolTrue` to `result`;
- * otherwise, writes `kHardenedBoolFalse`.
- *
- * Note: the caller must check the `result` buffer in order to determine if a
- * signature passed verification. If a signature is invalid, but nothing goes
- * wrong during computation (e.g. hardware errors, failed preconditions), the
- * status will be OK but `result` will be `kHardenedBoolFalse`.
- *
- * @param signature Signature to be verified.
- * @param[out] result Output buffer (true if signature is valid, false
- * otherwise)
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p256_verify_finalize(const ecdsa_p256_signature_t *signature,
-                                    hardened_bool_t *result);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P256_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384.h b/sw/device/lib/crypto/impl/ecc/ecdsa_p384.h
deleted file mode 100644
index 2d0d560e10048..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384.h
+++ /dev/null
@@ -1,25 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_H_
-
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.h"
-
-/**
- * @file
- * @brief Unified header file that includes all P-384 ECDSA operations.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.c b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.c
deleted file mode 100644
index 46f98defb8468..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.c
+++ /dev/null
@@ -1,113 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '3', 'k')
-
-OTBN_DECLARE_APP_SYMBOLS(p384_ecdsa_keygen);  // The OTBN ECDSA/P-384 app.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_keygen,
-                         mode);  // ECDSA keygen application mode.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_keygen, d0);  // Private key first share.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_keygen, d1);  // Private key second share.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_keygen, x);   // x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_keygen, y);   // y-coordinate.
-
-static const otbn_app_t kOtbnAppEcdsaKeygen =
-    OTBN_APP_T_INIT(p384_ecdsa_keygen);
-static const otbn_addr_t kOtbnVarEcdsaMode =
-    OTBN_ADDR_T_INIT(p384_ecdsa_keygen, mode);
-static const otbn_addr_t kOtbnVarEcdsaX =
-    OTBN_ADDR_T_INIT(p384_ecdsa_keygen, x);
-static const otbn_addr_t kOtbnVarEcdsaY =
-    OTBN_ADDR_T_INIT(p384_ecdsa_keygen, y);
-static const otbn_addr_t kOtbnVarEcdsaD0 =
-    OTBN_ADDR_T_INIT(p384_ecdsa_keygen, d0);
-static const otbn_addr_t kOtbnVarEcdsaD1 =
-    OTBN_ADDR_T_INIT(p384_ecdsa_keygen, d1);
-
-enum {
-  /*
-   * Mode is represented by a single word.
-   */
-  kOtbnEcdsaModeWords = 1,
-  /*
-   * Mode to generate a new random keypair.
-   *
-   * Value taken from `p384_ecdsa_keygen.s`.
-   */
-  kOtbnEcdsaModeKeygen = 0x3d4,
-  /*
-   * Mode to generate a sideloaded key.
-   *
-   * Value taken from `p384_ecdsa_keygen.s`.
-   */
-  kOtbnEcdsaModeSideloadKeygen = 0x5e8,
-};
-
-status_t ecdsa_p384_keygen_start(void) {
-  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsaKeygen));
-
-  // Set mode so start() will jump into sideload-keygen.
-  uint32_t mode = kOtbnEcdsaModeKeygen;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p384_sideload_keygen_start(void) {
-  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsaKeygen));
-
-  // Set mode so start() will jump into sideload-keygen.
-  uint32_t mode = kOtbnEcdsaModeSideloadKeygen;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p384_keygen_finalize(p384_masked_scalar_t *private_key,
-                                    p384_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the masked private key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarEcdsaD0,
-                              private_key->share0));
-  HARDENED_TRY(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarEcdsaD1,
-                              private_key->share1));
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdsaX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdsaY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t ecdsa_p384_sideload_keygen_finalize(p384_point_t *public_key) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the public key from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdsaX, public_key->x));
-  HARDENED_TRY(otbn_dmem_read(kP384CoordWords, kOtbnVarEcdsaY, public_key->y));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.h b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.h
deleted file mode 100644
index 6b6f153590226..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_keygen.h
+++ /dev/null
@@ -1,70 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_KEYGEN_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_KEYGEN_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Start an async ECDSA/P-384 keypair generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_keygen_start(void);
-
-/**
- * Start an async ECDSA/P-384 sideloaded keypair generation operation on OTBN.
- *
- * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
- * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_sideload_keygen_start(void);
-
-/**
- * Finish an async ECDSA/P-384 keypair generation operation on OTBN.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] private_key Generated private key.
- * @param[out] public_key Generated public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_keygen_finalize(p384_masked_scalar_t *private_key,
-                                    p384_point_t *public_key);
-
-/**
- * Start an async ECDSA/P-384 sideloaded keypair generation operation on OTBN.
- *
- * This routine will only read back the public key, instead of both public and
- * private as with `ecdsa_p384_keygen_finalize`. Blocks until OTBN is idle.
- *
- * @param[out] public_key Public key.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_sideload_keygen_finalize(p384_point_t *public_key);
-
-#ifdef __cplusplus
-}
-"C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_KEYGEN_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.c b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.c
deleted file mode 100644
index 30247a6523104..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.c
+++ /dev/null
@@ -1,106 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '3', 's')
-
-OTBN_DECLARE_APP_SYMBOLS(p384_ecdsa_sign);  // The OTBN ECDSA/P-384 app.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign,
-                         mode);                  // ECDSA sign application mode.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign, d0);   // private key first share
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign, d1);   // private key second share
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign, msg);  // hash message to sign/verify
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign, r);    // r part of signature
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_sign, s);    // s part of signature
-
-static const otbn_app_t kOtbnAppEcdsaSign = OTBN_APP_T_INIT(p384_ecdsa_sign);
-static const otbn_addr_t kOtbnVarEcdsaMode =
-    OTBN_ADDR_T_INIT(p384_ecdsa_sign, mode);
-static const otbn_addr_t kOtbnVarEcdsaD0 =
-    OTBN_ADDR_T_INIT(p384_ecdsa_sign, d0);
-static const otbn_addr_t kOtbnVarEcdsaD1 =
-    OTBN_ADDR_T_INIT(p384_ecdsa_sign, d1);
-static const otbn_addr_t kOtbnVarEcdsaMsg =
-    OTBN_ADDR_T_INIT(p384_ecdsa_sign, msg);
-static const otbn_addr_t kOtbnVarEcdsaR = OTBN_ADDR_T_INIT(p384_ecdsa_sign, r);
-static const otbn_addr_t kOtbnVarEcdsaS = OTBN_ADDR_T_INIT(p384_ecdsa_sign, s);
-
-enum {
-  /*
-   * Mode is represented by a single word.
-   */
-  kOtbnEcdsaModeWords = 1,
-  /*
-   * Mode to generate a signature.
-   *
-   * Value taken from `p384_ecdsa.s`.
-   */
-  kOtbnEcdsaModeSign = 0x15b,
-  /*
-   * Mode to sign with a sideloaded key.
-   *
-   * Value taken from `p384_ecdsa.s`.
-   */
-  kOtbnEcdsaModeSideloadSign = 0x49e,
-};
-
-status_t ecdsa_p384_sign_start(const uint32_t digest[kP384ScalarWords],
-                               const p384_masked_scalar_t *private_key) {
-  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsaSign));
-
-  // Set mode so start() will jump into sideloaded signing.
-  uint32_t mode = kOtbnEcdsaModeSign;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest, kOtbnVarEcdsaMsg));
-
-  // Set the private key shares.
-  HARDENED_TRY(
-      p384_masked_scalar_write(private_key, kOtbnVarEcdsaD0, kOtbnVarEcdsaD1));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p384_sideload_sign_start(
-    const uint32_t digest[kP384ScalarWords]) {
-  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsaSign));
-
-  // Set mode so start() will jump into sideloaded signing.
-  uint32_t mode = kOtbnEcdsaModeSideloadSign;
-  HARDENED_TRY(otbn_dmem_write(kOtbnEcdsaModeWords, &mode, kOtbnVarEcdsaMode));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest, kOtbnVarEcdsaMsg));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p384_sign_finalize(ecdsa_p384_signature_t *result) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read signature R out of OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384ScalarWords, kOtbnVarEcdsaR, result->r));
-
-  // Read signature S out of OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(kP384ScalarWords, kOtbnVarEcdsaS, result->s));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.h b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.h
deleted file mode 100644
index dcd960e2e5a25..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_sign.h
+++ /dev/null
@@ -1,62 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_SIGN_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_SIGN_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Start an async ECDSA/P-384 signature generation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param digest Digest of the message to sign.
- * @param private_key Secret key to sign the message with.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_sign_start(const uint32_t digest[kP384ScalarWords],
-                               const p384_masked_scalar_t *private_key);
-
-/**
- * Start an async ECDSA/P-384 signature generation operation on OTBN.
- *
- * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
- * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param digest Digest of the message to sign.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_sideload_sign_start(
-    const uint32_t digest[kP384ScalarWords]);
-
-/**
- * Finish an async ECDSA/P-384 signature generation operation on OTBN.
- *
- * See the documentation of `ecdsa_p384_sign` for details.
- *
- * Blocks until OTBN is idle.
- *
- * @param[out] result Buffer in which to store the generated signature.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_sign_finalize(ecdsa_p384_signature_t *result);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_SIGN_H_
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.c b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.c
deleted file mode 100644
index 0bf9e6a966f52..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.c
+++ /dev/null
@@ -1,86 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '3', 'v')
-
-OTBN_DECLARE_APP_SYMBOLS(p384_ecdsa_verify);     // The OTBN ECDSA/P-384 app.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify, x);  // Public key x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify, y);  // Public key y-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify,
-                         x_r);  // result of verify (x1 coordinate)
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify,
-                         msg);                   // hash message to sign/verify
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify, r);  // r part of signature
-OTBN_DECLARE_SYMBOL_ADDR(p384_ecdsa_verify, s);  // s part of signature
-
-static const otbn_app_t kOtbnAppEcdsaVerify =
-    OTBN_APP_T_INIT(p384_ecdsa_verify);
-static const otbn_addr_t kOtbnVarEcdsaX =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, x);
-static const otbn_addr_t kOtbnVarEcdsaY =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, y);
-static const otbn_addr_t kOtbnVarEcdsaMsg =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, msg);
-static const otbn_addr_t kOtbnVarEcdsaR =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, r);
-static const otbn_addr_t kOtbnVarEcdsaS =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, s);
-static const otbn_addr_t kOtbnVarEcdsaRnd =
-    OTBN_ADDR_T_INIT(p384_ecdsa_verify, x_r);
-
-status_t ecdsa_p384_verify_start(const ecdsa_p384_signature_t *signature,
-                                 const uint32_t digest[kP384ScalarWords],
-                                 const p384_point_t *public_key) {
-  // Check if public key is valid
-  HARDENED_TRY(p384_curve_point_validate_start(public_key));
-  HARDENED_TRY(p384_curve_point_validate_finalize());
-
-  // Load the ECDSA/P-384 app
-  HARDENED_TRY(otbn_load_app(kOtbnAppEcdsaVerify));
-
-  // Set the message digest.
-  HARDENED_TRY(set_message_digest(digest, kOtbnVarEcdsaMsg));
-
-  // Set the signature R.
-  HARDENED_TRY(otbn_dmem_write(kP384ScalarWords, signature->r, kOtbnVarEcdsaR));
-
-  // Set the signature S.
-  HARDENED_TRY(otbn_dmem_write(kP384ScalarWords, signature->s, kOtbnVarEcdsaS));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->x, kOtbnVarEcdsaX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->y, kOtbnVarEcdsaY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t ecdsa_p384_verify_finalize(const ecdsa_p384_signature_t *signature,
-                                    hardened_bool_t *result) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read x_r (recovered R) out of OTBN dmem.
-  uint32_t x_r[kP384ScalarWords];
-  HARDENED_TRY(otbn_dmem_read(kP384ScalarWords, kOtbnVarEcdsaRnd, x_r));
-
-  *result = hardened_memeq(x_r, signature->r, kP384ScalarWords);
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.h b/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.h
deleted file mode 100644
index da35cd2259fc3..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/ecdsa_p384_verify.h
+++ /dev/null
@@ -1,65 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_VERIFY_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_VERIFY_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Start an async ECDSA/P-384 signature verification operation on OTBN.
- *
- * See the documentation of `ecdsa_p384_verify` for details.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param signature Signature to be verified.
- * @param digest Digest of the message to check the signature against.
- * @param public_key Key to check the signature against.
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_verify_start(const ecdsa_p384_signature_t *signature,
-                                 const uint32_t digest[kP384ScalarWords],
-                                 const p384_point_t *public_key);
-
-/**
- * Finish an async ECDSA/P-384 signature verification operation on OTBN.
- *
- * See the documentation of `ecdsa_p384_verify` for details.
- *
- * Blocks until OTBN is idle.
- *
- * If the signature is valid, writes `kHardenedBoolTrue` to `result`;
- * otherwise, writes `kHardenedBoolFalse`.
- *
- * Note: the caller must check the `result` buffer in order to determine if a
- * signature passed verification. If a signature is invalid, but nothing goes
- * wrong during computation (e.g. hardware errors, failed preconditions), the
- * status will be OK but `result` will be `kHardenedBoolFalse`.
- *
- * @param signature Signature to be verified.
- * @param[out] result Output buffer (true if signature is valid, false
- * otherwise)
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t ecdsa_p384_verify_finalize(const ecdsa_p384_signature_t *signature,
-                                    hardened_bool_t *result);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_ECDSA_P384_VERIFY_H_
diff --git a/sw/device/lib/crypto/impl/ecc/p256.c b/sw/device/lib/crypto/impl/ecc/p256.c
new file mode 100644
index 0000000000000..bc9089fa20b85
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc/p256.c
@@ -0,0 +1,369 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('p', '2', 'r')
+
+// Declare the OTBN app.
+OTBN_DECLARE_APP_SYMBOLS(run_p256);  // The OTBN P-256 app.
+static const otbn_app_t kOtbnAppP256 = OTBN_APP_T_INIT(run_p256);
+
+// Declare offsets for input and output buffers.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, mode);   // Mode of operation.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, msg);    // ECDSA message digest.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, r);      // ECDSA signature scalar R.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, s);      // ECDSA signature scalar S.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, x);      // Public key x-coordinate.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, y);      // Public key y-coordinate.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, d0_io);  // Private key scalar d (share 0).
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, d1_io);  // Private key scalar d (share 1).
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, x_r);    // ECDSA verification result.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, ok);     // Status code.
+
+static const otbn_addr_t kOtbnVarMode = OTBN_ADDR_T_INIT(run_p256, mode);
+static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(run_p256, msg);
+static const otbn_addr_t kOtbnVarR = OTBN_ADDR_T_INIT(run_p256, r);
+static const otbn_addr_t kOtbnVarS = OTBN_ADDR_T_INIT(run_p256, s);
+static const otbn_addr_t kOtbnVarX = OTBN_ADDR_T_INIT(run_p256, x);
+static const otbn_addr_t kOtbnVarY = OTBN_ADDR_T_INIT(run_p256, y);
+static const otbn_addr_t kOtbnVarD0 = OTBN_ADDR_T_INIT(run_p256, d0_io);
+static const otbn_addr_t kOtbnVarD1 = OTBN_ADDR_T_INIT(run_p256, d1_io);
+static const otbn_addr_t kOtbnVarXr = OTBN_ADDR_T_INIT(run_p256, x_r);
+static const otbn_addr_t kOtbnVarOk = OTBN_ADDR_T_INIT(run_p256, ok);
+
+// Declare mode constants.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_SIGN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_VERIFY);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_ECDH);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_SIDELOAD_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_SIDELOAD_SIGN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_SIDELOAD_ECDH);
+static const uint32_t kOtbnP256ModeKeygen =
+    OTBN_ADDR_T_INIT(run_p256, MODE_KEYGEN);
+static const uint32_t kOtbnP256ModeSign = OTBN_ADDR_T_INIT(run_p256, MODE_SIGN);
+static const uint32_t kOtbnP256ModeVerify =
+    OTBN_ADDR_T_INIT(run_p256, MODE_VERIFY);
+static const uint32_t kOtbnP256ModeEcdh = OTBN_ADDR_T_INIT(run_p256, MODE_ECDH);
+static const uint32_t kOtbnP256ModeSideloadKeygen =
+    OTBN_ADDR_T_INIT(run_p256, MODE_SIDELOAD_KEYGEN);
+static const uint32_t kOtbnP256ModeSideloadSign =
+    OTBN_ADDR_T_INIT(run_p256, MODE_SIDELOAD_SIGN);
+static const uint32_t kOtbnP256ModeSideloadEcdh =
+    OTBN_ADDR_T_INIT(run_p256, MODE_SIDELOAD_ECDH);
+
+enum {
+  /*
+   * Mode is represented by a single word.
+   */
+  kOtbnP256ModeWords = 1,
+  /**
+   * Number of extra padding words needed for masked scalar shares.
+   *
+   * Where W is the word size and S is the share size, the padding needed is:
+   *   (W - (S % W)) % W
+   *
+   * The extra outer "% W" ensures that the padding is 0 if (S % W) is 0.
+   */
+  kMaskedScalarPaddingWords =
+      (kOtbnWideWordNumWords -
+       (kP256MaskedScalarShareWords % kOtbnWideWordNumWords)) %
+      kOtbnWideWordNumWords,
+  /*
+   * The expected instruction counts for constant time functions.
+   */
+  kModeKeygenInsCnt = 567175,
+  kModeKeygenSideloadInsCnt = 567060,
+  kModeEcdhInsCnt = 574858,
+  kModeEcdhSideloadInsCnt = 574918,
+  kModeEcdsaSignInsCnt = 600349,
+  kModeEcdsaSignSideloadInsCnt = 600409,
+};
+
+static status_t p256_masked_scalar_write(const p256_masked_scalar_t *src,
+                                         const otbn_addr_t share0_addr,
+                                         const otbn_addr_t share1_addr) {
+  HARDENED_TRY(
+      otbn_dmem_write(kP256MaskedScalarShareWords, src->share0, share0_addr));
+  HARDENED_TRY(
+      otbn_dmem_write(kP256MaskedScalarShareWords, src->share1, share1_addr));
+
+  // Write trailing 0s so that OTBN's 256-bit read of the second share does not
+  // cause an error.
+  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
+                             share0_addr + kP256MaskedScalarShareBytes));
+  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
+                             share1_addr + kP256MaskedScalarShareBytes));
+
+  return OTCRYPTO_OK;
+}
+
+status_t p256_keygen_start(void) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into keygen.
+  uint32_t mode = kOtbnP256ModeKeygen;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_sideload_keygen_start(void) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into sideload-keygen.
+  uint32_t mode = kOtbnP256ModeSideloadKeygen;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_keygen_finalize(p256_masked_scalar_t *private_key,
+                              p256_point_t *public_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the masked private key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarD0,
+                                        private_key->share0));
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP256MaskedScalarShareWords, kOtbnVarD1,
+                                        private_key->share1));
+
+  // Read the public key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarX, public_key->x));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarY, public_key->y));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p256_sideload_keygen_finalize(p256_point_t *public_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the public key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarX, public_key->x));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarY, public_key->y));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Set the message digest for signature generation or verification.
+ *
+ * OTBN requires the digest in little-endian form, so this routine flips the
+ * bytes.
+ *
+ * @param digest Digest to set (big-endian).
+ * @return OK or error.
+ */
+static status_t set_message_digest(const uint32_t digest[kP256ScalarWords]) {
+  // Set the message digest. We swap all the bytes so that OTBN can interpret
+  // the digest as a little-endian integer, which is a more natural fit for the
+  // architecture than the big-endian form requested by the specification (FIPS
+  // 186-5, section B.2.1).
+  uint32_t digest_little_endian[kP256ScalarWords];
+  size_t i = 0;
+  for (; launder32(i) < kP256ScalarWords; i++) {
+    digest_little_endian[i] =
+        __builtin_bswap32(digest[kP256ScalarWords - 1 - i]);
+  }
+  HARDENED_CHECK_EQ(i, kP256ScalarWords);
+  return otbn_dmem_write(kP256ScalarWords, digest_little_endian, kOtbnVarMsg);
+}
+
+status_t p256_ecdsa_sign_start(const uint32_t digest[kP256ScalarWords],
+                               const p256_masked_scalar_t *private_key) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into signing.
+  uint32_t mode = kOtbnP256ModeSign;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest));
+
+  // Set the private key shares.
+  HARDENED_TRY(p256_masked_scalar_write(private_key, kOtbnVarD0, kOtbnVarD1));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_ecdsa_sideload_sign_start(
+    const uint32_t digest[kP256ScalarWords]) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into sideloaded signing.
+  uint32_t mode = kOtbnP256ModeSideloadSign;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_ecdsa_sign_finalize(p256_ecdsa_signature_t *result) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read signature R out of OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256ScalarWords, kOtbnVarR, result->r));
+
+  // Read signature S out of OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256ScalarWords, kOtbnVarS, result->s));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p256_ecdsa_verify_start(const p256_ecdsa_signature_t *signature,
+                                 const uint32_t digest[kP256ScalarWords],
+                                 const p256_point_t *public_key) {
+  // Load the P-256 app and set up data pointers
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into verifying.
+  uint32_t mode = kOtbnP256ModeVerify;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest));
+
+  // Set the signature R.
+  HARDENED_TRY(otbn_dmem_write(kP256ScalarWords, signature->r, kOtbnVarR));
+
+  // Set the signature S.
+  HARDENED_TRY(otbn_dmem_write(kP256ScalarWords, signature->s, kOtbnVarS));
+
+  // Set the public key x coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarX));
+
+  // Set the public key y coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarY));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_ecdsa_verify_finalize(const p256_ecdsa_signature_t *signature,
+                                    hardened_bool_t *result) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the status code out of DMEM (false if basic checks on the validity of
+  // the signature and public key failed).
+  uint32_t ok;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarOk, &ok));
+  if (launder32(ok) != kHardenedBoolTrue) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
+
+  // Read x_r (recovered R) out of OTBN dmem.
+  uint32_t x_r[kP256ScalarWords];
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP256ScalarWords, kOtbnVarXr, x_r));
+
+  *result = hardened_memeq(x_r, signature->r, kP256ScalarWords);
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p256_ecdh_start(const p256_masked_scalar_t *private_key,
+                         const p256_point_t *public_key) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into shared-key generation.
+  uint32_t mode = kOtbnP256ModeEcdh;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Set the private key shares.
+  HARDENED_TRY(p256_masked_scalar_write(private_key, kOtbnVarD0, kOtbnVarD1));
+
+  // Set the public key x coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarX));
+
+  // Set the public key y coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarY));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p256_ecdh_finalize(p256_ecdh_shared_key_t *shared_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the code indicating if the public key is valid.
+  uint32_t ok;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarOk, &ok));
+  if (launder32(ok) != kHardenedBoolTrue) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
+
+  // Read the shares of the key from OTBN dmem (at vars x and y).
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarX, shared_key->share0));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP256CoordWords, kOtbnVarY, shared_key->share1));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p256_sideload_ecdh_start(const p256_point_t *public_key) {
+  // Load the P-256 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP256));
+
+  // Set mode so start() will jump into shared-key generation.
+  uint32_t mode = kOtbnP256ModeSideloadEcdh;
+  HARDENED_TRY(otbn_dmem_write(kOtbnP256ModeWords, &mode, kOtbnVarMode));
+
+  // Set the public key x coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->x, kOtbnVarX));
+
+  // Set the public key y coordinate.
+  HARDENED_TRY(otbn_dmem_write(kP256CoordWords, public_key->y, kOtbnVarY));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
diff --git a/sw/device/lib/crypto/impl/ecc/p256.h b/sw/device/lib/crypto/impl/ecc/p256.h
new file mode 100644
index 0000000000000..b7cb3f56b44ca
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc/p256.h
@@ -0,0 +1,285 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+enum {
+  /**
+   * Length of a P-256 curve point coordinate in bits (modulo p).
+   */
+  kP256CoordBits = 256,
+  /**
+   * Length of a P-256 curve point coordinate in bytes.
+   */
+  kP256CoordBytes = kP256CoordBits / 8,
+  /**
+   * Length of a P-256 curve point coordinate in words.
+   */
+  kP256CoordWords = kP256CoordBytes / sizeof(uint32_t),
+  /**
+   * Length of an element in the P-256 scalar field (modulo the curve order n).
+   */
+  kP256ScalarBits = 256,
+  /**
+   * Length of a secret scalar share in bytes.
+   */
+  kP256ScalarBytes = kP256ScalarBits / 8,
+  /**
+   * Length of secret scalar share in words.
+   */
+  kP256ScalarWords = kP256ScalarBytes / sizeof(uint32_t),
+  /**
+   * Length of a masked secret scalar share.
+   *
+   * This implementation uses extra redundant bits for side-channel protection.
+   */
+  kP256MaskedScalarShareBits = kP256ScalarBits + 64,
+  /**
+   * Length of a masked secret scalar share in bytes.
+   */
+  kP256MaskedScalarShareBytes = kP256MaskedScalarShareBits / 8,
+  /**
+   * Length of masked secret scalar share in words.
+   */
+  kP256MaskedScalarShareWords = kP256MaskedScalarShareBytes / sizeof(uint32_t),
+};
+
+/**
+ * A type that holds a masked value from the P-256 scalar field.
+ *
+ * This struct is used to represent secret keys, which are integers modulo n.
+ * The key d is represented in two 320-bit shares, d0 and d1, such that d = (d0
+ * + d1) mod n. Mathematically, d0 and d1 could also be reduced modulo n, but
+ * the extra bits provide side-channel protection.
+ */
+typedef struct p256_masked_scalar {
+  /**
+   * First share of the secret scalar.
+   */
+  uint32_t share0[kP256MaskedScalarShareWords];
+  /**
+   * Second share of the secret scalar.
+   */
+  uint32_t share1[kP256MaskedScalarShareWords];
+} p256_masked_scalar_t;
+
+/**
+ * A type that holds a P-256 curve point.
+ */
+typedef struct p256_point {
+  /**
+   * Affine x-coordinate.
+   */
+  uint32_t x[kP256CoordWords];
+  /**
+   * Affine y-coordinate.
+   */
+  uint32_t y[kP256CoordWords];
+} p256_point_t;
+
+/**
+ * A type that holds an ECDSA/P-256 signature.
+ *
+ * The signature consists of two integers r and s, computed modulo n.
+ */
+typedef struct p256_ecdsa_signature_t {
+  uint32_t r[kP256ScalarWords];
+  uint32_t s[kP256ScalarWords];
+} p256_ecdsa_signature_t;
+
+/**
+ * A type that holds a blinded ECDH shared secret key.
+ *
+ * The key is boolean-masked (XOR of the two shares).
+ */
+typedef struct p256_ecdh_shared_key {
+  uint32_t share0[kP256CoordWords];
+  uint32_t share1[kP256CoordWords];
+} p256_ecdh_shared_key_t;
+
+/**
+ * Start an async P-256 keypair generation operation on OTBN.
+ *
+ * Appropriate for both ECDSA and ECDH; the key-generation process is the same.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_keygen_start(void);
+
+/**
+ * Finish an async P-256 keypair generation operation on OTBN.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * @param[out] private_key Generated private key.
+ * @param[out] public_key Generated public key.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_keygen_finalize(p256_masked_scalar_t *private_key,
+                              p256_point_t *public_key);
+
+/**
+ * Start an async P-256 sideloaded keypair generation operation on OTBN.
+ *
+ * Appropriate for both ECDSA and ECDH; the key-generation process is the same.
+ *
+ * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
+ * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_sideload_keygen_start(void);
+
+/**
+ * Finish an async P-256 sideloaded keypair generation operation on OTBN.
+ *
+ * This routine will only read back the public key, instead of both public and
+ * private as with `p256_ecdsa_keygen_finalize`. Blocks until OTBN is idle.
+ *
+ * @param[out] public_key Public key.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_sideload_keygen_finalize(p256_point_t *public_key);
+
+/**
+ * Start an async ECDSA/P-256 signature generation operation on OTBN.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param digest Digest of the message to sign.
+ * @param private_key Secret key to sign the message with.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdsa_sign_start(const uint32_t digest[kP256ScalarWords],
+                               const p256_masked_scalar_t *private_key);
+
+/**
+ * Start an async ECDSA/P-256 signature generation operation on OTBN.
+ *
+ * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
+ * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param digest Digest of the message to sign.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdsa_sideload_sign_start(
+    const uint32_t digest[kP256ScalarWords]);
+
+/**
+ * Finish an async ECDSA/P-256 signature generation operation on OTBN.
+ *
+ * See the documentation of `p256_ecdsa_sign` for details.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * @param[out] result Buffer in which to store the generated signature.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdsa_sign_finalize(p256_ecdsa_signature_t *result);
+
+/**
+ * Start an async ECDSA/P-256 signature verification operation on OTBN.
+ *
+ * See the documentation of `p256_ecdsa_verify` for details.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param signature Signature to be verified.
+ * @param digest Digest of the message to check the signature against.
+ * @param public_key Key to check the signature against.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdsa_verify_start(const p256_ecdsa_signature_t *signature,
+                                 const uint32_t digest[kP256ScalarWords],
+                                 const p256_point_t *public_key);
+
+/**
+ * Finish an async ECDSA/P-256 signature verification operation on OTBN.
+ *
+ * See the documentation of `p256_ecdsa_verify` for details.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * If the signature is valid, writes `kHardenedBoolTrue` to `result`;
+ * otherwise, writes `kHardenedBoolFalse`.
+ *
+ * Note: the caller must check the `result` buffer in order to determine if a
+ * signature passed verification. If a signature is invalid, but nothing goes
+ * wrong during computation (e.g. hardware errors, failed preconditions), the
+ * status will be OK but `result` will be `kHardenedBoolFalse`.
+ *
+ * @param signature Signature to be verified.
+ * @param[out] result Output buffer (true if signature is valid, false
+ * otherwise)
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdsa_verify_finalize(const p256_ecdsa_signature_t *signature,
+                                    hardened_bool_t *result);
+
+/**
+ * Start an async ECDH/P-256 shared key generation operation on OTBN.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param private_key Private key (d).
+ * @param public_key Public key (Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdh_start(const p256_masked_scalar_t *private_key,
+                         const p256_point_t *public_key);
+
+/**
+ * Finish an async ECDH/P-256 shared key generation operation on OTBN.
+ *
+ * Blocks until OTBN is idle. May be used after either `p256_ecdh_start` or
+ * `p256_sideload_ecdh_start`; the operation is the same.
+ *
+ * @param[out] shared_key Shared secret key (x-coordinate of d*Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_ecdh_finalize(p256_ecdh_shared_key_t *shared_key);
+
+/**
+ * Start an async ECDH/P-256 shared key generation operation on OTBN.
+ *
+ * Uses a private key generated from a key manager seed. The key manager should
+ * already have sideloaded the key into OTBN before this operation is called.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param public_key Public key (Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p256_sideload_ecdh_start(const p256_point_t *public_key);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_H_
diff --git a/sw/device/lib/crypto/impl/ecc/p256_common.c b/sw/device/lib/crypto/impl/ecc/p256_common.c
deleted file mode 100644
index 6df027431e536..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p256_common.c
+++ /dev/null
@@ -1,41 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
-
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-enum {
-  /**
-   * Number of extra padding words needed for masked scalar shares.
-   *
-   * Where W is the word size and S is the share size, the padding needed is:
-   *   (W - (S % W)) % W
-   *
-   * The extra outer "% W" ensures that the padding is 0 if (S % W) is 0.
-   */
-  kMaskedScalarPaddingWords =
-      (kOtbnWideWordNumWords -
-       (kP256MaskedScalarShareWords % kOtbnWideWordNumWords)) %
-      kOtbnWideWordNumWords,
-};
-
-status_t p256_masked_scalar_write(const p256_masked_scalar_t *src,
-                                  const otbn_addr_t share0_addr,
-                                  const otbn_addr_t share1_addr) {
-  HARDENED_TRY(
-      otbn_dmem_write(kP256MaskedScalarShareWords, src->share0, share0_addr));
-  HARDENED_TRY(
-      otbn_dmem_write(kP256MaskedScalarShareWords, src->share1, share1_addr));
-
-  // Write trailing 0s so that OTBN's 256-bit read of the second share does not
-  // cause an error.
-  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
-                             share0_addr + kP256MaskedScalarShareBytes));
-  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
-                             share1_addr + kP256MaskedScalarShareBytes));
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/p256_common.h b/sw/device/lib/crypto/impl/ecc/p256_common.h
deleted file mode 100644
index fa3bc278803f6..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p256_common.h
+++ /dev/null
@@ -1,113 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_COMMON_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_COMMON_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-enum {
-  /**
-   * Length of a P-256 curve point coordinate in bits (modulo p).
-   */
-  kP256CoordBits = 256,
-  /**
-   * Length of a P-256 curve point coordinate in bytes.
-   */
-  kP256CoordBytes = kP256CoordBits / 8,
-  /**
-   * Length of a P-256 curve point coordinate in words.
-   */
-  kP256CoordWords = kP256CoordBytes / sizeof(uint32_t),
-  /**
-   * Length of an element in the P-256 scalar field (modulo the curve order n).
-   */
-  kP256ScalarBits = 256,
-  /**
-   * Length of a secret scalar share in bytes.
-   */
-  kP256ScalarBytes = kP256ScalarBits / 8,
-  /**
-   * Length of secret scalar share in words.
-   */
-  kP256ScalarWords = kP256ScalarBytes / sizeof(uint32_t),
-  /**
-   * Length of a masked secret scalar share.
-   *
-   * This implementation uses extra redundant bits for side-channel protection.
-   */
-  kP256MaskedScalarShareBits = kP256ScalarBits + 64,
-  /**
-   * Length of a masked secret scalar share in bytes.
-   */
-  kP256MaskedScalarShareBytes = kP256MaskedScalarShareBits / 8,
-  /**
-   * Length of masked secret scalar share in words.
-   */
-  kP256MaskedScalarShareWords = kP256MaskedScalarShareBytes / sizeof(uint32_t),
-};
-
-/**
- * A type that holds a masked value from the P-256 scalar field.
- *
- * This struct is used to represent secret keys, which are integers modulo n.
- * The key d is represented in two 320-bit shares, d0 and d1, such that d = (d0
- * + d1) mod n. Mathematically, d0 and d1 could also be reduced modulo n, but
- * the extra bits provide side-channel protection.
- */
-typedef struct p256_masked_scalar {
-  /**
-   * First share of the secret scalar.
-   */
-  uint32_t share0[kP256MaskedScalarShareWords];
-  /**
-   * Second share of the secret scalar.
-   */
-  uint32_t share1[kP256MaskedScalarShareWords];
-} p256_masked_scalar_t;
-
-/**
- * A type that holds a P-256 curve point.
- */
-typedef struct p256_point {
-  /**
-   * Affine x-coordinate.
-   */
-  uint32_t x[kP256CoordWords];
-  /**
-   * Affine y-coordinate.
-   */
-  uint32_t y[kP256CoordWords];
-} p256_point_t;
-
-/**
- * Write a masked P-256 scalar to OTBN's data memory.
- *
- * OTBN actually requires that 512 bits be written, even though only 320 are
- * used; the others are ignored but must be set to avoid an error when OTBN
- * attempts to read uninitialized memory.
- *
- * @param src Masked scalar to write.
- * @param share0_addr DMEM address of the first share.
- * @param share1_addr DMEM address of the second share.
- * @return Result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-status_t p256_masked_scalar_write(const p256_masked_scalar_t *src,
-                                  const otbn_addr_t share0_addr,
-                                  const otbn_addr_t share1_addr);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P256_COMMON_H_
diff --git a/sw/device/lib/crypto/impl/ecc/p384.c b/sw/device/lib/crypto/impl/ecc/p384.c
new file mode 100644
index 0000000000000..5867eb3131511
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc/p384.c
@@ -0,0 +1,390 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/impl/ecc/p384.h"
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('p', '3', 'r')
+
+// Declare the OTBN app.
+OTBN_DECLARE_APP_SYMBOLS(run_p384);
+static const otbn_app_t kOtbnAppP384 = OTBN_APP_T_INIT(run_p384);
+
+// Declare offsets for input and output buffers.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, mode);   // Mode of operation.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, msg);    // ECDSA message digest.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, r);      // ECDSA signature scalar R.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, s);      // ECDSA signature scalar S.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, x);      // Public key x-coordinate.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, y);      // Public key y-coordinate.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, d0_io);  // Private key scalar d (share 0).
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, d1_io);  // Private key scalar d (share 1).
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, x_r);    // ECDSA verification result.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, ok);     // Status code.
+
+static const otbn_addr_t kOtbnVarMode = OTBN_ADDR_T_INIT(run_p384, mode);
+static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(run_p384, msg);
+static const otbn_addr_t kOtbnVarR = OTBN_ADDR_T_INIT(run_p384, r);
+static const otbn_addr_t kOtbnVarS = OTBN_ADDR_T_INIT(run_p384, s);
+static const otbn_addr_t kOtbnVarX = OTBN_ADDR_T_INIT(run_p384, x);
+static const otbn_addr_t kOtbnVarY = OTBN_ADDR_T_INIT(run_p384, y);
+static const otbn_addr_t kOtbnVarD0 = OTBN_ADDR_T_INIT(run_p384, d0_io);
+static const otbn_addr_t kOtbnVarD1 = OTBN_ADDR_T_INIT(run_p384, d1_io);
+static const otbn_addr_t kOtbnVarXr = OTBN_ADDR_T_INIT(run_p384, x_r);
+static const otbn_addr_t kOtbnVarOk = OTBN_ADDR_T_INIT(run_p384, ok);
+
+// Declare mode constants.
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_SIGN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_VERIFY);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_ECDH);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_SIDELOAD_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_SIDELOAD_SIGN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p384, MODE_SIDELOAD_ECDH);
+static const uint32_t kP384ModeKeygen = OTBN_ADDR_T_INIT(run_p384, MODE_KEYGEN);
+static const uint32_t kP384ModeSign = OTBN_ADDR_T_INIT(run_p384, MODE_SIGN);
+static const uint32_t kP384ModeVerify = OTBN_ADDR_T_INIT(run_p384, MODE_VERIFY);
+static const uint32_t kP384ModeEcdh = OTBN_ADDR_T_INIT(run_p384, MODE_ECDH);
+static const uint32_t kP384ModeSideloadKeygen =
+    OTBN_ADDR_T_INIT(run_p384, MODE_SIDELOAD_KEYGEN);
+static const uint32_t kP384ModeSideloadSign =
+    OTBN_ADDR_T_INIT(run_p384, MODE_SIDELOAD_SIGN);
+static const uint32_t kP384ModeSideloadEcdh =
+    OTBN_ADDR_T_INIT(run_p384, MODE_SIDELOAD_ECDH);
+
+enum {
+  /*
+   * Mode is represented by a single word.
+   */
+  kP384ModeWords = 1,
+  /**
+   * Number of extra padding words needed for masked scalar shares.
+   *
+   * Where W is the word size and S is the share size, the padding needed is:
+   *   (W - (S % W)) % W
+   *
+   * The extra outer "% W" ensures that the padding is 0 if (S % W) is 0.
+   */
+  kMaskedScalarPaddingWords =
+      (kOtbnWideWordNumWords -
+       (kP384MaskedScalarShareWords % kOtbnWideWordNumWords)) %
+      kOtbnWideWordNumWords,
+  /**
+   * Number of extra padding words needed for unmasked scalars.
+   */
+  kScalarPaddingWords =
+      (kOtbnWideWordNumWords - (kP384ScalarWords % kOtbnWideWordNumWords)) %
+      kOtbnWideWordNumWords,
+  /**
+   * Number of extra padding words needed for unmasked coordinates.
+   */
+  kCoordPaddingWords =
+      (kOtbnWideWordNumWords - (kP384CoordWords % kOtbnWideWordNumWords)) %
+      kOtbnWideWordNumWords,
+  /*
+   * The expected instruction counts for constant time functions.
+   */
+  kModeKeygenInsCnt = 1899010,
+  kModeKeygenSideloadInsCnt = 1898904,
+  kModeEcdhInsCnt = 1910613,
+  kModeEcdhSideloadInsCnt = 1910762,
+  kModeEcdsaSignInsCnt = 1546539,
+  kModeEcdsaSignSideloadInsCnt = 1546688,
+};
+
+static status_t p384_masked_scalar_write(const p384_masked_scalar_t *src,
+                                         const otbn_addr_t share0_addr,
+                                         const otbn_addr_t share1_addr) {
+  HARDENED_TRY(
+      otbn_dmem_write(kP384MaskedScalarShareWords, src->share0, share0_addr));
+  HARDENED_TRY(
+      otbn_dmem_write(kP384MaskedScalarShareWords, src->share1, share1_addr));
+
+  // Write trailing 0s so that OTBN's 384-bit read of the second share does not
+  // cause an error.
+  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
+                             share0_addr + kP384MaskedScalarShareBytes));
+  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
+                             share1_addr + kP384MaskedScalarShareBytes));
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Write a scalar-sized value into DMEM, with padding as needed.
+ *
+ * @param src Source value.
+ * @param addr DMEM address to write.
+ */
+static status_t p384_scalar_write(const uint32_t src[kP384ScalarWords],
+                                  const otbn_addr_t addr) {
+  HARDENED_TRY(otbn_dmem_write(kP384ScalarWords, src, addr));
+
+  return otbn_dmem_set(kScalarPaddingWords, 0, addr + kP384ScalarBytes);
+}
+
+/**
+ * Write a point into the x and y buffers, with padding as needed.
+ *
+ * @param p Point to write.
+ */
+static status_t set_public_key(const p384_point_t *p) {
+  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, p->x, kOtbnVarX));
+  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, p->y, kOtbnVarY));
+
+  HARDENED_TRY(
+      otbn_dmem_set(kCoordPaddingWords, 0, kOtbnVarX + kP384CoordBytes));
+  return otbn_dmem_set(kCoordPaddingWords, 0, kOtbnVarY + kP384CoordBytes);
+}
+
+static status_t set_message_digest(const uint32_t digest[kP384ScalarWords],
+                                   const otbn_addr_t dst) {
+  // Set the message digest. We swap all the bytes so that OTBN can interpret
+  // the digest as a little-endian integer, which is a more natural fit for the
+  // architecture than the big-endian form requested by the specification (FIPS
+  // 186-5, section B.2.1).
+  uint32_t digest_little_endian[kP384ScalarWords];
+  size_t i = 0;
+  for (; launder32(i) < kP384ScalarWords; i++) {
+    digest_little_endian[i] =
+        __builtin_bswap32(digest[kP384ScalarWords - 1 - i]);
+  }
+  HARDENED_CHECK_EQ(i, kP384ScalarWords);
+  return p384_scalar_write(digest_little_endian, dst);
+}
+
+status_t p384_keygen_start(void) {
+  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into keygen.
+  uint32_t mode = kP384ModeKeygen;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_keygen_finalize(p384_masked_scalar_t *private_key,
+                              p384_point_t *public_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the masked private key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarD0,
+                                        private_key->share0));
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP384MaskedScalarShareWords, kOtbnVarD1,
+                                        private_key->share1));
+
+  // Read the public key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarX, public_key->x));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarY, public_key->y));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p384_sideload_keygen_start(void) {
+  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into keygen.
+  uint32_t mode = kP384ModeSideloadKeygen;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_sideload_keygen_finalize(p384_point_t *public_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the public key from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarX, public_key->x));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarY, public_key->y));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p384_ecdsa_sign_start(const uint32_t digest[kP384ScalarWords],
+                               const p384_masked_scalar_t *private_key) {
+  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into sideloaded signing.
+  uint32_t mode = kP384ModeSign;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest, kOtbnVarMsg));
+
+  // Set the private key shares.
+  HARDENED_TRY(p384_masked_scalar_write(private_key, kOtbnVarD0, kOtbnVarD1));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_ecdsa_sideload_sign_start(
+    const uint32_t digest[kP384ScalarWords]) {
+  // Load the ECDSA/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into sideloaded signing.
+  uint32_t mode = kP384ModeSideloadSign;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest, kOtbnVarMsg));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_ecdsa_sign_finalize(p384_ecdsa_signature_t *result) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read signature R out of OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384ScalarWords, kOtbnVarR, result->r));
+
+  // Read signature S out of OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384ScalarWords, kOtbnVarS, result->s));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p384_ecdsa_verify_start(const p384_ecdsa_signature_t *signature,
+                                 const uint32_t digest[kP384ScalarWords],
+                                 const p384_point_t *public_key) {
+  // Load the ECDSA/P-384 app
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into ECDSA verify.
+  uint32_t mode = kP384ModeVerify;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Set the message digest.
+  HARDENED_TRY(set_message_digest(digest, kOtbnVarMsg));
+
+  // Set the signature R.
+  HARDENED_TRY(p384_scalar_write(signature->r, kOtbnVarR));
+
+  // Set the signature S.
+  HARDENED_TRY(p384_scalar_write(signature->s, kOtbnVarS));
+
+  // Set the public key.
+  HARDENED_TRY(set_public_key(public_key));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_ecdsa_verify_finalize(const p384_ecdsa_signature_t *signature,
+                                    hardened_bool_t *result) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the status code out of DMEM (false if basic checks on the validity of
+  // the signature and public key failed).
+  uint32_t ok;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarOk, &ok));
+  if (launder32(ok) != kHardenedBoolTrue) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
+
+  // Read x_r (recovered R) out of OTBN dmem.
+  uint32_t x_r[kP384ScalarWords];
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(kP384ScalarWords, kOtbnVarXr, x_r));
+
+  *result = hardened_memeq(x_r, signature->r, kP384ScalarWords);
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p384_ecdh_start(const p384_masked_scalar_t *private_key,
+                         const p384_point_t *public_key) {
+  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into shared-key generation.
+  uint32_t mode = kP384ModeEcdh;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Set the private key shares.
+  HARDENED_TRY(p384_masked_scalar_write(private_key, kOtbnVarD0, kOtbnVarD1));
+
+  // Set the public key.
+  HARDENED_TRY(set_public_key(public_key));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
+
+status_t p384_ecdh_finalize(p384_ecdh_shared_key_t *shared_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the status code out of DMEM (false if basic checks on the validity of
+  // the signature and public key failed).
+  uint32_t ok;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarOk, &ok));
+  if (launder32(ok) != kHardenedBoolTrue) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(ok, kHardenedBoolTrue);
+
+  // Read the shares of the key from OTBN dmem (at vars x and y).
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarX, shared_key->share0));
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kP384CoordWords, kOtbnVarY, shared_key->share1));
+
+  // Wipe DMEM.
+  HARDENED_TRY(otbn_dmem_sec_wipe());
+
+  return OTCRYPTO_OK;
+}
+
+status_t p384_sideload_ecdh_start(const p384_point_t *public_key) {
+  // Load the ECDH/P-384 app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppP384));
+
+  // Set mode so start() will jump into shared-key generation.
+  uint32_t mode = kP384ModeSideloadEcdh;
+  HARDENED_TRY(otbn_dmem_write(kP384ModeWords, &mode, kOtbnVarMode));
+
+  // Set the public key.
+  HARDENED_TRY(set_public_key(public_key));
+
+  // Start the OTBN routine.
+  return otbn_execute();
+}
diff --git a/sw/device/lib/crypto/impl/ecc/p384.h b/sw/device/lib/crypto/impl/ecc/p384.h
new file mode 100644
index 0000000000000..613d775e61bb6
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc/p384.h
@@ -0,0 +1,285 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+enum {
+  /**
+   * Length of a P-384 curve point coordinate in bits (modulo p).
+   */
+  kP384CoordBits = 384,
+  /**
+   * Length of a P-384 curve point coordinate in bytes.
+   */
+  kP384CoordBytes = kP384CoordBits / 8,
+  /**
+   * Length of a P-384 curve point coordinate in words.
+   */
+  kP384CoordWords = kP384CoordBytes / sizeof(uint32_t),
+  /**
+   * Length of an element in the P-384 scalar field (modulo the curve order n).
+   */
+  kP384ScalarBits = 384,
+  /**
+   * Length of a secret scalar share in bytes.
+   */
+  kP384ScalarBytes = kP384ScalarBits / 8,
+  /**
+   * Length of secret scalar share in words.
+   */
+  kP384ScalarWords = kP384ScalarBytes / sizeof(uint32_t),
+  /**
+   * Length of a masked secret scalar share.
+   *
+   * This implementation uses extra redundant bits for side-channel protection.
+   */
+  kP384MaskedScalarShareBits = kP384ScalarBits + 64,
+  /**
+   * Length of a masked secret scalar share in bytes.
+   */
+  kP384MaskedScalarShareBytes = kP384MaskedScalarShareBits / 8,
+  /**
+   * Length of masked secret scalar share in words.
+   */
+  kP384MaskedScalarShareWords = kP384MaskedScalarShareBytes / sizeof(uint32_t),
+};
+
+/**
+ * A type that holds a masked value from the P-384 scalar field.
+ *
+ * This struct is used to represent secret keys, which are integers modulo n.
+ * The key d is represented in two 320-bit shares, d0 and d1, such that d = (d0
+ * + d1) mod n. Mathematically, d0 and d1 could also be reduced modulo n, but
+ * the extra bits provide side-channel protection.
+ */
+typedef struct p384_masked_scalar {
+  /**
+   * First share of the secret scalar.
+   */
+  uint32_t share0[kP384MaskedScalarShareWords];
+  /**
+   * Second share of the secret scalar.
+   */
+  uint32_t share1[kP384MaskedScalarShareWords];
+} p384_masked_scalar_t;
+
+/**
+ * A type that holds a P-384 curve point.
+ */
+typedef struct p384_point {
+  /**
+   * Affine x-coordinate.
+   */
+  uint32_t x[kP384CoordWords];
+  /**
+   * Affine y-coordinate.
+   */
+  uint32_t y[kP384CoordWords];
+} p384_point_t;
+
+/**
+ * A type that holds an ECDSA/P-384 signature.
+ *
+ * The signature consists of two integers r and s, computed modulo n.
+ */
+typedef struct p384_ecdsa_signature_t {
+  uint32_t r[kP384ScalarWords];
+  uint32_t s[kP384ScalarWords];
+} p384_ecdsa_signature_t;
+
+/**
+ * A type that holds a blinded ECDH shared secret key.
+ *
+ * The key is boolean-masked (XOR of the two shares).
+ */
+typedef struct p384_ecdh_shared_key {
+  uint32_t share0[kP384CoordWords];
+  uint32_t share1[kP384CoordWords];
+} p384_ecdh_shared_key_t;
+
+/**
+ * Start an async P-384 keypair generation operation on OTBN.
+ *
+ * Appropriate for both ECDSA and ECDH; the key-generation process is the same.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_keygen_start(void);
+
+/**
+ * Finish an async P-384 keypair generation operation on OTBN.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * @param[out] private_key Generated private key.
+ * @param[out] public_key Generated public key.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_keygen_finalize(p384_masked_scalar_t *private_key,
+                              p384_point_t *public_key);
+
+/**
+ * Start an async P-384 sideloaded keypair generation operation on OTBN.
+ *
+ * Appropriate for both ECDSA and ECDH; the key-generation process is the same.
+ *
+ * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
+ * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_sideload_keygen_start(void);
+
+/**
+ * Finish an async P-384 sideloaded keypair generation operation on OTBN.
+ *
+ * This routine will only read back the public key, instead of both public and
+ * private as with `p384_ecdsa_keygen_finalize`. Blocks until OTBN is idle.
+ *
+ * @param[out] public_key Public key.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_sideload_keygen_finalize(p384_point_t *public_key);
+
+/**
+ * Start an async ECDSA/P-384 signature generation operation on OTBN.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param digest Digest of the message to sign.
+ * @param private_key Secret key to sign the message with.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdsa_sign_start(const uint32_t digest[kP384ScalarWords],
+                               const p384_masked_scalar_t *private_key);
+
+/**
+ * Start an async ECDSA/P-384 signature generation operation on OTBN.
+ *
+ * Expects a sideloaded key from keymgr to be already loaded on OTBN. Returns
+ * an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param digest Digest of the message to sign.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdsa_sideload_sign_start(
+    const uint32_t digest[kP384ScalarWords]);
+
+/**
+ * Finish an async ECDSA/P-384 signature generation operation on OTBN.
+ *
+ * See the documentation of `p384_ecdsa_sign` for details.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * @param[out] result Buffer in which to store the generated signature.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdsa_sign_finalize(p384_ecdsa_signature_t *result);
+
+/**
+ * Start an async ECDSA/P-384 signature verification operation on OTBN.
+ *
+ * See the documentation of `p384_ecdsa_verify` for details.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param signature Signature to be verified.
+ * @param digest Digest of the message to check the signature against.
+ * @param public_key Key to check the signature against.
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdsa_verify_start(const p384_ecdsa_signature_t *signature,
+                                 const uint32_t digest[kP384ScalarWords],
+                                 const p384_point_t *public_key);
+
+/**
+ * Finish an async ECDSA/P-384 signature verification operation on OTBN.
+ *
+ * See the documentation of `p384_ecdsa_verify` for details.
+ *
+ * Blocks until OTBN is idle.
+ *
+ * If the signature is valid, writes `kHardenedBoolTrue` to `result`;
+ * otherwise, writes `kHardenedBoolFalse`.
+ *
+ * Note: the caller must check the `result` buffer in order to determine if a
+ * signature passed verification. If a signature is invalid, but nothing goes
+ * wrong during computation (e.g. hardware errors, failed preconditions), the
+ * status will be OK but `result` will be `kHardenedBoolFalse`.
+ *
+ * @param signature Signature to be verified.
+ * @param[out] result Output buffer (true if signature is valid, false
+ * otherwise)
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdsa_verify_finalize(const p384_ecdsa_signature_t *signature,
+                                    hardened_bool_t *result);
+
+/**
+ * Start an async ECDH/P-384 shared key generation operation on OTBN.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param private_key Private key (d).
+ * @param public_key Public key (Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdh_start(const p384_masked_scalar_t *private_key,
+                         const p384_point_t *public_key);
+
+/**
+ * Finish an async ECDH/P-384 shared key generation operation on OTBN.
+ *
+ * Blocks until OTBN is idle. May be used after either `p384_ecdh_start` or
+ * `p384_sideload_ecdh_start`; the operation is the same.
+ *
+ * @param[out] shared_key Shared secret key (x-coordinate of d*Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_ecdh_finalize(p384_ecdh_shared_key_t *shared_key);
+
+/**
+ * Start an async ECDH/P-384 shared key generation operation on OTBN.
+ *
+ * Uses a private key generated from a key manager seed. The key manager should
+ * already have sideloaded the key into OTBN before this operation is called.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param public_key Public key (Q).
+ * @return Result of the operation (OK or error).
+ */
+OT_WARN_UNUSED_RESULT
+status_t p384_sideload_ecdh_start(const p384_point_t *public_key);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_H_
diff --git a/sw/device/lib/crypto/impl/ecc/p384_common.c b/sw/device/lib/crypto/impl/ecc/p384_common.c
deleted file mode 100644
index 95983910ed936..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p384_common.c
+++ /dev/null
@@ -1,58 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-enum {
-  /**
-   * Number of extra padding words needed for masked scalar shares.
-   *
-   * Where W is the word size and S is the share size, the padding needed is:
-   *   (W - (S % W)) % W
-   *
-   * The extra outer "% W" ensures that the padding is 0 if (S % W) is 0.
-   */
-  kMaskedScalarPaddingWords =
-      (kOtbnWideWordNumWords -
-       (kP384MaskedScalarShareWords % kOtbnWideWordNumWords)) %
-      kOtbnWideWordNumWords,
-};
-
-status_t p384_masked_scalar_write(const p384_masked_scalar_t *src,
-                                  const otbn_addr_t share0_addr,
-                                  const otbn_addr_t share1_addr) {
-  HARDENED_TRY(
-      otbn_dmem_write(kP384MaskedScalarShareWords, src->share0, share0_addr));
-  HARDENED_TRY(
-      otbn_dmem_write(kP384MaskedScalarShareWords, src->share1, share1_addr));
-
-  // Write trailing 0s so that OTBN's 384-bit read of the second share does not
-  // cause an error.
-  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
-                             share0_addr + kP384MaskedScalarShareBytes));
-  HARDENED_TRY(otbn_dmem_set(kMaskedScalarPaddingWords, 0,
-                             share1_addr + kP384MaskedScalarShareBytes));
-
-  return OTCRYPTO_OK;
-}
-
-status_t set_message_digest(const uint32_t digest[kP384ScalarWords],
-                            const otbn_addr_t kOtbnVarEcdsaMsg) {
-  // Set the message digest. We swap all the bytes so that OTBN can interpret
-  // the digest as a little-endian integer, which is a more natural fit for the
-  // architecture than the big-endian form requested by the specification (FIPS
-  // 186-5, section B.2.1).
-  uint32_t digest_little_endian[kP384ScalarWords];
-  size_t i = 0;
-  for (; launder32(i) < kP384ScalarWords; i++) {
-    digest_little_endian[i] =
-        __builtin_bswap32(digest[kP384ScalarWords - 1 - i]);
-  }
-  HARDENED_CHECK_EQ(i, kP384ScalarWords);
-  return otbn_dmem_write(kP384ScalarWords, digest_little_endian,
-                         kOtbnVarEcdsaMsg);
-}
diff --git a/sw/device/lib/crypto/impl/ecc/p384_common.h b/sw/device/lib/crypto/impl/ecc/p384_common.h
deleted file mode 100644
index d8244767839df..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p384_common.h
+++ /dev/null
@@ -1,136 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_COMMON_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_COMMON_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-enum {
-  /**
-   * Length of a P-384 curve point coordinate in bits (modulo p).
-   */
-  kP384CoordBits = 384,
-  /**
-   * Length of a P-384 curve point coordinate in bytes.
-   */
-  kP384CoordBytes = kP384CoordBits / 8,
-  /**
-   * Length of a P-384 curve point coordinate in words.
-   */
-  kP384CoordWords = kP384CoordBytes / sizeof(uint32_t),
-  /**
-   * Length of an element in the P-384 scalar field (modulo the curve order n).
-   */
-  kP384ScalarBits = 384,
-  /**
-   * Length of a secret scalar share in bytes.
-   */
-  kP384ScalarBytes = kP384ScalarBits / 8,
-  /**
-   * Length of secret scalar share in words.
-   */
-  kP384ScalarWords = kP384ScalarBytes / sizeof(uint32_t),
-  /**
-   * Length of a masked secret scalar share.
-   *
-   * This implementation uses extra redundant bits for side-channel protection.
-   */
-  kP384MaskedScalarShareBits = kP384ScalarBits + 64,
-  /**
-   * Length of a masked secret scalar share in bytes.
-   */
-  kP384MaskedScalarShareBytes = kP384MaskedScalarShareBits / 8,
-  /**
-   * Length of masked secret scalar share in words.
-   */
-  kP384MaskedScalarShareWords = kP384MaskedScalarShareBytes / sizeof(uint32_t),
-};
-
-/**
- * A type that holds a masked value from the P-384 scalar field.
- *
- * This struct is used to represent secret keys, which are integers modulo n.
- * The key d is represented in two 320-bit shares, d0 and d1, such that d = (d0
- * + d1) mod n. Mathematically, d0 and d1 could also be reduced modulo n, but
- * the extra bits provide side-channel protection.
- */
-typedef struct p384_masked_scalar {
-  /**
-   * First share of the secret scalar.
-   */
-  uint32_t share0[kP384MaskedScalarShareWords];
-  /**
-   * Second share of the secret scalar.
-   */
-  uint32_t share1[kP384MaskedScalarShareWords];
-} p384_masked_scalar_t;
-
-/**
- * A type that holds a P-384 curve point.
- */
-typedef struct p384_point {
-  /**
-   * Affine x-coordinate.
-   */
-  uint32_t x[kP384CoordWords];
-  /**
-   * Affine y-coordinate.
-   */
-  uint32_t y[kP384CoordWords];
-} p384_point_t;
-
-/**
- * A type that holds an ECDSA/P-384 signature.
- *
- * The signature consists of two integers r and s, computed modulo n.
- */
-typedef struct ecdsa_p384_signature_t {
-  uint32_t r[kP384ScalarWords];
-  uint32_t s[kP384ScalarWords];
-} ecdsa_p384_signature_t;
-
-/**
- * Write a masked P-384 scalar to OTBN's data memory.
- *
- * OTBN actually requires that 512 bits be written, even though only 320 are
- * used; the others are ignored but must be set to avoid an error when OTBN
- * attempts to read uninitialized memory.
- *
- * @param src Masked scalar to write.
- * @param share0_addr DMEM address of the first share.
- * @param share1_addr DMEM address of the second share.
- * @return Result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-status_t p384_masked_scalar_write(const p384_masked_scalar_t *src,
-                                  const otbn_addr_t share0_addr,
-                                  const otbn_addr_t share1_addr);
-
-/**
- * Set the message digest for signature generation or verification.
- *
- * OTBN requires the digest in little-endian form, so this routine flips the
- * bytes.
- *
- * @param digest Digest to set (big-endian).
- * @return OK or error.
- */
-OT_WARN_UNUSED_RESULT
-status_t set_message_digest(const uint32_t digest[kP384ScalarWords],
-                            const otbn_addr_t kOtbnVarEcdsaMsg);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_COMMON_H_
diff --git a/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.c b/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.c
deleted file mode 100644
index c151f9497a855..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.c
+++ /dev/null
@@ -1,51 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('p', '3', 'c')
-
-OTBN_DECLARE_APP_SYMBOLS(
-    p384_curve_point_valid);  // The OTBN Curve Point Valid Check app.
-OTBN_DECLARE_SYMBOL_ADDR(p384_curve_point_valid,
-                         x);  // The public key x-coordinate.
-OTBN_DECLARE_SYMBOL_ADDR(p384_curve_point_valid,
-                         y);  // The public key y-coordinate.
-
-static const otbn_app_t kOtbnAppCpv = OTBN_APP_T_INIT(p384_curve_point_valid);
-static const otbn_addr_t kOtbnVarCpvX =
-    OTBN_ADDR_T_INIT(p384_curve_point_valid, x);
-static const otbn_addr_t kOtbnVarCpvY =
-    OTBN_ADDR_T_INIT(p384_curve_point_valid, y);
-
-status_t p384_curve_point_validate_start(const p384_point_t *public_key) {
-  // Load the P-384 Curve Point Valid app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppCpv));
-
-  // Set the public key x coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->x, kOtbnVarCpvX));
-
-  // Set the public key y coordinate.
-  HARDENED_TRY(otbn_dmem_write(kP384CoordWords, public_key->y, kOtbnVarCpvY));
-
-  // Start the OTBN routine.
-  return otbn_execute();
-}
-
-status_t p384_curve_point_validate_finalize(void) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h b/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h
deleted file mode 100644
index 1492314b64b1f..0000000000000
--- a/sw/device/lib/crypto/impl/ecc/p384_curve_point_valid.h
+++ /dev/null
@@ -1,45 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_CURVE_POINT_VALID_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_CURVE_POINT_VALID_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/p384_common.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Start a P-384 public key (curve point) validation operation on OTBN.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- * Returns an `ILLEGAL_INSN` error if public key (curve point) is invalid.
- *
- * @param public_key Public key (Q).
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t p384_curve_point_validate_start(const p384_point_t *public_key);
-
-/**
- * Finish a P-384 public key (curve point) validation operation on OTBN.
- *
- * Blocks until OTBN is idle. To be used after `p384_curve_point_validate`.
- *
- * @return Result of the operation (OK or error).
- */
-OT_WARN_UNUSED_RESULT
-status_t p384_curve_point_validate_finalize(void);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_ECC_P384_CURVE_POINT_VALID_H_
diff --git a/sw/device/lib/crypto/impl/ecc_p256.c b/sw/device/lib/crypto/impl/ecc_p256.c
new file mode 100644
index 0000000000000..5fe4fd8cf4bb4
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc_p256.c
@@ -0,0 +1,567 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/hmac.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('p', '2', '5')
+
+otcrypto_status_t otcrypto_ecdsa_p256_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  HARDENED_TRY(otcrypto_ecdsa_p256_keygen_async_start(private_key));
+  return otcrypto_ecdsa_p256_keygen_async_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_sign(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature) {
+  HARDENED_TRY(
+      otcrypto_ecdsa_p256_sign_async_start(private_key, message_digest));
+  return otcrypto_ecdsa_p256_sign_async_finalize(signature);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result) {
+  HARDENED_TRY(otcrypto_ecdsa_p256_verify_async_start(
+      public_key, message_digest, signature));
+  return otcrypto_ecdsa_p256_verify_async_finalize(signature,
+                                                   verification_result);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_sign_verify(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature) {
+  // Signature generation.
+  HARDENED_TRY(
+      otcrypto_ecdsa_p256_sign(private_key, message_digest, signature));
+
+  // Verify signature before releasing it.
+  otcrypto_const_word32_buf_t signature_check = {
+      .data = signature.data,
+      .len = signature.len,
+  };
+  hardened_bool_t verification_result = kHardenedBoolFalse;
+  HARDENED_TRY(otcrypto_ecdsa_p256_verify(
+      public_key, message_digest, signature_check, &verification_result));
+
+  // Trap if signature verification failed.
+  HARDENED_CHECK_EQ(verification_result, kHardenedBoolTrue);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdh_p256_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  HARDENED_TRY(otcrypto_ecdh_p256_keygen_async_start(private_key));
+  return otcrypto_ecdh_p256_keygen_async_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p256(const otcrypto_blinded_key_t *private_key,
+                                     const otcrypto_unblinded_key_t *public_key,
+                                     otcrypto_blinded_key_t *shared_secret) {
+  HARDENED_TRY(otcrypto_ecdh_p256_async_start(private_key, public_key));
+  return otcrypto_ecdh_p256_async_finalize(shared_secret);
+}
+
+/**
+ * Calls P-256 key generation.
+ *
+ * Can be used for both ECDSA and ECDH. If the key is hardware-backed, loads
+ * the data from key manager and calls the sideloaded key generation routine.
+ *
+ * @param private_key Sideloaded key handle.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t internal_p256_keygen_start(
+    const otcrypto_blinded_key_t *private_key) {
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    return p256_sideload_keygen_start();
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    return p256_keygen_start();
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key == NULL || private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key mode.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP256);
+
+  return internal_p256_keygen_start(private_key);
+}
+
+/**
+ * Check the lengths of private keys for curve P-256.
+ *
+ * Checks the length of caller-allocated buffers for a P-256 private key. This
+ * function may be used for both ECDSA and ECDH keys, since the key structure
+ * is the same.
+ *
+ * If this check passes and `hw_backed` is false, it is safe to interpret
+ * `private_key->keyblob` as a `p256_masked_scalar_t *`.
+ *
+ * @param private_key Private key struct to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p256_private_key_length_check(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    // Skip the length check in this case; if the salt is the wrong length, the
+    // keyblob library will catch it before we sideload the key.
+    return OTCRYPTO_OK;
+  }
+  HARDENED_CHECK_NE(private_key->config.hw_backed, kHardenedBoolTrue);
+
+  // Check the unmasked length.
+  if (launder32(private_key->config.key_length) != kP256ScalarBytes) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_length, kP256ScalarBytes);
+
+  // Check the single-share length.
+  if (launder32(keyblob_share_num_words(private_key->config)) !=
+      kP256MaskedScalarShareWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(keyblob_share_num_words(private_key->config),
+                    kP256MaskedScalarShareWords);
+
+  // Check the keyblob length.
+  if (launder32(private_key->keyblob_length) != sizeof(p256_masked_scalar_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->keyblob_length, sizeof(p256_masked_scalar_t));
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Check the lengths of public keys for curve P-256.
+ *
+ * Checks the length of caller-allocated buffers for a P-256 public key. This
+ * function may be used for both ECDSA and ECDH keys, since the key structure
+ * is the same.
+ *
+ * If this check passes, it is safe to interpret public_key->key as a
+ * `p256_point_t *`.
+ *
+ * @param public_key Public key struct to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p256_public_key_length_check(
+    const otcrypto_unblinded_key_t *public_key) {
+  if (launder32(public_key->key_length) != sizeof(p256_point_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_length, sizeof(p256_point_t));
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Finalize a keypair generation operation for curve P-256.
+ *
+ * This function assumes that space is already allocated for all key material
+ * and that the length parameters on the structs are set accordingly, in the
+ * same way as for `otcrypto_ecdh_p256_keygen_async_finalize` and
+ * `otcrypto_ecdsa_p256_keygen_async_finalize`.
+ *
+ * @param[out] private_key Private key to populate.
+ * @param[out] public_key Public key to populate.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t internal_p256_keygen_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the lengths of caller-allocated buffers.
+  HARDENED_TRY(p256_private_key_length_check(private_key));
+  HARDENED_TRY(p256_public_key_length_check(public_key));
+  p256_point_t *pk = (p256_point_t *)public_key->key;
+
+  // Note: The `finalize` operations wipe DMEM after retrieving the keys, so if
+  // an error occurs after this point then the keys would be unrecoverable.
+  // The `finalize` call should be the last potentially error-causing line
+  // before returning to the caller.
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(p256_sideload_keygen_finalize(pk));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+
+    // Randomize the keyblob before writing secret data.
+    HARDENED_TRY(hardened_memshred(private_key->keyblob,
+                                   keyblob_num_words(private_key->config)));
+
+    HARDENED_TRY(
+        p256_keygen_finalize((p256_masked_scalar_t *)private_key->keyblob, pk));
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Set the key checksums.
+  private_key->checksum = integrity_blinded_checksum(private_key);
+  public_key->checksum = integrity_unblinded_checksum(public_key);
+
+  // Clear the OTBN sideload slot (in case the seed was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Check for any NULL pointers.
+  if (private_key == NULL || public_key == NULL ||
+      private_key->keyblob == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key modes.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP256 ||
+      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsaP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP256);
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsaP256);
+
+  return internal_p256_keygen_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest) {
+  if (private_key == NULL || private_key->keyblob == NULL ||
+      message_digest.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the private key.
+  if (launder32(integrity_blinded_key_check(private_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP256);
+
+  // Check the digest length.
+  if (launder32(message_digest.len) != kP256ScalarWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(message_digest.len, kP256ScalarWords);
+
+  // Check the key length.
+  HARDENED_TRY(p256_private_key_length_check(private_key));
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    // Start the asynchronous signature-generation routine.
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    HARDENED_TRY(p256_ecdsa_sign_start(
+        message_digest.data, (p256_masked_scalar_t *)private_key->keyblob));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    // Load the key and start in sideloaded-key mode.
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    HARDENED_TRY(p256_ecdsa_sideload_sign_start(message_digest.data));
+  } else {
+    // Invalid value for private_key->hw_backed.
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // To detect forgeries of the pointer to the private key that we have passed
+  // to the ECC implementation, check again its integrity. If the pointer would
+  // have been tampered with between the first integrity check we did when
+  // entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Check the length of a signature buffer for ECDSA with P-256.
+ *
+ * If this check passes on `signature.len`, it is safe to interpret
+ * `signature.data` as `p256_ecdsa_signature_t *`.
+ *
+ * @param len Length to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p256_signature_length_check(size_t len) {
+  if (launder32(len) > UINT32_MAX / sizeof(uint32_t) ||
+      launder32(len) * sizeof(uint32_t) != sizeof(p256_ecdsa_signature_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(len * sizeof(uint32_t), sizeof(p256_ecdsa_signature_t));
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_sign_async_finalize(
+    otcrypto_word32_buf_t signature) {
+  if (signature.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  HARDENED_TRY(p256_signature_length_check(signature.len));
+  p256_ecdsa_signature_t *sig_p256 = (p256_ecdsa_signature_t *)signature.data;
+  // Note: This operation wipes DMEM, so if an error occurs after this
+  // point then the signature would be unrecoverable. This should be the
+  // last potentially error-causing line before returning to the caller.
+  HARDENED_TRY(p256_ecdsa_sign_finalize(sig_p256));
+
+  // Clear the OTBN sideload slot (in case the key was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature) {
+  if (public_key == NULL || signature.data == NULL ||
+      message_digest.data == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the public key.
+  if (launder32(integrity_unblinded_key_check(public_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  // Check the public key mode.
+  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsaP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsaP256);
+
+  // Check the public key size.
+  HARDENED_TRY(p256_public_key_length_check(public_key));
+  p256_point_t *pk = (p256_point_t *)public_key->key;
+
+  // Check the digest length.
+  if (launder32(message_digest.len) != kP256ScalarWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(message_digest.len, kP256ScalarWords);
+
+  // Check the signature lengths.
+  HARDENED_TRY(p256_signature_length_check(signature.len));
+  p256_ecdsa_signature_t *sig = (p256_ecdsa_signature_t *)signature.data;
+
+  // Start the asynchronous signature-verification routine.
+  HARDENED_TRY(p256_ecdsa_verify_start(sig, message_digest.data, pk));
+
+  // To detect forgeries of the pointer to the public key that we have passed
+  // to the ECC implementation, check again its integrity. If the pointer would
+  // have been tampered with between the first integrity check we did when
+  // entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p256_verify_async_finalize(
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result) {
+  if (verification_result == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  HARDENED_TRY(p256_signature_length_check(signature.len));
+  p256_ecdsa_signature_t *sig_p256 = (p256_ecdsa_signature_t *)signature.data;
+  return p256_ecdsa_verify_finalize(sig_p256, verification_result);
+}
+
+otcrypto_status_t otcrypto_ecdh_p256_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key == NULL || private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP256);
+  return internal_p256_keygen_start(private_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p256_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Check for any NULL pointers.
+  if (private_key == NULL || public_key == NULL ||
+      private_key->keyblob == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdhP256 ||
+      launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdhP256);
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP256);
+  return internal_p256_keygen_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p256_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key) {
+  if (private_key == NULL || public_key == NULL || public_key->key == NULL ||
+      private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the keys.
+  if (launder32(integrity_blinded_key_check(private_key)) !=
+          kHardenedBoolTrue ||
+      launder32(integrity_unblinded_key_check(public_key)) !=
+          kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  // Check the key modes.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP256 ||
+      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdhP256) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP256);
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdhP256);
+
+  // Check the key lengths.
+  HARDENED_TRY(p256_private_key_length_check(private_key));
+  HARDENED_TRY(p256_public_key_length_check(public_key));
+  p256_point_t *pk = (p256_point_t *)public_key->key;
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    HARDENED_TRY(p256_sideload_ecdh_start(pk));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    HARDENED_TRY(
+        p256_ecdh_start((p256_masked_scalar_t *)private_key->keyblob, pk));
+  } else {
+    // Invalid value for `hw_backed`.
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // To detect forgeries of the pointer to the public key that we have passed
+  // to the ECC implementation, check again its integrity. If the pointer would
+  // have been tampered with between the first integrity check we did when
+  // entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdh_p256_async_finalize(
+    otcrypto_blinded_key_t *shared_secret) {
+  if (shared_secret == NULL || shared_secret->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Shared keys cannot be sideloaded because they are software-generated.
+  if (launder32(shared_secret->config.hw_backed) != kHardenedBoolFalse) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(shared_secret->config.hw_backed, kHardenedBoolFalse);
+
+  // Check shared secret length.
+  if (launder32(shared_secret->config.key_length) != kP256CoordBytes) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(shared_secret->config.key_length, kP256CoordBytes);
+  if (launder32(shared_secret->keyblob_length) !=
+      keyblob_num_words(shared_secret->config) * sizeof(uint32_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(
+      shared_secret->keyblob_length,
+      keyblob_num_words(shared_secret->config) * sizeof(uint32_t));
+
+  // Note: This operation wipes DMEM after retrieving the keys, so if an error
+  // occurs after this point then the keys would be unrecoverable. This should
+  // be the last potentially error-causing line before returning to the caller.
+  p256_ecdh_shared_key_t ss;
+  HARDENED_TRY(hardened_memshred(ss.share0, ARRAYSIZE(ss.share0)));
+  HARDENED_TRY(hardened_memshred(ss.share1, ARRAYSIZE(ss.share1)));
+  HARDENED_TRY(p256_ecdh_finalize(&ss));
+
+  HARDENED_TRY(keyblob_from_shares(ss.share0, ss.share1, shared_secret->config,
+                                   shared_secret->keyblob));
+
+  // Set the checksum.
+  shared_secret->checksum = integrity_blinded_checksum(shared_secret);
+
+  // Clear the OTBN sideload slot (in case the seed was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
diff --git a/sw/device/lib/crypto/impl/ecc_p384.c b/sw/device/lib/crypto/impl/ecc_p384.c
new file mode 100644
index 0000000000000..e1047f88fa9c4
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ecc_p384.c
@@ -0,0 +1,570 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/ecc_p384.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/hmac.h"
+#include "sw/device/lib/crypto/impl/ecc/p384.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('p', '3', '8')
+
+otcrypto_status_t otcrypto_ecdsa_p384_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  HARDENED_TRY(otcrypto_ecdsa_p384_keygen_async_start(private_key));
+  return otcrypto_ecdsa_p384_keygen_async_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_sign(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature) {
+  HARDENED_TRY(
+      otcrypto_ecdsa_p384_sign_async_start(private_key, message_digest));
+  return otcrypto_ecdsa_p384_sign_async_finalize(signature);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result) {
+  HARDENED_TRY(otcrypto_ecdsa_p384_verify_async_start(
+      public_key, message_digest, signature));
+  return otcrypto_ecdsa_p384_verify_async_finalize(signature,
+                                                   verification_result);
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_sign_verify(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature) {
+  // Signature generation.
+  HARDENED_TRY(
+      otcrypto_ecdsa_p384_sign(private_key, message_digest, signature));
+
+  // Verify signature before releasing it.
+  otcrypto_const_word32_buf_t signature_check = {
+      .data = signature.data,
+      .len = signature.len,
+  };
+  hardened_bool_t verification_result = kHardenedBoolFalse;
+  HARDENED_TRY(otcrypto_ecdsa_p384_verify(
+      public_key, message_digest, signature_check, &verification_result));
+
+  // Trap if signature verification failed.
+  HARDENED_CHECK_EQ(verification_result, kHardenedBoolTrue);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdh_p384_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  HARDENED_TRY(otcrypto_ecdh_p384_keygen_async_start(private_key));
+  return otcrypto_ecdh_p384_keygen_async_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p384(const otcrypto_blinded_key_t *private_key,
+                                     const otcrypto_unblinded_key_t *public_key,
+                                     otcrypto_blinded_key_t *shared_secret) {
+  HARDENED_TRY(otcrypto_ecdh_p384_async_start(private_key, public_key));
+  return otcrypto_ecdh_p384_async_finalize(shared_secret);
+}
+
+/**
+ * Calls P-384 key generation.
+ *
+ * Can be used for both ECDSA and ECDH. If the key is hardware-backed, loads
+ * the data from key manager and calls the sideloaded key generation routine.
+ *
+ * @param private_key Sideloaded key handle.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t internal_p384_keygen_start(
+    const otcrypto_blinded_key_t *private_key) {
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    return p384_sideload_keygen_start();
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    return p384_keygen_start();
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key == NULL || private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key mode.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP384);
+
+  return internal_p384_keygen_start(private_key);
+}
+
+/**
+ * Check the lengths of private keys for curve P-384.
+ *
+ * Checks the length of caller-allocated buffers for a P-384 private key. This
+ * function may be used for both ECDSA and ECDH keys, since the key structure
+ * is the same.
+ *
+ * If this check passes and `hw_backed` is false, it is safe to interpret
+ * `private_key->keyblob` as a `p384_masked_scalar_t *`.
+ *
+ * @param private_key Private key struct to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p384_private_key_length_check(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    // Skip the length check in this case; if the salt is the wrong length, the
+    // keyblob library will catch it before we sideload the key.
+    return OTCRYPTO_OK;
+  }
+  HARDENED_CHECK_NE(private_key->config.hw_backed, kHardenedBoolTrue);
+
+  // Check the unmasked length.
+  if (launder32(private_key->config.key_length) != kP384ScalarBytes) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_length, kP384ScalarBytes);
+
+  // Check the single-share length.
+  if (launder32(keyblob_share_num_words(private_key->config)) !=
+      kP384MaskedScalarShareWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(keyblob_share_num_words(private_key->config),
+                    kP384MaskedScalarShareWords);
+
+  // Check the keyblob length.
+  if (launder32(private_key->keyblob_length) != sizeof(p384_masked_scalar_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->keyblob_length, sizeof(p384_masked_scalar_t));
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Check the lengths of public keys for curve P-384.
+ *
+ * Checks the length of caller-allocated buffers for a P-384 public key. This
+ * function may be used for both ECDSA and ECDH keys, since the key structure
+ * is the same.
+ *
+ * If this check passes, it is safe to interpret public_key->key as a
+ * `p384_point_t *`.
+ *
+ * @param public_key Public key struct to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p384_public_key_length_check(
+    const otcrypto_unblinded_key_t *public_key) {
+  if (launder32(public_key->key_length) != sizeof(p384_point_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_length, sizeof(p384_point_t));
+  return OTCRYPTO_OK;
+}
+/**
+ * Finalize a keypair generation operation for curve P-384.
+ *
+ * This function assumes that space is already allocated for all key material
+ * and that the length parameters on the structs are set accordingly, in the
+ * same way as for `otcrypto_ecdh_p384_keygen_async_finalize` and
+ * `otcrypto_ecdsa_p384_keygen_async_finalize`.
+ *
+ * @param[out] private_key Private key to populate.
+ * @param[out] public_key Public key to populate.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t internal_p384_keygen_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the lengths of caller-allocated buffers.
+  HARDENED_TRY(p384_private_key_length_check(private_key));
+  HARDENED_TRY(p384_public_key_length_check(public_key));
+
+  // Interpret the key buffer as a P-384 point.
+  p384_point_t *pk = (p384_point_t *)public_key->key;
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    // Note: This operation wipes DMEM after retrieving the keys, so if an error
+    // occurs after this point then the keys would be unrecoverable. This should
+    // be the last potentially error-causing line before returning to the
+    // caller.
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(p384_sideload_keygen_finalize(pk));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+
+    // Randomize the keyblob before writing secret data.
+    HARDENED_TRY(hardened_memshred(private_key->keyblob,
+                                   keyblob_num_words(private_key->config)));
+
+    // Note: This operation wipes DMEM after retrieving the keys, so if an error
+    // occurs after this point then the keys would be unrecoverable. This should
+    // be the last potentially error-causing line before returning to the
+    // caller.
+    HARDENED_TRY(
+        p384_keygen_finalize((p384_masked_scalar_t *)private_key->keyblob, pk));
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  private_key->checksum = integrity_blinded_checksum(private_key);
+  public_key->checksum = integrity_unblinded_checksum(public_key);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Check for any NULL pointers.
+  if (private_key == NULL || public_key == NULL ||
+      private_key->keyblob == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key modes.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP384 ||
+      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsaP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP384);
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsaP384);
+
+  HARDENED_TRY(internal_p384_keygen_finalize(private_key, public_key));
+
+  // Clear the OTBN sideload slot (in case the seed was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest) {
+  if (private_key == NULL || private_key->keyblob == NULL ||
+      message_digest.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the private key.
+  if (launder32(integrity_blinded_key_check(private_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdsaP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdsaP384);
+
+  // Check the digest length.
+  if (launder32(message_digest.len) != kP384ScalarWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(message_digest.len, kP384ScalarWords);
+
+  // Check the key length.
+  HARDENED_TRY(p384_private_key_length_check(private_key));
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    // Start the asynchronous signature-generation routine.
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    HARDENED_TRY(p384_ecdsa_sign_start(
+        message_digest.data, (p384_masked_scalar_t *)private_key->keyblob));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    // Load the key and start in sideloaded-key mode.
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    HARDENED_TRY(p384_ecdsa_sideload_sign_start(message_digest.data));
+  } else {
+    // Invalid value for private_key->hw_backed.
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // To detect forgeries of the pointer to the private key that we have passed
+  // to the ECC implementation, check again its integrity. If the pointer would
+  // have been tampered with between the first integrity check we did when
+  // entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Check the length of a signature buffer for ECDSA with P-384.
+ *
+ * If this check passes on `signature.len`, it is safe to interpret
+ * `signature.data` as `p384_ecdsa_signature_t *`.
+ *
+ * @param len Length to check.
+ * @return OK if the lengths are correct or BAD_ARGS otherwise.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t p384_signature_length_check(size_t len) {
+  if (launder32(len) > UINT32_MAX / sizeof(uint32_t) ||
+      launder32(len) * sizeof(uint32_t) != sizeof(p384_ecdsa_signature_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(len * sizeof(uint32_t), sizeof(p384_ecdsa_signature_t));
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_sign_async_finalize(
+    otcrypto_word32_buf_t signature) {
+  if (signature.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  HARDENED_TRY(p384_signature_length_check(signature.len));
+  p384_ecdsa_signature_t *sig_p384 = (p384_ecdsa_signature_t *)signature.data;
+  // Note: This operation wipes DMEM, so if an error occurs after this
+  // point then the signature would be unrecoverable. This should be the
+  // last potentially error-causing line before returning to the caller.
+  HARDENED_TRY(p384_ecdsa_sign_finalize(sig_p384));
+
+  // Clear the OTBN sideload slot (in case the key was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
+otcrypto_status_t otcrypto_ecdsa_p384_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature) {
+  if (public_key == NULL || signature.data == NULL ||
+      message_digest.data == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the public key.
+  if (launder32(integrity_unblinded_key_check(public_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  // Check the public key mode.
+  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdsaP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdsaP384);
+
+  // Check the public key size.
+  HARDENED_TRY(p384_public_key_length_check(public_key));
+  p384_point_t *pk = (p384_point_t *)public_key->key;
+
+  // Check the digest length.
+  if (launder32(message_digest.len) != kP384ScalarWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(message_digest.len, kP384ScalarWords);
+
+  // Check the signature lengths.
+  HARDENED_TRY(p384_signature_length_check(signature.len));
+  p384_ecdsa_signature_t *sig = (p384_ecdsa_signature_t *)signature.data;
+
+  // Start the asynchronous signature-verification routine.
+  HARDENED_TRY(p384_ecdsa_verify_start(sig, message_digest.data, pk));
+
+  // To detect forgeries of the pointer to the public key that we have passed
+  // to the ECC implementation, check again its integrity. If the pointer would
+  // have been tampered with between the first integrity check we did when
+  // entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdsa_p384_verify_async_finalize(
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result) {
+  if (verification_result == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  HARDENED_TRY(p384_signature_length_check(signature.len));
+  p384_ecdsa_signature_t *sig_p384 = (p384_ecdsa_signature_t *)signature.data;
+  return p384_ecdsa_verify_finalize(sig_p384, verification_result);
+}
+
+otcrypto_status_t otcrypto_ecdh_p384_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  if (private_key == NULL || private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP384);
+  return internal_p384_keygen_start(private_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p384_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // Check for any NULL pointers.
+  if (private_key == NULL || public_key == NULL ||
+      private_key->keyblob == NULL || public_key->key == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(public_key->key_mode) != kOtcryptoKeyModeEcdhP384 ||
+      launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdhP384);
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP384);
+  return internal_p384_keygen_finalize(private_key, public_key);
+}
+
+otcrypto_status_t otcrypto_ecdh_p384_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key) {
+  if (private_key == NULL || public_key == NULL || public_key->key == NULL ||
+      private_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the keys.
+  if (launder32(integrity_blinded_key_check(private_key)) !=
+          kHardenedBoolTrue ||
+      launder32(integrity_unblinded_key_check(public_key)) !=
+          kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  // Check the key modes.
+  if (launder32(private_key->config.key_mode) != kOtcryptoKeyModeEcdhP384 ||
+      launder32(public_key->key_mode) != kOtcryptoKeyModeEcdhP384) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(private_key->config.key_mode, kOtcryptoKeyModeEcdhP384);
+  HARDENED_CHECK_EQ(public_key->key_mode, kOtcryptoKeyModeEcdhP384);
+
+  // Check the key lengths.
+  HARDENED_TRY(p384_private_key_length_check(private_key));
+  HARDENED_TRY(p384_public_key_length_check(public_key));
+  p384_point_t *pk = (p384_point_t *)public_key->key;
+
+  if (launder32(private_key->config.hw_backed) == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolTrue);
+    HARDENED_TRY(keyblob_sideload_key_otbn(private_key));
+    HARDENED_TRY(p384_sideload_ecdh_start(pk));
+  } else if (launder32(private_key->config.hw_backed) == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ(private_key->config.hw_backed, kHardenedBoolFalse);
+    HARDENED_TRY(
+        p384_ecdh_start((p384_masked_scalar_t *)private_key->keyblob, pk));
+  } else {
+    // Invalid value for `hw_backed`.
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // To detect forgeries of the pointers to the public and private key that we
+  // have passed to the ECC implementation, check again their integrity. If the
+  // pointers would have been tampered with between the first integrity check we
+  // did when entering the CryptoLib and here, we would detect this now.
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(private_key),
+                    kHardenedBoolTrue);
+  HARDENED_CHECK_EQ(integrity_unblinded_key_check(public_key),
+                    kHardenedBoolTrue);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_ecdh_p384_async_finalize(
+    otcrypto_blinded_key_t *shared_secret) {
+  if (shared_secret == NULL || shared_secret->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Shared keys cannot be sideloaded because they are software-generated.
+  if (launder32(shared_secret->config.hw_backed) != kHardenedBoolFalse) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(shared_secret->config.hw_backed, kHardenedBoolFalse);
+
+  // Check shared secret length.
+  if (launder32(shared_secret->config.key_length) != kP384CoordBytes) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(shared_secret->config.key_length, kP384CoordBytes);
+  if (launder32(shared_secret->keyblob_length) !=
+      keyblob_num_words(shared_secret->config) * sizeof(uint32_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(
+      shared_secret->keyblob_length,
+      keyblob_num_words(shared_secret->config) * sizeof(uint32_t));
+
+  // Note: This operation wipes DMEM after retrieving the keys, so if an error
+  // occurs after this point then the keys would be unrecoverable. This should
+  // be the last potentially error-causing line before returning to the caller.
+  p384_ecdh_shared_key_t ss;
+  HARDENED_TRY(hardened_memshred(ss.share0, ARRAYSIZE(ss.share0)));
+  HARDENED_TRY(hardened_memshred(ss.share1, ARRAYSIZE(ss.share1)));
+  HARDENED_TRY(p384_ecdh_finalize(&ss));
+
+  HARDENED_TRY(keyblob_from_shares(ss.share0, ss.share1, shared_secret->config,
+                                   shared_secret->keyblob));
+
+  // Set the checksum.
+  shared_secret->checksum = integrity_blinded_checksum(shared_secret);
+
+  // Clear the OTBN sideload slot (in case the seed was sideloaded).
+  return keymgr_sideload_clear_otbn();
+}
diff --git a/sw/device/lib/crypto/impl/ed25519.c b/sw/device/lib/crypto/impl/ed25519.c
new file mode 100644
index 0000000000000..4de13fb5a6e80
--- /dev/null
+++ b/sw/device/lib/crypto/impl/ed25519.c
@@ -0,0 +1,75 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/ed25519.h"
+
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('e', '2', '5')
+
+otcrypto_status_t otcrypto_ed25519_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_sign(
+    const otcrypto_blinded_key_t *private_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_sign_async_finalize(
+    otcrypto_word32_buf_t signature) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode,
+    otcrypto_const_word32_buf_t signature) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_ed25519_verify_async_finalize(
+    hardened_bool_t *verification_result) {
+  // TODO: Ed25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
diff --git a/sw/device/lib/crypto/impl/hash.c b/sw/device/lib/crypto/impl/hash.c
deleted file mode 100644
index 7d7f9036eb525..0000000000000
--- a/sw/device/lib/crypto/impl/hash.c
+++ /dev/null
@@ -1,283 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/include/hash.h"
-
-#include <stdbool.h>
-
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/hmac.h"
-#include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('h', 'a', 's')
-
-// Check that internal and publicly exposed digest values match each other.
-static_assert(kSha256DigestBits == kHmacSha256DigestBits &&
-                  kSha256DigestBytes == kHmacSha256DigestBytes &&
-                  kSha256DigestWords == kHmacSha256DigestWords,
-              "Exposed and driver-level SHA-256 digest size mismatch.");
-static_assert(kSha384DigestBits == kHmacSha384DigestBits &&
-                  kSha384DigestBytes == kHmacSha384DigestBytes &&
-                  kSha384DigestWords == kHmacSha384DigestWords,
-              "Exposed and driver-level SHA-384 digest size mismatch.");
-static_assert(kSha512DigestBits == kHmacSha512DigestBits &&
-                  kSha512DigestBytes == kHmacSha512DigestBytes &&
-                  kSha512DigestWords == kHmacSha512DigestWords,
-              "Exposed and driver-level SHA-512 digest size mismatch.");
-
-// Ensure that the hash context is large enough for HMAC driver struct.
-static_assert(
-    sizeof(otcrypto_hash_context_t) >= sizeof(hmac_ctx_t),
-    "`otcrypto_hash_context_t` must be big enough to hold `hmac_ctx_t`.");
-
-// Ensure that HMAC driver struct is suitable for `hardened_memcpy()`.
-static_assert(sizeof(hmac_ctx_t) % sizeof(uint32_t) == 0,
-              "Size of `hmac_ctx_t` must be a multiple of the word size for "
-              "`hardened_memcpy()`");
-
-/**
- * Save the internal HMAC driver context to a generic hash context.
- *
- * @param[out] ctx Generic hash context to copy to.
- * @param hmac_ctx The internal context object from HMAC driver.
- */
-static void hmac_ctx_save(otcrypto_hash_context_t *restrict ctx,
-                          const hmac_ctx_t *restrict hmac_ctx) {
-  // As per the `hardened_memcpy()` documentation, it is OK to cast to
-  // `uint32_t *` here as long as `state` is word-aligned, which it must be
-  // because all its fields are.
-  hardened_memcpy(ctx->data, (uint32_t *)hmac_ctx,
-                  sizeof(hmac_ctx_t) / sizeof(uint32_t));
-}
-
-/**
- * Restore an internal HMAC driver context from a generic hash context.
- *
- * @param ctx Generic hash context to restore from.
- * @param[out] hmac_ctx Destination HMAC driver context object.
- */
-static void hmac_ctx_restore(const otcrypto_hash_context_t *restrict ctx,
-                             hmac_ctx_t *restrict hmac_ctx) {
-  // As per the `hardened_memcpy()` documentation, it is OK to cast to
-  // `uint32_t *` here as long as `state` is word-aligned, which it must be
-  // because all its fields are.
-  hardened_memcpy((uint32_t *)hmac_ctx, ctx->data,
-                  sizeof(hmac_ctx_t) / sizeof(uint32_t));
-}
-
-/**
- * Checks that the `mode` and `len` fields of the digest match.
- *
- * Ignores the digest `data` field; safe to use on uninitialized digests.
- *
- * @param digest Digest struct with `mode` and `len` set.
- * @return Error status.
- */
-OT_WARN_UNUSED_RESULT
-static status_t check_digest_len(otcrypto_hash_digest_t digest) {
-  switch (launder32(digest.mode)) {
-    case kOtcryptoHashModeSha3_224:
-      if (launder32(digest.len) == (224 / 32)) {
-        HARDENED_CHECK_EQ(digest.len * sizeof(uint32_t) * 8, 224);
-        return OTCRYPTO_OK;
-      }
-      return OTCRYPTO_BAD_ARGS;
-    case kOtcryptoHashModeSha256:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoHashModeSha3_256:
-      if (launder32(digest.len) == (256 / 32)) {
-        HARDENED_CHECK_EQ(digest.len * sizeof(uint32_t) * 8, 256);
-        return OTCRYPTO_OK;
-      }
-      return OTCRYPTO_BAD_ARGS;
-    case kOtcryptoHashModeSha384:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoHashModeSha3_384:
-      if (launder32(digest.len) == (384 / 32)) {
-        HARDENED_CHECK_EQ(digest.len * sizeof(uint32_t) * 8, 384);
-        return OTCRYPTO_OK;
-      }
-      return OTCRYPTO_BAD_ARGS;
-    case kOtcryptoHashModeSha512:
-      OT_FALLTHROUGH_INTENDED;
-    case kOtcryptoHashModeSha3_512:
-      if (launder32(digest.len) == (512 / 32)) {
-        HARDENED_CHECK_EQ(digest.len * sizeof(uint32_t) * 8, 512);
-        return OTCRYPTO_OK;
-      }
-      return OTCRYPTO_BAD_ARGS;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-  // Should be unreachable.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-otcrypto_status_t otcrypto_hash(otcrypto_const_byte_buf_t input_message,
-                                otcrypto_hash_digest_t digest) {
-  if (input_message.data == NULL && input_message.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (digest.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check that digest length and mode match.
-  HARDENED_TRY(check_digest_len(digest));
-
-  switch (digest.mode) {
-    case kOtcryptoHashModeSha3_224:
-      return kmac_sha3_224(input_message.data, input_message.len, digest.data);
-    case kOtcryptoHashModeSha3_256:
-      return kmac_sha3_256(input_message.data, input_message.len, digest.data);
-    case kOtcryptoHashModeSha3_384:
-      return kmac_sha3_384(input_message.data, input_message.len, digest.data);
-    case kOtcryptoHashModeSha3_512:
-      return kmac_sha3_512(input_message.data, input_message.len, digest.data);
-    case kOtcryptoHashModeSha256:
-      return hmac(kHmacModeSha256, /*key=*/NULL, /*key_wordlen=*/0,
-                  input_message.data, input_message.len, digest.data,
-                  digest.len);
-      break;
-    case kOtcryptoHashModeSha384:
-      return hmac(kHmacModeSha384, /*key=*/NULL, /*key_wordlen=*/0,
-                  input_message.data, input_message.len, digest.data,
-                  digest.len);
-      break;
-    case kOtcryptoHashModeSha512:
-      return hmac(kHmacModeSha512, /*key=*/NULL, /*key_wordlen=*/0,
-                  input_message.data, input_message.len, digest.data,
-                  digest.len);
-      break;
-    default:
-      // Invalid hash mode.
-      return OTCRYPTO_BAD_ARGS;
-  }
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_xof_shake(otcrypto_const_byte_buf_t input_message,
-                                     otcrypto_hash_digest_t digest) {
-  switch (digest.mode) {
-    case kOtcryptoHashXofModeShake128:
-      return kmac_shake_128(input_message.data, input_message.len, digest.data,
-                            digest.len);
-    case kOtcryptoHashXofModeShake256:
-      return kmac_shake_256(input_message.data, input_message.len, digest.data,
-                            digest.len);
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should be unreachable.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-otcrypto_status_t otcrypto_xof_cshake(
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_const_byte_buf_t function_name_string,
-    otcrypto_const_byte_buf_t customization_string,
-    otcrypto_hash_digest_t digest) {
-  // According to NIST SP 800-185 Section 3.2, cSHAKE call should use SHAKE, if
-  // both `customization_string` and `function_name_string` are empty string
-  if (customization_string.len == 0 && function_name_string.len == 0) {
-    switch (digest.mode) {
-      case kOtcryptoHashXofModeCshake128:
-        return kmac_shake_128(input_message.data, input_message.len,
-                              digest.data, digest.len);
-      case kOtcryptoHashXofModeCshake256:
-        return kmac_shake_256(input_message.data, input_message.len,
-                              digest.data, digest.len);
-      default:
-        return OTCRYPTO_BAD_ARGS;
-    }
-  }
-
-  switch (digest.mode) {
-    case kOtcryptoHashXofModeCshake128:
-      return kmac_cshake_128(
-          input_message.data, input_message.len, function_name_string.data,
-          function_name_string.len, customization_string.data,
-          customization_string.len, digest.data, digest.len);
-      break;
-    case kOtcryptoHashXofModeCshake256:
-      return kmac_cshake_256(
-          input_message.data, input_message.len, function_name_string.data,
-          function_name_string.len, customization_string.data,
-          customization_string.len, digest.data, digest.len);
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Should be unreachable.
-  HARDENED_TRAP();
-  return OTCRYPTO_FATAL_ERR;
-}
-
-otcrypto_status_t otcrypto_hash_init(otcrypto_hash_context_t *const ctx,
-                                     otcrypto_hash_mode_t hash_mode) {
-  if (ctx == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  hmac_ctx_t hmac_ctx;
-  switch (hash_mode) {
-    case kOtcryptoHashModeSha256: {
-      HARDENED_TRY(hmac_init(&hmac_ctx, kHmacModeSha256, /*hmac_key=*/NULL,
-                             /*key_wordlen=*/0));
-      break;
-    }
-    case kOtcryptoHashModeSha384: {
-      HARDENED_TRY(hmac_init(&hmac_ctx, kHmacModeSha384, /*hmac_key=*/NULL,
-                             /*key_wordlen=*/0));
-      break;
-    }
-    case kOtcryptoHashModeSha512: {
-      HARDENED_TRY(hmac_init(&hmac_ctx, kHmacModeSha512, /*hmac_key=*/NULL,
-                             /*key_wordlen=*/0));
-      break;
-    }
-    default:
-      // Unrecognized or unsupported hash mode.
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_hash_update(
-    otcrypto_hash_context_t *const ctx,
-    otcrypto_const_byte_buf_t input_message) {
-  if (ctx == NULL || (input_message.data == NULL && input_message.len != 0)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  hmac_ctx_t hmac_ctx;
-  hmac_ctx_restore(ctx, &hmac_ctx);
-  HARDENED_TRY(hmac_update(&hmac_ctx, input_message.data, input_message.len));
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_hash_final(otcrypto_hash_context_t *const ctx,
-                                      otcrypto_hash_digest_t digest) {
-  if (ctx == NULL || digest.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check that digest length and mode are consistent.
-  HARDENED_TRY(check_digest_len(digest));
-
-  hmac_ctx_t hmac_ctx;
-  hmac_ctx_restore(ctx, &hmac_ctx);
-  HARDENED_TRY(hmac_final(&hmac_ctx, digest.data, digest.len));
-  // TODO(#23191): Clear `ctx`.
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/hkdf.c b/sw/device/lib/crypto/impl/hkdf.c
new file mode 100644
index 0000000000000..fb64d9ea19fb3
--- /dev/null
+++ b/sw/device/lib/crypto/impl/hkdf.c
@@ -0,0 +1,307 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/hkdf.h"
+
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/hkdf.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('h', 'k', 'd')
+
+/**
+ * Infer the digest length in 32-bit words for the given hash function.
+ *
+ * @param key_mode HMAC key mode.
+ * @param[out] digest_words Number of words in the hash digest.
+ * @return OK or error.
+ */
+static status_t digest_num_words_from_key_mode(otcrypto_key_mode_t key_mode,
+                                               size_t *digest_words) {
+  *digest_words = 0;
+  switch (launder32(key_mode)) {
+    case kOtcryptoKeyModeHmacSha256:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha256);
+      *digest_words = 256 / 32;
+      break;
+    case kOtcryptoKeyModeHmacSha384:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha384);
+      *digest_words = 384 / 32;
+      break;
+    case kOtcryptoKeyModeHmacSha512:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha512);
+      *digest_words = 512 / 32;
+      break;
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_NE(*digest_words, 0);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_hkdf(const otcrypto_blinded_key_t *ikm,
+                                otcrypto_const_byte_buf_t salt,
+                                otcrypto_const_byte_buf_t info,
+                                otcrypto_blinded_key_t *okm) {
+  // Infer the digest length.
+  size_t digest_wordlen;
+  HARDENED_TRY(
+      digest_num_words_from_key_mode(ikm->config.key_mode, &digest_wordlen));
+  size_t digest_bytelen = digest_wordlen * sizeof(uint32_t);
+
+  // Construct a blinded key struct for the intermediate key.
+  otcrypto_key_config_t prk_config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = ikm->config.key_mode,
+      .key_length = digest_bytelen,
+      .hw_backed = kHardenedBoolFalse,
+      .exportable = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+  size_t keyblob_wordlen = keyblob_num_words(prk_config);
+  uint32_t keyblob[keyblob_wordlen];
+  otcrypto_blinded_key_t prk = {
+      .config = prk_config,
+      .keyblob = keyblob,
+      .keyblob_length = sizeof(keyblob),
+  };
+
+  // Call extract and expand.
+  HARDENED_TRY(otcrypto_hkdf_extract(ikm, salt, &prk));
+  return otcrypto_hkdf_expand(&prk, info, okm);
+}
+
+/**
+ * Check that an HKDF pseudo-random key is correctly configured.
+ *
+ * Ensures that the key mode, length, and allocated keyblob length are suitable
+ * for an HKDF pseudo-random key (i.e. the input for extract and the output for
+ * expand). Does not dereference the keyblob, so it is safe to call this before
+ * the keyblob is initialized.
+ *
+ * @param digest_words Length of the hash digest in 32-bit words.
+ * @param prk Pseudo-random key struct to check.
+ * @return OK if the PRK is acceptable, otherwise OTCRYPTO_BAD_ARGS.
+ */
+static status_t hkdf_check_prk(size_t digest_words,
+                               const otcrypto_blinded_key_t *prk) {
+  if (launder32(prk->config.key_mode) >> 16 != kOtcryptoKeyTypeHmac) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(prk->config.key_mode >> 16, kOtcryptoKeyTypeHmac);
+
+  // PRK should be the same length as the digest.
+  size_t digest_bytelen = digest_words * sizeof(uint32_t);
+  if (launder32(prk->config.key_length) != digest_bytelen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(prk->config.key_length, digest_bytelen);
+
+  // Check the keyblob length.
+  size_t keyblob_bytelen = keyblob_num_words(prk->config) * sizeof(uint32_t);
+  if (launder32(prk->keyblob_length) != keyblob_bytelen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(prk->keyblob_length, keyblob_bytelen);
+
+  // Ensure that the PRK is a symmetric key masked with XOR and is not supposed
+  // to be hardware-backed.
+  HARDENED_TRY(keyblob_ensure_xor_masked(prk->config));
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_hkdf_extract(const otcrypto_blinded_key_t *ikm,
+                                        otcrypto_const_byte_buf_t salt,
+                                        otcrypto_blinded_key_t *prk) {
+  // Check for null pointers.
+  if (ikm->keyblob == NULL || prk == NULL || prk->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (salt.data == NULL && salt.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the private key checksum.
+  if (integrity_blinded_key_check(ikm) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(ikm->config.security_level) != kOtcryptoKeySecurityLevelLow ||
+      launder32(prk->config.security_level) != kOtcryptoKeySecurityLevelLow) {
+    // The underlying HMAC implementation is not currently hardened.
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+  HARDENED_CHECK_EQ(ikm->config.security_level, kOtcryptoKeySecurityLevelLow);
+  HARDENED_CHECK_EQ(prk->config.security_level, kOtcryptoKeySecurityLevelLow);
+
+  // Ensure the key modes match.
+  if (launder32(prk->config.key_mode) != launder32(ikm->config.key_mode)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(prk->config.key_mode, ikm->config.key_mode);
+
+  // Infer the digest size. This step also ensures that the key mode is
+  // supported.
+  size_t digest_words = 0;
+  HARDENED_TRY(
+      digest_num_words_from_key_mode(ikm->config.key_mode, &digest_words));
+
+  // Validate the PRK configuration.
+  HARDENED_TRY(hkdf_check_prk(digest_words, prk));
+
+  // Copy the salt into a 32-bit aligned buffer. If the salt is empty, replace
+  // it with a string of `hashLen` zeroes as specified in RFC 5869.
+  size_t salt_bytelen =
+      (salt.len == 0) ? digest_words * sizeof(uint32_t) : salt.len;
+  size_t salt_wordlen = ceil_div(salt_bytelen, sizeof(uint32_t));
+  uint32_t salt_aligned_data[salt_wordlen];
+  memset(salt_aligned_data, 0, sizeof(salt_aligned_data));
+  if (salt.len > 0) {
+    memcpy(salt_aligned_data, salt.data, salt.len);
+  }
+
+  // The extract stage uses `salt` as the key and the input key as the message.
+  // We therefore need to unmask the key and package the salt in a blinded key
+  // struct.
+
+  // Unmask the input key.
+  uint32_t unmasked_ikm_data[keyblob_share_num_words(ikm->config)];
+  HARDENED_TRY(
+      keyblob_key_unmask(ikm, ARRAYSIZE(unmasked_ikm_data), unmasked_ikm_data));
+  otcrypto_const_byte_buf_t unmasked_ikm = {
+      .data = (unsigned char *)unmasked_ikm_data,
+      .len = ikm->config.key_length,
+  };
+
+  // Package the salt value in a blinded key, using an all-zero mask because
+  // the salt is not actually secret.
+  uint32_t salt_mask[ARRAYSIZE(salt_aligned_data)];
+  memset(salt_mask, 0, sizeof(salt_mask));
+  otcrypto_key_config_t salt_key_config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = ikm->config.key_mode,
+      .key_length = salt_bytelen,
+      .hw_backed = kHardenedBoolFalse,
+      .exportable = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+  uint32_t salt_keyblob[keyblob_num_words(salt_key_config)];
+  TRY(keyblob_from_key_and_mask(salt_aligned_data, salt_mask, salt_key_config,
+                                salt_keyblob));
+  otcrypto_blinded_key_t salt_key = {
+      .config = salt_key_config,
+      .keyblob = salt_keyblob,
+      .keyblob_length = sizeof(salt_keyblob),
+  };
+  salt_key.checksum = integrity_blinded_checksum(&salt_key);
+
+  // Call HMAC(salt, IKM).
+  uint32_t tag_data[digest_words];
+  otcrypto_word32_buf_t tag = {.data = tag_data, .len = ARRAYSIZE(tag_data)};
+  HARDENED_TRY(otcrypto_hmac(&salt_key, unmasked_ikm, tag));
+
+  // Construct the blinded keyblob for PRK (with an all-zero mask for now
+  // because HMAC is unhardened anyway).
+  uint32_t prk_mask[digest_words];
+  memset(prk_mask, 0, sizeof(prk_mask));
+  HARDENED_TRY(
+      keyblob_from_key_and_mask(tag_data, prk_mask, prk->config, prk->keyblob));
+  prk->checksum = integrity_blinded_checksum(prk);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_hkdf_expand(const otcrypto_blinded_key_t *prk,
+                                       otcrypto_const_byte_buf_t info,
+                                       otcrypto_blinded_key_t *okm) {
+  if (okm == NULL || okm->keyblob == NULL || prk->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (info.data == NULL && info.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(okm->config.security_level) != kOtcryptoKeySecurityLevelLow ||
+      launder32(prk->config.security_level) != kOtcryptoKeySecurityLevelLow) {
+    // The underlying HMAC implementation is not currently hardened.
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+
+  // Infer the digest size.
+  size_t digest_words = 0;
+  HARDENED_TRY(
+      digest_num_words_from_key_mode(prk->config.key_mode, &digest_words));
+
+  // Check the PRK configuration.
+  HARDENED_TRY(hkdf_check_prk(digest_words, prk));
+
+  // Ensure that the derived key is a symmetric key masked with XOR and is not
+  // supposed to be hardware-backed.
+  HARDENED_TRY(keyblob_ensure_xor_masked(okm->config));
+
+  // Check the keyblob length.
+  size_t keyblob_bytelen = keyblob_num_words(okm->config) * sizeof(uint32_t);
+  if (launder32(okm->keyblob_length) != keyblob_bytelen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(okm->keyblob_length, keyblob_bytelen);
+
+  // Check that the unmasked key length is not too large for HKDF (see RFC
+  // 5869, section 2.3).
+  size_t okm_bytelen = okm->config.key_length;
+  size_t okm_wordlen = ceil_div(okm_bytelen, sizeof(uint32_t));
+  size_t num_iterations = ceil_div(okm_wordlen, digest_words);
+  if (launder32(num_iterations) > 255) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_LE(num_iterations, 255);
+
+  // Create a buffer that holds `info` and a one-byte counter.
+  uint8_t info_and_counter_data[info.len + 1];
+  memcpy(info_and_counter_data, info.data, info.len);
+  info_and_counter_data[info.len] = 0x00;
+  otcrypto_const_byte_buf_t info_and_counter = {
+      .data = info_and_counter_data,
+      .len = sizeof(info_and_counter_data),
+  };
+
+  // Repeatedly call HMAC to generate the derived key (see RFC 5869, section
+  // 2.3):
+  uint32_t okm_data[okm_wordlen];
+  uint32_t *t_data = okm_data;
+  for (uint8_t i = 0; i < num_iterations; i++) {
+    info_and_counter_data[info.len] = i + 1;
+    otcrypto_hmac_context_t ctx;
+    HARDENED_TRY(otcrypto_hmac_init(&ctx, prk));
+    if (launder32(i) != 0) {
+      otcrypto_const_byte_buf_t t_bytes = {
+          .data = (unsigned char *)t_data,
+          .len = digest_words * sizeof(uint32_t),
+      };
+      HARDENED_TRY(otcrypto_hmac_update(&ctx, t_bytes));
+      t_data += digest_words;
+    }
+    HARDENED_TRY(otcrypto_hmac_update(&ctx, info_and_counter));
+    otcrypto_word32_buf_t t_words = {
+        .data = t_data,
+        .len = digest_words,
+    };
+    HARDENED_TRY(otcrypto_hmac_final(&ctx, t_words));
+  }
+
+  // Generate a mask (all-zero for now, since HMAC is unhardened anyway).
+  uint32_t mask[digest_words];
+  memset(mask, 0, sizeof(mask));
+
+  // Construct a blinded key.
+  HARDENED_TRY(
+      keyblob_from_key_and_mask(okm_data, mask, okm->config, okm->keyblob));
+  okm->checksum = integrity_blinded_checksum(okm);
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/hmac.c b/sw/device/lib/crypto/impl/hmac.c
new file mode 100644
index 0000000000000..81eb60583fcee
--- /dev/null
+++ b/sw/device/lib/crypto/impl/hmac.c
@@ -0,0 +1,407 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/hmac.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/hmac.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('h', 'm', 'c')
+
+/**
+ * Ensure that the HMAC context is large enough for HMAC driver struct.
+ */
+static_assert(
+    sizeof(otcrypto_hmac_context_t) >= sizeof(hmac_ctx_t),
+    "`otcrypto_hmac_context_t` must be big enough to hold `hmac_ctx_t`.");
+
+/**
+ * Ensure that HMAC driver struct is suitable for `hardened_memcpy()`.
+ */
+static_assert(sizeof(hmac_ctx_t) % sizeof(uint32_t) == 0,
+              "Size of `hmac_ctx_t` must be a multiple of the word size for "
+              "`hardened_memcpy()`");
+
+/**
+ * Compute the key block (see FIPS 198-1, Section 4, Steps 1-3) together with
+ * its checksum.
+ *
+ * Adds padding and in some cases pre-hashes the HMAC key to get a value the
+ * length of the underlying message block size. This length is then set in
+ * the key_len field of hmac_key_t.
+ *
+ * The caller must ensure that at least `key_block_wordlen` 32-bit words of
+ * space is allocated at the destination `key_block` buffer.
+ *
+ * @param key The blinded input key.
+ * @param key_block_wordlen Block size in 32-bit words.
+ * @param[out] hmac_key Destination of the HMAC key struct.
+ * @return Result of the operation.
+ */
+static status_t hmac_key_construct(const otcrypto_blinded_key_t *key,
+                                   size_t key_block_wordlen,
+                                   hmac_key_t *hmac_key) {
+  // HMAC HWIP does not support masking, so we need to unmask the key.
+  size_t unmasked_key_len = keyblob_share_num_words(key->config);
+  uint32_t unmasked_key[unmasked_key_len];
+  HARDENED_TRY(keyblob_key_unmask(key, unmasked_key_len, unmasked_key));
+
+  // Pre-populate with 0s, in order to pad keys smaller than the internal
+  // block size, according to FIPS 198-1, Section 4.
+  memset(hmac_key->key_block, 0, key_block_wordlen * sizeof(uint32_t));
+  // If the key is larger than the internal block size, we need to hash it
+  // according to FIPS 198-1, Section 4, Step 2.
+  if (launder32(key->config.key_length) >
+      key_block_wordlen * sizeof(uint32_t)) {
+    otcrypto_hmac_key_mode_t used_key_mode;
+    switch (key->config.key_mode) {
+      case kOtcryptoKeyModeHmacSha256:
+        HARDENED_TRY(hmac_hash_sha256((unsigned char *)unmasked_key,
+                                      key->config.key_length,
+                                      hmac_key->key_block));
+        used_key_mode = launder32(kOtcryptoKeyModeHmacSha256);
+        break;
+      case kOtcryptoKeyModeHmacSha384:
+        HARDENED_TRY(hmac_hash_sha384((unsigned char *)unmasked_key,
+                                      key->config.key_length,
+                                      hmac_key->key_block));
+        used_key_mode = launder32(kOtcryptoKeyModeHmacSha384);
+        break;
+      case kOtcryptoKeyModeHmacSha512:
+        HARDENED_TRY(hmac_hash_sha512((unsigned char *)unmasked_key,
+                                      key->config.key_length,
+                                      hmac_key->key_block));
+        used_key_mode = launder32(kOtcryptoKeyModeHmacSha512);
+        break;
+      default:
+        return OTCRYPTO_BAD_ARGS;
+    }
+    HARDENED_CHECK_EQ(used_key_mode, key->config.key_mode);
+  } else {
+    HARDENED_CHECK_LE(key->config.key_length,
+                      key_block_wordlen * sizeof(uint32_t));
+    HARDENED_TRY(
+        hardened_memcpy(hmac_key->key_block, unmasked_key, unmasked_key_len));
+    // If the key size isn't a multiple of the word size, zero the last few
+    // bytes.
+    size_t offset = key->config.key_length % sizeof(uint32_t);
+    if (offset != 0) {
+      unsigned char *key_end_ptr =
+          (unsigned char *)(&hmac_key->key_block[unmasked_key_len]);
+      size_t num_zero_bytes = sizeof(uint32_t) - offset;
+      memset(key_end_ptr - num_zero_bytes, 0, num_zero_bytes);
+    }
+  }
+
+  // Set the key length to the key block word length.
+  hmac_key->key_len = key_block_wordlen;
+
+  // Create the checksum of the key and store it in the key structure.
+  if (launder32(hmac_key->key_len) > 0) {
+    hmac_key->checksum = hmac_key_integrity_checksum(hmac_key);
+  } else {
+    HARDENED_CHECK_EQ(hmac_key->key_len, 0);
+  }
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Checks for NULL pointers or invalid settings in the HMAC key.
+ *
+ * @param key HMAC key.
+ * @return OK or error.
+ */
+static status_t check_key(const otcrypto_blinded_key_t *key) {
+  if (key == NULL || key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // The underlying HMAC hardware does not have sideload support.
+  if (key->config.hw_backed != kHardenedBoolFalse) {
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+
+  // Check the integrity of the key.
+  if (launder32(integrity_blinded_key_check(key)) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(key), kHardenedBoolTrue);
+
+  return OTCRYPTO_OK;
+}
+
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_hmac(const otcrypto_blinded_key_t *key,
+                                otcrypto_const_byte_buf_t input_message,
+                                otcrypto_word32_buf_t tag) {
+  // Check for null pointers.
+  if (tag.data == NULL ||
+      (input_message.data == NULL && input_message.len != 0)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key for null pointers or invalid configurations.
+  HARDENED_TRY(check_key(key));
+
+  if (key->config.security_level != kOtcryptoKeySecurityLevelLow) {
+    // Entropy complex must be initialized for `hardened_memeq`.
+    HARDENED_TRY(entropy_complex_check());
+  }
+
+  // Call the appropriate function from the HMAC driver.
+  hmac_key_t hmac_key;
+  switch (launder32(key->config.key_mode)) {
+    case kOtcryptoKeyModeHmacSha256: {
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha256);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha256BlockWords, &hmac_key));
+      if (launder32(key->config.security_level) ==
+          kOtcryptoKeySecurityLevelLow) {
+        // No protection against FI.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelLow);
+        return hmac_hmac_sha256_cl(&hmac_key, input_message.data,
+                                   input_message.len, tag.data);
+      } else if (launder32(key->config.security_level) ==
+                 kOtcryptoKeySecurityLevelMedium) {
+        // Call the HMAC core twice and compare both tags. This serves as a FI
+        // countermeasure.
+        // First HMAC computation using the HMAC core.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelMedium);
+        HARDENED_TRY(hmac_hmac_sha256_cl(&hmac_key, input_message.data,
+                                         input_message.len, tag.data));
+        // Second HMAC computation using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha256BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(hmac_hmac_sha256_cl(&hmac_key_redundant,
+                                         input_message.data, input_message.len,
+                                         tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      } else {
+        // Perform two HMAC operations. The first call uses the HMAC core. The
+        // second use uses a HMAC implementation that does not use the HMAC
+        // core. This serves as a FI countermeasure.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelHigh);
+        // First HMAC computation using the HMAC core.
+        HARDENED_TRY(hmac_hmac_sha256_cl(&hmac_key, input_message.data,
+                                         input_message.len, tag.data));
+        // Second HMAC computation without using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha256BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(
+            hmac_hmac_sha256_redundant(&hmac_key_redundant, input_message.data,
+                                       input_message.len, tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      }
+    }
+    case kOtcryptoKeyModeHmacSha384: {
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha384);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha384BlockWords, &hmac_key));
+      if (launder32(key->config.security_level) ==
+          kOtcryptoKeySecurityLevelLow) {
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelLow);
+        return hmac_hmac_sha384(&hmac_key, input_message.data,
+                                input_message.len, tag.data);
+      } else if (launder32(key->config.security_level) ==
+                 kOtcryptoKeySecurityLevelMedium) {
+        // Call the HMAC core twice and compare both tags. This serves as a FI
+        // countermeasure.
+        // First HMAC computation using the HMAC core.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelMedium);
+        HARDENED_TRY(hmac_hmac_sha384(&hmac_key, input_message.data,
+                                      input_message.len, tag.data));
+        // Second HMAC computation using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha384BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(hmac_hmac_sha384(&hmac_key_redundant, input_message.data,
+                                      input_message.len, tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      } else {
+        // Perform two HMAC operations. The first call uses the HMAC core. The
+        // second use uses a HMAC implementation that does not use the HMAC
+        // core. This serves as a FI countermeasure.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelHigh);
+        // First HMAC computation using the HMAC core.
+        HARDENED_TRY(hmac_hmac_sha384(&hmac_key, input_message.data,
+                                      input_message.len, tag.data));
+        // Second HMAC computation without using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha384BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(
+            hmac_hmac_sha384_redundant(&hmac_key_redundant, input_message.data,
+                                       input_message.len, tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      }
+    }
+    case kOtcryptoKeyModeHmacSha512: {
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha512);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha512BlockWords, &hmac_key));
+      if (launder32(key->config.security_level) ==
+          kOtcryptoKeySecurityLevelLow) {
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelLow);
+        return hmac_hmac_sha512(&hmac_key, input_message.data,
+                                input_message.len, tag.data);
+      } else if (launder32(key->config.security_level) ==
+                 kOtcryptoKeySecurityLevelMedium) {
+        // Call the HMAC core twice and compare both tags. This serves as a FI
+        // countermeasure.
+        // First HMAC computation using the HMAC core.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelMedium);
+        HARDENED_TRY(hmac_hmac_sha512(&hmac_key, input_message.data,
+                                      input_message.len, tag.data));
+        // Second HMAC computation using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha512BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(hmac_hmac_sha512(&hmac_key_redundant, input_message.data,
+                                      input_message.len, tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      } else {
+        // Perform two HMAC operations. The first call uses the HMAC core. The
+        // second use uses a HMAC implementation that does not use the HMAC
+        // core. This serves as a FI countermeasure.
+        HARDENED_CHECK_EQ(key->config.security_level,
+                          kOtcryptoKeySecurityLevelHigh);
+        // First HMAC computation using the HMAC core.
+        HARDENED_TRY(hmac_hmac_sha512(&hmac_key, input_message.data,
+                                      input_message.len, tag.data));
+        // Second HMAC computation without using the HMAC core.
+        uint32_t tag_redundant[tag.len];
+        hmac_key_t hmac_key_redundant;
+        HARDENED_TRY(hmac_key_construct(key, kHmacSha512BlockWords,
+                                        &hmac_key_redundant));
+        HARDENED_TRY(
+            hmac_hmac_sha512_redundant(&hmac_key_redundant, input_message.data,
+                                       input_message.len, tag_redundant));
+        // Comparison of both tags.
+        HARDENED_CHECK_EQ(
+            hardened_memeq(&tag.data[0], &tag_redundant[0], tag.len),
+            kHardenedBoolTrue);
+        return OTCRYPTO_OK;
+      }
+    }
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Should be unreachable.
+  HARDENED_TRAP();
+  return OTCRYPTO_FATAL_ERR;
+}
+
+otcrypto_status_t otcrypto_hmac_init(otcrypto_hmac_context_t *ctx,
+                                     const otcrypto_blinded_key_t *key) {
+  if (ctx == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the key for null pointers or invalid configurations.
+  HARDENED_TRY(check_key(key));
+
+  // Only security level low is supported for the streaming mode.
+  if (key->config.security_level != kOtcryptoKeySecurityLevelLow) {
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+
+  // Call the appropriate function from the HMAC driver.
+  hmac_ctx_t hmac_ctx;
+  hmac_key_t hmac_key;
+  switch (launder32(key->config.key_mode)) {
+    case kOtcryptoKeyModeHmacSha256:
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha256);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha256BlockWords, &hmac_key));
+      hmac_hmac_sha256_init_cl(hmac_key, &hmac_ctx);
+      break;
+    case kOtcryptoKeyModeHmacSha384:
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha384);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha384BlockWords, &hmac_key));
+      hmac_hmac_sha384_init(hmac_key, &hmac_ctx);
+      break;
+    case kOtcryptoKeyModeHmacSha512:
+      HARDENED_CHECK_EQ(key->config.key_mode, kOtcryptoKeyModeHmacSha512);
+      HARDENED_TRY(hmac_key_construct(key, kHmacSha512BlockWords, &hmac_key));
+      hmac_hmac_sha512_init(hmac_key, &hmac_ctx);
+      break;
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  memcpy(ctx->data, &hmac_ctx, sizeof(hmac_ctx));
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_hmac_update(
+    otcrypto_hmac_context_t *const ctx,
+    otcrypto_const_byte_buf_t input_message) {
+  if (ctx == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null input message with nonzero length.
+  if (input_message.data == NULL && input_message.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  hmac_ctx_t *hmac_ctx = (hmac_ctx_t *)ctx->data;
+  HARDENED_TRY(hmac_update(hmac_ctx, input_message.data, input_message.len));
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_hmac_final(otcrypto_hmac_context_t *const ctx,
+                                      otcrypto_word32_buf_t tag) {
+  if (ctx == NULL || tag.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the digest length.
+  hmac_ctx_t *hmac_ctx = (hmac_ctx_t *)ctx->data;
+  if (launder32(tag.len) != hmac_ctx->digest_wordlen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(tag.len, hmac_ctx->digest_wordlen);
+
+  return hmac_final(hmac_ctx, tag.data);
+}
diff --git a/sw/device/lib/crypto/impl/integrity.c b/sw/device/lib/crypto/impl/integrity.c
index 7091992c5b59e..fff7d9e2fd0db 100644
--- a/sw/device/lib/crypto/impl/integrity.c
+++ b/sw/device/lib/crypto/impl/integrity.c
@@ -4,20 +4,30 @@
 
 #include "sw/device/lib/crypto/impl/integrity.h"
 
+#include "sw/device/lib/base/crc32.h"
 #include "sw/device/lib/base/hardened.h"
 
 uint32_t integrity_unblinded_checksum(const otcrypto_unblinded_key_t *key) {
-  // TODO: decide on a checksum algorithm and implement integrity checks.
-  // TODO: maybe check the key length to make sure it's not pushing UINT32_MAX,
-  // as an overflow protection.
-  return 0;
+  uint32_t ctx;
+  crc32_init(&ctx);
+  crc32_add32(&ctx, key->key_mode);
+  crc32_add32(&ctx, key->key_length);
+  crc32_add(&ctx, (unsigned char *)key->key, key->key_length);
+  return crc32_finish(&ctx);
 }
 
 uint32_t integrity_blinded_checksum(const otcrypto_blinded_key_t *key) {
-  // TODO: decide on a checksum algorithm and implement integrity checks.
-  // TODO: maybe check the key length to make sure it's not pushing UINT32_MAX,
-  // as an overflow protection.
-  return 0;
+  uint32_t ctx;
+  crc32_init(&ctx);
+  crc32_add32(&ctx, key->config.version);
+  crc32_add32(&ctx, key->config.key_mode);
+  crc32_add32(&ctx, key->config.key_length);
+  crc32_add32(&ctx, key->config.hw_backed);
+  crc32_add32(&ctx, key->config.exportable);
+  crc32_add32(&ctx, key->config.security_level);
+  crc32_add32(&ctx, key->keyblob_length);
+  crc32_add(&ctx, (unsigned char *)key->keyblob, key->keyblob_length);
+  return crc32_finish(&ctx);
 }
 
 hardened_bool_t integrity_unblinded_key_check(
@@ -30,6 +40,13 @@ hardened_bool_t integrity_unblinded_key_check(
 }
 
 hardened_bool_t integrity_blinded_key_check(const otcrypto_blinded_key_t *key) {
+  // Reject keys that come from a newer version of the library (downgrade
+  // protection).
+  if (launder32(key->config.version) != kOtcryptoLibVersion1) {
+    return kHardenedBoolFalse;
+  }
+  HARDENED_CHECK_EQ(key->config.version, kOtcryptoLibVersion1);
+
   if (key->checksum == launder32(integrity_blinded_checksum(key))) {
     HARDENED_CHECK_EQ(key->checksum, integrity_blinded_checksum(key));
     return kHardenedBoolTrue;
diff --git a/sw/device/lib/crypto/impl/kdf.c b/sw/device/lib/crypto/impl/kdf.c
deleted file mode 100644
index 745a5e47239b6..0000000000000
--- a/sw/device/lib/crypto/impl/kdf.c
+++ /dev/null
@@ -1,589 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/include/kdf.h"
-
-#include "sw/device/lib/base/math.h"
-#include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/impl/status.h"
-#include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('k', 'd', 'f')
-
-/**
- * Check if the string contains a 0x00 byte.
- *
- * @param buffer Inspected string.
- * @return OK or error.
- */
-static status_t check_zero_byte(const otcrypto_const_byte_buf_t buffer) {
-  for (size_t i = 0; i < buffer.len; i++) {
-    if (buffer.data[i] == 0x00) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-  }
-  return OTCRYPTO_OK;
-}
-
-/**
- * Infer the digest length in 32-bit words for the given hash function.
- *
- * @param key_mode HMAC key mode.
- * @param[out] digest_words Number of words in the hash digest.
- * @return OK or error.
- */
-static status_t digest_num_words_from_key_mode(otcrypto_key_mode_t key_mode,
-                                               size_t *digest_words) {
-  *digest_words = 0;
-  switch (launder32(key_mode)) {
-    case kOtcryptoKeyModeHmacSha256:
-      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha256);
-      *digest_words = 256 / 32;
-      break;
-    case kOtcryptoKeyModeHmacSha384:
-      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha384);
-      *digest_words = 384 / 32;
-      break;
-    case kOtcryptoKeyModeHmacSha512:
-      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha512);
-      *digest_words = 512 / 32;
-      break;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_NE(*digest_words, 0);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_kdf_hmac_ctr(
-    const otcrypto_blinded_key_t key_derivation_key,
-    const otcrypto_const_byte_buf_t kdf_label,
-    const otcrypto_const_byte_buf_t kdf_context, size_t required_byte_len,
-    otcrypto_blinded_key_t *keying_material) {
-  // Check NULL pointers.
-  if (keying_material == NULL || keying_material->keyblob == NULL ||
-      key_derivation_key.keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(keying_material->config.security_level) !=
-          kOtcryptoKeySecurityLevelLow ||
-      launder32(key_derivation_key.config.security_level) !=
-          kOtcryptoKeySecurityLevelLow) {
-    // The underlying HMAC implementation is not currently hardened.
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-
-  // Check for null label with nonzero length.
-  if (kdf_label.data == NULL && kdf_label.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null context with nonzero length.
-  if (kdf_context.data == NULL && kdf_context.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the private key checksum.
-  if (integrity_blinded_key_check(&key_derivation_key) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check non-zero length for keying_material.
-  if (required_byte_len == 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Infer the digest size.
-  size_t digest_word_len = 0;
-  HARDENED_TRY(digest_num_words_from_key_mode(
-      key_derivation_key.config.key_mode, &digest_word_len));
-
-  // Ensure that the derived key is a symmetric key masked with XOR and is not
-  // supposed to be hardware-backed.
-  HARDENED_TRY(keyblob_ensure_xor_masked(keying_material->config));
-
-  // Check `keying_material` key length.
-  if (keying_material->config.hw_backed == kHardenedBoolTrue) {
-    // The case where `keying_material` is hw_backed is addressed by
-    // `otcrypto_hw_backed_key` function in `key_transport.h`.
-    return OTCRYPTO_BAD_ARGS;
-  } else if (keying_material->config.hw_backed == kHardenedBoolFalse) {
-    if (keying_material->config.key_length != required_byte_len ||
-        keying_material->keyblob_length !=
-            keyblob_num_words(keying_material->config) * sizeof(uint32_t)) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check that the unmasked key length is not too large for HMAC CTR
-  // (see NIST SP 800-108r1, section 4.1)
-  size_t required_word_len = ceil_div(required_byte_len, sizeof(uint32_t));
-  size_t num_iterations = ceil_div(required_word_len, digest_word_len);
-  if (launder32(num_iterations) > UINT32_MAX) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_LE(num_iterations, UINT32_MAX);
-
-  // Check if label or context contain 0x00 bytes
-  // Since 0x00 is used as the delimiter between label and context
-  // there shouldn't be multiple instances of them in input data
-  HARDENED_TRY(check_zero_byte(kdf_label));
-  HARDENED_TRY(check_zero_byte(kdf_context));
-
-  // Setup
-  uint8_t zero = 0x00;
-  HARDENED_CHECK_LE(required_byte_len, UINT32_MAX / 8);
-  uint32_t required_bit_len = __builtin_bswap32(required_byte_len * 8);
-
-  // Repeatedly call HMAC to generate the derived key based on input data:
-  // [i]_2 || Label || 0x00 || Context || [L]_2
-  // (see NIST SP 800-108r1, section 4.1)
-  // [i]_2 is the binary representation of the counter value
-  // [L]_2 is the binary representation of the required bit length
-  // The counter value is updated within the loop
-
-  uint32_t keying_material_len =
-      required_word_len + digest_word_len - required_word_len % digest_word_len;
-  uint32_t keying_material_data[keying_material_len];
-
-  for (uint32_t i = 0; i < num_iterations; i++) {
-    otcrypto_hmac_context_t ctx;
-    HARDENED_TRY(otcrypto_hmac_init(&ctx, &key_derivation_key));
-    uint32_t counter_be = __builtin_bswap32(i + 1);
-    HARDENED_TRY(otcrypto_hmac_update(
-        &ctx, (otcrypto_const_byte_buf_t){
-                  .data = (const unsigned char *const)&counter_be,
-                  .len = sizeof(counter_be)}));
-    HARDENED_TRY(otcrypto_hmac_update(&ctx, kdf_label));
-    HARDENED_TRY(otcrypto_hmac_update(
-        &ctx,
-        (otcrypto_const_byte_buf_t){.data = (const unsigned char *const)&zero,
-                                    .len = sizeof(zero)}));
-    HARDENED_TRY(otcrypto_hmac_update(&ctx, kdf_context));
-    HARDENED_TRY(otcrypto_hmac_update(
-        &ctx, (otcrypto_const_byte_buf_t){
-                  .data = (const unsigned char *const)&required_bit_len,
-                  .len = sizeof(required_bit_len)}));
-    uint32_t *tag_dest = keying_material_data + i * digest_word_len;
-    HARDENED_TRY(otcrypto_hmac_final(
-        &ctx,
-        (otcrypto_word32_buf_t){.data = tag_dest, .len = digest_word_len}));
-  }
-
-  // Generate a mask (all-zero for now, since HMAC is unhardened anyway).
-  uint32_t mask[digest_word_len];
-  memset(mask, 0, sizeof(mask));
-
-  // Construct a blinded key.
-  HARDENED_TRY(keyblob_from_key_and_mask(keying_material_data, mask,
-                                         keying_material->config,
-                                         keying_material->keyblob));
-
-  keying_material->checksum = integrity_blinded_checksum(keying_material);
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_kdf_kmac(
-    const otcrypto_blinded_key_t key_derivation_key,
-    otcrypto_kmac_mode_t kmac_mode, const otcrypto_const_byte_buf_t kdf_label,
-    const otcrypto_const_byte_buf_t kdf_context, size_t required_byte_len,
-    otcrypto_blinded_key_t *keying_material) {
-  // Check NULL pointers.
-  if (key_derivation_key.keyblob == NULL || keying_material == NULL ||
-      keying_material->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null label with nonzero length.
-  if (kdf_label.data == NULL && kdf_label.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  // Because of KMAC HWIPs prefix limitation, `label` should not exceed
-  // `kKmacCustStrMaxSize` bytes.
-  if (kdf_label.len > kKmacCustStrMaxSize) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null context with nonzero length.
-  if (kdf_context.data == NULL && kdf_context.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the private key checksum.
-  if (integrity_blinded_key_check(&key_derivation_key) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check `key_len` is supported by KMAC HWIP.
-  // The set of supported key sizes is {128, 192, 256, 384, 512).
-  HARDENED_TRY(kmac_key_length_check(key_derivation_key.config.key_length));
-
-  kmac_blinded_key_t kmac_key = {
-      .share0 = NULL,
-      .share1 = NULL,
-      .hw_backed = key_derivation_key.config.hw_backed,
-      .len = key_derivation_key.config.key_length,
-  };
-  // Validate key length of `key_derivation_key`.
-  if (key_derivation_key.config.hw_backed == kHardenedBoolTrue) {
-    // Check that 1) key size matches sideload port size, 2) keyblob length
-    // matches diversification length.
-    if (keyblob_share_num_words(key_derivation_key.config) * sizeof(uint32_t) !=
-        kKmacSideloadKeyLength / 8) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // Configure keymgr with diversification input and then generate the
-    // sideload key.
-    keymgr_diversification_t diversification;
-    // Diversification call also checks that `key_derivation_key.keyblob_length`
-    // is 8 words long.
-    HARDENED_TRY(keyblob_to_keymgr_diversification(&key_derivation_key,
-                                                   &diversification));
-    HARDENED_TRY(keymgr_generate_key_kmac(diversification));
-  } else if (key_derivation_key.config.hw_backed == kHardenedBoolFalse) {
-    if (key_derivation_key.keyblob_length !=
-        keyblob_num_words(key_derivation_key.config) * sizeof(uint32_t)) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_TRY(keyblob_to_shares(&key_derivation_key, &kmac_key.share0,
-                                   &kmac_key.share1));
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check non-zero length for keying_material.
-  if (required_byte_len == 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  // At the moment, `kmac_kmac_128/256` only supports word-sized digest lenghts.
-  if (required_byte_len % sizeof(uint32_t) != 0) {
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-
-  // Check `keying_material` key length.
-  if (keying_material->config.hw_backed == kHardenedBoolTrue) {
-    // The case where `keying_material` is hw_backed is addressed by
-    // `otcrypto_hw_backed_key` function in `key_transport.h`.
-    return OTCRYPTO_BAD_ARGS;
-  } else if (keying_material->config.hw_backed == kHardenedBoolFalse) {
-    if (keying_material->config.key_length != required_byte_len ||
-        keying_material->keyblob_length !=
-            keyblob_num_words(keying_material->config) * sizeof(uint32_t)) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (kmac_mode == kOtcryptoKmacModeKmac128) {
-    // Check if `key_mode` of the key derivation key matches `kmac_mode`.
-    if (key_derivation_key.config.key_mode != kOtcryptoKeyModeKdfKmac128) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // No need to further check key size against security level because
-    // `kmac_key_length_check` ensures that the key is at least 128-bit.
-    HARDENED_TRY(kmac_kmac_128(&kmac_key, kdf_context.data, kdf_context.len,
-                               kdf_label.data, kdf_label.len,
-                               keying_material->keyblob,
-                               required_byte_len / sizeof(uint32_t)));
-  } else if (kmac_mode == kOtcryptoKmacModeKmac256) {
-    // Check if `key_mode` of the key derivation key matches `kmac_mode`.
-    if (key_derivation_key.config.key_mode != kOtcryptoKeyModeKdfKmac256) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // Check that key size matches the security strength. It should be at least
-    // 256-bit.
-    if (key_derivation_key.config.key_length < 256 / 8) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_TRY(kmac_kmac_256(&kmac_key, kdf_context.data, kdf_context.len,
-                               kdf_label.data, kdf_label.len,
-                               keying_material->keyblob,
-                               required_byte_len / sizeof(uint32_t)));
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  keying_material->checksum = integrity_blinded_checksum(keying_material);
-
-  if (key_derivation_key.config.hw_backed == kHardenedBoolTrue) {
-    HARDENED_TRY(keymgr_sideload_clear_kmac());
-  } else if (key_derivation_key.config.hw_backed != kHardenedBoolFalse) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_kdf_hkdf(const otcrypto_blinded_key_t ikm,
-                                    otcrypto_const_byte_buf_t salt,
-                                    otcrypto_const_byte_buf_t info,
-                                    otcrypto_blinded_key_t *okm) {
-  // Infer the digest length.
-  size_t digest_wordlen;
-  HARDENED_TRY(
-      digest_num_words_from_key_mode(ikm.config.key_mode, &digest_wordlen));
-  size_t digest_bytelen = digest_wordlen * sizeof(uint32_t);
-
-  // Construct a blinded key struct for the intermediate key.
-  otcrypto_key_config_t prk_config = {
-      .version = kOtcryptoLibVersion1,
-      .key_mode = ikm.config.key_mode,
-      .key_length = digest_bytelen,
-      .hw_backed = kHardenedBoolFalse,
-      .exportable = kHardenedBoolFalse,
-      .security_level = kOtcryptoKeySecurityLevelLow,
-  };
-  size_t keyblob_wordlen = keyblob_num_words(prk_config);
-  uint32_t keyblob[keyblob_wordlen];
-  otcrypto_blinded_key_t prk = {
-      .config = prk_config,
-      .keyblob = keyblob,
-      .keyblob_length = sizeof(keyblob),
-  };
-
-  // Call extract and expand.
-  HARDENED_TRY(otcrypto_kdf_hkdf_extract(ikm, salt, &prk));
-  return otcrypto_kdf_hkdf_expand(prk, info, okm);
-}
-
-/**
- * Check that an HKDF pseudo-random key is correctly configured.
- *
- * Ensures that the key mode, length, and allocated keyblob length are suitable
- * for an HKDF pseudo-random key (i.e. the input for extract and the output for
- * expand). Does not dereference the keyblob, so it is safe to call this before
- * the keyblob is initialized.
- *
- * @param digest_words Length of the hash digest in 32-bit words.
- * @param prk Pseudo-random key struct to check.
- * @return OK if the PRK is acceptable, otherwise OTCRYPTO_BAD_ARGS.
- */
-static status_t hkdf_check_prk(size_t digest_words,
-                               const otcrypto_blinded_key_t *prk) {
-  if (launder32(prk->config.key_mode) >> 16 != kOtcryptoKeyTypeHmac) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(prk->config.key_mode >> 16, kOtcryptoKeyTypeHmac);
-
-  // PRK should be the same length as the digest.
-  size_t digest_bytelen = digest_words * sizeof(uint32_t);
-  if (launder32(prk->config.key_length) != digest_bytelen) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(prk->config.key_length, digest_bytelen);
-
-  // Check the keyblob length.
-  size_t keyblob_bytelen = keyblob_num_words(prk->config) * sizeof(uint32_t);
-  if (launder32(prk->keyblob_length) != keyblob_bytelen) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(prk->keyblob_length, keyblob_bytelen);
-
-  // Ensure that the PRK is a symmetric key masked with XOR and is not supposed
-  // to be hardware-backed.
-  HARDENED_TRY(keyblob_ensure_xor_masked(prk->config));
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_kdf_hkdf_extract(const otcrypto_blinded_key_t ikm,
-                                            otcrypto_const_byte_buf_t salt,
-                                            otcrypto_blinded_key_t *prk) {
-  // Check for null pointers.
-  if (ikm.keyblob == NULL || prk == NULL || prk->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  if (salt.data == NULL && salt.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check the private key checksum.
-  if (integrity_blinded_key_check(&ikm) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(ikm.config.security_level) != kOtcryptoKeySecurityLevelLow ||
-      launder32(prk->config.security_level) != kOtcryptoKeySecurityLevelLow) {
-    // The underlying HMAC implementation is not currently hardened.
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-  HARDENED_CHECK_EQ(ikm.config.security_level, kOtcryptoKeySecurityLevelLow);
-  HARDENED_CHECK_EQ(prk->config.security_level, kOtcryptoKeySecurityLevelLow);
-
-  // Ensure the key modes match.
-  if (launder32(prk->config.key_mode) != launder32(ikm.config.key_mode)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(prk->config.key_mode, ikm.config.key_mode);
-
-  // Infer the digest size. This step also ensures that the key mode is
-  // supported.
-  size_t digest_words = 0;
-  HARDENED_TRY(
-      digest_num_words_from_key_mode(ikm.config.key_mode, &digest_words));
-
-  // Validate the PRK configuration.
-  HARDENED_TRY(hkdf_check_prk(digest_words, prk));
-
-  // Copy the salt into a 32-bit aligned buffer. If the salt is empty, replace
-  // it with a string of `hashLen` zeroes as specified in RFC 5869.
-  size_t salt_bytelen =
-      (salt.len == 0) ? digest_words * sizeof(uint32_t) : salt.len;
-  size_t salt_wordlen = ceil_div(salt_bytelen, sizeof(uint32_t));
-  uint32_t salt_aligned_data[salt_wordlen];
-  memset(salt_aligned_data, 0, sizeof(salt_aligned_data));
-  if (salt.len > 0) {
-    memcpy(salt_aligned_data, salt.data, salt.len);
-  }
-
-  // The extract stage uses `salt` as the key and the input key as the message.
-  // We therefore need to unmask the key and package the salt in a blinded key
-  // struct.
-
-  // Unmask the input key.
-  uint32_t *ikm_share0;
-  uint32_t *ikm_share1;
-  HARDENED_TRY(keyblob_to_shares(&ikm, &ikm_share0, &ikm_share1));
-  uint32_t unmasked_ikm_data[keyblob_share_num_words(ikm.config)];
-  for (size_t i = 0; i < ARRAYSIZE(unmasked_ikm_data); i++) {
-    unmasked_ikm_data[i] = ikm_share0[i] ^ ikm_share1[i];
-  }
-  otcrypto_const_byte_buf_t unmasked_ikm = {
-      .data = (unsigned char *)unmasked_ikm_data,
-      .len = ikm.config.key_length,
-  };
-
-  // Package the salt value in a blinded key, using an all-zero mask because
-  // the salt is not actually secret.
-  uint32_t salt_mask[ARRAYSIZE(salt_aligned_data)];
-  memset(salt_mask, 0, sizeof(salt_mask));
-  otcrypto_key_config_t salt_key_config = {
-      .version = kOtcryptoLibVersion1,
-      .key_mode = ikm.config.key_mode,
-      .key_length = salt_bytelen,
-      .hw_backed = kHardenedBoolFalse,
-      .exportable = kHardenedBoolFalse,
-      .security_level = kOtcryptoKeySecurityLevelLow,
-  };
-  uint32_t salt_keyblob[keyblob_num_words(salt_key_config)];
-  TRY(keyblob_from_key_and_mask(salt_aligned_data, salt_mask, salt_key_config,
-                                salt_keyblob));
-  otcrypto_blinded_key_t salt_key = {
-      .config = salt_key_config,
-      .keyblob = salt_keyblob,
-      .keyblob_length = sizeof(salt_keyblob),
-  };
-
-  // Call HMAC(salt, IKM).
-  uint32_t tag_data[digest_words];
-  otcrypto_word32_buf_t tag = {.data = tag_data, .len = ARRAYSIZE(tag_data)};
-  HARDENED_TRY(otcrypto_hmac(&salt_key, unmasked_ikm, tag));
-
-  // Construct the blinded keyblob for PRK (with an all-zero mask for now
-  // because HMAC is unhardened anyway).
-  uint32_t prk_mask[digest_words];
-  memset(prk_mask, 0, sizeof(prk_mask));
-  HARDENED_TRY(
-      keyblob_from_key_and_mask(tag_data, prk_mask, prk->config, prk->keyblob));
-  prk->checksum = integrity_blinded_checksum(prk);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_kdf_hkdf_expand(const otcrypto_blinded_key_t prk,
-                                           otcrypto_const_byte_buf_t info,
-                                           otcrypto_blinded_key_t *okm) {
-  if (okm == NULL || okm->keyblob == NULL || prk.keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  if (info.data == NULL && info.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (launder32(okm->config.security_level) != kOtcryptoKeySecurityLevelLow ||
-      launder32(prk.config.security_level) != kOtcryptoKeySecurityLevelLow) {
-    // The underlying HMAC implementation is not currently hardened.
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-
-  // Infer the digest size.
-  size_t digest_words = 0;
-  HARDENED_TRY(
-      digest_num_words_from_key_mode(prk.config.key_mode, &digest_words));
-
-  // Check the PRK configuration.
-  HARDENED_TRY(hkdf_check_prk(digest_words, &prk));
-
-  // Ensure that the derived key is a symmetric key masked with XOR and is not
-  // supposed to be hardware-backed.
-  HARDENED_TRY(keyblob_ensure_xor_masked(okm->config));
-
-  // Check the keyblob length.
-  size_t keyblob_bytelen = keyblob_num_words(okm->config) * sizeof(uint32_t);
-  if (launder32(okm->keyblob_length) != keyblob_bytelen) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(okm->keyblob_length, keyblob_bytelen);
-
-  // Check that the unmasked key length is not too large for HKDF (see RFC
-  // 5869, section 2.3).
-  size_t okm_bytelen = okm->config.key_length;
-  size_t okm_wordlen = ceil_div(okm_bytelen, sizeof(uint32_t));
-  size_t num_iterations = ceil_div(okm_wordlen, digest_words);
-  if (launder32(num_iterations) > 255) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_LE(num_iterations, 255);
-
-  // Create a buffer that holds `info` and a one-byte counter.
-  uint8_t info_and_counter_data[info.len + 1];
-  memcpy(info_and_counter_data, info.data, info.len);
-  info_and_counter_data[info.len] = 0x00;
-  otcrypto_const_byte_buf_t info_and_counter = {
-      .data = info_and_counter_data,
-      .len = sizeof(info_and_counter_data),
-  };
-
-  // Repeatedly call HMAC to generate the derived key (see RFC 5869, section
-  // 2.3):
-  uint32_t okm_data[okm_wordlen];
-  uint32_t *t_data = okm_data;
-  for (uint8_t i = 0; i < num_iterations; i++) {
-    info_and_counter_data[info.len] = i + 1;
-    otcrypto_hmac_context_t ctx;
-    HARDENED_TRY(otcrypto_hmac_init(&ctx, &prk));
-    if (launder32(i) != 0) {
-      otcrypto_const_byte_buf_t t_bytes = {
-          .data = (unsigned char *)t_data,
-          .len = digest_words * sizeof(uint32_t),
-      };
-      HARDENED_TRY(otcrypto_hmac_update(&ctx, t_bytes));
-      t_data += digest_words;
-    }
-    HARDENED_TRY(otcrypto_hmac_update(&ctx, info_and_counter));
-    otcrypto_word32_buf_t t_words = {
-        .data = t_data,
-        .len = digest_words,
-    };
-    HARDENED_TRY(otcrypto_hmac_final(&ctx, t_words));
-  }
-
-  // Generate a mask (all-zero for now, since HMAC is unhardened anyway).
-  uint32_t mask[digest_words];
-  memset(mask, 0, sizeof(mask));
-
-  // Construct a blinded key.
-  HARDENED_TRY(
-      keyblob_from_key_and_mask(okm_data, mask, okm->config, okm->keyblob));
-  okm->checksum = integrity_blinded_checksum(okm);
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/kdf_ctr.c b/sw/device/lib/crypto/impl/kdf_ctr.c
new file mode 100644
index 0000000000000..7467a7549bec1
--- /dev/null
+++ b/sw/device/lib/crypto/impl/kdf_ctr.c
@@ -0,0 +1,194 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/kdf_ctr.h"
+
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('c', 'k', 'd')
+
+/**
+ * Check if the string contains a 0x00 byte.
+ *
+ * @param buffer Inspected string.
+ * @return OK or error.
+ */
+static status_t check_zero_byte(const otcrypto_const_byte_buf_t buffer) {
+  for (size_t i = 0; i < buffer.len; i++) {
+    if (buffer.data[i] == 0x00) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+  }
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Infer the digest length in 32-bit words for the given hash function.
+ *
+ * @param key_mode HMAC key mode.
+ * @param[out] digest_words Number of words in the hash digest.
+ * @return OK or error.
+ */
+static status_t digest_num_words_from_key_mode(otcrypto_key_mode_t key_mode,
+                                               size_t *digest_words) {
+  *digest_words = 0;
+  switch (launder32(key_mode)) {
+    case kOtcryptoKeyModeHmacSha256:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha256);
+      *digest_words = 256 / 32;
+      break;
+    case kOtcryptoKeyModeHmacSha384:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha384);
+      *digest_words = 384 / 32;
+      break;
+    case kOtcryptoKeyModeHmacSha512:
+      HARDENED_CHECK_EQ(key_mode, kOtcryptoKeyModeHmacSha512);
+      *digest_words = 512 / 32;
+      break;
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_NE(*digest_words, 0);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_kdf_ctr_hmac(
+    const otcrypto_blinded_key_t *key_derivation_key,
+    const otcrypto_const_byte_buf_t label,
+    const otcrypto_const_byte_buf_t context,
+    otcrypto_blinded_key_t *output_key_material) {
+  // Check NULL pointers.
+  if (output_key_material == NULL || output_key_material->keyblob == NULL ||
+      key_derivation_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (launder32(output_key_material->config.security_level) !=
+          kOtcryptoKeySecurityLevelLow ||
+      launder32(key_derivation_key->config.security_level) !=
+          kOtcryptoKeySecurityLevelLow) {
+    // The underlying HMAC implementation is not currently hardened.
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+
+  // Check for null label with nonzero length.
+  if (label.data == NULL && label.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null context with nonzero length.
+  if (context.data == NULL && context.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the private key checksum.
+  if (integrity_blinded_key_check(key_derivation_key) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check non-zero length for output_key_material.
+  if (output_key_material->config.key_length == 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Infer the digest size.
+  size_t digest_word_len = 0;
+  HARDENED_TRY(digest_num_words_from_key_mode(
+      key_derivation_key->config.key_mode, &digest_word_len));
+
+  // Ensure that the derived key is a symmetric key masked with XOR and is not
+  // supposed to be hardware-backed.
+  HARDENED_TRY(keyblob_ensure_xor_masked(output_key_material->config));
+
+  // Check `output_key_material` key length.
+  if (output_key_material->config.hw_backed == kHardenedBoolTrue) {
+    // The case where `output_key_material` is hw_backed is addressed by
+    // `otcrypto_hw_backed_key` function in `key_transport.h`.
+    return OTCRYPTO_BAD_ARGS;
+  } else if (output_key_material->config.hw_backed == kHardenedBoolFalse) {
+    if (output_key_material->keyblob_length !=
+        keyblob_num_words(output_key_material->config) * sizeof(uint32_t)) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the unmasked key length is not too large for HMAC CTR
+  // (see NIST SP 800-108r1, section 4.1)
+  size_t required_byte_len = output_key_material->config.key_length;
+  size_t required_word_len = ceil_div(required_byte_len, sizeof(uint32_t));
+  size_t num_iterations = ceil_div(required_word_len, digest_word_len);
+  if (launder32(num_iterations) > UINT32_MAX ||
+      launder32(required_byte_len) > UINT32_MAX / 8) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_LE(num_iterations, UINT32_MAX);
+  HARDENED_CHECK_LE(required_byte_len, UINT32_MAX / 8);
+  uint32_t required_bit_len = __builtin_bswap32(required_byte_len * 8);
+
+  // Check if label or context contain 0x00 bytes
+  // Since 0x00 is used as the delimiter between label and context
+  // there shouldn't be multiple instances of them in input data
+  HARDENED_TRY(check_zero_byte(label));
+  HARDENED_TRY(check_zero_byte(context));
+
+  // Setup
+  uint8_t zero = 0x00;
+
+  // Repeatedly call HMAC to generate the derived key based on input data:
+  // [i]_2 || Label || 0x00 || Context || [L]_2
+  // (see NIST SP 800-108r1, section 4.1)
+  // [i]_2 is the binary representation of the counter value
+  // [L]_2 is the binary representation of the required bit length
+  // The counter value is updated within the loop
+
+  uint32_t output_key_material_len =
+      required_word_len + digest_word_len - required_word_len % digest_word_len;
+  uint32_t output_key_material_data[output_key_material_len];
+
+  for (uint32_t i = 0; i < num_iterations; i++) {
+    otcrypto_hmac_context_t ctx;
+    HARDENED_TRY(otcrypto_hmac_init(&ctx, key_derivation_key));
+    uint32_t counter_be = __builtin_bswap32(i + 1);
+    HARDENED_TRY(otcrypto_hmac_update(
+        &ctx, (otcrypto_const_byte_buf_t){
+                  .data = (const unsigned char *const)&counter_be,
+                  .len = sizeof(counter_be)}));
+    HARDENED_TRY(otcrypto_hmac_update(&ctx, label));
+    HARDENED_TRY(otcrypto_hmac_update(
+        &ctx,
+        (otcrypto_const_byte_buf_t){.data = (const unsigned char *const)&zero,
+                                    .len = sizeof(zero)}));
+    HARDENED_TRY(otcrypto_hmac_update(&ctx, context));
+    HARDENED_TRY(otcrypto_hmac_update(
+        &ctx, (otcrypto_const_byte_buf_t){
+                  .data = (const unsigned char *const)&required_bit_len,
+                  .len = sizeof(required_bit_len)}));
+    uint32_t *tag_dest = output_key_material_data + i * digest_word_len;
+    HARDENED_TRY(otcrypto_hmac_final(
+        &ctx,
+        (otcrypto_word32_buf_t){.data = tag_dest, .len = digest_word_len}));
+  }
+
+  // Generate a mask (all-zero for now, since HMAC is unhardened anyway).
+  uint32_t mask[digest_word_len];
+  memset(mask, 0, sizeof(mask));
+
+  // Construct a blinded key.
+  HARDENED_TRY(keyblob_from_key_and_mask(output_key_material_data, mask,
+                                         output_key_material->config,
+                                         output_key_material->keyblob));
+
+  output_key_material->checksum =
+      integrity_blinded_checksum(output_key_material);
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/key_transport.c b/sw/device/lib/crypto/impl/key_transport.c
index aa1c498c5de2c..8f3c6bafcf2a4 100644
--- a/sw/device/lib/crypto/impl/key_transport.c
+++ b/sw/device/lib/crypto/impl/key_transport.c
@@ -5,6 +5,9 @@
 #include "sw/device/lib/crypto/include/key_transport.h"
 
 #include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/impl/aes_kwp/aes_kwp.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/impl/status.h"
@@ -24,6 +27,9 @@ otcrypto_status_t otcrypto_symmetric_keygen(
   // hardware-backed or non-symmetric keys.
   HARDENED_TRY(keyblob_ensure_xor_masked(key->config));
 
+  // Ensure that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Get pointers to the shares within the keyblob. Fails if the key length
   // doesn't match the mode.
   uint32_t *share0;
@@ -40,6 +46,10 @@ otcrypto_status_t otcrypto_symmetric_keygen(
       .len = keyblob_share_num_words(key->config),
   };
 
+  // Randomize the memory before writing the shares.
+  HARDENED_TRY(hardened_memshred(share0_buf.data, share0_buf.len));
+  HARDENED_TRY(hardened_memshred(share1_buf.data, share1_buf.len));
+
   // Construct an empty buffer for the "additional input" to the DRBG generate
   // function.
   otcrypto_const_byte_buf_t empty = {.data = NULL, .len = 0};
@@ -83,6 +93,210 @@ otcrypto_status_t otcrypto_hw_backed_key(uint32_t version,
   return OTCRYPTO_OK;
 }
 
+otcrypto_status_t otcrypto_wrapped_key_len(const otcrypto_key_config_t config,
+                                           size_t *wrapped_num_words) {
+  // Check that the total wrapped key length will fit in 32 bits.
+  size_t config_num_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
+  if (keyblob_num_words(config) > UINT32_MAX - config_num_words - 2) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // A wrapped key includes:
+  //   - The full key configuration
+  //   - The key checksum (32 bits)
+  //   - The keyblob length (in words) as a 32-bit word
+  //   - The keyblob
+  *wrapped_num_words = config_num_words + 2 + keyblob_num_words(config);
+
+  // We need to add 64 bits for the AES-KWP prefix.
+  *wrapped_num_words += 2;
+
+  // The number of words needs to be rounded up to the next multiple of 64 bits.
+  if (*wrapped_num_words % 2 == 1) {
+    *wrapped_num_words += 1;
+  }
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Extract an AES-KWP key encryption key from the blinded key struct.
+ *
+ * Also checks the key's integrity and mode.
+ *
+ * @param key_kek Blinded key encryption key.
+ * @param[out] aes_key Destination AES key struct.
+ * @return Result of the operation.
+ */
+static status_t aes_kwp_key_construct(const otcrypto_blinded_key_t *key_kek,
+                                      aes_key_t *aes_key) {
+  // Key integrity check.
+  if (launder32(integrity_blinded_key_check(key_kek)) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(key_kek), kHardenedBoolTrue);
+
+  // Check the key mode.
+  if (launder32((uint32_t)key_kek->config.key_mode) != kOtcryptoKeyModeAesKwp) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(key_kek->config.key_mode, kOtcryptoKeyModeAesKwp);
+
+  // Set the mode of the underlying AES key to ECB (since this is the
+  // underlying block cipher mode for KWP).
+  aes_key->mode = kAesCipherModeEcb;
+
+  if (key_kek->config.hw_backed == kHardenedBoolTrue) {
+    // Call keymgr to sideload the key into AES.
+    keymgr_diversification_t diversification;
+    HARDENED_TRY(keyblob_to_keymgr_diversification(key_kek, &diversification));
+    HARDENED_TRY(keymgr_generate_key_aes(diversification));
+  } else if (key_kek->config.hw_backed != kHardenedBoolFalse) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  aes_key->sideload = key_kek->config.hw_backed;
+
+  // Set the AES key length (in words).
+  aes_key->key_len = keyblob_share_num_words(key_kek->config);
+
+  // Get pointers to the individual shares.
+  uint32_t *share0;
+  uint32_t *share1;
+  HARDENED_TRY(keyblob_to_shares(key_kek, &share0, &share1));
+  aes_key->key_shares[0] = share0;
+  aes_key->key_shares[1] = share1;
+
+  // Create the checksum of the key and store it in the key structure.
+  aes_key->checksum = aes_key_integrity_checksum(aes_key);
+
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_key_wrap(const otcrypto_blinded_key_t *key_to_wrap,
+                                    const otcrypto_blinded_key_t *key_kek,
+                                    otcrypto_word32_buf_t wrapped_key) {
+  if (key_to_wrap == NULL || key_to_wrap->keyblob == NULL || key_kek == NULL ||
+      key_kek->keyblob == NULL || wrapped_key.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity of the key material we are wrapping.
+  if (launder32(integrity_blinded_key_check(key_to_wrap)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(key_to_wrap),
+                    kHardenedBoolTrue);
+
+  // Check the length of the output buffer.
+  size_t exp_len;
+  HARDENED_TRY(otcrypto_wrapped_key_len(key_to_wrap->config, &exp_len));
+  if (wrapped_key.len != exp_len) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the integrity/lengths/mode of the key encryption key, and construct
+  // an internal AES key.
+  aes_key_t kek;
+  HARDENED_TRY(aes_kwp_key_construct(key_kek, &kek));
+
+  // Check the keyblob length.
+  uint32_t keyblob_words = keyblob_num_words(key_to_wrap->config);
+  if (key_to_wrap->keyblob_length != keyblob_words * sizeof(uint32_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check that the configuration is aligned.
+  if (misalignment32_of((uintptr_t)&key_to_wrap->config) != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Create the plaintext by copying the key configuration, checksum, keyblob
+  // length, and keyblob into a buffer.
+  uint32_t config_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
+  size_t plaintext_num_words = config_words + 2 + keyblob_words;
+  uint32_t plaintext[plaintext_num_words];
+  HARDENED_TRY(hardened_memshred(plaintext, ARRAYSIZE(plaintext)));
+  HARDENED_TRY(hardened_memcpy(plaintext, (uint32_t *)&key_to_wrap->config,
+                               config_words));
+  plaintext[config_words] = key_to_wrap->checksum;
+  plaintext[config_words + 1] = keyblob_words;
+  HARDENED_TRY(hardened_memcpy(plaintext + config_words + 2,
+                               key_to_wrap->keyblob, keyblob_words));
+
+  // Wrap the key.
+  return aes_kwp_wrap(kek, plaintext, sizeof(plaintext), wrapped_key.data);
+}
+
+otcrypto_status_t otcrypto_key_unwrap(otcrypto_const_word32_buf_t wrapped_key,
+                                      const otcrypto_blinded_key_t *key_kek,
+                                      hardened_bool_t *success,
+                                      otcrypto_blinded_key_t *unwrapped_key) {
+  *success = kHardenedBoolFalse;
+
+  if (wrapped_key.data == NULL || key_kek == NULL || key_kek->keyblob == NULL ||
+      success == NULL || unwrapped_key == NULL ||
+      unwrapped_key->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Check the integrity/lengths/mode of the key encryption key, and construct
+  // an internal AES key.
+  aes_key_t kek;
+  HARDENED_TRY(aes_kwp_key_construct(key_kek, &kek));
+
+  // Check that the configuration is aligned.
+  if (misalignment32_of((uintptr_t)&unwrapped_key->config) != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Unwrap the key.
+  uint32_t plaintext[wrapped_key.len];
+  HARDENED_TRY(hardened_memshred(plaintext, ARRAYSIZE(plaintext)));
+  HARDENED_TRY(aes_kwp_unwrap(kek, wrapped_key.data,
+                              wrapped_key.len * sizeof(uint32_t), success,
+                              plaintext));
+
+  if (launder32(*success) != kHardenedBoolTrue) {
+    *success = kHardenedBoolFalse;
+    return OTCRYPTO_OK;
+  }
+  HARDENED_CHECK_EQ(*success, kHardenedBoolTrue);
+
+  // Set back to false while we check other conditions.
+  *success = kHardenedBoolFalse;
+
+  // Extract the key configuration.
+  uint32_t config_words = sizeof(otcrypto_key_config_t) / sizeof(uint32_t);
+  HARDENED_TRY(hardened_memcpy((uint32_t *)&unwrapped_key->config, plaintext,
+                               config_words));
+
+  // Extract the checksum and keyblob length.
+  unwrapped_key->checksum = plaintext[config_words];
+  uint32_t keyblob_words = plaintext[config_words + 1];
+  if (keyblob_words != keyblob_num_words(unwrapped_key->config)) {
+    *success = kHardenedBoolFalse;
+    return OTCRYPTO_OK;
+  }
+
+  // Extract the keyblob.
+  if (unwrapped_key->keyblob_length != keyblob_words * sizeof(uint32_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_TRY(hardened_memcpy(unwrapped_key->keyblob,
+                               plaintext + config_words + 2, keyblob_words));
+
+  // Finally, check the integrity of the key material we unwrapped.
+  *success = integrity_blinded_key_check(unwrapped_key);
+  return OTCRYPTO_OK;
+}
+
 otcrypto_status_t otcrypto_import_blinded_key(
     const otcrypto_const_word32_buf_t key_share0,
     const otcrypto_const_word32_buf_t key_share1,
@@ -116,63 +330,72 @@ otcrypto_status_t otcrypto_import_blinded_key(
                     keyblob_words * sizeof(uint32_t));
 
   // Construct the blinded key.
-  keyblob_from_shares(key_share0.data, key_share1.data, blinded_key->config,
-                      blinded_key->keyblob);
+  HARDENED_TRY(keyblob_from_shares(key_share0.data, key_share1.data,
+                                   blinded_key->config, blinded_key->keyblob));
   blinded_key->checksum = integrity_blinded_checksum(blinded_key);
   return OTCRYPTO_OK;
 }
 
 otcrypto_status_t otcrypto_export_blinded_key(
-    const otcrypto_blinded_key_t blinded_key, otcrypto_word32_buf_t key_share0,
+    const otcrypto_blinded_key_t *blinded_key, otcrypto_word32_buf_t key_share0,
     otcrypto_word32_buf_t key_share1) {
-  if (blinded_key.keyblob == NULL || key_share0.data == NULL ||
+  if (blinded_key->keyblob == NULL || key_share0.data == NULL ||
       key_share1.data == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Check key integrity.
-  if (launder32(integrity_blinded_key_check(&blinded_key)) !=
+  if (launder32(integrity_blinded_key_check(blinded_key)) !=
       kHardenedBoolTrue) {
     return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(&blinded_key),
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(blinded_key),
                     kHardenedBoolTrue);
 
   // Ensure the key is symmetric and not hardware-backed.
-  HARDENED_TRY(keyblob_ensure_xor_masked(blinded_key.config));
+  HARDENED_TRY(keyblob_ensure_xor_masked(blinded_key->config));
 
   // Check that key is exportable.
-  if (launder32(blinded_key.config.exportable) != kHardenedBoolTrue) {
+  if (launder32(blinded_key->config.exportable) != kHardenedBoolTrue) {
     return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(blinded_key.config.exportable, kHardenedBoolTrue);
+  HARDENED_CHECK_EQ(blinded_key->config.exportable, kHardenedBoolTrue);
 
   // Check the lengths of the shares.
-  size_t share_words = launder32(keyblob_share_num_words(blinded_key.config));
+  size_t share_words = launder32(keyblob_share_num_words(blinded_key->config));
   if (launder32(key_share0.len) != share_words ||
       launder32(key_share1.len) != share_words) {
     return OTCRYPTO_BAD_ARGS;
   }
   HARDENED_CHECK_EQ(key_share0.len,
-                    keyblob_share_num_words(blinded_key.config));
+                    keyblob_share_num_words(blinded_key->config));
   HARDENED_CHECK_EQ(key_share1.len,
-                    keyblob_share_num_words(blinded_key.config));
+                    keyblob_share_num_words(blinded_key->config));
+
+  // Randomize the destination buffers.
+  HARDENED_TRY(hardened_memshred(key_share0.data, key_share0.len));
+  HARDENED_TRY(hardened_memshred(key_share1.data, key_share1.len));
 
   // Check the length of the keyblob.
-  size_t keyblob_words = launder32(keyblob_num_words(blinded_key.config));
-  if ((blinded_key.keyblob_length % sizeof(uint32_t) != 0) ||
-      (blinded_key.keyblob_length / sizeof(uint32_t) != keyblob_words)) {
+  size_t keyblob_words = launder32(keyblob_num_words(blinded_key->config));
+  if ((blinded_key->keyblob_length % sizeof(uint32_t) != 0) ||
+      (blinded_key->keyblob_length / sizeof(uint32_t) != keyblob_words)) {
     return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_EQ(blinded_key.keyblob_length,
+  HARDENED_CHECK_EQ(blinded_key->keyblob_length,
                     keyblob_words * sizeof(uint32_t));
 
   // Get pointers to the internal shares and copy them into output buffers.
   uint32_t *keyblob_share0;
   uint32_t *keyblob_share1;
   HARDENED_TRY(
-      keyblob_to_shares(&blinded_key, &keyblob_share0, &keyblob_share1));
-  hardened_memcpy(key_share0.data, keyblob_share0, key_share0.len);
-  hardened_memcpy(key_share1.data, keyblob_share1, key_share1.len);
+      keyblob_to_shares(blinded_key, &keyblob_share0, &keyblob_share1));
+  HARDENED_TRY(
+      hardened_memcpy(key_share0.data, keyblob_share0, key_share0.len));
+  HARDENED_TRY(
+      hardened_memcpy(key_share1.data, keyblob_share1, key_share1.len));
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/impl/key_transport_unittest.cc b/sw/device/lib/crypto/impl/key_transport_unittest.cc
index 7789c1df24326..0062050925841 100644
--- a/sw/device/lib/crypto/impl/key_transport_unittest.cc
+++ b/sw/device/lib/crypto/impl/key_transport_unittest.cc
@@ -152,7 +152,7 @@ TEST(KeyTransport, BlindedKeyImportExport) {
       .data = share1.data(),
       .len = share1.size(),
   };
-  EXPECT_EQ(status_ok(otcrypto_export_blinded_key(blinded_key, share0_buf,
+  EXPECT_EQ(status_ok(otcrypto_export_blinded_key(&blinded_key, share0_buf,
                                                   share1_buf)),
             true);
 
@@ -259,12 +259,12 @@ TEST(KeyTransport, BlindedKeyExportBadLengths) {
 
   // Set a bad length for share 0 and expect the import to fail.
   EXPECT_EQ(status_ok(otcrypto_export_blinded_key(
-                blinded_key, share_with_bad_length, share_with_good_length)),
+                &blinded_key, share_with_bad_length, share_with_good_length)),
             false);
 
   // Set a bad length for share 1 and expect the import to fail.
   EXPECT_EQ(status_ok(otcrypto_export_blinded_key(
-                blinded_key, share_with_good_length, share_with_bad_length)),
+                &blinded_key, share_with_good_length, share_with_bad_length)),
             false);
 
   // Set a bad length for the keyblob and expect the export to fail.
@@ -275,7 +275,7 @@ TEST(KeyTransport, BlindedKeyExportBadLengths) {
   };
   EXPECT_EQ(
       status_ok(otcrypto_export_blinded_key(
-          bad_blinded_key, share_with_good_length, share_with_good_length)),
+          &bad_blinded_key, share_with_good_length, share_with_good_length)),
       false);
 }
 
@@ -315,7 +315,7 @@ TEST(KeyTransport, BlindedKeyExportNotExportable) {
       .data = share1.data(),
       .len = share1.size(),
   };
-  EXPECT_EQ(status_ok(otcrypto_export_blinded_key(blinded_key, share0_buf,
+  EXPECT_EQ(status_ok(otcrypto_export_blinded_key(&blinded_key, share0_buf,
                                                   share1_buf)),
             false);
 }
diff --git a/sw/device/lib/crypto/impl/keyblob.c b/sw/device/lib/crypto/impl/keyblob.c
index 1879964cb4cdf..de3efa0a8107b 100644
--- a/sw/device/lib/crypto/impl/keyblob.c
+++ b/sw/device/lib/crypto/impl/keyblob.c
@@ -6,6 +6,10 @@
 
 #include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/random_order.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
@@ -87,12 +91,19 @@ status_t keyblob_to_shares(const otcrypto_blinded_key_t *key, uint32_t **share0,
   return OTCRYPTO_OK;
 }
 
-void keyblob_from_shares(const uint32_t *share0, const uint32_t *share1,
-                         const otcrypto_key_config_t config,
-                         uint32_t *keyblob) {
+status_t keyblob_from_shares(const uint32_t *share0, const uint32_t *share1,
+                             const otcrypto_key_config_t config,
+                             uint32_t *keyblob) {
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
+  // Randomize the keyblob contents before writing shares.
+  HARDENED_TRY(hardened_memshred(keyblob, keyblob_num_words(config)));
+
   size_t share_words = keyblob_share_num_words(config);
-  hardened_memcpy(keyblob, share0, share_words);
-  hardened_memcpy(keyblob + share_words, share1, share_words);
+  HARDENED_TRY(hardened_memcpy(keyblob, share0, share_words));
+  HARDENED_TRY(hardened_memcpy(keyblob + share_words, share1, share_words));
+  return OTCRYPTO_OK;
 }
 
 status_t keyblob_buffer_to_keymgr_diversification(
@@ -101,8 +112,12 @@ status_t keyblob_buffer_to_keymgr_diversification(
   // Set the version to the first word of the keyblob.
   diversification->version = launder32(keyblob[0]);
 
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Copy the remainder of the keyblob into the salt.
-  hardened_memcpy(diversification->salt, &keyblob[1], kKeymgrSaltNumWords - 1);
+  HARDENED_TRY(hardened_memcpy(diversification->salt, &keyblob[1],
+                               kKeymgrSaltNumWords - 1));
 
   // Set the key mode as the last word of the salt.
   diversification->salt[kKeymgrSaltNumWords - 1] = launder32(mode);
@@ -193,26 +208,28 @@ status_t keyblob_from_key_and_mask(const uint32_t *key, const uint32_t *mask,
   }
   HARDENED_CHECK_EQ(i, key_words);
 
-  keyblob_from_shares(share0, mask, config, keyblob);
-  return OTCRYPTO_OK;
+  return keyblob_from_shares(share0, mask, config, keyblob);
 }
 
-status_t keyblob_remask(otcrypto_blinded_key_t *key, const uint32_t *mask) {
+status_t keyblob_remask(otcrypto_blinded_key_t *key) {
   // Check that the key is masked with XOR.
   HARDENED_TRY(keyblob_ensure_xor_masked(key->config));
 
-  // Double-check the length of the keyblob.
-  HARDENED_TRY(check_keyblob_length(key));
+  // Check that the entropy complex is up and properly configured.
+  HARDENED_TRY(entropy_complex_check());
 
+  uint32_t *share0;
+  uint32_t *share1;
+  HARDENED_TRY(keyblob_to_shares(key, &share0, &share1));
+
+  // Generate a fresh mask the size of one share.
   size_t key_share_words = keyblob_share_num_words(key->config);
-  size_t keyblob_words = keyblob_num_words(key->config);
+  uint32_t mask[key_share_words];
+  HARDENED_TRY(hardened_memshred(mask, key_share_words));
 
-  // Construct a new keyblob by re-masking.
-  size_t i = 0;
-  for (; launder32(i) < keyblob_words; i++) {
-    key->keyblob[i] ^= mask[i % key_share_words];
-  }
-  HARDENED_CHECK_EQ(i, keyblob_words);
+  // XOR each share with the mask.
+  HARDENED_TRY(hardened_xor_in_place(share0, mask, key_share_words));
+  HARDENED_TRY(hardened_xor_in_place(share1, mask, key_share_words));
 
   // Update the key checksum.
   key->checksum = integrity_blinded_checksum(key);
@@ -237,3 +254,9 @@ status_t keyblob_key_unmask(const otcrypto_blinded_key_t *key,
   }
   return OTCRYPTO_OK;
 }
+
+status_t keyblob_sideload_key_otbn(const otcrypto_blinded_key_t *key) {
+  keymgr_diversification_t diversification;
+  HARDENED_TRY(keyblob_to_keymgr_diversification(key, &diversification));
+  return keymgr_generate_key_otbn(diversification);
+}
diff --git a/sw/device/lib/crypto/impl/keyblob.h b/sw/device/lib/crypto/impl/keyblob.h
index ccb85a6c15f08..f1c4d3f73b11b 100644
--- a/sw/device/lib/crypto/impl/keyblob.h
+++ b/sw/device/lib/crypto/impl/keyblob.h
@@ -74,8 +74,9 @@ status_t keyblob_to_shares(const otcrypto_blinded_key_t *key, uint32_t **share0,
  * @param config Key configuration.
  * @param[out] keyblob Destination buffer.
  */
-void keyblob_from_shares(const uint32_t *share0, const uint32_t *share1,
-                         const otcrypto_key_config_t config, uint32_t *keyblob);
+status_t keyblob_from_shares(const uint32_t *share0, const uint32_t *share1,
+                             const otcrypto_key_config_t config,
+                             uint32_t *keyblob);
 
 /**
  * Construct key manager diversification data from a raw keyblob.
@@ -157,12 +158,14 @@ status_t keyblob_from_key_and_mask(const uint32_t *key, const uint32_t *mask,
  * keys are likely to be masked with arithmetic rather than boolean (XOR)
  * schemes, and this function cannot be used for them.
  *
+ * The entropy complex should be up and running when this function is called
+ * because of its internal use of hardening primitives like `random_order`.
+ *
  * @param key Blinded key to re-mask. Modified in-place.
- * @param mask Blinding parameter (fresh random mask).
  * @return Result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-status_t keyblob_remask(otcrypto_blinded_key_t *key, const uint32_t *mask);
+status_t keyblob_remask(otcrypto_blinded_key_t *key);
 
 /**
  * Unmask and return the effective key from blinded key struct.
@@ -184,6 +187,17 @@ OT_WARN_UNUSED_RESULT
 status_t keyblob_key_unmask(const otcrypto_blinded_key_t *key,
                             size_t unmasked_key_len, uint32_t *unmasked_key);
 
+/**
+ * Calls keymgr to sideload key material into OTBN.
+ *
+ * This routine should only ever be called on hardware-backed keys.
+ *
+ * @param key Sideloaded key handle.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+status_t keyblob_sideload_key_otbn(const otcrypto_blinded_key_t *key);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/lib/crypto/impl/keyblob_unittest.cc b/sw/device/lib/crypto/impl/keyblob_unittest.cc
index 6450d16cdbcec..850b7980e434f 100644
--- a/sw/device/lib/crypto/impl/keyblob_unittest.cc
+++ b/sw/device/lib/crypto/impl/keyblob_unittest.cc
@@ -5,9 +5,11 @@
 #include "sw/device/lib/crypto/impl/keyblob.h"
 
 #include <array>
+#include <vector>
 
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/status.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
 
@@ -42,7 +44,7 @@ constexpr otcrypto_key_config_t kConfigOddBytes = {
 constexpr otcrypto_key_config_t kConfigHuge = {
     .version = kOtcryptoLibVersion1,
     .key_mode = kOtcryptoKeyModeAesCtr,
-    .key_length = SIZE_MAX,
+    .key_length = UINT32_MAX,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
 };
@@ -111,9 +113,10 @@ TEST(Keyblob, FromSharesSimpleTest) {
   // Convert shares to keyblob array.
   size_t keyblob_words = keyblob_num_words(kConfigCtr128);
   EXPECT_THAT(keyblob_share_num_words(kConfigCtr128), 4);
-  uint32_t keyblob[keyblob_words] = {0};
-  keyblob_from_shares(test_share0.data(), test_share1.data(), kConfigCtr128,
-                      keyblob);
+  std::vector<uint32_t> keyblob(keyblob_words, 0);
+  status_t err = keyblob_from_shares(test_share0.data(), test_share1.data(),
+                                     kConfigCtr128, keyblob.data());
+  EXPECT_EQ(err.value, OTCRYPTO_OK.value);
 
   // Check that keyblob is both shares concatenated.
   for (size_t i = 0; i < test_share0.size(); i++) {
@@ -135,16 +138,18 @@ TEST(Keyblob, FromToSharesNoop) {
   ASSERT_EQ(test_share1.size(), keyblob_share_num_words(kConfigCtr128));
 
   // Convert shares to keyblob array.
-  size_t keyblob_words = keyblob_num_words(kConfigCtr128);
-  uint32_t keyblob[keyblob_words] = {0};
-  keyblob_from_shares(test_share0.data(), test_share1.data(), kConfigCtr128,
-                      keyblob);
+  uint32_t keyblob_words = keyblob_num_words(kConfigCtr128);
+  uint32_t keyblob_bytes = keyblob_words * sizeof(uint32_t);
+  std::vector<uint32_t> keyblob(keyblob_words, 0);
+  status_t err = keyblob_from_shares(test_share0.data(), test_share1.data(),
+                                     kConfigCtr128, keyblob.data());
+  EXPECT_EQ(err.value, OTCRYPTO_OK.value);
 
   // Construct blinded key.
   otcrypto_blinded_key_t key = {
       .config = kConfigCtr128,
-      .keyblob_length = sizeof(keyblob),
-      .keyblob = keyblob,
+      .keyblob_length = keyblob_bytes,
+      .keyblob = keyblob.data(),
       .checksum = 0,
   };
 
@@ -173,16 +178,17 @@ TEST(Keyblob, FromKeyMaskDoesNotChangeKey) {
   ASSERT_EQ(test_mask.size(), keyblob_share_num_words(kConfigCtr128));
 
   // Convert key/mask to keyblob array.
-  size_t keyblob_words = keyblob_num_words(kConfigCtr128);
-  uint32_t keyblob[keyblob_words] = {0};
+  uint32_t keyblob_words = keyblob_num_words(kConfigCtr128);
+  uint32_t keyblob_bytes = keyblob_words * sizeof(uint32_t);
+  std::vector<uint32_t> keyblob(keyblob_words, 0);
   EXPECT_OK(keyblob_from_key_and_mask(test_key.data(), test_mask.data(),
-                                      kConfigCtr128, keyblob));
+                                      kConfigCtr128, keyblob.data()));
 
   // Construct blinded key.
   otcrypto_blinded_key_t key = {
       .config = kConfigCtr128,
-      .keyblob_length = sizeof(keyblob),
-      .keyblob = keyblob,
+      .keyblob_length = keyblob_bytes,
+      .keyblob = keyblob.data(),
       .checksum = 0,
   };
 
@@ -309,89 +315,80 @@ TEST(Keyblob, ToKeymgrDiversificationDifferentModes) {
 TEST(Keyblob, RemaskDoesNotChangeKey) {
   std::array<uint32_t, 4> test_key = {0x01234567, 0x89abcdef, 0x00010203,
                                       0x04050607};
-  std::array<uint32_t, 4> test_mask0 = {0x08090a0b, 0x0c0d0e0f, 0x10111213,
-                                        0x14151617};
-  std::array<uint32_t, 4> test_mask1 = {0x18191a1b, 0x1c1d1e1f, 0x20212223,
-                                        0x24252627};
+  std::array<uint32_t, 4> test_mask = {0x08090a0b, 0x0c0d0e0f, 0x10111213,
+                                       0x14151617};
 
-  // Test assumption; key and masks are the correct size.
+  // Test assumption; key and mask are the correct size.
   ASSERT_EQ(test_key.size(), keyblob_share_num_words(kConfigCtr128));
-  ASSERT_EQ(test_mask0.size(), keyblob_share_num_words(kConfigCtr128));
-  ASSERT_EQ(test_mask1.size(), keyblob_share_num_words(kConfigCtr128));
+  ASSERT_EQ(test_mask.size(), keyblob_share_num_words(kConfigCtr128));
 
   // Convert key and first mask to keyblob array.
-  size_t keyblob_words = keyblob_num_words(kConfigCtr128);
-  uint32_t keyblob[keyblob_words] = {0};
-  EXPECT_OK(keyblob_from_key_and_mask(test_key.data(), test_mask0.data(),
-                                      kConfigCtr128, keyblob));
+  uint32_t keyblob_words = keyblob_num_words(kConfigCtr128);
+  uint32_t keyblob_bytes = keyblob_words * sizeof(uint32_t);
+  std::vector<uint32_t> keyblob(keyblob_words, 0);
+  EXPECT_OK(keyblob_from_key_and_mask(test_key.data(), test_mask.data(),
+                                      kConfigCtr128, keyblob.data()));
 
   // Construct blinded key.
   otcrypto_blinded_key_t key = {
       .config = kConfigCtr128,
-      .keyblob_length = sizeof(keyblob),
-      .keyblob = keyblob,
+      .keyblob_length = keyblob_bytes,
+      .keyblob = keyblob.data(),
       .checksum = 0,
   };
 
-  // Remask the key using the second mask.
-  EXPECT_OK(keyblob_remask(&key, test_mask1.data()));
+  // Copy the keyblob for later comparison.
+  uint32_t keyblob_copy[ARRAYSIZE(keyblob)];
+  memcpy(keyblob_copy, keyblob.data(), sizeof(keyblob));
 
-  // Retrieve pointers to each share.
-  uint32_t *share0;
-  uint32_t *share1;
-  EXPECT_OK(keyblob_to_shares(&key, &share0, &share1));
+  // Remask the key.
+  EXPECT_OK(keyblob_remask(&key));
 
-  // Unmask the key and check that it matches the original.
-  for (size_t i = 0; i < test_key.size(); i++) {
-    uint32_t share0 = keyblob[i];
-    uint32_t share1 = keyblob[test_key.size() + i];
-    EXPECT_EQ(share1, test_mask0[i] ^ test_mask1[i]);
-    EXPECT_EQ(share0 ^ share1, test_key[i]);
+  // Check that every word of the keyblob changed.
+  for (size_t i = 0; i < ARRAYSIZE(keyblob); i++) {
+    EXPECT_NE(keyblob[i], keyblob_copy[i]);
   }
+
+  // Unmask the key and check that it matches the original.
+  uint32_t unmasked_key[test_key.size()];
+  EXPECT_OK(keyblob_key_unmask(&key, test_key.size(), unmasked_key));
+  EXPECT_THAT(unmasked_key, testing::ElementsAreArray(test_key));
 }
 
-TEST(Keyblob, RemaskWithZero) {
+TEST(Keyblob, RemaskPassesIntegrity) {
   std::array<uint32_t, 4> test_key = {0x01234567, 0x89abcdef, 0x00010203,
                                       0x04050607};
-  std::array<uint32_t, 4> test_mask0 = {0x08090a0b, 0x0c0d0e0f, 0x10111213,
-                                        0x14151617};
-  std::array<uint32_t, 4> test_mask1 = {0x18191a1b, 0x1c1d1e1f, 0x20212223,
-                                        0x24252627};
+  std::array<uint32_t, 4> test_mask = {0x08090a0b, 0x0c0d0e0f, 0x10111213,
+                                       0x14151617};
 
-  // Test assumption; key and masks are the correct size.
+  // Test assumption; key and mask are the correct size.
   ASSERT_EQ(test_key.size(), keyblob_share_num_words(kConfigCtr128));
-  ASSERT_EQ(test_mask0.size(), keyblob_share_num_words(kConfigCtr128));
-  ASSERT_EQ(test_mask1.size(), keyblob_share_num_words(kConfigCtr128));
+  ASSERT_EQ(test_mask.size(), keyblob_share_num_words(kConfigCtr128));
 
   // Convert key and first mask to keyblob array.
-  size_t keyblob_words = keyblob_num_words(kConfigCtr128);
-  uint32_t keyblob[keyblob_words] = {0};
-  EXPECT_OK(keyblob_from_key_and_mask(test_key.data(), test_mask0.data(),
-                                      kConfigCtr128, keyblob));
+  uint32_t keyblob_words = keyblob_num_words(kConfigCtr128);
+  uint32_t keyblob_bytes = keyblob_words * sizeof(uint32_t);
+  std::vector<uint32_t> keyblob(keyblob_words, 0);
+  EXPECT_OK(keyblob_from_key_and_mask(test_key.data(), test_mask.data(),
+                                      kConfigCtr128, keyblob.data()));
 
   // Construct blinded key.
   otcrypto_blinded_key_t key = {
       .config = kConfigCtr128,
-      .keyblob_length = sizeof(keyblob),
-      .keyblob = keyblob,
+      .keyblob_length = keyblob_bytes,
+      .keyblob = keyblob.data(),
       .checksum = 0,
   };
 
-  // Remask the key using the second mask.
-  EXPECT_OK(keyblob_remask(&key, test_mask1.data()));
+  // Copy the keyblob for later comparison.
+  uint32_t keyblob_copy[ARRAYSIZE(keyblob)];
+  memcpy(keyblob_copy, keyblob.data(), sizeof(keyblob));
 
-  // Retrieve pointers to each share.
-  uint32_t *share0;
-  uint32_t *share1;
-  EXPECT_OK(keyblob_to_shares(&key, &share0, &share1));
+  // Remask the key.
+  EXPECT_OK(keyblob_remask(&key));
 
-  // Unmask the key and check that it matches the original.
-  for (size_t i = 0; i < test_key.size(); i++) {
-    uint32_t share0 = keyblob[i];
-    uint32_t share1 = keyblob[test_key.size() + i];
-    EXPECT_EQ(share1, test_mask0[i] ^ test_mask1[i]);
-    EXPECT_EQ(share0 ^ share1, test_key[i]);
-  }
+  // Check that the integrity checksum was updated.
+  EXPECT_EQ(integrity_blinded_key_check(&key), kHardenedBoolTrue);
 }
 
 }  // namespace
diff --git a/sw/device/lib/crypto/impl/kmac.c b/sw/device/lib/crypto/impl/kmac.c
new file mode 100644
index 0000000000000..c6e3cc7eb9382
--- /dev/null
+++ b/sw/device/lib/crypto/impl/kmac.c
@@ -0,0 +1,114 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/kmac.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/kmac.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('k', 'm', 'c')
+
+otcrypto_status_t otcrypto_kmac(otcrypto_blinded_key_t *key,
+                                otcrypto_const_byte_buf_t input_message,
+                                otcrypto_const_byte_buf_t customization_string,
+                                size_t required_output_len,
+                                otcrypto_word32_buf_t tag) {
+  // TODO (#16410) Revisit/complete error checks
+
+  // Check for null pointers.
+  if (key == NULL || key->keyblob == NULL || tag.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null input message with nonzero length.
+  if (input_message.data == NULL && input_message.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null customization string with nonzero length.
+  if (customization_string.data == NULL && customization_string.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure that tag buffer length and `required_output_len` match each other.
+  if (required_output_len != tag.len * sizeof(uint32_t) ||
+      required_output_len == 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Ensure the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
+  size_t key_len = keyblob_share_num_words(key->config) * sizeof(uint32_t);
+
+  // Check `key_len` is valid/supported by KMAC HWIP.
+  HARDENED_TRY(kmac_key_length_check(key_len));
+
+  // Check the integrity of the blinded key.
+  if (launder32(integrity_blinded_key_check(key)) != kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(key), kHardenedBoolTrue);
+
+  kmac_blinded_key_t kmac_key = {
+      .share0 = NULL,
+      .share1 = NULL,
+      .hw_backed = key->config.hw_backed,
+      .len = key_len,
+  };
+
+  if (key->config.hw_backed == kHardenedBoolTrue) {
+    if (key_len != kKmacSideloadKeyLength / 8) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+    // Configure keymgr with diversification input and then generate the
+    // sideload key.
+    keymgr_diversification_t diversification;
+    // Diversification call also checks that `key->keyblob_length` is 8 words
+    // long.
+    HARDENED_TRY(keyblob_to_keymgr_diversification(key, &diversification));
+    HARDENED_TRY(keymgr_generate_key_kmac(diversification));
+  } else if (key->config.hw_backed == kHardenedBoolFalse) {
+    // Remask the key.
+    HARDENED_TRY(keyblob_remask(key));
+
+    // Check `key_len` matches `keyblob_length`.
+    if (key->keyblob_length != 2 * key->config.key_length) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+    HARDENED_TRY(keyblob_to_shares(key, &kmac_key.share0, &kmac_key.share1));
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  switch (key->config.key_mode) {
+    case kOtcryptoKeyModeKmac128:
+      HARDENED_TRY(kmac_kmac_128(
+          &kmac_key, /*masked_digest=*/kHardenedBoolFalse, input_message.data,
+          input_message.len, customization_string.data,
+          customization_string.len, tag.data, tag.len));
+      break;
+    case kOtcryptoKeyModeKmac256:
+      HARDENED_TRY(kmac_kmac_256(
+          &kmac_key, /*masked_digest=*/kHardenedBoolFalse, input_message.data,
+          input_message.len, customization_string.data,
+          customization_string.len, tag.data, tag.len));
+      break;
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (key->config.hw_backed == kHardenedBoolTrue) {
+    HARDENED_TRY(keymgr_sideload_clear_kmac());
+  } else if (key->config.hw_backed != kHardenedBoolFalse) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/kmac_kdf.c b/sw/device/lib/crypto/impl/kmac_kdf.c
new file mode 100644
index 0000000000000..566c571bf7656
--- /dev/null
+++ b/sw/device/lib/crypto/impl/kmac_kdf.c
@@ -0,0 +1,151 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/kmac_kdf.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/crypto/drivers/kmac.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('k', 'k', 'd')
+
+otcrypto_status_t otcrypto_kmac_kdf(
+    otcrypto_blinded_key_t *key_derivation_key,
+    const otcrypto_const_byte_buf_t label,
+    const otcrypto_const_byte_buf_t context,
+    otcrypto_blinded_key_t *output_key_material) {
+  // Check NULL pointers.
+  if (key_derivation_key->keyblob == NULL || output_key_material == NULL ||
+      output_key_material->keyblob == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null label with nonzero length.
+  if (label.data == NULL && label.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  // Because of KMAC HWIPs prefix limitation, `label` should not exceed
+  // `kKmacCustStrMaxSize` bytes.
+  if (label.len > kKmacCustStrMaxSize) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check for null context with nonzero length.
+  if (context.data == NULL && context.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Check the private key checksum.
+  if (launder32(integrity_blinded_key_check(key_derivation_key)) !=
+      kHardenedBoolTrue) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(key_derivation_key),
+                    kHardenedBoolTrue);
+
+  // Check `key_len` is supported by KMAC HWIP.
+  // The set of supported key sizes is {128, 192, 256, 384, 512}.
+  HARDENED_TRY(kmac_key_length_check(key_derivation_key->config.key_length));
+
+  kmac_blinded_key_t kmac_key = {
+      .share0 = NULL,
+      .share1 = NULL,
+      .hw_backed = key_derivation_key->config.hw_backed,
+      .len = key_derivation_key->config.key_length,
+  };
+
+  // Validate key length of `key_derivation_key`.
+  if (key_derivation_key->config.hw_backed == kHardenedBoolTrue) {
+    // Check that 1) key size matches sideload port size, 2) keyblob length
+    // matches diversification length.
+    if (keyblob_share_num_words(key_derivation_key->config) *
+            sizeof(uint32_t) !=
+        kKmacSideloadKeyLength / 8) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+    // Configure keymgr with diversification input and then generate the
+    // sideload key.
+    keymgr_diversification_t diversification;
+    // Diversification call also checks that
+    // `key_derivation_key->keyblob_length` is 8 words long.
+    HARDENED_TRY(keyblob_to_keymgr_diversification(key_derivation_key,
+                                                   &diversification));
+    HARDENED_TRY(keymgr_generate_key_kmac(diversification));
+  } else if (key_derivation_key->config.hw_backed == kHardenedBoolFalse) {
+    // Remask the key.
+    HARDENED_TRY(keyblob_remask(key_derivation_key));
+
+    if (key_derivation_key->keyblob_length !=
+        keyblob_num_words(key_derivation_key->config) * sizeof(uint32_t)) {
+      return OTCRYPTO_BAD_ARGS;
+    }
+    HARDENED_TRY(keyblob_to_shares(key_derivation_key, &kmac_key.share0,
+                                   &kmac_key.share1));
+  } else {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // At the moment, `kmac_kmac_128/256` only supports word-sized digest lengths.
+  if (output_key_material->config.key_length % sizeof(uint32_t) != 0) {
+    return OTCRYPTO_NOT_IMPLEMENTED;
+  }
+
+  // Output key cannot be hardware-backed.
+  if (output_key_material->config.hw_backed != kHardenedBoolFalse) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(output_key_material->config.hw_backed, kHardenedBoolFalse);
+
+  // Check the keyblob length.
+  if (output_key_material->keyblob_length !=
+      keyblob_num_words(output_key_material->config) * sizeof(uint32_t)) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Randomize the keyblob memory.
+  HARDENED_TRY(
+      hardened_memshred(output_key_material->keyblob,
+                        keyblob_num_words(output_key_material->config)));
+
+  switch (launder32(key_derivation_key->config.key_mode)) {
+    case kOtcryptoKeyModeKdfKmac128: {
+      HARDENED_CHECK_EQ(key_derivation_key->config.key_mode,
+                        kOtcryptoKeyModeKdfKmac128);
+      // No need to further check key size against security level because
+      // `kmac_key_length_check` ensures that the key is at least 128-bit.
+      HARDENED_TRY(kmac_kmac_128(
+          &kmac_key, /*masked_digest=*/kHardenedBoolTrue, context.data,
+          context.len, label.data, label.len, output_key_material->keyblob,
+          output_key_material->config.key_length / sizeof(uint32_t)));
+      break;
+    }
+    case kOtcryptoKeyModeKdfKmac256: {
+      HARDENED_CHECK_EQ(key_derivation_key->config.key_mode,
+                        kOtcryptoKeyModeKdfKmac256);
+      // Check that key size matches the security strength. It should be at
+      // least 256-bit.
+      if (key_derivation_key->config.key_length < 256 / 8) {
+        return OTCRYPTO_BAD_ARGS;
+      }
+      HARDENED_TRY(kmac_kmac_256(
+          &kmac_key, /*masked_digest=*/kHardenedBoolTrue, context.data,
+          context.len, label.data, label.len, output_key_material->keyblob,
+          output_key_material->config.key_length / sizeof(uint32_t)));
+      break;
+    }
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  output_key_material->checksum =
+      integrity_blinded_checksum(output_key_material);
+
+  // Clear the KMAC sideload slot in case the key was sideloaded.
+  return keymgr_sideload_clear_kmac();
+}
diff --git a/sw/device/lib/crypto/impl/mac.c b/sw/device/lib/crypto/impl/mac.c
deleted file mode 100644
index edbd99e893e11..0000000000000
--- a/sw/device/lib/crypto/impl/mac.c
+++ /dev/null
@@ -1,369 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/include/mac.h"
-
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/hmac.h"
-#include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/impl/status.h"
-#include "sw/device/lib/crypto/include/hash.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('m', 'a', 'c')
-
-/**
- * Ensure that the hash context is large enough for HMAC driver struct.
- */
-static_assert(
-    sizeof(otcrypto_hmac_context_t) >= sizeof(hmac_ctx_t),
-    "`otcrypto_hash_context_t` must be big enough to hold `hmac_ctx_t`.");
-
-/**
- * Ensure that HMAC driver struct is suitable for `hardened_memcpy()`.
- */
-static_assert(sizeof(hmac_ctx_t) % sizeof(uint32_t) == 0,
-              "Size of `hmac_ctx_t` must be a multiple of the word size for "
-              "`hardened_memcpy()`");
-
-/**
- * Save the internal HMAC driver context to a generic Hmac context.
- *
- * @param[out] ctx Generic hash context to copy to.
- * @param hmac_ctx The internal context object from HMAC driver.
- */
-static void hmac_ctx_save(otcrypto_hmac_context_t *restrict ctx,
-                          const hmac_ctx_t *restrict hmac_ctx) {
-  // As per the `hardened_memcpy()` documentation, it is OK to cast to
-  // `uint32_t *` here as long as `state` is word-aligned, which it must be
-  // because all its fields are.
-  hardened_memcpy(ctx->data, (uint32_t *)hmac_ctx,
-                  sizeof(hmac_ctx_t) / sizeof(uint32_t));
-}
-
-/**
- * Restore an internal HMAC driver context from a generic Hmac context.
- *
- * @param ctx Generic hash context to restore from.
- * @param[out] hmac_ctx Destination HMAC driver context object.
- */
-static void hmac_ctx_restore(const otcrypto_hmac_context_t *restrict ctx,
-                             hmac_ctx_t *restrict hmac_ctx) {
-  // As per the `hardened_memcpy()` documentation, it is OK to cast to
-  // `uint32_t *` here as long as `state` is word-aligned, which it must be
-  // because all its fields are.
-  hardened_memcpy((uint32_t *)hmac_ctx, ctx->data,
-                  sizeof(hmac_ctx_t) / sizeof(uint32_t));
-}
-
-/**
- * For given `key_mode`, return the corresponding driver-level `hmac_mode` and
- * `block_size`. `block_size` is the internal block size of the hash function
- * implied by `hash_mode`, and its unit is words.
- *
- * This function must only be used with HMAC key modes, otherwise an error
- * is returned.
- *
- * @param key_mode The input key mode.
- * @param[out] hmac_mode HMAC driver-level equivalent of `key_mode`.
- * @param[out] block_size The internal block size of the hash function
- * associated with `hmac_mode`.
- * @return Result of the operation.
- */
-static status_t get_hmac_mode(otcrypto_key_mode_t key_mode,
-                              hmac_mode_t *hmac_mode, size_t *block_size) {
-  switch (key_mode) {
-    case kOtcryptoKeyModeHmacSha256:
-      *hmac_mode = kHmacModeHmac256;
-      *block_size = kHmacSha256BlockWords;
-      break;
-    case kOtcryptoKeyModeHmacSha384:
-      *hmac_mode = kHmacModeHmac384;
-      // Note that HMAC-384 and HMAC-512 have the same internal block size.
-      *block_size = kHmacSha512BlockWords;
-      break;
-    case kOtcryptoKeyModeHmacSha512:
-      *hmac_mode = kHmacModeHmac512;
-      *block_size = kHmacSha512BlockWords;
-      break;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-  return OTCRYPTO_OK;
-}
-
-/**
- * Pad or hash HMAC key to full block. I.e. compute K0 as defined in FIPS 198-1,
- * Section 4, Steps 1-3.
- *
- * For HMAC-256, `processed_key` is 512 bits, and for HMAC-384/512,
- * `processed_key` is 1024 bits.
- *
- * The caller must allocate `processed_key` buffer with internal block size.
- *
- * @param key The blinded input key.
- * @param[out] processed_key Padding/hashed key whose size matches the internal
- * block size of the hash function.
- * @return Result of the operation.
- */
-static status_t hmac_key_process(const otcrypto_blinded_key_t *key,
-                                 uint32_t *processed_key) {
-  otcrypto_hash_mode_t hash_mode;
-  size_t block_size;
-  size_t digest_size;
-  switch (key->config.key_mode) {
-    case kOtcryptoKeyModeHmacSha256:
-      hash_mode = kOtcryptoHashModeSha256;
-      block_size = kHmacSha256BlockWords;
-      digest_size = kHmacSha256DigestWords;
-      break;
-    case kOtcryptoKeyModeHmacSha384:
-      hash_mode = kOtcryptoHashModeSha384;
-      // Note that HMAC-384 and HMAC-512 have the same internal block size.
-      block_size = kHmacSha512BlockWords;
-      digest_size = kHmacSha384DigestWords;
-      break;
-    case kOtcryptoKeyModeHmacSha512:
-      hash_mode = kOtcryptoHashModeSha512;
-      block_size = kHmacSha512BlockWords;
-      digest_size = kHmacSha512DigestWords;
-      break;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  // HMAC HWIP does not support masking, so we need to unmask the key.
-  size_t unmasked_key_len = keyblob_share_num_words(key->config);
-  uint32_t unmasked_key[unmasked_key_len];
-  HARDENED_TRY(keyblob_key_unmask(key, unmasked_key_len, unmasked_key));
-
-  // Pre-populate with 0s, in order to pad keys smaller than the internal
-  // block size, according to FIPS 198-1, Section 4.
-  memset(processed_key, 0, block_size * sizeof(uint32_t));
-  // If the key is larger than the internal block size, we need to hash it
-  // according to FIPS 198-1, Section 4, Step 2.
-  if (key->config.key_length > block_size * sizeof(uint32_t)) {
-    otcrypto_hash_digest_t key_digest = {
-        .mode = hash_mode,
-        .data = processed_key,
-        .len = digest_size,
-    };
-    otcrypto_const_byte_buf_t msg_buf = {
-        .len = key->config.key_length,
-        .data = (unsigned char *)unmasked_key,
-    };
-    HARDENED_TRY(otcrypto_hash(msg_buf, key_digest));
-  } else {
-    hardened_memcpy(processed_key, unmasked_key, unmasked_key_len);
-    // If the key size isn't a multiple of the word size, zero the last few
-    // bytes.
-    size_t offset = key->config.key_length % sizeof(uint32_t);
-    if (offset != 0) {
-      unsigned char *key_end_ptr =
-          (unsigned char *)&processed_key[unmasked_key_len];
-      size_t num_zero_bytes = sizeof(uint32_t) - offset;
-      memset(key_end_ptr - num_zero_bytes, 0, num_zero_bytes);
-    }
-  }
-  return OTCRYPTO_OK;
-}
-
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_hmac(const otcrypto_blinded_key_t *key,
-                                otcrypto_const_byte_buf_t input_message,
-                                otcrypto_word32_buf_t tag) {
-  // Validate key struct.
-  if (key == NULL || key->keyblob == NULL || tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // HMAC HWIP is not masked and it does not have sideload support, so the
-  // following conditions return not implemented.
-  if (key->config.hw_backed != kHardenedBoolFalse) {
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-  if (key->config.security_level != kOtcryptoKeySecurityLevelLow) {
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-
-  // Check for null input message with nonzero length.
-  if (input_message.data == NULL && input_message.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  hmac_mode_t hmac_mode;
-  size_t block_size;
-  HARDENED_TRY(get_hmac_mode(key->config.key_mode, &hmac_mode, &block_size));
-
-  uint32_t processed_key[block_size];
-  HARDENED_TRY(hmac_key_process(key, processed_key));
-
-  return hmac(hmac_mode, processed_key, block_size, input_message.data,
-              input_message.len, tag.data, tag.len);
-}
-
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_kmac(const otcrypto_blinded_key_t *key,
-                                otcrypto_const_byte_buf_t input_message,
-                                otcrypto_kmac_mode_t kmac_mode,
-                                otcrypto_const_byte_buf_t customization_string,
-                                size_t required_output_len,
-                                otcrypto_word32_buf_t tag) {
-  // TODO (#16410) Revisit/complete error checks
-
-  // Check for null pointers.
-  if (key == NULL || key->keyblob == NULL || tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null input message with nonzero length.
-  if (input_message.data == NULL && input_message.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null customization string with nonzero length.
-  if (customization_string.data == NULL && customization_string.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Ensure that tag buffer length and `required_output_len` match each other.
-  if (required_output_len != tag.len * sizeof(uint32_t) ||
-      required_output_len == 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  size_t key_len = keyblob_share_num_words(key->config) * sizeof(uint32_t);
-
-  // Check `key_len` is valid/supported by KMAC HWIP.
-  HARDENED_TRY(kmac_key_length_check(key_len));
-
-  // Check the integrity of the blinded key.
-  if (integrity_blinded_key_check(key) != kHardenedBoolTrue) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  kmac_blinded_key_t kmac_key = {
-      .share0 = NULL,
-      .share1 = NULL,
-      .hw_backed = key->config.hw_backed,
-      .len = key_len,
-  };
-
-  if (key->config.hw_backed == kHardenedBoolTrue) {
-    if (key_len != kKmacSideloadKeyLength / 8) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    // Configure keymgr with diversification input and then generate the
-    // sideload key.
-    keymgr_diversification_t diversification;
-    // Diversification call also checks that `key->keyblob_length` is 8 words
-    // long.
-    HARDENED_TRY(keyblob_to_keymgr_diversification(key, &diversification));
-    HARDENED_TRY(keymgr_generate_key_kmac(diversification));
-  } else if (key->config.hw_backed == kHardenedBoolFalse) {
-    // Check `key_len` matches `keyblob_length`.
-    if (key->keyblob_length != 2 * key->config.key_length) {
-      return OTCRYPTO_BAD_ARGS;
-    }
-    HARDENED_TRY(keyblob_to_shares(key, &kmac_key.share0, &kmac_key.share1));
-  } else {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  switch (kmac_mode) {
-    case kOtcryptoKmacModeKmac128:
-      // Check `key_mode` matches `mac_mode`
-      if (key->config.key_mode != kOtcryptoKeyModeKmac128) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      HARDENED_TRY(kmac_kmac_128(&kmac_key, input_message.data,
-                                 input_message.len, customization_string.data,
-                                 customization_string.len, tag.data, tag.len));
-      break;
-    case kOtcryptoKmacModeKmac256:
-      // Check `key_mode` matches `mac_mode`
-      if (key->config.key_mode != kOtcryptoKeyModeKmac256) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-
-      HARDENED_TRY(kmac_kmac_256(&kmac_key, input_message.data,
-                                 input_message.len, customization_string.data,
-                                 customization_string.len, tag.data, tag.len));
-      break;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-
-  if (key->config.hw_backed == kHardenedBoolTrue) {
-    HARDENED_TRY(keymgr_sideload_clear_kmac());
-  } else if (key->config.hw_backed != kHardenedBoolFalse) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_hmac_init(otcrypto_hmac_context_t *ctx,
-                                     const otcrypto_blinded_key_t *key) {
-  if (ctx == NULL || key == NULL || key->keyblob == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  if (key->config.hw_backed != kHardenedBoolFalse) {
-    // TODO(#15590): Add support for sideloaded keys via a custom OTBN program.
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-  if (key->config.security_level != kOtcryptoKeySecurityLevelLow) {
-    // TODO: Harden SHA2 implementations.
-    return OTCRYPTO_NOT_IMPLEMENTED;
-  }
-
-  // Ensure the key is for HMAC and the hash function matches, and remember the
-  // digest and message block sizes.
-  hmac_mode_t hmac_mode;
-  size_t block_size;
-  HARDENED_TRY(get_hmac_mode(key->config.key_mode, &hmac_mode, &block_size));
-
-  uint32_t processed_key[block_size];
-  HARDENED_TRY(hmac_key_process(key, processed_key));
-
-  hmac_ctx_t hmac_ctx;
-  HARDENED_TRY(hmac_init(&hmac_ctx, hmac_mode, processed_key, block_size));
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_hmac_update(
-    otcrypto_hmac_context_t *const ctx,
-    otcrypto_const_byte_buf_t input_message) {
-  if (ctx == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Check for null input message with nonzero length.
-  if (input_message.data == NULL && input_message.len != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  hmac_ctx_t hmac_ctx;
-  hmac_ctx_restore(ctx, &hmac_ctx);
-  HARDENED_TRY(hmac_update(&hmac_ctx, input_message.data, input_message.len));
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
-
-otcrypto_status_t otcrypto_hmac_final(otcrypto_hmac_context_t *const ctx,
-                                      otcrypto_word32_buf_t tag) {
-  if (ctx == NULL || tag.data == NULL) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  hmac_ctx_t hmac_ctx;
-  hmac_ctx_restore(ctx, &hmac_ctx);
-  HARDENED_TRY(hmac_final(&hmac_ctx, tag.data, tag.len));
-  // TODO(#23191): Clear `ctx`.
-  hmac_ctx_save(ctx, &hmac_ctx);
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/rsa.c b/sw/device/lib/crypto/impl/rsa.c
index a2df264b37040..c9b02a6dfb6a4 100644
--- a/sw/device/lib/crypto/impl/rsa.c
+++ b/sw/device/lib/crypto/impl/rsa.c
@@ -5,11 +5,13 @@
 #include "sw/device/lib/crypto/include/rsa.h"
 
 #include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/math.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_encryption.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_keygen.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_signature.h"
+#include "sw/device/lib/crypto/impl/rsa/run_rsa.h"
+#include "sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.h"
 #include "sw/device/lib/crypto/impl/status.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
 
@@ -70,10 +72,13 @@ static status_t rsa_mode_check(const otcrypto_key_mode_t mode) {
 
 otcrypto_status_t otcrypto_rsa_public_key_construct(
     otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
-    uint32_t exponent, otcrypto_unblinded_key_t *public_key) {
+    otcrypto_unblinded_key_t *public_key) {
   if (modulus.data == NULL || public_key == NULL || public_key->key == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
   HARDENED_TRY(rsa_mode_check(public_key->key_mode));
 
   switch (size) {
@@ -83,8 +88,7 @@ otcrypto_status_t otcrypto_rsa_public_key_construct(
         return OTCRYPTO_BAD_ARGS;
       }
       rsa_2048_public_key_t *pk = (rsa_2048_public_key_t *)public_key->key;
-      pk->e = exponent;
-      hardened_memcpy(pk->n.data, modulus.data, modulus.len);
+      HARDENED_TRY(hardened_memcpy(pk->n.data, modulus.data, modulus.len));
       break;
     }
     case kOtcryptoRsaSize3072: {
@@ -93,8 +97,7 @@ otcrypto_status_t otcrypto_rsa_public_key_construct(
         return OTCRYPTO_BAD_ARGS;
       }
       rsa_3072_public_key_t *pk = (rsa_3072_public_key_t *)public_key->key;
-      pk->e = exponent;
-      hardened_memcpy(pk->n.data, modulus.data, modulus.len);
+      HARDENED_TRY(hardened_memcpy(pk->n.data, modulus.data, modulus.len));
       break;
     }
     case kOtcryptoRsaSize4096: {
@@ -103,8 +106,7 @@ otcrypto_status_t otcrypto_rsa_public_key_construct(
         return OTCRYPTO_BAD_ARGS;
       }
       rsa_4096_public_key_t *pk = (rsa_4096_public_key_t *)public_key->key;
-      pk->e = exponent;
-      hardened_memcpy(pk->n.data, modulus.data, modulus.len);
+      HARDENED_TRY(hardened_memcpy(pk->n.data, modulus.data, modulus.len));
       break;
     }
     default:
@@ -171,13 +173,16 @@ static status_t private_key_structural_check(
 }
 
 otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t d_share0, otcrypto_const_word32_buf_t d_share1,
     otcrypto_blinded_key_t *private_key) {
   if (modulus.data == NULL || d_share0.data == NULL || d_share1.data == NULL ||
       private_key == NULL || private_key->keyblob == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
   HARDENED_TRY(rsa_mode_check(private_key->config.key_mode));
 
   // Ensure that the length of the private exponent shares matches the length
@@ -186,15 +191,14 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
     return OTCRYPTO_BAD_ARGS;
   }
 
-  // Check the public exponent is odd and greater than 2^16 (see FIPS 186-5,
-  // section A.1.1).
-  if ((e & 1) != 1 || e >> 16 == 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
   // Check the mode and lengths for the private key.
   HARDENED_TRY(private_key_structural_check(size, private_key));
 
+  // Randomize the keyblob.
+  HARDENED_TRY(hardened_memshred(
+      private_key->keyblob,
+      ceil_div(private_key->keyblob_length, sizeof(uint32_t))));
+
   switch (size) {
     case kOtcryptoRsaSize2048: {
       if (private_key->keyblob_length != sizeof(rsa_2048_private_key_t) ||
@@ -203,11 +207,12 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
       }
       rsa_2048_private_key_t *sk =
           (rsa_2048_private_key_t *)private_key->keyblob;
-      hardened_memcpy(sk->n.data, modulus.data, modulus.len);
-      hardened_memcpy(sk->d.data, d_share0.data, d_share0.len);
+      HARDENED_TRY(hardened_memcpy(sk->n.data, modulus.data, modulus.len));
+      HARDENED_TRY(hardened_memcpy(sk->d0.data, d_share0.data, d_share0.len));
       // TODO: RSA keys are currently unblinded, so combine the shares.
       for (size_t i = 0; i < d_share1.len; i++) {
-        sk->d.data[i] ^= d_share1.data[i];
+        sk->d0.data[i] ^= d_share1.data[i];
+        sk->d1.data[i] = 0x0;
       }
       break;
     }
@@ -218,11 +223,12 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
       }
       rsa_3072_private_key_t *sk =
           (rsa_3072_private_key_t *)private_key->keyblob;
-      hardened_memcpy(sk->n.data, modulus.data, modulus.len);
-      hardened_memcpy(sk->d.data, d_share0.data, d_share0.len);
+      HARDENED_TRY(hardened_memcpy(sk->n.data, modulus.data, modulus.len));
+      HARDENED_TRY(hardened_memcpy(sk->d0.data, d_share0.data, d_share0.len));
       // TODO: RSA keys are currently unblinded, so combine the shares.
       for (size_t i = 0; i < d_share1.len; i++) {
-        sk->d.data[i] ^= d_share1.data[i];
+        sk->d0.data[i] ^= d_share1.data[i];
+        sk->d1.data[i] = 0x0;
       }
       break;
     }
@@ -233,11 +239,12 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
       }
       rsa_4096_private_key_t *sk =
           (rsa_4096_private_key_t *)private_key->keyblob;
-      hardened_memcpy(sk->n.data, modulus.data, modulus.len);
-      hardened_memcpy(sk->d.data, d_share0.data, d_share0.len);
+      HARDENED_TRY(hardened_memcpy(sk->n.data, modulus.data, modulus.len));
+      HARDENED_TRY(hardened_memcpy(sk->d0.data, d_share0.data, d_share0.len));
       // TODO: RSA keys are currently unblinded, so combine the shares.
       for (size_t i = 0; i < d_share1.len; i++) {
-        sk->d.data[i] ^= d_share1.data[i];
+        sk->d0.data[i] ^= d_share1.data[i];
+        sk->d1.data[i] = 0x0;
       }
       break;
     }
@@ -250,15 +257,18 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
 }
 
 otcrypto_status_t otcrypto_rsa_keypair_from_cofactor(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t cofactor_share0,
     otcrypto_const_word32_buf_t cofactor_share1,
     otcrypto_unblinded_key_t *public_key, otcrypto_blinded_key_t *private_key) {
   HARDENED_TRY(otcrypto_rsa_keypair_from_cofactor_async_start(
-      size, modulus, e, cofactor_share0, cofactor_share1));
+      size, modulus, cofactor_share0, cofactor_share1));
   HARDENED_TRY(otcrypto_rsa_keypair_from_cofactor_async_finalize(public_key,
                                                                  private_key));
 
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Interpret the recomputed public key. Double-check the lengths to be safe,
   // but they should have been checked above already.
   hardened_bool_t modulus_eq = kHardenedBoolFalse;
@@ -437,6 +447,10 @@ otcrypto_status_t otcrypto_rsa_keygen_async_finalize(
       private_key->keyblob == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Infer the RSA size from the public key modulus.
   otcrypto_rsa_size_t size;
   HARDENED_TRY(rsa_size_from_public_key(public_key, &size));
@@ -447,6 +461,11 @@ otcrypto_status_t otcrypto_rsa_keygen_async_finalize(
   // Check the caller-provided private key buffer.
   HARDENED_TRY(private_key_structural_check(size, private_key));
 
+  // Randomize the keyblob memory.
+  HARDENED_TRY(hardened_memshred(
+      private_key->keyblob,
+      ceil_div(private_key->keyblob_length, sizeof(uint32_t))));
+
   // Call the required finalize() operation.
   switch (size) {
     case kOtcryptoRsaSize2048: {
@@ -486,7 +505,7 @@ otcrypto_status_t otcrypto_rsa_keygen_async_finalize(
 }
 
 otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_start(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t cofactor_share0,
     otcrypto_const_word32_buf_t cofactor_share1) {
   if (modulus.data == NULL || cofactor_share0.data == NULL ||
@@ -494,6 +513,9 @@ otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_start(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Entropy complex must be initialized for `hardened_memcpy`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Ensure that the length of the cofactor shares is half the length
   // of the modulus.
   if (cofactor_share0.len != modulus.len / 2 ||
@@ -514,8 +536,7 @@ otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_start(
         cf->data[i] ^= cofactor_share1.data[i];
       }
       rsa_2048_public_key_t pk;
-      hardened_memcpy(pk.n.data, modulus.data, modulus.len);
-      pk.e = e;
+      HARDENED_TRY(hardened_memcpy(pk.n.data, modulus.data, modulus.len));
       return rsa_keygen_from_cofactor_2048_start(&pk, cf);
     }
     case kOtcryptoRsaSize3072: {
@@ -540,6 +561,10 @@ otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_finalize(
       private_key->keyblob == NULL) {
     return OTCRYPTO_BAD_ARGS;
   }
+
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Infer the RSA size from the public key modulus.
   otcrypto_rsa_size_t size;
   HARDENED_TRY(rsa_size_from_public_key(public_key, &size));
@@ -550,6 +575,11 @@ otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_finalize(
   // Check the caller-provided private key buffer.
   HARDENED_TRY(private_key_structural_check(size, private_key));
 
+  // Randomize the keyblob memory.
+  HARDENED_TRY(hardened_memshred(
+      private_key->keyblob,
+      ceil_div(private_key->keyblob_length, sizeof(uint32_t))));
+
   // Call the required finalize() operation.
   switch (size) {
     case kOtcryptoRsaSize2048: {
@@ -621,6 +651,9 @@ otcrypto_status_t otcrypto_rsa_sign_async_start(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Infer the RSA size from the private key.
   otcrypto_rsa_size_t size;
   HARDENED_TRY(rsa_size_from_private_key(private_key, &size));
@@ -675,6 +708,9 @@ otcrypto_status_t otcrypto_rsa_sign_async_finalize(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Determine the size based on the signature buffer length.
   switch (signature.len) {
     case kRsa2048NumWords:
@@ -703,6 +739,9 @@ otcrypto_status_t otcrypto_rsa_verify_async_start(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Check the caller-provided public key buffer.
   HARDENED_TRY(public_key_structural_check(public_key));
 
@@ -759,6 +798,9 @@ otcrypto_status_t otcrypto_rsa_verify_async_finalize(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Initialize verification result to false by default.
   *verification_result = kHardenedBoolFalse;
 
@@ -778,6 +820,9 @@ otcrypto_status_t otcrypto_rsa_encrypt_async_start(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   if (message.data == NULL && (message.len != 0)) {
     return OTCRYPTO_BAD_ARGS;
   }
@@ -844,6 +889,9 @@ otcrypto_status_t otcrypto_rsa_encrypt_async_finalize(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   switch (launder32(ciphertext.len)) {
     case kRsa2048NumWords: {
       HARDENED_CHECK_EQ(ciphertext.len * sizeof(uint32_t),
@@ -881,6 +929,9 @@ otcrypto_status_t otcrypto_rsa_decrypt_async_start(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Infer the RSA size from the private key.
   otcrypto_rsa_size_t size;
   HARDENED_TRY(rsa_size_from_private_key(private_key, &size));
@@ -957,6 +1008,9 @@ otcrypto_status_t otcrypto_rsa_decrypt_async_finalize(
     return OTCRYPTO_BAD_ARGS;
   }
 
+  // Check that the entropy complex is initialized.
+  HARDENED_TRY(entropy_complex_check());
+
   // Call the unified `finalize()` operation, which will infer the RSA size
   // from OTBN.
   HARDENED_TRY(rsa_decrypt_finalize(hash_mode, label.data, label.len,
diff --git a/sw/device/lib/crypto/impl/rsa/BUILD b/sw/device/lib/crypto/impl/rsa/BUILD
index 5b53778a51152..3fc97abd5340e 100644
--- a/sw/device/lib/crypto/impl/rsa/BUILD
+++ b/sw/device/lib/crypto/impl/rsa/BUILD
@@ -4,7 +4,7 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 cc_library(
     name = "rsa_datatypes",
@@ -18,18 +18,19 @@ cc_library(
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":rsa_datatypes",
-        ":rsa_modexp",
         ":rsa_padding",
+        ":run_rsa",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
     ],
 )
 
 cc_library(
-    name = "rsa_keygen",
-    srcs = ["rsa_keygen.c"],
-    hdrs = ["rsa_keygen.h"],
+    name = "run_rsa_key_from_cofactor",
+    srcs = ["run_rsa_key_from_cofactor.c"],
+    hdrs = ["run_rsa_key_from_cofactor.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":rsa_datatypes",
@@ -37,19 +38,22 @@ cc_library(
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:run_rsa_keygen",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
+        "//sw/otbn/crypto:run_rsa_key_from_cofactor",
     ],
 )
 
 cc_library(
-    name = "rsa_modexp",
-    srcs = ["rsa_modexp.c"],
-    hdrs = ["rsa_modexp.h"],
+    name = "run_rsa",
+    srcs = ["run_rsa.c"],
+    hdrs = ["run_rsa.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":rsa_datatypes",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/otbn/crypto:run_rsa_modexp",
+        "//sw/device/lib/runtime:log",
+        "//sw/otbn/crypto:run_rsa",
     ],
 )
 
@@ -64,8 +68,9 @@ cc_library(
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/crypto/drivers:hmac",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/device/lib/crypto/impl:status",
     ],
 )
@@ -77,29 +82,13 @@ cc_library(
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":rsa_datatypes",
-        ":rsa_modexp",
         ":rsa_padding",
+        ":run_rsa",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:math",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/impl:hash",
-    ],
-)
-
-cc_library(
-    name = "rsa_3072_verify",
-    srcs = ["rsa_3072_verify.c"],
-    hdrs = ["rsa_3072_verify.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":rsa_datatypes",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:macros",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/otbn/crypto:run_rsa_verify_3072",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
     ],
 )
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.c b/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.c
deleted file mode 100644
index 0c0648bbe31eb..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.c
+++ /dev/null
@@ -1,242 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/status.h"
-#include "sw/device/lib/crypto/include/hash.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('r', '3', 'v')
-
-OTBN_DECLARE_APP_SYMBOLS(run_rsa_verify_3072);  // The OTBN RSA-3072 app.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072,
-                         mode);  // Mode (constants or modexp).
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072,
-                         out_buf);  // Output buffer (message).
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072, in_mod);  // The RSA modulus (n).
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072, in_buf);  // The signature (s).
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072,
-                         rr);  // The Montgomery constant R^2.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_verify_3072,
-                         m0inv);  // The Montgomery constant m0_inv.
-
-static const otbn_app_t kOtbnAppRsa = OTBN_APP_T_INIT(run_rsa_verify_3072);
-static const otbn_addr_t kOtbnVarRsaMode =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, mode);
-static const otbn_addr_t kOtbnVarRsaOutBuf =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, out_buf);
-static const otbn_addr_t kOtbnVarRsaInMod =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, in_mod);
-static const otbn_addr_t kOtbnVarRsaInBuf =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, in_buf);
-static const otbn_addr_t kOtbnVarRsaRR =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, rr);
-static const otbn_addr_t kOtbnVarRsaM0Inv =
-    OTBN_ADDR_T_INIT(run_rsa_verify_3072, m0inv);
-
-/* Mode is represented by a single word: 1=constant computation, 2=modexp */
-static const uint32_t kOtbnRsaModeNumWords = 1;
-static const uint32_t kOtbnRsaModeConstants = 1;
-static const uint32_t kOtbnRsaModeModexp = 2;
-
-status_t rsa_3072_encode_sha256(const uint8_t *msg, size_t msgLen,
-                                rsa_3072_int_t *result) {
-  if (msg == NULL && msgLen != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Message encoding as described in RFC 8017, Section 9.2. The encoded
-  // message is:
-  //
-  // EM = 0x00 || 0x01 || PS || 0x00 || T,
-  //
-  // where PS is padding made of enough 0xff bytes to meet the desired
-  // message length emLen (emLen = 384 bytes for RSA-3072), and T is the DER
-  // encoding of the digest. For SHA-256,
-  //
-  // T = (0x)30 31 30 0d 06 09 60 86 48 01 65 03 04 02 01 05 00 04 20 || H,
-  //
-  // where H is the 256-bit message digest from SHA-256.
-  //
-  // Note that the RFC document is using a big-endian representation; here we
-  // are using little-endian, so the bytes are reversed.
-
-  // Initially set all bits of the result; we will change the ones that are not
-  // part of PS.
-  memset(result->data, 0xff, sizeof(result->data));
-
-  // Set 0x00 || 0x01 bytes at most significant end
-  result->data[kRsa3072NumWords - 1] = 0x0001ffff;
-
-  // Hash message.
-  otcrypto_const_byte_buf_t msg_buf = {
-      .data = msg,
-      .len = msgLen,
-  };
-  uint32_t digest_buf[kSha256DigestWords];
-  otcrypto_hash_digest_t digest = {
-      .mode = kOtcryptoHashModeSha256,
-      .data = digest_buf,
-      .len = kSha256DigestWords,
-  };
-  TRY(otcrypto_hash(msg_buf, digest));
-
-  // Copy the message digest into the least significant end of the result,
-  // reversing the order of bytes to get little-endian form.
-  for (size_t i = 0; i < kHmacSha256DigestWords; i++) {
-    result->data[i] =
-        __builtin_bswap32(digest.data[kHmacSha256DigestWords - 1 - i]);
-  }
-
-  // Set remainder of 0x00 || T section
-  result->data[kHmacSha256DigestWords] = 0x05000420;
-  result->data[kHmacSha256DigestWords + 1] = 0x03040201;
-  result->data[kHmacSha256DigestWords + 2] = 0x86480165;
-  result->data[kHmacSha256DigestWords + 3] = 0x0d060960;
-  result->data[kHmacSha256DigestWords + 4] = 0x00303130;
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Copies a 3072-bit number from the CPU memory to OTBN data memory.
- *
- * @param otbn The OTBN context object.
- * @param src Source of the data to copy.
- * @param dst Address of the destination in OTBN's data memory.
- * @return The result of the operation.
- */
-status_t write_rsa_3072_int_to_otbn(const rsa_3072_int_t *src,
-                                    otbn_addr_t dst) {
-  return otbn_dmem_write(kRsa3072NumWords, src->data, dst);
-}
-
-/**
- * Copies a 3072-bit number from OTBN data memory to CPU memory.
- *
- * @param otbn The OTBN context object.
- * @param src The address in OTBN data memory to copy from.
- * @param dst The destination of the copied data in main memory (preallocated).
- * @return The result of the operation.
- */
-status_t read_rsa_3072_int_from_otbn(otbn_addr_t src, rsa_3072_int_t *dst) {
-  return otbn_dmem_read(kRsa3072NumWords, src, dst->data);
-}
-
-status_t rsa_3072_compute_constants(const rsa_3072_public_key_t *public_key,
-                                    rsa_3072_constants_t *result) {
-  // Load the RSA app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
-
-  // Set mode to compute constants.
-  HARDENED_TRY(otbn_dmem_write(kOtbnRsaModeNumWords, &kOtbnRsaModeConstants,
-                               kOtbnVarRsaMode));
-
-  // Set the modulus (n).
-  HARDENED_TRY(write_rsa_3072_int_to_otbn(&public_key->n, kOtbnVarRsaInMod));
-
-  // Start the OTBN routine.
-  HARDENED_TRY(otbn_execute());
-
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read constant rr out of DMEM.
-  HARDENED_TRY(read_rsa_3072_int_from_otbn(kOtbnVarRsaRR, &result->rr));
-
-  // Read constant m0_inv out of DMEM.
-  HARDENED_TRY(
-      otbn_dmem_read(kOtbnWideWordNumWords, kOtbnVarRsaM0Inv, result->m0_inv));
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_3072_verify_start(const rsa_3072_int_t *signature,
-                               const rsa_3072_public_key_t *public_key,
-                               const rsa_3072_constants_t *constants) {
-  // Only the F4 modulus is supported.
-  if (public_key->e != 65537) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Reject the signature if it is too large (n <= sig): RFC 8017, section
-  // 5.2.2, step 1.
-  if (memrcmp(public_key->n.data, signature->data, kRsa3072NumBytes) <= 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Load the RSA app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
-
-  // Set mode to perform modular exponentiation.
-  HARDENED_TRY(otbn_dmem_write(kOtbnRsaModeNumWords, &kOtbnRsaModeModexp,
-                               kOtbnVarRsaMode));
-
-  // Set the modulus (n).
-  HARDENED_TRY(write_rsa_3072_int_to_otbn(&public_key->n, kOtbnVarRsaInMod));
-
-  // Set the signature.
-  HARDENED_TRY(write_rsa_3072_int_to_otbn(signature, kOtbnVarRsaInBuf));
-
-  // Set the precomputed constant R^2.
-  HARDENED_TRY(write_rsa_3072_int_to_otbn(&constants->rr, kOtbnVarRsaRR));
-
-  // Set the precomputed constant m0_inv.
-  HARDENED_TRY(otbn_dmem_write(kOtbnWideWordNumWords, constants->m0_inv,
-                               kOtbnVarRsaM0Inv));
-
-  // Start the OTBN routine.
-  HARDENED_TRY(otbn_execute());
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_3072_verify_finalize(const rsa_3072_int_t *message,
-                                  hardened_bool_t *result) {
-  // Initially set the result to false in case of early returns due to invalid
-  // arguments.
-  *result = kHardenedBoolFalse;
-
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read recovered message out of OTBN dmem.
-  rsa_3072_int_t recoveredMessage;
-  HARDENED_TRY(
-      read_rsa_3072_int_from_otbn(kOtbnVarRsaOutBuf, &recoveredMessage));
-
-  // TODO: harden this memory comparison
-  // Check if recovered message matches expectation
-  *result = kHardenedBoolTrue;
-  for (int i = 0; i < kRsa3072NumWords; i++) {
-    if (recoveredMessage.data[i] != message->data[i]) {
-      *result = kHardenedBoolFalse;
-    }
-  }
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_3072_verify(const rsa_3072_int_t *signature,
-                         const rsa_3072_int_t *message,
-                         const rsa_3072_public_key_t *public_key,
-                         const rsa_3072_constants_t *constants,
-                         hardened_bool_t *result) {
-  // Initially set the result to false in case of early returns due to invalid
-  // arguments.
-  *result = kHardenedBoolFalse;
-
-  // Initiate OTBN signature verification.
-  HARDENED_TRY(rsa_3072_verify_start(signature, public_key, constants));
-
-  // Wait for OTBN operations to complete and signature to be verified.
-  return rsa_3072_verify_finalize(message, result);
-}
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h b/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h
deleted file mode 100644
index 71144682a179f..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h
+++ /dev/null
@@ -1,132 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_3072_VERIFY_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_3072_VERIFY_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/drivers/hmac.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * A type that holds precomputed Montgomery constants for a RSA-3072 public
- * key.
- *
- * The constants are:
- *  rr : (2^3072)^2 mod n
- *  m0_inv : (-(n^(-1))) mod 2^256
- */
-typedef struct rsa_3072_constants_t {
-  rsa_3072_int_t rr;
-  uint32_t m0_inv[kOtbnWideWordNumWords];
-} rsa_3072_constants_t;
-
-/**
- * Computes Montgomery constant R^2 for an RSA-3072 public key.
- *
- * @param public_key Key for which to compute constants.
- * @param result Buffer in which to store output
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_compute_rr(const rsa_3072_public_key_t *public_key,
-                             rsa_3072_int_t *result);
-
-/**
- * Computes Montgomery constant m0_inv for an RSA-3072 public key.
- *
- * @param public_key Key for which to compute constants.
- * @param result Buffer in which to store output
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_compute_m0_inv(const rsa_3072_public_key_t *public_key,
-                                 uint32_t result[kOtbnWideWordNumWords]);
-
-/**
- * Computes Montgomery constants for an RSA-3072 public key.
- *
- * @param public_key Key for which to compute constants.
- * @param result Buffer in which to store output
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_compute_constants(const rsa_3072_public_key_t *public_key,
-                                    rsa_3072_constants_t *result);
-
-/**
- * Encode the message according to RFC 8017, section 9.2, with a SHA2-256 hash
- * function. See https://datatracker.ietf.org/doc/html/rfc8017#section-9.2
- *
- * Note that because we know the length of the modulus is 3072 bits, we know
- * that emLen (the intended length in bytes of the message representative) is
- * 3072/8 = 384, so it is not an argument here.
- *
- * Unlike in RFC 8017, the message representative returned here is in
- * little-endian form.
- *
- * @param msg Message to encode
- * @param msgLen Length of the message
- * @param result Resulting 3072-bit message representative
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_encode_sha256(const uint8_t *msg, size_t msgLen,
-                                rsa_3072_int_t *result);
-
-/**
- * Starts an RSA-3072 signature verification; returns immediately.
- *
- * The key exponent must be 65537; no other exponents are supported.
- *
- * @param signature Signature to be verified.
- * @param public_key Key to check the signature against.
- * @param constants Precomputed Montgomery constants for the public_key.
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_verify_start(const rsa_3072_int_t *signature,
-                               const rsa_3072_public_key_t *public_key,
-                               const rsa_3072_constants_t *constants);
-
-/**
- * Waits for an RSA-3072 signature verification to complete.
- *
- * Should be invoked after `rsa_3072_verify_async`. The encoded `message`
- * parameter should be related to the `signature` parameter passed to the prior
- * invocation of `rsa_3072_verify_async`.
- *
- * @param message Encoded message representative to check the signature against.
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_verify_finalize(const rsa_3072_int_t *message,
-                                  hardened_bool_t *result);
-
-/**
- * Verifies an RSA-3072 signature; blocks until complete.
- *
- * The key exponent must be 65537; no other exponents are supported.
- *
- * @param signature Signature to be verified.
- * @param message Encoded message representative to check the signature against.
- * @param public_key Key to check the signature against.
- * @param constants Precomputed Montgomery constants for the public_key.
- * @param result Buffer in which to store output (true iff signature is valid)
- * @return Result of the operation (OK or error).
- */
-status_t rsa_3072_verify(const rsa_3072_int_t *signature,
-                         const rsa_3072_int_t *message,
-                         const rsa_3072_public_key_t *public_key,
-                         const rsa_3072_constants_t *constants,
-                         hardened_bool_t *result);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_3072_VERIFY_H_
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_datatypes.h b/sw/device/lib/crypto/impl/rsa/rsa_datatypes.h
index a9963cab0d9a1..90359eda67922 100644
--- a/sw/device/lib/crypto/impl/rsa/rsa_datatypes.h
+++ b/sw/device/lib/crypto/impl/rsa/rsa_datatypes.h
@@ -69,63 +69,66 @@ typedef struct rsa_4096_int_t {
 /**
  * A type that holds an RSA-2048 public key.
  *
- * The public key consists of a 2048-bit modulus n and a public exponent e.
+ * The public key consists of a 2048-bit modulus n and an implicit constant
+ * public exponent e=2^16+1.
  */
 typedef struct rsa_2048_public_key_t {
   rsa_2048_int_t n;
-  uint32_t e;
 } rsa_2048_public_key_t;
 
 /**
  * A type that holds an RSA-3072 public key.
  *
- * The public key consists of a 3072-bit modulus n and a public exponent e.
+ * The public key consists of a 3072-bit modulus n and an implicit constant
+ * public exponent e=2^16+1.
  */
 typedef struct rsa_3072_public_key_t {
   rsa_3072_int_t n;
-  uint32_t e;
 } rsa_3072_public_key_t;
 
 /**
  * A type that holds an RSA-4096 public key.
  *
- * The public key consists of a 4096-bit modulus n and a public exponent e.
+ * The public key consists of a 4096-bit modulus n and an implicit constant
+ * public exponent e=2^16+1.
  */
 typedef struct rsa_4096_public_key_t {
   rsa_4096_int_t n;
-  uint32_t e;
 } rsa_4096_public_key_t;
 
 /**
  * A type that holds an RSA-2048 private key.
  *
- * The private key consists of a 2048-bit private exponent d and a public
- * modulus n.
+ * The private key consists of a 2048-bit private exponent d in two Boolean
+ * shares and a public modulus n.
  */
 typedef struct rsa_2048_private_key_t {
-  rsa_2048_int_t d;
+  rsa_2048_int_t d0;
+  rsa_2048_int_t d1;
   rsa_2048_int_t n;
 } rsa_2048_private_key_t;
 
 /**
  * A type that holds an RSA-3072 private key.
  *
- * The private key consists of a 3072-bit private exponent d and a public
- * modulus n.
+ * The private key consists of a 3072-bit private exponent d in two Boolean
+ * shares and a public modulus n.
  */
 typedef struct rsa_3072_private_key_t {
-  rsa_3072_int_t d;
+  rsa_3072_int_t d0;
+  rsa_3072_int_t d1;
   rsa_3072_int_t n;
 } rsa_3072_private_key_t;
 
 /**
  * A type that holds an RSA-4096 private key.
  *
- * The private key consists of a 4096-bit private exponent d and a public
- * modulus n.
+ * The private key consists of a 4096-bit private exponent d in two Boolean
+ * shares and a public modulus n.
  */
 typedef struct rsa_4096_private_key_t {
-  rsa_4096_int_t d;
+  rsa_4096_int_t d0;
+  rsa_4096_int_t d1;
   rsa_4096_int_t n;
 } rsa_4096_private_key_t;
 
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_encryption.c b/sw/device/lib/crypto/impl/rsa/rsa_encryption.c
index 049a0041923ee..594f60d791bf5 100644
--- a/sw/device/lib/crypto/impl/rsa/rsa_encryption.c
+++ b/sw/device/lib/crypto/impl/rsa/rsa_encryption.c
@@ -7,10 +7,10 @@
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_modexp.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_padding.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/impl/rsa/run_rsa.h"
 
 // Module ID for status codes.
 #define MODULE_ID MAKE_MODULE_ID('r', 'e', 'n')
@@ -21,14 +21,15 @@ status_t rsa_encrypt_2048_start(const rsa_2048_public_key_t *public_key,
                                 const uint8_t *label, size_t label_bytelen) {
   // Encode the message.
   rsa_2048_int_t encoded_message;
+  HARDENED_TRY(
+      hardened_memshred(encoded_message.data, ARRAYSIZE(encoded_message.data)));
   HARDENED_TRY(rsa_padding_oaep_encode(
       hash_mode, message, message_bytelen, label, label_bytelen,
       ARRAYSIZE(encoded_message.data), encoded_message.data));
 
   // Start computing (encoded_message ^ e) mod n with a variable-time
   // exponentiation.
-  return rsa_modexp_vartime_2048_start(&encoded_message, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_2048_start(&encoded_message, &public_key->n);
 }
 
 status_t rsa_encrypt_2048_finalize(rsa_2048_int_t *ciphertext) {
@@ -38,33 +39,37 @@ status_t rsa_encrypt_2048_finalize(rsa_2048_int_t *ciphertext) {
 status_t rsa_decrypt_2048_start(const rsa_2048_private_key_t *private_key,
                                 const rsa_2048_int_t *ciphertext) {
   // Start computing (ciphertext ^ d) mod n.
-  return rsa_modexp_consttime_2048_start(ciphertext, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_2048_start(ciphertext, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
 
 status_t rsa_decrypt_finalize(const otcrypto_hash_mode_t hash_mode,
                               const uint8_t *label, size_t label_bytelen,
-                              size_t plaintext_max_wordlen, uint8_t *plaintext,
+                              size_t plaintext_max_bytelen, uint8_t *plaintext,
                               size_t *plaintext_len) {
   // Wait for OTBN to complete and get the size for the last RSA operation.
   size_t num_words;
   HARDENED_TRY(rsa_modexp_wait(&num_words));
 
-  // Guard against overflow in the plaintext length checks.
-  if (plaintext_max_wordlen > UINT32_MAX / sizeof(uint32_t)) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
   // Check that enough space has been allocated for the plaintext.
   size_t max_plaintext_bytelen = 0;
   HARDENED_TRY(rsa_padding_oaep_max_message_bytelen(hash_mode, num_words,
                                                     &max_plaintext_bytelen));
-  if (plaintext_max_wordlen <
-      ceil_div(max_plaintext_bytelen, sizeof(uint32_t))) {
+  if (plaintext_max_bytelen < max_plaintext_bytelen) {
     return OTCRYPTO_BAD_ARGS;
   }
-  HARDENED_CHECK_GE(plaintext_max_wordlen * sizeof(uint32_t),
-                    max_plaintext_bytelen);
+  HARDENED_CHECK_GE(plaintext_max_bytelen, max_plaintext_bytelen);
+
+  // Randomize the plaintext destination buffer as best we can, considering its
+  // alignment.
+  ptrdiff_t misalignment = misalignment32_of((uintptr_t)plaintext);
+  size_t aligned_offset =
+      (sizeof(uint32_t) - (size_t)misalignment) % sizeof(uint32_t);
+  size_t num_aligned_full_words =
+      (plaintext_max_bytelen - aligned_offset) / sizeof(uint32_t);
+  HARDENED_TRY(
+      hardened_memshred((uint32_t *)((uintptr_t)plaintext + aligned_offset),
+                        num_aligned_full_words));
 
   // Call the appropriate `finalize()` operation to get the recovered encoded
   // message.
@@ -106,14 +111,15 @@ status_t rsa_encrypt_3072_start(const rsa_3072_public_key_t *public_key,
                                 const uint8_t *label, size_t label_bytelen) {
   // Encode the message.
   rsa_3072_int_t encoded_message;
+  HARDENED_TRY(
+      hardened_memshred(encoded_message.data, ARRAYSIZE(encoded_message.data)));
   HARDENED_TRY(rsa_padding_oaep_encode(
       hash_mode, message, message_bytelen, label, label_bytelen,
       ARRAYSIZE(encoded_message.data), encoded_message.data));
 
   // Start computing (encoded_message ^ e) mod n with a variable-time
   // exponentiation.
-  return rsa_modexp_vartime_3072_start(&encoded_message, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_3072_start(&encoded_message, &public_key->n);
 }
 
 status_t rsa_encrypt_3072_finalize(rsa_3072_int_t *ciphertext) {
@@ -123,8 +129,8 @@ status_t rsa_encrypt_3072_finalize(rsa_3072_int_t *ciphertext) {
 status_t rsa_decrypt_3072_start(const rsa_3072_private_key_t *private_key,
                                 const rsa_3072_int_t *ciphertext) {
   // Start computing (ciphertext ^ d) mod n.
-  return rsa_modexp_consttime_3072_start(ciphertext, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_3072_start(ciphertext, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
 
 status_t rsa_encrypt_4096_start(const rsa_4096_public_key_t *public_key,
@@ -133,14 +139,15 @@ status_t rsa_encrypt_4096_start(const rsa_4096_public_key_t *public_key,
                                 const uint8_t *label, size_t label_bytelen) {
   // Encode the message.
   rsa_4096_int_t encoded_message;
+  HARDENED_TRY(
+      hardened_memshred(encoded_message.data, ARRAYSIZE(encoded_message.data)));
   HARDENED_TRY(rsa_padding_oaep_encode(
       hash_mode, message, message_bytelen, label, label_bytelen,
       ARRAYSIZE(encoded_message.data), encoded_message.data));
 
   // Start computing (encoded_message ^ e) mod n with a variable-time
   // exponentiation.
-  return rsa_modexp_vartime_4096_start(&encoded_message, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_4096_start(&encoded_message, &public_key->n);
 }
 
 status_t rsa_encrypt_4096_finalize(rsa_4096_int_t *ciphertext) {
@@ -150,6 +157,6 @@ status_t rsa_encrypt_4096_finalize(rsa_4096_int_t *ciphertext) {
 status_t rsa_decrypt_4096_start(const rsa_4096_private_key_t *private_key,
                                 const rsa_4096_int_t *ciphertext) {
   // Start computing (ciphertext ^ d) mod n.
-  return rsa_modexp_consttime_4096_start(ciphertext, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_4096_start(ciphertext, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_keygen.c b/sw/device/lib/crypto/impl/rsa/rsa_keygen.c
deleted file mode 100644
index 280f6bea27695..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_keygen.c
+++ /dev/null
@@ -1,200 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/rsa/rsa_keygen.h"
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('r', 'k', 'g')
-
-OTBN_DECLARE_APP_SYMBOLS(run_rsa_keygen);         // The OTBN RSA keygen binary.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_keygen, mode);   // Application mode.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_keygen, rsa_n);  // Public exponent n.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_keygen, rsa_d);  // Private exponent d.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_keygen, rsa_cofactor);  // Cofactor p or q.
-
-static const otbn_app_t kOtbnAppRsaKeygen = OTBN_APP_T_INIT(run_rsa_keygen);
-static const otbn_addr_t kOtbnVarRsaMode =
-    OTBN_ADDR_T_INIT(run_rsa_keygen, mode);
-static const otbn_addr_t kOtbnVarRsaN = OTBN_ADDR_T_INIT(run_rsa_keygen, rsa_n);
-static const otbn_addr_t kOtbnVarRsaD = OTBN_ADDR_T_INIT(run_rsa_keygen, rsa_d);
-static const otbn_addr_t kOtbnVarRsaCofactor =
-    OTBN_ADDR_T_INIT(run_rsa_keygen, rsa_cofactor);
-
-enum {
-  /* Fixed public exponent for generated keys. This exponent is 2^16 + 1, also
-     known as "F4" because it's the fourth Fermat number. */
-  kFixedPublicExponent = 65537,
-  /* Number of words used to represent the application mode. */
-  kOtbnRsaModeWords = 1,
-};
-
-// Available application modes. Must match the values from `run_rsa_keygen.s`.
-// TODO: I think it's possible to pull these values directly from symbols in
-// the binary. See:
-//   hw/ip/otbn/util/otbn_objdump.py -t run_rsa_keygen.rv32embed.o
-enum {
-  kOtbnRsaModeGen2048 = 0x137,
-  kOtbnRsaModeGen3072 = 0x4e5,
-  kOtbnRsaModeGen4096 = 0x63a,
-  kOtbnRsaModeCofactor2048 = 0x34e,
-  kOtbnRsaModeCofactor3072 = 0x0db,
-  kOtbnRsaModeCofactor4096 = 0x794,
-};
-
-/**
- * Start the OTBN key generation program in random-key mode.
- *
- * Cofactor mode should not use this routine, because it wipes DMEM and
- * cofactor mode requires input data.
- *
- * @param mode Mode parameter for keygen.
- * @return Result of the operation.
- */
-static status_t keygen_start(uint32_t mode) {
-  // Load the RSA key generation app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaKeygen));
-
-  // Set mode and start OTBN.
-  HARDENED_TRY(otbn_dmem_write(kOtbnRsaModeWords, &mode, kOtbnVarRsaMode));
-  return otbn_execute();
-}
-
-/**
- * Finalize a key generation operation (for either mode).
- *
- * Checks the application mode against expectations, then reads back the
- * modulus and private exponent.
- *
- * @param exp_mode Application mode to expect.
- * @param num_words Number of words for modulus and private exponent.
- * @param[out] n Buffer for the modulus.
- * @param[out] d Buffer for the private exponent.
- * @return OK or error.
- */
-static status_t keygen_finalize(uint32_t exp_mode, size_t num_words,
-                                uint32_t *n, uint32_t *d) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the mode from OTBN dmem and panic if it's not as expected.
-  uint32_t act_mode = 0;
-  HARDENED_TRY(otbn_dmem_read(1, kOtbnVarRsaMode, &act_mode));
-  if (act_mode != exp_mode) {
-    return OTCRYPTO_FATAL_ERR;
-  }
-
-  // Read the public modulus (n) from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(num_words, kOtbnVarRsaN, n));
-
-  // Read the private exponent (d) from OTBN dmem.
-  HARDENED_TRY(otbn_dmem_read(num_words, kOtbnVarRsaD, d));
-
-  // Wipe DMEM.
-  HARDENED_TRY(otbn_dmem_sec_wipe());
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_keygen_2048_start(void) {
-  return keygen_start(kOtbnRsaModeGen2048);
-}
-
-status_t rsa_keygen_2048_finalize(rsa_2048_public_key_t *public_key,
-                                  rsa_2048_private_key_t *private_key) {
-  HARDENED_TRY(keygen_finalize(kOtbnRsaModeGen2048, kRsa2048NumWords,
-                               private_key->n.data, private_key->d.data));
-
-  // Copy the modulus to the public key.
-  hardened_memcpy(public_key->n.data, private_key->n.data,
-                  ARRAYSIZE(private_key->n.data));
-
-  // Set the public exponent to F4, the only exponent our key generation
-  // algorithm supports.
-  public_key->e = kFixedPublicExponent;
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_keygen_3072_start(void) {
-  return keygen_start(kOtbnRsaModeGen3072);
-}
-
-status_t rsa_keygen_3072_finalize(rsa_3072_public_key_t *public_key,
-                                  rsa_3072_private_key_t *private_key) {
-  HARDENED_TRY(keygen_finalize(kOtbnRsaModeGen3072, kRsa3072NumWords,
-                               private_key->n.data, private_key->d.data));
-
-  // Copy the modulus to the public key.
-  hardened_memcpy(public_key->n.data, private_key->n.data,
-                  ARRAYSIZE(private_key->n.data));
-
-  // Set the public exponent to F4, the only exponent our key generation
-  // algorithm supports.
-  public_key->e = kFixedPublicExponent;
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_keygen_4096_start(void) {
-  return keygen_start(kOtbnRsaModeGen4096);
-}
-
-status_t rsa_keygen_4096_finalize(rsa_4096_public_key_t *public_key,
-                                  rsa_4096_private_key_t *private_key) {
-  HARDENED_TRY(keygen_finalize(kOtbnRsaModeGen4096, kRsa4096NumWords,
-                               private_key->n.data, private_key->d.data));
-
-  // Copy the modulus to the public key.
-  hardened_memcpy(public_key->n.data, private_key->n.data,
-                  ARRAYSIZE(private_key->n.data));
-
-  // Set the public exponent to F4, the only exponent our key generation
-  // algorithm supports.
-  public_key->e = kFixedPublicExponent;
-
-  return OTCRYPTO_OK;
-}
-
-status_t rsa_keygen_from_cofactor_2048_start(
-    const rsa_2048_public_key_t *public_key,
-    const rsa_2048_cofactor_t *cofactor) {
-  // Only the exponent F4 is supported.
-  if (public_key->e != kFixedPublicExponent) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-
-  // Load the RSA key generation app. Fails if OTBN is non-idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaKeygen));
-
-  // Write the modulus and cofactor into DMEM.
-  HARDENED_TRY(otbn_dmem_write(ARRAYSIZE(public_key->n.data),
-                               public_key->n.data, kOtbnVarRsaN));
-  HARDENED_TRY(otbn_dmem_write(ARRAYSIZE(cofactor->data), cofactor->data,
-                               kOtbnVarRsaCofactor));
-
-  // Set mode and start OTBN.
-  uint32_t mode = kOtbnRsaModeCofactor2048;
-  HARDENED_TRY(otbn_dmem_write(kOtbnRsaModeWords, &mode, kOtbnVarRsaMode));
-  return otbn_execute();
-}
-
-status_t rsa_keygen_from_cofactor_2048_finalize(
-    rsa_2048_public_key_t *public_key, rsa_2048_private_key_t *private_key) {
-  HARDENED_TRY(keygen_finalize(kOtbnRsaModeCofactor2048, kRsa2048NumWords,
-                               private_key->n.data, private_key->d.data));
-
-  // Copy the modulus to the public key.
-  hardened_memcpy(public_key->n.data, private_key->n.data,
-                  ARRAYSIZE(private_key->n.data));
-
-  // Set the public exponent to F4, the only exponent our key generation
-  // algorithm supports.
-  public_key->e = kFixedPublicExponent;
-
-  return OTCRYPTO_OK;
-}
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_keygen.h b/sw/device/lib/crypto/impl/rsa/rsa_keygen.h
deleted file mode 100644
index 5a3656cd7a7d9..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_keygen.h
+++ /dev/null
@@ -1,129 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_KEYGEN_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_KEYGEN_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Starts an RSA-2048 key generation operation; returns immediately.
- *
- * The key exponent is always F4=65537; no other exponents are supported.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_2048_start(void);
-
-/**
- * Waits for an RSA-2048 key generation to complete.
- *
- * Should be invoked only after `rsa_keygen_2048_start`. Blocks until OTBN is
- * done processing.
- *
- * @param[out] public_key Generated public key (n, e).
- * @param[out] private_key Generated private key (d, e).
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_2048_finalize(rsa_2048_public_key_t *public_key,
-                                  rsa_2048_private_key_t *private_key);
-
-/**
- * Starts an RSA-3072 key generation operation; returns immediately.
- *
- * The key exponent is always F4=65537; no other exponents are supported.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_3072_start(void);
-
-/**
- * Waits for an RSA-3072 key generation to complete.
- *
- * Should be invoked only after `rsa_keygen_3072_start`. Blocks until OTBN is
- * done processing.
- *
- * @param[out] public_key Generated public key (n, e).
- * @param[out] private_key Generated private key (d, e).
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_3072_finalize(rsa_3072_public_key_t *public_key,
-                                  rsa_3072_private_key_t *private_key);
-
-/**
- * Starts an RSA-4096 key generation operation; returns immediately.
- *
- * The key exponent is always F4=65537; no other exponents are supported.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_4096_start(void);
-
-/**
- * Waits for an RSA-4096 key generation to complete.
- *
- * Should be invoked only after `rsa_keygen_4096_start`. Blocks until OTBN is
- * done processing.
- *
- * @param[out] public_key Generated public key (n, e).
- * @param[out] private_key Generated private key (d, e).
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_4096_finalize(rsa_4096_public_key_t *public_key,
-                                  rsa_4096_private_key_t *private_key);
-
-/**
- * Starts an RSA-2048 key-from-cofactor operation; returns immediately.
- *
- * The key exponent must be F4=65537; no other exponents are supported. This
- * routine does not perform any checks on the generated keypair (e.g. primality
- * checks or even range checks).
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param public_key Public key (n, e).
- * @param cofactor One of the prime cofactors (p or q).
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_from_cofactor_2048_start(
-    const rsa_2048_public_key_t *public_key,
-    const rsa_2048_cofactor_t *cofactor);
-
-/**
- * Waits for an RSA-2048 key-from-cofactor operation to complete.
- *
- * Should be invoked only after `rsa_keygen_from_cofactor_2048_start`. Blocks
- * until OTBN is done processing.
- *
- * The public key returned by this function is recomputed by OTBN; callers may
- * find it helpful to compare the public key modulus returned to the one that
- * was passed to OTBN originally in order to check for errors.
- *
- * @param[out] public_key Generated public key (n, e).
- * @param[out] private_key Generated private key (d, e).
- * @return Result of the operation (OK or error).
- */
-status_t rsa_keygen_from_cofactor_2048_finalize(
-    rsa_2048_public_key_t *public_key, rsa_2048_private_key_t *private_key);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_KEYGEN_H_
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_modexp.c b/sw/device/lib/crypto/impl/rsa/rsa_modexp.c
deleted file mode 100644
index ba30c5de72ebb..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_modexp.c
+++ /dev/null
@@ -1,254 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/crypto/impl/rsa/rsa_modexp.h"
-
-#include "sw/device/lib/crypto/drivers/otbn.h"
-
-// Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('r', 'm', 'e')
-
-OTBN_DECLARE_APP_SYMBOLS(run_rsa_modexp);         // The OTBN RSA modexp binary.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_modexp, mode);   // Application mode.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_modexp, n);      // Public modulus n.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_modexp, d);      // Private exponent d.
-OTBN_DECLARE_SYMBOL_ADDR(run_rsa_modexp, inout);  // Input/output buffer.
-
-static const otbn_app_t kOtbnAppRsaModexp = OTBN_APP_T_INIT(run_rsa_modexp);
-static const otbn_addr_t kOtbnVarRsaMode =
-    OTBN_ADDR_T_INIT(run_rsa_modexp, mode);
-static const otbn_addr_t kOtbnVarRsaN = OTBN_ADDR_T_INIT(run_rsa_modexp, n);
-static const otbn_addr_t kOtbnVarRsaD = OTBN_ADDR_T_INIT(run_rsa_modexp, d);
-static const otbn_addr_t kOtbnVarRsaInOut =
-    OTBN_ADDR_T_INIT(run_rsa_modexp, inout);
-
-enum {
-  /**
-   * Available modes for the OTBN application. Must match the values from
-   * `run_rsa_modexp.s`.
-   */
-  kMode2048Modexp = 0x76b,
-  kMode2048ModexpF4 = 0x565,
-  kMode3072Modexp = 0x378,
-  kMode3072ModexpF4 = 0x6d1,
-  kMode4096Modexp = 0x70b,
-  kMode4096ModexpF4 = 0x0ee,
-  /**
-   * Common RSA exponent with a specialized implementation.
-   *
-   * This exponent is 2^16 + 1, and called "F4" because it's the fourth Fermat
-   * number.
-   */
-  kExponentF4 = 65537,
-};
-
-status_t rsa_modexp_wait(size_t *num_words) {
-  // Spin here waiting for OTBN to complete.
-  HARDENED_TRY(otbn_busy_wait_for_done());
-
-  // Read the application mode.
-  uint32_t mode;
-  HARDENED_TRY(otbn_dmem_read(1, kOtbnVarRsaMode, &mode));
-
-  *num_words = 0;
-  switch (mode) {
-    case kMode2048Modexp:
-      OT_FALLTHROUGH_INTENDED;
-    case kMode2048ModexpF4:
-      *num_words = kRsa2048NumWords;
-      break;
-    case kMode3072Modexp:
-      OT_FALLTHROUGH_INTENDED;
-    case kMode3072ModexpF4:
-      *num_words = kRsa3072NumWords;
-      break;
-    case kMode4096Modexp:
-      OT_FALLTHROUGH_INTENDED;
-    case kMode4096ModexpF4:
-      *num_words = kRsa4096NumWords;
-      break;
-    default:
-      // Unrecognized mode.
-      return OTCRYPTO_FATAL_ERR;
-  }
-
-  return OTCRYPTO_OK;
-}
-
-/**
- * Finalizes a modular exponentiation of variable size.
- *
- * Blocks until OTBN is done, checks for errors. Ensures the mode matches
- * expectations. Reads back the result, and then performs an OTBN secure wipe.
- *
- * @param num_words Number of words for the modexp result.
- * @param[out] result Result of the modexp operation.
- * @return Status of the operation (OK or error).
- */
-static status_t rsa_modexp_finalize(const size_t num_words, uint32_t *result) {
-  // Wait for OTBN to complete and get the result size.
-  size_t num_words_inferred;
-  HARDENED_TRY(rsa_modexp_wait(&num_words_inferred));
-
-  // Check that the inferred result size matches expectations.
-  if (num_words != num_words_inferred) {
-    return OTCRYPTO_FATAL_ERR;
-  }
-
-  // Read the result.
-  HARDENED_TRY(otbn_dmem_read(num_words, kOtbnVarRsaInOut, result));
-
-  // Wipe DMEM.
-  return otbn_dmem_sec_wipe();
-}
-
-status_t rsa_modexp_consttime_2048_start(const rsa_2048_int_t *base,
-                                         const rsa_2048_int_t *exp,
-                                         const rsa_2048_int_t *modulus) {
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode2048Modexp;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base, the modulus n and private exponent d.
-  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, modulus->data, kOtbnVarRsaN));
-  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, exp->data, kOtbnVarRsaD));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_vartime_2048_start(const rsa_2048_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_2048_int_t *modulus) {
-  if (exp != kExponentF4) {
-    // TODO for other exponents, we temporarily fall back to the constant-time
-    // implementation until a variable-time implementation is supported.
-    rsa_2048_int_t exp_rsa;
-    memset(exp_rsa.data, 0, kRsa2048NumWords * sizeof(uint32_t));
-    exp_rsa.data[0] = exp;
-    return rsa_modexp_consttime_2048_start(base, &exp_rsa, modulus);
-  }
-
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode2048ModexpF4;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base and the modulus n.
-  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, modulus->data, kOtbnVarRsaN));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_2048_finalize(rsa_2048_int_t *result) {
-  return rsa_modexp_finalize(kRsa2048NumWords, result->data);
-}
-
-status_t rsa_modexp_consttime_3072_start(const rsa_3072_int_t *base,
-                                         const rsa_3072_int_t *exp,
-                                         const rsa_3072_int_t *modulus) {
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode3072Modexp;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base, the modulus n and private exponent d.
-  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, modulus->data, kOtbnVarRsaN));
-  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, exp->data, kOtbnVarRsaD));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_vartime_3072_start(const rsa_3072_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_3072_int_t *modulus) {
-  if (exp != kExponentF4) {
-    // TODO for other exponents, we temporarily fall back to the constant-time
-    // implementation until a variable-time implementation is supported.
-    rsa_3072_int_t exp_rsa;
-    memset(exp_rsa.data, 0, kRsa3072NumWords * sizeof(uint32_t));
-    exp_rsa.data[0] = exp;
-    return rsa_modexp_consttime_3072_start(base, &exp_rsa, modulus);
-  }
-
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode3072ModexpF4;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base and the modulus n.
-  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, modulus->data, kOtbnVarRsaN));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_3072_finalize(rsa_3072_int_t *result) {
-  return rsa_modexp_finalize(kRsa3072NumWords, result->data);
-}
-
-status_t rsa_modexp_consttime_4096_start(const rsa_4096_int_t *base,
-                                         const rsa_4096_int_t *exp,
-                                         const rsa_4096_int_t *modulus) {
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode4096Modexp;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base, the modulus n and private exponent d.
-  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, modulus->data, kOtbnVarRsaN));
-  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, exp->data, kOtbnVarRsaD));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_vartime_4096_start(const rsa_4096_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_4096_int_t *modulus) {
-  if (exp != kExponentF4) {
-    // TODO for other exponents, we temporarily fall back to the constant-time
-    // implementation until a variable-time implementation is supported.
-    rsa_4096_int_t exp_rsa;
-    memset(exp_rsa.data, 0, kRsa4096NumWords * sizeof(uint32_t));
-    exp_rsa.data[0] = exp;
-    return rsa_modexp_consttime_4096_start(base, &exp_rsa, modulus);
-  }
-
-  // Load the OTBN app. Fails if OTBN is not idle.
-  HARDENED_TRY(otbn_load_app(kOtbnAppRsaModexp));
-
-  // Set mode.
-  uint32_t mode = kMode4096ModexpF4;
-  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
-
-  // Set the base and the modulus n.
-  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, base->data, kOtbnVarRsaInOut));
-  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, modulus->data, kOtbnVarRsaN));
-
-  // Start OTBN.
-  return otbn_execute();
-}
-
-status_t rsa_modexp_4096_finalize(rsa_4096_int_t *result) {
-  return rsa_modexp_finalize(kRsa4096NumWords, result->data);
-}
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_modexp.h b/sw/device/lib/crypto/impl/rsa/rsa_modexp.h
deleted file mode 100644
index f5ef9866ba535..0000000000000
--- a/sw/device/lib/crypto/impl/rsa/rsa_modexp.h
+++ /dev/null
@@ -1,175 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_MODEXP_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_MODEXP_H_
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
-#include "sw/device/lib/crypto/impl/status.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Block until a modexp operation is complete and get the result size.
- *
- * After OTBN finishes processing, this function reads the mode and infers the
- * size of the modulus/signature for the just-finished operation. It then
- * populates the `num_words` parameter with this size (expressed in 32b words).
- * This is designed so that callers can call `rsa_modexp_wait()` and then use
- * the size to select the appropriate `finalize()` call.
- *
- * @param[out] num_words Number of words for result buffers.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_wait(size_t *num_words);
-
-/**
- * Start a constant-time RSA-2048 modular exponentiation.
- *
- * This construct is for secret exponents, and is much slower than the
- * variable-time version.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_consttime_2048_start(const rsa_2048_int_t *base,
-                                         const rsa_2048_int_t *exp,
-                                         const rsa_2048_int_t *modulus);
-
-/**
- * Start a variable-time RSA-2048 modular exponentiation.
- *
- * Do not use this construct with secret exponents; its timing depends on the
- * exponent.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_vartime_2048_start(const rsa_2048_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_2048_int_t *modulus);
-
-/**
- * Waits for an RSA-2048 modular exponentiation to complete.
- *
- * Can be used after either:
- * - `rsa_modexp_consttime_2048_start()`
- * - `rsa_modexp_vartime_2048_start()`
- *
- * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_2048_finalize(rsa_2048_int_t *result);
-
-/**
- * Start a constant-time RSA-3072 modular exponentiation.
- *
- * This construct is for secret exponents, and is much slower than the
- * variable-time version.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_consttime_3072_start(const rsa_3072_int_t *base,
-                                         const rsa_3072_int_t *exp,
-                                         const rsa_3072_int_t *modulus);
-
-/**
- * Start a variable-time RSA-3072 modular exponentiation.
- *
- * Do not use this construct with secret exponents; its timing depends on the
- * exponent.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_vartime_3072_start(const rsa_3072_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_3072_int_t *modulus);
-
-/**
- * Waits for an RSA-3072 modular exponentiation to complete.
- *
- * Can be used after either:
- * - `rsa_modexp_consttime_3072_start()`
- * - `rsa_modexp_vartime_3072_start()`
- *
- * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_3072_finalize(rsa_3072_int_t *result);
-
-/**
- * Start a constant-time RSA-4096 modular exponentiation.
- *
- * This construct is for secret exponents, and is much slower than the
- * variable-time version.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_consttime_4096_start(const rsa_4096_int_t *base,
-                                         const rsa_4096_int_t *exp,
-                                         const rsa_4096_int_t *modulus);
-
-/**
- * Start a variable-time RSA-4096 modular exponentiation.
- *
- * Do not use this construct with secret exponents; its timing depends on the
- * exponent.
- *
- * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
- *
- * @param base Exponentiation base.
- * @param exp Exponent to raise the base to.
- * @param modulus Modulus for exponentiation.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_vartime_4096_start(const rsa_4096_int_t *base,
-                                       const uint32_t exp,
-                                       const rsa_4096_int_t *modulus);
-
-/**
- * Waits for an RSA-4096 modular exponentiation to complete.
- *
- * Can be used after either:
- * - `rsa_modexp_consttime_4096_start()`
- * - `rsa_modexp_vartime_4096_start()`
- *
- * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
- * @return Status of the operation (OK or error).
- */
-status_t rsa_modexp_4096_finalize(rsa_4096_int_t *result);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RSA_MODEXP_H_
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_padding.c b/sw/device/lib/crypto/impl/rsa/rsa_padding.c
index 40127dec25cb4..08bc73fa06120 100644
--- a/sw/device/lib/crypto/impl/rsa/rsa_padding.c
+++ b/sw/device/lib/crypto/impl/rsa/rsa_padding.c
@@ -8,8 +8,8 @@
 #include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/crypto/drivers/hmac.h"
 #include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/include/hash.h"
 
 // Module ID for status codes.
 #define MODULE_ID MAKE_MODULE_ID('r', 'p', 'a')
@@ -68,25 +68,25 @@ static status_t digest_info_length_get(const otcrypto_hash_mode_t hash_mode,
                                        size_t *len) {
   switch (hash_mode) {
     case kOtcryptoHashModeSha256:
-      *len = sizeof(kSha256DigestIdentifier) + kSha256DigestBytes;
+      *len = sizeof(kSha256DigestIdentifier) + kHmacSha256DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha384:
-      *len = sizeof(kSha384DigestIdentifier) + kSha384DigestBytes;
+      *len = sizeof(kSha384DigestIdentifier) + kHmacSha384DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha512:
-      *len = sizeof(kSha512DigestIdentifier) + kSha512DigestBytes;
+      *len = sizeof(kSha512DigestIdentifier) + kHmacSha512DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha3_224:
-      *len = sizeof(kSha3_224DigestIdentifier) + kSha3_224DigestBytes;
+      *len = sizeof(kSha3_224DigestIdentifier) + kKmacSha3224DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha3_256:
-      *len = sizeof(kSha3_256DigestIdentifier) + kSha3_256DigestBytes;
+      *len = sizeof(kSha3_256DigestIdentifier) + kKmacSha3256DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha3_384:
-      *len = sizeof(kSha3_384DigestIdentifier) + kSha3_384DigestBytes;
+      *len = sizeof(kSha3_384DigestIdentifier) + kKmacSha3384DigestBytes;
       return OTCRYPTO_OK;
     case kOtcryptoHashModeSha3_512:
-      *len = sizeof(kSha512DigestIdentifier) + kSha3_512DigestBytes;
+      *len = sizeof(kSha512DigestIdentifier) + kKmacSha3512DigestBytes;
       return OTCRYPTO_OK;
     default:
       // Unsupported or unrecognized hash function.
@@ -116,60 +116,51 @@ static status_t digest_info_length_get(const otcrypto_hash_mode_t hash_mode,
 OT_WARN_UNUSED_RESULT
 static status_t digest_info_write(const otcrypto_hash_digest_t message_digest,
                                   uint32_t *encoding) {
+  size_t digest_wordlen = 0;
   switch (message_digest.mode) {
     case kOtcryptoHashModeSha256:
-      if (message_digest.len != kSha256DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha256DigestWords, &kSha256DigestIdentifier,
+      digest_wordlen = kHmacSha256DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha256DigestIdentifier,
              sizeof(kSha256DigestIdentifier));
       break;
     case kOtcryptoHashModeSha384:
-      if (message_digest.len != kSha384DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha384DigestWords, &kSha384DigestIdentifier,
+      digest_wordlen = kHmacSha384DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha384DigestIdentifier,
              sizeof(kSha384DigestIdentifier));
       break;
     case kOtcryptoHashModeSha512:
-      if (message_digest.len != kSha512DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha512DigestWords, &kSha512DigestIdentifier,
+      digest_wordlen = kHmacSha512DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha512DigestIdentifier,
              sizeof(kSha512DigestIdentifier));
       break;
     case kOtcryptoHashModeSha3_224:
-      if (message_digest.len != kSha3_224DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha3_224DigestWords, &kSha3_224DigestIdentifier,
+      digest_wordlen = kKmacSha3224DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha3_224DigestIdentifier,
              sizeof(kSha3_224DigestIdentifier));
       break;
     case kOtcryptoHashModeSha3_256:
-      if (message_digest.len != kSha3_256DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha3_256DigestWords, &kSha3_256DigestIdentifier,
+      digest_wordlen = kKmacSha3256DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha3_256DigestIdentifier,
              sizeof(kSha3_256DigestIdentifier));
       break;
     case kOtcryptoHashModeSha3_384:
-      if (message_digest.len != kSha3_384DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha3_384DigestWords, &kSha3_384DigestIdentifier,
+      digest_wordlen = kKmacSha3384DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha3_384DigestIdentifier,
              sizeof(kSha3_384DigestIdentifier));
       break;
     case kOtcryptoHashModeSha3_512:
-      if (message_digest.len != kSha3_512DigestWords) {
-        return OTCRYPTO_BAD_ARGS;
-      }
-      memcpy(encoding + kSha3_512DigestWords, &kSha3_512DigestIdentifier,
+      digest_wordlen = kKmacSha3512DigestWords;
+      memcpy(encoding + digest_wordlen, &kSha3_512DigestIdentifier,
              sizeof(kSha3_512DigestIdentifier));
       break;
     default:
       // Unsupported or unrecognized hash function.
       return OTCRYPTO_BAD_ARGS;
   };
+  if (launder32(message_digest.len) != digest_wordlen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(message_digest.len, digest_wordlen);
 
   // Copy the digest into the encoding, reversing the order of bytes.
   for (size_t i = 0; i < ceil_div(message_digest.len, 2); i++) {
@@ -222,6 +213,7 @@ status_t rsa_padding_pkcs1v15_verify(
   uint32_t expected_encoded_message[encoded_message_len];
   HARDENED_TRY(rsa_padding_pkcs1v15_encode(message_digest, encoded_message_len,
                                            expected_encoded_message));
+
   // Compare with the expected value.
   *result = hardened_memeq(encoded_message, expected_encoded_message,
                            ARRAYSIZE(expected_encoded_message));
@@ -269,6 +261,54 @@ static status_t digest_wordlen_get(otcrypto_hash_mode_t hash_mode,
   return OTCRYPTO_OK;
 }
 
+/**
+ * Run an iteration of a hash function using the HMAC or KMAC driver.
+ *
+ * Only supports fixed-length hash functions (SHA2 or SHA3), not XOFs.
+ *
+ * It is the caller's responsibility to ensure there is enough space allocated
+ * at `digest` to hold the result.
+ *
+ * @param hash_mode Hash function to use.
+ * @param message Message data to hash.
+ * @param message_len Length of message data in bytes.
+ * @param[out] digest Destination buffer.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t hash(otcrypto_hash_mode_t hash_mode, const uint8_t *message,
+                     size_t message_len, uint32_t *digest) {
+  switch (launder32(hash_mode)) {
+    case kOtcryptoHashModeSha256:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha256);
+      return hmac_hash_sha256(message, message_len, digest);
+    case kOtcryptoHashModeSha384:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha384);
+      return hmac_hash_sha384(message, message_len, digest);
+    case kOtcryptoHashModeSha512:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha512);
+      return hmac_hash_sha512(message, message_len, digest);
+    case kOtcryptoHashModeSha3_224:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha3_224);
+      return kmac_sha3_224(message, message_len, digest);
+    case kOtcryptoHashModeSha3_256:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha3_256);
+      return kmac_sha3_256(message, message_len, digest);
+    case kOtcryptoHashModeSha3_384:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha3_384);
+      return kmac_sha3_384(message, message_len, digest);
+    case kOtcryptoHashModeSha3_512:
+      HARDENED_CHECK_EQ(hash_mode, kOtcryptoHashModeSha3_512);
+      return kmac_sha3_512(message, message_len, digest);
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  // Should be unreachable.
+  HARDENED_TRAP();
+  return OTCRYPTO_FATAL_ERR;
+}
+
 /**
  * Mask generation function MGF1 (RFC 8017, appendix B.2.1).
  *
@@ -288,47 +328,32 @@ static status_t digest_wordlen_get(otcrypto_hash_mode_t hash_mode,
 OT_WARN_UNUSED_RESULT
 static status_t mgf1(otcrypto_hash_mode_t hash_mode, const uint8_t *seed,
                      size_t seed_len, size_t mask_len, uint32_t *mask) {
-  // Check that the number of iterations won't overflow the counter.
   size_t digest_wordlen;
   HARDENED_TRY(digest_wordlen_get(hash_mode, &digest_wordlen));
   size_t digest_bytelen = digest_wordlen * sizeof(uint32_t);
-  size_t num_iterations = ceil_div(mask_len, digest_bytelen);
-  if (num_iterations > UINT32_MAX) {
-    return OTCRYPTO_BAD_ARGS;
-  }
 
-  // First, process the iterations in which the entire digest will fit in the
-  // `mask` buffer.
   uint8_t hash_input[seed_len + sizeof(uint32_t)];
   memcpy(hash_input, seed, seed_len);
-  for (uint32_t i = 0; i < num_iterations - 1; i++) {
+  uint32_t i = 0;
+  while (0 < mask_len) {
     uint32_t ctr = __builtin_bswap32(i);
     memcpy(hash_input + seed_len, &ctr, sizeof(uint32_t));
-    otcrypto_hash_digest_t digest = {
-        .data = mask, .len = digest_wordlen, .mode = hash_mode};
-    HARDENED_TRY(otcrypto_hash(
-        (otcrypto_const_byte_buf_t){
-            .data = hash_input,
-            .len = sizeof(hash_input),
-        },
-        digest));
+    if (mask_len < digest_bytelen) {
+      // Digest won't fit in mask (last iteration). Use a temporary buffer.
+      uint32_t digest[digest_wordlen];
+      HARDENED_TRY(hash(hash_mode, hash_input, sizeof(hash_input), digest));
+      HARDENED_TRY(
+          hardened_memcpy(mask, digest, ceil_div(mask_len, sizeof(uint32_t))));
+      mask_len = 0;
+    } else {
+      HARDENED_TRY(hash(hash_mode, hash_input, sizeof(hash_input), mask));
+      mask_len -= digest_bytelen;
+    }
     mask += digest_wordlen;
-    mask_len -= digest_bytelen;
+    i++;
   }
-  HARDENED_CHECK_LE(mask_len, digest_bytelen);
-
-  // Last iteration is special; use an intermediate buffer in case the digest
-  // is longer than the remaining mask buffer.
-  uint32_t ctr = __builtin_bswap32(num_iterations - 1);
-  memcpy(hash_input + seed_len, &ctr, sizeof(uint32_t));
-  uint32_t digest_data[digest_wordlen];
-  otcrypto_hash_digest_t digest = {
-      .data = digest_data, .len = digest_wordlen, .mode = hash_mode};
-  HARDENED_TRY(
-      otcrypto_hash((otcrypto_const_byte_buf_t){.data = hash_input,
-                                                .len = sizeof(hash_input)},
-                    digest));
-  hardened_memcpy(mask, digest_data, ceil_div(mask_len, sizeof(uint32_t)));
+  HARDENED_CHECK_EQ(mask_len, 0);
+
   return OTCRYPTO_OK;
 }
 
@@ -372,18 +397,81 @@ static status_t pss_construct_h(const otcrypto_hash_digest_t message_digest,
   m_prime[1] = 0;
   uint32_t *digest_dst = &m_prime[2];
   uint32_t *salt_dst = digest_dst + message_digest.len;
-  hardened_memcpy(digest_dst, message_digest.data, message_digest.len);
+  HARDENED_TRY(
+      hardened_memcpy(digest_dst, message_digest.data, message_digest.len));
   if (salt_len > 0) {
-    hardened_memcpy(salt_dst, salt, salt_len);
+    HARDENED_TRY(hardened_memcpy(salt_dst, salt, salt_len));
   }
 
   // Construct H = Hash(M').
-  otcrypto_hash_digest_t h_buffer = {
-      .data = h, .len = message_digest.len, .mode = message_digest.mode};
-  return otcrypto_hash(
-      (otcrypto_const_byte_buf_t){.data = (unsigned char *)m_prime,
-                                  .len = sizeof(m_prime)},
-      h_buffer);
+  return hash(message_digest.mode, (unsigned char *)m_prime, sizeof(m_prime),
+              h);
+}
+
+/**
+ * Helper function to check the OAEP padding and find the index of the start of
+ * the message.
+ *
+ * This function locates the start of the message in DB = lhash || 0x00..0x00 ||
+ * 0x01 || M by searching for the 0x01 byte in constant time. In case of a
+ * padding check failure this function returns an error.
+ *
+ * @param db A pointer to the data buffer.
+ * @param lhash A encoded message hash.
+ * @param digest_wordlen The length of the digest in number of words.
+ * @param digest_bytelen The length of the digest in number of bytes.
+ * @param encoded_message_bytes A pointer to a byte array containing the encoded
+ * message.
+ * @param db_bytelen The length of the data buffer in number of bytes.
+ * @param[out] message_start_idx The index of the start of the message.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t oaep_check_padding_and_find_message_start(
+    uint32_t *db, uint32_t *lhash, uint32_t digest_wordlen,
+    size_t digest_bytelen, unsigned char *encoded_message_bytes,
+    size_t db_bytelen, volatile uint32_t *message_start_idx) {
+  unsigned char *db_bytes = (unsigned char *)db;
+  // Locate the start of the message in DB = lhash || 0x00..0x00 || 0x01 || M
+  // by searching for the 0x01 byte in constant time.
+  ct_bool32_t decode_failure = 0;
+  for (size_t i = digest_bytelen; i < db_bytelen; i++) {
+    uint32_t byte = 0;
+    memcpy(&byte, db_bytes + i, 1);
+    ct_bool32_t is_one = ct_seq32(byte, 0x01);
+    ct_bool32_t is_before_message = ct_seqz32(*message_start_idx);
+    ct_bool32_t is_message_start = is_one & is_before_message;
+    *message_start_idx = ct_cmov32(is_message_start, i + 1, *message_start_idx);
+    ct_bool32_t is_zero = ct_seqz32(byte);
+    ct_bool32_t padding_failure = is_before_message & (~is_zero) & (~is_one);
+    decode_failure |= padding_failure;
+  }
+  HARDENED_CHECK_LE(*message_start_idx, db_bytelen);
+
+  // If we never found a message start index, we should fail. However, don't
+  // fail yet to avoid leaking timing information.
+  ct_bool32_t message_start_not_found = ct_seqz32(*message_start_idx);
+  decode_failure |= message_start_not_found;
+
+  // Check that the first part of DB is equal to lhash.
+  hardened_bool_t lhash_matches = hardened_memeq(lhash, db, digest_wordlen);
+  ct_bool32_t lhash_match = ct_seq32(lhash_matches, kHardenedBoolTrue);
+  ct_bool32_t lhash_mismatch = ~lhash_match;
+  decode_failure |= lhash_mismatch;
+
+  // Check that the leading byte is 0.
+  uint32_t leading_byte = 0;
+  memcpy(&leading_byte, encoded_message_bytes, 1);
+  ct_bool32_t leading_byte_nonzero = ~ct_seqz32(leading_byte);
+  decode_failure |= leading_byte_nonzero;
+
+  // Now, decode_failure is all-zero if the decode succeeded and all-one if the
+  // decode failed.
+  if (launder32(decode_failure) != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(decode_failure, 0);
+
+  return OTCRYPTO_OK;
 }
 
 status_t rsa_padding_pss_encode(const otcrypto_hash_digest_t message_digest,
@@ -430,7 +518,7 @@ status_t rsa_padding_pss_encode(const otcrypto_hash_digest_t message_digest,
   // Compute the final encoded message and reverse the byte-order.
   //   EM = maskedDB || H || 0xbc
   unsigned char *encoded_message_bytes = (unsigned char *)encoded_message;
-  hardened_memcpy(encoded_message, db, ARRAYSIZE(db));
+  HARDENED_TRY(hardened_memcpy(encoded_message, db, ARRAYSIZE(db)));
   memcpy(encoded_message_bytes + db_bytelen, h, sizeof(h));
   encoded_message_bytes[encoded_message_bytelen - 1] = 0xbc;
   reverse_bytes(encoded_message_len, encoded_message);
@@ -559,17 +647,8 @@ status_t rsa_padding_oaep_encode(const otcrypto_hash_mode_t hash_mode,
   HARDENED_TRY(digest_wordlen_get(hash_mode, &digest_wordlen));
 
   // Hash the label (step 2a).
-  otcrypto_const_byte_buf_t label_buf = {
-      .data = label,
-      .len = label_bytelen,
-  };
-  uint32_t lhash_data[digest_wordlen];
-  otcrypto_hash_digest_t lhash = {
-      .data = lhash_data,
-      .len = ARRAYSIZE(lhash_data),
-      .mode = hash_mode,
-  };
-  HARDENED_TRY(otcrypto_hash(label_buf, lhash));
+  uint32_t lhash[digest_wordlen];
+  HARDENED_TRY(hash(hash_mode, label, label_bytelen, lhash));
 
   // Generate a random string the same length as a hash digest (step 2d).
   uint32_t seed[digest_wordlen];
@@ -593,8 +672,8 @@ status_t rsa_padding_oaep_encode(const otcrypto_hash_mode_t hash_mode,
   // all-zero (step 2f). By computing the mask first, we can simply XOR with
   // lhash, 0x01, and M, skipping PS because XOR with zero is the identity
   // function.
-  for (size_t i = 0; i < ARRAYSIZE(lhash_data); i++) {
-    db[i] ^= lhash_data[i];
+  for (size_t i = 0; i < ARRAYSIZE(lhash); i++) {
+    db[i] ^= lhash[i];
   }
   size_t message_start_idx = db_bytelen - message_bytelen;
   unsigned char *db_bytes = (unsigned char *)db;
@@ -681,17 +760,8 @@ status_t rsa_padding_oaep_decode(const otcrypto_hash_mode_t hash_mode,
   }
 
   // Hash the label (step 3a).
-  otcrypto_const_byte_buf_t label_buf = {
-      .data = label,
-      .len = label_bytelen,
-  };
-  uint32_t lhash_data[digest_wordlen];
-  otcrypto_hash_digest_t lhash = {
-      .data = lhash_data,
-      .len = digest_wordlen,
-      .mode = hash_mode,
-  };
-  HARDENED_TRY(otcrypto_hash(label_buf, lhash));
+  uint32_t lhash[digest_wordlen];
+  HARDENED_TRY(hash(hash_mode, label, label_bytelen, lhash));
 
   // Note: as we compare parts of the encoded message to their expected values,
   // we must be careful that the attacker cannot differentiate error codes or
@@ -702,54 +772,23 @@ status_t rsa_padding_oaep_decode(const otcrypto_hash_mode_t hash_mode,
 
   // Locate the start of the message in DB = lhash || 0x00..0x00 || 0x01 || M
   // by searching for the 0x01 byte in constant time.
-  unsigned char *db_bytes = (unsigned char *)db;
-  uint32_t message_start_idx = 0;
-  ct_bool32_t decode_failure = 0;
-  for (size_t i = digest_bytelen; i < db_bytelen; i++) {
-    uint32_t byte = 0;
-    memcpy(&byte, db_bytes + i, 1);
-    ct_bool32_t is_one = ct_seq32(byte, 0x01);
-    ct_bool32_t is_before_message = ct_seqz32(message_start_idx);
-    ct_bool32_t is_message_start = is_one & is_before_message;
-    message_start_idx = ct_cmov32(is_message_start, i + 1, message_start_idx);
-    ct_bool32_t is_zero = ct_seqz32(byte);
-    ct_bool32_t padding_failure = is_before_message & (~is_zero) & (~is_one);
-    decode_failure |= padding_failure;
-  }
-  HARDENED_CHECK_LE(message_start_idx, db_bytelen);
-
-  // If we never found a message start index, we should fail. However, don't
-  // fail yet to avoid leaking timing information.
-  ct_bool32_t message_start_not_found = ct_seqz32(message_start_idx);
-  decode_failure |= message_start_not_found;
-
-  // Check that the first part of DB is equal to lhash.
-  hardened_bool_t lhash_matches =
-      hardened_memeq(lhash_data, db, digest_wordlen);
-  ct_bool32_t lhash_match = ct_seq32(lhash_matches, kHardenedBoolTrue);
-  ct_bool32_t lhash_mismatch = ~lhash_match;
-  decode_failure |= lhash_mismatch;
-
-  // Check that the leading byte is 0.
-  uint32_t leading_byte = 0;
-  memcpy(&leading_byte, encoded_message_bytes, 1);
-  ct_bool32_t leading_byte_nonzero = ~ct_seqz32(leading_byte);
-  decode_failure |= leading_byte_nonzero;
-
-  // Now, decode_failure is all-zero if the decode succeeded and all-one if the
-  // decode failed.
-  if (launder32(decode_failure) != 0) {
-    return OTCRYPTO_BAD_ARGS;
-  }
-  HARDENED_CHECK_EQ(decode_failure, 0);
-
-  // TODO: re-check the padding as an FI hardening measure?
+  volatile uint32_t message_start_idx0 = 0;
+  volatile uint32_t message_start_idx1 = 0;
+  HARDENED_TRY(oaep_check_padding_and_find_message_start(
+      db, lhash, digest_wordlen, digest_bytelen, encoded_message_bytes,
+      db_bytelen, &message_start_idx0));
+  // Re-check the padding as an FI hardening measure.
+  HARDENED_TRY(oaep_check_padding_and_find_message_start(
+      db, lhash, digest_wordlen, digest_bytelen, encoded_message_bytes,
+      db_bytelen, &message_start_idx1));
+
+  HARDENED_CHECK_EQ(message_start_idx0, message_start_idx1);
 
   // If we get here, then the encoded message has a proper format and it is
   // safe to copy the message into the output buffer.
-  *message_bytelen = db_bytelen - message_start_idx;
+  *message_bytelen = db_bytelen - message_start_idx0;
   if (*message_bytelen > 0) {
-    memcpy(message, db_bytes + message_start_idx, *message_bytelen);
+    memcpy(message, (char *)db + message_start_idx0, *message_bytelen);
   }
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/impl/rsa/rsa_signature.c b/sw/device/lib/crypto/impl/rsa/rsa_signature.c
index 872add70f34fe..7e14a54edbf30 100644
--- a/sw/device/lib/crypto/impl/rsa/rsa_signature.c
+++ b/sw/device/lib/crypto/impl/rsa/rsa_signature.c
@@ -8,9 +8,8 @@
 #include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_modexp.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_padding.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/impl/rsa/run_rsa.h"
 
 // Module ID for status codes.
 #define MODULE_ID MAKE_MODULE_ID('r', 's', 'v')
@@ -75,11 +74,13 @@ static status_t message_encode(const otcrypto_hash_digest_t message_digest,
   // Check that the digest length is OK.
   HARDENED_TRY(digest_check(message_digest));
 
-  switch (padding_mode) {
+  switch (launder32(padding_mode)) {
     case kRsaSignaturePaddingPkcs1v15:
+      HARDENED_CHECK_EQ(padding_mode, kRsaSignaturePaddingPkcs1v15);
       return rsa_padding_pkcs1v15_encode(message_digest, encoded_message_len,
                                          encoded_message);
     case kRsaSignaturePaddingPss: {
+      HARDENED_CHECK_EQ(padding_mode, kRsaSignaturePaddingPss);
       // Generate a random salt value whose length matches the digest length.
       uint32_t salt[message_digest.len];
       HARDENED_TRY(entropy_complex_check());
@@ -127,11 +128,13 @@ static status_t encoded_message_verify(
   // Check that the digest length is OK.
   HARDENED_TRY(digest_check(message_digest));
 
-  switch (padding_mode) {
+  switch (launder32(padding_mode)) {
     case kRsaSignaturePaddingPkcs1v15:
+      HARDENED_CHECK_EQ(padding_mode, kRsaSignaturePaddingPkcs1v15);
       return rsa_padding_pkcs1v15_verify(message_digest, encoded_message,
                                          encoded_message_len, result);
     case kRsaSignaturePaddingPss:
+      HARDENED_CHECK_EQ(padding_mode, kRsaSignaturePaddingPss);
       return rsa_padding_pss_verify(message_digest, encoded_message,
                                     encoded_message_len, result);
     default:
@@ -155,8 +158,8 @@ status_t rsa_signature_generate_2048_start(
                               encoded_message.data));
 
   // Start computing (encoded_message ^ d) mod n.
-  return rsa_modexp_consttime_2048_start(&encoded_message, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_2048_start(&encoded_message, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
 
 status_t rsa_signature_generate_2048_finalize(rsa_2048_int_t *signature) {
@@ -166,8 +169,7 @@ status_t rsa_signature_generate_2048_finalize(rsa_2048_int_t *signature) {
 status_t rsa_signature_verify_2048_start(
     const rsa_2048_public_key_t *public_key, const rsa_2048_int_t *signature) {
   // Start computing (sig ^ e) mod n with a variable-time exponentiation.
-  return rsa_modexp_vartime_2048_start(signature, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_2048_start(signature, &public_key->n);
 }
 
 status_t rsa_signature_verify_finalize(
@@ -223,8 +225,8 @@ status_t rsa_signature_generate_3072_start(
                               encoded_message.data));
 
   // Start computing (encoded_message ^ d) mod n.
-  return rsa_modexp_consttime_3072_start(&encoded_message, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_3072_start(&encoded_message, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
 
 status_t rsa_signature_generate_3072_finalize(rsa_3072_int_t *signature) {
@@ -234,8 +236,7 @@ status_t rsa_signature_generate_3072_finalize(rsa_3072_int_t *signature) {
 status_t rsa_signature_verify_3072_start(
     const rsa_3072_public_key_t *public_key, const rsa_3072_int_t *signature) {
   // Start computing (sig ^ e) mod n with a variable-time exponentiation.
-  return rsa_modexp_vartime_3072_start(signature, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_3072_start(signature, &public_key->n);
 }
 
 status_t rsa_signature_generate_4096_start(
@@ -249,8 +250,8 @@ status_t rsa_signature_generate_4096_start(
                               encoded_message.data));
 
   // Start computing (encoded_message ^ d) mod n.
-  return rsa_modexp_consttime_4096_start(&encoded_message, &private_key->d,
-                                         &private_key->n);
+  return rsa_modexp_consttime_4096_start(&encoded_message, &private_key->d0,
+                                         &private_key->d1, &private_key->n);
 }
 
 status_t rsa_signature_generate_4096_finalize(rsa_4096_int_t *signature) {
@@ -260,6 +261,5 @@ status_t rsa_signature_generate_4096_finalize(rsa_4096_int_t *signature) {
 status_t rsa_signature_verify_4096_start(
     const rsa_4096_public_key_t *public_key, const rsa_4096_int_t *signature) {
   // Start computing (sig ^ e) mod n with a variable-time exponentiation.
-  return rsa_modexp_vartime_4096_start(signature, public_key->e,
-                                       &public_key->n);
+  return rsa_modexp_vartime_4096_start(signature, &public_key->n);
 }
diff --git a/sw/device/lib/crypto/impl/rsa/run_rsa.c b/sw/device/lib/crypto/impl/rsa/run_rsa.c
new file mode 100644
index 0000000000000..7c039b6be4227
--- /dev/null
+++ b/sw/device/lib/crypto/impl/rsa/run_rsa.c
@@ -0,0 +1,350 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/impl/rsa/run_rsa.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+#include "sw/device/lib/runtime/log.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('r', 'm', 'e')
+
+// Declare the OTBN app.
+OTBN_DECLARE_APP_SYMBOLS(run_rsa);
+static const otbn_app_t kOtbnAppRsa = OTBN_APP_T_INIT(run_rsa);
+
+// Declare offsets for input and output buffers.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, mode);    // Application mode.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_n);   // Public modulus n.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d0);  // Private exponent d0.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d1);  // Private exponent d1.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, inout);   // Input/output buffer.
+
+static const otbn_addr_t kOtbnVarRsaMode = OTBN_ADDR_T_INIT(run_rsa, mode);
+static const otbn_addr_t kOtbnVarRsaN = OTBN_ADDR_T_INIT(run_rsa, rsa_n);
+static const otbn_addr_t kOtbnVarRsaD0 = OTBN_ADDR_T_INIT(run_rsa, rsa_d0);
+static const otbn_addr_t kOtbnVarRsaD1 = OTBN_ADDR_T_INIT(run_rsa, rsa_d1);
+static const otbn_addr_t kOtbnVarRsaInOut = OTBN_ADDR_T_INIT(run_rsa, inout);
+
+// Declare mode constants.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_2048_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_3072_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_4096_KEYGEN);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_2048_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_2048_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_3072_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_3072_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_4096_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_4096_MODEXP_F4);
+static const uint32_t kMode2048Keygen =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_2048_KEYGEN);
+static const uint32_t kMode3072Keygen =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_3072_KEYGEN);
+static const uint32_t kMode4096Keygen =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_4096_KEYGEN);
+static const uint32_t kMode2048Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_2048_MODEXP);
+static const uint32_t kMode2048ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_2048_MODEXP_F4);
+static const uint32_t kMode3072Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_3072_MODEXP);
+static const uint32_t kMode3072ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_3072_MODEXP_F4);
+static const uint32_t kMode4096Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_4096_MODEXP);
+static const uint32_t kMode4096ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_4096_MODEXP_F4);
+
+enum {
+  /**
+   * Common RSA exponent with a specialized implementation.
+   *
+   * This exponent is 2^16 + 1, and called "F4" because it's the fourth Fermat
+   * number.
+   */
+  kExponentF4 = 65537
+};
+
+status_t rsa_modexp_wait(size_t *num_words) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the application mode.
+  uint32_t mode;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarRsaMode, &mode));
+
+  *num_words = 0;
+  if (mode == kMode2048Modexp || mode == kMode2048ModexpF4) {
+    *num_words = kRsa2048NumWords;
+  } else if (mode == kMode3072Modexp || mode == kMode3072ModexpF4) {
+    *num_words = kRsa3072NumWords;
+  } else if (mode == kMode4096Modexp || mode == kMode4096ModexpF4) {
+    *num_words = kRsa4096NumWords;
+  } else {
+    // Wipe DMEM.
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    // Unrecognized mode.
+    return OTCRYPTO_FATAL_ERR;
+  }
+
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Finalizes a modular exponentiation of variable size.
+ *
+ * Blocks until OTBN is done, checks for errors. Ensures the mode matches
+ * expectations. Reads back the result, and then performs an OTBN secure wipe.
+ *
+ * @param num_words Number of words for the modexp result.
+ * @param[out] result Result of the modexp operation.
+ * @return Status of the operation (OK or error).
+ */
+static status_t rsa_modexp_finalize(const size_t num_words, uint32_t *result) {
+  // Wait for OTBN to complete and get the result size.
+  size_t num_words_inferred;
+  HARDENED_TRY_WIPE_DMEM(rsa_modexp_wait(&num_words_inferred));
+
+  // Check that the inferred result size matches expectations.
+  if (num_words != num_words_inferred) {
+    // Wipe DMEM.
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_FATAL_ERR;
+  }
+
+  // Read the result.
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(num_words, kOtbnVarRsaInOut, result));
+
+  // Wipe DMEM.
+  return otbn_dmem_sec_wipe();
+}
+
+status_t rsa_modexp_consttime_2048_start(const rsa_2048_int_t *base,
+                                         const rsa_2048_int_t *exp0,
+                                         const rsa_2048_int_t *exp1,
+                                         const rsa_2048_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode2048Modexp;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base, the modulus n and private exponent d.
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, modulus->data, kOtbnVarRsaN));
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, exp0->data, kOtbnVarRsaD0));
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, exp1->data, kOtbnVarRsaD1));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_vartime_2048_start(const rsa_2048_int_t *base,
+                                       const rsa_2048_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode2048ModexpF4;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base and the modulus n.
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa2048NumWords, modulus->data, kOtbnVarRsaN));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_2048_finalize(rsa_2048_int_t *result) {
+  return rsa_modexp_finalize(kRsa2048NumWords, result->data);
+}
+
+status_t rsa_modexp_consttime_3072_start(const rsa_3072_int_t *base,
+                                         const rsa_3072_int_t *exp0,
+                                         const rsa_3072_int_t *exp1,
+                                         const rsa_3072_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode3072Modexp;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base, the modulus n and private exponent d.
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, modulus->data, kOtbnVarRsaN));
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, exp0->data, kOtbnVarRsaD0));
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, exp1->data, kOtbnVarRsaD1));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_vartime_3072_start(const rsa_3072_int_t *base,
+                                       const rsa_3072_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode3072ModexpF4;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base and the modulus n.
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa3072NumWords, modulus->data, kOtbnVarRsaN));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_3072_finalize(rsa_3072_int_t *result) {
+  return rsa_modexp_finalize(kRsa3072NumWords, result->data);
+}
+
+status_t rsa_modexp_consttime_4096_start(const rsa_4096_int_t *base,
+                                         const rsa_4096_int_t *exp0,
+                                         const rsa_4096_int_t *exp1,
+                                         const rsa_4096_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode4096Modexp;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base, the modulus n and private exponent d.
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, modulus->data, kOtbnVarRsaN));
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, exp0->data, kOtbnVarRsaD0));
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, exp1->data, kOtbnVarRsaD1));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_vartime_4096_start(const rsa_4096_int_t *base,
+                                       const rsa_4096_int_t *modulus) {
+  // Load the OTBN app. Fails if OTBN is not idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode.
+  uint32_t mode = kMode4096ModexpF4;
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  // Set the base and the modulus n.
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, base->data, kOtbnVarRsaInOut));
+  HARDENED_TRY(otbn_dmem_write(kRsa4096NumWords, modulus->data, kOtbnVarRsaN));
+
+  // Start OTBN.
+  return otbn_execute();
+}
+
+status_t rsa_modexp_4096_finalize(rsa_4096_int_t *result) {
+  return rsa_modexp_finalize(kRsa4096NumWords, result->data);
+}
+
+/**
+ * Start the OTBN key generation program in random-key mode.
+ *
+ * Cofactor mode should not use this routine, because it wipes DMEM and
+ * cofactor mode requires input data.
+ *
+ * @param mode Mode parameter for keygen.
+ * @return Result of the operation.
+ */
+static status_t keygen_start(uint32_t mode) {
+  // Load the RSA key generation app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsa));
+
+  // Set mode and start OTBN.
+  HARDENED_TRY(otbn_dmem_write(1, &mode, kOtbnVarRsaMode));
+
+  return otbn_execute();
+}
+
+/**
+ * Finalize a key generation operation (for either mode).
+ *
+ * Checks the application mode against expectations, then reads back the
+ * modulus and private exponent.
+ *
+ * @param exp_mode Application mode to expect.
+ * @param num_words Number of words for modulus and private exponent.
+ * @param[out] n Buffer for the modulus.
+ * @param[out] d Buffer for the private exponent.
+ * @return OK or error.
+ */
+static status_t keygen_finalize(uint32_t exp_mode, size_t num_words,
+                                uint32_t *n, uint32_t *d0, uint32_t *d1) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the mode from OTBN dmem and panic if it's not as expected.
+  uint32_t act_mode = 0;
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(1, kOtbnVarRsaMode, &act_mode));
+  if (act_mode != exp_mode) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_FATAL_ERR;
+  }
+
+  // Read the public modulus (n) from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(otbn_dmem_read(num_words, kOtbnVarRsaN, n));
+
+  // Read the first share of the private exponent (d) from OTBN dmem.
+  HARDENED_TRY(otbn_dmem_read(num_words, kOtbnVarRsaD0, d0));
+
+  // Read the second share of the private exponent (d) from OTBN dmem.
+  HARDENED_TRY(otbn_dmem_read(num_words, kOtbnVarRsaD1, d1));
+
+  // Wipe DMEM.
+  return otbn_dmem_sec_wipe();
+}
+
+status_t rsa_keygen_2048_start(void) { return keygen_start(kMode2048Keygen); }
+
+status_t rsa_keygen_2048_finalize(rsa_2048_public_key_t *public_key,
+                                  rsa_2048_private_key_t *private_key) {
+  HARDENED_TRY(keygen_finalize(kMode2048Keygen, kRsa2048NumWords,
+                               private_key->n.data, private_key->d0.data,
+                               private_key->d1.data));
+
+  // Copy the modulus to the public key.
+  HARDENED_TRY(hardened_memcpy(public_key->n.data, private_key->n.data,
+                               ARRAYSIZE(private_key->n.data)));
+
+  return OTCRYPTO_OK;
+}
+
+status_t rsa_keygen_3072_start(void) { return keygen_start(kMode3072Keygen); }
+
+status_t rsa_keygen_3072_finalize(rsa_3072_public_key_t *public_key,
+                                  rsa_3072_private_key_t *private_key) {
+  HARDENED_TRY(keygen_finalize(kMode3072Keygen, kRsa3072NumWords,
+                               private_key->n.data, private_key->d0.data,
+                               private_key->d1.data));
+
+  // Copy the modulus to the public key.
+  HARDENED_TRY(hardened_memcpy(public_key->n.data, private_key->n.data,
+                               ARRAYSIZE(private_key->n.data)));
+
+  return OTCRYPTO_OK;
+}
+
+status_t rsa_keygen_4096_start(void) { return keygen_start(kMode4096Keygen); }
+
+status_t rsa_keygen_4096_finalize(rsa_4096_public_key_t *public_key,
+                                  rsa_4096_private_key_t *private_key) {
+  HARDENED_TRY(keygen_finalize(kMode4096Keygen, kRsa4096NumWords,
+                               private_key->n.data, private_key->d0.data,
+                               private_key->d1.data));
+
+  // Copy the modulus to the public key.
+  HARDENED_TRY(hardened_memcpy(public_key->n.data, private_key->n.data,
+                               ARRAYSIZE(private_key->n.data)));
+
+  return OTCRYPTO_OK;
+}
diff --git a/sw/device/lib/crypto/impl/rsa/run_rsa.h b/sw/device/lib/crypto/impl/rsa/run_rsa.h
new file mode 100644
index 0000000000000..aebd56d7e9d6a
--- /dev/null
+++ b/sw/device/lib/crypto/impl/rsa/run_rsa.h
@@ -0,0 +1,247 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Block until a modexp operation is complete and get the result size.
+ *
+ * After OTBN finishes processing, this function reads the mode and infers the
+ * size of the modulus/signature for the just-finished operation. It then
+ * populates the `num_words` parameter with this size (expressed in 32b words).
+ * This is designed so that callers can call `rsa_modexp_wait()` and then use
+ * the size to select the appropriate `finalize()` call.
+ *
+ * @param[out] num_words Number of words for result buffers.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_wait(size_t *num_words);
+
+/**
+ * Start a constant-time RSA-2048 modular exponentiation.
+ *
+ * This construct is for secret exponents, and is much slower than the
+ * variable-time version.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_consttime_2048_start(const rsa_2048_int_t *base,
+                                         const rsa_2048_int_t *exp0,
+                                         const rsa_2048_int_t *exp1,
+                                         const rsa_2048_int_t *modulus);
+
+/**
+ * Start a variable-time RSA-2048 modular exponentiation.
+ *
+ * Do not use this construct with secret exponents; its timing depends on the
+ * exponent.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_vartime_2048_start(const rsa_2048_int_t *base,
+                                       const rsa_2048_int_t *modulus);
+
+/**
+ * Waits for an RSA-2048 modular exponentiation to complete.
+ *
+ * Can be used after either:
+ * - `rsa_modexp_consttime_2048_start()`
+ * - `rsa_modexp_vartime_2048_start()`
+ *
+ * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_2048_finalize(rsa_2048_int_t *result);
+
+/**
+ * Start a constant-time RSA-3072 modular exponentiation.
+ *
+ * This construct is for secret exponents, and is much slower than the
+ * variable-time version.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_consttime_3072_start(const rsa_3072_int_t *base,
+                                         const rsa_3072_int_t *exp0,
+                                         const rsa_3072_int_t *exp1,
+                                         const rsa_3072_int_t *modulus);
+
+/**
+ * Start a variable-time RSA-3072 modular exponentiation.
+ *
+ * Do not use this construct with secret exponents; its timing depends on the
+ * exponent.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_vartime_3072_start(const rsa_3072_int_t *base,
+                                       const rsa_3072_int_t *modulus);
+
+/**
+ * Waits for an RSA-3072 modular exponentiation to complete.
+ *
+ * Can be used after either:
+ * - `rsa_modexp_consttime_3072_start()`
+ * - `rsa_modexp_vartime_3072_start()`
+ *
+ * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_3072_finalize(rsa_3072_int_t *result);
+
+/**
+ * Start a constant-time RSA-4096 modular exponentiation.
+ *
+ * This construct is for secret exponents, and is much slower than the
+ * variable-time version.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_consttime_4096_start(const rsa_4096_int_t *base,
+                                         const rsa_4096_int_t *exp0,
+                                         const rsa_4096_int_t *exp1,
+                                         const rsa_4096_int_t *modulus);
+
+/**
+ * Start a variable-time RSA-4096 modular exponentiation.
+ *
+ * Do not use this construct with secret exponents; its timing depends on the
+ * exponent.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param base Exponentiation base.
+ * @param exp Exponent to raise the base to.
+ * @param modulus Modulus for exponentiation.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_vartime_4096_start(const rsa_4096_int_t *base,
+                                       const rsa_4096_int_t *modulus);
+
+/**
+ * Waits for an RSA-4096 modular exponentiation to complete.
+ *
+ * Can be used after either:
+ * - `rsa_modexp_consttime_4096_start()`
+ * - `rsa_modexp_vartime_4096_start()`
+ *
+ * @param[out] result Exponentiation result = (base ^ exp) mod modulus.
+ * @return Status of the operation (OK or error).
+ */
+status_t rsa_modexp_4096_finalize(rsa_4096_int_t *result);
+
+/**
+ * Starts an RSA-2048 key generation operation; returns immediately.
+ *
+ * The key exponent is always F4=65537; no other exponents are supported.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_2048_start(void);
+
+/**
+ * Waits for an RSA-2048 key generation to complete.
+ *
+ * Should be invoked only after `rsa_keygen_2048_start`. Blocks until OTBN is
+ * done processing.
+ *
+ * @param[out] public_key Generated public key (n, e).
+ * @param[out] private_key Generated private key (d, e).
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_2048_finalize(rsa_2048_public_key_t *public_key,
+                                  rsa_2048_private_key_t *private_key);
+
+/**
+ * Starts an RSA-3072 key generation operation; returns immediately.
+ *
+ * The key exponent is always F4=65537; no other exponents are supported.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_3072_start(void);
+
+/**
+ * Waits for an RSA-3072 key generation to complete.
+ *
+ * Should be invoked only after `rsa_keygen_3072_start`. Blocks until OTBN is
+ * done processing.
+ *
+ * @param[out] public_key Generated public key (n, e).
+ * @param[out] private_key Generated private key (d, e).
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_3072_finalize(rsa_3072_public_key_t *public_key,
+                                  rsa_3072_private_key_t *private_key);
+
+/**
+ * Starts an RSA-4096 key generation operation; returns immediately.
+ *
+ * The key exponent is always F4=65537; no other exponents are supported.
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_4096_start(void);
+
+/**
+ * Waits for an RSA-4096 key generation to complete.
+ *
+ * Should be invoked only after `rsa_keygen_4096_start`. Blocks until OTBN is
+ * done processing.
+ *
+ * @param[out] public_key Generated public key (n, e).
+ * @param[out] private_key Generated private key (d, e).
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_4096_finalize(rsa_4096_public_key_t *public_key,
+                                  rsa_4096_private_key_t *private_key);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_H_
diff --git a/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.c b/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.c
new file mode 100644
index 0000000000000..9dd246fb2af46
--- /dev/null
+++ b/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.c
@@ -0,0 +1,104 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.h"
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('r', 'k', 'g')
+
+// Declare the OTBN app.
+OTBN_DECLARE_APP_SYMBOLS(run_rsa_key_from_cofactor);
+static const otbn_app_t kOtbnAppRsaKeygen =
+    OTBN_APP_T_INIT(run_rsa_key_from_cofactor);
+
+// Declare offsets for input and output buffers.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor, mode);  // Application mode.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor,
+                         rsa_n);  // Public exponent n.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor,
+                         rsa_d0);  // Private exponent d0.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor,
+                         rsa_d1);  // Private exponent d1.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor,
+                         rsa_cofactor);  // Cofactor p or q.
+
+static const otbn_addr_t kOtbnVarRsaMode =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, mode);
+static const otbn_addr_t kOtbnVarRsaN =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, rsa_n);
+static const otbn_addr_t kOtbnVarRsaD0 =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, rsa_d0);
+static const otbn_addr_t kOtbnVarRsaD1 =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, rsa_d1);
+static const otbn_addr_t kOtbnVarRsaCofactor =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, rsa_cofactor);
+
+// Declare mode constants.
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa_key_from_cofactor, MODE_COFACTOR_RSA_2048);
+static const uint32_t kOtbnRsaModeCofactor2048 =
+    OTBN_ADDR_T_INIT(run_rsa_key_from_cofactor, MODE_COFACTOR_RSA_2048);
+
+enum {
+  /* Fixed public exponent for generated keys. This exponent is 2^16 + 1, also
+     known as "F4" because it's the fourth Fermat number. */
+  kFixedPublicExponent = 65537,
+  /* Number of words used to represent the application mode. */
+  kOtbnRsaModeWords = 1,
+};
+
+status_t rsa_keygen_from_cofactor_2048_start(
+    const rsa_2048_public_key_t *public_key,
+    const rsa_2048_cofactor_t *cofactor) {
+  // Load the RSA key generation app. Fails if OTBN is non-idle.
+  HARDENED_TRY(otbn_load_app(kOtbnAppRsaKeygen));
+
+  // Write the modulus and cofactor into DMEM.
+  HARDENED_TRY(otbn_dmem_write(ARRAYSIZE(public_key->n.data),
+                               public_key->n.data, kOtbnVarRsaN));
+  HARDENED_TRY(otbn_dmem_write(ARRAYSIZE(cofactor->data), cofactor->data,
+                               kOtbnVarRsaCofactor));
+
+  // Set mode and start OTBN.
+  uint32_t mode = kOtbnRsaModeCofactor2048;
+  HARDENED_TRY(otbn_dmem_write(kOtbnRsaModeWords, &mode, kOtbnVarRsaMode));
+  return otbn_execute();
+}
+
+status_t rsa_keygen_from_cofactor_2048_finalize(
+    rsa_2048_public_key_t *public_key, rsa_2048_private_key_t *private_key) {
+  // Spin here waiting for OTBN to complete.
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
+
+  // Read the mode from OTBN dmem and panic if it's not as expected.
+  uint32_t act_mode = 0;
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kOtbnRsaModeWords, kOtbnVarRsaMode, &act_mode));
+  if (act_mode != kOtbnRsaModeCofactor2048) {
+    HARDENED_TRY(otbn_dmem_sec_wipe());
+    return OTCRYPTO_FATAL_ERR;
+  }
+
+  // Read the public modulus (n) from OTBN dmem.
+  HARDENED_TRY_WIPE_DMEM(
+      otbn_dmem_read(kRsa2048NumWords, kOtbnVarRsaN, private_key->n.data));
+
+  // Read the first share of the private exponent (d) from OTBN dmem.
+  HARDENED_TRY(
+      otbn_dmem_read(kRsa2048NumWords, kOtbnVarRsaD0, private_key->d0.data));
+
+  // Read the second share of the private exponent (d) from OTBN dmem.
+  HARDENED_TRY(
+      otbn_dmem_read(kRsa2048NumWords, kOtbnVarRsaD1, private_key->d1.data));
+
+  // Copy the modulus to the public key.
+  HARDENED_TRY(hardened_memcpy(public_key->n.data, private_key->n.data,
+                               ARRAYSIZE(private_key->n.data)));
+
+  // Wipe DMEM.
+  return otbn_dmem_sec_wipe();
+}
diff --git a/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.h b/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.h
new file mode 100644
index 0000000000000..7a2773f2c3510
--- /dev/null
+++ b/sw/device/lib/crypto/impl/rsa/run_rsa_key_from_cofactor.h
@@ -0,0 +1,57 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_KEY_FROM_COFACTOR_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_KEY_FROM_COFACTOR_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Starts an RSA-2048 key-from-cofactor operation; returns immediately.
+ *
+ * The key exponent must be F4=65537; no other exponents are supported. This
+ * routine does not perform any checks on the generated keypair (e.g. primality
+ * checks or even range checks).
+ *
+ * Returns an `OTCRYPTO_ASYNC_INCOMPLETE` error if OTBN is busy.
+ *
+ * @param public_key Public key (n, e).
+ * @param cofactor One of the prime cofactors (p or q).
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_from_cofactor_2048_start(
+    const rsa_2048_public_key_t *public_key,
+    const rsa_2048_cofactor_t *cofactor);
+
+/**
+ * Waits for an RSA-2048 key-from-cofactor operation to complete.
+ *
+ * Should be invoked only after `rsa_keygen_from_cofactor_2048_start`. Blocks
+ * until OTBN is done processing.
+ *
+ * The public key returned by this function is recomputed by OTBN; callers may
+ * find it helpful to compare the public key modulus returned to the one that
+ * was passed to OTBN originally in order to check for errors.
+ *
+ * @param[out] public_key Generated public key (n, e).
+ * @param[out] private_key Generated private key (d, e).
+ * @return Result of the operation (OK or error).
+ */
+status_t rsa_keygen_from_cofactor_2048_finalize(
+    rsa_2048_public_key_t *public_key, rsa_2048_private_key_t *private_key);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_IMPL_RSA_RUN_RSA_KEY_FROM_COFACTOR_H_
diff --git a/sw/device/lib/crypto/impl/sha2.c b/sw/device/lib/crypto/impl/sha2.c
new file mode 100644
index 0000000000000..0f1cfbac740f8
--- /dev/null
+++ b/sw/device/lib/crypto/impl/sha2.c
@@ -0,0 +1,165 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/sha2.h"
+
+#include <stdbool.h>
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/hmac.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('s', 'h', '2')
+
+// Ensure that the hash context is large enough for HMAC driver struct.
+static_assert(
+    sizeof(otcrypto_sha2_context_t) == sizeof(hmac_ctx_t),
+    "`otcrypto_sha2_context_t` must be the same size as `hmac_ctx_t`.");
+
+otcrypto_status_t otcrypto_sha2_256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (message.data == NULL && message.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (digest->data == NULL ||
+      launder32(digest->len) != kHmacSha256DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kHmacSha256DigestWords);
+  digest->mode = kOtcryptoHashModeSha256;
+
+  return hmac_hash_sha256(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha2_384(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (message.data == NULL && message.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (digest->data == NULL ||
+      launder32(digest->len) != kHmacSha384DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kHmacSha384DigestWords);
+  digest->mode = kOtcryptoHashModeSha384;
+
+  return hmac_hash_sha384(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha2_512(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (message.data == NULL && message.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  if (digest->data == NULL ||
+      launder32(digest->len) != kHmacSha512DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kHmacSha512DigestWords);
+  digest->mode = kOtcryptoHashModeSha512;
+
+  return hmac_hash_sha512(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha2_init(otcrypto_hash_mode_t hash_mode,
+                                     otcrypto_sha2_context_t *ctx) {
+  if (ctx == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  hmac_ctx_t hmac_ctx;
+  switch (hash_mode) {
+    case kOtcryptoHashModeSha256: {
+      hmac_hash_sha256_init(&hmac_ctx);
+      break;
+    }
+    case kOtcryptoHashModeSha384: {
+      hmac_hash_sha384_init(&hmac_ctx);
+      break;
+    }
+    case kOtcryptoHashModeSha512: {
+      hmac_hash_sha512_init(&hmac_ctx);
+      break;
+    }
+    default:
+      // Unrecognized or unsupported hash mode.
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  memcpy(ctx->data, &hmac_ctx, sizeof(hmac_ctx));
+  return OTCRYPTO_OK;
+}
+
+/**
+ * Check that the message and digest sizes in a context are safe.
+ *
+ * Checking that these values are within maximum bounds protects from
+ * out-of-bounds writes in the HMAC driver, in case a caller changes the
+ * context in between calls.
+ *
+ * @param ctx HMAC context object.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+static status_t check_lengths(hmac_ctx_t *hmac_ctx) {
+  if (launder32(hmac_ctx->msg_block_wordlen) > kHmacMaxBlockWords ||
+      launder32(hmac_ctx->digest_wordlen) > kHmacMaxDigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_LE(hmac_ctx->msg_block_wordlen, kHmacMaxBlockWords);
+  HARDENED_CHECK_LE(hmac_ctx->digest_wordlen, kHmacMaxDigestWords);
+  return OTCRYPTO_OK;
+}
+
+otcrypto_status_t otcrypto_sha2_update(otcrypto_sha2_context_t *ctx,
+                                       otcrypto_const_byte_buf_t message) {
+  // Return early if the update size is 0.
+  if (message.len == 0) {
+    return OTCRYPTO_OK;
+  }
+
+  if (ctx == NULL || message.data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  hmac_ctx_t *hmac_ctx = (hmac_ctx_t *)ctx->data;
+  HARDENED_TRY(check_lengths(hmac_ctx));
+  return hmac_update(hmac_ctx, message.data, message.len);
+}
+
+otcrypto_status_t otcrypto_sha2_final(otcrypto_sha2_context_t *ctx,
+                                      otcrypto_hash_digest_t *digest) {
+  if (ctx == NULL || digest->data == NULL) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+
+  hmac_ctx_t *hmac_ctx = (hmac_ctx_t *)ctx->data;
+  HARDENED_TRY(check_lengths(hmac_ctx));
+
+  if (launder32(digest->len) != hmac_ctx->digest_wordlen) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, hmac_ctx->digest_wordlen);
+
+  // Infer the mode from the digest length.
+  switch (digest->len) {
+    case kHmacSha256DigestWords:
+      digest->mode = kOtcryptoHashModeSha256;
+      break;
+    case kHmacSha384DigestWords:
+      digest->mode = kOtcryptoHashModeSha384;
+      break;
+    case kHmacSha512DigestWords:
+      digest->mode = kOtcryptoHashModeSha512;
+      break;
+    default:
+      return OTCRYPTO_BAD_ARGS;
+  }
+
+  return hmac_final(hmac_ctx, digest->data);
+}
diff --git a/sw/device/lib/crypto/impl/sha2/BUILD b/sw/device/lib/crypto/impl/sha2/BUILD
index 918ee48721eaa..189da148e538f 100644
--- a/sw/device/lib/crypto/impl/sha2/BUILD
+++ b/sw/device/lib/crypto/impl/sha2/BUILD
@@ -4,7 +4,7 @@
 
 package(default_visibility = ["//visibility:public"])
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 cc_library(
     name = "sha256",
@@ -17,6 +17,7 @@ cc_library(
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:otbn",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/otbn/crypto:run_sha256",
     ],
 )
@@ -32,6 +33,7 @@ cc_library(
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/crypto/drivers:otbn",
+        "//sw/device/lib/crypto/drivers:rv_core_ibex",
         "//sw/otbn/crypto:run_sha512",
     ],
 )
diff --git a/sw/device/lib/crypto/impl/sha2/sha256.c b/sw/device/lib/crypto/impl/sha2/sha256.c
index 910231022d927..e06d150d55535 100644
--- a/sw/device/lib/crypto/impl/sha2/sha256.c
+++ b/sw/device/lib/crypto/impl/sha2/sha256.c
@@ -9,6 +9,7 @@
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/otbn.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
 // Module ID for status codes.
@@ -64,13 +65,16 @@ static const otbn_addr_t kOtbnVarSha256Msg = OTBN_ADDR_T_INIT(run_sha256, msg);
 static const otbn_addr_t kOtbnVarSha256NumMsgChunks =
     OTBN_ADDR_T_INIT(run_sha256, num_msg_chunks);
 
-void sha256_init(sha256_state_t *state) {
+status_t sha256_init(sha256_state_t *state) {
   // Set the initial state.
-  hardened_memcpy(state->H, kSha256InitialState, kSha256StateWords);
+  HARDENED_TRY(
+      hardened_memcpy(state->H, kSha256InitialState, kSha256StateWords));
   // Set the partial block to 0 (the value is ignored).
   memset(state->partial_block, 0, kSha256MessageBlockBytes);
   // Set the message length so far to 0.
   state->total_len = 0ull;
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -86,7 +90,7 @@ static status_t process_message_buffer(sha256_otbn_ctx_t *ctx) {
 
   // Run the OTBN program.
   HARDENED_TRY(otbn_execute());
-  HARDENED_TRY(otbn_busy_wait_for_done());
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
 
   // Reset the message buffer counter.
   ctx->num_blocks = 0;
@@ -244,7 +248,7 @@ static status_t process_message(sha256_state_t *state, const uint8_t *msg,
   }
 
   // Read the final state from OTBN dmem.
-  HARDENED_TRY(
+  HARDENED_TRY_WIPE_DMEM(
       otbn_dmem_read(kSha256StateWords, kOtbnVarSha256State, new_state.H));
 
   // Clear OTBN's memory.
@@ -252,8 +256,9 @@ static status_t process_message(sha256_state_t *state, const uint8_t *msg,
 
   // At this point, no more errors are possible; it is safe to update the
   // context object.
-  hardened_memcpy(state->H, new_state.H, kSha256StateWords);
-  hardened_memcpy(state->partial_block, block.data, kSha256MessageBlockWords);
+  HARDENED_TRY(hardened_memcpy(state->H, new_state.H, kSha256StateWords));
+  HARDENED_TRY(hardened_memcpy(state->partial_block, block.data,
+                               kSha256MessageBlockWords));
   state->total_len = new_state.total_len;
   return OTCRYPTO_OK;
 }
@@ -267,12 +272,18 @@ status_t sha256_update(sha256_state_t *state, const uint8_t *msg,
 /**
  * Replace sensitive data in a SHA-256 context with non-sensitive values.
  *
+ * The entropy complex must be initialized before calling this function.
+ *
  * @param state The context object to shred.
+ * @return OK or error.
  */
-static void state_shred(sha256_state_t *state) {
-  hardened_memshred(state->H, kSha256StateWords);
-  hardened_memshred(state->partial_block, kSha256MessageBlockWords);
+static status_t state_shred(sha256_state_t *state) {
+  HARDENED_TRY(hardened_memshred(state->H, kSha256StateWords));
+  HARDENED_TRY(
+      hardened_memshred(state->partial_block, kSha256MessageBlockWords));
   state->total_len = 0;
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -287,35 +298,44 @@ static void state_shred(sha256_state_t *state) {
  *
  * @param state Context object.
  * @param[out] digest Destination buffer for digest.
+ * @return OK or error.
  */
-static void digest_get(sha256_state_t *state, uint32_t *digest) {
+static status_t digest_get(sha256_state_t *state, uint32_t *digest) {
   for (size_t i = 0; i < kSha256StateWords / 2; i++) {
     uint32_t tmp = __builtin_bswap32(state->H[i]);
     state->H[i] = __builtin_bswap32(state->H[kSha256StateWords - 1 - i]);
     state->H[kSha256StateWords - 1 - i] = tmp;
   }
-  hardened_memcpy(digest, state->H, kSha256StateWords);
+  HARDENED_TRY(hardened_memcpy(digest, state->H, kSha256StateWords));
+
+  return OTCRYPTO_OK;
 }
 
 status_t sha256_final(sha256_state_t *state, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Construct padding.
   HARDENED_TRY(process_message(state, NULL, 0, kHardenedBoolTrue));
 
   // Retrieve the final digest and destroy the state.
-  digest_get(state, digest);
-  state_shred(state);
+  HARDENED_TRY(digest_get(state, digest));
+  HARDENED_TRY(state_shred(state));
   return OTCRYPTO_OK;
 }
 
 status_t sha256(const uint8_t *msg, const size_t msg_len, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   sha256_state_t state;
-  sha256_init(&state);
+  HARDENED_TRY(sha256_init(&state));
 
   // Process data with padding enabled.
   HARDENED_TRY(process_message(&state, msg, msg_len, kHardenedBoolTrue));
 
   // Retrieve the final digest and destroy the state.
-  digest_get(&state, digest);
-  state_shred(&state);
+  HARDENED_TRY(digest_get(&state, digest));
+  HARDENED_TRY(state_shred(&state));
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/impl/sha2/sha256.h b/sw/device/lib/crypto/impl/sha2/sha256.h
index bf77b649331b5..e070f2eee54f5 100644
--- a/sw/device/lib/crypto/impl/sha2/sha256.h
+++ b/sw/device/lib/crypto/impl/sha2/sha256.h
@@ -105,7 +105,7 @@ status_t sha256(const uint8_t *msg, const size_t msg_len, uint32_t *digest);
  * @param[out] state Hash context object to initialize.
  * @return Result of the operation (OK or error).
  */
-void sha256_init(sha256_state_t *state);
+status_t sha256_init(sha256_state_t *state);
 
 /**
  * Process new message data for a SHA-256 hash computation.
diff --git a/sw/device/lib/crypto/impl/sha2/sha512.c b/sw/device/lib/crypto/impl/sha2/sha512.c
index ea0bfad7fa8b0..9bc9d605376a3 100644
--- a/sw/device/lib/crypto/impl/sha2/sha512.c
+++ b/sw/device/lib/crypto/impl/sha2/sha512.c
@@ -9,6 +9,7 @@
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/otbn.h"
+#include "sw/device/lib/crypto/drivers/rv_core_ibex.h"
 #include "sw/device/lib/crypto/impl/status.h"
 
 // Module ID for status codes.
@@ -69,24 +70,30 @@ static const otbn_addr_t kOtbnVarSha512Msg = OTBN_ADDR_T_INIT(run_sha512, msg);
 static const otbn_addr_t kOtbnVarSha512NChunks =
     OTBN_ADDR_T_INIT(run_sha512, n_chunks);
 
-void sha512_init(sha512_state_t *state) {
+status_t sha512_init(sha512_state_t *state) {
   // Set the initial state.
-  hardened_memcpy(state->H, kSha512InitialState, kSha512StateWords);
+  HARDENED_TRY(
+      hardened_memcpy(state->H, kSha512InitialState, kSha512StateWords));
   // Set the partial block to 0 (the value is ignored).
   memset(state->partial_block, 0, sizeof(state->partial_block));
   // Set the message length so far to 0.
   state->total_len.lower = 0;
   state->total_len.upper = 0;
+
+  return OTCRYPTO_OK;
 }
 
-void sha384_init(sha512_state_t *state) {
+status_t sha384_init(sha512_state_t *state) {
   // Set the initial state.
-  hardened_memcpy(state->H, kSha384InitialState, kSha512StateWords);
+  HARDENED_TRY(
+      hardened_memcpy(state->H, kSha384InitialState, kSha512StateWords));
   // Set the partial block to 0 (the value is ignored).
   memset(state->partial_block, 0, sizeof(state->partial_block));
   // Set the message length so far to 0.
   state->total_len.lower = 0;
   state->total_len.upper = 0;
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -134,7 +141,7 @@ static status_t process_message_buffer(sha512_otbn_ctx_t *ctx) {
 
   // Run the OTBN program.
   HARDENED_TRY(otbn_execute());
-  HARDENED_TRY(otbn_busy_wait_for_done());
+  HARDENED_TRY_WIPE_DMEM(otbn_busy_wait_for_done());
 
   // Reset the message buffer counter.
   ctx->num_blocks = 0;
@@ -269,7 +276,8 @@ static status_t process_message(sha512_state_t *state, const uint8_t *msg,
   sha512_message_block_t block;
   size_t partial_block_len =
       (state->total_len.lower >> 3) % kSha512MessageBlockBytes;
-  hardened_memcpy(block.data, state->partial_block, kSha512MessageBlockWords);
+  HARDENED_TRY(hardened_memcpy(block.data, state->partial_block,
+                               kSha512MessageBlockWords));
 
   // Initialize the context for the OTBN message buffer.
   sha512_otbn_ctx_t ctx = {.num_blocks = 0};
@@ -306,8 +314,9 @@ static status_t process_message(sha512_state_t *state, const uint8_t *msg,
   // boundaries.
   otbn_addr_t state_read_addr = kOtbnVarSha512State;
   for (size_t i = 0; i + 1 < kSha512StateWords; i += 2) {
-    HARDENED_TRY(otbn_dmem_read(1, state_read_addr, &new_state.H[i + 1]));
-    HARDENED_TRY(
+    HARDENED_TRY_WIPE_DMEM(
+        otbn_dmem_read(1, state_read_addr, &new_state.H[i + 1]));
+    HARDENED_TRY_WIPE_DMEM(
         otbn_dmem_read(1, state_read_addr + sizeof(uint32_t), &new_state.H[i]));
     state_read_addr += kOtbnWideWordNumBytes;
   }
@@ -317,8 +326,9 @@ static status_t process_message(sha512_state_t *state, const uint8_t *msg,
 
   // At this point, no more errors are possible; it is safe to update the
   // context object.
-  hardened_memcpy(state->H, new_state.H, kSha512StateWords);
-  hardened_memcpy(state->partial_block, block.data, kSha512MessageBlockWords);
+  HARDENED_TRY(hardened_memcpy(state->H, new_state.H, kSha512StateWords));
+  HARDENED_TRY(hardened_memcpy(state->partial_block, block.data,
+                               kSha512MessageBlockWords));
   state->total_len.lower = new_state.total_len.lower;
   state->total_len.upper = new_state.total_len.upper;
   return OTCRYPTO_OK;
@@ -334,10 +344,12 @@ status_t sha512_update(sha512_state_t *state, const uint8_t *msg,
  * Replace sensitive data in a SHA-512 context with non-sensitive values.
  *
  * @param state The context object to shred.
+ * @return OK or error.
  */
-static void state_shred(sha512_state_t *state) {
-  hardened_memshred(state->H, kSha512StateWords);
-  hardened_memshred(state->partial_block, kSha512MessageBlockWords);
+static status_t state_shred(sha512_state_t *state) {
+  HARDENED_TRY(hardened_memshred(state->H, kSha512StateWords));
+  HARDENED_TRY(
+      hardened_memshred(state->partial_block, kSha512MessageBlockWords));
   state->total_len.lower = 0;
   state->total_len.upper = 0;
 }
@@ -351,13 +363,16 @@ static void state_shred(sha512_state_t *state) {
  *
  * @param state Context object.
  * @param[out] digest Destination buffer for digest.
+ * @return OK or error.
  */
-static void sha512_digest_get(sha512_state_t *state, uint32_t *digest) {
+static status_t sha512_digest_get(sha512_state_t *state, uint32_t *digest) {
   // Reverse the bytes in each word to match FIPS 180-4.
   for (size_t i = 0; i < kSha512StateWords; i++) {
     state->H[i] = __builtin_bswap32(state->H[i]);
   }
-  hardened_memcpy(digest, state->H, kSha512DigestWords);
+  HARDENED_TRY(hardened_memcpy(digest, state->H, kSha512DigestWords));
+
+  return OTCRYPTO_OK;
 }
 
 /**
@@ -368,33 +383,42 @@ static void sha512_digest_get(sha512_state_t *state, uint32_t *digest) {
  *
  * @param state Context object.
  * @param[out] digest Destination buffer for digest.
+ * @return OK or error.
  */
-static void sha384_digest_get(sha512_state_t *state, uint32_t *digest) {
+static status_t sha384_digest_get(sha512_state_t *state, uint32_t *digest) {
   // Reverse the bytes in each word to match FIPS 180-4.
   for (size_t i = 0; i < kSha512StateWords; i++) {
     state->H[i] = __builtin_bswap32(state->H[i]);
   }
-  hardened_memcpy(digest, state->H, kSha384DigestWords);
+  HARDENED_TRY(hardened_memcpy(digest, state->H, kSha384DigestWords));
+
+  return OTCRYPTO_OK;
 }
 
 status_t sha512_final(sha512_state_t *state, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Construct padding.
   HARDENED_TRY(process_message(state, NULL, 0, kHardenedBoolTrue));
 
   // Copy the digest and then destroy the state.
-  sha512_digest_get(state, digest);
-  state_shred(state);
+  HARDENED_TRY(sha512_digest_get(state, digest));
+  HARDENED_TRY(state_shred(state));
   return OTCRYPTO_OK;
 }
 
 status_t sha512(const uint8_t *msg, const size_t msg_len, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   sha512_state_t state;
-  sha512_init(&state);
+  HARDENED_TRY(sha512_init(&state));
 
   // Process data with padding enabled.
   HARDENED_TRY(process_message(&state, msg, msg_len, kHardenedBoolTrue));
-  sha512_digest_get(&state, digest);
-  state_shred(&state);
+  HARDENED_TRY(sha512_digest_get(&state, digest));
+  HARDENED_TRY(state_shred(&state));
   return OTCRYPTO_OK;
 }
 
@@ -405,22 +429,28 @@ status_t sha384_update(sha384_state_t *state, const uint8_t *msg,
 }
 
 status_t sha384_final(sha384_state_t *state, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   // Construct padding.
   HARDENED_TRY(process_message(state, NULL, 0, kHardenedBoolTrue));
 
   // Copy the digest and then destroy the state.
-  sha384_digest_get(state, digest);
-  state_shred(state);
+  HARDENED_TRY(sha384_digest_get(state, digest));
+  HARDENED_TRY(state_shred(state));
   return OTCRYPTO_OK;
 }
 
 status_t sha384(const uint8_t *msg, const size_t msg_len, uint32_t *digest) {
+  // Entropy complex needs to be initialized for `state_shred`.
+  HARDENED_TRY(entropy_complex_check());
+
   sha384_state_t state;
-  sha384_init(&state);
+  HARDENED_TRY(sha384_init(&state));
 
   // Process data with padding enabled.
   HARDENED_TRY(process_message(&state, msg, msg_len, kHardenedBoolTrue));
-  sha384_digest_get(&state, digest);
-  state_shred(&state);
+  HARDENED_TRY(sha384_digest_get(&state, digest));
+  HARDENED_TRY(state_shred(&state));
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/lib/crypto/impl/sha2/sha512.h b/sw/device/lib/crypto/impl/sha2/sha512.h
index 3605e75c22e4a..a1cf2c829f44a 100644
--- a/sw/device/lib/crypto/impl/sha2/sha512.h
+++ b/sw/device/lib/crypto/impl/sha2/sha512.h
@@ -144,7 +144,7 @@ status_t sha384(const uint8_t *msg, const size_t msg_len, uint32_t *digest);
  * @param[out] state Hash context object to initialize.
  * @return Result of the operation (OK or error).
  */
-void sha384_init(sha384_state_t *state);
+status_t sha384_init(sha384_state_t *state);
 
 /**
  * Process new message data for a SHA-384 hash computation.
@@ -208,7 +208,7 @@ status_t sha512(const uint8_t *msg, const size_t msg_len, uint32_t *digest);
  * @param[out] state Hash context object to initialize.
  * @return Result of the operation (OK or error).
  */
-void sha512_init(sha512_state_t *state);
+status_t sha512_init(sha512_state_t *state);
 
 /**
  * Process new message data for a SHA-512 hash computation.
diff --git a/sw/device/lib/crypto/impl/sha3.c b/sw/device/lib/crypto/impl/sha3.c
new file mode 100644
index 0000000000000..cc0deb4077f90
--- /dev/null
+++ b/sw/device/lib/crypto/impl/sha3.c
@@ -0,0 +1,100 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/sha3.h"
+
+#include <stdbool.h>
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/crypto/drivers/kmac.h"
+#include "sw/device/lib/crypto/impl/status.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('s', 'h', '3')
+
+otcrypto_status_t otcrypto_sha3_224(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (launder32(digest->len) != kKmacSha3224DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kKmacSha3224DigestWords);
+  digest->mode = kOtcryptoHashModeSha3_224;
+  return kmac_sha3_224(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha3_256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (launder32(digest->len) != kKmacSha3256DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kKmacSha3256DigestWords);
+  digest->mode = kOtcryptoHashModeSha3_256;
+  return kmac_sha3_256(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha3_384(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (launder32(digest->len) != kKmacSha3384DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kKmacSha3384DigestWords);
+  digest->mode = kOtcryptoHashModeSha3_384;
+  return kmac_sha3_384(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_sha3_512(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  if (launder32(digest->len) != kKmacSha3512DigestWords) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  HARDENED_CHECK_EQ(digest->len, kKmacSha3512DigestWords);
+  digest->mode = kOtcryptoHashModeSha3_512;
+  return kmac_sha3_512(message.data, message.len, digest->data);
+}
+
+otcrypto_status_t otcrypto_shake128(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  digest->mode = kOtcryptoHashXofModeShake128;
+  return kmac_shake_128(message.data, message.len, digest->data, digest->len);
+}
+
+otcrypto_status_t otcrypto_shake256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest) {
+  digest->mode = kOtcryptoHashXofModeShake256;
+  return kmac_shake_256(message.data, message.len, digest->data, digest->len);
+}
+
+otcrypto_status_t otcrypto_cshake128(
+    otcrypto_const_byte_buf_t message,
+    otcrypto_const_byte_buf_t function_name_string,
+    otcrypto_const_byte_buf_t customization_string,
+    otcrypto_hash_digest_t *digest) {
+  if (function_name_string.data == NULL && function_name_string.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (customization_string.data == NULL && customization_string.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  digest->mode = kOtcryptoHashXofModeCshake128;
+  return kmac_cshake_128(message.data, message.len, function_name_string.data,
+                         function_name_string.len, customization_string.data,
+                         customization_string.len, digest->data, digest->len);
+}
+
+otcrypto_status_t otcrypto_cshake256(
+    otcrypto_const_byte_buf_t message,
+    otcrypto_const_byte_buf_t function_name_string,
+    otcrypto_const_byte_buf_t customization_string,
+    otcrypto_hash_digest_t *digest) {
+  if (function_name_string.data == NULL && function_name_string.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  if (customization_string.data == NULL && customization_string.len != 0) {
+    return OTCRYPTO_BAD_ARGS;
+  }
+  digest->mode = kOtcryptoHashXofModeCshake256;
+  return kmac_cshake_256(message.data, message.len, function_name_string.data,
+                         function_name_string.len, customization_string.data,
+                         customization_string.len, digest->data, digest->len);
+}
diff --git a/sw/device/lib/crypto/impl/status.h b/sw/device/lib/crypto/impl/status.h
index 5eed052690c1a..18404aea79648 100644
--- a/sw/device/lib/crypto/impl/status.h
+++ b/sw/device/lib/crypto/impl/status.h
@@ -58,27 +58,49 @@ extern "C" {
 
 #endif
 
+#ifndef OT_DISABLE_HARDENING
 /**
  * Hardened version of the `TRY` macro from `status.h`.
  *
- * Returns the error unmodified if `status_ok` fails, and throws a
- * fatal error if the OK code does not match the hardened value.
+ * Returns an error if either expr_ represents an error, or if the OK code does
+ * not match the expected hardened value.
  *
  * @param expr_ An expression that evaluates to a `status_t`.
  * @return The enclosed OK value.
  */
-#define HARDENED_TRY(expr_)                                           \
-  ({                                                                  \
-    status_t status_ = expr_;                                         \
-    if (!status_ok(status_)) {                                        \
-      return status_;                                                 \
-    }                                                                 \
-    if (launder32(OT_UNSIGNED(status_.value)) != kHardenedBoolTrue) { \
-      return OTCRYPTO_FATAL_ERR;                                      \
-    }                                                                 \
-    HARDENED_CHECK_EQ(status_.value, kHardenedBoolTrue);              \
-    status_.value;                                                    \
-  })
+#define HARDENED_TRY(expr_)                                             \
+  do {                                                                  \
+    status_t status_ = expr_;                                           \
+    if (launder32(OT_UNSIGNED(status_.value)) != kHardenedBoolTrue) {   \
+      return (status_t){                                                \
+          .value = (int32_t)(OT_UNSIGNED(status_.value) | 0x80000000)}; \
+    }                                                                   \
+    HARDENED_CHECK_EQ(status_.value, kHardenedBoolTrue);                \
+    status_.value;                                                      \
+  } while (false)
+
+#else  // OT_DISABLE_HARDENING
+
+/**
+ * Alternate version of HARDENED_TRY that is logically equivalent.
+ *
+ * This can be used to measure the code size and performance impact of
+ * control-flow countermeasures.
+ *
+ * @param expr_ An expression that evaluates to a `status_t`.
+ * @return The enclosed OK value.
+ */
+#define HARDENED_TRY(expr_)                                             \
+  do {                                                                  \
+    status_t status_ = expr_;                                           \
+    if (status_.value != kHardenedBoolTrue) {                           \
+      return (status_t){                                                \
+          .value = (int32_t)(OT_UNSIGNED(status_.value) | 0x80000000)}; \
+    }                                                                   \
+    status_.value;                                                      \
+  } while (false)
+
+#endif  // OT_DISABLE_HARDENING
 
 #ifdef __cplusplus
 }
diff --git a/sw/device/lib/crypto/impl/status_unittest.cc b/sw/device/lib/crypto/impl/status_unittest.cc
index c99a1b31228ef..6d61524db8c15 100644
--- a/sw/device/lib/crypto/impl/status_unittest.cc
+++ b/sw/device/lib/crypto/impl/status_unittest.cc
@@ -84,7 +84,7 @@ __attribute__((noinline)) status_t do_hardened_try(status_t status) {
 }
 
 TEST(Status, HardenedTryOfNonHardenedOkIsError) {
-  EXPECT_EQ(status_err(do_hardened_try(OK_STATUS())), kFailedPrecondition);
+  EXPECT_EQ(status_ok(do_hardened_try(OK_STATUS())), false);
 }
 
 TEST(Status, HardenedTryOfHardenedOkIsOk) {
diff --git a/sw/device/lib/crypto/impl/x25519.c b/sw/device/lib/crypto/impl/x25519.c
new file mode 100644
index 0000000000000..8107140e791b6
--- /dev/null
+++ b/sw/device/lib/crypto/impl/x25519.c
@@ -0,0 +1,49 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/crypto/include/x25519.h"
+
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+// Module ID for status codes.
+#define MODULE_ID MAKE_MODULE_ID('x', '2', '5')
+
+otcrypto_status_t otcrypto_x25519_keygen(otcrypto_blinded_key_t *private_key,
+                                         otcrypto_unblinded_key_t *public_key) {
+  // TODO: Connect X25519 operations to API.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_x25519(const otcrypto_blinded_key_t *private_key,
+                                  const otcrypto_unblinded_key_t *public_key,
+                                  otcrypto_blinded_key_t *shared_secret) {
+  // TODO: Connect X25519 operations to API.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_x25519_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key) {
+  // TODO: X25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_x25519_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key) {
+  // TODO: X25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_x25519_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key) {
+  // TODO: X25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
+
+otcrypto_status_t otcrypto_x25519_async_finalize(
+    otcrypto_blinded_key_t *shared_secret) {
+  // TODO: X25519 is not yet implemented.
+  return OTCRYPTO_NOT_IMPLEMENTED;
+}
diff --git a/sw/device/lib/crypto/include/BUILD b/sw/device/lib/crypto/include/BUILD
index f9b4c985e2499..9fdd5ddb98f68 100644
--- a/sw/device/lib/crypto/include/BUILD
+++ b/sw/device/lib/crypto/include/BUILD
@@ -24,15 +24,24 @@ cc_library(
     name = "crypto_hdrs",
     hdrs = [
         "aes.h",
+        "aes_gcm.h",
+        "cryptolib_build_info.h",
         "datatypes.h",
         "drbg.h",
-        "ecc.h",
-        "hash.h",
-        "kdf.h",
+        "ecc_p256.h",
+        "ecc_p384.h",
+        "ed25519.h",
+        "hkdf.h",
+        "hmac.h",
+        "kdf_ctr.h",
         "key_transport.h",
-        "mac.h",
+        "kmac.h",
+        "kmac_kdf.h",
         "otcrypto.h",
         "rsa.h",
+        "sha2.h",
+        "sha3.h",
+        "x25519.h",
     ],
     defines = ["OTCRYPTO_IN_REPO=1"],
     includes = ["."],
@@ -48,15 +57,24 @@ cc_library(
     name = "exported_headers_for_test",
     hdrs = [
         "aes.h",
+        "aes_gcm.h",
+        "cryptolib_build_info.h",
         "datatypes.h",
         "drbg.h",
-        "ecc.h",
-        "hash.h",
-        "kdf.h",
+        "ecc_p256.h",
+        "ecc_p384.h",
+        "ed25519.h",
+        "hkdf.h",
+        "hmac.h",
+        "kdf_ctr.h",
         "key_transport.h",
-        "mac.h",
+        "kmac.h",
+        "kmac_kdf.h",
         "otcrypto.h",
         "rsa.h",
+        "sha2.h",
+        "sha3.h",
+        "x25519.h",
         "//sw/device/lib/crypto/include/freestanding:absl_status.h",
         "//sw/device/lib/crypto/include/freestanding:defs.h",
         "//sw/device/lib/crypto/include/freestanding:hardened.h",
diff --git a/sw/device/lib/crypto/include/aes.h b/sw/device/lib/crypto/include/aes.h
index a9ae59c9f930a..3eb86c97d5fef 100644
--- a/sw/device/lib/crypto/include/aes.h
+++ b/sw/device/lib/crypto/include/aes.h
@@ -16,22 +16,6 @@
 extern "C" {
 #endif  // __cplusplus
 
-/**
- * Enum to denote the AES-GCM tag length.
- *
- * Values are hardened.
- */
-typedef enum otcrypto_aes_gcm_tag_len {
-  // Tag length 128 bits.
-  kOtcryptoAesGcmTagLen128 = 0x167,
-  // Tag length 96 bits.
-  kOtcryptoAesGcmTagLen96 = 0x35a,
-  // Tag length 64 bits.
-  kOtcryptoAesGcmTagLen64 = 0x5d4,
-  // Tag length 32 bits.
-  kOtcryptoAesGcmTagLen32 = 0xf06,
-} otcrypto_aes_gcm_tag_len_t;
-
 /**
  * Enum to define AES mode of operation.
  *
@@ -76,16 +60,6 @@ typedef enum otcrypto_aes_padding {
   kOtcryptoAesPaddingNull = 0x8ce,
 } otcrypto_aes_padding_t;
 
-/**
- * Context for a streaming AES-GCM operation.
- *
- * Representation is internal to the AES-GCM implementation and subject to
- * change.
- */
-typedef struct otcrypto_aes_gcm_context {
-  uint32_t data[98];
-} otcrypto_aes_gcm_context_t;
-
 /**
  * Get the number of blocks needed for the plaintext length and padding mode.
  *
@@ -128,7 +102,7 @@ otcrypto_status_t otcrypto_aes_padded_plaintext_length(
  * @param[out] cipher_output Output data after cipher operation.
  * @return The result of the cipher operation.
  */
-otcrypto_status_t otcrypto_aes(const otcrypto_blinded_key_t *key,
+otcrypto_status_t otcrypto_aes(otcrypto_blinded_key_t *key,
                                otcrypto_word32_buf_t iv,
                                otcrypto_aes_mode_t aes_mode,
                                otcrypto_aes_operation_t aes_operation,
@@ -136,286 +110,6 @@ otcrypto_status_t otcrypto_aes(const otcrypto_blinded_key_t *key,
                                otcrypto_aes_padding_t aes_padding,
                                otcrypto_byte_buf_t cipher_output);
 
-/**
- * Performs the AES-GCM authenticated encryption operation.
- *
- * This function encrypts the input `plaintext` to produce an
- * output `ciphertext`. Together it generates an authentication
- * tag `auth_tag` on the ciphered data and any non-confidential
- * additional authenticated data `aad`.
- *
- * The caller should allocate space for the `ciphertext` buffer,
- * (same length as input), `auth_tag` buffer (same as tag_len), and
- * set the length of expected outputs in the `len` field of
- * `ciphertext` and `auth_tag`. If the user-set length and the output
- * length does not match, an error message will be returned.
- *
- * @param key Pointer to the blinded gcm-key struct.
- * @param plaintext Input data to be encrypted and authenticated.
- * @param iv Initialization vector for the encryption function.
- * @param aad Additional authenticated data.
- * @param tag_len Length of authentication tag to be generated.
- * @param[out] ciphertext Encrypted output data, same length as input data.
- * @param[out] auth_tag Generated authentication tag.
- * @return Result of the authenticated encryption.
- * operation
- */
-otcrypto_status_t otcrypto_aes_gcm_encrypt(const otcrypto_blinded_key_t *key,
-                                           otcrypto_const_byte_buf_t plaintext,
-                                           otcrypto_const_word32_buf_t iv,
-                                           otcrypto_const_byte_buf_t aad,
-                                           otcrypto_aes_gcm_tag_len_t tag_len,
-                                           otcrypto_byte_buf_t ciphertext,
-                                           otcrypto_word32_buf_t auth_tag);
-
-/**
- * Performs the AES-GCM authenticated decryption operation.
- *
- * This function first verifies if the authentication tag `auth_tag`
- * matches the internally generated tag. Upon verification, the
- * function decrypts the input `ciphertext` to get a `plaintext data.
- *
- * The caller should allocate space for the `plaintext` buffer,
- * (same length as ciphertext), and set the length of expected output
- * in the `len` field of `plaintext`. If the user-set length and the
- * output length does not match, an error message will be returned.
- *
- * The caller must check the `success` argument before operating on
- * `plaintext`. If the authentication check fails, then `plaintext` should not
- * be used and there are no guarantees about its contents.
- *
- * @param key Pointer to the blinded gcm-key struct.
- * @param ciphertext Input data to be decrypted.
- * @param iv Initialization vector for the decryption function.
- * @param aad Additional authenticated data.
- * @param tag_len Length of authentication tag to be generated.
- * @param auth_tag Authentication tag to be verified.
- * @param[out] plaintext Decrypted plaintext data, same len as input data.
- * @param[out] success True if the authentication check passed, otherwise false.
- * @return Result of the authenticated decryption.
- * operation
- */
-otcrypto_status_t otcrypto_aes_gcm_decrypt(
-    const otcrypto_blinded_key_t *key, otcrypto_const_byte_buf_t ciphertext,
-    otcrypto_const_word32_buf_t iv, otcrypto_const_byte_buf_t aad,
-    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_const_word32_buf_t auth_tag,
-    otcrypto_byte_buf_t plaintext, hardened_bool_t *success);
-
-/**
- * Initializes the AES-GCM authenticated encryption operation.
- *
- * The order of operations for encryption is:
- *   - `otcrypto_aes_gcm_encrypt_init()` called once
- *   - `otcrypto_aes_gcm_update_aad()` called zero or more times
- *   - `otcrypto_aes_gcm_update_encrypted_data()` called zero or more times
- *   - `otcrypto_aes_gcm_encrypt_final()` called once
- *
- * Associated data must be added first, before encrypted data; the caller may
- * not call `otcrypto_aes_gcm_udpate_aad()` after the first call to
- * `otcrypto_aes_gcm_update_encrypted_data()`.
- *
- * The resulting AES-GCM context will include pointers into the keyblob of the
- * blinded key. It is important that the blinded key (or at least the keyblob)
- * remains live as long as `ctx` is. The IV is safe to free.
- *
- * @param key Pointer to the blinded key struct.
- * @param iv Initialization vector for the encryption function.
- * @param[out] ctx Context object for the operation.
- * @return Result of the initialization operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_encrypt_init(
-    const otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
-    otcrypto_aes_gcm_context_t *ctx);
-
-/**
- * Initializes the AES-GCM authenticated decryption operation.
- *
- * The order of operations for decryption is:
- *   - `otcrypto_aes_gcm_decrypt_init()` called once
- *   - `otcrypto_aes_gcm_update_aad()` called zero or more times
- *   - `otcrypto_aes_gcm_update_encrypted_data()` called zero or more times
- *   - `otcrypto_aes_gcm_decrypt_final()` called once
- *
- * Associated data must be added first, before encrypted data; the caller may
- * not call `otcrypto_aes_gcm_udpate_aad()` after the first call to
- * `otcrypto_aes_gcm_update_encrypted_data()`.
- *
- * The resulting AES-GCM context will include pointers into the keyblob of the
- * blinded key. It is important that the blinded key (or at least the keyblob)
- * remains live as long as `ctx` is. The IV is safe to free.
- *
- * IMPORTANT: Although this routine produces decrypted data incrementally, it
- * is the caller's responsibility to ensure that they do not trust the
- * decrypted data until the tag check passes.
- *
- * @param key Pointer to the blinded key struct.
- * @param iv Initialization vector for the decryption function.
- * @param[out] ctx Context object for the operation.
- * @return Result of the initialization operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_decrypt_init(
-    const otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
-    otcrypto_aes_gcm_context_t *ctx);
-/**
- * Updates additional authenticated data for an AES-GCM operation.
- *
- * May be used for either encryption or decryption. Call
- * `otcrypto_aes_gcm_encrypt_init` or `otcrypto_aes_gcm_decrypt_init` first.
- *
- * @param ctx Context object for the operation, updated in place.
- * @param aad Additional authenticated data.
- * @return Result of the update operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_update_aad(otcrypto_aes_gcm_context_t *ctx,
-                                              otcrypto_const_byte_buf_t aad);
-
-/**
- * Updates authenticated-and-encrypted data for an AES-GCM operation.
- *
- * May be used for either encryption or decryption. Call
- * `otcrypto_aes_gcm_encrypt_init` or `otcrypto_aes_gcm_decrypt_init` first.
- *
- * The caller should allocate space for the output and set the `len` field
- * accordingly.
- *
- * For encryption, `input` is the plaintext and `output` is the ciphertext; for
- * decryption, they are reversed. The output must always be long enough to
- * store all full 128-bit blocks of encrypted data received so far minus all
- * output produced so far; rounding the input length to the next 128-bit
- * boundary is always enough, but if the caller knows the exact byte-length of
- * input so far they can calculate it exactly. Returns an error if `output` is
- * not long enough; if `output` is overly long, only the first
- * `output_bytes_written` bytes will be used.
- *
- * @param ctx Context object for the operation, updated in place.
- * @param input Plaintext for encryption, ciphertext for decryption.
- * @param[out] output Ciphertext for encryption, plaintext for decryption.
- * @param[out] output_bytes_written Number of bytes written to `output`.
- * @return Result of the update operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_update_encrypted_data(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_byte_buf_t input,
-    otcrypto_byte_buf_t output, size_t *output_bytes_written);
-
-/**
- * Finishes the AES-GCM authenticated encryption operation.
- *
- * Processes any remaining plaintext from the context and computes the
- * authentication tag and up to 1 block of ciphertext.
- *
- * The caller should allocate space for the ciphertext and tag buffers and set
- * the `len` fields accordingly. This function returns the
- * `ciphertext_bytes_written` parameter with the number of bytes written to
- * `ciphertext`, which is always either 16 or 0. This function returns an error
- * if the ciphertext or tag buffer is not long enough.
- *
- * @param ctx Context object for the operation.
- * @param tag_len Length of authentication tag to be generated.
- * @param[out] ciphertext Encrypted output data.
- * @param[out] ciphertext_bytes_written Number of bytes written to `ciphertext`.
- * @param[out] auth_tag Generated authentication tag.
- * @return Result of the final operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_encrypt_final(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_aes_gcm_tag_len_t tag_len,
-    otcrypto_byte_buf_t ciphertext, size_t *ciphertext_bytes_written,
-    otcrypto_word32_buf_t auth_tag);
-
-/**
- * Finishes the AES-GCM authenticated decryption operation.
- *
- * Processes any remaining ciphertext from the context and computes the
- * authentication tag and up to 1 block of plaintext.
- *
- * The caller should allocate space for the plaintext buffer and set the `len`
- * field accordingly. This function returns the `ciphertext_bytes_written`
- * parameter with the number of bytes written to `ciphertext`. This function
- * returns an error if the plaintext buffer is not long enough.
- *
- * IMPORTANT: the caller must check both the returned status and the `success`
- * parameter to know if the tag is valid. The returned status may be OK even if
- * the tag check did not succeed, if there were no errors during processing.
- *
- * @param ctx Context object for the operation.
- * @param auth_tag Authentication tag to check.
- * @param tag_len Length of authentication tag.
- * @param[out] plaintext Decrypted output data.
- * @param[out] plaintext_bytes_written Number of bytes written to `plaintext`.
- * @param[out] success Whether the tag passed verification.
- * @return Result of the final operation.
- */
-otcrypto_status_t otcrypto_aes_gcm_decrypt_final(
-    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_word32_buf_t auth_tag,
-    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_byte_buf_t plaintext,
-    size_t *plaintext_bytes_written, hardened_bool_t *success);
-
-/**
- * Returns the length that the blinded key will have once wrapped.
- *
- * @param config Key configuration.
- * @param[out] wrapped_num_words Number of 32b words for the wrapped key.
- * @return Result of the operation.
- */
-otcrypto_status_t otcrypto_aes_kwp_wrapped_len(
-    const otcrypto_key_config_t config, size_t *wrapped_num_words);
-
-/**
- * Performs the cryptographic key wrapping operation.
- *
- * This key wrap function takes an input key `key_to_wrap` and using
- * the encryption key `key_kek` outputs a wrapped key `wrapped_key`.
- *
- * The caller should allocate space for the `wrapped_key` buffer according to
- * `otcrypto_aes_kwp_wrapped_len`., and set the length of expected output
- * in the `len` field of `wrapped_key`. If the user-set length and the
- * output length do not match, an error message will be returned.
- *
- * The blinded key struct to wrap must be 32-bit aligned.
- *
- * @param key_to_wrap Pointer to the blinded key to be wrapped.
- * @param key_kek Input Pointer to the blinded encryption key.
- * @param[out] wrapped_key Pointer to the output wrapped key.
- * @return Result of the aes-kwp wrap operation.
- */
-otcrypto_status_t otcrypto_aes_kwp_wrap(
-    const otcrypto_blinded_key_t *key_to_wrap,
-    const otcrypto_blinded_key_t *key_kek, otcrypto_word32_buf_t wrapped_key);
-
-/**
- * Performs the cryptographic key unwrapping operation.
- *
- * This key unwrap function takes a wrapped key `wrapped_key` and using
- * encryption key `key_kek` outputs an unwrapped key `unwrapped_key`.
- *
- * The caller must allocate space for the keyblob and set the keyblob-length
- * and keyblob fields in `unwrapped_key` accordingly. If there is not enough
- * space in the keyblob, this function will return an error. Too much space in
- * the keyblob is okay; this function will write to the first part of the
- * keyblob buffer and set the keyblob length field to the correct exact value
- * for the unwrapped key, at which point it is safe to check the new length and
- * free the remaining keyblob memory. It is always safe to allocate a keyblob
- * the same size as the wrapped key; this will always be enough space by
- * definition.
- *
- * The caller does not need to populate the blinded key configuration, since
- * this information is encrypted along with the key.  However, the caller may
- * want to check that the configuration matches expectations.
- *
- * An OK status from this function does NOT necessarily mean that unwrapping
- * succeeded; the caller must check both the returned status and the `success`
- * parameter before reading the unwrapped key.
- *
- * @param wrapped_key Pointer to the input wrapped key.
- * @param key_kek Input Pointer to the blinded encryption key.
- * @param[out] success Whether the wrapped key was valid.
- * @param[out] unwrapped_key Pointer to the output unwrapped key struct.
- * @return Result of the aes-kwp unwrap operation.
- */
-otcrypto_status_t otcrypto_aes_kwp_unwrap(
-    otcrypto_const_word32_buf_t wrapped_key,
-    const otcrypto_blinded_key_t *key_kek, hardened_bool_t *success,
-    otcrypto_blinded_key_t *unwrapped_key);
-
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/lib/crypto/include/aes_gcm.h b/sw/device/lib/crypto/include/aes_gcm.h
new file mode 100644
index 0000000000000..291e8f94c7ed1
--- /dev/null
+++ b/sw/device/lib/crypto/include/aes_gcm.h
@@ -0,0 +1,262 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_AES_GCM_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_AES_GCM_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief AES-GCM operations for the OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Enum to denote the AES-GCM tag length.
+ *
+ * Values are hardened.
+ */
+typedef enum otcrypto_aes_gcm_tag_len {
+  // Tag length 128 bits.
+  kOtcryptoAesGcmTagLen128 = 0x167,
+  // Tag length 96 bits.
+  kOtcryptoAesGcmTagLen96 = 0x35a,
+  // Tag length 64 bits.
+  kOtcryptoAesGcmTagLen64 = 0x5d4,
+  // Tag length 32 bits.
+  kOtcryptoAesGcmTagLen32 = 0xf06,
+} otcrypto_aes_gcm_tag_len_t;
+
+/**
+ * Context for a streaming AES-GCM operation.
+ *
+ * Representation is internal to the AES-GCM implementation and subject to
+ * change.
+ */
+typedef struct otcrypto_aes_gcm_context {
+  uint32_t data[192];
+} otcrypto_aes_gcm_context_t;
+
+/**
+ * Performs the AES-GCM authenticated encryption operation.
+ *
+ * This function encrypts the input `plaintext` to produce an
+ * output `ciphertext`. Together it generates an authentication
+ * tag `auth_tag` on the ciphered data and any non-confidential
+ * additional authenticated data `aad`.
+ *
+ * The caller should allocate space for the `ciphertext` buffer,
+ * (same length as input), `auth_tag` buffer (same as tag_len), and
+ * set the length of expected outputs in the `len` field of
+ * `ciphertext` and `auth_tag`. If the user-set length and the output
+ * length does not match, an error message will be returned.
+ *
+ * @param key Pointer to the blinded gcm-key struct.
+ * @param plaintext Input data to be encrypted and authenticated.
+ * @param iv Initialization vector for the encryption function.
+ * @param aad Additional authenticated data.
+ * @param tag_len Length of authentication tag to be generated.
+ * @param[out] ciphertext Encrypted output data, same length as input data.
+ * @param[out] auth_tag Generated authentication tag.
+ * @return Result of the authenticated encryption.
+ * operation
+ */
+otcrypto_status_t otcrypto_aes_gcm_encrypt(otcrypto_blinded_key_t *key,
+                                           otcrypto_const_byte_buf_t plaintext,
+                                           otcrypto_const_word32_buf_t iv,
+                                           otcrypto_const_byte_buf_t aad,
+                                           otcrypto_aes_gcm_tag_len_t tag_len,
+                                           otcrypto_byte_buf_t ciphertext,
+                                           otcrypto_word32_buf_t auth_tag);
+
+/**
+ * Performs the AES-GCM authenticated decryption operation.
+ *
+ * This function first verifies if the authentication tag `auth_tag`
+ * matches the internally generated tag. Upon verification, the
+ * function decrypts the input `ciphertext` to get a `plaintext data.
+ *
+ * The caller should allocate space for the `plaintext` buffer,
+ * (same length as ciphertext), and set the length of expected output
+ * in the `len` field of `plaintext`. If the user-set length and the
+ * output length does not match, an error message will be returned.
+ *
+ * The caller must check the `success` argument before operating on
+ * `plaintext`. If the authentication check fails, then `plaintext` should not
+ * be used and there are no guarantees about its contents.
+ *
+ * @param key Pointer to the blinded gcm-key struct.
+ * @param ciphertext Input data to be decrypted.
+ * @param iv Initialization vector for the decryption function.
+ * @param aad Additional authenticated data.
+ * @param tag_len Length of authentication tag to be generated.
+ * @param auth_tag Authentication tag to be verified.
+ * @param[out] plaintext Decrypted plaintext data, same len as input data.
+ * @param[out] success True if the authentication check passed, otherwise false.
+ * @return Result of the authenticated decryption.
+ * operation
+ */
+otcrypto_status_t otcrypto_aes_gcm_decrypt(
+    otcrypto_blinded_key_t *key, otcrypto_const_byte_buf_t ciphertext,
+    otcrypto_const_word32_buf_t iv, otcrypto_const_byte_buf_t aad,
+    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_const_word32_buf_t auth_tag,
+    otcrypto_byte_buf_t plaintext, hardened_bool_t *success);
+
+/**
+ * Initializes the AES-GCM authenticated encryption operation.
+ *
+ * The order of operations for encryption is:
+ *   - `otcrypto_aes_gcm_encrypt_init()` called once
+ *   - `otcrypto_aes_gcm_update_aad()` called zero or more times
+ *   - `otcrypto_aes_gcm_update_encrypted_data()` called zero or more times
+ *   - `otcrypto_aes_gcm_encrypt_final()` called once
+ *
+ * Associated data must be added first, before encrypted data; the caller may
+ * not call `otcrypto_aes_gcm_udpate_aad()` after the first call to
+ * `otcrypto_aes_gcm_update_encrypted_data()`.
+ *
+ * The resulting AES-GCM context will include pointers into the keyblob of the
+ * blinded key. It is important that the blinded key (or at least the keyblob)
+ * remains live as long as `ctx` is. The IV is safe to free.
+ *
+ * @param key Pointer to the blinded key struct.
+ * @param iv Initialization vector for the encryption function.
+ * @param[out] ctx Context object for the operation.
+ * @return Result of the initialization operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_encrypt_init(
+    otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
+    otcrypto_aes_gcm_context_t *ctx);
+
+/**
+ * Initializes the AES-GCM authenticated decryption operation.
+ *
+ * The order of operations for decryption is:
+ *   - `otcrypto_aes_gcm_decrypt_init()` called once
+ *   - `otcrypto_aes_gcm_update_aad()` called zero or more times
+ *   - `otcrypto_aes_gcm_update_encrypted_data()` called zero or more times
+ *   - `otcrypto_aes_gcm_decrypt_final()` called once
+ *
+ * Associated data must be added first, before encrypted data; the caller may
+ * not call `otcrypto_aes_gcm_udpate_aad()` after the first call to
+ * `otcrypto_aes_gcm_update_encrypted_data()`.
+ *
+ * The resulting AES-GCM context will include pointers into the keyblob of the
+ * blinded key. It is important that the blinded key (or at least the keyblob)
+ * remains live as long as `ctx` is. The IV is safe to free.
+ *
+ * IMPORTANT: Although this routine produces decrypted data incrementally, it
+ * is the caller's responsibility to ensure that they do not trust the
+ * decrypted data until the tag check passes.
+ *
+ * @param key Pointer to the blinded key struct.
+ * @param iv Initialization vector for the decryption function.
+ * @param[out] ctx Context object for the operation.
+ * @return Result of the initialization operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_decrypt_init(
+    otcrypto_blinded_key_t *key, otcrypto_const_word32_buf_t iv,
+    otcrypto_aes_gcm_context_t *ctx);
+/**
+ * Updates additional authenticated data for an AES-GCM operation.
+ *
+ * May be used for either encryption or decryption. Call
+ * `otcrypto_aes_gcm_encrypt_init` or `otcrypto_aes_gcm_decrypt_init` first.
+ *
+ * @param ctx Context object for the operation, updated in place.
+ * @param aad Additional authenticated data.
+ * @return Result of the update operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_update_aad(otcrypto_aes_gcm_context_t *ctx,
+                                              otcrypto_const_byte_buf_t aad);
+
+/**
+ * Updates authenticated-and-encrypted data for an AES-GCM operation.
+ *
+ * May be used for either encryption or decryption. Call
+ * `otcrypto_aes_gcm_encrypt_init` or `otcrypto_aes_gcm_decrypt_init` first.
+ *
+ * The caller should allocate space for the output and set the `len` field
+ * accordingly.
+ *
+ * For encryption, `input` is the plaintext and `output` is the ciphertext; for
+ * decryption, they are reversed. The output must always be long enough to
+ * store all full 128-bit blocks of encrypted data received so far minus all
+ * output produced so far; rounding the input length to the next 128-bit
+ * boundary is always enough, but if the caller knows the exact byte-length of
+ * input so far they can calculate it exactly. Returns an error if `output` is
+ * not long enough; if `output` is overly long, only the first
+ * `output_bytes_written` bytes will be used.
+ *
+ * @param ctx Context object for the operation, updated in place.
+ * @param input Plaintext for encryption, ciphertext for decryption.
+ * @param[out] output Ciphertext for encryption, plaintext for decryption.
+ * @param[out] output_bytes_written Number of bytes written to `output`.
+ * @return Result of the update operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_update_encrypted_data(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_byte_buf_t input,
+    otcrypto_byte_buf_t output, size_t *output_bytes_written);
+
+/**
+ * Finishes the AES-GCM authenticated encryption operation.
+ *
+ * Processes any remaining plaintext from the context and computes the
+ * authentication tag and up to 1 block of ciphertext.
+ *
+ * The caller should allocate space for the ciphertext and tag buffers and set
+ * the `len` fields accordingly. This function returns the
+ * `ciphertext_bytes_written` parameter with the number of bytes written to
+ * `ciphertext`, which is always either 16 or 0. This function returns an error
+ * if the ciphertext or tag buffer is not long enough.
+ *
+ * @param ctx Context object for the operation.
+ * @param tag_len Length of authentication tag to be generated.
+ * @param[out] ciphertext Encrypted output data.
+ * @param[out] ciphertext_bytes_written Number of bytes written to `ciphertext`.
+ * @param[out] auth_tag Generated authentication tag.
+ * @return Result of the final operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_encrypt_final(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_aes_gcm_tag_len_t tag_len,
+    otcrypto_byte_buf_t ciphertext, size_t *ciphertext_bytes_written,
+    otcrypto_word32_buf_t auth_tag);
+
+/**
+ * Finishes the AES-GCM authenticated decryption operation.
+ *
+ * Processes any remaining ciphertext from the context and computes the
+ * authentication tag and up to 1 block of plaintext.
+ *
+ * The caller should allocate space for the plaintext buffer and set the `len`
+ * field accordingly. This function returns the `ciphertext_bytes_written`
+ * parameter with the number of bytes written to `ciphertext`. This function
+ * returns an error if the plaintext buffer is not long enough.
+ *
+ * IMPORTANT: the caller must check both the returned status and the `success`
+ * parameter to know if the tag is valid. The returned status may be OK even if
+ * the tag check did not succeed, if there were no errors during processing.
+ *
+ * @param ctx Context object for the operation.
+ * @param auth_tag Authentication tag to check.
+ * @param tag_len Length of authentication tag.
+ * @param[out] plaintext Decrypted output data.
+ * @param[out] plaintext_bytes_written Number of bytes written to `plaintext`.
+ * @param[out] success Whether the tag passed verification.
+ * @return Result of the final operation.
+ */
+otcrypto_status_t otcrypto_aes_gcm_decrypt_final(
+    otcrypto_aes_gcm_context_t *ctx, otcrypto_const_word32_buf_t auth_tag,
+    otcrypto_aes_gcm_tag_len_t tag_len, otcrypto_byte_buf_t plaintext,
+    size_t *plaintext_bytes_written, hardened_bool_t *success);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_AES_GCM_H_
diff --git a/sw/device/lib/crypto/include/cryptolib_build_info.h b/sw/device/lib/crypto/include/cryptolib_build_info.h
new file mode 100644
index 0000000000000..7988a76a634ef
--- /dev/null
+++ b/sw/device/lib/crypto/include/cryptolib_build_info.h
@@ -0,0 +1,43 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_CRYPTOLIB_BUILD_INFO_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_CRYPTOLIB_BUILD_INFO_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief Cryptolib build information.
+ *
+ * Returns the version of the cryptolib as well as the git hash.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Read the cryptolib build information.
+ *
+ * Returns the current version of the cryptolib as well as the
+ * latest git commit hash of the `sw/device/lib/crypto` directory.
+ *
+ * @param ctx Pointer to the generic HMAC context struct.
+ * @param[out] version The current version of the cryptolib.
+ * @param[out] build_hash_low The low portion of the git commit hash of
+ * `sw/device/lib/crypto`.
+ * @param[out] build_hash_high The high portion of the git commit hash of
+ * `sw/device/lib/crypto`.
+ * @return Result of the HMAC final operation.
+ */
+otcrypto_status_t otcrypto_build_info(uint32_t *version, bool *released,
+                                      uint32_t *build_hash_low,
+                                      uint32_t *build_hash_high);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_CRYPTOLIB_BUILD_INFO_H_
diff --git a/sw/device/lib/crypto/include/datatypes.h b/sw/device/lib/crypto/include/datatypes.h
index 8b4b7cb6b3b2e..61429b59a309a 100644
--- a/sw/device/lib/crypto/include/datatypes.h
+++ b/sw/device/lib/crypto/include/datatypes.h
@@ -243,14 +243,18 @@ typedef enum otcrypto_rsa_key_mode {
  * Values are hardened.
  */
 typedef enum otcrypto_ecc_key_mode {
-  // Mode ECDSA.
-  kOtcryptoEccKeyModeEcdsa = 0x4e5,
-  // Mode ECDH.
-  kOtcryptoEccKeyModeEcdh = 0x6bb,
+  // Mode ECDSA/P-256.
+  kOtcryptoEccKeyModeEcdsaP256 = 0x31e,
+  // Mode ECDSA/P-384.
+  kOtcryptoEccKeyModeEcdsaP384 = 0x695,
+  // Mode ECDH/P-256.
+  kOtcryptoEccKeyModeEcdhP256 = 0x5fc,
+  // Mode ECDH/P-384.
+  kOtcryptoEccKeyModeEcdhP384 = 0x1c7,
   // Mode Ed25519.
-  kOtcryptoEccKeyModeEd25519 = 0xd32,
+  kOtcryptoEccKeyModeEd25519 = 0x663,
   // Mode X25519.
-  kOtcryptoEccKeyModeX25519 = 0x276,
+  kOtcryptoEccKeyModeX25519 = 0x0bb,
 } otcrypto_ecc_key_mode_t;
 
 /**
@@ -318,10 +322,18 @@ typedef enum otcrypto_key_mode {
   // Key is intended for RSA encryption RSAES-OAEP mode.
   kOtcryptoKeyModeRsaEncryptOaep =
       kOtcryptoKeyTypeRsa << 16 | kOtcryptoRsaKeyModeEncryptOaep,
-  // Key is intended for ECDSA mode.
-  kOtcryptoKeyModeEcdsa = kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdsa,
-  // Key is intended for ECDH mode.
-  kOtcryptoKeyModeEcdh = kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdh,
+  // Key is intended for ECDSA with P-256.
+  kOtcryptoKeyModeEcdsaP256 =
+      kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdsaP256,
+  // Key is intended for ECDSA with P-384.
+  kOtcryptoKeyModeEcdsaP384 =
+      kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdsaP384,
+  // Key is intended for ECDH with P-256.
+  kOtcryptoKeyModeEcdhP256 =
+      kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdhP256,
+  // Key is intended for ECDH with P-384.
+  kOtcryptoKeyModeEcdhP384 =
+      kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEcdhP384,
   // Key is intended for Ed25519 mode.
   kOtcryptoKeyModeEd25519 =
       kOtcryptoKeyTypeEcc << 16 | kOtcryptoEccKeyModeEd25519,
@@ -384,7 +396,7 @@ typedef struct otcrypto_key_config {
   // Mode for which the key usage is intended.
   otcrypto_key_mode_t key_mode;
   // Length in bytes of the unblinded form of this key.
-  size_t key_length;
+  uint32_t key_length;
   // Whether the hardware key manager should produce this key.
   // If this is set to `true`, the keyblob must be exactly 8 words long, where
   // the first word is the version and the remaining 7 words are the salt.
@@ -402,7 +414,7 @@ typedef struct otcrypto_unblinded_key {
   // Mode for which the key usage is intended.
   otcrypto_key_mode_t key_mode;
   // Key length in bytes.
-  size_t key_length;
+  uint32_t key_length;
   // Implementation specific, storage provided by caller.
   uint32_t *key;
   // Implementation specific, checksum for this struct.
@@ -416,7 +428,7 @@ typedef struct otcrypto_blinded_key {
   // Key configuration information.
   const otcrypto_key_config_t config;
   // Length of blinded key material in bytes.
-  const size_t keyblob_length;
+  const uint32_t keyblob_length;
   // Implementation specific, storage provided by caller.
   uint32_t *keyblob;
   // Implementation specific, checksum for this struct.
diff --git a/sw/device/lib/crypto/include/ecc.h b/sw/device/lib/crypto/include/ecc.h
deleted file mode 100644
index 8fe1c0a347b84..0000000000000
--- a/sw/device/lib/crypto/include/ecc.h
+++ /dev/null
@@ -1,714 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_H_
-
-#include "datatypes.h"
-
-/**
- * @file
- * @brief Elliptic curve operations for OpenTitan cryptography library.
- *
- * Includes ECDSA, ECDH, Ed25519, and X25519.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Enum to define EdDSA mode for signature.
- *
- * Values are hardened.
- */
-typedef enum otcrypto_eddsa_sign_mode {
-  // Signature mode EdDSA.
-  kOtcryptoEddsaSignModeEddsa = 0xae1,
-  // Signature mode Hashed EdDSA.
-  kOtcryptoEddsaSignModeHashEddsa = 0x9a6,
-} otcrypto_eddsa_sign_mode_t;
-
-/**
- * Struct for domain parameters of a custom Weierstrass curve.
- */
-typedef struct otcrypto_ecc_domain {
-  // Prime P (modulus of coordinate finite field).
-  otcrypto_const_byte_buf_t p;
-  // Coefficient a.
-  otcrypto_const_byte_buf_t a;
-  // Coefficient b.
-  otcrypto_const_byte_buf_t b;
-  // q (order of G).
-  otcrypto_const_byte_buf_t q;
-  // Value of x coordinate of G (basepoint). Same length as p.
-  const uint32_t *gx;
-  // Value of y coordinate of G (basepoint). Same length as p.
-  const uint32_t *gy;
-  // Cofactor of the curve.
-  const uint32_t cofactor;
-  // Checksum value of the parameters.
-  uint32_t checksum;
-} otcrypto_ecc_domain_t;
-
-/**
- * Enum to define the type of elliptic curve used for the operation.
- *
- * Values are hardened.
- */
-typedef enum otcrypto_ecc_curve_type {
-  // Generic Weierstrass curve, with custom domain parameters.
-  kOtcryptoEccCurveTypeCustom = 0xbf7,
-  // Named Weierstrass curve - NIST P256.
-  kOtcryptoEccCurveTypeNistP256 = 0xec8,
-  // Named Weierstrass curve - NIST P384.
-  kOtcryptoEccCurveTypeNistP384 = 0x1bc,
-  // Named Weierstrass curve - Brainpool P256r1.
-  kEccCurveTypeBrainpoolP256R1 = 0xc1e,
-} otcrypto_ecc_curve_type_t;
-
-/**
- * Struct for ECC curve used for ECDSA / ECDH operation.
- *
- * Values are hardened.
- */
-typedef struct otcrypto_ecc_curve {
-  // Type of the Weierstrass curve, custom curve or named curve.
-  otcrypto_ecc_curve_type_t curve_type;
-  // Domain parameters for a custom Weierstrass curve. May be NULL for a named
-  // curve.
-  const otcrypto_ecc_domain_t *const domain_parameter;
-} otcrypto_ecc_curve_t;
-
-/**
- * Performs the key generation for ECDSA operation.
- *
- * Computes private key (d) and public key (Q) keys for ECDSA operation.
- *
- * The caller should allocate and partially populate the blinded key struct,
- * including populating the key configuration and allocating space for the
- * keyblob. The caller should indicate the length of the allocated keyblob;
- * this function will return an error if the keyblob length does not match
- * expectations. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle as returned by `otcrypto_hw_backed_key`. For
- * non-hardware-backed keys, the keyblob should be twice the length of the key.
- * The value in the `checksum` field of the blinded key struct will be
- * populated by the key generation function.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required only for a
- * custom curve. For named curves this field is ignored and can be set to
- * `NULL`.
- *
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param[out] private_key Pointer to the blinded private key (d) struct.
- * @param[out] public_key Pointer to the unblinded public key (Q) struct.
- * @return Result of the ECDSA key generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_keygen(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Performs the ECDSA digital signature generation.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * The message digest must be exactly the right length for the curve in use
- * (e.g. 256 bits for P-256), but may use any hash mode. The caller is
- * responsible for ensuring that the security strength of the hash function is
- * at least equal to the security strength of the curve. See FIPS 186-5 for
- * details.
- *
- * @param private_key Pointer to the blinded private key (d) struct.
- * @param message_digest Message digest to be signed (pre-hashed).
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param[out] signature Pointer to the signature struct with (r,s) values.
- * @return Result of the ECDSA signature generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_sign(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest,
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_word32_buf_t signature);
-
-/**
- * Performs the ECDSA digital signature verification.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * The message digest must be exactly the right length for the curve in use
- * (e.g. 256 bits for P-256), but may use any hash mode. The caller is
- * responsible for ensuring that the security strength of the hash function is
- * at least equal to the security strength of the curve. See FIPS 186-5 for
- * details.
- *
- * @param public_key Pointer to the unblinded public key (Q) struct.
- * @param message_digest Message digest to be verified (pre-hashed).
- * @param signature Pointer to the signature to be verified.
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param[out] verification_result Result of signature verification
- * (Pass/Fail).
- * @return Result of the ECDSA verification operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_verify(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature,
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    hardened_bool_t *verification_result);
-
-/**
- * Performs the key generation for ECDH key agreement.
- *
- * Computes private key (d) and public key (Q) keys for ECDSA operation.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required only for a
- * custom curve. For named curves this field is ignored and can be set to
- * `NULL`.
- *
- * The caller should allocate and partially populate the blinded key struct,
- * including populating the key configuration and allocating space for the
- * keyblob. The caller should indicate the length of the allocated keyblob;
- * this function will return an error if the keyblob length does not match
- * expectations. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle as returned by `otcrypto_hw_backed_key`. For
- * non-hardware-backed keys, the keyblob should be twice the length of the key.
- * The value in the `checksum` field of the blinded key struct will be
- * populated by the key generation function.
- *
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param[out] private_key Pointer to the blinded private key (d) struct.
- * @param[out] public_key Pointer to the unblinded public key (Q) struct.
- * @return Result of the ECDH key generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh_keygen(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Performs Elliptic Curve Diffie Hellman shared secret generation.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * @param private_key Pointer to the blinded private key (d) struct.
- * @param public_key Pointer to the unblinded public key (Q) struct.
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param[out] shared_secret Pointer to generated blinded shared key struct.
- * @return Result of ECDH shared secret generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh(const otcrypto_blinded_key_t *private_key,
-                                const otcrypto_unblinded_key_t *public_key,
-                                const otcrypto_ecc_curve_t *elliptic_curve,
-                                otcrypto_blinded_key_t *shared_secret);
-
-/**
- * Generates a new Ed25519 key pair.
- *
- * Computes the private exponent (d) and public key (Q) based on
- * Curve25519.
- *
- * No `domain_parameter` is needed and is automatically set for Ed25519.
- *
- * The caller should allocate and partially populate the blinded key struct,
- * including populating the key configuration and allocating space for the
- * keyblob. The caller should indicate the length of the allocated keyblob;
- * this function will return an error if the keyblob length does not match
- * expectations. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle as returned by `otcrypto_hw_backed_key`. For
- * non-hardware-backed keys, the keyblob should be twice the length of the key.
- * The value in the `checksum` field of the blinded key struct will be
- * populated by the key generation function.
- *
- * @param[out] private_key Pointer to the blinded private key struct.
- * @param[out] public_key Pointer to the unblinded public key struct.
- * @return Result of the Ed25519 key generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_keygen(otcrypto_blinded_key_t *private_key,
-                                          otcrypto_unblinded_key_t *public_key);
-
-/**
- * Generates an Ed25519 digital signature.
- *
- * @param private_key Pointer to the blinded private key struct.
- * @param input_message Input message to be signed.
- * @param sign_mode Parameter for EdDSA or Hash EdDSA sign mode.
- * @param[out] signature Pointer to the EdDSA signature with (r,s) values.
- * @return Result of the EdDSA signature generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_sign(
-    const otcrypto_blinded_key_t *private_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature);
-
-/**
- * Verifies an Ed25519 signature.
- *
- * @param public_key Pointer to the unblinded public key struct.
- * @param input_message Input message to be signed for verification.
- * @param sign_mode Parameter for EdDSA or Hash EdDSA sign mode.
- * @param signature Pointer to the signature to be verified.
- * @param[out] verification_result Result of signature verification
- * (Pass/Fail).
- * @return Result of the EdDSA verification operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_verify(
-    const otcrypto_unblinded_key_t *public_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_const_word32_buf_t signature,
-    hardened_bool_t *verification_result);
-
-/**
- * Generates a new key pair for X25519 key exchange.
- *
- * Computes the private scalar (d) and public key (Q) based on
- * Curve25519.
- *
- * No `domain_parameter` is needed and is automatically set for X25519.
- *
- * The caller should allocate and partially populate the blinded key struct,
- * including populating the key configuration and allocating space for the
- * keyblob. The caller should indicate the length of the allocated keyblob;
- * this function will return an error if the keyblob length does not match
- * expectations. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle as returned by `otcrypto_hw_backed_key`. For
- * non-hardware-backed keys, the keyblob should be twice the length of the key.
- * The value in the `checksum` field of the blinded key struct will be
- * populated by the key generation function.
- *
- * @param[out] private_key Pointer to the blinded private key struct.
- * @param[out] public_key Pointer to the unblinded public key struct.
- * @return Result of the X25519 key generation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519_keygen(otcrypto_blinded_key_t *private_key,
-                                         otcrypto_unblinded_key_t *public_key);
-
-/**
- * Performs the X25519 Diffie Hellman shared secret generation.
- *
- * @param private_key Pointer to blinded private key (u-coordinate).
- * @param public_key Pointer to the public scalar from the sender.
- * @param[out] shared_secret Pointer to shared secret key (u-coordinate).
- * @return Result of the X25519 operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519(const otcrypto_blinded_key_t *private_key,
-                                  const otcrypto_unblinded_key_t *public_key,
-                                  otcrypto_blinded_key_t *shared_secret);
-
-/**
- * Starts the asynchronous key generation for ECDSA operation.
- *
- * Initializes OTBN and begins generating an ECDSA key pair. The caller should
- * set the `config` field of `private_key` with their desired key configuration
- * options. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle such as the kind returned by
- * `otcrypto_hw_backed_key`.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * Returns `kOtcryptoStatusValueOk` if the operation was successfully
- * started, or`kOtcryptoStatusValueInternalError` if the operation cannot be
- * started.
- *
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param private_key Destination structure for private key, or key handle.
- * @return Result of asynchronous ECDSA keygen start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_keygen_async_start(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    const otcrypto_blinded_key_t *private_key);
-
-/**
- * Finalizes the asynchronous key generation for ECDSA operation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies the private key (d) and public
- * key (Q), if the OTBN status is done, or
- * `kOtcryptoStatusValueAsyncIncomplete` if the OTBN is busy or
- * `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * The caller must ensure that the `elliptic_curve` parameter matches the one
- * that was previously passed to the corresponding `_start` function; a
- * mismatch will cause inconsistencies. Similarly, the private key
- * configuration must match the one originally passed to `_start`.
- *
- * @param elliptic_curve Pointer to the elliptic curve that is being used.
- * @param[out] private_key Pointer to the blinded private key (d) struct.
- * @param[out] public_key Pointer to the unblinded public key (Q) struct.
- * @return Result of asynchronous ECDSA keygen finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_keygen_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Starts the asynchronous ECDSA digital signature generation.
- *
- * Initializes OTBN and starts the OTBN routine to compute the digital
- * signature on the input message. The `domain_parameter` field of the
- * `elliptic_curve` is required only for a custom curve. For named
- * curves this field is ignored and can be set to `NULL`.
- *
- * @param private_key Pointer to the blinded private key (d) struct.
- * @param message_digest Message digest to be signed (pre-hashed).
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @return Result of async ECDSA start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_sign_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_hash_digest_t message_digest,
-    const otcrypto_ecc_curve_t *elliptic_curve);
-
-/**
- * Finalizes the asynchronous ECDSA digital signature generation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies the signature if the OTBN
- * status is done, or `kOtcryptoStatusValueAsyncIncomplete` if the OTBN is
- * busy or `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * The caller must ensure that the `elliptic_curve` parameter matches the one
- * that was previously passed to the corresponding `_start` function; a
- * mismatch will cause inconsistencies.
- *
- * @param elliptic_curve Pointer to the elliptic curve that is being used.
- * @param[out] signature Pointer to the signature struct with (r,s) values.
- * @return Result of async ECDSA finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_sign_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_word32_buf_t signature);
-
-/**
- * Starts the asynchronous ECDSA digital signature verification.
- *
- * Initializes OTBN and starts the OTBN routine to recover ‘r’ value
- * from the input signature ‘s’ value. The `domain_parameter` field of
- * `elliptic_curve` is required only for a custom curve. For named
- * curves this field is ignored and can be set to `NULL`.
- *
- * @param public_key Pointer to the unblinded public key (Q) struct.
- * @param message_digest Message digest to be verified (pre-hashed).
- * @param signature Pointer to the signature to be verified.
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @return Result of async ECDSA verify start function.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_verify_async_start(
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_hash_digest_t message_digest,
-    otcrypto_const_word32_buf_t signature,
-    const otcrypto_ecc_curve_t *elliptic_curve);
-
-/**
- * Finalizes the asynchronous ECDSA digital signature verification.
- *
- * Returns `kOtcryptoStatusValueOk` and populates the `verification result`
- * if the OTBN status is done. `kOtcryptoStatusValueAsyncIncomplete` if the
- * OTBN is busy or `kOtcryptoStatusValueInternalError` if there is an error.
- * The computed signature is compared against the input signature
- * and a PASS or FAIL is returned.
- *
- * The caller must ensure that the `elliptic_curve` and `signature` parameters
- * matches the ones that were previously passed to the corresponding `_start`
- * function; a mismatch will cause inconsistencies.
- *
- * @param elliptic_curve Pointer to the elliptic curve that is being used.
- * @param[out] verification_result Result of signature verification
- * (Pass/Fail).
- * @return Result of async ECDSA verify finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdsa_verify_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_const_word32_buf_t signature,
-    hardened_bool_t *verification_result);
-
-/**
- * Starts the asynchronous key generation for ECDH operation.
- *
- * Initializes OTBN and begins generating an ECDH key pair. The caller should
- * set the `config` field of `private_key` with their desired key configuration
- * options. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle such as the kind returned by
- * `otcrypto_hw_backed_key`.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * Returns `kOtcryptoStatusValueOk` if the operation was successfully
- * started, or`kOtcryptoStatusValueInternalError` if the operation cannot be
- * started.
- *
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @param private_key Destination structure for private key, or key handle.
- * @return Result of asynchronous ECDH keygen start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh_keygen_async_start(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    const otcrypto_blinded_key_t *private_key);
-
-/**
- * Finalizes the asynchronous key generation for ECDSA operation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies the private key (d) and public
- * key (Q), if the OTBN status is done, or
- * `kOtcryptoStatusValueAsyncIncomplete` if the OTBN is busy or
- * `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * The caller must ensure that the `elliptic_curve` parameter matches the one
- * that was previously passed to the corresponding `_start` function; a
- * mismatch will cause inconsistencies. Similarly, the private key
- * configuration must match the one originally passed to `_start`.
- *
- * @param elliptic_curve Pointer to the elliptic curve that is being used.
- * @param[out] private_key Pointer to the blinded private key (d) struct.
- * @param[out] public_key Pointer to the unblinded public key (Q) struct.
- * @return Result of asynchronous ECDH keygen finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh_keygen_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Starts the asynchronous Elliptic Curve Diffie Hellman shared
- * secret generation.
- *
- * The `domain_parameter` field of the `elliptic_curve` is required
- * only for a custom curve. For named curves this field is ignored
- * and can be set to `NULL`.
- *
- * @param private_key Pointer to the blinded private key (d) struct.
- * @param public_key Pointer to the unblinded public key (Q) struct.
- * @param elliptic_curve Pointer to the elliptic curve to be used.
- * @return Result of async ECDH start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key,
-    const otcrypto_ecc_curve_t *elliptic_curve);
-
-/**
- * Finalizes the asynchronous Elliptic Curve Diffie Hellman shared
- * secret generation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies `shared_secret` if the OTBN
- * status is done, or `kOtcryptoStatusValueAsyncIncomplete` if the OTBN
- * is busy or `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * The caller must ensure that the `elliptic_curve` parameter matches the one
- * that was previously passed to the corresponding `_start` function; a
- * mismatch will cause inconsistencies.
- *
- * @param elliptic_curve Pointer to the elliptic curve that is being used.
- * @param[out] shared_secret Pointer to generated blinded shared key struct.
- * @return Result of async ECDH finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ecdh_async_finalize(
-    const otcrypto_ecc_curve_t *elliptic_curve,
-    otcrypto_blinded_key_t *shared_secret);
-
-/**
- * Starts the asynchronous key generation for Ed25519.
- *
- * Initializes OTBN and begins generating an Ed25519 key pair. The caller
- * should set the `config` field of `private_key` with their desired key
- * configuration options. If the key is hardware-backed, the caller should pass
- * a fully populated private key handle such as the kind returned by
- * `otcrypto_hw_backed_key`.
- *
- * No `domain_parameter` is needed and is automatically set for X25519.
- *
- * @param private_key Destination structure for private key, or key handle.
- * @return Result of asynchronous ed25519 keygen start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_keygen_async_start(
-    const otcrypto_blinded_key_t *private_key);
-
-/**
- * Finalizes the asynchronous key generation for Ed25519.
- *
- * Returns `kOtcryptoStatusValueOk` and copies private key (d) and public key
- * (Q), if the OTBN status is done, or `kOtcryptoStatusValueAsyncIncomplete`
- * if the OTBN is busy or `kOtcryptoStatusValueInternalError` if there is an
- * error.
- *
- * The caller must ensure that `config` matches the key configuration initially
- * passed to the `_start` complement of this function.
- *
- * @param[out] private_key Pointer to the blinded private key struct.
- * @param[out] public_key Pointer to the unblinded public key struct.
- * @return Result of asynchronous ed25519 keygen finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_keygen_async_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Starts the asynchronous Ed25519 digital signature generation.
- *
- * Initializes OTBN and starts the OTBN routine to compute the digital
- * signature on the input message. The `domain_parameter` field for
- * Ed25519 is automatically set.
- *
- * @param private_key Pointer to the blinded private key struct.
- * @param input_message Input message to be signed.
- * @param sign_mode Parameter for EdDSA or Hash EdDSA sign mode.
- * @param[out] signature Pointer to the EdDSA signature to get (r) value.
- * @return Result of async Ed25519 start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_sign_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature);
-
-/**
- * Finalizes the asynchronous Ed25519 digital signature generation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies the signature if the OTBN
- * status is done, or `kOtcryptoStatusValueAsyncIncomplete` if the OTBN is
- * busy or `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * @param[out] signature Pointer to the EdDSA signature to get (s) value.
- * @return Result of async Ed25519 finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_sign_async_finalize(
-    otcrypto_word32_buf_t signature);
-
-/**
- * Starts the asynchronous Ed25519 digital signature verification.
- *
- * Initializes OTBN and starts the OTBN routine to verify the
- * signature. The `domain_parameter` for Ed25519 is set automatically.
- *
- * @param public_key Pointer to the unblinded public key struct.
- * @param input_message Input message to be signed for verification.
- * @param sign_mode Parameter for EdDSA or Hash EdDSA sign mode.
- * @param signature Pointer to the signature to be verified.
- * @return Result of async Ed25519 verification start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_verify_async_start(
-    const otcrypto_unblinded_key_t *public_key,
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_eddsa_sign_mode_t sign_mode,
-    otcrypto_const_word32_buf_t signature);
-
-/**
- * Finalizes the asynchronous Ed25519 digital signature verification.
- *
- * Returns `kOtcryptoStatusValueOk` and populates the `verification result`
- * with a PASS or FAIL, if the OTBN status is done,
- * `kOtcryptoStatusValueAsyncIncomplete` if the OTBN is busy or
- * `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * @param[out] verification_result Result of signature verification
- * (Pass/Fail).
- * @return Result of async Ed25519 verification finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_ed25519_verify_async_finalize(
-    hardened_bool_t *verification_result);
-
-/**
- * Starts the asynchronous key generation for X25519.
- *
- * Initializes OTBN and begins generating an X25519 key pair. The caller
- * should set the `config` field of `private_key` with their desired key
- * configuration options. If the key is hardware-backed, the caller should pass
- * a fully populated private key handle such as the kind returned by
- * `otcrypto_hw_backed_key`.
- *
- * No `domain_parameter` is needed and is automatically set for X25519.
- *
- * @param private_key Destination structure for private key, or key handle.
- * @return Result of asynchronous X25519 keygen start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519_keygen_async_start(
-    const otcrypto_blinded_key_t *private_key);
-
-/**
- * Finalizes the asynchronous key generation for X25519.
- *
- * Returns `kOtcryptoStatusValueOk` and copies private key (d) and public key
- * (Q), if the OTBN status is done, or `kOtcryptoStatusValueAsyncIncomplete`
- * if the OTBN is busy or `kOtcryptoStatusValueInternalError` if there is an
- * error.
- *
- * The caller must ensure that `config` matches the key configuration initially
- * passed to the `_start` complement of this function.
- *
- * @param[out] private_key Pointer to the blinded private key struct.
- * @param[out] public_key Pointer to the unblinded public key struct.
- * @return Result of asynchronous X25519 keygen finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519_keygen_async_finalize(
-    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
-
-/**
- * Starts the asynchronous X25519 Diffie Hellman shared secret
- * generation.
- *
- * Initializes OTBN and starts the OTBN routine to perform Diffie
- * Hellman shared secret generation based on Curve25519. The
- * domain parameter is automatically set for X25519 API.
- *
- * @param private_key Pointer to the blinded private key (u-coordinate).
- * @param public_key Pointer to the public scalar from the sender.
- * @return Result of the async X25519 start operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519_async_start(
-    const otcrypto_blinded_key_t *private_key,
-    const otcrypto_unblinded_key_t *public_key);
-
-/**
- * Finalizes the asynchronous X25519 Diffie Hellman shared secret
- * generation.
- *
- * Returns `kOtcryptoStatusValueOk` and copies `shared_secret` if the OTBN
- * status is done, or `kOtcryptoStatusValueAsyncIncomplete` if the OTBN
- * is busy or `kOtcryptoStatusValueInternalError` if there is an error.
- *
- * @param[out] shared_secret Pointer to shared secret key (u-coordinate).
- * @return Result of async X25519 finalize operation.
- */
-OT_WARN_UNUSED_RESULT
-otcrypto_status_t otcrypto_x25519_async_finalize(
-    otcrypto_blinded_key_t *shared_secret);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_H_
diff --git a/sw/device/lib/crypto/include/ecc_p256.h b/sw/device/lib/crypto/include/ecc_p256.h
new file mode 100644
index 0000000000000..a3b69b0460b7c
--- /dev/null
+++ b/sw/device/lib/crypto/include/ecc_p256.h
@@ -0,0 +1,296 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P256_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P256_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief P-256 elliptic curve operations for OpenTitan cryptography library.
+ *
+ * Includes ECDSA and ECDH.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Generates a key pair for ECDSA with curve P-256.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate ECDSA with
+ * P-256 and the keyblob should be 80 bytes. The value in the `checksum` field
+ * of the blinded key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of the ECDSA key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Generates an ECDSA signature with curve P-256.
+ *
+ * The message digest must be exactly 256 bits (32 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of the ECDSA signature generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_sign(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Generates an ECDSA signature with curve P-256 and verifies the signature
+ * before releasing it to mitigate fault injection attacks.
+ *
+ * The message digest must be exactly 256 bits (32 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of the ECDSA signature generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_sign_verify(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Verifies an ECDSA/P-256 signature.
+ *
+ * The message digest must be exactly 256 bits (32 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be verified (pre-hashed).
+ * @param signature Pointer to the signature to be verified.
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of the ECDSA verification operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result);
+
+/**
+ * Generates a key pair for ECDH with curve P-256.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate ECDH with
+ * P-256 and the keyblob should be 80 bytes. The value in the `checksum` field
+ * of the blinded key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of the ECDH key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Elliptic Curve Diffie Hellman shared secret generation with curve P-256.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param[out] shared_secret Pointer to generated blinded shared key struct.
+ * @return Result of ECDH shared secret generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256(const otcrypto_blinded_key_t *private_key,
+                                     const otcrypto_unblinded_key_t *public_key,
+                                     otcrypto_blinded_key_t *shared_secret);
+
+/**
+ * Starts asynchronous key generation for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous ECDSA keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes asynchronous key generation for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of asynchronous ECDSA keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous signature generation for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_sign` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @return Result of async ECDSA start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest);
+
+/**
+ * Finalizes asynchronous signature generation for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_sign` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of async ECDSA finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_sign_async_finalize(
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Starts asynchronous signature verification for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_verify` for requirements on input values.
+ *
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be verified (pre-hashed).
+ * @param signature Pointer to the signature to be verified.
+ * @return Result of async ECDSA verify start function.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature);
+
+/**
+ * Finalizes asynchronous signature verification for ECDSA/P-256.
+ *
+ * See `otcrypto_ecdsa_p256_verify` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of async ECDSA verify finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p256_verify_async_finalize(
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result);
+
+/**
+ * Starts asynchronous key generation for ECDH/P-256.
+ *
+ * See `otcrypto_ecdh_p256_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous ECDH keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes asynchronous key generation for ECDH/P-256.
+ *
+ * See `otcrypto_ecdh_p256_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of asynchronous ECDH keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous shared secret generation for ECDH/P-256.
+ *
+ * See `otcrypto_ecdh_p256` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of async ECDH start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Finalizes asynchronous shared secret generation for ECDH/P-256.
+ *
+ * See `otcrypto_ecdh_p256` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] shared_secret Pointer to generated blinded shared key struct.
+ * @return Result of async ECDH finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p256_async_finalize(
+    otcrypto_blinded_key_t *shared_secret);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P256_H_
diff --git a/sw/device/lib/crypto/include/ecc_p384.h b/sw/device/lib/crypto/include/ecc_p384.h
new file mode 100644
index 0000000000000..96b84fa517a48
--- /dev/null
+++ b/sw/device/lib/crypto/include/ecc_p384.h
@@ -0,0 +1,296 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P384_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P384_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief P-384 elliptic curve operations for OpenTitan cryptography library.
+ *
+ * Includes ECDSA and ECDH.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Generates a key pair for ECDSA with curve P-384.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate ECDSA with
+ * P-384 and the keyblob should be 112 bytes. The value in the `checksum` field
+ * of the blinded key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of the ECDSA key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Generates an ECDSA signature with curve P-384.
+
+ * The message digest must be exactly 384 bits (48 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of the ECDSA signature generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_sign(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Generates an ECDSA signature with curve P-384 and verifies the signature
+ * before releasing it to mitigate fault injection attacks.
+
+ * The message digest must be exactly 384 bits (48 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of the ECDSA signature generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_sign_verify(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Verifies an ECDSA/P-384 signature.
+ *
+ * The message digest must be exactly 384 bits (48 bytes) long, but may use any
+ * hash mode. The caller is responsible for ensuring that the security
+ * strength of the hash function is at least equal to the security strength of
+ * the curve, but in some cases it may be truncated. See FIPS 186-5 for
+ * details.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be verified (pre-hashed).
+ * @param signature Pointer to the signature to be verified.
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of the ECDSA verification operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result);
+
+/**
+ * Generates a key pair for ECDH with curve P-384.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate ECDH with
+ * P-384 and the keyblob should be 112 bytes. The value in the `checksum` field
+ * of the blinded key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of the ECDH key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384_keygen(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Elliptic Curve Diffie Hellman shared secret generation with curve P-384.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param[out] shared_secret Pointer to generated blinded shared key struct.
+ * @return Result of ECDH shared secret generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384(const otcrypto_blinded_key_t *private_key,
+                                     const otcrypto_unblinded_key_t *public_key,
+                                     otcrypto_blinded_key_t *shared_secret);
+
+/**
+ * Starts asynchronous key generation for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous ECDSA keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes asynchronous key generation for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of asynchronous ECDSA keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous signature generation for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_sign` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param message_digest Message digest to be signed (pre-hashed).
+ * @return Result of async ECDSA start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_hash_digest_t message_digest);
+
+/**
+ * Finalizes asynchronous signature generation for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_sign` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] signature Pointer to the signature struct with (r,s) values.
+ * @return Result of async ECDSA finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_sign_async_finalize(
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Starts asynchronous signature verification for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_verify` for requirements on input values.
+ *
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @param message_digest Message digest to be verified (pre-hashed).
+ * @param signature Pointer to the signature to be verified.
+ * @return Result of async ECDSA verify start function.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    const otcrypto_hash_digest_t message_digest,
+    otcrypto_const_word32_buf_t signature);
+
+/**
+ * Finalizes asynchronous signature verification for ECDSA/P-384.
+ *
+ * See `otcrypto_ecdsa_p384_verify` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of async ECDSA verify finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdsa_p384_verify_async_finalize(
+    otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result);
+
+/**
+ * Starts asynchronous key generation for ECDH/P-384.
+ *
+ * See `otcrypto_ecdh_p384_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous ECDH keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes asynchronous key generation for ECDH/P-384.
+ *
+ * See `otcrypto_ecdh_p384_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key (d) struct.
+ * @param[out] public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of asynchronous ECDH keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous shared secret generation for ECDH/P-384.
+ *
+ * See `otcrypto_ecdh_p384` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key (d) struct.
+ * @param public_key Pointer to the unblinded public key (Q) struct.
+ * @return Result of async ECDH start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Finalizes asynchronous shared secret generation for ECDH/P-384.
+ *
+ * See `otcrypto_ecdh_p384` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] shared_secret Pointer to generated blinded shared key struct.
+ * @return Result of async ECDH finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ecdh_p384_async_finalize(
+    otcrypto_blinded_key_t *shared_secret);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ECC_P384_H_
diff --git a/sw/device/lib/crypto/include/ed25519.h b/sw/device/lib/crypto/include/ed25519.h
new file mode 100644
index 0000000000000..01fd64a7b7078
--- /dev/null
+++ b/sw/device/lib/crypto/include/ed25519.h
@@ -0,0 +1,188 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ED25519_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ED25519_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief Ed25519 operations for OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Hashing mode for EdDSA signatures.
+ *
+ * Values are hardened.
+ */
+typedef enum otcrypto_eddsa_sign_mode {
+  // Signature mode EdDSA.
+  kOtcryptoEddsaSignModeEddsa = 0xae1,
+  // Signature mode Hashed EdDSA.
+  kOtcryptoEddsaSignModeHashEddsa = 0x9a6,
+} otcrypto_eddsa_sign_mode_t;
+
+/**
+ * Generates a key pair for Ed25519.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate Ed25519 and the
+ * keyblob should be 80 bytes. The value in the `checksum` field of the blinded
+ * key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key struct.
+ * @param[out] public_key Pointer to the unblinded public key struct.
+ * @return Result of the Ed25519 key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_keygen(otcrypto_blinded_key_t *private_key,
+                                          otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Generates an Ed25519 digital signature.
+ *
+ * @param private_key Pointer to the blinded private key struct.
+ * @param input_message Input message to be signed.
+ * @param sign_mode EdDSA signature hashing mode.
+ * @param[out] signature Pointer to the EdDSA signature with (r,s) values.
+ * @return Result of the Ed25519 signature generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_sign(
+    const otcrypto_blinded_key_t *private_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature);
+
+/**
+ * Verifies an Ed25519 signature.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param public_key Pointer to the unblinded public key struct.
+ * @param input_message Input message to be signed for verification.
+ * @param sign_mode EdDSA signature hashing mode.
+ * @param signature Pointer to the signature to be verified.
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of the Ed25519 verification operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_verify(
+    const otcrypto_unblinded_key_t *public_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_const_word32_buf_t signature,
+    hardened_bool_t *verification_result);
+
+/**
+ * Starts asynchronous key generation for Ed25519.
+ *
+ * See `otcrypto_ed25519_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous Ed25519 keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes asynchronous key generation for Ed25519.
+ *
+ * See `otcrypto_ed25519_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key struct.
+ * @param[out] public_key Pointer to the unblinded public key struct.
+ * @return Result of asynchronous ed25519 keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous signature generation for Ed25519.
+ *
+ * See `otcrypto_ed25519_sign` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key struct.
+ * @param input_message Input message to be signed.
+ * @param sign_mode EdDSA signature hashing mode.
+ * @param[out] signature Pointer to the EdDSA signature to get (r) value.
+ * @return Result of async Ed25519 start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_sign_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode, otcrypto_word32_buf_t signature);
+
+/**
+ * Finalizes asynchronous signature generation for Ed25519.
+ *
+ * See `otcrypto_ecdsa_p256_sign` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] signature Pointer to the EdDSA signature to get (s) value.
+ * @return Result of async Ed25519 finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_sign_async_finalize(
+    otcrypto_word32_buf_t signature);
+
+/**
+ * Starts asynchronous signature verification for Ed25519.
+ *
+ * See `otcrypto_ecdsa_p256_verify` for requirements on input values.
+ *
+ * @param public_key Pointer to the unblinded public key struct.
+ * @param input_message Input message to be signed for verification.
+ * @param sign_mode EdDSA signature hashing mode.
+ * @param signature Pointer to the signature to be verified.
+ * @return Result of async Ed25519 verification start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_verify_async_start(
+    const otcrypto_unblinded_key_t *public_key,
+    otcrypto_const_byte_buf_t input_message,
+    otcrypto_eddsa_sign_mode_t sign_mode,
+    otcrypto_const_word32_buf_t signature);
+
+/**
+ * Finalizes asynchronous signature verification for Ed25519.
+ *
+ * See `otcrypto_ecdsa_p256_verify` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller must check the `verification_result` parameter, NOT only the
+ * returned status code, to know if the signature passed verification. The
+ * status code, as for other operations, only indicates whether errors were
+ * encountered, and may return OK even when the signature is invalid.
+ *
+ * @param[out] verification_result Whether the signature passed verification.
+ * @return Result of async Ed25519 verification finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_ed25519_verify_async_finalize(
+    hardened_bool_t *verification_result);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_ED25519_H_
diff --git a/sw/device/lib/crypto/include/hash.h b/sw/device/lib/crypto/include/hash.h
deleted file mode 100644
index 4afbbdaec1393..0000000000000
--- a/sw/device/lib/crypto/include/hash.h
+++ /dev/null
@@ -1,171 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HASH_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HASH_H_
-
-#include "datatypes.h"
-
-/**
- * @file
- * @brief Hash functions for the OpenTitan cryptography library.
- *
- * Supports both SHA2 and SHA3 hash functions, plus the additional Keccak-based
- * hash functions SHAKE and cSHAKE.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-enum {
-
-  /* Digest size for SHA-256/HMAC-256 in bits, bytes and word respectively. */
-  kSha256DigestBits = 256,
-  kSha256DigestBytes = kSha256DigestBits / 8,
-  kSha256DigestWords = kSha256DigestBytes / sizeof(uint32_t),
-  /* Digest size for SHA-384/HMAC-384 in bits, bytes and word respectively. */
-  kSha384DigestBits = 384,
-  kSha384DigestBytes = kSha384DigestBits / 8,
-  kSha384DigestWords = kSha384DigestBytes / sizeof(uint32_t),
-  /* Digest size for SHA-512/HMAC-512 in bits, bytes and word respectively. */
-  kSha512DigestBits = 512,
-  kSha512DigestBytes = kSha512DigestBits / 8,
-  kSha512DigestWords = kSha512DigestBytes / sizeof(uint32_t),
-  /**
-   * The size of the publicly exposed HMAC context in words.
-   * We assert that this value is large enough to host the internal HMAC driver
-   * struct.
-   */
-  kOtcryptoHashCtxStructWords = 92,
-};
-
-/**
- * Generic opaque hash context.
- *
- * Representation is internal to the hash implementation; initialize
- * with #otcrypto_hash_init.
- */
-typedef struct otcrypto_hash_context {
-  uint32_t data[kOtcryptoHashCtxStructWords];
-} otcrypto_hash_context_t;
-
-/**
- * Performs the required hash function on the input data.
- *
- * The caller should allocate space for the `digest` buffer and set the `mode`
- * and `len` fields. If the length does not match the mode, an error message
- * will be returned.
- *
- * This function should only be used for fixed-length hash functions (SHA-2 and
- * SHA-3 families). Use `otcrypto_xof_shake` and `otcrypto_xof_cshake` for
- * extendable-output functions.
- *
- * @param input_message Input message to be hashed.
- * @param[out] digest Output digest after hashing the input message.
- * @return Result of the hash operation.
- */
-otcrypto_status_t otcrypto_hash(otcrypto_const_byte_buf_t input_message,
-                                otcrypto_hash_digest_t digest);
-
-/**
- * Performs the SHAKE extendable output function (XOF) on input data.
- *
- * The caller should allocate space for the `digest` buffer and set the `mode`
- * and `len` fields.  The `mode` parameter must be
- * `kOtcryptoHashXofModeShake128` or `kOtcryptoHashXofModeShake256`; other
- * values will result in errors.
- *
- * @param input_message Input message for extendable output function.
- * @param[out] digest Output from the extendable output function.
- * @return Result of the xof operation.
- */
-otcrypto_status_t otcrypto_xof_shake(otcrypto_const_byte_buf_t input_message,
-                                     otcrypto_hash_digest_t digest);
-
-/**
- * Performs the CSHAKE extendable output function (XOF) on input data.
- *
- * The `function_name_string` is used by NIST to define functions based on
- * cSHAKE. When no function other than cSHAKE is desired; it can be empty. The
- * `customization_string` is used to define a variant of the cSHAKE function.
- * If no customization is desired it can be empty.
- *
- * The caller should allocate space for the `digest` buffer and set the `mode`
- * and `len` fields. The `mode` parameter must be
- * `kOtcryptoHashXofModeCshake128` or `kOtcryptoHashXofModeCshake256`; other
- * values will result in errors.
- *
- * @param input_message Input message for extendable output function.
- * @param function_name_string NIST Function name string.
- * @param customization_string Customization string for cSHAKE.
- * @param[out] digest Output from the extendable output function.
- * @return Result of the xof operation.
- */
-otcrypto_status_t otcrypto_xof_cshake(
-    otcrypto_const_byte_buf_t input_message,
-    otcrypto_const_byte_buf_t function_name_string,
-    otcrypto_const_byte_buf_t customization_string,
-    otcrypto_hash_digest_t digest);
-
-/**
- * Performs the INIT operation for a cryptographic hash function.
- *
- * Initializes the generic hash context. The required hash mode is selected
- * through the `hash_mode` parameter. Only `kOtcryptoHashModeSha256`,
- * `kOtcryptoHashModeSha384` and `kOtcryptoHashModeSha512` are supported. Other
- * modes are not supported and an error would be returned.
- *
- * Populates the hash context with the selected hash mode and its digest and
- * block sizes. The structure of hash context and how it populates the required
- * fields are internal to the specific hash implementation.
- *
- * @param ctx Pointer to the generic hash context struct.
- * @param hash_mode Required hash mode.
- * @return Result of the hash init operation.
- */
-otcrypto_status_t otcrypto_hash_init(otcrypto_hash_context_t *const ctx,
-                                     otcrypto_hash_mode_t hash_mode);
-
-/**
- * Performs the UPDATE operation for a cryptographic hash function.
- *
- * The update operation processes the `input_message` using the selected hash
- * compression function. The intermediate digest is stored in the context
- * `ctx`. Any partial data is stored back in the context and combined with the
- * subsequent bytes.
- *
- * #otcrypto_hash_init should be called before this function.
- *
- * @param ctx Pointer to the generic hash context struct.
- * @param input_message Input message to be hashed.
- * @return Result of the hash update operation.
- */
-otcrypto_status_t otcrypto_hash_update(otcrypto_hash_context_t *const ctx,
-                                       otcrypto_const_byte_buf_t input_message);
-
-/**
- * Performs the FINAL operation for a cryptographic hash function.
- *
- * The final operation processes the remaining partial blocks, computes the
- * final hash and copies it to the `digest` parameter.
- *
- * #otcrypto_hash_update should be called before this function.
- *
- * The caller should allocate space for the `digest` buffer and set the `mode`
- * and `len` fields. If the `mode` doesn't match the mode of the hash context,
- * the function will return an error.
- *
- * @param ctx Pointer to the generic hash context struct.
- * @param[out] digest Output digest after hashing the input blocks.
- * @return Result of the hash final operation.
- */
-otcrypto_status_t otcrypto_hash_final(otcrypto_hash_context_t *const ctx,
-                                      otcrypto_hash_digest_t digest);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HASH_H_
diff --git a/sw/device/lib/crypto/include/hkdf.h b/sw/device/lib/crypto/include/hkdf.h
new file mode 100644
index 0000000000000..cdb1990b9b9c2
--- /dev/null
+++ b/sw/device/lib/crypto/include/hkdf.h
@@ -0,0 +1,95 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HKDF_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HKDF_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief HKDF operations for the OpenTitan cryptography library.
+ *
+ * Implements the HMAC-based extract-and-expand key derivation function
+ * specified in IETF RFC 5869.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Performs HKDF (IETF RFC 5869) in one shot, both expand and extract stages.
+ *
+ * The hash mode for the underlying HMAC is determined by the mode of the input
+ * key material, e.g. the key mode `kOtcryptoKeyModeHmacSha256` results in HMAC
+ * with SHA-256.
+ *
+ * The caller should allocate and partially populate the `okm` blinded key
+ * struct, including populating the key configuration and allocating space for
+ * the keyblob. The configuration may not indicate a hardware-backed key and
+ * must indicate a symmetric mode. The allocated keyblob length for the output
+ * key should be twice the unmasked key length indicated in its key
+ * configuration, rounded up to the nearest 32-bit word. This unmasked key
+ * length must not be longer than 255*<length of digest for the chosen hash
+ * mode>, as per the RFC. The value in the `checksum` field of the blinded key
+ * struct will be populated by the key derivation function.
+ *
+ * @param ikm Blinded input key material.
+ * @param salt Salt value (optional, may be empty).
+ * @param info Context-specific string (optional, may be empty).
+ * @param[out] okm Blinded output keying material.
+ * @return Result of the key derivation operation.
+ */
+otcrypto_status_t otcrypto_hkdf(const otcrypto_blinded_key_t *ikm,
+                                otcrypto_const_byte_buf_t salt,
+                                otcrypto_const_byte_buf_t info,
+                                otcrypto_blinded_key_t *okm);
+
+/**
+ * Performs the "extract" step of HKDF (IETF RFC 5869).
+ *
+ * The hash mode for the underlying HMAC is determined by the mode of the input
+ * key material, e.g. the key mode `kOtcryptoKeyModeHmacSha256` results in HMAC
+ * with SHA-256.
+ *
+ * The caller should allocate and partially populate the `prk` blinded key
+ * struct, including populating the key configuration and allocating space for
+ * the keyblob. The configuration may not indicate a hardware-backed key, and
+ * the mode should be the same HMAC mode as the input keying material. The
+ * allocated keyblob length should be twice the hash function digest length for
+ * the chosen hash mode (e.g. 512 bits for SHA-256).
+ *
+ * @param ikm Blinded input key material.
+ * @param salt Salt value (optional, may be empty).
+ * @param[out] prk Extracted pseudo-random key.
+ * @return Result of the key derivation operation.
+ */
+otcrypto_status_t otcrypto_hkdf_extract(const otcrypto_blinded_key_t *ikm,
+                                        otcrypto_const_byte_buf_t salt,
+                                        otcrypto_blinded_key_t *prk);
+
+/**
+ * Performs the "expand" step of HKDF (IETF RFC 5869).
+ *
+ * The hash mode for the underlying HMAC is determined by the mode of the
+ * pseudo-random key, e.g. the key mode `kOtcryptoKeyModeHmacSha256` results in
+ * HMAC with SHA-256.
+ *
+ * See `otcrypto_hkdf` for the requirements on `okm`.
+ *
+ * @param prk Pseudo-random key from HKDF-extract.
+ * @param info Context-specific string (optional).
+ * @param[out] okm Blinded output key material.
+ * @return Result of the key derivation operation.
+ */
+otcrypto_status_t otcrypto_hkdf_expand(const otcrypto_blinded_key_t *prk,
+                                       otcrypto_const_byte_buf_t info,
+                                       otcrypto_blinded_key_t *okm);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HKDF_H_
diff --git a/sw/device/lib/crypto/include/hmac.h b/sw/device/lib/crypto/include/hmac.h
new file mode 100644
index 0000000000000..d3251f84a59ba
--- /dev/null
+++ b/sw/device/lib/crypto/include/hmac.h
@@ -0,0 +1,121 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HMAC_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HMAC_H_
+
+#include "datatypes.h"
+#include "sha2.h"
+
+/**
+ * @file
+ * @brief Message authentication codes for the OpenTitan cryptography library.
+ *
+ * Supports message authentication based on either HMAC or KMAC.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Generic hmac context.
+ *
+ * Representation is internal to the hmac implementation; initialize
+ * with #otcrypto_hmac_init.
+ */
+typedef struct otcrypto_hmac_context {
+  uint32_t data[kOtcryptoSha2CtxStructWords];
+} otcrypto_hmac_context_t;
+
+/**
+ * Performs the HMAC function on the input data.
+ *
+ * This function computes the HMAC function on the `input_message` using the
+ * `key` and returns a `tag`. The key should be at least as long as the digest
+ * for the chosen hash function. The hash function is determined by the key
+ * mode. Only SHA-2 hash functions are supported. Other modes (e.g. SHA-3) are
+ * not supported and will result in errors.
+ *
+ * The caller should allocate the following amount of space for the `tag`
+ * buffer, depending on which hash algorithm is used:
+ *
+ * SHA-256: 32 bytes
+ * SHA-384: 48 bytes
+ * SHA-512: 64 bytes
+ *
+ * The caller should also set the `len` field of `tag` to the equivalent number
+ * of 32-bit words (e.g. 8 for SHA-256).
+ *
+ * @param key Pointer to the blinded key struct with key shares.
+ * @param input_message Input message to be hashed.
+ * @param[out] tag Output authentication tag.
+ * @return The result of the HMAC operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_hmac(const otcrypto_blinded_key_t *key,
+                                otcrypto_const_byte_buf_t input_message,
+                                otcrypto_word32_buf_t tag);
+
+/**
+ * Performs the INIT operation for HMAC.
+ *
+ * Initializes the HMAC context. The key should be at least as long as the
+ * digest for the chosen hash function. The hash function is determined by the
+ * key mode. Only SHA-2 hash functions are are supported. Other modes (e.g.
+ * SHA-3) are not supported and will result in errors.
+ *
+ * @param[out] ctx Pointer to the generic HMAC context struct.
+ * @param key Pointer to the blinded HMAC key struct.
+ * @param hash_mode Hash function to use.
+ * @return Result of the HMAC init operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_hmac_init(otcrypto_hmac_context_t *ctx,
+                                     const otcrypto_blinded_key_t *key);
+
+/**
+ * Performs the UPDATE operation for HMAC.
+ *
+ * The update operation processes the `input_message` using the selected
+ * compression function. The intermediate state is stored in the HMAC context
+ * `ctx`. Any partial data is stored back in the context and combined with the
+ * subsequent bytes.
+ *
+ * #otcrypto_hmac_init should be called before calling this function.
+ *
+ * @param ctx Pointer to the generic HMAC context struct.
+ * @param input_message Input message to be hashed.
+ * @return Result of the HMAC update operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_hmac_update(otcrypto_hmac_context_t *const ctx,
+                                       otcrypto_const_byte_buf_t input_message);
+
+/**
+ * Performs the FINAL operation for HMAC.
+ *
+ * The final operation processes the remaining partial blocks, computes the
+ * final authentication code and copies it to the `tag` parameter.
+ *
+ * #otcrypto_hmac_update should be called before calling this function.
+ *
+ * The caller should allocate space for the `tag` buffer, (the length should
+ * match the hash function digest size), and set the length of expected output
+ * in the `len` field of `tag`. If the user-set length and the output length
+ * does not match, an error message will be returned.
+ *
+ * @param ctx Pointer to the generic HMAC context struct.
+ * @param[out] tag Output authentication tag.
+ * @return Result of the HMAC final operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_hmac_final(otcrypto_hmac_context_t *const ctx,
+                                      otcrypto_word32_buf_t tag);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_HMAC_H_
diff --git a/sw/device/lib/crypto/include/kdf.h b/sw/device/lib/crypto/include/kdf.h
deleted file mode 100644
index 840715ca800f6..0000000000000
--- a/sw/device/lib/crypto/include/kdf.h
+++ /dev/null
@@ -1,190 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_H_
-
-#include "datatypes.h"
-#include "mac.h"
-
-/**
- * @file
- * @brief Key derivation functions for the OpenTitan cryptography library.
- *
- * Includes HMAC- and KMAC-based KDFs.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Performs the key derivation function in counter mode wtih HMAC according to
- * NIST SP 800-108r1.
- *
- * The supported PRF engine for the KDF function is HMAC (since KMAC does not
- * use the counter mode).
- *
- * The caller should allocate and partially populate the `keying_material`
- * blinded key struct, including populating the key configuration and
- * allocating space for the keyblob. The caller should indicate the length of
- * the allocated keyblob; this function will return an error if the keyblob
- * length does not match expectations. For hardware-backed keys, the keyblob
- * expectations. If the key is hardware-backed, the caller should pass a fully
- * populated private key handle such as the kind returned by
- * `otcrypto_hw_backed_key`. For non-hardware-backed keys, the keyblob should
- * be twice the length of the key. The value in the `checksum` field of the
- * blinded key struct will be populated by this function.
- *
- * @param key_derivation_key Blinded key derivation key.
- * @param kdf_label Label string according to SP 800-108r1.
- * @param kdf_context Context string according to SP 800-108r1.
- * @param required_byte_len Required length of the derived key in bytes.
- * @param[out] keying_material Pointer to the blinded keying material to be
- * populated by this function.
- * @return Result of the key derivation operation.
- */
-otcrypto_status_t otcrypto_kdf_hmac_ctr(
-    const otcrypto_blinded_key_t key_derivation_key,
-    const otcrypto_const_byte_buf_t kdf_label,
-    const otcrypto_const_byte_buf_t kdf_context, size_t required_byte_len,
-    otcrypto_blinded_key_t *keying_material);
-
-/**
- * Performs the key derivation function with single KMAC invocation according to
- * NIST SP 800-108r1.
- *
- * This function initially validates the `key_derivation_key` struct, by
- * checking for NULL pointers, checking whether key length and its
- * keyblob_length match each other, verifying its checksum etc. Moreover, its
- * `hw_backed` field is used to determine whether the derivation key comes from
- * Keymgr. In that case, this function requests Keymgr to generate the key
- * according to diversification values passed in keyblob.
- * (see `keyblob_buffer_to_keymgr_diversification` function in `keyblob.h`).
- * For non-hardware-backed keys, the keyblob should be twice the length of the
- * key.
- *
- * `kmac_mode` input argument is used to decide whether KMAC128 or KMAC256 is
- * used and it is also checked against `key_mode` from `key_derivation_key`.
- *
- * The produced key is returned in the `keying_material` blinded key struct.
- * The caller should allocate and partially populate `keying_material`,
- * including populating the key configuration and allocating space for the
- * keyblob. The key length is also checked against `required_byte_len`. The
- * value in the `checksum` field of the blinded key struct will be populated
- * by this function. The use case where `keying_material` needs to be hw-backed
- * is not supported by this function, hence `hw_backed` must be set tofalse.
- * See `otcrypto_hw_backed_key` from `key_transport` for that specific use case.
- *
- * Note that it is the responsibility of the user of `keying_material` to
- * further validate the key configuration. While populating the key, this
- * function ignores `exportable`, `key_mode`, and `security_level` fields
- * therefore the users must validate their `keying_material` config before use.
- *
- * @param key_derivation_key Blinded key derivation key.
- * @param kmac_mode Either KMAC128 or KMAC256 as PRF.
- * @param kdf_label Label string according to SP 800-108r1.
- * @param kdf_context Context string according to SP 800-108r1.
- * @param required_byte_len Required length of the derived key in bytes.
- * @param[out] keying_material Pointer to the blinded keying material to be
- * populated by this function.
- * @return Result of the key derivation operation.
- */
-otcrypto_status_t otcrypto_kdf_kmac(
-    const otcrypto_blinded_key_t key_derivation_key,
-    otcrypto_kmac_mode_t kmac_mode, const otcrypto_const_byte_buf_t kdf_label,
-    const otcrypto_const_byte_buf_t kdf_context, size_t required_byte_len,
-    otcrypto_blinded_key_t *keying_material);
-
-/**
- * Performs HKDF in one shot, both expand and extract stages.
- *
- * HKDF is defined in IETF RFC 5869 and is based on HMAC. The HMAC hash
- * function is determined by the mode of the key derivation key, e.g. the key
- * mode `kOtcryptoKeyModeHmacSha256` results in HMAC with SHA-256. The key mode
- * for the output pseudo-random key (PRK) should match the key mode for the
- * input key derivation key.
- *
- * The caller should allocate and partially populate the `prk` blinded key
- * struct, including populating the key configuration and allocating space for
- * the keyblob. The PRK configuration may not indicate a hardware-backed key.
- * The allocated keyblob length should be twice the length of the hash function
- * digest length.
- * The caller should allocate and partially populate the `derived_key` blinded
- * key struct, including populating the key configuration and allocating space
- * for the keyblob. The key configuration may not indicate a hardware-backed
- * key. The allocated keyblob length should be twice the key length indicated
- * in the key configuration, and this key length must not be longer than
- * 255*<length of hash digest> as per the RFC.
- *
- * @param key_derivation_key Blinded key derivation key.
- * @param salt Salt value (optional, may be empty).
- * @param info Context-specific string (optional, may be empty).
- * @param[out] derived_key Derived keying material.
- * @return Result of the key derivation operation.
- */
-otcrypto_status_t otcrypto_kdf_hkdf(
-    const otcrypto_blinded_key_t key_derivation_key,
-    otcrypto_const_byte_buf_t salt, otcrypto_const_byte_buf_t info,
-    otcrypto_blinded_key_t *derived_key);
-
-/**
- * Performs the "extract" step of HKDF.
- *
- * HKDF is defined in IETF RFC 5869 and is based on HMAC. The HMAC hash
- * function is determined by the mode of the key derivation key,  e.g. the key
- * mode `kOtcryptoKeyModeHmacSha256` results in HMAC with SHA-256. The key mode
- * for the output pseudo-random key (PRK) should match the key mode for the
- * input key derivation key.
- *
- * The resulting pseudo-random key is then input for the "expand" step of HKDF.
- * The length of PRK is the same as the digest length for the specified hash
- * function (e.g. 256 bits for SHA-256).
- *
- * The caller should allocate and partially populate the `prk` blinded key
- * struct, including populating the key configuration and allocating space for
- * the keyblob. The PRK configuration may not indicate a hardware-backed key.
- * The allocated keyblob length should be twice the length of the hash function
- * digest length.
- *
- * @param ikm Blinded input key material.
- * @param salt Salt value (optional, may be empty).
- * @param[out] prk Extracted pseudo-random key.
- * @return Result of the key derivation operation.
- */
-otcrypto_status_t otcrypto_kdf_hkdf_extract(const otcrypto_blinded_key_t ikm,
-                                            otcrypto_const_byte_buf_t salt,
-                                            otcrypto_blinded_key_t *prk);
-
-/**
- * Performs the "expand" step of HKDF.
- *
- * HKDF is defined in IETF RFC 5869 and is based on HMAC. The HMAC hash
- * function is inferred from the key mode of the pseudo-random key (PRK).
- *
- * The input pseudo-random key should be generated from the "extract" step of
- * HKDF. Its length should always be the same as the digest length of the hash
- * function.
- *
- * The caller should allocate and partially populate the `okm` blinded key
- * struct, including populating the key configuration and allocating space for
- * the keyblob. The key configuration may not indicate a hardware-backed key.
- * The allocated keyblob length should be twice the key length indicated in the
- * key configuration, and this key length must not be longer than 255*<length
- * of hash digest> as per the RFC.
- *
- * @param prk Pseudo-random key from HKDF-extract.
- * @param info Context-specific string (optional).
- * @param[out] okm Blinded output key material.
- * @return Result of the key derivation operation.
- */
-otcrypto_status_t otcrypto_kdf_hkdf_expand(const otcrypto_blinded_key_t prk,
-                                           otcrypto_const_byte_buf_t info,
-                                           otcrypto_blinded_key_t *okm);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_H_
diff --git a/sw/device/lib/crypto/include/kdf_ctr.h b/sw/device/lib/crypto/include/kdf_ctr.h
new file mode 100644
index 0000000000000..1b345a5a2c2cb
--- /dev/null
+++ b/sw/device/lib/crypto/include/kdf_ctr.h
@@ -0,0 +1,47 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_CTR_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_CTR_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief KDF-CTR operations for the OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Performs KDF-CTR with HMAC as the PRF, according to NIST SP 800-108r1.
+ *
+ * The caller should allocate and partially populate the `output_key_material`
+ * blinded key struct, including populating the key configuration and
+ * allocating space for the keyblob. The configuration may not indicate a
+ * hardware-backed key and must indicate a symmetric mode. The allocated
+ * keyblob length for the output key should be twice the unmasked key length
+ * indicated in its key configuration, rounded up to the nearest 32-bit word.
+ * The value in the `checksum` field of the blinded key struct will be
+ * populated by the key derivation function.
+ *
+ * @param key_derivation_key Blinded key derivation key.
+ * @param label Label string (optional, may be empty).
+ * @param context Context string (optional, may be empty).
+ * @param[out] output_key_material Blinded output key material.
+ * @return Result of the key derivation operation.
+ */
+otcrypto_status_t otcrypto_kdf_ctr_hmac(
+    const otcrypto_blinded_key_t *key_derivation_key,
+    const otcrypto_const_byte_buf_t label,
+    const otcrypto_const_byte_buf_t context,
+    otcrypto_blinded_key_t *output_key_material);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KDF_CTR_H_
diff --git a/sw/device/lib/crypto/include/key_transport.h b/sw/device/lib/crypto/include/key_transport.h
index 5f22ee8ac3ba9..a47a135a15723 100644
--- a/sw/device/lib/crypto/include/key_transport.h
+++ b/sw/device/lib/crypto/include/key_transport.h
@@ -46,6 +46,7 @@ extern "C" {
  * @param[out] key Destination blinded key struct.
  * @return The result of the operation.
  */
+OT_WARN_UNUSED_RESULT
 otcrypto_status_t otcrypto_symmetric_keygen(
     otcrypto_const_byte_buf_t perso_string, otcrypto_blinded_key_t *key);
 
@@ -71,10 +72,81 @@ otcrypto_status_t otcrypto_symmetric_keygen(
  * @param[out] key Destination blinded key struct.
  * @return The result of the operation.
  */
+OT_WARN_UNUSED_RESULT
 otcrypto_status_t otcrypto_hw_backed_key(uint32_t version,
                                          const uint32_t salt[7],
                                          otcrypto_blinded_key_t *key);
 
+/**
+ * Returns the length that the blinded key will have once wrapped.
+ *
+ * @param config Key configuration.
+ * @param[out] wrapped_num_words Number of 32b words for the wrapped key.
+ * @return Result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_wrapped_key_len(const otcrypto_key_config_t config,
+                                           size_t *wrapped_num_words);
+
+/**
+ * Wraps (encrypts) a secret key.
+ *
+ * The key wrap function uses AES-KWP (key wrapping with padding), an
+ * authenticated encryption mode designed for encrypting key material.
+ *
+ * The caller should allocate space for the `wrapped_key` buffer according to
+ * `otcrypto_wrapped_key_len`, and set the length of expected output in the
+ * `len` field of `wrapped_key`. If the user-set length and the output length
+ * do not match, an error message will be returned.
+ *
+ * The blinded key struct to wrap must be 32-bit aligned.
+ *
+ * @param key_to_wrap Blinded key that will be encrypted.
+ * @param key_kek AES-KWP key used to encrypt `key_to_wrap`.
+ * @param[out] wrapped_key Encrypted key data.
+ * @return Result of the wrap operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_key_wrap(const otcrypto_blinded_key_t *key_to_wrap,
+                                    const otcrypto_blinded_key_t *key_kek,
+                                    otcrypto_word32_buf_t wrapped_key);
+
+/**
+ * Unwraps (decrypts) a secret key.
+ *
+ * The key unwrap function uses AES-KWP (key wrapping with padding), an
+ * authenticated encryption mode designed for encrypting key material.
+ *
+ * The caller must allocate space for the keyblob and set the keyblob-length
+ * and keyblob fields in `unwrapped_key` accordingly. If there is not enough
+ * space in the keyblob, this function will return an error. Too much space in
+ * the keyblob is okay; this function will write to the first part of the
+ * keyblob buffer and set the keyblob length field to the correct exact value
+ * for the unwrapped key, at which point it is safe to check the new length and
+ * free the remaining keyblob memory. It is always safe to allocate a keyblob
+ * the same size as the wrapped key; this will always be enough space by
+ * definition.
+ *
+ * The caller does not need to populate the blinded key configuration, since
+ * this information is encrypted along with the key.  However, the caller may
+ * want to check that the configuration matches expectations.
+ *
+ * An OK status from this function does NOT necessarily mean that unwrapping
+ * succeeded; the caller must check both the returned status and the `success`
+ * parameter before reading the unwrapped key.
+ *
+ * @param wrapped_key Encrypted key data.
+ * @param key_kek AES-KWP key used to decrypt `wrapped_key`.
+ * @param[out] success Whether the wrapped key was valid.
+ * @param[out] unwrapped_key Decrypted key data.
+ * @return Result of the aes-kwp unwrap operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_key_unwrap(otcrypto_const_word32_buf_t wrapped_key,
+                                      const otcrypto_blinded_key_t *key_kek,
+                                      hardened_bool_t *success,
+                                      otcrypto_blinded_key_t *unwrapped_key);
+
 /**
  * Creates a blinded key struct from masked key material.
  *
@@ -92,6 +164,7 @@ otcrypto_status_t otcrypto_hw_backed_key(uint32_t version,
  * @param[out] blinded_key Generated blinded key struct.
  * @return Result of the blinded key import operation.
  */
+OT_WARN_UNUSED_RESULT
 otcrypto_status_t otcrypto_import_blinded_key(
     const otcrypto_const_word32_buf_t key_share0,
     const otcrypto_const_word32_buf_t key_share1,
@@ -112,8 +185,9 @@ otcrypto_status_t otcrypto_import_blinded_key(
  * @param[out] key_share1 Second share of the blinded key.
  * @return Result of the blinded key export operation.
  */
+OT_WARN_UNUSED_RESULT
 otcrypto_status_t otcrypto_export_blinded_key(
-    const otcrypto_blinded_key_t blinded_key, otcrypto_word32_buf_t key_share0,
+    const otcrypto_blinded_key_t *blinded_key, otcrypto_word32_buf_t key_share0,
     otcrypto_word32_buf_t key_share1);
 
 #ifdef __cplusplus
diff --git a/sw/device/lib/crypto/include/kmac.h b/sw/device/lib/crypto/include/kmac.h
new file mode 100644
index 0000000000000..d228d90264ee2
--- /dev/null
+++ b/sw/device/lib/crypto/include/kmac.h
@@ -0,0 +1,60 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief Message authentication codes for the OpenTitan cryptography library.
+ *
+ * Supports message authentication based on either HMAC or KMAC.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Performs the KMAC function on the input data.
+ *
+ * This function computes the KMAC on the `input_message` using the `key` and
+ * returns a `tag` of `required_output_len`. The customization string is passed
+ * through `customization_string` parameter. If no customization is desired it
+ * can be be left empty (by settings its `data` to NULL and `length` to 0).
+ *
+ * The caller should set the `key_length` field of `key.config` to the number
+ * of bytes in the key. Only the following key sizes (in bytes) are supported:
+ * [16, 24, 32, 48, 64]. If any other size is given, the function will return
+ * an error.
+ *
+ * The KMAC mode (KMAC-128 or KMAC-256) is inferred from the key mode.
+ *
+ * The caller should allocate enough space in the `tag` buffer to hold
+ * `required_output_len` bytes, rounded up to the nearest word, and then set
+ * the `len` field of `tag` to the word length. If the word length is not long
+ * enough to hold `required_output_len` bytes, then the function will return an
+ * error.
+ *
+ * @param key Pointer to the blinded key struct with key shares.
+ * @param input_message Input message to be hashed.
+ * @param customization_string Customization string.
+ * @param required_output_len Required output length, in bytes.
+ * @param[out] tag Output authentication tag.
+ * @return The result of the KMAC operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_kmac(otcrypto_blinded_key_t *key,
+                                otcrypto_const_byte_buf_t input_message,
+                                otcrypto_const_byte_buf_t customization_string,
+                                size_t required_output_len,
+                                otcrypto_word32_buf_t tag);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_H_
diff --git a/sw/device/lib/crypto/include/kmac_kdf.h b/sw/device/lib/crypto/include/kmac_kdf.h
new file mode 100644
index 0000000000000..88b198297769c
--- /dev/null
+++ b/sw/device/lib/crypto/include/kmac_kdf.h
@@ -0,0 +1,54 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_KDF_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_KDF_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief KMAC-KDF operations for the OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Performs KMAC-KDF as specified in NIST SP 800-108r1.
+ *
+ * KMAC-KDF can use either KMAC128 or KMAC256; which one is determined by the
+ * key mode in the configuration of `key_derivation_key`.
+ *
+ * Because of limitations on the KMAC hardware, labels longer than 32 bytes are
+ * not supported.
+ *
+ * The caller should allocate and partially populate the `output_key_material`
+ * blinded key struct, including populating the key configuration and
+ * allocating space for the keyblob. The configuration may not indicate a
+ * hardware-backed key and must indicate a symmetric mode. The allocated
+ * keyblob length for the output key should be twice the unmasked key length
+ * indicated in its key configuration, rounded up to the nearest 32-bit word.
+ * The value in the `checksum` field of the blinded key struct will be
+ * populated by the key derivation function.
+ *
+ * @param key_derivation_key Blinded key derivation key.
+ * @param kmac_mode Either KMAC128 or KMAC256 as PRF.
+ * @param label Label string (optional, may be empty).
+ * @param context Context string (optional, may be empty).
+ * @param[out] output_key_material Blinded output key material.
+ * @return Result of the key derivation operation.
+ */
+otcrypto_status_t otcrypto_kmac_kdf(
+    otcrypto_blinded_key_t *key_derivation_key,
+    const otcrypto_const_byte_buf_t label,
+    const otcrypto_const_byte_buf_t context,
+    otcrypto_blinded_key_t *output_key_material);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_KMAC_KDF_H_
diff --git a/sw/device/lib/crypto/include/mac.h b/sw/device/lib/crypto/include/mac.h
deleted file mode 100644
index 2a03decf58b92..0000000000000
--- a/sw/device/lib/crypto/include/mac.h
+++ /dev/null
@@ -1,163 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_MAC_H_
-#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_MAC_H_
-
-#include "datatypes.h"
-#include "hash.h"
-
-/**
- * @file
- * @brief Message authentication codes for the OpenTitan cryptography library.
- *
- * Supports message authentication based on either HMAC or KMAC.
- */
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Enum to define KMAC mode.
- *
- * Values are hardened.
- */
-typedef enum otcrypto_kmac_mode {
-  // KMAC128 mode.
-  kOtcryptoKmacModeKmac128 = 0x336,
-  // KMAC256 mode.
-  kOtcryptoKmacModeKmac256 = 0xec4,
-} otcrypto_kmac_mode_t;
-
-/**
- * Generic hmac context.
- *
- * Representation is internal to the hmac implementation; initialize
- * with #otcrypto_hmac_init.
- */
-typedef struct otcrypto_hmac_context {
-  uint32_t data[kOtcryptoHashCtxStructWords];
-} otcrypto_hmac_context_t;
-
-/**
- * Performs the HMAC function on the input data.
- *
- * This function computes the HMAC function on the `input_message` using the
- * `key` and returns a `tag`. The key should be at least as long as the digest
- * for the chosen hash function. The hash function is determined by the key
- * mode. Only SHA-2 hash functions are supported. Other modes (e.g. SHA-3) are
- * not supported and will result in errors.
- *
- * The caller should allocate the following amount of space for the `tag`
- * buffer, depending on which hash algorithm is used:
- *
- * SHA-256: 32 bytes
- * SHA-384: 48 bytes
- * SHA-512: 64 bytes
- *
- * The caller should also set the `len` field of `tag` to the equivalent number
- * of 32-bit words (e.g. 8 for SHA-256).
- *
- * @param key Pointer to the blinded key struct with key shares.
- * @param input_message Input message to be hashed.
- * @param[out] tag Output authentication tag.
- * @return The result of the HMAC operation.
- */
-otcrypto_status_t otcrypto_hmac(const otcrypto_blinded_key_t *key,
-                                otcrypto_const_byte_buf_t input_message,
-                                otcrypto_word32_buf_t tag);
-
-/**
- * Performs the KMAC function on the input data.
- *
- * This function computes the KMAC on the `input_message` using the `key` and
- * returns a `tag` of `required_output_len`. The customization string is passed
- * through `customization_string` parameter. If no customization is desired it
- * can be be left empty (by settings its `data` to NULL and `length` to 0).
- *
- * The caller should set the `key_length` field of `key.config` to the number
- * of bytes in the key. Only the following key sizes (in bytes) are supported:
- * [16, 24, 32, 48, 64]. If any other size is given, the function will return
- * an error.
- *
- * The caller should allocate enough space in the `tag` buffer to hold
- * `required_output_len` bytes, rounded up to the nearest word, and then set
- * the `len` field of `tag` to the word length. If the word length is not long
- * enough to hold `required_output_len` bytes, then the function will return an
- * error.
- *
- * @param key Pointer to the blinded key struct with key shares.
- * @param input_message Input message to be hashed.
- * @param mac_mode Required KMAC mode.
- * @param customization_string Customization string.
- * @param required_output_len Required output length, in bytes.
- * @param[out] tag Output authentication tag.
- * @return The result of the KMAC operation.
- */
-otcrypto_status_t otcrypto_kmac(const otcrypto_blinded_key_t *key,
-                                otcrypto_const_byte_buf_t input_message,
-                                otcrypto_kmac_mode_t kmac_mode,
-                                otcrypto_const_byte_buf_t customization_string,
-                                size_t required_output_len,
-                                otcrypto_word32_buf_t tag);
-
-/**
- * Performs the INIT operation for HMAC.
- *
- * Initializes the HMAC context. The key should be at least as long as the
- * digest for the chosen hash function. The hash function is determined by the
- * key mode. Only SHA-2 hash functions are are supported. Other modes (e.g.
- * SHA-3) are not supported and will result in errors.
- *
- * @param[out] ctx Pointer to the generic HMAC context struct.
- * @param key Pointer to the blinded HMAC key struct.
- * @param hash_mode Hash function to use.
- * @return Result of the HMAC init operation.
- */
-otcrypto_status_t otcrypto_hmac_init(otcrypto_hmac_context_t *ctx,
-                                     const otcrypto_blinded_key_t *key);
-
-/**
- * Performs the UPDATE operation for HMAC.
- *
- * The update operation processes the `input_message` using the selected
- * compression function. The intermediate state is stored in the HMAC context
- * `ctx`. Any partial data is stored back in the context and combined with the
- * subsequent bytes.
- *
- * #otcrypto_hmac_init should be called before calling this function.
- *
- * @param ctx Pointer to the generic HMAC context struct.
- * @param input_message Input message to be hashed.
- * @return Result of the HMAC update operation.
- */
-otcrypto_status_t otcrypto_hmac_update(otcrypto_hmac_context_t *const ctx,
-                                       otcrypto_const_byte_buf_t input_message);
-
-/**
- * Performs the FINAL operation for HMAC.
- *
- * The final operation processes the remaining partial blocks, computes the
- * final authentication code and copies it to the `tag` parameter.
- *
- * #otcrypto_hmac_update should be called before calling this function.
- *
- * The caller should allocate space for the `tag` buffer, (the length should
- * match the hash function digest size), and set the length of expected output
- * in the `len` field of `tag`. If the user-set length and the output length
- * does not match, an error message will be returned.
- *
- * @param ctx Pointer to the generic HMAC context struct.
- * @param[out] tag Output authentication tag.
- * @return Result of the HMAC final operation.
- */
-otcrypto_status_t otcrypto_hmac_final(otcrypto_hmac_context_t *const ctx,
-                                      otcrypto_word32_buf_t tag);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_MAC_H_
diff --git a/sw/device/lib/crypto/include/otcrypto.h b/sw/device/lib/crypto/include/otcrypto.h
index 68f2a75c29b09..23646aa0ee7f9 100644
--- a/sw/device/lib/crypto/include/otcrypto.h
+++ b/sw/device/lib/crypto/include/otcrypto.h
@@ -6,14 +6,23 @@
 #define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_OTCRYPTO_H_
 
 #include "aes.h"
+#include "aes_gcm.h"
+#include "cryptolib_build_info.h"
 #include "datatypes.h"
 #include "drbg.h"
-#include "ecc.h"
-#include "hash.h"
-#include "kdf.h"
+#include "ecc_p256.h"
+#include "ecc_p384.h"
+#include "ed25519.h"
+#include "hkdf.h"
+#include "hmac.h"
+#include "kdf_ctr.h"
 #include "key_transport.h"
-#include "mac.h"
+#include "kmac.h"
+#include "kmac_kdf.h"
 #include "rsa.h"
+#include "sha2.h"
+#include "sha3.h"
+#include "x25519.h"
 
 /**
  * @file
diff --git a/sw/device/lib/crypto/include/rsa.h b/sw/device/lib/crypto/include/rsa.h
index 6a7cbbe4e3432..06b1f281adf9b 100644
--- a/sw/device/lib/crypto/include/rsa.h
+++ b/sw/device/lib/crypto/include/rsa.h
@@ -52,9 +52,9 @@ enum {
    * to change. This is the length that the caller should set as `key_length`
    * and allocate for the `key` buffer in unblinded keys.
    */
-  kOtcryptoRsa2048PublicKeyBytes = 260,
-  kOtcryptoRsa3072PublicKeyBytes = 388,
-  kOtcryptoRsa4096PublicKeyBytes = 516,
+  kOtcryptoRsa2048PublicKeyBytes = 256,
+  kOtcryptoRsa3072PublicKeyBytes = 384,
+  kOtcryptoRsa4096PublicKeyBytes = 512,
   /**
    * Number of bytes needed for RSA private keys.
    *
@@ -72,16 +72,15 @@ enum {
    * to change. This is the length that the caller should set in
    * `keyblob_length` and allocate for the `keyblob` buffer in blinded keys.
    */
-  kOtcryptoRsa2048PrivateKeyblobBytes = 512,
-  kOtcryptoRsa3072PrivateKeyblobBytes = 768,
-  kOtcryptoRsa4096PrivateKeyblobBytes = 1024,
+  kOtcryptoRsa2048PrivateKeyblobBytes = 768,
+  kOtcryptoRsa3072PrivateKeyblobBytes = 1152,
+  kOtcryptoRsa4096PrivateKeyblobBytes = 1536,
 };
 
 /**
  * Performs the RSA key generation.
  *
- * Computes RSA private key (d) and RSA public key exponent (e) and
- * modulus (n).
+ * Computes RSA private key (d) and the public key modulus (n).
  *
  * The caller should allocate space for the public key and set the `key` and
  * `key_length` fields accordingly.
@@ -106,7 +105,8 @@ otcrypto_status_t otcrypto_rsa_keygen(otcrypto_rsa_size_t size,
  * Constructs an RSA public key from the modulus and public exponent.
  *
  * The caller should allocate space for the public key and set the `key` and
- * `key_length` fields accordingly.
+ * `key_length` fields accordingly. The public exponent is implicitly fixed
+ * to e=2^16+1.
  *
  * @param size RSA size parameter.
  * @param modulus RSA modulus (n).
@@ -116,7 +116,7 @@ otcrypto_status_t otcrypto_rsa_keygen(otcrypto_rsa_size_t size,
  */
 otcrypto_status_t otcrypto_rsa_public_key_construct(
     otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
-    uint32_t exponent, otcrypto_unblinded_key_t *public_key);
+    otcrypto_unblinded_key_t *public_key);
 
 /**
  * Constructs an RSA private key from the modulus and public/private exponents.
@@ -126,14 +126,13 @@ otcrypto_status_t otcrypto_rsa_public_key_construct(
  *
  * @param size RSA size parameter.
  * @param modulus RSA modulus (n).
- * @param exponent RSA public exponent (e).
  * @param d_share0 First share of the RSA private exponent d.
  * @param d_share1 Second share of the RSA private exponent d.
  * @param[out] public_key Destination public key struct.
  * @return Result of the RSA key construction.
  */
 otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t d_share0, otcrypto_const_word32_buf_t d_share1,
     otcrypto_blinded_key_t *private_key);
 
@@ -147,7 +146,6 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
  *
  * @param size RSA size parameter.
  * @param modulus RSA modulus (n).
- * @param exponent RSA public exponent (e).
  * @param cofactor_share0 First share of the prime cofactor (p or q).
  * @param cofactor_share1 Second share of the prime cofactor (p or q).
  * @param[out] public_key Destination public key struct.
@@ -155,7 +153,7 @@ otcrypto_status_t otcrypto_rsa_private_key_from_exponents(
  * @return Result of the RSA key construction.
  */
 otcrypto_status_t otcrypto_rsa_keypair_from_cofactor(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t cofactor_share0,
     otcrypto_const_word32_buf_t cofactor_share1,
     otcrypto_unblinded_key_t *public_key, otcrypto_blinded_key_t *private_key);
@@ -302,13 +300,12 @@ otcrypto_status_t otcrypto_rsa_keygen_async_finalize(
  *
  * @param size RSA size parameter.
  * @param modulus RSA modulus (n).
- * @param exponent RSA public exponent (e).
  * @param cofactor_share0 First share of the prime cofactor (p or q).
  * @param cofactor_share1 Second share of the prime cofactor (p or q).
  * @return Result of the RSA key construction.
  */
 otcrypto_status_t otcrypto_rsa_keypair_from_cofactor_async_start(
-    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus, uint32_t e,
+    otcrypto_rsa_size_t size, otcrypto_const_word32_buf_t modulus,
     otcrypto_const_word32_buf_t cofactor_share0,
     otcrypto_const_word32_buf_t cofactor_share1);
 
diff --git a/sw/device/lib/crypto/include/sha2.h b/sw/device/lib/crypto/include/sha2.h
new file mode 100644
index 0000000000000..f9491652d04b6
--- /dev/null
+++ b/sw/device/lib/crypto/include/sha2.h
@@ -0,0 +1,127 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA2_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA2_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief SHA-2 hash functions for the OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+enum {
+  /**
+   * The size of the publicly exposed HMAC context in words.
+   * We assert that this value is large enough to host the internal HMAC driver
+   * struct.
+   */
+  kOtcryptoSha2CtxStructWords = 88,
+};
+
+/**
+ * Opaque SHA-2 hash context.
+ *
+ * Representation is internal to the hash implementation; initialize
+ * with #otcrypto_sha2_init.
+ */
+typedef struct otcrypto_sha2_context {
+  uint32_t data[kOtcryptoSha2CtxStructWords];
+} otcrypto_sha2_context_t;
+
+/**
+ * One-shot SHA2-256 hash computation.
+ *
+ * The caller should allocate space for the `digest` buffer and set the `len`
+ * fields. If the length does not match the mode, an error message will be
+ * returned. The `mode` field will be set by this function.
+ *
+ * @param message Input message to be hashed.
+ * @param[out] digest Output digest after hashing the input message.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHA2-384 hash computation.
+ *
+ * The caller should allocate space for the `digest` buffer and set the `len`
+ * fields. If the length does not match the mode, an error message will be
+ * returned. The `mode` field will be set by this function.
+ *
+ * @param message Input message to be hashed.
+ * @param[out] digest Output digest after hashing the input message.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_384(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHA2-512 hash computation.
+ *
+ * The caller should allocate space for the `digest` buffer and set the `len`
+ * field. If the length does not match the mode, an error message will be
+ * returned. The `mode` field will be set by this function.
+ *
+ * @param message Input message to be hashed.
+ * @param[out] digest Output digest after hashing the input message.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_512(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * Start a streaming SHA2 operation.
+ *
+ * @param hash_mode Desired mode (must be a SHA-2 mode).
+ * @param[out] ctx Initialized context object.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_init(otcrypto_hash_mode_t hash_mode,
+                                     otcrypto_sha2_context_t *ctx);
+
+/**
+ * Add more data to a streaming SHA2 operation and update the context.
+ *
+ * @param ctx Initialized context object (updated in place).
+ * @param message Input message data.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_update(otcrypto_sha2_context_t *ctx,
+                                       otcrypto_const_byte_buf_t message);
+
+/**
+ * Finish a streaming SHA2 operation.
+ *
+ * The caller should allocate space for the `digest` buffer and set the `len`
+ * field. If the length does not match the context, an error message will be
+ * returned. The `mode` field will be inferred from the length and set by this
+ * function.
+ *
+ * The context data should not be used after this operation.
+ *
+ * @param ctx Initialized context object.
+ * @param[out] digest Resulting digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha2_final(otcrypto_sha2_context_t *ctx,
+                                      otcrypto_hash_digest_t *digest);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA2_H_
diff --git a/sw/device/lib/crypto/include/sha3.h b/sw/device/lib/crypto/include/sha3.h
new file mode 100644
index 0000000000000..45d420c4c000f
--- /dev/null
+++ b/sw/device/lib/crypto/include/sha3.h
@@ -0,0 +1,165 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA3_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA3_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief Keccak-based hash functions for the OpenTitan cryptography library.
+ *
+ * Supports SHA3, SHAKE, and cSHAKE operations.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * One-shot SHA3-224 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * accordingly. The function will return an error if the length is not 224
+ * bits (= 7 32-bit words). The `digest.mode` field is set by this function and
+ * may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha3_224(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHA3-256 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * accordingly. The function will return an error if the length is not 256
+ * bits (= 8 32-bit words). The `digest.mode` field is set by this function and
+ * may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha3_256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHA3-384 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * accordingly. The function will return an error if the length is not 384
+ * bits (= 12 32-bit words). The `digest.mode` field is set by this function and
+ * may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha3_384(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHA3-512 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * accordingly. The function will return an error if the length is not 512
+ * bits (= 16 32-bit words). The `digest.mode` field is set by this function and
+ * may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_sha3_512(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHAKE128 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * according to their desired output length. The `digest.mode` field is set by
+ * this function and may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_shake128(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot SHAKE256 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * according to their desired output length. The `digest.mode` field is set by
+ * this function and may be uninitialized.
+ *
+ * @param message Input message.
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_shake256(otcrypto_const_byte_buf_t message,
+                                    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot cSHAKE128 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * according to their desired output length. The `digest.mode` field is set by
+ * this function and may be uninitialized.
+ *
+ * The function name and customization string parameters are defined in NIST
+ * SP800-185; please refer to that document for guidance on their usage.
+ *
+ * @param message Input message.
+ * @param function_name_string Function name parameter (may be empty).
+ * @param customization_string Customization parameter (may be empty).
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_cshake128(
+    otcrypto_const_byte_buf_t message,
+    otcrypto_const_byte_buf_t function_name_string,
+    otcrypto_const_byte_buf_t customization_string,
+    otcrypto_hash_digest_t *digest);
+
+/**
+ * One-shot cSHAKE256 hash computation.
+ *
+ * The caller should allocate space for the digest and set `digest.len`
+ * according to their desired output length. The `digest.mode` field is set by
+ * this function and may be uninitialized.
+ *
+ * The function name and customization string parameters are defined in NIST
+ * SP800-185; please refer to that document for guidance on their usage.
+ *
+ * @param message Input message.
+ * @param function_name_string Function name parameter (may be empty).
+ * @param customization_string Customization parameter (may be empty).
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_cshake256(
+    otcrypto_const_byte_buf_t message,
+    otcrypto_const_byte_buf_t function_name_string,
+    otcrypto_const_byte_buf_t customization_string,
+    otcrypto_hash_digest_t *digest);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_SHA3_H_
diff --git a/sw/device/lib/crypto/include/x25519.h b/sw/device/lib/crypto/include/x25519.h
new file mode 100644
index 0000000000000..d8de7d8f22ff4
--- /dev/null
+++ b/sw/device/lib/crypto/include/x25519.h
@@ -0,0 +1,112 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_X25519_H_
+#define OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_X25519_H_
+
+#include "datatypes.h"
+
+/**
+ * @file
+ * @brief X25519 operations for OpenTitan cryptography library.
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Generates a key pair for X25519.
+ *
+ * The caller should allocate and partially populate the blinded key struct,
+ * including populating the key configuration and allocating space for the
+ * keyblob. For a hardware-backed key, use the private key handle returned by
+ * `otcrypto_hw_backed_key`. Otherwise, the mode should indicate X25519 and the
+ * keyblob should be 80 bytes. The value in the `checksum` field of the blinded
+ * key struct will be populated by the key generation function.
+ *
+ * @param[out] private_key Pointer to the blinded private key struct.
+ * @param[out] public_key Pointer to the unblinded public key struct.
+ * @return Result of the X25519 key generation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519_keygen(otcrypto_blinded_key_t *private_key,
+                                         otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Elliptic-curve Diffie Hellman shared secret generation with Curve25519.
+ *
+ * @param private_key Pointer to blinded private key (u-coordinate).
+ * @param public_key Pointer to the public scalar from the sender.
+ * @param[out] shared_secret Pointer to shared secret key (u-coordinate).
+ * @return Result of the X25519 operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519(const otcrypto_blinded_key_t *private_key,
+                                  const otcrypto_unblinded_key_t *public_key,
+                                  otcrypto_blinded_key_t *shared_secret);
+
+/**
+ * Starts asynchronous key generation for X25519.
+ *
+ * See `otcrypto_x25519_keygen` for requirements on input values.
+ *
+ * @param private_key Destination structure for private key, or key handle.
+ * @return Result of asynchronous X25519 keygen start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519_keygen_async_start(
+    const otcrypto_blinded_key_t *private_key);
+
+/**
+ * Finalizes the asynchronous key generation for X25519.
+ *
+ * See `otcrypto_x25519_keygen` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * The caller should ensure that the private key configuration matches that
+ * passed to the `_start` function.
+ *
+ * @param[out] private_key Pointer to the blinded private key struct.
+ * @param[out] public_key Pointer to the unblinded public key struct.
+ * @return Result of asynchronous ECDSA keygen finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519_keygen_async_finalize(
+    otcrypto_blinded_key_t *private_key, otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Starts asynchronous shared secret generation for X25519.
+ *
+ * See `otcrypto_x25519` for requirements on input values.
+ *
+ * @param private_key Pointer to the blinded private key (u-coordinate).
+ * @param public_key Pointer to the public scalar from the sender.
+ * @return Result of the async X25519 start operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519_async_start(
+    const otcrypto_blinded_key_t *private_key,
+    const otcrypto_unblinded_key_t *public_key);
+
+/**
+ * Finalizes asynchronous shared secret generation for X25519.
+ *
+ * See `otcrypto_x25519` for requirements on input values.
+ *
+ * May block until the operation is complete.
+ *
+ * @param[out] shared_secret Pointer to shared secret key (u-coordinate).
+ * @return Result of async X25519 finalize operation.
+ */
+OT_WARN_UNUSED_RESULT
+otcrypto_status_t otcrypto_x25519_async_finalize(
+    otcrypto_blinded_key_t *shared_secret);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_CRYPTO_INCLUDE_X25519_H_
diff --git a/sw/device/lib/dif/BUILD b/sw/device/lib/dif/BUILD
index 8709ee17ad72b..a090d49ff9a38 100644
--- a/sw/device/lib/dif/BUILD
+++ b/sw/device/lib/dif/BUILD
@@ -753,6 +753,7 @@ cc_test(
         "autogen/dif_pwrmgr_autogen_unittest.cc",
         "dif_pwrmgr_unittest.cc",
     ],
+    copts = ["-Wno-enum-constexpr-conversion"],
     deps = [
         ":pwrmgr",
         ":test_base",
diff --git a/sw/device/lib/dif/dif_alert_handler.c b/sw/device/lib/dif/dif_alert_handler.c
index 58a6ecbce6214..d33f35d458125 100644
--- a/sw/device/lib/dif/dif_alert_handler.c
+++ b/sw/device/lib/dif/dif_alert_handler.c
@@ -178,7 +178,7 @@ dif_result_t dif_alert_handler_configure_alert(
   ptrdiff_t enable_reg_offset = ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET +
                                 (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
   mmio_region_write32_shadowed(alert_handler->base_addr, enable_reg_offset,
-                               0x1);
+                               dif_toggle_to_bool(enabled));
 
   // Lock the configuration.
   if (locked == kDifToggleEnabled) {
@@ -456,6 +456,43 @@ dif_result_t dif_alert_handler_configure_class(
   return kDifOk;
 }
 
+dif_result_t dif_alert_handler_crash_dump_trigger_set(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class,
+    dif_alert_handler_class_state_t crashdump_phase) {
+  if (alert_handler == NULL ||
+      crashdump_phase < kDifAlertHandlerClassStatePhase0 ||
+      crashdump_phase > kDifAlertHandlerClassStatePhase3) {
+    return kDifBadArg;
+  }
+#define ALERT_CLASS_CONFIG_REGS_CASE_(class_, value_)                        \
+  case kDifAlertHandlerClass##class_:                                        \
+    class_regwen_offset = ALERT_HANDLER_CLASS##class_##_REGWEN_REG_OFFSET;   \
+    crashdump_phase_reg_offset =                                             \
+        ALERT_HANDLER_CLASS##class_##_CRASHDUMP_TRIGGER_SHADOWED_REG_OFFSET; \
+    break;
+
+  ptrdiff_t class_regwen_offset;
+  ptrdiff_t crashdump_phase_reg_offset;
+  switch (alert_class) {
+    LIST_OF_CLASSES(ALERT_CLASS_CONFIG_REGS_CASE_)
+    default:
+      return kDifBadArg;
+  }
+#undef ALERT_CLASS_CONFIG_REGS_CASE_
+
+  // Check if class configuration is locked.
+  if (!mmio_region_read32(alert_handler->base_addr, class_regwen_offset)) {
+    return kDifLocked;
+  }
+
+  // Configure the crashdump phase.
+  mmio_region_write32_shadowed(
+      alert_handler->base_addr, crashdump_phase_reg_offset,
+      (uint32_t)(crashdump_phase - kDifAlertHandlerClassStatePhase0));
+  return kDifOk;
+}
+
 dif_result_t dif_alert_handler_configure_ping_timer(
     const dif_alert_handler_t *alert_handler, uint32_t ping_timeout,
     dif_toggle_t enabled, dif_toggle_t locked) {
@@ -835,6 +872,32 @@ dif_result_t dif_alert_handler_get_escalation_counter(
   return kDifOk;
 }
 
+dif_result_t dif_alert_handler_is_class_enabled(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class, bool *is_enabled) {
+  if (alert_handler == NULL || is_enabled == NULL) {
+    return kDifBadArg;
+  }
+#define ALERT_CLASS_CTRL_CASE_(class_, value_)                           \
+  case kDifAlertHandlerClass##class_:                                    \
+    reg_offset = ALERT_HANDLER_CLASS##class_##_CTRL_SHADOWED_REG_OFFSET; \
+    break;
+
+  ptrdiff_t reg_offset;
+  switch (alert_class) {
+    LIST_OF_CLASSES(ALERT_CLASS_CTRL_CASE_)
+    default:
+      return kDifBadArg;
+  }
+#undef ALERT_CLASS_CTRL_CASE_
+
+  uint32_t reg = mmio_region_read32(alert_handler->base_addr, reg_offset);
+  *is_enabled =
+      bitfield_bit32_read(reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_EN_BIT);
+
+  return kDifOk;
+}
+
 dif_result_t dif_alert_handler_get_class_state(
     const dif_alert_handler_t *alert_handler,
     dif_alert_handler_class_t alert_class,
@@ -891,3 +954,45 @@ dif_result_t dif_alert_handler_get_class_state(
 
   return kDifOk;
 }
+
+dif_result_t dif_alert_handler_alert_is_enabled(
+    const dif_alert_handler_t *alert_handler, dif_alert_handler_alert_t alert,
+    dif_toggle_t *is_enabled) {
+  if (alert_handler == NULL || alert >= ALERT_HANDLER_PARAM_N_ALERTS ||
+      is_enabled == NULL) {
+    return kDifBadArg;
+  }
+
+  // Enable the alert.
+  ptrdiff_t enable_reg_offset = ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET +
+                                (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+  bool enabled =
+      mmio_region_read32(alert_handler->base_addr, enable_reg_offset);
+  *is_enabled = dif_bool_to_toggle(enabled);
+
+  return kDifOk;
+}
+
+dif_result_t dif_alert_handler_alert_set_enabled(
+    const dif_alert_handler_t *alert_handler, dif_alert_handler_alert_t alert,
+    dif_toggle_t enabled) {
+  if (alert_handler == NULL || alert >= ALERT_HANDLER_PARAM_N_ALERTS ||
+      !dif_is_valid_toggle(enabled)) {
+    return kDifBadArg;
+  }
+
+  // Check if configuration is locked.
+  ptrdiff_t regwen_offset = ALERT_HANDLER_ALERT_REGWEN_0_REG_OFFSET +
+                            (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+  if (!mmio_region_read32(alert_handler->base_addr, regwen_offset)) {
+    return kDifLocked;
+  }
+
+  // Enable the alert.
+  ptrdiff_t enable_reg_offset = ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET +
+                                (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+  mmio_region_write32_shadowed(alert_handler->base_addr, enable_reg_offset,
+                               dif_toggle_to_bool(enabled));
+
+  return kDifOk;
+}
diff --git a/sw/device/lib/dif/dif_alert_handler.h b/sw/device/lib/dif/dif_alert_handler.h
index 5711f151ccdcb..678d11288e3b0 100644
--- a/sw/device/lib/dif/dif_alert_handler.h
+++ b/sw/device/lib/dif/dif_alert_handler.h
@@ -379,6 +379,21 @@ dif_result_t dif_alert_handler_configure_class(
     dif_alert_handler_class_config_t config, dif_toggle_t enabled,
     dif_toggle_t locked);
 
+/**
+ * Configures the crash dump trigger for an alert class in the alert
+ * handler.
+ *
+ * @param alert_handler An alert handler handle.
+ * @param alert_class The class to be configured.
+ * @param crashdump_phase The crash dump trigger phase.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_alert_handler_crash_dump_trigger_set(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class,
+    dif_alert_handler_class_state_t crashdump_phase);
+
 /**
  * Configures the ping timer in the alert handler.
  *
@@ -678,6 +693,19 @@ dif_result_t dif_alert_handler_get_escalation_counter(
     const dif_alert_handler_t *alert_handler,
     dif_alert_handler_class_t alert_class, uint32_t *cycles);
 
+/**
+ * Checks whether this class is enabled.
+ *
+ * @param alert_handler An alert handler handle.
+ * @param alert_class The class to check.
+ * @param[out] is_enabled Out-param for the enablement state.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_alert_handler_is_class_enabled(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class, bool *is_enabled);
+
 /**
  * Gets the current state of this class.
  *
@@ -694,6 +722,32 @@ dif_result_t dif_alert_handler_get_class_state(
     dif_alert_handler_class_t alert_class,
     dif_alert_handler_class_state_t *state);
 
+/**
+ * Check whether an alert is currently enabled.
+ *
+ * @param alert_handler An alert handler handle.
+ * @param alert The alert to check enablement for.
+ * @param[out] is_enabled Out-param for the enabled state.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_alert_handler_alert_is_enabled(
+    const dif_alert_handler_t *alert_handler, dif_alert_handler_alert_t alert,
+    dif_toggle_t *is_enabled);
+
+/**
+ * Check whether an alert is currently enabled.
+ *
+ * @param alert_handler An alert handler handle.
+ * @param alert The alert to set enablement for.
+ * @param[out] enabled The enablement state to set.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_alert_handler_alert_set_enabled(
+    const dif_alert_handler_t *alert_handler, dif_alert_handler_alert_t alert,
+    dif_toggle_t enabled);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/lib/dif/dif_clkmgr.c b/sw/device/lib/dif/dif_clkmgr.c
index 1a9ee87fb9bd9..ca8cdcf2cbbb0 100644
--- a/sw/device/lib/dif/dif_clkmgr.c
+++ b/sw/device/lib/dif/dif_clkmgr.c
@@ -42,6 +42,35 @@ static bool clkmgr_measure_ctrl_regwen(const dif_clkmgr_t *clkmgr) {
                              CLKMGR_MEASURE_CTRL_REGWEN_EN_BIT);
 }
 
+/**
+ * Checks if the jitter enable register is locked.
+ *
+ * Jitter enable register is locked by CLKMGR_JITTER_REGWEN.
+ */
+OT_WARN_UNUSED_RESULT
+static bool jitter_enable_register_is_locked(const dif_clkmgr_t *clkmgr) {
+  // Jitter enable register is locked when `CLKMGR_JITTER_REGWEN_EN_BIT` bit
+  // is 0.
+  return !bitfield_bit32_read(
+      mmio_region_read32(clkmgr->base_addr, CLKMGR_JITTER_REGWEN_REG_OFFSET),
+      CLKMGR_JITTER_REGWEN_EN_BIT);
+}
+
+/**
+ * Checks if the external clock control register is locked.
+ *
+ * External clock control register is locked by CLKMGR_EXTCLK_CTRL_REGWEN.
+ */
+OT_WARN_UNUSED_RESULT
+static bool extclk_control_register_is_locked(const dif_clkmgr_t *clkmgr) {
+  // External clock control register is locked when
+  // `CLKMGR_EXTCLK_CTRL_REGWEN_EN_BIT` bit is 0.
+  return !bitfield_bit32_read(
+      mmio_region_read32(clkmgr->base_addr,
+                         CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET),
+      CLKMGR_EXTCLK_CTRL_REGWEN_EN_BIT);
+}
+
 dif_result_t dif_clkmgr_external_clock_is_settled(const dif_clkmgr_t *clkmgr,
                                                   bool *status) {
   if (clkmgr == NULL || status == NULL) {
@@ -56,6 +85,25 @@ dif_result_t dif_clkmgr_external_clock_is_settled(const dif_clkmgr_t *clkmgr,
   return kDifOk;
 }
 
+dif_result_t dif_clkmgr_jitter_enable_is_locked(const dif_clkmgr_t *clkmgr,
+                                                bool *is_locked) {
+  if (clkmgr == NULL || is_locked == NULL) {
+    return kDifBadArg;
+  }
+
+  *is_locked = jitter_enable_register_is_locked(clkmgr);
+
+  return kDifOk;
+}
+
+dif_result_t dif_clkmgr_lock_jitter_enable(const dif_clkmgr_t *clkmgr) {
+  if (clkmgr == NULL) {
+    return kDifBadArg;
+  }
+  mmio_region_write32(clkmgr->base_addr, CLKMGR_JITTER_REGWEN_REG_OFFSET, 0);
+  return kDifOk;
+}
+
 dif_result_t dif_clkmgr_jitter_get_enabled(const dif_clkmgr_t *clkmgr,
                                            dif_toggle_t *state) {
   if (clkmgr == NULL || state == NULL) {
@@ -66,30 +114,19 @@ dif_result_t dif_clkmgr_jitter_get_enabled(const dif_clkmgr_t *clkmgr,
       mmio_region_read32(clkmgr->base_addr, CLKMGR_JITTER_ENABLE_REG_OFFSET);
   // The documentation states that kMultiBitBool4False disables the jittery
   // clock and all other values enable the jittery clock.
-  *state = clk_jitter_val != kMultiBitBool4False;
+  *state = clk_jitter_val != kMultiBitBool4False ? kDifToggleEnabled
+                                                 : kDifToggleDisabled;
 
   return kDifOk;
 }
 
-dif_result_t dif_clkmgr_jitter_set_enabled(const dif_clkmgr_t *clkmgr,
-                                           dif_toggle_t new_state) {
-  multi_bit_bool_t new_jitter_enable_val;
+dif_result_t dif_clkmgr_jitter_set_enabled(const dif_clkmgr_t *clkmgr) {
   if (clkmgr == NULL) {
     return kDifBadArg;
   }
-
-  switch (new_state) {
-    case kDifToggleEnabled:
-      new_jitter_enable_val = kMultiBitBool4True;
-      break;
-    case kDifToggleDisabled:
-      new_jitter_enable_val = kMultiBitBool4False;
-      break;
-    default:
-      return kDifBadArg;
-  }
+  // Any write sets jitter enable to kMultiBitBool4True.
   mmio_region_write32(clkmgr->base_addr, CLKMGR_JITTER_ENABLE_REG_OFFSET,
-                      new_jitter_enable_val);
+                      kMultiBitBool4True);
   return kDifOk;
 }
 
@@ -172,6 +209,27 @@ dif_result_t dif_clkmgr_hintable_clock_get_hint(
   return kDifOk;
 }
 
+dif_result_t dif_clkmgr_external_clock_control_is_locked(
+    const dif_clkmgr_t *clkmgr, bool *is_locked) {
+  if (clkmgr == NULL || is_locked == NULL) {
+    return kDifBadArg;
+  }
+
+  *is_locked = extclk_control_register_is_locked(clkmgr);
+
+  return kDifOk;
+}
+
+dif_result_t dif_clkmgr_lock_external_clock_control(
+    const dif_clkmgr_t *clkmgr) {
+  if (clkmgr == NULL) {
+    return kDifBadArg;
+  }
+  mmio_region_write32(clkmgr->base_addr, CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET,
+                      0);
+  return kDifOk;
+}
+
 dif_result_t dif_clkmgr_external_clock_set_enabled(const dif_clkmgr_t *clkmgr,
                                                    bool is_low_speed) {
   uint32_t extclk_ctrl_reg = 0;
@@ -180,6 +238,10 @@ dif_result_t dif_clkmgr_external_clock_set_enabled(const dif_clkmgr_t *clkmgr,
     return kDifBadArg;
   }
 
+  if (extclk_control_register_is_locked(clkmgr)) {
+    return kDifLocked;
+  }
+
   extclk_ctrl_reg = bitfield_field32_write(
       extclk_ctrl_reg, CLKMGR_EXTCLK_CTRL_SEL_FIELD, kMultiBitBool4True);
   extclk_ctrl_reg = bitfield_field32_write(
@@ -198,6 +260,10 @@ dif_result_t dif_clkmgr_external_clock_set_disabled(
     return kDifBadArg;
   }
 
+  if (extclk_control_register_is_locked(clkmgr)) {
+    return kDifLocked;
+  }
+
   extclk_ctrl_reg = bitfield_field32_write(
       extclk_ctrl_reg, CLKMGR_EXTCLK_CTRL_SEL_FIELD, kMultiBitBool4False);
   // This value is irrelevant when the external clock is disabled.
diff --git a/sw/device/lib/dif/dif_clkmgr.h b/sw/device/lib/dif/dif_clkmgr.h
index 07c3684b6e14c..b5ddcee3065d7 100644
--- a/sw/device/lib/dif/dif_clkmgr.h
+++ b/sw/device/lib/dif/dif_clkmgr.h
@@ -139,6 +139,24 @@ typedef enum dif_clkmgr_fatal_err_type {
  */
 typedef uint32_t dif_clkmgr_fatal_err_codes_t;
 
+/**
+ * Check if jitter enable is locked.
+ * @param clkmgr Clock Manager Handle.
+ * @param[out] is_locked whether jitter is locked or not.
+ * @returns The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_clkmgr_jitter_enable_is_locked(const dif_clkmgr_t *clkmgr,
+                                                bool *is_locked);
+
+/**
+ * Lock jitter enable.
+ * @param clkmgr Clock Manager Handle.
+ * @returns The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_clkmgr_lock_jitter_enable(const dif_clkmgr_t *clkmgr);
+
 /**
  * Check if jitter is Enabled.
  * @param clkmgr Clock Manager Handle.
@@ -150,14 +168,12 @@ dif_result_t dif_clkmgr_jitter_get_enabled(const dif_clkmgr_t *clkmgr,
                                            dif_toggle_t *state);
 
 /**
- * Enable of Disable jitter.
+ * Enable jitter.
  * @param clkmgr Clock Manager Handle.
- * @param new_state whether to enable or disable jitter.
  * @returns The result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-dif_result_t dif_clkmgr_jitter_set_enabled(const dif_clkmgr_t *clkmgr,
-                                           dif_toggle_t new_state);
+dif_result_t dif_clkmgr_jitter_set_enabled(const dif_clkmgr_t *clkmgr);
 
 /**
  * Check if a Gateable Clock is Enabled or Disabled.
@@ -247,6 +263,24 @@ dif_result_t dif_clkmgr_hintable_clock_get_hint(
     const dif_clkmgr_t *clkmgr, dif_clkmgr_hintable_clock_t clock,
     dif_toggle_t *state);
 
+/**
+ * Check if external clock control is locked.
+ * @param clkmgr Clock Manager Handle.
+ * @param[out] is_locked whether external clock control is locked or not.
+ * @returns The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_clkmgr_external_clock_control_is_locked(
+    const dif_clkmgr_t *clkmgr, bool *is_locked);
+
+/**
+ * Lock external clock control.
+ * @param clkmgr Clock Manager Handle.
+ * @returns The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_clkmgr_lock_external_clock_control(const dif_clkmgr_t *clkmgr);
+
 /**
  * Enable chip to use the external clock.
  *
diff --git a/sw/device/lib/dif/dif_clkmgr_unittest.cc b/sw/device/lib/dif/dif_clkmgr_unittest.cc
index f404d1a060dca..bd266c574c2fb 100644
--- a/sw/device/lib/dif/dif_clkmgr_unittest.cc
+++ b/sw/device/lib/dif/dif_clkmgr_unittest.cc
@@ -27,23 +27,48 @@ class ClkMgrTest : public Test, public MmioTest {
   dif_clkmgr_t clkmgr_ = {.base_addr = dev().region()};
 };
 
-class JitterEnableTest : public ClkMgrTest {};
+class JitterRegwenTest : public ClkMgrTest {};
 
-// SetEnabled uses EXPECT_WRITE32 instead of EXPECT_MASK32 because
-// dif_clkmgr_jitter_set_enabled doesn't perform a read, just a write.
-TEST_F(JitterEnableTest, SetEnabled) {
-  // Disable jitter.
-  EXPECT_WRITE32(CLKMGR_JITTER_ENABLE_REG_OFFSET, kMultiBitBool4False);
-  EXPECT_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr_, kDifToggleDisabled));
+TEST_F(JitterRegwenTest, GetLocked) {
+  // Get regwen locked
+  {
+    bool locked = false;
+    EXPECT_READ32(CLKMGR_JITTER_REGWEN_REG_OFFSET, 0);
+    EXPECT_DIF_OK(dif_clkmgr_jitter_enable_is_locked(&clkmgr_, &locked));
+    EXPECT_EQ(locked, true);
+  }
+  // Get regwen unlocked
+  {
+    bool locked = true;
+    EXPECT_READ32(CLKMGR_JITTER_REGWEN_REG_OFFSET, 1);
+    EXPECT_DIF_OK(dif_clkmgr_jitter_enable_is_locked(&clkmgr_, &locked));
+    EXPECT_EQ(locked, false);
+  }
+}
 
-  // Enable jitter.
-  EXPECT_WRITE32(CLKMGR_JITTER_ENABLE_REG_OFFSET, kMultiBitBool4True);
-  EXPECT_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr_, kDifToggleEnabled));
+TEST_F(JitterRegwenTest, GetLockedError) {
+  bool locked;
+  EXPECT_DIF_BADARG(dif_clkmgr_jitter_enable_is_locked(nullptr, nullptr));
+  EXPECT_DIF_BADARG(dif_clkmgr_jitter_enable_is_locked(nullptr, &locked));
+  EXPECT_DIF_BADARG(dif_clkmgr_jitter_enable_is_locked(&clkmgr_, nullptr));
 }
 
-TEST_F(JitterEnableTest, SetEnabledError) {
-  // Null handle.
-  EXPECT_DIF_BADARG(dif_clkmgr_jitter_set_enabled(nullptr, kDifToggleEnabled));
+TEST_F(JitterRegwenTest, SetLocked) {
+  EXPECT_WRITE32(CLKMGR_JITTER_REGWEN_REG_OFFSET, 0);
+  EXPECT_DIF_OK(dif_clkmgr_lock_jitter_enable(&clkmgr_));
+  // There is no support for unlock in the hardware.
+}
+
+TEST_F(JitterRegwenTest, SetLockedError) {
+  EXPECT_DIF_BADARG(dif_clkmgr_lock_jitter_enable(nullptr));
+}
+
+class JitterEnableTest : public ClkMgrTest {};
+
+TEST_F(JitterEnableTest, SetEnabled) {
+  // Enable jitter regardless of the current state will enable it.
+  EXPECT_WRITE32(CLKMGR_JITTER_ENABLE_REG_OFFSET, kMultiBitBool4True);
+  EXPECT_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr_));
 }
 
 TEST_F(JitterEnableTest, GetEnabled) {
@@ -256,6 +281,47 @@ TEST_F(HintableClockTest, GetEnabledError) {
       &clkmgr_, CLKMGR_PARAM_NUM_HINTABLE_CLOCKS, &state));
 }
 
+class ExternalClkRegwenTest : public ClkMgrTest {};
+
+TEST_F(ExternalClkRegwenTest, GetLocked) {
+  // Get regwen locked
+  {
+    bool locked = false;
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 0);
+    EXPECT_DIF_OK(
+        dif_clkmgr_external_clock_control_is_locked(&clkmgr_, &locked));
+    EXPECT_EQ(locked, true);
+  }
+  // Get regwen unlocked
+  {
+    bool locked = true;
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 1);
+    EXPECT_DIF_OK(
+        dif_clkmgr_external_clock_control_is_locked(&clkmgr_, &locked));
+    EXPECT_EQ(locked, false);
+  }
+}
+
+TEST_F(ExternalClkRegwenTest, GetLockedError) {
+  bool locked;
+  EXPECT_DIF_BADARG(
+      dif_clkmgr_external_clock_control_is_locked(nullptr, nullptr));
+  EXPECT_DIF_BADARG(
+      dif_clkmgr_external_clock_control_is_locked(nullptr, &locked));
+  EXPECT_DIF_BADARG(
+      dif_clkmgr_external_clock_control_is_locked(&clkmgr_, nullptr));
+}
+
+TEST_F(ExternalClkRegwenTest, SetLocked) {
+  EXPECT_WRITE32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 0);
+  EXPECT_DIF_OK(dif_clkmgr_lock_external_clock_control(&clkmgr_));
+  // There is no support for unlock in the hardware.
+}
+
+TEST_F(ExternalClkRegwenTest, SetLockedError) {
+  EXPECT_DIF_BADARG(dif_clkmgr_lock_external_clock_control(nullptr));
+}
+
 class ExternalClkTest : public ClkMgrTest {};
 
 TEST_F(ExternalClkTest, EnableError) {
@@ -277,22 +343,43 @@ TEST_F(ExternalClkTest, Enable) {
        .offset = CLKMGR_EXTCLK_CTRL_HI_SPEED_SEL_OFFSET,               \
        .value = low_speed_ ? kMultiBitBool4False : kMultiBitBool4True, \
    }}
-  {  // low speed
+  {  // low speed with control unlocked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 1);
     EXPECT_WRITE32(CLKMGR_EXTCLK_CTRL_REG_OFFSET,
                    EXTCLK_CTRL_REG_VALUE(true, true));
     EXPECT_DIF_OK(dif_clkmgr_external_clock_set_enabled(&clkmgr_, true));
   }
-  {  // high speed
+  {  // high speed with control unlocked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 1);
     EXPECT_WRITE32(CLKMGR_EXTCLK_CTRL_REG_OFFSET,
                    EXTCLK_CTRL_REG_VALUE(true, false));
     EXPECT_DIF_OK(dif_clkmgr_external_clock_set_enabled(&clkmgr_, false));
   }
+  {
+    // low speed with control locked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 0);
+    EXPECT_DIF_LOCKED(dif_clkmgr_external_clock_set_enabled(&clkmgr_, true));
+  }
+  {
+    // high speed with control locked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 0);
+    EXPECT_DIF_LOCKED(dif_clkmgr_external_clock_set_enabled(&clkmgr_, false));
+  }
 }
 
 TEST_F(ExternalClkTest, Disable) {
-  EXPECT_WRITE32(CLKMGR_EXTCLK_CTRL_REG_OFFSET,
-                 EXTCLK_CTRL_REG_VALUE(false, false));
-  EXPECT_DIF_OK(dif_clkmgr_external_clock_set_disabled(&clkmgr_));
+  {
+    // disable with control unlocked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 1);
+    EXPECT_WRITE32(CLKMGR_EXTCLK_CTRL_REG_OFFSET,
+                   EXTCLK_CTRL_REG_VALUE(false, false));
+    EXPECT_DIF_OK(dif_clkmgr_external_clock_set_disabled(&clkmgr_));
+  }
+  {
+    // disable with control locked
+    EXPECT_READ32(CLKMGR_EXTCLK_CTRL_REGWEN_REG_OFFSET, 0);
+    EXPECT_DIF_LOCKED(dif_clkmgr_external_clock_set_disabled(&clkmgr_));
+  }
 }
 #undef EXTCLK_CTRL_REG_VALUE
 
diff --git a/sw/device/lib/dif/dif_keymgr.c b/sw/device/lib/dif/dif_keymgr.c
index 4dd9e73c539a3..d117492c6d0c3 100644
--- a/sw/device/lib/dif/dif_keymgr.c
+++ b/sw/device/lib/dif/dif_keymgr.c
@@ -222,6 +222,13 @@ typedef struct start_operation_params {
    * Operation to start.
    */
   uint32_t op;
+  /**
+   * Compound Device Identifier type (sealing or attestation).
+   *
+   * Only relevant for the creation of identities, software and sideload keys,
+   * otherwise the key manager operations are identical for both types.
+   */
+  dif_keymgr_cdi_type_t cdi_type;
 } start_operation_params_t;
 
 /**
@@ -233,6 +240,11 @@ static void start_operation(const dif_keymgr_t *keymgr,
       0, KEYMGR_CONTROL_SHADOWED_DEST_SEL_FIELD, params.dest);
   reg_control = bitfield_field32_write(
       reg_control, KEYMGR_CONTROL_SHADOWED_OPERATION_FIELD, params.op);
+  reg_control = bitfield_field32_write(
+      reg_control,
+      (bitfield_field32_t){.mask = 0x1u,
+                           .index = KEYMGR_CONTROL_SHADOWED_CDI_SEL_BIT},
+      params.cdi_type);
   mmio_region_write32_shadowed(keymgr->base_addr,
                                KEYMGR_CONTROL_SHADOWED_REG_OFFSET, reg_control);
   mmio_region_write32(keymgr->base_addr, KEYMGR_START_REG_OFFSET,
@@ -461,7 +473,8 @@ dif_result_t dif_keymgr_get_state(const dif_keymgr_t *keymgr,
   }
 }
 
-dif_result_t dif_keymgr_generate_identity_seed(const dif_keymgr_t *keymgr) {
+dif_result_t dif_keymgr_generate_identity_seed(
+    const dif_keymgr_t *keymgr, dif_keymgr_identity_seed_params_t params) {
   if (keymgr == NULL) {
     return kDifBadArg;
   }
@@ -474,7 +487,7 @@ dif_result_t dif_keymgr_generate_identity_seed(const dif_keymgr_t *keymgr) {
                   (start_operation_params_t){
                       .dest = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
                       .op = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_ID,
-                  });
+                      .cdi_type = params.cdi_type});
 
   return kDifOk;
 }
@@ -491,25 +504,25 @@ dif_result_t dif_keymgr_generate_versioned_key(
       hw_op_params = (start_operation_params_t){
           .dest = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
           .op = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_SW_OUTPUT,
-      };
+          .cdi_type = params.cdi_type};
       break;
     case kDifKeymgrVersionedKeyDestAes:
       hw_op_params = (start_operation_params_t){
           .dest = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_AES,
           .op = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
-      };
+          .cdi_type = params.cdi_type};
       break;
     case kDifKeymgrVersionedKeyDestKmac:
       hw_op_params = (start_operation_params_t){
           .dest = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC,
           .op = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
-      };
+          .cdi_type = params.cdi_type};
       break;
     case kDifKeymgrVersionedKeyDestOtbn:
       hw_op_params = (start_operation_params_t){
           .dest = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_OTBN,
           .op = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
-      };
+          .cdi_type = params.cdi_type};
       break;
     default:
       return kDifBadArg;
diff --git a/sw/device/lib/dif/dif_keymgr.h b/sw/device/lib/dif/dif_keymgr.h
index f3cf7d610591c..2e68e1b75191f 100644
--- a/sw/device/lib/dif/dif_keymgr.h
+++ b/sw/device/lib/dif/dif_keymgr.h
@@ -17,6 +17,7 @@
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_base.h"
 
+#include "keymgr_regs.h"
 #include "sw/device/lib/dif/autogen/dif_keymgr_autogen.h"
 
 #ifdef __cplusplus
@@ -151,6 +152,33 @@ typedef enum dif_keymgr_state {
   kDifKeymgrStateInvalid,
 } dif_keymgr_state_t;
 
+/**
+ * Compound Device Identifier type.
+ *
+ * The key manager supports the DICE open profile consisting of two Compound
+ * Device Identifiers (CDI):
+ *
+ *   - Sealing
+ *   - Attestation
+ *
+ * In every operational state of the key manager, it is possible to derive
+ * either sealing or attestation identifiers, software or hardware keys by
+ * setting the `CDI_SEL` bit in the `CONTROL_SHADOWED` register.
+ */
+typedef enum dif_keymgr_cdi_type {
+  /**
+   * Sealing CDI.
+   *
+   * This is the default configuration, corresponding to an unset bit.
+   */
+  kDifKeymgrSealingCdi = KEYMGR_CONTROL_SHADOWED_CDI_SEL_VALUE_SEALING_CDI,
+  /**
+   * Attestation CDI.
+   */
+  kDifKeymgrAttestationCdi =
+      KEYMGR_CONTROL_SHADOWED_CDI_SEL_VALUE_ATTESTATION_CDI
+} dif_keymgr_cdi_type_t;
+
 /**
  * Configures key manager with runtime information.
  *
@@ -334,6 +362,16 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_keymgr_get_state(const dif_keymgr_t *keymgr,
                                   dif_keymgr_state_t *state);
 
+/**
+ * Parameters for generating an identity seed.
+ */
+typedef struct dif_keymgr_identity_seed_params {
+  /**
+   * Compound Device Identifier type (sealing or attestation).
+   */
+  dif_keymgr_cdi_type_t cdi_type;
+} dif_keymgr_identity_seed_params_t;
+
 /**
  * Generates an identity seed.
  *
@@ -346,10 +384,12 @@ dif_result_t dif_keymgr_get_state(const dif_keymgr_t *keymgr,
  * KDF.
  *
  * @param keymgr A key manager handle.
+ * @param params Identity seed generation params.
  * @return The result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-dif_result_t dif_keymgr_generate_identity_seed(const dif_keymgr_t *keymgr);
+dif_result_t dif_keymgr_generate_identity_seed(
+    const dif_keymgr_t *keymgr, dif_keymgr_identity_seed_params_t params);
 
 /**
  * Destination of a versioned key generation operation.
@@ -405,6 +445,10 @@ typedef struct dif_keymgr_versioned_key_params {
    * Version value to use for key generation.
    */
   uint32_t version;
+  /**
+   * Coumpund Device Identifier type (sealing or attestation).
+   */
+  dif_keymgr_cdi_type_t cdi_type;
 } dif_keymgr_versioned_key_params_t;
 
 /**
diff --git a/sw/device/lib/dif/dif_keymgr_unittest.cc b/sw/device/lib/dif/dif_keymgr_unittest.cc
index 14b0c4235c09e..a9a8fc53bc661 100644
--- a/sw/device/lib/dif/dif_keymgr_unittest.cc
+++ b/sw/device/lib/dif/dif_keymgr_unittest.cc
@@ -173,6 +173,7 @@ class DifKeymgrInitialized : public DifKeymgrTest {
   struct OperationStartParams {
     uint32_t dest_sel;
     uint32_t operation;
+    dif_keymgr_cdi_type_t cdi_type;
   };
 
   /**
@@ -188,6 +189,10 @@ class DifKeymgrInitialized : public DifKeymgrTest {
          {
              .offset = KEYMGR_CONTROL_SHADOWED_OPERATION_OFFSET,
              .value = params.operation,
+         },
+         {
+             .offset = KEYMGR_CONTROL_SHADOWED_CDI_SEL_BIT,
+             .value = params.cdi_type,
          }});
 
     EXPECT_WRITE32(KEYMGR_START_REG_OFFSET, {{
@@ -607,29 +612,43 @@ TEST_F(GetStateTest, UnexpectedState) {
 class GenerateIdentityTest : public DifKeymgrInitialized {};
 
 TEST_F(GenerateIdentityTest, BadArgs) {
-  EXPECT_DIF_BADARG(dif_keymgr_generate_identity_seed(nullptr));
+  EXPECT_DIF_BADARG(dif_keymgr_generate_identity_seed(nullptr, {}));
 }
 
 TEST_F(GenerateIdentityTest, LockedBusy) {
   ExpectBusy();
 
-  EXPECT_EQ(dif_keymgr_generate_identity_seed(&keymgr_), kDifLocked);
+  EXPECT_EQ(dif_keymgr_generate_identity_seed(&keymgr_, {}), kDifLocked);
 }
 
 TEST_F(GenerateIdentityTest, LockedConfig) {
   ExpectLockedConfig();
 
-  EXPECT_EQ(dif_keymgr_generate_identity_seed(&keymgr_), kDifLocked);
+  EXPECT_EQ(dif_keymgr_generate_identity_seed(&keymgr_, {}), kDifLocked);
 }
 
-TEST_F(GenerateIdentityTest, Generate) {
+TEST_F(GenerateIdentityTest, GenerateSealing) {
   ExpectIdle();
   ExpectOperationStart({
       .dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
       .operation = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_ID,
+      .cdi_type = kDifKeymgrSealingCdi,
   });
 
-  EXPECT_DIF_OK(dif_keymgr_generate_identity_seed(&keymgr_));
+  EXPECT_DIF_OK(dif_keymgr_generate_identity_seed(
+      &keymgr_, {.cdi_type = kDifKeymgrSealingCdi}));
+}
+
+TEST_F(GenerateIdentityTest, GenerateAttestation) {
+  ExpectIdle();
+  ExpectOperationStart({
+      .dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
+      .operation = KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_ID,
+      .cdi_type = kDifKeymgrAttestationCdi,
+  });
+
+  EXPECT_DIF_OK(dif_keymgr_generate_identity_seed(
+      &keymgr_, {.cdi_type = kDifKeymgrAttestationCdi}));
 }
 
 class GenerateVersionedKeyTest : public DifKeymgrInitialized {};
@@ -667,6 +686,10 @@ struct GenerateVersionedKeyTestCase {
    * Expected OPERATION values to be written to the CONTROL register.
    */
   uint32_t exp_operation;
+  /**
+   * Expected CDI_SEL value to be written to the CONTROL register.
+   */
+  dif_keymgr_cdi_type_t cdi_type;
 };
 
 class GenerateVersionedKey
@@ -702,18 +725,42 @@ INSTANTIATE_TEST_SUITE_P(
             .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
             .exp_operation =
                 KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_SW_OUTPUT,
+            .cdi_type = kDifKeymgrSealingCdi,
+        },
+        GenerateVersionedKeyTestCase{
+            .dest = kDifKeymgrVersionedKeyDestAes,
+            .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_AES,
+            .exp_operation =
+                KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
+            .cdi_type = kDifKeymgrSealingCdi,
+        },
+        GenerateVersionedKeyTestCase{
+            .dest = kDifKeymgrVersionedKeyDestKmac,
+            .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC,
+            .exp_operation =
+                KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
+            .cdi_type = kDifKeymgrSealingCdi,
+        },
+        GenerateVersionedKeyTestCase{
+            .dest = kDifKeymgrVersionedKeyDestSw,
+            .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE,
+            .exp_operation =
+                KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_SW_OUTPUT,
+            .cdi_type = kDifKeymgrAttestationCdi,
         },
         GenerateVersionedKeyTestCase{
             .dest = kDifKeymgrVersionedKeyDestAes,
             .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_AES,
             .exp_operation =
                 KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
+            .cdi_type = kDifKeymgrAttestationCdi,
         },
         GenerateVersionedKeyTestCase{
             .dest = kDifKeymgrVersionedKeyDestKmac,
             .exp_dest_sel = KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC,
             .exp_operation =
                 KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT,
+            .cdi_type = kDifKeymgrAttestationCdi,
         }));
 
 class SideloadClearTest : public DifKeymgrInitialized {};
diff --git a/sw/device/lib/dif/dif_otbn.c b/sw/device/lib/dif/dif_otbn.c
index 8e1f07071ef6b..c6da4f873019e 100644
--- a/sw/device/lib/dif/dif_otbn.c
+++ b/sw/device/lib/dif/dif_otbn.c
@@ -123,6 +123,27 @@ dif_result_t dif_otbn_get_insn_cnt(const dif_otbn_t *otbn, uint32_t *insn_cnt) {
   return kDifOk;
 }
 
+dif_result_t dif_otbn_get_load_checksum(const dif_otbn_t *otbn,
+                                        uint32_t *checksum) {
+  if (otbn == NULL || checksum == NULL) {
+    return kDifBadArg;
+  }
+
+  *checksum =
+      mmio_region_read32(otbn->base_addr, OTBN_LOAD_CHECKSUM_REG_OFFSET);
+  return kDifOk;
+}
+
+dif_result_t dif_otbn_clear_load_checksum(const dif_otbn_t *otbn) {
+  if (otbn == NULL) {
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(otbn->base_addr, OTBN_LOAD_CHECKSUM_REG_OFFSET, 0);
+
+  return kDifOk;
+}
+
 dif_result_t dif_otbn_imem_write(const dif_otbn_t *otbn, uint32_t offset_bytes,
                                  const void *src, size_t len_bytes) {
   if (otbn == NULL || src == NULL ||
diff --git a/sw/device/lib/dif/dif_otbn.h b/sw/device/lib/dif/dif_otbn.h
index 35a8c3a1c8192..1cf02bbccf961 100644
--- a/sw/device/lib/dif/dif_otbn.h
+++ b/sw/device/lib/dif/dif_otbn.h
@@ -140,6 +140,30 @@ dif_result_t dif_otbn_get_err_bits(const dif_otbn_t *otbn,
 OT_WARN_UNUSED_RESULT
 dif_result_t dif_otbn_get_insn_cnt(const dif_otbn_t *otbn, uint32_t *insn_cnt);
 
+/**
+ * Gets the content of the load checksum register.
+ *
+ * Gets the 32-bit CRC checksum of data written to memory.
+ *
+ * @param otbn OTBN instance.
+ * @param[out] insn_cnt The number of instructions executed by OTBN.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_otbn_get_load_checksum(const dif_otbn_t *otbn,
+                                        uint32_t *insn_cnt);
+
+/**
+ * Clears the load checksum register.
+ *
+ * Writes 0 to the load checksum register to clear it.
+ *
+ * @param otbn OTBN instance.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_otbn_clear_load_checksum(const dif_otbn_t *otbn);
+
 /**
  * Write an OTBN application into its instruction memory (IMEM).
  *
diff --git a/sw/device/lib/dif/dif_otp_ctrl.h b/sw/device/lib/dif/dif_otp_ctrl.h
index 5ab9201cded70..51b7b2969b36e 100644
--- a/sw/device/lib/dif/dif_otp_ctrl.h
+++ b/sw/device/lib/dif/dif_otp_ctrl.h
@@ -43,8 +43,8 @@ typedef enum dif_otp_ctrl_partition {
   /**
    * Software configuration partition.
    *
-   * This is for device-specific calibration data. For example, clock,
-   * LDO, RNG.
+   * This is for device-specific calibration data, e.g, clock, LDO, RNG,
+   * and configuration settings set by the ROM.
    */
   kDifOtpCtrlPartitionCreatorSwCfg,
   /**
@@ -84,20 +84,13 @@ typedef enum dif_otp_ctrl_partition {
   /**
    * Hardware configuration 0 partition.
    *
-   * This contains
-   * - DEVICE_ID: Unique device identifier.
-   * - MANUF_STATE: Vector for capturing the manufacturing status.
+   * This contains a device identifier and manufacturing state.
    */
   kDifOtpCtrlPartitionHwCfg0,
   /**
    * Hardware configuration 1 partition.
    *
-   * This contains
-   * - EN_SRAM_IFETCH: Enable / disable execute from SRAM CSR switch.
-   * - EN_CSRNG_SW_APP_READ: This input efuse is used to enable access to the
-   * NIST internal state per instance.
-   * - DIS_RV_DM_LATE_DEBUG: Setting this to true bypasses the late debug
-   * enablement of RV_DM in the DEV life cycle state.
+   * This contains several hardware feature switches.
    */
   kDifOtpCtrlPartitionHwCfg1,
   /**
diff --git a/sw/device/lib/dif/dif_pattgen.c b/sw/device/lib/dif/dif_pattgen.c
index 71650f4e6d935..65ec6dc052727 100644
--- a/sw/device/lib/dif/dif_pattgen.c
+++ b/sw/device/lib/dif/dif_pattgen.c
@@ -21,6 +21,8 @@ dif_result_t dif_pattgen_configure_channel(
 
   bitfield_bit32_index_t enable_bit_idx;
   bitfield_bit32_index_t polarity_bit_idx;
+  bitfield_bit32_index_t inactive_level_pda_bit_idx;
+  bitfield_bit32_index_t inactive_level_pcl_bit_idx;
   ptrdiff_t clock_divisor_reg_offset;
   ptrdiff_t seed_lower_reg_offset;
   ptrdiff_t seed_upper_reg_offset;
@@ -31,6 +33,10 @@ dif_result_t dif_pattgen_configure_channel(
   case kDifPattgenChannel##channel_:                                        \
     enable_bit_idx = PATTGEN_CTRL_ENABLE_CH##channel_##_BIT;                \
     polarity_bit_idx = PATTGEN_CTRL_POLARITY_CH##channel_##_BIT;            \
+    inactive_level_pda_bit_idx =                                            \
+        PATTGEN_CTRL_INACTIVE_LEVEL_PDA_CH##channel_##_BIT;                 \
+    inactive_level_pcl_bit_idx =                                            \
+        PATTGEN_CTRL_INACTIVE_LEVEL_PCL_CH##channel_##_BIT;                 \
     clock_divisor_reg_offset = PATTGEN_PREDIV_CH##channel_##_REG_OFFSET;    \
     seed_lower_reg_offset = PATTGEN_DATA_CH##channel_##_0_REG_OFFSET;       \
     seed_upper_reg_offset = PATTGEN_DATA_CH##channel_##_1_REG_OFFSET;       \
@@ -53,8 +59,12 @@ dif_result_t dif_pattgen_configure_channel(
     return kDifError;
   }
 
-  // Set the polarity.
+  // Set the polarity and inactive levels.
   ctrl_reg = bitfield_bit32_write(ctrl_reg, polarity_bit_idx, config.polarity);
+  ctrl_reg = bitfield_bit32_write(ctrl_reg, inactive_level_pda_bit_idx,
+                                  config.inactive_level_pda);
+  ctrl_reg = bitfield_bit32_write(ctrl_reg, inactive_level_pcl_bit_idx,
+                                  config.inactive_level_pcl);
   mmio_region_write32(pattgen->base_addr, PATTGEN_CTRL_REG_OFFSET, ctrl_reg);
 
   // Set the clock divisor.
diff --git a/sw/device/lib/dif/dif_pattgen.h b/sw/device/lib/dif/dif_pattgen.h
index c0d13654de809..d05d1ffd25337 100644
--- a/sw/device/lib/dif/dif_pattgen.h
+++ b/sw/device/lib/dif/dif_pattgen.h
@@ -109,6 +109,22 @@ typedef struct dif_pattgen_channel_config {
    * Valid range: [1, 1024]
    */
   uint16_t num_pattern_repetitions;
+  /**
+   * Inactive level of the data signal.
+   *
+   * This is the level of the PDA output when the pattgen is not actively
+   * sending data bits (i.e., when pattgen is disabled or all data bits have
+   * been sent).
+   */
+  bool inactive_level_pda;
+  /**
+   * Inactive level of the clock signal.
+   *
+   * This is the level of the PCL output when the pattgen is not actively
+   * sending data bits (i.e., when pattgen is disabled or all data bits have
+   * been sent).
+   */
+  bool inactive_level_pcl;
 } dif_pattgen_channel_config_t;
 
 /**
diff --git a/sw/device/lib/dif/dif_pinmux.c b/sw/device/lib/dif/dif_pinmux.c
index cae7209ee68fc..3ce20bdb33031 100644
--- a/sw/device/lib/dif/dif_pinmux.c
+++ b/sw/device/lib/dif/dif_pinmux.c
@@ -304,6 +304,12 @@ dif_result_t dif_pinmux_pad_write_attrs(const dif_pinmux_t *pinmux,
   uint32_t read_value = mmio_region_read32(pinmux->base_addr, reg_offset);
   *attrs_out = dif_pinmux_reg_to_pad_attr(read_value);
 
+  // Not all pads implement all attributes and not all target platforms support
+  // all attribute values. The underlying hardware registers implement Write-Any
+  // Read-Legal (WARL) semantics. If the specified attribute values are not
+  // supported by the hardware, return `kDifError`. The caller then needs to
+  // decide on how to resolve the situation. Unsupported attribute values can be
+  // identified by comparing `attrs_in` to `attrs_out`.
   if (reg_value != read_value) {
     return kDifError;
   }
diff --git a/sw/device/lib/dif/dif_pinmux.h b/sw/device/lib/dif/dif_pinmux.h
index 2eae8afcf5ab2..4c1f960718e61 100644
--- a/sw/device/lib/dif/dif_pinmux.h
+++ b/sw/device/lib/dif/dif_pinmux.h
@@ -345,8 +345,13 @@ dif_result_t dif_pinmux_output_select(const dif_pinmux_t *pinmux,
  * Not all pads implement all attributes and some combinations cannot be
  * enabled together. This function returns a `kDifBadArg` error in case of
  * invalid `attrs_in`.
- * Conflicting attributes will be discarded by the hardware, and can be
- * identified by comparing `attrs_in` to `attrs_out`.
+ * Not all target platforms support all attribute values and the underlying
+ * hardware registers implement Write-Any Read-Legal (WARL) semantics. For
+ * example, the maximum supported slew rate and drive strength may vary between
+ * platforms. If the specified attribute values are valid but not supported by
+ * the hardware, this function returns `kDifError` and the caller needs to
+ * decide on how to resolve the situation. Unsupported or conflicting attribute
+ * values can be identified by comparing `attrs_in` to `attrs_out`.
  *
  * IMPORTANT:
  * See `dif_pinmux_pad_attr` for information on which attributes are compulsory
diff --git a/sw/device/lib/dif/dif_sensor_ctrl.c b/sw/device/lib/dif/dif_sensor_ctrl.c
index 57ccda81f1376..60437776e0224 100644
--- a/sw/device/lib/dif/dif_sensor_ctrl.c
+++ b/sw/device/lib/dif/dif_sensor_ctrl.c
@@ -18,8 +18,8 @@
  * as an argument.  This check is used in multiple places so use a helper
  * function.
  */
-static inline bool is_ast_event_invalid(dif_sensor_ctrl_event_idx_t event_idx) {
-  return event_idx > SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS;
+static inline bool is_ast_event_valid(dif_sensor_ctrl_event_idx_t event_idx) {
+  return event_idx < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS;
 }
 
 /**
@@ -46,8 +46,7 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_sensor_ctrl_get_ast_event_trigger(
     const dif_sensor_ctrl_t *sensor_ctrl, dif_sensor_ctrl_event_idx_t event_idx,
     dif_toggle_t *enable) {
-  if (sensor_ctrl == NULL || is_ast_event_invalid(event_idx) ||
-      enable == NULL) {
+  if (sensor_ctrl == NULL || !is_ast_event_valid(event_idx) || enable == NULL) {
     return kDifBadArg;
   };
 
@@ -62,7 +61,7 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_sensor_ctrl_set_ast_event_trigger(
     const dif_sensor_ctrl_t *sensor_ctrl, dif_sensor_ctrl_event_idx_t event_idx,
     dif_toggle_t enable) {
-  if (sensor_ctrl == NULL || is_ast_event_invalid(event_idx)) {
+  if (sensor_ctrl == NULL || !is_ast_event_valid(event_idx)) {
     return kDifBadArg;
   };
 
@@ -79,7 +78,7 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_sensor_ctrl_set_alert_en(const dif_sensor_ctrl_t *sensor_ctrl,
                                           dif_sensor_ctrl_event_idx_t event_idx,
                                           dif_toggle_t en) {
-  if (sensor_ctrl == NULL || is_ast_event_invalid(event_idx)) {
+  if (sensor_ctrl == NULL || !is_ast_event_valid(event_idx)) {
     return kDifBadArg;
   };
 
@@ -99,7 +98,7 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_sensor_ctrl_set_alert_fatal(
     const dif_sensor_ctrl_t *sensor_ctrl, dif_sensor_ctrl_event_idx_t event_idx,
     dif_toggle_t en_fatal) {
-  if (sensor_ctrl == NULL || is_ast_event_invalid(event_idx)) {
+  if (sensor_ctrl == NULL || !is_ast_event_valid(event_idx)) {
     return kDifBadArg;
   };
 
@@ -133,7 +132,7 @@ OT_WARN_UNUSED_RESULT
 dif_result_t dif_sensor_ctrl_clear_recov_event(
     const dif_sensor_ctrl_t *sensor_ctrl,
     dif_sensor_ctrl_event_idx_t event_idx) {
-  if (sensor_ctrl == NULL || is_ast_event_invalid(event_idx)) {
+  if (sensor_ctrl == NULL || !is_ast_event_valid(event_idx)) {
     return kDifBadArg;
   };
 
diff --git a/sw/device/lib/dif/dif_sensor_ctrl_unittest.cc b/sw/device/lib/dif/dif_sensor_ctrl_unittest.cc
index 33d0ca9d87538..c6a286b94b7f6 100644
--- a/sw/device/lib/dif/dif_sensor_ctrl_unittest.cc
+++ b/sw/device/lib/dif/dif_sensor_ctrl_unittest.cc
@@ -30,7 +30,7 @@ class SensorCtrlTest : public Test, public MmioTest {
 
 TEST_F(SensorCtrlTest, BadArgs) {
   uint32_t good_idx = 0;
-  uint32_t bad_idx = SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS + 1;
+  uint32_t bad_idx = SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS;
   dif_toggle_t toggle_arg{};
   dif_sensor_ctrl_events_t events_arg{};
   dif_sensor_ctrl_io_power_status_t power_arg{};
diff --git a/sw/device/lib/dif/dif_usbdev.c b/sw/device/lib/dif/dif_usbdev.c
index 6e28dd812eb01..7e46e358b5fbc 100644
--- a/sw/device/lib/dif/dif_usbdev.c
+++ b/sw/device/lib/dif/dif_usbdev.c
@@ -7,6 +7,7 @@
 #include <assert.h>
 
 #include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/memory.h"
 
 #include "usbdev_regs.h"  // Generated.
 
@@ -937,6 +938,8 @@ dif_result_t dif_usbdev_get_wake_status(const dif_usbdev_t *usbdev,
       bitfield_bit32_read(reg_val, USBDEV_WAKE_EVENTS_DISCONNECTED_BIT);
   status->bus_reset =
       bitfield_bit32_read(reg_val, USBDEV_WAKE_EVENTS_BUS_RESET_BIT);
+  status->bus_not_idle =
+      bitfield_bit32_read(reg_val, USBDEV_WAKE_EVENTS_BUS_NOT_IDLE_BIT);
   return kDifOk;
 }
 
@@ -1012,3 +1015,109 @@ dif_result_t dif_usbdev_set_phy_pins_state(
                       reg_val);
   return kDifOk;
 }
+
+dif_result_t dif_usbdev_buffer_raw_write(const dif_usbdev_t *usbdev, uint8_t id,
+                                         const uint8_t *src, size_t src_len) {
+  if (usbdev == NULL || src == NULL || misalignment32_of((uintptr_t)src) ||
+      src_len > USBDEV_BUFFER_ENTRY_SIZE_BYTES) {
+    return kDifBadArg;
+  }
+
+  // We're writing to the start of the buffer.
+  ptrdiff_t buffer_offset = (ptrdiff_t)get_buffer_addr(id, 0U);
+  const uint32_t *restrict ews = (uint32_t *)(src + (src_len & ~15u));
+  const uint32_t *restrict ws = (uint32_t *)src;
+
+  // Transfer blocks of 4 x 32-bit words at a time; use the mmio_ routines for
+  // compliance and to operate correctly with the DIF mocks, although this
+  // results in transfers taking 50% longer because of the additional addressing
+  // arithmetic and increased loop overheads.
+  while (ws < ews) {
+    mmio_region_write32(usbdev->base_addr, buffer_offset, ws[0]);
+    mmio_region_write32(usbdev->base_addr, buffer_offset + 4, ws[1]);
+    mmio_region_write32(usbdev->base_addr, buffer_offset + 8, ws[2]);
+    mmio_region_write32(usbdev->base_addr, buffer_offset + 12, ws[3]);
+    buffer_offset += 16;
+    ws += 4;
+  }
+  src_len &= 15u;
+
+  if (src_len) {
+    // Remaining whole words
+    ews = ws + (src_len >> 2);
+    while (ws < ews) {
+      mmio_region_write32(usbdev->base_addr, buffer_offset, *ws++);
+      buffer_offset += 4;
+    }
+    src_len &= 3u;
+    if (src_len) {
+      // Remaining individual bytes
+      const uint8_t *restrict bs = (uint8_t *)ws;
+      uint32_t d = bs[0];
+      if (src_len > 1) {
+        d |= ((uint32_t)bs[1] << 8);
+        if (src_len > 2) {
+          d |= ((uint32_t)bs[2] << 16);
+        }
+      }
+      // Note: we can only perform full 32-bit writes to the packet buffer but
+      // any additional byte(s) will be ignored. Attempting byte-level writes
+      // would raise exceptions.
+      mmio_region_write32(usbdev->base_addr, buffer_offset, d);
+    }
+  }
+
+  return kDifOk;
+}
+
+dif_result_t dif_usbdev_buffer_raw_read(const dif_usbdev_t *usbdev, uint8_t id,
+                                        uint8_t *dst, size_t dst_len) {
+  if (usbdev == NULL || dst == NULL || misalignment32_of((uintptr_t)dst) ||
+      dst_len > USBDEV_BUFFER_ENTRY_SIZE_BYTES) {
+    return kDifBadArg;
+  }
+
+  // We're reading from the start of the packet buffer.
+  ptrdiff_t buffer_offset = (ptrdiff_t)get_buffer_addr(id, 0U);
+  const uint32_t *restrict ewd = (uint32_t *)(dst + (dst_len & ~15u));
+  uint32_t *restrict wd = (uint32_t *)dst;
+
+  // Transfer blocks of 4 x 32-bit words at a time; use the mmio_ routines for
+  // compliance and to operate correctly with the DIF mocks, although this
+  // results in transfers taking 50% longer because of the additional addressing
+  // arithmetic and increased loop overheads.
+  while (wd < ewd) {
+    wd[0] = mmio_region_read32(usbdev->base_addr, buffer_offset);
+    wd[1] = mmio_region_read32(usbdev->base_addr, buffer_offset + 4);
+    wd[2] = mmio_region_read32(usbdev->base_addr, buffer_offset + 8);
+    wd[3] = mmio_region_read32(usbdev->base_addr, buffer_offset + 12);
+    buffer_offset += 16;
+    wd += 4;
+  }
+  dst_len &= 15u;
+
+  if (dst_len) {
+    // Remaining whole words
+    ewd = wd + (dst_len >> 2);
+    while (wd < ewd) {
+      *wd++ = mmio_region_read32(usbdev->base_addr, buffer_offset);
+      buffer_offset += 4;
+    }
+    dst_len &= 3u;
+    if (dst_len) {
+      // Remaining individual bytes
+      // Note: we can only perform full 32-bit reads from the packet buffer.
+      uint8_t *restrict bd = (uint8_t *)wd;
+      uint32_t d = mmio_region_read32(usbdev->base_addr, buffer_offset);
+      bd[0] = (uint8_t)d;
+      if (dst_len > 1) {
+        bd[1] = (uint8_t)(d >> 8);
+        if (dst_len > 2) {
+          bd[2] = (uint8_t)(d >> 16);
+        }
+      }
+    }
+  }
+
+  return kDifOk;
+}
diff --git a/sw/device/lib/dif/dif_usbdev.h b/sw/device/lib/dif/dif_usbdev.h
index 9bd81d86aa1b7..4325e33c2d500 100644
--- a/sw/device/lib/dif/dif_usbdev.h
+++ b/sw/device/lib/dif/dif_usbdev.h
@@ -823,6 +823,8 @@ typedef struct dif_usbdev_wake_status {
   bool disconnected;
   /** Whether the USB was reset while the AON wake module was active. */
   bool bus_reset;
+  /** Whether the USB became non-Idle whilst the AON wake module was active. */
+  bool bus_not_idle;
 } dif_usbdev_wake_status_t;
 
 /**
@@ -923,6 +925,36 @@ dif_result_t dif_usbdev_set_phy_pins_state(
     const dif_usbdev_t *usbdev, dif_toggle_t override_enable,
     dif_usbdev_phy_pins_drive_t overrides);
 
+/**
+ * Raw data transfer directly to the packet buffer memory. This is a faster
+ * implementation of the generic `mmio_memcpy_to_mmio32` that is specialized for
+ * the USB device and gives a significant performance improvement.
+ *
+ * @param usbdev A USB device.
+ * @param id Buffer number.
+ * @param src Source data.
+ * @param src_len Number of bytes to transfer.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_usbdev_buffer_raw_write(const dif_usbdev_t *usbdev, uint8_t id,
+                                         const uint8_t *src, size_t src_len);
+
+/**
+ * Raw data transfer directly from the packet buffer memory. This is a faster
+ * implementation of the generic `mmio_memcpy_from_mmio32` that is specialized
+ * for the USB device and gives a significant performance improvemenet.
+ *
+ * @param usbdev A USB device.
+ * @param id Buffer number.
+ * @param dst Destination buffer.
+ * @param dst_len Number of bytes to transfer.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_usbdev_buffer_raw_read(const dif_usbdev_t *usbdev, uint8_t id,
+                                        uint8_t *dst, size_t dst_len);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/lib/runtime/BUILD b/sw/device/lib/runtime/BUILD
index 91187207bfd8e..b370360658c2c 100644
--- a/sw/device/lib/runtime/BUILD
+++ b/sw/device/lib/runtime/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 load("//rules:cross_platform.bzl", "dual_cc_library", "dual_inputs")
 
 package(default_visibility = ["//visibility:public"])
@@ -92,7 +92,10 @@ cc_library(
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:gpio",
+        "//sw/device/lib/dif:spi_device",
         "//sw/device/lib/dif:uart",
+        "//sw/device/lib/runtime:hart",
     ],
 )
 
@@ -101,7 +104,7 @@ cc_test(
     srcs = ["print_unittest.cc"],
     deps = [
         ":print",
-        "@com_google_absl//absl/strings:str_format",
+        "@abseil-cpp//absl/strings:str_format",
         "@googletest//:gtest_main",
     ],
 )
diff --git a/sw/device/lib/runtime/log.h b/sw/device/lib/runtime/log.h
index 571cf4253ee9b..5606bfaaa7f00 100644
--- a/sw/device/lib/runtime/log.h
+++ b/sw/device/lib/runtime/log.h
@@ -98,6 +98,8 @@ void base_log_internal_core(const log_fields_t *log, ...);
  */
 void base_log_internal_dv(const log_fields_t *log, uint32_t nargs, ...);
 
+extern char _dv_log_offset[];
+
 /**
  * A macro that wraps the `OT_FAIL_IF_64_BIT` macro, providing the name
  * of the LOG macro for better error messages.
@@ -139,7 +141,7 @@ void base_log_internal_dv(const log_fields_t *log, uint32_t nargs, ...);
       __attribute__((section(".logs.fields")))                   \
       static const log_fields_t kLogFields =                     \
           LOG_MAKE_FIELDS_(severity, format, ##__VA_ARGS__);     \
-      base_log_internal_dv(&kLogFields,                          \
+      base_log_internal_dv((const log_fields_t*)((char*)&kLogFields + (uintptr_t)&_dv_log_offset), \
                            OT_VA_ARGS_COUNT(format, ##__VA_ARGS__), \
                            ##__VA_ARGS__); /* clang-format on */ \
     } else {                                                     \
diff --git a/sw/device/lib/runtime/print.c b/sw/device/lib/runtime/print.c
index 75f9fe7882407..425011d503fdf 100644
--- a/sw/device/lib/runtime/print.c
+++ b/sw/device/lib/runtime/print.c
@@ -12,7 +12,7 @@
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/hart.h"
 
 // This is declared as an enum to force the values to be
 // compile-time constants, but the type is otherwise not
@@ -52,6 +52,8 @@ static const char kUnknownSpec[15] = "%<unknown spec>";
 static const char kErrorTooWide[12] = "%<bad width>";
 
 static size_t base_dev_null(void *data, const char *buf, size_t len) {
+  OT_DISCARD(data);
+  OT_DISCARD(buf);
   return len;
 }
 static buffer_sink_t base_stdout = {
@@ -279,10 +281,10 @@ static size_t write_digits(buffer_sink_t out, uint32_t value, uint32_t width,
 
 static size_t write_status(buffer_sink_t out, status_t value, bool as_json) {
   // The module id is defined to be 3 chars long.
-  char mod[] = {'"', 0, 0, 0, '"', ','};
+  char mod[] = {0, 0, 0};
   int32_t arg;
   const char *start;
-  bool err = status_extract(value, &start, &arg, &mod[1]);
+  bool err = status_extract(value, &start, &arg, mod);
 
   // strlen of the status code.
   const char *end = start;
@@ -297,8 +299,15 @@ static size_t write_status(buffer_sink_t out, status_t value, bool as_json) {
   len += out.sink(out.data, ":", 1);
   if (err) {
     // All error codes include the module identifier.
-    len += out.sink(out.data, "[", 1);
-    len += out.sink(out.data, mod, sizeof(mod));
+    len += out.sink(out.data, "[\"", 2);
+    for (size_t i = 0; i < 3; i++) {
+      if (mod[i] == '\\') {
+        len += out.sink(out.data, "\\\\", 2);
+      } else {
+        len += out.sink(out.data, &mod[i], 1);
+      }
+    }
+    len += out.sink(out.data, "\",", 2);
     len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
     len += out.sink(out.data, "]", 1);
   } else {
diff --git a/sw/device/lib/runtime/print.h b/sw/device/lib/runtime/print.h
index 80f07442e5171..edbab27dd3a8c 100644
--- a/sw/device/lib/runtime/print.h
+++ b/sw/device/lib/runtime/print.h
@@ -27,6 +27,12 @@
  * slightly on machine word size.
  */
 
+/**
+ * Function pointer type for data sink.
+ * The function should return the number of bytes actually written.
+ */
+typedef size_t (*sink_func_ptr)(void *data, const char *buf, size_t len);
+
 /**
  * A buffer_sink_t represents a place to write bytes to, implemented as a
  * C-style "closure".
@@ -35,11 +41,10 @@
  * information, and a sink function, which takes the data pointer, a buffer, and
  * that buffer's length.
  *
- * The sink function should return the number of bytes actually written.
  */
 typedef struct buffer_sink {
   void *data;
-  size_t (*sink)(void *data, const char *buf, size_t len);
+  sink_func_ptr sink;
 } buffer_sink_t;
 
 /**
@@ -281,10 +286,15 @@ size_t base_fhexdump_with(buffer_sink_t out, base_hexdump_fmt_t fmt,
 void base_set_stdout(buffer_sink_t out);
 
 /**
- * Configures UART stdout for `base_print.h` to use.
+ * Configures a minimal stdout UART driver for `base_print.h` to use.
  *
  * Note that this function will save `uart` in a global variable, so the pointer
- * must have static storage duration.
+ * must have static storage duration. This driver uses
+ * `dif_uart_byte_send_polled` to send characters one by one, does not perform
+ * flow control and is generally unsafe to use in an interrupt setting.
+ *
+ * The UART IP and pinmux must have been initialized prior to calling this
+ * function.
  *
  * @param uart The UART handle to use for stdout.
  */
diff --git a/sw/device/lib/runtime/print_unittest.cc b/sw/device/lib/runtime/print_unittest.cc
index 2327ef3f772b7..af06e4d9ffe83 100644
--- a/sw/device/lib/runtime/print_unittest.cc
+++ b/sw/device/lib/runtime/print_unittest.cc
@@ -302,6 +302,16 @@ TEST_F(PrintfTest, StatusErrorAsJson) {
   EXPECT_EQ(buf_, absl::StrFormat("Hello, {\"Unknown\":[\"PRI\",%d]}\n", line));
 }
 
+TEST_F(PrintfTest, StatusErrorWithModuleId) {
+#define MODULE_ID MAKE_MODULE_ID('\\', '\\', '\\')
+  status_t value = UNKNOWN();
+  int line = __LINE__ - 1;
+  EXPECT_EQ(base_printf("Hello, %!r\n", value), 34);
+  EXPECT_EQ(buf_, absl::StrFormat(
+                      "Hello, {\"Unknown\":[\"\\\\\\\\\\\\\",%d]}\n", line));
+#undef MODULE_ID
+}
+
 TEST_F(PrintfTest, StatusErrorWithArg) {
   status_t value = INVALID_ARGUMENT(2);
   EXPECT_EQ(base_printf("Hello, %r\n", value), 33);
diff --git a/sw/device/lib/testing/BUILD b/sw/device/lib/testing/BUILD
index d56034454da50..f3d924f180454 100644
--- a/sw/device/lib/testing/BUILD
+++ b/sw/device/lib/testing/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -50,6 +50,7 @@ cc_library(
         "//hw/ip/aes:model",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:alert_handler",
         "//sw/device/lib/dif:csrng_shared",
         "//sw/device/lib/dif:edn",
         "//sw/device/lib/runtime:ibex",
@@ -66,6 +67,7 @@ cc_library(
     deps = [
         "//sw/device/lib/dif:alert_handler",
         "//sw/device/lib/dif:base",
+        "//sw/device/lib/dif:edn",
         "//sw/device/lib/dif:rstmgr",
         "//sw/device/lib/testing/test_framework:check",
     ],
@@ -245,6 +247,7 @@ cc_library(
         "//sw/device/lib/dif:rstmgr",
         "//sw/device/lib/runtime:ibex",
         "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/silicon_creator/lib/base:chip",
         "//sw/device/silicon_creator/lib/drivers:retention_sram",
     ],
@@ -295,7 +298,7 @@ cc_library(
         ":otbn_testutils",
         "//sw/device/lib/base:status",
         "//sw/device/lib/dif:otbn",
-        "//sw/otbn/crypto:rsa",
+        "//sw/otbn/crypto:run_rsa",
     ],
 )
 
@@ -458,7 +461,9 @@ cc_library(
     hdrs = ["spi_device_testutils.h"],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:pinmux",
         "//sw/device/lib/dif:spi_device",
         "//sw/device/lib/testing/json:spi_passthru",
         "//sw/device/lib/testing/test_framework:check",
diff --git a/sw/device/lib/testing/aes_testutils.c b/sw/device/lib/testing/aes_testutils.c
index 0abfce8f95174..b53743d998eb6 100644
--- a/sw/device/lib/testing/aes_testutils.c
+++ b/sw/device/lib/testing/aes_testutils.c
@@ -6,6 +6,7 @@
 
 #include "hw/ip/aes/model/aes_modes.h"
 #include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 
 #if !OT_IS_ENGLISH_BREAKFAST
@@ -207,11 +208,43 @@ status_t aes_testutils_csrng_kat(void) {
   TRY(csrng_testutils_kat_reseed(&csrng, &seed_material_reseed,
                                  &expected_state_reseed));
 
+  // We're about to generate the same `genbits` again which will trigger a
+  // `csrng_recov_alert`. This is expected, so we must disable this alert if it
+  // is currently enabled and restore it after.
+  dif_alert_handler_t alert_handler;
+  CHECK_DIF_OK(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
+
+  dif_toggle_t was_enabled = kDifToggleDisabled;
+  CHECK_DIF_OK(dif_alert_handler_alert_is_enabled(
+      &alert_handler, kTopEarlgreyAlertIdCsrngRecovAlert, &was_enabled));
+
+  if (was_enabled == kDifToggleEnabled) {
+    CHECK_DIF_OK(dif_alert_handler_alert_set_enabled(
+        &alert_handler, kTopEarlgreyAlertIdCsrngRecovAlert,
+        kDifToggleDisabled));
+  }
+
   // Generate one block containing the required seed for the AES masking PRNG
   // to output an all-zero vector.
   TRY(csrng_testutils_kat_generate(&csrng, 1, kCsrngBlockLen,
                                    kAesMaskingPrngZeroOutputSeed,
                                    &expected_state_generate));
+
+  // Check that the correct recoverable alert fired even if the alert was
+  // ignored.
+  uint32_t recov_alerts = 0;
+  CHECK_DIF_OK(dif_csrng_get_recoverable_alerts(&csrng, &recov_alerts));
+  CHECK(recov_alerts == kDifCsrngRecoverableAlertRepeatedGenBits);
+  CHECK_DIF_OK(dif_csrng_clear_recoverable_alerts(&csrng));
+
+  // Restore the alert if it was enabled.
+  if (was_enabled == kDifToggleEnabled) {
+    CHECK_DIF_OK(dif_alert_handler_alert_set_enabled(
+        &alert_handler, kTopEarlgreyAlertIdCsrngRecovAlert, kDifToggleEnabled));
+  }
+
   return OK_STATUS();
 }
 #endif
diff --git a/sw/device/lib/testing/alert_handler_testutils.c b/sw/device/lib/testing/alert_handler_testutils.c
index 34e41fbc6d3ae..cd4529d11a6a8 100644
--- a/sw/device/lib/testing/alert_handler_testutils.c
+++ b/sw/device/lib/testing/alert_handler_testutils.c
@@ -7,6 +7,7 @@
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/dif/dif_alert_handler.h"
 #include "sw/device/lib/dif/dif_base.h"
+#include "sw/device/lib/dif/dif_edn.h"
 #include "sw/device/lib/dif/dif_rstmgr.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 
@@ -14,6 +15,10 @@
 
 #define MODULE_ID MAKE_MODULE_ID('a', 'h', 't')
 
+const char kAlertClassName[] = {'A', 'B', 'C', 'D'};
+static_assert(ARRAYSIZE(kAlertClassName) == ALERT_HANDLER_PARAM_N_CLASSES,
+              "Expected four alert classes!");
+
 /**
  * This is used to traverse the dump treating it as an array of bits, and
  * extract a number of bits placing them in a uint32_t. The word and bit index
@@ -157,3 +162,143 @@ status_t alert_handler_testutils_get_cycles_from_us(uint64_t microseconds,
 uint32_t alert_handler_testutils_cycle_rescaling_factor(void) {
   return kDeviceType == kDeviceSimDV ? 1 : 10;
 }
+
+static status_t alert_handler_class_info_log(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class) {
+  dif_alert_handler_class_state_t state;
+  TRY(dif_alert_handler_get_class_state(alert_handler, alert_class, &state));
+
+  uint16_t num_alerts;
+  TRY(dif_alert_handler_get_accumulator(alert_handler, alert_class,
+                                        &num_alerts));
+
+  if (num_alerts > 0) {
+    LOG_INFO("Alert class %c state: %d, acc_cnt: %d",
+             kAlertClassName[alert_class], state, num_alerts);
+
+    for (dif_alert_handler_alert_t alert = 0;
+         alert < ALERT_HANDLER_PARAM_N_ALERTS; ++alert) {
+      bool is_cause;
+      TRY(dif_alert_handler_alert_is_cause(alert_handler, alert, &is_cause));
+      if (is_cause) {
+        LOG_INFO("Alert %d is set", alert);
+      }
+    }
+
+    bool can_clear;
+    TRY(dif_alert_handler_escalation_can_clear(alert_handler, alert_class,
+                                               &can_clear));
+    if (can_clear) {
+      TRY(dif_alert_handler_escalation_clear(alert_handler, alert_class));
+    } else {
+      LOG_INFO("Alert class %c can't be cleared", kAlertClassName[alert_class]);
+    }
+  }
+
+  return OK_STATUS();
+}
+
+static status_t alert_handler_class_log(
+    const dif_alert_handler_t *alert_handler,
+    dif_alert_handler_class_t alert_class) {
+  dif_alert_handler_class_state_t state;
+  TRY(dif_alert_handler_get_class_state(alert_handler, alert_class, &state));
+
+  uint16_t num_alerts;
+  TRY(dif_alert_handler_get_accumulator(alert_handler, alert_class,
+                                        &num_alerts));
+
+  if (num_alerts > 0) {
+    LOG_INFO("Alert class %c state: %d, acc_cnt: %d",
+             kAlertClassName[alert_class], state, num_alerts);
+    for (dif_alert_handler_alert_t alert = 0;
+         alert < ALERT_HANDLER_PARAM_N_ALERTS; ++alert) {
+      bool is_cause;
+      TRY(dif_alert_handler_alert_is_cause(alert_handler, alert, &is_cause));
+      if (is_cause) {
+        LOG_INFO("Alert %d is set", alert);
+      }
+    }
+  }
+
+  return OK_STATUS();
+}
+
+status_t alert_handler_testutils_status_log(
+    const dif_alert_handler_t *alert_handler) {
+  TRY_CHECK(alert_handler != NULL);
+
+  for (dif_alert_handler_class_t alert_class = 0;
+       alert_class < ALERT_HANDLER_PARAM_N_CLASSES; ++alert_class) {
+    TRY(alert_handler_class_log(alert_handler, alert_class));
+  }
+
+  return OK_STATUS();
+}
+
+status_t alert_handler_testutils_dump_log(const dif_rstmgr_t *rstmgr) {
+  TRY_CHECK(rstmgr != NULL);
+
+  dif_rstmgr_alert_info_dump_segment_t dump[DIF_RSTMGR_ALERT_INFO_MAX_SIZE];
+  size_t seg_size;
+  alert_handler_testutils_info_t actual_info;
+
+  uint32_t log_count = 0;
+
+  CHECK_DIF_OK(dif_rstmgr_alert_info_dump_read(
+      rstmgr, dump, DIF_RSTMGR_ALERT_INFO_MAX_SIZE, &seg_size));
+  CHECK(seg_size <= INT_MAX, "seg_size must fit in int");
+  CHECK_STATUS_OK(
+      alert_handler_testutils_info_parse(dump, (int)seg_size, &actual_info));
+
+  for (dif_alert_handler_class_t alert_class = 0;
+       alert_class < ALERT_HANDLER_PARAM_N_CLASSES; ++alert_class) {
+    if (actual_info.class_esc_state[alert_class] != kCstateIdle) {
+      LOG_INFO("crashdump - Alert class %c state: %d, acc_cnt: %d, esc_cnt: %d",
+               kAlertClassName[alert_class],
+               actual_info.class_esc_state[alert_class],
+               actual_info.class_accum_cnt[alert_class],
+               actual_info.class_esc_cnt[alert_class]);
+      log_count++;
+    }
+  }
+  for (dif_alert_handler_alert_t alert = 0;
+       alert < ALERT_HANDLER_PARAM_N_ALERTS; ++alert) {
+    if (actual_info.alert_cause[alert]) {
+      LOG_INFO("crashdump - Alert %d is set", alert);
+      log_count++;
+    }
+  }
+
+  if (log_count == 0) {
+    LOG_INFO("crashdump - No alerts reported");
+  }
+
+  return OK_STATUS();
+}
+
+status_t alert_handler_testutils_dump_enable(
+    const dif_alert_handler_t *alert_handler, const dif_rstmgr_t *rstmgr) {
+  TRY_CHECK(alert_handler != NULL);
+  TRY_CHECK(rstmgr != NULL);
+
+  uint32_t enable_count = 0;
+  for (dif_alert_handler_class_t alert_class = 0;
+       alert_class < ALERT_HANDLER_PARAM_N_CLASSES; ++alert_class) {
+    bool is_enabled;
+    TRY(dif_alert_handler_is_class_enabled(alert_handler, alert_class,
+                                           &is_enabled));
+    if (is_enabled) {
+      TRY(dif_alert_handler_crash_dump_trigger_set(
+          alert_handler, alert_class, kDifAlertHandlerClassStatePhase3));
+      enable_count++;
+    }
+  }
+
+  if (enable_count) {
+    CHECK_DIF_OK(dif_rstmgr_alert_info_set_enabled(rstmgr, kDifToggleEnabled));
+  }
+
+  return OK_STATUS();
+}
diff --git a/sw/device/lib/testing/alert_handler_testutils.h b/sw/device/lib/testing/alert_handler_testutils.h
index 14d28f1542953..4545d8775e9bf 100644
--- a/sw/device/lib/testing/alert_handler_testutils.h
+++ b/sw/device/lib/testing/alert_handler_testutils.h
@@ -109,4 +109,49 @@ status_t alert_handler_testutils_get_cycles_from_us(uint64_t microseconds,
  */
 uint32_t alert_handler_testutils_cycle_rescaling_factor(void);
 
+/**
+ * Logs the status of the alert handler.
+ *
+ * This function will log the state of each alert class, including the
+ * number of alerts that have been accumulated.
+ *
+ * Only the alert classes that have accumulated alerts will be logged.
+ *
+ * @param alert_handler An alert handler handle.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+status_t alert_handler_testutils_status_log(
+    const dif_alert_handler_t *alert_handler);
+
+/**
+ * Logs the alert handler crash dump.
+ *
+ * This function will log the state of each alert class, including the
+ * number of alerts that have been accumulated.
+ *
+ * Only alerts that have been set will be logged, as well as the alert
+ * classes that are in non-idle states.
+ *
+ * @param rstmgr A RSTMGR handle.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+status_t alert_handler_testutils_dump_log(const dif_rstmgr_t *rstmgr);
+
+/**
+ * Enables the alert handler crash dump.
+ *
+ * This function will enable the alert handler crash dump, which will
+ * cause the alert handler to dump its state to the RSTMGR when an
+ * alert is triggered.
+ *
+ * @param alert_handler An alert handler handle.
+ * @param rstmgr A RSTMGR handle.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+status_t alert_handler_testutils_dump_enable(
+    const dif_alert_handler_t *alert_handler, const dif_rstmgr_t *rstmgr);
+
 #endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_ALERT_HANDLER_TESTUTILS_H_
diff --git a/sw/device/lib/testing/flash_ctrl_testutils.c b/sw/device/lib/testing/flash_ctrl_testutils.c
index 5f5b2c19159fd..c19bfdef4b3f9 100644
--- a/sw/device/lib/testing/flash_ctrl_testutils.c
+++ b/sw/device/lib/testing/flash_ctrl_testutils.c
@@ -358,3 +358,37 @@ status_t flash_ctrl_testutils_show_faults(
 
   return OK_STATUS();
 }
+
+static const char *mubi_prop(multi_bit_bool_t val, const char *name) {
+  switch (val) {
+    case kMultiBitBool4True:
+      return name;
+    case kMultiBitBool4False:
+      return "xx";
+    default:
+      return "uu";
+  }
+}
+
+void flash_ctrl_testutils_data_region_print(
+    size_t index, dif_flash_ctrl_data_region_properties_t *p, bool locked) {
+  LOG_INFO("data region n=%u st=%u sz=%u %s-%s-%s-%s-%s-%s %s", index, p->base,
+           p->size, mubi_prop(p->properties.rd_en, "RD"),
+           mubi_prop(p->properties.prog_en, "WR"),
+           mubi_prop(p->properties.erase_en, "ER"),
+           mubi_prop(p->properties.scramble_en, "SC"),
+           mubi_prop(p->properties.ecc_en, "EC"),
+           mubi_prop(p->properties.high_endurance_en, "HE"),
+           locked ? "LK" : "UN");
+}
+
+void flash_ctrl_testutils_info_region_print(
+    dif_flash_ctrl_info_region_t region, dif_flash_ctrl_region_properties_t *p,
+    bool locked) {
+  LOG_INFO("info region bank=%u part=%u page=%u %s-%s-%s-%s-%s-%s %s",
+           region.bank, region.partition_id, region.page,
+           mubi_prop(p->rd_en, "RD"), mubi_prop(p->prog_en, "WR"),
+           mubi_prop(p->erase_en, "ER"), mubi_prop(p->scramble_en, "SC"),
+           mubi_prop(p->ecc_en, "EC"), mubi_prop(p->high_endurance_en, "HE"),
+           locked ? "LK" : "UN");
+}
diff --git a/sw/device/lib/testing/flash_ctrl_testutils.h b/sw/device/lib/testing/flash_ctrl_testutils.h
index 8be4c1cbd7fe9..eca15bc1a015c 100644
--- a/sw/device/lib/testing/flash_ctrl_testutils.h
+++ b/sw/device/lib/testing/flash_ctrl_testutils.h
@@ -275,4 +275,43 @@ status_t flash_ctrl_testutils_backdoor_wait_update(const volatile uint8_t *addr,
 OT_WARN_UNUSED_RESULT
 status_t flash_ctrl_testutils_show_faults(
     const dif_flash_ctrl_state_t *flash_state);
+
+/**
+ * Print the properties of a flash data region configuration.
+ *
+ * This prints:
+ *
+ * data region n=<index> st=<start> sz=<size> RD-WR-ER-SC-EC-HE LK
+ *
+ * The various properties are printed depending on their mubi bool value:
+ * - The property (e.g. `RD`, `WR`, etc) is printed if enabled by Mubi4True.
+ * - The string `xx` is printed if disabled by Mubi4False.
+ * - The string `uu` is printed if disabled by any other non-True value.
+ *
+ * @param index The index of the region.
+ * @param p The properties of the region.
+ * @param locked Whether or not the region is locked.
+ */
+void flash_ctrl_testutils_data_region_print(
+    size_t index, dif_flash_ctrl_data_region_properties_t *p, bool locked);
+
+/**
+ * Print the properties of a flash data region configuration.
+ *
+ * This prints:
+ *
+ * info region bank=<bank> part=<partition> page=<page> RD-WR-ER-SC-EC-HE LK
+ *
+ * The various properties are printed depending on their mubi bool value:
+ * - The property (e.g. `RD`, `WR`, etc) is printed if enabled by Mubi4True.
+ * - The string `xx` is printed if disabled by Mubi4False.
+ * - The string `uu` is printed if disabled by any other non-True value.
+ *
+ * @param region The info region descriptor.
+ * @param p The properties of the region.
+ * @param locked Whether or not the region is locked.
+ */
+void flash_ctrl_testutils_info_region_print(
+    dif_flash_ctrl_info_region_t region, dif_flash_ctrl_region_properties_t *p,
+    bool locked);
 #endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_FLASH_CTRL_TESTUTILS_H_
diff --git a/sw/device/lib/testing/i2c_testutils.c b/sw/device/lib/testing/i2c_testutils.c
index e739c5bdb54ec..baa195ccd3ad0 100644
--- a/sw/device/lib/testing/i2c_testutils.c
+++ b/sw/device/lib/testing/i2c_testutils.c
@@ -375,7 +375,9 @@ status_t i2c_testutils_detach_pinmux(const dif_pinmux_t *pinmux,
   return OK_STATUS();
 }
 
-status_t i2c_testutils_set_speed(const dif_i2c_t *i2c, dif_i2c_speed_t speed) {
+status_t i2c_testutils_set_speed(const dif_i2c_t *i2c, dif_i2c_speed_t speed,
+                                 uint32_t sda_rise_nanos,
+                                 uint32_t sda_fall_nanos) {
   uint32_t speed_khz = 0;
   switch (speed) {
     case kDifI2cSpeedStandard:
@@ -396,8 +398,8 @@ status_t i2c_testutils_set_speed(const dif_i2c_t *i2c, dif_i2c_speed_t speed) {
       .lowest_target_device_speed = speed,
       .clock_period_nanos =
           (uint32_t)udiv64_slow(1000000000, kClockFreqPeripheralHz, NULL),
-      .sda_rise_nanos = 400,
-      .sda_fall_nanos = 110,
+      .sda_rise_nanos = sda_rise_nanos,
+      .sda_fall_nanos = sda_fall_nanos,
       .scl_period_nanos = 1000000 / speed_khz};
 
   dif_i2c_status_t status;
diff --git a/sw/device/lib/testing/i2c_testutils.h b/sw/device/lib/testing/i2c_testutils.h
index adfe6161ae61b..246e3c6f17b2e 100644
--- a/sw/device/lib/testing/i2c_testutils.h
+++ b/sw/device/lib/testing/i2c_testutils.h
@@ -226,13 +226,21 @@ status_t i2c_testutils_read(const dif_i2c_t *i2c, uint8_t addr,
 
 /**
  * Set the i2c timing parameters based on the desired speed mode.
+ * Also see
+ * https://opentitan.org/book/hw/ip/i2c/doc/programmers_guide.html#initialization
  *
  * @param i2c An I2C DIF handle.
  * @param speed The speed mode.
+ * @param sda_rise_nanos The expected time it takes for the I2C bus signal to
+ * rise. This depends on hardware interconnect properties.
+ * @param sda_fall_nanos The expected time it takes for the I2C bus signal to
+ * fall. This depends on hardware interconnect properties.
  * @return The result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-status_t i2c_testutils_set_speed(const dif_i2c_t *i2c, dif_i2c_speed_t speed);
+status_t i2c_testutils_set_speed(const dif_i2c_t *i2c, dif_i2c_speed_t speed,
+                                 uint32_t sda_rise_nanos,
+                                 uint32_t sda_fall_nanos);
 
 /**
  * Busy spin until the i2c host get idle.
diff --git a/sw/device/lib/testing/json/BUILD b/sw/device/lib/testing/json/BUILD
index 2bb4de9c262b4..04532d70d5d2d 100644
--- a/sw/device/lib/testing/json/BUILD
+++ b/sw/device/lib/testing/json/BUILD
@@ -68,7 +68,10 @@ cc_library(
         "//sw/device/lib/runtime:print",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-    ],
+    ] + select({
+        "@platforms//cpu:riscv32": ["//sw/device/lib/runtime:log"],
+        "//conditions:default": [],
+    }),
 )
 
 cc_library(
diff --git a/sw/device/lib/testing/json/command.h b/sw/device/lib/testing/json/command.h
index 620c985e58a6c..37a64ef40e9f5 100644
--- a/sw/device/lib/testing/json/command.h
+++ b/sw/device/lib/testing/json/command.h
@@ -27,6 +27,7 @@ extern "C" {
     value(_, MemWrite) \
     value(_, MemWrite32) \
     value(_, PinmuxConfig) \
+    value(_, PinmuxAttrConfig) \
     value(_, SpiConfigureJedecId) \
     value(_, SpiReadStatus) \
     value(_, SpiWaitForUpload) \
diff --git a/sw/device/lib/testing/json/pinmux_config.c b/sw/device/lib/testing/json/pinmux_config.c
index 9e86e7720f736..e42bd0d97382e 100644
--- a/sw/device/lib/testing/json/pinmux_config.c
+++ b/sw/device/lib/testing/json/pinmux_config.c
@@ -11,6 +11,9 @@
 #include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/testing/json/pinmux_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#ifdef OT_PLATFORM_RV32
+#include "sw/device/lib/runtime/log.h"
+#endif
 
 status_t pinmux_config(ujson_t *uj, dif_pinmux_t *pinmux) {
   pinmux_config_t config;
@@ -30,5 +33,23 @@ status_t pinmux_config(ujson_t *uj, dif_pinmux_t *pinmux) {
     TRY(dif_pinmux_output_select(pinmux, config.output.mio[i],
                                  config.output.selector[i]));
   }
+  for (size_t i = 0; i < ARRAYSIZE(config.attrs.mio); ++i) {
+    if (config.attrs.mio[i] == kPinmuxMioOutEnd) {
+      break;
+    }
+    dif_pinmux_pad_attr_t pad_attr = {.flags = config.attrs.flags[i]};
+    dif_pinmux_pad_attr_t attrs_out;
+    (void)dif_pinmux_pad_write_attrs(pinmux, config.attrs.mio[i],
+                                     kDifPinmuxPadKindMio, pad_attr,
+                                     &attrs_out);
+    if (pad_attr.flags != attrs_out.flags) {
+#ifdef OT_PLATFORM_RV32
+      LOG_ERROR("pin %d attrs did not match - wanted 0x%08x, got 0x%08x",
+                config.attrs.mio[i], pad_attr.flags, attrs_out.flags);
+#endif
+      RESP_ERR(uj, UNKNOWN());
+      return UNKNOWN();
+    }
+  }
   return RESP_OK_STATUS(uj);
 }
diff --git a/sw/device/lib/testing/json/pinmux_config.h b/sw/device/lib/testing/json/pinmux_config.h
index c3408fe29096d..b834e03921cbb 100644
--- a/sw/device/lib/testing/json/pinmux_config.h
+++ b/sw/device/lib/testing/json/pinmux_config.h
@@ -22,22 +22,33 @@ extern "C" {
 #endif
 // clang-format off
 
+// Derive `Default` on top of the default derives.
+#define RUST_DERIVE RUST_DEFAULT_DERIVE, Default
+
 #define STRUCT_PINMUX_INPUT_SELECTION(field, string) \
     field(peripheral, pinmux_peripheral_in_t, 16)    \
     field(selector, pinmux_insel_t, 16)
 UJSON_SERDE_STRUCT(PinmuxInputSelection, pinmux_input_selection_t,
-                   STRUCT_PINMUX_INPUT_SELECTION);
+                   STRUCT_PINMUX_INPUT_SELECTION, RUST_DERIVE);
 
 #define STRUCT_PINMUX_OUTPUT_SELECTION(field, string) \
     field(mio, pinmux_mio_out_t, 16)                  \
     field(selector, pinmux_outsel_t, 16)
 UJSON_SERDE_STRUCT(PinmuxOutputSelection, pinmux_output_selection_t,
-                   STRUCT_PINMUX_OUTPUT_SELECTION);
+                   STRUCT_PINMUX_OUTPUT_SELECTION, RUST_DERIVE);
+
+# define STRUCT_PINMUX_ATTR_CONFIG(field, string) \
+    field(mio, pinmux_mio_out_t, 16)              \
+    field(flags, uint32_t, 16)
+UJSON_SERDE_STRUCT(PinmuxAttrConfig, pinmux_attr_config_t,
+                   STRUCT_PINMUX_ATTR_CONFIG, RUST_DERIVE);
 
-#define STRUCT_PINMUX_CONFIG(field, string) \
-    field(input, pinmux_input_selection_t)  \
-    field(output, pinmux_output_selection_t)
-UJSON_SERDE_STRUCT(PinmuxConfig, pinmux_config_t, STRUCT_PINMUX_CONFIG);
+#define STRUCT_PINMUX_CONFIG(field, string)  \
+    field(input, pinmux_input_selection_t)   \
+    field(output, pinmux_output_selection_t) \
+    field(attrs, pinmux_attr_config_t)
+UJSON_SERDE_STRUCT(PinmuxConfig, pinmux_config_t,
+                   STRUCT_PINMUX_CONFIG, RUST_DERIVE);
 
 #undef MODULE_ID
 
diff --git a/sw/device/lib/testing/json/provisioning_data.h b/sw/device/lib/testing/json/provisioning_data.h
index d1c3fc6254b2d..b575c8072bdc5 100644
--- a/sw/device/lib/testing/json/provisioning_data.h
+++ b/sw/device/lib/testing/json/provisioning_data.h
@@ -14,12 +14,29 @@ extern "C" {
 #define MODULE_ID MAKE_MODULE_ID('j', 'p', 'd')
 
 /**
- * Provisioning data imported onto the device in CP.
+ * Max sizes of the UJSON structs below when they are serialized.
+ *
+ * The are obtained by running the following FPGA test:
+ * bazel test --test_output=streamed \
+ *  //sw/device/silicon_creator/manuf/tests:ujson_msg_size_functest
+ *
+ * These should match the constants in:
+ * sw/host/provisioning/ujson_lib/src/lib.rs
+ */
+#ifndef RUST_PREPROCESSOR_EMIT
+enum {
+  kSerdesSha256HashSerializedMaxSize = 98,
+  kLcTokenHashSerializedMaxSize = 52,
+  kManufCertgenInputsSerializedMaxSize = 210,
+  kPersoBlobSerializedMaxSize = 20535,
+};
+#endif
+
+/**
+ * Provisioning data imported onto the device during CP.
  */
 // clang-format off
 #define STRUCT_MANUF_CP_PROVISIONING_DATA(field, string) \
-    field(device_id, uint32_t, 8) \
-    field(manuf_state, uint32_t, 8) \
     field(wafer_auth_secret, uint32_t, 8) \
     field(test_unlock_token_hash, uint64_t, 2) \
     field(test_exit_token_hash, uint64_t, 2)
@@ -29,14 +46,28 @@ UJSON_SERDE_STRUCT(ManufCpProvisioningData, \
 // clang-format on
 
 /**
- * Provisioning data imported onto the device in FT during individualization.
+ * Provisioning data exported off the device during CP.
  */
 // clang-format off
-#define STRUCT_MANUF_FT_INDIVIDUALIZE_DATA(field, string) \
-    field(device_id, uint32_t, 8)
-UJSON_SERDE_STRUCT(ManufFtIndividualizeData, \
-                   manuf_ft_individualize_data_t, \
-                   STRUCT_MANUF_FT_INDIVIDUALIZE_DATA);
+#define STRUCT_MANUF_CP_PROVISIONING_DATA_OUT(field, string) \
+    field(cp_device_id, uint32_t, 4)
+UJSON_SERDE_STRUCT(ManufCpProvisioningDataOut, \
+                   manuf_cp_provisioning_data_out_t, \
+                   STRUCT_MANUF_CP_PROVISIONING_DATA_OUT);
+// clang-format on
+
+/**
+ * Test factory data imported onto the device prior to CP initialize stage.
+ */
+// clang-format off
+#define STRUCT_MANUF_CP_TEST_DATA(field, string) \
+    field(lot_name, uint32_t) \
+    field(wafer_number, uint32_t) \
+    field(wafer_x_coord, uint32_t) \
+    field(wafer_y_coord, uint32_t)
+UJSON_SERDE_STRUCT(ManufCpTestData, \
+                   manuf_cp_test_data_t, \
+                   STRUCT_MANUF_CP_TEST_DATA);
 // clang-format on
 
 /**
@@ -52,31 +83,26 @@ UJSON_SERDE_STRUCT(EccP256PublicKey, \
 // clang-format on
 
 /**
- * Wrapped (encrypted) RMA unlock token.
- *
- * The RMA unlock token is encrypted with AES-ECB using an ECDH emphemeral key.
- * The key wrapping process works as follows:
- *
- * - The host generates an ECDH-P256 keypair (`sk_host`, `pk_host`), where the
- *   public component, `pk_host`, is sent to the device over the console.
- * - During provisioning, the device generates its own ECDH-P256 keypair
- *   (`sk_device`, `pk_device`).
- * - The device then generates an emphemeral, shared, AES key (`k_shared`) using
- *   `sk_device` and `pk_host`.
- * - The device encrypts the raw RMA unlock token using AES and the shared
- *   secret key, `k_shared`.
- * - The device transmits the encrypted RMA unlock token, along with the
- *   device-generated `pk_device`, to the host (e.g. ATE), allowing the RMA
- *   unlock token to be decrypted using the shared secret (`k_shared`) derived
- *   by the host.
+ *  A CShake hash used for storing various LC tokens (test lock/unlock, RMA
+ *  unlock, etc).
+ */
+// clang-format off
+#define STRUCT_LC_TOKEN_HASH(field, string) \
+    field(hash, uint64_t, 2)
+UJSON_SERDE_STRUCT(LcTokenHash, \
+                   lc_token_hash_t, \
+                   STRUCT_LC_TOKEN_HASH);
+// clang-format on
+
+/**
+ * Provisioning data imported onto the device in FT during individualization.
  */
 // clang-format off
-#define STRUCT_WRAPPED_RMA_UNLOCK_TOKEN(field, string) \
-    field(data, uint32_t, 4) \
-    field(device_pk, ecc_p256_public_key_t)
-UJSON_SERDE_STRUCT(WrappedRmaUnlockToken, \
-                   wrapped_rma_unlock_token_t, \
-                   STRUCT_WRAPPED_RMA_UNLOCK_TOKEN);
+#define STRUCT_MANUF_FT_INDIVIDUALIZE_DATA(field, string) \
+    field(ft_device_id, uint32_t, 4)
+UJSON_SERDE_STRUCT(ManufFtIndividualizeData, \
+                   manuf_ft_individualize_data_t, \
+                   STRUCT_MANUF_FT_INDIVIDUALIZE_DATA);
 // clang-format on
 
 /**
@@ -84,43 +110,32 @@ UJSON_SERDE_STRUCT(WrappedRmaUnlockToken, \
  */
 // clang-format off
 #define STRUCT_MANUF_CERTGEN_INPUTS(field, string) \
-    field(rom_ext_measurement, uint32_t, 8) \
-    field(rom_ext_security_version, uint32_t) \
-    field(owner_manifest_measurement, uint32_t, 8) \
-    field(owner_measurement, uint32_t, 8) \
-    field(owner_security_version, uint32_t) \
-    field(auth_key_key_id, uint8_t, 20)
+    field(dice_auth_key_key_id, uint8_t, 20) \
+    field(ext_auth_key_key_id, uint8_t, 20)
 UJSON_SERDE_STRUCT(ManufCertgenInputs, \
                    manuf_certgen_inputs_t, \
                    STRUCT_MANUF_CERTGEN_INPUTS);
 // clang-format on
 
 /**
- * All certificates exported/imported during personalization.
- *
- * This struct may hold up to eight different certificate blobs, the cumulative
- * size of which must be <= 4k. The layout is such that the cumulative blob
- * array can hold several concatenated TBS and/or endorsed certificates.
+ * Container of data exported/imported during personalization.
  *
- * The `tbs` value indicates if the certificate needs be endorsed or not.
+ * The data is passed as a set of LTV objects concatenated in the 'body' field.
  *
- * During certificate export, the first three slots are:
- * 1. UDS TBS certificate.
- * 2. CDI_0 certificate.
- * 3. CDI_1 certificate.
+ * See details of LTV objects' structure in
+ * sw/device/silicon_creator/manuf/base/perso_tlv_data.h
  *
- * During certificate import, the first slot is:
- * 1. UDS certificate.
+ * The header of the container includes the number of stored objects and the
+ * index of the next free location in the container body.
  */
 // clang-format off
-#define STRUCT_MANUF_CERTS(field, string) \
-    field(num_certs, size_t) \
+#define STRUCT_PERSO_BLOB(field, string) \
+    field(num_objs, size_t) \
     field(next_free, size_t) \
-    field(tbs, bool, 8) \
-    field(certs, uint8_t, 4096)
-UJSON_SERDE_STRUCT(ManufCerts, \
-                   manuf_certs_t, \
-                   STRUCT_MANUF_CERTS);
+    field(body, uint8_t, 5120)
+UJSON_SERDE_STRUCT(PersoBlob, \
+                   perso_blob_t, \
+                   STRUCT_PERSO_BLOB);
 // clang-format on
 
 /**
diff --git a/sw/device/lib/testing/keymgr_testutils.c b/sw/device/lib/testing/keymgr_testutils.c
index c49ac9965a664..705ea2e893ed9 100644
--- a/sw/device/lib/testing/keymgr_testutils.c
+++ b/sw/device/lib/testing/keymgr_testutils.c
@@ -18,6 +18,7 @@
 #include "sw/device/lib/testing/otp_ctrl_testutils.h"
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/silicon_creator/lib/base/chip.h"
 #include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
 
@@ -78,8 +79,10 @@ status_t keymgr_testutils_flash_init(
     const keymgr_testutils_secret_t *creator_secret,
     const keymgr_testutils_secret_t *owner_secret) {
   // Initialize flash secrets.
-  write_info_page(flash, kFlashInfoPageIdCreatorSecret, creator_secret,
-                  /*scramble=*/true);
+  if (creator_secret) {
+    write_info_page(flash, kFlashInfoPageIdCreatorSecret, creator_secret,
+                    /*scramble=*/true);
+  }
   write_info_page(flash, kFlashInfoPageIdOwnerSecret, owner_secret,
                   /*scramble=*/true);
   return OK_STATUS();
@@ -126,7 +129,9 @@ status_t keymgr_initialize_sim_dv(dif_keymgr_t *keymgr, dif_kmac_t *kmac) {
   LOG_INFO("Keymgr entered CreatorRootKey State");
   // Generate identity at CreatorRootKey (to follow same sequence and reuse
   // chip_sw_keymgr_key_derivation_vseq.sv).
-  TRY(keymgr_testutils_generate_identity(keymgr));
+  TRY(keymgr_testutils_generate_identity(
+      keymgr,
+      (dif_keymgr_identity_seed_params_t){.cdi_type = kDifKeymgrSealingCdi}));
   LOG_INFO("Keymgr generated identity at CreatorRootKey State");
 
   // Advance to OwnerIntermediateKey state and check that the state is correct.
@@ -187,6 +192,7 @@ status_t keymgr_testutils_try_startup(dif_keymgr_t *keymgr, dif_kmac_t *kmac,
 status_t keymgr_testutils_init_nvm_then_reset(void) {
   dif_flash_ctrl_state_t flash;
   dif_rstmgr_t rstmgr;
+  dif_otp_ctrl_t otp_ctrl;
 
   TRY(dif_rstmgr_init(mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR),
                       &rstmgr));
@@ -199,8 +205,22 @@ status_t keymgr_testutils_init_nvm_then_reset(void) {
 
     TRY(dif_flash_ctrl_init_state(
         &flash, mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
-
-    TRY(keymgr_testutils_flash_init(&flash, &kCreatorSecret, &kOwnerSecret));
+    TRY(dif_otp_ctrl_init(
+        mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR),
+        &otp_ctrl));
+
+    bool secret2_computed = false;
+    TRY(dif_otp_ctrl_is_digest_computed(&otp_ctrl, kDifOtpCtrlPartitionSecret2,
+                                        &secret2_computed));
+
+    // Only initialise the creator secret if `SECRET2` digest has not been
+    // computed. `flash_ctrl` will throw a recoverable error if we try to write
+    // this afterwards.
+    const keymgr_testutils_secret_t *creator_secret = NULL;
+    if (!secret2_computed) {
+      creator_secret = &kCreatorSecret;
+    }
+    TRY(keymgr_testutils_flash_init(&flash, creator_secret, &kOwnerSecret));
 
     TRY(check_lock_otp_partition());
 
@@ -271,7 +291,9 @@ status_t keymgr_testutils_startup(dif_keymgr_t *keymgr, dif_kmac_t *kmac) {
   // Identity generation is not really necessary for all tests, but it is
   // added to make sure each test using this function is also compatible with
   // the DV_WAIT sequences from keymgr_key_derivation vseq
-  TRY(keymgr_testutils_generate_identity(keymgr));
+  TRY(keymgr_testutils_generate_identity(
+      keymgr,
+      (dif_keymgr_identity_seed_params_t){.cdi_type = kDifKeymgrSealingCdi}));
   LOG_INFO("Keymgr generated identity at CreatorRootKey State");
 
   return OK_STATUS();
@@ -293,8 +315,10 @@ status_t keymgr_testutils_check_state(const dif_keymgr_t *keymgr,
   return OK_STATUS();
 }
 
-status_t keymgr_testutils_generate_identity(const dif_keymgr_t *keymgr) {
-  TRY(dif_keymgr_generate_identity_seed(keymgr));
+status_t keymgr_testutils_generate_identity(
+    const dif_keymgr_t *keymgr,
+    const dif_keymgr_identity_seed_params_t params) {
+  TRY(dif_keymgr_generate_identity_seed(keymgr, params));
   return keymgr_testutils_wait_for_operation_done(keymgr);
 }
 
diff --git a/sw/device/lib/testing/keymgr_testutils.h b/sw/device/lib/testing/keymgr_testutils.h
index 45887ed93f6bd..b7c613392a16b 100644
--- a/sw/device/lib/testing/keymgr_testutils.h
+++ b/sw/device/lib/testing/keymgr_testutils.h
@@ -158,7 +158,9 @@ OT_WARN_UNUSED_RESULT
 status_t keymgr_testutils_init_nvm_then_reset(void);
 
 /**
- * Programs flash, restarts, and advances keymgr to CreatorRootKey state.
+ * Programs flash, restarts, and advances keymgr to CreatorRootKey state. Note
+ * that this function assumes that the key manager is in the initial reset state
+ * after ROM execution.
  *
  * This procedure essentially gets the keymgr into the first state where it can
  * be used for tests. Tests should call it before anything else, like below:
@@ -212,7 +214,8 @@ status_t keymgr_testutils_check_state(const dif_keymgr_t *keymgr,
  * @param keymgr A key manager handle.
  */
 OT_WARN_UNUSED_RESULT
-status_t keymgr_testutils_generate_identity(const dif_keymgr_t *keymgr);
+status_t keymgr_testutils_generate_identity(
+    const dif_keymgr_t *keymgr, const dif_keymgr_identity_seed_params_t params);
 
 /**
  * Issues a keymgr HW/SW versioned key generation and wait for it to complete
diff --git a/sw/device/lib/testing/otbn_testutils_rsa.c b/sw/device/lib/testing/otbn_testutils_rsa.c
index 353317adfa854..251a330f74f19 100644
--- a/sw/device/lib/testing/otbn_testutils_rsa.c
+++ b/sw/device/lib/testing/otbn_testutils_rsa.c
@@ -8,25 +8,52 @@
 #include "sw/device/lib/dif/dif_otbn.h"
 #include "sw/device/lib/testing/otbn_testutils.h"
 
-OTBN_DECLARE_APP_SYMBOLS(rsa);
-OTBN_DECLARE_SYMBOL_ADDR(rsa, mode);
-OTBN_DECLARE_SYMBOL_ADDR(rsa, n_limbs);
-OTBN_DECLARE_SYMBOL_ADDR(rsa, inout);
-OTBN_DECLARE_SYMBOL_ADDR(rsa, modulus);
-OTBN_DECLARE_SYMBOL_ADDR(rsa, exp);
-
-static const otbn_app_t kOtbnAppRsa = OTBN_APP_T_INIT(rsa);
-static const otbn_addr_t kOtbnVarRsaMode = OTBN_ADDR_T_INIT(rsa, mode);
-static const otbn_addr_t kOtbnVarRsaNLimbs = OTBN_ADDR_T_INIT(rsa, n_limbs);
-static const otbn_addr_t kOtbnVarRsaInOut = OTBN_ADDR_T_INIT(rsa, inout);
-static const otbn_addr_t kOtbnVarRsaModulus = OTBN_ADDR_T_INIT(rsa, modulus);
-static const otbn_addr_t kOtbnVarRsaExp = OTBN_ADDR_T_INIT(rsa, exp);
-
-enum {
-  kOtbnWideWordBytes = 256 / 8,
-  kModeEncrypt = 1,
-  kModeDecrypt = 2,
-};
+OTBN_DECLARE_APP_SYMBOLS(run_rsa);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, mode);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, inout);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_n);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d0);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d1);
+
+static const otbn_app_t kOtbnAppRsa = OTBN_APP_T_INIT(run_rsa);
+static const otbn_addr_t kOtbnVarRsaMode = OTBN_ADDR_T_INIT(run_rsa, mode);
+static const otbn_addr_t kOtbnVarRsaInOut = OTBN_ADDR_T_INIT(run_rsa, inout);
+static const otbn_addr_t kOtbnVarRsaModulus = OTBN_ADDR_T_INIT(run_rsa, rsa_n);
+static const otbn_addr_t kOtbnVarRsaD0 = OTBN_ADDR_T_INIT(run_rsa, rsa_d0);
+static const otbn_addr_t kOtbnVarRsaD1 = OTBN_ADDR_T_INIT(run_rsa, rsa_d1);
+
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_512_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_512_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_1024_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_1024_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_2048_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_2048_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_3072_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_3072_MODEXP_F4);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_4096_MODEXP);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_4096_MODEXP_F4);
+static const uint32_t kMode512Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_512_MODEXP);
+static const uint32_t kMode512ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_512_MODEXP_F4);
+static const uint32_t kMode1024Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_1024_MODEXP);
+static const uint32_t kMode1024ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_1024_MODEXP_F4);
+static const uint32_t kMode2048Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_2048_MODEXP);
+static const uint32_t kMode2048ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_2048_MODEXP_F4);
+static const uint32_t kMode3072Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_3072_MODEXP);
+static const uint32_t kMode3072ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_3072_MODEXP_F4);
+static const uint32_t kMode4096Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_4096_MODEXP);
+static const uint32_t kMode4096ModexpF4 =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_4096_MODEXP_F4);
+
+enum { kOtbnWideWordBytes = 256 / 8 };
 
 status_t otbn_testutils_rsa_load(dif_otbn_t *otbn) {
   if (otbn == NULL) {
@@ -43,17 +70,30 @@ status_t otbn_testutils_rsa_modexp_f4_start(dif_otbn_t *otbn,
     return INVALID_ARGUMENT();
   }
 
-  uint32_t n_limbs = size_bytes / kOtbnWideWordBytes;
-  if (n_limbs == 0 || n_limbs > 16) {
-    return INVALID_ARGUMENT();
-  }
+  uint32_t mode;
+  switch (size_bytes) {
+    case 64:
+      mode = kMode512ModexpF4;
+      break;
+    case 128:
+      mode = kMode1024ModexpF4;
+      break;
+    case 256:
+      mode = kMode2048ModexpF4;
+      break;
+    case 384:
+      mode = kMode3072ModexpF4;
+      break;
+    case 512:
+      mode = kMode4096ModexpF4;
+      break;
+    default:
+      return INVALID_ARGUMENT();
+  };
 
   // Write input arguments.
-  uint32_t mode = kModeEncrypt;
   TRY(otbn_testutils_write_data(otbn, sizeof(uint32_t), &mode,
                                 kOtbnVarRsaMode));
-  TRY(otbn_testutils_write_data(otbn, sizeof(uint32_t), &n_limbs,
-                                kOtbnVarRsaNLimbs));
   TRY(otbn_testutils_write_data(otbn, size_bytes, modulus, kOtbnVarRsaModulus));
   TRY(otbn_testutils_write_data(otbn, size_bytes, in, kOtbnVarRsaInOut));
 
@@ -62,25 +102,39 @@ status_t otbn_testutils_rsa_modexp_f4_start(dif_otbn_t *otbn,
 }
 
 status_t otbn_testutils_rsa_modexp_consttime_start(
-    dif_otbn_t *otbn, const uint8_t *modulus, const uint8_t *private_exponent,
-    const uint8_t *in, size_t size_bytes) {
+    dif_otbn_t *otbn, const uint8_t *modulus, const uint8_t *d_share0,
+    const uint8_t *d_share1, const uint8_t *in, size_t size_bytes) {
   if (otbn == NULL || size_bytes % kOtbnWideWordBytes != 0) {
     return INVALID_ARGUMENT();
   }
 
-  uint32_t n_limbs = size_bytes / kOtbnWideWordBytes;
-  if (n_limbs == 0 || n_limbs > 16) {
-    return INVALID_ARGUMENT();
-  }
+  uint32_t mode;
+  switch (size_bytes) {
+    case 64:
+      mode = kMode512Modexp;
+      break;
+    case 128:
+      mode = kMode1024Modexp;
+      break;
+    case 256:
+      mode = kMode2048Modexp;
+      break;
+    case 384:
+      mode = kMode3072Modexp;
+      break;
+    case 512:
+      mode = kMode4096Modexp;
+      break;
+    default:
+      return INVALID_ARGUMENT();
+  };
 
   // Write input arguments.
-  uint32_t mode = kModeDecrypt;
-  TRY(otbn_testutils_write_data(otbn, sizeof(mode), &mode, kOtbnVarRsaMode));
-  TRY(otbn_testutils_write_data(otbn, sizeof(n_limbs), &n_limbs,
-                                kOtbnVarRsaNLimbs));
+  TRY(otbn_testutils_write_data(otbn, sizeof(uint32_t), &mode,
+                                kOtbnVarRsaMode));
   TRY(otbn_testutils_write_data(otbn, size_bytes, modulus, kOtbnVarRsaModulus));
-  TRY(otbn_testutils_write_data(otbn, size_bytes, private_exponent,
-                                kOtbnVarRsaExp));
+  TRY(otbn_testutils_write_data(otbn, size_bytes, d_share0, kOtbnVarRsaD0));
+  TRY(otbn_testutils_write_data(otbn, size_bytes, d_share1, kOtbnVarRsaD1));
   TRY(otbn_testutils_write_data(otbn, size_bytes, in, kOtbnVarRsaInOut));
 
   // Call OTBN to start the operation.
@@ -93,11 +147,6 @@ static status_t modexp_finalize(dif_otbn_t *otbn, uint8_t *out,
     return INVALID_ARGUMENT();
   }
 
-  uint32_t n_limbs = size_bytes / kOtbnWideWordBytes;
-  if (n_limbs == 0 || n_limbs > 16) {
-    return INVALID_ARGUMENT();
-  }
-
   // Wait for OTBN to complete.
   TRY(otbn_testutils_wait_for_done(otbn, kDifOtbnErrBitsNoError));
 
diff --git a/sw/device/lib/testing/otbn_testutils_rsa.h b/sw/device/lib/testing/otbn_testutils_rsa.h
index 722cf3b14fb34..15755c13985dd 100644
--- a/sw/device/lib/testing/otbn_testutils_rsa.h
+++ b/sw/device/lib/testing/otbn_testutils_rsa.h
@@ -71,7 +71,8 @@ status_t otbn_testutils_rsa_modexp_f4_finalize(dif_otbn_t *otbn, uint8_t *out,
  *
  * @param otbn The OTBN context object.
  * @param modulus The modulus (n).
- * @param private_exponent The private exponent (d).
+ * @param d_share0 First share of the private exponent (d).
+ * @param d_share1 Second share of the private exponent (d).
  * @param in The encrypted message.
  * @param out The decrypted (plaintext) message.
  * @param size_bytes The size of all buffers in bytes, i.e. the key/modulus
@@ -79,8 +80,8 @@ status_t otbn_testutils_rsa_modexp_f4_finalize(dif_otbn_t *otbn, uint8_t *out,
  *                   32 byte-steps (i.e. RSA 256 to RSA 4096).
  */
 status_t otbn_testutils_rsa_modexp_consttime_start(
-    dif_otbn_t *otbn, const uint8_t *modulus, const uint8_t *private_exponent,
-    const uint8_t *in, size_t size_bytes);
+    dif_otbn_t *otbn, const uint8_t *modulus, const uint8_t *d_share0,
+    const uint8_t *d_share1, const uint8_t *in, size_t size_bytes);
 /**
  * Finish modular exponentiation with the exponent 65537.
  *
diff --git a/sw/device/lib/testing/otp_ctrl_testutils.c b/sw/device/lib/testing/otp_ctrl_testutils.c
index 2d1084475e96d..7b64b03f6c217 100644
--- a/sw/device/lib/testing/otp_ctrl_testutils.c
+++ b/sw/device/lib/testing/otp_ctrl_testutils.c
@@ -15,9 +15,9 @@
  * OTP the Direct Access Interface (DAI) operation time-out in micro seconds.
  *
  * It is not possible to predict the specific cycle count that a DAI operation
- * takes, thus arbitrary value of 100us is used.
+ * takes, thus arbitrary value of 10ms is used.
  */
-const uint16_t kOtpDaiTimeoutUs = 5000;
+const uint16_t kOtpDaiTimeoutUs = 10000;
 
 /**
  * Checks whether the DAI operation has finished.
@@ -54,7 +54,9 @@ status_t otp_ctrl_testutils_dai_access_error_check(
 }
 
 status_t otp_ctrl_testutils_wait_for_dai(const dif_otp_ctrl_t *otp_ctrl) {
+  TRY(otp_ctrl_testutils_wait_for_dai_pre_hook(otp_ctrl));
   IBEX_TRY_SPIN_FOR(dai_finished(otp_ctrl), kOtpDaiTimeoutUs);
+  TRY(otp_ctrl_testutils_wait_for_dai_post_hook(otp_ctrl));
   return OK_STATUS();
 }
 
@@ -69,9 +71,11 @@ status_t otp_ctrl_testutils_dai_read32(const dif_otp_ctrl_t *otp,
                                        dif_otp_ctrl_partition_t partition,
                                        uint32_t address, uint32_t *result) {
   TRY(otp_ctrl_testutils_wait_for_dai(otp));
+  TRY(otp_ctrl_testutils_dai_read_pre_hook(otp));
   TRY(dif_otp_ctrl_dai_read_start(otp, partition, address));
   TRY(otp_ctrl_testutils_wait_for_dai(otp));
   TRY(dif_otp_ctrl_dai_read32_end(otp, result));
+  TRY(otp_ctrl_testutils_dai_read_post_hook(otp));
   return OK_STATUS();
 }
 
@@ -83,9 +87,11 @@ status_t otp_ctrl_testutils_dai_read32_array(const dif_otp_ctrl_t *otp,
   for (uint32_t addr = start_address, i = 0; addr < stop_address;
        addr += sizeof(uint32_t), ++i) {
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_read_pre_hook(otp));
     TRY(dif_otp_ctrl_dai_read_start(otp, partition, addr));
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
     TRY(dif_otp_ctrl_dai_read32_end(otp, &buffer[i]));
+    TRY(otp_ctrl_testutils_dai_read_post_hook(otp));
   }
   return OK_STATUS();
 }
@@ -94,9 +100,11 @@ status_t otp_ctrl_testutils_dai_read64(const dif_otp_ctrl_t *otp,
                                        dif_otp_ctrl_partition_t partition,
                                        uint32_t address, uint64_t *result) {
   TRY(otp_ctrl_testutils_wait_for_dai(otp));
+  TRY(otp_ctrl_testutils_dai_read_pre_hook(otp));
   TRY(dif_otp_ctrl_dai_read_start(otp, partition, address));
   TRY(otp_ctrl_testutils_wait_for_dai(otp));
   TRY(dif_otp_ctrl_dai_read64_end(otp, result));
+  TRY(otp_ctrl_testutils_dai_read_post_hook(otp));
   return OK_STATUS();
 }
 
@@ -108,9 +116,11 @@ status_t otp_ctrl_testutils_dai_read64_array(const dif_otp_ctrl_t *otp,
   for (uint32_t addr = start_address, i = 0; addr < stop_address;
        addr += sizeof(uint64_t), ++i) {
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_read_pre_hook(otp));
     TRY(dif_otp_ctrl_dai_read_start(otp, partition, addr));
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
     TRY(dif_otp_ctrl_dai_read64_end(otp, &buffer[i]));
+    TRY(otp_ctrl_testutils_dai_read_post_hook(otp));
   }
   return OK_STATUS();
 }
@@ -143,8 +153,11 @@ status_t otp_ctrl_testutils_dai_write32(const dif_otp_ctrl_t *otp,
   // Software partitions don't have scrambling or ECC enabled, so it is possible
   // to read the value and compare it against the expected value before
   // performing the write.
-  bool check_before_write = (partition == kDifOtpCtrlPartitionCreatorSwCfg ||
-                             partition == kDifOtpCtrlPartitionOwnerSwCfg);
+  bool check_before_write =
+      (partition == kDifOtpCtrlPartitionCreatorSwCfg ||
+       partition == kDifOtpCtrlPartitionOwnerSwCfg ||
+       partition == kDifOtpCtrlPartitionRotCreatorAuthCodesign ||
+       partition == kDifOtpCtrlPartitionRotCreatorAuthState);
   uint32_t stop_address = start_address + (len * sizeof(uint32_t));
   for (uint32_t addr = start_address, i = 0; addr < stop_address;
        addr += sizeof(uint32_t), ++i) {
@@ -162,9 +175,13 @@ status_t otp_ctrl_testutils_dai_write32(const dif_otp_ctrl_t *otp,
     }
 
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_write_pre_hook(otp));
     TRY(dif_otp_ctrl_dai_program32(otp, partition, addr, buffer[i]));
+    TRY(otp_ctrl_testutils_dai_write_post_hook(otp));
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_write_pre_error_check_hook(otp));
     TRY(otp_ctrl_dai_write_error_check(otp));
+    TRY(otp_ctrl_testutils_dai_write_post_error_check_hook(otp));
 
     TRY(otp_ctrl_testutils_dai_read32(otp, partition, addr, &read_data));
     if (read_data != buffer[i]) {
@@ -182,9 +199,13 @@ status_t otp_ctrl_testutils_dai_write64(const dif_otp_ctrl_t *otp,
   for (uint32_t addr = start_address, i = 0; addr < stop_address;
        addr += sizeof(uint64_t), ++i) {
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_write_pre_hook(otp));
     TRY(dif_otp_ctrl_dai_program64(otp, partition, addr, buffer[i]));
+    TRY(otp_ctrl_testutils_dai_write_post_hook(otp));
     TRY(otp_ctrl_testutils_wait_for_dai(otp));
+    TRY(otp_ctrl_testutils_dai_write_pre_error_check_hook(otp));
     TRY(otp_ctrl_dai_write_error_check(otp));
+    TRY(otp_ctrl_testutils_dai_write_post_error_check_hook(otp));
 
     uint64_t read_data;
     TRY(otp_ctrl_testutils_dai_read64(otp, partition, addr, &read_data));
@@ -194,3 +215,48 @@ status_t otp_ctrl_testutils_dai_write64(const dif_otp_ctrl_t *otp,
   }
   return OK_STATUS();
 }
+
+OT_WEAK
+status_t otp_ctrl_testutils_wait_for_dai_pre_hook(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_wait_for_dai_post_hook(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_write_pre_hook(const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_write_post_hook(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_read_pre_hook(const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_read_post_hook(const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_write_pre_error_check_hook(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
+
+OT_WEAK
+status_t otp_ctrl_testutils_dai_write_post_error_check_hook(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  return OK_STATUS();
+}
diff --git a/sw/device/lib/testing/otp_ctrl_testutils.h b/sw/device/lib/testing/otp_ctrl_testutils.h
index e2081d4896bfc..e83ad99aa0fcc 100644
--- a/sw/device/lib/testing/otp_ctrl_testutils.h
+++ b/sw/device/lib/testing/otp_ctrl_testutils.h
@@ -118,19 +118,21 @@ status_t otp_ctrl_testutils_dai_read64_array(const dif_otp_ctrl_t *otp,
  * Writes `len` number of 32bit words from buffer into otp `partition` starting
  * at `start_address` using the DAI interface.
  *
- * For software partitions (`kDifOtpCtrlPartitionCreatorSwCfg` or
- * `kDifOtpCtrlPartitionOwnerSwCfg`), the function will attempt to read the
- * target OTP offsets and skip the write if the existing value matches the
+ * For software partitions (`kDifOtpCtrlPartitionCreatorSwCfg`,
+ * `kDifOtpCtrlPartitionOwnerSwCfg`,
+ * `kDifOtpCtrlPartitionRotCreatorAuthCodesign`, or
+ * `kDifOtpCtrlPartitionRotCreatorAuthState`), the function will attempt to read
+ * the target OTP offsets and skip the write if the existing value matches the
  * expected one. This is possible due to the fact that software partitions are
  * not scrambled nor ECC protected.
  *
  * @param otp otp_ctrl instance.
  * @param partition OTP partition.
  * @param start_address Address relative to the start of the `partition`. Must
- * be a 32bit aligned address.
+ *                      be a 32bit aligned address.
  * @param buffer The buffer containing the data to be written into OTP.
  * @param len The number of 32bit words to write into otp. `buffer` must have at
- * least `len` 32bit words.
+ *            least `len` 32bit words.
  * @return OK_STATUS on success.
  */
 OT_WARN_UNUSED_RESULT
@@ -158,4 +160,88 @@ status_t otp_ctrl_testutils_dai_write64(const dif_otp_ctrl_t *otp,
                                         uint32_t start_address,
                                         const uint64_t *buffer, size_t len);
 
+/**
+ * Weak function to enable tests to define logic that is run immediately before
+ * spin looping on the DAI ready signal.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_wait_for_dai_pre_hook(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately after
+ * spin looping on the DAI ready signal.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_wait_for_dai_post_hook(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately before
+ * writing a 32 or 64 bit field.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_write_pre_hook(const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately after
+ * writing a 32 or 64 bit field.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_write_post_hook(const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately before
+ * reading a 32 or 64 bit field.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_read_pre_hook(const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately after
+ * reading a 32 or 64 bit field.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_read_post_hook(const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately before
+ * reading any DAI error state.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_write_pre_error_check_hook(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Weak function to enable tests to define logic that is run immediately after
+ * reading any DAI error state.
+ *
+ * @param otp otp_ctrl instance.
+ * @return OK_STATUS on success.
+ */
+OT_WARN_UNUSED_RESULT
+status_t otp_ctrl_testutils_dai_write_post_error_check_hook(
+    const dif_otp_ctrl_t *otp_ctrl);
+
 #endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_OTP_CTRL_TESTUTILS_H_
diff --git a/sw/device/lib/testing/spi_device_testutils.c b/sw/device/lib/testing/spi_device_testutils.c
index 7bdc23326f338..b081542c4d682 100644
--- a/sw/device/lib/testing/spi_device_testutils.c
+++ b/sw/device/lib/testing/spi_device_testutils.c
@@ -326,6 +326,37 @@ status_t spi_device_testutils_configure_read_pipeline(
   return OK_STATUS();
 }
 
+status_t spi_device_testutils_configure_pad_attrs(dif_pinmux_t *pinmux) {
+  dif_pinmux_pad_attr_t out_attr;
+  dif_pinmux_pad_attr_t in_attr = {.slew_rate = 1, .drive_strength = 3};
+  dif_result_t res;
+  for (uint32_t i = 0; i <= ARRAYSIZE(spi_device_direct_pads); ++i) {
+    res = dif_pinmux_pad_write_attrs(pinmux, spi_device_direct_pads[i],
+                                     kDifPinmuxPadKindDio, in_attr, &out_attr);
+    if (res == kDifError) {
+      // Some target platforms may not support the specified value for slew rate
+      // and drive strength. If that's the case, use the values actually
+      // supported.
+      if (out_attr.slew_rate != in_attr.slew_rate) {
+        LOG_INFO(
+            "Specified slew rate not supported, trying supported slew rate");
+        in_attr.slew_rate = out_attr.slew_rate;
+      }
+      if (out_attr.drive_strength != in_attr.drive_strength) {
+        LOG_INFO(
+            "Specified drive strength not supported, trying supported drive "
+            "strength");
+        in_attr.drive_strength = out_attr.drive_strength;
+      }
+      TRY(dif_pinmux_pad_write_attrs(pinmux, spi_device_direct_pads[i],
+                                     kDifPinmuxPadKindDio, in_attr, &out_attr));
+      // Note: fallthrough with the modified `in_attr` so that the same
+      // attributes are used for all pads.
+    }
+  }
+  return OK_STATUS();
+}
+
 status_t spi_device_testutils_wait_for_upload(dif_spi_device_handle_t *spid,
                                               upload_info_t *info) {
   // Wait for a SPI transaction cause an upload.
diff --git a/sw/device/lib/testing/spi_device_testutils.h b/sw/device/lib/testing/spi_device_testutils.h
index 83683be064e10..2abd812ddae03 100644
--- a/sw/device/lib/testing/spi_device_testutils.h
+++ b/sw/device/lib/testing/spi_device_testutils.h
@@ -9,9 +9,12 @@
 #include <stdint.h>
 
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_spi_device.h"
 #include "sw/device/lib/testing/json/spi_passthru.h"
 
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
 /**
  * A set of typical opcodes for named flash commands.
  */
@@ -55,6 +58,17 @@ enum spi_device_command_slot {
   kSpiDeviceWriteCommandSlotBase = 11,
 };
 
+/*
+ * The SPI device pads for which `spi_device_testutils_configure_pad_attrs()`
+ * configures the pad attributes.
+ */
+static const top_earlgrey_direct_pads_t spi_device_direct_pads[4] = {
+    kTopEarlgreyDirectPadsSpiDeviceSd3,  // sio[3]
+    kTopEarlgreyDirectPadsSpiDeviceSd2,  // sio[2]
+    kTopEarlgreyDirectPadsSpiDeviceSd1,  // sio[1]
+    kTopEarlgreyDirectPadsSpiDeviceSd0   // sio[0]
+};
+
 /**
  * Configure the SPI device in passthrough mode, allowing the following
  * commands to pass through:
@@ -112,6 +126,15 @@ status_t spi_device_testutils_configure_read_pipeline(
     dif_spi_device_read_pipeline_mode_t dual_mode,
     dif_spi_device_read_pipeline_mode_t quad_mode);
 
+/**
+ * Configure the SPI device pad attributes.
+ *
+ * @return A status_t indicating success or failure configuring the pad
+ * attributes.
+ */
+OT_WARN_UNUSED_RESULT
+status_t spi_device_testutils_configure_pad_attrs(dif_pinmux_t *pinmux);
+
 /**
  * Wait for a spi command upload.
  *
diff --git a/sw/device/lib/testing/spi_host_testutils.c b/sw/device/lib/testing/spi_host_testutils.c
index b51102e31b06a..f13981195bbbc 100644
--- a/sw/device/lib/testing/spi_host_testutils.c
+++ b/sw/device/lib/testing/spi_host_testutils.c
@@ -112,6 +112,44 @@ static const spi_host1_pinmux_pins_t kSpiHost1PinmuxMap[] = {
         },
 };
 
+status_t spi_host_testutils_configure_host0_pad_attrs(dif_pinmux_t *pinmux) {
+  // Set fast slew rate and strong drive strengh for SPI host0 pads.
+  dif_pinmux_pad_attr_t out_attr;
+  dif_pinmux_pad_attr_t in_attr = {
+      .slew_rate = 1,
+      .drive_strength = 3,
+      // Set weak pull-ups for all the pads.
+      .flags = kDifPinmuxPadAttrPullResistorEnable |
+               kDifPinmuxPadAttrPullResistorUp};
+  dif_result_t res;
+  for (uint32_t i = 0; i <= ARRAYSIZE(spi_host0_direct_pads); ++i) {
+    res = dif_pinmux_pad_write_attrs(pinmux, spi_host0_direct_pads[i],
+                                     kDifPinmuxPadKindDio, in_attr, &out_attr);
+    if (res == kDifError) {
+      // Some target platforms may not support the specified value for slew rate
+      // and drive strength. If that's the case, use the values actually
+      // supported.
+      if (out_attr.slew_rate != in_attr.slew_rate) {
+        LOG_INFO(
+            "Specified slew rate not supported, trying supported slew rate");
+        in_attr.slew_rate = out_attr.slew_rate;
+      }
+      if (out_attr.drive_strength != in_attr.drive_strength) {
+        LOG_INFO(
+            "Specified drive strength not supported, trying supported drive "
+            "strength");
+        in_attr.drive_strength = out_attr.drive_strength;
+      }
+      CHECK_DIF_OK(dif_pinmux_pad_write_attrs(pinmux, spi_host0_direct_pads[i],
+                                              kDifPinmuxPadKindDio, in_attr,
+                                              &out_attr));
+      // Note: fallthrough with the modified `in_attr` so that the same
+      // attributes are used for all pads.
+    }
+  }
+  return OK_STATUS();
+}
+
 // `extern` declarations to give the inline functions in the
 // corresponding header a link location.
 extern status_t spi_host_testutils_is_active(dif_spi_host_t *spi_host);
diff --git a/sw/device/lib/testing/spi_host_testutils.h b/sw/device/lib/testing/spi_host_testutils.h
index cdd34b87d1e34..73a4ec1b4caf1 100644
--- a/sw/device/lib/testing/spi_host_testutils.h
+++ b/sw/device/lib/testing/spi_host_testutils.h
@@ -12,6 +12,8 @@
 #include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_spi_host.h"
 
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
 typedef enum spi_pinmux_platform_id {
   kSpiPinmuxPlatformIdCw310 = 0,
   kSpiPinmuxPlatformIdCw340,
@@ -19,6 +21,28 @@ typedef enum spi_pinmux_platform_id {
   kSpiPinmuxPlatformIdCount,
 } spi_pinmux_platform_id_t;
 
+/*
+ * The SPI host pads for which `spi_host_testutils_configure_host0_pad_attrs()`
+ * configures the pad attributes.
+ */
+static const top_earlgrey_direct_pads_t spi_host0_direct_pads[6] = {
+    kTopEarlgreyDirectPadsSpiHost0Sck,  // sck
+    kTopEarlgreyDirectPadsSpiHost0Csb,  // csb
+    kTopEarlgreyDirectPadsSpiHost0Sd3,  // sio[3]
+    kTopEarlgreyDirectPadsSpiHost0Sd2,  // sio[2]
+    kTopEarlgreyDirectPadsSpiHost0Sd1,  // sio[1]
+    kTopEarlgreyDirectPadsSpiHost0Sd0   // sio[0]
+};
+
+/**
+ * Configure the pad attributes of SPI Host 0.
+ *
+ * @return A status_t indicating success or failure configuring the pad
+ * attributes.
+ */
+OT_WARN_UNUSED_RESULT
+status_t spi_host_testutils_configure_host0_pad_attrs(dif_pinmux_t *pinmux);
+
 /**
  * Return True if spi host is active.
  *
diff --git a/sw/device/lib/testing/test_framework/BUILD b/sw/device/lib/testing/test_framework/BUILD
index d7b9a14a36e12..70bb11dfd868c 100644
--- a/sw/device/lib/testing/test_framework/BUILD
+++ b/sw/device/lib/testing/test_framework/BUILD
@@ -2,52 +2,20 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@bazel_skylib//lib:dicts.bzl", "dicts")
 load("//rules:cross_platform.bzl", "dual_cc_library", "dual_inputs")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules:linker.bzl", "ld_library")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 load(
     "//rules/opentitan:defs.bzl",
     "EARLGREY_TEST_ENVS",
-    "cw310_params",
     "fpga_params",
     "opentitan_test",
     "verilator_params",
 )
-load("//rules:linker.bzl", "ld_library")
-load("@bazel_skylib//lib:dicts.bzl", "dicts")
 
 package(default_visibility = ["//visibility:public"])
 
-cc_library(
-    name = "coverage_none",
-    srcs = ["coverage_none.c"],
-    hdrs = ["coverage.h"],
-)
-
-cc_library(
-    name = "coverage_llvm",
-    srcs = [
-        "coverage_llvm.c",
-    ],
-    hdrs = ["coverage.h"],
-    linkopts = ["-lgcc"],
-    deps = [
-        "//sw/device/lib/base:crc32",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//third_party/llvm_compiler_rt",
-    ],
-)
-
-alias(
-    name = "coverage",
-    actual = select({
-        "//sw/device:measure_coverage_on_target": ":coverage_llvm",
-        "//conditions:default": ":coverage_none",
-    }),
-    visibility = ["//visibility:private"],
-)
-
 cc_library(
     name = "status",
     srcs = ["status.c"],
@@ -86,6 +54,7 @@ ld_library(
     includes = ["ottf_common.ld"],
     deps = [
         "//sw/device:info_sections",
+        "//sw/device/lib/coverage:coverage_sections",
         "//sw/device/silicon_creator/lib/base:static_critical_sections",
     ],
 )
@@ -183,6 +152,7 @@ cc_library(
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":check",
+        ":ottf_test_config",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:csr",
         "//sw/device/lib/base:macros",
@@ -190,7 +160,14 @@ cc_library(
         "//sw/device/lib/runtime:hart",
         "//sw/device/lib/runtime:ibex",
         "//sw/device/lib/runtime:log",
-    ],
+    ] + select({
+        "//sw/device:is_english_breakfast": [],
+        "//conditions:default": [
+            ":ottf_alerts",
+            "//hw/top_earlgrey:alert_handler_c_regs",
+            "//sw/device/lib/dif:alert_handler",
+        ],
+    }),
 )
 
 # This target provides start files without providing the full OTTF, and can be
@@ -216,6 +193,8 @@ cc_library(
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:csr",
         "//sw/device/lib/base:macros",
+        "//sw/device/lib/coverage:api_asm",
+        "//sw/device/lib/coverage:ottf_runtime",
         "//sw/device/lib/crt",
         "//sw/device/lib/dif:rstmgr",
         "//sw/device/lib/dif:rv_plic",
@@ -245,6 +224,25 @@ cc_library(
     ],
 )
 
+cc_library(
+    name = "ottf_alerts",
+    srcs = ["ottf_alerts.c"],
+    hdrs = ["ottf_alerts.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        "//hw/top_earlgrey:alert_handler_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:boot_stage",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/runtime:irq",
+        "//sw/device/lib/testing:alert_handler_testutils",
+        "//sw/device/lib/testing:rv_plic_testutils",
+    ],
+)
+
 cc_library(
     name = "ottf_main",
     srcs = ["ottf_main.c"],
@@ -252,7 +250,6 @@ cc_library(
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         ":check",
-        ":coverage",
         ":freertos_port",
         ":ottf_console",
         ":ottf_start",
@@ -262,6 +259,8 @@ cc_library(
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/coverage:api",
+        "//sw/device/lib/coverage:ottf_runtime",
         "//sw/device/lib/dif:rv_core_ibex",
         "//sw/device/lib/dif:uart",
         "//sw/device/lib/runtime:hart",
@@ -269,7 +268,10 @@ cc_library(
         "//sw/device/lib/testing:rand_testutils",
         "//third_party/freertos",
         "@manufacturer_test_hooks//:test_hooks",
-    ],
+    ] + select({
+        "//sw/device:is_english_breakfast": [],
+        "//conditions:default": [":ottf_alerts"],
+    }),
     # `:ottf` depends on `:ottf_start`, but `:ottf_start` gets its main function
     # from `:ottf`. Thus we need to include all of the objects in `:ottf`
     # unconditionally so that the linker can find the symbol later.
@@ -306,22 +308,32 @@ cc_library(
 dual_cc_library(
     name = "ottf_console",
     srcs = dual_inputs(
-        device = ["ottf_console.c"],
+        device = [
+            "ottf_console.c",
+            "ottf_console_uart.c",
+            "ottf_console_spi.c",
+        ],
     ),
-    hdrs = ["ottf_console.h"],
+    hdrs = [
+        "ottf_console.h",
+        "ottf_console_internal.h",
+    ],
     deps = dual_inputs(
         device = [
             ":check",
             ":ottf_isrs",
-            ":ottf_test_config",
             "//sw/device/lib/base:mmio",
             "//sw/device/lib/runtime:print",
             "//sw/device/lib/dif:rv_plic",
+            "//sw/device/lib/dif:gpio",
+            "//sw/device/lib/dif:pinmux",
             "//sw/device/lib/runtime:ibex",
             "//sw/device/lib/runtime:irq",
+            "//sw/device/lib/testing:spi_device_testutils",
             "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         ],
         shared = [
+            ":ottf_test_config",
             "//sw/device/lib/base:status",
             "//sw/device/lib/dif:uart",
             "//sw/device/lib/dif:spi_device",
diff --git a/sw/device/lib/testing/test_framework/FreeRTOSConfig.h b/sw/device/lib/testing/test_framework/FreeRTOSConfig.h
index ac636c5cb90e3..6d6a32c4b7113 100644
--- a/sw/device/lib/testing/test_framework/FreeRTOSConfig.h
+++ b/sw/device/lib/testing/test_framework/FreeRTOSConfig.h
@@ -26,7 +26,11 @@
 #define configCHECK_FOR_STACK_OVERFLOW 1
 #define configMINIMAL_STACK_SIZE 256  // in words
 #define configSTACK_DEPTH_TYPE uint16_t
+#ifndef OT_COVERAGE_INSTRUMENTED
 #define configTOTAL_HEAP_SIZE ((size_t)0x8000u)
+#else  // OT_COVERAGE_INSTRUMENTED
+#define configTOTAL_HEAP_SIZE ((size_t)0x800u)
+#endif
 #define configUSE_MALLOC_FAILED_HOOK 1
 
 // Other
diff --git a/sw/device/lib/testing/test_framework/coverage.h b/sw/device/lib/testing/test_framework/coverage.h
deleted file mode 100644
index 47a3fff2b09b3..0000000000000
--- a/sw/device/lib/testing/test_framework/coverage.h
+++ /dev/null
@@ -1,17 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_COVERAGE_H_
-#define OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_COVERAGE_H_
-
-/**
- * Sends the LLVM profile buffer along with its length and CRC32.
- *
- * This function must be called at the end of a test. Note that this profile
- * data is raw and must be indexed before it can be used to generate coverage
- * reports.
- */
-void coverage_send_buffer(void);
-
-#endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_COVERAGE_H_
diff --git a/sw/device/lib/testing/test_framework/coverage_llvm.c b/sw/device/lib/testing/test_framework/coverage_llvm.c
deleted file mode 100644
index f0a2ac53217f2..0000000000000
--- a/sw/device/lib/testing/test_framework/coverage_llvm.c
+++ /dev/null
@@ -1,70 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include <stdint.h>
-
-#include "external/llvm_compiler_rt/lib/profile/InstrProfiling.h"
-#include "sw/device/lib/base/crc32.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/runtime/print.h"
-#include "sw/device/lib/testing/test_framework/coverage.h"
-
-/**
- * When the linker finds a definition of this symbol, it knows to skip loading
- * the object which contains the profiling runtime's static initializer. See
- * https://clang.llvm.org/docs/SourceBasedCodeCoverage.html#using-the-profiling-runtime-without-static-initializers
- * for more information.
- */
-int __llvm_profile_runtime;
-
-/**
- * Coverage buffer in `.bss` to avoid stack issues.
- */
-static char buf[0x8000] = {0};
-
-/**
- * Sends the given buffer as a hex string over UART.
- *
- * Lines are limited to 80 characters. Longer buffers will be broken to multiple
- * lines.
- */
-void coverage_send_buffer(void) {
-  // It looks like we don't have a way to read the profile buffer incrementally.
-  // Thus, we define the following buffer.
-  // Write the profile buffer to the buffer defined above.
-  uint64_t buf_size_u64 = __llvm_profile_get_size_for_buffer();
-  if (buf_size_u64 > sizeof(buf)) {
-    LOG_ERROR("ERROR: LLVM profile buffer is too large: %u bytes.",
-              (uint32_t)buf_size_u64);
-    OT_UNREACHABLE();
-  } else {
-    size_t buf_size = (size_t)buf_size_u64;
-    __llvm_profile_write_buffer(buf);
-    // Send the buffer along with its length and CRC32.
-    uint32_t checksum = crc32(buf, buf_size);
-    LOG_INFO("LLVM profile data (length: %u bytes, CRC32: 0x%08x):",
-             (uint32_t)buf_size, checksum);
-    enum {
-      kBytesPerLine = 40,
-      // Print one less byte in the first line to account for "0x".
-      kBytesFirstLine = kBytesPerLine - 1,
-    };
-    size_t bytes_this_line =
-        buf_size < kBytesFirstLine ? buf_size : kBytesFirstLine;
-    char *read_ptr = (char *)buf + buf_size - bytes_this_line;
-    LOG_INFO("0x%!x", bytes_this_line, read_ptr);
-    buf_size -= bytes_this_line;
-    while (buf_size > 0) {
-      size_t bytes_this_line =
-          buf_size < kBytesPerLine ? buf_size : kBytesPerLine;
-      read_ptr -= bytes_this_line;
-      LOG_INFO("%!x", bytes_this_line, read_ptr);
-      buf_size -= bytes_this_line;
-    }
-  }
-  // Send `EOT` so that `cat` can exit. Note that this requires enabling
-  // `icanon` using `stty`.
-  base_printf("\x4");
-  base_printf("\r\n");
-}
diff --git a/sw/device/lib/testing/test_framework/coverage_none.c b/sw/device/lib/testing/test_framework/coverage_none.c
deleted file mode 100644
index 92510153bd1de..0000000000000
--- a/sw/device/lib/testing/test_framework/coverage_none.c
+++ /dev/null
@@ -1,9 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/testing/test_framework/coverage.h"
-
-// This NOP function gets linked in when coverage is disabled. See
-// `test_coverage_llvm.c` for its actual definition when coverage is enabled.
-void coverage_send_buffer(void) {}
diff --git a/sw/device/lib/testing/test_framework/ottf_alerts.c b/sw/device/lib/testing/test_framework/ottf_alerts.c
new file mode 100644
index 0000000000000..b597e82938b10
--- /dev/null
+++ b/sw/device/lib/testing/test_framework/ottf_alerts.c
@@ -0,0 +1,227 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+
+#include "sw/device/lib/arch/boot_stage.h"
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/testing/alert_handler_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+
+#include "alert_handler_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// Maximum number of alerts that can be expected at once.
+#define MAX_ALERTS_EXPECTED 16
+// Number of words required to store all alerts one per bit.
+#define ALERT_COUNT_WORDS (ALERT_HANDLER_PARAM_N_ALERTS + 31) / 32
+
+static dif_alert_handler_t ottf_alert_handler;
+
+status_t ottf_alerts_enable_all(void) {
+  TRY(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &ottf_alert_handler));
+
+  dif_alert_handler_alert_t alerts[ALERT_HANDLER_PARAM_N_ALERTS];
+  dif_alert_handler_class_t alert_classes[ARRAYSIZE(alerts)];
+  for (dif_alert_handler_alert_t i = 0; i < ARRAYSIZE(alerts); i++) {
+    alerts[i] = i;
+    alert_classes[i] = kDifAlertHandlerClassD;
+
+    // Temporarily skip alert 37 (`flash_ctrl_fatal_err`) on FPGAs and sims at
+    // the owner stage since flash will not be provisioned with expected data.
+    if (i == kTopEarlgreyAlertIdFlashCtrlFatalErr &&
+        kDeviceType != kDeviceSilicon) {
+      alerts[i] = 0;
+    }
+  }
+
+  dif_alert_handler_escalation_phase_t esc_phases[] = {
+      {.phase = kDifAlertHandlerClassStatePhase0,
+       .signal = 0,
+       .duration_cycles = 2000}};
+  dif_alert_handler_class_config_t class_config = {
+      .auto_lock_accumulation_counter = kDifToggleDisabled,
+      .accumulator_threshold = UINT16_MAX,
+      .irq_deadline_cycles = UINT32_MAX,
+      .escalation_phases = esc_phases,
+      .escalation_phases_len = ARRAYSIZE(esc_phases),
+      .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase1,
+  };
+  dif_alert_handler_class_config_t class_configs[] = {class_config};
+  dif_alert_handler_class_t classes[] = {kDifAlertHandlerClassD};
+
+  dif_alert_handler_config_t config = {
+      .alerts = alerts,
+      .alert_classes = alert_classes,
+      .alerts_len = ARRAYSIZE(alerts),
+      .classes = classes,
+      .class_configs = class_configs,
+      .classes_len = ARRAYSIZE(class_configs),
+      .ping_timeout = UINT16_MAX,
+  };
+  TRY(alert_handler_testutils_configure_all(&ottf_alert_handler, config,
+                                            kDifToggleDisabled));
+
+  TRY(dif_alert_handler_irq_set_enabled(
+      &ottf_alert_handler, kDifAlertHandlerIrqClassd, kDifToggleEnabled));
+
+  dif_rv_plic_t rv_plic;
+  TRY(dif_rv_plic_init(mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR),
+                       &rv_plic));
+
+  TRY(dif_rv_plic_irq_set_priority(&rv_plic,
+                                   kTopEarlgreyPlicIrqIdAlertHandlerClassd,
+                                   kDifRvPlicMaxPriority));
+  TRY(dif_rv_plic_irq_set_enabled(
+      &rv_plic, kTopEarlgreyPlicIrqIdAlertHandlerClassd,
+      kTopEarlgreyPlicTargetIbex0, kDifToggleEnabled));
+  TRY(dif_rv_plic_target_set_threshold(&rv_plic, kTopEarlgreyPlicTargetIbex0,
+                                       kDifRvPlicMinPriority));
+
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  return OK_STATUS();
+}
+
+status_t ottf_alerts_ignore_alert(dif_alert_handler_alert_t alert) {
+  TRY(dif_alert_handler_configure_alert(
+      &ottf_alert_handler, alert, kDifAlertHandlerClassD, kDifToggleDisabled,
+      kDifToggleDisabled));
+
+  return OK_STATUS();
+}
+
+static_assert(ALERT_HANDLER_PARAM_N_ALERTS < UINT8_MAX,
+              "alert IDs stored as bytes with 0xff as sentinel");
+
+// List of expected alerts and the number of elements in the list.
+static volatile uint8_t alert_expected[MAX_ALERTS_EXPECTED] = {0};
+static volatile size_t alert_expected_cnt = 0;
+
+// Bitmap of whether each alert has been caught while expected.
+static volatile uint32_t alert_caught[ALERT_COUNT_WORDS] = {0};
+
+void ottf_alert_isr(uint32_t *exc_info) {
+  OT_DISCARD(exc_info);
+
+  bool expected_caught = false;
+
+  // Iterate over expected alerts and check if they are currently asserted.
+  //
+  // Note: we don't want to iterate over all 65 alerts and check if they were
+  // the cause because this is too slow for an ISR. Ibex has an instruction for
+  // counting leading zeroes in `alert_expected` words so this should be faster.
+  for (int i = 0; i < alert_expected_cnt; i++) {
+    dif_alert_handler_alert_t alert =
+        (dif_alert_handler_alert_t)alert_expected[i];
+
+    bool is_cause = false;
+    CHECK_DIF_OK(dif_alert_handler_alert_is_cause(&ottf_alert_handler, alert,
+                                                  &is_cause));
+
+    if (is_cause) {
+      CHECK_DIF_OK(
+          dif_alert_handler_alert_acknowledge(&ottf_alert_handler, alert));
+      alert_caught[alert / 32] |= (1 << (alert % 32));
+      expected_caught = true;
+    }
+  }
+
+  if (!expected_caught) {
+    // Log all asserted alerts.
+    // We can pay the cost of iterating all alerts in the failure case.
+    for (dif_alert_handler_alert_t alert = 0;
+         alert < ALERT_HANDLER_PARAM_N_ALERTS; alert++) {
+      bool is_cause = false;
+      CHECK_DIF_OK(dif_alert_handler_alert_is_cause(&ottf_alert_handler, alert,
+                                                    &is_cause));
+
+      // Don't print expected alerts that were triggered at the same time as
+      // unexpected alerts (unlikely but possible).
+      bool cause_expected = false;
+      for (int i = 0; i < alert_expected_cnt; i++) {
+        if (alert_expected[i] == alert) {
+          cause_expected = true;
+          break;
+        }
+      }
+
+      if (is_cause && !cause_expected) {
+        LOG_ERROR("ERROR: Alert %d is asserted but not expected", alert);
+      }
+    }
+
+    test_status_set(kTestStatusFailed);
+    abort();
+  }
+
+  // Clear the alert escalation counter.
+  CHECK_DIF_OK(dif_alert_handler_escalation_clear(&ottf_alert_handler,
+                                                  kDifAlertHandlerClassD));
+  // Complete the IRQ at the alert handler.
+  CHECK_DIF_OK(dif_alert_handler_irq_acknowledge(&ottf_alert_handler,
+                                                 kDifAlertHandlerIrqClassd));
+}
+
+status_t ottf_alerts_expect_alert_start(dif_alert_handler_alert_t alert) {
+  if (alert < 0 || alert > kTopEarlgreyAlertIdLast) {
+    return INVALID_ARGUMENT();
+  }
+
+  // Check for a full list.
+  if (alert_expected_cnt >= MAX_ALERTS_EXPECTED) {
+    return RESOURCE_EXHAUSTED();
+  }
+
+  alert_expected[alert_expected_cnt] = (uint8_t)alert;
+  alert_expected_cnt++;
+
+  return OK_STATUS();
+}
+
+status_t ottf_alerts_expect_alert_finish(dif_alert_handler_alert_t alert) {
+  if (alert < 0 || alert > kTopEarlgreyAlertIdLast) {
+    return INVALID_ARGUMENT();
+  }
+  // Find the index of this alert in the `alert_expected` list.
+  int expected_idx = 0;
+  for (; expected_idx < alert_expected_cnt; expected_idx++) {
+    if (alert_expected[expected_idx] == alert) {
+      break;
+    }
+  }
+
+  if (alert_expected_cnt == 0 || expected_idx >= alert_expected_cnt) {
+    // This alert was not expected with `ottf_alerts_expect_alert_start`.
+    return FAILED_PRECONDITION();
+  }
+
+  // Shift the list down one space to clear this expectation.
+  if (alert_expected_cnt < MAX_ALERTS_EXPECTED) {
+    for (int i = expected_idx + 1; i < alert_expected_cnt; i++) {
+      alert_expected[i - 1] = alert_expected[i];
+    }
+  }
+  alert_expected_cnt--;
+
+  uint32_t alert_word_idx = alert / 32;
+  uint32_t alert_bit_idx = alert % 32;
+
+  if (((alert_caught[alert_word_idx] >> alert_bit_idx) & 1) == 0) {
+    // Alert was not caught when expected.
+    return NOT_FOUND();
+  }
+
+  // Forget that the alert was caught.
+  alert_caught[alert_word_idx] &= ~(1 << alert_bit_idx);
+
+  return OK_STATUS();
+}
diff --git a/sw/device/lib/testing/test_framework/ottf_alerts.h b/sw/device/lib/testing/test_framework/ottf_alerts.h
new file mode 100644
index 0000000000000..5000a9db2b7a7
--- /dev/null
+++ b/sw/device/lib/testing/test_framework/ottf_alerts.h
@@ -0,0 +1,68 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_ALERTS_H_
+#define OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_ALERTS_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+
+/**
+ * Configure and enable all alerts.
+ *
+ * Alerts are configured for class D which is configured for signal 0.
+ * The ping and IRQ deadline timers are set to their maximums.
+ * OTTF is expected to handle the class D IRQ before the alert escalates.
+ *
+ * The alert handler config is not locked and can be changed by tests.
+ *
+ * Note that this function enables external IRQs for Ibex.
+ */
+OT_WARN_UNUSED_RESULT
+status_t ottf_alerts_enable_all(void);
+
+/**
+ * Disable an alert in OTTF's alert catching configuration.
+ *
+ * Useful when a particular alert cannot be dismissed when caught.
+ *
+ * @param alert The alert to be ignored.
+ */
+OT_WARN_UNUSED_RESULT
+status_t ottf_alerts_ignore_alert(dif_alert_handler_alert_t alert);
+
+/**
+ * Record for the OTTF alert catcher that the given alert is expected.
+ *
+ * When this alert is caught, OTTF will not fault but will remember that
+ * the alert fired. Pair this with `ottf_alerts_expect_alert_finish` to
+ * confirm that the expected alert was indeed caught.
+ *
+ * @param alert The alert that is expected.
+ */
+OT_WARN_UNUSED_RESULT
+status_t ottf_alerts_expect_alert_start(dif_alert_handler_alert_t alert);
+
+/**
+ * Finish expecting an alert and confirm that OTTF caught it firing.
+ *
+ * Must be called after `ottf_alerts_expect_alert_start`. If the alert
+ * was not caught while it was expected, an error result will be returned.
+
+ * The alert will no longer be expected after this call, and OTTF will
+ * forget that it was caught.
+ *
+ * @param alert The alert that was expected.
+ */
+OT_WARN_UNUSED_RESULT
+status_t ottf_alerts_expect_alert_finish(dif_alert_handler_alert_t alert);
+
+/**
+ * OTTF alert ISR handler.
+ *
+ * Called when an alert fires on class D when OTTF alert catching is enabled.
+ */
+void ottf_alert_isr(uint32_t *exc_info);
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_ALERTS_H_
diff --git a/sw/device/lib/testing/test_framework/ottf_common.ld b/sw/device/lib/testing/test_framework/ottf_common.ld
index 86a433fd751ab..e8cbb08ba35c4 100644
--- a/sw/device/lib/testing/test_framework/ottf_common.ld
+++ b/sw/device/lib/testing/test_framework/ottf_common.ld
@@ -57,15 +57,31 @@ _manifest_address_translation = (_text_start >= ORIGIN(eflash) &&
                                  _text_start < (ORIGIN(eflash)
                                               + LENGTH(eflash))) ? 0x1d4 : 0x739;
 
+REGION_ALIAS("coverage_flash", ottf_flash);
+
+PHDRS {
+  static_critical_segment PT_LOAD;
+  manifest_segment PT_LOAD;
+  data_segment PT_LOAD;
+  freertos_segment PT_LOAD;
+  scratch_segment PT_LOAD;
+}
+
 /**
  * NOTE: We have to align each section to word boundaries as our current
  * s19->slm conversion scripts are not able to handle non-word aligned sections.
  */
 SECTIONS {
+  /**
+   * Critical static data that is accessible by both the ROM and the ROM
+   * extension.
+   */
+  INCLUDE sw/device/silicon_creator/lib/base/static_critical.ld
+
   .manifest _ottf_start_address : {
     KEEP(*(.manifest))
     . = ALIGN(4);
-  } > ottf_flash
+  } > ottf_flash : manifest_segment
 
   /**
    * Immutable ROM_EXT section.
@@ -100,20 +116,6 @@ SECTIONS {
     KEEP(*(.crt))
   } > ottf_flash
 
-  /**
-   * For LLVM profiling. This contains a pointer to the runtime initialization
-   * function that is generated by the compiler. See
-   * 'InstrProfiling::emitInitialization()' in 'InstrProfiling.cpp' and
-   * 'getInstrProfInitFuncName()' in 'InstrProf.h'.
-   */
-  .init_array : ALIGN(4) {
-      _init_array_start = .;
-      KEEP(*(.init_array))
-      KEEP(*(.init_array.*))
-      . = ALIGN(4);
-      _init_array_end = .;
-  } > ottf_flash
-
   /**
    * Standard text section, containing program code.
    */
@@ -153,17 +155,9 @@ SECTIONS {
     *(.rodata)
     *(.rodata.*)
 
-    /* Read-only sections for LLVM profiling. */
-    KEEP(*(__llvm_covfun))
-    KEEP(*(__llvm_covmap))
-    KEEP(*(__llvm_prf_names))
   } > ottf_flash
 
-  /**
-   * Critical static data that is accessible by both the ROM and the ROM
-   * extension.
-   */
-  INCLUDE sw/device/silicon_creator/lib/base/static_critical.ld
+  INCLUDE sw/device/lib/coverage/rodata.ld
 
   /**
    * Standard mutable data section, at the bottom of RAM. This will be
@@ -200,10 +194,6 @@ SECTIONS {
     *(.data)
     *(.data.*)
 
-    /* Sections for LLVM profiling. */
-    KEEP(*(__llvm_prf_cnts))
-    KEEP(*(__llvm_prf_data))
-
     /* Ensure section end is word-aligned. */
     . = ALIGN(4);
     _data_end = .;
@@ -217,7 +207,7 @@ SECTIONS {
      * Using `AT>` means we don't have to keep track of the next free part of
      * flash, as we do in our other linker scripts.
      */
-  } > ram_main AT> ottf_flash
+  } > ram_main AT> ottf_flash :data_segment
 
   /**
    * Standard BSS section. This will be zeroed at runtime by the CRT.
@@ -249,7 +239,9 @@ SECTIONS {
   .freertos.heap (NOLOAD): ALIGN(4) {
     _freertos_heap_start = .;
     *(.freertos.heap)
-  } > ram_main
+  } > ram_main :freertos_segment
+
+  INCLUDE sw/device/lib/coverage/bss.ld
 
   /**
    * Non-volatile scratch and counter areas for tests.
@@ -279,16 +271,6 @@ SECTIONS {
    _non_volatile_counter_3_end = _non_volatile_counter_2_start;
    _non_volatile_counter_3_start = _non_volatile_counter_3_end - _non_volatile_counter_size;
 
-  /**
-   * Non-volatile scratch area in flash.
-   */
-  .non_volatile_scratch _non_volatile_scratch_start (NOLOAD) : ALIGN(2048) {
-    KEEP(*(.non_volatile_scratch))
-    KEEP(*(.non_volatile_scratch.*))
-    . = _non_volatile_scratch_size;
-  } > ottf_flash
-
-
   /**
    * Non-volatile counter area in flash.
    *
@@ -296,29 +278,43 @@ SECTIONS {
    * be used by tests. Because we don't want to write to the same flash word
    * twice, tests that require non-volatile counters can use this section by
    * striking flash words to count up to `_non_volatile_counter_max_count`.
+   *
+   * The sections are ordered by ascending memory address, and thus by
+   * descending volatile counter number. That prevents linker problems.
    */
-  .non_volatile_counter_0 _non_volatile_counter_0_start (NOLOAD) : ALIGN(2048) {
-    KEEP(*(.non_volatile_counter_0))
-    KEEP(*(.non_volatile_counter_0.*))
-    . = _non_volatile_counter_size;
+  .non_volatile_counter_3 _non_volatile_counter_3_start (NOLOAD) : ALIGN(2048) {
+    KEEP(*(.non_volatile_counter_3))
+    KEEP(*(.non_volatile_counter_3.*))
+    . = ABSOLUTE(_non_volatile_counter_3_end);
+  } > ottf_flash :scratch_segment
+
+  .non_volatile_counter_2 _non_volatile_counter_2_start (NOLOAD) : ALIGN(2048) {
+    KEEP(*(.non_volatile_counter_2))
+    KEEP(*(.non_volatile_counter_2.*))
+    . = ABSOLUTE(_non_volatile_counter_2_end);
   } > ottf_flash
 
   .non_volatile_counter_1 _non_volatile_counter_1_start (NOLOAD) : ALIGN(2048) {
     KEEP(*(.non_volatile_counter_1))
     KEEP(*(.non_volatile_counter_1.*))
-    . = _non_volatile_counter_size;
+    . = ABSOLUTE(_non_volatile_counter_1_end);
   } > ottf_flash
 
-  .non_volatile_counter_2 _non_volatile_counter_2_start (NOLOAD) : ALIGN(2048) {
-    KEEP(*(.non_volatile_counter_2))
-    KEEP(*(.non_volatile_counter_2.*))
-    . = _non_volatile_counter_size;
+  .non_volatile_counter_0 _non_volatile_counter_0_start (NOLOAD) : ALIGN(2048) {
+    KEEP(*(.non_volatile_counter_0))
+    KEEP(*(.non_volatile_counter_0.*))
+    . = ABSOLUTE(_non_volatile_counter_0_end);
   } > ottf_flash
 
-  .non_volatile_counter_3 _non_volatile_counter_3_start (NOLOAD) : ALIGN(2048) {
-    KEEP(*(.non_volatile_counter_3))
-    KEEP(*(.non_volatile_counter_3.*))
-    . = _non_volatile_counter_size;
+  /**
+   * Non-volatile scratch area in flash.
+   */
+  .non_volatile_scratch _non_volatile_scratch_start (NOLOAD) : ALIGN(2048) {
+    begin_of_non_volatile_scratch = . ;
+    KEEP(*(.non_volatile_scratch))
+    KEEP(*(.non_volatile_scratch.*))
+    . = ABSOLUTE(_non_volatile_scratch_end);
+    end_of_non_volatile_scratch = . ;
   } > ottf_flash
 
   INCLUDE sw/device/info_sections.ld
diff --git a/sw/device/lib/testing/test_framework/ottf_console.c b/sw/device/lib/testing/test_framework/ottf_console.c
index 2e26b8087415e..d0fca98907c96 100644
--- a/sw/device/lib/testing/test_framework/ottf_console.c
+++ b/sw/device/lib/testing/test_framework/ottf_console.c
@@ -9,62 +9,39 @@
 
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_rv_plic.h"
 #include "sw/device/lib/dif/dif_spi_device.h"
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/ibex.h"
 #include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console_internal.h"
 #include "sw/device/lib/testing/test_framework/ottf_isrs.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 
 // TODO: make this toplevel agnostic.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "spi_device_regs.h"  // Generated.
 
 #define MODULE_ID MAKE_MODULE_ID('o', 't', 'c')
 
-/**
- * OTTF console configuration parameters.
- */
-enum {
-  /**
-   * SPI device console configuration parameters.
-   */
-  kSpiDeviceRxCommitWait = 63,  // clock cycles
-  /**
-   * Flow control parameters.
-   */
-  kFlowControlLowWatermark = 4,   // bytes
-  kFlowControlHighWatermark = 8,  // bytes
-  kFlowControlRxWatermark = kDifUartWatermarkByte8,
-  /**
-   * HART PLIC Target.
-   */
-  kPlicTarget = kTopEarlgreyPlicTargetIbex0,
-};
-
-// Potential DIF handles for OTTF console communication.
-static dif_spi_device_handle_t ottf_console_spi_device;
-static dif_uart_t ottf_console_uart;
-
-// The `flow_control_state` and `flow_control_irqs` variables are shared between
-// the interrupt service handler and user code.
-static volatile ottf_console_flow_control_t flow_control_state;
+// Main console.
+static ottf_console_t main_console;
+
 static volatile uint32_t flow_control_irqs;
 
-void *ottf_console_get(void) {
-  switch (kOttfTestConfig.console.type) {
-    case kOttfConsoleSpiDevice:
-      return &ottf_console_spi_device;
-    default:
-      return &ottf_console_uart;
-  }
-}
+// Staging buffer for the SPI console implementation.
+static char main_spi_buf[kSpiDeviceMaxFramePayloadSizeBytes];
+
+ottf_console_t *ottf_console_get(void) { return &main_console; }
 
 void ottf_console_init(void) {
   // Initialize/Configure the console device.
   uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+  main_console.type = kOttfTestConfig.console.type;
   switch (kOttfTestConfig.console.type) {
     case kOttfConsoleUart:
       // Set a default for the console base address if the base address is not
@@ -74,149 +51,135 @@ void ottf_console_init(void) {
         base_addr = TOP_EARLGREY_UART0_BASE_ADDR;
       }
 
-      ottf_console_configure_uart(base_addr);
+      ottf_console_configure_uart(&main_console, base_addr);
+      // Initialize/Configure console flow control (if requested).
+      if (kOttfTestConfig.enable_uart_flow_control) {
+        ottf_console_uart_flow_control_enable(&main_console);
+      }
       break;
     case (kOttfConsoleSpiDevice):
-      CHECK_DIF_OK(dif_spi_device_init_handle(
-          mmio_region_from_addr(kOttfTestConfig.console.base_addr),
-          &ottf_console_spi_device));
-      CHECK_DIF_OK(dif_spi_device_configure(
-          &ottf_console_spi_device,
-          (dif_spi_device_config_t){
-              .tx_order = kDifSpiDeviceBitOrderMsbToLsb,
-              .rx_order = kDifSpiDeviceBitOrderMsbToLsb,
-              .device_mode = kDifSpiDeviceModeFlashEmulation,
-          }));
-      CHECK(false, "spi_device not yet supported as OTTF console.");
+      ottf_console_configure_spi_device(
+          &main_console, base_addr, kOttfTestConfig.console_tx_indicator.enable,
+          kOttfTestConfig.console_tx_indicator.spi_console_tx_ready_gpio,
+          kOttfTestConfig.console_tx_indicator.spi_console_tx_ready_mio);
+      // For the SPI console, we use the global SPI buffer.
+      ottf_console_set_buffering(&main_console,
+                                 kOttfTestConfig.console.putbuf_buffered,
+                                 main_spi_buf, sizeof(main_spi_buf));
       break;
     default:
       CHECK(false, "unsupported OTTF console interface.");
       break;
   }
+
+  base_set_stdout(ottf_console_get_buffer_sink(&main_console));
+}
+
+uint32_t ottf_console_get_flow_control_irqs(void) { return flow_control_irqs; }
+
+bool ottf_console_flow_control_isr(uint32_t *exc_info) {
+  flow_control_irqs += 1;
+  return ottf_console_uart_flow_control_isr(exc_info, &main_console);
+}
+
+status_t ottf_console_flow_control(ottf_console_t *console,
+                                   ottf_console_flow_control_t ctrl) {
+  return ottf_console_uart_flow_control(console, ctrl);
 }
 
-void ottf_console_configure_uart(uintptr_t base_addr) {
-  CHECK_DIF_OK(
-      dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart));
-  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
-  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
-        "kClockFreqPeripheralHz must fit in uint32_t");
-  CHECK_DIF_OK(dif_uart_configure(
-      &ottf_console_uart, (dif_uart_config_t){
-                              .baudrate = (uint32_t)kUartBaudrate,
-                              .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
-                              .parity_enable = kDifToggleDisabled,
-                              .parity = kDifUartParityEven,
-                              .tx_enable = kDifToggleEnabled,
-                              .rx_enable = kDifToggleEnabled,
-                          }));
-  base_uart_stdout(&ottf_console_uart);
-
-  // Initialize/Configure console flow control (if requested).
-  if (kOttfTestConfig.enable_uart_flow_control) {
-    ottf_console_flow_control_enable();
+void ottf_console_set_buffering(ottf_console_t *console, bool enabled,
+                                char *buffer, size_t size) {
+  console->buffered = enabled;
+  if (enabled) {
+    console->buf = buffer;
+    console->buf_sz = size;
+    console->buf_end = 0;
+    memset(buffer, 0, size);
+  } else {
+    console->buf = NULL;
+    console->buf_sz = 0;
+    console->buf_end = 0;
   }
 }
 
-static uint32_t get_flow_control_watermark_plic_id(void) {
-  switch (kOttfTestConfig.console.base_addr) {
-#if !OT_IS_ENGLISH_BREAKFAST
-    case TOP_EARLGREY_UART1_BASE_ADDR:
-      return kTopEarlgreyPlicIrqIdUart1RxWatermark;
-    case TOP_EARLGREY_UART2_BASE_ADDR:
-      return kTopEarlgreyPlicIrqIdUart2RxWatermark;
-    case TOP_EARLGREY_UART3_BASE_ADDR:
-      return kTopEarlgreyPlicIrqIdUart3RxWatermark;
-#endif
-    case TOP_EARLGREY_UART0_BASE_ADDR:
-    default:
-      return kTopEarlgreyPlicIrqIdUart0RxWatermark;
+size_t ottf_console_flush(ottf_console_t *console) {
+  size_t written_len = 0;
+  if (console->buffered && console->buf_end > 0) {
+    written_len = console->sink(console, console->buf, console->buf_end);
+    size_t lost = console->buf_end - written_len;
+    console->buf_end = 0;
+    return lost;
   }
+  return 0;
 }
 
-void ottf_console_flow_control_enable(void) {
-  CHECK_DIF_OK(dif_rv_plic_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic));
-
-  dif_uart_t *uart = (dif_uart_t *)ottf_console_get();
-  CHECK_DIF_OK(dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark));
-  CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
-                                        kDifToggleEnabled));
-
-  // Set IRQ priorities to MAX
-  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
-      &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority));
-  // Set Ibex IRQ priority threshold level
-  CHECK_DIF_OK(dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget,
-                                                kDifRvPlicMinPriority));
-  // Enable IRQs in PLIC
-  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(&ottf_plic,
-                                           get_flow_control_watermark_plic_id(),
-                                           kPlicTarget, kDifToggleEnabled));
-
-  flow_control_state = kOttfConsoleFlowControlAuto;
-  irq_global_ctrl(true);
-  irq_external_ctrl(true);
-  // Make sure we're in the Resume state and we emit a Resume to the UART.
-  ottf_console_flow_control((dif_uart_t *)ottf_console_get(),
-                            kOttfConsoleFlowControlResume);
+static size_t ottf_console_write_unbuffered(ottf_console_t *console,
+                                            const char *buf, size_t len) {
+  return console->sink(console, buf, len);
 }
 
-// This version of the function is safe to call from within the ISR.
-static status_t manage_flow_control(const dif_uart_t *uart,
-                                    ottf_console_flow_control_t ctrl) {
-  if (flow_control_state == kOttfConsoleFlowControlNone) {
-    return OK_STATUS((int32_t)flow_control_state);
-  }
-  if (ctrl == kOttfConsoleFlowControlAuto) {
-    uint32_t avail;
-    TRY(dif_uart_rx_bytes_available(uart, &avail));
-    if (avail < kFlowControlLowWatermark &&
-        flow_control_state != kOttfConsoleFlowControlResume) {
-      // Enable RX watermark interrupt when RX FIFO level is below the
-      // watermark.
-      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
-                                            kDifToggleEnabled));
-      ctrl = kOttfConsoleFlowControlResume;
-    } else if (avail >= kFlowControlHighWatermark &&
-               flow_control_state != kOttfConsoleFlowControlPause) {
-      ctrl = kOttfConsoleFlowControlPause;
-      // RX watermark interrupt is status type, so disable the interrupt whilst
-      // RX FIFO is above the watermark to avoid an inifite loop of ISRs.
-      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
-                                            kDifToggleDisabled));
-    } else {
-      return OK_STATUS((int32_t)flow_control_state);
+static size_t ottf_console_write_buffered(ottf_console_t *console,
+                                          const char *buf, size_t len) {
+  if (len > console->buf_sz) {
+    // Flush and skip the staging buffer if the payload is already the max size.
+    size_t lost = ottf_console_flush(console);
+    if (lost > 0) {
+      return 0;
     }
+    return ottf_console_write_unbuffered(console, buf, len);
+  } else if ((console->buf_end + len) <= console->buf_sz) {
+    // There is room for the data in the staging buffer, copy it over.
+    memcpy(&console->buf[console->buf_end], buf, len);
+    console->buf_end += len;
+    return len;
+  } else {
+    // The staging buffer is almost full; flush it before staging more data.
+    size_t lost = ottf_console_flush(console);
+    if (lost > 0) {
+      return 0;
+    }
+    memcpy(&console->buf[console->buf_end], buf, len);
+    console->buf_end += len;
+    return len;
   }
-  uint8_t byte = (uint8_t)ctrl;
-  CHECK_DIF_OK(dif_uart_bytes_send(uart, &byte, 1, NULL));
-  flow_control_state = ctrl;
-  return OK_STATUS((int32_t)flow_control_state);
 }
 
-bool ottf_console_flow_control_isr(uint32_t *exc_info) {
-  dif_uart_t *uart = (dif_uart_t *)ottf_console_get();
-  flow_control_irqs += 1;
-  bool rx;
-  CHECK_DIF_OK(dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx));
-  if (rx) {
-    manage_flow_control(uart, kOttfConsoleFlowControlAuto);
-    CHECK_DIF_OK(dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark));
-    return true;
+static size_t ottf_console_write(ottf_console_t *console, const char *buf,
+                                 size_t len) {
+  if (console->buffered) {
+    return ottf_console_write_buffered(console, buf, len);
+  } else {
+    return ottf_console_write_unbuffered(console, buf, len);
   }
-  return false;
 }
 
-// The public API has to save and restore interrupts to avoid an
-// unexpected write to the global `flow_control_state`.
-status_t ottf_console_flow_control(const dif_uart_t *uart,
-                                   ottf_console_flow_control_t ctrl) {
-  dif_uart_irq_enable_snapshot_t snapshot;
-  CHECK_DIF_OK(dif_uart_irq_disable_all(uart, &snapshot));
-  status_t s = manage_flow_control(uart, ctrl);
-  CHECK_DIF_OK(dif_uart_irq_restore_all(uart, &snapshot));
-  return s;
+/**
+ * Type-erased API for use with ujson.
+ */
+
+status_t ottf_console_flushbuf(void *io) {
+  ottf_console_t *console = io;
+  size_t lost = ottf_console_flush(console);
+  if (lost > 0) {
+    return DATA_LOSS((int32_t)lost);
+  }
+  return OK_STATUS(0);
 }
 
-uint32_t ottf_console_get_flow_control_irqs(void) { return flow_control_irqs; }
+status_t ottf_console_putbuf(void *io, const char *buf, size_t len) {
+  ottf_console_t *console = io;
+  size_t written_len = ottf_console_write(console, buf, len);
+  if (len != written_len) {
+    return DATA_LOSS((int32_t)(len - written_len));
+  }
+  return OK_STATUS((int32_t)len);
+}
+
+status_t ottf_console_getc(void *io) {
+  ottf_console_t *console = io;
+  return console->getc(io);
+}
+
+buffer_sink_t ottf_console_get_buffer_sink(ottf_console_t *console) {
+  return (buffer_sink_t){.data = (void *)console, .sink = console->sink};
+}
diff --git a/sw/device/lib/testing/test_framework/ottf_console.h b/sw/device/lib/testing/test_framework/ottf_console.h
index 04d30619087a0..32f50ecf59020 100644
--- a/sw/device/lib/testing/test_framework/ottf_console.h
+++ b/sw/device/lib/testing/test_framework/ottf_console.h
@@ -8,7 +8,11 @@
 #include <stdint.h>
 
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_spi_device.h"
 #include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 
 /**
  * Flow control state.
@@ -30,10 +34,50 @@ typedef enum ottf_console_flow_control {
   kOttfConsoleFlowControlPause = 19,
 } ottf_console_flow_control_t;
 
+/**
+ * OTTF console state.
+ */
+typedef struct ottf_console {
+  /** Console type. */
+  ottf_console_type_t type;
+  /* Function pointer to the currently active data sink. */
+  sink_func_ptr sink;
+  /* Function pointer to a function that retrieves a single character. */
+  status_t (*getc)(void *);
+  /* Enable SW buffering. */
+  bool buffered;
+  /** Staging buffer. */
+  char *buf;
+  /** Staging buffer size. */
+  size_t buf_sz;
+  /** Where to write next to the staging buffer. */
+  size_t buf_end;
+  /** Auxiliary data, per console type */
+  union {
+    /** UART data. */
+    struct {
+      /** DIF handle. */
+      dif_uart_t dif;
+      // This variable is shared between the interrupt service handler and user
+      // code.
+      volatile ottf_console_flow_control_t flow_control_state;
+    } uart;
+    /** SPI device data. */
+    struct {
+      /** DIF handle. */
+      dif_spi_device_handle_t dif;
+      /** SPI device frame number. */
+      uint32_t frame_num;
+      /** TX ready GPIO, set to kOttfSpiNoTxGpio if not used. */
+      dif_gpio_pin_t tx_ready_gpio;
+    } spi;
+  } data;
+} ottf_console_t;
+
 /**
  * Returns a pointer to the OTTF console device DIF handle.
  */
-void *ottf_console_get(void);
+ottf_console_t *ottf_console_get(void);
 
 /**
  * Initializes the OTTF console device and connects to the printf buffer.
@@ -43,18 +87,50 @@ void ottf_console_init(void);
 /**
  * Configures the given UART to be used by the OTTF console.
  *
+ * @param console Console pointer
  * @param base_addr The base address of the UART to use.
  */
-void ottf_console_configure_uart(uintptr_t base_addr);
+void ottf_console_configure_uart(ottf_console_t *console, uintptr_t base_addr);
+
+/**
+ * Configures the given SPI device to be used by the OTTF console.
+ *
+ * @param console Console pointer
+ * @param base_addr The base address of the SPI device to use.
+ * @param tx_ready_enable Enable TX indicator
+ * @param tx_ready_gpio If TX indicator is enable, GPIO number to use.
+ * @param tx_ready_mio If TX indicator is enable, MIO number to which to connect
+ * it.
+ */
+void ottf_console_configure_spi_device(ottf_console_t *console,
+                                       uintptr_t base_addr,
+                                       bool tx_ready_enable,
+                                       uint32_t tx_ready_gpio,
+                                       uint32_t tx_ready_mio);
+
+/**
+ * Configures software buffering of the console.
+ *
+ * If the console previously had buffering enabled, disabling buffering will
+ * simply drop the content of the staging buffer. Therefore the content should
+ * be flushed before disabling buffering.
+ *
+ * @param console Pointer to the console to configure
+ * @param enable Enable/Disable buffering.
+ * @param buffer Staging buffer used for buffering.
+ * @param size Length of the staging buffer.
+ */
+void ottf_console_set_buffering(ottf_console_t *console, bool enabled,
+                                char *buffer, size_t size);
 
 /**
  * Manage flow control by inspecting the OTTF console device's receive FIFO.
  *
- * @param uart A UART handle.
+ * @param uart A Pointer to the console.
  * @param ctrl Set the next desired flow-control state.
  * @return The new state.
  */
-status_t ottf_console_flow_control(const dif_uart_t *uart,
+status_t ottf_console_flow_control(ottf_console_t *console,
                                    ottf_console_flow_control_t ctrl);
 
 /**
@@ -67,11 +143,19 @@ status_t ottf_console_flow_control(const dif_uart_t *uart,
  *
  * This function configures UART interrupts at the PLIC and enables interrupts
  * at the CPU.
+ *
+ * WARNING Control requires IRQ dispatching. The main console will automatically
+ * dispatch control IRQs on calls to `ottf_console_flow_control_isr`. If you
+ * want to dispatch control flow IRQs for non-main console, you must call
+ * manually call `ottf_console_uart_flow_control_isr` on the console from your
+ * IRQ handler.
+ *
+ * @param console Pointer to the console.
  */
-void ottf_console_flow_control_enable(void);
+void ottf_console_uart_flow_control_enable(ottf_console_t *console);
 
 /**
- * Manage console flow control from interrupt context.
+ * Manage console flow control *for the main console* from interrupt context.
  *
  * Call this when a console UART interrupt triggers.
  *
@@ -81,10 +165,75 @@ void ottf_console_flow_control_enable(void);
  */
 bool ottf_console_flow_control_isr(uint32_t *exc_info);
 
+/**
+ * Manage console flow control from interrupt context.
+ *
+ * You should only call this function directly for *non-main* consoles.
+ *
+ * @param exc_info The OTTF execution info passed to all ISRs.
+ * @param console Pointer to the console.
+ * @return True if an RX Watermark IRQ was detected and handled. False
+ * otherwise.
+ */
+bool ottf_console_uart_flow_control_isr(uint32_t *exc_info,
+                                        ottf_console_t *console);
+
 /**
  * Returns the number of OTTF console flow control interrupts that have
  * occurred.
  */
 uint32_t ottf_console_get_flow_control_irqs(void);
 
+/**
+ * Read data from the host via the OTTF SPI device console into a provided
+ * buffer.
+ *
+ * The function waits for spi upload commands, then transfers data in chunks
+ * until a transmission complete signal is received. If the size of data sent
+ * from the host is greater than the provided buffer, then the excess data will
+ * be discarded.
+ *
+ * @param buf_size The size, in bytes, of the `buf`.
+ * @param[out] buf A pointer to the location where the data should be stored.
+ * @return The number of bytes actually received from the host.
+ */
+size_t ottf_console_spi_device_read(ottf_console_t *console, size_t buf_size,
+                                    uint8_t *const buf);
+
+/**
+ * Write a buffer to the OTTF console.
+ *
+ * @param io An IO context: pointer to an `ottf_console_t`.
+ * @param buf The buffer to write to the OTTF console.
+ * @param len The length of the buffer.
+ * @return OK or an error.
+ */
+status_t ottf_console_putbuf(void *io, const char *buf, size_t len);
+
+/**
+ * Flush remaining buffered data to the OTTF console.
+ *
+ * @param io An IO context: pointer to an `ottf_console_t`.
+ * @return OK or an error.
+ */
+status_t ottf_console_flushbuf(void *io);
+
+/**
+ * Get a single character from the OTTF console.
+ *
+ * @param io An IO context: pointer to an `ottf_console_t`.
+ * @return The next character or an error.
+ */
+status_t ottf_console_getc(void *io);
+
+/**
+ * Get a buffer sink object for a console.
+ *
+ * This buffer sink can be used with `base_fprintf`.
+ *
+ * @param console Pointer to the console object.
+ * @return A buffer sink.
+ */
+buffer_sink_t ottf_console_get_buffer_sink(ottf_console_t *console);
+
 #endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_CONSOLE_H_
diff --git a/sw/device/lib/testing/test_framework/ottf_console_internal.h b/sw/device/lib/testing/test_framework/ottf_console_internal.h
new file mode 100644
index 0000000000000..4a5fa55715cf0
--- /dev/null
+++ b/sw/device/lib/testing/test_framework/ottf_console_internal.h
@@ -0,0 +1,38 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+#ifndef OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_CONSOLE_INTERNAL_H_
+#define OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_CONSOLE_INTERNAL_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_spi_device.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+
+#include "spi_device_regs.h"  // Generated.
+
+/**
+ * SPI console buffer management constants.
+ */
+enum {
+  kSpiDeviceReadBufferSizeBytes =
+      SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH * sizeof(uint32_t),
+  kSpiDeviceFrameHeaderSizeBytes = 12,
+  kSpiDeviceBufferPreservedSizeBytes = kSpiDeviceFrameHeaderSizeBytes,
+  kSpiDeviceMaxFramePayloadSizeBytes = kSpiDeviceReadBufferSizeBytes -
+                                       kSpiDeviceFrameHeaderSizeBytes -
+                                       kSpiDeviceBufferPreservedSizeBytes - 4,
+  kSpiDeviceFrameMagicNumber = 0xa5a5beef,
+};
+
+void ottf_console_uart_flow_control_enable(ottf_console_t *console);
+bool ottf_console_uart_flow_control_isr(uint32_t *exc_info,
+                                        ottf_console_t *console);
+status_t ottf_console_uart_flow_control(ottf_console_t *console,
+                                        ottf_console_flow_control_t ctrl);
+
+#endif  // OPENTITAN_SW_DEVICE_LIB_TESTING_TEST_FRAMEWORK_OTTF_CONSOLE_INTERNAL_H_
diff --git a/sw/device/lib/testing/test_framework/ottf_console_spi.c b/sw/device/lib/testing/test_framework/ottf_console_spi.c
new file mode 100644
index 0000000000000..b9d1c6b211279
--- /dev/null
+++ b/sw/device/lib/testing/test_framework/ottf_console_spi.c
@@ -0,0 +1,445 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console_internal.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "spi_device_regs.h"  // Generated.
+
+static dif_gpio_t ottf_console_gpio;
+static dif_pinmux_t ottf_console_pinmux;
+
+enum {
+  /* Placeholder used to indicate that no TX GPIO indicator is enabled. */
+  kOttfSpiNoTxGpio = UINT32_MAX,
+};
+
+static status_t spi_device_send_data(dif_spi_device_handle_t *spi_device,
+                                     const uint8_t *buf, size_t len,
+                                     size_t address) {
+  if (len == 0) {
+    return OK_STATUS();
+  }
+
+  size_t space_to_end_of_buffer = kSpiDeviceReadBufferSizeBytes - address;
+  size_t first_part_size =
+      space_to_end_of_buffer < len ? space_to_end_of_buffer : len;
+
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+                                        kDifSpiDeviceFlashBufferTypeEFlash,
+                                        address, first_part_size, buf));
+
+  // Handle wrap-around.
+  if (first_part_size < len) {
+    size_t second_part_size = len - first_part_size;
+    TRY(dif_spi_device_write_flash_buffer(
+        spi_device, kDifSpiDeviceFlashBufferTypeEFlash, 0, second_part_size,
+        (uint8_t *)(buf + first_part_size)));
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * Sends data out of the SPI device.
+ *
+ * Data is packaged into a frame that is described below.
+ * The host side reads the header first, then decides how many words
+ * to read from the data section.
+ *
+ * -----------------------------------------------
+ * |      Magic Number     | 4-bytes  |          |
+ * -----------------------------------|          |
+ * |      Frame Number     | 4-bytes  |  Header  |
+ * -----------------------------------|          |
+ * |   Data Length (bytes) | 4-bytes  |          |
+ * -----------------------------------|----------|
+ * |      Data (word aligned)         |          |
+ * -----------------------------------|   Data   |
+ * |     0xFF Pad Bytes    | <4-bytes |          |
+ * -----------------------------------|----------|
+ */
+static size_t spi_device_send_frame(ottf_console_t *console, const char *buf,
+                                    size_t len) {
+  dif_spi_device_handle_t *spi_device = &console->data.spi.dif;
+  const size_t data_packet_size_bytes = ((len + 3u) & ~3u);
+  const size_t frame_size_bytes =
+      kSpiDeviceFrameHeaderSizeBytes + data_packet_size_bytes;
+  uint8_t frame_header_bytes[kSpiDeviceFrameHeaderSizeBytes];
+
+  static uint32_t next_write_address = 0;
+
+  if (frame_size_bytes >= kSpiDeviceReadBufferSizeBytes) {
+    return 0;
+  }
+
+  // Add the magic bytes.
+  for (size_t i = 0; i < 4; ++i) {
+    frame_header_bytes[i] = (kSpiDeviceFrameMagicNumber >> (i * 8)) & 0xff;
+  }
+  // Add the frame number.
+  for (size_t i = 0; i < 4; ++i) {
+    frame_header_bytes[i + 4] = (console->data.spi.frame_num >> (i * 8)) & 0xff;
+  }
+  // Add the data length.
+  for (size_t i = 0; i < 4; ++i) {
+    frame_header_bytes[i + 8] = (len >> (i * 8)) & 0xff;
+  }
+
+  // Wait for enough space to free up in the SPI flash buffer if we are in
+  // operating in polling mode.
+  if (console->data.spi.tx_ready_gpio == kOttfSpiNoTxGpio) {
+    uint32_t available_buffer_size = 0;
+    uint32_t last_read_address = 0;
+    do {
+      if (dif_spi_device_get_last_read_address(spi_device,
+                                               &last_read_address) != kDifOk) {
+        return 0;
+      }
+
+      // If we are not using the GPIO TX-ready indicator pin (which is the
+      // default) the host SPI console is constantly polling the spi_device to
+      // see if data is available to be read out. In this case, we need to
+      // adjust the last read address.
+      //
+      // Specifically, when the host is continuously reading from the read
+      // buffer, it is unaware of whether it is going to find a valid new frame
+      // (marked by a magic number in the frame header), an frame header all
+      // zeros, or garbage, since it is operating in polling mode. This could
+      // result in the reported last_read_address being one header size ahead of
+      // the actual address of the last valid frame if all the frames in the
+      // read buffer has been consumed by the host. While it's harmless to use
+      // the last read address even if the reported value is a frame header
+      // ahead, doing so might temporarily underestimate the available buffer
+      // size by the size of a frame header (or 12 bytes to be specific).
+      //
+      // However, if we are using the GPIO TX-ready indicator pin, the host will
+      // only ever attempt to read out data if it was signaled to do so by the
+      // device. In which case the next write address will always be 0, i.e.,
+      // the beginning of the buffer.
+      uint32_t adjusted_last_read_address =
+          (kSpiDeviceReadBufferSizeBytes + last_read_address -
+           kSpiDeviceFrameHeaderSizeBytes) %
+          kSpiDeviceReadBufferSizeBytes;
+
+      // Frames are always word aligned, so ensure the last read address is word
+      // aligned too.
+      uint32_t next_read_address = ((adjusted_last_read_address + 1) & ~3u) %
+                                   kSpiDeviceReadBufferSizeBytes;
+
+      // Compute the remaining free space in the SPI flash buffer.
+      if (next_read_address > next_write_address) {
+        available_buffer_size = next_read_address - next_write_address - 1;
+      } else {
+        available_buffer_size =
+            next_read_address +
+            (kSpiDeviceReadBufferSizeBytes - next_write_address) - 1;
+      }
+    } while ((frame_size_bytes + kSpiDeviceBufferPreservedSizeBytes) >
+             available_buffer_size);
+  }
+
+  // Send aligned data.
+  size_t data_write_address =
+      (next_write_address + kSpiDeviceFrameHeaderSizeBytes) %
+      kSpiDeviceReadBufferSizeBytes;
+  size_t aligned_data_len = len & (~3u);
+  if (!status_ok(spi_device_send_data(spi_device, (uint8_t *)buf,
+                                      aligned_data_len, data_write_address))) {
+    return 0;
+  }
+
+  // Send unaligned data.
+  if (len != aligned_data_len) {
+    uint8_t pad_bytes[4] = {0xff, 0xff, 0xff, 0xff};
+    size_t pad_write_address =
+        (data_write_address + aligned_data_len) % kSpiDeviceReadBufferSizeBytes;
+
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+      pad_bytes[i] = buf[aligned_data_len + i];
+    }
+    if (!status_ok(spi_device_send_data(spi_device, pad_bytes, 4,
+                                        pad_write_address))) {
+      return 0;
+    }
+  }
+
+  // Send frame header.
+  if (!status_ok(spi_device_send_data(spi_device, frame_header_bytes,
+                                      kSpiDeviceFrameHeaderSizeBytes,
+                                      next_write_address))) {
+    return 0;
+  }
+
+  // Update the next write address and frame number.
+  next_write_address =
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+  console->data.spi.frame_num++;
+
+  // If using the GPIO TX-ready indicator pin, toggle it high to signal to the
+  // host that there is data in the egress buffer, and then block until the host
+  // reads out the entire frame. Clear the TX-ready indicator pin before
+  // continuing.
+  if (console->data.spi.tx_ready_gpio != kOttfSpiNoTxGpio) {
+    OT_DISCARD(dif_gpio_write(&ottf_console_gpio,
+                              console->data.spi.tx_ready_gpio, true));
+    bool cs_state = true;
+    bool target_cs_state = false;
+    // There will be two bulk transfers that can be synchronized by the
+    // chip-select action. First the host will read out the 12-byte frame
+    // header, followed by the N-byte payload. Each transfer is framed on the
+    // wire by observing the chip-select first toggling high->low then
+    // low->high.
+    //
+    // After the first toggle low, when the host begins reading out the frame
+    // header, we can deassert the TX-ready pin as the host will continue to
+    // complete two SPI transfers regardless.
+    for (size_t i = 0; i < 4; ++i) {
+      // Repeat four times, because there are 4 CSB-toggle events in two
+      // standard SPI transfers.
+
+      // Query the state of CSB until it changes.
+      do {
+        if (dif_spi_device_get_csb_status(spi_device, &cs_state) != kDifOk) {
+          return 0;
+        }
+      } while (cs_state != target_cs_state);
+      target_cs_state = !target_cs_state;
+
+      // After the first toggle of CSB (high->low, the start of the header
+      // transfer), the HOST is already going to queue up and complete 2 full
+      // transfers, so we can de-assert the TX-Ready indicator GPIO.
+      if (i == 0) {
+        OT_DISCARD(dif_gpio_write(&ottf_console_gpio,
+                                  console->data.spi.tx_ready_gpio, false));
+      }
+    }
+
+    // Reset the write_address before returning.
+    next_write_address = 0;
+  }
+
+  return len;
+}
+
+static void spi_device_clear_flash_buffer(dif_spi_device_handle_t *spi_device) {
+  const uint8_t kEmptyPattern[4] = {0};
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+        spi_device, kDifSpiDeviceFlashBufferTypeEFlash,
+        i * ARRAYSIZE(kEmptyPattern), ARRAYSIZE(kEmptyPattern), kEmptyPattern));
+  }
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+}
+
+static void spi_device_wait_for_sync(dif_spi_device_handle_t *spi_device) {
+  // Write the boot synchronization data to the flash buffer.
+  const uint8_t kBootMagicPattern[4] = {0x02, 0xb0, 0xfe, 0xca};
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+        spi_device, kDifSpiDeviceFlashBufferTypeEFlash,
+        i * ARRAYSIZE(kBootMagicPattern), ARRAYSIZE(kBootMagicPattern),
+        kBootMagicPattern));
+  }
+
+  // Wait for host to read out the boot synchronization data.
+  upload_info_t info = {0};
+  CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+
+  // Clear the boot magic data in the flash buffer that the host echoed back.
+  spi_device_clear_flash_buffer(spi_device);
+}
+
+static bool spi_tx_last_data_chunk(upload_info_t *info) {
+  const static size_t kSpiTxTerminateMagicAddress = 0x100;
+  return info->address == kSpiTxTerminateMagicAddress;
+}
+
+size_t ottf_console_spi_device_read(ottf_console_t *console, size_t buf_size,
+                                    uint8_t *const buf) {
+  size_t received_data_len = 0;
+  upload_info_t info;
+  memset(&info, 0, sizeof(upload_info_t));
+  while (!spi_tx_last_data_chunk(&info)) {
+    CHECK_STATUS_OK(
+        spi_device_testutils_wait_for_upload(&console->data.spi.dif, &info));
+    if (received_data_len < buf_size) {
+      size_t remaining_buf_size = buf_size - received_data_len;
+      size_t bytes_to_copy = remaining_buf_size < info.data_len
+                                 ? remaining_buf_size
+                                 : info.data_len;
+      memcpy(buf + received_data_len, info.data, bytes_to_copy);
+    }
+
+    received_data_len += info.data_len;
+    CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(
+        &console->data.spi.dif, 0x00));
+  }
+
+  return received_data_len;
+}
+
+static size_t ottf_console_spi_sink(void *io, const char *buf, size_t len) {
+  ottf_console_t *console = io;
+  size_t write_data_len = 0;
+
+  while (write_data_len < len) {
+    size_t payload_len = len - write_data_len;
+    if (payload_len > kSpiDeviceMaxFramePayloadSizeBytes) {
+      payload_len = kSpiDeviceMaxFramePayloadSizeBytes;
+    }
+    if (spi_device_send_frame(console, buf + write_data_len, payload_len) ==
+        payload_len) {
+      write_data_len += payload_len;
+    }
+  }
+
+  return write_data_len;
+}
+
+/*
+ * The user of this function needs to be aware of the following:
+ * 1. The exact amount of data expected to be sent from the host side must be
+ * known in advance.
+ * 2. Characters should be retrieved from the console as soon as they become
+ * available. Failure to do so may result in an SPI transaction timeout.
+ */
+static status_t ottf_console_spi_getc(void *io) {
+  ottf_console_t *console = io;
+  dif_spi_device_handle_t *spi_device = &console->data.spi.dif;
+  static size_t index = 0;
+  static upload_info_t info = {0};
+  if (index == info.data_len) {
+    memset(&info, 0, sizeof(upload_info_t));
+    CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+    index = 0;
+    CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+  }
+
+  return OK_STATUS(info.data[index++]);
+}
+
+void ottf_console_configure_spi_device(ottf_console_t *console,
+                                       uintptr_t base_addr,
+                                       bool tx_ready_enable,
+                                       uint32_t tx_ready_gpio,
+                                       uint32_t tx_ready_mio) {
+  CHECK_DIF_OK(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR),
+                             &ottf_console_gpio));
+  CHECK_DIF_OK(
+      dif_pinmux_init(mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR),
+                      &ottf_console_pinmux));
+  dif_spi_device_handle_t *spi_device = &console->data.spi.dif;
+  // Configure spi_device SPI flash emulation.
+  CHECK_DIF_OK(
+      dif_spi_device_init_handle(mmio_region_from_addr(base_addr), spi_device));
+  CHECK_DIF_OK(dif_spi_device_configure(
+      spi_device, (dif_spi_device_config_t){
+                      .tx_order = kDifSpiDeviceBitOrderMsbToLsb,
+                      .rx_order = kDifSpiDeviceBitOrderMsbToLsb,
+                      .device_mode = kDifSpiDeviceModeFlashEmulation,
+                  }));
+  dif_spi_device_flash_command_t read_commands[] = {
+      {
+          // Slot 0: ReadStatus1
+          .opcode = kSpiDeviceFlashOpReadStatus1,
+          .address_type = kDifSpiDeviceFlashAddrDisabled,
+          .dummy_cycles = 0,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+      {
+          // Slot 1: ReadStatus2
+          .opcode = kSpiDeviceFlashOpReadStatus2,
+          .address_type = kDifSpiDeviceFlashAddrDisabled,
+          .dummy_cycles = 0,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+      {
+          // Slot 2: ReadStatus3
+          .opcode = kSpiDeviceFlashOpReadStatus3,
+          .address_type = kDifSpiDeviceFlashAddrDisabled,
+          .dummy_cycles = 0,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+      {
+          // Slot 3: ReadJedecID
+          .opcode = kSpiDeviceFlashOpReadJedec,
+          .address_type = kDifSpiDeviceFlashAddrDisabled,
+          .dummy_cycles = 0,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+      {
+          // Slot 4: ReadSfdp
+          .opcode = kSpiDeviceFlashOpReadSfdp,
+          .address_type = kDifSpiDeviceFlashAddr3Byte,
+          .dummy_cycles = 8,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+      {
+          // Slot 5: ReadNormal
+          .opcode = kSpiDeviceFlashOpReadNormal,
+          .address_type = kDifSpiDeviceFlashAddr3Byte,
+          .dummy_cycles = 0,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceReadCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+        spi_device, slot, kDifToggleEnabled, read_commands[i]));
+  }
+  dif_spi_device_flash_command_t write_commands[] = {
+      {
+          // Slot 11: PageProgram
+          .opcode = kSpiDeviceFlashOpPageProgram,
+          .address_type = kDifSpiDeviceFlashAddrCfg,
+          .payload_io_type = kDifSpiDevicePayloadIoSingle,
+          .payload_dir_to_host = false,
+          .upload = true,
+          .set_busy_status = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(write_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceWriteCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+        spi_device, slot, kDifToggleEnabled, write_commands[i]));
+  }
+
+  console->data.spi.frame_num = 0;
+
+  // Setup TX GPIO if requested.
+  if (tx_ready_enable) {
+    console->data.spi.tx_ready_gpio = tx_ready_gpio;
+    CHECK_DIF_OK(dif_pinmux_output_select(
+        &ottf_console_pinmux, tx_ready_mio,
+        kTopEarlgreyPinmuxOutselGpioGpio0 + tx_ready_gpio));
+    CHECK_DIF_OK(dif_gpio_write(&ottf_console_gpio, tx_ready_gpio, false));
+    CHECK_DIF_OK(
+        dif_gpio_output_set_enabled(&ottf_console_gpio, tx_ready_gpio, true));
+    spi_device_clear_flash_buffer(spi_device);
+  } else {
+    console->data.spi.tx_ready_gpio = kOttfSpiNoTxGpio;
+    spi_device_wait_for_sync(spi_device);
+  }
+
+  console->getc = ottf_console_spi_getc;
+  console->sink = ottf_console_spi_sink;
+}
diff --git a/sw/device/lib/testing/test_framework/ottf_console_uart.c b/sw/device/lib/testing/test_framework/ottf_console_uart.c
new file mode 100644
index 0000000000000..56c6c8b2f30d2
--- /dev/null
+++ b/sw/device/lib/testing/test_framework/ottf_console_uart.c
@@ -0,0 +1,177 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_console_internal.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+/**
+ * OTTF console configuration parameters.
+ */
+enum {
+  /**
+   * Flow control parameters.
+   */
+  kFlowControlLowWatermark = 4,   // bytes
+  kFlowControlHighWatermark = 8,  // bytes
+  kFlowControlRxWatermark = kDifUartWatermarkByte8,
+  /**
+   * HART PLIC Target.
+   */
+  kPlicTarget = kTopEarlgreyPlicTargetIbex0,
+};
+
+static status_t ottf_console_uart_getc(void *io) {
+  ottf_console_t *console = io;
+  uint8_t byte;
+  TRY(dif_uart_byte_receive_polled(&console->data.uart.dif, &byte));
+  TRY(ottf_console_flow_control(io, kOttfConsoleFlowControlAuto));
+  return OK_STATUS(byte);
+}
+
+static size_t ottf_console_uart_sink(void *io, const char *buf, size_t len) {
+  ottf_console_t *console = io;
+  for (size_t i = 0; i < len; ++i) {
+    if (dif_uart_byte_send_polled(&console->data.uart.dif, (uint8_t)buf[i]) !=
+        kDifOk) {
+      return i;
+    }
+  }
+  return len;
+}
+
+void ottf_console_configure_uart(ottf_console_t *console, uintptr_t base_addr) {
+  CHECK_DIF_OK(
+      dif_uart_init(mmio_region_from_addr(base_addr), &console->data.uart.dif));
+  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
+  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
+        "kClockFreqPeripheralHz must fit in uint32_t");
+  CHECK_DIF_OK(
+      dif_uart_configure(&console->data.uart.dif,
+                         (dif_uart_config_t){
+                             .baudrate = (uint32_t)kUartBaudrate,
+                             .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
+                             .parity_enable = kDifToggleDisabled,
+                             .parity = kDifUartParityEven,
+                             .tx_enable = kDifToggleEnabled,
+                             .rx_enable = kDifToggleEnabled,
+                         }));
+
+  console->getc = ottf_console_uart_getc;
+  console->sink = ottf_console_uart_sink;
+}
+
+static uint32_t get_flow_control_watermark_plic_id(void) {
+  switch (kOttfTestConfig.console.base_addr) {
+#if !OT_IS_ENGLISH_BREAKFAST
+    case TOP_EARLGREY_UART1_BASE_ADDR:
+      return kTopEarlgreyPlicIrqIdUart1RxWatermark;
+    case TOP_EARLGREY_UART2_BASE_ADDR:
+      return kTopEarlgreyPlicIrqIdUart2RxWatermark;
+    case TOP_EARLGREY_UART3_BASE_ADDR:
+      return kTopEarlgreyPlicIrqIdUart3RxWatermark;
+#endif
+    case TOP_EARLGREY_UART0_BASE_ADDR:
+    default:
+      return kTopEarlgreyPlicIrqIdUart0RxWatermark;
+  }
+}
+
+void ottf_console_uart_flow_control_enable(ottf_console_t *console) {
+  const dif_uart_t *uart = &console->data.uart.dif;
+  CHECK_DIF_OK(dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark));
+  CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+                                        kDifToggleEnabled));
+
+  // Set IRQ priorities to MAX
+  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
+      &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority));
+  // Set Ibex IRQ priority threshold level
+  CHECK_DIF_OK(dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget,
+                                                kDifRvPlicMinPriority));
+  // Enable IRQs in PLIC
+  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(&ottf_plic,
+                                           get_flow_control_watermark_plic_id(),
+                                           kPlicTarget, kDifToggleEnabled));
+
+  console->data.uart.flow_control_state = kOttfConsoleFlowControlAuto;
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+  // Make sure we're in the Resume state and we emit a Resume to the UART.
+  ottf_console_flow_control(console, kOttfConsoleFlowControlResume);
+}
+
+// This version of the function is safe to call from within the ISR.
+static status_t manage_flow_control(ottf_console_t *console,
+                                    ottf_console_flow_control_t ctrl) {
+  const dif_uart_t *uart = &console->data.uart.dif;
+  if (console->data.uart.flow_control_state == kOttfConsoleFlowControlNone) {
+    return OK_STATUS((int32_t)console->data.uart.flow_control_state);
+  }
+  if (ctrl == kOttfConsoleFlowControlAuto) {
+    uint32_t avail;
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+    if (avail < kFlowControlLowWatermark &&
+        console->data.uart.flow_control_state !=
+            kOttfConsoleFlowControlResume) {
+      // Enable RX watermark interrupt when RX FIFO level is below the
+      // watermark.
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+                                            kDifToggleEnabled));
+      ctrl = kOttfConsoleFlowControlResume;
+    } else if (avail >= kFlowControlHighWatermark &&
+               console->data.uart.flow_control_state !=
+                   kOttfConsoleFlowControlPause) {
+      ctrl = kOttfConsoleFlowControlPause;
+      // RX watermark interrupt is status type, so disable the interrupt whilst
+      // RX FIFO is above the watermark to avoid an inifite loop of ISRs.
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+                                            kDifToggleDisabled));
+    } else {
+      return OK_STATUS((int32_t)console->data.uart.flow_control_state);
+    }
+  }
+  uint8_t byte = (uint8_t)ctrl;
+  CHECK_DIF_OK(dif_uart_bytes_send(uart, &byte, 1, NULL));
+  console->data.uart.flow_control_state = ctrl;
+  return OK_STATUS((int32_t)console->data.uart.flow_control_state);
+}
+
+bool ottf_console_uart_flow_control_isr(uint32_t *exc_info,
+                                        ottf_console_t *console) {
+  const dif_uart_t *uart = &console->data.uart.dif;
+  bool rx;
+  CHECK_DIF_OK(dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx));
+  if (rx) {
+    manage_flow_control(console, kOttfConsoleFlowControlAuto);
+    CHECK_DIF_OK(dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark));
+    return true;
+  }
+  return false;
+}
+
+// The public API has to save and restore interrupts to avoid an
+// unexpected write to the global `console->data.uart.flow_control_state`.
+status_t ottf_console_uart_flow_control(ottf_console_t *console,
+                                        ottf_console_flow_control_t ctrl) {
+  const dif_uart_t *uart = &console->data.uart.dif;
+  dif_uart_irq_enable_snapshot_t snapshot;
+  CHECK_DIF_OK(dif_uart_irq_disable_all(uart, &snapshot));
+  status_t s = manage_flow_control(console, ctrl);
+  CHECK_DIF_OK(dif_uart_irq_restore_all(uart, &snapshot));
+  return s;
+}
diff --git a/sw/device/lib/testing/test_framework/ottf_isrs.c b/sw/device/lib/testing/test_framework/ottf_isrs.c
index 2629cea926879..d37fd3b7a2039 100644
--- a/sw/device/lib/testing/test_framework/ottf_isrs.c
+++ b/sw/device/lib/testing/test_framework/ottf_isrs.c
@@ -12,6 +12,14 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+
+#if !OT_IS_ENGLISH_BREAKFAST
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+
+#include "alert_handler_regs.h"
+#endif  // !OT_IS_ENGLISH_BREAKFAST
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
@@ -200,15 +208,27 @@ void ottf_external_isr(uint32_t *exc_info) {
 
   top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
       top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id];
-
-  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
-      ottf_console_flow_control_isr(exc_info)) {
+  // See if the test code wants to handle it.
+  bool handled = ottf_handle_irq(exc_info, peripheral, plic_irq_id);
+  // If not, see if that interrupt corresponds to an OTTF console IRQ.
+  if (handled || ottf_console_flow_control_isr(exc_info)) {
+    // Complete the IRQ at PLIC.
+    CHECK_DIF_OK(
+        dif_rv_plic_irq_complete(&ottf_plic, kPlicTarget, plic_irq_id));
+    return;
+#if !OT_IS_ENGLISH_BREAKFAST
+  } else if (peripheral == kTopEarlgreyPlicPeripheralAlertHandler &&
+             !kOttfTestConfig.ignore_alerts) {
+    ottf_alert_isr(exc_info);
     // Complete the IRQ at PLIC.
     CHECK_DIF_OK(
         dif_rv_plic_irq_complete(&ottf_plic, kPlicTarget, plic_irq_id));
     return;
+#endif  //  !OT_IS_ENGLISH_BREAKFAST
   }
 
+  LOG_ERROR("unhandled IRQ: plic_id=%d, peripheral ID=%d", plic_irq_id,
+            peripheral);
   ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
   abort();
 }
@@ -218,6 +238,16 @@ static void generic_internal_irq_handler(uint32_t *exc_info) {
   abort();
 }
 
+OT_WEAK
+bool ottf_handle_irq(uint32_t *exc_info,
+                     top_earlgrey_plic_peripheral_t peripheral,
+                     dif_rv_plic_irq_id_t plic_id) {
+  OT_DISCARD(exc_info);
+  OT_DISCARD(peripheral);
+  OT_DISCARD(plic_id);
+  return false;
+}
+
 OT_WEAK
 OT_ALIAS("generic_internal_irq_handler")
 void ottf_external_nmi_handler(uint32_t *exc_info);
diff --git a/sw/device/lib/testing/test_framework/ottf_isrs.h b/sw/device/lib/testing/test_framework/ottf_isrs.h
index f22146e49bdf9..653cf0ba950a6 100644
--- a/sw/device/lib/testing/test_framework/ottf_isrs.h
+++ b/sw/device/lib/testing/test_framework/ottf_isrs.h
@@ -8,6 +8,8 @@
 
 #include "sw/device/lib/dif/dif_rv_plic.h"
 
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
 /**
  * OTTF global PLIC interface.
  */
@@ -137,6 +139,34 @@ void ottf_timer_isr(uint32_t *exc_info);
  */
 void ottf_external_isr(uint32_t *exc_info);
 
+/**
+ * Test external IRQ handler.
+ *
+ * `ottf_isrs.c` provides a weak definition of this symbol, which can be
+ * overridden at link-time by providing an additional non-weak definition.
+ *
+ * Overriding this function is the preferred way for device tests to handle
+ * IRQs, unless they really need to bypass the OTTF entirely.
+ *
+ * Before calling this function, `ottf_external_isr` will claim the interrupt
+ * at the PLIC and obtain the corresponding instance ID using the DT.
+ * If this function returns true, `ottf_external_isr` will complete the
+ * interrupt at the PLIC. If this function returns false, the OTTF will try
+ * to handle this IRQ for its internal functions (e.g. ottf_console). If that's
+ * not possible, a fatal error will occur.
+ *
+ * NOTE When overriding `ottf_handle_irq`, the code does not need to call
+ * `ottf_console_flow_control_isr`, this will be done automatically if the
+ * function returns false.
+ *
+ * @param inst_id The device instance that produced the interrupt.
+ * @param plid_id The PLIC IRQ ID to handle.
+ * @returns Whether the IRQ was handled.
+ */
+bool ottf_handle_irq(uint32_t *exc_info,
+                     top_earlgrey_plic_peripheral_t peripheral,
+                     dif_rv_plic_irq_id_t plic_id);
+
 /**
  * OTTF external NMI internal IRQ handler.
  *
diff --git a/sw/device/lib/testing/test_framework/ottf_main.c b/sw/device/lib/testing/test_framework/ottf_main.c
index 3703eacd3648d..9ae16dd7a0c80 100644
--- a/sw/device/lib/testing/test_framework/ottf_main.c
+++ b/sw/device/lib/testing/test_framework/ottf_main.c
@@ -13,21 +13,27 @@
 #include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/coverage/api.h"
 #include "sw/device/lib/dif/dif_base.h"
 #include "sw/device/lib/dif/dif_rstmgr.h"
 #include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/rand_testutils.h"
 #include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
 #include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/coverage.h"
 #include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/silicon_creator/lib/manifest_def.h"
 
+#if !OT_IS_ENGLISH_BREAKFAST
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#endif  // !OT_IS_ENGLISH_BREAKFAST
+
 // TODO: make this toplevel agnostic.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
@@ -107,31 +113,36 @@ static void report_test_status(bool result) {
     if (kOttfTestConfig.console.test_may_clobber) {
       ottf_console_init();
     }
-    LOG_INFO("Finished %s", kOttfTestConfig.file);
+    if (!kOttfTestConfig.silence_console_prints) {
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+    }
   }
   // Print the reported status in case of error. Beware that
   // status_report_list_cnt might be greater than kStatusReportListSize which
   // means we had to overwrite values.
-  if (!result) {
-    LOG_INFO("Status reported by the test:");
-    // Handle overflow.
-    size_t print_cnt = status_report_list_cnt;
-    if (status_report_list_cnt > kStatusReportListSize) {
-      print_cnt = kStatusReportListSize;
-    }
-    // We print the list backwards like a stack (last report event first).
-    for (size_t i = 1; i <= print_cnt; i++) {
-      size_t idx = (status_report_list_cnt - i) % kStatusReportListSize;
-      LOG_INFO("- %r", status_report_list[idx]);
-    }
-    // Warn about overflow.
-    if (status_report_list_cnt > kStatusReportListSize) {
-      LOG_INFO(
-          "Some statuses have been lost due to the limited size of the list.");
+  if (!kOttfTestConfig.silence_console_prints) {
+    if (!result) {
+      LOG_INFO("Status reported by the test:");
+      // Handle overflow.
+      size_t print_cnt = status_report_list_cnt;
+      if (status_report_list_cnt > kStatusReportListSize) {
+        print_cnt = kStatusReportListSize;
+      }
+      // We print the list backwards like a stack (last report event first).
+      for (size_t i = 1; i <= print_cnt; i++) {
+        size_t idx = (status_report_list_cnt - i) % kStatusReportListSize;
+        LOG_INFO("- %r", status_report_list[idx]);
+      }
+      // Warn about overflow.
+      if (status_report_list_cnt > kStatusReportListSize) {
+        LOG_INFO(
+            "Some statuses have been lost due to the limited size of the "
+            "list.");
+      }
     }
   }
 
-  coverage_send_buffer();
+  coverage_report();
   test_status_set(result ? kTestStatusPassed : kTestStatusFailed);
 }
 
@@ -157,11 +168,25 @@ void _ottf_main(void) {
     CHECK_DIF_OK(dif_rstmgr_reset_info_clear(&rstmgr));
   }
 
+  // Initialize the global rv_plic DIF context for interrupts.
+  // This needs to happen before ottf_console_init.
+  CHECK_DIF_OK(dif_rv_plic_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic));
+
   // Initialize the console to enable logging for non-DV simulation platforms.
   if (kDeviceType != kDeviceSimDV) {
     ottf_console_init();
-    LOG_INFO("Running %s", kOttfTestConfig.file);
+    if (!kOttfTestConfig.silence_console_prints) {
+      LOG_INFO("Running %s", kOttfTestConfig.file);
+    }
+  }
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (!kOttfTestConfig.ignore_alerts) {
+    LOG_INFO("Enabling OTTF alert catcher");
+    CHECK_STATUS_OK(ottf_alerts_enable_all());
   }
+#endif  // !OT_IS_ENGLISH_BREAKFAST
 
   // Initialize a global random number generator testutil context to provide
   // tests with a source of entropy for randomizing test behaviors.
diff --git a/sw/device/lib/testing/test_framework/ottf_silicon_owner_a.ld b/sw/device/lib/testing/test_framework/ottf_silicon_owner_a.ld
index f3a0d12855223..26b84808cb893 100644
--- a/sw/device/lib/testing/test_framework/ottf_silicon_owner_a.ld
+++ b/sw/device/lib/testing/test_framework/ottf_silicon_owner_a.ld
@@ -16,9 +16,8 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
  * Symbols to be used in the setup of the address translation for the OTTF run
  * at the BL0 boot stage in slot A.
  */
-/* TODO(#9045): Move ROM_EXT size to a common location. */
-_ottf_size = (LENGTH(eflash) / 2) - 0x10000;
-_ottf_start_address = ORIGIN(eflash) + 0x10000;
+_ottf_size = (LENGTH(eflash) / 2) - _rom_ext_size;
+_ottf_start_address = ORIGIN(eflash) + _rom_ext_size;
 
 REGION_ALIAS("ottf_flash", eflash);
 
diff --git a/sw/device/lib/testing/test_framework/ottf_silicon_owner_b.ld b/sw/device/lib/testing/test_framework/ottf_silicon_owner_b.ld
index 2664ae9ea3f89..863c446dcdb1e 100644
--- a/sw/device/lib/testing/test_framework/ottf_silicon_owner_b.ld
+++ b/sw/device/lib/testing/test_framework/ottf_silicon_owner_b.ld
@@ -16,9 +16,8 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
  * Symbols to be used in the setup of the address translation for the OTTF run
  * at the BL0 boot stage in slot B.
  */
-/* TODO(#9045): Move ROM_EXT size to a common location. */
-_ottf_size = (LENGTH(eflash) / 2) - 0x10000;
-_ottf_start_address = ORIGIN(eflash) + (LENGTH(eflash) / 2) + 0x10000;
+_ottf_size = (LENGTH(eflash) / 2) - _rom_ext_size;
+_ottf_start_address = ORIGIN(eflash) + (LENGTH(eflash) / 2) + _rom_ext_size;
 
 REGION_ALIAS("ottf_flash", eflash);
 
diff --git a/sw/device/lib/testing/test_framework/ottf_silicon_owner_virtual.ld b/sw/device/lib/testing/test_framework/ottf_silicon_owner_virtual.ld
index a85ecaa4c63fc..17dbe8665a307 100644
--- a/sw/device/lib/testing/test_framework/ottf_silicon_owner_virtual.ld
+++ b/sw/device/lib/testing/test_framework/ottf_silicon_owner_virtual.ld
@@ -15,9 +15,8 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
 /**
  * Symbols to be used in the setup of the address translation for ROM_EXT.
  */
-/* TODO(#9045): Move BL0 size to a common location. */
-_ottf_size = LENGTH(owner_virtual) - 64K;
-_ottf_start_address = ORIGIN(owner_virtual) + 64K;
+_ottf_size = LENGTH(owner_virtual) - _rom_ext_size;
+_ottf_start_address = ORIGIN(owner_virtual) + _rom_ext_size;
 ASSERT((_ottf_size <= (LENGTH(eflash) / 2)),
   "Error: BL0 flash is bigger than slot.");
 
diff --git a/sw/device/lib/testing/test_framework/ottf_start.S b/sw/device/lib/testing/test_framework/ottf_start.S
index 86ef06062733b..8500b5f70aca1 100644
--- a/sw/device/lib/testing/test_framework/ottf_start.S
+++ b/sw/device/lib/testing/test_framework/ottf_start.S
@@ -2,6 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/coverage/api_asm.h"
+
 /**
  * OTTF Interrupt Vector.
  */
@@ -163,27 +165,7 @@ _ottf_start:
   la   a1, _bss_end
   call crt_section_clear
 
- /**
-  * Call the functions in the `.init_array` section.
-  *
-  * This section is typically empty except for executables built with LLVM
-  * coverage enabled. When coverage is enabled, the compiler emits pointers to
-  * the functions that initialize the profile buffer in this section. These
-  * functions must be called before the instrumented functions in the program.
-  *
-  * We use `s0` and `s1` to represent the start and end pointers of
-  * `.init_array`, respectively, and `t0` to store the addresses of the
-  * functions to be called.
-  */
-  la   s0, _init_array_start
-  la   s1, _init_array_end
-  bgeu s0, s1, init_array_loop_end
-init_array_loop:
-  lw   t0, 0(s0)
-  jalr t0
-  addi s0, s0, 0x4
-  bltu s0, s1, init_array_loop
-init_array_loop_end:
+  COVERAGE_ASM_INIT()
 
  /**
   * Jump into the OTTF C entry point.
diff --git a/sw/device/lib/testing/test_framework/ottf_test_config.h b/sw/device/lib/testing/test_framework/ottf_test_config.h
index f4023ea2e7623..959a4a9bf35a0 100644
--- a/sw/device/lib/testing/test_framework/ottf_test_config.h
+++ b/sw/device/lib/testing/test_framework/ottf_test_config.h
@@ -13,7 +13,7 @@ typedef enum ottf_console_type {
   kOttfConsoleSpiDevice,
 } ottf_console_type_t;
 
-typedef struct ottf_console {
+typedef struct ottf_console_opt {
   /**
    * Communication interface type to use for the OTTF console (see
    * `ottf_console_type_t` above).
@@ -29,7 +29,35 @@ typedef struct ottf_console {
    * reconfigure it before printing the test status.
    */
   bool test_may_clobber;
-} ottf_console_t;
+  /**
+   * Indicates if SW buffering should be turned on for `ottf_console_putbuf()`
+   * to increase the transmit performance when using a peripheral backend like
+   * SPI that has a frame overhead associated with each packet transmission.
+   *
+   * Set this option to true if you are using the SPI console device with UJSON
+   * transmissions.
+   */
+  bool putbuf_buffered;
+} ottf_console_opt_t;
+
+typedef struct ottf_console_tx_indicator {
+  /**
+   * Indicates if the TX indicator GPIO is to be used in conjunction with the
+   * SPI console.
+   */
+  bool enable;
+  /**
+   * Indicates the GPIO to use to signal to the host that the SPI console buffer
+   * is not empty.
+   */
+  uint32_t spi_console_tx_ready_gpio;
+  /**
+   * Indicates the MIO to connect to the GPIO pin above. to signal to the host
+   * that the SPI console buffer is not empty. A value of UINT32_MAX indicates
+   * this feature is unused.
+   */
+  uint32_t spi_console_tx_ready_mio;
+} ottf_console_tx_indicator_t;
 
 /**
  * Configuration variables for an on-device test.
@@ -63,7 +91,14 @@ typedef struct ottf_test_config {
    * status and error messages are written to. Typically UART0, but other
    * communication peripherals may be supported.
    */
-  ottf_console_t console;
+  ottf_console_opt_t console;
+
+  /**
+   * The TX indicator GPIO to use in conjunction with the SPI console, if a
+   * polling mechanism is not desireable to use such as in manufacturing ATE
+   * environments.
+   */
+  ottf_console_tx_indicator_t console_tx_indicator;
 
   /**
    * Indicates that this test will utilize the UART to receive commands from
@@ -80,11 +115,26 @@ typedef struct ottf_test_config {
    */
   bool clear_reset_reason;
 
+  /**
+   * Indicates if OTTF console prints will be silenced.
+   */
+  bool silence_console_prints;
+
   /**
    * Name of the file in which `kOttfTestConfig` is defined. Most of the time,
    * this will be the file that defines `test_main()`.
    */
   const char *file;
+
+  /**
+   * If true, OTTF will enable all alerts configured for alert class D which
+   * will escalate with signal 0. OTTF will handle IRQs for class D before they
+   * escalate and abort the test.
+   *
+   * The alert handler configuration is not locked and can be modified further
+   * by the test.
+   */
+  bool ignore_alerts;
 } ottf_test_config_t;
 
 /**
diff --git a/sw/device/lib/testing/test_framework/ujson_ottf.c b/sw/device/lib/testing/test_framework/ujson_ottf.c
index 9cbddcdaea893..ce123d0c375bf 100644
--- a/sw/device/lib/testing/test_framework/ujson_ottf.c
+++ b/sw/device/lib/testing/test_framework/ujson_ottf.c
@@ -6,26 +6,10 @@
 
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/dif/dif_uart.h"
-#include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/ottf_console.h"
 #include "sw/device/lib/ujson/ujson.h"
 
-static status_t ottf_putbuf(void *io, const char *buf, size_t len) {
-  const dif_uart_t *uart = (const dif_uart_t *)io;
-  for (size_t i = 0; i < len; ++i) {
-    TRY(dif_uart_byte_send_polled(uart, buf[i]));
-  }
-  return OK_STATUS((int32_t)len);
-}
-
-static status_t ottf_getc(void *io) {
-  const dif_uart_t *uart = (const dif_uart_t *)io;
-  uint8_t byte;
-  TRY(dif_uart_byte_receive_polled(uart, &byte));
-  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
-  return OK_STATUS(byte);
-}
-
 ujson_t ujson_ottf_console(void) {
-  return ujson_init(ottf_console_get(), ottf_getc, ottf_putbuf);
+  return ujson_init(ottf_console_get(), ottf_console_getc, ottf_console_putbuf,
+                    ottf_console_flushbuf);
 }
diff --git a/sw/device/lib/testing/test_framework/ujson_ottf.h b/sw/device/lib/testing/test_framework/ujson_ottf.h
index fc29f34c5240b..30491a730f65d 100644
--- a/sw/device/lib/testing/test_framework/ujson_ottf.h
+++ b/sw/device/lib/testing/test_framework/ujson_ottf.h
@@ -60,6 +60,22 @@ ujson_t ujson_ottf_console(void);
     err;                                                 \
   })
 
+/**
+ * Adds an empty CRC field to the response.
+ *
+ * Should not be used directly.
+ * It is used by other macros such as `RESP_OK_NO_CRC`.
+ *
+ * @param uj_ctx_ A `ujson_t` representing the IO context.
+ */
+#define RESP_NO_CRC(uj_ctx_)                \
+  ({                                        \
+    TRY(ujson_putbuf(uj_ctx_, " CRC:", 5)); \
+    TRY(ujson_putbuf(uj_ctx_, "0\n", 2));   \
+    TRY(ujson_flushbuf(uj));                \
+    OK_STATUS();                            \
+  })
+
 /**
  * Add a CRC to the response.
  * Should not be used directly.
@@ -73,11 +89,44 @@ ujson_t ujson_ottf_console(void);
     TRY(ujson_putbuf(uj_ctx_, " CRC:", 5));       \
     TRY(ujson_serialize_uint32_t(uj_ctx_, &crc)); \
     TRY(ujson_putbuf(uj_ctx_, "\n", 1));          \
+    TRY(ujson_flushbuf(uj));                      \
     OK_STATUS();                                  \
   })
 
 /**
- * Respond with an OK result and JSON encoded data.
+ * Respond with an OK result, JSON encoded data, and empty CRC.
+ *
+ * @param responder_ A ujson serializer function for `data_`.
+ * @param uj_ctx_ A `ujson_t` representing the IO context.
+ * @param data_ A pointer to the data to send.
+ */
+#define RESP_OK_NO_CRC(responder_, uj_ctx_, data_) \
+  ({                                               \
+    TRY(ujson_putbuf(uj_ctx_, "RESP_OK:", 8));     \
+    TRY(responder_(uj_ctx_, data_));               \
+    RESP_NO_CRC(uj_ctx_);                          \
+    OK_STATUS();                                   \
+  })
+
+/**
+ * Respond with an OK result, JSON encoded data padded to specific size, and
+ * empty CRC.
+ *
+ * @param responder_ A ujson serializer function for `data_`.
+ * @param uj_ctx_ A `ujson_t` representing the IO context.
+ * @param data_ A pointer to the data to send.
+ * @param max_size_ Max size the payload should be padded to.
+ */
+#define RESP_OK_PADDED_NO_CRC(responder_, uj_ctx_, data_, max_size_) \
+  ({                                                                 \
+    TRY(ujson_putbuf(uj_ctx_, "RESP_OK:", 8));                       \
+    TRY(responder_(uj_ctx_, data_, max_size_));                      \
+    RESP_NO_CRC(uj_ctx_);                                            \
+    OK_STATUS();                                                     \
+  })
+
+/**
+ * Respond with an OK result, JSON encoded data, and valid CRC.
  *
  * @param responder_ A ujson serializer function for `data_`.
  * @param uj_ctx_ A `ujson_t` representing the IO context.
diff --git a/sw/device/lib/testing/test_rom/BUILD b/sw/device/lib/testing/test_rom/BUILD
index 01554c5a1982a..77de9b52e86f2 100644
--- a/sw/device/lib/testing/test_rom/BUILD
+++ b/sw/device/lib/testing/test_rom/BUILD
@@ -27,11 +27,13 @@ ld_library(
 
 opentitan_binary(
     name = "test_rom",
+    collect_code_coverage = 0,
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310",
         "//hw/top_earlgrey:fpga_cw305",
         "//hw/top_earlgrey:fpga_cw340",
         "//hw/top_earlgrey:sim_dv_base",
+        "//hw/top_earlgrey:sim_qemu_base",
         "//hw/top_earlgrey:sim_verilator_base",
     ],
     kind = "rom",
@@ -65,6 +67,21 @@ legacy_rom_targets(
     target = "test_rom",
 )
 
+[
+    filegroup(
+        name = "test_rom_{}_hashfile".format(dev),
+        srcs = [":test_rom"],
+        output_group = "{}_hashfile".format(dev),
+    )
+    for dev in [
+        "sim_dv",
+        "sim_verilator",
+        "fpga_cw305",
+        "fpga_cw310",
+        "fpga_cw340",
+    ]
+]
+
 # TODO(#12905): Use a slightly hollowed out version of the silicon_creator bootstrap
 # and other functions necessary to build the test_rom for the english breakfast top level.
 cc_library(
@@ -187,7 +204,7 @@ cc_library(
         "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:status",
-        "//sw/device/silicon_creator/lib:chip_info",
+        "//sw/device/silicon_creator/lib:build_info",
         "//sw/device/silicon_creator/lib/base:sec_mmio",
         "//sw/device/silicon_creator/lib/base:static_critical",
     ],
diff --git a/sw/device/lib/testing/test_rom/test_rom.c b/sw/device/lib/testing/test_rom/test_rom.c
index 02084b69b83e2..b67a321f4a999 100644
--- a/sw/device/lib/testing/test_rom/test_rom.c
+++ b/sw/device/lib/testing/test_rom/test_rom.c
@@ -22,7 +22,7 @@
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/silicon_creator/lib/base/sec_mmio.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #if !OT_IS_ENGLISH_BREAKFAST
 #include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
@@ -155,7 +155,7 @@ bool rom_test_main(void) {
   }
 
   // Print the chip version information
-  LOG_INFO("kChipInfo: scm_revision=%x", kChipInfo.scm_revision);
+  LOG_INFO("kBuildInfo: scm_revision=%x", kBuildInfo.scm_revision);
 
   // Skip sram_init for test_rom
   dif_rstmgr_reset_info_bitfield_t reset_reasons;
diff --git a/sw/device/lib/testing/test_rom/test_rom.ld b/sw/device/lib/testing/test_rom/test_rom.ld
index fe768a8fbd0a0..ffc140ae030cb 100644
--- a/sw/device/lib/testing/test_rom/test_rom.ld
+++ b/sw/device/lib/testing/test_rom/test_rom.ld
@@ -31,9 +31,6 @@ _rom_ext_virtual_size = LENGTH(rom_ext_virtual);
 ASSERT((_rom_ext_virtual_size <= (LENGTH(eflash) / 2)),
   "Error: rom ext flash is bigger than slot.");
 
-_rom_digest_size = 32;
-_chip_info_start = ORIGIN(rom) + LENGTH(rom) - _rom_digest_size - _chip_info_size;
-
 /* DV Log offset (has to be different to other boot stages). */
 _dv_log_offset = 0x0;
 
@@ -134,7 +131,7 @@ SECTIONS {
    * Immutable chip_info data, containing build-time-recorded information.
    */
   .chip_info _chip_info_start : ALIGN(4) {
-    KEEP(*(.chip_info))
+    KEEP(*(.build_info))
   } > rom
 
   /**
diff --git a/sw/device/lib/testing/test_rom/test_rom_start.S b/sw/device/lib/testing/test_rom/test_rom_start.S
index 27a72bbf885b3..ad2813ed20186 100644
--- a/sw/device/lib/testing/test_rom/test_rom_start.S
+++ b/sw/device/lib/testing/test_rom/test_rom_start.S
@@ -170,12 +170,17 @@ _start:
   andi t0, t0, 0x1
   beqz t0, .L_ast_done_loop
 
-  // Enable jittery clock if enabled in OTP.
+  // Enable jittery clock if not strictly disabled in OTP.
+  // Use hardcoded MULTIBIT_ASM_BOOL4_TRUE as the enable word to reduce all
+  // other possible OTP values to true.
   li   a0, (TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR + \
             OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET)
   lw   t0, OTP_CTRL_PARAM_CREATOR_SW_CFG_JITTER_EN_OFFSET(a0)
+  li   t1, MULTIBIT_ASM_BOOL4_FALSE
+  beq  t0, t1, .L_ast_init_skip
   li   a0, TOP_EARLGREY_CLKMGR_AON_BASE_ADDR
-  sw   t0, CLKMGR_JITTER_ENABLE_REG_OFFSET(a0)
+  li   t1, MULTIBIT_ASM_BOOL4_TRUE
+  sw   t1, CLKMGR_JITTER_ENABLE_REG_OFFSET(a0)
 
 .L_ast_init_skip:
   // The following sequence enables the minimum level of entropy required to
diff --git a/sw/device/lib/testing/usb_logging.c b/sw/device/lib/testing/usb_logging.c
index f029ad9017e99..3ed7b24a42bd8 100644
--- a/sw/device/lib/testing/usb_logging.c
+++ b/sw/device/lib/testing/usb_logging.c
@@ -4,8 +4,6 @@
 
 #include "sw/device/lib/testing/usb_logging.h"
 
-#include <ctype.h>
-
 #include "sw/device/lib/runtime/ibex.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/pinmux_testutils.h"
@@ -144,8 +142,8 @@ static const bool kDevLogging = false;
 
 /**
  * Character map, used to ensure that non-printable characters are dropped;
- * isprint() available so this assumes ASCII and drops the control characters
- * that could could issues with inappropriate terminal settings at the host.
+ * This assumes ASCII and drops the control characters that could could issues
+ * with inappropriate terminal settings at the host.
  */
 static const uint32_t kCtrlChars =
     ((uint32_t)1u << '\t') | ((uint32_t)1u << '\n') | ((uint32_t)1u << '\r');
@@ -163,10 +161,9 @@ static size_t usb_log(void *data, const char *buf, size_t len);
  */
 static uint8_t config_descriptors[kCfgDscrLenMax];
 
-// Since isprint() is unavailable, use a simple bitmap to test whether it is
-// safe to transmit the given ASCII character unmodified.
-static bool isprintable(uint8_t ch) {
-  return ((kMap[ch >> 5] >> (ch & 0x1fu)) & 1u) != 0u;
+// implementation of <ctype.h> `isprint` that covers ASCII.
+static int isprint(int ch) {
+  return ((kMap[ch >> 5] >> ((uint32_t)ch & 0x1fu)) & 1u) != 0u;
 }
 
 // Place all buffers into the free list
@@ -317,7 +314,7 @@ static status_t usb_logging_send(usb_logging_ctx_t *ctx,
         // stimulated software flow control (XON/XOFF) at the host.
         uint8_t *dp = &buf->data[buf->bytes_used];
         for (size_t i = 0u; i < chunk; ++i) {
-          dp[i] = isprintable(data[i]) ? data[i] : '.';
+          dp[i] = isprint(data[i]) ? data[i] : '.';
         }
       } else {
         memcpy(&buf->data[buf->bytes_used], data, chunk);
diff --git a/sw/device/lib/testing/usb_testutils.c b/sw/device/lib/testing/usb_testutils.c
index 80f2b00e6e942..8a7488ed2de5c 100644
--- a/sw/device/lib/testing/usb_testutils.c
+++ b/sw/device/lib/testing/usb_testutils.c
@@ -194,6 +194,25 @@ status_t usb_testutils_poll(usb_testutils_ctx_t *ctx) {
     ctx->got_frame = true;
   }
 
+  // Report all link events to the registered callback handler, if any
+  if (ctx->link_callback) {
+    const dif_usbdev_irq_state_snapshot_t kIrqsLink =
+        (1u << kDifUsbdevIrqPowered) | (1u << kDifUsbdevIrqDisconnected) |
+        (1u << kDifUsbdevIrqHostLost) | (1u << kDifUsbdevIrqLinkReset) |
+        (1u << kDifUsbdevIrqLinkSuspend) | (1u << kDifUsbdevIrqLinkResume) |
+        (1u << kDifUsbdevIrqFrame);
+    if (istate & kIrqsLink) {
+      // Retrieve and report the current link state, since this should help
+      // resolve any confusion caused by delayed reporting of earlier link
+      // events (eg. disconnect/powered, suspend/resume)
+      dif_usbdev_link_state_t link_state;
+      TRY(dif_usbdev_status_get_link_state(ctx->dev, &link_state));
+
+      // Indicate only the link-related interrupts
+      TRY(ctx->link_callback(ctx->ctx_link, istate & kIrqsLink, link_state));
+    }
+  }
+
   // Note: LinkInErr will be raised in response to a packet being NAKed by the
   // host which is not expected behavior on a physical USB but this is something
   // that the DPI model does to exercise packet resending when running
@@ -250,6 +269,20 @@ status_t usb_testutils_poll(usb_testutils_ctx_t *ctx) {
   return OK_STATUS();
 }
 
+status_t usb_testutils_link_callback_register(usb_testutils_ctx_t *ctx,
+                                              usb_testutils_link_handler_t link,
+                                              void *ctx_link) {
+  CHECK(ctx != NULL);
+
+  // Retain the new link callback handler and its context pointer; either of
+  // these may be NULL, respectively to deregister a handler or because no
+  // context is required.
+  ctx->link_callback = link;
+  ctx->ctx_link = ctx_link;
+
+  return OK_STATUS();
+}
+
 status_t usb_testutils_transfer_send(usb_testutils_ctx_t *ctx, uint8_t ep,
                                      const uint8_t *data, uint32_t length,
                                      usb_testutils_xfr_flags_t flags) {
@@ -423,6 +456,9 @@ status_t usb_testutils_init(usb_testutils_ctx_t *ctx, bool pinflip,
   ctx->got_frame = false;
   ctx->frame = 0u;
 
+  // No callback handler for link events
+  ctx->link_callback = NULL;
+
   TRY(dif_usbdev_init(mmio_region_from_addr(USBDEV_BASE_ADDR), ctx->dev));
 
   dif_usbdev_config_t config = {
@@ -446,6 +482,10 @@ status_t usb_testutils_init(usb_testutils_ctx_t *ctx, bool pinflip,
   // All about polling...
   TRY(dif_usbdev_irq_disable_all(ctx->dev, NULL));
 
+  // Clear any outstanding interrupts such as Powered/Disconnected interrupts
+  // from when the usbdev came out of reset
+  TRY(dif_usbdev_irq_acknowledge_all(ctx->dev));
+
   // Provide buffers for any packet reception
   TRY(dif_usbdev_fill_available_fifos(ctx->dev, ctx->buffer_pool));
 
diff --git a/sw/device/lib/testing/usb_testutils.h b/sw/device/lib/testing/usb_testutils.h
index e79b8ec213ef5..20c39075cfa7a 100644
--- a/sw/device/lib/testing/usb_testutils.h
+++ b/sw/device/lib/testing/usb_testutils.h
@@ -14,6 +14,11 @@
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "usb_testutils_diags.h"
 
+// Have Data Toggle Restore functionality (Prod)?
+#define USBDEV_HAVE_TOGGLE_STATE 0
+// Have separated Available OUT and SETUP Buffer FIFOs (Prod)?
+#define USBDEV_HAVE_SEPARATED_FIFOS 0
+
 // Result codes to rx/tx callback handlers
 typedef enum {
   /**
@@ -87,6 +92,9 @@ typedef status_t (*usb_testutils_rx_handler_t)(void *,
 typedef status_t (*usb_testutils_tx_flush_handler_t)(void *);
 /* Called when a USB link reset is detected */
 typedef status_t (*usb_testutils_reset_handler_t)(void *);
+/* Called when a link event has been detected */
+typedef status_t (*usb_testutils_link_handler_t)(
+    void *, dif_usbdev_irq_state_snapshot_t, dif_usbdev_link_state_t);
 
 // In-progress larger buffer transfer to/from host
 typedef struct usb_testutils_transfer {
@@ -140,6 +148,14 @@ struct usb_testutils_ctx {
    * Most recent bus frame number received from host
    */
   uint16_t frame;
+  /**
+   * Link event callback
+   */
+  usb_testutils_link_handler_t link_callback;
+  /**
+   * Context pointer for link event callkback
+   */
+  void *ctx_link;
 
   /**
    * IN endpoints
@@ -324,6 +340,18 @@ OT_WARN_UNUSED_RESULT
 status_t usb_testutils_init(usb_testutils_ctx_t *ctx, bool pinflip,
                             bool en_diff_rcvr, bool tx_use_d_se0);
 
+/**
+ * Register a callback function to be notified of link events
+ *
+ * @param ctx initialized usb test utils context pointer
+ * @param link link event callback handler
+ * @param ctx_link context pointer for link event callback
+ */
+OT_WARN_UNUSED_RESULT
+status_t usb_testutils_link_callback_register(usb_testutils_ctx_t *ctx,
+                                              usb_testutils_link_handler_t link,
+                                              void *ctx_link);
+
 /**
  * Send a larger data transfer from the given endpoint
  *
diff --git a/sw/device/lib/testing/usb_testutils_controlep.c b/sw/device/lib/testing/usb_testutils_controlep.c
index 53e71c596dd56..23f3efc37e9d9 100644
--- a/sw/device/lib/testing/usb_testutils_controlep.c
+++ b/sw/device/lib/testing/usb_testutils_controlep.c
@@ -198,6 +198,9 @@ static usb_testutils_ctstate_t setup_req(usb_testutils_controlep_ctx_t *ctctx,
       if (wValue == kUsbFeatureEndpointHalt) {
         CHECK_DIF_OK(dif_usbdev_endpoint_stall_enable(ctx->dev, endpoint,
                                                       kDifToggleDisabled));
+        // Clearing the Halt feature on an endpoint that is using Data Toggling
+        // also requires us to clear the Data Toggle for that endpoint
+        CHECK_DIF_OK(dif_usbdev_clear_data_toggle(ctx->dev, endpoint.number));
         // send zero length packet for status phase
         CHECK_DIF_OK(dif_usbdev_send(ctx->dev, ctctx->ep, &buffer));
         return kUsbTestutilsCtStatIn;
diff --git a/sw/device/lib/testing/usb_testutils_diags.h b/sw/device/lib/testing/usb_testutils_diags.h
index 1a94b50217af0..ae8140174a047 100644
--- a/sw/device/lib/testing/usb_testutils_diags.h
+++ b/sw/device/lib/testing/usb_testutils_diags.h
@@ -21,6 +21,109 @@
 #define USBUTILS_MEM_FASTER 1
 #endif
 
+// Implement low-impact tracing of software execution, permitting the software
+//   and hardware behavior to be married, hopefully without modifying the
+//   behavior/performance, particularly in top-level simulation
+#define USBUTILS_FUNCTION_POINTS 0
+
+// Record the function points to a memory buffer instead, for use where test
+//   hardware is unavailable, eg. FPGA builds
+#define USBUTILS_FUNCPT_USE_BUFFER 0
+
+#if USBUTILS_MEM_FASTER
+#include "sw/device/lib/base/mmio.h"
+#endif
+
+#if USBUTILS_FUNCTION_POINTS
+// For access to ibex_mcycle_read()
+#include "sw/device/lib/runtime/ibex.h"
+
+// Function point file numbers
+//   (used to index filename table in usb_testutils_diags.c)
+#define USBUTILS_FUNCPT_FILE_DIF_USBDEV 0x01U
+#define USBUTILS_FUNCPT_FILE_USB_TESTUTILS 0x02U
+#define USBUTILS_FUNCPT_FILE_USB_CONTROLEP 0x03U
+#define USBUTILS_FUNCPT_FILE_USB_SIMPLESER 0x04U
+#define USBUTILS_FUNCPT_FILE_USBDEV_TEST 0x05U
+#define USBUTILS_FUNCPT_FILE_USBDEV_STRM_TEST 0x06U
+
+#define USBUTILS_FUNCPT_LOG_ENTRIES 0x1000U
+#define USBUTILS_FUNCPT_LOG_SIZE (USBUTILS_FUNCPT_LOG_ENTRIES * 4U)
+
+#define USBUTILS_FUNCPT_ENTRY_SIGNATURE 0xAA55FF99U
+/**
+ * Entry in function point stream
+ */
+typedef struct {
+  uint32_t sig;
+  uint32_t time;
+  uint32_t file_point;
+  uint32_t data;
+} funcpt_entry_t;
+
+#if USBUTILS_FUNCPT_USE_BUFFER
+// Record function points to RAM buffer for deferred reporting, eg. FPGA
+#define USBUTILS_FUNCPT(pt, d)                                        \
+  {                                                                   \
+    unsigned idx = usbutils_fpt_next;                                 \
+    usbutils_fpt_next =                                               \
+        (idx >= USBUTILS_FUNCPT_LOG_SIZE - 4U) ? 0U : (idx + 4U);     \
+    functpt_enttry_t *e = (functpt_enttry_t *)&usbutils_fpt_log[idx]; \
+    e->sig = USBUTILS_FUNCPT_ENTRY_SIGNATURE;                         \
+    e->time = (uint32_t)ibex_mcycle_read();                           \
+    e->file_point = (USBUTILS_FUNCPT_FILE << 16) | pt;                \
+    e->data = (d);                                                    \
+  }
+
+extern volatile unsigned usbutils_fpt_next;
+extern uint32_t usbutils_fpt_log[];
+#else
+// Emit function points to special address for waveform viewing in simulation
+//   (this is the address used by DV simulation for logging output)
+#define USBUTILS_FUNCPT(pt, d)                           \
+  {                                                      \
+    volatile uint32_t *log_hw = (uint32_t *)0x411f0084u; \
+    uint32_t time = (uint32_t)ibex_mcycle_read();        \
+    *log_hw = USBUTILS_FUNCPT_ENTRY_SIGNATURE;           \
+    *log_hw = time;                                      \
+    *log_hw = (USBUTILS_FUNCPT_FILE << 16) | (pt);       \
+    *log_hw = (d);                                       \
+  }
+#endif
+
+/**
+ * Report the contents of the function point log
+ */
+void usbutils_funcpt_report(void);
+#else
+// Omit function point tracing
+#define USBUTILS_FUNCPT(pt, d)
+#endif
+
+// For investigation of usbdev performance characteristics
+#if USBUTILS_MEM_FASTER
+/**
+ * Performant copying routine from usbdev packet buffer (MMIO)
+ *
+ * @param  base      MMIO base address
+ * @param  offset    MMIO word offset
+ * @param  dest      Buffer to receive data
+ * @param  len       Number of bytes to be copied
+ */
+void usbutils_memcpy_from_mmio32(mmio_region_t base, uint32_t offset,
+                                 void *dest, size_t len);
+/**
+ * Performant copying routine to usbdev packet buffer (MMIO)
+ *
+ * @param  base      MMIO base address
+ * @param  offset    MMIO word offset
+ * @param  src       Data to be copied
+ * @param  len       Number of bytes to be copied
+ */
+void usbutils_memcpy_to_mmio32(mmio_region_t base, uint32_t offset,
+                               const void *src, size_t len);
+#endif
+
 // Used for tracing what is going on. This may impact timing which is critical
 // when simulating with the USB DPI module.
 #define USBUTILS_ENABLE_TRC 0
@@ -35,12 +138,29 @@
   } while (false)
 
 #if USBUTILS_ENABLE_TRC
+#if 0
 // May be useful on FPGA CW310
 #include "sw/device/lib/runtime/log.h"
 #define TRC_S(s) LOG_INFO("%s", s)
 #define TRC_I(i, b) LOG_INFO("0x%x", i)
 #define TRC_C(c) LOG_INFO("%c", c)
 #else
+// Very low impact, for use in t-l simulation
+#define USBDIAGS_LOG_EMIT(d) (*((volatile uint32_t *)0x411f0084u) = (d))
+
+#define TRC_S(s) usbutils_log_text(s)
+#define TRC_I(i, b) USBDIAGS_LOG_EMIT(i)
+#define TRC_C(c) USBDIAGS_LOG_EMIT(0xcc000000u | (uint16_t)c)
+
+// Faster string logging to minimise impact upon timing
+inline void usbutils_log_text(const char *s) {
+  while (*s) {
+    USBDIAGS_LOG_EMIT(*s);
+    s++;
+  }
+}
+#endif
+#else
 #define TRC_S(s)
 #define TRC_I(i, b)
 #define TRC_C(c)
diff --git a/sw/device/lib/testing/usb_testutils_streams.c b/sw/device/lib/testing/usb_testutils_streams.c
index df6e6900e66e9..940df1666da2d 100644
--- a/sw/device/lib/testing/usb_testutils_streams.c
+++ b/sw/device/lib/testing/usb_testutils_streams.c
@@ -16,10 +16,16 @@
 
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/usb_testutils_controlep.h"
 #include "sw/device/lib/testing/usb_testutils_diags.h"
 
 #define MODULE_ID MAKE_MODULE_ID('u', 't', 's')
 
+// Maximum length of the configuration descriptor.
+#define CFG_DSCR_LEN_MAX \
+  (USB_CFG_DSCR_LEN +    \
+   USBUTILS_STREAMS_MAX * (USB_INTERFACE_DSCR_LEN + 2 * USB_EP_DSCR_LEN))
+
 /**
  * Read method to be employed
  */
@@ -673,11 +679,10 @@ status_t usb_testutils_stream_service(usb_testutils_streams_ctx_t *ctx,
   return OK_STATUS();
 }
 
-status_t usb_testutils_streams_init(usb_testutils_streams_ctx_t *ctx,
-                                    unsigned nstreams,
-                                    usb_testutils_transfer_type_t xfr_types[],
-                                    uint32_t num_bytes,
-                                    usbdev_stream_flags_t flags, bool verbose) {
+status_t usb_testutils_streams_init(
+    usb_testutils_streams_ctx_t *ctx, unsigned nstreams,
+    const usb_testutils_transfer_type_t xfr_types[], uint32_t num_bytes,
+    usbdev_stream_flags_t flags, bool verbose) {
   TRY_CHECK(nstreams <= USBUTILS_STREAMS_MAX);
   TRY_CHECK(nstreams <= UINT8_MAX);
 
@@ -697,6 +702,81 @@ status_t usb_testutils_streams_init(usb_testutils_streams_ctx_t *ctx,
   return OK_STATUS();
 }
 
+status_t usb_testutils_streams_typed_init(
+    usb_testutils_streams_ctx_t *ctx, uint8_t *cfg, uint16_t len,
+    unsigned nstreams, const usb_testutils_transfer_type_t xfr_types[],
+    uint32_t num_bytes, usbdev_stream_flags_t flags, bool verbose,
+    uint32_t *types) {
+  TRY_CHECK(nstreams <= USBUTILS_STREAMS_MAX);
+
+  // Does the caller require a bitmap of the transfer type(s) collected?
+  if (types) {
+    *types = 0U;
+  }
+
+  // Total length of the configuration descriptor; validate caller buffer.
+  size_t cfg_len = USB_CFG_DSCR_LEN +
+                   nstreams * (USB_INTERFACE_DSCR_LEN + 2 * USB_EP_DSCR_LEN);
+  TRY_CHECK(cfg && cfg_len <= len);
+
+  // Configuration Descriptor header.
+  uint8_t head[CFG_DSCR_LEN_MAX] = {
+      USB_CFG_DSCR_HEAD((uint16_t)cfg_len, (uint8_t)nstreams)};
+  memcpy(cfg, head, USB_CFG_DSCR_LEN);
+  cfg += USB_CFG_DSCR_LEN;
+
+  // Followed by programmatically-generated list of interface descriptors.
+  for (uint8_t id = 0U; id < nstreams; id++) {
+    usb_testutils_transfer_type_t xfr_type = xfr_types[id];
+    // Return to the caller the transfer type of each stream in turn.
+    if (types) {
+      *types |= xfr_type << (id * 2U);
+    }
+
+    uint8_t ep_in = (uint8_t)(id + 1U);
+    uint8_t ep_out = (uint8_t)(id + 1U);
+    TRY(usb_testutils_stream_init(ctx, id, xfr_type, ep_in, ep_out, num_bytes,
+                                  flags, verbose));
+
+    // Isochronous and Interrupt endpoints require a bInterval value of 1.
+    uint8_t bInterval = (xfr_type == kUsbTransferTypeIsochronous ||
+                         xfr_type == kUsbTransferTypeInterrupt);
+
+    // Description of a single interface.
+    uint8_t int_dscr[USB_INTERFACE_DSCR_LEN + 2 * USB_EP_DSCR_LEN] = {
+        VEND_INTERFACE_DSCR(id, 2, 0x50, 1),
+        USB_EP_DSCR(0, ep_out, (uint8_t)xfr_type, USBDEV_MAX_PACKET_SIZE,
+                    bInterval),
+        USB_EP_DSCR(1, ep_in, (uint8_t)xfr_type, USBDEV_MAX_PACKET_SIZE,
+                    bInterval),
+    };
+
+    // Append interface descriptor to the configuration descriptor.
+    memcpy(cfg, int_dscr, sizeof(int_dscr));
+    cfg += sizeof(int_dscr);
+
+    if (verbose) {
+      /**
+       * Indexed by usb_testutils_transfer_type_t
+       */
+      static const char *xfr_name[] = {
+          "Control",
+          "Isochronous",
+          "Bulk",
+          "Interrupt",
+      };
+      TRY_CHECK(xfr_type <= ARRAYSIZE(xfr_name));
+      LOG_INFO("S%u: IN %u:OUT %u : %s - 0x%x bytes flags 0x%x", id, ep_in,
+               ep_out, xfr_name[xfr_type], num_bytes, flags);
+    }
+  }
+
+  // Remember the stream count and apportion the available tx buffers
+  TRY_CHECK(usb_testutils_streams_count_set(ctx, nstreams));
+
+  return OK_STATUS();
+}
+
 status_t usb_testutils_streams_service(usb_testutils_streams_ctx_t *ctx) {
   TRY_CHECK(ctx->nstreams <= UINT8_MAX);
 
diff --git a/sw/device/lib/testing/usb_testutils_streams.h b/sw/device/lib/testing/usb_testutils_streams.h
index 915e88cc97663..a61a359d0ab0d 100644
--- a/sw/device/lib/testing/usb_testutils_streams.h
+++ b/sw/device/lib/testing/usb_testutils_streams.h
@@ -295,11 +295,10 @@ struct usb_testutils_streams_ctx {
  * @return The result status of the operation.
  */
 OT_WARN_UNUSED_RESULT
-status_t usb_testutils_streams_init(usb_testutils_streams_ctx_t *ctx,
-                                    unsigned nstreams,
-                                    usb_testutils_transfer_type_t xfr_types[],
-                                    uint32_t num_bytes,
-                                    usbdev_stream_flags_t flags, bool verbose);
+status_t usb_testutils_streams_init(
+    usb_testutils_streams_ctx_t *ctx, unsigned nstreams,
+    const usb_testutils_transfer_type_t xfr_types[], uint32_t num_bytes,
+    usbdev_stream_flags_t flags, bool verbose);
 
 /**
  * Service all streams, preparing and/or sending any data that we can, as well
@@ -343,6 +342,30 @@ status_t usb_testutils_stream_init(usb_testutils_streams_ctx_t *ctx, uint8_t id,
                                    uint32_t num_bytes,
                                    usbdev_stream_flags_t flags, bool verbose);
 
+/**
+ * Initialize a set of streams of specified types, dynamically constructing a
+ * standard USB configuration descriptor for the caller. The transfer types of
+ * the streams may optionally be returned via `types` for passing to the DPI
+ * model/host.
+ *
+ * @param  ctx       Context state for streaming test.
+ * @param  cfg       Receives the configuration descriptor.
+ * @param  len       Size of buffer receiving the configuration descriptor.
+ * @param  nstreams  Number of streams to be initialized.
+ * @param  xfr_types The transfer types of the streams.
+ * @param  num_bytes Number of bytes to be transferred by stream
+ * @param  flags     Stream/test flags
+ * @param  verbose   Whether to perform verbose logging for this stream
+ * @param  types     Optionally receives the bitmap of transfer types.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+status_t usb_testutils_streams_typed_init(
+    usb_testutils_streams_ctx_t *ctx, uint8_t *cfg, uint16_t len,
+    unsigned nstreams, const usb_testutils_transfer_type_t xfr_types[],
+    uint32_t num_bytes, usbdev_stream_flags_t flags, bool verbose,
+    uint32_t *types);
+
 /**
  * Specify the number of already-initialized streams, and apportion the
  * available tx buffers among them. To be called after usb_testutils_stream_init
diff --git a/sw/device/lib/ujson/example_roundtrip.c b/sw/device/lib/ujson/example_roundtrip.c
index 2e12e83bdb6fd..bfd1522917c9e 100644
--- a/sw/device/lib/ujson/example_roundtrip.c
+++ b/sw/device/lib/ujson/example_roundtrip.c
@@ -34,7 +34,7 @@ status_t check_crc32(ujson_t *uj) {
 }
 
 status_t roundtrip(const char *name) {
-  ujson_t uj = ujson_init(NULL, stdio_getc, stdio_putbuf);
+  ujson_t uj = ujson_init(NULL, stdio_getc, stdio_putbuf, NULL);
   if (!strcmp(name, "foo")) {
     foo x = {0};
     TRY(ujson_deserialize_foo(&uj, &x));
diff --git a/sw/device/lib/ujson/rust/roundtrip_test.rs b/sw/device/lib/ujson/rust/roundtrip_test.rs
index 2e98f5c3a6e97..9a00a64ced429 100644
--- a/sw/device/lib/ujson/rust/roundtrip_test.rs
+++ b/sw/device/lib/ujson/rust/roundtrip_test.rs
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use anyhow::Result;
-use crc::{Crc, CRC_32_ISO_HDLC};
+use crc::{CRC_32_ISO_HDLC, Crc};
 use opentitanlib::test_utils::status::Status;
 use opentitanlib::with_unknown;
 use std::io::{Read, Write};
diff --git a/sw/device/lib/ujson/test_helpers.h b/sw/device/lib/ujson/test_helpers.h
index 269c97215b82f..55ab8aedbca84 100644
--- a/sw/device/lib/ujson/test_helpers.h
+++ b/sw/device/lib/ujson/test_helpers.h
@@ -19,7 +19,8 @@ class SourceSink {
   const std::string &Sink() { return sink_; }
 
   ujson_t UJson() {
-    return ujson_init((void *)this, &SourceSink::getc, &SourceSink::putbuf);
+    return ujson_init((void *)this, &SourceSink::getc, &SourceSink::putbuf,
+                      nullptr);
   }
 
   void Reset() {
diff --git a/sw/device/lib/ujson/ujson.c b/sw/device/lib/ujson/ujson.c
index 8622831e5c8d6..bb8f35d930d85 100644
--- a/sw/device/lib/ujson/ujson.c
+++ b/sw/device/lib/ujson/ujson.c
@@ -14,11 +14,12 @@
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/ujson/private_status.h"
 
-static bool is_space(int c) { return c == ' ' || (unsigned)c - '\t' < 5; }
+static bool is_space(int c) { return c == ' ' || (c >= '\t' && c < '\t' + 5); }
 
 ujson_t ujson_init(void *context, status_t (*getc)(void *),
-                   status_t (*putbuf)(void *, const char *, size_t)) {
-  ujson_t u = UJSON_INIT(context, getc, putbuf);
+                   status_t (*putbuf)(void *, const char *, size_t),
+                   status_t (*flushbuf)(void *)) {
+  ujson_t u = UJSON_INIT(context, getc, putbuf, flushbuf);
   return u;
 }
 
@@ -27,16 +28,20 @@ void ujson_crc32_reset(ujson_t *uj) { crc32_init(&uj->crc32); }
 uint32_t ujson_crc32_finish(ujson_t *uj) { return crc32_finish(&uj->crc32); }
 
 status_t ujson_putbuf(ujson_t *uj, const char *buf, size_t len) {
+  uj->str_size += len;
   crc32_add(&uj->crc32, buf, len);
   return uj->putbuf(uj->io_context, buf, len);
 }
 
+status_t ujson_flushbuf(ujson_t *uj) { return uj->flushbuf(uj->io_context); }
+
 status_t ujson_getc(ujson_t *uj) {
   int16_t buffer = uj->buffer;
   if (buffer >= 0) {
     uj->buffer = -1;
     return OK_STATUS(buffer);
   } else {
+    uj->str_size++;
     status_t s = uj->getc(uj->io_context);
     if (!status_err(s)) {
       crc32_add8(&uj->crc32, (uint8_t)s.value);
@@ -158,29 +163,64 @@ status_t ujson_parse_qs(ujson_t *uj, char *str, size_t len) {
 status_t ujson_parse_integer(ujson_t *uj, void *result, size_t rsz) {
   char ch = (char)TRY(consume_whitespace(uj));
   bool neg = false;
+  bool quoted = false;
+
+  if (ch == '"') {
+    // If we encounter a quote while parsing an integer, assume that
+    // the quoted string will contain an integer.  Get the next
+    // character and continue parsing as if we expect an integer.
+    quoted = true;
+    ch = (char)TRY(ujson_getc(uj));
+  }
 
   if (ch == '-') {
     neg = true;
     ch = (char)TRY(ujson_getc(uj));
   }
-  int64_t value = 0;
+  uint64_t value = 0;
 
   if (!(ch >= '0' && ch <= '9')) {
     return NOT_FOUND();
   }
   status_t s;
   while (ch >= '0' && ch <= '9') {
+    if (value > UINT64_MAX / 10) {
+      return OUT_OF_RANGE();
+    }
     value *= 10;
+    if (value > UINT64_MAX - (ch - '0')) {
+      return OUT_OF_RANGE();
+    }
     value += ch - '0';
     s = ujson_getc(uj);
     if (status_err(s))
       break;
     ch = (char)s.value;
   }
-  if (status_ok(s))
-    TRY(ujson_ungetc(uj, ch));
-  if (neg)
-    value = -value;
+
+  if (status_ok(s)) {
+    if (quoted) {
+      if (ch != '"') {
+        return INVALID_ARGUMENT();
+      }
+      // Close quote on an integer in quoted string.
+      // Don't have to unget the quote because we
+      // want to consume it.
+    } else {
+      TRY(ujson_ungetc(uj, ch));
+    }
+  }
+
+  if (neg) {
+    if (value > (uint64_t)INT64_MAX + 1) {
+      return OUT_OF_RANGE();
+    }
+
+    int64_t neg_value = -1 * (int64_t)value;
+    memcpy(result, &neg_value, rsz);
+    return OK_STATUS();
+  }
+
   memcpy(result, &value, rsz);
   return OK_STATUS();
 }
diff --git a/sw/device/lib/ujson/ujson.h b/sw/device/lib/ujson/ujson.h
index 81c608eebac63..01ecdd9a024ef 100644
--- a/sw/device/lib/ujson/ujson.h
+++ b/sw/device/lib/ujson/ujson.h
@@ -19,22 +19,27 @@ typedef struct ujson {
   void *io_context;
   /** A pointer to an IO function for writing data to the output. */
   status_t (*putbuf)(void *, const char *, size_t);
+  /** A pointer to an IO function for flusing buffered data to the output. */
+  status_t (*flushbuf)(void *);
   /** A pointer to an IO function for reading data from the input. */
   status_t (*getc)(void *);
   /** An internal single character buffer for ungetting a character. */
   int16_t buffer;
   /** Holds the rolling CRC32 of characters that are sent and received.*/
   uint32_t crc32;
+  /** Holds size counter for strings sent or received.*/
+  size_t str_size;
 } ujson_t;
 
 // clang-format off
-#define UJSON_INIT(context_, getc_, putbuf_) \
-  {                                          \
-    .io_context = (void*)(context_),         \
-    .putbuf_ = (putbuf_),                    \
-    .getc = (getc_),                         \
-    .buffer = -1,                            \
-    .crc32 = UINT32_MAX,                     \
+#define UJSON_INIT(context_, getc_, putbuf_, flushbuf_) \
+  {                                                     \
+      .io_context = (void *)(context_),                 \
+      .putbuf_ = (putbuf_),                             \
+      .flushbuf_ = (flushbuf_),                         \
+      .getc = (getc_),                                  \
+      .buffer = -1,                                     \
+      .crc32 = UINT32_MAX,                              \
   }
 // clang-format on
 
@@ -47,7 +52,8 @@ typedef struct ujson {
  * @return An initialized ujson_t context.
  */
 ujson_t ujson_init(void *context, status_t (*getc)(void *),
-                   status_t (*putbuf)(void *, const char *, size_t));
+                   status_t (*putbuf)(void *, const char *, size_t),
+                   status_t (*flushbuf)(void *));
 
 /**
  * Gets a single character from the input.
@@ -76,6 +82,19 @@ status_t ujson_ungetc(ujson_t *uj, char ch);
  */
 status_t ujson_putbuf(ujson_t *uj, const char *buf, size_t len);
 
+/**
+ * Flush a UJSON buffer to the output.
+ *
+ * Some console implementations, e.g., the SPI console, stages data in a
+ * software buffer before flushing it out to the low-level printf driver, as the
+ * driver code uses a framing protocol that is more efficient if used with bulk
+ * data transfers as opposed to being used with single character writes.
+ *
+ * @param uj A ujson IO context.
+ * @return OK or an error.
+ */
+status_t ujson_flushbuf(ujson_t *uj);
+
 /**
  * Resets the CRC32 calculation to an initial state.
  *
diff --git a/sw/device/lib/ujson/ujson_derive.h b/sw/device/lib/ujson/ujson_derive.h
index bc1bf9ddc6434..d506cfee075a2 100644
--- a/sw/device/lib/ujson/ujson_derive.h
+++ b/sw/device/lib/ujson/ujson_derive.h
@@ -119,6 +119,22 @@
         if (--nfield) TRY(ujson_putbuf(uj, ",", 1)); \
     }
 
+#define UJSON_IMPL_SERIALIZE_STRUCT_WITH_PADDING(name_, decl_) \
+    status_t ujson_serialize_with_padding_##name_(ujson_t *uj, const name_ *self, size_t max_size) { \
+        size_t nfield = decl_(ujson_count, ujson_count); \
+        uj->str_size = 0; \
+        TRY(ujson_putbuf(uj, "{", 1)); \
+        decl_(ujson_ser_field, ujson_ser_string) \
+        if (max_size > uj->str_size + 1) { \
+          for (size_t i = 0; i < max_size - uj->str_size - 1; i++) { \
+            TRY(ujson_putbuf(uj, " ", 1)); \
+          } \
+        } \
+        TRY(ujson_putbuf(uj, "}", 1)); \
+        return OK_STATUS(); \
+    } \
+    extern const int __never_referenced___here_to_eat_a_semicolon[]
+
 #define UJSON_IMPL_SERIALIZE_STRUCT(name_, decl_) \
     status_t ujson_serialize_##name_(ujson_t *uj, const name_ *self) { \
         size_t nfield = decl_(ujson_count, ujson_count); \
@@ -205,6 +221,7 @@
     status_t ujson_deserialize_##name_(ujson_t *uj, name_ *self) { \
         size_t nfield = 0; \
         char key[128]; \
+        uj->str_size = 0; \
         TRY(ujson_consume(uj, '{')); \
         while(TRY(ujson_consume_maybe(uj, '}')) == 0) { \
             if (nfield++ > 0) { \
@@ -228,6 +245,7 @@
 #define UJSON_IMPL_DESERIALIZE_ENUM(formal_name_, name_, decl_, ...) \
     status_t ujson_deserialize_##name_(ujson_t *uj, name_ *self) { \
         char value[128]; \
+        uj->str_size = 0; \
         if (TRY(ujson_consume_maybe(uj, '"'))) { \
             TRY(ujson_ungetc(uj, '"')); \
             TRY(ujson_parse_qs(uj, value, sizeof(value))); \
@@ -264,6 +282,14 @@
         status_t ujson_serialize_##name_(ujson_t *uj, const name_ *self) \
     ) /*endif*/
 
+#define UJSON_SERIALIZE_STRUCT_WITH_PADDING(name_, decl_) \
+    OT_IIF(UJSON_SERDE_IMPL) \
+    ( /*then*/ \
+        UJSON_IMPL_SERIALIZE_STRUCT_WITH_PADDING(name_, decl_) \
+    , /*else*/ \
+        status_t ujson_serialize_with_padding_##name_(ujson_t *uj, const name_ *self, size_t max_size) \
+    ) /*endif*/
+
 #define UJSON_SERIALIZE_ENUM(formal_name_, name_, decl_, ...) \
     OT_IIF(UJSON_SERDE_IMPL) \
     ( /*then*/ \
@@ -295,6 +321,7 @@
 #define UJSON_SERDE_STRUCT(formal_name_, name_, decl_, ...)        \
   UJSON_DECLARE_STRUCT(formal_name_, name_, decl_, ##__VA_ARGS__); \
   UJSON_SERIALIZE_STRUCT(name_, decl_);                            \
+  UJSON_SERIALIZE_STRUCT_WITH_PADDING(name_, decl_);               \
   UJSON_DESERIALIZE_STRUCT(name_, decl_)
 
 #define UJSON_SERDE_ENUM(formal_name_, name_, decl_, ...)          \
diff --git a/sw/device/lib/ujson/ujson_test.cc b/sw/device/lib/ujson/ujson_test.cc
index 981811d5bbc60..b9c1028d026c1 100644
--- a/sw/device/lib/ujson/ujson_test.cc
+++ b/sw/device/lib/ujson/ujson_test.cc
@@ -141,6 +141,8 @@ TEST(UJson, ParseInteger) {
   INT(uint8_t, "256", 0);
   // This value overflows int64 and becomes its own negative.
   INT(int64_t, "9223372036854775808", -9223372036854775808);
+  // Quoted number.
+  INT(uint32_t, "\"123\"", 123);
 }
 #undef INT
 #undef SIMPLE_INT
@@ -159,6 +161,23 @@ TEST(UJson, ParseIntegerError) {
   ss.Reset("q");
   s = ujson_parse_integer(&uj, (void *)&t, sizeof(t));
   EXPECT_EQ(status_err(s), kNotFound);
+
+  // A number that can NOT be represented in a 64-bit unsigned integer.
+  // number = UINT64_MAX + 1.
+  ss.Reset("18446744073709551616");
+  s = ujson_parse_integer(&uj, (void *)&t, sizeof(t));
+  EXPECT_EQ(status_err(s), kOutOfRange);
+
+  // A number that can NOT be represented in a 64-bit unsigned integer.
+  // number / 10 > UINT64_MAX / 10.
+  ss.Reset("18446744073709551620");
+  s = ujson_parse_integer(&uj, (void *)&t, sizeof(t));
+  EXPECT_EQ(status_err(s), kOutOfRange);
+
+  // Negative number that can NOT be represented in a 64-bit signed integer.
+  ss.Reset("-9223372036854775809");
+  s = ujson_parse_integer(&uj, (void *)&t, sizeof(t));
+  EXPECT_EQ(status_err(s), kOutOfRange);
 }
 
 TEST(UJson, SerializeString) {
diff --git a/sw/device/sca/BUILD b/sw/device/sca/BUILD
index 265e175bd5b9b..1e4e82428b668 100644
--- a/sw/device/sca/BUILD
+++ b/sw/device/sca/BUILD
@@ -34,8 +34,8 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:aes",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     ],
 )
 
@@ -55,8 +55,8 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     ],
 )
 
@@ -76,8 +76,8 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     ],
 )
 
@@ -99,8 +99,8 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/otbn/crypto:p384_ecdsa_sca",
     ],
 )
@@ -124,8 +124,8 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/otbn/crypto:p256_ecdsa_sca",
     ],
 )
diff --git a/sw/device/sca/aes_serial.c b/sw/device/sca/aes_serial.c
index 28c5af41d4813..bb7bdc8bc38aa 100644
--- a/sw/device/sca/aes_serial.c
+++ b/sw/device/sca/aes_serial.c
@@ -10,8 +10,8 @@
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/aes.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #if !OT_IS_ENGLISH_BREAKFAST
 #include "sw/device/lib/testing/aes_testutils.h"
@@ -165,6 +165,37 @@ dif_aes_transaction_t transaction = {
     .ctrl_aux_lock = false,
 };
 
+/**
+ * Poll the IDLE AES register.
+ *
+ */
+static void aes_sca_wait_for_idle(void) {
+  bool idle = false;
+  do {
+    SS_CHECK_DIF_OK(dif_aes_get_status(&aes, kDifAesStatusIdle, &idle));
+  } while (!idle);
+}
+
+/**
+ * Load fixed seed into AES.
+ *
+ * Before calling this function, use
+ * aes_testutils_masking_prng_zero_output_seed() to initialize the entropy
+ * complex for performing AES SCA measurements with masking switched off. This
+ * function then loads the fixed seed into the AES, allowing the disable the
+ * masking.
+ *
+ * @param key Key.
+ * @param key_len Key length.
+ */
+static void aes_sca_load_fixed_seed(void) {
+  aes_sca_wait_for_idle();
+  // Load magic seed such that masking is turned off. We need to do this after
+  // dif_aes_start() as then the force_masks is correctly set.
+  SS_CHECK_DIF_OK(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
+  aes_sca_wait_for_idle();
+}
+
 /**
  * Mask and configure key.
  *
@@ -181,18 +212,28 @@ static void aes_key_mask_and_config(const uint8_t *key, size_t key_len) {
   dif_aes_key_share_t key_shares;
   // Mask the provided key.
   for (int i = 0; i < key_len / 4; ++i) {
-    key_shares.share1[i] = sca_non_linear_layer(
-        sca_linear_layer(sca_next_lfsr(1, kScaLfsrMasking)));
+    key_shares.share1[i] = pentest_non_linear_layer(
+        pentest_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking)));
     key_shares.share0[i] = *((uint32_t *)key + i) ^ key_shares.share1[i];
   }
   // Provide random shares for unused key bits.
   for (size_t i = key_len / 4; i < kAesKeyLengthMax / 4; ++i) {
     key_shares.share1[i] =
-        sca_non_linear_layer(sca_next_lfsr(1, kScaLfsrMasking));
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
     key_shares.share0[i] =
-        sca_non_linear_layer(sca_next_lfsr(1, kScaLfsrMasking));
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
   }
+#if !OT_IS_ENGLISH_BREAKFAST
+  CHECK_STATUS_OK(aes_testutils_masking_prng_zero_output_seed());
+#endif
   SS_CHECK_DIF_OK(dif_aes_start(&aes, &transaction, &key_shares, NULL));
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (transaction.force_masks) {
+    // Disable masking. Force the masking PRNG output value to 0.
+    aes_sca_load_fixed_seed();
+  }
+#endif
 }
 
 /**
@@ -223,9 +264,9 @@ static void aes_serial_key_set(const uint8_t *key, size_t key_len) {
 /**
  * Encrypts a plaintext using the AES peripheral.
  *
- * This function uses `sca_call_and_sleep()` from the sca library to put Ibex to
- * sleep in order to minimize noise during captures. The plaintext must be
- * `kAesTextLength` bytes long.
+ * This function uses `pentest_call_and_sleep()` from the sca library to put
+ * Ibex to sleep in order to minimize noise during captures. The plaintext must
+ * be `kAesTextLength` bytes long.
  *
  * @param plaintext Plaintext.
  * @param plaintext_len Length of the plaintext.
@@ -245,7 +286,9 @@ static void aes_encrypt(const uint8_t *plaintext, size_t plaintext_len) {
   // Using the SecAesStartTriggerDelay hardware parameter, the AES unit is
   // configured to start operation 40 cycles after receiving the start trigger.
   // This allows Ibex to go to sleep in order to not disturb the capture.
-  sca_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, false);
+  pentest_set_trigger_high();
+  pentest_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, false, false);
+  pentest_set_trigger_low();
 }
 
 /**
@@ -293,9 +336,7 @@ static void aes_serial_single_encrypt(const uint8_t *plaintext,
     block_ctr = 1;
   }
 
-  sca_set_trigger_high();
   aes_encrypt(plaintext, plaintext_len);
-  sca_set_trigger_low();
 
   aes_send_ciphertext(false);
 }
@@ -374,12 +415,10 @@ static void aes_serial_batch_encrypt(const uint8_t *data, size_t data_len) {
     block_ctr = num_encryptions;
   }
 
-  sca_set_trigger_high();
   for (uint32_t i = 0; i < num_encryptions; ++i) {
     aes_encrypt(plaintext_random, kAesTextLength);
     aes_serial_advance_random();
   }
-  sca_set_trigger_low();
 
   aes_send_ciphertext(true);
 }
@@ -427,7 +466,6 @@ static void aes_serial_batch_alternative_encrypt(const uint8_t *data,
   // Set trigger high outside of loop
   // On FPGA, the trigger is AND-ed with AES !IDLE and creates a LO-HI-LO per
   // AES operation
-  sca_set_trigger_high();
   dif_aes_data_t ciphertext;
   for (uint32_t i = 0; i < num_encryptions; ++i) {
     // Encrypt
@@ -444,7 +482,6 @@ static void aes_serial_batch_alternative_encrypt(const uint8_t *data,
     // Use ciphertext as next plaintext (incl. next call to this function)
     memcpy(batch_plaintext, ciphertext.data, kAesTextLength);
   }
-  sca_set_trigger_low();
   // Acknowledge command
   simple_serial_send_status(0);
   // send last ciphertext
@@ -563,12 +600,10 @@ static void aes_serial_fvsr_key_batch_encrypt(const uint8_t *data,
   num_encryptions = read_32(data);
   SS_CHECK(num_encryptions <= kNumBatchOpsMax);
 
-  sca_set_trigger_high();
   for (uint32_t i = 0; i < num_encryptions; ++i) {
     aes_key_mask_and_config(batch_keys[i], kAesKeyLength);
     aes_encrypt(batch_plaintexts[i], kAesTextLength);
   }
-  sca_set_trigger_low();
 
   // Acknowledge command
   simple_serial_send_status(0);
@@ -622,15 +657,13 @@ static void aes_serial_fvsr_data_batch_encrypt(const uint8_t *data,
       memcpy(batch_plaintexts[i], plaintext_random, kAesKeyLength);
       aes_serial_advance_random_data();
     }
-    sample_fixed = sca_next_lfsr(1, kScaLfsrOrder) & 0x1;
+    sample_fixed = pentest_next_lfsr(1, kPentestLfsrOrder) & 0x1;
   }
 
-  sca_set_trigger_high();
   for (uint32_t i = 0; i < num_encryptions; ++i) {
     aes_key_mask_and_config(batch_keys[i], kAesKeyLength);
     aes_encrypt(batch_plaintexts[i], kAesTextLength);
   }
-  sca_set_trigger_low();
 
   // Acknowledge command
   simple_serial_send_status(0);
@@ -656,7 +689,7 @@ static void aes_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
     // enable masking
     transaction.force_masks = false;
   }
-  sca_seed_lfsr(seed_local, kScaLfsrMasking);
+  pentest_seed_lfsr(seed_local, kPentestLfsrMasking);
 }
 
 /**
@@ -671,7 +704,7 @@ static void aes_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
 static void aes_serial_seed_lfsr_order(const uint8_t *seed, size_t seed_len) {
   SS_CHECK(seed_len == sizeof(uint32_t));
   uint32_t seed_local = read_32(seed);
-  sca_seed_lfsr(seed_local, kScaLfsrOrder);
+  pentest_seed_lfsr(seed_local, kPentestLfsrOrder);
 }
 
 /**
@@ -730,7 +763,7 @@ static void aes_serial_set_default_values(const uint8_t *data,
     memcpy(plaintext_random, kPlaintextRandomStartFvsrData, kAesTextLength);
   }
 
-  sca_seed_lfsr(kPrngInitialState, kScaLfsrOrder);
+  pentest_seed_lfsr(kPrngInitialState, kPentestLfsrOrder);
 }
 
 /**
@@ -749,12 +782,16 @@ static void init_aes(void) {
  * UART.
  */
 bool test_main(void) {
-  sca_init(kScaTriggerSourceAes, kScaPeripheralIoDiv4 | kScaPeripheralAes);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralAes,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running AES serial");
 
   LOG_INFO("Initializing simple serial interface to capture board.");
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
   simple_serial_register_handler('k', aes_serial_key_set);
   simple_serial_register_handler('p', aes_serial_single_encrypt);
   simple_serial_register_handler('b', aes_serial_batch_encrypt);
@@ -775,11 +812,7 @@ bool test_main(void) {
   if (transaction.force_masks) {
     LOG_INFO("Initializing entropy complex.");
     CHECK_STATUS_OK(aes_testutils_masking_prng_zero_output_seed());
-    CHECK_DIF_OK(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
-    bool idle = false;
-    do {
-      CHECK_DIF_OK(dif_aes_get_status(&aes, kDifAesStatusIdle, &idle));
-    } while (!idle);
+    aes_sca_load_fixed_seed();
   }
 #endif
   CHECK_DIF_OK(dif_aes_trigger(&aes, kDifAesTriggerDataOutClear));
diff --git a/sw/device/sca/ecc256_sign_serial.c b/sw/device/sca/ecc256_sign_serial.c
index b81e379bb4c3b..397ad77abba32 100644
--- a/sw/device/sca/ecc256_sign_serial.c
+++ b/sw/device/sca/ecc256_sign_serial.c
@@ -10,8 +10,8 @@
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
@@ -241,10 +241,10 @@ static void ecc256_ecdsa(const uint8_t *arg, size_t len) {
   uint32_t ecc256_signature_s[kEcc256NumWords];
 
   LOG_INFO("Signing");
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   p256_ecdsa_sign(ecc256_msg, ecc256_private_key_d, ecc256_signature_r,
                   ecc256_signature_s, ecc256_secret_k);
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 
   // Copy r and s into byte buffers to avoid strict-aliasing violations.
   uint8_t ecc256_signature_r_bytes[kEcc256NumBytes];
@@ -269,15 +269,18 @@ static void ecc256_ecdsa(const uint8_t *arg, size_t len) {
  */
 static void simple_serial_main(void) {
   SS_CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
-
-  sca_init(kScaTriggerSourceOtbn, kScaPeripheralEntropy | kScaPeripheralIoDiv4 |
-                                      kScaPeripheralOtbn | kScaPeripheralCsrng |
-                                      kScaPeripheralEdn | kScaPeripheralHmac);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceOtbn,
+               kPentestPeripheralEntropy | kPentestPeripheralIoDiv4 |
+                   kPentestPeripheralOtbn | kPentestPeripheralCsrng |
+                   kPentestPeripheralEdn | kPentestPeripheralHmac,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running ECC serial");
   LOG_INFO("Initializing simple serial interface to capture board.");
 
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
   SS_CHECK(simple_serial_register_handler('p', ecc256_ecdsa) ==
            kSimpleSerialOk);
   SS_CHECK(simple_serial_register_handler('k', ecc256_set_secret_key_k) ==
diff --git a/sw/device/sca/ecc384_serial.c b/sw/device/sca/ecc384_serial.c
index 25baedf2d4841..d6b62a3e977af 100644
--- a/sw/device/sca/ecc384_serial.c
+++ b/sw/device/sca/ecc384_serial.c
@@ -10,8 +10,8 @@
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
@@ -256,10 +256,10 @@ static void ecc384_ecdsa(const uint8_t *ecc384_secret_k_bytes,
   uint32_t ecc384_signature_s[kEcc384NumWords];
 
   LOG_INFO("Signing");
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   p384_ecdsa_sign(ecc384_msg, ecc384_private_key_d, ecc384_signature_r,
                   ecc384_signature_s, ecc384_secret_k);
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 
   // Copy r and s into byte buffers to avoid strict-aliasing violations.
   uint8_t ecc384_signature_r_bytes[kEcc384NumBytes];
@@ -288,14 +288,17 @@ static void ecc384_ecdsa(const uint8_t *ecc384_secret_k_bytes,
  */
 static void simple_serial_main(void) {
   SS_CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
-
-  sca_init(kScaTriggerSourceOtbn, kScaPeripheralEntropy | kScaPeripheralIoDiv4 |
-                                      kScaPeripheralOtbn | kScaPeripheralCsrng |
-                                      kScaPeripheralEdn | kScaPeripheralHmac);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceOtbn,
+               kPentestPeripheralEntropy | kPentestPeripheralIoDiv4 |
+                   kPentestPeripheralOtbn | kPentestPeripheralCsrng |
+                   kPentestPeripheralEdn | kPentestPeripheralHmac,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running ECC serial");
   LOG_INFO("Initializing simple serial interface to capture board.");
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
 
   SS_CHECK(simple_serial_register_handler('p', ecc384_ecdsa) ==
            kSimpleSerialOk);
diff --git a/sw/device/sca/kmac_serial.c b/sw/device/sca/kmac_serial.c
index 251aa6d922596..d4893583c0c07 100644
--- a/sw/device/sca/kmac_serial.c
+++ b/sw/device/sca/kmac_serial.c
@@ -9,8 +9,8 @@
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "kmac_regs.h"
@@ -222,7 +222,7 @@ static dif_result_t kmac_msg_start(dif_kmac_mode_kmac_t mode, size_t l,
   mmio_region_write32(kmac.base_addr, KMAC_KEY_LEN_REG_OFFSET, key_len);
   for (int i = 0; i < ARRAYSIZE(k->share0); ++i) {
     // Run LFSR for 32 steps to ensure that all state bits are updated.
-    const uint32_t a = sca_next_lfsr(32, kScaLfsrMasking);
+    const uint32_t a = pentest_next_lfsr(32, kPentestLfsrMasking);
     mmio_region_write32(kmac.base_addr,
                         KMAC_KEY_SHARE0_0_REG_OFFSET +
                             (ptrdiff_t)i * (ptrdiff_t)sizeof(uint32_t),
@@ -480,7 +480,7 @@ static void sha3_serial_absorb(const uint8_t *msg, size_t msg_len) {
   // configured to start operation 40 cycles after receiving the START and PROC
   // commands. This allows Ibex to go to sleep in order to not disturb the
   // capture.
-  sca_call_and_sleep(kmac_msg_proc, kIbexSha3SleepCycles, false);
+  pentest_call_and_sleep(kmac_msg_proc, kIbexSha3SleepCycles, false, false);
 }
 
 /**
@@ -497,9 +497,9 @@ static void sha3_serial_single_absorb(const uint8_t *msg, size_t msg_len) {
   SS_CHECK(msg_len == kMessageLength);
 
   // Ungate the capture trigger signal and then start the operation.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   sha3_serial_absorb(msg, msg_len);
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 
   // Check KMAC has finsihed processing the message.
   kmac_msg_done();
@@ -544,9 +544,9 @@ static void sha3_serial_batch(const uint8_t *data, size_t data_len) {
     kmac_reset();
     memcpy(kmac_key.share0, batch_keys[i], kKeyLength);
 
-    sca_set_trigger_high();
+    pentest_set_trigger_high();
     sha3_serial_absorb(batch_messages[i], kMessageLength);
-    sca_set_trigger_low();
+    pentest_set_trigger_low();
 
     kmac_msg_done();
     SS_CHECK_DIF_OK(kmac_get_digest(out, kDigestLength));
@@ -571,7 +571,7 @@ static void sha3_serial_batch(const uint8_t *data, size_t data_len) {
  */
 static void sha3_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
   SS_CHECK(seed_len == sizeof(uint32_t));
-  sca_seed_lfsr(read_32(seed), kScaLfsrMasking);
+  pentest_seed_lfsr(read_32(seed), kPentestLfsrMasking);
 }
 
 /**
@@ -581,12 +581,16 @@ static void sha3_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
  * UART.
  */
 bool test_main(void) {
-  sca_init(kScaTriggerSourceKmac, kScaPeripheralIoDiv4 | kScaPeripheralKmac);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceKmac,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralKmac,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running kmac_serial");
 
   LOG_INFO("Initializing simple serial interface to capture board.");
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
   simple_serial_register_handler('k', sha3_serial_set_key);
   simple_serial_register_handler('p', sha3_serial_single_absorb);
   simple_serial_register_handler('b', sha3_serial_batch);
diff --git a/sw/device/sca/lib/BUILD b/sw/device/sca/lib/BUILD
index 794249a15fa9c..d6048e29a5eac 100644
--- a/sw/device/sca/lib/BUILD
+++ b/sw/device/sca/lib/BUILD
@@ -34,7 +34,6 @@ cc_library(
     hdrs = ["simple_serial.h"],
     deps = [
         ":prng",
-        ":sca",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
         "//sw/device/lib/base:macros",
@@ -42,32 +41,6 @@ cc_library(
         "//sw/device/lib/dif:base",
         "//sw/device/lib/dif:uart",
         "//sw/device/lib/runtime:print",
-    ],
-)
-
-cc_library(
-    name = "sca",
-    srcs = ["sca.c"],
-    hdrs = ["sca.h"],
-    deps = [
-        "//hw/ip/aes:model",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/arch:device",
-        "//sw/device/lib/base:bitfield",
-        "//sw/device/lib/base:macros",
-        "//sw/device/lib/dif:clkmgr",
-        "//sw/device/lib/dif:csrng",
-        "//sw/device/lib/dif:edn",
-        "//sw/device/lib/dif:entropy_src",
-        "//sw/device/lib/dif:gpio",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/dif:rv_timer",
-        "//sw/device/lib/dif:uart",
-        "//sw/device/lib/runtime:hart",
-        "//sw/device/lib/runtime:irq",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing:pinmux_testutils",
-        "//sw/device/lib/testing/test_framework:check",
-        "//sw/device/lib/testing/test_framework:ottf_start",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     ],
 )
diff --git a/sw/device/sca/lib/aes.c b/sw/device/sca/lib/aes.c
index 7b8e7b36527fb..409dfb9033f55 100644
--- a/sw/device/sca/lib/aes.c
+++ b/sw/device/sca/lib/aes.c
@@ -22,10 +22,6 @@
  */
 #include "aes.h"
 
-#include <errno.h>
-#include <stdio.h>
-#include <stdlib.h>
-
 #include "sw/device/lib/base/memory.h"
 
 enum {
diff --git a/sw/device/sca/lib/prng.c b/sw/device/sca/lib/prng.c
index 478d4cbd21e6a..c50e208881ffa 100644
--- a/sw/device/sca/lib/prng.c
+++ b/sw/device/sca/lib/prng.c
@@ -158,6 +158,8 @@ __attribute__((noinline)) static uint32_t genrand_int32(void) {
 
 void prng_seed(uint32_t seed) { init_by_array(&seed, 1); }
 
+uint32_t prng_rand_uint32(void) { return genrand_int32(); }
+
 uint8_t prng_rand_byte(void) {
   uint32_t rand = 0;
   do {
diff --git a/sw/device/sca/lib/prng.h b/sw/device/sca/lib/prng.h
index 53de2d56a5645..d1806c1bf65fd 100644
--- a/sw/device/sca/lib/prng.h
+++ b/sw/device/sca/lib/prng.h
@@ -33,6 +33,16 @@ extern "C" {
  */
 void prng_seed(uint32_t seed);
 
+/**
+ * Generates a random uint32_t.
+ *
+ * The behavior of this function matches the behavior of `random.randint(0,
+ * 0xFFFFFFFF)` in python.
+ *
+ * @return A random uint32_t.
+ */
+uint32_t prng_rand_uint32(void);
+
 /**
  * Generates a random byte.
  *
diff --git a/sw/device/sca/lib/sca.c b/sw/device/sca/lib/sca.c
deleted file mode 100644
index b6c32c25b76e4..0000000000000
--- a/sw/device/sca/lib/sca.c
+++ /dev/null
@@ -1,424 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/sca/lib/sca.h"
-
-#include "hw/ip/aes/model/aes.h"
-#include "sw/device/lib/arch/device.h"
-#include "sw/device/lib/base/bitfield.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/lib/dif/dif_clkmgr.h"
-#include "sw/device/lib/dif/dif_entropy_src.h"
-#include "sw/device/lib/dif/dif_gpio.h"
-#include "sw/device/lib/dif/dif_pinmux.h"
-#include "sw/device/lib/dif/dif_rv_timer.h"
-#include "sw/device/lib/dif/dif_uart.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/print.h"
-#include "sw/device/lib/testing/pinmux_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
-
-#include "clkmgr_regs.h"  // Generated
-#include "csrng_regs.h"   // Generated
-#include "edn_regs.h"     // Generated
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-#if !OT_IS_ENGLISH_BREAKFAST
-#include "sw/device/lib/dif/dif_csrng.h"
-#include "sw/device/lib/dif/dif_edn.h"
-#endif
-
-/**
- * Bitfield for the trigger source.
- *
- * Bits 10 and 11 are used to select the trigger source. See chiplevel.sv.tpl
- * for details.
- */
-static const bitfield_field32_t kTriggerSourceBitfield = {
-    .index = 10,
-    .mask = 0x3,
-};
-
-enum {
-  /**
-   * Bit index of the hardware trigger gate signal for gating the hardware
-   * trigger from software.
-   *
-   * See chiplevel.sv.tpl for details.
-   */
-  kTriggerHwGateBitIndex = 9,
-  /**
-   * Bit index of the software trigger signal.
-   *
-   * See chiplevel.sv.tpl for details.
-   */
-  kTriggerSwBitIndex = 8,
-  /**
-   * RV timer settings.
-   */
-  kRvTimerComparator = 0,
-  kRvTimerHart = kTopEarlgreyPlicTargetIbex0,
-};
-
-// By default, we use the precise, hardware-gated capture trigger.
-static unsigned int trigger_bit_index = kTriggerHwGateBitIndex;
-
-static dif_uart_t uart0;
-static dif_gpio_t gpio;
-static dif_pinmux_t pinmux;
-static dif_rv_timer_t timer;
-
-#if !OT_IS_ENGLISH_BREAKFAST
-static dif_uart_t uart1;
-static dif_csrng_t csrng;
-static dif_edn_t edn0;
-static dif_edn_t edn1;
-#endif
-
-// TODO(alphan): Handle return values as long as they don't affect capture rate.
-
-/**
- * Initializes the UART peripheral.
- */
-static void sca_init_uart(void) {
-  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
-  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
-        "kClockFreqPeripheralHz must fit in uint32_t");
-  const dif_uart_config_t uart_config = {
-      .baudrate = (uint32_t)kUartBaudrate,
-      .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
-      .parity_enable = kDifToggleDisabled,
-      .parity = kDifUartParityEven,
-      .tx_enable = kDifToggleEnabled,
-      .rx_enable = kDifToggleEnabled,
-  };
-
-  OT_DISCARD(dif_uart_init(mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR),
-                           &uart0));
-  OT_DISCARD(dif_uart_configure(&uart0, uart_config));
-  base_uart_stdout(&uart0);
-
-#if !OT_IS_ENGLISH_BREAKFAST
-  OT_DISCARD(dif_uart_init(mmio_region_from_addr(TOP_EARLGREY_UART1_BASE_ADDR),
-                           &uart1));
-  OT_DISCARD(dif_uart_configure(&uart1, uart_config));
-#endif
-}
-
-/**
- * Initializes the GPIO peripheral.
- *
- * @param trigger Trigger source.
- */
-static void sca_init_gpio(sca_trigger_source_t trigger) {
-  OT_DISCARD(
-      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
-
-  uint32_t select_mask =
-      bitfield_field32_write(0, kTriggerSourceBitfield, UINT32_MAX);
-  uint32_t enable_mask = bitfield_bit32_write(0, kTriggerHwGateBitIndex, true);
-  enable_mask = bitfield_bit32_write(enable_mask, kTriggerSwBitIndex, true);
-
-  // Configure the pinmux to enable the GPIOs.
-  for (size_t i = 0; i < 32; ++i) {
-    if ((select_mask | enable_mask) & (1u << i)) {
-      dif_pinmux_index_t mio = kTopEarlgreyPinmuxInselIoa0 + i;
-      dif_pinmux_index_t periph_io =
-          kTopEarlgreyPinmuxPeripheralInGpioGpio0 + i;
-      OT_DISCARD(dif_pinmux_input_select(&pinmux, periph_io, mio));
-
-      mio = kTopEarlgreyPinmuxMioOutIoa0 + i;
-      periph_io = kTopEarlgreyPinmuxOutselGpioGpio0 + i;
-      OT_DISCARD(dif_pinmux_output_select(&pinmux, mio, periph_io));
-    }
-  }
-
-  OT_DISCARD(dif_gpio_output_set_enabled_all(&gpio, select_mask | enable_mask));
-
-  OT_DISCARD(dif_gpio_write_masked(
-      &gpio, select_mask,
-      bitfield_field32_write(0, kTriggerSourceBitfield, trigger)));
-}
-
-/**
- * Initializes the timer peripheral.
- */
-static void sca_init_timer(void) {
-  OT_DISCARD(dif_rv_timer_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_TIMER_BASE_ADDR), &timer));
-  OT_DISCARD(dif_rv_timer_reset(&timer));
-  dif_rv_timer_tick_params_t tick_params;
-  OT_DISCARD(dif_rv_timer_approximate_tick_params(
-      kClockFreqPeripheralHz, kClockFreqCpuHz, &tick_params));
-  OT_DISCARD(dif_rv_timer_set_tick_params(&timer, kRvTimerHart, tick_params));
-  OT_DISCARD(dif_rv_timer_irq_set_enabled(
-      &timer, kDifRvTimerIrqTimerExpiredHart0Timer0, kDifToggleEnabled));
-  irq_timer_ctrl(true);
-  irq_global_ctrl(true);
-}
-
-/**
- * Initializes the CSRNG handle.
- */
-static void sca_init_csrng(void) {
-#if !OT_IS_ENGLISH_BREAKFAST
-  OT_DISCARD(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
-                            &csrng));
-  OT_DISCARD(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
-                            &csrng));
-#endif
-}
-
-/**
- * Initializes the EDN handle.
- */
-static void sca_init_edn(void) {
-#if !OT_IS_ENGLISH_BREAKFAST
-  OT_DISCARD(
-      dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
-
-  OT_DISCARD(
-      dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
-#endif
-}
-
-/**
- * Override default Timer ISR.
- *
- * Disables the counter and clears pending interrupts.
- */
-void ottf_timer_isr(uint32_t *exc_info) {
-  // Return values of below functions are ignored to improve capture
-  // performance.
-  OT_DISCARD(dif_rv_timer_counter_set_enabled(&timer, kRvTimerHart,
-                                              kDifToggleDisabled));
-  OT_DISCARD(dif_rv_timer_irq_acknowledge(
-      &timer, kDifRvTimerIrqTimerExpiredHart0Timer0));
-}
-
-/**
- * Disables the given peripherals to reduce noise during SCA.
- *
- * Care must be taken when disabling the entropy complex if a peripheral that
- * depends on it will be used in SCA. E.g., We can disable the entropy complex
- * when analyzing AES only because AES features a parameter to skip PRNG
- * reseeding for SCA experiments. Without this parameter, AES would simply get
- * stalled with a disabled entropy complex.
- *
- * @param disable Set of peripherals to disable.
- */
-void sca_disable_peripherals(sca_peripherals_t disable) {
-#if !OT_IS_ENGLISH_BREAKFAST
-  if (disable & kScaPeripheralEdn) {
-    OT_DISCARD(dif_edn_stop(&edn0));
-    OT_DISCARD(dif_edn_stop(&edn1));
-  }
-  if (disable & kScaPeripheralCsrng) {
-    OT_DISCARD(dif_csrng_stop(&csrng));
-  }
-  if (disable & kScaPeripheralEntropy) {
-    dif_entropy_src_t entropy;
-    OT_DISCARD(dif_entropy_src_init(
-        mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy));
-    OT_DISCARD(dif_entropy_src_set_enabled(&entropy, kDifToggleDisabled));
-  }
-#endif
-
-  // Disable HMAC, KMAC, OTBN and USB clocks through CLKMGR DIF.
-  dif_clkmgr_t clkmgr;
-  OT_DISCARD(dif_clkmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
-
-  if (disable & kScaPeripheralAes) {
-    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
-        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT, kDifToggleDisabled));
-  }
-#if !OT_IS_ENGLISH_BREAKFAST
-  if (disable & kScaPeripheralHmac) {
-    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
-        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT, kDifToggleDisabled));
-  }
-#endif
-  if (disable & kScaPeripheralIoDiv4) {
-    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
-        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV4_PERI_EN_BIT,
-        kDifToggleDisabled));
-  }
-  if (disable & kScaPeripheralIoDiv2) {
-    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
-        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV2_PERI_EN_BIT,
-        kDifToggleDisabled));
-  }
-  if (disable & kScaPeripheralUsb) {
-    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
-        &clkmgr, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT, kDifToggleDisabled));
-  }
-  if (disable & kScaPeripheralIo) {
-    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
-        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_PERI_EN_BIT, kDifToggleDisabled));
-  }
-
-#if !OT_IS_ENGLISH_BREAKFAST
-  if (disable & kScaPeripheralKmac) {
-    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
-        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT, kDifToggleDisabled));
-  }
-  if (disable & kScaPeripheralOtbn) {
-    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
-        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT, kDifToggleDisabled));
-  }
-#endif
-}
-
-void sca_init(sca_trigger_source_t trigger, sca_peripherals_t enable) {
-  OT_DISCARD(dif_pinmux_init(
-      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
-  pinmux_testutils_init(&pinmux);
-  sca_init_uart();
-  sca_init_gpio(trigger);
-  sca_init_timer();
-  sca_init_csrng();
-  sca_init_edn();
-  sca_disable_peripherals(~enable);
-}
-
-const dif_uart_t *sca_get_uart(void) {
-#if !OT_IS_ENGLISH_BREAKFAST
-  return &uart1;
-#else
-  return &uart0;
-#endif
-}
-
-void sca_select_trigger_type(sca_trigger_type_t trigger_type) {
-  if (trigger_type == kScaTriggerTypeHwGated) {
-    trigger_bit_index = kTriggerHwGateBitIndex;
-  } else if (trigger_type == kScaTriggerTypeSw) {
-    trigger_bit_index = kTriggerSwBitIndex;
-  }
-}
-
-void sca_set_trigger_high(void) {
-  OT_DISCARD(dif_gpio_write(&gpio, trigger_bit_index, true));
-}
-
-void sca_set_trigger_low(void) {
-  OT_DISCARD(dif_gpio_write(&gpio, trigger_bit_index, false));
-}
-
-void sca_call_and_sleep(sca_callee callee, uint32_t sleep_cycles,
-                        bool sw_trigger) {
-  // Disable the IO_DIV4_PERI clock to reduce noise during the actual capture.
-  // This also disables the UART(s) and GPIO modules required for
-  // communication with the scope. Therefore, it has to be re-enabled after
-  // the capture.
-  dif_clkmgr_t clkmgr;
-  OT_DISCARD(dif_clkmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
-
-  // Start timer to wake Ibex after the callee is done.
-  uint64_t current_time;
-  // Return values of below functions are ignored to improve capture
-  // performance.
-  OT_DISCARD(dif_rv_timer_counter_read(&timer, kRvTimerHart, &current_time));
-  OT_DISCARD(dif_rv_timer_arm(&timer, kRvTimerHart, kRvTimerComparator,
-                              current_time + sleep_cycles));
-  OT_DISCARD(dif_rv_timer_counter_set_enabled(&timer, kRvTimerHart,
-                                              kDifToggleEnabled));
-
-  if (sw_trigger) {
-    sca_set_trigger_high();
-  }
-
-  callee();
-
-  if (sw_trigger) {
-    sca_set_trigger_low();
-  }
-
-  wait_for_interrupt();
-
-  // Re-enable IO_DIV4_PERI clock to resume communication with the scope.
-  OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
-      &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV4_PERI_EN_BIT, kDifToggleEnabled));
-}
-
-static uint32_t sca_lfsr_state_masking = 0xdeadbeef;
-static uint32_t sca_lfsr_state_order = 0x99999999;
-
-void sca_seed_lfsr(uint32_t seed, sca_lfsr_context_t context) {
-  if (context == kScaLfsrMasking) {
-    sca_lfsr_state_masking = seed;
-  }
-  if (context == kScaLfsrOrder) {
-    sca_lfsr_state_order = seed;
-  }
-}
-
-uint32_t sca_next_lfsr(uint16_t num_steps, sca_lfsr_context_t context) {
-  uint32_t sca_lfsr_state;
-  if (context == kScaLfsrMasking) {
-    sca_lfsr_state = sca_lfsr_state_masking;
-  }
-  if (context == kScaLfsrOrder) {
-    sca_lfsr_state = sca_lfsr_state_order;
-  }
-  const uint32_t lfsr_out = sca_lfsr_state;
-  for (size_t i = 0; i < num_steps; ++i) {
-    bool lfsr_bit = sca_lfsr_state & 0x00000001;
-    sca_lfsr_state = sca_lfsr_state >> 1;
-    if (lfsr_bit) {
-      sca_lfsr_state ^= 0x80000057;
-    }
-  }
-  if (context == kScaLfsrMasking) {
-    sca_lfsr_state_masking = sca_lfsr_state;
-  }
-  if (context == kScaLfsrOrder) {
-    sca_lfsr_state_order = sca_lfsr_state;
-  }
-  return lfsr_out;
-}
-
-uint32_t sca_linear_layer(uint32_t input) {
-  uint32_t output =
-      // output[7:0]
-      (((input >> 0) & 0x1) << 7) | (((input >> 6) & 0x1) << 6) |
-      (((input >> 11) & 0x1) << 5) | (((input >> 14) & 0x1) << 4) |
-      (((input >> 1) & 0x1) << 3) | (((input >> 7) & 0x1) << 2) |
-      (((input >> 10) & 0x1) << 1) | (((input >> 13) & 0x1) << 0) |
-      // output[15:8]
-      (((input >> 2) & 0x1) << 15) | (((input >> 4) & 0x1) << 14) |
-      (((input >> 9) & 0x1) << 13) | (((input >> 12) & 0x1) << 12) |
-      (((input >> 3) & 0x1) << 11) | (((input >> 5) & 0x1) << 10) |
-      (((input >> 8) & 0x1) << 9) | (((input >> 15) & 0x1) << 8) |
-      // output[23:16]
-      (((input >> 16) & 0x1) << 23) | (((input >> 22) & 0x1) << 22) |
-      (((input >> 27) & 0x1) << 21) | (((input >> 30) & 0x1) << 20) |
-      (((input >> 17) & 0x1) << 19) | (((input >> 23) & 0x1) << 18) |
-      (((input >> 26) & 0x1) << 17) | (((input >> 29) & 0x1) << 16) |
-      // output[31:24]
-      (((input >> 18) & 0x1) << 31) | (((input >> 20) & 0x1) << 30) |
-      (((input >> 25) & 0x1) << 29) | (((input >> 28) & 0x1) << 28) |
-      (((input >> 19) & 0x1) << 27) | (((input >> 21) & 0x1) << 26) |
-      (((input >> 24) & 0x1) << 25) | (((input >> 31) & 0x1) << 24);
-
-  return output;
-}
-
-uint32_t sca_non_linear_layer(uint32_t input) {
-  uint32_t output;
-  if (input != 0) {
-    // Perform the AES S-Box look ups bytewise.
-    output = (uint32_t)(sbox[(input >> 24) & 0xFF] << 24) |
-             (uint32_t)(sbox[(input >> 16) & 0xFF] << 16) |
-             (uint32_t)(sbox[(input >> 8) & 0xFF] << 8) | sbox[input & 0xFF];
-  } else {
-    output = input;
-  }
-
-  return output;
-}
diff --git a/sw/device/sca/lib/sca.h b/sw/device/sca/lib/sca.h
deleted file mode 100644
index 57e0fd084e6f4..0000000000000
--- a/sw/device/sca/lib/sca.h
+++ /dev/null
@@ -1,266 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SCA_LIB_SCA_H_
-#define OPENTITAN_SW_DEVICE_SCA_LIB_SCA_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/dif/dif_uart.h"
-
-/**
- * @file
- * @brief Side-channel analysis support library.
- */
-
-/**
- * Trigger sources.
- *
- * The trigger signal for a peripheral is based on its clkmgr_aon_idle signal.
- * These values must match the values in chiplevel.sv.tpl.
- */
-typedef enum sca_trigger_source {
-  /**
-   * Use AES for capture trigger.
-   *
-   * The trigger signal will go high 320 cycles after `dif_aes_trigger()` is
-   * called and remain high until the operation is complete.
-   */
-  kScaTriggerSourceAes = 0,
-  /**
-   * Use HMAC for capture trigger.
-   */
-  kScaTriggerSourceHmac = 1,
-  /**
-   * Use KMAC for capture trigger.
-   */
-  kScaTriggerSourceKmac = 2,
-  /**
-   * Use OTBN for capture trigger.
-   */
-  kScaTriggerSourceOtbn = 3,
-} sca_trigger_source_t;
-
-/**
- * Trigger type.
- */
-typedef enum sca_trigger_type {
-  /**
-   * Use the precise hardware capture trigger gateable by software. If selected,
-   * the actual capture trigger is generated based on the clkmgr_aon_idle signal
-   * of the peripheral corresponding to selected trigger source.
-   *
-   * Note that this is available on FPGA only.
-   */
-  kScaTriggerTypeHwGated = 0,
-  /**
-   * Use the fully software controlled capture trigger. If selected, the
-   * configured trigger source is not relevant.
-   */
-  kScaTriggerTypeSw = 1,
-} sca_trigger_type_t;
-
-/**
- * Peripherals.
- *
- * Constants below are bitmasks that can be used to specify a set of
- * peripherals.
- *
- * See also: `sca_peripherals_t`.
- */
-typedef enum sca_peripheral {
-  /**
-   * EDN.
-   */
-  kScaPeripheralEdn = 1 << 0,
-  /**
-   * CSRNG.
-   */
-  kScaPeripheralCsrng = 1 << 1,
-  /**
-   * Entropy source.
-   */
-  kScaPeripheralEntropy = 1 << 2,
-  /**
-   * AES.
-   */
-  kScaPeripheralAes = 1 << 3,
-  /**
-   * HMAC.
-   */
-  kScaPeripheralHmac = 1 << 4,
-  /**
-   * KMAC.
-   */
-  kScaPeripheralKmac = 1 << 5,
-  /**
-   * OTBN.
-   */
-  kScaPeripheralOtbn = 1 << 6,
-  /**
-   * Peripherals using the IO_DIV4_PERI clock (UART, GPIO, I2C, SPI Dev, ...)
-   */
-  kScaPeripheralIoDiv4 = 1 << 7,
-  /**
-   * Peripherals using the IO_DIV2_PERI clock (SPI Host 1)
-   */
-  kScaPeripheralIoDiv2 = 1 << 8,
-  /**
-   * USB.
-   */
-  kScaPeripheralUsb = 1 << 9,
-  /**
-   * Peripherals using the IO_PERI clock (SPI Host 0)
-   */
-  kScaPeripheralIo = 1 << 10,
-} sca_peripheral_t;
-
-/**
- * A set of peripherals.
- *
- * This type is used for specifying which peripherals should be enabled when
- * calling `sca_init()`. Remaining peripherals will be disabled to reduce noise
- * during SCA.
- *
- * See also: `sca_peripheral_t`, `sca_init()`.
- */
-typedef uint32_t sca_peripherals_t;
-
-/**
- * A set of contexts for SW LFSR
- *
- * This type is used for specifying the context of the LFSR, with each context
- * corresponding to a different state variable
- */
-typedef enum sca_lfsr_context {
-  /**
-   * PRNG used for initial data sharing
-   */
-  kScaLfsrMasking = 0,
-  /**
-   * PRNG used for determining the order of fixed and random measurements
-   */
-  kScaLfsrOrder = 1,
-
-} sca_lfsr_context_t;
-
-/**
- * Initializes the peripherals (pinmux, uart, gpio, and timer) used by SCA code.
- *
- * @param trigger Peripheral to use for the trigger signal.
- * @param enable Set of peripherals to enable. Remaining peripherals will
- * be disabled to reduce noise during SCA.
- */
-void sca_init(sca_trigger_source_t trigger, sca_peripherals_t enable);
-
-/**
- * Returns a handle to the intialized UART device.
- *
- * @return Handle to the initialized UART device.
- */
-const dif_uart_t *sca_get_uart(void);
-
-/**
- * Select the capture trigger type.
- *
- * @param trigger_type The trigger type to select.
- */
-void sca_select_trigger_type(sca_trigger_type_t trigger_type);
-
-/**
- * Sets capture trigger high.
- *
- * The actual trigger signal used for capture is a combination (logical AND) of:
- * - the trigger gate enabled here, and
- * - the busy signal of the peripheral of interest.
- */
-void sca_set_trigger_high(void);
-
-/**
- * Sets capture trigger low.
- */
-void sca_set_trigger_low(void);
-
-/**
- * Functions called by `sca_call_and_sleep()` must conform to this prototype.
- */
-typedef void (*sca_callee)(void);
-
-/**
- * Calls the given function and puts Ibex to sleep.
- *
- * This function can be used to minimize noise while capturing power traces for
- * side-channel attacks, in which case `callee` would trigger the operation of
- * interest, typically a crypto operation, on the target device.
- *
- * @param callee Function to call before putting Ibex to sleep.
- * @param sleep_cycles Number of cycles to sleep.
- * @param sw_trigger Raise trigger before calling the target function.
- */
-void sca_call_and_sleep(sca_callee callee, uint32_t sleep_cycles,
-                        bool sw_trigger);
-
-/**
- * Seeds the software LFSR usable e.g. for key masking.
- *
- * This functions seeds the Galois XOR type LFSR with the provided seed value.
- * Note that the LFSR itself has very low diffusion.
- *
- * @param seed The new seed value.
- * @param context Specifies which LFSR to seed.
- */
-void sca_seed_lfsr(uint32_t seed, sca_lfsr_context_t context);
-
-/**
- * Steps the software LFSR usable e.g. for key masking `num_steps` times.
- *
- * This function steps the Galois XOR type LFSR n times. Note that the LFSR
- * itself has very low diffusion. To improve the statistical properties, the
- * multiple steps can be run. For example, by running 32 steps it can be
- * ensured that each state bit depends on at least two previous state bits.
- *
- * @param num_steps The number of steps to run.
- * @param context Specifies which LFSR to run.
-
- * @return The current state of the LFSR.
- */
-uint32_t sca_next_lfsr(uint16_t num_steps, sca_lfsr_context_t context);
-
-/**
- * Applies a linear layer.
- *
- * This function feeds the input through a linear permutation layer. This is
- * suitable to ensure 1) that adjacent output bits of the software LFSR do not
- * go into the same S-Box (see `sca_non_linear_layer()`) and 2) that the output
- * of S-Box(n) is not always going to be equal to the output of S-Box(n+1) in
- * the subsequent cycle. For details on how this can be achieved, refer to the
- * corresponding hardware implementation in hw/ip/prim/rtl/prim_lfsr.sv.
- *
- * @param input The input value.
- *
- * @return The output of the linear layer.
- *
- */
-uint32_t sca_linear_layer(uint32_t input);
-
-/**
- * Applies a non-linear layer.
- *
- * This function feeds the input through a non-linear layer. It is suitable to
- * improve the statistical properties of the software LFSR usable for key
- * masking, see `sca_seed_lfsr()` and `sca_next_lfsr()`. Internally, a LUT-based
- * AES S-Box is applied to the invididual bytes of the input word.
- *
- * In addition, the ouput bytes are XORed with the sbox[0]. This is useful to
- * ensure an all-zero seed (used to switch off key masking) also results in an
- * all-zero output of the non-linear layer.
- *
- * @param input The input value.
- *
- * @return The output of the non-linear layer.
- *
- */
-uint32_t sca_non_linear_layer(uint32_t input);
-
-#endif  // OPENTITAN_SW_DEVICE_SCA_LIB_SCA_H_
diff --git a/sw/device/sca/lib/simple_serial.c b/sw/device/sca/lib/simple_serial.c
index 6e3473c2df76d..fde86417ea8df 100644
--- a/sw/device/sca/lib/simple_serial.c
+++ b/sw/device/sca/lib/simple_serial.c
@@ -10,7 +10,7 @@
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
@@ -173,7 +173,7 @@ static void simple_serial_seed_prng(const uint8_t *seed, size_t seed_len) {
 static void simple_serial_select_trigger_type(const uint8_t *trigger,
                                               size_t trigger_len) {
   SS_CHECK(trigger_len == 1);
-  sca_select_trigger_type((sca_trigger_type_t)trigger[0]);
+  pentest_select_trigger_type((pentest_trigger_type_t)trigger[0]);
 }
 
 /**
diff --git a/sw/device/sca/otbn_vertical/BUILD b/sw/device/sca/otbn_vertical/BUILD
index 2ef8088ef035f..5c1576866a14d 100644
--- a/sw/device/sca/otbn_vertical/BUILD
+++ b/sw/device/sca/otbn_vertical/BUILD
@@ -21,8 +21,8 @@ cc_library(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/otbn/crypto:p256_key_from_seed_sca",
     ],
 )
@@ -42,8 +42,8 @@ cc_library(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/otbn/crypto:p256_mod_inv_sca",
     ],
 )
@@ -67,10 +67,10 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
         "//sw/device/sca/lib:simple_serial",
         "//sw/device/sca/otbn_vertical:ecc256_keygen_serial",
         "//sw/device/sca/otbn_vertical:ecc256_modinv_serial",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/otbn/crypto:p256_mod_inv_sca",
     ],
 )
diff --git a/sw/device/sca/otbn_vertical/ecc256_keygen_serial.c b/sw/device/sca/otbn_vertical/ecc256_keygen_serial.c
index e8daef5cc37ce..4f736a8ce83b8 100644
--- a/sw/device/sca/otbn_vertical/ecc256_keygen_serial.c
+++ b/sw/device/sca/otbn_vertical/ecc256_keygen_serial.c
@@ -12,8 +12,8 @@
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
@@ -203,10 +203,11 @@ static void p256_run_keygen(uint32_t mode, const uint32_t *share0,
       otbn_dmem_write(kEcc256SeedNumWords, share1, kOtbnVarSeed1));
 
   // Execute program.
-  sca_set_trigger_high();
-  sca_call_and_sleep(otbn_manual_trigger, kIbexOtbnSleepCycles, false);
+  pentest_set_trigger_high();
+  pentest_call_and_sleep(otbn_manual_trigger, kIbexOtbnSleepCycles, false,
+                         false);
   SS_CHECK_STATUS_OK(otbn_busy_wait_for_done());
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 }
 
 void ecc256_ecdsa_keygen_fvsr_seed_batch(const uint8_t *data, size_t data_len) {
diff --git a/sw/device/sca/otbn_vertical/ecc256_modinv_serial.c b/sw/device/sca/otbn_vertical/ecc256_modinv_serial.c
index 18fe0be6ae5fd..bdf724b6bdd3e 100644
--- a/sw/device/sca/otbn_vertical/ecc256_modinv_serial.c
+++ b/sw/device/sca/otbn_vertical/ecc256_modinv_serial.c
@@ -12,8 +12,8 @@
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
@@ -91,10 +91,11 @@ static void p256_run_modinv(uint32_t *k0, uint32_t *k1) {
       otbn_dmem_write(kEcc256ModInvInputShareNumWords, k1, kOtbnVarModInvK1));
 
   // Execute program.
-  sca_set_trigger_high();
-  sca_call_and_sleep(otbn_manual_trigger, kIbexOtbnSleepCycles, false);
+  pentest_set_trigger_high();
+  pentest_call_and_sleep(otbn_manual_trigger, kIbexOtbnSleepCycles, false,
+                         false);
   otbn_busy_wait_for_done();
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 }
 
 void ecc256_modinv(const uint8_t *k0_k1, size_t k0_k1_len) {
diff --git a/sw/device/sca/otbn_vertical/otbn_vertical_serial.c b/sw/device/sca/otbn_vertical/otbn_vertical_serial.c
index c9742cb0d4f8b..1890544e431c0 100644
--- a/sw/device/sca/otbn_vertical/otbn_vertical_serial.c
+++ b/sw/device/sca/otbn_vertical/otbn_vertical_serial.c
@@ -11,10 +11,10 @@
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
 #include "sw/device/sca/otbn_vertical/ecc256_keygen_serial.h"
 #include "sw/device/sca/otbn_vertical/ecc256_modinv_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
@@ -64,15 +64,18 @@ static void ecc256_app_select(const uint8_t *app_cmd, size_t app_cmd_len) {
  */
 static void simple_serial_main(void) {
   SS_CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
-
-  sca_init(kScaTriggerSourceOtbn, kScaPeripheralEntropy | kScaPeripheralIoDiv4 |
-                                      kScaPeripheralOtbn | kScaPeripheralCsrng |
-                                      kScaPeripheralEdn | kScaPeripheralHmac);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceOtbn,
+               kPentestPeripheralEntropy | kPentestPeripheralIoDiv4 |
+                   kPentestPeripheralOtbn | kPentestPeripheralCsrng |
+                   kPentestPeripheralEdn | kPentestPeripheralHmac,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running ECC serial");
   LOG_INFO("Initializing simple serial interface to capture board.");
 
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
   SS_CHECK(simple_serial_register_handler(
                'b', ecc256_ecdsa_keygen_fvsr_seed_batch) == kSimpleSerialOk);
   SS_CHECK(simple_serial_register_handler(
diff --git a/sw/device/sca/sha3_serial.c b/sw/device/sca/sha3_serial.c
index 81d411305b1ed..840c7ddd54d57 100644
--- a/sw/device/sca/sha3_serial.c
+++ b/sw/device/sca/sha3_serial.c
@@ -11,8 +11,8 @@
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
 #include "sw/device/sca/lib/simple_serial.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "kmac_regs.h"
@@ -405,7 +405,7 @@ static void sha3_serial_absorb(const uint8_t *msg, size_t msg_len) {
   // configured to start operation 40 cycles after receiving the START and PROC
   // commands. This allows Ibex to go to sleep in order to not disturb the
   // capture.
-  sca_call_and_sleep(kmac_msg_proc, kIbexSha3SleepCycles, true);
+  pentest_call_and_sleep(kmac_msg_proc, kIbexSha3SleepCycles, true, false);
 }
 
 /**
@@ -495,7 +495,7 @@ static void sha3_serial_batch(const uint8_t *data, size_t data_len) {
  */
 static void sha3_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
   SS_CHECK(seed_len == sizeof(uint32_t));
-  sca_seed_lfsr(read_32(seed), kScaLfsrMasking);
+  pentest_seed_lfsr(read_32(seed), kPentestLfsrMasking);
 }
 
 /**
@@ -505,12 +505,16 @@ static void sha3_serial_seed_lfsr(const uint8_t *seed, size_t seed_len) {
  * UART.
  */
 bool test_main(void) {
-  sca_init(kScaTriggerSourceKmac, kScaPeripheralIoDiv4 | kScaPeripheralKmac);
+  bool sensor_ctrl_enable = false;
+  bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS] = {false};
+  pentest_init(kPentestTriggerSourceKmac,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralKmac,
+               sensor_ctrl_enable, sensor_ctrl_en_fatal);
 
   LOG_INFO("Running sha3_serial");
 
   LOG_INFO("Initializing simple serial interface to capture board.");
-  simple_serial_init(sca_get_uart());
+  simple_serial_init(pentest_get_uart());
   simple_serial_register_handler('p', sha3_serial_single_absorb);
   simple_serial_register_handler('b', sha3_serial_batch);
   simple_serial_register_handler('f', sha3_serial_fixed_message_set);
diff --git a/sw/device/silicon_creator/lib/BUILD b/sw/device/silicon_creator/lib/BUILD
index ef954fcd31133..bb243de4bc1df 100644
--- a/sw/device/silicon_creator/lib/BUILD
+++ b/sw/device/silicon_creator/lib/BUILD
@@ -6,9 +6,9 @@ load(
     "@bazel_skylib//lib:dicts.bzl",
     "dicts",
 )
-load("//rules:autogen.bzl", "autogen_chip_info")
+load("//rules:autogen.bzl", "autogen_build_info")
 load("//rules:cross_platform.bzl", "dual_cc_device_library_of", "dual_cc_library", "dual_inputs")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 load(
     "//rules/opentitan:defs.bzl",
     "EARLGREY_TEST_ENVS",
@@ -97,7 +97,7 @@ cc_library(
         ":boot_data",
         ":nonce",
         "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib:chip_info",
+        "//sw/device/silicon_creator/lib:build_info",
         "//sw/device/silicon_creator/lib:error",
         "//sw/device/silicon_creator/lib/drivers:hmac",
         "//sw/device/silicon_creator/lib/ownership:datatypes",
@@ -109,7 +109,7 @@ cc_test(
     srcs = ["boot_log_unittest.cc"],
     deps = [
         ":boot_log",
-        "//sw/device/silicon_creator/lib:chip_info",
+        "//sw/device/silicon_creator/lib:build_info",
         "//sw/device/silicon_creator/lib/drivers:hmac",
         "@googletest//:gtest_main",
     ],
@@ -125,6 +125,11 @@ cc_library(
     ],
 )
 
+filegroup(
+    name = "flash_exc_handler",
+    srcs = ["flash_exc_handler.S"],
+)
+
 cc_library(
     name = "epmp_defs",
     hdrs = [
@@ -210,14 +215,7 @@ cc_library(
 opentitan_test(
     name = "irq_asm_functest",
     srcs = ["irq_asm_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -253,13 +251,28 @@ cc_library(
     ],
 )
 
-cc_test(
-    name = "dbg_print_unittest",
-    srcs = ["dbg_print_unittest.cc"],
+cc_library(
+    name = "dbg_print_unittest_variant",
+    srcs = ["dbg_print.c"],
+    hdrs = ["dbg_print.h"],
+    local_defines = ["DBG_PRINT_UNIT_TEST_"],
     deps = [
-        ":dbg_print",
+        ":epmp_defs",
         ":error",
+        "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:macros",
         "//sw/device/silicon_creator/lib/drivers:uart",
+    ],
+)
+
+cc_test(
+    name = "dbg_print_unittest",
+    srcs = [
+        "dbg_print_unittest.cc",
+    ],
+    deps = [
+        ":dbg_print_unittest_variant",
         "@googletest//:gtest_main",
     ],
 )
@@ -339,7 +352,7 @@ filegroup(
     ],
 )
 
-autogen_chip_info(name = "chip_info")
+autogen_build_info(name = "build_info")
 
 dual_cc_library(
     name = "shutdown",
@@ -358,7 +371,7 @@ dual_cc_library(
             "@googletest//:gtest",
         ],
         shared = [
-            ":chip_info",
+            ":build_info",
             ":error",
             ":epmp_defs",
             ":stack_utilization",
@@ -434,8 +447,8 @@ cc_library(
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
         "//sw/device/silicon_creator/lib/drivers:otp",
         "//sw/device/silicon_creator/lib/drivers:spi_device",
-        "@com_google_absl//absl/types:optional",
-        "@com_google_absl//absl/types:span",
+        "@abseil-cpp//absl/types:optional",
+        "@abseil-cpp//absl/types:span",
     ],
 )
 
@@ -465,13 +478,6 @@ cc_library(
     deps = ["//sw/device/silicon_creator/lib/drivers:rnd"],
 )
 
-cc_library(
-    name = "attestation_key_diversifiers",
-    srcs = ["attestation_key_diversifiers.c"],
-    hdrs = ["attestation_key_diversifiers.h"],
-    deps = ["//sw/device/silicon_creator/lib/drivers:keymgr"],
-)
-
 cc_library(
     name = "otbn_boot_services",
     srcs = ["otbn_boot_services.c"],
@@ -481,9 +487,11 @@ cc_library(
     deps = [
         ":attestation",
         "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:memory",
         "//sw/device/silicon_creator/lib:dbg_print",
         "//sw/device/silicon_creator/lib:error",
         "//sw/device/silicon_creator/lib/base:sec_mmio",
+        "//sw/device/silicon_creator/lib/base:util",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
         "//sw/device/silicon_creator/lib/drivers:hmac",
         "//sw/device/silicon_creator/lib/drivers:keymgr",
@@ -502,74 +510,26 @@ opentitan_test(
         EARLGREY_TEST_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             # See #21706, expects keymgr state 0 so not working after ROM_EXT.
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
         },
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     # This target uses OTBN pointers internally, so it cannot work host-side.
     deps = [
         ":otbn_boot_services",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
     ],
 )
 
-cc_library(
-    name = "xmodem",
-    srcs = ["xmodem.c"],
-    hdrs = ["xmodem.h"],
-    deps = [
-        ":error",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/silicon_creator/lib/drivers:uart",
-    ],
-)
-
-cc_library(
-    name = "xmodem_testlib",
-    srcs = [
-        "xmodem.c",
-        "xmodem.h",
-    ],
-    hdrs = ["xmodem_testlib.h"],
-    defines = ["XMODEM_TESTLIB=1"],
-    deps = [
-        ":error",
-        "//sw/device/lib/base:hardened",
-    ],
-)
-
-cc_library(
-    name = "dice",
-    srcs = ["dice.c"],
-    hdrs = ["dice.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/base:status",
-        "//sw/device/lib/testing/json:provisioning_data",
-        "//sw/device/lib/testing/test_framework:check",
-        "//sw/device/silicon_creator/lib:attestation",
-        "//sw/device/silicon_creator/lib:attestation_key_diversifiers",
-        "//sw/device/silicon_creator/lib:otbn_boot_services",
-        "//sw/device/silicon_creator/lib/cert:cdi_0_template_library",
-        "//sw/device/silicon_creator/lib/cert:cdi_1_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_cek_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_cik_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_ek_template_library",
-        "//sw/device/silicon_creator/lib/cert:uds_template_library",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:keymgr",
-        "//sw/device/silicon_creator/lib/drivers:lifecycle",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
-    ],
-)
-
 cc_library(
     name = "stack_utilization",
     srcs = ["stack_utilization.c"],
diff --git a/sw/device/silicon_creator/lib/attestation.h b/sw/device/silicon_creator/lib/attestation.h
index 8a282b0538c3b..4370fe3d27c72 100644
--- a/sw/device/silicon_creator/lib/attestation.h
+++ b/sw/device/silicon_creator/lib/attestation.h
@@ -24,33 +24,6 @@ enum {
   kAttestationSeedWords = kAttestationSeedBytes / sizeof(uint32_t),
 };
 
-typedef enum {
-  /**
-   * The UDS attestation key seed.
-   */
-  kUdsAttestationKeySeed = 0,
-  /**
-   * The CDI_0 attestation key seed.
-   */
-  kCdi0AttestationKeySeed = 1,
-  /**
-   * The CDI_1 attestation key seed.
-   */
-  kCdi1AttestationKeySeed = 2,
-  /**
-   * The TPM EK attestation key seed.
-   */
-  kTpmEkAttestationKeySeed = 3,
-  /**
-   * The TPM CEK attestation key seed.
-   */
-  kTpmCekAttestationKeySeed = 4,
-  /**
-   * The TPM CIK attestation key seed.
-   */
-  kTpmCikAttestationKeySeed = 5,
-} attestation_key_seed_t;
-
 /**
  * Attestation key generation scheme version.
  */
diff --git a/sw/device/silicon_creator/lib/attestation_key_diversifiers.c b/sw/device/silicon_creator/lib/attestation_key_diversifiers.c
deleted file mode 100644
index 22fb2b0a637e7..0000000000000
--- a/sw/device/silicon_creator/lib/attestation_key_diversifiers.c
+++ /dev/null
@@ -1,101 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/lib/attestation_key_diversifiers.h"
-
-// UDS (Creator) attestation key diverisfier constants.
-// Note: versions are always set to 0 so these keys are always valid from the
-// perspective of the keymgr hardware.
-const sc_keymgr_diversification_t kUdsKeymgrDiversifier = {
-    .salt =
-        {
-            0xabffa6a9,
-            0xc781f1ad,
-            0x4c1107ad,
-            0xf9210d85,
-            0x0931f555,
-            0x6c5aef5d,
-            0xb9ba4df0,
-            0x77b248d2,
-        },
-    .version = 0,
-};
-
-// CDI_0 (OwnerIntermediate) attestation key diverisfier constants.
-const sc_keymgr_diversification_t kCdi0KeymgrDiversifier = {
-    .salt =
-        {
-            0x3e5913c7,
-            0x41156f1d,
-            0x998ddb9f,
-            0xfa334191,
-            0x8a85380e,
-            0xba76ca1a,
-            0xdb17c4a7,
-            0xfb8852dc,
-        },
-    .version = 0,
-};
-
-// CDI_1 (Owner) attestation key diverisfier constants.
-const sc_keymgr_diversification_t kCdi1KeymgrDiversifier = {
-    .salt =
-        {
-            0x2d12c2e3,
-            0x6acc6876,
-            0x4bfb07ee,
-            0xc45fc414,
-            0x5d4fa9de,
-            0xf295b128,
-            0x50f49882,
-            0xbbdefa29,
-        },
-    .version = 0,
-};
-
-const sc_keymgr_diversification_t kTpmEkKeymgrDiversifier = {
-    .salt =
-        {
-            0x3fd3bc42,
-            0x5a401205,
-            0xfa3fbe70,
-            0xc1d035da,
-            0x87292fe6,
-            0x4d94f30f,
-            0x2e954c30,
-            0x351c28f1,
-        },
-    .version = 0,
-};
-
-const sc_keymgr_diversification_t kTpmCekKeymgrDiversifier = {
-    .salt =
-        {
-            0x8a5d086c,
-            0xcbe850b4,
-            0x9aeab7c0,
-            0x8faf44a4,
-            0xc5bf5663,
-            0x217359ab,
-            0xb42fe0fd,
-            0xd06ad674,
-        },
-    .version = 0,
-
-};
-
-const sc_keymgr_diversification_t kTpmCikKeymgrDiversifier = {
-    .salt =
-        {
-            0x9d664be2,
-            0x8a9739a9,
-            0xe6f815bd,
-            0x8940348b,
-            0x6ee241f7,
-            0xea5b14cd,
-            0x9e81908b,
-            0x15ff16f0,
-        },
-    .version = 0,
-};
diff --git a/sw/device/silicon_creator/lib/attestation_key_diversifiers.h b/sw/device/silicon_creator/lib/attestation_key_diversifiers.h
deleted file mode 100644
index 9e299bc09d690..0000000000000
--- a/sw/device/silicon_creator/lib/attestation_key_diversifiers.h
+++ /dev/null
@@ -1,26 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_ATTESTATION_KEY_DIVERSIFIERS_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_ATTESTATION_KEY_DIVERSIFIERS_H_
-
-#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-// Attestation key diversifier constants.
-extern const sc_keymgr_diversification_t kUdsKeymgrDiversifier;
-extern const sc_keymgr_diversification_t kCdi0KeymgrDiversifier;
-extern const sc_keymgr_diversification_t kCdi1KeymgrDiversifier;
-extern const sc_keymgr_diversification_t kTpmEkKeymgrDiversifier;
-extern const sc_keymgr_diversification_t kTpmCekKeymgrDiversifier;
-extern const sc_keymgr_diversification_t kTpmCikKeymgrDiversifier;
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_ATTESTATION_KEY_DIVERSIFIERS_H_
diff --git a/sw/device/silicon_creator/lib/base/BUILD b/sw/device/silicon_creator/lib/base/BUILD
index 8c613b447011d..a4a612cef8ac9 100644
--- a/sw/device/silicon_creator/lib/base/BUILD
+++ b/sw/device/silicon_creator/lib/base/BUILD
@@ -124,6 +124,33 @@ cc_library(
     ],
 )
 
+cc_library(
+    name = "static_dice_cdi_0",
+    srcs = ["static_dice_cdi_0.c"],
+    hdrs = ["static_dice_cdi_0.h"],
+    deps = [
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
+    ],
+    # This library provides a special symbol that the linker will find.
+    alwayslink = True,
+)
+
+ld_library(
+    name = "static_dice_sections",
+    includes = [
+        "static_dice.ld",
+    ],
+)
+
+cc_library(
+    name = "static_dice",
+    deps = [
+        ":static_dice_cdi_0",
+    ],
+)
+
 cc_library(
     name = "chip",
     hdrs = ["chip.h"],
diff --git a/sw/device/silicon_creator/lib/base/chip.h b/sw/device/silicon_creator/lib/base/chip.h
index c1c1a2d070018..2239b1f3280e1 100644
--- a/sw/device/silicon_creator/lib/base/chip.h
+++ b/sw/device/silicon_creator/lib/base/chip.h
@@ -55,7 +55,11 @@
  * Allowed bounds for the `length` field of a first owner boot stage manifest.
  */
 #define CHIP_BL0_SIZE_MIN CHIP_MANIFEST_SIZE
+#ifndef OT_COVERAGE_ENABLED
 #define CHIP_BL0_SIZE_MAX 0x70000
+#else  // OT_COVERAGE_ENABLED
+#define CHIP_BL0_SIZE_MAX 0x60000
+#endif  // OT_COVERAGE_ENABLED
 
 /**
  * ROM_EXT manifest identifier (ASCII "OTRE").
@@ -66,7 +70,11 @@
  * Allowed bounds for the `length` field of a ROM_EXT manifest.
  */
 #define CHIP_ROM_EXT_SIZE_MIN CHIP_MANIFEST_SIZE
+#ifndef OT_COVERAGE_ENABLED
 #define CHIP_ROM_EXT_SIZE_MAX 0x10000
+#else  // OT_COVERAGE_ENABLED
+#define CHIP_ROM_EXT_SIZE_MAX 0x20000
+#endif  // OT_COVERAGE_ENABLED
 #define CHIP_ROM_EXT_RESIZABLE_SIZE_MAX \
   (CHIP_ROM_EXT_SIZE_MAX + CHIP_BL0_SIZE_MAX)
 
diff --git a/sw/device/silicon_creator/lib/base/sec_mmio.c b/sw/device/silicon_creator/lib/base/sec_mmio.c
index 1a06a214015d3..d04e5dc95c870 100644
--- a/sw/device/silicon_creator/lib/base/sec_mmio.c
+++ b/sw/device/silicon_creator/lib/base/sec_mmio.c
@@ -34,8 +34,8 @@ enum {
  * Increments the `sec_mmio_ctx.last_index`.
  */
 static void upsert_register(uint32_t addr, uint32_t value) {
-  const size_t last_index = sec_mmio_ctx.last_index;
-  size_t i = 0, j = last_index - 1;
+  const uint32_t last_index = sec_mmio_ctx.last_index;
+  uint32_t i = 0, j = last_index - 1;
   for (; launder32(i) < last_index && launder32(j) < last_index; ++i, --j) {
     if (launder32(sec_mmio_ctx.addrs[i]) == addr) {
       sec_mmio_ctx.values[i] = value;
@@ -43,7 +43,7 @@ static void upsert_register(uint32_t addr, uint32_t value) {
     }
   }
   if (launder32(i) == last_index && launder32(i) < kSecMmioRegFileSize) {
-    HARDENED_CHECK_EQ(j, SIZE_MAX);
+    HARDENED_CHECK_EQ(j, UINT32_MAX);
     sec_mmio_ctx.addrs[i] = addr;
     sec_mmio_ctx.values[i] = value;
     ++sec_mmio_ctx.last_index;
@@ -58,13 +58,13 @@ void sec_mmio_init(void) {
   sec_mmio_ctx.write_count = launder32(0);
   sec_mmio_ctx.check_count = launder32(0);
   sec_mmio_ctx.expected_write_count = launder32(0);
-  size_t i = 0, r = kEntryCount - 1;
+  uint32_t i = 0, r = kEntryCount - 1;
   for (; launder32(i) < kEntryCount && launder32(r) < kEntryCount; ++i, --r) {
     sec_mmio_ctx.addrs[i] = UINT32_MAX;
     sec_mmio_ctx.values[i] = UINT32_MAX;
   }
   HARDENED_CHECK_EQ(i, kEntryCount);
-  HARDENED_CHECK_EQ(r, SIZE_MAX);
+  HARDENED_CHECK_EQ(r, UINT32_MAX);
   uint32_t check = kSecMmioValZero ^ sec_mmio_ctx.last_index;
   check ^= sec_mmio_ctx.write_count;
   check ^= sec_mmio_ctx.check_count;
@@ -74,14 +74,14 @@ void sec_mmio_init(void) {
 
 void sec_mmio_next_stage_init(void) {
   sec_mmio_ctx.check_count = launder32(0);
-  size_t i = sec_mmio_ctx.last_index,
-         r = kEntryCount - sec_mmio_ctx.last_index - 1;
+  uint32_t i = sec_mmio_ctx.last_index,
+           r = kEntryCount - sec_mmio_ctx.last_index - 1;
   for (; launder32(i) < kEntryCount && launder32(r) < kEntryCount; ++i, --r) {
     sec_mmio_ctx.addrs[i] = UINT32_MAX;
     sec_mmio_ctx.values[i] = UINT32_MAX;
   }
   HARDENED_CHECK_EQ(i, kEntryCount);
-  HARDENED_CHECK_EQ(r, SIZE_MAX);
+  HARDENED_CHECK_EQ(r, UINT32_MAX);
   HARDENED_CHECK_EQ(sec_mmio_ctx.check_count, 0);
 }
 
@@ -123,7 +123,7 @@ void sec_mmio_check_values(uint32_t rnd_offset) {
   // Pick a random starting offset.
   uint32_t offset = ((uint64_t)rnd_offset * (uint64_t)last_index) >> 32;
   enum { kStep = 1 };
-  size_t i = 0, r = last_index - 1;
+  uint32_t i = 0, r = last_index - 1;
   for (; launder32(i) < last_index && launder32(r) < last_index; ++i, --r) {
     uint32_t read_value = abs_mmio_read32(sec_mmio_ctx.addrs[offset]);
     HARDENED_CHECK_EQ(read_value ^ kSecMmioMaskVal,
@@ -135,7 +135,7 @@ void sec_mmio_check_values(uint32_t rnd_offset) {
   }
   // Check for loop completion.
   HARDENED_CHECK_EQ(i, last_index);
-  HARDENED_CHECK_EQ(r, SIZE_MAX);
+  HARDENED_CHECK_EQ(r, UINT32_MAX);
   ++sec_mmio_ctx.check_count;
 }
 
@@ -144,7 +144,7 @@ void sec_mmio_check_values_except_otp(uint32_t rnd_offset, uint32_t otp_base) {
   // Pick a random starting offset.
   uint32_t offset = ((uint64_t)rnd_offset * (uint64_t)last_index) >> 32;
   enum { kStep = 1 };
-  size_t i = 0, r = last_index - 1;
+  uint32_t i = 0, r = last_index - 1;
   // Make sure the otp_base is 64K aligned and not zero.
   HARDENED_CHECK_EQ(otp_base & 0x0000FFFF, 0);
   HARDENED_CHECK_NE(otp_base & 0xFFFF0000, 0);
@@ -165,7 +165,7 @@ void sec_mmio_check_values_except_otp(uint32_t rnd_offset, uint32_t otp_base) {
   }
   // Check for loop completion.
   HARDENED_CHECK_EQ(i, last_index);
-  HARDENED_CHECK_EQ(r, SIZE_MAX);
+  HARDENED_CHECK_EQ(r, UINT32_MAX);
   ++sec_mmio_ctx.check_count;
 }
 
diff --git a/sw/device/silicon_creator/lib/base/static_critical_boot_measurements.c b/sw/device/silicon_creator/lib/base/static_critical_boot_measurements.c
index 0b99ef25ab4cc..6a759307a5322 100644
--- a/sw/device/silicon_creator/lib/base/static_critical_boot_measurements.c
+++ b/sw/device/silicon_creator/lib/base/static_critical_boot_measurements.c
@@ -10,4 +10,4 @@
 // This is placed at a fixed location in memory within the .static_critical
 // section. It will be populated by the ROM before the jump to ROM_EXT.
 OT_SET_BSS_SECTION(".static_critical.boot_measurements",
-                   boot_measurements_t boot_measurements;)
+                   OT_USED boot_measurements_t boot_measurements;)
diff --git a/sw/device/silicon_creator/lib/base/static_critical_epmp_state.c b/sw/device/silicon_creator/lib/base/static_critical_epmp_state.c
index 050627750bebb..275915701d4eb 100644
--- a/sw/device/silicon_creator/lib/base/static_critical_epmp_state.c
+++ b/sw/device/silicon_creator/lib/base/static_critical_epmp_state.c
@@ -9,4 +9,5 @@
 //
 // This is placed at a fixed location in memory within the .static_critical
 // section. It will be populated by the ROM before the jump to ROM_EXT.
-OT_SET_BSS_SECTION(".static_critical.epmp_state", epmp_state_t epmp_state;)
+OT_SET_BSS_SECTION(".static_critical.epmp_state",
+                   OT_USED epmp_state_t epmp_state;)
diff --git a/sw/device/silicon_creator/lib/base/static_critical_sec_mmio.c b/sw/device/silicon_creator/lib/base/static_critical_sec_mmio.c
index 48c7e09775bc6..6f2653ba6d578 100644
--- a/sw/device/silicon_creator/lib/base/static_critical_sec_mmio.c
+++ b/sw/device/silicon_creator/lib/base/static_critical_sec_mmio.c
@@ -10,4 +10,4 @@
 // This is placed at a fixed location in memory within the .static_critical
 // section. It will be populated by the ROM before the jump to ROM_EXT.
 OT_SET_BSS_SECTION(".static_critical.sec_mmio_ctx",
-                   sec_mmio_ctx_t sec_mmio_ctx;)
+                   OT_USED sec_mmio_ctx_t sec_mmio_ctx;)
diff --git a/sw/device/silicon_creator/lib/base/static_critical_version.c b/sw/device/silicon_creator/lib/base/static_critical_version.c
index 7d189fde097fa..654448ffb4d47 100644
--- a/sw/device/silicon_creator/lib/base/static_critical_version.c
+++ b/sw/device/silicon_creator/lib/base/static_critical_version.c
@@ -14,4 +14,4 @@
  * populated by the ROM before the jump to ROM_EXT.
  */
 OT_SET_BSS_SECTION(".static_critical.version",
-                   uint32_t static_critical_version;)
+                   OT_USED uint32_t static_critical_version;)
diff --git a/sw/device/silicon_creator/lib/base/static_dice.ld b/sw/device/silicon_creator/lib/base/static_dice.ld
new file mode 100644
index 0000000000000..9efe3efaf3515
--- /dev/null
+++ b/sw/device/silicon_creator/lib/base/static_dice.ld
@@ -0,0 +1,25 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * DICE variables stored in the .static_dice section of RAM.
+ *
+ * These variables are transferred from immutable ROM_EXT to mutable ROM_EXT.
+ *
+ * This file should be included inside of a `SECTIONS` block where a
+ * `ram_main` memory is defined, and should come before all other main
+ * memory sections and after the .static_critical section.
+ */
+
+.static_dice (NOLOAD) : ALIGN(4) {
+  ASSERT(
+    . == ORIGIN(ram_main) + SIZEOF(.static_critical),
+    "Error: .static_dice section does not follow the .static_critical section.");
+
+  KEEP(*(.static_dice.cdi_0))
+
+  ASSERT(
+    SIZEOF(.static_dice) == 1220,
+    "Error: .static_dice section size has changed");
+} > ram_main
diff --git a/sw/device/silicon_creator/lib/base/static_dice_cdi_0.c b/sw/device/silicon_creator/lib/base/static_dice_cdi_0.c
new file mode 100644
index 0000000000000..6019d5d360978
--- /dev/null
+++ b/sw/device/silicon_creator/lib/base/static_dice_cdi_0.c
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/base/static_dice_cdi_0.h"
+
+#include "sw/device/lib/base/macros.h"
+
+// CDI 0 cert signed by immutable ROM_EXT.
+//
+// This is placed at a fixed location in memory within the
+// .static_dice section. It will be populated by the immutable
+// ROM_EXT before the jump to mutable ROM_EXT.
+OT_SET_BSS_SECTION(".static_dice.cdi_0",
+                   OT_USED static_dice_cdi_0_t static_dice_cdi_0;)
diff --git a/sw/device/silicon_creator/lib/base/static_dice_cdi_0.h b/sw/device/silicon_creator/lib/base/static_dice_cdi_0.h
new file mode 100644
index 0000000000000..e25651a28582f
--- /dev/null
+++ b/sw/device/silicon_creator/lib/base/static_dice_cdi_0.h
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BASE_STATIC_DICE_CDI_0_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BASE_STATIC_DICE_CDI_0_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+
+enum {
+  kCdi0CertStaticCriticalSizeBytes = 1024,
+};
+
+// The dice chain information that the immutable ROM_EXT will pass to the
+// mutable ROM_EXT.
+typedef struct {
+  hmac_digest_t uds_pubkey_id;
+  ecdsa_p256_public_key_t uds_pubkey;
+  hmac_digest_t cdi_0_pubkey_id;
+  ecdsa_p256_public_key_t cdi_0_pubkey;
+  uint32_t cert_size;
+  uint8_t cert_data[kCdi0CertStaticCriticalSizeBytes];
+} static_dice_cdi_0_t;
+
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, uds_pubkey_id, 0);
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, uds_pubkey, 32);
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, cdi_0_pubkey_id, 96);
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, cdi_0_pubkey, 128);
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, cert_size, 192);
+OT_ASSERT_MEMBER_OFFSET(static_dice_cdi_0_t, cert_data, 196);
+OT_ASSERT_SIZE(static_dice_cdi_0_t, 1220);
+
+extern static_dice_cdi_0_t static_dice_cdi_0;
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BASE_STATIC_DICE_CDI_0_H_
diff --git a/sw/device/silicon_creator/lib/base/util.c b/sw/device/silicon_creator/lib/base/util.c
index 8f798437e6713..c5cafce708289 100644
--- a/sw/device/silicon_creator/lib/base/util.c
+++ b/sw/device/silicon_creator/lib/base/util.c
@@ -12,3 +12,33 @@ uint32_t util_round_up_to(uint32_t input, uint32_t align_bits) {
 uint32_t util_size_to_words(uint32_t bytes) {
   return util_round_up_to(bytes, 2) / sizeof(uint32_t);
 }
+
+void util_reverse_bytes(void *buf, size_t num_bytes) {
+  unsigned char temp;
+  unsigned char *byte_buf = buf;
+  for (size_t i = 0; i < (num_bytes / 2); ++i) {
+    temp = byte_buf[i];
+    byte_buf[i] = byte_buf[num_bytes - i - 1];
+    byte_buf[num_bytes - i - 1] = temp;
+  }
+}
+
+// Returns hexdump character for the half-byte.
+static inline uint8_t hexdump_halfbyte(uint8_t half_byte) {
+  if (half_byte < 10)
+    return '0' + half_byte;
+  else
+    return 'a' + half_byte - 10;
+}
+
+void util_hexdump_byte(uint8_t byte, uint8_t *str) {
+  str[0] = hexdump_halfbyte((byte & 0xF0) >> 4);
+  str[1] = hexdump_halfbyte(byte & 0x0F);
+}
+
+void util_p256_signature_le_to_be_convert(
+    uint32_t r[kUtilEcdsaP256SignatureComponentWords],
+    uint32_t s[kUtilEcdsaP256SignatureComponentWords]) {
+  util_reverse_bytes(r, kUtilEcdsaP256SignatureComponentBytes);
+  util_reverse_bytes(s, kUtilEcdsaP256SignatureComponentBytes);
+}
diff --git a/sw/device/silicon_creator/lib/base/util.h b/sw/device/silicon_creator/lib/base/util.h
index 0f75c715db253..fb837265e3ea9 100644
--- a/sw/device/silicon_creator/lib/base/util.h
+++ b/sw/device/silicon_creator/lib/base/util.h
@@ -5,12 +5,30 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BASE_UTIL_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BASE_UTIL_H_
 
+#include <stddef.h>
 #include <stdint.h>
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+enum {
+  /**
+   * Size of an ECDSA P256 signature component in bits.
+   */
+  kUtilEcdsaP256SignatureComponentBits = 256,
+  /**
+   * Size of an ECDSA P256 signature component in bytes.
+   */
+  kUtilEcdsaP256SignatureComponentBytes =
+      kUtilEcdsaP256SignatureComponentBits / 8,
+  /**
+   * Size of an ECDSA P256 signature component in 32b words.
+   */
+  kUtilEcdsaP256SignatureComponentWords =
+      kUtilEcdsaP256SignatureComponentBytes / sizeof(uint32_t),
+};
+
 /**
  * Rounds up the passed value to get it aligned to the requested number of bits.
  *
@@ -28,6 +46,33 @@ uint32_t util_round_up_to(uint32_t input, uint32_t align_bits);
  */
 uint32_t util_size_to_words(uint32_t bytes);
 
+/**
+ * Reverses a buffer of bytes in place.
+ *
+ * @param[inout] buf Buffer in little endian order.
+ * @param num_bytes Number of bytes in the buffer above.
+ */
+void util_reverse_bytes(void *buf, size_t num_bytes);
+
+/**
+ * Fills hexdump of the byte (lowercase).
+ *
+ * @param byte Byte to convert to a hex string.
+ * @param[out] str String buffer (always 2 bytes) to place hex string encoded
+ * byte in.
+ */
+void util_hexdump_byte(uint8_t byte, uint8_t *str);
+
+/**
+ * Convert the calculated signature (r,s) from little endian to big endian
+ *
+ * @param r ECDSA signature r value
+ * @param s ECDSA signature s value
+ */
+void util_p256_signature_le_to_be_convert(
+    uint32_t r[kUtilEcdsaP256SignatureComponentWords],
+    uint32_t s[kUtilEcdsaP256SignatureComponentWords]);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/boot_data.h b/sw/device/silicon_creator/lib/boot_data.h
index ee8a76c1cf73d..5bbe707e3baea 100644
--- a/sw/device/silicon_creator/lib/boot_data.h
+++ b/sw/device/silicon_creator/lib/boot_data.h
@@ -170,6 +170,8 @@ typedef enum boot_slot {
   kBootSlotA = 0x5f5f4141,
   /** Slot B: `__BB`. */
   kBootSlotB = 0x42425f5f,
+  /** Slot Unspecified: `UUUU`. */
+  kBootSlotUnspecified = 0x55555555,
 } boot_slot_t;
 
 /**
diff --git a/sw/device/silicon_creator/lib/boot_data_functest.c b/sw/device/silicon_creator/lib/boot_data_functest.c
index f1f3ec9ee4c8e..7ffdc1a843c46 100644
--- a/sw/device/silicon_creator/lib/boot_data_functest.c
+++ b/sw/device/silicon_creator/lib/boot_data_functest.c
@@ -58,7 +58,7 @@ boot_data_t kTestBootData = (boot_data_t){
  * @param enable New read, write, and erase permissions.
  */
 static void boot_data_pages_mp_set(hardened_bool_t perm) {
-  multi_bit_bool_t mubi_perm =
+  uint8_t mubi_perm =
       perm == kHardenedBoolTrue ? kMultiBitBool4True : kMultiBitBool4False;
   for (size_t i = 0; i < ARRAYSIZE(kPages); ++i) {
     flash_ctrl_info_perms_set(kPages[i], (flash_ctrl_perms_t){
diff --git a/sw/device/silicon_creator/lib/boot_log.c b/sw/device/silicon_creator/lib/boot_log.c
index 30f925c1b3769..0f1a154d57539 100644
--- a/sw/device/silicon_creator/lib/boot_log.c
+++ b/sw/device/silicon_creator/lib/boot_log.c
@@ -72,7 +72,7 @@ rom_error_t boot_log_check(const boot_log_t *boot_log) {
 }
 
 void boot_log_check_or_init(boot_log_t *boot_log, uint32_t rom_ext_slot,
-                            const chip_info_t *info) {
+                            const build_info_t *info) {
   rom_error_t error = boot_log_check(boot_log);
   if (launder32(error) == kErrorOk) {
     HARDENED_CHECK_EQ(error, kErrorOk);
diff --git a/sw/device/silicon_creator/lib/boot_log.h b/sw/device/silicon_creator/lib/boot_log.h
index a5ae708dfa067..1de9c41b622ad 100644
--- a/sw/device/silicon_creator/lib/boot_log.h
+++ b/sw/device/silicon_creator/lib/boot_log.h
@@ -9,7 +9,7 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/silicon_creator/lib/boot_data.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/lib/nonce.h"
@@ -28,7 +28,7 @@ typedef struct boot_log {
   /** Identifier (`BLOG`). */
   uint32_t identifier;
   /** Chip version (from the ROM). */
-  chip_info_scm_revision_t chip_version;
+  build_info_scm_revision_t chip_version;
   /** Which ROM_EXT slot booted (boot_slot_t). */
   uint32_t rom_ext_slot;
   /** ROM_EXT major version number. */
@@ -109,10 +109,10 @@ rom_error_t boot_log_check(const boot_log_t *boot_log);
  *
  * @param boot_log A buffer that holds the boot_log.
  * @param rom_ext_slot The current ROM_EXT slot.
- * @param info A pointer to the chip_info_t structure in ROM.
+ * @param info A pointer to the build_info_t structure in ROM.
  */
 void boot_log_check_or_init(boot_log_t *boot_log, uint32_t rom_ext_slot,
-                            const chip_info_t *info);
+                            const build_info_t *info);
 
 #ifdef __cplusplus
 }
diff --git a/sw/device/silicon_creator/lib/boot_log_unittest.cc b/sw/device/silicon_creator/lib/boot_log_unittest.cc
index da6f7e80ee42f..01db955ab36cb 100644
--- a/sw/device/silicon_creator/lib/boot_log_unittest.cc
+++ b/sw/device/silicon_creator/lib/boot_log_unittest.cc
@@ -7,7 +7,7 @@
 #include <cstring>
 
 #include "gtest/gtest.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/drivers/mock_hmac.h"
 
@@ -19,8 +19,8 @@ bool operator!=(hmac_digest_t lhs, hmac_digest_t rhs) {
   return std::memcmp(&lhs, &rhs, sizeof(hmac_digest_t)) != 0;
 }
 
-bool operator==(chip_info_scm_revision_t lhs, chip_info_scm_revision_t rhs) {
-  return std::memcmp(&lhs, &rhs, sizeof(chip_info_scm_revision_t)) == 0;
+bool operator==(build_info_scm_revision_t lhs, build_info_scm_revision_t rhs) {
+  return std::memcmp(&lhs, &rhs, sizeof(build_info_scm_revision_t)) == 0;
 }
 
 namespace boot_log_unittest {
@@ -46,7 +46,7 @@ class BootLogTest : public rom_test::RomTest {
           },
   };
 
-  chip_info_scm_revision_t expected_chip_version = {
+  build_info_scm_revision_t expected_chip_version = {
       .scm_revision_low = 0x76543210,
       .scm_revision_high = 0xcafecafe,
   };
diff --git a/sw/device/silicon_creator/lib/boot_svc/BUILD b/sw/device/silicon_creator/lib/boot_svc/BUILD
index 35a4d64602bf4..7b7bf6f1b21b7 100644
--- a/sw/device/silicon_creator/lib/boot_svc/BUILD
+++ b/sw/device/silicon_creator/lib/boot_svc/BUILD
@@ -16,6 +16,7 @@ dual_cc_library(
         host = ["mock_boot_svc_header.h"],
         shared = ["boot_svc_header.h"],
     ),
+    visibility = ["//visibility:public"],
     deps = dual_inputs(
         host = [
             "//sw/device/lib/base:global_mock",
@@ -52,25 +53,21 @@ cc_library(
 )
 
 cc_library(
-    name = "boot_svc_primary_bl0_slot",
-    srcs = ["boot_svc_primary_bl0_slot.c"],
-    hdrs = ["boot_svc_primary_bl0_slot.h"],
+    name = "boot_svc_enter_rescue",
+    srcs = ["boot_svc_enter_rescue.c"],
+    hdrs = ["boot_svc_enter_rescue.h"],
     deps = [
         ":boot_svc_header",
         "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib:boot_data",
         "//sw/device/silicon_creator/lib:error",
-        "//sw/device/silicon_creator/lib/base:chip",
     ],
 )
 
 cc_test(
-    name = "boot_svc_primary_bl0_slot_unittest",
-    srcs = ["boot_svc_primary_bl0_slot_unittest.cc"],
+    name = "boot_svc_enter_rescue_unittest",
+    srcs = ["boot_svc_enter_rescue_unittest.cc"],
     deps = [
-        ":boot_svc_primary_bl0_slot",
-        "//sw/device/silicon_creator/lib:boot_data",
-        "//sw/device/silicon_creator/lib:error",
+        ":boot_svc_enter_rescue",
         "//sw/device/silicon_creator/testing:rom_test",
         "@googletest//:gtest_main",
     ],
@@ -116,12 +113,13 @@ cc_library(
     hdrs = ["boot_svc_msg.h"],
     deps = [
         ":boot_svc_empty",
+        ":boot_svc_enter_rescue",
         ":boot_svc_header",
         ":boot_svc_min_bl0_sec_ver",
         ":boot_svc_next_boot_bl0_slot",
         ":boot_svc_ownership_activate",
+        ":boot_svc_ownership_history",
         ":boot_svc_ownership_unlock",
-        ":boot_svc_primary_bl0_slot",
         "//sw/device/lib/base:macros",
     ],
 )
@@ -198,3 +196,25 @@ cc_test(
         "@googletest//:gtest_main",
     ],
 )
+
+cc_library(
+    name = "boot_svc_ownership_history",
+    srcs = ["boot_svc_ownership_history.c"],
+    hdrs = ["boot_svc_ownership_history.h"],
+    deps = [
+        ":boot_svc_header",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:memory",
+        "//sw/device/silicon_creator/lib:error",
+    ],
+)
+
+cc_test(
+    name = "boot_svc_ownership_history_unittest",
+    srcs = ["boot_svc_ownership_history_unittest.cc"],
+    deps = [
+        ":boot_svc_ownership_history",
+        "//sw/device/silicon_creator/testing:rom_test",
+        "@googletest//:gtest_main",
+    ],
+)
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.c
index 56c63d206e9db..8216214d1497e 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.c
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.c
@@ -4,15 +4,22 @@
 
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h"
 
-void boot_svc_empty_init(boot_svc_empty_t *msg) {
-  size_t i = 0, j = kBootSvcEmptyPayloadWordCount - 1;
+void boot_svc_empty_req_init(boot_svc_empty_t *msg) {
+  // We use `uint32_t` instead of `size_t` so that end-of-loop check passes both
+  // on- and off-target tests.
+  uint32_t i = 0, j = kBootSvcEmptyPayloadWordCount - 1;
   for (; launder32(i) < kBootSvcEmptyPayloadWordCount &&
          launder32(j) < kBootSvcEmptyPayloadWordCount;
        ++i, --j) {
     msg->payload[i] = 0;
   }
   HARDENED_CHECK_EQ(i, kBootSvcEmptyPayloadWordCount);
-  HARDENED_CHECK_EQ(j, SIZE_MAX);
-  boot_svc_header_finalize(kBootSvcEmptyType, sizeof(boot_svc_empty_t),
+  HARDENED_CHECK_EQ(j, UINT32_MAX);
+  boot_svc_header_finalize(kBootSvcEmptyReqType, sizeof(boot_svc_empty_t),
+                           &msg->header);
+}
+
+void boot_svc_empty_res_init(boot_svc_empty_t *msg) {
+  boot_svc_header_finalize(kBootSvcEmptyResType, sizeof(boot_svc_empty_t),
                            &msg->header);
 }
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h
index 99649a5e01679..1391ff626987b 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h
@@ -16,7 +16,9 @@ extern "C" {
 
 enum {
   /** Empty boot services request: `EMPT`. */
-  kBootSvcEmptyType = 0x54504d45,
+  kBootSvcEmptyReqType = 0x54504d45,
+  /** Empty boot services response: `TPME`. */
+  kBootSvcEmptyResType = 0x454d5054,
   kBootSvcEmptyPayloadWordCount =
       CHIP_BOOT_SVC_MSG_PAYLOAD_SIZE_MAX / sizeof(uint32_t),
 };
@@ -48,11 +50,18 @@ OT_ASSERT_MEMBER_OFFSET(boot_svc_empty_t, payload,
 OT_ASSERT_SIZE(boot_svc_empty_t, CHIP_BOOT_SVC_MSG_SIZE_MAX);
 
 /**
- * Initialize an empty boot services message.
+ * Initialize an empty boot services request.
  *
  * @param[out] msg Output buffer for the message.
  */
-void boot_svc_empty_init(boot_svc_empty_t *msg);
+void boot_svc_empty_req_init(boot_svc_empty_t *msg);
+
+/**
+ * Initialize an empty boot services response.
+ *
+ * @param[inout] msg Buffer for the message.
+ */
+void boot_svc_empty_res_init(boot_svc_empty_t *msg);
 
 #ifdef __cplusplus
 }  // extern "C"
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty_unittest.cc
index d05926e71662b..a66ccaf38f283 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty_unittest.cc
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_empty_unittest.cc
@@ -31,9 +31,9 @@ TEST_F(BootSvcEmptyTest, Init) {
 
   boot_svc_empty_t msg{};
   EXPECT_CALL(boot_svc_header_,
-              Finalize(kBootSvcEmptyType, sizeof(msg), &msg.header));
+              Finalize(kBootSvcEmptyReqType, sizeof(msg), &msg.header));
 
-  boot_svc_empty_init(&msg);
+  boot_svc_empty_req_init(&msg);
 
   EXPECT_THAT(msg.payload, ElementsAreArray(payload));
 }
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.c
new file mode 100644
index 0000000000000..3ab60047a8b50
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.c
@@ -0,0 +1,21 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h"
+
+#include "sw/device/silicon_creator/lib/error.h"
+
+void boot_svc_enter_rescue_req_init(uint32_t skip_once,
+                                    boot_svc_enter_rescue_req_t *msg) {
+  msg->skip_once = skip_once;
+  boot_svc_header_finalize(kBootSvcEnterRescueReqType,
+                           sizeof(boot_svc_enter_rescue_req_t), &msg->header);
+}
+
+void boot_svc_enter_rescue_res_init(rom_error_t status,
+                                    boot_svc_enter_rescue_res_t *msg) {
+  msg->status = status;
+  boot_svc_header_finalize(kBootSvcEnterRescueResType,
+                           sizeof(boot_svc_enter_rescue_res_t), &msg->header);
+}
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h
new file mode 100644
index 0000000000000..3d8a349dab373
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h
@@ -0,0 +1,85 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_ENTER_RESCUE_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_ENTER_RESCUE_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_header.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+enum {
+  /** Enter rescue request: `ERSQ`. */
+  kBootSvcEnterRescueReqType = 0x51535245,
+  /** Enter rescue response: `QSRE`. */
+  kBootSvcEnterRescueResType = 0x45525351,
+};
+
+/**
+ * An Enter Rescue request.
+ */
+typedef struct boot_svc_enter_rescue_req {
+  /**
+   * Boot services message header.
+   */
+  boot_svc_header_t header;
+  /**
+   * Command rescue to ignore the rescue trigger one time.
+   */
+  uint32_t skip_once;
+} boot_svc_enter_rescue_req_t;
+
+OT_ASSERT_MEMBER_OFFSET(boot_svc_enter_rescue_req_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_enter_rescue_req_t, skip_once,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 0);
+OT_ASSERT_SIZE(boot_svc_enter_rescue_req_t, CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+
+/**
+ * An Enter Rescue response.
+ */
+typedef struct boot_svc_enter_rescue_res {
+  /**
+   * Boot services message header.
+   */
+  boot_svc_header_t header;
+  /**
+   * Response status from the ROM_EXT.
+   */
+  uint32_t status;
+} boot_svc_enter_rescue_res_t;
+
+OT_ASSERT_MEMBER_OFFSET(boot_svc_enter_rescue_res_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_enter_rescue_res_t, status,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE);
+OT_ASSERT_SIZE(boot_svc_enter_rescue_res_t, 48);
+
+/**
+ * Initialize an enter rescue request.
+ *
+ * @param skip_once Ignore the rescue trigger on the next boot.
+ * @param[out] msg Output buffer for the message.
+ */
+void boot_svc_enter_rescue_req_init(uint32_t skip_once,
+                                    boot_svc_enter_rescue_req_t *msg);
+
+/**
+ * Initialize an enter rescue response.
+ *
+ * @param status Reponse from the ROM_EXT after receiving the request.
+ * @param[out] msg Output buffer for the message.
+ */
+void boot_svc_enter_rescue_res_init(rom_error_t status,
+                                    boot_svc_enter_rescue_res_t *msg);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_ENTER_RESCUE_H_
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue_unittest.cc
new file mode 100644
index 0000000000000..f12bed0c499c0
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue_unittest.cc
@@ -0,0 +1,43 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h"
+
+#include <string.h>
+
+#include "gtest/gtest.h"
+#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace boot_svc_enter_rescue_unittest {
+namespace {
+using ::testing::ElementsAreArray;
+
+class BootSvcEnterRescueTest : public rom_test::RomTest {
+ protected:
+  rom_test::MockBootSvcHeader boot_svc_header_;
+};
+
+TEST_F(BootSvcEnterRescueTest, ReqInit) {
+  boot_svc_enter_rescue_req_t msg{};
+  EXPECT_CALL(boot_svc_header_,
+              Finalize(kBootSvcEnterRescueReqType, sizeof(msg), &msg.header));
+
+  boot_svc_enter_rescue_req_init(kHardenedBoolFalse, &msg);
+  EXPECT_EQ(msg.skip_once, kHardenedBoolFalse);
+}
+
+TEST_F(BootSvcEnterRescueTest, ResInit) {
+  boot_svc_enter_rescue_res_t msg{};
+  constexpr rom_error_t kStatus = kErrorOk;
+  EXPECT_CALL(boot_svc_header_,
+              Finalize(kBootSvcEnterRescueResType, sizeof(msg), &msg.header));
+
+  boot_svc_enter_rescue_res_init(kStatus, &msg);
+
+  EXPECT_EQ(msg.status, kStatus);
+}
+
+}  // namespace
+}  // namespace boot_svc_enter_rescue_unittest
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_header.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_header.c
index 488057a80a927..4743bcec59711 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_header.c
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_header.c
@@ -64,25 +64,25 @@ static const uint32_t kCheckShares[kHmacDigestNumWords + 3] = {
 rom_error_t boot_svc_header_check(const boot_svc_header_t *header) {
   rom_error_t error = kErrorBootSvcBadHeader;
   hmac_digest_t digest;
-  boot_svc_header_digest_compute(header, &digest);
-
   size_t i = 0;
-  for (; launder32(i) < kHmacDigestNumWords; ++i) {
-    error ^= header->digest.digest[i] ^ digest.digest[i] ^ kCheckShares[i];
+  if (launder32(header->length) < CHIP_BOOT_SVC_MSG_HEADER_SIZE) {
+    return kErrorBootSvcBadHeader;
   }
+  HARDENED_CHECK_GE(header->length, CHIP_BOOT_SVC_MSG_HEADER_SIZE);
+  error ^= kCheckShares[i++];
 
-  if (launder32(header->length) >= CHIP_BOOT_SVC_MSG_HEADER_SIZE) {
-    HARDENED_CHECK_GE(header->length, CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-    error ^= kCheckShares[i];
+  if (launder32(header->length) > CHIP_BOOT_SVC_MSG_SIZE_MAX) {
+    return kErrorBootSvcBadHeader;
   }
+  HARDENED_CHECK_LE(header->length, CHIP_BOOT_SVC_MSG_SIZE_MAX);
+  error ^= kCheckShares[i++];
 
-  ++i;
-  if (launder32(header->length) <= CHIP_BOOT_SVC_MSG_SIZE_MAX) {
-    HARDENED_CHECK_LE(header->length, CHIP_BOOT_SVC_MSG_SIZE_MAX);
-    error ^= kCheckShares[i];
+  boot_svc_header_digest_compute(header, &digest);
+  for (size_t j = 0; launder32(j) < kHmacDigestNumWords; ++i, ++j) {
+    error ^= header->digest.digest[j] ^ digest.digest[j] ^ kCheckShares[i];
   }
 
-  error ^= header->identifier ^ kCheckShares[++i];
+  error ^= header->identifier ^ kCheckShares[i];
   if (launder32(error) == kErrorOk) {
     HARDENED_CHECK_EQ(error, kErrorOk);
     HARDENED_CHECK_EQ(i, ARRAYSIZE(kCheckShares) - 1);
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_header_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_header_unittest.cc
index 123940bc6c4e1..3ef996365b0fb 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_header_unittest.cc
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_header_unittest.cc
@@ -62,6 +62,7 @@ struct BootSvcTestMsg {
 struct BootSvcHeaderCheckTestCase {
   BootSvcTestMsg msg;
   rom_error_t exp_error;
+  bool error_before_digest;
 };
 
 class BootSvcHeaderCheckTest
@@ -134,6 +135,7 @@ constexpr std::array<BootSvcHeaderCheckTestCase, 7> kHeaderCheckTestCases{{
                         .length = CHIP_BOOT_SVC_MSG_HEADER_SIZE - 1,
                     }},
         .exp_error = kErrorBootSvcBadHeader,
+        .error_before_digest = true,
     },
     // Bad length (too big).
     {
@@ -145,18 +147,22 @@ constexpr std::array<BootSvcHeaderCheckTestCase, 7> kHeaderCheckTestCases{{
                         .length = CHIP_BOOT_SVC_MSG_SIZE_MAX + 1,
                     }},
         .exp_error = kErrorBootSvcBadHeader,
+        .error_before_digest = true,
     },
 }};
 
 TEST_P(BootSvcHeaderCheckTest, Check) {
   // Use an all-zero digest by default.
-  EXPECT_CALL(hmac_,
-              sha256(&GetParam().msg.header.identifier,
-                     GetParam().msg.header.length - sizeof(hmac_digest_t), _))
-      .WillOnce(SetArgPointee<2>(hmac_digest_t{}));
+  auto param = GetParam();
+
+  if (!param.error_before_digest) {
+    EXPECT_CALL(hmac_,
+                sha256(&param.msg.header.identifier,
+                       param.msg.header.length - sizeof(hmac_digest_t), _))
+        .WillOnce(SetArgPointee<2>(hmac_digest_t{}));
+  }
 
-  EXPECT_EQ(boot_svc_header_check(&GetParam().msg.header),
-            GetParam().exp_error);
+  EXPECT_EQ(boot_svc_header_check(&param.msg.header), param.exp_error);
 }
 
 INSTANTIATE_TEST_SUITE_P(HeaderCheckTestCases, BootSvcHeaderCheckTest,
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h
index e1e0349f27af5..aa196c5dccc08 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h
@@ -56,7 +56,7 @@ typedef struct boot_svc_min_bl0_sec_ver_res {
   /**
    * Status response from ROM_EXT.
    */
-  rom_error_t status;
+  uint32_t status;
 } boot_svc_min_bl0_sec_ver_res_t;
 
 OT_ASSERT_MEMBER_OFFSET(boot_svc_min_bl0_sec_ver_res_t, header, 0);
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h
index 26cf07108fed7..c3d306c761f50 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h
@@ -7,12 +7,13 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_header.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_activate.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.h"
-#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -31,6 +32,11 @@ extern "C" {
    * Empty boot services message.
    */ \
   X(boot_svc_empty_t, empty) \
+  /**
+   * Enter rescue mode.
+   */ \
+  X(boot_svc_enter_rescue_req_t, enter_rescue_req) \
+  X(boot_svc_enter_rescue_res_t, enter_rescue_res) \
   /**
    * Next Boot BL0 Slot request and response.
    */ \
@@ -41,16 +47,16 @@ extern "C" {
    */ \
   X(boot_svc_min_bl0_sec_ver_req_t, min_bl0_sec_ver_req) \
   X(boot_svc_min_bl0_sec_ver_res_t, min_bl0_sec_ver_res) \
-  /**
-   * Set Primary BL0 Slot request and response.
-   */ \
-  X(boot_svc_primary_bl0_slot_req_t, primary_bl0_slot_req) \
-  X(boot_svc_primary_bl0_slot_res_t, primary_bl0_slot_res) \
   /**
    * Ownership Activate
    */ \
   X(boot_svc_ownership_activate_req_t, ownership_activate_req) \
   X(boot_svc_ownership_activate_res_t, ownership_activate_res) \
+  /**
+   * Ownership History
+   */ \
+  X(boot_svc_ownership_history_req_t, ownership_history_req) \
+  X(boot_svc_ownership_history_res_t, ownership_history_res) \
   /**
    * Ownership Unlock
    */ \
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.c
index 8a920ce4e1528..9cd5169bc2489 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.c
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.c
@@ -7,16 +7,20 @@
 #include "sw/device/silicon_creator/lib/error.h"
 
 void boot_svc_next_boot_bl0_slot_req_init(
-    uint32_t next_slot, boot_svc_next_boot_bl0_slot_req_t *msg) {
+    uint32_t primary_slot, uint32_t next_slot,
+    boot_svc_next_boot_bl0_slot_req_t *msg) {
   msg->next_bl0_slot = next_slot;
+  msg->primary_bl0_slot = primary_slot;
   boot_svc_header_finalize(kBootSvcNextBl0SlotReqType,
                            sizeof(boot_svc_next_boot_bl0_slot_req_t),
                            &msg->header);
 }
 
 void boot_svc_next_boot_bl0_slot_res_init(
-    rom_error_t status, boot_svc_next_boot_bl0_slot_res_t *msg) {
+    rom_error_t status, uint32_t primary_slot,
+    boot_svc_next_boot_bl0_slot_res_t *msg) {
   msg->status = status;
+  msg->primary_bl0_slot = primary_slot;
   boot_svc_header_finalize(kBootSvcNextBl0SlotResType,
                            sizeof(boot_svc_next_boot_bl0_slot_res_t),
                            &msg->header);
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h
index 0259558338483..222d22a56eac4 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h
@@ -35,12 +35,18 @@ typedef struct boot_svc_next_boot_bl0_slot_req {
    * BL0 slot to boot on next reboot.
    */
   uint32_t next_bl0_slot;
+  /**
+   * BL0 slot to set as the primary boot slot.
+   */
+  uint32_t primary_bl0_slot;
 } boot_svc_next_boot_bl0_slot_req_t;
 
 OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_req_t, header, 0);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_req_t, next_bl0_slot,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_SIZE(boot_svc_next_boot_bl0_slot_req_t, 48);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_req_t, primary_bl0_slot,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+OT_ASSERT_SIZE(boot_svc_next_boot_bl0_slot_req_t, 52);
 
 /**
  * A Next Boot BL0 Slot response message.
@@ -53,31 +59,41 @@ typedef struct boot_svc_next_boot_bl0_slot_res {
   /**
    * Response status from the ROM_EXT.
    */
-  rom_error_t status;
+  uint32_t status;
+  /**
+   * Which slot is primary.
+   */
+  uint32_t primary_bl0_slot;
 } boot_svc_next_boot_bl0_slot_res_t;
 
 OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_res_t, header, 0);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_res_t, status,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_SIZE(boot_svc_next_boot_bl0_slot_res_t, 48);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_next_boot_bl0_slot_res_t, primary_bl0_slot,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+OT_ASSERT_SIZE(boot_svc_next_boot_bl0_slot_res_t, 52);
 
 /**
  * Initialize a Next Boot BL0 Slot Request message.
  *
+ * @param primary_slot Slot to set as primary.
  * @param next_slot Slot to boot into on reboot.
  * @param[out] msg Output buffer for the message.
  */
 void boot_svc_next_boot_bl0_slot_req_init(
-    uint32_t next_slot, boot_svc_next_boot_bl0_slot_req_t *msg);
+    uint32_t primary_slot, uint32_t next_slot,
+    boot_svc_next_boot_bl0_slot_req_t *msg);
 
 /**
  * Initialize a Next Boot BL0 Slot Response message.
  *
+ * @param primary_slot Slot that is primary.
  * @param status Reponse from the ROM_EXT after receiving the request.
  * @param[out] msg Output buffer for the message.
  */
 void boot_svc_next_boot_bl0_slot_res_init(
-    rom_error_t status, boot_svc_next_boot_bl0_slot_res_t *msg);
+    rom_error_t status, uint32_t primary_slot,
+    boot_svc_next_boot_bl0_slot_res_t *msg);
 
 #ifdef __cplusplus
 }  // extern "C"
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot_unittest.cc
index 608aefb07a80e..6b43a2f2d0ec5 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot_unittest.cc
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot_unittest.cc
@@ -19,24 +19,28 @@ class BootSvcNextBootBl0SlotTest : public rom_test::RomTest {
 
 TEST_F(BootSvcNextBootBl0SlotTest, ReqInit) {
   boot_svc_next_boot_bl0_slot_req_t msg{};
+  constexpr uint32_t kPrimarySlot = kBootSlotA;
   constexpr uint32_t kNextSlot = kBootSlotB;
   EXPECT_CALL(boot_svc_header_,
               Finalize(kBootSvcNextBl0SlotReqType, sizeof(msg), &msg.header));
 
-  boot_svc_next_boot_bl0_slot_req_init(kNextSlot, &msg);
+  boot_svc_next_boot_bl0_slot_req_init(kPrimarySlot, kNextSlot, &msg);
 
   EXPECT_EQ(msg.next_bl0_slot, kNextSlot);
+  EXPECT_EQ(msg.primary_bl0_slot, kPrimarySlot);
 }
 
 TEST_F(BootSvcNextBootBl0SlotTest, ResInit) {
   boot_svc_next_boot_bl0_slot_res_t msg{};
   constexpr rom_error_t kStatus = kErrorOk;
+  constexpr uint32_t kPrimarySlot = kBootSlotA;
   EXPECT_CALL(boot_svc_header_,
               Finalize(kBootSvcNextBl0SlotResType, sizeof(msg), &msg.header));
 
-  boot_svc_next_boot_bl0_slot_res_init(kStatus, &msg);
+  boot_svc_next_boot_bl0_slot_res_init(kStatus, kPrimarySlot, &msg);
 
   EXPECT_EQ(msg.status, kStatus);
+  EXPECT_EQ(msg.primary_bl0_slot, kPrimarySlot);
 }
 
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_activate.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_activate.h
index d613449d6c42f..4d191decab176 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_activate.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_activate.h
@@ -37,14 +37,19 @@ typedef struct boot_svc_ownership_activate_req {
    * Which side of the flash is primary after activation.
    */
   uint32_t primary_bl0_slot;
+  /**
+   * The 64-bit DIN subfield of the full 256-bit device ID.
+   */
+  uint32_t din[2];
   /**
    * Erase previous owner's flash (hardened_bool_t).
+   * Currently, this is not implemented.
    */
   uint32_t erase_previous;
   /**
    * Reserved for future use.
    */
-  uint32_t reserved[33];
+  uint32_t reserved[31];
   /**
    * The current ownership nonce.
    */
@@ -59,10 +64,12 @@ typedef struct boot_svc_ownership_activate_req {
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, header, 0);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, primary_bl0_slot,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, erase_previous,
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, din,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, erase_previous,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 12);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, reserved,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 8);
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 16);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, nonce,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE + 140);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_req_t, signature,
@@ -80,7 +87,7 @@ typedef struct boot_svc_ownership_activate_res {
   /**
    * Response status from the ROM_EXT.
    */
-  rom_error_t status;
+  uint32_t status;
 } boot_svc_ownership_activate_res_t;
 
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_activate_res_t, header, 0);
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.c
new file mode 100644
index 0000000000000..0367a9a433288
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.c
@@ -0,0 +1,25 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+void boot_svc_ownership_history_req_init(
+    boot_svc_ownership_history_req_t *msg) {
+  boot_svc_header_finalize(kBootSvcOwnershipHistoryReqType,
+                           sizeof(boot_svc_ownership_history_req_t),
+                           &msg->header);
+}
+
+void boot_svc_ownership_history_res_init(
+    rom_error_t status, const uint32_t *history_digest,
+    boot_svc_ownership_history_res_t *msg) {
+  msg->status = status;
+  memcpy(msg->history_digest, history_digest, sizeof(msg->history_digest));
+  boot_svc_header_finalize(kBootSvcOwnershipHistoryResType,
+                           sizeof(boot_svc_ownership_history_res_t),
+                           &msg->header);
+}
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h
new file mode 100644
index 0000000000000..8690fabf411f1
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h
@@ -0,0 +1,87 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_OWNERSHIP_HISTORY_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_OWNERSHIP_HISTORY_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_header.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+enum {
+  /** Ownership history request: `HIST`. */
+  kBootSvcOwnershipHistoryReqType = 0x54534948,
+  /** Ownership history response: `TSIH`. */
+  kBootSvcOwnershipHistoryResType = 0x48495354,
+};
+
+/**
+ * An Ownership History request.
+ */
+typedef struct boot_svc_ownership_history_req {
+  /**
+   * Boot services message header.
+   */
+  boot_svc_header_t header;
+} boot_svc_ownership_history_req_t;
+
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_history_req_t, header, 0);
+OT_ASSERT_SIZE(boot_svc_ownership_history_req_t, CHIP_BOOT_SVC_MSG_HEADER_SIZE);
+
+/**
+ * An Ownership History response.
+ */
+typedef struct boot_svc_ownership_history_res {
+  /**
+   * Boot services message header.
+   */
+  boot_svc_header_t header;
+  /**
+   * Response status from the ROM_EXT.
+   */
+  uint32_t status;
+  /**
+   * Digest of all prior owner keys.
+   */
+  uint32_t history_digest[8];
+} boot_svc_ownership_history_res_t;
+
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_history_res_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_history_res_t, status,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_history_res_t, history_digest,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+OT_ASSERT_SIZE(boot_svc_ownership_history_res_t, 80);
+
+/**
+ * Initialize an ownership history request.
+ *
+ * @param[out] msg Output buffer for the message.
+ */
+void boot_svc_ownership_history_req_init(boot_svc_ownership_history_req_t *msg);
+
+/**
+ * Initialize an ownership history response.
+ *
+ * @param status Reponse from the ROM_EXT after receiving the request.
+ * @param history_digest Digest of all prior owner keys.
+ *        The digest is computed each time there is an ownership transfer.
+ *        The new digest is SHA256(previous_digest || new_owner_key).
+ * @param[out] msg Output buffer for the message.
+ */
+void boot_svc_ownership_history_res_init(rom_error_t status,
+                                         const uint32_t *history_digest,
+                                         boot_svc_ownership_history_res_t *msg);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_OWNERSHIP_HISTORY_H_
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history_unittest.cc
new file mode 100644
index 0000000000000..cabde7027551e
--- /dev/null
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history_unittest.cc
@@ -0,0 +1,45 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_history.h"
+
+#include <string.h>
+
+#include "gtest/gtest.h"
+#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace boot_svc_ownership_history_unittest {
+namespace {
+using ::testing::ElementsAreArray;
+
+class BootSvcOwnershipHistoryTest : public rom_test::RomTest {
+ protected:
+  rom_test::MockBootSvcHeader boot_svc_header_;
+};
+
+TEST_F(BootSvcOwnershipHistoryTest, ReqInit) {
+  boot_svc_ownership_history_req_t msg{};
+  EXPECT_CALL(boot_svc_header_, Finalize(kBootSvcOwnershipHistoryReqType,
+                                         sizeof(msg), &msg.header));
+
+  boot_svc_ownership_history_req_init(&msg);
+}
+
+TEST_F(BootSvcOwnershipHistoryTest, ResInit) {
+  boot_svc_ownership_history_res_t msg{};
+  constexpr rom_error_t kStatus = kErrorOk;
+  const uint32_t history_digest[8] = {1, 2, 3, 4, 5, 6, 7, 8};
+  EXPECT_CALL(boot_svc_header_, Finalize(kBootSvcOwnershipHistoryResType,
+                                         sizeof(msg), &msg.header));
+
+  boot_svc_ownership_history_res_init(kStatus, history_digest, &msg);
+
+  EXPECT_EQ(msg.status, kStatus);
+  EXPECT_EQ(
+      memcmp(&msg.history_digest, &history_digest, sizeof(history_digest)), 0);
+}
+
+}  // namespace
+}  // namespace boot_svc_ownership_history_unittest
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.c
index 4c053db847862..2f546b2399a64 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.c
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.c
@@ -7,12 +7,15 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
-void boot_svc_ownership_unlock_req_init(uint32_t unlock_mode, nonce_t nonce,
-                                        const owner_key_t *next_owner_key,
+void boot_svc_ownership_unlock_req_init(uint32_t unlock_mode,
+                                        uint32_t next_owner_key_alg,
+                                        nonce_t nonce,
+                                        const owner_keydata_t *next_owner_key,
                                         const owner_signature_t *signature,
                                         boot_svc_ownership_unlock_req_t *msg) {
   msg->unlock_mode = unlock_mode;
   memset(msg->reserved, 0, sizeof(msg->reserved));
+  msg->next_owner_key_alg = next_owner_key_alg;
   msg->nonce = nonce;
   msg->next_owner_key = *next_owner_key;
   msg->signature = *signature;
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.h
index 92dd9db4c7994..0d1479dc079bb 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.h
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock.h
@@ -46,10 +46,20 @@ typedef struct boot_svc_ownership_unlock_req {
    * Unlock mode: Any, Endorsed, Update or Abort.
    */
   uint32_t unlock_mode;
+  /**
+   * The 64-bit ID subfield of the full 256-bit device ID.
+   */
+  uint32_t din[2];
   /**
    * Reserved for future use.
    */
-  uint32_t reserved[18];
+  uint32_t reserved[7];
+  /**
+   * Algorithm identifier of the next owner (for endorsed mode).
+   *
+   * It should be one of the `ownership_key_alg_t` enum.
+   */
+  uint32_t next_owner_key_alg;
   /**
    * The current ownership nonce.
    */
@@ -57,7 +67,7 @@ typedef struct boot_svc_ownership_unlock_req {
   /**
    * The public key of the next owner (for endorsed mode).
    */
-  owner_key_t next_owner_key;
+  owner_keydata_t next_owner_key;
   /**
    * Signature over [unlock_mode..next_owner_key]
    */
@@ -68,12 +78,16 @@ typedef struct boot_svc_ownership_unlock_req {
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, header, 0);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, unlock_mode,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, reserved,
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, din,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, reserved,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 12);
+OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, next_owner_key_alg,
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 40);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, nonce,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 76);
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 44);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, next_owner_key,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 84);
+                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 52);
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_req_t, signature,
                         CHIP_BOOT_SVC_MSG_HEADER_SIZE + 148);
 OT_ASSERT_SIZE(boot_svc_ownership_unlock_req_t, 256);
@@ -89,7 +103,7 @@ typedef struct boot_svc_ownership_unlock_res {
   /**
    * Response status from the ROM_EXT.
    */
-  rom_error_t status;
+  uint32_t status;
 } boot_svc_ownership_unlock_res_t;
 
 OT_ASSERT_MEMBER_OFFSET(boot_svc_ownership_unlock_res_t, header, 0);
@@ -102,8 +116,10 @@ OT_ASSERT_SIZE(boot_svc_ownership_unlock_res_t, 48);
  *
  * @param[out] msg Output buffer for the message.
  */
-void boot_svc_ownership_unlock_req_init(uint32_t unlock_mode, nonce_t nonce,
-                                        const owner_key_t *next_owner_key,
+void boot_svc_ownership_unlock_req_init(uint32_t unlock_mode,
+                                        uint32_t next_owner_key_alg,
+                                        nonce_t nonce,
+                                        const owner_keydata_t *next_owner_key,
                                         const owner_signature_t *signature,
                                         boot_svc_ownership_unlock_req_t *msg);
 
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock_unittest.cc
index ff854c19375d9..b46d0ddaf93f6 100644
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock_unittest.cc
+++ b/sw/device/silicon_creator/lib/boot_svc/boot_svc_ownership_unlock_unittest.cc
@@ -23,7 +23,8 @@ TEST_F(BootSvcOwnershipUnlockTest, ReqInit) {
   boot_svc_ownership_unlock_req_t msg{};
   constexpr uint32_t unlock_mode = kBootSvcUnlockAny;
   constexpr nonce_t nonce = {0x55555555, 0xAAAAAAAA};
-  constexpr owner_key_t next_owner_key = {
+  constexpr uint32_t next_owner_key_alg = 0x36353250;
+  constexpr owner_keydata_t next_owner_key = {
       {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}};
   constexpr owner_signature_t signature = {{100, 101, 102, 103, 104, 105, 106,
                                             107, 108, 109, 110, 111, 112, 113,
@@ -31,10 +32,11 @@ TEST_F(BootSvcOwnershipUnlockTest, ReqInit) {
   EXPECT_CALL(boot_svc_header_, Finalize(kBootSvcOwnershipUnlockReqType,
                                          sizeof(msg), &msg.header));
 
-  boot_svc_ownership_unlock_req_init(unlock_mode, nonce, &next_owner_key,
-                                     &signature, &msg);
+  boot_svc_ownership_unlock_req_init(unlock_mode, next_owner_key_alg, nonce,
+                                     &next_owner_key, &signature, &msg);
 
   EXPECT_EQ(msg.unlock_mode, unlock_mode);
+  EXPECT_EQ(msg.next_owner_key_alg, next_owner_key_alg);
   EXPECT_EQ(msg.nonce.value[0], nonce.value[0]);
   EXPECT_EQ(msg.nonce.value[1], nonce.value[1]);
   EXPECT_EQ(
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.c b/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.c
deleted file mode 100644
index 61c7c28558e24..0000000000000
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.c
+++ /dev/null
@@ -1,25 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h"
-
-#include "sw/device/silicon_creator/lib/error.h"
-
-void boot_svc_primary_bl0_slot_req_init(uint32_t primary_bl0_slot,
-                                        boot_svc_primary_bl0_slot_req_t *msg) {
-  msg->primary_bl0_slot = primary_bl0_slot;
-  boot_svc_header_finalize(kBootSvcPrimaryBl0SlotReqType,
-                           sizeof(boot_svc_primary_bl0_slot_req_t),
-                           &msg->header);
-}
-
-void boot_svc_primary_bl0_slot_res_init(uint32_t primary_bl0_slot,
-                                        rom_error_t status,
-                                        boot_svc_primary_bl0_slot_res_t *msg) {
-  msg->primary_bl0_slot = primary_bl0_slot;
-  msg->status = status;
-  boot_svc_header_finalize(kBootSvcPrimaryBl0SlotResType,
-                           sizeof(boot_svc_primary_bl0_slot_res_t),
-                           &msg->header);
-}
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h b/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h
deleted file mode 100644
index 6e481fb401912..0000000000000
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h
+++ /dev/null
@@ -1,93 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_PRIMARY_BL0_SLOT_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_PRIMARY_BL0_SLOT_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_header.h"
-#include "sw/device/silicon_creator/lib/error.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-enum {
-  /** Primary BL0 slot request: `PRIM`. */
-  kBootSvcPrimaryBl0SlotReqType = 0x4d495250,
-  /** Primary BL0 slot response: `MIRP`. */
-  kBootSvcPrimaryBl0SlotResType = 0x5052494d,
-};
-
-/**
- * A Set Primary Boot Slot request message.
- */
-typedef struct boot_svc_primary_bl0_slot_req {
-  /**
-   * Boot services message header.
-   */
-  boot_svc_header_t header;
-  /**
-   * BL0 slot to set as primary.
-   */
-  uint32_t primary_bl0_slot;
-} boot_svc_primary_bl0_slot_req_t;
-
-OT_ASSERT_MEMBER_OFFSET(boot_svc_primary_bl0_slot_req_t, header, 0);
-OT_ASSERT_MEMBER_OFFSET(boot_svc_primary_bl0_slot_req_t, primary_bl0_slot,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_SIZE(boot_svc_primary_bl0_slot_req_t, 48);
-
-/**
- * A Set Primary Boot Slot response message.
- */
-typedef struct boot_svc_primary_bl0_slot_res {
-  /**
-   * Boot services message header.
-   */
-  boot_svc_header_t header;
-  /**
-   * Primary BL0 slot set by the boot service.
-   */
-  uint32_t primary_bl0_slot;
-  /**
-   * Status response from ROM_EXT.
-   */
-  rom_error_t status;
-} boot_svc_primary_bl0_slot_res_t;
-
-OT_ASSERT_MEMBER_OFFSET(boot_svc_primary_bl0_slot_res_t, header, 0);
-OT_ASSERT_MEMBER_OFFSET(boot_svc_primary_bl0_slot_res_t, primary_bl0_slot,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE);
-OT_ASSERT_MEMBER_OFFSET(boot_svc_primary_bl0_slot_res_t, status,
-                        CHIP_BOOT_SVC_MSG_HEADER_SIZE + 4);
-OT_ASSERT_SIZE(boot_svc_primary_bl0_slot_res_t, 52);
-
-/**
- * Initialize an empty set primary bl0 slot request message.
- *
- * @param primary_bl0_slot The primary BL0 boot slot.
- * @param[out] msg Output buffer for the message.
- */
-void boot_svc_primary_bl0_slot_req_init(uint32_t primary_bl0_slot,
-                                        boot_svc_primary_bl0_slot_req_t *msg);
-
-/**
- * Initialize an empty set primary bl0 slot response message.
- *
- * @param primary_bl0_slot The primary BL0 boot slot.
- * @param status Error status from processing the request.
- * @param[out] msg Output buffer for the message.
- */
-void boot_svc_primary_bl0_slot_res_init(uint32_t primary_bl0_slot,
-                                        rom_error_t status,
-                                        boot_svc_primary_bl0_slot_res_t *msg);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BOOT_SVC_BOOT_SVC_PRIMARY_BL0_SLOT_H_
diff --git a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot_unittest.cc b/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot_unittest.cc
deleted file mode 100644
index 0ca6554ceafac..0000000000000
--- a/sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot_unittest.cc
+++ /dev/null
@@ -1,44 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_primary_bl0_slot.h"
-
-#include "gtest/gtest.h"
-#include "sw/device/silicon_creator/lib/boot_data.h"
-#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
-#include "sw/device/silicon_creator/testing/rom_test.h"
-
-namespace boot_svc_primary_bl0_slot_unittest {
-namespace {
-
-class BootSvcPrimaryBl0SlotTest : public rom_test::RomTest {
- protected:
-  rom_test::MockBootSvcHeader boot_svc_header_;
-};
-
-TEST_F(BootSvcPrimaryBl0SlotTest, ReqInit) {
-  boot_svc_primary_bl0_slot_req_t msg{};
-  constexpr uint32_t kPrimarySlot = kBootSlotB;
-  EXPECT_CALL(boot_svc_header_, Finalize(kBootSvcPrimaryBl0SlotReqType,
-                                         sizeof(msg), &msg.header));
-
-  boot_svc_primary_bl0_slot_req_init(kPrimarySlot, &msg);
-
-  EXPECT_EQ(msg.primary_bl0_slot, kPrimarySlot);
-}
-
-TEST_F(BootSvcPrimaryBl0SlotTest, ResInit) {
-  boot_svc_primary_bl0_slot_res_t msg{};
-  constexpr rom_error_t kStatus = kErrorOk;
-  EXPECT_CALL(boot_svc_header_, Finalize(kBootSvcPrimaryBl0SlotResType,
-                                         sizeof(msg), &msg.header));
-
-  boot_svc_primary_bl0_slot_res_init(kBootSlotB, kStatus, &msg);
-
-  EXPECT_EQ(msg.status, kStatus);
-  EXPECT_EQ(msg.primary_bl0_slot, kBootSlotB);
-}
-
-}  // namespace
-}  // namespace boot_svc_primary_bl0_slot_unittest
diff --git a/sw/device/silicon_creator/lib/bootstrap.c b/sw/device/silicon_creator/lib/bootstrap.c
index e5692c872c13c..d8bbb8c73725f 100644
--- a/sw/device/silicon_creator/lib/bootstrap.c
+++ b/sw/device/silicon_creator/lib/bootstrap.c
@@ -209,7 +209,7 @@ static rom_error_t bootstrap_handle_erase(bootstrap_state_t *state) {
   HARDENED_CHECK_EQ(*state, kBootstrapStateErase);
 
   spi_device_cmd_t cmd;
-  RETURN_IF_ERROR(spi_device_cmd_get(&cmd));
+  RETURN_IF_ERROR(spi_device_cmd_get(&cmd, /*blocking=*/true));
   // Erase requires WREN, ignore if WEL is not set.
   if (!bitfield_bit32_read(spi_device_flash_status_get(), kSpiDeviceWelBit)) {
     return kErrorOk;
@@ -275,7 +275,7 @@ static rom_error_t bootstrap_handle_program(bootstrap_state_t *state) {
   HARDENED_CHECK_EQ(*state, kBootstrapStateProgram);
 
   spi_device_cmd_t cmd;
-  RETURN_IF_ERROR(spi_device_cmd_get(&cmd));
+  RETURN_IF_ERROR(spi_device_cmd_get(&cmd, /*blocking=*/true));
   // Erase and program require WREN, ignore if WEL is not set.
   if (cmd.opcode != kSpiDeviceOpcodeReset &&
       !bitfield_bit32_read(spi_device_flash_status_get(), kSpiDeviceWelBit)) {
@@ -319,7 +319,7 @@ static rom_error_t bootstrap_handle_program(bootstrap_state_t *state) {
 }
 
 rom_error_t enter_bootstrap(void) {
-  spi_device_init();
+  spi_device_init_bootstrap();
 
   // Bootstrap event loop.
   bootstrap_state_t state = kBootstrapStateErase;
diff --git a/sw/device/silicon_creator/lib/bootstrap_fuzzer_util.cc b/sw/device/silicon_creator/lib/bootstrap_fuzzer_util.cc
index 11d24efd2da81..254e6fdb495ed 100644
--- a/sw/device/silicon_creator/lib/bootstrap_fuzzer_util.cc
+++ b/sw/device/silicon_creator/lib/bootstrap_fuzzer_util.cc
@@ -71,8 +71,8 @@ void AbstractBootstrapMockGroup::ConfigureMocks() {
                : stream_.ParseIntOr<uint32_t>("flash_status", 0);
   });
 
-  ON_CALL(spi_device_, CmdGet(testing::NotNull()))
-      .WillByDefault([&](spi_device_cmd_t *cmd) -> rom_error_t {
+  ON_CALL(spi_device_, CmdGet(testing::NotNull(), true))
+      .WillByDefault([&](spi_device_cmd_t *cmd, bool blocking) -> rom_error_t {
         spi_cmd_count_++;
 
         if (spi_cmd_count_ < max_spi_cmd_count_) {
diff --git a/sw/device/silicon_creator/lib/bootstrap_unittest_util.cc b/sw/device/silicon_creator/lib/bootstrap_unittest_util.cc
index ad9d0b3a45fbc..1bb0e3e7d8c08 100644
--- a/sw/device/silicon_creator/lib/bootstrap_unittest_util.cc
+++ b/sw/device/silicon_creator/lib/bootstrap_unittest_util.cc
@@ -40,7 +40,7 @@ void BootstrapTest::ExpectBootstrapRequestCheck(bool requested) {
 }
 
 void BootstrapTest::ExpectSpiCmd(spi_device_cmd_t cmd) {
-  EXPECT_CALL(spi_device_, CmdGet(NotNull()))
+  EXPECT_CALL(spi_device_, CmdGet(NotNull(), true))
       .WillOnce(DoAll(SetArgPointee<0>(cmd), Return(kErrorOk)));
 }
 
diff --git a/sw/device/silicon_creator/lib/build_info.h b/sw/device/silicon_creator/lib/build_info.h
new file mode 100644
index 0000000000000..f8f83283f58c0
--- /dev/null
+++ b/sw/device/silicon_creator/lib/build_info.h
@@ -0,0 +1,58 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BUILD_INFO_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BUILD_INFO_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+
+/**
+ * A truncated commit hash from the open-source OpenTitan repo that can be
+ * used to reproduce the ROM binary.
+ */
+typedef struct build_info_scm_revision {
+  /**
+   * Least significant word of the truncated commit hash.
+   */
+  uint32_t scm_revision_low;
+  /**
+   * Most significant word of the truncated commit hash.
+   */
+  uint32_t scm_revision_high;
+} build_info_scm_revision_t;
+
+typedef struct build_info {
+  /**
+   * Truncated commit hash.
+   */
+  build_info_scm_revision_t scm_revision;
+  /**
+   * Chip info format version.
+   *
+   * The chip info struct is placed at the end of the ROM. Placing this field at
+   * the end of the struct places the version word at the last addressable ROM
+   * address, which gives later boot stages a fixed address to look for this
+   * field. See `sw/device/silicon_creator/rom/rom.ld` for details.
+   */
+  uint32_t version;
+} build_info_t;
+OT_ASSERT_MEMBER_OFFSET(build_info_t, scm_revision, 0);
+OT_ASSERT_MEMBER_OFFSET(build_info_t, version, 8);
+OT_ASSERT_SIZE(build_info_t, 12);
+
+enum {
+  /**
+   * Chip info format version 1 value.
+   */
+  kBuildInfoVersion1 = 0x4efecea6,
+};
+
+/**
+ * The build information.
+ */
+extern const build_info_t kBuildInfo;
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_BUILD_INFO_H_
diff --git a/sw/device/silicon_creator/lib/cert/BUILD b/sw/device/silicon_creator/lib/cert/BUILD
index 8f89fde26c77a..ef354de6fa616 100644
--- a/sw/device/silicon_creator/lib/cert/BUILD
+++ b/sw/device/silicon_creator/lib/cert/BUILD
@@ -6,6 +6,10 @@ load(
     "//rules:certificates.bzl",
     "certificate_template",
 )
+load(
+    "//rules/opentitan:defs.bzl",
+    "opentitan_test",
+)
 
 package(default_visibility = ["//visibility:public"])
 
@@ -35,13 +39,27 @@ certificate_template(
 )
 
 certificate_template(
-    name = "tpm_cek_template",
-    template = "tpm_cek.hjson",
+    name = "cwt_cose_key_template",
+    cert_format = "cwt",
+    template = "cwt_cose_key.hjson",
+)
+
+certificate_template(
+    name = "cwt_dice_chain_entry_payload_template",
+    cert_format = "cwt",
+    template = "cwt_dice_chain_entry_payload.hjson",
 )
 
 certificate_template(
-    name = "tpm_cik_template",
-    template = "tpm_cik.hjson",
+    name = "cwt_dice_chain_entry_input_template",
+    cert_format = "cwt",
+    template = "cwt_dice_chain_entry_input.hjson",
+)
+
+certificate_template(
+    name = "cwt_dice_chain_entry_template",
+    cert_format = "cwt",
+    template = "cwt_dice_chain_entry.hjson",
 )
 
 certificate_template(
@@ -54,6 +72,7 @@ cc_library(
     srcs = ["asn1.c"],
     hdrs = ["asn1.h"],
     deps = [
+        "//sw/device/lib/base:macros",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
     ],
@@ -68,16 +87,27 @@ cc_test(
     ],
 )
 
+cc_library(
+    name = "template",
+    srcs = ["template.c"],
+    hdrs = ["template.h"],
+    deps = [
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+    ],
+)
+
 cc_library(
     name = "cert",
     srcs = ["cert.c"],
     hdrs = ["cert.h"],
     deps = [
-        ":asn1",
-        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
         "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:memory",
         "//sw/device/silicon_creator/lib:error",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
     ],
 )
 
@@ -93,3 +123,159 @@ cc_test(
         "@googletest//:gtest_main",
     ],
 )
+
+cc_library(
+    name = "dice_api",
+    hdrs = ["dice.h"],
+    deps = [
+        ":cert",
+        "//sw/device/silicon_creator/lib:attestation",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:keymgr",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+    ],
+)
+
+cc_library(
+    name = "dice",
+    srcs = ["dice.c"],
+    deps = [
+        ":cert",
+        ":dice_api",
+        ":template",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/silicon_creator/lib:attestation",
+        "//sw/device/silicon_creator/lib:otbn_boot_services",
+        "//sw/device/silicon_creator/lib/base:util",
+        "//sw/device/silicon_creator/lib/cert:cdi_0_template_library",
+        "//sw/device/silicon_creator/lib/cert:cdi_1_template_library",
+        "//sw/device/silicon_creator/lib/cert:dice_keys",
+        "//sw/device/silicon_creator/lib/cert:uds_template_library",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+        "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
+    ],
+)
+
+cc_library(
+    name = "cbor",
+    srcs = ["cbor.c"],
+    hdrs = ["cbor.h"],
+    deps = [
+        "//sw/device/lib/base:status",
+    ],
+)
+
+cc_library(
+    name = "cwt_template",
+    deps = [
+        ":cbor",
+        ":cwt_cose_key_template_library",
+        ":cwt_dice_chain_entry_input_template_library",
+        ":cwt_dice_chain_entry_payload_template_library",
+        ":cwt_dice_chain_entry_template_library",
+        "//sw/device/lib/base:status",
+    ],
+)
+
+cc_library(
+    name = "dice_cwt",
+    srcs = ["dice_cwt.c"],
+    deps = [
+        ":cbor",
+        ":cert",
+        ":cwt_template",
+        ":dice_api",
+        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:status",
+        "//sw/device/silicon_creator/lib:attestation",
+        "//sw/device/silicon_creator/lib:otbn_boot_services",
+        "//sw/device/silicon_creator/lib/base:util",
+        "//sw/device/silicon_creator/lib/cert:dice_keys",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+        "@open-dice//:cbor_reader_writer",
+    ],
+)
+
+opentitan_test(
+    name = "dice_cwt_functest",
+    srcs = ["dice_cwt_functest.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    deps = [
+        ":dice_cwt",
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+    ],
+)
+
+cc_library(
+    name = "dice_keys",
+    srcs = ["dice_keys.c"],
+    hdrs = ["dice_keys.h"],
+    deps = [
+        "//sw/device/silicon_creator/lib/drivers:keymgr",
+        "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
+    ],
+)
+
+cc_library(
+    name = "tpm",
+    srcs = ["tpm.c"],
+    hdrs = ["tpm.h"],
+    deps = [
+        ":cert",
+        ":template",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/silicon_creator/lib/cert:tpm_ek_template_library",
+        "//sw/device/silicon_creator/lib/drivers:keymgr",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
+        "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
+    ],
+)
+
+cc_library(
+    name = "dice_chain",
+    srcs = ["dice_chain.c"],
+    hdrs = ["dice_chain.h"],
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib:keymgr_binding",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib:otbn_boot_services",
+        "//sw/device/silicon_creator/lib/base:boot_measurements",
+        "//sw/device/silicon_creator/lib/base:sec_mmio",
+        "//sw/device/silicon_creator/lib/base:static_dice_cdi_0",
+        "//sw/device/silicon_creator/lib/base:util",
+        "//sw/device/silicon_creator/lib/cert:dice_api",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:keymgr",
+        "//sw/device/silicon_creator/lib/drivers:kmac",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+    ],
+)
diff --git a/sw/device/silicon_creator/lib/cert/asn1.c b/sw/device/silicon_creator/lib/cert/asn1.c
index bd0ee11249958..9795df20bd4d5 100644
--- a/sw/device/silicon_creator/lib/cert/asn1.c
+++ b/sw/device/silicon_creator/lib/cert/asn1.c
@@ -6,6 +6,31 @@
 
 #include <limits.h>
 
+/**
+ * Return if the given asn1 state has an active error.
+ *
+ * @param state Pointer to a user-allocated `asn1_state_t` state.
+ */
+#define RETURN_IF_ASN1_ERROR(state)   \
+  do {                                \
+    if ((state)->error != kErrorOk) { \
+      return;                         \
+    }                                 \
+  } while (false);
+
+/**
+ * Set the active error in asn1 state to `error_code` and return.
+ *
+ * @param state Pointer to a user-allocated `asn1_state_t` state.
+ */
+#define RAISE_ASN1_ERROR(state, error_code) \
+  do {                                      \
+    (state)->error = (error_code);          \
+    return;                                 \
+  } while (false);
+
+void asn1_clear_error(asn1_state_t *state) { state->error = kErrorOk; }
+
 rom_error_t asn1_start(asn1_state_t *new_state, uint8_t *buffer, size_t size) {
   // Make sure that the buffer is not too large to prevent overflows.
   if (new_state == NULL || buffer == NULL || size > PTRDIFF_MAX) {
@@ -14,57 +39,62 @@ rom_error_t asn1_start(asn1_state_t *new_state, uint8_t *buffer, size_t size) {
   new_state->buffer = buffer;
   new_state->size = size;
   new_state->offset = 0;
+  asn1_clear_error(new_state);
   return kErrorOk;
 }
 
 rom_error_t asn1_finish(asn1_state_t *state, size_t *out_size) {
+  rom_error_t result = state->error;
   *out_size = state->offset;
-  state->buffer = 0;
+  state->buffer = NULL;
   state->size = 0;
   state->offset = 0;
-  return kErrorOk;
+  asn1_clear_error(state);
+  return result;
 }
 
-rom_error_t asn1_push_byte(asn1_state_t *state, uint8_t byte) {
-  return asn1_push_bytes(state, &byte, 1);
+void asn1_push_byte(asn1_state_t *state, uint8_t byte) {
+  asn1_push_bytes(state, &byte, 1);
 }
 
-rom_error_t asn1_push_bytes(asn1_state_t *state, const uint8_t *bytes,
-                            size_t size) {
+void asn1_push_bytes(asn1_state_t *state, const uint8_t *bytes, size_t size) {
+  RETURN_IF_ASN1_ERROR(state);
+
   // Make sure that the addition will not overflow
-  if (size > PTRDIFF_MAX) {
-    return kErrorAsn1PushBytesInvalidArgument;
+  if (size > PTRDIFF_MAX || state->offset > PTRDIFF_MAX) {
+    RAISE_ASN1_ERROR(state, kErrorAsn1PushBytesInvalidArgument);
   }
   if (state->offset + size > state->size) {
-    return kErrorAsn1BufferExhausted;
+    RAISE_ASN1_ERROR(state, kErrorAsn1BufferExhausted);
   }
   memcpy(state->buffer + state->offset, bytes, size);
   state->offset += size;
-  return kErrorOk;
 }
 
-rom_error_t asn1_start_tag(asn1_state_t *state, asn1_tag_t *new_tag,
-                           uint8_t id) {
+void asn1_start_tag(asn1_state_t *state, asn1_tag_t *new_tag, uint8_t id) {
+  new_tag->state = NULL;
+  RETURN_IF_ASN1_ERROR(state);
+
   new_tag->state = state;
-  RETURN_IF_ERROR(asn1_push_byte(state, id));
+  asn1_push_byte(state, id);
+  RETURN_IF_ASN1_ERROR(state);
   new_tag->len_offset = state->offset;
   // We do not yet known how many bytes we need to encode the length. For now
   // reserve one byte which is the minimum. This is then fixed in
   // asn1_finish_tag by moving the data if necessary.
 
-  RETURN_IF_ERROR(asn1_push_byte(state, 0));
+  asn1_push_byte(state, 0);
+  RETURN_IF_ASN1_ERROR(state);
   new_tag->len_size = 1;
-  return kErrorOk;
 }
 
-rom_error_t asn1_finish_tag(asn1_tag_t *tag) {
-  // Robustness check against accidently reusing a finished tag.
-  if (tag->state == NULL) {
-    return kErrorAsn1Internal;
-  }
+void asn1_finish_tag(asn1_tag_t *tag) {
+  if (tag->state == NULL)
+    return;
+  RETURN_IF_ASN1_ERROR(tag->state);
   // Sanity check: asn1_start_tag should have output one byte.
   if (tag->len_size != 1) {
-    return kErrorAsn1Internal;
+    RAISE_ASN1_ERROR(tag->state, kErrorAsn1Internal);
   }
   // Compute actually used length.
   size_t length = tag->state->offset - tag->len_offset - tag->len_size;
@@ -83,7 +113,7 @@ rom_error_t asn1_finish_tag(asn1_tag_t *tag) {
     final_len_size = 3;
   } else {
     // Length too large.
-    return kErrorAsn1Internal;
+    RAISE_ASN1_ERROR(tag->state, kErrorAsn1Internal);
   }
   // If the final length uses more bytes than we initially allocated, we
   // need to shift all the tag data backwards.
@@ -92,7 +122,7 @@ rom_error_t asn1_finish_tag(asn1_tag_t *tag) {
     size_t new_buffer_size =
         tag->state->offset + final_len_size - tag->len_size;
     if (new_buffer_size > tag->state->size) {
-      return kErrorAsn1BufferExhausted;
+      RAISE_ASN1_ERROR(tag->state, kErrorAsn1BufferExhausted);
     }
     // Copy backwards.
     for (size_t i = 0; i < length; i++) {
@@ -112,7 +142,7 @@ rom_error_t asn1_finish_tag(asn1_tag_t *tag) {
     tag->state->buffer[tag->len_offset + 2] = (uint8_t)(length & 0xff);
   } else {
     // Length too large.
-    return kErrorAsn1Internal;
+    RAISE_ASN1_ERROR(tag->state, kErrorAsn1Internal);
   }
   // Fix up state offset.
   tag->state->offset += final_len_size - tag->len_size;
@@ -120,17 +150,16 @@ rom_error_t asn1_finish_tag(asn1_tag_t *tag) {
   tag->state = NULL;
   tag->len_offset = 0;
   tag->len_size = 0;
-  return kErrorOk;
 }
 
-rom_error_t asn1_push_bool(asn1_state_t *state, uint8_t tag, bool value) {
+void asn1_push_bool(asn1_state_t *state, uint8_t tag, bool value) {
   asn1_tag_t tag_st;
-  RETURN_IF_ERROR(asn1_start_tag(state, &tag_st, tag));
-  RETURN_IF_ERROR(asn1_push_byte(state, value ? 0xff : 0));
-  return asn1_finish_tag(&tag_st);
+  asn1_start_tag(state, &tag_st, tag);
+  asn1_push_byte(state, value ? 0xff : 0);
+  asn1_finish_tag(&tag_st);
 }
 
-rom_error_t asn1_push_int32(asn1_state_t *state, uint8_t tag, int32_t value) {
+void asn1_push_int32(asn1_state_t *state, uint8_t tag, int32_t value) {
   uint32_t u_value = (uint32_t)value;
   uint8_t bigint[4] = {
       u_value >> 24,
@@ -138,26 +167,27 @@ rom_error_t asn1_push_int32(asn1_state_t *state, uint8_t tag, int32_t value) {
       (u_value >> 8) & 0xff,
       u_value & 0xff,
   };
-  return asn1_push_integer(state, tag, true, bigint, sizeof(bigint));
+  asn1_push_integer(state, tag, true, bigint, sizeof(bigint));
 }
 
-rom_error_t asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value) {
+void asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value) {
   uint8_t bigint[4] = {
       value >> 24,
       (value >> 16) & 0xff,
       (value >> 8) & 0xff,
       value & 0xff,
   };
-  return asn1_push_integer(state, tag, false, bigint, sizeof(bigint));
+  asn1_push_integer(state, tag, false, bigint, sizeof(bigint));
 }
 
-rom_error_t asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
-                              const uint8_t *bytes_be, size_t size) {
+void asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
+                       const uint8_t *bytes_be, size_t size) {
+  RETURN_IF_ASN1_ERROR(state);
   if (size == 0 || (bytes_be == NULL && size > 0)) {
-    return kErrorAsn1PushIntegerInvalidArgument;
+    RAISE_ASN1_ERROR(state, kErrorAsn1PushIntegerInvalidArgument);
   }
   asn1_tag_t tag_st;
-  RETURN_IF_ERROR(asn1_start_tag(state, &tag_st, tag));
+  asn1_start_tag(state, &tag_st, tag);
   // Compute smallest possible encoding: ASN1 forbids that the first 9 bits (ie
   // first octet) and MSB of the second octet are either all ones or all zeroes.
 
@@ -177,18 +207,19 @@ rom_error_t asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
   } else {
     // For unsigned numbers, add a 0x00 padding if the first octet has MSB set.
     if ((bytes_be[0] >> 7) == 1) {
-      RETURN_IF_ERROR(asn1_push_byte(state, 0));
+      asn1_push_byte(state, 0);
     }
   }
-  RETURN_IF_ERROR(asn1_push_bytes(state, bytes_be, size));
-  return asn1_finish_tag(&tag_st);
+  asn1_push_bytes(state, bytes_be, size);
+  asn1_finish_tag(&tag_st);
 }
 
-rom_error_t asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
-                                  const uint8_t *bytes_be, size_t size,
-                                  size_t padded_size) {
+void asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
+                           const uint8_t *bytes_be, size_t size,
+                           size_t padded_size) {
+  RETURN_IF_ASN1_ERROR(state);
   if (size == 0 || size > padded_size) {
-    return kErrorAsn1PushIntegerPadInvalidArgument;
+    RAISE_ASN1_ERROR(state, kErrorAsn1PushIntegerPadInvalidArgument);
   }
   // Determine the padding byte.
   uint8_t padding = 0;
@@ -197,63 +228,64 @@ rom_error_t asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
   }
   // Output padding.
   while (padded_size-- > size) {
-    RETURN_IF_ERROR(asn1_push_byte(state, padding));
+    asn1_push_byte(state, padding);
   }
-  return asn1_push_bytes(state, bytes_be, size);
+  asn1_push_bytes(state, bytes_be, size);
 }
 
-rom_error_t asn1_push_oid_raw(asn1_state_t *state, const uint8_t *bytes,
-                              size_t size) {
+void asn1_push_oid_raw(asn1_state_t *state, const uint8_t *bytes, size_t size) {
   asn1_tag_t tag;
-  RETURN_IF_ERROR(asn1_start_tag(state, &tag, kAsn1TagNumberOid));
-  RETURN_IF_ERROR(asn1_push_bytes(state, bytes, size));
-  return asn1_finish_tag(&tag);
+  asn1_start_tag(state, &tag, kAsn1TagNumberOid);
+  asn1_push_bytes(state, bytes, size);
+  asn1_finish_tag(&tag);
 }
 
-rom_error_t asn1_push_string(asn1_state_t *state, uint8_t id, const char *str,
-                             size_t max_len) {
+void asn1_push_string(asn1_state_t *state, uint8_t id, const char *str,
+                      size_t max_len) {
   asn1_tag_t tag;
-  RETURN_IF_ERROR(asn1_start_tag(state, &tag, id));
+  asn1_start_tag(state, &tag, id);
   while (max_len > 0 && str[0] != 0) {
-    RETURN_IF_ERROR(asn1_push_byte(state, (uint8_t)str[0]));
+    asn1_push_byte(state, (uint8_t)str[0]);
     str++;
     max_len--;
   }
-  return asn1_finish_tag(&tag);
+  asn1_finish_tag(&tag);
 }
 
 static const char kLowercaseHexChars[16] = {'0', '1', '2', '3', '4', '5',
                                             '6', '7', '8', '9', 'a', 'b',
                                             'c', 'd', 'e', 'f'};
 
-rom_error_t asn1_push_hexstring(asn1_state_t *state, uint8_t id,
-                                const uint8_t *bytes, size_t size) {
+void asn1_push_hexstring(asn1_state_t *state, uint8_t id, const uint8_t *bytes,
+                         size_t size) {
   asn1_tag_t tag;
-  RETURN_IF_ERROR(asn1_start_tag(state, &tag, id));
+  asn1_start_tag(state, &tag, id);
   while (size > 0) {
-    RETURN_IF_ERROR(
-        asn1_push_byte(state, (uint8_t)kLowercaseHexChars[bytes[0] >> 4]));
-    RETURN_IF_ERROR(
-        asn1_push_byte(state, (uint8_t)kLowercaseHexChars[bytes[0] & 0xf]));
+    asn1_push_byte(state, (uint8_t)kLowercaseHexChars[bytes[0] >> 4]);
+    asn1_push_byte(state, (uint8_t)kLowercaseHexChars[bytes[0] & 0xf]);
     bytes++;
     size--;
   }
-  return asn1_finish_tag(&tag);
+  asn1_finish_tag(&tag);
 }
 
-rom_error_t asn1_start_bitstring(asn1_state_t *state,
-                                 asn1_bitstring_t *out_bitstring) {
+void asn1_start_bitstring(asn1_state_t *state,
+                          asn1_bitstring_t *out_bitstring) {
+  out_bitstring->state = NULL;
+  RETURN_IF_ASN1_ERROR(state);
   out_bitstring->state = state;
   out_bitstring->unused_bits_offset = state->offset;
   out_bitstring->used_bits = 0;
   out_bitstring->current_byte = 0;
   // Push a single byte that will hold the unused bit count (it will be updated
   // in asn1_finish_bitstring.
-  RETURN_IF_ERROR(asn1_push_byte(state, 0));
-  return kErrorOk;
+  asn1_push_byte(state, 0);
 }
 
-rom_error_t asn1_bitstring_push_bit(asn1_bitstring_t *bitstring, bool bit) {
+void asn1_bitstring_push_bit(asn1_bitstring_t *bitstring, bool bit) {
+  if (bitstring->state == NULL)
+    return;
+  RETURN_IF_ASN1_ERROR(bitstring->state);
   // Update the current byte: bits are added from MSB to LSB.
   if (bit) {
     bitstring->current_byte |= 1 << (7 - bitstring->used_bits);
@@ -261,29 +293,31 @@ rom_error_t asn1_bitstring_push_bit(asn1_bitstring_t *bitstring, bool bit) {
   // If this makes a full byte, push it and reset.
   bitstring->used_bits++;
   if (bitstring->used_bits == 8) {
-    RETURN_IF_ERROR(asn1_push_byte(bitstring->state, bitstring->current_byte));
+    asn1_push_byte(bitstring->state, bitstring->current_byte);
     bitstring->current_byte = 0;
     bitstring->used_bits = 0;
   }
-  return kErrorOk;
 }
 
-rom_error_t asn1_finish_bitstring(asn1_bitstring_t *bitstring) {
+void asn1_finish_bitstring(asn1_bitstring_t *bitstring) {
+  if (bitstring->state == NULL)
+    return;
+  RETURN_IF_ASN1_ERROR(bitstring->state);
   if (bitstring->used_bits >= 8) {
+    asn1_state_t *state = bitstring->state;
     bitstring->state = NULL;
-    return kErrorAsn1FinishBitstringInvalidArgument;
+    RAISE_ASN1_ERROR(state, kErrorAsn1FinishBitstringInvalidArgument);
   }
   // If the last byte contains some bits, we need to push it and update
   // the number of unused bits. If the string length was a multiple of 8
   // (ie used_bits = 0) then there are 0 unused bits which is the value pushed
   // in asn1_start_bitstring so we do not need to update it.
   if (bitstring->used_bits != 0) {
-    RETURN_IF_ERROR(asn1_push_byte(bitstring->state, bitstring->current_byte));
+    asn1_push_byte(bitstring->state, bitstring->current_byte);
     // Update the "unused bits value"
     bitstring->state->buffer[bitstring->unused_bits_offset] =
         8 - (uint8_t)bitstring->used_bits;
   }
   // Hardening: clear out the tag structure to prevent accidental reuse.
   bitstring->state = NULL;
-  return kErrorOk;
 }
diff --git a/sw/device/silicon_creator/lib/cert/asn1.h b/sw/device/silicon_creator/lib/cert/asn1.h
index a6a5e78730b46..cd337dd1a447a 100644
--- a/sw/device/silicon_creator/lib/cert/asn1.h
+++ b/sw/device/silicon_creator/lib/cert/asn1.h
@@ -5,6 +5,7 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_ASN1_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_ASN1_H_
 
+#include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
@@ -25,8 +26,19 @@ typedef struct asn1_state {
   size_t size;
   // Current offset in the output.
   size_t offset;
+  // Tracking the last active error.
+  // When there is an active error, all operations other than `asn1_start`,
+  // `asn1_finish` and `asn1_clear_error` will be no-op.
+  rom_error_t error;
 } asn1_state_t;
 
+/**
+ * Clear the ASN1 builder active error in the `state`.
+ *
+ * @param[out] state Pointer to a user-allocated state to be cleared.
+ */
+void asn1_clear_error(asn1_state_t *state);
+
 /**
  * Start generating an ASN1 stream.
  *
@@ -35,6 +47,7 @@ typedef struct asn1_state {
  * @param size Size of the user-provided buffer.
  * @return The result of the operation.
  */
+OT_WARN_UNUSED_RESULT
 rom_error_t asn1_start(asn1_state_t *new_state, uint8_t *buffer, size_t size);
 
 /**
@@ -47,27 +60,33 @@ rom_error_t asn1_start(asn1_state_t *new_state, uint8_t *buffer, size_t size);
  * the stream.
  * @return The result of the operation.
  */
+OT_WARN_UNUSED_RESULT
 rom_error_t asn1_finish(asn1_state_t *state, size_t *out_size);
 
 /**
  * Push a byte into the ASN1 buffer.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the initialized by asn1_start.
  * @param byte Byte to add to the buffer.
- * @return The result of the operation.
  */
-rom_error_t asn1_push_byte(asn1_state_t *state, uint8_t byte);
+void asn1_push_byte(asn1_state_t *state, uint8_t byte);
 
 /**
  * Push bytes into the ASN1 buffer.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the initialized by asn1_start.
  * @param bytes Pointer to an array of bytes.
  * @param size Number of bytes in the array.
- * @return The result of the operation.
  */
-rom_error_t asn1_push_bytes(asn1_state_t *state, const uint8_t *bytes,
-                            size_t size);
+void asn1_push_bytes(asn1_state_t *state, const uint8_t *bytes, size_t size);
 
 /**
  * Structure holding the information about an unfinished tag sequence.
@@ -132,14 +151,16 @@ typedef enum asn1_tag_number {
 /**
  * Start an ASN1 tag.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param[out] new_tag Pointer to a user-allocated tag to be initialized.
  * @param id Identifier byte of the tag (see ASN1_CLASS_*, ASN1_FORM_* and
  * ASN1_TAG_*).
- * @return The result of the operation.
  */
-rom_error_t asn1_start_tag(asn1_state_t *state, asn1_tag_t *new_tag,
-                           uint8_t id);
+void asn1_start_tag(asn1_state_t *state, asn1_tag_t *new_tag, uint8_t id);
 
 /**
  * Finish an ASN1 tag.
@@ -150,11 +171,14 @@ rom_error_t asn1_start_tag(asn1_state_t *state, asn1_tag_t *new_tag,
  *
  * Note: the `tag` will be cleared out after this call.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Pointer to the tag initialized by asn1_start_tag.
- * @return The result of the operation.
  */
-rom_error_t asn1_finish_tag(asn1_tag_t *tag);
+void asn1_finish_tag(asn1_tag_t *tag);
 
 /**
  * Push a tagged boolean into the buffer.
@@ -162,11 +186,15 @@ rom_error_t asn1_finish_tag(asn1_tag_t *tag);
  * Note: this function will encode true as 0xff (any non-zero value is
  * acceptable per the specification).
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Identifier octet of the tag.
  * @param value Boolean value.
  */
-rom_error_t asn1_push_bool(asn1_state_t *state, uint8_t tag, bool value);
+void asn1_push_bool(asn1_state_t *state, uint8_t tag, bool value);
 
 /**
  * Push a tagged integer into the buffer.
@@ -175,16 +203,20 @@ rom_error_t asn1_push_bool(asn1_state_t *state, uint8_t tag, bool value);
  * can be useful for IMPLICIT integers. Use ASN1_TAG_INTEGER for standard
  * integers.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Identifier octet of the tag.
  * @param value Integer value.
  */
-rom_error_t asn1_push_int32(asn1_state_t *state, uint8_t tag, int32_t value);
+void asn1_push_int32(asn1_state_t *state, uint8_t tag, int32_t value);
 
 /**
  * See asn1_push_int32()
  */
-rom_error_t asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value);
+void asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value);
 
 /**
  * Push a tagged integer into the buffer.
@@ -193,6 +225,10 @@ rom_error_t asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value);
  * can be useful for IMPLICIT integers. Use ASN1_TAG_INTEGER for standard
  * integers.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Identifier octet of the tag.
  * @param is_signed If true, the byte array represents a signed integer in two's
@@ -201,8 +237,8 @@ rom_error_t asn1_push_uint32(asn1_state_t *state, uint8_t tag, uint32_t value);
  * format.
  * @param size Number of the bytes in the array.
  */
-rom_error_t asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
-                              const uint8_t *bytes_be, size_t size);
+void asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
+                       const uint8_t *bytes_be, size_t size);
 
 /**
  * Push a padded integer into the buffer.
@@ -212,6 +248,10 @@ rom_error_t asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
  * value in two's complement. If the integer size is larger than the requested
  * size with padding, an error will be reported.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param is_signed If true, the byte array represents a signed integer in two's
  * complement.
@@ -220,9 +260,9 @@ rom_error_t asn1_push_integer(asn1_state_t *state, uint8_t tag, bool is_signed,
  * @param size Number of the bytes in the array.
  * @param size Number of the bytes to output with padding.
  */
-rom_error_t asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
-                                  const uint8_t *bytes_be, size_t size,
-                                  size_t padded_size);
+void asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
+                           const uint8_t *bytes_be, size_t size,
+                           size_t padded_size);
 
 /**
  * Push an object identifier into the buffer.
@@ -230,12 +270,15 @@ rom_error_t asn1_push_integer_pad(asn1_state_t *state, bool is_signed,
  * The object identifier must already be encoded according to the X.690 spec,
  * section 8.19 (https://www.itu.int/rec/T-REC-X.690).
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param bytes Pointer to a byte array holding the object identifier.
  * @param size Number of the bytes in the array.
  */
-rom_error_t asn1_push_oid_raw(asn1_state_t *state, const uint8_t *bytes,
-                              size_t size);
+void asn1_push_oid_raw(asn1_state_t *state, const uint8_t *bytes, size_t size);
 
 /**
  * Push a tagged string into the buffer.
@@ -248,13 +291,17 @@ rom_error_t asn1_push_oid_raw(asn1_state_t *state, const uint8_t *bytes,
  * in the string or after processing the provided number of characters,
  * whichever comes first.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Identifier octet of the tag.
  * @param str Pointer to a (not necessarily zero-terminated) string.
  * @param max_len Maximum number of characters to read from the string.
  */
-rom_error_t asn1_push_string(asn1_state_t *state, uint8_t tag, const char *str,
-                             size_t max_len);
+void asn1_push_string(asn1_state_t *state, uint8_t tag, const char *str,
+                      size_t max_len);
 
 /**
  * Push a tagged hexstring into the buffer.
@@ -263,36 +310,51 @@ rom_error_t asn1_push_string(asn1_state_t *state, uint8_t tag, const char *str,
  * can be useful for IMPLICIT strings. This function takes an array of bytes
  * and output exactly two lowercase hex characters per byte in the input buffer.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param tag Identifier octet of the tag.
  * @param str Pointer to a byte array.
  * @param size Number of the bytes in the array.
  */
-rom_error_t asn1_push_hexstring(asn1_state_t *state, uint8_t tag,
-                                const uint8_t *bytes, size_t size);
+void asn1_push_hexstring(asn1_state_t *state, uint8_t tag, const uint8_t *bytes,
+                         size_t size);
 
 /**
  * Start an ASN1 bitstring.
  *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
+ *
  * @param state Pointer to the state initialized by asn1_start.
  * @param[out] out_bitstring Pointer to a user-allocated bitstring to be
  * initialized.
  */
-rom_error_t asn1_start_bitstring(asn1_state_t *state,
-                                 asn1_bitstring_t *out_bitstring);
+void asn1_start_bitstring(asn1_state_t *state, asn1_bitstring_t *out_bitstring);
 
 /** Add a bit to a bitstring.
+ *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
  *
  * @param bitstring Pointer to a bitstring initialized by asn1_start_bitstring.
  * @param bit Bit to add at the end of the string.
  */
-rom_error_t asn1_bitstring_push_bit(asn1_bitstring_t *bitstring, bool bit);
+void asn1_bitstring_push_bit(asn1_bitstring_t *bitstring, bool bit);
 
 /** Finish an ASN1 bitstring.
+ *
+ * Note: This function tracks its error in the asn1 state, and the error will
+ * be returned by `asn1_finish` in the end. This function will be no-op when
+ * the state has an active error.
  *
  * @param bitstring Pointer to a bitstring initialized by asn1_start_bitstring.
  */
-rom_error_t asn1_finish_bitstring(asn1_bitstring_t *bitstring);
+void asn1_finish_bitstring(asn1_bitstring_t *bitstring);
 
 #ifdef __cplusplus
 }  // extern "C"
diff --git a/sw/device/silicon_creator/lib/cert/asn1_unittest.cc b/sw/device/silicon_creator/lib/cert/asn1_unittest.cc
index f364848dc4159..806eee6b51bac 100644
--- a/sw/device/silicon_creator/lib/cert/asn1_unittest.cc
+++ b/sw/device/silicon_creator/lib/cert/asn1_unittest.cc
@@ -45,9 +45,14 @@ TEST(Asn1, PushByte) {
   asn1_state_t state;
   uint8_t buf[1] = {0xff};
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_byte(&state, 0xa5), kErrorOk);
+  asn1_push_byte(&state, 0xa5);
+  EXPECT_EQ(state.error, kErrorOk);
+
   // Buffer is full, expect an error.
-  EXPECT_EQ(asn1_push_byte(&state, 0xb6), kErrorAsn1BufferExhausted);
+  asn1_push_byte(&state, 0xb6);
+  EXPECT_EQ(state.error, kErrorAsn1BufferExhausted);
+  asn1_clear_error(&state);
+
   size_t out_size = 42;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   EXPECT_EQ(out_size, 1);
@@ -60,7 +65,8 @@ TEST(Asn1, PushBytes) {
   uint8_t buf[3] = {0xff, 0xff, 0xff};
   const std::array<uint8_t, 2> kData = {0xa5, 0xb6};
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_bytes(&state, kData.begin(), kData.size()), kErrorOk);
+  asn1_push_bytes(&state, kData.begin(), kData.size());
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size = 42;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   EXPECT_EQ_CONST_ARRAY(buf, out_size, kData);
@@ -73,8 +79,9 @@ TEST(Asn1, PushBytesOverflow) {
   uint8_t buf[3] = {0xff, 0xff, 0xff};
   const uint8_t kData[] = {0xa5, 0xb6, 0x32, 0xff};
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_bytes(&state, kData, sizeof(kData)),
-            kErrorAsn1BufferExhausted);
+  asn1_push_bytes(&state, kData, sizeof(kData));
+  EXPECT_EQ(state.error, kErrorAsn1BufferExhausted);
+  asn1_clear_error(&state);
 }
 
 // Make sure that we can push an empty tag.
@@ -83,8 +90,10 @@ TEST(Asn1, PushEmptyTag) {
   uint8_t buf[16];
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
   asn1_tag_t tag;
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberSequence), kErrorOk);
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberSequence);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 2> kExpectedResult = {
@@ -98,8 +107,10 @@ TEST(Asn1, PushBoolean) {
   asn1_state_t state;
   uint8_t buf[16];
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_bool(&state, kAsn1TagNumberBoolean, true), kErrorOk);
-  EXPECT_EQ(asn1_push_bool(&state, kAsn1TagClassContext | 42, false), kErrorOk);
+  asn1_push_bool(&state, kAsn1TagNumberBoolean, true);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_bool(&state, kAsn1TagClassContext | 42, false);
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 6> kExpectedResult = {
@@ -115,12 +126,16 @@ TEST(Asn1, PushInt32) {
   asn1_state_t state;
   uint8_t buf[24];
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_uint32(&state, kAsn1TagNumberInteger, 0), kErrorOk);
-  EXPECT_EQ(asn1_push_int32(&state, kAsn1TagNumberInteger, 0x1234), kErrorOk);
-  EXPECT_EQ(asn1_push_uint32(&state, kAsn1TagNumberOctetString, 0x8000),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_int32(&state, kAsn1TagNumberInteger, -1), kErrorOk);
-  EXPECT_EQ(asn1_push_int32(&state, kAsn1TagNumberInteger, -3000), kErrorOk);
+  asn1_push_uint32(&state, kAsn1TagNumberInteger, 0);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_int32(&state, kAsn1TagNumberInteger, 0x1234);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_uint32(&state, kAsn1TagNumberOctetString, 0x8000);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_int32(&state, kAsn1TagNumberInteger, -1);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_int32(&state, kAsn1TagNumberInteger, -3000);
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 19> kExpectedResult = {
@@ -147,15 +162,15 @@ TEST(Asn1, PushIntUnsigned) {
   const uint8_t kBigInt3[] = {0x00, 0x00, 0x00, 0x80,
                               0x00};  // Extra zeroes for testing.
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt1,
-                              sizeof(kBigInt1)),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt2,
-                              sizeof(kBigInt2)),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt3,
-                              sizeof(kBigInt3)),
-            kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt1,
+                    sizeof(kBigInt1));
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt2,
+                    sizeof(kBigInt2));
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, false, kBigInt3,
+                    sizeof(kBigInt3));
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 12> kExpectedResult = {
@@ -178,15 +193,15 @@ TEST(Asn1, PushIntSigned) {
   const uint8_t kBigInt3[] = {0xff, 0xff, 0xf4,
                               0x48};  // Extra zeroes for testing.
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt1,
-                              sizeof(kBigInt1)),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt2,
-                              sizeof(kBigInt2)),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt3,
-                              sizeof(kBigInt3)),
-            kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt1,
+                    sizeof(kBigInt1));
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt2,
+                    sizeof(kBigInt2));
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer(&state, kAsn1TagNumberInteger, true, kBigInt3,
+                    sizeof(kBigInt3));
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 10> kExpectedResult = {
@@ -208,24 +223,27 @@ TEST(Asn1, PushIntPad) {
   const uint8_t kBigInt4[] = {0x30, 0x47, 0x80, 0x01};
   const uint8_t kBigInt5[] = {0x30, 0x47, 0x80, 0x01, 0x17};
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, false, kBigInt1, sizeof(kBigInt1), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, true, kBigInt1, sizeof(kBigInt1), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, false, kBigInt2, sizeof(kBigInt2), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, true, kBigInt2, sizeof(kBigInt2), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, false, kBigInt3, sizeof(kBigInt3), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, true, kBigInt3, sizeof(kBigInt3), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, false, kBigInt4, sizeof(kBigInt4), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, true, kBigInt4, sizeof(kBigInt4), 4),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_integer_pad(&state, true, kBigInt5, sizeof(kBigInt5), 4),
-            kErrorAsn1PushIntegerPadInvalidArgument);
+  asn1_push_integer_pad(&state, false, kBigInt1, sizeof(kBigInt1), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, true, kBigInt1, sizeof(kBigInt1), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, false, kBigInt2, sizeof(kBigInt2), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, true, kBigInt2, sizeof(kBigInt2), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, false, kBigInt3, sizeof(kBigInt3), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, true, kBigInt3, sizeof(kBigInt3), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, false, kBigInt4, sizeof(kBigInt4), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_integer_pad(&state, true, kBigInt4, sizeof(kBigInt4), 4);
+  EXPECT_EQ(state.error, kErrorOk);
+
+  asn1_push_integer_pad(&state, true, kBigInt5, sizeof(kBigInt5), 4);
+  EXPECT_EQ(state.error, kErrorAsn1PushIntegerPadInvalidArgument);
+  asn1_clear_error(&state);
+
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 32> kExpectedResult = {
@@ -256,15 +274,15 @@ TEST(Asn1, PushStrings) {
   const char kString1[] = "lowRISC";
   const char kString2[] = "OpenTitanAndMore!";
   const char kString3[] = "";
-  EXPECT_EQ(asn1_push_string(&state, kAsn1TagNumberPrintableString, kString1,
-                             strlen(kString1)),
-            kErrorOk);
+  asn1_push_string(&state, kAsn1TagNumberPrintableString, kString1,
+                   strlen(kString1));
+  EXPECT_EQ(state.error, kErrorOk);
   // Cut the second string short on purpose.
-  EXPECT_EQ(asn1_push_string(&state, kAsn1TagNumberUtf8String, kString2, 9),
-            kErrorOk);
-  EXPECT_EQ(asn1_push_string(&state, kAsn1TagNumberOctetString, kString3,
-                             strlen(kString3)),
-            kErrorOk);
+  asn1_push_string(&state, kAsn1TagNumberUtf8String, kString2, 9);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_push_string(&state, kAsn1TagNumberOctetString, kString3,
+                   strlen(kString3));
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   // clang-format off
@@ -288,34 +306,53 @@ TEST(Asn1, PushBitString) {
   asn1_bitstring_t bitstring;
   asn1_tag_t tag;
   // Empty bitstring.
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberBitString), kErrorOk);
-  EXPECT_EQ(asn1_start_bitstring(&state, &bitstring), kErrorOk);
-  EXPECT_EQ(asn1_finish_bitstring(&bitstring), kErrorOk);
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberBitString);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_start_bitstring(&state, &bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_bitstring(&bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorOk);
   // Two trivial bitstrings.
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberBitString), kErrorOk);
-  EXPECT_EQ(asn1_start_bitstring(&state, &bitstring), kErrorOk);
-  EXPECT_EQ(asn1_bitstring_push_bit(&bitstring, true), kErrorOk);
-  EXPECT_EQ(asn1_finish_bitstring(&bitstring), kErrorOk);
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberBitString);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_start_bitstring(&state, &bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_bitstring_push_bit(&bitstring, true);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_bitstring(&bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorOk);
 
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberBitString), kErrorOk);
-  EXPECT_EQ(asn1_start_bitstring(&state, &bitstring), kErrorOk);
-  EXPECT_EQ(asn1_bitstring_push_bit(&bitstring, false), kErrorOk);
-  EXPECT_EQ(asn1_finish_bitstring(&bitstring), kErrorOk);
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberBitString);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_start_bitstring(&state, &bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_bitstring_push_bit(&bitstring, false);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_bitstring(&bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorOk);
   // A longer bitstring.
   const std::array<bool, 12> kBitString = {
       true,  false, true, true,  false, false,
       false, false, true, false, false, true,
   };
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberBitString), kErrorOk);
-  EXPECT_EQ(asn1_start_bitstring(&state, &bitstring), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberBitString);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_start_bitstring(&state, &bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
   for (bool bit : kBitString) {
-    EXPECT_EQ(asn1_bitstring_push_bit(&bitstring, bit), kErrorOk);
+    asn1_bitstring_push_bit(&bitstring, bit);
+    EXPECT_EQ(state.error, kErrorOk);
   }
-  EXPECT_EQ(asn1_finish_bitstring(&bitstring), kErrorOk);
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);
+  asn1_finish_bitstring(&bitstring);
+  EXPECT_EQ(state.error, kErrorOk);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 16> kExpectedResult = {
@@ -338,7 +375,8 @@ TEST(Asn1, PushRawOid) {
   uint8_t buf[30];
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
   const uint8_t kRawOid[] = {0x88, 0x037, 0x03};  // Corresponds to "2.999.3".
-  EXPECT_EQ(asn1_push_oid_raw(&state, kRawOid, sizeof(kRawOid)), kErrorOk);
+  asn1_push_oid_raw(&state, kRawOid, sizeof(kRawOid));
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 5> kExpectedResult = {
@@ -355,9 +393,9 @@ TEST(Asn1, PushHexStrings) {
   uint8_t buf[12];
   EXPECT_EQ(asn1_start(&state, buf, sizeof(buf)), kErrorOk);
   const uint8_t kData[] = {0x01, 0x23, 0xab, 0xef};
-  EXPECT_EQ(asn1_push_hexstring(&state, kAsn1TagNumberPrintableString, kData,
-                                sizeof(kData)),
-            kErrorOk);
+  asn1_push_hexstring(&state, kAsn1TagNumberPrintableString, kData,
+                      sizeof(kData));
+  EXPECT_EQ(state.error, kErrorOk);
   size_t out_size;
   EXPECT_EQ(asn1_finish(&state, &out_size), kErrorOk);
   const std::array<uint8_t, 10> kExpectedResult = {
@@ -388,14 +426,18 @@ TEST(Asn1, TagOverflow) {
   EXPECT_EQ(asn1_start(&state, &buf[0], kBufferSize), kErrorOk);
   // The function will allocate one byte for the tag length.
   asn1_tag_t tag;
-  EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberSequence), kErrorOk);
+  asn1_start_tag(&state, &tag, kAsn1TagNumberSequence);
+  EXPECT_EQ(state.error, kErrorOk);
   // Push 0x100 bytes so that the length tag requires two bytes.
   std::vector<uint8_t> tmp;
   tmp.resize(0x100, 0xff);
-  EXPECT_EQ(asn1_push_bytes(&state, &tmp[0], tmp.size()), kErrorOk);
+  asn1_push_bytes(&state, &tmp[0], tmp.size());
+  EXPECT_EQ(state.error, kErrorOk);
   // At this point, the function will need to move the data forward by one byte
   // so it should hit the buffer size.
-  EXPECT_EQ(asn1_finish_tag(&tag), kErrorAsn1BufferExhausted);
+  asn1_finish_tag(&tag);
+  EXPECT_EQ(state.error, kErrorAsn1BufferExhausted);
+  asn1_clear_error(&state);
   // Make sure that that even though it returned an error, the function did not
   // actually write anything past the end of the buffer.
   EXPECT_EQ(buf[kBufferSize], kPattern);
@@ -408,18 +450,21 @@ TEST(Asn1, TagLengthEncoding) {
   buf.resize(0xfffff);
   std::vector<uint8_t> expected;
 
-#define ADD_BYTES(fill, fill_size, ...)                                        \
-  do {                                                                         \
-    std::vector<uint8_t> tmp(fill_size, fill);                                 \
-    const uint8_t kData[] = {__VA_ARGS__};                                     \
-    expected.push_back(0x30); /* Identifier octet (universal, sequence). */    \
-    expected.insert(expected.end(), kData,                                     \
-                    kData + sizeof(kData)); /* Length encoding */              \
-    expected.insert(expected.end(), tmp.begin(), tmp.end());                   \
-    asn1_tag_t tag;                                                            \
-    EXPECT_EQ(asn1_start_tag(&state, &tag, kAsn1TagNumberSequence), kErrorOk); \
-    EXPECT_EQ(asn1_push_bytes(&state, &tmp[0], tmp.size()), kErrorOk);         \
-    EXPECT_EQ(asn1_finish_tag(&tag), kErrorOk);                                \
+#define ADD_BYTES(fill, fill_size, ...)                                     \
+  do {                                                                      \
+    std::vector<uint8_t> tmp(fill_size, fill);                              \
+    const uint8_t kData[] = {__VA_ARGS__};                                  \
+    expected.push_back(0x30); /* Identifier octet (universal, sequence). */ \
+    expected.insert(expected.end(), kData,                                  \
+                    kData + sizeof(kData)); /* Length encoding */           \
+    expected.insert(expected.end(), tmp.begin(), tmp.end());                \
+    asn1_tag_t tag;                                                         \
+    asn1_start_tag(&state, &tag, kAsn1TagNumberSequence);                   \
+    EXPECT_EQ(state.error, kErrorOk);                                       \
+    asn1_push_bytes(&state, &tmp[0], tmp.size());                           \
+    EXPECT_EQ(state.error, kErrorOk);                                       \
+    asn1_finish_tag(&tag);                                                  \
+    EXPECT_EQ(state.error, kErrorOk);                                       \
   } while (0)
 
   EXPECT_EQ(asn1_start(&state, &buf[0], buf.size()), kErrorOk);
diff --git a/sw/device/silicon_creator/lib/cert/cbor.c b/sw/device/silicon_creator/lib/cert/cbor.c
new file mode 100644
index 0000000000000..62d7ee06fb189
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cbor.c
@@ -0,0 +1,110 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/cert/cbor.h"
+
+#include "sw/device/lib/base/memory.h"
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "CBOR library assumes that the system is little endian.");
+
+typedef enum {
+  Cbor_Type_Uint = 0,
+  Cbor_Type_Sint = 1,
+  Cbor_Type_Bstr = 2,
+  Cbor_Type_Tstr = 3,
+  Cbor_Type_Array = 4,
+  Cbor_Type_Map = 5,
+} cbor_type_t;
+
+typedef enum {
+  Cbor_Arg_Type_U8 = 24,
+  Cbor_Arg_Type_U16 = 25,
+  Cbor_Arg_Type_U32 = 26,
+  Cbor_Arg_Type_U64 = 27,
+} cbor_arg_type_t;
+
+size_t cbor_calc_arg_size(const uint64_t value) {
+  if (value <= 23) {
+    return 0;
+  } else if (value <= 0xff) {
+    return 1;
+  } else if (value <= 0xffff) {
+    return 2;
+  } else if (value <= 0xffffffff) {
+    return 4;
+  } else {
+    return 8;
+  };
+}
+
+static uint8_t cbor_calc_additional_info(const uint64_t value) {
+  if (value <= 23) {
+    return (uint8_t)value;
+  } else if (value <= 0xff) {
+    return Cbor_Arg_Type_U8;
+  } else if (value <= 0xffff) {
+    return Cbor_Arg_Type_U16;
+  } else if (value <= 0xffffffff) {
+    return Cbor_Arg_Type_U32;
+  } else {
+    return Cbor_Arg_Type_U64;
+  };
+}
+
+size_t cbor_calc_int_size(const int64_t value) {
+  if (value < 0)
+    return cbor_calc_arg_size((uint64_t)(-(value + 1)));
+  else
+    return cbor_calc_arg_size((uint64_t)value);
+}
+
+size_t cbor_write_raw_bytes(cbor_out_t *p, const uint8_t *raw,
+                            const size_t raw_size) {
+  if (p) {
+    memcpy(p->start + p->offset, raw, raw_size);
+    p->offset += raw_size;
+  }
+
+  return raw_size;
+}
+
+static size_t cbor_write_type(cbor_out_t *p, cbor_type_t type,
+                              const uint64_t arg) {
+  const size_t sz = cbor_calc_arg_size(arg);
+
+  if (p) {
+    const uint8_t add_info = cbor_calc_additional_info(arg);
+    const uint8_t *parg = (uint8_t *)&arg + sz;
+
+    p->start[p->offset++] = ((uint8_t)(type << 5) | add_info);
+    for (size_t i = 0; i < sz; ++i)
+      p->start[p->offset++] = *(--parg);
+  }
+
+  return 1 + sz;
+}
+
+size_t cbor_write_int(cbor_out_t *p, const int64_t value) {
+  if (value < 0)
+    return cbor_write_type(p, Cbor_Type_Sint, (uint64_t)(-(value + 1)));
+  else
+    return cbor_write_type(p, Cbor_Type_Uint, (uint64_t)value);
+}
+
+size_t cbor_write_bstr_header(cbor_out_t *p, const size_t bstr_size) {
+  return cbor_write_type(p, Cbor_Type_Bstr, bstr_size);
+}
+
+size_t cbor_write_tstr_header(cbor_out_t *p, const size_t tstr_size) {
+  return cbor_write_type(p, Cbor_Type_Tstr, tstr_size);
+}
+
+size_t cbor_write_array_header(cbor_out_t *p, const size_t num_elements) {
+  return cbor_write_type(p, Cbor_Type_Array, num_elements);
+}
+
+size_t cbor_write_map_header(cbor_out_t *p, const size_t num_pairs) {
+  return cbor_write_type(p, Cbor_Type_Map, num_pairs);
+}
diff --git a/sw/device/silicon_creator/lib/cert/cbor.h b/sw/device/silicon_creator/lib/cert/cbor.h
new file mode 100644
index 0000000000000..eb65ae754ef13
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cbor.h
@@ -0,0 +1,139 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_CBOR_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_CBOR_H_
+
+#include "sw/device/silicon_creator/lib/error.h"
+
+struct cbor_out {
+  uint8_t *start;
+  size_t offset;
+};
+
+typedef struct cbor_out cbor_out_t;
+
+/**
+ * Initialize the cbor_out_t.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param buf buffer to be written
+ */
+static inline void cbor_out_init(cbor_out_t *p, void *buf) {
+  p->start = buf;
+  p->offset = 0;
+}
+
+/**
+ * Return the current written size in the cbor_out_t.
+ *
+ * @param[in] p cbor_out structure
+ * @return current written size
+ */
+static inline size_t cbor_out_size(cbor_out_t *p) { return p->offset; }
+
+/**
+ * Calculate the required size of "CBOR argument".
+ *
+ * @param value unsigned argument
+ * @return required size
+ */
+size_t cbor_calc_arg_size(uint64_t value);
+
+/**
+ * Calculate the required size to encode the signed integer as "CBOR argument".
+ *
+ * @param value signed integer
+ * @return required size
+ */
+size_t cbor_calc_int_size(int64_t value);
+
+/**
+ * Write the raw bytes if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param raw pointer to raw bytes
+ * @param raw_size the size of raw bytes
+ * @return size to be written
+ */
+size_t cbor_write_raw_bytes(cbor_out_t *p, const uint8_t *raw, size_t raw_size);
+
+/**
+ * Write the integer if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param value signed integer
+ * @return size to be written
+ */
+size_t cbor_write_int(cbor_out_t *p, int64_t value);
+
+/**
+ * Write the byte string header if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param bstr_size size of the bstr
+ * @return size to be written
+ */
+size_t cbor_write_bstr_header(cbor_out_t *p, size_t bstr_size);
+
+/**
+ * A helper function to write the byte string if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param bstr pointer to the bstr
+ * @param bstr_size size of the bstr
+ * @return size to be written
+ */
+static inline size_t cbor_write_bstr(cbor_out_t *p, const uint8_t *bstr,
+                                     size_t bstr_size) {
+  size_t sz = 0;
+  sz += cbor_write_bstr_header(p, bstr_size);
+  sz += cbor_write_raw_bytes(p, bstr, bstr_size);
+  return sz;
+}
+
+/**
+ * Write the text string header if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param bstr_size size of the tstr
+ * @return size to be written
+ */
+size_t cbor_write_tstr_header(cbor_out_t *p, size_t tstr_size);
+
+/**
+ * A helper function to write the text string if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param tstr pointer to the tstr
+ * @param bstr_size size of the tstr
+ * @return size to be written
+ */
+static inline size_t cbor_write_tstr(cbor_out_t *p, const uint8_t *tstr,
+                                     size_t tstr_size) {
+  size_t sz = 0;
+  sz += cbor_write_tstr_header(p, tstr_size);
+  sz += cbor_write_raw_bytes(p, tstr, tstr_size);
+  return sz;
+}
+
+/**
+ * Write the array header if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param num_elements the number of elements in the array
+ * @return size to be written
+ */
+size_t cbor_write_array_header(cbor_out_t *p, size_t num_elements);
+
+/**
+ * Write the map header if cbor_out is not NULL.
+ *
+ * @param[in,out] p cbor_out structure
+ * @param num_pairs the number of pairs in the map
+ * @return size to be written
+ */
+size_t cbor_write_map_header(cbor_out_t *p, size_t num_pairs);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_CBOR_H_
diff --git a/sw/device/silicon_creator/lib/cert/cdi_0.hjson b/sw/device/silicon_creator/lib/cert/cdi_0.hjson
index c5c99596e7068..3e9ddd9400960 100644
--- a/sw/device/silicon_creator/lib/cert/cdi_0.hjson
+++ b/sw/device/silicon_creator/lib/cert/cdi_0.hjson
@@ -10,43 +10,46 @@
         // (x and y) which are 32-bytes integers.
         owner_intermediate_pub_key_ec_x: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         owner_intermediate_pub_key_ec_y: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         // Owner intermediate public key ID: this is a 20-byte hash
         // derived from the owner intermediate public key.
         owner_intermediate_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // This is the identifier of the public key used to
         // sign this certificate (creator key).
         creator_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Hash of the ROM_EXT (SHA256).
         rom_ext_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // ROM_EXT security version, used to prevent rollback.
         rom_ext_security_version: {
-            type: "integer",
-            size: 4,
+            type: "byte-array",
+            exact-size: 4,
+            tweak-msb: true,
         }
         // Certificate signature: the result of signing with ECDSA
         // are two integers named "r" and "s"
         cert_signature_r: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         cert_signature_s: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
     },
 
@@ -79,12 +82,13 @@
         // https://pigweed.googlesource.com/open-dice/+/refs/heads/main/docs/specification.md#certificate-details
         // The standard extensions are fixed by the specification.
         basic_constraints: { ca: true },
+        key_usage: { cert_sign: true },
         private_extensions: [
             {
                 type: "dice_tcb_info",
                 vendor: "OpenTitan",
                 model: "ROM_EXT",
-                svn: { var: "rom_ext_security_version" },
+                svn: { var: "rom_ext_security_version", convert: "big-endian" },
                 layer: 1,
                 fw_ids: [
                     { hash_algorithm: "sha256", digest: { var: "rom_ext_hash" } },
diff --git a/sw/device/silicon_creator/lib/cert/cdi_1.hjson b/sw/device/silicon_creator/lib/cert/cdi_1.hjson
index 9281aefa5ea46..2062eaf140d8e 100644
--- a/sw/device/silicon_creator/lib/cert/cdi_1.hjson
+++ b/sw/device/silicon_creator/lib/cert/cdi_1.hjson
@@ -10,48 +10,60 @@
         // (x and y) which are 32-bytes integers.
         owner_pub_key_ec_x: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         owner_pub_key_ec_y: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         // Owner public key ID: this is a 20-byte hash
         // derived from the owner public key.
         owner_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // This is the identifier of the public key used to
         // sign this certificate (owner intermediate key).
         owner_intermediate_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Hash of the owner stage firmware (SHA256).
         owner_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // Hash of the owner manifest (SHA256).
         owner_manifest_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
+        },
+        // Hash chain of all previous owners (SHA256).
+        owner_history_hash: {
+            type: "byte-array",
+            exact-size: 32,
         },
         // Owner security version, used to prevent rollback.
         owner_security_version: {
-            type: "integer",
-            size: 4,
+            type: "byte-array",
+            exact-size: 4,
+            tweak-msb: true,
         }
+        // Debug (whether owner FW is signed with PROD or DEV/TEST keys).
+        debug_flag: {
+            type: "boolean",
+        },
         // Certificate signature: the result of signing with ECDSA
         // are two integers named "r" and "s"
         cert_signature_r: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         cert_signature_s: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
     },
 
@@ -84,22 +96,24 @@
         // https://pigweed.googlesource.com/open-dice/+/refs/heads/main/docs/specification.md#certificate-details
         // The standard extensions are fixed by the specification.
         basic_constraints: { ca: true },
+        key_usage: { cert_sign: true },
         private_extensions: [
             {
                 type: "dice_tcb_info",
                 vendor: "OpenTitan",
                 model: "Owner",
-                svn: { var: "owner_security_version" },
+                svn: { var: "owner_security_version", convert: "big-endian" },
                 layer: 2,
                 fw_ids: [
                     { hash_algorithm: "sha256", digest: { var: "owner_hash" } },
                     { hash_algorithm: "sha256", digest: { var: "owner_manifest_hash" } },
+                    { hash_algorithm: "sha256", digest: { var: "owner_history_hash" } },
                 ],
                 flags: {
                     not_configured: false,
                     not_secure: false,
                     recovery: false,
-                    debug: false,
+                    debug: { var: "debug_flag" },
                 }
             },
         ],
diff --git a/sw/device/silicon_creator/lib/cert/cert.c b/sw/device/silicon_creator/lib/cert/cert.c
index 0f2e44b4cfb7c..226658ff7b2e4 100644
--- a/sw/device/silicon_creator/lib/cert/cert.c
+++ b/sw/device/silicon_creator/lib/cert/cert.c
@@ -5,13 +5,12 @@
 #include "sw/device/silicon_creator/lib/cert/cert.h"
 
 #include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/cert/asn1.h"
-#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/lib/base/memory.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
-#include "flash_ctrl_regs.h"  // Generated.
-
-static uint8_t actual_serial_number[kCertX509Asn1SerialNumberSizeInBytes] = {0};
+static_assert(kCertX509Asn1SerialNumberSizeInBytes <= kHmacDigestNumBytes,
+              "The ASN.1 encoded X.509 serial number field should be <= the "
+              "size of a SHA256 digest.");
 
 uint32_t cert_x509_asn1_decode_size_header(const uint8_t *header) {
   if (header[0] != 0x30 || header[1] != 0x82) {
@@ -20,91 +19,33 @@ uint32_t cert_x509_asn1_decode_size_header(const uint8_t *header) {
   return (((uint32_t)header[2]) << 8) + header[3] + 4 /* size of the header */;
 }
 
-rom_error_t cert_x509_asn1_get_size_in_bytes(
-    const flash_ctrl_info_page_t *info_page, uint32_t offset, uint32_t *size) {
-  uint8_t asn1_header[sizeof(uint32_t)];
-  RETURN_IF_ERROR(
-      flash_ctrl_info_read(info_page, offset, /*word_count=*/1, &asn1_header));
-  *size = cert_x509_asn1_decode_size_header(asn1_header);
-  if (*size == 0) {
-    return kErrorCertInvalidSize;
-  }
-  return kErrorOk;
-}
-
-rom_error_t cert_x509_asn1_check_serial_number(const uint8_t *cert_page_buffer,
-                                               size_t offset,
-                                               uint8_t *expected_sn_bytes,
-                                               hardened_bool_t *matches,
-                                               uint32_t *out_cert_size) {
-  if (cert_page_buffer == NULL || expected_sn_bytes == NULL ||
-      matches == NULL || offset >= FLASH_CTRL_PARAM_BYTES_PER_PAGE) {
-    return kErrorCertInvalidArgument;
-  }
+rom_error_t cert_x509_asn1_check_serial_number(const uint8_t *cert, size_t size,
+                                               cert_key_id_t *expected_sn_bytes,
+                                               hardened_bool_t *matches) {
   *matches = kHardenedBoolFalse;
-
-  // Check if the cert is missing by checking if the ASN.1 header cannot be
-  // decoded or the size is not large enough to include a serial number.
-  uint32_t cert_size =
-      cert_x509_asn1_decode_size_header(&cert_page_buffer[offset]);
-  if (out_cert_size != NULL) {
-    *out_cert_size = cert_size;
-  }
-  if (launder32(cert_size) < kCertX509Asn1FirstBytesWithSerialNumber) {
-    HARDENED_CHECK_LT(cert_size, kCertX509Asn1FirstBytesWithSerialNumber);
-    return kErrorOk;
-  }
-
-  // Extract tag and length of serial number field.
-  uint8_t asn1_tag =
-      cert_page_buffer[offset + kCertX509Asn1SerialNumberTagByteOffset];
-  size_t asn1_integer_length = (size_t)
-      cert_page_buffer[offset + kCertX509Asn1SerialNumberLengthByteOffset];
-
-  // Validate tag and length values.
-  // Tag should be 0x2 (the ASN.1 tag for an INTEGER).
-  HARDENED_CHECK_EQ(asn1_tag, kAsn1TagNumberInteger);
-  // Length should be less than or equal to 21 bytes (if the MSb of the
-  // measurement is 1, a zero is added during ASN.1 encoding since the value is
-  // unsigned), as specified in IETF RFC 5280, and hardcoded in the certificate
-  // HJSON specifications.
-  HARDENED_CHECK_LE(asn1_integer_length,
-                    kCertX509Asn1SerialNumberSizeInBytes + 1);
-
-  // If the length is 21 bytes, we skip the first 0 pad byte.
-  size_t sn_bytes_offset =
-      offset + kCertX509Asn1SerialNumberLengthByteOffset + 1;
-  if (launder32(asn1_integer_length) ==
-      kCertX509Asn1SerialNumberSizeInBytes + 1) {
-    HARDENED_CHECK_EQ(asn1_integer_length,
-                      kCertX509Asn1SerialNumberSizeInBytes + 1);
-    sn_bytes_offset++;
-    asn1_integer_length--;
+  if (size < kDiceX509MinSizeBytes) {
+    return kErrorCertInvalidSize;
   }
 
-  // Extract serial number bytes from the certificate into a 20-byte array as
-  // this is the full size of the serial number integer.
-  //
-  // We fill the end of the array to ensure we maintain any prefix zero padding.
-  //
-  // We make sure to clear out the staging buffer before copying the actual cert
-  // bytes in case this function was previously called on a cert that had a
-  // larger serial number than currently present.
-  memset(actual_serial_number, 0, kCertX509Asn1SerialNumberSizeInBytes);
-  memcpy(&actual_serial_number[kCertX509Asn1SerialNumberSizeInBytes -
-                               asn1_integer_length],
-         &cert_page_buffer[sn_bytes_offset], asn1_integer_length);
-
-  // Check the serial number in the certificate matches what was expected.
-  *matches = kHardenedBoolFalse;
-  for (size_t i = 0; i < kCertX509Asn1SerialNumberSizeInBytes; ++i) {
-    if (launder32(actual_serial_number[i]) != expected_sn_bytes[i]) {
-      HARDENED_CHECK_NE(actual_serial_number[i], expected_sn_bytes[i]);
-      return kErrorOk;
-    }
+  // We want the initializer for this to be `{0x02, 0x15, 0x00, ...}`, however
+  // that results in 23 bytes of .rodata, 20 of which we immediately overwrite
+  // by the memcpy below.  Initialization with code results in 16 bytes of
+  // rv32imc code.
+  char expected_serial[kDiceX509SerialSizeBytes];
+  expected_serial[0] = 0x02;
+  expected_serial[1] = 0x15;
+  expected_serial[2] = 0x00;
+
+  // Prepare expected serial number.
+  memcpy(&expected_serial[kDiceX509SerialHeaderSizeBytes], expected_sn_bytes,
+         kCertKeyIdSizeInBytes);
+  expected_serial[kDiceX509SerialHeaderSizeBytes] |= 0x80;  // Tweak MSb.
+
+  // Check if serial number matches.
+  const uint8_t *serial = cert + kDiceX509SerialOffsetBytes;
+  if (memcmp(serial, expected_serial, sizeof(expected_serial)) == 0) {
+    *matches = kHardenedBoolTrue;
   }
 
-  *matches = kHardenedBoolTrue;
-
   return kErrorOk;
 }
diff --git a/sw/device/silicon_creator/lib/cert/cert.h b/sw/device/silicon_creator/lib/cert/cert.h
index 43d71cfe0b854..4baff633151f9 100644
--- a/sw/device/silicon_creator/lib/cert/cert.h
+++ b/sw/device/silicon_creator/lib/cert/cert.h
@@ -7,6 +7,7 @@
 
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
 #ifdef __cplusplus
@@ -29,20 +30,48 @@ enum {
   kCertX509Asn1SerialNumberSizeInBytes = 20,
 
   /**
-   * Size of an X.509 ASN.1 DER encoded certificate up to, and including, the
-   * serial number.
-   *
-   * Offset of ASN.1 tag is 13 plus:
-   *  - 1 byte of tag
-   *  - 1 byte of size
-   *  - (potentially) 1 byte of padding
-   *  - 20 bytes of serial number
+   * Cert key ID size (used for the serial number and auth key ID fields).
    */
-  kCertX509Asn1FirstBytesWithSerialNumber =
-      kCertX509Asn1SerialNumberFieldByteOffset +
-      kCertX509Asn1SerialNumberSizeInBytes + 3,
+  kCertKeyIdSizeInBytes = kCertX509Asn1SerialNumberSizeInBytes,
 };
 
+enum dice_x509_cert_expectations {
+  /**
+   * Size of the SerialNumber region header.
+   * Expects 1B tag + 1B len + 1B 0x00
+   */
+  kDiceX509SerialHeaderSizeBytes = 3,
+
+  /**
+   * Total size in bytes of the SerialNumber region.
+   * Expects header + 20B key id with MSb set.
+   */
+  kDiceX509SerialSizeBytes =
+      kDiceX509SerialHeaderSizeBytes + kCertKeyIdSizeInBytes,
+
+  /**
+   * Offset to the SerialNumber region including header.
+   * This offset is relative to the *begin* of signed cert.
+   */
+  kDiceX509SerialOffsetBytes = 13,
+
+  /**
+   * All valid X509 cert should be longer than this size.
+   */
+  kDiceX509MinSizeBytes = kDiceX509SerialOffsetBytes + kDiceX509SerialSizeBytes,
+};
+
+typedef uint8_t cert_key_id_t[kCertKeyIdSizeInBytes];
+
+/**
+ * DICE certificate format. It supports 2 types currently.
+ * Each DICE implementation declares one of those specifically.
+ */
+typedef enum dice_cert_format {
+  kDiceCertFormatX509TcbInfo = 0,
+  kDiceCertFormatCWTAndroid = 1,
+} dice_cert_format_t;
+
 /**
  * Defines a grouping of certificates onto a single flash info page.
  */
@@ -53,6 +82,11 @@ typedef struct cert_flash_info_layout {
    * extensions.
    */
   bool used;
+  /**
+   * Boolean to indicate if a hash digest needs to be placed at the end of the
+   * page.
+   */
+  bool need_digest;
   /**
    * A name string for the group of certificates (e.g., "DICE").
    */
@@ -65,11 +99,23 @@ typedef struct cert_flash_info_layout {
    * The number of certificates that will be written to the flash info page.
    */
   size_t num_certs;
+
+} cert_flash_info_layout_t;
+
+/**
+ * A set of public key IDs required to generate an X.509 certificate.
+ */
+typedef struct cert_key_id_pair {
   /**
-   * A array of name strings, one for each certificate in the group.
+   * Pointer to SHA256 digest of the public key matching the private key used to
+   * endorse the certificate.
    */
-  char **names;
-} cert_flash_info_layout_t;
+  hmac_digest_t *endorsement;
+  /**
+   * Pointer to SHA256 digest of the public key the certificate is created for.
+   */
+  hmac_digest_t *cert;
+} cert_key_id_pair_t;
 
 /**
  * Decodes the ASN1 size header word to extract the number of bytes contained in
@@ -81,35 +127,23 @@ typedef struct cert_flash_info_layout {
 uint32_t cert_x509_asn1_decode_size_header(const uint8_t *header);
 
 /**
- * Reads the first word of the certificate, which contains it's size, decodes
- * it, and returns the size of the certificate in bytes.
+ * Check if the serial number field from an ASN.1 DER encoded X.509
+ * certificate is expected.
  *
- * @param info_page Pointer to the flash info page the certificate is on.
- * @param offset Byte offset on the flash info page the certificate starts at.
- * @param[out] size The size of the certificate in bytes (including the header).
- * @return Result of the operation.
- */
-rom_error_t cert_x509_asn1_get_size_in_bytes(
-    const flash_ctrl_info_page_t *info_page, uint32_t offset, uint32_t *size);
-
-/**
- * Extracts the serial number field from an ASN.1 DER encoded X.509
- * certificate and checks if it matches what is expected.
+ * This function expects a certificate with a serial number encoded using the
+ * MSb tweak. If the certificate does not have the MSb set for the serial int,
+ * the function may return unmatched.
  *
- * @param cert_page_buffer Pointer to the buffer holding the certificate blob.
- * @param offset Byte offset into the certificate buffer to start reading at.
+ * @param cert Pointer to the buffer holding the certificate blob.
+ * @param size Size of the `cert` buffer in bytes.
  * @param expected_sn_bytes Expected serial number bytes (in big endian order).
  * @param[out] matches True if expected serial number found. False otherwise.
- * @param[out] out_cert_size The certificate size in bytes. Can be NULL if
- *                           caller does not want it returned.
  * @return The result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-rom_error_t cert_x509_asn1_check_serial_number(const uint8_t *cert_page_buffer,
-                                               size_t offset,
-                                               uint8_t *expected_sn_bytes,
-                                               hardened_bool_t *matches,
-                                               uint32_t *out_cert_size);
+rom_error_t cert_x509_asn1_check_serial_number(const uint8_t *cert, size_t size,
+                                               cert_key_id_t *expected_sn_bytes,
+                                               hardened_bool_t *matches);
 
 #ifdef __cplusplus
 }
diff --git a/sw/device/silicon_creator/lib/cert/cert_unittest.cc b/sw/device/silicon_creator/lib/cert/cert_unittest.cc
index 53cd64b15e35d..cca6303d2b351 100644
--- a/sw/device/silicon_creator/lib/cert/cert_unittest.cc
+++ b/sw/device/silicon_creator/lib/cert/cert_unittest.cc
@@ -21,71 +21,75 @@ using ::testing::SetArgPointee;
 class CertTest : public rom_test::RomTest {
  protected:
   uint8_t expected_sn_bytes_[kCertX509Asn1SerialNumberSizeInBytes] = {
-      0x31, 0xF9, 0xE7, 0x35, 0x9F, 0xF2, 0x84, 0x46, 0x99, 0x5B,
-      0xA0, 0x3D, 0xE5, 0xED, 0x7E, 0x32, 0x16, 0x95, 0xF1, 0xD1};
-  uint32_t valid_dice_cert_words_[2048] = {
-      0x1b038230, 0xc2028230, 0x010203a0, 0x31140202, 0x9f35e7f9, 0x994684f2,
-      0xe53da05b, 0x16327eed, 0x30d1f195, 0x2a08060a, 0x3dce4886, 0x30020304,
-      0x300b3123, 0x55030609, 0x02130604, 0x14314b55, 0x03061230, 0x0c030455,
-      0x776f6c0b, 0x43534952, 0x43494320, 0x0f182230, 0x38313032, 0x32323330,
-      0x39353332, 0x185a3935, 0x3939390f, 0x33323139, 0x35333231, 0x5a393539,
-      0x31313330, 0x03062f30, 0x13050455, 0x66313328, 0x33376539, 0x66663935,
-      0x34343832, 0x35393936, 0x33306162, 0x65356564, 0x33653764, 0x39363132,
-      0x64316635, 0x30593031, 0x2a070613, 0x3dce4886, 0x08060102, 0xce48862a,
-      0x0701033d, 0x04004203, 0x8d706f77, 0xe483013c, 0x7712eb41, 0x77324391,
-      0x87759618, 0x637ff07c, 0x94703230, 0x425c9385, 0x4f6201c9, 0x7fb9b232,
-      0x0d382d05, 0x13d677c4, 0xde831f4c, 0x9ef35ad2, 0xf6185161, 0x837a99cd,
-      0xbe0182a3, 0xba018230, 0x03060f30, 0x01131d55, 0x0504ff01, 0x01010330,
-      0x060f30ff, 0x0f1d5503, 0x04ff0101, 0x07030305, 0x22300004, 0x1d550306,
-      0x00010123, 0x16301804, 0x22111480, 0x66554433, 0x11998877, 0x55443322,
-      0x99887766, 0x20302211, 0x1d550306, 0x0001010e, 0x14041604, 0x35e7f931,
-      0x4684f29f, 0x3da05b99, 0x327eede5, 0xd1f19516, 0x4e018230, 0x81670606,
-      0x01040505, 0x04ff0101, 0x303f0182, 0x803b0182, 0x65704f09, 0x7469546e,
-      0x06816e61, 0x69766544, 0x01836563, 0x00018400, 0x1a0182a6, 0x09062d30,
-      0x01488660, 0x02040365, 0x41200401, 0x3cb6bbc3, 0x91b82cff, 0xf1dcba04,
-      0x19d4e461, 0x25190a1a, 0x916b6459, 0xda0eab05, 0x3078bf51, 0x6009062d,
-      0x65014886, 0x01020403, 0xbfac2004, 0x7e06c2a9, 0xf9cf1aca, 0x342a27eb,
-      0x80bc0aa7, 0x88c75300, 0x4e952a62, 0x47bcfe0e, 0x2d309c7d, 0x86600906,
-      0x03650148, 0x04010204, 0x2930f520, 0x06a7b225, 0xc22d94ad, 0x39f4fed4,
-      0xf8db2f89, 0x9e813a3e, 0x75ea0986, 0x45ed09b7, 0x062d30a4, 0x48866009,
-      0x04036501, 0x20040102, 0xf57adf1f, 0x3ceaa4a5, 0x94bce43f, 0xe027c121,
-      0x33fc069d, 0x7487f3ae, 0xbf78e978, 0x2fe19e76, 0x09062d30, 0x01488660,
-      0x02040365, 0x19200401, 0xc958c0e1, 0xb943daae, 0x5f7c542d, 0xf6c48ba6,
-      0xeec1e294, 0x5b1a519d, 0xdc647a3b, 0x3037ef41, 0x6009062d, 0x65014886,
-      0x01020403, 0x7d032004, 0xa29e2856, 0x302c577f, 0x8c90c942, 0x8b915a1d,
-      0xbe878236, 0xe1e84c27, 0xe847c52d, 0x0287918f, 0x0a300004, 0x862a0806,
-      0x043dce48, 0x47030203, 0x02443000, 0xd2bb3520, 0xbc8d82c0, 0xbf404f45,
-      0x384855f2, 0x8ba5b0c8, 0x0698f275, 0x37d827c1, 0x3bee0f7d, 0x1d200289,
-      0x533fe16b, 0xfa62b6b4, 0x46af0351, 0x3e262772, 0xe9d81a0b, 0x53859bf3,
-      0x990281cf, 0x007897f8};
-  uint8_t *valid_dice_cert_bytes_ = (uint8_t *)valid_dice_cert_words_;
+      0x01, 0xB4, 0x17, 0x80, 0x5F, 0x8B, 0x74, 0xAD, 0xEC, 0xE7,
+      0xE9, 0xAC, 0x37, 0xCA, 0xBD, 0x33, 0x4C, 0xAA, 0xEB, 0x3D,
+  };
+  // CDI 0 hexdump from provisioning e2e FPGA test.
+  // $ bazel test --test_output=streamed --cache_test_results=no \
+  //     //sw/host/provisioning/orchestrator/tests:e2e_emulation_cw340_test
+  uint8_t valid_dice_cert_bytes_[2048] = {
+      0x30, 0x82, 0x02, 0x3d, 0x30, 0x82, 0x01, 0xe3, 0xa0, 0x03, 0x02, 0x01,
+      0x02, 0x02, 0x15, 0x00, 0x81, 0xb4, 0x17, 0x80, 0x5f, 0x8b, 0x74, 0xad,
+      0xec, 0xe7, 0xe9, 0xac, 0x37, 0xca, 0xbd, 0x33, 0x4c, 0xaa, 0xeb, 0x3d,
+      0x30, 0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x04, 0x03, 0x02,
+      0x30, 0x33, 0x31, 0x31, 0x30, 0x2f, 0x06, 0x03, 0x55, 0x04, 0x05, 0x13,
+      0x28, 0x38, 0x66, 0x61, 0x31, 0x34, 0x33, 0x36, 0x35, 0x62, 0x62, 0x32,
+      0x65, 0x30, 0x36, 0x62, 0x38, 0x38, 0x39, 0x35, 0x38, 0x66, 0x32, 0x65,
+      0x61, 0x38, 0x36, 0x65, 0x66, 0x65, 0x64, 0x34, 0x30, 0x65, 0x32, 0x34,
+      0x32, 0x64, 0x63, 0x33, 0x62, 0x30, 0x22, 0x18, 0x0f, 0x32, 0x30, 0x31,
+      0x38, 0x30, 0x33, 0x32, 0x32, 0x32, 0x33, 0x35, 0x39, 0x35, 0x39, 0x5a,
+      0x18, 0x0f, 0x39, 0x39, 0x39, 0x39, 0x31, 0x32, 0x33, 0x31, 0x32, 0x33,
+      0x35, 0x39, 0x35, 0x39, 0x5a, 0x30, 0x33, 0x31, 0x31, 0x30, 0x2f, 0x06,
+      0x03, 0x55, 0x04, 0x05, 0x13, 0x28, 0x38, 0x31, 0x62, 0x34, 0x31, 0x37,
+      0x38, 0x30, 0x35, 0x66, 0x38, 0x62, 0x37, 0x34, 0x61, 0x64, 0x65, 0x63,
+      0x65, 0x37, 0x65, 0x39, 0x61, 0x63, 0x33, 0x37, 0x63, 0x61, 0x62, 0x64,
+      0x33, 0x33, 0x34, 0x63, 0x61, 0x61, 0x65, 0x62, 0x33, 0x64, 0x30, 0x59,
+      0x30, 0x13, 0x06, 0x07, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x02, 0x01, 0x06,
+      0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x03, 0x01, 0x07, 0x03, 0x42, 0x00,
+      0x04, 0x7e, 0x6b, 0x24, 0x43, 0x1b, 0x04, 0x1d, 0x98, 0xdb, 0xb8, 0xa0,
+      0x53, 0x91, 0x6a, 0xbf, 0xaa, 0xe1, 0x62, 0x33, 0xf9, 0x6e, 0xee, 0x0c,
+      0x75, 0x8f, 0x0b, 0x55, 0x98, 0xd6, 0x4f, 0x3f, 0x6e, 0x88, 0xfd, 0xdf,
+      0xe7, 0x98, 0x81, 0x03, 0x91, 0x04, 0xd5, 0xa9, 0x09, 0xaf, 0xeb, 0x75,
+      0x2a, 0x0c, 0x19, 0x7c, 0x50, 0x02, 0x17, 0xd7, 0x59, 0xf8, 0xfa, 0xcb,
+      0x2d, 0xa8, 0x77, 0xe8, 0x33, 0xa3, 0x81, 0xcf, 0x30, 0x81, 0xcc, 0x30,
+      0x0f, 0x06, 0x03, 0x55, 0x1d, 0x13, 0x01, 0x01, 0xff, 0x04, 0x05, 0x30,
+      0x03, 0x01, 0x01, 0xff, 0x30, 0x0f, 0x06, 0x03, 0x55, 0x1d, 0x0f, 0x01,
+      0x01, 0xff, 0x04, 0x05, 0x03, 0x03, 0x07, 0x04, 0x00, 0x30, 0x22, 0x06,
+      0x03, 0x55, 0x1d, 0x23, 0x01, 0x01, 0x00, 0x04, 0x18, 0x30, 0x16, 0x80,
+      0x14, 0x8f, 0xa1, 0x43, 0x65, 0xbb, 0x2e, 0x06, 0xb8, 0x89, 0x58, 0xf2,
+      0xea, 0x86, 0xef, 0xed, 0x40, 0xe2, 0x42, 0xdc, 0x3b, 0x30, 0x20, 0x06,
+      0x03, 0x55, 0x1d, 0x0e, 0x01, 0x01, 0x00, 0x04, 0x16, 0x04, 0x14, 0x81,
+      0xb4, 0x17, 0x80, 0x5f, 0x8b, 0x74, 0xad, 0xec, 0xe7, 0xe9, 0xac, 0x37,
+      0xca, 0xbd, 0x33, 0x4c, 0xaa, 0xeb, 0x3d, 0x30, 0x62, 0x06, 0x06, 0x67,
+      0x81, 0x05, 0x05, 0x04, 0x01, 0x01, 0x01, 0xff, 0x04, 0x55, 0x30, 0x53,
+      0x80, 0x09, 0x4f, 0x70, 0x65, 0x6e, 0x54, 0x69, 0x74, 0x61, 0x6e, 0x81,
+      0x07, 0x52, 0x4f, 0x4d, 0x5f, 0x45, 0x58, 0x54, 0x83, 0x05, 0x00, 0x80,
+      0x00, 0x00, 0x00, 0x84, 0x01, 0x01, 0xa6, 0x2f, 0x30, 0x2d, 0x06, 0x09,
+      0x60, 0x86, 0x48, 0x01, 0x65, 0x03, 0x04, 0x02, 0x01, 0x04, 0x20, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x87, 0x02, 0x04, 0x00, 0x30,
+      0x0a, 0x06, 0x08, 0x2a, 0x86, 0x48, 0xce, 0x3d, 0x04, 0x03, 0x02, 0x03,
+      0x48, 0x00, 0x30, 0x45, 0x02, 0x20, 0x14, 0x95, 0x17, 0xb9, 0xc0, 0xa8,
+      0x24, 0x9d, 0x26, 0x4a, 0x71, 0xb9, 0xed, 0x4a, 0x87, 0x99, 0x25, 0x72,
+      0xc6, 0x31, 0xf8, 0xce, 0x3e, 0x6b, 0x98, 0x15, 0xec, 0xd7, 0xca, 0x65,
+      0xb9, 0x1d, 0x02, 0x21, 0x00, 0x91, 0x10, 0xcd, 0xdf, 0xe3, 0xa8, 0x46,
+      0xc2, 0xaf, 0x1c, 0x30, 0xc5, 0x4c, 0x99, 0x6d, 0xae, 0xb8, 0xc8, 0x19,
+      0x15, 0x10, 0x3f, 0xe0, 0x64, 0xf0, 0x72, 0x7d, 0x33, 0x93, 0x51, 0x0f,
+      0x5d,
+  };
   uint32_t expected_cert_size_ =
       ((valid_dice_cert_bytes_[2] << 8) | (valid_dice_cert_bytes_[3])) + 4;
 };
 
-TEST_F(CertTest, InvalidArgs) {
-  hardened_bool_t matches = kHardenedBoolFalse;
-  // Invalid cert page buffer.
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(nullptr, 0, expected_sn_bytes_,
-                                               &matches, nullptr),
-            kErrorCertInvalidArgument);
-
-  // Invalid expected serial number.
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                               nullptr, &matches, nullptr),
-            kErrorCertInvalidArgument);
+TEST_F(CertTest, DecodeSize) {
+  EXPECT_EQ(cert_x509_asn1_decode_size_header(valid_dice_cert_bytes_),
+            expected_cert_size_);
+}
 
-  // Invalid match flag pointer.
-  EXPECT_EQ(
-      cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                         expected_sn_bytes_, nullptr, nullptr),
-      kErrorCertInvalidArgument);
-
-  // Invalid buffer offset.
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(
-                valid_dice_cert_bytes_, FLASH_CTRL_PARAM_BYTES_PER_PAGE,
-                expected_sn_bytes_, &matches, nullptr),
-            kErrorCertInvalidArgument);
+TEST_F(CertTest, DecodeSizeFailed) {
+  uint8_t zero_cert_bytes[32] = {0};
+  EXPECT_EQ(cert_x509_asn1_decode_size_header(zero_cert_bytes), 0);
 }
 
 /**
@@ -94,14 +98,14 @@ TEST_F(CertTest, InvalidArgs) {
  */
 TEST_F(CertTest, UnprovisionedCert) {
   hardened_bool_t matches = kHardenedBoolFalse;
-  uint32_t unprovisioned_cert_bytes = UINT32_MAX;
-  uint32_t cert_size;
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(
-                (uint8_t *)&unprovisioned_cert_bytes, 0, expected_sn_bytes_,
-                &matches, &cert_size),
-            kErrorOk);
+  uint8_t unprovisioned_cert_bytes[1024];
+  memset(unprovisioned_cert_bytes, 0xFF, sizeof(unprovisioned_cert_bytes));
+  EXPECT_EQ(
+      cert_x509_asn1_check_serial_number((uint8_t *)&unprovisioned_cert_bytes,
+                                         sizeof(unprovisioned_cert_bytes),
+                                         &expected_sn_bytes_, &matches),
+      kErrorOk);
   EXPECT_EQ(matches, kHardenedBoolFalse);
-  EXPECT_EQ(cert_size, 0);
 }
 
 TEST_F(CertTest, BadSerialNumberTag) {
@@ -109,10 +113,11 @@ TEST_F(CertTest, BadSerialNumberTag) {
   uint8_t backup =
       valid_dice_cert_bytes_[kCertX509Asn1SerialNumberTagByteOffset];
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberTagByteOffset] = 0;
-  EXPECT_DEATH(
-      {OT_DISCARD(cert_x509_asn1_check_serial_number(
-          valid_dice_cert_bytes_, 0, expected_sn_bytes_, &matches, nullptr))},
-      "");
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               sizeof(valid_dice_cert_bytes_),
+                                               &expected_sn_bytes_, &matches),
+            kErrorOk);
+  EXPECT_EQ(matches, kHardenedBoolFalse);
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberTagByteOffset] = backup;
 }
 
@@ -121,79 +126,57 @@ TEST_F(CertTest, BadSerialNumberLength) {
   uint8_t backup =
       valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset];
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] = 22;
-  EXPECT_DEATH(
-      {OT_DISCARD(cert_x509_asn1_check_serial_number(
-          valid_dice_cert_bytes_, 0, expected_sn_bytes_, &matches, nullptr))},
-      "");
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               sizeof(valid_dice_cert_bytes_),
+                                               &expected_sn_bytes_, &matches),
+            kErrorOk);
+  EXPECT_EQ(matches, kHardenedBoolFalse);
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] = backup;
 }
 
-TEST_F(CertTest, CertOutdated) {
+TEST_F(CertTest, BufferTooSmall) {
   hardened_bool_t matches = kHardenedBoolFalse;
-  uint32_t cert_size;
-  uint8_t empty_sn[kCertX509Asn1SerialNumberSizeInBytes] = {0};
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                               empty_sn, &matches, &cert_size),
-            kErrorOk);
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               /*size=*/1, &expected_sn_bytes_,
+                                               &matches),
+            kErrorCertInvalidSize);
   EXPECT_EQ(matches, kHardenedBoolFalse);
-  EXPECT_EQ(cert_size, expected_cert_size_);
 }
 
-TEST_F(CertTest, CertOutdatedSerialNumberSizeMismatch) {
+TEST_F(CertTest, CertOutdated) {
   hardened_bool_t matches = kHardenedBoolFalse;
-  uint8_t old_length =
-      valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset];
-  valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] = 19;
-  EXPECT_EQ(
-      cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                         expected_sn_bytes_, &matches, nullptr),
-      kErrorOk);
+  uint8_t empty_sn[kCertX509Asn1SerialNumberSizeInBytes] = {0};
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               sizeof(valid_dice_cert_bytes_),
+                                               &empty_sn, &matches),
+            kErrorOk);
   EXPECT_EQ(matches, kHardenedBoolFalse);
-  valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] =
-      old_length;
 }
 
-TEST_F(CertTest, CertValidShortSerialNumber) {
+TEST_F(CertTest, CertOutdatedSerialNumberSizeMismatch) {
   hardened_bool_t matches = kHardenedBoolFalse;
   uint8_t old_length =
       valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset];
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] = 19;
-  uint8_t sn_bytes[kCertX509Asn1SerialNumberSizeInBytes] = {0};
-  memcpy(&sn_bytes[1], expected_sn_bytes_,
-         kCertX509Asn1SerialNumberSizeInBytes - 1);
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                               sn_bytes, &matches, nullptr),
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               sizeof(valid_dice_cert_bytes_),
+                                               &expected_sn_bytes_, &matches),
             kErrorOk);
-  EXPECT_EQ(matches, kHardenedBoolTrue);
+  EXPECT_EQ(matches, kHardenedBoolFalse);
   valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] =
       old_length;
 }
 
-TEST_F(CertTest, CertValidFullSerialNumberThenShortSerialNumber) {
+TEST_F(CertTest, CertValidFullSerialNumber) {
   hardened_bool_t matches = kHardenedBoolFalse;
 
   // Full length serial number.
   matches = kHardenedBoolFalse;
-  EXPECT_EQ(
-      cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                         expected_sn_bytes_, &matches, nullptr),
-      kErrorOk);
-  EXPECT_EQ(matches, kHardenedBoolTrue);
-
-  // Short length serial number.
-  matches = kHardenedBoolFalse;
-  uint8_t old_length =
-      valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset];
-  valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] = 19;
-  uint8_t sn_bytes[kCertX509Asn1SerialNumberSizeInBytes] = {0};
-  memcpy(&sn_bytes[1], expected_sn_bytes_,
-         kCertX509Asn1SerialNumberSizeInBytes - 1);
-  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_, 0,
-                                               sn_bytes, &matches, nullptr),
+  EXPECT_EQ(cert_x509_asn1_check_serial_number(valid_dice_cert_bytes_,
+                                               sizeof(valid_dice_cert_bytes_),
+                                               &expected_sn_bytes_, &matches),
             kErrorOk);
   EXPECT_EQ(matches, kHardenedBoolTrue);
-  valid_dice_cert_bytes_[kCertX509Asn1SerialNumberLengthByteOffset] =
-      old_length;
 }
 
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/cert/cwt_cose_key.hjson b/sw/device/silicon_creator/lib/cert/cwt_cose_key.hjson
new file mode 100644
index 0000000000000..176a1337bdab3
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cwt_cose_key.hjson
@@ -0,0 +1,74 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+    name: "cwt_cose_key",
+
+    // RFC9052: https://datatracker.ietf.org/doc/html/rfc9052
+    // RFC9053: https://datatracker.ietf.org/doc/html/rfc9053
+
+    variables: {
+        // ECC P256 public key: this is an EC point on
+        // the prime256v1 curve so it has two components
+        // (x and y) which are 32-bytes integers.
+        pub_key_ec_x: {
+            type: "byte-array",
+            exact-size: 32,
+        },
+        pub_key_ec_y: {
+            type: "byte-array",
+            exact-size: 32,
+        },
+    },
+
+    constants: {
+        key_type_label: {
+            type: "integer",
+            value: 1
+        },
+        key_type_value: {
+            type: "integer",
+            // RFC9052 Section 7.1 COSE Key Common Parameters
+            // EC2
+            value: 2
+        },
+        alg_type_label: {
+            type: "integer",
+            value: 3
+        },
+        alg_type_value: {
+            type: "integer",
+            // RFC9053 Section 2.1 ECDSA
+            // ECDSA w/ SHA-256
+            value: -7
+        },
+        curve_type_label: {
+            type: "integer",
+            value: -1
+        },
+        curve_type_value: {
+            type: "integer",
+            // RFC9053 Section 7.1 Elliptic Curve Keys
+            // P-256
+            value: 1
+        },
+        key_x_label: {
+            type: "integer",
+            value: -2
+        },
+        key_y_label: {
+            type: "integer",
+            value: -3
+        },
+    },
+
+    // Reference: https://cs.android.com/android/platform/superproject/main/+/main:hardware/interfaces/security/rkp/aidl/android/hardware/security/keymint/generateCertificateRequestV2.cddl
+    // PubKeyECDSA256
+    structure: {
+        key_type_label: key_type_value
+        alg_type_label: alg_type_value
+        curve_type_label: curve_type_value
+        key_x_label: pub_key_ec_x
+        key_y_label: pub_key_ec_y
+    }
+}
diff --git a/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry.hjson b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry.hjson
new file mode 100644
index 0000000000000..d4d48247aea85
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry.hjson
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+    name: "cwt_dice_chain_entry",
+
+    // RFC9052: https://datatracker.ietf.org/doc/html/rfc9052
+    // RFC9053: https://datatracker.ietf.org/doc/html/rfc9053
+
+    variables: {
+        payload: {
+            type: "byte-array",
+            // kCwtDiceChainEntryPayloadMaxVariableSizeBytes from bazel-bin/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.h
+            // generated by `./bazelisk.sh build //sw/device/silicon_creator/lib/cert:cwt_dice_chain_entry_payload_template`
+            max-size: 437
+        },
+        signature: {
+            type: "byte-array",
+            exact-size: 64
+        },
+    },
+
+    constants: {
+        one_label: {
+            type: "integer",
+            value: 1
+        },
+        alg_type_value: {
+            type: "integer",
+            // RFC9053 Section 2.1 ECDSA
+            // ECDSA w/ SHA-256
+            value: -7
+        },
+    },
+
+    // Reference: https://cs.android.com/android/platform/superproject/main/+/main:hardware/interfaces/security/rkp/aidl/android/hardware/security/keymint/generateCertificateRequestV2.cddl
+    // DiceChainEntry
+    structure: [
+        // Protected header.
+        {
+            "cbor-byte-array": {
+                one_label: alg_type_value
+            }
+        },
+        // Unprotected header (empty).
+        {},
+        payload
+        signature
+    ]
+}
diff --git a/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_input.hjson b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_input.hjson
new file mode 100644
index 0000000000000..bd556a62255c0
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_input.hjson
@@ -0,0 +1,54 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+    name: "cwt_dice_chain_entry_input",
+
+    // RFC9052: https://datatracker.ietf.org/doc/html/rfc9052
+    // RFC9053: https://datatracker.ietf.org/doc/html/rfc9053
+
+    variables: {
+        payload: {
+            type: "byte-array",
+            // kCwtDiceChainEntryPayloadMaxVariableSizeBytes from bazel-bin/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.h
+            // generated by `./bazelisk.sh build //sw/device/silicon_creator/lib/cert:cwt_dice_chain_entry_payload_template`
+            max-size: 437
+        },
+    },
+
+    constants: {
+        context: {
+            type: "string",
+            // RFC9052 Section 4.4 Signing and Verification Process
+            value: "Signature1"
+        },
+        one_label: {
+            type: "integer",
+            value: 1
+        },
+        alg_type_value: {
+            type: "integer",
+            // RFC9053 Section 2.1 ECDSA
+            // ECDSA w/ SHA-256
+            value: -7
+        },
+        external_aad: {
+            type: "byte-array",
+            value: ""
+        },
+    },
+
+    // Reference: https://cs.android.com/android/platform/superproject/main/+/main:hardware/interfaces/security/rkp/aidl/android/hardware/security/keymint/generateCertificateRequestV2.cddl
+    // DiceChainEntryInput
+    structure: [
+        context
+        // Protected body.
+        {
+            "cbor-byte-array": {
+                one_label: alg_type_value
+            }
+        },
+        external_aad
+        payload
+    ]
+}
diff --git a/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.hjson b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.hjson
new file mode 100644
index 0000000000000..2be597227b60d
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.hjson
@@ -0,0 +1,107 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+    name: "cwt_dice_chain_entry_payload",
+
+    variables: {
+        issuer: {
+            type: "string",
+            max-size: 64,
+        },
+        subject: {
+            type: "string",
+            max-size: 64,
+        },
+        code_hash: {
+            type: "byte-array",
+            exact-size: 32,
+        },
+        config_hash: {
+            type: "byte-array",
+            exact-size: 32,
+        },
+        config_desc: {
+            type: "byte-array",
+            max-size: 64,
+        },
+        auth_hash: {
+            type: "byte-array",
+            exact-size: 32,
+        },
+        mode: {
+            type: "byte-array",
+            exact-size: 1,
+        },
+        subject_pk: {
+            type: "byte-array",
+            exact-size: 77,
+        },
+        profile_name: {
+            type: "string",
+            exact-size: 10,
+        },
+    },
+
+    constants: {
+        issuer_label: {
+            type: "integer",
+            value: 1
+        },
+        subject_label: {
+            type: "integer",
+            value: 2
+        },
+        profile_name_label: {
+            type: "integer",
+            value: -4670554
+        },
+        subject_pk_label: {
+            type: "integer",
+            value: -4670552
+        },
+        key_usage_label: {
+            type: "integer",
+            value: -4670553
+        },
+        key_usage_value: {
+            type: "byte-array",
+            value: "20"
+        },
+        code_hash_label: {
+            type: "integer",
+            value: -4670545
+        },
+        config_hash_label: {
+            type: "integer",
+            value: -4670547
+        },
+        config_desc_label: {
+            type: "integer",
+            value: -4670548
+        },
+        auth_hash_label: {
+            type: "integer",
+            value: -4670549
+        },
+        mode_label: {
+            type: "integer",
+            value: -4670551
+        },
+    },
+
+    // Reference: https://cs.android.com/android/platform/superproject/main/+/main:hardware/interfaces/security/rkp/aidl/android/hardware/security/keymint/generateCertificateRequestV2.cddl
+    // DiceChainEntryPayload
+    structure: {
+        issuer_label: issuer
+        subject_label: subject
+        code_hash_label: code_hash
+        config_hash_label: config_hash
+        config_desc_label: config_desc
+        auth_hash_label: auth_hash
+        mode_label: mode
+        subject_pk_label: subject_pk
+        key_usage_label: key_usage_value
+        profile_name_label: profile_name
+    }
+}
diff --git a/sw/device/silicon_creator/lib/cert/dice.c b/sw/device/silicon_creator/lib/cert/dice.c
new file mode 100644
index 0000000000000..6b22831094225
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice.c
@@ -0,0 +1,226 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/cert/dice.h"
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/cert/cdi_0.h"  // Generated.
+#include "sw/device/silicon_creator/lib/cert/cdi_1.h"  // Generated.
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/cert/dice_keys.h"
+#include "sw/device/silicon_creator/lib/cert/template.h"
+#include "sw/device/silicon_creator/lib/cert/uds.h"  // Generated.
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+#include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
+
+static ecdsa_p256_signature_t curr_tbs_signature = {.r = {0}, .s = {0}};
+
+static uint8_t cdi_0_tbs_buffer[kCdi0MaxTbsSizeBytes];
+static uint8_t cdi_1_tbs_buffer[kCdi1MaxTbsSizeBytes];
+
+const dice_cert_format_t kDiceCertFormat = kDiceCertFormatX509TcbInfo;
+
+static_assert(kDiceMeasurementSizeInBytes == 32,
+              "The DICE attestation measurement size should equal the size of "
+              "the keymgr binding registers.");
+
+/**
+ * Returns true if debug (JTAG) access is exposed in the current LC state.
+ */
+static bool is_debug_exposed(void) {
+  lifecycle_state_t lc_state = lifecycle_state_get();
+  if (lc_state == kLcStateProd || lc_state == kLcStateProdEnd) {
+    return false;
+  }
+  return true;
+}
+
+/**
+ * Returns true if the OwnerSw is booting outside of prod ladder.
+ */
+static bool get_debug_mode_cdi1(owner_app_domain_t key_domain) {
+  if (launder32(key_domain) != kOwnerAppDomainProd) {
+    return true;
+  }
+  HARDENED_CHECK_EQ(key_domain, kOwnerAppDomainProd);
+  return false;
+}
+
+rom_error_t dice_uds_tbs_cert_build(
+    hmac_digest_t *otp_creator_sw_cfg_measurement,
+    hmac_digest_t *otp_owner_sw_cfg_measurement,
+    hmac_digest_t *otp_rot_creator_auth_codesign_measurement,
+    hmac_digest_t *otp_rot_creator_auth_state_measurement,
+    cert_key_id_pair_t *key_ids, ecdsa_p256_public_key_t *uds_pubkey,
+    uint8_t *tbs_cert, size_t *tbs_cert_size) {
+  // Generate the TBS certificate.
+  uds_tbs_values_t uds_tbs_params = {0};
+
+  TEMPLATE_SET(uds_tbs_params, Uds, OtpCreatorSwCfgHash,
+               otp_creator_sw_cfg_measurement->digest);
+  TEMPLATE_SET(uds_tbs_params, Uds, OtpOwnerSwCfgHash,
+               otp_owner_sw_cfg_measurement->digest);
+  TEMPLATE_SET(uds_tbs_params, Uds, OtpRotCreatorAuthCodesignHash,
+               otp_rot_creator_auth_codesign_measurement->digest);
+  TEMPLATE_SET(uds_tbs_params, Uds, OtpRotCreatorAuthStateHash,
+               otp_rot_creator_auth_state_measurement->digest);
+  TEMPLATE_SET(uds_tbs_params, Uds, DebugFlag, is_debug_exposed());
+  TEMPLATE_SET(uds_tbs_params, Uds, CreatorPubKeyEcX, uds_pubkey->x);
+  TEMPLATE_SET(uds_tbs_params, Uds, CreatorPubKeyEcY, uds_pubkey->y);
+
+  TEMPLATE_SET_TRUNCATED(uds_tbs_params, Uds, CreatorPubKeyId,
+                         key_ids->cert->digest, kCertKeyIdSizeInBytes);
+  TEMPLATE_SET_TRUNCATED(uds_tbs_params, Uds, AuthKeyKeyId,
+                         key_ids->endorsement->digest, kCertKeyIdSizeInBytes);
+
+  HARDENED_RETURN_IF_ERROR(
+      uds_build_tbs(&uds_tbs_params, tbs_cert, tbs_cert_size));
+
+  return kErrorOk;
+}
+
+rom_error_t dice_cdi_0_cert_build(hmac_digest_t *rom_ext_measurement,
+                                  uint32_t rom_ext_security_version,
+                                  cert_key_id_pair_t *key_ids,
+                                  ecdsa_p256_public_key_t *cdi_0_pubkey,
+                                  uint8_t *cert, size_t *cert_size) {
+  hmac_digest_t rom_ext_hash = *rom_ext_measurement;
+  util_reverse_bytes(&rom_ext_hash, sizeof(rom_ext_hash));
+
+  uint32_t rom_ext_security_version_be =
+      __builtin_bswap32(rom_ext_security_version);
+
+  // Generate the TBS certificate.
+  cdi_0_tbs_values_t cdi_0_tbs_params = {0};
+
+  TEMPLATE_SET(cdi_0_tbs_params, Cdi0, RomExtHash, rom_ext_hash.digest);
+  TEMPLATE_SET(cdi_0_tbs_params, Cdi0, RomExtSecurityVersion,
+               &rom_ext_security_version_be);
+  TEMPLATE_SET(cdi_0_tbs_params, Cdi0, OwnerIntermediatePubKeyEcX,
+               cdi_0_pubkey->x);
+  TEMPLATE_SET(cdi_0_tbs_params, Cdi0, OwnerIntermediatePubKeyEcY,
+               cdi_0_pubkey->y);
+
+  TEMPLATE_SET_TRUNCATED(cdi_0_tbs_params, Cdi0, OwnerIntermediatePubKeyId,
+                         key_ids->cert->digest, kCertKeyIdSizeInBytes);
+  TEMPLATE_SET_TRUNCATED(cdi_0_tbs_params, Cdi0, CreatorPubKeyId,
+                         key_ids->endorsement->digest, kCertKeyIdSizeInBytes);
+
+  size_t tbs_size = kCdi0MaxTbsSizeBytes;
+  HARDENED_RETURN_IF_ERROR(
+      cdi_0_build_tbs(&cdi_0_tbs_params, cdi_0_tbs_buffer, &tbs_size));
+
+  // Sign the TBS and generate the certificate.
+  hmac_digest_t tbs_digest;
+  hmac_sha256(cdi_0_tbs_buffer, tbs_size, &tbs_digest);
+  HARDENED_RETURN_IF_ERROR(
+      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
+  util_p256_signature_le_to_be_convert(curr_tbs_signature.r,
+                                       curr_tbs_signature.s);
+
+  cdi_0_sig_values_t cdi_0_params = {0};
+  TEMPLATE_SET(cdi_0_params, Cdi0, Tbs, cdi_0_tbs_buffer);
+  // Asserts that tbs is fixed-length, so we don't need to set tbs_size.
+  TEMPLATE_ASSERT_FIXED_LENGTH(Cdi0, Tbs);
+  TEMPLATE_SET(cdi_0_params, Cdi0, CertSignatureR, curr_tbs_signature.r);
+  TEMPLATE_SET(cdi_0_params, Cdi0, CertSignatureS, curr_tbs_signature.s);
+
+  HARDENED_RETURN_IF_ERROR(cdi_0_build_cert(&cdi_0_params, cert, cert_size));
+
+  // Save the CDI_0 private key to OTBN DMEM so it can endorse the next stage.
+  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+      kDiceKeyCdi0.keygen_seed_idx, kDiceKeyCdi0.type,
+      *kDiceKeyCdi0.keymgr_diversifier));
+
+  return kErrorOk;
+}
+
+rom_error_t dice_cdi_1_cert_build(
+    hmac_digest_t *owner_measurement, hmac_digest_t *owner_manifest_measurement,
+    hmac_digest_t *owner_history_hash, uint32_t owner_security_version,
+    owner_app_domain_t key_domain, cert_key_id_pair_t *key_ids,
+    ecdsa_p256_public_key_t *cdi_1_pubkey, uint8_t *cert, size_t *cert_size) {
+  hmac_digest_t owner_hash = *owner_measurement;
+  hmac_digest_t owner_manifest_hash = *owner_manifest_measurement;
+  util_reverse_bytes(&owner_hash, sizeof(owner_hash));
+  util_reverse_bytes(&owner_manifest_hash, sizeof(owner_manifest_hash));
+
+  uint32_t owner_security_version_be =
+      __builtin_bswap32(owner_security_version);
+
+  // Generate the TBS certificate.
+  cdi_1_tbs_values_t cdi_1_tbs_params = {0};
+
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerHash, owner_hash.digest);
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerManifestHash,
+               owner_manifest_hash.digest);
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerHistoryHash,
+               owner_history_hash->digest);
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerSecurityVersion,
+               &owner_security_version_be);
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, DebugFlag,
+               get_debug_mode_cdi1(key_domain));
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerPubKeyEcX, cdi_1_pubkey->x);
+  TEMPLATE_SET(cdi_1_tbs_params, Cdi1, OwnerPubKeyEcY, cdi_1_pubkey->y);
+
+  TEMPLATE_SET_TRUNCATED(cdi_1_tbs_params, Cdi1, OwnerPubKeyId,
+                         key_ids->cert->digest, kCertKeyIdSizeInBytes);
+  TEMPLATE_SET_TRUNCATED(cdi_1_tbs_params, Cdi1, OwnerIntermediatePubKeyId,
+                         key_ids->endorsement->digest, kCertKeyIdSizeInBytes);
+
+  size_t tbs_size = kCdi1MaxTbsSizeBytes;
+  HARDENED_RETURN_IF_ERROR(
+      cdi_1_build_tbs(&cdi_1_tbs_params, cdi_1_tbs_buffer, &tbs_size));
+
+  // Sign the TBS and generate the certificate.
+  hmac_digest_t tbs_digest;
+  hmac_sha256(cdi_1_tbs_buffer, tbs_size, &tbs_digest);
+  HARDENED_RETURN_IF_ERROR(
+      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
+  util_p256_signature_le_to_be_convert(curr_tbs_signature.r,
+                                       curr_tbs_signature.s);
+
+  cdi_1_sig_values_t cdi_1_params = {0};
+  TEMPLATE_SET(cdi_1_params, Cdi1, Tbs, cdi_1_tbs_buffer);
+  // Asserts that tbs is fixed-length, so we don't need to set tbs_size.
+  TEMPLATE_ASSERT_FIXED_LENGTH(Cdi1, Tbs);
+  TEMPLATE_SET(cdi_1_params, Cdi1, CertSignatureR, curr_tbs_signature.r);
+  TEMPLATE_SET(cdi_1_params, Cdi1, CertSignatureS, curr_tbs_signature.s);
+
+  HARDENED_RETURN_IF_ERROR(cdi_1_build_cert(&cdi_1_params, cert, cert_size));
+
+  // Save the CDI_1 private key to OTBN DMEM so it can endorse the next stage.
+  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+      kDiceKeyCdi1.keygen_seed_idx, kDiceKeyCdi1.type,
+      *kDiceKeyCdi1.keymgr_diversifier));
+
+  return kErrorOk;
+}
+
+rom_error_t dice_cert_check_valid(const perso_tlv_cert_obj_t *cert_obj,
+                                  const hmac_digest_t *pubkey_id,
+                                  const ecdsa_p256_public_key_t *pubkey,
+                                  hardened_bool_t *cert_valid_output) {
+  // The function prototype is shared across X.509 and CWT cert formats.
+  // For X.509, we only check the serial_number but not public key contents.
+  OT_DISCARD(pubkey);
+
+  // Assert the digest is not shorter then the key id before truncation.
+  static_assert(sizeof(pubkey_id->digest) >= sizeof(cert_key_id_t),
+                "Pubkey Id is too short.");
+
+  return cert_x509_asn1_check_serial_number(
+      cert_obj->cert_body_p, cert_obj->cert_body_size,
+      (cert_key_id_t *)pubkey_id->digest, cert_valid_output);
+}
diff --git a/sw/device/silicon_creator/lib/cert/dice.h b/sw/device/silicon_creator/lib/cert/dice.h
new file mode 100644
index 0000000000000..fb495dccac906
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice.h
@@ -0,0 +1,122 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_H_
+
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/attestation.h"
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+enum {
+  /**
+   * DICE attestation measurement sizes, comprised of a SHA256 digest.
+   */
+  kDiceMeasurementSizeInBits = 256,
+  kDiceMeasurementSizeInBytes = kDiceMeasurementSizeInBits / 8,
+};
+
+extern const dice_cert_format_t kDiceCertFormat;
+/**
+ * DICE ECC key descriptors.
+ */
+extern const sc_keymgr_ecc_key_t kDiceKeyUds;
+extern const sc_keymgr_ecc_key_t kDiceKeyCdi0;
+extern const sc_keymgr_ecc_key_t kDiceKeyCdi1;
+
+/**
+ * Generates the UDS attestation keypair and (unendorsed) X.509 TBS certificate.
+ *
+ * @param otp_creator_sw_cfg_measurement Pointer to the CreatorSwCfg
+ * measurement.
+ * @param otp_owner_sw_cfg_measurement Pointer to the OwnerSwCfg measurement.
+ * @param otp_rot_creator_auth_codesign_measurement Pointer to the
+ * RotCreatorAuthCodesign measurement.
+ * @param otp_rot_creator_auth_state_measurement Pointer to the
+ * RotCreatorAuthState measurement.
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param uds_pubkey Pointer to the (current stage) public key in big endian.
+ * @param[out] cert Buffer to hold the generated UDS certificate.
+ * @param[in,out] cert_size Size of the UDS certificate (input value is the size
+ *                          of the allocated cert_buf, output value final
+ *                          computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_uds_tbs_cert_build(
+    hmac_digest_t *otp_creator_sw_cfg_measurement,
+    hmac_digest_t *otp_owner_sw_cfg_measurement,
+    hmac_digest_t *otp_rot_creator_auth_codesign_measurement,
+    hmac_digest_t *otp_rot_creator_auth_state_measurement,
+    cert_key_id_pair_t *key_ids, ecdsa_p256_public_key_t *uds_pubkey,
+    uint8_t *tbs_cert, size_t *tbs_cert_size);
+
+/**
+ * Generates the CDI_0 attestation keypair and X.509 certificate.
+ *
+ * @param rom_ext_measurement Pointer to the ROM_EXT measurement.
+ * @param rom_ext_security_version ROM_EXT security version.
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param cdi_0_pubkey Pointer to the (current stage) public key in big endian.
+ * @param[out] cert Buffer to hold the generated CDI_0 certificate.
+ * @param[in,out] cert_size Size of the CDI_0 certificate (input value is the
+ *                          size of the allocated cert_buf, output value final
+ *                          computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_cdi_0_cert_build(hmac_digest_t *rom_ext_measurement,
+                                  uint32_t rom_ext_security_version,
+                                  cert_key_id_pair_t *key_ids,
+                                  ecdsa_p256_public_key_t *cdi_0_pubkey,
+                                  uint8_t *cert, size_t *cert_size);
+
+/**
+ * Generates the CDI_1 attestation keypair and X.509 certificate.
+ *
+ * @param owner_measurement Pointer to the owner firmware measurement.
+ * @param owner_manifest_measurement Pointer to the owner manifest measurement.
+ * @param owner_history_hash Pointer to the owner history hash.
+ * @param owner_security_version Owner firmware security version.
+ * @param key_domain Domain of the Owner SW signing key.
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param cdi_1_pubkey Pointer to the (current stage) public key in big endian.
+ * @param[out] cert Buffer to hold the generated CDI_1 certificate.
+ * @param[in,out] cert_size Size of the CDI_1 certificate (input value is the
+ *                          size of the allocated cert_buf, output value final
+ *                          computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_cdi_1_cert_build(
+    hmac_digest_t *owner_measurement, hmac_digest_t *owner_manifest_measurement,
+    hmac_digest_t *owner_history_hash, uint32_t owner_security_version,
+    owner_app_domain_t key_domain, cert_key_id_pair_t *key_ids,
+    ecdsa_p256_public_key_t *cdi_1_pubkey, uint8_t *cert, size_t *cert_size);
+
+/**
+ * Check if a subject pubkey ID (serial number) or subject pubkey match the
+ * contents of the provided certificate.
+ *
+ * @param cert_obj Pointer to the TLV cert object from the flash.
+ * @param pubkey_id Pointer to the subject pubkey ID (serial number).
+ * @param pubkey Pointer to the subject pubkey contents.
+ * @param[out] cert_valid_output If unmatched, set `cert_valid_output` to
+ * kHardenedBoolFalse for triggering cert regeneration.
+ * @return errors encountered during the check.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_cert_check_valid(const perso_tlv_cert_obj_t *cert_obj,
+                                  const hmac_digest_t *pubkey_id,
+                                  const ecdsa_p256_public_key_t *pubkey,
+                                  hardened_bool_t *cert_valid_output);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_H_
diff --git a/sw/device/silicon_creator/lib/cert/dice_chain.c b/sw/device/silicon_creator/lib/cert/dice_chain.c
new file mode 100644
index 0000000000000..151bf9ea705c8
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_chain.c
@@ -0,0 +1,536 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/cert/dice_chain.h"
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/silicon_creator/lib/base/boot_measurements.h"
+#include "sw/device/silicon_creator/lib/base/sec_mmio.h"
+#include "sw/device/silicon_creator/lib/base/static_dice_cdi_0.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/cert/dice.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/kmac.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+#include "flash_ctrl_regs.h"  // Generated.
+
+enum {
+  kFlashPageSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE,
+};
+
+/**
+ * Defines a class for parsing and building the DICE cert chain.
+ *
+ * All of the fields in this struct should be considered private, and users
+ * should call the public `dice_chain_*` functions instead.
+ */
+typedef struct dice_chain {
+  /**
+   * RAM buffer that mirrors the DICE cert chain in a flash page.
+   */
+  dice_page_t page;
+
+  /**
+   * Indicate whether `page` needs to be written back to flash.
+   */
+  hardened_bool_t data_dirty;
+
+  /**
+   * The amount of bytes in `page.data` that has been processed.
+   */
+  size_t tail_offset;
+
+  /**
+   * Indicate the info page currently buffered in `page`.
+   * This is used to skip unnecessary read ops.
+   */
+  const flash_ctrl_info_page_t *info_page;
+
+  /**
+   * Id pair which points to the endorsement and cert ids below.
+   */
+  cert_key_id_pair_t key_ids;
+
+  /**
+   * Public key id for signing endorsement cert.
+   */
+  hmac_digest_t endorsement_pubkey_id;
+
+  /**
+   * Subject public key id of the current cert.
+   */
+  hmac_digest_t subject_pubkey_id;
+
+  /**
+   * Subject public key contents of the current cert.
+   */
+  ecdsa_p256_public_key_t subject_pubkey;
+
+  /**
+   * Scratch buffer for constructing CDI certs.
+   */
+  uint8_t scratch_cert[kDicePageDataSize];
+
+  /**
+   * The current tlv cert the builder is processing.
+   */
+  perso_tlv_cert_obj_t cert_obj;
+
+  /**
+   * Indicate whether the `cert_obj` is valid for the current `subject_pubkey`.
+   */
+  hardened_bool_t cert_valid;
+
+} dice_chain_t;
+
+static dice_chain_t dice_chain;
+
+cert_key_id_pair_t dice_chain_cdi_0_key_ids = (cert_key_id_pair_t){
+    .endorsement = &static_dice_cdi_0.uds_pubkey_id,
+    .cert = &static_dice_cdi_0.cdi_0_pubkey_id,
+};
+
+// Get the size of the remaining tail space that is not processed yet.
+OT_WARN_UNUSED_RESULT
+OT_NOINLINE
+static size_t dice_chain_get_tail_size(void) {
+  HARDENED_CHECK_GE(sizeof(dice_chain.page.data), dice_chain.tail_offset);
+  return sizeof(dice_chain.page.data) - dice_chain.tail_offset;
+}
+
+// Get the pointer to the remaining tail space that is not processed yet.
+OT_WARN_UNUSED_RESULT
+static uint8_t *dice_chain_get_tail_buffer(void) {
+  return &dice_chain.page.data[dice_chain.tail_offset];
+}
+
+// Cleanup stale `cert_obj` data and mark it as invalid.
+static void dice_chain_reset_cert_obj(void) {
+  memset(&dice_chain.cert_obj, 0, sizeof(dice_chain.cert_obj));
+  dice_chain.cert_valid = kHardenedBoolFalse;
+}
+
+/**
+ * Increments the DICE cert buffer offset to the next TLV object.
+ * (ensuring to round up to the 64-bit flash word offset to prevent potential
+ * ECC issues).
+ */
+static void dice_chain_next_cert_obj(void) {
+  // Round up to next flash word for next perso TLV object offset.
+  size_t cert_size = dice_chain.cert_obj.obj_size;
+
+  // The cert_size is only 12-bit, which won't cause unsigned overflow.
+  cert_size = util_size_to_words(cert_size) * sizeof(uint32_t);
+  cert_size = util_round_up_to(cert_size, 3);
+
+  // Jump to the next object.
+  dice_chain.tail_offset += cert_size;
+
+  // Post-check for the buffer boundary.
+  HARDENED_CHECK_LE(dice_chain.tail_offset, sizeof(dice_chain.page.data));
+
+  dice_chain_reset_cert_obj();
+}
+
+/**
+ * Load the tlv cert obj from the tail buffer and check if it's valid.
+ *
+ * This method will update the `dice_chain` fields of current certificate:
+ *   * `cert_obj` will be all zeros if not TLV cert entry is found.
+ *   * `cert_valid` will only be set to true if name and pubkey matches.
+ *
+ * @param name The cert name to match.
+ * @param name_size Size in byte of the `name` argument. Caller has to ensure it
+ * is smaller than kCrthNameSizeFieldMask.
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+static rom_error_t dice_chain_load_cert_obj(const char *name,
+                                            size_t name_size) {
+  rom_error_t err =
+      perso_tlv_get_cert_obj(dice_chain_get_tail_buffer(),
+                             dice_chain_get_tail_size(), &dice_chain.cert_obj);
+
+  if (err != kErrorOk) {
+    // Cleanup the stale value if error.
+    dice_chain_reset_cert_obj();
+
+    // If the cert is not found or corrupted, continue and allow the ROM_EXT
+    // to generate an identity certificate for the current DICE stage. The
+    // error is not fatal, and the cert obj has been marked as invalid.
+    return kErrorOk;
+  }
+
+  // Check if this cert is what we are looking for. The name and type (X.509 vs
+  // CWT) should match.
+  const perso_tlv_object_type_t kExpectedCertType =
+      kDiceCertFormat == kDiceCertFormatX509TcbInfo ? kPersoObjectTypeX509Cert
+                                                    : kPersoObjectTypeCwtCert;
+  if (name == NULL || memcmp(dice_chain.cert_obj.name, name, name_size) != 0 ||
+      kExpectedCertType != dice_chain.cert_obj.obj_type) {
+    // Name unmatched, keep the cert_obj but mark it as invalid.
+    dice_chain.cert_valid = kHardenedBoolFalse;
+    return kErrorOk;
+  }
+
+  // Check if the subject pubkey is matched. `cert_valid` will be set to false
+  // if unmatched.
+  RETURN_IF_ERROR(dice_cert_check_valid(
+      &dice_chain.cert_obj, &dice_chain.subject_pubkey_id,
+      &dice_chain.subject_pubkey, &dice_chain.cert_valid));
+
+  return kErrorOk;
+}
+
+// Skip the TLV entry if the name matches.
+static rom_error_t dice_chain_skip_cert_obj(const char *name,
+                                            size_t name_size) {
+  RETURN_IF_ERROR(dice_chain_load_cert_obj(NULL, 0));
+  if (memcmp(dice_chain.cert_obj.name, name, name_size) == 0) {
+    dice_chain_next_cert_obj();
+  }
+  return kErrorOk;
+}
+
+// Load the certificate data from flash to RAM buffer.
+OT_WARN_UNUSED_RESULT
+static rom_error_t dice_chain_load_flash(
+    const flash_ctrl_info_page_t *info_page) {
+  // Skip reload if it's already buffered.
+  if (dice_chain.info_page == info_page) {
+    dice_chain.tail_offset = 0;
+    return kErrorOk;
+  }
+
+  // We are switching to a different page, flush changes (if dirty) first.
+  RETURN_IF_ERROR(dice_chain_flush_flash());
+
+  // Read in a DICE certificate(s) page.
+  static_assert(sizeof(dice_chain.page) == kFlashPageSize,
+                "Invalid dice_chain buffer size");
+  RETURN_IF_ERROR(flash_ctrl_info_read_zeros_on_read_error(
+      info_page, /*offset=*/0,
+      /*word_count=*/kFlashPageSize / sizeof(uint32_t), &dice_chain.page));
+
+  // Resets the flash page status.
+  dice_chain.data_dirty = kHardenedBoolFalse;
+  dice_chain.tail_offset = 0;
+  dice_chain.info_page = info_page;
+  dice_chain_reset_cert_obj();
+
+  return kErrorOk;
+}
+
+// Add the hash digest to the last of the page.
+static rom_error_t dice_chain_seal_page(void) {
+  // Hash the entire page before the digest.
+  hmac_sha256(dice_chain.page.data, sizeof(dice_chain.page.data),
+              &dice_chain.page.digest);
+
+  // The page is going to be updated.
+  dice_chain.data_dirty = kHardenedBoolTrue;
+
+  return kErrorOk;
+}
+
+// Push the certificate to the tail with TLV header.
+OT_WARN_UNUSED_RESULT
+static rom_error_t dice_chain_push_cert(const char *name, const uint8_t *cert,
+                                        const size_t cert_size) {
+  // The data is going to be updated, mark it as dirty and clear the tail.
+  dice_chain.data_dirty = kHardenedBoolTrue;
+
+  // Invalidate all the remaining certificates in the tail buffer.
+  memset(dice_chain_get_tail_buffer(), 0, dice_chain_get_tail_size());
+
+  // Encode the certificate to the tail buffer.
+  size_t cert_page_left = dice_chain_get_tail_size();
+  perso_tlv_object_type_t cert_type =
+      kDiceCertFormat == kDiceCertFormatX509TcbInfo ? kPersoObjectTypeX509Cert
+                                                    : kPersoObjectTypeCwtCert;
+  RETURN_IF_ERROR(perso_tlv_cert_obj_build(name, cert_type, cert, cert_size,
+                                           dice_chain_get_tail_buffer(),
+                                           &cert_page_left));
+
+  // Move the offset to the new tail.
+  RETURN_IF_ERROR(perso_tlv_get_cert_obj(dice_chain_get_tail_buffer(),
+                                         dice_chain_get_tail_size(),
+                                         &dice_chain.cert_obj));
+  dice_chain_next_cert_obj();
+  return kErrorOk;
+}
+
+rom_error_t dice_chain_attestation_silicon(void) {
+  // Initialize the entropy complex and KMAC for key manager operations.
+  // Note: `OTCRYPTO_OK.value` is equal to `kErrorOk` but we cannot add a static
+  // assertion here since its definition is not an integer constant expression.
+  HARDENED_RETURN_IF_ERROR((rom_error_t)entropy_complex_init().value);
+  HARDENED_RETURN_IF_ERROR(kmac_keymgr_configure());
+
+  // Set keymgr reseed interval. Start with the maximum value to avoid
+  // entropy complex contention during the boot process.
+  const uint16_t kScKeymgrEntropyReseedInterval = UINT16_MAX;
+  sc_keymgr_entropy_reseed_interval_set(kScKeymgrEntropyReseedInterval);
+  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioEntropyReseedIntervalSet);
+
+  // ROM sets the SW binding values for the first key stage (CreatorRootKey) but
+  // does not initialize the key manager. Advance key manager state twice to
+  // transition to the CreatorRootKey state.
+  RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateReset));
+  sc_keymgr_advance_state();
+  RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateInit));
+
+  // Generate UDS keys.
+  sc_keymgr_advance_state();
+  HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateCreatorRootKey));
+  HARDENED_RETURN_IF_ERROR(otbn_boot_cert_ecc_p256_keygen(
+      kDiceKeyUds, &static_dice_cdi_0.uds_pubkey_id,
+      &static_dice_cdi_0.uds_pubkey));
+
+  // Save UDS key for signing next stage cert.
+  RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+      kDiceKeyUds.keygen_seed_idx, kDiceKeyUds.type,
+      *kDiceKeyUds.keymgr_diversifier));
+
+  return kErrorOk;
+}
+
+rom_error_t dice_chain_attestation_creator(
+    keymgr_binding_value_t *rom_ext_measurement,
+    const manifest_t *rom_ext_manifest) {
+  // Generate CDI_0 attestation keys and (potentially) update certificate.
+  keymgr_binding_value_t seal_binding_value = {
+      .data = {rom_ext_manifest->identifier, 0}};
+  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioSwBindingSet +
+                           kScKeymgrSecMmioOwnerIntMaxVerSet);
+  HARDENED_RETURN_IF_ERROR(sc_keymgr_owner_int_advance(
+      /*sealing_binding=*/&seal_binding_value,
+      /*attest_binding=*/rom_ext_measurement,
+      rom_ext_manifest->max_key_version));
+  HARDENED_RETURN_IF_ERROR(otbn_boot_cert_ecc_p256_keygen(
+      kDiceKeyCdi0, &static_dice_cdi_0.cdi_0_pubkey_id,
+      &static_dice_cdi_0.cdi_0_pubkey));
+
+  // Switch page for the device generated CDI_0.
+  RETURN_IF_ERROR(dice_chain_load_flash(&kFlashCtrlInfoPageDiceCerts));
+
+  // Check if the current CDI_0 cert is valid.
+  dice_chain.subject_pubkey_id = static_dice_cdi_0.cdi_0_pubkey_id;
+  dice_chain.subject_pubkey = static_dice_cdi_0.cdi_0_pubkey;
+  RETURN_IF_ERROR(dice_chain_load_cert_obj("CDI_0", /*name_size=*/6));
+  if (dice_chain.cert_valid == kHardenedBoolFalse) {
+    // Update the cert page buffer.
+    static_dice_cdi_0.cert_size = sizeof(static_dice_cdi_0.cert_data);
+    HARDENED_RETURN_IF_ERROR(dice_cdi_0_cert_build(
+        (hmac_digest_t *)rom_ext_measurement->data,
+        rom_ext_manifest->security_version, &dice_chain_cdi_0_key_ids,
+        &static_dice_cdi_0.cdi_0_pubkey, static_dice_cdi_0.cert_data,
+        &static_dice_cdi_0.cert_size));
+  } else {
+    // Replace UDS with CDI_0 key for endorsing next stage cert.
+    HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+        kDiceKeyCdi0.keygen_seed_idx, kDiceKeyCdi0.type,
+        *kDiceKeyCdi0.keymgr_diversifier));
+  }
+
+  sc_keymgr_sw_binding_unlock_wait();
+
+  return kErrorOk;
+}
+
+// Compare the UDS identity in the static critical section to the UDS cert
+// cached in the flash.
+static rom_error_t dice_chain_attestation_check_uds(void) {
+  // Switch page for the factory provisioned UDS cert.
+  RETURN_IF_ERROR(dice_chain_load_flash(&kFlashCtrlInfoPageFactoryCerts));
+
+  // Check if the UDS cert is valid.
+  dice_chain.endorsement_pubkey_id = static_dice_cdi_0.uds_pubkey_id;
+  dice_chain.subject_pubkey_id = static_dice_cdi_0.uds_pubkey_id;
+  dice_chain.subject_pubkey = static_dice_cdi_0.uds_pubkey;
+  RETURN_IF_ERROR(dice_chain_load_cert_obj("UDS", /*name_size=*/4));
+  if (dice_chain.cert_valid == kHardenedBoolFalse) {
+    // The UDS key ID (and cert itself) should never change unless:
+    // 1. there is a hardware issue / the page has been corrupted, or
+    // 2. the cert has not yet been provisioned.
+    //
+    // In both cases, we do nothing, and boot normally, later attestation
+    // attempts will fail in a detectable manner.
+
+    // CAUTION: This error message should match the one in
+    //   //sw/host/provisioning/ft_lib/src/lib.rs
+    dbg_puts("error: UDS certificate not valid\r\n");
+  }
+
+  return kErrorOk;
+}
+
+// Refresh the cache if a new CDI_0 is generated.
+static rom_error_t dice_chain_attestation_check_cdi_0(void) {
+  // Switch page for the device CDI chain.
+  RETURN_IF_ERROR(dice_chain_load_flash(&kFlashCtrlInfoPageDiceCerts));
+
+  // Set the endorsement key for the next cert.
+  dice_chain.endorsement_pubkey_id = static_dice_cdi_0.cdi_0_pubkey_id;
+
+  // Save cdi 0 to flash if regenerated.
+  if (static_dice_cdi_0.cert_size != 0) {
+    dbg_puts("warning: CDI_0 certificate not valid; updating\r\n");
+    return dice_chain_push_cert("CDI_0", static_dice_cdi_0.cert_data,
+                                static_dice_cdi_0.cert_size);
+  } else {
+    return dice_chain_skip_cert_obj("CDI_0", /*name_size=*/6);
+  }
+}
+
+// Check the hash digest at the last of the page.
+static rom_error_t dice_chain_seal_page_check(
+    const flash_ctrl_info_page_t *info_page) {
+  RETURN_IF_ERROR(dice_chain_load_flash(info_page));
+  // Hash the entire page before the digest.
+  hmac_digest_t expected_digest;
+  hmac_sha256(dice_chain.page.data, sizeof(dice_chain.page.data),
+              &expected_digest);
+
+  // Compare with the digest stored at the end of the page.
+  if (memcmp(&dice_chain.page.digest, &expected_digest,
+             sizeof(hmac_digest_t)) != 0) {
+    return kErrorDicePageCorrupted;
+  }
+
+  return kErrorOk;
+}
+
+rom_error_t dice_chain_rom_ext_check(void) {
+  if (dice_chain_seal_page_check(&kFlashCtrlInfoPageFactoryCerts) != kErrorOk) {
+    dbg_puts("warning: corrupted FactoryCerts page\r\n");
+  }
+
+  // Retry if the current cache is corrupted.
+  rom_error_t error = dice_chain_seal_page_check(&kFlashCtrlInfoPageDiceCerts);
+  if (error == kErrorDicePageCorrupted) {
+    dbg_puts("warning: corrupted DiceCerts page\r\n");
+    // Clear the corrupted page and reboot.
+    dice_chain.data_dirty = kHardenedBoolTrue;
+    memset(&dice_chain.page, 0, sizeof(dice_chain.page));
+    RETURN_IF_ERROR(dice_chain_flush_flash());
+
+    if (static_dice_cdi_0.cert_size > 0) {
+      // Continue since CDI_0 has been generated
+      error = kErrorOk;
+    }
+  }
+  RETURN_IF_ERROR(error);
+
+  // Handles the certificates from the immutable rom_ext.
+  RETURN_IF_ERROR(dice_chain_attestation_check_uds());
+  RETURN_IF_ERROR(dice_chain_attestation_check_cdi_0());
+
+  return kErrorOk;
+}
+
+rom_error_t dice_chain_attestation_owner(
+    const manifest_t *owner_manifest, keymgr_binding_value_t *bl0_measurement,
+    hmac_digest_t *owner_measurement, hmac_digest_t *owner_history_hash,
+    keymgr_binding_value_t *sealing_binding, owner_app_domain_t key_domain) {
+  // Generate CDI_1 attestation keys and (potentially) update certificate.
+  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioSwBindingSet +
+                           kScKeymgrSecMmioOwnerIntMaxVerSet);
+  static_assert(
+      sizeof(hmac_digest_t) == sizeof(keymgr_binding_value_t),
+      "Expect the keymgr binding value to be the same size as a sha256 digest");
+
+  // Aggregate the owner firmware (BL0) measurement and the ownership
+  // measurement into a single attestation measurment.  The attestation
+  // measurement is used to initialize the keymgr.
+  hmac_digest_t attest_measurement;
+  hmac_sha256_configure(false);
+  hmac_sha256_start();
+  hmac_sha256_update(bl0_measurement, sizeof(*bl0_measurement));
+  hmac_sha256_update(owner_measurement, sizeof(*owner_measurement));
+  hmac_sha256_process();
+  hmac_sha256_final(&attest_measurement);
+
+  HARDENED_RETURN_IF_ERROR(sc_keymgr_owner_advance(
+      /*sealing_binding=*/sealing_binding,
+      /*attest_binding=*/(keymgr_binding_value_t *)&attest_measurement,
+      owner_manifest->max_key_version));
+  HARDENED_RETURN_IF_ERROR(otbn_boot_cert_ecc_p256_keygen(
+      kDiceKeyCdi1, &dice_chain.subject_pubkey_id, &dice_chain.subject_pubkey));
+
+  // Check if the current CDI_1 cert is valid.
+  RETURN_IF_ERROR(dice_chain_load_cert_obj("CDI_1", /*name_size=*/6));
+  if (dice_chain.cert_valid == kHardenedBoolFalse) {
+    dbg_puts("warning: CDI_1 certificate not valid; updating\r\n");
+    // Update the cert page buffer.
+    size_t updated_cert_size = kDicePageDataSize;
+    HARDENED_RETURN_IF_ERROR(dice_cdi_1_cert_build(
+        (hmac_digest_t *)bl0_measurement, owner_measurement, owner_history_hash,
+        owner_manifest->security_version, key_domain, &dice_chain.key_ids,
+        &dice_chain.subject_pubkey, dice_chain.scratch_cert,
+        &updated_cert_size));
+    RETURN_IF_ERROR(dice_chain_push_cert("CDI_1", dice_chain.scratch_cert,
+                                         updated_cert_size));
+  } else {
+    // Cert is valid, move to the next one.
+    dice_chain_next_cert_obj();
+
+    // Replace CDI_0 with CDI_1 key for endorsing next stage cert.
+    HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+        kDiceKeyCdi1.keygen_seed_idx, kDiceKeyCdi1.type,
+        *kDiceKeyCdi1.keymgr_diversifier));
+  }
+  dice_chain.endorsement_pubkey_id = dice_chain.subject_pubkey_id;
+
+  sc_keymgr_sw_binding_unlock_wait();
+
+  return kErrorOk;
+}
+
+// Write the DICE certs to flash if they have been updated.
+rom_error_t dice_chain_flush_flash(void) {
+  if (dice_chain.data_dirty == kHardenedBoolTrue &&
+      dice_chain.info_page != NULL) {
+    RETURN_IF_ERROR(dice_chain_seal_page());
+
+    RETURN_IF_ERROR(
+        flash_ctrl_info_erase(dice_chain.info_page, kFlashCtrlEraseTypePage));
+    static_assert(sizeof(dice_chain.page) == kFlashPageSize,
+                  "Invalid dice_chain buffer size");
+    RETURN_IF_ERROR(flash_ctrl_info_write(
+        dice_chain.info_page,
+        /*offset=*/0,
+        /*word_count=*/FLASH_CTRL_PARAM_BYTES_PER_PAGE / sizeof(uint32_t),
+        &dice_chain.page));
+    dice_chain.data_dirty = kHardenedBoolFalse;
+  }
+  return kErrorOk;
+}
+
+rom_error_t dice_chain_init(void) {
+  // Variable initialization.
+  memset(&dice_chain, 0, sizeof(dice_chain));
+  dice_chain.data_dirty = kHardenedBoolFalse;
+  dice_chain.key_ids = (cert_key_id_pair_t){
+      .endorsement = &dice_chain.endorsement_pubkey_id,
+      .cert = &dice_chain.subject_pubkey_id,
+  };
+  dice_chain_reset_cert_obj();
+
+  // Configure DICE certificate flash info page and buffer it into RAM.
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageDiceCerts);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageFactoryCerts,
+                          kCertificateInfoPageCfg);
+  flash_ctrl_cert_info_page_owner_restrict(&kFlashCtrlInfoPageFactoryCerts);
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/lib/cert/dice_chain.h b/sw/device/silicon_creator/lib/cert/dice_chain.h
new file mode 100644
index 0000000000000..6f8b6572dd714
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_chain.h
@@ -0,0 +1,104 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_CHAIN_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_CHAIN_H_
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/keymgr_binding_value.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+
+#include "flash_ctrl_regs.h"  // Generated.
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+  kDicePageDataSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE - sizeof(hmac_digest_t),
+};
+
+/**
+ * The flash page schema for holding DICE certificates.
+ */
+typedef struct dice_page {
+  uint8_t data[kDicePageDataSize];
+  hmac_digest_t digest;
+} dice_page_t;
+
+static_assert(sizeof(dice_page_t) == FLASH_CTRL_PARAM_BYTES_PER_PAGE,
+              "Invalid dice page size");
+
+/**
+ * Initialize the dice chain builder with data from the flash pages.
+ *
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_init(void);
+
+/**
+ * Prepare the UDS key and check the UDS certificate.
+ *
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_attestation_silicon(void);
+
+/**
+ * Check the CDI_0 certificate and regenerate if invalid.
+ *
+ * @param rom_ext_measurement Pointer to the measurements to attest.
+ * @param rom_ext_manifest Pointer to the current rom_ext manifest.
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_attestation_creator(
+    keymgr_binding_value_t *rom_ext_measurement,
+    const manifest_t *rom_ext_manifest);
+
+/**
+ * Check the CDI_1 certificate and regenerate if invalid.
+ *
+ * @param owner_manifest Pointer to the owner SW manifest to be boot.
+ * @param bl0_measurement Pointer to the measurement of the owner firmware.
+ * @param owner_measurement Pointer to the measurement of the owner config.
+ * @param sealing_binding Pointer to the owner's sealing diversification
+ *        constant.
+ * @param key_domain Domain of the Owner SW signing key.
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_attestation_owner(
+    const manifest_t *owner_manifest, keymgr_binding_value_t *bl0_measurement,
+    hmac_digest_t *owner_measurement, hmac_digest_t *owner_history_hash,
+    keymgr_binding_value_t *sealing_binding, owner_app_domain_t key_domain);
+
+/**
+ * Write back the certificate chain to flash if changed.
+ *
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_flush_flash(void);
+
+/**
+ * Checks that the factory-provisioned certificates in flash are valid and
+ * updates device-generated certificates if they have been invalidated.
+ *
+ * This function needs to be called after `dice_chain_init()`.
+ *
+ * @return errors encountered during the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t dice_chain_rom_ext_check(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_CHAIN_H_
diff --git a/sw/device/silicon_creator/lib/cert/dice_cwt.c b/sw/device/silicon_creator/lib/cert/dice_cwt.c
new file mode 100644
index 0000000000000..76315642bb957
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_cwt.c
@@ -0,0 +1,478 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/cert/cbor.h"
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/cert/cwt_cose_key.h"
+#include "sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry.h"
+#include "sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_input.h"
+#include "sw/device/silicon_creator/lib/cert/cwt_dice_chain_entry_payload.h"
+#include "sw/device/silicon_creator/lib/cert/dice.h"
+#include "sw/device/silicon_creator/lib/cert/dice_keys.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/otp.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+#include "otp_ctrl_regs.h"  // Generated.
+
+const dice_cert_format_t kDiceCertFormat = kDiceCertFormatCWTAndroid;
+
+enum config_desc_labels {
+  kSecurityVersionLabel = -70005,
+  // Implementataion specific value,
+  // less than -65536 and outside of [-70000, -70999]
+  kOwnerManifestMeasurmentLabel = -71006,
+};
+
+// This input is designed to capture a configuration signal in a stable way,
+// and to reflect important decisions a device makes at runtime.
+// https://pigweed.googlesource.com/open-dice/+/HEAD/docs/specification.md#mode-value-details
+enum open_dice_mode_value {
+  kDiceModeNormal = 1,
+  kDiceModeDebug = 2,
+};
+
+enum payload_entry_sizes {
+  // The length of Profile Name
+  kProfileNameLength = 10,
+  // The Key ID length, which equals to the SHA256 digest size in bytes
+  kIssuerSubjectKeyIdLength = kHmacDigestNumBytes,
+  // The identifiers are 20 octets (reserve double size for HEX translation) so
+  // they fit in the RFC 5280 serialNumber field constraints and the
+  // X520SerialNumber type when hex encoded.
+  kIssuerSubjectNameLength = 40,
+  // 64 byte should be enough for 2 entries
+  kConfigDescBuffSize = 64,
+};
+static_assert(kIssuerSubjectNameLength <= kIssuerSubjectKeyIdLength * 2,
+              "Insufficient SubjectNameLength");
+
+enum cwt_cert_expectations {
+  // Size of magic bytes to distinguish between CoseKey and CoseSign1 message.
+  kDiceCwtMagicSizeBytes = 1,
+
+  // Magic header identifying a CoseKey message (CBOR map with 5 elements).
+  kDiceCwtCoseKeyMagic = 0xa5,
+
+  // Size of the CoseKey identity region header. (y-coord)
+  // Expects 1B mapKey(-3) + 2B bstr(32) header.
+  kDiceCwtCoseKeyIdHeaderSizeBytes = 1 + 2,
+
+  // Total size in bytes of the CoseKey identity region. (y-coord)
+  // Expects header + 32B p256 y-coord.
+  kDiceCwtCoseKeyIdSizeBytes =
+      kDiceCwtCoseKeyIdHeaderSizeBytes + kEcdsaP256PublicKeyCoordBytes,
+
+  // Offset to the CoseKey identity region. (y-coord)
+  // This offset is relative to the *end* of CoseKey message.
+  kDiceCwtCoseKeyIdOffsetBytes = 0,
+
+  // All valid CoseKey messages should be longer than this size.
+  kDiceCwtCoseKeyMinSizeBytes = kDiceCwtMagicSizeBytes +
+                                kDiceCwtCoseKeyIdOffsetBytes +
+                                kDiceCwtCoseKeyIdSizeBytes,
+
+  // Magic header identifying a CoseSign1 message (CBOR array with 4 elements).
+  kDiceCwtCoseSign1Magic = 0x84,
+
+  // Size of the CoseSign1 identity region header. (subject hex id)
+  // Expects 1B mapKey(2) + 2B text(64) header.
+  kDiceCwtCoseSign1IdHeaderSizeBytes = 1 + 2,
+
+  // Size of the CoseSign1 identity region. (subject hex id)
+  // Expects header + 64B subject hex id.
+  kDiceCwtCoseSign1IdSizeBytes =
+      kDiceCwtCoseSign1IdHeaderSizeBytes + kIssuerSubjectNameLength,
+
+  // Offset to the CoseSign1 identity region. (subject hex id)
+  // This offset is relative to the *begin* of CoseSign1.
+  // Expects 9B COSE prefix + 4B Payload prefix + 64B issuer id.
+  kDiceCwtCoseSign1IdOffsetBytes = 9 + 4 + kIssuerSubjectNameLength,
+
+  // All valid CoseSign1 messages should be longer than this size.
+  kDiceCwtCoseSign1MinSizeBytes = kDiceCwtMagicSizeBytes +
+                                  kDiceCwtCoseSign1IdOffsetBytes +
+                                  kDiceCwtCoseSign1IdSizeBytes,
+};
+
+// Reusable buffer for checking cose key identity.
+static char expected_cose_key_id[kDiceCwtCoseKeyIdSizeBytes] = {
+    0x22,                                 // mapKey -3 (y-coord)
+    0x58, kEcdsaP256PublicKeyCoordBytes,  // 32-byte bstr header
+    // Remaining bytes will be filled during check.
+};
+
+// Reusable buffer for checking cose sign1 cert identity.
+static char expected_cose_sign1_id[kDiceCwtCoseSign1IdSizeBytes] = {
+    0x02,                            // mapKey 2 (subject id)
+    0x78, kIssuerSubjectNameLength,  // 64-byte text header
+    // Remaining bytes will be filled during check.
+};
+
+// Reusable buffer for generating Configuration Descriptor
+static uint8_t config_desc_buf[kConfigDescBuffSize] = {0};
+// a0    # map(0)
+const uint8_t kCborMap0[] = {0xa0};
+// Reusable buffer for generating UDS/CDI_* COSE_Key
+static uint8_t cose_key_buffer[kCwtCoseKeyMaxVariableSizeBytes] = {0};
+// Reusable buffer for generating signature
+static ecdsa_p256_signature_t curr_tbs_signature = {.r = {0}, .s = {0}};
+
+#define CWT_PROFILE_NAME "android.16"
+
+static uint8_t get_chip_mode_cdi0(void) {
+  return (lifecycle_is_prod() ? kDiceModeNormal : kDiceModeDebug);
+}
+
+static uint8_t get_chip_mode_cdi1(owner_app_domain_t key_domain) {
+  if (launder32(key_domain) != kOwnerAppDomainProd) {
+    return kDiceModeDebug;
+  }
+  HARDENED_CHECK_EQ(key_domain, kOwnerAppDomainProd);
+  return kDiceModeNormal;
+}
+
+static char issuer[kIssuerSubjectNameLength + 1] = {0};
+static char subject[kIssuerSubjectNameLength + 1] = {0};
+
+static void fill_dice_id_string(
+    const uint8_t dice_id[kIssuerSubjectKeyIdLength],
+    char dice_id_str[kIssuerSubjectNameLength + 1]) {
+  size_t idx;
+  for (idx = 0; idx * 2 < kIssuerSubjectNameLength; idx++, dice_id_str += 2)
+    util_hexdump_byte(dice_id[idx], (uint8_t *)&dice_id_str[0]);
+}
+
+static rom_error_t configuration_descriptor_build(
+    size_t *buf_size, const size_t sec_version,
+    const hmac_digest_t *manifest_measurement) {
+  cbor_out_t cbor_out;
+  cbor_out_init(&cbor_out, config_desc_buf);
+
+  cbor_out_t *ptrs[2] = {NULL, &cbor_out};
+  const size_t ptrs_len = sizeof(ptrs) / sizeof(ptrs[0]);
+
+  for (size_t i = 0; i < ptrs_len; ++i) {
+    cbor_out_t *cbor = ptrs[i];
+    size_t sz = 0;
+
+    sz += cbor_write_map_header(cbor, (manifest_measurement != NULL) ? 2 : 1);
+    sz += cbor_write_int(cbor, kSecurityVersionLabel);
+    sz += cbor_write_int(cbor, sec_version);
+
+    if (manifest_measurement != NULL) {
+      sz += cbor_write_int(cbor, kOwnerManifestMeasurmentLabel);
+      sz += cbor_write_bstr(cbor, (uint8_t *)&manifest_measurement->digest[0],
+                            kHmacDigestNumBytes);
+    }
+
+    if (sz > *buf_size)
+      return kErrorCertInvalidSize;
+  }
+
+  *buf_size = cbor_out_size(&cbor_out);
+
+  return kErrorOk;
+}
+
+rom_error_t dice_uds_tbs_cert_build(
+    hmac_digest_t *otp_creator_sw_cfg_measurement,
+    hmac_digest_t *otp_owner_sw_cfg_measurement,
+    hmac_digest_t *otp_rot_creator_auth_codesign_measurement,
+    hmac_digest_t *otp_rot_creator_auth_state_measurement,
+    cert_key_id_pair_t *key_ids, ecdsa_p256_public_key_t *uds_pubkey,
+    uint8_t *tbs_cert, size_t *tbs_cert_size) {
+  // These parameters are used by the X.509 sibling implementation.
+  OT_DISCARD(otp_creator_sw_cfg_measurement);
+  OT_DISCARD(otp_owner_sw_cfg_measurement);
+  OT_DISCARD(otp_rot_creator_auth_codesign_measurement);
+  OT_DISCARD(otp_rot_creator_auth_state_measurement);
+  OT_DISCARD(key_ids);
+
+  // For DICE CWT implementation, no need to sign UDS_Pub but just a COSE_Key
+  // structure.
+  // Those otp_*measurement parameters exist just for API alignment between
+  // different implementations.
+  cwt_cose_key_values_t cwt_cose_key_params = {
+      .pub_key_ec_x = (uint8_t *)uds_pubkey->x,
+      .pub_key_ec_x_size = sizeof(uds_pubkey->x),
+      .pub_key_ec_y = (uint8_t *)uds_pubkey->y,
+      .pub_key_ec_y_size = sizeof(uds_pubkey->y),
+  };
+  // For DICE CWT implementation, no need to sign UDS_Pub but just a COSE_Key
+  // structure.
+  // Those otp_*measurement parameters exist just for API alignment between
+  // different implementations.
+  OT_DISCARD(otp_creator_sw_cfg_measurement);
+  OT_DISCARD(otp_owner_sw_cfg_measurement);
+  OT_DISCARD(otp_rot_creator_auth_codesign_measurement);
+  OT_DISCARD(otp_rot_creator_auth_state_measurement);
+  OT_DISCARD(key_ids);
+  HARDENED_RETURN_IF_ERROR(
+      cwt_cose_key_build(&cwt_cose_key_params, tbs_cert, tbs_cert_size));
+
+  return kErrorOk;
+}
+
+rom_error_t dice_cdi_0_cert_build(hmac_digest_t *rom_ext_measurement,
+                                  uint32_t rom_ext_security_version,
+                                  cert_key_id_pair_t *key_ids,
+                                  ecdsa_p256_public_key_t *cdi_0_pubkey,
+                                  uint8_t *cert, size_t *cert_size) {
+  // Build Subject public key structure
+  size_t cose_key_size = sizeof(cose_key_buffer);
+  cwt_cose_key_values_t cwt_cose_key_params = {
+      .pub_key_ec_x = (uint8_t *)cdi_0_pubkey->x,
+      .pub_key_ec_x_size = sizeof(cdi_0_pubkey->x),
+      .pub_key_ec_y = (uint8_t *)cdi_0_pubkey->y,
+      .pub_key_ec_y_size = sizeof(cdi_0_pubkey->y),
+  };
+  HARDENED_RETURN_IF_ERROR(cwt_cose_key_build(
+      &cwt_cose_key_params, &cose_key_buffer[0], &cose_key_size));
+
+  // Try to generate DiceChainEntryPayload
+  fill_dice_id_string((uint8_t *)(key_ids->endorsement->digest), issuer);
+  fill_dice_id_string((uint8_t *)(key_ids->cert->digest), subject);
+
+  uint8_t
+      cdi0_entry_payload_buffer[kCwtDiceChainEntryPayloadMaxVariableSizeBytes];
+  size_t cdi0_entry_payload_size = sizeof(cdi0_entry_payload_buffer);
+
+  size_t config_desc_buf_size = kConfigDescBuffSize;
+  // No extension measurement is needed in CDI_0, just pass a NULL to the
+  // config_descriptors to bypass encoding.
+  HARDENED_RETURN_IF_ERROR(configuration_descriptor_build(
+      &config_desc_buf_size, rom_ext_security_version, NULL));
+  hmac_digest_t conf_hash;
+  hmac_sha256(config_desc_buf, config_desc_buf_size, &conf_hash);
+  util_reverse_bytes(conf_hash.digest, kHmacDigestNumBytes);
+
+  // Compute Authority Hash against an empty map since it's mandatory but
+  // "Authority Descriptor" isn't.
+  hmac_digest_t auth_hash;
+  hmac_sha256(kCborMap0, sizeof(kCborMap0), &auth_hash);
+  util_reverse_bytes(auth_hash.digest, kHmacDigestNumBytes);
+
+  uint8_t mode = get_chip_mode_cdi0();
+  cwt_dice_chain_entry_payload_values_t cwt_dice_chain_entry_payload_params = {
+      .auth_hash = (uint8_t *)&auth_hash.digest[0],
+      .auth_hash_size = kHmacDigestNumBytes,
+      .code_hash = (uint8_t *)&rom_ext_measurement->digest[0],
+      .code_hash_size = kHmacDigestNumBytes,
+      .subject = &subject[0],
+      .subject_size = kIssuerSubjectNameLength,
+      .mode = &mode,
+      .mode_size = sizeof(mode),
+      .issuer = &issuer[0],
+      .issuer_size = kIssuerSubjectNameLength,
+      .subject_pk = &cose_key_buffer[0],
+      .subject_pk_size = cose_key_size,
+      .config_desc = config_desc_buf,
+      .config_desc_size = config_desc_buf_size,
+      .config_hash = (uint8_t *)&conf_hash.digest[0],
+      .config_hash_size = kHmacDigestNumBytes,
+      .profile_name = CWT_PROFILE_NAME,
+      .profile_name_size = kProfileNameLength};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_payload_build(
+      &cwt_dice_chain_entry_payload_params, cdi0_entry_payload_buffer,
+      &cdi0_entry_payload_size));
+
+  // Try to generate DiceChainEntryInput, by reusing the cert buffer.
+  size_t cdi0_entry_input_size = kCwtDiceChainEntryInputMaxVariableSizeBytes;
+  if (cdi0_entry_input_size > *cert_size)
+    return kErrorCertInvalidSize;
+  cwt_dice_chain_entry_input_values_t cwt_dice_chain_entry_input_params = {
+      .payload = cdi0_entry_payload_buffer,
+      .payload_size = cdi0_entry_payload_size};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_input_build(
+      &cwt_dice_chain_entry_input_params, cert, &cdi0_entry_input_size));
+
+  // Obtain digest & sign
+  hmac_digest_t tbs_digest;
+  hmac_sha256(cert, cdi0_entry_input_size, &tbs_digest);
+  HARDENED_RETURN_IF_ERROR(
+      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
+  util_p256_signature_le_to_be_convert(curr_tbs_signature.r,
+                                       curr_tbs_signature.s);
+
+  // Build the final DiceEntry
+  cwt_dice_chain_entry_values_t cwt_dice_chain_entry_params = {
+      .payload = cdi0_entry_payload_buffer,
+      .payload_size = cdi0_entry_payload_size,
+      .signature = (uint8_t *)&curr_tbs_signature,
+      .signature_size = sizeof(ecdsa_p256_signature_t)};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_build(
+      &cwt_dice_chain_entry_params, cert, cert_size));
+
+  // Save the CDI_0 private key to OTBN DMEM so it can endorse the next stage.
+  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+      kDiceKeyCdi0.keygen_seed_idx, kDiceKeyCdi0.type,
+      *kDiceKeyCdi0.keymgr_diversifier));
+  return kErrorOk;
+}
+
+rom_error_t dice_cdi_1_cert_build(
+    hmac_digest_t *owner_measurement, hmac_digest_t *owner_manifest_measurement,
+    hmac_digest_t *owner_history_hash, uint32_t owner_security_version,
+    owner_app_domain_t key_domain, cert_key_id_pair_t *key_ids,
+    ecdsa_p256_public_key_t *cdi_1_pubkey, uint8_t *cert, size_t *cert_size) {
+  // TODO: The ownership history is currently not included in the CWT
+  // certificate.
+  OT_DISCARD(owner_history_hash);
+  // Build Subject public key structure
+  size_t cose_key_size = sizeof(cose_key_buffer);
+  cwt_cose_key_values_t cwt_cose_key_params = {
+      .pub_key_ec_x = (uint8_t *)cdi_1_pubkey->x,
+      .pub_key_ec_x_size = sizeof(cdi_1_pubkey->x),
+      .pub_key_ec_y = (uint8_t *)cdi_1_pubkey->y,
+      .pub_key_ec_y_size = sizeof(cdi_1_pubkey->y),
+  };
+  HARDENED_RETURN_IF_ERROR(cwt_cose_key_build(
+      &cwt_cose_key_params, &cose_key_buffer[0], &cose_key_size));
+
+  // Try to generate DiceChainEntryPayload
+  fill_dice_id_string((uint8_t *)(key_ids->endorsement->digest), issuer);
+  fill_dice_id_string((uint8_t *)(key_ids->cert->digest), subject);
+
+  uint8_t
+      cdi1_entry_payload_buffer[kCwtDiceChainEntryPayloadMaxVariableSizeBytes];
+  size_t cdi1_entry_payload_size = sizeof(cdi1_entry_payload_buffer);
+
+  size_t config_desc_buf_size = sizeof(config_desc_buf);
+  HARDENED_RETURN_IF_ERROR(configuration_descriptor_build(
+      &config_desc_buf_size, owner_security_version,
+      owner_manifest_measurement));
+  hmac_digest_t conf_hash;
+  hmac_sha256(config_desc_buf, config_desc_buf_size, &conf_hash);
+  util_reverse_bytes(conf_hash.digest, kHmacDigestNumBytes);
+
+  // Compute Authority Hash against an empty map since it's mandatory but
+  // "Authority Descriptor" isn't.
+  hmac_digest_t auth_hash;
+  hmac_sha256(kCborMap0, sizeof(kCborMap0), &auth_hash);
+  util_reverse_bytes(auth_hash.digest, kHmacDigestNumBytes);
+
+  uint8_t mode = get_chip_mode_cdi1(key_domain);
+  cwt_dice_chain_entry_payload_values_t cwt_dice_chain_entry_payload_params = {
+      .auth_hash = (uint8_t *)&auth_hash.digest[0],
+      .auth_hash_size = kHmacDigestNumBytes,
+      .code_hash = (uint8_t *)&owner_measurement->digest[0],
+      .code_hash_size = kHmacDigestNumBytes,
+      .subject = &subject[0],
+      .subject_size = kIssuerSubjectNameLength,
+      .mode = &mode,
+      .mode_size = sizeof(mode),
+      .issuer = &issuer[0],
+      .issuer_size = kIssuerSubjectNameLength,
+      .subject_pk = &cose_key_buffer[0],
+      .subject_pk_size = cose_key_size,
+      .config_desc = config_desc_buf,
+      .config_desc_size = config_desc_buf_size,
+      .config_hash = (uint8_t *)&conf_hash.digest[0],
+      .config_hash_size = kHmacDigestNumBytes,
+      .profile_name = CWT_PROFILE_NAME,
+      .profile_name_size = kProfileNameLength};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_payload_build(
+      &cwt_dice_chain_entry_payload_params, cdi1_entry_payload_buffer,
+      &cdi1_entry_payload_size));
+
+  // Try to generate DiceChainEntryInput, by reusing the cert buffer.
+  size_t cdi1_entry_input_size = kCwtDiceChainEntryInputMaxVariableSizeBytes;
+  if (cdi1_entry_input_size > *cert_size)
+    return kErrorCertInvalidSize;
+  cwt_dice_chain_entry_input_values_t cwt_dice_chain_entry_input_params = {
+      .payload = cdi1_entry_payload_buffer,
+      .payload_size = cdi1_entry_payload_size};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_input_build(
+      &cwt_dice_chain_entry_input_params, cert, &cdi1_entry_input_size));
+
+  // Obtain digest & sign
+  hmac_digest_t tbs_digest;
+  hmac_sha256(cert, cdi1_entry_input_size, &tbs_digest);
+  HARDENED_RETURN_IF_ERROR(
+      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
+  util_p256_signature_le_to_be_convert(curr_tbs_signature.r,
+                                       curr_tbs_signature.s);
+
+  // Build the final DiceEntry
+  cwt_dice_chain_entry_values_t cwt_dice_chain_entry_params = {
+      .payload = cdi1_entry_payload_buffer,
+      .payload_size = cdi1_entry_payload_size,
+      .signature = (uint8_t *)&curr_tbs_signature,
+      .signature_size = sizeof(ecdsa_p256_signature_t)};
+  HARDENED_RETURN_IF_ERROR(cwt_dice_chain_entry_build(
+      &cwt_dice_chain_entry_params, cert, cert_size));
+
+  // Save the CDI_1 private key to OTBN DMEM so it can endorse the next stage.
+  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
+      kDiceKeyCdi1.keygen_seed_idx, kDiceKeyCdi1.type,
+      *kDiceKeyCdi1.keymgr_diversifier));
+
+  return kErrorOk;
+}
+
+static rom_error_t cose_key_check_valid(const uint8_t *cert, size_t cert_size,
+                                        const ecdsa_p256_public_key_t *pubkey,
+                                        hardened_bool_t *cert_valid_output) {
+  if (cert_size < kDiceCwtCoseKeyMinSizeBytes) {
+    return kErrorDiceCwtCoseKeyNotFound;
+  }
+  memcpy(&expected_cose_key_id[kDiceCwtCoseKeyIdHeaderSizeBytes], pubkey->y,
+         sizeof(pubkey->y));
+  cert += cert_size - kDiceCwtCoseKeyIdOffsetBytes - kDiceCwtCoseKeyIdSizeBytes;
+  if (memcmp(cert, expected_cose_key_id, sizeof(expected_cose_key_id)) == 0) {
+    *cert_valid_output = kHardenedBoolTrue;
+  }
+  return kErrorOk;
+}
+
+static rom_error_t cose_sign1_check_valid(const uint8_t *cert, size_t cert_size,
+                                          const hmac_digest_t *pubkey_id,
+                                          hardened_bool_t *cert_valid_output) {
+  if (cert_size < kDiceCwtCoseSign1MinSizeBytes) {
+    return kErrorDiceCwtCoseKeyNotFound;
+  }
+  fill_dice_id_string(
+      (uint8_t *)(pubkey_id->digest),
+      &expected_cose_sign1_id[kDiceCwtCoseSign1IdHeaderSizeBytes]);
+  cert += kDiceCwtCoseSign1IdOffsetBytes;
+  if (memcmp(cert, expected_cose_sign1_id, sizeof(expected_cose_sign1_id)) ==
+      0) {
+    *cert_valid_output = kHardenedBoolTrue;
+  }
+  return kErrorOk;
+}
+
+rom_error_t dice_cert_check_valid(const perso_tlv_cert_obj_t *cert_obj,
+                                  const hmac_digest_t *pubkey_id,
+                                  const ecdsa_p256_public_key_t *pubkey,
+                                  hardened_bool_t *cert_valid_output) {
+  *cert_valid_output = kHardenedBoolFalse;
+
+  const size_t cert_size = cert_obj->cert_body_size;
+  if (cert_size < kDiceCwtMagicSizeBytes) {
+    return kErrorDiceCwtCoseKeyNotFound;
+  }
+
+  const uint8_t *cert = cert_obj->cert_body_p;
+
+  if (*cert == kDiceCwtCoseKeyMagic) {
+    return cose_key_check_valid(cert, cert_size, pubkey, cert_valid_output);
+  } else if (*cert == kDiceCwtCoseSign1Magic) {
+    return cose_sign1_check_valid(cert, cert_size, pubkey_id,
+                                  cert_valid_output);
+  }
+
+  return kErrorDiceCwtCoseKeyNotFound;
+}
diff --git a/sw/device/silicon_creator/lib/cert/dice_cwt_functest.c b/sw/device/silicon_creator/lib/cert/dice_cwt_functest.c
new file mode 100644
index 0000000000000..24581ef556001
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_cwt_functest.c
@@ -0,0 +1,58 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/cert/dice.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+typedef struct test_params {
+  size_t cert_body_size;
+  uint8_t magic_byte;
+} test_params_t;
+
+const uint8_t kDiceCwtCoseKeyMagic = 0xa5;
+const uint8_t kDiceCwtCoseSign1Magic = 0x84;
+
+static const test_params_t kTestCases[] = {{
+                                               0,
+                                               kDiceCwtCoseKeyMagic,
+                                           },
+                                           {
+                                               1,
+                                               kDiceCwtCoseKeyMagic,
+                                           },
+                                           {
+                                               1,
+                                               kDiceCwtCoseSign1Magic,
+                                           }};
+
+status_t invalid_cert_size_test(void) {
+  for (size_t i = 0; i < ARRAYSIZE(kTestCases); ++i) {
+    uint8_t cert_body_p = kTestCases[i].magic_byte;
+    const perso_tlv_cert_obj_t cert_obj = {
+        .cert_body_size = kTestCases[i].cert_body_size,
+        .cert_body_p = &cert_body_p,
+    };
+    const hmac_digest_t pubkey_id = {0};
+    const ecdsa_p256_public_key_t pubkey = {0};
+    hardened_bool_t cert_valid_output = kHardenedBoolFalse;
+    rom_error_t error = dice_cert_check_valid(&cert_obj, &pubkey_id, &pubkey,
+                                              &cert_valid_output);
+    TRY_CHECK(error == kErrorDiceCwtCoseKeyNotFound);
+  }
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, invalid_cert_size_test);
+  return status_ok(result);
+}
diff --git a/sw/device/silicon_creator/lib/cert/dice_keys.c b/sw/device/silicon_creator/lib/cert/dice_keys.c
new file mode 100644
index 0000000000000..ebae009a2df81
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_keys.c
@@ -0,0 +1,75 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
+#include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
+
+// UDS (Creator) attestation key diverisfier constants.
+// Note: versions are always set to 0 so these keys are always valid from the
+// perspective of the keymgr hardware.
+const sc_keymgr_diversification_t kUdsKeymgrDiversifier = {
+    .salt =
+        {
+            0xabffa6a9,
+            0xc781f1ad,
+            0x4c1107ad,
+            0xf9210d85,
+            0x0931f555,
+            0x6c5aef5d,
+            0xb9ba4df0,
+            0x77b248d2,
+        },
+    .version = 0,
+};
+// CDI_0 (OwnerIntermediate) attestation key diverisfier constants.
+const sc_keymgr_diversification_t kCdi0KeymgrDiversifier = {
+    .salt =
+        {
+            0x3e5913c7,
+            0x41156f1d,
+            0x998ddb9f,
+            0xfa334191,
+            0x8a85380e,
+            0xba76ca1a,
+            0xdb17c4a7,
+            0xfb8852dc,
+        },
+    .version = 0,
+};
+// CDI_1 (Owner) attestation key diverisfier constants.
+const sc_keymgr_diversification_t kCdi1KeymgrDiversifier = {
+    .salt =
+        {
+            0x2d12c2e3,
+            0x6acc6876,
+            0x4bfb07ee,
+            0xc45fc414,
+            0x5d4fa9de,
+            0xf295b128,
+            0x50f49882,
+            0xbbdefa29,
+        },
+    .version = 0,
+};
+
+const sc_keymgr_ecc_key_t kDiceKeyUds = {
+    .type = kScKeymgrKeyTypeAttestation,
+    .keygen_seed_idx = kFlashInfoFieldUdsKeySeedIdx,
+    .keymgr_diversifier = &kUdsKeymgrDiversifier,
+    .required_keymgr_state = kScKeymgrStateCreatorRootKey,
+};
+
+const sc_keymgr_ecc_key_t kDiceKeyCdi0 = {
+    .type = kScKeymgrKeyTypeAttestation,
+    .keygen_seed_idx = kFlashInfoFieldCdi0KeySeedIdx,
+    .keymgr_diversifier = &kCdi0KeymgrDiversifier,
+    .required_keymgr_state = kScKeymgrStateOwnerIntermediateKey,
+};
+
+const sc_keymgr_ecc_key_t kDiceKeyCdi1 = {
+    .type = kScKeymgrKeyTypeAttestation,
+    .keygen_seed_idx = kFlashInfoFieldCdi1KeySeedIdx,
+    .keymgr_diversifier = &kCdi1KeymgrDiversifier,
+    .required_keymgr_state = kScKeymgrStateOwnerKey,
+};
diff --git a/sw/device/silicon_creator/lib/cert/dice_keys.h b/sw/device/silicon_creator/lib/cert/dice_keys.h
new file mode 100644
index 0000000000000..c3f52ea4b9a35
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/dice_keys.h
@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_KEYS_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_KEYS_H_
+
+#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
+
+extern const sc_keymgr_ecc_key_t kDiceKeyUds;
+extern const sc_keymgr_ecc_key_t kDiceKeyCdi0;
+extern const sc_keymgr_ecc_key_t kDiceKeyCdi1;
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_DICE_KEYS_H_
diff --git a/sw/device/silicon_creator/lib/cert/template.c b/sw/device/silicon_creator/lib/cert/template.c
new file mode 100644
index 0000000000000..dc7aedddd9248
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/template.c
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/cert/template.h"
+
+#include <limits.h>
+
+static const char kLowercaseHexChars[16] = {'0', '1', '2', '3', '4', '5',
+                                            '6', '7', '8', '9', 'a', 'b',
+                                            'c', 'd', 'e', 'f'};
+
+uint8_t *template_push_hex_impl(uint8_t *out, const uint8_t *bytes,
+                                size_t size) {
+  while (size > 0) {
+    *out++ = (uint8_t)kLowercaseHexChars[bytes[0] >> 4];
+    *out++ = (uint8_t)kLowercaseHexChars[bytes[0] & 0xf];
+    bytes++;
+    size--;
+  }
+  return out;
+}
+
+uint8_t *template_asn1_integer_impl(uint8_t *out, uint8_t tag, bool tweak_msb,
+                                    const uint8_t *bytes_be, size_t size) {
+  *out++ = tag;
+  uint8_t *size_ptr = out++;
+  if (tweak_msb) {
+    *out++ = 0;  // additional zero prefix;
+  } else {
+    while (size > 0 && *bytes_be == 0) {
+      ++bytes_be;
+      --size;
+    }
+    if (size == 0 || *bytes_be > 0x7f) {
+      *out++ = 0;
+    }
+  }
+  memcpy(out, bytes_be, size);
+  if (tweak_msb)
+    out[0] |= 0x80;
+  out += size;
+  *size_ptr = (uint8_t)(out - size_ptr) - 1;
+  return out;
+}
+
+void template_patch_size_be_impl(template_pos_t memo, uint8_t *out_end) {
+  *(uint16_t *)memo = __builtin_bswap16(__builtin_bswap16(*(uint16_t *)memo) +
+                                        (uint16_t)(out_end - (uint8_t *)memo));
+}
diff --git a/sw/device/silicon_creator/lib/cert/template.h b/sw/device/silicon_creator/lib/cert/template.h
new file mode 100644
index 0000000000000..125031b458440
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/template.h
@@ -0,0 +1,301 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TEMPLATE_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TEMPLATE_H_
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Structure holding the state of the template engine.
+ *
+ * The fields in this structure should be considered
+ * private and not be read or written directly.
+ *
+ * The following diagram shows the pointers location during encoding.
+ * Takes Cdi0 TBS as as example:
+ *
+ * Template Const Bytes:
+ *   `kTemplateConstBytes[]`  `const_end`     `+ sizeof(kTemplateConstBytes)`
+ *   | Bytes Copied to Output     |         Unconsumed Template Const Bytes |
+ *
+ * `const_end` pointer will start from offset zero, and increase to
+ * `sizeof(kTemplateConstBytes)` at the end of encoding.
+ *
+ * Output Buffer:
+ *   `out_begin`    `out_end`    `+ kCdi0MaxTbsSizeBytes`
+ *   | Used Bytes       |        Remaining Unused Space |
+ *
+ * `out_begin` pointer will not change.
+ * `out_end` pointer starts from `out_begin` to the actual output size.
+ * The actual size is between [kCdi0MinTbsSizeBytes, kCdi0MaxTbsSizeBytes].
+ */
+typedef struct template_state {
+  // Points to the remaining pre-computed const array from codegen.
+  const uint8_t *const_end;
+  // Points to the original start of the output buffer.
+  const uint8_t *out_begin;
+  // Points to the end of bytes already outputted.
+  uint8_t *out_end;
+} template_state_t;
+
+/**
+ * Pointer to a specific output location.
+ */
+typedef void *template_pos_t;
+
+/**
+ * Initialize the template engine.
+ *
+ * @param state Pointer to the template engine state.
+ * @param out_buf Pointer to a user-provided output buffer.
+ * @param const_bytes Pointer to a pre-generated template bytes.
+ */
+static inline void template_init(template_state_t *state, uint8_t *out_buf,
+                                 const uint8_t *const_bytes) {
+  state->out_begin = state->out_end = out_buf;
+  state->const_end = const_bytes;
+}
+
+/**
+ * Finalize template engine and set the actual output size.
+ *
+ * @param state Pointer to the template engine state.
+ * @return The generated size in bytes.
+ */
+static inline uint16_t template_finalize(template_state_t *state) {
+  return (uint16_t)(state->out_end - state->out_begin);
+}
+
+/**
+ * Set the `value` to the `bit_offset` bit of previous `byte_offset` byte.
+ *
+ * This function assume the corresponding bit is zero before calling, which
+ * is ensured by the template code generator.
+ *
+ * @param state Pointer to the template engine state.
+ * @param byte_offset Number of bytes before the last output bytes.
+ * @param bit_offset Index of the bit to be set.
+ * @param value Set the bit to one when true.
+ */
+static inline void template_set_bit(template_state_t *state, int byte_offset,
+                                    int bit_offset, bool value) {
+  *(state->out_end - byte_offset) |= ((uint8_t) !!value) << bit_offset;
+}
+
+/**
+ * Output a ASN1 DER boolean.
+ *
+ * @param state Pointer to the template engine state.
+ * @param val Value to be output.
+ */
+static inline void template_push_asn1_bool(template_state_t *state, bool val) {
+  *state->out_end = val ? 0xff : 0x00;
+  state->out_end += 1;
+}
+
+/**
+ * Private implementation of `template_push_hex`.
+ *
+ * @param out Pointer to the output buffer.
+ * @param inp Pointer to a byte array.
+ * @param size Number of the bytes in the array.
+ * @return the new end of the output buffer.
+ */
+uint8_t *template_push_hex_impl(uint8_t *out, const uint8_t *inp, size_t size);
+
+/**
+ * Output the buffer as a hex-encoded string.
+ *
+ * @param state Pointer to the template engine state.
+ * @param buf Pointer to a byte array.
+ * @param size Number of the bytes in the array.
+ */
+static inline void template_push_hex(template_state_t *state,
+                                     const uint8_t *buf, size_t size) {
+  state->out_end = template_push_hex_impl(state->out_end, buf, size);
+}
+
+/**
+ * Output the buffer as raw bytes.
+ *
+ * @param state Pointer to the template engine state.
+ * @param buf Pointer to a byte array.
+ * @param size Number of the bytes in the array.
+ */
+static inline void template_push_bytes(template_state_t *state,
+                                       const uint8_t *buf, size_t size) {
+  memcpy(state->out_end, buf, size);
+  state->out_end += size;
+}
+
+/**
+ * Output `size` bytes from the pre-generated template.
+ *
+ * @param state Pointer to the template engine state.
+ * @param size Number of the bytes to output.
+ */
+static inline void template_push_const(template_state_t *state, size_t size) {
+  memcpy(state->out_end, state->const_end, size);
+  state->out_end += size;
+  state->const_end += size;
+}
+
+/**
+ * Private implementation of `template_asn1_integer`.
+ *
+ * @param out Pointer to the output buffer.
+ * @param tag Identifier octet of the tag.
+ * @param tweak_msb Set the MSB before encoding when true.
+ * @param bytes_be Pointer to a byte array holding an integer in big-endian
+ * format.
+ * @param size Size of the `bytes_be` array in bytes.
+ * @return the new end of the output buffer.
+ */
+uint8_t *template_asn1_integer_impl(uint8_t *out, uint8_t tag, bool tweak_msb,
+                                    const uint8_t *bytes_be, size_t size);
+
+/**
+ * Output a tagged integer.
+ *
+ * This function allows the caller to set the tag to a non-standard value which
+ * can be useful for IMPLICIT integers. Use ASN1_TAG_INTEGER for standard
+ * integers.
+ *
+ * @param state Pointer to the template engine state.
+ * @param tag Identifier octet of the tag.
+ * @param tweak_msb Set the MSB before encoding when true.
+ * @param bytes_be Pointer to a byte array holding an integer in big-endian
+ * format.
+ * @param size Size of the `bytes_be` array in bytes.
+ */
+static inline void template_asn1_integer(template_state_t *state, uint8_t tag,
+                                         bool tweak_msb,
+                                         const uint8_t *bytes_be, size_t size) {
+  state->out_end = template_asn1_integer_impl(state->out_end, tag, tweak_msb,
+                                              bytes_be, size);
+}
+
+/**
+ * U32 version of the `template_asn1_integer`.
+ *
+ * @param state Pointer to the template engine state.
+ * @param tag Identifier octet of the tag.
+ * @param tweak_msb Set the MSB before encoding when true.
+ * @param value Integer value.
+ */
+static inline void template_asn1_uint32(template_state_t *state, uint8_t tag,
+                                        bool tweak_msb, uint32_t value) {
+  uint32_t _value = __builtin_bswap32(value);
+  state->out_end = template_asn1_integer_impl(state->out_end, tag, tweak_msb,
+                                              (uint8_t *)&_value, 4);
+}
+
+/**
+ * Memorize a location to be patched with the actual output size.
+ *
+ * The function will saved the address (last output byte + offset) for
+ * patching later, and it should be paired with a `template_patch_size_*`.
+ *
+ * @param state Pointer to the template engine state.
+ * @param offset Number of bytes after the last output byte.
+ * @return the memorized location for calling `template_patch_size_be`.
+ */
+static inline template_pos_t template_save_pos(template_state_t *state,
+                                               ptrdiff_t offset) {
+  return (template_pos_t *)(state->out_end + offset);
+}
+
+/**
+ * Private implementation of `template_patch_size_be`.
+ */
+void template_patch_size_be_impl(template_pos_t memo, uint8_t *out_end);
+
+/**
+ * Add the actual output size after the memo to the patch location.
+ *
+ * The function will perform addition as BE u16 (i.e. mod 65536).
+ *
+ * @param state Pointer to the template engine state.
+ * @param memo The memorized location from `template_save_pos`.
+ */
+static inline void template_patch_size_be(template_state_t *state,
+                                          template_pos_t memo) {
+  template_patch_size_be_impl(memo, state->out_end);
+}
+
+/**
+ * Helpers for writing static assertions on variable array sizes.
+ */
+#define ASSERT_VAR_SIZE_EQ(actual, expected) \
+  static_assert(actual == expected, "Invalid variable size.");
+
+#define ASSERT_VAR_SIZE_GE(actual, expected) \
+  static_assert(actual >= expected, "Invalid variable size.");
+
+#define ASSERT_VAR_SIZE_LE(actual, expected) \
+  static_assert(actual <= expected, "Invalid variable size.");
+
+/**
+ * Check if the given variable is fixed-length.
+ *
+ * @param template The name defined in the hjson template in upper camel case.
+ * @param field The variable name in upper camel case.
+ */
+#define TEMPLATE_ASSERT_FIXED_LENGTH(template, field)    \
+  ASSERT_VAR_SIZE_EQ(k##template##Min##field##SizeBytes, \
+                     k##template##Max##field##SizeBytes);
+
+/**
+ * Check if the given size is within the range defined in the template.
+ *
+ * @param template The name defined in the hjson template in upper camel case.
+ * @param field The variable name in upper camel case.
+ * @param size The size of the variable value in bytes.
+ */
+#define TEMPLATE_CHECK_SIZE(template, field, size)                \
+  ASSERT_VAR_SIZE_GE((size), k##template##Min##field##SizeBytes); \
+  ASSERT_VAR_SIZE_LE((size), k##template##Max##field##SizeBytes);
+
+/**
+ * Set a template variable value and check its size.
+ *
+ * @param params Pointer to the generated *_values_t variable.
+ * @param template The name defined in the hjson template in upper camel case.
+ * @param field The variable name in upper camel case.
+ * @param value The value to set. It should be typed as a fixed size value.
+ */
+#define TEMPLATE_SET(params, template, field, value)      \
+  do {                                                    \
+    TEMPLATE_CHECK_SIZE(template, field, sizeof(value));  \
+    (params).k##template##Field##field = (void *)(value); \
+  } while (0)
+
+/**
+ * Set a template variable with the value array truncated to `size`.
+ *
+ * @param params Pointer to the generated *_values_t variable.
+ * @param template The name defined in the hjson template in upper camel case.
+ * @param field The variable name in upper camel case.
+ * @param value The value to set. It should be typed as a fixed size value.
+ * @param size The size after truncated.
+ */
+#define TEMPLATE_SET_TRUNCATED(params, template, field, value, size) \
+  do {                                                               \
+    ASSERT_VAR_SIZE_GE(sizeof(value), size);                         \
+    TEMPLATE_CHECK_SIZE(template, field, size);                      \
+    (params).k##template##Field##field = (void *)(value);            \
+  } while (0)
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TEMPLATE_H_
diff --git a/sw/device/silicon_creator/lib/cert/tpm.c b/sw/device/silicon_creator/lib/cert/tpm.c
new file mode 100644
index 0000000000000..38482a36abff1
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/tpm.c
@@ -0,0 +1,67 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/cert/tpm.h"
+
+#include <stdint.h>
+
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/cert/template.h"
+#include "sw/device/silicon_creator/lib/cert/tpm_ek.h"  // Generated.
+#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
+
+const sc_keymgr_diversification_t kTpmEkKeymgrDiversifier = {
+    .salt =
+        {
+            0x3fd3bc42,
+            0x5a401205,
+            0xfa3fbe70,
+            0xc1d035da,
+            0x87292fe6,
+            0x4d94f30f,
+            0x2e954c30,
+            0x351c28f1,
+        },
+    .version = 0,
+};
+const sc_keymgr_ecc_key_t kTpmKeyEk = {
+    .type = kScKeymgrKeyTypeSealing,
+    .keygen_seed_idx = kFlashInfoFieldTpmEkKeySeedIdx,
+    .keymgr_diversifier = &kTpmEkKeymgrDiversifier,
+    .required_keymgr_state = kScKeymgrStateOwnerKey,
+};
+
+rom_error_t tpm_ek_tbs_cert_build(cert_key_id_pair_t *key_ids,
+                                  ecdsa_p256_public_key_t *tpm_ek_pubkey,
+                                  uint8_t *tpm_ek_tbs,
+                                  size_t *tpm_ek_tbs_size) {
+  // We initialize these strings with character arrays (as opposed to the more
+  // readable string literal) as we need them to be non-null terminated.
+  // Additionally, they are not declared `const` as the TBS cert generator does
+  // not accept const params.
+  static char tpm_version[] = {'0', '.', '0', '.', '1'};
+  static char tpm_vendor[] = {'N', 'u', 'v', 'o', 't', 'o', 'n'};
+  static char tpm_model[] = {'T', 'i', '5', '0'};
+
+  tpm_ek_tbs_values_t tpm_ek_tbs_params = {0};
+
+  TEMPLATE_SET(tpm_ek_tbs_params, TpmEk, TpmEkPubKeyEcX, tpm_ek_pubkey->x);
+  TEMPLATE_SET(tpm_ek_tbs_params, TpmEk, TpmEkPubKeyEcY, tpm_ek_pubkey->y);
+  TEMPLATE_SET(tpm_ek_tbs_params, TpmEk, TpmVersion, tpm_version);
+  TEMPLATE_SET(tpm_ek_tbs_params, TpmEk, TpmVendor, tpm_vendor);
+  TEMPLATE_SET(tpm_ek_tbs_params, TpmEk, TpmModel, tpm_model);
+
+  TEMPLATE_SET_TRUNCATED(tpm_ek_tbs_params, TpmEk, AuthKeyKeyId,
+                         key_ids->endorsement->digest, kCertKeyIdSizeInBytes);
+  TEMPLATE_SET_TRUNCATED(tpm_ek_tbs_params, TpmEk, TpmEkPubKeyId,
+                         key_ids->cert->digest, kCertKeyIdSizeInBytes);
+
+  HARDENED_RETURN_IF_ERROR(
+      tpm_ek_build_tbs(&tpm_ek_tbs_params, tpm_ek_tbs, tpm_ek_tbs_size));
+
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/lib/cert/tpm.h b/sw/device/silicon_creator/lib/cert/tpm.h
new file mode 100644
index 0000000000000..f7a0fa619d5b5
--- /dev/null
+++ b/sw/device/silicon_creator/lib/cert/tpm.h
@@ -0,0 +1,69 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TPM_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TPM_H_
+
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+
+/**
+ * TPM ECC key descriptors.
+ */
+extern const sc_keymgr_ecc_key_t kTpmKeyEk;
+extern const sc_keymgr_ecc_key_t kTpmKeyCek;
+extern const sc_keymgr_ecc_key_t kTpmKeyCik;
+
+/**
+ * Generates an X.509 TBS section of a TPM EK certificate.
+ *
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param tpm_ek_pubkey Pointer to the TPM EK public key in big endian.
+ * @param[out] tbs_cert Buffer to hold the generated TBS section.
+ * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
+ *                              is the size of the allocated cert_buf, output
+ *                              value final computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t tpm_ek_tbs_cert_build(cert_key_id_pair_t *key_ids,
+                                  ecdsa_p256_public_key_t *tpm_ek_pubkey,
+                                  uint8_t *tbs_cert, size_t *tbs_cert_size);
+
+/**
+ * Generates an X.509 TBS section of a TPM CEK certificate.
+ *
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param tpm_cek_pubkey Pointer to the TPM CEK public key in big endian.
+ * @param[out] tbs_cert Buffer to hold the generated UDS section.
+ * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
+ *                              is the size of the allocated cert_buf, output
+ *                              value final computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t tpm_cek_tbs_cert_build(cert_key_id_pair_t *key_ids,
+                                   ecdsa_p256_public_key_t *tpm_cek_pubkey,
+                                   uint8_t *tbs_cert, size_t *tbs_cert_size);
+
+/**
+ * Generates an X.509 TBS section of a TPM CIK certificate.
+ *
+ * @param key_ids Pointer to the (current and endorsement) public key IDs.
+ * @param tpm_cik_pubkey Pointer to the TPM CIK public key in big endian.
+ * @param[out] tbs_cert Buffer to hold the generated UDS section.
+ * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
+ *                              is the size of the allocated cert_buf, output
+ *                              value final computed size of the certificate).
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t tpm_cik_tbs_cert_build(cert_key_id_pair_t *key_ids,
+                                   ecdsa_p256_public_key_t *tpm_cik_pubkey,
+                                   uint8_t *tbs_cert, size_t *tbs_cert_size);
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CERT_TPM_H_
diff --git a/sw/device/silicon_creator/lib/cert/tpm_cek.hjson b/sw/device/silicon_creator/lib/cert/tpm_cek.hjson
deleted file mode 100644
index 417d3bcf75919..0000000000000
--- a/sw/device/silicon_creator/lib/cert/tpm_cek.hjson
+++ /dev/null
@@ -1,80 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-{
-    name: "tpm_cek",
-
-    variables: {
-        // CEK certificate public key: this is an EC point on
-        // the prime256v1 curve so it has two components
-        // (x and y) which are 32-bytes integers.
-        tpm_cek_pub_key_ec_x: {
-            type: "integer",
-            size: 32,
-        },
-        tpm_cek_pub_key_ec_y: {
-            type: "integer",
-            size: 32,
-        },
-        // Intermediate CA public key ID: this is a 20-byte hash
-        // derived from the creator public key.
-        tpm_cek_pub_key_id: {
-            type: "byte-array",
-            size: 20,
-        },
-        // Authority key ID: this is the identifier of
-        // the key that will be used to sign this certificate
-        // offline.
-        auth_key_key_id: {
-            type: "byte-array",
-            size: 20,
-        },
-        // Certificate signature: the result of signing with ECDSA
-        // are two integers named "r" and "s"
-        cert_signature_r: {
-            type: "integer",
-            size: 32,
-        },
-        cert_signature_s: {
-            type: "integer",
-            size: 32,
-        },
-    },
-
-    certificate: {
-        serial_number: { var: "tpm_cek_pub_key_id", convert: "big-endian" },
-        issuer: [
-            { country: "US" },
-            { state: "CA" },
-            { organization: "Google" },
-            { organizational_unit: "Engineering" },
-            { common_name: "Google Engineering ICA" },
-        ],
-        not_before: "20230101000000Z",
-        not_after: "20500101000000Z",
-        subject: [
-            { country: "US" },
-            { state: "CA" },
-            { organization: "Google" },
-            { organizational_unit: "Engineering" },
-            { common_name: "OT Ti50 TPM CEK" },
-        ],
-        subject_public_key_info: {
-            algorithm: "ec-public-key",
-            curve: "prime256v1",
-            public_key: {
-                x: { var: "tpm_cek_pub_key_ec_x" },
-                y: { var: "tpm_cek_pub_key_ec_y" },
-            },
-        },
-        authority_key_identifier: { var: "auth_key_key_id" },
-        subject_key_identifier: { var: "tpm_cek_pub_key_id" },
-        signature: {
-            algorithm: "ecdsa-with-sha256",
-            value: {
-                r: { var: "cert_signature_r" },
-                s: { var: "cert_signature_s" }
-            }
-        }
-    }
-}
diff --git a/sw/device/silicon_creator/lib/cert/tpm_cik.hjson b/sw/device/silicon_creator/lib/cert/tpm_cik.hjson
deleted file mode 100644
index 4ee7acc01ab3c..0000000000000
--- a/sw/device/silicon_creator/lib/cert/tpm_cik.hjson
+++ /dev/null
@@ -1,80 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-{
-    name: "tpm_cik",
-
-    variables: {
-        // CIK certificate public key: this is an EC point on
-        // the prime256v1 curve so it has two components
-        // (x and y) which are 32-bytes integers.
-        tpm_cik_pub_key_ec_x: {
-            type: "integer",
-            size: 32,
-        },
-        tpm_cik_pub_key_ec_y: {
-            type: "integer",
-            size: 32,
-        },
-        // Intermediate CA public key ID: this is a 20-byte hash
-        // derived from the creator public key.
-        tpm_cik_pub_key_id: {
-            type: "byte-array",
-            size: 20,
-        },
-        // Authority key ID: this is the identifier of
-        // the key that will be used to sign this certificate
-        // offline.
-        auth_key_key_id: {
-            type: "byte-array",
-            size: 20,
-        },
-        // Certificate signature: the result of signing with ECDSA
-        // are two integers named "r" and "s"
-        cert_signature_r: {
-            type: "integer",
-            size: 32,
-        },
-        cert_signature_s: {
-            type: "integer",
-            size: 32,
-        },
-    },
-
-    certificate: {
-        serial_number: { var: "tpm_cik_pub_key_id", convert: "big-endian" },
-        issuer: [
-            { country: "US" },
-            { state: "CA" },
-            { organization: "Google" },
-            { organizational_unit: "Engineering" },
-            { common_name: "Google Engineering ICA" },
-        ],
-        not_before: "20230101000000Z",
-        not_after: "20500101000000Z",
-        subject: [
-            { country: "US" },
-            { state: "CA" },
-            { organization: "Google" },
-            { organizational_unit: "Engineering" },
-            { common_name: "OT Ti50 TPM CIK" },
-        ],
-        subject_public_key_info: {
-            algorithm: "ec-public-key",
-            curve: "prime256v1",
-            public_key: {
-                x: { var: "tpm_cik_pub_key_ec_x" },
-                y: { var: "tpm_cik_pub_key_ec_y" },
-            },
-        },
-        authority_key_identifier: { var: "auth_key_key_id" },
-        subject_key_identifier: { var: "tpm_cik_pub_key_id" },
-        signature: {
-            algorithm: "ecdsa-with-sha256",
-            value: {
-                r: { var: "cert_signature_r" },
-                s: { var: "cert_signature_s" }
-            }
-        }
-    }
-}
diff --git a/sw/device/silicon_creator/lib/cert/tpm_ek.hjson b/sw/device/silicon_creator/lib/cert/tpm_ek.hjson
index a21ff500af379..6866a5ae96f4e 100644
--- a/sw/device/silicon_creator/lib/cert/tpm_ek.hjson
+++ b/sw/device/silicon_creator/lib/cert/tpm_ek.hjson
@@ -8,48 +8,52 @@
         // EK certificate public key: this is an EC point on
         // the prime256v1 curve so it has two components
         // (x and y) which are 32-bytes integers.
+        // Also, 32-byte unsigned integers may be encoded to
+        // 33-byte in ASN.1.
         tpm_ek_pub_key_ec_x: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         tpm_ek_pub_key_ec_y: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         // Intermediate CA public key ID: this is a 20-byte hash
         // derived from the creator public key.
         tpm_ek_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Authority key ID: this is the identifier of
         // the key that will be used to sign this certificate
         // offline.
         auth_key_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Certificate signature: the result of signing with ECDSA
         // are two integers named "r" and "s"
         cert_signature_r: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         cert_signature_s: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         tpm_vendor: {
             type: "string",
-            size: 100,
+            range-size: [0, 19],
         },
         tpm_model: {
             type: "string",
-            size: 100,
+            range-size: [0, 19],
         },
         tpm_version: {
             type: "string",
-            size: 100,
+            range-size: [0, 19],
         },
     },
 
@@ -82,6 +86,7 @@
         authority_key_identifier: { var: "auth_key_key_id" },
         subject_key_identifier: { var: "tpm_ek_pub_key_id" },
         basic_constraints: { ca: false },
+        key_usage: { cert_sign: true },
         subject_alt_name: [
             { tpm_vendor: { var: "tpm_vendor" } },
             { tpm_model: { var: "tpm_model" } },
diff --git a/sw/device/silicon_creator/lib/cert/uds.hjson b/sw/device/silicon_creator/lib/cert/uds.hjson
index 6a9ec3621b1df..e6485c427a582 100644
--- a/sw/device/silicon_creator/lib/cert/uds.hjson
+++ b/sw/device/silicon_creator/lib/cert/uds.hjson
@@ -10,44 +10,46 @@
         // (x and y) which are 32-bytes integers.
         creator_pub_key_ec_x: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         creator_pub_key_ec_y: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         // Creator public key ID: this is a 20-byte hash
         // derived from the creator public key.
         creator_pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Authority key ID: this is the identifier of
         // the key that will be used to sign this certificate
         // offline.
         auth_key_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         // Hash of the creator_sw_cfg OTP partition (SHA256).
         otp_creator_sw_cfg_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // Hash of the owner_sw_cfg OTP partition (SHA256).
         otp_owner_sw_cfg_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // Hash of the rot_creator_auth_codesign OTP partition (SHA256).
         otp_rot_creator_auth_codesign_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // Hash of the rot_creator_auth_state OTP partition (SHA256).
         otp_rot_creator_auth_state_hash: {
             type: "byte-array",
-            size: 32,
+            exact-size: 32,
         },
         // Debug (whether LC state exposes JTAG access or not).
         debug_flag: {
@@ -57,11 +59,11 @@
         // are two integers named "r" and "s"
         cert_signature_r: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         cert_signature_s: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         }
     },
 
@@ -98,6 +100,7 @@
         // https://pigweed.googlesource.com/open-dice/+/refs/heads/main/docs/specification.md#certificate-details
         // The standard extensions are fixed by the specification.
         basic_constraints: { ca: true },
+        key_usage: { cert_sign: true },
         private_extensions: [
             {
                 type: "dice_tcb_info",
diff --git a/sw/device/silicon_creator/lib/chip_info.h b/sw/device/silicon_creator/lib/chip_info.h
deleted file mode 100644
index dc68389b60ea9..0000000000000
--- a/sw/device/silicon_creator/lib/chip_info.h
+++ /dev/null
@@ -1,60 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CHIP_INFO_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CHIP_INFO_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/macros.h"
-
-/**
- * A truncated commit hash from the open-source OpenTitan repo that can be
- * used to reproduce the ROM binary.
- */
-typedef struct chip_info_scm_revision {
-  /**
-   * Least significant word of the truncated commit hash.
-   */
-  uint32_t scm_revision_low;
-  /**
-   * Most significant word of the truncated commit hash.
-   */
-  uint32_t scm_revision_high;
-} chip_info_scm_revision_t;
-
-typedef struct chip_info {
-  /**
-   * Truncated commit hash.
-   */
-  chip_info_scm_revision_t scm_revision;
-  /**
-   * Chip info format version.
-   *
-   * The chip info struct is placed at the end of the ROM. Placing this field at
-   * the end of the struct places the version word at the last addressable ROM
-   * address, which gives later boot stages a fixed address to look for this
-   * field. See `sw/device/silicon_creator/rom/rom.ld` for details.
-   */
-  uint32_t version;
-} chip_info_t;
-OT_ASSERT_MEMBER_OFFSET(chip_info_t, scm_revision, 0);
-OT_ASSERT_MEMBER_OFFSET(chip_info_t, version, 8);
-OT_ASSERT_SIZE(chip_info_t, 12);
-
-enum {
-  /**
-   * Chip info format version 1 value.
-   */
-  kChipInfoVersion1 = 0x4efecea6,
-};
-
-/**
- * Extern declaration for the `kChipInfo` instance placed at the end of ROM.
- *
- * The actual definition is in an auto-generated file.
- */
-extern const chip_info_t kChipInfo;
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_CHIP_INFO_H_
diff --git a/sw/device/silicon_creator/lib/dbg_print.c b/sw/device/silicon_creator/lib/dbg_print.c
index 1a5792fdb6dd4..b1e6420366aa0 100644
--- a/sw/device/silicon_creator/lib/dbg_print.c
+++ b/sw/device/silicon_creator/lib/dbg_print.c
@@ -9,6 +9,10 @@
 #include <stdbool.h>
 #include <stdint.h>
 
+#ifndef OT_PLATFORM_RV32
+#include <stdio.h>
+#endif
+
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/csr.h"
 #include "sw/device/silicon_creator/lib/drivers/uart.h"
@@ -16,6 +20,7 @@
 
 static const char kHexTable[16] = "0123456789abcdef";
 
+#if defined(OT_PLATFORM_RV32) || defined(DBG_PRINT_UNIT_TEST_)
 static void print_integer(unsigned value, bool is_signed) {
   char buf[12];
   char *b = buf + sizeof(buf);
@@ -33,6 +38,12 @@ static void print_integer(unsigned value, bool is_signed) {
   }
 }
 
+void dbg_puts(const char *str) {
+  while (*str) {
+    uart_putchar(*str++);
+  }
+}
+
 void dbg_printf(const char *format, ...) {
   va_list args;
   va_start(args, format);
@@ -105,6 +116,19 @@ void dbg_printf(const char *format, ...) {
   va_end(args);
 }
 
+#else  // defined(OT_PLATFORM_RV32) || defined(DBG_PRINT_UNIT_TEST_)
+
+void dbg_puts(const char *str) { puts(str); }
+
+void dbg_printf(const char *format, ...) {
+  va_list args;
+  va_start(args, format);
+  vprintf(format, args);
+  va_end(args);
+}
+
+#endif  // defined(OT_PLATFORM_RV32) || defined(DBG_PRINT_UNIT_TEST_)
+
 void dbg_print_epmp(void) {
   uint32_t pmpaddr[16];
   uint32_t pmpcfg[4];
diff --git a/sw/device/silicon_creator/lib/dbg_print.h b/sw/device/silicon_creator/lib/dbg_print.h
index 06c9709833008..547bf2ab5a1d6 100644
--- a/sw/device/silicon_creator/lib/dbg_print.h
+++ b/sw/device/silicon_creator/lib/dbg_print.h
@@ -40,6 +40,14 @@ extern "C" {
  */
 void dbg_printf(const char *format, ...) __attribute__((format(printf, 1, 2)));
 
+/**
+ * Print the string to the console.
+ *
+ * Note: `dbg_puts` will NOT output an additional newline character '\n' after
+ * `str`, unlike the standard C puts.
+ */
+void dbg_puts(const char *str);
+
 /**
  * Print the ePMP configuration to the console.
  */
diff --git a/sw/device/silicon_creator/lib/dbg_print_unittest.cc b/sw/device/silicon_creator/lib/dbg_print_unittest.cc
index 3237355a8ab08..b904210369589 100644
--- a/sw/device/silicon_creator/lib/dbg_print_unittest.cc
+++ b/sw/device/silicon_creator/lib/dbg_print_unittest.cc
@@ -69,6 +69,20 @@ TEST(LogTest, PrintfHex) {
   EXPECT_EQ(*uart_buf, "0x0102030405060708");
 }
 
+TEST(LogTest, PrintfPointer) {
+  uart_buf->clear();
+  dbg_printf("%p", 0xabcdef01);
+  EXPECT_EQ(*uart_buf, "abcdef01");
+
+  uart_buf->clear();
+  dbg_printf("%p", 0);
+  EXPECT_EQ(*uart_buf, "00000000");
+
+  uart_buf->clear();
+  dbg_printf("0x%p%p", 0x01020304, 0x05060708);
+  EXPECT_EQ(*uart_buf, "0x0102030405060708");
+}
+
 TEST(LogTest, PrintfString) {
   uart_buf->clear();
   dbg_printf("Hello, %s!", "World");
@@ -83,6 +97,17 @@ TEST(LogTest, PrintfString) {
   EXPECT_EQ(*uart_buf, "ABC");
 }
 
+TEST(LogTest, PutsString) {
+  uart_buf->clear();
+  dbg_puts("Hello, %s!");
+  // It should NOT be formatted.
+  EXPECT_EQ(*uart_buf, "Hello, %s!");
+
+  uart_buf->clear();
+  dbg_puts("OpenTitan");
+  EXPECT_EQ(*uart_buf, "OpenTitan");
+}
+
 TEST(LogTest, PrintfMix) {
   uart_buf->clear();
   dbg_printf("%s%x", "OpenTitan", 0x0000000a);
diff --git a/sw/device/silicon_creator/lib/dice.c b/sw/device/silicon_creator/lib/dice.c
deleted file mode 100644
index f86562393f438..0000000000000
--- a/sw/device/silicon_creator/lib/dice.c
+++ /dev/null
@@ -1,412 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/lib/dice.h"
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/lib/testing/json/provisioning_data.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/silicon_creator/lib/attestation.h"
-#include "sw/device/silicon_creator/lib/attestation_key_diversifiers.h"
-#include "sw/device/silicon_creator/lib/cert/cdi_0.h"    // Generated.
-#include "sw/device/silicon_creator/lib/cert/cdi_1.h"    // Generated.
-#include "sw/device/silicon_creator/lib/cert/tpm_cek.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/tpm_cik.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/tpm_ek.h"   // Generated.
-#include "sw/device/silicon_creator/lib/cert/uds.h"      // Generated.
-#include "sw/device/silicon_creator/lib/drivers/hmac.h"
-#include "sw/device/silicon_creator/lib/drivers/keymgr.h"
-#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
-#include "sw/device/silicon_creator/lib/drivers/otp.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
-
-#include "otp_ctrl_regs.h"  // Generated.
-
-enum {
-  /**
-   * Size of the largest OTP partition to be measured.
-   */
-  kDiceMeasuredOtpPartitionMaxSizeIn32bitWords =
-      (OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
-       OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
-      sizeof(uint32_t),
-};
-
-static uint32_t otp_state[kDiceMeasuredOtpPartitionMaxSizeIn32bitWords] = {0};
-static ecdsa_p256_signature_t curr_tbs_signature = {.r = {0}, .s = {0}};
-static uint8_t cdi_0_tbs_buffer[kCdi0MaxTbsSizeBytes];
-static cdi_0_sig_values_t cdi_0_cert_params = {
-    .tbs = cdi_0_tbs_buffer,
-    .tbs_size = kCdi0MaxTbsSizeBytes,
-};
-static uint8_t cdi_1_tbs_buffer[kCdi1MaxTbsSizeBytes];
-static cdi_1_sig_values_t cdi_1_cert_params = {
-    .tbs = cdi_1_tbs_buffer,
-    .tbs_size = kCdi1MaxTbsSizeBytes,
-};
-
-// clang-format off
-static_assert(
-    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE &&
-    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE &&
-    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE,
-    "The largest DICE measured OTP partition is no longer the "
-    "OwnerSwCfg partition. Update the "
-    "kDiceMeasuredOtpPartitionMaxSizeIn32bitWords constant.");
-// clang-format on
-
-static_assert(kDiceMeasurementSizeInBytes == 32,
-              "The DICE attestation measurement size should equal the size of "
-              "the keymgr binding registers.");
-
-/**
- * Returns true if debug (JTAG) access is exposed in the current LC state.
- */
-static bool is_debug_exposed(void) {
-  lifecycle_state_t lc_state = lifecycle_state_get();
-  if (lc_state == kLcStateProd || lc_state == kLcStateProdEnd) {
-    return false;
-  }
-  return true;
-}
-
-/**
- * Helper function to convert a buffer of bytes from little to big endian in
- * place.
- */
-static void le_be_buf_format(unsigned char *buf, size_t num_bytes) {
-  unsigned char temp;
-  for (size_t i = 0; i < (num_bytes / 2); ++i) {
-    temp = buf[i];
-    buf[i] = buf[num_bytes - i - 1];
-    buf[num_bytes - i - 1] = temp;
-  }
-}
-
-/**
- * Helper function to convert an attestation public key from little to big
- * endian in place.
- */
-static void curr_pubkey_le_to_be_convert(ecdsa_p256_public_key_t *pubkey) {
-  le_be_buf_format((unsigned char *)pubkey->x, kEcdsaP256PublicKeyCoordBytes);
-  le_be_buf_format((unsigned char *)pubkey->y, kEcdsaP256PublicKeyCoordBytes);
-}
-
-rom_error_t dice_attestation_keygen(dice_key_t desired_key,
-                                    hmac_digest_t *pubkey_id,
-                                    ecdsa_p256_public_key_t *pubkey) {
-  otbn_boot_attestation_key_type_t key_type;
-  attestation_key_seed_t otbn_ecc_keygen_seed;
-  const sc_keymgr_diversification_t *keymgr_diversifier;
-  sc_keymgr_state_t desired_keymgr_state;
-
-  switch (desired_key) {
-    case kDiceKeyUds:
-      desired_keymgr_state = kScKeymgrStateCreatorRootKey;
-      key_type = kOtbnBootAttestationKeyTypeDice;
-      keymgr_diversifier = &kUdsKeymgrDiversifier;
-      otbn_ecc_keygen_seed = kUdsAttestationKeySeed;
-      break;
-    case kDiceKeyCdi0:
-      desired_keymgr_state = kScKeymgrStateOwnerIntermediateKey;
-      key_type = kOtbnBootAttestationKeyTypeDice;
-      keymgr_diversifier = &kCdi0KeymgrDiversifier;
-      otbn_ecc_keygen_seed = kCdi0AttestationKeySeed;
-      break;
-    case kDiceKeyCdi1:
-      desired_keymgr_state = kScKeymgrStateOwnerKey;
-      key_type = kOtbnBootAttestationKeyTypeDice;
-      keymgr_diversifier = &kCdi1KeymgrDiversifier;
-      otbn_ecc_keygen_seed = kCdi1AttestationKeySeed;
-      break;
-    case kDiceKeyTpmEk:
-      desired_keymgr_state = kScKeymgrStateOwnerKey;
-      key_type = kOtbnBootAttestationKeyTypeTpm;
-      keymgr_diversifier = &kTpmEkKeymgrDiversifier;
-      otbn_ecc_keygen_seed = kTpmEkAttestationKeySeed;
-      break;
-    case kDiceKeyTpmCek:
-      desired_keymgr_state = kScKeymgrStateOwnerKey;
-      key_type = kOtbnBootAttestationKeyTypeTpm;
-      keymgr_diversifier = &kTpmCekKeymgrDiversifier;
-      otbn_ecc_keygen_seed = kTpmCekAttestationKeySeed;
-      break;
-    case kDiceKeyTpmCik:
-      desired_keymgr_state = kScKeymgrStateOwnerKey;
-      key_type = kOtbnBootAttestationKeyTypeTpm;
-      keymgr_diversifier = &kTpmCikKeymgrDiversifier;
-      otbn_ecc_keygen_seed = kTpmCikAttestationKeySeed;
-      break;
-    default:
-      return kErrorDiceInvalidKeyType;
-  };
-
-  HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(desired_keymgr_state));
-
-  // Generate / sideload key material into OTBN, and generate the ECC keypair.
-  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_keygen(
-      otbn_ecc_keygen_seed, key_type, *keymgr_diversifier, pubkey));
-
-  // Keys are represented in certificates in big endian format, but the key is
-  // output from OTBN in little endian format, so we convert the key to
-  // big endian format.
-  curr_pubkey_le_to_be_convert(pubkey);
-
-  // Generate the key ID.
-  //
-  // Note: the certificate generation functions expect the digest to be in big
-  // endian form, but the HMAC driver returns the digest in little endian, so we
-  // re-format it.
-  hmac_sha256(pubkey, kEcdsaP256PublicKeyCoordBytes * 2, pubkey_id);
-  le_be_buf_format((unsigned char *)pubkey_id, kHmacDigestNumBytes);
-
-  return kErrorOk;
-}
-
-/**
- * Helper function to convert an attestation certificate signature from little
- * to big endian.
- */
-static void curr_tbs_signature_le_to_be_convert(ecdsa_p256_signature_t *sig) {
-  le_be_buf_format((unsigned char *)sig->r, kEcdsaP256SignatureComponentBytes);
-  le_be_buf_format((unsigned char *)sig->s, kEcdsaP256SignatureComponentBytes);
-}
-
-/**
- * Helper function to compute measurements of various OTP partitions that are to
- * be included in attestation certificates.
- */
-static void measure_otp_partition(otp_partition_t partition,
-                                  hmac_digest_t *measurement) {
-  // Compute the digest.
-  otp_dai_read(partition, /*address=*/0, otp_state,
-               kOtpPartitions[partition].size / sizeof(uint32_t));
-  hmac_sha256(otp_state, kOtpPartitions[partition].size, measurement);
-
-  // Check the digest matches what is stored in OTP.
-  // TODO(#21554): remove this conditional once the root keys and key policies
-  // have been provisioned. Until then, these partitions have not been locked.
-  if (partition == kOtpPartitionCreatorSwCfg ||
-      partition == kOtpPartitionOwnerSwCfg) {
-    uint64_t expected_digest = otp_partition_digest_read(partition);
-    uint32_t digest_hi = expected_digest >> 32;
-    uint32_t digest_lo = expected_digest & UINT32_MAX;
-    HARDENED_CHECK_EQ(digest_hi, measurement->digest[1]);
-    HARDENED_CHECK_EQ(digest_lo, measurement->digest[0]);
-  }
-}
-
-rom_error_t dice_uds_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                    ecdsa_p256_public_key_t *uds_pubkey,
-                                    uint8_t *tbs_cert, size_t *tbs_cert_size) {
-  // Measure OTP partitions.
-  //
-  // Note: we do not measure HwCfg0 as this is the Device ID, which is already
-  // mixed into the keyladder directly via hardware channels.
-  hmac_digest_t otp_creator_sw_cfg_measurement = {.digest = {0}};
-  hmac_digest_t otp_owner_sw_cfg_measurement = {.digest = {0}};
-  hmac_digest_t otp_rot_creator_auth_codesign_measurement = {.digest = {0}};
-  hmac_digest_t otp_rot_creator_auth_state_measurement = {.digest = {0}};
-  measure_otp_partition(kOtpPartitionCreatorSwCfg,
-                        &otp_creator_sw_cfg_measurement);
-  measure_otp_partition(kOtpPartitionOwnerSwCfg, &otp_owner_sw_cfg_measurement);
-  measure_otp_partition(kOtpPartitionRotCreatorAuthCodesign,
-                        &otp_rot_creator_auth_codesign_measurement);
-  measure_otp_partition(kOtpPartitionRotCreatorAuthState,
-                        &otp_rot_creator_auth_state_measurement);
-
-  // Generate the TBS certificate.
-  uds_tbs_values_t uds_cert_tbs_params = {
-      .otp_creator_sw_cfg_hash =
-          (unsigned char *)otp_creator_sw_cfg_measurement.digest,
-      .otp_creator_sw_cfg_hash_size = kHmacDigestNumBytes,
-      .otp_owner_sw_cfg_hash =
-          (unsigned char *)otp_owner_sw_cfg_measurement.digest,
-      .otp_owner_sw_cfg_hash_size = kHmacDigestNumBytes,
-      .otp_rot_creator_auth_codesign_hash =
-          (unsigned char *)otp_rot_creator_auth_codesign_measurement.digest,
-      .otp_rot_creator_auth_codesign_hash_size = kHmacDigestNumBytes,
-      .otp_rot_creator_auth_state_hash =
-          (unsigned char *)otp_rot_creator_auth_state_measurement.digest,
-      .otp_rot_creator_auth_state_hash_size = kHmacDigestNumBytes,
-      .debug_flag = is_debug_exposed(),
-      .creator_pub_key_id = (unsigned char *)key_ids->cert->digest,
-      .creator_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .auth_key_key_id = (unsigned char *)key_ids->endorsement->digest,
-      .auth_key_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .creator_pub_key_ec_x = (unsigned char *)uds_pubkey->x,
-      .creator_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .creator_pub_key_ec_y = (unsigned char *)uds_pubkey->y,
-      .creator_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-  };
-  HARDENED_RETURN_IF_ERROR(
-      uds_build_tbs(&uds_cert_tbs_params, tbs_cert, tbs_cert_size));
-
-  return kErrorOk;
-}
-
-rom_error_t dice_cdi_0_cert_build(hmac_digest_t *rom_ext_measurement,
-                                  uint32_t rom_ext_security_version,
-                                  dice_cert_key_id_pair_t *key_ids,
-                                  ecdsa_p256_public_key_t *cdi_0_pubkey,
-                                  uint8_t *cert, size_t *cert_size) {
-  // Generate the TBS certificate.
-  cdi_0_tbs_values_t cdi_0_cert_tbs_params = {
-      .rom_ext_hash = (unsigned char *)rom_ext_measurement->digest,
-      .rom_ext_hash_size = kDiceMeasurementSizeInBytes,
-      .rom_ext_security_version = rom_ext_security_version,
-      .owner_intermediate_pub_key_id = (unsigned char *)key_ids->cert->digest,
-      .owner_intermediate_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .creator_pub_key_id = (unsigned char *)key_ids->endorsement->digest,
-      .creator_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .owner_intermediate_pub_key_ec_x = (unsigned char *)cdi_0_pubkey->x,
-      .owner_intermediate_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .owner_intermediate_pub_key_ec_y = (unsigned char *)cdi_0_pubkey->y,
-      .owner_intermediate_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-  };
-  HARDENED_RETURN_IF_ERROR(cdi_0_build_tbs(&cdi_0_cert_tbs_params,
-                                           cdi_0_cert_params.tbs,
-                                           &cdi_0_cert_params.tbs_size));
-
-  // Sign the TBS and generate the certificate.
-  hmac_digest_t tbs_digest;
-  hmac_sha256(cdi_0_cert_params.tbs, cdi_0_cert_params.tbs_size, &tbs_digest);
-  HARDENED_RETURN_IF_ERROR(
-      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
-  curr_tbs_signature_le_to_be_convert(&curr_tbs_signature);
-  cdi_0_cert_params.cert_signature_r = (unsigned char *)curr_tbs_signature.r;
-  cdi_0_cert_params.cert_signature_r_size = kAttestationSignatureBytes / 2;
-  cdi_0_cert_params.cert_signature_s = (unsigned char *)curr_tbs_signature.s;
-  cdi_0_cert_params.cert_signature_s_size = kAttestationSignatureBytes / 2;
-  HARDENED_RETURN_IF_ERROR(
-      cdi_0_build_cert(&cdi_0_cert_params, cert, cert_size));
-
-  // Save the CDI_0 private key to OTBN DMEM so it can endorse the next stage.
-  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kCdi0AttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kCdi0KeymgrDiversifier));
-
-  return kErrorOk;
-}
-
-rom_error_t dice_cdi_1_cert_build(hmac_digest_t *owner_measurement,
-                                  hmac_digest_t *owner_manifest_measurement,
-                                  uint32_t owner_security_version,
-                                  dice_cert_key_id_pair_t *key_ids,
-                                  ecdsa_p256_public_key_t *cdi_1_pubkey,
-                                  uint8_t *cert, size_t *cert_size) {
-  // Generate the TBS certificate.
-  cdi_1_tbs_values_t cdi_1_cert_tbs_params = {
-      .owner_hash = (unsigned char *)owner_measurement->digest,
-      .owner_hash_size = kDiceMeasurementSizeInBytes,
-      .owner_manifest_hash =
-          (unsigned char *)owner_manifest_measurement->digest,
-      .owner_manifest_hash_size = kDiceMeasurementSizeInBytes,
-      .owner_security_version = owner_security_version,
-      .owner_pub_key_id = (unsigned char *)key_ids->cert->digest,
-      .owner_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .owner_intermediate_pub_key_id =
-          (unsigned char *)key_ids->endorsement->digest,
-      .owner_intermediate_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .owner_pub_key_ec_x = (unsigned char *)cdi_1_pubkey->x,
-      .owner_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .owner_pub_key_ec_y = (unsigned char *)cdi_1_pubkey->y,
-      .owner_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-  };
-  HARDENED_RETURN_IF_ERROR(cdi_1_build_tbs(&cdi_1_cert_tbs_params,
-                                           cdi_1_cert_params.tbs,
-                                           &cdi_1_cert_params.tbs_size));
-
-  // Sign the TBS and generate the certificate.
-  hmac_digest_t tbs_digest;
-  hmac_sha256(cdi_1_cert_params.tbs, cdi_1_cert_params.tbs_size, &tbs_digest);
-  HARDENED_RETURN_IF_ERROR(
-      otbn_boot_attestation_endorse(&tbs_digest, &curr_tbs_signature));
-  curr_tbs_signature_le_to_be_convert(&curr_tbs_signature);
-  cdi_1_cert_params.cert_signature_r = (unsigned char *)curr_tbs_signature.r;
-  cdi_1_cert_params.cert_signature_r_size = kAttestationSignatureBytes / 2;
-  cdi_1_cert_params.cert_signature_s = (unsigned char *)curr_tbs_signature.s;
-  cdi_1_cert_params.cert_signature_s_size = kAttestationSignatureBytes / 2;
-  HARDENED_RETURN_IF_ERROR(
-      cdi_1_build_cert(&cdi_1_cert_params, cert, cert_size));
-
-  // Save the CDI_1 private key to OTBN DMEM so it can endorse the next stage.
-  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kCdi1AttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kCdi1KeymgrDiversifier));
-
-  return kErrorOk;
-}
-
-rom_error_t dice_tpm_ek_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                       ecdsa_p256_public_key_t *tpm_ek_pubkey,
-                                       uint8_t *tpm_ek_tbs,
-                                       size_t *tpm_ek_tbs_size) {
-  tpm_ek_tbs_values_t tpm_ek_tbs_params = {
-      .auth_key_key_id = (unsigned char *)key_ids->endorsement,
-      .auth_key_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .tpm_ek_pub_key_ec_x = (unsigned char *)tpm_ek_pubkey->x,
-      .tpm_ek_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_ek_pub_key_ec_y = (unsigned char *)tpm_ek_pubkey->y,
-      .tpm_ek_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_ek_pub_key_id = (unsigned char *)key_ids->cert,
-      .tpm_ek_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .tpm_version = "0.0.1",
-      .tpm_version_len = 5,
-      .tpm_vendor = "Nuvoton",
-      .tpm_vendor_len = 7,
-      .tpm_model = "Ti50",
-      .tpm_model_len = 4,
-  };
-
-  HARDENED_RETURN_IF_ERROR(
-      tpm_ek_build_tbs(&tpm_ek_tbs_params, tpm_ek_tbs, tpm_ek_tbs_size));
-
-  return kErrorOk;
-}
-
-rom_error_t dice_tpm_cek_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                        ecdsa_p256_public_key_t *tpm_cek_pubkey,
-                                        uint8_t *tpm_cek_tbs,
-                                        size_t *tpm_cek_tbs_size) {
-  tpm_cek_tbs_values_t tpm_cek_tbs_params = {
-      .auth_key_key_id = (unsigned char *)key_ids->endorsement,
-      .auth_key_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .tpm_cek_pub_key_ec_x = (unsigned char *)tpm_cek_pubkey->x,
-      .tpm_cek_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_cek_pub_key_ec_y = (unsigned char *)tpm_cek_pubkey->y,
-      .tpm_cek_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_cek_pub_key_id = (unsigned char *)key_ids->cert,
-      .tpm_cek_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-  };
-
-  HARDENED_RETURN_IF_ERROR(
-      tpm_cek_build_tbs(&tpm_cek_tbs_params, tpm_cek_tbs, tpm_cek_tbs_size));
-
-  return kErrorOk;
-}
-
-rom_error_t dice_tpm_cik_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                        ecdsa_p256_public_key_t *tpm_cik_pubkey,
-                                        uint8_t *tpm_cik_tbs,
-                                        size_t *tpm_cik_tbs_size) {
-  tpm_cik_tbs_values_t tpm_cik_tbs_params = {
-      .auth_key_key_id = (unsigned char *)key_ids->endorsement,
-      .auth_key_key_id_size = kDiceCertKeyIdSizeInBytes,
-      .tpm_cik_pub_key_ec_x = (unsigned char *)tpm_cik_pubkey->x,
-      .tpm_cik_pub_key_ec_x_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_cik_pub_key_ec_y = (unsigned char *)tpm_cik_pubkey->y,
-      .tpm_cik_pub_key_ec_y_size = kEcdsaP256PublicKeyCoordBytes,
-      .tpm_cik_pub_key_id = (unsigned char *)key_ids->cert,
-      .tpm_cik_pub_key_id_size = kDiceCertKeyIdSizeInBytes,
-  };
-
-  HARDENED_RETURN_IF_ERROR(
-      tpm_cik_build_tbs(&tpm_cik_tbs_params, tpm_cik_tbs, tpm_cik_tbs_size));
-
-  return kErrorOk;
-}
diff --git a/sw/device/silicon_creator/lib/dice.h b/sw/device/silicon_creator/lib/dice.h
deleted file mode 100644
index ef05eb909931d..0000000000000
--- a/sw/device/silicon_creator/lib/dice.h
+++ /dev/null
@@ -1,197 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DICE_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DICE_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/testing/json/provisioning_data.h"
-#include "sw/device/silicon_creator/lib/attestation.h"
-#include "sw/device/silicon_creator/lib/drivers/hmac.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
-
-enum {
-  /**
-   * DICE attestation measurement sizes, comprised of a SHA256 digest.
-   */
-  kDiceMeasurementSizeInBits = 256,
-  kDiceMeasurementSizeInBytes = kDiceMeasurementSizeInBits / 8,
-
-  /**
-   * DICE key ID size (for use in DICE certificates).
-   */
-  kDiceCertKeyIdSizeInBytes = 20,
-};
-
-/**
- * Supported DICE/TPM attestation keys.
- */
-typedef enum dice_key {
-  /**
-   * DICE UDS key.
-   */
-  kDiceKeyUds = 0,
-  /**
-   * DICE CDI0 key.
-   */
-  kDiceKeyCdi0 = 1,
-  /**
-   * DICE CDI1 key.
-   */
-  kDiceKeyCdi1 = 2,
-  /**
-   * TPM EK key.
-   */
-  kDiceKeyTpmEk = 3,
-  /**
-   * TPM CEK key.
-   */
-  kDiceKeyTpmCek = 4,
-  /**
-   * TPM CIK key.
-   */
-  kDiceKeyTpmCik = 5,
-} dice_key_t;
-
-/**
- * A set of public key IDs required to generate an X.509 certificate.
- */
-typedef struct dice_cert_key_id_pair {
-  /**
-   * Pointer to SHA256 digest of the public key matching the private key used to
-   * endorse the certificate.
-   */
-  hmac_digest_t *endorsement;
-  /**
-   * Pointer to SHA256 digest of the public key the certificate is created for.
-   */
-  hmac_digest_t *cert;
-} dice_cert_key_id_pair_t;
-
-/**
- * Generates the requested attestation ECC P256 keypair, returning the public
- * key and a key ID (which is a SHA256 digest of the public key).
- *
- * Preconditions: keymgr has been initialized and cranked to the desired stage.
- *
- * @param desired_key The desired attestation key to generate.
- * @param[out] pubkey_id The public key ID (for embedding into certificates).
- * @param[out] pubkey The public key.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_attestation_keygen(dice_key_t desired_key,
-                                    hmac_digest_t *pubkey_id,
-                                    ecdsa_p256_public_key_t *pubkey);
-
-/**
- * Generates the UDS attestation keypair and (unendorsed) X.509 TBS certificate.
- *
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param uds_pubkey Pointer to the (current stage) public key in big endian.
- * @param[out] cert Buffer to hold the generated UDS certificate.
- * @param[in,out] cert_size Size of the UDS certificate (input value is the size
- *                          of the allocated cert_buf, output value final
- *                          computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_uds_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                    ecdsa_p256_public_key_t *uds_pubkey,
-                                    uint8_t *tbs_cert, size_t *tbs_cert_size);
-
-/**
- * Generates the CDI_0 attestation keypair and X.509 certificate.
- *
- * @param rom_ext_measurement Pointer to the ROM_EXT measurement.
- * @param rom_ext_security_version ROM_EXT security version.
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param cdi_0_pubkey Pointer to the (current stage) public key in big endian.
- * @param[out] cert Buffer to hold the generated CDI_0 certificate.
- * @param[in,out] cert_size Size of the CDI_0 certificate (input value is the
- *                          size of the allocated cert_buf, output value final
- *                          computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_cdi_0_cert_build(hmac_digest_t *rom_ext_measurement,
-                                  uint32_t rom_ext_security_version,
-                                  dice_cert_key_id_pair_t *key_ids,
-                                  ecdsa_p256_public_key_t *cdi_0_pubkey,
-                                  uint8_t *cert, size_t *cert_size);
-
-/**
- * Generates the CDI_1 attestation keypair and X.509 certificate.
- *
- * @param owner_measurement Pointer to the owner firmware measurement.
- * @param owner_manifest_measurement Pointer to the owner manifest measurement.
- * @param owner_security_version Owner firmware security version.
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param cdi_1_pubkey Pointer to the (current stage) public key in big endian.
- * @param[out] cert Buffer to hold the generated CDI_1 certificate.
- * @param[in,out] cert_size Size of the CDI_1 certificate (input value is the
- *                          size of the allocated cert_buf, output value final
- *                          computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_cdi_1_cert_build(hmac_digest_t *owner_measurement,
-                                  hmac_digest_t *owner_manifest_measurement,
-                                  uint32_t owner_security_version,
-                                  dice_cert_key_id_pair_t *key_ids,
-                                  ecdsa_p256_public_key_t *cdi_1_pubkey,
-                                  uint8_t *cert, size_t *cert_size);
-
-/**
- * Generates an X.509 TBS section of a TPM EK certificate.
- *
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param tpm_ek_pubkey Pointer to the TPM EK public key in big endian.
- * @param[out] tbs_cert Buffer to hold the generated TBS section.
- * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
- *                              is the size of the allocated cert_buf, output
- *                              value final computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_tpm_ek_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                       ecdsa_p256_public_key_t *tpm_ek_pubkey,
-                                       uint8_t *tbs_cert,
-                                       size_t *tbs_cert_size);
-
-/**
- * Generates an X.509 TBS section of a TPM CEK certificate.
- *
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param tpm_cek_pubkey Pointer to the TPM CEK public key in big endian.
- * @param[out] tbs_cert Buffer to hold the generated UDS section.
- * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
- *                              is the size of the allocated cert_buf, output
- *                              value final computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_tpm_cek_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                        ecdsa_p256_public_key_t *tpm_cek_pubkey,
-                                        uint8_t *tbs_cert,
-                                        size_t *tbs_cert_size);
-
-/**
- * Generates an X.509 TBS section of a TPM CIK certificate.
- *
- * @param key_ids Pointer to the (current and endorsement) public key IDs.
- * @param tpm_cik_pubkey Pointer to the TPM CIK public key in big endian.
- * @param[out] tbs_cert Buffer to hold the generated UDS section.
- * @param[in,out] tbs_cert_size Size of the generated TBS section (input value
- *                              is the size of the allocated cert_buf, output
- *                              value final computed size of the certificate).
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t dice_tpm_cik_tbs_cert_build(dice_cert_key_id_pair_t *key_ids,
-                                        ecdsa_p256_public_key_t *tpm_cik_pubkey,
-                                        uint8_t *tbs_cert,
-                                        size_t *tbs_cert_size);
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DICE_H_
diff --git a/sw/device/silicon_creator/lib/drivers/BUILD b/sw/device/silicon_creator/lib/drivers/BUILD
index d08fda938ec20..ef5849136dfe5 100644
--- a/sw/device/silicon_creator/lib/drivers/BUILD
+++ b/sw/device/silicon_creator/lib/drivers/BUILD
@@ -14,9 +14,13 @@ load(
 )
 load(
     "//rules/opentitan:defs.bzl",
+    "EARLGREY_CW340_TEST_ENVS",
+    "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
     "EARLGREY_TEST_ENVS",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
+    "silicon_params",
     "verilator_params",
 )
 
@@ -33,6 +37,7 @@ filegroup(
         "rstmgr.h",
         "spi_device.c",
         "spi_device.h",
+        "spi_device_bfpt.h",
     ],
 )
 
@@ -84,14 +89,7 @@ cc_test(
 opentitan_test(
     name = "alert_functest",
     srcs = ["alert_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -114,7 +112,6 @@ cc_library(
     srcs = ["ast.c"],
     hdrs = ["ast.h"],
     deps = [
-        ":flash_ctrl",
         ":lifecycle",
         ":otp",
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
@@ -182,7 +179,7 @@ cc_test(
     srcs = ["flash_ctrl_unittest.cc"],
     deps = [
         dual_cc_device_library_of(":flash_ctrl"),
-        "@com_google_absl//absl/strings:str_format",
+        "@abseil-cpp//absl/strings:str_format",
         "@googletest//:gtest_main",
     ],
 )
@@ -208,6 +205,7 @@ dual_cc_library(
             "@googletest//:gtest",
         ],
         shared = [
+            ":ibex",
             "//sw/device/lib/base:abs_mmio",
             "//sw/device/lib/base:bitfield",
             "//sw/device/lib/base:hardened",
@@ -220,6 +218,7 @@ dual_cc_library(
 cc_test(
     name = "hmac_unittest",
     srcs = ["hmac_unittest.cc"],
+    local_defines = ["HMAC_UNIT_TEST_"],
     deps = [
         dual_cc_device_library_of(":hmac"),
         "//hw/ip/hmac/data:hmac_c_regs",
@@ -234,7 +233,10 @@ cc_test(
 opentitan_test(
     name = "hmac_functest",
     srcs = ["hmac_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_CW340_TEST_ENVS,
+    ),
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -318,8 +320,10 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
             # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:sim_qemu_sival_rom_ext": "qemu_broken",
         },
     ),
+    qemu_broken = qemu_params(tags = ["broken"]),
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -373,7 +377,10 @@ cc_test(
 opentitan_test(
     name = "kmac_functest",
     srcs = ["kmac_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_CW340_TEST_ENVS,
+    ),
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -411,6 +418,7 @@ dual_cc_library(
             "//sw/device/lib/base:bitfield",
             "//sw/device/lib/base:hardened",
             "//sw/device/lib/base:macros",
+            "//sw/device/lib/base:abs_mmio",
             "//sw/device/silicon_creator/lib/base:sec_mmio",
         ],
     ),
@@ -423,6 +431,7 @@ cc_test(
         dual_cc_device_library_of(":lifecycle"),
         "//hw/ip/lc_ctrl/data:lc_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:hardened",
         "//sw/device/silicon_creator/testing:rom_test",
         "@googletest//:gtest_main",
     ],
@@ -695,14 +704,7 @@ cc_test(
 opentitan_test(
     name = "rstmgr_functest",
     srcs = ["rstmgr_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -790,14 +792,7 @@ cc_test(
 opentitan_test(
     name = "watchdog_functest",
     srcs = ["watchdog_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -822,8 +817,14 @@ dual_cc_library(
     ),
     hdrs = dual_inputs(
         host = ["mock_spi_device.h"],
-        shared = ["spi_device.h"],
+        shared = [
+            "spi_device.h",
+            "spi_device_bfpt.h",
+        ],
     ),
+    copts = [
+        "-Wno-gnu-flexible-array-initializer",
+    ],
     deps = dual_inputs(
         device = [
             "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
@@ -901,3 +902,94 @@ cc_test(
         "@googletest//:gtest_main",
     ],
 )
+
+cc_library(
+    name = "epmp",
+    srcs = ["epmp.c"],
+    hdrs = ["epmp.h"],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:epmp_state",
+    ],
+)
+
+cc_test(
+    name = "epmp_unittest",
+    srcs = ["epmp_unittest.cc"],
+    deps = [
+        ":epmp",
+        "//sw/device/silicon_creator/testing:rom_test",
+        "@googletest//:gtest_main",
+    ],
+)
+
+cc_library(
+    name = "rv_timer",
+    srcs = ["rv_timer.c"],
+    hdrs = ["rv_timer.h"],
+    deps = [
+        "//hw/ip/rv_timer/data:rv_timer_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:bitfield",
+    ],
+)
+
+cc_library(
+    name = "usb",
+    srcs = [
+        "stdusb.c",
+        "usb.c",
+    ],
+    hdrs = [
+        "stdusb.h",
+        "usb.h",
+    ],
+    deps = [
+        "//hw/ip/usbdev/data:usbdev_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:bitfield",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:error",
+    ],
+)
+
+opentitan_test(
+    name = "usb_functest",
+    srcs = ["usb_functest.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/chip/usb:silicon_creator_harness",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap={firmware}
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:silicon_creator_harness",
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+        tags = ["broken"],
+    ),
+    deps = [
+        ":hmac",
+        ":pinmux",
+        ":rnd",
+        ":usb",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
diff --git a/sw/device/silicon_creator/lib/drivers/alert_unittest.cc b/sw/device/silicon_creator/lib/drivers/alert_unittest.cc
index 807e93b5084e9..9144abd1dc0dd 100644
--- a/sw/device/silicon_creator/lib/drivers/alert_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/alert_unittest.cc
@@ -43,6 +43,13 @@ TEST_F(InitTest, AlertConfigureAlertBadClass) {
       kErrorAlertBadClass);
 }
 
+TEST_F(InitTest, LocalAlertConfigureAlertBadIndex) {
+  EXPECT_EQ(alert_local_configure(
+                ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_MULTIREG_COUNT,
+                kAlertClassX, kAlertEnableNone),
+            kErrorAlertBadIndex);
+}
+
 TEST_F(InitTest, LocalAlertConfigureAlertBadClass) {
   EXPECT_EQ(alert_local_configure(0, static_cast<alert_class_t>(-1),
                                   kAlertEnableNone),
@@ -74,6 +81,18 @@ TEST_F(InitTest, LocalAlertConfigureAlertClassXNoOperation) {
   EXPECT_EQ(alert_local_configure(0, kAlertClassX, kAlertEnableNone), kErrorOk);
 }
 
+TEST_F(InitTest, AlertConfigureNotEnable) {
+  EXPECT_ABS_WRITE32_SHADOWED(
+      base_ + ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_REG_OFFSET, 0);
+  EXPECT_EQ(alert_configure(0, kAlertClassA, kAlertEnableNone), kErrorOk);
+}
+
+TEST_F(InitTest, LocalAlertConfigureNotEnable) {
+  EXPECT_ABS_WRITE32_SHADOWED(
+      base_ + ALERT_HANDLER_LOC_ALERT_CLASS_SHADOWED_0_REG_OFFSET, 0);
+  EXPECT_EQ(alert_local_configure(0, kAlertClassA, kAlertEnableNone), kErrorOk);
+}
+
 TEST_F(InitTest, AlertConfigure0AsClassA) {
   EXPECT_ABS_WRITE32_SHADOWED(
       base_ + ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_REG_OFFSET, 0);
diff --git a/sw/device/silicon_creator/lib/drivers/ast.c b/sw/device/silicon_creator/lib/drivers/ast.c
index 1daf836d95b87..173c16a0cb3ad 100644
--- a/sw/device/silicon_creator/lib/drivers/ast.c
+++ b/sw/device/silicon_creator/lib/drivers/ast.c
@@ -8,7 +8,6 @@
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/csr.h"
 #include "sw/device/lib/base/multibits.h"
-#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/otp.h"
 
 #include "ast_regs.h"
@@ -24,27 +23,6 @@ const uint32_t kAstCheckPollCpuCycles = 10000;
 enum {
   kBaseSensorCtrl = TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR,
   kBaseAst = TOP_EARLGREY_AST_BASE_ADDR,
-
-  /**
-   * AST Calibration Data Size - Bank 0, Page 0
-   *
-   * Number of AST calibration words that will be stored in flash / OTP.
-   *
-   * Must match `kFlashInfoAstCalibrationDataSizeIn32BitWords` in
-   * //sw/device/silicon_creator/manuf/lib/flash_info_fields.h.
-   */
-  kAstCalibrationDataSizeIn32BitWords =
-      (AST_REGAL_REG_OFFSET + sizeof(uint32_t)) / sizeof(uint32_t),
-
-  /**
-   * The starting offset of the AST calibration data within the
-   * `kFlashCtrlInfoPageFactoryId` info flash page.
-   *
-   * Must be compatible to the `kFlashInfoFieldAstCalibrationData` byte offset
-   * in //sw/device/silicon_creator/manuf/lib/flash_info_fields.c.
-   */
-  kAstCalibrationDataInfoFlashByteOffset =
-      OTP_CTRL_PARAM_DEVICE_ID_SIZE + OTP_CTRL_PARAM_MANUF_STATE_SIZE,
 };
 
 rom_error_t ast_check(lifecycle_state_t lc_state) {
@@ -121,56 +99,3 @@ hardened_bool_t ast_init_done(void) {
   }
   return res;
 }
-
-/**
- * Loads AST patch from kFlashCtrlInfoPageFactoryId page.
- *
- * The `ast_data` offset must be equivalent to the one used in
- * //sw/device/silicon_creator/manuf/lib/ast_program.c.
- *
- * The info flash configuration must also be the same used to program the page,
- * otherwise the data read will be garbled.
- *
- * @param[out] ast_data Pointer to the buffer used to store the data read.
- *
- * @return The result of the operation.
- */
-OT_WARN_UNUSED_RESULT
-static rom_error_t load_ast_config_from_flash(uint32_t *ast_data) {
-  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageFactoryId,
-                            (flash_ctrl_perms_t){
-                                .read = kMultiBitBool4True,
-                                .write = kMultiBitBool4False,
-                                .erase = kMultiBitBool4False,
-                            });
-  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageFactoryId,
-                          (flash_ctrl_cfg_t){
-                              .scrambling = kMultiBitBool4False,
-                              .ecc = kMultiBitBool4True,
-                              .he = kMultiBitBool4False,
-                          });
-  return flash_ctrl_info_read(&kFlashCtrlInfoPageFactoryId,
-                              kAstCalibrationDataInfoFlashByteOffset,
-                              kAstCalibrationDataSizeIn32BitWords, ast_data);
-}
-
-rom_error_t ast_patch(lifecycle_state_t lc_state) {
-  uint32_t ast_data[kAstCalibrationDataSizeIn32BitWords];
-  HARDENED_RETURN_IF_ERROR(load_ast_config_from_flash(ast_data));
-
-  // Skip patching logic if either of the first two words don't seem to be
-  // configured.
-  if (ast_data[0] == 0 || ast_data[0] == UINT32_MAX) {
-    return ast_check(lc_state);
-  }
-
-  if (ast_data[1] == 0 || ast_data[1] == UINT32_MAX) {
-    return ast_check(lc_state);
-  }
-
-  for (size_t i = 0; i < kAstCalibrationDataSizeIn32BitWords; ++i) {
-    abs_mmio_write32(kBaseAst + i * sizeof(uint32_t), ast_data[i]);
-  }
-
-  return ast_check(lc_state);
-}
diff --git a/sw/device/silicon_creator/lib/drivers/epmp.c b/sw/device/silicon_creator/lib/drivers/epmp.c
new file mode 100644
index 0000000000000..09a0e7e1f4cb7
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/epmp.c
@@ -0,0 +1,117 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/epmp.h"
+
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/csr.h"
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/epmp_state.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+#define EPMP_SET(cfg_reg, addr_reg, mask, cfg, addr) \
+  CSR_CLEAR_BITS(CSR_REG_PMPCFG##cfg_reg, mask);     \
+  CSR_WRITE(CSR_REG_PMPADDR##addr_reg, pmpaddr);     \
+  CSR_SET_BITS(CSR_REG_PMPCFG##cfg_reg, cfg);
+
+void epmp_set(uint8_t entry, uint32_t pmpcfg, uint32_t pmpaddr) {
+  uint32_t shift = 8 * (entry % 4);
+  uint32_t mask = 0xFFu << shift;
+  uint32_t cfg = (pmpcfg & 0xFFu) << shift;
+  HARDENED_CHECK_LT(entry, 16);
+  switch (entry) {
+    // clang-format off
+    case  0: EPMP_SET(0,  0, mask, cfg, pmpaddr); break;
+    case  1: EPMP_SET(0,  1, mask, cfg, pmpaddr); break;
+    case  2: EPMP_SET(0,  2, mask, cfg, pmpaddr); break;
+    case  3: EPMP_SET(0,  3, mask, cfg, pmpaddr); break;
+    case  4: EPMP_SET(1,  4, mask, cfg, pmpaddr); break;
+    case  5: EPMP_SET(1,  5, mask, cfg, pmpaddr); break;
+    case  6: EPMP_SET(1,  6, mask, cfg, pmpaddr); break;
+    case  7: EPMP_SET(1,  7, mask, cfg, pmpaddr); break;
+    case  8: EPMP_SET(2,  8, mask, cfg, pmpaddr); break;
+    case  9: EPMP_SET(2,  9, mask, cfg, pmpaddr); break;
+    case 10: EPMP_SET(2, 10, mask, cfg, pmpaddr); break;
+    case 11: EPMP_SET(2, 11, mask, cfg, pmpaddr); break;
+    case 12: EPMP_SET(3, 12, mask, cfg, pmpaddr); break;
+    case 13: EPMP_SET(3, 13, mask, cfg, pmpaddr); break;
+    case 14: EPMP_SET(3, 14, mask, cfg, pmpaddr); break;
+    case 15: EPMP_SET(3, 15, mask, cfg, pmpaddr); break;
+    // clang-format on
+    default:
+      // should be impossible to get here because of HARDENED_CHECK_LT above.
+      HARDENED_TRAP();
+  }
+  uint32_t cfgent = entry / 4;
+  epmp_state.pmpcfg[cfgent] = (epmp_state.pmpcfg[cfgent] & ~mask) | cfg;
+  epmp_state.pmpaddr[entry] = pmpaddr;
+}
+
+void epmp_clear(uint8_t entry) { epmp_set(entry, kEpmpModeOff, 0); }
+
+void epmp_clear_lock_bits(void) {
+  const uint32_t mask =
+      ((uint32_t)EPMP_CFG_L << 0 * 8) | ((uint32_t)EPMP_CFG_L << 1 * 8) |
+      ((uint32_t)EPMP_CFG_L << 2 * 8) | ((uint32_t)EPMP_CFG_L << 3 * 8);
+  CSR_CLEAR_BITS(CSR_REG_PMPCFG0, mask);
+  CSR_CLEAR_BITS(CSR_REG_PMPCFG1, mask);
+  CSR_CLEAR_BITS(CSR_REG_PMPCFG2, mask);
+  CSR_CLEAR_BITS(CSR_REG_PMPCFG3, mask);
+  for (int cfgent = 0; cfgent < 4; ++cfgent) {
+    epmp_state.pmpcfg[cfgent] &= ~mask;
+  }
+}
+
+void epmp_set_lock_bits(void) {
+  const uint32_t mask =
+      ((uint32_t)EPMP_CFG_L << 0 * 8) | ((uint32_t)EPMP_CFG_L << 1 * 8) |
+      ((uint32_t)EPMP_CFG_L << 2 * 8) | ((uint32_t)EPMP_CFG_L << 3 * 8);
+  CSR_SET_BITS(CSR_REG_PMPCFG0, mask);
+  CSR_SET_BITS(CSR_REG_PMPCFG1, mask);
+  CSR_SET_BITS(CSR_REG_PMPCFG2, mask);
+  CSR_SET_BITS(CSR_REG_PMPCFG3, mask);
+  for (int cfgent = 0; cfgent < 4; ++cfgent) {
+    epmp_state.pmpcfg[cfgent] |= mask;
+  }
+}
+
+uint32_t epmp_encode_napot(epmp_region_t region) {
+  const uint32_t length = region.end - region.start;
+  // The length must be 4 or more.
+  HARDENED_CHECK_GE(length, 4);
+  // The length must be a power of 2.
+  HARDENED_CHECK_EQ(bitfield_popcount32(length), 1);
+  // The start address must be naturally aligned with length.
+  HARDENED_CHECK_EQ(region.start & (length - 1), 0);
+  return (region.start >> 2) | ((length - 1) >> 3);
+}
+
+epmp_region_t epmp_decode_napot(uint32_t pmpaddr) {
+  HARDENED_CHECK_NE(pmpaddr, UINT32_MAX);
+  uint32_t size = 1u << bitfield_count_trailing_zeroes32(~pmpaddr);
+  pmpaddr = (pmpaddr & ~(size - 1)) << 2;
+  size <<= 3;
+  return (epmp_region_t){.start = pmpaddr, .end = pmpaddr + size};
+}
+
+void epmp_set_napot(uint8_t entry, epmp_region_t region, epmp_perm_t perm) {
+  uint32_t addr = epmp_encode_napot(region);
+  epmp_mode_t mode =
+      region.end - region.start == 4 ? kEpmpModeNa4 : kEpmpModeNapot;
+  epmp_set(entry, (uint32_t)mode | (uint32_t)perm, addr);
+}
+
+void epmp_set_tor(uint8_t entry, epmp_region_t region, epmp_perm_t perm) {
+  uint32_t start = region.start >> 2;
+  uint32_t end = ((region.end + 3u) & ~3u) >> 2;
+  epmp_set(entry, kEpmpModeOff, start);
+  epmp_set(entry + 1, (uint32_t)kEpmpModeTor | (uint32_t)perm, end);
+}
+
+void epmp_clear_rlb(void) {
+  const uint32_t kMask = EPMP_MSECCFG_RLB;
+  epmp_state.mseccfg &= ~kMask;
+  CSR_CLEAR_BITS(CSR_REG_MSECCFG, kMask);
+}
diff --git a/sw/device/silicon_creator/lib/drivers/epmp.h b/sw/device/silicon_creator/lib/drivers/epmp.h
new file mode 100644
index 0000000000000..540ceefc20f8c
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/epmp.h
@@ -0,0 +1,116 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_EPMP_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_EPMP_H_
+
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/epmp_state.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Enhanced Physical Memory Protection (ePMP) library.
+ *
+ * The ePMP configuration is managed in two parts:
+ *
+ *   1. The actual hardware configuration held in CSRs
+ *   2. The in-memory copy of register values in `epmp_state_t` that is used
+ *      to verify the CSRs
+ *
+ * Every time the hardware configuration is updated the in-memory copy
+ * must also be updated. The hardware configuration is usually interacted
+ * with directly using the CSR library or assembly whereas the in-memory
+ * copy of the state should normally be modified using configuration functions
+ * from the silicon creator ePMP library.
+ *
+ * This separation of concerns allows the hardware configuration to be
+ * updated efficiently as needed (including before the C runtime is
+ * initialized) with the in-memory copy of the state used to double check the
+ * configuration as required.
+ */
+
+/**
+ * Clear an ePMP entry.
+ *
+ * Sets the PMPADDR and PMPCFG entries to zero.
+ *
+ * @param entry The ePMP entry to clear.
+ */
+void epmp_clear(uint8_t entry);
+
+/**
+ * Clear the lock bit in all ePMP entries.
+ */
+void epmp_clear_lock_bits(void);
+
+/**
+ * Set the lock bit in all ePMP entries.
+ */
+void epmp_set_lock_bits(void);
+
+/**
+ * Encode a start/end address pair to NAPOT address.
+ *
+ * The region start must have an alignment consistent with the region size.  The
+ * region size must be a power of two.  If either of these conditions is not
+ * met, this function will fault.
+ *
+ * @param region The address region to configure.
+ * @return The encoded NAPOT address.
+ */
+uint32_t epmp_encode_napot(epmp_region_t region);
+
+/**
+ * Decode a NAPOT address back to start/end address pair.
+ *
+ * @param pmpaddr The encoded NAPOT address.
+ * @return region The decoded start/end address pair.
+ */
+epmp_region_t epmp_decode_napot(uint32_t pmpaddr);
+
+/**
+ * Configures an ePMP entry for a NAPOT or NA4 region.
+ *
+ * The region start must have an alignment consistent with the region size.  The
+ * region size must be a power of two.  If either of these conditions is not
+ * met, this function will fault.
+ *
+ * From a configuration perspective, an NA4 region is just a special case of a
+ * NAPOT region.
+ *
+ * @param entry The ePMP entry to configure.
+ * @param region The address region to configure.
+ * @param perm The ePMP permissions for the region.
+ */
+void epmp_set_napot(uint8_t entry, epmp_region_t region, epmp_perm_t perm);
+
+/**
+ * Configures an ePMP entry for a TOR region.
+ *
+ * The region start and end may be abitrary addresses.  The start will be
+ * rounded down to a 4-byte address.  The end will be rounded up to a 4-byte
+ * address.
+ *
+ * @param entry The ePMP entry to configure.
+ * @param region The address region to configure.
+ * @param perm The ePMP permissions for the region.
+ */
+void epmp_set_tor(uint8_t entry, epmp_region_t region, epmp_perm_t perm);
+
+/**
+ * Clear the rule-locking-bypass (RLB) bit.
+ *
+ * Clearing RLB causes the Lock bit in the ePMP to be enforced.
+ */
+void epmp_clear_rlb(void);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_EPMP_H_
diff --git a/sw/device/silicon_creator/lib/drivers/epmp_unittest.cc b/sw/device/silicon_creator/lib/drivers/epmp_unittest.cc
new file mode 100644
index 0000000000000..9f6989c8ae04d
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/epmp_unittest.cc
@@ -0,0 +1,64 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/epmp.h"
+
+#include "gtest/gtest.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace epmp_unittest {
+namespace {
+
+struct NapotCase {
+  /**
+   * Start / end of the NAPOT region.
+   */
+  uint32_t start;
+  uint32_t end;
+  /**
+   * Encoded NAPOT address.
+   */
+  uint32_t encoded;
+};
+
+class NapotTest : public rom_test::RomTest,
+                  public testing::WithParamInterface<NapotCase> {};
+
+TEST_P(NapotTest, Codec) {
+  epmp_region_t region = {
+      .start = (uintptr_t)GetParam().start,
+      .end = (uintptr_t)GetParam().end,
+  };
+  EXPECT_EQ(epmp_encode_napot(region), GetParam().encoded);
+
+  epmp_region_t decoded = epmp_decode_napot(GetParam().encoded);
+  EXPECT_EQ(decoded.start, GetParam().start);
+  EXPECT_EQ(decoded.end, GetParam().end);
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, NapotTest,
+                         testing::Values(
+                             NapotCase{
+                                 .start = 0b1000010100100100101010100000,
+                                 .end = 0b1000010100100100101011000000,
+                                 .encoded = 0b10000101001001001010101011,
+                             },
+                             NapotCase{
+                                 .start = 0b101000001101000011100000000000,
+                                 .end = 0b101000001101000011100100000000,
+                                 .encoded = 0b1010000011010000111000011111,
+                             },
+                             NapotCase{
+                                 .start = 0b10111111111111111111111111111000,
+                                 .end = 0b11000000000000000000000000000000,
+                                 .encoded = 0b101111111111111111111111111110,
+                             },
+                             NapotCase{
+                                 .start = 0b00000000000000000000000000000000,
+                                 .end = 0b10000000000000000000000000000000,
+                                 .encoded = 0b001111111111111111111111111111,
+                             }));
+
+}  // namespace
+}  // namespace epmp_unittest
diff --git a/sw/device/silicon_creator/lib/drivers/flash_ctrl.c b/sw/device/silicon_creator/lib/drivers/flash_ctrl.c
index 94ae26cb7affd..7ed42a218b095 100644
--- a/sw/device/silicon_creator/lib/drivers/flash_ctrl.c
+++ b/sw/device/silicon_creator/lib/drivers/flash_ctrl.c
@@ -275,14 +275,7 @@ void flash_ctrl_init(void) {
   };
   flash_ctrl_data_default_cfg_set(data_default_cfg);
   // Configure scrambling, ECC, and HE for `boot_data` pages.
-  otp_val =
-      otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET);
-  flash_ctrl_cfg_t boot_data_cfg = {
-      .scrambling =
-          bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_SCRAMBLING),
-      .ecc = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_ECC),
-      .he = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_HE),
-  };
+  flash_ctrl_cfg_t boot_data_cfg = flash_ctrl_boot_data_cfg_get();
   flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageBootData0, boot_data_cfg);
   flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageBootData1, boot_data_cfg);
 }
@@ -356,6 +349,22 @@ rom_error_t flash_ctrl_info_read(const flash_ctrl_info_page_t *info_page,
   return wait_for_done(kErrorFlashCtrlInfoRead);
 }
 
+rom_error_t flash_ctrl_info_read_zeros_on_read_error(
+    const flash_ctrl_info_page_t *info_page, uint32_t offset,
+    uint32_t word_count, void *data) {
+  rom_error_t err = flash_ctrl_info_read(info_page, offset, word_count, data);
+  if (err != kErrorOk) {
+    flash_ctrl_error_code_t flash_ctrl_err_code;
+    flash_ctrl_error_code_get(&flash_ctrl_err_code);
+    if (flash_ctrl_err_code.rd_err) {
+      // If we encountered a read error, return all 0s.
+      memset(data, 0, word_count * sizeof(uint32_t));
+      return kErrorOk;
+    }
+  }
+  return err;
+}
+
 rom_error_t flash_ctrl_data_write(uint32_t addr, uint32_t word_count,
                                   const void *data) {
   return write(addr, kFlashCtrlPartitionData, word_count, data,
@@ -507,149 +516,70 @@ flash_ctrl_cfg_t flash_ctrl_data_default_cfg_get(void) {
   };
 }
 
-// This X macro helps to generate code that operates on each of the flash_ctrl
-// memory protection regions.
-#define FLASH_CTRL_MP_REGIONS(X) \
-  X(0)                           \
-  X(1)                           \
-  X(2)                           \
-  X(3)                           \
-  X(4)                           \
-  X(5)                           \
-  X(6)                           \
-  X(7)
-
-// Defines the bounds of the given memory protection region by setting the
-// MP_REGION_${region} register.
-static void flash_ctrl_mp_region_write(flash_ctrl_region_index_t region,
-                                       uint32_t page_offset,
-                                       uint32_t num_pages) {
-#define FLASH_CTRL_MP_REGION_WRITE_(region_macro_arg)                              \
-  case ((region_macro_arg)): {                                                     \
-    HARDENED_CHECK_EQ(region, (region_macro_arg));                                 \
-    uint32_t mp_region = FLASH_CTRL_MP_REGION_##region_macro_arg##_REG_RESVAL;     \
-    /* Write the region's base address into the bitfield. */                       \
-    mp_region = bitfield_field32_write(                                            \
-        mp_region,                                                                 \
-        FLASH_CTRL_MP_REGION_##region_macro_arg##_BASE_##region_macro_arg##_FIELD, \
-        page_offset);                                                              \
-    /* Write the region's size in pages into the bitfield. */                      \
-    mp_region = bitfield_field32_write(                                            \
-        mp_region,                                                                 \
-        FLASH_CTRL_MP_REGION_##region_macro_arg##_SIZE_##region_macro_arg##_FIELD, \
-        num_pages);                                                                \
-    /* Write the bitfield to the MP_REGION_${region} register. */                  \
-    sec_mmio_write32(                                                              \
-        kBase + FLASH_CTRL_MP_REGION_##region_macro_arg##_REG_OFFSET,              \
-        mp_region);                                                                \
-    return;                                                                        \
-  }
-
-  switch (launder32(region)) {
-    FLASH_CTRL_MP_REGIONS(FLASH_CTRL_MP_REGION_WRITE_)
-    default:
-      OT_UNREACHABLE();
-  }
-
-#undef FLASH_CTRL_MP_REGION_WRITE_
-}
-
-// Resets the given region's memory protection config by resetting the
-// MP_REGION_CFG_${region} register, which implicitly disables the region.
-static void flash_ctrl_mp_region_cfg_reset(flash_ctrl_region_index_t region) {
-#define FLASH_CTRL_MP_REGION_CFG_RESET_(region_macro_arg)                               \
-  case ((region_macro_arg)): {                                                          \
-    HARDENED_CHECK_EQ(region, (region_macro_arg));                                      \
-    static_assert(                                                                      \
-        (FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_REG_RESVAL &                     \
-         FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_EN_##region_macro_arg##_MASK) == \
-            kMultiBitBool4False,                                                        \
-        "FLASH_CTRL_MP_REGION_CFG_" #region_macro_arg                                   \
-        "'s reset value should disable the region");                                    \
-    /* Reset the MP_REGION_CFG_${region} register. */                                   \
-    sec_mmio_write32(                                                                   \
-        kBase + FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_REG_OFFSET,               \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_REG_RESVAL);                      \
-    return;                                                                             \
-  }
-
-  switch (launder32(region)) {
-    FLASH_CTRL_MP_REGIONS(FLASH_CTRL_MP_REGION_CFG_RESET_)
-    default:
-      OT_UNREACHABLE();
-  }
-
-#undef FLASH_CTRL_MP_CFG_RESET_
-}
-
-// Configures permissions for the given MP region by setting the appropriate
-// MP_REGION_CFG register.
-static void flash_ctrl_mp_region_cfg_write(flash_ctrl_region_index_t region,
-                                           flash_ctrl_cfg_t cfg,
-                                           flash_ctrl_perms_t perms,
-                                           multi_bit_bool_t en) {
-#define FLASH_CTRL_MP_REGION_CFG_WRITE_(region_macro_arg)                                     \
-  case ((region_macro_arg)): {                                                                \
-    HARDENED_CHECK_EQ(region, (region_macro_arg));                                            \
-    uint32_t mp_region_cfg =                                                                  \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_REG_RESVAL;                             \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_HE_EN_##region_macro_arg##_FIELD,       \
-        cfg.he);                                                                              \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_ECC_EN_##region_macro_arg##_FIELD,      \
-        cfg.ecc);                                                                             \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_SCRAMBLE_EN_##region_macro_arg##_FIELD, \
-        cfg.scrambling);                                                                      \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_ERASE_EN_##region_macro_arg##_FIELD,    \
-        perms.erase);                                                                         \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_PROG_EN_##region_macro_arg##_FIELD,     \
-        perms.write);                                                                         \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_RD_EN_##region_macro_arg##_FIELD,       \
-        perms.read);                                                                          \
-    mp_region_cfg = bitfield_field32_write(                                                   \
-        mp_region_cfg,                                                                        \
-        FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_EN_##region_macro_arg##_FIELD,          \
-        en);                                                                                  \
-    sec_mmio_write32(                                                                         \
-        kBase + FLASH_CTRL_MP_REGION_CFG_##region_macro_arg##_REG_OFFSET,                     \
-        mp_region_cfg);                                                                       \
-    return;                                                                                   \
-  }
-
-  switch (launder32(region)) {
-    FLASH_CTRL_MP_REGIONS(FLASH_CTRL_MP_REGION_CFG_WRITE_)
-    default:
-      OT_UNREACHABLE();
-  }
-
-#undef FLASH_CTRL_MP_REGION_CFG_WRITE_
+flash_ctrl_cfg_t flash_ctrl_boot_data_cfg_get(void) {
+  uint32_t otp_val =
+      otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET);
+  return (flash_ctrl_cfg_t){
+      .scrambling =
+          bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_SCRAMBLING),
+      .ecc = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_ECC),
+      .he = bitfield_field32_read(otp_val, FLASH_CTRL_OTP_FIELD_HE),
+  };
 }
 
 void flash_ctrl_data_region_protect(flash_ctrl_region_index_t region,
                                     uint32_t page_offset, uint32_t num_pages,
                                     flash_ctrl_perms_t perms,
-                                    flash_ctrl_cfg_t cfg) {
+                                    flash_ctrl_cfg_t cfg,
+                                    hardened_bool_t lock) {
+  HARDENED_CHECK_GE(region, 0);
+  HARDENED_CHECK_LT(region, 8);
+  region *= sizeof(uint32_t);
+
   // Reset the region's configuration via the MP_REGION_CFG_${region} register.
   // This temporarily disables memory protection for the region.
-  flash_ctrl_mp_region_cfg_reset(region);
+  //
+  // We use abs_mmio here because we're going to re-write this value later and
+  // the intermediate REG_RESVAL should not be considered a valid data pattern
+  // in this register when we perfom a sec_mmio check.
+  abs_mmio_write32(kBase + FLASH_CTRL_MP_REGION_CFG_0_REG_OFFSET + region,
+                   FLASH_CTRL_MP_REGION_CFG_0_REG_RESVAL);
 
   // Set the region's bounds in the MP_REGION_${region} register.
-  flash_ctrl_mp_region_write(region, page_offset, num_pages);
+  uint32_t mp_region = FLASH_CTRL_MP_REGION_0_REG_RESVAL;
+  mp_region = bitfield_field32_write(
+      mp_region, FLASH_CTRL_MP_REGION_0_BASE_0_FIELD, page_offset);
+  mp_region = bitfield_field32_write(
+      mp_region, FLASH_CTRL_MP_REGION_0_SIZE_0_FIELD, num_pages);
+  sec_mmio_write32(kBase + FLASH_CTRL_MP_REGION_0_REG_OFFSET + region,
+                   mp_region);
 
   // Write the new value of MP_REGION_CFG_${region}.
-  flash_ctrl_mp_region_cfg_write(region, cfg, perms,
-                                 /*en=*/kMultiBitBool4True);
+  uint32_t mp_region_cfg = FLASH_CTRL_MP_REGION_CFG_0_REG_RESVAL;
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_FIELD, cfg.he);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD, cfg.ecc);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD,
+      cfg.scrambling);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_FIELD, perms.erase);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_FIELD, perms.write);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD, perms.read);
+  mp_region_cfg = bitfield_field32_write(
+      mp_region_cfg, FLASH_CTRL_MP_REGION_CFG_0_EN_0_FIELD, kMultiBitBool4True);
+
+  SEC_MMIO_ASSERT_WRITE_INCREMENT(kFlashCtrlSecMmioDataRegionProtect, 1);
+  SEC_MMIO_ASSERT_WRITE_INCREMENT(kFlashCtrlSecMmioDataRegionProtectLock, 1);
+  sec_mmio_write32(kBase + FLASH_CTRL_MP_REGION_CFG_0_REG_OFFSET + region,
+                   mp_region_cfg);
+  if (lock != kHardenedBoolFalse) {
+    sec_mmio_write32(kBase + FLASH_CTRL_REGION_CFG_REGWEN_0_REG_OFFSET + region,
+                     0);
+  }
 }
 
 void flash_ctrl_info_cfg_set(const flash_ctrl_info_page_t *info_page,
@@ -670,6 +600,10 @@ void flash_ctrl_info_cfg_set(const flash_ctrl_info_page_t *info_page,
   sec_mmio_write32(info_page->cfg_addr, reg);
 }
 
+void flash_ctrl_info_cfg_lock(const flash_ctrl_info_page_t *info_page) {
+  sec_mmio_write32(info_page->cfg_wen_addr, 0);
+}
+
 void flash_ctrl_bank_erase_perms_set(hardened_bool_t enable) {
   uint32_t reg = 0;
   switch (launder32(enable)) {
@@ -707,8 +641,7 @@ static const flash_ctrl_info_page_t *kInfoPagesNoOwnerAccess[] = {
     // Bank 1
     &kFlashCtrlInfoPageBootData0,
     &kFlashCtrlInfoPageBootData1,
-    &kFlashCtrlInfoPageOwnerSlot0,
-    &kFlashCtrlInfoPageOwnerSlot1,
+    &kFlashCtrlInfoPageCreatorReserved0,
 };
 
 enum {
@@ -754,6 +687,38 @@ void flash_ctrl_cert_info_page_creator_cfg(
 void flash_ctrl_cert_info_page_owner_restrict(
     const flash_ctrl_info_page_t *info_page) {
   SEC_MMIO_ASSERT_WRITE_INCREMENT(kFlashCtrlSecMmioCertInfoPageOwnerRestrict,
-                                  1);
+                                  2);
   flash_ctrl_info_perms_set(info_page, kCertificateInfoPageOwnerAccess);
+  sec_mmio_write32(info_page->cfg_wen_addr, 0);
+}
+
+rom_error_t flash_ctrl_info_type0_params_build(
+    uint8_t bank, uint8_t page, flash_ctrl_info_page_t *info_page) {
+  HARDENED_CHECK_LT(bank, FLASH_CTRL_PARAM_REG_NUM_BANKS);
+  HARDENED_CHECK_LT(page, FLASH_CTRL_PARAM_NUM_INFOS0);
+
+  uint32_t cfg_addr = kBase;
+  uint32_t cfg_wen_addr = kBase;
+
+  switch (bank) {
+    case 0:
+      cfg_addr += FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_OFFSET;
+      cfg_wen_addr += FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_OFFSET;
+      break;
+    case 1:
+      cfg_addr += FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_OFFSET;
+      cfg_wen_addr += FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_OFFSET;
+      break;
+    default:
+      HARDENED_TRAP();
+  }
+
+  *info_page = (flash_ctrl_info_page_t){
+      .base_addr = bank * FLASH_CTRL_PARAM_BYTES_PER_BANK +
+                   page * FLASH_CTRL_PARAM_BYTES_PER_PAGE,
+      .cfg_addr = cfg_addr + page * sizeof(uint32_t),
+      .cfg_wen_addr = cfg_wen_addr + page * sizeof(uint32_t),
+  };
+
+  return kErrorOk;
 }
diff --git a/sw/device/silicon_creator/lib/drivers/flash_ctrl.h b/sw/device/silicon_creator/lib/drivers/flash_ctrl.h
index 8f4c64bf1fb4b..43f1f183a7d42 100644
--- a/sw/device/silicon_creator/lib/drivers/flash_ctrl.h
+++ b/sw/device/silicon_creator/lib/drivers/flash_ctrl.h
@@ -79,20 +79,20 @@ typedef enum flash_ctrl_partition {
   X(kFlashCtrlInfoPageOwnerReserved1,      0, 6) \
   X(kFlashCtrlInfoPageOwnerReserved2,      0, 7) \
   X(kFlashCtrlInfoPageOwnerReserved3,      0, 8) \
-  X(kFlashCtrlInfoPageOwnerReserved4,      0, 9) \
+  X(kFlashCtrlInfoPageFactoryCerts,        0, 9) \
   /**
    * Bank 1 information partition type 0 pages.
    */ \
-  X(kFlashCtrlInfoPageBootData0,       1, 0) \
-  X(kFlashCtrlInfoPageBootData1,       1, 1) \
-  X(kFlashCtrlInfoPageOwnerSlot0,      1, 2) \
-  X(kFlashCtrlInfoPageOwnerSlot1,      1, 3) \
-  X(kFlashCtrlInfoPageOwnerReserved5,  1, 4) \
-  X(kFlashCtrlInfoPageOwnerReserved6,  1, 5) \
-  X(kFlashCtrlInfoPageOwnerReserved7,  1, 6) \
-  X(kFlashCtrlInfoPageBootServices,    1, 7) \
-  X(kFlashCtrlInfoPageOwnerReserved8,  1, 8) \
-  X(kFlashCtrlInfoPageDiceCerts,       1, 9) \
+  X(kFlashCtrlInfoPageBootData0,           1, 0) \
+  X(kFlashCtrlInfoPageBootData1,           1, 1) \
+  X(kFlashCtrlInfoPageOwnerSlot0,          1, 2) \
+  X(kFlashCtrlInfoPageOwnerSlot1,          1, 3) \
+  X(kFlashCtrlInfoPageCreatorReserved0,    1, 4) \
+  X(kFlashCtrlInfoPageOwnerReserved4,      1, 5) \
+  X(kFlashCtrlInfoPageOwnerReserved5,      1, 6) \
+  X(kFlashCtrlInfoPageOwnerReserved6,      1, 7) \
+  X(kFlashCtrlInfoPageOwnerReserved7,      1, 8) \
+  X(kFlashCtrlInfoPageDiceCerts,           1, 9) \
 // clang-format on
 
 /**
@@ -165,16 +165,20 @@ FLASH_CTRL_INFO_PAGES_DEFINE(INFO_PAGE_STRUCT_DECL_);
  * ```
  */
 enum {
-  kFlashCtrlSecMmioCreatorInfoPagesLockdown = 16,
   kFlashCtrlSecMmioCertInfoPageCreatorCfg = 2,
-  kFlashCtrlSecMmioCertInfoPageOwnerRestrict = 1,
+  kFlashCtrlSecMmioCertInfoPageOwnerRestrict = 2,
+  kFlashCtrlSecMmioCertInfoPagesOwnerRestrict = 5,
+  kFlashCtrlSecMmioCreatorInfoPagesLockdown = 14,
   kFlashCtrlSecMmioDataDefaultCfgSet = 1,
   kFlashCtrlSecMmioDataDefaultPermsSet = 1,
   kFlashCtrlSecMmioExecSet = 1,
   kFlashCtrlSecMmioInfoCfgSet = 1,
+  kFlashCtrlSecMmioInfoCfgLock = 1,
   kFlashCtrlSecMmioInfoPermsSet = 1,
   kFlashCtrlSecMmioBankErasePermsSet = 1,
   kFlashCtrlSecMmioInit = 3,
+  kFlashCtrlSecMmioDataRegionProtect = 1,
+  kFlashCtrlSecMmioDataRegionProtectLock = 1,
 };
 
 /**
@@ -318,6 +322,25 @@ rom_error_t flash_ctrl_info_read(const flash_ctrl_info_page_t *info_page,
                                  uint32_t offset, uint32_t word_count,
                                  void *data);
 
+/**
+ * Reads data from an information page, returning all zeros if a read error code
+ * is encountered.
+ *
+ * The flash controller will truncate to the closest, lower word aligned
+ * address. For example, if 0x13 is supplied, the controller will start reading
+ * at address 0x10.
+ *
+ * @param info_page Information page to read from.
+ * @param offset Offset from the start of the page.
+ * @param word_count Number of bus words to read.
+ * @param[out] data Buffer to store the read data. Must be word aligned.
+ * @return Result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t flash_ctrl_info_read_zeros_on_read_error(
+    const flash_ctrl_info_page_t *info_page, uint32_t offset,
+    uint32_t word_count, void *data);
+
 /**
  * Writes data to the data partition.
  *
@@ -418,21 +441,27 @@ rom_error_t flash_ctrl_info_erase(const flash_ctrl_info_page_t *info_page,
  * flash_ctrl config registers use 4-bits for boolean values. Use
  * `kMultiBitBool4True` to enable and `kMultiBitBool4False` to disable
  * permissions.
+ *
+ * The bitfields in this stuct match up with the bitfields in the peripheral
+ * register.
  */
 typedef struct flash_ctrl_perms {
+  uint32_t _pad0 : 4;
   /**
    * Read.
    */
-  multi_bit_bool_t read;
+  uint32_t read : 4;
   /**
    * Write.
    */
-  multi_bit_bool_t write;
+  uint32_t write : 4;
   /**
    * Erase.
    */
-  multi_bit_bool_t erase;
+  uint32_t erase : 4;
+  uint32_t _pad1 : 16;
 } flash_ctrl_perms_t;
+OT_ASSERT_SIZE(flash_ctrl_perms_t, 4);
 
 /**
  * Sets default access permissions for the data partition.
@@ -471,27 +500,26 @@ void flash_ctrl_info_perms_set(const flash_ctrl_info_page_t *info_page,
  * `kMultiBitBool4True` to enable and `kMultiBitBool4False` to disable
  * these settings.
  *
- * This struct has no padding, so it is safe to `memcmp()` without invoking UB.
+ * The bitfields in this stuct match up with the bitfields in the peripheral
+ * register.
  */
 typedef struct flash_ctrl_cfg {
+  uint32_t _pad0 : 16;
   /**
    * Scrambling.
    */
-  multi_bit_bool_t scrambling;
+  uint32_t scrambling : 4;
   /**
    * ECC.
    */
-  multi_bit_bool_t ecc;
+  uint32_t ecc : 4;
   /**
    * High endurance.
    */
-  multi_bit_bool_t he;
+  uint32_t he : 4;
+  uint32_t _pad1 : 4;
 } flash_ctrl_cfg_t;
-
-OT_ASSERT_MEMBER_OFFSET(flash_ctrl_cfg_t, scrambling, 0);
-OT_ASSERT_MEMBER_OFFSET(flash_ctrl_cfg_t, ecc, 4);
-OT_ASSERT_MEMBER_OFFSET(flash_ctrl_cfg_t, he, 8);
-OT_ASSERT_SIZE(flash_ctrl_cfg_t, 12);
+OT_ASSERT_SIZE(flash_ctrl_cfg_t, 4);
 
 /**
  * Sets default configuration settings for the data partition.
@@ -511,6 +539,13 @@ void flash_ctrl_data_default_cfg_set(flash_ctrl_cfg_t cfg);
  */
 flash_ctrl_cfg_t flash_ctrl_data_default_cfg_get(void);
 
+/**
+ * Reads the boot data info page configuration settings from OTP.
+ *
+ * @return Current OTP configuration settings.
+ */
+flash_ctrl_cfg_t flash_ctrl_boot_data_cfg_get(void);
+
 /**
  * A type for flash_ctrl memory protection region indices.
  */
@@ -529,11 +564,12 @@ typedef uint32_t flash_ctrl_region_index_t;
  * @param perms The read/write/erase permissions for this region.
  * @param cfg Flash config values that are used to fill in some fields of the
  *            `MP_REGION_CFG_${region}` register.
+ * @param lock Lock the configuration for this region.
  */
 void flash_ctrl_data_region_protect(flash_ctrl_region_index_t region,
                                     uint32_t page_offset, uint32_t num_pages,
                                     flash_ctrl_perms_t perms,
-                                    flash_ctrl_cfg_t cfg);
+                                    flash_ctrl_cfg_t cfg, hardened_bool_t lock);
 
 /**
  * Sets configuration settings for an info page.
@@ -548,6 +584,18 @@ void flash_ctrl_data_region_protect(flash_ctrl_region_index_t region,
 void flash_ctrl_info_cfg_set(const flash_ctrl_info_page_t *info_page,
                              flash_ctrl_cfg_t cfg);
 
+/**
+ * Write-locks configuration settings for an info page.
+ *
+ * The caller is responsible for calling
+ * `SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioInfoCfgLock)` when sec_mmio is
+ * being used to check expectations.
+ *
+ * @param info_page An information page.
+ * @param cfg New configuration settings.
+ */
+void flash_ctrl_info_cfg_lock(const flash_ctrl_info_page_t *info_page);
+
 /**
  * Set bank erase permissions for both flash banks.
  *
@@ -605,7 +653,7 @@ extern const flash_ctrl_perms_t kCertificateInfoPageOwnerAccess;
  * handing over execution to the owner boot stage.
  *
  * The caller is responsible for calling
- * `SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioCertInfoPagesCreatorCfg)`
+ * `SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioCertInfoPageCreatorCfg)`
  * when sec_mmio is being used to check expectations.
  */
 void flash_ctrl_cert_info_page_creator_cfg(
@@ -622,6 +670,17 @@ void flash_ctrl_cert_info_page_creator_cfg(
 void flash_ctrl_cert_info_page_owner_restrict(
     const flash_ctrl_info_page_t *info_page);
 
+/**
+ * Builds a `flash_ctrl_info_page_t` struct for a given bank and page.
+ *
+ * @param bank Bank index.
+ * @param page Page index.
+ * @param[out] info_page Pointer to the `flash_ctrl_info_page_t` struct to fill.
+ * @return Result of the operation.
+ */
+rom_error_t flash_ctrl_info_type0_params_build(
+    uint8_t bank, uint8_t page, flash_ctrl_info_page_t *info_page);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/flash_ctrl_unittest.cc b/sw/device/silicon_creator/lib/drivers/flash_ctrl_unittest.cc
index 1419634e7de5e..c01aa4dcd8ef9 100644
--- a/sw/device/silicon_creator/lib/drivers/flash_ctrl_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/flash_ctrl_unittest.cc
@@ -93,6 +93,14 @@ struct InitCase {
    * Configuration settings to be read from OTP.
    */
   flash_ctrl_cfg_t cfg;
+  /**
+   * Configuration override settings to be read from OTP.
+   */
+  uint32_t override_val;
+  /**
+   * Expected value to be written to the cfg override register.
+   */
+  uint32_t override_write_val;
   /**
    * Expected value to be written to the info config register.
    */
@@ -118,7 +126,12 @@ TEST_P(InitTest, Initialize) {
   EXPECT_CALL(
       otp_,
       read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_HW_INFO_CFG_OVERRIDE_OFFSET))
-      .WillOnce(Return(0));
+      .WillOnce(Return(GetParam().override_val));
+
+  if (GetParam().override_val != 0) {
+    EXPECT_SEC_WRITE32(base_ + FLASH_CTRL_HW_INFO_CFG_OVERRIDE_REG_OFFSET,
+                       GetParam().override_write_val);
+  }
 
   EXPECT_ABS_WRITE32(base_ + FLASH_CTRL_INIT_REG_OFFSET,
                      {{FLASH_CTRL_INIT_VAL_BIT, true}});
@@ -155,6 +168,8 @@ INSTANTIATE_TEST_SUITE_P(AllCases, InitTest,
                                  .cfg = {.scrambling = kMultiBitBool4True,
                                          .ecc = kMultiBitBool4False,
                                          .he = kMultiBitBool4False},
+                                 .override_val = 0,
+                                 .override_write_val = 0,
                                  .info_write_val = 0x9969996,
                                  .data_write_val = 0x996999,
                              },
@@ -163,6 +178,8 @@ INSTANTIATE_TEST_SUITE_P(AllCases, InitTest,
                                  .cfg = {.scrambling = kMultiBitBool4False,
                                          .ecc = kMultiBitBool4True,
                                          .he = kMultiBitBool4False},
+                                 .override_val = 0,
+                                 .override_write_val = 0,
                                  .info_write_val = 0x9699996,
                                  .data_write_val = 0x969999,
                              },
@@ -171,6 +188,8 @@ INSTANTIATE_TEST_SUITE_P(AllCases, InitTest,
                                  .cfg = {.scrambling = kMultiBitBool4False,
                                          .ecc = kMultiBitBool4False,
                                          .he = kMultiBitBool4True},
+                                 .override_val = 0,
+                                 .override_write_val = 0,
                                  .info_write_val = 0x6999996,
                                  .data_write_val = 0x699999,
                              },
@@ -179,6 +198,38 @@ INSTANTIATE_TEST_SUITE_P(AllCases, InitTest,
                                  .cfg = {.scrambling = kMultiBitBool4True,
                                          .ecc = kMultiBitBool4True,
                                          .he = kMultiBitBool4False},
+                                 .override_val = 0,
+                                 .override_write_val = 0,
+                                 .info_write_val = 0x9669996,
+                                 .data_write_val = 0x966999,
+                             },
+                             // Override scrambling disable.
+                             InitCase{
+                                 .cfg = {.scrambling = kMultiBitBool4True,
+                                         .ecc = kMultiBitBool4False,
+                                         .he = kMultiBitBool4False},
+                                 .override_val = 0x0006,
+                                 .override_write_val = 0x96,
+                                 .info_write_val = 0x9969996,
+                                 .data_write_val = 0x996999,
+                             },
+                             // Override ECC disable.
+                             InitCase{
+                                 .cfg = {.scrambling = kMultiBitBool4False,
+                                         .ecc = kMultiBitBool4True,
+                                         .he = kMultiBitBool4False},
+                                 .override_val = 0x0600,
+                                 .override_write_val = 0x69,
+                                 .info_write_val = 0x9699996,
+                                 .data_write_val = 0x969999,
+                             },
+                             // Override scrambling and ECC disable.
+                             InitCase{
+                                 .cfg = {.scrambling = kMultiBitBool4True,
+                                         .ecc = kMultiBitBool4True,
+                                         .he = kMultiBitBool4False},
+                                 .override_val = 0x0606,
+                                 .override_write_val = 0x66,
                                  .info_write_val = 0x9669996,
                                  .data_write_val = 0x966999,
                              }));
@@ -682,11 +733,11 @@ INSTANTIATE_TEST_SUITE_P(AllCases, FlashCtrlCfgSetTest,
                              }));
 
 TEST_F(FlashCtrlTest, CreatorInfoLockdown) {
-  std::array<const flash_ctrl_info_page_t *, 8> no_owner_access = {
-      &kFlashCtrlInfoPageFactoryId,   &kFlashCtrlInfoPageCreatorSecret,
-      &kFlashCtrlInfoPageOwnerSecret, &kFlashCtrlInfoPageWaferAuthSecret,
-      &kFlashCtrlInfoPageBootData0,   &kFlashCtrlInfoPageBootData1,
-      &kFlashCtrlInfoPageOwnerSlot0,  &kFlashCtrlInfoPageOwnerSlot1,
+  std::array<const flash_ctrl_info_page_t *, 7> no_owner_access = {
+      &kFlashCtrlInfoPageFactoryId,        &kFlashCtrlInfoPageCreatorSecret,
+      &kFlashCtrlInfoPageOwnerSecret,      &kFlashCtrlInfoPageWaferAuthSecret,
+      &kFlashCtrlInfoPageBootData0,        &kFlashCtrlInfoPageBootData1,
+      &kFlashCtrlInfoPageCreatorReserved0,
   };
   for (auto page : no_owner_access) {
     auto info_page = InfoPages().at(page);
@@ -738,6 +789,7 @@ TEST_F(FlashCtrlTest, CertInfoOwnerRestrict) {
     auto info_page = InfoPages().at(page);
     EXPECT_SEC_READ32(base_ + info_page.cfg_offset, 0x9666666);
     EXPECT_SEC_WRITE32(base_ + info_page.cfg_offset, 0x9669966);
+    EXPECT_SEC_WRITE32(base_ + info_page.cfg_wen_offset, 0);
   }
 
   flash_ctrl_cert_info_page_owner_restrict(
@@ -931,7 +983,7 @@ TEST_P(DataRegionProtectTestSuite, ProtectRegionReadWriteEraseEnabled) {
 
   // Expect that flash_ctrl_data_region_protect() will reset the
   // MP_REGION_CFG_${i} register.
-  EXPECT_CALL(sec_mmio_,
+  EXPECT_CALL(mmio_,
               Write32(kBase + kFlashCtrlMpRegionCfgRegOffset[GetParamRegion()],
                       kFlashCtrlMpRegionCfgRegResval[GetParamRegion()]));
 
@@ -968,7 +1020,54 @@ TEST_P(DataRegionProtectTestSuite, ProtectRegionReadWriteEraseEnabled) {
           .scrambling = BoolToMultiBitBool4(kFlashScrambling),
           .ecc = BoolToMultiBitBool4(kFlashEcc),
           .he = BoolToMultiBitBool4(kFlashHe),
-      });
+      },
+      kHardenedBoolFalse);
+}
+
+TEST(FlashCtrl, FlashPermissionBits) {
+  union Permissions {
+    flash_ctrl_perms_t perms;
+    uint32_t raw;
+  };
+
+  Permissions word = {
+      .perms =
+          {
+              .read = 1,
+              .write = 2,
+              .erase = 3,
+          },
+  };
+
+  EXPECT_EQ(1, bitfield_field32_read(word.raw,
+                                     FLASH_CTRL_MP_REGION_CFG_0_RD_EN_0_FIELD));
+  EXPECT_EQ(2, bitfield_field32_read(
+                   word.raw, FLASH_CTRL_MP_REGION_CFG_0_PROG_EN_0_FIELD));
+  EXPECT_EQ(3, bitfield_field32_read(
+                   word.raw, FLASH_CTRL_MP_REGION_CFG_0_ERASE_EN_0_FIELD));
+}
+
+TEST(FlashCtrl, FlashConfigurationBits) {
+  union Permissions {
+    flash_ctrl_cfg_t cfg;
+    uint32_t raw;
+  };
+
+  Permissions word = {
+      .cfg =
+          {
+              .scrambling = 1,
+              .ecc = 2,
+              .he = 3,
+          },
+  };
+
+  EXPECT_EQ(1, bitfield_field32_read(
+                   word.raw, FLASH_CTRL_MP_REGION_CFG_0_SCRAMBLE_EN_0_FIELD));
+  EXPECT_EQ(2, bitfield_field32_read(
+                   word.raw, FLASH_CTRL_MP_REGION_CFG_0_ECC_EN_0_FIELD));
+  EXPECT_EQ(3, bitfield_field32_read(word.raw,
+                                     FLASH_CTRL_MP_REGION_CFG_0_HE_EN_0_FIELD));
 }
 
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/drivers/hmac.c b/sw/device/silicon_creator/lib/drivers/hmac.c
index bd63109d1b901..4de00e4ea4e13 100644
--- a/sw/device/silicon_creator/lib/drivers/hmac.c
+++ b/sw/device/silicon_creator/lib/drivers/hmac.c
@@ -8,12 +8,20 @@
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/drivers/ibex.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
 #include "hmac_regs.h"  // Generated.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-void hmac_sha256_configure(bool big_endian_digest) {
+enum {
+  /* Temporary delay linked to issue #24767, which should be equivalent to at
+   * least 80 clock cycles of the HMAC clock plus a margin.
+   */
+  kHmacTmpDelay = 200,
+};
+
+static void hmac_configure(bool big_endian_digest, bool hmac_mode) {
   // Clear the config, stopping the SHA engine.
   abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, 0u);
 
@@ -27,7 +35,7 @@ void hmac_sha256_configure(bool big_endian_digest) {
   reg = bitfield_bit32_write(reg, HMAC_CFG_DIGEST_SWAP_BIT, big_endian_digest);
   reg = bitfield_bit32_write(reg, HMAC_CFG_ENDIAN_SWAP_BIT, false);
   reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT, true);
-  reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT, false);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT, hmac_mode);
   // configure to run SHA-2 256 with 256-bit key
   reg = bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD,
                                HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256);
@@ -36,6 +44,19 @@ void hmac_sha256_configure(bool big_endian_digest) {
   abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, reg);
 }
 
+void hmac_hmac_sha256_configure(bool big_endian_digest, hmac_key_t key) {
+  hmac_configure(big_endian_digest, /*hmac_mode=*/true);
+  for (size_t i = 0; i < kHmacKeyNumWords; ++i) {
+    abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_KEY_0_REG_OFFSET +
+                         i * sizeof(uint32_t),
+                     key.key[i]);
+  }
+}
+
+void hmac_sha256_configure(bool big_endian_digest) {
+  hmac_configure(big_endian_digest, /*hmac_mode=*/false);
+}
+
 inline void hmac_sha256_start(void) {
   uint32_t cmd = bitfield_bit32_write(0, HMAC_CMD_HASH_START_BIT, true);
   abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, cmd);
@@ -125,12 +146,37 @@ void hmac_sha256(const void *data, size_t len, hmac_digest_t *digest) {
   hmac_sha256_final(digest);
 }
 
+void hmac_hmac_sha256(const void *data, size_t len, hmac_key_t key,
+                      bool big_endian_digest, hmac_digest_t *digest) {
+  hmac_hmac_sha256_init(key, big_endian_digest);
+  hmac_sha256_update(data, len);
+  hmac_sha256_process();
+  hmac_sha256_final(digest);
+}
+
 void hmac_sha256_save(hmac_context_t *ctx) {
+#ifndef OT_COVERAGE_INSTRUMENTED
   // Issue the STOP command to halt the operation and compute the intermediate
   // digest.
   uint32_t cmd = bitfield_bit32_write(0, HMAC_CMD_HASH_STOP_BIT, true);
   abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, cmd);
   wait_for_done();
+#else  // OT_COVERAGE_INSTRUMENTED
+  /**
+   * Workaround linked to issue #24767
+   *
+   * The HMAC HWIP is not told to stop. This will cause the HW to be in an
+   * unexpected state, which could be exited by trigerring a simple HASH process
+   * operation. Before doing that, the context should be saved (message length
+   * and digest). This context is only available after a duration equivalent to
+   * 64 clock cycles in SHA2-256 and 80 clock cycles in SHA2-384/512, after the
+   * message length is on a block boundary (512 for SHA2-256 or 1024 bits for
+   * SHA2-384/512).
+   */
+  uint32_t start = ibex_mcycle32();
+  while (ibex_mcycle32() - start < kHmacTmpDelay)
+    ;
+#endif
 
   // Read the digest registers. Note that endianness does not matter here,
   // because we will simply restore the registers in the same order as we saved
@@ -147,6 +193,18 @@ void hmac_sha256_save(hmac_context_t *ctx) {
   ctx->msg_len_upper = abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR +
                                        HMAC_MSG_LENGTH_UPPER_REG_OFFSET);
 
+#ifdef OT_COVERAGE_INSTRUMENTED
+  // Workaround linked to issue #24767
+  // Trigger hash_process
+  uint32_t cmd_reg =
+      abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET);
+  cmd_reg = bitfield_bit32_write(cmd_reg, HMAC_CMD_HASH_PROCESS_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, cmd_reg);
+
+  // Wait for HMAC HWIP operation to be completed.
+  wait_for_done();
+#endif
+
   // Momentarily clear the `sha_en` bit, which clears the digest.
   uint32_t cfg =
       abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET);
@@ -191,5 +249,6 @@ void hmac_sha256_restore(const hmac_context_t *ctx) {
   abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET, cmd);
 }
 
+extern void hmac_hmac_sha256_init(hmac_key_t key, bool big_endian_digest);
 extern void hmac_sha256_init(void);
 extern void hmac_sha256_final(hmac_digest_t *digest);
diff --git a/sw/device/silicon_creator/lib/drivers/hmac.h b/sw/device/silicon_creator/lib/drivers/hmac.h
index 33167f7d7945e..fc6cb3525364e 100644
--- a/sw/device/silicon_creator/lib/drivers/hmac.h
+++ b/sw/device/silicon_creator/lib/drivers/hmac.h
@@ -22,6 +22,14 @@ enum {
    * Size of a SHA-256 digest in 32-bit words.
    */
   kHmacDigestNumWords = kHmacDigestNumBytes / sizeof(uint32_t),
+  /**
+   * Size of a HMAC-SHA-256 key in bytes.
+   */
+  kHmacKeyNumBytes = kHmacDigestNumBytes,
+  /**
+   * Size of a HMAC-SHA-256 key in 32-bit words.
+   */
+  kHmacKeyNumWords = kHmacDigestNumWords,
 };
 
 /**
@@ -31,6 +39,13 @@ typedef struct hmac_digest {
   uint32_t digest[kHmacDigestNumWords];
 } hmac_digest_t;
 
+/**
+ * A typed representation of the HMAC secret key (for HMAC-SHA256 mode).
+ */
+typedef struct hmac_key {
+  uint32_t key[kHmacDigestNumWords];
+} hmac_key_t;
+
 /**
  * Stored SHA256 operation state.
  *
@@ -44,6 +59,32 @@ typedef struct hmac_context {
   uint32_t digest[kHmacDigestNumWords];
 } hmac_context_t;
 
+/**
+ * Configure the HMAC block in HMAC-SHA256 mode.
+ *
+ * This function resets the HMAC module to clear the digest register.
+ * It then configures the HMAC block in HMAC mode with digest output
+ * in the requested endianness.
+ *
+ * @param big_endian Whether or not to initialize the peripheral for big-endian
+ *                   results.
+ */
+void hmac_hmac_sha256_configure(bool big_endian_digest, hmac_key_t key);
+
+/**
+ * Convenience single-shot function for computing the HMAC-SHA-256 keyed-digest
+ * of a contiguous buffer.
+ *
+ * @param data Buffer to copy data from.
+ * @param len Size of the `data` buffer in bytes.
+ * @param key Secret key to use.
+ * @param big_endian_digest Whether to configure the hardware to produce a
+ *                          big-endian digest.
+ * @param[out] digest Buffer to copy digest to.
+ */
+void hmac_hmac_sha256(const void *data, size_t len, hmac_key_t key,
+                      bool big_endian_digest, hmac_digest_t *digest);
+
 /**
  * Configure the HMAC block in SHA256 mode.
  *
@@ -66,10 +107,22 @@ void hmac_sha256_start(void);
 /**
  * Configures and starts HMAC in SHA256 mode with little-endian output.
  */
+#if defined(OT_PLATFORM_RV32) || defined(HMAC_UNIT_TEST_)
 inline void hmac_sha256_init(void) {
   hmac_sha256_configure(false);
   hmac_sha256_start();
 }
+#else
+void hmac_sha256_init(void);
+#endif
+
+/**
+ * Configures and starts HMAC in HMAC mode with little-endian output.
+ */
+inline void hmac_hmac_sha256_init(hmac_key_t key, bool big_endian_digest) {
+  hmac_hmac_sha256_configure(big_endian_digest, key);
+  hmac_sha256_start();
+}
 
 /**
  * Sends `len` bytes from `data` to the SHA2-256 function.
@@ -120,9 +173,13 @@ void hmac_sha256_final_truncated(uint32_t *digest, size_t len);
  *
  * @param[out] digest Buffer to copy digest to.
  */
+#if defined(OT_PLATFORM_RV32) || defined(HMAC_UNIT_TEST_)
 inline void hmac_sha256_final(hmac_digest_t *digest) {
   hmac_sha256_final_truncated(digest->digest, ARRAYSIZE(digest->digest));
 }
+#else
+void hmac_sha256_final(hmac_digest_t *digest);
+#endif
 
 /**
  * Convenience single-shot function for computing the SHA-256 digest of a
diff --git a/sw/device/silicon_creator/lib/drivers/hmac_functest.c b/sw/device/silicon_creator/lib/drivers/hmac_functest.c
index 0b7e92c9b74fa..e21f49e1a5308 100644
--- a/sw/device/silicon_creator/lib/drivers/hmac_functest.c
+++ b/sw/device/silicon_creator/lib/drivers/hmac_functest.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include <stdalign.h>
 #include <stdbool.h>
 #include <stdint.h>
 
@@ -19,17 +20,18 @@
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-enum {
-  kSha256BlockBits = 512,
-  kSha256BlockBytes = kSha256BlockBits / 8,
-};
-
 // From: http://www.abrahamlincolnonline.org/lincoln/speeches/gettysburg.htm
-static const char kGettysburgPrelude[] =
+static alignas(uint32_t) const char kGettysburgPrelude[] =
     "Four score and seven years ago our fathers brought forth on this "
     "continent, a new nation, conceived in Liberty, and dedicated to the "
     "proposition that all men are created equal.";
 
+enum {
+  kSha256BlockBits = 512,
+  kSha256BlockBytes = kSha256BlockBits / 8,
+  kGettysburgPreludeSize = sizeof(kGettysburgPrelude),
+};
+
 // The following shell command will produce the sha256sum and convert the
 // digest into valid C hexadecimal constants:
 //
@@ -56,7 +58,7 @@ static const uint32_t kGettysburgDigest[] = {
 static const char kGettysburgDigestBigEndian[] =
     "1e6fd4030f9034cd775708a396c324ed420ec587eb3dd433e29f6ac08b8cc7ba";
 
-rom_error_t hmac_test(void) {
+rom_error_t hmac_sha256_test(void) {
   hmac_digest_t digest;
   hmac_sha256(kGettysburgPrelude, sizeof(kGettysburgPrelude) - 1, &digest);
 
@@ -70,6 +72,68 @@ rom_error_t hmac_test(void) {
   return kErrorOk;
 }
 
+static const hmac_key_t kHmacKey = {.key = {0x11112222, 0x33334444, 0x55556666,
+                                            0x77778888, 0x9999aaaa, 0xbbbbcccc,
+                                            0xddddeeee, 0xffff0000}};
+
+// The following shell command will produce the HMAC-SHA256 digest, and convert
+// it into valid C hexadecimal constants:
+//
+// $ echo -n "Four score and seven years ago our fathers brought forth on this
+// continent, a new nation, conceived in Liberty, and dedicated to the
+// proposition that all men are created equal." | openssl dgst \
+//     -sha256 -mac HMAC -macopt \
+//     hexkey:111122223333444455556666777788889999aaaabbbbccccddddeeeeffff0000 \
+//     | cut -f2 -d' ' | sed -e "s/......../0x&,\n/g" | tac
+static const uint32_t kGettysburgHmacSha256Digest[] = {
+    0xa63131bc, 0xeb1cb98b, 0xa0888a13, 0x497f2087,
+    0xb54e0af5, 0x9d85e15b, 0xa9a3bafe, 0x9d115197,
+};
+
+// The unaligned version of the kGettysburgPrelude is used to test
+typedef struct unalignedhash {
+  char unused;
+  const char payload[kGettysburgPreludeSize];
+} unalignedhash_t;
+
+// This structure is used to ensure that the kGettysburgPrelude is not aligned
+// on a 4-byte boundary
+static const alignas(uint32_t) unalignedhash_t kGettysburgPreludeUnaligned = {
+    .payload =
+        "Four score and seven years ago our fathers brought forth on this "
+        "continent, a new nation, conceived in Liberty, and dedicated to the "
+        "proposition that all men are created equal.",
+};
+
+rom_error_t hmac_hmac_sha256_test(void) {
+  hmac_digest_t digest;
+  hmac_hmac_sha256(kGettysburgPrelude, sizeof(kGettysburgPrelude) - 1, kHmacKey,
+                   /*big_endian_digest=*/false, &digest);
+  const size_t len = ARRAYSIZE(digest.digest);
+  for (int i = 0; i < len; ++i) {
+    LOG_INFO("word %d = 0x%08x", i, digest.digest[i]);
+    if (digest.digest[i] != kGettysburgHmacSha256Digest[i]) {
+      return kErrorUnknown;
+    }
+  }
+  return kErrorOk;
+}
+
+rom_error_t hmac_hmac_sha256_unaligned_test(void) {
+  hmac_digest_t digest;
+  hmac_hmac_sha256(kGettysburgPreludeUnaligned.payload,
+                   sizeof(kGettysburgPreludeUnaligned.payload) - 1, kHmacKey,
+                   /*big_endian_digest=*/false, &digest);
+  const size_t len = ARRAYSIZE(digest.digest);
+  for (int i = 0; i < len; ++i) {
+    LOG_INFO("word %d = 0x%08x", i, digest.digest[i]);
+    if (digest.digest[i] != kGettysburgHmacSha256Digest[i]) {
+      return kErrorUnknown;
+    }
+  }
+  return kErrorOk;
+}
+
 rom_error_t hmac_process_nowait_test(void) {
   hmac_digest_t digest;
   hmac_sha256_init();
@@ -258,7 +322,9 @@ OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
   status_t result = OK_STATUS();
-  EXECUTE_TEST(result, hmac_test);
+  EXECUTE_TEST(result, hmac_sha256_test);
+  EXECUTE_TEST(result, hmac_hmac_sha256_unaligned_test);
+  EXECUTE_TEST(result, hmac_hmac_sha256_test);
   EXECUTE_TEST(result, hmac_process_nowait_test);
   EXECUTE_TEST(result, hmac_process_wait_test);
   EXECUTE_TEST(result, hmac_truncated_test);
diff --git a/sw/device/silicon_creator/lib/drivers/ibex.c b/sw/device/silicon_creator/lib/drivers/ibex.c
index 5fdb7e7812de4..8b96967dcbf3b 100644
--- a/sw/device/silicon_creator/lib/drivers/ibex.c
+++ b/sw/device/silicon_creator/lib/drivers/ibex.c
@@ -80,6 +80,14 @@ void ibex_addr_remap_lockdown(uint32_t index) {
   sec_mmio_write32(kBase + RV_CORE_IBEX_DBUS_REGWEN_0_REG_OFFSET + index, 0);
 }
 
+void ibex_enable_nmi(ibex_nmi_source_t nmi_src) {
+  abs_mmio_write32(kBase + RV_CORE_IBEX_NMI_ENABLE_REG_OFFSET, nmi_src);
+}
+
+void ibex_clear_nmi(ibex_nmi_source_t nmi_src) {
+  abs_mmio_write32(kBase + RV_CORE_IBEX_NMI_STATE_REG_OFFSET, nmi_src);
+}
+
 // `extern` declarations to give the inline functions in the corresponding
 // header a link location.
 extern void ibex_mcycle_zero(void);
diff --git a/sw/device/silicon_creator/lib/drivers/ibex.h b/sw/device/silicon_creator/lib/drivers/ibex.h
index f6422b282e630..c7b090545f5b9 100644
--- a/sw/device/silicon_creator/lib/drivers/ibex.h
+++ b/sw/device/silicon_creator/lib/drivers/ibex.h
@@ -140,6 +140,35 @@ uint32_t ibex_addr_remap_get(uint32_t index);
  */
 void ibex_addr_remap_lockdown(uint32_t index);
 
+typedef enum ibex_nmi_source {
+  /**
+   * NMI alert handler.
+   */
+  kIbexNmiSourceAlert = 1 << 0,
+  /**
+   * NMI watchdog bark.
+   */
+  kIbexNmiSourceWdog = 1 << 1,
+  /**
+   * All NMIs.
+   */
+  kIbexNmiSourceAll = 0x3,
+} ibex_nmi_source_t;
+
+/**
+ * Enables the specified NMI sources.
+ *
+ * @param nmi_src The NMI source(s) to enable.
+ */
+void ibex_enable_nmi(ibex_nmi_source_t nmi_src);
+
+/**
+ * Clears the specified NMI sources.
+ *
+ * @param nmi_src The NMI source(s) to clear.
+ */
+void ibex_clear_nmi(ibex_nmi_source_t nmi_src);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/ibex_unittest.cc b/sw/device/silicon_creator/lib/drivers/ibex_unittest.cc
index d95229253ee26..7488fee795601 100644
--- a/sw/device/silicon_creator/lib/drivers/ibex_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/ibex_unittest.cc
@@ -17,12 +17,15 @@
 namespace ibex_unittest {
 namespace {
 
-class AddressTranslationTest : public rom_test::RomTest {
+class IbexTest : public rom_test::RomTest {
  protected:
   uint32_t base_ = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR;
   rom_test::MockSecMmio sec_;
+  rom_test::MockAbsMmio mmio_;
 };
 
+class AddressTranslationTest : public IbexTest {};
+
 TEST_F(AddressTranslationTest, Slot0Sucess) {
   uint32_t matching_addr = 0x9000000;
   uint32_t remap_addr = 0x2000000;
@@ -64,5 +67,38 @@ TEST_F(AddressTranslationTest, Slot1Sucess) {
 
   ibex_addr_remap_1_set(matching_addr, remap_addr, size);
 }
+
+class NmiEnableTest : public IbexTest {};
+
+TEST_F(NmiEnableTest, AllNmis) {
+  // Enable alert NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_ENABLE_REG_OFFSET, 1);
+  ibex_enable_nmi(kIbexNmiSourceAlert);
+
+  // Enable watchdog NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_ENABLE_REG_OFFSET, 2);
+  ibex_enable_nmi(kIbexNmiSourceWdog);
+
+  // Enable all NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_ENABLE_REG_OFFSET, 3);
+  ibex_enable_nmi(kIbexNmiSourceAll);
+}
+
+class NmiClearTest : public IbexTest {};
+
+TEST_F(NmiClearTest, AllNmis) {
+  // Clear alert NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_STATE_REG_OFFSET, 1);
+  ibex_clear_nmi(kIbexNmiSourceAlert);
+
+  // Clear watchdog NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_STATE_REG_OFFSET, 2);
+  ibex_clear_nmi(kIbexNmiSourceWdog);
+
+  // Clear all NMIs.
+  EXPECT_ABS_WRITE32(base_ + RV_CORE_IBEX_NMI_STATE_REG_OFFSET, 3);
+  ibex_clear_nmi(kIbexNmiSourceAll);
+}
+
 }  // namespace
 }  // namespace ibex_unittest
diff --git a/sw/device/silicon_creator/lib/drivers/keymgr.c b/sw/device/silicon_creator/lib/drivers/keymgr.c
index eb6cfce134f23..2586e49e4afff 100644
--- a/sw/device/silicon_creator/lib/drivers/keymgr.c
+++ b/sw/device/silicon_creator/lib/drivers/keymgr.c
@@ -162,9 +162,11 @@ static rom_error_t keymgr_is_idle(void) {
  * Wait for the key manager to finish an operation.
  *
  * Polls the key manager until it is no longer busy. If the operation completed
- * successfully or the key manager was already idle, returns kErrorOk. If
- * there was an error during the operation, reads and clears the error code
- * and returns kErrorKeymgrInternal.
+ * successfully, returns kErrorOk. If there was an error during the operation,
+ * reads and clears the error code and returns kErrorKeymgrInternal.
+ *
+ * This function assumes an operation has already been started by the caller,
+ * and traps if the keymgr is already idle.
  *
  * @return OK or error.
  */
@@ -180,13 +182,12 @@ static rom_error_t keymgr_wait_until_done(void) {
     status = bitfield_field32_read(reg, KEYMGR_OP_STATUS_STATUS_FIELD);
   } while (status == KEYMGR_OP_STATUS_STATUS_VALUE_WIP);
 
-  // Check if the key manager reported errors. If it is already idle or
-  // completed an operation successfully, return an OK status. A `WIP` status
-  // should not be possible because of the check above.
+  // Check if the key manager reported errors. If it completed an operation
+  // successfully, return an OK status. A `WIP` status should not be possible
+  // because of the check above.
+  // The `IDLE` status is left unhandled because the keymgr should never be
+  // idle after an operation has been started by the caller.
   switch (launder32(status)) {
-    case KEYMGR_OP_STATUS_STATUS_VALUE_IDLE:
-      HARDENED_CHECK_EQ(status, KEYMGR_OP_STATUS_STATUS_VALUE_IDLE);
-      return kErrorOk;
     case KEYMGR_OP_STATUS_STATUS_VALUE_DONE_SUCCESS:
       HARDENED_CHECK_EQ(status, KEYMGR_OP_STATUS_STATUS_VALUE_DONE_SUCCESS);
       return kErrorOk;
@@ -298,6 +299,20 @@ rom_error_t sc_keymgr_owner_advance(keymgr_binding_value_t *sealing_binding,
   return kErrorOk;
 }
 
+void sc_keymgr_disable(void) {
+  uint32_t reg =
+      bitfield_field32_write(0, KEYMGR_CONTROL_SHADOWED_DEST_SEL_FIELD,
+                             KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_NONE);
+  reg = bitfield_field32_write(reg, KEYMGR_CONTROL_SHADOWED_OPERATION_FIELD,
+                               KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_DISABLE);
+  abs_mmio_write32_shadowed(kBase + KEYMGR_CONTROL_SHADOWED_REG_OFFSET, reg);
+  abs_mmio_write32(kBase + KEYMGR_START_REG_OFFSET, 1);
+
+  // According to the documentation for the SIDELOAD_CLEAR register, an invalid
+  // destination will enable continuous clearing of all destinations.
+  abs_mmio_write32(kBase + KEYMGR_SIDELOAD_CLEAR_REG_OFFSET, UINT32_MAX);
+}
+
 extern rom_error_t sc_keymgr_generate_key_otbn(
     sc_keymgr_key_type_t key_type, sc_keymgr_diversification_t diversification);
 extern rom_error_t sc_keymgr_sideload_clear_otbn(void);
diff --git a/sw/device/silicon_creator/lib/drivers/keymgr.h b/sw/device/silicon_creator/lib/drivers/keymgr.h
index 7545be375694c..5b6c43e117268 100644
--- a/sw/device/silicon_creator/lib/drivers/keymgr.h
+++ b/sw/device/silicon_creator/lib/drivers/keymgr.h
@@ -201,6 +201,35 @@ typedef enum sc_keymgr_key_type {
   kScKeymgrKeyTypeSealing = 1,
 } sc_keymgr_key_type_t;
 
+/**
+ * Keymgr ECC key generation descriptor.
+ */
+typedef struct sc_keymgr_ecc_key {
+  /**
+   * Keymgr key type, either: attestation or sealing.
+   *
+   * Attestation keys are derived from keymgr state that changes when ROM_EXT or
+   * Owner firmware is updated, while Sealing keys remain stable as long as a
+   * device remains under the same ownership and hardware lifecycle state.
+   */
+  sc_keymgr_key_type_t type;
+  /**
+   * Index into the kFlashCtrlInfoPageAttestationKeySeeds flash info page that
+   * holds a seed for generating the ECC key pair.
+   */
+  uint32_t keygen_seed_idx;
+  /**
+   * Pointer to the keymgr diversifier that is used when actuating the keymgr's
+   * "output-generate" function to generate another ECC keygen seed that will be
+   * sideloaded to OTBN.
+   */
+  const sc_keymgr_diversification_t *keymgr_diversifier;
+  /**
+   * Pointer to the keymgr diversifier that is used when actuating the keymgr's
+   */
+  sc_keymgr_state_t required_keymgr_state;
+} sc_keymgr_ecc_key_t;
+
 /**
  * Generate a key manager key and sideload to the requested block.
  *
@@ -298,6 +327,11 @@ rom_error_t sc_keymgr_owner_advance(keymgr_binding_value_t *attest_binding,
                                     keymgr_binding_value_t *sealing_binding,
                                     uint32_t max_key_version);
 
+/**
+ * Disables the keymgr and clears all sideload slots.
+ */
+void sc_keymgr_disable(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/keymgr_functest.c b/sw/device/silicon_creator/lib/drivers/keymgr_functest.c
index 6bddb0c50000f..8d06bebd8f69b 100644
--- a/sw/device/silicon_creator/lib/drivers/keymgr_functest.c
+++ b/sw/device/silicon_creator/lib/drivers/keymgr_functest.c
@@ -256,6 +256,13 @@ rom_error_t keymgr_rom_ext_test(void) {
   return kErrorOk;
 }
 
+rom_error_t keymgr_disable_test(void) {
+  sc_keymgr_disable();
+  CHECK(sc_keymgr_state_check(kScKeymgrStateDisabled) == kErrorOk,
+        "Keymgr should be in the disabled state.");
+  return kErrorOk;
+}
+
 bool test_main(void) {
   status_t result = OK_STATUS();
   dif_rstmgr_t rstmgr;
@@ -295,6 +302,7 @@ bool test_main(void) {
 
     EXECUTE_TEST(result, keymgr_rom_test);
     EXECUTE_TEST(result, keymgr_rom_ext_test);
+    EXECUTE_TEST(result, keymgr_disable_test);
     return status_ok(result);
   } else {
     LOG_FATAL("Unexpected reset reason unexpected: %08x", info);
diff --git a/sw/device/silicon_creator/lib/drivers/kmac_functest.c b/sw/device/silicon_creator/lib/drivers/kmac_functest.c
index fd1e5e8ea1c08..5b62efefa103f 100644
--- a/sw/device/silicon_creator/lib/drivers/kmac_functest.c
+++ b/sw/device/silicon_creator/lib/drivers/kmac_functest.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include <stdalign.h>
 #include <stdbool.h>
 #include <stdint.h>
 
@@ -19,12 +20,32 @@
 
 OTTF_DEFINE_TEST_CONFIG();
 
+enum {
+  kShortDigestLen = 8,
+  kLongDigestLen = 75,
+  kShortMsgLen = 13,
+  kLongMsgLen = 26 * 4,
+};
+
+typedef struct unalignedhash {
+  char unused;
+  char short_payload[kShortMsgLen];
+  char long_payload[kLongMsgLen];
+} unalignedhash_t;
+
+static const alignas(uint32_t) unalignedhash_t kKmacTestData = {
+    .short_payload = "Test message!",
+    .long_payload =
+        "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqr"
+        "stuv"
+        "wxyzABCDEFGHIJKLMNOPQRSTUVWXYZ",
+};
+
 /**
  * Test data: short message with short output.
  */
 static const char short_msg[] = "Test message!";
-static const size_t short_msg_len = 13;
-static const uint32_t short_msg_digest[8] = {
+static const uint32_t short_msg_digest[kShortDigestLen] = {
     0x84f1c984, 0x7a0316bb, 0xe404cfed, 0x83f9078a,
     0x21491adc, 0xd6c30988, 0xc6822ff6, 0x20b73405,
 };
@@ -35,8 +56,7 @@ static const uint32_t short_msg_digest[8] = {
 static const char long_msg[] =
     "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuv"
     "wxyzABCDEFGHIJKLMNOPQRSTUVWXYZ";
-static const size_t long_msg_len = 26 * 4;
-static const uint32_t long_msg_digest[75] = {
+static const uint32_t long_msg_digest[kLongDigestLen] = {
     0x262992ca, 0xe4790cf1, 0x7681c77f, 0xa5366b52, 0x86490a2f, 0xf072d4c9,
     0xd4ea499a, 0x7a192fd2, 0xe1156b59, 0xb8f00ad5, 0x2ff4ba7c, 0xdec27032,
     0x33624f74, 0x88836d86, 0x4c3c6982, 0xb9e841e1, 0x78acb95a, 0x0bdbc7bc,
@@ -80,14 +100,33 @@ rom_error_t kmac_shake256_test(void) {
   RETURN_IF_ERROR(kmac_shake256_configure());
 
   // Simple test.
-  RETURN_IF_ERROR(shake256_test(short_msg_len, short_msg,
+  RETURN_IF_ERROR(shake256_test(kShortMsgLen, short_msg,
                                 ARRAYSIZE(short_msg_digest), short_msg_digest));
 
   // Test with long input, short output.
-  RETURN_IF_ERROR(shake256_test(long_msg_len, long_msg, 1, long_msg_digest));
+  RETURN_IF_ERROR(shake256_test(kLongMsgLen, long_msg, 1, long_msg_digest));
 
   // Test with long input, long output.
-  RETURN_IF_ERROR(shake256_test(long_msg_len, long_msg,
+  RETURN_IF_ERROR(shake256_test(kLongMsgLen, long_msg,
+                                ARRAYSIZE(long_msg_digest), long_msg_digest));
+
+  return kErrorOk;
+}
+
+rom_error_t kmac_shake256_unalign_test(void) {
+  // Configure KMAC to run SHAKE-256.
+  RETURN_IF_ERROR(kmac_shake256_configure());
+
+  // Simple test for unalign.
+  RETURN_IF_ERROR(shake256_test(kShortMsgLen, kKmacTestData.short_payload,
+                                ARRAYSIZE(short_msg_digest), short_msg_digest));
+
+  // Test with unalign long input, short output.
+  RETURN_IF_ERROR(shake256_test(kLongMsgLen, kKmacTestData.long_payload, 1,
+                                long_msg_digest));
+
+  // Test with unalign long input, long output.
+  RETURN_IF_ERROR(shake256_test(kLongMsgLen, kKmacTestData.long_payload,
                                 ARRAYSIZE(long_msg_digest), long_msg_digest));
 
   return kErrorOk;
@@ -176,6 +215,7 @@ bool test_main(void) {
 
   status_t result = OK_STATUS();
   EXECUTE_TEST(result, kmac_shake256_test);
+  EXECUTE_TEST(result, kmac_shake256_unalign_test);
   EXECUTE_TEST(result, kmac_kmac256_kat_1);
   EXECUTE_TEST(result, kmac_kmac256_kat_2);
   EXECUTE_TEST(result, kmac_kmac256_kat_3);
diff --git a/sw/device/silicon_creator/lib/drivers/lifecycle.c b/sw/device/silicon_creator/lib/drivers/lifecycle.c
index 2165248a65a56..12c9755ed3392 100644
--- a/sw/device/silicon_creator/lib/drivers/lifecycle.c
+++ b/sw/device/silicon_creator/lib/drivers/lifecycle.c
@@ -7,6 +7,7 @@
 #include <assert.h>
 #include <stdint.h>
 
+#include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/macros.h"
@@ -65,6 +66,24 @@ lifecycle_state_t lifecycle_state_get(void) {
   }
 }
 
+hardened_bool_t lifecycle_is_prod(void) {
+  uint32_t raw_state = lifecycle_raw_state_get();
+
+  if (launder32(raw_state) == LC_CTRL_LC_STATE_STATE_VALUE_PROD) {
+    HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD);
+    return kHardenedBoolTrue;
+  }
+  HARDENED_CHECK_NE(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD);
+
+  if (launder32(raw_state) == LC_CTRL_LC_STATE_STATE_VALUE_PROD_END) {
+    HARDENED_CHECK_EQ(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD_END);
+    return kHardenedBoolTrue;
+  }
+  HARDENED_CHECK_NE(raw_state, LC_CTRL_LC_STATE_STATE_VALUE_PROD_END);
+
+  return kHardenedBoolFalse;
+}
+
 uint32_t lifecycle_raw_state_get(void) {
   uint32_t value = bitfield_field32_read(
       sec_mmio_read32(kBase + LC_CTRL_LC_STATE_REG_OFFSET),
@@ -100,3 +119,20 @@ void lifecycle_hw_rev_get(lifecycle_hw_rev_t *hw_rev) {
           reg1, LC_CTRL_HW_REVISION1_REVISION_ID_FIELD),
   };
 }
+
+hardened_bool_t lifecycle_din_eq(lifecycle_device_id_t *id, uint32_t *din) {
+  if (id->device_id[1] == din[0] && id->device_id[2] == din[1])
+    return kHardenedBoolTrue;
+  return kHardenedBoolFalse;
+}
+
+bool lifecycle_claim(uint32_t claim) {
+  abs_mmio_write32(kBase + LC_CTRL_CLAIM_TRANSITION_IF_REG_OFFSET, claim);
+  return (bool)abs_mmio_read32(kBase + LC_CTRL_TRANSITION_REGWEN_REG_OFFSET);
+}
+
+void lifecycle_set_status(lifecycle_status_word_t word, uint32_t value) {
+  abs_mmio_write32(
+      kBase + LC_CTRL_TRANSITION_TOKEN_0_REG_OFFSET + word * sizeof(uint32_t),
+      value);
+}
diff --git a/sw/device/silicon_creator/lib/drivers/lifecycle.h b/sw/device/silicon_creator/lib/drivers/lifecycle.h
index d3c86122f8637..51622181926fe 100644
--- a/sw/device/silicon_creator/lib/drivers/lifecycle.h
+++ b/sw/device/silicon_creator/lib/drivers/lifecycle.h
@@ -5,8 +5,10 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_LIFECYCLE_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_LIFECYCLE_H_
 
+#include <stdbool.h>
 #include <stdint.h>
 
+#include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/macros.h"
 
 #ifdef __cplusplus
@@ -92,6 +94,16 @@ typedef struct lifecycle_hw_rev {
 OT_WARN_UNUSED_RESULT
 lifecycle_state_t lifecycle_state_get(void);
 
+/**
+ * Check if the device is in prod state.
+ *
+ * Warning: This function also returns false when LCS is invalid.
+ *
+ * @return `kHardenedBoolTrue` if the device is in prod state.
+ */
+OT_WARN_UNUSED_RESULT
+hardened_bool_t lifecycle_is_prod(void);
+
 /**
  * Get the unprocessed life cycle state value read from the hardware.
  *
@@ -117,6 +129,69 @@ void lifecycle_device_id_get(lifecycle_device_id_t *device_id);
  */
 void lifecycle_hw_rev_get(lifecycle_hw_rev_t *hw_rev);
 
+/**
+ * Determine if the device identification number subfield of the Device Id is
+ * equal to the supplied DIN.
+ *
+ * @returns kHardenedBoolTrue if equal, kHardenedBoolFalse if not equal.
+ */
+hardened_bool_t lifecycle_din_eq(lifecycle_device_id_t *id, uint32_t *din);
+
+typedef enum lifecycle_status_word {
+  kLifecycleStatusWordRomExtVersion = 0,
+  kLifecycleStatusWordRomExtSecVersion = 1,
+  kLifecycleStatusWordOwnerVersion = 2,
+  kLifecycleStatusWordDeviceStatus = 3,
+} lifecycle_status_word_t;
+
+/**
+ * Device Status.
+ *
+ * These identifiers refer to boot stages observed during production.
+ * Firmware will program these identifiers into the lifecycle controller's
+ * TRANSITION_TOKEN registers so they can be read out via JTAG during the
+ * manufacturing process.
+ */
+typedef enum lifecycle_device_status {
+  /** Default 0: an invalid state. */
+  kLifecycleDeviceStatusDefault = 0,
+  /**
+   * ROM_EXT:
+   * - OK:  0x00000001 - 0x00000FFF
+   * - Err: 0x10000001 - 0x10000FFF
+   */
+  kLifecycleDeviceStatusRomExtStart = 0x1,
+  /**
+   * Perso Firmware:
+   * - OK:  0x00001000 - 0x00001FFF
+   * - Err: 0x10001000 - 0x10001FFF
+   */
+  kLifecycleDeviceStatusPersoStart = 0x1000,
+  /**
+   * Owner (application) Firmware:
+   * - OK:  0x00002000 - 0x00002FFF
+   * - Err: 0x10002000 - 0x10002FFF
+   */
+  kLifecycleDeviceStatusOwnerStart = 0x2000,
+} lifecycle_device_status_t;
+
+/**
+ * Claim the lifecycle controller transition interface.
+ *
+ * @param claim Either kMultiBitBool8True to claim or kMultiBitBool8False to
+ *              release.
+ * @return Whether or not the interface was claimed.
+ */
+bool lifecycle_claim(uint32_t claim);
+
+/**
+ * Write the boot stage information into the TRANSITION_TOKEN registers.
+ *
+ * Silicon_creator information is written to token registers 0-1.  Silicon_owner
+ * information is written to token registers 2-3.
+ */
+void lifecycle_set_status(lifecycle_status_word_t word, uint32_t value);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/lifecycle_unittest.cc b/sw/device/silicon_creator/lib/drivers/lifecycle_unittest.cc
index 84cc62e838725..90dd442c61065 100644
--- a/sw/device/silicon_creator/lib/drivers/lifecycle_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/lifecycle_unittest.cc
@@ -7,6 +7,7 @@
 #include <array>
 
 #include "gtest/gtest.h"
+#include "sw/device/lib/base/hardened.h"
 #include "sw/device/silicon_creator/lib/base/mock_sec_mmio.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/testing/rom_test.h"
@@ -80,6 +81,10 @@ struct ValidStateTestCase {
    * Value returned by software.
    */
   lifecycle_state_t sw_state;
+  /**
+   * Whether the state is prod / prod_end.
+   */
+  hardened_bool_t is_prod;
 };
 
 class LifecycleValidStates
@@ -91,54 +96,71 @@ TEST_P(LifecycleValidStates, ValidState) {
   EXPECT_EQ(lifecycle_state_get(), GetParam().sw_state);
 }
 
+TEST_P(LifecycleValidStates, LifecycleIsProd) {
+  EXPECT_SEC_READ32(base_ + LC_CTRL_LC_STATE_REG_OFFSET, GetParam().hw_state);
+  EXPECT_EQ(lifecycle_is_prod(), GetParam().is_prod);
+}
+
 constexpr std::array<ValidStateTestCase, 12> kValidStateTestCases{{
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED0,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED1,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED2,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED3,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED4,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED5,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED6,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_TEST_UNLOCKED7,
         .sw_state = kLcStateTest,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_DEV,
         .sw_state = kLcStateDev,
+        .is_prod = kHardenedBoolFalse,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_PROD,
         .sw_state = kLcStateProd,
+        .is_prod = kHardenedBoolTrue,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_PROD_END,
         .sw_state = kLcStateProdEnd,
+        .is_prod = kHardenedBoolTrue,
     },
     {
         .hw_state = LC_CTRL_LC_STATE_STATE_VALUE_RMA,
         .sw_state = kLcStateRma,
+        .is_prod = kHardenedBoolFalse,
     },
 }};
 
diff --git a/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.cc b/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.cc
index 778c06bb1ad1b..c6b50c1448b82 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.cc
+++ b/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.cc
@@ -78,12 +78,17 @@ void flash_ctrl_info_cfg_set(const flash_ctrl_info_page_t *info_page,
   MockFlashCtrl::Instance().InfoCfgSet(info_page, cfg);
 }
 
+void flash_ctrl_info_cfg_lock(const flash_ctrl_info_page_t *info_page) {
+  MockFlashCtrl::Instance().InfoCfgLock(info_page);
+}
+
 void flash_ctrl_data_region_protect(flash_ctrl_region_index_t region,
                                     uint32_t page_offset, uint32_t num_pages,
                                     flash_ctrl_perms_t perms,
-                                    flash_ctrl_cfg_t cfg) {
+                                    flash_ctrl_cfg_t cfg,
+                                    hardened_bool_t lock) {
   MockFlashCtrl::Instance().DataRegionProtect(region, page_offset, num_pages,
-                                              perms, cfg);
+                                              perms, cfg, lock);
 }
 
 void flash_ctrl_bank_erase_perms_set(hardened_bool_t enable) {
@@ -98,5 +103,10 @@ void flash_ctrl_creator_info_pages_lockdown(void) {
   MockFlashCtrl::Instance().CreatorInfoPagesLockdown();
 }
 
+rom_error_t flash_ctrl_info_type0_params_build(
+    uint8_t bank, uint8_t page, flash_ctrl_info_page_t *info_page) {
+  return MockFlashCtrl::Instance().InfoType0ParamsBuild(bank, page, info_page);
+}
+
 }  // extern "C"
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h b/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h
index cef4a8f741cba..744a9eee1fa53 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h
+++ b/sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h
@@ -40,12 +40,15 @@ class MockFlashCtrl : public global_mock::GlobalMock<MockFlashCtrl> {
   MOCK_METHOD(void, DataRegionProtect,
               (flash_ctrl_region_index_t region, uint32_t page_offset,
                uint32_t num_pages, flash_ctrl_perms_t perms,
-               flash_ctrl_cfg_t cfg));
+               flash_ctrl_cfg_t cfg, hardened_bool_t));
   MOCK_METHOD(void, InfoCfgSet,
               (const flash_ctrl_info_page_t *, flash_ctrl_cfg_t));
+  MOCK_METHOD(void, InfoCfgLock, (const flash_ctrl_info_page_t *));
   MOCK_METHOD(void, BankErasePermsSet, (hardened_bool_t));
   MOCK_METHOD(void, ExecSet, (uint32_t));
   MOCK_METHOD(void, CreatorInfoPagesLockdown, ());
+  MOCK_METHOD(rom_error_t, InfoType0ParamsBuild,
+              (uint32_t, uint32_t, flash_ctrl_info_page_t *));
 };
 
 }  // namespace internal
@@ -54,19 +57,29 @@ using MockFlashCtrl = testing::StrictMock<internal::MockFlashCtrl>;
 using NiceMockFlashCtrl = testing::NiceMock<internal::MockFlashCtrl>;
 
 MATCHER_P3(FlashPerms, read, write, erase, "") {
-  return ::testing::Value(
-      arg,
-      ::testing::AllOf(::testing::Field(&flash_ctrl_perms_t::read, read),
-                       ::testing::Field(&flash_ctrl_perms_t::write, write),
-                       ::testing::Field(&flash_ctrl_perms_t::erase, erase)));
+  // It would be nice to use `testing::Field` here, but that matcher does not
+  // work with bitfields.
+  return arg.read == static_cast<uint8_t>(read) &&
+         arg.write == static_cast<uint8_t>(write) &&
+         arg.erase == static_cast<uint8_t>(erase);
 }
 
 MATCHER_P3(FlashCfg, scrambling, ecc, he, "") {
+  // It would be nice to use `testing::Field` here, but that matcher does not
+  // work with bitfields.
+  return arg.scrambling == static_cast<uint8_t>(scrambling) &&
+         arg.ecc == static_cast<uint8_t>(ecc) &&
+         arg.he == static_cast<uint8_t>(he);
+}
+
+MATCHER_P(FlashInfoPage, page, "") {
   return ::testing::Value(
-      arg, ::testing::AllOf(
-               ::testing::Field(&flash_ctrl_cfg_t::scrambling, scrambling),
-               ::testing::Field(&flash_ctrl_cfg_t::ecc, ecc),
-               ::testing::Field(&flash_ctrl_cfg_t::he, he)));
+      arg,
+      ::testing::AllOf(
+          ::testing::Field(&flash_ctrl_info_page_t::base_addr, page.base_addr),
+          ::testing::Field(&flash_ctrl_info_page_t::cfg_wen_addr,
+                           page.cfg_wen_addr),
+          ::testing::Field(&flash_ctrl_info_page_t::cfg_addr, page.cfg_addr)));
 }
 
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/drivers/mock_lifecycle.cc b/sw/device/silicon_creator/lib/drivers/mock_lifecycle.cc
index 1a3bcbf90e6d4..4f29aa3fc3bff 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_lifecycle.cc
+++ b/sw/device/silicon_creator/lib/drivers/mock_lifecycle.cc
@@ -21,5 +21,11 @@ void lifecycle_device_id_get(lifecycle_device_id_t *device_id) {
 void lifecycle_hw_rev_get(lifecycle_hw_rev_t *hw_rev) {
   MockLifecycle::Instance().HwRev(hw_rev);
 }
+
+hardened_bool_t lifecycle_din_eq(lifecycle_device_id_t *id, uint32_t *din) {
+  if (id->device_id[1] == din[0] && id->device_id[2] == din[1])
+    return kHardenedBoolTrue;
+  return kHardenedBoolFalse;
+}
 }  // extern "C"
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/drivers/mock_rnd.cc b/sw/device/silicon_creator/lib/drivers/mock_rnd.cc
index 66da8b8df47b1..c960a1c4865ac 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_rnd.cc
+++ b/sw/device/silicon_creator/lib/drivers/mock_rnd.cc
@@ -11,5 +11,9 @@ rom_error_t rnd_health_config_check(lifecycle_state_t lc_state) {
 }
 
 uint32_t rnd_uint32(void) { return MockRnd::Instance().Uint32(); }
+
+// For masking randomness, the value shouldn't matter; return constants.
+uint32_t hardened_memshred_random_word(void) { return 0xdeadbeef; }
+uint32_t random_order_random_word(void) { return 0xc0ffee11; }
 }
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/drivers/mock_spi_device.cc b/sw/device/silicon_creator/lib/drivers/mock_spi_device.cc
index b1a9bf6a0e30b..2bd0ed9db286a 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_spi_device.cc
+++ b/sw/device/silicon_creator/lib/drivers/mock_spi_device.cc
@@ -7,10 +7,17 @@
 namespace rom_test {
 extern "C" {
 
-void spi_device_init(void) { MockSpiDevice::Instance().Init(); }
+void spi_device_init(uint8_t log2_density, const void *sfdp_table,
+                     size_t sfdp_len) {
+  MockSpiDevice::Instance().Init(log2_density, sfdp_table, sfdp_len);
+}
+
+void spi_device_init_bootstrap(void) {
+  MockSpiDevice::Instance().InitBootstrap();
+}
 
-rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd) {
-  return MockSpiDevice::Instance().CmdGet(cmd);
+rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd, bool blocking) {
+  return MockSpiDevice::Instance().CmdGet(cmd, blocking);
 }
 
 void spi_device_flash_status_clear(void) {
diff --git a/sw/device/silicon_creator/lib/drivers/mock_spi_device.h b/sw/device/silicon_creator/lib/drivers/mock_spi_device.h
index 643688fb0314a..ebbc1e1cc6c9c 100644
--- a/sw/device/silicon_creator/lib/drivers/mock_spi_device.h
+++ b/sw/device/silicon_creator/lib/drivers/mock_spi_device.h
@@ -16,8 +16,9 @@ namespace internal {
  */
 class MockSpiDevice : public global_mock::GlobalMock<MockSpiDevice> {
  public:
-  MOCK_METHOD(void, Init, ());
-  MOCK_METHOD(rom_error_t, CmdGet, (spi_device_cmd_t *));
+  MOCK_METHOD(void, Init, (uint8_t /*log2_density*/, const void *, size_t));
+  MOCK_METHOD(void, InitBootstrap, ());
+  MOCK_METHOD(rom_error_t, CmdGet, (spi_device_cmd_t *, bool));
   MOCK_METHOD(void, FlashStatusClear, ());
   MOCK_METHOD(uint32_t, FlashStatusGet, ());
 };
diff --git a/sw/device/silicon_creator/lib/drivers/otbn.c b/sw/device/silicon_creator/lib/drivers/otbn.c
index 21cfecbd0bbfc..20d5099537397 100644
--- a/sw/device/silicon_creator/lib/drivers/otbn.c
+++ b/sw/device/silicon_creator/lib/drivers/otbn.c
@@ -26,6 +26,7 @@ enum {
    * Highest index of OTBN error bits.
    */
   kOtbnErrBitsLast = OTBN_ERR_BITS_FATAL_SOFTWARE_BIT,
+  kIntrStateDone = (1 << OTBN_INTR_COMMON_DONE_BIT),
 };
 
 /**
@@ -78,9 +79,9 @@ rom_error_t sc_otbn_busy_wait_for_done(void) {
 static void sc_otbn_write(uint32_t dest_addr, const uint32_t *src,
                           size_t num_words) {
   // Start from a random index less than `num_words`.
-  size_t i = ((uint64_t)rnd_uint32() * (uint64_t)num_words) >> 32;
+  uint32_t i = ((uint64_t)rnd_uint32() * (uint64_t)num_words) >> 32;
   enum { kStep = 1 };
-  size_t iter_cnt = 0, r_iter_cnt = num_words - 1;
+  uint32_t iter_cnt = 0, r_iter_cnt = num_words - 1;
   for (; launder32(iter_cnt) < num_words && launder32(r_iter_cnt) < num_words;
        ++iter_cnt, --r_iter_cnt) {
     abs_mmio_write32(dest_addr + i * sizeof(uint32_t), src[i]);
@@ -91,7 +92,7 @@ static void sc_otbn_write(uint32_t dest_addr, const uint32_t *src,
     HARDENED_CHECK_LT(i, num_words);
   }
   HARDENED_CHECK_EQ(iter_cnt, num_words);
-  HARDENED_CHECK_EQ(r_iter_cnt, SIZE_MAX);
+  HARDENED_CHECK_EQ(r_iter_cnt, UINT32_MAX);
 }
 
 OT_WARN_UNUSED_RESULT
@@ -115,13 +116,13 @@ rom_error_t sc_otbn_dmem_read(size_t num_words, sc_otbn_addr_t src,
                               uint32_t *dest) {
   HARDENED_RETURN_IF_ERROR(
       check_offset_len(src, num_words, OTBN_DMEM_SIZE_BYTES));
-  size_t i = 0, r = num_words - 1;
+  uint32_t i = 0, r = num_words - 1;
   for (; launder32(i) < num_words && launder32(r) < num_words; ++i, --r) {
     dest[i] = abs_mmio_read32(kBase + OTBN_DMEM_REG_OFFSET + src +
                               i * sizeof(uint32_t));
   }
   HARDENED_CHECK_EQ(i, num_words);
-  HARDENED_CHECK_EQ(r, SIZE_MAX);
+  HARDENED_CHECK_EQ(r, UINT32_MAX);
   return kErrorOk;
 }
 
@@ -134,19 +135,19 @@ rom_error_t sc_otbn_dmem_read(size_t num_words, sc_otbn_addr_t src,
  * @param error Error to return if operation fails.
  * @return Result of the operation.
  */
+static void sc_otbn_cmd_start(sc_otbn_cmd_t cmd) {
+  abs_mmio_write32(kBase + OTBN_INTR_STATE_REG_OFFSET, kIntrStateDone);
+  abs_mmio_write32(kBase + OTBN_CMD_REG_OFFSET, cmd);
+}
+
 OT_WARN_UNUSED_RESULT
-static rom_error_t sc_otbn_cmd_run(sc_otbn_cmd_t cmd, rom_error_t error) {
+static rom_error_t sc_otbn_cmd_finish(rom_error_t error) {
   enum {
-    kIntrStateDone = (1 << OTBN_INTR_COMMON_DONE_BIT),
     // Use a bit index that doesn't overlap with error bits.
     kResDoneBit = 31,
   };
   static_assert((UINT32_C(1) << kResDoneBit) > kOtbnErrBitsLast,
                 "kResDoneBit must not overlap with OTBN error bits");
-
-  abs_mmio_write32(kBase + OTBN_INTR_STATE_REG_OFFSET, kIntrStateDone);
-  abs_mmio_write32(kBase + OTBN_CMD_REG_OFFSET, cmd);
-
   rom_error_t res = kErrorOk ^ (UINT32_C(1) << kResDoneBit);
   uint32_t reg = 0;
   do {
@@ -177,7 +178,12 @@ static rom_error_t sc_otbn_cmd_run(sc_otbn_cmd_t cmd, rom_error_t error) {
   return error;
 }
 
-rom_error_t sc_otbn_execute(void) {
+static rom_error_t sc_otbn_cmd_run(sc_otbn_cmd_t cmd, rom_error_t error) {
+  sc_otbn_cmd_start(cmd);
+  return sc_otbn_cmd_finish(error);
+}
+
+rom_error_t sc_otbn_execute_start(void) {
   // If OTBN is busy, wait for it to be done.
   HARDENED_RETURN_IF_ERROR(sc_otbn_busy_wait_for_done());
 
@@ -187,7 +193,17 @@ rom_error_t sc_otbn_execute(void) {
   sec_mmio_write32(kBase + OTBN_CTRL_REG_OFFSET,
                    1 << OTBN_CTRL_SOFTWARE_ERRS_FATAL_BIT);
 
-  return sc_otbn_cmd_run(kScOtbnCmdExecute, kErrorOtbnExecutionFailed);
+  sc_otbn_cmd_start(kScOtbnCmdExecute);
+  return kErrorOk;
+}
+
+rom_error_t sc_otbn_execute_finish(void) {
+  return sc_otbn_cmd_finish(kErrorOtbnExecutionFailed);
+}
+
+rom_error_t sc_otbn_execute(void) {
+  HARDENED_RETURN_IF_ERROR(sc_otbn_execute_start());
+  return sc_otbn_execute_finish();
 }
 
 uint32_t sc_otbn_instruction_count_get(void) {
@@ -248,3 +264,20 @@ rom_error_t sc_otbn_load_app(const sc_otbn_app_t app) {
   }
   return kErrorOk;
 }
+
+void sc_otbn_patch(void) {
+  enum {
+    // Offset in the code of the bad instruction:
+    kBugOffset = 0x958,
+    // The bad instruction is:
+    // bn.rshi   w16, w20, w31 >> 192
+    kBadInstr = 0xc1fa387b,
+    // The good instruction is:
+    // bn.rshi   w16, w31, w20 >> 192
+    kGoodInstr = 0xc14fb87b,
+  };
+  uint32_t inst = abs_mmio_read32(kBase + OTBN_IMEM_REG_OFFSET + kBugOffset);
+  if (inst == kBadInstr) {
+    abs_mmio_write32(kBase + OTBN_IMEM_REG_OFFSET + kBugOffset, kGoodInstr);
+  }
+}
diff --git a/sw/device/silicon_creator/lib/drivers/otbn.h b/sw/device/silicon_creator/lib/drivers/otbn.h
index 577257f3dd3f7..98cbe66d7c058 100644
--- a/sw/device/silicon_creator/lib/drivers/otbn.h
+++ b/sw/device/silicon_creator/lib/drivers/otbn.h
@@ -247,15 +247,34 @@ rom_error_t sc_otbn_dmem_read(size_t num_words, const sc_otbn_addr_t src,
                               uint32_t *dest);
 
 /**
- * Start the execution of the application loaded into OTBN.
+ * Execute the application loaded into OTBN.
  *
- * This function blocks until OTBN is idle.
+ * This function blocks until OTBN is idle and waits for the OTBN application to
+ * finish.
  *
  * @return Result of the operation.
  */
 OT_WARN_UNUSED_RESULT
 rom_error_t sc_otbn_execute(void);
 
+/**
+ * Start execution of the application loaded into OTBN.
+ *
+ * This function blocks until OTBN is idle and then starts the OTBN application.
+ *
+ * @return Result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t sc_otbn_execute_start(void);
+
+/**
+ * Wait for the OTBN application to finish execution.
+ *
+ * @return Result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t sc_otbn_execute_finish(void);
+
 /**
  * Blocks until OTBN is idle.
  *
@@ -303,6 +322,18 @@ rom_error_t sc_otbn_imem_sec_wipe(void);
 OT_WARN_UNUSED_RESULT
 rom_error_t sc_otbn_dmem_sec_wipe(void);
 
+/**
+ * Patch a bad instruction in OTBN imem.
+ *
+ * There is a bug in the OTBN boot services program loaded by ROM.  There is a
+ * single instruction with mistakenly transposed operands which can affect the
+ * random share values.  This bug DOES NOT affect the correctness of the OTBN
+ * calculations.
+ *
+ * This function patches the bad instruction with the correctly instruction.
+ */
+void sc_otbn_patch(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/otp.c b/sw/device/silicon_creator/lib/drivers/otp.c
index 36bdcbe1bb7ff..ade77bab181d4 100644
--- a/sw/device/silicon_creator/lib/drivers/otp.c
+++ b/sw/device/silicon_creator/lib/drivers/otp.c
@@ -27,37 +27,37 @@ const otp_partition_info_t kOtpPartitions[] = {
         .start_addr = OTP_CTRL_PARAM_CREATOR_SW_CFG_OFFSET,
         .size = OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
                 OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_CREATOR_SW_CFG_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_CREATOR_SW_CFG_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
     [kOtpPartitionOwnerSwCfg] = {
         .start_addr = OTP_CTRL_PARAM_OWNER_SW_CFG_OFFSET,
         .size = OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
                 OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_OWNER_SW_CFG_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_OWNER_SW_CFG_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
     [kOtpPartitionRotCreatorAuthCodesign] = {
         .start_addr = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_OFFSET,
         .size = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE -
                 OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_ROT_CREATOR_AUTH_CODESIGN_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_ROT_CREATOR_AUTH_CODESIGN_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
     [kOtpPartitionRotCreatorAuthState] = {
         .start_addr = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_OFFSET,
         .size = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE -
                 OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_ROT_CREATOR_AUTH_STATE_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_ROT_CREATOR_AUTH_STATE_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
     [kOtpPartitionHwCfg0] = {
         .start_addr = OTP_CTRL_PARAM_HW_CFG0_OFFSET,
         .size = OTP_CTRL_PARAM_HW_CFG0_SIZE -
                 OTP_CTRL_PARAM_HW_CFG0_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_HW_CFG0_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_HW_CFG0_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
     [kOtpPartitionHwCfg1] = {
         .start_addr = OTP_CTRL_PARAM_HW_CFG1_OFFSET,
         .size = OTP_CTRL_PARAM_HW_CFG1_SIZE -
                 OTP_CTRL_PARAM_HW_CFG1_DIGEST_SIZE,
-        .digest_addr = OTP_CTRL_HW_CFG1_DIGEST_0_REG_OFFSET,
+        .digest_reg_addr = OTP_CTRL_HW_CFG1_DIGEST_0_REG_OFFSET,
         .align_mask = 0x3},
 };
 // clang-format on
@@ -86,7 +86,7 @@ void otp_read(uint32_t address, uint32_t *data, size_t num_words) {
 }
 
 uint64_t otp_partition_digest_read(otp_partition_t partition) {
-  uint32_t reg_offset = kBase + kOtpPartitions[partition].digest_addr;
+  uint32_t reg_offset = kBase + kOtpPartitions[partition].digest_reg_addr;
   uint64_t value = sec_mmio_read32(reg_offset + sizeof(uint32_t));
   value <<= 32;
   value |= sec_mmio_read32(reg_offset);
diff --git a/sw/device/silicon_creator/lib/drivers/otp.h b/sw/device/silicon_creator/lib/drivers/otp.h
index 75e2ffd543d99..ca3a981c148e9 100644
--- a/sw/device/silicon_creator/lib/drivers/otp.h
+++ b/sw/device/silicon_creator/lib/drivers/otp.h
@@ -48,9 +48,10 @@ typedef struct otp_partition_info {
    */
   size_t size;
   /**
-   * The absolute OTP address at which this partition's digest starts.
+   * The OTP digest CSR (where the digest is buffered) address for this
+   * partition.
    */
-  uint32_t digest_addr;
+  uint32_t digest_reg_addr;
   /**
    * The alignment mask for this partition.
    *
diff --git a/sw/device/silicon_creator/lib/drivers/pinmux.c b/sw/device/silicon_creator/lib/drivers/pinmux.c
index ed5e11c4f82ec..404cd9d175405 100644
--- a/sw/device/silicon_creator/lib/drivers/pinmux.c
+++ b/sw/device/silicon_creator/lib/drivers/pinmux.c
@@ -95,22 +95,27 @@ static const pinmux_input_t kInputSwStrap2 = {
 /**
  * Sets the input pad for the specified peripheral input.
  *
- * @param input A peripheral input and MIO pad to link it to.
+ * @param periph A peripheral input (e.g. top_earlgrey_pinmux_peripheral_in_t
+ * periph).
+ * @param insel An MIO pad to link it to (e.g. top_earlgrey_pinmux_insel_t
+ * insel).
  */
-static void configure_input(pinmux_input_t input) {
-  abs_mmio_write32(kBase + PINMUX_MIO_PERIPH_INSEL_0_REG_OFFSET +
-                       input.periph * sizeof(uint32_t),
-                   input.insel);
+void pinmux_configure_input(uint32_t periph, uint32_t insel) {
+  // TODO: what is the consequence of an illegal insel value?  The legal range
+  // is [0..48], but there are enough bits for [0..63].
+  abs_mmio_write32(
+      kBase + PINMUX_MIO_PERIPH_INSEL_0_REG_OFFSET + periph * sizeof(uint32_t),
+      insel);
 }
 
 /**
  * Enables or disables pull-up/pull-down for the specified pad.
  *
- * @param pad A MIO pad.
+ * @param pad A MIO pad (e.g. top_earlgrey_muxed_pads_t).
  * @param enable Whether the internal pull resistor should be enabled.
  * @param up Whether the pull resistor should pull up(true) or down(false).
  */
-static void enable_pull(top_earlgrey_muxed_pads_t pad, bool enable, bool up) {
+void pinmux_enable_pull(uint32_t pad, bool enable, bool up) {
   uint32_t reg = 0;
   reg = bitfield_bit32_write(reg, PINMUX_MIO_PAD_ATTR_0_PULL_EN_0_BIT, enable);
   reg = bitfield_bit32_write(reg, PINMUX_MIO_PAD_ATTR_0_PULL_SELECT_0_BIT, up);
@@ -139,7 +144,7 @@ static void pinmux_prop_delay(void) {
  */
 static uint32_t read_strap_pin(pinmux_input_t input) {
   // First, disable all pull resistors and read the state of the pin.
-  enable_pull(input.pad, false, false);
+  pinmux_enable_pull(input.pad, false, false);
   pinmux_prop_delay();
   uint32_t val =
       abs_mmio_read32(TOP_EARLGREY_GPIO_BASE_ADDR + GPIO_DATA_IN_REG_OFFSET);
@@ -149,7 +154,7 @@ static uint32_t read_strap_pin(pinmux_input_t input) {
   // Then, enable the opposite pull to the observed state.
   // If the external signal is weak, the internal pull resistor will win; if
   // the external signal is strong, the external resistor will win.
-  enable_pull(input.pad, true, !state);
+  pinmux_enable_pull(input.pad, true, !state);
   pinmux_prop_delay();
 
   val = abs_mmio_read32(TOP_EARLGREY_GPIO_BASE_ADDR + GPIO_DATA_IN_REG_OFFSET);
@@ -169,6 +174,8 @@ static void configure_output(pinmux_output_t output) {
       output.outsel);
 }
 
+void pinmux_init_uart0_tx(void) { configure_output(kOutputUart0); }
+
 void pinmux_init(void) {
   uint32_t bootstrap_dis =
       otp_read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET);
@@ -176,21 +183,30 @@ void pinmux_init(void) {
     HARDENED_CHECK_NE(bootstrap_dis, kHardenedBoolTrue);
     // Note: attributes should be configured before the pinmux matrix to avoid
     // "undesired electrical behavior and/or contention at the pads".
-    enable_pull(kInputSwStrap0.pad, /*enable=*/true, /*up=*/false);
-    enable_pull(kInputSwStrap1.pad, /*enable=*/true, /*up=*/false);
-    enable_pull(kInputSwStrap2.pad, /*enable=*/true, /*up=*/false);
+    pinmux_enable_pull(kInputSwStrap0.pad, /*enable=*/true, /*up=*/false);
+    pinmux_enable_pull(kInputSwStrap1.pad, /*enable=*/true, /*up=*/false);
+    pinmux_enable_pull(kInputSwStrap2.pad, /*enable=*/true, /*up=*/false);
     // Wait for pull downs to propagate to the physical pads.
     pinmux_prop_delay();
 
-    configure_input(kInputSwStrap0);
-    configure_input(kInputSwStrap1);
-    configure_input(kInputSwStrap2);
+    pinmux_configure_input(kInputSwStrap0.periph, kInputSwStrap0.insel);
+    pinmux_configure_input(kInputSwStrap1.periph, kInputSwStrap1.insel);
+    pinmux_configure_input(kInputSwStrap2.periph, kInputSwStrap2.insel);
   }
 
-  configure_input(kInputUart0);
+  // Pull the UART_RX line high (idle state for UART).  This prevents a
+  // floating UART_RX from incorrectly triggering serial break.
+  pinmux_enable_pull(kInputUart0.pad, /*enable=*/true, /*up=*/true);
+  pinmux_configure_input(kInputUart0.periph, kInputUart0.insel);
   configure_output(kOutputUart0);
 }
 
+void pinmux_init_usb(void) {
+  // TODO: This might need to depend on sku-specific configuration.
+  pinmux_configure_input(kTopEarlgreyPinmuxPeripheralInUsbdevSense,
+                         kTopEarlgreyPinmuxInselConstantOne);
+}
+
 uint32_t pinmux_read_straps(void) {
   uint32_t value = 0;
   value |= read_strap_pin(kInputSwStrap0);
@@ -198,3 +214,9 @@ uint32_t pinmux_read_straps(void) {
   value |= read_strap_pin(kInputSwStrap2) << 4;
   return value;
 }
+
+bool pinmux_read_gpio(uint32_t gpio) {
+  uint32_t val =
+      abs_mmio_read32(TOP_EARLGREY_GPIO_BASE_ADDR + GPIO_DATA_IN_REG_OFFSET);
+  return bitfield_bit32_read(val, gpio);
+}
diff --git a/sw/device/silicon_creator/lib/drivers/pinmux.h b/sw/device/silicon_creator/lib/drivers/pinmux.h
index 117f2c3d41974..1db0fcb317f81 100644
--- a/sw/device/silicon_creator/lib/drivers/pinmux.h
+++ b/sw/device/silicon_creator/lib/drivers/pinmux.h
@@ -5,6 +5,7 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_PINMUX_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_PINMUX_H_
 
+#include <stdbool.h>
 #include <stdint.h>
 
 #ifdef __cplusplus
@@ -23,6 +24,30 @@ extern "C" {
  */
 void pinmux_init(void);
 
+/**
+ * Initialize the pinmux with output UART0 only.
+ */
+void pinmux_init_uart0_tx(void);
+
+/**
+ * Sets the input pad for the specified peripheral input.
+ *
+ * @param periph A peripheral input (e.g. top_earlgrey_pinmux_peripheral_in_t
+ * periph).
+ * @param insel An MIO pad to link it to (e.g. top_earlgrey_pinmux_insel_t
+ * insel).
+ */
+void pinmux_configure_input(uint32_t periph, uint32_t insel);
+
+/**
+ * Enables or disables pull-up/pull-down for the specified pad.
+ *
+ * @param pad A MIO pad (e.g. top_earlgrey_muxed_pads_t).
+ * @param enable Whether the internal pull resistor should be enabled.
+ * @param up Whether the pull resistor should pull up(true) or down(false).
+ */
+void pinmux_enable_pull(uint32_t pad, bool enable, bool up);
+
 /**
  * Read the SW_STRAP value.
  *
@@ -42,6 +67,21 @@ void pinmux_init(void);
  */
 uint32_t pinmux_read_straps(void);
 
+/**
+ * Read the value of a GPIO
+ *
+ * @param gpio The GPIO to read.
+ * @return The value read.
+ */
+bool pinmux_read_gpio(uint32_t gpio);
+
+/**
+ * Initialize the USB sense pin.
+ *
+ * This connects the UsbdevSense input to InselConstantOne.
+ */
+void pinmux_init_usb(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/pinmux_unittest.cc b/sw/device/silicon_creator/lib/drivers/pinmux_unittest.cc
index 0cfe5b6528e8b..f501447b2af5e 100644
--- a/sw/device/silicon_creator/lib/drivers/pinmux_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/pinmux_unittest.cc
@@ -100,10 +100,13 @@ TEST_F(InitTest, WithBootstrap) {
                      kTopEarlgreyPinmuxInselIoc1)
   EXPECT_ABS_WRITE32(RegInSel(kTopEarlgreyPinmuxPeripheralInGpioGpio24),
                      kTopEarlgreyPinmuxInselIoc2)
+
+  // UART configuration: RX line pulled up, RX is IOC3, TX is IOC4.
+  EXPECT_ABS_WRITE32(RegPadAttr(kTopEarlgreyMuxedPadsIoc3),
+                     {{PINMUX_MIO_PAD_ATTR_0_PULL_EN_0_BIT, 1},
+                      {PINMUX_MIO_PAD_ATTR_0_PULL_SELECT_0_BIT, 1}});
   EXPECT_ABS_WRITE32(RegInSel(kTopEarlgreyPinmuxPeripheralInUart0Rx),
                      kTopEarlgreyPinmuxInselIoc3);
-
-  // The outputs that will be configured.
   EXPECT_ABS_WRITE32(RegOutSel(kTopEarlgreyPinmuxMioOutIoc4),
                      kTopEarlgreyPinmuxOutselUart0Tx);
 
@@ -115,14 +118,25 @@ TEST_F(InitTest, WithoutBootstrap) {
   EXPECT_CALL(otp_,
               read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET))
       .WillOnce(Return(kHardenedBoolTrue));
+
+  // UART configuration: RX line pulled up, RX is IOC3, TX is IOC4.
+  EXPECT_ABS_WRITE32(RegPadAttr(kTopEarlgreyMuxedPadsIoc3),
+                     {{PINMUX_MIO_PAD_ATTR_0_PULL_EN_0_BIT, 1},
+                      {PINMUX_MIO_PAD_ATTR_0_PULL_SELECT_0_BIT, 1}});
   EXPECT_ABS_WRITE32(RegInSel(kTopEarlgreyPinmuxPeripheralInUart0Rx),
                      kTopEarlgreyPinmuxInselIoc3);
+  EXPECT_ABS_WRITE32(RegOutSel(kTopEarlgreyPinmuxMioOutIoc4),
+                     kTopEarlgreyPinmuxOutselUart0Tx);
 
+  pinmux_init();
+}
+
+TEST_F(InitTest, Uart0TxOnly) {
   // The outputs that will be configured.
   EXPECT_ABS_WRITE32(RegOutSel(kTopEarlgreyPinmuxMioOutIoc4),
                      kTopEarlgreyPinmuxOutselUart0Tx);
 
-  pinmux_init();
+  pinmux_init_uart0_tx();
 }
 
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/drivers/rnd.c b/sw/device/silicon_creator/lib/drivers/rnd.c
index 2293be3a49169..f9772d0df549d 100644
--- a/sw/device/silicon_creator/lib/drivers/rnd.c
+++ b/sw/device/silicon_creator/lib/drivers/rnd.c
@@ -20,6 +20,7 @@
 enum {
   kBaseEntropySrc = TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR,
   kBaseIbex = TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR,
+  kIbexRndStatusReg = kBaseIbex + RV_CORE_IBEX_RND_STATUS_REG_OFFSET,
 
   // This covers the health threshold registers which are contiguous. The alert
   // threshold register is not included here.
@@ -112,10 +113,21 @@ uint32_t rnd_uint32(void) {
           kHardenedBoolTrue) {
     // When bit-0 is clear an EDN request for new data for RND_DATA is
     // pending.
-    while (!abs_mmio_read32(kBaseIbex + RV_CORE_IBEX_RND_STATUS_REG_OFFSET)) {
+    while (!(abs_mmio_read32(kIbexRndStatusReg) & 1)) {
     }
   }
   uint32_t mcycle;
   CSR_READ(CSR_REG_MCYCLE, &mcycle);
   return mcycle + abs_mmio_read32(kBaseIbex + RV_CORE_IBEX_RND_DATA_REG_OFFSET);
 }
+
+// Provides the source of randomness for `hardened_memshred` (see
+// `hardened_memory.h`). Declare as weak in case the cryptolib driver is also
+// included.
+OT_WEAK
+uint32_t hardened_memshred_random_word(void) { return rnd_uint32(); }
+
+// Provides the source of randomness for `random_order` (see `random_order.h`).
+// Declare as weak in case the cryptolib driver is also included.
+OT_WEAK
+uint32_t random_order_random_word(void) { return rnd_uint32(); }
diff --git a/sw/device/silicon_creator/lib/drivers/rstmgr.c b/sw/device/silicon_creator/lib/drivers/rstmgr.c
index 5e59924a3fc51..0b87f05e90d41 100644
--- a/sw/device/silicon_creator/lib/drivers/rstmgr.c
+++ b/sw/device/silicon_creator/lib/drivers/rstmgr.c
@@ -160,3 +160,8 @@ void rstmgr_reset(void) {
   }
 #endif
 }
+
+void rstmgr_reboot(void) {
+  rstmgr_reason_clear(1 << kRstmgrReasonPowerOn);
+  rstmgr_reset();
+}
diff --git a/sw/device/silicon_creator/lib/drivers/rstmgr.h b/sw/device/silicon_creator/lib/drivers/rstmgr.h
index d876ace71d0a6..d099d41eddafd 100644
--- a/sw/device/silicon_creator/lib/drivers/rstmgr.h
+++ b/sw/device/silicon_creator/lib/drivers/rstmgr.h
@@ -125,6 +125,18 @@ noreturn
     void
     rstmgr_reset(void);
 
+/**
+ * Reboot the chip.
+ *
+ * This function clears the power-on-reset reason and then resets the chip.
+ */
+#ifdef OT_PLATFORM_RV32
+// Omit `noreturn` to be able to test this function in off-target tests.
+noreturn
+#endif
+    void
+    rstmgr_reboot(void);
+
 /**
  * Verifies that info collection is initialized properly.
  *
diff --git a/sw/device/silicon_creator/lib/drivers/rv_timer.c b/sw/device/silicon_creator/lib/drivers/rv_timer.c
new file mode 100644
index 0000000000000..77680a87b5a36
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/rv_timer.c
@@ -0,0 +1,30 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/rv_timer.h"
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_timer_regs.h"
+
+enum {
+  kBase = TOP_EARLGREY_RV_TIMER_BASE_ADDR,
+};
+
+void rv_timer_init(void) {
+  uint32_t prescaler = (uint32_t)kClockFreqPeripheralHz / 1000000 - 1;
+  uint32_t cfg = RV_TIMER_CFG0_REG_RESVAL;
+  cfg = bitfield_field32_write(cfg, RV_TIMER_CFG0_PRESCALE_FIELD, prescaler);
+  abs_mmio_write32(kBase + RV_TIMER_TIMER_V_LOWER0_REG_OFFSET, 0);
+  abs_mmio_write32(kBase + RV_TIMER_TIMER_V_UPPER0_REG_OFFSET, 0);
+  abs_mmio_write32(kBase + RV_TIMER_CFG0_REG_OFFSET, cfg);
+  abs_mmio_write32(kBase + RV_TIMER_CTRL_REG_OFFSET, 1);
+}
+
+uint32_t rv_timer_get(void) {
+  return abs_mmio_read32(kBase + RV_TIMER_TIMER_V_LOWER0_REG_OFFSET);
+}
diff --git a/sw/device/silicon_creator/lib/drivers/rv_timer.h b/sw/device/silicon_creator/lib/drivers/rv_timer.h
new file mode 100644
index 0000000000000..d845bb011a0ca
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/rv_timer.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_RV_TIMER_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_RV_TIMER_H_
+
+#include <stdint.h>
+
+// Initialize the timer for 1us ticks, reset to zero and start timer.
+void rv_timer_init(void);
+
+// The the low 32-bits of the timer value.
+uint32_t rv_timer_get(void);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_RV_TIMER_H_
diff --git a/sw/device/silicon_creator/lib/drivers/spi_device.c b/sw/device/silicon_creator/lib/drivers/spi_device.c
index 0cd3c61791c54..d73ec7de79a44 100644
--- a/sw/device/silicon_creator/lib/drivers/spi_device.c
+++ b/sw/device/silicon_creator/lib/drivers/spi_device.c
@@ -8,6 +8,7 @@
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/spi_device_bfpt.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
 #include "flash_ctrl_regs.h"
@@ -39,6 +40,16 @@ enum {
    * (JESD216F 6.2.1).
    */
   kSfdpSignature = 0x50444653,
+  /**
+   * LSB of the 2-byte device ID.
+   *
+   * Density is expressed as log2(flash size in bytes).
+   */
+  kSpiDeviceJedecDensity = 20,
+  /**
+   * Size of the SFDP table in words.
+   */
+  kSpiDeviceSfdpTableNumWords = 27,
   /**
    * Number of parameter headers in the SFDP data structure (JESD216F 6.2.2).
    *
@@ -91,38 +102,6 @@ enum {
 static_assert(kBfptTablePointer % sizeof(uint32_t) == 0,
               "BFPT must be word-aligned");
 
-/**
- * Computes the width of a field in a Basic Flash Parameters Table (BFPT) word.
- *
- * @param upper Upper (start) bit of the field (inclusive).
- * @param lower Lower (end) bit of the field (inclusive).
- */
-#define BFPT_FIELD_WIDTH(upper, lower) ((upper) - (lower) + 1)
-
-/**
- * Computes the mask for a field in a BFPT word.
- *
- * @param upper Upper (start) bit of the field (inclusive).
- * @param lower Lower (end) bit of the field (inclusive).
- */
-#define BFPT_FIELD_MASK(upper, lower) \
-  (((UINT64_C(1) << BFPT_FIELD_WIDTH(upper, lower)) - 1) << (lower))
-
-/**
- * Computes the value of a field in a BFPT word.
- *
- * Bits outside the field are left as 1s. This macro is intended for expanding a
- * list of fields, e.g. `BFPT_WORD_1`, to compute the value of a BFPT word using
- * bitwise AND.
- *
- * @param upper Upper (start) bit of the field (inclusive).
- * @param lower Lower (end) bit of the field (inclusive).
- * @param value Value of the field.
- */
-#define BFPT_FIELD_VALUE(upper, lower, value) \
-  ((uint32_t)~BFPT_FIELD_MASK(upper, lower) | \
-   (BFPT_FIELD_MASK(upper, lower) & ((uint32_t)(value) << (uint32_t)(lower))))
-
 // Note: Words below are numbered starting from 1 to match JESD216F. Some fields
 // that are not supported by OpenTitan are merged for the sake of conciseness.
 // Unused/reserved fields that should be set to all 1s are ommitted due to the
@@ -466,6 +445,7 @@ typedef struct cmd_info {
    * area if a larger payload is received.
    */
   bool handled_in_sw;
+  bool data_to_host;
 } cmd_info_t;
 
 /**
@@ -493,10 +473,18 @@ static void cmd_info_set(cmd_info_t cmd_info) {
   reg = bitfield_bit32_write(reg, SPI_DEVICE_CMD_INFO_0_BUSY_0_BIT,
                              cmd_info.handled_in_sw);
   reg = bitfield_bit32_write(reg, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, true);
+  reg = bitfield_bit32_write(reg, SPI_DEVICE_CMD_INFO_0_PAYLOAD_DIR_0_BIT,
+                             cmd_info.data_to_host);
   abs_mmio_write32(kBase + cmd_info.reg_offset, reg);
 }
 
-void spi_device_init(void) {
+void spi_device_init_bootstrap(void) {
+  spi_device_init(kSpiDeviceJedecDensity, &kSpiDeviceSfdpTable,
+                  sizeof(kSpiDeviceSfdpTable));
+}
+
+void spi_device_init(uint8_t log2_density, const void *sfdp_table,
+                     size_t sfdp_len) {
   // CPOL = 0, CPHA = 0, MSb-first TX and RX, 3-byte addressing.
   uint32_t reg = bitfield_bit32_write(0, SPI_DEVICE_CFG_TX_ORDER_BIT, false);
   reg = bitfield_bit32_write(reg, SPI_DEVICE_CFG_RX_ORDER_BIT, false);
@@ -526,15 +514,15 @@ void spi_device_init(void) {
   reg = bitfield_field32_write(reg, SPI_DEVICE_DEV_ID_CHIP_GEN_FIELD,
                                hw_rev.product_id);
   reg = bitfield_field32_write(reg, SPI_DEVICE_DEV_ID_DENSITY_FIELD,
-                               kSpiDeviceJedecDensity);
+                               log2_density);
   reg = bitfield_field32_write(reg, SPI_DEVICE_JEDEC_ID_MF_FIELD,
                                kSpiDeviceJedecManufId);
   abs_mmio_write32(kBase + SPI_DEVICE_JEDEC_ID_REG_OFFSET, reg);
 
   // Write SFDP table to the reserved region in spi_device buffer.
   uint32_t dest = kSfdpAreaStartAddr;
-  const char *table = (const char *)&kSpiDeviceSfdpTable;
-  for (size_t i = 0; i < kSpiDeviceSfdpTableNumWords; ++i) {
+  const char *table = (const char *)sfdp_table;
+  for (size_t i = 0; i < sfdp_len / sizeof(uint32_t); ++i) {
     abs_mmio_write32(dest, read_32(table));
     dest += sizeof(uint32_t);
     table += sizeof(uint32_t);
@@ -613,15 +601,18 @@ void spi_device_init(void) {
   abs_mmio_write32(kBase + SPI_DEVICE_CMD_INFO_WRDI_REG_OFFSET, reg);
 }
 
-rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd) {
-  uint32_t reg = 0;
-  bool cmd_pending = false;
-  while (!cmd_pending) {
+rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd, bool blocking) {
+  uint32_t reg;
+  bool cmd_pending;
+  do {
     // Note: Using INTR_STATE.UPLOAD_CMDFIFO_NOT_EMPTY because
     // UPLOAD_STATUS.CMDFIFO_NOTEMPTY is set before the SPI transaction ends.
     reg = abs_mmio_read32(kBase + SPI_DEVICE_INTR_STATE_REG_OFFSET);
     cmd_pending = bitfield_bit32_read(
         reg, SPI_DEVICE_INTR_COMMON_UPLOAD_CMDFIFO_NOT_EMPTY_BIT);
+  } while (!cmd_pending && blocking);
+  if (!cmd_pending) {
+    return kErrorNoData;
   }
   abs_mmio_write32(kBase + SPI_DEVICE_INTR_STATE_REG_OFFSET, UINT32_MAX);
   if (bitfield_bit32_read(reg,
@@ -662,3 +653,58 @@ void spi_device_flash_status_clear(void) {
 uint32_t spi_device_flash_status_get(void) {
   return abs_mmio_read32(kBase + SPI_DEVICE_FLASH_STATUS_REG_OFFSET);
 }
+
+uint32_t spi_device_control(void) {
+  return abs_mmio_read32(kBase + SPI_DEVICE_CFG_REG_OFFSET);
+}
+
+void spi_device_enable_mailbox(uint32_t address) {
+  // Enable the SPI mailbox at the given address.
+  abs_mmio_write32(kBase + SPI_DEVICE_MAILBOX_ADDR_REG_OFFSET, address);
+  uint32_t cfg_reg = abs_mmio_read32(kBase + SPI_DEVICE_CFG_REG_OFFSET);
+  cfg_reg = bitfield_bit32_write(cfg_reg, SPI_DEVICE_CFG_MAILBOX_EN_BIT, 1);
+  abs_mmio_write32(kBase + SPI_DEVICE_CFG_REG_OFFSET, cfg_reg);
+
+  // Turn on internal processing of Read, ReadSfdp, ReadJedecId and ReadStatus.
+  uint32_t reg = 0;
+  reg = bitfield_bit32_write(reg, SPI_DEVICE_INTERCEPT_EN_STATUS_BIT, true);
+  reg = bitfield_bit32_write(reg, SPI_DEVICE_INTERCEPT_EN_JEDEC_BIT, true);
+  reg = bitfield_bit32_write(reg, SPI_DEVICE_INTERCEPT_EN_SFDP_BIT, true);
+  reg = bitfield_bit32_write(reg, SPI_DEVICE_INTERCEPT_EN_MBX_BIT, true);
+  abs_mmio_write32(kBase + SPI_DEVICE_INTERCEPT_EN_REG_OFFSET, reg);
+
+  // Configure the READ command (CMD_INFO_5).
+  cmd_info_set((cmd_info_t){
+      .reg_offset = SPI_DEVICE_CMD_INFO_5_REG_OFFSET,
+      .op_code = kSpiDeviceOpcodeRead,
+      .address = true,
+      .dummy_cycles = 0,
+      .handled_in_sw = false,
+      .data_to_host = true,
+  });
+}
+
+void spi_device_copy_to_egress(uint32_t egress_offset, const void *data,
+                               size_t len) {
+  const uint32_t *src = (const uint32_t *)data;
+  volatile uint32_t *dst =
+      (volatile uint32_t *)(uintptr_t)(kBase +
+                                       SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+                                       egress_offset);
+
+  while (len > sizeof(uint32_t)) {
+    *dst++ = *src++;
+    len -= sizeof(uint32_t);
+  }
+  if (len > 0) {
+    uint32_t val = 0;
+    uint32_t shift = 0;
+    const char *s = (const char *)src;
+    while (len > 0) {
+      val |= (uint32_t)*s++ << shift;
+      shift += 8;
+      len -= 1;
+    }
+    *dst = val;
+  }
+}
diff --git a/sw/device/silicon_creator/lib/drivers/spi_device.h b/sw/device/silicon_creator/lib/drivers/spi_device.h
index 4dc63281ee200..2ed5e683663af 100644
--- a/sw/device/silicon_creator/lib/drivers/spi_device.h
+++ b/sw/device/silicon_creator/lib/drivers/spi_device.h
@@ -34,20 +34,7 @@ enum {
   kSpiDeviceJedecContCode = 0x7f,
   kSpiDeviceJedecContCodeCount = 12,
   kSpiDeviceJedecManufId = 0xef,
-  /**
-   * LSB of the 2-byte device ID.
-   *
-   * Density is expressed as log2(flash size in bytes).
-   */
-  kSpiDeviceJedecDensity = 20,
-  /**
-   * Size of the JEDEC Basic Flash Parameter Table (BFPT) in words.
-   */
-  kSpiDeviceBfptNumWords = 23,
-  /**
-   * Size of the SFDP table in words.
-   */
-  kSpiDeviceSfdpTableNumWords = 27,
+
   /**
    * Address value used when a command does not have an address.
    *
@@ -59,6 +46,14 @@ enum {
 
 // TODO(#11740): Auto-generated macros for HW constants.
 enum {
+  /**
+   * Size of the JEDEC Basic Flash Parameter Table (BFPT) in words.
+   *
+   * Note: This is the size of the BFPT table in spi_device.c used for ROM
+   * bootstrap. Other users may define their own SFDP tables with a different
+   * BFPT.
+   */
+  kSpiDeviceBfptNumWords = 23,
   /**
    * Size of the SFDP area in spi_device egress buffer in bytes.
    *
@@ -100,6 +95,13 @@ enum {
  * received, spi_device overwrites the contents of the payload buffer.
  */
 typedef enum spi_device_opcode {
+  /**
+   * READ command.
+   *
+   * This command is handled by the spi_device. Upon receiving this command,
+   * spi_device sends the data from either the SPI mailbox or egress buffer.
+   */
+  kSpiDeviceOpcodeRead = 0x03,
   /**
    * READ_STATUS command.
    *
@@ -273,7 +275,10 @@ typedef struct spi_device_sfdp_table {
    */
   spi_device_param_header_t bfpt_header;
   /**
-   * Basic Flash Parameters Table (BFPT).
+   * Basic Flash Parameter Table (BFPT) (JESD216F 6.4).
+   *
+   * This is a mandatory table defined by JEDEC that identifies some of the
+   * basic features of a SPI protocol flash memory device.
    */
   spi_device_bfpt_t bfpt;
 } spi_device_sfdp_table_t;
@@ -283,9 +288,6 @@ OT_ASSERT_MEMBER_OFFSET(spi_device_sfdp_table_t, bfpt, 16);
 OT_ASSERT_SIZE(spi_device_sfdp_table_t, 108);
 static_assert(sizeof(spi_device_sfdp_table_t) <= kSpiDeviceSfdpAreaNumBytes,
               "SFDP table must fit in the space provided by spi_device");
-static_assert(sizeof(spi_device_sfdp_table_t) ==
-                  kSpiDeviceSfdpTableNumWords * sizeof(uint32_t),
-              "`kSpiDeviceSfdpTableNumWords` is incorrect");
 
 // Note: Declared here to be able to use in tests.
 extern const spi_device_sfdp_table_t kSpiDeviceSfdpTable;
@@ -302,7 +304,29 @@ extern const spi_device_sfdp_table_t kSpiDeviceSfdpTable;
  *   - READ_JEDEC_ID
  *   - READ_SFDP
  */
-void spi_device_init(void);
+void spi_device_init_bootstrap(void);
+
+/**
+ * Initializes the spi_device in flash mode.
+ *
+ * This function initializes the spi_device in the following configuration:
+ * - CPOL = 0, CPHA = 0 (clock low in idle, data sampled on rising clock edge).
+ * - MSb-first bit order for RX and TX.
+ * - Flash mode with 3-byte addressing.
+ * - The given `sfdp_table` is written to the SFDP area in the buffer.
+ * - Commands:
+ *   - READ_JEDEC_ID
+ *   - READ_SFDP
+ *
+ * @param log2_density The density to be reported by READ_JEDEC_ID (the log2
+ *                     flash size in bytes).
+ * @param sfdp_table The SFDP table to program into the SFDP area. The table
+ *                 must be word aligned.
+ * @param sfdp_len The length of the SFDP table in bytes. The length must be
+ *                 a multiple of 4 bytes.
+ */
+void spi_device_init(uint8_t log2_density, const void *sfdp_table,
+                     size_t sfdp_len);
 
 /**
  * A SPI flash command.
@@ -341,9 +365,10 @@ typedef struct spi_device_cmd {
  * next word boundary.
  *
  * @param[out] cmd SPI flash command.
+ * @param blocking Whether or not to block until a command is received.
  */
 OT_WARN_UNUSED_RESULT
-rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd);
+rom_error_t spi_device_cmd_get(spi_device_cmd_t *cmd, bool blocking);
 
 /**
  * Clears the SPI flash status register.
@@ -359,6 +384,24 @@ void spi_device_flash_status_clear(void);
 OT_WARN_UNUSED_RESULT
 uint32_t spi_device_flash_status_get(void);
 
+/**
+ * Enables the SPI mailbox at the given SPI address.
+ *
+ * @param address The SPI address of the mailbox.
+ */
+void spi_device_enable_mailbox(uint32_t address);
+
+/**
+ * Copies data to the SPI egress buffer.
+ *
+ * @param egress_offset Destination offset in the egress buffer.
+ * @param data Pointer to data to copy into the egress buffer.  The data must
+ *             be word aligned.
+ * @param len Length of data to copy into the egress buffer.
+ */
+void spi_device_copy_to_egress(uint32_t egress_offset, const void *data,
+                               size_t len);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/sw/device/silicon_creator/lib/drivers/spi_device_bfpt.h b/sw/device/silicon_creator/lib/drivers/spi_device_bfpt.h
new file mode 100644
index 0000000000000..4c358ef289ba1
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/spi_device_bfpt.h
@@ -0,0 +1,49 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_SPI_DEVICE_BFPT_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_SPI_DEVICE_BFPT_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Computes the width of a field in a Basic Flash Parameters Table (BFPT) word.
+ *
+ * @param upper Upper (start) bit of the field (inclusive).
+ * @param lower Lower (end) bit of the field (inclusive).
+ */
+#define BFPT_FIELD_WIDTH(upper, lower) ((upper) - (lower) + 1)
+
+/**
+ * Computes the mask for a field in a BFPT word.
+ *
+ * @param upper Upper (start) bit of the field (inclusive).
+ * @param lower Lower (end) bit of the field (inclusive).
+ */
+#define BFPT_FIELD_MASK(upper, lower) \
+  (((UINT64_C(1) << BFPT_FIELD_WIDTH(upper, lower)) - 1) << (lower))
+
+/**
+ * Computes the value of a field in a BFPT word.
+ *
+ * Bits outside the field are left as 1s. This macro is intended for expanding a
+ * list of fields, e.g. `BFPT_WORD_1`, to compute the value of a BFPT word using
+ * bitwise AND.
+ *
+ * @param upper Upper (start) bit of the field (inclusive).
+ * @param lower Lower (end) bit of the field (inclusive).
+ * @param value Value of the field.
+ */
+#define BFPT_FIELD_VALUE(upper, lower, value) \
+  ((uint32_t)~BFPT_FIELD_MASK(upper, lower) | \
+   (BFPT_FIELD_MASK(upper, lower) & ((uint32_t)(value) << (uint32_t)(lower))))
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_SPI_DEVICE_BFPT_H_
diff --git a/sw/device/silicon_creator/lib/drivers/spi_device_unittest.cc b/sw/device/silicon_creator/lib/drivers/spi_device_unittest.cc
index c6660b1aa76b7..ced38f87c56b7 100644
--- a/sw/device/silicon_creator/lib/drivers/spi_device_unittest.cc
+++ b/sw/device/silicon_creator/lib/drivers/spi_device_unittest.cc
@@ -162,7 +162,7 @@ TEST_F(InitTest, Init) {
                          {SPI_DEVICE_CMD_INFO_WRDI_VALID_BIT, 1},
                      });
 
-  spi_device_init();
+  spi_device_init_bootstrap();
 }
 
 TEST_F(SpiDeviceTest, FlashStatusClear) {
@@ -197,7 +197,7 @@ TEST_F(CmdGetTest, PayloadOverflow) {
                      std::numeric_limits<uint32_t>::max());
 
   spi_device_cmd_t cmd;
-  EXPECT_EQ(spi_device_cmd_get(&cmd), kErrorSpiDevicePayloadOverflow);
+  EXPECT_EQ(spi_device_cmd_get(&cmd, true), kErrorSpiDevicePayloadOverflow);
 }
 
 TEST_P(CmdGetTest, CmdGet) {
@@ -234,7 +234,7 @@ TEST_P(CmdGetTest, CmdGet) {
   }
 
   spi_device_cmd_t cmd;
-  EXPECT_EQ(spi_device_cmd_get(&cmd), kErrorOk);
+  EXPECT_EQ(spi_device_cmd_get(&cmd, true), kErrorOk);
   EXPECT_EQ(cmd.opcode, GetParam().opcode);
   EXPECT_EQ(cmd.address, GetParam().address);
   EXPECT_EQ(cmd.payload_byte_count, GetParam().payload.size());
diff --git a/sw/device/silicon_creator/lib/drivers/stdusb.c b/sw/device/silicon_creator/lib/drivers/stdusb.c
new file mode 100644
index 0000000000000..00e94db7fff6e
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/stdusb.c
@@ -0,0 +1,122 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/stdusb.h"
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+
+static uint16_t zero;
+static uint16_t status;
+
+rom_error_t usb_control_setupdata(usb_control_ctx_t *ctx,
+                                  usb_setup_data_t *setup) {
+  rom_error_t result = kErrorUsbBadSetup;
+  switch (setup->request) {
+    case kUsbSetupReqGetDescriptor:
+      switch (setup->value >> 8) {
+        case kUsbDescTypeDevice:
+          return usb_ep_transfer(
+              kUsbDirIn | 0, (void *)ctx->device_desc,
+              (size_t)MIN(setup->length, ctx->device_desc->length), 0);
+        case kUsbDescTypeConfiguration: {
+          usb_configuration_descriptor_t *cfg =
+              (usb_configuration_descriptor_t *)ctx->config_desc;
+          return usb_ep_transfer(kUsbDirIn | 0, cfg,
+                                 (size_t)MIN(setup->length, cfg->total_length),
+                                 0);
+        }
+        case kUsbDescTypeString: {
+          size_t index = setup->value & 0xFF;
+          size_t n = 0;
+          while (ctx->string_desc[n] != NULL) {
+            ++n; /* count number of string descriptor */
+          }
+          if (index < n) {
+            return usb_ep_transfer(
+                kUsbDirIn | 0, (void *)ctx->string_desc[index],
+                (size_t)MIN(setup->length, ctx->string_desc[index][0]), 0);
+          }
+          break;
+        }
+        default:
+            /* nothing */;
+      }
+      break;
+
+    case kUsbSetupReqSetAddress:
+      // Note: You must handle SetAddress in your control endpoint
+      // callback after receiving notification that the transfer has
+      // completed (e.g. `kUsbTransferFlagsDone`).
+      ctx->next.device_address = (uint8_t)setup->value & 0x7f;
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+      ctx->flags |= kUsbControlFlagsPendingAddress;
+      return kErrorOk;
+
+    case kUsbSetupReqSetConfiguration:
+      // Note: You must handle SetConfiguration in your control endpoint
+      // callback after returning from this function.
+      // - If you're able to handle the SetConfiguration request without
+      //   error, you must ack the transaction with a zero-length packet,
+      //   such as: `usb_ep_transfer(0, NULL, 0, kUsbTransferFlagsIn)
+      // - If you're unable to handle the SetConfiguration request,
+      //   you must stall: `usb_ep_stall(0)`.
+      usb_clear_all_toggles();
+      ctx->next.configuration = (uint8_t)setup->value;
+      ctx->flags |= kUsbControlFlagsPendingConfig;
+      return kErrorOk;
+
+    case kUsbSetupReqGetConfiguration:
+      return usb_ep_transfer(kUsbDirIn | 0, &ctx->configuration,
+                             sizeof(ctx->configuration), 0);
+
+    case kUsbSetupReqSetFeature:
+      switch (setup->value) {
+        case kUsbFeatureEndpointHalt:
+          RETURN_IF_ERROR(usb_ep_stall((uint8_t)setup->index, true));
+          return usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+        default:
+            /* nothing */;
+      }
+      break;
+
+    case kUsbSetupReqClearFeature:
+      switch (setup->value) {
+        case kUsbFeatureEndpointHalt:
+          usb_ep_clear_toggle((uint8_t)setup->index);
+          RETURN_IF_ERROR(usb_ep_stall((uint8_t)setup->index, false));
+          return usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+        default:
+            /* nothing */;
+      }
+      break;
+
+    case kUsbSetupReqGetStatus: {
+      uint8_t type = setup->request_type & kUsbReqTypeRecipientMask;
+      if (type == kUsbReqTypeDevice) {
+        status = kUsbStatusSelfPowered;
+      } else if (type == kUsbReqTypeEndpoint) {
+        bool halted;
+        usb_ep_stalled((uint8_t)setup->index, &halted);
+        status = halted ? kUsbStatusHalted : 0;
+      }
+      return usb_ep_transfer(kUsbDirIn | 0, &status, sizeof(status), 0);
+    }
+
+    case kUsbSetupReqSetInterface:
+      // We currently don't support alternate interfaces, so just ignore
+      // and send zero length packet for status phase.
+      return usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+
+    case kUsbSetupReqGetInterface:
+      return usb_ep_transfer(kUsbDirIn | 0, &zero, 1, 0);
+
+    case kUsbSetupReqSynchFrame:
+      return usb_ep_transfer(kUsbDirIn | 0, &zero, 2, 0);
+
+    default:
+        /* nothing */;
+  }
+  return result;
+}
diff --git a/sw/device/silicon_creator/lib/drivers/stdusb.h b/sw/device/silicon_creator/lib/drivers/stdusb.h
new file mode 100644
index 0000000000000..2e68e00bb60f7
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/stdusb.h
@@ -0,0 +1,298 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_STDUSB_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_STDUSB_H_
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// SETUP requests
+typedef enum usb_setup_req {
+  kUsbSetupReqGetStatus = 0,
+  kUsbSetupReqClearFeature = 1,
+  kUsbSetupReqSetFeature = 3,
+  kUsbSetupReqSetAddress = 5,
+  kUsbSetupReqGetDescriptor = 6,
+  kUsbSetupReqSetDescriptor = 7,
+  kUsbSetupReqGetConfiguration = 8,
+  kUsbSetupReqSetConfiguration = 9,
+  kUsbSetupReqGetInterface = 10,
+  kUsbSetupReqSetInterface = 11,
+  kUsbSetupReqSynchFrame = 12
+} usb_setup_req_t;
+
+typedef enum usb_req_type {  // bmRequestType
+  kUsbReqTypeRecipientMask = 0x1f,
+  kUsbReqTypeDevice = 0,
+  kUsbReqTypeInterface = 1,
+  kUsbReqTypeEndpoint = 2,
+  kUsbReqTypeOther = 3,
+  kUsbReqTypeTypeMask = 0x60,
+  kUsbReqTypeStandard = 0,
+  kUsbReqTypeClass = 0x20,
+  kUsbReqTypeVendor = 0x40,
+  kUsbReqTypeReserved = 0x60,
+  kUsbReqTypeDirMask = 0x80,
+  kUsbReqTypeDirHostToDev = 0x00,
+  kUsbReqTypeDirDevToHost = 0x80,
+} usb_req_type_t;
+
+typedef enum usb_desc_type {  // Descriptor type (wValue hi)
+  kUsbDescTypeDevice = 1,
+  kUsbDescTypeConfiguration,
+  kUsbDescTypeString,
+  kUsbDescTypeInterface,
+  kUsbDescTypeEndpoint,
+  kUsbDescTypeDeviceQualifier,
+  kUsbDescTypeOtherSpeedConfiguration,
+  kUsbDescTypeInterfacePower,
+} usb_desc_type_t;
+
+typedef enum usb_feature_req {
+  kUsbFeatureEndpointHalt = 0,        // recipient is endpoint
+  kUsbFeatureDeviceRemoteWakeup = 1,  // recipient is device
+  kUsbFeatureTestMode = 2,            // recipient is device
+  kUsbFeatureBHnpEnable = 3,          // recipient is device only if OTG
+  kUsbFeatureAHnpSupport = 4,         // recipient is device only if OTG
+  kUsbFeatureAAltHnpSupport = 5       // recipient is device only if OTG
+} usb_feature_req_t;
+
+typedef enum usb_status {
+  kUsbStatusSelfPowered = 1,  // Device status request
+  kUsbStatusRemWake = 2,      // Device status request
+  kUsbStatusHalted = 1        // Endpoint status request
+} usb_status_t;
+
+typedef struct usb_setup_data {
+  uint8_t request_type;
+  uint8_t request;
+  uint16_t value;
+  uint16_t index;
+  uint16_t length;
+} usb_setup_data_t;
+OT_ASSERT_MEMBER_OFFSET(usb_setup_data_t, request_type, 0);
+OT_ASSERT_MEMBER_OFFSET(usb_setup_data_t, request, 1);
+OT_ASSERT_MEMBER_OFFSET(usb_setup_data_t, value, 2);
+OT_ASSERT_MEMBER_OFFSET(usb_setup_data_t, index, 4);
+OT_ASSERT_MEMBER_OFFSET(usb_setup_data_t, length, 6);
+OT_ASSERT_SIZE(usb_setup_data_t, 8);
+
+typedef struct usb_device_descriptor {
+  uint8_t length;
+  uint8_t descriptor_type;
+  uint16_t bcd_usb;
+  uint8_t device_class;
+  uint8_t device_sub_class;
+  uint8_t device_protocol;
+  uint8_t max_packet_size_0;
+  uint16_t vendor;
+  uint16_t product;
+  uint16_t bcd_device;
+  uint8_t imanufacturer;
+  uint8_t iproduct;
+  uint8_t iserial_number;
+  uint8_t num_configurations;
+} usb_device_descriptor_t;
+
+typedef struct usb_configuration_descriptor {
+  uint8_t length;
+  uint8_t descriptor_type;
+  uint16_t total_length;
+  uint8_t num_interfaces;
+  uint8_t configuration_value;
+  uint8_t iconfiguration;
+  uint8_t attributes;
+  uint8_t max_power;
+} usb_configuration_descriptor_t;
+
+typedef struct usb_interface_descriptor {
+  uint8_t length;
+  uint8_t descriptor_type;
+  uint8_t interface_number;
+  uint8_t alternate_setting;
+  uint8_t num_endpoints;
+  uint8_t interface_class;
+  uint8_t interface_sub_class;
+  uint8_t interface_protocol;
+  uint8_t iinterface;
+} usb_interface_descriptor_t;
+
+typedef struct usb_endpoint_descriptor {
+  uint8_t length;
+  uint8_t descriptor_type;
+  uint8_t endpoint_address;
+  uint8_t attributes;
+  uint16_t max_packet_size;
+  uint8_t interval;
+} usb_endpoint_descriptor_t;
+
+typedef struct usb_string_descriptor {
+  uint8_t length;
+  uint8_t descriptor_type;
+  uint16_t string[];
+} usb_string_descriptor_t;
+
+typedef enum usb_control_flags {
+  kUsbControlFlagsPendingAddress = 1,
+  kUsbControlFlagsPendingConfig = 2,
+} usb_control_flags_t;
+
+typedef struct usb_control_ctx {
+  usb_control_flags_t flags;
+  uint8_t device_address;
+  uint8_t configuration;
+  struct {
+    uint8_t device_address;
+    uint8_t configuration;
+  } next;
+  const usb_device_descriptor_t *device_desc;
+  const uint8_t *config_desc;
+  const char **string_desc;
+} usb_control_ctx_t;
+
+/**
+ * Handle standard USB requests for endpoint zero.
+ *
+ * @param ctx A pointer to a usb_control_ctx_t.
+ * @param setup A pointer to a SETUPDATA request to process.
+ * @return kErrorOk if handled, kErrorUsbBadSetup if a stall is needed.
+ *
+ * Notes: The caller has responsibilities upon observing certain bits
+ * set in usb_control_flags_t.
+ *
+ * 1. If you observe kUsbControlFlagsPendingAddress, you need to set the device
+ *    address in your control endpoint callback after the control transaction
+ *    has completed (e.g. `kUsbTransferFlagsDone`).
+ *
+ * 2. If you observe kUsbControlFlagsPendingConfig, you need to transition to
+ *    the new configuration in your control endpoint callback and finish the
+ *    control transaction.
+ *    - If you're able to handle the SetConfiguration request without
+ *      error, you must ack the transaction with a zero-length packet,
+ *      such as: `usb_ep_transfer(0, NULL, 0, kUsbTransferFlagsIn)
+ *    - If you're unable to handle the SetConfiguration request,
+ *      you must stall: `usb_ep_stall(0)`.
+ */
+rom_error_t usb_control_setupdata(usb_control_ctx_t *ctx,
+                                  usb_setup_data_t *setup);
+
+/**
+ * Macros to help with constructing the config descriptor.
+ */
+#define USB_CFG_DSCR_LEN 9
+#define USB_CFG_DSCR_HEAD(total_len, nint)                                   \
+  /* This is the actual configuration descriptor                 */          \
+  USB_CFG_DSCR_LEN,     /* bLength                                   */      \
+      2,                /* bDescriptorType                           */      \
+      (total_len)&0xff, /* wTotalLength[0]                           */      \
+      (total_len) >> 8, /* wTotalLength[1]                           */      \
+      (nint),           /* bNumInterfaces                            */      \
+      1,                /* bConfigurationValue                       */      \
+      0,                /* iConfiguration                            */      \
+      0xC0,             /* bmAttributes: must-be-one, self-powered   */      \
+      50 /* bMaxPower                                 */ /* MUST be followed \
+                                                            by (nint)        \
+                                                            Interface +      \
+                                                            Endpoint         \
+                                                            Descriptors */
+
+// KEEP BLANK LINE ABOVE, it is in the macro!
+
+#define USB_INTERFACE_DSCR_LEN 9
+#define USB_INTERFACE_DSCR(inum, alt, nep, class_, subclass, protocol, iint)   \
+  /* interface descriptor, USB spec 9.6.5, page 267-269, Table 9-12 */         \
+  USB_INTERFACE_DSCR_LEN,            /* bLength                             */ \
+      4,                             /* bDescriptorType                     */ \
+      (inum),                        /* bInterfaceNumber                    */ \
+      (alt),                         /* bAlternateSetting                   */ \
+      (nep),                         /* bNumEndpoints                       */ \
+      (class_),                      /* bInterfaceClass (Vendor Specific)   */ \
+      (subclass),                    /* bInterfaceSubClass                  */ \
+      (protocol),                    /* bInterfaceProtocol                  */ \
+      (iint) /* iInterface        */ /* MUST be followed by                    \
+                                        (nep) Endpoint                         \
+                                        Descriptors */
+
+// KEEP BLANK LINE ABOVE, it is in the macro!
+
+#define USB_EP_DSCR_LEN 7
+#define USB_EP_DSCR(in, ep, attr, maxsize, interval)                          \
+  /* endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13   */       \
+  USB_EP_DSCR_LEN,                 /* bLength                              */ \
+      5,                           /* bDescriptorType                      */ \
+      (ep) | (((in) << 7) & 0x80), /* bEndpointAddress, top bit set for IN */ \
+      attr,                        /* bmAttributes                         */ \
+      (maxsize)&0xff,              /* wMaxPacketSize[0]                    */ \
+      (maxsize) >> 8,              /* wMaxPacketSize[1]                    */ \
+      (interval)                   /* bInterval                            */
+
+// KEEP BLANK LINE ABOVE, it is in the macro!
+#define USB_BULK_EP_DSCR(in, ep, maxsize, interval)                           \
+  /* endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13   */       \
+  USB_EP_DSCR_LEN,                 /* bLength                              */ \
+      5,                           /* bDescriptorType                      */ \
+      (ep) | (((in) << 7) & 0x80), /* bEndpointAddress, top bit set for IN */ \
+      0x02,                        /* bmAttributes (0x02=bulk, data)       */ \
+      (maxsize)&0xff,              /* wMaxPacketSize[0]                    */ \
+      (maxsize) >> 8,              /* wMaxPacketSize[1]                    */ \
+      (interval)                   /* bInterval                            */
+
+// KEEP BLANK LINE ABOVE, it is in the macro!
+
+/**
+ * A macro to help with constructing small (less than 32 chars) string
+ * descriptors.
+ */
+#define USB_STRING_DSCR(...)                                        \
+  2 + OT_VA_ARGS_COUNT(dummy, ##__VA_ARGS__) * 2,                   \
+      3 /* Missing comma intentional */                             \
+      OT_CAT(OT_CAT(USB_CHAR_, OT_VA_ARGS_COUNT(0, ##__VA_ARGS__)), \
+             _)(__VA_ARGS__)
+
+#define USB_CHAR_1_(x) , x, 0
+#define USB_CHAR_2_(x, ...) , x, 0 USB_CHAR_1_(__VA_ARGS__)
+#define USB_CHAR_3_(x, ...) , x, 0 USB_CHAR_2_(__VA_ARGS__)
+#define USB_CHAR_4_(x, ...) , x, 0 USB_CHAR_3_(__VA_ARGS__)
+#define USB_CHAR_5_(x, ...) , x, 0 USB_CHAR_4_(__VA_ARGS__)
+#define USB_CHAR_6_(x, ...) , x, 0 USB_CHAR_5_(__VA_ARGS__)
+#define USB_CHAR_7_(x, ...) , x, 0 USB_CHAR_6_(__VA_ARGS__)
+#define USB_CHAR_8_(x, ...) , x, 0 USB_CHAR_7_(__VA_ARGS__)
+#define USB_CHAR_9_(x, ...) , x, 0 USB_CHAR_8_(__VA_ARGS__)
+#define USB_CHAR_10_(x, ...) , x, 0 USB_CHAR_9_(__VA_ARGS__)
+#define USB_CHAR_11_(x, ...) , x, 0 USB_CHAR_10_(__VA_ARGS__)
+#define USB_CHAR_12_(x, ...) , x, 0 USB_CHAR_11_(__VA_ARGS__)
+#define USB_CHAR_13_(x, ...) , x, 0 USB_CHAR_12_(__VA_ARGS__)
+#define USB_CHAR_14_(x, ...) , x, 0 USB_CHAR_13_(__VA_ARGS__)
+#define USB_CHAR_15_(x, ...) , x, 0 USB_CHAR_14_(__VA_ARGS__)
+#define USB_CHAR_16_(x, ...) , x, 0 USB_CHAR_15_(__VA_ARGS__)
+#define USB_CHAR_17_(x, ...) , x, 0 USB_CHAR_16_(__VA_ARGS__)
+#define USB_CHAR_18_(x, ...) , x, 0 USB_CHAR_17_(__VA_ARGS__)
+#define USB_CHAR_19_(x, ...) , x, 0 USB_CHAR_18_(__VA_ARGS__)
+#define USB_CHAR_20_(x, ...) , x, 0 USB_CHAR_19_(__VA_ARGS__)
+#define USB_CHAR_21_(x, ...) , x, 0 USB_CHAR_20_(__VA_ARGS__)
+#define USB_CHAR_22_(x, ...) , x, 0 USB_CHAR_21_(__VA_ARGS__)
+#define USB_CHAR_23_(x, ...) , x, 0 USB_CHAR_22_(__VA_ARGS__)
+#define USB_CHAR_24_(x, ...) , x, 0 USB_CHAR_23_(__VA_ARGS__)
+#define USB_CHAR_25_(x, ...) , x, 0 USB_CHAR_24_(__VA_ARGS__)
+#define USB_CHAR_26_(x, ...) , x, 0 USB_CHAR_25_(__VA_ARGS__)
+#define USB_CHAR_27_(x, ...) , x, 0 USB_CHAR_26_(__VA_ARGS__)
+#define USB_CHAR_28_(x, ...) , x, 0 USB_CHAR_27_(__VA_ARGS__)
+#define USB_CHAR_29_(x, ...) , x, 0 USB_CHAR_28_(__VA_ARGS__)
+#define USB_CHAR_30_(x, ...) , x, 0 USB_CHAR_29_(__VA_ARGS__)
+#define USB_CHAR_31_(x, ...) , x, 0 USB_CHAR_30_(__VA_ARGS__)
+#define USB_CHAR_32_(x, ...) , x, 0 USB_CHAR_31_(__VA_ARGS__)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_STDUSB_H_
diff --git a/sw/device/silicon_creator/lib/drivers/uart.c b/sw/device/silicon_creator/lib/drivers/uart.c
index 0d4e25f0c7c3a..d622ed3ad5b42 100644
--- a/sw/device/silicon_creator/lib/drivers/uart.c
+++ b/sw/device/silicon_creator/lib/drivers/uart.c
@@ -72,8 +72,7 @@ static bool uart_rx_empty(void) {
   return bitfield_bit32_read(reg, UART_STATUS_RXEMPTY_BIT);
 }
 
-OT_WARN_UNUSED_RESULT
-static bool uart_tx_idle(void) {
+bool uart_tx_idle(void) {
   uint32_t reg =
       abs_mmio_read32(TOP_EARLGREY_UART0_BASE_ADDR + UART_STATUS_REG_OFFSET);
   return bitfield_bit32_read(reg, UART_STATUS_TXIDLE_BIT);
diff --git a/sw/device/silicon_creator/lib/drivers/uart.h b/sw/device/silicon_creator/lib/drivers/uart.h
index 6e11115f6dce4..9b38caf5662f4 100644
--- a/sw/device/silicon_creator/lib/drivers/uart.h
+++ b/sw/device/silicon_creator/lib/drivers/uart.h
@@ -92,6 +92,14 @@ void uart_write_imm(uint64_t val);
 OT_WARN_UNUSED_RESULT
 size_t uart_read(uint8_t *data, size_t len, uint32_t timeout_ms);
 
+/**
+ * Returns true if UART TX is idle, otherwise returns false.
+ *
+ * @return Boolean indicating UART TX activity status.
+ */
+OT_WARN_UNUSED_RESULT
+bool uart_tx_idle(void);
+
 /**
  * Detect if a UART break is asserted for a given period of time.
  *
diff --git a/sw/device/silicon_creator/lib/drivers/usb.c b/sw/device/silicon_creator/lib/drivers/usb.c
new file mode 100644
index 0000000000000..81dfd24aeea4f
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/usb.c
@@ -0,0 +1,496 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/hardened.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "usbdev_regs.h"
+
+#define USBDEV_NUM_BUFFERS 32
+#define CFG_PIN_FLIP false
+#define CFG_EN_DIFF_RCVR true
+#define CFG_TX_USE_D_SE0 false
+
+enum {
+  kBase = TOP_EARLGREY_USBDEV_BASE_ADDR,
+};
+
+// The buffer_pool is a bitmap of allocated buffers.
+// - One bits represent free buffers.
+// - Zero bits represent allocated buffers.
+static uint32_t buffer_pool;
+
+static inline void buffer_pool_init(void) {
+  // Our hardware has 32 buffers; set all one bits to indicate
+  // all buffers are free.
+  buffer_pool = UINT32_MAX;
+}
+
+static inline void buffer_pool_put(uint8_t id) {
+  HARDENED_CHECK_NE(buffer_pool, UINT32_MAX);
+  buffer_pool |= (1 << id);
+}
+
+static inline uint8_t buffer_pool_get(void) {
+  HARDENED_CHECK_NE(buffer_pool, 0);
+  uint8_t id = (uint8_t)bitfield_find_first_set32((int32_t)buffer_pool) - 1;
+  buffer_pool &= ~(1 << id);
+  return id;
+}
+
+static inline bool buffer_pool_empty(void) { return buffer_pool == 0; }
+
+usb_ep_info_t in_endpoints[USBDEV_PARAM_N_ENDPOINTS];
+usb_ep_info_t out_endpoints[USBDEV_PARAM_N_ENDPOINTS];
+
+// Copy memory into a USB buffer.
+// The USB register space only permits word writes, so we need to handle
+// buffer lengths that are not perfect multiples of the word size.
+// Note: src is required to be word aligned.
+static void copy_to_buffer(uint8_t id, const char *src, size_t len) {
+  uintptr_t buffer = kBase + USBDEV_BUFFER_REG_OFFSET + (uint32_t)id * 64;
+  volatile uint32_t *dst = (volatile uint32_t *)buffer;
+  while (len >= sizeof(uint32_t)) {
+    *dst++ = *(uint32_t *)src;
+    src += sizeof(uint32_t);
+    len -= sizeof(uint32_t);
+  }
+  uint32_t last = 0;
+  uint32_t shift = 0;
+  while (len > 0) {
+    last |= (uint32_t)*src << shift;
+    shift += 8;
+    src += 1;
+    len -= 1;
+  }
+  *dst = last;
+}
+
+// Copy from an USB buffer to memory.
+// The USB register space only permits word writes, so we need to handle
+// buffer lengths that are not perfect multiples of the word size.
+// Note: dst is required to be word aligned.
+static void copy_from_buffer(uint8_t id, char *dst, size_t len) {
+  uintptr_t buffer = kBase + USBDEV_BUFFER_REG_OFFSET + (uint32_t)id * 64;
+  volatile uint32_t *src = (volatile uint32_t *)buffer;
+
+  uint32_t *dst32 = (uint32_t *)dst;
+  while (len >= sizeof(uint32_t)) {
+    *dst32++ = *src++;
+    len -= sizeof(uint32_t);
+  }
+  if (len > 0) {
+    uint32_t last = *src;
+    dst = (char *)dst32;
+    while (len > 0) {
+      *dst++ = (char)last;
+      last >>= 8;
+      len -= 1;
+    }
+  }
+}
+
+// Configure the PHY according the define directives above.
+static void usb_phy_init(void) {
+  uint32_t phy_config = 0;
+  phy_config = bitfield_bit32_write(
+      phy_config, USBDEV_PHY_CONFIG_USE_DIFF_RCVR_BIT, CFG_EN_DIFF_RCVR);
+  phy_config = bitfield_bit32_write(
+      phy_config, USBDEV_PHY_CONFIG_TX_USE_D_SE0_BIT, CFG_TX_USE_D_SE0);
+  phy_config = bitfield_bit32_write(
+      phy_config, USBDEV_PHY_CONFIG_EOP_SINGLE_BIT_BIT, false);
+  phy_config = bitfield_bit32_write(phy_config, USBDEV_PHY_CONFIG_PINFLIP_BIT,
+                                    CFG_PIN_FLIP);
+  abs_mmio_write32(kBase + USBDEV_PHY_CONFIG_REG_OFFSET, phy_config);
+}
+
+// Performa a read/modify/write on a given register.
+static void usbreg_bit(uint32_t offset, uint32_t bit, bool value) {
+  uint32_t reg = abs_mmio_read32(kBase + offset);
+  reg = bitfield_bit32_write(reg, bit, value);
+  abs_mmio_write32(kBase + offset, reg);
+}
+
+// Set or clear STALL on an endpoint.
+rom_error_t usb_ep_stall(uint8_t ep, bool enable) {
+  uint8_t i = ep & kEpNumMask;
+  if (i >= USBDEV_PARAM_N_ENDPOINTS) {
+    return kErrorUsbBadEndpointNumber;
+  }
+  // We check for control endpoints here because control endpoints
+  // do not have the direction bit in their endpoint address.
+  if (ep & kUsbDirIn || in_endpoints[i].type & kUsbEpTypeControl) {
+    usbreg_bit(USBDEV_IN_STALL_REG_OFFSET, i, enable);
+  }
+  if ((ep & kUsbDirIn) == 0) {
+    usbreg_bit(USBDEV_OUT_STALL_REG_OFFSET, i, enable);
+  }
+  return kErrorOk;
+}
+
+void usb_ep_clear_toggle(uint8_t ep) {
+  uint8_t i = ep & kEpNumMask;
+  if (ep & kUsbDirIn) {
+    uint32_t reg =
+        bitfield_bit32_write(0, USBDEV_IN_DATA_TOGGLE_STATUS_OFFSET + i, false);
+    reg =
+        bitfield_bit32_write(reg, USBDEV_IN_DATA_TOGGLE_MASK_OFFSET + i, true);
+    abs_mmio_write32(kBase + USBDEV_IN_DATA_TOGGLE_REG_OFFSET, reg);
+  } else {
+    uint32_t reg = bitfield_bit32_write(
+        0, USBDEV_OUT_DATA_TOGGLE_STATUS_OFFSET + i, false);
+    reg =
+        bitfield_bit32_write(reg, USBDEV_OUT_DATA_TOGGLE_MASK_OFFSET + i, true);
+    abs_mmio_write32(kBase + USBDEV_OUT_DATA_TOGGLE_REG_OFFSET, reg);
+  }
+}
+
+void usb_clear_all_toggles(void) {
+  // We want to clear all endpoint toggles except endpoint zero.
+  uint32_t reg = (USBDEV_IN_DATA_TOGGLE_MASK_MASK & ~1u)
+                 << USBDEV_IN_DATA_TOGGLE_MASK_OFFSET;
+  // The bit layout for the IN and OUT toggle registers is identical.
+  abs_mmio_write32(kBase + USBDEV_IN_DATA_TOGGLE_REG_OFFSET, reg);
+  abs_mmio_write32(kBase + USBDEV_OUT_DATA_TOGGLE_REG_OFFSET, reg);
+}
+
+// Return whether an endpoint is stalled.
+rom_error_t usb_ep_stalled(uint8_t ep, bool *stalled) {
+  uint32_t reg = ep & kUsbDirIn ? abs_mmio_read32(USBDEV_IN_STALL_REG_OFFSET)
+                                : abs_mmio_read32(USBDEV_OUT_STALL_REG_OFFSET);
+  uint8_t i = ep & kEpNumMask;
+  if (i >= USBDEV_PARAM_N_ENDPOINTS) {
+    return kErrorUsbBadEndpointNumber;
+  }
+  *stalled = (reg & (1 << i)) != 0;
+  return kErrorOk;
+}
+
+rom_error_t usb_ep_init(uint8_t ep, usb_ep_type_t type,
+                        uint16_t max_packet_size, handler_t handler,
+                        void *user_ctx) {
+  uint8_t i = ep & kEpNumMask;
+  if (i >= USBDEV_PARAM_N_ENDPOINTS) {
+    return kErrorUsbBadEndpointNumber;
+  }
+  // If this is an OUT endpoint, configure for out transactions,
+  // but don't enable receive (we'll do that in usb_ep_transfer).
+  if ((ep & kUsbDirIn) == 0 || type & kUsbEpTypeControl) {
+    out_endpoints[i].type = type;
+    out_endpoints[i].max_packet_size = max_packet_size;
+    out_endpoints[i].transfer = (usb_transfer_t){0};
+    out_endpoints[i].handler = handler;
+    out_endpoints[i].user_ctx = user_ctx;
+
+    usbreg_bit(USBDEV_EP_OUT_ENABLE_REG_OFFSET, i, true);
+    // FIXME: sometimes protocols want to NAK OUT transactions
+    // while they're busy processing.  Currently, this driver
+    // doesn't support this mode of operation.
+    usbreg_bit(USBDEV_SET_NAK_OUT_REG_OFFSET, i, false);
+    usbreg_bit(USBDEV_RXENABLE_OUT_REG_OFFSET, i, false);
+  }
+  // If this is a CONTROL endpoint (e.g. handles SETUP_DATA),
+  // then enable SETUP and OUT.
+  if (type & kUsbEpTypeControl) {
+    usbreg_bit(USBDEV_RXENABLE_SETUP_REG_OFFSET, i, true);
+  }
+  // If this is an IN endpoint, enable for IN.
+  if ((ep & kUsbDirIn) != 0 || type & kUsbEpTypeControl) {
+    in_endpoints[i].type = type;
+    in_endpoints[i].max_packet_size = max_packet_size;
+    in_endpoints[i].transfer = (usb_transfer_t){0};
+    in_endpoints[i].handler = handler;
+    in_endpoints[i].user_ctx = user_ctx;
+
+    usbreg_bit(USBDEV_EP_IN_ENABLE_REG_OFFSET, i, true);
+  }
+
+  // Clear stall.
+  usb_ep_stall(ep, false);
+  return kErrorOk;
+}
+
+void fill_fifos(void) {
+  while (!buffer_pool_empty()) {
+    uint32_t status = abs_mmio_read32(kBase + USBDEV_USBSTAT_REG_OFFSET);
+    uint32_t av_setup_depth =
+        bitfield_field32_read(status, USBDEV_USBSTAT_AV_SETUP_DEPTH_FIELD);
+    if (av_setup_depth < 2) {
+      // Supply Available SETUP Buffer
+      uint8_t id = buffer_pool_get();
+      abs_mmio_write32(kBase + USBDEV_AVSETUPBUFFER_REG_OFFSET, id);
+    } else {
+      if (bitfield_bit32_read(status, USBDEV_USBSTAT_AV_OUT_FULL_BIT)) {
+        // The available OUT buffer FIFO is full.
+        break;
+      }
+      // Supply Available OUT Buffer
+      uint8_t id = buffer_pool_get();
+      abs_mmio_write32(kBase + USBDEV_AVOUTBUFFER_REG_OFFSET, id);
+    }
+  }
+}
+
+static bool rx_fifo_empty(void) {
+  uint32_t status = abs_mmio_read32(kBase + USBDEV_USBSTAT_REG_OFFSET);
+  return bitfield_bit32_read(status, USBDEV_USBSTAT_RX_EMPTY_BIT);
+}
+
+static void send_packet(uint8_t ep_index) {
+  usb_ep_info_t *endpoint = in_endpoints + ep_index;
+  size_t chunk = endpoint->max_packet_size < endpoint->transfer.len
+                     ? endpoint->max_packet_size
+                     : endpoint->transfer.len;
+  uint8_t buffer = buffer_pool_get();
+
+  if (chunk < endpoint->max_packet_size) {
+    // If the chunk is shorter than the endpoint size, then we can
+    // clear the ShortIn flag.
+    endpoint->transfer.flags &= ~(uint32_t)kUsbTransferFlagsShortIn;
+  }
+  copy_to_buffer(buffer, (char *)endpoint->transfer.data, chunk);
+  endpoint->transfer.data += chunk;
+  endpoint->transfer.len -= chunk;
+
+  uint32_t val = 0;
+  val = bitfield_field32_write(val, USBDEV_CONFIGIN_0_BUFFER_0_FIELD, buffer);
+  val = bitfield_field32_write(val, USBDEV_CONFIGIN_0_SIZE_0_FIELD, chunk);
+
+  // Mark the packet as ready for transmission
+  val = bitfield_bit32_write(val, USBDEV_CONFIGIN_0_RDY_0_BIT, true);
+  abs_mmio_write32(
+      kBase + USBDEV_CONFIGIN_0_REG_OFFSET + ep_index * sizeof(uint32_t), val);
+}
+
+rom_error_t usb_ep_transfer(uint8_t ep, void *data, size_t len,
+                            usb_transfer_flags_t flags) {
+  uint8_t i = ep & kEpNumMask;
+  if (i >= USBDEV_PARAM_N_ENDPOINTS) {
+    return kErrorUsbBadEndpointNumber;
+  }
+  usb_ep_info_t *endpoint = ep & kUsbDirIn ? in_endpoints : out_endpoints;
+  endpoint += i;
+
+  if (endpoint->type & kUsbEpTypeControl && len > 0) {
+    // Transfers of more than length zero on a control endpoint require a
+    // zero-length transfer in the opposite direction to finish the transaction.
+    flags |= kUsbTransferFlagsZlp;
+  }
+  endpoint->transfer.data = (char *)data;
+  endpoint->transfer.len = len;
+  endpoint->transfer.bytes_transfered = 0;
+  endpoint->transfer.flags = flags;
+  if (ep & kUsbDirIn) {
+    // IN transfer to host; send the first packet.
+    send_packet(i);
+  } else {
+    // OUT transfer from host; enable receiving OUT packets.
+    usbreg_bit(USBDEV_RXENABLE_OUT_REG_OFFSET, i, true);
+  }
+  return kErrorOk;
+}
+
+static void cancel_if_pending(uint8_t ep) {
+  uint32_t reg = abs_mmio_read32(kBase + USBDEV_CONFIGIN_0_REG_OFFSET +
+                                 ep * sizeof(uint32_t));
+  bool pending = bitfield_bit32_read(reg, USBDEV_CONFIGIN_0_PEND_0_BIT);
+  uint8_t buffer =
+      (uint8_t)bitfield_field32_read(reg, USBDEV_CONFIGIN_0_BUFFER_0_FIELD);
+  if (pending) {
+    buffer_pool_put(buffer);
+    abs_mmio_write32(
+        kBase + USBDEV_CONFIGIN_0_REG_OFFSET + ep * sizeof(uint32_t),
+        1 << USBDEV_CONFIGIN_0_PEND_0_BIT);
+  }
+}
+
+static void handle_in(void) {
+  // Handle IN transactions: return sent buffers to the buffer pool and send the
+  // next packet in any multi-packet transfers.
+  uint32_t sent = abs_mmio_read32(kBase + USBDEV_IN_SENT_REG_OFFSET);
+  for (uint8_t ep = 0; sent && ep < USBDEV_PARAM_N_ENDPOINTS; ++ep) {
+    if ((sent & (1 << ep)) == 0) {
+      continue;
+    }
+    sent &= ~(1 << ep);
+    usb_ep_info_t *endpoint = in_endpoints + ep;
+    uint32_t reg = abs_mmio_read32(kBase + USBDEV_CONFIGIN_0_REG_OFFSET +
+                                   ep * sizeof(uint32_t));
+    uint8_t buffer =
+        (uint8_t)bitfield_field32_read(reg, USBDEV_CONFIGIN_0_BUFFER_0_FIELD);
+    abs_mmio_write32(
+        kBase + USBDEV_CONFIGIN_0_REG_OFFSET + ep * sizeof(uint32_t),
+        1 << USBDEV_CONFIGIN_0_PEND_0_BIT);
+    buffer_pool_put(buffer);
+    // Clear IN_SENT bit (rw1c).
+    abs_mmio_write32(kBase + USBDEV_IN_SENT_REG_OFFSET, 1 << ep);
+    uint32_t error = 0;
+    if (bitfield_bit32_read(reg, USBDEV_CONFIGIN_0_PEND_0_BIT)) {
+      // Was there a cancelled transaction?
+      error = kUsbTransferFlagsError;
+    } else {
+      // Record the bytes transferred.
+      endpoint->transfer.bytes_transfered +=
+          bitfield_field32_read(reg, USBDEV_CONFIGIN_0_SIZE_0_FIELD);
+
+      if (endpoint->transfer.len > 0 ||
+          (endpoint->transfer.len == 0 &&
+           (endpoint->transfer.flags & kUsbTransferFlagsShortIn))) {
+        // If there is more data to transfer or if we need to send a zero-length
+        // IN packet to complete the transfer, then send the packet.
+        send_packet(ep);
+        continue;
+      }
+    }
+
+    if (error == 0 && (endpoint->transfer.flags & kUsbTransferFlagsZlp)) {
+      // If this is a control transfer, we need to turn around with a
+      // zero-length OUT packet.
+      usb_ep_transfer(ep, NULL, 0, kUsbTransferFlagsZlpAck);
+      continue;
+    }
+
+    // Complete the transfer.
+    if ((endpoint->type & kUsbEpTypeControl) == 0) {
+      ep |= kUsbDirIn;
+    }
+    if (endpoint->transfer.flags & kUsbTransferFlagsZlpAck) {
+      endpoint->transfer.flags = 0;
+      endpoint = out_endpoints + ep;
+    }
+    endpoint->transfer.flags |= kUsbTransferFlagsDone | error;
+    endpoint->handler(endpoint->user_ctx, ep, endpoint->transfer.flags,
+                      &endpoint->transfer.bytes_transfered);
+  }
+}
+
+static void handle_out(void) {
+  usb_setup_data_t setup_data = {0};
+  // Handle OUT transactions:
+  // - Get SETUPDATA for control endpoints.
+  // - Copy from USB buffers into the receiver's buffer.
+  // - Return buffers to the buffer pool.
+  while (!rx_fifo_empty()) {
+    uint32_t rxfifo = abs_mmio_read32(kBase + USBDEV_RXFIFO_REG_OFFSET);
+    uint8_t ep = (uint8_t)bitfield_field32_read(rxfifo, USBDEV_RXFIFO_EP_FIELD);
+    uint32_t setup = bitfield_bit32_read(rxfifo, USBDEV_RXFIFO_SETUP_BIT);
+    uint32_t size = bitfield_field32_read(rxfifo, USBDEV_RXFIFO_SIZE_FIELD);
+    uint8_t buffer =
+        (uint8_t)bitfield_field32_read(rxfifo, USBDEV_RXFIFO_BUFFER_FIELD);
+    usb_ep_info_t *endpoint = out_endpoints + ep;
+
+    if (endpoint->handler == NULL) {
+      buffer_pool_put(buffer);
+      continue;
+    }
+    if (setup) {
+      // Send SETUP_DATA directly to the endpoint handler.
+      // TODO: Do we need to call cancel_if_pending here?
+      copy_from_buffer(buffer, (char *)&setup_data, sizeof(setup_data));
+      buffer_pool_put(buffer);
+      endpoint->handler(endpoint->user_ctx, ep, kUsbTransferFlagsSetupData,
+                        &setup_data);
+      continue;
+    }
+    // If size>transfer.len, then there is an error on this transfer.
+    uint32_t error = size > endpoint->transfer.len ? kUsbTransferFlagsError : 0;
+    size_t chunk =
+        size < endpoint->transfer.len ? size : endpoint->transfer.len;
+    copy_from_buffer(buffer, endpoint->transfer.data, chunk);
+    buffer_pool_put(buffer);
+    endpoint->transfer.data += chunk;
+    endpoint->transfer.len -= chunk;
+    endpoint->transfer.bytes_transfered += chunk;
+    if (error || endpoint->transfer.len == 0 ||
+        chunk < endpoint->max_packet_size) {
+      if (error == 0 && endpoint->transfer.flags & kUsbTransferFlagsZlp) {
+        // If this is a control transfer, we need to turn around the packet
+        // with a zero-length IN.
+        usb_ep_transfer(kUsbDirIn | ep, NULL, 0, kUsbTransferFlagsZlpAck);
+        continue;
+      }
+      // Complete the transfer.
+      if (endpoint->transfer.flags & kUsbTransferFlagsZlpAck) {
+        endpoint->transfer.flags = 0;
+        endpoint = in_endpoints + ep;
+      }
+      endpoint->transfer.flags |= kUsbTransferFlagsDone | error;
+      endpoint->handler(endpoint->user_ctx, ep, endpoint->transfer.flags,
+                        &endpoint->transfer.bytes_transfered);
+    }
+  }
+}
+
+static void handle_reset(void) {
+  // For each endpoint, cancel any existing transfers.
+  for (uint8_t ep = 0; ep < USBDEV_PARAM_N_ENDPOINTS; ++ep) {
+    cancel_if_pending(ep);
+    usb_ep_info_t *endpoint = in_endpoints + ep;
+    if (endpoint->handler) {
+      endpoint->transfer.flags = 0;
+      endpoint->transfer.data = NULL;
+      endpoint->transfer.len = 0;
+      // Send a reset notifiy for direction IN, but non-control endpoints.
+      // We'll send the reset notify for control endpoints with the OUT
+      // endpoints.
+      if ((endpoint->type & kUsbEpTypeControl) == 0) {
+        endpoint->handler(endpoint->user_ctx, kUsbDirIn | ep,
+                          kUsbTransferFlagsReset, NULL);
+      }
+    }
+    endpoint = out_endpoints + ep;
+    if (endpoint->handler) {
+      endpoint->transfer.flags = 0;
+      endpoint->transfer.data = NULL;
+      endpoint->transfer.len = 0;
+      endpoint->handler(endpoint->user_ctx, ep, kUsbTransferFlagsReset, NULL);
+    }
+  }
+}
+
+void usb_poll(void) {
+  uint32_t istate = abs_mmio_read32(kBase + USBDEV_INTR_STATE_REG_OFFSET);
+
+  if (bitfield_bit32_read(istate, USBDEV_INTR_COMMON_PKT_SENT_BIT)) {
+    handle_in();
+  }
+  // Re-fill FIFOs as needed.
+  fill_fifos();
+  if (bitfield_bit32_read(istate, USBDEV_INTR_COMMON_PKT_RECEIVED_BIT)) {
+    handle_out();
+  }
+
+  // Handle a USB reset condition.  Reclaim all pending buffers, zero out all
+  // pending transfers and call all endpoint calbacks with the reset flag.
+  if (bitfield_bit32_read(istate, USBDEV_INTR_COMMON_LINK_RESET_BIT)) {
+    handle_reset();
+  }
+  // TODO: We need to check istate for link error conditions and handle them.
+
+  // Ack interrupt bits.
+  abs_mmio_write32(kBase + USBDEV_INTR_STATE_REG_OFFSET, istate);
+}
+
+void usb_set_address(uint8_t device_address) {
+  uint32_t val = abs_mmio_read32(kBase + USBDEV_USBCTRL_REG_OFFSET);
+  val = bitfield_field32_write(val, USBDEV_USBCTRL_DEVICE_ADDRESS_FIELD,
+                               device_address);
+  abs_mmio_write32(kBase + USBDEV_USBCTRL_REG_OFFSET, val);
+}
+
+void usb_enable(bool en) {
+  uint32_t val = abs_mmio_read32(kBase + USBDEV_USBCTRL_REG_OFFSET);
+  val = bitfield_bit32_write(val, USBDEV_USBCTRL_ENABLE_BIT, en);
+  abs_mmio_write32(kBase + USBDEV_USBCTRL_REG_OFFSET, val);
+}
+
+void usb_init(void) {
+  usb_phy_init();
+  buffer_pool_init();
+  fill_fifos();
+}
diff --git a/sw/device/silicon_creator/lib/drivers/usb.h b/sw/device/silicon_creator/lib/drivers/usb.h
new file mode 100644
index 0000000000000..5f2e99b63223a
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/usb.h
@@ -0,0 +1,203 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_USB_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_USB_H_
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/drivers/stdusb.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * Flags for endpoint configuration
+ */
+typedef enum usb_dir {
+  /** Endpoint is an IN endpoint */
+  kUsbDirIn = 0x80,
+  /** Endpoint is a OUT endpoint */
+  kUsbDirOut = 0,
+  /** Endpoint number mask */
+  kEpNumMask = 0xf,
+} usb_dir_t;
+
+typedef enum usb_ep_type {
+  /** Endpoint is a BULK endpoint */
+  kUsbEpTypeBulk = 0,
+  /** Endpoint is a INTERRUPT endpoint */
+  kUsbEpTypeInterrupt = 1,
+  /** Endpoint is a CONTROL endpoint */
+  kUsbEpTypeControl = 2,
+} usb_ep_type_t;
+
+/**
+ * Flags for managing usb transfers
+ */
+typedef enum usb_transfer_flags {
+  /** Transfer needs to terminate with a short or zero-length packet. */
+  kUsbTransferFlagsShortIn = 1,
+  /**
+   * Transfer is a control transfer: requires a zero-length packet in the
+   * opposite direction of the transfer to complete
+   */
+  kUsbTransferFlagsZlp = 2,
+  /**
+   * Transfer is the zero-length control transfer status packet.
+   */
+  kUsbTransferFlagsZlpAck = 0x0800,
+  /**
+   * Indicates a SETUP_DATA packet; the data argument of the callback points to
+   * a usb_setup_data_t.
+   */
+  kUsbTransferFlagsSetupData = 0x1000,
+  /**
+   * Indicates there was an error with the transaction.
+   */
+  kUsbTransferFlagsError = 0x2000,
+  /**
+   * Transfer is finished; the data argument of the callback points to a size_t
+   * indicating the number of bytes transferred.
+   */
+  kUsbTransferFlagsDone = 0x4000,
+  /** USB device was reset */
+  kUsbTransferFlagsReset = 0x8000,
+} usb_transfer_flags_t;
+
+/**
+ * Function pointer type for an endpoint handler.
+ *
+ * @param ctx A pointer to the context object supplied during endpoint
+ *            initialization.
+ * @param ep The endpoint address (including the direction flag).
+ * @param flags The usb transfer flags for this callback.
+ * @param data A pointer to data relevant to this callback (see the flags).
+ */
+typedef void (*handler_t)(void *ctx, uint8_t ep, usb_transfer_flags_t flags,
+                          void *data);
+
+/**
+ * An internal driver struct to manage endpoint transfers.
+ */
+typedef struct usb_transfer {
+  /** Pointer to data to transfer. */
+  char *data;
+  /** Length of data remaining to transfer. */
+  size_t len;
+  /** Number of bytes actually transferred. */
+  size_t bytes_transfered;
+  /** Flags associated with this transfer. */
+  usb_transfer_flags_t flags;
+} usb_transfer_t;
+
+/**
+ * An internal driver struct to manage each endpoint.
+ */
+typedef struct usb_ep_info {
+  /** Endpoint flags (e.g. control EP or other properties) */
+  usb_ep_type_t type;
+  /** The max packet size of this endpoint. */
+  uint16_t max_packet_size;
+  /** Any active transfer on this endpoint. */
+  usb_transfer_t transfer;
+  /** A handler to call for events on this endpoint. */
+  handler_t handler;
+  /** The user supplied context to pass to the handler. */
+  void *user_ctx;
+} usb_ep_info_t;
+
+/**
+ * Initialize the USB stack.
+ *
+ */
+void usb_init(void);
+
+/**
+ * Poll the USB device, driver transfers to completion and call endpoint
+ * callbacks.
+ *
+ */
+void usb_poll(void);
+
+/**
+ * Enable USB.
+ */
+void usb_enable(bool en);
+
+/**
+ * Set the USB address.
+ */
+void usb_set_address(uint8_t device_address);
+
+/**
+ * Initialize an USB endpoint.
+ *
+ * @param ep The endpoint address (including the direction flag).
+ * @param type The endpoint type (Bulk, Control).
+ * @param max_packet_size The endpoint max packet size.
+ * @param handler A handler to call when transactions complete on the endpoint.
+ * @param user_ctx A context pointer to pass to the handler.
+ * @return Error code.
+ */
+rom_error_t usb_ep_init(uint8_t ep, usb_ep_type_t type,
+                        uint16_t max_packet_size, handler_t handler,
+                        void *user_ctx);
+
+/**
+ * Stall or un-stall an endpoint.
+ *
+ * @param ep The endpoint address (including the direction flag).
+ * @param enable Whether to enable (true) or clear (false) the stall condition.
+ * @return Error code.
+ */
+rom_error_t usb_ep_stall(uint8_t ep, bool enable);
+
+/**
+ * Return whether an endpoint is stalled.
+ *
+ * @param ep The endpoint address (including the direction flag).
+ * @param stalled[out] Whether the endpoint is stalled.
+ * @return Error code.
+ */
+rom_error_t usb_ep_stalled(uint8_t ep, bool *stalled);
+
+/**
+ * Clear the data toggle on an endpoint.
+ * @param ep The endpoint address (including the direction flag).
+ */
+void usb_ep_clear_toggle(uint8_t ep);
+
+/**
+ * Clear the data toggle on all endpoints except endpoint zero.
+ */
+void usb_clear_all_toggles(void);
+
+/**
+ * Start a transfer on an endpoint.
+ *
+ *
+ * @param ep The endpoint address (including the direction flag).
+ *           Note: The other APIs (init, stall, stalled) do not require the
+ *           direction flag when operating on a control endpoint.  However,
+ *           since control endpoints may transfer data either in or out, you
+ *           must include the direction flag here.
+ * @param data The buffer to send or receive into.  Note: the pointer is
+ *             required to be word aligned.
+ * @param len The length of the buffer.
+ * @param flags The direction or other attributes assocated with the transfer.
+ * @return Error code.
+ */
+rom_error_t usb_ep_transfer(uint8_t ep, void *data, size_t len,
+                            usb_transfer_flags_t flags);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_DRIVERS_USB_H_
diff --git a/sw/device/silicon_creator/lib/drivers/usb_functest.c b/sw/device/silicon_creator/lib/drivers/usb_functest.c
new file mode 100644
index 0000000000000..f1e085b4b2682
--- /dev/null
+++ b/sw/device/silicon_creator/lib/drivers/usb_functest.c
@@ -0,0 +1,246 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
+#include "sw/device/silicon_creator/lib/drivers/rnd.h"
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+const usb_device_descriptor_t device_desc = {
+    .length = 18,
+    .descriptor_type = 1,
+    .bcd_usb = 0x0200,
+    .device_class = 0xFF,
+    .device_sub_class = 0xFF,
+    .device_protocol = 0xFF,
+    .max_packet_size_0 = 64,
+    .vendor = 0x18d1,
+    .product = 0x503a,
+    .bcd_device = 0x100,
+    .imanufacturer = 1,
+    .iproduct = 2,
+    .iserial_number = 3,
+    .num_configurations = 1,
+};
+
+const uint8_t config_desc[] = {
+    USB_CFG_DSCR_HEAD(
+        /*total_len=*/USB_CFG_DSCR_LEN + USB_INTERFACE_DSCR_LEN +
+            2 * USB_EP_DSCR_LEN,
+        /*nint=*/1),
+    USB_INTERFACE_DSCR(
+        /*inum=*/1,
+        /*alt=*/0,
+        /*nep=*/2,
+        /*class=*/0xFF,
+        /*subclass=*/0xFF,
+        /*protocol=*/1,
+        /*iint=*/0),
+    USB_BULK_EP_DSCR(
+        /*in=*/false,
+        /*ep=*/1,
+        /*maxsize=*/64,
+        /*interval=*/0),
+    USB_BULK_EP_DSCR(
+        /*in=*/true,
+        /*ep=*/2,
+        /*maxsize=*/64,
+        /*interval=*/0),
+};
+
+const char lang_id[] = {
+    /* bLength=*/4,
+    /* bDescriptorType=*/3,
+    /* bString=*/0x09,
+    0x04,
+};
+
+const char str_vendor[] = {
+    USB_STRING_DSCR('G', 'o', 'o', 'g', 'l', 'e'),
+};
+
+const char str_opentitan[] = {
+    USB_STRING_DSCR('O', 'p', 'e', 'n', 'T', 'i', 't', 'a', 'n'),
+};
+
+char str_serialnumber[2 + 32];
+
+const char *string_desc[] = {
+    lang_id, str_vendor, str_opentitan, str_serialnumber, NULL,
+};
+
+usb_control_ctx_t ep0 = {
+    .device_desc = &device_desc,
+    .config_desc = config_desc,
+    .string_desc = string_desc,
+};
+
+uint32_t work_buffer[16384];
+uint32_t test_exit;
+
+typedef enum test_req {
+  kTestReqRandomize = 1,
+  kTestReqDigest = 2,
+  kTestReqBulkIn = 3,
+  kTestReqBulkOut = 4,
+  kTestReqExit = 5,
+} test_req_t;
+
+void set_serialnumber(void) {
+  lifecycle_device_id_t dev;
+  lifecycle_device_id_get(&dev);
+  const char hex[] = "0123456789ABCDEF";
+
+  char *sn = str_serialnumber;
+  *sn++ = 2 + 32;
+  *sn++ = 3;
+  for (size_t w = 1; w < 3; ++w) {
+    uint8_t byte = (uint8_t)(dev.device_id[w] >> 24);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 16);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 8);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 0);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+  }
+}
+
+rom_error_t my_control(usb_setup_data_t *setup) {
+  switch (setup->request) {
+    case kTestReqRandomize:
+      base_printf("Randomize\r\n");
+      for (size_t i = 0; i < ARRAYSIZE(work_buffer); ++i) {
+        work_buffer[i] = rnd_uint32();
+      }
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+      break;
+
+    case kTestReqDigest: {
+      base_printf("Digest sz=%u\r\n", (size_t)setup->value + 1);
+      hmac_digest_t digest;
+      hmac_sha256_configure(true);
+      hmac_sha256_start();
+      hmac_sha256_update(work_buffer, (size_t)setup->value + 1);
+      hmac_sha256_process();
+      hmac_sha256_final(&digest);
+      usb_ep_transfer(kUsbDirIn | 0, &digest, sizeof(digest), 0);
+      break;
+    }
+    case kTestReqBulkIn: {
+      size_t length = (size_t)setup->value + 1;
+      uint8_t ep = (uint8_t)setup->index;
+      base_printf("BulkIn ep=%u sz=%u\r\n", setup->index, length);
+      usb_ep_transfer(
+          kUsbDirIn | ep, work_buffer, length,
+          (length < sizeof(work_buffer) ? kUsbTransferFlagsShortIn : 0));
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+      break;
+    }
+    case kTestReqBulkOut: {
+      size_t length = (size_t)setup->value + 1;
+      uint8_t ep = (uint8_t)setup->index;
+      base_printf("BulkOut ep=%u sz=%u\r\n", setup->index, length);
+      usb_ep_transfer(ep, work_buffer, length, 0);
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+      break;
+    }
+    case kTestReqExit:
+      base_printf("Exit\r\n");
+      test_exit = 1;
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+      break;
+    default:
+      return kErrorUsbBadSetup;
+  }
+  return kErrorOk;
+}
+
+void handler(void *ctx, uint8_t ep, usb_transfer_flags_t flags, void *data) {
+  OT_DISCARD(ctx);
+  if (flags & kUsbTransferFlagsSetupData) {
+    usb_setup_data_t *setup = (usb_setup_data_t *)data;
+    base_printf(
+        "SETUPDATA: type=%02x req=%02x value=%04x index=%04x len=%04x\r\n",
+        setup->request_type, setup->request, setup->value, setup->index,
+        setup->length);
+    rom_error_t error;
+    if ((setup->request_type & kUsbReqTypeTypeMask) == kUsbReqTypeVendor) {
+      error = my_control(setup);
+    } else {
+      error = usb_control_setupdata(&ep0, setup);
+    }
+    if (ep0.flags & kUsbControlFlagsPendingConfig) {
+      ep0.flags &= ~(unsigned)kUsbControlFlagsPendingConfig;
+      ep0.configuration = ep0.next.configuration;
+      LOG_INFO("set_configuration %u", ep0.configuration);
+      usb_ep_transfer(kUsbDirIn | 0, NULL, 0, 0);
+    }
+    if (error != kErrorOk) {
+      usb_ep_stall(0, true);
+    }
+  }
+  if (flags & kUsbTransferFlagsDone) {
+    if (ep0.flags & kUsbControlFlagsPendingAddress) {
+      ep0.flags &= ~(unsigned)kUsbControlFlagsPendingAddress;
+      ep0.device_address = ep0.next.device_address;
+      usb_set_address(ep0.device_address);
+      LOG_INFO("set_addr %u", ep0.device_address);
+    }
+
+    if (test_exit == 1) {
+      test_exit = 2;
+    }
+  }
+  if (ep != 0) {
+    int length = (flags & kUsbTransferFlagsDone) ? *(int *)data : -1;
+    base_printf("Event on EP%u: flags=%08x length=%d\r\n", ep, flags, length);
+  }
+}
+
+rom_error_t usb_test(void) {
+  set_serialnumber();
+  usb_init();
+  usb_ep_init(0x00, kUsbEpTypeControl, 0x40, handler, NULL);
+  usb_ep_init(0x01, kUsbEpTypeBulk, 0x40, handler, NULL);
+  usb_ep_init(0x82, kUsbEpTypeBulk, 0x40, handler, NULL);
+  usb_enable(true);
+  LOG_INFO("usb ready");
+  while (test_exit != 2) {
+    usb_poll();
+  }
+  return kErrorOk;
+}
+
+bool test_main(void) {
+  pinmux_init_usb();
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, usb_test);
+  return status_ok(result);
+}
diff --git a/sw/device/silicon_creator/lib/error.h b/sw/device/silicon_creator/lib/error.h
index 671780db8e013..00eae8f715d3f 100644
--- a/sw/device/silicon_creator/lib/error.h
+++ b/sw/device/silicon_creator/lib/error.h
@@ -52,9 +52,11 @@ enum module_ {
   kModuleRetRam =          MODULE_CODE('R', 'R'),
   kModuleXModem =          MODULE_CODE('X', 'M'),
   kModuleRescue =          MODULE_CODE('R', 'S'),
-  kModuleDice =            MODULE_CODE('D', 'C'),
   kModuleCert =            MODULE_CODE('C', 'E'),
   kModuleOwnership =       MODULE_CODE('O', 'W'),
+  kModulePersoTlv =        MODULE_CODE('P', 'T'),
+  kModuleDice =            MODULE_CODE('D', 'C'),
+  kModuleUsb =             MODULE_CODE('U', 'S'),
   // clang-format on
 };
 
@@ -84,6 +86,7 @@ enum module_ {
 #define DEFINE_ERRORS(X) \
   X(kErrorOk,                         0x739), \
   X(kErrorWriteBootdataThenReboot,    0x2ea), \
+  X(kErrorNoData,                     0x4d7), \
   X(kErrorUnknown,                    0xffffffff), \
   \
   X(kErrorSigverifyBadRsaSignature,   ERROR_(1, kModuleSigverify, kInvalidArgument)), \
@@ -96,6 +99,8 @@ enum module_ {
   X(kErrorSigverifyBadAuthPartition,  ERROR_(8, kModuleSigverify, kInvalidArgument)), \
   X(kErrorSigverifyBadEcdsaKey,       ERROR_(9, kModuleSigverify, kInvalidArgument)), \
   X(kErrorSigverifyBadSpxConfig,      ERROR_(10, kModuleSigverify, kInvalidArgument)), \
+  X(kErrorSigverifyEcdsaNotFound,     ERROR_(11, kModuleSigverify, kNotFound)), \
+  X(kErrorSigverifySpxNotFound,       ERROR_(12, kModuleSigverify, kNotFound)), \
   \
   X(kErrorKeymgrInternal,             ERROR_(1, kModuleKeymgr, kInternal)), \
   \
@@ -113,6 +118,7 @@ enum module_ {
   \
   X(kErrorRomBootFailed,              ERROR_(1, kModuleRom, kFailedPrecondition)), \
   X(kErrorRomResetReasonFault,        ERROR_(2, kModuleRom, kUnknown)), \
+  X(kErrorRomImmSection,              ERROR_(3, kModuleRom, kInvalidArgument)), \
   \
   /* The high-byte of kErrorInterrupt is modified with the interrupt cause */ \
   X(kErrorInterrupt,                  ERROR_(0, kModuleInterrupt, kUnknown)), \
@@ -164,6 +170,7 @@ enum module_ {
   \
   X(kErrorBootSvcBadHeader,           ERROR_(1, kModuleBootSvc, kInternal)), \
   X(kErrorBootSvcBadSlot,             ERROR_(2, kModuleBootSvc, kInvalidArgument)), \
+  X(kErrorBootSvcBadSecVer,           ERROR_(3, kModuleBootSvc, kInvalidArgument)), \
   \
   X(kErrorRomExtBootFailed,           ERROR_(1, kModuleRomExt, kFailedPrecondition)), \
   \
@@ -178,6 +185,7 @@ enum module_ {
   X(kErrorXModemUnknown,              ERROR_(9, kModuleXModem, kUnknown)), \
   X(kErrorXModemProtocol,             ERROR_(10, kModuleXModem, kInvalidArgument)), \
   X(kErrorXModemTooManyErrors,        ERROR_(11, kModuleXModem, kFailedPrecondition)), \
+  X(kErrorXModemBadLength,            ERROR_(12, kModuleXModem, kInvalidArgument)), \
   \
   /* The high-byte of kErrorInterrupt is modified with the interrupt cause */ \
   X(kErrorRomExtInterrupt,            ERROR_(0, kModuleRomExtInterrupt, kUnknown)), \
@@ -197,8 +205,8 @@ enum module_ {
   X(kErrorRescueReboot,               ERROR_(0, kModuleRescue, kInternal)), \
   X(kErrorRescueBadMode,              ERROR_(1, kModuleRescue, kInvalidArgument)), \
   X(kErrorRescueImageTooBig,          ERROR_(2, kModuleRescue, kFailedPrecondition)), \
-  \
-  X(kErrorDiceInvalidKeyType,         ERROR_(0, kModuleDice, kInvalidArgument)), \
+  X(kErrorRescueSendStart,            ERROR_(4, kModuleRescue, kInternal)), \
+  X(kErrorRescueInactivity,           ERROR_(5, kModuleRescue, kDeadlineExceeded)), \
   \
   X(kErrorCertInternal,               ERROR_(0, kModuleCert, kInternal)), \
   X(kErrorCertInvalidArgument,        ERROR_(1, kModuleCert, kInvalidArgument)), \
@@ -212,11 +220,48 @@ enum module_ {
   X(kErrorOwnershipInvalidTag,        ERROR_(5, kModuleOwnership, kInvalidArgument)), \
   X(kErrorOwnershipInvalidTagLength,  ERROR_(6, kModuleOwnership, kInvalidArgument)), \
   X(kErrorOwnershipDuplicateItem,     ERROR_(7, kModuleOwnership, kAlreadyExists)), \
-  X(kErrorOwnershipFlashConfigLenth,  ERROR_(8, kModuleOwnership, kOutOfRange)), \
+  X(kErrorOwnershipFlashConfigLength, ERROR_(8, kModuleOwnership, kOutOfRange)), \
   X(kErrorOwnershipInvalidInfoPage,   ERROR_(9, kModuleOwnership, kInvalidArgument)), \
   X(kErrorOwnershipBadInfoPage,       ERROR_(10, kModuleOwnership, kInternal)), \
   X(kErrorOwnershipNoOwner,           ERROR_(11, kModuleOwnership, kInternal)), \
   X(kErrorOwnershipKeyNotFound,       ERROR_(12, kModuleOwnership, kNotFound)), \
+  X(kErrorOwnershipInvalidDin,        ERROR_(13, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipUnlockDenied,      ERROR_(14, kModuleOwnership, kPermissionDenied)), \
+  X(kErrorOwnershipFlashConfigRomExt, ERROR_(15, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipFlashConfigBounds, ERROR_(16, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipInvalidAlgorithm,  ERROR_(17, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipFlashConfigSlots,  ERROR_(18, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipInvalidRescueBounds, ERROR_(19, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipSignatureNotFound, ERROR_(20, kModuleOwnership, kNotFound)), \
+  /* Group all of the ISFB error codes together */ \
+  X(kErrorOwnershipISFBNotPresent,    ERROR_(0x60, kModuleOwnership, kNotFound)), \
+  X(kErrorOwnershipISFBProductExpCnt, ERROR_(0x61, kModuleOwnership, kOutOfRange)), \
+  X(kErrorOwnershipISFBStrikeMask,    ERROR_(0x62, kModuleOwnership, kPermissionDenied)), \
+  X(kErrorOwnershipISFBProductExp,    ERROR_(0x63, kModuleOwnership, kPermissionDenied)), \
+  X(kErrorOwnershipISFBFailed,        ERROR_(0x64, kModuleOwnership, kInternal)), \
+  X(kErrorOwnershipISFBPage,          ERROR_(0x65, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipISFBSize,          ERROR_(0x66, kModuleOwnership, kInvalidArgument)), \
+  /* Group all of the tag version error codes together */ \
+  X(kErrorOwnershipOWNRVersion,       ERROR_(0x70, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipAPPKVersion,       ERROR_(0x71, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipFLSHVersion,       ERROR_(0x72, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipINFOVersion,       ERROR_(0x73, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipRESQVersion,       ERROR_(0x74, kModuleOwnership, kInvalidArgument)), \
+  X(kErrorOwnershipISFBVersion,       ERROR_(0x75, kModuleOwnership, kInvalidArgument)), \
+  \
+  X(kErrorPersoTlvInternal,           ERROR_(0, kModulePersoTlv, kInternal)), \
+  X(kErrorPersoTlvCertObjNotFound,    ERROR_(1, kModulePersoTlv, kNotFound)), \
+  X(kErrorPersoTlvCertNameTooLong,    ERROR_(2, kModulePersoTlv, kOutOfRange)), \
+  X(kErrorPersoTlvOutputBufTooSmall,  ERROR_(3, kModulePersoTlv, kOutOfRange)), \
+  \
+  X(kErrorDiceInternal,               ERROR_(0, kModuleDice, kInternal)), \
+  X(kErrorDiceCwtCoseKeyNotFound,     ERROR_(1, kModuleDice, kNotFound)), \
+  X(kErrorDiceCwtCoseKeyBadSize,      ERROR_(1, kModuleDice, kInternal)), \
+  X(kErrorDiceCwtKeyCoordsNotFound,   ERROR_(2, kModuleDice, kNotFound)), \
+  X(kErrorDicePageCorrupted,          ERROR_(3, kModuleDice, kInvalidArgument)), \
+  \
+  X(kErrorUsbBadSetup,                ERROR_(0, kModuleUsb, kInvalidArgument)), \
+  X(kErrorUsbBadEndpointNumber,       ERROR_(1, kModuleUsb, kInvalidArgument)), \
   \
   /* This comment prevent clang from trying to format the macro. */
 
diff --git a/sw/device/silicon_creator/lib/flash_exc_handler.S b/sw/device/silicon_creator/lib/flash_exc_handler.S
new file mode 100644
index 0000000000000..22f3800fc1bcd
--- /dev/null
+++ b/sw/device/silicon_creator/lib/flash_exc_handler.S
@@ -0,0 +1,236 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+/**
+ * This is the flash exception handler used by the ROM and ROM_EXT to deal with
+ * ECC errors reported by the flash controller.
+ *
+ * This file is built separately for the ROM and ROM_EXT by the `rom{,_ext}_isrs`
+ * rule in each of their respective subdirs.  Each of those rules builds this
+ * file with the INTERRUPT_HANDLER preprocessor symbol defined to be the
+ * name of the general interrupt handler for the respective target.
+ */
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/hardened_asm.h"
+#include "flash_ctrl_regs.h"
+
+.equ LOAD_ACCESS_FAULT, 5
+
+// If we get an ECC error reading from internal flash, one of these bits
+// will be set in the flash controller's FAULT_STATUS register.
+.equ PHY_ERRORS, (1 << FLASH_CTRL_FAULT_STATUS_PHY_STORAGE_ERR_BIT) | \
+                 (1 << FLASH_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT)
+
+// NOTE: The "ax" flag below is necessary to ensure that this section
+// is allocated executable space in ROM by the linker.
+.section .isrs, "ax"
+
+// -----------------------------------------------------------------------------
+
+  /**
+   * Exception handler.
+   */
+  .balign 4
+  .global flash_exception_handler
+  .type flash_exception_handler, @function
+  .extern flash_ecc_exc_handler_en
+flash_exception_handler:
+  // Save all registers to the exception frame.  The ROM locates its initial
+  // stack_end at `ram_end - 128` and the stack grows downwards from there.
+  // Save `sp` into `mscratch` and use the 128 bytes reserved at the top of
+  // RAM as the exception frame.
+  csrw mscratch, sp
+
+  // Before saving the stack frame, check if handling of flash exceptions is
+  // enabled.  Determine this with just the stack pointer so that if not enabled,
+  // we don't have to do any other register save/restore.
+  la   sp, flash_ecc_exc_handler_en
+  lw   sp, 0(sp)
+  xori sp, sp, HARDENED_BOOL_TRUE
+  bnez sp, .L_no_flash_exceptions
+
+  // Note: we save the exception frame in RISCV register number order so that
+  // we can extract the destination register from the faulting instruction and
+  // use it as an index into the exception frame.
+  la   sp, _exception_frame_start
+  sw   x1,  1 * OT_WORD_SIZE(sp)
+  sw   x2,  2 * OT_WORD_SIZE(sp)
+  sw   x3,  3 * OT_WORD_SIZE(sp)
+  sw   x4,  4 * OT_WORD_SIZE(sp)
+  sw   x5,  5 * OT_WORD_SIZE(sp)
+  sw   x6,  6 * OT_WORD_SIZE(sp)
+  sw   x7,  7 * OT_WORD_SIZE(sp)
+  sw   x8,  8 * OT_WORD_SIZE(sp)
+  sw   x9,  9 * OT_WORD_SIZE(sp)
+  sw   x10,  10 * OT_WORD_SIZE(sp)
+  sw   x11,  11 * OT_WORD_SIZE(sp)
+  sw   x12,  12 * OT_WORD_SIZE(sp)
+  sw   x13,  13 * OT_WORD_SIZE(sp)
+  sw   x14,  14 * OT_WORD_SIZE(sp)
+  sw   x15,  15 * OT_WORD_SIZE(sp)
+  sw   x16,  16 * OT_WORD_SIZE(sp)
+  sw   x17,  17 * OT_WORD_SIZE(sp)
+  sw   x18,  18 * OT_WORD_SIZE(sp)
+  sw   x19,  19 * OT_WORD_SIZE(sp)
+  sw   x20,  20 * OT_WORD_SIZE(sp)
+  sw   x21,  21 * OT_WORD_SIZE(sp)
+  sw   x22,  22 * OT_WORD_SIZE(sp)
+  sw   x23,  23 * OT_WORD_SIZE(sp)
+  sw   x24,  24 * OT_WORD_SIZE(sp)
+  sw   x25,  25 * OT_WORD_SIZE(sp)
+  sw   x26,  26 * OT_WORD_SIZE(sp)
+  sw   x27,  27 * OT_WORD_SIZE(sp)
+  sw   x28,  28 * OT_WORD_SIZE(sp)
+  sw   x29,  29 * OT_WORD_SIZE(sp)
+  sw   x30,  30 * OT_WORD_SIZE(sp)
+  sw   x31,  31 * OT_WORD_SIZE(sp)
+
+  // Get the mcause, mask the reason and check that it is LoadAccessFault.
+  csrr a1, mcause
+  andi a1, a1, 31
+  li   a2, LOAD_ACCESS_FAULT
+  bne  a1, a2, .L_not_a_flash_error
+
+  // Check if there is a flash error.
+  li   a3, TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR
+  lw   a1, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
+  andi a1, a1, PHY_ERRORS
+  beqz a1, .L_not_a_flash_error
+
+  // Clear the flash error.
+  sw   x0, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
+  // Hardening: check that the error is cleared.
+  lw   a1, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
+  beqz a1, .L_flash_fault_handled
+  j    .L_not_a_flash_error
+  unimp
+  unimp
+
+.L_flash_fault_handled:
+  // Compute the MEPC of the instruction after the fault.
+  //
+  // Since we support the RISC-V compressed instructions extension, we need to
+  // check if the two least significant bits of the instruction are
+  // b11 (0x3), which means that the trapped instruction is not compressed,
+  // i.e., the trapped instruction is 32bits = 4bytes. Otherwise, the trapped
+  // instruction is 16bits = 2bytes.
+  //
+  // Instruction formats for loads:
+  //
+  //  LB, LH, LW, LBU, LHU:
+  //  31                  20 19      15 14  12 11       7 6            0
+  // +----------------------+----------+------+----------+--------------+
+  // |      imm[11:0]       |    rs1   |funct3|    rd    |   0000011    |
+  // +----------------------+----------+------+----------+--------------+
+  //
+  // C.LW
+  //  15  13 12  10 9    7 6  5 4    2 1  0
+  // +------+------+------+----+------+----+
+  // |funct3| imm  | rs1' | imm|  rd' | 00 |
+  // +------+------+------+----+------+----+
+  // Where rd' and rs1' are (register_num - 8, ie: rd' of 0 means reg x8).
+  //
+
+  csrr a0, mepc
+  lh   a2, 0(a0)
+  addi a0, a0, OT_HALF_WORD_SIZE
+  // Check if its a 16-bit compressed instruction.
+  li   a1, 3
+  and  a3, a2, a1
+  bne  a3, a1, .L_compressed_trap_instr
+  // Check if its an uncompressed load instruction by checking that the next
+  // five bits are zero.
+  srli a3, a2, 2
+  andi a3, a3, 0x1f
+  bnez a3, .L_not_a_flash_error
+  // Get the register number into a3 by masking off the rd field.
+  srli a3, a2, 7
+  andi a3, a3, 0x1f
+  // We already added one half word, so for a 32-bit instruction, add another.
+  addi a0, a0, OT_HALF_WORD_SIZE
+  j    .L_hardened_mepc_check
+
+.L_compressed_trap_instr:
+  // Check if its a compressed load instruction.
+  bnez a3, .L_not_a_flash_error
+  // Get the register number into a3 by masking off the rd' field and adding 8.
+  srli a3, a2, 2
+  andi a3, a3, 7
+  addi a3, a3, 8
+
+.L_hardened_mepc_check:
+  // Hardening: double-check that the retval calculation is 4 bytes or fewer
+  // from the original value of MEPC.
+  addi a1, a1, 1
+  csrr a2, mepc
+  sub  a2, a0, a2
+  bgtu a2, a1, .L_not_a_flash_error
+
+  // Now, using `rd` from the faulting instruction (in a3), load all ones into
+  // that register.
+  // RISCV register x0, aka zero.  This register is always const 0, so there
+  // is nothing to do.
+  beqz a3, .L_flash_fault_done
+
+  // All other registers load the value 0xFFFFFFFF as the faulting value.
+  li   a2, -1
+  slli a3, a3, 2
+  add  a3, a3, sp
+  sw   a2, 0(a3)
+
+.L_flash_fault_done:
+  // Exception handler exit and return to C:
+  // Load the correct MEPC for the next instruction in the current task.
+  csrw mepc, a0
+
+  // Restore all registers from the stack and restore SP to its former value.
+  lw   x1,  1 * OT_WORD_SIZE(sp)
+  lw   x2,  2 * OT_WORD_SIZE(sp)
+  lw   x3,  3 * OT_WORD_SIZE(sp)
+  lw   x4,  4 * OT_WORD_SIZE(sp)
+  lw   x5,  5 * OT_WORD_SIZE(sp)
+  lw   x6,  6 * OT_WORD_SIZE(sp)
+  lw   x7,  7 * OT_WORD_SIZE(sp)
+  lw   x8,  8 * OT_WORD_SIZE(sp)
+  lw   x9,  9 * OT_WORD_SIZE(sp)
+  lw   x10,  10 * OT_WORD_SIZE(sp)
+  lw   x11,  11 * OT_WORD_SIZE(sp)
+  lw   x12,  12 * OT_WORD_SIZE(sp)
+  lw   x13,  13 * OT_WORD_SIZE(sp)
+  lw   x14,  14 * OT_WORD_SIZE(sp)
+  lw   x15,  15 * OT_WORD_SIZE(sp)
+  lw   x16,  16 * OT_WORD_SIZE(sp)
+  lw   x17,  17 * OT_WORD_SIZE(sp)
+  lw   x18,  18 * OT_WORD_SIZE(sp)
+  lw   x19,  19 * OT_WORD_SIZE(sp)
+  lw   x20,  20 * OT_WORD_SIZE(sp)
+  lw   x21,  21 * OT_WORD_SIZE(sp)
+  lw   x22,  22 * OT_WORD_SIZE(sp)
+  lw   x23,  23 * OT_WORD_SIZE(sp)
+  lw   x24,  24 * OT_WORD_SIZE(sp)
+  lw   x25,  25 * OT_WORD_SIZE(sp)
+  lw   x26,  26 * OT_WORD_SIZE(sp)
+  lw   x27,  27 * OT_WORD_SIZE(sp)
+  lw   x28,  28 * OT_WORD_SIZE(sp)
+  lw   x29,  29 * OT_WORD_SIZE(sp)
+  lw   x30,  30 * OT_WORD_SIZE(sp)
+  lw   x31,  31 * OT_WORD_SIZE(sp)
+  csrr sp, mscratch
+  mret
+
+.L_no_flash_exceptions:
+  csrr sp, mscratch
+.L_not_a_flash_error:
+  // Since we aren't dealing with a flash error, we'll jump to the normal
+  // handler for all other exceptiosn and interrupts.  That handler emits
+  // the fault info to the UART and initiates shutdown.  No register state
+  // preservation is necessary because we're not coming back.
+  //
+  // Note: we _also_ do not restore SP - we'll restart the stack at
+  // `ram_end - 128`.  This allows us to report exceptions after jumping
+  // to the next stage if the next stage has trashed its SP register.
+  j INTERRUPT_HANDLER
+  unimp
+  .size flash_exception_handler, .-flash_exception_handler
diff --git a/sw/device/silicon_creator/lib/manifest.c b/sw/device/silicon_creator/lib/manifest.c
index 2db44474880da..a82a3a4c7c6cf 100644
--- a/sw/device/silicon_creator/lib/manifest.c
+++ b/sw/device/silicon_creator/lib/manifest.c
@@ -33,3 +33,10 @@ extern rom_error_t manifest_ext_get_spx_key(
 extern rom_error_t manifest_ext_get_spx_signature(
     const manifest_t *manifest,
     const manifest_ext_spx_signature_t **spx_signature);
+extern rom_error_t manifest_ext_get_secver_write(
+    const manifest_t *manifest,
+    const manifest_ext_secver_write_t **secver_write);
+extern rom_error_t manifest_ext_get_isfb(const manifest_t *manifest,
+                                         const manifest_ext_isfb_t **isfb);
+extern rom_error_t manifest_ext_get_isfb_erase(
+    const manifest_t *manifest, const manifest_ext_isfb_erase_t **isfb_erase);
diff --git a/sw/device/silicon_creator/lib/manifest.h b/sw/device/silicon_creator/lib/manifest.h
index cbdde804b6f2c..74757707793bb 100644
--- a/sw/device/silicon_creator/lib/manifest.h
+++ b/sw/device/silicon_creator/lib/manifest.h
@@ -5,6 +5,7 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_MANIFEST_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_MANIFEST_H_
 
+#include <limits.h>
 #include <stddef.h>
 
 #include "sw/device/lib/base/macros.h"
@@ -399,6 +400,20 @@ enum {
    */
   kManifestExtIdSpxKey = 0x94ac01ec,
   kManifestExtIdSpxSignature = 0xad77f84a,
+  kManifestExtIdSecVerWrite = 0x3f086a41,
+
+  /**
+   * ASCII "ISFB".
+   *
+   * Integration Specific Firmware Binding (ISFB) extension.
+   */
+  kManifestExtIdIsfb = 0x42465349,
+  /**
+   * ASCII "ISFE".
+   *
+   * Integration Specific Firmware Binding (ISFB) erase policy extension.
+   */
+  kManifestExtIdIsfbErase = 0x45465349,
   /**
    * ASCII "EXT0.
    */
@@ -437,6 +452,103 @@ typedef struct manifest_ext_spx_signature {
   sigverify_spx_signature_t signature;
 } manifest_ext_spx_signature_t;
 
+/**
+ * Manifest extension: Write the securty version.
+ */
+typedef struct manifest_ext_secver_write {
+  /**
+   * Required manifest header.
+   */
+  manifest_ext_header_t header;
+  /**
+   * Hardened bool indicating whether or not to write the security version to
+   * boot data.
+   */
+  uint32_t write;
+} manifest_ext_secver_write_t;
+
+/**
+ * Product expression used in the `manifest_ext_isfb_t` extension.
+ *
+ * The product expression is a 32-bit value that is compared against the product
+ * word in the ISFB info flash page. The comparison is done by applying the mask
+ * to the product word and comparing the result to the value.
+ */
+typedef struct manifest_ext_product_expr {
+  uint32_t mask;
+  uint32_t value;
+} manifest_ext_product_expr_t;
+OT_ASSERT_SIZE(manifest_ext_product_expr_t, 8);
+
+/**
+ * Manifest extension: Integration Specific Firmware Binding (ISFB).
+ *
+ * The Integration Specific Firmware Binding (ISFB) extension is used to bind
+ * firmware to certain integrator-device phases (e.g. restrict firmware to
+ * unreleased integrator devices only). The `ROM_EXT` needs to perform these
+ * constraint checks instead of the firmware because the rescure protocol
+ * bypasses any owner firmware level enforcement.
+ *
+ * This extension also provides a mechanism to enable firmware owners to perform
+ * their own rollback and upgrade automated testing. The rollback policy is
+ * implemented on top of the `strike_bits` provided in the ISFB info flash
+ * region.
+ */
+typedef struct manifest_ext_isfb {
+  /**
+   * Required manifest header.
+   */
+  manifest_ext_header_t header;
+  /**
+   * Strikeout mask.
+   *
+   * The size of this array is equal to 128 strike bits packed into uint32_t
+   * words. Each strike bit corresponds to a uint32_t word in the ISFB info
+   * flash page.
+   *
+   * For each 1-bit in the strike mask, the corresponding flash word in the ISFB
+   * info flash page must have a non-zero value.
+   */
+  uint32_t strike_mask[128 / (CHAR_BIT * sizeof(uint32_t))];
+  /**
+   * Number of product expressions that follow. Must be less than or equal to
+   * the number of `product_words` in the `owner_isfb_config_t` configuration.
+   */
+  uint32_t product_expr_count;
+  /**
+   * Product expressions. The size of this array is equal to
+   * `product_expr_count`.
+   */
+  manifest_ext_product_expr_t product_expr[];
+} manifest_ext_isfb_t;
+OT_ASSERT_MEMBER_OFFSET(manifest_ext_isfb_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(manifest_ext_isfb_t, strike_mask, 8);
+OT_ASSERT_MEMBER_OFFSET(manifest_ext_isfb_t, product_expr_count, 24);
+OT_ASSERT_MEMBER_OFFSET(manifest_ext_isfb_t, product_expr, 28);
+OT_ASSERT_SIZE(manifest_ext_isfb_t, 28);
+
+/**
+ * Manifest extension: ISFB erase policy.
+ *
+ * The ISFB erase policy extension is used to allow or disallow erasing the ISFB
+ * info flash region.
+ *
+ * This extension should be attached to the firmware's signed manifest to
+ * indicate that a firmware image may erase the ISFB info page.  This extension
+ * is required when the configuration indicates that the isfb_erase extension
+ * must be present to authorize erase operations.
+ */
+typedef struct manifest_ext_isfb_erase {
+  /**
+   * Required manifest header.
+   */
+  manifest_ext_header_t header;
+  /**
+   * Hardened bool indicating whether or not to allow erasing the ISFB region.
+   */
+  uint32_t erase_allowed;
+} manifest_ext_isfb_erase_t;
+
 /**
  * Table of manifest extensions.
  *
@@ -445,7 +557,10 @@ typedef struct manifest_ext_spx_signature {
 // clang-format off
 #define MANIFEST_EXTENSIONS(X) \
   X(0, manifest_ext_spx_key_t,       spx_key,       kManifestExtIdSpxKey,       true ) \
-  X(1, manifest_ext_spx_signature_t, spx_signature, kManifestExtIdSpxSignature, false)
+  X(1, manifest_ext_spx_signature_t, spx_signature, kManifestExtIdSpxSignature, false) \
+  X(2, manifest_ext_secver_write_t,  secver_write,  kManifestExtIdSecVerWrite,  true)  \
+  X(3, manifest_ext_isfb_t,          isfb,          kManifestExtIdIsfb,         true)  \
+  X(4, manifest_ext_isfb_erase_t,    isfb_erase,    kManifestExtIdIsfbErase,    true)
 // clang-format on
 
 #if defined(OT_PLATFORM_RV32) || defined(MANIFEST_UNIT_TEST_)
@@ -603,6 +718,10 @@ rom_error_t manifest_ext_get_spx_key(const manifest_t *manifest,
 rom_error_t manifest_ext_get_spx_signature(
     const manifest_t *manifest,
     const manifest_ext_spx_signature_t **spx_signature);
+rom_error_t manifest_ext_get_isfb(const manifest_t *manifest,
+                                  const manifest_ext_isfb_t **isfb);
+rom_error_t manifest_ext_get_isfb_erase(
+    const manifest_t *manifest, const manifest_ext_isfb_erase_t **isfb_erase);
 
 #endif  // defined(OT_PLATFORM_RV32) || defined(MANIFEST_UNIT_TEST_)
 
diff --git a/sw/device/silicon_creator/lib/manifest_def.c b/sw/device/silicon_creator/lib/manifest_def.c
index 2d22a3822850d..0f341c5a86264 100644
--- a/sw/device/silicon_creator/lib/manifest_def.c
+++ b/sw/device/silicon_creator/lib/manifest_def.c
@@ -24,8 +24,7 @@ extern char _manifest_address_translation[];
  * binary by `opentitantool` (overriding the implicitly specified initial value
  * of zero).
  */
-OT_SECTION(".manifest")
-static manifest_t kManifest_ = {
+OT_USED OT_SECTION(".manifest") static manifest_t kManifest_ = {
     .manifest_version =
         (manifest_version_t){
             .minor = kManifestVersionMinor1,
diff --git a/sw/device/silicon_creator/lib/manifest_unittest.cc b/sw/device/silicon_creator/lib/manifest_unittest.cc
index 771a01ed39a3b..02db35bf3716e 100644
--- a/sw/device/silicon_creator/lib/manifest_unittest.cc
+++ b/sw/device/silicon_creator/lib/manifest_unittest.cc
@@ -38,6 +38,16 @@ TEST_F(ManifestTest, DigestRegionGet) {
             manifest_.signed_region_end - digest_region_offset);
 }
 
+TEST_F(ManifestTest, BadMajorVersion) {
+  manifest_.manifest_version.major = kManifestVersionMajor2 + 1;
+  EXPECT_EQ(manifest_check(&manifest_), kErrorManifestBadVersionMajor);
+}
+
+TEST_F(ManifestTest, SignedRegionOutsideImage) {
+  manifest_.length = 0;
+  EXPECT_EQ(manifest_check(&manifest_), kErrorManifestBadSignedRegion);
+}
+
 TEST_F(ManifestTest, CodeRegionGet) {
   epmp_region_t code_region = manifest_code_region_get(&manifest_);
 
diff --git a/sw/device/silicon_creator/lib/mock_manifest.cc b/sw/device/silicon_creator/lib/mock_manifest.cc
index 5fa77279dc28f..4143957c25188 100644
--- a/sw/device/silicon_creator/lib/mock_manifest.cc
+++ b/sw/device/silicon_creator/lib/mock_manifest.cc
@@ -22,5 +22,22 @@ epmp_region_t manifest_code_region_get(const manifest_t *manifest) {
 uintptr_t manifest_entry_point_get(const manifest_t *manifest) {
   return MockManifest::Instance().EntryPoint(manifest);
 }
+
+rom_error_t manifest_ext_get_spx_key(const manifest_t *manifest,
+                                     const manifest_ext_spx_key_t **spx_key) {
+  return MockManifest::Instance().SpxKey(manifest, spx_key);
+}
+
+rom_error_t manifest_ext_get_spx_signature(
+    const manifest_t *manifest,
+    const manifest_ext_spx_signature_t **spx_signature) {
+  return MockManifest::Instance().SpxSignature(manifest, spx_signature);
+}
+
+rom_error_t manifest_ext_get_isfb(const manifest_t *manifest,
+                                  const manifest_ext_isfb_t **isfb) {
+  return MockManifest::Instance().Isfb(manifest, isfb);
+}
+
 }  // extern "C"
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/mock_manifest.h b/sw/device/silicon_creator/lib/mock_manifest.h
index c0744a64e25fc..643b2b5d86a74 100644
--- a/sw/device/silicon_creator/lib/mock_manifest.h
+++ b/sw/device/silicon_creator/lib/mock_manifest.h
@@ -21,6 +21,13 @@ class MockManifest : public global_mock::GlobalMock<MockManifest> {
   MOCK_METHOD(manifest_digest_region_t, DigestRegion, (const manifest_t *));
   MOCK_METHOD(epmp_region_t, CodeRegion, (const manifest_t *));
   MOCK_METHOD(uintptr_t, EntryPoint, (const manifest_t *));
+  MOCK_METHOD(rom_error_t, SpxKey,
+              (const manifest_t *, const manifest_ext_spx_key_t **spx_key));
+  MOCK_METHOD(rom_error_t, SpxSignature,
+              (const manifest_t *,
+               const manifest_ext_spx_signature_t **spx_signature));
+  MOCK_METHOD(rom_error_t, Isfb,
+              (const manifest_t *, const manifest_ext_isfb_t **isfb));
 };
 
 }  // namespace internal
diff --git a/sw/device/silicon_creator/lib/otbn_boot_services.c b/sw/device/silicon_creator/lib/otbn_boot_services.c
index 06bb5590e2472..2e97473e32fab 100644
--- a/sw/device/silicon_creator/lib/otbn_boot_services.c
+++ b/sw/device/silicon_creator/lib/otbn_boot_services.c
@@ -4,8 +4,10 @@
 
 #include "sw/device/silicon_creator/lib/otbn_boot_services.h"
 
+#include "sw/device/lib/base/memory.h"
 #include "sw/device/silicon_creator/lib/attestation.h"
 #include "sw/device/silicon_creator/lib/base/sec_mmio.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
 #include "sw/device/silicon_creator/lib/dbg_print.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
@@ -79,10 +81,11 @@ enum {
 };
 
 OT_WARN_UNUSED_RESULT
-static rom_error_t load_attestation_keygen_seed(
-    attestation_key_seed_t additional_seed, uint32_t *seed) {
+static rom_error_t load_attestation_keygen_seed(uint32_t additional_seed_idx,
+                                                uint32_t *seed) {
   // Read seed from flash info page.
-  uint32_t seed_flash_offset = 0 + (additional_seed * kAttestationSeedBytes);
+  uint32_t seed_flash_offset =
+      0 + (additional_seed_idx * kAttestationSeedBytes);
   rom_error_t err =
       flash_ctrl_info_read(&kFlashCtrlInfoPageAttestationKeySeeds,
                            seed_flash_offset, kAttestationSeedWords, seed);
@@ -92,13 +95,9 @@ static rom_error_t load_attestation_keygen_seed(
     flash_ctrl_error_code_get(&flash_ctrl_err_code);
     if (flash_ctrl_err_code.rd_err) {
       // If we encountered a read error, this means the attestation seed page
-      // has not been provisioned yet. In this case, we erase the page and
+      // has not been provisioned yet. In this case, we clear the seed and
       // continue, which will simply result in generating an invalid identity.
-      dbg_printf(
-          "Warning: Attestation key seed flash info page not provisioned. "
-          "Erasing page to format.\r\n");
-      HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(
-          &kFlashCtrlInfoPageAttestationKeySeeds, kFlashCtrlEraseTypePage));
+      memset(seed, 0, kAttestationSeedBytes);
       return kErrorOk;
     }
     return err;
@@ -110,13 +109,12 @@ static rom_error_t load_attestation_keygen_seed(
 rom_error_t otbn_boot_app_load(void) { return sc_otbn_load_app(kOtbnAppBoot); }
 
 rom_error_t otbn_boot_attestation_keygen(
-    attestation_key_seed_t additional_seed,
-    otbn_boot_attestation_key_type_t key_type,
+    uint32_t additional_seed_idx, sc_keymgr_key_type_t key_type,
     sc_keymgr_diversification_t diversification,
     ecdsa_p256_public_key_t *public_key) {
   // Trigger key manager to sideload the attestation key into OTBN.
-  HARDENED_RETURN_IF_ERROR(sc_keymgr_generate_key_otbn(
-      (sc_keymgr_key_type_t)key_type, diversification));
+  HARDENED_RETURN_IF_ERROR(
+      sc_keymgr_generate_key_otbn(key_type, diversification));
 
   // Write the mode.
   uint32_t mode = kOtbnBootModeAttestationKeygen;
@@ -125,7 +123,8 @@ rom_error_t otbn_boot_attestation_keygen(
 
   // Load the additional seed from flash info.
   uint32_t seed[kAttestationSeedWords];
-  HARDENED_RETURN_IF_ERROR(load_attestation_keygen_seed(additional_seed, seed));
+  HARDENED_RETURN_IF_ERROR(
+      load_attestation_keygen_seed(additional_seed_idx, seed));
 
   // Write the additional seed to OTBN DMEM.
   HARDENED_RETURN_IF_ERROR(sc_otbn_dmem_write(
@@ -153,13 +152,46 @@ rom_error_t otbn_boot_attestation_keygen(
   return kErrorOk;
 }
 
+/**
+ * Helper function to convert an ECC P256 public key from little to big endian
+ * in place.
+ */
+static void pubkey_le_to_be_convert(ecdsa_p256_public_key_t *pubkey) {
+  util_reverse_bytes(pubkey->x, kEcdsaP256PublicKeyCoordBytes);
+  util_reverse_bytes(pubkey->y, kEcdsaP256PublicKeyCoordBytes);
+}
+
+rom_error_t otbn_boot_cert_ecc_p256_keygen(sc_keymgr_ecc_key_t key,
+                                           hmac_digest_t *pubkey_id,
+                                           ecdsa_p256_public_key_t *pubkey) {
+  HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(key.required_keymgr_state));
+
+  // Generate / sideload key material into OTBN, and generate the ECC keypair.
+  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_keygen(
+      key.keygen_seed_idx, key.type, *key.keymgr_diversifier, pubkey));
+
+  // Keys are represented in certificates in big endian format, but the key is
+  // output from OTBN in little endian format, so we convert the key to
+  // big endian format.
+  pubkey_le_to_be_convert(pubkey);
+
+  // Generate the key ID.
+  //
+  // Note: the certificate generation functions expect the digest to be in big
+  // endian form, but the HMAC driver returns the digest in little endian, so we
+  // re-format it.
+  hmac_sha256(pubkey, sizeof(*pubkey), pubkey_id);
+  util_reverse_bytes(pubkey_id, sizeof(*pubkey_id));
+
+  return kErrorOk;
+}
+
 rom_error_t otbn_boot_attestation_key_save(
-    attestation_key_seed_t additional_seed,
-    otbn_boot_attestation_key_type_t key_type,
+    uint32_t additional_seed_idx, sc_keymgr_key_type_t key_type,
     sc_keymgr_diversification_t diversification) {
   // Trigger key manager to sideload the attestation key into OTBN.
-  HARDENED_RETURN_IF_ERROR(sc_keymgr_generate_key_otbn(
-      (sc_keymgr_key_type_t)key_type, diversification));
+  HARDENED_RETURN_IF_ERROR(
+      sc_keymgr_generate_key_otbn(key_type, diversification));
 
   // Write the mode.
   uint32_t mode = kOtbnBootModeAttestationKeySave;
@@ -168,7 +200,8 @@ rom_error_t otbn_boot_attestation_key_save(
 
   // Load the additional seed from flash info.
   uint32_t seed[kAttestationSeedWords];
-  HARDENED_RETURN_IF_ERROR(load_attestation_keygen_seed(additional_seed, seed));
+  HARDENED_RETURN_IF_ERROR(
+      load_attestation_keygen_seed(additional_seed_idx, seed));
   // Pad remaining DMEM field with zeros to prevent a DMEM integrity error
   // (since data is aligned to 256-bit words).
   uint32_t zero_buf[kOtbnAttestationSeedBufferWords - kAttestationSeedWords] = {
@@ -237,10 +270,9 @@ rom_error_t otbn_boot_attestation_endorse(const hmac_digest_t *digest,
   return kErrorOk;
 }
 
-rom_error_t otbn_boot_sigverify(const ecdsa_p256_public_key_t *key,
-                                const ecdsa_p256_signature_t *sig,
-                                const hmac_digest_t *digest,
-                                uint32_t *recovered_r) {
+rom_error_t otbn_boot_sigverify_start(const ecdsa_p256_public_key_t *key,
+                                      const ecdsa_p256_signature_t *sig,
+                                      const hmac_digest_t *digest) {
   // Write the mode.
   uint32_t mode = kOtbnBootModeSigverify;
   HARDENED_RETURN_IF_ERROR(
@@ -263,9 +295,12 @@ rom_error_t otbn_boot_sigverify(const ecdsa_p256_public_key_t *key,
                                               sig->s, kOtbnVarBootS));
 
   // Start the OTBN routine.
-  HARDENED_RETURN_IF_ERROR(sc_otbn_execute());
   SEC_MMIO_WRITE_INCREMENT(kScOtbnSecMmioExecute);
+  return sc_otbn_execute_start();
+}
 
+rom_error_t otbn_boot_sigverify_finish(uint32_t *recovered_r) {
+  HARDENED_RETURN_IF_ERROR(sc_otbn_execute_finish());
   // Check if the signature passed basic checks.
   uint32_t ok;
   HARDENED_RETURN_IF_ERROR(sc_otbn_dmem_read(1, kOtbnVarBootOk, &ok));
@@ -283,3 +318,11 @@ rom_error_t otbn_boot_sigverify(const ecdsa_p256_public_key_t *key,
   return sc_otbn_dmem_read(kEcdsaP256SignatureComponentWords, kOtbnVarBootXr,
                            recovered_r);
 }
+
+rom_error_t otbn_boot_sigverify(const ecdsa_p256_public_key_t *key,
+                                const ecdsa_p256_signature_t *sig,
+                                const hmac_digest_t *digest,
+                                uint32_t *recovered_r) {
+  HARDENED_RETURN_IF_ERROR(otbn_boot_sigverify_start(key, sig, digest));
+  return otbn_boot_sigverify_finish(recovered_r);
+}
diff --git a/sw/device/silicon_creator/lib/otbn_boot_services.h b/sw/device/silicon_creator/lib/otbn_boot_services.h
index adc9cf6ff6d0b..df9620953c457 100644
--- a/sw/device/silicon_creator/lib/otbn_boot_services.h
+++ b/sw/device/silicon_creator/lib/otbn_boot_services.h
@@ -31,15 +31,15 @@ OT_WARN_UNUSED_RESULT
 rom_error_t otbn_boot_app_load(void);
 
 /**
- * OTBN attestation key types (DICE or TPM).
- */
-typedef enum otbn_boot_attestation_key_type {
-  kOtbnBootAttestationKeyTypeDice = kScKeymgrKeyTypeAttestation,
-  kOtbnBootAttestationKeyTypeTpm = kScKeymgrKeyTypeSealing,
-} otbn_boot_attestation_key_type_t;
-
-/**
- * Generate an attestation public key from a keymgr-derived secret.
+ * Generate a deterministic ECC P256 attestation public key from a
+ * keymgr-derived secret.
+ *
+ * This routine may be used to generate DICE attestation keys, TPM identity
+ * keys, or any other deterministic asymmetric ECC P256 keys required. DICE keys
+ * should be contructed from the "attestation" keymgr key type, while TPM keys
+ * should be constructed form the "sealing" key type. The former are bound to
+ * firmware updates, and change when ROM_EXT or Owner firmware is updated. The
+ * latter remain stable across the lifetime of an ownership of the chip.
  *
  * This routine triggers the key manager to sideload key material into OTBN,
  * and also loads in an extra seed to XOR with the key material. The final
@@ -55,21 +55,38 @@ typedef enum otbn_boot_attestation_key_type {
  * Expects the OTBN boot-services program to already be loaded; see
  * `otbn_boot_app_load`.
  *
- * @param additional_seed The attestation key generation seed to load.
- * @param key_type OTBN attestation key type to generate. "DICE" attestation
- *                 keys are based on "attestation" keys from the keymgr; "TPM"
- *                 attestation keys are based on "sealing keys from the keymgr.
+ * @param additional_seed_idx The attestation key generation seed index to load.
+ *                            The index corresponds to the seed offset in flash
+ *                            info page `kFlashCtrlInfoPageAttestationKeySeeds`.
+ * @param key_type Keymgr key type to generate, attestation or sealing.
  * @param diversification Salt and version information for key manager.
  * @param[out] public_key Attestation public key.
  * @return The result of the operation.
  */
 OT_WARN_UNUSED_RESULT
 rom_error_t otbn_boot_attestation_keygen(
-    attestation_key_seed_t additional_seed,
-    otbn_boot_attestation_key_type_t key_type,
+    uint32_t additional_seed_idx, sc_keymgr_key_type_t key_type,
     sc_keymgr_diversification_t diversification,
     ecdsa_p256_public_key_t *public_key);
 
+/**
+ * Wrapper for `otbn_boot_attestation_keygen()` that generates an ECC P256
+ * keypair to build a certificate around, using Keymgr and OTBN, returning the
+ * public key (in big endian order for inserting into a cert) and a key ID
+ * (which is a SHA256 digest of the public key).
+ *
+ * Preconditions: keymgr has been initialized and cranked to the desired stage.
+ *
+ * @param key The description of the desired key to generate.
+ * @param[out] pubkey_id The public key ID (for embedding into certificates).
+ * @param[out] pubkey The public key.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t otbn_boot_cert_ecc_p256_keygen(sc_keymgr_ecc_key_t key,
+                                           hmac_digest_t *pubkey_id,
+                                           ecdsa_p256_public_key_t *pubkey);
+
 /**
  * Saves an attestation private key to OTBN's scratchpad.
  *
@@ -89,8 +106,7 @@ rom_error_t otbn_boot_attestation_keygen(
  */
 OT_WARN_UNUSED_RESULT
 rom_error_t otbn_boot_attestation_key_save(
-    attestation_key_seed_t additional_seed,
-    otbn_boot_attestation_key_type_t key_type,
+    uint32_t additional_seed, sc_keymgr_key_type_t key_type,
     sc_keymgr_diversification_t diversification);
 
 /**
@@ -153,6 +169,34 @@ rom_error_t otbn_boot_sigverify(const ecdsa_p256_public_key_t *key,
                                 const hmac_digest_t *digest,
                                 uint32_t *recovered_r);
 
+/**
+ * Start an ECDSA-P256 signature verify on OTBN.
+ *
+ * Expects the OTBN boot-services program to already be loaded; see
+ * `otbn_boot_app_load`.
+ *
+ * @param key An ECDSA-P256 public key.
+ * @param sig An ECDSA-P256 signature.
+ * @param digest Message digest to check against.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t otbn_boot_sigverify_start(const ecdsa_p256_public_key_t *key,
+                                      const ecdsa_p256_signature_t *sig,
+                                      const hmac_digest_t *digest);
+
+/**
+ * Finish an ECDSA-P256 signature verify on OTBN.
+ *
+ * Call after the `start` operation to wait for completion and collect the
+ * result.
+ *
+ * @param[out] recovered_r Buffer for the recovered `r` value.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t otbn_boot_sigverify_finish(uint32_t *recovered_r);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/silicon_creator/lib/otbn_boot_services_functest.c b/sw/device/silicon_creator/lib/otbn_boot_services_functest.c
index e149f5b39455f..f2b8601455e0a 100644
--- a/sw/device/silicon_creator/lib/otbn_boot_services_functest.c
+++ b/sw/device/silicon_creator/lib/otbn_boot_services_functest.c
@@ -8,6 +8,7 @@
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/otbn_boot_services.h"
@@ -20,6 +21,9 @@ OTTF_DEFINE_TEST_CONFIG();
 // Keymgr handle for this test.
 static dif_keymgr_t keymgr;
 
+// Global variable holding the number of times we advanced keymgr after startup.
+size_t num_keymgr_advances = 0;
+
 // Message value for signature generation/verification tests.
 const char kTestMessage[] = "Test message.";
 const size_t kTestMessageLen = sizeof(kTestMessage) - 1;
@@ -70,23 +74,36 @@ rom_error_t sigverify_test(void) {
   return kErrorOk;
 }
 
+rom_error_t sigverify_with_bad_signature_test(void) {
+  // Hash the test message.
+  hmac_digest_t digest;
+  hmac_sha256(kTestMessage, kTestMessageLen, &digest);
+
+  uint32_t recovered_r[kEcdsaP256SignatureComponentWords];
+  ecdsa_p256_public_key_t kCorruptedKey = kEcdsaKey;
+  kCorruptedKey.x[0]++;
+  CHECK(otbn_boot_sigverify(&kCorruptedKey, &kEcdsaSignature, &digest,
+                            recovered_r) == kErrorSigverifyBadEcdsaSignature);
+  return kErrorOk;
+}
+
 rom_error_t attestation_keygen_test(void) {
   // Check that key generations with different seeds result in different keys.
   ecdsa_p256_public_key_t pk_uds;
-  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kUdsAttestationKeySeed,
-                                               kOtbnBootAttestationKeyTypeDice,
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldUdsKeySeedIdx,
+                                               kScKeymgrKeyTypeAttestation,
                                                kDiversification, &pk_uds));
   ecdsa_p256_public_key_t pk_cdi0;
-  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kCdi0AttestationKeySeed,
-                                               kOtbnBootAttestationKeyTypeDice,
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldCdi0KeySeedIdx,
+                                               kScKeymgrKeyTypeAttestation,
                                                kDiversification, &pk_cdi0));
   ecdsa_p256_public_key_t pk_cdi1;
-  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kCdi1AttestationKeySeed,
-                                               kOtbnBootAttestationKeyTypeDice,
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldCdi1KeySeedIdx,
+                                               kScKeymgrKeyTypeAttestation,
                                                kDiversification, &pk_cdi1));
   ecdsa_p256_public_key_t pk_tpm_ek;
-  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kTpmEkAttestationKeySeed,
-                                               kOtbnBootAttestationKeyTypeTpm,
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldTpmEkKeySeedIdx,
+                                               kScKeymgrKeyTypeSealing,
                                                kDiversification, &pk_tpm_ek));
   CHECK_ARRAYS_NE((unsigned char *)&pk_uds, (unsigned char *)&pk_cdi0,
                   sizeof(pk_uds));
@@ -100,8 +117,8 @@ rom_error_t attestation_keygen_test(void) {
   // Check that running the same key generation twice results in the same key.
   ecdsa_p256_public_key_t pk_uds_again;
   RETURN_IF_ERROR(otbn_boot_attestation_keygen(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice, kDiversification,
-      &pk_uds_again));
+      kFlashInfoFieldUdsKeySeedIdx, kScKeymgrKeyTypeAttestation,
+      kDiversification, &pk_uds_again));
   CHECK_ARRAYS_EQ((unsigned char *)&pk_uds_again, (unsigned char *)&pk_uds,
                   sizeof(pk_uds));
 
@@ -113,7 +130,7 @@ rom_error_t attestation_keygen_test(void) {
   diversification_modified.salt[0] ^= 1;
   ecdsa_p256_public_key_t pk_uds_div;
   RETURN_IF_ERROR(otbn_boot_attestation_keygen(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
+      kFlashInfoFieldUdsKeySeedIdx, kScKeymgrKeyTypeAttestation,
       diversification_modified, &pk_uds_div));
   CHECK_ARRAYS_NE((unsigned char *)&pk_uds_div, (unsigned char *)&pk_uds,
                   sizeof(pk_uds));
@@ -123,17 +140,27 @@ rom_error_t attestation_keygen_test(void) {
 rom_error_t attestation_advance_and_endorse_test(void) {
   // Generate and save the a keypair.
   ecdsa_p256_public_key_t pk;
-  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kUdsAttestationKeySeed,
-                                               kOtbnBootAttestationKeyTypeDice,
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldUdsKeySeedIdx,
+                                               kScKeymgrKeyTypeAttestation,
                                                kDiversification, &pk));
-  RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kDiversification));
+  RETURN_IF_ERROR(otbn_boot_attestation_key_save(kFlashInfoFieldUdsKeySeedIdx,
+                                                 kScKeymgrKeyTypeAttestation,
+                                                 kDiversification));
 
   // Advance keymgr to the next stage.
-  CHECK_STATUS_OK(
-      keymgr_testutils_check_state(&keymgr, kDifKeymgrStateCreatorRootKey));
-  CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
+  if (num_keymgr_advances == 0) {
+    CHECK_STATUS_OK(
+        keymgr_testutils_check_state(&keymgr, kDifKeymgrStateCreatorRootKey));
+    CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
+    num_keymgr_advances++;
+  } else {
+    CHECK(num_keymgr_advances == 1);
+    CHECK_STATUS_OK(keymgr_testutils_check_state(
+        &keymgr, kDifKeymgrStateOwnerIntermediateKey));
+    CHECK_STATUS_OK(
+        keymgr_testutils_advance_state(&keymgr, &kOwnerRootKeyParams));
+    num_keymgr_advances++;
+  }
 
   // Run endorsement (should overwrite the key with randomness when done).
   hmac_digest_t digest;
@@ -154,28 +181,37 @@ rom_error_t attestation_advance_and_endorse_test(void) {
   RETURN_IF_ERROR(otbn_boot_sigverify(&pk, &sig, &digest, recovered_r));
   CHECK_ARRAYS_NE(recovered_r, sig.r, ARRAYSIZE(sig.r));
 
+  // Check that generating a new key with the same diversification as before
+  // now gets a different public key because keymgr has advanced.
+  ecdsa_p256_public_key_t pk_adv;
+  RETURN_IF_ERROR(otbn_boot_attestation_keygen(kFlashInfoFieldUdsKeySeedIdx,
+                                               kScKeymgrKeyTypeAttestation,
+                                               kDiversification, &pk_adv));
+  CHECK_ARRAYS_NE((unsigned char *)&pk, (unsigned char *)&pk_adv, sizeof(pk));
+
   return kErrorOk;
 }
 
 // N.B. This test will lock OTBN, so it needs to be the last test that runs.
 rom_error_t attestation_save_clear_key_test(void) {
   // Save and then clear a private key.
-  RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kDiversification));
+  RETURN_IF_ERROR(otbn_boot_attestation_key_save(kFlashInfoFieldUdsKeySeedIdx,
+                                                 kScKeymgrKeyTypeAttestation,
+                                                 kDiversification));
   RETURN_IF_ERROR(otbn_boot_attestation_key_clear());
 
   // Save the private key again and check that endorsing succeeds.
-  RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kDiversification));
+  RETURN_IF_ERROR(otbn_boot_attestation_key_save(kFlashInfoFieldUdsKeySeedIdx,
+                                                 kScKeymgrKeyTypeAttestation,
+                                                 kDiversification));
   hmac_digest_t digest;
   hmac_sha256(kTestMessage, kTestMessageLen, &digest);
   ecdsa_p256_signature_t sig;
   RETURN_IF_ERROR(otbn_boot_attestation_endorse(&digest, &sig));
 
   // Clear the key and check that endorsing now fails (it should even lock
-  // OTBN).
+  // OTBN). We cannot recover from the fatal alert so must ignore it.
+  CHECK_STATUS_OK(ottf_alerts_ignore_alert(kTopEarlgreyAlertIdOtbnFatal));
   RETURN_IF_ERROR(otbn_boot_attestation_key_clear());
   hmac_sha256(kTestMessage, kTestMessageLen, &digest);
   CHECK(otbn_boot_attestation_endorse(&digest, &sig) ==
@@ -229,6 +265,9 @@ bool test_main(void) {
   CHECK(otbn_boot_app_load() == kErrorOk);
 
   EXECUTE_TEST(result, sigverify_test);
+  EXECUTE_TEST(result, sigverify_with_bad_signature_test);
+  EXECUTE_TEST(result, attestation_keygen_test);
+  EXECUTE_TEST(result, attestation_advance_and_endorse_test);
   EXECUTE_TEST(result, attestation_keygen_test);
   EXECUTE_TEST(result, attestation_advance_and_endorse_test);
   EXECUTE_TEST(result, attestation_save_clear_key_test);
diff --git a/sw/device/silicon_creator/lib/ownership/BUILD b/sw/device/silicon_creator/lib/ownership/BUILD
index 51ff6084305a7..c50b2ff53bc95 100644
--- a/sw/device/silicon_creator/lib/ownership/BUILD
+++ b/sw/device/silicon_creator/lib/ownership/BUILD
@@ -2,14 +2,19 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load(
+    "//rules:cross_platform.bzl",
+    "dual_cc_library",
+    "dual_inputs",
+)
 load(
     "//rules/opentitan:defs.bzl",
+    "EARLGREY_TEST_ENVS",
     "opentitan_test",
 )
 load(
-    "//rules:cross_platform.bzl",
-    "dual_cc_library",
-    "dual_inputs",
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "TEST_OWNER_CONFIGS",
 )
 
 package(default_visibility = ["//visibility:public"])
@@ -19,47 +24,43 @@ cc_library(
     hdrs = ["datatypes.h"],
     deps = [
         "//sw/device/lib/base:bitfield",
+        "//sw/device/silicon_creator/lib:nonce",
         "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_key",
         "//sw/device/silicon_creator/lib/sigverify:spx_key",
     ],
 )
 
 cc_library(
-    name = "ecdsa",
-    srcs = ["ecdsa.c"],
-    hdrs = ["ecdsa.h"],
-    defines = [
-        "USE_OTBN=1",
-        #"USE_CRYPTOC=1",
-    ],
+    name = "isfb",
+    srcs = ["isfb.c"],
+    hdrs = ["isfb.h"],
     deps = [
         ":datatypes",
+        ":owner_block",
         "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:hardened_memory",
         "//sw/device/lib/base:macros",
         "//sw/device/silicon_creator/lib:error",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib:otbn_boot_services",
-        #"//sw/vendor:cryptoc",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:rnd",
     ],
 )
 
-opentitan_test(
-    name = "ecdsa_functest",
-    srcs = ["ecdsa_functest.c"],
-    exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
-    },
+cc_test(
+    name = "isfb_unittest",
+    srcs = [
+        "isfb_unittest.cc",
+    ],
     deps = [
-        ":ecdsa",
+        ":datatypes",
+        ":isfb",
+        ":owner_block",
         "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:status",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:entropy_testutils",
-        "//sw/device/lib/testing:hexstr",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-        "//sw/device/silicon_creator/lib/ownership/keys/fake",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/testing:rom_test",
+        "@googletest//:gtest_main",
     ],
 )
 
@@ -75,10 +76,14 @@ dual_cc_library(
     ),
     deps = dual_inputs(
         device = [
-            ":ecdsa",
+            ":owner_verify",
+            "//sw/device/lib/arch:device",
+            "//sw/device/lib/base:memory",
             "//sw/device/lib/base:hardened_memory",
+            "//sw/device/silicon_creator/lib/drivers:rnd",
             "//sw/device/silicon_creator/lib/drivers:keymgr",
             "//sw/device/silicon_creator/lib/drivers:kmac",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
         ],
         host = [
             "//sw/device/lib/base:global_mock",
@@ -88,6 +93,7 @@ dual_cc_library(
         shared = [
             ":datatypes",
             "//sw/device/lib/base:hardened",
+            "//sw/device/silicon_creator/lib/drivers:hmac",
             "//sw/device/silicon_creator/lib:error",
         ],
     ),
@@ -99,9 +105,34 @@ cc_library(
     hdrs = ["ownership.h"],
     deps = [
         ":datatypes",
-        ":ecdsa",
+        ":owner_block",
+        ":ownership_activate",
         ":ownership_key",
+        "//sw/device/lib/base:hardened_memory",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib/base:sec_mmio",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/drivers:rnd",
+    ],
+)
+
+cc_test(
+    name = "ownership_unittest",
+    srcs = [
+        "ownership_unittest.cc",
+    ],
+    deps = [
+        ":datatypes",
+        ":ownership",
+        ":ownership_key",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_header",
+        "//sw/device/silicon_creator/testing:rom_test",
+        "@googletest//:gtest_main",
     ],
 )
 
@@ -111,10 +142,16 @@ cc_library(
     hdrs = ["owner_block.h"],
     deps = [
         ":datatypes",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:bitfield",
         "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:hardened_memory",
         "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib/base:chip",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:pinmux",
+        "//sw/device/silicon_creator/lib/drivers:rnd",
     ],
 )
 
@@ -141,7 +178,7 @@ cc_library(
     hdrs = ["ownership_unlock.h"],
     deps = [
         ":datatypes",
-        ":ownership",
+        ":owner_block",
         ":ownership_key",
         "//sw/device/lib/base:memory",
         "//sw/device/silicon_creator/lib:boot_data",
@@ -149,6 +186,8 @@ cc_library(
         "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
         "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/sigverify:flash_exec",
     ],
 )
 
@@ -164,7 +203,122 @@ cc_test(
         "//sw/device/lib/base:hardened",
         "//sw/device/silicon_creator/lib:boot_data",
         "//sw/device/silicon_creator/lib/boot_svc:boot_svc_header",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/drivers:rnd",
+        "//sw/device/silicon_creator/lib/sigverify:flash_exec",
         "//sw/device/silicon_creator/testing:rom_test",
         "@googletest//:gtest_main",
     ],
 )
+
+cc_library(
+    name = "ownership_activate",
+    srcs = ["ownership_activate.c"],
+    hdrs = ["ownership_activate.h"],
+    deps = [
+        ":datatypes",
+        ":owner_block",
+        ":ownership_key",
+        "//sw/device/lib/base:memory",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/sigverify:flash_exec",
+    ],
+)
+
+cc_test(
+    name = "ownership_activate_unittest",
+    srcs = [
+        "ownership_activate_unittest.cc",
+    ],
+    deps = [
+        ":datatypes",
+        ":ownership_activate",
+        ":ownership_key",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_header",
+        "//sw/device/silicon_creator/lib/sigverify:flash_exec",
+        "//sw/device/silicon_creator/testing:rom_test",
+        "@googletest//:gtest_main",
+    ],
+)
+
+cc_library(
+    name = "test_owner",
+    testonly = True,
+    srcs = ["test_owner.c"],
+    deps = [
+        ":datatypes",
+        ":owner_block",
+        ":ownership",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:includes",
+        "//sw/device/silicon_creator/lib/rescue",
+    ],
+    alwayslink = True,
+)
+
+[
+    cc_library(
+        name = "test_owner_{}".format(name),
+        testonly = True,
+        srcs = ["test_owner.c"],
+        defines = param["owner_defines"],
+        deps = [
+            ":datatypes",
+            ":owner_block",
+            ":ownership",
+            "//sw/device/silicon_creator/lib:boot_data",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:includes",
+            "//sw/device/silicon_creator/lib/rescue",
+        ],
+        alwayslink = True,
+    )
+    for name, param in TEST_OWNER_CONFIGS.items()
+]
+
+dual_cc_library(
+    name = "owner_verify",
+    srcs = dual_inputs(
+        device = ["owner_verify.c"],
+        host = ["mock_owner_verify.cc"],
+    ),
+    hdrs = dual_inputs(
+        host = ["mock_owner_verify.h"],
+        shared = ["owner_verify.h"],
+    ),
+    deps = dual_inputs(
+        device = [
+            "//sw/device/silicon_creator/lib/sigverify",
+        ],
+        host = [
+            "//sw/device/lib/base:global_mock",
+            "//sw/device/silicon_creator/testing:rom_test",
+            "@googletest//:gtest",
+        ],
+        shared = [
+            ":datatypes",
+            "//sw/device/silicon_creator/lib/base:util",
+            "//sw/device/silicon_creator/lib/drivers:hmac",
+            "//sw/device/silicon_creator/lib:error",
+        ],
+    ),
+)
+
+opentitan_test(
+    name = "owner_verify_functest",
+    srcs = ["owner_verify_functest.c"],
+    exec_env = EARLGREY_TEST_ENVS,
+    deps = [
+        ":owner_verify",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
diff --git a/sw/device/silicon_creator/lib/ownership/datatypes.h b/sw/device/silicon_creator/lib/ownership/datatypes.h
index f30e49352262b..622298785f7c2 100644
--- a/sw/device/silicon_creator/lib/ownership/datatypes.h
+++ b/sw/device/silicon_creator/lib/ownership/datatypes.h
@@ -9,53 +9,114 @@
 
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/nonce.h"
 #include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
-#include "sw/device/silicon_creator/lib/sigverify/rsa_key.h"
 #include "sw/device/silicon_creator/lib/sigverify/spx_key.h"
 
 #ifdef __cplusplus
 extern "C" {
 #endif  // __cplusplus
 
+typedef struct hybrid_key {
+  ecdsa_p256_public_key_t ecdsa;
+  sigverify_spx_key_t spx;
+} hybrid_key_t;
+
 /**
  * An owner_key can be either a ECDSA P256 or SPX+ key.  The type of the key
  * material will be determined by a separate field on the owner block
  */
-typedef struct owner_key {
-  uint32_t key[16];
-} owner_key_t;
+typedef union owner_key_data {
+  /** ECDSA P256 public key */
+  ecdsa_p256_public_key_t ecdsa;
+  /** SPHINCS+ public key */
+  sigverify_spx_key_t spx;
+  /** Hybrid ECDSA & SPHINCS+ public key */
+  hybrid_key_t hybrid;
+  /** Enough space to hold an ECDSA key and a SPX+ key for hybrid schemes */
+  uint32_t raw[16 + 8];
+  /** A key ID is the first 32-bit word of the key data */
+  uint32_t id;
+} owner_keydata_t;
 
 /**
  * An owner_signature is an ECDSA P256 signature.
  */
-typedef struct owner_signature {
-  uint32_t signature[16];
+typedef union owner_signature {
+  /** ECDSA P256 signature key */
+  ecdsa_p256_signature_t ecdsa;
+  uint32_t raw[16];
 } owner_signature_t;
 
 typedef enum ownership_state {
   /* Locked Owner: `OWND`. */
   kOwnershipStateLockedOwner = 0x444e574f,
-  /* Locked Update: `LUPD`. */
-  kOwnershipStateLockedUpdate = 0x4450554c,
+  /* Locked Update: `USLF`. */
+  kOwnershipStateUnlockedSelf = 0x464c5355,
   /* Unlocked Any: `UANY`. */
   kOwnershipStateUnlockedAny = 0x594e4155,
   /* Unlocked Endorsed: `UEND`. */
   kOwnershipStateUnlockedEndorsed = 0x444e4555,
   /* Locked None: any bit pattern not listed above. */
-  kOwnershipStateLockedNone = 0,
+  kOwnershipStateRecovery = 0,
 } ownership_state_t;
 
 typedef enum ownership_key_alg {
-  /** Key algorithm RSA: `RSA3` */
-  kOwnershipKeyAlgRsa = 0x33415352,
   /** Key algorithm ECDSA P-256: `P256` */
   kOwnershipKeyAlgEcdsaP256 = 0x36353250,
-  /** Key algorithm SPX+: `SPX+` */
-  kOwnershipKeyAlgSpx = 0x2b585053,
-  /** Key algorithm SPX+q20: `Sq20` */
-  kOwnershipKeyAlgSpxq20 = 0x30327153,
+  /** Key algorithm SPX+ Pure: `S+Pu` */
+  kOwnershipKeyAlgSpxPure = 0x75502b53,
+  /** Key algorithm SPX+ Prehashed SHA256: `S+S2` */
+  kOwnershipKeyAlgSpxPrehash = 0x32532b53,
+  /** Key algorithm Hybrid P256 & SPX+ Pure: `H+Pu` */
+  kOwnershipKeyAlgHybridSpxPure = 0x75502b48,
+  /** Key algorithm Hybrid P256 & SPX+ Prehashed SHA256: `H+S2` */
+  kOwnershipKeyAlgHybridSpxPrehash = 0x32532b48,
+
+  // Tentative identifiers for SPHINCS+ q20 variants (not yet supported):
+  // Key algorithm SPX+ Pure: `SqPu`
+  kOwnershipKeyAlgSq20Pure = 0x75507153,
+  // Key algorithm SPX+ Prehashed SHA256: `SqS2`
+  kOwnershipKeyAlgSq20Prehash = 0x32537153,
+  // Key algorithm Hybrid P256 & SPX+ Pure: `HqPu`
+  kOwnershipKeyAlgHybridSq20Pure = 0x75507148,
+  // Key algorithm Hybrid P256 & SPX+ Prehashed SHA256: `HqS2`
+  kOwnershipKeyAlgHybridSq20Prehash = 0x32537148,
+
+  /** Key algorithm category mask */
+  kOwnershipKeyAlgCategoryMask = 0xFF,
+  /** Key algorithm category for ECDSA: `P...` */
+  kOwnershipKeyAlgCategoryEcdsa = 0x50,
+  /** Key algorithm category for Sphincs+: `S...` */
+  kOwnershipKeyAlgCategorySpx = 0x53,
+  /** Key algorithm category for Hybrid: `H...` */
+  kOwnershipKeyAlgCategoryHybrid = 0x48,
 } ownership_key_alg_t;
 
+typedef enum ownership_update_mode {
+  /** Update mode open: `OPEN` (unlock key has full power) */
+  kOwnershipUpdateModeOpen = 0x4e45504f,
+  /** Update mode self: `SELF` (unlock key only unlocks to UnlockedSelf) */
+  kOwnershipUpdateModeSelf = 0x464c4553,
+  /**
+   * Update mode NewVersion: `NEWV`
+   * (unlock key can't unlock; accept new owner configs from self-same owner
+   * if the config_version is newer)
+   */
+  kOwnershipUpdateModeNewVersion = 0x5657454e,
+  /**
+   * Update mode SelfVersion: `SELV`
+   * (unlock key only unlocks to UnlockedSelf; accept new owner configs from
+   * self-same owner if the config_version is newer)
+   */
+  kOwnershipUpdateModeSelfVersion = 0x564c4553,
+} ownership_update_mode_t;
+
+typedef enum lock_constraint {
+  /** No locking constraint: `~~~~`. */
+  kLockConstraintNone = 0x7e7e7e7e,
+} lock_constraint_t;
+
 typedef enum tlv_tag {
   /** Owner struct: `OWNR`. */
   kTlvTagOwner = 0x524e574f,
@@ -67,13 +128,23 @@ typedef enum tlv_tag {
   kTlvTagInfoConfig = 0x4f464e49,
   /** Rescue Configuration: `RESQ`. */
   kTlvTagRescueConfig = 0x51534552,
+  /** Integration Specific Firmware Binding: `ISFB`. */
+  kTlvTagIntegrationSpecificFirmwareBinding = 0x42465349,
+  /** Detached Signature: `SIGN`. */
+  kTlvTagDetachedSignature = 0x4e474953,
   /** Not Present: `ZZZZ`. */
   kTlvTagNotPresent = 0x5a5a5a5a,
 } tlv_tag_t;
 
+typedef struct struct_version {
+  uint8_t major;
+  uint8_t minor;
+} struct_version_t;
+
 typedef struct tlv_header {
   uint32_t tag;
-  uint32_t length;
+  uint16_t length;
+  struct_version_t version;
 } tlv_header_t;
 
 typedef enum owner_sram_exec_mode {
@@ -93,24 +164,35 @@ typedef struct owner_block {
    * Header identifying this struct.
    * tag: `OWNR`.
    * length: 2048.
+   * version: 0
    */
   tlv_header_t header;
-  /** Version of the owner struct.  Currently `0`. */
-  uint32_t version;
+  /** Configuraion version (monotonically increasing per owner) */
+  uint32_t config_version;
   /** SRAM execution configuration (DisabledLocked, Disabled, Enabled). */
   uint32_t sram_exec_mode;
   /** Ownership key algorithm (currently, only ECDSA is supported). */
   uint32_t ownership_key_alg;
+  /** Ownership update mode (one of OPEN, SELF, NEWV) */
+  uint32_t update_mode;
+  /** Set the minimum security version to this value (UINT32_MAX: no change) */
+  uint32_t min_security_version_bl0;
+  /** The device ID locking constraint */
+  uint32_t lock_constraint;
+  /** The device ID to which this config applies */
+  uint32_t device_id[8];
+  /** Perform ROM_EXT boot services after wakeup (hardened_bool_t). */
+  uint32_t boot_svc_after_wakeup;
   /** Reserved space for future use. */
-  uint32_t reserved[3];
+  uint32_t reserved[15];
   /** Owner public key. */
-  owner_key_t owner_key;
+  owner_keydata_t owner_key;
   /** Owner's Activate public key. */
-  owner_key_t activate_key;
+  owner_keydata_t activate_key;
   /** Owner's Unlock public key. */
-  owner_key_t unlock_key;
+  owner_keydata_t unlock_key;
   /** Data region to hold the other configuration structs. */
-  uint8_t data[1728];
+  uint8_t data[1536];
   /** Signature over the owner block with the Owner private key. */
   owner_signature_t signature;
   /** A sealing value to seal the owner block to a specific chip. */
@@ -118,14 +200,19 @@ typedef struct owner_block {
 } owner_block_t;
 
 OT_ASSERT_MEMBER_OFFSET(owner_block_t, header, 0);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, version, 8);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, config_version, 8);
 OT_ASSERT_MEMBER_OFFSET(owner_block_t, sram_exec_mode, 12);
 OT_ASSERT_MEMBER_OFFSET(owner_block_t, ownership_key_alg, 16);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, reserved, 20);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, owner_key, 32);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, activate_key, 96);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, unlock_key, 160);
-OT_ASSERT_MEMBER_OFFSET(owner_block_t, data, 224);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, update_mode, 20);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, min_security_version_bl0, 24);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, lock_constraint, 28);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, device_id, 32);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, boot_svc_after_wakeup, 64);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, reserved, 68);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, owner_key, 128);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, activate_key, 224);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, unlock_key, 320);
+OT_ASSERT_MEMBER_OFFSET(owner_block_t, data, 416);
 OT_ASSERT_MEMBER_OFFSET(owner_block_t, signature, 1952);
 OT_ASSERT_MEMBER_OFFSET(owner_block_t, seal, 2016);
 OT_ASSERT_SIZE(owner_block_t, 2048);
@@ -155,23 +242,23 @@ typedef struct owner_application_key {
   tlv_header_t header;
   /** Key algorithm.  One of ECDSA, SPX+ or SPXq20. */
   uint32_t key_alg;
-  /** Key domain.  Recognized values: PROD, DEV, TEST */
-  uint32_t key_domain;
-  /** Key diversifier.
-   *
-   * This value is concatenated to key_domain to create an 8 word
-   * diversification constant to be programmed into the keymgr.
-   */
-  uint32_t key_diversifier[7];
+  union {
+    struct {
+      /** Key domain.  Recognized values: PROD, DEV, TEST */
+      uint32_t key_domain;
+      /** Key diversifier.
+       *
+       * This value is concatenated to key_domain to create an 8 word
+       * diversification constant to be programmed into the keymgr.
+       */
+      uint32_t key_diversifier[7];
+    };
+    uint32_t raw_diversifier[8];
+  };
   /** Usage constraint must match manifest header's constraint */
   uint32_t usage_constraint;
   /** Key material.  Varies by algorithm type. */
-  union {
-    uint32_t id;
-    sigverify_rsa_key_t rsa;
-    sigverify_spx_key_t spx;
-    ecdsa_p256_public_key_t ecdsa;
-  } data;
+  owner_keydata_t data;
 } owner_application_key_t;
 
 OT_ASSERT_MEMBER_OFFSET(owner_application_key_t, header, 0);
@@ -180,7 +267,16 @@ OT_ASSERT_MEMBER_OFFSET(owner_application_key_t, key_domain, 12);
 OT_ASSERT_MEMBER_OFFSET(owner_application_key_t, key_diversifier, 16);
 OT_ASSERT_MEMBER_OFFSET(owner_application_key_t, usage_constraint, 44);
 OT_ASSERT_MEMBER_OFFSET(owner_application_key_t, data, 48);
-OT_ASSERT_SIZE(owner_application_key_t, 464);
+OT_ASSERT_SIZE(owner_application_key_t, 144);
+
+enum {
+  kTlvLenApplicationKeySpx =
+      offsetof(owner_application_key_t, data) + sizeof(sigverify_spx_key_t),
+  kTlvLenApplicationKeyEcdsa =
+      offsetof(owner_application_key_t, data) + sizeof(ecdsa_p256_public_key_t),
+  kTlvLenApplicationKeyHybrid =
+      offsetof(owner_application_key_t, data) + sizeof(hybrid_key_t),
+};
 
 // clang-format off
 /**
@@ -200,6 +296,11 @@ OT_ASSERT_SIZE(owner_application_key_t, 464);
 #define FLASH_CONFIG_HIGH_ENDURANCE       ((bitfield_field32_t) { .mask = 0xF, .index = 8 })
 // clang-format on
 
+/**
+ * The maximum number of owner_flash_region_t allower per slot.
+ */
+#define FLASH_CONFIG_REGIONS_PER_SLOT 3
+
 /**
  * The owner flash region describes a region of flash and its configuration
  * properties (ie: ECC, Scrambling, High Endurance, etc).
@@ -279,12 +380,50 @@ OT_ASSERT_SIZE(owner_flash_info_config_t, 8);
 typedef struct owner_rescue_config {
   /**
    * Header identifiying this struct.
-   * tag: `RSCU`.
+   * tag: `RESQ`.
    * length: 16 + sizeof(command_allow).
    */
   tlv_header_t header;
-  /** The rescue type.  Currently, only `XMDM` is supported. */
-  uint32_t rescue_type;
+  /**
+   * The rescue protocol:
+   * - 'X'modem.
+   * - 'U'SB-DFU.
+   * - 'S'PI-DFU.
+   */
+  uint8_t protocol;
+  /**
+   * The misc & gpio configuration (if relevant, depending on `detect`).
+   *
+   *      7 6       2        1       0
+   * +-----+---------+--------+-------+
+   * | WDT | Reserved| PullEn | Value |
+   * +-----+---------+--------+-------+
+   */
+  uint8_t gpio;
+  /**
+   * The timeout configuration (not implemented yet).
+   *
+   *     7  6                        0
+   * +-----+--------------------------+
+   * | EoF |                  Timeout |
+   * +-----+--------------------------+
+   */
+  uint8_t timeout;
+  /**
+   * Trigger detection configuration.
+   *
+   *  7     6  5                    0
+   * +--------+-----------------------+
+   * | Detect |                 Index |
+   * +--------+-----------------------+
+   *
+   * Detect:
+   *  0 - None; index is meaningless.
+   *  1 - UART Break; index is meaningless.
+   *  2 - Strapping pins; index is the strapping value.
+   *  3 - GPIO; index is the pin to sample.
+   */
+  uint8_t detect;
   /** The start offset of the rescue region in flash (in pages). */
   uint16_t start;
   /** The size of the rescue region in flash (in pages). */
@@ -296,12 +435,143 @@ typedef struct owner_rescue_config {
   uint32_t command_allow[];
 } owner_rescue_config_t;
 OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, header, 0);
-OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, rescue_type, 8);
+OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, protocol, 8);
+OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, gpio, 9);
+OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, timeout, 10);
+OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, detect, 11);
 OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, start, 12);
 OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, size, 14);
 OT_ASSERT_MEMBER_OFFSET(owner_rescue_config_t, command_allow, 16);
 OT_ASSERT_SIZE(owner_rescue_config_t, 16);
 
+#define RESCUE_ENTER_ON_FAIL_BIT 7
+#define RESCUE_TIMEOUT_SECONDS ((bitfield_field32_t){.mask = 0x7F, .index = 0})
+#define RESCUE_MISC_GPIO_WATCHDOG_TIMEOUT_EN_BIT 7
+#define RESCUE_MISC_GPIO_PULL_EN_BIT 1
+#define RESCUE_MISC_GPIO_VALUE_BIT 0
+#define RESCUE_DETECT ((bitfield_field32_t){.mask = 0x03, .index = 6})
+#define RESCUE_DETECT_INDEX ((bitfield_field32_t){.mask = 0x3F, .index = 0})
+
+typedef enum rescue_protocol {
+  kRescueProtocolXmodem = 'X',
+  kRescueProtocolUsbDfu = 'U',
+  kRescueProtocolSpiDfu = 'S',
+} rescue_protocol_t;
+
+typedef enum rescue_detect {
+  kRescueDetectNone = 0,
+  kRescueDetectBreak = 1,
+  kRescueDetectStrap = 2,
+  kRescueDetectGpio = 3,
+} rescue_detect_t;
+
+/**
+ * The owner Integration Specific Firmware Binding (ISFB) configuration
+ * describes the configuration parameters for the ISFB region.
+ *
+ * Integrators have their own constraints that require owner firmware to be
+ * locked to certain integrator-device phases. The `ROM_EXT` needs to perform
+ * these constraint checks instead of the owner firmware because the rescue
+ * protocol bypasses any owner firmware level enforcement.
+ *
+ * Integrators can also perform their own rollback and upgrade automated testing
+ * using the strike words in the ISFB region. The erase policy implemented by
+ * this configuration entry allows the integrator to authorize erase operations
+ * of the ISFB region to configure devices for testing purposes.
+ */
+typedef struct owner_isfb_config {
+  /**
+   * Header identifiying this struct.
+   * tag: `ISFB`.
+   * length: 44 words.
+   */
+  tlv_header_t header;
+  /** The flash bank where the ISFB region is located. */
+  uint8_t bank;
+  /** The info flash page where the ISFB region is located. */
+  uint8_t page;
+  /** Padding for alignment */
+  uint16_t _pad;
+
+  /**
+   * The erase conditions for the ISFB region.
+   *
+   * This is a packed array of MUBI4 bools indicating which conditions authorize
+   * an erase. The conditions are aligned in little endian order: [B7, B6, B5,
+   * B4, B3, B2, B1, B0]
+   *
+   * The conditions are:
+   * - B0: Firmware must be signed with key specified by `key_domain` field.
+   * - B1: Firmware must be node locked (e.g. manifest usage constraints must be
+   * enabled).
+   * - B2: `manifest_ext_isfb_erase_t` must be present and set to harden true in
+   * the firmware manifest.
+   * - B3-B7: Reserved.
+   */
+  uint32_t erase_conditions;
+  /** If `B0`, part of erase authorization criteria. */
+  uint32_t key_domain;
+  /** Reserved space for future use. */
+  uint32_t reserved[5];
+  /** Number of `uint32_t` reserved for product expressions. It has to be a
+   * value less than or equal to 256. */
+  uint32_t product_words;
+} owner_isfb_config_t;
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, bank, 8);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, page, 9);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, _pad, 10);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, erase_conditions, 12);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, key_domain, 16);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, reserved, 20);
+OT_ASSERT_MEMBER_OFFSET(owner_isfb_config_t, product_words, 40);
+OT_ASSERT_SIZE(owner_isfb_config_t, 44);
+
+/**
+ * A detached signature can be used to validate either a signed command or an
+ * owner block.
+ *
+ * Detached signatures are used when the signature is too larger to fit within
+ * the designated signature area of the original buffer. In such cases, the
+ * orginal buffer's signature field will be all zeros and the verification
+ * function will scan through the flash data pages to find the detached
+ * signature.
+ *
+ * The detached signature must be aligned on a flash page boundary.
+ */
+typedef struct owner_detached_signature {
+  /**
+   * Header identifying this struct.
+   * tag: `SIGN`.
+   * length: 8192.
+   */
+  tlv_header_t header;
+  uint32_t _pad[2];
+  /** The command associated with this signature (e.g. UNLK, ACTV, OWNR). */
+  uint32_t command;
+  /** The algorithm used to generate this signature (ownership_key_alg_t). */
+  uint32_t algorithm;
+  /** The current nonce associated with the command. */
+  nonce_t nonce;
+  /** The signature data. */
+  union {
+    uint32_t raw[2040];
+    ecdsa_p256_signature_t ecdsa;
+    sigverify_spx_signature_t spx;
+    struct {
+      ecdsa_p256_signature_t ecdsa;
+      sigverify_spx_signature_t spx;
+    } hybrid;
+  } signature;
+} owner_detached_signature_t;
+
+OT_ASSERT_MEMBER_OFFSET(owner_detached_signature_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(owner_detached_signature_t, command, 16);
+OT_ASSERT_MEMBER_OFFSET(owner_detached_signature_t, algorithm, 20);
+OT_ASSERT_MEMBER_OFFSET(owner_detached_signature_t, nonce, 24);
+OT_ASSERT_MEMBER_OFFSET(owner_detached_signature_t, signature, 32);
+OT_ASSERT_SIZE(owner_detached_signature_t, 8192);
+
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/silicon_creator/lib/ownership/ecdsa.c b/sw/device/silicon_creator/lib/ownership/ecdsa.c
deleted file mode 100644
index 3ebf9859a80ce..0000000000000
--- a/sw/device/silicon_creator/lib/ownership/ecdsa.c
+++ /dev/null
@@ -1,70 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/lib/ownership/ecdsa.h"
-
-#include <stdbool.h>
-
-#include "sw/device/lib/base/hardened_memory.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/lib/drivers/hmac.h"
-#if USE_OTBN == 1
-#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
-#elif USE_CRYPTOC == 1
-// TODO(cfrantz): Replace the CryptoC implementation with a native OpenTitan
-// implementation.
-#include "sw/vendor/cryptoc/include/cryptoc/p256.h"
-#include "sw/vendor/cryptoc/include/cryptoc/p256_ecdsa.h"
-
-// This satisfies cryptoc's use of the assert macro.
-OT_WEAK void __assert_func(const char *file, int line, const char *func,
-                           const char *expr) {
-  while (true) {
-    HARDENED_TRAP();
-  }
-}
-#else
-#error "No ECDSA implementation for lib/ownership."
-#endif
-
-rom_error_t ecdsa_init(void) {
-#if USE_OTBN == 1
-  return otbn_boot_app_load();
-#elif USE_CRYPTOC == 1
-  return kErrorOk;
-#endif
-}
-
-hardened_bool_t ecdsa_verify_digest(const owner_key_t *pubkey,
-                                    const owner_signature_t *signature,
-                                    const hmac_digest_t *digest) {
-#if USE_OTBN == 1
-  const ecdsa_p256_public_key_t *key = (const ecdsa_p256_public_key_t *)pubkey;
-  const ecdsa_p256_signature_t *sig = (const ecdsa_p256_signature_t *)signature;
-  uint32_t rr[8];
-  rom_error_t error = otbn_boot_sigverify(key, sig, digest, rr);
-  if (error != kErrorOk) {
-    return kHardenedBoolFalse;
-  }
-  return hardened_memeq(sig->r, rr, ARRAYSIZE(rr));
-#elif USE_CRYPTOC == 1
-  const p256_int *x = (const p256_int *)&pubkey->key[0];
-  const p256_int *y = (const p256_int *)&pubkey->key[8];
-  const p256_int *r = (const p256_int *)&signature->signature[0];
-  const p256_int *s = (const p256_int *)&signature->signature[8];
-  const p256_int *message = (const p256_int *)&digest->digest;
-
-  int ok = p256_ecdsa_verify(x, y, message, r, s);
-  hardened_bool_t result = ok ? kHardenedBoolTrue : kHardenedBoolFalse;
-  return result;
-#endif
-}
-
-hardened_bool_t ecdsa_verify_message(const owner_key_t *pubkey,
-                                     const owner_signature_t *signature,
-                                     const void *message, size_t message_len) {
-  hmac_digest_t digest;
-  hmac_sha256(message, message_len, &digest);
-  return ecdsa_verify_digest(pubkey, signature, &digest);
-}
diff --git a/sw/device/silicon_creator/lib/ownership/ecdsa.h b/sw/device/silicon_creator/lib/ownership/ecdsa.h
deleted file mode 100644
index 520f6f3741c5f..0000000000000
--- a/sw/device/silicon_creator/lib/ownership/ecdsa.h
+++ /dev/null
@@ -1,58 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ECDSA_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ECDSA_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/drivers/hmac.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-/**
- * Initializes ECDSA crypto.
- */
-rom_error_t ecdsa_init(void);
-
-/**
- * Verifies an ECDSA P-256 signature.
- *
- * @param pubkey The public key needed to verify the signature
- * expressed as 32-bit little endian words: (le(X) || le(Y)).
- * @param signature The signature expressed as 32-bit little
- * endian words: (le(R) || le(S))
- * @param digest The digest of the message to verify.
- * @return hardened_bool_t
- */
-
-hardened_bool_t ecdsa_verify_digest(const owner_key_t *pubkey,
-                                    const owner_signature_t *signature,
-                                    const hmac_digest_t *digest);
-
-/**
- * Verifies an ECDSA P-256 signature.
- *
- * @param pubkey The public key needed to verify the signature
- * expressed as 32-bit little endian words: (le(X) || le(Y)).
- * @param signature The signature expressed as 32-bit little
- * endian words: (le(R) || le(S))
- * @param message The message to verify.
- * @param message_len The length of the message to verify.
- * @return hardened_bool_t
- */
-hardened_bool_t ecdsa_verify_message(const owner_key_t *pubkey,
-                                     const owner_signature_t *signature,
-                                     const void *message, size_t message_len);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ECDSA_H_
diff --git a/sw/device/silicon_creator/lib/ownership/ecdsa_functest.c b/sw/device/silicon_creator/lib/ownership/ecdsa_functest.c
deleted file mode 100644
index 5cafc2e264966..0000000000000
--- a/sw/device/silicon_creator/lib/ownership/ecdsa_functest.c
+++ /dev/null
@@ -1,100 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/status.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/entropy_testutils.h"
-#include "sw/device/lib/testing/hexstr.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-#include "sw/device/silicon_creator/lib/ownership/ecdsa.h"
-#include "sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h"
-
-// From: http://www.abrahamlincolnonline.org/lincoln/speeches/gettysburg.htm
-static const char kGettysburgPrelude[] =
-    "Four score and seven years ago our fathers brought forth on this "
-    "continent, a new nation, conceived in Liberty, and dedicated to the "
-    "proposition that all men are created equal.";
-
-// clang-format off
-/*
- * This signature was generated by signing the sha256sum of the prelude to
- * Lincoln's Gettysburg Address with the fake "no owner recovery key".
- *
- $ echo -n "Four score and seven years ago our fathers brought forth on this\
- continent, a new nation, conceived in Liberty, and dedicated to the\
- proposition that all men are created equal." | sha256sum -
-
- 1e6fd4030f9034cd775708a396c324ed420ec587eb3dd433e29f6ac08b8cc7ba  -
-
- $ opentitantool ecdsa sign \
-    sw/device/silicon_creator/rom_ext/keys/fake/ownership_no_owner_recovery_ecdsa_p256.der \
-    0x1e6fd4030f9034cd775708a396c324ed420ec587eb3dd433e29f6ac08b8cc7ba
-
-{
-  digest: "bac78c8bc06a9fe233d43deb87c50e42ed24c396a3085777cd34900f03d46f1e",
-  signature: "cda24f37d4979cea1446c495af344af83d2047d13191b41003431a182bf2b74c365b08b78c57e3c3c11960fbc4a53fb63f61aecba3ddbda00059aebd08ad8f2c"
-}
-
- *
- * The `digest` and `signature` string were copied verbatim into this test.
- */
-// This is the little-endian representation of the Gettysburg SHA256 digest.
-static const char kGettysburgDigest[] =
-    "bac78c8bc06a9fe233d43deb87c50e42ed24c396a3085777cd34900f03d46f1e";
-
-static const char kGettysburgSignature[] =
-    "cda24f37d4979cea1446c495af344af83d2047d13191b41003431a182bf2b74c"
-    "365b08b78c57e3c3c11960fbc4a53fb63f61aecba3ddbda00059aebd08ad8f2c";
-// clang-format on
-
-static const owner_key_t kNoOwnerRecoveryKey = {
-    .key = NO_OWNER_RECOVERY_ECDSA_P256,
-};
-
-void __assert_func(const char *file, int line, const char *func,
-                   const char *expr) {
-  LOG_ERROR("%s:%d: %s %s", file, line, func, expr);
-  abort();
-}
-
-static status_t initialize(void) {
-  TRY(ecdsa_init());
-  return OK_STATUS();
-}
-
-// Tests that we can verify an ECDSA signature given the digest.
-status_t ecdsa_verify_digest_test(void) {
-  hmac_digest_t digest;
-  TRY(hexstr_decode(&digest, sizeof(digest), kGettysburgDigest));
-  owner_signature_t signature;
-  TRY(hexstr_decode(&signature, sizeof(signature), kGettysburgSignature));
-  hardened_bool_t result =
-      ecdsa_verify_digest(&kNoOwnerRecoveryKey, &signature, &digest);
-  TRY_CHECK(result == kHardenedBoolTrue);
-  return OK_STATUS();
-}
-
-// Tests that we can verify an ECDSA signature of a message.
-// The message is first sha256-hashed to a digest and then verified.
-status_t ecdsa_verify_message_test(void) {
-  owner_signature_t signature;
-  TRY(hexstr_decode(&signature, sizeof(signature), kGettysburgSignature));
-  hardened_bool_t result =
-      ecdsa_verify_message(&kNoOwnerRecoveryKey, &signature, kGettysburgPrelude,
-                           sizeof(kGettysburgPrelude) - 1);
-  TRY_CHECK(result == kHardenedBoolTrue);
-  return OK_STATUS();
-}
-
-OTTF_DEFINE_TEST_CONFIG();
-
-bool test_main(void) {
-  CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
-  status_t result = initialize();
-  EXECUTE_TEST(result, ecdsa_verify_digest_test);
-  EXECUTE_TEST(result, ecdsa_verify_message_test);
-  return status_ok(result);
-}
diff --git a/sw/device/silicon_creator/lib/ownership/isfb.c b/sw/device/silicon_creator/lib/ownership/isfb.c
new file mode 100644
index 0000000000000..50e1675befd87
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/isfb.c
@@ -0,0 +1,189 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include "sw/device/silicon_creator/lib/ownership/isfb.h"
+
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+
+enum {
+  kFlashWordSize = 64,
+
+  // The maximum number of product expressions is 256, which maps to 512 flash
+  // words or 1024 bytes.
+  kProductExprMaxCount = 256,
+
+  // The maximum size of the product expressions in bytes.
+  KProductExprMaxCountBytes = kProductExprMaxCount * sizeof(uint32_t),
+
+  // The expected size of the strike region in bytes and words.
+  kExpectedStrikeRegionBytesCount =
+      kIsfbExpectedStrikeBitCount * sizeof(uint32_t),
+  kExpectedStrikeRegionWordsCount =
+      kExpectedStrikeRegionBytesCount / sizeof(uint32_t),
+};
+
+rom_error_t isfb_boot_request_process(const manifest_ext_isfb_t *ext,
+                                      const owner_config_t *owner_config,
+                                      uint32_t *checks_performed_count) {
+  *checks_performed_count = UINT32_MAX;
+  if (ext->header.name != kManifestExtIdIsfb ||
+      (hardened_bool_t)owner_config->isfb == kHardenedBoolFalse) {
+    return kErrorOwnershipISFBNotPresent;
+  }
+  const owner_isfb_config_t *isfb = owner_config->isfb;
+  if (ext->product_expr_count > isfb->product_words ||
+      ext->product_expr_count > kProductExprMaxCount) {
+    return kErrorOwnershipISFBProductExpCnt;
+  }
+
+  // The ISFB info page configuration is handled in the owner's
+  // `FlashInfoConfig` settings.
+  flash_ctrl_info_page_t isfb_info_page;
+  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_type0_params_build(
+      isfb->bank, isfb->page, &isfb_info_page));
+
+  // There are in total 128 bits in the strike mask. Each bit corresponds to a
+  // `uint32_t` word.
+  uint32_t strikes[kExpectedStrikeRegionWordsCount];
+  static_assert(
+      sizeof(ext->strike_mask) * CHAR_BIT == kIsfbExpectedStrikeBitCount,
+      "Strike mask size mismatch");
+  static_assert(sizeof(strikes) == kExpectedStrikeRegionBytesCount,
+                "Data size mismatch");
+
+  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_read(&isfb_info_page, /*offset=*/0,
+                                                ARRAYSIZE(strikes), strikes));
+
+  uint32_t strike_cnt_ok = 0;
+  uint32_t strike_cnt_bad = 0;
+  uint32_t *strike_word = (uint32_t *)strikes;
+  size_t i;
+  for (i = 0; i < ARRAYSIZE(strikes); ++i, ++strike_word) {
+    uint32_t strike_bit = ext->strike_mask[i >> 5] & (1 << (i & 31));
+    if (launder32(strike_bit) && *strike_word != UINT32_MAX) {
+      strike_cnt_bad++;
+    } else if (!launder32(strike_bit) || *strike_word == UINT32_MAX) {
+      strike_cnt_ok++;
+    } else {
+      // This condition is equivalent to a potential fault in either the strike
+      // mask or the ISFB info buffer.
+      strike_cnt_bad++;
+    }
+  }
+  // Check loop completion and count consistency.
+  HARDENED_CHECK_EQ(strike_cnt_ok + strike_cnt_bad + i,
+                    kIsfbExpectedStrikeBitCount * 2);
+
+  if (launder32(strike_cnt_bad) > 0) {
+    return kErrorOwnershipISFBStrikeMask;
+  }
+
+  uint32_t product_expr[kProductExprMaxCount];
+  static_assert(sizeof(product_expr) == KProductExprMaxCountBytes,
+                "Product expressions data size mismatch");
+
+  // Read the product expressions from the ISFB info page.
+  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_read(
+      &isfb_info_page, /*offset=*/1024, ARRAYSIZE(product_expr), product_expr));
+
+  uint32_t pe_cnt_ok = 0;
+  uint32_t p_cnt_bad = 0;
+
+  // The `product_expr_count` boundary check is performed at the beginning of
+  // the function.
+  for (i = 0; i < ext->product_expr_count; ++i) {
+    // The expression below wants to be (expr & mask) == value, but the user of
+    // the ISFB feature wants to use the mask value of zero to mark the image as
+    // unconstrained.
+    if ((product_expr[i] & ext->product_expr[i].mask) ==
+        (ext->product_expr[i].value & ext->product_expr[i].mask)) {
+      pe_cnt_ok++;
+    } else {
+      p_cnt_bad++;
+    }
+  }
+  HARDENED_CHECK_EQ(pe_cnt_ok + p_cnt_bad + i, 2 * ext->product_expr_count);
+
+  if (launder32(p_cnt_bad) > 0) {
+    return kErrorOwnershipISFBProductExp;
+  }
+
+  // Redundant checks to ensure there were no faults in any previous checks.
+  if (launder32(strike_cnt_ok) == kIsfbExpectedStrikeBitCount &&
+      launder32(strike_cnt_bad) == 0 &&
+      launder32(pe_cnt_ok) == ext->product_expr_count &&
+      launder32(p_cnt_bad) == 0) {
+    *checks_performed_count =
+        kIsfbExpectedStrikeBitCount + ext->product_expr_count;
+    return kErrorOk;
+  }
+
+  *checks_performed_count = UINT32_MAX;
+  return kErrorOwnershipISFBFailed;
+}
+
+rom_error_t isfb_info_flash_erase_policy_get(
+    owner_config_t *owner_config, uint32_t key_domain,
+    hardened_bool_t manifest_is_node_locked,
+    const manifest_ext_isfb_erase_t *ext_isfb_erase,
+    hardened_bool_t *erase_en) {
+  if ((hardened_bool_t)owner_config->isfb == kHardenedBoolFalse) {
+    return kErrorOwnershipISFBNotPresent;
+  }
+
+  uint32_t check_cnt_exp = 0;
+  uint32_t conditions = owner_config->isfb->erase_conditions;
+  hardened_bool_t policies[3] = {0};
+  static_assert(ARRAYSIZE(policies) <= sizeof(conditions) * 2,
+                "Erase conditions count mismatch");
+
+  // Only disable the expected check iff strictly set to `kMultiBitBool4False`
+  // in the owner config. Any other value will require the check to be
+  // performed.
+  for (uint32_t i = 0; i < ARRAYSIZE(policies); ++i, conditions >>= 4) {
+    if (launder32(conditions & 0xF) == kMultiBitBool4False) {
+      policies[i] = kHardenedBoolTrue;
+    } else {
+      check_cnt_exp = launder32(check_cnt_exp) + 1;
+    }
+  }
+
+  // Hardended counter used to detect any faults in the checks.
+  uint32_t check_cnt_got = 0;
+
+  // B0: Firmware must be signed with key specified by `key_domain` field.
+  if (policies[0] != kHardenedBoolTrue && key_domain &&
+      key_domain == owner_config->isfb->key_domain) {
+    policies[0] = kHardenedBoolTrue;
+    check_cnt_got = launder32(check_cnt_got) + 1;
+  }
+
+  // B1: Firmware must be node locked.
+  if (policies[1] != kHardenedBoolTrue &&
+      manifest_is_node_locked == kHardenedBoolTrue) {
+    policies[1] = kHardenedBoolTrue;
+    check_cnt_got = launder32(check_cnt_got) + 1;
+  }
+
+  // B3: `manifest_ext_isfb_erase_t` must be present and set to harden true in
+  // the firmware manifest.
+  if (policies[2] != kHardenedBoolTrue && ext_isfb_erase != NULL) {
+    policies[2] = (hardened_bool_t)ext_isfb_erase->erase_allowed;
+    check_cnt_got = launder32(check_cnt_got) + 1;
+  }
+
+  if (policies[0] == kHardenedBoolTrue && policies[1] == kHardenedBoolTrue &&
+      policies[2] == kHardenedBoolTrue) {
+    HARDENED_CHECK_EQ(check_cnt_got, check_cnt_exp);
+    // The erase policy is satisfied. Update the info flash page configuration
+    // with the new erase policy.
+    *erase_en = kHardenedBoolTrue;
+  }
+
+  return kErrorOk;
+}
+
+extern uint32_t isfb_expected_count_get(const manifest_ext_isfb_t *ext);
diff --git a/sw/device/silicon_creator/lib/ownership/isfb.h b/sw/device/silicon_creator/lib/ownership/isfb.h
new file mode 100644
index 0000000000000..c5822468528d4
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/isfb.h
@@ -0,0 +1,82 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ISFB_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ISFB_H_
+
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+  // The number of bits in the strike mask is fixed to 128. Each bit in the
+  // strike mask corresponds to a `uint32_t` word.
+  kIsfbExpectedStrikeBitCount = 128,
+};
+
+inline uint32_t isfb_expected_count_get(const manifest_ext_isfb_t *ext) {
+  return ext->product_expr_count + kIsfbExpectedStrikeBitCount;
+}
+
+/**
+ * Processes the Integrator Specific FW Binding (ISFB) boot request.
+ *
+ * This function processes the ISFB boot request and performs the necessary
+ * checks to ensure that the firmware is bound to the correct
+ * integrator-specific firmware binding configuration.
+ *
+ * The checks performed are:
+ * - The ISFB extension is valid.
+ * - The ISFB configuration is present in the owner configuration.
+ * - The product expression count set in the manifest is within the bounds of
+ * the owner configuration.
+ * - The strike mask yields the expected number of strikes in the ISFB info
+ * page.
+ * - The product expressions in the ISFB info page match the expected values.
+ *
+ * @param ext The ISFB extension from the manifest.
+ * @param owner_config The owner configuration.
+ * @param[out] checks_performed_count The number of checks performed. This
+ * should be equivalent to the number of strike bits and the number of product
+ * expressions. Use this value in the consuming code as a way to harden the call
+ * against fault injection.
+ *
+ * @return The result of the operation.
+ */
+rom_error_t isfb_boot_request_process(const manifest_ext_isfb_t *ext,
+                                      const owner_config_t *owner_config,
+                                      uint32_t *checks_performed_count);
+
+/**
+ * Gets the flash erase policy for the ISFB info page.
+ *
+ * This function checks the erase policy for the ISFB info page based on the
+ * provided owner configuration, key domain, and manifest node lock status.
+ *
+ * @param owner_config The owner configuration.
+ * @param key_domain The key domain associated with the active secure boot key.
+ * @param manifest_is_node_locked Indicates whether the manifest is node locked.
+ * @param ext_isfb_erase The ISFB erase policy extension from the manifest. May
+ * be NULL.
+ * @param[out] erase_en The erase enable flag. Set to kHardenedBoolTrue if
+ *                      erasing the ISFB info page is allowed, otherwise
+ *                      kHardenedBoolFalse.
+ * @return The result of the operation.
+ */
+rom_error_t isfb_info_flash_erase_policy_get(
+    owner_config_t *owner_config, uint32_t key_domain,
+    hardened_bool_t manifest_is_node_locked,
+    const manifest_ext_isfb_erase_t *ext_isfb_erase, hardened_bool_t *erase_en);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_ISFB_H_
diff --git a/sw/device/silicon_creator/lib/ownership/isfb_unittest.cc b/sw/device/silicon_creator/lib/ownership/isfb_unittest.cc
new file mode 100644
index 0000000000000..896652b1036a7
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/isfb_unittest.cc
@@ -0,0 +1,245 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/isfb.h"
+
+#include <algorithm>
+#include <limits>
+#include <stdint.h>
+#include <vector>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace {
+using rom_test::FlashCfg;
+using rom_test::FlashPerms;
+using rom_test::MockFlashCtrl;
+using ::testing::_;
+using ::testing::Return;
+
+enum {
+  kStrikeCntMax = 128,
+  kProductExprCntMax = 256,
+};
+
+class IsfbTest : public rom_test::RomTest {
+ protected:
+  void SetUp() override {
+    RomTest::SetUp();
+    isfb_config_ = {
+        .bank = 0,
+        .page = 5,
+        .product_words = 4,
+    };
+    owner_config_ = {
+        .isfb = &isfb_config_,
+    };
+  }
+
+  void ExpectInfoRead(const std::vector<uint32_t> &data, uint32_t offset,
+                      rom_error_t error) {
+    EXPECT_CALL(flash_ctrl_, InfoRead(_, offset, data.size(), _))
+        .WillOnce([data, error](auto, auto, auto, void *out) {
+          uint32_t *data_out = reinterpret_cast<uint32_t *>(out);
+          std::copy_n(data.begin(), data.size(), data_out);
+          return error;
+        });
+  }
+
+  std::vector<uint32_t> StrikeFlashWords(uint32_t strike_count) {
+    EXPECT_LE(strike_count, kStrikeCntMax);
+    std::vector<uint32_t> words(kStrikeCntMax,
+                                std::numeric_limits<uint32_t>::max());
+    std::fill_n(words.begin(), strike_count, 0);
+    return words;
+  }
+
+  std::vector<uint32_t> ProductExpressionInit(const manifest_ext_isfb_t &ext) {
+    EXPECT_LE(ext.product_expr_count, kProductExprCntMax);
+    std::vector<uint32_t> words(kProductExprCntMax,
+                                std::numeric_limits<uint32_t>::max());
+    for (size_t i = 0; i < ext.product_expr_count; ++i) {
+      words[i] = ext.product_expr[i].value;
+    }
+    return words;
+  }
+  MockFlashCtrl flash_ctrl_;
+  owner_isfb_config_t isfb_config_;
+  owner_config_t owner_config_;
+};
+
+const manifest_ext_isfb_t kManifestExtGood = {
+    .header =
+        {
+            .identifier = kManifestExtIdIsfb,
+            .name = kManifestExtIdIsfb,
+        },
+    .strike_mask =
+        {
+            // Only the first word is struck.
+            0xfffffffe,
+            0xffffffff,
+            0xffffffff,
+            0xffffffff,
+        },
+    .product_expr_count = 2,
+    .product_expr =
+        {
+            {
+                .mask = 0xffffffff,
+                .value = 0xa5a5a5a5,
+            },
+            {
+                .mask = 0xf0f0f0f0,
+                .value = 0xa0a0a0a0,
+            },
+        },
+};
+
+TEST_F(IsfbTest, OwnershipIsfbNotPreset) {
+  manifest_ext_isfb_t ext = {
+      .header =
+          {
+              .identifier = kManifestExtIdIsfb,
+              .name = kManifestExtIdIsfb,
+          },
+  };
+  owner_config_t owner_config = {
+      .isfb = (owner_isfb_config_t *)kHardenedBoolFalse,
+  };
+  uint32_t checks_performed_count;
+  rom_error_t error =
+      isfb_boot_request_process(&ext, &owner_config, &checks_performed_count);
+  EXPECT_EQ(error, kErrorOwnershipISFBNotPresent);
+  EXPECT_EQ(checks_performed_count, UINT32_MAX);
+}
+
+TEST_F(IsfbTest, InvalidManifestProductExpressionCount) {
+  manifest_ext_isfb_t ext = {
+      .header =
+          {
+              .identifier = kManifestExtIdIsfb,
+              .name = kManifestExtIdIsfb,
+          },
+      // The product expression count is larger than what is allowed in the
+      // ownership configuration.
+      .product_expr_count = 5,
+  };
+  uint32_t checks_performed_count;
+  rom_error_t error =
+      isfb_boot_request_process(&ext, &owner_config_, &checks_performed_count);
+  EXPECT_EQ(error, kErrorOwnershipISFBProductExpCnt);
+  EXPECT_EQ(checks_performed_count, UINT32_MAX);
+}
+
+TEST_F(IsfbTest, BootRequestProcess) {
+  EXPECT_CALL(flash_ctrl_, InfoType0ParamsBuild(0, 5, _))
+      .WillOnce(Return(kErrorOk));
+
+  // This matches the number of strikes present in the manifest extension
+  // `strike_mask` field value.
+  ExpectInfoRead(StrikeFlashWords(/*strike_count=*/1), /*offset=*/0, kErrorOk);
+
+  ExpectInfoRead(ProductExpressionInit(kManifestExtGood), /*offset=*/1024,
+                 kErrorOk);
+
+  uint32_t checks_performed_count;
+  rom_error_t error = isfb_boot_request_process(
+      &kManifestExtGood, &owner_config_, &checks_performed_count);
+  EXPECT_EQ(error, kErrorOk);
+  EXPECT_EQ(checks_performed_count,
+            kStrikeCntMax + kManifestExtGood.product_expr_count);
+}
+
+// This test checks the anti-rollback mechanism in the ISFB strike mask.
+TEST_F(IsfbTest, AntiRollbackBootFailure) {
+  EXPECT_CALL(flash_ctrl_, InfoType0ParamsBuild(0, 5, _))
+      .WillOnce(Return(kErrorOk));
+  enum {
+    // this value is derived from the strike mask in the manifest extension to
+    // be larger than the expected number of 0s in the strike mask. See
+    // `strike_mask` check.
+    kExpectedStrikeCount = 2,
+  };
+
+  // Sanity check to ensure that the strike mask only has the first word struck.
+  // Plase update the test if the strike mask is changed.
+  EXPECT_EQ(kManifestExtGood.strike_mask[0], 0xfffffffe);
+
+  // The state of device is such that the number of strikes is larger than what
+  // is defined in the manifest extension. This must result in an anti-rollback
+  // failure which is mapped to the `kErrorOwnershipISFBStrikeMask` error code.
+  ExpectInfoRead(StrikeFlashWords(kExpectedStrikeCount), /*offset=*/0,
+                 kErrorOk);
+
+  uint32_t checks_performed_count;
+  rom_error_t error = isfb_boot_request_process(
+      &kManifestExtGood, &owner_config_, &checks_performed_count);
+  EXPECT_EQ(error, kErrorOwnershipISFBStrikeMask);
+  EXPECT_EQ(checks_performed_count, UINT32_MAX);
+}
+
+// This test checks that an invalid product association detected at boot time
+// results in an error.
+TEST_F(IsfbTest, ProductAssociationError) {
+  EXPECT_CALL(flash_ctrl_, InfoType0ParamsBuild(0, 5, _))
+      .WillOnce(Return(kErrorOk));
+  ExpectInfoRead(StrikeFlashWords(/*strike_count=*/1), /*offset=*/0, kErrorOk);
+
+  // The following manifest extension is used to generate an invalid product
+  // configuration in the `ProductExpressionInit` call. Note that the
+  // `isfb_boot_request_process` function still uses the `kManifestExtGood`
+  // manifest extension to trigger the error condition.
+  const manifest_ext_isfb_t kManifestExtBadProdExpr = {
+      // This value is set to 0 to generate an info flash page configuration
+      // with an invalid product expression.
+      .product_expr_count = 0,
+  };
+
+  ExpectInfoRead(ProductExpressionInit(kManifestExtBadProdExpr),
+                 /*offset=*/1024, kErrorOk);
+
+  uint32_t checks_performed_count;
+  rom_error_t error = isfb_boot_request_process(
+      &kManifestExtGood, &owner_config_, &checks_performed_count);
+  EXPECT_EQ(error, kErrorOwnershipISFBProductExp);
+  EXPECT_EQ(checks_performed_count, UINT32_MAX);
+}
+
+TEST_F(IsfbTest, ErasePolicyOwnershipIsfbNotPreset) {
+  const manifest_ext_isfb_erase_t ext = {
+      .header =
+          {
+              .identifier = kManifestExtIdIsfbErase,
+              .name = kManifestExtIdIsfbErase,
+          },
+  };
+  owner_config_t owner_config = {
+      .isfb = (owner_isfb_config_t *)kHardenedBoolFalse,
+  };
+  hardened_bool_t erase_en = kHardenedBoolFalse;
+  rom_error_t error = isfb_info_flash_erase_policy_get(
+      &owner_config, 0, kHardenedBoolTrue, &ext, &erase_en);
+  EXPECT_EQ(error, kErrorOwnershipISFBNotPresent);
+}
+
+TEST_F(IsfbTest, ErasePolicyDisableExpectedCheck) {
+  const manifest_ext_isfb_erase_t ext = {
+      .header =
+          {
+              .identifier = kManifestExtIdIsfbErase,
+              .name = kManifestExtIdIsfbErase,
+          },
+  };
+  isfb_config_.erase_conditions = 0x99999999;
+  hardened_bool_t erase_en = kHardenedBoolFalse;
+  rom_error_t error = isfb_info_flash_erase_policy_get(
+      &owner_config_, 0, kHardenedBoolTrue, &ext, &erase_en);
+  EXPECT_EQ(error, kErrorOk);
+  EXPECT_EQ(erase_en, kHardenedBoolTrue);
+}
+
+}  // namespace
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/BUILD b/sw/device/silicon_creator/lib/ownership/keys/dummy/BUILD
new file mode 100644
index 0000000000000..9d73927282e88
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/BUILD
@@ -0,0 +1,66 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+load("//rules:signing.bzl", "keyset")
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "owner_key",
+    srcs = ["owner_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "owner_key_pub",
+    srcs = ["owner_ecdsa_p256.pub.der"],
+)
+
+filegroup(
+    name = "activate_key",
+    srcs = ["activate_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "unlock_key",
+    srcs = ["unlock_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "all_zero_sig",
+    srcs = ["all_zero_sig.bin"],
+)
+
+filegroup(
+    name = "owner_key_spx",
+    srcs = ["owner_spx.pem"],
+)
+
+filegroup(
+    name = "owner_key_spx_pub",
+    srcs = ["owner_spx.pub.pem"],
+)
+
+filegroup(
+    name = "activate_key_spx",
+    srcs = ["activate_spx.pem"],
+)
+
+filegroup(
+    name = "unlock_key_spx",
+    srcs = ["unlock_spx.pem"],
+)
+
+filegroup(
+    name = "app_prod_ecdsa_pub",
+    srcs = ["app_prod_ecdsa_p256.pub.der"],
+)
+
+keyset(
+    name = "ecdsa_keyset",
+    build_setting_default = "",
+    keys = {
+        "app_prod_ecdsa_p256.der": "app_prod_0",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
+)
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.der
new file mode 100644
index 0000000000000..c0b4b4bd7472f
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..02b30b3a5fa1e
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pem
new file mode 100644
index 0000000000000..dd8634804c28a
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+weaRPM+SIe+JswtZ2y/t5+THAooeDS5J4qgN4OJcnDPHUev9S9mRA1cPvxhrAHlM
+XuRlgAOOYVCeSIk2f5wlKA==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pub.pem
new file mode 100644
index 0000000000000..c261822473f94
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/activate_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+x1Hr/UvZkQNXD78YawB5TF7kZYADjmFQnkiJNn+cJSg=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/all_zero_sig.bin b/sw/device/silicon_creator/lib/ownership/keys/dummy/all_zero_sig.bin
new file mode 100644
index 0000000000000..9017fd98b5f67
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/all_zero_sig.bin differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.der
new file mode 100644
index 0000000000000..1885983789b93
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..419aa55e08185
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.der
new file mode 100644
index 0000000000000..8134d7740a927
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..a199a167415e8
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pem
new file mode 100644
index 0000000000000..3c3443449bd41
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+if5c1hs0bcw6NaKtz7t0ygsWaJ8CHbQSWh3jo/B+0Ai6j2diLvyF3AmJ95FSpBFV
+MhIiYZO+N87nzGWtprZnzw==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pub.pem
new file mode 100644
index 0000000000000..1e29bb3964603
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/owner_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+uo9nYi78hdwJifeRUqQRVTISImGTvjfO58xlraa2Z88=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.der
new file mode 100644
index 0000000000000..a52254cb97137
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..ad32bd0f6f790
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pem
new file mode 100644
index 0000000000000..63cd3f0132487
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+zOhDLHS1z43aMzqC6tlhqyh7/8Y1+ixA/SIt0xasufChY6H+6lVBLSfqVHXLOSKa
+dQpRRIF+ZoHXTHcLDCy1EQ==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pub.pem
new file mode 100644
index 0000000000000..fc5d2822fc3f5
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+oWOh/upVQS0n6lR1yzkimnUKUUSBfmaB10x3CwwstRE=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/BUILD b/sw/device/silicon_creator/lib/ownership/keys/fake/BUILD
index 52f8195479ee3..42c64aceec084 100644
--- a/sw/device/silicon_creator/lib/ownership/keys/fake/BUILD
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/BUILD
@@ -2,8 +2,29 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@rules_pkg//pkg:mappings.bzl", "pkg_filegroup", "pkg_files")
+load("//rules:signing.bzl", "keyset")
+
 package(default_visibility = ["//visibility:public"])
 
+cc_library(
+    name = "includes",
+    testonly = True,
+    hdrs = [
+        "activate_ecdsa_p256.h",
+        "activate_spx.h",
+        "app_dev_ecdsa_p256.h",
+        "app_dev_spx.h",
+        "app_prod_ecdsa_p256.h",
+        "app_prod_spx.h",
+        "app_test_ecdsa_p256.h",
+        "owner_ecdsa_p256.h",
+        "owner_spx.h",
+        "unlock_ecdsa_p256.h",
+        "unlock_spx.h",
+    ],
+)
+
 cc_library(
     name = "fake",
     srcs = [
@@ -22,3 +43,98 @@ filegroup(
     name = "no_owner_recovery_key",
     srcs = ["no_owner_recovery_ecdsa_p256.der"],
 )
+
+filegroup(
+    name = "owner_key",
+    srcs = ["owner_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "owner_key_pub",
+    srcs = ["owner_ecdsa_p256.pub.der"],
+)
+
+filegroup(
+    name = "activate_key",
+    srcs = ["activate_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "unlock_key",
+    srcs = ["unlock_ecdsa_p256.der"],
+)
+
+filegroup(
+    name = "owner_key_spx",
+    srcs = ["owner_spx.pem"],
+)
+
+filegroup(
+    name = "owner_key_spx_pub",
+    srcs = ["owner_spx.pub.pem"],
+)
+
+filegroup(
+    name = "activate_key_spx",
+    srcs = ["activate_spx.pem"],
+)
+
+filegroup(
+    name = "unlock_key_spx",
+    srcs = ["unlock_spx.pem"],
+)
+
+# The ownership e2e tests need access to both the app_prod_ecdsa and app_dev_pub public key files below.
+filegroup(
+    name = "app_prod_ecdsa_pub",
+    srcs = ["app_prod_ecdsa_p256.pub.der"],
+)
+
+filegroup(
+    name = "app_dev_pub",
+    srcs = ["app_dev_ecdsa_p256.pub.der"],
+)
+
+pkg_files(
+    name = "fpga_dev_files",
+    testonly = True,
+    srcs = [
+        ":app_dev_pub",
+        ":app_prod_ecdsa_pub",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset",
+    ],
+)
+
+pkg_filegroup(
+    name = "fpga_dev_pkg",
+    testonly = True,
+    srcs = [
+        ":fpga_dev_files",
+    ],
+    prefix = "fake_keys",
+)
+
+keyset(
+    name = "ecdsa_keyset",
+    build_setting_default = "",
+    keys = {
+        "app_prod_ecdsa_p256.der": "app_prod_0",
+        "app_dev_ecdsa_p256.der": "app_dev_0",
+        "app_test_ecdsa_p256.der": "app_test_0",
+        "app_unauthorized_ecdsa_p256.der": "app_unauthorized_0",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
+)
+
+keyset(
+    name = "spx_keyset",
+    build_setting_default = "",
+    keys = {
+        "app_prod_spx.pem": "app_prod_0",
+        "app_dev_spx.pem": "app_dev_0:domain=PreHashedSha256",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
+)
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.der
new file mode 100644
index 0000000000000..58a30702fdf26
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.h
new file mode 100644
index 0000000000000..dfe58662df9f3
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_ECDSA_P256_H_
+
+#define ACTIVATE_ECDSA_P256                                \
+  {                                                        \
+    .x = {0x63a31253, 0x04b237ba, 0x3738e9f4, 0x5882a207,  \
+          0x8c5dd770, 0xbc279ae3, 0x4f608694, 0xc7888656}, \
+    .y = {0xbbe32c57, 0x1528a35a, 0xf13f6916, 0xa3802d5e,  \
+          0xcf1f6f3d, 0x2f8b61a0, 0xa5e97f8f, 0x77328a26}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..d718259c0c123
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.h b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.h
new file mode 100644
index 0000000000000..21d877267f426
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.h
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_SPX_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_SPX_H_
+
+#define ACTIVATE_SPX \
+  {                  \
+    .data = {        \
+      3044129793,    \
+      1999364739,    \
+      1808675597,    \
+      4266956732,    \
+      3708088088,    \
+      4010151980,    \
+      3482134897,    \
+      3648113411     \
+    }                \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_ACTIVATE_SPX_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pem
new file mode 100644
index 0000000000000..13e9be15f177e
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+bpEfxMlNSA+hGBQcqWt+u5C5X87KtyA2iRpRkpYf/YoBvHG1g+Irdw0zzmu8l1T+
+GO8E3SwQBu9xKY3PA8tx2Q==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pub.pem
new file mode 100644
index 0000000000000..71318b3b0ab7b
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+AbxxtYPiK3cNM85rvJdU/hjvBN0sEAbvcSmNzwPLcdk=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.der
new file mode 100644
index 0000000000000..ec5e6eb92b8e1
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.h
new file mode 100644
index 0000000000000..d5e65463e780d
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_ECDSA_P256_H_
+
+#define APP_DEV_ECDSA_P256                                 \
+  {                                                        \
+    .x = {0xddd43a0c, 0x622265ee, 0xae5b66d4, 0x94c06bca,  \
+          0x310493ae, 0x4ef6f61e, 0x7581813f, 0xac7b2ff9}, \
+    .y = {0xc5aa3b52, 0x07db1c51, 0x905148dc, 0xe5c458de,  \
+          0xebccfe4b, 0x317e5744, 0x863e76fd, 0xa08f1a90}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..210607aa6eeb4
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.h b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.h
new file mode 100644
index 0000000000000..5d4c8eb0a584c
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.h
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_SPX_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_SPX_H_
+
+#define APP_DEV_SPX \
+  {                 \
+    .data = {       \
+      2635496609,   \
+      3094453936,   \
+      1095047114,   \
+      875270085,    \
+      1206311292,   \
+      2547787469,   \
+      354526470,    \
+      195185787     \
+    }               \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_DEV_SPX_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pem
new file mode 100644
index 0000000000000..c25a0de1f5c73
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SPHINCS+_SHA2_128s_simple PRIVATE KEY-----
+u7uaeZ+G20io4GS4Jov0um6HEHEFjHuQDuYn6l6eLwqhfBadsJ5xuMoXRUHFjys0
+fNnmR80m3JcGpSEVe0yiCw==
+-----END RAW:SPHINCS+_SHA2_128s_simple PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pub.pem
new file mode 100644
index 0000000000000..b913e35b7633e
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SPHINCS+_SHA2_128s_simple PUBLIC KEY-----
+oXwWnbCecbjKF0VBxY8rNHzZ5kfNJtyXBqUhFXtMogs=
+-----END RAW:SPHINCS+_SHA2_128s_simple PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der
new file mode 100644
index 0000000000000..82ae4a26f5742
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.h
new file mode 100644
index 0000000000000..7533b3e2bf67c
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_ECDSA_P256_H_
+
+#define APP_PROD_ECDSA_P256                                \
+  {                                                        \
+    .x = {0x265b676b, 0x656df11f, 0xe7268c24, 0xf7682b71,  \
+          0x1a5407bc, 0x60d64f8b, 0x0df3f0ea, 0x32de82c0}, \
+    .y = {0x248107b0, 0xdddf1364, 0xa99b1d58, 0x35897333,  \
+          0x661324da, 0x4ad9cfd4, 0xac55ca48, 0x47d456f4}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..b83e450c8e797
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.h b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.h
new file mode 100644
index 0000000000000..e13cc771c05bb
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.h
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_SPX_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_SPX_H_
+
+#define APP_PROD_SPX \
+  {                  \
+    .data = {        \
+      342329895,     \
+      2013107991,    \
+      2297648695,    \
+      3306667688,    \
+      2064727507,    \
+      1555686114,    \
+      1109351432,    \
+      3336892138     \
+    }                \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_PROD_SPX_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem
new file mode 100644
index 0000000000000..40929863c5dac
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SPHINCS+_SHA2_128s_simple PRIVATE KEY-----
+1s9ET2uLFvVqk3uY41Pnco52JCezKO/cd8pveYWf4hYnimcUF5f9dzdW84iovhfF
+0z0Re+LiuVwIXB9C6u7kxg==
+-----END RAW:SPHINCS+_SHA2_128s_simple PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pub.pem
new file mode 100644
index 0000000000000..8215930786165
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SPHINCS+_SHA2_128s_simple PUBLIC KEY-----
+J4pnFBeX/Xc3VvOIqL4XxdM9EXvi4rlcCFwfQuru5MY=
+-----END RAW:SPHINCS+_SHA2_128s_simple PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.der
new file mode 100644
index 0000000000000..de282632d8fee
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.h
new file mode 100644
index 0000000000000..cd418ed0581ff
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_TEST_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_TEST_ECDSA_P256_H_
+
+#define APP_TEST_ECDSA_P256                                \
+  {                                                        \
+    .x = {0xced1f3c1, 0x8f31432e, 0x3bd9cc77, 0xb53f37f1,  \
+          0xd2eb4cdd, 0xeb3e0bf4, 0xed753db5, 0xdfcbc369}, \
+    .y = {0x230c28c5, 0xfd36977b, 0xe0a93eb8, 0x1c80d1b9,  \
+          0xbf7782d9, 0x0d3d6d7c, 0xaf133a0e, 0xefd36de6}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_APP_TEST_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..b9d3a9278e895
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.der
new file mode 100644
index 0000000000000..d7d93c285fc4d
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..45f840a58b1dd
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h
index aeb6a2592ae79..7bcd90b47da71 100644
--- a/sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h
@@ -5,11 +5,14 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_NO_OWNER_RECOVERY_ECDSA_P256_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_NO_OWNER_RECOVERY_ECDSA_P256_H_
 
-#define NO_OWNER_RECOVERY_ECDSA_P256                                        \
-  {                                                                         \
-    0x81401b6d, 0x21b2f288, 0x94022520, 0xe7af2be2, 0x52fd43d5, 0x51a5e029, \
-        0x307c3109, 0xb3f7b84f, 0x9ca09689, 0x43f77fd0, 0x84a2ca45,         \
-        0x731885f9, 0xcb248ef6, 0x9e91b14c, 0x08d28c0e, 0x4c0e3fd1,         \
+#define NO_OWNER_RECOVERY_ECDSA_P256                                    \
+  {                                                                     \
+    .ecdsa = {                                                          \
+      .x = {0x81401b6d, 0x21b2f288, 0x94022520, 0xe7af2be2, 0x52fd43d5, \
+            0x51a5e029, 0x307c3109, 0xb3f7b84f},                        \
+      .y = {0x9ca09689, 0x43f77fd0, 0x84a2ca45, 0x731885f9, 0xcb248ef6, \
+            0x9e91b14c, 0x08d28c0e, 0x4c0e3fd1},                        \
+    }                                                                   \
   }
 
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_NO_OWNER_RECOVERY_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.der
new file mode 100644
index 0000000000000..2737daeccd013
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.h
new file mode 100644
index 0000000000000..eba659980ce4a
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_ECDSA_P256_H_
+
+#define OWNER_ECDSA_P256                                   \
+  {                                                        \
+    .x = {0x8e3dcb50, 0x0036bafe, 0xe9ca771f, 0xbce13f2c,  \
+          0x8246d17a, 0x5949d6b1, 0x3a624c28, 0x7c5d8d08}, \
+    .y = {0xd664e861, 0xd07b1bf5, 0x6f437b27, 0x21696187,  \
+          0x123b6637, 0xee962e67, 0xaec24bf5, 0x529422ab}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..aaac89d919b3d
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.h b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.h
new file mode 100644
index 0000000000000..d273ff2d33788
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.h
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_SPX_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_SPX_H_
+
+#define OWNER_SPX \
+  {               \
+    .data = {     \
+      2060225938, \
+      2906778233, \
+      1213194299, \
+      3760349346, \
+      3237819324, \
+      3174437600, \
+      577795037,  \
+      2762028488  \
+    }             \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_OWNER_SPX_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pem
new file mode 100644
index 0000000000000..b973bcf23085c
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+GWaWAg+bDrB/d66YRPcBBKj0rii3/OZl5z+N32KhdomSjcx6eepBrTvgT0iiYCLg
+vDP9wOASNr3dc3AiyDWhpA==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pub.pem
new file mode 100644
index 0000000000000..3f2083b2f0b93
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+ko3MennqQa074E9IomAi4Lwz/cDgEja93XNwIsg1oaQ=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/ownership_ecdsa_keys_fake.c b/sw/device/silicon_creator/lib/ownership/keys/fake/ownership_ecdsa_keys_fake.c
index e61dd0142dc42..6e5e329c3bb30 100644
--- a/sw/device/silicon_creator/lib/ownership/keys/fake/ownership_ecdsa_keys_fake.c
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/ownership_ecdsa_keys_fake.c
@@ -7,6 +7,5 @@
 #include "sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.h"
 #include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
 
-const owner_key_t *const kNoOwnerRecoveryKey = &(const owner_key_t){
-    .key = NO_OWNER_RECOVERY_ECDSA_P256,
-};
+const owner_keydata_t *const kNoOwnerRecoveryKey =
+    &(const owner_keydata_t)NO_OWNER_RECOVERY_ECDSA_P256;
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.der b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.der
new file mode 100644
index 0000000000000..7e12fb5ea0a0c
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.h b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.h
new file mode 100644
index 0000000000000..1ac2f73f96661
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_ECDSA_P256_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_ECDSA_P256_H_
+
+#define UNLOCK_ECDSA_P256                                  \
+  {                                                        \
+    .x = {0x113f87b2, 0x04711ce7, 0x6af306d9, 0xb80e76dd,  \
+          0x26e30fd2, 0xda71b86e, 0xa062c80f, 0x284f4eb2}, \
+    .y = {0xe5704f44, 0xb11098c5, 0xc31d48d5, 0x5895d10f,  \
+          0x7ac11545, 0x86031e92, 0x71c617c6, 0x1f8e3b14}, \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_ECDSA_P256_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.pub.der b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.pub.der
new file mode 100644
index 0000000000000..d95ac60716bcd
Binary files /dev/null and b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.pub.der differ
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.h b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.h
new file mode 100644
index 0000000000000..243e19caf1e2f
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.h
@@ -0,0 +1,22 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_SPX_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_SPX_H_
+
+#define UNLOCK_SPX \
+  {                \
+    .data = {      \
+      702273659,   \
+      820410287,   \
+      1537134634,  \
+      1690599258,  \
+      2052755488,  \
+      3820914027,  \
+      1729429625,  \
+      2622665165   \
+    }              \
+  }
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_KEYS_FAKE_UNLOCK_SPX_H_
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pem
new file mode 100644
index 0000000000000..27ac637bca623
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pem
@@ -0,0 +1,4 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+hdilZHm5YMAE5xN5B2nYfqXeTS3yH7OLxAvdkqD5or572Nspr3fmMCrQnltaf8Rk
+IJBaemuFvuN5ABVnzbFSnA==
+-----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pub.pem b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pub.pem
new file mode 100644
index 0000000000000..b319949e12af2
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.pub.pem
@@ -0,0 +1,3 @@
+-----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+e9jbKa935jAq0J5bWn/EZCCQWnprhb7jeQAVZ82xUpw=
+-----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/lib/ownership/mock_owner_verify.cc b/sw/device/silicon_creator/lib/ownership/mock_owner_verify.cc
new file mode 100644
index 0000000000000..6b40525a74332
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/mock_owner_verify.cc
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/mock_owner_verify.h"
+
+namespace rom_test {
+extern "C" {
+
+rom_error_t owner_verify(uint32_t key_alg, const owner_keydata_t *key,
+                         const ecdsa_p256_signature_t *ecdsa_sig,
+                         const sigverify_spx_signature_t *spx_sig,
+                         const void *msg_prefix_1, size_t msg_prefix_1_len,
+                         const void *msg_prefix_2, size_t msg_prefix_2_len,
+                         const void *msg, size_t msg_len,
+                         const hmac_digest_t *digest, uint32_t *flash_exec) {
+  return MockOwnerVerify::Instance().verify(
+      key_alg, key, ecdsa_sig, spx_sig, msg_prefix_1, msg_prefix_1_len,
+      msg_prefix_2, msg_prefix_2_len, msg, msg_len, digest, flash_exec);
+}
+
+}  // extern "C"
+}  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/ownership/mock_owner_verify.h b/sw/device/silicon_creator/lib/ownership/mock_owner_verify.h
new file mode 100644
index 0000000000000..ba2151115a4a7
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/mock_owner_verify.h
@@ -0,0 +1,34 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_MOCK_OWNER_VERIFY_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_MOCK_OWNER_VERIFY_H_
+
+#include "sw/device/lib/base/global_mock.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace rom_test {
+namespace internal {
+
+/**
+ * Mock class for owner_verify.c.
+ */
+class MockOwnerVerify : public global_mock::GlobalMock<MockOwnerVerify> {
+ public:
+  MOCK_METHOD(rom_error_t, verify,
+              (uint32_t, const owner_keydata_t *,
+               const ecdsa_p256_signature_t *,
+               const sigverify_spx_signature_t *, const void *, size_t,
+               const void *, size_t, const void *, size_t,
+               const hmac_digest_t *, uint32_t *));
+};
+
+}  // namespace internal
+
+using MockOwnerVerify = testing::StrictMock<internal::MockOwnerVerify>;
+
+}  // namespace rom_test
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_MOCK_OWNER_VERIFY_H_
diff --git a/sw/device/silicon_creator/lib/ownership/mock_ownership_key.cc b/sw/device/silicon_creator/lib/ownership/mock_ownership_key.cc
index 39cce86b5bf0a..9727b84022984 100644
--- a/sw/device/silicon_creator/lib/ownership/mock_ownership_key.cc
+++ b/sw/device/silicon_creator/lib/ownership/mock_ownership_key.cc
@@ -7,14 +7,16 @@
 namespace rom_test {
 extern "C" {
 
-hardened_bool_t ownership_key_validate(size_t page, ownership_key_t key,
-                                       const owner_signature_t *signature,
-                                       const void *message, size_t len) {
-  return MockOwnershipKey::Instance().validate(page, key, signature, message,
-                                               len);
+rom_error_t ownership_key_validate(size_t page, ownership_key_t key,
+                                   uint32_t command, const nonce_t *nonce,
+                                   const owner_signature_t *signature,
+                                   const void *message, size_t len,
+                                   uint32_t *flash_exec) {
+  return MockOwnershipKey::Instance().validate(
+      page, key, command, nonce, signature, message, len, flash_exec);
 }
 
-rom_error_t ownership_seal_init() {
+rom_error_t ownership_seal_init(void) {
   return MockOwnershipKey::Instance().seal_init();
 }
 
@@ -26,5 +28,11 @@ rom_error_t ownership_seal_check(size_t page) {
   return MockOwnershipKey::Instance().seal_check(page);
 }
 
+rom_error_t ownership_secret_new(uint32_t prior_key_alg,
+                                 const owner_keydata_t *prior_owner_key) {
+  return MockOwnershipKey::Instance().secret_new(prior_key_alg,
+                                                 prior_owner_key);
+}
+
 }  // extern "C"
 }  // namespace rom_test
diff --git a/sw/device/silicon_creator/lib/ownership/mock_ownership_key.h b/sw/device/silicon_creator/lib/ownership/mock_ownership_key.h
index a6f936b2ce73c..386cc54aec110 100644
--- a/sw/device/silicon_creator/lib/ownership/mock_ownership_key.h
+++ b/sw/device/silicon_creator/lib/ownership/mock_ownership_key.h
@@ -17,12 +17,13 @@ namespace internal {
  */
 class MockOwnershipKey : public global_mock::GlobalMock<MockOwnershipKey> {
  public:
-  MOCK_METHOD(hardened_bool_t, validate,
-              (size_t, ownership_key_t, const owner_signature_t *, const void *,
-               size_t));
+  MOCK_METHOD(rom_error_t, validate,
+              (size_t, ownership_key_t, uint32_t, const nonce_t *,
+               const owner_signature_t *, const void *, size_t, uint32_t *));
   MOCK_METHOD(rom_error_t, seal_init, ());
   MOCK_METHOD(rom_error_t, seal_page, (size_t));
   MOCK_METHOD(rom_error_t, seal_check, (size_t));
+  MOCK_METHOD(rom_error_t, secret_new, (uint32_t, const owner_keydata_t *));
 };
 
 }  // namespace internal
diff --git a/sw/device/silicon_creator/lib/ownership/owner_block.c b/sw/device/silicon_creator/lib/ownership/owner_block.c
index b11a653f5b6a5..6986e171e9587 100644
--- a/sw/device/silicon_creator/lib/ownership/owner_block.c
+++ b/sw/device/silicon_creator/lib/ownership/owner_block.c
@@ -4,44 +4,225 @@
 
 #include "sw/device/silicon_creator/lib/ownership/owner_block.h"
 
-#include <stdio.h>
-
 #include "sw/device/lib/base/bitfield.h"
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/base/chip.h"
+#include "sw/device/silicon_creator/lib/base/sec_mmio.h"
 #include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
 #include "sw/device/silicon_creator/lib/error.h"
 
 #include "flash_ctrl_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// RAM copy of the owner INFO pages from flash.
+owner_block_t owner_page[2];
+owner_page_status_t owner_page_valid[2];
 
 enum {
   kFlashBankSize = FLASH_CTRL_PARAM_REG_PAGES_PER_BANK,
+  kFlashPageSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE,
+  kFlashTotalSize = 2 * kFlashBankSize,
+
+  kFlashSlotAStart = 0,
+  kFlashSlotAEnd = kFlashSlotAStart + kFlashBankSize,
+  kFlashSlotBStart = kFlashBankSize,
+  kFlashSlotBEnd = kFlashSlotBStart + kFlashBankSize,
+
+  kRomExtSizeInPages = CHIP_ROM_EXT_SIZE_MAX / kFlashPageSize,
+  kRomExtAStart = 0 / kFlashPageSize,
+  kRomExtAEnd = kRomExtAStart + kRomExtSizeInPages,
+  kRomExtBStart = kFlashBankSize + kRomExtAStart,
+  kRomExtBEnd = kRomExtBStart + kRomExtSizeInPages,
+
+  kRomExtRegions = 2,
+  kProtectSlots = 8,
 };
 
+hardened_bool_t owner_block_owner_key_equal(void) {
+  if (launder32(owner_page[0].ownership_key_alg) !=
+      launder32(owner_page[1].ownership_key_alg)) {
+    return kHardenedBoolFalse;
+  }
+  HARDENED_CHECK_EQ(owner_page[0].ownership_key_alg,
+                    owner_page[1].ownership_key_alg);
+  return hardened_memeq(owner_page[0].owner_key.raw,
+                        owner_page[1].owner_key.raw,
+                        ARRAYSIZE(owner_page[0].owner_key.raw));
+}
+
+hardened_bool_t owner_block_newversion_mode(void) {
+  if (owner_page_valid[0] == kOwnerPageStatusSealed &&
+      (owner_page[0].update_mode == kOwnershipUpdateModeNewVersion ||
+       owner_page[0].update_mode == kOwnershipUpdateModeSelfVersion)) {
+    return kHardenedBoolTrue;
+  }
+  return kHardenedBoolFalse;
+}
+
+hardened_bool_t owner_block_page1_valid_for_transfer(boot_data_t *bootdata) {
+  if (bootdata->ownership_state == kOwnershipStateLockedOwner &&
+      owner_page_valid[1] == kOwnerPageStatusSealed) {
+    return kHardenedBoolTrue;
+  }
+  if (owner_page_valid[1] == kOwnerPageStatusSigned) {
+    hmac_digest_t digest;
+    switch (bootdata->ownership_state) {
+      case kOwnershipStateUnlockedAny:
+        // In UnlockedAny, any valid (signed) Owner Page 1 is acceptable.
+        return kHardenedBoolTrue;
+      case kOwnershipStateUnlockedSelf:
+        // In UnlockedSelf, the owner key must be the same.  If not,
+        // skip parsing of Owner Page 1.
+        if (owner_block_owner_key_equal() == kHardenedBoolTrue) {
+          return kHardenedBoolTrue;
+        }
+        break;
+      case kOwnershipStateUnlockedEndorsed:
+        // In UnlockedEndorsed, the owner key must match the key endorsed by the
+        // next_owner field in bootdata.  If not, skip parsing owner page 1.
+        hmac_sha256_init();
+        hmac_sha256_update(&owner_page[1].ownership_key_alg,
+                           sizeof(owner_page[1].ownership_key_alg));
+        hmac_sha256_update(owner_page[1].owner_key.raw,
+                           sizeof(owner_page[1].owner_key.raw));
+        hmac_sha256_process();
+        hmac_sha256_final(&digest);
+        if (hardened_memeq(bootdata->next_owner, digest.digest,
+                           ARRAYSIZE(digest.digest)) == kHardenedBoolTrue) {
+          return kHardenedBoolTrue;
+        }
+        break;
+      default:
+          /* nothing */;
+    }
+  }
+  return kHardenedBoolFalse;
+}
+
+static inline hardened_bool_t is_owner_page(const uint8_t bank,
+                                            const uint8_t page) {
+  // On earlgrey_a1, in banks 0 and 1, pages 5-8 (inclusive) are reserved
+  // for the owner.
+  if (page >= 5 && page <= 8) {
+    return kHardenedBoolTrue;
+  }
+  return kHardenedBoolFalse;
+}
+
+// These checking functions aren't defined in owner_block.h because they aren't
+// meant to be public APIs.  They aren't static so we can access the symbols in
+// the unit test program.
+
+// Checks if the half-open range [start..end) overlaps with the ROM_EXT region.
+// The RomExt_Start/End constants are also expressed as half-open ranges.
+hardened_bool_t rom_ext_flash_overlap(uint32_t start, uint32_t end) {
+  return (start < kRomExtAEnd && end > kRomExtAStart) ||
+                 (start < kRomExtBEnd && end > kRomExtBStart)
+             ? kHardenedBoolTrue
+             : kHardenedBoolFalse;
+}
+
+// Checks if the half-open range [start..end) is exclusively within the ROM_EXT
+// region. The RomExt_Start/End constants are also expressed as half-open
+// ranges.
+hardened_bool_t rom_ext_flash_exclusive(uint32_t start, uint32_t end) {
+  return (kRomExtAStart <= start && start < kRomExtAEnd &&
+          kRomExtAStart < end && end <= kRomExtAEnd) ||
+                 (kRomExtBStart <= start && start < kRomExtBEnd &&
+                  kRomExtBStart < end && end <= kRomExtBEnd)
+             ? kHardenedBoolTrue
+             : kHardenedBoolFalse;
+}
+
+rom_error_t owner_block_application_key_check(
+    const owner_application_key_t *key) {
+  if (key->header.length < offsetof(owner_application_key_t, data) ||
+      key->header.length > sizeof(owner_application_key_t)) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  switch (key->key_alg) {
+    case kOwnershipKeyAlgEcdsaP256:
+    case kOwnershipKeyAlgHybridSpxPure:
+    case kOwnershipKeyAlgHybridSpxPrehash:
+      break;
+    default:
+      return kErrorOwnershipInvalidAlgorithm;
+  }
+  return kErrorOk;
+}
+
+rom_error_t owner_block_flash_info_check(
+    const owner_flash_info_config_t *info) {
+  if (info->header.length < sizeof(owner_flash_info_config_t)) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  size_t len = (info->header.length - sizeof(owner_flash_info_config_t));
+  // Determine if the non-header length is an even multiple of the per-page
+  // configuration item size.
+  if (len % sizeof(owner_info_page_t) != 0) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  len /= sizeof(owner_info_page_t);
+  const owner_info_page_t *config = info->config;
+  for (size_t i = 0; i < len; ++i, ++config) {
+    if (is_owner_page(config->bank, config->page) != kHardenedBoolTrue) {
+      return kErrorOwnershipBadInfoPage;
+    }
+  }
+  return kErrorOk;
+}
+
+rom_error_t owner_block_rescue_check(const owner_rescue_config_t *rescue) {
+  if (rescue->header.length < sizeof(owner_rescue_config_t)) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  uint32_t end = rescue->start + rescue->size;
+  if (rescue->start < kRomExtSizeInPages || end > kFlashBankSize) {
+    return kErrorOwnershipInvalidRescueBounds;
+  }
+  return kErrorOk;
+}
+
+void owner_config_default(owner_config_t *config) {
+  // Use a bogus pointer value to avoid the all-zeros pattern of NULL.
+  config->flash = (const owner_flash_config_t *)kHardenedBoolFalse;
+  config->info = (const owner_flash_info_config_t *)kHardenedBoolFalse;
+  config->rescue = (const owner_rescue_config_t *)kHardenedBoolFalse;
+  config->isfb = (const owner_isfb_config_t *)kHardenedBoolFalse;
+  config->sram_exec = kOwnerSramExecModeDisabledLocked;
+  config->boot_svc_after_wakeup = kHardenedBoolFalse;
+}
+
 rom_error_t owner_block_parse(const owner_block_t *block,
+                              hardened_bool_t check_only,
                               owner_config_t *config,
                               owner_application_keyring_t *keyring) {
   if (block->header.tag != kTlvTagOwner)
     return kErrorOwnershipInvalidTag;
   if (block->header.length != sizeof(owner_block_t))
     return kErrorOwnershipInvalidTagLength;
+  if (block->header.version.major != 0)
+    return kErrorOwnershipOWNRVersion;
 
-  config->sram_exec = block->sram_exec_mode;
-
-  // Use a bogus pointer value to avoid the all-zeros pattern of NULL.
-  config->flash = (const owner_flash_config_t *)kHardenedBoolFalse;
-  config->info = (const owner_flash_info_config_t *)kHardenedBoolFalse;
-  config->rescue = (const owner_rescue_config_t *)kHardenedBoolFalse;
+  if (check_only == kHardenedBoolFalse) {
+    owner_config_default(config);
+    config->sram_exec = block->sram_exec_mode;
+    config->boot_svc_after_wakeup = block->boot_svc_after_wakeup;
+  }
 
   uint32_t remain = sizeof(block->data);
   uint32_t offset = 0;
-  while (remain) {
+  while (remain >= sizeof(tlv_header_t)) {
     const tlv_header_t *item = (const tlv_header_t *)(block->data + offset);
-    if (item->tag == kTlvTagNotPresent || item->length == kTlvTagNotPresent) {
+    if (item->tag == kTlvTagNotPresent) {
       break;
     }
-    if (item->length < 8 || item->length > remain) {
+    if (item->length < 8 || item->length > remain || item->length % 4 != 0) {
       return kErrorOwnershipInvalidTagLength;
     }
     remain -= item->length;
@@ -50,28 +231,71 @@ rom_error_t owner_block_parse(const owner_block_t *block,
     switch (launder32(item->tag)) {
       case kTlvTagApplicationKey:
         HARDENED_CHECK_EQ(tag, kTlvTagApplicationKey);
-        if (keyring->length < ARRAYSIZE(keyring->key)) {
-          keyring->key[keyring->length++] =
-              (const owner_application_key_t *)item;
+        if (item->version.major != 0)
+          return kErrorOwnershipAPPKVersion;
+
+        if (check_only == kHardenedBoolFalse) {
+          if (keyring->length < ARRAYSIZE(keyring->key)) {
+            keyring->key[keyring->length++] =
+                (const owner_application_key_t *)item;
+          }
+        } else {
+          HARDENED_RETURN_IF_ERROR(owner_block_application_key_check(
+              (const owner_application_key_t *)item));
         }
         break;
       case kTlvTagFlashConfig:
         HARDENED_CHECK_EQ(tag, kTlvTagFlashConfig);
-        if ((hardened_bool_t)config->flash != kHardenedBoolFalse)
-          return kErrorOwnershipDuplicateItem;
-        config->flash = (const owner_flash_config_t *)item;
+        if (item->version.major != 0)
+          return kErrorOwnershipFLSHVersion;
+        if (check_only == kHardenedBoolFalse) {
+          if ((hardened_bool_t)config->flash != kHardenedBoolFalse)
+            return kErrorOwnershipDuplicateItem;
+          config->flash = (const owner_flash_config_t *)item;
+        } else {
+          HARDENED_RETURN_IF_ERROR(
+              owner_block_flash_check((const owner_flash_config_t *)item));
+        }
         break;
       case kTlvTagInfoConfig:
         HARDENED_CHECK_EQ(tag, kTlvTagInfoConfig);
-        if ((hardened_bool_t)config->info != kHardenedBoolFalse)
-          return kErrorOwnershipDuplicateItem;
-        config->info = (const owner_flash_info_config_t *)item;
+        if (item->version.major != 0)
+          return kErrorOwnershipINFOVersion;
+        if (check_only == kHardenedBoolFalse) {
+          if ((hardened_bool_t)config->info != kHardenedBoolFalse)
+            return kErrorOwnershipDuplicateItem;
+          config->info = (const owner_flash_info_config_t *)item;
+        } else {
+          HARDENED_RETURN_IF_ERROR(owner_block_flash_info_check(
+              (const owner_flash_info_config_t *)item));
+        }
         break;
       case kTlvTagRescueConfig:
         HARDENED_CHECK_EQ(tag, kTlvTagRescueConfig);
-        if ((hardened_bool_t)config->rescue != kHardenedBoolFalse)
-          return kErrorOwnershipDuplicateItem;
-        config->rescue = (const owner_rescue_config_t *)item;
+        if (item->version.major != 0)
+          return kErrorOwnershipRESQVersion;
+        if (check_only == kHardenedBoolFalse) {
+          if ((hardened_bool_t)config->rescue != kHardenedBoolFalse)
+            return kErrorOwnershipDuplicateItem;
+          config->rescue = (const owner_rescue_config_t *)item;
+          owner_block_rescue_apply(config->rescue);
+        } else {
+          HARDENED_RETURN_IF_ERROR(
+              owner_block_rescue_check((const owner_rescue_config_t *)item));
+        }
+        break;
+      case kTlvTagIntegrationSpecificFirmwareBinding:
+        HARDENED_CHECK_EQ(tag, kTlvTagIntegrationSpecificFirmwareBinding);
+        if (item->version.major != 0)
+          return kErrorOwnershipISFBVersion;
+        if (check_only == kHardenedBoolFalse) {
+          if ((hardened_bool_t)config->isfb != kHardenedBoolFalse)
+            return kErrorOwnershipDuplicateItem;
+          config->isfb = (const owner_isfb_config_t *)item;
+        } else {
+          HARDENED_RETURN_IF_ERROR(
+              owner_isfb_config_check((const owner_isfb_config_t *)item));
+        }
         break;
       default:
         return kErrorOwnershipInvalidTag;
@@ -80,11 +304,95 @@ rom_error_t owner_block_parse(const owner_block_t *block,
   return kErrorOk;
 }
 
+static hardened_bool_t in_flash_slot(uint32_t bank_start, uint32_t start,
+                                     uint32_t end) {
+  uint32_t bank_end = bank_start + kFlashBankSize;
+  return (bank_start <= start && start < bank_end && bank_start < end &&
+          end <= bank_end)
+             ? kHardenedBoolTrue
+             : kHardenedBoolFalse;
+}
+
+rom_error_t owner_block_flash_check(const owner_flash_config_t *flash) {
+  if (flash->header.length < sizeof(owner_flash_config_t)) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  size_t len = (flash->header.length - sizeof(owner_flash_config_t));
+  // Determine if the non-header length is an even multiple of the per-region
+  // configuration item size.
+  if (len % sizeof(owner_flash_region_t) != 0) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  len /= sizeof(owner_flash_region_t);
+  if (len > kProtectSlots - kRomExtRegions) {
+    return kErrorOwnershipFlashConfigLength;
+  }
+
+  uint32_t num_slot_a = 0;
+  uint32_t num_slot_b = 0;
+  const owner_flash_region_t *config = flash->config;
+  uint32_t crypt = 0;
+  for (size_t i = 0; i < len; ++i, ++config, crypt += 0x11111111) {
+    uint32_t start = config->start;
+    uint32_t end = start + config->size;
+    // When checking the flash configuration, a region is a ROM_EXT region if
+    // it overlaps the ROM_EXT bounds.  It is an error to accept a new config
+    // with a flash region that overlaps the ROM_EXT.
+    if (rom_ext_flash_overlap(start, end) == kHardenedBoolTrue) {
+      return kErrorOwnershipFlashConfigRomExt;
+    } else if (in_flash_slot(kFlashSlotAStart, start, end) ==
+               kHardenedBoolTrue) {
+      num_slot_a += 1;
+      if (num_slot_a > FLASH_CONFIG_REGIONS_PER_SLOT) {
+        return kErrorOwnershipFlashConfigSlots;
+      }
+    } else if (in_flash_slot(kFlashSlotBStart, start, end) ==
+               kHardenedBoolTrue) {
+      num_slot_b += 1;
+      if (num_slot_b > FLASH_CONFIG_REGIONS_PER_SLOT) {
+        return kErrorOwnershipFlashConfigSlots;
+      }
+    } else {
+      // Flash regions are not allowed to span between slots or extend beyond
+      // the end of flash.
+      return kErrorOwnershipFlashConfigBounds;
+    }
+  }
+  return kErrorOk;
+}
+
+rom_error_t owner_isfb_config_check(const owner_isfb_config_t *isfb) {
+  if (isfb->header.length < sizeof(owner_isfb_config_t)) {
+    return kErrorOwnershipInvalidTagLength;
+  }
+  if (is_owner_page(isfb->bank, isfb->page) == kHardenedBoolFalse) {
+    return kErrorOwnershipISFBPage;
+  }
+  if (isfb->product_words > 256) {
+    return kErrorOwnershipISFBSize;
+  }
+  return kErrorOk;
+}
+
 rom_error_t owner_block_flash_apply(const owner_flash_config_t *flash,
                                     uint32_t config_side,
-                                    uint32_t primary_side) {
-  if ((hardened_bool_t)flash == kHardenedBoolFalse)
+                                    uint32_t owner_lockdown,
+                                    uint32_t *mp_index) {
+  if ((hardened_bool_t)flash == kHardenedBoolFalse) {
+    // If there is no flash configuration, there is nothing to do in this
+    // function.
     return kErrorOk;
+  }
+  // We don't check `mp_index` for null because:
+  // - it is a programming error to pass null for that parameter.
+  // - if we were to return an error, we'd either skip flash configuration or
+  //   bail out of the boot flow, resulting in a boot fault.
+  // - if an attacker were to fault the value to null, we don't want an error
+  //   case to cause skipping flash configuration.  By allowing a read to null,
+  //   a fault will occur and reboot the chip.
+
+  // TODO: Hardening: lockdown should be one of kBootSlotA, kBootSlotB or
+  // kHardenedBoolFalse.
   uint32_t start = config_side == kBootSlotA   ? 0
                    : config_side == kBootSlotB ? kFlashBankSize
                                                : 0xFFFFFFFF;
@@ -93,13 +401,31 @@ rom_error_t owner_block_flash_apply(const owner_flash_config_t *flash,
                                              : 0;
   size_t len = (flash->header.length - sizeof(owner_flash_config_t)) /
                sizeof(owner_flash_region_t);
-  if (len >= 8) {
-    return kErrorOwnershipFlashConfigLenth;
+  if (len > kProtectSlots) {
+    // We really want `kProtectSlots - kRomExtRegions`, but we have to
+    // accomodate configurations that may have specified ROM_EXT protection
+    // regions.  We deal with that fact in the loop below.
+    return kErrorOwnershipFlashConfigLength;
   }
 
   const owner_flash_region_t *config = flash->config;
   uint32_t crypt = 0;
   for (size_t i = 0; i < len; ++i, ++config, crypt += 0x11111111) {
+    // When applying the flash configuration, a region is a ROM_EXT region if
+    // it is exclusively within the ROM_EXT bounds.  This sets the creator
+    // the lockdown policy for a region that is exclusively the creator
+    // region.
+    uint32_t region_start = config->start;
+    uint32_t region_end = region_start + config->size;
+    if (rom_ext_flash_exclusive(region_start, region_end) ==
+        kHardenedBoolTrue) {
+      // Flash region is a ROM_EXT region.  Do nothing.
+      // Some early configurations explicitly set parameters for the ROM_EXT
+      // region.  We ignore these regions in favor of the ROM_EXT setting
+      // its own protection parameters.
+      continue;
+    }
+
     if (config->start >= start && config->start + config->size <= end) {
       uint32_t val = config->properties ^ crypt;
       flash_ctrl_cfg_t cfg = {
@@ -114,27 +440,42 @@ rom_error_t owner_block_flash_apply(const owner_flash_config_t *flash,
           .erase = bitfield_field32_read(val, FLASH_CONFIG_ERASE),
       };
 
-      if (config_side == primary_side &&
-          bitfield_field32_read(val, FLASH_CONFIG_PROTECT_WHEN_PRIMARY) !=
-              kMultiBitBool4False) {
+      uint32_t pwp =
+          bitfield_field32_read(val, FLASH_CONFIG_PROTECT_WHEN_PRIMARY);
+      hardened_bool_t lock =
+          bitfield_field32_read(val, FLASH_CONFIG_LOCK) != kMultiBitBool4False
+              ? kHardenedBoolTrue
+              : kHardenedBoolFalse;
+
+      // Flash region is an owner region.
+      // If the config_side is the same as the owner lockdown side, and
+      // protect_when_primary is requested, deny write/erase to the region.
+      if (config_side == owner_lockdown && pwp != kMultiBitBool4False) {
         perm.write = kMultiBitBool4False;
         perm.erase = kMultiBitBool4False;
       }
-      flash_ctrl_data_region_protect(i, config->start, config->size, perm, cfg);
-    }
-  }
-  return kErrorOk;
-}
 
-static inline hardened_bool_t is_owner_page(const owner_info_page_t *config) {
-  if (config->bank == 0) {
-    if (config->page >= 6 && config->page <= 9) {
-      // Currently, bank0, pages 6-9 (inclusive) are the pages reserved
-      // for the owner's use.
-      return kHardenedBoolTrue;
+      // If we aren't in a lockdown state, then do not lock the region
+      // configuration via the flash_ctrl regwen bits.
+      if (owner_lockdown == kHardenedBoolFalse) {
+        lock = kHardenedBoolFalse;
+      }
+
+      if (*mp_index < 2 * FLASH_CONFIG_REGIONS_PER_SLOT) {
+        // We can only apply the region protection of mp_index is
+        // within its acceptable bounds.
+        flash_ctrl_data_region_protect(kRomExtRegions + *mp_index,
+                                       config->start, config->size, perm, cfg,
+                                       lock);
+        SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioDataRegionProtect + lock ==
+                                         kHardenedBoolTrue
+                                     ? kFlashCtrlSecMmioDataRegionProtectLock
+                                     : 0);
+      }
+      *mp_index += 1;
     }
   }
-  return kHardenedBoolFalse;
+  return kErrorOk;
 }
 
 rom_error_t owner_block_info_apply(const owner_flash_info_config_t *info) {
@@ -145,20 +486,10 @@ rom_error_t owner_block_info_apply(const owner_flash_info_config_t *info) {
   const owner_info_page_t *config = info->config;
   uint32_t crypt = 0;
   for (size_t i = 0; i < len; ++i, ++config, crypt += 0x11111111) {
-    if (is_owner_page(config) == kHardenedBoolTrue) {
-      flash_ctrl_info_page_t page = {
-          .base_addr = config->bank * FLASH_CTRL_PARAM_BYTES_PER_BANK +
-                       config->page * FLASH_CTRL_PARAM_BYTES_PER_PAGE,
-          .cfg_wen_addr =
-              config->page * sizeof(uint32_t) +
-              (config->bank == 0 ? FLASH_CTRL_BANK0_INFO0_REGWEN_0_REG_OFFSET
-                                 : FLASH_CTRL_BANK1_INFO0_REGWEN_0_REG_OFFSET),
-          .cfg_addr = config->page * sizeof(uint32_t) +
-                      (config->bank == 0
-                           ? FLASH_CTRL_BANK0_INFO0_PAGE_CFG_0_REG_OFFSET
-                           : FLASH_CTRL_BANK1_INFO0_PAGE_CFG_0_REG_OFFSET),
-      };
-
+    if (is_owner_page(config->bank, config->page) == kHardenedBoolTrue) {
+      flash_ctrl_info_page_t page;
+      HARDENED_RETURN_IF_ERROR(flash_ctrl_info_type0_params_build(
+          config->bank, config->page, &page));
       uint32_t val = config->properties ^ crypt;
       flash_ctrl_cfg_t cfg = {
           .scrambling = bitfield_field32_read(val, FLASH_CONFIG_SCRAMBLE),
@@ -179,15 +510,137 @@ rom_error_t owner_block_info_apply(const owner_flash_info_config_t *info) {
   return kErrorOk;
 }
 
+rom_error_t owner_block_info_lockdown(const owner_flash_info_config_t *info) {
+  if ((hardened_bool_t)info == kHardenedBoolFalse)
+    return kErrorOk;
+  size_t len = (info->header.length - sizeof(owner_flash_info_config_t)) /
+               sizeof(owner_info_page_t);
+  const owner_info_page_t *config = info->config;
+  uint32_t crypt = 0;
+  for (size_t i = 0; i < len; ++i, ++config, crypt += 0x11111111) {
+    if (is_owner_page(config->bank, config->page) == kHardenedBoolTrue) {
+      flash_ctrl_info_page_t page;
+      HARDENED_RETURN_IF_ERROR(flash_ctrl_info_type0_params_build(
+          config->bank, config->page, &page));
+      uint32_t val = config->access ^ crypt;
+      if (bitfield_field32_read(val, FLASH_CONFIG_LOCK) !=
+          kMultiBitBool4False) {
+        flash_ctrl_info_cfg_lock(&page);
+        SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioInfoCfgLock);
+      }
+    }
+  }
+  return kErrorOk;
+}
+
+rom_error_t owner_block_info_isfb_erase_enable(
+    boot_data_t *bootdata, const owner_config_t *owner_config) {
+  if (bootdata->ownership_state != kOwnershipStateLockedOwner)
+    return kErrorOk;
+  // Check whether the ISFB configuration exists.
+  if ((hardened_bool_t)owner_config->isfb == kHardenedBoolFalse)
+    return kErrorOk;
+  // Check whether the FLASH INFO configuration exists.
+  if ((hardened_bool_t)owner_config->info == kHardenedBoolFalse)
+    return kErrorOk;
+
+  const owner_flash_info_config_t *info = owner_config->info;
+  size_t len = (info->header.length - sizeof(owner_flash_info_config_t)) /
+               sizeof(owner_info_page_t);
+
+  const owner_info_page_t *config = info->config;
+  uint32_t crypt = 0;
+  for (size_t i = 0; i < len; ++i, ++config, crypt += 0x11111111) {
+    if (is_owner_page(config->bank, config->page) == kHardenedBoolTrue &&
+        config->bank == owner_config->isfb->bank &&
+        config->page == owner_config->isfb->page) {
+      flash_ctrl_info_page_t page;
+      HARDENED_RETURN_IF_ERROR(flash_ctrl_info_type0_params_build(
+          config->bank, config->page, &page));
+
+      uint32_t val = config->access ^ crypt;
+      flash_ctrl_perms_t perm = {
+          .read = bitfield_field32_read(val, FLASH_CONFIG_READ),
+          .write = bitfield_field32_read(val, FLASH_CONFIG_PROGRAM),
+          .erase = kMultiBitBool4True,
+      };
+      flash_ctrl_info_perms_set(&page, perm);
+    }
+  }
+  return kErrorOk;
+}
+
+rom_error_t owner_block_rescue_apply(const owner_rescue_config_t *rescue) {
+  rescue_detect_t detect = bitfield_field32_read(rescue->detect, RESCUE_DETECT);
+  uint32_t index = bitfield_field32_read(rescue->detect, RESCUE_DETECT_INDEX);
+  bool pull_en =
+      bitfield_bit32_read(rescue->gpio, RESCUE_MISC_GPIO_PULL_EN_BIT);
+  bool gpio_value =
+      bitfield_bit32_read(rescue->gpio, RESCUE_MISC_GPIO_VALUE_BIT);
+  switch (detect) {
+    case kRescueDetectGpio:
+      if (index <= kTopEarlgreyMuxedPadsLast) {
+        // Set the pad for input as Gpio0.  On earlgrey, the pad index is two
+        // less than the peripheral input select.
+        pinmux_configure_input(0, index + 2);
+        // If configured, enable the pull resistor in the opposite direction of
+        // the detection value.
+        pinmux_enable_pull(index, pull_en, !gpio_value);
+      }
+      break;
+    default:
+        /* nothing to do */;
+  }
+  return kErrorOk;
+}
+
 rom_error_t owner_keyring_find_key(const owner_application_keyring_t *keyring,
-                                   uint32_t key_alg, uint32_t key_id,
-                                   size_t *index) {
-  for (size_t i = 0; i < keyring->length; ++i) {
-    if (keyring->key[i]->key_alg == key_alg &&
-        keyring->key[i]->data.id == key_id) {
+                                   uint32_t key_id, size_t *index) {
+  for (size_t i = 0; i < keyring->length && i < ARRAYSIZE(keyring->key); ++i) {
+    uint32_t id = keyring->key[i]->data.id;
+    if ((keyring->key[i]->key_alg & kOwnershipKeyAlgCategoryMask) ==
+        kOwnershipKeyAlgCategoryHybrid) {
+      // The ID of a hybrid key is the xor of the IDs of each key.
+      id ^= keyring->key[i]->data.hybrid.spx.data[0];
+    }
+    if (id == key_id) {
       *index = i;
       return kErrorOk;
     }
   }
   return kErrorOwnershipKeyNotFound;
 }
+
+size_t owner_block_key_page(const owner_application_key_t *key) {
+  // The key pointer must point to a memory address on one of the two owner
+  // pages.
+  HARDENED_CHECK_GT((uintptr_t)key, (uintptr_t)&owner_page[0]);
+  HARDENED_CHECK_LT((uintptr_t)key,
+                    (uintptr_t)&owner_page[ARRAYSIZE(owner_page)]);
+  return (uintptr_t)key < (uintptr_t)&owner_page[1] ? 0 : 1;
+}
+
+hardened_bool_t owner_rescue_command_allowed(
+    const owner_rescue_config_t *rescue, uint32_t command) {
+  // If no rescue configuration is supplied in the owner config, then all rescue
+  // commands are allowed.
+  if ((hardened_bool_t)rescue == kHardenedBoolFalse)
+    return kHardenedBoolTrue;
+
+  hardened_bool_t allowed = kHardenedBoolFalse;
+  size_t length = (rescue->header.length - sizeof(*rescue)) / sizeof(uint32_t);
+  for (size_t i = 0; i < length; ++i) {
+    if (command == rescue->command_allow[i]) {
+      allowed = kHardenedBoolTrue;
+    }
+  }
+  return allowed;
+}
+
+void owner_block_measurement(size_t page, hmac_digest_t *measurement) {
+  HARDENED_CHECK_LT(page, ARRAYSIZE(owner_page));
+  // Digest of the contents of the owner page, not including the signature or
+  // the seal.
+  size_t len = offsetof(owner_block_t, signature);
+  hmac_sha256(&owner_page[page], len, measurement);
+}
diff --git a/sw/device/silicon_creator/lib/ownership/owner_block.h b/sw/device/silicon_creator/lib/ownership/owner_block.h
index de2fcc1d54798..fa06c3da06394 100644
--- a/sw/device/silicon_creator/lib/ownership/owner_block.h
+++ b/sw/device/silicon_creator/lib/ownership/owner_block.h
@@ -5,6 +5,8 @@
 #ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNER_BLOCK_H_
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNER_BLOCK_H_
 
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/lib/ownership/datatypes.h"
 
@@ -12,6 +14,24 @@
 extern "C" {
 #endif  // __cplusplus
 
+/**
+ * The signature or sealing status of an owner page.
+ */
+typedef enum owner_page_status {
+  /** Invalid: `INV_`. */
+  kOwnerPageStatusInvalid = 0x5f564e49,
+  /** Sealed: `SEAL`. */
+  kOwnerPageStatusSealed = 0x4c414553,
+  /** Signed: `SIGN`. */
+  kOwnerPageStatusSigned = 0x4e474953,
+} owner_page_status_t;
+
+/**
+ * RAM copies of the owner pages read out of flash INFO pages.
+ */
+extern owner_block_t owner_page[2];
+extern owner_page_status_t owner_page_valid[2];
+
 /**
  * The owner config struct contains high-level configuration items
  * from an owner block.
@@ -19,12 +39,18 @@ extern "C" {
 typedef struct owner_config {
   /** The requested SRAM execution configuration. */
   owner_sram_exec_mode_t sram_exec;
+  /** Allow boot_svc after wakeup. */
+  hardened_bool_t boot_svc_after_wakeup;
   /** The requested flash configuration. */
   const owner_flash_config_t *flash;
   /** The requested flash INFO configuration. */
   const owner_flash_info_config_t *info;
   /** The requested rescue configuration. */
   const owner_rescue_config_t *rescue;
+  /**
+   * The requested Integrator Specific Firmware Binding (ISFB) configuration.
+   */
+  const owner_isfb_config_t *isfb;
 } owner_config_t;
 
 /**
@@ -38,30 +64,92 @@ typedef struct owner_application_keyring {
   const owner_application_key_t *key[16];
 } owner_application_keyring_t;
 
+/**
+ * Determine if the owner keys are equal between owner page 0 and 1.
+ *
+ * @return kHardenedBoolTrue if the owner key are the same between both pages.
+ */
+hardened_bool_t owner_block_owner_key_equal(void);
+
+/**
+ * Determine if the ownership update mode is one of the "newversion" modes.
+ *
+ * @return kHardenedBoolTrue if it is a newversion mode.
+ */
+hardened_bool_t owner_block_newversion_mode(void);
+
+/**
+ * Check if owner page 1 is valid for ownership transfer.
+ *
+ * @param bootdata The current bootdata.
+ * @return kHardenedBoolTrue if page 1 is valid.
+ */
+hardened_bool_t owner_block_page1_valid_for_transfer(boot_data_t *bootdata);
+
+/**
+ * Initialize the owner config with default values.
+ *
+ * The sram_exec mode is set to DisabledLocked and the three configuration
+ * pointers are set to kHardenedBoolFalse.
+ *
+ * @param config A pointer to a config struct holding pointers to config items.
+ */
+void owner_config_default(owner_config_t *config);
+
 /**
  * Parse an owner block, extracting pointers to keys and configuration items.
  *
  * @param block The owner block to parse.
+ * @param check_only Check the owner_block for validity, but do not parse into
+ *                   config and keyring structs.
  * @param config A pointer to a config struct holding pointers to config items.
  * @param keyring A pointer to a keyring struct holding application key
  * pointers.
  * @return error code.
  */
 rom_error_t owner_block_parse(const owner_block_t *block,
+                              hardened_bool_t check_only,
                               owner_config_t *config,
                               owner_application_keyring_t *keyring);
 
+/**
+ * Check the flash config for errors.
+ *
+ * Currently, this checks that a flash config region covering the ROM_EXT
+ * is compatible with the default flash config region.
+ *
+ * @param flash A pointer to a flash configuration struct.
+ * @return error code.
+ */
+rom_error_t owner_block_flash_check(const owner_flash_config_t *flash);
+
+/**
+ * Check the ISFB configuration for errors.
+ *
+ * Currently, this checks that the ISFB configuration is on an owner page,
+ * and that the product_words field is within bounds.
+ *
+ * @param isfb A pointer to an ISFB configuration struct.
+ * @return error code.
+ */
+rom_error_t owner_isfb_config_check(const owner_isfb_config_t *isfb);
+
 /**
  * Apply the flash configuration parameters from the owner block.
  *
  * @param flash A pointer to a flash configuration struct.
  * @param config_side Which side of the flash to configure.
- * @param primary_side Which side of the flash is primary.
+ * @param owner_lockdown Apply any special lockdown configuration to
+ *                       silicon_owner regions on the specified side of the
+ *                       flash.  May use kHardenedBoolFalse to skip lockdown.
+ * @param mp_index The destination configuration index.  The value should be
+ *                 initialized to zero before the first call to this function.
  * @return error code.
  */
 rom_error_t owner_block_flash_apply(const owner_flash_config_t *flash,
                                     uint32_t config_side,
-                                    uint32_t primary_side);
+                                    uint32_t owner_lockdown,
+                                    uint32_t *mp_index);
 
 /**
  * Apply the flash info configuration parameters from the owner block.
@@ -71,10 +159,70 @@ rom_error_t owner_block_flash_apply(const owner_flash_config_t *flash,
  */
 rom_error_t owner_block_info_apply(const owner_flash_info_config_t *info);
 
+/**
+ * Lock the flash info configuration parameters as requested by the owner block.
+ *
+ * @param info A pointer to a flash_info configuration.
+ * @return error code.
+ */
+rom_error_t owner_block_info_lockdown(const owner_flash_info_config_t *info);
+
+/**
+ * Enable erase on the ISFB info page.
+ *
+ * Unconditionally enables erase on the ISFB info page. This function is used
+ * to enable the erase policy for the ISFB info page.
+ *
+ * The function does not enable erase on the ISFB info page if the owner config
+ * does not contain the ISFB or info page owner blocks. The settings are also
+ * ignored if the device is not in the `kOwnershipStateLockedOwner` state.
+ *
+ * @param bootdata The current boot data.
+ * @param owner_config The owner configuration.
+ *
+ * @return The result of the operation.
+ */
+rom_error_t owner_block_info_isfb_erase_enable(
+    boot_data_t *bootdata, const owner_config_t *owner_config);
+
 rom_error_t owner_keyring_find_key(const owner_application_keyring_t *keyring,
-                                   uint32_t key_alg, uint32_t key_id,
-                                   size_t *index);
+                                   uint32_t key_id, size_t *index);
 
+/**
+ * Apply the rescue configuration parameters in the owner block.
+ *
+ * This function sets up the trigger detection when a GPIO trigger specified in
+ * the configuration.
+ *
+ * @param rescue A pointer to the rescue configuration.
+ * @return error code.
+ */
+rom_error_t owner_block_rescue_apply(const owner_rescue_config_t *rescue);
+
+/**
+ * Determine whether the given key is on owner page 0 or page 1.
+ *
+ * @return page number.
+ */
+size_t owner_block_key_page(const owner_application_key_t *key);
+
+/**
+ * Determine whether a particular rescue command is allowed.
+ *
+ * @param rescue A pointer to the rescue configuration.
+ * @param command The rescue command to check.
+ * @return kHardenedBoolTrue if allowed.
+ */
+hardened_bool_t owner_rescue_command_allowed(
+    const owner_rescue_config_t *rescue, uint32_t command);
+
+/**
+ * Measure the content of the owner page.
+ *
+ * @param page The owner page to measure.
+ * @param measurement The measurement value.
+ */
+void owner_block_measurement(size_t page, hmac_digest_t *mesaurment);
 #ifdef __cplusplus
 }  // extern "C"
 #endif  // __cplusplus
diff --git a/sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc b/sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc
index cdae021d7d269..b51fbb7230d95 100644
--- a/sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc
+++ b/sw/device/silicon_creator/lib/ownership/owner_block_unittest.cc
@@ -5,6 +5,7 @@
 #include "sw/device/silicon_creator/lib/ownership/owner_block.h"
 
 #include <stdint.h>
+#include <tuple>
 
 #include "gmock/gmock.h"
 #include "gtest/gtest.h"
@@ -20,14 +21,28 @@ namespace {
 #include "sw/device/silicon_creator/lib/ownership/testdata/basic_owner_testdata.h"
 
 using rom_test::FlashCfg;
+using rom_test::FlashInfoPage;
 using rom_test::FlashPerms;
 using rom_test::MockFlashCtrl;
 using ::testing::_;
+using ::testing::DoAll;
+using ::testing::Return;
+using ::testing::SetArgPointee;
 using ::testutil::BinaryBlob;
 
 class OwnerBlockTest : public rom_test::RomTest {
  protected:
   MockFlashCtrl flash_ctrl_;
+  flash_ctrl_cfg_t default_config = {
+      .scrambling = kMultiBitBool4False,
+      .ecc = kMultiBitBool4False,
+      .he = kMultiBitBool4False,
+  };
+
+  void SetUp() override {
+    ON_CALL(flash_ctrl_, DataDefaultCfgGet)
+        .WillByDefault(Return(default_config));
+  }
 };
 
 // clang-format off
@@ -52,19 +67,48 @@ class OwnerBlockTest : public rom_test::RomTest {
   )
 // clang-format on
 
-const owner_flash_config_t simple_flash_config = {
+struct owner_flash_config_1 {
+  tlv_header_t header;
+  owner_flash_region_t config[1];
+};
+
+struct owner_flash_config_2 {
+  tlv_header_t header;
+  owner_flash_region_t config[2];
+};
+
+struct owner_flash_config_4 {
+  tlv_header_t header;
+  owner_flash_region_t config[4];
+};
+
+struct owner_flash_config_8 {
+  tlv_header_t header;
+  owner_flash_region_t config[8];
+};
+
+struct owner_flash_config_9 {
+  tlv_header_t header;
+  owner_flash_region_t config[9];
+};
+
+struct owner_flash_info_config_2 {
+  tlv_header_t header;
+  owner_info_page_t config[2];
+};
+
+const owner_flash_config_4 simple_flash_config_wrapped = {
     .header =
         {
             .tag = kTlvTagFlashConfig,
-            .length =
-                sizeof(owner_flash_config_t) + 6 * sizeof(owner_flash_region_t),
+            .length = sizeof(owner_flash_config_4),
         },
     .config =
         {
             {
-                // SideA ROM_EXT.
-                .start = 0,
-                .size = 32,
+                // SideA FIRMWARE.
+                .start = 32,
+                .size = 192,
                 .access = FLASH_ACCESS(
                     /*index=*/0,
                     /*read=*/true,
@@ -74,116 +118,134 @@ const owner_flash_config_t simple_flash_config = {
                     /*lock=*/false),
                 .properties = FLASH_PROP(
                     /*index=*/0,
-                    /*scramble=*/false,
-                    /*ecc=*/false,
+                    /*scramble=*/true,
+                    /*ecc=*/true,
                     /*he=*/false),
-
             },
             {
-                // SideA FIRMWARE.
-                .start = 32,
-                .size = 192,
+                // SideA Filesystem.
+                .start = 224,
+                .size = 32,
                 .access = FLASH_ACCESS(
                     /*index=*/1,
                     /*read=*/true,
                     /*program=*/true,
                     /*erase=*/true,
-                    /*pwp=*/true,
+                    /*pwp=*/false,
                     /*lock=*/false),
                 .properties = FLASH_PROP(
                     /*index=*/1,
-                    /*scramble=*/true,
-                    /*ecc=*/true,
-                    /*he=*/false),
-
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/true),
             },
             {
-                // SideA Filesystem.
-                .start = 224,
-                .size = 32,
+                // SideB FIRMWARE.
+                .start = 256 + 32,
+                .size = 192,
                 .access = FLASH_ACCESS(
                     /*index=*/2,
                     /*read=*/true,
                     /*program=*/true,
                     /*erase=*/true,
-                    /*pwp=*/false,
+                    /*pwp=*/true,
                     /*lock=*/false),
                 .properties = FLASH_PROP(
                     /*index=*/2,
-                    /*scramble=*/false,
-                    /*ecc=*/false,
-                    /*he=*/true),
-
+                    /*scramble=*/true,
+                    /*ecc=*/true,
+                    /*he=*/false),
             },
             {
-                // SideB ROM_EXT.
-                .start = 256 + 0,
+                // SideB Filesystem.
+                .start = 256 + 224,
                 .size = 32,
                 .access = FLASH_ACCESS(
                     /*index=*/3,
                     /*read=*/true,
                     /*program=*/true,
                     /*erase=*/true,
-                    /*pwp=*/true,
+                    /*pwp=*/false,
                     /*lock=*/false),
                 .properties = FLASH_PROP(
                     /*index=*/3,
                     /*scramble=*/false,
                     /*ecc=*/false,
-                    /*he=*/false),
+                    /*he=*/true),
             },
+        },
+};
+
+const owner_flash_config_t &simple_flash_config =
+    reinterpret_cast<const owner_flash_config_t &>(simple_flash_config_wrapped);
+
+const owner_flash_config_2 flash_config_contains_rom_ext_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_2),
+        },
+    .config =
+        {
             {
-                // SideB FIRMWARE.
-                .start = 256 + 32,
-                .size = 192,
+                // SideA ROM_EXT.
+                .start = 0,
+                .size = 32,
                 .access = FLASH_ACCESS(
-                    /*index=*/4,
+                    /*index=*/0,
                     /*read=*/true,
                     /*program=*/true,
                     /*erase=*/true,
                     /*pwp=*/true,
                     /*lock=*/false),
                 .properties = FLASH_PROP(
-                    /*index=*/4,
-                    /*scramble=*/true,
-                    /*ecc=*/true,
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
                     /*he=*/false),
+
             },
             {
-                // SideB Filesystem.
-                .start = 256 + 224,
+                // SideB ROM_EXT.
+                .start = 256 + 0,
                 .size = 32,
                 .access = FLASH_ACCESS(
-                    /*index=*/5,
+                    /*index=*/3,
                     /*read=*/true,
                     /*program=*/true,
                     /*erase=*/true,
-                    /*pwp=*/false,
+                    /*pwp=*/true,
                     /*lock=*/false),
                 .properties = FLASH_PROP(
-                    /*index=*/5,
+                    /*index=*/3,
                     /*scramble=*/false,
                     /*ecc=*/false,
-                    /*he=*/true),
+                    /*he=*/false),
             },
         },
 };
 
-const owner_flash_config_t bad_flash_config = {
+const owner_flash_config_t &flash_config_contains_rom_ext =
+    reinterpret_cast<const owner_flash_config_t &>(
+        flash_config_contains_rom_ext_wrapped);
+
+const owner_flash_config_9 flash_config_too_many_entries_wrapped = {
     .header =
         {
             .tag = kTlvTagFlashConfig,
-            .length =
-                sizeof(owner_flash_config_t) + 8 * sizeof(owner_flash_region_t),
+            .length = sizeof(owner_flash_config_9),
         },
 };
 
-const owner_flash_info_config_t info_config = {
+const owner_flash_config_t &flash_config_too_many_entries =
+    reinterpret_cast<const owner_flash_config_t &>(
+        flash_config_too_many_entries_wrapped);
+
+const owner_flash_info_config_2 info_config_wrapped = {
     .header =
         {
             .tag = kTlvTagInfoConfig,
-            .length =
-                sizeof(owner_flash_config_t) + 2 * sizeof(owner_flash_region_t),
+            .length = sizeof(owner_flash_info_config_2),
         },
     .config =
         {
@@ -197,7 +259,7 @@ const owner_flash_info_config_t info_config = {
                     /*program=*/true,
                     /*erase=*/true,
                     /*pwp=*/false,
-                    /*lock=*/false),
+                    /*lock=*/true),
                 .properties = FLASH_PROP(
                     /*index=*/0,
                     /*scramble=*/false,
@@ -208,7 +270,7 @@ const owner_flash_info_config_t info_config = {
             {
                 // Disallowed page
                 .bank = 0,
-                .page = 5,
+                .page = 9,
                 .access = FLASH_ACCESS(
                     /*index=*/1,
                     /*read=*/true,
@@ -226,192 +288,1295 @@ const owner_flash_info_config_t info_config = {
         },
 };
 
-TEST_F(OwnerBlockTest, FlashConfigApplyBad) {
-  rom_error_t error = owner_block_flash_apply(&bad_flash_config, kBootSlotA, 0);
-  EXPECT_EQ(error, kErrorOwnershipFlashConfigLenth);
+const owner_flash_info_config_t &info_config =
+    reinterpret_cast<const owner_flash_info_config_t &>(info_config_wrapped);
+
+TEST_F(OwnerBlockTest, FlashConfigTooManyEntries) {
+  uint32_t mp_index = 0;
+  rom_error_t error =
+      owner_block_flash_apply(&flash_config_too_many_entries, kBootSlotA,
+                              /*owner_lockdown=*/0, &mp_index);
+  EXPECT_EQ(error, kErrorOwnershipFlashConfigLength);
+}
+
+TEST_F(OwnerBlockTest, FlashConfigApplyBadRomExt) {
+  // There are no expectations because `owner_block_flash_apply` will ignore
+  // regions that match the ROM_EXT.  This is intentional so pre-existing owner
+  // configs that cover the ROM_EXT won't result in an error and boot-loop the
+  // chip.
+  uint32_t mp_index = 0;
+  rom_error_t error =
+      owner_block_flash_apply(&flash_config_contains_rom_ext, kBootSlotA,
+                              /*owner_lockdown=*/0, &mp_index);
+  EXPECT_EQ(error, kErrorOk);
 }
 
 // Tests that the flash parameters get applied for side A.
 TEST_F(OwnerBlockTest, FlashConfigApplySideA) {
+  // The ROM_EXT always uses regions 0-1 to protect itself,  The items in
+  // the flash config always get programmed in order starting at index 2.
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(0, 0, 32,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
-                                   kMultiBitBool4True),
-                        FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4False)));
-  EXPECT_CALL(
-      flash_ctrl_,
-      DataRegionProtect(1, 32, 192,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
-                                   kMultiBitBool4True),
-                        FlashCfg(kMultiBitBool4True, kMultiBitBool4True,
-                                 kMultiBitBool4False)));
+      DataRegionProtect(
+          2, 32, 192,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                     kMultiBitBool4True),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(2, 224, 32,
+      DataRegionProtect(3, 224, 32,
                         FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
                                    kMultiBitBool4True),
                         FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4True)));
+                                 kMultiBitBool4True),
+                        kHardenedBoolFalse));
 
-  rom_error_t error =
-      owner_block_flash_apply(&simple_flash_config, kBootSlotA, 0);
+  uint32_t mp_index = 0;
+  rom_error_t error = owner_block_flash_apply(&simple_flash_config, kBootSlotA,
+                                              /*owner_lockdown=*/0, &mp_index);
   EXPECT_EQ(error, kErrorOk);
 }
 
 // Tests that the flash parameters get applied for side A and the
-// ProtectWhenPrimary disables erase and program on the ROM_EXT and FIRMWARE
+// ProtectWhenActive disables erase and program on the ROM_EXT and FIRMWARE
 // regions.
-TEST_F(OwnerBlockTest, FlashConfigApplySideAPrimary) {
+TEST_F(OwnerBlockTest, FlashConfigApplySideA_Active) {
+  // The ROM_EXT always uses regions 0-1 to protect itself,  The items in
+  // the flash config always get programmed in order starting at index 2.
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(0, 0, 32,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4False,
-                                   kMultiBitBool4False),
-                        FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4False)));
-  EXPECT_CALL(
-      flash_ctrl_,
-      DataRegionProtect(1, 32, 192,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4False,
-                                   kMultiBitBool4False),
-                        FlashCfg(kMultiBitBool4True, kMultiBitBool4True,
-                                 kMultiBitBool4False)));
+      DataRegionProtect(
+          2, 32, 192,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4False,
+                     kMultiBitBool4False),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(2, 224, 32,
+      DataRegionProtect(3, 224, 32,
                         FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
                                    kMultiBitBool4True),
                         FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4True)));
+                                 kMultiBitBool4True),
+                        kHardenedBoolFalse));
 
+  uint32_t mp_index = 0;
   rom_error_t error =
-      owner_block_flash_apply(&simple_flash_config, kBootSlotA, kBootSlotA);
+      owner_block_flash_apply(&simple_flash_config, kBootSlotA,
+                              /*owner_lockdown=*/kBootSlotA, &mp_index);
   EXPECT_EQ(error, kErrorOk);
 }
 
-// Tests that the flash parameters get applied for side B.
-TEST_F(OwnerBlockTest, FlashConfigApplySideB) {
-  EXPECT_CALL(
-      flash_ctrl_,
-      DataRegionProtect(3, 256 + 0, 32,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
-                                   kMultiBitBool4True),
-                        FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4False)));
+// Tests that the flash parameters get applied for side B when B is not the
+// active slot.  Check that ProtectWhenActive does not change the write/erase
+// permissions for slot B.
+TEST_F(OwnerBlockTest, FlashConfigApplySideB_NotActive) {
+  // The ROM_EXT always uses regions 0-1 to protect itself,  The items in
+  // the flash config always get programmed in order starting at index 2.
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(4, 256 + 32, 192,
-                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
-                                   kMultiBitBool4True),
-                        FlashCfg(kMultiBitBool4True, kMultiBitBool4True,
-                                 kMultiBitBool4False)));
+      DataRegionProtect(
+          2, 256 + 32, 192,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                     kMultiBitBool4True),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
   EXPECT_CALL(
       flash_ctrl_,
-      DataRegionProtect(5, 256 + 224, 32,
+      DataRegionProtect(3, 256 + 224, 32,
                         FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
                                    kMultiBitBool4True),
                         FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                 kMultiBitBool4True)));
+                                 kMultiBitBool4True),
+                        kHardenedBoolFalse));
 
+  uint32_t mp_index = 0;
   rom_error_t error =
-      owner_block_flash_apply(&simple_flash_config, kBootSlotB, 0);
-  EXPECT_EQ(error, kErrorOk);
-}
-
-TEST_F(OwnerBlockTest, FlashInfoApply) {
-  EXPECT_CALL(flash_ctrl_,
-              InfoCfgSet(_, FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
-                                     kMultiBitBool4True)));
-  EXPECT_CALL(flash_ctrl_,
-              InfoPermsSet(_, FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
-                                         kMultiBitBool4True)));
-
-  rom_error_t error = owner_block_info_apply(&info_config);
-  EXPECT_EQ(error, kErrorOk);
-}
-
-TEST_F(OwnerBlockTest, ParseBlock) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
+      owner_block_flash_apply(&simple_flash_config, kBootSlotB,
+                              /*owner_lockdown=*/kBootSlotA, &mp_index);
   EXPECT_EQ(error, kErrorOk);
-  EXPECT_EQ(config.sram_exec, kOwnerSramExecModeDisabledLocked);
-  EXPECT_EQ(config.flash->header.tag, kTlvTagFlashConfig);
-  EXPECT_EQ(config.info->header.tag, kTlvTagInfoConfig);
-  EXPECT_EQ(config.rescue->header.tag, kTlvTagRescueConfig);
-  EXPECT_EQ(keyring.length, 1);
-  EXPECT_EQ(keyring.key[0]->header.tag, kTlvTagApplicationKey);
-}
-
-TEST_F(OwnerBlockTest, ParseBlockBadHeader) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Rewrite the header length to a bad value
-  block.Seek(sizeof(uint32_t)).Write(12345);
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
-
-  // Rewrite the header tag from `OWNR` to `AAAA`.
-  block.Reset().Write(0x41414141);
-  error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipInvalidTag);
-}
-
-TEST_F(OwnerBlockTest, ParseBlockUnknownTag) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Write an unknown header of {tag="AAAA", len=0x40} after the RESQ config.
-  uint32_t len =
-      block.Find(kTlvTagRescueConfig).Seek(sizeof(uint32_t)).Read<uint32_t>() -
-      sizeof(tlv_header_t);
-  block.Seek(len).Write(0x41414141).Write(0x40);
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipInvalidTag);
-}
-
-TEST_F(OwnerBlockTest, ParseBlockBadLength) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Rewrite the RESQ block length to overflow the TLV region.
-  block.Find(kTlvTagRescueConfig).Seek(sizeof(uint32_t)).Write(uint32_t(0x5f1));
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
-}
-
-TEST_F(OwnerBlockTest, ParseBlockDupFlash) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Rewrite the RESQ tag as a FLSH tag to test duplicate detection.
-  block.Find(kTlvTagRescueConfig).Write(kTlvTagFlashConfig);
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
 }
 
-TEST_F(OwnerBlockTest, ParseBlockDupInfo) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Rewrite the RESQ tag as an INFO tag to test duplicate detection.
-  block.Find(kTlvTagRescueConfig).Write(kTlvTagInfoConfig);
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
-}
+const owner_flash_config_8 legacy_flash_config_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_8),
+        },
+    .config =
+        {
+            {
+                // SideA ROM_EXT.  This configuration should be skipped
+                // by flash_ apply.
+                .start = 0,
+                .size = 32,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+
+            },
+            {
+                // SideA FIRMWARE.
+                .start = 32,
+                .size = 192,
+                .access = FLASH_ACCESS(
+                    /*index=*/1,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/1,
+                    /*scramble=*/true,
+                    /*ecc=*/true,
+                    /*he=*/false),
+            },
+            {
+                // SideA Filesystem.
+                .start = 224,
+                .size = 31,
+                .access = FLASH_ACCESS(
+                    /*index=*/2,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/false,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/2,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/true),
+            },
+            {
+                // SideA ROM_EXT.  This configuration should be skipped
+                // by flash_ apply.
+                .start = 256 + 0,
+                .size = 32,
+                .access = FLASH_ACCESS(
+                    /*index=*/3,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/3,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+            {
+                // SideB FIRMWARE.
+                .start = 256 + 32,
+                .size = 192,
+                .access = FLASH_ACCESS(
+                    /*index=*/4,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/4,
+                    /*scramble=*/true,
+                    /*ecc=*/true,
+                    /*he=*/false),
+            },
+            {
+                // SideB Filesystem.
+                .start = 256 + 224,
+                .size = 31,
+                .access = FLASH_ACCESS(
+                    /*index=*/5,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/false,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/5,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/true),
+            },
+            {
+                // SideA Reserved last page.
+                .start = 255,
+                .size = 1,
+                .access = FLASH_ACCESS(
+                    /*index=*/6,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/false,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/6,
+                    /*scramble=*/true,
+                    /*ecc=*/true,
+                    /*he=*/false),
+            },
+            {
+                // SideB Reserved last page.
+                .start = 511,
+                .size = 1,
+                .access = FLASH_ACCESS(
+                    /*index=*/7,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/false,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/7,
+                    /*scramble=*/true,
+                    /*ecc=*/true,
+                    /*he=*/false),
+            },
+
+        },
+};
+
+const owner_flash_config_t &legacy_flash_config =
+    reinterpret_cast<const owner_flash_config_t &>(legacy_flash_config_wrapped);
+
+// Tests that the flash parameters get applied for side B when B is not the
+// active slot.  Check that ProtectWhenActive does not change the write/erase
+// permissions for slot B.
+TEST_F(OwnerBlockTest, FlashConfigApplyLegacy) {
+  // The ROM_EXT always uses regions 0-1 to protect itself,  The items in
+  // the flash config always get programmed in order starting at index 2.
+
+  // We should not see the ROM_EXT regions from the `legacy_flash_config`.
+  // We should see the rest of the regions in order.
+
+  // The SideA Firmware region has "protect when active" set, so the erase
+  // and program permissions should be false.
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(
+          2, 32, 192,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4False,
+                     kMultiBitBool4False),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(3, 224, 31,
+                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                                   kMultiBitBool4True),
+                        FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
+                                 kMultiBitBool4True),
+                        kHardenedBoolFalse));
+  // The SideA reserved last page is out-of-order with the rest of the SideA
+  // entries.  This is ok, and it should land in the next mp_region register.
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(
+          4, 255, 1,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                     kMultiBitBool4True),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
+
+  // The SideB Firmware region has "protect when active" set, but it isn't
+  // the active side, so the erase and program permissions should be true.
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(
+          5, 256 + 32, 192,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                     kMultiBitBool4True),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(6, 256 + 224, 31,
+                        FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                                   kMultiBitBool4True),
+                        FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
+                                 kMultiBitBool4True),
+                        kHardenedBoolFalse));
+  // The SideB reserved last page is out-of-order with the rest of the SideB
+  // entries.  This is ok, and it should land in the next mp_region register.
+  EXPECT_CALL(
+      flash_ctrl_,
+      DataRegionProtect(
+          7, 511, 1,
+          FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                     kMultiBitBool4True),
+          FlashCfg(kMultiBitBool4True, kMultiBitBool4True, kMultiBitBool4False),
+          kHardenedBoolFalse));
+
+  uint32_t mp_index = 0;
+  rom_error_t error =
+      owner_block_flash_apply(&legacy_flash_config, kBootSlotA,
+                              /*owner_lockdown=*/kBootSlotA, &mp_index);
+  EXPECT_EQ(error, kErrorOk);
+  error = owner_block_flash_apply(&legacy_flash_config, kBootSlotB,
+                                  /*owner_lockdown=*/kBootSlotA, &mp_index);
+  EXPECT_EQ(error, kErrorOk);
+}
+
+TEST_F(OwnerBlockTest, FlashInfoApply) {
+  EXPECT_CALL(flash_ctrl_, InfoType0ParamsBuild(0, 6, _))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_,
+              InfoCfgSet(_, FlashCfg(kMultiBitBool4False, kMultiBitBool4False,
+                                     kMultiBitBool4True)));
+  EXPECT_CALL(flash_ctrl_,
+              InfoPermsSet(_, FlashPerms(kMultiBitBool4True, kMultiBitBool4True,
+                                         kMultiBitBool4True)));
+
+  rom_error_t error = owner_block_info_apply(&info_config);
+  EXPECT_EQ(error, kErrorOk);
+}
+
+TEST_F(OwnerBlockTest, FlashInfoLock) {
+  flash_ctrl_info_page_t info_page{
+      .base_addr = 999,
+  };
+  EXPECT_CALL(flash_ctrl_, InfoType0ParamsBuild(0, 6, _))
+      .WillOnce(DoAll(SetArgPointee<2>(info_page), Return(kErrorOk)));
+  EXPECT_CALL(flash_ctrl_, InfoCfgLock(FlashInfoPage(info_page)));
+
+  rom_error_t error = owner_block_info_lockdown(&info_config);
+  EXPECT_EQ(error, kErrorOk);
+}
+
+TEST_F(OwnerBlockTest, ParseBlock) {
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOk);
+  EXPECT_EQ(config.sram_exec, kOwnerSramExecModeDisabledLocked);
+  EXPECT_EQ(config.flash->header.tag, kTlvTagFlashConfig);
+  EXPECT_EQ(config.info->header.tag, kTlvTagInfoConfig);
+  EXPECT_EQ(config.rescue->header.tag, kTlvTagRescueConfig);
+  EXPECT_EQ(config.isfb->header.tag, kTlvTagIntegrationSpecificFirmwareBinding);
+  EXPECT_EQ(keyring.length, 1);
+  EXPECT_EQ(keyring.key[0]->header.tag, kTlvTagApplicationKey);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockBadHeaderLength) {
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the header length to a bad value
+  block.Seek(offsetof(owner_block_t, header.length)).Write(12345);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockBadHeaderTag) {
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the header tag from `OWNR` to `AAAA`.
+  block.Seek(offsetof(owner_block_t, header.tag)).Write(0x41414141);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTag);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockUnknownTag) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Write an unknown header of {tag="AAAA", len=0x40} after the RESQ config.
+  tlv_header_t rescue = block.Find(kTlvTagRescueConfig).Read<tlv_header_t>();
+  block.Seek(rescue.length - sizeof(tlv_header_t))
+      .Write(0x41414141)
+      .Write(0x40);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTag);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockBadLength) {
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+
+  // Rewrite the RESQ block length to overflow the TLV region.
+  block.Find(kTlvTagRescueConfig)
+      .Seek(offsetof(tlv_header_t, length))
+      .Write(uint16_t(0x600));
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
+
+  // Rewrite the RESQ block length to be too short.
+  block.Reset()
+      .Find(kTlvTagRescueConfig)
+      .Seek(offsetof(tlv_header_t, length))
+      .Write(uint16_t(0x4));
+  error = owner_block_parse(block.get(), /*check_only=*/kHardenedBoolFalse,
+                            &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
+
+  // Rewrite the RESQ block length to not be a multiple of 4.
+  block.Reset()
+      .Find(kTlvTagRescueConfig)
+      .Seek(offsetof(tlv_header_t, length))
+      .Write(uint16_t(0x21));
+  error = owner_block_parse(block.get(), /*check_only=*/kHardenedBoolFalse,
+                            &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipInvalidTagLength);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockDupFlash) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the RESQ tag as a FLSH tag to test duplicate detection.
+  block.Find(kTlvTagRescueConfig).Write(kTlvTagFlashConfig);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockDupInfo) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the RESQ tag as an INFO tag to test duplicate detection.
+  block.Find(kTlvTagRescueConfig).Write(kTlvTagInfoConfig);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockDupRescue) {
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the FLSH tag as a RESQ tag to test duplicate detection.
+  block.Find(kTlvTagFlashConfig).Write(kTlvTagRescueConfig);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
+}
+
+TEST_F(OwnerBlockTest, ParseBlockDupIsfb) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  // Rewrite the RESQ tag as an ISFB tag to test duplicate detection.
+  block.Find(kTlvTagRescueConfig)
+      .Write(kTlvTagIntegrationSpecificFirmwareBinding);
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
+}
+
+TEST_F(OwnerBlockTest, IsfbEraseEnableInvalidState) {
+  boot_data_t bootdata = {};
+  bootdata.ownership_state = kOwnershipStateUnlockedAny;
+  owner_config_t owner_config = {};
+  EXPECT_EQ(owner_block_info_isfb_erase_enable(&bootdata, &owner_config),
+            kErrorOk);
+}
+
+TEST_F(OwnerBlockTest, NonExistIsfbConfig) {
+  boot_data_t bootdata = {};
+  bootdata.ownership_state = kOwnershipStateLockedOwner;
+  owner_config_t owner_config = {};
+  owner_config.isfb = (const owner_isfb_config_t *)kHardenedBoolFalse;
+  EXPECT_EQ(owner_block_info_isfb_erase_enable(&bootdata, &owner_config),
+            kErrorOk);
+}
+
+TEST_F(OwnerBlockTest, NonExistInfoConfig) {
+  boot_data_t bootdata = {};
+  bootdata.ownership_state = kOwnershipStateLockedOwner;
+  owner_config_t owner_config = {};
+  owner_config.isfb = (const owner_isfb_config_t *)kHardenedBoolTrue;
+  owner_config.info = (const owner_flash_info_config_t *)kHardenedBoolFalse;
+  EXPECT_EQ(owner_block_info_isfb_erase_enable(&bootdata, &owner_config),
+            kErrorOk);
+}
+
+TEST(OwnerBlockTransferTest, ValidTransfer) {
+  owner_page_valid[1] = kOwnerPageStatusSealed;
+  boot_data_t bootdata = {};
+  bootdata.ownership_state = kOwnershipStateLockedOwner;
+  EXPECT_EQ(owner_block_page1_valid_for_transfer(&bootdata), kHardenedBoolTrue);
+}
+
+const owner_isfb_config_t isfb_config_bad_length = {
+    .header =
+        {
+            .tag = kTlvTagIntegrationSpecificFirmwareBinding,
+            .length = 0,
+        },
+};
+
+const owner_isfb_config_t isfb_config_bad_page = {
+    .header =
+        {
+            .tag = kTlvTagIntegrationSpecificFirmwareBinding,
+            .length = sizeof(owner_isfb_config_t),
+        },
+    .bank = 0,
+    // Invalid page. Page 0 is reserved by the Silicon Creator.
+    .page = 0,
+    .product_words = 4,
+};
+
+const owner_isfb_config_t isfb_config_bad_product_word_count = {
+    .header =
+        {
+            .tag = kTlvTagIntegrationSpecificFirmwareBinding,
+            .length = sizeof(owner_isfb_config_t),
+        },
+    .bank = 0,
+    .page = 5,
+    // Invalid product word count > 256.
+    .product_words = 257,
+};
+
+struct IsfbError {
+  owner_isfb_config_t config;
+  rom_error_t expect;
+};
+
+class OwnerBlockBadIsfbTest : public OwnerBlockTest,
+                              public testing::WithParamInterface<IsfbError> {};
+
+TEST_P(OwnerBlockBadIsfbTest, ParseBlockBadIsfb) {
+  IsfbError param = GetParam();
+  rom_error_t error = owner_isfb_config_check(&param.config);
+  EXPECT_EQ(error, param.expect);
+}
+
+INSTANTIATE_TEST_SUITE_P(
+    AllCases, OwnerBlockBadIsfbTest,
+    testing::Values(IsfbError{isfb_config_bad_page, kErrorOwnershipISFBPage},
+                    IsfbError{isfb_config_bad_length,
+                              kErrorOwnershipInvalidTagLength},
+                    IsfbError{isfb_config_bad_product_word_count,
+                              kErrorOwnershipISFBSize}));
+
+struct TagError {
+  tlv_tag_t tag;
+  rom_error_t expect;
+};
+
+class OwnerBlockPerTagTest : public OwnerBlockTest,
+                             public testing::WithParamInterface<TagError> {};
+
+TEST_P(OwnerBlockPerTagTest, ParseBadVersion) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+  TagError param = GetParam();
+
+  // Rewrite the version to a bad value.
+  block.Find(param.tag)
+      .Seek(offsetof(tlv_header_t, version))
+      .Write((struct_version_t){5, 0});
+  owner_config_t config;
+  owner_application_keyring_t keyring{};
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolFalse, &config, &keyring);
+  EXPECT_EQ(error, param.expect);
+}
+
+INSTANTIATE_TEST_SUITE_P(
+    AllCases, OwnerBlockPerTagTest,
+    testing::Values(TagError{kTlvTagOwner, kErrorOwnershipOWNRVersion},
+                    TagError{kTlvTagApplicationKey, kErrorOwnershipAPPKVersion},
+                    TagError{kTlvTagFlashConfig, kErrorOwnershipFLSHVersion},
+                    TagError{kTlvTagInfoConfig, kErrorOwnershipINFOVersion},
+                    TagError{kTlvTagRescueConfig, kErrorOwnershipRESQVersion},
+                    TagError{kTlvTagIntegrationSpecificFirmwareBinding,
+                             kErrorOwnershipISFBVersion}));
+
+// Flash region is the exact size of the ROM_EXT and has a bad ECC setting.
+const owner_flash_config_1 invalid_flash_0_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_1),
+        },
+    .config =
+        {
+            {
+                // SideA ROM_EXT.
+                .start = 0,
+                .size = 32,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/true,
+                    /*he=*/false),
+            },
+        },
+};
+
+const owner_flash_config_t &invalid_flash_0 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_0_wrapped);
+
+// Flash region overlaps ROM_EXT and APP.
+const owner_flash_config_1 invalid_flash_1_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_1),
+        },
+    .config =
+        {
+            {
+                // SideA ROM_EXT & APP.
+                .start = 0,
+                .size = 224,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+        },
+};
+
+const owner_flash_config_t &invalid_flash_1 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_1_wrapped);
+
+// Flash regions straddle ROM_EXT.
+const owner_flash_config_2 invalid_flash_2_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_2),
+        },
+    .config =
+        {
+            {
+                // SideA ROM_EXT.
+                .start = 0,
+                .size = 16,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+            {
+                // SideA APP
+                .start = 16,
+                .size = 240,
+                .access = FLASH_ACCESS(
+                    /*index=*/1,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/1,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+        },
+};
+
+const owner_flash_config_t &invalid_flash_2 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_2_wrapped);
+
+// Flash region is the exact size of the ROM_EXT.
+const owner_flash_config_2 invalid_flash_3_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_2),
+        },
+    .config =
+        {
+            {
+                // SideA ROM_EXT.
+                .start = 0,
+                .size = 32,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+            {
+                // SideB ROM_EXT.
+                .start = 256,
+                .size = 32,
+                .access = FLASH_ACCESS(
+                    /*index=*/1,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/1,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+        },
+
+};
+
+const owner_flash_config_t &invalid_flash_3 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_3_wrapped);
+
+// Flash configuration has too many entries.
+// We don't have to include the entries because the length is checked first
+// and none of the non-existent entries will be accessed.
+const owner_flash_config_t invalid_flash_4 = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length =
+                sizeof(owner_flash_config_t) + 8 * sizeof(owner_flash_region_t),
+        },
+};
+
+// Flash configuration extends beyond end of flash
+const owner_flash_config_1 invalid_flash_5_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_1),
+        },
+    .config =
+        {
+            {
+                // SideB APP
+                .start = 256 + 32,
+                .size = 256,
+                .access = FLASH_ACCESS(
+                    /*index=*/0,
+                    /*read=*/true,
+                    /*program=*/true,
+                    /*erase=*/true,
+                    /*pwp=*/true,
+                    /*lock=*/false),
+                .properties = FLASH_PROP(
+                    /*index=*/0,
+                    /*scramble=*/false,
+                    /*ecc=*/false,
+                    /*he=*/false),
+            },
+        },
+};
+
+const owner_flash_config_t &invalid_flash_5 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_5_wrapped);
+
+// Flash configuration has too many entries for Slot A.
+const owner_flash_config_4 invalid_flash_6_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_4),
+        },
+    .config = {{
+                   // SideA APP
+                   .start = 32,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/0,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/0,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideA APP
+                   .start = 33,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/1,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/1,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideA APP
+                   .start = 34,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/2,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/2,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideA APP
+                   .start = 35,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/3,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/3,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               }},
+};
+
+const owner_flash_config_t &invalid_flash_6 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_6_wrapped);
+
+// Flash configuration has too many entries for Slot B.
+const owner_flash_config_4 invalid_flash_7_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_4),
+        },
+    .config = {{
+                   // SideB APP
+                   .start = 256 + 32,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/0,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/0,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideB APP
+                   .start = 256 + 33,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/1,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/1,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideB APP
+                   .start = 256 + 34,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/2,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/2,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               },
+               {
+                   // SideB APP
+                   .start = 256 + 35,
+                   .size = 1,
+                   .access = FLASH_ACCESS(
+                       /*index=*/3,
+                       /*read=*/true,
+                       /*program=*/true,
+                       /*erase=*/true,
+                       /*pwp=*/true,
+                       /*lock=*/false),
+                   .properties = FLASH_PROP(
+                       /*index=*/3,
+                       /*scramble=*/false,
+                       /*ecc=*/false,
+                       /*he=*/false),
+               }},
+};
+
+const owner_flash_config_t &invalid_flash_7 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_7_wrapped);
+
+// Flash configuration has a zero length.
+const owner_flash_config_4 invalid_flash_8_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = 0,
+        },
+};
+
+const owner_flash_config_t &invalid_flash_8 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_8_wrapped);
+
+// Flash configuration has mis-aligned length.
+const owner_flash_config_4 invalid_flash_9_wrapped = {
+    .header =
+        {
+            .tag = kTlvTagFlashConfig,
+            .length = sizeof(owner_flash_config_4) + 1,
+        },
+};
+
+const owner_flash_config_t &invalid_flash_9 =
+    reinterpret_cast<const owner_flash_config_t &>(invalid_flash_9_wrapped);
+
+class RomExtFlashConfigTest
+    : public OwnerBlockTest,
+      public testing::WithParamInterface<
+          std::tuple<const owner_flash_config_t *, rom_error_t>> {};
+
+// Test bad ROM_EXT region configs with respect to the default config.
+TEST_P(RomExtFlashConfigTest, BadFlashConfig) {
+  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet)
+      .WillRepeatedly(Return(default_config));
+  const owner_flash_config_t *param;
+  rom_error_t expected;
+  std::tie(param, expected) = GetParam();
+  rom_error_t error = owner_block_flash_check(param);
+  EXPECT_EQ(error, expected);
+}
+
+INSTANTIATE_TEST_SUITE_P(
+    AllCases, RomExtFlashConfigTest,
+    testing::Values(
+        std::make_tuple(&invalid_flash_0, kErrorOwnershipFlashConfigRomExt),
+        std::make_tuple(&invalid_flash_1, kErrorOwnershipFlashConfigRomExt),
+        std::make_tuple(&invalid_flash_2, kErrorOwnershipFlashConfigRomExt),
+        std::make_tuple(&invalid_flash_3, kErrorOwnershipFlashConfigRomExt),
+        std::make_tuple(&invalid_flash_4, kErrorOwnershipFlashConfigLength),
+        std::make_tuple(&invalid_flash_5, kErrorOwnershipFlashConfigBounds),
+        std::make_tuple(&invalid_flash_6, kErrorOwnershipFlashConfigSlots),
+        std::make_tuple(&invalid_flash_7, kErrorOwnershipFlashConfigSlots),
+        std::make_tuple(&invalid_flash_8, kErrorOwnershipInvalidTagLength),
+        std::make_tuple(&invalid_flash_9, kErrorOwnershipInvalidTagLength)));
+
+struct FlashRegion {
+  uint32_t start;
+  uint32_t end;
+  bool overlap;
+  bool exclusive;
+};
+
+class RomExtFlashBoundsTest : public OwnerBlockTest,
+                              public testing::WithParamInterface<FlashRegion> {
+};
+
+extern "C" {
+// These functions aren't defined in owner_block.h because they aren't meant
+// to be public APIs.  They aren't static so we can access the symbols here
+// for testing.
+hardened_bool_t rom_ext_flash_overlap(uint32_t, uint32_t);
+hardened_bool_t rom_ext_flash_exclusive(uint32_t, uint32_t);
+rom_error_t owner_block_application_key_check(
+    const owner_application_key_t *key);
+rom_error_t owner_block_flash_info_check(const owner_flash_info_config_t *info);
+rom_error_t owner_block_rescue_check(const owner_rescue_config_t *rescue);
+}
+
+// Test the flash bounds checking functions.
+TEST_P(RomExtFlashBoundsTest, FlashBoundsTest) {
+  FlashRegion p = GetParam();
+  hardened_bool_t overlap = rom_ext_flash_overlap(p.start, p.end);
+  hardened_bool_t exclusive = rom_ext_flash_exclusive(p.start, p.end);
+  EXPECT_EQ(overlap, p.overlap ? kHardenedBoolTrue : kHardenedBoolFalse);
+  EXPECT_EQ(exclusive, p.exclusive ? kHardenedBoolTrue : kHardenedBoolFalse);
+}
+
+// clang-format off
+INSTANTIATE_TEST_SUITE_P(AllCases, RomExtFlashBoundsTest,
+testing::Values(
+  // The ROM_EXT A region is blocks [0x00 .. 0x20).
+  // The ROM_EXT B region is blocks [0x100 .. 0x120).
+  // The ranges expressed are half-open: [start .. end).
+  FlashRegion{0x000, 0x020, /*overlap=*/true, /*exclusive=*/true}, // Full ROM_EXT A region.
+  FlashRegion{0x100, 0x120, /*overlap=*/true, /*exclusive=*/true}, // Full ROM_EXT B region.
+  FlashRegion{0x005, 0x010, /*overlap=*/true, /*exclusive=*/true}, // Partial ROM_EXT A region.
+  FlashRegion{0x105, 0x110, /*overlap=*/true, /*exclusive=*/true}, // Partial ROM_EXT B region.
+  FlashRegion{0x000, 0x040, /*overlap=*/true, /*exclusive=*/false}, // Overlapped ROM_EXT A region.
+  FlashRegion{0x100, 0x140, /*overlap=*/true, /*exclusive=*/false}, // Overlapped ROM_EXT B region.
+  FlashRegion{0x020, 0x040, /*overlap=*/false, /*exclusive=*/false}, // Not ROM_EXT A region.
+  FlashRegion{0x120, 0x140, /*overlap=*/false, /*exclusive=*/false}, // Not ROM_EXT B region.
+  FlashRegion{0x005, 0x105, /*overlap=*/true, /*exclusive=*/false}, // Mid RX_A to mid RX_B.
+  FlashRegion{0x020, 0x100, /*overlap=*/false, /*exclusive=*/false}, // Full not ROM_EXT side A.
+  FlashRegion{0x020, 0x101, /*overlap=*/true, /*exclusive=*/false}, // Side A intrudes in to RX_B.
+  FlashRegion{0x000, 0x200, /*overlap=*/true, /*exclusive=*/false} // Full flash region.
+));
+// clang-format on
+
+struct OwnerBlockLengths {
+  tlv_tag_t tag;
+  int16_t length;
+  rom_error_t expect;
+};
+
+class OwnerBlockConfigCheckTest
+    : public OwnerBlockTest,
+      public testing::WithParamInterface<OwnerBlockLengths> {};
+
+// Tests that owner_block_parse checks the lengths of the TLV items in the owner
+// config block and returns errors for invalid lengths.
+TEST_P(OwnerBlockConfigCheckTest, ConfigBoundsTest) {
+  auto param = GetParam();
+  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
+
+  if (param.length != -1) {
+    block.Find(param.tag)
+        .Seek(offsetof(tlv_header_t, length))
+        .Write(param.length);
+  }
+
+  rom_error_t error = owner_block_parse(
+      block.get(), /*check_only=*/kHardenedBoolTrue, nullptr, nullptr);
+  EXPECT_EQ(error, param.expect);
+}
+
+// clang-format off
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnerBlockConfigCheckTest,
+testing::Values(
+    OwnerBlockLengths{kTlvTagApplicationKey, 40, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagApplicationKey, 512, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagFlashConfig, 4, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagInfoConfig, 4, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagFlashConfig, 12, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagInfoConfig, 12, kErrorOwnershipInvalidTagLength},
+    OwnerBlockLengths{kTlvTagRescueConfig, 12, kErrorOwnershipInvalidTagLength}
+));
+// clang-format on
+
+class ApplicationKeyCheckTest
+    : public OwnerBlockTest,
+      public testing::WithParamInterface<
+          std::tuple<ownership_key_alg_t, rom_error_t>> {};
+
+TEST_P(ApplicationKeyCheckTest, KeyAlgo) {
+  ownership_key_alg_t key_alg;
+  rom_error_t expect;
+  std::tie(key_alg, expect) = GetParam();
+
+  owner_application_key_t key = {
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = sizeof(owner_application_key_t),
+          },
+      .key_alg = key_alg,
+  };
+
+  rom_error_t error = owner_block_application_key_check(&key);
+  EXPECT_EQ(error, expect);
+}
+
+// clang-format off
+INSTANTIATE_TEST_SUITE_P(AllCases, ApplicationKeyCheckTest,
+testing::Values(
+    // Currently supported algorithms:
+    std::make_tuple(kOwnershipKeyAlgEcdsaP256, kErrorOk),
+    std::make_tuple(kOwnershipKeyAlgHybridSpxPure, kErrorOk),
+    std::make_tuple(kOwnershipKeyAlgHybridSpxPrehash, kErrorOk),
+    // Currently unsupported algorithms:
+    std::make_tuple(kOwnershipKeyAlgSpxPure, kErrorOwnershipInvalidAlgorithm),
+    std::make_tuple(kOwnershipKeyAlgSpxPrehash, kErrorOwnershipInvalidAlgorithm),
+    std::make_tuple(kOwnershipKeyAlgSq20Pure, kErrorOwnershipInvalidAlgorithm),
+    std::make_tuple(kOwnershipKeyAlgSq20Prehash, kErrorOwnershipInvalidAlgorithm),
+    std::make_tuple(kOwnershipKeyAlgHybridSq20Pure, kErrorOwnershipInvalidAlgorithm),
+    std::make_tuple(kOwnershipKeyAlgHybridSq20Prehash, kErrorOwnershipInvalidAlgorithm)
+));
+// clang-format on
+
+class RescueCheckTest : public OwnerBlockTest,
+                        public testing::WithParamInterface<
+                            std::tuple<uint16_t, uint16_t, rom_error_t>> {};
+
+TEST_P(RescueCheckTest, RescueBounds) {
+  uint16_t start, size;
+  rom_error_t expect;
+  std::tie(start, size, expect) = GetParam();
+
+  owner_rescue_config_t rescue = {
+      .header =
+          {
+              .tag = kTlvTagRescueConfig,
+              .length = sizeof(owner_rescue_config_t),
+          },
+      .start = start,
+      .size = size,
+  };
+
+  rom_error_t error = owner_block_rescue_check(&rescue);
+  EXPECT_EQ(error, expect);
+}
+
+// clang-format off
+INSTANTIATE_TEST_SUITE_P(AllCases, RescueCheckTest,
+testing::Values(
+    std::make_tuple(32, 224, kErrorOk),
+    // Starts in ROM_EXT region.
+    std::make_tuple(0, 224, kErrorOwnershipInvalidRescueBounds),
+    // Too big
+    std::make_tuple(32, 225, kErrorOwnershipInvalidRescueBounds)
+));
+// clang-format on
+
+class FlashInfoCheckTest : public OwnerBlockTest,
+                           public testing::WithParamInterface<
+                               std::tuple<uint8_t, uint8_t, rom_error_t>> {};
+
+TEST_F(FlashInfoCheckTest, FlashInfoCheckInvalidLength) {
+  const owner_flash_info_config_t info = {
+      .header =
+          {
+              .length = 0,
+          },
+  };
+  EXPECT_EQ(owner_block_flash_info_check(&info),
+            kErrorOwnershipInvalidTagLength);
+}
+
+TEST_P(FlashInfoCheckTest, ValidPage) {
+  uint16_t bank, page;
+  rom_error_t expect;
+  std::tie(bank, page, expect) = GetParam();
+
+  union {
+    owner_flash_info_config_t info;
+    uint8_t
+        memory[sizeof(owner_flash_info_config_t) + sizeof(owner_info_page_t)];
+  } data = {.info = {
+                .header =
+                    {
+                        .tag = kTlvTagInfoConfig,
+                        .length = sizeof(owner_flash_info_config_t) +
+                                  sizeof(owner_info_page_t),
+                    },
+            }};
+
+  data.info.config[0].bank = bank;
+  data.info.config[0].page = page;
+
+  rom_error_t error = owner_block_flash_info_check(&data.info);
+  EXPECT_EQ(error, expect);
+}
+
+// clang-format off
+INSTANTIATE_TEST_SUITE_P(AllCases, FlashInfoCheckTest,
+testing::Values(
+    // Bank 0 INFO pages:
+    std::make_tuple(0, 0, kErrorOwnershipBadInfoPage),
+    std::make_tuple(0, 1, kErrorOwnershipBadInfoPage),
+    std::make_tuple(0, 2, kErrorOwnershipBadInfoPage),
+    std::make_tuple(0, 3, kErrorOwnershipBadInfoPage),
+    std::make_tuple(0, 4, kErrorOwnershipBadInfoPage),
+    std::make_tuple(0, 5, kErrorOk),
+    std::make_tuple(0, 6, kErrorOk),
+    std::make_tuple(0, 7, kErrorOk),
+    std::make_tuple(0, 8, kErrorOk),
+    std::make_tuple(0, 9, kErrorOwnershipBadInfoPage),
+
+    // Bank 1 INFO pages:
+    std::make_tuple(1, 0, kErrorOwnershipBadInfoPage),
+    std::make_tuple(1, 1, kErrorOwnershipBadInfoPage),
+    std::make_tuple(1, 2, kErrorOwnershipBadInfoPage),
+    std::make_tuple(1, 3, kErrorOwnershipBadInfoPage),
+    std::make_tuple(1, 4, kErrorOwnershipBadInfoPage),
+    std::make_tuple(1, 5, kErrorOk),
+    std::make_tuple(1, 6, kErrorOk),
+    std::make_tuple(1, 7, kErrorOk),
+    std::make_tuple(1, 8, kErrorOk),
+    std::make_tuple(1, 9, kErrorOwnershipBadInfoPage)
+));
+// clang-format on
 
-TEST_F(OwnerBlockTest, ParseBlockDupRescue) {
-  BinaryBlob<owner_block_t> block(basic_owner, sizeof(basic_owner));
-  // Rewrite the FLSH tag as a RESQ tag to test duplicate detection.
-  block.Find(kTlvTagFlashConfig).Write(kTlvTagRescueConfig);
-  owner_config_t config;
-  owner_application_keyring_t keyring{};
-  rom_error_t error = owner_block_parse(block.get(), &config, &keyring);
-  EXPECT_EQ(error, kErrorOwnershipDuplicateItem);
-}
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/ownership/owner_verify.c b/sw/device/silicon_creator/lib/ownership/owner_verify.c
new file mode 100644
index 0000000000000..138e3d624bb5f
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/owner_verify.c
@@ -0,0 +1,162 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
+
+#include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/sigverify.h"
+#include "sw/device/silicon_creator/lib/sigverify/sphincsplus/verify.h"
+
+// A version of spx_verify that is tailored to ROM_EXT use cases.
+// In particular:
+//   - We don't care about the OTP setting for SPX+ in the ROM_EXT.
+//   - We don't care about flash_exec in the ROM_EXT.
+//   - We have a different series of algorithm identifier values to accommodate
+//     hybrid signature schemes.
+OT_WARN_UNUSED_RESULT
+static rom_error_t owner_spx_verify(
+    uint32_t key_alg, const sigverify_spx_key_t *key,
+    const sigverify_spx_signature_t *signature, const void *msg_prefix_1,
+    size_t msg_prefix_1_len, const void *msg_prefix_2, size_t msg_prefix_2_len,
+    const void *msg, size_t msg_len, hmac_digest_t digest,
+    uint32_t *flash_exec) {
+  if (signature == NULL) {
+    return kErrorSigverifySpxNotFound;
+  }
+  /*
+   * Shares for producing kErrorOk if SPHINCS+ verification succeeds.  The first
+   * three shares are generated using the `sparse-fsm-encode` script while the
+   * last share is
+   * `kErrorOk ^ shares[0] ^ ... ^ shares[2]`.
+   *
+   * Encoding generated with:
+   * $ ./util/design/sparse-fsm-encode.py -d 5 -m 3 -n 32 \
+   *     -s 1069420 --language=c
+   *
+   * Minimum Hamming distance: 14
+   * Maximum Hamming distance: 20
+   * Minimum Hamming weight: 14
+   * Maximum Hamming weight: 16
+   */
+
+  const uint32_t shares[] = {
+      0x11deb806,
+      0x06457f69,
+      0x647f10c4,
+      0x73e4d092,
+  };
+
+  // If the key_alg is one of the hybrid algorithm, locally re-categorize as
+  // an SPX+ algorithm so we can call the underlying `spx_verify` function
+  // correctly.
+  key_alg &= ~(uint32_t)kOwnershipKeyAlgCategoryMask;
+  key_alg |= (uint32_t)kOwnershipKeyAlgCategorySpx;
+
+  sigverify_spx_root_t actual_root;
+  sigverify_spx_root_t expected_root;
+  spx_public_key_root(key->data, expected_root.data);
+  uint32_t i;
+  for (i = 0; launder32(i) < kSigverifySpxRootNumWords; ++i) {
+    expected_root.data[i] ^= shares[i];
+  }
+
+  switch (key_alg) {
+    case kOwnershipKeyAlgSpxPure:
+      HARDENED_RETURN_IF_ERROR(spx_verify(
+          signature->data, kSpxVerifyPureDomainSep, kSpxVerifyPureDomainSepSize,
+          msg_prefix_1, msg_prefix_1_len, msg_prefix_2, msg_prefix_2_len, msg,
+          msg_len, key->data, actual_root.data));
+      break;
+
+    case kOwnershipKeyAlgSpxPrehash:
+      util_reverse_bytes(digest.digest, sizeof(digest.digest));
+      HARDENED_RETURN_IF_ERROR(
+          spx_verify(signature->data, kSpxVerifyPrehashDomainSep,
+                     kSpxVerifyPrehashDomainSepSize,
+                     /*msg_prefix_2=*/NULL, /*msg_prefix_2_len=*/0,
+                     /*msg_prefix_3=*/NULL, /*msg_prefix_3_len=*/0,
+                     (unsigned char *)digest.digest, sizeof(digest.digest),
+                     key->data, actual_root.data));
+      break;
+    default:
+      return kErrorSigverifyBadSpxConfig;
+  }
+  uint32_t result = 0;
+  uint32_t diff = 0;
+  *flash_exec = kErrorOk ^ kSigverifySpxSuccess;
+  for (--i; launder32(i) < kSigverifySpxRootNumWords; --i) {
+    uint32_t val = expected_root.data[i] ^ actual_root.data[i];
+    diff |= val ^ shares[i];
+    diff |= ~diff + 1;          // Set upper bits to 1 if not 0, no change o/w.
+    diff |= ~(diff >> 31) + 1;  // Set all 1s if MSB is set, no change o/w.
+    result ^= val;
+    result |= diff;
+
+    *flash_exec ^= val;
+    *flash_exec |= diff;
+  }
+  HARDENED_CHECK_EQ(i, SIZE_MAX);
+  if (result != kErrorOk) {
+    return kErrorSigverifyBadSpxSignature;
+  }
+  return result;
+}
+
+rom_error_t owner_verify(uint32_t key_alg, const owner_keydata_t *key,
+                         const ecdsa_p256_signature_t *ecdsa_sig,
+                         const sigverify_spx_signature_t *spx_sig,
+                         const void *msg_prefix_1, size_t msg_prefix_1_len,
+                         const void *msg_prefix_2, size_t msg_prefix_2_len,
+                         const void *msg, size_t msg_len,
+                         const hmac_digest_t *digest, uint32_t *flash_exec) {
+  uint32_t ec_flash_exec = 0;
+  uint32_t spx_flash_exec = 0;
+  uint32_t category = key_alg & kOwnershipKeyAlgCategoryMask;
+  rom_error_t ecdsa = kErrorOwnershipInvalidAlgorithm;
+  rom_error_t spx = kErrorOwnershipInvalidAlgorithm;
+
+  // Start an ECDSA verify on OTBN (if requested by the key_alg).
+  if (category == kOwnershipKeyAlgCategoryEcdsa ||
+      category == kOwnershipKeyAlgCategoryHybrid) {
+    HARDENED_RETURN_IF_ERROR(sigverify_ecdsa_p256_start(
+        ecdsa_sig,
+        category == kOwnershipKeyAlgCategoryHybrid ? &key->hybrid.ecdsa
+                                                   : &key->ecdsa,
+        digest));
+  }
+
+  // While ECDSA verify is running in OTBN, compute the SPX verify on Ibex.
+  if (category == kOwnershipKeyAlgCategorySpx ||
+      category == kOwnershipKeyAlgCategoryHybrid) {
+    spx = owner_spx_verify(
+        key_alg,
+        category == kOwnershipKeyAlgCategoryHybrid ? &key->hybrid.spx
+                                                   : &key->spx,
+        spx_sig, msg_prefix_1, msg_prefix_1_len, msg_prefix_2, msg_prefix_2_len,
+        msg, msg_len, *digest, &spx_flash_exec);
+  } else {
+    HARDENED_CHECK_EQ(category, kOwnershipKeyAlgCategoryEcdsa);
+    spx = kErrorOk;
+    spx_flash_exec = kSigverifySpxSuccess;
+  }
+
+  // ECDSA should be finished.  Poll for completeion and get the result.
+  if (category == kOwnershipKeyAlgCategoryEcdsa ||
+      category == kOwnershipKeyAlgCategoryHybrid) {
+    ecdsa = sigverify_ecdsa_p256_finish(ecdsa_sig, &ec_flash_exec);
+  } else {
+    HARDENED_CHECK_EQ(category, kOwnershipKeyAlgCategorySpx);
+    ecdsa = kErrorOk;
+    ec_flash_exec = kSigverifyEcdsaSuccess;
+  }
+  HARDENED_RETURN_IF_ERROR(spx);
+  HARDENED_RETURN_IF_ERROR(ecdsa);
+  if (flash_exec) {
+    *flash_exec = ec_flash_exec ^ spx_flash_exec;
+  }
+  // Both values should be kErrorOk.  Mix them and return the result.
+  return (rom_error_t)((spx + ecdsa) >> 1);
+}
diff --git a/sw/device/silicon_creator/lib/ownership/owner_verify.h b/sw/device/silicon_creator/lib/ownership/owner_verify.h
new file mode 100644
index 0000000000000..c2700eb3e51a8
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/owner_verify.h
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNER_VERIFY_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNER_VERIFY_H_
+
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/spx_key.h"
+
+/**
+ * Verify data using an owner key or owner application key.
+ *
+ * @param key_alg The key algorithm (i.e.: ownership_key_alg_t).
+ * @param key The public key material.
+ * @param ecdsa_sig The ECDSA signature to verify (if relevant to key_alg).
+ * @param spx_sig The SPX signature to verify (if relevant to key_alg).
+ * @param msg_prefix_1 A portion of the SPX+ message to verify (if relevant).
+ * @param msg_prefix_1_len The length of msg_prefix_1.
+ * @param msg_prefix_2 A portion of the SPX+ message to verify (if relevant).
+ * @param msg_prefix_2_len The length of msg_prefix_2.
+ * @param msg The SPX+ message to verify (if relevant).
+ * @param msg_len The length of the msg.
+ * @param digest The SHA256 digest over the data to verify.
+ * @param flash_exec[out] The flash_exec password, if the verify succeeds.
+ * @return kErrorOk if the verify succeeds, else an error code.
+ */
+rom_error_t owner_verify(uint32_t key_alg, const owner_keydata_t *key,
+                         const ecdsa_p256_signature_t *ecdsa_sig,
+                         const sigverify_spx_signature_t *spx_sig,
+                         const void *msg_prefix_1, size_t msg_prefix_1_len,
+                         const void *msg_prefix_2, size_t msg_prefix_2_len,
+                         const void *msg, size_t msg_len,
+                         const hmac_digest_t *digest, uint32_t *flash_exec);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNER_VERIFY_H_
diff --git a/sw/device/silicon_creator/lib/ownership/owner_verify_functest.c b/sw/device/silicon_creator/lib/ownership/owner_verify_functest.c
new file mode 100644
index 0000000000000..5364745b29d86
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/owner_verify_functest.c
@@ -0,0 +1,67 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
+
+static rom_error_t owner_verify_spx_signature_not_found_test(void) {
+  owner_keydata_t key = {0};
+  hmac_digest_t digest = {0};
+  uint32_t flash_exec = 0;
+  rom_error_t error =
+      owner_verify(kOwnershipKeyAlgCategorySpx, &key, NULL, NULL, NULL, 0, NULL,
+                   0, NULL, 0, &digest, &flash_exec);
+  if (error != kErrorSigverifySpxNotFound) {
+    LOG_ERROR("error must be 0x%08x, not 0x%08x", kErrorSigverifySpxNotFound,
+              error);
+    return kErrorUnknown;
+  }
+  return kErrorOk;
+}
+
+static rom_error_t owner_verify_bad_spx_config_test(void) {
+  owner_keydata_t key = {0};
+  hmac_digest_t digest = {0};
+  uint32_t key_alg = kOwnershipKeyAlgCategorySpx | kOwnershipKeyAlgSpxPure |
+                     kOwnershipKeyAlgSpxPrehash;
+  sigverify_spx_signature_t spx_signature = {0};
+  uint32_t flash_exec = 0;
+  rom_error_t error = owner_verify(key_alg, &key, NULL, &spx_signature, NULL, 0,
+                                   NULL, 0, NULL, 0, &digest, &flash_exec);
+  if (error != kErrorSigverifyBadSpxConfig) {
+    LOG_ERROR("error must be 0x%08x, not 0x%08x", kErrorSigverifyBadSpxConfig,
+              error);
+    return kErrorUnknown;
+  }
+  return kErrorOk;
+}
+
+static rom_error_t owner_verify_bad_spx_signature_test(void) {
+  owner_keydata_t key = {0};
+  hmac_digest_t digest = {0};
+  uint32_t key_alg = kOwnershipKeyAlgSpxPure;
+  sigverify_spx_signature_t spx_signature = {0};
+  uint32_t flash_exec = 0;
+  rom_error_t error = owner_verify(key_alg, &key, NULL, &spx_signature, NULL, 0,
+                                   NULL, 0, NULL, 0, &digest, &flash_exec);
+  if (error != kErrorSigverifyBadSpxSignature) {
+    LOG_ERROR("error must be 0x%08x, not 0x%08x",
+              kErrorSigverifyBadSpxSignature, error);
+    return kErrorUnknown;
+  }
+  return kErrorOk;
+}
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  status_t error = OK_STATUS();
+
+  EXECUTE_TEST(error, owner_verify_spx_signature_not_found_test);
+  EXECUTE_TEST(error, owner_verify_bad_spx_config_test);
+  EXECUTE_TEST(error, owner_verify_bad_spx_signature_test);
+
+  return status_ok(error);
+}
diff --git a/sw/device/silicon_creator/lib/ownership/ownership.c b/sw/device/silicon_creator/lib/ownership/ownership.c
index 0f3d832baae50..feebd293db7d4 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership.c
+++ b/sw/device/silicon_creator/lib/ownership/ownership.c
@@ -1,21 +1,183 @@
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
-
 #include "sw/device/silicon_creator/lib/ownership/ownership.h"
 
+#include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/hardened_memory.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
 #include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/ownership/ecdsa.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
 #include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
 
-// RAM copy of the owner INFO pages from flash.
-owner_block_t owner_page[2];
+static owner_page_status_t owner_page_validity_check(size_t page,
+                                                     boot_data_t *bootdata) {
+  size_t sig_len =
+      (uintptr_t)&owner_page[0].signature - (uintptr_t)&owner_page[0];
+
+  // Any non-constrained words of the owner block device_id field are required
+  // to be `kLockConstraintNone`.  We wipe the field and then fill in the
+  // relevant words from the lifecycle constroller.
+  //
+  // For node-locked owner configurations, this makes the device_id from the
+  // lifecycle controller relevant to the cryptographic verification.
+  memset(owner_page[page].device_id, 0, sizeof(owner_page[page].device_id));
+  lifecycle_device_id_t id;
+  lifecycle_device_id_get(&id);
+  for (uint32_t i = 0; i < ARRAYSIZE(owner_page[0].device_id); ++i) {
+    if (owner_page[page].lock_constraint & (1u << i)) {
+      owner_page[page].device_id[i] = id.device_id[i];
+    } else {
+      owner_page[page].device_id[i] = kLockConstraintNone;
+    }
+  }
+
+  rom_error_t sealed = ownership_seal_check(page);
+  if (sealed == kErrorOk) {
+    HARDENED_CHECK_EQ(sealed, kErrorOk);
+    return kOwnerPageStatusSealed;
+  }
+
+  rom_error_t result = ownership_key_validate(
+      page, kOwnershipKeyOwner, kTlvTagOwner, &bootdata->nonce,
+      &owner_page[page].signature, &owner_page[page], sig_len, NULL);
+  if (result != kErrorOk) {
+    // If the page is bad, destroy the RAM copy.
+    memset(&owner_page[page], 0x5a, sizeof(owner_page[0]));
+    return kOwnerPageStatusInvalid;
+  }
+  return kOwnerPageStatusSigned;
+}
+
+OT_WEAK rom_error_t sku_creator_owner_init(boot_data_t *bootdata) {
+  OT_DISCARD(bootdata);
+  return kErrorOk;
+}
+
+static rom_error_t locked_owner_init(boot_data_t *bootdata,
+                                     owner_config_t *config,
+                                     owner_application_keyring_t *keyring) {
+  if (owner_page_valid[0] == kOwnerPageStatusSealed &&
+      owner_page_valid[1] == kOwnerPageStatusSigned &&
+      owner_block_newversion_mode() == kHardenedBoolTrue &&
+      owner_page[1].config_version > owner_page[0].config_version &&
+      owner_block_owner_key_equal() == kHardenedBoolTrue) {
+    rom_error_t error =
+        ownership_activate(bootdata, /*write_both_pages=*/kHardenedBoolFalse);
+    if (error == kErrorOk) {
+      HARDENED_CHECK_EQ(error, kErrorOk);
+      // Thunk the status of page 0 to Invalid so the next set of validity
+      // checks will copy the new page 1 content over to page 0 and establish a
+      // redundant backup of the new configuration.
+      owner_page_valid[0] = kOwnerPageStatusInvalid;
+      owner_page_valid[1] = kOwnerPageStatusSealed;
+    } else {
+      // If the new page wasn't good, we'll do nothing here and let the next set
+      // of validity checks copy page 0 over to page 1 and re-establish a
+      // redundant backup of the current configuration.
+    }
+  }
+
+  if (owner_page_valid[0] == kOwnerPageStatusSealed &&
+      owner_page_valid[1] == kOwnerPageStatusSealed) {
+    // Both pages sealed, nothing to do.
+  } else if (owner_page_valid[0] != kOwnerPageStatusSealed &&
+             owner_page_valid[1] == kOwnerPageStatusSealed) {
+    // Page 0 bad, Page 1 good: copy page 1 to page 0.
+    memcpy(&owner_page[0], &owner_page[1], sizeof(owner_page[0]));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(
+        &kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
+        &kFlashCtrlInfoPageOwnerSlot0, 0,
+        sizeof(owner_page[0]) / sizeof(uint32_t), &owner_page[0]));
+    owner_page_valid[0] = owner_page_valid[1];
+
+  } else if (owner_page_valid[1] != kOwnerPageStatusSealed &&
+             owner_page_valid[0] == kOwnerPageStatusSealed) {
+    // Page 1 bad, Page 0 good: copy page 0 to page 1.
+    memcpy(&owner_page[1], &owner_page[0], sizeof(owner_page[0]));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(
+        &kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
+        &kFlashCtrlInfoPageOwnerSlot1, 0,
+        sizeof(owner_page[1]) / sizeof(uint32_t), &owner_page[1]));
+    owner_page_valid[1] = owner_page_valid[0];
+  } else {
+    // Neither page is valid; go to the Recovery state.
+    dbg_printf("error: both owner pages invalid.\r\n");
+    bootdata->ownership_state = kOwnershipStateRecovery;
+    nonce_new(&bootdata->nonce);
+    HARDENED_RETURN_IF_ERROR(boot_data_write(bootdata));
+    return kErrorOwnershipBadInfoPage;
+  }
+  HARDENED_RETURN_IF_ERROR(owner_block_parse(
+      &owner_page[0], /*check_only=*/kHardenedBoolFalse, config, keyring));
+  uint32_t mp_index = 0;
+  HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+      config->flash, kBootSlotA,
+      /*owner_lockdown=*/kHardenedBoolFalse, &mp_index));
+  HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+      config->flash, kBootSlotB,
+      /*owner_lockdown=*/kHardenedBoolFalse, &mp_index));
+  HARDENED_RETURN_IF_ERROR(owner_block_info_apply(config->info));
+  return kErrorOk;
+}
+
+static rom_error_t unlocked_init(boot_data_t *bootdata, owner_config_t *config,
+                                 owner_application_keyring_t *keyring) {
+  uint32_t secondary =
+      bootdata->primary_bl0_slot == kBootSlotA ? kBootSlotB : kBootSlotA;
+  if (bootdata->ownership_state == kOwnershipStateUnlockedSelf &&
+      owner_page_valid[0] != kOwnerPageStatusSealed) {
+    // Owner Page 0 must be sealed in the "UnlockedSelf" state.  If not,
+    // go to the Recovery state.
+    bootdata->ownership_state = kOwnershipStateRecovery;
+    nonce_new(&bootdata->nonce);
+    HARDENED_RETURN_IF_ERROR(boot_data_write(bootdata));
+    return kErrorOwnershipBadInfoPage;
+  }
+
+  uint32_t mp_index = 0;
+  if (owner_page_valid[0] == kOwnerPageStatusSealed) {
+    // Configure the primary half of the flash as Owner Page 0 requests.
+    HARDENED_RETURN_IF_ERROR(owner_block_parse(
+        &owner_page[0], /*check_only=*/kHardenedBoolFalse, config, keyring));
+    HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+        config->flash, bootdata->primary_bl0_slot,
+        /*owner_lockdown=*/kHardenedBoolFalse, &mp_index));
+  }
+
+  if (owner_block_page1_valid_for_transfer(bootdata) == kHardenedBoolTrue) {
+    // If we passed the validity test for Owner Page 1, test parse the config.
+    rom_error_t result = owner_block_parse(
+        &owner_page[1], /*check_only=*/kHardenedBoolTrue, NULL, NULL);
+    if (result == kErrorOk) {
+      // Parse the configuration and add its keys to the keyring.
+      HARDENED_RETURN_IF_ERROR(owner_block_parse(
+          &owner_page[1], /*check_only=*/kHardenedBoolFalse, config, keyring));
+    } else {
+      dbg_printf("error: owner page 1 invalid.\r\n");
+    }
+  }
+  HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+      config->flash, secondary,
+      /*owner_lockdown=*/kHardenedBoolFalse, &mp_index));
+  HARDENED_RETURN_IF_ERROR(owner_block_info_apply(config->info));
+  return kErrorOk;
+}
 
-rom_error_t ownership_init(void) {
+rom_error_t ownership_init(boot_data_t *bootdata, owner_config_t *config,
+                           owner_application_keyring_t *keyring) {
   flash_ctrl_perms_t perm = {
       .read = kMultiBitBool4True,
       .write = kMultiBitBool4True,
@@ -24,46 +186,41 @@ rom_error_t ownership_init(void) {
   flash_ctrl_cfg_t cfg = {
       .scrambling = kMultiBitBool4True,
       .ecc = kMultiBitBool4True,
+      .he = kMultiBitBool4False,
   };
   flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot0, perm);
   flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot0, cfg);
   flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot1, perm);
   flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot1, cfg);
+  // Set up the OwnerSecret page for ECC & Scrambling.  We won't
+  // turn on read/write/earse permissions until we need them.
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSecret, cfg);
+
   // We don't want to abort ownership setup if we fail to
   // read the INFO pages, so we discard the error result.
-  OT_DISCARD(flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot0, 0,
-                                  sizeof(owner_page[0]) / sizeof(uint32_t),
-                                  &owner_page[0]));
-  OT_DISCARD(flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot1, 0,
-                                  sizeof(owner_page[1]) / sizeof(uint32_t),
-                                  &owner_page[1]));
-
-  // TODO(cfrantz): validate owner pages.
-  // For now, just validate the signature on the page
-  size_t len = (uintptr_t)&owner_page[0].signature - (uintptr_t)&owner_page[0];
-  hardened_bool_t result;
-  result =
-      ownership_key_validate(/*page=*/0, kOwnershipKeyOwner,
-                             &owner_page[0].signature, &owner_page[0], len);
-  if (result == kHardenedBoolFalse) {
-    // If the page is bad, destroy the RAM copy.
-    memset(&owner_page[0], 0xFF, sizeof(owner_page[0]));
+  if (flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                           sizeof(owner_page[0]) / sizeof(uint32_t),
+                           &owner_page[0]) == kErrorOk) {
+    owner_page_valid[0] = owner_page_validity_check(0, bootdata);
+  } else {
+    owner_page_valid[0] = kOwnerPageStatusInvalid;
+    memset(&owner_page[0], 0xff, sizeof(owner_page[0]));
   }
-  result =
-      ownership_key_validate(/*page=*/0, kOwnershipKeyOwner,
-                             &owner_page[0].signature, &owner_page[0], len);
-  if (result == kHardenedBoolFalse) {
-    // If the page is bad, destroy the RAM copy;.
-    memset(&owner_page[1], 0xFF, sizeof(owner_page[1]));
+  if (flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot1, 0,
+                           sizeof(owner_page[1]) / sizeof(uint32_t),
+                           &owner_page[1]) == kErrorOk) {
+    owner_page_valid[1] = owner_page_validity_check(1, bootdata);
+  } else {
+    owner_page_valid[1] = kOwnerPageStatusInvalid;
+    memset(&owner_page[1], 0xff, sizeof(owner_page[1]));
   }
 
-  // TOOD(cfrantz):
   // Depending on ownership state:
   // - kOwnershipStateLockedOwner:
   //     - Make sure page0 and page1 are identical and fix if not.
   //     - Set up flash config.
   //     - Enumerate application keys.
-  // - kOwnershipStateLockedUpdate:
+  // - kOwnershipStateUnlockedSelf:
   //     - Allow the pages to be different if the owner keys are the same.
   //     - Set up flash config: primary from page0, secondary from page 1.
   //     - Enumerate application keys from both pages.
@@ -75,9 +232,104 @@ rom_error_t ownership_init(void) {
   //     - Allow the pages to be different.
   //     - Set up flash config: primary from page0, secondary from page 1.
   //     - Enumerate application keys from both pages.
-  // - kOwnershipStateLockedNone: Allow the pages to be different.
+  // - kOwnershipStateRecovery: Allow the pages to be different.
   //     - Disaster state. Do nothing and wait for remediation via
   //       the recovery key.
 
+  dbg_printf("ownership: %C\r\n", bootdata->ownership_state);
+  owner_config_default(config);
+
+  // We give the weak `sku_creator_owner_init` function the opportunity to
+  // initialize ownership if it is uninitialized or needs updating.
+  //
+  // This is a temporary measure to get ownership configs installed on
+  // pre-existing silicon and to update the owner configuration automatically
+  // should we decide to update it during development.
+  //
+  // When we settle on a default ownership configuration, we'll remove this
+  // function and possibly relegate it to the `default` case below, only to
+  // be used should the chip enter the "no owner recovery" state.
+  HARDENED_RETURN_IF_ERROR(sku_creator_owner_init(bootdata));
+
+  rom_error_t error = kErrorOwnershipNoOwner;
+  // TODO(#22386): Harden this switch/case statement.
+  switch (bootdata->ownership_state) {
+    case kOwnershipStateLockedOwner:
+      error = locked_owner_init(bootdata, config, keyring);
+      break;
+    case kOwnershipStateUnlockedSelf:
+      OT_FALLTHROUGH_INTENDED;
+    case kOwnershipStateUnlockedAny:
+      OT_FALLTHROUGH_INTENDED;
+    case kOwnershipStateUnlockedEndorsed:
+      error = unlocked_init(bootdata, config, keyring);
+      break;
+    default:
+        /* Do nothing. */;
+  }
+  return error;
+}
+
+rom_error_t ownership_flash_lockdown(boot_data_t *bootdata, boot_log_t *bootlog,
+                                     const owner_config_t *config) {
+  if (bootdata->ownership_state == kOwnershipStateLockedOwner) {
+    uint32_t mp_index = 0;
+    HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+        config->flash, kBootSlotA,
+        /*owner_lockdown=*/bootlog->bl0_slot, &mp_index));
+    HARDENED_RETURN_IF_ERROR(owner_block_flash_apply(
+        config->flash, kBootSlotB,
+        /*owner_lockdown=*/bootlog->bl0_slot, &mp_index));
+    HARDENED_RETURN_IF_ERROR(owner_block_info_lockdown(config->info));
+  } else {
+    HARDENED_CHECK_NE(bootdata->ownership_state, kOwnershipStateLockedOwner);
+  }
   return kErrorOk;
 }
+
+void ownership_pages_lockdown(boot_data_t *bootdata, hardened_bool_t rescue) {
+#ifdef ROM_EXT_KLOBBER_ALLOWED
+  if (rescue == kHardenedBoolTrue) {
+    // If ROM_EXT_KLOBBER_ALLOWED and we're in rescue mode, we skip
+    // lockdown because the rescue protcol is permitted, on DEV chips
+    // only, to erase the ownership pages.  This exists to simulate
+    // disaster scenarios and test the disaster recovery mechanisms.
+    //
+    // Under normal circumstances, the ROM_EXT is not built with this
+    // capability.
+    return;
+  }
+#endif
+  flash_ctrl_perms_t perm = {
+      .read = kMultiBitBool4True,
+      .write = kMultiBitBool4False,
+      .erase = kMultiBitBool4False,
+  };
+  flash_ctrl_cfg_t cfg = {
+      .scrambling = kMultiBitBool4True,
+      .ecc = kMultiBitBool4True,
+      .he = kMultiBitBool4False,
+  };
+  // Always make page 0 read only.
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot0, perm);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot0, cfg);
+  abs_mmio_write32(kFlashCtrlInfoPageOwnerSlot0.cfg_wen_addr, 0);
+  if (rescue == kHardenedBoolTrue) {
+    // Do not lock page 1 in rescue mode.
+    HARDENED_CHECK_EQ(rescue, kHardenedBoolTrue);
+    return;
+  }
+  if (bootdata->ownership_state == kOwnershipStateLockedOwner) {
+    if (owner_block_newversion_mode() == kHardenedBoolTrue) {
+      // Leave page 1 unlocked if we're in "NewVersion" update mode.
+    } else {
+      // Otherwise, make the page read-only.
+      flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot1, perm);
+      flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot1, cfg);
+    }
+  } else {
+    // In any of the unlocked modes, leave page 1 unlocked.
+  }
+  abs_mmio_write32(kFlashCtrlInfoPageOwnerSlot1.cfg_wen_addr, 0);
+  return;
+}
diff --git a/sw/device/silicon_creator/lib/ownership/ownership.h b/sw/device/silicon_creator/lib/ownership/ownership.h
index c8b587e83cdbf..3df439b192cfe 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership.h
+++ b/sw/device/silicon_creator/lib/ownership/ownership.h
@@ -6,17 +6,43 @@
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_H_
 
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
 
 /**
- * RAM copies of the owner pages read out of flash INFO pages.
+ * Initialize the owner pages from flash
  */
-extern owner_block_t owner_page[2];
+rom_error_t ownership_init(boot_data_t *bootdata, owner_config_t *config,
+                           owner_application_keyring_t *keyring);
 
 /**
- * Initialize the owner pages from flash
+ * Lockdown the flash configuration.
+ *
+ * @param bootdata The current bootdata.
+ * @param active_slot The active slot.
+ * @param config The current owner configuration.
+ * @return error state.
  */
-rom_error_t ownership_init(void);
+rom_error_t ownership_flash_lockdown(boot_data_t *bootdata, boot_log_t *bootlog,
+                                     const owner_config_t *config);
+
+/**
+ * Lockdown the ownership info pages.
+ *
+ * @param bootdata The current bootdata.
+ * @param rescue Whether the ROM_EXT is in rescue mode.
+ */
+void ownership_pages_lockdown(boot_data_t *bootdata, hardened_bool_t rescue);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif
 
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_H_
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_activate.c b/sw/device/silicon_creator/lib/ownership/ownership_activate.c
new file mode 100644
index 0000000000000..71b0e483ac567
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/ownership_activate.c
@@ -0,0 +1,141 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
+
+rom_error_t ownership_activate(boot_data_t *bootdata,
+                               hardened_bool_t write_both_pages) {
+  // Check if page1 parses correctly.
+  HARDENED_RETURN_IF_ERROR(owner_block_parse(
+      &owner_page[1], /*check_only*/ kHardenedBoolTrue, NULL, NULL));
+
+  // Seal page one to this chip.
+  ownership_seal_page(/*page=*/1);
+
+  // If requested, reset the mim security version of the application firmware.
+  if (owner_page[1].min_security_version_bl0 != UINT32_MAX) {
+    bootdata->min_security_version_bl0 = owner_page[1].min_security_version_bl0;
+  }
+
+  // TODO(cfrantz): Consider reading back the flash pages to check that the
+  // flash writes succeeded.
+  //
+  // Program the sealed page into slot 1.
+  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot1,
+                                                 kFlashCtrlEraseTypePage));
+  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
+      &kFlashCtrlInfoPageOwnerSlot1, 0,
+      sizeof(owner_page[1]) / sizeof(uint32_t), &owner_page[1]));
+
+  if (write_both_pages == kHardenedBoolTrue) {
+    // Program the same data into slot 0.
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(
+        &kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
+        &kFlashCtrlInfoPageOwnerSlot0, 0,
+        sizeof(owner_page[1]) / sizeof(uint32_t), &owner_page[1]));
+  }
+
+  return kErrorOk;
+}
+
+static rom_error_t activate_handler(boot_svc_msg_t *msg,
+                                    boot_data_t *bootdata) {
+  // Check if page1 is in a valid state for a transfer (e.g. signature and owner
+  // requirements are met). We do this first (rather than parse) because if the
+  // signature requirements are not met, the RAM copy of the owner page will be
+  // destroyed.
+  if (owner_block_page1_valid_for_transfer(bootdata) != kHardenedBoolTrue) {
+    return kErrorOwnershipInvalidInfoPage;
+  }
+
+  // Set the variable checking whether the correct signatures have been
+  // verified.
+  uint32_t flash_exec = 0;
+
+  // Check the activation key and the nonce.
+  size_t len = (uintptr_t)&msg->ownership_activate_req.signature -
+               (uintptr_t)&msg->ownership_activate_req.primary_bl0_slot;
+  HARDENED_RETURN_IF_ERROR(ownership_key_validate(
+      /*page=*/1, kOwnershipKeyActivate, msg->header.type, &bootdata->nonce,
+      &msg->ownership_activate_req.signature,
+      &msg->ownership_activate_req.primary_bl0_slot, len, &flash_exec));
+
+  // Verify that we passed signature verification for the message.
+  HARDENED_CHECK_EQ(flash_exec, kSigverifyFlashExec);
+
+  if (!nonce_equal(&msg->ownership_activate_req.nonce, &bootdata->nonce)) {
+    return kErrorOwnershipInvalidNonce;
+  }
+
+  // Verify the device identification number is correct.
+  lifecycle_device_id_t device_id;
+  lifecycle_device_id_get(&device_id);
+  if (lifecycle_din_eq(&device_id, msg->ownership_activate_req.din) !=
+      kHardenedBoolTrue) {
+    return kErrorOwnershipInvalidDin;
+  }
+
+  // Copy the prior owner's key so we can save it in the key history.
+  uint32_t prior_key_alg = owner_page[0].ownership_key_alg;
+  owner_keydata_t prior_owner_key = owner_page[0].owner_key;
+
+  HARDENED_RETURN_IF_ERROR(
+      ownership_activate(bootdata, /*write_both_pages=*/kHardenedBoolTrue));
+
+  // The requested primary_bl0_slot is user input.
+  // Legal values change the primary boot slot.  All other values result in no
+  // change.
+  if (msg->ownership_activate_req.primary_bl0_slot == kBootSlotA ||
+      msg->ownership_activate_req.primary_bl0_slot == kBootSlotB) {
+    bootdata->primary_bl0_slot = msg->ownership_activate_req.primary_bl0_slot;
+  }
+
+  if (bootdata->ownership_state == kOwnershipStateUnlockedSelf) {
+    // An activate from UnlockedSelf is not a transfer and should not
+    // regenerate the OwnerSecret page.
+    HARDENED_CHECK_EQ(bootdata->ownership_state, kOwnershipStateUnlockedSelf);
+  } else {
+    // All other activations are transfers and need to regenerate entropy stored
+    // in the OwnerSecret page.
+    HARDENED_RETURN_IF_ERROR(
+        ownership_secret_new(prior_key_alg, &prior_owner_key));
+    bootdata->ownership_transfers += 1;
+  }
+
+  // Set the ownership state to LockedOwner.
+  nonce_new(&bootdata->nonce);
+  bootdata->ownership_state = kOwnershipStateLockedOwner;
+  memset(bootdata->next_owner, 0, sizeof(bootdata->next_owner));
+  return kErrorWriteBootdataThenReboot;
+}
+
+rom_error_t ownership_activate_handler(boot_svc_msg_t *msg,
+                                       boot_data_t *bootdata) {
+  rom_error_t error = kErrorOwnershipInvalidState;
+  switch (bootdata->ownership_state) {
+    case kOwnershipStateUnlockedSelf:
+    case kOwnershipStateUnlockedAny:
+    case kOwnershipStateUnlockedEndorsed:
+      error = activate_handler(msg, bootdata);
+      break;
+    default:
+        /* nothing */;
+  }
+  boot_svc_ownership_activate_res_init(
+      error == kErrorWriteBootdataThenReboot ? kErrorOk : error,
+      &msg->ownership_activate_res);
+  return error;
+}
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_activate.h b/sw/device/silicon_creator/lib/ownership/ownership_activate.h
new file mode 100644
index 0000000000000..15d1f602e14ed
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/ownership_activate.h
@@ -0,0 +1,42 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_ACTIVATE_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_ACTIVATE_H_
+
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Activate the owner configuration on owner page 1.
+ *
+ * @param bootdata A pointer to the current boot_data in RAM.
+ * @param write_both_pages Whether to write the activated page to both owner
+ *                         pages.
+ * @return rom_error_t
+ */
+rom_error_t ownership_activate(boot_data_t *bootdata,
+                               hardened_bool_t write_both_pages);
+
+/**
+ * Process a boot_svc OwnershipActivate message.
+ *
+ * @param msg The boot_svc OwnershipActivate message to process.
+ * @param bootdata A pointer to the current boot_data in RAM.
+ * @return rom_error_t
+ */
+
+rom_error_t ownership_activate_handler(boot_svc_msg_t *msg,
+                                       boot_data_t *bootdata);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_ACTIVATE_H_
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_activate_unittest.cc b/sw/device/silicon_creator/lib/ownership/ownership_activate_unittest.cc
new file mode 100644
index 0000000000000..c75cb8f841a57
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/ownership_activate_unittest.cc
@@ -0,0 +1,453 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+
+#include <stdint.h>
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "sw/device/lib/base/global_mock.h"
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/nonce.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/mock_ownership_key.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace {
+using ::testing::_;
+using ::testing::DoAll;
+using ::testing::Return;
+using ::testing::SetArgPointee;
+
+constexpr nonce_t kDefaultNonce = {1, 2};
+constexpr uint32_t kActivate =
+    static_cast<uint32_t>(kBootSvcOwnershipActivateReqType);
+
+class OwnershipActivateTest : public rom_test::RomTest {
+ protected:
+  void MakePage1StructValid() {
+    owner_page[1].header.tag = kTlvTagOwner;
+    owner_page[1].header.length = sizeof(owner_page[1]);
+    owner_page[1].header.version = (struct_version_t){0, 0};
+    owner_page[1].config_version = 0;
+    owner_page[1].min_security_version_bl0 = UINT32_MAX;
+    owner_page[1].lock_constraint = 0;
+    memset(owner_page[1].device_id, 0x7e, sizeof(owner_page[1].device_id));
+    memset(owner_page[1].data, 0x5a, sizeof(owner_page[1].data));
+  }
+
+  void MakePage1Valid(bool valid) {
+    MakePage1StructValid();
+    ownership_state_t state =
+        static_cast<ownership_state_t>(bootdata_.ownership_state);
+    owner_page_valid[1] = kOwnerPageStatusSigned;
+    uint32_t modifier = valid ? 0 : 1;
+
+    switch (state) {
+      case kOwnershipStateUnlockedEndorsed:
+        // In UnlockedEndorsed, the hash of the owner key in page1 must be equal
+        // to the value stored in boot_data.
+        EXPECT_CALL(hmac_, sha256_init());
+        EXPECT_CALL(hmac_, sha256_update(_, _));
+        EXPECT_CALL(hmac_, sha256_update(_, _));
+        EXPECT_CALL(hmac_, sha256_process());
+        EXPECT_CALL(hmac_, sha256_final(_))
+            .WillOnce(SetArgPointee<0>((hmac_digest_t){{
+                bootdata_.next_owner[0] + modifier,
+                bootdata_.next_owner[1],
+                bootdata_.next_owner[2],
+                bootdata_.next_owner[3],
+                bootdata_.next_owner[4],
+                bootdata_.next_owner[5],
+                bootdata_.next_owner[6],
+                bootdata_.next_owner[7],
+            }}));
+      case kOwnershipStateUnlockedSelf:
+        owner_page[1].owner_key = owner_page[0].owner_key;
+        owner_page[1].owner_key.raw[0] += modifier;
+        break;
+      case kOwnershipStateUnlockedAny:
+        // In UnlockedAny, there are no conditions that page1 must meet.
+        break;
+      case kOwnershipStateLockedOwner:
+        owner_page_valid[1] = kOwnerPageStatusSealed;
+        break;
+      case kOwnershipStateRecovery:
+        owner_page_valid[1] = kOwnerPageStatusInvalid;
+        break;
+    }
+  }
+
+  boot_data_t bootdata_ = {
+      .nonce = kDefaultNonce,
+      .ownership_state = kOwnershipStateLockedOwner,
+  };
+  boot_svc_msg_t message_ = {
+      .ownership_activate_req =
+          {
+              .header =
+                  {
+                      .type = kBootSvcOwnershipActivateReqType,
+                  },
+              .nonce = kDefaultNonce,
+          },
+  };
+
+  rom_test::MockHmac hmac_;
+  rom_test::MockRnd rnd_;
+  rom_test::MockFlashCtrl flash_ctrl_;
+  rom_test::MockBootSvcHeader hdr_;
+  rom_test::MockLifecycle lifecycle_;
+  rom_test::MockOwnershipKey ownership_key_;
+};
+
+class OwnershipActivateInvalidStateTest
+    : public OwnershipActivateTest,
+      public testing::WithParamInterface<ownership_state_t> {};
+
+class OwnershipActivateValidStateTest
+    : public OwnershipActivateTest,
+      public testing::WithParamInterface<ownership_state_t> {};
+
+class OwnershipActivateNextBl0Slot
+    : public OwnershipActivateTest,
+      public testing::WithParamInterface<boot_slot_t> {};
+
+// Tests that requesting Activate in all Locked non-Update states fails.
+TEST_P(OwnershipActivateInvalidStateTest, InvalidState) {
+  bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipInvalidState);
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipActivateInvalidStateTest,
+                         testing::Values(kOwnershipStateLockedOwner,
+                                         kOwnershipStateRecovery));
+
+// Tests that an owner block with an invalid version fails.
+TEST_P(OwnershipActivateValidStateTest, InvalidVersion) {
+  bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
+  MakePage1Valid(true);
+  owner_page[1].header.version.major = 5;
+
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipOWNRVersion);
+}
+
+// Tests that an owner block with an invalid signature fails.
+TEST_P(OwnershipActivateValidStateTest, InvalidSignature) {
+  bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
+  // We want to pass the page 1 validity test to check the signature on the
+  // message.
+  MakePage1Valid(true);
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(
+          DoAll(SetArgPointee<7>(0), Return(kErrorOwnershipInvalidSignature)));
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipInvalidSignature);
+}
+
+// Tests that an ownership activate with an invalid nonce fails.
+TEST_P(OwnershipActivateValidStateTest, InvalidNonce) {
+  bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
+  bootdata_.nonce = {3, 4};
+  // We want to pass the page 1 validity test to check the nonce of the
+  // message.
+  MakePage1Valid(true);
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipInvalidNonce);
+}
+
+// Tests that an ownership activate with an invalid DIN fails.
+TEST_P(OwnershipActivateValidStateTest, InvalidActivateDin) {
+  bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
+  // We want to pass the page 1 validity test to check the nonce of the
+  // message.
+  MakePage1Valid(true);
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0, 1, 1}));
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipInvalidDin);
+}
+
+// Tests that an owner block with an invalid owner page with respect to the
+// current update state fails.
+TEST_P(OwnershipActivateValidStateTest, OwnerPageInvalid) {
+  ownership_state_t state = GetParam();
+  if (state == kOwnershipStateUnlockedAny) {
+    SUCCEED() << "There are no invalid conditions for UnlockedAny";
+    return;
+  }
+  bootdata_.ownership_state = static_cast<uint32_t>(state);
+
+  rom_error_t expected_result = kErrorOk;
+  owner_page[0].owner_key = {{1, 2, 3, 4, 5}};
+  bootdata_.next_owner[0] = 12345;
+  MakePage1Valid(false);
+
+  switch (state) {
+    case kOwnershipStateUnlockedSelf:
+    case kOwnershipStateUnlockedEndorsed:
+      // Test should fail with "Invalid Info Page".
+      expected_result = kErrorOwnershipInvalidInfoPage;
+      break;
+    default:
+      FAIL() << "Invalid state for this test: " << state;
+  }
+
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, expected_result);
+}
+
+// Tests that an owner block with a valid owner page with respect to the current
+// unlock state succeeds.
+TEST_P(OwnershipActivateValidStateTest, OwnerPageValid) {
+  ownership_state_t state = GetParam();
+  bootdata_.ownership_state = static_cast<uint32_t>(state);
+
+  owner_page[0].owner_key = {{1}};
+  memset(bootdata_.next_owner, 0, sizeof(bootdata_.next_owner));
+  bootdata_.next_owner[0] = 12345;
+  MakePage1Valid(true);
+
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+
+  switch (state) {
+    case kOwnershipStateUnlockedSelf:
+    case kOwnershipStateUnlockedAny:
+    case kOwnershipStateUnlockedEndorsed:
+      // Test should pass.
+      break;
+    default:
+      FAIL() << "Invalid state for this test: " << state;
+  }
+  // Once the new owner page is determined to be valid, the page will be sealed.
+  EXPECT_CALL(ownership_key_, seal_page(1));
+
+  // The sealed page will be written into flash owner slot 1 first.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot1, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+  // The sealed page will be written into flash owner slot 0 second.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+
+  if (state != kOwnershipStateUnlockedSelf) {
+    EXPECT_CALL(ownership_key_, secret_new(_, _)).WillOnce(Return(kErrorOk));
+  }
+
+  // The nonce will be regenerated.
+  EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(99));
+  // The boot_svc response will be finalized.
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorWriteBootdataThenReboot);
+  // After succeeding, the page should be sealed, the nonce changed and the
+  // ownership state set to LockedOwner.
+  EXPECT_FALSE(nonce_equal(&bootdata_.nonce, &kDefaultNonce));
+  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
+  // The default value of `owner_page.min_security_version_bl0` should perform
+  // no update to the bootdata's minimum version.
+  EXPECT_EQ(bootdata_.min_security_version_bl0, 0);
+}
+
+// Tests that an owner update with a non-default value of
+// `min_security_version_bl0` updates bootdata's copy.
+//
+// TODO(cfrantz): Refactor this test as it is nearly a complete copy of the
+// previous test except for the manipulation of the min_sec_ver.
+TEST_P(OwnershipActivateValidStateTest, UpdateBootdataBl0MinSecVer) {
+  ownership_state_t state = GetParam();
+  bootdata_.ownership_state = static_cast<uint32_t>(state);
+
+  owner_page[0].owner_key = {{1}};
+  memset(bootdata_.next_owner, 0, sizeof(bootdata_.next_owner));
+  bootdata_.next_owner[0] = 12345;
+  MakePage1Valid(true);
+  owner_page[1].min_security_version_bl0 = 5;
+
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+
+  switch (state) {
+    case kOwnershipStateUnlockedSelf:
+    case kOwnershipStateUnlockedAny:
+    case kOwnershipStateUnlockedEndorsed:
+      // Test should pass.
+      break;
+    default:
+      FAIL() << "Invalid state for this test: " << state;
+  }
+  // Once the new owner page is determined to be valid, the page will be sealed.
+  EXPECT_CALL(ownership_key_, seal_page(1));
+
+  // The sealed page will be written into flash owner slot 1 first.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot1, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+  // The sealed page will be written into flash owner slot 0 second.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+
+  if (state != kOwnershipStateUnlockedSelf) {
+    EXPECT_CALL(ownership_key_, secret_new(_, _)).WillOnce(Return(kErrorOk));
+  }
+
+  // The nonce will be regenerated.
+  EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(99));
+  // The boot_svc response will be finalized.
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorWriteBootdataThenReboot);
+  // After succeeding, the page should be sealed, the nonce changed and the
+  // ownership state set to LockedOwner.
+  EXPECT_FALSE(nonce_equal(&bootdata_.nonce, &kDefaultNonce));
+  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
+  // Bootdata should receive the owner_block's minimum version upon activation.
+  EXPECT_EQ(bootdata_.min_security_version_bl0, 5);
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipActivateValidStateTest,
+                         testing::Values(kOwnershipStateUnlockedSelf,
+                                         kOwnershipStateUnlockedAny,
+                                         kOwnershipStateUnlockedEndorsed));
+
+// TODO(cfrantz): Refactor this test as it is nearly a complete copy of the
+// previous test except for the manipulation of the primary_bl0_slot.
+TEST_P(OwnershipActivateNextBl0Slot, UpdateBootdataPrimaryBl0Slot) {
+  bootdata_.ownership_state = kOwnershipStateUnlockedAny;
+  boot_slot_t next_slot = GetParam();
+  message_.ownership_activate_req.primary_bl0_slot = next_slot;
+
+  // We initialize the primary slot with an invalid value so we can
+  // check later if the value is changed or unchanged according the
+  // requested next_slot value.
+  bootdata_.primary_bl0_slot = static_cast<boot_slot_t>(0);
+
+  owner_page[0].owner_key = {{1}};
+  memset(bootdata_.next_owner, 0, sizeof(bootdata_.next_owner));
+  MakePage1Valid(true);
+
+  EXPECT_CALL(ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+
+  // Once the new owner page is determined to be valid, the page will be sealed.
+  EXPECT_CALL(ownership_key_, seal_page(1));
+
+  // The sealed page will be written into flash owner slot 1 first.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot1, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+  // The sealed page will be written into flash owner slot 0 second.
+  EXPECT_CALL(flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(flash_ctrl_, InfoWrite(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                                     sizeof(owner_page[1]) / sizeof(uint32_t),
+                                     &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+
+  // The transfer will regenerate the owner secret.
+  EXPECT_CALL(ownership_key_, secret_new(_, _)).WillOnce(Return(kErrorOk));
+
+  // The nonce will be regenerated.
+  EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(99));
+  // The boot_svc response will be finalized.
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_activate_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorWriteBootdataThenReboot);
+  // After succeeding, the page should be sealed, the nonce changed and the
+  // ownership state set to LockedOwner.
+  EXPECT_FALSE(nonce_equal(&bootdata_.nonce, &kDefaultNonce));
+  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
+
+  switch (next_slot) {
+    case kBootSlotA:
+    case kBootSlotB:
+      // Bootdata primary_bl0_slot should be updated.
+      EXPECT_EQ(bootdata_.primary_bl0_slot, next_slot);
+      break;
+    default:
+      // Bootdata primary_bl0_slot should be unchanged from the original value.
+      EXPECT_EQ(bootdata_.primary_bl0_slot, static_cast<boot_slot_t>(0));
+  }
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipActivateNextBl0Slot,
+                         testing::Values(kBootSlotA, kBootSlotB,
+                                         // Both `Unspecified` and all garbage
+                                         // values should result in no change.
+                                         kBootSlotUnspecified,
+                                         static_cast<boot_slot_t>(12345)));
+
+}  // namespace
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_key.c b/sw/device/silicon_creator/lib/ownership/ownership_key.c
index 4457a46b38358..7525cccc28366 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership_key.c
+++ b/sw/device/silicon_creator/lib/ownership/ownership_key.c
@@ -4,41 +4,116 @@
 
 #include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
 
+#include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/base/hardened.h"
 #include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/keymgr.h"
 #include "sw/device/silicon_creator/lib/drivers/kmac.h"
-#include "sw/device/silicon_creator/lib/ownership/ecdsa.h"
+#include "sw/device/silicon_creator/lib/nonce.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
+
+#include "flash_ctrl_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
 // RAM copy of the owner INFO pages from flash.
 extern owner_block_t owner_page[2];
 
-OT_WEAK const owner_key_t *const kNoOwnerRecoveryKey;
+OT_WEAK const owner_keydata_t *const kNoOwnerRecoveryKey;
+
+static bool is_signature_empty(const owner_signature_t *signature) {
+  for (size_t i = 0; i < ARRAYSIZE(signature->raw); ++i) {
+    if (signature->raw[i] != 0)
+      return false;
+  }
+  return true;
+}
+
+const owner_detached_signature_t *ownership_signature_scan(
+    uintptr_t start, size_t length, uint32_t command, const nonce_t *nonce) {
+  if (length < sizeof(owner_detached_signature_t))
+    return NULL;
+  length -= sizeof(owner_detached_signature_t);
+  uintptr_t end = start + length;
+  while (start < end) {
+    const owner_detached_signature_t *sig =
+        (const owner_detached_signature_t *)start;
+    if (sig->header.tag == kTlvTagDetachedSignature &&
+        sig->header.length == sizeof(owner_detached_signature_t) &&
+        sig->header.version.major == 0 && sig->command == command &&
+        nonce_equal(&sig->nonce, nonce)) {
+      return sig;
+    }
+    start += FLASH_CTRL_PARAM_BYTES_PER_PAGE;
+  }
+  return NULL;
+}
+
+rom_error_t ownership_key_validate(size_t page, ownership_key_t key,
+                                   uint32_t command, const nonce_t *nonce,
+                                   const owner_signature_t *signature,
+                                   const void *message, size_t len,
+                                   uint32_t *flash_exec) {
+  const ecdsa_p256_signature_t *ecdsa = NULL;
+  const sigverify_spx_signature_t *spx = NULL;
+  uint32_t key_alg = owner_page[page].ownership_key_alg;
+  if (!is_signature_empty(signature)) {
+    if (key_alg != kOwnershipKeyAlgEcdsaP256) {
+      return kErrorOwnershipInvalidAlgorithm;
+    }
+    ecdsa = &signature->ecdsa;
+  } else {
+    const owner_detached_signature_t *detached = ownership_signature_scan(
+        TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR,
+        TOP_EARLGREY_FLASH_CTRL_MEM_SIZE_BYTES, command, nonce);
+    if (detached == NULL) {
+      return kErrorOwnershipSignatureNotFound;
+    }
+    uint32_t category =
+        owner_page[page].ownership_key_alg & kOwnershipKeyAlgCategoryMask;
+    switch (category) {
+      case kOwnershipKeyAlgCategoryEcdsa:
+        ecdsa = &detached->signature.ecdsa;
+        break;
+      case kOwnershipKeyAlgCategorySpx:
+        spx = &detached->signature.spx;
+        break;
+      case kOwnershipKeyAlgCategoryHybrid:
+        ecdsa = &detached->signature.hybrid.ecdsa;
+        spx = &detached->signature.hybrid.spx;
+        break;
+      default:
+        return kErrorOwnershipInvalidAlgorithm;
+    }
+  }
+  hmac_digest_t digest;
+  hmac_sha256(message, len, &digest);
 
-hardened_bool_t ownership_key_validate(size_t page, ownership_key_t key,
-                                       const owner_signature_t *signature,
-                                       const void *message, size_t len) {
   if ((key & kOwnershipKeyUnlock) == kOwnershipKeyUnlock) {
-    if (ecdsa_verify_message(&owner_page[page].unlock_key, signature, message,
-                             len) == kHardenedBoolTrue) {
-      return kHardenedBoolTrue;
+    if (owner_verify(key_alg, &owner_page[page].unlock_key, ecdsa, spx, NULL, 0,
+                     NULL, 0, message, len, &digest, flash_exec) == kErrorOk) {
+      return kErrorOk;
     }
   }
   if ((key & kOwnershipKeyActivate) == kOwnershipKeyActivate) {
-    if (ecdsa_verify_message(&owner_page[page].activate_key, signature, message,
-                             len) == kHardenedBoolTrue) {
-      return kHardenedBoolTrue;
+    if (owner_verify(key_alg, &owner_page[page].activate_key, ecdsa, spx, NULL,
+                     0, NULL, 0, message, len, &digest,
+                     flash_exec) == kErrorOk) {
+      return kErrorOk;
     }
   }
   if (kNoOwnerRecoveryKey &&
       (key & kOwnershipKeyRecovery) == kOwnershipKeyRecovery) {
-    if (ecdsa_verify_message(kNoOwnerRecoveryKey, signature, message, len) ==
-        kHardenedBoolTrue) {
-      return kHardenedBoolTrue;
+    if (owner_verify(key_alg, kNoOwnerRecoveryKey, ecdsa, spx, NULL, 0, NULL, 0,
+                     message, len, &digest, flash_exec) == kErrorOk) {
+      return kErrorOk;
     }
   }
-  return ecdsa_verify_message(&owner_page[page].owner_key, signature, message,
-                              len);
+  if (owner_verify(key_alg, &owner_page[page].owner_key, ecdsa, spx, NULL, 0,
+                   NULL, 0, message, len, &digest, flash_exec) == kErrorOk) {
+    return kErrorOk;
+  }
+  return kErrorOwnershipInvalidSignature;
 }
 
 rom_error_t ownership_seal_init(void) {
@@ -53,6 +128,10 @@ rom_error_t ownership_seal_init(void) {
   return kErrorOk;
 }
 
+rom_error_t ownership_seal_clear(void) {
+  return sc_keymgr_sideload_clear(kScKeymgrDestKmac);
+}
+
 static rom_error_t seal_generate(const owner_block_t *page, uint32_t *seal) {
   size_t sealed_len = offsetof(owner_block_t, seal);
   HARDENED_RETURN_IF_ERROR(kmac_kmac256_start());
@@ -78,3 +157,112 @@ rom_error_t ownership_seal_check(size_t page) {
   }
   return kErrorOwnershipInvalidInfoPage;
 }
+
+static void reverse(void *buf, size_t len) {
+  char *x = (char *)buf;
+  char *y = x + len - 1;
+  for (; x < y; ++x, --y) {
+    char t = *x;
+    *x = *y;
+    *y = t;
+  }
+}
+
+static void secret_page_enable(multi_bit_bool_t read, multi_bit_bool_t write) {
+  flash_ctrl_perms_t perm = {
+      .read = (uint8_t)read,
+      .write = (uint8_t)write,
+      .erase = (uint8_t)write,
+  };
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSecret, perm);
+}
+
+rom_error_t ownership_secret_new(uint32_t prior_key_alg,
+                                 const owner_keydata_t *prior_owner_key) {
+  owner_secret_page_t secret;
+
+  secret_page_enable(/*read=*/kMultiBitBool4True, /*write=*/kMultiBitBool4True);
+  rom_error_t error =
+      flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSecret, 0,
+                           sizeof(secret) / sizeof(uint32_t), &secret);
+  if (error != kErrorOk) {
+    if (kDeviceType == kDeviceSilicon) {
+      // This should never happen on silicon because this page is initialized
+      // during personalization.
+      goto exitproc;
+    } else {
+      // This should only happen on the FPGA during the first ownership
+      // transfer.
+      HARDENED_CHECK_NE(error, kErrorOk);
+      HARDENED_CHECK_NE(kDeviceType, kDeviceSilicon);
+      error = flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSecret,
+                                    kFlashCtrlEraseTypePage);
+      memset(&secret, 0xFF, sizeof(secret));
+    }
+  }
+  if (error != kErrorOk)
+    goto exitproc;
+
+  // Compute the ownership hash chain:
+  // owner_history = HASH(owner_history || new_owner_key)
+  hmac_sha256_init();
+  hmac_sha256_update(&secret.owner_history, sizeof(secret.owner_history));
+  size_t keysz = sizeof(*prior_owner_key);
+  switch (prior_key_alg & kOwnershipKeyAlgCategoryMask) {
+    case kOwnershipKeyAlgCategoryEcdsa:
+      keysz = sizeof(prior_owner_key->ecdsa);
+      break;
+    case kOwnershipKeyAlgCategorySpx:
+      keysz = sizeof(prior_owner_key->spx);
+      break;
+    case kOwnershipKeyAlgCategoryHybrid:
+      keysz = sizeof(prior_owner_key->hybrid);
+      break;
+    default:;
+  }
+  hmac_sha256_update(prior_owner_key, keysz);
+  hmac_sha256_process();
+  hmac_sha256_final(&secret.owner_history);
+  // TODO(cfrantz): when merging to master, use the big-endian form of
+  // the sha256 function to avoid the reversal operation at the end.
+  reverse(&secret.owner_history, sizeof(secret.owner_history));
+
+  // Generate a new owner secret seed.  This will completely disconnect
+  // the keymgr state from the previous owner's keymgr state.
+  // We hash the previous owner entropy with the new owner key.
+  // owner_secret = HASH(owner_secret || new_owner_key)
+  // TODO: is this sufficient, or should we generate new entropy?
+  hmac_sha256_init();
+  hmac_sha256_update(&secret.owner_secret, sizeof(secret.owner_secret));
+  hmac_sha256_update(prior_owner_key, keysz);
+  hmac_sha256_process();
+  hmac_sha256_final(&secret.owner_secret);
+
+  error = flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSecret,
+                                kFlashCtrlEraseTypePage);
+  if (error != kErrorOk)
+    goto exitproc;
+  error = flash_ctrl_info_write(&kFlashCtrlInfoPageOwnerSecret, 0,
+                                sizeof(secret) / sizeof(uint32_t), &secret);
+
+exitproc:
+  secret_page_enable(/*read=*/kMultiBitBool4False,
+                     /*write=*/kMultiBitBool4False);
+  return error;
+}
+
+rom_error_t ownership_history_get(hmac_digest_t *history) {
+  secret_page_enable(/*read=*/kMultiBitBool4True,
+                     /*write=*/kMultiBitBool4False);
+  rom_error_t error =
+      flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSecret,
+                           offsetof(owner_secret_page_t, owner_history),
+                           sizeof(*history) / sizeof(uint32_t), history);
+  if (error != kErrorOk) {
+    // If there was an error reading the history, use all ones as a result.
+    memset(history, 0xFF, sizeof(*history));
+  }
+  secret_page_enable(/*read=*/kMultiBitBool4False,
+                     /*write=*/kMultiBitBool4False);
+  return error;
+}
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_key.h b/sw/device/silicon_creator/lib/ownership/ownership_key.h
index 16adc9b12e1ff..ddd1ddb3e7d56 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership_key.h
+++ b/sw/device/silicon_creator/lib/ownership/ownership_key.h
@@ -6,15 +6,17 @@
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_KEY_H_
 
 #include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/lib/ownership/datatypes.h"
 
 /**
  * The OwnershipNoOwnerRecoveryKey is a silicon_creator key that allows
- * recovery of a device should it get into the LockedNone state (ie:
+ * recovery of a device should it get into the Recovery state (ie:
  * a state where there is no valid owner).
  */
-extern const owner_key_t *const kNoOwnerRecoveryKey;
+extern const owner_keydata_t *const kNoOwnerRecoveryKey;
 
 typedef enum ownership_key {
   /** The owner_key in the owner page. */
@@ -30,6 +32,13 @@ typedef enum ownership_key {
   kOwnershipKeyRecovery = 0x8888,
 } ownership_key_t;
 
+typedef struct owner_secret_page {
+  /** Owner entropy. */
+  hmac_digest_t owner_secret;
+  /** Hash chain of previous owners. */
+  hmac_digest_t owner_history;
+} owner_secret_page_t;
+
 /**
  * Validate that a message was signed with a given owner key.
  * If the message fails verification with the Activate or Unlock key,
@@ -37,14 +46,20 @@ typedef enum ownership_key {
  *
  * @param page Owner-page on which the key resides.
  * @param key Which key (or keys) to use to validate the message.
+ * @param command The bootsvc command or entity this validate is for.
+ * @param nonce The current ROM_EXT nonce.
  * @param signature The signature over the message.
  * @param message Pointer to the message.
  * @param len Size of the message.
- * @return kHardenedBoolTrue if the message is valid.
+ * @param flash_exec The magic value signifying whether the signature was
+ * verified.
+ * @return kErrorOk if the message is valid.
  */
-hardened_bool_t ownership_key_validate(size_t page, ownership_key_t key,
-                                       const owner_signature_t *signature,
-                                       const void *message, size_t len);
+rom_error_t ownership_key_validate(size_t page, ownership_key_t key,
+                                   uint32_t command, const nonce_t *nonce,
+                                   const owner_signature_t *signature,
+                                   const void *message, size_t len,
+                                   uint32_t *flash_exec);
 
 /**
  * Initialize sealing.
@@ -56,6 +71,13 @@ hardened_bool_t ownership_key_validate(size_t page, ownership_key_t key,
  */
 rom_error_t ownership_seal_init(void);
 
+/**
+ * Clear the sideloaded key in the KMAC block.
+ *
+ * @return Success or error code.
+ */
+rom_error_t ownership_seal_clear(void);
+
 /**
  * Generate a seal for an ownership page.
  *
@@ -72,4 +94,22 @@ rom_error_t ownership_seal_page(size_t page);
  */
 rom_error_t ownership_seal_check(size_t page);
 
+/**
+ * Replace the owner secret with new entropy and update the ownership history.
+ *
+ * @param prior_key_alg The key algorithm of the prior owner_key.
+ * @param prior_owner_key The prior owner key.
+ * @return Success or error code.
+ */
+rom_error_t ownership_secret_new(uint32_t prior_key_alg,
+                                 const owner_keydata_t *prior_owner_key);
+
+/**
+ * Retrieve the owner history digest from the OwnerSecret page.
+ *
+ * @param history Digest of all previous owner keys.
+ * @return Success or error code.
+ */
+rom_error_t ownership_history_get(hmac_digest_t *history);
+
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_OWNERSHIP_KEY_H_
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_unittest.cc b/sw/device/silicon_creator/lib/ownership/ownership_unittest.cc
new file mode 100644
index 0000000000000..ddabc50785692
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/ownership_unittest.cc
@@ -0,0 +1,117 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+
+#include <stdint.h>
+
+#include "gmock/gmock.h"
+#include "gtest/gtest.h"
+#include "sw/device/lib/base/global_mock.h"
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/mock_abs_mmio.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/mock_boot_data.h"
+#include "sw/device/silicon_creator/lib/nonce.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/mock_ownership_key.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace {
+using ::rom_test::FlashCfg;
+using ::rom_test::FlashPerms;
+using ::testing::_;
+using ::testing::Return;
+using ::testing::SetArgPointee;
+
+// We don't use a mock here since it'd be overkill; expectations are easier
+// to write on a global string, instead. This also produces a simpler error
+// message instead of a tower of failed expectations.
+static std::string *uart_buf = new std::string;
+extern "C" void uart_putchar(uint8_t c) { uart_buf->push_back(c); }
+
+class OwnershipInitTest : public rom_test::RomTest {
+ protected:
+  rom_test::MockHmac hmac_;
+  rom_test::MockRnd rnd_;
+  rom_test::NiceMockFlashCtrl flash_ctrl_;
+  rom_test::MockLifecycle lifecycle_;
+  rom_test::MockOwnershipKey ownership_key_;
+  rom_test::MockBootData mock_bootdata_;
+};
+
+TEST_F(OwnershipInitTest, InitWithRecoveryState) {
+  boot_data_t bootdata = {.ownership_state = kOwnershipStateRecovery};
+  owner_config_t config = {};
+  owner_application_keyring_t keyring = {};
+
+  EXPECT_CALL(flash_ctrl_, InfoRead(&kFlashCtrlInfoPageOwnerSlot0, _, _, _))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(ownership_key_, seal_check(0))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+  EXPECT_CALL(ownership_key_, validate(_, _, _, _, _, _, _, _))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+
+  EXPECT_CALL(flash_ctrl_, InfoRead(&kFlashCtrlInfoPageOwnerSlot1, _, _, _))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(ownership_key_, seal_check(1))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+  EXPECT_CALL(ownership_key_, validate(_, _, _, _, _, _, _, _))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+
+  EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(0));
+  EXPECT_EQ(ownership_init(&bootdata, &config, &keyring),
+            kErrorOwnershipNoOwner);
+}
+
+class OwnershipInitInvalidPagesTest
+    : public OwnershipInitTest,
+      public testing::WithParamInterface<ownership_state_t> {};
+
+TEST_P(OwnershipInitInvalidPagesTest, InitWithInfoPageCorrupted) {
+  boot_data_t bootdata = {.ownership_state = GetParam()};
+  owner_config_t config = {};
+  owner_application_keyring_t keyring = {};
+
+  EXPECT_CALL(flash_ctrl_, InfoRead(&kFlashCtrlInfoPageOwnerSlot0, _, _, _))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(ownership_key_, seal_check(0))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+  EXPECT_CALL(ownership_key_, validate(_, _, _, _, _, _, _, _))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+
+  EXPECT_CALL(flash_ctrl_, InfoRead(&kFlashCtrlInfoPageOwnerSlot1, _, _, _))
+      .WillOnce(Return(kErrorOk));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(ownership_key_, seal_check(1))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+  EXPECT_CALL(ownership_key_, validate(_, _, _, _, _, _, _, _))
+      .WillOnce(Return(kErrorOwnershipInvalidInfoPage));
+
+  EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(0));
+  EXPECT_CALL(mock_bootdata_, Write(_)).WillOnce(Return(kErrorOk));
+
+  EXPECT_EQ(ownership_init(&bootdata, &config, &keyring),
+            kErrorOwnershipBadInfoPage);
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipInitInvalidPagesTest,
+                         testing::Values(kOwnershipStateLockedOwner,
+                                         kOwnershipStateUnlockedSelf));
+}  // namespace
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_unlock.c b/sw/device/silicon_creator/lib/ownership/ownership_unlock.c
index e6713f2c23ac4..a8f57d52a7e9f 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership_unlock.c
+++ b/sw/device/silicon_creator/lib/ownership/ownership_unlock.c
@@ -9,14 +9,15 @@
 #include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
 #include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/ownership/ecdsa.h"
-#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
 #include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
 
 static hardened_bool_t is_locked_none(uint32_t ownership_state) {
   if (ownership_state == kOwnershipStateLockedOwner ||
-      ownership_state == kOwnershipStateLockedUpdate ||
+      ownership_state == kOwnershipStateUnlockedSelf ||
       ownership_state == kOwnershipStateUnlockedAny ||
       ownership_state == kOwnershipStateUnlockedEndorsed) {
     return kHardenedBoolFalse;
@@ -24,21 +25,39 @@ static hardened_bool_t is_locked_none(uint32_t ownership_state) {
   return kHardenedBoolTrue;
 }
 
-static rom_error_t do_unlock(boot_svc_msg_t *msg, boot_data_t *bootdata) {
+static rom_error_t do_unlock(boot_svc_msg_t *msg, boot_data_t *bootdata,
+                             uint32_t *flash_exec) {
   // Verify that the nonce is correct.
   if (!nonce_equal(&msg->ownership_unlock_req.nonce, &bootdata->nonce)) {
     return kErrorOwnershipInvalidNonce;
   }
+
+  // Verify the device identification number is correct.
+  lifecycle_device_id_t device_id;
+  lifecycle_device_id_get(&device_id);
+  if (lifecycle_din_eq(&device_id, msg->ownership_unlock_req.din) !=
+      kHardenedBoolTrue) {
+    return kErrorOwnershipInvalidDin;
+  }
+
+  // Verify that we passed signature verification for the message.
+  HARDENED_CHECK_EQ(*flash_exec, kSigverifyFlashExec);
+
   if (msg->ownership_unlock_req.unlock_mode == kBootSvcUnlockEndorsed) {
     hmac_digest_t digest;
-    hmac_sha256(&msg->ownership_unlock_req.next_owner_key,
-                sizeof(msg->ownership_unlock_req.next_owner_key), &digest);
+    hmac_sha256_init();
+    hmac_sha256_update(&msg->ownership_unlock_req.next_owner_key_alg,
+                       sizeof(msg->ownership_unlock_req.next_owner_key_alg));
+    hmac_sha256_update(&msg->ownership_unlock_req.next_owner_key,
+                       sizeof(msg->ownership_unlock_req.next_owner_key));
+    hmac_sha256_process();
+    hmac_sha256_final(&digest);
     memcpy(&bootdata->next_owner, &digest, sizeof(digest));
     bootdata->ownership_state = kOwnershipStateUnlockedEndorsed;
   } else if (msg->ownership_unlock_req.unlock_mode == kBootSvcUnlockAny) {
     bootdata->ownership_state = kOwnershipStateUnlockedAny;
   } else if (msg->ownership_unlock_req.unlock_mode == kBootSvcUnlockUpdate) {
-    bootdata->ownership_state = kOwnershipStateLockedUpdate;
+    bootdata->ownership_state = kOwnershipStateUnlockedSelf;
   } else {
     return kErrorOwnershipInvalidMode;
   }
@@ -50,27 +69,43 @@ static rom_error_t unlock(boot_svc_msg_t *msg, boot_data_t *bootdata) {
   size_t len = (uintptr_t)&msg->ownership_unlock_req.signature -
                (uintptr_t)&msg->ownership_unlock_req.unlock_mode;
   if (bootdata->ownership_state == kOwnershipStateLockedOwner) {
+    // Set the variable checking whether the correct signatures have been
+    // verified
+    uint32_t flash_exec = 0;
+    switch (owner_page[0].update_mode) {
+      case kOwnershipUpdateModeOpen:
+        // The Open mode allows unlock to any unlock state.
+        break;
+      case kOwnershipUpdateModeNewVersion:
+        // The NewVersion mode forbids all unlocks.
+        return kErrorOwnershipUnlockDenied;
+      case kOwnershipUpdateModeSelf:
+      case kOwnershipUpdateModeSelfVersion:
+      default:
+        // The `unlock` funciton services UnlockAny and UnlockEndorsed requests,
+        // neither of which are valid for the `Self` mode.
+        return kErrorOwnershipInvalidMode;
+    }
     // Check the signature against the unlock key.
     // TODO(cfrantz): Add a mechanism to control whether or not the
     // recovery key is allowed here.
-    if (ownership_key_validate(
-            /*page=*/0, kOwnershipKeyUnlock | kOwnershipKeyRecovery,
-            &msg->ownership_unlock_req.signature,
-            &msg->ownership_unlock_req.unlock_mode,
-            len) == kHardenedBoolFalse) {
-      return kErrorOwnershipInvalidSignature;
-    }
-    return do_unlock(msg, bootdata);
+    HARDENED_RETURN_IF_ERROR(ownership_key_validate(
+        /*page=*/0, kOwnershipKeyUnlock | kOwnershipKeyRecovery,
+        msg->header.type, &bootdata->nonce,
+        &msg->ownership_unlock_req.signature,
+        &msg->ownership_unlock_req.unlock_mode, len, &flash_exec));
+    return do_unlock(msg, bootdata, &flash_exec);
   } else if (is_locked_none(bootdata->ownership_state) == kHardenedBoolTrue) {
     // In the No-Owner state, we check against the silicon_creator's
     // no_owner_recovery_key.
-    if (ownership_key_validate(/*page=*/0, kOwnershipKeyRecovery,
-                               &msg->ownership_unlock_req.signature,
-                               &msg->ownership_unlock_req.unlock_mode,
-                               len) == kHardenedBoolFalse) {
-      return kErrorOwnershipInvalidSignature;
-    }
-    return do_unlock(msg, bootdata);
+    // Set the variable checking whether the correct signatures have been
+    // verified
+    uint32_t flash_exec = 0;
+    HARDENED_RETURN_IF_ERROR(ownership_key_validate(
+        /*page=*/0, kOwnershipKeyRecovery, msg->header.type, &bootdata->nonce,
+        &msg->ownership_unlock_req.signature,
+        &msg->ownership_unlock_req.unlock_mode, len, &flash_exec));
+    return do_unlock(msg, bootdata, &flash_exec);
   } else {
     return kErrorOwnershipInvalidState;
   }
@@ -79,15 +114,28 @@ static rom_error_t unlock(boot_svc_msg_t *msg, boot_data_t *bootdata) {
 static rom_error_t unlock_update(boot_svc_msg_t *msg, boot_data_t *bootdata) {
   size_t len = (uintptr_t)&msg->ownership_unlock_req.signature -
                (uintptr_t)&msg->ownership_unlock_req.unlock_mode;
+  // Set the variable checking whether the correct signatures have been
+  // verified.
+  uint32_t flash_exec = 0;
   if (bootdata->ownership_state == kOwnershipStateLockedOwner) {
-    // Check the signature against the unlock key.
-    if (ownership_key_validate(/*page=*/0, kOwnershipKeyUnlock,
-                               &msg->ownership_unlock_req.signature,
-                               &msg->ownership_unlock_req.unlock_mode,
-                               len) == kHardenedBoolFalse) {
-      return kErrorOwnershipInvalidSignature;
+    switch (owner_page[0].update_mode) {
+      case kOwnershipUpdateModeNewVersion:
+        // The NewVersion mode forbids all unlocks.
+        return kErrorOwnershipUnlockDenied;
+      case kOwnershipUpdateModeSelf:
+      case kOwnershipUpdateModeSelfVersion:
+      case kOwnershipUpdateModeOpen:
+      default:
+          // The `unlock_update` funciton services UnlockUpdate update requests,
+          // which are valid for the `Open` and `Self` modes.
+          ;
     }
-    return do_unlock(msg, bootdata);
+    // Check the signature against the unlock key.
+    HARDENED_RETURN_IF_ERROR(ownership_key_validate(
+        /*page=*/0, kOwnershipKeyUnlock, msg->header.type, &bootdata->nonce,
+        &msg->ownership_unlock_req.signature,
+        &msg->ownership_unlock_req.unlock_mode, len, &flash_exec));
+    return do_unlock(msg, bootdata, &flash_exec);
   }
   return kErrorOwnershipInvalidState;
 }
@@ -97,17 +145,29 @@ static rom_error_t unlock_abort(boot_svc_msg_t *msg, boot_data_t *bootdata) {
                (uintptr_t)&msg->ownership_unlock_req.unlock_mode;
   if (bootdata->ownership_state == kOwnershipStateUnlockedEndorsed ||
       bootdata->ownership_state == kOwnershipStateUnlockedAny ||
-      bootdata->ownership_state == kOwnershipStateLockedUpdate) {
+      bootdata->ownership_state == kOwnershipStateUnlockedSelf) {
+    // Set the variable checking whether the correct signatures have been
+    // verified.
+    uint32_t flash_exec = 0;
     // Check the signature against the unlock key.
-    if (ownership_key_validate(/*page=*/0, kOwnershipKeyUnlock,
-                               &msg->ownership_unlock_req.signature,
-                               &msg->ownership_unlock_req.unlock_mode,
-                               len) == kHardenedBoolFalse) {
-      return kErrorOwnershipInvalidSignature;
-    }
+    HARDENED_RETURN_IF_ERROR(ownership_key_validate(
+        /*page=*/0, kOwnershipKeyUnlock, msg->header.type, &bootdata->nonce,
+        &msg->ownership_unlock_req.signature,
+        &msg->ownership_unlock_req.unlock_mode, len, &flash_exec));
+    // Verify that we passed signature verification for the message.
+    HARDENED_CHECK_EQ(flash_exec, kSigverifyFlashExec);
     if (!nonce_equal(&msg->ownership_unlock_req.nonce, &bootdata->nonce)) {
       return kErrorOwnershipInvalidNonce;
     }
+
+    // Verify the device identification number is correct.
+    lifecycle_device_id_t device_id;
+    lifecycle_device_id_get(&device_id);
+    if (lifecycle_din_eq(&device_id, msg->ownership_unlock_req.din) !=
+        kHardenedBoolTrue) {
+      return kErrorOwnershipInvalidDin;
+    }
+
     // Go back to locked owner.
     bootdata->ownership_state = kOwnershipStateLockedOwner;
     nonce_new(&bootdata->nonce);
diff --git a/sw/device/silicon_creator/lib/ownership/ownership_unlock_unittest.cc b/sw/device/silicon_creator/lib/ownership/ownership_unlock_unittest.cc
index d9dd4e5e1f49b..3b0d27745c834 100644
--- a/sw/device/silicon_creator/lib/ownership/ownership_unlock_unittest.cc
+++ b/sw/device/silicon_creator/lib/ownership/ownership_unlock_unittest.cc
@@ -13,16 +13,23 @@
 #include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
 #include "sw/device/silicon_creator/lib/drivers/mock_hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
 #include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
 #include "sw/device/silicon_creator/lib/error.h"
 #include "sw/device/silicon_creator/lib/ownership/datatypes.h"
 #include "sw/device/silicon_creator/lib/ownership/mock_ownership_key.h"
-#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
 #include "sw/device/silicon_creator/testing/rom_test.h"
 
 namespace {
 using ::testing::_;
+using ::testing::DoAll;
 using ::testing::Return;
+using ::testing::SetArgPointee;
+
+constexpr uint32_t kUnlock =
+    static_cast<uint32_t>(kBootSvcOwnershipUnlockReqType);
 
 /*
  * The OwnershipUnlockTest fixture provides a pre-initialized bootdata and
@@ -43,13 +50,21 @@ class OwnershipUnlockTest : public rom_test::RomTest {
                   {
                       .type = kBootSvcOwnershipUnlockReqType,
                   },
+              .din = {0, 0},
               .nonce = {1, 2},
           },
   };
 
+  void SetUp() override {
+    // Most tests operate with the owner configuration
+    // in the Open mode.
+    owner_page[0].update_mode = kOwnershipUpdateModeOpen;
+  }
+
   rom_test::MockHmac hmac_;
   rom_test::MockRnd rnd_;
   rom_test::MockBootSvcHeader hdr_;
+  rom_test::MockLifecycle lifecycle_;
   rom_test::MockOwnershipKey ownership_key_;
 };
 
@@ -73,6 +88,10 @@ class OwnershipUnlockAbortInvalidStateTest
     : public OwnershipUnlockTest,
       public testing::WithParamInterface<ownership_state_t> {};
 
+class OwnershipUnlockUpdateModesTest
+    : public OwnershipUnlockTest,
+      public testing::WithParamInterface<ownership_update_mode_t> {};
+
 // Tests that a bad `unlock_mode` returns an Invalid Request.
 TEST_F(OwnershipUnlockTest, BadUnlockMode) {
   message_.ownership_unlock_req.unlock_mode = 12345;
@@ -88,8 +107,10 @@ TEST_F(OwnershipUnlockTest, UnlockAny) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
   EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
@@ -108,8 +129,9 @@ TEST_F(OwnershipUnlockTest, UnlockAnyBadSignature) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolFalse));
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(
+          DoAll(SetArgPointee<7>(0), Return(kErrorOwnershipInvalidSignature)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -117,6 +139,25 @@ TEST_F(OwnershipUnlockTest, UnlockAnyBadSignature) {
   EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
 }
 
+// Test that requesting LockedOwner->UnlockedAny fails when the DIN doesn't
+// match.
+TEST_F(OwnershipUnlockTest, UnlockAnyBadDin) {
+  message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockAny;
+  EXPECT_CALL(ownership_key_,
+              validate(0,
+                       static_cast<ownership_key_t>(kOwnershipKeyUnlock |
+                                                    kOwnershipKeyRecovery),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0, 1, 1}));
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+
+  rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, kErrorOwnershipInvalidDin);
+  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
+}
+
 // Test that requesting LockedOwner->UnlockedAny fails when the nonce doesn't
 // match.
 TEST_F(OwnershipUnlockTest, UnlockAnyBadNonce) {
@@ -126,8 +167,8 @@ TEST_F(OwnershipUnlockTest, UnlockAnyBadNonce) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -146,7 +187,7 @@ TEST_P(OwnershipUnlockAnyStateTest, InvalidState) {
 }
 
 INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockAnyStateTest,
-                         testing::Values(kOwnershipStateLockedUpdate,
+                         testing::Values(kOwnershipStateUnlockedSelf,
                                          kOwnershipStateUnlockedAny,
                                          kOwnershipStateUnlockedEndorsed));
 
@@ -157,14 +198,19 @@ TEST_F(OwnershipUnlockTest, UnlockEndorsed) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
-  EXPECT_CALL(hmac_, sha256(_, _, _))
-      .WillOnce([&](const void *, size_t, hmac_digest_t *digest) {
-        for (size_t i = 0; i < ARRAYSIZE(digest->digest); ++i) {
-          digest->digest[i] = i;
-        }
-      });
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+  EXPECT_CALL(hmac_, sha256_init());
+  EXPECT_CALL(hmac_, sha256_update(_, _));
+  EXPECT_CALL(hmac_, sha256_update(_, _));
+  EXPECT_CALL(hmac_, sha256_process());
+  EXPECT_CALL(hmac_, sha256_final(_)).WillOnce([&](hmac_digest_t *digest) {
+    for (size_t i = 0; i < ARRAYSIZE(digest->digest); ++i) {
+      digest->digest[i] = i;
+    }
+  });
   EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
@@ -186,8 +232,9 @@ TEST_F(OwnershipUnlockTest, UnlockEndorsedBadSignature) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolFalse));
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(
+          DoAll(SetArgPointee<7>(0), Return(kErrorOwnershipInvalidSignature)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -204,8 +251,8 @@ TEST_F(OwnershipUnlockTest, UnlockEndorsedBadNonce) {
               validate(0,
                        static_cast<ownership_key_t>(kOwnershipKeyUnlock |
                                                     kOwnershipKeyRecovery),
-                       _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -224,17 +271,19 @@ TEST_P(OwnershipUnlockEndorsedStateTest, InvalidState) {
 }
 
 INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockEndorsedStateTest,
-                         testing::Values(kOwnershipStateLockedUpdate,
+                         testing::Values(kOwnershipStateUnlockedSelf,
                                          kOwnershipStateUnlockedAny,
                                          kOwnershipStateUnlockedEndorsed));
 
-// Test that requesting LockedOwner->LockedUpdate works.
+// Test that requesting LockedOwner->UnlockedSelf works.
 TEST_F(OwnershipUnlockTest, UnlockUpdate) {
   message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockUpdate;
-  EXPECT_CALL(
-      ownership_key_,
-      validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock), _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+  EXPECT_CALL(ownership_key_,
+              validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
   EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
@@ -242,17 +291,18 @@ TEST_F(OwnershipUnlockTest, UnlockUpdate) {
   EXPECT_EQ(error, kErrorWriteBootdataThenReboot);
   EXPECT_EQ(bootdata_.nonce.value[0], 5);
   EXPECT_EQ(bootdata_.nonce.value[1], 5);
-  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedUpdate);
+  EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateUnlockedSelf);
 }
 
-// Test that requesting LockedOwner->LockedUpdate fails when the signature is
+// Test that requesting LockedOwner->UnlockedSelf fails when the signature is
 // bad.
 TEST_F(OwnershipUnlockTest, UnlockedUpdateBadSignature) {
   message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockUpdate;
-  EXPECT_CALL(
-      ownership_key_,
-      validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock), _, _, _))
-      .WillOnce(Return(kHardenedBoolFalse));
+  EXPECT_CALL(ownership_key_,
+              validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(
+          DoAll(SetArgPointee<7>(0), Return(kErrorOwnershipInvalidSignature)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -260,16 +310,16 @@ TEST_F(OwnershipUnlockTest, UnlockedUpdateBadSignature) {
   EXPECT_EQ(bootdata_.ownership_state, kOwnershipStateLockedOwner);
 }
 
-// Test that requesting LockedOwner->LockedUpdate fails when the nonce doesn't
+// Test that requesting LockedOwner->UnlockedSelf fails when the nonce doesn't
 // match.
 TEST_F(OwnershipUnlockTest, UnlockedUpdateBadNonce) {
   message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockUpdate;
   message_.ownership_unlock_req.nonce = {3, 4};
 
-  EXPECT_CALL(
-      ownership_key_,
-      validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock), _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+  EXPECT_CALL(ownership_key_,
+              validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
   rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
@@ -288,18 +338,20 @@ TEST_P(OwnershipUnlockedUpdateStateTest, InvalidState) {
 }
 
 INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockedUpdateStateTest,
-                         testing::Values(kOwnershipStateLockedUpdate,
+                         testing::Values(kOwnershipStateUnlockedSelf,
                                          kOwnershipStateUnlockedEndorsed,
-                                         kOwnershipStateLockedNone));
+                                         kOwnershipStateRecovery));
 
 // Test that requesting an UnlockAbort from valid states works.
 TEST_P(OwnershipUnlockAbortValidStateTest, UnlockAbort) {
   message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockAbort;
   bootdata_.ownership_state = static_cast<uint32_t>(GetParam());
-  EXPECT_CALL(
-      ownership_key_,
-      validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock), _, _, _))
-      .WillOnce(Return(kHardenedBoolTrue));
+  EXPECT_CALL(ownership_key_,
+              validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
   EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
   EXPECT_CALL(hdr_, Finalize(_, _, _));
 
@@ -311,7 +363,7 @@ TEST_P(OwnershipUnlockAbortValidStateTest, UnlockAbort) {
 }
 
 INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockAbortValidStateTest,
-                         testing::Values(kOwnershipStateLockedUpdate,
+                         testing::Values(kOwnershipStateUnlockedSelf,
                                          kOwnershipStateUnlockedEndorsed,
                                          kOwnershipStateUnlockedAny));
 
@@ -327,5 +379,78 @@ TEST_P(OwnershipUnlockAbortInvalidStateTest, UnlockAbort) {
 
 INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockAbortInvalidStateTest,
                          testing::Values(kOwnershipStateLockedOwner,
-                                         kOwnershipStateLockedNone));
+                                         kOwnershipStateRecovery));
+
+// Test that UnlockAny succeeds in Open mode and fails in Self and NewVersion
+// mode.
+TEST_P(OwnershipUnlockUpdateModesTest, UnlockAny) {
+  ownership_update_mode_t mode = GetParam();
+  owner_page[0].update_mode = static_cast<uint32_t>(mode);
+  message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockAny;
+  rom_error_t expect;
+  switch (mode) {
+    case kOwnershipUpdateModeOpen:
+      EXPECT_CALL(ownership_key_,
+                  validate(0,
+                           static_cast<ownership_key_t>(kOwnershipKeyUnlock |
+                                                        kOwnershipKeyRecovery),
+                           kUnlock, _, _, _, _, _))
+          .WillOnce(
+              DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+      EXPECT_CALL(lifecycle_, DeviceId(_))
+          .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+      EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
+      expect = kErrorWriteBootdataThenReboot;
+      break;
+    case kOwnershipUpdateModeNewVersion:
+      expect = kErrorOwnershipUnlockDenied;
+      break;
+    case kOwnershipUpdateModeSelf:
+    case kOwnershipUpdateModeSelfVersion:
+      expect = kErrorOwnershipInvalidMode;
+      break;
+  }
+
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+  rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, expect);
+}
+
+// Test that UnlockUpdate succeeds in Open and Self mode and fails in NewVersion
+// mode.
+TEST_P(OwnershipUnlockUpdateModesTest, UnlockUpdate) {
+  ownership_update_mode_t mode = GetParam();
+  owner_page[0].update_mode = static_cast<uint32_t>(mode);
+  message_.ownership_unlock_req.unlock_mode = kBootSvcUnlockUpdate;
+  rom_error_t expect;
+  switch (mode) {
+    case kOwnershipUpdateModeOpen:
+    case kOwnershipUpdateModeSelf:
+    case kOwnershipUpdateModeSelfVersion:
+      EXPECT_CALL(ownership_key_,
+                  validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                           kUnlock, _, _, _, _, _))
+          .WillOnce(
+              DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+      EXPECT_CALL(lifecycle_, DeviceId(_))
+          .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){0}));
+      EXPECT_CALL(rnd_, Uint32()).WillRepeatedly(Return(5));
+      expect = kErrorWriteBootdataThenReboot;
+      break;
+    case kOwnershipUpdateModeNewVersion:
+      expect = kErrorOwnershipUnlockDenied;
+      break;
+  }
+
+  EXPECT_CALL(hdr_, Finalize(_, _, _));
+  rom_error_t error = ownership_unlock_handler(&message_, &bootdata_);
+  EXPECT_EQ(error, expect);
+}
+
+INSTANTIATE_TEST_SUITE_P(AllCases, OwnershipUnlockUpdateModesTest,
+                         testing::Values(kOwnershipUpdateModeOpen,
+                                         kOwnershipUpdateModeSelf,
+                                         kOwnershipUpdateModeSelfVersion,
+                                         kOwnershipUpdateModeNewVersion));
+
 }  // namespace
diff --git a/sw/device/silicon_creator/lib/ownership/test_owner.c b/sw/device/silicon_creator/lib/ownership/test_owner.c
new file mode 100644
index 0000000000000..a1616830449c9
--- /dev/null
+++ b/sw/device/silicon_creator/lib/ownership/test_owner.c
@@ -0,0 +1,357 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/activate_spx.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_spx.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/owner_spx.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/unlock_spx.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+
+/*
+ * This module overrides the weak `sku_creator_owner_init` symbol in
+ * ownership.c, thus allowing FPGA builds to boot in the `LockedOwner` state
+ * with a valid set of keys.
+ */
+
+// NOTE: if you update this version number, you must also update the version
+// number in the test library `sw/host/tests/ownership/transfer_lib.rs`.
+#define TEST_OWNER_CONFIG_VERSION 1
+
+#ifndef TEST_OWNER_UPDATE_MODE
+#define TEST_OWNER_UPDATE_MODE kOwnershipUpdateModeOpen
+#endif
+
+#if defined(TEST_OWNER_KEY_ALG_HYBRID_SPX_PURE) || \
+    defined(TEST_OWNER_KEY_ALG_HYBRID_SPX_PREHASH)
+#ifdef TEST_OWNER_KEY_ALG_HYBRID_SPX_PURE
+#define TEST_OWNER_KEY_ALG kOwnershipKeyAlgHybridSpxPure
+#endif
+#ifdef TEST_OWNER_KEY_ALG_HYBRID_SPX_PREHASH
+#define TEST_OWNER_KEY_ALG kOwnershipKeyAlgHybridSpxPrehash
+#endif
+#define OWNER_KEYDATA                                        \
+  (owner_keydata_t) {                                        \
+    .hybrid = {.ecdsa = OWNER_ECDSA_P256, .spx = OWNER_SPX } \
+  }
+#define ACTIVATE_KEYDATA                                           \
+  (owner_keydata_t) {                                              \
+    .hybrid = {.ecdsa = ACTIVATE_ECDSA_P256, .spx = ACTIVATE_SPX } \
+  }
+#define UNLOCK_KEYDATA                                         \
+  (owner_keydata_t) {                                          \
+    .hybrid = {.ecdsa = UNLOCK_ECDSA_P256, .spx = UNLOCK_SPX } \
+  }
+#endif
+
+#if defined(TEST_OWNER_KEY_ALG_SPX_PURE) || \
+    defined(TEST_OWNER_KEY_ALG_SPX_PREHASH)
+#ifdef TEST_OWNER_KEY_ALG_SPX_PURE
+#define TEST_OWNER_KEY_ALG kOwnershipKeyAlgSpxPure
+#endif
+#ifdef TEST_OWNER_KEY_ALG_HYBRID_SPX_PREHASH
+#define TEST_OWNER_KEY_ALG kOwnershipKeyAlgSpxPrehash
+#endif
+#define OWNER_KEYDATA \
+  (owner_keydata_t) { .spx = OWNER_SPX }
+#define ACTIVATE_KEYDATA \
+  (owner_keydata_t) { .spx = ACTIVATE_SPX }
+#define UNLOCK_KEYDATA \
+  (owner_keydata_t) { .spx = UNLOCK_SPX }
+#endif
+
+#if defined(TEST_OWNER_KEY_ALG_CORRUPTED)
+#ifdef TEST_OWNER_KEY_ALG_CORRUPTED
+#define TEST_OWNER_KEY_ALG 0x0
+#define OWNER_KEYDATA \
+  (owner_keydata_t) { .ecdsa = OWNER_ECDSA_P256 }
+#define ACTIVATE_KEYDATA \
+  (owner_keydata_t) { .ecdsa = ACTIVATE_ECDSA_P256 }
+#define UNLOCK_KEYDATA \
+  (owner_keydata_t) { .ecdsa = UNLOCK_ECDSA_P256 }
+#endif
+#endif
+
+#ifndef TEST_OWNER_KEY_ALG
+#define TEST_OWNER_KEY_ALG kOwnershipKeyAlgEcdsaP256
+#define OWNER_KEYDATA \
+  (owner_keydata_t) { .ecdsa = OWNER_ECDSA_P256 }
+#define ACTIVATE_KEYDATA \
+  (owner_keydata_t) { .ecdsa = ACTIVATE_ECDSA_P256 }
+#define UNLOCK_KEYDATA \
+  (owner_keydata_t) { .ecdsa = UNLOCK_ECDSA_P256 }
+#endif
+
+#ifndef TEST_OWNERSHIP_STATE
+#define TEST_OWNERSHIP_STATE kOwnershipStateLockedOwner
+#endif
+
+#ifndef TEST_OWNER_SRAM_EXEC_MODE
+#define TEST_OWNER_SRAM_EXEC_MODE kOwnerSramExecModeDisabledLocked
+#endif
+
+#ifndef TEST_OWNER_BOOT_SVC_AFTER_WAKEUP
+#define TEST_OWNER_BOOT_SVC_AFTER_WAKEUP kHardenedBoolFalse
+#endif
+
+// The following preprocessor symbols are only relevant when
+// WITH_RESCUE_PROTOCOL is defined.
+#ifndef WITH_RESCUE_MISC_GPIO_PARAM
+#define WITH_RESCUE_MISC_GPIO_PARAM 0
+#endif
+#ifndef WITH_RESCUE_INDEX
+#define WITH_RESCUE_INDEX 0
+#endif
+#ifndef WITH_RESCUE_TIMEOUT
+#define WITH_RESCUE_TIMEOUT 0 /* No timeout, no enter-on-fail */
+#endif
+#ifndef WITH_RESCUE_TRIGGER
+#define WITH_RESCUE_TRIGGER 1 /* default to UartBreak */
+#endif
+#ifndef WITH_RESCUE_COMMAND_ALLOW
+#define WITH_RESCUE_COMMAND_ALLOW                                            \
+  kRescueModeBootLog, kRescueModeBootSvcRsp, kRescueModeBootSvcReq,          \
+      kRescueModeOwnerBlock, kRescueModeOwnerPage0, kRescueModeOwnerPage1,   \
+      kRescueModeOpenTitanID, kRescueModeFirmware, kRescueModeFirmwareSlotB, \
+      kBootSvcEmptyReqType, kBootSvcNextBl0SlotReqType,                      \
+      kBootSvcMinBl0SecVerReqType, kBootSvcOwnershipActivateReqType,         \
+      kBootSvcOwnershipUnlockReqType,
+#endif
+#ifndef WITH_RESCUE_START
+#define WITH_RESCUE_START (32)
+#endif
+#ifndef WITH_RESCUE_SIZE
+#define WITH_RESCUE_SIZE (224)
+#endif
+
+rom_error_t sku_creator_owner_init(boot_data_t *bootdata) {
+  owner_keydata_t owner = OWNER_KEYDATA;
+  ownership_state_t state = bootdata->ownership_state;
+
+  if (state == kOwnershipStateUnlockedSelf ||
+      state == kOwnershipStateUnlockedAny ||
+      state == kOwnershipStateUnlockedEndorsed) {
+    // Nothing to do when in an unlocked state.
+    return kErrorOk;
+  } else if (state == kOwnershipStateLockedOwner) {
+    if (hardened_memeq(owner.raw, owner_page[0].owner_key.raw,
+                       ARRAYSIZE(owner.raw)) != kHardenedBoolTrue ||
+        TEST_OWNER_CONFIG_VERSION <= owner_page[0].config_version) {
+      // Different owner or already newest config version; nothing to do.
+      return kErrorOk;
+    }
+  } else {
+    // State is an unknown value, which is the same as kOwnershipStateRecovery.
+    // We'll not return, thus allowing the owner config below to be programmed
+    // into flash.
+  }
+
+  owner_page[0].header.tag = kTlvTagOwner;
+  owner_page[0].header.length = 2048;
+  owner_page[0].header.version = (struct_version_t){0, 0};
+  owner_page[0].config_version = TEST_OWNER_CONFIG_VERSION;
+  owner_page[0].sram_exec_mode = TEST_OWNER_SRAM_EXEC_MODE;
+  owner_page[0].boot_svc_after_wakeup = TEST_OWNER_BOOT_SVC_AFTER_WAKEUP;
+  owner_page[0].ownership_key_alg = TEST_OWNER_KEY_ALG;
+  owner_page[0].update_mode = TEST_OWNER_UPDATE_MODE;
+  owner_page[0].min_security_version_bl0 = UINT32_MAX;
+  owner_page[0].lock_constraint = 0;
+  memset(owner_page[0].device_id, kLockConstraintNone,
+         sizeof(owner_page[0].device_id));
+  owner_page[0].owner_key = owner;
+  owner_page[0].activate_key = ACTIVATE_KEYDATA;
+  owner_page[0].unlock_key = UNLOCK_KEYDATA;
+
+  owner_application_key_t *app = (owner_application_key_t *)owner_page[0].data;
+  *app = (owner_application_key_t){
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = kTlvLenApplicationKeyEcdsa,
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+      .key_domain = kOwnerAppDomainTest,
+      .key_diversifier = {0},
+      .usage_constraint = 0,
+      .data =
+          {
+              .ecdsa = APP_TEST_ECDSA_P256,
+          },
+  };
+
+  app = (owner_application_key_t *)((uintptr_t)app + app->header.length);
+  *app = (owner_application_key_t){
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = kTlvLenApplicationKeyEcdsa,
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+      .key_domain = kOwnerAppDomainDev,
+      .key_diversifier = {0},
+      .usage_constraint = 0,
+      .data =
+          {
+              .ecdsa = APP_DEV_ECDSA_P256,
+          },
+  };
+
+  app = (owner_application_key_t *)((uintptr_t)app + app->header.length);
+  *app = (owner_application_key_t){
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = kTlvLenApplicationKeyEcdsa,
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+      .key_domain = kOwnerAppDomainProd,
+      .key_diversifier = {0},
+      .usage_constraint = 0,
+      .data =
+          {
+              .ecdsa = APP_PROD_ECDSA_P256,
+          },
+  };
+
+  app = (owner_application_key_t *)((uintptr_t)app + app->header.length);
+  *app = (owner_application_key_t){
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = kTlvLenApplicationKeyHybrid,
+          },
+      .key_alg = kOwnershipKeyAlgHybridSpxPure,
+      .key_domain = kOwnerAppDomainProd,
+      .key_diversifier = {0},
+      .usage_constraint = 0,
+      .data =
+          {
+              .hybrid =
+                  {
+                      .ecdsa = APP_PROD_ECDSA_P256,
+                      .spx = APP_PROD_SPX,
+                  },
+          },
+  };
+
+  app = (owner_application_key_t *)((uintptr_t)app + app->header.length);
+  *app = (owner_application_key_t){
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = kTlvLenApplicationKeyHybrid,
+          },
+      .key_alg = kOwnershipKeyAlgHybridSpxPrehash,
+      .key_domain = kOwnerAppDomainDev,
+      .key_diversifier = {0},
+      .usage_constraint = 0,
+      .data =
+          {
+              .hybrid =
+                  {
+                      .ecdsa = APP_DEV_ECDSA_P256,
+                      .spx = APP_DEV_SPX,
+                  },
+          },
+  };
+
+  uintptr_t end = (uintptr_t)app + app->header.length;
+#ifdef WITH_RESCUE_PROTOCOL
+  owner_rescue_config_t *rescue =
+      (owner_rescue_config_t *)((uintptr_t)app + app->header.length);
+  *rescue = (owner_rescue_config_t){
+      .header =
+          {
+              .tag = kTlvTagRescueConfig,
+              .length = sizeof(owner_rescue_config_t),
+          },
+      .protocol = WITH_RESCUE_PROTOCOL,
+      .gpio = WITH_RESCUE_MISC_GPIO_PARAM,
+      .timeout = WITH_RESCUE_TIMEOUT,
+      .detect = (WITH_RESCUE_TRIGGER << 6) | WITH_RESCUE_INDEX,
+      .start = WITH_RESCUE_START,
+      .size = WITH_RESCUE_SIZE,
+  };
+  const uint32_t commands[] = {WITH_RESCUE_COMMAND_ALLOW};
+  memcpy(&rescue->command_allow, commands, sizeof(commands));
+  rescue->header.length += sizeof(commands);
+  end = (uintptr_t)rescue + rescue->header.length;
+#endif
+#ifdef WITH_ISFB
+  owner_flash_info_config_t *info = (owner_flash_info_config_t *)end;
+  info->header = (tlv_header_t){
+      .tag = kTlvTagInfoConfig,
+      .length = sizeof(owner_flash_info_config_t) + sizeof(owner_info_page_t),
+  };
+  info->config[0] = (owner_info_page_t){
+      .bank = 0,
+      .page = 5,
+      // Access: -erase, +program, +read.
+      .access = 0x066,
+      .properties = 0,
+  };
+  end = (uintptr_t)info + info->header.length;
+  owner_isfb_config_t *isfb = (owner_isfb_config_t *)end;
+  *isfb = (owner_isfb_config_t){
+      .header =
+          {
+              .tag = kTlvTagIntegrationSpecificFirmwareBinding,
+              .length = sizeof(owner_isfb_config_t),
+          },
+      .bank = 0,
+      .page = 5,
+      // erase extension present, node-locked and specific key domain.
+      .erase_conditions = 0x666,
+      .key_domain = kOwnerAppDomainProd,
+      .product_words = 2,
+  };
+  end = (uintptr_t)isfb + isfb->header.length;
+#endif
+  // Fill the remainder of the data segment with the end tag (0x5a5a5a5a).
+  size_t len = (uintptr_t)(owner_page[0].data + sizeof(owner_page[0].data)) -
+               (uintptr_t)end;
+  memset((void *)end, 0x5a, len);
+
+#ifndef TEST_OWNER_DISABLE_OWNER_BLOCK_CHECK
+  // Check that the owner_block will parse correctly.
+  RETURN_IF_ERROR(owner_block_parse(&owner_page[0],
+                                    /*check_only=*/kHardenedBoolTrue, NULL,
+                                    NULL));
+#endif
+  ownership_seal_page(/*page=*/0);
+
+  // Since this module should only get linked in to FPGA builds, we can simply
+  // thunk the ownership state to LockedOwner.
+  bootdata->ownership_state = TEST_OWNERSHIP_STATE;
+
+  // Write the configuration to both owner page 0.  The next boot of the ROM_EXT
+  // will make a redundant copyh in page 1.
+  OT_DISCARD(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot0,
+                                   kFlashCtrlEraseTypePage));
+  OT_DISCARD(flash_ctrl_info_write(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                                   sizeof(owner_page[0]) / sizeof(uint32_t),
+                                   &owner_page[0]));
+  owner_page_valid[0] = kOwnerPageStatusSealed;
+
+  OT_DISCARD(boot_data_write(bootdata));
+  dbg_printf("sku_creator_owner_init: saved to flash\r\n");
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/lib/ownership/testdata/basic_owner.json5 b/sw/device/silicon_creator/lib/ownership/testdata/basic_owner.json5
index fcbeefef12c94..fc126184cf1e8 100644
--- a/sw/device/silicon_creator/lib/ownership/testdata/basic_owner.json5
+++ b/sw/device/silicon_creator/lib/ownership/testdata/basic_owner.json5
@@ -8,7 +8,6 @@
 // To convert this file to binary form, use opentitantool:
 // $ opentitantool ownership config --input file.json file.bin
 {
-  version: 0,
   sram_exec: "DisabledLocked",
   ownership_key_alg: "EcdsaP256",
   owner_key: {
@@ -55,27 +54,16 @@
     {
       FlashConfig: {
         config: [
-          {
-            start: 0,
-            size: 32,
-            read: true,
-            program: true,
-            erase: true,
-            scramble: false,
-            ecc: false,
-            high_endurance: false,
-            protect_when_primary: true
-          },
           {
             start: 32,
-            size: 384,
+            size: 192,
             read: true,
             program: true,
             erase: true,
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: true
+            protect_when_active: true
           },
           {
             start: 224,
@@ -86,29 +74,18 @@
             scramble: false,
             ecc: false,
             high_endurance: true,
-            protect_when_primary: false
-          },
-          {
-            start: 256,
-            size: 32,
-            read: true,
-            program: true,
-            erase: true,
-            scramble: false,
-            ecc: false,
-            high_endurance: false,
-            protect_when_primary: true
+            protect_when_active: false
           },
           {
             start: 288,
-            size: 384,
+            size: 192,
             read: true,
             program: true,
             erase: true,
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: true
+            protect_when_active: true
           },
           {
             start: 480,
@@ -119,7 +96,7 @@
             scramble: false,
             ecc: false,
             high_endurance: true,
-            protect_when_primary: false
+            protect_when_active: false
           }
         ]
       }
@@ -129,7 +106,7 @@
         config: [
           {
             bank: 0,
-            page: 6,
+            page: 5,
             pad: 0,
             read: true,
             program: true,
@@ -137,11 +114,11 @@
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: false
+            protect_when_active: false
           },
           {
             bank: 0,
-            page: 7,
+            page: 6,
             pad: 0,
             read: true,
             program: true,
@@ -149,11 +126,11 @@
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: false
+            protect_when_active: false
           },
           {
             bank: 0,
-            page: 8,
+            page: 7,
             pad: 0,
             read: true,
             program: true,
@@ -161,11 +138,11 @@
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: false
+            protect_when_active: false
           },
           {
             bank: 0,
-            page: 9,
+            page: 8,
             pad: 0,
             read: true,
             program: true,
@@ -173,23 +150,38 @@
             scramble: true,
             ecc: true,
             high_endurance: false,
-            protect_when_primary: false
+            protect_when_active: false
           }
         ]
       }
     },
+    {
+      IsfbConfig: {
+        bank: 0,
+        page: 5,
+        erase_conditions: 0x666,
+        key_domain: "Dev",
+        product_words: 4
+      }
+    },
     {
       RescueConfig: {
         rescue_type: "Xmodem",
+        trigger: "UartBreak",
+        trigger_index: 0,
+        gpio_pull_en: false,
+        gpio_value: false,
+        _enter_on_failure: false,
+        _timeout_enable: false,
+        _timeout: 0,
         start: 32,
-        size: 224,
+        size: 192,
         command_allow: [
           "Empty",
           "MinBl0SecVerRequest",
           "NextBl0SlotRequest",
-          "PrimaryBl0SlotRequest",
-          "UnlockOwnershipRequest",
-          "ActivateOwnerRequest",
+          "OwnershipUnlockRequest",
+          "OwnershipActivateRequest",
           "Rescue",
           "GetBootLog",
           "BootSvcReq",
@@ -199,5 +191,4 @@
       }
     }
   ],
-  seal: "ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"
 }
diff --git a/sw/device/silicon_creator/lib/ownership/testdata/basic_owner_testdata.h b/sw/device/silicon_creator/lib/ownership/testdata/basic_owner_testdata.h
index 8fa731aaad790..9c65db04d6745 100644
--- a/sw/device/silicon_creator/lib/ownership/testdata/basic_owner_testdata.h
+++ b/sw/device/silicon_creator/lib/ownership/testdata/basic_owner_testdata.h
@@ -16,134 +16,134 @@
 
 // clang-format off
 const unsigned char basic_owner[] = {
-0x4f,0x57,0x4e,0x52,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x4c,0x4e,0x45,0x58, // 00000000  OWNR........LNEX
-0x50,0x32,0x35,0x36,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000010  P256............
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000020  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000030  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000040  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000050  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000060  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000070  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000080  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000090  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000a0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000b0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000c0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000d0  ................
-0x41,0x50,0x50,0x4b,0x70,0x00,0x00,0x00,0x50,0x32,0x35,0x36,0x70,0x72,0x6f,0x64, // 000000e0  APPKp...P256prod
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000f0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000100  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000110  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000120  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000130  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000140  ................
-0x46,0x4c,0x53,0x48,0x50,0x00,0x00,0x00,0x00,0x00,0x20,0x00,0x66,0x06,0x00,0x96, // 00000150  FLSHP..... .f...
-0x99,0x09,0x00,0x00,0x20,0x00,0x80,0x01,0x77,0x17,0x11,0x87,0x77,0x18,0x11,0x11, // 00000160  .... ...w...w...
-0xe0,0x00,0x20,0x00,0x44,0x24,0x22,0xbb,0xbb,0x24,0x22,0x22,0x00,0x01,0x20,0x00, // 00000170  .. .D$"..$"".. .
-0x55,0x35,0x33,0xa5,0xaa,0x3a,0x33,0x33,0x20,0x01,0x80,0x01,0x22,0x42,0x44,0xd2, // 00000180  U53..:33 ..."BD.
-0x22,0x4d,0x44,0x44,0xe0,0x01,0x20,0x00,0x33,0x53,0x55,0xcc,0xcc,0x53,0x55,0x55, // 00000190  "MDD.. .3SU..SUU
-0x49,0x4e,0x46,0x4f,0x38,0x00,0x00,0x00,0x00,0x06,0x00,0x00,0x66,0x06,0x00,0x99, // 000001a0  INFO8.......f...
-0x66,0x09,0x00,0x00,0x00,0x07,0x00,0x00,0x77,0x17,0x11,0x88,0x77,0x18,0x11,0x11, // 000001b0  f.......w...w...
-0x00,0x08,0x00,0x00,0x44,0x24,0x22,0xbb,0x44,0x2b,0x22,0x22,0x00,0x09,0x00,0x00, // 000001c0  ....D$".D+""....
-0x55,0x35,0x33,0xaa,0x55,0x3a,0x33,0x33,0x52,0x45,0x53,0x51,0x3c,0x00,0x00,0x00, // 000001d0  U53.U:33RESQ<...
-0x58,0x4d,0x44,0x4d,0x20,0x00,0xe0,0x00,0x46,0x45,0x59,0xb4,0x6e,0x9e,0xc5,0xda, // 000001e0  XMDM ...FEY.n...
-0x46,0xf5,0xed,0xe1,0xb8,0x47,0x6c,0x3d,0x55,0x4e,0x52,0x51,0x41,0x4f,0x52,0x51, // 000001f0  F....Gl=UNRQAORQ
-0x52,0x45,0x53,0x51,0x42,0x4c,0x4f,0x47,0x42,0x52,0x45,0x51,0x42,0x52,0x53,0x50, // 00000200  RESQBLOGBREQBRSP
-0x4f,0x57,0x4e,0x52,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000210  OWNRZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000220  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000230  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000240  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000250  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000260  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000270  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000280  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000290  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002a0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002b0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002c0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002d0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002e0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002f0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000300  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000310  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000320  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000330  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000340  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000350  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000360  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000370  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000380  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000390  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003a0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003b0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003c0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003d0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003e0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003f0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000400  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000410  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000420  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000430  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000440  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000450  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000460  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000470  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000480  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000490  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004a0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004b0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004c0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004d0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004e0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004f0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000500  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000510  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000520  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000530  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000540  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000550  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000560  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000570  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000580  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000590  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005a0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005b0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005c0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005d0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005e0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005f0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000600  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000610  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000620  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000630  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000640  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000650  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000660  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000670  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000680  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000690  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006a0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006b0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006c0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006d0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006e0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006f0  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000700  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000710  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000720  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000730  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000740  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000750  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000760  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000770  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000780  ZZZZZZZZZZZZZZZZ
-0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000790  ZZZZZZZZZZZZZZZZ
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007a0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007b0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007c0  ................
-0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007d0  ................
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, // 000007e0  ................
-0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, // 000007f0  ................
+0x4f,0x57,0x4e,0x52,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x4c,0x4e,0x45,0x58, // 00000000 |OWNR........LNEX|
+0x50,0x32,0x35,0x36,0x4f,0x50,0x45,0x4e,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00, // 00000010 |P256OPEN........|
+0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e, // 00000020 |~~~~~~~~~~~~~~~~|
+0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e, // 00000030 |~~~~~~~~~~~~~~~~|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000040 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000050 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000060 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000070 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000080 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000090 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000a0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000b0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000c0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000d0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000e0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000f0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000100 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000110 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000120 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000130 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000140 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000150 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000160 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000170 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000180 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000190 |................|
+0x41,0x50,0x50,0x4b,0x70,0x00,0x00,0x00,0x50,0x32,0x35,0x36,0x70,0x72,0x6f,0x64, // 000001a0 |APPKp...P256prod|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001b0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001c0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001d0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001e0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001f0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000200 |................|
+0x46,0x4c,0x53,0x48,0x38,0x00,0x00,0x00,0x20,0x00,0xc0,0x00,0x66,0x06,0x00,0x96, // 00000210 |FLSH8... ...f...|
+0x66,0x09,0x00,0x00,0xe0,0x00,0x20,0x00,0x77,0x17,0x11,0x88,0x88,0x17,0x11,0x11, // 00000220 |f..... .w.......|
+0x20,0x01,0xc0,0x00,0x44,0x24,0x22,0xb4,0x44,0x2b,0x22,0x22,0xe0,0x01,0x20,0x00, // 00000230 | ...D$".D+"".. .|
+0x55,0x35,0x33,0xaa,0xaa,0x35,0x33,0x33,0x49,0x4e,0x46,0x4f,0x38,0x00,0x00,0x00, // 00000240 |U53..533INFO8...|
+0x00,0x05,0x00,0x00,0x66,0x06,0x00,0x99,0x66,0x09,0x00,0x00,0x00,0x06,0x00,0x00, // 00000250 |....f...f.......|
+0x77,0x17,0x11,0x88,0x77,0x18,0x11,0x11,0x00,0x07,0x00,0x00,0x44,0x24,0x22,0xbb, // 00000260 |w...w.......D$".|
+0x44,0x2b,0x22,0x22,0x00,0x08,0x00,0x00,0x55,0x35,0x33,0xaa,0x55,0x3a,0x33,0x33, // 00000270 |D+""....U53.U:33|
+0x49,0x53,0x46,0x42,0x2c,0x00,0x00,0x00,0x00,0x05,0x00,0x00,0x66,0x06,0x00,0x00, // 00000280 |ISFB,.......f...|
+0x64,0x65,0x76,0x5f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000290 |dev_............|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x00,0x52,0x45,0x53,0x51, // 000002a0 |............RESQ|
+0x38,0x00,0x00,0x00,0x58,0x00,0x00,0x40,0x20,0x00,0xc0,0x00,0x45,0x4d,0x50,0x54, // 000002b0 |8...X..@ ...EMPT|
+0x4d,0x53,0x45,0x43,0x4e,0x45,0x58,0x54,0x55,0x4e,0x4c,0x4b,0x41,0x43,0x54,0x56, // 000002c0 |MSECNEXTUNLKACTV|
+0x51,0x53,0x45,0x52,0x47,0x4f,0x4c,0x42,0x51,0x45,0x52,0x42,0x50,0x53,0x52,0x42, // 000002d0 |QSERGOLBQERBPSRB|
+0x52,0x4e,0x57,0x4f,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002e0 |RNWOZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000002f0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000300 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000310 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000320 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000330 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000340 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000350 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000360 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000370 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000380 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000390 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003a0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003b0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003c0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003d0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003e0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000003f0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000400 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000410 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000420 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000430 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000440 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000450 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000460 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000470 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000480 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000490 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004a0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004b0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004c0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004d0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004e0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000004f0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000500 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000510 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000520 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000530 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000540 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000550 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000560 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000570 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000580 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000590 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005a0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005b0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005c0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005d0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005e0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000005f0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000600 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000610 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000620 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000630 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000640 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000650 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000660 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000670 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000680 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000690 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006a0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006b0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006c0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006d0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006e0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 000006f0 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000700 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000710 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000720 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000730 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000740 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000750 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000760 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000770 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000780 |ZZZZZZZZZZZZZZZZ|
+0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a,0x5a, // 00000790 |ZZZZZZZZZZZZZZZZ|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007a0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007b0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007c0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007d0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007e0 |................|
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000007f0 |................|
 };
 // clang-format on
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_OWNERSHIP_TESTDATA_BASIC_OWNER_TESTDATA_H_
diff --git a/sw/device/silicon_creator/lib/rescue/BUILD b/sw/device/silicon_creator/lib/rescue/BUILD
new file mode 100644
index 0000000000000..0e84943bb4117
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/BUILD
@@ -0,0 +1,146 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "@bazel_skylib//lib:dicts.bzl",
+    "dicts",
+)
+load(
+    "//rules/opentitan:defs.bzl",
+    "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
+    "EARLGREY_TEST_ENVS",
+    "fpga_params",
+    "opentitan_test",
+    "silicon_params",
+    "verilator_params",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+RESCUE_DEPS = [
+    "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+    "//sw/device/lib/base:macros",
+    "//sw/device/lib/base:memory",
+    "//sw/device/silicon_creator/lib:manifest",
+    "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+    "//sw/device/silicon_creator/lib/drivers:lifecycle",
+    "//sw/device/silicon_creator/lib/drivers:pinmux",
+    "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    "//sw/device/silicon_creator/lib/drivers:rstmgr",
+    "//sw/device/silicon_creator/lib/ownership:owner_block",
+]
+
+cc_library(
+    name = "rescue",
+    hdrs = ["rescue.h"],
+    deps = [
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+    ],
+)
+
+cc_library(
+    name = "rescue_xmodem",
+    srcs = [
+        "rescue.c",
+        "rescue_xmodem.c",
+    ],
+    local_defines = ["RESCUE_USES_UART=1"],
+    deps = [
+        ":rescue",
+        ":xmodem",
+        "//sw/device/silicon_creator/lib/drivers:ibex",
+    ] + RESCUE_DEPS,
+)
+
+cc_library(
+    name = "xmodem",
+    srcs = ["xmodem.c"],
+    hdrs = ["xmodem.h"],
+    deps = [
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/drivers:uart",
+    ],
+)
+
+cc_library(
+    name = "xmodem_testlib",
+    srcs = [
+        "xmodem.c",
+        "xmodem.h",
+    ],
+    hdrs = ["xmodem_testlib.h"],
+    defines = ["XMODEM_TESTLIB=1"],
+    deps = [
+        "//sw/device/lib/base:hardened",
+        "//sw/device/silicon_creator/lib:error",
+    ],
+)
+
+cc_library(
+    name = "dfu",
+    srcs = [
+        "dfu.c",
+        "dfu_state_table.c",
+    ],
+    hdrs = [
+        "dfu.h",
+    ],
+    deps = [
+        ":rescue",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/base:memory",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        "//sw/device/silicon_creator/lib/drivers:usb",
+    ],
+)
+
+cc_library(
+    name = "rescue_usbdfu",
+    srcs = [
+        "rescue.c",
+        "rescue_usb.c",
+    ],
+    local_defines = ["RESCUE_USES_UART=0"],
+    deps = [
+        ":dfu",
+        ":rescue",
+        "//sw/device/silicon_creator/lib/drivers:usb",
+    ] + RESCUE_DEPS,
+)
+
+cc_library(
+    name = "rescue_spidfu",
+    srcs = [
+        "rescue.c",
+        "rescue_spi.c",
+        "sfdp.c",
+        "sfdp.h",
+    ],
+    local_defines = ["RESCUE_USES_UART=0"],
+    deps = [
+        ":dfu",
+        ":rescue",
+        "//sw/device/silicon_creator/lib/drivers:spi_device",
+        "//sw/device/silicon_creator/lib/drivers:usb",
+    ] + RESCUE_DEPS,
+)
+
+cc_library(
+    name = "rescue_null",
+    srcs = [
+        "rescue.c",
+        "rescue_null.c",
+    ],
+    local_defines = ["RESCUE_USES_UART=0"],
+    deps = [
+        ":rescue",
+    ] + RESCUE_DEPS,
+)
diff --git a/sw/device/silicon_creator/lib/rescue/dfu.c b/sw/device/silicon_creator/lib/rescue/dfu.c
new file mode 100644
index 0000000000000..f2f978b976560
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/dfu.c
@@ -0,0 +1,351 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/rescue/dfu.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+typedef struct rescue_mode_properties {
+  // The FourCC of the mode we want to set.
+  // When pairing modes, the UpLoad mode must be the `mode` and the DnLoad mode
+  // must be the `paired` mode.  This is because the validate_mode function
+  // only examines the `mode` for staging the upload data.
+  uint32_t mode;
+  // Non-zero if there is a paired mode.
+  uint32_t paired;
+  // Whether the mode support DFU DnLoad or UpLoad or both.
+  // Element 0 describes the Up- or Dn-Load status of the mode.
+  // Element 1 describes whether the "paired" mode supports Up- or Dn-Load.
+  //           E.g. OwnerPage0 is paired with OwnerBlock.
+  uint8_t allow[2];
+} rescue_mode_properties_t;
+
+// clang-format off
+static const rescue_mode_properties_t mode_by_altsetting[] = {
+    {kRescueModeFirmware,      0,                     { kDfuAllowDnLoad, 0 }},
+    {kRescueModeFirmwareSlotB, 0,                     { kDfuAllowDnLoad, 0 }},
+    {kRescueModeOpenTitanID,   0,                     { kDfuAllowUpLoad, 0 }},
+    {kRescueModeBootLog,       0,                     { kDfuAllowUpLoad, 0 }},
+    {kRescueModeBootSvcRsp,    kRescueModeBootSvcReq, { kDfuAllowUpLoad, kDfuAllowDnLoad }},
+    {kRescueModeOwnerPage0,    kRescueModeOwnerBlock, { kDfuAllowUpLoad, kDfuAllowDnLoad }},
+};
+// clang-format on
+
+static rom_error_t validate_mode(uint32_t setting, dfu_ctx_t *ctx) {
+  // Allow the `setting` to be either an index or a FourCC code.
+  // The the integer value is less than the arraysize, then its clearly an
+  // index.
+  if (setting >= ARRAYSIZE(mode_by_altsetting)) {
+    // All of the FourCC codes are going to be greater than any index.  Search
+    // the array for a matching FourCC code and use the index as the setting.
+    size_t i = 0;
+    for (; i < ARRAYSIZE(mode_by_altsetting); ++i) {
+      if (setting == mode_by_altsetting[i].mode) {
+        setting = i;
+        break;
+      }
+    }
+  }
+  if (setting >= ARRAYSIZE(mode_by_altsetting)) {
+    // Setting not found; Bad mode.
+    return kErrorRescueBadMode;
+  }
+
+  // The UART version of the protocol has to distinguish between send and recv
+  // targets for the same service (e.g. boot service has a request and a
+  // response mode).  Since DFU supports upload and download operations to the
+  // same target, we handle the "send" services first to stage data into the
+  // rescue buffer.
+  const rescue_mode_properties_t *mode = &mode_by_altsetting[setting];
+  rom_error_t error = rescue_validate_mode(mode->mode, &ctx->state);
+
+  uint8_t allow = 0;
+  if (error == kErrorOk) {
+    allow = mode->allow[0];
+    if (allow & kDfuAllowUpLoad) {
+      // DFU upload means send to the host.  We stage the data that would
+      // be sent to the rescue buffer.
+      rescue_send_handler(&ctx->state);
+    }
+  }
+
+  // BootSvc and OwnerPage are also recv (from the host) services.  Make sure
+  // we're set up to process a DFU download for those services.
+  if (mode->paired) {
+    rom_error_t error2 = rescue_validate_mode(mode->paired, &ctx->state);
+    if (error2 == kErrorOk) {
+      allow |= mode->allow[1];
+    }
+  }
+
+  // If either the send or recv mode is ok, then setting the mode is ok.
+  // If only one is Ok, the send or recv handler will report the error when we
+  // try an unauthorized operation.
+  // If neither is Ok, the report bad mode.
+  if (allow) {
+    ctx->allow = allow;
+    return kErrorOk;
+  } else {
+    return kErrorRescueBadMode;
+  }
+}
+
+static rom_error_t dfu_control(dfu_ctx_t *ctx, usb_setup_data_t *setup) {
+  rom_error_t result = kErrorOk;
+  if (setup->request > kDfuReqAbort) {
+    ctx->dfu_state = kDfuStateError;
+    ctx->dfu_error = kDfuErrUnknown;
+    return kErrorUsbBadSetup;
+  }
+
+  // Cancel the inactivity deadline.
+  ctx->state.inactivity_deadline = 0;
+  dfu_state_transition_t *tr = &dfu_state_table[setup->request][ctx->dfu_state];
+
+  // Carry out the action for this state transition.
+  switch (tr->action) {
+    case kDfuActionNone:
+      // No action: move to the next state and ack the transaction.
+      ctx->dfu_state = tr->next[0];
+      dfu_transport_data(ctx, kUsbDirIn, NULL, 0, 0);
+      break;
+    case kDfuActionStall:
+      // Stall: move to the next state and stall the transport.
+      ctx->dfu_state = tr->next[0];
+      ctx->dfu_error = kDfuErrStalledPkt;
+      result = kErrorUsbBadSetup;
+      break;
+    case kDfuActionDataXfer:
+      // Check the length and download/upload.
+      // DFU-spec quirks:
+      // - We require that DnLoad transfers are always 2K blocks.  The last
+      //   block is allowed to be short.
+      // - We limit UpLoad transfers to a maximum of 2K.  We currently have
+      //   no ROM_EXT services that require more than a 2K UpLoad.
+      ctx->dfu_state = tr->next[setup->length == 0 ? 0 : 1];
+      // Length is good and the request is either upload/download.
+      if (setup->length <= sizeof(ctx->state.data) &&
+          ((setup->request == kDfuReqDnLoad && ctx->allow & kDfuAllowDnLoad) ||
+           (setup->request == kDfuReqUpLoad && ctx->allow & kDfuAllowUpLoad))) {
+        if (setup->request == kDfuReqDnLoad) {
+          if (setup->length == 0 ||
+              ctx->state.offset < ctx->state.flash_limit) {
+            // If its a download (transfer to opentitan), perform the transfer
+            // into the rescue state buffer. For a zero-length request, simply
+            // ACK with a zero-length packet.
+            dfu_transport_data(ctx, setup->length == 0 ? kUsbDirIn : kUsbDirOut,
+                               ctx->state.data, setup->length, 0);
+          } else {
+            ctx->dfu_state = kDfuStateError;
+            ctx->dfu_error = kDfuErrAddress;
+            result = kErrorUsbBadSetup;
+          }
+        } else {
+          // If its an upload (transfer to the host), perform the transfer
+          // from the rescue state buffer. A prior `SetInterface` command will
+          // have staged the requested content into the buffer.
+          size_t length = (size_t)MIN(ctx->state.staged_len, setup->length);
+          usb_transfer_flags_t flags =
+              length < setup->length && length % 64 == 0
+                  ? kUsbTransferFlagsShortIn
+                  : 0;
+          dfu_transport_data(ctx, kUsbDirIn, ctx->state.data, length, flags);
+        }
+      } else {
+        ctx->dfu_state = kDfuStateError;
+        ctx->dfu_error = kDfuErrUnknown;
+        result = kErrorUsbBadSetup;
+      }
+      break;
+    case kDfuActionStatusResponse:
+      // Send a status response to the host.
+      ctx->dfu_state = tr->next[0];
+      ctx->status.status = (uint8_t)ctx->dfu_error;
+      ctx->status.poll_timeout[0] = 100;  // poll us every 100 milliseconds.
+      ctx->status.poll_timeout[1] = 0;
+      ctx->status.poll_timeout[2] = 0;
+      ctx->status.state = (uint8_t)ctx->dfu_state;
+      ctx->status.string = 0;
+      dfu_transport_data(ctx, kUsbDirIn, &ctx->status, sizeof(ctx->status), 0);
+      break;
+    case kDfuActionStateResponse:
+      // Send our current DFU state to the host.
+      ctx->dfu_state = tr->next[0];
+      dfu_transport_data(ctx, kUsbDirIn, &ctx->dfu_state, 1, 0);
+      break;
+    case kDfuActionClearError:
+      // Clear the current error.
+      ctx->dfu_state = tr->next[0];
+      ctx->dfu_error = kDfuErrOk;
+      dfu_transport_data(ctx, kUsbDirIn, NULL, 0, 0);
+      break;
+  }
+
+  return result;
+}
+
+static rom_error_t vendor_request(dfu_ctx_t *ctx, usb_setup_data_t *setup) {
+  // Cancel the inactivity deadline.
+  ctx->state.inactivity_deadline = 0;
+
+  switch (setup->request) {
+    // Proprietary vendor version of SetInterface that constructs the
+    // FourCC from the value and index fields.
+    case kDfuVendorSetMode: {
+      uint32_t mode = ((uint32_t)setup->value << 16) | setup->index;
+      if (validate_mode(mode, ctx) == kErrorOk) {
+        dfu_transport_data(ctx, kUsbDirIn, NULL, 0, 0);
+      } else {
+        return kErrorUsbBadSetup;
+      }
+    } break;
+    default:
+      return kErrorUsbBadSetup;
+  }
+  return kErrorOk;
+}
+
+static rom_error_t interface_request(dfu_ctx_t *ctx, usb_setup_data_t *setup) {
+  switch (setup->request) {
+    case kUsbSetupReqSetInterface:
+      if (validate_mode(setup->value, ctx) == kErrorOk) {
+        // A typical OS USB stack will issue SET_INTERFACE to activate
+        // AltSetting 0.  Since this probably is not real user activity,
+        // we won't cancel the inactivity deadline for this action when it
+        // doesn't actually change the interface.  For all other SET_INTERFACE,
+        // we will cancel the inactivity deadline.
+        if (!(ctx->interface == 0 && setup->value == 0)) {
+          ctx->state.inactivity_deadline = 0;
+        }
+        ctx->interface = (uint8_t)setup->value;
+        dfu_transport_data(ctx, kUsbDirIn, NULL, 0, 0);
+      } else {
+        return kErrorUsbBadSetup;
+      }
+      break;
+    case kUsbSetupReqGetInterface:
+      dfu_transport_data(ctx, kUsbDirIn, &ctx->interface,
+                         sizeof(ctx->interface), 0);
+      break;
+    default:
+      return kErrorUsbBadSetup;
+  }
+  return kErrorOk;
+}
+
+static rom_error_t set_configuration(dfu_ctx_t *ctx) {
+  ctx->dfu_error = kDfuErrOk;
+  ctx->dfu_state = kDfuStateIdle;
+  ctx->interface = 0;
+  validate_mode(ctx->interface, ctx);
+  ctx->ep0.configuration = ctx->ep0.next.configuration;
+  return kErrorOk;
+}
+
+void dfu_protocol_handler(void *_ctx, uint8_t ep, usb_transfer_flags_t flags,
+                          void *data) {
+  dfu_ctx_t *ctx = (dfu_ctx_t *)_ctx;
+  OT_DISCARD(ep);
+
+  // Handle event callbacks from the underlying transport (e.g. USB).
+
+  // If its SETUPDATA, its a USB or DFU request.
+  if (flags & kUsbTransferFlagsSetupData) {
+    usb_setup_data_t *setup = (usb_setup_data_t *)data;
+
+    // If we receive any Class, Interface or Vendor specific request,
+    // we cancel the inactivity deadline.
+    rom_error_t error = kErrorOk;
+    if ((setup->request_type & kUsbReqTypeTypeMask) == kUsbReqTypeClass) {
+      // If its a class-level request, call the DFU control function.
+      error = dfu_control(ctx, setup);
+    } else if ((setup->request_type & kUsbReqTypeTypeMask) ==
+               kUsbReqTypeVendor) {
+      // If its a proprietary vendor request, we handle it here.
+      error = vendor_request(ctx, setup);
+
+    } else if ((setup->request_type & kUsbReqTypeRecipientMask) ==
+               kUsbReqTypeInterface) {
+      // If its an interface-level request, we handle it here.  These requests
+      // will be {Set,Get}Interface.  We use interface altsettings to control
+      // which services rescue is communicating with.
+      error = interface_request(ctx, setup);
+    } else {
+      // Otherwise, all other requests get mapped to the standard control
+      // endpoint function.
+      error = dfu_transport_setupdata(ctx, setup);
+      // Take care of the SetConfiguration command.
+      if (ctx->ep0.flags & kUsbControlFlagsPendingConfig) {
+        ctx->ep0.flags &= ~(unsigned)kUsbControlFlagsPendingConfig;
+        error = set_configuration(ctx);
+        if (error == kErrorOk) {
+          dfu_transport_data(ctx, kUsbDirIn, NULL, 0, 0);
+        }
+      }
+    }
+    dfu_transport_result(ctx, error);
+  }
+
+  // If we completed a transfer, process the completion.
+  if (flags & kUsbTransferFlagsDone) {
+    // Take care of the SetAddress command.
+    if (ctx->ep0.flags & kUsbControlFlagsPendingAddress) {
+      ctx->ep0.flags &= ~(unsigned)kUsbControlFlagsPendingAddress;
+      ctx->ep0.device_address = ctx->ep0.next.device_address;
+      usb_set_address(ctx->ep0.device_address);
+    }
+
+    size_t length = *(size_t *)data;
+    if (ctx->dfu_state == kDfuStateDnLoadSync) {
+      // If we're in the DnLoadSync state and we completed a transfer, that
+      // means the rescue buffer has data to process.
+      ctx->state.offset = (uint32_t)length;
+      while (ctx->state.offset < sizeof(ctx->state.data)) {
+        // Make sure the full buffer is filled.  Fill unused space with 0xFF.
+        ctx->state.data[ctx->state.offset++] = 0xFF;
+      }
+      // Pass the rescue buffer to the rescue receive handler.
+      rom_error_t error = rescue_recv_handler(&ctx->state);
+      switch (error) {
+        case kErrorOk:
+          ctx->dfu_error = kDfuErrOk;
+          break;
+        default:
+          ctx->dfu_error = kDfuErrVendor;
+      }
+      // Back to DnLoadIdle state.
+      ctx->dfu_state = kDfuStateDnLoadIdle;
+    } else if (ctx->dfu_state == kDfuStateUpLoadIdle) {
+      if (length < kDfuTransferSize) {
+        ctx->dfu_state = kDfuStateIdle;
+      }
+      // The amount of staged data is now zero.
+      ctx->state.staged_len = 0;
+    }
+  }
+
+  if (flags & kUsbTransferFlagsReset) {
+    // A USB reset after we've been enumerated means software reset.
+    if (ctx->ep0.device_address && ctx->ep0.configuration) {
+      rstmgr_reboot();
+    }
+  }
+
+  if (flags & kUsbTransferFlagsError) {
+    // If we've been enumerated, then move the DFU state machine into the error
+    // state.
+    if (ctx->ep0.device_address && ctx->ep0.configuration) {
+      ctx->dfu_state = kDfuStateError;
+      ctx->dfu_error = kDfuErrUnknown;
+    }
+  }
+}
diff --git a/sw/device/silicon_creator/lib/rescue/dfu.h b/sw/device/silicon_creator/lib/rescue/dfu.h
new file mode 100644
index 0000000000000..9e7808a20fbf0
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/dfu.h
@@ -0,0 +1,259 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_DFU_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_DFU_H_
+
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * DFU states.
+ */
+typedef enum dfu_state {
+  kDfuStateAppIdle = 0,
+  kDfuStateAppDetach = 1,
+  kDfuStateIdle = 2,
+  kDfuStateDnLoadSync = 3,
+  kDfuStateDnLoadBusy = 4,
+  kDfuStateDnLoadIdle = 5,
+  kDfuStateManifestSync = 6,
+  kDfuStateManifest = 7,
+  kDfuStateManifestWaitReset = 8,
+  kDfuStateUpLoadIdle = 9,
+  kDfuStateError = 10,
+  kDfuStateTotalLength = 11,
+} dfu_state_t;
+
+/**
+ * DFU error codes.
+ */
+typedef enum dfu_err {
+  kDfuErrOk = 0,
+  kDfuErrTarget = 1,
+  kDfuErrFile = 2,
+  kDfuErrWrite = 3,
+  kDfuErrErase = 4,
+  kDfuErrCheckErased = 5,
+  kDfuErrProg = 6,
+  kDfuErrVerify = 7,
+  kDfuErrAddress = 8,
+  kDfuErrNotDone = 9,
+  kDfuErrFirmware = 10,
+  kDfuErrVendor = 11,
+  kDfuErrUsbReset = 12,
+  kDfuErrPowerOnReset = 13,
+  kDfuErrUnknown = 14,
+  kDfuErrStalledPkt = 15,
+} dfu_err_t;
+
+/**
+ * DFU requests (e.g SETUPDATA `bRequest`).
+ */
+typedef enum dfu_req {
+  kDfuReqDetach = 0,
+  kDfuReqDnLoad = 1,
+  kDfuReqUpLoad = 2,
+  kDfuReqGetStatus = 3,
+  kDfuReqClrStatus = 4,
+  kDfuReqGetState = 5,
+  kDfuReqAbort = 6,
+  kDfuReqTotalLength = 7,
+} dfu_req_t;
+
+/**
+ * DFU actions to take during a state transition.
+ */
+typedef enum dfu_action_t {
+  kDfuActionNone = 0,
+  kDfuActionStall,
+  kDfuActionDataXfer,
+  kDfuActionStatusResponse,
+  kDfuActionStateResponse,
+  kDfuActionClearError,
+  kDfuActionReset,
+} dfu_action_t;
+
+typedef enum dfu_allow {
+  kDfuAllowDnLoad = 1,
+  kDfuAllowUpLoad = 2,
+} dfu_allow_t;
+
+/**
+ * A DFU state transition.
+ *
+ * The action in taken and then a next state is chosen based on the action's
+ * result.
+ */
+typedef struct dfu_state_transition {
+  /**
+   * Holds a `dfu_action_t` specifying which action to take for the state
+   * transition.
+   */
+  uint8_t action;
+  /**
+   * Holds `dfu_state_t`.  Depending on the result of the `action`, the next
+   * state will be either next[0] or next[1].
+   */
+  uint8_t next[2];
+} dfu_state_transition_t;
+
+/**
+ * The DFU state table mapping actions and next states.
+ *
+ * We map determine the next state for each DFU request and initial state.
+ */
+extern dfu_state_transition_t dfu_state_table[kDfuReqTotalLength]
+                                             [kDfuStateTotalLength];
+
+/**
+ * The response to a DFU_GETSTATUS request.
+ */
+typedef struct dfu_getstatus {
+  /** The status of the most recent request. */
+  uint8_t status;
+  /** Minimum time (ms) that the host should wait before sending another
+   * DFU_GETSTATUS request. */
+  uint8_t poll_timeout[3];
+  /** The next state of the device after this response. */
+  uint8_t state;
+  /** An index of the status description in the string table. */
+  uint8_t string;
+} dfu_getstatus_t;
+
+/**
+ * The DFU rescue context.
+ */
+typedef struct dfu_ctx {
+  /** USB context for managing endpoint zero. */
+  usb_control_ctx_t ep0;
+  /** Rescue state. */
+  rescue_state_t state;
+  /** Expected receive length (upload) */
+  uint32_t expected_len;
+  /** Status buffer (used to respond to DfuReqGetStatus). */
+  dfu_getstatus_t status;
+  /** DFU state. */
+  uint8_t dfu_state;
+  /** DFU error. */
+  uint8_t dfu_error;
+  /** Currenty selected usb interface setting. */
+  uint8_t interface;
+  /** A `dfu_allow_t` describing whether dnload or upload are allowed. */
+  uint8_t allow;
+} dfu_ctx_t;
+
+/**
+ * Start a DFU transfer.
+ *
+ * This is a simple wrapper around `usb_ep_transfer` that can be replaced at
+ * link-time with alternative transports (such as SPI).
+ *
+ * @param ctx The DFU context.
+ * @param dir The direction of the transfer.
+ * @param data The buffer to send or receive into.
+ * @param len The length of the buffer.
+ * @param flags The direction or other attributes assocated with the transfer.
+ */
+void dfu_transport_data(dfu_ctx_t *ctx, usb_dir_t dir, void *data, size_t len,
+                        usb_transfer_flags_t flags);
+
+/**
+ * Handle the transport's standard setupdata requests
+ *
+ * This is a simple wrapper around `usb_control_setupdata` that can be replaced
+ * at link-time with alternative transports (such as SPI).
+ *
+ * @param ctx The DFU context.
+ * @param setup A pointer to the setupdata.
+ * @return Result of handling the setupdata.
+ */
+rom_error_t dfu_transport_setupdata(dfu_ctx_t *ctx, usb_setup_data_t *setup);
+
+/**
+ * Report a result or error on the transport.
+ *
+ * On USB, if there is an error, this should stall the control endpoint.
+ *
+ * @param ctx The DFU context.
+ * @param result The Ok or Error result to signal on the transport.
+ */
+void dfu_transport_result(dfu_ctx_t *ctx, rom_error_t result);
+
+/**
+ * Implements the DFU protocol.
+ *
+ * For USB, this is the endpoint callback function.
+ *
+ * @param ctx A pointer to a `dfu_ctx_t`.
+ * @param ep The endpoint number for the callback.
+ * @param flags The condition for the callback.
+ * @param data Any extra data associated with the condition.
+ */
+void dfu_protocol_handler(void *ctx, uint8_t ep, usb_transfer_flags_t flags,
+                          void *data);
+
+/**
+ * Implementation constant.
+ */
+enum {
+  /**
+   * Device Class, SubClass and Protocol for DFU.
+   */
+  kDfuDeviceClass = 0xFE,
+  kDfuDeviceSubClass = 0x01,
+  kDfuDeviceProtocol = 0x02,
+
+  /**
+   * Constants for the DFU functional descriptor.
+   */
+  kDfuFuncDescLen = 9,
+  kDfuFuncDescType = 0x21,
+  kDfuFuncAttrCanDnLoad = 1,
+  kDfuFuncAttrCanUpLoad = 2,
+  kDfuFuncAttrManifestTolerant = 4,
+  kDfuFuncAttrWillDetach = 8,
+  kDfuFuncDetachTimeout = 32768,
+
+  /**
+   * We support a DFU transfer size of 2048.
+   * This needs to be the same size as the rescue_state_t::buffer.
+   */
+  kDfuTransferSize = 2048,
+
+  /**
+   * The DFU version is 1.1.
+   */
+  kDfuMajorVersion = 1,
+  kDfuMinorVersion = 1,
+
+  /**
+   * Vendor and Product IDs for the ROM_EXT.
+   * Since lowRISC does not yet have a USB vendor ID, Google has reserved
+   * product ID 0x023A to represent the OpenTitan ROM_EXT when in DFU
+   * rescue mode.
+   */
+  kUsbVendorGoogle = 0x18d1,
+  kUsbProuctRomExt = 0x023a,
+
+  /**
+   * A proprietary vendor request to set the DFU mode using a FourCC code
+   * instead of an AltSetting index. The FourCC code uses the SETUP_DATA 16-bit
+   * value and index fields to represent the 32-bit code.
+   */
+  kDfuVendorSetMode = 0x0b,
+
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_DFU_H_
diff --git a/sw/device/silicon_creator/lib/rescue/dfu_state_table.c b/sw/device/silicon_creator/lib/rescue/dfu_state_table.c
new file mode 100644
index 0000000000000..73bd5bfdf398d
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/dfu_state_table.c
@@ -0,0 +1,117 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/rescue/dfu.h"
+
+// clang-format off
+// We map state transitions for every DFU request for every DFU state.
+//
+// The ROM_EXT will never be in the AppIdle or AppDetach states, but we include them
+// so that the state table is complete.
+dfu_state_transition_t dfu_state_table[kDfuReqTotalLength][kDfuStateTotalLength] = {
+    [kDfuReqDetach] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionNone, {kDfuStateAppDetach}},
+            [kDfuStateAppDetach] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateError] = {kDfuActionStall, {kDfuStateError}},
+        },
+    [kDfuReqDnLoad] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateAppDetach] = {kDfuActionStall, {kDfuStateError}},
+            // DataXfer chooses next[0] when length == 0, next[1] otherwise.
+            [kDfuStateIdle] = {kDfuActionDataXfer, {kDfuStateError, kDfuStateDnLoadSync}},
+            [kDfuStateDnLoadSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            // DataXfer chooses next[0] when length == 0, next[1] otherwise.
+            [kDfuStateDnLoadIdle] = {kDfuActionDataXfer, {kDfuStateManifestSync, kDfuStateDnLoadSync}},
+            [kDfuStateManifestSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateError] = {kDfuActionStall, {kDfuStateError}},
+        },
+    [kDfuReqUpLoad] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateAppDetach] = {kDfuActionStall, {kDfuStateError}},
+            // DataXfer chooses next[0] when length == 0, next[1] otherwise.
+            [kDfuStateIdle] = {kDfuActionDataXfer, {kDfuStateUpLoadIdle, kDfuStateUpLoadIdle}},
+            [kDfuStateDnLoadSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            // DataXfer chooses next[0] when length == 0, next[1] otherwise.
+            [kDfuStateUpLoadIdle] = {kDfuActionDataXfer, {kDfuStateIdle, kDfuStateUpLoadIdle}},
+            [kDfuStateError] = {kDfuActionStall, {kDfuStateError}},
+        },
+    [kDfuReqGetStatus] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStatusResponse, {kDfuStateAppIdle}},
+            [kDfuStateAppDetach] = {kDfuActionStatusResponse, {kDfuStateAppDetach}},
+            [kDfuStateIdle] = {kDfuActionStatusResponse, {kDfuStateIdle}},
+            [kDfuStateDnLoadSync] = {kDfuActionStatusResponse, {kDfuStateDnLoadIdle}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionStatusResponse, {kDfuStateDnLoadIdle}},
+            [kDfuStateManifestSync] = {kDfuActionStatusResponse, {kDfuStateIdle}},
+            [kDfuStateManifest] = {kDfuActionStatusResponse, {kDfuStateManifestSync}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionStatusResponse, {kDfuStateUpLoadIdle}},
+            [kDfuStateError] = {kDfuActionStatusResponse, {kDfuStateError}},
+        },
+    [kDfuReqClrStatus] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateAppDetach] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateIdle] = {kDfuActionStall, {kDfuStateIdle}},
+            [kDfuStateDnLoadSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestSync] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateError] = {kDfuActionClearError, {kDfuStateIdle}},
+        },
+    [kDfuReqGetState] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStateResponse, {kDfuStateAppIdle}},
+            [kDfuStateAppDetach] = {kDfuActionStateResponse, {kDfuStateAppDetach}},
+            [kDfuStateIdle] = {kDfuActionStateResponse, {kDfuStateUpLoadIdle}},
+            [kDfuStateDnLoadSync] = {kDfuActionStateResponse, {kDfuStateDnLoadIdle}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionStateResponse, {kDfuStateDnLoadIdle}},
+            [kDfuStateManifestSync] = {kDfuActionStateResponse, {kDfuStateManifestSync}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionStateResponse, {kDfuStateUpLoadIdle}},
+            [kDfuStateError] = {kDfuActionStateResponse, {kDfuStateError}},
+        },
+    [kDfuReqAbort] =
+        {
+            [kDfuStateAppIdle] = {kDfuActionStall, {kDfuStateAppIdle}},
+            [kDfuStateAppDetach] = {kDfuActionStall, {kDfuStateAppDetach}},
+            [kDfuStateIdle] = {kDfuActionNone, {kDfuStateIdle}},
+            [kDfuStateDnLoadSync] = {kDfuActionNone, {kDfuStateIdle}},
+            [kDfuStateDnLoadBusy] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateDnLoadIdle] = {kDfuActionNone, {kDfuStateIdle}},
+            [kDfuStateManifestSync] = {kDfuActionNone, {kDfuStateIdle}},
+            [kDfuStateManifest] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateManifestWaitReset] = {kDfuActionStall, {kDfuStateError}},
+            [kDfuStateUpLoadIdle] = {kDfuActionNone, {kDfuStateIdle}},
+            [kDfuStateError] = {kDfuActionStall, {kDfuStateError}},
+        },
+
+};
+// clang-format on
diff --git a/sw/device/silicon_creator/lib/rescue/rescue.c b/sw/device/silicon_creator/lib/rescue/rescue.c
new file mode 100644
index 0000000000000..8df9823ee0529
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue.c
@@ -0,0 +1,453 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_enter_rescue.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/ibex.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/uart.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+
+#include "flash_ctrl_regs.h"
+
+#if RESCUE_USES_UART == 1
+#define rescue_msg(fmt, ...)        \
+  do {                              \
+    dbg_printf(fmt, ##__VA_ARGS__); \
+  } while (0)
+#else
+#define rescue_msg(fmt, ...) \
+  do {                       \
+  } while (0)
+#endif
+
+typedef enum rescue_request {
+  kRescueRequestNone = 0,
+  kRescueRequestEnter = 0x739,
+  kRescueRequestSkip = 0x1d4,
+} rescue_request_t;
+
+static rescue_request_t rescue_requested;
+
+const uint32_t kFlashPageSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE;
+const uint32_t kFlashBankSize =
+    kFlashPageSize * FLASH_CTRL_PARAM_REG_PAGES_PER_BANK;
+
+static inline bool is_rom_ext(const void *data) {
+  const manifest_t *manifest = (const manifest_t *)data;
+  return manifest->identifier == CHIP_ROM_EXT_IDENTIFIER;
+}
+
+static inline bool is_rom_ext_update_allowed(rescue_state_t *state) {
+  // A ROM_EXT update is allowed if the partition we're flashing is not the
+  // ROM_EXT active partition.
+  return (state->mode == kRescueModeFirmware &&
+          state->boot_log->rom_ext_slot == kBootSlotB) ||
+         (state->mode == kRescueModeFirmwareSlotB &&
+          state->boot_log->rom_ext_slot == kBootSlotA);
+}
+
+rom_error_t flash_firmware_block(rescue_state_t *state) {
+  uint32_t bank_offset =
+      state->mode == kRescueModeFirmwareSlotB ? kFlashBankSize : 0;
+  if (state->flash_offset == 0) {
+    // TODO(#24428): Make sure we interact correctly with owner flash region
+    // configuration.
+    flash_ctrl_data_default_perms_set((flash_ctrl_perms_t){
+        .read = kMultiBitBool4True,
+        .write = kMultiBitBool4True,
+        .erase = kMultiBitBool4True,
+    });
+    // Detect if we're allowed to flash the ROM_EXT _and_ if the data stream
+    // starts with a ROM_EXT.  If so, we start flashing at offset 0 in this
+    // bank.
+    state->flash_begin =
+        (is_rom_ext_update_allowed(state) && is_rom_ext(state->data))
+            ? 0
+            : state->flash_start;
+
+    // Erase the allowed range in the requested partition.
+    for (uint32_t addr = state->flash_begin; addr < state->flash_limit;
+         addr += kFlashPageSize) {
+      HARDENED_RETURN_IF_ERROR(
+          flash_ctrl_data_erase(bank_offset + addr, kFlashCtrlEraseTypePage));
+    }
+    // Regardless of whether we're allowed to flash the ROM_EXT, set the flash
+    // offset to zero if the data stream contains a ROM_EXT, otherwise, set to
+    // flash_start. This will allow rescue to silently consume the ROM_EXT if
+    // we're in the ROM_EXT active partition.
+    state->flash_offset = is_rom_ext(state->data) ? 0 : state->flash_start;
+  }
+
+  if (state->flash_offset < state->flash_begin) {
+    // Before allowed beginning; silently consume the data without flashing.
+    state->flash_offset += sizeof(state->data);
+  } else if (state->flash_offset >= state->flash_limit) {
+    // Beyond the allowed limit; return an error.
+    return kErrorRescueImageTooBig;
+  } else {
+    // In the allowed range; flash the data.
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_data_write(
+        bank_offset + state->flash_offset,
+        sizeof(state->data) / sizeof(uint32_t), state->data));
+    state->flash_offset += sizeof(state->data);
+  }
+  return kErrorOk;
+}
+
+rom_error_t flash_owner_block(rescue_state_t *state) {
+  if (state->bootdata->ownership_state == kOwnershipStateUnlockedAny ||
+      state->bootdata->ownership_state == kOwnershipStateUnlockedSelf ||
+      state->bootdata->ownership_state == kOwnershipStateUnlockedEndorsed ||
+      (state->bootdata->ownership_state == kOwnershipStateLockedOwner &&
+       owner_block_newversion_mode() == kHardenedBoolTrue)) {
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(
+        &kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage));
+    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
+        &kFlashCtrlInfoPageOwnerSlot1, 0,
+        sizeof(state->data) / sizeof(uint32_t), state->data));
+  } else {
+    rescue_msg("error: cannot accept owner_block in current state\r\n");
+  }
+  return kErrorOk;
+}
+
+#ifdef ROM_EXT_KLOBBER_ALLOWED
+// In order to facilitate debuging and manual test flows for ownerhsip transfer,
+// we allow the owner pages to be erased if and only if the chip is in the DEV
+// lifecycle state AND the ROM_EXT was specifically built to allow owner erase.
+//
+// In the general case, the `KLBR` command does not exist.  It can only be
+// enabled by silicon_creator and only for DEV chips.
+static void ownership_erase(void) {
+  lifecycle_state_t lc_state = lifecycle_state_get();
+  if (lc_state == kLcStateDev) {
+    OT_DISCARD(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot0,
+                                     kFlashCtrlEraseTypePage));
+    OT_DISCARD(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot1,
+                                     kFlashCtrlEraseTypePage));
+    rescue_msg("ok: erased owner blocks\r\n");
+  } else {
+    rescue_msg("error: erase not allowed in state %x\r\n", lc_state);
+  }
+}
+#endif
+
+rom_error_t rescue_validate_mode(uint32_t mode, rescue_state_t *state) {
+  rescue_msg("\r\nmode: %C\r\n", bitfield_byteswap32(mode));
+  rom_error_t result = kErrorOk;
+
+  // The following commands are always allowed and are not subject to
+  // the "command allowed" check.
+  switch (mode) {
+    case kRescueModeReboot:
+      rescue_msg("ok: reboot\r\n");
+      state->mode = (rescue_mode_t)mode;
+      goto exitproc;
+    case kRescueModeNoOp:
+      // The No-Op mode is always allowed and does nothing.
+      state->mode = (rescue_mode_t)mode;
+      goto exitproc;
+#ifdef ROM_EXT_KLOBBER_ALLOWED
+    case kRescueModeKlobber:
+      ownership_erase();
+      goto exitproc;
+#endif
+    default:
+        /* do nothing */;
+  }
+
+  hardened_bool_t allow = owner_rescue_command_allowed(state->config, mode);
+  if (allow == kHardenedBoolTrue) {
+    switch (mode) {
+      case kRescueModeBootLog:
+        rescue_msg("ok: receive boot_log\r\n");
+        break;
+      case kRescueModeBootSvcRsp:
+        rescue_msg("ok: receive boot_svc response\r\n");
+        break;
+      case kRescueModeBootSvcReq:
+        rescue_msg("ok: send boot_svc request\r\n");
+        break;
+      case kRescueModeOwnerBlock:
+        if (state->bootdata->ownership_state == kOwnershipStateUnlockedAny ||
+            state->bootdata->ownership_state == kOwnershipStateUnlockedSelf ||
+            state->bootdata->ownership_state ==
+                kOwnershipStateUnlockedEndorsed ||
+            (state->bootdata->ownership_state == kOwnershipStateLockedOwner &&
+             owner_block_newversion_mode() == kHardenedBoolTrue)) {
+          rescue_msg("ok: send owner_block\r\n");
+        } else {
+          rescue_msg("error: cannot accept owner_block in current state\r\n");
+          return kErrorRescueBadMode;
+        }
+        break;
+      case kRescueModeFirmware:
+      case kRescueModeFirmwareSlotB:
+        rescue_msg("ok: send firmware\r\n");
+        break;
+      case kRescueModeOwnerPage0:
+      case kRescueModeOwnerPage1:
+        rescue_msg("ok: receive owner page\r\n");
+        break;
+      case kRescueModeOpenTitanID:
+        rescue_msg("ok: receive device ID\r\n");
+        break;
+      default:
+        // User input error.  Do not change modes.
+        rescue_msg("error: unrecognized mode\r\n");
+        return kErrorRescueBadMode;
+    }
+    state->mode = (rescue_mode_t)mode;
+  } else {
+    rescue_msg("error: mode not allowed\r\n");
+    result = kErrorRescueBadMode;
+  }
+exitproc:
+  state->frame = 1;
+  state->offset = 0;
+  state->flash_offset = 0;
+  return result;
+}
+
+rom_error_t rescue_send_handler(rescue_state_t *state) {
+  // The following commands are always allowed and are not subject to
+  // the "command allowed" check.
+  switch (state->mode) {
+    case kRescueModeReboot:
+      // If a reboot was requested, return an error and go through the normal
+      // shutdown process.
+      return kErrorRescueReboot;
+    case kRescueModeNoOp:
+      // The No-Op mode is always allowed and does nothing.
+      return kErrorOk;
+    default:
+        /* do nothing */;
+  }
+
+  hardened_bool_t allow =
+      owner_rescue_command_allowed(state->config, state->mode);
+  if (allow != kHardenedBoolTrue) {
+    return kErrorRescueBadMode;
+  }
+
+  const retention_sram_t *rr = retention_sram_get();
+  switch (state->mode) {
+    case kRescueModeBootLog:
+      memcpy(state->data, &rr->creator.boot_log, sizeof(rr->creator.boot_log));
+      state->staged_len = sizeof(rr->creator.boot_log);
+      break;
+    case kRescueModeBootSvcRsp:
+      memcpy(state->data, &rr->creator.boot_svc_msg,
+             sizeof(rr->creator.boot_svc_msg));
+      state->staged_len = sizeof(rr->creator.boot_svc_msg);
+      break;
+    case kRescueModeOpenTitanID: {
+      lifecycle_device_id_get((lifecycle_device_id_t *)state->data);
+      state->staged_len = sizeof(lifecycle_device_id_t);
+      break;
+    }
+    case kRescueModeOwnerPage0:
+    case kRescueModeOwnerPage1:
+      HARDENED_RETURN_IF_ERROR(flash_ctrl_info_read(
+          state->mode == kRescueModeOwnerPage0 ? &kFlashCtrlInfoPageOwnerSlot0
+                                               : &kFlashCtrlInfoPageOwnerSlot1,
+          0, sizeof(state->data) / sizeof(uint32_t), state->data));
+      state->staged_len = sizeof(state->data);
+      break;
+
+    case kRescueModeBootSvcReq:
+    case kRescueModeOwnerBlock:
+    case kRescueModeFirmware:
+    case kRescueModeFirmwareSlotB:
+      // Nothing to do for receive modes.
+      return kErrorOk;
+    default:
+      // This state should be impossible.
+      return kErrorRescueBadMode;
+  }
+  return kErrorRescueSendStart;
+}
+
+rom_error_t rescue_recv_handler(rescue_state_t *state) {
+  hardened_bool_t allow =
+      owner_rescue_command_allowed(state->config, state->mode);
+  if (allow != kHardenedBoolTrue) {
+    return kErrorRescueBadMode;
+  }
+
+  retention_sram_t *rr = retention_sram_get();
+  switch (state->mode) {
+    case kRescueModeNoOp:
+    case kRescueModeBootLog:
+    case kRescueModeBootSvcRsp:
+    case kRescueModeOpenTitanID:
+    case kRescueModeOwnerPage0:
+    case kRescueModeOwnerPage1:
+      // Nothing to do for send modes.
+      break;
+    case kRescueModeBootSvcReq:
+      if (state->offset >= sizeof(rr->creator.boot_svc_msg)) {
+        const boot_svc_msg_t *msg = (const boot_svc_msg_t *)state->data;
+        allow = owner_rescue_command_allowed(state->config, msg->header.type);
+        if (allow != kHardenedBoolTrue) {
+          return kErrorRescueBadMode;
+        }
+        memcpy(&rr->creator.boot_svc_msg, state->data,
+               sizeof(rr->creator.boot_svc_msg));
+        state->offset = 0;
+      }
+      break;
+    case kRescueModeOwnerBlock:
+      if (state->offset == sizeof(state->data)) {
+        HARDENED_RETURN_IF_ERROR(flash_owner_block(state));
+        state->offset = 0;
+      }
+      break;
+    case kRescueModeFirmware:
+    case kRescueModeFirmwareSlotB:
+      if (state->offset == sizeof(state->data)) {
+        HARDENED_RETURN_IF_ERROR(flash_firmware_block(state));
+        state->offset = 0;
+      }
+      break;
+    case kRescueModeReboot:
+    default:
+      // This state should be impossible.
+      return kErrorRescueBadMode;
+  }
+  return kErrorOk;
+}
+
+void rescue_state_init(rescue_state_t *state, boot_data_t *bootdata,
+                       boot_log_t *boot_log,
+                       const owner_rescue_config_t *config) {
+  state->boot_log = boot_log;
+  state->bootdata = bootdata;
+  state->config = config;
+  state->default_mode = kRescueModeFirmware;
+
+  if ((hardened_bool_t)config == kHardenedBoolFalse) {
+    HARDENED_CHECK_EQ((hardened_bool_t)config, kHardenedBoolFalse);
+    // If there is no rescue config, then the rescue region starts immediately
+    // after the ROM_EXT and ends at the end of the flash bank.
+    state->flash_start = CHIP_ROM_EXT_SIZE_MAX;
+    state->flash_limit = kFlashBankSize;
+    state->inactivity_deadline = 0;
+  } else {
+    state->flash_start = (uint32_t)config->start * kFlashPageSize;
+    state->flash_limit =
+        (uint32_t)(config->start + config->size) * kFlashPageSize;
+    uint32_t timeout =
+        bitfield_field32_read(config->timeout, RESCUE_TIMEOUT_SECONDS);
+    state->inactivity_deadline =
+        timeout ? ibex_mcycle() + ibex_time_to_cycles(1000000 * timeout) : 0;
+
+    // If the owner has disabled the firmware rescue commands, then set the
+    // default mode to No-Op.
+    if (owner_rescue_command_allowed(config, state->default_mode) ==
+        kHardenedBoolFalse) {
+      state->default_mode = kRescueModeNoOp;
+    }
+  }
+  state->mode = state->default_mode;
+}
+
+rom_error_t rescue_enter_handler(boot_svc_msg_t *msg) {
+  rescue_requested = msg->enter_rescue_req.skip_once == kHardenedBoolTrue
+                         ? kRescueRequestSkip
+                         : kRescueRequestEnter;
+  boot_svc_enter_rescue_res_init(kErrorOk, &msg->enter_rescue_res);
+  return kErrorOk;
+}
+
+rom_error_t rescue_inactivity(rescue_state_t *state) {
+  if (state->inactivity_deadline &&
+      ibex_mcycle() > state->inactivity_deadline) {
+    return kErrorRescueInactivity;
+  }
+  return kErrorOk;
+}
+
+hardened_bool_t rescue_enter_on_fail(const owner_rescue_config_t *config) {
+  if ((hardened_bool_t)config != kHardenedBoolFalse) {
+    if (bitfield_bit32_read(config->timeout, RESCUE_ENTER_ON_FAIL_BIT)) {
+      return kHardenedBoolTrue;
+    }
+  }
+  return kHardenedBoolFalse;
+}
+
+void rescue_skip_next_boot(void) {
+  boot_svc_msg_t *msg = &retention_sram_get()->creator.boot_svc_msg;
+  boot_svc_enter_rescue_req_init(kHardenedBoolTrue, &msg->enter_rescue_req);
+}
+
+hardened_bool_t rescue_detect_entry(const owner_rescue_config_t *config,
+                                    uint32_t reset_reasons) {
+  switch (rescue_requested) {
+    case kRescueRequestEnter:
+      return kHardenedBoolTrue;
+    case kRescueRequestSkip:
+      return kHardenedBoolFalse;
+    default:
+        /* do nothing and continue with trigger detection */;
+  }
+  rescue_protocol_t protocol = kRescueProtocolXmodem;
+  rescue_detect_t detect = kRescueDetectBreak;
+  uint32_t index = 0;
+  uint32_t gpio_val = 0;
+  uint32_t wdt_enable = 0;
+  if ((hardened_bool_t)config != kHardenedBoolFalse) {
+    protocol = config->protocol;
+    detect = bitfield_field32_read(config->detect, RESCUE_DETECT);
+    index = bitfield_field32_read(config->detect, RESCUE_DETECT_INDEX);
+    gpio_val = bitfield_bit32_read(config->gpio, RESCUE_MISC_GPIO_VALUE_BIT);
+    wdt_enable = bitfield_bit32_read(config->gpio,
+                                     RESCUE_MISC_GPIO_WATCHDOG_TIMEOUT_EN_BIT);
+  }
+  dbg_printf("info: rescue protocol %c\r\n", rescue_type);
+  if (protocol != rescue_type) {
+    dbg_printf("warning: rescue configured for protocol %c\r\n", protocol);
+  }
+
+  if (wdt_enable && bitfield_bit32_read(reset_reasons, kRstmgrReasonWatchdog)) {
+    return kHardenedBoolTrue;
+  }
+
+  switch (detect) {
+    case kRescueDetectNone:
+      break;
+    case kRescueDetectBreak:
+      if (uart_break_detect(kRescueDetectTime) == kHardenedBoolTrue) {
+        dbg_printf("rescue:1.0 remember to clear break\r\n");
+        return kHardenedBoolTrue;
+      }
+      break;
+    case kRescueDetectGpio:
+      if (pinmux_read_gpio(0) == gpio_val) {
+        return kHardenedBoolTrue;
+      }
+      break;
+    case kRescueDetectStrap:
+      if (pinmux_read_straps() == index) {
+        return kHardenedBoolTrue;
+      }
+      break;
+  }
+  return kHardenedBoolFalse;
+}
diff --git a/sw/device/silicon_creator/lib/rescue/rescue.h b/sw/device/silicon_creator/lib/rescue/rescue.h
new file mode 100644
index 0000000000000..6b00c0ccc9df5
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue.h
@@ -0,0 +1,197 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_RESCUE_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_RESCUE_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+
+enum {
+  // Rescue is signalled by asserting serial break to the UART for at least
+  // 4 byte periods.  At 115200 bps, one byte period is about 87us; four is
+  // about 348us.  We'll wait for 350.
+  kRescueDetectTime = 350,
+};
+
+typedef enum {
+  /** `BAUD` */
+  kRescueModeBaud = 0x42415544,
+  /** `BLOG` */
+  kRescueModeBootLog = 0x424c4f47,
+  /** `BRSP` */
+  kRescueModeBootSvcRsp = 0x42525350,
+  /** `BREQ` */
+  kRescueModeBootSvcReq = 0x42524551,
+  /** `KLBR` */
+  kRescueModeKlobber = 0x4b4c4252,
+  /** `OWNR` */
+  kRescueModeOwnerBlock = 0x4f574e52,
+  /** `OPG0` */
+  kRescueModeOwnerPage0 = 0x4f504730,
+  /** `OPG1` */
+  kRescueModeOwnerPage1 = 0x4f504731,
+  /** `OTID` */
+  kRescueModeOpenTitanID = 0x4f544944,
+  /** `RESQ` */
+  kRescueModeFirmware = 0x52455351,
+  /** `RESB` */
+  kRescueModeFirmwareSlotB = 0x52455342,
+  /** `REBO` */
+  kRescueModeReboot = 0x5245424f,
+  /** `WAIT` */
+  kRescueModeWait = 0x57414954,
+  /** `NOOP` */
+  kRescueModeNoOp = 0x4e4f4f50,
+} rescue_mode_t;
+
+typedef enum {
+  /** `115K` */
+  kRescueBaud115K = 0x4b353131,
+  /** `230K` */
+  kRescueBaud230K = 0x4b303332,
+  /** `460K` */
+  kRescueBaud460K = 0x4b303634,
+  /** `921K` */
+  kRescueBaud921K = 0x4b313239,
+  /** `1M33` */
+  kRescueBaud1M33 = 0x33334d31,
+  /** `1M50` */
+  kRescueBaud1M50 = 0x30354d31,
+} rescue_baud_t;
+
+typedef struct RescueState {
+  // Current rescue mode.
+  rescue_mode_t mode;
+  // Default rescue mode.
+  rescue_mode_t default_mode;
+  // Inactivity deadline.
+  uint64_t inactivity_deadline;
+  // Current xmodem frame.
+  uint32_t frame;
+  // Current data offset.
+  uint32_t offset;
+  // Amount of data staged in the `data` buffer (for data to send to the host).
+  uint16_t staged_len;
+  // Current flash write offset.
+  uint32_t flash_offset;
+  // Current flash beginning offset.  This is the partition-relative offset
+  // where we're allowed to start writing to flash.  Normally, this will be
+  // the same as `flash_start`, but if we're allowed to write the ROM_EXT
+  // and we've detected a ROM_EXT, this may be adjusted to zero.
+  uint32_t flash_begin;
+  // Range to erase and write for firmware rescue (inclusive).
+  uint32_t flash_start;
+  uint32_t flash_limit;
+  // Pointer to the current bootdata record.
+  boot_data_t *bootdata;
+  // Pointer to the boot log.
+  boot_log_t *boot_log;
+  // Rescue configuration.
+  const owner_rescue_config_t *config;
+  // Data buffer to hold xmodem upload data.
+  uint8_t data[2048];
+} rescue_state_t;
+
+extern const uint32_t rescue_type;
+
+/**
+ * Handle rescue modes that involve sending data to the host.
+ *
+ * @param state Rescue state
+ * @return kErrorOk if nothing to do, kErrorRescueSendStart if the state->data
+ *         buffer is ready to send, or an error.
+ */
+rom_error_t rescue_send_handler(rescue_state_t *state);
+
+/**
+ * Handle rescue movdes that involve receiving data into the device.
+ *
+ * @param state Rescue state
+ * @return kErrorOk if no error or an error code indicating a problem with
+ *         the received data.
+ */
+rom_error_t rescue_recv_handler(rescue_state_t *state);
+
+/**
+ * Validate a new rescue mode.
+ *
+ * @param mode The new mode.
+ * @param state Rescue state
+ * @return kErrorOk if the new mode was accepted, kErrorBadMode otherwise.
+ *
+ * The rescue state is updated: mode, offset and flash_offset.
+ */
+rom_error_t rescue_validate_mode(uint32_t mode, rescue_state_t *state);
+
+/**
+ * Initialize the rescue state.
+ *
+ * @param state Rescue state
+ * @param bootdata Boot data
+ * @param boot_log The boot_log
+ * @param config The ownership rescue config (if any).
+ */
+void rescue_state_init(rescue_state_t *state, boot_data_t *bootdata,
+                       boot_log_t *boot_log,
+                       const owner_rescue_config_t *config);
+
+/**
+ * Handle the boot services RescueEnter request.
+ *
+ * @param msg The boot services message.
+ * @return kErrorOk if the command was processed correctly.
+ */
+rom_error_t rescue_enter_handler(boot_svc_msg_t *msg);
+
+/**
+ * Return an error if the inactivity deadline has passed.
+ *
+ * @param state Rescue state
+ * @return kErrorOk if the deadline has not passed,
+ *         kErrorRescueInactivity if it has.
+ */
+rom_error_t rescue_inactivity(rescue_state_t *state);
+
+/**
+ * Perform the rescue protocol.
+ *
+ * @param bootdata Boot data
+ * @param boot_log The boot_log
+ * @param config The ownership rescue config (if any).
+ * @return Any error in processing the rescue protocol.
+ */
+rom_error_t rescue_protocol(boot_data_t *bootdata, boot_log_t *boot_log,
+                            const owner_rescue_config_t *config);
+
+/**
+ * Enter rescue mode on boot failure.
+ * @param config The ownership rescue config (if any).
+ * @return whether to enter rescue mode.
+ */
+hardened_bool_t rescue_enter_on_fail(const owner_rescue_config_t *config);
+
+/**
+ * Send ourself a message to skip rescue entry on the next boot.
+ */
+void rescue_skip_next_boot(void);
+
+/**
+ * Detect rescue entry.
+ *
+ * @param config The ownership rescue config (if any).
+ * @param reset_reasons The reset reaons value from the rstmgr.
+ * @return kHardenedBoolTrue if we should enter rescue mode.
+ */
+hardened_bool_t rescue_detect_entry(const owner_rescue_config_t *config,
+                                    uint32_t reset_reasons);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_RESCUE_H_
diff --git a/sw/device/silicon_creator/lib/rescue/rescue_null.c b/sw/device/silicon_creator/lib/rescue/rescue_null.c
new file mode 100644
index 0000000000000..14c85d0c76423
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue_null.c
@@ -0,0 +1,7 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+const uint32_t rescue_type = 0;
diff --git a/sw/device/silicon_creator/lib/rescue/rescue_spi.c b/sw/device/silicon_creator/lib/rescue/rescue_spi.c
new file mode 100644
index 0000000000000..37ac20504eacb
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue_spi.c
@@ -0,0 +1,139 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/spi_device.h"
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/rescue/dfu.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+#include "sw/device/silicon_creator/lib/rescue/sfdp.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+const uint32_t rescue_type = kRescueProtocolSpiDfu;
+
+enum {
+  /**
+   * Base address of the spi_device registers.
+   */
+  kBase = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+  /**
+   * The flash buffer is a 2K region within the egress buffer, starting at the
+   * beginning of the egress buffer.
+   */
+  kFlashBuffer = 0,
+  /**
+   * The mailbox buffer is a 1K region within the egress buffer starting at 2K
+   */
+  kMailboxBuffer = 2048,
+  /**
+   * The mailbox address is located at SPI address 0x800.
+   */
+  kMailboxAddress = 0x800,
+};
+
+extern uint32_t spi_device_control(void);
+
+void dfu_transport_data(dfu_ctx_t *ctx, usb_dir_t dir, void *data, size_t len,
+                        usb_transfer_flags_t flags) {
+  if (dir & kUsbDirIn) {
+    // IN transactions get copied into the SPI egress buffer.
+    spi_device_copy_to_egress(kFlashBuffer, data, len);
+  } else {
+    // We set the total expected length for OUT transactions here.
+    // The processing of the data packets happens in the main loop in response
+    // to PAGE_PROGRAM opcodes.
+    ctx->expected_len = len;
+  }
+}
+
+rom_error_t dfu_transport_setupdata(dfu_ctx_t *ctx, usb_setup_data_t *setup) {
+  OT_DISCARD(ctx);
+  OT_DISCARD(setup);
+  // We don't handle most of the standard setupdata requests over SPI.
+  //
+  // We do handle SetInterface/GetInterface in the main DFU handler; those
+  // requests are used to set the ROM_EXT service that the client wants to
+  // interact with.
+  return kErrorUsbBadSetup;
+}
+
+void dfu_transport_result(dfu_ctx_t *ctx, rom_error_t result) {
+  OT_DISCARD(ctx);
+  uint32_t value = result;
+  spi_device_copy_to_egress(kMailboxBuffer, &value, sizeof(value));
+  spi_device_flash_status_clear();
+}
+
+rom_error_t rescue_protocol(boot_data_t *bootdata, boot_log_t *boot_log,
+                            const owner_rescue_config_t *config) {
+  dfu_ctx_t ctx = {
+      .dfu_state = kDfuStateIdle,
+      .dfu_error = kDfuErrOk,
+  };
+  dbg_printf("SPI-DFU rescue ready\r\n");
+  rescue_state_init(&ctx.state, bootdata, boot_log, config);
+  spi_device_init(
+      /*log2_density=*/kRescueDensity, &kRescueSfdpTable,
+      sizeof(kRescueSfdpTable));
+  spi_device_enable_mailbox(kMailboxAddress);
+
+  spi_device_cmd_t cmd;
+  uint32_t length;
+  while (true) {
+    RETURN_IF_ERROR(rescue_inactivity(&ctx.state));
+    rom_error_t result = spi_device_cmd_get(&cmd, /*blocking=*/false);
+    switch (result) {
+      case kErrorOk:
+        break;
+      case kErrorNoData:
+        continue;
+      default:
+        return result;
+    }
+    switch (cmd.opcode) {
+      case kSpiDeviceOpcodePageProgram: {
+        if (cmd.address == kMailboxAddress) {
+          usb_setup_data_t *setup = (usb_setup_data_t *)cmd.payload;
+          dfu_protocol_handler(&ctx, 0, kUsbTransferFlagsSetupData, setup);
+        } else {
+          // Our payload buffer is 2K; truncate addresses.
+          uint32_t offset = cmd.address & 0x7FF;
+          if (offset + cmd.payload_byte_count > sizeof(ctx.state.data)) {
+            // If the packet is too big, truncate to the size of the target
+            // buffer.
+            size_t excess =
+                offset + cmd.payload_byte_count - sizeof(ctx.state.data);
+            cmd.payload_byte_count -= excess;
+          }
+          memcpy(ctx.state.data + offset, cmd.payload, cmd.payload_byte_count);
+          length = offset + cmd.payload_byte_count;
+          if (length >= ctx.expected_len) {
+            // Once we've recieved the entire data packet, ask the DFU state
+            // machine to handle it.
+            dfu_protocol_handler(&ctx, 0, kUsbTransferFlagsDone, &length);
+            ctx.expected_len = 0;
+          }
+          spi_device_flash_status_clear();
+        }
+      } break;
+
+      case kSpiDeviceOpcodeReset:
+        rstmgr_reboot();
+        break;
+      default:
+        dfu_transport_result(&ctx, kErrorUsbBadSetup);
+    }
+  }
+}
diff --git a/sw/device/silicon_creator/lib/rescue/rescue_usb.c b/sw/device/silicon_creator/lib/rescue/rescue_usb.c
new file mode 100644
index 0000000000000..e5150a378ff1c
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue_usb.c
@@ -0,0 +1,188 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/pinmux.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/usb.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/rescue/dfu.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+const uint32_t rescue_type = kRescueProtocolUsbDfu;
+
+static const usb_device_descriptor_t device_desc = {
+    .length = (uint8_t)sizeof(usb_device_descriptor_t),
+    .descriptor_type = kUsbDescTypeDevice,
+    .bcd_usb = 0x0200,
+    .device_class = 0,
+    .device_sub_class = 0,
+    .device_protocol = 0,
+    .max_packet_size_0 = 64,
+    .vendor = kUsbVendorGoogle,
+    .product = kUsbProuctRomExt,
+    .bcd_device = 0x100,
+    .imanufacturer = 1,
+    .iproduct = 2,
+    .iserial_number = 3,
+    .num_configurations = 1,
+};
+
+#define DFU_INTERFACE_DSCR(alt)                          \
+  USB_INTERFACE_DSCR(/*inum=*/1, /*alt=*/alt, /*nep=*/0, \
+                     /*class=*/kDfuDeviceClass,          \
+                     /*subclass=*/kDfuDeviceSubClass,    \
+                     /*protocol=*/kDfuDeviceProtocol, /*iint=*/4 + alt)
+
+static const uint8_t config_desc[] = {
+    USB_CFG_DSCR_HEAD(
+        /*total_len=*/USB_CFG_DSCR_LEN + 6 * USB_INTERFACE_DSCR_LEN + 9,
+        /*nint=*/1),
+    DFU_INTERFACE_DSCR(0),
+    DFU_INTERFACE_DSCR(1),
+    DFU_INTERFACE_DSCR(2),
+    DFU_INTERFACE_DSCR(3),
+    DFU_INTERFACE_DSCR(4),
+    DFU_INTERFACE_DSCR(5),
+
+    /* DFU Functional Descriptor */
+    /*bLength=*/kDfuFuncDescLen,
+    /*bDescriptorType=*/kDfuFuncDescType,
+    /*bmAttributes=*/kDfuFuncAttrCanDnLoad | kDfuFuncAttrCanUpLoad |
+        kDfuFuncAttrManifestTolerant,
+    /*wDetachTimeout*/ (uint8_t)kDfuFuncDetachTimeout,
+    (uint8_t)(kDfuFuncDetachTimeout >> 8),
+    /*wTransferSize*/ (uint8_t)kDfuTransferSize,
+    (uint8_t)(kDfuTransferSize >> 8),
+    /*bcdDFUVersion*/ kDfuMajorVersion,
+    kDfuMinorVersion,
+};
+
+static const char lang_id[] = {
+    /* bLength=*/4,
+    /* bDescriptorType=*/3,
+    /* bString=*/0x09,
+    0x04,
+};
+
+// clang-format off
+static const char str_vendor[] = { USB_STRING_DSCR('G','o','o','g','l','e'), };
+static const char str_opentitan[] = { USB_STRING_DSCR('O','p','e','n','T','i','t','a','n'), };
+static const char str_resq[] = { USB_STRING_DSCR('R','e','s','c','u','e',' ','S','l','o','t','A')};
+static const char str_resb[] = { USB_STRING_DSCR('R','e','s','c','u','e',' ','S','l','o','t','B')};
+static const char str_otid[] = { USB_STRING_DSCR('D','e','v','i','c','e','I','D') };
+static const char str_blog[] = { USB_STRING_DSCR('B','o','o','t','L','o','g') };
+static const char str_bsvc[] = { USB_STRING_DSCR('B','o','o','t','S','e','r','v','i','c','e','s') };
+static const char str_ownr[] = { USB_STRING_DSCR('O','w','n','e','r','s','h','i','p') };
+
+// Located in RAM so we can fill in the OpenTitan device ID.
+static char str_serialnumber[2 + 4 + 32];
+
+static const char *string_desc[] = {
+    lang_id,
+    str_vendor,
+    str_opentitan,
+    str_serialnumber,
+    str_resq,
+    str_resb,
+    str_otid,
+    str_blog,
+    str_bsvc,
+    str_ownr,
+    NULL,
+};
+// clang-format on
+
+// TODO: make sure we report this in the proper order.
+static void set_serialnumber(void) {
+  lifecycle_device_id_t dev;
+  lifecycle_device_id_get(&dev);
+  const char hex[] = "0123456789ABCDEF";
+
+  char *sn = str_serialnumber;
+  // Length: descriptor header (2) + 2 * (len("0x") + len(64-bit integer)).
+  *sn++ = 2 + 4 + 32;
+  // Descriptor type: 3 (string descriptor).
+  *sn++ = 3;
+  // Leading "0x".
+  *sn++ = '0';
+  *sn++ = 0;
+  *sn++ = 'x';
+  *sn++ = 0;
+  // The device identification number, printed in hex as a uint64_t.
+  for (size_t w = 2; w > 0; --w) {
+    uint8_t byte = (uint8_t)(dev.device_id[w] >> 24);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 16);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 8);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+    byte = (uint8_t)(dev.device_id[w] >> 0);
+    *sn++ = hex[byte >> 4];
+    *sn++ = 0;
+    *sn++ = hex[byte & 15];
+    *sn++ = 0;
+  }
+}
+
+void dfu_transport_data(dfu_ctx_t *ctx, usb_dir_t dir, void *data, size_t len,
+                        usb_transfer_flags_t flags) {
+  OT_DISCARD(ctx);
+  usb_ep_transfer((uint8_t)dir | 0, data, len, flags);
+}
+
+rom_error_t dfu_transport_setupdata(dfu_ctx_t *ctx, usb_setup_data_t *setup) {
+  return usb_control_setupdata(&ctx->ep0, setup);
+}
+
+void dfu_transport_result(dfu_ctx_t *ctx, rom_error_t result) {
+  OT_DISCARD(ctx);
+  if (result != kErrorOk) {
+    usb_ep_stall(0, true);
+  }
+}
+
+rom_error_t rescue_protocol(boot_data_t *bootdata, boot_log_t *boot_log,
+                            const owner_rescue_config_t *config) {
+  set_serialnumber();
+  dfu_ctx_t ctx = {
+      .ep0 =
+          {
+              .device_desc = &device_desc,
+              .config_desc = config_desc,
+              .string_desc = string_desc,
+          },
+      .dfu_state = kDfuStateIdle,
+      .dfu_error = kDfuErrOk,
+  };
+  dbg_printf("USB-DFU rescue ready\r\n");
+  rescue_state_init(&ctx.state, bootdata, boot_log, config);
+  pinmux_init_usb();
+  usb_init();
+  usb_ep_init(0, kUsbEpTypeControl, 0x40, dfu_protocol_handler, &ctx);
+  usb_enable(true);
+  while (true) {
+    RETURN_IF_ERROR(rescue_inactivity(&ctx.state));
+    usb_poll();
+  }
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/lib/rescue/rescue_xmodem.c b/sw/device/silicon_creator/lib/rescue/rescue_xmodem.c
new file mode 100644
index 0000000000000..8b2c127fd288a
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/rescue_xmodem.c
@@ -0,0 +1,163 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/uart.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+#include "sw/device/silicon_creator/lib/rescue/xmodem.h"
+
+const uint32_t rescue_type = kRescueProtocolXmodem;
+
+// All of the xmodem functions accept an opaque iohandle pointer.
+// The iohandle is used to facilitate unit tests and doesn't have
+// any function in real firmware.
+#define iohandle NULL
+
+static void change_speed(void) {
+  dbg_printf("ok: waiting for baudrate\r\n");
+  uint32_t speed = 0;
+  OT_DISCARD(uart_read((uint8_t *)&speed, sizeof(speed), 10000));
+  uint32_t nco;
+  switch (speed) {
+    case kRescueBaud115K:
+      nco = kUartBaud115K;
+      break;
+    case kRescueBaud230K:
+      nco = kUartBaud230K;
+      break;
+    case kRescueBaud460K:
+      nco = kUartBaud460K;
+      break;
+    case kRescueBaud921K:
+      nco = kUartBaud921K;
+      break;
+    case kRescueBaud1M33:
+      nco = kUartBaud1M33;
+      break;
+    case kRescueBaud1M50:
+      nco = kUartBaud1M50;
+      break;
+    default:
+      nco = 0;
+  }
+  if (nco) {
+    dbg_printf("ok: new baudrate %C\r\n", speed);
+    uart_init(nco);
+    uart_enable_receiver();
+  } else {
+    dbg_printf("error: unsupported baudrate %C\r\n", speed);
+  }
+}
+
+static rom_error_t validate_mode(uint32_t mode, rescue_state_t *state) {
+  if (mode == kRescueModeBaud) {
+    change_speed();
+    return kErrorOk;
+  }
+  return rescue_validate_mode(mode, state);
+}
+
+static rom_error_t handle_send_modes(rescue_state_t *state) {
+  rom_error_t error = rescue_send_handler(state);
+  if (error == kErrorRescueSendStart && state->staged_len > 0) {
+    error = xmodem_send(iohandle, state->data, state->staged_len);
+    state->staged_len = 0;
+    validate_mode(state->default_mode, state);
+  }
+  return error;
+}
+
+static rom_error_t handle_recv_modes(rescue_state_t *state) {
+  rom_error_t error = rescue_recv_handler(state);
+  if (error == kErrorRescueImageTooBig || error == kErrorRescueBadMode) {
+    xmodem_cancel(iohandle);
+  }
+  return error;
+}
+
+static rom_error_t protocol(rescue_state_t *state) {
+  rom_error_t result;
+  size_t rxlen;
+  uint8_t command;
+  uint32_t next_mode = 0;
+
+  validate_mode(state->default_mode, state);
+
+  xmodem_recv_start(iohandle);
+  while (true) {
+    HARDENED_RETURN_IF_ERROR(handle_send_modes(state));
+    result = xmodem_recv_frame(
+        iohandle, state->frame, state->data + state->offset,
+        sizeof(state->data) - state->offset, &rxlen, &command);
+
+    HARDENED_RETURN_IF_ERROR(rescue_inactivity(state));
+    if (state->frame == 1 && result == kErrorXModemTimeoutStart) {
+      if (state->mode != kRescueModeNoOp) {
+        xmodem_recv_start(iohandle);
+      }
+      continue;
+    }
+
+    switch (result) {
+      case kErrorOk:
+        // Packet ok. Cancel the inactivity deadline.
+        state->inactivity_deadline = 0;
+        state->offset += rxlen;
+        HARDENED_RETURN_IF_ERROR(handle_recv_modes(state));
+        xmodem_ack(iohandle, true);
+        break;
+      case kErrorXModemEndOfFile:
+        if (state->offset % 2048 != 0) {
+          // If there is unhandled residue, extend out to a full block and
+          // then handle it.
+          while (state->offset % 2048 != 0) {
+            state->data[state->offset++] = 0xFF;
+          }
+          HARDENED_RETURN_IF_ERROR(handle_recv_modes(state));
+        }
+        xmodem_ack(iohandle, true);
+        state->frame = 1;
+        state->offset = 0;
+        state->flash_offset = 0;
+        continue;
+      case kErrorXModemCrc:
+        xmodem_ack(iohandle, false);
+        continue;
+      case kErrorXModemCancel:
+        return result;
+      case kErrorXModemUnknown:
+        if (state->frame == 1) {
+          if (command == '\r') {
+            // Mode change request.  Cancel the inactivity deadline.
+            state->inactivity_deadline = 0;
+            validate_mode(next_mode, state);
+            next_mode = 0;
+          } else {
+            next_mode = (next_mode << 8) | command;
+          }
+          continue;
+        }
+        OT_FALLTHROUGH_INTENDED;
+      default:
+        return result;
+    }
+    state->frame += 1;
+  }
+}
+
+rom_error_t rescue_protocol(boot_data_t *bootdata, boot_log_t *boot_log,
+                            const owner_rescue_config_t *config) {
+  rescue_state_t rescue_state;
+  rescue_state_init(&rescue_state, bootdata, boot_log, config);
+  uart_enable_receiver();
+  rom_error_t result = protocol(&rescue_state);
+  if (result == kErrorRescueReboot) {
+    rstmgr_reboot();
+  }
+  return result;
+}
diff --git a/sw/device/silicon_creator/lib/rescue/sfdp.c b/sw/device/silicon_creator/lib/rescue/sfdp.c
new file mode 100644
index 0000000000000..2d9ae0824689e
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/sfdp.c
@@ -0,0 +1,233 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/rescue/sfdp.h"
+
+#include "sw/device/silicon_creator/lib/drivers/spi_device.h"
+#include "sw/device/silicon_creator/lib/drivers/spi_device_bfpt.h"
+
+enum {
+  /**
+   * Rescue Flash size in bits.  The rescue implementation exposes
+   * 4K of address space: 2K for data transfers and 1K of mailbox (plus
+   * another 1K to be a power of 2).
+   */
+  kFlashBitCount = 1u << (kRescueDensity + 3),
+  /**
+   * 32-bit SFDP signature that indicates the presence of a SFDP table
+   * (JESD216A 6.2.1).
+   */
+  kSfdpSignature = 0x50444653,
+  /**
+   * Number of parameter headers in the SFDP data structure (JESD216A 6.2.2).
+   *
+   * This number is zero-based. The SPI-DFU implementation has 2 parameter
+   * headers: one for the Basic Flash Parameters Table (BFPT) and one for
+   * the proprietary SDFU extension table.
+   */
+  kSfdpParamCount = 1,
+  /**
+   * SFDP major revision number (JESD216A 6.2.2).
+   */
+  kSfdpMajorRevision = 0x01,
+  /**
+   * SFDP minor revision number (JESD216A 6.2.2).
+   */
+  kSfdpMinorRevision = 0x05,
+  /**
+   * Unused value of header word 2 [31:24] (JESD216A 6.2.3).
+   */
+  kSfdpUnused = 0xff,
+  /**
+   * BFPT major revision number (JESD216A 6.4.1).
+   */
+  kBfptMajorRevision = 0x01,
+  /**
+   * BFPT minor revision number (JESD216A 6.4.1).
+   */
+  kBfptMinorRevision = 0x00,
+  /**
+   * LSB of BFPT's parameter ID (JESD216A 6.4.1).
+   */
+  kBfptParamIdLsb = 0x00,
+  /**
+   * MSB of BFPT's parameter ID (JESD216A 6.4.2).
+   */
+  kBfptParamIdMsb = 0xff,
+  /**
+   * Offset of the Basic Flash Parameter Table (BFPT) in the SFDP table.
+   */
+  kBfptTablePointer = offsetof(spi_device_sfdp_table_t, bfpt),
+  /**
+   * Value used for BFPT fields that are not supported.
+   *
+   * Note: A handful of BFPT fields, e.g. Msb of the 14th word of BFPT, use 1
+   * instead. Such fields should be defined according to JESD216A instead of
+   * using this value.
+   */
+  kBfptNotSupported = 0,
+};
+
+static_assert(kBfptTablePointer % sizeof(uint32_t) == 0,
+              "BFPT must be word-aligned");
+
+// Note: Words below are numbered starting from 1 to match JESD216A. Some fields
+// that are not supported by OpenTitan are merged for the sake of conciseness.
+// Unused/reserved fields that should be set to all 1s are ommitted due to the
+// definition of `BFPT_FIELD_VALUE()` above. See JESD216A for more details.
+
+// clang-format off
+/**
+ * BFPT 1st Word
+ * -------------
+ * [31:23]: Unused
+ * [22:19]: (1S-1S-4S) (1S-4S-4S) (1S-2S-2S) DTR Clock (not supported: 0x0)
+ * [18:17]: Address bytes (3-byte only addressing: 0)
+ * [16:16]: (1S-1S-2S) (not supported: 0x0)
+ * [15: 8]: 4 KiB erase instruction (0x20)
+ * [ 7: 5]: Unused
+ * [ 4: 4]: Write enable instruction (use 0x06 for WREN: 0x1)
+ * [ 3: 3]: Volatile block protect bits (solely volatile: 0x1)
+ * [ 2: 2]: Write granularity (buffer >= 64 B: 0x1)
+ * [ 1: 0]: Block/sector erase sizes (uniform 4 KiB erase: 0x1)
+ */
+#define BFPT_WORD_1(X) \
+  X(22, 19, kBfptNotSupported) & \
+  X(18, 17, 0x0) & \
+  X(16, 16, kBfptNotSupported) & \
+  X(15,  8, kSpiDeviceOpcodeSectorErase) & \
+  X( 4,  4, 0x1) & \
+  X( 3,  3, 0x1) & \
+  X( 2,  2, 0x1) & \
+  X( 1,  0, 0x1)
+
+/**
+ * BFPT 2nd Word
+ * -------------
+ * [31:31]: Density greater than 2 Gib (0x0)
+ * [30: 0]: Flash memory density in bits, zero-based.
+ */
+#define BFPT_WORD_2(X) \
+  X(31, 31, 0) & \
+  X(30,  0, kFlashBitCount - 1)
+
+/**
+ * BFPT 3rd Word
+ * -------------
+ * [31: 0]: Fast read (1S-4S-4S) (1S-1S-4S) (not supported, 0x0)
+ */
+#define BFPT_WORD_3(X) \
+  X(31,  0, kBfptNotSupported)
+
+/**
+ * BFPT 4th Word
+ * -------------
+ * [31: 0]: Fast read (1S-1S-2S) (1S-2S-2S) (not supported, 0x0)
+ */
+#define BFPT_WORD_4(X) \
+  X(31,  0, kBfptNotSupported)
+
+/**
+ * BFPT 5th Word
+ * -------------
+ * [31: 5]: Reserved
+ * [ 4: 4]: Fast read (4S-4S-4S) support (not supported, 0x0)
+ * [ 3: 1]: Reserved
+ * [ 0: 0]: Fast read (2S-2S-2S) support (not supported, 0x0)
+ */
+#define BFPT_WORD_5(X) \
+  X( 4,  4, kBfptNotSupported) & \
+  X( 0,  0, kBfptNotSupported)
+
+/**
+ * BFPT 6th Word
+ * -------------
+ * [31:16]: Fast read (2S-2S-2S) (not supported, 0x0)
+ * [15: 0]: Reserved
+ */
+#define BFPT_WORD_6(X) \
+  X(31, 16, kBfptNotSupported)
+
+/**
+ * BFPT 7th Word
+ * -------------
+ * [31:16]: Fast read (4S-4S-4S) (not supported, 0x0)
+ * [15: 0]: Reserved
+ */
+#define BFPT_WORD_7(X) \
+  X(31, 16, kBfptNotSupported)
+
+/**
+ * BFPT 8th Word
+ * -------------
+ * [31:16]: Erase type 2 instruction and size (not supported, 0x0)
+ * [15: 8]: Erase type 1 instruction (0x20)
+ * [ 7: 0]: Erase type 1 size (4 KiB, 2^N bytes, N = 0x0c)
+ */
+#define BFPT_WORD_8(X) \
+  X(31, 16, kBfptNotSupported) & \
+  X(15,  8, kSpiDeviceOpcodeSectorErase) & \
+  X( 7,  0, 0x0c)
+
+/**
+ * BFPT 9th Word
+ * -------------
+ * [31: 0]: Erase type 4 and 3 (not supported, 0x0)
+ */
+#define BFPT_WORD_9(X) \
+  X(31,  0, kBfptNotSupported)
+// clang-format on
+
+const rescue_sfdp_table_t kRescueSfdpTable = {
+    .header =
+        {
+            .signature = kSfdpSignature,
+            .minor_revision = kSfdpMinorRevision,
+            .major_revision = kSfdpMajorRevision,
+            .param_count = kSfdpParamCount,
+            .access_protocol = kSfdpUnused,
+        },
+    .phdr =
+        {
+            {
+                .param_id_lsb = kBfptParamIdLsb,
+                .minor_revision = kBfptMinorRevision,
+                .major_revision = kBfptMajorRevision,
+                .table_word_count = kRescueBfptSizeInWords,
+                .table_pointer = {offsetof(rescue_sfdp_table_t, bfpt)},
+                .param_id_msb = kBfptParamIdMsb,
+            },
+            {
+                .param_id_lsb = 0xEF,  // lowRISC
+                .minor_revision = 0,
+                .major_revision = 1,
+                .table_word_count = sizeof(sdfu_table_t) / sizeof(uint32_t),
+                .table_pointer = {offsetof(rescue_sfdp_table_t, sdfu)},
+                .param_id_msb =
+                    12,  // page_number-1; The lowRISC JEDEC ID is on page 13.
+            },
+        },
+    .bfpt =
+        {
+            BFPT_WORD_1(BFPT_FIELD_VALUE),
+            BFPT_WORD_2(BFPT_FIELD_VALUE),
+            BFPT_WORD_3(BFPT_FIELD_VALUE),
+            BFPT_WORD_4(BFPT_FIELD_VALUE),
+            BFPT_WORD_5(BFPT_FIELD_VALUE),
+            BFPT_WORD_6(BFPT_FIELD_VALUE),
+            BFPT_WORD_7(BFPT_FIELD_VALUE),
+            BFPT_WORD_8(BFPT_FIELD_VALUE),
+            BFPT_WORD_9(BFPT_FIELD_VALUE),
+        },
+    .sdfu =
+        {
+            .tag = kRescueSDFU,
+            .length = sizeof(sdfu_table_t),
+            .major = 1,
+            .minor = 0,
+            .mailbox_address = 0x800,
+            .mailbox_size = 0x400,
+            .dfu_size = 0x800,
+        },
+};
diff --git a/sw/device/silicon_creator/lib/rescue/sfdp.h b/sw/device/silicon_creator/lib/rescue/sfdp.h
new file mode 100644
index 0000000000000..ccd5a6e6f7059
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/sfdp.h
@@ -0,0 +1,82 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_SFDP_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_SFDP_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/spi_device.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+enum {
+  /**
+   * Rescue flash density: log2(4K bytes).  The rescue implementation exposes
+   * 4K of address space: 2K for data transfers and 1K of mailbox (plus another
+   * 1K to be a power of 2).
+   */
+  kRescueDensity = 12,
+  /**
+   * Size of rescue's BFPT in words.
+   */
+  kRescueBfptSizeInWords = 9,
+  /**
+   * The SDFU tag: ASCII `SDFU`.
+   */
+  kRescueSDFU = 0x55464453,
+};
+
+/**
+ * The SDFU extension describes SPI-DFU in the SFDP table.
+ */
+typedef struct sdfu_table {
+  /** tag: `SDFU`. */
+  uint32_t tag;
+  /** length: 16 bytes. */
+  uint16_t length;
+  /** Major version. */
+  uint8_t major;
+  /** Minor version. */
+  uint8_t minor;
+  /** The SDFU mailbox address. */
+  uint32_t mailbox_address;
+  /** The SDFU mailbox size. */
+  uint16_t mailbox_size;
+  /** The DFU transfer size. */
+  uint16_t dfu_size;
+} sdfu_table_t;
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, tag, 0);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, length, 4);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, major, 6);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, minor, 7);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, mailbox_address, 8);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, mailbox_size, 12);
+OT_ASSERT_MEMBER_OFFSET(sdfu_table_t, dfu_size, 14);
+OT_ASSERT_SIZE(sdfu_table_t, 16);
+
+/**
+ * The Rescue SFDP table describes the flash interface for rescue mode.
+ */
+typedef struct rescue_sfdp_table {
+  spi_device_sfdp_header_t header;
+  spi_device_param_header_t phdr[2];
+  uint32_t bfpt[kRescueBfptSizeInWords];
+  sdfu_table_t sdfu;
+} rescue_sfdp_table_t;
+OT_ASSERT_MEMBER_OFFSET(rescue_sfdp_table_t, header, 0);
+OT_ASSERT_MEMBER_OFFSET(rescue_sfdp_table_t, phdr, 8);
+OT_ASSERT_MEMBER_OFFSET(rescue_sfdp_table_t, bfpt, 24);
+OT_ASSERT_MEMBER_OFFSET(rescue_sfdp_table_t, sdfu, 60);
+OT_ASSERT_SIZE(rescue_sfdp_table_t, 76);
+
+extern const rescue_sfdp_table_t kRescueSfdpTable;
+#ifdef __cplusplus
+}
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_SFDP_H_
diff --git a/sw/device/silicon_creator/lib/xmodem.c b/sw/device/silicon_creator/lib/rescue/xmodem.c
similarity index 92%
rename from sw/device/silicon_creator/lib/xmodem.c
rename to sw/device/silicon_creator/lib/rescue/xmodem.c
index cb65dc34cc3a1..b4f267b1cb3bc 100644
--- a/sw/device/silicon_creator/lib/xmodem.c
+++ b/sw/device/silicon_creator/lib/rescue/xmodem.c
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/silicon_creator/lib/xmodem.h"
+#include "sw/device/silicon_creator/lib/rescue/xmodem.h"
 
 #ifndef XMODEM_TESTLIB
 #include "sw/device/silicon_creator/lib/drivers/uart.h"
 #else
-#include "sw/device/silicon_creator/lib/xmodem_testlib.h"
+#include "sw/device/silicon_creator/lib/rescue/xmodem_testlib.h"
 #endif
 
 /**
@@ -83,10 +83,10 @@ void xmodem_ack(void *iohandle, bool ack) {
 }
 
 rom_error_t xmodem_recv_frame(void *iohandle, uint32_t frame, uint8_t *data,
-                              size_t *rxlen, uint8_t *unknown_rx) {
+                              size_t len_available, size_t *rxlen,
+                              uint8_t *unknown_rx) {
   uint8_t ch;
-  size_t n = xmodem_read(iohandle, &ch, sizeof(ch),
-                         frame == 1 ? kXModemLongTimeout : kXModemShortTimeout);
+  size_t n = xmodem_read(iohandle, &ch, sizeof(ch), kXModemLongTimeout);
   if (n == 0) {
     return kErrorXModemTimeoutStart;
   } else if (ch == kXModemStx || ch == kXModemSoh) {
@@ -94,6 +94,10 @@ rom_error_t xmodem_recv_frame(void *iohandle, uint32_t frame, uint8_t *data,
     size_t len = ch == kXModemStx ? 1024 : 128;
     uint8_t pkt[2];
 
+    if (len > len_available) {
+      return kErrorXModemBadLength;
+    }
+
     // Get the frame number and its inverse.
     n = xmodem_read(iohandle, pkt, sizeof(pkt), kXModemShortTimeout);
     if (n != sizeof(pkt)) {
@@ -117,6 +121,7 @@ rom_error_t xmodem_recv_frame(void *iohandle, uint32_t frame, uint8_t *data,
       return kErrorXModemTimeoutCrc;
     }
     if (cancel) {
+      xmodem_cancel(iohandle);
       return kErrorXModemCancel;
     }
 
@@ -166,6 +171,11 @@ static rom_error_t xmodem_send_start(void *iohandle, uint32_t retries) {
   return kErrorXModemTimeoutStart;
 }
 
+void xmodem_cancel(void *iohandle) {
+  xmodem_putchar(iohandle, kXModemCancel);
+  xmodem_putchar(iohandle, kXModemCancel);
+}
+
 static rom_error_t xmodem_send_finish(void *iohandle) {
   xmodem_putchar(iohandle, kXModemEof);
   uint8_t ch;
diff --git a/sw/device/silicon_creator/lib/rescue/xmodem.h b/sw/device/silicon_creator/lib/rescue/xmodem.h
new file mode 100644
index 0000000000000..f65429362398f
--- /dev/null
+++ b/sw/device/silicon_creator/lib/rescue/xmodem.h
@@ -0,0 +1,59 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+/**
+ * Send the Xmodem-CRC start sequence.
+ *
+ * @param iohandle An opaque user point associated with the io device.
+ */
+void xmodem_recv_start(void *iohandle);
+
+/**
+ * Acknowledge an Xmodem frame.
+ *
+ * @param ack Whether to ACK (true) or NAK (false).
+ */
+void xmodem_ack(void *iohandle, bool ack);
+
+/**
+ * Send an Xmodem cancel sequence.
+ */
+void xmodem_cancel(void *iohandle);
+
+/**
+ * Receive a frame using Xmodem-CRC
+ *
+ * @param iohandle An opaque user point associated with the io device.
+ * @param frame The frame number expected (start at 1).
+ * @param data Buffer to receive the data into.
+ * @param len_available Available space in the data buffer.
+ * @param rxlen The length of data recieved.
+ * @param unknown_rx The byte received when the error is kErrorXmodemUnknown.
+ * @return Error value.
+ */
+rom_error_t xmodem_recv_frame(void *iohandle, uint32_t frame, uint8_t *data,
+                              size_t len_available, size_t *rxlen,
+                              uint8_t *unknown_rx);
+
+/**
+ * Send data using Xmodem-CRC.
+ *
+ * Sends a buffer of data using Xmodem-CRC.
+ *
+ * @param iohandle An opaque user point associated with the io device.
+ * @param data buffer to send.
+ * @param len length of the buffer.
+ * @return Error value.
+ */
+rom_error_t xmodem_send(void *iohandle, const void *data, size_t len);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_H_
diff --git a/sw/device/silicon_creator/lib/xmodem_testlib.h b/sw/device/silicon_creator/lib/rescue/xmodem_testlib.h
similarity index 75%
rename from sw/device/silicon_creator/lib/xmodem_testlib.h
rename to sw/device/silicon_creator/lib/rescue/xmodem_testlib.h
index 16873e0b52216..ea323493e9dfb 100644
--- a/sw/device/silicon_creator/lib/xmodem_testlib.h
+++ b/sw/device/silicon_creator/lib/rescue/xmodem_testlib.h
@@ -2,9 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_TESTLIB_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_TESTLIB_H_
-#include "sw/device/silicon_creator/lib/xmodem.h"
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_TESTLIB_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_TESTLIB_H_
+#include "sw/device/silicon_creator/lib/rescue/xmodem.h"
 
 /**
  * Read data from the input within the specified timeout.
@@ -27,4 +27,4 @@ size_t xmodem_read(void *iohandle, uint8_t *data, size_t len,
  */
 void xmodem_write(void *iohandle, const uint8_t *data, size_t len);
 
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_TESTLIB_H_
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_RESCUE_XMODEM_TESTLIB_H_
diff --git a/sw/device/silicon_creator/lib/shutdown.c b/sw/device/silicon_creator/lib/shutdown.c
index 8e4000175e789..716d7fab2c674 100644
--- a/sw/device/silicon_creator/lib/shutdown.c
+++ b/sw/device/silicon_creator/lib/shutdown.c
@@ -15,7 +15,7 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/multibits.h"
 #include "sw/device/lib/base/stdasm.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/drivers/alert.h"
 #include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
 #include "sw/device/silicon_creator/lib/drivers/otp.h"
@@ -416,7 +416,7 @@ SHUTDOWN_FUNC(NO_MODIFIERS, shutdown_report_error(rom_error_t reason)) {
   shutdown_print(kShutdownLogPrefixBootFault, redacted_error);
   shutdown_print(kShutdownLogPrefixLifecycle, raw_state);
   shutdown_print(kShutdownLogPrefixVersion,
-                 kChipInfo.scm_revision.scm_revision_high);
+                 kBuildInfo.scm_revision.scm_revision_high);
 }
 
 SHUTDOWN_FUNC(NO_MODIFIERS, shutdown_software_escalate(void)) {
diff --git a/sw/device/silicon_creator/lib/sigverify/BUILD b/sw/device/silicon_creator/lib/sigverify/BUILD
index 991c2182f0678..1648a12bb1c08 100644
--- a/sw/device/silicon_creator/lib/sigverify/BUILD
+++ b/sw/device/silicon_creator/lib/sigverify/BUILD
@@ -13,6 +13,7 @@ load(
     "EARLGREY_TEST_ENVS",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
     "verilator_params",
 )
 load(
@@ -120,6 +121,9 @@ opentitan_test(
     fpga = fpga_params(
         timeout = "long",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         ":mod_exp_ibex",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -174,11 +178,9 @@ cc_library(
 opentitan_test(
     name = "rsa_verify_functest",
     srcs = ["rsa_verify_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
             "//hw/top_earlgrey:fpga_cw310_test_rom": None,
         },
     ),
@@ -241,10 +243,6 @@ cc_library(
 cc_library(
     name = "flash_exec",
     hdrs = ["flash_exec.h"],
-    deps = [
-        ":rsa_verify",
-        ":spx_verify",
-    ],
 )
 
 cc_test(
@@ -252,6 +250,8 @@ cc_test(
     srcs = ["flash_exec_unittest.cc"],
     deps = [
         ":flash_exec",
+        ":rsa_verify",
+        ":spx_verify",
         "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
         "//sw/device/silicon_creator/testing:rom_test",
         "@googletest//:gtest_main",
@@ -263,6 +263,7 @@ cc_library(
     hdrs = ["sigverify.h"],
     deps = [
         ":ecdsa_p256_verify",
+        ":flash_exec",
         ":rsa_verify",
         ":spx_verify",
         ":usage_constraints",
@@ -282,14 +283,7 @@ cc_test(
 opentitan_test(
     name = "sigverify_dynamic_functest_hardcoded",
     srcs = ["sigverify_dynamic_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "long",
         tags = [
@@ -317,6 +311,12 @@ opentitan_test(
     fpga = fpga_params(
         timeout = "long",
     ),
+    qemu = qemu_params(
+        timeout = "long",
+    ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         ":sigverify",
         "//sw/device/lib/testing/test_framework:ottf_main",
diff --git a/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.c b/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.c
index 37a29f7ca4f71..38a14e9238736 100644
--- a/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.c
+++ b/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.c
@@ -118,13 +118,19 @@ static rom_error_t sigverify_encoded_message_check(
   return kErrorSigverifyBadEcdsaSignature;
 }
 
-rom_error_t sigverify_ecdsa_p256_verify(const ecdsa_p256_signature_t *signature,
-                                        const ecdsa_p256_public_key_t *key,
-                                        const hmac_digest_t *act_digest,
+rom_error_t sigverify_ecdsa_p256_start(const ecdsa_p256_signature_t *signature,
+                                       const ecdsa_p256_public_key_t *key,
+                                       const hmac_digest_t *act_digest) {
+  return otbn_boot_sigverify_start(key, signature, act_digest);
+}
+
+rom_error_t sigverify_ecdsa_p256_finish(const ecdsa_p256_signature_t *signature,
                                         uint32_t *flash_exec) {
+  if (signature == NULL) {
+    return kErrorSigverifyEcdsaNotFound;
+  }
   ecdsa_p256_signature_t recovered_r;
-  rom_error_t error =
-      otbn_boot_sigverify(key, signature, act_digest, (uint32_t *)&recovered_r);
+  rom_error_t error = otbn_boot_sigverify_finish((uint32_t *)&recovered_r);
   if (launder32(error) != kErrorOk) {
     *flash_exec ^= UINT32_MAX;
     return error;
@@ -133,5 +139,14 @@ rom_error_t sigverify_ecdsa_p256_verify(const ecdsa_p256_signature_t *signature,
   return sigverify_encoded_message_check(&recovered_r, signature, flash_exec);
 }
 
+rom_error_t sigverify_ecdsa_p256_verify(const ecdsa_p256_signature_t *signature,
+                                        const ecdsa_p256_public_key_t *key,
+                                        const hmac_digest_t *act_digest,
+                                        uint32_t *flash_exec) {
+  HARDENED_RETURN_IF_ERROR(
+      sigverify_ecdsa_p256_start(signature, key, act_digest));
+  return sigverify_ecdsa_p256_finish(signature, flash_exec);
+}
+
 // Extern declarations for the inline functions in the header.
 extern uint32_t sigverify_ecdsa_p256_success_to_ok(uint32_t v);
diff --git a/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.h b/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.h
index 3e2c6a66299e8..163c3cb3c413e 100644
--- a/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.h
+++ b/sw/device/silicon_creator/lib/sigverify/ecdsa_p256_verify.h
@@ -39,6 +39,30 @@ rom_error_t sigverify_ecdsa_p256_verify(const ecdsa_p256_signature_t *signature,
                                         const hmac_digest_t *act_digest,
                                         uint32_t *flash_exec);
 
+/**
+ * Starts an ECDSA-P256 signature verification.
+ *
+ * @param signature The signature to verify, little endian.
+ * @param key The public key to use for verification, little endian.
+ * @param act_digest The actual digest of the signed message.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t sigverify_ecdsa_p256_start(const ecdsa_p256_signature_t *signature,
+                                       const ecdsa_p256_public_key_t *key,
+                                       const hmac_digest_t *act_digest);
+
+/**
+ * Finishes an ECDSA-P256 signature verification.
+ *
+ * @param signature The signature to verify, little endian.
+ * @param[out] flash_exec The partial value to write to the flash_ctrl EXEC
+ * register.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t sigverify_ecdsa_p256_finish(const ecdsa_p256_signature_t *signature,
+                                        uint32_t *flash_exec);
 /**
  * Transforms `kSigverifyEcdsaSuccess` into `kErrorOk`.
  *
diff --git a/sw/device/silicon_creator/lib/sigverify/sigverify_tests/sigverify_cryptotest.c b/sw/device/silicon_creator/lib/sigverify/sigverify_tests/sigverify_cryptotest.c
index 77dccc9ad801c..70d0057a2fda1 100644
--- a/sw/device/silicon_creator/lib/sigverify/sigverify_tests/sigverify_cryptotest.c
+++ b/sw/device/silicon_creator/lib/sigverify/sigverify_tests/sigverify_cryptotest.c
@@ -18,7 +18,11 @@
 #include "sw/device/tests/crypto/cryptotest/json/commands.h"
 #include "sw/device/tests/crypto/cryptotest/json/ecdsa_commands.h"
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false, );
 
 bool ecdsa_p256_params_set(cryptotest_ecdsa_coordinate_t uj_qx,
                            cryptotest_ecdsa_coordinate_t uj_qy,
diff --git a/sw/device/silicon_creator/lib/sigverify/sphincsplus/test/BUILD b/sw/device/silicon_creator/lib/sigverify/sphincsplus/test/BUILD
index 0087afc8c2978..5e0e3c2f32226 100644
--- a/sw/device/silicon_creator/lib/sigverify/sphincsplus/test/BUILD
+++ b/sw/device/silicon_creator/lib/sigverify/sphincsplus/test/BUILD
@@ -107,14 +107,7 @@ autogen_cryptotest_header(
 opentitan_test(
     name = "verify_test_hardcoded",
     srcs = ["verify_test.c"],
-    # TODO(#22871): Remove "broken" tag once the tests are fixed.
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
     ),
diff --git a/sw/device/silicon_creator/lib/sigverify/sphincsplus/utils.c b/sw/device/silicon_creator/lib/sigverify/sphincsplus/utils.c
index ff28b63a2b350..79aaf6688708f 100644
--- a/sw/device/silicon_creator/lib/sigverify/sphincsplus/utils.c
+++ b/sw/device/silicon_creator/lib/sigverify/sphincsplus/utils.c
@@ -17,7 +17,18 @@
 uint64_t spx_utils_bytes_to_u64(const uint8_t *in, size_t inlen) {
   uint64_t retval = 0;
   for (size_t i = 0; i < inlen; i++) {
-    retval |= ((uint64_t)in[i]) << (8 * (inlen - 1 - i));
+    // Perform native shift on u32 first to avoid __ashldi3 polyfill.
+    //
+    // The following code is equivalent to:
+    //     retval |= ((uint64_t)in[i]) << (8 * (inlen - 1 - i));
+    //
+    // See also pull #11451.
+    size_t offset = 8 * (inlen - 1 - i);
+    if (offset < 32) {
+      retval |= ((uint32_t)in[i]) << offset;
+    } else {
+      retval |= ((uint64_t)(((uint32_t)in[i]) << (offset - 32))) << 32;
+    }
   }
   return retval;
 }
diff --git a/sw/device/silicon_creator/lib/sigverify/spx_verify.c b/sw/device/silicon_creator/lib/sigverify/spx_verify.c
index 7f2bf616b2da5..2a28b9d0c10b0 100644
--- a/sw/device/silicon_creator/lib/sigverify/spx_verify.c
+++ b/sw/device/silicon_creator/lib/sigverify/spx_verify.c
@@ -70,10 +70,11 @@ static const uint32_t kSpxVerifyShares[kSigverifySpxRootNumWords] = {
  *
  * In our case, `ctx` is always the empty string, so the length is 0.
  */
-static const uint8_t kSpxVerifyPureDomainSep[] = {
+const uint8_t kSpxVerifyPureDomainSep[] = {
     0x00,
     0x00,
 };
+const size_t kSpxVerifyPureDomainSepSize = sizeof(kSpxVerifyPureDomainSep);
 
 /**
  * Domain-separation prefix for SPHINCS+ with SHA256 prehashing.
@@ -84,9 +85,11 @@ static const uint8_t kSpxVerifyPureDomainSep[] = {
  * In our case, `ctx` is always the empty string and PH (the pre-hashing
  * function) is always SHA256.
  */
-static const uint8_t kSpxVerifyPrehashDomainSep[] = {
-    0x01, 0x00, 0x06, 0x09, 0x60, 0x86, 0x48,
-    0x01, 0x65, 0x03, 0x04, 0x02, 0x01};
+const uint8_t kSpxVerifyPrehashDomainSep[] = {0x01, 0x00, 0x06, 0x09, 0x60,
+                                              0x86, 0x48, 0x01, 0x65, 0x03,
+                                              0x04, 0x02, 0x01};
+const size_t kSpxVerifyPrehashDomainSepSize =
+    sizeof(kSpxVerifyPrehashDomainSep);
 
 rom_error_t sigverify_spx_verify(
     const sigverify_spx_signature_t *signature, const sigverify_spx_key_t *key,
diff --git a/sw/device/silicon_creator/lib/sigverify/spx_verify.h b/sw/device/silicon_creator/lib/sigverify/spx_verify.h
index a5bf73487cd3b..b98308fdad66c 100644
--- a/sw/device/silicon_creator/lib/sigverify/spx_verify.h
+++ b/sw/device/silicon_creator/lib/sigverify/spx_verify.h
@@ -14,6 +14,11 @@
 extern "C" {
 #endif  // __cplusplus
 
+extern const uint8_t kSpxVerifyPureDomainSep[];
+extern const size_t kSpxVerifyPureDomainSepSize;
+extern const uint8_t kSpxVerifyPrehashDomainSep[];
+extern const size_t kSpxVerifyPrehashDomainSepSize;
+
 enum {
   /**
    * A non-trivial constant chosen such that `kSigverifySpxSuccess ^
diff --git a/sw/device/silicon_creator/lib/sigverify/spx_verify_functest.c b/sw/device/silicon_creator/lib/sigverify/spx_verify_functest.c
index af09a7ce30f69..a9a05800b7809 100644
--- a/sw/device/silicon_creator/lib/sigverify/spx_verify_functest.c
+++ b/sw/device/silicon_creator/lib/sigverify/spx_verify_functest.c
@@ -12,26 +12,72 @@
  *
  * ```
  * # Private key (not used, for reference only)
- * opentitantool spx key generate <OUTPUT_DIR> test_key
+ * opentitantool spx key generate --algorithm SHA2-128s-simple \
+ *     <OUTPUT_DIR> test_key
  * cat test_key.pem | tail -n +2 | head -n -1 | base64 -d | \
  *     hexdump -v -e '/4 "0x%08x, \n"'
+ *
  * # Public key
  * cat test_key.pub.pem | tail -n +2 | head -n -1 | base64 -d | \
  *     hexdump -v -e '/4 "0x%08x, \n"'
- * # Signature
+ *
+ * # Pure Signature
  * echo -n "test message" > test_message
- * opentitantool spx sign -o signature test_message test_key.pem
+ * opentitantool spx sign -o signature -d Pure test_message test_key.pem
+ * opentitantool spx verify --domain Pure \
+ *     test_key.pub.pem test_message signature
  * cat signature | hexdump -v -e '/4 "0x%08x, \n"'
+ *
+ * # Prehash Signature
+ * sha256sum test_message | cut -f 1 -d ' ' | xxd -r -p > test_message_hash
+ * cat test_message_hash | hexdump -v -e '/4 "0x%08x, \n"'
+ * opentitantool spx sign -o prehash_sig -d PreHashedSha256 \
+ *     test_message_hash test_key.pem
+ * opentitantool spx verify --domain PreHashedSha256 \
+ *     test_key.pub.pem test_message_hash prehash_sig
+ * cat prehash_sig | hexdump -v -e '/4 "0x%08x, \n"'
  * ```
  */
 static const char kMessage[] = "test message";
 static const size_t kMessageLen = sizeof(kMessage) - 1;
+static const hmac_digest_t kMessageDigest = {
+    .digest =
+        {
+            0x7b370a3f,
+            0x60a4a4a0,
+            0xf616b6ec,
+            0xd8e07c50,
+            0x04e7a3cf,
+            0xda4f5d02,
+            0xcac5d03e,
+            0x28874605,
+        },
+};
+
+/* Spx test private key
+ *
+ * ```
+ * -----BEGIN RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+ * FV07ookBsk1azkCinha5hbjHeXb8mDn30rPB0uMIkc3HyE71GCMRMS20Tu/tizqz
+ * Ezk1SA77ui4owpSBqTU6YA==
+ * -----END RAW:SLH_DSA_SHA2_128s PRIVATE KEY-----
+ * ```
+ */
 static const uint32_t kPrivKey[] = {
     0xf54ec8c7, 0x31112318, 0xef4eb42d, 0xb33a8bed, 0x48353913, 0x2ebafb0e,
     0x8194c228, 0x603a35a9, 0xa23b5d15, 0x4db20189, 0xa240ce5a, 0x85b9169e,
     0x7679c7b8, 0xf73998fc, 0xd2c1b3d2, 0xcd9108e3, 0xf54ec8c7, 0x31112318,
     0xef4eb42d, 0xb33a8bed, 0x48353913, 0x2ebafb0e, 0x8194c228, 0x603a35a9,
 };
+
+/* Spx test public key
+ *
+ * ```
+ * -----BEGIN RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+ * x8hO9RgjETEttE7v7Ys6sxM5NUgO+7ouKMKUgak1OmA=
+ * -----END RAW:SLH_DSA_SHA2_128s PUBLIC KEY-----
+ * ```
+ */
 static const sigverify_spx_key_t kPubKey = {
     .data =
         {
@@ -377,9 +423,343 @@ static sigverify_spx_signature_t kSignature = {
         0x84fe71ce, 0x0dfb31b8,
     }};
 
+static sigverify_spx_signature_t kPrehashSignature = {
+    .data = {
+        0x530812ab, 0x3ee09ed0, 0xd07ef523, 0x834ddb34, 0x8089b6cc, 0x616ba8f7,
+        0x8c98bf74, 0x6d3722a1, 0x04c12375, 0x75ced29f, 0xb0a8eb0b, 0xa4d2d0ca,
+        0x4b582b30, 0xeb67fbb0, 0xd07d7dae, 0x681142d8, 0x4670984c, 0x71c0700b,
+        0x122a1da2, 0xd9358218, 0x8b72c93d, 0x38b55303, 0x705f7ff4, 0x38b5293b,
+        0x237b7bf1, 0x3a1fa77b, 0x263a8677, 0x76c3a3a0, 0x8709c784, 0x4e4da0aa,
+        0x9daaf1df, 0x8a6d7124, 0x2fa94183, 0x2ebc5d16, 0xa7fd72a6, 0x0158dbe1,
+        0x7a1bb0f1, 0x94aae615, 0x1bd20c72, 0x659ebe37, 0x2cb7b381, 0x594561cd,
+        0x09997cf7, 0x1415ceb3, 0xc2b357eb, 0x6b23056c, 0x3a4fd41f, 0xd39a8856,
+        0x9ffeb5ee, 0xc1dce5b9, 0xd55f1c75, 0x9385ef62, 0x64eefeef, 0x7b926ebf,
+        0xd76535ae, 0xe0bd0c60, 0xa388dcac, 0xc0774313, 0xb1148813, 0xd8b2385a,
+        0xca86d803, 0xf22fa560, 0x2b7765b0, 0x4f0407d7, 0x94249ab9, 0xd9030317,
+        0xcef1f454, 0x9110ade3, 0xf0fbfe31, 0x912745e4, 0x2e2434c3, 0x560351c1,
+        0xf3290646, 0x77c0351e, 0x004116f4, 0x4fd78f99, 0x0af34d7b, 0xc3383ef9,
+        0x7076f31a, 0xf39983c1, 0x90ac3242, 0xeafaceb0, 0x51ed10ad, 0xe16097aa,
+        0x550bfd42, 0x8a1dd906, 0xd54b5cf5, 0x113eb72b, 0x853ce1e6, 0x5ca96db6,
+        0xca126093, 0x22933e1c, 0xbd609a02, 0xec48fbdf, 0x2f5c1092, 0x650e8d3f,
+        0xbd65f2c8, 0x0e2337cf, 0x7d4fb678, 0x9e65eeeb, 0xf7cac832, 0xb7c68836,
+        0x8d827427, 0xb8547a20, 0xfe202910, 0x8bafb6ca, 0xdfe8cfb1, 0xd872b26e,
+        0x5fd580d5, 0x46d6397b, 0x03eb37dc, 0x4909c910, 0x6d57a2cc, 0xe4e39e55,
+        0x23cb783d, 0x5d3d4b34, 0x2696b45c, 0x369ba679, 0x51571a95, 0x15362300,
+        0xcf0bbac1, 0x09d6d974, 0xb7f97056, 0xe5d269b6, 0x801c6a49, 0x3c983ae4,
+        0xae22138f, 0x0a140389, 0x16de9441, 0x35997a8e, 0x5372802a, 0xca835bd4,
+        0x394740a7, 0x3a508d41, 0x5add6c38, 0x5ffe3f7e, 0x8fcd0658, 0x5c010500,
+        0xdddf6746, 0x43b7a65d, 0x4dcdd08b, 0xdf2b50f8, 0x789e82f7, 0xa2ac97e3,
+        0x1f37bbf2, 0xd5c41783, 0x69f21529, 0x76813330, 0x4977da2c, 0xe416ffd1,
+        0x78afb11b, 0xe3408dea, 0x6f5c5386, 0x761688f9, 0x62e3b432, 0xea80503c,
+        0x9e4fca6e, 0x9598ac86, 0x69a0a4aa, 0xdfe3a666, 0xbda5f5cf, 0x9ad2d56e,
+        0xc3ae6e9f, 0xed572897, 0x8ea54344, 0xdb042fda, 0x58d83e8f, 0x9b1c70aa,
+        0x01316765, 0xae35291f, 0x5c9f8a2a, 0xce18f57e, 0xa7086734, 0xe4798305,
+        0x188dba45, 0x2bc9ee89, 0x80efca52, 0x2c54dcf2, 0xb9070d7e, 0xbadca953,
+        0x2f7ebc1b, 0xe8213a60, 0x963667f1, 0xbe676cb2, 0xdf4e9d9e, 0xccfb4e72,
+        0xfd4f15c3, 0xd16509d3, 0xd4802247, 0xc7014eaa, 0x04bb7f73, 0xed782359,
+        0x9d9db350, 0xb9f65814, 0xf9398143, 0x0559c9cf, 0x0f77cab8, 0x98f69203,
+        0x914fcddc, 0x800e63b9, 0xbd646cbb, 0xdb4c651e, 0xecd56603, 0xdf8c7d20,
+        0xfb752a45, 0x6d31ec70, 0x4ec7784c, 0x07c78d98, 0xbb9d173b, 0x29808630,
+        0xbdbac339, 0xc82704e7, 0x9f10ab7f, 0x2a3c5ddf, 0x4d5dcfc7, 0x39e9adec,
+        0x55bb1527, 0xa7008eef, 0xca32a148, 0x665360c2, 0xf0d42228, 0xbf197576,
+        0x8e8e5d3b, 0xec9494c5, 0xcb4d8cf1, 0x6c933639, 0x72688b45, 0xbc4fad9b,
+        0xfa75b2be, 0x29a3ccfe, 0x0a2211ac, 0x1dc9631a, 0x1452db83, 0x56ac950f,
+        0xfcc6a653, 0x617d1436, 0xa8e8e67f, 0x1edd1836, 0x8588c675, 0x65e664af,
+        0x9cf3779c, 0x5826b036, 0xc56d2263, 0xaff87561, 0xc5de842c, 0xb191ab34,
+        0xd1856aa9, 0xc76cf783, 0x16833b5d, 0xfb58ba88, 0xae00fb32, 0x7d02ad2a,
+        0x5f5c0daa, 0x46bb8a32, 0xd3145d45, 0x00cf1e2c, 0x331e3b58, 0xb8454ab0,
+        0xed4bb97d, 0x1d95e3d8, 0x9210ade3, 0xb7d487bd, 0x3bc5a8b0, 0xeaa3661d,
+        0xce5880c6, 0x5ebc87c6, 0xfa6a5e45, 0xf559bb8a, 0x2ccbcf90, 0x403f3b86,
+        0x8a327a7c, 0x743840b2, 0x0274809d, 0x1eef6e8a, 0xb8ad89f8, 0x9bb9d5cb,
+        0x0535b65f, 0x47dc70fb, 0x854005ba, 0x6b26f9b6, 0x31ad4537, 0xdfd6749f,
+        0x092b7622, 0x132d61cc, 0x8d5ae13f, 0x7f0ac966, 0x920434b4, 0xf7b612a2,
+        0x2210d098, 0x375bda00, 0x0d3b6d9c, 0x6e22daad, 0x89cbd389, 0x28a42831,
+        0xce51a224, 0x4f107ac0, 0xd83bc0d7, 0x1257058f, 0x17fd241e, 0xd950e1b6,
+        0x3a3e21db, 0xd0589b1d, 0xe5e51743, 0x3e4d26df, 0x0cb976a6, 0x2184c5ce,
+        0xaab9aab3, 0x31a1733c, 0x39afb863, 0xdd8086a1, 0x3e8fcc34, 0xd9956290,
+        0xa062326e, 0x5d9416c6, 0x4bee92bb, 0xca66d2b9, 0xdbae059a, 0x2e42a53f,
+        0x38b86332, 0x6b54e83b, 0xa0769433, 0x0b921bbe, 0xd8dcd9db, 0xbe6a0563,
+        0xb21ce41c, 0x6dc7c1e8, 0x90cac76e, 0x9eb01709, 0x649340ea, 0xc34638c2,
+        0x2416b5f8, 0x3609d724, 0xa20b997f, 0x3e030d5f, 0x16217332, 0x9b143089,
+        0xbd4a3410, 0x50ad3ba7, 0x24d9c84d, 0xd42d841a, 0x1e7432cc, 0xfed72e44,
+        0x70301685, 0xbfa2f527, 0x74fd9176, 0x3e6ef227, 0xa303bb5e, 0x20fbbe98,
+        0x1d0a038e, 0x2471ad80, 0x972f829b, 0x72b03568, 0xcdaeeabf, 0xbdbff0af,
+        0xde6cd581, 0x8c9c5cc1, 0x482d8c0c, 0x403b7881, 0x05b09b0f, 0xc06fe427,
+        0x206ba5e8, 0xaf86bed6, 0x68f1fa27, 0x2ea6296d, 0xa797bf02, 0x6787d66c,
+        0xb4bae743, 0xb21192fe, 0x70b79f81, 0x6ed45c85, 0x8cfc512e, 0x5da1efac,
+        0x5dce3edd, 0xd0852f97, 0x331383ff, 0x5adc8cd7, 0x4b7f0e58, 0x0c9bef55,
+        0xb154393d, 0x4677bb78, 0x3a3ecb24, 0x44256d85, 0xb2a9e27c, 0x177af410,
+        0x427f5143, 0xde57cd64, 0xfb0968e2, 0x15d479ea, 0xe68a534d, 0xd1f16506,
+        0x0bfc8fc2, 0xc2beff70, 0xb1c4e60b, 0x45ceb223, 0x36fc2a23, 0x6bb94c03,
+        0x4d2bd2af, 0xc05751bb, 0x2e14d0dd, 0x6108a18b, 0x1ac29215, 0xb4efa2c0,
+        0x736ef0eb, 0x6797d49d, 0x51cde5f6, 0x7f311ad4, 0x20895055, 0xbe2dcc1f,
+        0xb5c12f29, 0x250db0fd, 0xa458941e, 0x5721c619, 0x1781b0d4, 0x975690ef,
+        0xc1f96e5f, 0x23ff8f47, 0x0e7018a1, 0x891f61a7, 0x340447b0, 0xdeb0b6b4,
+        0xe61000a6, 0x551c3ccd, 0x013ee5e1, 0x9d63e047, 0x303000a2, 0xa7acb349,
+        0xfcf479d6, 0x3be1be68, 0xa058232d, 0xd84a2a1e, 0x813a520a, 0x00ea679f,
+        0x0d573cdf, 0xb51b8aa5, 0xf6082092, 0x6f81c57d, 0x6893f415, 0xd7c458b3,
+        0x250178fa, 0x607d025d, 0x807c98b8, 0x0275409e, 0xb1de7125, 0xa11378b8,
+        0xc17fa6e5, 0x05c08b4c, 0x9d8644c7, 0x9e2b71f0, 0x908b0786, 0x683b04f2,
+        0x692b35b8, 0x2e59de8a, 0xde169e14, 0xab99373e, 0x6a911ba2, 0xf889a050,
+        0x6f64e67e, 0x99656b78, 0x77c0eac6, 0x039f9925, 0xe4db9633, 0xc47d35b1,
+        0x610cbb9c, 0x33def983, 0x69a41da8, 0xa403d65d, 0xafc559a3, 0x82976ecf,
+        0x1cfe83a5, 0xfbf8f439, 0x9eb4447f, 0x7c057994, 0xee1b9d0b, 0xf2f9e26a,
+        0xed0311c6, 0xe8998082, 0x61dc5fdc, 0x7791dd93, 0xaee4173e, 0x83cd6a65,
+        0x44c38e59, 0xc6a19843, 0xf2d7da29, 0xbf38c32b, 0x71541fff, 0xb187eee9,
+        0xbc13163c, 0x4c8e3c79, 0xbad8cc9f, 0xd9ab789e, 0xb02cfc2f, 0xa0daaf87,
+        0xc08ad4e6, 0x2817a39d, 0x2437d4fe, 0xdcb16b44, 0x038ed205, 0x6da1b123,
+        0xcef22b08, 0x9e92a286, 0x6a83acce, 0x87a49c47, 0x8481ca77, 0x2c394c38,
+        0x80d41da8, 0x788ac9cd, 0xdae52a28, 0x1e79bc84, 0xc6c59e5f, 0x51032de6,
+        0x1cbe9735, 0xd02f40e7, 0xc781efff, 0x9c1e7be4, 0x92f696a6, 0x4b5e66ea,
+        0x24a604f3, 0xc7aa2680, 0xea3f694a, 0xdeed7abc, 0xe4457fe6, 0x8961f424,
+        0x10507180, 0x7b2bb524, 0xc036193b, 0x1a586c05, 0xee1b8ec8, 0xf4e2513e,
+        0xded17fba, 0xf401f87b, 0xaab3af09, 0x04994265, 0xcf58e39d, 0x29884e00,
+        0x7781a455, 0xf5819e99, 0xb9fddb32, 0x40375234, 0x857b502c, 0x8a8ef584,
+        0xb042e914, 0xe08499cb, 0xb1631f1a, 0x1f2b0810, 0x7ab85e30, 0xed4ffecd,
+        0x960c1a71, 0xa05c732c, 0x04038504, 0xe0a3a1db, 0x9cb4b8f6, 0x25f130f9,
+        0x20d7aa63, 0x946b54ee, 0xf39072ec, 0x429b5fcf, 0xabaa2be5, 0xd6f38249,
+        0xf8a3ad38, 0xfc636081, 0x66c764fa, 0xcec5c37a, 0x35d1e61f, 0x74b847c9,
+        0x6d28df02, 0xb9d8a69d, 0x95f01f63, 0x769a94c1, 0x1b9da055, 0x4516812a,
+        0x178c7160, 0xe8f93098, 0xc82a73f3, 0xbc7ba545, 0xaca10d18, 0xfcf1b795,
+        0xbf48ccfb, 0x926804b5, 0xe1ecee43, 0xfbf04972, 0x18b75f49, 0xbf80ec2e,
+        0xac7ee456, 0x5cc43616, 0xa46b8bbe, 0x5c7d4a0c, 0x77e410f2, 0x608bca89,
+        0xe97a2518, 0xa9f09acf, 0x1c563e6f, 0x1e145647, 0xe6caad06, 0x954fc11e,
+        0x113b85f2, 0x98c6b66e, 0x0324fb7c, 0xc172ac43, 0xd4405132, 0x7fcf591b,
+        0xb4705224, 0x55388788, 0xa50f5f09, 0xf998db14, 0xbe2dff90, 0xa85021c0,
+        0x71b1fa44, 0x55570852, 0xa2b4883d, 0x78e5d364, 0xd5c593de, 0xda404d3d,
+        0x789d2361, 0x9a1a0b84, 0xa571020f, 0x6be7a37f, 0x1ede9c83, 0x10acf9b4,
+        0xa50a4d80, 0x86408eef, 0xc40deeb2, 0x5949b5f6, 0x437e6a3e, 0xbb5c1a89,
+        0xf03fbab0, 0xe44d27e2, 0x9889a968, 0x44ad5bca, 0x10b7598b, 0xa0b03965,
+        0xcff1da29, 0x1369f8fc, 0x1df13fd2, 0xe629b296, 0x6b79c760, 0x6ad591f1,
+        0x14382d8c, 0x87f47016, 0x0386166d, 0x725351d2, 0x742fdfef, 0x26f27a4d,
+        0xd55b4a39, 0xb81c90bd, 0x671610fd, 0x3455a331, 0xa8f31db8, 0x4af65fd6,
+        0xf8122b97, 0x820a0295, 0x508e8ee6, 0xc14b3caf, 0x352707d9, 0x2e5ef5de,
+        0x1b0d14b3, 0x9cfd1c77, 0x7b69ca08, 0x035175d0, 0xeecd805b, 0x751b8c61,
+        0xbee580a3, 0x2b421a09, 0x99bba35e, 0x40f69258, 0x6e253fed, 0x99322076,
+        0xff303f58, 0x35837623, 0xe48021c6, 0x53ad4993, 0x67ac9831, 0x8e83aac9,
+        0xbad369aa, 0x8265db48, 0x2d3d9acc, 0x9a96f3f3, 0x69ebe3f7, 0x67281664,
+        0x8c37d3af, 0x016e2fdd, 0x833ea212, 0x750c8c6d, 0x047f9951, 0x990bc2e3,
+        0x178a1105, 0x410b911e, 0xec2ee656, 0x7e591f10, 0xfc20f3aa, 0xcd999474,
+        0xaadb4790, 0xdb5ca0e5, 0x91c6e770, 0x53bf9054, 0xf7905ae7, 0x12ed30ac,
+        0x92ecce40, 0x0043f0cd, 0x8a450ef1, 0x36c08cad, 0xcc41cbb3, 0x28ff88d1,
+        0x9c1ace6e, 0xc965bcb0, 0x380da810, 0x8d4ff93a, 0x2bc0a785, 0x04f50d5e,
+        0xa57f3f5f, 0x60d84b18, 0x7d06e9a0, 0xa4d548da, 0xaa874db4, 0xd5a1d00b,
+        0x0adef318, 0xc23f5a06, 0x8dffc8f1, 0x6ba7e230, 0xdc109fee, 0x625a0712,
+        0x9c014e79, 0x025ffad9, 0xb2995afb, 0xf7f6f0b5, 0x45995b09, 0xf24da7e1,
+        0x28f2d9ea, 0xe8c06a11, 0x8a489a27, 0x11edcf6b, 0xb9d808f6, 0xa4c1f82e,
+        0x7dfb65de, 0xf2449c48, 0xfd5ee5e1, 0x301588c8, 0xdf60ffe4, 0xa3a303b1,
+        0x22bf80c1, 0xcae06cd0, 0x33ed3b56, 0xfa05a094, 0xf47dd719, 0xb16f8597,
+        0x43a0644d, 0xc75f5833, 0xac3b6e0a, 0x8b4d60b0, 0x16fe7ff9, 0x52afe395,
+        0xa6fc6fba, 0xdc0cc146, 0xcaaed5dd, 0x33874fe4, 0x9785500c, 0xa27f42c1,
+        0x18ce3925, 0x8005f1e9, 0x2f77c87f, 0x3ceca71e, 0xf9fbc707, 0x70313e7a,
+        0x4a807f94, 0xc04289a3, 0xe8ecb260, 0x068fd9bb, 0x3efc513c, 0xc0ac9bfe,
+        0x0de8d561, 0xd0939df0, 0xfbdae5ab, 0xe1510cdc, 0xdbb3d852, 0x8b791d88,
+        0x89b10c07, 0x1506403a, 0x46e298ef, 0x671708d8, 0x79fa8edc, 0x0ecfac11,
+        0x8946d20c, 0x4e7b8e78, 0x19795c32, 0x84cdc36f, 0x0febe39f, 0x676853d7,
+        0xa7658969, 0xb3a702a3, 0xe0f51b66, 0x0ea20568, 0xb611505b, 0x4cdcb437,
+        0x908bdb33, 0x868accac, 0x15648428, 0xfa8a81e7, 0x44a5c029, 0x5fa4d7ef,
+        0x59dbdc55, 0x9b391d62, 0x1db212d9, 0x4d43ccd2, 0xe641f66f, 0x046c8403,
+        0x6a751597, 0xabb2ffbd, 0xdbcde6ae, 0xf8184773, 0xf7ca65b6, 0xa8fe4db8,
+        0x63eec77b, 0x0ba4fe95, 0xb041545a, 0x050a12d1, 0x922fb681, 0x620f81d7,
+        0xad6baffd, 0xb37177f2, 0x1966e582, 0xdf0938e5, 0x7179cb6a, 0x4dfcbb57,
+        0x31226e52, 0xe9249b62, 0x415eea0b, 0xa812bfe9, 0x464a6fef, 0x04ccc5ef,
+        0x8708c9f1, 0x14119649, 0xb66fe677, 0x89302ee7, 0x90e1a70a, 0x8bf64e5d,
+        0x3724151d, 0x30ab0e8f, 0x28d6d477, 0x9ee98888, 0x6d508149, 0x611dbff0,
+        0x75f140db, 0x47865a24, 0x9c902510, 0xb6d0deeb, 0x96101c30, 0x12dda10a,
+        0xe6188152, 0x352b6c9f, 0xd94db7fe, 0x86100ea1, 0x5950c0ea, 0x4baf9d98,
+        0xceb7bcbe, 0x8961c95e, 0x60509ca0, 0x4a2a8f46, 0xfea85578, 0x4a9ab17f,
+        0x9ee13549, 0x92d5623e, 0x7144f2b8, 0x200c618f, 0x02b9420d, 0x13d427fd,
+        0xd60add81, 0x566f948c, 0x9a70263b, 0xfae6b660, 0xcce09fc9, 0xe7989297,
+        0x45ce861d, 0xb7d47064, 0x629c1dc2, 0xdb7ee76c, 0xa8c434ea, 0x3c077590,
+        0x0a242863, 0x028f9b19, 0xb5c71b83, 0x99ad4c9f, 0xf77f042c, 0x77eaa575,
+        0x277ab584, 0xea6c6f5c, 0xc4ed381e, 0xd1c9eea9, 0xf8e7c639, 0x73fb9358,
+        0xd084942d, 0x5bfbeafc, 0xcc55b826, 0xcfcf7ad2, 0xcda0bafb, 0x37595771,
+        0x855bf963, 0x1f152a10, 0xde258b9d, 0xd5387a22, 0xe6a222bb, 0x0e22be29,
+        0xbf1fabec, 0xcb08b118, 0xb8adcf81, 0x1bbf6cef, 0x2eaa9491, 0xe31f91bf,
+        0xd3e28542, 0x79206e56, 0x92ee13f1, 0x80b86f3f, 0x5d94c24b, 0x4fed1166,
+        0xd391e7d6, 0x47e95881, 0xe07d5706, 0x5c63dc53, 0xcb6881b2, 0xbf93f6b5,
+        0x50f8f56b, 0xea093d3a, 0xd6c42a52, 0x408cd8d8, 0x7f2d4d79, 0x87748ee7,
+        0xb01e4c32, 0x8d2d0e7f, 0xf6757538, 0x7da267d1, 0x9fd81be2, 0x36aa6e95,
+        0x67a6ab22, 0xc5bac7d4, 0x10411de0, 0xf8e6feca, 0x38807386, 0xd6ac0cac,
+        0x11855ab6, 0x70c3ab23, 0xc1bab0fb, 0x0947225e, 0xdc60bd55, 0x3c180c66,
+        0x236ff7f0, 0x6254d238, 0xcfb989e0, 0x9146eae4, 0xd3fcf658, 0x8ee5c256,
+        0xbedd48a9, 0x4bc2db49, 0x8e2b0fc9, 0x5a17da07, 0x17555ddd, 0x93244108,
+        0x222a2467, 0x3b9d044c, 0x0cd9239a, 0x645cb9ea, 0xacea1c07, 0x45a66ae2,
+        0xeeb7ceec, 0x4a83ec47, 0xcbadc5f6, 0x2075073f, 0x89adc623, 0x5760ccd1,
+        0x4a91125e, 0xf63ade2a, 0x643fd3a0, 0xeb076f47, 0x3b837be9, 0x56ae2f3d,
+        0xf318f60c, 0x8313d98d, 0xe9988cf5, 0x4addabaf, 0x8497d71e, 0xfb848168,
+        0xe5de3a21, 0x7c08c04f, 0x8487a3a6, 0x735e26da, 0xacda764c, 0xe8bd108c,
+        0x60808f36, 0xa3c34d12, 0x7c9d5198, 0x906a5f80, 0x7163f4e4, 0x0700a3a1,
+        0x30bf1cfb, 0xb700b6a7, 0x3253c705, 0xf01024df, 0x4d0b7e3b, 0x67f5cd35,
+        0xe6eb54c7, 0x2409633c, 0xfbf41003, 0x681bbb1c, 0xd11ac2a8, 0xbd189e07,
+        0xa8c12a12, 0xc374e443, 0xf51eb31c, 0x225f7013, 0x82d139f9, 0x5677113a,
+        0x31a1338d, 0x107fd151, 0x6c5f864a, 0xfda47dd2, 0xf31a5702, 0x6265e5f4,
+        0xa453152f, 0x07d992dc, 0xa7a61973, 0x970a4334, 0xd1e2ba22, 0x20545a4e,
+        0x60490dce, 0xf3abb8b7, 0xb7926413, 0xde7830b1, 0xc276db89, 0x152a864e,
+        0x5d276fb0, 0x93eb56ed, 0xc5eb4acb, 0xb58b91e9, 0x6dc3391b, 0x2a5f109d,
+        0x0b5d18a4, 0xc85f8a09, 0x85bb330c, 0xc59c1e80, 0x7e7bc651, 0x8c4f197c,
+        0xd3b833bd, 0x69ec5cb7, 0xb64fd2ff, 0xc3c1a71e, 0x7051a960, 0x5e3b70aa,
+        0x4ed34c7a, 0xdaac0f75, 0x1295c9aa, 0xb1e7e2ef, 0x6eddc081, 0x134e800f,
+        0x59ca6337, 0xdf4a09dc, 0x572f5033, 0xf2d287d1, 0xd09db133, 0x70a356ff,
+        0xaac2c7c2, 0x77430c31, 0xce1d64d1, 0xb8b2f09a, 0x3f19c2a0, 0x302a0fde,
+        0x351baca5, 0xfd9af384, 0xab165a95, 0xe4f4768b, 0xf79ee372, 0xb8466bfb,
+        0x08b8c660, 0xc7bd5985, 0x2ebb691e, 0xc5e136ab, 0xbfbc15d4, 0x64608ca1,
+        0x30d40010, 0x6d5ae331, 0x1b1ce119, 0x93592f35, 0xc31c8eff, 0xc957baa1,
+        0x8e72c940, 0xffb8a6f1, 0x3ca64239, 0x7975642d, 0x66ee5ccc, 0x5c376e89,
+        0xd653d761, 0xa4832b50, 0xe12181e5, 0x57060756, 0xe75a1694, 0x7e51a60a,
+        0x5febd742, 0xe45b089a, 0x2160ec7c, 0x8072812e, 0x38b364e1, 0xbe79709e,
+        0x3b42da70, 0xdbaa1a6f, 0x4f128bd6, 0x71e5b873, 0xbad38c57, 0xab4378e7,
+        0x0883effa, 0xbc7073d0, 0x64dae24a, 0xe08ea9b7, 0x8f54d5c3, 0x7b4aa07c,
+        0xb03259eb, 0x86e72f66, 0xd8a810cc, 0x7bc1a001, 0x5153146e, 0xabc5fca0,
+        0x1ab1aea6, 0x024597f3, 0x912ee50f, 0x6818e0b9, 0xb3273eaf, 0x064a284a,
+        0x937928c5, 0xb0605e53, 0x24504db2, 0x64685720, 0x8b280f28, 0xb938cede,
+        0xd3467e5b, 0xfc474fc4, 0x2f1c9dd1, 0x72d57fa1, 0x98d37c1c, 0xdf08764e,
+        0x40282f0b, 0x31425d55, 0xaca62b74, 0xae533cb9, 0x7371a9a0, 0x6042ee83,
+        0x5246811a, 0x9dfdd182, 0x62f160f9, 0x63cb1e11, 0x496f4d1e, 0x283e32e4,
+        0x31261262, 0x9629ff1d, 0x740f2b39, 0xc89f85a6, 0x866d75b4, 0xcea84701,
+        0x76c7f3ae, 0xf942587e, 0x7a58b334, 0x25f1b320, 0xcedea539, 0x610e1273,
+        0xe4b6afc8, 0x565cb881, 0xf38c7dac, 0xb7f53eb2, 0x316e7c16, 0x1c1dfb54,
+        0x988381ee, 0x9f1e999c, 0x7cf9359d, 0x4d7ba0ab, 0x9a120ef5, 0x431d6a16,
+        0x4b53228b, 0x0429b25d, 0x8cdc83fa, 0x293f58b4, 0xddf8526a, 0x6796b21e,
+        0x65d22138, 0x24a19874, 0x104e6bd4, 0x113ee612, 0xc6f41156, 0xbf2617b7,
+        0xd13e6287, 0x018b728a, 0x5c7ff6c6, 0x7da7e4c4, 0xa948430c, 0x01b22760,
+        0x23ad5a12, 0xd1b15361, 0x3e216ea5, 0x1fad8855, 0x72860714, 0x73ed022e,
+        0x5f44c559, 0x72be2a3c, 0x9fa399b4, 0x60645fc0, 0x88691b5d, 0xab4de611,
+        0xe03795d0, 0x31c95adb, 0x032b93c1, 0xd6f72088, 0x09756440, 0x51fe1bbc,
+        0x2984d1f6, 0xf759cc33, 0x20bb6d8b, 0x7e088c24, 0xc335712b, 0x5f3c0b9a,
+        0x4db7ae9f, 0x864a2e1b, 0xa3d05ac9, 0x24a74675, 0xed6e9968, 0x530d5843,
+        0xa51904fb, 0x77510c4d, 0x0846eec6, 0x0ec0d98a, 0xbad9789a, 0x9a85c6f8,
+        0xf102fb25, 0xd57b3407, 0xb771a1a9, 0xcb7dbec0, 0xc617a4c1, 0x9a869af4,
+        0xf63a851a, 0x2235c9db, 0x3c471f5e, 0x650c2dea, 0x680de832, 0xdbc3f3dc,
+        0x16ee082d, 0x01deeaec, 0xb4af2028, 0x14e12149, 0xf2b70678, 0x58d03c44,
+        0xb1f1bc1d, 0x46052d4d, 0x449fad9a, 0x7144fae6, 0x4f20417e, 0xc060e063,
+        0x8d1ee1fe, 0xb981bb26, 0x7dd2923d, 0x1531913c, 0xd5b3dc5c, 0x6bdd8d7b,
+        0x4d11d67b, 0xcb5eb88e, 0x8c684f05, 0x5c5d168e, 0xe674a896, 0x8bbe56ab,
+        0x5d3adc63, 0x24426b9c, 0x6959463c, 0xd3daf526, 0xdb518639, 0x9d5eeba6,
+        0x34bf95c4, 0xe44928d8, 0x4a350e26, 0xf4025f71, 0xfb9cf156, 0x6e22486b,
+        0x26950c6f, 0xc2648b6e, 0x82cb1ab3, 0xa21ddd87, 0x51490453, 0x01fdf426,
+        0xbadcb761, 0x0e285856, 0xbdc12515, 0x91ec08b9, 0x73d4a8c3, 0xde825bee,
+        0x185bd55b, 0x8d109579, 0x7e17505f, 0x31a7f0aa, 0xe657d77f, 0x8af6e295,
+        0x9eb7a158, 0xecf698d9, 0x017312d0, 0xfd8cd119, 0x09419765, 0x010f9e87,
+        0x6241fb5b, 0xb7941cdd, 0xcabf0273, 0xe017b4d3, 0x164b4591, 0x72e0f512,
+        0x6a31ed39, 0xf04f8471, 0x38ed48a3, 0x67bef6b7, 0x7ecf23d4, 0xe100feb5,
+        0x22adff9d, 0x90429e06, 0xbd202dc2, 0x8ddafc8a, 0xfa748d39, 0x23b5a9d9,
+        0x333af4f2, 0xa34bed6d, 0x6d119308, 0xa0176ae7, 0x08035b54, 0x9007e34b,
+        0x164db2b3, 0x27052ad5, 0x0e67d67f, 0xf4e079d7, 0x8813cd4a, 0x91f7d9be,
+        0x739d6ae9, 0x38fa76f7, 0xbcf04369, 0x1df8dd6f, 0x09354bfb, 0xc3cccad0,
+        0x200aee9e, 0x4bd7c61a, 0xc4a4cd2a, 0xcb23e5e6, 0x892ad11a, 0xa6f0e1ba,
+        0x200f5424, 0x905a4ad6, 0xca339172, 0x63dffc1d, 0xeabd8f16, 0xf706dacb,
+        0xc42cb75d, 0x5e8bbbaa, 0xe808a403, 0xfa4cd98f, 0xa1d131df, 0xa0acb118,
+        0x59c23249, 0x6fb05d42, 0x45bcd7b3, 0x5096d079, 0x0f1bc6e1, 0xa0105250,
+        0xcb0846fa, 0x7d0dcd51, 0x949fc2bc, 0xecce0467, 0xd24ac1a3, 0x7b4ab4ad,
+        0x841a6c4c, 0xa0f53661, 0x1bef4d1f, 0x5e654489, 0xb1d92e17, 0x50fe7447,
+        0x1c1abef8, 0x55677862, 0x5632cf91, 0x3ec27c87, 0x9c835956, 0x210f4faa,
+        0x773efb75, 0x21289727, 0xb7772a4d, 0xb69464dd, 0x429fe166, 0x560e0541,
+        0x8e8121c8, 0x1db15642, 0xd8fd16f3, 0xdd195200, 0x6f908c3e, 0x5460d4c4,
+        0x5184f9d0, 0x2f87bbba, 0x82dbf688, 0x93a5ee07, 0xf222dc57, 0x06317450,
+        0xf2777507, 0xcd184b87, 0xa9830178, 0x0f3b16a0, 0x5880298c, 0x5aae5100,
+        0x96e77538, 0x37e3f47e, 0x46e91f9f, 0x1bb07a4b, 0x79cbd046, 0x52a8ece5,
+        0xc6b45944, 0x0e086656, 0x79344dfc, 0xc1c322e3, 0x9b39c39a, 0x4bd80931,
+        0xac0c9334, 0xb910b978, 0xe9779c01, 0x12c8f2dc, 0x1c054905, 0x278ef394,
+        0x468d505b, 0x755f9886, 0x35ac8dd3, 0x47163d44, 0xbd6ff682, 0xd6de1b10,
+        0xc60d4295, 0xe95deafc, 0xa5aab2ab, 0x26a2a9eb, 0x2f37ad60, 0xcde3bd9e,
+        0xdc28986a, 0x6b2bd02f, 0xb349eb96, 0x094f8225, 0x3a2ef8b6, 0xb14213bc,
+        0x6fff289e, 0xc0b66664, 0x35c0a4c8, 0xa67b229d, 0x6a7d7f41, 0x6b03e122,
+        0x888a3339, 0x8e27f805, 0x3a20a464, 0x71bd36ea, 0xab023719, 0xe71d05cc,
+        0x1ef6a18e, 0x3b4feb9a, 0x9539eae6, 0x213eda22, 0xfd6ca085, 0xfbbeaedd,
+        0xf2025549, 0x77b2e95d, 0x970411d4, 0xbe8d4e74, 0xce255c20, 0x5556ed16,
+        0x3a67165c, 0x47d6a03f, 0x80aa3f91, 0x6f370407, 0x399a63bb, 0x590c4463,
+        0x1142ec95, 0xbeabc5f9, 0x87582b2e, 0x76bfda8e, 0x407a9308, 0x2d8ce964,
+        0x2254af46, 0xb57dd64b, 0x82d775f8, 0xb8f92d68, 0x63276e26, 0x0ef5cef8,
+        0x8f54d4d4, 0xb9f88c5b, 0x85d3fdff, 0xb0175fa5, 0x145a8d49, 0x6c6d9125,
+        0x7e7586e4, 0xb90a36e5, 0x7f722e76, 0xe753de83, 0xa78d5969, 0x27b994df,
+        0x07bc4655, 0x08a70e34, 0xec55a11a, 0x6926101e, 0x5035acaf, 0x65e17109,
+        0x3a06e980, 0x229608b4, 0x8669132f, 0xef847324, 0x38f0fe5d, 0xd4b2b6e7,
+        0x23150ccb, 0xf60d7fc1, 0xf1d51e0f, 0xdbf6eb2d, 0xb46a472c, 0xefd7648f,
+        0x89643e10, 0x613cfa29, 0x53275bd4, 0x63537c5e, 0xa9e55a3c, 0xe5b92a7a,
+        0xfe74da80, 0x1cf0483d, 0x2f6f96cc, 0xd9005676, 0x86018575, 0x69c0e007,
+        0xe4ca019a, 0x40d58cc3, 0x9db6ac66, 0xed236acd, 0xf10835b1, 0x55a18391,
+        0xb62a2934, 0xc4b3cc4b, 0xbd9d6348, 0xf19baf61, 0x77c1204f, 0xf77094d7,
+        0x7e8297fd, 0xc2c73ddd, 0x7791c629, 0x432334c2, 0x48c86dc3, 0xc8bec7d0,
+        0x135f9e61, 0x57419722, 0x70223006, 0x83b7ba7a, 0x36bc9237, 0x7a21245e,
+        0x1f48323c, 0xf86422cf, 0x68622f64, 0x6c026f0f, 0xaf81d1f5, 0x5f404946,
+        0x0c6d0c22, 0x6b7c3088, 0xe889a699, 0xa24bd2b9, 0x0a389a43, 0x2a050393,
+        0x427910bc, 0xe111b7ff, 0x536f0074, 0xbf9703bb, 0x9111c51a, 0xf1f8d3cf,
+        0x63f0930f, 0xbc76645b, 0x0e842657, 0x3b5b2bae, 0x3f660b15, 0xb645b0d7,
+        0x90eff9b4, 0x313bb913, 0x48264b12, 0xc4cf282b, 0x926c2ef6, 0x13555666,
+        0x5a5255cc, 0xc2d91c43, 0x51ccb3e5, 0xe311314b, 0xf9ba0492, 0x918da6a8,
+        0x37d560f2, 0x1b8f1c9d, 0xca18bdc4, 0x2ab8b505, 0x9d9178b9, 0x6336058a,
+        0x857c9b76, 0x2b2d86d8, 0x8bf4a0f9, 0x2e4bdf45, 0x9c007635, 0x7844a9ac,
+        0xfd45768a, 0x9d54241d, 0xbc87702f, 0x24aca533, 0xa1879de3, 0xfc528f11,
+        0x57c0b19f, 0x9e81bbfa, 0xfd14e506, 0xb8f39dac, 0x6d548fd5, 0x97cfc366,
+        0x87cb88c3, 0x77ca3acc, 0x38ac2c2c, 0x62d4eeb5, 0x65ce76a3, 0x44282516,
+        0x08fcad83, 0xbdb4fb43, 0x0e0708ab, 0x7e8142b4, 0x3f4ae584, 0x2d4494a9,
+        0xe6f68b7d, 0xea5b9db1, 0x6649b98b, 0xf1a5ae3c, 0xb7be2ccf, 0xaac2b610,
+        0x14c5e50a, 0x8f940a7f, 0x3283c8a1, 0x6a409b75, 0x8de99803, 0xa1ae2cdb,
+        0x6be3fe29, 0x01c26ac8, 0x0f066130, 0x6922fa47, 0x7bd9024f, 0xf11f6f0c,
+        0xfa228b5f, 0xba252e5b, 0x4c70a599, 0x5766410a, 0x4e525657, 0x65f11805,
+        0x91c56a11, 0x223bbd16, 0xa2cdfcc0, 0xb7968593, 0xe2f3f2ed, 0xfbce338b,
+        0xada4181a, 0x1364f3c6, 0xcfa333a9, 0x08474c45, 0xb40d3003, 0x61b2c136,
+        0xd0e62282, 0x712d1080, 0x15e46668, 0xa879b3bc, 0xc169a477, 0x0f66872a,
+        0x4201bfc4, 0x5e188c47, 0x879409a2, 0x34dd14b0, 0xc17ade57, 0x57701e91,
+        0xa1aef125, 0xac71dbc9, 0x06de8080, 0x49c8f733, 0xbc0ecdff, 0x38f000de,
+        0xf9ed3717, 0xd1df7433, 0x58deb156, 0x38ec6827, 0xe32eef5b, 0x96fe7ba2,
+        0xa59bbf11, 0x5a6e986c, 0xdf543aa7, 0xdb083f4d, 0x89c74fd4, 0xf0bc5691,
+        0x24935523, 0x6ad839ff, 0x46700e11, 0xd5ddc9c3, 0xdba41026, 0xeac32c09,
+        0x99f1f96a, 0xe2e73063, 0x94680ec0, 0xf187c63e, 0xe37227c8, 0x0f33e211,
+        0xb6772405, 0xcaca858d, 0x0bb71256, 0xefd8bf96, 0x0b42b9ee, 0x0985e798,
+        0x3c8f35f1, 0x9b62c504, 0x39e3e3d4, 0x6c996967, 0x8e4feffb, 0xc6e375ef,
+        0xf38155aa, 0x514a5750, 0x5ab1c0a6, 0x4bd6a475, 0xf1ccd5f7, 0xf17d792a,
+        0x0edca5fa, 0x5c513ce2, 0xec642041, 0x3d883d34, 0x91384280, 0x7c5e3c25,
+        0x228b8ec4, 0xb4407f2a, 0xd8d44790, 0xa09c87e6, 0x711fe589, 0xd031fca1,
+        0x479d06ca, 0x1e040836, 0xdfea4aee, 0x072f7204, 0x08ee829a, 0xb19cb258,
+        0xc8d4e3bf, 0xd786c1d5, 0x04e52f9c, 0x11cbeb5c, 0x6a934aaa, 0x30a708b5,
+        0xa004b30b, 0x8ed6bf32, 0xaa162037, 0x5196e1aa, 0x75cbf8d9, 0x94d596c1,
+        0x79ca998d, 0x5634ffef, 0x0c01a32c, 0xf76e17bc, 0x0ebec777, 0x5232e9bd,
+        0x356763d2, 0xa6076c93, 0x72c83937, 0x85c257dd, 0x8598a97c, 0x75dc5db7,
+        0xb77080cc, 0x191f9a7d, 0x3400dbcc, 0xb431841d, 0xe06cde36, 0x3dbecf71,
+        0x192d44b1, 0xe184d1be, 0x8196959e, 0xc1048b05, 0x6e57b759, 0x02394f2d,
+        0x400aad39, 0xa97b5a33, 0xade0b987, 0xf54c009c, 0x7dbee79a, 0x597e693b,
+        0x69563101, 0x1cb109d3, 0x9641e29a, 0xa6567607, 0xd3a511e0, 0x0665b459,
+        0xb0c98dbf, 0xf80194ee, 0x5c1c4b7c, 0x20d272e0, 0xb33c3ede, 0xcb3f101e,
+        0x5137e926, 0x6f0e531a, 0xc5a854f3, 0x30a2ac99, 0xa298bd8e, 0x196b7015,
+        0x30147714, 0x7e29ad4b, 0x0b5dcaa8, 0x39788dd9, 0xc3c6dfb4, 0xf31ef954,
+        0xcd08eb82, 0xe35c1203, 0xdd74ebe8, 0x7fb06abc, 0x6c0e96f8, 0x0c53d6f4,
+        0x6976ecf5, 0xb87278b7, 0x0769140d, 0x890cf864, 0x005aed7b, 0x750063cd,
+        0xe7151c57, 0x42d60baf, 0x8e4d6a1d, 0xcdc93bf6, 0xacd5c264, 0x89aa8341,
+        0xe217f73b, 0x38ef7e79, 0x6ea2b77c, 0x76d8cdea, 0x30c45ace, 0x52e8ce84,
+        0xf3e3e975, 0x3bf5c38f, 0xac5b279e, 0xd58667f1, 0x4b03c98a, 0x384314bf,
+        0xb6a3e61b, 0x3da5082b, 0xbf2434a3, 0x644f4811, 0xec74ff91, 0xe1c834e8,
+        0xc52a26e8, 0xe679967d, 0x9f24f3c2, 0x8205392a, 0xbd7f2382, 0xef3a92ee,
+        0x187fc52d, 0x9b747516, 0x69e7cb8e, 0x9847d7d5, 0x8671c1d3, 0xd6932eaf,
+        0x76c57d30, 0x57ccbf6d, 0x3c2fa093, 0xbab2f397, 0x535ee718, 0x3f77a270,
+        0x461de14e, 0xd7090755, 0xc99778e9, 0x841d28a1, 0xd242f86a, 0x252f874c,
+        0x052f68ee, 0xd88e0f2b, 0x61c6d581, 0x1e98a506, 0x5ca26b71, 0x07e5501a,
+        0xd75f9a52, 0x9bc5c40b, 0x6b18b5f8, 0x7cf11239, 0xf96196a1, 0x4f9604de,
+        0x0f7a75a2, 0xe520ba35, 0xdcbf4c27, 0x207ca853, 0x2d2ac37e, 0x2d6cfd21,
+        0x2a59634c, 0x3b5cba4e, 0x1db0ad9c, 0x35dc6b5c, 0xf2002ee9, 0x4ca833dc,
+        0x6ea8ae03, 0xe3ca6ea7, 0xa76bdeb5, 0xc289cce4, 0x9107af68, 0x73ac356f,
+        0xc194cad6, 0xad9e2246, 0x8a150c94, 0x4c1b5537, 0x09e9a222, 0x1a8fbf87,
+        0xdfd358b0, 0xbbf48f23, 0x3d026e9a, 0x991f8c79, 0xe28950a2, 0xe4bec643,
+        0x84cc161e, 0x235dfe1e, 0xc8374571, 0xbe6a010e, 0x08dfee1a, 0xc53522ae,
+        0xf6057058, 0xbeb8fb3d, 0x9b04676e, 0xa892faeb, 0x447b7e1e, 0x992bc4e8,
+        0x1ab56be9, 0x6d3cc03f, 0x8116ca85, 0x91492add, 0xa5209abd, 0x462fce76,
+        0x5a0f4084, 0xbe68d9c3, 0xf3640d14, 0x6cbbcd87, 0xe043edf3, 0xb754fcf7,
+        0xd01975d6, 0xd8d67d5c, 0x89331391, 0xf2dc711b, 0xe3b4a1c1, 0x3e84c47b,
+        0x1f933837, 0x55794dd5, 0x7689ae27, 0x177d98f1, 0xd38850e0, 0xbc6c317d,
+        0x6dac465e, 0x60bd9f87, 0xe6a32ab4, 0xcf422872, 0xf8a15422, 0x66c23737,
+        0xcc25ea0a, 0x9a9c1f0f, 0x06507eec, 0xab7ee39b, 0xb68e52fc, 0xe302b3b4,
+        0x668ce05a, 0x5ecea762, 0x8d0a1d05, 0x683efff9, 0x481a12c7, 0x0df8eeef,
+        0xe80936e8, 0x9d746659, 0xabc79b21, 0x1e715b12, 0x9754c079, 0x65284a57,
+        0x2985cc8b, 0xe7f65f9b, 0x9a17fc78, 0x96c2f451, 0x6b65b332, 0x35051a0d,
+        0xc0e80ad8, 0x493707f3,
+    }};
+
 static uint32_t kSpxEnabled = 0;
 
 static const sigverify_spx_config_id_t kConfig = kSigverifySpxConfigIdSha2128s;
+static const sigverify_spx_config_id_t kPrehashConfig =
+    kSigverifySpxConfigIdSha2128sPrehash;
 
 // Domain separator for pure (not pre-hashed) mode.
 static const uint8_t kSpxVerifyDomainSep[] = {
@@ -512,6 +892,61 @@ static rom_error_t spx_verify_enabled_good_signature_test(void) {
   return error;
 }
 
+static rom_error_t spx_verify_enabled_prehash_bad_signature_test(void) {
+  enable_spx_verify();
+
+  uint32_t flash_exec = 0;
+  uint32_t good_word = kPrehashSignature.data[0];
+  kPrehashSignature.data[0] = 0;
+  rom_error_t error = sigverify_spx_verify(
+      &kPrehashSignature, &kPubKey, kPrehashConfig, kLcStateProd, NULL, 0, NULL,
+      0, NULL, 0, &kMessageDigest, &flash_exec);
+  kPrehashSignature.data[0] = good_word;
+
+  if (error == kErrorOk) {
+    LOG_ERROR("error should not be kErrorOk");
+    return kErrorUnknown;
+  }
+  if (flash_exec != UINT32_MAX) {
+    LOG_ERROR("flash_exec must be UINT32_MAX");
+    return kErrorUnknown;
+  }
+
+  return kErrorOk;
+}
+
+static rom_error_t spx_verify_enabled_prehash_good_signature_test(void) {
+  enable_spx_verify();
+
+  uint32_t flash_exec = 0;
+  rom_error_t error = sigverify_spx_verify(
+      &kPrehashSignature, &kPubKey, kPrehashConfig, kLcStateProd, NULL, 0, NULL,
+      0, NULL, 0, &kMessageDigest, &flash_exec);
+
+  if (flash_exec != kSigverifySpxSuccess) {
+    LOG_ERROR("flash_exec must be 0x%08x, not 0x%08x", kSigverifySpxSuccess,
+              flash_exec);
+    return kErrorUnknown;
+  }
+  return error;
+}
+
+static rom_error_t spx_verify_enabled_bad_config_test(void) {
+  enable_spx_verify();
+
+  uint32_t flash_exec = 0;
+  rom_error_t error =
+      sigverify_spx_verify(NULL, &kPubKey, /*config=*/0, kLcStateProd, NULL, 0,
+                           NULL, 0, NULL, 0, NULL, &flash_exec);
+
+  if (error != kErrorSigverifyBadSpxConfig) {
+    LOG_ERROR("error must be 0x%08x, not 0x%08x", kErrorSigverifyBadSpxConfig,
+              error);
+    return kErrorUnknown;
+  }
+  return kErrorOk;
+}
+
 OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
@@ -525,6 +960,9 @@ bool test_main(void) {
   EXECUTE_TEST(error, spx_verify_disabled_good_signature_test);
   EXECUTE_TEST(error, spx_verify_enabled_bad_signature_test);
   EXECUTE_TEST(error, spx_verify_enabled_good_signature_test);
+  EXECUTE_TEST(error, spx_verify_enabled_prehash_good_signature_test);
+  EXECUTE_TEST(error, spx_verify_enabled_prehash_bad_signature_test);
+  EXECUTE_TEST(error, spx_verify_enabled_bad_config_test);
 
   return status_ok(error);
 }
diff --git a/sw/device/silicon_creator/lib/xmodem.h b/sw/device/silicon_creator/lib/xmodem.h
deleted file mode 100644
index 8bf8035f97ef3..0000000000000
--- a/sw/device/silicon_creator/lib/xmodem.h
+++ /dev/null
@@ -1,52 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_H_
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/error.h"
-
-/**
- * Send the Xmodem-CRC start sequence.
- *
- * @param iohandle An opaque user point associated with the io device.
- */
-void xmodem_recv_start(void *iohandle);
-
-/**
- * Acknowledge an Xmodem frame.
- *
- * @param ack Whether to ACK (true) or NAK (false).
- */
-void xmodem_ack(void *iohandle, bool ack);
-
-/**
- * Receive a frame using Xmodem-CRC
- *
- * @param iohandle An opaque user point associated with the io device.
- * @param frame The frame number expected (start at 1).
- * @param data Buffer to receive the data into.
- * @param rxlen The length of data recieved.
- * @param unknown_rx The byte received when the error is kErrorXmodemUnknown.
- * @return Error value.
- */
-rom_error_t xmodem_recv_frame(void *iohandle, uint32_t frame, uint8_t *data,
-                              size_t *rxlen, uint8_t *unknown_rx);
-
-/**
- * Send data using Xmodem-CRC.
- *
- * Sends a buffer of data using Xmodem-CRC.
- *
- * @param iohandle An opaque user point associated with the io device.
- * @param data buffer to send.
- * @param len length of the buffer.
- * @return Error value.
- */
-rom_error_t xmodem_send(void *iohandle, const void *data, size_t len);
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_LIB_XMODEM_H_
diff --git a/sw/device/silicon_creator/manuf/README.md b/sw/device/silicon_creator/manuf/README.md
index 253e305601f3a..a2d0c0380a3f6 100644
--- a/sw/device/silicon_creator/manuf/README.md
+++ b/sw/device/silicon_creator/manuf/README.md
@@ -16,7 +16,7 @@
 ## Manufacturing Stages
 
 The following section describes the EarlGrey manufacturing stages with respect
-to the state of OTP. See `//hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD`
+to the state of OTP. See `//hw/ip/otp_ctrl/data/earlgrey_skus/emulation/BUILD`
 for more details.
 
 ### `MANUF_EMPTY`
diff --git a/sw/device/silicon_creator/manuf/base/BUILD b/sw/device/silicon_creator/manuf/base/BUILD
index 7d66de5954082..de7063c6e1c79 100644
--- a/sw/device/silicon_creator/manuf/base/BUILD
+++ b/sw/device/silicon_creator/manuf/base/BUILD
@@ -2,22 +2,30 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@bazel_skylib//rules:common_settings.bzl", "bool_flag")
+load("@//rules:manuf.bzl", "device_id_header")
+load("@//rules:signing.bzl", "offline_presigning_artifacts", "offline_signature_attach")
+load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
+load("//rules:const.bzl", "CONST", "hex")
+load("//rules:manifest.bzl", "manifest")
+load("//rules/opentitan:cc.bzl", "opentitan_binary_assemble")
 load(
     "//rules/opentitan:defs.bzl",
     "fpga_params",
     "opentitan_binary",
     "opentitan_test",
-    "silicon_params",
 )
 load(
     "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
-    "CLOUD_KMS_CERT_ENDORSEMENT_PARAMS",
-    "CP_PROVISIONING_INPUTS",
-    "EARLGREY_A0_INDIVIDUALIZE_OTP_SW_CFGS",
-    "FT_PERSONALIZE_KEYS",
-    "FT_PROVISIONING_INPUTS",
-    "LOCAL_CERT_ENDORSEMENT_PARAMS",
+    "EARLGREY_SKUS",
+    "disqualified_for_signing",
+)
+load(
+    "//sw/device/silicon_creator/rom/e2e:defs.bzl",
+    "SLOTS",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext/e2e:defs.bzl",
+    "OWNER_SLOTS",
 )
 
 package(default_visibility = ["//visibility:public"])
@@ -28,6 +36,16 @@ cc_library(
     deps = ["//sw/device/lib/dif:flash_ctrl"],
 )
 
+device_id_header(
+    name = "cp_device_id",
+    headers = ["cp_device_id.h"],
+    mode = "cp",
+    # All SKUs have the same CP device ID for a given product version so we just
+    # use the SiVal SKU configuration here.
+    sku_config = "@//sw/host/provisioning/orchestrator/configs/skus:sival.hjson",
+    template = ":cp_device_id.c.tpl",
+)
+
 opentitan_binary(
     name = "sram_cp_provision",
     testonly = True,
@@ -40,6 +58,7 @@ opentitan_binary(
     kind = "ram",
     linker_script = "//sw/device/silicon_creator/manuf/lib:sram_program_linker_script",
     deps = [
+        ":cp_device_id_library",
         ":flash_info_permissions",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -49,18 +68,15 @@ opentitan_binary(
         "//sw/device/lib/dif:lc_ctrl",
         "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:flash_ctrl_testutils",
         "//sw/device/lib/testing:lc_ctrl_testutils",
         "//sw/device/lib/testing:otp_ctrl_testutils",
-        "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing/json:provisioning_data",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_console",
         "//sw/device/lib/testing/test_framework:ottf_test_config",
         "//sw/device/lib/testing/test_framework:status",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
-        "//sw/device/silicon_creator/manuf/data/ast:fake",
         "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
         "//sw/device/silicon_creator/manuf/lib:individualize",
         "//sw/device/silicon_creator/manuf/lib:otp_fields",
@@ -80,12 +96,14 @@ opentitan_binary(
     kind = "ram",
     linker_script = "//sw/device/silicon_creator/manuf/lib:sram_program_linker_script",
     deps = [
+        ":cp_device_id_library",
         ":flash_info_permissions",
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/dif:gpio",
         "//sw/device/lib/dif:lc_ctrl",
         "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/dif:pinmux",
@@ -93,7 +111,6 @@ opentitan_binary(
         "//sw/device/lib/testing:flash_ctrl_testutils",
         "//sw/device/lib/testing:lc_ctrl_testutils",
         "//sw/device/lib/testing:otp_ctrl_testutils",
-        "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing/json:provisioning_data",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_console",
@@ -107,38 +124,6 @@ opentitan_binary(
     ],
 )
 
-_CP_PROVISIONING_CMD_ARGS = """
-  --elf={sram_cp_provision}
-""" + CP_PROVISIONING_INPUTS
-
-_CP_PROVISIONING_HARNESS = "//sw/host/provisioning/cp"
-
-opentitan_test(
-    name = "cp_provision",
-    exec_env = {
-        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
-        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
-        "//hw/top_earlgrey:silicon_creator": None,
-    },
-    fpga = fpga_params(
-        binaries = {":sram_cp_provision": "sram_cp_provision"},
-        changes_otp = True,
-        needs_jtag = True,
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_unlocked0_manuf_empty",
-        tags = ["manuf"],
-        test_cmd = _CP_PROVISIONING_CMD_ARGS,
-        test_harness = _CP_PROVISIONING_HARNESS,
-    ),
-    silicon = silicon_params(
-        binaries = {":sram_cp_provision": "sram_cp_provision"},
-        changes_otp = True,
-        interface = "teacup",
-        needs_jtag = True,
-        test_cmd = _CP_PROVISIONING_CMD_ARGS,
-        test_harness = _CP_PROVISIONING_HARNESS,
-    ),
-)
-
 opentitan_test(
     name = "cp_provision_functest",
     exec_env = {
@@ -146,6 +131,7 @@ opentitan_test(
         "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
     },
     fpga = fpga_params(
+        timeout = "long",
         binaries = {
             ":sram_cp_provision": "sram_cp_provision",
             ":sram_cp_provision_functest": "sram_cp_provision_functest",
@@ -157,96 +143,91 @@ opentitan_test(
         test_cmd = """
             --provisioning-sram-elf={sram_cp_provision}
             --test-sram-elf={sram_cp_provision_functest}
-        """ + CP_PROVISIONING_INPUTS,
+        """,
         test_harness = "//sw/host/tests/manuf/cp_provision_functest",
     ),
 )
 
+[
+    device_id_header(
+        name = "ft_device_id_{}".format(sku),
+        headers = ["ft_device_id.h"],
+        mode = "ft",
+        sku_config = config["orchestrator_cfg"],
+        template = ":ft_device_id.c.tpl",
+    )
+    for sku, config in EARLGREY_SKUS.items()
+]
+
 [
     opentitan_binary(
-        name = "sram_ft_individualize_{}".format(otp_sw_cfgs),
+        name = "sram_ft_individualize_{}{}".format(sku, variant),
         testonly = True,
         srcs = ["sram_ft_individualize.c"],
         exec_env = {
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
             "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:sim_dv": None,
         },
         kind = "ram",
         linker_script = "//sw/device/silicon_creator/manuf/lib:sram_program_linker_script",
+        local_defines = defines,
         deps = [
             ":flash_info_permissions",
+            ":ft_device_id_{}_library".format(sku),
+            "//hw/top_earlgrey/ip/ast/data:ast_c_regs",
             "//hw/top_earlgrey/sw/autogen:top_earlgrey",
             "//sw/device/lib/arch:device",
+            "//sw/device/lib/base:abs_mmio",
             "//sw/device/lib/base:macros",
             "//sw/device/lib/dif:flash_ctrl",
+            "//sw/device/lib/dif:gpio",
             "//sw/device/lib/dif:otp_ctrl",
             "//sw/device/lib/dif:pinmux",
-            "//sw/device/lib/runtime:hart",
-            "//sw/device/lib/runtime:log",
-            "//sw/device/lib/testing:flash_ctrl_testutils",
-            "//sw/device/lib/testing:otp_ctrl_testutils",
+            "//sw/device/lib/runtime:print",
             "//sw/device/lib/testing:pinmux_testutils",
+            "//sw/device/lib/testing/json:provisioning_data",
             "//sw/device/lib/testing/test_framework:check",
             "//sw/device/lib/testing/test_framework:ottf_console",
             "//sw/device/lib/testing/test_framework:ottf_test_config",
             "//sw/device/lib/testing/test_framework:status",
             "//sw/device/lib/testing/test_framework:ujson_ottf",
-            "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
             "//sw/device/silicon_creator/manuf/lib:individualize",
             "//sw/device/silicon_creator/manuf/lib:otp_fields",
             "//sw/device/silicon_creator/manuf/lib:sram_start",
-            "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_earlgrey_sku_{}".format(otp_sw_cfgs),
+            "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_{}".format(config["otp"]),
         ],
     )
-    for otp_sw_cfgs in EARLGREY_A0_INDIVIDUALIZE_OTP_SW_CFGS
+    for sku, config in EARLGREY_SKUS.items()
+    for variant, defines in {
+        "": [],
+        "_ate": ["ATE=1"],
+    }.items()
 ]
 
 filegroup(
     name = "sram_ft_individualize_all",
     testonly = True,
     srcs = [
-        ":sram_ft_individualize_prodc",
-        ":sram_ft_individualize_sival",
+        ":sram_ft_individualize_{}{}".format(sku, variant)
+        for sku in EARLGREY_SKUS.keys()
+        for variant in [
+            "",
+            "_ate",
+        ]
     ],
 )
 
 cc_library(
-    name = "ft_personalize_base",
-    srcs = ["ft_personalize.c"],
+    name = "personalize_ext",
+    hdrs = ["personalize_ext.h"],
     deps = [
-        "//sw/device/lib/crypto/drivers:entropy",
+        "//sw/device/lib/base:status",
         "//sw/device/lib/dif:flash_ctrl",
-        "//sw/device/lib/dif:lc_ctrl",
-        "//sw/device/lib/dif:otp_ctrl",
-        "//sw/device/lib/dif:rstmgr",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:lc_ctrl_testutils",
-        "//sw/device/lib/testing:rstmgr_testutils",
         "//sw/device/lib/testing/json:provisioning_data",
-        "//sw/device/lib/testing/test_framework:check",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-        "//sw/device/lib/testing/test_framework:status",
-        "//sw/device/lib/testing/test_framework:ujson_ottf",
-        "//sw/device/silicon_creator/lib:attestation",
-        "//sw/device/silicon_creator/lib:attestation_key_diversifiers",
-        "//sw/device/silicon_creator/lib:dice",
-        "//sw/device/silicon_creator/lib:otbn_boot_services",
-        "//sw/device/silicon_creator/lib/base:util",
         "//sw/device/silicon_creator/lib/cert",
-        "//sw/device/silicon_creator/lib/cert:cdi_0_template_library",
-        "//sw/device/silicon_creator/lib/cert:cdi_1_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_cek_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_cik_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_ek_template_library",
-        "//sw/device/silicon_creator/lib/cert:uds_template_library",
-        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:keymgr",
-        "//sw/device/silicon_creator/lib/drivers:kmac",
-        "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
-        "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_earlgrey_sku_sival",
-        "//sw/device/silicon_creator/manuf/lib:personalize",
+        "//sw/device/silicon_creator/lib/sigverify:ecdsa_p256_key",
     ],
 )
 
@@ -254,106 +235,224 @@ cc_library(
     name = "tpm_perso_fw_ext",
     srcs = ["tpm_personalize_ext.c"],
     deps = [
+        ":personalize_ext",
         "//sw/device/lib/dif:flash_ctrl",
-        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
         "//sw/device/lib/testing/test_framework:status",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
-        "//sw/device/silicon_creator/lib:dice",
+        "//sw/device/silicon_creator/lib:attestation",
+        "//sw/device/silicon_creator/lib:otbn_boot_services",
         "//sw/device/silicon_creator/lib/cert",
-        "//sw/device/silicon_creator/lib/cert:tpm_cek_template_library",
-        "//sw/device/silicon_creator/lib/cert:tpm_cik_template_library",
+        "//sw/device/silicon_creator/lib/cert:tpm",
         "//sw/device/silicon_creator/lib/cert:tpm_ek_template_library",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
         "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+        "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
         "//sw/device/silicon_creator/manuf/lib:personalize",
     ],
 )
 
-_FT_PERSO_EXTS = [
-    {
-        "suffix": "",
-        "ext_libs": ["@provisioning_exts//:perso_fw_ext"],
-    },
-    {
-        "suffix": "_tpm_ext",
-        "ext_libs": [":tpm_perso_fw_ext"],
-    },
-]
+cc_library(
+    name = "perso_tlv_data",
+    srcs = ["perso_tlv_data.c"],
+    deps = [
+        ":perso_tlv_headers",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/cert",
+    ],
+)
+
+cc_test(
+    name = "perso_tlv_data_unittest",
+    srcs = ["perso_tlv_data_unittest.cc"],
+    deps = [
+        ":perso_tlv_data",
+        "@googletest//:gtest_main",
+    ],
+)
+
+# Need a separate library for the headers, because adding a dependency on
+#//sw/device/silicon_creator/lib/cert required by perso_tlv_data above causes
+# bindgen failures due to otbn (which is a cert dependency) requiring risc32
+# environment.
+cc_library(
+    name = "perso_tlv_headers",
+    hdrs = ["perso_tlv_data.h"],
+    deps = [
+        "//sw/device/lib/testing/json:provisioning_data",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/cert",
+    ],
+)
+
+manifest(d = {
+    "name": "manifest_perso",
+    "identifier": hex(CONST.ROM_EXT),
+    "manuf_state_creator": hex(CONST.MANUF_STATE.PERSO_INITIAL),
+    "visibility": ["//visibility:private"],
+    "version_major": "0",
+    # Release: 2025-10-29-RC00
+    "version_minor": "2025102900",
+    "security_version": "0xFFFFFFFF",
+})
 
 [
     opentitan_binary(
-        name = "ft_personalize{}".format(ext["suffix"]),
+        name = "ft_personalize_{}".format(sku),
         testonly = True,
         srcs = ["ft_personalize.c"],
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = {
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
             "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
         linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
-        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
-        deps = [":ft_personalize_base"] + ext["ext_libs"],
+        manifest = ":manifest_perso",
+        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+        deps = [
+            ":flash_info_permissions",
+            ":perso_tlv_data",
+            ":personalize_ext",
+            "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+            "//sw/device/lib/crypto/drivers:entropy",
+            "//sw/device/lib/dif:flash_ctrl",
+            "//sw/device/lib/dif:gpio",
+            "//sw/device/lib/dif:lc_ctrl",
+            "//sw/device/lib/dif:otp_ctrl",
+            "//sw/device/lib/dif:pinmux",
+            "//sw/device/lib/dif:rstmgr",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing:flash_ctrl_testutils",
+            "//sw/device/lib/testing:lc_ctrl_testutils",
+            "//sw/device/lib/testing:otp_ctrl_testutils",
+            "//sw/device/lib/testing:pinmux_testutils",
+            "//sw/device/lib/testing:rstmgr_testutils",
+            "//sw/device/lib/testing/json:provisioning_data",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/lib/testing/test_framework:status",
+            "//sw/device/lib/testing/test_framework:ujson_ottf",
+            "//sw/device/silicon_creator/lib:attestation",
+            "//sw/device/silicon_creator/lib:boot_data",
+            "//sw/device/silicon_creator/lib:otbn_boot_services",
+            "//sw/device/silicon_creator/lib/base:chip",
+            "//sw/device/silicon_creator/lib/base:util",
+            "//sw/device/silicon_creator/lib/cert",
+            "//sw/device/silicon_creator/lib/cert:cdi_0_template_library",
+            "//sw/device/silicon_creator/lib/cert:cdi_1_template_library",
+            "//sw/device/silicon_creator/lib/cert:dice_chain",
+            "//sw/device/silicon_creator/lib/cert:uds_template_library",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/drivers:hmac",
+            "//sw/device/silicon_creator/lib/drivers:keymgr",
+            "//sw/device/silicon_creator/lib/drivers:kmac",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+            "//sw/device/silicon_creator/lib/drivers:watchdog",
+            "//sw/device/silicon_creator/lib/ownership:owner_block",
+            "//sw/device/silicon_creator/lib/ownership:ownership_key",
+            "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
+            "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_{}".format(config["otp"]),
+            "//sw/device/silicon_creator/manuf/lib:personalize",
+        ] + config["dice_libs"] + config["device_ext_libs"] + config.get("ownership_libs", []),
     )
-    for ext in _FT_PERSO_EXTS
+    for sku, config in EARLGREY_SKUS.items()
 ]
 
-config_setting(
-    name = "ckms_cert_endorsement_params",
-    flag_values = {":endorse_certs_with_ckms": "True"},
-)
+[
+    opentitan_binary_assemble(
+        name = "ft_fw_bundle_{}".format(sku),
+        testonly = True,
+        bins = {
+            # Use a pre-compiled perso binary if the SKU defines it,
+            # else use the label of the opentitan_binary for the SKU.
+            config.get(
+                "perso_bin",
+                ":ft_personalize_{}".format(sku),
+            ): SLOTS["a"],
+            config["rom_ext"]: SLOTS["b"],
+            config["owner_fw"]: OWNER_SLOTS["b"],
+        },
+        exec_env = [
+            "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys",
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+            "//hw/top_earlgrey:silicon_creator",
+        ],
+    )
+    for sku, config in EARLGREY_SKUS.items()
+]
 
-bool_flag(
-    name = "endorse_certs_with_ckms",
-    build_setting_default = False,
+filegroup(
+    name = "ft_personalize_all",
+    testonly = True,
+    # The depset(...).to_list() syntax removes duplicate bazel targets. Some
+    # SKUs have duplicate "staging" versions that are identical to their
+    # production counterparts, including the perso binaries used, except for CA
+    # keys, so we need to remove duplicates.
+    srcs = depset([
+                      # Select pre-signed / checked-in perso binaries over ones
+                      # built on the fly with fake keys if a pre-signed one
+                      # exists.
+                      config.get(
+                          "perso_bin",
+                          ":ft_personalize_{}".format(sku),
+                      )
+                      for sku, config in EARLGREY_SKUS.items()
+                  ] +
+                  [
+                      ":ft_fw_bundle_{}".format(sku)
+                      for sku in EARLGREY_SKUS.keys()
+                  ]).to_list(),
 )
 
-_FT_PROVISIONING_CMD_ARGS = """
-  --elf={sram_ft_individualize}
-  --bootstrap={ft_personalize}
-""" + FT_PROVISIONING_INPUTS + select({
-    ":ckms_cert_endorsement_params": CLOUD_KMS_CERT_ENDORSEMENT_PARAMS,
-    "//conditions:default": LOCAL_CERT_ENDORSEMENT_PARAMS,
-})
-
-_FT_PROVISIONING_HARNESS = "//sw/host/provisioning/ft"
-
 [
-    opentitan_test(
-        name = "ft_provision{}".format(ext["suffix"]),
-        exec_env = {
-            "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
-            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
-            "//hw/top_earlgrey:silicon_creator": None,
-        },
-        fpga = fpga_params(
-            binaries = {
-                ":sram_ft_individualize_sival": "sram_ft_individualize",
-                ":ft_personalize{}".format(ext["suffix"]): "ft_personalize",
-            },
-            changes_otp = True,
-            data = FT_PERSONALIZE_KEYS,
-            needs_jtag = True,
-            otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_locked0_manuf_initialized",
-            tags = [
-                "lc_test_locked0",
-                "manuf",
-            ],
-            test_cmd = _FT_PROVISIONING_CMD_ARGS,
-            test_harness = _FT_PROVISIONING_HARNESS,
-        ),
-        silicon = silicon_params(
-            binaries = {
-                ":sram_ft_individualize_sival": "sram_ft_individualize",
-                ":ft_personalize{}".format(ext["suffix"]): "ft_personalize",
-            },
-            changes_otp = True,
-            data = FT_PERSONALIZE_KEYS,
-            interface = "teacup",
-            needs_jtag = True,
-            test_cmd = _FT_PROVISIONING_CMD_ARGS,
-            test_harness = _FT_PROVISIONING_HARNESS,
-        ),
+    offline_presigning_artifacts(
+        name = "provisioning_{}".format(sku),
+        testonly = True,
+        srcs = [":ft_personalize_{}".format(sku)],
+        ecdsa_key = data["ecdsa_key"],
+        manifest = ":manifest_perso",
+        spx_key = data["spx_key"],
+        tags = ["manual"],
     )
-    for ext in _FT_PERSO_EXTS
+    for sku, data in EARLGREY_SKUS.items()
+    if not disqualified_for_signing(sku, data)
 ]
+
+pkg_tar(
+    name = "digests",
+    testonly = True,
+    srcs = [
+        ":provisioning_{}".format(sku)
+        for sku, data in EARLGREY_SKUS.items()
+        if not disqualified_for_signing(sku, data)
+    ],
+    mode = "0644",
+    tags = ["manual"],
+)
+
+offline_signature_attach(
+    name = "signed",
+    testonly = True,
+    srcs = [
+        ":provisioning_{}".format(sku)
+        for sku, data in EARLGREY_SKUS.items()
+        if not disqualified_for_signing(sku, data)
+    ],
+    ecdsa_signatures = [
+        "//sw/device/silicon_creator/manuf/base/signatures:ecdsa_signatures",
+    ] + depset([
+        "{}:ecdsa_signatures".format(data["signature_prefix"])
+        for sku, data in EARLGREY_SKUS.items()
+        if data["signature_prefix"] and not disqualified_for_signing(sku, data)
+    ]).to_list(),
+    spx_signatures = [
+        "//sw/device/silicon_creator/manuf/base/signatures:spx_signatures",
+    ] + depset([
+        "{}:spx_signatures".format(data["signature_prefix"])
+        for sku, data in EARLGREY_SKUS.items()
+        if data["signature_prefix"] and not disqualified_for_signing(sku, data)
+    ]).to_list(),
+    tags = ["manual"],
+)
diff --git a/sw/device/silicon_creator/manuf/base/binaries/BUILD b/sw/device/silicon_creator/manuf/base/binaries/BUILD
new file mode 100644
index 0000000000000..edb7dd3206fe6
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/binaries/BUILD
@@ -0,0 +1,72 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules/opentitan:cc.bzl", "exec_env_filegroup")
+load("//rules/opentitan:legacy.bzl", "scramble_flash_vmem", "vmem_file")
+load("//rules:files.bzl", "copy_files")
+
+package(default_visibility = ["//visibility:public"])
+
+copy_files(
+    name = "copy_signed",
+    testonly = True,
+    srcs = [
+        "//sw/device/silicon_creator/manuf/base:signed",
+    ],
+    filter = [
+        "ft_personalize_sival",
+    ],
+    relative_to = ":BUILD",
+    tags = ["manual"],
+)
+
+exec_env_filegroup(
+    name = "ft_personalize_sival",
+    testonly = True,
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": "cw310",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": "cw340",
+        "//hw/top_earlgrey:silicon_creator": "silicon",
+    },
+    files = {
+        "ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.signed.bin": "cw310",
+        "ft_personalize_sival_fpga_cw340_rom_with_fake_keys.signed.bin": "cw340",
+        "ft_personalize_sival_silicon_creator.signed.bin": "silicon",
+    },
+)
+
+# The below rule sets (bin_to_vmem, scramble_flash_vmem, and filegroup)
+# are needed to run the perso bin in sim.
+vmem_file(
+    name = "ft_personalize_sival_silicon_creator_vmem64_signed",
+    testonly = True,
+    src = ":ft_personalize_sival_silicon_creator.signed.bin",
+    word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
+)
+
+scramble_flash_vmem(
+    name = "ft_personalize_sival_silicon_creator_scr_vmem64_signed",
+    testonly = True,
+    src = ":ft_personalize_sival_silicon_creator_vmem64_signed",
+)
+
+filegroup(
+    name = "ft_personalize_sival_dv_files",
+    testonly = True,
+    srcs = [
+        ":ft_personalize_sival_silicon_creator{}".format(file_type)
+        for file_type in [
+            ".signed.bin",
+            "_vmem64_signed",
+            "_scr_vmem64_signed",
+        ]
+    ],
+)
+
+# This alias is required for the DV testbench to locate these files.
+filegroup(
+    name = "ft_personalize_sival_silicon_creator",
+    testonly = True,
+    srcs = [":ft_personalize_sival_silicon_creator_vmem64_signed"],
+)
diff --git a/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.signed.bin b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.signed.bin
new file mode 100644
index 0000000000000..170940b542bdd
Binary files /dev/null and b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.signed.bin differ
diff --git a/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.signed.bin b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.signed.bin
new file mode 100644
index 0000000000000..f833698ad58e8
Binary files /dev/null and b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.signed.bin differ
diff --git a/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_silicon_creator.signed.bin b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..dfde988c5302c
Binary files /dev/null and b/sw/device/silicon_creator/manuf/base/binaries/ft_personalize_sival_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/manuf/base/cp_device_id.c.tpl b/sw/device/silicon_creator/manuf/base/cp_device_id.c.tpl
new file mode 100644
index 0000000000000..278dfa1425d5d
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/cp_device_id.c.tpl
@@ -0,0 +1,10 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/manuf/base/cp_device_id.h"
+
+/**
+ * CP (SKU specific portion of) device ID.
+ */
+const uint32_t kCpDeviceId[4] = {${device_id}};
diff --git a/sw/device/silicon_creator/manuf/base/cp_device_id.h b/sw/device/silicon_creator/manuf/base/cp_device_id.h
new file mode 100644
index 0000000000000..60d2b18824425
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/cp_device_id.h
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_CP_DEVICE_ID_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_CP_DEVICE_ID_H_
+
+#include <stdint.h>
+
+/**
+ * CP device ID.
+ */
+extern const uint32_t kCpDeviceId[4];
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_CP_DEVICE_ID_H_
diff --git a/sw/device/silicon_creator/manuf/base/flash_info_permissions.h b/sw/device/silicon_creator/manuf/base/flash_info_permissions.h
index 89dc72a4c555e..40d1f5971ca79 100644
--- a/sw/device/silicon_creator/manuf/base/flash_info_permissions.h
+++ b/sw/device/silicon_creator/manuf/base/flash_info_permissions.h
@@ -9,9 +9,12 @@
 
 /**
  * Access permissions for flash info page 0 (holds device_id and manuf_state).
+ *
+ * We keep ECC disabled on this page as the ATE cannot use ECC when writing this
+ * page earlier during the provisioning process.
  */
 dif_flash_ctrl_region_properties_t kFlashInfoPage0Permissions = {
-    .ecc_en = kMultiBitBool4True,
+    .ecc_en = kMultiBitBool4False,
     .high_endurance_en = kMultiBitBool4False,
     .erase_en = kMultiBitBool4True,
     .prog_en = kMultiBitBool4True,
@@ -20,6 +23,9 @@ dif_flash_ctrl_region_properties_t kFlashInfoPage0Permissions = {
 
 /**
  * Access permissions for flash info page 3 (holds wafer_auth_secret).
+ *
+ * Note: scrambling must be disabled as the flash scrambling seeds are not
+ * programmed into OTP until the individualization FW is executed.
  */
 dif_flash_ctrl_region_properties_t kFlashInfoPage3WritePermissions = {
     .ecc_en = kMultiBitBool4True,
@@ -29,6 +35,20 @@ dif_flash_ctrl_region_properties_t kFlashInfoPage3WritePermissions = {
     .rd_en = kMultiBitBool4False,
     .scramble_en = kMultiBitBool4False};
 
+/**
+ * Access permissions for flash info page 3 (holds wafer_auth_secret).
+ *
+ * Note: scrambling and ECC must be disabled as it is disabled when the page is
+ * written during CP.
+ */
+dif_flash_ctrl_region_properties_t kFlashInfoPage3ReadPermissions = {
+    .ecc_en = kMultiBitBool4False,
+    .high_endurance_en = kMultiBitBool4False,
+    .erase_en = kMultiBitBool4False,
+    .prog_en = kMultiBitBool4False,
+    .rd_en = kMultiBitBool4True,
+    .scramble_en = kMultiBitBool4False};
+
 /**
  * Access permissions for flash info page 4 (holds attestation key seeds).
  */
diff --git a/sw/device/silicon_creator/manuf/base/ft_device_id.c.tpl b/sw/device/silicon_creator/manuf/base/ft_device_id.c.tpl
new file mode 100644
index 0000000000000..24a16e45fd199
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/ft_device_id.c.tpl
@@ -0,0 +1,10 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/manuf/base/ft_device_id.h"
+
+/**
+ * FT (SKU specific portion of) device ID.
+ */
+const uint32_t kFtDeviceId[4] = {${device_id}};
diff --git a/sw/device/silicon_creator/manuf/base/ft_device_id.h b/sw/device/silicon_creator/manuf/base/ft_device_id.h
new file mode 100644
index 0000000000000..6e30bda2f57fb
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/ft_device_id.h
@@ -0,0 +1,15 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_FT_DEVICE_ID_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_FT_DEVICE_ID_H_
+
+#include <stdint.h>
+
+/**
+ * FT (SKU specific portion of) device ID.
+ */
+extern const uint32_t kFtDeviceId[4];
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_FT_DEVICE_ID_H_
diff --git a/sw/device/silicon_creator/manuf/base/ft_personalize.c b/sw/device/silicon_creator/manuf/base/ft_personalize.c
index 6873f2a7f6bf8..2caf6b2dd5da0 100644
--- a/sw/device/silicon_creator/manuf/base/ft_personalize.c
+++ b/sw/device/silicon_creator/manuf/base/ft_personalize.c
@@ -2,16 +2,25 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include <stdalign.h>
+
 #include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/multibits.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/dif/dif_gpio.h"
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_rstmgr.h"
 #include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/json/provisioning_data.h"
 #include "sw/device/lib/testing/lc_ctrl_testutils.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -19,42 +28,91 @@
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/silicon_creator/lib/attestation.h"
-#include "sw/device/silicon_creator/lib/attestation_key_diversifiers.h"
 #include "sw/device/silicon_creator/lib/base/boot_measurements.h"
+#include "sw/device/silicon_creator/lib/base/chip.h"
 #include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/cert/cdi_0.h"  // Generated.
 #include "sw/device/silicon_creator/lib/cert/cdi_1.h"  // Generated.
 #include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/cert/dice.h"
+#include "sw/device/silicon_creator/lib/cert/dice_chain.h"
 #include "sw/device/silicon_creator/lib/cert/uds.h"  // Generated.
-#include "sw/device/silicon_creator/lib/dice.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/drivers/keymgr.h"
 #include "sw/device/silicon_creator/lib/drivers/kmac.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/otp.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/drivers/watchdog.h"
 #include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
 #include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+#include "sw/device/silicon_creator/manuf/base/flash_info_permissions.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+#include "sw/device/silicon_creator/manuf/base/personalize_ext.h"
 #include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h"
+#include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/personalize.h"
 
 #include "flash_ctrl_regs.h"  // Generated.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otp_ctrl_regs.h"  // Generated.
+
+enum {
+  /**
+   * Size of the largest OTP partition to be measured.
+   */
+  kDiceMeasuredOtpPartitionMaxSizeIn32bitWords =
+      (OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+       OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+      sizeof(uint32_t),
+};
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+static uint32_t otp_state[kDiceMeasuredOtpPartitionMaxSizeIn32bitWords] = {0};
+
+// clang-format off
+static_assert(
+    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE &&
+    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE &&
+    OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE > OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE,
+    "The largest DICE measured OTP partition is no longer the "
+    "OwnerSwCfg partition. Update the "
+    "kDiceMeasuredOtpPartitionMaxSizeIn32bitWords constant.");
+// clang-format on
 
 /**
  * Peripheral handles.
  */
 static dif_flash_ctrl_state_t flash_ctrl_state;
+static dif_gpio_t gpio;
 static dif_lc_ctrl_t lc_ctrl;
 static dif_otp_ctrl_t otp_ctrl;
+static dif_pinmux_t pinmux;
 static dif_rstmgr_t rstmgr;
 
-/**
- * RMA unlock token wrapping data.
- */
-static ecc_p256_public_key_t host_ecc_pk;
-static wrapped_rma_unlock_token_t wrapped_rma_token;
+// ATE Indicator GPIOs.
+static const dif_gpio_pin_t kGpioPinTestStart = 0;
+static const dif_gpio_pin_t kGpioPinTestDone = 1;
+static const dif_gpio_pin_t kGpioPinTestError = 2;
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 3;
+static const dif_gpio_pin_t kGpioPinSpiConsoleRxReady = 4;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .console.putbuf_buffered = true,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
 
 /**
  * Keymgr binding values.
@@ -65,77 +123,130 @@ static keymgr_binding_value_t sealing_binding_value = {.data = {0}};
 /**
  * Certificate data.
  */
+static hmac_digest_t kZeroDigest = {.digest = {0, 0, 0, 0, 0, 0, 0, 0}};
+static hmac_digest_t otp_creator_sw_cfg_measurement;
+static hmac_digest_t otp_owner_sw_cfg_measurement;
+static hmac_digest_t otp_rot_creator_auth_codesign_measurement;
+static hmac_digest_t otp_rot_creator_auth_state_measurement;
 static manuf_certgen_inputs_t certgen_inputs;
 static hmac_digest_t uds_endorsement_key_id;
 static hmac_digest_t uds_pubkey_id;
 static hmac_digest_t cdi_0_pubkey_id;
 static hmac_digest_t cdi_1_pubkey_id;
-static dice_cert_key_id_pair_t uds_key_ids = {
+static cert_key_id_pair_t uds_key_ids = {
     .endorsement = &uds_endorsement_key_id,
     .cert = &uds_pubkey_id,
 };
-static dice_cert_key_id_pair_t cdi_0_key_ids = {
+static cert_key_id_pair_t cdi_0_key_ids = {
     .endorsement = &uds_pubkey_id,
     .cert = &cdi_0_pubkey_id,
 };
-static dice_cert_key_id_pair_t cdi_1_key_ids = {
+static cert_key_id_pair_t cdi_1_key_ids = {
     .endorsement = &cdi_0_pubkey_id,
     .cert = &cdi_1_pubkey_id,
 };
 static ecdsa_p256_public_key_t curr_pubkey = {.x = {0}, .y = {0}};
-static manuf_certs_t tbs_certs = {
-    .num_certs = 3,
-    .next_free = 0,
-    .tbs = {true, false, false, false, false, false, false, false},
-    .certs = {0},
-};
-static manuf_certs_t endorsed_certs;
+static ecdsa_p256_public_key_t uds_pubkey = {.x = {0}, .y = {0}};
+static perso_blob_t perso_blob_to_host;    // Perso data device => host.
+static perso_blob_t perso_blob_from_host;  // Perso data host => device.
 
 /**
  * Certificates flash info page layout.
  */
 static uint8_t all_certs[8192];
+// 1K should be enough for the largest certificate perso LTV object.
+enum { kBufferSize = 1024 };
+static alignas(uint32_t) uint8_t cert_buffer[kBufferSize];
+static alignas(uint32_t) dice_page_t dice_page;
+static size_t uds_offset;
 static size_t cdi_0_offset;
 static size_t cdi_1_offset;
-static char *kDiceCertNames[] = {"UDS", "CDI_0", "CDI_1"};
 static cert_flash_info_layout_t cert_flash_layout[] = {
+    {
+        // The DICE UDS cert is placed on this page since it must remain stable
+        // post manufacturing. This page should never be erased by ROM_EXT, nor
+        // owner firmware.
+        .used = true,
+        .need_digest = true,
+        .group_name = "FACTORY",
+        .info_page = &kFlashCtrlInfoPageFactoryCerts,
+        .num_certs = 1,
+    },
     {
         .used = true,
+        .need_digest = true,
         .group_name = "DICE",
         .info_page = &kFlashCtrlInfoPageDiceCerts,
-        .num_certs = 3,
-        .names = kDiceCertNames,
+        .num_certs = 2,
     },
     // These flash info pages can be used by provisioning extensions to store
     // additional certificates SKU owners may desire to provision.
     {
         .used = false,
+        .need_digest = false,
         .group_name = "Ext0",
-        .info_page = &kFlashCtrlInfoPageOwnerReserved7,
+        .info_page = &kFlashCtrlInfoPageOwnerReserved6,
         .num_certs = 0,
-        .names = NULL,
     },
     {
         .used = false,
+        .need_digest = false,
         .group_name = "Ext1",
-        .info_page = &kFlashCtrlInfoPageOwnerReserved8,
+        .info_page = &kFlashCtrlInfoPageOwnerReserved7,
         .num_certs = 0,
-        .names = NULL,
     },
 };
 
-static void log_self_hash(void) {
-  // clang-format off
-  LOG_INFO("Personalization Firmware Hash: 0x%08x%08x%08x%08x%08x%08x%08x%08x",
-           boot_measurements.rom_ext.data[7],
-           boot_measurements.rom_ext.data[6],
-           boot_measurements.rom_ext.data[5],
-           boot_measurements.rom_ext.data[4],
-           boot_measurements.rom_ext.data[3],
-           boot_measurements.rom_ext.data[2],
-           boot_measurements.rom_ext.data[1],
-           boot_measurements.rom_ext.data[0]);
-  // clang-format on
+/**
+ * Ownership initialization function.
+ */
+OT_WEAK rom_error_t sku_creator_owner_init(boot_data_t *bootdata) {
+  OT_DISCARD(bootdata);
+  LOG_ERROR("No ownership initialization");
+  return kErrorOk;
+}
+
+/**
+ * Pushes the hash of the personalization firmware to the perso blob.
+ */
+static status_t log_self_hash(perso_blob_t *perso_blob_to_host) {
+  perso_tlv_object_header_t tlv_header = 0;
+  PERSO_TLV_SET_FIELD(Objh, Type, tlv_header, kPersoObjectTypePersoSha256Hash);
+  PERSO_TLV_SET_FIELD(
+      Objh, Size, tlv_header,
+      sizeof(perso_tlv_object_header_t) + sizeof(keymgr_binding_value_t));
+  TRY(perso_tlv_push_to_perso_blob(
+      &tlv_header, sizeof(perso_tlv_object_header_t), perso_blob_to_host));
+  TRY(perso_tlv_push_to_perso_blob(boot_measurements.rom_ext.data,
+                                   sizeof(keymgr_binding_value_t),
+                                   perso_blob_to_host));
+  perso_blob_to_host->num_objs++;
+  return OK_STATUS();
+}
+
+/*
+ * Return a pointer to the ROM_EXT manifest located in the slot a.
+ */
+static const manifest_t *rom_ext_manifest_a_get(void) {
+  return (const manifest_t *)TOP_EARLGREY_EFLASH_BASE_ADDR;
+}
+
+/*
+ * Return a pointer to the ROM_EXT manifest located in the slot b.
+ */
+static const manifest_t *rom_ext_manifest_b_get(void) {
+  return (const manifest_t *)(TOP_EARLGREY_EFLASH_BASE_ADDR +
+                              (TOP_EARLGREY_EFLASH_SIZE_BYTES / 2));
+}
+
+extern const uint32_t kCreatorSwCfgManufStateValue;
+
+/*
+ * Check if the `identifier` field in slot_b is a ROM_EXT.
+ */
+static status_t check_next_slot_bootable(void) {
+  TRY_CHECK(rom_ext_manifest_b_get()->identifier == CHIP_ROM_EXT_IDENTIFIER);
+  return OK_STATUS();
 }
 
 /**
@@ -145,10 +256,13 @@ static status_t peripheral_handles_init(void) {
   TRY(dif_flash_ctrl_init_state(
       &flash_ctrl_state,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
   TRY(dif_lc_ctrl_init(mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR),
                        &lc_ctrl));
   TRY(dif_otp_ctrl_init(
       mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
+  TRY(dif_pinmux_init(mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR),
+                      &pinmux));
   TRY(dif_rstmgr_init(mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR),
                       &rstmgr));
   return OK_STATUS();
@@ -168,12 +282,94 @@ static void sw_reset(void) {
  */
 static status_t config_and_erase_certificate_flash_pages(void) {
   flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageAttestationKeySeeds);
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageFactoryCerts);
   flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageDiceCerts);
+  // No need to erase the kFlashCtrlInfoPageAttestationKeySeeds page as it is
+  // erased on the first call to `manuf_personalize_flash_asymm_key_seed()`.
+  TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageFactoryCerts,
+                            kFlashCtrlEraseTypePage));
   TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageDiceCerts,
                             kFlashCtrlEraseTypePage));
   return OK_STATUS();
 }
 
+/**
+ * Erase all of the owner's INFO pages so that they're in a known state.
+ */
+static status_t erase_owner_info_pages(owner_config_t *config) {
+  const flash_ctrl_info_page_t *pages[] = {
+      &kFlashCtrlInfoPageOwnerReserved0, &kFlashCtrlInfoPageOwnerReserved1,
+      &kFlashCtrlInfoPageOwnerReserved2, &kFlashCtrlInfoPageOwnerReserved3,
+      &kFlashCtrlInfoPageOwnerReserved4, &kFlashCtrlInfoPageOwnerReserved5,
+      &kFlashCtrlInfoPageOwnerReserved6, &kFlashCtrlInfoPageOwnerReserved7,
+  };
+
+  // First, initialize all of the owner INFO pages with ECC & Scrambling.
+  for (size_t i = 0; i < ARRAYSIZE(pages); ++i) {
+    flash_ctrl_cfg_t cfg = {
+        .scrambling = kMultiBitBool4True,
+        .ecc = kMultiBitBool4True,
+        .he = kMultiBitBool4False,
+    };
+    flash_ctrl_info_cfg_set(pages[i], cfg);
+  }
+
+  // Next, overwrite the INFO page configuration for those pages defined
+  // in the owner block.
+  TRY(owner_block_info_apply(config->info));
+
+  // Finally, erase each page.
+  for (size_t i = 0; i < ARRAYSIZE(pages); ++i) {
+    flash_ctrl_perms_t perms = {
+        .read = kMultiBitBool4True,
+        .write = kMultiBitBool4True,
+        .erase = kMultiBitBool4True,
+    };
+    flash_ctrl_info_perms_set(pages[i], perms);
+    TRY(flash_ctrl_info_erase(pages[i], kFlashCtrlEraseTypePage));
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * Helper function to compute measurements of various OTP partitions that are to
+ * be included in attestation certificates.
+ */
+static status_t measure_otp_partition(otp_partition_t partition,
+                                      hmac_digest_t *measurement,
+                                      bool use_expected_values) {
+  // Compute the digest.
+  otp_dai_read(partition, /*relative_address=*/0, otp_state,
+               kOtpPartitions[partition].size / sizeof(uint32_t));
+
+  if (use_expected_values) {
+    // Sets the expected values for fields in the OTP that are not provisioned
+    // until the final stages of personalization.
+    if (partition == kOtpPartitionOwnerSwCfg) {
+      manuf_individualize_device_partition_expected_read(
+          kDifOtpCtrlPartitionOwnerSwCfg, (uint8_t *)otp_state);
+    } else if (partition == kOtpPartitionCreatorSwCfg) {
+      manuf_individualize_device_partition_expected_read(
+          kDifOtpCtrlPartitionCreatorSwCfg, (uint8_t *)otp_state);
+    }
+  }
+
+  uint32_t *otp_state_ptr = otp_state;
+  size_t otp_state_size = kOtpPartitions[partition].size;
+  if (partition == kOtpPartitionCreatorSwCfg) {
+    // Note: we purposely exclude the AST configuration data field of this
+    // partition from the digest calculation. See
+    // sw/device/silicon_creator/manuf/lib/util.c for why.
+    otp_state_ptr = &otp_state[OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_SIZE /
+                               sizeof(uint32_t)];
+    otp_state_size -= OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_SIZE;
+  }
+  hmac_sha256(otp_state_ptr, otp_state_size, measurement);
+
+  return OK_STATUS();
+}
+
 /**
  * Provision OTP SECRET{1,2} partitions, keymgr flash info pages, enable flash
  * scrambling, and reboot.
@@ -184,20 +380,27 @@ static status_t personalize_otp_and_flash_secrets(ujson_t *uj) {
   if (!status_ok(manuf_personalize_device_secret1_check(&otp_ctrl))) {
     TRY(manuf_personalize_device_secret1(&lc_ctrl, &otp_ctrl));
   }
-  if (!status_ok(manuf_individualize_device_creator_sw_cfg_check(&otp_ctrl))) {
-    TRY(manuf_individualize_device_flash_data_default_cfg(&otp_ctrl));
-    TRY(manuf_individualize_device_creator_sw_cfg_lock(&otp_ctrl));
-    LOG_INFO("Bootstrap requested.");
+  if (!status_ok(
+          manuf_individualize_device_flash_data_default_cfg_check(&otp_ctrl))) {
+    TRY(manuf_individualize_device_field_cfg(
+        &otp_ctrl,
+        OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET));
+    base_printf("Bootstrap requested.\n");
     wait_for_interrupt();
   }
 
   // Provision OTP Secret2 partition and flash info pages 1, 2, and 4 (keymgr
   // and DICE keygen seeds).
   if (!status_ok(manuf_personalize_device_secrets_check(&otp_ctrl))) {
-    LOG_INFO("Waiting for host public key ...");
-    TRY(ujson_deserialize_ecc_p256_public_key_t(uj, &host_ecc_pk));
+    lc_token_hash_t token_hash;
+    // Wait for the host to send the RMA unlock token hash over the console.
+    base_printf("Waiting For RMA Unlock Token Hash ...\n");
+    TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, true));
+    TRY(UJSON_WITH_CRC(ujson_deserialize_lc_token_hash_t, uj, &token_hash));
+    TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, false));
+
     TRY(manuf_personalize_device_secrets(&flash_ctrl_state, &lc_ctrl, &otp_ctrl,
-                                         &host_ecc_pk, &wrapped_rma_token));
+                                         &token_hash));
     TRY(manuf_personalize_flash_asymm_key_seed(
         &flash_ctrl_state, kFlashInfoFieldUdsAttestationKeySeed,
         kAttestationSeedWords));
@@ -214,8 +417,6 @@ static status_t personalize_otp_and_flash_secrets(ujson_t *uj) {
         &flash_ctrl_state, kFlashInfoFieldAttestationKeyGenVersion,
         /*data_in=*/&kKeyGenVersion, /*num_words=*/1,
         /*erase_page_before_write=*/false));
-    LOG_INFO("Exporting RMA token ...");
-    RESP_OK(ujson_serialize_wrapped_rma_unlock_token_t, uj, &wrapped_rma_token);
     sw_reset();
   }
 
@@ -223,35 +424,31 @@ static status_t personalize_otp_and_flash_secrets(ujson_t *uj) {
 }
 
 /**
- * Sets the attestation binding to the ROM_EXT measurement, and the sealing
- * binding to all zeros.
+ * Sets the attestation and sealing binding to all zeros.
  *
- * The sealing binding value is set to all zeros as it is unused in the current
- * personalization flow. This may be changed in the future.
+ * The attestation binding (and subsequently CDI_0) will be updated later when
+ * the ROM_EXT boots for the first time.
  */
-static void compute_keymgr_owner_int_binding(manuf_certgen_inputs_t *inputs) {
-  memcpy(attestation_binding_value.data, inputs->rom_ext_measurement,
-         kDiceMeasurementSizeInBytes);
+static void compute_keymgr_owner_int_binding(void) {
+  memset(attestation_binding_value.data, 0, kDiceMeasurementSizeInBytes);
+  // In the silicon_creator stage, we set the sealing binding to the
+  // manifest->identifier of the ROM_EXT stage.
   memset(sealing_binding_value.data, 0, kDiceMeasurementSizeInBytes);
+  sealing_binding_value.data[0] = CHIP_ROM_EXT_IDENTIFIER;
 }
 
 /**
- * Sets the attestation binding to a combination of the Owner firmware and
- * Ownership Manifest measurements, and the sealing binding to all zeros.
+ * Sets the attestation binding to all zeros as it (and subsequently CDI_1) will
+ * be updated later when the ROM_EXT boots for the first time.
  *
- * The sealing binding value is set to all zeros as it is unused in the current
- * personalization flow. This may be changed in the future.
+ * The sealing binding value is set to the TEST application key domain.
  */
-static void compute_keymgr_owner_binding(manuf_certgen_inputs_t *inputs) {
-  hmac_digest_t combined_measurements;
-  hmac_sha256_init();
-  hmac_sha256_update((unsigned char *)inputs->owner_measurement,
-                     kDiceMeasurementSizeInBytes);
-  hmac_sha256_update((unsigned char *)inputs->owner_manifest_measurement,
-                     kDiceMeasurementSizeInBytes);
-  memcpy(attestation_binding_value.data, combined_measurements.digest,
-         kDiceMeasurementSizeInBytes);
+static void compute_keymgr_owner_binding(void) {
+  memset(attestation_binding_value.data, 0, kDiceMeasurementSizeInBytes);
+  // We expect the owner to use a Application Key binding  of
+  // {`prod`, 0, ... }.
   memset(sealing_binding_value.data, 0, kDiceMeasurementSizeInBytes);
+  sealing_binding_value.data[0] = kOwnerAppDomainProd;
 }
 
 /**
@@ -263,45 +460,51 @@ static void compute_keymgr_owner_binding(manuf_certgen_inputs_t *inputs) {
  */
 static status_t hash_certificate(const flash_ctrl_info_page_t *page,
                                  size_t offset, size_t *size) {
-  uint8_t buffer[1024];  // 1K should be enough for the largest certificate.
-  uint32_t cert_size;
-  uint32_t bytes_read;
-
-  // Read the first word of the certificate which contains it's size.
-  TRY(flash_ctrl_info_read(page, offset, 1, buffer));
-  bytes_read = sizeof(uint32_t);
-  cert_size = cert_x509_asn1_decode_size_header(buffer);
-  if (cert_size == 0) {
-    LOG_ERROR("Inconsistent certificate header %02x %02x page %x:%x", buffer[0],
-              buffer[1], page->base_addr, offset);
+  memset(cert_buffer, 0, sizeof(cert_buffer));
+
+  // Read first word of the certificate perso LTV object (contains the size).
+  perso_tlv_object_header_t objh;
+  uint16_t obj_size;
+  TRY(flash_ctrl_info_read(page, offset, 1, cert_buffer));
+  memcpy(&objh, cert_buffer, sizeof(perso_tlv_object_header_t));
+  PERSO_TLV_GET_FIELD(Objh, Size, objh, &obj_size);
+
+  // Validate the perso LTV object size.
+  if (obj_size == 0) {
+    LOG_ERROR(
+        "Inconsistent certificate perso LTV object header %02x %02x at "
+        "page:offset %x:%x",
+        cert_buffer[0], cert_buffer[1], page->base_addr, offset);
     return DATA_LOSS();
   }
-  if (cert_size > sizeof(buffer)) {
-    LOG_ERROR("Bad certificate size %d page %x:%x", cert_size, page->base_addr,
-              offset);
+  if (obj_size > sizeof(cert_buffer)) {
+    LOG_ERROR("Bad certificate perso LTV object size %d at page:offset %x:%x",
+              obj_size, page->base_addr, offset);
     return DATA_LOSS();
   }
-  if ((cert_size + offset) > FLASH_CTRL_PARAM_BYTES_PER_PAGE) {
-    LOG_ERROR("Cert size overflow (%d + %d) page %x:%x", cert_size, offset,
+  if ((obj_size + offset) > FLASH_CTRL_PARAM_BYTES_PER_PAGE) {
+    LOG_ERROR("Cert size overflow (%d + %d) page %x:%x", obj_size, offset,
               page->base_addr, offset);
     return DATA_LOSS();
   }
 
-  offset += bytes_read;
-  TRY(flash_ctrl_info_read(page, offset,
-                           util_size_to_words(cert_size - bytes_read),
-                           buffer + bytes_read));
-  hmac_sha256_update(buffer, cert_size);
+  // Read the entire perso LTV object from flash and parse it.
+  perso_tlv_cert_obj_t cert_obj;
+  TRY(flash_ctrl_info_read(page, offset, util_size_to_words(obj_size),
+                           cert_buffer));
+  TRY(perso_tlv_get_cert_obj(cert_buffer, kBufferSize, &cert_obj));
+
+  hmac_sha256_update(cert_obj.cert_body_p, cert_obj.cert_body_size);
 
   if (size) {
-    *size = cert_size;
+    *size = obj_size;
   }
+
   return OK_STATUS();
 }
 
-static status_t log_hash_of_all_certs(ujson_t *uj) {
-  uint32_t cert_size;
-  serdes_sha256_hash_t hash;
+static status_t hash_all_certs(void) {
+  uint32_t cert_obj_size;
   hmac_sha256_init();
 
   // Push all certificates into the hash.
@@ -313,20 +516,12 @@ static status_t log_hash_of_all_certs(ujson_t *uj) {
       continue;
     }
     for (size_t j = 0; j < curr_layout.num_certs; j++) {
-      TRY(hash_certificate(curr_layout.info_page, page_offset, &cert_size));
-      page_offset += util_size_to_words(cert_size) * sizeof(uint32_t);
+      TRY(hash_certificate(curr_layout.info_page, page_offset, &cert_obj_size));
+      page_offset += util_size_to_words(cert_obj_size) * sizeof(uint32_t);
       page_offset = util_round_up_to(page_offset, 3);
     }
   }
 
-  // Log the final hash of all certificates to the host and console.
-  hmac_sha256_process();
-  hmac_sha256_final((hmac_digest_t *)&hash);
-  RESP_OK(ujson_serialize_serdes_sha256_hash_t, uj, &hash);
-  LOG_INFO("SHA256 hash of all certificates: %08x%08x%08x%08x%08x%08x%08x%08x",
-           hash.data[7], hash.data[6], hash.data[5], hash.data[4], hash.data[3],
-           hash.data[2], hash.data[1], hash.data[0]);
-
   return OK_STATUS();
 }
 
@@ -347,12 +542,14 @@ static status_t personalize_gen_dice_certificates(ujson_t *uj) {
   // Retrieve certificate provisioning data.
   // DO NOT CHANGE THE BELOW STRING without modifying the host code in
   // sw/host/provisioning/ft_lib/src/lib.rs
-  LOG_INFO("Waiting for certificate inputs ...");
+  base_printf("Waiting for certificate inputs ...\n");
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, true));
   TRY(ujson_deserialize_manuf_certgen_inputs_t(uj, &certgen_inputs));
-  // We copy over the TPM/UDS endorsement key ID to an SHA256 digest type, since
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, false));
+  // We copy over the UDS endorsement key ID to an SHA256 digest type, since
   // this is the format of key IDs generated on-dice.
-  memcpy(uds_endorsement_key_id.digest, certgen_inputs.auth_key_key_id,
-         kDiceCertKeyIdSizeInBytes);
+  memcpy(uds_endorsement_key_id.digest, certgen_inputs.dice_auth_key_key_id,
+         kCertKeyIdSizeInBytes);
 
   // Initialize entropy complex / KMAC for key manager operations.
   TRY(entropy_complex_init());
@@ -364,6 +561,27 @@ static status_t personalize_gen_dice_certificates(ujson_t *uj) {
   TRY(sc_keymgr_state_check(kScKeymgrStateInit));
   sc_keymgr_advance_state();
 
+  // Measure OTP partitions.
+  //
+  // Note:
+  // - We do not measure HwCfg0 as this is the Device ID, which is already
+  //   mixed into the keyladder directly via hardware channels.
+  // - We pre-calculate the OTP measurement of CreatorSwCfg and OwnerSwCfg
+  //   partitions using expected values for fields not yet provisioned. This
+  //   ensures consistent measurements throughout personalization.
+  TRY(measure_otp_partition(kOtpPartitionCreatorSwCfg,
+                            &otp_creator_sw_cfg_measurement,
+                            /*use_expected_values=*/true));
+  TRY(measure_otp_partition(kOtpPartitionOwnerSwCfg,
+                            &otp_owner_sw_cfg_measurement,
+                            /*use_expected_values=*/true));
+  TRY(measure_otp_partition(kOtpPartitionRotCreatorAuthCodesign,
+                            &otp_rot_creator_auth_codesign_measurement,
+                            /*use_expected_values=*/false));
+  TRY(measure_otp_partition(kOtpPartitionRotCreatorAuthState,
+                            &otp_rot_creator_auth_state_measurement,
+                            /*use_expected_values=*/false));
+
   /*****************************************************************************
    * DICE certificates.
    ****************************************************************************/
@@ -371,50 +589,312 @@ static status_t personalize_gen_dice_certificates(ujson_t *uj) {
 
   // Generate UDS keys and (TBS) cert.
   curr_cert_size = kUdsMaxTbsSizeBytes;
-  TRY(dice_attestation_keygen(kDiceKeyUds, &uds_pubkey_id, &curr_pubkey));
-  TRY(otbn_boot_attestation_key_save(kUdsAttestationKeySeed,
-                                     kOtbnBootAttestationKeyTypeDice,
-                                     kUdsKeymgrDiversifier));
-  TRY(dice_uds_tbs_cert_build(&uds_key_ids, &curr_pubkey,
-                              &tbs_certs.certs[tbs_certs.next_free],
-                              &curr_cert_size));
-  tbs_certs.next_free += curr_cert_size;
-  LOG_INFO("Generated UDS TBS certificate.");
+  TRY(otbn_boot_cert_ecc_p256_keygen(kDiceKeyUds, &uds_pubkey_id,
+                                     &curr_pubkey));
+  memcpy(&uds_pubkey, &curr_pubkey, sizeof(ecdsa_p256_public_key_t));
+  TRY(otbn_boot_attestation_key_save(kDiceKeyUds.keygen_seed_idx,
+                                     kDiceKeyUds.type,
+                                     *kDiceKeyUds.keymgr_diversifier));
+
+  // Build the certificate in a temp buffer, use all_certs for that.
+  TRY(dice_uds_tbs_cert_build(
+      &otp_creator_sw_cfg_measurement, &otp_owner_sw_cfg_measurement,
+      &otp_rot_creator_auth_codesign_measurement,
+      &otp_rot_creator_auth_state_measurement, &uds_key_ids, &curr_pubkey,
+      all_certs, &curr_cert_size));
+  // DO NOT CHANGE THE "UDS" STRING BELOW with modifying the `dice_cert_names`
+  // collection in sw/host/provisioning/ft_lib/src/lib.rs.
+  uds_offset = perso_blob_to_host.next_free;
+  TRY(perso_tlv_push_cert_to_perso_blob(
+      "UDS",
+      /*needs_endorsement=*/kDiceCertFormat == kDiceCertFormatX509TcbInfo,
+      kDiceCertFormat, all_certs, curr_cert_size, &perso_blob_to_host));
+
+  // After we have cranked the keymgr to the CreatorRootKey (UDS) stage, we now
+  // can initialize and seal the ownership block.
+  ownership_seal_init();
 
   // Generate CDI_0 keys and cert.
-  cdi_0_offset = tbs_certs.next_free;
   curr_cert_size = kCdi0MaxCertSizeBytes;
-  compute_keymgr_owner_int_binding(&certgen_inputs);
+  compute_keymgr_owner_int_binding();
   TRY(sc_keymgr_owner_int_advance(&sealing_binding_value,
                                   &attestation_binding_value,
                                   /*max_key_version=*/0));
-  TRY(dice_attestation_keygen(kDiceKeyCdi0, &cdi_0_pubkey_id, &curr_pubkey));
-  TRY(dice_cdi_0_cert_build(
-      (hmac_digest_t *)certgen_inputs.rom_ext_measurement,
-      certgen_inputs.rom_ext_security_version, &cdi_0_key_ids, &curr_pubkey,
-      &tbs_certs.certs[tbs_certs.next_free], &curr_cert_size));
-  tbs_certs.next_free += curr_cert_size;
-  LOG_INFO("Generated CDI_0 certificate.");
+  TRY(otbn_boot_cert_ecc_p256_keygen(kDiceKeyCdi0, &cdi_0_pubkey_id,
+                                     &curr_pubkey));
+  TRY(dice_cdi_0_cert_build(&kZeroDigest, 0, &cdi_0_key_ids, &curr_pubkey,
+                            all_certs, &curr_cert_size));
+  cdi_0_offset = perso_blob_to_host.next_free;
+  // DO NOT CHANGE THE "CDI_0" STRING BELOW with modifying the `dice_cert_names`
+  // collection in sw/host/provisioning/ft_lib/src/lib.rs.
+  TRY(perso_tlv_push_cert_to_perso_blob("CDI_0", /*needs_endorsement=*/false,
+                                        kDiceCertFormat, all_certs,
+                                        curr_cert_size, &perso_blob_to_host));
 
   // Generate CDI_1 keys and cert.
-  cdi_1_offset = tbs_certs.next_free;
   curr_cert_size = kCdi1MaxCertSizeBytes;
-  compute_keymgr_owner_binding(&certgen_inputs);
+  compute_keymgr_owner_binding();
   TRY(sc_keymgr_owner_advance(&sealing_binding_value,
                               &attestation_binding_value,
                               /*max_key_version=*/0));
-  TRY(dice_attestation_keygen(kDiceKeyCdi1, &cdi_1_pubkey_id, &curr_pubkey));
-  TRY(dice_cdi_1_cert_build(
-      (hmac_digest_t *)certgen_inputs.owner_measurement,
-      (hmac_digest_t *)certgen_inputs.owner_manifest_measurement,
-      certgen_inputs.owner_security_version, &cdi_1_key_ids, &curr_pubkey,
-      &tbs_certs.certs[tbs_certs.next_free], &curr_cert_size));
-  tbs_certs.next_free += curr_cert_size;
-  LOG_INFO("Generated CDI_1 certificate.");
+  TRY(otbn_boot_cert_ecc_p256_keygen(kDiceKeyCdi1, &cdi_1_pubkey_id,
+                                     &curr_pubkey));
+  TRY(dice_cdi_1_cert_build(&kZeroDigest, &kZeroDigest, &kZeroDigest, 0,
+                            kOwnerAppDomainProd, &cdi_1_key_ids, &curr_pubkey,
+                            all_certs, &curr_cert_size));
+  cdi_1_offset = perso_blob_to_host.next_free;
+  // DO NOT CHANGE THE "CDI_1" STRING BELOW with modifying the `dice_cert_names`
+  // collection in sw/host/provisioning/ft_lib/src/lib.rs.
+  TRY(perso_tlv_push_cert_to_perso_blob("CDI_1", /*needs_endorsement=*/false,
+                                        kDiceCertFormat, all_certs,
+                                        curr_cert_size, &perso_blob_to_host));
 
   return OK_STATUS();
 }
 
+static status_t compute_tbs_was_hmac(perso_blob_t *perso_blob_to_host) {
+  // Read out the WAS from flash.
+  hmac_key_t was;
+  static_assert(
+      kFlashInfoFieldWaferAuthSecretSizeIn32BitWords == kHmacKeyNumWords,
+      "WAS size expected to be same size as HMAC-SHA256 key.");
+  TRY(flash_ctrl_testutils_info_region_setup_properties(
+      &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret.page,
+      kFlashInfoFieldWaferAuthSecret.bank,
+      kFlashInfoFieldWaferAuthSecret.partition, kFlashInfoPage3ReadPermissions,
+      /*offset=*/NULL));
+  TRY(manuf_flash_info_field_read(
+      &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret, was.key,
+      kFlashInfoFieldWaferAuthSecretSizeIn32BitWords));
+
+  // Compute HMAC of TBS certs with WAS as the key.
+  // HSMs and host tooling will compute an HMAC in big endian format, so we do
+  // the same to make the comparison easier.
+  hmac_hmac_sha256_init(was, /*big_endian_digest=*/true);
+  uint8_t *tlv_buf = perso_blob_to_host->body;
+  uint16_t obj_size;
+  perso_tlv_object_type_t obj_type;
+  perso_tlv_cert_obj_t cert_obj;
+  for (size_t i = 0; i < perso_blob_to_host->num_objs; ++i) {
+    // Parse the TLV object header.
+    perso_tlv_object_header_t obj_header = *(uint16_t *)tlv_buf;
+    PERSO_TLV_GET_FIELD(Objh, Type, obj_header, &obj_type);
+    PERSO_TLV_GET_FIELD(Objh, Size, obj_header, &obj_size);
+    if (obj_type == kPersoObjectTypeX509Tbs) {
+      TRY(perso_tlv_get_cert_obj(tlv_buf, obj_size, &cert_obj));
+      hmac_sha256_update(cert_obj.cert_body_p, cert_obj.cert_body_size);
+    }
+    tlv_buf += obj_size;
+  }
+  hmac_sha256_process();
+  hmac_digest_t digest;
+  hmac_sha256_final(&digest);
+
+  // Push hash into perso blob.
+  perso_tlv_object_header_t was_hmac_tlv_header = 0;
+  obj_size = sizeof(perso_tlv_object_header_t) + sizeof(hmac_digest_t);
+  PERSO_TLV_SET_FIELD(Objh, Type, was_hmac_tlv_header,
+                      kPersoObjectTypeWasTbsHmac);
+  PERSO_TLV_SET_FIELD(Objh, Size, was_hmac_tlv_header, obj_size);
+  TRY(perso_tlv_push_to_perso_blob(&was_hmac_tlv_header,
+                                   sizeof(perso_tlv_object_header_t),
+                                   perso_blob_to_host));
+  TRY(perso_tlv_push_to_perso_blob(digest.digest, kHmacDigestNumBytes,
+                                   perso_blob_to_host));
+  perso_blob_to_host->num_objs++;
+
+  // Read complete device ID and push into perso blob. The host will need the
+  // device ID to reconstruct the WAS.
+  uint32_t device_id[kHwCfgDeviceIdSizeIn32BitWords] = {0};
+  TRY(otp_ctrl_testutils_dai_read32_array(&otp_ctrl, kDifOtpCtrlPartitionHwCfg0,
+                                          kHwCfgDeviceIdOffset, device_id,
+                                          ARRAYSIZE(device_id)));
+  perso_tlv_object_header_t device_id_header = 0;
+  obj_size = sizeof(perso_tlv_object_header_t) + kHwCfgDeviceIdSizeInBytes;
+  PERSO_TLV_SET_FIELD(Objh, Type, device_id_header, kPersoObjectTypeDeviceId);
+  PERSO_TLV_SET_FIELD(Objh, Size, device_id_header, obj_size);
+  TRY(perso_tlv_push_to_perso_blob(&device_id_header,
+                                   sizeof(perso_tlv_object_header_t),
+                                   perso_blob_to_host));
+  TRY(perso_tlv_push_to_perso_blob(device_id, kHwCfgDeviceIdSizeInBytes,
+                                   perso_blob_to_host));
+  perso_blob_to_host->num_objs++;
+
+  return OK_STATUS();
+}
+
+static status_t boot_data_cfg_initialize(void) {
+  // Configure the boot data OTP word.
+  if (!status_ok(manuf_individualize_device_flash_info_boot_data_cfg_check(
+          &otp_ctrl))) {
+    TRY(manuf_individualize_device_field_cfg(
+        &otp_ctrl,
+        OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET));
+  }
+
+  // Loads the boot data configuration from OTP.
+  flash_ctrl_cfg_t boot_data_cfg = flash_ctrl_boot_data_cfg_get();
+
+  flash_ctrl_perms_t perm = {
+      .read = kMultiBitBool4False,
+      .write = kMultiBitBool4False,
+      .erase = kMultiBitBool4True,
+  };
+
+  // Erase the BootData pages. This is necessary to ensure that the owner
+  // block is written to a clean page and to avoid ECC errors in the
+  // next boot.
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageBootData0, perm);
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageBootData1, perm);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageBootData0, boot_data_cfg);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageBootData1, boot_data_cfg);
+
+  TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageBootData0,
+                            kFlashCtrlEraseTypePage));
+  TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageBootData1,
+                            kFlashCtrlEraseTypePage));
+
+  return OK_STATUS();
+}
+
+static status_t install_owner(owner_config_t *config,
+                              owner_application_keyring_t *keyring) {
+  // Get the boot_data; installing the owner will write it back with the
+  // ownership_state set to LockedOwner.
+  boot_data_t boot_data;
+  TRY(boot_data_read(kLcStateProd, &boot_data));
+
+  // Initialize the ownership-related flash pages.
+  flash_ctrl_perms_t perm = {
+      .read = kMultiBitBool4True,
+      .write = kMultiBitBool4True,
+      .erase = kMultiBitBool4True,
+  };
+  flash_ctrl_cfg_t cfg = {
+      .scrambling = kMultiBitBool4True,
+      .ecc = kMultiBitBool4True,
+      .he = kMultiBitBool4False,
+  };
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot0, perm);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot0, cfg);
+  flash_ctrl_info_perms_set(&kFlashCtrlInfoPageOwnerSlot1, perm);
+  flash_ctrl_info_cfg_set(&kFlashCtrlInfoPageOwnerSlot1, cfg);
+
+  // Initializes the boot data flash configuration in OTP, and erases the boot
+  // data pages to avoid integrity errors in the next boot.
+  // `sku_creator_owner_init` will write the owner block to the flash.
+  TRY(boot_data_cfg_initialize());
+
+  // Initialize ownership.  This will write the owner block into OwnerSlot0 and
+  // set the ownership_state to LockedOwner.  The first boot of the ROM_EXT
+  // will create a redundanty copy in OwnerSlot1.
+  TRY(sku_creator_owner_init(&boot_data));
+  TRY(owner_block_parse(&owner_page[0],
+                        /*check_only=*/kHardenedBoolFalse, config, keyring));
+  return OK_STATUS();
+}
+
+// Returns how much data is left in the perso blob receive buffer (i.e., `body`
+// field). Useful when scanning the receive buffer containing perso LTV objects.
+static size_t max_available(void) {
+  if (perso_blob_from_host.next_free > sizeof(perso_blob_from_host.body))
+    return 0;  // This could never happen, but just in case.
+
+  return sizeof(perso_blob_from_host.body) - perso_blob_from_host.next_free;
+}
+
+/**
+ * Find the next certificate perso LTV object in the receive perso buffer and
+ * copy it to the passed in location.
+ *
+ * @param dest Pointer to pointer in the destination buffer; this function
+ *             advances the pointer by the size of the copied certificate perso
+ *             LTV object.
+ * @param free_room Pointer to the size of the destination buffer; this function
+ *                  reduces the size of the buffer by the size of the copied
+ *                  certificate perso LTV object.
+ */
+static status_t extract_next_cert(uint8_t **dest, size_t *free_room) {
+  // A just in case sanity check that the next free location in the perso blob
+  // data buffer is at the end of the buffer.
+  if (perso_blob_from_host.next_free > sizeof(perso_blob_from_host.body)) {
+    return INTERNAL();  // Something is really screwed up.
+  }
+
+  // Scan the received buffer until the next endorsed cert is found.
+  while (perso_blob_from_host.num_objs != 0) {
+    perso_tlv_cert_obj_t block;
+
+    // Extract the next perso LTV object, aborting if it is not a certificate.
+    rom_error_t err = perso_tlv_get_cert_obj(
+        perso_blob_from_host.body + perso_blob_from_host.next_free,
+        max_available(), &block);
+    switch (err) {
+      case kErrorOk:
+        break;
+      case kErrorPersoTlvCertObjNotFound: {
+        // The object found is not a certificate. Skip to next perso LTV object.
+        perso_blob_from_host.next_free += block.obj_size;
+        perso_blob_from_host.num_objs--;
+        continue;
+      }
+      default:
+        return INTERNAL();
+    }
+
+    // Check there is enough room in the destination buffer to copy the
+    // certificate perso LTV object.
+    if (*free_room < block.obj_size)
+      return RESOURCE_EXHAUSTED();
+
+    // Copy the certificate object to the destination buffer.
+    uint8_t *dest_p = *dest;
+    memcpy(dest_p, block.obj_p, block.obj_size);
+
+    // Advance destination buffer pointer and reduce free space counter.
+    *dest = dest_p + block.obj_size;
+    *free_room = *free_room - block.obj_size;
+
+    // Advance pointer to next perso LTV object in the receive buffer.
+    perso_blob_from_host.next_free += block.obj_size;
+    perso_blob_from_host.num_objs--;
+    return OK_STATUS();
+  }
+
+  return OK_STATUS();
+}
+
+static status_t write_cert_to_dice_page(const cert_flash_info_layout_t *layout,
+                                        perso_tlv_cert_obj_t *block,
+                                        uint8_t *cert_data,
+                                        uint32_t page_offset,
+                                        uint32_t cert_write_size_bytes) {
+  base_printf("Importing %s cert to %s ...\n", block->name, layout->group_name);
+  if ((page_offset + cert_write_size_bytes) > sizeof(dice_page.data)) {
+    LOG_ERROR("%s %s certificate did not fit into the info page.",
+              layout->group_name, block->name);
+    return OUT_OF_RANGE();
+  }
+
+  // The page will be zero-padded between obj_size to cert_write_size_bytes.
+  TRY_CHECK(block->obj_size <= cert_write_size_bytes);
+
+  // Copy the actual certificate data into the cert buffer.
+  memcpy(dice_page.data + page_offset, cert_data, block->obj_size);
+
+  return OK_STATUS();
+}
+
+static status_t write_digest_to_dice_page(
+    const cert_flash_info_layout_t *layout, uint32_t page_offset) {
+  base_printf("Digesting %s page ...\n", layout->group_name);
+
+  hmac_sha256(dice_page.data, sizeof(dice_page.data), &dice_page.digest);
+
+  return OK_STATUS();
+}
+
+size_t orig_num_objects_from_host;
 static status_t personalize_endorse_certificates(ujson_t *uj) {
   /*****************************************************************************
    * Certificate Export and Endorsement.
@@ -422,124 +902,321 @@ static status_t personalize_endorse_certificates(ujson_t *uj) {
   // Export the certificates to the provisioning appliance.
   // DO NOT CHANGE THE BELOW STRING without modifying the host code in
   // sw/host/provisioning/ft_lib/src/lib.rs
-  LOG_INFO("Exporting TBS certificates ...");
-  RESP_OK(ujson_serialize_manuf_certs_t, uj, &tbs_certs);
+  base_printf("Exporting TBS certificates ...\n");
+  RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_perso_blob_t, uj,
+                        &perso_blob_to_host, kPersoBlobSerializedMaxSize);
 
   // Import endorsed certificates from the provisioning appliance.
   // DO NOT CHANGE THE BELOW STRING without modifying the host code in
   // sw/host/provisioning/ft_lib/src/lib.rs
-  LOG_INFO("Importing endorsed certificates ...");
-  TRY(ujson_deserialize_manuf_certs_t(uj, &endorsed_certs));
+  base_printf("Importing endorsed certificates ...\n");
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, true));
+  TRY(ujson_deserialize_perso_blob_t(uj, &perso_blob_from_host));
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, false));
 
   /*****************************************************************************
    * Rearrange certificates to prepare for writing to flash.
    *
-   * All certificates are ordered in a buffer according to the order in which
-   * they will be written to flash. That order is:
+   * All certificates are ordered in a buffer (all_certs) according to the order
+   * in which they will be written to flash. That order is:
    * 1. UDS cert
    * 2. CDI_0 cert
    * 3. CDI_1 cert
    * 4. Provision Extension certs
    ****************************************************************************/
-  size_t ec_i = 0;
-  size_t ac_i = 0;
-  size_t size = 0;
-
-  // UDS cert.
-  size = cert_x509_asn1_decode_size_header(endorsed_certs.certs);
-  memcpy(all_certs, endorsed_certs.certs, size);
-  ec_i += size;
-  ac_i += size;
-
-  // CDI_0 cert.
-  size = cert_x509_asn1_decode_size_header(&tbs_certs.certs[cdi_0_offset]);
-  memcpy(&all_certs[ac_i], &tbs_certs.certs[cdi_0_offset], size);
-  ac_i += size;
-
-  // CDI_1 cert.
-  size = cert_x509_asn1_decode_size_header(&tbs_certs.certs[cdi_1_offset]);
-  memcpy(&all_certs[ac_i], &tbs_certs.certs[cdi_1_offset], size);
-  ac_i += size;
-
-  // Remaining (endorsed) certs.
-  size = cert_x509_asn1_decode_size_header(&endorsed_certs.certs[ec_i]);
-  while (size > 0) {
-    memcpy(&all_certs[ac_i], &endorsed_certs.certs[ec_i], size);
-    ec_i += size;
-    ac_i += size;
-    OT_ASSERT_MEMBER_SIZE(manuf_certs_t, certs, 4096);
-    size = ec_i < 4096
-               ? cert_x509_asn1_decode_size_header(&endorsed_certs.certs[ec_i])
-               : 0;
+  // We start scanning the perso LTV buffer we received from the host from the
+  // beginnging. We assume that the endorsed UDS cert is the first certificate
+  // in the buffer (even if preceeded by other types of perso LTV objects).
+  perso_blob_from_host.next_free = 0;
+  // Location where the next cert perso LTV object will be copied to in the
+  // `all_certs` buffer.
+  uint8_t *next_cert = all_certs;
+  // How much room left in the destination (`all_certs`) buffer.
+  size_t free_room = sizeof(all_certs);
+  // Helper structure caching certificate information from a certificate perso
+  // LTV object.
+  perso_tlv_cert_obj_t block;
+
+  // CWT DICE doesn't need host to endorse any certificate for it, so all
+  // payload are in the "perso_blob_to_host".
+  // Default to this setting, and move to X509 setting if the flag is set.
+  size_t cert_offsets[3] = {uds_offset, cdi_0_offset, cdi_1_offset};
+  size_t cert_offsets_count = 3;
+  if (kDiceCertFormat == kDiceCertFormatX509TcbInfo) {
+    // Exract the UDS cert perso LTV object.
+    TRY(extract_next_cert(&next_cert, &free_room));
+    // Extract the two CDI cert perso LTV objects which were endorsed on-device
+    // and sent to the host.
+    cert_offsets[0] = cert_offsets[1];
+    cert_offsets[1] = cert_offsets[2];
+    cert_offsets_count = 2;
+  }
+  // Extract the cert perso LTV objects which were endorsed on-device and send
+  // to the host.
+  for (size_t i = 0; i < cert_offsets_count; i++) {
+    size_t offset = cert_offsets[i];
+    TRY(perso_tlv_get_cert_obj(perso_blob_to_host.body + offset,
+                               sizeof(perso_blob_to_host.body) - offset,
+                               &block));
+    if (block.obj_size > free_room)
+      return RESOURCE_EXHAUSTED();
+
+    memcpy(next_cert, block.obj_p, block.obj_size);
+    next_cert += block.obj_size;
+    free_room -= block.obj_size;
   }
 
+  orig_num_objects_from_host = perso_blob_from_host.num_objs;
+  // Extract the remaining cert perso LTV objects received from the host.
+  while (perso_blob_from_host.num_objs)
+    TRY(extract_next_cert(&next_cert, &free_room));
+
   /*****************************************************************************
    * Save Certificates to Flash.
    ****************************************************************************/
-  size_t all_certs_offset = 0;
+  // This is where the certificates to be copied are stored, each one encoded as
+  // a perso LTV object. Reset the `next_cert` pointer and `free_room` size.
+  next_cert = all_certs;
+  free_room = sizeof(all_certs);
   for (size_t i = 0; i < ARRAYSIZE(cert_flash_layout); i++) {
     const cert_flash_info_layout_t curr_layout = cert_flash_layout[i];
     uint32_t page_offset = 0;
+
     // Skip the page if it is not in use.
     if (!curr_layout.used) {
       continue;
     }
+
+    memset(&dice_page, 0, sizeof(dice_page));
+
+    // This is a bit brittle, but we expect the sum of {layout}.num_certs values
+    // in the following flash layout sections to be equal to the number of
+    // endorsed extension certificates received from the host.
     for (size_t j = 0; j < curr_layout.num_certs; j++) {
-      // Compute the number of words necessary for certificate storage (rounded
-      // up to word alignment).
-      uint32_t cert_size_bytes =
-          cert_x509_asn1_decode_size_header(&all_certs[all_certs_offset]);
-      uint32_t cert_size_words = util_size_to_words(cert_size_bytes);
+      // Extract the cert block from the `all_certs` buffer.
+      TRY(perso_tlv_get_cert_obj(next_cert, free_room, &block));
+      // Round up the size to the nearest word boundary.
+      uint32_t cert_size_words = util_size_to_words(block.obj_size);
       uint32_t cert_size_bytes_ru = cert_size_words * sizeof(uint32_t);
-
-      if ((page_offset + cert_size_bytes_ru) >
-          FLASH_CTRL_PARAM_BYTES_PER_PAGE) {
-        LOG_ERROR("%s %s certificate did not fit into the info page.",
-                  curr_layout.group_name, curr_layout.names[j]);
-        return OUT_OF_RANGE();
-      }
-      TRY(flash_ctrl_info_write(curr_layout.info_page, page_offset,
-                                cert_size_words, &all_certs[all_certs_offset]));
-      LOG_INFO("Imported %s %s certificate.", curr_layout.group_name,
-               curr_layout.names[j]);
+      TRY(write_cert_to_dice_page(&curr_layout, &block, next_cert, page_offset,
+                                  cert_size_bytes_ru));
       page_offset += cert_size_bytes_ru;
-      all_certs_offset += cert_size_bytes;
+      next_cert += block.obj_size;
 
       // Each certificate must be 8 bytes aligned (flash word size).
       page_offset = util_round_up_to(page_offset, 3);
     }
+
+    if (curr_layout.need_digest) {
+      TRY(write_digest_to_dice_page(&curr_layout, page_offset));
+    }
+
+    TRY(flash_ctrl_info_write(curr_layout.info_page, /*page_offset=*/0,
+                              util_size_to_words(sizeof(dice_page)),
+                              &dice_page));
   }
 
   // DO NOT CHANGE THE BELOW STRING without modifying the host code in
   // sw/host/provisioning/ft_lib/src/lib.rs
-  LOG_INFO("Finished importing certificates.");
+  base_printf("Finished importing certificates.\n");
+
+  return OK_STATUS();
+}
+
+static status_t send_final_hash(ujson_t *uj, serdes_sha256_hash_t *hash) {
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleTxReady, true));
+  TRY(RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_serdes_sha256_hash_t,
+                            uj, hash, kSerdesSha256HashSerializedMaxSize));
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleTxReady, false));
+  return OK_STATUS();
+}
+
+/**
+ * Compare the OTP measurement used during certificate generation with the OTP
+ * measurment calculated from the final OTP values. Ensure that the UDS
+ * certificate was generated using the correct OTP values.
+ */
+static status_t check_otp_measurement_pre_lock(hmac_digest_t *measurement,
+                                               otp_partition_t partition) {
+  hmac_digest_t final_measurement;
+  TRY(measure_otp_partition(partition, &final_measurement,
+                            /*use_expected_values=*/false));
 
+  TRY_CHECK(final_measurement.digest[1] == measurement->digest[1]);
+  TRY_CHECK(final_measurement.digest[0] == measurement->digest[0]);
   return OK_STATUS();
 }
 
 /**
- * A custom extension to the personalization flow to enable various SKU owners
- * to customize the provisioning of their devices.
+ * Compare the OTP measurement used during certificate generation with the
+ * digest stored in the OTP. Ensure that the UDS certificate was generated using
+ * the correct OTP values.
  */
-extern status_t personalize_extension(
-    ujson_t *uj, manuf_certgen_inputs_t *certgen_inputs,
-    manuf_certs_t *tbs_certs, cert_flash_info_layout_t *cert_flash_layout);
+static status_t check_otp_measurement_post_lock(hmac_digest_t *measurement,
+                                                uint32_t offset) {
+  uint64_t expected_digest = otp_read64(offset);
+  uint32_t digest_hi = expected_digest >> 32;
+  uint32_t digest_lo = expected_digest & UINT32_MAX;
+  TRY_CHECK(digest_hi == measurement->digest[1]);
+  TRY_CHECK(digest_lo == measurement->digest[0]);
+  return OK_STATUS();
+}
+
+static status_t finalize_otp_partitions(void) {
+  TRY(check_next_slot_bootable());
+
+  // Complete the provisioning of OTP OwnerSwCfg partition.
+  if (!status_ok(manuf_individualize_device_owner_sw_cfg_check(&otp_ctrl))) {
+    TRY(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET));
+    TRY(check_otp_measurement_pre_lock(&otp_owner_sw_cfg_measurement,
+                                       kOtpPartitionOwnerSwCfg));
+    TRY(manuf_individualize_device_owner_sw_cfg_lock(&otp_ctrl));
+  }
+  TRY(check_otp_measurement_post_lock(
+      &otp_owner_sw_cfg_measurement,
+      OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_OFFSET));
+
+  // Complete the provisioning of OTP CreatorSwCfg partition.
+  if (!status_ok(manuf_individualize_device_creator_sw_cfg_check(&otp_ctrl))) {
+    TRY(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET));
+    TRY(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET));
+    TRY(check_otp_measurement_pre_lock(&otp_creator_sw_cfg_measurement,
+                                       kOtpPartitionCreatorSwCfg));
+    TRY(manuf_individualize_device_creator_sw_cfg_lock(&otp_ctrl));
+  }
+  TRY(check_otp_measurement_post_lock(
+      &otp_creator_sw_cfg_measurement,
+      OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_OFFSET));
+
+  return OK_STATUS();
+}
+
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA6 / GPIO4 is for SPI console RX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa6,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleRxReady));
+  // IOA5 / GPIO3 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  // IOA0 / GPIO2 is for error reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa0,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestError));
+  // IOA1 / GPIO1 is for test done reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa1,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestDone));
+  // IOA4 / GPIO0 is for test start reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa4,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestStart));
+  TRY(dif_gpio_output_set_enabled_all(&gpio, 0x1f));  // Enable first 5 GPIOs.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));    // Intialize all to 0.
+  return OK_STATUS();
+}
+
+static status_t provision(ujson_t *uj) {
+  // Provision OTP, flash secrets, certs, and install the first owner.
+  TRY(lc_ctrl_testutils_operational_state_check(&lc_ctrl));
+  TRY(personalize_otp_and_flash_secrets(uj));
+
+  TRY(personalize_gen_dice_certificates(uj));
+  owner_config_t owner_config;
+  owner_application_keyring_t owner_keyring = {0};
+  TRY(install_owner(&owner_config, &owner_keyring));
+
+  // Erase all of the owner-reserved INFO pages before performing any
+  // DICE or owner-customized certificate generation.
+  TRY(erase_owner_info_pages(&owner_config));
+
+  personalize_extension_pre_endorse_t pre_endorse = {
+      .uj = uj,
+      .certgen_inputs = &certgen_inputs,
+      .perso_blob_to_host = &perso_blob_to_host,
+      .cert_flash_layout = cert_flash_layout,
+      .flash_ctrl_handle = &flash_ctrl_state,
+      .uds_pubkey = &uds_pubkey,
+      .uds_pubkey_id = &uds_pubkey_id,
+      .otp_creator_sw_cfg_measurement = &otp_creator_sw_cfg_measurement,
+      .otp_owner_sw_cfg_measurement = &otp_owner_sw_cfg_measurement,
+      .otp_rot_creator_auth_codesign_measurement =
+          &otp_rot_creator_auth_codesign_measurement,
+      .otp_rot_creator_auth_state_measurement =
+          &otp_rot_creator_auth_state_measurement};
+  TRY(personalize_extension_pre_cert_endorse(&pre_endorse));
+  TRY(compute_tbs_was_hmac(pre_endorse.perso_blob_to_host));
+  TRY(log_self_hash(pre_endorse.perso_blob_to_host));
+
+  // Endorse TBS certs and install in flash.
+  TRY(personalize_endorse_certificates(uj));
+  TRY(hash_all_certs());
+  personalize_extension_post_endorse_t post_endorse = {
+      .uj = uj,
+      .perso_blob_from_host = &perso_blob_from_host,
+      .cert_flash_layout = cert_flash_layout};
+  post_endorse.perso_blob_from_host->num_objs = orig_num_objects_from_host;
+  TRY(personalize_extension_post_cert_endorse(&post_endorse));
+
+  // Check the hash of all perso objects with the host to confirm integrity of
+  // the transmission / provisioning operations.
+  serdes_sha256_hash_t hash;
+  hmac_sha256_process();
+  hmac_sha256_final((hmac_digest_t *)&hash);
+  TRY(send_final_hash(uj, &hash));
+
+  // Complete any remaining OTP programming.
+  TRY(finalize_otp_partitions());
+
+  return OK_STATUS();
+}
 
 bool test_main(void) {
+  // Log our boot status in the lifecycle token registers.
+  const manifest_t *self = rom_ext_manifest_a_get();
+  lifecycle_claim(kMultiBitBool8True);
+  lifecycle_set_status(kLifecycleStatusWordRomExtVersion, self->version_minor);
+  lifecycle_set_status(kLifecycleStatusWordRomExtSecVersion,
+                       self->security_version);
+  lifecycle_set_status(kLifecycleStatusWordOwnerVersion, 0);
+  lifecycle_set_status(kLifecycleStatusWordDeviceStatus,
+                       kLifecycleDeviceStatusPersoStart);
+  lifecycle_claim(kMultiBitBool8False);
+
+  // Unconditionally disable the watchdog timer.
+  // This is needed to avoid a watchdog reset if enabled in the ROM.
+  watchdog_disable();
+
+  // Enable peripherals, ATE GPIO indicators, and the SPI console.
   CHECK_STATUS_OK(peripheral_handles_init());
+  pinmux_testutils_init(&pinmux);
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestStart, true));
   ujson_t uj = ujson_ottf_console();
-  log_self_hash();
-  CHECK_STATUS_OK(lc_ctrl_testutils_operational_state_check(&lc_ctrl));
-  CHECK_STATUS_OK(personalize_otp_and_flash_secrets(&uj));
-  CHECK_STATUS_OK(personalize_gen_dice_certificates(&uj));
-  CHECK_STATUS_OK(personalize_extension(&uj, &certgen_inputs, &tbs_certs,
-                                        cert_flash_layout));
-  CHECK_STATUS_OK(personalize_endorse_certificates(&uj));
-  CHECK_STATUS_OK(log_hash_of_all_certs(&uj));
+
+  // Read the reset reason directly from the RSTMGR.
+  // This is needed to clear the reset reason before the first call to
+  // `personalize_otp_and_flash_secrets()`, which will reset the device.
+  uint32_t reason = rstmgr_reason_get();
+  if (reason != 0) {
+    rstmgr_reason_clear(reason);
+  }
+
+  // Execute personalization provisioning sequence.
+  status_t result = provision(&uj);
+  if (!status_ok(result)) {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestError, true));
+  } else {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestDone, true));
+  }
 
   // DO NOT CHANGE THE BELOW STRING without modifying the host code in
   // sw/host/provisioning/ft_lib/src/lib.rs
-  LOG_INFO("Personalization done.");
+  base_printf("Personalization done.\n");
 
   return true;
 }
diff --git a/sw/device/silicon_creator/manuf/base/perso_tlv_data.c b/sw/device/silicon_creator/manuf/base/perso_tlv_data.c
new file mode 100644
index 0000000000000..765038f109996
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/perso_tlv_data.c
@@ -0,0 +1,176 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+rom_error_t perso_tlv_get_cert_obj(uint8_t *buf, size_t ltv_buf_size,
+                                   perso_tlv_cert_obj_t *obj) {
+  perso_tlv_object_header_t objh;
+  perso_tlv_object_type_t obj_type;
+  uint16_t obj_size;
+
+  // Extract LTV object header, including: size and type.
+  if (ltv_buf_size < sizeof(perso_tlv_object_header_t)) {
+    return kErrorPersoTlvInternal;
+  }
+  obj->obj_p = buf;
+  memcpy(&objh, buf, sizeof(perso_tlv_object_header_t));
+  // Extract LTV object size.
+  PERSO_TLV_GET_FIELD(Objh, Size, objh, &obj_size);
+  if (obj_size == 0)
+    return kErrorPersoTlvCertObjNotFound;  // Object is empty.
+  if (obj_size > ltv_buf_size)
+    return kErrorPersoTlvInternal;  // Object exceeds the size of host buffer.
+  obj->obj_size = obj_size;
+  // Extract LTV object type.
+  PERSO_TLV_GET_FIELD(Objh, Type, objh, &obj_type);
+  obj->obj_type = obj_type;
+  if (obj_type != kPersoObjectTypeX509Cert &&
+      obj_type != kPersoObjectTypeCwtCert &&
+      obj_type != kPersoObjectTypeX509Tbs) {
+    return kErrorPersoTlvCertObjNotFound;
+  }
+  buf += sizeof(perso_tlv_object_header_t);
+  ltv_buf_size -= sizeof(perso_tlv_object_header_t);
+
+  // If we made it this far, we found a certificate LTV object, so we will parse
+  // the object's header and metadata next.
+
+  perso_tlv_cert_header_t crth;
+  uint16_t wrapped_cert_size;
+  uint16_t name_len;
+
+  // Extract the certificate object header, including: certificate object and
+  // nameksizes, certificate name string, and pointer to the certificate body.
+  if (ltv_buf_size < sizeof(perso_tlv_cert_header_t)) {
+    return kErrorPersoTlvInternal;
+  }
+  memcpy(&crth, buf, sizeof(perso_tlv_cert_header_t));
+  // Extract certificate name size.
+  PERSO_TLV_GET_FIELD(Crth, NameSize, crth, &name_len);
+  // Extract wrapped certificate object size.
+  PERSO_TLV_GET_FIELD(Crth, Size, crth, &wrapped_cert_size);
+  // There are at least 4 bytes in an X.509 ASN.1 DER certificate: two bytes of
+  // header and two bytes of size data.
+  if ((wrapped_cert_size < (sizeof(perso_tlv_cert_header_t) + name_len + 4)) ||
+      (wrapped_cert_size > ltv_buf_size))
+    return kErrorPersoTlvInternal;  // Something is really screwed up.
+  buf += sizeof(perso_tlv_cert_header_t);
+  ltv_buf_size -= sizeof(perso_tlv_cert_header_t);
+  // Extract certificate name string.
+  if (ltv_buf_size < name_len) {
+    return kErrorPersoTlvInternal;
+  }
+  memcpy(obj->name, buf, name_len);
+  obj->name[name_len] = '\0';
+  buf += name_len;
+  ltv_buf_size -= name_len;
+  // Set pointer to certificate body.
+  obj->cert_body_size =
+      wrapped_cert_size - sizeof(perso_tlv_cert_header_t) - name_len;
+  obj->cert_body_p = buf;
+
+  // Sanity check on the certificate body size.
+  // TODO(24281): add sanity check on CWT certificate body size.
+  if (obj_type == kPersoObjectTypeX509Cert) {
+    size_t decoded_cert_size =
+        cert_x509_asn1_decode_size_header(obj->cert_body_p);
+    if (decoded_cert_size != obj->cert_body_size) {
+      return kErrorPersoTlvInternal;
+    }
+  }
+
+  return kErrorOk;
+}
+
+rom_error_t perso_tlv_cert_obj_build(const char *name,
+                                     const perso_tlv_object_type_t obj_type,
+                                     const uint8_t *cert, size_t cert_size,
+                                     uint8_t *buf, size_t *buf_size) {
+  perso_tlv_object_header_t obj_header = 0;
+  perso_tlv_cert_header_t cert_header = 0;
+  size_t obj_size;
+  size_t wrapped_cert_size;
+
+  // Compute the name length (strlen() is not available).
+  size_t name_len = 0;
+  while (name[name_len])
+    name_len++;
+  if (name_len > kCrthNameSizeFieldMask)
+    return kErrorPersoTlvCertNameTooLong;
+
+  // Compute the wrapped certificate object (cert header + cert data) and perso
+  // LTV object sizes.
+  wrapped_cert_size = sizeof(perso_tlv_cert_header_t) + name_len + cert_size;
+  obj_size = wrapped_cert_size + sizeof(perso_tlv_object_header_t);
+
+  // Check there is enough room in the buffer to store the perso LTV object.
+  if (obj_size > *buf_size)
+    return kErrorPersoTlvOutputBufTooSmall;
+
+  // Setup the perso LTV object header.
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, obj_type);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header, obj_size);
+
+  // Setup the cert object header.
+  PERSO_TLV_SET_FIELD(Crth, Size, cert_header, wrapped_cert_size);
+  PERSO_TLV_SET_FIELD(Crth, NameSize, cert_header, name_len);
+
+  // Push the cert perso LTV object to the buffer.
+  // Return the size of the buffer that was used up by this perso LTV object.
+  *buf_size = 0;
+  memcpy(buf + *buf_size, &obj_header, sizeof(perso_tlv_object_header_t));
+  *buf_size += sizeof(perso_tlv_object_header_t);
+  memcpy(buf + *buf_size, &cert_header, sizeof(perso_tlv_cert_header_t));
+  *buf_size += sizeof(perso_tlv_cert_header_t);
+  memcpy(buf + *buf_size, name, name_len);
+  *buf_size += name_len;
+  memcpy(buf + *buf_size, cert, cert_size);
+  *buf_size += cert_size;
+
+  return kErrorOk;
+}
+
+rom_error_t perso_tlv_push_cert_to_perso_blob(
+    const char *name, bool needs_endorsement,
+    const dice_cert_format_t dice_format, const uint8_t *cert, size_t cert_size,
+    perso_blob_t *pb) {
+  if (pb->next_free > sizeof(pb->body)) {
+    return kErrorPersoTlvInternal;
+  }
+  // Build the perso TLV cert object and push it to the perso blob.
+  size_t obj_size = sizeof(pb->body) - pb->next_free;
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeCwtCert;
+  if (dice_format == kDiceCertFormatX509TcbInfo) {
+    if (needs_endorsement) {
+      obj_type = kPersoObjectTypeX509Tbs;
+    } else {
+      obj_type = kPersoObjectTypeX509Cert;
+    }
+  }
+  HARDENED_RETURN_IF_ERROR(perso_tlv_cert_obj_build(
+      name, obj_type, cert, cert_size, pb->body + pb->next_free, &obj_size));
+
+  // Update the perso blob offset and object count.
+  pb->next_free += obj_size;
+  pb->num_objs++;
+
+  return kErrorOk;
+}
+
+rom_error_t perso_tlv_push_to_perso_blob(const void *data, size_t size,
+                                         perso_blob_t *perso_blob) {
+  if (perso_blob->next_free > sizeof(perso_blob->body)) {
+    return kErrorPersoTlvInternal;
+  }
+  size_t room = sizeof(perso_blob->body) - perso_blob->next_free;
+  if (room < size)
+    return kErrorPersoTlvOutputBufTooSmall;
+  memcpy(perso_blob->body + perso_blob->next_free, data, size);
+  perso_blob->next_free += size;
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/manuf/base/perso_tlv_data.h b/sw/device/silicon_creator/manuf/base/perso_tlv_data.h
new file mode 100644
index 0000000000000..bd3215a2ae96b
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/perso_tlv_data.h
@@ -0,0 +1,274 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSO_TLV_DATA_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSO_TLV_DATA_H_
+
+#include <stdbool.h>
+#include <stddef.h>
+#include <stdint.h>
+
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Personalization data is sent between the device and the host during the
+ * device provisioning. Personalization data is laid out as a sequence of
+ * concatenated LTV objects. The length and type field of the objects are packed
+ * in a 16 bit integer:
+ *  d15                                           d0
+ *  +-------------+--------------------------------+
+ *  | 4 bit type  |   12 bits total  object size   |
+ *  +-------------+--------------------------------+
+ *
+ * The following object types have been defined so far:
+ */
+typedef enum perso_tlv_object_type {
+  /**
+   * An X.509 TBS certificate to be endorsed during provisioning.
+   */
+  kPersoObjectTypeX509Tbs = 0,
+  /**
+   * A fully endorsed X.509 certificate to be written to flash info.
+   */
+  kPersoObjectTypeX509Cert = 1,
+  /**
+   * A generic cryptographic seed generated and externall registered during
+   * provisioning. Can be used as a primitive to bootstrap cryptographic
+   * operations post-provisioning/deployment.
+   */
+  kPersoObjectTypeDevSeed = 2,
+  /**
+   * A fully endorsed CWT certificate to be written to flash info.
+   */
+  kPersoObjectTypeCwtCert = 3,
+  /**
+   * An HMAC-SHA256 over the TBS certificates, using the Wafer Authentication
+   * Secret provisioned during CP as the key, to authenticate the unendorsed
+   * certificates to the provisioning system performing certificate endorsements
+   * during personalization.
+   */
+  kPersoObjectTypeWasTbsHmac = 4,
+  /**
+   * Fully formed (CP + FT) device ID.
+   */
+  kPersoObjectTypeDeviceId = 5,
+  /**
+   * Generic seed.
+   */
+  kPersoObjectTypeGenericSeed = 6,
+  /**
+   * Personalization firmware SHA256 Hash.
+   */
+  kPersoObjectTypePersoSha256Hash = 7,
+} perso_tlv_object_type_t;
+
+typedef uint16_t perso_tlv_object_header_t;
+typedef uint16_t perso_tlv_cert_header_t;
+typedef uint16_t perso_tlv_dev_seed_header_t;
+
+typedef enum perso_tlv_obj_header_fields {
+  // Object size, total size, this header included.
+  kObjhSizeFieldShift = 0,
+  kObjhSizeFieldWidth = 12,
+  kObjhSizeFieldMask = (1 << kObjhSizeFieldWidth) - 1,
+
+  // Object type, one of perso_tlv_object_type_t.
+  kObjhTypeFieldShift = kObjhSizeFieldWidth,
+  kObjhTypeFieldWidth =
+      sizeof(perso_tlv_object_header_t) * 8 - kObjhSizeFieldWidth,
+  kObjhTypeFieldMask = (1 << kObjhTypeFieldWidth) - 1,
+} perso_tlv_obj_header_fields_t;
+
+typedef struct perso_tlv_dev_seed_element {
+  uint32_t el[8];
+} perso_tlv_dev_seed_element_t;
+
+typedef struct perso_tlv_dev_seed {
+  perso_tlv_dev_seed_element_t key;
+  perso_tlv_dev_seed_element_t context;
+} perso_tlv_dev_seed_t;
+
+typedef struct perso_tlv_dev_seed_set {
+  perso_tlv_dev_seed_t seeds[2];
+} perso_tlv_dev_seed_set_t;
+
+/**
+ * The x509 certificate is prepended by a 16 bits header followed by the ASCII
+ * characters of the certificate name, followed by the certificate body.
+ *
+ * The certificate header includes 4 bits for the certificate name length then
+ * the full size of the certificate object (header size + name length +
+ * certificate size).
+ *
+ *  d15                                           d0
+ *  +-------------+--------------------------------+
+ *  | 4 bit length|       12 bits total size       |
+ *  +-------------+--------------------------------+
+ */
+typedef enum perso_tlv_cert_header_fields {
+  // Certificate size, total size, this header and name length included.
+  kCrthSizeFieldShift = 0,
+  kCrthSizeFieldWidth = 12,
+  kCrthSizeFieldMask = (1 << kCrthSizeFieldWidth) - 1,
+
+  // Length of the certificate name immediately following the header.
+  kCrthNameSizeFieldShift = kCrthSizeFieldWidth,
+  kCrthNameSizeFieldWidth =
+      sizeof(perso_tlv_cert_header_t) * 8 - kCrthSizeFieldWidth,
+  kCrthNameSizeFieldMask = (1 << kCrthNameSizeFieldWidth) - 1,
+} perso_tlv_cert_header_fields_t;
+
+// Helper macros allowing set or get various object and certificate header
+// fields. Operate on objects in big endian representation, as they are
+// transferred over wire.
+#define PERSO_TLV_SET_FIELD(type_name, field_name, full_value, field_value) \
+  {                                                                         \
+    uint16_t mask = k##type_name##field_name##FieldMask;                    \
+    uint16_t shift = k##type_name##field_name##FieldShift;                  \
+    uint16_t fieldv = (uint16_t)(field_value)&mask;                         \
+    uint16_t fullv = __builtin_bswap16((uint16_t)(full_value));             \
+    mask = (uint16_t)(mask << shift);                                       \
+    (full_value) = __builtin_bswap16(                                       \
+        (uint16_t)((fullv & ~mask) | (((uint16_t)fieldv) << shift)));       \
+  }
+
+#define PERSO_TLV_GET_FIELD(type_name, field_name, full_value, field_value) \
+  {                                                                         \
+    uint16_t mask = k##type_name##field_name##FieldMask;                    \
+    uint16_t shift = k##type_name##field_name##FieldShift;                  \
+    *(field_value) = (__builtin_bswap16(full_value) >> shift) & mask;       \
+  }
+
+/**
+ * A helper structure for quick access to a certificate stored as a perso LTV
+ * object.
+ */
+typedef struct perso_tlv_cert_obj {
+  /**
+   * Pointer to the start of the perso LTV object.
+   */
+  uint8_t *obj_p;
+  /**
+   * LTV object size (in bytes).
+   */
+  size_t obj_size;
+  /**
+   * LTV object type.
+   */
+  uint32_t obj_type;
+  /**
+   * Pointer to the start of the certificate body (i.e., ASN.1 object for X.509
+   * certificates, or CBOR object for CWT certificates).
+   */
+  uint8_t *cert_body_p;
+  /**
+   * Certificate (ASN.1 or CBOR) body size (in bytes).
+   *
+   * Equal to: obj_size - obj_hdr_size - cert_hdr_size - cert_name_len
+   */
+  size_t cert_body_size;
+  /**
+   * Certificate name string.
+   */
+  char name[kCrthNameSizeFieldMask + 1];
+} perso_tlv_cert_obj_t;
+
+/**
+ * Given the pointer to an LTV object, in case this is an endorsed certificate
+ * set up the perso_tlv_cert_obj_t structure for it.
+ *
+ * @param buf Pointer to the LTV object buffer storing the certificate object.
+ * @param ltv_buf_size Total number of bytes until the end of the LTV buffer
+ *                     (cert LTV object must be <= the buffer size).
+ * @param[out] obj Pointer to the certificate perso LTV object to populate.
+ *
+ * @return OK_STATUS on success, NOT_FOUND if the object is not an endorsed
+ *                   certificate, or the error condition encountered.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t perso_tlv_get_cert_obj(uint8_t *buf, size_t ltv_buf_size,
+                                   perso_tlv_cert_obj_t *obj);
+
+/**
+ * Wraps the passed certificate in a perso LTV object and copies it to an output
+ * buffer.
+ *
+ * The certificate perso LTV object is laid out as follows:
+ * - 16 bit LTV object header
+ * - 16 bit cert header
+ * - Certificate name string
+ * - Cerificate data
+ *
+ * Note that both certificate and object headers' are 16 bit integers in big
+ * endian format.
+ *
+ *  d15                                         d0
+ * +-------------+--------------------------------+
+ * | 4 bit type  |   12 bits total object size    | <-- Object Header
+ * +-------------+--------------------------------+
+ * | name length |12 bits total cert payload size | <-- Cert Header
+ * +-------------+--------------------------------+
+ * |             cert name string                 |
+ * +----------------------------------------------+
+ * |                   cert                       |
+ * +----------------------------------------------+
+ *
+ * @param name The name of the certificate.
+ * @param obj_type The object type that needs to encoded.
+ * @param cert The binary certificate blob.
+ * @param cert_size Size of the certificate blob in bytes.
+ * @param[out] buf Output buffer to copy the data into.
+ * @param[inout] buf_size Input is size of the output buffer in bytes; output is
+ *                        space of buffer that was consumed by the LTV object.
+ * @return status of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t perso_tlv_cert_obj_build(const char *name,
+                                     const perso_tlv_object_type_t obj_type,
+                                     const uint8_t *cert, size_t cert_size,
+                                     uint8_t *buf, size_t *buf_size);
+
+/**
+ * Constructs an certificate perso LTV object (shown above) by invoking
+ * `perso_tlv_cert_obj_build()` and pushes it to a `perso_blob_t` object used
+ * for shuffling data between the host and device during personalization.
+ *
+ * @param name The name of the certificate.
+ * @param needs_endorsement Defines the type of the LTV object the certificate
+ *                          is wrapped into (TBS or fully formed).
+ * @param cert_format The format of the certificate.
+ * @param cert The binary certificate blob.
+ * @param cert_size Size of the certificate blob in bytes.
+ * @param perso_blob Pointer to the `perso_blob_t` to copy the object to.
+ * @return status of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t perso_tlv_push_cert_to_perso_blob(
+    const char *name, bool needs_endorsement,
+    const dice_cert_format_t cert_format, const uint8_t *cert, size_t cert_size,
+    perso_blob_t *pb);
+
+/**
+ * Pushes arbitrary data to the perso blob that is sent between host and device.
+ *
+ * @param data Pointer to the data to add to the blob.
+ * @param size Size of the data to add in bytes.
+ * @param perso_blob Pointer to the perso blob to add the data to.
+ * @return status of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t perso_tlv_push_to_perso_blob(const void *data, size_t size,
+                                         perso_blob_t *perso_blob);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSO_TLV_DATA_H_
diff --git a/sw/device/silicon_creator/manuf/base/perso_tlv_data_unittest.cc b/sw/device/silicon_creator/manuf/base/perso_tlv_data_unittest.cc
new file mode 100644
index 0000000000000..3d44b52933691
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/perso_tlv_data_unittest.cc
@@ -0,0 +1,240 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+#include <array>
+#include <cstring>
+#include <gtest/gtest.h>
+
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+const uint8_t kX509CertTestdata[132] = {0x30, 0x82, 0x00, 0x80};
+const size_t kX509CertTestdataSize = 132;
+
+namespace perso_tlv_data_unittest {
+namespace {
+
+class PersoTlvDataTest : public testing::Test {
+ public:
+  // A small scratch buffer used for tests.
+  static constexpr size_t kScratchBufferSize = 256;
+  std::array<uint8_t, kScratchBufferSize> scratch_buf_;
+
+  void SetUp() override { scratch_buf_.fill(0); }
+
+  void TearDown() override { scratch_buf_.fill(0); }
+};
+
+TEST_F(PersoTlvDataTest, PersoTlvCertObjBuildX509Cert) {
+  const char *name = "UDS";
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  const uint8_t *cert = kX509CertTestdata;
+  size_t cert_size = kX509CertTestdataSize;
+  size_t buf_size = kScratchBufferSize;
+
+  EXPECT_EQ(perso_tlv_cert_obj_build(name, obj_type, cert, cert_size,
+                                     scratch_buf_.data(), &buf_size),
+            kErrorOk);
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = buf_size;  // Simulate reading the built object back
+
+  // Should be able to get the object from the built buffer
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorOk);
+
+  EXPECT_EQ(obj.obj_type, obj_type);
+  EXPECT_EQ(obj.obj_size, buf_size);  // The reported size by build should match
+                                      // the object's size field
+  EXPECT_STREQ(obj.name, name);
+  EXPECT_EQ(obj.cert_body_size, cert_size);
+  EXPECT_EQ(memcmp(obj.cert_body_p, cert, cert_size), 0);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvCertObjBuildBufTooSmall) {
+  const char *name = "UDS";
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  const uint8_t *cert = kX509CertTestdata;
+  size_t cert_size = kX509CertTestdataSize;
+  size_t buf_size = 10;  // Intentionally too small
+
+  EXPECT_EQ(perso_tlv_cert_obj_build(name, obj_type, cert, cert_size,
+                                     scratch_buf_.data(), &buf_size),
+            kErrorPersoTlvOutputBufTooSmall);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvCertObjBuildNameTooLong) {
+  // Name length field is 4 bits, so max length is 15.
+  const char *name = "ThisNameIsTooLongFor4Bits";  // Length > 15
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  const uint8_t *cert = kX509CertTestdata;
+  size_t cert_size = kX509CertTestdataSize;
+  size_t buf_size = kScratchBufferSize;
+
+  EXPECT_EQ(perso_tlv_cert_obj_build(name, obj_type, cert, cert_size,
+                                     scratch_buf_.data(), &buf_size),
+            kErrorPersoTlvCertNameTooLong);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjEmptyBuf) {
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = 0;
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);  // Not enough size for header
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjBufTooSmallForHeader) {
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = sizeof(perso_tlv_object_header_t) - 1;
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjEmptyObject) {
+  // Create a minimal object header with size 0
+  perso_tlv_object_header_t obj_header = 0;
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, kPersoObjectTypeX509Cert);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header, 0);  // Size 0
+
+  memcpy(scratch_buf_.data(), &obj_header, sizeof(obj_header));
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = sizeof(obj_header);
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvCertObjNotFound);  // Object is empty
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjTooBigForBuf) {
+  // Create an object header that claims to be larger than the buffer
+  perso_tlv_object_header_t obj_header = 0;
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, kPersoObjectTypeX509Cert);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header,
+                      kScratchBufferSize + 1);  // Size too large
+
+  memcpy(scratch_buf_.data(), &obj_header, sizeof(obj_header));
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = sizeof(obj_header);  // Only header is actually in buf
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);  // Object exceeds buffer size
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjBufTooSmallForCertHeader) {
+  // Create a minimal object header for a cert
+  perso_tlv_object_header_t obj_header = 0;
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  size_t ltv_buf_size = sizeof(obj_header) + 1;
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, obj_type);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header, ltv_buf_size);
+
+  memcpy(scratch_buf_.data(), &obj_header, sizeof(obj_header));
+
+  perso_tlv_cert_obj_t obj;
+  // Provide buffer size just enough for object header
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);  // Not enough size for cert header
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjSizeMismatch) {
+  // Create headers where the tlv cert size doesn't match x509 cert size
+  perso_tlv_object_header_t obj_header = 0;
+  perso_tlv_cert_header_t cert_header = 0;
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  std::string name("UDS", 3);
+  size_t cert_data_size = kX509CertTestdataSize;
+  size_t expected_total_size =
+      sizeof(obj_header) + sizeof(cert_header) + name.size() + cert_data_size;
+
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, obj_type);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header, expected_total_size);
+  PERSO_TLV_SET_FIELD(Crth, NameSize, cert_header, name.size());
+  // Set cert header size *incorrectly*
+  PERSO_TLV_SET_FIELD(Crth, Size, cert_header,
+                      expected_total_size - sizeof(obj_header) - 1);
+
+  uint8_t *ptr = scratch_buf_.data();
+  memcpy(ptr, &obj_header, sizeof(obj_header));
+  ptr += sizeof(obj_header);
+  memcpy(ptr, &cert_header, sizeof(cert_header));
+  ptr += sizeof(cert_header);
+  memcpy(ptr, name.data(), name.size());
+  ptr += name.size();
+  memcpy(ptr, kX509CertTestdata, cert_data_size);
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size =
+      expected_total_size;  // Buffer is large enough for actual data
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);  // Size mismatch detected by sanity check
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjCertTooLong) {
+  // Create a TLV object with partial cert.
+  perso_tlv_object_header_t obj_header = 0;
+  perso_tlv_cert_header_t cert_header = 0;
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  const size_t name_len = 7;  // Arbitrary name length
+  // Total object size should account for headers and the name, but we will
+  // provide a smaller buffer size to simulate the error condition.
+  size_t cert_size = sizeof(cert_header) + name_len + kX509CertTestdataSize;
+  // Provide buffer size enough for headers, but NOT the full cert body
+  size_t ltv_buf_size = sizeof(obj_header) + cert_size - 1;
+
+  PERSO_TLV_SET_FIELD(Objh, Type, obj_header, obj_type);
+  PERSO_TLV_SET_FIELD(Objh, Size, obj_header, ltv_buf_size);
+  PERSO_TLV_SET_FIELD(Crth, NameSize, cert_header, name_len);
+  PERSO_TLV_SET_FIELD(Crth, Size, cert_header, cert_size);
+
+  memcpy(scratch_buf_.data(), &obj_header, sizeof(obj_header));
+  memcpy(scratch_buf_.data() + sizeof(obj_header), &cert_header,
+         sizeof(cert_header));
+
+  perso_tlv_cert_obj_t obj;
+  // Expected to fail due to wrapped_cert_size is too long.
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvInternal);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjX509SanityCheckPass) {
+  // Build a valid X.509 cert object first
+  const char *name = "UDS";
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeX509Cert;
+  const uint8_t *cert = kX509CertTestdata;
+  size_t cert_size = kX509CertTestdataSize;
+  size_t buf_size = kScratchBufferSize;
+
+  EXPECT_EQ(perso_tlv_cert_obj_build(name, obj_type, cert, cert_size,
+                                     scratch_buf_.data(), &buf_size),
+            kErrorOk);
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = buf_size;
+
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorOk);
+}
+
+TEST_F(PersoTlvDataTest, PersoTlvGetCertObjInvalidObjType) {
+  // Build a X.509 cert object with invalid kPersoObjectTypeDeviceId type.
+  const char *name = "UDS";
+  perso_tlv_object_type_t obj_type = kPersoObjectTypeDeviceId;
+  const uint8_t *cert = kX509CertTestdata;
+  size_t cert_size = kX509CertTestdataSize;
+  size_t buf_size = kScratchBufferSize;
+
+  EXPECT_EQ(perso_tlv_cert_obj_build(name, obj_type, cert, cert_size,
+                                     scratch_buf_.data(), &buf_size),
+            kErrorOk);
+
+  perso_tlv_cert_obj_t obj;
+  size_t ltv_buf_size = buf_size;
+
+  EXPECT_EQ(perso_tlv_get_cert_obj(scratch_buf_.data(), ltv_buf_size, &obj),
+            kErrorPersoTlvCertObjNotFound);
+}
+
+}  // namespace
+}  // namespace perso_tlv_data_unittest
diff --git a/sw/device/silicon_creator/manuf/base/personalize_ext.h b/sw/device/silicon_creator/manuf/base/personalize_ext.h
new file mode 100644
index 0000000000000..7edb926e3f595
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/personalize_ext.h
@@ -0,0 +1,116 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSONALIZE_EXT_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSONALIZE_EXT_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+
+enum {
+  /**
+   * Index of the first available page in the `cert_flash_layout` array that
+   * personalization extensions may use.
+   */
+  kCertFlashLayoutExt0Idx = 2,
+  /**
+   * Index of the second available page in the `cert_flash_layout` array that
+   * personalization extensions may use.
+   */
+  kCertFlashLayoutExt1Idx = 3,
+};
+
+/**
+ * Parameters passed to personalization extension function invoked before data
+ * is sent to the host for endorsement. Not all parameters are necessarily used
+ * by all extension implementations.
+ */
+typedef struct personalize_extension_pre_endorse {
+  /**
+   *  Serialization interface, marshals/unmarshals structures' fields and
+   *  communicates with the host.
+   */
+  ujson_t *uj;
+  /**
+   *  Pointer to information used for generating certificates.
+   */
+  manuf_certgen_inputs_t *certgen_inputs;
+  /**
+   *  Pointer to the TLV data blob sent to the host for endorsement.
+   */
+  perso_blob_t *perso_blob_to_host;
+  /**
+   * Pointer to the flash layout table, the extension could enable disabled
+   * entries in the table and configure its INFO space use so that the caller
+   * knows where to place endorsed objects received from the host.
+   */
+  cert_flash_info_layout_t *cert_flash_layout;
+  /**
+   * Pointer to the flash controller handle necessary for proper flash access.
+   */
+  dif_flash_ctrl_state_t *flash_ctrl_handle;
+  /**
+   * Pointer to the UDS public key. Personalization extensions may require
+   * accessing it to generate different certificate chains that fit a specific
+   * SKU's requirements.
+   */
+  ecdsa_p256_public_key_t *uds_pubkey;
+  hmac_digest_t *uds_pubkey_id;
+  /**
+   * Pointer to the OTP measurements used to generate the UDS public key.
+   * Personalization extensions may require accessing these to generate
+   * different certificate chains that fit a specific SKU's requirements.
+   */
+  hmac_digest_t *otp_creator_sw_cfg_measurement;
+  hmac_digest_t *otp_owner_sw_cfg_measurement;
+  hmac_digest_t *otp_rot_creator_auth_codesign_measurement;
+  hmac_digest_t *otp_rot_creator_auth_state_measurement;
+} personalize_extension_pre_endorse_t;
+
+/**
+ * Parameters passed to personalization extension function invoked after the
+ * host finished endorsement processing and sent endorsed data to the device.
+ */
+typedef struct personalize_extension_post_endorse {
+  /**
+   *  Serialization interface, marshals/unmarshals structures' fields and
+   *  communicates with the host.
+   */
+  ujson_t *uj;
+  /**
+   *  Pointer to the TLV data blob received from the host.
+   */
+  perso_blob_t *perso_blob_from_host;
+  /**
+   * Pointer to the flash layout table used previously when saving pre
+   * endorsement data..
+   */
+  cert_flash_info_layout_t *cert_flash_layout;
+} personalize_extension_post_endorse_t;
+
+/**
+ * A custom extension to the personalization flow.
+ *
+ * This extension runs *BEFORE* TBS certificates are sent to the host to be
+ * endorsed. Implementing this extension enables SKU owners to add more TBS
+ * certificates to the list of certificates to be endorsed by the host.
+ */
+status_t personalize_extension_pre_cert_endorse(
+    personalize_extension_pre_endorse_t *pre_params);
+
+/**
+ * A custom extension to the personalization flow.
+ *
+ * This extension runs *AFTER* (endorsed) certificates are sent back to the
+ * device from the host. Implementing this extension enables SKU owners to
+ * provision additional data into flash, in addition to the endorsed
+ * certificates in the `perso_blob_from_host` struct.
+ */
+status_t personalize_extension_post_cert_endorse(
+    personalize_extension_post_endorse_t *post_params);
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_BASE_PERSONALIZE_EXT_H_
diff --git a/sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl b/sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl
index 3df7fc886c0a1..53009352f1194 100644
--- a/sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl
+++ b/sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl
@@ -2,48 +2,98 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-EARLGREY_A0_INDIVIDUALIZE_OTP_SW_CFGS = [
-    "sival",
-    "prodc",
-]
+load(
+    "@provisioning_exts//:cfg.bzl",
+    "EXT_EARLGREY_OTP_CFGS",
+    "EXT_EARLGREY_SKUS",
+)
 
-_DEVICE_ID_AND_TEST_TOKENS = """
-  --device-id="0x11111111_22222222_33333333_44444444_55555555_66666666_77777777_88888888"
-  --test-unlock-token="0x11111111_11111111_11111111_11111111"
-  --test-exit-token="0x11111111_11111111_11111111_11111111"
-"""
+# A list of OTP configurations that will be used to autogenerate FT
+# individualization binaries that configure OTP with the constants defined in
+# these bazel targets.
+EARLGREY_OTP_CFGS = {
+    "sv00": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_consts",
+    "em00": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_consts",
+} | EXT_EARLGREY_OTP_CFGS
 
-CP_PROVISIONING_INPUTS = _DEVICE_ID_AND_TEST_TOKENS + """
-  --manuf-state="0x00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000"
-  --wafer-auth-secret="0x00000000_00000000_00000000_00000000_00000000_00000000_00000000_00000000"
-"""
+# A dictionary of SKU configurations that will be used to generate FT
+# personalization binaries that configure OTP and flash info pages as defined
+# in these bazel targets.
+EARLGREY_SKUS = {
+    # OTP Config: Emulation; DICE Certs: X.509; Additional Certs: None
+    "emulation": {
+        "otp": "em00",
+        "ca_data": "@//sw/device/silicon_creator/manuf/keys/fake:ca_data",
+        "dice_libs": ["//sw/device/silicon_creator/lib/cert:dice"],
+        "host_ext_libs": ["@provisioning_exts//:default_ft_ext_lib"],
+        "device_ext_libs": ["@provisioning_exts//:default_perso_fw_ext"],
+        "ownership_libs": ["//sw/device/silicon_creator/lib/ownership:test_owner"],
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b",
+        "owner_fw": "//sw/device/silicon_owner/bare_metal:bare_metal_slot_b",
+        "ecdsa_key": {},
+        "spx_key": {},
+        "signature_prefix": None,
+        "orchestrator_cfg": "@//sw/host/provisioning/orchestrator/configs/skus:emulation.hjson",
+    },
+    # OTP Config: Emulation; DICE Certs: CWT; Additional Certs: None
+    "emulation_dice_cwt": {
+        "otp": "em00",
+        "ca_data": "@//sw/device/silicon_creator/manuf/keys/fake:ca_data",
+        "dice_libs": ["//sw/device/silicon_creator/lib/cert:dice_cwt"],
+        "host_ext_libs": ["@provisioning_exts//:default_ft_ext_lib"],
+        "device_ext_libs": ["@provisioning_exts//:default_perso_fw_ext"],
+        "ownership_libs": ["//sw/device/silicon_creator/lib/ownership:test_owner"],
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_cwt_slot_b",
+        "owner_fw": "//sw/device/silicon_owner/bare_metal:bare_metal_slot_b",
+        "ecdsa_key": {},
+        "spx_key": {},
+        "signature_prefix": None,
+        "orchestrator_cfg": "@//sw/host/provisioning/orchestrator/configs/skus:emulation_dice_cwt.hjson",
+    },
+    # OTP Config: Emulation; DICE Certs: X.509; Additional Certs: TPM EK
+    "emulation_tpm": {
+        "otp": "em00",
+        "ca_data": "@//sw/device/silicon_creator/manuf/keys/fake:ca_data",
+        "dice_libs": ["//sw/device/silicon_creator/lib/cert:dice"],
+        "host_ext_libs": ["@provisioning_exts//:default_ft_ext_lib"],
+        "device_ext_libs": [
+            "//sw/device/silicon_creator/lib/cert:tpm_ek_template_library",
+            "//sw/device/silicon_creator/manuf/base:tpm_perso_fw_ext",
+        ],
+        "ownership_libs": ["//sw/device/silicon_creator/lib/ownership:test_owner"],
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b",
+        "owner_fw": "//sw/device/silicon_owner/bare_metal:bare_metal_slot_b",
+        "ecdsa_key": {},
+        "spx_key": {},
+        "signature_prefix": None,
+        "orchestrator_cfg": "@//sw/host/provisioning/orchestrator/configs/skus:emulation_tpm.hjson",
+    },
+    "sival": {
+        "otp": "sv00",
+        "ca_data": "@//sw/device/silicon_creator/manuf/keys/sival:ca_data",
+        "dice_libs": ["//sw/device/silicon_creator/lib/cert:dice"],
+        "host_ext_libs": ["@provisioning_exts//:default_ft_ext_lib"],
+        "device_ext_libs": ["@provisioning_exts//:default_perso_fw_ext"],
+        "ownership_libs": ["//sw/device/silicon_creator/rom_ext/sival:sival_owner"],
+        "rom_ext": "//sw/device/silicon_creator/rom_ext/sival/binaries:rom_ext_dice_x509_prod",
+        "owner_fw": "//sw/device/silicon_owner/bare_metal:bare_metal_slot_b",
+        "ecdsa_key": {"//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset": "sv00-earlgrey-a1-root-ecdsa-prod-0"},
+        "spx_key": {},
+        "signature_prefix": None,
+        "perso_bin": "//sw/device/silicon_creator/manuf/base/binaries:ft_personalize_sival",
+        "orchestrator_cfg": "@//sw/host/provisioning/orchestrator/configs/skus:sival.hjson",
+        "offline": True,
+    },
+} | EXT_EARLGREY_SKUS
 
-FT_PERSONALIZE_KEYS = [
-    "//sw/device/silicon_creator/manuf/keys/fake:cert_endorsement_key.sk.der",
-    "//sw/device/silicon_creator/manuf/keys/fake:fake_ca.pem",
-    "//sw/device/silicon_creator/manuf/keys/fake:ckms_ca.pem",
-    "//sw/device/silicon_creator/manuf/keys/fake:rma_unlock_token_export_key.sk_hsm.der",
-]
-
-# Note that uds-auth-key-id below is the actual hash of the public key of cert_endorsement_key.sk.der
-FT_PROVISIONING_INPUTS = _DEVICE_ID_AND_TEST_TOKENS + """
-  --target-mission-mode-lc-state="prod"
-  --host-ecc-sk="$(rootpath //sw/device/silicon_creator/manuf/keys/fake:rma_unlock_token_export_key.sk_hsm.der)"
-  --rom-ext-measurement="0x11111111_11111111_11111111_11111111_11111111_11111111_11111111_11111111"
-  --owner-manifest-measurement="0x22222222_22222222_22222222_22222222_22222222_22222222_22222222_22222222"
-  --owner-measurement="0x33333333_33333333_33333333_33333333_33333333_33333333_33333333_33333333"
-  --rom-ext-security-version="0"
-  --owner-security-version="0"
-"""
-
-LOCAL_CERT_ENDORSEMENT_PARAMS = """
-  --ca-key-der-file="$(rootpath //sw/device/silicon_creator/manuf/keys/fake:cert_endorsement_key.sk.der)"
-  --ca-key-id="0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
-  --ca-certificate="$(rootpath //sw/device/silicon_creator/manuf/keys/fake:fake_ca.pem)"
-"""
-
-CLOUD_KMS_CERT_ENDORSEMENT_PARAMS = """
-  --ca-key-ckms-id="gcs-kms-earlgrey-ze-ca-p256-sha256-key"
-  --ca-key-id="0x40aac5fb_2b1205f9_003f40ab_7f3df784_1d5b59f5"
-  --ca-certificate="$(rootpath //sw/device/silicon_creator/manuf/keys/fake:ckms_ca.pem)"
-"""
+# TODO(lowRISC#27275): Refactor build/signing rules for perso binaries.
+def disqualified_for_signing(name, data):
+    if "staging" in name:
+        return True
+    if "emulation" in name:
+        return True
+    if not data["ecdsa_key"] and not data["spx_key"]:
+        return True
+    if "em00" in data["otp"]:
+        return True
+    return False
diff --git a/sw/device/silicon_creator/manuf/base/signatures/BUILD b/sw/device/silicon_creator/manuf/base/signatures/BUILD
new file mode 100644
index 0000000000000..0771afe455eb8
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/signatures/BUILD
@@ -0,0 +1,18 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "ecdsa_signatures",
+    srcs = glob(["*.ecdsa_sig"]),
+)
+
+filegroup(
+    name = "spx_signatures",
+    srcs = glob(
+        ["*.spx_sig"],
+        allow_empty = True,
+    ),
+)
diff --git a/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.ecdsa_sig b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.ecdsa_sig
new file mode 100644
index 0000000000000..d349dd464f2dc
Binary files /dev/null and b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_cw340_rom_with_fake_keys.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.ecdsa_sig b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.ecdsa_sig
new file mode 100644
index 0000000000000..6e02357c94190
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_fpga_hyper310_rom_with_fake_keys.ecdsa_sig
@@ -0,0 +1 @@
+‹åY0%®0su¿"Gjnþ‹B"H�M¯¶°Fyf÷d჋õ —´6Ê‚Qá¬oGF¡c–⧳
ð…º
\ No newline at end of file
diff --git a/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..57d21164cd08a
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/base/signatures/ft_personalize_sival_silicon_creator.ecdsa_sig
@@ -0,0 +1 @@
+AéúëÇ
b\N¨æi; 
MWqÔAq8\¤Ž–|Ÿ‹�\]d8GÖwlbF@sïâMœýNAX3­ÓxùØ
\ No newline at end of file
diff --git a/sw/device/silicon_creator/manuf/base/sram_cp_provision.c b/sw/device/silicon_creator/manuf/base/sram_cp_provision.c
index 8f1b8461b7939..16382a1df02d6 100644
--- a/sw/device/silicon_creator/manuf/base/sram_cp_provision.c
+++ b/sw/device/silicon_creator/manuf/base/sram_cp_provision.c
@@ -9,19 +9,18 @@
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
-#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/json/provisioning_data.h"
 #include "sw/device/lib/testing/lc_ctrl_testutils.h"
 #include "sw/device/lib/testing/otp_ctrl_testutils.h"
-#include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_console.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/silicon_creator/manuf/base/cp_device_id.h"
 #include "sw/device/silicon_creator/manuf/base/flash_info_permissions.h"
-#include "sw/device/silicon_creator/manuf/data/ast/calibration_values.h"
 #include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize.h"
 #include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
@@ -29,12 +28,30 @@
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otp_ctrl_regs.h"  // Generated.
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+// ATE Indicator GPIOs.
+static const dif_gpio_pin_t kGpioPinTestStart = 0;
+static const dif_gpio_pin_t kGpioPinTestDone = 1;
+static const dif_gpio_pin_t kGpioPinTestError = 2;
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 3;
+static const dif_gpio_pin_t kGpioPinSpiConsoleRxReady = 4;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
 
-static dif_otp_ctrl_t otp_ctrl;
-static dif_pinmux_t pinmux;
 static dif_flash_ctrl_state_t flash_ctrl_state;
+static dif_gpio_t gpio;
 static dif_lc_ctrl_t lc_ctrl;
+static dif_otp_ctrl_t otp_ctrl;
+static dif_pinmux_t pinmux;
+
+static uint32_t ast_cfg_data[kFlashInfoAstCalibrationDataSizeIn32BitWords];
 
 /**
  * Initializes all DIF handles used in this SRAM program.
@@ -43,6 +60,7 @@ static status_t peripheral_handles_init(void) {
   TRY(dif_flash_ctrl_init_state(
       &flash_ctrl_state,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
   TRY(dif_lc_ctrl_init(mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR),
                        &lc_ctrl));
   TRY(dif_otp_ctrl_init(
@@ -52,6 +70,36 @@ static status_t peripheral_handles_init(void) {
   return OK_STATUS();
 }
 
+/**
+ * Configure the ATE GPIO indicator pins.
+ */
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA6 / GPIO4 is for SPI console RX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa6,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleRxReady));
+  // IOA5 / GPIO3 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  // IOA0 / GPIO2 is for error reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa0,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestError));
+  // IOA1 / GPIO1 is for test done reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa1,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestDone));
+  // IOA4 / GPIO0 is for test start reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa4,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestStart));
+  TRY(dif_gpio_output_set_enabled_all(&gpio,
+                                      0x1f));       // Enable first 5 GPIOs.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+  return OK_STATUS();
+}
+
 static void manually_init_ast(uint32_t *data) {
   for (size_t i = 0; i < kFlashInfoAstCalibrationDataSizeIn32BitWords; ++i) {
     abs_mmio_write32(TOP_EARLGREY_AST_BASE_ADDR + i * sizeof(uint32_t),
@@ -59,134 +107,141 @@ static void manually_init_ast(uint32_t *data) {
   }
 }
 
-static status_t flash_info_page_0_erase(void) {
-  uint32_t byte_address = 0;
-  // DeviceId and ManufState are located on the same flash info page.
+static status_t flash_info_page_0_read_and_validate(
+    manuf_cp_provisioning_data_out_t *console_out) {
   TRY(flash_ctrl_testutils_info_region_setup_properties(
-      &flash_ctrl_state, kFlashInfoFieldDeviceId.page,
-      kFlashInfoFieldDeviceId.bank, kFlashInfoFieldDeviceId.partition,
-      kFlashInfoPage0Permissions, &byte_address));
-  TRY(flash_ctrl_testutils_erase_page(&flash_ctrl_state, byte_address,
-                                      kFlashInfoFieldDeviceId.partition,
-                                      kDifFlashCtrlPartitionTypeInfo));
-  return OK_STATUS();
-}
-
-static status_t flash_info_page_0_write(
-    manuf_cp_provisioning_data_t *provisioning_data) {
-  uint32_t byte_address = 0;
-  TRY(flash_ctrl_testutils_info_region_setup_properties(
-      &flash_ctrl_state, kFlashInfoFieldDeviceId.page,
-      kFlashInfoFieldDeviceId.bank, kFlashInfoFieldDeviceId.partition,
-      kFlashInfoPage0Permissions, &byte_address));
-
-  // Write DeviceId.
-  TRY(flash_ctrl_testutils_write(
-      &flash_ctrl_state, byte_address, kFlashInfoFieldDeviceId.partition,
-      provisioning_data->device_id, kDifFlashCtrlPartitionTypeInfo,
-      kHwCfgDeviceIdSizeIn32BitWords));
-
-  // Write ManufState (on same page as DeviceId).
-  TRY(flash_ctrl_testutils_write(
-      &flash_ctrl_state, byte_address + kFlashInfoFieldManufState.byte_offset,
-      kFlashInfoFieldManufState.partition, provisioning_data->manuf_state,
-      kDifFlashCtrlPartitionTypeInfo, kHwCfgManufStateSizeIn32BitWords));
-
-  // Write AST calibration values (on same page as DeviceId).
-  TRY(flash_ctrl_testutils_write(
-      &flash_ctrl_state,
-      byte_address + kFlashInfoFieldAstCalibrationData.byte_offset,
-      kFlashInfoFieldAstCalibrationData.partition, ast_cfg_data,
-      kDifFlashCtrlPartitionTypeInfo,
+      &flash_ctrl_state, kFlashInfoFieldCpDeviceId.page,
+      kFlashInfoFieldCpDeviceId.bank, kFlashInfoFieldCpDeviceId.partition,
+      kFlashInfoPage0Permissions, /*offset=*/NULL));
+
+  // Read (wafer) lot name.
+  uint32_t lot_name = 0;
+  static_assert(kFlashInfoFieldLotNameSizeIn32BitWords == 1,
+                "Lot name should fit in <32bits.");
+  TRY(manuf_flash_info_field_read(&flash_ctrl_state, kFlashInfoFieldLotName,
+                                  &lot_name,
+                                  kFlashInfoFieldLotNameSizeIn32BitWords));
+
+  // Read wafer number.
+  uint32_t wafer_number = 0;
+  static_assert(kFlashInfoFieldWaferNumberSizeIn32BitWords == 1,
+                "Wafer number should fit in <32bits.");
+  TRY(manuf_flash_info_field_read(&flash_ctrl_state, kFlashInfoFieldWaferNumber,
+                                  &wafer_number,
+                                  kFlashInfoFieldWaferNumberSizeIn32BitWords));
+
+  // Read wafer X coord.
+  uint32_t wafer_x_coord = 0;
+  static_assert(kFlashInfoFieldWaferXCoordSizeIn32BitWords == 1,
+                "Wafer X coordinate value should fit in <32bits.");
+  TRY(manuf_flash_info_field_read(&flash_ctrl_state, kFlashInfoFieldWaferXCoord,
+                                  &wafer_x_coord,
+                                  kFlashInfoFieldWaferXCoordSizeIn32BitWords));
+
+  // Read wafer Y coord.
+  uint32_t wafer_y_coord = 0;
+  static_assert(kFlashInfoFieldWaferYCoordSizeIn32BitWords == 1,
+                "Wafer Y coordinate value should fit in <32bits.");
+  TRY(manuf_flash_info_field_read(&flash_ctrl_state, kFlashInfoFieldWaferYCoord,
+                                  &wafer_y_coord,
+                                  kFlashInfoFieldWaferYCoordSizeIn32BitWords));
+
+  // Read AST calibration values into RAM.
+  TRY(manuf_flash_info_field_read(
+      &flash_ctrl_state, kFlashInfoFieldAstCalibrationData, ast_cfg_data,
       kFlashInfoAstCalibrationDataSizeIn32BitWords));
 
-  return OK_STATUS();
-}
+  // Encode CP device ID.
+  // HW origin portion of CP device.
+  // "0x00034001" encodes:
+  //   - a SiliconCreator ID of "0x4001" for "Nuvoton", and
+  //   - a Product ID of "0x0003" for Earlgrey A2 silicon.
+  console_out->cp_device_id[0] = kCpDeviceId[0];
+  TRY_CHECK(kCpDeviceId[0] == 0x00034001u,
+            "Expected to find Earlgrey A2 hardware origin in CP device ID.");
+  // Device Identification Number portion of CP device ID.
+  uint32_t year = (lot_name >> 24) & 0xf;
+  uint32_t week = (lot_name >> 16) & 0xff;
+  uint32_t lot_number = lot_name & 0xfff;
+  console_out->cp_device_id[1] =
+      (wafer_number << 24) | (lot_number << 12) | (week << 4) | year;
+  console_out->cp_device_id[2] = (wafer_y_coord << 12) | wafer_x_coord;
+  // Reserved word; set to 0.
+  console_out->cp_device_id[3] = 0;
+
+  // Write CP device ID.
+  TRY(manuf_flash_info_field_write(&flash_ctrl_state, kFlashInfoFieldCpDeviceId,
+                                   console_out->cp_device_id,
+                                   kFlashInfoFieldCpDeviceIdSizeIn32BitWords,
+                                   /*erase_page_before_write=*/false));
 
-static status_t wafer_auth_secret_flash_info_page_erase(void) {
-  uint32_t byte_address = 0;
-  TRY(flash_ctrl_testutils_info_region_setup_properties(
-      &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret.page,
-      kFlashInfoFieldWaferAuthSecret.bank,
-      kFlashInfoFieldWaferAuthSecret.partition, kFlashInfoPage3WritePermissions,
-      &byte_address));
-  TRY(flash_ctrl_testutils_erase_page(&flash_ctrl_state, byte_address,
-                                      kFlashInfoFieldWaferAuthSecret.partition,
-                                      kDifFlashCtrlPartitionTypeInfo));
   return OK_STATUS();
 }
 
 static status_t wafer_auth_secret_flash_info_page_write(
-    manuf_cp_provisioning_data_t *provisioning_data) {
-  uint32_t byte_address = 0;
+    manuf_cp_provisioning_data_t *console_in) {
   TRY(flash_ctrl_testutils_info_region_setup_properties(
       &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret.page,
       kFlashInfoFieldWaferAuthSecret.bank,
       kFlashInfoFieldWaferAuthSecret.partition, kFlashInfoPage3WritePermissions,
-      &byte_address));
-  TRY(flash_ctrl_testutils_write(
-      &flash_ctrl_state, byte_address, kFlashInfoFieldWaferAuthSecret.partition,
-      provisioning_data->manuf_state, kDifFlashCtrlPartitionTypeInfo,
-      kFlashInfoWaferAuthSecretSizeIn32BitWords));
-  return OK_STATUS();
-}
-
-static status_t print_inputs_to_console(
-    manuf_cp_provisioning_data_t *provisioning_data) {
-  uint32_t high;
-  uint32_t low;
-
-  LOG_INFO("Device ID:");
-  for (size_t i = 0; i < kHwCfgDeviceIdSizeIn32BitWords; ++i) {
-    LOG_INFO("0x%x", provisioning_data->device_id[i]);
-  }
-  LOG_INFO("Test Unlock Token Hash:");
-  for (size_t i = 0; i < ARRAYSIZE(provisioning_data->test_unlock_token_hash);
-       ++i) {
-    high = provisioning_data->test_unlock_token_hash[i] >> 32;
-    low = provisioning_data->test_unlock_token_hash[i] & 0xffffffff;
-    LOG_INFO("0x%x%x", high, low);
-  }
-  LOG_INFO("Test Exit Token Hash:");
-  for (size_t i = 0; i < ARRAYSIZE(provisioning_data->test_exit_token_hash);
-       ++i) {
-    high = provisioning_data->test_exit_token_hash[i] >> 32;
-    low = provisioning_data->test_exit_token_hash[i] & 0xffffffff;
-    LOG_INFO("0x%x%x", high, low);
-  }
+      /*offset=*/NULL));
+  TRY(manuf_flash_info_field_write(
+      &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret,
+      console_in->wafer_auth_secret,
+      kFlashInfoFieldWaferAuthSecretSizeIn32BitWords,
+      /*erase_page_before_write=*/true));
   return OK_STATUS();
 }
 
 /**
  * Provision flash info pages 0 and 3, and OTP Secret0 partition.
  */
-static status_t provision(ujson_t *uj) {
-  LOG_INFO("Waiting for CP provisioning data ...");
-  manuf_cp_provisioning_data_t provisioning_data;
-  TRY(ujson_deserialize_manuf_cp_provisioning_data_t(uj, &provisioning_data));
-  TRY(print_inputs_to_console(&provisioning_data));
-  TRY(flash_ctrl_testutils_wait_for_init(&flash_ctrl_state));
-  TRY(flash_info_page_0_erase());
-  TRY(wafer_auth_secret_flash_info_page_erase());
-  TRY(flash_info_page_0_write(&provisioning_data));
-  TRY(wafer_auth_secret_flash_info_page_write(&provisioning_data));
-  TRY(manuf_individualize_device_secret0(&lc_ctrl, &otp_ctrl,
-                                         &provisioning_data));
-  LOG_INFO("CP provisioning done.");
+static status_t provision(ujson_t *uj,
+                          manuf_cp_provisioning_data_out_t *console_out) {
+  // Wait for input console data.
+  base_printf("Waiting for CP provisioning data ...\n");
+  manuf_cp_provisioning_data_t console_in;
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, true));
+  TRY(ujson_deserialize_manuf_cp_provisioning_data_t(uj, &console_in));
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, false));
+
+  // Provision flash info page 3 (wafer authentication secret).
+  TRY(wafer_auth_secret_flash_info_page_write(&console_in));
+
+  // Burn test tokens into OTP.
+  TRY(manuf_individualize_device_secret0(&lc_ctrl, &otp_ctrl, &console_in));
+
+  // Send data back to host.
+  base_printf("Exporting CP device ID ...\n");
+  RESP_OK(ujson_serialize_manuf_cp_provisioning_data_out_t, uj, console_out);
+
   return OK_STATUS();
 }
 
 bool test_main(void) {
-  // Initialize AST, DIF handles, pinmux, and UART.
-  manually_init_ast(ast_cfg_data);
+  // Initialize DIF handles, pinmux, GPIO indicator pins, and console.
   CHECK_STATUS_OK(peripheral_handles_init());
-  pinmux_testutils_init(&pinmux);
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestStart, true));
   ottf_console_init();
   ujson_t uj = ujson_ottf_console();
-  LOG_INFO("AST manually configured.");
+
+  // Extract factory data from flash info page 0.
+  manuf_cp_provisioning_data_out_t console_out;
+  CHECK_STATUS_OK(flash_ctrl_testutils_wait_for_init(&flash_ctrl_state));
+  CHECK_STATUS_OK(flash_info_page_0_read_and_validate(&console_out));
+
+  // Initialize AST.
+  manually_init_ast(ast_cfg_data);
 
   // Perform CP provisioning operations.
-  CHECK_STATUS_OK(provision(&uj));
+  status_t result = provision(&uj, &console_out);
+  if (!status_ok(result)) {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestError, true));
+  } else {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestDone, true));
+  }
 
+  base_printf("CP provisioning done.\n");
   return true;
 }
diff --git a/sw/device/silicon_creator/manuf/base/sram_cp_provision_functest.c b/sw/device/silicon_creator/manuf/base/sram_cp_provision_functest.c
index 09a45609f0fc2..c88ed119c05ea 100644
--- a/sw/device/silicon_creator/manuf/base/sram_cp_provision_functest.c
+++ b/sw/device/silicon_creator/manuf/base/sram_cp_provision_functest.c
@@ -6,19 +6,20 @@
 
 #include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/dif/dif_gpio.h"
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
-#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/json/provisioning_data.h"
 #include "sw/device/lib/testing/lc_ctrl_testutils.h"
 #include "sw/device/lib/testing/otp_ctrl_testutils.h"
-#include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_console.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/silicon_creator/manuf/base/cp_device_id.h"
 #include "sw/device/silicon_creator/manuf/base/flash_info_permissions.h"
 #include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize.h"
@@ -27,12 +28,23 @@
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otp_ctrl_regs.h"  // Generated.
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 0;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
 
-static dif_otp_ctrl_t otp_ctrl;
-static dif_pinmux_t pinmux;
 static dif_flash_ctrl_state_t flash_ctrl_state;
+static dif_gpio_t gpio;
 static dif_lc_ctrl_t lc_ctrl;
+static dif_otp_ctrl_t otp_ctrl;
+static dif_pinmux_t pinmux;
 
 /**
  * Initializes all DIF handles used in this SRAM program.
@@ -41,6 +53,7 @@ static status_t peripheral_handles_init(void) {
   TRY(dif_flash_ctrl_init_state(
       &flash_ctrl_state,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
   TRY(dif_lc_ctrl_init(mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR),
                        &lc_ctrl));
   TRY(dif_otp_ctrl_init(
@@ -50,66 +63,110 @@ static status_t peripheral_handles_init(void) {
   return OK_STATUS();
 }
 
-static status_t check_device_id_and_manuf_state(
-    manuf_cp_provisioning_data_t *expected_data) {
-  LOG_INFO("Checking expected DeviceId and ManufState data ...");
-  // Configure flash info page 0 permissions.
+/**
+ * Configure the ATE GPIO indicator pins.
+ */
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA5 / GPIO0 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  TRY(dif_gpio_output_set_enabled_all(&gpio, 0x1));  // Enable first GPIO.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));   // Intialize all to 0.
+  return OK_STATUS();
+}
+
+/**
+ * Writes test data to flash info page 0 so the sram_cp_provision.c program can
+ * read it out.
+ */
+static status_t prep_flash_info_page_0(manuf_cp_test_data_t *test_data) {
+  // Setup page permissions on flash info page 0.
   uint32_t byte_address = 0;
-  uint32_t actual_device_id[kHwCfgDeviceIdSizeIn32BitWords] = {0};
-  uint32_t actual_manuf_state[kHwCfgManufStateSizeIn32BitWords] = {0};
   TRY(flash_ctrl_testutils_info_region_setup_properties(
-      &flash_ctrl_state, kFlashInfoFieldDeviceId.page,
-      kFlashInfoFieldDeviceId.bank, kFlashInfoFieldDeviceId.partition,
+      &flash_ctrl_state, kFlashInfoFieldCpDeviceId.page,
+      kFlashInfoFieldCpDeviceId.bank, kFlashInfoFieldCpDeviceId.partition,
       kFlashInfoPage0Permissions, &byte_address));
 
-  // Read and check device_id.
-  TRY(flash_ctrl_testutils_read(
-      &flash_ctrl_state, byte_address, kFlashInfoFieldDeviceId.partition,
-      actual_device_id, kDifFlashCtrlPartitionTypeInfo,
-      kHwCfgDeviceIdSizeIn32BitWords,
-      /*delay_micros=*/0));
-  CHECK_ARRAYS_EQ(actual_device_id, expected_data->device_id,
-                  kHwCfgDeviceIdSizeIn32BitWords);
-
-  // Read and check manuf_state (on same page as device_id).
-  TRY(flash_ctrl_testutils_read(
-      &flash_ctrl_state, byte_address + kFlashInfoFieldManufState.byte_offset,
-      kFlashInfoFieldManufState.partition, actual_manuf_state,
-      kDifFlashCtrlPartitionTypeInfo, kHwCfgManufStateSizeIn32BitWords,
-      /*delay_micros=*/0));
-  CHECK_ARRAYS_EQ(actual_manuf_state, expected_data->manuf_state,
-                  kHwCfgManufStateSizeIn32BitWords);
+  // Lot name.
+  TRY(manuf_flash_info_field_write(&flash_ctrl_state, kFlashInfoFieldLotName,
+                                   &test_data->lot_name,
+                                   kFlashInfoFieldLotNameSizeIn32BitWords,
+                                   /*erase_page_before_write=*/true));
+
+  // Wafer number.
+  TRY(manuf_flash_info_field_write(
+      &flash_ctrl_state, kFlashInfoFieldWaferNumber, &test_data->wafer_number,
+      kFlashInfoFieldWaferNumberSizeIn32BitWords,
+      /*erase_page_before_write=*/false));
+
+  // Wafer X coord.
+  TRY(manuf_flash_info_field_write(
+      &flash_ctrl_state, kFlashInfoFieldWaferXCoord, &test_data->wafer_x_coord,
+      kFlashInfoFieldWaferXCoordSizeIn32BitWords,
+      /*erase_page_before_write=*/false));
+
+  // Wafer Y coord.
+  TRY(manuf_flash_info_field_write(
+      &flash_ctrl_state, kFlashInfoFieldWaferYCoord, &test_data->wafer_y_coord,
+      kFlashInfoFieldWaferYCoordSizeIn32BitWords,
+      /*erase_page_before_write=*/false));
 
   return OK_STATUS();
 }
 
 bool test_main(void) {
+  // Initialize peripherals, pinmux, and console.
   CHECK_STATUS_OK(peripheral_handles_init());
-  pinmux_testutils_init(&pinmux);
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
   ottf_console_init();
   ujson_t uj = ujson_ottf_console();
 
-  // Check we are in in TEST_UNLOCKED1.
-  CHECK_STATUS_OK(
-      lc_ctrl_testutils_check_lc_state(&lc_ctrl, kDifLcCtrlStateTestUnlocked1));
-
-  LOG_INFO("Waiting for expected CP provisioning data ...");
-
-  // Get expected provisioning data over console.
-  manuf_cp_provisioning_data_t expected_data;
-  CHECK_STATUS_OK(
-      ujson_deserialize_manuf_cp_provisioning_data_t(&uj, &expected_data));
-
-  // Read and check device_id and manuf_state fields from flash info page 0.
-  CHECK_STATUS_OK(check_device_id_and_manuf_state(&expected_data));
-
-  // Note: we cannot read/check the wafer_auth_secret field in flash info page
-  // 3, as this page is not readable in the TEST_UNLOCKED* states.
-
-  // Check the secret0 partition has been provisioned / locked.
-  CHECK_STATUS_OK(manuf_individualize_device_secret0_check(&otp_ctrl));
-
-  LOG_INFO("Checks complete. Success");
+  // Get LC state.
+  dif_lc_ctrl_state_t lc_state;
+  CHECK_DIF_OK(dif_lc_ctrl_get_state(&lc_ctrl, &lc_state));
+
+  // Get CP test data over console.
+  base_printf("Waiting for CP test data ...\n");
+  manuf_cp_test_data_t test_data;
+  CHECK_STATUS_OK(ujson_deserialize_manuf_cp_test_data_t(&uj, &test_data));
+
+  if (lc_state == kDifLcCtrlStateTestUnlocked0) {
+    // Write test data to flash info page 0.
+    CHECK_STATUS_OK(prep_flash_info_page_0(&test_data));
+    base_printf("Flash info page 0 programmed.\n");
+  } else if (lc_state == kDifLcCtrlStateTestUnlocked1) {
+    // Read and validate CP device ID.
+    uint32_t cp_device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords] = {0};
+    static_assert(kFlashInfoFieldCpDeviceIdSizeIn32BitWords == 4,
+                  "CP device ID should fit in four 32bit words.");
+    CHECK_STATUS_OK(flash_ctrl_testutils_info_region_setup_properties(
+        &flash_ctrl_state, kFlashInfoFieldCpDeviceId.page,
+        kFlashInfoFieldCpDeviceId.bank, kFlashInfoFieldCpDeviceId.partition,
+        kFlashInfoPage0Permissions, /*offset=*/NULL));
+    CHECK_STATUS_OK(manuf_flash_info_field_read(
+        &flash_ctrl_state, kFlashInfoFieldCpDeviceId, cp_device_id,
+        kFlashInfoFieldCpDeviceIdSizeIn32BitWords));
+    uint32_t year = (test_data.lot_name >> 24) & 0xf;
+    uint32_t week = (test_data.lot_name >> 16) & 0xff;
+    uint32_t lot_number = test_data.lot_name & 0xfff;
+    CHECK(cp_device_id[0] == kCpDeviceId[0]);
+    CHECK(cp_device_id[1] == ((test_data.wafer_number << 24) |
+                              (lot_number << 12) | (week << 4) | year));
+    CHECK(cp_device_id[2] ==
+          ((test_data.wafer_y_coord << 12) | test_data.wafer_x_coord));
+    CHECK(cp_device_id[3] == 0);
+
+    // Note: we cannot read/check the wafer_auth_secret field in flash info page
+    // 3, as this page is not readable in the TEST_UNLOCKED* states.
+
+    // Check the secret0 partition has been provisioned / locked.
+    CHECK_STATUS_OK(manuf_individualize_device_secret0_check(&otp_ctrl));
+    base_printf("Checks complete. Success.\n");
+  } else {
+    base_printf("Bad LC state.\n");
+    return false;
+  }
 
   return true;
 }
diff --git a/sw/device/silicon_creator/manuf/base/sram_ft_individualize.c b/sw/device/silicon_creator/manuf/base/sram_ft_individualize.c
index 97fcc906ba641..4e82e0c626717 100644
--- a/sw/device/silicon_creator/manuf/base/sram_ft_individualize.c
+++ b/sw/device/silicon_creator/manuf/base/sram_ft_individualize.c
@@ -5,35 +5,57 @@
 #include <stdint.h>
 
 #include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/dif/dif_gpio.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
-#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
 #include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_console.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/silicon_creator/manuf/base/flash_info_permissions.h"
+#include "sw/device/silicon_creator/manuf/base/ft_device_id.h"
 #include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h"
 #include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
 
+#include "ast_regs.h"  // Generated.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
-
 static dif_flash_ctrl_state_t flash_ctrl_state;
+static dif_gpio_t gpio;
 static dif_otp_ctrl_t otp_ctrl;
 static dif_pinmux_t pinmux;
 
 static manuf_ft_individualize_data_t in_data;
-static uint32_t device_id[kHwCfgDeviceIdSizeIn32BitWords];
-static uint32_t ast_cfg_data[kHwCfgDeviceIdSizeIn32BitWords];
+
+// ATE Indicator GPIOs.
+static const dif_gpio_pin_t kGpioPinTestStart = 0;
+static const dif_gpio_pin_t kGpioPinTestDone = 1;
+static const dif_gpio_pin_t kGpioPinTestError = 2;
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 3;
+static const dif_gpio_pin_t kGpioPinSpiConsoleRxReady = 4;
+
+#ifndef ATE
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
+#else
+OTTF_DEFINE_TEST_CONFIG();
+#endif
 
 /**
  * Initializes all DIF handles used in this SRAM program.
@@ -42,6 +64,7 @@ static status_t peripheral_handles_init(void) {
   TRY(dif_flash_ctrl_init_state(
       &flash_ctrl_state,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
   TRY(dif_otp_ctrl_init(
       mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
   TRY(dif_pinmux_init(mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR),
@@ -50,67 +73,121 @@ static status_t peripheral_handles_init(void) {
 }
 
 /**
- * Print data stored in flash info page 0 to console for manual verification
- * purposes during silicon bring-up.
+ * Configure the ATE GPIO indicator pins.
  */
-static status_t print_flash_info_0_data_to_console(void) {
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA6 / GPIO4 is for SPI console RX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa6,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleRxReady));
+  // IOA5 / GPIO3 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  // IOA0 / GPIO2 is for error reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa0,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestError));
+  // IOA1 / GPIO1 is for test done reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa1,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestDone));
+  // IOA4 / GPIO0 is for test start reporting.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa4,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinTestStart));
+  TRY(dif_gpio_output_set_enabled_all(&gpio,
+                                      0x1f));       // Enable first 5 GPIOs.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+  return OK_STATUS();
+}
+
+/**
+ * Patch AST config if patch exists in flash info page 0.
+ */
+static status_t patch_ast_config_value(void) {
   uint32_t byte_address = 0;
   TRY(flash_ctrl_testutils_info_region_setup_properties(
-      &flash_ctrl_state, kFlashInfoFieldDeviceId.page,
-      kFlashInfoFieldDeviceId.bank, kFlashInfoFieldDeviceId.partition,
-      kFlashInfoPage0Permissions, &byte_address));
-
-  LOG_INFO("Device ID:");
-  TRY(manuf_flash_info_field_read(&flash_ctrl_state, kFlashInfoFieldDeviceId,
-                                  device_id, kHwCfgDeviceIdSizeIn32BitWords));
-  for (size_t i = 0; i < kHwCfgDeviceIdSizeIn32BitWords; ++i) {
-    LOG_INFO("0x%x", device_id[i]);
-  }
-
-  LOG_INFO("AST Calibration Values:");
+      &flash_ctrl_state, kFlashInfoFieldAstIndividPatchAddr.page,
+      kFlashInfoFieldAstIndividPatchAddr.bank,
+      kFlashInfoFieldAstIndividPatchAddr.partition, kFlashInfoPage0Permissions,
+      &byte_address));
+
+  // Read patch address and value from flash info 0.
+  uint32_t ast_patch_addr_offset;
+  uint32_t ast_patch_value;
   TRY(manuf_flash_info_field_read(
-      &flash_ctrl_state, kFlashInfoFieldAstCalibrationData, ast_cfg_data,
-      kFlashInfoAstCalibrationDataSizeIn32BitWords));
-  for (size_t i = 0; i < kFlashInfoAstCalibrationDataSizeIn32BitWords; ++i) {
-    LOG_INFO("0x%x", ast_cfg_data[i]);
+      &flash_ctrl_state, kFlashInfoFieldAstIndividPatchAddr,
+      &ast_patch_addr_offset,
+      kFlashInfoFieldAstIndividPatchAddrSizeIn32BitWords));
+  TRY(manuf_flash_info_field_read(
+      &flash_ctrl_state, kFlashInfoFieldAstIndividPatchVal, &ast_patch_value,
+      kFlashInfoFieldAstIndividPatchValSizeIn32BitWords));
+
+  // Only patch AST if the patch value is present.
+  if (ast_patch_value != 0 && ast_patch_value != UINT32_MAX) {
+    // Check the address is within range before programming.
+    if (kDeviceType == kDeviceSilicon || kDeviceType == kDeviceSimDV) {
+      TRY_CHECK(ast_patch_addr_offset <= AST_REGAL_REG_OFFSET);
+    }
+    // Write patch value.
+    abs_mmio_write32(
+        TOP_EARLGREY_AST_BASE_ADDR + ast_patch_addr_offset * sizeof(uint32_t),
+        ast_patch_value);
   }
 
   return OK_STATUS();
 }
 
 /**
- * Provision OTP {CreatorSw,OwnerSw,Hw}Cfg partitions.
+ * Provision OTP {CreatorSw,OwnerSw,Hw}Cfg and RotCreatorAuth{Codesign,State}
+ * partitions.
  *
- * Note: CreatorSwCfg partition is not locked yet, as the flash scrambling OTP
- * field is not provisioned until after the Secret1 partition is provisioned
- * during personalization.
+ * Note: CreatorSwCfg and OwnerSwCfg partitions are not locked yet, as not
+ * all fields can be programmed until the personalization stage.
  */
 static status_t provision(ujson_t *uj) {
-  LOG_INFO("Waiting for FT SRAM provisioning data ...");
+  // Patch AST config if requested.
+  TRY(patch_ast_config_value());
+
+  // Perform OTP writes.
+#ifndef ATE
+  // Get host data.
+  base_printf("Waiting for FT SRAM provisioning data ...");
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, true));
   TRY(ujson_deserialize_manuf_ft_individualize_data_t(uj, &in_data));
+  TRY(dif_gpio_write(&gpio, kGpioPinSpiConsoleRxReady, false));
   TRY(manuf_individualize_device_hw_cfg(&flash_ctrl_state, &otp_ctrl,
                                         kFlashInfoPage0Permissions,
-                                        in_data.device_id));
-  TRY(manuf_individualize_device_creator_sw_cfg(&otp_ctrl, &flash_ctrl_state));
+                                        in_data.ft_device_id));
+#else
+  TRY(manuf_individualize_device_hw_cfg(
+      &flash_ctrl_state, &otp_ctrl, kFlashInfoPage0Permissions, kFtDeviceId));
+#endif
+  TRY(manuf_individualize_device_rot_creator_auth_codesign(&otp_ctrl));
+  TRY(manuf_individualize_device_rot_creator_auth_state(&otp_ctrl));
   TRY(manuf_individualize_device_owner_sw_cfg(&otp_ctrl));
-  LOG_INFO("FT SRAM provisioning done.");
+  TRY(manuf_individualize_device_creator_sw_cfg(&otp_ctrl, &flash_ctrl_state));
+
   return OK_STATUS();
 }
 
 bool test_main(void) {
   CHECK_STATUS_OK(peripheral_handles_init());
-  pinmux_testutils_init(&pinmux);
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
+  ujson_t uj;
+#ifndef ATE
   ottf_console_init();
-  ujson_t uj = ujson_ottf_console();
-
-  // Print flash data to console (for manual verification purposes) and perform
-  // provisioning operations.
-  CHECK_STATUS_OK(print_flash_info_0_data_to_console());
-  CHECK_STATUS_OK(provision(&uj));
-
-  // Halt the CPU here to enable JTAG to perform an LC transition to mission
-  // mode, as ROM execution should be active now.
-  abort();
-
+  uj = ujson_ottf_console();
+#endif
+
+  // Perform provisioning operations.
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestStart, true));
+  status_t result = provision(&uj);
+  if (!status_ok(result)) {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestError, true));
+  } else {
+    CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinTestDone, true));
+  }
   return true;
 }
diff --git a/sw/device/silicon_creator/manuf/base/tpm_personalize_ext.c b/sw/device/silicon_creator/manuf/base/tpm_personalize_ext.c
index 493013f951149..eeb6ad7d80322 100644
--- a/sw/device/silicon_creator/manuf/base/tpm_personalize_ext.c
+++ b/sw/device/silicon_creator/manuf/base/tpm_personalize_ext.c
@@ -2,17 +2,18 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "perso_tlv_data.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
-#include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/silicon_creator/lib/attestation.h"
 #include "sw/device/silicon_creator/lib/cert/cert.h"
-#include "sw/device/silicon_creator/lib/cert/tpm_cek.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/tpm_cik.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/tpm_ek.h"   // Generated.
-#include "sw/device/silicon_creator/lib/dice.h"
+#include "sw/device/silicon_creator/lib/cert/tpm.h"
+#include "sw/device/silicon_creator/lib/cert/tpm_ek.h"  // Generated.
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/manuf/base/personalize_ext.h"
 #include "sw/device/silicon_creator/manuf/lib/personalize.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -27,10 +28,9 @@ static dif_flash_ctrl_state_t flash_ctrl_state;
  */
 static hmac_digest_t tpm_endorsement_key_id;
 static hmac_digest_t tpm_pubkey_id;
-static dice_cert_key_id_pair_t tpm_key_ids = {
-    .endorsement = &tpm_endorsement_key_id, .cert = &tpm_pubkey_id};
+static cert_key_id_pair_t tpm_key_ids = {.endorsement = &tpm_endorsement_key_id,
+                                         .cert = &tpm_pubkey_id};
 static ecdsa_p256_public_key_t curr_pubkey = {.x = {0}, .y = {0}};
-static char *kTpmCertNames[] = {"EK", "CEK", "CIK"};
 
 /**
  * Initializes all DIF handles used in this program.
@@ -42,104 +42,61 @@ static status_t peripheral_handles_init(void) {
   return OK_STATUS();
 }
 
-enum {
-  /**
-   * Indices of the TPM TBS certificates in the `tbs_certs` struct that is sent
-   * to the host during personalization.
-   */
-  kTpmEkTbsCertStructIdx = 3,
-  kTpmCekTbsCertStructIdx = 4,
-  kTpmCikTbsCertStructIdx = 5,
-
-  /**
-   * Index of the `cert_flash_layout` array in the `ft_personalize.c` base
-   * firmware to use to hold the additional TPM certificates.
-   */
-  kTpmCertFlashLayoutIdx = 1,
-};
-
 /**
  * Configures flash info pages to store device certificates.
  */
 static status_t config_and_erase_tpm_certificate_flash_pages(void) {
-  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageOwnerReserved7);
-  TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerReserved7,
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageOwnerReserved6);
+  TRY(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerReserved6,
                             kFlashCtrlEraseTypePage));
   return OK_STATUS();
 }
 
-static status_t personalize_gen_tpm_certificates(
-    ujson_t *uj, manuf_certgen_inputs_t *certgen_inputs,
-    manuf_certs_t *tbs_certs, cert_flash_info_layout_t *cert_flash_layout) {
-  size_t curr_cert_size = 0;
+// Temp buffer for storing generated EK certificate.
+static uint8_t cert_buffer[kTpmEkMaxTbsSizeBytes];
 
+static status_t personalize_gen_tpm_ek_certificate(
+    manuf_certgen_inputs_t *certgen_inputs, perso_blob_t *perso_blob,
+    cert_flash_info_layout_t *cert_flash_layout) {
+  size_t curr_cert_size = 0;
   // Set the endorsement key ID.
-  memcpy(tpm_endorsement_key_id.digest, certgen_inputs->auth_key_key_id,
-         kDiceCertKeyIdSizeInBytes);
-
-  // Add three certs to the total number of certs set to the host.
-  tbs_certs->num_certs += 3;
-
-  // All three TPM certificates will need host-side endorsing.
-  tbs_certs->tbs[kTpmEkTbsCertStructIdx] = true;
-  tbs_certs->tbs[kTpmCekTbsCertStructIdx] = true;
-  tbs_certs->tbs[kTpmCikTbsCertStructIdx] = true;
+  memcpy(tpm_endorsement_key_id.digest, certgen_inputs->ext_auth_key_key_id,
+         kCertKeyIdSizeInBytes);
 
   // Set the flash info page layout.
-  cert_flash_layout[kTpmCertFlashLayoutIdx].used = true;
-  cert_flash_layout[kTpmCertFlashLayoutIdx].group_name = "TPM";
-  cert_flash_layout[kTpmCertFlashLayoutIdx].num_certs = 3;
-  cert_flash_layout[kTpmCertFlashLayoutIdx].names = kTpmCertNames;
+  cert_flash_layout[kCertFlashLayoutExt0Idx].used = true;
+  cert_flash_layout[kCertFlashLayoutExt0Idx].group_name = "TPM";
+  cert_flash_layout[kCertFlashLayoutExt0Idx].num_certs = 1;
 
   // Provision TPM keygen seeds to flash info.
   TRY(manuf_personalize_flash_asymm_key_seed(
       &flash_ctrl_state, kFlashInfoFieldTpmEkAttestationKeySeed,
       kAttestationSeedWords));
-  TRY(manuf_personalize_flash_asymm_key_seed(
-      &flash_ctrl_state, kFlashInfoFieldTpmCekAttestationKeySeed,
-      kAttestationSeedWords));
-  TRY(manuf_personalize_flash_asymm_key_seed(
-      &flash_ctrl_state, kFlashInfoFieldTpmCikAttestationKeySeed,
-      kAttestationSeedWords));
 
   // Generate TPM EK keys and (TBS) cert.
-  curr_cert_size = kTpmEkMaxTbsSizeBytes;
-  TRY(dice_attestation_keygen(kDiceKeyTpmEk, &tpm_pubkey_id, &curr_pubkey));
-  TRY(dice_tpm_ek_tbs_cert_build(&tpm_key_ids, &curr_pubkey,
-                                 &tbs_certs->certs[tbs_certs->next_free],
-                                 &curr_cert_size));
-  tbs_certs->next_free += curr_cert_size;
-  LOG_INFO("Generated TPM EK TBS certificate.");
-
-  // Generate TPM CEK keys and (TBS) cert.
-  curr_cert_size = kTpmCekMaxTbsSizeBytes;
-  TRY(dice_attestation_keygen(kDiceKeyTpmCek, &tpm_pubkey_id, &curr_pubkey));
-  TRY(dice_tpm_cek_tbs_cert_build(&tpm_key_ids, &curr_pubkey,
-                                  &tbs_certs->certs[tbs_certs->next_free],
-                                  &curr_cert_size));
-  tbs_certs->next_free += curr_cert_size;
-  LOG_INFO("Generated TPM CEK TBS certificate.");
-
-  // Generate TPM CIK keys and (TBS) cert.
-  curr_cert_size = kTpmCikMaxTbsSizeBytes;
-  TRY(dice_attestation_keygen(kDiceKeyTpmCik, &tpm_pubkey_id, &curr_pubkey));
-  TRY(dice_tpm_cik_tbs_cert_build(&tpm_key_ids, &curr_pubkey,
-                                  &tbs_certs->certs[tbs_certs->next_free],
-                                  &curr_cert_size));
-  tbs_certs->next_free += curr_cert_size;
-  LOG_INFO("Generated TPM CIK TBS certificate.");
-
+  TRY(otbn_boot_cert_ecc_p256_keygen(kTpmKeyEk, &tpm_pubkey_id, &curr_pubkey));
+
+  curr_cert_size = sizeof(cert_buffer);
+  TRY(tpm_ek_tbs_cert_build(&tpm_key_ids, &curr_pubkey, cert_buffer,
+                            &curr_cert_size));
+  TRY(perso_tlv_push_cert_to_perso_blob("TPM EK", /*needs_endorsement=*/true,
+                                        kDiceCertFormatX509TcbInfo, cert_buffer,
+                                        curr_cert_size, perso_blob));
   return OK_STATUS();
 }
 
-status_t personalize_extension(ujson_t *uj,
-                               manuf_certgen_inputs_t *certgen_inputs,
-                               manuf_certs_t *tbs_certs,
-                               cert_flash_info_layout_t *cert_flash_layout) {
-  LOG_INFO("Running TPM perso extension ...");
+status_t personalize_extension_pre_cert_endorse(
+    personalize_extension_pre_endorse_t *pre_params) {
   TRY(peripheral_handles_init());
   TRY(config_and_erase_tpm_certificate_flash_pages());
-  TRY(personalize_gen_tpm_certificates(uj, certgen_inputs, tbs_certs,
-                                       cert_flash_layout));
+  TRY(personalize_gen_tpm_ek_certificate(pre_params->certgen_inputs,
+                                         pre_params->perso_blob_to_host,
+                                         pre_params->cert_flash_layout));
+  return OK_STATUS();
+}
+
+status_t personalize_extension_post_cert_endorse(
+    personalize_extension_post_endorse_t *post_params) {
+  /* Empty because it is unused but we still need to link to something. */
   return OK_STATUS();
 }
diff --git a/sw/device/silicon_creator/manuf/data/manuf_testplan.hjson b/sw/device/silicon_creator/manuf/data/manuf_testplan.hjson
index 8621f6eeb2667..23ccde9e97758 100644
--- a/sw/device/silicon_creator/manuf/data/manuf_testplan.hjson
+++ b/sw/device/silicon_creator/manuf/data/manuf_testplan.hjson
@@ -32,7 +32,7 @@
       otp_mutate: true
       lc_states: ["RAW"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_unlock_raw_functest"]
     }
 
     {
@@ -59,6 +59,13 @@
       otp_mutate: true
       lc_states: ["TEST_UNLOCKED", "DEV", "PROD", "PROD_END", "RMA"]
       tests: []
+      bazel: [
+        "//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_test_unlocked0"
+        "//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_dev"
+        "//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_prod"
+        "//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_prod_end"
+        "//sw/device/silicon_creator/manuf/tests:manuf_scrap_functest_rma"
+      ]
     }
 
     {
@@ -82,7 +89,7 @@
       otp_mutate: false
       lc_states: ["TEST_UNLOCKED"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_yield_test_functest_test_unlocked0"]
     }
 
     {
@@ -109,7 +116,7 @@
       otp_mutate: false
       lc_states: ["TEST_UNLOCKED"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_ast_test_execution_test_unlocked0_functest"]
     }
 
     {
@@ -140,7 +147,7 @@
       otp_mutate: false
       lc_states: ["TEST_UNLOCKED"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_device_info_flash_wr_test_unlocked0_to_prod_functest"]
     }
 
     {
@@ -181,7 +188,7 @@
       otp_mutate: true
       lc_states: ["TEST_UNLOCKED"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_cp_test_lock_functest"]
     }
 
     {
@@ -523,7 +530,7 @@
       otp_mutate: false
       lc_states: ["TEST_UNLOCKED"]
       tests: []
-      bazel: []
+      bazel: ["//sw/device/silicon_creator/manuf/tests:manuf_sram_program_crc_test_unlocked0_functest"]
     }
   ]
 }
diff --git a/sw/device/silicon_creator/manuf/extensions/BUILD.bazel b/sw/device/silicon_creator/manuf/extensions/BUILD.bazel
index ac35d56b56367..56396bdeddf28 100644
--- a/sw/device/silicon_creator/manuf/extensions/BUILD.bazel
+++ b/sw/device/silicon_creator/manuf/extensions/BUILD.bazel
@@ -2,51 +2,31 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@bazel_skylib//rules:common_settings.bzl", "bool_flag")
+load("@rules_rust//rust:defs.bzl", "rust_library")
 
 package(default_visibility = ["//visibility:public"])
 
-bool_flag(
-    name = "use_example_perso_ext",
-    build_setting_default = False,
-)
-
-config_setting(
-    name = "example_perso_ext_cfg",
-    flag_values = {
-        ":use_example_perso_ext": "True",
-    },
-)
-
-cc_library(
-    name = "example_perso_fw_ext",
-    srcs = ["example_personalize_ext.c"],
-    deps = [
-        "@//sw/device/lib/runtime:log",
-        "@//sw/device/lib/testing/json:provisioning_data",
-        "@//sw/device/lib/testing/test_framework:status",
-        "@//sw/device/lib/testing/test_framework:ujson_ottf",
-        "@//sw/device/silicon_creator/lib/cert",
-    ],
-)
-
 cc_library(
     name = "default_perso_fw_ext",
     srcs = ["default_personalize_ext.c"],
     deps = [
+        "@//sw/device/lib/dif:flash_ctrl",
         "@//sw/device/lib/testing/json:provisioning_data",
         "@//sw/device/lib/testing/test_framework:status",
         "@//sw/device/lib/testing/test_framework:ujson_ottf",
         "@//sw/device/silicon_creator/lib/cert",
+        "@//sw/device/silicon_creator/manuf/base:personalize_ext",
+        "@//sw/device/silicon_creator/manuf/lib:flash_info_fields",
     ],
 )
 
-_PERSO_EXTS = select({
-    "example_perso_ext_cfg": [":example_perso_fw_ext"],
-    "//conditions:default": [":default_perso_fw_ext"],
-})
-
-cc_library(
-    name = "perso_fw_ext",
-    deps = _PERSO_EXTS,
+rust_library(
+    name = "default_ft_ext_lib",
+    srcs = ["default_ft_ext_lib.rs"],
+    crate_name = "ft_ext_lib",
+    deps = [
+        "@//sw/host/provisioning/util_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+    ],
 )
diff --git a/sw/device/silicon_creator/manuf/extensions/README.md b/sw/device/silicon_creator/manuf/extensions/README.md
index 4789856ca84f8..6770b7639b5cd 100644
--- a/sw/device/silicon_creator/manuf/extensions/README.md
+++ b/sw/device/silicon_creator/manuf/extensions/README.md
@@ -1,35 +1,62 @@
 # Provisioning Flow Extensions
 
-Various components of the reference provisioning flow provided can be extended
-to satisfy the requirements of various SKUs. This describes the infrastructure
-in place that enables extending reference provisioning flows with code managed
-outside this repo.
+Provisioning an Earlgrey chip requires executing code on devivce during two core
+phases:
+
+1. Chip Probe (CP): when the wafer is still intact, and
+2. Final Test (FT): when each chip has been packaged and loaded into a socket.
+For the most part, the CP process is the same across all Earlgrey chips,
+regardless of the SKU. However, the FT process can differ based on the target
+SKU.
+
+## FT Provisioning Overview
+
+There are two main phases during FT provisioning:
+1. individualization, and
+2. personalization.
+
+## Customizing FT Provisioning Flows
+
+Various components of the reference FT provisioning flow can be extended to
+satisfy the requirements of various SKUs. Specifically, there is Bazel
+infrastructure, and example code, in place to demonstrate how one can define:
+1. downstream OTP configurations for a custom SKU, and
+2. downstream personalization firmware and host harness extensions for a custom SKU.
+
+Defining both start by defining an additional Bazel repo location on your system
+that resembles the directory this README.md is located in, and pointing Bazel
+at it via the `PROV_EXTS_DIR` envar. This tells Bazel to instantiate a local
+repo called `@provisioning_exts`.
+
+## OTP Image Definitions
+
+To define additional OTP configurations downstream, one must add OTP targets
+to the `EXT_EARLGREY_OTP_CFGS` and `EXT_EARLGREY_SKUS` dictionaries in their
+downstream `@provisioning_exts` Bazel repo.
+
+## Execution Environments
+
+To define additional execution environments downstream, add `exec_env`
+compatible entries to the `EXT_EXEC_ENV_SILICON_ROM_EXT` dictionary in the
+downstream `@provisioning_exts` Bazel repo.
 
 ## Personalization Firmware
 
-The personalization firmware `ft_personalize.c` defines an `extern` extension
-function that is invoked as the final step in the personalization flow.
-
-`status_t personalize_extension(ujson_t *uj)`
-
-The example function provided in this example external Bazel repo does nothing,
-except print a message to the console. However, this provides a mechanism for
-SKU owners / customers to develop closed-source personalization FW extensions,
-that can easily make use of open-source code.
-
-This feature is implemented with the help of some custom Bazel repository rules.
-Specifically, in this directory we define a secondary Bazel
-repository (`@perso_exts`) that is designed to be used in
-conjunction with the main OpenTitan Bazel repository. Within this repository, we
-define a single `perso_ext` library that is linked with the reference
-`ft_personalize` binary. The `perso_ext` library itself just contains an
-implementation of the `personalize_extension(...)` function described above.
-However, the `perso_ext` library is linked with other libraries
-based on a Bazel `config_setting` that allows you to toggle which personalize
-extension library should be used (if you are building binaries for several SKU
-owners).
-
-Note, the Bazel configuration settings and example personalization extension
-library (`perso_ext`) provided in this
-repository are merely examples, as the `personalize_extension(...)` function
-implemented does nothing, except print a message.
+The personalization firmware `ft_personalize.c` defines two `extern` C functions
+that are invoked before and after certificates are endorsed off-device,
+respectively:
+`status_t personalize_extension_pre_cert_endorse(...)`
+`status_t personalize_extension_post_cert_endorse(...)`
+
+Additionally, the FT provisioning test harness provides an hook function to call
+during the certificate endorsement operation:
+`pub fn ft_ext(_response: &PersonalizeResponse) -> Result<Option<String>>`
+
+The default functions provided in this example external Bazel repo do nothing.
+However, this provides a mechanism for SKU owners / customers to develop
+closed-source personalization FW extensions, that can make use of open-source
+code.
+
+To configure a SKU to use downstream hooks, on must update their SKUs
+configuration definition in the `EXT_EARLGREY_SKUS` dictionary in the
+`@provisioning_exts` repo.
diff --git a/sw/device/silicon_creator/manuf/extensions/cfg.bzl b/sw/device/silicon_creator/manuf/extensions/cfg.bzl
new file mode 100644
index 0000000000000..391907efb4850
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/extensions/cfg.bzl
@@ -0,0 +1,34 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# This enables downstream integrators to define external Earlgrey OTP
+# configurations to be used during provisioning for downstream SKUs. See the
+# upstream Earlgrey OTP configurations list defined in the `EARLGREY_OTP_CFGS`
+# dict in `sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl` for
+# more details.
+EXT_EARLGREY_OTP_CFGS = {
+    # <OTP image name>: <//bazel/target/path:otp_image_consts>
+}
+
+# This enables downstream integrators to define external Earlgrey SKU
+# configurations to be used during provisioning. See the upstream Earlgrey SKU
+# configurations defined in the `EARLGREY_SKUS` dictionary in
+# `sw/device/silicon_creator/manuf/base/provisioning_inputs.bzl` for more
+# details.
+EXT_EARLGREY_SKUS = {
+    # <SKU name>: {
+    #    "otp": <OTP image name above in EXT_EARLGREY_OTP_CFGS>,
+    #    "dice_libs": [<which DICE certgen libs to use: X.509 or CWT>]
+    #    "host_ext_libs": [<which host hooks extension libraries to use>]
+    #    "device_ext_libs": [<which device hooks extension libraries to use>]
+    # }
+}
+
+# This enables downstream integrators to define external Earlgrey execution
+# environments. See the upstream Silicon Owner execution environments defined
+# in the `EARLGREY_SILICON_OWNER_ROM_EXT_ENVS` dictionary in
+# `rules/opentitan/defs.bzl` for more details.
+EXT_EXEC_ENV_SILICON_ROM_EXT = {
+    # "@provisioning_ex/bazel/target/exec_env:exec_env_name": None,
+}
diff --git a/sw/device/silicon_creator/manuf/extensions/default_ft_ext_lib.rs b/sw/device/silicon_creator/manuf/extensions/default_ft_ext_lib.rs
new file mode 100644
index 0000000000000..54aa4d4a2ad1c
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/extensions/default_ft_ext_lib.rs
@@ -0,0 +1,18 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use arrayvec::ArrayVec;
+use util_lib::response::PersonalizeResponse;
+
+pub fn ft_inject_certs_ext(
+    endorsed_cert_concat: ArrayVec<u8, 5120>,
+    _num_host_endorsed_certs: &mut usize,
+) -> Result<ArrayVec<u8, 5120>> {
+    Ok(endorsed_cert_concat)
+}
+
+pub fn ft_post_boot_ext(_response: &PersonalizeResponse) -> Result<Option<String>> {
+    Ok(None)
+}
diff --git a/sw/device/silicon_creator/manuf/extensions/default_personalize_ext.c b/sw/device/silicon_creator/manuf/extensions/default_personalize_ext.c
index daa8eb3f270c8..d08a603cace39 100644
--- a/sw/device/silicon_creator/manuf/extensions/default_personalize_ext.c
+++ b/sw/device/silicon_creator/manuf/extensions/default_personalize_ext.c
@@ -2,14 +2,19 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/testing/json/provisioning_data.h"
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/manuf/base/personalize_ext.h"
 
-status_t personalize_extension(ujson_t *uj,
-                               manuf_certgen_inputs_t *certgen_inputs,
-                               manuf_certs_t *tbs_certs,
-                               cert_flash_info_layout_t *cert_flash_layout) {
+status_t personalize_extension_pre_cert_endorse(
+    personalize_extension_pre_endorse_t *pre_params) {
+  return OK_STATUS();
+}
+
+status_t personalize_extension_post_cert_endorse(
+    personalize_extension_post_endorse_t *post_params) {
   return OK_STATUS();
 }
diff --git a/sw/device/silicon_creator/manuf/extensions/example_personalize_ext.c b/sw/device/silicon_creator/manuf/extensions/example_personalize_ext.c
deleted file mode 100644
index f9277fed06890..0000000000000
--- a/sw/device/silicon_creator/manuf/extensions/example_personalize_ext.c
+++ /dev/null
@@ -1,17 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/json/provisioning_data.h"
-#include "sw/device/lib/testing/test_framework/status.h"
-#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
-#include "sw/device/silicon_creator/lib/cert/cert.h"
-
-status_t personalize_extension(ujson_t *uj,
-                               manuf_certgen_inputs_t *certgen_inputs,
-                               manuf_certs_t *tbs_certs,
-                               cert_flash_info_layout_t *cert_flash_layout) {
-  LOG_INFO("Running example perso extension ...");
-  return OK_STATUS();
-}
diff --git a/sw/device/silicon_creator/manuf/keys/BUILD b/sw/device/silicon_creator/manuf/keys/BUILD
new file mode 100644
index 0000000000000..8a15129980b68
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/BUILD
@@ -0,0 +1,20 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
+    "EARLGREY_SKUS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+filegroup(
+    name = "ca_data_all",
+    srcs = depset([
+        config["ca_data"]
+        for _, config in EARLGREY_SKUS.items()
+    ]).to_list(),
+)
diff --git a/sw/device/silicon_creator/manuf/keys/README.md b/sw/device/silicon_creator/manuf/keys/README.md
new file mode 100644
index 0000000000000..103f7ea3264c8
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/README.md
@@ -0,0 +1,120 @@
+# CA Endorsement Keys
+
+Certificate Authority endorsement keys are are used to endorse the following
+certificate chains during personalization:
+1. DICE attestation certificate chains, and
+2. SKU specific certificate chains.
+
+## Fake Keys
+
+The fake keys stored here are used for testing purposes only.
+The fake keys have been generated using OpenSSL, and the private portion of
+the key has been checked into the repository.
+
+## Real Keys
+
+The real (private) keys used for the SIVAL SKU are stored on offline HSMs.
+The matching public keys and certificates are checked into the repository.
+
+To use the private keys to endorse the certificates in benchtop provisioning
+flow, one must set the following envars:
+  - `PKCS11_MODULE_PATH`: to point to the PKCS#11 shared library for the
+    hardware token or HSM they are using, and
+  - `PKCS11_TOKEN_PIN`: to the PIN used for hardware token / HSM authentication.
+
+For example, if the SIVAL private keys are stored on a Nitrokey, and you wanted
+to test the SIVAL FT provisioning flow, you would issue the following Bazel
+command:
+```sh
+bazel test --test_output=streamed \
+  //sw/device/silicon_creator/manuf/base:ft_provision_sival_fpga_hyper310_rom_with_fake_keys \
+  --action_env=PKCS11_MODULE_PATH=/opt/nitrokey/lib/libsc-hsm-pkcs11.so \
+  --action_env=PKCS11_TOKEN_PIN=123456
+```
+
+Note: you may also use `opensc-pkcs11.so` for the `PKCS11_MODULE_PATH`. The
+debian package `opensc-pkcs11` installs it as
+`/usr/lib/x86_64-linux-gnu/opensc-pkcs11.so`.
+
+# Generating CA Keys and Root Certificates
+
+## Generating fake keys and certificates with OpenSSL
+### Generating an ECC P256 Keypair with OpenSSL
+To generate additional fake keys for testing using OpenSSL, follow these steps:
+```sh
+# Generate the curve:
+$ openssl ecparam -out curve.pem -name prime256v1
+
+# Generate the ECC private key in SEC1 PEM format:
+$ openssl ecparam -in curve.pem -genkey -out sk.pem
+
+# Convert the ECC private key from SEC1 format to PKCS8 (we do this because
+# the Rust elliptic-curve crate is able to load PKCS8 keys with less additional
+# crates):
+$ openssl pkcs8 -in sk.pem -topk8 -nocrypt -out sk.pkcs8.der -outform DER
+
+# Show the ECC public key (not required, but helps confirm the above worked):
+$ openssl ec -in sk.pem -text -noout
+```
+
+### Generating a Root CA Certificate
+
+To generate a Root CA certificate using the earlier generated private EC key,
+you can use the CSR (Certificate Signing Request) configuration file checked in
+to this repo (`dice_ca.conf` or `ext_ca.conf`) as in input to the following
+OpenSSL commands:
+```sh
+# Generate the CSR:
+$ openssl req -new -key sk.pem -out dice_ca.csr -config ../dice_ca.conf
+
+# Generate the X.509 certificate in PEM format:
+$ openssl x509 -req -in dice_ca.csr -signkey sk.pem -out dice_ca.pem \
+    -days 3650 -extfile ../dice_ca.conf -extensions v3_ca
+
+# Examine the generated certificate:
+$ openssl x509 -in dice_ca.pem -text
+```
+
+## Generating a root CA certificate from a real hardware token held key
+
+To generate a Root CA certificate from a public key held on a hardware token,
+e.g., Nitrokey, you may use the CSR (Certificate Signing Request) configuration
+file checked in to this repo (`dice_ca.conf`) as in input to the following
+commands:
+```sh
+# Set the PKCS11_MODULE_PATH envar to point to the shared library for the
+# hardware token you are using, e.g.:
+export PKCS11_MODULE_PATH=/opt/nitrokey/lib/libsc-hsm-pkcs11.so
+export HW_TOKEN_PIN=123456
+
+# Generate the CSR:
+openssl req -new -engine pkcs11 -keyform engine -config ../dice_ca.conf -out dice_ca.csr \
+  -key "pkcs11:pin-value=${HW_TOKEN_PIN};object=sv00-earlgrey-a1-ca-dice-0"
+
+# Generate the X.509 certificate in PEM format:
+openssl x509 -req -engine pkcs11 -keyform engine -in dice_ca.csr -out dice_ca.pem \
+  -days 3650 -extfile ../dice_ca.conf -extensions v3_ca \
+  -signkey "pkcs11:pin-value=${HW_TOKEN_PIN};object=sv00-earlgrey-a1-ca-dice-0"
+
+# Examine the generated certificate:
+openssl x509 -in dice_ca.pem -text
+```
+
+# Generating the RMA unlock token encryption keypair with OpenSSL
+
+The RMA unlock token encryption keypair is an RSA-3072 key used to encrypt the
+RMA unlock token generated during provisioning.
+
+The fake keys (used for testing) in this subdirectory were generated with `openssl`.
+
+```
+### Generate the RSA keypair:
+$ openssl genrsa -out rma_unlock_enc_rsa3072.pem 3072
+
+### Extract the public key to a separate file:
+$ openssl rsa -in rma_unlock_enc_rsa3072.pem -pubout -out rma_unlock_enc_rsa3072.pub.pem
+
+### Convert the PEM files to DER files:
+$ openssl rsa -in rma_unlock_enc_rsa3072.pem -outform der -out rma_unlock_enc_rsa3072.der
+$ openssl rsa -pubin -in rma_unlock_enc_rsa3072.pub.pem -outform der -out rma_unlock_enc_rsa3072.pub.der
+```
diff --git a/sw/device/silicon_creator/manuf/keys/dice_ca.conf b/sw/device/silicon_creator/manuf/keys/dice_ca.conf
new file mode 100644
index 0000000000000..41f4f1ee280a7
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/dice_ca.conf
@@ -0,0 +1,19 @@
+[req]
+default_bits = 2048
+prompt = no
+default_md = sha256
+distinguished_name = dn
+x509_extensions = v3_ca
+
+[dn]
+C=US
+ST=CA
+O=Google
+OU=Engineering
+CN=Google Engineering ICA
+
+[v3_ca]
+subjectKeyIdentifier = hash
+authorityKeyIdentifier = keyid:always,issuer:always
+basicConstraints = critical,CA:true
+keyUsage = digitalSignature, keyCertSign, cRLSign
diff --git a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.conf b/sw/device/silicon_creator/manuf/keys/ext_ca.conf
similarity index 100%
rename from sw/device/silicon_creator/manuf/keys/fake/fake_ca.conf
rename to sw/device/silicon_creator/manuf/keys/ext_ca.conf
diff --git a/sw/device/silicon_creator/manuf/keys/fake/BUILD b/sw/device/silicon_creator/manuf/keys/fake/BUILD
index 1ded875d786ac..6e68a5e450bd0 100644
--- a/sw/device/silicon_creator/manuf/keys/fake/BUILD
+++ b/sw/device/silicon_creator/manuf/keys/fake/BUILD
@@ -4,9 +4,14 @@
 
 package(default_visibility = ["//visibility:public"])
 
-exports_files([
-    "cert_endorsement_key.sk.der",
-    "ckms_ca.pem",
-    "fake_ca.pem",
-    "rma_unlock_token_export_key.sk_hsm.der",
-])
+exports_files(glob(["**"]))
+
+filegroup(
+    name = "ca_data",
+    srcs = [
+        ":dice_ca.pem",
+        ":ext_ca.pem",
+        ":rma_unlock_enc_rsa3072.pub.der",
+        ":sk.pkcs8.der",
+    ],
+)
diff --git a/sw/device/silicon_creator/manuf/keys/fake/README.md b/sw/device/silicon_creator/manuf/keys/fake/README.md
deleted file mode 100644
index eda729a592342..0000000000000
--- a/sw/device/silicon_creator/manuf/keys/fake/README.md
+++ /dev/null
@@ -1,128 +0,0 @@
-# Host Manufacturing ECC Keys
-
-Host manufacturing ECC keys are used to
-1. generate a shared AES key for exporting the RMA unlock token during device personalization, and
-1. endorse the UDS attestation TBS certificate.
-The fake keys stored here are used for testing purposes only (see the `personalize_functest` in `sw/device/silicon_creator/manuf/lib/`).
-These fake keys have been generated using OpenSSL, and the private portion of the key has been checked into the repository.
-Tests can reference this key file, and use it to derive the associated public key on the fly.
-
-# Generating Additional Keys with OpenSSL
-
-To generate additional fake keys for testing using OpenSSL, follow these steps:
-```sh
-# Generate the curve:
-$ openssl ecparam -out curve.pem -name prime256v1
-
-# Generate the ECC private key:
-$ openssl ecparam -in curve.pem -genkey -out sk.pem
-
-# Convert the ECC private key from SEC1 format to PKCS8 (we do this because
-# the Rust elliptic-curve crate is able to load PKCS8 keys with less additional
-# crates):
-$ openssl pkcs8 -in sk.pem -topk8 -nocrypt -out sk.pkcs8.der -outform DER
-
-# Show the ECC public key (not required, but helps confirm the above worked):
-$ openssl ec -in sk.pem -text -noout
-```
-
-To generate a Root CA certificate using the earlier generated private EC key:
-```sh
-# Create a CSR (Certificate Signing Request) configuration file
-# with the following contents:
-$ cat fake_ca.conf
-[req]
-default_bits = 2048
-prompt = no
-default_md = sha256
-distinguished_name = dn
-x509_extensions = v3_ca
-
-[dn]
-C=US
-ST=CA
-L=San Jose
-O=Google
-OU=Engineering
-CN=OT Fake CA certificate
-
-[v3_ca]
-subjectKeyIdentifier = hash
-authorityKeyIdentifier = keyid:always,issuer:always
-basicConstraints = critical,CA:true
-keyUsage = digitalSignature, keyCertSign, cRLSign
-
-# Generate the CSR:
-$ openssl req -new -key sk.pem -out fake_ca.csr -config fake_ca.conf
-# Create the certificate:
-$ openssl x509 -req -in fake_ca.csr -signkey sk.pem \
-       -out fake_ca.pem -days 3650 -extfile fake_ca.conf \
-       -extensions v3_ca
-Signature ok
-subject=C = US, ST = CA, L = San Jose, O = Google, OU = Engineering, CN = OT Fake CA certificate
-Getting Private key
-$
-```
-
-To examine the generated certificate run
-```sh
-$ openssl x509 -in fake_ca.pem -text
-Certificate:
-    Data:
-        Version: 3 (0x2)
-        Serial Number:
-            1a:8f:86:2b:3c:75:83:2b:b2:ff:2b:7b:13:81:7a:70:20:ac:0a:62
-        Signature Algorithm: ecdsa-with-SHA256
-        Issuer: C = US, ST = CA, L = San Jose, O = Google, OU = Engineering, CN = OT Fake CA certificate
-        Validity
-            Not Before: Apr  2 01:06:42 2024 GMT
-            Not After : Mar 31 01:06:42 2034 GMT
-        Subject: C = US, ST = CA, L = San Jose, O = Google, OU = Engineering, CN = OT Fake CA certificate
-        Subject Public Key Info:
-            Public Key Algorithm: id-ecPublicKey
-                Public-Key: (256 bit)
-                pub:
-                    04:1d:05:5a:45:e5:92:3c:ea:e5:04:7a:74:f6:c8:
-                    8c:0c:22:74:16:15:18:b5:df:9d:7c:5e:f8:0e:42:
-                    a5:77:e0:0c:3c:1a:b2:43:78:89:96:b4:aa:7f:f6:
-                    62:86:7e:dd:a1:bb:bb:62:01:f2:d6:99:56:83:be:
-                    51:11:61:70:91
-                ASN1 OID: prime256v1
-                NIST CURVE: P-256
-        X509v3 extensions:
-            X509v3 Subject Key Identifier:
-                46:26:E1:CC:8E:40:91:32:31:DC:1F:6E:92:0E:AF:25:CB:CD:E5:72
-            X509v3 Authority Key Identifier:
-                keyid:46:26:E1:CC:8E:40:91:32:31:DC:1F:6E:92:0E:AF:25:CB:CD:E5:72
-                DirName:/C=US/ST=CA/L=San Jose/O=Google/OU=Engineering/CN=OT Fake CA certificate
-                serial:1A:8F:86:2B:3C:75:83:2B:B2:FF:2B:7B:13:81:7A:70:20:AC:0A:62
-
-            X509v3 Basic Constraints: critical
-                CA:TRUE
-            X509v3 Key Usage:
-                Digital Signature, Certificate Sign, CRL Sign
-    Signature Algorithm: ecdsa-with-SHA256
-         30:45:02:20:53:b5:ed:9e:20:34:e5:8b:b8:54:75:78:14:64:
-         eb:71:4b:a2:67:9c:a7:a7:96:3e:88:13:c8:e7:22:7c:94:0a:
-         02:21:00:c1:9f:71:92:27:b2:47:bb:98:58:3f:08:a9:ef:d8:
-         db:9e:12:5c:30:a6:2e:72:b1:c8:63:b9:8c:4c:ee:ab:a5
------BEGIN CERTIFICATE-----
-MIIC4jCCAoigAwIBAgIUGo+GKzx1gyuy/yt7E4F6cCCsCmIwCgYIKoZIzj0EAwIw
-dTELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMREwDwYDVQQHDAhTYW4gSm9zZTEP
-MA0GA1UECgwGR29vZ2xlMRQwEgYDVQQLDAtFbmdpbmVlcmluZzEfMB0GA1UEAwwW
-T1QgRmFrZSBDQSBjZXJ0aWZpY2F0ZTAeFw0yNDA0MDIwMTA2NDJaFw0zNDAzMzEw
-MTA2NDJaMHUxCzAJBgNVBAYTAlVTMQswCQYDVQQIDAJDQTERMA8GA1UEBwwIU2Fu
-IEpvc2UxDzANBgNVBAoMBkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAd
-BgNVBAMMFk9UIEZha2UgQ0EgY2VydGlmaWNhdGUwWTATBgcqhkjOPQIBBggqhkjO
-PQMBBwNCAAQdBVpF5ZI86uUEenT2yIwMInQWFRi13518XvgOQqV34Aw8GrJDeImW
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-MjHcH26SDq8ly83lcjCBsgYDVR0jBIGqMIGngBRGJuHMjkCRMjHcH26SDq8ly83l
-cqF5pHcwdTELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMREwDwYDVQQHDAhTYW4g
-Sm9zZTEPMA0GA1UECgwGR29vZ2xlMRQwEgYDVQQLDAtFbmdpbmVlcmluZzEfMB0G
-A1UEAwwWT1QgRmFrZSBDQSBjZXJ0aWZpY2F0ZYIUGo+GKzx1gyuy/yt7E4F6cCCs
-CmIwDwYDVR0TAQH/BAUwAwEB/zALBgNVHQ8EBAMCAYYwCgYIKoZIzj0EAwIDSAAw
-RQIgU7XtniA05Yu4VHV4FGTrcUuiZ5ynp5Y+iBPI5yJ8lAoCIQDBn3GSJ7JHu5hY
-Pwip79jbnhJcMKYucrHIY7mMTO6rpQ==
------END CERTIFICATE-----
-$
-```
diff --git a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.csr b/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.csr
deleted file mode 100644
index 2deef537b1901..0000000000000
--- a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.csr
+++ /dev/null
@@ -1,9 +0,0 @@
------BEGIN CERTIFICATE REQUEST-----
-MIIBHTCBxAIBADBiMQswCQYDVQQGEwJVUzELMAkGA1UECAwCQ0ExDzANBgNVBAoM
-Bkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAdBgNVBAMMFkdvb2dsZSBF
-bmdpbmVlcmluZyBJQ0EwWTATBgcqhkjOPQIBBggqhkjOPQMBBwNCAARnno9crFj1
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-sf4GoeZWh4OlAUf3UNTLAiAAg2Lj1EpmxH864iJ4M0OE+VWymsukSGSTszEbO7bv
-ZQ==
------END CERTIFICATE REQUEST-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.der b/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.der
deleted file mode 100644
index 48cee48ff3cd9..0000000000000
Binary files a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.der and /dev/null differ
diff --git a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.pem b/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.pem
deleted file mode 100644
index 3de18daf4dfa5..0000000000000
--- a/sw/device/silicon_creator/manuf/keys/fake/ckms_ca.pem
+++ /dev/null
@@ -1,17 +0,0 @@
------BEGIN CERTIFICATE-----
-MIICqzCCAlKgAwIBAgIUYrOigpNz15iF0tsrOO9S5cAZ/fIwCgYIKoZIzj0EAwIw
-YjELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDAS
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-Z2xlIEVuZ2luZWVyaW5nIElDQYIUYrOigpNz15iF0tsrOO9S5cAZ/fIwEgYDVR0T
-AQH/BAgwBgEB/wIBADALBgNVHQ8EBAMCAYYwCgYIKoZIzj0EAwIDRwAwRAIgFzTR
-E1QxGwYIP5YvmCGnILeUfO/TZnnNOO1Cc4OcHaACIFROwm8T5pSTNHIIkBBpzF0u
-I+htNQyvI1y599sHtY9/
------END CERTIFICATE-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/dice_ca.csr b/sw/device/silicon_creator/manuf/keys/fake/dice_ca.csr
new file mode 100644
index 0000000000000..280c8e532717b
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/fake/dice_ca.csr
@@ -0,0 +1,9 @@
+-----BEGIN CERTIFICATE REQUEST-----
+MIIBHjCBxAIBADBiMQswCQYDVQQGEwJVUzELMAkGA1UECAwCQ0ExDzANBgNVBAoM
+Bkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAdBgNVBAMMFkdvb2dsZSBF
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+fmqincHoi4gok4ETUimBAiEAiM66dAP5wWVUx44EbwqCxfaHqzstUhvReMY+NFUk
+9sw=
+-----END CERTIFICATE REQUEST-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem b/sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem
new file mode 100644
index 0000000000000..94b3aa792b195
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem
@@ -0,0 +1,17 @@
+-----BEGIN CERTIFICATE-----
+MIICqjCCAk+gAwIBAgIUJv7onAWj7JNoJSyEsCUBgjk2+zYwCgYIKoZIzj0EAwIw
+YjELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDAS
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+hz/d1FGzU4U3yK/mSxo=
+-----END CERTIFICATE-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/ext_ca.csr b/sw/device/silicon_creator/manuf/keys/fake/ext_ca.csr
new file mode 100644
index 0000000000000..ff3fbb4b1a54f
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/fake/ext_ca.csr
@@ -0,0 +1,8 @@
+-----BEGIN CERTIFICATE REQUEST-----
+MIIBHDCBxAIBADBiMQswCQYDVQQGEwJVUzELMAkGA1UECAwCQ0ExDzANBgNVBAoM
+Bkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAdBgNVBAMMFkdvb2dsZSBF
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+H5RTVTlnWMeNjN+/7hgCIDXx+UNTnVHTn65zpBIA2gcrNSQuVWNdP4FenkaQ6rzE
+-----END CERTIFICATE REQUEST-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem b/sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem
new file mode 100644
index 0000000000000..2d296cc3ec46e
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem
@@ -0,0 +1,17 @@
+-----BEGIN CERTIFICATE-----
+MIICqzCCAlKgAwIBAgIUHBQ65PLk6uqL4sgrTKIzhKkNBnIwCgYIKoZIzj0EAwIw
+YjELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDAS
+BgNVBAsMC0VuZ2luZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcg
+SUNBMB4XDTI0MTEyMDA1NTAwMVoXDTM0MTExODA1NTAwMVowYjELMAkGA1UEBhMC
+VVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDASBgNVBAsMC0VuZ2lu
+ZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcgSUNBMFkwEwYHKoZI
+zj0CAQYIKoZIzj0DAQcDQgAEYQkII1J2m4lLuYr5nm4Y4W/uE0Ll/wNkli38w3kB
+g7go7Hs6j0xD9Th6rtxpVt6L2YcqeNCbuSMEdb8v7zSZFaOB5TCB4jAdBgNVHQ4E
+FgQU/lhK51N5DP2GAaMS+zLTwbgi0RIwgZ8GA1UdIwSBlzCBlIAU/lhK51N5DP2G
+AaMS+zLTwbgi0RKhZqRkMGIxCzAJBgNVBAYTAlVTMQswCQYDVQQIDAJDQTEPMA0G
+A1UECgwGR29vZ2xlMRQwEgYDVQQLDAtFbmdpbmVlcmluZzEfMB0GA1UEAwwWR29v
+Z2xlIEVuZ2luZWVyaW5nIElDQYIUHBQ65PLk6uqL4sgrTKIzhKkNBnIwEgYDVR0T
+AQH/BAgwBgEB/wIBADALBgNVHQ8EBAMCAYYwCgYIKoZIzj0EAwIDRwAwRAIgYdNw
+iqkObB2VTkY13TNpDJVfIcKY3SADGyxzPd7fXDkCIEgNnHcY6lZDtxMIMrYNBtzv
+0tlUlOrK65oc7hLQR2C4
+-----END CERTIFICATE-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.csr b/sw/device/silicon_creator/manuf/keys/fake/fake_ca.csr
deleted file mode 100644
index 97276d69e3d63..0000000000000
--- a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.csr
+++ /dev/null
@@ -1,9 +0,0 @@
------BEGIN CERTIFICATE REQUEST-----
-MIIBHTCBxAIBADBiMQswCQYDVQQGEwJVUzELMAkGA1UECAwCQ0ExDzANBgNVBAoM
-Bkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAdBgNVBAMMFkdvb2dsZSBF
-bmdpbmVlcmluZyBJQ0EwWTATBgcqhkjOPQIBBggqhkjOPQMBBwNCAARhCQgjUnab
-iUu5ivmebhjhb+4TQuX/A2SWLfzDeQGDuCjsezqPTEP1OHqu3GlW3ovZhyp40Ju5
-IwR1vy/vNJkVoAAwCgYIKoZIzj0EAwIDSAAwRQIhAKI+sbyTTTJ+QkEONzrsHCw1
-UJ0YBDRjC29TqzWxicGJAiA0GEOXSPxoUnGqk7uZVY/D4GWCbtS1wQSu4aJ7WaMM
-ig==
------END CERTIFICATE REQUEST-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.der b/sw/device/silicon_creator/manuf/keys/fake/fake_ca.der
deleted file mode 100644
index ae61f6c543bed..0000000000000
Binary files a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.der and /dev/null differ
diff --git a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.pem b/sw/device/silicon_creator/manuf/keys/fake/fake_ca.pem
deleted file mode 100644
index 144dfdae99aea..0000000000000
--- a/sw/device/silicon_creator/manuf/keys/fake/fake_ca.pem
+++ /dev/null
@@ -1,17 +0,0 @@
------BEGIN CERTIFICATE-----
-MIICrTCCAlKgAwIBAgIUR7zbZxY2lxH6tUOJcmi1PJX9G5cwCgYIKoZIzj0EAwIw
-YjELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDAS
-BgNVBAsMC0VuZ2luZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcg
-SUNBMB4XDTI0MDUxNDE3NDUwNVoXDTM0MDUxMjE3NDUwNVowYjELMAkGA1UEBhMC
-VVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDASBgNVBAsMC0VuZ2lu
-ZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcgSUNBMFkwEwYHKoZI
-zj0CAQYIKoZIzj0DAQcDQgAEYQkII1J2m4lLuYr5nm4Y4W/uE0Ll/wNkli38w3kB
-g7go7Hs6j0xD9Th6rtxpVt6L2YcqeNCbuSMEdb8v7zSZFaOB5TCB4jAdBgNVHQ4E
-FgQU/lhK51N5DP2GAaMS+zLTwbgi0RIwgZ8GA1UdIwSBlzCBlIAU/lhK51N5DP2G
-AaMS+zLTwbgi0RKhZqRkMGIxCzAJBgNVBAYTAlVTMQswCQYDVQQIDAJDQTEPMA0G
-A1UECgwGR29vZ2xlMRQwEgYDVQQLDAtFbmdpbmVlcmluZzEfMB0GA1UEAwwWR29v
-Z2xlIEVuZ2luZWVyaW5nIElDQYIUR7zbZxY2lxH6tUOJcmi1PJX9G5cwEgYDVR0T
-AQH/BAgwBgEB/wIBADALBgNVHQ8EBAMCAYYwCgYIKoZIzj0EAwIDSQAwRgIhANhC
-yBYH+QFtpyUTDJpNOYHqpYEDq2G2YbX8TqrrEKM7AiEA+ScDPRVz54Ra2fKi7Ggz
-oquz3y9HDoQycPLiNihm5TM=
------END CERTIFICATE-----
diff --git a/sw/device/silicon_creator/manuf/keys/fake/gen_fake_ca.sh b/sw/device/silicon_creator/manuf/keys/fake/gen_fake_ca.sh
index 59461ba2d65fa..d66f78ddba509 100755
--- a/sw/device/silicon_creator/manuf/keys/fake/gen_fake_ca.sh
+++ b/sw/device/silicon_creator/manuf/keys/fake/gen_fake_ca.sh
@@ -3,54 +3,29 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 #
-# This script will generate two self signed CA certificates, both using the same
-# configuration defined in fake_ca.conf, but signed by different private keys.
-# One using the test key file present in the current directory and the other one
-# a key stored in Google Cloud KMS.
-#
-# Signing with Cloud KMS requires the following:
-# - a Google KMS integration  library
-#   (https://github.com/GoogleCloudPlatform/kms-integrations) module
-# - a configuration file describing the Cloud KMS project containing the key.
-#
-# PKCS11_MODULE_PATH and KMS_PKCS11_CONFIG environment variables are set to
-# point at these objects. If both variables are present the script attempts to
-# generate a Cloud KMS signed certificate.
-#
-# The generated certificates are named fake_ca and ckms_ca and are saved in both
-# DER and PEM forms, certificate file names are printed by this script upon
-# successful certificate generation.
+# This script will generate two self signed CA certificates, each using a
+# different configuration, but signed by the same (fake) private keys. These
+# root CA certificates may be used for testing perso flows on the FPGA.
 
 set -e
 
-pem_to_der() {
-  local pem_name="${1}"
-  local der_name="${pem_name/.pem/.der}"
+cd "$(dirname "$0")"
 
-  openssl x509 -in "${pem_name}" -outform der -out "${der_name}"
-  cert=$(readlink -f "${pem_name}" | sed 's/pem/{pem,der}/')
-  echo "*****Self signed CA saved in ${cert}"
-  echo
-}
+DICE_CA_KEY="sk.pkcs8.der"
+EXT_CA_KEY="$DICE_CA_KEY"
 
-cd "$(dirname "$0")"
-echo "generating fake key CA cert"
-openssl req -new -key  cert_endorsement_key.sk.der -keyform der \
-        -out fake_ca.csr -config fake_ca.conf
-openssl x509 -req -in fake_ca.csr -signkey cert_endorsement_key.sk.der \
-        -keyform der -out fake_ca.pem -days 3650 -extfile fake_ca.conf \
+echo "Generating fake key DICE CA cert ..."
+openssl req -new -key "$DICE_CA_KEY" -keyform der \
+        -out dice_ca.csr -config ../dice_ca.conf
+openssl x509 -req -in dice_ca.csr -signkey "$DICE_CA_KEY" \
+        -keyform der -out dice_ca.pem -days 3650 -extfile ../dice_ca.conf \
         -extensions v3_ca
-pem_to_der fake_ca.pem
+echo "Done."
 
-if [[ -z ${KMS_PKCS11_CONFIG} || -z ${PKCS11_MODULE_PATH} ]]; then
-  echo "Cloud KMS env not set, skipping Cloud KMS cert generation"
-  exit 0
-fi
-echo "generating Cloud KMS key CA cert"
-openssl req -new  -key pkcs11:object=gcs-kms-earlgrey-ze-ca-p256-sha256-key \
-          -engine pkcs11 -keyform engine  -out ckms_ca.csr -config fake_ca.conf
-openssl x509 -req -in ckms_ca.csr  \
-        -engine pkcs11 -keyform engine \
-        -key pkcs11:object=gcs-kms-earlgrey-ze-ca-p256-sha256-key \
-        -out ckms_ca.pem -days 140 -extfile fake_ca.conf -extensions v3_ca
-pem_to_der ckms_ca.pem
+echo "Generating fake key Personalization Extension CA cert ..."
+openssl req -new -key "$EXT_CA_KEY" -keyform der \
+        -out ext_ca.csr -config ../ext_ca.conf
+openssl x509 -req -in ext_ca.csr -signkey "$EXT_CA_KEY"  \
+        -keyform der -out ext_ca.pem -days 3650 -extfile ../ext_ca.conf \
+        -extensions v3_ca
+echo "Done."
diff --git a/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.der b/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.der
new file mode 100644
index 0000000000000..66b49d0aee135
Binary files /dev/null and b/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.der differ
diff --git a/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der b/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der
new file mode 100644
index 0000000000000..f91d52bb1d2bd
Binary files /dev/null and b/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der differ
diff --git a/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_token_export_key.sk_hsm.der b/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_token_export_key.sk_hsm.der
deleted file mode 100644
index 329e7514a9fe0..0000000000000
Binary files a/sw/device/silicon_creator/manuf/keys/fake/rma_unlock_token_export_key.sk_hsm.der and /dev/null differ
diff --git a/sw/device/silicon_creator/manuf/keys/fake/cert_endorsement_key.sk.der b/sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der
similarity index 100%
rename from sw/device/silicon_creator/manuf/keys/fake/cert_endorsement_key.sk.der
rename to sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der
diff --git a/sw/device/silicon_creator/manuf/keys/sival/BUILD b/sw/device/silicon_creator/manuf/keys/sival/BUILD
new file mode 100644
index 0000000000000..e993ac8f37506
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/sival/BUILD
@@ -0,0 +1,17 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+filegroup(
+    name = "ca_data",
+    srcs = [
+        ":dice_ca.pem",
+        ":rma_unlock_enc_rsa3072.pub.der",
+        # The fake RMA unlock token wrapping key is used for FPGA testing.
+        "//sw/device/silicon_creator/manuf/keys/fake:rma_unlock_enc_rsa3072.pub.der",
+    ],
+)
diff --git a/sw/device/silicon_creator/manuf/keys/sival/dice_ca.csr b/sw/device/silicon_creator/manuf/keys/sival/dice_ca.csr
new file mode 100644
index 0000000000000..caef2e8004d47
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/sival/dice_ca.csr
@@ -0,0 +1,9 @@
+-----BEGIN CERTIFICATE REQUEST-----
+MIIBHjCBxAIBADBiMQswCQYDVQQGEwJVUzELMAkGA1UECAwCQ0ExDzANBgNVBAoM
+Bkdvb2dsZTEUMBIGA1UECwwLRW5naW5lZXJpbmcxHzAdBgNVBAMMFkdvb2dsZSBF
+bmdpbmVlcmluZyBJQ0EwWTATBgcqhkjOPQIBBggqhkjOPQMBBwNCAATu4HkgAzRX
+PJAhMw9E/qXZzoQ+Kx3awtKAPk29herxqr7d/bEYWVjKBpMg9QzTjQHQBswmU/H3
+GTr5FCjfas2foAAwCgYIKoZIzj0EAwIDSQAwRgIhAP14uGJ6C2g2lAl06oRrODme
+yjQviuSdqIaszMxFknHtAiEAszHbVPKgTtSnSggw0jFkIx8pZnUJD4cOFJ5EUGOV
+Sk4=
+-----END CERTIFICATE REQUEST-----
diff --git a/sw/device/silicon_creator/manuf/keys/sival/dice_ca.pem b/sw/device/silicon_creator/manuf/keys/sival/dice_ca.pem
new file mode 100644
index 0000000000000..e5957515e02bc
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/keys/sival/dice_ca.pem
@@ -0,0 +1,17 @@
+-----BEGIN CERTIFICATE-----
+MIICqDCCAk+gAwIBAgIUFDAsPzL14w6/jKAtysPUTcGRgM4wCgYIKoZIzj0EAwIw
+YjELMAkGA1UEBhMCVVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDAS
+BgNVBAsMC0VuZ2luZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcg
+SUNBMB4XDTI0MTIwNDAzNTgwOFoXDTM0MTIwMjAzNTgwOFowYjELMAkGA1UEBhMC
+VVMxCzAJBgNVBAgMAkNBMQ8wDQYDVQQKDAZHb29nbGUxFDASBgNVBAsMC0VuZ2lu
+ZWVyaW5nMR8wHQYDVQQDDBZHb29nbGUgRW5naW5lZXJpbmcgSUNBMFkwEwYHKoZI
+zj0CAQYIKoZIzj0DAQcDQgAE7uB5IAM0VzyQITMPRP6l2c6EPisd2sLSgD5NvYXq
+8aq+3f2xGFlYygaTIPUM040B0AbMJlPx9xk6+RQo32rNn6OB4jCB3zAdBgNVHQ4E
+FgQUU5ik8JDyqVw9UvyY3rny+a8EL24wgZ8GA1UdIwSBlzCBlIAUU5ik8JDyqVw9
+UvyY3rny+a8EL26hZqRkMGIxCzAJBgNVBAYTAlVTMQswCQYDVQQIDAJDQTEPMA0G
+A1UECgwGR29vZ2xlMRQwEgYDVQQLDAtFbmdpbmVlcmluZzEfMB0GA1UEAwwWR29v
+Z2xlIEVuZ2luZWVyaW5nIElDQYIUFDAsPzL14w6/jKAtysPUTcGRgM4wDwYDVR0T
+AQH/BAUwAwEB/zALBgNVHQ8EBAMCAYYwCgYIKoZIzj0EAwIDRwAwRAIgQmIdM2Mv
+KI70Huk3zWbukclONM9dAJ8n9qiD0HFnypICIBeaUmZZ1FQtsa0i0KNb7+KH5EvV
+g3u7GESPQU2jEnCj
+-----END CERTIFICATE-----
diff --git a/sw/device/silicon_creator/manuf/keys/sival/rma_unlock_enc_rsa3072.pub.der b/sw/device/silicon_creator/manuf/keys/sival/rma_unlock_enc_rsa3072.pub.der
new file mode 100644
index 0000000000000..a5fdac83e949d
Binary files /dev/null and b/sw/device/silicon_creator/manuf/keys/sival/rma_unlock_enc_rsa3072.pub.der differ
diff --git a/sw/device/silicon_creator/manuf/lib/BUILD b/sw/device/silicon_creator/manuf/lib/BUILD
index 87f2e202fc0af..8d0f31283a8f1 100644
--- a/sw/device/silicon_creator/manuf/lib/BUILD
+++ b/sw/device/silicon_creator/manuf/lib/BUILD
@@ -11,7 +11,7 @@ load(
 )
 load(
     "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
-    "EARLGREY_A0_INDIVIDUALIZE_OTP_SW_CFGS",
+    "EARLGREY_OTP_CFGS",
 )
 
 package(default_visibility = ["//visibility:public"])
@@ -105,7 +105,8 @@ cc_library(
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:status",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/testing:otp_ctrl_testutils",
@@ -124,7 +125,6 @@ cc_library(
         "//sw/device/lib/base:multibits",
         "//sw/device/lib/base:status",
         "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/dif:lc_ctrl",
@@ -142,6 +142,7 @@ opentitan_test(
     srcs = ["individualize_functest.c"],
     exec_env = {
         "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw340_sival": None,
     },
     fpga = fpga_params(
         changes_otp = True,
@@ -149,6 +150,7 @@ opentitan_test(
         tags = ["manuf"],
     ),
     deps = [
+        ":flash_info_fields",
         ":individualize",
         ":otp_fields",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -157,7 +159,9 @@ opentitan_test(
         "//sw/device/lib/dif:lc_ctrl",
         "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/dif:rstmgr",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
         "//sw/device/lib/testing:lc_ctrl_testutils",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
         "//sw/device/lib/testing:rstmgr_testutils",
         "//sw/device/lib/testing/json:provisioning_data",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -178,7 +182,7 @@ cc_library(
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:status",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/testing:flash_ctrl_testutils",
@@ -186,17 +190,17 @@ cc_library(
     ],
 )
 
-# As more SKUs are created with different OTP software configuration partitions,
-# libraries can be added to INDIVIDUALIZE_OTP_SW_CFGS accordingly.
+# As more SKUs are created with different OTP configurations, libraries can be
+# added by updating EARLGREY_OTP_CFGS accordingly.
 [
     cc_library(
-        name = "individualize_sw_cfg_earlgrey_sku_{}".format(otp_sw_cfg),
+        name = "individualize_sw_cfg_{}".format(cfg),
         deps = [
             ":individualize_sw_cfg",
-            "//hw/ip/otp_ctrl/data/earlgrey_skus/{}:otp_sw_cfg".format(otp_sw_cfg),
+            "{}".format(target),
         ],
     )
-    for otp_sw_cfg in EARLGREY_A0_INDIVIDUALIZE_OTP_SW_CFGS
+    for cfg, target in EARLGREY_OTP_CFGS.items()
 ]
 
 opentitan_test(
@@ -204,6 +208,7 @@ opentitan_test(
     srcs = ["individualize_sw_cfg_functest.c"],
     exec_env = {
         "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
     },
     fpga = fpga_params(
         changes_otp = True,
@@ -216,7 +221,8 @@ opentitan_test(
     ),
     deps = [
         ":flash_info_fields",
-        ":individualize_sw_cfg_earlgrey_sku_sival",
+        # Testing emulation SKU only should be sufficient.
+        ":individualize_sw_cfg_em00",
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:status",
@@ -229,6 +235,7 @@ opentitan_test(
         "//sw/device/lib/testing:otp_ctrl_testutils",
         "//sw/device/lib/testing:rstmgr_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
     ],
 )
 
@@ -243,11 +250,6 @@ cc_library(
         "//sw/device/lib/base:multibits",
         "//sw/device/lib/base:status",
         "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/impl:aes",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:keyblob",
-        "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/dif:lc_ctrl",
         "//sw/device/lib/dif:otp_ctrl",
@@ -263,26 +265,24 @@ cc_library(
 opentitan_test(
     name = "personalize_functest",
     srcs = ["personalize_functest.c"],
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:dev_key_0_ecdsa_p256": "dev_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "dev_key_0"},
     exec_env = {
         "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
     },
     fpga = fpga_params(
         changes_otp = True,
-        data = ["//sw/device/silicon_creator/manuf/keys/fake:rma_unlock_token_export_key.sk_hsm.der"],
         needs_jtag = True,
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_individualized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_individualized",
         tags = [
             "lc_dev",
             "manuf",
         ],
         test_cmd = """
             --bootstrap={firmware}
-            --host-ecc-sk="$(rootpath //sw/device/silicon_creator/manuf/keys/fake:rma_unlock_token_export_key.sk_hsm.der)"
         """,
         test_harness = "//sw/host/tests/manuf/personalize_functest",
     ),
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:dev_key_0_spx": "dev_key_0"},
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "dev_key_0"},
     deps = [
         ":flash_info_fields",
         ":personalize",
diff --git a/sw/device/silicon_creator/manuf/lib/ast_program.c b/sw/device/silicon_creator/manuf/lib/ast_program.c
index 64cad6ee712cd..40259634384d5 100644
--- a/sw/device/silicon_creator/manuf/lib/ast_program.c
+++ b/sw/device/silicon_creator/manuf/lib/ast_program.c
@@ -76,7 +76,7 @@ status_t ast_program_init(bool verbose) {
       kFlashInfoFieldAstCalibrationData.bank,
       kFlashInfoFieldAstCalibrationData.partition,
       (dif_flash_ctrl_region_properties_t){
-          .ecc_en = kMultiBitBool4True,
+          .ecc_en = kMultiBitBool4False,
           .high_endurance_en = kMultiBitBool4False,
           .erase_en = kMultiBitBool4True,
           .prog_en = kMultiBitBool4True,
@@ -92,22 +92,19 @@ status_t ast_program_config(bool verbose) {
 
   // Read AST calibration values from flash.
   LOG_INFO("Reading AST data");
-  dif_flash_ctrl_device_info_t device_info = dif_flash_ctrl_get_device_info();
-  uint32_t byte_address =
-      (kFlashInfoFieldAstCalibrationData.page * device_info.bytes_per_page) +
-      kFlashInfoFieldAstCalibrationData.byte_offset;
-  uint32_t ast_data[kFlashInfoAstCalibrationDataSizeIn32BitWords];
   TRY(flash_ctrl_testutils_wait_for_init(&flash_state));
-  TRY(flash_ctrl_testutils_read(&flash_state, byte_address,
-                                kFlashInfoFieldAstCalibrationData.partition,
-                                ast_data, kDifFlashCtrlPartitionTypeInfo,
-                                kFlashInfoAstCalibrationDataSizeIn32BitWords,
-                                /*delay=*/0));
+  uint32_t ast_data[kFlashInfoAstCalibrationDataSizeIn32BitWords];
+  TRY(manuf_flash_info_field_read(
+      &flash_state, kFlashInfoFieldAstCalibrationData, ast_data,
+      kFlashInfoAstCalibrationDataSizeIn32BitWords));
 
   // Program AST CSRs.
   LOG_INFO("Programming %u AST words",
            kFlashInfoAstCalibrationDataSizeIn32BitWords);
-  for (size_t i = 0; i < kFlashInfoAstCalibrationDataSizeIn32BitWords; ++i) {
+  // Don't write the last 3 words of AST config to CSRs on SRAM program boot;
+  // they will get copied to OTP later and written by the ROM on boot.
+  for (size_t i = 0; i < kFlashInfoAstCalibrationDataSizeIn32BitWords - 3;
+       ++i) {
     uint32_t addr = TOP_EARLGREY_AST_BASE_ADDR + i * sizeof(uint32_t);
     uint32_t data = ast_data[i];
     LOG_INFO("\tAddress = 0x%08x, Data = 0x%08x", addr, data);
diff --git a/sw/device/silicon_creator/manuf/lib/ast_program_functest.c b/sw/device/silicon_creator/manuf/lib/ast_program_functest.c
index 4d806a6a361a7..83153bd54a9ee 100644
--- a/sw/device/silicon_creator/manuf/lib/ast_program_functest.c
+++ b/sw/device/silicon_creator/manuf/lib/ast_program_functest.c
@@ -82,9 +82,9 @@ static status_t execute_test(void) {
   TRY(program_page());
   TRY(ast_program_config(true));
   uint32_t crc =
-      crc32(ast_cfg_data,
-            kFlashInfoAstCalibrationDataSizeIn32BitWords * sizeof(uint32_t));
-  TRY_CHECK(ast_nr_writes == 39);
+      crc32(ast_cfg_data, (kFlashInfoAstCalibrationDataSizeIn32BitWords - 3) *
+                              sizeof(uint32_t));
+  TRY_CHECK(ast_nr_writes == 36);
   TRY_CHECK(crc32_finish(&ast_crc) == crc);
   return OK_STATUS();
 }
diff --git a/sw/device/silicon_creator/manuf/lib/flash_info_fields.c b/sw/device/silicon_creator/manuf/lib/flash_info_fields.c
index 308360d30c2d2..285aec9dd92b9 100644
--- a/sw/device/silicon_creator/manuf/lib/flash_info_fields.c
+++ b/sw/device/silicon_creator/manuf/lib/flash_info_fields.c
@@ -15,32 +15,81 @@
 #include "otp_ctrl_regs.h"    // Generated.
 
 /**
- * Partition 0 pages and fields.
- * Refer to sw/device/silicon_creator/lib/drivers/flash_ctrl.h for what
- * information ROM and ROM_EXT expect to find on various pages.
+ * Partition 0, page 0 fields.
  */
-const flash_info_field_t kFlashInfoFieldDeviceId = {
+const flash_info_field_t kFlashInfoFieldLotName = {
     .partition = 0,
     .bank = 0,
     .page = 0,
-    .byte_offset = 0,
+    .byte_offset = kFlashInfoFieldLotNameStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldWaferNumber = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldWaferNumberStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldWaferXCoord = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldWaferXCoordStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldWaferYCoord = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldWaferYCoordStartOffset,
 };
 
-const flash_info_field_t kFlashInfoFieldManufState = {
+const flash_info_field_t kFlashInfoFieldProcessData = {
     .partition = 0,
     .bank = 0,
     .page = 0,
-    .byte_offset = OTP_CTRL_PARAM_DEVICE_ID_SIZE,
+    .byte_offset = kFlashInfoFieldProcessDataStartOffset,
 };
 
 const flash_info_field_t kFlashInfoFieldAstCalibrationData = {
     .partition = 0,
     .bank = 0,
     .page = 0,
-    .byte_offset =
-        OTP_CTRL_PARAM_DEVICE_ID_SIZE + OTP_CTRL_PARAM_MANUF_STATE_SIZE,
+    .byte_offset = kFlashInfoFieldAstCalibrationDataStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldAstCfgVersion = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldAstCfgVersionStartOffset,
 };
 
+const flash_info_field_t kFlashInfoFieldCpDeviceId = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldCpDeviceIdStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldAstIndividPatchAddr = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldAstIndividPatchAddrStartOffset,
+};
+
+const flash_info_field_t kFlashInfoFieldAstIndividPatchVal = {
+    .partition = 0,
+    .bank = 0,
+    .page = 0,
+    .byte_offset = kFlashInfoFieldAstIndividPatchValStartOffset,
+};
+
+/**
+ * Partition 0, page 1 fields.
+ */
 const flash_info_field_t kFlashInfoFieldCreatorSeed = {
     .partition = 0,
     .bank = 0,
@@ -48,6 +97,9 @@ const flash_info_field_t kFlashInfoFieldCreatorSeed = {
     .byte_offset = 0,
 };
 
+/**
+ * Partition 0, page 2 fields.
+ */
 const flash_info_field_t kFlashInfoFieldOwnerSeed = {
     .partition = 0,
     .bank = 0,
@@ -55,6 +107,9 @@ const flash_info_field_t kFlashInfoFieldOwnerSeed = {
     .byte_offset = 0,
 };
 
+/**
+ * Partition 0, page 3 fields.
+ */
 const flash_info_field_t kFlashInfoFieldWaferAuthSecret = {
     .partition = 0,
     .bank = 0,
@@ -62,46 +117,35 @@ const flash_info_field_t kFlashInfoFieldWaferAuthSecret = {
     .byte_offset = 0,
 };
 
+/**
+ * Partition 0, page 4 fields.
+ */
 const flash_info_field_t kFlashInfoFieldUdsAttestationKeySeed = {
     .partition = 0,
     .bank = 0,
     .page = 4,
-    .byte_offset = 0,
+    .byte_offset = kFlashInfoFieldUdsKeySeedIdx * kAttestationSeedBytes,
 };
 
 const flash_info_field_t kFlashInfoFieldCdi0AttestationKeySeed = {
     .partition = 0,
     .bank = 0,
     .page = 4,
-    .byte_offset = kAttestationSeedBytes,
+    .byte_offset = kFlashInfoFieldCdi0KeySeedIdx * kAttestationSeedBytes,
 };
 
 const flash_info_field_t kFlashInfoFieldCdi1AttestationKeySeed = {
     .partition = 0,
     .bank = 0,
     .page = 4,
-    .byte_offset = (2 * kAttestationSeedBytes),
+    .byte_offset = kFlashInfoFieldCdi1KeySeedIdx * kAttestationSeedBytes,
 };
 
 const flash_info_field_t kFlashInfoFieldTpmEkAttestationKeySeed = {
     .partition = 0,
     .bank = 0,
     .page = 4,
-    .byte_offset = (3 * kAttestationSeedBytes),
-};
-
-const flash_info_field_t kFlashInfoFieldTpmCekAttestationKeySeed = {
-    .partition = 0,
-    .bank = 0,
-    .page = 4,
-    .byte_offset = (4 * kAttestationSeedBytes),
-};
-
-const flash_info_field_t kFlashInfoFieldTpmCikAttestationKeySeed = {
-    .partition = 0,
-    .bank = 0,
-    .page = 4,
-    .byte_offset = (5 * kAttestationSeedBytes),
+    .byte_offset = kFlashInfoFieldTpmEkKeySeedIdx * kAttestationSeedBytes,
 };
 
 const flash_info_field_t kFlashInfoFieldAttestationKeyGenVersion = {
diff --git a/sw/device/silicon_creator/manuf/lib/flash_info_fields.h b/sw/device/silicon_creator/manuf/lib/flash_info_fields.h
index 76985631d0a0a..8d6ca7637f674 100644
--- a/sw/device/silicon_creator/manuf/lib/flash_info_fields.h
+++ b/sw/device/silicon_creator/manuf/lib/flash_info_fields.h
@@ -21,32 +21,116 @@ typedef struct flash_info_field {
 
 enum {
   /**
-   * AST Calibration Data Size - Bank 0, Page 0
+   * Lot Name Data Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldLotNameStartOffset = 80,
+  kFlashInfoFieldLotNameSizeIn32BitWords = 1,
+
+  /**
+   * Wafer Number Data Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldWaferNumberStartOffset = 88,
+  kFlashInfoFieldWaferNumberSizeIn32BitWords = 1,
+
+  /**
+   * Wafer X Coord Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldWaferXCoordStartOffset = 96,
+  kFlashInfoFieldWaferXCoordSizeIn32BitWords = 1,
+
+  /**
+   * Wafer Y Coord Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldWaferYCoordStartOffset = 104,
+  kFlashInfoFieldWaferYCoordSizeIn32BitWords = 1,
+
+  /**
+   * Process Data Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldProcessDataStartOffset = 112,
+  kFlashInfoFieldProcessDataSizeIn32BitWords = 2,
+
+  /**
+   * AST Calibration Data Start / Size - Bank 0, Page 0
    *
    * Number of AST calibration words that will be stored in flash / OTP.
    */
+  kFlashInfoFieldAstCalibrationDataStartOffset = 128,
+  kFlashInfoAstCalibrationDataSizeInBytes =
+      AST_REGAL_REG_OFFSET + sizeof(uint32_t),
   kFlashInfoAstCalibrationDataSizeIn32BitWords =
-      (AST_REGAL_REG_OFFSET + sizeof(uint32_t)) / sizeof(uint32_t),
+      kFlashInfoAstCalibrationDataSizeInBytes / sizeof(uint32_t),
+
+  /**
+   * AST Calibration Version Start / Size - Bank 0, Page 0
+   *
+   * The version of the AST calibration words that are stored in flash / OTP.
+   */
+  kFlashInfoFieldAstCfgVersionStartOffset = 304,
+  kFlashInfoFieldAstCfgVersionSizeIn32BitWords = 1,
+
+  /**
+   * CP Device ID Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldCpDeviceIdStartOffset = 384,
+  kFlashInfoFieldCpDeviceIdSizeIn32BitWords = 4,
+  kFlashInfoFieldCpDeviceIdSizeInBytes =
+      kFlashInfoFieldCpDeviceIdSizeIn32BitWords * sizeof(uint32_t),
+
+  /**
+   * AST Individualize Patch Address Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldAstIndividPatchAddrStartOffset = 400,
+  kFlashInfoFieldAstIndividPatchAddrSizeIn32BitWords = 1,
+
+  /**
+   * AST Individualize Patch Value Start / Size - Bank 0, Page 0
+   */
+  kFlashInfoFieldAstIndividPatchValStartOffset = 404,
+  kFlashInfoFieldAstIndividPatchValSizeIn32BitWords = 1,
 
   // Creator/Owner Seeds - Bank 0, Pages 1 and 2
-  kFlashInfoKeySeedSizeIn32BitWords = 32 / sizeof(uint32_t),
+  kFlashInfoFieldKeySeedSizeIn32BitWords = 32 / sizeof(uint32_t),
 
   // Wafer Authentication Secret - Bank 0, Page 3
-  kFlashInfoWaferAuthSecretSizeIn32BitWords = 32 / sizeof(uint32_t),
+  kFlashInfoFieldWaferAuthSecretSizeIn32BitWords = 32 / sizeof(uint32_t),
+
+  // Attestation key gen seed indices
+  kFlashInfoFieldUdsKeySeedIdx = 0,
+  kFlashInfoFieldCdi0KeySeedIdx = 1,
+  kFlashInfoFieldCdi1KeySeedIdx = 2,
+  kFlashInfoFieldTpmEkKeySeedIdx = 3,
 };
 
-extern const flash_info_field_t kFlashInfoFieldDeviceId;
-extern const flash_info_field_t kFlashInfoFieldManufState;
+// Info Page 0 fields.
+extern const flash_info_field_t kFlashInfoFieldLotName;
+extern const flash_info_field_t kFlashInfoFieldWaferNumber;
+extern const flash_info_field_t kFlashInfoFieldWaferXCoord;
+extern const flash_info_field_t kFlashInfoFieldWaferYCoord;
+extern const flash_info_field_t kFlashInfoFieldProcessData;
 extern const flash_info_field_t kFlashInfoFieldAstCalibrationData;
+extern const flash_info_field_t kFlashInfoFieldAstCfgVersion;
+extern const flash_info_field_t kFlashInfoFieldCpDeviceId;
+extern const flash_info_field_t kFlashInfoFieldAstIndividPatchAddr;
+extern const flash_info_field_t kFlashInfoFieldAstIndividPatchVal;
+
+// Info Page 1 fields.
 extern const flash_info_field_t kFlashInfoFieldCreatorSeed;
+
+// Info Page 2 fields.
 extern const flash_info_field_t kFlashInfoFieldOwnerSeed;
+
+// Info Page 3 fields.
 extern const flash_info_field_t kFlashInfoFieldWaferAuthSecret;
+
+// Info Page 4 fields.
 extern const flash_info_field_t kFlashInfoFieldUdsAttestationKeySeed;
 extern const flash_info_field_t kFlashInfoFieldCdi0AttestationKeySeed;
 extern const flash_info_field_t kFlashInfoFieldCdi1AttestationKeySeed;
 extern const flash_info_field_t kFlashInfoFieldTpmEkAttestationKeySeed;
 extern const flash_info_field_t kFlashInfoFieldTpmCekAttestationKeySeed;
 extern const flash_info_field_t kFlashInfoFieldTpmCikAttestationKeySeed;
+extern const flash_info_field_t kFlashInfoFieldDevSeedSeed;
 extern const flash_info_field_t kFlashInfoFieldAttestationKeyGenVersion;
 
 /**
diff --git a/sw/device/silicon_creator/manuf/lib/individualize.c b/sw/device/silicon_creator/manuf/lib/individualize.c
index c9340ad6a70ef..085e7a8b492de 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize.c
+++ b/sw/device/silicon_creator/manuf/lib/individualize.c
@@ -75,7 +75,7 @@ static status_t hw_cfg1_enable_knobs_set(const dif_otp_ctrl_t *otp_ctrl) {
 status_t manuf_individualize_device_hw_cfg(
     dif_flash_ctrl_state_t *flash_state, const dif_otp_ctrl_t *otp_ctrl,
     dif_flash_ctrl_region_properties_t flash_info_page_0_permissions,
-    uint32_t *device_id) {
+    const uint32_t *ft_device_id) {
   bool is_locked;
 
   // Provision HW_CFG0 if it is not locked.
@@ -83,44 +83,74 @@ status_t manuf_individualize_device_hw_cfg(
                                       &is_locked));
   if (!is_locked) {
     // Configure flash info page permissions in case we started from a cold
-    // boot. Note: device_id and manuf_state are on the same flash info page.
+    // boot. Note: cp_device_id and manuf_state are on the same flash info page.
     TRY(flash_ctrl_testutils_info_region_setup_properties(
-        flash_state, kFlashInfoFieldDeviceId.page, kFlashInfoFieldDeviceId.bank,
-        kFlashInfoFieldDeviceId.partition, flash_info_page_0_permissions,
+        flash_state, kFlashInfoFieldCpDeviceId.page,
+        kFlashInfoFieldCpDeviceId.bank, kFlashInfoFieldCpDeviceId.partition,
+        flash_info_page_0_permissions,
         /*offset=*/NULL));
 
-    // Configure DeviceID
-    uint32_t device_id_from_flash[kHwCfgDeviceIdSizeIn32BitWords];
-    uint32_t empty_device_id[kHwCfgDeviceIdSizeIn32BitWords] = {0};
-    TRY(manuf_flash_info_field_read(flash_state, kFlashInfoFieldDeviceId,
-                                    device_id_from_flash,
-                                    kHwCfgDeviceIdSizeIn32BitWords));
-    bool flash_device_id_empty = true;
-    for (size_t i = 0;
-         flash_device_id_empty && i < kHwCfgDeviceIdSizeIn32BitWords; ++i) {
-      flash_device_id_empty &= device_id_from_flash[i] == 0;
+    // Read CpDeviceId & AST configuration version from flash info page 0.
+    uint32_t cp_device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords];
+    TRY(manuf_flash_info_field_read(flash_state, kFlashInfoFieldCpDeviceId,
+                                    cp_device_id,
+                                    kFlashInfoFieldCpDeviceIdSizeIn32BitWords));
+    uint32_t ast_cfg_version;
+    TRY(manuf_flash_info_field_read(
+        flash_state, kFlashInfoFieldAstCfgVersion, &ast_cfg_version,
+        kFlashInfoFieldAstCfgVersionSizeIn32BitWords));
+
+    // Check if AST configuration version is an 8-bit value.
+    if (ast_cfg_version > UINT8_MAX) {
+      return OUT_OF_RANGE();
     }
 
-    // If the device ID read from flash is non-empty, then it must match the
-    // device ID provided. If the device ID read from flash is empty, we check
-    // to ensure the device ID provided is also not empty. An empty (all zero)
-    // device ID will prevent the keymgr from advancing.
-    if (!flash_device_id_empty) {
-      TRY_CHECK_ARRAYS_EQ(device_id_from_flash, device_id,
-                          kHwCfgDeviceIdSizeIn32BitWords);
-    } else {
-      TRY_CHECK_ARRAYS_NE(device_id, empty_device_id,
-                          kHwCfgDeviceIdSizeIn32BitWords);
+    // Check if CP device ID from flash is empty.
+    bool flash_cp_device_id_empty = true;
+    for (size_t i = 0; i < kFlashInfoFieldCpDeviceIdSizeIn32BitWords; ++i) {
+      if (cp_device_id[i] != 0) {
+        flash_cp_device_id_empty = false;
+        break;
+      }
     }
+
+    // On non-silicon targets, we expect the CP device ID from flash to be
+    // empty. In this case we set the HW origin and DIN portions of the CP
+    // device ID to all 1s to indicate this is an FPGA/Sim generated device ID.
+    // Otherwise, we expect the CP device ID to be present and non-zero.
+    if (flash_cp_device_id_empty) {
+      if (kDeviceType != kDeviceSilicon && kDeviceType != kDeviceSimDV) {
+        memset(&cp_device_id, 0, sizeof(cp_device_id));
+        cp_device_id[0] = UINT32_MAX;
+        cp_device_id[1] = UINT32_MAX;
+        cp_device_id[2] = UINT32_MAX;
+      } else {
+        return NOT_FOUND();
+      }
+    }
+
+    // Construct the complete device ID.
+    uint32_t device_id[kHwCfgDeviceIdSizeIn32BitWords];
+    memcpy(device_id, cp_device_id, kFlashInfoFieldCpDeviceIdSizeInBytes);
+    // CP and FT device IDs are the same length (128 bit words).
+    memcpy(&device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords], ft_device_id,
+           kFlashInfoFieldCpDeviceIdSizeInBytes);
+
+    // Overwrite AST configuration version field in FT device ID with the
+    // version field from flash.
+    uint32_t ft_device_id_mask = 0xFFFF00FF;
+    device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords] =
+        (device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords] &
+         ft_device_id_mask) |
+        (ast_cfg_version << 8);
+
+    // Write the complete device ID to OTP.
     TRY(otp_ctrl_testutils_dai_write32(otp_ctrl, kDifOtpCtrlPartitionHwCfg0,
                                        kHwCfgDeviceIdOffset, device_id,
                                        kHwCfgDeviceIdSizeIn32BitWords));
 
-    // Configure ManufState
-    uint32_t manuf_state[kHwCfgManufStateSizeIn32BitWords];
-    TRY(manuf_flash_info_field_read(flash_state, kFlashInfoFieldManufState,
-                                    manuf_state,
-                                    kHwCfgManufStateSizeIn32BitWords));
+    // Configure ManufState as all 0s. It is unused.
+    uint32_t manuf_state[kHwCfgManufStateSizeIn32BitWords] = {0};
     TRY(otp_ctrl_testutils_dai_write32(otp_ctrl, kDifOtpCtrlPartitionHwCfg0,
                                        kHwCfgManufStateOffset, manuf_state,
                                        kHwCfgManufStateSizeIn32BitWords));
diff --git a/sw/device/silicon_creator/manuf/lib/individualize.h b/sw/device/silicon_creator/manuf/lib/individualize.h
index 5af3190f8877b..4ae230bcfd3c2 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize.h
+++ b/sw/device/silicon_creator/manuf/lib/individualize.h
@@ -22,9 +22,7 @@
  *
  * Preconditions:
  * - ManufState is pre-populated in the appropriate flash info page.
- * - If DeviceId is already written to flash, the device ID provided must match.
- *   If the DeviceId slot in flash is all 0s, then the provided DeviceId will be
- *   what is written to OTP.
+ * - CP portion of the Device ID must be written to flash.
  *
  * Note: The test will skip all programming steps and succeed if the HW_CFG0/1
  * paritions are already locked. This is to facilitate test re-runs.
@@ -38,14 +36,14 @@
  * @param flash_info_page_0_permissions Access permissions to set on flash info
  *                                      page 0 (which temporarily holds
  *                                      device_id and manuf_state).
- * @param device_id DeviceId to check exists in flash, or inject in into OTP if
- *                  running in a test environment.
+ * @param ft_device_id FT portion of the Device ID to combine with the CP
+ *                     portion before writing it into OTP.
  * @return OK_STATUS on success.
  */
 status_t manuf_individualize_device_hw_cfg(
     dif_flash_ctrl_state_t *flash_state, const dif_otp_ctrl_t *otp_ctrl,
     dif_flash_ctrl_region_properties_t flash_info_page_0_permissions,
-    uint32_t *device_id);
+    const uint32_t *ft_device_id);
 
 /**
  * Checks the HW_CFG0/1 OTP partition end state.
diff --git a/sw/device/silicon_creator/manuf/lib/individualize_functest.c b/sw/device/silicon_creator/manuf/lib/individualize_functest.c
index 8bb1675af2ea8..4c6d5eab753d6 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize_functest.c
+++ b/sw/device/silicon_creator/manuf/lib/individualize_functest.c
@@ -7,10 +7,13 @@
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
 #include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/lc_ctrl_testutils.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize.h"
 #include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
 
@@ -28,6 +31,23 @@ static dif_lc_ctrl_t lc_ctrl;
 static dif_otp_ctrl_t otp_ctrl;
 static dif_rstmgr_t rstmgr;
 
+/**
+ * CP and FT portions of the device ID are the same size.
+ *
+ * Note, the second byte of the FT device ID is set by the CP calibration step
+ * and written to flash info page 0. We set it to 0x99 for testing.
+ */
+static const uint32_t kFtDeviceId[kFlashInfoFieldCpDeviceIdSizeIn32BitWords] = {
+    0xAAAA99AA, 0xBBBBBBBB, 0xAAAAAAAA, 0xBBBBBBBB};
+
+static dif_flash_ctrl_region_properties_t kFlashInfoPage0Permissions = {
+    .ecc_en = kMultiBitBool4True,
+    .high_endurance_en = kMultiBitBool4False,
+    .erase_en = kMultiBitBool4True,
+    .prog_en = kMultiBitBool4True,
+    .rd_en = kMultiBitBool4True,
+    .scramble_en = kMultiBitBool4False};
+
 /**
  * Initializes all DIF handles used in this module.
  */
@@ -59,18 +79,43 @@ bool test_main(void) {
       lc_ctrl_testutils_check_lc_state(&lc_ctrl, kDifLcCtrlStateTestUnlocked1));
 
   if (!status_ok(manuf_individualize_device_hw_cfg_check(&otp_ctrl))) {
-    dif_flash_ctrl_region_properties_t kFlashInfoPage0Permissions = {
-        .ecc_en = kMultiBitBool4True,
-        .high_endurance_en = kMultiBitBool4False,
-        .erase_en = kMultiBitBool4True,
-        .prog_en = kMultiBitBool4True,
-        .rd_en = kMultiBitBool4True,
-        .scramble_en = kMultiBitBool4False};
-    uint32_t device_id[kHwCfgDeviceIdSizeIn32BitWords] = {
-        0xAAAAAAAA, 0xBBBBBBBB, 0xAAAAAAAA, 0xBBBBBBBB,
+    // Setup page permissions on flash info page 0.
+    uint32_t byte_address = 0;
+    CHECK_STATUS_OK(flash_ctrl_testutils_info_region_setup_properties(
+        &flash_state, kFlashInfoFieldCpDeviceId.page,
+        kFlashInfoFieldCpDeviceId.bank, kFlashInfoFieldCpDeviceId.partition,
+        kFlashInfoPage0Permissions, &byte_address));
+
+    // Write the CP device ID to flash info page 0 and try to program HW_CFG0
+    // partition.
+    uint32_t kCpDeviceId[kFlashInfoFieldCpDeviceIdSizeIn32BitWords] = {
         0xAAAAAAAA, 0xBBBBBBBB, 0xAAAAAAAA, 0xBBBBBBBB};
+    CHECK_STATUS_OK(manuf_flash_info_field_write(
+        &flash_state, kFlashInfoFieldCpDeviceId, kCpDeviceId,
+        kFlashInfoFieldCpDeviceIdSizeIn32BitWords,
+        /*erase_page_before_write=*/true));
+    uint32_t ast_cfg_version = 0x99;
+    CHECK_STATUS_OK(manuf_flash_info_field_write(
+        &flash_state, kFlashInfoFieldAstCfgVersion, &ast_cfg_version,
+        kFlashInfoFieldAstCfgVersionSizeIn32BitWords,
+        /*erase_page_before_write=*/false));
     CHECK_STATUS_OK(manuf_individualize_device_hw_cfg(
-        &flash_state, &otp_ctrl, kFlashInfoPage0Permissions, device_id));
+        &flash_state, &otp_ctrl, kFlashInfoPage0Permissions, kFtDeviceId));
+
+    // Check the value of the DeviceId in the HW_CFG0 partition.
+    uint32_t device_id[kHwCfgDeviceIdSizeIn32BitWords];
+    CHECK_STATUS_OK(otp_ctrl_testutils_dai_read32_array(
+        &otp_ctrl, kDifOtpCtrlPartitionHwCfg0, 0, device_id,
+        kHwCfgDeviceIdSizeIn32BitWords));
+    LOG_INFO("CP Device ID in OTP: %08x%08x%08x%08x", device_id[3],
+             device_id[2], device_id[2], device_id[0]);
+    LOG_INFO("FT Device ID in OTP: %08x%08x%08x%08x", device_id[7],
+             device_id[6], device_id[5], device_id[4]);
+    CHECK_ARRAYS_EQ(device_id, kCpDeviceId,
+                    kFlashInfoFieldCpDeviceIdSizeIn32BitWords);
+    CHECK_ARRAYS_EQ(&device_id[kFlashInfoFieldCpDeviceIdSizeIn32BitWords],
+                    kFtDeviceId, kFlashInfoFieldCpDeviceIdSizeIn32BitWords);
+
     sw_reset();
   }
 
diff --git a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.c b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.c
index a3896706534f7..a957b4435be30 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.c
+++ b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.c
@@ -6,7 +6,6 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
@@ -22,7 +21,7 @@ enum {
   kValidAstCfgOtpAddrLow = OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_OFFSET,
   kInvalidAstCfgOtpAddrHigh =
       kValidAstCfgOtpAddrLow + OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_SIZE,
-
+  kSha256DigestWords = 256 / 32,
 };
 
 /**
@@ -36,7 +35,7 @@ enum {
  * @param kv OTP Array of OTP key values. See `otp_kv_t` documentation for more
  * details.
  * @param len Length of the `kv` array.
- * @return OT_WARN_UNUSED_RESULT
+ * @return OK_STATUS if the OTP values were written into the target partition.
  */
 OT_WARN_UNUSED_RESULT
 static status_t otp_img_write(const dif_otp_ctrl_t *otp,
@@ -52,15 +51,36 @@ static status_t otp_img_write(const dif_otp_ctrl_t *otp,
     // immediately before the transport image is loaded, after all other
     // provisioning is complete.
     //
+    // We skip the provisioning of the creator manufacturing status as it must
+    // be provisioned only at the end of the personalization flow. The
+    // personalization firmware is bound with the INITIAL (empty) manufacturing
+    // state, so once the manufacturing state is provisioned, the
+    // personalization firmware can't be re-entrant.
+    //
+    // We skip the provisioning of the immutable ROM_EXT enablement
+    // configuration as it must be provisioned only at the end of the
+    // personalization flow. The personalization firmware doesn't include an
+    // immutable ROM_EXT section. Enabling this feature with personalization
+    // firmware would result in ROM self-shutdown due to an invalid immutable
+    // ROM extension hash.
+    //
+    // We also skip the provisioning of the ROM bootstrap disablement
+    // configuration. This should only be disabled after all bootstrap
+    // operations in the personalization flow have been completed.
+    //
     // Additionally, we skip the provisioning of the AST configuration data, as
     // this should already be written to a flash info page. We will pull the
     // data directly from there.
-    if (kv[i].offset ==
-            OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET ||
-        (kv[i].offset >= kValidAstCfgOtpAddrLow &&
-         kv[i].offset < kInvalidAstCfgOtpAddrHigh)) {
+    // clang-format off
+    if (kv[i].offset == OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET ||
+        kv[i].offset == OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET ||
+        kv[i].offset == OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET ||
+        kv[i].offset == OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET ||
+        kv[i].offset == OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET ||
+        (kv[i].offset >= kValidAstCfgOtpAddrLow && kv[i].offset < kInvalidAstCfgOtpAddrHigh)) {
       continue;
     }
+    // clang-format on
     uint32_t offset;
     TRY(dif_otp_ctrl_relative_address(partition, kv[i].offset, &offset));
     switch (kv[i].type) {
@@ -81,6 +101,44 @@ static status_t otp_img_write(const dif_otp_ctrl_t *otp,
   return OK_STATUS();
 }
 
+/**
+ * Overwrites the target field with its expected final value in a buffer
+ * representing the provided partition.
+ *
+ * @param partition Target OTP partition.
+ * @param field_offset An offest of the target OTP field.
+ * @param buffer A buffer containing the entire target OTP partition.
+ * @return OK_STATUS if the expected OTP values are successfully written to the
+ * `buffer`.
+ */
+static status_t otp_img_expected_value_read(dif_otp_ctrl_partition_t partition,
+                                            uint32_t field_offset,
+                                            uint8_t *buffer) {
+  uint32_t relative_addr;
+  TRY(dif_otp_ctrl_relative_address(partition, field_offset, &relative_addr));
+  switch (field_offset) {
+    case OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET:
+      memcpy(buffer + relative_addr, &kOwnerSwCfgRomBootstrapDisValue,
+             sizeof(uint32_t));
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET:
+      memcpy(buffer + relative_addr, &kCreatorSwCfgFlashInfoBootDataCfgValue,
+             sizeof(uint32_t));
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET:
+      memcpy(buffer + relative_addr, &kCreatorSwCfgManufStateValue,
+             sizeof(uint32_t));
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET:
+      memcpy(buffer + relative_addr, &kCreatorSwCfgImmutableRomExtEnValue,
+             sizeof(uint32_t));
+      break;
+    default:
+      return INTERNAL();
+  }
+  return OK_STATUS();
+}
+
 /**
  * Computes a SHA256 digest of an OTP partition and uses the least significant
  * 64-bits of the digest to additionally lock the partition.
@@ -90,7 +148,7 @@ static status_t otp_img_write(const dif_otp_ctrl_t *otp,
  *
  * @param otp OTP Controller instance.
  * @param partition Target OTP partition.
- * @return OT_WARN_UNUSED_RESULT
+ * @return OK_STATUS if the target partition was locked.
  */
 OT_WARN_UNUSED_RESULT
 static status_t lock_otp_partition(const dif_otp_ctrl_t *otp_ctrl,
@@ -126,7 +184,7 @@ static status_t manuf_individualize_device_ast_cfg(
       kFlashInfoFieldAstCalibrationData.bank,
       kFlashInfoFieldAstCalibrationData.partition,
       (dif_flash_ctrl_region_properties_t){
-          .ecc_en = kMultiBitBool4True,
+          .ecc_en = kMultiBitBool4False,
           .high_endurance_en = kMultiBitBool4False,
           .erase_en = kMultiBitBool4False,
           .prog_en = kMultiBitBool4False,
@@ -149,9 +207,9 @@ static status_t manuf_individualize_device_ast_cfg(
     }
     TRY(dif_otp_ctrl_relative_address(kDifOtpCtrlPartitionCreatorSwCfg, addr,
                                       &relative_addr));
-    TRY(otp_ctrl_testutils_dai_write32(otp_ctrl,
-                                       kDifOtpCtrlPartitionCreatorSwCfg,
-                                       relative_addr, &data, /*len=*/1));
+    TRY(otp_ctrl_testutils_dai_write32(
+        otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg, relative_addr, &data,
+        /*len=*/1));
   }
   return OK_STATUS();
 }
@@ -164,16 +222,67 @@ status_t manuf_individualize_device_creator_sw_cfg(
   return OK_STATUS();
 }
 
-status_t manuf_individualize_device_flash_data_default_cfg(
+status_t manuf_individualize_device_field_cfg(const dif_otp_ctrl_t *otp_ctrl,
+                                              uint32_t field_offset) {
+  uint32_t relative_addr;
+  const uint32_t *field_value_addr;
+  dif_otp_ctrl_partition_t partition;
+  switch (field_offset) {
+    case OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET:
+      field_value_addr = &kOwnerSwCfgRomBootstrapDisValue;
+      partition = kDifOtpCtrlPartitionOwnerSwCfg;
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET:
+      field_value_addr = &kCreatorSwCfgFlashInfoBootDataCfgValue;
+      partition = kDifOtpCtrlPartitionCreatorSwCfg;
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET:
+      field_value_addr = &kCreatorSwCfgFlashDataDefaultCfgValue;
+      partition = kDifOtpCtrlPartitionCreatorSwCfg;
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET:
+      field_value_addr = &kCreatorSwCfgImmutableRomExtEnValue;
+      partition = kDifOtpCtrlPartitionCreatorSwCfg;
+      break;
+    case OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET:
+      field_value_addr = &kCreatorSwCfgManufStateValue;
+      partition = kDifOtpCtrlPartitionCreatorSwCfg;
+      break;
+    default:
+      return INTERNAL();
+  }
+
+  TRY(dif_otp_ctrl_relative_address(partition, field_offset, &relative_addr));
+  TRY(otp_ctrl_testutils_dai_write32(otp_ctrl, partition, relative_addr,
+                                     field_value_addr, /*len=*/1));
+
+  return OK_STATUS();
+}
+
+status_t manuf_individualize_device_flash_data_default_cfg_check(
     const dif_otp_ctrl_t *otp_ctrl) {
   uint32_t offset;
   TRY(dif_otp_ctrl_relative_address(
       kDifOtpCtrlPartitionCreatorSwCfg,
       OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET, &offset));
-  TRY(otp_ctrl_testutils_dai_write32(
-      otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg, offset,
-      &kCreatorSwCfgFlashDataDefaultCfgValue, /*len=*/1));
-  return OK_STATUS();
+  uint32_t val = 0;
+  TRY(otp_ctrl_testutils_dai_read32(otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg,
+                                    offset, &val));
+  bool is_provisioned = (val == kCreatorSwCfgFlashDataDefaultCfgValue);
+  return is_provisioned ? OK_STATUS() : INTERNAL();
+}
+
+status_t manuf_individualize_device_flash_info_boot_data_cfg_check(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  uint32_t offset;
+  TRY(dif_otp_ctrl_relative_address(
+      kDifOtpCtrlPartitionCreatorSwCfg,
+      OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET, &offset));
+  uint32_t val = 0;
+  TRY(otp_ctrl_testutils_dai_read32(otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg,
+                                    offset, &val));
+  bool is_provisioned = (val == kCreatorSwCfgFlashInfoBootDataCfgValue);
+  return is_provisioned ? OK_STATUS() : INTERNAL();
 }
 
 status_t manuf_individualize_device_creator_sw_cfg_lock(
@@ -194,6 +303,37 @@ status_t manuf_individualize_device_owner_sw_cfg(
     const dif_otp_ctrl_t *otp_ctrl) {
   TRY(otp_img_write(otp_ctrl, kDifOtpCtrlPartitionOwnerSwCfg, kOtpKvOwnerSwCfg,
                     kOtpKvOwnerSwCfgSize));
+  return OK_STATUS();
+}
+
+status_t manuf_individualize_device_partition_expected_read(
+    dif_otp_ctrl_partition_t partition, uint8_t *buffer) {
+  switch (partition) {
+    case kDifOtpCtrlPartitionOwnerSwCfg:
+      TRY(otp_img_expected_value_read(
+          partition, OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET,
+          buffer));
+      break;
+    case kDifOtpCtrlPartitionCreatorSwCfg:
+      TRY(otp_img_expected_value_read(
+          partition,
+          OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_INFO_BOOT_DATA_CFG_OFFSET,
+          buffer));
+      TRY(otp_img_expected_value_read(
+          partition, OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET, buffer));
+      TRY(otp_img_expected_value_read(
+          partition, OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET,
+          buffer));
+      break;
+    default:
+      return INTERNAL();
+  }
+
+  return OK_STATUS();
+}
+
+status_t manuf_individualize_device_owner_sw_cfg_lock(
+    const dif_otp_ctrl_t *otp_ctrl) {
   TRY(lock_otp_partition(otp_ctrl, kDifOtpCtrlPartitionOwnerSwCfg));
   return OK_STATUS();
 }
@@ -205,3 +345,36 @@ status_t manuf_individualize_device_owner_sw_cfg_check(
                                       &is_locked));
   return is_locked ? OK_STATUS() : INTERNAL();
 }
+
+status_t manuf_individualize_device_rot_creator_auth_codesign(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  TRY(otp_img_write(otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthCodesign,
+                    kOtpKvRotCreatorAuthCodesign,
+                    kOtpKvRotCreatorAuthCodesignSize));
+  TRY(lock_otp_partition(otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthCodesign));
+  return OK_STATUS();
+}
+
+status_t manuf_individualize_device_rot_creator_auth_state(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  TRY(otp_img_write(otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthState,
+                    kOtpKvRotCreatorAuthState, kOtpKvRotCreatorAuthStateSize));
+  TRY(lock_otp_partition(otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthState));
+  return OK_STATUS();
+}
+
+status_t manuf_individualize_device_rot_creator_auth_codesign_check(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  bool is_locked;
+  TRY(dif_otp_ctrl_is_digest_computed(
+      otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthCodesign, &is_locked));
+  return is_locked ? OK_STATUS() : INTERNAL();
+}
+
+status_t manuf_individualize_device_rot_creator_auth_state_check(
+    const dif_otp_ctrl_t *otp_ctrl) {
+  bool is_locked;
+  TRY(dif_otp_ctrl_is_digest_computed(
+      otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthState, &is_locked));
+  return is_locked ? OK_STATUS() : INTERNAL();
+}
diff --git a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h
index d9d06dab1a5da..7f36012b1ee32 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h
+++ b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h
@@ -16,12 +16,28 @@
 extern const size_t kOtpKvCreatorSwCfgSize;
 extern const otp_kv_t kOtpKvCreatorSwCfg[];
 extern const uint32_t kCreatorSwCfgFlashDataDefaultCfgValue;
+extern const uint32_t kCreatorSwCfgFlashInfoBootDataCfgValue;
+extern const uint32_t kCreatorSwCfgManufStateValue;
+extern const uint32_t kCreatorSwCfgImmutableRomExtEnValue;
 
 /**
  * OTP Owner Software Configuration Partition.
  */
 extern const size_t kOtpKvOwnerSwCfgSize;
 extern const otp_kv_t kOtpKvOwnerSwCfg[];
+extern const uint32_t kOwnerSwCfgRomBootstrapDisValue;
+
+/**
+ * OTP RoT Creator Auth Codesign Partition.
+ */
+extern const size_t kOtpKvRotCreatorAuthCodesignSize;
+extern const otp_kv_t kOtpKvRotCreatorAuthCodesign[];
+
+/**
+ * OTP RoT Creator Auth State Partition.
+ */
+extern const size_t kOtpKvRotCreatorAuthStateSize;
+extern const otp_kv_t kOtpKvRotCreatorAuthState[];
 
 /**
  * Configures the CREATOR_SW_CFG OTP partition.
@@ -36,11 +52,12 @@ extern const otp_kv_t kOtpKvOwnerSwCfg[];
  * - The operation will fail if there are any pre-programmed words not equal
  *   to the expected test values.
  * - This operation will explicitly NOT provision the FLASH_DATA_DEFAULT_CFG
- *   field in the CREATOR_SW_CFG partition. This field must be explicitly
- *   configured after all other provisioning operations are done, but before the
- *   partition is locked, and the final transport image is loaded.
+ *   and MANUF_STATE fields in the CREATOR_SW_CFG partition. These fields must
+ * be explicitly configured after all other provisioning operations are done,
+ * but before the partition is locked, and the final transport image is loaded.
  * - This function will NOT lock the partition either. This must be done after
- *   provisioning the final FLASH_DATA_DEFAULT_CFG filed mentioned above.
+ *   provisioning the final FLASH_DATA_DEFAULT_CFG and MANUF_STATE fields
+ * mentioned above.
  * - The partition must be configured and the chip reset, before the ROM can be
  *   booted, thus enabling bootstrap.
  *
@@ -53,25 +70,44 @@ status_t manuf_individualize_device_creator_sw_cfg(
     const dif_otp_ctrl_t *otp_ctrl, dif_flash_ctrl_state_t *flash_state);
 
 /**
- * Configures the FLASH_DATA_DEFAULT_CFG field in the CREATOR_SW_CFG OTP
+ * This must be called before both
+ * `manuf_individualize_device_creator_sw_cfg_lock()` and
+ * `manuf_individualize_device_owner_sw_cfg_lock()` are called. The operation
+ * will fail if there are any pre-programmed words not equal to the expected
+ * test values.
+ *
+ */
+OT_WARN_UNUSED_RESULT
+status_t manuf_individualize_device_field_cfg(const dif_otp_ctrl_t *otp_ctrl,
+                                              uint32_t field_offset);
+
+/**
+ * Checks the FLASH_DATA_DEFAULT_CFG field in the CREATOR_SW_CFG OTP
  * partition.
  *
- * This must be called before `manuf_individualize_device_creator_sw_cfg_lock()`
- * is called. The operation will fail if there are any pre-programmed words not
- * equal to the expected test values.
+ * @param otp_ctrl OTP controller instance.
+ * @return OK_STATUS if the FLASH_DATA_DEFAULT_CFG field is provisioned.
+ */
+OT_WARN_UNUSED_RESULT
+status_t manuf_individualize_device_flash_data_default_cfg_check(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Checks the FLASH_INFO_BOOT_DATA_CFG field in the CREATOR_SW_CFG OTP
+ * partition.
  *
  * @param otp_ctrl OTP controller instance.
- * @return OK_STATUS if the FLASH_DATA_DEFAULT_CFG field was provisioned.
+ * @return OK_STATUS if the FLASH_INFO_BOOT_DATA_CFG field is provisioned.
  */
 OT_WARN_UNUSED_RESULT
-status_t manuf_individualize_device_flash_data_default_cfg(
+status_t manuf_individualize_device_flash_info_boot_data_cfg_check(
     const dif_otp_ctrl_t *otp_ctrl);
 
 /**
  * Locks the CREATOR_SW_CFG OTP partition.
  *
- * This must be called after both `manuf_individualize_device_creator_sw_cfg()`
- * and `manuf_individualize_device_flash_data_default_cfg()` have been called.
+ * This must be called after `manuf_individualize_device_field_cfg()`
+ * has been called.
  *
  * @param otp_ctrl OTP controller instance.
  * @return OK_STATUS if the CREATOR_SW_CFG partition was locked.
@@ -95,21 +131,36 @@ status_t manuf_individualize_device_creator_sw_cfg_check(
  * The OWNER_SW_CFG partition contains additional settings for the ROM and
  * ROM_EXT, for example:
  * - Alert handler configuration
- * - ROM bootstrap disablement
  * - ROM_EXT bootstrap enablement
  *
  * Note:
- *  - The operation will fail if there are any pre-programmed words not equal to
- *    the expected test values.
- *  - The operation will lock the OWNER_SW_CFG OTP partition.
+ * - The operation will fail if there are any pre-programmed words not equal to
+ *   the expected test values.
+ * - This operation will explicitly NOT provision the ROM_BOOTSTRAP_DIS
+ *   field in the OWNER_SW_CFG partition. This field must be explicitly
+ *   configured after all other provisioning operations are done, but before the
+ *   partition is locked, and the final transport image is loaded.
  *
  * @param otp_ctrl OTP controller instance.
- * @return OK_STATUS if the HW_CFG0 partition is locked.
+ * @return OK_STATUS if the OWNER_SW_CFG partition is locked.
  */
 OT_WARN_UNUSED_RESULT
 status_t manuf_individualize_device_owner_sw_cfg(
     const dif_otp_ctrl_t *otp_ctrl);
 
+/**
+ * Locks the OWNER_SW_CFG OTP partition.
+ *
+ * This must be called after `manuf_individualize_device_field_cfg()`
+ * has been called.
+ *
+ * @param otp_ctrl OTP controller instance.
+ * @return OK_STATUS if the OWNER_SW_CFG partition was locked.
+ */
+OT_WARN_UNUSED_RESULT
+status_t manuf_individualize_device_owner_sw_cfg_lock(
+    const dif_otp_ctrl_t *otp_ctrl);
+
 /**
  * Checks the OWNER_SW_CFG OTP partition end state.
  *
@@ -119,4 +170,60 @@ status_t manuf_individualize_device_owner_sw_cfg(
 status_t manuf_individualize_device_owner_sw_cfg_check(
     const dif_otp_ctrl_t *otp_ctrl);
 
+/**
+ * Overwrites unprovisioned fields with their expected final values in a buffer
+ * representing the provided partition.
+ *
+ * @param partition Target OTP partition.
+ * @param[out] buffer A buffer containing the entire target OTP partition.
+ * @return OK_STATUS if the expected partition values are successfully written
+ * to the `buffer`.
+ */
+status_t manuf_individualize_device_partition_expected_read(
+    dif_otp_ctrl_partition_t partition, uint8_t *buffer);
+
+/**
+ * Configures and locks the ROT_CREATOR_AUTH_CODESIGN OTP partition.
+ *
+ * The ROT_CREATOR_AUTH_CODESIGN partition contains the first stage
+ * (ROM->ROM_EXT) secure boot public keys.
+ *
+ * @param otp_ctrl OTP controller instance.
+ * @return OK_STATUS if the ROT_CREATOR_AUTH_CODESIGN partition has been locked.
+ */
+OT_WARN_UNUSED_RESULT
+status_t manuf_individualize_device_rot_creator_auth_codesign(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Checks the ROT_CREATOR_AUTH_CODESIGN OTP partition end state.
+ *
+ * @param otp_ctrl OTP controller interface.
+ * @return OK_STATUS if the ROT_CREATOR_AUTH_CODESIGN partition is locked.
+ */
+status_t manuf_individualize_device_rot_creator_auth_codesign_check(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Configures and locks the ROT_CREATOR_AUTH_STATE OTP partition.
+ *
+ * The ROT_CREATOR_AUTH_STATE partition contains the first stage
+ * (ROM->ROM_EXT) secure boot public key validity states.
+ *
+ * @param otp_ctrl OTP controller instance.
+ * @return OK_STATUS if the ROT_CREATOR_AUTH_STATE partition has been locked.
+ */
+OT_WARN_UNUSED_RESULT
+status_t manuf_individualize_device_rot_creator_auth_state(
+    const dif_otp_ctrl_t *otp_ctrl);
+
+/**
+ * Checks the ROT_CREATOR_AUTH_STATE OTP partition end state.
+ *
+ * @param otp_ctrl OTP controller interface.
+ * @return OK_STATUS if the ROT_CREATOR_AUTH_STATE partition is locked.
+ */
+status_t manuf_individualize_device_rot_creator_auth_state_check(
+    const dif_otp_ctrl_t *otp_ctrl);
+
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_LIB_INDIVIDUALIZE_SW_CFG_H_
diff --git a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg_functest.c b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg_functest.c
index c5fe8f91e8771..b6d734ad17c83 100644
--- a/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg_functest.c
+++ b/sw/device/silicon_creator/manuf/lib/individualize_sw_cfg_functest.c
@@ -13,6 +13,7 @@
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/manuf/lib/flash_info_fields.h"
 #include "sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h"
 
@@ -101,6 +102,65 @@ static status_t check_otp_ast_cfg(void) {
   return OK_STATUS();
 }
 
+/**
+ * Check the *SW_CFG partition digests.
+ */
+static status_t check_otp_sw_cfg_digest(dif_otp_ctrl_partition_t partition) {
+  uint64_t expected_digest, actual_digest = 0;
+
+  // Get actual_digest.
+  CHECK_DIF_OK(dif_otp_ctrl_get_digest(&otp_ctrl, partition, &actual_digest));
+
+  // Compute expected_digest.
+  hmac_sha256_init();
+  const unsigned char *const kOtpSwCfgWindowBase =
+      (unsigned char *)TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR +
+      OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET;
+  switch (partition) {
+    case kDifOtpCtrlPartitionCreatorSwCfg: {
+      hmac_sha256_update(kOtpSwCfgWindowBase +
+                             OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET,
+                         OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+                             OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE -
+                             OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_SIZE);
+    } break;
+    case kDifOtpCtrlPartitionOwnerSwCfg: {
+      hmac_sha256_update(
+          kOtpSwCfgWindowBase + OTP_CTRL_PARAM_OWNER_SW_CFG_OFFSET,
+          OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+              OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE);
+    } break;
+    case kDifOtpCtrlPartitionRotCreatorAuthCodesign: {
+      hmac_sha256_update(
+          kOtpSwCfgWindowBase + OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_OFFSET,
+          OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE -
+              OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_DIGEST_SIZE);
+    } break;
+    case kDifOtpCtrlPartitionRotCreatorAuthState: {
+      hmac_sha256_update(
+          kOtpSwCfgWindowBase + OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_OFFSET,
+          OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE -
+              OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_DIGEST_SIZE);
+    } break;
+    default:
+      return INVALID_ARGUMENT();
+  }
+  hmac_sha256_process();
+  hmac_digest_t otp_measurement;
+  hmac_sha256_final(&otp_measurement);
+  expected_digest = otp_measurement.digest[1];
+  expected_digest = (expected_digest << 32) | otp_measurement.digest[0];
+
+  // Check actual digest matches the expect digest.
+  LOG_INFO("Actual Digest:   0x%08x%08x", (uint32_t)(actual_digest >> 32),
+           (uint32_t)actual_digest);
+  LOG_INFO("Expected Digest: 0x%08x%08x", (uint32_t)(expected_digest >> 32),
+           (uint32_t)expected_digest);
+  TRY_CHECK(actual_digest == expected_digest);
+
+  return OK_STATUS();
+}
+
 /**
  * Perform software reset.
  */
@@ -113,30 +173,81 @@ static void sw_reset(void) {
 bool test_main(void) {
   CHECK_STATUS_OK(peripheral_handles_init());
 
+  // Provision CREATOR_SW_CFG partition.
   if (!status_ok(manuf_individualize_device_creator_sw_cfg_check(&otp_ctrl))) {
     CHECK_STATUS_OK(init_flash_info_page0());
     CHECK_STATUS_OK(manuf_individualize_device_creator_sw_cfg(
         &otp_ctrl, &flash_ctrl_state));
-    CHECK_STATUS_OK(
-        manuf_individualize_device_flash_data_default_cfg(&otp_ctrl));
+    CHECK_STATUS_OK(manuf_individualize_device_field_cfg(
+        &otp_ctrl,
+        OTP_CTRL_PARAM_CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG_OFFSET));
+    CHECK_STATUS_OK(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_CREATOR_SW_CFG_MANUF_STATE_OFFSET));
+    CHECK_STATUS_OK(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET));
     CHECK_STATUS_OK(manuf_individualize_device_creator_sw_cfg_lock(&otp_ctrl));
-    CHECK_STATUS_OK(check_otp_ast_cfg());
     LOG_INFO("Provisioned and locked CREATOR_SW_CFG OTP partition.");
     // Halt the CPU here to enable host to perform POR and bootstrap again since
-    // flash scrambling enablement has changed.
+    // flash scrambling enablement has changed. Bootstrap resets the chip as
+    // well, which completes the locking of this partition.
     abort();
   }
+  bool perform_reset = false;
 
+  // Provision OWNER_SW_CFG partition.
   if (!status_ok(manuf_individualize_device_owner_sw_cfg_check(&otp_ctrl))) {
     CHECK_STATUS_OK(manuf_individualize_device_owner_sw_cfg(&otp_ctrl));
+    CHECK_STATUS_OK(manuf_individualize_device_field_cfg(
+        &otp_ctrl, OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_BOOTSTRAP_DIS_OFFSET));
+    CHECK_STATUS_OK(manuf_individualize_device_owner_sw_cfg_lock(&otp_ctrl));
     LOG_INFO("Provisioned and locked OWNER_SW_CFG OTP partition.");
-    // Perform SW reset to complete locking of the OWNER_SW_CFG partition.
+    perform_reset |= true;
+  }
+
+  // Provision ROT_CREATOR_AUTH_CODESIGN partition.
+  if (!status_ok(manuf_individualize_device_rot_creator_auth_codesign_check(
+          &otp_ctrl))) {
+    CHECK_STATUS_OK(
+        manuf_individualize_device_rot_creator_auth_codesign(&otp_ctrl));
+    LOG_INFO("Provisioned and locked ROT_CREATOR_AUTH_CODESIGN OTP partition.");
+    perform_reset |= true;
+  }
+
+  // Provision ROT_CREATOR_AUTH_STATE partition.
+  if (!status_ok(
+          manuf_individualize_device_rot_creator_auth_state_check(&otp_ctrl))) {
+    CHECK_STATUS_OK(
+        manuf_individualize_device_rot_creator_auth_state(&otp_ctrl));
+    LOG_INFO("Provisioned and locked ROT_CREATOR_AUTH_STATE OTP partition.");
+    perform_reset |= true;
+  }
+
+  if (perform_reset) {
+    // Perform SW reset to complete locking of the partitions.
     sw_reset();
   }
 
+  // Check all SW_CFG and ROT_CREATOR_AUTH partitions have been locked.
   if (status_ok(manuf_individualize_device_creator_sw_cfg_check(&otp_ctrl)) &&
-      status_ok(manuf_individualize_device_owner_sw_cfg_check(&otp_ctrl))) {
+      status_ok(manuf_individualize_device_owner_sw_cfg_check(&otp_ctrl)) &&
+      status_ok(manuf_individualize_device_rot_creator_auth_codesign_check(
+          &otp_ctrl)) &&
+      status_ok(
+          manuf_individualize_device_rot_creator_auth_state_check(&otp_ctrl))) {
+    // Check OTP AST and digest contents.
+    CHECK_STATUS_OK(check_otp_ast_cfg());
+    LOG_INFO("Checking CreatorSwCfg digest ...");
+    CHECK_STATUS_OK(check_otp_sw_cfg_digest(kDifOtpCtrlPartitionCreatorSwCfg));
+    LOG_INFO("Checking OwnerSwCfg digest ...");
+    CHECK_STATUS_OK(check_otp_sw_cfg_digest(kDifOtpCtrlPartitionOwnerSwCfg));
+    LOG_INFO("Checking RotCreatorAuthCodesign digest ...");
+    CHECK_STATUS_OK(
+        check_otp_sw_cfg_digest(kDifOtpCtrlPartitionRotCreatorAuthCodesign));
+    LOG_INFO("Checking RotCreatorAuthState digest ...");
+    CHECK_STATUS_OK(
+        check_otp_sw_cfg_digest(kDifOtpCtrlPartitionRotCreatorAuthState));
     return true;
   }
+
   return false;
 }
diff --git a/sw/device/silicon_creator/manuf/lib/personalize.c b/sw/device/silicon_creator/manuf/lib/personalize.c
index 24d0e754a8d2d..cbc8195e1b233 100644
--- a/sw/device/silicon_creator/manuf/lib/personalize.c
+++ b/sw/device/silicon_creator/manuf/lib/personalize.c
@@ -7,10 +7,6 @@
 #include "sw/device/lib/base/multibits.h"
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/aes.h"
-#include "sw/device/lib/crypto/include/datatypes.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
@@ -34,108 +30,6 @@ static_assert(OTP_CTRL_PARAM_RMA_TOKEN_SIZE == 16,
               "padding / AES mode. Additionally, update ujson struct "
               "definition for the wrapped RMA unlock token.");
 
-// ECC curve to use with ECDH keygen.
-static const otcrypto_ecc_curve_t kCurveP256 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP256,
-    .domain_parameter = NULL,
-};
-
-// ECDH private key configuration.
-static const otcrypto_key_config_t kEcdhPrivateKeyConfig = {
-    .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdh,
-    .key_length = kP256ScalarBytes,
-    .hw_backed = kHardenedBoolFalse,
-    .security_level = kOtcryptoKeySecurityLevelHigh,
-};
-
-// ECDH shared secret configuration.
-static const otcrypto_key_config_t kRmaUnlockTokenAesKeyConfig = {
-    .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeAesEcb,
-    .key_length = kP256CoordBytes,
-    .hw_backed = kHardenedBoolFalse,
-    .security_level = kOtcryptoKeySecurityLevelHigh,
-};
-
-/**
- * Generate ECDH keypair for use in generating an ephemeral AES encryption key
- * for exporting the RMA unlock token.
- *
- * @param host_pk Host ECC public key used to derive shared AES key.
- * @param[out] aes_key RMA unlock token AES encryption key buffer.
- * @param[out] wrapped_token Wrapped RMA unlock token struct that stores the
- *                           ECDH device public key and encrypted RMA token.
- * @return OK_STATUS on success.
- */
-OT_WARN_UNUSED_RESULT static status_t gen_rma_unlock_token_aes_key(
-    ecc_p256_public_key_t *host_pk, otcrypto_blinded_key_t *aes_key,
-    wrapped_rma_unlock_token_t *wrapped_token) {
-  // Host ECC public key.
-  // TODO: update the .checksum fields once cryptolib uses this field.
-  otcrypto_unblinded_key_t pk_host = {
-      .key_mode = kOtcryptoKeyModeEcdh,
-      .key_length = sizeof(*host_pk),
-      .key = (uint32_t *)host_pk,
-      .checksum = 0,
-  };
-
-  // Device ECC private key.
-  uint32_t sk_device_keyblob[keyblob_num_words(kEcdhPrivateKeyConfig)];
-  otcrypto_blinded_key_t sk_device = {
-      .config = kEcdhPrivateKeyConfig,
-      .keyblob_length = sizeof(sk_device_keyblob),
-      .keyblob = sk_device_keyblob,
-      .checksum = 0,
-  };
-
-  // Device ECC public key.
-  otcrypto_unblinded_key_t pk_device = {
-      .key_mode = kOtcryptoKeyModeEcdh,
-      .key_length = sizeof(wrapped_token->device_pk),
-      .key = (uint32_t *)&wrapped_token->device_pk,
-      .checksum = 0,
-  };
-
-  TRY(otcrypto_ecdh_keygen(&kCurveP256, &sk_device, &pk_device));
-  return otcrypto_ecdh(&sk_device, &pk_host, &kCurveP256, aes_key);
-}
-
-OT_WARN_UNUSED_RESULT
-static status_t encrypt_rma_unlock_token(
-    otcrypto_blinded_key_t *aes_key,
-    wrapped_rma_unlock_token_t *wrapped_token) {
-  // Construct IV, which since we are using ECB mode, is empty.
-  otcrypto_word32_buf_t iv = {
-      .data = NULL,
-      .len = 0,
-  };
-
-  // Construct plaintext buffer.
-  otcrypto_const_byte_buf_t plaintext = {
-      .data = (const unsigned char *)wrapped_token->data,
-      .len = kRmaUnlockTokenSizeInBytes,
-  };
-
-  // Construct ciphertext buffer. (No need for padding since RMA unlock token
-  // is 128-bits already.)
-  uint32_t ciphertext_data[kRmaUnlockTokenSizeInBytes];
-  otcrypto_byte_buf_t ciphertext = {
-      .data = (unsigned char *)ciphertext_data,
-      .len = kRmaUnlockTokenSizeInBytes,
-  };
-
-  // Run encryption and check the result.
-  TRY(otcrypto_aes(aes_key, iv, kOtcryptoAesModeEcb,
-                   kOtcryptoAesOperationEncrypt, plaintext,
-                   kOtcryptoAesPaddingNull, ciphertext));
-
-  // Copy encrypted RMA unlock token to the output buffer.
-  memcpy(wrapped_token->data, ciphertext.data, kRmaUnlockTokenSizeInBytes);
-
-  return OK_STATUS();
-}
-
 /**
  * Performs sanity check of buffers holding a masked secret.
  *
@@ -216,7 +110,7 @@ static status_t flash_keymgr_secret_seed_write(
   TRY(entropy_csrng_instantiate(/*disable_trng_input=*/kHardenedBoolFalse,
                                 /*seed_material=*/NULL));
 
-  uint32_t seed[kFlashInfoKeySeedSizeIn32BitWords];
+  uint32_t seed[kFlashInfoFieldKeySeedSizeIn32BitWords];
   TRY(entropy_csrng_generate(/*seed_material=*/NULL, seed, len,
                              /*fips_check*/ kHardenedBoolTrue));
   TRY(entropy_csrng_uninstantiate());
@@ -229,7 +123,7 @@ static status_t flash_keymgr_secret_seed_write(
       flash_state, address, field.partition, seed,
       kDifFlashCtrlPartitionTypeInfo, len));
 
-  uint32_t seed_result[kFlashInfoKeySeedSizeIn32BitWords];
+  uint32_t seed_result[kFlashInfoFieldKeySeedSizeIn32BitWords];
   TRY(flash_ctrl_testutils_read(flash_state, address, field.partition,
                                 seed_result, kDifFlashCtrlPartitionTypeInfo,
                                 len,
@@ -252,27 +146,16 @@ static status_t flash_keymgr_secret_seed_write(
  * lifecyle state.
  *
  * @param otp_ctrl OTP controller instance.
- * @param[out] rma_unlock_token RMA unlock token to export export from the chip.
+ * @param rma_unlock_token_hash Hash of the RMA unlock token to store on chip.
  * @return OK_STATUS on success.
  */
 OT_WARN_UNUSED_RESULT
 static status_t otp_partition_secret2_configure(
     const dif_otp_ctrl_t *otp_ctrl,
-    wrapped_rma_unlock_token_t *rma_unlock_token) {
+    const lc_token_hash_t *rma_unlock_token_hash) {
   TRY(entropy_csrng_instantiate(/*disable_trng_input=*/kHardenedBoolFalse,
                                 /*seed_material=*/NULL));
 
-  // Generate and hash RMA unlock token.
-  TRY(entropy_csrng_generate(/*seed_material=*/NULL, rma_unlock_token->data,
-                             kRmaUnlockTokenSizeIn32BitWords,
-                             /*fips_check*/ kHardenedBoolTrue));
-  TRY(entropy_csrng_reseed(/*disable_trng_input=*/kHardenedBoolFalse,
-                           /*seed_material=*/NULL));
-  uint64_t hashed_rma_unlock_token[kRmaUnlockTokenSizeIn64BitWords];
-  TRY(manuf_util_hash_lc_transition_token(rma_unlock_token->data,
-                                          kRmaUnlockTokenSizeInBytes,
-                                          hashed_rma_unlock_token));
-
   // Generate RootKey shares.
   uint64_t share0[kRootKeyShareSizeIn64BitWords];
   TRY(entropy_csrng_generate(/*seed_material=*/NULL, (uint32_t *)share0,
@@ -292,7 +175,7 @@ static status_t otp_partition_secret2_configure(
   // Provision RMA unlock token and RootKey shares into OTP.
   TRY(otp_ctrl_testutils_dai_write64(
       otp_ctrl, kDifOtpCtrlPartitionSecret2, kRmaUnlockTokenOffset,
-      hashed_rma_unlock_token, kRmaUnlockTokenSizeIn64BitWords));
+      rma_unlock_token_hash->hash, kRmaUnlockTokenSizeIn64BitWords));
   TRY(otp_ctrl_testutils_dai_write64(otp_ctrl, kDifOtpCtrlPartitionSecret2,
                                      kRootKeyOffsetShare0, share0,
                                      kRootKeyShareSizeIn64BitWords));
@@ -308,8 +191,8 @@ static status_t otp_partition_secret2_configure(
 
 status_t manuf_personalize_device_secrets(
     dif_flash_ctrl_state_t *flash_state, const dif_lc_ctrl_t *lc_ctrl,
-    const dif_otp_ctrl_t *otp_ctrl, ecc_p256_public_key_t *host_ecc_pk,
-    wrapped_rma_unlock_token_t *wrapped_rma_token) {
+    const dif_otp_ctrl_t *otp_ctrl,
+    const lc_token_hash_t *rma_unlock_token_hash) {
   // Check life cycle in either PROD, PROD_END, or DEV.
   TRY(lc_ctrl_testutils_operational_state_check(lc_ctrl));
 
@@ -338,32 +221,18 @@ status_t manuf_personalize_device_secrets(
   // the entropy_src health checks in FIPS mode.
   TRY(entropy_complex_init());
 
-  // Generate AES encryption key and IV for exporting the RMA unlock token.
-  // AES key (i.e., ECDH shared secret).
-  uint32_t aes_key_buf[keyblob_num_words(kRmaUnlockTokenAesKeyConfig)];
-  otcrypto_blinded_key_t token_aes_key = {
-      .config = kRmaUnlockTokenAesKeyConfig,
-      .keyblob_length = sizeof(aes_key_buf),
-      .keyblob = aes_key_buf,
-  };
-  TRY(gen_rma_unlock_token_aes_key(host_ecc_pk, &token_aes_key,
-                                   wrapped_rma_token));
-
   // Provision secret Creator / Owner key seeds in flash.
   // Provision CreatorSeed into target flash info page.
   TRY(flash_keymgr_secret_seed_write(flash_state, kFlashInfoFieldCreatorSeed,
-                                     kFlashInfoKeySeedSizeIn32BitWords));
+                                     kFlashInfoFieldKeySeedSizeIn32BitWords));
   // Provision preliminary OwnerSeed into target flash info page (with
   // expectation that SiliconOwner will rotate this value during ownership
   // transfer).
   TRY(flash_keymgr_secret_seed_write(flash_state, kFlashInfoFieldOwnerSeed,
-                                     kFlashInfoKeySeedSizeIn32BitWords));
+                                     kFlashInfoFieldKeySeedSizeIn32BitWords));
 
   // Provision the OTP SECRET2 partition.
-  TRY(otp_partition_secret2_configure(otp_ctrl, wrapped_rma_token));
-
-  // Encrypt the RMA unlock token with AES.
-  TRY(encrypt_rma_unlock_token(&token_aes_key, wrapped_rma_token));
+  TRY(otp_partition_secret2_configure(otp_ctrl, rma_unlock_token_hash));
 
   return OK_STATUS();
 }
diff --git a/sw/device/silicon_creator/manuf/lib/personalize.h b/sw/device/silicon_creator/manuf/lib/personalize.h
index e21c1498cf063..21e9bc2dded5b 100644
--- a/sw/device/silicon_creator/manuf/lib/personalize.h
+++ b/sw/device/silicon_creator/manuf/lib/personalize.h
@@ -6,8 +6,6 @@
 #define OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_LIB_PERSONALIZE_H_
 
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
-#include "sw/device/lib/crypto/include/ecc.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
 #include "sw/device/lib/dif/dif_lc_ctrl.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
@@ -70,18 +68,13 @@ status_t manuf_personalize_device_secret1_check(const dif_otp_ctrl_t *otp_ctrl);
  * @param flash_state Flash controller instance.
  * @param lc_ctrl Lifecycle controller instance.
  * @param otp_ctrl OTP controller instance.
- * @param host_ecc_pk UJSON struct containing host ECC public key (for RMA token
- *                    encryption key generation using ECDH).
- * @param[out] wrapped_rma_token UJSON struct of containing the wrapped
- *                               (encrypted) RMA unlock token, and the device
- *                               ECC public key used to generate the AES
- *                               wrapping key.
+ * @param rma_unlock_token_hash Pointer to the hashed RMA unlock token.
  * @return OK_STATUS on success.
  */
 status_t manuf_personalize_device_secrets(
     dif_flash_ctrl_state_t *flash_state, const dif_lc_ctrl_t *lc_ctrl,
-    const dif_otp_ctrl_t *otp_ctrl, ecc_p256_public_key_t *host_ecc_pk,
-    wrapped_rma_unlock_token_t *wrapped_rma_token);
+    const dif_otp_ctrl_t *otp_ctrl,
+    const lc_token_hash_t *rma_unlock_token_hash);
 
 /**
  * Personalize device with an asymmetric keygen seed.
diff --git a/sw/device/silicon_creator/manuf/lib/personalize_functest.c b/sw/device/silicon_creator/manuf/lib/personalize_functest.c
index 74c8fb3a9c136..5074e5ed56edf 100644
--- a/sw/device/silicon_creator/manuf/lib/personalize_functest.c
+++ b/sw/device/silicon_creator/manuf/lib/personalize_functest.c
@@ -57,12 +57,6 @@ static void sw_reset(void) {
   wait_for_interrupt();
 }
 
-status_t export_rma_token_over_console(
-    ujson_t *uj, wrapped_rma_unlock_token_t *wrapped_rma_token) {
-  RESP_OK(ujson_serialize_wrapped_rma_unlock_token_t, uj, wrapped_rma_token);
-  return OK_STATUS();
-}
-
 static status_t check_array_non_zero(uint32_t *array, size_t num_words) {
   for (size_t i = 0; i < num_words; ++i) {
     if (array[i] == 0) {
@@ -90,14 +84,6 @@ bool test_main(void) {
     abort();
   }
 
-  // Restore the export data stored in the retention SRAM. We store the data to
-  // be exported from the device (e.g., the encrypted RMA unlock token) in the
-  // retention SRAM (namely in the creator partition) as it is faster than
-  // storing it in flash, and still persists across a SW initiated reset.
-  retention_sram_t *ret_sram_data = retention_sram_get();
-  wrapped_rma_unlock_token_t *wrapped_rma_token =
-      (wrapped_rma_unlock_token_t *)&ret_sram_data->creator.reserved;
-
   dif_rstmgr_reset_info_bitfield_t info = rstmgr_testutils_reason_get();
   if (info & kDifRstmgrResetInfoPor) {
     // Provision the OTP SECRET1 partition.
@@ -114,17 +100,17 @@ bool test_main(void) {
 
     // Provision the OTP SECRET2 partition and flash info pages.
     if (!status_ok(manuf_personalize_device_secrets_check(&otp_ctrl))) {
-      // Wait for host ECC pubkey, used to generate a shared AES key to export
-      // the RMA unlock token, to arrive over the console.
-      LOG_INFO("Ready to receive host ECC pubkey ...");
-      ecc_p256_public_key_t host_ecc_pk;
-      CHECK_STATUS_OK(UJSON_WITH_CRC(ujson_deserialize_ecc_p256_public_key_t,
-                                     &uj, &host_ecc_pk));
+      lc_token_hash_t token_hash;
+      // Wait for host the host generated RMA unlock token hash to arrive over
+      // the console.
+      LOG_INFO("Waiting For RMA Unlock Token Hash ...");
+
+      CHECK_STATUS_OK(
+          UJSON_WITH_CRC(ujson_deserialize_lc_token_hash_t, &uj, &token_hash));
 
       // Perform OTP and flash info writes.
-      LOG_INFO("Provisioning OTP SECRET2 and keymgr flash info pages ...");
-      CHECK_STATUS_OK(manuf_personalize_device_secrets(
-          &flash_state, &lc_ctrl, &otp_ctrl, &host_ecc_pk, wrapped_rma_token));
+      CHECK_STATUS_OK(manuf_personalize_device_secrets(&flash_state, &lc_ctrl,
+                                                       &otp_ctrl, &token_hash));
       LOG_INFO("Provisioning flash info asymmetric keygen seeds ...");
       CHECK_STATUS_OK(manuf_personalize_flash_asymm_key_seed(
           &flash_state, kFlashInfoFieldUdsAttestationKeySeed,
@@ -155,16 +141,13 @@ bool test_main(void) {
           cdi_1_attestation_key_seed, kAttestationSeedWords));
       CHECK_STATUS_OK(check_array_non_zero(cdi_1_attestation_key_seed,
                                            kAttestationSeedWords));
+      LOG_INFO(
+          "Finished provisioning OTP SECRET2 and keymgr flash info pages ...");
 
       // Reset the chip to activate the OTP partitions and flash pages.
       sw_reset();
     }
   } else if (info == kDifRstmgrResetInfoSw) {
-    // Send the RMA unlock token data (stored in the retention SRAM) over the
-    // console using ujson framework.
-    LOG_INFO("Exporting RMA unlock token ...");
-    CHECK_STATUS_OK(export_rma_token_over_console(&uj, wrapped_rma_token));
-
     // Wait in a loop so that OpenOCD can connect to the TAP without the ROM
     // resetting the chip.
     LOG_INFO("Spinning for host to connect over JTAG.");
diff --git a/sw/device/silicon_creator/manuf/lib/sram_program.ld b/sw/device/silicon_creator/manuf/lib/sram_program.ld
index 250938cd16ce4..14960c5c831b7 100644
--- a/sw/device/silicon_creator/manuf/lib/sram_program.ld
+++ b/sw/device/silicon_creator/manuf/lib/sram_program.ld
@@ -28,6 +28,10 @@ _dv_log_offset = 0x10000;
 
 ENTRY(sram_start);
 
+PHDRS {
+  sram_segment PT_LOAD;
+}
+
 /* NOTE This linker script assumes non-page-aligned segments because we skip
  * the first _static_critical_size bytes of the SRAM and we do not want the
  * ELF segments to contain the headers as this would overwrite the contents of
@@ -45,28 +49,28 @@ SECTIONS {
      * the RAM to the entry point for VMEM files. */
     KEEP(*(.sram_start))
     . = ALIGN(256);
-  } > ram_main
+  } > ram_main : sram_segment
 
   .vectors : ALIGN (256){
     _text_start = .;
     KEEP(*(.vectors))
     . = ALIGN(4);
-  } > ram_main
+  } > ram_main : sram_segment
 
   .text : ALIGN(4) {
-    KEEP(*(.crt))
-    KEEP(*(.text))
-    KEEP(*(.text.*))
+    *(.crt)
+    *(.text)
+    *(.text.*)
     . = ALIGN(4);
     _text_end = .;
-  } > ram_main
+  } > ram_main : sram_segment
 
   .rodata : ALIGN(4) {
-    KEEP(*(.rodata))
-    KEEP(*(.rodata.*))
+    *(.rodata)
+    *(.rodata.*)
     . = ALIGN(4);
     __rodata_end = .;
-  } > ram_main
+  } > ram_main : sram_segment
 
   .data : ALIGN(4) {
     /* This will get loaded into `gp`, and the linker will use that register for
@@ -79,17 +83,17 @@ SECTIONS {
      * difference to distinguish data from small data. */
     __global_pointer$ = . + 2048;
 
-    KEEP(*(.data))
-    KEEP(*(.data.*))
+    *(.data)
+    *(.data.*)
 
     /* Place all small data sections together. */
-    KEEP(*(.srodata))
-    KEEP(*(.srodata.*))
-    KEEP(*(.sdata))
-    KEEP(*(.sdata.*))
+    *(.srodata)
+    *(.srodata.*)
+    *(.sdata)
+    *(.sdata.*)
     . = ALIGN(4);
     _crc_end = .;
-  } > ram_main
+  } > ram_main : sram_segment
 
   /**
    * Standard BSS section. This will be zeroed at runtime by the CRT.
@@ -109,7 +113,12 @@ SECTIONS {
     /* Ensure section end is word-aligned. */
     . = ALIGN(4);
     _bss_end = .;
-  } > ram_main
+
+    ASSERT(
+      ABSOLUTE(_stack_start) >= ABSOLUTE(_bss_end),
+      "bss section overflowed to stack region");
+
+  } > ram_main : sram_segment
 
   INCLUDE sw/device/info_sections.ld
 }
diff --git a/sw/device/silicon_creator/manuf/lib/sram_start.S b/sw/device/silicon_creator/manuf/lib/sram_start.S
index e696026a42516..e9ef1f6dff850 100644
--- a/sw/device/silicon_creator/manuf/lib/sram_start.S
+++ b/sw/device/silicon_creator/manuf/lib/sram_start.S
@@ -6,6 +6,7 @@
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
 #include "sw/device/lib/base/multibits_asm.h"
+#include "sw/device/lib/testing/test_framework/ottf_macros.h"
 
 #include "csrng_regs.h"  // Generated.
 #include "edn_regs.h"  // Generated.
@@ -123,7 +124,11 @@ sram_start:
 
   // Save CRC32
   mv   sp, a0
+  // Skip the CRC check if requested.
+  li   t3, SRAM_MAGIC_SP_CRC_SKIPPED
+  beq  t3, sp, .L_crc_match
   // Verify CRC
+  li   t3, SRAM_MAGIC_SP_EXECUTION_DONE
   la   a0, _crc_start
   la   a1, _crc_end
   call compute_crc32
@@ -133,7 +138,10 @@ sram_start:
 
 .L_crc_match:
   // Set up the stack.
+  .option push
+  .option norelax
   la  sp, _stack_end
+  .option pop
 
   /**
    * Setup the interrupt/exception handlers.
@@ -144,6 +152,11 @@ sram_start:
   la   t0, (sram_interrupt_vector + 1)
   csrw mtvec, t0
 
+  // t3 will contain either the CRC_SKIPPED or CRC_ERROR magic values. We push
+  // it to the stack so we can check it when the SRAM program has executed.
+  addi sp, sp, -OTTF_WORD_SIZE
+  sw   t3, 0(sp)
+
   // Zero out the `.bss` segment.
   la   a0, _bss_start
   la   a1, _bss_end
@@ -182,8 +195,10 @@ sram_start:
   // Jump into the C program entry point.
   call test_main
 
-  // Notify the host that we are done.
-  li  sp, SRAM_MAGIC_SP_EXECUTION_DONE
+  // Notify the host that we are done by loading a magic value in sp.
+  lw   t3, 0(sp)
+  addi sp, sp, OTTF_WORD_SIZE
+  mv   sp, t3
   ebreak
 
   // Set function size to allow disassembly.
diff --git a/sw/device/silicon_creator/manuf/lib/sram_start.h b/sw/device/silicon_creator/manuf/lib/sram_start.h
index 53f13fedd0ea2..e4fc4f7e7e304 100644
--- a/sw/device/silicon_creator/manuf/lib/sram_start.h
+++ b/sw/device/silicon_creator/manuf/lib/sram_start.h
@@ -11,5 +11,6 @@
  */
 #define SRAM_MAGIC_SP_EXECUTION_DONE 0xcafebabe
 #define SRAM_MAGIC_SP_CRC_ERROR 0xbaddcafe
+#define SRAM_MAGIC_SP_CRC_SKIPPED 0xbeefcafe
 
 #endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_MANUF_LIB_SRAM_START_H_
diff --git a/sw/device/silicon_creator/manuf/lib/util.c b/sw/device/silicon_creator/manuf/lib/util.c
index 2dcaea539162f..1ec4cb5c68d62 100644
--- a/sw/device/silicon_creator/manuf/lib/util.c
+++ b/sw/device/silicon_creator/manuf/lib/util.c
@@ -8,7 +8,8 @@
 
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/sha2.h"
+#include "sw/device/lib/crypto/include/sha3.h"
 #include "sw/device/lib/dif/dif_otp_ctrl.h"
 #include "sw/device/lib/testing/otp_ctrl_testutils.h"
 
@@ -19,6 +20,10 @@ static_assert(
     OTP_CTRL_PARAM_VENDOR_TEST_SIZE % sizeof(uint32_t) == 0,
     "OTP Vendor Test partition should be an integer multiple of 32-bit words.");
 
+enum {
+  kSha256DigestWords = 256 / 32,
+};
+
 status_t manuf_util_hash_lc_transition_token(const uint32_t *raw_token,
                                              size_t token_size_bytes,
                                              uint64_t *hashed_token) {
@@ -49,11 +54,10 @@ status_t manuf_util_hash_lc_transition_token(const uint32_t *raw_token,
   otcrypto_hash_digest_t output = {
       .data = token_data,
       .len = token_num_words,
-      .mode = kOtcryptoHashXofModeCshake128,
   };
 
-  TRY(otcrypto_xof_cshake(input, function_name_string, customization_string,
-                          output));
+  TRY(otcrypto_cshake128(input, function_name_string, customization_string,
+                         &output));
   memcpy(hashed_token, token_data, sizeof(token_data));
 
   return OK_STATUS();
@@ -68,7 +72,6 @@ status_t manuf_util_hash_otp_partition(const dif_otp_ctrl_t *otp_ctrl,
   otcrypto_hash_digest_t digest = {
       .data = output.data,
       .len = output.len,
-      .mode = kOtcryptoHashModeSha256,
   };
 
   switch (partition) {
@@ -77,7 +80,6 @@ status_t manuf_util_hash_otp_partition(const dif_otp_ctrl_t *otp_ctrl,
           vendor_test_32bit_array[(OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
                                    OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
                                   sizeof(uint32_t)];
-
       TRY(otp_ctrl_testutils_dai_read32_array(
           otp_ctrl, kDifOtpCtrlPartitionVendorTest, 0, vendor_test_32bit_array,
           (OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
@@ -88,17 +90,29 @@ status_t manuf_util_hash_otp_partition(const dif_otp_ctrl_t *otp_ctrl,
           .len = OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
                  OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE,
       };
-      TRY(otcrypto_hash(input, digest));
+      TRY(otcrypto_sha2_256(input, &digest));
     } break;
     case kDifOtpCtrlPartitionCreatorSwCfg: {
+      // Note: we purposely exclude the AST configuration data field of this
+      // partition from the digest calculation because this could be different
+      // per chip and we do not want to it to be part of the foundation for the
+      // UDS keys if the OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN switch is set to
+      // enabled. If this field is intended to be set for a given SKU, during
+      // personalization we need to be able to inject the expected OTP SW
+      // partition measurement into the manifest of the perso image so that the
+      // same CreatorRootKey keymgr attestation binding value computed in the
+      // field by the ROM is the same as the one used during perso when all the
+      // CreatorSwCfg fields have not yet been set.
       otcrypto_const_byte_buf_t input = {
-          .data = (unsigned char *)(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR +
-                                    OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET +
-                                    OTP_CTRL_PARAM_CREATOR_SW_CFG_OFFSET),
+          .data = (unsigned char
+                       *)(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR +
+                          OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET +
+                          OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET),
           .len = OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
-                 OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE,
+                 OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE -
+                 OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_SIZE,
       };
-      TRY(otcrypto_hash(input, digest));
+      TRY(otcrypto_sha2_256(input, &digest));
     } break;
     case kDifOtpCtrlPartitionOwnerSwCfg: {
       otcrypto_const_byte_buf_t input = {
@@ -108,7 +122,43 @@ status_t manuf_util_hash_otp_partition(const dif_otp_ctrl_t *otp_ctrl,
           .len = OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
                  OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE,
       };
-      TRY(otcrypto_hash(input, digest));
+      TRY(otcrypto_sha2_256(input, &digest));
+    } break;
+    case kDifOtpCtrlPartitionRotCreatorAuthCodesign: {
+      uint32_t rot_creator_auth_codesign_32bit_array
+          [(OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE -
+            OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_DIGEST_SIZE) /
+           sizeof(uint32_t)];
+      TRY(otp_ctrl_testutils_dai_read32_array(
+          otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthCodesign, 0,
+          rot_creator_auth_codesign_32bit_array,
+          (OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE -
+           OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_DIGEST_SIZE) /
+              sizeof(uint32_t)));
+      otcrypto_const_byte_buf_t input = {
+          .data = (unsigned char *)rot_creator_auth_codesign_32bit_array,
+          .len = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_SIZE -
+                 OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_DIGEST_SIZE,
+      };
+      TRY(otcrypto_sha2_256(input, &digest));
+    } break;
+    case kDifOtpCtrlPartitionRotCreatorAuthState: {
+      uint32_t rot_creator_auth_state_32bit_array
+          [(OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE -
+            OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_DIGEST_SIZE) /
+           sizeof(uint32_t)];
+      TRY(otp_ctrl_testutils_dai_read32_array(
+          otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthState, 0,
+          rot_creator_auth_state_32bit_array,
+          (OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE -
+           OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_DIGEST_SIZE) /
+              sizeof(uint32_t)));
+      otcrypto_const_byte_buf_t input = {
+          .data = (unsigned char *)rot_creator_auth_state_32bit_array,
+          .len = OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_SIZE -
+                 OTP_CTRL_PARAM_ROT_CREATOR_AUTH_STATE_DIGEST_SIZE,
+      };
+      TRY(otcrypto_sha2_256(input, &digest));
     } break;
     default:
       return INVALID_ARGUMENT();
diff --git a/sw/device/silicon_creator/manuf/tests/BUILD b/sw/device/silicon_creator/manuf/tests/BUILD
index 865a65858f74a..30ee4b08c8a38 100644
--- a/sw/device/silicon_creator/manuf/tests/BUILD
+++ b/sw/device/silicon_creator/manuf/tests/BUILD
@@ -4,15 +4,13 @@
 
 load("//rules:const.bzl", "CONST", "get_lc_items")
 load("//rules:lc.bzl", "lc_raw_unlock_token")
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_SPX_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_SPX_KEY_STRUCTS")
 load(
     "//rules:otp.bzl",
     "OTP_SIGVERIFY_FAKE_KEYS",
     "otp_image",
 )
+load("//rules/opentitan:cc.bzl", "opentitan_binary_assemble")
 load(
     "//rules/opentitan:defs.bzl",
     "ecdsa_key_for_lc_state",
@@ -22,6 +20,10 @@ load(
     "silicon_params",
     "spx_key_for_lc_state",
 )
+load(
+    "//sw/device/silicon_creator/rom/e2e:defs.bzl",
+    "SLOTS",
+)
 
 package(default_visibility = ["//visibility:public"])
 
@@ -76,6 +78,8 @@ _MANUF_TEST_LOCKED_KEY = None
         srcs = ["empty_functest.c"],
         ecdsa_key = _MANUF_TEST_LOCKED_KEY if (lc_state, lc_val) in _TEST_LOCKED_LC_ITEMS else ecdsa_key_for_lc_state(ECDSA_SPX_KEY_STRUCTS, lc_val),
         exec_env = {
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
@@ -116,6 +120,7 @@ opentitan_test(
     name = "manuf_cp_unlock_raw_functest",
     srcs = ["//sw/device/silicon_creator/rom/e2e:empty_test.c"],
     exec_env = {
+        "//hw/top_earlgrey:fpga_cw340_sival": None,
         "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
     },
     fpga = fpga_params(
@@ -157,7 +162,6 @@ opentitan_test(
 )
 
 # This is the same as rom_with_fake_keys_otp_test_unlocked* but with ROM execution disabled.
-# TODO(#21204): Enable configuration of ROT AUTH partitions in CP stage.
 [
     otp_image(
         name = "otp_img_rom_exec_disabled_test_unlocked{}".format(i),
@@ -176,6 +180,7 @@ opentitan_test(
         name = "manuf_cp_yield_test_functest_{}".format(lc_state.lower()),
         srcs = ["//sw/device/silicon_creator/rom/e2e:empty_test.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
@@ -216,6 +221,28 @@ cc_library(
     ],
 )
 
+# Execution from SRAM is always enabled by default in TEST_UNLOCKED* LC states
+# unless HW_CFG1 OTP partition has the EN_SRAM_IFETCH field set to True. In that
+# case, the EXEC CSR in the sram_ctrl controls SRAM execution enablement.
+# Therefore, we want to test with the HW_CFG1 partition programmed with
+# EN_SRAM_IFETCH set to True.
+[
+    otp_image(
+        name = "otp_img_sram_exec_en_test_unlocked{}".format(i),
+        src = "//hw/ip/otp_ctrl/data:otp_json_test_unlocked{}".format(i),
+        overlays = [
+            "//hw/ip/otp_ctrl/data:otp_json_fixed_secret0",
+            "//hw/ip/otp_ctrl/data:otp_json_creator_sw_cfg",
+            "//hw/ip/otp_ctrl/data:otp_json_owner_sw_cfg",
+            "//hw/ip/otp_ctrl/data:otp_json_alert_digest_cfg",
+            "//hw/ip/otp_ctrl/data:otp_json_hw_cfg1",
+            "//hw/ip/otp_ctrl/data:otp_json_exec_disabled",
+        ],
+        visibility = ["//visibility:private"],
+    )
+    for i in range(0, 8)
+]
+
 # We are using a bitstream with ROM execution disabled so the contents of flash
 # does not matter but opentitan_test() is unhappy if we don't provide one.
 # Additionally, ROM execution is disabled in the OTP image we use so we do not
@@ -225,12 +252,13 @@ cc_library(
         name = "manuf_sram_program_crc_{}_functest".format(lc_state.lower()),
         srcs = ["sram_empty_functest.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
         fpga = fpga_params(
             needs_jtag = True,
-            otp = ":otp_img_rom_exec_disabled_{}".format(lc_state.lower()),
+            otp = ":otp_img_sram_exec_en_{}".format(lc_state.lower()),
             tags = ["manuf"],
             test_cmd = "--elf={firmware}",
             test_harness = "//sw/host/tests/manuf/manuf_sram_program_crc_check",
@@ -296,7 +324,7 @@ opentitan_binary(
         "//sw/device/lib/testing/test_framework:ottf_test_config",
         "//sw/device/lib/testing/test_framework:status",
         "//sw/device/silicon_creator/manuf/lib:flash_info_fields",
-        "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_earlgrey_sku_sival",
+        "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_sv00",
         "//sw/device/silicon_creator/manuf/lib:sram_start",
     ],
 )
@@ -314,6 +342,7 @@ opentitan_binary(
             CONST.LCV.PROD,
         ),
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
@@ -397,6 +426,7 @@ opentitan_binary(
         name = "manuf_cp_ast_test_execution_{}_functest".format(lc_state.lower()),
         srcs = ["idle_functest.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
@@ -434,6 +464,7 @@ opentitan_test(
     name = "manuf_cp_test_lock_functest",
     srcs = ["//sw/device/silicon_creator/rom/e2e:empty_test.c"],
     exec_env = {
+        "//hw/top_earlgrey:fpga_cw340_sival": None,
         "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
     },
     fpga = fpga_params(
@@ -479,3 +510,84 @@ opentitan_test(
         "//sw/device/silicon_creator/lib/sigverify:spx_verify",
     ],
 )
+
+[
+    opentitan_binary(
+        name = "empty_test_{}".format(slot),
+        testonly = True,
+        srcs = ["empty_functest.c"],
+        exec_env = {
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_{}".format(slot),
+        deps = [
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+        ],
+    )
+    for slot in SLOTS.keys()
+]
+
+opentitan_binary_assemble(
+    name = "multislot_empty_test",
+    testonly = True,
+    bins = {
+        ":empty_test_a": SLOTS["a"],
+        ":empty_test_b": SLOTS["b"],
+    },
+    exec_env = [
+        "//hw/top_earlgrey:sim_dv",
+        "//hw/top_earlgrey:silicon_creator",
+    ],
+)
+
+# The below alias is needed to run the multislot_empty_test in DV.
+alias(
+    name = "multislot_empty_test_sim_dv",
+    actual = "multislot_empty_test",
+)
+
+opentitan_test(
+    name = "ujson_msg_size_functest",
+    srcs = ["ujson_msg_size_functest.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw340_sival": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
+    },
+    fpga = fpga_params(
+        tags = ["manuf"],
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/manuf/manuf_ujson_msg_size",
+    ),
+    deps = [
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/json:provisioning_data",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+    ],
+)
+
+opentitan_test(
+    name = "ujson_msg_padding_functest",
+    srcs = ["ujson_msg_padding_functest.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw340_sival": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
+    },
+    fpga = fpga_params(
+        tags = ["manuf"],
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/manuf/manuf_ujson_msg_padding",
+    ),
+    deps = [
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/json:provisioning_data",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+    ],
+)
diff --git a/sw/device/silicon_creator/manuf/tests/flash_device_info_flash_wr_functest.c b/sw/device/silicon_creator/manuf/tests/flash_device_info_flash_wr_functest.c
index 33f1726ec1097..e7411b1de2f08 100644
--- a/sw/device/silicon_creator/manuf/tests/flash_device_info_flash_wr_functest.c
+++ b/sw/device/silicon_creator/manuf/tests/flash_device_info_flash_wr_functest.c
@@ -47,9 +47,8 @@ bool test_main(void) {
     case kDifLcCtrlStateProdEnd:
       LOG_INFO("Reading the isolated flash partition.");
       uint32_t byte_address = 0;
-      uint32_t
-          actual_wafer_auth_secret[kFlashInfoWaferAuthSecretSizeIn32BitWords] =
-              {0};
+      uint32_t actual_wafer_auth_secret
+          [kFlashInfoFieldWaferAuthSecretSizeIn32BitWords] = {0};
       CHECK_STATUS_OK(flash_ctrl_testutils_info_region_setup(
           &flash_ctrl_state, kFlashInfoFieldWaferAuthSecret.page,
           kFlashInfoFieldWaferAuthSecret.bank,
@@ -58,10 +57,10 @@ bool test_main(void) {
           &flash_ctrl_state, byte_address,
           kFlashInfoFieldWaferAuthSecret.partition, actual_wafer_auth_secret,
           kDifFlashCtrlPartitionTypeInfo,
-          kFlashInfoWaferAuthSecretSizeIn32BitWords,
+          kFlashInfoFieldWaferAuthSecretSizeIn32BitWords,
           /*delay_micros=*/0));
       CHECK_ARRAYS_EQ(actual_wafer_auth_secret, kExpectedWaferAuthSecret,
-                      kFlashInfoWaferAuthSecretSizeIn32BitWords);
+                      kFlashInfoFieldWaferAuthSecretSizeIn32BitWords);
       LOG_INFO("Done.");
       break;
     default:
diff --git a/sw/device/silicon_creator/manuf/tests/sram_device_info_flash_wr_functest.c b/sw/device/silicon_creator/manuf/tests/sram_device_info_flash_wr_functest.c
index 7b53eba3ef12b..b3c038465ed96 100644
--- a/sw/device/silicon_creator/manuf/tests/sram_device_info_flash_wr_functest.c
+++ b/sw/device/silicon_creator/manuf/tests/sram_device_info_flash_wr_functest.c
@@ -94,7 +94,7 @@ bool test_main(void) {
           &flash_ctrl_state, byte_address,
           kFlashInfoFieldWaferAuthSecret.partition, kExpectedWaferAuthSecret,
           kDifFlashCtrlPartitionTypeInfo,
-          kFlashInfoWaferAuthSecretSizeIn32BitWords));
+          kFlashInfoFieldWaferAuthSecretSizeIn32BitWords));
       LOG_INFO("Enabling ROM execution to enable bootstrap after reset.");
       CHECK_STATUS_OK(manuf_individualize_device_creator_sw_cfg(
           &otp_ctrl, &flash_ctrl_state));
diff --git a/sw/device/silicon_creator/manuf/tests/test_wafer_auth_secret.h b/sw/device/silicon_creator/manuf/tests/test_wafer_auth_secret.h
index 4e3bdde7bb1ad..45b939611df75 100644
--- a/sw/device/silicon_creator/manuf/tests/test_wafer_auth_secret.h
+++ b/sw/device/silicon_creator/manuf/tests/test_wafer_auth_secret.h
@@ -9,7 +9,7 @@
 
 // Expected wafer authentication secret to write to the flash
 const uint32_t
-    kExpectedWaferAuthSecret[kFlashInfoWaferAuthSecretSizeIn32BitWords] = {
+    kExpectedWaferAuthSecret[kFlashInfoFieldWaferAuthSecretSizeIn32BitWords] = {
         0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
         0xdeadbeef, 0xdeadbeef, 0xdeadbeef, 0xdeadbeef,
 };
diff --git a/sw/device/silicon_creator/manuf/tests/ujson_msg_padding_functest.c b/sw/device/silicon_creator/manuf/tests/ujson_msg_padding_functest.c
new file mode 100644
index 0000000000000..834379c507fd8
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/tests/ujson_msg_padding_functest.c
@@ -0,0 +1,117 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+/**
+ * Peripheral handles.
+ */
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+/**
+ * ATE Indicator GPIOs.
+ */
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 0;
+static const dif_gpio_pin_t kGpioPinSpiConsoleRxReady = 1;
+
+/**
+ * UJSON payloads.
+ */
+static serdes_sha256_hash_t sha256_hash_msg;
+static lc_token_hash_t lc_token_hash_msg;
+static manuf_certgen_inputs_t certgen_inputs_msg;
+static perso_blob_t perso_blob_msg;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .console.putbuf_buffered = true,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
+
+static status_t peripheral_handles_init(void) {
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  TRY(dif_pinmux_init(mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR),
+                      &pinmux));
+  return OK_STATUS();
+}
+
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA6 / GPIO4 is for SPI console RX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa6,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleRxReady));
+  // IOA5 / GPIO3 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  TRY(dif_gpio_output_set_enabled_all(&gpio, 0x3));  // Enable first 2 GPIOs.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));   // Intialize all to 0.
+  return OK_STATUS();
+}
+
+static status_t send_ujson_msgs(ujson_t *uj) {
+  // Set all fields in each UJSON payload to value with width less than max.
+  perso_blob_msg.num_objs = 0x5;
+  perso_blob_msg.next_free = 0x5;
+  for (size_t i = 0; i < 100; ++i) {
+    if (i < 2) {
+      lc_token_hash_msg.hash[i] = 0x5;
+    }
+    if (i < 8) {
+      sha256_hash_msg.data[i] = 0x5;
+    }
+    if (i < 20) {
+      certgen_inputs_msg.dice_auth_key_key_id[i] = 0x5;
+      certgen_inputs_msg.ext_auth_key_key_id[i] = 0x5;
+    }
+    perso_blob_msg.body[i] = 0x5;
+  }
+
+  // TX payloads to the host padding the payloads with whitespace.
+  RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_serdes_sha256_hash_t, uj,
+                        &sha256_hash_msg, kSerdesSha256HashSerializedMaxSize);
+  RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_lc_token_hash_t, uj,
+                        &lc_token_hash_msg, kLcTokenHashSerializedMaxSize);
+  RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_manuf_certgen_inputs_t, uj,
+                        &certgen_inputs_msg,
+                        kManufCertgenInputsSerializedMaxSize);
+  RESP_OK_PADDED_NO_CRC(ujson_serialize_with_padding_perso_blob_t, uj,
+                        &perso_blob_msg, kPersoBlobSerializedMaxSize);
+
+  // RX payloads echoed back by host and check their sizes when received.
+  TRY(ujson_deserialize_serdes_sha256_hash_t(uj, &sha256_hash_msg));
+  TRY_CHECK(uj->str_size == kSerdesSha256HashSerializedMaxSize);
+  TRY(ujson_deserialize_lc_token_hash_t(uj, &lc_token_hash_msg));
+  TRY_CHECK(uj->str_size == kLcTokenHashSerializedMaxSize);
+  TRY(ujson_deserialize_manuf_certgen_inputs_t(uj, &certgen_inputs_msg));
+  TRY_CHECK(uj->str_size == kManufCertgenInputsSerializedMaxSize);
+  TRY(ujson_deserialize_perso_blob_t(uj, &perso_blob_msg));
+  TRY_CHECK(uj->str_size == kPersoBlobSerializedMaxSize);
+
+  return OK_STATUS();
+};
+
+bool test_main(void) {
+  CHECK_STATUS_OK(peripheral_handles_init());
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
+  ujson_t uj = ujson_ottf_console();
+  CHECK_STATUS_OK(send_ujson_msgs(&uj));
+  return true;
+}
diff --git a/sw/device/silicon_creator/manuf/tests/ujson_msg_size_functest.c b/sw/device/silicon_creator/manuf/tests/ujson_msg_size_functest.c
new file mode 100644
index 0000000000000..b458e02a78241
--- /dev/null
+++ b/sw/device/silicon_creator/manuf/tests/ujson_msg_size_functest.c
@@ -0,0 +1,101 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+/**
+ * Peripheral handles.
+ */
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+/**
+ * ATE Indicator GPIOs.
+ */
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 0;
+static const dif_gpio_pin_t kGpioPinSpiConsoleRxReady = 1;
+
+/**
+ * UJSON payloads.
+ */
+static serdes_sha256_hash_t sha256_hash_msg;
+static lc_token_hash_t lc_token_hash_msg;
+static manuf_certgen_inputs_t certgen_inputs_msg;
+static perso_blob_t perso_blob_msg;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .console.putbuf_buffered = true,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
+
+static status_t peripheral_handles_init(void) {
+  TRY(dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  TRY(dif_pinmux_init(mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR),
+                      &pinmux));
+  return OK_STATUS();
+}
+
+static status_t configure_ate_gpio_indicators(void) {
+  // IOA6 / GPIO4 is for SPI console RX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa6,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleRxReady));
+  // IOA5 / GPIO3 is for SPI console TX ready signal.
+  TRY(dif_pinmux_output_select(
+      &pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+      kTopEarlgreyPinmuxOutselGpioGpio0 + kGpioPinSpiConsoleTxReady));
+  TRY(dif_gpio_output_set_enabled_all(&gpio, 0x3));  // Enable first 2 GPIOs.
+  TRY(dif_gpio_write_all(&gpio, /*write_val=*/0));   // Intialize all to 0.
+  return OK_STATUS();
+}
+
+static status_t send_ujson_msgs(ujson_t *uj) {
+  // Set all fields in each UJSON payload to the max value
+  memset(&sha256_hash_msg.data, UINT8_MAX, sizeof(sha256_hash_msg));
+  memset(&lc_token_hash_msg.hash, UINT8_MAX, sizeof(lc_token_hash_msg));
+  memset(&certgen_inputs_msg, UINT8_MAX, sizeof(certgen_inputs_msg));
+  memset(&perso_blob_msg.num_objs, UINT8_MAX, sizeof(perso_blob_msg.num_objs));
+  memset(&perso_blob_msg.next_free, UINT8_MAX,
+         sizeof(perso_blob_msg.next_free));
+  memset(&perso_blob_msg.body, UINT8_MAX, sizeof(perso_blob_msg.body));
+
+  // TX payloads to the host.
+  RESP_OK_NO_CRC(ujson_serialize_serdes_sha256_hash_t, uj, &sha256_hash_msg);
+  RESP_OK_NO_CRC(ujson_serialize_lc_token_hash_t, uj, &lc_token_hash_msg);
+  RESP_OK_NO_CRC(ujson_serialize_manuf_certgen_inputs_t, uj,
+                 &certgen_inputs_msg);
+  RESP_OK_NO_CRC(ujson_serialize_perso_blob_t, uj, &perso_blob_msg);
+
+  // RX payloads echoed back by host.
+  TRY(ujson_deserialize_serdes_sha256_hash_t(uj, &sha256_hash_msg));
+  TRY(ujson_deserialize_lc_token_hash_t(uj, &lc_token_hash_msg));
+  TRY(ujson_deserialize_manuf_certgen_inputs_t(uj, &certgen_inputs_msg));
+  TRY(ujson_deserialize_perso_blob_t(uj, &perso_blob_msg));
+
+  return OK_STATUS();
+};
+
+bool test_main(void) {
+  CHECK_STATUS_OK(peripheral_handles_init());
+  CHECK_STATUS_OK(configure_ate_gpio_indicators());
+  ujson_t uj = ujson_ottf_console();
+  CHECK_STATUS_OK(send_ujson_msgs(&uj));
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom/BUILD b/sw/device/silicon_creator/rom/BUILD
index 8e1c47dfee225..e61fd87fba142 100644
--- a/sw/device/silicon_creator/rom/BUILD
+++ b/sw/device/silicon_creator/rom/BUILD
@@ -7,8 +7,14 @@ load("@rules_pkg//pkg:mappings.bzl", "pkg_files")
 load("//rules:cross_platform.bzl", "dual_cc_library", "dual_inputs")
 load("//rules:files.bzl", "output_groups")
 load("//rules:linker.bzl", "ld_library")
-load("//rules:opentitan_test.bzl", "manual_test")
-load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU", "fpga_params", "opentitan_binary", "opentitan_test")
+load(
+    "//rules/opentitan:defs.bzl",
+    "OPENTITAN_CPU",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_manual_test",
+    "opentitan_test",
+)
 load("//rules/opentitan:legacy.bzl", "legacy_rom_targets")
 
 package(default_visibility = ["//visibility:public"])
@@ -73,10 +79,13 @@ ld_library(
 cc_library(
     name = "rom_isrs",
     srcs = [
-        "rom_isrs.S",
         "rom_isrs.c",
+        "//sw/device/silicon_creator/lib:flash_exc_handler",
     ],
     hdrs = ["rom_isrs.h"],
+    defines = [
+        "INTERRUPT_HANDLER=rom_interrupt_handler",
+    ],
     target_compatible_with = [OPENTITAN_CPU],
     deps = [
         "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
@@ -142,8 +151,8 @@ cc_library(
         "//sw/device/lib/crt",
         "//sw/device/lib/runtime:hart",
         "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib:build_info",
         "//sw/device/silicon_creator/lib:cfi",
-        "//sw/device/silicon_creator/lib:chip_info",
         "//sw/device/silicon_creator/lib:epmp_state",
         "//sw/device/silicon_creator/lib:error",
         "//sw/device/silicon_creator/lib:irq_asm",
@@ -154,6 +163,7 @@ cc_library(
         "//sw/device/silicon_creator/lib/base:chip",
         "//sw/device/silicon_creator/lib/base:sec_mmio",
         "//sw/device/silicon_creator/lib/base:static_critical",
+        "//sw/device/silicon_creator/lib/base:util",
         "//sw/device/silicon_creator/lib/drivers:alert",
         "//sw/device/silicon_creator/lib/drivers:ast",
         "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
@@ -189,11 +199,13 @@ cc_library(
 
 opentitan_binary(
     name = "mask_rom",
+    collect_code_coverage = 0,
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310",
         "//hw/top_earlgrey:fpga_cw340",
         "//hw/top_earlgrey:sim_dv_base",
         "//hw/top_earlgrey:sim_verilator_base",
+        "//hw/top_earlgrey:sim_qemu_base",
         "//hw/top_earlgrey:silicon_creator",
     ],
     kind = "rom",
@@ -217,6 +229,20 @@ legacy_rom_targets(
     target = "mask_rom",
 )
 
+[
+    filegroup(
+        name = "mask_rom_{}_hashfile".format(dev),
+        testonly = True,
+        srcs = [":mask_rom"],
+        output_group = "{}_hashfile".format(dev),
+    )
+    for dev in [
+        "fpga_cw310",
+        "fpga_cw340",
+        "silicon_creator",
+    ]
+]
+
 cc_library(
     name = "rom_epmp",
     srcs = [
@@ -338,7 +364,7 @@ cc_fuzz_test(
     deps = [
         ":bootstrap",
         "//sw/device/silicon_creator/lib:bootstrap_fuzzer_util",
-        "@com_google_absl//absl/types:span",
+        "@abseil-cpp//absl/types:span",
     ],
 )
 
@@ -441,7 +467,7 @@ pkg_files(
     prefix = "earlgrey/rom",
 )
 
-manual_test(
+opentitan_manual_test(
     name = "manual_test",
     tags = [
         "manual",
@@ -489,13 +515,13 @@ genrule(
         echo $$f >> $@
         size=$$(stat -L -c %s $$f)
         full=$$(sha256sum $$f | cut -f1 -d' ')
-        without_chip_info=$$(head -c -12 $$f | sha256sum | cut -f1 -d' ')
-        code=$$(echo $$without_chip_info | sed -E s'/(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})/0x\\8,0x\\7,0x\\6,0x\\5,0x\\4,0x\\3,0x\\2,0x\\1,/g')
+        without_build_info=$$(head -c -12 $$f | sha256sum | cut -f1 -d' ')
+        code=$$(echo $$without_build_info | sed -E s'/(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})(.{8})/0x\\8,0x\\7,0x\\6,0x\\5,0x\\4,0x\\3,0x\\2,0x\\1,/g')
 
         echo "              size: $$size" >> $@
         echo "     complete hash: $$full" >> $@
-        echo " without chip_info: $$without_chip_info" >> $@
-        echo "w/o chip_info le32: $$code" >> $@
+        echo " without build_info: $$without_build_info" >> $@
+        echo "w/o build_info le32: $$code" >> $@
         echo >> $@
         fi
     done
@@ -515,9 +541,9 @@ opentitan_test(
     name = "stack_utilization_test",
     cw310 = fpga_params(
         binaries = {
-            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_fpga_cw310_rom_with_fake_keys_signed_bin": "good_a",
-            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0_fpga_cw310_rom_with_fake_keys_signed_bin": "good_b",
-            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_corrupted_fpga_cw310_rom_with_fake_keys_signed_bin": "bad_a",
+            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_fpga_cw310_rom_with_fake_keys_signed_bin": "good_a",
+            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_prod_key_0_fpga_cw310_rom_with_fake_keys_signed_bin": "good_b",
+            "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_corrupted_fpga_cw310_rom_with_fake_keys_signed_bin": "bad_a",
             ":empty_flash": "empty",
         },
         stack_usage = "STK:[0-9A-Fa-f/]+\r\n",
@@ -542,7 +568,7 @@ opentitan_test(
             --exec="console --non-interactive --exit-success='PASS.*\r\n' --exit-failure='{exit_failure}'"
 
             --exec="no-op --info '### Measuring stack utilization for bootstrap slot B'"
-            --exec="bootstrap --mirror=false --clear-uart=true --leave-in-bootstrap {good_b}@0x80000"
+            --exec="bootstrap --mirror=false --clear-uart=true --leave-in-bootstrap {good_b}@{rom_ext_slot_b}"
             --exec="console --non-interactive --exit-success='{stack_usage}' --exit-failure='{exit_failure}'"
 
             --exec="gpio remove ROM_BOOTSTRAP"
diff --git a/sw/device/silicon_creator/rom/bootstrap_unittest.cc b/sw/device/silicon_creator/rom/bootstrap_unittest.cc
index 6ce9e7b6118bd..594efc755c28b 100644
--- a/sw/device/silicon_creator/rom/bootstrap_unittest.cc
+++ b/sw/device/silicon_creator/rom/bootstrap_unittest.cc
@@ -31,6 +31,7 @@ using bootstrap_unittest_util::PageProgramCmd;
 using bootstrap_unittest_util::ResetCmd;
 using bootstrap_unittest_util::SectorEraseCmd;
 
+using ::testing::_;
 using ::testing::NotNull;
 using ::testing::Return;
 
@@ -64,8 +65,8 @@ TEST_F(BootstrapTest, RequestedEnabled) {
 
 TEST_F(BootstrapTest, PayloadOverflowErase) {
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
-  EXPECT_CALL(spi_device_, CmdGet(NotNull()))
+  EXPECT_CALL(spi_device_, InitBootstrap());
+  EXPECT_CALL(spi_device_, CmdGet(NotNull(), true))
       .WillOnce(Return(kErrorSpiDevicePayloadOverflow));
 
   EXPECT_EQ(bootstrap(), kErrorSpiDevicePayloadOverflow);
@@ -74,7 +75,7 @@ TEST_F(BootstrapTest, PayloadOverflowErase) {
 TEST_F(BootstrapTest, PayloadOverflowProgram) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -82,7 +83,7 @@ TEST_F(BootstrapTest, PayloadOverflowProgram) {
   ExpectFlashCtrlEraseVerify(kErrorOk, kErrorOk);
   EXPECT_CALL(spi_device_, FlashStatusClear());
   // Program
-  EXPECT_CALL(spi_device_, CmdGet(NotNull()))
+  EXPECT_CALL(spi_device_, CmdGet(NotNull(), true))
       .WillOnce(Return(kErrorSpiDevicePayloadOverflow));
 
   EXPECT_EQ(bootstrap(), kErrorSpiDevicePayloadOverflow);
@@ -91,7 +92,7 @@ TEST_F(BootstrapTest, PayloadOverflowProgram) {
 TEST_F(BootstrapTest, BootstrapSimple) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -122,7 +123,7 @@ TEST_F(BootstrapTest, BootstrapSimple) {
 TEST_F(BootstrapTest, BootstrapOddPayload) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -156,7 +157,7 @@ TEST_F(BootstrapTest, BootstrapOddPayload) {
 TEST_F(BootstrapTest, BootstrapMisalignedAddrLongPayload) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -190,7 +191,7 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrLongPayload) {
 TEST_F(BootstrapTest, BootstrapMisalignedAddrShortPayload) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -221,7 +222,7 @@ TEST_F(BootstrapTest, BootstrapMisalignedAddrShortPayload) {
 TEST_F(BootstrapTest, BootstrapStartWithSectorErase) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(SectorEraseCmd(0));
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -254,7 +255,7 @@ TEST_F(BootstrapTest, BootstrapStartWithSectorErase) {
 TEST_F(BootstrapTest, BootstrapProgramWithErase) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -298,7 +299,7 @@ TEST_F(BootstrapTest, BootstrapProgramWithErase) {
 TEST_F(BootstrapTest, MisalignedEraseAddress) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -330,7 +331,7 @@ TEST_F(BootstrapTest, MisalignedEraseAddress) {
 TEST_F(BootstrapTest, IgnoredCommands) {
   // Phase 1: Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());  // Ignored, missing WREN.
   ExpectSpiFlashStatusGet(false);
   ExpectSpiCmd(ResetCmd());  // Ignored, not supported.
@@ -358,7 +359,7 @@ TEST_F(BootstrapTest, IgnoredCommands) {
 
 TEST_F(BootstrapTest, EraseBank0Error) {
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorUnknown, kErrorOk);
@@ -368,7 +369,7 @@ TEST_F(BootstrapTest, EraseBank0Error) {
 
 TEST_F(BootstrapTest, EraseBank1Error) {
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorUnknown);
@@ -379,7 +380,7 @@ TEST_F(BootstrapTest, EraseBank1Error) {
 TEST_F(BootstrapTest, EraseVerifyBank0Error) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -392,7 +393,7 @@ TEST_F(BootstrapTest, EraseVerifyBank0Error) {
 TEST_F(BootstrapTest, EraseVerifyBank1Error) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -405,7 +406,7 @@ TEST_F(BootstrapTest, EraseVerifyBank1Error) {
 TEST_F(BootstrapTest, DataWriteError) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -433,7 +434,7 @@ TEST_F(BootstrapTest, DataWriteError) {
 TEST_F(BootstrapTest, DataWriteErrorMisalignedAddr) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -459,7 +460,7 @@ TEST_F(BootstrapTest, DataWriteErrorMisalignedAddr) {
 TEST_F(BootstrapTest, BadProgramAddress) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
@@ -477,7 +478,7 @@ TEST_F(BootstrapTest, BadProgramAddress) {
 TEST_F(BootstrapTest, BadEraseAddress) {
   // Erase
   ExpectBootstrapRequestCheck(true);
-  EXPECT_CALL(spi_device_, Init());
+  EXPECT_CALL(spi_device_, InitBootstrap());
   ExpectSpiCmd(ChipEraseCmd());
   ExpectSpiFlashStatusGet(true);
   ExpectFlashCtrlChipErase(kErrorOk, kErrorOk);
diff --git a/sw/device/silicon_creator/rom/data/rom_e2e_testplan.hjson b/sw/device/silicon_creator/rom/data/rom_e2e_testplan.hjson
index e50e9152f8886..0e5c0d05ef186 100644
--- a/sw/device/silicon_creator/rom/data/rom_e2e_testplan.hjson
+++ b/sw/device/silicon_creator/rom/data/rom_e2e_testplan.hjson
@@ -15,6 +15,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["rom_e2e_smoke"]
     }
 
@@ -30,6 +31,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -54,6 +56,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["rom_e2e_shutdown_output"]
     }
 
@@ -75,6 +78,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -93,6 +97,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["rom_e2e_shutdown_watchdog"]
     }
 
@@ -114,6 +119,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -130,6 +136,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["rom_e2e_shutdown_exception_c"]
     }
 
@@ -145,6 +152,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -161,6 +169,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -178,6 +187,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -196,6 +206,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -214,6 +225,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -231,6 +243,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -253,6 +266,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["e2e_bootstrap_entry"]
     }
 
@@ -272,6 +286,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -291,6 +306,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -310,6 +326,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -326,6 +343,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -349,6 +367,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -377,6 +396,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -403,6 +423,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -422,6 +443,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -441,6 +463,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -463,6 +486,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -485,6 +509,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -504,6 +529,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -518,6 +544,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -539,6 +566,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -575,6 +603,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -594,6 +623,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -616,6 +646,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: [
         "rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0",
         "rom_e2e_boot_policy_valid_a_good_b_good_dev",
@@ -658,6 +689,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -683,6 +715,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -702,6 +735,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: [
         "rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0",
         "rom_e2e_sigverify_always_a_bad_b_bad_dev",
@@ -731,6 +765,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -754,6 +789,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -776,6 +812,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -805,6 +842,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -827,6 +865,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -856,6 +895,7 @@
             '''
       tags: ["rom", "dv", "verilator", "fpga", "silicon"]
       stage: V3
+      si_stage: NA
       tests: [
         "rom_e2e_jtag_debug_test_unlocked0",
         "rom_e2e_jtag_debug_dev",
@@ -873,6 +913,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -895,6 +936,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V3
+      si_stage: NA
       tests: [
         "rom_e2e_jtag_inject_test_unlocked0",
         "rom_e2e_jtag_inject_dev",
@@ -922,6 +964,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -944,6 +987,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -962,6 +1006,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -980,6 +1025,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1004,6 +1050,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1043,6 +1090,7 @@
             '''
       tags: ["rom", "verilator", "dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: [
         "rom_e2e_asm_init_test_unlocked0",
         "rom_e2e_asm_init_dev",
@@ -1067,6 +1115,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
 
     }
@@ -1086,6 +1135,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1099,6 +1149,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1111,6 +1162,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1125,6 +1177,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1138,6 +1191,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1155,6 +1209,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1173,6 +1228,7 @@
             '''
       tags: ["rom", "dv", "verilator", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: [
         "rom_e2e_keymgr_init_rom_ext_meas",
         "rom_e2e_keymgr_init_rom_ext_no_meas",
@@ -1192,6 +1248,7 @@
             '''
       tags: ["rom", "dv", "verilator", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: ["rom_e2e_static_critical"]
     }
 
@@ -1209,6 +1266,7 @@
             '''
       tags: ["rom", "no_dv", "fpga", "silicon"]
       stage: V2
+      si_stage: NA
       tests: []
     }
 
@@ -1230,6 +1288,7 @@
       '''
       tags: ["rom", "dv"]
       stage: V3
+      si_stage: NA
       tests: []
     }
 
@@ -1249,6 +1308,7 @@
       '''
       tags: ["rom", "fpga", "dv", "silicon"]
       stage: V3
+      si_stage: NA
       tests: []
     }
 
@@ -1263,7 +1323,26 @@
       '''
       tags: ["rom", "fpga", "dv", "silicon"]
       stage: V3
+      si_stage: NA
       tests: ["rom_e2e_self_hash"]
     }
+
+    {
+      name: rom_e2e_chip_info
+      desc: '''Verify that ROM correctly embeds the chip information and stores it in the boot log
+
+            - Load a ROM_EXT image that will
+              - Print the content of the ROM's chip_info section.
+                - When running as the ROM_EXT, the ROM is still readable, the chip_info is located
+                  at the end of the ROM.
+              - Print the content of the boot log's chip info.
+              - Verify that the two are identical.
+              - Verify that the chip_info's version is the expected one.
+            '''
+      tags: ["rom", "dv", "fpga", "silicon"]
+      stage: V3
+      si_stage: SV2
+      tests: []
+    }
   ]
 }
diff --git a/sw/device/silicon_creator/rom/e2e/BUILD b/sw/device/silicon_creator/rom/e2e/BUILD
index 202cc2982c660..64c02ac13adf1 100644
--- a/sw/device/silicon_creator/rom/e2e/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/BUILD
@@ -2,21 +2,10 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load(
-    "@bazel_skylib//lib:dicts.bzl",
-    "dicts",
-)
-load(
-    "//rules:const.bzl",
-    "CONST",
-    "hex_digits",
-)
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-    "bin_to_vmem",
-    "scramble_flash_vmem",
-)
+load("@bazel_skylib//lib:dicts.bzl", "dicts")
+load("//rules:const.bzl", "CONST", "hex_digits")
+load("//rules/opentitan:legacy.bzl", "scramble_flash_vmem", "vmem_file")
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:otp.bzl",
     "OTP_SIGVERIFY_FAKE_KEYS",
@@ -24,14 +13,8 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
-load(
-    "//rules:splice.bzl",
-    "bitstream_splice",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
+load("//rules:splice.bzl", "bitstream_splice")
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_PASS",
@@ -87,7 +70,8 @@ bitstream_splice(
     name = "bitstream_default_otp",
     src = "//hw/bitstream:mask_rom",
     data = ":otp_img_default",
-    meminfo = "//hw/bitstream:otp_mmi",
+    instance = "otp",
+    meminfo = "//hw/bitstream:cw310_mmi",
     tags = maybe_skip_in_ci(CONST.LCV.RMA),
     update_usr_access = True,
     visibility = ["//visibility:private"],
@@ -118,6 +102,7 @@ opentitan_test(
         exec_env = [
             "//hw/top_earlgrey:fpga_cw310",
             "//hw/top_earlgrey:sim_dv",
+            "//hw/top_earlgrey:sim_qemu_base",
             "//hw/top_earlgrey:sim_verilator",
         ],
         linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_{}".format(slot),
@@ -155,6 +140,7 @@ opentitan_test(
         exec_env = [
             "//hw/top_earlgrey:fpga_cw310",
             "//hw/top_earlgrey:sim_dv",
+            "//hw/top_earlgrey:sim_qemu_base",
             "//hw/top_earlgrey:sim_verilator",
         ],
         linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_{}".format(slot),
@@ -178,6 +164,7 @@ opentitan_test(
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
             "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
             "//hw/top_earlgrey:sim_verilator": None,
         },
         linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_{}".format(slot),
@@ -199,7 +186,7 @@ opentitan_test(
 # The following filegroup is required to allow dvsim to build the
 # empty_test_slot_* targets as the `sim_dv` execution environment is expected
 # as a suffix in the target label. For example:
-#  `//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0_sim_dv`
+#  `//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0_sim_dv`
 [
     filegroup(
         name = "empty_test_slot_{}_{}_sim_dv".format(slot, key),
@@ -222,6 +209,7 @@ opentitan_test(
     for key in SIGVERIFY_LC_KEYS
     for group in [
         "fpga_cw310_rom_with_fake_keys",
+        "sim_qemu_rom_with_fake_keys",
         "sim_dv",
     ]
 ]
@@ -243,17 +231,18 @@ opentitan_test(
     for key in SIGVERIFY_LC_KEYS
     for group in [
         "fpga_cw310_rom_with_fake_keys",
+        "sim_qemu_rom_with_fake_keys",
         "sim_dv",
     ]
 ]
 
-# The below three rule sets (bin_to_vmem, scramble_flash_vmem, and filegroup)
+# The below three rule sets (vmem_file, scramble_flash_vmem, and filegroup)
 # are needed to run `sigverify_always` tests in DV.
 [
-    bin_to_vmem(
+    vmem_file(
         name = "empty_test_slot_{}_{}_corrupted_sim_dv_vmem64_signed".format(slot, key),
         testonly = True,
-        bin = ":empty_test_slot_{}_{}_corrupted_sim_dv_signed_bin".format(slot, key),
+        src = ":empty_test_slot_{}_{}_corrupted_sim_dv_signed_bin".format(slot, key),
         word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
     )
     for slot in SLOTS
@@ -264,7 +253,7 @@ opentitan_test(
     scramble_flash_vmem(
         name = "empty_test_slot_{}_{}_corrupted_sim_dv_scr_vmem64_signed".format(slot, key),
         testonly = True,
-        vmem = ":empty_test_slot_{}_{}_corrupted_sim_dv_vmem64_signed".format(slot, key),
+        src = ":empty_test_slot_{}_{}_corrupted_sim_dv_vmem64_signed".format(slot, key),
     )
     for slot in SLOTS
     for key in SIGVERIFY_LC_KEYS
@@ -295,6 +284,7 @@ opentitan_test(
     srcs = ["rom_e2e_flash_ctrl_init_test.c"],
     exec_env = {
         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
     },
     deps = [
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -309,7 +299,7 @@ opentitan_test(
     dv = dv_params(
         rom = "//sw/device/silicon_creator/rom:mask_rom",
     ),
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     exec_env = {
         "//hw/top_earlgrey:sim_dv": None,
         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
@@ -340,7 +330,7 @@ opentitan_test(
     dv = dv_params(
         rom = "//sw/device/silicon_creator/rom:mask_rom",
     ),
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     exec_env = {
         "//hw/top_earlgrey:fpga_cw310_sival": None,
         "//hw/top_earlgrey:fpga_cw340_sival": None,
@@ -365,7 +355,7 @@ opentitan_test(
     dv = dv_params(
         rom = "//sw/device/silicon_creator/rom:mask_rom",
     ),
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
     exec_env = {
         "//hw/top_earlgrey:sim_dv": None,
         "//hw/top_earlgrey:sim_verilator": None,
@@ -437,7 +427,7 @@ opentitan_test(
     name = "sigverify_key_auth",
     srcs = [":empty_test"],
     ecdsa_key = {
-        "//sw/device/silicon_creator/rom/keys/unauthorized/ecdsa:unauthorized_key_0_ecdsa_p256": "unauthorized_key_0",
+        "//sw/device/silicon_creator/rom/keys/unauthorized/ecdsa:ecdsa_keyset": "unauthorized_key_0",
     },
     exec_env = {
         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
@@ -487,3 +477,20 @@ opentitan_test(
         "//sw/device/silicon_creator/lib/drivers:rstmgr",
     ],
 )
+
+opentitan_test(
+    name = "rom_e2e_chip_info",
+    srcs = ["chip_info_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw340_test_rom": None,
+    },
+    deps = [
+        "//sw/device/lib/testing:ret_sram_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:build_info",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom/e2e/address_translation/BUILD b/sw/device/silicon_creator/rom/e2e/address_translation/BUILD
index 954ae9d1ae1a4..c2afafd432b96 100644
--- a/sw/device/silicon_creator/rom/e2e/address_translation/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/address_translation/BUILD
@@ -2,18 +2,17 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load(
-    "//rules/opentitan:defs.bzl",
-    "cw310_params",
-    "fpga_params",
-    "opentitan_test",
-)
 load(
     "//rules:const.bzl",
     "CONST",
-    "hex",
     "hex_digits",
 )
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_test",
+    "qemu_params",
+)
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_STARTING_ROM_EXT",
@@ -26,12 +25,23 @@ package(default_visibility = ["//visibility:public"])
 opentitan_test(
     name = "rom_ext_a_flash_a",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a": "firmware",
+        },
+        exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
+        exit_success = MSG_STARTING_ROM_EXT,
+        offset = SLOTS["a"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a": "firmware",
         },
         exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
         exit_success = MSG_STARTING_ROM_EXT,
@@ -42,12 +52,23 @@ opentitan_test(
 opentitan_test(
     name = "rom_ext_b_flash_b",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_b": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b": "firmware",
+        },
+        exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
+        exit_success = MSG_STARTING_ROM_EXT,
+        offset = SLOTS["b"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b": "firmware",
         },
         exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
         exit_success = MSG_STARTING_ROM_EXT,
@@ -58,28 +79,50 @@ opentitan_test(
 opentitan_test(
     name = "rom_ext_a_flash_b",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a": "firmware",
         },
         exit_failure = MSG_STARTING_ROM_EXT,
         exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.STORE_ACCESS)),
         offset = SLOTS["b"],
     ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a": "firmware",
+        },
+        exit_failure = "BFV:05495202",
+        exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.STORE_ACCESS)),
+        offset = SLOTS["b"],
+    ),
 )
 
 opentitan_test(
     name = "rom_ext_b_flash_a",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_b": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b": "firmware",
+        },
+        exit_failure = MSG_STARTING_ROM_EXT,
+        exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.STORE_ACCESS)),
+        offset = SLOTS["a"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b": "firmware",
         },
         exit_failure = MSG_STARTING_ROM_EXT,
         exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.STORE_ACCESS)),
@@ -90,12 +133,23 @@ opentitan_test(
 opentitan_test(
     name = "rom_ext_v_flash_a",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_virtual": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual": "firmware",
+        },
+        exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
+        exit_success = MSG_STARTING_ROM_EXT,
+        offset = SLOTS["a"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual": "firmware",
         },
         exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
         exit_success = MSG_STARTING_ROM_EXT,
@@ -106,12 +160,23 @@ opentitan_test(
 opentitan_test(
     name = "rom_ext_v_flash_b",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_virtual": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual": "firmware",
+        },
+        exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
+        exit_success = MSG_STARTING_ROM_EXT,
+        offset = SLOTS["b"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual": "firmware",
         },
         exit_failure = CONST.SHUTDOWN.PREFIX.BFV,
         exit_success = MSG_STARTING_ROM_EXT,
@@ -122,12 +187,23 @@ opentitan_test(
 opentitan_test(
     name = "rom_ext_a_flash_a_bad_addr_trans",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         assemble = "{firmware}@{offset}",
         binaries = {
-            "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a_bad_address_translation": "firmware",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a_bad_address_translation": "firmware",
+        },
+        exit_failure = MSG_STARTING_ROM_EXT,
+        exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.ILLEGAL_INSTRUCTION)),
+        offset = SLOTS["a"],
+    ),
+    qemu = qemu_params(
+        assemble = "{firmware}@{offset}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a_bad_address_translation": "firmware",
         },
         exit_failure = MSG_STARTING_ROM_EXT,
         exit_success = MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.ILLEGAL_INSTRUCTION)),
diff --git a/sw/device/silicon_creator/rom/e2e/ate/BUILD b/sw/device/silicon_creator/rom/e2e/ate/BUILD
new file mode 100644
index 0000000000000..ee0bed8adaca7
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/BUILD
@@ -0,0 +1,75 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@//rules:signing.bzl", "offline_presigning_artifacts", "offline_signature_attach")
+load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_test",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+opentitan_binary(
+    name = "ate_gpio_toggle_test",
+    testonly = True,
+    srcs = ["ate_gpio_toggle_test.c"],
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_sival": None,
+        "//hw/top_earlgrey:silicon_creator": None,
+        "//hw/top_earlgrey:sim_dv": None,
+    },
+    spx_key = {},
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:gpio",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:manifest_def",
+    ],
+)
+
+opentitan_test(
+    name = "ate_smoketest",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_sival": None,
+    },
+    fpga = fpga_params(
+        binaries = {
+            "//sw/device/silicon_creator/rom/e2e/ate/binaries:ate_gpio_toggle_test_bins": "firmware",
+        },
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized",
+    ),
+)
+
+offline_presigning_artifacts(
+    name = "ate_gpio_toggle_test_presigning",
+    testonly = True,
+    srcs = [":ate_gpio_toggle_test"],
+    ecdsa_key = {"//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset": "sv00-earlgrey-a1-root-ecdsa-prod-0"},
+    manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+    spx_key = {},
+    tags = ["manual"],
+)
+
+pkg_tar(
+    name = "digests",
+    testonly = True,
+    srcs = [":ate_gpio_toggle_test_presigning"],
+    mode = "0644",
+    tags = ["manual"],
+)
+
+offline_signature_attach(
+    name = "signed",
+    testonly = True,
+    srcs = [":ate_gpio_toggle_test_presigning"],
+    ecdsa_signatures = ["//sw/device/silicon_creator/rom/e2e/ate/signatures:ecdsa_signatures"],
+    spx_signatures = [],
+    tags = ["manual"],
+)
diff --git a/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c b/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c
new file mode 100644
index 0000000000000..72416d6229f5e
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/manifest_def.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+static const dif_gpio_pin_t kGpioPinIoa5 = 0;
+
+bool test_main(void) {
+  // Initialize pinmux and GPIO peripherals.
+  CHECK_DIF_OK(
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+                                        kTopEarlgreyPinmuxOutselGpioGpio0));
+  CHECK_DIF_OK(
+      dif_gpio_output_set_enabled_all(&gpio, 0x1));  // Enable first GPIO.
+  CHECK_DIF_OK(
+      dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+
+  // Toggle IOA5.
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+  busy_spin_micros(100);
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, false));
+  busy_spin_micros(100);
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/BUILD b/sw/device/silicon_creator/rom/e2e/ate/binaries/BUILD
new file mode 100644
index 0000000000000..6480c6b99c85a
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/binaries/BUILD
@@ -0,0 +1,73 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules/opentitan:cc.bzl", "exec_env_filegroup")
+load("//rules/opentitan:legacy.bzl", "scramble_flash_vmem", "vmem_file")
+
+package(default_visibility = ["//visibility:public"])
+
+exec_env_filegroup(
+    name = "ate_gpio_toggle_test_bins",
+    testonly = True,
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": "cw310",
+        "//hw/top_earlgrey:silicon_creator": "silicon",
+        "//hw/top_earlgrey:sim_dv": "sim_dv",
+    },
+    files = {
+        "ate_gpio_toggle_test_fpga_cw310_sival.signed.bin": "cw310",
+        "ate_gpio_toggle_test_silicon_creator.signed.bin": "silicon",
+        "ate_gpio_toggle_test_sim_dv.signed.bin": "sim_dv",
+    },
+)
+
+# The below rule sets (bin_to_vmem, scramble_flash_vmem, and filegroup)
+# are needed to run the ATE GPIO toggle test in DV.
+_DV_EXEC_ENVS = [
+    "sim_dv",
+    "silicon_creator",
+]
+
+[
+    vmem_file(
+        name = "ate_gpio_toggle_test_{}_vmem64_signed".format(env),
+        testonly = True,
+        src = ":ate_gpio_toggle_test_{}.signed.bin".format(env),
+        word_size = 64,  # Backdoor-load VMEM image uses 64-bit words
+    )
+    for env in _DV_EXEC_ENVS
+]
+
+[
+    scramble_flash_vmem(
+        name = "ate_gpio_toggle_test_{}_scr_vmem64_signed".format(env),
+        testonly = True,
+        src = ":ate_gpio_toggle_test_{}_vmem64_signed".format(env),
+    )
+    for env in _DV_EXEC_ENVS
+]
+
+filegroup(
+    name = "ate_gpio_toggle_test_dv_files",
+    testonly = True,
+    srcs = [
+        ":ate_gpio_toggle_test_{}{}".format(env, file_type)
+        for env in _DV_EXEC_ENVS
+        for file_type in [
+            ".signed.bin",
+            "_vmem64_signed",
+            "_scr_vmem64_signed",
+        ]
+    ],
+)
+
+# This alias is required for the DV testbench to locate these files.
+filegroup(
+    name = "ate_gpio_toggle_test_silicon_creator",
+    testonly = True,
+    srcs = [
+        ":ate_gpio_toggle_test_silicon_creator.dis",
+        ":ate_gpio_toggle_test_silicon_creator_vmem64_signed",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.dis b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.dis
new file mode 100644
index 0000000000000..44c6626dc6fbb
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.dis
@@ -0,0 +1,22517 @@
+
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_fpga_cw310_sival.elf:     file format elf32-littleriscv
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_fpga_cw310_sival.elf
+architecture: riscv:rv32, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x20000480
+
+Program Header:
+    LOAD off    0x000000d4 vaddr 0x00000000 paddr 0x00000000 align 2**12
+         filesz 0x00000000 memsz 0x00000000 flags ---
+    LOAD off    0x00001000 vaddr 0x20000000 paddr 0x20000000 align 2**12
+         filesz 0x000065d0 memsz 0x000065d0 flags rwx
+    LOAD off    0x00007fe8 vaddr 0x10001fe8 paddr 0x200065d0 align 2**12
+         filesz 0x00000084 memsz 0x00000330 flags rw-
+    LOAD off    0x00000318 vaddr 0x10002318 paddr 0x20006654 align 2**12
+         filesz 0x00000000 memsz 0x00008000 flags rw-
+    LOAD off    0x00000000 vaddr 0x20079000 paddr 0x20079000 align 2**12
+         filesz 0x00000000 memsz 0x00000800 flags rw-
+
+Sections:
+Idx Name                     Size      VMA       LMA       File off  Algn  Flags
+  0 .static_critical         00001fe8  10000000  10000000  00000000  2**2  ALLOC
+  1 .manifest                00000400  20000000  20000000  00001000  2**2  CONTENTS, ALLOC, LOAD, DATA
+  2 .rom_ext_immutable       00000000  20000400  20000400  0000806c  2**2  CONTENTS
+  3 .vectors                 00000080  20000400  20000400  00001400  2**8  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  4 .crt                     000000c6  20000480  20000480  00001480  2**2  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  5 .init_array              00000000  20000548  20000548  0000806c  2**2  CONTENTS, ALLOC, LOAD, DATA
+  6 .text                    00003e68  20000548  20000548  00001548  2**2  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  7 .shutdown                00000000  200043b0  200043b0  0000806c  2**2  CONTENTS
+  8 .rodata                  00002220  200043b0  200043b0  000053b0  2**3  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  9 .data                    00000084  10001fe8  200065d0  00007fe8  2**2  CONTENTS, ALLOC, LOAD, DATA
+ 10 .bss                     000002ac  1000206c  20006654  0000806c  2**2  ALLOC
+ 11 .freertos.heap           00008000  10002318  20006654  00008318  2**2  ALLOC
+ 12 .non_volatile_counter_3  00000800  20079000  20079000  00009000  2**11  ALLOC
+ 13 .non_volatile_counter_2  00000800  20079800  20079800  00000000  2**11  ALLOC
+ 14 .non_volatile_counter_1  00000800  2007a000  2007a000  00000000  2**11  ALLOC
+ 15 .non_volatile_counter_0  00000800  2007a800  2007a800  00000000  2**11  ALLOC
+ 16 .non_volatile_scratch    00005000  2007b000  2007b000  00000000  2**11  ALLOC
+ 17 .logs.fields             00000518  00000000  00000000  0000806c  2**2  CONTENTS, READONLY
+ 18 .riscv.attributes        00000042  00000000  00000000  00008584  2**0  CONTENTS, READONLY
+ 19 .debug_info              0001a307  00000000  00000000  000085c6  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_abbrev            0000438a  00000000  00000000  000228cd  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_aranges           00000088  00000000  00000000  00026c57  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 22 .debug_line              0000ffba  00000000  00000000  00026cdf  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 23 .debug_loc               0000f296  00000000  00000000  00036c99  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 24 .debug_ranges            000017a0  00000000  00000000  00045f2f  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 25 .debug_str               0000adfb  00000000  00000000  000476cf  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 26 .debug_frame             00001de4  00000000  00000000  000524cc  2**2  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 27 .ot.status_create_record 00000780  00000000  00000000  000542b0  2**2  CONTENTS, READONLY
+SYMBOL TABLE:
+10000000 l    d  .static_critical       00000000 .static_critical
+20000000 l    d  .manifest      00000000 .manifest
+20000400 l    d  .rom_ext_immutable     00000000 .rom_ext_immutable
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+20000480 l    d  .crt   00000000 .crt
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+20000548 l    d  .text  00000000 .text
+200043b0 l    d  .shutdown      00000000 .shutdown
+200043b0 l    d  .rodata        00000000 .rodata
+10001fe8 l    d  .data  00000000 .data
+1000206c l    d  .bss   00000000 .bss
+10002318 l    d  .freertos.heap 00000000 .freertos.heap
+20079000 l    d  .non_volatile_counter_3        00000000 .non_volatile_counter_3
+20079800 l    d  .non_volatile_counter_2        00000000 .non_volatile_counter_2
+2007a000 l    d  .non_volatile_counter_1        00000000 .non_volatile_counter_1
+2007a800 l    d  .non_volatile_counter_0        00000000 .non_volatile_counter_0
+2007b000 l    d  .non_volatile_scratch  00000000 .non_volatile_scratch
+00000000 l    d  .logs.fields   00000000 .logs.fields
+00000000 l    d  .riscv.attributes      00000000 .riscv.attributes
+00000000 l    d  .debug_info    00000000 .debug_info
+00000000 l    d  .debug_abbrev  00000000 .debug_abbrev
+00000000 l    d  .debug_aranges 00000000 .debug_aranges
+00000000 l    d  .debug_line    00000000 .debug_line
+00000000 l    d  .debug_loc     00000000 .debug_loc
+00000000 l    d  .debug_ranges  00000000 .debug_ranges
+00000000 l    d  .debug_str     00000000 .debug_str
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+00000000 l    d  .ot.status_create_record       00000000 .ot.status_create_record
+00000000 l    df *ABS*  00000000 manifest_def.c
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+2000059c g     F .text  00000024 pxPortInitialiseStack
+2000328c g     F .text  0000006e status_extract
+20000a76 g     F .text  0000000e dif_gpio_write_all
+00000100 g       *ABS*  00000000 _non_volatile_counter_flash_words
+20006110 g     O .rodata        00000004 MODULE_ID
+20000e7c g     F .text  00000002 coverage_send_buffer
+20003564 g     F .text  00000026 dif_spi_device_pop_flash_address_fifo
+200027dc g     F .text  0000000a get_spi_device_sink
+2000366a g     F .text  0000000e dif_uart_init
+2007a000 g       *ABS*  00000000 _non_volatile_counter_1_start
+20000000 g       .static_critical       00000000 _ottf_start_address
+20000548 g       .init_array    00000000 _init_array_start
+20000b02 g     F .text  0000002a status_report
+2000263a g     F .text  000000d0 test_status_set
+20003332 g     F .text  0000001c dif_spi_device_irq_acknowledge
+2000270a g     F .text  0000009c base_log_internal_core
+200007ac g     F .text  00000068 ottf_isr_exit
+20000704 g     F .text  00000054 handler_irq_external
+2000353e g     F .text  00000026 dif_spi_device_pop_flash_command_fifo
+
+
+
+Disassembly of section .vectors:
+
+20000400 <_ottf_interrupt_vector>:
+_ottf_interrupt_vector():
+20000400:       2080006f                j       20000608 <handler_exception>
+20000404:       c0001073                unimp
+20000408:       c0001073                unimp
+2000040c:       2500006f                j       2000065c <handler_irq_software>
+20000410:       c0001073                unimp
+20000414:       c0001073                unimp
+20000418:       c0001073                unimp
+2000041c:       2940006f                j       200006b0 <handler_irq_timer>
+20000420:       c0001073                unimp
+20000424:       c0001073                unimp
+20000428:       c0001073                unimp
+2000042c:       2d80006f                j       20000704 <handler_irq_external>
+20000430:       c0001073                unimp
+20000434:       c0001073                unimp
+20000438:       c0001073                unimp
+2000043c:       c0001073                unimp
+20000440:       c0001073                unimp
+20000444:       c0001073                unimp
+20000448:       c0001073                unimp
+2000044c:       c0001073                unimp
+20000450:       c0001073                unimp
+20000454:       c0001073                unimp
+20000458:       c0001073                unimp
+2000045c:       c0001073                unimp
+20000460:       c0001073                unimp
+20000464:       c0001073                unimp
+20000468:       c0001073                unimp
+2000046c:       c0001073                unimp
+20000470:       c0001073                unimp
+20000474:       c0001073                unimp
+20000478:       c0001073                unimp
+2000047c:       2dc0006f                j       20000758 <handler_irq_internal>
+
+Disassembly of section .crt:
+
+20000480 <_ottf_start>:
+_ottf_start():
+20000480:       f0002197                auipc   gp,0xf0002
+20000484:       36818193                addi    gp,gp,872 # 100027e8 <__global_pointer$>
+20000488:       f0020117                auipc   sp,0xf0020
+2000048c:       af810113                addi    sp,sp,-1288 # 1001ff80 <_exception_frame_start>
+20000490:       00000297                auipc   t0,0x0
+20000494:       f7128293                addi    t0,t0,-143 # 20000401 <_ottf_interrupt_vector+0x1>
+20000498:       30529073                csrw    mtvec,t0
+2000049c:       f0002517                auipc   a0,0xf0002
+200004a0:       b4c50513                addi    a0,a0,-1204 # 10001fe8 <status_codes>
+200004a4:       88418593                addi    a1,gp,-1916 # 1000206c <gpio>
+200004a8:       00006617                auipc   a2,0x6
+200004ac:       12860613                addi    a2,a2,296 # 200065d0 <_data_init_start>
+200004b0:       28b1                    jal     2000050c <crt_section_copy>
+200004b2:       f0002517                auipc   a0,0xf0002
+200004b6:       bba50513                addi    a0,a0,-1094 # 1000206c <gpio>
+200004ba:       f0002597                auipc   a1,0xf0002
+200004be:       e5e58593                addi    a1,a1,-418 # 10002318 <ucHeap>
+200004c2:       201d                    jal     200004e8 <crt_section_clear>
+200004c4:       00000417                auipc   s0,0x0
+200004c8:       08440413                addi    s0,s0,132 # 20000548 <xPortStartFirstTask>
+200004cc:       00000497                auipc   s1,0x0
+200004d0:       07c48493                addi    s1,s1,124 # 20000548 <xPortStartFirstTask>
+200004d4:       00947863                bgeu    s0,s1,200004e4 <init_array_loop_end>
+
+200004d8 <init_array_loop>:
+200004d8:       /-> 00042283            lw      t0,0(s0)
+200004dc:       |   9282                        jalr    t0
+200004de:       |   0411                        addi    s0,s0,4
+200004e0:       \-- fe946ce3            bltu    s0,s1,200004d8 <init_array_loop>
+
+200004e4 <init_array_loop_end>:
+200004e4:       6480006f                j       20000b2c <_ottf_main>
+
+200004e8 <crt_section_clear>:
+crt_section_clear():
+/proc/self/cwd/sw/device/lib/crt/crt.S:41
+  .global crt_section_clear
+  .type crt_section_clear, @function
+crt_section_clear:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_clear_nothing
+200004e8:       /-------- 00b57e63              bgeu    a0,a1,20000504 <crt_section_clear+0x1c>
+/proc/self/cwd/sw/device/lib/crt/crt.S:44
+
+  // Check that start and end are word aligned.
+  or   t0, a0, a1
+200004ec:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:45
+  andi t0, t0, 0x3
+200004f0:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:46
+  bnez t0, .L_clear_error
+200004f4:       |  /----- 00029b63              bnez    t0,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:51
+
+.L_clear_loop:
+  // Write zero into section memory word-by-word.
+  // TODO: unroll
+  sw   zero, 0(a0)
+200004f8:       |  |  /-> 00052023              sw      zero,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:52
+  addi a0, a0, 4
+200004fc:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:53
+  bltu a0, a1, .L_clear_loop
+200004fe:       |  |  \-- feb56de3              bltu    a0,a1,200004f8 <crt_section_clear+0x10>
+/proc/self/cwd/sw/device/lib/crt/crt.S:54
+  ret
+20000502:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:59
+
+.L_clear_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_clear_error
+20000504:       \--+----X 00b51363              bne     a0,a1,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:60
+  ret
+20000508:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:63
+
+.L_clear_error:
+  unimp
+2000050a:          \----> 0000                  unimp
+
+2000050c <crt_section_copy>:
+crt_section_copy():
+/proc/self/cwd/sw/device/lib/crt/crt.S:95
+  .global crt_section_copy
+  .type crt_section_copy, @function
+crt_section_copy:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_copy_nothing
+2000050c:       /-------- 02b57963              bgeu    a0,a1,2000053e <crt_section_copy+0x32>
+/proc/self/cwd/sw/device/lib/crt/crt.S:98
+
+  // Check that start, end and src are word aligned.
+  or   t0, a0, a1
+20000510:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:99
+  or   t0, t0, a2
+20000514:       |         00c2e2b3              or      t0,t0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:100
+  andi t0, t0, 0x3
+20000518:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:101
+  bnez t0, .L_copy_error
+2000051c:       |  /----- 02029463              bnez    t0,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:118
+  //        +-------------+
+  //        |             |
+  //      start          end
+  //
+  // TODO: disallow all overlap since it indicates API misuse?
+  sub  t0, a0, a2           // (start - src) mod 2**32
+20000520:       |  |      40c502b3              sub     t0,a0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:119
+  sub  t1, a1, a0           // end - start
+20000524:       |  |      40a58333              sub     t1,a1,a0
+/proc/self/cwd/sw/device/lib/crt/crt.S:120
+  bltu t0, t1, .L_copy_error
+20000528:       |  +----- 0062ee63              bltu    t0,t1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:125
+
+.L_copy_loop:
+  // Copy data from src into section word-by-word.
+  // TODO: unroll
+  lw   t0, 0(a2)
+2000052c:       |  |  /-> 00062283              lw      t0,0(a2)
+/proc/self/cwd/sw/device/lib/crt/crt.S:126
+  addi a2, a2, 4
+20000530:       |  |  |   0611                  addi    a2,a2,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:127
+  sw   t0, 0(a0)
+20000532:       |  |  |   00552023              sw      t0,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:128
+  addi a0, a0, 4
+20000536:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:129
+  bltu a0, a1, .L_copy_loop
+20000538:       |  |  \-- feb56ae3              bltu    a0,a1,2000052c <crt_section_copy+0x20>
+/proc/self/cwd/sw/device/lib/crt/crt.S:130
+  ret
+2000053c:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:135
+
+.L_copy_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_copy_error
+2000053e:       \--+----X 00b51363              bne     a0,a1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:136
+  ret
+20000542:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:139
+
+.L_copy_error:
+  unimp
+20000544:          \----> 0000                  unimp
+
+Disassembly of section .text:
+
+20000548 <xPortStartFirstTask>:
+xPortStartFirstTask():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:18
+  .global xPortStartFirstTask
+  .type xPortStartFirstTask, @function
+xPortStartFirstTask:
+  // Load the stack pointer for the current TCB (just going to clobber sp here
+  // since we are setting it here anyway).
+  lw  sp, pxCurrentTCB
+20000548:       f0002117                auipc   sp,0xf0002
+2000054c:       b6412103                lw      sp,-1180(sp) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:19
+  lw  sp, 0(sp)
+20000550:       4102                    lw      sp,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:23
+
+  // NOTE: for starting the FreeRTOS scheduler, the exception return address is
+  // used as the function return address. See pxPortInitialiseStack below.
+  lw  ra, 0(sp)
+20000552:       4082                    lw      ra,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:26
+
+  // Restore registers initialized on task start.
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000554:       4332                    lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:27
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000556:       43c2                    lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:28
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000558:       4452                    lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:29
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000055a:       44e2                    lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:30
+  lw   a0,  7 * OTTF_WORD_SIZE(sp) // task parameters (pvParameters)
+2000055c:       4572                    lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:31
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000055e:       5582                    lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:32
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000560:       5612                    lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:33
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000562:       56a2                    lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:34
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000564:       5732                    lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:35
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000566:       57c2                    lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:36
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000568:       5852                    lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:37
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000056a:       58e2                    lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:38
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000056c:       5972                    lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:39
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000056e:       4986                    lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:40
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000570:       4a16                    lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:41
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000572:       4aa6                    lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:42
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000574:       4b36                    lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:43
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000576:       4bc6                    lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:44
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000578:       4c56                    lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:45
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000057a:       4ce6                    lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:46
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000057c:       4d76                    lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:47
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000057e:       5d86                    lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:48
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000580:       5e16                    lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:49
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000582:       5ea6                    lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:50
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000584:       5f36                    lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:51
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000586:       5fc6                    lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:55
+
+  // Initialize t0 to the value of MSTATUS with global interrupts enabled, which
+  // is required because this returns with ret, not eret.
+  lw t0, 29 * OTTF_WORD_SIZE(sp) // Load the MSTATUS state from the stack.
+20000588:       52d6                    lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:56
+  ori t0, t0, 1<<3               // Set MIE field.
+2000058a:       0082e293                ori     t0,t0,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:57
+  csrw mstatus, t0               // Ibex interrupts enabled from here!
+2000058e:       30029073                csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:60
+
+  // Restore t0 register from the stack (after using it to manipulate MSTATUS).
+  lw t0, 2 * OTTF_WORD_SIZE(sp)
+20000592:       42a2                    lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:63
+
+  // Update the stack pointer (shrinking the stack).
+  addi sp, sp, OTTF_CONTEXT_SIZE
+20000594:       07810113                addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:65
+
+  ret
+20000598:       8082                    ret
+2000059a:       0001                    nop
+
+2000059c <pxPortInitialiseStack>:
+pxPortInitialiseStack():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:133
+  .balign 4
+  .global pxPortInitialiseStack
+  .type pxPortInitialiseStack, @function
+pxPortInitialiseStack:
+  // Setup the MSTATUS register.
+  csrr t0, mstatus
+2000059c:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:137
+  // Ensure interrupts are disabled when the stack is restored within an ISR.
+  // Required when a task is created after the scheduler has been started,
+  // otherwise interrupts would be disabled anyway.
+  andi t0, t0, ~0x8
+200005a0:       ff72f293                andi    t0,t0,-9
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:139
+  // Generate the value 0x1880, to set the MPIE and MPP bits in MSTATUS.
+  li t1, 0x188 << 4
+200005a4:       6309                    lui     t1,0x2
+200005a6:       88030313                addi    t1,t1,-1920 # 1880 <_epmp_reset_rx_size+0x1080>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:140
+  or t0, t0, t1
+200005aa:       0062e2b3                or      t0,t0,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:143
+
+  // Setup the stack frame detailed above (a0 holds the task stack pointer).
+  addi a0, a0, -OTTF_CONTEXT_SIZE
+200005ae:       f8850513                addi    a0,a0,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:145
+  // Push MSTATUS onto the stack.
+  sw t0, 29 * OTTF_WORD_SIZE(a0)
+200005b2:       06552a23                sw      t0,116(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:148
+
+  // Push task parameters (pvParameters that is in x12/a2, on the stack.
+  sw a2, 7 * OTTF_WORD_SIZE(a0)
+200005b6:       cd50                    sw      a2,28(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:150
+  // Push 0 for the portTASK_RETURN_ADDRESS for now.
+  sw zero, 1 * OTTF_WORD_SIZE(a0)
+200005b8:       00052223                sw      zero,4(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:155
+  // Push the pointer to the task's entry point (pxCode) onto the stack. This
+  // will be loaded into either ra (in xPortStartFirstTask) or mepc (in
+  // freertosIrqExit), so that when ret/mret is called control flow will be
+  // transferred accordingly.
+  sw a1, 0(a0)
+200005bc:       c10c                    sw      a1,0(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:157
+
+  ret
+200005be:       8082                    ret
+
+200005c0 <compute_mepc_on_synchronous_irq>:
+compute_mepc_on_synchronous_irq():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:32
+   * address below will cause another exception.
+   */
+  .balign 4
+  .type compute_mepc_on_synchronous_irq, @function
+compute_mepc_on_synchronous_irq:
+  csrr t0, mepc
+200005c0:           341022f3            csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:33
+  csrr t1, mcause
+200005c4:           34202373            csrr    t1,mcause
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:34
+  li t2, 0x01
+200005c8:           4385                        li      t2,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:35
+  bne t1, t2, .L_load_mepc
+200005ca:       /-- 00731363            bne     t1,t2,200005d0 <compute_mepc_on_synchronous_irq+0x10>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:36
+  ret
+200005ce:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:38
+.L_load_mepc:
+  lh t2, 0(t0)
+200005d0:       \-> 00029383            lh      t2,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:39
+  li t1, 0x3
+200005d4:           430d                        li      t1,3
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:40
+  and t3, t2, t1
+200005d6:           0063fe33            and     t3,t2,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:41
+  beq t3, t1, .L_32bit_trap_instr
+200005da:       /-- 006e0463            beq     t3,t1,200005e2 <compute_mepc_on_synchronous_irq+0x22>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:42
+  addi t0, t0, OTTF_HALF_WORD_SIZE
+200005de:       |   0289                        addi    t0,t0,2
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:43
+  ret
+200005e0:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:45
+.L_32bit_trap_instr:
+  addi t0, t0, OTTF_WORD_SIZE
+200005e2:       \-> 0291                        addi    t0,t0,4
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:46
+  ret
+200005e4:           8082                        ret
+200005e6:           0001                        nop
+
+200005e8 <save_current_sp_to_tcb>:
+save_current_sp_to_tcb():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:61
+   * exception, if we attempt to perform a store to said address.
+   */
+  .balign 4
+  .type save_current_sp_to_tcb, @function
+save_current_sp_to_tcb:
+  la t0, kOttfTestConfig
+200005e8:           00004297            auipc   t0,0x4
+200005ec:           03828293            addi    t0,t0,56 # 20004620 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:62
+  lb t1, 0(t0)
+200005f0:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:63
+  beqz t1, .L_skip_sp_save
+200005f4:       /-- 00030863            beqz    t1,20000604 <save_current_sp_to_tcb+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:64
+  lw t2, pxCurrentTCB
+200005f8:       |   f0002397            auipc   t2,0xf0002
+200005fc:       |   ab43a383            lw      t2,-1356(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:65
+  sw sp, 0(t2)
+20000600:       |   0023a023            sw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:67
+.L_skip_sp_save:
+  ret
+20000604:       \-> 8082                        ret
+20000606:           0001                        nop
+
+20000608 <handler_exception>:
+handler_exception():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:80
+  .balign 4
+  .global handler_exception
+  .type handler_exception, @function
+handler_exception:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000608:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:81
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000060c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:82
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000060e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:83
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000610:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:84
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000612:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:85
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000614:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:86
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000616:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:87
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000618:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:88
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000061a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:89
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000061c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:90
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000061e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:91
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000620:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:92
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000622:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:93
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000624:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:94
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000626:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:95
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000628:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:96
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000062a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:97
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000062c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:98
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000062e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:99
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000630:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:100
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000632:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:101
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000634:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:102
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000636:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:103
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000638:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:104
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000063a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:105
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000063c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:106
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000063e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:107
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000640:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:108
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000642:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:111
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000644:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:112
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000648:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:116
+
+  // Save MEPC to the stack after updating it to the next instruction (since
+  // this is a synchronous IRQ).
+  jal compute_mepc_on_synchronous_irq
+2000064a:       3f9d                    jal     200005c0 <compute_mepc_on_synchronous_irq>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:117
+  sw t0, 0(sp)
+2000064c:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:121
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000064e:       3f69                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:124
+
+  // Jump to the exception handler.
+  mv a0, sp
+20000650:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:125
+  jal ottf_exception_handler
+20000652:       3f9010ef                jal     ra,2000224a <ottf_exception_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:128
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000656:       1560006f                j       200007ac <ottf_isr_exit>
+2000065a:       0001                    nop
+
+2000065c <handler_irq_software>:
+handler_irq_software():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:141
+  .balign 4
+  .global handler_irq_software
+  .type handler_irq_software, @function
+handler_irq_software:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+2000065c:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:142
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000660:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:143
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+20000662:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:144
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000664:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:145
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000666:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:146
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000668:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:147
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000066a:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:148
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+2000066c:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:149
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000066e:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:150
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000670:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:151
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000672:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:152
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000674:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:153
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000676:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:154
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000678:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:155
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000067a:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:156
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000067c:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:157
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000067e:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:158
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000680:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:159
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000682:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:160
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000684:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:161
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000686:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:162
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000688:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:163
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000068a:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:164
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000068c:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:165
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000068e:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:166
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000690:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:167
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000692:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:168
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000694:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:169
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000696:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:172
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000698:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:173
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+2000069c:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:177
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000069e:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:178
+  sw t0, 0(sp)
+200006a2:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:182
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006a4:       3791                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:185
+
+  // Jump to the software ISR.
+  mv a0, sp
+200006a6:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:186
+  jal ottf_software_isr
+200006a8:       439010ef                jal     ra,200022e0 <ottf_software_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:189
+
+  // Return from ISR.
+  j ottf_isr_exit
+200006ac:       1000006f                j       200007ac <ottf_isr_exit>
+
+200006b0 <handler_irq_timer>:
+handler_irq_timer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:202
+  .balign 4
+  .global handler_irq_timer
+  .type handler_irq_timer, @function
+handler_irq_timer:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+200006b0:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:203
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+200006b4:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:204
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+200006b6:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:205
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+200006b8:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:206
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+200006ba:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:207
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+200006bc:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:208
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+200006be:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:209
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+200006c0:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:210
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+200006c2:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:211
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+200006c4:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:212
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+200006c6:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:213
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+200006c8:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:214
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+200006ca:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:215
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+200006cc:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:216
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+200006ce:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:217
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+200006d0:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:218
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+200006d2:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:219
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+200006d4:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:220
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+200006d6:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:221
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+200006d8:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:222
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+200006da:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:223
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+200006dc:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:224
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+200006de:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:225
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+200006e0:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:226
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+200006e2:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:227
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+200006e4:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:228
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+200006e6:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:229
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+200006e8:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:230
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+200006ea:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:233
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+200006ec:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:234
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+200006f0:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:238
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+200006f2:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:239
+  sw t0, 0(sp)
+200006f6:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:243
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006f8:       3dc5                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:246
+
+  // Jump to timer ISR.
+  mv a0, sp
+200006fa:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:247
+  jal ottf_timer_isr
+200006fc:       403010ef                jal     ra,200022fe <ottf_timer_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:250
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000700:       0ac0006f                j       200007ac <ottf_isr_exit>
+
+20000704 <handler_irq_external>:
+handler_irq_external():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:263
+  .balign 4
+  .global handler_irq_external
+  .type handler_irq_external, @function
+handler_irq_external:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000704:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:264
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000708:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:265
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000070a:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:266
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+2000070c:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:267
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+2000070e:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:268
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000710:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:269
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000712:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:270
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000714:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:271
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+20000716:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:272
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000718:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:273
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000071a:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:274
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+2000071c:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:275
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+2000071e:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:276
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000720:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:277
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000722:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:278
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000724:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:279
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+20000726:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:280
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000728:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:281
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000072a:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:282
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+2000072c:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:283
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+2000072e:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:284
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000730:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:285
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000732:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:286
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000734:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:287
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000736:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:288
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000738:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:289
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000073a:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:290
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+2000073c:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:291
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000073e:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:294
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000740:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:295
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000744:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:299
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+20000746:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:300
+  sw t0, 0(sp)
+2000074a:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:304
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000074c:       3d71                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:307
+
+  // Jump to external ISR.
+  mv a0, sp
+2000074e:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:308
+  jal ottf_external_isr
+20000750:       3cd010ef                jal     ra,2000231c <ottf_external_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:311
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000754:       0580006f                j       200007ac <ottf_isr_exit>
+
+20000758 <handler_irq_internal>:
+handler_irq_internal():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:324
+  .balign 4
+  .global handler_irq_internal
+  .type handler_irq_internal, @function
+handler_irq_internal:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000758:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:325
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000075c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:326
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000075e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:327
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000760:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:328
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000762:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:329
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000764:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:330
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000766:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:331
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000768:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:332
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000076a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:333
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000076c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:334
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000076e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:335
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000770:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:336
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000772:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:337
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000774:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:338
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000776:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:339
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000778:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:340
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000077a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:341
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000077c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:342
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000077e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:343
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000780:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:344
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000782:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:345
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000784:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:346
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000786:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:347
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000788:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:348
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000078a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:349
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000078c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:350
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000078e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:351
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000790:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:352
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000792:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:355
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000794:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:356
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000798:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:360
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000079a:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:361
+  sw t0, 0(sp)
+2000079e:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:365
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200007a0:       35a1                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:368
+
+  // Jump to the internal ISR.
+  mv a0, sp
+200007a2:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:369
+  jal ottf_internal_isr
+200007a4:       467010ef                jal     ra,2000240a <ottf_internal_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:372
+
+  // Return from ISR.
+  j ottf_isr_exit
+200007a8:       0040006f                j       200007ac <ottf_isr_exit>
+
+200007ac <ottf_isr_exit>:
+ottf_isr_exit():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:389
+  // Load the stack pointer for the current task control block (TCB), only if
+  // the `enable_concurrency` flag is set in the test configuration struct,
+  // meaning a test is run as a FreeRTOS task, where each task maintains its own
+  // stack. Otherwise, the test is run on bare-metal, and there is no TCB, and
+  // only a single stack/stack pointer.
+  la t0, kOttfTestConfig
+200007ac:           00004297            auipc   t0,0x4
+200007b0:           e7428293            addi    t0,t0,-396 # 20004620 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:390
+  lb t1, 0(t0)
+200007b4:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:391
+  beqz t1, .L_skip_sp_restore
+200007b8:       /-- 00030863            beqz    t1,200007c8 <ottf_isr_exit+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:392
+  lw  t2, pxCurrentTCB
+200007bc:       |   f0002397            auipc   t2,0xf0002
+200007c0:       |   8f03a383            lw      t2,-1808(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:393
+  lw  sp, 0(t2)
+200007c4:       |   0003a103            lw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:397
+.L_skip_sp_restore:
+
+  // Load the correct MEPC for the next instruction in the current task.
+  lw t0, 0(sp)
+200007c8:       \-> 4282                        lw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:398
+  csrw mepc, t0
+200007ca:           34129073            csrw    mepc,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:401
+
+  // Load MSTATUS for the MPIE bit.
+  lw  t0, 29 * OTTF_WORD_SIZE(sp)
+200007ce:           52d6                        lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:402
+  csrw mstatus, t0
+200007d0:           30029073            csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:405
+
+  // Restore all registers from the stack.
+  lw   ra,  1 * OTTF_WORD_SIZE(sp)
+200007d4:           4092                        lw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:406
+  lw   t0,  2 * OTTF_WORD_SIZE(sp)
+200007d6:           42a2                        lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:407
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+200007d8:           4332                        lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:408
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+200007da:           43c2                        lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:409
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+200007dc:           4452                        lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:410
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+200007de:           44e2                        lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:411
+  lw   a0,  7 * OTTF_WORD_SIZE(sp)
+200007e0:           4572                        lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:412
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+200007e2:           5582                        lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:413
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+200007e4:           5612                        lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:414
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+200007e6:           56a2                        lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:415
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+200007e8:           5732                        lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:416
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+200007ea:           57c2                        lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:417
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+200007ec:           5852                        lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:418
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+200007ee:           58e2                        lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:419
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+200007f0:           5972                        lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:420
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+200007f2:           4986                        lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:421
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+200007f4:           4a16                        lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:422
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+200007f6:           4aa6                        lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:423
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+200007f8:           4b36                        lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:424
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+200007fa:           4bc6                        lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:425
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+200007fc:           4c56                        lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:426
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+200007fe:           4ce6                        lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:427
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000800:           4d76                        lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:428
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000802:           5d86                        lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:429
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000804:           5e16                        lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:430
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000806:           5ea6                        lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:431
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000808:           5f36                        lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:432
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000080a:           5fc6                        lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:433
+  addi sp, sp, OTTF_CONTEXT_SIZE
+2000080c:           07810113            addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:437
+
+  // This exits the ISR completely, and does not return control flow to the ISR
+  // that called this sub-routine.
+  mret
+20000810:           30200073            mret
+
+20000814 <test_main>:
+test_main():
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:23
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+static const dif_gpio_pin_t kGpioPinIoa5 = 0;
+
+bool test_main(void) {
+20000814:                 1141                  addi    sp,sp,-16
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:25
+  // Initialize pinmux and GPIO peripherals.
+  CHECK_DIF_OK(
+20000816:                 c606                  sw      ra,12(sp)
+20000818:                 c422                  sw      s0,8(sp)
+2000081a:                 f0002517              auipc   a0,0xf0002
+2000081e:                 85250593              addi    a1,a0,-1966 # 1000206c <gpio>
+20000822:                 40040537              lui     a0,0x40040
+20000826:                 2489                  jal     20000a68 <dif_gpio_init>
+20000828:                 00006417              auipc   s0,0x6
+2000082c:       /-------- cd05                  beqz    a0,20000864 <test_main+0x50>
+2000082e:       |         862a                  mv      a2,a0
+20000830:       |         abc42503              lw      a0,-1348(s0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000834:       |  /----- cd01                  beqz    a0,2000084c <test_main+0x38>
+20000836:       |  |      e000f517              auipc   a0,0xe000f
+2000083a:       |  |      7ca50513              addi    a0,a0,1994 # 10000 <_chip_info_end>
+2000083e:       |  |      00400593              li      a1,4
+20000842:       |  |      952e                  add     a0,a0,a1
+20000844:       |  |      4585                  li      a1,1
+20000846:       |  |      761010ef              jal     ra,200027a6 <base_log_internal_dv>
+2000084a:       |  |  /-- a801                  j       2000085a <test_main+0x46>
+2000084c:       |  \--|-> 00004517              auipc   a0,0x4
+20000850:       |     |   dec50513              addi    a0,a0,-532 # 20004638 <test_main.log_fields>
+20000854:       |     |   85b2                  mv      a1,a2
+20000856:       |     |   6b5010ef              jal     ra,2000270a <base_log_internal_core>
+2000085a:       |     \-> 6531                  lui     a0,0xc
+2000085c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000860:       |         5db010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:27
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(dif_pinmux_init(
+20000864:       \-------> f0002517              auipc   a0,0xf0002
+20000868:                 80c50593              addi    a1,a0,-2036 # 10002070 <pinmux>
+2000086c:                 40460537              lui     a0,0x40460
+20000870:                 033010ef              jal     ra,200020a2 <dif_pinmux_init>
+20000874:       /-------- cd05                  beqz    a0,200008ac <test_main+0x98>
+20000876:       |         862a                  mv      a2,a0
+20000878:       |         abc42503              lw      a0,-1348(s0)
+2000087c:       |  /----- cd01                  beqz    a0,20000894 <test_main+0x80>
+2000087e:       |  |      e000f517              auipc   a0,0xe000f
+20000882:       |  |      78250513              addi    a0,a0,1922 # 10000 <_chip_info_end>
+20000886:       |  |      01800593              li      a1,24
+2000088a:       |  |      952e                  add     a0,a0,a1
+2000088c:       |  |      4585                  li      a1,1
+2000088e:       |  |      719010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000892:       |  |  /-- a801                  j       200008a2 <test_main+0x8e>
+20000894:       |  \--|-> 00004517              auipc   a0,0x4
+20000898:       |     |   db850513              addi    a0,a0,-584 # 2000464c <test_main.log_fields.4>
+2000089c:       |     |   85b2                  mv      a1,a2
+2000089e:       |     |   66d010ef              jal     ra,2000270a <base_log_internal_core>
+200008a2:       |     \-> 6531                  lui     a0,0xc
+200008a4:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008a8:       |         593010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:29
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+200008ac:       \-------> f0001517              auipc   a0,0xf0001
+200008b0:                 7c450513              addi    a0,a0,1988 # 10002070 <pinmux>
+200008b4:                 4595                  li      a1,5
+200008b6:                 460d                  li      a2,3
+200008b8:                 7f8010ef              jal     ra,200020b0 <dif_pinmux_output_select>
+200008bc:       /-------- cd05                  beqz    a0,200008f4 <test_main+0xe0>
+200008be:       |         862a                  mv      a2,a0
+200008c0:       |         abc42503              lw      a0,-1348(s0)
+200008c4:       |  /----- cd01                  beqz    a0,200008dc <test_main+0xc8>
+200008c6:       |  |      e000f517              auipc   a0,0xe000f
+200008ca:       |  |      73a50513              addi    a0,a0,1850 # 10000 <_chip_info_end>
+200008ce:       |  |      02c00593              li      a1,44
+200008d2:       |  |      952e                  add     a0,a0,a1
+200008d4:       |  |      4585                  li      a1,1
+200008d6:       |  |      6d1010ef              jal     ra,200027a6 <base_log_internal_dv>
+200008da:       |  |  /-- a801                  j       200008ea <test_main+0xd6>
+200008dc:       |  \--|-> 00004517              auipc   a0,0x4
+200008e0:       |     |   d8450513              addi    a0,a0,-636 # 20004660 <test_main.log_fields.7>
+200008e4:       |     |   85b2                  mv      a1,a2
+200008e6:       |     |   625010ef              jal     ra,2000270a <base_log_internal_core>
+200008ea:       |     \-> 6531                  lui     a0,0xc
+200008ec:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008f0:       |         54b010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:31
+                                        kTopEarlgreyPinmuxOutselGpioGpio0));
+  CHECK_DIF_OK(
+200008f4:       \-------> f0001517              auipc   a0,0xf0001
+200008f8:                 77850513              addi    a0,a0,1912 # 1000206c <gpio>
+200008fc:                 4585                  li      a1,1
+200008fe:                 2a7d                  jal     20000abc <dif_gpio_output_set_enabled_all>
+20000900:       /-------- cd05                  beqz    a0,20000938 <test_main+0x124>
+20000902:       |         862a                  mv      a2,a0
+20000904:       |         abc42503              lw      a0,-1348(s0)
+20000908:       |  /----- cd01                  beqz    a0,20000920 <test_main+0x10c>
+2000090a:       |  |      e000f517              auipc   a0,0xe000f
+2000090e:       |  |      6f650513              addi    a0,a0,1782 # 10000 <_chip_info_end>
+20000912:       |  |      04000593              li      a1,64
+20000916:       |  |      952e                  add     a0,a0,a1
+20000918:       |  |      4585                  li      a1,1
+2000091a:       |  |      68d010ef              jal     ra,200027a6 <base_log_internal_dv>
+2000091e:       |  |  /-- a801                  j       2000092e <test_main+0x11a>
+20000920:       |  \--|-> 00004517              auipc   a0,0x4
+20000924:       |     |   d5450513              addi    a0,a0,-684 # 20004674 <test_main.log_fields.10>
+20000928:       |     |   85b2                  mv      a1,a2
+2000092a:       |     |   5e1010ef              jal     ra,2000270a <base_log_internal_core>
+2000092e:       |     \-> 6531                  lui     a0,0xc
+20000930:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000934:       |         507010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:33
+      dif_gpio_output_set_enabled_all(&gpio, 0x1));  // Enable first GPIO.
+  CHECK_DIF_OK(
+20000938:       \-------> f0001517              auipc   a0,0xf0001
+2000093c:                 73450513              addi    a0,a0,1844 # 1000206c <gpio>
+20000940:                 4581                  li      a1,0
+20000942:                 2a15                  jal     20000a76 <dif_gpio_write_all>
+20000944:       /-------- cd05                  beqz    a0,2000097c <test_main+0x168>
+20000946:       |         862a                  mv      a2,a0
+20000948:       |         abc42503              lw      a0,-1348(s0)
+2000094c:       |  /----- cd01                  beqz    a0,20000964 <test_main+0x150>
+2000094e:       |  |      e000f517              auipc   a0,0xe000f
+20000952:       |  |      6b250513              addi    a0,a0,1714 # 10000 <_chip_info_end>
+20000956:       |  |      05400593              li      a1,84
+2000095a:       |  |      952e                  add     a0,a0,a1
+2000095c:       |  |      4585                  li      a1,1
+2000095e:       |  |      649010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000962:       |  |  /-- a801                  j       20000972 <test_main+0x15e>
+20000964:       |  \--|-> 00004517              auipc   a0,0x4
+20000968:       |     |   d2450513              addi    a0,a0,-732 # 20004688 <test_main.log_fields.13>
+2000096c:       |     |   85b2                  mv      a1,a2
+2000096e:       |     |   59d010ef              jal     ra,2000270a <base_log_internal_core>
+20000972:       |     \-> 6531                  lui     a0,0xc
+20000974:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000978:       |         4c3010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:37
+      dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+
+  // Toggle IOA5.
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+2000097c:       \-------> f0001517              auipc   a0,0xf0001
+20000980:                 6f050513              addi    a0,a0,1776 # 1000206c <gpio>
+20000984:                 4605                  li      a2,1
+20000986:                 4581                  li      a1,0
+20000988:                 28f5                  jal     20000a84 <dif_gpio_write>
+2000098a:       /-------- cd05                  beqz    a0,200009c2 <test_main+0x1ae>
+2000098c:       |         862a                  mv      a2,a0
+2000098e:       |         abc42503              lw      a0,-1348(s0)
+20000992:       |  /----- cd01                  beqz    a0,200009aa <test_main+0x196>
+20000994:       |  |      e000f517              auipc   a0,0xe000f
+20000998:       |  |      66c50513              addi    a0,a0,1644 # 10000 <_chip_info_end>
+2000099c:       |  |      06800593              li      a1,104
+200009a0:       |  |      952e                  add     a0,a0,a1
+200009a2:       |  |      4585                  li      a1,1
+200009a4:       |  |      603010ef              jal     ra,200027a6 <base_log_internal_dv>
+200009a8:       |  |  /-- a801                  j       200009b8 <test_main+0x1a4>
+200009aa:       |  \--|-> 00004517              auipc   a0,0x4
+200009ae:       |     |   cf250513              addi    a0,a0,-782 # 2000469c <test_main.log_fields.16>
+200009b2:       |     |   85b2                  mv      a1,a2
+200009b4:       |     |   557010ef              jal     ra,2000270a <base_log_internal_core>
+200009b8:       |     \-> 6531                  lui     a0,0xc
+200009ba:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200009be:       |         47d010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:38
+  busy_spin_micros(100);
+200009c2:       \-------> 06400513              li      a0,100
+200009c6:                 5ca030ef              jal     ra,20003f90 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:39
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, false));
+200009ca:                 f0001517              auipc   a0,0xf0001
+200009ce:                 6a250513              addi    a0,a0,1698 # 1000206c <gpio>
+200009d2:                 4581                  li      a1,0
+200009d4:                 4601                  li      a2,0
+200009d6:                 207d                  jal     20000a84 <dif_gpio_write>
+200009d8:       /-------- cd05                  beqz    a0,20000a10 <test_main+0x1fc>
+200009da:       |         862a                  mv      a2,a0
+200009dc:       |         abc42503              lw      a0,-1348(s0)
+200009e0:       |  /----- cd01                  beqz    a0,200009f8 <test_main+0x1e4>
+200009e2:       |  |      e000f517              auipc   a0,0xe000f
+200009e6:       |  |      61e50513              addi    a0,a0,1566 # 10000 <_chip_info_end>
+200009ea:       |  |      07c00593              li      a1,124
+200009ee:       |  |      952e                  add     a0,a0,a1
+200009f0:       |  |      4585                  li      a1,1
+200009f2:       |  |      5b5010ef              jal     ra,200027a6 <base_log_internal_dv>
+200009f6:       |  |  /-- a801                  j       20000a06 <test_main+0x1f2>
+200009f8:       |  \--|-> 00004517              auipc   a0,0x4
+200009fc:       |     |   cb850513              addi    a0,a0,-840 # 200046b0 <test_main.log_fields.19>
+20000a00:       |     |   85b2                  mv      a1,a2
+20000a02:       |     |   509010ef              jal     ra,2000270a <base_log_internal_core>
+20000a06:       |     \-> 6531                  lui     a0,0xc
+20000a08:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a0c:       |         42f010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:40
+  busy_spin_micros(100);
+20000a10:       \-------> 06400513              li      a0,100
+20000a14:                 57c030ef              jal     ra,20003f90 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:41
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+20000a18:                 f0001517              auipc   a0,0xf0001
+20000a1c:                 65450513              addi    a0,a0,1620 # 1000206c <gpio>
+20000a20:                 4605                  li      a2,1
+20000a22:                 4581                  li      a1,0
+20000a24:                 2085                  jal     20000a84 <dif_gpio_write>
+20000a26:       /-------- cd05                  beqz    a0,20000a5e <test_main+0x24a>
+20000a28:       |         862a                  mv      a2,a0
+20000a2a:       |         abc42503              lw      a0,-1348(s0)
+20000a2e:       |  /----- cd01                  beqz    a0,20000a46 <test_main+0x232>
+20000a30:       |  |      e000f517              auipc   a0,0xe000f
+20000a34:       |  |      5d050513              addi    a0,a0,1488 # 10000 <_chip_info_end>
+20000a38:       |  |      09000593              li      a1,144
+20000a3c:       |  |      952e                  add     a0,a0,a1
+20000a3e:       |  |      4585                  li      a1,1
+20000a40:       |  |      567010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000a44:       |  |  /-- a801                  j       20000a54 <test_main+0x240>
+20000a46:       |  \--|-> 00004517              auipc   a0,0x4
+20000a4a:       |     |   c7e50513              addi    a0,a0,-898 # 200046c4 <test_main.log_fields.21>
+20000a4e:       |     |   85b2                  mv      a1,a2
+20000a50:       |     |   4bb010ef              jal     ra,2000270a <base_log_internal_core>
+20000a54:       |     \-> 6531                  lui     a0,0xc
+20000a56:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a5a:       |         3e1010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:43
+
+  return true;
+20000a5e:       \-------> 4505                  li      a0,1
+20000a60:                 40b2                  lw      ra,12(sp)
+20000a62:                 4422                  lw      s0,8(sp)
+20000a64:                 0141                  addi    sp,sp,16
+20000a66:                 8082                  ret
+
+20000a68 <dif_gpio_init>:
+dif_gpio_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:18
+
+#include "gpio_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_gpio_init(mmio_region_t base_addr, dif_gpio_t *gpio) {
+  if (gpio == NULL) {
+20000a68:       /----- c581                     beqz    a1,20000a70 <dif_gpio_init+0x8>
+20000a6a:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:22
+    return kDifBadArg;
+  }
+
+  gpio->base_addr = base_addr;
+20000a6c:       |      c188                     sw      a0,0(a1)
+20000a6e:       |  /-- a011                     j       20000a72 <dif_gpio_init+0xa>
+20000a70:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:25
+
+  return kDifOk;
+}
+20000a72:          \-> 8532                     mv      a0,a2
+20000a74:              8082                     ret
+
+20000a76 <dif_gpio_write_all>:
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:210
+  return kDifOk;
+}
+
+dif_result_t dif_gpio_write_all(const dif_gpio_t *gpio,
+                                dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000a76:       /-- c509                        beqz    a0,20000a80 <dif_gpio_write_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:214
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OUT_REG_OFFSET, state);
+20000a78:       |   4110                        lw      a2,0(a0)
+20000a7a:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+ * @param offset the offset to write at, in bytes.
+ * @param value the value to write.
+ */
+inline void mmio_region_write32(mmio_region_t base, ptrdiff_t offset,
+                                uint32_t value) {
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20000a7c:       |   ca4c                        sw      a1,20(a2)
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:217
+
+  return kDifOk;
+}
+20000a7e:       |   8082                        ret
+20000a80:       \-> 450d                        li      a0,3
+20000a82:           8082                        ret
+
+20000a84 <dif_gpio_write>:
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:90
+  if (gpio == NULL || index >= kDifGpioNumPins) {
+20000a84:              00a036b3                 snez    a3,a0
+20000a88:              0205b713                 sltiu   a4,a1,32
+20000a8c:              8f75                     and     a4,a4,a3
+20000a8e:              468d                     li      a3,3
+20000a90:       /----- c705                     beqz    a4,20000ab8 <dif_gpio_write+0x34>
+20000a92:       |      46c1                     li      a3,16
+20000a94:       |      4861                     li      a6,24
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:96
+  const ptrdiff_t offset = (index < 16) ? reg_lower_offset : reg_upper_offset;
+20000a96:       |  /-- 00d5e363                 bltu    a1,a3,20000a9c <dif_gpio_write+0x18>
+20000a9a:       |  |   4871                     li      a6,28
+20000a9c:       |  \-> 4681                     li      a3,0
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:99
+  const uint32_t mask = index_to_mask(index % 16);
+20000a9e:       |      89bd                     andi    a1,a1,15
+index_to_mask():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:18
+static uint32_t index_to_mask(uint32_t index) { return 1u << index; }
+20000aa0:       |      28b017b3                 bset    a5,zero,a1
+20000aa4:       |      6741                     lui     a4,0x10
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aa6:       |      00b715b3                 sll     a1,a4,a1
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:100
+  mmio_region_write32(gpio->base_addr, offset,
+20000aaa:       |      4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aac:       |      40c00633                 neg     a2,a2
+20000ab0:       |      8e7d                     and     a2,a2,a5
+20000ab2:       |      8dd1                     or      a1,a1,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ab4:       |      9542                     add     a0,a0,a6
+20000ab6:       |      c10c                     sw      a1,0(a0)
+dif_gpio_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:221
+
+dif_result_t dif_gpio_write(const dif_gpio_t *gpio, dif_gpio_pin_t pin,
+                            bool state) {
+  return gpio_masked_bit_write(gpio, GPIO_MASKED_OUT_LOWER_REG_OFFSET,
+20000ab8:       \----> 8536                     mv      a0,a3
+20000aba:              8082                     ret
+
+20000abc <dif_gpio_output_set_enabled_all>:
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:233
+                           GPIO_MASKED_OUT_UPPER_REG_OFFSET, mask, state);
+}
+
+dif_result_t dif_gpio_output_set_enabled_all(const dif_gpio_t *gpio,
+                                             dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000abc:       /-- c509                        beqz    a0,20000ac6 <dif_gpio_output_set_enabled_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:237
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OE_REG_OFFSET, state);
+20000abe:       |   4110                        lw      a2,0(a0)
+20000ac0:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ac2:       |   d20c                        sw      a1,32(a2)
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:240
+
+  return kDifOk;
+}
+20000ac4:       |   8082                        ret
+20000ac6:       \-> 450d                        li      a0,3
+20000ac8:           8082                        ret
+
+20000aca <ottf_machine_ecall_handler>:
+ottf_machine_ecall_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:52
+rand_testutils_rng_t rand_testutils_rng_ctx;
+
+// The OTTF overrides the default machine ecall exception handler to implement
+// FreeRTOS context switching, required for supporting cooperative scheduling.
+void ottf_machine_ecall_handler(uint32_t *exc_info) {
+  if (pxCurrentTCB != NULL) {
+20000aca:           f0001517            auipc   a0,0xf0001
+20000ace:           5e252503            lw      a0,1506(a0) # 100020ac <pxCurrentTCB>
+20000ad2:       /-- c119                        beqz    a0,20000ad8 <ottf_machine_ecall_handler+0xe>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:56
+    // If the pointer to the current TCB is not NULL, we are operating in
+    // concurrency mode. In this case, our default behavior is to assume a
+    // context switch has been requested.
+    vTaskSwitchContext();
+20000ad4:       |   0180306f            j       20003aec <vTaskSwitchContext>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:59
+    return;
+  }
+  LOG_ERROR(
+20000ad8:       \-> 00006517            auipc   a0,0x6
+20000adc:           80c52503            lw      a0,-2036(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000ae0:       /-- c919                        beqz    a0,20000af6 <ottf_machine_ecall_handler+0x2c>
+20000ae2:       |   e000f517            auipc   a0,0xe000f
+20000ae6:       |   51e50513            addi    a0,a0,1310 # 10000 <_chip_info_end>
+20000aea:       |   0a400593            li      a1,164
+20000aee:       |   952e                        add     a0,a0,a1
+20000af0:       |   4581                        li      a1,0
+20000af2:       |   4b50106f            j       200027a6 <base_log_internal_dv>
+20000af6:       \-> 00004517            auipc   a0,0x4
+20000afa:           e1e50513            addi    a0,a0,-482 # 20004914 <ottf_machine_ecall_handler.log_fields>
+20000afe:           40d0106f            j       2000270a <base_log_internal_core>
+
+20000b02 <status_report>:
+status_report():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:100
+static size_t status_report_list_cnt = 0;
+
+// Override the status report function to store it in the array above.
+void status_report(status_t status) {
+  // In case of overflow, we overwrite previous values.
+  status_report_list[status_report_list_cnt % kStatusReportListSize] = status;
+20000b02:       f0001597                auipc   a1,0xf0001
+20000b06:       5725a603                lw      a2,1394(a1) # 10002074 <status_report_list_cnt>
+20000b0a:       00004697                auipc   a3,0x4
+20000b0e:       e1e6a683                lw      a3,-482(a3) # 20004928 <kStatusReportListSize>
+20000b12:       02d676b3                remu    a3,a2,a3
+20000b16:       f0001717                auipc   a4,0xf0001
+20000b1a:       5f270713                addi    a4,a4,1522 # 10002108 <status_report_list>
+20000b1e:       20e6c6b3                sh2add  a3,a3,a4
+20000b22:       c288                    sw      a0,0(a3)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:101
+  status_report_list_cnt++;
+20000b24:       0605                    addi    a2,a2,1
+20000b26:       56c5a923                sw      a2,1394(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:102
+}
+20000b2a:       8082                    ret
+
+20000b2c <_ottf_main>:
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:151
+  result = result && test_main();
+  result = result && manufacturer_post_test_hook();
+  report_test_status(result);
+}
+
+void _ottf_main(void) {
+20000b2c:                 7179                  addi    sp,sp,-48
+20000b2e:                 d606                  sw      ra,44(sp)
+20000b30:                 d422                  sw      s0,40(sp)
+20000b32:                 d226                  sw      s1,36(sp)
+20000b34:                 6511                  lui     a0,0x4
+20000b36:                 35450513              addi    a0,a0,852 # 4354 <_stack_size+0x3d4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:152
+  test_status_set(kTestStatusInTest);
+20000b3a:                 301010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:156
+
+  // Clear reset reason register.
+  dif_rstmgr_t rstmgr;
+  CHECK_DIF_OK(dif_rstmgr_init(
+20000b3e:                 40410537              lui     a0,0x40410
+20000b42:                 100c                  addi    a1,sp,32
+20000b44:                 10f010ef              jal     ra,20002452 <dif_rstmgr_init>
+20000b48:                 00005417              auipc   s0,0x5
+20000b4c:       /-------- cd05                  beqz    a0,20000b84 <_ottf_main+0x58>
+20000b4e:       |         862a                  mv      a2,a0
+20000b50:       |         79c42503              lw      a0,1948(s0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000b54:       |  /----- cd01                  beqz    a0,20000b6c <_ottf_main+0x40>
+20000b56:       |  |      e000f517              auipc   a0,0xe000f
+20000b5a:       |  |      4aa50513              addi    a0,a0,1194 # 10000 <_chip_info_end>
+20000b5e:       |  |      0b800593              li      a1,184
+20000b62:       |  |      952e                  add     a0,a0,a1
+20000b64:       |  |      4585                  li      a1,1
+20000b66:       |  |      441010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000b6a:       |  |  /-- a801                  j       20000b7a <_ottf_main+0x4e>
+20000b6c:       |  \--|-> 00004517              auipc   a0,0x4
+20000b70:       |     |   dc050513              addi    a0,a0,-576 # 2000492c <_ottf_main.log_fields>
+20000b74:       |     |   85b2                  mv      a1,a2
+20000b76:       |     |   395010ef              jal     ra,2000270a <base_log_internal_core>
+20000b7a:       |     \-> 6531                  lui     a0,0xc
+20000b7c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000b80:       |         2bb010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:158
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  if (kOttfTestConfig.clear_reset_reason) {
+20000b84:       \-------> 00004517              auipc   a0,0x4
+20000b88:                 a9c50493              addi    s1,a0,-1380 # 20004620 <kOttfTestConfig>
+20000b8c:                 0114c503              lbu     a0,17(s1)
+20000b90:       /-------- c121                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:159
+    CHECK_DIF_OK(dif_rstmgr_reset_info_clear(&rstmgr));
+20000b92:       |         1008                  addi    a0,sp,32
+20000b94:       |         0cd010ef              jal     ra,20002460 <dif_rstmgr_reset_info_clear>
+20000b98:       +-------- cd05                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+20000b9a:       |         862a                  mv      a2,a0
+20000b9c:       |         79c42503              lw      a0,1948(s0)
+20000ba0:       |  /----- cd01                  beqz    a0,20000bb8 <_ottf_main+0x8c>
+20000ba2:       |  |      e000f517              auipc   a0,0xe000f
+20000ba6:       |  |      45e50513              addi    a0,a0,1118 # 10000 <_chip_info_end>
+20000baa:       |  |      0cc00593              li      a1,204
+20000bae:       |  |      952e                  add     a0,a0,a1
+20000bb0:       |  |      4585                  li      a1,1
+20000bb2:       |  |      3f5010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000bb6:       |  |  /-- a801                  j       20000bc6 <_ottf_main+0x9a>
+20000bb8:       |  \--|-> 00004517              auipc   a0,0x4
+20000bbc:       |     |   d8850513              addi    a0,a0,-632 # 20004940 <_ottf_main.log_fields.5>
+20000bc0:       |     |   85b2                  mv      a1,a2
+20000bc2:       |     |   349010ef              jal     ra,2000270a <base_log_internal_core>
+20000bc6:       |     \-> 6531                  lui     a0,0xc
+20000bc8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000bcc:       |         26f010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:163
+  }
+
+  // Initialize the console to enable logging for non-DV simulation platforms.
+  if (kDeviceType != kDeviceSimDV) {
+20000bd0:       \-------> 00005517              auipc   a0,0x5
+20000bd4:                 6fc52503              lw      a0,1788(a0) # 200062cc <kDeviceType>
+20000bd8:          /----- c91d                  beqz    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:164
+    ottf_console_init();
+20000bda:          |      26b9                  jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:165
+    if (!kOttfTestConfig.silence_console_prints) {
+20000bdc:          |      0124c503              lbu     a0,18(s1)
+20000be0:          +----- e51d                  bnez    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:166
+      LOG_INFO("Running %s", kOttfTestConfig.file);
+20000be2:          |      79c42503              lw      a0,1948(s0)
+20000be6:          |      48d0                  lw      a2,20(s1)
+20000be8:          |  /-- cd01                  beqz    a0,20000c00 <_ottf_main+0xd4>
+20000bea:          |  |   e000f517              auipc   a0,0xe000f
+20000bee:          |  |   41650513              addi    a0,a0,1046 # 10000 <_chip_info_end>
+20000bf2:          |  |   0e000593              li      a1,224
+20000bf6:          |  |   952e                  add     a0,a0,a1
+20000bf8:          |  |   4585                  li      a1,1
+20000bfa:          |  |   3ad010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000bfe:          +--|-- a801                  j       20000c0e <_ottf_main+0xe2>
+20000c00:          |  \-> 00004517              auipc   a0,0x4
+20000c04:          |      d5450513              addi    a0,a0,-684 # 20004954 <_ottf_main.log_fields.8>
+20000c08:          |      85b2                  mv      a1,a2
+20000c0a:          |      301010ef              jal     ra,2000270a <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:173
+  }
+
+  // Initialize a global random number generator testutil context to provide
+  // tests with a source of entropy for randomizing test behaviors.
+  dif_rv_core_ibex_t rv_core_ibex;
+  CHECK_DIF_OK(dif_rv_core_ibex_init(
+20000c0e:          \----> 411f0537              lui     a0,0x411f0
+20000c12:                 082c                  addi    a1,sp,24
+20000c14:                 219010ef              jal     ra,2000262c <dif_rv_core_ibex_init>
+20000c18:       /-------- cd05                  beqz    a0,20000c50 <_ottf_main+0x124>
+20000c1a:       |         862a                  mv      a2,a0
+20000c1c:       |         79c42503              lw      a0,1948(s0)
+20000c20:       |  /----- cd01                  beqz    a0,20000c38 <_ottf_main+0x10c>
+20000c22:       |  |      e000f517              auipc   a0,0xe000f
+20000c26:       |  |      3de50513              addi    a0,a0,990 # 10000 <_chip_info_end>
+20000c2a:       |  |      0f400593              li      a1,244
+20000c2e:       |  |      952e                  add     a0,a0,a1
+20000c30:       |  |      4585                  li      a1,1
+20000c32:       |  |      375010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000c36:       |  |  /-- a801                  j       20000c46 <_ottf_main+0x11a>
+20000c38:       |  \--|-> 00004517              auipc   a0,0x4
+20000c3c:       |     |   d3050513              addi    a0,a0,-720 # 20004968 <_ottf_main.log_fields.11>
+20000c40:       |     |   85b2                  mv      a1,a2
+20000c42:       |     |   2c9010ef              jal     ra,2000270a <base_log_internal_core>
+20000c46:       |     \-> 6531                  lui     a0,0xc
+20000c48:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000c4c:       |         1ef010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:176
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  rand_testutils_rng_ctx = rand_testutils_init(&rv_core_ibex);
+20000c50:       \-------> 850a                  mv      a0,sp
+20000c52:                 082c                  addi    a1,sp,24
+20000c54:                 109010ef              jal     ra,2000255c <rand_testutils_init>
+20000c58:                 f0001517              auipc   a0,0xf0001
+20000c5c:                 49850513              addi    a0,a0,1176 # 100020f0 <rand_testutils_rng_ctx>
+20000c60:                 858a                  mv      a1,sp
+20000c62:                 4661                  li      a2,24
+20000c64:                 462030ef              jal     ra,200040c6 <memcpy>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:179
+
+  // Run the test.
+  if (kOttfTestConfig.enable_concurrency) {
+20000c68:                 0004c503              lbu     a0,0(s1)
+20000c6c:          /----- c11d                  beqz    a0,20000c92 <_ottf_main+0x166>
+ottf_task_create():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:67
+  return xTaskCreate(/*pvTaskCode=*/task_function, /*pcName=*/task_name,
+20000c6e:          |      00000517              auipc   a0,0x0
+20000c72:          |      0a450513              addi    a0,a0,164 # 20000d12 <test_wrapper>
+20000c76:          |      00004597              auipc   a1,0x4
+20000c7a:          |      c1358593              addi    a1,a1,-1005 # 20004889 <test_main.log_fields.21+0x1c5>
+20000c7e:          |      40000613              li      a2,1024
+20000c82:          |      4705                  li      a4,1
+20000c84:          |      4681                  li      a3,0
+20000c86:          |      4781                  li      a5,0
+20000c88:          |      449020ef              jal     ra,200038d0 <xTaskCreate>
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:184
+    // Run `test_main()` in a FreeRTOS task, allowing other FreeRTOS tasks to
+    // be spawned, if requested in the main test task. Note, we spawn the main
+    // test task at a priority level of 0.
+    ottf_task_create(test_wrapper, "test_main", /*task_stack_depth=*/1024, 0);
+    vTaskStartScheduler();
+20000c8c:          |      6eb020ef              jal     ra,20003b76 <vTaskStartScheduler>
+20000c90:          |  /-- a011                  j       20000c94 <_ottf_main+0x168>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:187
+  } else {
+    // Otherwise, launch `test_main()` on bare-metal.
+    test_wrapper(NULL);
+20000c92:          \--|-> 2041                  jal     20000d12 <test_wrapper>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+  }
+
+  // Unreachable.
+  CHECK(false);
+20000c94:             \-> 00004517              auipc   a0,0x4
+20000c98:                 a4450613              addi    a2,a0,-1468 # 200046d8 <test_main.log_fields.21+0x14>
+20000c9c:                 368f05b7              lui     a1,0x368f0
+20000ca0:                 4501                  li      a0,0
+20000ca2:                 4681                  li      a3,0
+20000ca4:                 51e020ef              jal     ra,200031c2 <status_create>
+20000ca8:                 00010023              sb      zero,0(sp)
+20000cac:                 00014583              lbu     a1,0(sp)
+20000cb0:       /-------- e1a1                  bnez    a1,20000cf0 <_ottf_main+0x1c4>
+20000cb2:       |         79c42503              lw      a0,1948(s0)
+20000cb6:       |  /----- cd01                  beqz    a0,20000cce <_ottf_main+0x1a2>
+20000cb8:       |  |      e000f517              auipc   a0,0xe000f
+20000cbc:       |  |      34850513              addi    a0,a0,840 # 10000 <_chip_info_end>
+20000cc0:       |  |      10800593              li      a1,264
+20000cc4:       |  |      952e                  add     a0,a0,a1
+20000cc6:       |  |      4581                  li      a1,0
+20000cc8:       |  |      2df010ef              jal     ra,200027a6 <base_log_internal_dv>
+20000ccc:       |  |  /-- a039                  j       20000cda <_ottf_main+0x1ae>
+20000cce:       |  \--|-> 00004517              auipc   a0,0x4
+20000cd2:       |     |   cae50513              addi    a0,a0,-850 # 2000497c <_ottf_main.log_fields.15>
+20000cd6:       |     |   235010ef              jal     ra,2000270a <base_log_internal_core>
+20000cda:       |     \-> 00004517              auipc   a0,0x4
+20000cde:       |         9fe50613              addi    a2,a0,-1538 # 200046d8 <test_main.log_fields.21+0x14>
+20000ce2:       |         4535                  li      a0,13
+20000ce4:       |         368f05b7              lui     a1,0x368f0
+20000ce8:       |         0bf00693              li      a3,191
+20000cec:       |         4d6020ef              jal     ra,200031c2 <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+ * @param s The status code.
+ * @return `absl_status_t` contained within the status_t.
+ */
+OT_WARN_UNUSED_RESULT
+OT_ALWAYS_INLINE absl_status_t status_err(status_t s) {
+  return s.value < 0 ? (absl_status_t)bitfield_field32_read(
+20000cf0:       \-------> 00052593              slti    a1,a0,0
+20000cf4:                 897d                  andi    a0,a0,31
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+20000cf6:                 00a03533              snez    a0,a0
+20000cfa:                 8d6d                  and     a0,a0,a1
+20000cfc:             /-- c511                  beqz    a0,20000d08 <_ottf_main+0x1dc>
+20000cfe:             |   6531                  lui     a0,0xc
+20000d00:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000d04:             |   137010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:192
+}
+20000d08:             \-> 50b2                  lw      ra,44(sp)
+20000d0a:                 5422                  lw      s0,40(sp)
+20000d0c:                 5492                  lw      s1,36(sp)
+20000d0e:                 6145                  addi    sp,sp,48
+20000d10:                 8082                  ret
+
+20000d12 <test_wrapper>:
+test_wrapper():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:143
+static void test_wrapper(void *task_parameters) {
+20000d12:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:145
+  bool result = manufacturer_pre_test_hook();
+20000d14:                       d606                    sw      ra,44(sp)
+20000d16:                       d422                    sw      s0,40(sp)
+20000d18:                       d226                    sw      s1,36(sp)
+20000d1a:                       d04a                    sw      s2,32(sp)
+20000d1c:                       ce4e                    sw      s3,28(sp)
+20000d1e:                       cc52                    sw      s4,24(sp)
+20000d20:                       ca56                    sw      s5,20(sp)
+20000d22:                       c85a                    sw      s6,16(sp)
+20000d24:                       c65e                    sw      s7,12(sp)
+20000d26:                       c462                    sw      s8,8(sp)
+20000d28:                       24a030ef                jal     ra,20003f72 <manufacturer_pre_test_hook>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:146
+  result = result && test_main();
+20000d2c:                /----- c519                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d2e:                |      34dd                    jal     20000814 <test_main>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:147
+  result = result && manufacturer_post_test_hook();
+20000d30:                +----- c509                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d32:                |      244030ef                jal     ra,20003f76 <manufacturer_post_test_hook>
+20000d36:                |      842a                    mv      s0,a0
+20000d38:                |  /-- a011                    j       20000d3c <test_wrapper+0x2a>
+20000d3a:                \--|-> 4401                    li      s0,0
+report_test_status():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:106
+  if (kDeviceType != kDeviceSimDV) {
+20000d3c:                   \-> 00005517                auipc   a0,0x5
+20000d40:                       59052503                lw      a0,1424(a0) # 200062cc <kDeviceType>
+20000d44:          /----------- cd05                    beqz    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:107
+    if (kOttfTestConfig.console.test_may_clobber) {
+20000d46:          |            00004517                auipc   a0,0x4
+20000d4a:          |            8da50493                addi    s1,a0,-1830 # 20004620 <kOttfTestConfig>
+20000d4e:          |            00c4c503                lbu     a0,12(s1)
+20000d52:          |        /-- c111                    beqz    a0,20000d56 <test_wrapper+0x44>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:108
+      ottf_console_init();
+20000d54:          |        |   2ad1                    jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:110
+    if (!kOttfTestConfig.silence_console_prints) {
+20000d56:          |        \-> 0124c503                lbu     a0,18(s1)
+20000d5a:          +----------- e10d                    bnez    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d5c:          |            00005517                auipc   a0,0x5
+20000d60:          |            58852503                lw      a0,1416(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000d64:          |            48d0                    lw      a2,20(s1)
+20000d66:          |  /-------- cd19                    beqz    a0,20000d84 <test_wrapper+0x72>
+20000d68:          |  |         e000f517                auipc   a0,0xe000f
+20000d6c:          |  |         29850513                addi    a0,a0,664 # 10000 <_chip_info_end>
+20000d70:          |  |         11c00593                li      a1,284
+20000d74:          |  |         952e                    add     a0,a0,a1
+20000d76:          |  |         4585                    li      a1,1
+20000d78:          |  |         22f010ef                jal     ra,200027a6 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d7c:          \--|--/----X cc01                    beqz    s0,20000d94 <test_wrapper+0x82>
+20000d7e:             |  |  /-> 6425                    lui     s0,0x9
+20000d80:             |  |  |   0435                    addi    s0,s0,13
+20000d82:       /-----|--|--|-- a8f1                    j       20000e5e <test_wrapper+0x14c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d84:       |     \--|--|-> 00004517                auipc   a0,0x4
+20000d88:       |        |  |   c0c50513                addi    a0,a0,-1012 # 20004990 <report_test_status.log_fields>
+20000d8c:       |        |  |   85b2                    mv      a1,a2
+20000d8e:       |        |  |   17d010ef                jal     ra,2000270a <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d92:       |        |  \-- f475                    bnez    s0,20000d7e <test_wrapper+0x6c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:118
+    LOG_INFO("Status reported by the test:");
+20000d94:       |        \----> 00005517                auipc   a0,0x5
+20000d98:       |               55052983                lw      s3,1360(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000d9c:       |        /----- 00098d63                beqz    s3,20000db6 <test_wrapper+0xa4>
+20000da0:       |        |      e000f517                auipc   a0,0xe000f
+20000da4:       |        |      26050513                addi    a0,a0,608 # 10000 <_chip_info_end>
+20000da8:       |        |      13000593                li      a1,304
+20000dac:       |        |      952e                    add     a0,a0,a1
+20000dae:       |        |      4581                    li      a1,0
+20000db0:       |        |      1f7010ef                jal     ra,200027a6 <base_log_internal_dv>
+20000db4:       |        |  /-- a039                    j       20000dc2 <test_wrapper+0xb0>
+20000db6:       |        \--|-> 00004517                auipc   a0,0x4
+20000dba:       |           |   bee50513                addi    a0,a0,-1042 # 200049a4 <report_test_status.log_fields.20>
+20000dbe:       |           |   14d010ef                jal     ra,2000270a <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:120
+    size_t print_cnt = status_report_list_cnt;
+20000dc2:       |           \-> f0001a97                auipc   s5,0xf0001
+20000dc6:       |               2b2aa503                lw      a0,690(s5) # 10002074 <status_report_list_cnt>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:121
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000dca:       |               00004597                auipc   a1,0x4
+20000dce:       |               b5e5ab03                lw      s6,-1186(a1) # 20004928 <kStatusReportListSize>
+20000dd2:       |               0b655bb3                minu    s7,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000dd6:       |  /----------- 040b8c63                beqz    s7,20000e2e <test_wrapper+0x11c>
+20000dda:       |  |            4405                    li      s0,1
+20000ddc:       |  |            54fd                    li      s1,-1
+20000dde:       |  |            f0001517                auipc   a0,0xf0001
+20000de2:       |  |            32a50c13                addi    s8,a0,810 # 10002108 <status_report_list>
+20000de6:       |  |            00004517                auipc   a0,0x4
+20000dea:       |  |            bd250913                addi    s2,a0,-1070 # 200049b8 <report_test_status.log_fields.23>
+20000dee:       |  |            e000f517                auipc   a0,0xe000f
+20000df2:       |  |            21250a13                addi    s4,a0,530 # 10000 <_chip_info_end>
+20000df6:       |  |            14400513                li      a0,324
+20000dfa:       |  |            9a2a                    add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:126
+      size_t idx = (status_report_list_cnt - i) % kStatusReportListSize;
+20000dfc:       |  |  /-------> 2b2aa503                lw      a0,690(s5)
+20000e00:       |  |  |         9526                    add     a0,a0,s1
+20000e02:       |  |  |         03657533                remu    a0,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:127
+      LOG_INFO("- %r", status_report_list[idx]);
+20000e06:       |  |  |         21854533                sh2add  a0,a0,s8
+20000e0a:       |  |  |         4110                    lw      a2,0(a0)
+20000e0c:       |  |  |  /----- 00098763                beqz    s3,20000e1a <test_wrapper+0x108>
+20000e10:       |  |  |  |      4585                    li      a1,1
+20000e12:       |  |  |  |      8552                    mv      a0,s4
+20000e14:       |  |  |  |      193010ef                jal     ra,200027a6 <base_log_internal_dv>
+20000e18:       |  |  |  |  /-- a029                    j       20000e22 <test_wrapper+0x110>
+20000e1a:       |  |  |  \--|-> 854a                    mv      a0,s2
+20000e1c:       |  |  |     |   85b2                    mv      a1,a2
+20000e1e:       |  |  |     |   0ed010ef                jal     ra,2000270a <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000e22:       |  |  |     \-> 0405                    addi    s0,s0,1
+20000e24:       |  |  |         14fd                    addi    s1,s1,-1
+20000e26:       |  |  \-------- fc8bfbe3                bgeu    s7,s0,20000dfc <test_wrapper+0xea>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:130
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000e2a:       |  |            2b2aa503                lw      a0,690(s5)
+20000e2e:       |  \-----/----X 02ab7563                bgeu    s6,a0,20000e58 <test_wrapper+0x146>
+20000e32:       |        |  /-- 00098d63                beqz    s3,20000e4c <test_wrapper+0x13a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:131
+      LOG_INFO(
+20000e36:       |        |  |   e000f517                auipc   a0,0xe000f
+20000e3a:       |        |  |   1ca50513                addi    a0,a0,458 # 10000 <_chip_info_end>
+20000e3e:       |        |  |   15800593                li      a1,344
+20000e42:       |        |  |   952e                    add     a0,a0,a1
+20000e44:       |        |  |   4581                    li      a1,0
+20000e46:       |        |  |   161010ef                jal     ra,200027a6 <base_log_internal_dv>
+20000e4a:       |        +--|-- a039                    j       20000e58 <test_wrapper+0x146>
+20000e4c:       |        |  \-> 00004517                auipc   a0,0x4
+20000e50:       |        |      b8050513                addi    a0,a0,-1152 # 200049cc <report_test_status.log_fields.26>
+20000e54:       |        |      0b7010ef                jal     ra,2000270a <base_log_internal_core>
+20000e58:       |        \----> 6531                    lui     a0,0xc
+20000e5a:       |               aad50413                addi    s0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:136
+  coverage_send_buffer();
+20000e5e:       \-------------> 2839                    jal     20000e7c <coverage_send_buffer>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:137
+  test_status_set(result ? kTestStatusPassed : kTestStatusFailed);
+20000e60:                       8522                    mv      a0,s0
+20000e62:                       50b2                    lw      ra,44(sp)
+20000e64:                       5422                    lw      s0,40(sp)
+20000e66:                       5492                    lw      s1,36(sp)
+20000e68:                       5902                    lw      s2,32(sp)
+20000e6a:                       49f2                    lw      s3,28(sp)
+20000e6c:                       4a62                    lw      s4,24(sp)
+20000e6e:                       4ad2                    lw      s5,20(sp)
+20000e70:                       4b42                    lw      s6,16(sp)
+20000e72:                       4bb2                    lw      s7,12(sp)
+20000e74:                       4c22                    lw      s8,8(sp)
+20000e76:                       6145                    addi    sp,sp,48
+20000e78:                       7c20106f                j       2000263a <test_status_set>
+
+20000e7c <coverage_send_buffer>:
+coverage_send_buffer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/coverage_none.c:9
+
+#include "sw/device/lib/testing/test_framework/coverage.h"
+
+// This NOP function gets linked in when coverage is disabled. See
+// `test_coverage_llvm.c` for its actual definition when coverage is enabled.
+void coverage_send_buffer(void) {}
+20000e7c:       8082                    ret
+
+20000e7e <vApplicationMallocFailedHook>:
+vApplicationMallocFailedHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:18
+
+/**
+ * This is called if configUSE_MALLOC_FAILED_HOOK is set to 1 in
+ * FreeRTOSConfig.h, and a call to pvPortMalloc() fails.
+ */
+void vApplicationMallocFailedHook(void) {
+20000e7e:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:19
+  LOG_INFO("%s",
+20000e80:              c606                     sw      ra,12(sp)
+20000e82:              00005517                 auipc   a0,0x5
+20000e86:              46252503                 lw      a0,1122(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000e8a:          /-- ed01                     bnez    a0,20000ea2 <vApplicationMallocFailedHook+0x24>
+20000e8c:          |   00004517                 auipc   a0,0x4
+20000e90:          |   c0450513                 addi    a0,a0,-1020 # 20004a90 <vApplicationMallocFailedHook.log_fields>
+20000e94:          |   00004597                 auipc   a1,0x4
+20000e98:          |   b8258593                 addi    a1,a1,-1150 # 20004a16 <report_test_status.log_fields.26+0x4a>
+20000e9c:          |   06f010ef                 jal     ra,2000270a <base_log_internal_core>
+20000ea0:       /--|-- a839                     j       20000ebe <vApplicationMallocFailedHook+0x40>
+20000ea2:       |  \-> e000f517                 auipc   a0,0xe000f
+20000ea6:       |      15e50513                 addi    a0,a0,350 # 10000 <_chip_info_end>
+20000eaa:       |      16c00593                 li      a1,364
+20000eae:       |      952e                     add     a0,a0,a1
+20000eb0:       |      00004597                 auipc   a1,0x4
+20000eb4:       |      b6658613                 addi    a2,a1,-1178 # 20004a16 <report_test_status.log_fields.26+0x4a>
+20000eb8:       |      4585                     li      a1,1
+20000eba:       |      0ed010ef                 jal     ra,200027a6 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:21
+           "FreeRTOS malloc failed. Increase heap size in FreeRTOSConfig.h");
+  irq_global_ctrl(false);
+20000ebe:       \----> 4501                     li      a0,0
+20000ec0:              603000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:22
+  abort();
+20000ec4:              12e030ef                 jal     ra,20003ff2 <abort>
+
+20000ec8 <vApplicationStackOverflowHook>:
+vApplicationStackOverflowHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:29
+
+/**
+ * This is called if configCHECK_FOR_STACK_OVERFLOW is set to 1 or 2 in
+ * FreeRTOSConfig.h, and a task detects a stack overflow.
+ */
+void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
+20000ec8:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:30
+  LOG_INFO("FreeRTOS stack overflow. Increase stack size of task: %s",
+20000eca:              c606                     sw      ra,12(sp)
+20000ecc:              00005517                 auipc   a0,0x5
+20000ed0:              41852503                 lw      a0,1048(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000ed4:              862e                     mv      a2,a1
+20000ed6:          /-- e909                     bnez    a0,20000ee8 <vApplicationStackOverflowHook+0x20>
+20000ed8:          |   00004517                 auipc   a0,0x4
+20000edc:          |   bcc50513                 addi    a0,a0,-1076 # 20004aa4 <vApplicationStackOverflowHook.log_fields>
+20000ee0:          |   85b2                     mv      a1,a2
+20000ee2:          |   029010ef                 jal     ra,2000270a <base_log_internal_core>
+20000ee6:       /--|-- a819                     j       20000efc <vApplicationStackOverflowHook+0x34>
+20000ee8:       |  \-> e000f517                 auipc   a0,0xe000f
+20000eec:       |      11850513                 addi    a0,a0,280 # 10000 <_chip_info_end>
+20000ef0:       |      18000593                 li      a1,384
+20000ef4:       |      952e                     add     a0,a0,a1
+20000ef6:       |      4585                     li      a1,1
+20000ef8:       |      0af010ef                 jal     ra,200027a6 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:32
+           pcTaskName);
+  irq_global_ctrl(false);
+20000efc:       \----> 4501                     li      a0,0
+20000efe:              5c5000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:33
+  abort();
+20000f02:              0f0030ef                 jal     ra,20003ff2 <abort>
+
+20000f06 <xPortStartScheduler>:
+xPortStartScheduler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:93
+// ----------------------------------------------------------------------------
+// Scheduler Setup
+// ----------------------------------------------------------------------------
+extern void xPortStartFirstTask(void);
+
+BaseType_t xPortStartScheduler(void) {
+20000f06:       1141                    addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:97
+#if configUSE_PREEMPTION
+  vPortSetupTimerInterrupt();
+#endif  // configUSE_PREEMPTION
+  irq_timer_ctrl(true);
+20000f08:       c606                    sw      ra,12(sp)
+20000f0a:       4505                    li      a0,1
+20000f0c:       5df000ef                jal     ra,20001cea <irq_timer_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:98
+  irq_external_ctrl(true);
+20000f10:       4505                    li      a0,1
+20000f12:       5c3000ef                jal     ra,20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:99
+  irq_software_ctrl(true);
+20000f16:       4505                    li      a0,1
+20000f18:       5e9000ef                jal     ra,20001d00 <irq_software_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:103
+  // Note: no need to call 'irq_global_ctrl(true)' since the global interrupt
+  // enable is set in the xPortStartFirstTask sub-routine in
+  // sw/device/lib/testing/test_framework/freertos_port.S.
+  xPortStartFirstTask();
+20000f1c:       e2cff0ef                jal     ra,20000548 <xPortStartFirstTask>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:106
+
+  // Unreachable.
+  return pdFAIL;
+20000f20:       4501                    li      a0,0
+20000f22:       40b2                    lw      ra,12(sp)
+20000f24:       0141                    addi    sp,sp,16
+20000f26:       8082                    ret
+
+20000f28 <ottf_console_init>:
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:123
+        i * ARRAYSIZE(kEmptyPattern), ARRAYSIZE(kEmptyPattern), kEmptyPattern));
+  }
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+}
+
+void ottf_console_init(void) {
+20000f28:                                1141                   addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  // Initialize/Configure the console device.
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f2a:                                c606                   sw      ra,12(sp)
+20000f2c:                                c422                   sw      s0,8(sp)
+20000f2e:                                00003517               auipc   a0,0x3
+20000f32:                                6f250593               addi    a1,a0,1778 # 20004620 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f36:                                41c8                   lw      a0,4(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f38:                                4580                   lw      s0,8(a1)
+20000f3a:                                4585                   li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f3c:                            /-- 04b50663               beq     a0,a1,20000f88 <ottf_console_init+0x60>
+20000f40:                         /--|-- e52d                   bnez    a0,20000faa <ottf_console_init+0x82>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:130
+    case kOttfConsoleUart:
+      // Set a default for the console base address if the base address is not
+      // configured. The default is to use UART0.
+      if (base_addr == 0) {
+20000f42:       /-----------------|--|-- 12041263               bnez    s0,20001066 <ottf_console_init+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20000f46:       |                 |  |   00004517               auipc   a0,0x4
+20000f4a:       |                 |  |   b7250613               addi    a2,a0,-1166 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20000f4e:       |                 |  |   0e8f05b7               lui     a1,0xe8f0
+20000f52:       |                 |  |   4501                   li      a0,0
+20000f54:       |                 |  |   4681                   li      a3,0
+20000f56:       |                 |  |   26c020ef               jal     ra,200031c2 <status_create>
+20000f5a:       |                 |  |   4585                   li      a1,1
+20000f5c:       |                 |  |   00b103a3               sb      a1,7(sp)
+20000f60:       |                 |  |   00714583               lbu     a1,7(sp)
+20000f64:       |  /--------------|--|-- 0e059363               bnez    a1,2000104a <ottf_console_init+0x122>
+20000f68:       |  |              |  |   00005517               auipc   a0,0x5
+20000f6c:       |  |              |  |   37c52503               lw      a0,892(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000f70:       |  |     /--------|--|-- cd45                   beqz    a0,20001028 <ottf_console_init+0x100>
+20000f72:       |  |     |        |  |   e000f517               auipc   a0,0xe000f
+20000f76:       |  |     |        |  |   08e50513               addi    a0,a0,142 # 10000 <_chip_info_end>
+20000f7a:       |  |     |        |  |   19400593               li      a1,404
+20000f7e:       |  |     |        |  |   952e                   add     a0,a0,a1
+20000f80:       |  |     |        |  |   4581                   li      a1,0
+20000f82:       |  |     |        |  |   025010ef               jal     ra,200027a6 <base_log_internal_dv>
+20000f86:       |  |     |  /-----|--|-- a07d                   j       20001034 <ottf_console_init+0x10c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:140
+      ottf_console_configure_uart(base_addr);
+      sink = get_uart_sink();
+      getc = uart_getc;
+      break;
+    case (kOttfConsoleSpiDevice):
+      ottf_console_configure_spi_device(base_addr);
+20000f88:       |  |     |  |     |  \-> 8522                   mv      a0,s0
+20000f8a:       |  |     |  |     |      2ead                   jal     20001304 <ottf_console_configure_spi_device>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:141
+      sink = get_spi_device_sink();
+20000f8c:       |  |     |  |     |      051010ef               jal     ra,200027dc <get_spi_device_sink>
+20000f90:       |  |     |  |     |      f0001597               auipc   a1,0xf0001
+20000f94:       |  |     |  |     |      0ea5a623               sw      a0,236(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:142
+      getc = spi_device_getc;
+20000f98:       |  |     |  |     |      f0001517               auipc   a0,0xf0001
+20000f9c:       |  |     |  |     |      00000597               auipc   a1,0x0
+20000fa0:       |  |     |  |     |      67e58593               addi    a1,a1,1662 # 2000161a <spi_device_getc>
+20000fa4:       |  |     |  |     |      0eb52423               sw      a1,232(a0) # 10002080 <getc>
+20000fa8:       |  |  /--|--|-----|----- a8f9                   j       20001086 <ottf_console_init+0x15e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+      break;
+    default:
+      CHECK(false, "unsupported OTTF console interface.");
+20000faa:       |  |  |  |  |     \----> 00004517               auipc   a0,0x4
+20000fae:       |  |  |  |  |            b0e50613               addi    a2,a0,-1266 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20000fb2:       |  |  |  |  |            0e8f05b7               lui     a1,0xe8f0
+20000fb6:       |  |  |  |  |            4501                   li      a0,0
+20000fb8:       |  |  |  |  |            4681                   li      a3,0
+20000fba:       |  |  |  |  |            208020ef               jal     ra,200031c2 <status_create>
+20000fbe:       |  |  |  |  |            00010323               sb      zero,6(sp)
+20000fc2:       |  |  |  |  |            00614583               lbu     a1,6(sp)
+20000fc6:       |  |  |  |  |  /-------- e1b1                   bnez    a1,2000100a <ottf_console_init+0xe2>
+20000fc8:       |  |  |  |  |  |         00005517               auipc   a0,0x5
+20000fcc:       |  |  |  |  |  |         31c52503               lw      a0,796(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20000fd0:       |  |  |  |  |  |  /----- cd01                   beqz    a0,20000fe8 <ottf_console_init+0xc0>
+20000fd2:       |  |  |  |  |  |  |      e000f517               auipc   a0,0xe000f
+20000fd6:       |  |  |  |  |  |  |      02e50513               addi    a0,a0,46 # 10000 <_chip_info_end>
+20000fda:       |  |  |  |  |  |  |      1a800593               li      a1,424
+20000fde:       |  |  |  |  |  |  |      952e                   add     a0,a0,a1
+20000fe0:       |  |  |  |  |  |  |      4581                   li      a1,0
+20000fe2:       |  |  |  |  |  |  |      7c4010ef               jal     ra,200027a6 <base_log_internal_dv>
+20000fe6:       |  |  |  |  |  |  |  /-- a039                   j       20000ff4 <ottf_console_init+0xcc>
+20000fe8:       |  |  |  |  |  |  \--|-> 00004517               auipc   a0,0x4
+20000fec:       |  |  |  |  |  |     |   67450513               addi    a0,a0,1652 # 2000565c <ottf_console_init.log_fields.4>
+20000ff0:       |  |  |  |  |  |     |   71a010ef               jal     ra,2000270a <base_log_internal_core>
+20000ff4:       |  |  |  |  |  |     \-> 00004517               auipc   a0,0x4
+20000ff8:       |  |  |  |  |  |         ac450613               addi    a2,a0,-1340 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20000ffc:       |  |  |  |  |  |         4535                   li      a0,13
+20000ffe:       |  |  |  |  |  |         0e8f05b7               lui     a1,0xe8f0
+20001002:       |  |  |  |  |  |         09100693               li      a3,145
+20001006:       |  |  |  |  |  |         1bc020ef               jal     ra,200031c2 <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000100a:       |  |  |  |  |  \-------> 00052593               slti    a1,a0,0
+2000100e:       |  |  |  |  |            897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+20001010:       |  |  |  |  |            00a03533               snez    a0,a0
+20001014:       |  |  |  |  |            8d6d                   and     a0,a0,a1
+20001016:       |  |  +--|--|----------- c925                   beqz    a0,20001086 <ottf_console_init+0x15e>
+20001018:       |  |  |  |  |            6531                   lui     a0,0xc
+2000101a:       |  |  |  |  |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000101e:       |  |  |  |  |            40b2                   lw      ra,12(sp)
+20001020:       |  |  |  |  |            4422                   lw      s0,8(sp)
+20001022:       |  |  |  |  |            0141                   addi    sp,sp,16
+20001024:       |  |  |  |  |            6160106f               j       2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20001028:       |  |  |  \--|----------> 00004517               auipc   a0,0x4
+2000102c:       |  |  |     |            62050513               addi    a0,a0,1568 # 20005648 <ottf_console_init.log_fields>
+20001030:       |  |  |     |            6da010ef               jal     ra,2000270a <base_log_internal_core>
+20001034:       |  |  |     \----------> 00004517               auipc   a0,0x4
+20001038:       |  |  |                  a8450613               addi    a2,a0,-1404 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+2000103c:       |  |  |                  4535                   li      a0,13
+2000103e:       |  |  |                  0e8f05b7               lui     a1,0xe8f0
+20001042:       |  |  |                  08300693               li      a3,131
+20001046:       |  |  |                  17c020ef               jal     ra,200031c2 <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000104a:       |  \--|----------------> 00052593               slti    a1,a0,0
+2000104e:       |     |                  897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+20001050:       |     |                  00a03533               snez    a0,a0
+20001054:       |     |                  8d6d                   and     a0,a0,a1
+20001056:       |     |                  40000437               lui     s0,0x40000
+2000105a:       +-----|----------------- c511                   beqz    a0,20001066 <ottf_console_init+0x13e>
+2000105c:       |     |                  6531                   lui     a0,0xc
+2000105e:       |     |                  aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001062:       |     |                  5d8010ef               jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:135
+      ottf_console_configure_uart(base_addr);
+20001066:       \-----|----------------> 8522                   mv      a0,s0
+20001068:             |                  201d                   jal     2000108e <ottf_console_configure_uart>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:136
+      sink = get_uart_sink();
+2000106a:             |                  10f010ef               jal     ra,20002978 <get_uart_sink>
+2000106e:             |                  f0001597               auipc   a1,0xf0001
+20001072:             |                  00a5a723               sw      a0,14(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:137
+      getc = uart_getc;
+20001076:             |                  f0001517               auipc   a0,0xf0001
+2000107a:             |                  00000597               auipc   a1,0x0
+2000107e:             |                  1e858593               addi    a1,a1,488 # 20001262 <uart_getc>
+20001082:             |                  00b52523               sw      a1,10(a0) # 10002080 <getc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:148
+      break;
+  }
+}
+20001086:             \----------------> 40b2                   lw      ra,12(sp)
+20001088:                                4422                   lw      s0,8(sp)
+2000108a:                                0141                   addi    sp,sp,16
+2000108c:                                8082                   ret
+
+2000108e <ottf_console_configure_uart>:
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:150
+
+void ottf_console_configure_uart(uintptr_t base_addr) {
+2000108e:                 7179                  addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:151
+  CHECK_DIF_OK(
+20001090:                 d606                  sw      ra,44(sp)
+20001092:                 d422                  sw      s0,40(sp)
+20001094:                 d226                  sw      s1,36(sp)
+20001096:                 d04a                  sw      s2,32(sp)
+20001098:                 f0001597              auipc   a1,0xf0001
+2000109c:                 fe058593              addi    a1,a1,-32 # 10002078 <ottf_console_uart>
+200010a0:                 5ca020ef              jal     ra,2000366a <dif_uart_init>
+200010a4:                 00005917              auipc   s2,0x5
+200010a8:       /-------- cd05                  beqz    a0,200010e0 <ottf_console_configure_uart+0x52>
+200010aa:       |         862a                  mv      a2,a0
+200010ac:       |         24092503              lw      a0,576(s2) # 200062e4 <kDeviceLogBypassUartAddress>
+200010b0:       |  /----- cd01                  beqz    a0,200010c8 <ottf_console_configure_uart+0x3a>
+200010b2:       |  |      e000f517              auipc   a0,0xe000f
+200010b6:       |  |      f4e50513              addi    a0,a0,-178 # 10000 <_chip_info_end>
+200010ba:       |  |      1bc00593              li      a1,444
+200010be:       |  |      952e                  add     a0,a0,a1
+200010c0:       |  |      4585                  li      a1,1
+200010c2:       |  |      6e4010ef              jal     ra,200027a6 <base_log_internal_dv>
+200010c6:       |  |  /-- a801                  j       200010d6 <ottf_console_configure_uart+0x48>
+200010c8:       |  \--|-> 00004517              auipc   a0,0x4
+200010cc:       |     |   5a850513              addi    a0,a0,1448 # 20005670 <ottf_console_configure_uart.log_fields>
+200010d0:       |     |   85b2                  mv      a1,a2
+200010d2:       |     |   638010ef              jal     ra,2000270a <base_log_internal_core>
+200010d6:       |     \-> 6531                  lui     a0,0xc
+200010d8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200010dc:       |         55e010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+      dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart));
+  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
+200010e0:       \-------> 00004517              auipc   a0,0x4
+200010e4:                 9d850613              addi    a2,a0,-1576 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+200010e8:                 0e8f05b7              lui     a1,0xe8f0
+200010ec:                 4501                  li      a0,0
+200010ee:                 4681                  li      a3,0
+200010f0:                 0d2020ef              jal     ra,200031c2 <status_create>
+200010f4:                 00005597              auipc   a1,0x5
+200010f8:                 1e458493              addi    s1,a1,484 # 200062d8 <kUartBaudrate>
+200010fc:                 40cc                  lw      a1,4(s1)
+200010fe:                 0015b593              seqz    a1,a1
+20001102:                 00b10023              sb      a1,0(sp)
+20001106:                 00014583              lbu     a1,0(sp)
+2000110a:       /-------- e1a1                  bnez    a1,2000114a <ottf_console_configure_uart+0xbc>
+2000110c:       |         24092503              lw      a0,576(s2)
+20001110:       |  /----- cd01                  beqz    a0,20001128 <ottf_console_configure_uart+0x9a>
+20001112:       |  |      e000f517              auipc   a0,0xe000f
+20001116:       |  |      eee50513              addi    a0,a0,-274 # 10000 <_chip_info_end>
+2000111a:       |  |      1d000593              li      a1,464
+2000111e:       |  |      952e                  add     a0,a0,a1
+20001120:       |  |      4581                  li      a1,0
+20001122:       |  |      684010ef              jal     ra,200027a6 <base_log_internal_dv>
+20001126:       |  |  /-- a039                  j       20001134 <ottf_console_configure_uart+0xa6>
+20001128:       |  \--|-> 00004517              auipc   a0,0x4
+2000112c:       |     |   55c50513              addi    a0,a0,1372 # 20005684 <ottf_console_configure_uart.log_fields.9>
+20001130:       |     |   5da010ef              jal     ra,2000270a <base_log_internal_core>
+20001134:       |     \-> 00004517              auipc   a0,0x4
+20001138:       |         98450613              addi    a2,a0,-1660 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+2000113c:       |         4535                  li      a0,13
+2000113e:       |         0e8f05b7              lui     a1,0xe8f0
+20001142:       |         09900693              li      a3,153
+20001146:       |         07c020ef              jal     ra,200031c2 <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000114a:       \-------> 00052593              slti    a1,a0,0
+2000114e:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+20001150:                 00a03533              snez    a0,a0
+20001154:                 8d6d                  and     a0,a0,a1
+20001156:             /-- c511                  beqz    a0,20001162 <ottf_console_configure_uart+0xd4>
+20001158:             |   6531                  lui     a0,0xc
+2000115a:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000115e:             |   4dc010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
+20001162:             \-> 00004517              auipc   a0,0x4
+20001166:                 95650613              addi    a2,a0,-1706 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+2000116a:                 0e8f05b7              lui     a1,0xe8f0
+2000116e:                 4501                  li      a0,0
+20001170:                 4681                  li      a3,0
+20001172:                 050020ef              jal     ra,200031c2 <status_create>
+20001176:                 00005597              auipc   a1,0x5
+2000117a:                 15a58413              addi    s0,a1,346 # 200062d0 <kClockFreqPeripheralHz>
+2000117e:                 404c                  lw      a1,4(s0)
+20001180:                 0015b593              seqz    a1,a1
+20001184:                 00b10023              sb      a1,0(sp)
+20001188:                 00014583              lbu     a1,0(sp)
+2000118c:       /-------- e1a1                  bnez    a1,200011cc <ottf_console_configure_uart+0x13e>
+2000118e:       |         24092503              lw      a0,576(s2)
+20001192:       |  /----- cd01                  beqz    a0,200011aa <ottf_console_configure_uart+0x11c>
+20001194:       |  |      e000f517              auipc   a0,0xe000f
+20001198:       |  |      e6c50513              addi    a0,a0,-404 # 10000 <_chip_info_end>
+2000119c:       |  |      1e400593              li      a1,484
+200011a0:       |  |      952e                  add     a0,a0,a1
+200011a2:       |  |      4581                  li      a1,0
+200011a4:       |  |      602010ef              jal     ra,200027a6 <base_log_internal_dv>
+200011a8:       |  |  /-- a039                  j       200011b6 <ottf_console_configure_uart+0x128>
+200011aa:       |  \--|-> 00004517              auipc   a0,0x4
+200011ae:       |     |   4ee50513              addi    a0,a0,1262 # 20005698 <ottf_console_configure_uart.log_fields.12>
+200011b2:       |     |   558010ef              jal     ra,2000270a <base_log_internal_core>
+200011b6:       |     \-> 00004517              auipc   a0,0x4
+200011ba:       |         90250613              addi    a2,a0,-1790 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+200011be:       |         4535                  li      a0,13
+200011c0:       |         0e8f05b7              lui     a1,0xe8f0
+200011c4:       |         09b00693              li      a3,155
+200011c8:       |         7fb010ef              jal     ra,200031c2 <status_create>
+200011cc:       \-------> 4084                  lw      s1,0(s1)
+200011ce:                 4000                  lw      s0,0(s0)
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200011d0:                 00052593              slti    a1,a0,0
+200011d4:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+200011d6:                 00a03533              snez    a0,a0
+200011da:                 8d6d                  and     a0,a0,a1
+200011dc:             /-- c511                  beqz    a0,200011e8 <ottf_console_configure_uart+0x15a>
+200011de:             |   6531                  lui     a0,0xc
+200011e0:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200011e4:             |   456010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:156
+        "kClockFreqPeripheralHz must fit in uint32_t");
+  CHECK_DIF_OK(dif_uart_configure(
+200011e8:             \-> c026                  sw      s1,0(sp)
+200011ea:                 c222                  sw      s0,4(sp)
+200011ec:                 c402                  sw      zero,8(sp)
+200011ee:                 4505                  li      a0,1
+200011f0:                 c62a                  sw      a0,12(sp)
+200011f2:                 c82a                  sw      a0,16(sp)
+200011f4:                 ca2a                  sw      a0,20(sp)
+200011f6:                 cc02                  sw      zero,24(sp)
+200011f8:                 f0001517              auipc   a0,0xf0001
+200011fc:                 e8050513              addi    a0,a0,-384 # 10002078 <ottf_console_uart>
+20001200:                 858a                  mv      a1,sp
+20001202:                 518020ef              jal     ra,2000371a <dif_uart_configure>
+20001206:       /-------- cd05                  beqz    a0,2000123e <ottf_console_configure_uart+0x1b0>
+20001208:       |         862a                  mv      a2,a0
+2000120a:       |         24092503              lw      a0,576(s2)
+2000120e:       |  /----- cd01                  beqz    a0,20001226 <ottf_console_configure_uart+0x198>
+20001210:       |  |      e000f517              auipc   a0,0xe000f
+20001214:       |  |      df050513              addi    a0,a0,-528 # 10000 <_chip_info_end>
+20001218:       |  |      1f800593              li      a1,504
+2000121c:       |  |      952e                  add     a0,a0,a1
+2000121e:       |  |      4585                  li      a1,1
+20001220:       |  |      586010ef              jal     ra,200027a6 <base_log_internal_dv>
+20001224:       |  |  /-- a801                  j       20001234 <ottf_console_configure_uart+0x1a6>
+20001226:       |  \--|-> 00004517              auipc   a0,0x4
+2000122a:       |     |   48650513              addi    a0,a0,1158 # 200056ac <ottf_console_configure_uart.log_fields.16>
+2000122e:       |     |   85b2                  mv      a1,a2
+20001230:       |     |   4da010ef              jal     ra,2000270a <base_log_internal_core>
+20001234:       |     \-> 6531                  lui     a0,0xc
+20001236:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000123a:       |         400010ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:165
+                              .parity_enable = kDifToggleDisabled,
+                              .parity = kDifUartParityEven,
+                              .tx_enable = kDifToggleEnabled,
+                              .rx_enable = kDifToggleEnabled,
+                          }));
+  base_uart_stdout(&ottf_console_uart);
+2000123e:       \-------> f0001517              auipc   a0,0xf0001
+20001242:                 e3a50513              addi    a0,a0,-454 # 10002078 <ottf_console_uart>
+20001246:                 79e010ef              jal     ra,200029e4 <base_uart_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:168
+
+  // Initialize/Configure console flow control (if requested).
+  if (kOttfTestConfig.enable_uart_flow_control) {
+2000124a:                 00003517              auipc   a0,0x3
+2000124e:                 3e654503              lbu     a0,998(a0) # 20004630 <kOttfTestConfig+0x10>
+20001252:             /-- c111                  beqz    a0,20001256 <ottf_console_configure_uart+0x1c8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:169
+    ottf_console_flow_control_enable();
+20001254:             |   29dd                  jal     2000174a <ottf_console_flow_control_enable>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:171
+  }
+}
+20001256:             \-> 50b2                  lw      ra,44(sp)
+20001258:                 5422                  lw      s0,40(sp)
+2000125a:                 5492                  lw      s1,36(sp)
+2000125c:                 5902                  lw      s2,32(sp)
+2000125e:                 6145                  addi    sp,sp,48
+20001260:                 8082                  ret
+
+20001262 <uart_getc>:
+uart_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:72
+static status_t uart_getc(void *io) {
+20001262:                 1101                  addi    sp,sp,-32
+20001264:                 ce06                  sw      ra,28(sp)
+20001266:                 cc22                  sw      s0,24(sp)
+20001268:                 ca26                  sw      s1,20(sp)
+2000126a:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+2000126c:                 01310593              addi    a1,sp,19
+20001270:                 614020ef              jal     ra,20003884 <dif_uart_byte_receive_polled>
+20001274:                 c62a                  sw      a0,12(sp)
+20001276:                 0028                  addi    a0,sp,8
+20001278:                 006c                  addi    a1,sp,12
+2000127a:                 4611                  li      a2,4
+2000127c:                 64b020ef              jal     ra,200040c6 <memcpy>
+20001280:                 4522                  lw      a0,8(sp)
+20001282:                 00153593              seqz    a1,a0
+20001286:                 15fd                  addi    a1,a1,-1
+20001288:                 04b5f693              andi    a3,a1,75
+2000128c:                 00004597              auipc   a1,0x4
+20001290:                 82c58613              addi    a2,a1,-2004 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001294:                 0e8f05b7              lui     a1,0xe8f0
+20001298:                 72b010ef              jal     ra,200031c2 <status_create>
+2000129c:             /-- 02054563              bltz    a0,200012c6 <uart_getc+0x64>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012a0:             |   4585                  li      a1,1
+200012a2:             |   8526                  mv      a0,s1
+200012a4:             |   6da000ef              jal     ra,2000197e <ottf_console_flow_control>
+200012a8:          /--|-- 02054a63              bltz    a0,200012dc <uart_getc+0x7a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:77
+  return OK_STATUS(byte);
+200012ac:          |  |   01314683              lbu     a3,19(sp)
+200012b0:          |  |   00004517              auipc   a0,0x4
+200012b4:          |  |   80850613              addi    a2,a0,-2040 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+200012b8:          |  |   0e8f05b7              lui     a1,0xe8f0
+200012bc:          |  |   4501                  li      a0,0
+200012be:          |  |   705010ef              jal     ra,200031c2 <status_create>
+200012c2:          |  |   842a                  mv      s0,a0
+200012c4:       /--|--|-- a815                  j       200012f8 <uart_getc+0x96>
+200012c6:       |  |  \-> 842a                  mv      s0,a0
+200012c8:       |  |      897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+200012ca:       |  |      00003597              auipc   a1,0x3
+200012ce:       |  |      7ee58613              addi    a2,a1,2030 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+200012d2:       |  |      0e8f05b7              lui     a1,0xe8f0
+200012d6:       |  |      04b00693              li      a3,75
+200012da:       |  |  /-- a819                  j       200012f0 <uart_getc+0x8e>
+200012dc:       |  \--|-> 842a                  mv      s0,a0
+200012de:       |     |   897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012e0:       |     |   00003597              auipc   a1,0x3
+200012e4:       |     |   7d858613              addi    a2,a1,2008 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+200012e8:       |     |   0e8f05b7              lui     a1,0xe8f0
+200012ec:       |     |   04c00693              li      a3,76
+200012f0:       |     \-> 6d3010ef              jal     ra,200031c2 <status_create>
+200012f4:       |         80fff0ef              jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:78
+}
+200012f8:       \-------> 8522                  mv      a0,s0
+200012fa:                 40f2                  lw      ra,28(sp)
+200012fc:                 4462                  lw      s0,24(sp)
+200012fe:                 44d2                  lw      s1,20(sp)
+20001300:                 6105                  addi    sp,sp,32
+20001302:                 8082                  ret
+
+20001304 <ottf_console_configure_spi_device>:
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:173
+
+void ottf_console_configure_spi_device(uintptr_t base_addr) {
+20001304:                    714d                       addi    sp,sp,-336
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:174
+  CHECK_DIF_OK(dif_spi_device_init_handle(mmio_region_from_addr(base_addr),
+20001306:                    14112623           sw      ra,332(sp)
+2000130a:                    14812423           sw      s0,328(sp)
+2000130e:                    14912223           sw      s1,324(sp)
+20001312:                    15212023           sw      s2,320(sp)
+20001316:                    13312e23           sw      s3,316(sp)
+2000131a:                    13412c23           sw      s4,312(sp)
+2000131e:                    13512a23           sw      s5,308(sp)
+20001322:                    13612823           sw      s6,304(sp)
+20001326:                    13712623           sw      s7,300(sp)
+2000132a:                    13812423           sw      s8,296(sp)
+2000132e:                    f0001597           auipc   a1,0xf0001
+20001332:                    e0258593           addi    a1,a1,-510 # 10002130 <ottf_console_spi_device>
+20001336:                    018020ef           jal     ra,2000334e <dif_spi_device_init_handle>
+2000133a:                    862a                       mv      a2,a0
+2000133c:                    00005417           auipc   s0,0x5
+20001340:                    e000f517           auipc   a0,0xe000f
+20001344:                    cc050a93           addi    s5,a0,-832 # 10000 <_chip_info_end>
+20001348:          /-------- c61d                       beqz    a2,20001376 <ottf_console_configure_spi_device+0x72>
+2000134a:          |         fa842503           lw      a0,-88(s0) # 200062e4 <kDeviceLogBypassUartAddress>
+2000134e:          |     /-- c901                       beqz    a0,2000135e <ottf_console_configure_spi_device+0x5a>
+20001350:          |     |   20c00513           li      a0,524
+20001354:          |     |   9556                       add     a0,a0,s5
+20001356:          |     |   4585                       li      a1,1
+20001358:          |     |   44e010ef           jal     ra,200027a6 <base_log_internal_dv>
+2000135c:          |  /--|-- a801                       j       2000136c <ottf_console_configure_spi_device+0x68>
+2000135e:          |  |  \-> 00004517           auipc   a0,0x4
+20001362:          |  |      36250513           addi    a0,a0,866 # 200056c0 <ottf_console_configure_spi_device.log_fields>
+20001366:          |  |      85b2                       mv      a1,a2
+20001368:          |  |      3a2010ef           jal     ra,2000270a <base_log_internal_core>
+2000136c:          |  \----> 6531                       lui     a0,0xc
+2000136e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001372:          |         2c8010ef           jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:176
+                                          &ottf_console_spi_device));
+  CHECK_DIF_OK(dif_spi_device_configure(
+20001376:          \-------> c802                       sw      zero,16(sp)
+20001378:                    ca02                       sw      zero,20(sp)
+2000137a:                    4505                       li      a0,1
+2000137c:                    cc2a                       sw      a0,24(sp)
+2000137e:                    f0001517           auipc   a0,0xf0001
+20001382:                    db250513           addi    a0,a0,-590 # 10002130 <ottf_console_spi_device>
+20001386:                    080c                       addi    a1,sp,16
+20001388:                    7cf010ef           jal     ra,20003356 <dif_spi_device_configure>
+2000138c:                    fa842b03           lw      s6,-88(s0)
+20001390:          /-------- c51d                       beqz    a0,200013be <ottf_console_configure_spi_device+0xba>
+20001392:          |         862a                       mv      a2,a0
+20001394:          |  /----- 000b0963           beqz    s6,200013a6 <ottf_console_configure_spi_device+0xa2>
+20001398:          |  |      22000513           li      a0,544
+2000139c:          |  |      9556                       add     a0,a0,s5
+2000139e:          |  |      4585                       li      a1,1
+200013a0:          |  |      406010ef           jal     ra,200027a6 <base_log_internal_dv>
+200013a4:          |  |  /-- a801                       j       200013b4 <ottf_console_configure_spi_device+0xb0>
+200013a6:          |  \--|-> 00004517           auipc   a0,0x4
+200013aa:          |     |   32e50513           addi    a0,a0,814 # 200056d4 <ottf_console_configure_spi_device.log_fields.20>
+200013ae:          |     |   85b2                       mv      a1,a2
+200013b0:          |     |   35a010ef           jal     ra,2000270a <base_log_internal_core>
+200013b4:          |     \-> 6531                       lui     a0,0xc
+200013b6:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013ba:          |         280010ef           jal     ra,2000263a <test_status_set>
+200013be:          \-------> 4481                       li      s1,0
+200013c0:                    00004517           auipc   a0,0x4
+200013c4:                    32850413           addi    s0,a0,808 # 200056e8 <ottf_console_configure_spi_device.log_fields.20+0x14>
+200013c8:                    f0001517           auipc   a0,0xf0001
+200013cc:                    d6850b93           addi    s7,a0,-664 # 10002130 <ottf_console_spi_device>
+200013d0:                    4c19                       li      s8,6
+200013d2:                    00004517           auipc   a0,0x4
+200013d6:                    3be50913           addi    s2,a0,958 # 20005790 <ottf_console_configure_spi_device.log_fields.23>
+200013da:                    6531                       lui     a0,0xc
+200013dc:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013e0:                    23400a13           li      s4,564
+200013e4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:235
+          .payload_dir_to_host = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceReadCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+200013e6:       /----------> 0808                       addi    a0,sp,16
+200013e8:       |            4671                       li      a2,28
+200013ea:       |            85a2                       mv      a1,s0
+200013ec:       |            4db020ef           jal     ra,200040c6 <memcpy>
+200013f0:       |            0ff4f593           andi    a1,s1,255
+200013f4:       |            4605                       li      a2,1
+200013f6:       |            0814                       addi    a3,sp,16
+200013f8:       |            855e                       mv      a0,s7
+200013fa:       |            7db010ef           jal     ra,200033d4 <dif_spi_device_set_flash_command_slot>
+200013fe:       |  /-------- c105                       beqz    a0,2000141e <ottf_console_configure_spi_device+0x11a>
+20001400:       |  |         862a                       mv      a2,a0
+20001402:       |  |  /----- 000b0763           beqz    s6,20001410 <ottf_console_configure_spi_device+0x10c>
+20001406:       |  |  |      4585                       li      a1,1
+20001408:       |  |  |      8552                       mv      a0,s4
+2000140a:       |  |  |      39c010ef           jal     ra,200027a6 <base_log_internal_dv>
+2000140e:       |  |  |  /-- a029                       j       20001418 <ottf_console_configure_spi_device+0x114>
+20001410:       |  |  \--|-> 854a                       mv      a0,s2
+20001412:       |  |     |   85b2                       mv      a1,a2
+20001414:       |  |     |   2f6010ef           jal     ra,2000270a <base_log_internal_core>
+20001418:       |  |     \-> 854e                       mv      a0,s3
+2000141a:       |  |         220010ef           jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:233
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+2000141e:       |  \-------> 0485                       addi    s1,s1,1
+20001420:       |            0471                       addi    s0,s0,28
+20001422:       \----------- fd8492e3           bne     s1,s8,200013e6 <ottf_console_configure_spi_device+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:251
+          .set_busy_status = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(write_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceWriteCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+20001426:                    00004517           auipc   a0,0x4
+2000142a:                    37e50593           addi    a1,a0,894 # 200057a4 <ottf_console_configure_spi_device.log_fields.23+0x14>
+2000142e:                    0808                       addi    a0,sp,16
+20001430:                    4671                       li      a2,28
+20001432:                    495020ef           jal     ra,200040c6 <memcpy>
+20001436:                    f0001517           auipc   a0,0xf0001
+2000143a:                    cfa50513           addi    a0,a0,-774 # 10002130 <ottf_console_spi_device>
+2000143e:                    45ad                       li      a1,11
+20001440:                    4605                       li      a2,1
+20001442:                    0814                       addi    a3,sp,16
+20001444:                    791010ef           jal     ra,200033d4 <dif_spi_device_set_flash_command_slot>
+20001448:          /-------- c51d                       beqz    a0,20001476 <ottf_console_configure_spi_device+0x172>
+2000144a:          |         862a                       mv      a2,a0
+2000144c:          |  /----- 000b0963           beqz    s6,2000145e <ottf_console_configure_spi_device+0x15a>
+20001450:          |  |      24800513           li      a0,584
+20001454:          |  |      9556                       add     a0,a0,s5
+20001456:          |  |      4585                       li      a1,1
+20001458:          |  |      34e010ef           jal     ra,200027a6 <base_log_internal_dv>
+2000145c:          |  |  /-- a801                       j       2000146c <ottf_console_configure_spi_device+0x168>
+2000145e:          |  \--|-> 00004517           auipc   a0,0x4
+20001462:          |     |   36250513           addi    a0,a0,866 # 200057c0 <ottf_console_configure_spi_device.log_fields.26>
+20001466:          |     |   85b2                       mv      a1,a2
+20001468:          |     |   2a2010ef           jal     ra,2000270a <base_log_internal_core>
+2000146c:          |     \-> 6531                       lui     a0,0xc
+2000146e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001472:          |         1c8010ef           jal     ra,2000263a <test_status_set>
+20001476:          \-------> 4401                       li      s0,0
+20001478:                    cafeb537           lui     a0,0xcafeb
+2000147c:                    0509                       addi    a0,a0,2
+spi_device_wait_for_sync():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:102
+  const uint8_t kBootMagicPattern[4] = {0x02, 0xb0, 0xfe, 0xca};
+2000147e:                    12a12223           sw      a0,292(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:103
+  const uint8_t kEmptyPattern[4] = {0};
+20001482:                    12012023           sw      zero,288(sp)
+20001486:                    f0001517           auipc   a0,0xf0001
+2000148a:                    caa50493           addi    s1,a0,-854 # 10002130 <ottf_console_spi_device>
+2000148e:                    28b01b93           bseti   s7,zero,0xb
+20001492:                    00004517           auipc   a0,0x4
+20001496:                    43250913           addi    s2,a0,1074 # 200058c4 <spi_device_wait_for_sync.log_fields>
+2000149a:                    6531                       lui     a0,0xc
+2000149c:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200014a0:                    39c00a13           li      s4,924
+200014a4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:106
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+200014a6:       /----------> 4691                       li      a3,4
+200014a8:       |            1258                       addi    a4,sp,292
+200014aa:       |            8526                       mv      a0,s1
+200014ac:       |            4581                       li      a1,0
+200014ae:       |            8622                       mv      a2,s0
+200014b0:       |            122020ef           jal     ra,200035d2 <dif_spi_device_write_flash_buffer>
+200014b4:       |  /-------- c105                       beqz    a0,200014d4 <ottf_console_configure_spi_device+0x1d0>
+200014b6:       |  |         862a                       mv      a2,a0
+200014b8:       |  |  /----- 000b0763           beqz    s6,200014c6 <ottf_console_configure_spi_device+0x1c2>
+200014bc:       |  |  |      4585                       li      a1,1
+200014be:       |  |  |      8552                       mv      a0,s4
+200014c0:       |  |  |      2e6010ef           jal     ra,200027a6 <base_log_internal_dv>
+200014c4:       |  |  |  /-- a029                       j       200014ce <ottf_console_configure_spi_device+0x1ca>
+200014c6:       |  |  \--|-> 854a                       mv      a0,s2
+200014c8:       |  |     |   85b2                       mv      a1,a2
+200014ca:       |  |     |   240010ef           jal     ra,2000270a <base_log_internal_core>
+200014ce:       |  |     \-> 854e                       mv      a0,s3
+200014d0:       |  |         16a010ef           jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:105
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200014d4:       |  \-------> 0411                       addi    s0,s0,4
+200014d6:       \----------- fd7418e3           bne     s0,s7,200014a6 <ottf_console_configure_spi_device+0x1a2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:112
+  upload_info_t info = {0};
+200014da:                    0808                       addi    a0,sp,16
+200014dc:                    11000613           li      a2,272
+200014e0:                    4581                       li      a1,0
+200014e2:                    467020ef           jal     ra,20004148 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:113
+  CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+200014e6:                    f0001517           auipc   a0,0xf0001
+200014ea:                    c4a50513           addi    a0,a0,-950 # 10002130 <ottf_console_spi_device>
+200014ee:                    080c                       addi    a1,sp,16
+200014f0:                    023000ef           jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+200014f4:       /----------- 06055063           bgez    a0,20001554 <ottf_console_configure_spi_device+0x250>
+200014f8:       |  /-------- 020b0b63           beqz    s6,2000152e <ottf_console_configure_spi_device+0x22a>
+200014fc:       |  |         00010523           sb      zero,10(sp)
+20001500:       |  |         00011423           sh      zero,8(sp)
+20001504:       |  |         006c                       addi    a1,sp,12
+20001506:       |  |         0050                       addi    a2,sp,4
+20001508:       |  |         0034                       addi    a3,sp,8
+2000150a:       |  |         583010ef           jal     ra,2000328c <status_extract>
+2000150e:       |  |  /----- c905                       beqz    a0,2000153e <ottf_console_configure_spi_device+0x23a>
+20001510:       |  |  |      00814603           lbu     a2,8(sp)
+20001514:       |  |  |      00914683           lbu     a3,9(sp)
+20001518:       |  |  |      00a14703           lbu     a4,10(sp)
+2000151c:       |  |  |      4792                       lw      a5,4(sp)
+2000151e:       |  |  |      4832                       lw      a6,12(sp)
+20001520:       |  |  |      3b000513           li      a0,944
+20001524:       |  |  |      9556                       add     a0,a0,s5
+20001526:       |  |  |      4595                       li      a1,5
+20001528:       |  |  |      27e010ef           jal     ra,200027a6 <base_log_internal_dv>
+2000152c:       |  |  |  /-- a839                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000152e:       |  \--|--|-> 85aa                       mv      a1,a0
+20001530:       |     |  |   00004517           auipc   a0,0x4
+20001534:       |     |  |   3a850513           addi    a0,a0,936 # 200058d8 <spi_device_wait_for_sync.log_fields.74>
+20001538:       |     |  |   1d2010ef           jal     ra,2000270a <base_log_internal_core>
+2000153c:       |     |  +-- a039                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000153e:       |     \--|-> 3c400513           li      a0,964
+20001542:       |        |   9556                       add     a0,a0,s5
+20001544:       |        |   4585                       li      a1,1
+20001546:       |        |   260010ef           jal     ra,200027a6 <base_log_internal_dv>
+2000154a:       |        \-> 6531                       lui     a0,0xc
+2000154c:       |            aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001550:       |            0ea010ef           jal     ra,2000263a <test_status_set>
+20001554:       \----------> 4401                       li      s0,0
+20001556:                    f0001517           auipc   a0,0xf0001
+2000155a:                    bda50493           addi    s1,a0,-1062 # 10002130 <ottf_console_spi_device>
+2000155e:                    00004517           auipc   a0,0x4
+20001562:                    38e50913           addi    s2,a0,910 # 200058ec <spi_device_wait_for_sync.log_fields.77>
+20001566:                    6531                       lui     a0,0xc
+20001568:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000156c:                    3d800a13           li      s4,984
+20001570:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:116
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+20001572:       /----------> 4691                       li      a3,4
+20001574:       |            1218                       addi    a4,sp,288
+20001576:       |            8526                       mv      a0,s1
+20001578:       |            4581                       li      a1,0
+2000157a:       |            8622                       mv      a2,s0
+2000157c:       |            056020ef           jal     ra,200035d2 <dif_spi_device_write_flash_buffer>
+20001580:       |  /-------- c105                       beqz    a0,200015a0 <ottf_console_configure_spi_device+0x29c>
+20001582:       |  |         862a                       mv      a2,a0
+20001584:       |  |  /----- 000b0763           beqz    s6,20001592 <ottf_console_configure_spi_device+0x28e>
+20001588:       |  |  |      4585                       li      a1,1
+2000158a:       |  |  |      8552                       mv      a0,s4
+2000158c:       |  |  |      21a010ef           jal     ra,200027a6 <base_log_internal_dv>
+20001590:       |  |  |  /-- a029                       j       2000159a <ottf_console_configure_spi_device+0x296>
+20001592:       |  |  \--|-> 854a                       mv      a0,s2
+20001594:       |  |     |   85b2                       mv      a1,a2
+20001596:       |  |     |   174010ef           jal     ra,2000270a <base_log_internal_core>
+2000159a:       |  |     \-> 854e                       mv      a0,s3
+2000159c:       |  |         09e010ef           jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:115
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200015a0:       |  \-------> 0411                       addi    s0,s0,4
+200015a2:       \----------- fd7418e3           bne     s0,s7,20001572 <ottf_console_configure_spi_device+0x26e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:120
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200015a6:                    f0001517           auipc   a0,0xf0001
+200015aa:                    b8a50513           addi    a0,a0,-1142 # 10002130 <ottf_console_spi_device>
+200015ae:                    4581                       li      a1,0
+200015b0:                    092020ef           jal     ra,20003642 <dif_spi_device_set_flash_status_registers>
+200015b4:          /-------- c51d                       beqz    a0,200015e2 <ottf_console_configure_spi_device+0x2de>
+200015b6:          |         862a                       mv      a2,a0
+200015b8:          |  /----- 000b0963           beqz    s6,200015ca <ottf_console_configure_spi_device+0x2c6>
+200015bc:          |  |      3ec00513           li      a0,1004
+200015c0:          |  |      9556                       add     a0,a0,s5
+200015c2:          |  |      4585                       li      a1,1
+200015c4:          |  |      1e2010ef           jal     ra,200027a6 <base_log_internal_dv>
+200015c8:          |  |  /-- a801                       j       200015d8 <ottf_console_configure_spi_device+0x2d4>
+200015ca:          |  \--|-> 00004517           auipc   a0,0x4
+200015ce:          |     |   33650513           addi    a0,a0,822 # 20005900 <spi_device_wait_for_sync.log_fields.79>
+200015d2:          |     |   85b2                       mv      a1,a2
+200015d4:          |     |   136010ef           jal     ra,2000270a <base_log_internal_core>
+200015d8:          |     \-> 6531                       lui     a0,0xc
+200015da:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200015de:          |         05c010ef           jal     ra,2000263a <test_status_set>
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:255
+        &ottf_console_spi_device, slot, kDifToggleEnabled, write_commands[i]));
+  }
+  spi_device_wait_for_sync(&ottf_console_spi_device);
+  base_spi_device_stdout(&ottf_console_spi_device);
+200015e2:          \-------> f0001517           auipc   a0,0xf0001
+200015e6:                    b4e50513           addi    a0,a0,-1202 # 10002130 <ottf_console_spi_device>
+200015ea:                    3dc010ef           jal     ra,200029c6 <base_spi_device_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:256
+}
+200015ee:                    14c12083           lw      ra,332(sp)
+200015f2:                    14812403           lw      s0,328(sp)
+200015f6:                    14412483           lw      s1,324(sp)
+200015fa:                    14012903           lw      s2,320(sp)
+200015fe:                    13c12983           lw      s3,316(sp)
+20001602:                    13812a03           lw      s4,312(sp)
+20001606:                    13412a83           lw      s5,308(sp)
+2000160a:                    13012b03           lw      s6,304(sp)
+2000160e:                    12c12b83           lw      s7,300(sp)
+20001612:                    12812c03           lw      s8,296(sp)
+20001616:                    6171                       addi    sp,sp,336
+20001618:                    8082                       ret
+
+2000161a <spi_device_getc>:
+spi_device_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:87
+static status_t spi_device_getc(void *io) {
+2000161a:                       1101                    addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:91
+  if (index == info.data_len) {
+2000161c:                       ce06                    sw      ra,28(sp)
+2000161e:                       cc22                    sw      s0,24(sp)
+20001620:                       ca26                    sw      s1,20(sp)
+20001622:                       c84a                    sw      s2,16(sp)
+20001624:                       c64e                    sw      s3,12(sp)
+20001626:                       f0001417                auipc   s0,0xf0001
+2000162a:                       a6642583                lw      a1,-1434(s0) # 1000208c <spi_device_getc.index>
+2000162e:                       f0001617                auipc   a2,0xf0001
+20001632:                       b1260993                addi    s3,a2,-1262 # 10002140 <spi_device_getc.info>
+20001636:                       0049d603                lhu     a2,4(s3)
+2000163a:       /-------------- 0ec59063                bne     a1,a2,2000171a <spi_device_getc+0x100>
+2000163e:       |               892a                    mv      s2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:92
+    memset(&info, 0, sizeof(upload_info_t));
+20001640:       |               f0001517                auipc   a0,0xf0001
+20001644:       |               b0050493                addi    s1,a0,-1280 # 10002140 <spi_device_getc.info>
+20001648:       |               11000613                li      a2,272
+2000164c:       |               8526                    mv      a0,s1
+2000164e:       |               4581                    li      a1,0
+20001650:       |               2f9020ef                jal     ra,20004148 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:93
+    CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+20001654:       |               854a                    mv      a0,s2
+20001656:       |               85a6                    mv      a1,s1
+20001658:       |               6ba000ef                jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+2000165c:       |  /----------- 06055b63                bgez    a0,200016d2 <spi_device_getc+0xb8>
+20001660:       |  |            85aa                    mv      a1,a0
+20001662:       |  |            00005517                auipc   a0,0x5
+20001666:       |  |            c8252503                lw      a0,-894(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+2000166a:       |  |  /-------- cd15                    beqz    a0,200016a6 <spi_device_getc+0x8c>
+2000166c:       |  |  |         00010323                sb      zero,6(sp)
+20001670:       |  |  |         00011223                sh      zero,4(sp)
+20001674:       |  |  |         002c                    addi    a1,sp,8
+20001676:       |  |  |         860a                    mv      a2,sp
+20001678:       |  |  |         0054                    addi    a3,sp,4
+2000167a:       |  |  |         413010ef                jal     ra,2000328c <status_extract>
+2000167e:       |  |  |  /----- c91d                    beqz    a0,200016b4 <spi_device_getc+0x9a>
+20001680:       |  |  |  |      00414603                lbu     a2,4(sp)
+20001684:       |  |  |  |      00514683                lbu     a3,5(sp)
+20001688:       |  |  |  |      00614703                lbu     a4,6(sp)
+2000168c:       |  |  |  |      4782                    lw      a5,0(sp)
+2000168e:       |  |  |  |      4822                    lw      a6,8(sp)
+20001690:       |  |  |  |      e000f517                auipc   a0,0xe000f
+20001694:       |  |  |  |      97050513                addi    a0,a0,-1680 # 10000 <_chip_info_end>
+20001698:       |  |  |  |      36000593                li      a1,864
+2000169c:       |  |  |  |      952e                    add     a0,a0,a1
+2000169e:       |  |  |  |      4595                    li      a1,5
+200016a0:       |  |  |  |      106010ef                jal     ra,200027a6 <base_log_internal_dv>
+200016a4:       |  |  |  |  /-- a015                    j       200016c8 <spi_device_getc+0xae>
+200016a6:       |  |  \--|--|-> 00004517                auipc   a0,0x4
+200016aa:       |  |     |  |   1f650513                addi    a0,a0,502 # 2000589c <spi_device_getc.log_fields.64>
+200016ae:       |  |     |  |   05c010ef                jal     ra,2000270a <base_log_internal_core>
+200016b2:       |  |     |  +-- a819                    j       200016c8 <spi_device_getc+0xae>
+200016b4:       |  |     \--|-> e000f517                auipc   a0,0xe000f
+200016b8:       |  |        |   94c50513                addi    a0,a0,-1716 # 10000 <_chip_info_end>
+200016bc:       |  |        |   37400593                li      a1,884
+200016c0:       |  |        |   952e                    add     a0,a0,a1
+200016c2:       |  |        |   4585                    li      a1,1
+200016c4:       |  |        |   0e2010ef                jal     ra,200027a6 <base_log_internal_dv>
+200016c8:       |  |        \-> 6531                    lui     a0,0xc
+200016ca:       |  |            aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200016ce:       |  |            76d000ef                jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:94
+    index = 0;
+200016d2:       |  \----------> a6042323                sw      zero,-1434(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:95
+    CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200016d6:       |               854a                    mv      a0,s2
+200016d8:       |               4581                    li      a1,0
+200016da:       |               769010ef                jal     ra,20003642 <dif_spi_device_set_flash_status_registers>
+200016de:       +-------------- cd15                    beqz    a0,2000171a <spi_device_getc+0x100>
+200016e0:       |               862a                    mv      a2,a0
+200016e2:       |               00005517                auipc   a0,0x5
+200016e6:       |               c0252503                lw      a0,-1022(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+200016ea:       |        /----- cd01                    beqz    a0,20001702 <spi_device_getc+0xe8>
+200016ec:       |        |      e000f517                auipc   a0,0xe000f
+200016f0:       |        |      91450513                addi    a0,a0,-1772 # 10000 <_chip_info_end>
+200016f4:       |        |      38800593                li      a1,904
+200016f8:       |        |      952e                    add     a0,a0,a1
+200016fa:       |        |      4585                    li      a1,1
+200016fc:       |        |      0aa010ef                jal     ra,200027a6 <base_log_internal_dv>
+20001700:       |        |  /-- a801                    j       20001710 <spi_device_getc+0xf6>
+20001702:       |        \--|-> 00004517                auipc   a0,0x4
+20001706:       |           |   1ae50513                addi    a0,a0,430 # 200058b0 <spi_device_getc.log_fields.67>
+2000170a:       |           |   85b2                    mv      a1,a2
+2000170c:       |           |   7ff000ef                jal     ra,2000270a <base_log_internal_core>
+20001710:       |           \-> 6531                    lui     a0,0xc
+20001712:       |               aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001716:       |               725000ef                jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:98
+  return OK_STATUS(info.data[index++]);
+2000171a:       \-------------> a6642503                lw      a0,-1434(s0)
+2000171e:                       99aa                    add     s3,s3,a0
+20001720:                       0109c683                lbu     a3,16(s3)
+20001724:                       0505                    addi    a0,a0,1
+20001726:                       a6a42323                sw      a0,-1434(s0)
+2000172a:                       00003517                auipc   a0,0x3
+2000172e:                       38e50613                addi    a2,a0,910 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001732:                       0e8f05b7                lui     a1,0xe8f0
+20001736:                       4501                    li      a0,0
+20001738:                       28b010ef                jal     ra,200031c2 <status_create>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:99
+}
+2000173c:                       40f2                    lw      ra,28(sp)
+2000173e:                       4462                    lw      s0,24(sp)
+20001740:                       44d2                    lw      s1,20(sp)
+20001742:                       4942                    lw      s2,16(sp)
+20001744:                       49b2                    lw      s3,12(sp)
+20001746:                       6105                    addi    sp,sp,32
+20001748:                       8082                    ret
+
+2000174a <ottf_console_flow_control_enable>:
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:274
+    default:
+      return kTopEarlgreyPlicIrqIdUart0RxWatermark;
+  }
+}
+
+void ottf_console_flow_control_enable(void) {
+2000174a:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:275
+  CHECK_DIF_OK(dif_rv_plic_init(
+2000174c:                 ce06                  sw      ra,28(sp)
+2000174e:                 cc22                  sw      s0,24(sp)
+20001750:                 ca26                  sw      s1,20(sp)
+20001752:                 c84a                  sw      s2,16(sp)
+20001754:                 c64e                  sw      s3,12(sp)
+20001756:                 f0001517              auipc   a0,0xf0001
+2000175a:                 93e50593              addi    a1,a0,-1730 # 10002094 <ottf_plic>
+2000175e:                 48000537              lui     a0,0x48000
+20001762:                 50f000ef              jal     ra,20002470 <dif_rv_plic_init>
+20001766:                 00005497              auipc   s1,0x5
+2000176a:       /-------- cd05                  beqz    a0,200017a2 <ottf_console_flow_control_enable+0x58>
+2000176c:       |         862a                  mv      a2,a0
+2000176e:       |         b7e4a503              lw      a0,-1154(s1) # 200062e4 <kDeviceLogBypassUartAddress>
+20001772:       |  /----- cd01                  beqz    a0,2000178a <ottf_console_flow_control_enable+0x40>
+20001774:       |  |      e000f517              auipc   a0,0xe000f
+20001778:       |  |      88c50513              addi    a0,a0,-1908 # 10000 <_chip_info_end>
+2000177c:       |  |      25c00593              li      a1,604
+20001780:       |  |      952e                  add     a0,a0,a1
+20001782:       |  |      4585                  li      a1,1
+20001784:       |  |      022010ef              jal     ra,200027a6 <base_log_internal_dv>
+20001788:       |  |  /-- a801                  j       20001798 <ottf_console_flow_control_enable+0x4e>
+2000178a:       |  \--|-> 00004517              auipc   a0,0x4
+2000178e:       |     |   04a50513              addi    a0,a0,74 # 200057d4 <ottf_console_flow_control_enable.log_fields>
+20001792:       |     |   85b2                  mv      a1,a2
+20001794:       |     |   777000ef              jal     ra,2000270a <base_log_internal_core>
+20001798:       |     \-> 6531                  lui     a0,0xc
+2000179a:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000179e:       |         69d000ef              jal     ra,2000263a <test_status_set>
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+200017a2:       \-------> 00003517              auipc   a0,0x3
+200017a6:                 e7e50413              addi    s0,a0,-386 # 20004620 <kOttfTestConfig>
+200017aa:                 4048                  lw      a0,4(s0)
+200017ac:                 4585                  li      a1,1
+200017ae:          /----- 00b50763              beq     a0,a1,200017bc <ottf_console_flow_control_enable+0x72>
+200017b2:          |      f0001517              auipc   a0,0xf0001
+200017b6:          |      8c650913              addi    s2,a0,-1850 # 10002078 <ottf_console_uart>
+200017ba:          |  /-- a029                  j       200017c4 <ottf_console_flow_control_enable+0x7a>
+200017bc:          \--|-> f0001517              auipc   a0,0xf0001
+200017c0:             |   97450913              addi    s2,a0,-1676 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:279
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic));
+
+  dif_uart_t *uart = (dif_uart_t *)ottf_console_get();
+  CHECK_DIF_OK(dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark));
+200017c4:             \-> 458d                  li      a1,3
+200017c6:                 854a                  mv      a0,s2
+200017c8:                 03c020ef              jal     ra,20003804 <dif_uart_watermark_rx_set>
+200017cc:       /-------- cd05                  beqz    a0,20001804 <ottf_console_flow_control_enable+0xba>
+200017ce:       |         862a                  mv      a2,a0
+200017d0:       |         b7e4a503              lw      a0,-1154(s1)
+200017d4:       |  /----- cd01                  beqz    a0,200017ec <ottf_console_flow_control_enable+0xa2>
+200017d6:       |  |      e000f517              auipc   a0,0xe000f
+200017da:       |  |      82a50513              addi    a0,a0,-2006 # 10000 <_chip_info_end>
+200017de:       |  |      27000593              li      a1,624
+200017e2:       |  |      952e                  add     a0,a0,a1
+200017e4:       |  |      4585                  li      a1,1
+200017e6:       |  |      7c1000ef              jal     ra,200027a6 <base_log_internal_dv>
+200017ea:       |  |  /-- a801                  j       200017fa <ottf_console_flow_control_enable+0xb0>
+200017ec:       |  \--|-> 00004517              auipc   a0,0x4
+200017f0:       |     |   ffc50513              addi    a0,a0,-4 # 200057e8 <ottf_console_flow_control_enable.log_fields.30>
+200017f4:       |     |   85b2                  mv      a1,a2
+200017f6:       |     |   715000ef              jal     ra,2000270a <base_log_internal_core>
+200017fa:       |     \-> 6531                  lui     a0,0xc
+200017fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001800:       |         63b000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:280
+  CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001804:       \-------> 4585                  li      a1,1
+20001806:                 4605                  li      a2,1
+20001808:                 854a                  mv      a0,s2
+2000180a:                 6b5010ef              jal     ra,200036be <dif_uart_irq_set_enabled>
+2000180e:       /-------- cd05                  beqz    a0,20001846 <ottf_console_flow_control_enable+0xfc>
+20001810:       |         862a                  mv      a2,a0
+20001812:       |         b7e4a503              lw      a0,-1154(s1)
+20001816:       |  /----- cd01                  beqz    a0,2000182e <ottf_console_flow_control_enable+0xe4>
+20001818:       |  |      e000e517              auipc   a0,0xe000e
+2000181c:       |  |      7e850513              addi    a0,a0,2024 # 10000 <_chip_info_end>
+20001820:       |  |      28400593              li      a1,644
+20001824:       |  |      952e                  add     a0,a0,a1
+20001826:       |  |      4585                  li      a1,1
+20001828:       |  |      77f000ef              jal     ra,200027a6 <base_log_internal_dv>
+2000182c:       |  |  /-- a801                  j       2000183c <ottf_console_flow_control_enable+0xf2>
+2000182e:       |  \--|-> 00004517              auipc   a0,0x4
+20001832:       |     |   fce50513              addi    a0,a0,-50 # 200057fc <ottf_console_flow_control_enable.log_fields.33>
+20001836:       |     |   85b2                  mv      a1,a2
+20001838:       |     |   6d3000ef              jal     ra,2000270a <base_log_internal_core>
+2000183c:       |     \-> 6531                  lui     a0,0xc
+2000183e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001842:       |         5f9000ef              jal     ra,2000263a <test_status_set>
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001846:       \-------> 4408                  lw      a0,8(s0)
+20001848:                 c00005b7              lui     a1,0xc0000
+2000184c:                 95aa                  add     a1,a1,a0
+2000184e:                 81c1                  srli    a1,a1,0x10
+20001850:                 0542                  slli    a0,a0,0x10
+20001852:                 8d4d                  or      a0,a0,a1
+20001854:                 fff50413              addi    s0,a0,-1
+20001858:                 450d                  li      a0,3
+2000185a:                 208469b3              sh3add  s3,s0,s0
+2000185e:          /----- 00a46463              bltu    s0,a0,20001866 <ottf_console_flow_control_enable+0x11c>
+20001862:          |      4589                  li      a1,2
+20001864:          |  /-- a019                  j       2000186a <ottf_console_flow_control_enable+0x120>
+20001866:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:284
+                                        kDifToggleEnabled));
+
+  // Set IRQ priorities to MAX
+  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
+2000186a:             \-> 00004517              auipc   a0,0x4
+2000186e:                 62252603              lw      a2,1570(a0) # 20005e8c <kDifRvPlicMaxPriority>
+20001872:                 f0001517              auipc   a0,0xf0001
+20001876:                 82250513              addi    a0,a0,-2014 # 10002094 <ottf_plic>
+2000187a:                 44d000ef              jal     ra,200024c6 <dif_rv_plic_irq_set_priority>
+2000187e:       /-------- cd05                  beqz    a0,200018b6 <ottf_console_flow_control_enable+0x16c>
+20001880:       |         862a                  mv      a2,a0
+20001882:       |         b7e4a503              lw      a0,-1154(s1)
+20001886:       |  /----- cd01                  beqz    a0,2000189e <ottf_console_flow_control_enable+0x154>
+20001888:       |  |      e000e517              auipc   a0,0xe000e
+2000188c:       |  |      77850513              addi    a0,a0,1912 # 10000 <_chip_info_end>
+20001890:       |  |      29800593              li      a1,664
+20001894:       |  |      952e                  add     a0,a0,a1
+20001896:       |  |      4585                  li      a1,1
+20001898:       |  |      70f000ef              jal     ra,200027a6 <base_log_internal_dv>
+2000189c:       |  |  /-- a801                  j       200018ac <ottf_console_flow_control_enable+0x162>
+2000189e:       |  \--|-> 00004517              auipc   a0,0x4
+200018a2:       |     |   f7250513              addi    a0,a0,-142 # 20005810 <ottf_console_flow_control_enable.log_fields.36>
+200018a6:       |     |   85b2                  mv      a1,a2
+200018a8:       |     |   663000ef              jal     ra,2000270a <base_log_internal_core>
+200018ac:       |     \-> 6531                  lui     a0,0xc
+200018ae:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200018b2:       |         589000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:287
+      &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority));
+  // Set Ibex IRQ priority threshold level
+  CHECK_DIF_OK(dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget,
+200018b6:       \-------> 00004517              auipc   a0,0x4
+200018ba:                 5d252603              lw      a2,1490(a0) # 20005e88 <kDifRvPlicMinPriority>
+200018be:                 f0000517              auipc   a0,0xf0000
+200018c2:                 7d650513              addi    a0,a0,2006 # 10002094 <ottf_plic>
+200018c6:                 4581                  li      a1,0
+200018c8:                 429000ef              jal     ra,200024f0 <dif_rv_plic_target_set_threshold>
+200018cc:       /-------- cd05                  beqz    a0,20001904 <ottf_console_flow_control_enable+0x1ba>
+200018ce:       |         862a                  mv      a2,a0
+200018d0:       |         b7e4a503              lw      a0,-1154(s1)
+200018d4:       |  /----- cd01                  beqz    a0,200018ec <ottf_console_flow_control_enable+0x1a2>
+200018d6:       |  |      e000e517              auipc   a0,0xe000e
+200018da:       |  |      72a50513              addi    a0,a0,1834 # 10000 <_chip_info_end>
+200018de:       |  |      2ac00593              li      a1,684
+200018e2:       |  |      952e                  add     a0,a0,a1
+200018e4:       |  |      4585                  li      a1,1
+200018e6:       |  |      6c1000ef              jal     ra,200027a6 <base_log_internal_dv>
+200018ea:       |  |  /-- a801                  j       200018fa <ottf_console_flow_control_enable+0x1b0>
+200018ec:       |  \--|-> 00004517              auipc   a0,0x4
+200018f0:       |     |   f3850513              addi    a0,a0,-200 # 20005824 <ottf_console_flow_control_enable.log_fields.39>
+200018f4:       |     |   85b2                  mv      a1,a2
+200018f6:       |     |   615000ef              jal     ra,2000270a <base_log_internal_core>
+200018fa:       |     \-> 6531                  lui     a0,0xc
+200018fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001900:       |         53b000ef              jal     ra,2000263a <test_status_set>
+20001904:       \-------> 450d                  li      a0,3
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001906:          /----- 00a46463              bltu    s0,a0,2000190e <ottf_console_flow_control_enable+0x1c4>
+2000190a:          |      4589                  li      a1,2
+2000190c:          |  /-- a019                  j       20001912 <ottf_console_flow_control_enable+0x1c8>
+2000190e:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:290
+                                                kDifRvPlicMinPriority));
+  // Enable IRQs in PLIC
+  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(&ottf_plic,
+20001912:             \-> f0000517              auipc   a0,0xf0000
+20001916:                 78250513              addi    a0,a0,1922 # 10002094 <ottf_plic>
+2000191a:                 4685                  li      a3,1
+2000191c:                 4405                  li      s0,1
+2000191e:                 4601                  li      a2,0
+20001920:                 35f000ef              jal     ra,2000247e <dif_rv_plic_irq_set_enabled>
+20001924:       /-------- cd05                  beqz    a0,2000195c <ottf_console_flow_control_enable+0x212>
+20001926:       |         862a                  mv      a2,a0
+20001928:       |         b7e4a503              lw      a0,-1154(s1)
+2000192c:       |  /----- cd01                  beqz    a0,20001944 <ottf_console_flow_control_enable+0x1fa>
+2000192e:       |  |      e000e517              auipc   a0,0xe000e
+20001932:       |  |      6d250513              addi    a0,a0,1746 # 10000 <_chip_info_end>
+20001936:       |  |      2c000593              li      a1,704
+2000193a:       |  |      952e                  add     a0,a0,a1
+2000193c:       |  |      4585                  li      a1,1
+2000193e:       |  |      669000ef              jal     ra,200027a6 <base_log_internal_dv>
+20001942:       |  |  /-- a801                  j       20001952 <ottf_console_flow_control_enable+0x208>
+20001944:       |  \--|-> 00004517              auipc   a0,0x4
+20001948:       |     |   ef450513              addi    a0,a0,-268 # 20005838 <ottf_console_flow_control_enable.log_fields.42>
+2000194c:       |     |   85b2                  mv      a1,a2
+2000194e:       |     |   5bd000ef              jal     ra,2000270a <base_log_internal_core>
+20001952:       |     \-> 6531                  lui     a0,0xc
+20001954:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001958:       |         4e3000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:294
+                                           get_flow_control_watermark_plic_id(),
+                                           kPlicTarget, kDifToggleEnabled));
+
+  flow_control_state = kOttfConsoleFlowControlAuto;
+2000195c:       \-------> f0000517              auipc   a0,0xf0000
+20001960:                 72852423              sw      s0,1832(a0) # 10002084 <flow_control_state>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:295
+  irq_global_ctrl(true);
+20001964:                 4505                  li      a0,1
+20001966:                 2eb1                  jal     20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:296
+  irq_external_ctrl(true);
+20001968:                 4505                  li      a0,1
+2000196a:                 26ad                  jal     20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:298
+  // Make sure we're in the Resume state and we emit a Resume to the UART.
+  ottf_console_flow_control((dif_uart_t *)ottf_console_get(),
+2000196c:                 45c5                  li      a1,17
+2000196e:                 854a                  mv      a0,s2
+20001970:                 40f2                  lw      ra,28(sp)
+20001972:                 4462                  lw      s0,24(sp)
+20001974:                 44d2                  lw      s1,20(sp)
+20001976:                 4942                  lw      s2,16(sp)
+20001978:                 49b2                  lw      s3,12(sp)
+2000197a:                 6105                  addi    sp,sp,32
+2000197c:                 a009                  j       2000197e <ottf_console_flow_control>
+
+2000197e <ottf_console_flow_control>:
+ottf_console_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:351
+}
+
+// The public API has to save and restore interrupts to avoid an
+// unexpected write to the global `flow_control_state`.
+status_t ottf_console_flow_control(const dif_uart_t *uart,
+                                   ottf_console_flow_control_t ctrl) {
+2000197e:                 1101                  addi    sp,sp,-32
+20001980:                 ce06                  sw      ra,28(sp)
+20001982:                 cc22                  sw      s0,24(sp)
+20001984:                 ca26                  sw      s1,20(sp)
+20001986:                 c84a                  sw      s2,16(sp)
+20001988:                 84ae                  mv      s1,a1
+2000198a:                 842a                  mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:353
+  dif_uart_irq_enable_snapshot_t snapshot;
+  CHECK_DIF_OK(dif_uart_irq_disable_all(uart, &snapshot));
+2000198c:                 006c                  addi    a1,sp,12
+2000198e:                 55b010ef              jal     ra,200036e8 <dif_uart_irq_disable_all>
+20001992:                 00005917              auipc   s2,0x5
+20001996:       /-------- cd05                  beqz    a0,200019ce <ottf_console_flow_control+0x50>
+20001998:       |         862a                  mv      a2,a0
+2000199a:       |         95292503              lw      a0,-1710(s2) # 200062e4 <kDeviceLogBypassUartAddress>
+2000199e:       |  /----- cd01                  beqz    a0,200019b6 <ottf_console_flow_control+0x38>
+200019a0:       |  |      e000e517              auipc   a0,0xe000e
+200019a4:       |  |      66050513              addi    a0,a0,1632 # 10000 <_chip_info_end>
+200019a8:       |  |      2fc00593              li      a1,764
+200019ac:       |  |      952e                  add     a0,a0,a1
+200019ae:       |  |      4585                  li      a1,1
+200019b0:       |  |      5f7000ef              jal     ra,200027a6 <base_log_internal_dv>
+200019b4:       |  |  /-- a801                  j       200019c4 <ottf_console_flow_control+0x46>
+200019b6:       |  \--|-> 00004517              auipc   a0,0x4
+200019ba:       |     |   ebe50513              addi    a0,a0,-322 # 20005874 <ottf_console_flow_control.log_fields>
+200019be:       |     |   85b2                  mv      a1,a2
+200019c0:       |     |   54b000ef              jal     ra,2000270a <base_log_internal_core>
+200019c4:       |     \-> 6531                  lui     a0,0xc
+200019c6:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200019ca:       |         471000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:354
+  status_t s = manage_flow_control(uart, ctrl);
+200019ce:       \-------> 8522                  mv      a0,s0
+200019d0:                 85a6                  mv      a1,s1
+200019d2:                 223d                  jal     20001b00 <manage_flow_control>
+200019d4:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:355
+  CHECK_DIF_OK(dif_uart_irq_restore_all(uart, &snapshot));
+200019d6:                 006c                  addi    a1,sp,12
+200019d8:                 8522                  mv      a0,s0
+200019da:                 527010ef              jal     ra,20003700 <dif_uart_irq_restore_all>
+200019de:       /-------- cd05                  beqz    a0,20001a16 <ottf_console_flow_control+0x98>
+200019e0:       |         862a                  mv      a2,a0
+200019e2:       |         95292503              lw      a0,-1710(s2)
+200019e6:       |  /----- cd01                  beqz    a0,200019fe <ottf_console_flow_control+0x80>
+200019e8:       |  |      e000e517              auipc   a0,0xe000e
+200019ec:       |  |      61850513              addi    a0,a0,1560 # 10000 <_chip_info_end>
+200019f0:       |  |      31000593              li      a1,784
+200019f4:       |  |      952e                  add     a0,a0,a1
+200019f6:       |  |      4585                  li      a1,1
+200019f8:       |  |      5af000ef              jal     ra,200027a6 <base_log_internal_dv>
+200019fc:       |  |  /-- a801                  j       20001a0c <ottf_console_flow_control+0x8e>
+200019fe:       |  \--|-> 00004517              auipc   a0,0x4
+20001a02:       |     |   e8a50513              addi    a0,a0,-374 # 20005888 <ottf_console_flow_control.log_fields.50>
+20001a06:       |     |   85b2                  mv      a1,a2
+20001a08:       |     |   503000ef              jal     ra,2000270a <base_log_internal_core>
+20001a0c:       |     \-> 6531                  lui     a0,0xc
+20001a0e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001a12:       |         429000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:357
+  return s;
+}
+20001a16:       \-------> 8526                  mv      a0,s1
+20001a18:                 40f2                  lw      ra,28(sp)
+20001a1a:                 4462                  lw      s0,24(sp)
+20001a1c:                 44d2                  lw      s1,20(sp)
+20001a1e:                 4942                  lw      s2,16(sp)
+20001a20:                 6105                  addi    sp,sp,32
+20001a22:                 8082                  ret
+
+20001a24 <ottf_console_flow_control_isr>:
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:335
+bool ottf_console_flow_control_isr(uint32_t *exc_info) {
+20001a24:                 1101                  addi    sp,sp,-32
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+20001a26:                 ce06                  sw      ra,28(sp)
+20001a28:                 cc22                  sw      s0,24(sp)
+20001a2a:                 ca26                  sw      s1,20(sp)
+20001a2c:                 c84a                  sw      s2,16(sp)
+20001a2e:                 00003517              auipc   a0,0x3
+20001a32:                 bf652503              lw      a0,-1034(a0) # 20004624 <kOttfTestConfig+0x4>
+20001a36:                 4585                  li      a1,1
+20001a38:          /----- 00b50763              beq     a0,a1,20001a46 <ottf_console_flow_control_isr+0x22>
+20001a3c:          |      f0000517              auipc   a0,0xf0000
+20001a40:          |      63c50413              addi    s0,a0,1596 # 10002078 <ottf_console_uart>
+20001a44:          |  /-- a029                  j       20001a4e <ottf_console_flow_control_isr+0x2a>
+20001a46:          \--|-> f0000517              auipc   a0,0xf0000
+20001a4a:             |   6ea50413              addi    s0,a0,1770 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:337
+  flow_control_irqs += 1;
+20001a4e:             \-> f0000517              auipc   a0,0xf0000
+20001a52:                 63a52583              lw      a1,1594(a0) # 10002088 <flow_control_irqs>
+20001a56:                 0585                  addi    a1,a1,1
+20001a58:                 62b52d23              sw      a1,1594(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:339
+  CHECK_DIF_OK(dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx));
+20001a5c:                 4585                  li      a1,1
+20001a5e:                 00f10613              addi    a2,sp,15
+20001a62:                 8522                  mv      a0,s0
+20001a64:                 415010ef              jal     ra,20003678 <dif_uart_irq_is_pending>
+20001a68:                 00005917              auipc   s2,0x5
+20001a6c:       /-------- cd05                  beqz    a0,20001aa4 <ottf_console_flow_control_isr+0x80>
+20001a6e:       |         862a                  mv      a2,a0
+20001a70:       |         87c92503              lw      a0,-1924(s2) # 200062e4 <kDeviceLogBypassUartAddress>
+20001a74:       |  /----- cd01                  beqz    a0,20001a8c <ottf_console_flow_control_isr+0x68>
+20001a76:       |  |      e000e517              auipc   a0,0xe000e
+20001a7a:       |  |      58a50513              addi    a0,a0,1418 # 10000 <_chip_info_end>
+20001a7e:       |  |      2d400593              li      a1,724
+20001a82:       |  |      952e                  add     a0,a0,a1
+20001a84:       |  |      4585                  li      a1,1
+20001a86:       |  |      521000ef              jal     ra,200027a6 <base_log_internal_dv>
+20001a8a:       |  |  /-- a801                  j       20001a9a <ottf_console_flow_control_isr+0x76>
+20001a8c:       |  \--|-> 00004517              auipc   a0,0x4
+20001a90:       |     |   dc050513              addi    a0,a0,-576 # 2000584c <ottf_console_flow_control_isr.log_fields>
+20001a94:       |     |   85b2                  mv      a1,a2
+20001a96:       |     |   475000ef              jal     ra,2000270a <base_log_internal_core>
+20001a9a:       |     \-> 6531                  lui     a0,0xc
+20001a9c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aa0:       |         39b000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001aa4:       \-------> 00f14483              lbu     s1,15(sp)
+20001aa8:       /-------- c4a1                  beqz    s1,20001af0 <ottf_console_flow_control_isr+0xcc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:341
+    manage_flow_control(uart, kOttfConsoleFlowControlAuto);
+20001aaa:       |         4585                  li      a1,1
+20001aac:       |         8522                  mv      a0,s0
+20001aae:       |         2889                  jal     20001b00 <manage_flow_control>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:342
+    CHECK_DIF_OK(dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark));
+20001ab0:       |         4585                  li      a1,1
+20001ab2:       |         8522                  mv      a0,s0
+20001ab4:       |         3ef010ef              jal     ra,200036a2 <dif_uart_irq_acknowledge>
+20001ab8:       +-------- cd05                  beqz    a0,20001af0 <ottf_console_flow_control_isr+0xcc>
+20001aba:       |         862a                  mv      a2,a0
+20001abc:       |         87c92503              lw      a0,-1924(s2)
+20001ac0:       |  /----- cd01                  beqz    a0,20001ad8 <ottf_console_flow_control_isr+0xb4>
+20001ac2:       |  |      e000e517              auipc   a0,0xe000e
+20001ac6:       |  |      53e50513              addi    a0,a0,1342 # 10000 <_chip_info_end>
+20001aca:       |  |      2e800593              li      a1,744
+20001ace:       |  |      952e                  add     a0,a0,a1
+20001ad0:       |  |      4585                  li      a1,1
+20001ad2:       |  |      4d5000ef              jal     ra,200027a6 <base_log_internal_dv>
+20001ad6:       |  |  /-- a801                  j       20001ae6 <ottf_console_flow_control_isr+0xc2>
+20001ad8:       |  \--|-> 00004517              auipc   a0,0x4
+20001adc:       |     |   d8850513              addi    a0,a0,-632 # 20005860 <ottf_console_flow_control_isr.log_fields.46>
+20001ae0:       |     |   85b2                  mv      a1,a2
+20001ae2:       |     |   429000ef              jal     ra,2000270a <base_log_internal_core>
+20001ae6:       |     \-> 6531                  lui     a0,0xc
+20001ae8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aec:       |         34f000ef              jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001af0:       \-------> 00903533              snez    a0,s1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:346
+}
+20001af4:                 40f2                  lw      ra,28(sp)
+20001af6:                 4462                  lw      s0,24(sp)
+20001af8:                 44d2                  lw      s1,20(sp)
+20001afa:                 4942                  lw      s2,16(sp)
+20001afc:                 6105                  addi    sp,sp,32
+20001afe:                 8082                  ret
+
+20001b00 <manage_flow_control>:
+manage_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:304
+                                    ottf_console_flow_control_t ctrl) {
+20001b00:                                1101                   addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:305
+  if (flow_control_state == kOttfConsoleFlowControlNone) {
+20001b02:                                ce06                   sw      ra,28(sp)
+20001b04:                                cc22                   sw      s0,24(sp)
+20001b06:                                ca26                   sw      s1,20(sp)
+20001b08:                                c84a                   sw      s2,16(sp)
+20001b0a:                                f0000417               auipc   s0,0xf0000
+20001b0e:                                57a42603               lw      a2,1402(s0) # 10002084 <flow_control_state>
+20001b12:                      /-------- c249                   beqz    a2,20001b94 <manage_flow_control+0x94>
+20001b14:                      |         84ae                   mv      s1,a1
+20001b16:                      |         892a                   mv      s2,a0
+20001b18:                      |         4505                   li      a0,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:308
+  if (ctrl == kOttfConsoleFlowControlAuto) {
+20001b1a:       /--------------|-------- 12a59863               bne     a1,a0,20001c4a <manage_flow_control+0x14a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001b1e:       |              |         006c                   addi    a1,sp,12
+20001b20:       |              |         854a                   mv      a0,s2
+20001b22:       |              |         591010ef               jal     ra,200038b2 <dif_uart_rx_bytes_available>
+20001b26:       |              |         c42a                   sw      a0,8(sp)
+20001b28:       |              |         0048                   addi    a0,sp,4
+20001b2a:       |              |         002c                   addi    a1,sp,8
+20001b2c:       |              |         4611                   li      a2,4
+20001b2e:       |              |         598020ef               jal     ra,200040c6 <memcpy>
+20001b32:       |              |         4512                   lw      a0,4(sp)
+20001b34:       |              |         00153593               seqz    a1,a0
+20001b38:       |              |         15fd                   addi    a1,a1,-1
+20001b3a:       |              |         1365f693               andi    a3,a1,310
+20001b3e:       |              |         00003597               auipc   a1,0x3
+20001b42:       |              |         f7a58613               addi    a2,a1,-134 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001b46:       |              |         0e8f05b7               lui     a1,0xe8f0
+20001b4a:       |              |         678010ef               jal     ra,200031c2 <status_create>
+20001b4e:       |              |     /-- 06054363               bltz    a0,20001bb4 <manage_flow_control+0xb4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b52:       |              |     |   4532                   lw      a0,12(sp)
+20001b54:       |              |     |   458d                   li      a1,3
+20001b56:       |              |  /--|-- 06a5ee63               bltu    a1,a0,20001bd2 <manage_flow_control+0xd2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:312
+        flow_control_state != kOttfConsoleFlowControlResume) {
+20001b5a:       |              |  |  |   57a42503               lw      a0,1402(s0)
+20001b5e:       |              |  |  |   44c5                   li      s1,17
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b60:       |           /--|--|--|-- 08950163               beq     a0,s1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001b64:       |           |  |  |  |   4585                   li      a1,1
+20001b66:       |           |  |  |  |   4605                   li      a2,1
+20001b68:       |           |  |  |  |   854a                   mv      a0,s2
+20001b6a:       |           |  |  |  |   355010ef               jal     ra,200036be <dif_uart_irq_set_enabled>
+20001b6e:       +-----------|--|--|--|-- 0c050e63               beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001b72:       |           |  |  |  |   862a                   mv      a2,a0
+20001b74:       |           |  |  |  |   00004517               auipc   a0,0x4
+20001b78:       |           |  |  |  |   77052503               lw      a0,1904(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20001b7c:       |     /-----|--|--|--|-- c14d                   beqz    a0,20001c1e <manage_flow_control+0x11e>
+20001b7e:       |     |     |  |  |  |   e000e517               auipc   a0,0xe000e
+20001b82:       |     |     |  |  |  |   48250513               addi    a0,a0,1154 # 10000 <_chip_info_end>
+20001b86:       |     |     |  |  |  |   40000593               li      a1,1024
+20001b8a:       |     |     |  |  |  |   952e                   add     a0,a0,a1
+20001b8c:       |     |     |  |  |  |   4585                   li      a1,1
+20001b8e:       |     |     |  |  |  |   419000ef               jal     ra,200027a6 <base_log_internal_dv>
+20001b92:       |     |  /--|--|--|--|-- a869                   j       20001c2c <manage_flow_control+0x12c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:306
+    return OK_STATUS((int32_t)flow_control_state);
+20001b94:       |     |  |  |  \--|--|-> 57a42683               lw      a3,1402(s0)
+20001b98:       |     |  |  |     |  |   00003517               auipc   a0,0x3
+20001b9c:       |     |  |  |     |  |   f2050613               addi    a2,a0,-224 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ba0:       |     |  |  |     |  |   0e8f05b7               lui     a1,0xe8f0
+20001ba4:       |     |  |  |     |  |   4501                   li      a0,0
+20001ba6:       |     |  |  |     |  |   40f2                   lw      ra,28(sp)
+20001ba8:       |     |  |  |     |  |   4462                   lw      s0,24(sp)
+20001baa:       |     |  |  |     |  |   44d2                   lw      s1,20(sp)
+20001bac:       |     |  |  |     |  |   4942                   lw      s2,16(sp)
+20001bae:       |     |  |  |     |  |   6105                   addi    sp,sp,32
+20001bb0:       |     |  |  |     |  |   6120106f               j       200031c2 <status_create>
+20001bb4:       |     |  |  |     |  \-> 84aa                   mv      s1,a0
+20001bb6:       |     |  |  |     |      897d                   andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001bb8:       |     |  |  |     |      00003597               auipc   a1,0x3
+20001bbc:       |     |  |  |     |      f0058613               addi    a2,a1,-256 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bc0:       |     |  |  |     |      0e8f05b7               lui     a1,0xe8f0
+20001bc4:       |     |  |  |     |      13600693               li      a3,310
+20001bc8:       |     |  |  |     |      5fa010ef               jal     ra,200031c2 <status_create>
+20001bcc:       |     |  |  |     |      f37fe0ef               jal     ra,20000b02 <status_report>
+20001bd0:       |  /--|--|--|-----|----- a0d5                   j       20001cb4 <manage_flow_control+0x1b4>
+20001bd2:       |  |  |  |  |     \----> 45a1                   li      a1,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bd4:       |  |  |  |  +----------- 00b56763               bltu    a0,a1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:319
+               flow_control_state != kOttfConsoleFlowControlPause) {
+20001bd8:       |  |  |  |  |            57a42503               lw      a0,1402(s0)
+20001bdc:       |  |  |  |  |            44cd                   li      s1,19
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bde:       |  |  |  |  |        /-- 00951963               bne     a0,s1,20001bf0 <manage_flow_control+0xf0>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:326
+      return OK_STATUS((int32_t)flow_control_state);
+20001be2:       |  |  |  |  \--------|-> 57a42683               lw      a3,1402(s0)
+20001be6:       |  |  |  |           |   00003517               auipc   a0,0x3
+20001bea:       |  |  |  |           |   ed250613               addi    a2,a0,-302 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bee:       |  |  |  |  /--------|-- a86d                   j       20001ca8 <manage_flow_control+0x1a8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001bf0:       |  |  |  |  |        \-> 4585                   li      a1,1
+20001bf2:       |  |  |  |  |            854a                   mv      a0,s2
+20001bf4:       |  |  |  |  |            4601                   li      a2,0
+20001bf6:       |  |  |  |  |            2c9010ef               jal     ra,200036be <dif_uart_irq_set_enabled>
+20001bfa:       +--|--|--|--|----------- c921                   beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001bfc:       |  |  |  |  |            862a                   mv      a2,a0
+20001bfe:       |  |  |  |  |            00004517               auipc   a0,0x4
+20001c02:       |  |  |  |  |            6e652503               lw      a0,1766(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20001c06:       |  |  |  |  |  /-------- c50d                   beqz    a0,20001c30 <manage_flow_control+0x130>
+20001c08:       |  |  |  |  |  |         e000e517               auipc   a0,0xe000e
+20001c0c:       |  |  |  |  |  |         3f850513               addi    a0,a0,1016 # 10000 <_chip_info_end>
+20001c10:       |  |  |  |  |  |         41400593               li      a1,1044
+20001c14:       |  |  |  |  |  |         952e                   add     a0,a0,a1
+20001c16:       |  |  |  |  |  |         4585                   li      a1,1
+20001c18:       |  |  |  |  |  |         38f000ef               jal     ra,200027a6 <base_log_internal_dv>
+20001c1c:       |  |  |  |  |  |  /----- a00d                   j       20001c3e <manage_flow_control+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c1e:       |  |  \--|--|--|--|----> 00004517               auipc   a0,0x4
+20001c22:       |  |     |  |  |  |      cf650513               addi    a0,a0,-778 # 20005914 <manage_flow_control.log_fields>
+20001c26:       |  |     |  |  |  |      85b2                   mv      a1,a2
+20001c28:       |  |     |  |  |  |      2e3000ef               jal     ra,2000270a <base_log_internal_core>
+20001c2c:       |  |     \--|--|--|----> 44c5                   li      s1,17
+20001c2e:       |  |        |  |  |  /-- a809                   j       20001c40 <manage_flow_control+0x140>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c30:       |  |        |  \--|--|-> 00004517               auipc   a0,0x4
+20001c34:       |  |        |     |  |   cf850513               addi    a0,a0,-776 # 20005928 <manage_flow_control.log_fields.82>
+20001c38:       |  |        |     |  |   85b2                   mv      a1,a2
+20001c3a:       |  |        |     |  |   2d1000ef               jal     ra,2000270a <base_log_internal_core>
+20001c3e:       |  |        |     \--|-> 44cd                   li      s1,19
+20001c40:       |  |        |        \-> 6531                   lui     a0,0xc
+20001c42:       |  |        |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c46:       |  |        |            1f5000ef               jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:329
+  uint8_t byte = (uint8_t)ctrl;
+20001c4a:       \--|--------|----------> 009101a3               sb      s1,3(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:330
+  CHECK_DIF_OK(dif_uart_bytes_send(uart, &byte, 1, NULL));
+20001c4e:          |        |            00310593               addi    a1,sp,3
+20001c52:          |        |            4605                   li      a2,1
+20001c54:          |        |            854a                   mv      a0,s2
+20001c56:          |        |            4681                   li      a3,0
+20001c58:          |        |            3cf010ef               jal     ra,20003826 <dif_uart_bytes_send>
+20001c5c:          |        |  /-------- cd15                   beqz    a0,20001c98 <manage_flow_control+0x198>
+20001c5e:          |        |  |         862a                   mv      a2,a0
+20001c60:          |        |  |         00004517               auipc   a0,0x4
+20001c64:          |        |  |         68452503               lw      a0,1668(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+20001c68:          |        |  |  /----- cd01                   beqz    a0,20001c80 <manage_flow_control+0x180>
+20001c6a:          |        |  |  |      e000e517               auipc   a0,0xe000e
+20001c6e:          |        |  |  |      39650513               addi    a0,a0,918 # 10000 <_chip_info_end>
+20001c72:          |        |  |  |      42800593               li      a1,1064
+20001c76:          |        |  |  |      952e                   add     a0,a0,a1
+20001c78:          |        |  |  |      4585                   li      a1,1
+20001c7a:          |        |  |  |      32d000ef               jal     ra,200027a6 <base_log_internal_dv>
+20001c7e:          |        |  |  |  /-- a801                   j       20001c8e <manage_flow_control+0x18e>
+20001c80:          |        |  |  \--|-> 00004517               auipc   a0,0x4
+20001c84:          |        |  |     |   cbc50513               addi    a0,a0,-836 # 2000593c <manage_flow_control.log_fields.85>
+20001c88:          |        |  |     |   85b2                   mv      a1,a2
+20001c8a:          |        |  |     |   281000ef               jal     ra,2000270a <base_log_internal_core>
+20001c8e:          |        |  |     \-> 6531                   lui     a0,0xc
+20001c90:          |        |  |         aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c94:          |        |  |         1a7000ef               jal     ra,2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:331
+  flow_control_state = ctrl;
+20001c98:          |        |  \-------> 56942d23               sw      s1,1402(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:332
+  return OK_STATUS((int32_t)flow_control_state);
+20001c9c:          |        |            57a42683               lw      a3,1402(s0)
+20001ca0:          |        |            00003517               auipc   a0,0x3
+20001ca4:          |        |            e1850613               addi    a2,a0,-488 # 20004ab8 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ca8:          |        \----------> 0e8f05b7               lui     a1,0xe8f0
+20001cac:          |                     4501                   li      a0,0
+20001cae:          |                     514010ef               jal     ra,200031c2 <status_create>
+20001cb2:          |                     84aa                   mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:333
+}
+20001cb4:          \-------------------> 8526                   mv      a0,s1
+20001cb6:                                40f2                   lw      ra,28(sp)
+20001cb8:                                4462                   lw      s0,24(sp)
+20001cba:                                44d2                   lw      s1,20(sp)
+20001cbc:                                4942                   lw      s2,16(sp)
+20001cbe:                                6105                   addi    sp,sp,32
+20001cc0:                                8082                   ret
+
+20001cc2 <irq_global_ctrl>:
+irq_global_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:18
+void irq_set_vector_offset(uintptr_t address) {
+  CSR_WRITE(CSR_REG_MTVEC, (uint32_t)address);
+}
+
+void irq_global_ctrl(bool en) {
+  if (en) {
+20001cc2:       /-- c509                        beqz    a0,20001ccc <irq_global_ctrl+0xa>
+20001cc4:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:19
+    CSR_SET_BITS(CSR_REG_MSTATUS, 0x8);
+20001cc6:       |   30052073            csrs    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+  }
+}
+20001cca:       |   8082                        ret
+20001ccc:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:21
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+20001cce:           30053073            csrc    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+}
+20001cd2:           8082                        ret
+
+20001cd4 <irq_external_ctrl>:
+irq_external_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:27
+
+void irq_external_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_EXT_ENABLE_OFFSET;
+  if (en) {
+20001cd4:       /-- c511                        beqz    a0,20001ce0 <irq_external_ctrl+0xc>
+20001cd6:       |   28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:28
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cda:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cde:       |   8082                        ret
+20001ce0:       \-> 28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:30
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001ce4:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+}
+20001ce8:           8082                        ret
+
+20001cea <irq_timer_ctrl>:
+irq_timer_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:36
+
+void irq_timer_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_TIMER_ENABLE_OFFSET;
+  if (en) {
+20001cea:       /-- c511                        beqz    a0,20001cf6 <irq_timer_ctrl+0xc>
+20001cec:       |   08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:37
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cf0:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cf4:       |   8082                        ret
+20001cf6:       \-> 08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:39
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001cfa:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+}
+20001cfe:           8082                        ret
+
+20001d00 <irq_software_ctrl>:
+irq_software_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:45
+
+void irq_software_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_SW_ENABLE_OFFSET;
+  if (en) {
+20001d00:       /-- c509                        beqz    a0,20001d0a <irq_software_ctrl+0xa>
+20001d02:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:46
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001d04:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001d08:       |   8082                        ret
+20001d0a:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:48
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001d0c:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+}
+20001d10:           8082                        ret
+
+20001d12 <spi_device_testutils_wait_for_upload>:
+spi_device_testutils_wait_for_upload():
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:361
+  }
+  return OK_STATUS();
+}
+
+status_t spi_device_testutils_wait_for_upload(dif_spi_device_handle_t *spid,
+                                              upload_info_t *info) {
+20001d12:                                               7179                    addi    sp,sp,-48
+20001d14:                                               d606                    sw      ra,44(sp)
+20001d16:                                               d422                    sw      s0,40(sp)
+20001d18:                                               d226                    sw      s1,36(sp)
+20001d1a:                                               d04a                    sw      s2,32(sp)
+20001d1c:                                               ce4e                    sw      s3,28(sp)
+20001d1e:                                               cc52                    sw      s4,24(sp)
+20001d20:                                               892e                    mv      s2,a1
+20001d22:                                               8a2a                    mv      s4,a0
+20001d24:                                               00004517                auipc   a0,0x4
+20001d28:                                               c2c50413                addi    s0,a0,-980 # 20005950 <manage_flow_control.log_fields.85+0x14>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+  // Wait for a SPI transaction cause an upload.
+  bool upload_pending;
+  do {
+    // The UploadCmdfifoNotEmpty interrupt status is updated after the SPI
+    // transaction completes.
+    TRY(dif_spi_device_irq_is_pending(
+20001d2c:                                           /-> 01710613                addi    a2,sp,23
+20001d30:                                           |   8552                    mv      a0,s4
+20001d32:                                           |   4581                    li      a1,0
+20001d34:                                           |   5d4010ef                jal     ra,20003308 <dif_spi_device_irq_is_pending>
+20001d38:                                           |   c82a                    sw      a0,16(sp)
+20001d3a:                                           |   0068                    addi    a0,sp,12
+20001d3c:                                           |   080c                    addi    a1,sp,16
+20001d3e:                                           |   4611                    li      a2,4
+20001d40:                                           |   386020ef                jal     ra,200040c6 <memcpy>
+20001d44:                                           |   4532                    lw      a0,12(sp)
+20001d46:                                           |   00153593                seqz    a1,a0
+20001d4a:                                           |   15fd                    addi    a1,a1,-1
+20001d4c:                                           |   1705f693                andi    a3,a1,368
+20001d50:                                           |   509305b7                lui     a1,0x50930
+20001d54:                                           |   8622                    mv      a2,s0
+20001d56:                                           |   46c010ef                jal     ra,200031c2 <status_create>
+20001d5a:                /--------------------------|-- 1c054463                bltz    a0,20001f22 <spi_device_testutils_wait_for_upload+0x210>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:369
+        &spid->dev, kDifSpiDeviceIrqUploadCmdfifoNotEmpty, &upload_pending));
+  } while (!upload_pending);
+20001d5e:                |                          |   01714503                lbu     a0,23(sp)
+20001d62:                |                          \-- d569                    beqz    a0,20001d2c <spi_device_testutils_wait_for_upload+0x1a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+
+  uint8_t occupancy;
+
+  // Get the SPI opcode.
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001d64:                |                              00b10593                addi    a1,sp,11
+20001d68:                |                              8552                    mv      a0,s4
+20001d6a:                |                              76a010ef                jal     ra,200034d4 <dif_spi_device_get_flash_command_fifo_occupancy>
+20001d6e:                |                              c82a                    sw      a0,16(sp)
+20001d70:                |                              0068                    addi    a0,sp,12
+20001d72:                |                              080c                    addi    a1,sp,16
+20001d74:                |                              4611                    li      a2,4
+20001d76:                |                              350020ef                jal     ra,200040c6 <memcpy>
+20001d7a:                |                              4532                    lw      a0,12(sp)
+20001d7c:                |                              00153593                seqz    a1,a0
+20001d80:                |                              15fd                    addi    a1,a1,-1
+20001d82:                |                              1765f693                andi    a3,a1,374
+20001d86:                |                              00004597                auipc   a1,0x4
+20001d8a:                |                              bca58613                addi    a2,a1,-1078 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001d8e:                |                              509305b7                lui     a1,0x50930
+20001d92:                |                              430010ef                jal     ra,200031c2 <status_create>
+20001d96:                |                       /----- 1a054163                bltz    a0,20001f38 <spi_device_testutils_wait_for_upload+0x226>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:375
+  if (occupancy != 1) {
+20001d9a:                |                       |      00b14503                lbu     a0,11(sp)
+20001d9e:                |                       |      4585                    li      a1,1
+20001da0:       /--------|-----------------------|----- 1ab51763                bne     a0,a1,20001f4e <spi_device_testutils_wait_for_upload+0x23c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+    // Cannot have an uploaded command without an opcode.
+    return INTERNAL();
+  }
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001da4:       |        |                       |      8552                    mv      a0,s4
+20001da6:       |        |                       |      85ca                    mv      a1,s2
+20001da8:       |        |                       |      796010ef                jal     ra,2000353e <dif_spi_device_pop_flash_command_fifo>
+20001dac:       |        |                       |      c82a                    sw      a0,16(sp)
+20001dae:       |        |                       |      0068                    addi    a0,sp,12
+20001db0:       |        |                       |      080c                    addi    a1,sp,16
+20001db2:       |        |                       |      4611                    li      a2,4
+20001db4:       |        |                       |      312020ef                jal     ra,200040c6 <memcpy>
+20001db8:       |        |                       |      4532                    lw      a0,12(sp)
+20001dba:       |        |                       |      00153593                seqz    a1,a0
+20001dbe:       |        |                       |      15fd                    addi    a1,a1,-1
+20001dc0:       |        |                       |      17b5f693                andi    a3,a1,379
+20001dc4:       |        |                       |      00004597                auipc   a1,0x4
+20001dc8:       |        |                       |      b8c58613                addi    a2,a1,-1140 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001dcc:       |        |                       |      509305b7                lui     a1,0x50930
+20001dd0:       |        |                       |      3f2010ef                jal     ra,200031c2 <status_create>
+20001dd4:       |  /-----|-----------------------|----- 18054a63                bltz    a0,20001f68 <spi_device_testutils_wait_for_upload+0x256>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  // Get the flash_status register.
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001dd8:       |  |     |                       |      00890593                addi    a1,s2,8
+20001ddc:       |  |     |                       |      8552                    mv      a0,s4
+20001dde:       |  |     |                       |      073010ef                jal     ra,20003650 <dif_spi_device_get_flash_status_registers>
+20001de2:       |  |     |                       |      c82a                    sw      a0,16(sp)
+20001de4:       |  |     |                       |      0068                    addi    a0,sp,12
+20001de6:       |  |     |                       |      080c                    addi    a1,sp,16
+20001de8:       |  |     |                       |      4611                    li      a2,4
+20001dea:       |  |     |                       |      2dc020ef                jal     ra,200040c6 <memcpy>
+20001dee:       |  |     |                       |      4532                    lw      a0,12(sp)
+20001df0:       |  |     |                       |      00153593                seqz    a1,a0
+20001df4:       |  |     |                       |      15fd                    addi    a1,a1,-1
+20001df6:       |  |     |                       |      17d5f693                andi    a3,a1,381
+20001dfa:       |  |     |                       |      00004597                auipc   a1,0x4
+20001dfe:       |  |     |                       |      b5658613                addi    a2,a1,-1194 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001e02:       |  |     |                       |      509305b7                lui     a1,0x50930
+20001e06:       |  |     |                       |      3bc010ef                jal     ra,200031c2 <status_create>
+20001e0a:       |  |  /--|-----------------------|----- 16054a63                bltz    a0,20001f7e <spi_device_testutils_wait_for_upload+0x26c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+
+  // Get the SPI address (if available).
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001e0e:       |  |  |  |                       |      00b10593                addi    a1,sp,11
+20001e12:       |  |  |  |                       |      8552                    mv      a0,s4
+20001e14:       |  |  |  |                       |      6de010ef                jal     ra,200034f2 <dif_spi_device_get_flash_address_fifo_occupancy>
+20001e18:       |  |  |  |                       |      c82a                    sw      a0,16(sp)
+20001e1a:       |  |  |  |                       |      0068                    addi    a0,sp,12
+20001e1c:       |  |  |  |                       |      080c                    addi    a1,sp,16
+20001e1e:       |  |  |  |                       |      4611                    li      a2,4
+20001e20:       |  |  |  |                       |      2a6020ef                jal     ra,200040c6 <memcpy>
+20001e24:       |  |  |  |                       |      4532                    lw      a0,12(sp)
+20001e26:       |  |  |  |                       |      00153593                seqz    a1,a0
+20001e2a:       |  |  |  |                       |      15fd                    addi    a1,a1,-1
+20001e2c:       |  |  |  |                       |      1805f693                andi    a3,a1,384
+20001e30:       |  |  |  |                       |      00004597                auipc   a1,0x4
+20001e34:       |  |  |  |                       |      b2058613                addi    a2,a1,-1248 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001e38:       |  |  |  |                       |      509305b7                lui     a1,0x50930
+20001e3c:       |  |  |  |                       |      386010ef                jal     ra,200031c2 <status_create>
+20001e40:       |  |  |  |     /-----------------|----- 14054a63                bltz    a0,20001f94 <spi_device_testutils_wait_for_upload+0x282>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:385
+  if (occupancy) {
+20001e44:       |  |  |  |     |                 |      00b14503                lbu     a0,11(sp)
+20001e48:       |  |  |  |     |                 |  /-- cd35                    beqz    a0,20001ec4 <spi_device_testutils_wait_for_upload+0x1b2>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:387
+    dif_toggle_t addr_4b;
+    TRY(dif_spi_device_get_4b_address_mode(spid, &addr_4b));
+20001e4a:       |  |  |  |     |                 |  |   080c                    addi    a1,sp,16
+20001e4c:       |  |  |  |     |                 |  |   8552                    mv      a0,s4
+20001e4e:       |  |  |  |     |                 |  |   550010ef                jal     ra,2000339e <dif_spi_device_get_4b_address_mode>
+20001e52:       |  |  |  |     |                 |  |   c62a                    sw      a0,12(sp)
+20001e54:       |  |  |  |     |                 |  |   0048                    addi    a0,sp,4
+20001e56:       |  |  |  |     |                 |  |   006c                    addi    a1,sp,12
+20001e58:       |  |  |  |     |                 |  |   4611                    li      a2,4
+20001e5a:       |  |  |  |     |                 |  |   26c020ef                jal     ra,200040c6 <memcpy>
+20001e5e:       |  |  |  |     |                 |  |   4512                    lw      a0,4(sp)
+20001e60:       |  |  |  |     |                 |  |   00153593                seqz    a1,a0
+20001e64:       |  |  |  |     |                 |  |   15fd                    addi    a1,a1,-1
+20001e66:       |  |  |  |     |                 |  |   1835f693                andi    a3,a1,387
+20001e6a:       |  |  |  |     |                 |  |   00004597                auipc   a1,0x4
+20001e6e:       |  |  |  |     |                 |  |   ae658613                addi    a2,a1,-1306 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001e72:       |  |  |  |     |                 |  |   509305b7                lui     a1,0x50930
+20001e76:       |  |  |  |     |                 |  |   34c010ef                jal     ra,200031c2 <status_create>
+20001e7a:       |  |  |  |     |  /--------------|--|-- 12054863                bltz    a0,20001faa <spi_device_testutils_wait_for_upload+0x298>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:388
+    info->addr_4b = addr_4b;
+20001e7e:       |  |  |  |     |  |              |  |   4542                    lw      a0,16(sp)
+20001e80:       |  |  |  |     |  |              |  |   00a03533                snez    a0,a0
+20001e84:       |  |  |  |     |  |              |  |   00a90123                sb      a0,2(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:389
+    TRY(dif_spi_device_pop_flash_address_fifo(spid, &info->address));
+20001e88:       |  |  |  |     |  |              |  |   00c90593                addi    a1,s2,12
+20001e8c:       |  |  |  |     |  |              |  |   8552                    mv      a0,s4
+20001e8e:       |  |  |  |     |  |              |  |   6d6010ef                jal     ra,20003564 <dif_spi_device_pop_flash_address_fifo>
+20001e92:       |  |  |  |     |  |              |  |   c62a                    sw      a0,12(sp)
+20001e94:       |  |  |  |     |  |              |  |   0048                    addi    a0,sp,4
+20001e96:       |  |  |  |     |  |              |  |   006c                    addi    a1,sp,12
+20001e98:       |  |  |  |     |  |              |  |   4611                    li      a2,4
+20001e9a:       |  |  |  |     |  |              |  |   22c020ef                jal     ra,200040c6 <memcpy>
+20001e9e:       |  |  |  |     |  |              |  |   4512                    lw      a0,4(sp)
+20001ea0:       |  |  |  |     |  |              |  |   00153593                seqz    a1,a0
+20001ea4:       |  |  |  |     |  |              |  |   15fd                    addi    a1,a1,-1
+20001ea6:       |  |  |  |     |  |              |  |   1855f693                andi    a3,a1,389
+20001eaa:       |  |  |  |     |  |              |  |   00004597                auipc   a1,0x4
+20001eae:       |  |  |  |     |  |              |  |   aa658613                addi    a2,a1,-1370 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001eb2:       |  |  |  |     |  |              |  |   509305b7                lui     a1,0x50930
+20001eb6:       |  |  |  |     |  |              |  |   30c010ef                jal     ra,200031c2 <status_create>
+20001eba:       |  |  |  |     |  |     /--------|--|-- 10054763                bltz    a0,20001fc8 <spi_device_testutils_wait_for_upload+0x2b6>
+20001ebe:       |  |  |  |     |  |     |        |  |   4505                    li      a0,1
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:390
+    info->has_address = true;
+20001ec0:       |  |  |  |     |  |     |        |  |   00a900a3                sb      a0,1(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  }
+
+  // Get the SPI data payload (if available).
+  uint32_t start;
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001ec4:       |  |  |  |     |  |     |        |  \-> 00490993                addi    s3,s2,4
+20001ec8:       |  |  |  |     |  |     |        |      0810                    addi    a2,sp,16
+20001eca:       |  |  |  |     |  |     |        |      8552                    mv      a0,s4
+20001ecc:       |  |  |  |     |  |     |        |      85ce                    mv      a1,s3
+20001ece:       |  |  |  |     |  |     |        |      644010ef                jal     ra,20003512 <dif_spi_device_get_flash_payload_fifo_occupancy>
+20001ed2:       |  |  |  |     |  |     |        |      c62a                    sw      a0,12(sp)
+20001ed4:       |  |  |  |     |  |     |        |      0048                    addi    a0,sp,4
+20001ed6:       |  |  |  |     |  |     |        |      006c                    addi    a1,sp,12
+20001ed8:       |  |  |  |     |  |     |        |      4611                    li      a2,4
+20001eda:       |  |  |  |     |  |     |        |      1ec020ef                jal     ra,200040c6 <memcpy>
+20001ede:       |  |  |  |     |  |     |        |      4512                    lw      a0,4(sp)
+20001ee0:       |  |  |  |     |  |     |        |      00153593                seqz    a1,a0
+20001ee4:       |  |  |  |     |  |     |        |      15fd                    addi    a1,a1,-1
+20001ee6:       |  |  |  |     |  |     |        |      18c5f693                andi    a3,a1,396
+20001eea:       |  |  |  |     |  |     |        |      00004597                auipc   a1,0x4
+20001eee:       |  |  |  |     |  |     |        |      a6658613                addi    a2,a1,-1434 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001ef2:       |  |  |  |     |  |     |        |      509305b7                lui     a1,0x50930
+20001ef6:       |  |  |  |     |  |     |        |      2cc010ef                jal     ra,200031c2 <status_create>
+20001efa:       |  |  |  |     |  |     |     /--|----- 0a054c63                bltz    a0,20001fb2 <spi_device_testutils_wait_for_upload+0x2a0>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:397
+                                                      &start));
+  if (info->data_len) {
+20001efe:       |  |  |  |     |  |     |     |  |      0009d603                lhu     a2,0(s3)
+20001f02:       |  |  |  |     |  |  /--|-----|--|----- 12060763                beqz    a2,20002030 <spi_device_testutils_wait_for_upload+0x31e>
+20001f06:       |  |  |  |     |  |  |  |     |  |      10100513                li      a0,257
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:398
+    if (info->data_len > sizeof(info->data)) {
+20001f0a:       |  |  |  |     |  |  |  |  /--|--|----- 0ea66763                bltu    a2,a0,20001ff8 <spi_device_testutils_wait_for_upload+0x2e6>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:400
+      // We aren't expecting more than 256 bytes of data.
+      return INVALID_ARGUMENT();
+20001f0e:       |  |  |  |     |  |  |  |  |  |  |      00004517                auipc   a0,0x4
+20001f12:       |  |  |  |     |  |  |  |  |  |  |      a4250613                addi    a2,a0,-1470 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f16:       |  |  |  |     |  |  |  |  |  |  |      450d                    li      a0,3
+20001f18:       |  |  |  |     |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f1c:       |  |  |  |     |  |  |  |  |  |  |      19000693                li      a3,400
+20001f20:       |  |  |  |  /--|--|--|--|--|--|--|----- a081                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20001f22:       |  |  |  \--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f24:       |  |  |     |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+    TRY(dif_spi_device_irq_is_pending(
+20001f26:       |  |  |     |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f2a:       |  |  |     |  |  |  |  |  |  |  |      a2a58613                addi    a2,a1,-1494 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f2e:       |  |  |     |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f32:       |  |  |     |  |  |  |  |  |  |  |      17000693                li      a3,368
+20001f36:       |  |  |  /--|--|--|--|--|--|--|--|----- a065                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f38:       |  |  |  |  |  |  |  |  |  |  |  \----> 84aa                    mv      s1,a0
+20001f3a:       |  |  |  |  |  |  |  |  |  |  |         897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001f3c:       |  |  |  |  |  |  |  |  |  |  |         00004597                auipc   a1,0x4
+20001f40:       |  |  |  |  |  |  |  |  |  |  |         a1458613                addi    a2,a1,-1516 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f44:       |  |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f48:       |  |  |  |  |  |  |  |  |  |  |         17600693                li      a3,374
+20001f4c:       |  |  |  +--|--|--|--|--|--|--|-------- a849                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:377
+    return INTERNAL();
+20001f4e:       \--|--|--|--|--|--|--|--|--|--|-------> 00004517                auipc   a0,0x4
+20001f52:          |  |  |  |  |  |  |  |  |  |         a0250613                addi    a2,a0,-1534 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f56:          |  |  |  |  |  |  |  |  |  |         4535                    li      a0,13
+20001f58:          |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f5c:          |  |  |  |  |  |  |  |  |  |         17900693                li      a3,377
+20001f60:          |  |  |  >--|--|--|--|--|--|-------> 262010ef                jal     ra,200031c2 <status_create>
+20001f64:          |  |  |  |  |  |  |  |  |  |         84aa                    mv      s1,a0
+20001f66:          |  |  |  |  |  |  |  |  |  |  /----- a041                    j       20001fe6 <spi_device_testutils_wait_for_upload+0x2d4>
+20001f68:          \--|--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f6a:             |  |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001f6c:             |  |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f70:             |  |  |  |  |  |  |  |  |  |      9e458613                addi    a2,a1,-1564 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f74:             |  |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f78:             |  |  |  |  |  |  |  |  |  |      17b00693                li      a3,379
+20001f7c:             |  +--|--|--|--|--|--|--|--|----- a08d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f7e:             \--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f80:                |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001f82:                |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f86:                |  |  |  |  |  |  |  |  |      9ce58613                addi    a2,a1,-1586 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001f8a:                |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f8e:                |  |  |  |  |  |  |  |  |      17d00693                li      a3,381
+20001f92:                +--|--|--|--|--|--|--|--|----- a0b1                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f94:                |  |  \--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f96:                |  |     |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001f98:                |  |     |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f9c:                |  |     |  |  |  |  |  |      9b858613                addi    a2,a1,-1608 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001fa0:                |  |     |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001fa4:                |  |     |  |  |  |  |  |      18000693                li      a3,384
+20001fa8:                +--|-----|--|--|--|--|--|----- a81d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001faa:                |  |     \--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001fac:                |  |        |  |  |  |  |      18300693                li      a3,387
+20001fb0:                |  |        |  |  |  |  |  /-- a839                    j       20001fce <spi_device_testutils_wait_for_upload+0x2bc>
+20001fb2:                |  |        |  |  |  \--|--|-> 84aa                    mv      s1,a0
+20001fb4:                |  |        |  |  |     |  |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001fb6:                |  |        |  |  |     |  |   00004597                auipc   a1,0x4
+20001fba:                |  |        |  |  |     |  |   99a58613                addi    a2,a1,-1638 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001fbe:                |  |        |  |  |     |  |   509305b7                lui     a1,0x50930
+20001fc2:                |  |        |  |  |     |  |   18c00693                li      a3,396
+20001fc6:                +--|--------|--|--|-----|--|-- a821                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001fc8:                |  |        |  \--|-----|--|-> 84aa                    mv      s1,a0
+20001fca:                |  |        |     |     |  |   18500693                li      a3,389
+20001fce:                |  |        |     |     |  \-> 01f4f513                andi    a0,s1,31
+20001fd2:                |  |        |     |     |      00004597                auipc   a1,0x4
+20001fd6:                |  |        |     |     |      97e58613                addi    a2,a1,-1666 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20001fda:                |  |        |     |     |      509305b7                lui     a1,0x50930
+20001fde:                >--|--------|-----|-----|----> 1e4010ef                jal     ra,200031c2 <status_create>
+20001fe2:                |  |        |     |     |      b21fe0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:410
+
+  // Finished: ack the IRQ.
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+                                     kDifSpiDeviceIrqUploadCmdfifoNotEmpty));
+  return OK_STATUS();
+}
+20001fe6:                |  |        |     |     \----> 8526                    mv      a0,s1
+20001fe8:                |  |        |     |            50b2                    lw      ra,44(sp)
+20001fea:                |  |        |     |            5422                    lw      s0,40(sp)
+20001fec:                |  |        |     |            5492                    lw      s1,36(sp)
+20001fee:                |  |        |     |            5902                    lw      s2,32(sp)
+20001ff0:                |  |        |     |            49f2                    lw      s3,28(sp)
+20001ff2:                |  |        |     |            4a62                    lw      s4,24(sp)
+20001ff4:                |  |        |     |            6145                    addi    sp,sp,48
+20001ff6:                |  |        |     |            8082                    ret
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20001ff8:                |  |        |     \----------> 45c2                    lw      a1,16(sp)
+20001ffa:                |  |        |                  01090693                addi    a3,s2,16
+20001ffe:                |  |        |                  8552                    mv      a0,s4
+20002000:                |  |        |                  58a010ef                jal     ra,2000358a <dif_spi_device_read_flash_payload_buffer>
+20002004:                |  |        |                  c62a                    sw      a0,12(sp)
+20002006:                |  |        |                  0048                    addi    a0,sp,4
+20002008:                |  |        |                  006c                    addi    a1,sp,12
+2000200a:                |  |        |                  4611                    li      a2,4
+2000200c:                |  |        |                  0ba020ef                jal     ra,200040c6 <memcpy>
+20002010:                |  |        |                  4512                    lw      a0,4(sp)
+20002012:                |  |        |                  00153593                seqz    a1,a0
+20002016:                |  |        |                  15fd                    addi    a1,a1,-1
+20002018:                |  |        |                  1935f693                andi    a3,a1,403
+2000201c:                |  |        |                  00004597                auipc   a1,0x4
+20002020:                |  |        |                  93458613                addi    a2,a1,-1740 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20002024:                |  |        |                  509305b7                lui     a1,0x50930
+20002028:                |  |        |                  19a010ef                jal     ra,200031c2 <status_create>
+2000202c:                |  |        |           /----- 06054063                bltz    a0,2000208c <spi_device_testutils_wait_for_upload+0x37a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+20002030:                |  |        \-----------|----> 8552                    mv      a0,s4
+20002032:                |  |                    |      4581                    li      a1,0
+20002034:                |  |                    |      2fe010ef                jal     ra,20003332 <dif_spi_device_irq_acknowledge>
+20002038:                |  |                    |      c62a                    sw      a0,12(sp)
+2000203a:                |  |                    |      0048                    addi    a0,sp,4
+2000203c:                |  |                    |      006c                    addi    a1,sp,12
+2000203e:                |  |                    |      4611                    li      a2,4
+20002040:                |  |                    |      086020ef                jal     ra,200040c6 <memcpy>
+20002044:                |  |                    |      4512                    lw      a0,4(sp)
+20002046:                |  |                    |      00153593                seqz    a1,a0
+2000204a:                |  |                    |      15fd                    addi    a1,a1,-1
+2000204c:                |  |                    |      1985f693                andi    a3,a1,408
+20002050:                |  |                    |      00004597                auipc   a1,0x4
+20002054:                |  |                    |      90058613                addi    a2,a1,-1792 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20002058:                |  |                    |      509305b7                lui     a1,0x50930
+2000205c:                |  |                    |      166010ef                jal     ra,200031c2 <status_create>
+20002060:                |  |                    |  /-- 00054b63                bltz    a0,20002076 <spi_device_testutils_wait_for_upload+0x364>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:409
+  return OK_STATUS();
+20002064:                |  |                    |  |   00004517                auipc   a0,0x4
+20002068:                |  |                    |  |   8ec50613                addi    a2,a0,-1812 # 20005950 <manage_flow_control.log_fields.85+0x14>
+2000206c:                |  |                    |  |   509305b7                lui     a1,0x50930
+20002070:                |  |                    |  |   4501                    li      a0,0
+20002072:                |  |                    |  |   4681                    li      a3,0
+20002074:                |  \--------------------|--|-- b5f5                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20002076:                |                       |  \-> 84aa                    mv      s1,a0
+20002078:                |                       |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+2000207a:                |                       |      00004597                auipc   a1,0x4
+2000207e:                |                       |      8d658613                addi    a2,a1,-1834 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20002082:                |                       |      509305b7                lui     a1,0x50930
+20002086:                |                       |      19800693                li      a3,408
+2000208a:                +-----------------------|----- bf91                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+2000208c:                |                       \----> 84aa                    mv      s1,a0
+2000208e:                |                              897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20002090:                |                              00004597                auipc   a1,0x4
+20002094:                |                              8c058613                addi    a2,a1,-1856 # 20005950 <manage_flow_control.log_fields.85+0x14>
+20002098:                |                              509305b7                lui     a1,0x50930
+2000209c:                |                              19300693                li      a3,403
+200020a0:                \----------------------------- bf3d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+
+200020a2 <dif_pinmux_init>:
+dif_pinmux_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:18
+
+#include "pinmux_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_pinmux_init(mmio_region_t base_addr, dif_pinmux_t *pinmux) {
+  if (pinmux == NULL) {
+200020a2:       /----- c581                     beqz    a1,200020aa <dif_pinmux_init+0x8>
+200020a4:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:22
+    return kDifBadArg;
+  }
+
+  pinmux->base_addr = base_addr;
+200020a6:       |      c188                     sw      a0,0(a1)
+200020a8:       |  /-- a011                     j       200020ac <dif_pinmux_init+0xa>
+200020aa:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:25
+
+  return kDifOk;
+}
+200020ac:          \-> 8532                     mv      a0,a2
+200020ae:              8082                     ret
+
+200020b0 <dif_pinmux_output_select>:
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:175
+}
+
+dif_result_t dif_pinmux_output_select(const dif_pinmux_t *pinmux,
+                                      dif_pinmux_index_t mio_pad_output,
+                                      dif_pinmux_index_t outsel) {
+  if (pinmux == NULL || mio_pad_output >= PINMUX_PARAM_N_MIO_PADS ||
+200020b0:           00153693            seqz    a3,a0
+200020b4:           02f5b713            sltiu   a4,a1,47
+200020b8:           00174713            xori    a4,a4,1
+200020bc:           8ed9                        or      a3,a3,a4
+200020be:           04e63713            sltiu   a4,a2,78
+200020c2:           00174713            xori    a4,a4,1
+200020c6:           8f55                        or      a4,a4,a3
+200020c8:           468d                        li      a3,3
+200020ca:       /-- ef01                        bnez    a4,200020e2 <dif_pinmux_output_select+0x32>
+dif_pinmux_is_locked():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:142
+  uint32_t reg_value = mmio_region_read32(pinmux->base_addr, reg_offset);
+200020cc:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200020ce:       |   20a5c533            sh2add  a0,a1,a0
+200020d2:       |   1cc52583            lw      a1,460(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+ */
+OT_WARN_UNUSED_RESULT
+inline bool bitfield_bit32_read(uint32_t bitfield,
+                                bitfield_bit32_index_t bit_index) {
+  return bitfield_field32_read(bitfield,
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200020d6:       |   8985                        andi    a1,a1,1
+200020d8:       |   46a5                        li      a3,9
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:185
+  dif_result_t result = dif_pinmux_is_locked(
+      pinmux, mio_pad_output, kDifPinmuxLockTargetOutsel, &is_locked);
+  if (result != kDifOk) {
+    return result;
+  }
+  if (is_locked) {
+200020da:       +-- c581                        beqz    a1,200020e2 <dif_pinmux_output_select+0x32>
+200020dc:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200020de:       |   28c52423            sw      a2,648(a0)
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:194
+      PINMUX_MIO_OUTSEL_0_REG_OFFSET + (ptrdiff_t)(mio_pad_output << 2);
+  uint32_t reg_value =
+      bitfield_field32_write(0, PINMUX_MIO_OUTSEL_0_OUT_0_FIELD, outsel);
+  mmio_region_write32(pinmux->base_addr, reg_offset, reg_value);
+  return kDifOk;
+}
+200020e2:       \-> 8536                        mv      a0,a3
+200020e4:           8082                        ret
+
+200020e6 <ottf_generic_fault_print>:
+ottf_generic_fault_print():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:65
+    "  s3", "  s4", "  s5", "  s6", "  s7", "  s8", "  s9", " s10",
+    " s11", "  t3", "  t4", "  t5", "  t6", "msts",
+};
+
+void ottf_generic_fault_print(uint32_t *exc_info, const char *reason,
+                              uint32_t mcause) {
+200020e6:                 7179                  addi    sp,sp,-48
+200020e8:                 d606                  sw      ra,44(sp)
+200020ea:                 d422                  sw      s0,40(sp)
+200020ec:                 d226                  sw      s1,36(sp)
+200020ee:                 d04a                  sw      s2,32(sp)
+200020f0:                 ce4e                  sw      s3,28(sp)
+200020f2:                 cc52                  sw      s4,24(sp)
+200020f4:                 ca56                  sw      s5,20(sp)
+200020f6:                 c85a                  sw      s6,16(sp)
+200020f8:                 c65e                  sw      s7,12(sp)
+200020fa:                 c462                  sw      s8,8(sp)
+200020fc:                 c266                  sw      s9,4(sp)
+200020fe:                 c06a                  sw      s10,0(sp)
+20002100:                 8932                  mv      s2,a2
+20002102:                 89ae                  mv      s3,a1
+20002104:                 8b2a                  mv      s6,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:67
+  enum { kExcWords = 30 };
+  uint32_t mepc = ibex_mepc_read();
+20002106:                 6ff010ef              jal     ra,20004004 <ibex_mepc_read>
+2000210a:                 8a2a                  mv      s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:68
+  uint32_t mtval = ibex_mtval_read();
+2000210c:                 6f3010ef              jal     ra,20003ffe <ibex_mtval_read>
+20002110:                 8aaa                  mv      s5,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:69
+  if (exc_info) {
+20002112:       /-------- 0c0b0763              beqz    s6,200021e0 <ottf_generic_fault_print+0xfa>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:70
+    base_printf("===== Exception Frame @ %08x =====", exc_info);
+20002116:       |         00004517              auipc   a0,0x4
+2000211a:       |         91e50513              addi    a0,a0,-1762 # 20005a34 <manage_flow_control.log_fields.85+0xf8>
+2000211e:       |         85da                  mv      a1,s6
+20002120:       |         0db000ef              jal     ra,200029fa <base_printf>
+20002124:       |         4481                  li      s1,0
+20002126:       |         00004517              auipc   a0,0x4
+2000212a:       |         c2e50d13              addi    s10,a0,-978 # 20005d54 <exc_frame>
+2000212e:       |         00004517              auipc   a0,0x4
+20002132:       |         ea650b93              addi    s7,a0,-346 # 20005fd4 <test_status_set.log_fields.7+0x24>
+20002136:       |         00004517              auipc   a0,0x4
+2000213a:       |         92150c13              addi    s8,a0,-1759 # 20005a57 <manage_flow_control.log_fields.85+0x11b>
+2000213e:       |         4cf9                  li      s9,30
+20002140:       |         845a                  mv      s0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:72
+    for (size_t i = 0; i < kExcWords; ++i) {
+      if (i % 4 == 0) {
+20002142:       |  /----> 0034f513              andi    a0,s1,3
+20002146:       |  |  /-- e501                  bnez    a0,2000214e <ottf_generic_fault_print+0x68>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:73
+        base_printf("\n");
+20002148:       |  |  |   855e                  mv      a0,s7
+2000214a:       |  |  |   0b1000ef              jal     ra,200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:75
+      }
+      const char *name = exc_frame[i];
+2000214e:       |  |  \-> 000d2583              lw      a1,0(s10)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:78
+      if (name == NULL)
+        continue;
+      base_printf(" %4s=%08x", name, exc_info[i]);
+20002152:       |  |      4010                  lw      a2,0(s0)
+20002154:       |  |      8562                  mv      a0,s8
+20002156:       |  |      0a5000ef              jal     ra,200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:71
+    for (size_t i = 0; i < kExcWords; ++i) {
+2000215a:       |  |      0485                  addi    s1,s1,1
+2000215c:       |  |      0411                  addi    s0,s0,4
+2000215e:       |  |      0d11                  addi    s10,s10,4
+20002160:       |  \----- ff9491e3              bne     s1,s9,20002142 <ottf_generic_fault_print+0x5c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:80
+    }
+    uint32_t *sp = exc_info + kExcWords;
+20002164:       |         078b0413              addi    s0,s6,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:81
+    base_printf("\n");
+20002168:       |         00004517              auipc   a0,0x4
+2000216c:       |         e6c50513              addi    a0,a0,-404 # 20005fd4 <test_status_set.log_fields.7+0x24>
+20002170:       |         08b000ef              jal     ra,200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:90
+                     TOP_EARLGREY_SRAM_CTRL_MAIN_RAM_SIZE_BYTES);
+
+    extern const char _text_start[], _text_end[];
+    const uint32_t text_start = (uint32_t)_text_start;
+    const uint32_t text_end = (uint32_t)_text_end;
+    base_printf("===== Call Stack =====\n");
+20002174:       |         00004517              auipc   a0,0x4
+20002178:       |         8ed50513              addi    a0,a0,-1811 # 20005a61 <manage_flow_control.log_fields.85+0x125>
+2000217c:       |         07f000ef              jal     ra,200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+20002180:       |         01c45513              srli    a0,s0,0x1c
+20002184:       |         00153513              seqz    a0,a0
+20002188:       |         10020bb7              lui     s7,0x10020
+2000218c:       |         fffb8593              addi    a1,s7,-1 # 1001ffff <_exception_frame_start+0x7f>
+20002190:       |         0085b5b3              sltu    a1,a1,s0
+20002194:       |         8d4d                  or      a0,a0,a1
+20002196:       +-------- e529                  bnez    a0,200021e0 <ottf_generic_fault_print+0xfa>
+20002198:       |         07cb0493              addi    s1,s6,124
+2000219c:       |         ffffe517              auipc   a0,0xffffe
+200021a0:       |         26450c13              addi    s8,a0,612 # 20000400 <_ottf_interrupt_vector>
+200021a4:       |         00002517              auipc   a0,0x2
+200021a8:       |         20c50413              addi    s0,a0,524 # 200043b0 <_text_end>
+200021ac:       |         00004517              auipc   a0,0x4
+200021b0:       |         8cd50b13              addi    s6,a0,-1843 # 20005a79 <manage_flow_control.log_fields.85+0x13d>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:92
+      uint32_t val = *sp;
+200021b4:       |  /----> ffc4a583              lw      a1,-4(s1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:93
+      if (val >= text_start && val < text_end) {
+200021b8:       |  |      0185b533              sltu    a0,a1,s8
+200021bc:       |  |      0085b633              sltu    a2,a1,s0
+200021c0:       |  |      00164613              xori    a2,a2,1
+200021c4:       |  |      8d51                  or      a0,a0,a2
+200021c6:       |  |  /-- e501                  bnez    a0,200021ce <ottf_generic_fault_print+0xe8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:94
+        base_printf("    %08x\n", val);
+200021c8:       |  |  |   855a                  mv      a0,s6
+200021ca:       |  |  |   031000ef              jal     ra,200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+200021ce:       |  |  \-> 01c4d513              srli    a0,s1,0x1c
+200021d2:       |  |      00a03533              snez    a0,a0
+200021d6:       |  |      0174b5b3              sltu    a1,s1,s7
+200021da:       |  |      8d6d                  and     a0,a0,a1
+200021dc:       |  |      0491                  addi    s1,s1,4
+200021de:       |  \----- f979                  bnez    a0,200021b4 <ottf_generic_fault_print+0xce>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:98
+      }
+    }
+  }
+  LOG_ERROR("FAULT: %s. MCAUSE=%08x MEPC=%08x MTVAL=%08x", reason, mcause, mepc,
+200021e0:       \-------> 00004517              auipc   a0,0x4
+200021e4:                 10452503              lw      a0,260(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+200021e8:             /-- c91d                  beqz    a0,2000221e <ottf_generic_fault_print+0x138>
+200021ea:             |   e000e517              auipc   a0,0xe000e
+200021ee:             |   e1650513              addi    a0,a0,-490 # 10000 <_chip_info_end>
+200021f2:             |   43c00593              li      a1,1084
+200021f6:             |   952e                  add     a0,a0,a1
+200021f8:             |   4591                  li      a1,4
+200021fa:             |   864e                  mv      a2,s3
+200021fc:             |   86ca                  mv      a3,s2
+200021fe:             |   8752                  mv      a4,s4
+20002200:             |   87d6                  mv      a5,s5
+20002202:             |   50b2                  lw      ra,44(sp)
+20002204:             |   5422                  lw      s0,40(sp)
+20002206:             |   5492                  lw      s1,36(sp)
+20002208:             |   5902                  lw      s2,32(sp)
+2000220a:             |   49f2                  lw      s3,28(sp)
+2000220c:             |   4a62                  lw      s4,24(sp)
+2000220e:             |   4ad2                  lw      s5,20(sp)
+20002210:             |   4b42                  lw      s6,16(sp)
+20002212:             |   4bb2                  lw      s7,12(sp)
+20002214:             |   4c22                  lw      s8,8(sp)
+20002216:             |   4c92                  lw      s9,4(sp)
+20002218:             |   4d02                  lw      s10,0(sp)
+2000221a:             |   6145                  addi    sp,sp,48
+2000221c:             |   a369                  j       200027a6 <base_log_internal_dv>
+2000221e:             \-> 00004517              auipc   a0,0x4
+20002222:                 bae50513              addi    a0,a0,-1106 # 20005dcc <ottf_generic_fault_print.log_fields>
+20002226:                 85ce                  mv      a1,s3
+20002228:                 864a                  mv      a2,s2
+2000222a:                 86d2                  mv      a3,s4
+2000222c:                 8756                  mv      a4,s5
+2000222e:                 50b2                  lw      ra,44(sp)
+20002230:                 5422                  lw      s0,40(sp)
+20002232:                 5492                  lw      s1,36(sp)
+20002234:                 5902                  lw      s2,32(sp)
+20002236:                 49f2                  lw      s3,28(sp)
+20002238:                 4a62                  lw      s4,24(sp)
+2000223a:                 4ad2                  lw      s5,20(sp)
+2000223c:                 4b42                  lw      s6,16(sp)
+2000223e:                 4bb2                  lw      s7,12(sp)
+20002240:                 4c22                  lw      s8,8(sp)
+20002242:                 4c92                  lw      s9,4(sp)
+20002244:                 4d02                  lw      s10,0(sp)
+20002246:                 6145                  addi    sp,sp,48
+20002248:                 a1c9                  j       2000270a <base_log_internal_core>
+
+2000224a <ottf_exception_handler>:
+ottf_exception_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:119
+ */
+OT_WEAK
+void *pxCurrentTCB = NULL;
+
+OT_WEAK
+void ottf_exception_handler(uint32_t *exc_info) {
+2000224a:           1141                        addi    sp,sp,-16
+2000224c:           c606                        sw      ra,12(sp)
+2000224e:           c422                        sw      s0,8(sp)
+20002250:           842a                        mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:120
+  uint32_t mcause = ibex_mcause_read();
+20002252:           5a7010ef            jal     ra,20003ff8 <ibex_mcause_read>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:122
+
+  switch ((ibex_exc_t)(mcause & kIbexExcMax)) {
+20002256:           897d                        andi    a0,a0,31
+20002258:           45ad                        li      a1,11
+2000225a:       /-- 04a5ee63            bltu    a1,a0,200022b6 <ottf_exception_handler+0x6c>
+2000225e:       |   00003597            auipc   a1,0x3
+20002262:       |   7a658593            addi    a1,a1,1958 # 20005a04 <manage_flow_control.log_fields.85+0xc8>
+20002266:       |   20b54533            sh2add  a0,a0,a1
+2000226a:       |   4108                        lw      a0,0(a0)
+2000226c:       |   8502                        jr      a0
+2000226e:       |   8522                        mv      a0,s0
+20002270:       |   40b2                        lw      ra,12(sp)
+20002272:       |   4422                        lw      s0,8(sp)
+20002274:       |   0141                        addi    sp,sp,16
+20002276:       |   a091                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:124
+    case kIbexExcInstrMisaligned:
+      ottf_instr_misaligned_fault_handler(exc_info);
+20002278:       |   8522                        mv      a0,s0
+2000227a:       |   40b2                        lw      ra,12(sp)
+2000227c:       |   4422                        lw      s0,8(sp)
+2000227e:       |   0141                        addi    sp,sp,16
+20002280:       |   a82d                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:127
+      break;
+    case kIbexExcInstrAccessFault:
+      ottf_instr_access_fault_handler(exc_info);
+20002282:       |   8522                        mv      a0,s0
+20002284:       |   40b2                        lw      ra,12(sp)
+20002286:       |   4422                        lw      s0,8(sp)
+20002288:       |   0141                        addi    sp,sp,16
+2000228a:       |   a805                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:130
+      break;
+    case kIbexExcIllegalInstrFault:
+      ottf_illegal_instr_fault_handler(exc_info);
+2000228c:       |   8522                        mv      a0,s0
+2000228e:       |   40b2                        lw      ra,12(sp)
+20002290:       |   4422                        lw      s0,8(sp)
+20002292:       |   0141                        addi    sp,sp,16
+20002294:       |   a01d                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:133
+      break;
+    case kIbexExcBreakpoint:
+      ottf_breakpoint_handler(exc_info);
+20002296:       |   8522                        mv      a0,s0
+20002298:       |   40b2                        lw      ra,12(sp)
+2000229a:       |   4422                        lw      s0,8(sp)
+2000229c:       |   0141                        addi    sp,sp,16
+2000229e:       |   a831                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:145
+      break;
+    case kIbexExcMachineECall:
+      ottf_machine_ecall_handler(exc_info);
+      break;
+    case kIbexExcUserECall:
+      ottf_user_ecall_handler(exc_info);
+200022a0:       |   8522                        mv      a0,s0
+200022a2:       |   40b2                        lw      ra,12(sp)
+200022a4:       |   4422                        lw      s0,8(sp)
+200022a6:       |   0141                        addi    sp,sp,16
+200022a8:       |   a809                        j       200022ba <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:142
+      ottf_machine_ecall_handler(exc_info);
+200022aa:       |   8522                        mv      a0,s0
+200022ac:       |   40b2                        lw      ra,12(sp)
+200022ae:       |   4422                        lw      s0,8(sp)
+200022b0:       |   0141                        addi    sp,sp,16
+200022b2:       |   819fe06f            j       20000aca <ottf_machine_ecall_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:148
+      break;
+    default:
+      generic_fault_handler(exc_info);
+200022b6:       \-> 8522                        mv      a0,s0
+200022b8:           2009                        jal     200022ba <ottf_breakpoint_handler>
+
+200022ba <ottf_breakpoint_handler>:
+generic_fault_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:102
+static void generic_fault_handler(uint32_t *exc_info) {
+200022ba:       1141                    addi    sp,sp,-16
+200022bc:       c606                    sw      ra,12(sp)
+200022be:       c422                    sw      s0,8(sp)
+200022c0:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:103
+  uint32_t mcause = ibex_mcause_read();
+200022c2:       537010ef                jal     ra,20003ff8 <ibex_mcause_read>
+200022c6:       862a                    mv      a2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:104
+  ottf_generic_fault_print(exc_info, exception_reason[mcause & kIbexExcMax],
+200022c8:       897d                    andi    a0,a0,31
+200022ca:       00004597                auipc   a1,0x4
+200022ce:       b3e58593                addi    a1,a1,-1218 # 20005e08 <exception_reason>
+200022d2:       20b54533                sh2add  a0,a0,a1
+200022d6:       410c                    lw      a1,0(a0)
+200022d8:       8522                    mv      a0,s0
+200022da:       3531                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:106
+  abort();
+200022dc:       517010ef                jal     ra,20003ff2 <abort>
+
+200022e0 <ottf_software_isr>:
+ottf_software_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:181
+OT_WEAK
+OT_ALIAS("generic_fault_handler")
+void ottf_user_ecall_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_software_isr(uint32_t *exc_info) {
+200022e0:       1141                    addi    sp,sp,-16
+200022e2:       c606                    sw      ra,12(sp)
+200022e4:       c422                    sw      s0,8(sp)
+200022e6:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:182
+  ottf_generic_fault_print(exc_info, "Software IRQ", ibex_mcause_read());
+200022e8:       511010ef                jal     ra,20003ff8 <ibex_mcause_read>
+200022ec:       862a                    mv      a2,a0
+200022ee:       00003517                auipc   a0,0x3
+200022f2:       7f250593                addi    a1,a0,2034 # 20005ae0 <manage_flow_control.log_fields.85+0x1a4>
+200022f6:       8522                    mv      a0,s0
+200022f8:       33fd                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:183
+  abort();
+200022fa:       4f9010ef                jal     ra,20003ff2 <abort>
+
+200022fe <ottf_timer_isr>:
+ottf_timer_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:187
+}
+
+OT_WEAK
+void ottf_timer_isr(uint32_t *exc_info) {
+200022fe:       1141                    addi    sp,sp,-16
+20002300:       c606                    sw      ra,12(sp)
+20002302:       c422                    sw      s0,8(sp)
+20002304:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:188
+  ottf_generic_fault_print(exc_info, "Timer IRQ", ibex_mcause_read());
+20002306:       4f3010ef                jal     ra,20003ff8 <ibex_mcause_read>
+2000230a:       862a                    mv      a2,a0
+2000230c:       00003517                auipc   a0,0x3
+20002310:       7e150593                addi    a1,a0,2017 # 20005aed <manage_flow_control.log_fields.85+0x1b1>
+20002314:       8522                    mv      a0,s0
+20002316:       3bc1                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:189
+  abort();
+20002318:       4db010ef                jal     ra,20003ff2 <abort>
+
+2000231c <ottf_external_isr>:
+ottf_external_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:196
+
+OT_WEAK
+bool ottf_console_flow_control_isr(uint32_t *exc_info) { return false; }
+
+OT_WEAK
+void ottf_external_isr(uint32_t *exc_info) {
+2000231c:                    1141                       addi    sp,sp,-16
+2000231e:                    c606                       sw      ra,12(sp)
+20002320:                    c422                       sw      s0,8(sp)
+20002322:                    c226                       sw      s1,4(sp)
+20002324:                    842a                       mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:199
+  const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+  dif_rv_plic_irq_id_t plic_irq_id;
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&ottf_plic, kPlicTarget, &plic_irq_id));
+20002326:                    f0000517           auipc   a0,0xf0000
+2000232a:                    d6e50513           addi    a0,a0,-658 # 10002094 <ottf_plic>
+2000232e:                    860a                       mv      a2,sp
+20002330:                    4581                       li      a1,0
+20002332:                    22dd                       jal     20002518 <dif_rv_plic_irq_claim>
+20002334:                    00004497           auipc   s1,0x4
+20002338:          /-------- c90d                       beqz    a0,2000236a <ottf_external_isr+0x4e>
+2000233a:          |         862a                       mv      a2,a0
+2000233c:          |         fb04a503           lw      a0,-80(s1) # 200062e4 <kDeviceLogBypassUartAddress>
+20002340:          |  /----- c919                       beqz    a0,20002356 <ottf_external_isr+0x3a>
+20002342:          |  |      e000e517           auipc   a0,0xe000e
+20002346:          |  |      cbe50513           addi    a0,a0,-834 # 10000 <_chip_info_end>
+2000234a:          |  |      45000593           li      a1,1104
+2000234e:          |  |      952e                       add     a0,a0,a1
+20002350:          |  |      4585                       li      a1,1
+20002352:          |  |      2991                       jal     200027a6 <base_log_internal_dv>
+20002354:          |  |  /-- a039                       j       20002362 <ottf_external_isr+0x46>
+20002356:          |  \--|-> 00004517           auipc   a0,0x4
+2000235a:          |     |   a8a50513           addi    a0,a0,-1398 # 20005de0 <ottf_external_isr.log_fields>
+2000235e:          |     |   85b2                       mv      a1,a2
+20002360:          |     |   266d                       jal     2000270a <base_log_internal_core>
+20002362:          |     \-> 6531                       lui     a0,0xc
+20002364:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20002368:          |         2cc9                       jal     2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:202
+
+  top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
+      top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id];
+2000236a:          \-------> 4502                       lw      a0,0(sp)
+2000236c:                    00004597           auipc   a1,0x4
+20002370:                    f7c58593           addi    a1,a1,-132 # 200062e8 <top_earlgrey_plic_interrupt_for_peripheral>
+20002374:                    20b54533           sh2add  a0,a0,a1
+20002378:                    4108                       lw      a0,0(a0)
+2000237a:                    4585                       li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+2000237c:       /----------- 04b51b63           bne     a0,a1,200023d2 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:205
+      ottf_console_flow_control_isr(exc_info)) {
+20002380:       |            8522                       mv      a0,s0
+20002382:       |            ea2ff0ef           jal     ra,20001a24 <ottf_console_flow_control_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+20002386:       +----------- c531                       beqz    a0,200023d2 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:207
+    // Complete the IRQ at PLIC.
+    CHECK_DIF_OK(
+20002388:       |            4602                       lw      a2,0(sp)
+2000238a:       |            f0000517           auipc   a0,0xf0000
+2000238e:       |            d0a50513           addi    a0,a0,-758 # 10002094 <ottf_plic>
+20002392:       |            4581                       li      a1,0
+20002394:       |            226d                       jal     2000253e <dif_rv_plic_irq_complete>
+20002396:       |  /-------- c90d                       beqz    a0,200023c8 <ottf_external_isr+0xac>
+20002398:       |  |         862a                       mv      a2,a0
+2000239a:       |  |         fb04a503           lw      a0,-80(s1)
+2000239e:       |  |  /----- c919                       beqz    a0,200023b4 <ottf_external_isr+0x98>
+200023a0:       |  |  |      e000e517           auipc   a0,0xe000e
+200023a4:       |  |  |      c6050513           addi    a0,a0,-928 # 10000 <_chip_info_end>
+200023a8:       |  |  |      46400593           li      a1,1124
+200023ac:       |  |  |      952e                       add     a0,a0,a1
+200023ae:       |  |  |      4585                       li      a1,1
+200023b0:       |  |  |      2edd                       jal     200027a6 <base_log_internal_dv>
+200023b2:       |  |  |  /-- a039                       j       200023c0 <ottf_external_isr+0xa4>
+200023b4:       |  |  \--|-> 00004517           auipc   a0,0x4
+200023b8:       |  |     |   a4050513           addi    a0,a0,-1472 # 20005df4 <ottf_external_isr.log_fields.12>
+200023bc:       |  |     |   85b2                       mv      a1,a2
+200023be:       |  |     |   26b1                       jal     2000270a <base_log_internal_core>
+200023c0:       |  |     \-> 6531                       lui     a0,0xc
+200023c2:       |  |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200023c6:       |  |         2c95                       jal     2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:214
+    return;
+  }
+
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+  abort();
+}
+200023c8:       |  \-------> 40b2                       lw      ra,12(sp)
+200023ca:       |            4422                       lw      s0,8(sp)
+200023cc:       |            4492                       lw      s1,4(sp)
+200023ce:       |            0141                       addi    sp,sp,16
+200023d0:       |            8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:212
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+200023d2:       \----------> 427010ef           jal     ra,20003ff8 <ibex_mcause_read>
+200023d6:                    862a                       mv      a2,a0
+200023d8:                    00003517           auipc   a0,0x3
+200023dc:                    7c550593           addi    a1,a0,1989 # 20005b9d <manage_flow_control.log_fields.85+0x261>
+200023e0:                    8522                       mv      a0,s0
+200023e2:                    d05ff0ef           jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:213
+  abort();
+200023e6:                    40d010ef           jal     ra,20003ff2 <abort>
+
+200023ea <ottf_external_nmi_handler>:
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:216
+
+static void generic_internal_irq_handler(uint32_t *exc_info) {
+200023ea:       1141                    addi    sp,sp,-16
+200023ec:       c606                    sw      ra,12(sp)
+200023ee:       c422                    sw      s0,8(sp)
+200023f0:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+200023f2:       407010ef                jal     ra,20003ff8 <ibex_mcause_read>
+200023f6:       862a                    mv      a2,a0
+200023f8:       00004517                auipc   a0,0x4
+200023fc:       94f50593                addi    a1,a0,-1713 # 20005d47 <manage_flow_control.log_fields.85+0x40b>
+20002400:       8522                    mv      a0,s0
+20002402:       ce5ff0ef                jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+20002406:       3ed010ef                jal     ra,20003ff2 <abort>
+
+2000240a <ottf_internal_isr>:
+ottf_internal_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:230
+OT_WEAK
+OT_ALIAS("generic_internal_irq_handler")
+void ottf_load_integrity_error_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_internal_isr(uint32_t *exc_info) {
+2000240a:              1141                     addi    sp,sp,-16
+2000240c:              c606                     sw      ra,12(sp)
+2000240e:              c422                     sw      s0,8(sp)
+20002410:              842a                     mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:231
+  uint32_t mcause = ibex_mcause_read();
+20002412:              3e7010ef                 jal     ra,20003ff8 <ibex_mcause_read>
+20002416:              800005b7                 lui     a1,0x80000
+2000241a:              05fd                     addi    a1,a1,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:232
+  switch ((ibex_internal_irq_t)(mcause)) {
+2000241c:          /-- 00b50a63                 beq     a0,a1,20002430 <ottf_internal_isr+0x26>
+20002420:          |   5581                     li      a1,-32
+20002422:       /--|-- 00b51c63                 bne     a0,a1,2000243a <ottf_internal_isr+0x30>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:234
+    case kIbexInternalIrqLoadInteg:
+      ottf_load_integrity_error_handler(exc_info);
+20002426:       |  |   8522                     mv      a0,s0
+20002428:       |  |   40b2                     lw      ra,12(sp)
+2000242a:       |  |   4422                     lw      s0,8(sp)
+2000242c:       |  |   0141                     addi    sp,sp,16
+2000242e:       |  |   bf75                     j       200023ea <ottf_external_nmi_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:237
+      break;
+    case kIbexInternalIrqNmi:
+      ottf_external_nmi_handler(exc_info);
+20002430:       |  \-> 8522                     mv      a0,s0
+20002432:       |      40b2                     lw      ra,12(sp)
+20002434:       |      4422                     lw      s0,8(sp)
+20002436:       |      0141                     addi    sp,sp,16
+20002438:       |      bf4d                     j       200023ea <ottf_external_nmi_handler>
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+2000243a:       \----> 3bf010ef                 jal     ra,20003ff8 <ibex_mcause_read>
+2000243e:              862a                     mv      a2,a0
+20002440:              00004517                 auipc   a0,0x4
+20002444:              90750593                 addi    a1,a0,-1785 # 20005d47 <manage_flow_control.log_fields.85+0x40b>
+20002448:              8522                     mv      a0,s0
+2000244a:              c9dff0ef                 jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+2000244e:              3a5010ef                 jal     ra,20003ff2 <abort>
+
+20002452 <dif_rstmgr_init>:
+dif_rstmgr_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:18
+
+#include "rstmgr_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rstmgr_init(mmio_region_t base_addr, dif_rstmgr_t *rstmgr) {
+  if (rstmgr == NULL) {
+20002452:       /----- c581                     beqz    a1,2000245a <dif_rstmgr_init+0x8>
+20002454:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rstmgr->base_addr = base_addr;
+20002456:       |      c188                     sw      a0,0(a1)
+20002458:       |  /-- a011                     j       2000245c <dif_rstmgr_init+0xa>
+2000245a:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:25
+
+  return kDifOk;
+}
+2000245c:          \-> 8532                     mv      a0,a2
+2000245e:              8082                     ret
+
+20002460 <dif_rstmgr_reset_info_clear>:
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:171
+
+  return kDifOk;
+}
+
+dif_result_t dif_rstmgr_reset_info_clear(const dif_rstmgr_t *handle) {
+  if (handle == NULL) {
+20002460:       /-- c511                        beqz    a0,2000246c <dif_rstmgr_reset_info_clear+0xc>
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:175
+    return kDifBadArg;
+  }
+
+  mmio_region_t base_addr = handle->base_addr;
+20002462:       |   410c                        lw      a1,0(a0)
+20002464:       |   4501                        li      a0,0
+20002466:       |   567d                        li      a2,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20002468:       |   c590                        sw      a2,8(a1)
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:180
+
+  rstmgr_reset_info_clear(base_addr);
+
+  return kDifOk;
+}
+2000246a:       |   8082                        ret
+2000246c:       \-> 450d                        li      a0,3
+2000246e:           8082                        ret
+
+20002470 <dif_rv_plic_init>:
+dif_rv_plic_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:18
+
+#include "rv_plic_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_plic_init(mmio_region_t base_addr, dif_rv_plic_t *rv_plic) {
+  if (rv_plic == NULL) {
+20002470:       /----- c581                     beqz    a1,20002478 <dif_rv_plic_init+0x8>
+20002472:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rv_plic->base_addr = base_addr;
+20002474:       |      c188                     sw      a0,0(a1)
+20002476:       |  /-- a011                     j       2000247a <dif_rv_plic_init+0xa>
+20002478:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:25
+
+  return kDifOk;
+}
+2000247a:          \-> 8532                     mv      a0,a2
+2000247c:              8082                     ret
+
+2000247e <dif_rv_plic_irq_set_enabled>:
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:174
+
+dif_result_t dif_rv_plic_irq_set_enabled(const dif_rv_plic_t *plic,
+                                         dif_rv_plic_irq_id_t irq,
+                                         dif_rv_plic_target_t target,
+                                         dif_toggle_t state) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+2000247e:           00153713            seqz    a4,a0
+20002482:           0ba5b793            sltiu   a5,a1,186
+20002486:           0017c793            xori    a5,a5,1
+2000248a:           00c03633            snez    a2,a2
+2000248e:           8e59                        or      a2,a2,a4
+20002490:           8e5d                        or      a2,a2,a5
+20002492:           0026b713            sltiu   a4,a3,2
+20002496:           00174713            xori    a4,a4,1
+2000249a:           8f51                        or      a4,a4,a2
+2000249c:           460d                        li      a2,3
+2000249e:       /-- e315                        bnez    a4,200024c2 <dif_rv_plic_irq_set_enabled+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:193
+      return kDifBadArg;
+  }
+
+  plic_reg_info_t reg_info = plic_irq_enable_reg_info(irq, target);
+
+  uint32_t reg = mmio_region_read32(plic->base_addr, reg_info.offset);
+200024a0:       |   4108                        lw      a0,0(a0)
+plic_irq_enable_reg_info():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:92
+      .offset = plic_irq_enable_base_for_target(target) + offset,
+200024a2:       |   0035d613            srli    a2,a1,0x3
+200024a6:       |   28d61613            bseti   a2,a2,0xd
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200024aa:       |   9a71                        andi    a2,a2,-4
+200024ac:       |   9532                        add     a0,a0,a2
+200024ae:       |   4118                        lw      a4,0(a0)
+200024b0:       |   4601                        li      a2,0
+plic_irq_bit_index():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:51
+  return irq % RV_PLIC_PARAM_REG_WIDTH;
+200024b2:       |   01f5f793            andi    a5,a1,31
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200024b6:       |   48f71733            bclr    a4,a4,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200024ba:       |   00b695b3            sll     a1,a3,a1
+200024be:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200024c0:       |   c10c                        sw      a1,0(a0)
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:198
+  reg = bitfield_bit32_write(reg, reg_info.bit_index, flag);
+  mmio_region_write32(plic->base_addr, reg_info.offset, reg);
+
+  return kDifOk;
+}
+200024c2:       \-> 8532                        mv      a0,a2
+200024c4:           8082                        ret
+
+200024c6 <dif_rv_plic_irq_set_priority>:
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:203
+
+dif_result_t dif_rv_plic_irq_set_priority(const dif_rv_plic_t *plic,
+                                          dif_rv_plic_irq_id_t irq,
+                                          uint32_t priority) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+200024c6:           00153693            seqz    a3,a0
+200024ca:           0ba5b713            sltiu   a4,a1,186
+200024ce:           00174713            xori    a4,a4,1
+200024d2:           8ed9                        or      a3,a3,a4
+200024d4:           00463713            sltiu   a4,a2,4
+200024d8:           00174713            xori    a4,a4,1
+200024dc:           8f55                        or      a4,a4,a3
+200024de:           468d                        li      a3,3
+200024e0:       /-- e711                        bnez    a4,200024ec <dif_rv_plic_irq_set_priority+0x26>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:209
+      priority > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t offset = plic_priority_reg_offset(irq);
+  mmio_region_write32(plic->base_addr, offset, priority);
+200024e2:       |   4108                        lw      a0,0(a0)
+200024e4:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200024e6:       |   20a5c533            sh2add  a0,a1,a0
+200024ea:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:212
+
+  return kDifOk;
+}
+200024ec:       \-> 8536                        mv      a0,a3
+200024ee:           8082                        ret
+
+200024f0 <dif_rv_plic_target_set_threshold>:
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:217
+
+dif_result_t dif_rv_plic_target_set_threshold(const dif_rv_plic_t *plic,
+                                              dif_rv_plic_target_t target,
+                                              uint32_t threshold) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+200024f0:           00153693            seqz    a3,a0
+200024f4:           00b035b3            snez    a1,a1
+200024f8:           8dd5                        or      a1,a1,a3
+200024fa:           00463693            sltiu   a3,a2,4
+200024fe:           0016c693            xori    a3,a3,1
+20002502:           8ecd                        or      a3,a3,a1
+20002504:           458d                        li      a1,3
+20002506:       /-- e699                        bnez    a3,20002514 <dif_rv_plic_target_set_threshold+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:223
+      threshold > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t threshold_offset = plic_threshold_base_for_target(target);
+  mmio_region_write32(plic->base_addr, threshold_offset, threshold);
+20002508:       |   4108                        lw      a0,0(a0)
+2000250a:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000250c:       |   002006b7            lui     a3,0x200
+20002510:       |   9536                        add     a0,a0,a3
+20002512:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:226
+
+  return kDifOk;
+}
+20002514:       \-> 852e                        mv      a0,a1
+20002516:           8082                        ret
+
+20002518 <dif_rv_plic_irq_claim>:
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:245
+}
+
+dif_result_t dif_rv_plic_irq_claim(const dif_rv_plic_t *plic,
+                                   dif_rv_plic_target_t target,
+                                   dif_rv_plic_irq_id_t *claim_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+20002518:           00153693            seqz    a3,a0
+2000251c:           00b035b3            snez    a1,a1
+20002520:           8dd5                        or      a1,a1,a3
+20002522:           00163693            seqz    a3,a2
+20002526:           8ecd                        or      a3,a3,a1
+20002528:           458d                        li      a1,3
+2000252a:       /-- ea81                        bnez    a3,2000253a <dif_rv_plic_irq_claim+0x22>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+      claim_data == NULL) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  *claim_data = mmio_region_read32(plic->base_addr, claim_complete_reg);
+2000252c:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000252e:       |   002005b7            lui     a1,0x200
+20002532:       |   952e                        add     a0,a0,a1
+20002534:       |   4148                        lw      a0,4(a0)
+20002536:       |   4581                        li      a1,0
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+20002538:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:254
+
+  return kDifOk;
+}
+2000253a:       \-> 852e                        mv      a0,a1
+2000253c:           8082                        ret
+
+2000253e <dif_rv_plic_irq_complete>:
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:259
+
+dif_result_t dif_rv_plic_irq_complete(const dif_rv_plic_t *plic,
+                                      dif_rv_plic_target_t target,
+                                      dif_rv_plic_irq_id_t complete_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
+2000253e:           00153693            seqz    a3,a0
+20002542:           00b035b3            snez    a1,a1
+20002546:           8ecd                        or      a3,a3,a1
+20002548:           458d                        li      a1,3
+2000254a:       /-- e699                        bnez    a3,20002558 <dif_rv_plic_irq_complete+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:266
+  }
+
+  // Write back the claimed IRQ ID to the target specific CC register,
+  // to notify the PLIC of the IRQ completion.
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  mmio_region_write32(plic->base_addr, claim_complete_reg, complete_data);
+2000254c:       |   4108                        lw      a0,0(a0)
+2000254e:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20002550:       |   002006b7            lui     a3,0x200
+20002554:       |   9536                        add     a0,a0,a3
+20002556:       |   c150                        sw      a2,4(a0)
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:269
+
+  return kDifOk;
+}
+20002558:       \-> 852e                        mv      a0,a1
+2000255a:           8082                        ret
+
+2000255c <rand_testutils_init>:
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:31
+/**
+ * The default timeout in usecs for fetching data from the entropy source.
+ */
+static const uint32_t kEntropyFetchTimeoutMicros = 100000;
+
+rand_testutils_rng_t rand_testutils_init(dif_rv_core_ibex_t *rv_core_ibex) {
+2000255c:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+  CHECK(rv_core_ibex != NULL);
+2000255e:                 ce06                  sw      ra,28(sp)
+20002560:                 cc22                  sw      s0,24(sp)
+20002562:                 ca26                  sw      s1,20(sp)
+20002564:                 c84a                  sw      s2,16(sp)
+20002566:                 00004617              auipc   a2,0x4
+2000256a:                 baa62483              lw      s1,-1110(a2) # 20006110 <MODULE_ID>
+2000256e:                 892e                  mv      s2,a1
+20002570:                 842a                  mv      s0,a0
+20002572:                 00004517              auipc   a0,0x4
+20002576:                 91e50613              addi    a2,a0,-1762 # 20005e90 <kDifRvPlicMaxPriority+0x4>
+2000257a:                 4501                  li      a0,0
+2000257c:                 85a6                  mv      a1,s1
+2000257e:                 4681                  li      a3,0
+20002580:                 443000ef              jal     ra,200031c2 <status_create>
+20002584:                 012035b3              snez    a1,s2
+20002588:                 00b107a3              sb      a1,15(sp)
+2000258c:                 00f14583              lbu     a1,15(sp)
+20002590:       /-------- ed9d                  bnez    a1,200025ce <rand_testutils_init+0x72>
+20002592:       |         00004517              auipc   a0,0x4
+20002596:       |         d5252503              lw      a0,-686(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+2000259a:       |  /----- c919                  beqz    a0,200025b0 <rand_testutils_init+0x54>
+2000259c:       |  |      e000e517              auipc   a0,0xe000e
+200025a0:       |  |      a6450513              addi    a0,a0,-1436 # 10000 <_chip_info_end>
+200025a4:       |  |      47800593              li      a1,1144
+200025a8:       |  |      952e                  add     a0,a0,a1
+200025aa:       |  |      4581                  li      a1,0
+200025ac:       |  |      2aed                  jal     200027a6 <base_log_internal_dv>
+200025ae:       |  |  /-- a031                  j       200025ba <rand_testutils_init+0x5e>
+200025b0:       |  \--|-> 00004517              auipc   a0,0x4
+200025b4:       |     |   97050513              addi    a0,a0,-1680 # 20005f20 <rand_testutils_init.log_fields>
+200025b8:       |     |   2a89                  jal     2000270a <base_log_internal_core>
+200025ba:       |     \-> 00004517              auipc   a0,0x4
+200025be:       |         8d650613              addi    a2,a0,-1834 # 20005e90 <kDifRvPlicMaxPriority+0x4>
+200025c2:       |         4535                  li      a0,13
+200025c4:       |         02000693              li      a3,32
+200025c8:       |         85a6                  mv      a1,s1
+200025ca:       |         3f9000ef              jal     ra,200031c2 <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200025ce:       \-------> 00052593              slti    a1,a0,0
+200025d2:                 897d                  andi    a0,a0,31
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+200025d4:                 00a03533              snez    a0,a0
+200025d8:                 8d6d                  and     a0,a0,a1
+200025da:             /-- c509                  beqz    a0,200025e4 <rand_testutils_init+0x88>
+200025dc:             |   6531                  lui     a0,0xc
+200025de:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200025e2:             |   28a1                  jal     2000263a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  // For the simulation platforms (DV and Verilator), the LFSR reseed frequency
+  // is arbitrarily set to 255. The test may choose to update this value if
+  // needed.
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+200025e4:             \-> 01242023              sw      s2,0(s0)
+200025e8:                 6561                  lui     a0,0x18
+200025ea:                 6a050513              addi    a0,a0,1696 # 186a0 <_chip_info_end+0x86a0>
+200025ee:                 c048                  sw      a0,4(s0)
+200025f0:                 deadc537              lui     a0,0xdeadc
+200025f4:                 eef50513              addi    a0,a0,-273 # deadbeef <_non_volatile_scratch_end+0xbea5beef>
+200025f8:                 c408                  sw      a0,8(s0)
+200025fa:                 80000537              lui     a0,0x80000
+200025fe:                 05750513              addi    a0,a0,87 # 80000057 <_non_volatile_scratch_end+0x5ff80057>
+20002602:                 c448                  sw      a0,12(s0)
+20002604:                 10000513              li      a0,256
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+      .polynomial_coefficients = kLfsrPolynomialCoefficients,
+      .reseed_frequency = 256,
+      .op_counter = UINT32_MAX};
+  // For non-runtime-sensitive simulations (for example, using FPGA or the
+  // debug board), always fetch random data from the hardware.
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+20002608:                 00004597              auipc   a1,0x4
+2000260c:                 cc45a583              lw      a1,-828(a1) # 200062cc <kDeviceType>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+20002610:                 c808                  sw      a0,16(s0)
+20002612:                 557d                  li      a0,-1
+20002614:                 4609                  li      a2,2
+20002616:                 c848                  sw      a0,20(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+20002618:             /-- 00c5e463              bltu    a1,a2,20002620 <rand_testutils_init+0xc4>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:46
+    ctx.reseed_frequency = 0;
+2000261c:             |   00042823              sw      zero,16(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:48
+  }
+  return ctx;
+20002620:             \-> 40f2                  lw      ra,28(sp)
+20002622:                 4462                  lw      s0,24(sp)
+20002624:                 44d2                  lw      s1,20(sp)
+20002626:                 4942                  lw      s2,16(sp)
+20002628:                 6105                  addi    sp,sp,32
+2000262a:                 8082                  ret
+
+2000262c <dif_rv_core_ibex_init>:
+dif_rv_core_ibex_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:19
+#include "rv_core_ibex_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_core_ibex_init(mmio_region_t base_addr,
+                                   dif_rv_core_ibex_t *rv_core_ibex) {
+  if (rv_core_ibex == NULL) {
+2000262c:       /----- c581                     beqz    a1,20002634 <dif_rv_core_ibex_init+0x8>
+2000262e:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:23
+    return kDifBadArg;
+  }
+
+  rv_core_ibex->base_addr = base_addr;
+20002630:       |      c188                     sw      a0,0(a1)
+20002632:       |  /-- a011                     j       20002636 <dif_rv_core_ibex_init+0xa>
+20002634:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:26
+
+  return kDifOk;
+}
+20002636:          \-> 8532                     mv      a0,a2
+20002638:              8082                     ret
+
+2000263a <test_status_set>:
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:25
+        mmio_region_from_addr(kDeviceTestStatusAddress);
+    mmio_region_write32(test_status_device_addr, 0x0, (uint32_t)test_status);
+  }
+}
+
+void test_status_set(test_status_t test_status) {
+2000263a:                    1141                       addi    sp,sp,-16
+2000263c:                    c606                       sw      ra,12(sp)
+2000263e:                    c422                       sw      s0,8(sp)
+20002640:                    65b1                       lui     a1,0xc
+20002642:                    aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:26
+  switch (test_status) {
+20002646:          /-------- 04b50763           beq     a0,a1,20002694 <test_status_set+0x5a>
+2000264a:          |         842a                       mv      s0,a0
+2000264c:          |         6525                       lui     a0,0x9
+2000264e:          |         0535                       addi    a0,a0,13
+20002650:       /--|-------- 04a40d63           beq     s0,a0,200026aa <test_status_set+0x70>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:40
+      test_status_device_write(test_status);
+      abort();
+      break;
+    }
+    default: {
+      LOG_INFO("test_status_set to 0x%x", test_status);
+20002654:       |  |         00004517           auipc   a0,0x4
+20002658:       |  |         c9052503           lw      a0,-880(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+2000265c:       |  |  /----- cd01                       beqz    a0,20002674 <test_status_set+0x3a>
+2000265e:       |  |  |      e000e517           auipc   a0,0xe000e
+20002662:       |  |  |      9a250513           addi    a0,a0,-1630 # 10000 <_chip_info_end>
+20002666:       |  |  |      50400593           li      a1,1284
+2000266a:       |  |  |      952e                       add     a0,a0,a1
+2000266c:       |  |  |      4585                       li      a1,1
+2000266e:       |  |  |      8622                       mv      a2,s0
+20002670:       |  |  |      2a1d                       jal     200027a6 <base_log_internal_dv>
+20002672:       |  |  |  /-- a039                       j       20002680 <test_status_set+0x46>
+20002674:       |  |  \--|-> 00004517           auipc   a0,0x4
+20002678:       |  |     |   93c50513           addi    a0,a0,-1732 # 20005fb0 <test_status_set.log_fields.7>
+2000267c:       |  |     |   85a2                       mv      a1,s0
+2000267e:       |  |     |   2071                       jal     2000270a <base_log_internal_core>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+20002680:       |  |     \-> 00004517           auipc   a0,0x4
+20002684:       |  |         c6052503           lw      a0,-928(a0) # 200062e0 <kDeviceTestStatusAddress>
+20002688:       |  |     /-- c111                       beqz    a0,2000268c <test_status_set+0x52>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000268a:       |  |     |   c100                       sw      s0,0(a0)
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:45
+      test_status_device_write(test_status);
+      break;
+    }
+  }
+}
+2000268c:       |  |     \-> 40b2                       lw      ra,12(sp)
+2000268e:       |  |         4422                       lw      s0,8(sp)
+20002690:       |  |         0141                       addi    sp,sp,16
+20002692:       |  |         8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+20002694:       |  \-------> 00004517           auipc   a0,0x4
+20002698:       |            c5052503           lw      a0,-944(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+2000269c:       |        /-- e115                       bnez    a0,200026c0 <test_status_set+0x86>
+2000269e:       |        |   00004517           auipc   a0,0x4
+200026a2:       |        |   8fe50513           addi    a0,a0,-1794 # 20005f9c <test_status_set.log_fields.4>
+200026a6:       |        |   2095                       jal     2000270a <base_log_internal_core>
+200026a8:       |     /--|-- a02d                       j       200026d2 <test_status_set+0x98>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+200026aa:       \-----|--|-> 00004517           auipc   a0,0x4
+200026ae:             |  |   c3a52503           lw      a0,-966(a0) # 200062e4 <kDeviceLogBypassUartAddress>
+200026b2:          /--|--|-- e90d                       bnez    a0,200026e4 <test_status_set+0xaa>
+200026b4:          |  |  |   00004517           auipc   a0,0x4
+200026b8:          |  |  |   8d450513           addi    a0,a0,-1836 # 20005f88 <test_status_set.log_fields>
+200026bc:          |  |  |   20b9                       jal     2000270a <base_log_internal_core>
+200026be:       /--|--|--|-- a825                       j       200026f6 <test_status_set+0xbc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+200026c0:       |  |  |  \-> e000e517           auipc   a0,0xe000e
+200026c4:       |  |  |      94050513           addi    a0,a0,-1728 # 10000 <_chip_info_end>
+200026c8:       |  |  |      4f000593           li      a1,1264
+200026cc:       |  |  |      952e                       add     a0,a0,a1
+200026ce:       |  |  |      4581                       li      a1,0
+200026d0:       |  |  |      28d9                       jal     200027a6 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026d2:       |  |  \----> 00004517           auipc   a0,0x4
+200026d6:       |  |         c0e52503           lw      a0,-1010(a0) # 200062e0 <kDeviceTestStatusAddress>
+200026da:       |  |  /----- c515                       beqz    a0,20002706 <test_status_set+0xcc>
+200026dc:       |  |  |      65b1                       lui     a1,0xc
+200026de:       |  |  |      aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200026e2:       |  |  |  /-- a00d                       j       20002704 <test_status_set+0xca>
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+200026e4:       |  \--|--|-> e000e517           auipc   a0,0xe000e
+200026e8:       |     |  |   91c50513           addi    a0,a0,-1764 # 10000 <_chip_info_end>
+200026ec:       |     |  |   4dc00593           li      a1,1244
+200026f0:       |     |  |   952e                       add     a0,a0,a1
+200026f2:       |     |  |   4581                       li      a1,0
+200026f4:       |     |  |   284d                       jal     200027a6 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026f6:       \-----|--|-> 00004517           auipc   a0,0x4
+200026fa:             |  |   bea52503           lw      a0,-1046(a0) # 200062e0 <kDeviceTestStatusAddress>
+200026fe:             +--|-- c501                       beqz    a0,20002706 <test_status_set+0xcc>
+20002700:             |  |   65a5                       lui     a1,0x9
+20002702:             |  |   05b5                       addi    a1,a1,13
+20002704:             |  \-> c10c                       sw      a1,0(a0)
+20002706:             \----> 0ed010ef           jal     ra,20003ff2 <abort>
+
+2000270a <base_log_internal_core>:
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:47
+ * Logs `log` and the values that follow to stdout.
+ *
+ * @param log the log data to log.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_core(const log_fields_t *log, ...) {
+2000270a:              7179                     addi    sp,sp,-48
+2000270c:              c606                     sw      ra,12(sp)
+2000270e:              c422                     sw      s0,8(sp)
+20002710:              c226                     sw      s1,4(sp)
+20002712:              842a                     mv      s0,a0
+20002714:              d646                     sw      a7,44(sp)
+20002716:              d442                     sw      a6,40(sp)
+20002718:              d23e                     sw      a5,36(sp)
+2000271a:              d03a                     sw      a4,32(sp)
+2000271c:              ce36                     sw      a3,28(sp)
+2000271e:              cc32                     sw      a2,24(sp)
+20002720:              ca2e                     sw      a1,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+  size_t file_name_len =
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+20002722:              4148                     lw      a0,4(a0)
+20002724:              80000637                 lui     a2,0x80000
+20002728:              167d                     addi    a2,a2,-1
+2000272a:              4581                     li      a1,0
+2000272c:              27b010ef                 jal     ra,200041a6 <memchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:50
+               log->file_name);
+20002730:              4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+20002732:              40d50633                 sub     a2,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/log.c:51
+  const char *base_name = memrchr(log->file_name, '/', file_name_len);
+20002736:              02f00593                 li      a1,47
+2000273a:              8536                     mv      a0,a3
+2000273c:              319010ef                 jal     ra,20004254 <memrchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:52
+  if (base_name == NULL) {
+20002740:       /----- c501                     beqz    a0,20002748 <base_log_internal_core+0x3e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:55
+    base_name = log->file_name;
+  } else {
+    ++base_name;  // Remove the final '/'.
+20002742:       |      00150693                 addi    a3,a0,1
+20002746:       |  /-- a011                     j       2000274a <base_log_internal_core+0x40>
+/proc/self/cwd/sw/device/lib/runtime/log.c:53
+    base_name = log->file_name;
+20002748:       \--|-> 4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  // A small global counter that increments with each log line. This can be
+  // useful for seeing how many times this function has been called, even if
+  // nothing was printed for some time.
+  static uint16_t global_log_counter = 0;
+
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+2000274a:          \-> 4008                     lw      a0,0(s0)
+2000274c:              458d                     li      a1,3
+stringify_severity():
+/proc/self/cwd/sw/device/lib/runtime/log.c:27
+  switch (severity) {
+2000274e:       /----- 00a5ea63                 bltu    a1,a0,20002762 <base_log_internal_core+0x58>
+20002752:       |      00004597                 auipc   a1,0x4
+20002756:       |      88e58593                 addi    a1,a1,-1906 # 20005fe0 <test_status_set.log_fields.7+0x30>
+2000275a:       |      20b54533                 sh2add  a0,a0,a1
+2000275e:       |      410c                     lw      a1,0(a0)
+20002760:       |  /-- a029                     j       2000276a <base_log_internal_core+0x60>
+20002762:       \--|-> 00004517                 auipc   a0,0x4
+20002766:          |   87a50593                 addi    a1,a0,-1926 # 20005fdc <test_status_set.log_fields.7+0x2c>
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:64
+              global_log_counter, base_name, log->line);
+2000276a:          \-> f0000497                 auipc   s1,0xf0000
+2000276e:              92e4d603                 lhu     a2,-1746(s1) # 10002098 <base_log_internal_core.global_log_counter>
+20002772:              4418                     lw      a4,8(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+20002774:              00004517                 auipc   a0,0x4
+20002778:              85050513                 addi    a0,a0,-1968 # 20005fc4 <test_status_set.log_fields.7+0x14>
+2000277c:              2cbd                     jal     200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:65
+  ++global_log_counter;
+2000277e:              92e49503                 lh      a0,-1746(s1)
+20002782:              0505                     addi    a0,a0,1
+20002784:              92a49723                 sh      a0,-1746(s1)
+20002788:              0848                     addi    a0,sp,20
+/proc/self/cwd/sw/device/lib/runtime/log.c:68
+
+  va_list args;
+  va_start(args, log);
+2000278a:              c02a                     sw      a0,0(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:69
+  base_vprintf(log->format, args);
+2000278c:              4808                     lw      a0,16(s0)
+2000278e:              084c                     addi    a1,sp,20
+20002790:              2c71                     jal     20002a2c <base_vprintf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:72
+  va_end(args);
+
+  base_printf("\r\n");
+20002792:              00004517                 auipc   a0,0x4
+20002796:              84150513                 addi    a0,a0,-1983 # 20005fd3 <test_status_set.log_fields.7+0x23>
+2000279a:              2485                     jal     200029fa <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:73
+}
+2000279c:              40b2                     lw      ra,12(sp)
+2000279e:              4422                     lw      s0,8(sp)
+200027a0:              4492                     lw      s1,4(sp)
+200027a2:              6145                     addi    sp,sp,48
+200027a4:              8082                     ret
+
+200027a6 <base_log_internal_dv>:
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:85
+ *        be invalid at runtime, since the pointed-to data will have been
+ *        stripped from the binary.
+ * @param nargs the number of arguments passed to the format string.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_dv(const log_fields_t *log, uint32_t nargs, ...) {
+200027a6:              1101                     addi    sp,sp,-32
+200027a8:              ce46                     sw      a7,28(sp)
+200027aa:              cc42                     sw      a6,24(sp)
+200027ac:              ca3e                     sw      a5,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:86
+  mmio_region_t log_device = mmio_region_from_addr(kDeviceLogBypassUartAddress);
+200027ae:              00004797                 auipc   a5,0x4
+200027b2:              b367a783                 lw      a5,-1226(a5) # 200062e4 <kDeviceLogBypassUartAddress>
+200027b6:              c83a                     sw      a4,16(sp)
+200027b8:              c636                     sw      a3,12(sp)
+200027ba:              c432                     sw      a2,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200027bc:              c388                     sw      a0,0(a5)
+200027be:              0028                     addi    a0,sp,8
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:90
+  mmio_region_write32(log_device, 0x0, (uintptr_t)log);
+
+  va_list args;
+  va_start(args, nargs);
+200027c0:              c22a                     sw      a0,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+200027c2:       /----- c989                     beqz    a1,200027d4 <base_log_internal_dv+0x2e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:92
+    mmio_region_write32(log_device, 0x0, va_arg(args, uint32_t));
+200027c4:       |  /-> 4512                     lw      a0,4(sp)
+200027c6:       |  |   00450613                 addi    a2,a0,4
+200027ca:       |  |   c232                     sw      a2,4(sp)
+200027cc:       |  |   4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+200027ce:       |  |   15fd                     addi    a1,a1,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200027d0:       |  |   c388                     sw      a0,0(a5)
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+200027d2:       |  \-- f9ed                     bnez    a1,200027c4 <base_log_internal_dv+0x1e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:95
+  }
+  va_end(args);
+}
+200027d4:       \----> 6105                     addi    sp,sp,32
+200027d6:              8082                     ret
+
+200027d8 <base_dev_null>:
+base_dev_null():
+/proc/self/cwd/sw/device/lib/runtime/print.c:57
+
+static const char kErrorNul[17] = "%<unexpected nul>";
+static const char kUnknownSpec[15] = "%<unknown spec>";
+static const char kErrorTooWide[12] = "%<bad width>";
+
+static size_t base_dev_null(void *data, const char *buf, size_t len) {
+200027d8:       8532                    mv      a0,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:58
+  return len;
+200027da:       8082                    ret
+
+200027dc <get_spi_device_sink>:
+get_spi_device_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:245
+  }
+
+  return write_data_len;
+}
+
+sink_func_ptr get_spi_device_sink(void) { return &base_dev_spi_device; }
+200027dc:       00000517                auipc   a0,0x0
+200027e0:       00a50513                addi    a0,a0,10 # 200027e6 <base_dev_spi_device>
+200027e4:       8082                    ret
+
+200027e6 <base_dev_spi_device>:
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:227
+static size_t base_dev_spi_device(void *data, const char *buf, size_t len) {
+200027e6:                             715d                      addi    sp,sp,-80
+200027e8:                             c686                      sw      ra,76(sp)
+200027ea:                             c4a2                      sw      s0,72(sp)
+200027ec:                             c2a6                      sw      s1,68(sp)
+200027ee:                             c0ca                      sw      s2,64(sp)
+200027f0:                             de4e                      sw      s3,60(sp)
+200027f2:                             dc52                      sw      s4,56(sp)
+200027f4:                             da56                      sw      s5,52(sp)
+200027f6:                             d85a                      sw      s6,48(sp)
+200027f8:                             d65e                      sw      s7,44(sp)
+200027fa:                             d462                      sw      s8,40(sp)
+200027fc:                             d266                      sw      s9,36(sp)
+200027fe:                             d06a                      sw      s10,32(sp)
+20002800:                             ce6e                      sw      s11,28(sp)
+20002802:                             c22e                      sw      a1,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+20002804:       /-------------------- 14060963                  beqz    a2,20002956 <base_dev_spi_device+0x170>
+20002808:       |                     8ab2                      mv      s5,a2
+2000280a:       |                     8d2a                      mv      s10,a0
+2000280c:       |                     4c81                      li      s9,0
+2000280e:       |                     a5a5c537                  lui     a0,0xa5a5c
+20002812:       |                     eef50993                  addi    s3,a0,-273 # a5a5beef <_non_volatile_scratch_end+0x859dbeef>
+20002816:       |                     02000493                  li      s1,32
+2000281a:       |                     f0000517                  auipc   a0,0xf0000
+2000281e:       |                     c42a                      sw      a0,8(sp)
+20002820:       |                     f0000c17                  auipc   s8,0xf0000
+20002824:       |                     7ff00b13                  li      s6,2047
+20002828:       |  /----------------> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:231
+    size_t payload_len = len - write_data_len;
+2000282a:       |  |                  419a8533                  sub     a0,s5,s9
+/proc/self/cwd/sw/device/lib/runtime/print.c:232
+    if (payload_len > kSpiDeviceMaxFramePayloadSizeBytes) {
+2000282e:       |  |                  7e400613                  li      a2,2020
+20002832:       |  |                  0ac55bb3                  minu    s7,a0,a2
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:132
+  const size_t data_packet_size_bytes = ((len + 3u) & ~3u);
+20002836:       |  |                  003b8513                  addi    a0,s7,3
+2000283a:       |  |                  9971                      andi    a0,a0,-4
+2000283c:       |  |                  0070                      addi    a2,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:145
+    frame_header_bytes[i] = (kSpiDeviceFrameMagicNumber >> (i * 8)) & 0xff;
+2000283e:       |  |              /-> 00b9d6b3                  srl     a3,s3,a1
+20002842:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:144
+  for (size_t i = 0; i < 4; ++i) {
+20002846:       |  |              |   05a1                      addi    a1,a1,8
+20002848:       |  |              |   0605                      addi    a2,a2,1
+2000284a:       |  |              \-- fe959ae3                  bne     a1,s1,2000283e <base_dev_spi_device+0x58>
+2000284e:       |  |                  45a2                      lw      a1,8(sp)
+20002850:       |  |                  88a5a583                  lw      a1,-1910(a1)
+20002854:       |  |                  4601                      li      a2,0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+20002856:       |  |                  4a12                      lw      s4,4(sp)
+20002858:       |  |                  9a66                      add     s4,s4,s9
+2000285a:       |  |                  0814                      addi    a3,sp,16
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:149
+    frame_header_bytes[i + 4] = (spi_device_frame_num >> (i * 8)) & 0xff;
+2000285c:       |  |              /-> 00c5d733                  srl     a4,a1,a2
+20002860:       |  |              |   00e68023                  sb      a4,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:148
+  for (size_t i = 0; i < 4; ++i) {
+20002864:       |  |              |   0621                      addi    a2,a2,8
+20002866:       |  |              |   0685                      addi    a3,a3,1
+20002868:       |  |              \-- fe961ae3                  bne     a2,s1,2000285c <base_dev_spi_device+0x76>
+2000286c:       |  |                  4581                      li      a1,0
+2000286e:       |  |                  0850                      addi    a2,sp,20
+/proc/self/cwd/sw/device/lib/runtime/print.c:153
+    frame_header_bytes[i + 8] = (len >> (i * 8)) & 0xff;
+20002870:       |  |              /-> 00bbd6b3                  srl     a3,s7,a1
+20002874:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:152
+  for (size_t i = 0; i < 4; ++i) {
+20002878:       |  |              |   05a1                      addi    a1,a1,8
+2000287a:       |  |              |   0605                      addi    a2,a2,1
+2000287c:       |  |              \-- fe959ae3                  bne     a1,s1,20002870 <base_dev_spi_device+0x8a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:134
+      kSpiDeviceFrameHeaderSizeBytes + data_packet_size_bytes;
+20002880:       |  |                  00c50913                  addi    s2,a0,12 # 10002826 <__global_pointer$+0x3e>
+20002884:       |  |                  01850413                  addi    s0,a0,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:158
+    uint32_t last_read_address = 0;
+20002888:       |  |        /-------> cc02                      sw      zero,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:159
+    if (dif_spi_device_get_last_read_address(spi_device, &last_read_address) !=
+2000288a:       |  |        |         082c                      addi    a1,sp,24
+2000288c:       |  |        |         856a                      mv      a0,s10
+2000288e:       |  |        |         32d000ef                  jal     ra,200033ba <dif_spi_device_get_last_read_address>
+20002892:       |  |  /-----|-------- e15d                      bnez    a0,20002938 <base_dev_spi_device+0x152>
+/proc/self/cwd/sw/device/lib/runtime/print.c:172
+        (kSpiDeviceReadBufferSizeBytes + last_read_address -
+20002894:       |  |  |     |         4562                      lw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+20002896:       |  |  |     |         888c2d83                  lw      s11,-1912(s8) # 100020a8 <spi_device_send_frame.next_write_address>
+/proc/self/cwd/sw/device/lib/runtime/print.c:175
+    uint32_t next_read_address = ((adjusted_last_read_address + 1) & ~3u) %
+2000289a:       |  |  |     |         7f550513                  addi    a0,a0,2037
+2000289e:       |  |  |     |         7fc57513                  andi    a0,a0,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+200028a2:       |  |  |     |  /----- 00ade563                  bltu    s11,a0,200028ac <base_dev_spi_device+0xc6>
+200028a6:       |  |  |     |  |      41bb05b3                  sub     a1,s6,s11
+200028aa:       |  |  |     |  |  /-- a019                      j       200028b0 <base_dev_spi_device+0xca>
+200028ac:       |  |  |     |  \--|-> fffdc593                  not     a1,s11
+200028b0:       |  |  |     |     \-> 952e                      add     a0,a0,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:185
+  } while ((frame_size_bytes + kSpiDeviceBufferPreservedSizeBytes) >
+200028b2:       |  |  |     \-------- fc856be3                  bltu    a0,s0,20002888 <base_dev_spi_device+0xa2>
+200028b6:       |  |  |               8456                      mv      s0,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:190
+      (next_write_address + kSpiDeviceFrameHeaderSizeBytes) %
+200028b8:       |  |  |               0db1                      addi    s11,s11,12
+200028ba:       |  |  |               7ffdf693                  andi    a3,s11,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:192
+  size_t aligned_data_len = len & (~3u);
+200028be:       |  |  |               7fcbfa93                  andi    s5,s7,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:193
+  if (!status_ok(spi_device_send_data(spi_device, (uint8_t *)buf,
+200028c2:       |  |  |               856a                      mv      a0,s10
+200028c4:       |  |  |               85d2                      mv      a1,s4
+200028c6:       |  |  |               8656                      mv      a2,s5
+200028c8:       |  |  |               2785                      jal     20003028 <spi_device_send_data>
+200028ca:       |  |  |  /----------- 06054963                  bltz    a0,2000293c <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:199
+  if (len != aligned_data_len) {
+200028ce:       |  |  |  |  /-------- 037a8e63                  beq     s5,s7,2000290a <base_dev_spi_device+0x124>
+/proc/self/cwd/sw/device/lib/runtime/print.c:200
+    uint8_t pad_bytes[4] = {0xff, 0xff, 0xff, 0xff};
+200028d2:       |  |  |  |  |         557d                      li      a0,-1
+200028d4:       |  |  |  |  |         cc2a                      sw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+200028d6:       |  |  |  |  |  /----- 037af163                  bgeu    s5,s7,200028f8 <base_dev_spi_device+0x112>
+200028da:       |  |  |  |  |  |      003bf513                  andi    a0,s7,3
+200028de:       |  |  |  |  |  |      015c85b3                  add     a1,s9,s5
+200028e2:       |  |  |  |  |  |      4612                      lw      a2,4(sp)
+200028e4:       |  |  |  |  |  |      95b2                      add     a1,a1,a2
+200028e6:       |  |  |  |  |  |      0830                      addi    a2,sp,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:205
+      pad_bytes[i] = buf[aligned_data_len + i];
+200028e8:       |  |  |  |  |  |  /-> 00058683                  lb      a3,0(a1)
+200028ec:       |  |  |  |  |  |  |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+200028f0:       |  |  |  |  |  |  |   0585                      addi    a1,a1,1
+200028f2:       |  |  |  |  |  |  |   157d                      addi    a0,a0,-1
+200028f4:       |  |  |  |  |  |  |   0605                      addi    a2,a2,1
+200028f6:       |  |  |  |  |  |  \-- f96d                      bnez    a0,200028e8 <base_dev_spi_device+0x102>
+200028f8:       |  |  |  |  |  \----> 9aee                      add     s5,s5,s11
+200028fa:       |  |  |  |  |         7ffaf693                  andi    a3,s5,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:207
+    if (!status_ok(spi_device_send_data(spi_device, pad_bytes, 4,
+200028fe:       |  |  |  |  |         082c                      addi    a1,sp,24
+20002900:       |  |  |  |  |         4611                      li      a2,4
+20002902:       |  |  |  |  |         856a                      mv      a0,s10
+20002904:       |  |  |  |  |         2715                      jal     20003028 <spi_device_send_data>
+20002906:       |  |  |  +--|-------- 02054b63                  bltz    a0,2000293c <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:216
+                                      next_write_address))) {
+2000290a:       |  |  |  |  \-------> 888c2683                  lw      a3,-1912(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:214
+  if (!status_ok(spi_device_send_data(spi_device, frame_header_bytes,
+2000290e:       |  |  |  |            006c                      addi    a1,sp,12
+20002910:       |  |  |  |            4631                      li      a2,12
+20002912:       |  |  |  |            856a                      mv      a0,s10
+20002914:       |  |  |  |            2f11                      jal     20003028 <spi_device_send_data>
+20002916:       |  |  |  +----------- 02054363                  bltz    a0,2000293c <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+2000291a:       |  |  |  |            888c2503                  lw      a0,-1912(s8)
+2000291e:       |  |  |  |            4622                      lw      a2,8(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+20002920:       |  |  |  |            88a62583                  lw      a1,-1910(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+20002924:       |  |  |  |            954a                      add     a0,a0,s2
+20002926:       |  |  |  |            7ff57513                  andi    a0,a0,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:220
+  next_write_address =
+2000292a:       |  |  |  |            88ac2423                  sw      a0,-1912(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+2000292e:       |  |  |  |            0585                      addi    a1,a1,1
+20002930:       |  |  |  |            88b62523                  sw      a1,-1910(a2)
+20002934:       |  |  |  |            855e                      mv      a0,s7
+20002936:       |  |  |  |     /----- a021                      j       2000293e <base_dev_spi_device+0x158>
+20002938:       |  |  \--|-----|----> 4501                      li      a0,0
+2000293a:       |  |     |     |  /-- a019                      j       20002940 <base_dev_spi_device+0x15a>
+2000293c:       |  |     \-----|--|-> 4501                      li      a0,0
+2000293e:       |  |           \--|-> 8aa2                      mv      s5,s0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+20002940:       |  |              \-> 01754533                  xor     a0,a0,s7
+20002944:       |  |                  00a03533                  snez    a0,a0
+20002948:       |  |                  157d                      addi    a0,a0,-1
+2000294a:       |  |                  01757533                  and     a0,a0,s7
+2000294e:       |  |                  9caa                      add     s9,s9,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+20002950:       |  \----------------- ed5cece3                  bltu    s9,s5,20002828 <base_dev_spi_device+0x42>
+20002954:       |                 /-- a011                      j       20002958 <base_dev_spi_device+0x172>
+20002956:       \-----------------|-> 4c81                      li      s9,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:242
+  return write_data_len;
+20002958:                         \-> 8566                      mv      a0,s9
+2000295a:                             40b6                      lw      ra,76(sp)
+2000295c:                             4426                      lw      s0,72(sp)
+2000295e:                             4496                      lw      s1,68(sp)
+20002960:                             4906                      lw      s2,64(sp)
+20002962:                             59f2                      lw      s3,60(sp)
+20002964:                             5a62                      lw      s4,56(sp)
+20002966:                             5ad2                      lw      s5,52(sp)
+20002968:                             5b42                      lw      s6,48(sp)
+2000296a:                             5bb2                      lw      s7,44(sp)
+2000296c:                             5c22                      lw      s8,40(sp)
+2000296e:                             5c92                      lw      s9,36(sp)
+20002970:                             5d02                      lw      s10,32(sp)
+20002972:                             4df2                      lw      s11,28(sp)
+20002974:                             6161                      addi    sp,sp,80
+20002976:                             8082                      ret
+
+20002978 <get_uart_sink>:
+get_uart_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:257
+    }
+  }
+  return len;
+}
+
+sink_func_ptr get_uart_sink(void) { return &base_dev_uart; }
+20002978:       00000517                auipc   a0,0x0
+2000297c:       00a50513                addi    a0,a0,10 # 20002982 <base_dev_uart>
+20002980:       8082                    ret
+
+20002982 <base_dev_uart>:
+base_dev_uart():
+/proc/self/cwd/sw/device/lib/runtime/print.c:247
+static size_t base_dev_uart(void *data, const char *buf, size_t len) {
+20002982:                 1101                  addi    sp,sp,-32
+20002984:                 ce06                  sw      ra,28(sp)
+20002986:                 cc22                  sw      s0,24(sp)
+20002988:                 ca26                  sw      s1,20(sp)
+2000298a:                 c84a                  sw      s2,16(sp)
+2000298c:                 c64e                  sw      s3,12(sp)
+2000298e:                 8932                  mv      s2,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+20002990:       /-------- c20d                  beqz    a2,200029b2 <base_dev_uart+0x30>
+20002992:       |         89ae                  mv      s3,a1
+20002994:       |         842a                  mv      s0,a0
+20002996:       |         4481                  li      s1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:250
+    if (dif_uart_byte_send_polled(uart, (uint8_t)buf[i]) != kDifOk) {
+20002998:       |  /----> 00998533              add     a0,s3,s1
+2000299c:       |  |      00054583              lbu     a1,0(a0)
+200029a0:       |  |      8522                  mv      a0,s0
+200029a2:       |  |      6c1000ef              jal     ra,20003862 <dif_uart_byte_send_polled>
+200029a6:       |  |  /-- e519                  bnez    a0,200029b4 <base_dev_uart+0x32>
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+200029a8:       |  |  |   0485                  addi    s1,s1,1
+200029aa:       |  \--|-- fe9917e3              bne     s2,s1,20002998 <base_dev_uart+0x16>
+200029ae:       |     |   84ca                  mv      s1,s2
+200029b0:       |     +-- a011                  j       200029b4 <base_dev_uart+0x32>
+200029b2:       \-----|-> 4481                  li      s1,0
+200029b4:             \-> 0b24d533              minu    a0,s1,s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:255
+}
+200029b8:                 40f2                  lw      ra,28(sp)
+200029ba:                 4462                  lw      s0,24(sp)
+200029bc:                 44d2                  lw      s1,20(sp)
+200029be:                 4942                  lw      s2,16(sp)
+200029c0:                 49b2                  lw      s3,12(sp)
+200029c2:                 6105                  addi    sp,sp,32
+200029c4:                 8082                  ret
+
+200029c6 <base_spi_device_stdout>:
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:261
+
+void base_spi_device_stdout(const dif_spi_device_handle_t *spi_device) {
+  // Reset the frame counter.
+  spi_device_frame_num = 0;
+200029c6:       effff597                auipc   a1,0xeffff
+200029ca:       6c05af23                sw      zero,1758(a1) # 100020a4 <spi_device_frame_num>
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+200029ce:       effff597                auipc   a1,0xeffff
+200029d2:       6ce58593                addi    a1,a1,1742 # 1000209c <base_stdout>
+200029d6:       c188                    sw      a0,0(a1)
+200029d8:       00000517                auipc   a0,0x0
+200029dc:       e0e50513                addi    a0,a0,-498 # 200027e6 <base_dev_spi_device>
+200029e0:       c1c8                    sw      a0,4(a1)
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:264
+  base_set_stdout((buffer_sink_t){.data = (void *)spi_device,
+                                  .sink = &base_dev_spi_device});
+}
+200029e2:       8082                    ret
+
+200029e4 <base_uart_stdout>:
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+200029e4:       effff597                auipc   a1,0xeffff
+200029e8:       6b858593                addi    a1,a1,1720 # 1000209c <base_stdout>
+200029ec:       c188                    sw      a0,0(a1)
+200029ee:       00000517                auipc   a0,0x0
+200029f2:       f9450513                addi    a0,a0,-108 # 20002982 <base_dev_uart>
+200029f6:       c1c8                    sw      a0,4(a1)
+base_uart_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:269
+
+void base_uart_stdout(const dif_uart_t *uart) {
+  base_set_stdout(
+      (buffer_sink_t){.data = (void *)uart, .sink = &base_dev_uart});
+}
+200029f8:       8082                    ret
+
+200029fa <base_printf>:
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:271
+
+size_t base_printf(const char *format, ...) {
+200029fa:       7179                    addi    sp,sp,-48
+200029fc:       c606                    sw      ra,12(sp)
+200029fe:       d646                    sw      a7,44(sp)
+20002a00:       d442                    sw      a6,40(sp)
+20002a02:       d23e                    sw      a5,36(sp)
+20002a04:       d03a                    sw      a4,32(sp)
+20002a06:       ce36                    sw      a3,28(sp)
+20002a08:       cc32                    sw      a2,24(sp)
+20002a0a:       ca2e                    sw      a1,20(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  va_end(args);
+  return bytes_left;
+}
+
+size_t base_vprintf(const char *format, va_list args) {
+  return base_vfprintf(base_stdout, format, args);
+20002a0c:       effff597                auipc   a1,0xeffff
+20002a10:       69058593                addi    a1,a1,1680 # 1000209c <base_stdout>
+20002a14:       4190                    lw      a2,0(a1)
+20002a16:       41cc                    lw      a1,4(a1)
+20002a18:       872a                    mv      a4,a0
+20002a1a:       0848                    addi    a0,sp,20
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:273
+  va_start(args, format);
+20002a1c:       c42a                    sw      a0,8(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a1e:       0854                    addi    a3,sp,20
+20002a20:       8532                    mv      a0,a2
+20002a22:       863a                    mv      a2,a4
+20002a24:       200d                    jal     20002a46 <base_vfprintf>
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:276
+  return bytes_left;
+20002a26:       40b2                    lw      ra,12(sp)
+20002a28:       6145                    addi    sp,sp,48
+20002a2a:       8082                    ret
+
+20002a2c <base_vprintf>:
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a2c:       effff617                auipc   a2,0xeffff
+20002a30:       67060693                addi    a3,a2,1648 # 1000209c <base_stdout>
+20002a34:       4290                    lw      a2,0(a3)
+20002a36:       42d4                    lw      a3,4(a3)
+20002a38:       872e                    mv      a4,a1
+20002a3a:       87aa                    mv      a5,a0
+20002a3c:       8532                    mv      a0,a2
+20002a3e:       85b6                    mv      a1,a3
+20002a40:       863e                    mv      a2,a5
+20002a42:       86ba                    mv      a3,a4
+20002a44:       a009                    j       20002a46 <base_vfprintf>
+
+20002a46 <base_vfprintf>:
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:733
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+    }
+  }
+}
+
+size_t base_vfprintf(buffer_sink_t out, const char *format, va_list args) {
+20002a46:                                                                          711d                 addi    sp,sp,-96
+20002a48:                                                                          ce86                 sw      ra,92(sp)
+20002a4a:                                                                          cca2                 sw      s0,88(sp)
+20002a4c:                                                                          caa6                 sw      s1,84(sp)
+20002a4e:                                                                          c8ca                 sw      s2,80(sp)
+20002a50:                                                                          c6ce                 sw      s3,76(sp)
+20002a52:                                                                          c4d2                 sw      s4,72(sp)
+20002a54:                                                                          c2d6                 sw      s5,68(sp)
+20002a56:                                                                          c0da                 sw      s6,64(sp)
+20002a58:                                                                          de5e                 sw      s7,60(sp)
+20002a5a:                                                                          dc62                 sw      s8,56(sp)
+20002a5c:                                                                          da66                 sw      s9,52(sp)
+20002a5e:                                                                          d86a                 sw      s10,48(sp)
+20002a60:                                                                          d66e                 sw      s11,44(sp)
+20002a62:                                                                          8432                 mv      s0,a2
+20002a64:                                                                          cc36                 sw      a3,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:743
+  // NOTE: This copy is necessary on amd64 and other platforms, where
+  // `va_list` is a fixed array type (and, as such, decays to a pointer in
+  // an argument list). On PSABI RV32IMC, however, `va_list` is a `void*`, so
+  // this is a copy of the pointer, not the array.
+  va_list args_copy;
+  va_copy(args_copy, args);
+20002a66:                                                                          ca36                 sw      a3,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+
+  size_t bytes_written = 0;
+  while (format[0] != '\0') {
+20002a68:                                                                          00064603             lbu     a2,0(a2)
+20002a6c:       /----------------------------------------------------------------- 4a060563             beqz    a2,20002f16 <base_vfprintf+0x4d0>
+20002a70:       |                                                                  89ae                 mv      s3,a1
+20002a72:       |                                                                  892a                 mv      s2,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:734
+  if (out.sink == NULL) {
+20002a74:       |                                                              /-- e589                 bnez    a1,20002a7e <base_vfprintf+0x38>
+20002a76:       |                                                              |   00000517             auipc   a0,0x0
+20002a7a:       |                                                              |   d6250993             addi    s3,a0,-670 # 200027d8 <base_dev_null>
+20002a7e:       |                                                              \-> 4a81                 li      s5,0
+20002a80:       |                                                                  4a01                 li      s4,0
+20002a82:       |                                                                  02500c93             li      s9,37
+20002a86:       |                                                                  02100d13             li      s10,33
+20002a8a:       |                                                                  0f600d93             li      s11,246
+20002a8e:       |                                                                  650d                 lui     a0,0x3
+20002a90:       |                                                                  c2250513             addi    a0,a0,-990 # 2c22 <_static_critical_size+0xc3a>
+20002a94:       |                                                                  c82a                 sw      a0,16(sp)
+consume_until_percent():
+/proc/self/cwd/sw/device/lib/runtime/print.c:341
+    char c = (*format)[text_len];
+20002a96:       |           /----------------------------------------------------> 01440533             add     a0,s0,s4
+20002a9a:       |           |                                                      00054483             lbu     s1,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:342
+    if (c == '\0' || c == kPercent) {
+20002a9e:       |           |                                                  /-- 01948363             beq     s1,s9,20002aa4 <base_vfprintf+0x5e>
+20002aa2:       |           |                                            /-----|-- ec91                 bnez    s1,20002abe <base_vfprintf+0x78>
+/proc/self/cwd/sw/device/lib/runtime/print.c:343
+      if (text_len > 0) {
+20002aa4:       |           |                                            |  /--\-X 000a0763             beqz    s4,20002ab2 <base_vfprintf+0x6c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:344
+        *bytes_written += out.sink(out.data, *format, text_len);
+20002aa8:       |           |                                            |  |      854a                 mv      a0,s2
+20002aaa:       |           |                                            |  |      85a2                 mv      a1,s0
+20002aac:       |           |                                            |  |      8652                 mv      a2,s4
+20002aae:       |           |                                            |  |      9982                 jalr    s3
+20002ab0:       |           |                                            |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:346
+      *format += text_len;
+20002ab2:       |           |                                            |  \----> 9452                 add     s0,s0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:347
+      return c != '\0';
+20002ab4:       |           |                                            |         00903bb3             snez    s7,s1
+20002ab8:       |           |                                            |  /----- 01949663             bne     s1,s9,20002ac4 <base_vfprintf+0x7e>
+20002abc:       |           |                                            |  |  /-- a029                 j       20002ac6 <base_vfprintf+0x80>
+/proc/self/cwd/sw/device/lib/runtime/print.c:349
+    ++text_len;
+20002abe:       |           |                                            \--|--|-> 0a05                 addi    s4,s4,1
+20002ac0:       |           |                                               |  +-- 01948363             beq     s1,s9,20002ac6 <base_vfprintf+0x80>
+20002ac4:       |           +-----------------------------------------------\--|-X f8e9                 bnez    s1,20002a96 <base_vfprintf+0x50>
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:747
+    if (!consume_until_percent(out, &format, &bytes_written)) {
+20002ac6:       |           |                                                  \-> 001bf513             andi    a0,s7,1
+20002aca:       |  /--------|----------------------------------------------------- 44050763             beqz    a0,20002f18 <base_vfprintf+0x4d2>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002ace:       |  |        |                                                      00144a03             lbu     s4,1(s0)
+20002ad2:       |  |        |                                               /----- 01aa1763             bne     s4,s10,20002ae0 <base_vfprintf+0x9a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002ad6:       |  |        |                                               |      00244583             lbu     a1,2(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:384
+    ++(*format);
+20002ada:       |  |        |                                               |      0409                 addi    s0,s0,2
+20002adc:       |  |        |                                               |      4b05                 li      s6,1
+20002ade:       |  |        |                                               |  /-- a021                 j       20002ae6 <base_vfprintf+0xa0>
+20002ae0:       |  |        |                                               \--|-> 4b01                 li      s6,0
+20002ae2:       |  |        |                                                  |   0405                 addi    s0,s0,1
+20002ae4:       |  |        |                                                  |   85d2                 mv      a1,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002ae6:       |  |  /-----|--------------------------------------------------\-X 40058f63             beqz    a1,20002f04 <base_vfprintf+0x4be>
+20002aea:       |  |  |     |                                                      4481                 li      s1,0
+20002aec:       |  |  |     |                                                      4c01                 li      s8,0
+20002aee:       |  |  |     |                                                      4501                 li      a0,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002af0:       |  |  |     |                                                      0405                 addi    s0,s0,1
+20002af2:       |  |  |     |                                         /----------> fc658613             addi    a2,a1,-58
+20002af6:       |  |  |     |                                         |            0ff67613             andi    a2,a2,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002afa:       |  |  |     |                                         |            0ff5f593             andi    a1,a1,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002afe:       |  |  |     |                                         |  /-------- 03b66c63             bltu    a2,s11,20002b36 <base_vfprintf+0xf0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:403
+    if (spec->padding == 0) {
+20002b02:       |  |  |     |                                         |  |         0ff57613             andi    a2,a0,255
+20002b06:       |  |  |     |                                         |  |  /----- ee09                 bnez    a2,20002b20 <base_vfprintf+0xda>
+20002b08:       |  |  |     |                                         |  |  |      02000c13             li      s8,32
+20002b0c:       |  |  |     |                                         |  |  |      03000613             li      a2,48
+20002b10:       |  |  |     |                                         |  |  |      02000513             li      a0,32
+/proc/self/cwd/sw/device/lib/runtime/print.c:404
+      if (c == '0') {
+20002b14:       |  |  |     |                                         |  |  +----- 00c59663             bne     a1,a2,20002b20 <base_vfprintf+0xda>
+20002b18:       |  |  |     |                                         |  |  |      03000513             li      a0,48
+20002b1c:       |  |  |     |                                         |  |  |      8c32                 mv      s8,a2
+20002b1e:       |  |  |     |                                         |  |  |  /-- a039                 j       20002b2c <base_vfprintf+0xe6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:412
+    spec->width += (c - '0');
+20002b20:       |  |  |     |                                         |  |  \--|-> 2094c633             sh2add  a2,s1,s1
+20002b24:       |  |  |     |                                         |  |     |   20b625b3             sh1add  a1,a2,a1
+20002b28:       |  |  |     |                                         |  |     |   fd058493             addi    s1,a1,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002b2c:       |  |  |     |                                         |  |     \-> 00044583             lbu     a1,0(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b30:       |  |  |     |                                         |  |         0405                 addi    s0,s0,1
+20002b32:       |  |  |     |                                         \--|-------- f1e1                 bnez    a1,20002af2 <base_vfprintf+0xac>
+20002b34:       |  |  +-----|--------------------------------------------|-------- aec1                 j       20002f04 <base_vfprintf+0x4be>
+/proc/self/cwd/sw/device/lib/runtime/print.c:416
+  if ((spec->width == 0 && spec->padding != 0) || spec->width > 32) {
+20002b36:       |  |  |     |                                            \-----/-X c481                 beqz    s1,20002b3e <base_vfprintf+0xf8>
+20002b38:       |  |  |     |                                               /--|-- 01a4e763             bltu    s1,s10,20002b46 <base_vfprintf+0x100>
+20002b3c:       |  |  |  /--|-----------------------------------------------|--|-- aef5                 j       20002f38 <base_vfprintf+0x4f2>
+20002b3e:       |  |  |  |  |                                               |  \-> 0ff57513             andi    a0,a0,255
+20002b42:       |  |  |  +--|-----------------------------------------------|----- 3e051b63             bnez    a0,20002f38 <base_vfprintf+0x4f2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002b46:       |  |  |  |  |                                               \----> 05700513             li      a0,87
+20002b4a:       |  |  |  |  |                                               /----- 04b55d63             bge     a0,a1,20002ba4 <base_vfprintf+0x15e>
+20002b4e:       |  |  |  |  |                                               |      fa858513             addi    a0,a1,-88
+20002b52:       |  |  |  |  |        /--------------------------------------|----- 2cad6563             bltu    s10,a0,20002e1c <base_vfprintf+0x3d6>
+20002b56:       |  |  |  |  |        |                                      |      00003597             auipc   a1,0x3
+20002b5a:       |  |  |  |  |        |                                      |      49a58593             addi    a1,a1,1178 # 20005ff0 <test_status_set.log_fields.7+0x40>
+20002b5e:       |  |  |  |  |        |                                      |      20b54533             sh2add  a0,a0,a1
+20002b62:       |  |  |  |  |        |                                      |      4108                 lw      a0,0(a0)
+20002b64:       |  |  |  |  |        |                                      |      8502                 jr      a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:609
+      if (spec.is_nonstd) {
+20002b66:       |  |  |  |  |        +--------------------------------------|----- 2baa0b63             beq     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:612
+      uint32_t value = va_arg(*args, uint32_t);
+20002b6a:       |  |  |  |  |        |                                      |      4552                 lw      a0,20(sp)
+20002b6c:       |  |  |  |  |        |                                      |      00450593             addi    a1,a0,4
+20002b70:       |  |  |  |  |        |                                      |      ca2e                 sw      a1,20(sp)
+20002b72:       |  |  |  |  |        |                                      |      00052b03             lw      s6,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:613
+      if (((int32_t)value) < 0) {
+20002b76:       |  |  |  |  |        |                                      |  /-- 000b5c63             bgez    s6,20002b8e <base_vfprintf+0x148>
+/proc/self/cwd/sw/device/lib/runtime/print.c:614
+        *bytes_written += out.sink(out.data, "-", 1);
+20002b7a:       |  |  |  |  |        |                                      |  |   00003517             auipc   a0,0x3
+20002b7e:       |  |  |  |  |        |                                      |  |   52e50593             addi    a1,a0,1326 # 200060a8 <test_status_set.log_fields.7+0xf8>
+20002b82:       |  |  |  |  |        |                                      |  |   4605                 li      a2,1
+20002b84:       |  |  |  |  |        |                                      |  |   854a                 mv      a0,s2
+20002b86:       |  |  |  |  |        |                                      |  |   9982                 jalr    s3
+20002b88:       |  |  |  |  |        |                                      |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:615
+        value = -value;
+20002b8a:       |  |  |  |  |        |                                      |  |   41600b33             neg     s6,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:618
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002b8e:       |  |  |  |  |        |                                      |  \-> 0ffc7713             andi    a4,s8,255
+20002b92:       |  |  |  |  |        |                                      |      00003517             auipc   a0,0x3
+20002b96:       |  |  |  |  |        |                                      |      52f50813             addi    a6,a0,1327 # 200060c1 <kDigitsLow>
+20002b9a:       |  |  |  |  |        |                                      |      47a9                 li      a5,10
+20002b9c:       |  |  |  |  |        |                                      |      854a                 mv      a0,s2
+20002b9e:       |  |  |  |  |        |                                      |      85ce                 mv      a1,s3
+20002ba0:       |  |  |  |  |        |                                      |      865a                 mv      a2,s6
+20002ba2:       |  |  |  |  |        |              /-----------------------|----- a489                 j       20002de4 <base_vfprintf+0x39e>
+20002ba4:       |  |  |  |  |        |           /--|-----------------------\----X 27958a63             beq     a1,s9,20002e18 <base_vfprintf+0x3d2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002ba8:       |  |  |  |  |        |           |  |                              04300513             li      a0,67
+20002bac:       |  |  |  |  |        |     /-----|--|----------------------------- 28a58663             beq     a1,a0,20002e38 <base_vfprintf+0x3f2>
+20002bb0:       |  |  |  |  |        |     |     |  |                              04800513             li      a0,72
+20002bb4:       |  |  |  |  |        |     |     |  |                          /-- 02a58563             beq     a1,a0,20002bde <base_vfprintf+0x198>
+20002bb8:       |  |  |  |  |        +-----|-----|--|--------------------------|-- a495                 j       20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:662
+      if (spec.is_nonstd) {
+20002bba:       |  |  |  |  |        |     |     |  |                          +-- 03aa1263             bne     s4,s10,20002bde <base_vfprintf+0x198>
+/proc/self/cwd/sw/device/lib/runtime/print.c:663
+        size_t len = va_arg(*args, size_t);
+20002bbe:       |  |  |  |  |        |     |     |  |                          |   4552                 lw      a0,20(sp)
+20002bc0:       |  |  |  |  |        |     |     |  |                          |   00450593             addi    a1,a0,4
+20002bc4:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002bc6:       |  |  |  |  |        |     |     |  |                          |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:664
+        char *value = va_arg(*args, char *);
+20002bc8:       |  |  |  |  |        |     |     |  |                          |   00850593             addi    a1,a0,8
+20002bcc:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002bce:       |  |  |  |  |        |     |     |  |                          |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:665
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002bd0:       |  |  |  |  |        |     |     |  |                          |   0ffc7793             andi    a5,s8,255
+20002bd4:       |  |  |  |  |        |     |     |  |                          |   00003517             auipc   a0,0x3
+20002bd8:       |  |  |  |  |        |     |     |  |                          |   51a50893             addi    a7,a0,1306 # 200060ee <kDigitsHigh>
+20002bdc:       |  |  |  |  |        |     |     |  |                       /--|-- a2cd                 j       20002dbe <base_vfprintf+0x378>
+/proc/self/cwd/sw/device/lib/runtime/print.c:671
+      uint32_t value = va_arg(*args, uint32_t);
+20002bde:       |  |  |  |  |        |     |     |  |                       |  \-> 4552                 lw      a0,20(sp)
+20002be0:       |  |  |  |  |        |     |     |  |                       |      00450593             addi    a1,a0,4
+20002be4:       |  |  |  |  |        |     |     |  |                       |      ca2e                 sw      a1,20(sp)
+20002be6:       |  |  |  |  |        |     |     |  |                       |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:673
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsHigh);
+20002be8:       |  |  |  |  |        |     |     |  |                       |      0ffc7713             andi    a4,s8,255
+20002bec:       |  |  |  |  |        |     |     |  |                       |      00003517             auipc   a0,0x3
+20002bf0:       |  |  |  |  |        |     |     |  |                       |      50250813             addi    a6,a0,1282 # 200060ee <kDigitsHigh>
+20002bf4:       |  |  |  |  |        |     |     |  |                    /--|----- a2ed                 j       20002dde <base_vfprintf+0x398>
+/proc/self/cwd/sw/device/lib/runtime/print.c:687
+      if (!spec.is_nonstd) {
+20002bf6:       |  |  |  |  |        +-----|-----|--|--------------------|--|----- 23aa1363             bne     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:690
+      size_t len = va_arg(*args, size_t);
+20002bfa:       |  |  |  |  |        |     |     |  |                    |  |      4552                 lw      a0,20(sp)
+20002bfc:       |  |  |  |  |        |     |     |  |                    |  |      00450593             addi    a1,a0,4
+20002c00:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c02:       |  |  |  |  |        |     |     |  |                    |  |      4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:691
+      char *value = va_arg(*args, char *);
+20002c04:       |  |  |  |  |        |     |     |  |                    |  |      00850593             addi    a1,a0,8
+20002c08:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c0a:       |  |  |  |  |        |     |     |  |                    |  |      4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:692
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002c0c:       |  |  |  |  |        |     |     |  |                    |  |      0ffc7793             andi    a5,s8,255
+20002c10:       |  |  |  |  |        |     |     |  |                    |  |      00003517             auipc   a0,0x3
+20002c14:       |  |  |  |  |        |     |     |  |                    |  |      4de50893             addi    a7,a0,1246 # 200060ee <kDigitsHigh>
+20002c18:       |  |  |  |  |        |     |     |  |        /-----------|--|----- aad5                 j       20002e0c <base_vfprintf+0x3c6>
+20002c1a:       |  |  |  |  |        |     |     |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c1c:       |  |  |  |  |        |     |     |  |        |           |  |      00450593             addi    a1,a0,4
+20002c20:       |  |  |  |  |        |     |     |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c22:       |  |  |  |  |        |     |     |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:706
+      if (spec.is_nonstd) {
+20002c24:       |  |  |  |  |        |     |  /--|--|--------|-----------|--|----- 27aa1b63             bne     s4,s10,20002e9a <base_vfprintf+0x454>
+/proc/self/cwd/sw/device/lib/runtime/print.c:709
+        if (va_arg(*args, int) != 0) {
+20002c28:       |  |  |  |  |  /-----|-----|--|--|--|--------|-----------|--|----- 2c060863             beqz    a2,20002ef8 <base_vfprintf+0x4b2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:710
+          *bytes_written += out.sink(out.data, "true", 4);
+20002c2c:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002c30:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      48150593             addi    a1,a0,1153 # 200060ad <test_status_set.log_fields.7+0xfd>
+20002c34:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      4611                 li      a2,4
+20002c36:       |  |  |  |  |  |  /--|-----|--|--|--|--------|-----------|--|----- aac5                 j       20002e26 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:570
+      if (spec.is_nonstd) {
+20002c38:       |  |  |  |  |  |  |  +-----|--|--|--|--------|-----------|--|----- 1faa0263             beq     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:573
+      char value = (char)va_arg(*args, uint32_t);
+20002c3c:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c3e:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002c42:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c44:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4108                 lw      a0,0(a0)
+20002c46:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      02a10223             sb      a0,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:574
+      *bytes_written += out.sink(out.data, &value, 1);
+20002c4a:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      104c                 addi    a1,sp,36
+20002c4c:       |  |  |  |  |  |  |  |  /--|--|--|--|--------|-----------|--|----- a465                 j       20002ef4 <base_vfprintf+0x4ae>
+/proc/self/cwd/sw/device/lib/runtime/print.c:622
+      if (spec.is_nonstd) {
+20002c4e:       |  |  |  |  |  |  |  +--|--|--|--|--|--------|-----------|--|----- 1daa0763             beq     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:625
+      uint32_t value = va_arg(*args, uint32_t);
+20002c52:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c54:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002c58:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c5a:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:627
+          write_digits(out, value, spec.width, spec.padding, 8, kDigitsLow);
+20002c5c:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      0ffc7713             andi    a4,s8,255
+20002c60:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002c64:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      46150813             addi    a6,a0,1121 # 200060c1 <kDigitsLow>
+20002c68:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      47a1                 li      a5,8
+20002c6a:       |  |  |  |  |  |  |  |  |  |  |  |  |  /-----|-----------|--|----- aa9d                 j       20002de0 <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:631
+      if (spec.is_nonstd) {
+20002c6c:       |  |  |  |  |  |  |  +--|--|--|--|--|--|-----|-----------|--|----- 1baa0863             beq     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002c70:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002c74:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      43a50593             addi    a1,a0,1082 # 200060aa <test_status_set.log_fields.7+0xfa>
+20002c78:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4609                 li      a2,2
+20002c7a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002c7c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:641
+      uintptr_t value = va_arg(*args, uintptr_t);
+20002c7e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      45d2                 lw      a1,20(sp)
+20002c80:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00458613             addi    a2,a1,4
+20002c84:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      ca32                 sw      a2,20(sp)
+20002c86:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4190                 lw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002c88:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:643
+          write_digits(out, value, sizeof(uintptr_t) * 2, '0', 16, kDigitsLow);
+20002c8a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002c8e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      43750813             addi    a6,a0,1079 # 200060c1 <kDigitsLow>
+20002c92:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      46a1                 li      a3,8
+20002c94:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      03000713             li      a4,48
+20002c98:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      47c1                 li      a5,16
+20002c9a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002c9c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      85ce                 mv      a1,s3
+20002c9e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      2155                 jal     20003142 <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:642
+      *bytes_written +=
+20002ca0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+20002ca2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-----------|--|----- a269                 j       20002e2c <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:722
+      status_t value = va_arg(*args, status_t);
+20002ca4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4552                 lw      a0,20(sp)
+20002ca6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00450593             addi    a1,a0,4
+20002caa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      ca2e                 sw      a1,20(sp)
+20002cac:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4108                 lw      a0,0(a0)
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:467
+  char mod[] = {'"', 0, 0, 0, '"', ','};
+20002cae:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45c2                 lw      a1,16(sp)
+20002cb0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02b11423             sh      a1,40(sp)
+20002cb4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02200593             li      a1,34
+20002cb8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      d22e                 sw      a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002cba:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      086c                 addi    a1,sp,28
+20002cbc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      1010                 addi    a2,sp,32
+20002cbe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02510693             addi    a3,sp,37
+20002cc2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      23e9                 jal     2000328c <status_extract>
+/proc/self/cwd/sw/device/lib/runtime/print.c:473
+  const char *end = start;
+20002cc4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002cc6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      c62a                 sw      a0,12(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002cc8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fff58493             addi    s1,a1,-1
+20002ccc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  /-> 0005c503             lbu     a0,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:475
+    end++;
+20002cd0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0585                 addi    a1,a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002cd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0485                 addi    s1,s1,1
+20002cd4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  \-- fd65                 bnez    a0,20002ccc <base_vfprintf+0x286>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002cd6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fdfa0513             addi    a0,s4,-33
+20002cda:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00153613             seqz    a2,a0
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002cde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      0606                 slli    a2,a2,0x1
+20002ce0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002ce4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      3d850593             addi    a1,a0,984 # 200060b8 <test_status_set.log_fields.7+0x108>
+20002ce8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002cea:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002cec:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002cee:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8a2a                 mv      s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002cf0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      40b48633             sub     a2,s1,a1
+20002cf4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002cf6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+20002cf8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8c2a                 mv      s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002cfa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002cfe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      3bf50593             addi    a1,a0,959 # 200060b9 <test_status_set.log_fields.7+0x109>
+20002d02:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d04:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      865a                 mv      a2,s6
+20002d06:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d08:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9a2a                 add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d0a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00002517             auipc   a0,0x2
+20002d0e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      bbe50593             addi    a1,a0,-1090 # 200048c8 <test_main.log_fields.21+0x204>
+20002d12:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4605                 li      a2,1
+20002d14:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d16:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002d18:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9552                 add     a0,a0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d1a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:483
+  if (err) {
+20002d1c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4532                 lw      a0,12(sp)
+20002d1e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--------|--|----- 18050663             beqz    a0,20002eaa <base_vfprintf+0x464>
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d22:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d26:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      39950593             addi    a1,a0,921 # 200060bb <test_status_set.log_fields.7+0x10b>
+20002d2a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002d2c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d2e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+20002d30:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      84aa                 mv      s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002d32:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      104c                 addi    a1,sp,36
+20002d34:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4619                 li      a2,6
+20002d36:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d38:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d3a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      5602                 lw      a2,32(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d3c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d3e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d42:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      38350813             addi    a6,a0,899 # 200060c1 <kDigitsLow>
+20002d46:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      47a9                 li      a5,10
+20002d48:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d4a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      85ce                 mv      a1,s3
+20002d4c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4681                 li      a3,0
+20002d4e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4701                 li      a4,0
+20002d50:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      2ecd                 jal     20003142 <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002d52:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:488
+    len += out.sink(out.data, "]", 1);
+20002d54:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d58:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      36950593             addi    a1,a0,873 # 200060bd <test_status_set.log_fields.7+0x10d>
+20002d5c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002d5e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d60:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d62:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9526                 add     a0,a0,s1
+20002d64:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     /--|--|----- aab1                 j       20002ec0 <base_vfprintf+0x47a>
+20002d66:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      4552                 lw      a0,20(sp)
+20002d68:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      00450593             addi    a1,a0,4
+20002d6c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      ca2e                 sw      a1,20(sp)
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:593
+      if (spec.is_nonstd) {
+20002d6e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|--|--|----- 17aa1563             bne     s4,s10,20002ed8 <base_vfprintf+0x492>
+/proc/self/cwd/sw/device/lib/runtime/print.c:595
+        len = va_arg(*args, size_t);
+20002d72:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002d74:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00850593             addi    a1,a0,8
+20002d78:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002d7a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      414c                 lw      a1,4(a0)
+20002d7c:       |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|--|----- a06d                 j       20002e26 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:697
+      if (spec.is_nonstd) {
+20002d7e:       |  |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|----- 09aa0f63             beq     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:700
+      uint32_t value = va_arg(*args, uint32_t);
+20002d82:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4552                 lw      a0,20(sp)
+20002d84:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002d88:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002d8a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:702
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002d8c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002d90:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002d94:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      33150813             addi    a6,a0,817 # 200060c1 <kDigitsLow>
+20002d98:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      47a9                 li      a5,10
+20002d9a:       |  |  |  |  |  |  |  |  |  |  |  |  |  +--|--|--|--|--|--|--|----- a099                 j       20002de0 <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:647
+      if (spec.is_nonstd) {
+20002d9c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /-- 03aa1663             bne     s4,s10,20002dc8 <base_vfprintf+0x382>
+/proc/self/cwd/sw/device/lib/runtime/print.c:648
+        size_t len = va_arg(*args, size_t);
+20002da0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4552                 lw      a0,20(sp)
+20002da2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00450593             addi    a1,a0,4
+20002da6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002da8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:649
+        char *value = va_arg(*args, char *);
+20002daa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00850593             addi    a1,a0,8
+20002dae:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002db0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:650
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002db2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   0ffc7793             andi    a5,s8,255
+20002db6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002dba:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   30b50893             addi    a7,a0,779 # 200060c1 <kDigitsLow>
+20002dbe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|-> 4805                 li      a6,1
+20002dc0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   854a                 mv      a0,s2
+20002dc2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   85ce                 mv      a1,s3
+20002dc4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   8726                 mv      a4,s1
+20002dc6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-- a0b9                 j       20002e14 <base_vfprintf+0x3ce>
+/proc/self/cwd/sw/device/lib/runtime/print.c:656
+      uint32_t value = va_arg(*args, uint32_t);
+20002dc8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \-> 4552                 lw      a0,20(sp)
+20002dca:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002dce:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002dd0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:658
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsLow);
+20002dd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002dd6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002dda:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      2eb50813             addi    a6,a0,747 # 200060c1 <kDigitsLow>
+20002dde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|----> 47c1                 li      a5,16
+20002de0:       |  |  |  |  |  |  |  |  |  |  |  |  |  >--|--|--|--|--|-----|----> 854a                 mv      a0,s2
+20002de2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |      85ce                 mv      a1,s3
+20002de4:       |  |  |  |  |  |  |  |  |  |  |  |  \--|--|--|--|--|--|-----|----> 86a6                 mv      a3,s1
+20002de6:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |      2eb1                 jal     20003142 <write_digits>
+20002de8:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  /-- a089                 j       20002e2a <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:677
+      if (!spec.is_nonstd) {
+20002dea:       |  |  |  |  |  |  |  +--|--|--|--|-----|--|--|--|--|--|-----|--|-- 03aa1963             bne     s4,s10,20002e1c <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:680
+      size_t len = va_arg(*args, size_t);
+20002dee:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4552                 lw      a0,20(sp)
+20002df0:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00450593             addi    a1,a0,4
+20002df4:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002df6:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:681
+      char *value = va_arg(*args, char *);
+20002df8:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00850593             addi    a1,a0,8
+20002dfc:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002dfe:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:682
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002e00:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   0ffc7793             andi    a5,s8,255
+20002e04:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00003517             auipc   a0,0x3
+20002e08:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   2bd50893             addi    a7,a0,701 # 200060c1 <kDigitsLow>
+20002e0c:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  \--|--|--|-----|--|-> 854a                 mv      a0,s2
+20002e0e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   85ce                 mv      a1,s3
+20002e10:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   8726                 mv      a4,s1
+20002e12:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   4801                 li      a6,0
+20002e14:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     \--|-> 2a05                 jal     20002f44 <hex_dump>
+20002e16:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |        +-- a811                 j       20002e2a <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:563
+      if (spec.is_nonstd) {
+20002e18:       |  |  |  |  |  |  |  |  |  |  |  \-----|--|-----|--|--|--/-----|-X 0daa1a63             bne     s4,s10,20002eec <base_vfprintf+0x4a6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:728
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+20002e1c:       |  |  |  |  |  |  |  \--|--|--|--------|--|-----|--|--|--|-----|-> 00003517             auipc   a0,0x3
+20002e20:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   2e250593             addi    a1,a0,738 # 200060fe <kUnknownSpec>
+20002e24:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   463d                 li      a2,15
+20002e26:       |  |  |  |  |  |  >-----|--|--|--------|--|-----|--|--|--|-----|-> 854a                 mv      a0,s2
+20002e28:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   9982                 jalr    s3
+20002e2a:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     \-> 9aaa                 add     s5,s5,a0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+  while (format[0] != '\0') {
+20002e2c:       |  |  |  |  |  |  |     |  |  |        |  >-----|--|--|--|-------> 00044503             lbu     a0,0(s0)
+20002e30:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |         4a01                 li      s4,0
+20002e32:       |  |  |  |  \--|--|-----|--|--|--------|--|-----|--|--|--|-------- c60512e3             bnez    a0,20002a96 <base_vfprintf+0x50>
+20002e36:       |  +--|--|-----|--|-----|--|--|--------|--|-----|--|--|--|-------- a0cd                 j       20002f18 <base_vfprintf+0x4d2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:578
+      uint32_t value = va_arg(*args, uint32_t);
+20002e38:       |  |  |  |     |  |     |  \--|--------|--|-----|--|--|--|-------> 4552                 lw      a0,20(sp)
+20002e3a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         00450593             addi    a1,a0,4
+20002e3e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         ca2e                 sw      a1,20(sp)
+20002e40:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4104                 lw      s1,0(a0)
+20002e42:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4a11                 li      s4,4
+/proc/self/cwd/sw/device/lib/runtime/print.c:580
+        uint8_t ch = (uint8_t)value;
+20002e44:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  /----> 02910223             sb      s1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:581
+        if (ch >= 32 && ch < 127) {
+20002e48:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      0ff4f513             andi    a0,s1,255
+20002e4c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1501                 addi    a0,a0,-32
+20002e4e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      104c                 addi    a1,sp,36
+20002e50:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      05f00613             li      a2,95
+20002e54:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  /-- 02c56a63             bltu    a0,a2,20002e88 <base_vfprintf+0x442>
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002e58:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002e5c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   24d50593             addi    a1,a0,589 # 200060a5 <test_status_set.log_fields.7+0xf5>
+20002e60:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4609                 li      a2,2
+20002e62:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002e64:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002e66:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002e6a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+20002e6c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   8191                 srli    a1,a1,0x4
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002e6e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002e72:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   25350b13             addi    s6,a0,595 # 200060c1 <kDigitsLow>
+20002e76:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002e78:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4605                 li      a2,1
+20002e7a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002e7c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002e7e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002e82:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002e84:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   89bd                 andi    a1,a1,15
+20002e86:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002e88:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  \-> 4605                 li      a2,1
+20002e8a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      854a                 mv      a0,s2
+20002e8c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9982                 jalr    s3
+20002e8e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:579
+      for (size_t i = 0; i < sizeof(uint32_t); ++i, value >>= 8) {
+20002e90:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1a7d                 addi    s4,s4,-1
+20002e92:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      80a1                 srli    s1,s1,0x8
+20002e94:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  \----- fa0a18e3             bnez    s4,20002e44 <base_vfprintf+0x3fe>
+20002e98:       |  |  |  |     |  |     |     |        |  +-----|--|--|--|-------- bf51                 j       20002e2c <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:718
+          write_digits(out, value, spec.width, spec.padding, 2, kDigitsLow);
+20002e9a:       |  |  |  |     |  |     |     \--------|--|-----|--|--|--|-------> 0ffc7713             andi    a4,s8,255
+20002e9e:       |  |  |  |     |  |     |              |  |     |  |  |  |         00003517             auipc   a0,0x3
+20002ea2:       |  |  |  |     |  |     |              |  |     |  |  |  |         22350813             addi    a6,a0,547 # 200060c1 <kDigitsLow>
+20002ea6:       |  |  |  |     |  |     |              |  |     |  |  |  |         4789                 li      a5,2
+20002ea8:       |  |  |  |     |  |     |              \--|-----|--|--|--|-------- bf25                 j       20002de0 <base_vfprintf+0x39a>
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:491
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002eaa:       |  |  |  |     |  |     |                 |     \--|--|--|-------> 5602                 lw      a2,32(sp)
+20002eac:       |  |  |  |     |  |     |                 |        |  |  |         00003517             auipc   a0,0x3
+20002eb0:       |  |  |  |     |  |     |                 |        |  |  |         21550813             addi    a6,a0,533 # 200060c1 <kDigitsLow>
+20002eb4:       |  |  |  |     |  |     |                 |        |  |  |         47a9                 li      a5,10
+20002eb6:       |  |  |  |     |  |     |                 |        |  |  |         854a                 mv      a0,s2
+20002eb8:       |  |  |  |     |  |     |                 |        |  |  |         85ce                 mv      a1,s3
+20002eba:       |  |  |  |     |  |     |                 |        |  |  |         4681                 li      a3,0
+20002ebc:       |  |  |  |     |  |     |                 |        |  |  |         4701                 li      a4,0
+20002ebe:       |  |  |  |     |  |     |                 |        |  |  |         2451                 jal     20003142 <write_digits>
+20002ec0:       |  |  |  |     |  |     |                 |        |  \--|-------> 9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:493
+  len += out.sink(out.data, "}", as_json ? 1 : 0);
+20002ec2:       |  |  |  |     |  |     |                 |        |     |         00003517             auipc   a0,0x3
+20002ec6:       |  |  |  |     |  |     |                 |        |     |         1fd50593             addi    a1,a0,509 # 200060bf <test_status_set.log_fields.7+0x10f>
+20002eca:       |  |  |  |     |  |     |                 |        |     |         854a                 mv      a0,s2
+20002ecc:       |  |  |  |     |  |     |                 |        |     |         865a                 mv      a2,s6
+20002ece:       |  |  |  |     |  |     |                 |        |     |         9982                 jalr    s3
+20002ed0:       |  |  |  |     |  |     |                 |        |     |         9556                 add     a0,a0,s5
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:723
+      *bytes_written += write_status(out, value, spec.is_nonstd);
+20002ed2:       |  |  |  |     |  |     |                 |        |     |         00ac0ab3             add     s5,s8,a0
+20002ed6:       |  |  |  |     |  |     |                 \--------|-----|-------- bf99                 j       20002e2c <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002ed8:       |  |  |  |     |  |     |                          \-----|-------> 410c                 lw      a1,0(a0)
+20002eda:       |  |  |  |     |  |     |                                |         4601                 li      a2,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002edc:       |  |  |  |     |  |     |                                |     /-> 00c58533             add     a0,a1,a2
+20002ee0:       |  |  |  |     |  |     |                                |     |   00054503             lbu     a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:601
+        ++len;
+20002ee4:       |  |  |  |     |  |     |                                |     |   0605                 addi    a2,a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002ee6:       |  |  |  |     |  |     |                                |     \-- f97d                 bnez    a0,20002edc <base_vfprintf+0x496>
+/proc/self/cwd/sw/device/lib/runtime/print.c:604
+      *bytes_written += out.sink(out.data, value, len);
+20002ee8:       |  |  |  |     |  |     |                                |         167d                 addi    a2,a2,-1
+20002eea:       |  |  |  |     |  +-----|--------------------------------|-------- bf35                 j       20002e26 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:566
+      *bytes_written += out.sink(out.data, "%", 1);
+20002eec:       |  |  |  |     |  |     |                                \-------> 00003517             auipc   a0,0x3
+20002ef0:       |  |  |  |     |  |     |                                          1b750593             addi    a1,a0,439 # 200060a3 <test_status_set.log_fields.7+0xf3>
+20002ef4:       |  |  |  |     |  |     \----------------------------------------> 4605                 li      a2,1
+20002ef6:       |  |  |  |     |  +----------------------------------------------- bf05                 j       20002e26 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:712
+          *bytes_written += out.sink(out.data, "false", 5);
+20002ef8:       |  |  |  |     \--|----------------------------------------------> 00003517             auipc   a0,0x3
+20002efc:       |  |  |  |        |                                                1ba50593             addi    a1,a0,442 # 200060b2 <test_status_set.log_fields.7+0x102>
+20002f00:       |  |  |  |        |                                                4615                 li      a2,5
+20002f02:       |  |  |  |        \----------------------------------------------- b715                 j       20002e26 <base_vfprintf+0x3e0>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:397
+      *bytes_written += out.sink(out.data, kErrorNul, sizeof(kErrorNul));
+20002f04:       |  |  \--|-------------------------------------------------------> 00003517             auipc   a0,0x3
+20002f08:       |  |     |                                                         1cd50593             addi    a1,a0,461 # 200060d1 <kErrorNul>
+20002f0c:       |  |     |                                                         4645                 li      a2,17
+20002f0e:       |  |     |                                                     /-> 854a                 mv      a0,s2
+20002f10:       |  |     |                                                     |   9982                 jalr    s3
+20002f12:       |  |     |                                                     |   9aaa                 add     s5,s5,a0
+20002f14:       |  +-----|-----------------------------------------------------|-- a011                 j       20002f18 <base_vfprintf+0x4d2>
+20002f16:       \--|-----|-----------------------------------------------------|-> 4a81                 li      s5,0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:759
+
+    process_specifier(out, spec, &bytes_written, &args_copy);
+  }
+
+  va_end(args_copy);
+  return bytes_written;
+20002f18:          \-----|-----------------------------------------------------|-> 8556                 mv      a0,s5
+20002f1a:                |                                                     |   40f6                 lw      ra,92(sp)
+20002f1c:                |                                                     |   4466                 lw      s0,88(sp)
+20002f1e:                |                                                     |   44d6                 lw      s1,84(sp)
+20002f20:                |                                                     |   4946                 lw      s2,80(sp)
+20002f22:                |                                                     |   49b6                 lw      s3,76(sp)
+20002f24:                |                                                     |   4a26                 lw      s4,72(sp)
+20002f26:                |                                                     |   4a96                 lw      s5,68(sp)
+20002f28:                |                                                     |   4b06                 lw      s6,64(sp)
+20002f2a:                |                                                     |   5bf2                 lw      s7,60(sp)
+20002f2c:                |                                                     |   5c62                 lw      s8,56(sp)
+20002f2e:                |                                                     |   5cd2                 lw      s9,52(sp)
+20002f30:                |                                                     |   5d42                 lw      s10,48(sp)
+20002f32:                |                                                     |   5db2                 lw      s11,44(sp)
+20002f34:                |                                                     |   6125                 addi    sp,sp,96
+20002f36:                |                                                     |   8082                 ret
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:417
+    *bytes_written += out.sink(out.data, kErrorTooWide, sizeof(kErrorTooWide));
+20002f38:                \-----------------------------------------------------|-> 00003517             auipc   a0,0x3
+20002f3c:                                                                      |   1aa50593             addi    a1,a0,426 # 200060e2 <kErrorTooWide>
+20002f40:                                                                      |   4631                 li      a2,12
+20002f42:                                                                      \-- b7f1                 j       20002f0e <base_vfprintf+0x4c8>
+
+20002f44 <hex_dump>:
+hex_dump():
+/proc/self/cwd/sw/device/lib/runtime/print.c:513
+                       const char *glyphs) {
+20002f44:                 711d                  addi    sp,sp,-96
+20002f46:                 ce86                  sw      ra,92(sp)
+20002f48:                 cca2                  sw      s0,88(sp)
+20002f4a:                 caa6                  sw      s1,84(sp)
+20002f4c:                 c8ca                  sw      s2,80(sp)
+20002f4e:                 c6ce                  sw      s3,76(sp)
+20002f50:                 c4d2                  sw      s4,72(sp)
+20002f52:                 c2d6                  sw      s5,68(sp)
+20002f54:                 c0da                  sw      s6,64(sp)
+20002f56:                 de5e                  sw      s7,60(sp)
+20002f58:                 dc62                  sw      s8,56(sp)
+20002f5a:                 da66                  sw      s9,52(sp)
+20002f5c:                 d86a                  sw      s10,48(sp)
+20002f5e:                 d66e                  sw      s11,44(sp)
+20002f60:                 8bc6                  mv      s7,a7
+20002f62:                 8a42                  mv      s4,a6
+20002f64:                 8b36                  mv      s6,a3
+20002f66:                 8ab2                  mv      s5,a2
+20002f68:                 892e                  mv      s2,a1
+20002f6a:                 89aa                  mv      s3,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:517
+  if (len < width) {
+20002f6c:          /----- 02e6fa63              bgeu    a3,a4,20002fa0 <hex_dump+0x5c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:518
+    width -= len;
+20002f70:          |      41670433              sub     s0,a4,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:519
+    memset(buf, padding, sizeof(buf));
+20002f74:          |      0068                  addi    a0,sp,12
+20002f76:          |      02000613              li      a2,32
+20002f7a:          |      02000c13              li      s8,32
+20002f7e:          |      85be                  mv      a1,a5
+20002f80:          |      1c8010ef              jal     ra,20004148 <memset>
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002f84:          +----- cc11                  beqz    s0,20002fa0 <hex_dump+0x5c>
+20002f86:          |      4d81                  li      s11,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:521
+      size_t to_write = width > ARRAYSIZE(buf) ? 32 : width;
+20002f88:          |  /-> 0b8454b3              minu    s1,s0,s8
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002f8c:          |  |   006c                  addi    a1,sp,12
+20002f8e:          |  |   854e                  mv      a0,s3
+20002f90:          |  |   8626                  mv      a2,s1
+20002f92:          |  |   9902                  jalr    s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:523
+      width -= to_write;
+20002f94:          |  |   8c05                  sub     s0,s0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002f96:          |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002f98:          |  \-- f865                  bnez    s0,20002f88 <hex_dump+0x44>
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20002f9a:          |  /-- 000b1663              bnez    s6,20002fa6 <hex_dump+0x62>
+20002f9e:       /--|--|-- a0ad                  j       20003008 <hex_dump+0xc4>
+20002fa0:       |  \--|-> 4d81                  li      s11,0
+20002fa2:       +-----|-- 060b0363              beqz    s6,20003008 <hex_dump+0xc4>
+20002fa6:       |     \-> 4481                  li      s1,0
+20002fa8:       |         4601                  li      a2,0
+20002faa:       |         1b7d                  addi    s6,s6,-1
+20002fac:       |         00c10c13              addi    s8,sp,12
+20002fb0:       |         02000c93              li      s9,32
+20002fb4:       |         5d7d                  li      s10,-1
+20002fb6:       |  /----> 855a                  mv      a0,s6
+20002fb8:       |  |  /-- 000a1363              bnez    s4,20002fbe <hex_dump+0x7a>
+20002fbc:       |  |  |   8526                  mv      a0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:529
+    buf[buffered] = glyphs[(bytes[idx] >> 4) & 0xf];
+20002fbe:       |  |  \-> 9556                  add     a0,a0,s5
+20002fc0:       |  |      00054503              lbu     a0,0(a0)
+20002fc4:       |  |      00455593              srli    a1,a0,0x4
+20002fc8:       |  |      95de                  add     a1,a1,s7
+20002fca:       |  |      00058583              lb      a1,0(a1)
+20002fce:       |  |      00cc06b3              add     a3,s8,a2
+20002fd2:       |  |      00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+20002fd6:       |  |      893d                  andi    a0,a0,15
+20002fd8:       |  |      955e                  add     a0,a0,s7
+20002fda:       |  |      00050503              lb      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:531
+    buffered += 2;
+20002fde:       |  |      0609                  addi    a2,a2,2
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+20002fe0:       |  |      00a680a3              sb      a0,1(a3)
+20002fe4:       |  |  /-- 01961963              bne     a2,s9,20002ff6 <hex_dump+0xb2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:534
+      bytes_written += out.sink(out.data, buf, buffered);
+20002fe8:       |  |  |   006c                  addi    a1,sp,12
+20002fea:       |  |  |   02000613              li      a2,32
+20002fee:       |  |  |   854e                  mv      a0,s3
+20002ff0:       |  |  |   9902                  jalr    s2
+20002ff2:       |  |  |   4601                  li      a2,0
+20002ff4:       |  |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20002ff6:       |  |  \-> 1b7d                  addi    s6,s6,-1
+20002ff8:       |  |      0485                  addi    s1,s1,1
+20002ffa:       |  \----- fbab1ee3              bne     s6,s10,20002fb6 <hex_dump+0x72>
+/proc/self/cwd/sw/device/lib/runtime/print.c:539
+  if (buffered != 0) {
+20002ffe:       +-------- c609                  beqz    a2,20003008 <hex_dump+0xc4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:540
+    bytes_written += out.sink(out.data, buf, buffered);
+20003000:       |         006c                  addi    a1,sp,12
+20003002:       |         854e                  mv      a0,s3
+20003004:       |         9902                  jalr    s2
+20003006:       |         9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:542
+  return bytes_written;
+20003008:       \-------> 856e                  mv      a0,s11
+2000300a:                 40f6                  lw      ra,92(sp)
+2000300c:                 4466                  lw      s0,88(sp)
+2000300e:                 44d6                  lw      s1,84(sp)
+20003010:                 4946                  lw      s2,80(sp)
+20003012:                 49b6                  lw      s3,76(sp)
+20003014:                 4a26                  lw      s4,72(sp)
+20003016:                 4a96                  lw      s5,68(sp)
+20003018:                 4b06                  lw      s6,64(sp)
+2000301a:                 5bf2                  lw      s7,60(sp)
+2000301c:                 5c62                  lw      s8,56(sp)
+2000301e:                 5cd2                  lw      s9,52(sp)
+20003020:                 5d42                  lw      s10,48(sp)
+20003022:                 5db2                  lw      s11,44(sp)
+20003024:                 6125                  addi    sp,sp,96
+20003026:                 8082                  ret
+
+20003028 <spi_device_send_data>:
+spi_device_send_data():
+/proc/self/cwd/sw/device/lib/runtime/print.c:87
+                                     size_t address) {
+20003028:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:88
+  if (len == 0) {
+2000302a:                       d606                    sw      ra,44(sp)
+2000302c:                       d422                    sw      s0,40(sp)
+2000302e:                       d226                    sw      s1,36(sp)
+20003030:                       d04a                    sw      s2,32(sp)
+20003032:                       ce4e                    sw      s3,28(sp)
+20003034:                       cc52                    sw      s4,24(sp)
+20003036:                       ca56                    sw      s5,20(sp)
+20003038:                       c85a                    sw      s6,16(sp)
+2000303a:       /-------------- c245                    beqz    a2,200030da <spi_device_send_data+0xb2>
+2000303c:       |               84b2                    mv      s1,a2
+2000303e:       |               8a2e                    mv      s4,a1
+20003040:       |               89aa                    mv      s3,a0
+20003042:       |               28b01513                bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/print.c:92
+  size_t space_to_end_of_buffer = kSpiDeviceReadBufferSizeBytes - address;
+20003046:       |               40d50b33                sub     s6,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/print.c:94
+      space_to_end_of_buffer < len ? space_to_end_of_buffer : len;
+2000304a:       |               0acb5ab3                minu    s5,s6,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+2000304e:       |               854e                    mv      a0,s3
+20003050:       |               4581                    li      a1,0
+20003052:       |               8636                    mv      a2,a3
+20003054:       |               86d6                    mv      a3,s5
+20003056:       |               8752                    mv      a4,s4
+20003058:       |               2bad                    jal     200035d2 <dif_spi_device_write_flash_buffer>
+2000305a:       |               c62a                    sw      a0,12(sp)
+2000305c:       |               0028                    addi    a0,sp,8
+2000305e:       |               006c                    addi    a1,sp,12
+20003060:       |               4611                    li      a2,4
+20003062:       |               064010ef                jal     ra,200040c6 <memcpy>
+20003066:       |               4522                    lw      a0,8(sp)
+20003068:       |               00003597                auipc   a1,0x3
+2000306c:       |               0a85a903                lw      s2,168(a1) # 20006110 <MODULE_ID>
+20003070:       |               00153593                seqz    a1,a0
+20003074:       |               15fd                    addi    a1,a1,-1
+20003076:       |               0625f693                andi    a3,a1,98
+2000307a:       |               00003597                auipc   a1,0x3
+2000307e:       |               00b58613                addi    a2,a1,11 # 20006085 <test_status_set.log_fields.7+0xd5>
+20003082:       |               85ca                    mv      a1,s2
+20003084:       |               2a3d                    jal     200031c2 <status_create>
+20003086:       |  /----------- 06054e63                bltz    a0,20003102 <spi_device_send_data+0xda>
+/proc/self/cwd/sw/device/lib/runtime/print.c:101
+  if (first_part_size < len) {
+2000308a:       |  |        /-- 029b7e63                bgeu    s6,s1,200030c6 <spi_device_send_data+0x9e>
+/proc/self/cwd/sw/device/lib/runtime/print.c:102
+    size_t second_part_size = len - first_part_size;
+2000308e:       |  |        |   415486b3                sub     a3,s1,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+20003092:       |  |        |   015a0733                add     a4,s4,s5
+20003096:       |  |        |   854e                    mv      a0,s3
+20003098:       |  |        |   4581                    li      a1,0
+2000309a:       |  |        |   4601                    li      a2,0
+2000309c:       |  |        |   2b1d                    jal     200035d2 <dif_spi_device_write_flash_buffer>
+2000309e:       |  |        |   c62a                    sw      a0,12(sp)
+200030a0:       |  |        |   0028                    addi    a0,sp,8
+200030a2:       |  |        |   006c                    addi    a1,sp,12
+200030a4:       |  |        |   4611                    li      a2,4
+200030a6:       |  |        |   020010ef                jal     ra,200040c6 <memcpy>
+200030aa:       |  |        |   4522                    lw      a0,8(sp)
+200030ac:       |  |        |   00153593                seqz    a1,a0
+200030b0:       |  |        |   15fd                    addi    a1,a1,-1
+200030b2:       |  |        |   0695f693                andi    a3,a1,105
+200030b6:       |  |        |   00003597                auipc   a1,0x3
+200030ba:       |  |        |   fcf58613                addi    a2,a1,-49 # 20006085 <test_status_set.log_fields.7+0xd5>
+200030be:       |  |        |   85ca                    mv      a1,s2
+200030c0:       |  |        |   2209                    jal     200031c2 <status_create>
+200030c2:       |  |     /--|-- 04054963                bltz    a0,20003114 <spi_device_send_data+0xec>
+/proc/self/cwd/sw/device/lib/runtime/print.c:108
+  return OK_STATUS();
+200030c6:       |  |     |  \-> 00003517                auipc   a0,0x3
+200030ca:       |  |     |      fbf50613                addi    a2,a0,-65 # 20006085 <test_status_set.log_fields.7+0xd5>
+200030ce:       |  |     |      4501                    li      a0,0
+200030d0:       |  |     |      85ca                    mv      a1,s2
+200030d2:       |  |     |      4681                    li      a3,0
+200030d4:       |  |     |      20fd                    jal     200031c2 <status_create>
+200030d6:       |  |     |      842a                    mv      s0,a0
+200030d8:       |  |  /--|----- a891                    j       2000312c <spi_device_send_data+0x104>
+/proc/self/cwd/sw/device/lib/runtime/print.c:89
+    return OK_STATUS();
+200030da:       \--|--|--|----> 00003517                auipc   a0,0x3
+200030de:          |  |  |      03652583                lw      a1,54(a0) # 20006110 <MODULE_ID>
+200030e2:          |  |  |      00003517                auipc   a0,0x3
+200030e6:          |  |  |      fa350613                addi    a2,a0,-93 # 20006085 <test_status_set.log_fields.7+0xd5>
+200030ea:          |  |  |      4501                    li      a0,0
+200030ec:          |  |  |      4681                    li      a3,0
+200030ee:          |  |  |      50b2                    lw      ra,44(sp)
+200030f0:          |  |  |      5422                    lw      s0,40(sp)
+200030f2:          |  |  |      5492                    lw      s1,36(sp)
+200030f4:          |  |  |      5902                    lw      s2,32(sp)
+200030f6:          |  |  |      49f2                    lw      s3,28(sp)
+200030f8:          |  |  |      4a62                    lw      s4,24(sp)
+200030fa:          |  |  |      4ad2                    lw      s5,20(sp)
+200030fc:          |  |  |      4b42                    lw      s6,16(sp)
+200030fe:          |  |  |      6145                    addi    sp,sp,48
+20003100:          |  |  |      a0c9                    j       200031c2 <status_create>
+20003102:          \--|--|----> 842a                    mv      s0,a0
+20003104:             |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+20003106:             |  |      00003597                auipc   a1,0x3
+2000310a:             |  |      f7f58613                addi    a2,a1,-129 # 20006085 <test_status_set.log_fields.7+0xd5>
+2000310e:             |  |      06200693                li      a3,98
+20003112:             |  |  /-- a809                    j       20003124 <spi_device_send_data+0xfc>
+20003114:             |  \--|-> 842a                    mv      s0,a0
+20003116:             |     |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+20003118:             |     |   00003597                auipc   a1,0x3
+2000311c:             |     |   f6d58613                addi    a2,a1,-147 # 20006085 <test_status_set.log_fields.7+0xd5>
+20003120:             |     |   06900693                li      a3,105
+20003124:             |     \-> 85ca                    mv      a1,s2
+20003126:             |         2871                    jal     200031c2 <status_create>
+20003128:             |         9dbfd0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/runtime/print.c:109
+}
+2000312c:             \-------> 8522                    mv      a0,s0
+2000312e:                       50b2                    lw      ra,44(sp)
+20003130:                       5422                    lw      s0,40(sp)
+20003132:                       5492                    lw      s1,36(sp)
+20003134:                       5902                    lw      s2,32(sp)
+20003136:                       49f2                    lw      s3,28(sp)
+20003138:                       4a62                    lw      s4,24(sp)
+2000313a:                       4ad2                    lw      s5,20(sp)
+2000313c:                       4b42                    lw      s6,16(sp)
+2000313e:                       6145                    addi    sp,sp,48
+20003140:                       8082                    ret
+
+20003142 <write_digits>:
+write_digits():
+/proc/self/cwd/sw/device/lib/runtime/print.c:439
+                           char padding, uint32_t base, const char *glyphs) {
+20003142:                       7179                    addi    sp,sp,-48
+20003144:                       d606                    sw      ra,44(sp)
+20003146:                       88ae                    mv      a7,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:446
+  if (value == 0) {
+20003148:       /-------------- ce0d                    beqz    a2,20003182 <write_digits+0x40>
+2000314a:       |               4e01                    li      t3,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+2000314c:       |               02b10293                addi    t0,sp,43
+20003150:       |           /-> 8332                    mv      t1,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:452
+    value /= base;
+20003152:       |           |   02f65633                divu    a2,a2,a5
+20003156:       |           |   02f603b3                mul     t2,a2,a5
+2000315a:       |           |   006805b3                add     a1,a6,t1
+/proc/self/cwd/sw/device/lib/runtime/print.c:453
+    buffer[kWordBits - 1 - len] = glyphs[digit];
+2000315e:       |           |   407585b3                sub     a1,a1,t2
+20003162:       |           |   00058383                lb      t2,0(a1)
+20003166:       |           |   01c285b3                add     a1,t0,t3
+2000316a:       |           |   00758023                sb      t2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+2000316e:       |           |   1e7d                    addi    t3,t3,-1
+20003170:       |           \-- fef370e3                bgeu    t1,a5,20003150 <write_digits+0xe>
+/proc/self/cwd/sw/device/lib/runtime/print.c:456
+  width = width == 0 ? 1 : width;
+20003174:       |               41c00633                neg     a2,t3
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+20003178:       |        /----- ea99                    bnez    a3,2000318e <write_digits+0x4c>
+2000317a:       |        |  /-> 4585                    li      a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+2000317c:       |     /--|--|-- 00b66f63                bltu    a2,a1,2000319a <write_digits+0x58>
+20003180:       |  /--|--|--|-- a80d                    j       200031b2 <write_digits+0x70>
+/proc/self/cwd/sw/device/lib/runtime/print.c:447
+    buffer[kWordBits - 1] = glyphs[0];
+20003182:       \--|--|--|--|-> 00080583                lb      a1,0(a6)
+20003186:          |  |  |  |   02b105a3                sb      a1,43(sp)
+2000318a:          |  |  |  |   4605                    li      a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+2000318c:          |  |  |  \-- d6fd                    beqz    a3,2000317a <write_digits+0x38>
+2000318e:          |  |  \----> 02000593                li      a1,32
+20003192:          |  |         0ab6d5b3                minu    a1,a3,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+20003196:          +--|-------- 00b67e63                bgeu    a2,a1,200031b2 <write_digits+0x70>
+2000319a:          |  \-------> 40c586b3                sub     a3,a1,a2
+2000319e:          |            007c                    addi    a5,sp,12
+200031a0:          |            40c78633                sub     a2,a5,a2
+200031a4:          |            067d                    addi    a2,a2,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:459
+    buffer[kWordBits - len - 1] = padding;
+200031a6:          |        /-> 00e60023                sb      a4,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+200031aa:          |        |   16fd                    addi    a3,a3,-1
+200031ac:          |        |   167d                    addi    a2,a2,-1
+200031ae:          |        \-- fee5                    bnez    a3,200031a6 <write_digits+0x64>
+200031b0:          |            862e                    mv      a2,a1
+200031b2:          \----------> 006c                    addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:462
+  return out.sink(out.data, buffer + (kWordBits - len), len);
+200031b4:                       8d91                    sub     a1,a1,a2
+200031b6:                       02058593                addi    a1,a1,32
+200031ba:                       9882                    jalr    a7
+/proc/self/cwd/sw/device/lib/runtime/print.c:463
+}
+200031bc:                       50b2                    lw      ra,44(sp)
+200031be:                       6145                    addi    sp,sp,48
+200031c0:                       8082                    ret
+
+200031c2 <status_create>:
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:26
+    --f;
+  return f;
+}
+
+status_t status_create(absl_status_t code, uint32_t module_id, const char *file,
+                       int32_t arg) {
+200031c2:                          8836                 mv      a6,a3
+/proc/self/cwd/sw/device/lib/base/status.c:27
+  if (code == kOk) {
+200031c4:                /-------- c121                 beqz    a0,20003204 <status_create+0x42>
+/proc/self/cwd/sw/device/lib/base/status.c:48
+   *  +---+-------+-------+-------+-------------+-------+
+   *
+   * The sign bit is set on all not-Ok statuses, thus proviging a covenient
+   * overloaded return value from functions that may return an error.
+   */
+  if (module_id == 0) {
+200031c6:       /--------|-------- e9cd                 bnez    a1,20003278 <status_create+0xb6>
+200031c8:       |     /--|-------> 8732                 mv      a4,a2
+basename():
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+200031ca:       |     |  |     /-> 00074583             lbu     a1,0(a4)
+/proc/self/cwd/sw/device/lib/base/status.c:18
+    ++f;
+200031ce:       |     |  |     |   0705                 addi    a4,a4,1
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+200031d0:       |     |  |     \-- fded                 bnez    a1,200031ca <status_create+0x8>
+200031d2:       |     |  |         05c00793             li      a5,92
+200031d6:       |     |  |         02f00893             li      a7,47
+200031da:       |     |  |     /-> 85ba                 mv      a1,a4
+/proc/self/cwd/sw/device/lib/base/status.c:20
+  while (f > file && f[-1] != '/' && f[-1] != '\\')
+200031dc:       |     |  |     |   177d                 addi    a4,a4,-1
+200031de:       |     |  |  /--|-- 00e67863             bgeu    a2,a4,200031ee <status_create+0x2c>
+200031e2:       |     |  |  |  |   ffe5c683             lbu     a3,-2(a1)
+200031e6:       |     |  |  +--|-- 00f68463             beq     a3,a5,200031ee <status_create+0x2c>
+200031ea:       |     |  |  |  \-- ff1698e3             bne     a3,a7,200031da <status_create+0x18>
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    // First three characters of the filename.
+    const char *f = basename(file);
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+200031ee:       |     |  |  \----> fff5c603             lbu     a2,-1(a1)
+200031f2:       |     |  |         0e067693             andi    a3,a2,224
+200031f6:       |     |  |         04000713             li      a4,64
+200031fa:       |     |  |     /-- 00e69b63             bne     a3,a4,20003210 <status_create+0x4e>
+200031fe:       |     |  |     |   fc060613             addi    a2,a2,-64
+20003202:       |     |  |  /--|-- a839                 j       20003220 <status_create+0x5e>
+/proc/self/cwd/sw/device/lib/base/status.c:28
+    if (arg >= 0) {
+20003204:       |  /--|--\--|--|-X 08085263             bgez    a6,20003288 <status_create+0xc6>
+20003208:       |  |  |     |  |   02100813             li      a6,33
+2000320c:       +--|--|-----|--|-- e5b5                 bnez    a1,20003278 <status_create+0xb6>
+2000320e:       |  |  \-----|--|-- bf6d                 j       200031c8 <status_create+0x6>
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+20003210:       |  |        |  \-> fa060613             addi    a2,a2,-96
+20003214:       |  |        |      0ff67693             andi    a3,a2,255
+20003218:       |  |        |      476d                 li      a4,27
+2000321a:       |  |        +----- 00e6e363             bltu    a3,a4,20003220 <status_create+0x5e>
+2000321e:       |  |        |      467d                 li      a2,31
+20003220:       |  |        \----> 0005c683             lbu     a3,0(a1)
+20003224:       |  |               0e06f713             andi    a4,a3,224
+20003228:       |  |               04000793             li      a5,64
+2000322c:       |  |               0642                 slli    a2,a2,0x10
+2000322e:       |  |           /-- 00f71563             bne     a4,a5,20003238 <status_create+0x76>
+20003232:       |  |           |   fc068713             addi    a4,a3,-64
+20003236:       |  |        /--|-- a809                 j       20003248 <status_create+0x86>
+20003238:       |  |        |  \-> fa068713             addi    a4,a3,-96
+2000323c:       |  |        |      0ff77693             andi    a3,a4,255
+20003240:       |  |        |      47ed                 li      a5,27
+20003242:       |  |        +----- 00f6e363             bltu    a3,a5,20003248 <status_create+0x86>
+20003246:       |  |        |      477d                 li      a4,31
+20003248:       |  |        \----> 0015c683             lbu     a3,1(a1)
+2000324c:       |  |               01571593             slli    a1,a4,0x15
+20003250:       |  |               0e06f713             andi    a4,a3,224
+20003254:       |  |               04000793             li      a5,64
+20003258:       |  |               8dd1                 or      a1,a1,a2
+2000325a:       |  |           /-- 00f71563             bne     a4,a5,20003264 <status_create+0xa2>
+2000325e:       |  |           |   fc068613             addi    a2,a3,-64
+20003262:       |  |        /--|-- a809                 j       20003274 <status_create+0xb2>
+20003264:       |  |        |  \-> fa068613             addi    a2,a3,-96
+20003268:       |  |        |      0ff67693             andi    a3,a2,255
+2000326c:       |  |        |      476d                 li      a4,27
+2000326e:       |  |        +----- 00e6e363             bltu    a3,a4,20003274 <status_create+0xb2>
+20003272:       |  |        |      467d                 li      a2,31
+20003274:       |  |        \----> 066a                 slli    a2,a2,0x1a
+20003276:       |  |               8dd1                 or      a1,a1,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+20003278:       \--|-------------> 897d                 andi    a0,a0,31
+2000327a:          |               0856                 slli    a6,a6,0x15
+2000327c:          |               01085613             srli    a2,a6,0x10
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:57
+  }
+  // At this point, the module_id is already packed into the correct bitfield.
+  return (status_t){
+      .value = (int32_t)(module_id |
+                         bitfield_bit32_write(0, STATUS_BIT_ERROR, true) |
+                         bitfield_field32_write(0, STATUS_FIELD_CODE, code) |
+20003280:          |               8d4d                 or      a0,a0,a1
+20003282:          |               8d51                 or      a0,a0,a2
+20003284:          |               29f51813             bseti   a6,a0,0x1f
+/proc/self/cwd/sw/device/lib/base/status.c:60
+                         bitfield_field32_write(0, STATUS_FIELD_ARG,
+                                                (uint32_t)arg))};
+}
+20003288:          \-------------> 8542                 mv      a0,a6
+2000328a:                          8082                 ret
+
+2000328c <status_extract>:
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000328c:              00052713                 slti    a4,a0,0
+20003290:              00174713                 xori    a4,a4,1
+20003294:              01f57813                 andi    a6,a0,31
+20003298:              00183793                 seqz    a5,a6
+2000329c:              00f768b3                 or      a7,a4,a5
+200032a0:              02000793                 li      a5,32
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:103
+    "ErrorError",
+};
+
+bool status_extract(status_t s, const char **code, int32_t *arg, char *mod_id) {
+  size_t err = (size_t)status_err(s);
+  if (s.value < 0 && err == 0) {
+200032a4:          /-- 00089363                 bnez    a7,200032aa <status_extract+0x1e>
+200032a8:          |   87c2                     mv      a5,a6
+200032aa:          \-> 177d                     addi    a4,a4,-1
+200032ac:              8f7d                     and     a4,a4,a5
+/proc/self/cwd/sw/device/lib/base/status.c:106
+    err = sizeof(status_codes) / sizeof(status_codes[0]) - 1;
+  }
+  *code = status_codes[err];
+200032ae:              effff797                 auipc   a5,0xeffff
+200032b2:              d3a78793                 addi    a5,a5,-710 # 10001fe8 <status_codes>
+200032b6:              20f747b3                 sh2add  a5,a4,a5
+200032ba:              439c                     lw      a5,0(a5)
+200032bc:              c19c                     sw      a5,0(a1)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+200032be:       /----- cb15                     beqz    a4,200032f2 <status_extract+0x66>
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+200032c0:       |      01051593                 slli    a1,a0,0x10
+200032c4:       |      81d5                     srli    a1,a1,0x15
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:108
+    *arg = (int32_t)bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_ARG);
+200032c6:       |      c20c                     sw      a1,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:111
+    uint32_t module_id =
+        bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_MODULE_ID);
+    *mod_id++ = '@' + ((module_id >> 0) & 0x1F);
+200032c8:       |      00b51593                 slli    a1,a0,0xb
+200032cc:       |      81ed                     srli    a1,a1,0x1b
+200032ce:       |      04058593                 addi    a1,a1,64
+200032d2:       |      00b68023                 sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:112
+    *mod_id++ = '@' + ((module_id >> 5) & 0x1F);
+200032d6:       |      00651593                 slli    a1,a0,0x6
+200032da:       |      81ed                     srli    a1,a1,0x1b
+200032dc:       |      04058593                 addi    a1,a1,64
+200032e0:       |      00b680a3                 sb      a1,1(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:113
+    *mod_id++ = '@' + ((module_id >> 10) & 0x1F);
+200032e4:       |      0506                     slli    a0,a0,0x1
+200032e6:       |      816d                     srli    a0,a0,0x1b
+200032e8:       |      04050513                 addi    a0,a0,64
+200032ec:       |      00a68123                 sb      a0,2(a3)
+200032f0:       |  /-- a011                     j       200032f4 <status_extract+0x68>
+/proc/self/cwd/sw/device/lib/base/status.c:116
+    return true;
+  } else {
+    *arg = s.value;
+200032f2:       \--|-> c208                     sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+200032f4:          \-> 00e03533                 snez    a0,a4
+/proc/self/cwd/sw/device/lib/base/status.c:119
+    return false;
+  }
+}
+200032f8:              8082                     ret
+
+200032fa <dif_spi_device_init>:
+dif_spi_device_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:19
+#include "spi_device_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_init(mmio_region_t base_addr,
+                                 dif_spi_device_t *spi_device) {
+  if (spi_device == NULL) {
+200032fa:       /----- c581                     beqz    a1,20003302 <dif_spi_device_init+0x8>
+200032fc:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:23
+    return kDifBadArg;
+  }
+
+  spi_device->base_addr = base_addr;
+200032fe:       |      c188                     sw      a0,0(a1)
+20003300:       |  /-- a011                     j       20003304 <dif_spi_device_init+0xa>
+20003302:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:26
+
+  return kDifOk;
+}
+20003304:          \-> 8532                     mv      a0,a2
+20003306:              8082                     ret
+
+20003308 <dif_spi_device_irq_is_pending>:
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:139
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_is_pending(const dif_spi_device_t *spi_device,
+                                           dif_spi_device_irq_t irq,
+                                           bool *is_pending) {
+  if (spi_device == NULL || is_pending == NULL) {
+20003308:           00153693            seqz    a3,a0
+2000330c:           00163713            seqz    a4,a2
+20003310:           8ed9                        or      a3,a3,a4
+20003312:           0085b713            sltiu   a4,a1,8
+20003316:           00174713            xori    a4,a4,1
+2000331a:           8f55                        or      a4,a4,a3
+2000331c:           468d                        li      a3,3
+2000331e:       /-- eb01                        bnez    a4,2000332e <dif_spi_device_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:148
+  bitfield_bit32_index_t index;
+  if (!spi_device_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+20003320:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003322:       |   4108                        lw      a0,0(a0)
+20003324:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+20003326:       |   48b55533            bext    a0,a0,a1
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:151
+      spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+2000332a:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:154
+
+  return kDifOk;
+}
+2000332e:       \-> 8536                        mv      a0,a3
+20003330:           8082                        ret
+
+20003332 <dif_spi_device_irq_acknowledge>:
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:173
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_acknowledge(const dif_spi_device_t *spi_device,
+                                            dif_spi_device_irq_t irq) {
+  if (spi_device == NULL) {
+20003332:           00a03633            snez    a2,a0
+20003336:           0085b693            sltiu   a3,a1,8
+2000333a:           8ef1                        and     a3,a3,a2
+2000333c:           460d                        li      a2,3
+2000333e:       /-- c691                        beqz    a3,2000334a <dif_spi_device_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:184
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(spi_device->base_addr,
+20003340:       |   4108                        lw      a0,0(a0)
+20003342:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003344:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003348:       |   c10c                        sw      a1,0(a0)
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:189
+                      (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET,
+                      intr_state_reg);
+
+  return kDifOk;
+}
+2000334a:       \-> 8532                        mv      a0,a2
+2000334c:           8082                        ret
+
+2000334e <dif_spi_device_init_handle>:
+dif_spi_device_init_handle():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:77
+  return -1u;
+}
+
+dif_result_t dif_spi_device_init_handle(mmio_region_t base_addr,
+                                        dif_spi_device_handle_t *spi) {
+  if (spi == NULL) {
+2000334e:       /-- c191                        beqz    a1,20003352 <dif_spi_device_init_handle+0x4>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:80
+    return kDifBadArg;
+  }
+  return dif_spi_device_init(base_addr, &spi->dev);
+20003350:       |   b76d                        j       200032fa <dif_spi_device_init>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:81
+}
+20003352:       \-> 450d                        li      a0,3
+20003354:           8082                        ret
+
+20003356 <dif_spi_device_configure>:
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:84
+
+dif_result_t dif_spi_device_configure(dif_spi_device_handle_t *spi,
+                                      dif_spi_device_config_t config) {
+20003356:           460d                        li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:85
+  if (spi == NULL) {
+20003358:       /-- c129                        beqz    a0,2000339a <dif_spi_device_configure+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:89
+    return kDifBadArg;
+  }
+
+  uint32_t device_mode = extract_mode_from_config(config);
+2000335a:       |   4594                        lw      a3,8(a1)
+2000335c:       |   4709                        li      a4,2
+extract_mode_from_config():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:62
+  switch (config.device_mode) {
+2000335e:       +-- 02d76e63            bltu    a4,a3,2000339a <dif_spi_device_configure+0x44>
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:94
+  if (device_mode == -1u) {
+    return kDifBadArg;
+  }
+
+  uint32_t device_config = build_control_word(config);
+20003362:       |   4190                        lw      a2,0(a1)
+20003364:       |   41d8                        lw      a4,4(a1)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:49
+                             config.tx_order == kDifSpiDeviceBitOrderLsbToMsb);
+20003366:       |   167d                        addi    a2,a2,-1
+20003368:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000336c:       |   060a                        slli    a2,a2,0x2
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+2000336e:       |   177d                        addi    a4,a4,-1
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:95
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CFG_REG_OFFSET,
+20003370:       |   411c                        lw      a5,0(a0)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+20003372:       |   00173713            seqz    a4,a4
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+20003376:       |   070e                        slli    a4,a4,0x3
+20003378:       |   8e59                        or      a2,a2,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000337a:       |   cbd0                        sw      a2,20(a5)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:99
+                      device_config);
+
+  uint32_t control =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET);
+2000337c:       |   4110                        lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000337e:       |   4a18                        lw      a4,16(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003380:       |   fcf77713            andi    a4,a4,-49
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003384:       |   06fa                        slli    a3,a3,0x1e
+20003386:       |   82e9                        srli    a3,a3,0x1a
+20003388:       |   8ed9                        or      a3,a3,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000338a:       |   ca14                        sw      a3,16(a2)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:106
+  control = bitfield_field32_write(control, SPI_DEVICE_CONTROL_MODE_FIELD,
+                                   device_mode);
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET,
+                      control);
+
+  spi->config = config;
+2000338c:       |   4590                        lw      a2,8(a1)
+2000338e:       |   c550                        sw      a2,12(a0)
+20003390:       |   41d0                        lw      a2,4(a1)
+20003392:       |   c510                        sw      a2,8(a0)
+20003394:       |   418c                        lw      a1,0(a1)
+20003396:       |   4601                        li      a2,0
+20003398:       |   c14c                        sw      a1,4(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:108
+  return kDifOk;
+}
+2000339a:       \-> 8532                        mv      a0,a2
+2000339c:           8082                        ret
+
+2000339e <dif_spi_device_get_4b_address_mode>:
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:205
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_4b_address_mode(dif_spi_device_handle_t *spi,
+                                                dif_toggle_t *addr_4b) {
+  if (spi == NULL || addr_4b == NULL) {
+2000339e:           00153613            seqz    a2,a0
+200033a2:           0015b693            seqz    a3,a1
+200033a6:           8ed1                        or      a3,a3,a2
+200033a8:           460d                        li      a2,3
+200033aa:       /-- e691                        bnez    a3,200033b6 <dif_spi_device_get_4b_address_mode+0x18>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:209
+    return kDifBadArg;
+  }
+  uint32_t cfg_reg =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_ADDR_MODE_REG_OFFSET);
+200033ac:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200033ae:       |   5108                        lw      a0,32(a0)
+200033b0:       |   4601                        li      a2,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200033b2:       |   8905                        andi    a0,a0,1
+200033b4:       |   c188                        sw      a0,0(a1)
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:216
+    *addr_4b = kDifToggleEnabled;
+  } else {
+    *addr_4b = kDifToggleDisabled;
+  }
+  return kDifOk;
+}
+200033b6:       \-> 8532                        mv      a0,a2
+200033b8:           8082                        ret
+
+200033ba <dif_spi_device_get_last_read_address>:
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:300
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_last_read_address(dif_spi_device_handle_t *spi,
+                                                  uint32_t *address) {
+  if (spi == NULL || address == NULL) {
+200033ba:           00153613            seqz    a2,a0
+200033be:           0015b693            seqz    a3,a1
+200033c2:           8ed1                        or      a3,a3,a2
+200033c4:           460d                        li      a2,3
+200033c6:       /-- e689                        bnez    a3,200033d0 <dif_spi_device_get_last_read_address+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+    return kDifBadArg;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+200033c8:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200033ca:       |   5148                        lw      a0,36(a0)
+200033cc:       |   4601                        li      a2,0
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+200033ce:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:306
+                                SPI_DEVICE_LAST_READ_ADDR_REG_OFFSET);
+  return kDifOk;
+}
+200033d0:       \-> 8532                        mv      a0,a2
+200033d2:           8082                        ret
+
+200033d4 <dif_spi_device_set_flash_command_slot>:
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:341
+}
+
+dif_result_t dif_spi_device_set_flash_command_slot(
+    dif_spi_device_handle_t *spi, uint8_t slot, dif_toggle_t enable,
+    dif_spi_device_flash_command_t command_info) {
+  if (spi == NULL || slot >= SPI_DEVICE_PARAM_NUM_CMD_INFO ||
+200033d4:                    00153713           seqz    a4,a0
+200033d8:                    0185b793           sltiu   a5,a1,24
+200033dc:                    0017c793           xori    a5,a5,1
+200033e0:                    8f5d                       or      a4,a4,a5
+200033e2:                    00263793           sltiu   a5,a2,2
+200033e6:                    0017c793           xori    a5,a5,1
+200033ea:                    8fd9                       or      a5,a5,a4
+200033ec:                    470d                       li      a4,3
+200033ee:       /----------- e3ed                       bnez    a5,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:348
+    return kDifBadArg;
+  }
+  ptrdiff_t reg_offset =
+      SPI_DEVICE_CMD_INFO_0_REG_OFFSET + slot * sizeof(uint32_t);
+  uint32_t reg_val = 0;
+  if (enable == kDifToggleDisabled) {
+200033f0:       |  /-------- ca79                       beqz    a2,200034c6 <dif_spi_device_set_flash_command_slot+0xf2>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:354
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, false);
+  } else {
+    // Validate command info parameters.
+    uint32_t address_mode;
+    switch (command_info.address_type) {
+200033f2:       |  |         42dc                       lw      a5,4(a3)
+200033f4:       |  |         470d                       li      a4,3
+200033f6:       +--|-------- 0cf76d63           bltu    a4,a5,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:370
+        address_mode = SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_VALUE_ADDR4B;
+        break;
+      default:
+        return kDifBadArg;
+    }
+    if (command_info.dummy_cycles >
+200033fa:       |  |         0086c283           lbu     t0,8(a3)
+200033fe:       |  |         4621                       li      a2,8
+20003400:       +--|-------- 0c566863           bltu    a2,t0,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+        (1u + SPI_DEVICE_CMD_INFO_0_DUMMY_SIZE_0_MASK)) {
+      return kDifBadArg;
+    }
+
+    uint32_t payload_en;
+    switch (command_info.payload_io_type) {
+20003404:       |  |         00c6a383           lw      t2,12(a3)
+20003408:       |  |         4609                       li      a2,2
+2000340a:       |  |     /-- 00764f63           blt     a2,t2,20003428 <dif_spi_device_set_flash_command_slot+0x54>
+2000340e:       |  |     |   881e                       mv      a6,t2
+20003410:       |  |  /--|-- 02038763           beqz    t2,2000343e <dif_spi_device_set_flash_command_slot+0x6a>
+20003414:       |  |  |  |   4605                       li      a2,1
+20003416:       +--|--|--|-- 0ac39d63           bne     t2,a2,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:381
+      case kDifSpiDevicePayloadIoNone:
+        payload_en = 0x0;
+        break;
+      case kDifSpiDevicePayloadIoSingle:
+        if (command_info.payload_dir_to_host) {
+2000341a:       |  |  |  |   0116c603           lbu     a2,17(a3)
+2000341e:       |  |  |  |   6841                       lui     a6,0x10
+20003420:       |  |  +--|-- ce19                       beqz    a2,2000343e <dif_spi_device_set_flash_command_slot+0x6a>
+20003422:       |  |  |  |   00020837           lui     a6,0x20
+20003426:       |  |  +--|-- a821                       j       2000343e <dif_spi_device_set_flash_command_slot+0x6a>
+20003428:       |  |  |  \-> 460d                       li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+    switch (command_info.payload_io_type) {
+2000342a:       |  |  |  /-- 00c38863           beq     t2,a2,2000343a <dif_spi_device_set_flash_command_slot+0x66>
+2000342e:       |  |  |  |   463d                       li      a2,15
+20003430:       +--|--|--|-- 0ac39063           bne     t2,a2,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+20003434:       |  |  |  |   000f0837           lui     a6,0xf0
+20003438:       |  |  +--|-- a019                       j       2000343e <dif_spi_device_set_flash_command_slot+0x6a>
+2000343a:       |  |  |  \-> 00030837           lui     a6,0x30
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:398
+      default:
+        return kDifBadArg;
+    }
+
+    uint32_t read_pipeline_mode;
+    switch (command_info.read_pipeline_mode) {
+2000343e:       |  |  \----> 0146a883           lw      a7,20(a3)
+20003442:       |  |         4609                       li      a2,2
+20003444:       +--|-------- 09166663           bltu    a2,a7,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:416
+      default:
+        return kDifBadArg;
+    }
+
+    // Check for invalid argument combinations.
+    if (command_info.payload_swap_enable &&
+20003448:       |  |         0126c303           lbu     t1,18(a3)
+2000344c:       |  |     /-- 00030963           beqz    t1,2000345e <dif_spi_device_set_flash_command_slot+0x8a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:417
+        (command_info.payload_dir_to_host ||
+20003450:       |  |     |   0116ce03           lbu     t3,17(a3)
+20003454:       |  |     |   0013c613           xori    a2,t2,1
+20003458:       |  |     |   01c66633           or      a2,a2,t3
+2000345c:       +--|-----|-- ea35                       bnez    a2,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:421
+         command_info.payload_io_type != kDifSpiDevicePayloadIoSingle)) {
+      return kDifBadArg;
+    }
+    if (command_info.passthrough_swap_address &&
+2000345e:       |  |     \-> 0106c383           lbu     t2,16(a3)
+20003462:       |  |         00703e33           snez    t3,t2
+20003466:       |  |         0017b613           seqz    a2,a5
+2000346a:       |  |         00ce7633           and     a2,t3,a2
+2000346e:       +--|-------- e22d                       bnez    a2,200034d0 <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:428
+      return kDifBadArg;
+    }
+
+    // Write the command info values.
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_OPCODE_0_FIELD, command_info.opcode);
+20003470:       |  |         0006c603           lbu     a2,0(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003474:       |  |         07fa                       slli    a5,a5,0x1e
+20003476:       |  |         83d9                       srli    a5,a5,0x16
+20003478:       |  |         03aa                       slli    t2,t2,0xa
+2000347a:       |  |         00766633           or      a2,a2,t2
+2000347e:       |  |         8e5d                       or      a2,a2,a5
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:434
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_FIELD, address_mode);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_SWAP_EN_0_BIT,
+                             command_info.passthrough_swap_address);
+    if (command_info.dummy_cycles > 0) {
+20003480:       |  |     /-- 00028963           beqz    t0,20003492 <dif_spi_device_set_flash_command_slot+0xbe>
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+20003484:       |  |     |   12fd                       addi    t0,t0,-1
+20003486:       |  |     |   0072f713           andi    a4,t0,7
+2000348a:       |  |     |   0732                       slli    a4,a4,0xc
+2000348c:       |  |     |   8e59                       or      a2,a2,a4
+2000348e:       |  |     |   28f61613           bseti   a2,a2,0xf
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:445
+    }
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_EN_0_FIELD, payload_en);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_DIR_0_BIT,
+                             command_info.payload_dir_to_host);
+20003492:       |  |     \-> 0116c703           lbu     a4,17(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003496:       |  |         080642b3           pack    t0,a2,zero
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000349a:       |  |         0752                       slli    a4,a4,0x14
+2000349c:       |  |         01076733           or      a4,a4,a6
+200034a0:       |  |         0356                       slli    t1,t1,0x15
+200034a2:       |  |         00676733           or      a4,a4,t1
+bitfield_bit32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:138
+OT_WARN_UNUSED_RESULT
+inline uint32_t bitfield_bit32_write(uint32_t bitfield,
+                                     bitfield_bit32_index_t bit_index,
+                                     bool value) {
+  return bitfield_field32_write(bitfield, bitfield_bit32_to_field32(bit_index),
+                                value ? 0x1u : 0x0u);
+200034a6:       |  |         01868783           lb      a5,24(a3)
+200034aa:       |  |         01968683           lb      a3,25(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034ae:       |  |         08fa                       slli    a7,a7,0x1e
+200034b0:       |  |         0088d613           srli    a2,a7,0x8
+200034b4:       |  |         07e2                       slli    a5,a5,0x18
+200034b6:       |  |         06e6                       slli    a3,a3,0x19
+200034b8:       |  |         8e59                       or      a2,a2,a4
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200034ba:       |  |         00566633           or      a2,a2,t0
+200034be:       |  |         8edd                       or      a3,a3,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034c0:       |  |         8e55                       or      a2,a2,a3
+200034c2:       |  |         29f61613           bseti   a2,a2,0x1f
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:459
+    reg_val = bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_BUSY_0_BIT,
+                                   command_info.set_busy_status);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, true);
+  }
+  mmio_region_write32(spi->dev.base_addr, reg_offset, reg_val);
+200034c6:       |  \-------> 4108                       lw      a0,0(a0)
+200034c8:       |            4701                       li      a4,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200034ca:       |            20a5c533           sh2add  a0,a1,a0
+200034ce:       |            dd70                       sw      a2,124(a0)
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:461
+  return kDifOk;
+}
+200034d0:       \----------> 853a                       mv      a0,a4
+200034d2:                    8082                       ret
+
+200034d4 <dif_spi_device_get_flash_command_fifo_occupancy>:
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:640
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_flash_command_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+200034d4:           00153613            seqz    a2,a0
+200034d8:           0015b693            seqz    a3,a1
+200034dc:           8ed1                        or      a3,a3,a2
+200034de:           460d                        li      a2,3
+200034e0:       /-- e699                        bnez    a3,200034ee <dif_spi_device_get_flash_command_fifo_occupancy+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:643
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+200034e2:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200034e4:       |   5d48                        lw      a0,60(a0)
+200034e6:       |   4601                        li      a2,0
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:645
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+200034e8:       |   897d                        andi    a0,a0,31
+200034ea:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:648
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+200034ee:       \-> 8532                        mv      a0,a2
+200034f0:           8082                        ret
+
+200034f2 <dif_spi_device_get_flash_address_fifo_occupancy>:
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:652
+
+dif_result_t dif_spi_device_get_flash_address_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+200034f2:           00153613            seqz    a2,a0
+200034f6:           0015b693            seqz    a3,a1
+200034fa:           8ed1                        or      a3,a3,a2
+200034fc:           460d                        li      a2,3
+200034fe:       /-- ea81                        bnez    a3,2000350e <dif_spi_device_get_flash_address_fifo_occupancy+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:655
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+20003500:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003502:       |   5d48                        lw      a0,60(a0)
+20003504:       |   4601                        li      a2,0
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:657
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+20003506:       |   054e                        slli    a0,a0,0x13
+20003508:       |   816d                        srli    a0,a0,0x1b
+2000350a:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:660
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+2000350e:       \-> 8532                        mv      a0,a2
+20003510:           8082                        ret
+
+20003512 <dif_spi_device_get_flash_payload_fifo_occupancy>:
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:664
+
+dif_result_t dif_spi_device_get_flash_payload_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint16_t *occupancy, uint32_t *start_offset) {
+  if (spi == NULL || occupancy == NULL || start_offset == NULL) {
+20003512:           00153693            seqz    a3,a0
+20003516:           0015b713            seqz    a4,a1
+2000351a:           8ed9                        or      a3,a3,a4
+2000351c:           00163713            seqz    a4,a2
+20003520:           8f55                        or      a4,a4,a3
+20003522:           468d                        li      a3,3
+20003524:       /-- eb19                        bnez    a4,2000353a <dif_spi_device_get_flash_payload_fifo_occupancy+0x28>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:667
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+20003526:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003528:       |   4128                        lw      a0,64(a0)
+2000352a:       |   4681                        li      a3,0
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:669
+                                        SPI_DEVICE_UPLOAD_STATUS2_REG_OFFSET);
+  *occupancy = (uint16_t)bitfield_field32_read(
+2000352c:       |   1ff57713            andi    a4,a0,511
+20003530:       |   00e59023            sh      a4,0(a1)
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+20003534:       |   0522                        slli    a0,a0,0x8
+20003536:       |   8161                        srli    a0,a0,0x18
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:671
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_DEPTH_FIELD);
+  *start_offset = bitfield_field32_read(
+20003538:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:674
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_START_IDX_FIELD);
+  return kDifOk;
+}
+2000353a:       \-> 8536                        mv      a0,a3
+2000353c:           8082                        ret
+
+2000353e <dif_spi_device_pop_flash_command_fifo>:
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:678
+
+// TODO: Does the IP handle overrun / underrun correctly?
+dif_result_t dif_spi_device_pop_flash_command_fifo(dif_spi_device_handle_t *spi,
+                                                   uint8_t *command) {
+2000353e:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:679
+  if (spi == NULL || command == NULL) {
+20003540:           00153513            seqz    a0,a0
+20003544:           0015b693            seqz    a3,a1
+20003548:           8ec9                        or      a3,a3,a0
+2000354a:           450d                        li      a0,3
+2000354c:       /-- ea99                        bnez    a3,20003562 <dif_spi_device_pop_flash_command_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:682
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+2000354e:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003550:       |   5e48                        lw      a0,60(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+20003552:       |   08057693            andi    a3,a0,128
+20003556:       |   4539                        li      a0,14
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:684
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+20003558:       +-- c689                        beqz    a3,20003562 <dif_spi_device_pop_flash_command_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000355a:       |   4270                        lw      a2,68(a2)
+2000355c:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:690
+                           SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  uint32_t cmd_item = mmio_region_read32(spi->dev.base_addr,
+                                         SPI_DEVICE_UPLOAD_CMDFIFO_REG_OFFSET);
+  *command = (uint8_t)bitfield_field32_read(
+2000355e:       |   00c58023            sb      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:693
+      cmd_item, SPI_DEVICE_UPLOAD_CMDFIFO_DATA_FIELD);
+  return kDifOk;
+}
+20003562:       \-> 8082                        ret
+
+20003564 <dif_spi_device_pop_flash_address_fifo>:
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:696
+
+dif_result_t dif_spi_device_pop_flash_address_fifo(dif_spi_device_handle_t *spi,
+                                                   uint32_t *address) {
+20003564:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:697
+  if (spi == NULL || address == NULL) {
+20003566:           00153513            seqz    a0,a0
+2000356a:           0015b693            seqz    a3,a1
+2000356e:           8ec9                        or      a3,a3,a0
+20003570:           450d                        li      a0,3
+20003572:       /-- ea99                        bnez    a3,20003588 <dif_spi_device_pop_flash_address_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:700
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+20003574:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003576:       |   5e48                        lw      a0,60(a2)
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:702
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+20003578:       |   01051693            slli    a3,a0,0x10
+2000357c:       |   4539                        li      a0,14
+2000357e:       +-- 0006d563            bgez    a3,20003588 <dif_spi_device_pop_flash_address_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003582:       |   4630                        lw      a2,72(a2)
+20003584:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:706
+                           SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+20003586:       |   c190                        sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:709
+                                SPI_DEVICE_UPLOAD_ADDRFIFO_REG_OFFSET);
+  return kDifOk;
+}
+20003588:       \-> 8082                        ret
+
+2000358a <dif_spi_device_read_flash_payload_buffer>:
+dif_spi_device_read_flash_payload_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:740
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_read_flash_payload_buffer(
+    dif_spi_device_handle_t *spi, uint32_t offset, size_t length,
+    uint8_t *buf) {
+2000358a:           8732                        mv      a4,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:741
+  if (spi == NULL || buf == NULL) {
+2000358c:           00153613            seqz    a2,a0
+20003590:           0016b793            seqz    a5,a3
+20003594:           8fd1                        or      a5,a5,a2
+20003596:           460d                        li      a2,3
+20003598:       /-- eb9d                        bnez    a5,200035ce <dif_spi_device_read_flash_payload_buffer+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:748
+  }
+  const dif_spi_device_buffer_info_t info = {
+      .buffer_len = kDifSpiDevicePayloadLen,
+      .buffer_offset = kDifSpiDevicePayloadOffset,
+  };
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+2000359a:       |   1005b793            sltiu   a5,a1,256
+2000359e:       |   0017c813            xori    a6,a5,1
+200035a2:       |   10000793            li      a5,256
+200035a6:       |   8f8d                        sub     a5,a5,a1
+200035a8:       |   00e7b7b3            sltu    a5,a5,a4
+200035ac:       |   00f867b3            or      a5,a6,a5
+200035b0:       +-- ef99                        bnez    a5,200035ce <dif_spi_device_read_flash_payload_buffer+0x44>
+200035b2:       |   1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_INGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+200035b4:       |   c606                        sw      ra,12(sp)
+200035b6:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:754
+                               info.buffer_offset + (ptrdiff_t)offset;
+200035b8:       |   78000613            li      a2,1920
+200035bc:       |   20b645b3            sh2add  a1,a2,a1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+200035c0:       |   8636                        mv      a2,a3
+200035c2:       |   86ba                        mv      a3,a4
+200035c4:       |   247000ef            jal     ra,2000400a <mmio_region_memcpy_from_mmio32>
+200035c8:       |   4601                        li      a2,0
+200035ca:       |   40b2                        lw      ra,12(sp)
+200035cc:       |   0141                        addi    sp,sp,16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:758
+                                 buf, length);
+  return kDifOk;
+}
+200035ce:       \-> 8532                        mv      a0,a2
+200035d0:           8082                        ret
+
+200035d2 <dif_spi_device_write_flash_buffer>:
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:763
+
+dif_result_t dif_spi_device_write_flash_buffer(
+    dif_spi_device_handle_t *spi,
+    dif_spi_device_flash_buffer_type_t buffer_type, uint32_t offset,
+    size_t length, const uint8_t *buf) {
+200035d2:           1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:764
+  if (spi == NULL || buf == NULL) {
+200035d4:           c606                        sw      ra,12(sp)
+200035d6:           00153813            seqz    a6,a0
+200035da:           00173793            seqz    a5,a4
+200035de:           00f86833            or      a6,a6,a5
+200035e2:           0035b793            sltiu   a5,a1,3
+200035e6:           0017c793            xori    a5,a5,1
+200035ea:           00f867b3            or      a5,a6,a5
+200035ee:           480d                        li      a6,3
+200035f0:       /-- e7a9                        bnez    a5,2000363a <dif_spi_device_write_flash_buffer+0x68>
+dif_spi_device_get_flash_buffer_info():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:719
+  switch (buffer_type) {
+200035f2:       |   00003797            auipc   a5,0x3
+200035f6:       |   cb678793            addi    a5,a5,-842 # 200062a8 <MODULE_ID+0x198>
+200035fa:       |   20f5c7b3            sh2add  a5,a1,a5
+200035fe:       |   0007a883            lw      a7,0(a5)
+20003602:       |   00003797            auipc   a5,0x3
+20003606:       |   cb278793            addi    a5,a5,-846 # 200062b4 <MODULE_ID+0x1a4>
+2000360a:       |   20f5c5b3            sh2add  a1,a1,a5
+2000360e:       |   0005a283            lw      t0,0(a1)
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:773
+  dif_result_t status =
+      dif_spi_device_get_flash_buffer_info(buffer_type, &info);
+  if (status != kDifOk) {
+    return status;
+  }
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+20003612:       |   9896                        add     a7,a7,t0
+20003614:       |   011637b3            sltu    a5,a2,a7
+20003618:       |   0017c793            xori    a5,a5,1
+2000361c:       |   40c885b3            sub     a1,a7,a2
+20003620:       |   00d5b5b3            sltu    a1,a1,a3
+20003624:       |   8ddd                        or      a1,a1,a5
+20003626:       +-- e991                        bnez    a1,2000363a <dif_spi_device_write_flash_buffer+0x68>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+20003628:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:778
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+2000362a:       |   005605b3            add     a1,a2,t0
+2000362e:       |   6605                        lui     a2,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:779
+                               info.buffer_offset + (ptrdiff_t)offset;
+20003630:       |   95b2                        add     a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+20003632:       |   863a                        mv      a2,a4
+20003634:       |   28f000ef            jal     ra,200040c2 <mmio_region_memcpy_to_mmio32>
+20003638:       |   4801                        li      a6,0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:783
+                               buf, length);
+  return kDifOk;
+}
+2000363a:       \-> 8542                        mv      a0,a6
+2000363c:           40b2                        lw      ra,12(sp)
+2000363e:           0141                        addi    sp,sp,16
+20003640:           8082                        ret
+
+20003642 <dif_spi_device_set_flash_status_registers>:
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:849
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_set_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t value) {
+  if (spi == NULL) {
+20003642:       /-- c509                        beqz    a0,2000364c <dif_spi_device_set_flash_status_registers+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:852
+    return kDifBadArg;
+  }
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_FLASH_STATUS_REG_OFFSET,
+20003644:       |   4110                        lw      a2,0(a0)
+20003646:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003648:       |   d60c                        sw      a1,40(a2)
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:855
+                      value);
+  return kDifOk;
+}
+2000364a:       |   8082                        ret
+2000364c:       \-> 450d                        li      a0,3
+2000364e:           8082                        ret
+
+20003650 <dif_spi_device_get_flash_status_registers>:
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:859
+
+dif_result_t dif_spi_device_get_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t *value) {
+  if (spi == NULL || value == NULL) {
+20003650:           00153613            seqz    a2,a0
+20003654:           0015b693            seqz    a3,a1
+20003658:           8ed1                        or      a3,a3,a2
+2000365a:           460d                        li      a2,3
+2000365c:       /-- e689                        bnez    a3,20003666 <dif_spi_device_get_flash_status_registers+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+    return kDifBadArg;
+  }
+  *value = mmio_region_read32(spi->dev.base_addr,
+2000365e:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003660:       |   5508                        lw      a0,40(a0)
+20003662:       |   4601                        li      a2,0
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+20003664:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:865
+                              SPI_DEVICE_FLASH_STATUS_REG_OFFSET);
+  return kDifOk;
+}
+20003666:       \-> 8532                        mv      a0,a2
+20003668:           8082                        ret
+
+2000366a <dif_uart_init>:
+dif_uart_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:18
+
+#include "uart_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_init(mmio_region_t base_addr, dif_uart_t *uart) {
+  if (uart == NULL) {
+2000366a:       /----- c581                     beqz    a1,20003672 <dif_uart_init+0x8>
+2000366c:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:22
+    return kDifBadArg;
+  }
+
+  uart->base_addr = base_addr;
+2000366e:       |      c188                     sw      a0,0(a1)
+20003670:       |  /-- a011                     j       20003674 <dif_uart_init+0xa>
+20003672:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:25
+
+  return kDifOk;
+}
+20003674:          \-> 8532                     mv      a0,a2
+20003676:              8082                     ret
+
+20003678 <dif_uart_irq_is_pending>:
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:136
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_is_pending(const dif_uart_t *uart, dif_uart_irq_t irq,
+                                     bool *is_pending) {
+  if (uart == NULL || is_pending == NULL) {
+20003678:           00153693            seqz    a3,a0
+2000367c:           00163713            seqz    a4,a2
+20003680:           8ed9                        or      a3,a3,a4
+20003682:           0095b713            sltiu   a4,a1,9
+20003686:           00174713            xori    a4,a4,1
+2000368a:           8f55                        or      a4,a4,a3
+2000368c:           468d                        li      a3,3
+2000368e:       /-- eb01                        bnez    a4,2000369e <dif_uart_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:145
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+20003690:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003692:       |   4108                        lw      a0,0(a0)
+20003694:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+20003696:       |   48b55533            bext    a0,a0,a1
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:148
+      uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+2000369a:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:151
+
+  return kDifOk;
+}
+2000369e:       \-> 8536                        mv      a0,a3
+200036a0:           8082                        ret
+
+200036a2 <dif_uart_irq_acknowledge>:
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:169
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_acknowledge(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq) {
+  if (uart == NULL) {
+200036a2:           00a03633            snez    a2,a0
+200036a6:           0095b693            sltiu   a3,a1,9
+200036aa:           8ef1                        and     a3,a3,a2
+200036ac:           460d                        li      a2,3
+200036ae:       /-- c691                        beqz    a3,200036ba <dif_uart_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:180
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET,
+200036b0:       |   4108                        lw      a0,0(a0)
+200036b2:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200036b4:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200036b8:       |   c10c                        sw      a1,0(a0)
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:184
+                      intr_state_reg);
+
+  return kDifOk;
+}
+200036ba:       \-> 8532                        mv      a0,a2
+200036bc:           8082                        ret
+
+200036be <dif_uart_irq_set_enabled>:
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:229
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_set_enabled(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq, dif_toggle_t state) {
+  if (uart == NULL) {
+200036be:           00a036b3            snez    a3,a0
+200036c2:           0095b713            sltiu   a4,a1,9
+200036c6:           8f75                        and     a4,a4,a3
+200036c8:           468d                        li      a3,3
+200036ca:       /-- cf09                        beqz    a4,200036e4 <dif_uart_irq_set_enabled+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:238
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_enable_reg = mmio_region_read32(
+200036cc:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200036ce:       |   4158                        lw      a4,4(a0)
+200036d0:       |   4681                        li      a3,0
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:241
+      uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+
+  bool enable_bit = (state == kDifToggleEnabled) ? true : false;
+200036d2:       |   167d                        addi    a2,a2,-1
+200036d4:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+200036d8:       |   48b71733            bclr    a4,a4,a1
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200036dc:       |   00b615b3            sll     a1,a2,a1
+200036e0:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200036e2:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:247
+  intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      intr_enable_reg);
+
+  return kDifOk;
+}
+200036e4:       \-> 8536                        mv      a0,a3
+200036e6:           8082                        ret
+
+200036e8 <dif_uart_irq_disable_all>:
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:252
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_disable_all(
+    const dif_uart_t *uart, dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL) {
+200036e8:       /----- c911                     beqz    a0,200036fc <dif_uart_irq_disable_all+0x14>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:257
+    return kDifBadArg;
+  }
+
+  // Pass the current interrupt state to the caller, if requested.
+  if (snapshot != NULL) {
+200036ea:       |  /-- c581                     beqz    a1,200036f2 <dif_uart_irq_disable_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+    *snapshot = mmio_region_read32(uart->base_addr,
+200036ec:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200036ee:       |  |   4250                     lw      a2,4(a2)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+200036f0:       |  |   c190                     sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:263
+                                   (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+  }
+
+  // Disable all interrupts.
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+200036f2:       |  \-> 410c                     lw      a1,0(a0)
+200036f4:       |      4501                     li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200036f6:       |      0005a223                 sw      zero,4(a1)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:267
+                      0u);
+
+  return kDifOk;
+}
+200036fa:       |      8082                     ret
+200036fc:       \----> 450d                     li      a0,3
+200036fe:              8082                     ret
+
+20003700 <dif_uart_irq_restore_all>:
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:272
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_restore_all(
+    const dif_uart_t *uart, const dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL || snapshot == NULL) {
+20003700:           00153613            seqz    a2,a0
+20003704:           0015b693            seqz    a3,a1
+20003708:           8ed1                        or      a3,a3,a2
+2000370a:           460d                        li      a2,3
+2000370c:       /-- e689                        bnez    a3,20003716 <dif_uart_irq_restore_all+0x16>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:277
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      *snapshot);
+2000370e:       |   418c                        lw      a1,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:276
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+20003710:       |   4108                        lw      a0,0(a0)
+20003712:       |   4601                        li      a2,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003714:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:280
+
+  return kDifOk;
+}
+20003716:       \-> 8532                        mv      a0,a2
+20003718:           8082                        ret
+
+2000371a <dif_uart_configure>:
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:92
+
+  return bytes_read;
+}
+
+dif_result_t dif_uart_configure(const dif_uart_t *uart,
+                                dif_uart_config_t config) {
+2000371a:                 1141                  addi    sp,sp,-16
+2000371c:                 c606                  sw      ra,12(sp)
+2000371e:                 c422                  sw      s0,8(sp)
+20003720:                 c226                  sw      s1,4(sp)
+20003722:                 c04a                  sw      s2,0(sp)
+20003724:                 440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+20003726:       /-------- c961                  beqz    a0,200037f6 <dif_uart_configure+0xdc>
+20003728:       |         84ae                  mv      s1,a1
+2000372a:       |         418c                  lw      a1,0(a1)
+2000372c:       +-------- c5e9                  beqz    a1,200037f6 <dif_uart_configure+0xdc>
+2000372e:       |         40d0                  lw      a2,4(s1)
+20003730:       +-------- c279                  beqz    a2,200037f6 <dif_uart_configure+0xdc>
+20003732:       |         892a                  mv      s2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:94
+      !dif_is_valid_toggle(config.tx_enable) ||
+20003734:       |         4894                  lw      a3,16(s1)
+20003736:       |         4505                  li      a0,1
+20003738:       +-------- 0ad56f63              bltu    a0,a3,200037f6 <dif_uart_configure+0xdc>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:95
+      !dif_is_valid_toggle(config.rx_enable)) {
+2000373c:       |         48d4                  lw      a3,20(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+2000373e:       +-------- 0ad56c63              bltu    a0,a3,200037f6 <dif_uart_configure+0xdc>
+20003742:       |         0016e537              lui     a0,0x16e
+20003746:       |         36050513              addi    a0,a0,864 # 16e360 <_ottf_size+0xee360>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:117
+  // 2^4 should be multiplied.
+  // If uart baud rate is 1.5Mbps and IO is 24Mhz, NCO is 0x10000, which is over
+  // the NCO width, use NCO = 0xffff for this case since the error is tolerable.
+  // Refer to #4263
+  uint64_t nco =
+      ((uint64_t)config.baudrate == 1500000 && config.clk_freq_hz == 24000000)
+2000374a:       |         8d2d                  xor     a0,a0,a1
+2000374c:       |         016e36b7              lui     a3,0x16e3
+20003750:       |         60068693              addi    a3,a3,1536 # 16e3600 <_ottf_size+0x1663600>
+20003754:       |         8eb1                  xor     a3,a3,a2
+20003756:       |         8d55                  or      a0,a0,a3
+20003758:       |     /-- e501                  bnez    a0,20003760 <dif_uart_configure+0x46>
+2000375a:       |     |   6541                  lui     a0,0x10
+2000375c:       |     |   157d                  addi    a0,a0,-1
+2000375e:       |  /--|-- a831                  j       2000377a <dif_uart_configure+0x60>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:119
+          ? 0xffff
+          : udiv64_slow((uint64_t)config.baudrate << (nco_width + 4),
+20003760:       |  |  \-> 01459513              slli    a0,a1,0x14
+20003764:       |  |      81b1                  srli    a1,a1,0xc
+20003766:       |  |      4681                  li      a3,0
+20003768:       |  |      4701                  li      a4,0
+2000376a:       |  |      3a9000ef              jal     ra,20004312 <udiv64_slow>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:124
+                        config.clk_freq_hz, NULL);
+  uint32_t nco_masked = nco & UART_CTRL_NCO_MASK;
+
+  // Requested baudrate is too high for the given clock frequency.
+  if (nco != nco_masked) {
+2000376e:       |  |      01055613              srli    a2,a0,0x10
+20003772:       |  |      8dd1                  or      a1,a1,a2
+20003774:       +--|----- e1c9                  bnez    a1,200037f6 <dif_uart_configure+0xdc>
+20003776:       |  |      08054533              pack    a0,a0,zero
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:129
+    return kDifBadArg;
+  }
+
+  // Check requested RXBLVL is within bounds.
+  uint32_t rxblvl = config.rx_break_level;
+2000377a:       |  \----> 4c8c                  lw      a1,24(s1)
+2000377c:       |         440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:130
+  if ((rxblvl & UART_CTRL_RXBLVL_MASK) != rxblvl) {
+2000377e:       +-------- 06b46c63              bltu    s0,a1,200037f6 <dif_uart_configure+0xdc>
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:48
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, 0u);
+20003782:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003786:       |         00062823              sw      zero,16(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:54
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+2000378a:       |         00092603              lw      a2,0(s2)
+2000378e:       |         468d                  li      a3,3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003790:       |         d214                  sw      a3,32(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:56
+  mmio_region_write32(uart->base_addr, UART_OVRD_REG_OFFSET, 0u);
+20003792:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003796:       |         02062423              sw      zero,40(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:57
+  mmio_region_write32(uart->base_addr, UART_TIMEOUT_CTRL_REG_OFFSET, 0u);
+2000379a:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000379e:       |         02062823              sw      zero,48(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:58
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+200037a2:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037a6:       |         00062223              sw      zero,4(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:59
+  mmio_region_write32(uart->base_addr, UART_INTR_STATE_REG_OFFSET,
+200037aa:       |         00092603              lw      a2,0(s2)
+200037ae:       |         56fd                  li      a3,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037b0:       |         c214                  sw      a3,0(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200037b2:       |         0542                  slli    a0,a0,0x10
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+
+  // Set baudrate, enable RX and TX, configure parity.
+  uint32_t reg = 0;
+  reg = bitfield_field32_write(reg, UART_CTRL_NCO_FIELD, nco_masked);
+  reg = bitfield_field32_write(reg, UART_CTRL_RXBLVL_FIELD, rxblvl);
+  if (dif_toggle_to_bool(config.tx_enable)) {
+200037b4:       |         4890                  lw      a2,16(s1)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200037b6:       |         05fa                  slli    a1,a1,0x1e
+200037b8:       |         81d9                  srli    a1,a1,0x16
+200037ba:       |         8d4d                  or      a0,a0,a1
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+ * @param val A dif_toggle_t value.
+ * @return Corresponding bool value.
+ */
+OT_WARN_UNUSED_RESULT
+inline bool dif_toggle_to_bool(dif_toggle_t val) {
+  switch (val) {
+200037bc:       |         167d                  addi    a2,a2,-1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+    reg = bitfield_bit32_write(reg, UART_CTRL_TX_BIT, true);
+  }
+  if (dif_toggle_to_bool(config.rx_enable)) {
+200037be:       |         48cc                  lw      a1,20(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+200037c0:       |         00163613              seqz    a2,a2
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+  if (dif_toggle_to_bool(config.tx_enable)) {
+200037c4:       |         8d51                  or      a0,a0,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+    reg = bitfield_bit32_write(reg, UART_CTRL_RX_BIT, true);
+  }
+  if (config.parity_enable == kDifToggleEnabled) {
+200037c6:       |         4490                  lw      a2,8(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+200037c8:       |         15fd                  addi    a1,a1,-1
+200037ca:       |         0015b593              seqz    a1,a1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+200037ce:       |         0586                  slli    a1,a1,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+200037d0:       |         167d                  addi    a2,a2,-1
+200037d2:       |         00163613              seqz    a2,a2
+200037d6:       |         061a                  slli    a2,a2,0x6
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_EN_BIT, true);
+  }
+  if (config.parity == kDifUartParityOdd) {
+200037d8:       |         44d4                  lw      a3,12(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+200037da:       |         8dd1                  or      a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+200037dc:       |         8d4d                  or      a0,a0,a1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:153
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_ODD_BIT, true);
+  }
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, reg);
+200037de:       |         00092583              lw      a1,0(s2)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+  if (config.parity == kDifUartParityOdd) {
+200037e2:       |         0016b613              seqz    a2,a3
+200037e6:       |         061e                  slli    a2,a2,0x7
+200037e8:       |         8d51                  or      a0,a0,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037ea:       |         c988                  sw      a0,16(a1)
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:156
+
+  // Disable interrupts.
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+200037ec:       |         00092503              lw      a0,0(s2)
+200037f0:       |         4401                  li      s0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037f2:       |         00052223              sw      zero,4(a0) # 10004 <_chip_info_end+0x4>
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:159
+
+  return kDifOk;
+}
+200037f6:       \-------> 8522                  mv      a0,s0
+200037f8:                 40b2                  lw      ra,12(sp)
+200037fa:                 4422                  lw      s0,8(sp)
+200037fc:                 4492                  lw      s1,4(sp)
+200037fe:                 4902                  lw      s2,0(sp)
+20003800:                 0141                  addi    sp,sp,16
+20003802:                 8082                  ret
+
+20003804 <dif_uart_watermark_rx_set>:
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:176
+  return kDifOk;
+}
+
+dif_result_t dif_uart_watermark_rx_set(const dif_uart_t *uart,
+                                       dif_uart_watermark_t watermark) {
+  if (uart == NULL) {
+20003804:       /----- cd19                     beqz    a0,20003822 <dif_uart_watermark_rx_set+0x1e>
+20003806:       |      862a                     mv      a2,a0
+20003808:       |      4699                     li      a3,6
+2000380a:       |      4535                     li      a0,13
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:183
+  }
+
+  // Check if the requested watermark is valid, and get a corresponding
+  // register definition to be written.
+  uint32_t value;
+  switch (watermark) {
+2000380c:       |  /-- 00b6ea63                 bltu    a3,a1,20003820 <dif_uart_watermark_rx_set+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:210
+    default:
+      return kDifError;
+  }
+
+  // Set watermark level.
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET);
+20003810:       |  |   4210                     lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003812:       |  |   5214                     lw      a3,32(a2)
+20003814:       |  |   4501                     li      a0,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003816:       |  |   9a8d                     andi    a3,a3,-29
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003818:       |  |   058a                     slli    a1,a1,0x2
+2000381a:       |  |   89f1                     andi    a1,a1,28
+2000381c:       |  |   8dd5                     or      a1,a1,a3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000381e:       |  |   d20c                     sw      a1,32(a2)
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:215
+  reg = bitfield_field32_write(reg, UART_FIFO_CTRL_RXILVL_FIELD, value);
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+
+  return kDifOk;
+}
+20003820:       |  \-> 8082                     ret
+20003822:       \----> 450d                     li      a0,3
+20003824:              8082                     ret
+
+20003826 <dif_uart_bytes_send>:
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:291
+}
+
+dif_result_t dif_uart_bytes_send(const dif_uart_t *uart, const uint8_t *data,
+                                 size_t bytes_requested,
+                                 size_t *bytes_written) {
+  if (uart == NULL || data == NULL) {
+20003826:                 00153713              seqz    a4,a0
+2000382a:                 0015b793              seqz    a5,a1
+2000382e:                 8fd9                  or      a5,a5,a4
+20003830:                 470d                  li      a4,3
+20003832:       /-------- e795                  bnez    a5,2000385e <dif_uart_bytes_send+0x38>
+20003834:       |         4781                  li      a5,0
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003836:       |  /----- c20d                  beqz    a2,20003858 <dif_uart_bytes_send+0x32>
+uart_tx_full():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:22
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_STATUS_REG_OFFSET);
+20003838:       |  |  /-> 00052803              lw      a6,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000383c:       |  |  |   01482703              lw      a4,20(a6)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+20003840:       |  |  |   8b05                  andi    a4,a4,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003842:       |  +--|-- eb19                  bnez    a4,20003858 <dif_uart_bytes_send+0x32>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:70
+    uart_tx_fifo_write(uart, data[bytes_written]);
+20003844:       |  |  |   00f58733              add     a4,a1,a5
+20003848:       |  |  |   00074703              lbu     a4,0(a4)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:71
+    ++bytes_written;
+2000384c:       |  |  |   0785                  addi    a5,a5,1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000384e:       |  |  |   00e82e23              sw      a4,28(a6)
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003852:       |  |  \-- fef613e3              bne     a2,a5,20003838 <dif_uart_bytes_send+0x12>
+20003856:       |  |      87b2                  mv      a5,a2
+20003858:       |  \----> 4701                  li      a4,0
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:297
+    return kDifBadArg;
+  }
+
+  // `bytes_written` is an optional parameter.
+  size_t res = uart_bytes_send(uart, data, bytes_requested);
+  if (bytes_written != NULL) {
+2000385a:       +-------- c291                  beqz    a3,2000385e <dif_uart_bytes_send+0x38>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:298
+    *bytes_written = res;
+2000385c:       |         c29c                  sw      a5,0(a3)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:302
+  }
+
+  return kDifOk;
+}
+2000385e:       \-------> 853a                  mv      a0,a4
+20003860:                 8082                  ret
+
+20003862 <dif_uart_byte_send_polled>:
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:321
+
+  return kDifOk;
+}
+
+dif_result_t dif_uart_byte_send_polled(const dif_uart_t *uart, uint8_t byte) {
+  if (uart == NULL) {
+20003862:       /----- cd19                     beqz    a0,20003880 <dif_uart_byte_send_polled+0x1e>
+20003864:       |      4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003866:       |  /-> 4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+20003868:       |  |   8a85                     andi    a3,a3,1
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:326
+    return kDifBadArg;
+  }
+
+  // Busy wait for the TX FIFO to free up.
+  while (uart_tx_full(uart)) {
+2000386a:       |  \-- fef5                     bnez    a3,20003866 <dif_uart_byte_send_polled+0x4>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000386c:       |      4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+2000386e:       |      8a85                     andi    a3,a3,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003870:       |  /-- e299                     bnez    a3,20003876 <dif_uart_byte_send_polled+0x14>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003872:       |  |   ce4c                     sw      a1,28(a2)
+20003874:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003876:       |  >-> 4a48                     lw      a0,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+20003878:       |  |   8921                     andi    a0,a0,8
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:333
+
+  (void)uart_bytes_send(uart, &byte, 1);
+
+  // Busy wait for the TX FIFO to be drained and for HW to finish processing
+  // the last byte.
+  while (!uart_tx_idle(uart)) {
+2000387a:       |  \-- dd75                     beqz    a0,20003876 <dif_uart_byte_send_polled+0x14>
+2000387c:       |      4501                     li      a0,0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:337
+  }
+
+  return kDifOk;
+}
+2000387e:       |      8082                     ret
+20003880:       \----> 450d                     li      a0,3
+20003882:              8082                     ret
+
+20003884 <dif_uart_byte_receive_polled>:
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:341
+
+dif_result_t dif_uart_byte_receive_polled(const dif_uart_t *uart,
+                                          uint8_t *byte) {
+  if (uart == NULL || byte == NULL) {
+20003884:              00153613                 seqz    a2,a0
+20003888:              0015b693                 seqz    a3,a1
+2000388c:              8ed1                     or      a3,a3,a2
+2000388e:              460d                     li      a2,3
+20003890:       /----- ee99                     bnez    a3,200038ae <dif_uart_byte_receive_polled+0x2a>
+20003892:       |      4108                     lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003894:       |  /-> 4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+20003896:       |  |   02067613                 andi    a2,a2,32
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:346
+    return kDifBadArg;
+  }
+
+  // Busy wait for the RX message in the FIFO.
+  while (uart_rx_empty(uart)) {
+2000389a:       |  \-- fe6d                     bnez    a2,20003894 <dif_uart_byte_receive_polled+0x10>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000389c:       |      4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+2000389e:       |      02067613                 andi    a2,a2,32
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:83
+  while ((bytes_read < bytes_requested) && !uart_rx_empty(uart)) {
+200038a2:       |  /-- e609                     bnez    a2,200038ac <dif_uart_byte_receive_polled+0x28>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038a4:       |  |   4d08                     lw      a0,24(a0)
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:84
+    data[bytes_read] = uart_rx_fifo_read(uart);
+200038a6:       |  |   00a58023                 sb      a0,0(a1)
+200038aa:       +--|-- a011                     j       200038ae <dif_uart_byte_receive_polled+0x2a>
+200038ac:       |  \-> 4601                     li      a2,0
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:352
+  }
+
+  (void)uart_bytes_receive(uart, 1, byte);
+
+  return kDifOk;
+}
+200038ae:       \----> 8532                     mv      a0,a2
+200038b0:              8082                     ret
+
+200038b2 <dif_uart_rx_bytes_available>:
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:356
+
+dif_result_t dif_uart_rx_bytes_available(const dif_uart_t *uart,
+                                         size_t *num_bytes) {
+  if (uart == NULL || num_bytes == NULL) {
+200038b2:           00153613            seqz    a2,a0
+200038b6:           0015b693            seqz    a3,a1
+200038ba:           8ed1                        or      a3,a3,a2
+200038bc:           460d                        li      a2,3
+200038be:       /-- e699                        bnez    a3,200038cc <dif_uart_rx_bytes_available+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:362
+    return kDifBadArg;
+  }
+
+  // RX FIFO fill level (in bytes).
+  uint32_t reg =
+      mmio_region_read32(uart->base_addr, UART_FIFO_STATUS_REG_OFFSET);
+200038c0:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038c2:       |   5148                        lw      a0,36(a0)
+200038c4:       |   4601                        li      a2,0
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+200038c6:       |   0522                        slli    a0,a0,0x8
+200038c8:       |   8161                        srli    a0,a0,0x18
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:363
+  *num_bytes = (size_t)bitfield_field32_read(reg, UART_FIFO_STATUS_RXLVL_FIELD);
+200038ca:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:366
+
+  return kDifOk;
+}
+200038cc:       \-> 8532                        mv      a0,a2
+200038ce:           8082                        ret
+
+200038d0 <xTaskCreate>:
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:734
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask )
+    {
+200038d0:                    7179                       addi    sp,sp,-48
+200038d2:                    d606                       sw      ra,44(sp)
+200038d4:                    d422                       sw      s0,40(sp)
+200038d6:                    d226                       sw      s1,36(sp)
+200038d8:                    d04a                       sw      s2,32(sp)
+200038da:                    ce4e                       sw      s3,28(sp)
+200038dc:                    cc52                       sw      s4,24(sp)
+200038de:                    ca56                       sw      s5,20(sp)
+200038e0:                    c85a                       sw      s6,16(sp)
+200038e2:                    c65e                       sw      s7,12(sp)
+200038e4:                    c462                       sw      s8,8(sp)
+200038e6:                    8abe                       mv      s5,a5
+200038e8:                    893a                       mv      s2,a4
+200038ea:                    89b6                       mv      s3,a3
+200038ec:                    8c32                       mv      s8,a2
+200038ee:                    84ae                       mv      s1,a1
+200038f0:                    8a2a                       mv      s4,a0
+/proc/self/cwd/external/freertos/tasks.c:768
+        #else /* portSTACK_GROWTH */
+            {
+                StackType_t * pxStack;
+
+                /* Allocate space for the stack used by the task being created. */
+                pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+200038f2:                    00261513           slli    a0,a2,0x2
+200038f6:                    2be5                       jal     20003eee <pvPortMalloc>
+200038f8:                    5b7d                       li      s6,-1
+/proc/self/cwd/external/freertos/tasks.c:770
+
+                if( pxStack != NULL )
+200038fa:       /----------- 1a050463           beqz    a0,20003aa2 <xTaskCreate+0x1d2>
+200038fe:       |            842a                       mv      s0,a0
+/proc/self/cwd/external/freertos/tasks.c:773
+                {
+                    /* Allocate space for the TCB. */
+                    pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+20003900:       |            04c00513           li      a0,76
+20003904:       |            23ed                       jal     20003eee <pvPortMalloc>
+/proc/self/cwd/external/freertos/tasks.c:775
+
+                    if( pxNewTCB != NULL )
+20003906:       |  /-------- cd15                       beqz    a0,20003942 <xTaskCreate+0x72>
+20003908:       |  |         8baa                       mv      s7,a0
+/proc/self/cwd/external/freertos/tasks.c:778
+                    {
+                        /* Store the stack location in the TCB. */
+                        pxNewTCB->pxStack = pxStack;
+2000390a:       |  |         d900                       sw      s0,48(a0)
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:860
+     * grows from high memory to low (as per the 80x86) or vice versa.
+     * portSTACK_GROWTH is used to make the result positive or negative as required
+     * by the port. */
+    #if ( portSTACK_GROWTH < 0 )
+        {
+            pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+2000390c:       |  |         208c4533           sh2add  a0,s8,s0
+20003910:       |  |         1571                       addi    a0,a0,-4
+/proc/self/cwd/external/freertos/tasks.c:861
+            pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+20003912:       |  |         ff057b13           andi    s6,a0,-16
+/proc/self/cwd/external/freertos/tasks.c:888
+            pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+        }
+    #endif /* portSTACK_GROWTH */
+
+    /* Store the task name in the TCB. */
+    if( pcName != NULL )
+20003916:       |  |  /----- c88d                       beqz    s1,20003948 <xTaskCreate+0x78>
+/proc/self/cwd/external/freertos/tasks.c:890
+    {
+        for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+20003918:       |  |  |      034b8513           addi    a0,s7,52
+2000391c:       |  |  |      45bd                       li      a1,15
+/proc/self/cwd/external/freertos/tasks.c:892
+        {
+            pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+2000391e:       |  |  |  /-> 00048603           lb      a2,0(s1)
+20003922:       |  |  |  |   00c50023           sb      a2,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:897
+
+            /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+             * configMAX_TASK_NAME_LEN characters just in case the memory after the
+             * string is not accessible (extremely unlikely). */
+            if( pcName[ x ] == ( char ) 0x00 )
+20003926:       |  |  |  |   0004c603           lbu     a2,0(s1)
+2000392a:       |  |  |  |   00163613           seqz    a2,a2
+2000392e:       |  |  |  |   0015b693           seqz    a3,a1
+20003932:       |  |  |  |   8e55                       or      a2,a2,a3
+20003934:       |  |  |  |   15fd                       addi    a1,a1,-1
+20003936:       |  |  |  |   0505                       addi    a0,a0,1
+20003938:       |  |  |  |   0485                       addi    s1,s1,1
+2000393a:       |  |  |  \-- d275                       beqz    a2,2000391e <xTaskCreate+0x4e>
+/proc/self/cwd/external/freertos/tasks.c:909
+            }
+        }
+
+        /* Ensure the name string is terminated in the case that the string length
+         * was greater or equal to configMAX_TASK_NAME_LEN. */
+        pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+2000393c:       |  |  |      040b81a3           sb      zero,67(s7)
+20003940:       |  |  |  /-- a031                       j       2000394c <xTaskCreate+0x7c>
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:784
+                        vPortFreeStack( pxStack );
+20003942:       |  \--|--|-> 8522                       mv      a0,s0
+20003944:       |     |  |   2535                       jal     20003f70 <vPortFree>
+20003946:       +-----|--|-- aab1                       j       20003aa2 <xTaskCreate+0x1d2>
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:915
+    }
+    else
+    {
+        /* The task has not been given a name, so just ensure there is a NULL
+         * terminator when it is read out. */
+        pxNewTCB->pcTaskName[ 0 ] = 0x00;
+20003948:       |     \--|-> 020b8a23           sb      zero,52(s7)
+2000394c:       |        \-> 4511                       li      a0,4
+/proc/self/cwd/external/freertos/tasks.c:921
+    }
+
+    /* This is used as an array index so must ensure it's not too large. */
+    configASSERT( uxPriority < configMAX_PRIORITIES );
+
+    if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+2000394e:       |            0aa95433           minu    s0,s2,a0
+/proc/self/cwd/external/freertos/tasks.c:930
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxNewTCB->uxPriority = uxPriority;
+20003952:       |            028ba623           sw      s0,44(s7)
+/proc/self/cwd/external/freertos/tasks.c:938
+            pxNewTCB->uxBasePriority = uxPriority;
+            pxNewTCB->uxMutexesHeld = 0;
+        }
+    #endif /* configUSE_MUTEXES */
+
+    vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+20003956:       |            004b8913           addi    s2,s7,4
+2000395a:       |            854a                       mv      a0,s2
+2000395c:       |            23ad                       jal     20003ec6 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:939
+    vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+2000395e:       |            018b8513           addi    a0,s7,24
+20003962:       |            2395                       jal     20003ec6 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:943
+
+    /* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+     * back to  the containing TCB from a generic item in a list. */
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+20003964:       |            017ba823           sw      s7,16(s7)
+20003968:       |            4515                       li      a0,5
+/proc/self/cwd/external/freertos/tasks.c:946
+
+    /* Event lists are always in priority order. */
+    listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+2000396a:       |            8d01                       sub     a0,a0,s0
+2000396c:       |            00abac23           sw      a0,24(s7)
+/proc/self/cwd/external/freertos/tasks.c:947
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+20003970:       |            037ba223           sw      s7,36(s7)
+/proc/self/cwd/external/freertos/tasks.c:951
+
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        {
+            pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
+20003974:       |            040ba223           sw      zero,68(s7)
+/proc/self/cwd/external/freertos/tasks.c:1002
+        }
+    #endif
+
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        {
+            pxNewTCB->ucDelayAborted = pdFALSE;
+20003978:       |            040b8423           sb      zero,72(s7)
+/proc/self/cwd/external/freertos/tasks.c:1052
+                        }
+                    #endif /* portSTACK_GROWTH */
+                }
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
+                {
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+2000397c:       |            855a                       mv      a0,s6
+2000397e:       |            85d2                       mv      a1,s4
+20003980:       |            864e                       mv      a2,s3
+20003982:       |            c1bfc0ef           jal     ra,2000059c <pxPortInitialiseStack>
+20003986:       |            00aba023           sw      a0,0(s7)
+/proc/self/cwd/external/freertos/tasks.c:1058
+                }
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
+        }
+    #endif /* portUSING_MPU_WRAPPERS */
+
+    if( pxCreatedTask != NULL )
+2000398a:       |        /-- 000a8463           beqz    s5,20003992 <xTaskCreate+0xc2>
+/proc/self/cwd/external/freertos/tasks.c:1062
+    {
+        /* Pass the handle out in an anonymous way.  The handle can be used to
+         * change the created task's priority, delete the created task, etc.*/
+        *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+2000398e:       |        |   017aa023           sw      s7,0(s5)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskEnterCritical( void )
+    {
+        portDISABLE_INTERRUPTS();
+20003992:       |        \-> 30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+
+        if( xSchedulerRunning != pdFALSE )
+20003996:       |            efffea17           auipc   s4,0xefffe
+2000399a:       |            72aa2503           lw      a0,1834(s4) # 100020c0 <xSchedulerRunning>
+2000399e:       |            efffec17           auipc   s8,0xefffe
+200039a2:       |        /-- c901                       beqz    a0,200039b2 <xTaskCreate+0xe2>
+/proc/self/cwd/external/freertos/tasks.c:4349
+        {
+            ( pxCurrentTCB->uxCriticalNesting )++;
+200039a4:       |        |   70ec2503           lw      a0,1806(s8) # 100020ac <pxCurrentTCB>
+200039a8:       |        |   416c                       lw      a1,68(a0)
+200039aa:       |        |   0585                       addi    a1,a1,1
+200039ac:       |        |   c16c                       sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+             * function so  assert() if it is being called from an interrupt
+             * context.  Only API functions that end in "FromISR" can be used in an
+             * interrupt.  Only assert if the critical nesting count is 1 to
+             * protect against recursive calls if the assert function also uses a
+             * critical section. */
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+200039ae:       |        |   70ec2503           lw      a0,1806(s8)
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1077
+        uxCurrentNumberOfTasks++;
+200039b2:       |        \-> efffe517           auipc   a0,0xefffe
+200039b6:       |            70a52583           lw      a1,1802(a0) # 100020bc <uxCurrentNumberOfTasks>
+200039ba:       |            0585                       addi    a1,a1,1
+200039bc:       |            70b52523           sw      a1,1802(a0)
+/proc/self/cwd/external/freertos/tasks.c:1079
+        if( pxCurrentTCB == NULL )
+200039c0:       |            70ec2583           lw      a1,1806(s8)
+200039c4:       |            effff617           auipc   a2,0xeffff
+200039c8:       |            88c60a93           addi    s5,a2,-1908 # 10002250 <pxReadyTasksLists>
+200039cc:       |        /-- cd91                       beqz    a1,200039e8 <xTaskCreate+0x118>
+/proc/self/cwd/external/freertos/tasks.c:1102
+            if( xSchedulerRunning == pdFALSE )
+200039ce:       |        |   72aa2503           lw      a0,1834(s4)
+200039d2:       |     /--|-- ed25                       bnez    a0,20003a4a <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1104
+                if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+200039d4:       |     |  |   70ec2503           lw      a0,1806(s8)
+200039d8:       |     |  |   5548                       lw      a0,44(a0)
+200039da:       |     |  |   02cba583           lw      a1,44(s7)
+200039de:       |     +--|-- 06a5e663           bltu    a1,a0,20003a4a <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1106
+                    pxCurrentTCB = pxNewTCB;
+200039e2:       |     |  |   717c2723           sw      s7,1806(s8)
+200039e6:       |     +--|-- a095                       j       20003a4a <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1083
+            pxCurrentTCB = pxNewTCB;
+200039e8:       |     |  \-> 717c2723           sw      s7,1806(s8)
+/proc/self/cwd/external/freertos/tasks.c:1085
+            if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+200039ec:       |     |      70a52503           lw      a0,1802(a0)
+200039f0:       |     |      4585                       li      a1,1
+200039f2:       |     +----- 04b51c63           bne     a0,a1,20003a4a <xTaskCreate+0x17a>
+200039f6:       |     |      4495                       li      s1,5
+200039f8:       |     |      8456                       mv      s0,s5
+prvInitialiseTaskLists():
+/proc/self/cwd/external/freertos/tasks.c:3665
+        vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+200039fa:       |     |  /-> 8522                       mv      a0,s0
+200039fc:       |     |  |   295d                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3663
+    for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+200039fe:       |     |  |   14fd                       addi    s1,s1,-1
+20003a00:       |     |  |   0451                       addi    s0,s0,20
+20003a02:       |     |  \-- fce5                       bnez    s1,200039fa <xTaskCreate+0x12a>
+/proc/self/cwd/external/freertos/tasks.c:3668
+    vListInitialise( &xDelayedTaskList1 );
+20003a04:       |     |      effff517           auipc   a0,0xeffff
+20003a08:       |     |      8ec50993           addi    s3,a0,-1812 # 100022f0 <xDelayedTaskList1>
+20003a0c:       |     |      854e                       mv      a0,s3
+20003a0e:       |     |      2155                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3669
+    vListInitialise( &xDelayedTaskList2 );
+20003a10:       |     |      effff517           auipc   a0,0xeffff
+20003a14:       |     |      8f450413           addi    s0,a0,-1804 # 10002304 <xDelayedTaskList2>
+20003a18:       |     |      8522                       mv      a0,s0
+20003a1a:       |     |      2961                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3670
+    vListInitialise( &xPendingReadyList );
+20003a1c:       |     |      effff517           auipc   a0,0xeffff
+20003a20:       |     |      8c050513           addi    a0,a0,-1856 # 100022dc <xPendingReadyList>
+20003a24:       |     |      2179                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3674
+            vListInitialise( &xTasksWaitingTermination );
+20003a26:       |     |      effff517           auipc   a0,0xeffff
+20003a2a:       |     |      88e50513           addi    a0,a0,-1906 # 100022b4 <xTasksWaitingTermination>
+20003a2e:       |     |      2151                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3680
+            vListInitialise( &xSuspendedTaskList );
+20003a30:       |     |      effff517           auipc   a0,0xeffff
+20003a34:       |     |      89850513           addi    a0,a0,-1896 # 100022c8 <xSuspendedTaskList>
+20003a38:       |     |      29ad                       jal     20003eb2 <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3686
+    pxDelayedTaskList = &xDelayedTaskList1;
+20003a3a:       |     |      efffe517           auipc   a0,0xefffe
+20003a3e:       |     |      69352523           sw      s3,1674(a0) # 100020c4 <pxDelayedTaskList>
+/proc/self/cwd/external/freertos/tasks.c:3687
+    pxOverflowDelayedTaskList = &xDelayedTaskList2;
+20003a42:       |     |      efffe517           auipc   a0,0xefffe
+20003a46:       |     |      68852323           sw      s0,1670(a0) # 100020c8 <pxOverflowDelayedTaskList>
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1119
+        uxTaskNumber++;
+20003a4a:       |     \----> efffe517           auipc   a0,0xefffe
+20003a4e:       |            66a52583           lw      a1,1642(a0) # 100020b4 <uxTaskNumber>
+20003a52:       |            0585                       addi    a1,a1,1
+20003a54:       |            66b52523           sw      a1,1642(a0)
+/proc/self/cwd/external/freertos/tasks.c:1129
+        prvAddTaskToReadyList( pxNewTCB );
+20003a58:       |            02cba503           lw      a0,44(s7)
+20003a5c:       |            efffe597           auipc   a1,0xefffe
+20003a60:       |            6545a603           lw      a2,1620(a1) # 100020b0 <uxTopReadyPriority>
+20003a64:       |            28a61633           bset    a2,a2,a0
+20003a68:       |            64c5aa23           sw      a2,1620(a1)
+20003a6c:       |            20a54533           sh2add  a0,a0,a0
+20003a70:       |            21554533           sh2add  a0,a0,s5
+20003a74:       |            414c                       lw      a1,4(a0)
+20003a76:       |            00bba423           sw      a1,8(s7)
+20003a7a:       |            4590                       lw      a2,8(a1)
+20003a7c:       |            00cba623           sw      a2,12(s7)
+20003a80:       |            4590                       lw      a2,8(a1)
+20003a82:       |            01262223           sw      s2,4(a2)
+20003a86:       |            0125a423           sw      s2,8(a1)
+20003a8a:       |            00abaa23           sw      a0,20(s7)
+20003a8e:       |            410c                       lw      a1,0(a0)
+20003a90:       |            0585                       addi    a1,a1,1
+20003a92:       |            c10c                       sw      a1,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:1133
+    taskEXIT_CRITICAL();
+20003a94:       |            2025                       jal     20003abc <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:1135
+    if( xSchedulerRunning != pdFALSE )
+20003a96:       |            72aa2503           lw      a0,1834(s4)
+20003a9a:       |            4b05                       li      s6,1
+20003a9c:       +----------- c119                       beqz    a0,20003aa2 <xTaskCreate+0x1d2>
+/proc/self/cwd/external/freertos/tasks.c:1139
+        if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+20003a9e:       |            70ec2503           lw      a0,1806(s8)
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:813
+        return xReturn;
+20003aa2:       \----------> 855a                       mv      a0,s6
+20003aa4:                    50b2                       lw      ra,44(sp)
+20003aa6:                    5422                       lw      s0,40(sp)
+20003aa8:                    5492                       lw      s1,36(sp)
+20003aaa:                    5902                       lw      s2,32(sp)
+20003aac:                    49f2                       lw      s3,28(sp)
+20003aae:                    4a62                       lw      s4,24(sp)
+20003ab0:                    4ad2                       lw      s5,20(sp)
+20003ab2:                    4b42                       lw      s6,16(sp)
+20003ab4:                    4bb2                       lw      s7,12(sp)
+20003ab6:                    4c22                       lw      s8,8(sp)
+20003ab8:                    6145                       addi    sp,sp,48
+20003aba:                    8082                       ret
+
+20003abc <vTaskExitCritical>:
+vTaskExitCritical():
+/proc/self/cwd/external/freertos/tasks.c:4375
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskExitCritical( void )
+    {
+        if( xSchedulerRunning != pdFALSE )
+20003abc:              efffe517                 auipc   a0,0xefffe
+20003ac0:              60452503                 lw      a0,1540(a0) # 100020c0 <xSchedulerRunning>
+20003ac4:       /----- c105                     beqz    a0,20003ae4 <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4377
+        {
+            if( pxCurrentTCB->uxCriticalNesting > 0U )
+20003ac6:       |      efffe517                 auipc   a0,0xefffe
+20003aca:       |      5e652583                 lw      a1,1510(a0) # 100020ac <pxCurrentTCB>
+20003ace:       |      41ec                     lw      a1,68(a1)
+20003ad0:       +----- c991                     beqz    a1,20003ae4 <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4379
+            {
+                ( pxCurrentTCB->uxCriticalNesting )--;
+20003ad2:       |      5e652583                 lw      a1,1510(a0)
+20003ad6:       |      41f0                     lw      a2,68(a1)
+20003ad8:       |      167d                     addi    a2,a2,-1
+20003ada:       |      c1f0                     sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4381
+
+                if( pxCurrentTCB->uxCriticalNesting == 0U )
+20003adc:       |      5e652503                 lw      a0,1510(a0)
+20003ae0:       |      4168                     lw      a0,68(a0)
+20003ae2:       |  /-- c111                     beqz    a0,20003ae6 <vTaskExitCritical+0x2a>
+/proc/self/cwd/external/freertos/tasks.c:4399
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+20003ae4:       \--|-> 8082                     ret
+/proc/self/cwd/external/freertos/tasks.c:4383
+                    portENABLE_INTERRUPTS();
+20003ae6:          \-> 30046073                 csrsi   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4399
+    }
+20003aea:              8082                     ret
+
+20003aec <vTaskSwitchContext>:
+vTaskSwitchContext():
+/proc/self/cwd/external/freertos/tasks.c:3015
+{
+20003aec:              1141                     addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:3016
+    if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+20003aee:              c606                     sw      ra,12(sp)
+20003af0:              c422                     sw      s0,8(sp)
+20003af2:              efffe517                 auipc   a0,0xefffe
+20003af6:              5da52503                 lw      a0,1498(a0) # 100020cc <uxSchedulerSuspended>
+20003afa:          /-- c519                     beqz    a0,20003b08 <vTaskSwitchContext+0x1c>
+/proc/self/cwd/external/freertos/tasks.c:3020
+        xYieldPending = pdTRUE;
+20003afc:          |   efffe517                 auipc   a0,0xefffe
+20003b00:          |   4585                     li      a1,1
+20003b02:          |   5cb52a23                 sw      a1,1492(a0) # 100020d0 <xYieldPending>
+20003b06:       /--|-- a0a5                     j       20003b6e <vTaskSwitchContext+0x82>
+/proc/self/cwd/external/freertos/tasks.c:3024
+        xYieldPending = pdFALSE;
+20003b08:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b0c:       |      5c052423                 sw      zero,1480(a0) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:3056
+        taskCHECK_FOR_STACK_OVERFLOW();
+20003b10:       |      efffe417                 auipc   s0,0xefffe
+20003b14:       |      59c42503                 lw      a0,1436(s0) # 100020ac <pxCurrentTCB>
+20003b18:       |      4108                     lw      a0,0(a0)
+20003b1a:       |      59c42583                 lw      a1,1436(s0)
+20003b1e:       |      598c                     lw      a1,48(a1)
+20003b20:       |  /-- 00a5ea63                 bltu    a1,a0,20003b34 <vTaskSwitchContext+0x48>
+20003b24:       |  |   59c42503                 lw      a0,1436(s0)
+20003b28:       |  |   59c42583                 lw      a1,1436(s0)
+20003b2c:       |  |   03458593                 addi    a1,a1,52
+20003b30:       |  |   b98fd0ef                 jal     ra,20000ec8 <vApplicationStackOverflowHook>
+/proc/self/cwd/external/freertos/tasks.c:3067
+        taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003b34:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b38:       |      57c52503                 lw      a0,1404(a0) # 100020b0 <uxTopReadyPriority>
+20003b3c:       |      60051513                 clz     a0,a0
+20003b40:       |      01f54513                 xori    a0,a0,31
+20003b44:       |      20a54533                 sh2add  a0,a0,a0
+20003b48:       |      efffe597                 auipc   a1,0xefffe
+20003b4c:       |      70858593                 addi    a1,a1,1800 # 10002250 <pxReadyTasksLists>
+20003b50:       |      20b545b3                 sh2add  a1,a0,a1
+20003b54:       |      41c8                     lw      a0,4(a1)
+20003b56:       |      4148                     lw      a0,4(a0)
+20003b58:       |      00858613                 addi    a2,a1,8
+20003b5c:       |      c1c8                     sw      a0,4(a1)
+20003b5e:       |  /-- 00c51563                 bne     a0,a2,20003b68 <vTaskSwitchContext+0x7c>
+20003b62:       |  |   4148                     lw      a0,4(a0)
+20003b64:       |  |   0591                     addi    a1,a1,4
+20003b66:       |  |   c188                     sw      a0,0(a1)
+20003b68:       |  \-> 4548                     lw      a0,12(a0)
+20003b6a:       |      58a42e23                 sw      a0,1436(s0)
+/proc/self/cwd/external/freertos/tasks.c:3087
+}
+20003b6e:       \----> 40b2                     lw      ra,12(sp)
+20003b70:              4422                     lw      s0,8(sp)
+20003b72:              0141                     addi    sp,sp,16
+20003b74:              8082                     ret
+
+20003b76 <vTaskStartScheduler>:
+vTaskStartScheduler():
+/proc/self/cwd/external/freertos/tasks.c:1991
+{
+20003b76:           1141                        addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:2024
+            xReturn = xTaskCreate( prvIdleTask,
+20003b78:           c606                        sw      ra,12(sp)
+20003b7a:           00000517            auipc   a0,0x0
+20003b7e:           05a50513            addi    a0,a0,90 # 20003bd4 <prvIdleTask>
+20003b82:           00002597            auipc   a1,0x2
+20003b86:           74258593            addi    a1,a1,1858 # 200062c4 <uxTopUsedPriority+0x4>
+20003b8a:           efffe617            auipc   a2,0xefffe
+20003b8e:           54a60793            addi    a5,a2,1354 # 100020d4 <xIdleTaskHandle>
+20003b92:           10000613            li      a2,256
+20003b96:           4681                        li      a3,0
+20003b98:           4701                        li      a4,0
+20003b9a:           d37ff0ef            jal     ra,200038d0 <xTaskCreate>
+20003b9e:           4585                        li      a1,1
+/proc/self/cwd/external/freertos/tasks.c:2046
+    if( xReturn == pdPASS )
+20003ba0:       /-- 02b51363            bne     a0,a1,20003bc6 <vTaskStartScheduler+0x50>
+/proc/self/cwd/external/freertos/tasks.c:2062
+        portDISABLE_INTERRUPTS();
+20003ba4:       |   30047073            csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:2074
+        xNextTaskUnblockTime = portMAX_DELAY;
+20003ba8:       |   efffe517            auipc   a0,0xefffe
+20003bac:       |   567d                        li      a2,-1
+20003bae:       |   52c52823            sw      a2,1328(a0) # 100020d8 <xNextTaskUnblockTime>
+/proc/self/cwd/external/freertos/tasks.c:2075
+        xSchedulerRunning = pdTRUE;
+20003bb2:       |   efffe517            auipc   a0,0xefffe
+20003bb6:       |   50b52723            sw      a1,1294(a0) # 100020c0 <xSchedulerRunning>
+/proc/self/cwd/external/freertos/tasks.c:2076
+        xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+20003bba:       |   efffe517            auipc   a0,0xefffe
+20003bbe:       |   52052123            sw      zero,1314(a0) # 100020dc <xTickCount>
+/proc/self/cwd/external/freertos/tasks.c:2090
+        if( xPortStartScheduler() != pdFALSE )
+20003bc2:       |   b44fd0ef            jal     ra,20000f06 <xPortStartScheduler>
+/proc/self/cwd/external/freertos/tasks.c:2114
+    ( void ) uxTopUsedPriority;
+20003bc6:       \-> 00002517            auipc   a0,0x2
+20003bca:           6fa52503            lw      a0,1786(a0) # 200062c0 <uxTopUsedPriority>
+/proc/self/cwd/external/freertos/tasks.c:2115
+}
+20003bce:           40b2                        lw      ra,12(sp)
+20003bd0:           0141                        addi    sp,sp,16
+20003bd2:           8082                        ret
+
+20003bd4 <prvIdleTask>:
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3435
+{
+20003bd4:                 1101                  addi    sp,sp,-32
+20003bd6:                 ce06                  sw      ra,28(sp)
+20003bd8:                 cc22                  sw      s0,24(sp)
+20003bda:                 ca26                  sw      s1,20(sp)
+20003bdc:                 c84a                  sw      s2,16(sp)
+20003bde:                 c64e                  sw      s3,12(sp)
+20003be0:                 c452                  sw      s4,8(sp)
+20003be2:                 c256                  sw      s5,4(sp)
+20003be4:                 efffe497              auipc   s1,0xefffe
+20003be8:                 efffe917              auipc   s2,0xefffe
+20003bec:                 efffe997              auipc   s3,0xefffe
+20003bf0:                 efffea17              auipc   s4,0xefffe
+20003bf4:                 efffea97              auipc   s5,0xefffe
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3701
+            while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+20003bf8:       /-------> 4d44a503              lw      a0,1236(s1) # 100020b8 <uxDeletedTasksWaitingCleanUp>
+20003bfc:       |  /----- c521                  beqz    a0,20003c44 <prvIdleTask+0x70>
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003bfe:       |  |      30047073              csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003c02:       |  |      4d892503              lw      a0,1240(s2) # 100020c0 <xSchedulerRunning>
+20003c06:       |  |  /-- c901                  beqz    a0,20003c16 <prvIdleTask+0x42>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003c08:       |  |  |   4b8aa503              lw      a0,1208(s5) # 100020ac <pxCurrentTCB>
+20003c0c:       |  |  |   416c                  lw      a1,68(a0)
+20003c0e:       |  |  |   0585                  addi    a1,a1,1
+20003c10:       |  |  |   c16c                  sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003c12:       |  |  |   4b8aa503              lw      a0,1208(s5)
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3705
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003c16:       |  |  \-> 6d49a503              lw      a0,1748(s3) # 100022c0 <xTasksWaitingTermination+0xc>
+20003c1a:       |  |      4540                  lw      s0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:3706
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+20003c1c:       |  |      00440513              addi    a0,s0,4
+20003c20:       |  |      2475                  jal     20003ecc <uxListRemove>
+/proc/self/cwd/external/freertos/tasks.c:3707
+                    --uxCurrentNumberOfTasks;
+20003c22:       |  |      4cca2503              lw      a0,1228(s4) # 100020bc <uxCurrentNumberOfTasks>
+20003c26:       |  |      157d                  addi    a0,a0,-1
+20003c28:       |  |      4caa2623              sw      a0,1228(s4)
+/proc/self/cwd/external/freertos/tasks.c:3708
+                    --uxDeletedTasksWaitingCleanUp;
+20003c2c:       |  |      4d44a503              lw      a0,1236(s1)
+20003c30:       |  |      157d                  addi    a0,a0,-1
+20003c32:       |  |      4ca4aa23              sw      a0,1236(s1)
+/proc/self/cwd/external/freertos/tasks.c:3710
+                taskEXIT_CRITICAL();
+20003c36:       |  |      e87ff0ef              jal     ra,20003abc <vTaskExitCritical>
+prvDeleteTCB():
+/proc/self/cwd/external/freertos/tasks.c:3964
+                vPortFreeStack( pxTCB->pxStack );
+20003c3a:       |  |      5808                  lw      a0,48(s0)
+20003c3c:       |  |      2e15                  jal     20003f70 <vPortFree>
+/proc/self/cwd/external/freertos/tasks.c:3965
+                vPortFree( pxTCB );
+20003c3e:       |  |      8522                  mv      a0,s0
+20003c40:       |  |      2e05                  jal     20003f70 <vPortFree>
+20003c42:       +--|----- bf5d                  j       20003bf8 <prvIdleTask+0x24>
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3459
+                taskYIELD();
+20003c44:       |  \----> 00000073              ecall
+20003c48:       \-------- bf45                  j       20003bf8 <prvIdleTask+0x24>
+
+20003c4a <vTaskSuspendAll>:
+vTaskSuspendAll():
+/proc/self/cwd/external/freertos/tasks.c:2142
+    ++uxSchedulerSuspended;
+20003c4a:       efffe517                auipc   a0,0xefffe
+20003c4e:       48252583                lw      a1,1154(a0) # 100020cc <uxSchedulerSuspended>
+20003c52:       0585                    addi    a1,a1,1
+20003c54:       48b52123                sw      a1,1154(a0)
+/proc/self/cwd/external/freertos/tasks.c:2147
+}
+20003c58:       8082                    ret
+
+20003c5a <xTaskResumeAll>:
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2214
+{
+20003c5a:                    1101                       addi    sp,sp,-32
+20003c5c:                    ce06                       sw      ra,28(sp)
+20003c5e:                    cc22                       sw      s0,24(sp)
+20003c60:                    ca26                       sw      s1,20(sp)
+20003c62:                    c84a                       sw      s2,16(sp)
+20003c64:                    c64e                       sw      s3,12(sp)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003c66:                    30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003c6a:                    efffe517           auipc   a0,0xefffe
+20003c6e:                    45652503           lw      a0,1110(a0) # 100020c0 <xSchedulerRunning>
+20003c72:                /-- c911                       beqz    a0,20003c86 <xTaskResumeAll+0x2c>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003c74:                |   efffe517           auipc   a0,0xefffe
+20003c78:                |   43852583           lw      a1,1080(a0) # 100020ac <pxCurrentTCB>
+20003c7c:                |   41f0                       lw      a2,68(a1)
+20003c7e:                |   0605                       addi    a2,a2,1
+20003c80:                |   c1f0                       sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003c82:                |   43852503           lw      a0,1080(a0)
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2229
+        --uxSchedulerSuspended;
+20003c86:                \-> efffe517           auipc   a0,0xefffe
+20003c8a:                    44652583           lw      a1,1094(a0) # 100020cc <uxSchedulerSuspended>
+20003c8e:                    15fd                       addi    a1,a1,-1
+20003c90:                    44b52323           sw      a1,1094(a0)
+/proc/self/cwd/external/freertos/tasks.c:2231
+        if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003c94:                    44652503           lw      a0,1094(a0)
+20003c98:       /----------- e565                       bnez    a0,20003d80 <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2233
+            if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+20003c9a:       |            efffe517           auipc   a0,0xefffe
+20003c9e:       |            42252503           lw      a0,1058(a0) # 100020bc <uxCurrentNumberOfTasks>
+20003ca2:       +----------- cd79                       beqz    a0,20003d80 <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003ca4:       |            efffe517           auipc   a0,0xefffe
+20003ca8:       |            63850513           addi    a0,a0,1592 # 100022dc <xPendingReadyList>
+20003cac:       |            410c                       lw      a1,0(a0)
+20003cae:       |            efffe997           auipc   s3,0xefffe
+20003cb2:       |  /-------- c9dd                       beqz    a1,20003d68 <xTaskResumeAll+0x10e>
+20003cb4:       |  |         efffe597           auipc   a1,0xefffe
+20003cb8:       |  |         efffe617           auipc   a2,0xefffe
+20003cbc:       |  |         59860893           addi    a7,a2,1432 # 10002250 <pxReadyTasksLists>
+20003cc0:       |  |         efffe297           auipc   t0,0xefffe
+20003cc4:       |  |         4805                       li      a6,1
+/proc/self/cwd/external/freertos/tasks.c:2239
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003cc6:       |  |  /----> 4558                       lw      a4,12(a0)
+20003cc8:       |  |  |      4758                       lw      a4,12(a4)
+/proc/self/cwd/external/freertos/tasks.c:2240
+                    listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003cca:       |  |  |      5304                       lw      s1,32(a4)
+20003ccc:       |  |  |      4f40                       lw      s0,28(a4)
+20003cce:       |  |  |      5710                       lw      a2,40(a4)
+20003cd0:       |  |  |      c404                       sw      s1,8(s0)
+20003cd2:       |  |  |      5304                       lw      s1,32(a4)
+20003cd4:       |  |  |      c0c0                       sw      s0,4(s1)
+20003cd6:       |  |  |      4240                       lw      s0,4(a2)
+20003cd8:       |  |  |      01870793           addi    a5,a4,24
+20003cdc:       |  |  |  /-- 00f41363           bne     s0,a5,20003ce2 <xTaskResumeAll+0x88>
+20003ce0:       |  |  |  |   c244                       sw      s1,4(a2)
+20003ce2:       |  |  |  \-> 02072423           sw      zero,40(a4)
+20003ce6:       |  |  |      421c                       lw      a5,0(a2)
+20003ce8:       |  |  |      17fd                       addi    a5,a5,-1
+20003cea:       |  |  |      c21c                       sw      a5,0(a2)
+/proc/self/cwd/external/freertos/tasks.c:2242
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003cec:       |  |  |      4750                       lw      a2,12(a4)
+20003cee:       |  |  |      471c                       lw      a5,8(a4)
+20003cf0:       |  |  |      4b44                       lw      s1,20(a4)
+20003cf2:       |  |  |      c790                       sw      a2,8(a5)
+20003cf4:       |  |  |      4740                       lw      s0,12(a4)
+20003cf6:       |  |  |      c05c                       sw      a5,4(s0)
+20003cf8:       |  |  |      40d0                       lw      a2,4(s1)
+20003cfa:       |  |  |      00470793           addi    a5,a4,4
+20003cfe:       |  |  |  /-- 00f61363           bne     a2,a5,20003d04 <xTaskResumeAll+0xaa>
+20003d02:       |  |  |  |   c0c0                       sw      s0,4(s1)
+20003d04:       |  |  |  \-> 4090                       lw      a2,0(s1)
+20003d06:       |  |  |      167d                       addi    a2,a2,-1
+20003d08:       |  |  |      c090                       sw      a2,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2243
+                    prvAddTaskToReadyList( pxTCB );
+20003d0a:       |  |  |      5750                       lw      a2,44(a4)
+20003d0c:       |  |  |      3fc5a483           lw      s1,1020(a1) # 100020b0 <uxTopReadyPriority>
+20003d10:       |  |  |      28c494b3           bset    s1,s1,a2
+20003d14:       |  |  |      3e95ae23           sw      s1,1020(a1)
+20003d18:       |  |  |      20c644b3           sh2add  s1,a2,a2
+20003d1c:       |  |  |      2114c4b3           sh2add  s1,s1,a7
+20003d20:       |  |  |      40c0                       lw      s0,4(s1)
+20003d22:       |  |  |      c700                       sw      s0,8(a4)
+20003d24:       |  |  |      4414                       lw      a3,8(s0)
+20003d26:       |  |  |      c754                       sw      a3,12(a4)
+20003d28:       |  |  |      4414                       lw      a3,8(s0)
+20003d2a:       |  |  |      c2dc                       sw      a5,4(a3)
+20003d2c:       |  |  |      c41c                       sw      a5,8(s0)
+20003d2e:       |  |  |      cb44                       sw      s1,20(a4)
+20003d30:       |  |  |      4094                       lw      a3,0(s1)
+20003d32:       |  |  |      0685                       addi    a3,a3,1
+20003d34:       |  |  |      c094                       sw      a3,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2247
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+20003d36:       |  |  |      3ec2a683           lw      a3,1004(t0) # 100020ac <pxCurrentTCB>
+20003d3a:       |  |  |      56d4                       lw      a3,44(a3)
+20003d3c:       |  |  |  /-- 00d66463           bltu    a2,a3,20003d44 <xTaskResumeAll+0xea>
+/proc/self/cwd/external/freertos/tasks.c:2249
+                        xYieldPending = pdTRUE;
+20003d40:       |  |  |  |   4309a123           sw      a6,1058(s3) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003d44:       |  |  |  \-> 4110                       lw      a2,0(a0)
+20003d46:       |  |  \----- f241                       bnez    a2,20003cc6 <xTaskResumeAll+0x6c>
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003d48:       |  |         efffe517           auipc   a0,0xefffe
+20003d4c:       |  |         37c52583           lw      a1,892(a0) # 100020c4 <pxDelayedTaskList>
+20003d50:       |  |         418c                       lw      a1,0(a1)
+20003d52:       |  |  /----- c591                       beqz    a1,20003d5e <xTaskResumeAll+0x104>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003d54:       |  |  |      37c52503           lw      a0,892(a0)
+20003d58:       |  |  |      4548                       lw      a0,12(a0)
+20003d5a:       |  |  |      4108                       lw      a0,0(a0)
+20003d5c:       |  |  |  /-- a011                       j       20003d60 <xTaskResumeAll+0x106>
+20003d5e:       |  |  \--|-> 557d                       li      a0,-1
+20003d60:       |  |     \-> efffe597           auipc   a1,0xefffe
+20003d64:       |  |         36a5ac23           sw      a0,888(a1) # 100020d8 <xNextTaskUnblockTime>
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2273
+                    TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
+20003d68:       |  \-------> efffe917           auipc   s2,0xefffe
+20003d6c:       |            37892483           lw      s1,888(s2) # 100020e0 <xPendedTicks>
+/proc/self/cwd/external/freertos/tasks.c:2275
+                    if( xPendedCounts > ( TickType_t ) 0U )
+20003d70:       |     /----- c491                       beqz    s1,20003d7c <xTaskResumeAll+0x122>
+/proc/self/cwd/external/freertos/tasks.c:2279
+                            if( xTaskIncrementTick() != pdFALSE )
+20003d72:       |     |  /-> 200d                       jal     20003d94 <xTaskIncrementTick>
+/proc/self/cwd/external/freertos/tasks.c:2288
+                            --xPendedCounts;
+20003d74:       |     |  |   14fd                       addi    s1,s1,-1
+/proc/self/cwd/external/freertos/tasks.c:2289
+                        } while( xPendedCounts > ( TickType_t ) 0U );
+20003d76:       |     |  \-- fcf5                       bnez    s1,20003d72 <xTaskResumeAll+0x118>
+/proc/self/cwd/external/freertos/tasks.c:2291
+                        xPendedTicks = 0;
+20003d78:       |     |      36092c23           sw      zero,888(s2)
+/proc/self/cwd/external/freertos/tasks.c:2299
+                if( xYieldPending != pdFALSE )
+20003d7c:       |     \----> 4229a503           lw      a0,1058(s3)
+/proc/self/cwd/external/freertos/tasks.c:2319
+    taskEXIT_CRITICAL();
+20003d80:       \----------> d3dff0ef           jal     ra,20003abc <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:2321
+    return xAlreadyYielded;
+20003d84:                    4501                       li      a0,0
+20003d86:                    40f2                       lw      ra,28(sp)
+20003d88:                    4462                       lw      s0,24(sp)
+20003d8a:                    44d2                       lw      s1,20(sp)
+20003d8c:                    4942                       lw      s2,16(sp)
+20003d8e:                    49b2                       lw      s3,12(sp)
+20003d90:                    6105                       addi    sp,sp,32
+20003d92:                    8082                       ret
+
+20003d94 <xTaskIncrementTick>:
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2740
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003d94:                          efffe517             auipc   a0,0xefffe
+20003d98:                          33852503             lw      a0,824(a0) # 100020cc <uxSchedulerSuspended>
+20003d9c:                      /-- c909                 beqz    a0,20003dae <xTaskIncrementTick+0x1a>
+/proc/self/cwd/external/freertos/tasks.c:2887
+        ++xPendedTicks;
+20003d9e:                      |   efffe517             auipc   a0,0xefffe
+20003da2:                      |   34252583             lw      a1,834(a0) # 100020e0 <xPendedTicks>
+20003da6:                      |   0585                 addi    a1,a1,1
+20003da8:                      |   34b52123             sw      a1,834(a0)
+20003dac:       /--------------|-- a209                 j       20003eae <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2744
+        const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+20003dae:       |              \-> efffe517             auipc   a0,0xefffe
+20003db2:       |                  32e52283             lw      t0,814(a0) # 100020dc <xTickCount>
+20003db6:       |                  0285                 addi    t0,t0,1
+/proc/self/cwd/external/freertos/tasks.c:2748
+        xTickCount = xConstTickCount;
+20003db8:       |                  32552723             sw      t0,814(a0)
+20003dbc:       |                  efffe317             auipc   t1,0xefffe
+20003dc0:       |                  efffe817             auipc   a6,0xefffe
+/proc/self/cwd/external/freertos/tasks.c:2750
+        if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+20003dc4:       |        /-------- 02029f63             bnez    t0,20003e02 <xTaskIncrementTick+0x6e>
+/proc/self/cwd/external/freertos/tasks.c:2752
+            taskSWITCH_DELAYED_LISTS();
+20003dc8:       |        |         30832503             lw      a0,776(t1) # 100020c4 <pxDelayedTaskList>
+20003dcc:       |        |         efffe597             auipc   a1,0xefffe
+20003dd0:       |        |         2fc5a683             lw      a3,764(a1) # 100020c8 <pxOverflowDelayedTaskList>
+20003dd4:       |        |         30d32423             sw      a3,776(t1)
+20003dd8:       |        |         2ea5ae23             sw      a0,764(a1)
+20003ddc:       |        |         efffe517             auipc   a0,0xefffe
+20003de0:       |        |         30852583             lw      a1,776(a0) # 100020e4 <xNumOfOverflows>
+20003de4:       |        |         0585                 addi    a1,a1,1
+20003de6:       |        |         30b52423             sw      a1,776(a0)
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003dea:       |        |         30832503             lw      a0,776(t1)
+20003dee:       |        |         4108                 lw      a0,0(a0)
+20003df0:       |        |  /----- c511                 beqz    a0,20003dfc <xTaskIncrementTick+0x68>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003df2:       |        |  |      30832503             lw      a0,776(t1)
+20003df6:       |        |  |      4548                 lw      a0,12(a0)
+20003df8:       |        |  |      4108                 lw      a0,0(a0)
+20003dfa:       |        |  |  /-- a011                 j       20003dfe <xTaskIncrementTick+0x6a>
+20003dfc:       |        |  \--|-> 557d                 li      a0,-1
+20003dfe:       |        |     \-> 30a82c23             sw      a0,792(a6) # 100020d8 <xNextTaskUnblockTime>
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2763
+        if( xConstTickCount >= xNextTaskUnblockTime )
+20003e02:       |        \-------> 31882503             lw      a0,792(a6)
+20003e06:       +----------------- 0aa2e463             bltu    t0,a0,20003eae <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e0a:       |                  30832503             lw      a0,776(t1)
+20003e0e:       |                  4108                 lw      a0,0(a0)
+20003e10:       |  /-------------- c949                 beqz    a0,20003ea2 <xTaskIncrementTick+0x10e>
+20003e12:       |  |               efffe397             auipc   t2,0xefffe
+20003e16:       |  |               efffe517             auipc   a0,0xefffe
+20003e1a:       |  |               43a50893             addi    a7,a0,1082 # 10002250 <pxReadyTasksLists>
+/proc/self/cwd/external/freertos/tasks.c:2783
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003e1e:       |  |     /-------> 30832503             lw      a0,776(t1)
+20003e22:       |  |     |         4548                 lw      a0,12(a0)
+20003e24:       |  |     |         4548                 lw      a0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:2784
+                    xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+20003e26:       |  |     |         414c                 lw      a1,4(a0)
+/proc/self/cwd/external/freertos/tasks.c:2786
+                    if( xConstTickCount < xItemValue )
+20003e28:       |  |  /--|-------- 08b2e163             bltu    t0,a1,20003eaa <xTaskIncrementTick+0x116>
+/proc/self/cwd/external/freertos/tasks.c:2802
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003e2c:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e2e:       |  |  |  |         4510                 lw      a2,8(a0)
+20003e30:       |  |  |  |         4958                 lw      a4,20(a0)
+20003e32:       |  |  |  |         c60c                 sw      a1,8(a2)
+20003e34:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e36:       |  |  |  |         c1d0                 sw      a2,4(a1)
+20003e38:       |  |  |  |         4350                 lw      a2,4(a4)
+20003e3a:       |  |  |  |         00450693             addi    a3,a0,4
+20003e3e:       |  |  |  |     /-- 00d61363             bne     a2,a3,20003e44 <xTaskIncrementTick+0xb0>
+20003e42:       |  |  |  |     |   c34c                 sw      a1,4(a4)
+20003e44:       |  |  |  |     \-> 430c                 lw      a1,0(a4)
+20003e46:       |  |  |  |         15fd                 addi    a1,a1,-1
+20003e48:       |  |  |  |         c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003e4a:       |  |  |  |         5518                 lw      a4,40(a0)
+20003e4c:       |  |  |  |  /----- c30d                 beqz    a4,20003e6e <xTaskIncrementTick+0xda>
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003e4e:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003e50:       |  |  |  |  |      4d50                 lw      a2,28(a0)
+20003e52:       |  |  |  |  |      c60c                 sw      a1,8(a2)
+20003e54:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003e56:       |  |  |  |  |      c1d0                 sw      a2,4(a1)
+20003e58:       |  |  |  |  |      4350                 lw      a2,4(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003e5a:       |  |  |  |  |      01850793             addi    a5,a0,24
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003e5e:       |  |  |  |  |  /-- 00f61363             bne     a2,a5,20003e64 <xTaskIncrementTick+0xd0>
+20003e62:       |  |  |  |  |  |   c34c                 sw      a1,4(a4)
+20003e64:       |  |  |  |  |  \-> 02052423             sw      zero,40(a0)
+20003e68:       |  |  |  |  |      430c                 lw      a1,0(a4)
+20003e6a:       |  |  |  |  |      15fd                 addi    a1,a1,-1
+20003e6c:       |  |  |  |  |      c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2817
+                    prvAddTaskToReadyList( pxTCB );
+20003e6e:       |  |  |  |  \----> 554c                 lw      a1,44(a0)
+20003e70:       |  |  |  |         29e3a603             lw      a2,670(t2) # 100020b0 <uxTopReadyPriority>
+20003e74:       |  |  |  |         28b61633             bset    a2,a2,a1
+20003e78:       |  |  |  |         28c3af23             sw      a2,670(t2)
+20003e7c:       |  |  |  |         20b5c5b3             sh2add  a1,a1,a1
+20003e80:       |  |  |  |         2115c5b3             sh2add  a1,a1,a7
+20003e84:       |  |  |  |         41d0                 lw      a2,4(a1)
+20003e86:       |  |  |  |         c510                 sw      a2,8(a0)
+20003e88:       |  |  |  |         4618                 lw      a4,8(a2)
+20003e8a:       |  |  |  |         c558                 sw      a4,12(a0)
+20003e8c:       |  |  |  |         4618                 lw      a4,8(a2)
+20003e8e:       |  |  |  |         c354                 sw      a3,4(a4)
+20003e90:       |  |  |  |         c614                 sw      a3,8(a2)
+20003e92:       |  |  |  |         c94c                 sw      a1,20(a0)
+20003e94:       |  |  |  |         4188                 lw      a0,0(a1)
+20003e96:       |  |  |  |         0505                 addi    a0,a0,1
+20003e98:       |  |  |  |         c188                 sw      a0,0(a1)
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e9a:       |  |  |  |         30832503             lw      a0,776(t1)
+20003e9e:       |  |  |  |         4108                 lw      a0,0(a0)
+20003ea0:       |  |  |  \-------- fd3d                 bnez    a0,20003e1e <xTaskIncrementTick+0x8a>
+20003ea2:       |  \--|----------> 557d                 li      a0,-1
+/proc/self/cwd/external/freertos/tasks.c:2774
+                    xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+20003ea4:       |     |            30a82c23             sw      a0,792(a6)
+20003ea8:       +-----|----------- a019                 j       20003eae <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2793
+                        xNextTaskUnblockTime = xItemValue;
+20003eaa:       |     \----------> 30b82c23             sw      a1,792(a6)
+/proc/self/cwd/external/freertos/tasks.c:2898
+    return xSwitchRequired;
+20003eae:       \----------------> 4501                 li      a0,0
+20003eb0:                          8082                 ret
+
+20003eb2 <vListInitialise>:
+vListInitialise():
+/proc/self/cwd/external/freertos/list.c:55
+void vListInitialise( List_t * const pxList )
+{
+    /* The list structure contains a list item which is used to mark the
+     * end of the list.  To initialise the list the list end is inserted
+     * as the only list entry. */
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003eb2:       00850593                addi    a1,a0,8
+20003eb6:       c14c                    sw      a1,4(a0)
+20003eb8:       567d                    li      a2,-1
+/proc/self/cwd/external/freertos/list.c:59
+
+    /* The list end value is the highest possible value in the list to
+     * ensure it remains at the end of the list. */
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
+20003eba:       c510                    sw      a2,8(a0)
+/proc/self/cwd/external/freertos/list.c:63
+
+    /* The list end next and previous pointers point to itself so we know
+     * when the list is empty. */
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );     /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003ebc:       c54c                    sw      a1,12(a0)
+/proc/self/cwd/external/freertos/list.c:64
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003ebe:       c90c                    sw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:66
+
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+20003ec0:       00052023                sw      zero,0(a0)
+/proc/self/cwd/external/freertos/list.c:72
+
+    /* Write known values into the list if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+}
+20003ec4:       8082                    ret
+
+20003ec6 <vListInitialiseItem>:
+vListInitialiseItem():
+/proc/self/cwd/external/freertos/list.c:78
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+    /* Make sure the list item is not recorded as being on a list. */
+    pxItem->pxContainer = NULL;
+20003ec6:       00052823                sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:84
+
+    /* Write known values into the list item if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+20003eca:       8082                    ret
+
+20003ecc <uxListRemove>:
+uxListRemove():
+/proc/self/cwd/external/freertos/list.c:194
+{
+/* The list item knows which list it is in.  Obtain the list from the list
+ * item. */
+    List_t * const pxList = pxItemToRemove->pxContainer;
+
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003ecc:           4510                        lw      a2,8(a0)
+20003ece:           4154                        lw      a3,4(a0)
+/proc/self/cwd/external/freertos/list.c:192
+    List_t * const pxList = pxItemToRemove->pxContainer;
+20003ed0:           490c                        lw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:194
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003ed2:           c690                        sw      a2,8(a3)
+/proc/self/cwd/external/freertos/list.c:195
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+20003ed4:           4510                        lw      a2,8(a0)
+20003ed6:           c254                        sw      a3,4(a2)
+/proc/self/cwd/external/freertos/list.c:201
+
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
+
+    /* Make sure the index is left pointing to a valid item. */
+    if( pxList->pxIndex == pxItemToRemove )
+20003ed8:           41d4                        lw      a3,4(a1)
+20003eda:       /-- 00a69363            bne     a3,a0,20003ee0 <uxListRemove+0x14>
+/proc/self/cwd/external/freertos/list.c:203
+    {
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
+20003ede:       |   c1d0                        sw      a2,4(a1)
+/proc/self/cwd/external/freertos/list.c:210
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxItemToRemove->pxContainer = NULL;
+20003ee0:       \-> 00052823            sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:211
+    ( pxList->uxNumberOfItems )--;
+20003ee4:           4188                        lw      a0,0(a1)
+20003ee6:           157d                        addi    a0,a0,-1
+20003ee8:           c188                        sw      a0,0(a1)
+/proc/self/cwd/external/freertos/list.c:213
+
+    return pxList->uxNumberOfItems;
+20003eea:           4188                        lw      a0,0(a1)
+20003eec:           8082                        ret
+
+20003eee <pvPortMalloc>:
+pvPortMalloc():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:72
+static size_t xNextFreeByte = ( size_t ) 0;
+
+/*-----------------------------------------------------------*/
+
+void * pvPortMalloc( size_t xWantedSize )
+{
+20003eee:                 1141                  addi    sp,sp,-16
+20003ef0:                 c606                  sw      ra,12(sp)
+20003ef2:                 c422                  sw      s0,8(sp)
+20003ef4:                 c226                  sw      s1,4(sp)
+20003ef6:                 c04a                  sw      s2,0(sp)
+20003ef8:                 842a                  mv      s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:79
+    static uint8_t * pucAlignedHeap = NULL;
+
+    /* Ensure that blocks are always aligned. */
+    #if ( portBYTE_ALIGNMENT != 1 )
+        {
+            if( xWantedSize & portBYTE_ALIGNMENT_MASK )
+20003efa:                 893d                  andi    a0,a0,15
+20003efc:             /-- c909                  beqz    a0,20003f0e <pvPortMalloc+0x20>
+20003efe:             |   ff047513              andi    a0,s0,-16
+20003f02:             |   0541                  addi    a0,a0,16
+20003f04:             |   00a435b3              sltu    a1,s0,a0
+20003f08:             |   40b00433              neg     s0,a1
+20003f0c:             |   8c69                  and     s0,s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:94
+                }
+            }
+        }
+    #endif
+
+    vTaskSuspendAll();
+20003f0e:             \-> d3dff0ef              jal     ra,20003c4a <vTaskSuspendAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:96
+    {
+        if( pucAlignedHeap == NULL )
+20003f12:                 efffe517              auipc   a0,0xefffe
+20003f16:                 1d652483              lw      s1,470(a0) # 100020e8 <pvPortMalloc.pucAlignedHeap>
+20003f1a:             /-- c099                  beqz    s1,20003f20 <pvPortMalloc+0x32>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+            /* Ensure the heap starts on a correctly aligned boundary. */
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+        }
+
+        /* Check there is enough room left for the allocation and. */
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f1c:          /--|-- e811                  bnez    s0,20003f30 <pvPortMalloc+0x42>
+20003f1e:       /--|--|-- a835                  j       20003f5a <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:99
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+20003f20:       |  |  \-> efffe597              auipc   a1,0xefffe
+20003f24:       |  |      40858493              addi    s1,a1,1032 # 10002328 <ucHeap+0x10>
+20003f28:       |  |      98c1                  andi    s1,s1,-16
+20003f2a:       |  |      1c952b23              sw      s1,470(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f2e:       +--|----- c415                  beqz    s0,20003f5a <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:104
+            ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
+20003f30:       |  \----> efffe517              auipc   a0,0xefffe
+20003f34:       |         1bc52903              lw      s2,444(a0) # 100020ec <xNextFreeByte>
+20003f38:       |         944a                  add     s0,s0,s2
+20003f3a:       |         00445593              srli    a1,s0,0x4
+20003f3e:       |         7ff5b593              sltiu   a1,a1,2047
+20003f42:       |         00893633              sltu    a2,s2,s0
+20003f46:       |         8df1                  and     a1,a1,a2
+20003f48:       +-------- c989                  beqz    a1,20003f5a <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:110
+            ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */
+        {
+            /* Return the next free byte then increment the index past this
+             * block. */
+            pvReturn = pucAlignedHeap + xNextFreeByte;
+            xNextFreeByte += xWantedSize;
+20003f4a:       |         1a852e23              sw      s0,444(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+        }
+
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
+20003f4e:       |         d0dff0ef              jal     ra,20003c5a <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:119
+
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+20003f52:       |     /-- c491                  beqz    s1,20003f5e <pvPortMalloc+0x70>
+20003f54:       |     |   01248533              add     a0,s1,s2
+20003f58:       |  /--|-- a031                  j       20003f64 <pvPortMalloc+0x76>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+    ( void ) xTaskResumeAll();
+20003f5a:       \--|--|-> d01ff0ef              jal     ra,20003c5a <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:122
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+20003f5e:          |  \-> f21fc0ef              jal     ra,20000e7e <vApplicationMallocFailedHook>
+20003f62:          |      4501                  li      a0,0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:127
+            }
+        }
+    #endif
+
+    return pvReturn;
+20003f64:          \----> 40b2                  lw      ra,12(sp)
+20003f66:                 4422                  lw      s0,8(sp)
+20003f68:                 4492                  lw      s1,4(sp)
+20003f6a:                 4902                  lw      s2,0(sp)
+20003f6c:                 0141                  addi    sp,sp,16
+20003f6e:                 8082                  ret
+
+20003f70 <vPortFree>:
+vPortFree():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:140
+     * https://www.FreeRTOS.org for more information. */
+    ( void ) pv;
+
+    /* Force an assert as it is invalid to call this function. */
+    configASSERT( pv == NULL );
+}
+20003f70:       8082                    ret
+
+20003f72 <manufacturer_pre_test_hook>:
+manufacturer_pre_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:14
+// The default test hooks do nothing, but exist as the OTTF expects some hooks
+// to exist. Additionally, they are weak symbols so they may be overridden by
+// other custom test hooks.
+
+OT_WEAK
+bool manufacturer_pre_test_hook(void) { return true; }
+20003f72:       4505                    li      a0,1
+20003f74:       8082                    ret
+
+20003f76 <manufacturer_post_test_hook>:
+manufacturer_post_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:17
+
+OT_WEAK
+bool manufacturer_post_test_hook(void) { return true; }
+20003f76:       4505                    li      a0,1
+20003f78:       8082                    ret
+
+20003f7a <to_cpu_cycles>:
+to_cpu_cycles():
+/proc/self/cwd/sw/device/lib/arch/device_fpga_cw310.c:25
+
+const uint64_t kClockFreqCpuMhz = 24;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+20003f7a:       4661                    li      a2,24
+20003f7c:       02c53633                mulhu   a2,a0,a2
+20003f80:       20b5a5b3                sh1add  a1,a1,a1
+20003f84:       20c5e5b3                sh3add  a1,a1,a2
+20003f88:       20a52533                sh1add  a0,a0,a0
+20003f8c:       050e                    slli    a0,a0,0x3
+20003f8e:       8082                    ret
+
+20003f90 <busy_spin_micros>:
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:13
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/runtime/ibex.h"
+
+void busy_spin_micros(uint32_t usec) {
+20003f90:                 1141                  addi    sp,sp,-16
+20003f92:                 c606                  sw      ra,12(sp)
+20003f94:                 c422                  sw      s0,8(sp)
+20003f96:                 c226                  sw      s1,4(sp)
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+OT_WARN_UNUSED_RESULT
+inline uint64_t ibex_mcycle_read(void) {
+  uint32_t cycle_low = 0;
+  uint32_t cycle_high = 0;
+  uint32_t cycle_high_2 = 0;
+  asm volatile(
+20003f98:             /-> b8002473              csrr    s0,mcycleh
+20003f9c:             |   b00024f3              csrr    s1,mcycle
+20003fa0:             |   b80025f3              csrr    a1,mcycleh
+20003fa4:             \-- feb41ae3              bne     s0,a1,20003f98 <busy_spin_micros+0x8>
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:15
+  uint64_t start = ibex_mcycle_read();
+  uint64_t cycles = to_cpu_cycles(usec);
+20003fa8:                 4581                  li      a1,0
+20003faa:                 3fc1                  jal     20003f7a <to_cpu_cycles>
+20003fac:                 40900633              neg     a2,s1
+20003fb0:                 009036b3              snez    a3,s1
+20003fb4:                 40800733              neg     a4,s0
+20003fb8:                 40d706b3              sub     a3,a4,a3
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+20003fbc:       /-------> b8002473              csrr    s0,mcycleh
+20003fc0:       |         b0002773              csrr    a4,mcycle
+20003fc4:       |         b80024f3              csrr    s1,mcycleh
+20003fc8:       +-------- fe941ae3              bne     s0,s1,20003fbc <busy_spin_micros+0x2c>
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:91
+      "  csrr %2, mcycleh;"  // Read `mcycleh` again.
+      "  bne  %0, %2, 1b;"   // Try again if `mcycle` overflowed before
+                             // reading `mcycleh`.
+      : "=r"(cycle_high), "=r"(cycle_low), "=r"(cycle_high_2)
+      :);
+  return (uint64_t)cycle_high << 32 | cycle_low;
+20003fcc:       |         9732                  add     a4,a4,a2
+20003fce:       |         00c737b3              sltu    a5,a4,a2
+20003fd2:       |         9436                  add     s0,s0,a3
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:16
+  while ((ibex_mcycle_read() - start) < cycles) {
+20003fd4:       |         97a2                  add     a5,a5,s0
+20003fd6:       |  /----- 00b78663              beq     a5,a1,20003fe2 <busy_spin_micros+0x52>
+20003fda:       |  |      00b7b733              sltu    a4,a5,a1
+20003fde:       +--|----- ff79                  bnez    a4,20003fbc <busy_spin_micros+0x2c>
+20003fe0:       |  |  /-- a021                  j       20003fe8 <busy_spin_micros+0x58>
+20003fe2:       |  \--|-> 00a73733              sltu    a4,a4,a0
+20003fe6:       \-----|-- fb79                  bnez    a4,20003fbc <busy_spin_micros+0x2c>
+/proc/self/cwd/sw/device/lib/runtime/hart.c:18
+  }
+}
+20003fe8:             \-> 40b2                  lw      ra,12(sp)
+20003fea:                 4422                  lw      s0,8(sp)
+20003fec:                 4492                  lw      s1,4(sp)
+20003fee:                 0141                  addi    sp,sp,16
+20003ff0:                 8082                  ret
+
+20003ff2 <abort>:
+wait_for_interrupt():
+/proc/self/cwd/./sw/device/lib/runtime/hart.h:29
+ *
+ * This function may behave as if it is a no-op.
+ */
+inline void wait_for_interrupt(void) {
+#ifdef OT_PLATFORM_RV32
+  asm volatile("wfi");
+20003ff2:       /-> 10500073            wfi
+abort():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:21
+
+noreturn void abort(void) {
+  while (true) {
+20003ff6:       \-- bff5                        j       20003ff2 <abort>
+
+20003ff8 <ibex_mcause_read>:
+ibex_mcause_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:11
+
+#include "sw/device/lib/base/csr.h"
+
+uint32_t ibex_mcause_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MCAUSE, &mtval);
+20003ff8:       34202573                csrr    a0,mcause
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:12
+  return mtval;
+20003ffc:       8082                    ret
+
+20003ffe <ibex_mtval_read>:
+ibex_mtval_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:17
+}
+
+uint32_t ibex_mtval_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MTVAL, &mtval);
+20003ffe:       34302573                csrr    a0,mtval
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:18
+  return mtval;
+20004002:       8082                    ret
+
+20004004 <ibex_mepc_read>:
+ibex_mepc_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:23
+}
+
+uint32_t ibex_mepc_read(void) {
+  uint32_t mepc;
+  CSR_READ(CSR_REG_MEPC, &mepc);
+20004004:       34102573                csrr    a0,mepc
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:24
+  return mepc;
+20004008:       8082                    ret
+
+2000400a <mmio_region_memcpy_from_mmio32>:
+mmio_region_memcpy_from_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:104
+  }
+}
+
+void mmio_region_memcpy_from_mmio32(mmio_region_t base, uint32_t offset,
+                                    void *dest, size_t len) {
+  mmio_region_memcpy32(base, offset, dest, len, true);
+2000400a:       4705                    li      a4,1
+2000400c:       a009                    j       2000400e <mmio_region_memcpy32>
+
+2000400e <mmio_region_memcpy32>:
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:27
+                                 uint8_t *buf, size_t len, bool from_mmio) {
+2000400e:                    7179                       addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/base/mmio.c:28
+  if (len == 0) {
+20004010:                    d606                       sw      ra,44(sp)
+20004012:                    d422                       sw      s0,40(sp)
+20004014:                    d226                       sw      s1,36(sp)
+20004016:                    d04a                       sw      s2,32(sp)
+20004018:                    ce4e                       sw      s3,28(sp)
+2000401a:                    cc52                       sw      s4,24(sp)
+2000401c:                    ca56                       sw      s5,20(sp)
+2000401e:                    c85a                       sw      s6,16(sp)
+20004020:       /----------- c6d9                       beqz    a3,200040ae <mmio_region_memcpy32+0xa0>
+20004022:       |            893a                       mv      s2,a4
+20004024:       |            84b6                       mv      s1,a3
+20004026:       |            89b2                       mv      s3,a2
+20004028:       |            8b2e                       mv      s6,a1
+2000402a:       |            8a2a                       mv      s4,a0
+misalignment32_of():
+/proc/self/cwd/./sw/device/lib/base/memory.h:58
+ * Computes how many bytes `addr` is ahead of the previous 32-bit word alignment
+ * boundary.
+ */
+OT_WARN_UNUSED_RESULT
+inline ptrdiff_t misalignment32_of(uintptr_t addr) {
+  return addr % alignof(uint32_t);
+2000402c:       |            0035f513           andi    a0,a1,3
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:35
+  if (misalignment != 0) {
+20004030:       |  /-------- cd0d                       beqz    a0,2000406a <mmio_region_memcpy32+0x5c>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20004032:       |  |         ffcb7413           andi    s0,s6,-4
+20004036:       |  |         9452                       add     s0,s0,s4
+20004038:       |  |         400c                       lw      a1,0(s0)
+2000403a:       |  |         4611                       li      a2,4
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:38
+    size_t realignment = sizeof(uint32_t) - OT_UNSIGNED(misalignment);
+2000403c:       |  |         8e09                       sub     a2,a2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:42
+    if (realignment > len) {
+2000403e:       |  |         0a965ab3           minu    s5,a2,s1
+/proc/self/cwd/sw/device/lib/base/mmio.c:49
+    uint32_t current_word = mmio_region_read32(base, current_word_offset);
+20004042:       |  |         c62e                       sw      a1,12(sp)
+20004044:       |  |         006c                       addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/base/mmio.c:53
+    uint8_t *current_byte = ((uint8_t *)&current_word) + misalignment;
+20004046:       |  |         8dc9                       or      a1,a1,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:54
+    if (from_mmio) {
+20004048:       |  |     /-- 00090663           beqz    s2,20004054 <mmio_region_memcpy32+0x46>
+/proc/self/cwd/sw/device/lib/base/mmio.c:55
+      memcpy(buf, current_byte, realignment);
+2000404c:       |  |     |   854e                       mv      a0,s3
+2000404e:       |  |     |   8656                       mv      a2,s5
+20004050:       |  |     |   289d                       jal     200040c6 <memcpy>
+20004052:       |  |  /--|-- a039                       j       20004060 <mmio_region_memcpy32+0x52>
+/proc/self/cwd/sw/device/lib/base/mmio.c:58
+      memcpy(current_byte, buf, realignment);
+20004054:       |  |  |  \-> 852e                       mv      a0,a1
+20004056:       |  |  |      85ce                       mv      a1,s3
+20004058:       |  |  |      8656                       mv      a2,s5
+2000405a:       |  |  |      20b5                       jal     200040c6 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:59
+      mmio_region_write32(base, current_word_offset, current_word);
+2000405c:       |  |  |      4532                       lw      a0,12(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000405e:       |  |  |      c008                       sw      a0,0(s0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:64
+    len -= realignment;
+20004060:       |  |  \----> 415484b3           sub     s1,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+20004064:       +--|-------- c4a9                       beqz    s1,200040ae <mmio_region_memcpy32+0xa0>
+20004066:       |  |         9b56                       add     s6,s6,s5
+20004068:       |  |         99d6                       add     s3,s3,s5
+2000406a:       |  \-------> 4a91                       li      s5,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:73
+    if (bytes_to_copy > len) {
+2000406c:       |  /-------> 0044b513           sltiu   a0,s1,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+20004070:       |  |         00a96533           or      a0,s2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:78
+    uint32_t current_word = 0;
+20004074:       |  |         c402                       sw      zero,8(sp)
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+20004076:       |  |     /-- c511                       beqz    a0,20004082 <mmio_region_memcpy32+0x74>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20004078:       |  |     |   ffcb7513           andi    a0,s6,-4
+2000407c:       |  |     |   9552                       add     a0,a0,s4
+2000407e:       |  |     |   4108                       lw      a0,0(a0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:84
+      current_word = mmio_region_read32(base, OT_SIGNED(offset));
+20004080:       |  |     |   c42a                       sw      a0,8(sp)
+20004082:       |  |     \-> 0b54d433           minu    s0,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:88
+    if (from_mmio) {
+20004086:       |  |     /-- 00090763           beqz    s2,20004094 <mmio_region_memcpy32+0x86>
+/proc/self/cwd/sw/device/lib/base/mmio.c:89
+      memcpy(buf, &current_word, bytes_to_copy);
+2000408a:       |  |     |   002c                       addi    a1,sp,8
+2000408c:       |  |     |   854e                       mv      a0,s3
+2000408e:       |  |     |   8622                       mv      a2,s0
+20004090:       |  |     |   281d                       jal     200040c6 <memcpy>
+20004092:       |  |  /--|-- a811                       j       200040a6 <mmio_region_memcpy32+0x98>
+/proc/self/cwd/sw/device/lib/base/mmio.c:92
+      memcpy(&current_word, buf, bytes_to_copy);
+20004094:       |  |  |  \-> 0028                       addi    a0,sp,8
+20004096:       |  |  |      85ce                       mv      a1,s3
+20004098:       |  |  |      8622                       mv      a2,s0
+2000409a:       |  |  |      2035                       jal     200040c6 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:93
+      mmio_region_write32(base, OT_SIGNED(offset), current_word);
+2000409c:       |  |  |      4522                       lw      a0,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000409e:       |  |  |      ffcb7593           andi    a1,s6,-4
+200040a2:       |  |  |      95d2                       add     a1,a1,s4
+200040a4:       |  |  |      c188                       sw      a0,0(a1)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:96
+    offset += bytes_to_copy;
+200040a6:       |  |  \----> 9b22                       add     s6,s6,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:98
+    len -= bytes_to_copy;
+200040a8:       |  |         8c81                       sub     s1,s1,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:97
+    buf += bytes_to_copy;
+200040aa:       |  |         99a2                       add     s3,s3,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+200040ac:       |  \-------- f0e1                       bnez    s1,2000406c <mmio_region_memcpy32+0x5e>
+/proc/self/cwd/sw/device/lib/base/mmio.c:100
+}
+200040ae:       \----------> 50b2                       lw      ra,44(sp)
+200040b0:                    5422                       lw      s0,40(sp)
+200040b2:                    5492                       lw      s1,36(sp)
+200040b4:                    5902                       lw      s2,32(sp)
+200040b6:                    49f2                       lw      s3,28(sp)
+200040b8:                    4a62                       lw      s4,24(sp)
+200040ba:                    4ad2                       lw      s5,20(sp)
+200040bc:                    4b42                       lw      s6,16(sp)
+200040be:                    6145                       addi    sp,sp,48
+200040c0:                    8082                       ret
+
+200040c2 <mmio_region_memcpy_to_mmio32>:
+mmio_region_memcpy_to_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:112
+void mmio_region_memcpy_to_mmio32(mmio_region_t base, uint32_t offset,
+                                  const void *src, size_t len) {
+  // Below `const` cast is necessary to be able to use `mmio_region_memcpy32`
+  // for both read and write operations but `from_mmio = false` means that `src`
+  // will never be written to.
+  mmio_region_memcpy32(base, offset, (void *)src, len, false);
+200040c2:       4701                    li      a4,0
+200040c4:       b7a9                    j       2000400e <mmio_region_memcpy32>
+
+200040c6 <memcpy>:
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:63
+  return word << 24 | word << 16 | word << 8 | word;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memcpy)(void *restrict dest,
+                                    const void *restrict src, size_t len) {
+  if (dest == NULL || src == NULL) {
+200040c6:                    00153693           seqz    a3,a0
+200040ca:                    0015b713           seqz    a4,a1
+200040ce:                    8ed9                       or      a3,a3,a4
+200040d0:       /----------- eabd                       bnez    a3,20004146 <memcpy+0x80>
+200040d2:       |            4691                       li      a3,4
+200040d4:       |            88b2                       mv      a7,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+200040d6:       |        /-- 00d66c63           bltu    a2,a3,200040ee <memcpy+0x28>
+200040da:       |        |   00a5c6b3           xor     a3,a1,a0
+200040de:       |        |   8a8d                       andi    a3,a3,3
+200040e0:       |        |   8832                       mv      a6,a2
+200040e2:       |        |   88b2                       mv      a7,a2
+200040e4:       |     /--|-- ee81                       bnez    a3,200040fc <memcpy+0x36>
+200040e6:       |     |  |   40a006b3           neg     a3,a0
+200040ea:       |     |  |   0036f893           andi    a7,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+200040ee:       |     |  \-> 411606b3           sub     a3,a2,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+200040f2:       |     |      9af1                       andi    a3,a3,-4
+200040f4:       |     |      0116e833           or      a6,a3,a7
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  unsigned char *dest8 = (unsigned char *)dest;
+  const unsigned char *src8 = (const unsigned char *)src;
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, src, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+200040f8:       |  /--|----- 00088d63           beqz    a7,20004112 <memcpy+0x4c>
+200040fc:       |  |  \----> 82ae                       mv      t0,a1
+200040fe:       |  |         872a                       mv      a4,a0
+20004100:       |  |         86c6                       mv      a3,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:72
+    dest8[i] = src8[i];
+20004102:       |  |     /-> 00028783           lb      a5,0(t0)
+20004106:       |  |     |   00f70023           sb      a5,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  for (; i < body_offset; ++i) {
+2000410a:       |  |     |   16fd                       addi    a3,a3,-1
+2000410c:       |  |     |   0705                       addi    a4,a4,1
+2000410e:       |  |     |   0285                       addi    t0,t0,1
+20004110:       |  |     \-- faed                       bnez    a3,20004102 <memcpy+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  }
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004112:       |  \--/----X 0108fb63           bgeu    a7,a6,20004128 <memcpy+0x62>
+/proc/self/cwd/sw/device/lib/base/memory.c:75
+    uint32_t word = read_32(&src8[i]);
+20004116:       |     |  /-> 011586b3           add     a3,a1,a7
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  // Failing to get that particular codegen in either GCC or Clang with -O2 or
+  // -Os set shall be considered a bug in this function. The same applies to
+  // `write32()`.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  uint32_t val;
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+2000411a:       |     |  |   4294                       lw      a3,0(a3)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:76
+    write_32(word, &dest8[i]);
+2000411c:       |     |  |   01150733           add     a4,a0,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004120:       |     |  |   0891                       addi    a7,a7,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+inline void write_32(uint32_t value, void *ptr) {
+  // Both GCC and Clang optimize the code below into a single word-store on most
+  // platforms. See the comment in `read_32()` for more implementation-private
+  // information.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  __builtin_memcpy(ptr, &value, sizeof(uint32_t));
+20004122:       |     |  |   c314                       sw      a3,0(a4)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+20004124:       |     |  \-- ff08e9e3           bltu    a7,a6,20004116 <memcpy+0x50>
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  }
+  for (; i < len; ++i) {
+20004128:       +-----\----X 00c8ff63           bgeu    a7,a2,20004146 <memcpy+0x80>
+2000412c:       |            41160633           sub     a2,a2,a7
+20004130:       |            01150733           add     a4,a0,a7
+20004134:       |            95c6                       add     a1,a1,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:79
+    dest8[i] = src8[i];
+20004136:       |        /-> 00058683           lb      a3,0(a1)
+2000413a:       |        |   00d70023           sb      a3,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  for (; i < len; ++i) {
+2000413e:       |        |   167d                       addi    a2,a2,-1
+20004140:       |        |   0705                       addi    a4,a4,1
+20004142:       |        |   0585                       addi    a1,a1,1
+20004144:       |        \-- fa6d                       bnez    a2,20004136 <memcpy+0x70>
+/proc/self/cwd/sw/device/lib/base/memory.c:82
+  }
+  return dest;
+}
+20004146:       \----------> 8082                       ret
+
+20004148 <memset>:
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:84
+
+void *OT_PREFIX_IF_NOT_RV32(memset)(void *dest, int value, size_t len) {
+20004148:                 4691                  li      a3,4
+2000414a:                 8732                  mv      a4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+2000414c:             /-- 00d66563              bltu    a2,a3,20004156 <memset+0xe>
+20004150:             |   40a00733              neg     a4,a0
+20004154:             |   8b0d                  andi    a4,a4,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+20004156:             \-> 40e606b3              sub     a3,a2,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+2000415a:                 9af1                  andi    a3,a3,-4
+2000415c:                 00e6e833              or      a6,a3,a4
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+20004160:          /----- cb01                  beqz    a4,20004170 <memset+0x28>
+20004162:          |      87aa                  mv      a5,a0
+20004164:          |      86ba                  mv      a3,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:92
+    dest8[i] = value8;
+20004166:          |  /-> 00b78023              sb      a1,0(a5)
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  for (; i < body_offset; ++i) {
+2000416a:          |  |   16fd                  addi    a3,a3,-1
+2000416c:          |  |   0785                  addi    a5,a5,1
+2000416e:          |  \-- fee5                  bnez    a3,20004166 <memset+0x1e>
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004170:       /--\----X 03077063              bgeu    a4,a6,20004190 <memset+0x48>
+20004174:       |         0ff5f693              andi    a3,a1,255
+20004178:       |         010107b7              lui     a5,0x1010
+2000417c:       |         10178793              addi    a5,a5,257 # 1010101 <_ottf_size+0xf90101>
+20004180:       |         02f687b3              mul     a5,a3,a5
+/proc/self/cwd/sw/device/lib/base/memory.c:96
+    write_32(value32, &dest8[i]);
+20004184:       |     /-> 00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004188:       |     |   0711                  addi    a4,a4,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+2000418a:       |     |   c29c                  sw      a5,0(a3)
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+2000418c:       |     \-- ff076ce3              bltu    a4,a6,20004184 <memset+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  }
+  for (; i < len; ++i) {
+20004190:       \--/----X 00c77a63              bgeu    a4,a2,200041a4 <memset+0x5c>
+20004194:          |      8e19                  sub     a2,a2,a4
+20004196:          |      00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:99
+    dest8[i] = value8;
+2000419a:          |  /-> 00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  for (; i < len; ++i) {
+2000419e:          |  |   167d                  addi    a2,a2,-1
+200041a0:          |  |   0685                  addi    a3,a3,1
+200041a2:          |  \-- fe65                  bnez    a2,2000419a <memset+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:101
+  }
+  return dest;
+200041a4:          \----> 8082                  ret
+
+200041a6 <memchr>:
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:190
+    }
+  }
+  return kMemCmpEq;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memchr)(const void *ptr, int value, size_t len) {
+200041a6:                             4691                      li      a3,4
+200041a8:                             8eb2                      mv      t4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+200041aa:                         /-- 00d66663                  bltu    a2,a3,200041b6 <memchr+0x10>
+200041ae:                         |   40a00733                  neg     a4,a0
+200041b2:                         |   00377e93                  andi    t4,a4,3
+200041b6:                         \-> 0ff5fe13                  andi    t3,a1,255
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+200041ba:                      /----- 000e8b63                  beqz    t4,200041d0 <memchr+0x2a>
+200041be:                      |      85aa                      mv      a1,a0
+200041c0:                      |      87f6                      mv      a5,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:198
+    if (ptr8[i] == value8) {
+200041c2:                      |  /-> 0005c683                  lbu     a3,0(a1)
+200041c6:       /--------------|--|-- 07c68f63                  beq     a3,t3,20004244 <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  for (; i < body_offset; ++i) {
+200041ca:       |              |  |   17fd                      addi    a5,a5,-1
+200041cc:       |              |  |   0585                      addi    a1,a1,1
+200041ce:       |              |  \-- fbf5                      bnez    a5,200041c2 <memchr+0x1c>
+200041d0:       |              \----> 41d605b3                  sub     a1,a2,t4
+200041d4:       |                     99f1                      andi    a1,a1,-4
+200041d6:       |                     01d5e833                  or      a6,a1,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+      return (void *)&ptr8[i];
+    }
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200041da:       |  /----------------- 050ef763                  bgeu    t4,a6,20004228 <memchr+0x82>
+200041de:       |  |                  010105b7                  lui     a1,0x1010
+200041e2:       |  |                  10158593                  addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+200041e6:       |  |                  02be02b3                  mul     t0,t3,a1
+200041ea:       |  |                  0ff00893                  li      a7,255
+200041ee:       |  |                  65c1                      lui     a1,0x10
+200041f0:       |  |                  f0058393                  addi    t2,a1,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+200041f4:       |  |                  00ff0337                  lui     t1,0xff0
+/proc/self/cwd/sw/device/lib/base/memory.c:204
+    uint32_t word = read_32(&ptr8[i]);
+200041f8:       |  |              /-> 01d505b3                  add     a1,a0,t4
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200041fc:       |  |              |   4194                      lw      a3,0(a1)
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:205
+    uint32_t bits_eq = ~(word ^ value32);
+200041fe:       |  |              |   0056c7b3                  xor     a5,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:208
+    static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+                  "memchr assumes that the system is little endian.");
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+20004202:       |  |              |   40f8f733                  andn    a4,a7,a5
+20004206:       +--|--------------|-- 03170f63                  beq     a4,a7,20004244 <memchr+0x9e>
+2000420a:       |  |              |   4056c6b3                  xnor    a3,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:211
+      return (void *)&ptr8[i];
+    }
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+2000420e:       |  |              |   0076f733                  and     a4,a3,t2
+20004212:       |  |  /-----------|-- 02770b63                  beq     a4,t2,20004248 <memchr+0xa2>
+/proc/self/cwd/sw/device/lib/base/memory.c:214
+      return (void *)&ptr8[i + 1];
+    }
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+20004216:       |  |  |           |   0066f6b3                  and     a3,a3,t1
+2000421a:       |  |  |  /--------|-- 02668963                  beq     a3,t1,2000424c <memchr+0xa6>
+/proc/self/cwd/sw/device/lib/base/memory.c:217
+      return (void *)&ptr8[i + 2];
+    }
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+2000421e:       |  |  |  |        |   83e1                      srli    a5,a5,0x18
+20004220:       |  |  |  |  /-----|-- cb85                      beqz    a5,20004250 <memchr+0xaa>
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004222:       |  |  |  |  |     |   0e91                      addi    t4,t4,4
+20004224:       |  |  |  |  |     \-- fd0eeae3                  bltu    t4,a6,200041f8 <memchr+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+      return (void *)&ptr8[i + 3];
+    }
+  }
+  for (; i < len; ++i) {
+20004228:       |  \--|--|--|--/----X 00cefd63                  bgeu    t4,a2,20004242 <memchr+0x9c>
+2000422c:       |     |  |  |  |      41d60633                  sub     a2,a2,t4
+20004230:       |     |  |  |  |      01d505b3                  add     a1,a0,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:222
+    if (ptr8[i] == value8) {
+20004234:       |     |  |  |  |  /-> 0005c503                  lbu     a0,0(a1)
+20004238:       +-----|--|--|--|--|-- 01c50663                  beq     a0,t3,20004244 <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+  for (; i < len; ++i) {
+2000423c:       |     |  |  |  |  |   167d                      addi    a2,a2,-1
+2000423e:       |     |  |  |  |  |   0585                      addi    a1,a1,1
+20004240:       |     |  |  |  |  \-- fa75                      bnez    a2,20004234 <memchr+0x8e>
+20004242:       |     |  |  |  \----> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/base/memory.c:227
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+20004244:       >-----|--|--|-------> 852e                      mv      a0,a1
+20004246:       |     |  |  |         8082                      ret
+/proc/self/cwd/sw/device/lib/base/memory.c:212
+      return (void *)&ptr8[i + 1];
+20004248:       |     \--|--|-------> 0585                      addi    a1,a1,1
+2000424a:       +--------|--|-------- bfed                      j       20004244 <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:215
+      return (void *)&ptr8[i + 2];
+2000424c:       |        \--|-------> 0589                      addi    a1,a1,2
+2000424e:       +-----------|-------- bfdd                      j       20004244 <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:218
+      return (void *)&ptr8[i + 3];
+20004250:       |           \-------> 058d                      addi    a1,a1,3
+20004252:       \-------------------- bfcd                      j       20004244 <memchr+0x9e>
+
+20004254 <memrchr>:
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:229
+
+void *OT_PREFIX_IF_NOT_RV32(memrchr)(const void *ptr, int value, size_t len) {
+20004254:                          4691                 li      a3,4
+20004256:                          82b2                 mv      t0,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004258:                      /-- 00d66663             bltu    a2,a3,20004264 <memrchr+0x10>
+2000425c:                      |   40a006b3             neg     a3,a0
+20004260:                      |   0036f293             andi    t0,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+20004264:                      \-> 405606b3             sub     a3,a2,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+20004268:                          9af1                 andi    a3,a3,-4
+2000426a:                          0056e7b3             or      a5,a3,t0
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:237
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+
+  size_t end = len;
+  for (; end > tail_offset; --end) {
+2000426e:                          0ac7d3b3             minu    t2,a5,a2
+20004272:                          00c50733             add     a4,a0,a2
+20004276:                          0ff5f313             andi    t1,a1,255
+2000427a:                   /--/-X 00c7fc63             bgeu    a5,a2,20004292 <memrchr+0x3e>
+/proc/self/cwd/sw/device/lib/base/memory.c:239
+    const size_t i = end - 1;
+    if (ptr8[i] == value8) {
+2000427e:                   |  |   fff74683             lbu     a3,-1(a4)
+20004282:                   |  |   fff70593             addi    a1,a4,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:238
+    const size_t i = end - 1;
+20004286:                   |  |   167d                 addi    a2,a2,-1
+20004288:                   |  |   872e                 mv      a4,a1
+2000428a:                   |  \-- fe6698e3             bne     a3,t1,2000427a <memrchr+0x26>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+    if (ptr8[i] == value8) {
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+2000428e:       /-----------|----> 852e                 mv      a0,a1
+20004290:       |           |      8082                 ret
+20004292:       |           \----> 010105b7             lui     a1,0x1010
+20004296:       |                  10158593             addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+repeat_byte_to_u32():
+/proc/self/cwd/sw/device/lib/base/memory.c:58
+  return word << 24 | word << 16 | word << 8 | word;
+2000429a:       |                  02b305b3             mul     a1,t1,a1
+2000429e:       |                  00ff0837             lui     a6,0xff0
+200042a2:       |                  6641                 lui     a2,0x10
+200042a4:       |                  f0060613             addi    a2,a2,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+200042a8:       |                  0ff00893             li      a7,255
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:244
+  for (; end > body_offset; end -= sizeof(uint32_t)) {
+200042ac:       |           /--/-X 0272fc63             bgeu    t0,t2,200042e4 <memrchr+0x90>
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:88
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+200042b0:       |           |  |   007507b3             add     a5,a0,t2
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200042b4:       |           |  |   ffc7a703             lw      a4,-4(a5)
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:247
+    uint32_t bits_eq = ~(word ^ value32);
+200042b8:       |           |  |   00b746b3             xor     a3,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:250
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+200042bc:       |           |  |   82e1                 srli    a3,a3,0x18
+200042be:       |  /--------|--|-- ce9d                 beqz    a3,200042fc <memrchr+0xa8>
+200042c0:       |  |        |  |   40b74733             xnor    a4,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:253
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+200042c4:       |  |        |  |   010776b3             and     a3,a4,a6
+200042c8:       |  |  /-----|--|-- 03068d63             beq     a3,a6,20004302 <memrchr+0xae>
+/proc/self/cwd/sw/device/lib/base/memory.c:256
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+200042cc:       |  |  |     |  |   00c776b3             and     a3,a4,a2
+200042d0:       |  |  |  /--|--|-- 02c68c63             beq     a3,a2,20004308 <memrchr+0xb4>
+/proc/self/cwd/sw/device/lib/base/memory.c:259
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+200042d4:       |  |  |  |  |  |   0ff77693             andi    a3,a4,255
+/proc/self/cwd/sw/device/lib/base/memory.c:245
+    const size_t i = end - sizeof(uint32_t);
+200042d8:       |  |  |  |  |  |   13f1                 addi    t2,t2,-4
+200042da:       |  |  |  |  |  \-- fd1699e3             bne     a3,a7,200042ac <memrchr+0x58>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+}
+200042de:       |  |  |  |  |      007505b3             add     a1,a0,t2
+200042e2:       +--|--|--|--|----- b775                 j       2000428e <memrchr+0x3a>
+200042e4:       |  |  |  |  \----> 951e                 add     a0,a0,t2
+200042e6:       |  |  |  |  /--/-X 02038463             beqz    t2,2000430e <memrchr+0xba>
+/proc/self/cwd/sw/device/lib/base/memory.c:265
+    if (ptr8[i] == value8) {
+200042ea:       |  |  |  |  |  |   fff54603             lbu     a2,-1(a0)
+200042ee:       |  |  |  |  |  |   fff50593             addi    a1,a0,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:264
+    const size_t i = end - 1;
+200042f2:       |  |  |  |  |  |   13fd                 addi    t2,t2,-1
+200042f4:       |  |  |  |  |  |   852e                 mv      a0,a1
+200042f6:       |  |  |  |  |  \-- fe6618e3             bne     a2,t1,200042e6 <memrchr+0x92>
+200042fa:       +--|--|--|--|----- bf51                 j       2000428e <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:251
+      return (void *)&ptr8[i + 3];
+200042fc:       |  \--|--|--|----> fff78593             addi    a1,a5,-1
+20004300:       +-----|--|--|----- b779                 j       2000428e <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:254
+      return (void *)&ptr8[i + 2];
+20004302:       |     \--|--|----> ffe78593             addi    a1,a5,-2
+20004306:       +--------|--|----- b761                 j       2000428e <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:257
+      return (void *)&ptr8[i + 1];
+20004308:       |        \--|----> ffd78593             addi    a1,a5,-3
+2000430c:       +-----------|----- b749                 j       2000428e <memrchr+0x3a>
+2000430e:       |           \----> 4581                 li      a1,0
+20004310:       \----------------- bfbd                 j       2000428e <memrchr+0x3a>
+
+20004312 <udiv64_slow>:
+udiv64_slow():
+/proc/self/cwd/sw/device/lib/base/math.c:14
+/**
+ * Extern declaration of inline function.
+ */
+extern size_t ceil_div(size_t a, size_t b);
+
+uint64_t udiv64_slow(uint64_t a, uint64_t b, uint64_t *rem_out) {
+20004312:                 1141                  addi    sp,sp,-16
+20004314:                 c622                  sw      s0,12(sp)
+20004316:                 4881                  li      a7,0
+20004318:                 4801                  li      a6,0
+2000431a:                 4381                  li      t2,0
+2000431c:                 4e01                  li      t3,0
+2000431e:                 03f00f93              li      t6,63
+20004322:                 00159293              slli    t0,a1,0x1
+20004326:                 537d                  li      t1,-1
+/proc/self/cwd/sw/device/lib/base/math.c:28
+  // upon.
+  size_t bits = sizeof(uint64_t) * 8;
+  for (size_t i = 0; i < bits; ++i) {
+    rem <<= 1;
+    quot <<= 1;
+    rem |= (a >> (bits - i - 1)) & 1;
+20004328:       /-------> fe0f8793              addi    a5,t6,-32
+2000432c:       |     /-- 0007c563              bltz    a5,20004336 <udiv64_slow+0x24>
+20004330:       |     |   01f5deb3              srl     t4,a1,t6
+20004334:       |  /--|-- a809                  j       20004346 <udiv64_slow+0x34>
+20004336:       |  |  \-> 01f55eb3              srl     t4,a0,t6
+2000433a:       |  |      ffffc793              not     a5,t6
+2000433e:       |  |      00f297b3              sll     a5,t0,a5
+20004342:       |  |      00feeeb3              or      t4,t4,a5
+20004346:       |  \----> 01f3d793              srli    a5,t2,0x1f
+2000434a:       |         0e06                  slli    t3,t3,0x1
+2000434c:       |         00fe6e33              or      t3,t3,a5
+20004350:       |         0386                  slli    t2,t2,0x1
+20004352:       |         001ef793              andi    a5,t4,1
+20004356:       |         0077eeb3              or      t4,a5,t2
+/proc/self/cwd/sw/device/lib/base/math.c:34
+
+    // We need to keep bringing down zeros until `rem`, the running total, is
+    // large enough that we can subtract off `b`; this tells us the value we
+    // would have had to multiply `a` by to produce this current step in the
+    // division.
+    if (rem >= b) {
+2000435a:       |  /----- 00de0563              beq     t3,a3,20004364 <udiv64_slow+0x52>
+2000435e:       |  |      00de37b3              sltu    a5,t3,a3
+20004362:       |  |  /-- a019                  j       20004368 <udiv64_slow+0x56>
+20004364:       |  \--|-> 00ceb7b3              sltu    a5,t4,a2
+20004368:       |     \-> 0017cf13              xori    t5,a5,1
+2000436c:       |         01f8d793              srli    a5,a7,0x1f
+20004370:       |         0806                  slli    a6,a6,0x1
+20004372:       |         00f86833              or      a6,a6,a5
+20004376:       |         0886                  slli    a7,a7,0x1
+20004378:       |         41e007b3              neg     a5,t5
+2000437c:       |         00d7f433              and     s0,a5,a3
+20004380:       |         8ff1                  and     a5,a5,a2
+20004382:       |         40fe83b3              sub     t2,t4,a5
+20004386:       |         00feb7b3              sltu    a5,t4,a5
+2000438a:       |         408e0433              sub     s0,t3,s0
+2000438e:       |         40f40e33              sub     t3,s0,a5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+20004392:       |         1ffd                  addi    t6,t6,-1
+/proc/self/cwd/sw/device/lib/base/math.c:34
+    if (rem >= b) {
+20004394:       |         01e8e8b3              or      a7,a7,t5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+20004398:       \-------- f86f98e3              bne     t6,t1,20004328 <udiv64_slow+0x16>
+/proc/self/cwd/sw/device/lib/base/math.c:40
+      rem -= b;
+      quot |= 1;
+    }
+  }
+
+  if (rem_out != NULL) {
+2000439c:             /-- c709                  beqz    a4,200043a6 <udiv64_slow+0x94>
+/proc/self/cwd/sw/device/lib/base/math.c:41
+    *rem_out = rem;
+2000439e:             |   00772023              sw      t2,0(a4)
+200043a2:             |   01c72223              sw      t3,4(a4)
+/proc/self/cwd/sw/device/lib/base/math.c:43
+  }
+  return quot;
+200043a6:             \-> 8546                  mv      a0,a7
+200043a8:                 85c2                  mv      a1,a6
+200043aa:                 4432                  lw      s0,12(sp)
+200043ac:                 0141                  addi    sp,sp,16
+200043ae:                 8082                  ret
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.signed.bin b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.signed.bin
new file mode 100644
index 0000000000000..fe2dd2853baea
Binary files /dev/null and b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_fpga_cw310_sival.signed.bin differ
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.dis b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.dis
new file mode 100644
index 0000000000000..2ec4e57296b43
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.dis
@@ -0,0 +1,22507 @@
+
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_silicon_creator.elf:     file format elf32-littleriscv
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_silicon_creator.elf
+architecture: riscv:rv32, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x20000480
+
+Program Header:
+    LOAD off    0x000000d4 vaddr 0x00000000 paddr 0x00000000 align 2**12
+         filesz 0x00000000 memsz 0x00000000 flags ---
+    LOAD off    0x00001000 vaddr 0x20000000 paddr 0x20000000 align 2**12
+         filesz 0x000065b0 memsz 0x000065b0 flags rwx
+    LOAD off    0x00007fe8 vaddr 0x10001fe8 paddr 0x200065b0 align 2**12
+         filesz 0x00000084 memsz 0x00000330 flags rw-
+    LOAD off    0x00000318 vaddr 0x10002318 paddr 0x20006634 align 2**12
+         filesz 0x00000000 memsz 0x00008000 flags rw-
+    LOAD off    0x00000000 vaddr 0x20079000 paddr 0x20079000 align 2**12
+         filesz 0x00000000 memsz 0x00000800 flags rw-
+
+Sections:
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+  2 .rom_ext_immutable       00000000  20000400  20000400  0000806c  2**2  CONTENTS
+  3 .vectors                 00000080  20000400  20000400  00001400  2**8  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  4 .crt                     000000c6  20000480  20000480  00001480  2**2  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  5 .init_array              00000000  20000548  20000548  0000806c  2**2  CONTENTS, ALLOC, LOAD, DATA
+  6 .text                    00003e48  20000548  20000548  00001548  2**2  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  7 .shutdown                00000000  20004390  20004390  0000806c  2**2  CONTENTS
+  8 .rodata                  00002220  20004390  20004390  00005390  2**3  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  9 .data                    00000084  10001fe8  200065b0  00007fe8  2**2  CONTENTS, ALLOC, LOAD, DATA
+ 10 .bss                     000002ac  1000206c  20006634  0000806c  2**2  ALLOC
+ 11 .freertos.heap           00008000  10002318  20006634  00008318  2**2  ALLOC
+ 12 .non_volatile_counter_3  00000800  20079000  20079000  00009000  2**11  ALLOC
+ 13 .non_volatile_counter_2  00000800  20079800  20079800  00000000  2**11  ALLOC
+ 14 .non_volatile_counter_1  00000800  2007a000  2007a000  00000000  2**11  ALLOC
+ 15 .non_volatile_counter_0  00000800  2007a800  2007a800  00000000  2**11  ALLOC
+ 16 .non_volatile_scratch    00005000  2007b000  2007b000  00000000  2**11  ALLOC
+ 17 .logs.fields             00000518  00000000  00000000  0000806c  2**2  CONTENTS, READONLY
+ 18 .riscv.attributes        00000042  00000000  00000000  00008584  2**0  CONTENTS, READONLY
+ 19 .debug_info              0001a284  00000000  00000000  000085c6  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 20 .debug_abbrev            00004337  00000000  00000000  0002284a  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 21 .debug_aranges           00000088  00000000  00000000  00026b81  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 22 .debug_line              0000ff45  00000000  00000000  00026c09  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 23 .debug_loc               0000f23c  00000000  00000000  00036b4e  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 24 .debug_ranges            000017a0  00000000  00000000  00045d8a  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 25 .debug_str               0000adb5  00000000  00000000  0004752a  2**0  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 26 .debug_frame             00001ddc  00000000  00000000  000522e0  2**2  CONTENTS, READONLY, DEBUGGING, OCTETS
+ 27 .ot.status_create_record 00000780  00000000  00000000  000540bc  2**2  CONTENTS, READONLY
+SYMBOL TABLE:
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+00000000 l    d  .riscv.attributes      00000000 .riscv.attributes
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+100027e8 g       .data  00000000 __global_pointer$
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+20004390 g       .shutdown      00000000 _text_end
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+200020e6 g     F .text  00000160 ottf_generic_fault_print
+00010000 g       .static_critical       00000000 _chip_info_end
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+2000260c g     F .text  0000000e dif_rv_core_ibex_init
+200062c8 g     O .rodata        000002e8 top_earlgrey_plic_interrupt_for_peripheral
+200062b0 g     O .rodata        00000008 kClockFreqPeripheralHz
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+20000400 g       .rom_ext_immutable     00000000 _rom_ext_immutable_start
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+20080000 g       .non_volatile_scratch  00000000 end_of_non_volatile_scratch
+200022b4  w    F .text  00000022 ottf_illegal_instr_fault_handler
+20005e68 g     O .rodata        00000004 kDifRvPlicMinPriority
+20003fca g     F .text  00000002 vPortFree
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+00000000 g       *ABS*  00000000 __DYNAMIC
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+10002318 g     O .freertos.heap 00008000 ucHeap
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+20000548 g       .init_array    00000000 _init_array_end
+20002800 g     F .text  00000032 base_log_internal_dv
+20006634 g       *ABS*  00000000 _data_init_end
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+2000274c g     F .text  00000006 abort
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+20003f48 g     F .text  00000082 pvPortMalloc
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+10002318 g       .bss   00000000 _bss_end
+20000abc g     F .text  0000000e dif_gpio_output_set_enabled_all
+20003fcc  w    F .text  00000004 manufacturer_pre_test_hook
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+20000e7c g     F .text  00000002 coverage_send_buffer
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+20002836 g     F .text  0000000a get_spi_device_sink
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+20000000 g       .static_critical       00000000 _ottf_start_address
+20000548 g       .init_array    00000000 _init_array_start
+20000b02 g     F .text  0000002a status_report
+2000261a g     F .text  000000ce test_status_set
+2000338c g     F .text  0000001c dif_spi_device_irq_acknowledge
+20002764 g     F .text  0000009c base_log_internal_core
+200007ac g     F .text  00000068 ottf_isr_exit
+20000704 g     F .text  00000054 handler_irq_external
+20003598 g     F .text  00000026 dif_spi_device_pop_flash_command_fifo
+
+
+
+Disassembly of section .vectors:
+
+20000400 <_ottf_interrupt_vector>:
+_ottf_interrupt_vector():
+20000400:       2080006f                j       20000608 <handler_exception>
+20000404:       c0001073                unimp
+20000408:       c0001073                unimp
+2000040c:       2500006f                j       2000065c <handler_irq_software>
+20000410:       c0001073                unimp
+20000414:       c0001073                unimp
+20000418:       c0001073                unimp
+2000041c:       2940006f                j       200006b0 <handler_irq_timer>
+20000420:       c0001073                unimp
+20000424:       c0001073                unimp
+20000428:       c0001073                unimp
+2000042c:       2d80006f                j       20000704 <handler_irq_external>
+20000430:       c0001073                unimp
+20000434:       c0001073                unimp
+20000438:       c0001073                unimp
+2000043c:       c0001073                unimp
+20000440:       c0001073                unimp
+20000444:       c0001073                unimp
+20000448:       c0001073                unimp
+2000044c:       c0001073                unimp
+20000450:       c0001073                unimp
+20000454:       c0001073                unimp
+20000458:       c0001073                unimp
+2000045c:       c0001073                unimp
+20000460:       c0001073                unimp
+20000464:       c0001073                unimp
+20000468:       c0001073                unimp
+2000046c:       c0001073                unimp
+20000470:       c0001073                unimp
+20000474:       c0001073                unimp
+20000478:       c0001073                unimp
+2000047c:       2dc0006f                j       20000758 <handler_irq_internal>
+
+Disassembly of section .crt:
+
+20000480 <_ottf_start>:
+_ottf_start():
+20000480:       f0002197                auipc   gp,0xf0002
+20000484:       36818193                addi    gp,gp,872 # 100027e8 <__global_pointer$>
+20000488:       f0020117                auipc   sp,0xf0020
+2000048c:       af810113                addi    sp,sp,-1288 # 1001ff80 <_exception_frame_start>
+20000490:       00000297                auipc   t0,0x0
+20000494:       f7128293                addi    t0,t0,-143 # 20000401 <_ottf_interrupt_vector+0x1>
+20000498:       30529073                csrw    mtvec,t0
+2000049c:       f0002517                auipc   a0,0xf0002
+200004a0:       b4c50513                addi    a0,a0,-1204 # 10001fe8 <status_codes>
+200004a4:       88418593                addi    a1,gp,-1916 # 1000206c <gpio>
+200004a8:       00006617                auipc   a2,0x6
+200004ac:       10860613                addi    a2,a2,264 # 200065b0 <_data_init_start>
+200004b0:       28b1                    jal     2000050c <crt_section_copy>
+200004b2:       f0002517                auipc   a0,0xf0002
+200004b6:       bba50513                addi    a0,a0,-1094 # 1000206c <gpio>
+200004ba:       f0002597                auipc   a1,0xf0002
+200004be:       e5e58593                addi    a1,a1,-418 # 10002318 <ucHeap>
+200004c2:       201d                    jal     200004e8 <crt_section_clear>
+200004c4:       00000417                auipc   s0,0x0
+200004c8:       08440413                addi    s0,s0,132 # 20000548 <xPortStartFirstTask>
+200004cc:       00000497                auipc   s1,0x0
+200004d0:       07c48493                addi    s1,s1,124 # 20000548 <xPortStartFirstTask>
+200004d4:       00947863                bgeu    s0,s1,200004e4 <init_array_loop_end>
+
+200004d8 <init_array_loop>:
+200004d8:       /-> 00042283            lw      t0,0(s0)
+200004dc:       |   9282                        jalr    t0
+200004de:       |   0411                        addi    s0,s0,4
+200004e0:       \-- fe946ce3            bltu    s0,s1,200004d8 <init_array_loop>
+
+200004e4 <init_array_loop_end>:
+200004e4:       6480006f                j       20000b2c <_ottf_main>
+
+200004e8 <crt_section_clear>:
+crt_section_clear():
+/proc/self/cwd/sw/device/lib/crt/crt.S:41
+  .global crt_section_clear
+  .type crt_section_clear, @function
+crt_section_clear:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_clear_nothing
+200004e8:       /-------- 00b57e63              bgeu    a0,a1,20000504 <crt_section_clear+0x1c>
+/proc/self/cwd/sw/device/lib/crt/crt.S:44
+
+  // Check that start and end are word aligned.
+  or   t0, a0, a1
+200004ec:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:45
+  andi t0, t0, 0x3
+200004f0:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:46
+  bnez t0, .L_clear_error
+200004f4:       |  /----- 00029b63              bnez    t0,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:51
+
+.L_clear_loop:
+  // Write zero into section memory word-by-word.
+  // TODO: unroll
+  sw   zero, 0(a0)
+200004f8:       |  |  /-> 00052023              sw      zero,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:52
+  addi a0, a0, 4
+200004fc:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:53
+  bltu a0, a1, .L_clear_loop
+200004fe:       |  |  \-- feb56de3              bltu    a0,a1,200004f8 <crt_section_clear+0x10>
+/proc/self/cwd/sw/device/lib/crt/crt.S:54
+  ret
+20000502:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:59
+
+.L_clear_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_clear_error
+20000504:       \--+----X 00b51363              bne     a0,a1,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:60
+  ret
+20000508:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:63
+
+.L_clear_error:
+  unimp
+2000050a:          \----> 0000                  unimp
+
+2000050c <crt_section_copy>:
+crt_section_copy():
+/proc/self/cwd/sw/device/lib/crt/crt.S:95
+  .global crt_section_copy
+  .type crt_section_copy, @function
+crt_section_copy:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_copy_nothing
+2000050c:       /-------- 02b57963              bgeu    a0,a1,2000053e <crt_section_copy+0x32>
+/proc/self/cwd/sw/device/lib/crt/crt.S:98
+
+  // Check that start, end and src are word aligned.
+  or   t0, a0, a1
+20000510:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:99
+  or   t0, t0, a2
+20000514:       |         00c2e2b3              or      t0,t0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:100
+  andi t0, t0, 0x3
+20000518:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:101
+  bnez t0, .L_copy_error
+2000051c:       |  /----- 02029463              bnez    t0,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:118
+  //        +-------------+
+  //        |             |
+  //      start          end
+  //
+  // TODO: disallow all overlap since it indicates API misuse?
+  sub  t0, a0, a2           // (start - src) mod 2**32
+20000520:       |  |      40c502b3              sub     t0,a0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:119
+  sub  t1, a1, a0           // end - start
+20000524:       |  |      40a58333              sub     t1,a1,a0
+/proc/self/cwd/sw/device/lib/crt/crt.S:120
+  bltu t0, t1, .L_copy_error
+20000528:       |  +----- 0062ee63              bltu    t0,t1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:125
+
+.L_copy_loop:
+  // Copy data from src into section word-by-word.
+  // TODO: unroll
+  lw   t0, 0(a2)
+2000052c:       |  |  /-> 00062283              lw      t0,0(a2)
+/proc/self/cwd/sw/device/lib/crt/crt.S:126
+  addi a2, a2, 4
+20000530:       |  |  |   0611                  addi    a2,a2,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:127
+  sw   t0, 0(a0)
+20000532:       |  |  |   00552023              sw      t0,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:128
+  addi a0, a0, 4
+20000536:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:129
+  bltu a0, a1, .L_copy_loop
+20000538:       |  |  \-- feb56ae3              bltu    a0,a1,2000052c <crt_section_copy+0x20>
+/proc/self/cwd/sw/device/lib/crt/crt.S:130
+  ret
+2000053c:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:135
+
+.L_copy_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_copy_error
+2000053e:       \--+----X 00b51363              bne     a0,a1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:136
+  ret
+20000542:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:139
+
+.L_copy_error:
+  unimp
+20000544:          \----> 0000                  unimp
+
+Disassembly of section .text:
+
+20000548 <xPortStartFirstTask>:
+xPortStartFirstTask():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:18
+  .global xPortStartFirstTask
+  .type xPortStartFirstTask, @function
+xPortStartFirstTask:
+  // Load the stack pointer for the current TCB (just going to clobber sp here
+  // since we are setting it here anyway).
+  lw  sp, pxCurrentTCB
+20000548:       f0002117                auipc   sp,0xf0002
+2000054c:       b6412103                lw      sp,-1180(sp) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:19
+  lw  sp, 0(sp)
+20000550:       4102                    lw      sp,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:23
+
+  // NOTE: for starting the FreeRTOS scheduler, the exception return address is
+  // used as the function return address. See pxPortInitialiseStack below.
+  lw  ra, 0(sp)
+20000552:       4082                    lw      ra,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:26
+
+  // Restore registers initialized on task start.
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000554:       4332                    lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:27
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000556:       43c2                    lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:28
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000558:       4452                    lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:29
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000055a:       44e2                    lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:30
+  lw   a0,  7 * OTTF_WORD_SIZE(sp) // task parameters (pvParameters)
+2000055c:       4572                    lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:31
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000055e:       5582                    lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:32
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000560:       5612                    lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:33
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000562:       56a2                    lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:34
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000564:       5732                    lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:35
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000566:       57c2                    lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:36
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000568:       5852                    lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:37
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000056a:       58e2                    lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:38
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000056c:       5972                    lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:39
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000056e:       4986                    lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:40
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000570:       4a16                    lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:41
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000572:       4aa6                    lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:42
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000574:       4b36                    lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:43
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000576:       4bc6                    lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:44
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000578:       4c56                    lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:45
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000057a:       4ce6                    lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:46
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000057c:       4d76                    lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:47
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000057e:       5d86                    lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:48
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000580:       5e16                    lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:49
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000582:       5ea6                    lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:50
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000584:       5f36                    lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:51
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000586:       5fc6                    lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:55
+
+  // Initialize t0 to the value of MSTATUS with global interrupts enabled, which
+  // is required because this returns with ret, not eret.
+  lw t0, 29 * OTTF_WORD_SIZE(sp) // Load the MSTATUS state from the stack.
+20000588:       52d6                    lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:56
+  ori t0, t0, 1<<3               // Set MIE field.
+2000058a:       0082e293                ori     t0,t0,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:57
+  csrw mstatus, t0               // Ibex interrupts enabled from here!
+2000058e:       30029073                csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:60
+
+  // Restore t0 register from the stack (after using it to manipulate MSTATUS).
+  lw t0, 2 * OTTF_WORD_SIZE(sp)
+20000592:       42a2                    lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:63
+
+  // Update the stack pointer (shrinking the stack).
+  addi sp, sp, OTTF_CONTEXT_SIZE
+20000594:       07810113                addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:65
+
+  ret
+20000598:       8082                    ret
+2000059a:       0001                    nop
+
+2000059c <pxPortInitialiseStack>:
+pxPortInitialiseStack():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:133
+  .balign 4
+  .global pxPortInitialiseStack
+  .type pxPortInitialiseStack, @function
+pxPortInitialiseStack:
+  // Setup the MSTATUS register.
+  csrr t0, mstatus
+2000059c:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:137
+  // Ensure interrupts are disabled when the stack is restored within an ISR.
+  // Required when a task is created after the scheduler has been started,
+  // otherwise interrupts would be disabled anyway.
+  andi t0, t0, ~0x8
+200005a0:       ff72f293                andi    t0,t0,-9
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:139
+  // Generate the value 0x1880, to set the MPIE and MPP bits in MSTATUS.
+  li t1, 0x188 << 4
+200005a4:       6309                    lui     t1,0x2
+200005a6:       88030313                addi    t1,t1,-1920 # 1880 <_epmp_reset_rx_size+0x1080>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:140
+  or t0, t0, t1
+200005aa:       0062e2b3                or      t0,t0,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:143
+
+  // Setup the stack frame detailed above (a0 holds the task stack pointer).
+  addi a0, a0, -OTTF_CONTEXT_SIZE
+200005ae:       f8850513                addi    a0,a0,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:145
+  // Push MSTATUS onto the stack.
+  sw t0, 29 * OTTF_WORD_SIZE(a0)
+200005b2:       06552a23                sw      t0,116(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:148
+
+  // Push task parameters (pvParameters that is in x12/a2, on the stack.
+  sw a2, 7 * OTTF_WORD_SIZE(a0)
+200005b6:       cd50                    sw      a2,28(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:150
+  // Push 0 for the portTASK_RETURN_ADDRESS for now.
+  sw zero, 1 * OTTF_WORD_SIZE(a0)
+200005b8:       00052223                sw      zero,4(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:155
+  // Push the pointer to the task's entry point (pxCode) onto the stack. This
+  // will be loaded into either ra (in xPortStartFirstTask) or mepc (in
+  // freertosIrqExit), so that when ret/mret is called control flow will be
+  // transferred accordingly.
+  sw a1, 0(a0)
+200005bc:       c10c                    sw      a1,0(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:157
+
+  ret
+200005be:       8082                    ret
+
+200005c0 <compute_mepc_on_synchronous_irq>:
+compute_mepc_on_synchronous_irq():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:32
+   * address below will cause another exception.
+   */
+  .balign 4
+  .type compute_mepc_on_synchronous_irq, @function
+compute_mepc_on_synchronous_irq:
+  csrr t0, mepc
+200005c0:           341022f3            csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:33
+  csrr t1, mcause
+200005c4:           34202373            csrr    t1,mcause
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:34
+  li t2, 0x01
+200005c8:           4385                        li      t2,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:35
+  bne t1, t2, .L_load_mepc
+200005ca:       /-- 00731363            bne     t1,t2,200005d0 <compute_mepc_on_synchronous_irq+0x10>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:36
+  ret
+200005ce:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:38
+.L_load_mepc:
+  lh t2, 0(t0)
+200005d0:       \-> 00029383            lh      t2,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:39
+  li t1, 0x3
+200005d4:           430d                        li      t1,3
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:40
+  and t3, t2, t1
+200005d6:           0063fe33            and     t3,t2,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:41
+  beq t3, t1, .L_32bit_trap_instr
+200005da:       /-- 006e0463            beq     t3,t1,200005e2 <compute_mepc_on_synchronous_irq+0x22>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:42
+  addi t0, t0, OTTF_HALF_WORD_SIZE
+200005de:       |   0289                        addi    t0,t0,2
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:43
+  ret
+200005e0:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:45
+.L_32bit_trap_instr:
+  addi t0, t0, OTTF_WORD_SIZE
+200005e2:       \-> 0291                        addi    t0,t0,4
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:46
+  ret
+200005e4:           8082                        ret
+200005e6:           0001                        nop
+
+200005e8 <save_current_sp_to_tcb>:
+save_current_sp_to_tcb():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:61
+   * exception, if we attempt to perform a store to said address.
+   */
+  .balign 4
+  .type save_current_sp_to_tcb, @function
+save_current_sp_to_tcb:
+  la t0, kOttfTestConfig
+200005e8:           00004297            auipc   t0,0x4
+200005ec:           01828293            addi    t0,t0,24 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:62
+  lb t1, 0(t0)
+200005f0:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:63
+  beqz t1, .L_skip_sp_save
+200005f4:       /-- 00030863            beqz    t1,20000604 <save_current_sp_to_tcb+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:64
+  lw t2, pxCurrentTCB
+200005f8:       |   f0002397            auipc   t2,0xf0002
+200005fc:       |   ab43a383            lw      t2,-1356(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:65
+  sw sp, 0(t2)
+20000600:       |   0023a023            sw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:67
+.L_skip_sp_save:
+  ret
+20000604:       \-> 8082                        ret
+20000606:           0001                        nop
+
+20000608 <handler_exception>:
+handler_exception():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:80
+  .balign 4
+  .global handler_exception
+  .type handler_exception, @function
+handler_exception:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000608:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:81
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000060c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:82
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000060e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:83
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000610:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:84
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000612:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:85
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000614:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:86
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000616:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:87
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000618:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:88
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000061a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:89
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000061c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:90
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000061e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:91
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000620:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:92
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000622:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:93
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000624:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:94
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000626:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:95
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000628:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:96
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000062a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:97
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000062c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:98
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000062e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:99
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000630:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:100
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000632:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:101
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000634:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:102
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000636:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:103
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000638:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:104
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000063a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:105
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000063c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:106
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000063e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:107
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000640:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:108
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000642:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:111
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000644:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:112
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000648:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:116
+
+  // Save MEPC to the stack after updating it to the next instruction (since
+  // this is a synchronous IRQ).
+  jal compute_mepc_on_synchronous_irq
+2000064a:       3f9d                    jal     200005c0 <compute_mepc_on_synchronous_irq>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:117
+  sw t0, 0(sp)
+2000064c:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:121
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000064e:       3f69                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:124
+
+  // Jump to the exception handler.
+  mv a0, sp
+20000650:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:125
+  jal ottf_exception_handler
+20000652:       3f5010ef                jal     ra,20002246 <ottf_exception_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:128
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000656:       1560006f                j       200007ac <ottf_isr_exit>
+2000065a:       0001                    nop
+
+2000065c <handler_irq_software>:
+handler_irq_software():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:141
+  .balign 4
+  .global handler_irq_software
+  .type handler_irq_software, @function
+handler_irq_software:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+2000065c:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:142
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000660:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:143
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+20000662:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:144
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000664:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:145
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000666:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:146
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000668:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:147
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000066a:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:148
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+2000066c:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:149
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000066e:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:150
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000670:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:151
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000672:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:152
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000674:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:153
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000676:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:154
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000678:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:155
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000067a:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:156
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000067c:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:157
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000067e:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:158
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000680:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:159
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000682:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:160
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000684:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:161
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000686:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:162
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000688:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:163
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000068a:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:164
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000068c:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:165
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000068e:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:166
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000690:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:167
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000692:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:168
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000694:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:169
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000696:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:172
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000698:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:173
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+2000069c:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:177
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000069e:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:178
+  sw t0, 0(sp)
+200006a2:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:182
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006a4:       3791                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:185
+
+  // Jump to the software ISR.
+  mv a0, sp
+200006a6:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:186
+  jal ottf_software_isr
+200006a8:       42f010ef                jal     ra,200022d6 <ottf_software_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:189
+
+  // Return from ISR.
+  j ottf_isr_exit
+200006ac:       1000006f                j       200007ac <ottf_isr_exit>
+
+200006b0 <handler_irq_timer>:
+handler_irq_timer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:202
+  .balign 4
+  .global handler_irq_timer
+  .type handler_irq_timer, @function
+handler_irq_timer:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+200006b0:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:203
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+200006b4:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:204
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+200006b6:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:205
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+200006b8:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:206
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+200006ba:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:207
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+200006bc:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:208
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+200006be:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:209
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+200006c0:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:210
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+200006c2:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:211
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+200006c4:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:212
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+200006c6:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:213
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+200006c8:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:214
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+200006ca:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:215
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+200006cc:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:216
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+200006ce:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:217
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+200006d0:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:218
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+200006d2:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:219
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+200006d4:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:220
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+200006d6:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:221
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+200006d8:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:222
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+200006da:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:223
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+200006dc:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:224
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+200006de:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:225
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+200006e0:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:226
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+200006e2:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:227
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+200006e4:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:228
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+200006e6:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:229
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+200006e8:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:230
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+200006ea:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:233
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+200006ec:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:234
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+200006f0:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:238
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+200006f2:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:239
+  sw t0, 0(sp)
+200006f6:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:243
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006f8:       3dc5                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:246
+
+  // Jump to timer ISR.
+  mv a0, sp
+200006fa:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:247
+  jal ottf_timer_isr
+200006fc:       3f5010ef                jal     ra,200022f0 <ottf_timer_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:250
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000700:       0ac0006f                j       200007ac <ottf_isr_exit>
+
+20000704 <handler_irq_external>:
+handler_irq_external():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:263
+  .balign 4
+  .global handler_irq_external
+  .type handler_irq_external, @function
+handler_irq_external:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000704:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:264
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000708:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:265
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000070a:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:266
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+2000070c:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:267
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+2000070e:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:268
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000710:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:269
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000712:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:270
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000714:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:271
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+20000716:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:272
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000718:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:273
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000071a:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:274
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+2000071c:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:275
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+2000071e:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:276
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000720:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:277
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000722:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:278
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000724:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:279
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+20000726:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:280
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000728:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:281
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000072a:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:282
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+2000072c:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:283
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+2000072e:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:284
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000730:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:285
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000732:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:286
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000734:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:287
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000736:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:288
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000738:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:289
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000073a:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:290
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+2000073c:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:291
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000073e:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:294
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000740:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:295
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000744:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:299
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+20000746:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:300
+  sw t0, 0(sp)
+2000074a:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:304
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000074c:       3d71                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:307
+
+  // Jump to external ISR.
+  mv a0, sp
+2000074e:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:308
+  jal ottf_external_isr
+20000750:       3bb010ef                jal     ra,2000230a <ottf_external_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:311
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000754:       0580006f                j       200007ac <ottf_isr_exit>
+
+20000758 <handler_irq_internal>:
+handler_irq_internal():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:324
+  .balign 4
+  .global handler_irq_internal
+  .type handler_irq_internal, @function
+handler_irq_internal:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000758:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:325
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000075c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:326
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000075e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:327
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000760:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:328
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000762:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:329
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000764:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:330
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000766:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:331
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000768:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:332
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000076a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:333
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000076c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:334
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000076e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:335
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000770:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:336
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000772:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:337
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000774:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:338
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000776:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:339
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000778:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:340
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000077a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:341
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000077c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:342
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000077e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:343
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000780:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:344
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000782:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:345
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000784:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:346
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000786:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:347
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000788:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:348
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000078a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:349
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000078c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:350
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000078e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:351
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000790:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:352
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000792:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:355
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000794:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:356
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000798:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:360
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000079a:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:361
+  sw t0, 0(sp)
+2000079e:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:365
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200007a0:       35a1                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:368
+
+  // Jump to the internal ISR.
+  mv a0, sp
+200007a2:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:369
+  jal ottf_internal_isr
+200007a4:       44d010ef                jal     ra,200023f0 <ottf_internal_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:372
+
+  // Return from ISR.
+  j ottf_isr_exit
+200007a8:       0040006f                j       200007ac <ottf_isr_exit>
+
+200007ac <ottf_isr_exit>:
+ottf_isr_exit():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:389
+  // Load the stack pointer for the current task control block (TCB), only if
+  // the `enable_concurrency` flag is set in the test configuration struct,
+  // meaning a test is run as a FreeRTOS task, where each task maintains its own
+  // stack. Otherwise, the test is run on bare-metal, and there is no TCB, and
+  // only a single stack/stack pointer.
+  la t0, kOttfTestConfig
+200007ac:           00004297            auipc   t0,0x4
+200007b0:           e5428293            addi    t0,t0,-428 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:390
+  lb t1, 0(t0)
+200007b4:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:391
+  beqz t1, .L_skip_sp_restore
+200007b8:       /-- 00030863            beqz    t1,200007c8 <ottf_isr_exit+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:392
+  lw  t2, pxCurrentTCB
+200007bc:       |   f0002397            auipc   t2,0xf0002
+200007c0:       |   8f03a383            lw      t2,-1808(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:393
+  lw  sp, 0(t2)
+200007c4:       |   0003a103            lw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:397
+.L_skip_sp_restore:
+
+  // Load the correct MEPC for the next instruction in the current task.
+  lw t0, 0(sp)
+200007c8:       \-> 4282                        lw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:398
+  csrw mepc, t0
+200007ca:           34129073            csrw    mepc,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:401
+
+  // Load MSTATUS for the MPIE bit.
+  lw  t0, 29 * OTTF_WORD_SIZE(sp)
+200007ce:           52d6                        lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:402
+  csrw mstatus, t0
+200007d0:           30029073            csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:405
+
+  // Restore all registers from the stack.
+  lw   ra,  1 * OTTF_WORD_SIZE(sp)
+200007d4:           4092                        lw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:406
+  lw   t0,  2 * OTTF_WORD_SIZE(sp)
+200007d6:           42a2                        lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:407
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+200007d8:           4332                        lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:408
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+200007da:           43c2                        lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:409
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+200007dc:           4452                        lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:410
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+200007de:           44e2                        lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:411
+  lw   a0,  7 * OTTF_WORD_SIZE(sp)
+200007e0:           4572                        lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:412
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+200007e2:           5582                        lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:413
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+200007e4:           5612                        lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:414
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+200007e6:           56a2                        lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:415
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+200007e8:           5732                        lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:416
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+200007ea:           57c2                        lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:417
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+200007ec:           5852                        lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:418
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+200007ee:           58e2                        lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:419
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+200007f0:           5972                        lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:420
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+200007f2:           4986                        lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:421
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+200007f4:           4a16                        lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:422
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+200007f6:           4aa6                        lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:423
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+200007f8:           4b36                        lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:424
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+200007fa:           4bc6                        lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:425
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+200007fc:           4c56                        lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:426
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+200007fe:           4ce6                        lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:427
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000800:           4d76                        lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:428
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000802:           5d86                        lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:429
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000804:           5e16                        lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:430
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000806:           5ea6                        lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:431
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000808:           5f36                        lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:432
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000080a:           5fc6                        lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:433
+  addi sp, sp, OTTF_CONTEXT_SIZE
+2000080c:           07810113            addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:437
+
+  // This exits the ISR completely, and does not return control flow to the ISR
+  // that called this sub-routine.
+  mret
+20000810:           30200073            mret
+
+20000814 <test_main>:
+test_main():
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:23
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+static const dif_gpio_pin_t kGpioPinIoa5 = 0;
+
+bool test_main(void) {
+20000814:                 1141                  addi    sp,sp,-16
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:25
+  // Initialize pinmux and GPIO peripherals.
+  CHECK_DIF_OK(
+20000816:                 c606                  sw      ra,12(sp)
+20000818:                 c422                  sw      s0,8(sp)
+2000081a:                 f0002517              auipc   a0,0xf0002
+2000081e:                 85250593              addi    a1,a0,-1966 # 1000206c <gpio>
+20000822:                 40040537              lui     a0,0x40040
+20000826:                 2489                  jal     20000a68 <dif_gpio_init>
+20000828:                 00006417              auipc   s0,0x6
+2000082c:       /-------- cd05                  beqz    a0,20000864 <test_main+0x50>
+2000082e:       |         862a                  mv      a2,a0
+20000830:       |         a9c42503              lw      a0,-1380(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000834:       |  /----- cd01                  beqz    a0,2000084c <test_main+0x38>
+20000836:       |  |      e000f517              auipc   a0,0xe000f
+2000083a:       |  |      7ca50513              addi    a0,a0,1994 # 10000 <_chip_info_end>
+2000083e:       |  |      00400593              li      a1,4
+20000842:       |  |      952e                  add     a0,a0,a1
+20000844:       |  |      4585                  li      a1,1
+20000846:       |  |      7bb010ef              jal     ra,20002800 <base_log_internal_dv>
+2000084a:       |  |  /-- a801                  j       2000085a <test_main+0x46>
+2000084c:       |  \--|-> 00004517              auipc   a0,0x4
+20000850:       |     |   dcc50513              addi    a0,a0,-564 # 20004618 <test_main.log_fields>
+20000854:       |     |   85b2                  mv      a1,a2
+20000856:       |     |   70f010ef              jal     ra,20002764 <base_log_internal_core>
+2000085a:       |     \-> 6531                  lui     a0,0xc
+2000085c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000860:       |         5bb010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:27
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(dif_pinmux_init(
+20000864:       \-------> f0002517              auipc   a0,0xf0002
+20000868:                 80c50593              addi    a1,a0,-2036 # 10002070 <pinmux>
+2000086c:                 40460537              lui     a0,0x40460
+20000870:                 033010ef              jal     ra,200020a2 <dif_pinmux_init>
+20000874:       /-------- cd05                  beqz    a0,200008ac <test_main+0x98>
+20000876:       |         862a                  mv      a2,a0
+20000878:       |         a9c42503              lw      a0,-1380(s0)
+2000087c:       |  /----- cd01                  beqz    a0,20000894 <test_main+0x80>
+2000087e:       |  |      e000f517              auipc   a0,0xe000f
+20000882:       |  |      78250513              addi    a0,a0,1922 # 10000 <_chip_info_end>
+20000886:       |  |      01800593              li      a1,24
+2000088a:       |  |      952e                  add     a0,a0,a1
+2000088c:       |  |      4585                  li      a1,1
+2000088e:       |  |      773010ef              jal     ra,20002800 <base_log_internal_dv>
+20000892:       |  |  /-- a801                  j       200008a2 <test_main+0x8e>
+20000894:       |  \--|-> 00004517              auipc   a0,0x4
+20000898:       |     |   d9850513              addi    a0,a0,-616 # 2000462c <test_main.log_fields.4>
+2000089c:       |     |   85b2                  mv      a1,a2
+2000089e:       |     |   6c7010ef              jal     ra,20002764 <base_log_internal_core>
+200008a2:       |     \-> 6531                  lui     a0,0xc
+200008a4:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008a8:       |         573010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:29
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+200008ac:       \-------> f0001517              auipc   a0,0xf0001
+200008b0:                 7c450513              addi    a0,a0,1988 # 10002070 <pinmux>
+200008b4:                 4595                  li      a1,5
+200008b6:                 460d                  li      a2,3
+200008b8:                 7f8010ef              jal     ra,200020b0 <dif_pinmux_output_select>
+200008bc:       /-------- cd05                  beqz    a0,200008f4 <test_main+0xe0>
+200008be:       |         862a                  mv      a2,a0
+200008c0:       |         a9c42503              lw      a0,-1380(s0)
+200008c4:       |  /----- cd01                  beqz    a0,200008dc <test_main+0xc8>
+200008c6:       |  |      e000f517              auipc   a0,0xe000f
+200008ca:       |  |      73a50513              addi    a0,a0,1850 # 10000 <_chip_info_end>
+200008ce:       |  |      02c00593              li      a1,44
+200008d2:       |  |      952e                  add     a0,a0,a1
+200008d4:       |  |      4585                  li      a1,1
+200008d6:       |  |      72b010ef              jal     ra,20002800 <base_log_internal_dv>
+200008da:       |  |  /-- a801                  j       200008ea <test_main+0xd6>
+200008dc:       |  \--|-> 00004517              auipc   a0,0x4
+200008e0:       |     |   d6450513              addi    a0,a0,-668 # 20004640 <test_main.log_fields.7>
+200008e4:       |     |   85b2                  mv      a1,a2
+200008e6:       |     |   67f010ef              jal     ra,20002764 <base_log_internal_core>
+200008ea:       |     \-> 6531                  lui     a0,0xc
+200008ec:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008f0:       |         52b010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:31
+                                        kTopEarlgreyPinmuxOutselGpioGpio0));
+  CHECK_DIF_OK(
+200008f4:       \-------> f0001517              auipc   a0,0xf0001
+200008f8:                 77850513              addi    a0,a0,1912 # 1000206c <gpio>
+200008fc:                 4585                  li      a1,1
+200008fe:                 2a7d                  jal     20000abc <dif_gpio_output_set_enabled_all>
+20000900:       /-------- cd05                  beqz    a0,20000938 <test_main+0x124>
+20000902:       |         862a                  mv      a2,a0
+20000904:       |         a9c42503              lw      a0,-1380(s0)
+20000908:       |  /----- cd01                  beqz    a0,20000920 <test_main+0x10c>
+2000090a:       |  |      e000f517              auipc   a0,0xe000f
+2000090e:       |  |      6f650513              addi    a0,a0,1782 # 10000 <_chip_info_end>
+20000912:       |  |      04000593              li      a1,64
+20000916:       |  |      952e                  add     a0,a0,a1
+20000918:       |  |      4585                  li      a1,1
+2000091a:       |  |      6e7010ef              jal     ra,20002800 <base_log_internal_dv>
+2000091e:       |  |  /-- a801                  j       2000092e <test_main+0x11a>
+20000920:       |  \--|-> 00004517              auipc   a0,0x4
+20000924:       |     |   d3450513              addi    a0,a0,-716 # 20004654 <test_main.log_fields.10>
+20000928:       |     |   85b2                  mv      a1,a2
+2000092a:       |     |   63b010ef              jal     ra,20002764 <base_log_internal_core>
+2000092e:       |     \-> 6531                  lui     a0,0xc
+20000930:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000934:       |         4e7010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:33
+      dif_gpio_output_set_enabled_all(&gpio, 0x1));  // Enable first GPIO.
+  CHECK_DIF_OK(
+20000938:       \-------> f0001517              auipc   a0,0xf0001
+2000093c:                 73450513              addi    a0,a0,1844 # 1000206c <gpio>
+20000940:                 4581                  li      a1,0
+20000942:                 2a15                  jal     20000a76 <dif_gpio_write_all>
+20000944:       /-------- cd05                  beqz    a0,2000097c <test_main+0x168>
+20000946:       |         862a                  mv      a2,a0
+20000948:       |         a9c42503              lw      a0,-1380(s0)
+2000094c:       |  /----- cd01                  beqz    a0,20000964 <test_main+0x150>
+2000094e:       |  |      e000f517              auipc   a0,0xe000f
+20000952:       |  |      6b250513              addi    a0,a0,1714 # 10000 <_chip_info_end>
+20000956:       |  |      05400593              li      a1,84
+2000095a:       |  |      952e                  add     a0,a0,a1
+2000095c:       |  |      4585                  li      a1,1
+2000095e:       |  |      6a3010ef              jal     ra,20002800 <base_log_internal_dv>
+20000962:       |  |  /-- a801                  j       20000972 <test_main+0x15e>
+20000964:       |  \--|-> 00004517              auipc   a0,0x4
+20000968:       |     |   d0450513              addi    a0,a0,-764 # 20004668 <test_main.log_fields.13>
+2000096c:       |     |   85b2                  mv      a1,a2
+2000096e:       |     |   5f7010ef              jal     ra,20002764 <base_log_internal_core>
+20000972:       |     \-> 6531                  lui     a0,0xc
+20000974:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000978:       |         4a3010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:37
+      dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+
+  // Toggle IOA5.
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+2000097c:       \-------> f0001517              auipc   a0,0xf0001
+20000980:                 6f050513              addi    a0,a0,1776 # 1000206c <gpio>
+20000984:                 4605                  li      a2,1
+20000986:                 4581                  li      a1,0
+20000988:                 28f5                  jal     20000a84 <dif_gpio_write>
+2000098a:       /-------- cd05                  beqz    a0,200009c2 <test_main+0x1ae>
+2000098c:       |         862a                  mv      a2,a0
+2000098e:       |         a9c42503              lw      a0,-1380(s0)
+20000992:       |  /----- cd01                  beqz    a0,200009aa <test_main+0x196>
+20000994:       |  |      e000f517              auipc   a0,0xe000f
+20000998:       |  |      66c50513              addi    a0,a0,1644 # 10000 <_chip_info_end>
+2000099c:       |  |      06800593              li      a1,104
+200009a0:       |  |      952e                  add     a0,a0,a1
+200009a2:       |  |      4585                  li      a1,1
+200009a4:       |  |      65d010ef              jal     ra,20002800 <base_log_internal_dv>
+200009a8:       |  |  /-- a801                  j       200009b8 <test_main+0x1a4>
+200009aa:       |  \--|-> 00004517              auipc   a0,0x4
+200009ae:       |     |   cd250513              addi    a0,a0,-814 # 2000467c <test_main.log_fields.16>
+200009b2:       |     |   85b2                  mv      a1,a2
+200009b4:       |     |   5b1010ef              jal     ra,20002764 <base_log_internal_core>
+200009b8:       |     \-> 6531                  lui     a0,0xc
+200009ba:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200009be:       |         45d010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:38
+  busy_spin_micros(100);
+200009c2:       \-------> 06400513              li      a0,100
+200009c6:                 523010ef              jal     ra,200026e8 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:39
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, false));
+200009ca:                 f0001517              auipc   a0,0xf0001
+200009ce:                 6a250513              addi    a0,a0,1698 # 1000206c <gpio>
+200009d2:                 4581                  li      a1,0
+200009d4:                 4601                  li      a2,0
+200009d6:                 207d                  jal     20000a84 <dif_gpio_write>
+200009d8:       /-------- cd05                  beqz    a0,20000a10 <test_main+0x1fc>
+200009da:       |         862a                  mv      a2,a0
+200009dc:       |         a9c42503              lw      a0,-1380(s0)
+200009e0:       |  /----- cd01                  beqz    a0,200009f8 <test_main+0x1e4>
+200009e2:       |  |      e000f517              auipc   a0,0xe000f
+200009e6:       |  |      61e50513              addi    a0,a0,1566 # 10000 <_chip_info_end>
+200009ea:       |  |      07c00593              li      a1,124
+200009ee:       |  |      952e                  add     a0,a0,a1
+200009f0:       |  |      4585                  li      a1,1
+200009f2:       |  |      60f010ef              jal     ra,20002800 <base_log_internal_dv>
+200009f6:       |  |  /-- a801                  j       20000a06 <test_main+0x1f2>
+200009f8:       |  \--|-> 00004517              auipc   a0,0x4
+200009fc:       |     |   c9850513              addi    a0,a0,-872 # 20004690 <test_main.log_fields.19>
+20000a00:       |     |   85b2                  mv      a1,a2
+20000a02:       |     |   563010ef              jal     ra,20002764 <base_log_internal_core>
+20000a06:       |     \-> 6531                  lui     a0,0xc
+20000a08:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a0c:       |         40f010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:40
+  busy_spin_micros(100);
+20000a10:       \-------> 06400513              li      a0,100
+20000a14:                 4d5010ef              jal     ra,200026e8 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:41
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+20000a18:                 f0001517              auipc   a0,0xf0001
+20000a1c:                 65450513              addi    a0,a0,1620 # 1000206c <gpio>
+20000a20:                 4605                  li      a2,1
+20000a22:                 4581                  li      a1,0
+20000a24:                 2085                  jal     20000a84 <dif_gpio_write>
+20000a26:       /-------- cd05                  beqz    a0,20000a5e <test_main+0x24a>
+20000a28:       |         862a                  mv      a2,a0
+20000a2a:       |         a9c42503              lw      a0,-1380(s0)
+20000a2e:       |  /----- cd01                  beqz    a0,20000a46 <test_main+0x232>
+20000a30:       |  |      e000f517              auipc   a0,0xe000f
+20000a34:       |  |      5d050513              addi    a0,a0,1488 # 10000 <_chip_info_end>
+20000a38:       |  |      09000593              li      a1,144
+20000a3c:       |  |      952e                  add     a0,a0,a1
+20000a3e:       |  |      4585                  li      a1,1
+20000a40:       |  |      5c1010ef              jal     ra,20002800 <base_log_internal_dv>
+20000a44:       |  |  /-- a801                  j       20000a54 <test_main+0x240>
+20000a46:       |  \--|-> 00004517              auipc   a0,0x4
+20000a4a:       |     |   c5e50513              addi    a0,a0,-930 # 200046a4 <test_main.log_fields.21>
+20000a4e:       |     |   85b2                  mv      a1,a2
+20000a50:       |     |   515010ef              jal     ra,20002764 <base_log_internal_core>
+20000a54:       |     \-> 6531                  lui     a0,0xc
+20000a56:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a5a:       |         3c1010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:43
+
+  return true;
+20000a5e:       \-------> 4505                  li      a0,1
+20000a60:                 40b2                  lw      ra,12(sp)
+20000a62:                 4422                  lw      s0,8(sp)
+20000a64:                 0141                  addi    sp,sp,16
+20000a66:                 8082                  ret
+
+20000a68 <dif_gpio_init>:
+dif_gpio_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:18
+
+#include "gpio_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_gpio_init(mmio_region_t base_addr, dif_gpio_t *gpio) {
+  if (gpio == NULL) {
+20000a68:       /----- c581                     beqz    a1,20000a70 <dif_gpio_init+0x8>
+20000a6a:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:22
+    return kDifBadArg;
+  }
+
+  gpio->base_addr = base_addr;
+20000a6c:       |      c188                     sw      a0,0(a1)
+20000a6e:       |  /-- a011                     j       20000a72 <dif_gpio_init+0xa>
+20000a70:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:25
+
+  return kDifOk;
+}
+20000a72:          \-> 8532                     mv      a0,a2
+20000a74:              8082                     ret
+
+20000a76 <dif_gpio_write_all>:
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:210
+  return kDifOk;
+}
+
+dif_result_t dif_gpio_write_all(const dif_gpio_t *gpio,
+                                dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000a76:       /-- c509                        beqz    a0,20000a80 <dif_gpio_write_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:214
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OUT_REG_OFFSET, state);
+20000a78:       |   4110                        lw      a2,0(a0)
+20000a7a:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+ * @param offset the offset to write at, in bytes.
+ * @param value the value to write.
+ */
+inline void mmio_region_write32(mmio_region_t base, ptrdiff_t offset,
+                                uint32_t value) {
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20000a7c:       |   ca4c                        sw      a1,20(a2)
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:217
+
+  return kDifOk;
+}
+20000a7e:       |   8082                        ret
+20000a80:       \-> 450d                        li      a0,3
+20000a82:           8082                        ret
+
+20000a84 <dif_gpio_write>:
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:90
+  if (gpio == NULL || index >= kDifGpioNumPins) {
+20000a84:              00a036b3                 snez    a3,a0
+20000a88:              0205b713                 sltiu   a4,a1,32
+20000a8c:              8f75                     and     a4,a4,a3
+20000a8e:              468d                     li      a3,3
+20000a90:       /----- c705                     beqz    a4,20000ab8 <dif_gpio_write+0x34>
+20000a92:       |      46c1                     li      a3,16
+20000a94:       |      4861                     li      a6,24
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:96
+  const ptrdiff_t offset = (index < 16) ? reg_lower_offset : reg_upper_offset;
+20000a96:       |  /-- 00d5e363                 bltu    a1,a3,20000a9c <dif_gpio_write+0x18>
+20000a9a:       |  |   4871                     li      a6,28
+20000a9c:       |  \-> 4681                     li      a3,0
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:99
+  const uint32_t mask = index_to_mask(index % 16);
+20000a9e:       |      89bd                     andi    a1,a1,15
+index_to_mask():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:18
+static uint32_t index_to_mask(uint32_t index) { return 1u << index; }
+20000aa0:       |      28b017b3                 bset    a5,zero,a1
+20000aa4:       |      6741                     lui     a4,0x10
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aa6:       |      00b715b3                 sll     a1,a4,a1
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:100
+  mmio_region_write32(gpio->base_addr, offset,
+20000aaa:       |      4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aac:       |      40c00633                 neg     a2,a2
+20000ab0:       |      8e7d                     and     a2,a2,a5
+20000ab2:       |      8dd1                     or      a1,a1,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ab4:       |      9542                     add     a0,a0,a6
+20000ab6:       |      c10c                     sw      a1,0(a0)
+dif_gpio_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:221
+
+dif_result_t dif_gpio_write(const dif_gpio_t *gpio, dif_gpio_pin_t pin,
+                            bool state) {
+  return gpio_masked_bit_write(gpio, GPIO_MASKED_OUT_LOWER_REG_OFFSET,
+20000ab8:       \----> 8536                     mv      a0,a3
+20000aba:              8082                     ret
+
+20000abc <dif_gpio_output_set_enabled_all>:
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:233
+                           GPIO_MASKED_OUT_UPPER_REG_OFFSET, mask, state);
+}
+
+dif_result_t dif_gpio_output_set_enabled_all(const dif_gpio_t *gpio,
+                                             dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000abc:       /-- c509                        beqz    a0,20000ac6 <dif_gpio_output_set_enabled_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:237
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OE_REG_OFFSET, state);
+20000abe:       |   4110                        lw      a2,0(a0)
+20000ac0:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ac2:       |   d20c                        sw      a1,32(a2)
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:240
+
+  return kDifOk;
+}
+20000ac4:       |   8082                        ret
+20000ac6:       \-> 450d                        li      a0,3
+20000ac8:           8082                        ret
+
+20000aca <ottf_machine_ecall_handler>:
+ottf_machine_ecall_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:52
+rand_testutils_rng_t rand_testutils_rng_ctx;
+
+// The OTTF overrides the default machine ecall exception handler to implement
+// FreeRTOS context switching, required for supporting cooperative scheduling.
+void ottf_machine_ecall_handler(uint32_t *exc_info) {
+  if (pxCurrentTCB != NULL) {
+20000aca:           f0001517            auipc   a0,0xf0001
+20000ace:           5e252503            lw      a0,1506(a0) # 100020ac <pxCurrentTCB>
+20000ad2:       /-- c119                        beqz    a0,20000ad8 <ottf_machine_ecall_handler+0xe>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:56
+    // If the pointer to the current TCB is not NULL, we are operating in
+    // concurrency mode. In this case, our default behavior is to assume a
+    // context switch has been requested.
+    vTaskSwitchContext();
+20000ad4:       |   0720306f            j       20003b46 <vTaskSwitchContext>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:59
+    return;
+  }
+  LOG_ERROR(
+20000ad8:       \-> 00005517            auipc   a0,0x5
+20000adc:           7ec52503            lw      a0,2028(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000ae0:       /-- c919                        beqz    a0,20000af6 <ottf_machine_ecall_handler+0x2c>
+20000ae2:       |   e000f517            auipc   a0,0xe000f
+20000ae6:       |   51e50513            addi    a0,a0,1310 # 10000 <_chip_info_end>
+20000aea:       |   0a400593            li      a1,164
+20000aee:       |   952e                        add     a0,a0,a1
+20000af0:       |   4581                        li      a1,0
+20000af2:       |   50f0106f            j       20002800 <base_log_internal_dv>
+20000af6:       \-> 00004517            auipc   a0,0x4
+20000afa:           dfe50513            addi    a0,a0,-514 # 200048f4 <ottf_machine_ecall_handler.log_fields>
+20000afe:           4670106f            j       20002764 <base_log_internal_core>
+
+20000b02 <status_report>:
+status_report():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:100
+static size_t status_report_list_cnt = 0;
+
+// Override the status report function to store it in the array above.
+void status_report(status_t status) {
+  // In case of overflow, we overwrite previous values.
+  status_report_list[status_report_list_cnt % kStatusReportListSize] = status;
+20000b02:       f0001597                auipc   a1,0xf0001
+20000b06:       5725a603                lw      a2,1394(a1) # 10002074 <status_report_list_cnt>
+20000b0a:       00004697                auipc   a3,0x4
+20000b0e:       dfe6a683                lw      a3,-514(a3) # 20004908 <kStatusReportListSize>
+20000b12:       02d676b3                remu    a3,a2,a3
+20000b16:       f0001717                auipc   a4,0xf0001
+20000b1a:       5f270713                addi    a4,a4,1522 # 10002108 <status_report_list>
+20000b1e:       20e6c6b3                sh2add  a3,a3,a4
+20000b22:       c288                    sw      a0,0(a3)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:101
+  status_report_list_cnt++;
+20000b24:       0605                    addi    a2,a2,1
+20000b26:       56c5a923                sw      a2,1394(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:102
+}
+20000b2a:       8082                    ret
+
+20000b2c <_ottf_main>:
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:151
+  result = result && test_main();
+  result = result && manufacturer_post_test_hook();
+  report_test_status(result);
+}
+
+void _ottf_main(void) {
+20000b2c:                 7179                  addi    sp,sp,-48
+20000b2e:                 d606                  sw      ra,44(sp)
+20000b30:                 d422                  sw      s0,40(sp)
+20000b32:                 d226                  sw      s1,36(sp)
+20000b34:                 6511                  lui     a0,0x4
+20000b36:                 35450513              addi    a0,a0,852 # 4354 <_stack_size+0x3d4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:152
+  test_status_set(kTestStatusInTest);
+20000b3a:                 2e1010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:156
+
+  // Clear reset reason register.
+  dif_rstmgr_t rstmgr;
+  CHECK_DIF_OK(dif_rstmgr_init(
+20000b3e:                 40410537              lui     a0,0x40410
+20000b42:                 100c                  addi    a1,sp,32
+20000b44:                 0ef010ef              jal     ra,20002432 <dif_rstmgr_init>
+20000b48:                 00005417              auipc   s0,0x5
+20000b4c:       /-------- cd05                  beqz    a0,20000b84 <_ottf_main+0x58>
+20000b4e:       |         862a                  mv      a2,a0
+20000b50:       |         77c42503              lw      a0,1916(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000b54:       |  /----- cd01                  beqz    a0,20000b6c <_ottf_main+0x40>
+20000b56:       |  |      e000f517              auipc   a0,0xe000f
+20000b5a:       |  |      4aa50513              addi    a0,a0,1194 # 10000 <_chip_info_end>
+20000b5e:       |  |      0b800593              li      a1,184
+20000b62:       |  |      952e                  add     a0,a0,a1
+20000b64:       |  |      4585                  li      a1,1
+20000b66:       |  |      49b010ef              jal     ra,20002800 <base_log_internal_dv>
+20000b6a:       |  |  /-- a801                  j       20000b7a <_ottf_main+0x4e>
+20000b6c:       |  \--|-> 00004517              auipc   a0,0x4
+20000b70:       |     |   da050513              addi    a0,a0,-608 # 2000490c <_ottf_main.log_fields>
+20000b74:       |     |   85b2                  mv      a1,a2
+20000b76:       |     |   3ef010ef              jal     ra,20002764 <base_log_internal_core>
+20000b7a:       |     \-> 6531                  lui     a0,0xc
+20000b7c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000b80:       |         29b010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:158
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  if (kOttfTestConfig.clear_reset_reason) {
+20000b84:       \-------> 00004517              auipc   a0,0x4
+20000b88:                 a7c50493              addi    s1,a0,-1412 # 20004600 <kOttfTestConfig>
+20000b8c:                 0114c503              lbu     a0,17(s1)
+20000b90:       /-------- c121                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:159
+    CHECK_DIF_OK(dif_rstmgr_reset_info_clear(&rstmgr));
+20000b92:       |         1008                  addi    a0,sp,32
+20000b94:       |         0ad010ef              jal     ra,20002440 <dif_rstmgr_reset_info_clear>
+20000b98:       +-------- cd05                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+20000b9a:       |         862a                  mv      a2,a0
+20000b9c:       |         77c42503              lw      a0,1916(s0)
+20000ba0:       |  /----- cd01                  beqz    a0,20000bb8 <_ottf_main+0x8c>
+20000ba2:       |  |      e000f517              auipc   a0,0xe000f
+20000ba6:       |  |      45e50513              addi    a0,a0,1118 # 10000 <_chip_info_end>
+20000baa:       |  |      0cc00593              li      a1,204
+20000bae:       |  |      952e                  add     a0,a0,a1
+20000bb0:       |  |      4585                  li      a1,1
+20000bb2:       |  |      44f010ef              jal     ra,20002800 <base_log_internal_dv>
+20000bb6:       |  |  /-- a801                  j       20000bc6 <_ottf_main+0x9a>
+20000bb8:       |  \--|-> 00004517              auipc   a0,0x4
+20000bbc:       |     |   d6850513              addi    a0,a0,-664 # 20004920 <_ottf_main.log_fields.5>
+20000bc0:       |     |   85b2                  mv      a1,a2
+20000bc2:       |     |   3a3010ef              jal     ra,20002764 <base_log_internal_core>
+20000bc6:       |     \-> 6531                  lui     a0,0xc
+20000bc8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000bcc:       |         24f010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:163
+  }
+
+  // Initialize the console to enable logging for non-DV simulation platforms.
+  if (kDeviceType != kDeviceSimDV) {
+20000bd0:       \-------> 00005517              auipc   a0,0x5
+20000bd4:                 6dc52503              lw      a0,1756(a0) # 200062ac <kDeviceType>
+20000bd8:          /----- c91d                  beqz    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:164
+    ottf_console_init();
+20000bda:          |      26b9                  jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:165
+    if (!kOttfTestConfig.silence_console_prints) {
+20000bdc:          |      0124c503              lbu     a0,18(s1)
+20000be0:          +----- e51d                  bnez    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:166
+      LOG_INFO("Running %s", kOttfTestConfig.file);
+20000be2:          |      77c42503              lw      a0,1916(s0)
+20000be6:          |      48d0                  lw      a2,20(s1)
+20000be8:          |  /-- cd01                  beqz    a0,20000c00 <_ottf_main+0xd4>
+20000bea:          |  |   e000f517              auipc   a0,0xe000f
+20000bee:          |  |   41650513              addi    a0,a0,1046 # 10000 <_chip_info_end>
+20000bf2:          |  |   0e000593              li      a1,224
+20000bf6:          |  |   952e                  add     a0,a0,a1
+20000bf8:          |  |   4585                  li      a1,1
+20000bfa:          |  |   407010ef              jal     ra,20002800 <base_log_internal_dv>
+20000bfe:          +--|-- a801                  j       20000c0e <_ottf_main+0xe2>
+20000c00:          |  \-> 00004517              auipc   a0,0x4
+20000c04:          |      d3450513              addi    a0,a0,-716 # 20004934 <_ottf_main.log_fields.8>
+20000c08:          |      85b2                  mv      a1,a2
+20000c0a:          |      35b010ef              jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:173
+  }
+
+  // Initialize a global random number generator testutil context to provide
+  // tests with a source of entropy for randomizing test behaviors.
+  dif_rv_core_ibex_t rv_core_ibex;
+  CHECK_DIF_OK(dif_rv_core_ibex_init(
+20000c0e:          \----> 411f0537              lui     a0,0x411f0
+20000c12:                 082c                  addi    a1,sp,24
+20000c14:                 1f9010ef              jal     ra,2000260c <dif_rv_core_ibex_init>
+20000c18:       /-------- cd05                  beqz    a0,20000c50 <_ottf_main+0x124>
+20000c1a:       |         862a                  mv      a2,a0
+20000c1c:       |         77c42503              lw      a0,1916(s0)
+20000c20:       |  /----- cd01                  beqz    a0,20000c38 <_ottf_main+0x10c>
+20000c22:       |  |      e000f517              auipc   a0,0xe000f
+20000c26:       |  |      3de50513              addi    a0,a0,990 # 10000 <_chip_info_end>
+20000c2a:       |  |      0f400593              li      a1,244
+20000c2e:       |  |      952e                  add     a0,a0,a1
+20000c30:       |  |      4585                  li      a1,1
+20000c32:       |  |      3cf010ef              jal     ra,20002800 <base_log_internal_dv>
+20000c36:       |  |  /-- a801                  j       20000c46 <_ottf_main+0x11a>
+20000c38:       |  \--|-> 00004517              auipc   a0,0x4
+20000c3c:       |     |   d1050513              addi    a0,a0,-752 # 20004948 <_ottf_main.log_fields.11>
+20000c40:       |     |   85b2                  mv      a1,a2
+20000c42:       |     |   323010ef              jal     ra,20002764 <base_log_internal_core>
+20000c46:       |     \-> 6531                  lui     a0,0xc
+20000c48:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000c4c:       |         1cf010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:176
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  rand_testutils_rng_ctx = rand_testutils_init(&rv_core_ibex);
+20000c50:       \-------> 850a                  mv      a0,sp
+20000c52:                 082c                  addi    a1,sp,24
+20000c54:                 0e9010ef              jal     ra,2000253c <rand_testutils_init>
+20000c58:                 f0001517              auipc   a0,0xf0001
+20000c5c:                 49850513              addi    a0,a0,1176 # 100020f0 <rand_testutils_rng_ctx>
+20000c60:                 858a                  mv      a1,sp
+20000c62:                 4661                  li      a2,24
+20000c64:                 42c030ef              jal     ra,20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:179
+
+  // Run the test.
+  if (kOttfTestConfig.enable_concurrency) {
+20000c68:                 0004c503              lbu     a0,0(s1)
+20000c6c:          /----- c11d                  beqz    a0,20000c92 <_ottf_main+0x166>
+ottf_task_create():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:67
+  return xTaskCreate(/*pvTaskCode=*/task_function, /*pcName=*/task_name,
+20000c6e:          |      00000517              auipc   a0,0x0
+20000c72:          |      0a450513              addi    a0,a0,164 # 20000d12 <test_wrapper>
+20000c76:          |      00004597              auipc   a1,0x4
+20000c7a:          |      bf358593              addi    a1,a1,-1037 # 20004869 <test_main.log_fields.21+0x1c5>
+20000c7e:          |      40000613              li      a2,1024
+20000c82:          |      4705                  li      a4,1
+20000c84:          |      4681                  li      a3,0
+20000c86:          |      4781                  li      a5,0
+20000c88:          |      4a3020ef              jal     ra,2000392a <xTaskCreate>
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:184
+    // Run `test_main()` in a FreeRTOS task, allowing other FreeRTOS tasks to
+    // be spawned, if requested in the main test task. Note, we spawn the main
+    // test task at a priority level of 0.
+    ottf_task_create(test_wrapper, "test_main", /*task_stack_depth=*/1024, 0);
+    vTaskStartScheduler();
+20000c8c:          |      745020ef              jal     ra,20003bd0 <vTaskStartScheduler>
+20000c90:          |  /-- a011                  j       20000c94 <_ottf_main+0x168>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:187
+  } else {
+    // Otherwise, launch `test_main()` on bare-metal.
+    test_wrapper(NULL);
+20000c92:          \--|-> 2041                  jal     20000d12 <test_wrapper>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+  }
+
+  // Unreachable.
+  CHECK(false);
+20000c94:             \-> 00004517              auipc   a0,0x4
+20000c98:                 a2450613              addi    a2,a0,-1500 # 200046b8 <test_main.log_fields.21+0x14>
+20000c9c:                 368f05b7              lui     a1,0x368f0
+20000ca0:                 4501                  li      a0,0
+20000ca2:                 4681                  li      a3,0
+20000ca4:                 578020ef              jal     ra,2000321c <status_create>
+20000ca8:                 00010023              sb      zero,0(sp)
+20000cac:                 00014583              lbu     a1,0(sp)
+20000cb0:       /-------- e1a1                  bnez    a1,20000cf0 <_ottf_main+0x1c4>
+20000cb2:       |         77c42503              lw      a0,1916(s0)
+20000cb6:       |  /----- cd01                  beqz    a0,20000cce <_ottf_main+0x1a2>
+20000cb8:       |  |      e000f517              auipc   a0,0xe000f
+20000cbc:       |  |      34850513              addi    a0,a0,840 # 10000 <_chip_info_end>
+20000cc0:       |  |      10800593              li      a1,264
+20000cc4:       |  |      952e                  add     a0,a0,a1
+20000cc6:       |  |      4581                  li      a1,0
+20000cc8:       |  |      339010ef              jal     ra,20002800 <base_log_internal_dv>
+20000ccc:       |  |  /-- a039                  j       20000cda <_ottf_main+0x1ae>
+20000cce:       |  \--|-> 00004517              auipc   a0,0x4
+20000cd2:       |     |   c8e50513              addi    a0,a0,-882 # 2000495c <_ottf_main.log_fields.15>
+20000cd6:       |     |   28f010ef              jal     ra,20002764 <base_log_internal_core>
+20000cda:       |     \-> 00004517              auipc   a0,0x4
+20000cde:       |         9de50613              addi    a2,a0,-1570 # 200046b8 <test_main.log_fields.21+0x14>
+20000ce2:       |         4535                  li      a0,13
+20000ce4:       |         368f05b7              lui     a1,0x368f0
+20000ce8:       |         0bf00693              li      a3,191
+20000cec:       |         530020ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+ * @param s The status code.
+ * @return `absl_status_t` contained within the status_t.
+ */
+OT_WARN_UNUSED_RESULT
+OT_ALWAYS_INLINE absl_status_t status_err(status_t s) {
+  return s.value < 0 ? (absl_status_t)bitfield_field32_read(
+20000cf0:       \-------> 00052593              slti    a1,a0,0
+20000cf4:                 897d                  andi    a0,a0,31
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+20000cf6:                 00a03533              snez    a0,a0
+20000cfa:                 8d6d                  and     a0,a0,a1
+20000cfc:             /-- c511                  beqz    a0,20000d08 <_ottf_main+0x1dc>
+20000cfe:             |   6531                  lui     a0,0xc
+20000d00:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000d04:             |   117010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:192
+}
+20000d08:             \-> 50b2                  lw      ra,44(sp)
+20000d0a:                 5422                  lw      s0,40(sp)
+20000d0c:                 5492                  lw      s1,36(sp)
+20000d0e:                 6145                  addi    sp,sp,48
+20000d10:                 8082                  ret
+
+20000d12 <test_wrapper>:
+test_wrapper():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:143
+static void test_wrapper(void *task_parameters) {
+20000d12:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:145
+  bool result = manufacturer_pre_test_hook();
+20000d14:                       d606                    sw      ra,44(sp)
+20000d16:                       d422                    sw      s0,40(sp)
+20000d18:                       d226                    sw      s1,36(sp)
+20000d1a:                       d04a                    sw      s2,32(sp)
+20000d1c:                       ce4e                    sw      s3,28(sp)
+20000d1e:                       cc52                    sw      s4,24(sp)
+20000d20:                       ca56                    sw      s5,20(sp)
+20000d22:                       c85a                    sw      s6,16(sp)
+20000d24:                       c65e                    sw      s7,12(sp)
+20000d26:                       c462                    sw      s8,8(sp)
+20000d28:                       2a4030ef                jal     ra,20003fcc <manufacturer_pre_test_hook>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:146
+  result = result && test_main();
+20000d2c:                /----- c519                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d2e:                |      34dd                    jal     20000814 <test_main>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:147
+  result = result && manufacturer_post_test_hook();
+20000d30:                +----- c509                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d32:                |      29e030ef                jal     ra,20003fd0 <manufacturer_post_test_hook>
+20000d36:                |      842a                    mv      s0,a0
+20000d38:                |  /-- a011                    j       20000d3c <test_wrapper+0x2a>
+20000d3a:                \--|-> 4401                    li      s0,0
+report_test_status():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:106
+  if (kDeviceType != kDeviceSimDV) {
+20000d3c:                   \-> 00005517                auipc   a0,0x5
+20000d40:                       57052503                lw      a0,1392(a0) # 200062ac <kDeviceType>
+20000d44:          /----------- cd05                    beqz    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:107
+    if (kOttfTestConfig.console.test_may_clobber) {
+20000d46:          |            00004517                auipc   a0,0x4
+20000d4a:          |            8ba50493                addi    s1,a0,-1862 # 20004600 <kOttfTestConfig>
+20000d4e:          |            00c4c503                lbu     a0,12(s1)
+20000d52:          |        /-- c111                    beqz    a0,20000d56 <test_wrapper+0x44>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:108
+      ottf_console_init();
+20000d54:          |        |   2ad1                    jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:110
+    if (!kOttfTestConfig.silence_console_prints) {
+20000d56:          |        \-> 0124c503                lbu     a0,18(s1)
+20000d5a:          +----------- e10d                    bnez    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d5c:          |            00005517                auipc   a0,0x5
+20000d60:          |            56852503                lw      a0,1384(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000d64:          |            48d0                    lw      a2,20(s1)
+20000d66:          |  /-------- cd19                    beqz    a0,20000d84 <test_wrapper+0x72>
+20000d68:          |  |         e000f517                auipc   a0,0xe000f
+20000d6c:          |  |         29850513                addi    a0,a0,664 # 10000 <_chip_info_end>
+20000d70:          |  |         11c00593                li      a1,284
+20000d74:          |  |         952e                    add     a0,a0,a1
+20000d76:          |  |         4585                    li      a1,1
+20000d78:          |  |         289010ef                jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d7c:          \--|--/----X cc01                    beqz    s0,20000d94 <test_wrapper+0x82>
+20000d7e:             |  |  /-> 6425                    lui     s0,0x9
+20000d80:             |  |  |   0435                    addi    s0,s0,13
+20000d82:       /-----|--|--|-- a8f1                    j       20000e5e <test_wrapper+0x14c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d84:       |     \--|--|-> 00004517                auipc   a0,0x4
+20000d88:       |        |  |   bec50513                addi    a0,a0,-1044 # 20004970 <report_test_status.log_fields>
+20000d8c:       |        |  |   85b2                    mv      a1,a2
+20000d8e:       |        |  |   1d7010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d92:       |        |  \-- f475                    bnez    s0,20000d7e <test_wrapper+0x6c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:118
+    LOG_INFO("Status reported by the test:");
+20000d94:       |        \----> 00005517                auipc   a0,0x5
+20000d98:       |               53052983                lw      s3,1328(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000d9c:       |        /----- 00098d63                beqz    s3,20000db6 <test_wrapper+0xa4>
+20000da0:       |        |      e000f517                auipc   a0,0xe000f
+20000da4:       |        |      26050513                addi    a0,a0,608 # 10000 <_chip_info_end>
+20000da8:       |        |      13000593                li      a1,304
+20000dac:       |        |      952e                    add     a0,a0,a1
+20000dae:       |        |      4581                    li      a1,0
+20000db0:       |        |      251010ef                jal     ra,20002800 <base_log_internal_dv>
+20000db4:       |        |  /-- a039                    j       20000dc2 <test_wrapper+0xb0>
+20000db6:       |        \--|-> 00004517                auipc   a0,0x4
+20000dba:       |           |   bce50513                addi    a0,a0,-1074 # 20004984 <report_test_status.log_fields.20>
+20000dbe:       |           |   1a7010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:120
+    size_t print_cnt = status_report_list_cnt;
+20000dc2:       |           \-> f0001a97                auipc   s5,0xf0001
+20000dc6:       |               2b2aa503                lw      a0,690(s5) # 10002074 <status_report_list_cnt>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:121
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000dca:       |               00004597                auipc   a1,0x4
+20000dce:       |               b3e5ab03                lw      s6,-1218(a1) # 20004908 <kStatusReportListSize>
+20000dd2:       |               0b655bb3                minu    s7,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000dd6:       |  /----------- 040b8c63                beqz    s7,20000e2e <test_wrapper+0x11c>
+20000dda:       |  |            4405                    li      s0,1
+20000ddc:       |  |            54fd                    li      s1,-1
+20000dde:       |  |            f0001517                auipc   a0,0xf0001
+20000de2:       |  |            32a50c13                addi    s8,a0,810 # 10002108 <status_report_list>
+20000de6:       |  |            00004517                auipc   a0,0x4
+20000dea:       |  |            bb250913                addi    s2,a0,-1102 # 20004998 <report_test_status.log_fields.23>
+20000dee:       |  |            e000f517                auipc   a0,0xe000f
+20000df2:       |  |            21250a13                addi    s4,a0,530 # 10000 <_chip_info_end>
+20000df6:       |  |            14400513                li      a0,324
+20000dfa:       |  |            9a2a                    add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:126
+      size_t idx = (status_report_list_cnt - i) % kStatusReportListSize;
+20000dfc:       |  |  /-------> 2b2aa503                lw      a0,690(s5)
+20000e00:       |  |  |         9526                    add     a0,a0,s1
+20000e02:       |  |  |         03657533                remu    a0,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:127
+      LOG_INFO("- %r", status_report_list[idx]);
+20000e06:       |  |  |         21854533                sh2add  a0,a0,s8
+20000e0a:       |  |  |         4110                    lw      a2,0(a0)
+20000e0c:       |  |  |  /----- 00098763                beqz    s3,20000e1a <test_wrapper+0x108>
+20000e10:       |  |  |  |      4585                    li      a1,1
+20000e12:       |  |  |  |      8552                    mv      a0,s4
+20000e14:       |  |  |  |      1ed010ef                jal     ra,20002800 <base_log_internal_dv>
+20000e18:       |  |  |  |  /-- a029                    j       20000e22 <test_wrapper+0x110>
+20000e1a:       |  |  |  \--|-> 854a                    mv      a0,s2
+20000e1c:       |  |  |     |   85b2                    mv      a1,a2
+20000e1e:       |  |  |     |   147010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000e22:       |  |  |     \-> 0405                    addi    s0,s0,1
+20000e24:       |  |  |         14fd                    addi    s1,s1,-1
+20000e26:       |  |  \-------- fc8bfbe3                bgeu    s7,s0,20000dfc <test_wrapper+0xea>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:130
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000e2a:       |  |            2b2aa503                lw      a0,690(s5)
+20000e2e:       |  \-----/----X 02ab7563                bgeu    s6,a0,20000e58 <test_wrapper+0x146>
+20000e32:       |        |  /-- 00098d63                beqz    s3,20000e4c <test_wrapper+0x13a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:131
+      LOG_INFO(
+20000e36:       |        |  |   e000f517                auipc   a0,0xe000f
+20000e3a:       |        |  |   1ca50513                addi    a0,a0,458 # 10000 <_chip_info_end>
+20000e3e:       |        |  |   15800593                li      a1,344
+20000e42:       |        |  |   952e                    add     a0,a0,a1
+20000e44:       |        |  |   4581                    li      a1,0
+20000e46:       |        |  |   1bb010ef                jal     ra,20002800 <base_log_internal_dv>
+20000e4a:       |        +--|-- a039                    j       20000e58 <test_wrapper+0x146>
+20000e4c:       |        |  \-> 00004517                auipc   a0,0x4
+20000e50:       |        |      b6050513                addi    a0,a0,-1184 # 200049ac <report_test_status.log_fields.26>
+20000e54:       |        |      111010ef                jal     ra,20002764 <base_log_internal_core>
+20000e58:       |        \----> 6531                    lui     a0,0xc
+20000e5a:       |               aad50413                addi    s0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:136
+  coverage_send_buffer();
+20000e5e:       \-------------> 2839                    jal     20000e7c <coverage_send_buffer>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:137
+  test_status_set(result ? kTestStatusPassed : kTestStatusFailed);
+20000e60:                       8522                    mv      a0,s0
+20000e62:                       50b2                    lw      ra,44(sp)
+20000e64:                       5422                    lw      s0,40(sp)
+20000e66:                       5492                    lw      s1,36(sp)
+20000e68:                       5902                    lw      s2,32(sp)
+20000e6a:                       49f2                    lw      s3,28(sp)
+20000e6c:                       4a62                    lw      s4,24(sp)
+20000e6e:                       4ad2                    lw      s5,20(sp)
+20000e70:                       4b42                    lw      s6,16(sp)
+20000e72:                       4bb2                    lw      s7,12(sp)
+20000e74:                       4c22                    lw      s8,8(sp)
+20000e76:                       6145                    addi    sp,sp,48
+20000e78:                       7a20106f                j       2000261a <test_status_set>
+
+20000e7c <coverage_send_buffer>:
+coverage_send_buffer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/coverage_none.c:9
+
+#include "sw/device/lib/testing/test_framework/coverage.h"
+
+// This NOP function gets linked in when coverage is disabled. See
+// `test_coverage_llvm.c` for its actual definition when coverage is enabled.
+void coverage_send_buffer(void) {}
+20000e7c:       8082                    ret
+
+20000e7e <vApplicationMallocFailedHook>:
+vApplicationMallocFailedHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:18
+
+/**
+ * This is called if configUSE_MALLOC_FAILED_HOOK is set to 1 in
+ * FreeRTOSConfig.h, and a call to pvPortMalloc() fails.
+ */
+void vApplicationMallocFailedHook(void) {
+20000e7e:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:19
+  LOG_INFO("%s",
+20000e80:              c606                     sw      ra,12(sp)
+20000e82:              00005517                 auipc   a0,0x5
+20000e86:              44252503                 lw      a0,1090(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000e8a:          /-- ed01                     bnez    a0,20000ea2 <vApplicationMallocFailedHook+0x24>
+20000e8c:          |   00004517                 auipc   a0,0x4
+20000e90:          |   be450513                 addi    a0,a0,-1052 # 20004a70 <vApplicationMallocFailedHook.log_fields>
+20000e94:          |   00004597                 auipc   a1,0x4
+20000e98:          |   b6258593                 addi    a1,a1,-1182 # 200049f6 <report_test_status.log_fields.26+0x4a>
+20000e9c:          |   0c9010ef                 jal     ra,20002764 <base_log_internal_core>
+20000ea0:       /--|-- a839                     j       20000ebe <vApplicationMallocFailedHook+0x40>
+20000ea2:       |  \-> e000f517                 auipc   a0,0xe000f
+20000ea6:       |      15e50513                 addi    a0,a0,350 # 10000 <_chip_info_end>
+20000eaa:       |      16c00593                 li      a1,364
+20000eae:       |      952e                     add     a0,a0,a1
+20000eb0:       |      00004597                 auipc   a1,0x4
+20000eb4:       |      b4658613                 addi    a2,a1,-1210 # 200049f6 <report_test_status.log_fields.26+0x4a>
+20000eb8:       |      4585                     li      a1,1
+20000eba:       |      147010ef                 jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:21
+           "FreeRTOS malloc failed. Increase heap size in FreeRTOSConfig.h");
+  irq_global_ctrl(false);
+20000ebe:       \----> 4501                     li      a0,0
+20000ec0:              603000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:22
+  abort();
+20000ec4:              089010ef                 jal     ra,2000274c <abort>
+
+20000ec8 <vApplicationStackOverflowHook>:
+vApplicationStackOverflowHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:29
+
+/**
+ * This is called if configCHECK_FOR_STACK_OVERFLOW is set to 1 or 2 in
+ * FreeRTOSConfig.h, and a task detects a stack overflow.
+ */
+void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
+20000ec8:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:30
+  LOG_INFO("FreeRTOS stack overflow. Increase stack size of task: %s",
+20000eca:              c606                     sw      ra,12(sp)
+20000ecc:              00005517                 auipc   a0,0x5
+20000ed0:              3f852503                 lw      a0,1016(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000ed4:              862e                     mv      a2,a1
+20000ed6:          /-- e909                     bnez    a0,20000ee8 <vApplicationStackOverflowHook+0x20>
+20000ed8:          |   00004517                 auipc   a0,0x4
+20000edc:          |   bac50513                 addi    a0,a0,-1108 # 20004a84 <vApplicationStackOverflowHook.log_fields>
+20000ee0:          |   85b2                     mv      a1,a2
+20000ee2:          |   083010ef                 jal     ra,20002764 <base_log_internal_core>
+20000ee6:       /--|-- a819                     j       20000efc <vApplicationStackOverflowHook+0x34>
+20000ee8:       |  \-> e000f517                 auipc   a0,0xe000f
+20000eec:       |      11850513                 addi    a0,a0,280 # 10000 <_chip_info_end>
+20000ef0:       |      18000593                 li      a1,384
+20000ef4:       |      952e                     add     a0,a0,a1
+20000ef6:       |      4585                     li      a1,1
+20000ef8:       |      109010ef                 jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:32
+           pcTaskName);
+  irq_global_ctrl(false);
+20000efc:       \----> 4501                     li      a0,0
+20000efe:              5c5000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:33
+  abort();
+20000f02:              04b010ef                 jal     ra,2000274c <abort>
+
+20000f06 <xPortStartScheduler>:
+xPortStartScheduler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:93
+// ----------------------------------------------------------------------------
+// Scheduler Setup
+// ----------------------------------------------------------------------------
+extern void xPortStartFirstTask(void);
+
+BaseType_t xPortStartScheduler(void) {
+20000f06:       1141                    addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:97
+#if configUSE_PREEMPTION
+  vPortSetupTimerInterrupt();
+#endif  // configUSE_PREEMPTION
+  irq_timer_ctrl(true);
+20000f08:       c606                    sw      ra,12(sp)
+20000f0a:       4505                    li      a0,1
+20000f0c:       5df000ef                jal     ra,20001cea <irq_timer_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:98
+  irq_external_ctrl(true);
+20000f10:       4505                    li      a0,1
+20000f12:       5c3000ef                jal     ra,20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:99
+  irq_software_ctrl(true);
+20000f16:       4505                    li      a0,1
+20000f18:       5e9000ef                jal     ra,20001d00 <irq_software_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:103
+  // Note: no need to call 'irq_global_ctrl(true)' since the global interrupt
+  // enable is set in the xPortStartFirstTask sub-routine in
+  // sw/device/lib/testing/test_framework/freertos_port.S.
+  xPortStartFirstTask();
+20000f1c:       e2cff0ef                jal     ra,20000548 <xPortStartFirstTask>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:106
+
+  // Unreachable.
+  return pdFAIL;
+20000f20:       4501                    li      a0,0
+20000f22:       40b2                    lw      ra,12(sp)
+20000f24:       0141                    addi    sp,sp,16
+20000f26:       8082                    ret
+
+20000f28 <ottf_console_init>:
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:123
+        i * ARRAYSIZE(kEmptyPattern), ARRAYSIZE(kEmptyPattern), kEmptyPattern));
+  }
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+}
+
+void ottf_console_init(void) {
+20000f28:                                1141                   addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  // Initialize/Configure the console device.
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f2a:                                c606                   sw      ra,12(sp)
+20000f2c:                                c422                   sw      s0,8(sp)
+20000f2e:                                00003517               auipc   a0,0x3
+20000f32:                                6d250593               addi    a1,a0,1746 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f36:                                41c8                   lw      a0,4(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f38:                                4580                   lw      s0,8(a1)
+20000f3a:                                4585                   li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f3c:                            /-- 04b50663               beq     a0,a1,20000f88 <ottf_console_init+0x60>
+20000f40:                         /--|-- e52d                   bnez    a0,20000faa <ottf_console_init+0x82>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:130
+    case kOttfConsoleUart:
+      // Set a default for the console base address if the base address is not
+      // configured. The default is to use UART0.
+      if (base_addr == 0) {
+20000f42:       /-----------------|--|-- 12041263               bnez    s0,20001066 <ottf_console_init+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20000f46:       |                 |  |   00004517               auipc   a0,0x4
+20000f4a:       |                 |  |   b5250613               addi    a2,a0,-1198 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000f4e:       |                 |  |   0e8f05b7               lui     a1,0xe8f0
+20000f52:       |                 |  |   4501                   li      a0,0
+20000f54:       |                 |  |   4681                   li      a3,0
+20000f56:       |                 |  |   2c6020ef               jal     ra,2000321c <status_create>
+20000f5a:       |                 |  |   4585                   li      a1,1
+20000f5c:       |                 |  |   00b103a3               sb      a1,7(sp)
+20000f60:       |                 |  |   00714583               lbu     a1,7(sp)
+20000f64:       |  /--------------|--|-- 0e059363               bnez    a1,2000104a <ottf_console_init+0x122>
+20000f68:       |  |              |  |   00005517               auipc   a0,0x5
+20000f6c:       |  |              |  |   35c52503               lw      a0,860(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000f70:       |  |     /--------|--|-- cd45                   beqz    a0,20001028 <ottf_console_init+0x100>
+20000f72:       |  |     |        |  |   e000f517               auipc   a0,0xe000f
+20000f76:       |  |     |        |  |   08e50513               addi    a0,a0,142 # 10000 <_chip_info_end>
+20000f7a:       |  |     |        |  |   19400593               li      a1,404
+20000f7e:       |  |     |        |  |   952e                   add     a0,a0,a1
+20000f80:       |  |     |        |  |   4581                   li      a1,0
+20000f82:       |  |     |        |  |   07f010ef               jal     ra,20002800 <base_log_internal_dv>
+20000f86:       |  |     |  /-----|--|-- a07d                   j       20001034 <ottf_console_init+0x10c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:140
+      ottf_console_configure_uart(base_addr);
+      sink = get_uart_sink();
+      getc = uart_getc;
+      break;
+    case (kOttfConsoleSpiDevice):
+      ottf_console_configure_spi_device(base_addr);
+20000f88:       |  |     |  |     |  \-> 8522                   mv      a0,s0
+20000f8a:       |  |     |  |     |      2ead                   jal     20001304 <ottf_console_configure_spi_device>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:141
+      sink = get_spi_device_sink();
+20000f8c:       |  |     |  |     |      0ab010ef               jal     ra,20002836 <get_spi_device_sink>
+20000f90:       |  |     |  |     |      f0001597               auipc   a1,0xf0001
+20000f94:       |  |     |  |     |      0ea5a623               sw      a0,236(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:142
+      getc = spi_device_getc;
+20000f98:       |  |     |  |     |      f0001517               auipc   a0,0xf0001
+20000f9c:       |  |     |  |     |      00000597               auipc   a1,0x0
+20000fa0:       |  |     |  |     |      67e58593               addi    a1,a1,1662 # 2000161a <spi_device_getc>
+20000fa4:       |  |     |  |     |      0eb52423               sw      a1,232(a0) # 10002080 <getc>
+20000fa8:       |  |  /--|--|-----|----- a8f9                   j       20001086 <ottf_console_init+0x15e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+      break;
+    default:
+      CHECK(false, "unsupported OTTF console interface.");
+20000faa:       |  |  |  |  |     \----> 00004517               auipc   a0,0x4
+20000fae:       |  |  |  |  |            aee50613               addi    a2,a0,-1298 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000fb2:       |  |  |  |  |            0e8f05b7               lui     a1,0xe8f0
+20000fb6:       |  |  |  |  |            4501                   li      a0,0
+20000fb8:       |  |  |  |  |            4681                   li      a3,0
+20000fba:       |  |  |  |  |            262020ef               jal     ra,2000321c <status_create>
+20000fbe:       |  |  |  |  |            00010323               sb      zero,6(sp)
+20000fc2:       |  |  |  |  |            00614583               lbu     a1,6(sp)
+20000fc6:       |  |  |  |  |  /-------- e1b1                   bnez    a1,2000100a <ottf_console_init+0xe2>
+20000fc8:       |  |  |  |  |  |         00005517               auipc   a0,0x5
+20000fcc:       |  |  |  |  |  |         2fc52503               lw      a0,764(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000fd0:       |  |  |  |  |  |  /----- cd01                   beqz    a0,20000fe8 <ottf_console_init+0xc0>
+20000fd2:       |  |  |  |  |  |  |      e000f517               auipc   a0,0xe000f
+20000fd6:       |  |  |  |  |  |  |      02e50513               addi    a0,a0,46 # 10000 <_chip_info_end>
+20000fda:       |  |  |  |  |  |  |      1a800593               li      a1,424
+20000fde:       |  |  |  |  |  |  |      952e                   add     a0,a0,a1
+20000fe0:       |  |  |  |  |  |  |      4581                   li      a1,0
+20000fe2:       |  |  |  |  |  |  |      01f010ef               jal     ra,20002800 <base_log_internal_dv>
+20000fe6:       |  |  |  |  |  |  |  /-- a039                   j       20000ff4 <ottf_console_init+0xcc>
+20000fe8:       |  |  |  |  |  |  \--|-> 00004517               auipc   a0,0x4
+20000fec:       |  |  |  |  |  |     |   65450513               addi    a0,a0,1620 # 2000563c <ottf_console_init.log_fields.4>
+20000ff0:       |  |  |  |  |  |     |   774010ef               jal     ra,20002764 <base_log_internal_core>
+20000ff4:       |  |  |  |  |  |     \-> 00004517               auipc   a0,0x4
+20000ff8:       |  |  |  |  |  |         aa450613               addi    a2,a0,-1372 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000ffc:       |  |  |  |  |  |         4535                   li      a0,13
+20000ffe:       |  |  |  |  |  |         0e8f05b7               lui     a1,0xe8f0
+20001002:       |  |  |  |  |  |         09100693               li      a3,145
+20001006:       |  |  |  |  |  |         216020ef               jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000100a:       |  |  |  |  |  \-------> 00052593               slti    a1,a0,0
+2000100e:       |  |  |  |  |            897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+20001010:       |  |  |  |  |            00a03533               snez    a0,a0
+20001014:       |  |  |  |  |            8d6d                   and     a0,a0,a1
+20001016:       |  |  +--|--|----------- c925                   beqz    a0,20001086 <ottf_console_init+0x15e>
+20001018:       |  |  |  |  |            6531                   lui     a0,0xc
+2000101a:       |  |  |  |  |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000101e:       |  |  |  |  |            40b2                   lw      ra,12(sp)
+20001020:       |  |  |  |  |            4422                   lw      s0,8(sp)
+20001022:       |  |  |  |  |            0141                   addi    sp,sp,16
+20001024:       |  |  |  |  |            5f60106f               j       2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20001028:       |  |  |  \--|----------> 00004517               auipc   a0,0x4
+2000102c:       |  |  |     |            60050513               addi    a0,a0,1536 # 20005628 <ottf_console_init.log_fields>
+20001030:       |  |  |     |            734010ef               jal     ra,20002764 <base_log_internal_core>
+20001034:       |  |  |     \----------> 00004517               auipc   a0,0x4
+20001038:       |  |  |                  a6450613               addi    a2,a0,-1436 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000103c:       |  |  |                  4535                   li      a0,13
+2000103e:       |  |  |                  0e8f05b7               lui     a1,0xe8f0
+20001042:       |  |  |                  08300693               li      a3,131
+20001046:       |  |  |                  1d6020ef               jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000104a:       |  \--|----------------> 00052593               slti    a1,a0,0
+2000104e:       |     |                  897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+20001050:       |     |                  00a03533               snez    a0,a0
+20001054:       |     |                  8d6d                   and     a0,a0,a1
+20001056:       |     |                  40000437               lui     s0,0x40000
+2000105a:       +-----|----------------- c511                   beqz    a0,20001066 <ottf_console_init+0x13e>
+2000105c:       |     |                  6531                   lui     a0,0xc
+2000105e:       |     |                  aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001062:       |     |                  5b8010ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:135
+      ottf_console_configure_uart(base_addr);
+20001066:       \-----|----------------> 8522                   mv      a0,s0
+20001068:             |                  201d                   jal     2000108e <ottf_console_configure_uart>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:136
+      sink = get_uart_sink();
+2000106a:             |                  169010ef               jal     ra,200029d2 <get_uart_sink>
+2000106e:             |                  f0001597               auipc   a1,0xf0001
+20001072:             |                  00a5a723               sw      a0,14(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:137
+      getc = uart_getc;
+20001076:             |                  f0001517               auipc   a0,0xf0001
+2000107a:             |                  00000597               auipc   a1,0x0
+2000107e:             |                  1e858593               addi    a1,a1,488 # 20001262 <uart_getc>
+20001082:             |                  00b52523               sw      a1,10(a0) # 10002080 <getc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:148
+      break;
+  }
+}
+20001086:             \----------------> 40b2                   lw      ra,12(sp)
+20001088:                                4422                   lw      s0,8(sp)
+2000108a:                                0141                   addi    sp,sp,16
+2000108c:                                8082                   ret
+
+2000108e <ottf_console_configure_uart>:
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:150
+
+void ottf_console_configure_uart(uintptr_t base_addr) {
+2000108e:                 7179                  addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:151
+  CHECK_DIF_OK(
+20001090:                 d606                  sw      ra,44(sp)
+20001092:                 d422                  sw      s0,40(sp)
+20001094:                 d226                  sw      s1,36(sp)
+20001096:                 d04a                  sw      s2,32(sp)
+20001098:                 f0001597              auipc   a1,0xf0001
+2000109c:                 fe058593              addi    a1,a1,-32 # 10002078 <ottf_console_uart>
+200010a0:                 624020ef              jal     ra,200036c4 <dif_uart_init>
+200010a4:                 00005917              auipc   s2,0x5
+200010a8:       /-------- cd05                  beqz    a0,200010e0 <ottf_console_configure_uart+0x52>
+200010aa:       |         862a                  mv      a2,a0
+200010ac:       |         22092503              lw      a0,544(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+200010b0:       |  /----- cd01                  beqz    a0,200010c8 <ottf_console_configure_uart+0x3a>
+200010b2:       |  |      e000f517              auipc   a0,0xe000f
+200010b6:       |  |      f4e50513              addi    a0,a0,-178 # 10000 <_chip_info_end>
+200010ba:       |  |      1bc00593              li      a1,444
+200010be:       |  |      952e                  add     a0,a0,a1
+200010c0:       |  |      4585                  li      a1,1
+200010c2:       |  |      73e010ef              jal     ra,20002800 <base_log_internal_dv>
+200010c6:       |  |  /-- a801                  j       200010d6 <ottf_console_configure_uart+0x48>
+200010c8:       |  \--|-> 00004517              auipc   a0,0x4
+200010cc:       |     |   58850513              addi    a0,a0,1416 # 20005650 <ottf_console_configure_uart.log_fields>
+200010d0:       |     |   85b2                  mv      a1,a2
+200010d2:       |     |   692010ef              jal     ra,20002764 <base_log_internal_core>
+200010d6:       |     \-> 6531                  lui     a0,0xc
+200010d8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200010dc:       |         53e010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+      dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart));
+  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
+200010e0:       \-------> 00004517              auipc   a0,0x4
+200010e4:                 9b850613              addi    a2,a0,-1608 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200010e8:                 0e8f05b7              lui     a1,0xe8f0
+200010ec:                 4501                  li      a0,0
+200010ee:                 4681                  li      a3,0
+200010f0:                 12c020ef              jal     ra,2000321c <status_create>
+200010f4:                 00005597              auipc   a1,0x5
+200010f8:                 1c458493              addi    s1,a1,452 # 200062b8 <kUartBaudrate>
+200010fc:                 40cc                  lw      a1,4(s1)
+200010fe:                 0015b593              seqz    a1,a1
+20001102:                 00b10023              sb      a1,0(sp)
+20001106:                 00014583              lbu     a1,0(sp)
+2000110a:       /-------- e1a1                  bnez    a1,2000114a <ottf_console_configure_uart+0xbc>
+2000110c:       |         22092503              lw      a0,544(s2)
+20001110:       |  /----- cd01                  beqz    a0,20001128 <ottf_console_configure_uart+0x9a>
+20001112:       |  |      e000f517              auipc   a0,0xe000f
+20001116:       |  |      eee50513              addi    a0,a0,-274 # 10000 <_chip_info_end>
+2000111a:       |  |      1d000593              li      a1,464
+2000111e:       |  |      952e                  add     a0,a0,a1
+20001120:       |  |      4581                  li      a1,0
+20001122:       |  |      6de010ef              jal     ra,20002800 <base_log_internal_dv>
+20001126:       |  |  /-- a039                  j       20001134 <ottf_console_configure_uart+0xa6>
+20001128:       |  \--|-> 00004517              auipc   a0,0x4
+2000112c:       |     |   53c50513              addi    a0,a0,1340 # 20005664 <ottf_console_configure_uart.log_fields.9>
+20001130:       |     |   634010ef              jal     ra,20002764 <base_log_internal_core>
+20001134:       |     \-> 00004517              auipc   a0,0x4
+20001138:       |         96450613              addi    a2,a0,-1692 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000113c:       |         4535                  li      a0,13
+2000113e:       |         0e8f05b7              lui     a1,0xe8f0
+20001142:       |         09900693              li      a3,153
+20001146:       |         0d6020ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000114a:       \-------> 00052593              slti    a1,a0,0
+2000114e:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+20001150:                 00a03533              snez    a0,a0
+20001154:                 8d6d                  and     a0,a0,a1
+20001156:             /-- c511                  beqz    a0,20001162 <ottf_console_configure_uart+0xd4>
+20001158:             |   6531                  lui     a0,0xc
+2000115a:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000115e:             |   4bc010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
+20001162:             \-> 00004517              auipc   a0,0x4
+20001166:                 93650613              addi    a2,a0,-1738 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000116a:                 0e8f05b7              lui     a1,0xe8f0
+2000116e:                 4501                  li      a0,0
+20001170:                 4681                  li      a3,0
+20001172:                 0aa020ef              jal     ra,2000321c <status_create>
+20001176:                 00005597              auipc   a1,0x5
+2000117a:                 13a58413              addi    s0,a1,314 # 200062b0 <kClockFreqPeripheralHz>
+2000117e:                 404c                  lw      a1,4(s0)
+20001180:                 0015b593              seqz    a1,a1
+20001184:                 00b10023              sb      a1,0(sp)
+20001188:                 00014583              lbu     a1,0(sp)
+2000118c:       /-------- e1a1                  bnez    a1,200011cc <ottf_console_configure_uart+0x13e>
+2000118e:       |         22092503              lw      a0,544(s2)
+20001192:       |  /----- cd01                  beqz    a0,200011aa <ottf_console_configure_uart+0x11c>
+20001194:       |  |      e000f517              auipc   a0,0xe000f
+20001198:       |  |      e6c50513              addi    a0,a0,-404 # 10000 <_chip_info_end>
+2000119c:       |  |      1e400593              li      a1,484
+200011a0:       |  |      952e                  add     a0,a0,a1
+200011a2:       |  |      4581                  li      a1,0
+200011a4:       |  |      65c010ef              jal     ra,20002800 <base_log_internal_dv>
+200011a8:       |  |  /-- a039                  j       200011b6 <ottf_console_configure_uart+0x128>
+200011aa:       |  \--|-> 00004517              auipc   a0,0x4
+200011ae:       |     |   4ce50513              addi    a0,a0,1230 # 20005678 <ottf_console_configure_uart.log_fields.12>
+200011b2:       |     |   5b2010ef              jal     ra,20002764 <base_log_internal_core>
+200011b6:       |     \-> 00004517              auipc   a0,0x4
+200011ba:       |         8e250613              addi    a2,a0,-1822 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200011be:       |         4535                  li      a0,13
+200011c0:       |         0e8f05b7              lui     a1,0xe8f0
+200011c4:       |         09b00693              li      a3,155
+200011c8:       |         054020ef              jal     ra,2000321c <status_create>
+200011cc:       \-------> 4084                  lw      s1,0(s1)
+200011ce:                 4000                  lw      s0,0(s0)
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200011d0:                 00052593              slti    a1,a0,0
+200011d4:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+200011d6:                 00a03533              snez    a0,a0
+200011da:                 8d6d                  and     a0,a0,a1
+200011dc:             /-- c511                  beqz    a0,200011e8 <ottf_console_configure_uart+0x15a>
+200011de:             |   6531                  lui     a0,0xc
+200011e0:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200011e4:             |   436010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:156
+        "kClockFreqPeripheralHz must fit in uint32_t");
+  CHECK_DIF_OK(dif_uart_configure(
+200011e8:             \-> c026                  sw      s1,0(sp)
+200011ea:                 c222                  sw      s0,4(sp)
+200011ec:                 c402                  sw      zero,8(sp)
+200011ee:                 4505                  li      a0,1
+200011f0:                 c62a                  sw      a0,12(sp)
+200011f2:                 c82a                  sw      a0,16(sp)
+200011f4:                 ca2a                  sw      a0,20(sp)
+200011f6:                 cc02                  sw      zero,24(sp)
+200011f8:                 f0001517              auipc   a0,0xf0001
+200011fc:                 e8050513              addi    a0,a0,-384 # 10002078 <ottf_console_uart>
+20001200:                 858a                  mv      a1,sp
+20001202:                 572020ef              jal     ra,20003774 <dif_uart_configure>
+20001206:       /-------- cd05                  beqz    a0,2000123e <ottf_console_configure_uart+0x1b0>
+20001208:       |         862a                  mv      a2,a0
+2000120a:       |         22092503              lw      a0,544(s2)
+2000120e:       |  /----- cd01                  beqz    a0,20001226 <ottf_console_configure_uart+0x198>
+20001210:       |  |      e000f517              auipc   a0,0xe000f
+20001214:       |  |      df050513              addi    a0,a0,-528 # 10000 <_chip_info_end>
+20001218:       |  |      1f800593              li      a1,504
+2000121c:       |  |      952e                  add     a0,a0,a1
+2000121e:       |  |      4585                  li      a1,1
+20001220:       |  |      5e0010ef              jal     ra,20002800 <base_log_internal_dv>
+20001224:       |  |  /-- a801                  j       20001234 <ottf_console_configure_uart+0x1a6>
+20001226:       |  \--|-> 00004517              auipc   a0,0x4
+2000122a:       |     |   46650513              addi    a0,a0,1126 # 2000568c <ottf_console_configure_uart.log_fields.16>
+2000122e:       |     |   85b2                  mv      a1,a2
+20001230:       |     |   534010ef              jal     ra,20002764 <base_log_internal_core>
+20001234:       |     \-> 6531                  lui     a0,0xc
+20001236:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000123a:       |         3e0010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:165
+                              .parity_enable = kDifToggleDisabled,
+                              .parity = kDifUartParityEven,
+                              .tx_enable = kDifToggleEnabled,
+                              .rx_enable = kDifToggleEnabled,
+                          }));
+  base_uart_stdout(&ottf_console_uart);
+2000123e:       \-------> f0001517              auipc   a0,0xf0001
+20001242:                 e3a50513              addi    a0,a0,-454 # 10002078 <ottf_console_uart>
+20001246:                 7f8010ef              jal     ra,20002a3e <base_uart_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:168
+
+  // Initialize/Configure console flow control (if requested).
+  if (kOttfTestConfig.enable_uart_flow_control) {
+2000124a:                 00003517              auipc   a0,0x3
+2000124e:                 3c654503              lbu     a0,966(a0) # 20004610 <kOttfTestConfig+0x10>
+20001252:             /-- c111                  beqz    a0,20001256 <ottf_console_configure_uart+0x1c8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:169
+    ottf_console_flow_control_enable();
+20001254:             |   29dd                  jal     2000174a <ottf_console_flow_control_enable>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:171
+  }
+}
+20001256:             \-> 50b2                  lw      ra,44(sp)
+20001258:                 5422                  lw      s0,40(sp)
+2000125a:                 5492                  lw      s1,36(sp)
+2000125c:                 5902                  lw      s2,32(sp)
+2000125e:                 6145                  addi    sp,sp,48
+20001260:                 8082                  ret
+
+20001262 <uart_getc>:
+uart_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:72
+static status_t uart_getc(void *io) {
+20001262:                 1101                  addi    sp,sp,-32
+20001264:                 ce06                  sw      ra,28(sp)
+20001266:                 cc22                  sw      s0,24(sp)
+20001268:                 ca26                  sw      s1,20(sp)
+2000126a:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+2000126c:                 01310593              addi    a1,sp,19
+20001270:                 66e020ef              jal     ra,200038de <dif_uart_byte_receive_polled>
+20001274:                 c62a                  sw      a0,12(sp)
+20001276:                 0028                  addi    a0,sp,8
+20001278:                 006c                  addi    a1,sp,12
+2000127a:                 4611                  li      a2,4
+2000127c:                 615020ef              jal     ra,20004090 <memcpy>
+20001280:                 4522                  lw      a0,8(sp)
+20001282:                 00153593              seqz    a1,a0
+20001286:                 15fd                  addi    a1,a1,-1
+20001288:                 04b5f693              andi    a3,a1,75
+2000128c:                 00004597              auipc   a1,0x4
+20001290:                 80c58613              addi    a2,a1,-2036 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001294:                 0e8f05b7              lui     a1,0xe8f0
+20001298:                 785010ef              jal     ra,2000321c <status_create>
+2000129c:             /-- 02054563              bltz    a0,200012c6 <uart_getc+0x64>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012a0:             |   4585                  li      a1,1
+200012a2:             |   8526                  mv      a0,s1
+200012a4:             |   6da000ef              jal     ra,2000197e <ottf_console_flow_control>
+200012a8:          /--|-- 02054a63              bltz    a0,200012dc <uart_getc+0x7a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:77
+  return OK_STATUS(byte);
+200012ac:          |  |   01314683              lbu     a3,19(sp)
+200012b0:          |  |   00003517              auipc   a0,0x3
+200012b4:          |  |   7e850613              addi    a2,a0,2024 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012b8:          |  |   0e8f05b7              lui     a1,0xe8f0
+200012bc:          |  |   4501                  li      a0,0
+200012be:          |  |   75f010ef              jal     ra,2000321c <status_create>
+200012c2:          |  |   842a                  mv      s0,a0
+200012c4:       /--|--|-- a815                  j       200012f8 <uart_getc+0x96>
+200012c6:       |  |  \-> 842a                  mv      s0,a0
+200012c8:       |  |      897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+200012ca:       |  |      00003597              auipc   a1,0x3
+200012ce:       |  |      7ce58613              addi    a2,a1,1998 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012d2:       |  |      0e8f05b7              lui     a1,0xe8f0
+200012d6:       |  |      04b00693              li      a3,75
+200012da:       |  |  /-- a819                  j       200012f0 <uart_getc+0x8e>
+200012dc:       |  \--|-> 842a                  mv      s0,a0
+200012de:       |     |   897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012e0:       |     |   00003597              auipc   a1,0x3
+200012e4:       |     |   7b858613              addi    a2,a1,1976 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012e8:       |     |   0e8f05b7              lui     a1,0xe8f0
+200012ec:       |     |   04c00693              li      a3,76
+200012f0:       |     \-> 72d010ef              jal     ra,2000321c <status_create>
+200012f4:       |         80fff0ef              jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:78
+}
+200012f8:       \-------> 8522                  mv      a0,s0
+200012fa:                 40f2                  lw      ra,28(sp)
+200012fc:                 4462                  lw      s0,24(sp)
+200012fe:                 44d2                  lw      s1,20(sp)
+20001300:                 6105                  addi    sp,sp,32
+20001302:                 8082                  ret
+
+20001304 <ottf_console_configure_spi_device>:
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:173
+
+void ottf_console_configure_spi_device(uintptr_t base_addr) {
+20001304:                    714d                       addi    sp,sp,-336
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:174
+  CHECK_DIF_OK(dif_spi_device_init_handle(mmio_region_from_addr(base_addr),
+20001306:                    14112623           sw      ra,332(sp)
+2000130a:                    14812423           sw      s0,328(sp)
+2000130e:                    14912223           sw      s1,324(sp)
+20001312:                    15212023           sw      s2,320(sp)
+20001316:                    13312e23           sw      s3,316(sp)
+2000131a:                    13412c23           sw      s4,312(sp)
+2000131e:                    13512a23           sw      s5,308(sp)
+20001322:                    13612823           sw      s6,304(sp)
+20001326:                    13712623           sw      s7,300(sp)
+2000132a:                    13812423           sw      s8,296(sp)
+2000132e:                    f0001597           auipc   a1,0xf0001
+20001332:                    e0258593           addi    a1,a1,-510 # 10002130 <ottf_console_spi_device>
+20001336:                    072020ef           jal     ra,200033a8 <dif_spi_device_init_handle>
+2000133a:                    862a                       mv      a2,a0
+2000133c:                    00005417           auipc   s0,0x5
+20001340:                    e000f517           auipc   a0,0xe000f
+20001344:                    cc050a93           addi    s5,a0,-832 # 10000 <_chip_info_end>
+20001348:          /-------- c61d                       beqz    a2,20001376 <ottf_console_configure_spi_device+0x72>
+2000134a:          |         f8842503           lw      a0,-120(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000134e:          |     /-- c901                       beqz    a0,2000135e <ottf_console_configure_spi_device+0x5a>
+20001350:          |     |   20c00513           li      a0,524
+20001354:          |     |   9556                       add     a0,a0,s5
+20001356:          |     |   4585                       li      a1,1
+20001358:          |     |   4a8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000135c:          |  /--|-- a801                       j       2000136c <ottf_console_configure_spi_device+0x68>
+2000135e:          |  |  \-> 00004517           auipc   a0,0x4
+20001362:          |  |      34250513           addi    a0,a0,834 # 200056a0 <ottf_console_configure_spi_device.log_fields>
+20001366:          |  |      85b2                       mv      a1,a2
+20001368:          |  |      3fc010ef           jal     ra,20002764 <base_log_internal_core>
+2000136c:          |  \----> 6531                       lui     a0,0xc
+2000136e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001372:          |         2a8010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:176
+                                          &ottf_console_spi_device));
+  CHECK_DIF_OK(dif_spi_device_configure(
+20001376:          \-------> c802                       sw      zero,16(sp)
+20001378:                    ca02                       sw      zero,20(sp)
+2000137a:                    4505                       li      a0,1
+2000137c:                    cc2a                       sw      a0,24(sp)
+2000137e:                    f0001517           auipc   a0,0xf0001
+20001382:                    db250513           addi    a0,a0,-590 # 10002130 <ottf_console_spi_device>
+20001386:                    080c                       addi    a1,sp,16
+20001388:                    028020ef           jal     ra,200033b0 <dif_spi_device_configure>
+2000138c:                    f8842b03           lw      s6,-120(s0)
+20001390:          /-------- c51d                       beqz    a0,200013be <ottf_console_configure_spi_device+0xba>
+20001392:          |         862a                       mv      a2,a0
+20001394:          |  /----- 000b0963           beqz    s6,200013a6 <ottf_console_configure_spi_device+0xa2>
+20001398:          |  |      22000513           li      a0,544
+2000139c:          |  |      9556                       add     a0,a0,s5
+2000139e:          |  |      4585                       li      a1,1
+200013a0:          |  |      460010ef           jal     ra,20002800 <base_log_internal_dv>
+200013a4:          |  |  /-- a801                       j       200013b4 <ottf_console_configure_spi_device+0xb0>
+200013a6:          |  \--|-> 00004517           auipc   a0,0x4
+200013aa:          |     |   30e50513           addi    a0,a0,782 # 200056b4 <ottf_console_configure_spi_device.log_fields.20>
+200013ae:          |     |   85b2                       mv      a1,a2
+200013b0:          |     |   3b4010ef           jal     ra,20002764 <base_log_internal_core>
+200013b4:          |     \-> 6531                       lui     a0,0xc
+200013b6:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013ba:          |         260010ef           jal     ra,2000261a <test_status_set>
+200013be:          \-------> 4481                       li      s1,0
+200013c0:                    00004517           auipc   a0,0x4
+200013c4:                    30850413           addi    s0,a0,776 # 200056c8 <ottf_console_configure_spi_device.log_fields.20+0x14>
+200013c8:                    f0001517           auipc   a0,0xf0001
+200013cc:                    d6850b93           addi    s7,a0,-664 # 10002130 <ottf_console_spi_device>
+200013d0:                    4c19                       li      s8,6
+200013d2:                    00004517           auipc   a0,0x4
+200013d6:                    39e50913           addi    s2,a0,926 # 20005770 <ottf_console_configure_spi_device.log_fields.23>
+200013da:                    6531                       lui     a0,0xc
+200013dc:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013e0:                    23400a13           li      s4,564
+200013e4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:235
+          .payload_dir_to_host = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceReadCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+200013e6:       /----------> 0808                       addi    a0,sp,16
+200013e8:       |            4671                       li      a2,28
+200013ea:       |            85a2                       mv      a1,s0
+200013ec:       |            4a5020ef           jal     ra,20004090 <memcpy>
+200013f0:       |            0ff4f593           andi    a1,s1,255
+200013f4:       |            4605                       li      a2,1
+200013f6:       |            0814                       addi    a3,sp,16
+200013f8:       |            855e                       mv      a0,s7
+200013fa:       |            034020ef           jal     ra,2000342e <dif_spi_device_set_flash_command_slot>
+200013fe:       |  /-------- c105                       beqz    a0,2000141e <ottf_console_configure_spi_device+0x11a>
+20001400:       |  |         862a                       mv      a2,a0
+20001402:       |  |  /----- 000b0763           beqz    s6,20001410 <ottf_console_configure_spi_device+0x10c>
+20001406:       |  |  |      4585                       li      a1,1
+20001408:       |  |  |      8552                       mv      a0,s4
+2000140a:       |  |  |      3f6010ef           jal     ra,20002800 <base_log_internal_dv>
+2000140e:       |  |  |  /-- a029                       j       20001418 <ottf_console_configure_spi_device+0x114>
+20001410:       |  |  \--|-> 854a                       mv      a0,s2
+20001412:       |  |     |   85b2                       mv      a1,a2
+20001414:       |  |     |   350010ef           jal     ra,20002764 <base_log_internal_core>
+20001418:       |  |     \-> 854e                       mv      a0,s3
+2000141a:       |  |         200010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:233
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+2000141e:       |  \-------> 0485                       addi    s1,s1,1
+20001420:       |            0471                       addi    s0,s0,28
+20001422:       \----------- fd8492e3           bne     s1,s8,200013e6 <ottf_console_configure_spi_device+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:251
+          .set_busy_status = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(write_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceWriteCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+20001426:                    00004517           auipc   a0,0x4
+2000142a:                    35e50593           addi    a1,a0,862 # 20005784 <ottf_console_configure_spi_device.log_fields.23+0x14>
+2000142e:                    0808                       addi    a0,sp,16
+20001430:                    4671                       li      a2,28
+20001432:                    45f020ef           jal     ra,20004090 <memcpy>
+20001436:                    f0001517           auipc   a0,0xf0001
+2000143a:                    cfa50513           addi    a0,a0,-774 # 10002130 <ottf_console_spi_device>
+2000143e:                    45ad                       li      a1,11
+20001440:                    4605                       li      a2,1
+20001442:                    0814                       addi    a3,sp,16
+20001444:                    7eb010ef           jal     ra,2000342e <dif_spi_device_set_flash_command_slot>
+20001448:          /-------- c51d                       beqz    a0,20001476 <ottf_console_configure_spi_device+0x172>
+2000144a:          |         862a                       mv      a2,a0
+2000144c:          |  /----- 000b0963           beqz    s6,2000145e <ottf_console_configure_spi_device+0x15a>
+20001450:          |  |      24800513           li      a0,584
+20001454:          |  |      9556                       add     a0,a0,s5
+20001456:          |  |      4585                       li      a1,1
+20001458:          |  |      3a8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000145c:          |  |  /-- a801                       j       2000146c <ottf_console_configure_spi_device+0x168>
+2000145e:          |  \--|-> 00004517           auipc   a0,0x4
+20001462:          |     |   34250513           addi    a0,a0,834 # 200057a0 <ottf_console_configure_spi_device.log_fields.26>
+20001466:          |     |   85b2                       mv      a1,a2
+20001468:          |     |   2fc010ef           jal     ra,20002764 <base_log_internal_core>
+2000146c:          |     \-> 6531                       lui     a0,0xc
+2000146e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001472:          |         1a8010ef           jal     ra,2000261a <test_status_set>
+20001476:          \-------> 4401                       li      s0,0
+20001478:                    cafeb537           lui     a0,0xcafeb
+2000147c:                    0509                       addi    a0,a0,2
+spi_device_wait_for_sync():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:102
+  const uint8_t kBootMagicPattern[4] = {0x02, 0xb0, 0xfe, 0xca};
+2000147e:                    12a12223           sw      a0,292(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:103
+  const uint8_t kEmptyPattern[4] = {0};
+20001482:                    12012023           sw      zero,288(sp)
+20001486:                    f0001517           auipc   a0,0xf0001
+2000148a:                    caa50493           addi    s1,a0,-854 # 10002130 <ottf_console_spi_device>
+2000148e:                    28b01b93           bseti   s7,zero,0xb
+20001492:                    00004517           auipc   a0,0x4
+20001496:                    41250913           addi    s2,a0,1042 # 200058a4 <spi_device_wait_for_sync.log_fields>
+2000149a:                    6531                       lui     a0,0xc
+2000149c:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200014a0:                    39c00a13           li      s4,924
+200014a4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:106
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+200014a6:       /----------> 4691                       li      a3,4
+200014a8:       |            1258                       addi    a4,sp,292
+200014aa:       |            8526                       mv      a0,s1
+200014ac:       |            4581                       li      a1,0
+200014ae:       |            8622                       mv      a2,s0
+200014b0:       |            17c020ef           jal     ra,2000362c <dif_spi_device_write_flash_buffer>
+200014b4:       |  /-------- c105                       beqz    a0,200014d4 <ottf_console_configure_spi_device+0x1d0>
+200014b6:       |  |         862a                       mv      a2,a0
+200014b8:       |  |  /----- 000b0763           beqz    s6,200014c6 <ottf_console_configure_spi_device+0x1c2>
+200014bc:       |  |  |      4585                       li      a1,1
+200014be:       |  |  |      8552                       mv      a0,s4
+200014c0:       |  |  |      340010ef           jal     ra,20002800 <base_log_internal_dv>
+200014c4:       |  |  |  /-- a029                       j       200014ce <ottf_console_configure_spi_device+0x1ca>
+200014c6:       |  |  \--|-> 854a                       mv      a0,s2
+200014c8:       |  |     |   85b2                       mv      a1,a2
+200014ca:       |  |     |   29a010ef           jal     ra,20002764 <base_log_internal_core>
+200014ce:       |  |     \-> 854e                       mv      a0,s3
+200014d0:       |  |         14a010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:105
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200014d4:       |  \-------> 0411                       addi    s0,s0,4
+200014d6:       \----------- fd7418e3           bne     s0,s7,200014a6 <ottf_console_configure_spi_device+0x1a2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:112
+  upload_info_t info = {0};
+200014da:                    0808                       addi    a0,sp,16
+200014dc:                    11000613           li      a2,272
+200014e0:                    4581                       li      a1,0
+200014e2:                    431020ef           jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:113
+  CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+200014e6:                    f0001517           auipc   a0,0xf0001
+200014ea:                    c4a50513           addi    a0,a0,-950 # 10002130 <ottf_console_spi_device>
+200014ee:                    080c                       addi    a1,sp,16
+200014f0:                    023000ef           jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+200014f4:       /----------- 06055063           bgez    a0,20001554 <ottf_console_configure_spi_device+0x250>
+200014f8:       |  /-------- 020b0b63           beqz    s6,2000152e <ottf_console_configure_spi_device+0x22a>
+200014fc:       |  |         00010523           sb      zero,10(sp)
+20001500:       |  |         00011423           sh      zero,8(sp)
+20001504:       |  |         006c                       addi    a1,sp,12
+20001506:       |  |         0050                       addi    a2,sp,4
+20001508:       |  |         0034                       addi    a3,sp,8
+2000150a:       |  |         5dd010ef           jal     ra,200032e6 <status_extract>
+2000150e:       |  |  /----- c905                       beqz    a0,2000153e <ottf_console_configure_spi_device+0x23a>
+20001510:       |  |  |      00814603           lbu     a2,8(sp)
+20001514:       |  |  |      00914683           lbu     a3,9(sp)
+20001518:       |  |  |      00a14703           lbu     a4,10(sp)
+2000151c:       |  |  |      4792                       lw      a5,4(sp)
+2000151e:       |  |  |      4832                       lw      a6,12(sp)
+20001520:       |  |  |      3b000513           li      a0,944
+20001524:       |  |  |      9556                       add     a0,a0,s5
+20001526:       |  |  |      4595                       li      a1,5
+20001528:       |  |  |      2d8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000152c:       |  |  |  /-- a839                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000152e:       |  \--|--|-> 85aa                       mv      a1,a0
+20001530:       |     |  |   00004517           auipc   a0,0x4
+20001534:       |     |  |   38850513           addi    a0,a0,904 # 200058b8 <spi_device_wait_for_sync.log_fields.74>
+20001538:       |     |  |   22c010ef           jal     ra,20002764 <base_log_internal_core>
+2000153c:       |     |  +-- a039                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000153e:       |     \--|-> 3c400513           li      a0,964
+20001542:       |        |   9556                       add     a0,a0,s5
+20001544:       |        |   4585                       li      a1,1
+20001546:       |        |   2ba010ef           jal     ra,20002800 <base_log_internal_dv>
+2000154a:       |        \-> 6531                       lui     a0,0xc
+2000154c:       |            aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001550:       |            0ca010ef           jal     ra,2000261a <test_status_set>
+20001554:       \----------> 4401                       li      s0,0
+20001556:                    f0001517           auipc   a0,0xf0001
+2000155a:                    bda50493           addi    s1,a0,-1062 # 10002130 <ottf_console_spi_device>
+2000155e:                    00004517           auipc   a0,0x4
+20001562:                    36e50913           addi    s2,a0,878 # 200058cc <spi_device_wait_for_sync.log_fields.77>
+20001566:                    6531                       lui     a0,0xc
+20001568:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000156c:                    3d800a13           li      s4,984
+20001570:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:116
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+20001572:       /----------> 4691                       li      a3,4
+20001574:       |            1218                       addi    a4,sp,288
+20001576:       |            8526                       mv      a0,s1
+20001578:       |            4581                       li      a1,0
+2000157a:       |            8622                       mv      a2,s0
+2000157c:       |            0b0020ef           jal     ra,2000362c <dif_spi_device_write_flash_buffer>
+20001580:       |  /-------- c105                       beqz    a0,200015a0 <ottf_console_configure_spi_device+0x29c>
+20001582:       |  |         862a                       mv      a2,a0
+20001584:       |  |  /----- 000b0763           beqz    s6,20001592 <ottf_console_configure_spi_device+0x28e>
+20001588:       |  |  |      4585                       li      a1,1
+2000158a:       |  |  |      8552                       mv      a0,s4
+2000158c:       |  |  |      274010ef           jal     ra,20002800 <base_log_internal_dv>
+20001590:       |  |  |  /-- a029                       j       2000159a <ottf_console_configure_spi_device+0x296>
+20001592:       |  |  \--|-> 854a                       mv      a0,s2
+20001594:       |  |     |   85b2                       mv      a1,a2
+20001596:       |  |     |   1ce010ef           jal     ra,20002764 <base_log_internal_core>
+2000159a:       |  |     \-> 854e                       mv      a0,s3
+2000159c:       |  |         07e010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:115
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200015a0:       |  \-------> 0411                       addi    s0,s0,4
+200015a2:       \----------- fd7418e3           bne     s0,s7,20001572 <ottf_console_configure_spi_device+0x26e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:120
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200015a6:                    f0001517           auipc   a0,0xf0001
+200015aa:                    b8a50513           addi    a0,a0,-1142 # 10002130 <ottf_console_spi_device>
+200015ae:                    4581                       li      a1,0
+200015b0:                    0ec020ef           jal     ra,2000369c <dif_spi_device_set_flash_status_registers>
+200015b4:          /-------- c51d                       beqz    a0,200015e2 <ottf_console_configure_spi_device+0x2de>
+200015b6:          |         862a                       mv      a2,a0
+200015b8:          |  /----- 000b0963           beqz    s6,200015ca <ottf_console_configure_spi_device+0x2c6>
+200015bc:          |  |      3ec00513           li      a0,1004
+200015c0:          |  |      9556                       add     a0,a0,s5
+200015c2:          |  |      4585                       li      a1,1
+200015c4:          |  |      23c010ef           jal     ra,20002800 <base_log_internal_dv>
+200015c8:          |  |  /-- a801                       j       200015d8 <ottf_console_configure_spi_device+0x2d4>
+200015ca:          |  \--|-> 00004517           auipc   a0,0x4
+200015ce:          |     |   31650513           addi    a0,a0,790 # 200058e0 <spi_device_wait_for_sync.log_fields.79>
+200015d2:          |     |   85b2                       mv      a1,a2
+200015d4:          |     |   190010ef           jal     ra,20002764 <base_log_internal_core>
+200015d8:          |     \-> 6531                       lui     a0,0xc
+200015da:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200015de:          |         03c010ef           jal     ra,2000261a <test_status_set>
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:255
+        &ottf_console_spi_device, slot, kDifToggleEnabled, write_commands[i]));
+  }
+  spi_device_wait_for_sync(&ottf_console_spi_device);
+  base_spi_device_stdout(&ottf_console_spi_device);
+200015e2:          \-------> f0001517           auipc   a0,0xf0001
+200015e6:                    b4e50513           addi    a0,a0,-1202 # 10002130 <ottf_console_spi_device>
+200015ea:                    436010ef           jal     ra,20002a20 <base_spi_device_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:256
+}
+200015ee:                    14c12083           lw      ra,332(sp)
+200015f2:                    14812403           lw      s0,328(sp)
+200015f6:                    14412483           lw      s1,324(sp)
+200015fa:                    14012903           lw      s2,320(sp)
+200015fe:                    13c12983           lw      s3,316(sp)
+20001602:                    13812a03           lw      s4,312(sp)
+20001606:                    13412a83           lw      s5,308(sp)
+2000160a:                    13012b03           lw      s6,304(sp)
+2000160e:                    12c12b83           lw      s7,300(sp)
+20001612:                    12812c03           lw      s8,296(sp)
+20001616:                    6171                       addi    sp,sp,336
+20001618:                    8082                       ret
+
+2000161a <spi_device_getc>:
+spi_device_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:87
+static status_t spi_device_getc(void *io) {
+2000161a:                       1101                    addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:91
+  if (index == info.data_len) {
+2000161c:                       ce06                    sw      ra,28(sp)
+2000161e:                       cc22                    sw      s0,24(sp)
+20001620:                       ca26                    sw      s1,20(sp)
+20001622:                       c84a                    sw      s2,16(sp)
+20001624:                       c64e                    sw      s3,12(sp)
+20001626:                       f0001417                auipc   s0,0xf0001
+2000162a:                       a6642583                lw      a1,-1434(s0) # 1000208c <spi_device_getc.index>
+2000162e:                       f0001617                auipc   a2,0xf0001
+20001632:                       b1260993                addi    s3,a2,-1262 # 10002140 <spi_device_getc.info>
+20001636:                       0049d603                lhu     a2,4(s3)
+2000163a:       /-------------- 0ec59063                bne     a1,a2,2000171a <spi_device_getc+0x100>
+2000163e:       |               892a                    mv      s2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:92
+    memset(&info, 0, sizeof(upload_info_t));
+20001640:       |               f0001517                auipc   a0,0xf0001
+20001644:       |               b0050493                addi    s1,a0,-1280 # 10002140 <spi_device_getc.info>
+20001648:       |               11000613                li      a2,272
+2000164c:       |               8526                    mv      a0,s1
+2000164e:       |               4581                    li      a1,0
+20001650:       |               2c3020ef                jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:93
+    CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+20001654:       |               854a                    mv      a0,s2
+20001656:       |               85a6                    mv      a1,s1
+20001658:       |               6ba000ef                jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+2000165c:       |  /----------- 06055b63                bgez    a0,200016d2 <spi_device_getc+0xb8>
+20001660:       |  |            85aa                    mv      a1,a0
+20001662:       |  |            00005517                auipc   a0,0x5
+20001666:       |  |            c6252503                lw      a0,-926(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000166a:       |  |  /-------- cd15                    beqz    a0,200016a6 <spi_device_getc+0x8c>
+2000166c:       |  |  |         00010323                sb      zero,6(sp)
+20001670:       |  |  |         00011223                sh      zero,4(sp)
+20001674:       |  |  |         002c                    addi    a1,sp,8
+20001676:       |  |  |         860a                    mv      a2,sp
+20001678:       |  |  |         0054                    addi    a3,sp,4
+2000167a:       |  |  |         46d010ef                jal     ra,200032e6 <status_extract>
+2000167e:       |  |  |  /----- c91d                    beqz    a0,200016b4 <spi_device_getc+0x9a>
+20001680:       |  |  |  |      00414603                lbu     a2,4(sp)
+20001684:       |  |  |  |      00514683                lbu     a3,5(sp)
+20001688:       |  |  |  |      00614703                lbu     a4,6(sp)
+2000168c:       |  |  |  |      4782                    lw      a5,0(sp)
+2000168e:       |  |  |  |      4822                    lw      a6,8(sp)
+20001690:       |  |  |  |      e000f517                auipc   a0,0xe000f
+20001694:       |  |  |  |      97050513                addi    a0,a0,-1680 # 10000 <_chip_info_end>
+20001698:       |  |  |  |      36000593                li      a1,864
+2000169c:       |  |  |  |      952e                    add     a0,a0,a1
+2000169e:       |  |  |  |      4595                    li      a1,5
+200016a0:       |  |  |  |      160010ef                jal     ra,20002800 <base_log_internal_dv>
+200016a4:       |  |  |  |  /-- a015                    j       200016c8 <spi_device_getc+0xae>
+200016a6:       |  |  \--|--|-> 00004517                auipc   a0,0x4
+200016aa:       |  |     |  |   1d650513                addi    a0,a0,470 # 2000587c <spi_device_getc.log_fields.64>
+200016ae:       |  |     |  |   0b6010ef                jal     ra,20002764 <base_log_internal_core>
+200016b2:       |  |     |  +-- a819                    j       200016c8 <spi_device_getc+0xae>
+200016b4:       |  |     \--|-> e000f517                auipc   a0,0xe000f
+200016b8:       |  |        |   94c50513                addi    a0,a0,-1716 # 10000 <_chip_info_end>
+200016bc:       |  |        |   37400593                li      a1,884
+200016c0:       |  |        |   952e                    add     a0,a0,a1
+200016c2:       |  |        |   4585                    li      a1,1
+200016c4:       |  |        |   13c010ef                jal     ra,20002800 <base_log_internal_dv>
+200016c8:       |  |        \-> 6531                    lui     a0,0xc
+200016ca:       |  |            aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200016ce:       |  |            74d000ef                jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:94
+    index = 0;
+200016d2:       |  \----------> a6042323                sw      zero,-1434(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:95
+    CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200016d6:       |               854a                    mv      a0,s2
+200016d8:       |               4581                    li      a1,0
+200016da:       |               7c3010ef                jal     ra,2000369c <dif_spi_device_set_flash_status_registers>
+200016de:       +-------------- cd15                    beqz    a0,2000171a <spi_device_getc+0x100>
+200016e0:       |               862a                    mv      a2,a0
+200016e2:       |               00005517                auipc   a0,0x5
+200016e6:       |               be252503                lw      a0,-1054(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+200016ea:       |        /----- cd01                    beqz    a0,20001702 <spi_device_getc+0xe8>
+200016ec:       |        |      e000f517                auipc   a0,0xe000f
+200016f0:       |        |      91450513                addi    a0,a0,-1772 # 10000 <_chip_info_end>
+200016f4:       |        |      38800593                li      a1,904
+200016f8:       |        |      952e                    add     a0,a0,a1
+200016fa:       |        |      4585                    li      a1,1
+200016fc:       |        |      104010ef                jal     ra,20002800 <base_log_internal_dv>
+20001700:       |        |  /-- a801                    j       20001710 <spi_device_getc+0xf6>
+20001702:       |        \--|-> 00004517                auipc   a0,0x4
+20001706:       |           |   18e50513                addi    a0,a0,398 # 20005890 <spi_device_getc.log_fields.67>
+2000170a:       |           |   85b2                    mv      a1,a2
+2000170c:       |           |   058010ef                jal     ra,20002764 <base_log_internal_core>
+20001710:       |           \-> 6531                    lui     a0,0xc
+20001712:       |               aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001716:       |               705000ef                jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:98
+  return OK_STATUS(info.data[index++]);
+2000171a:       \-------------> a6642503                lw      a0,-1434(s0)
+2000171e:                       99aa                    add     s3,s3,a0
+20001720:                       0109c683                lbu     a3,16(s3)
+20001724:                       0505                    addi    a0,a0,1
+20001726:                       a6a42323                sw      a0,-1434(s0)
+2000172a:                       00003517                auipc   a0,0x3
+2000172e:                       36e50613                addi    a2,a0,878 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001732:                       0e8f05b7                lui     a1,0xe8f0
+20001736:                       4501                    li      a0,0
+20001738:                       2e5010ef                jal     ra,2000321c <status_create>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:99
+}
+2000173c:                       40f2                    lw      ra,28(sp)
+2000173e:                       4462                    lw      s0,24(sp)
+20001740:                       44d2                    lw      s1,20(sp)
+20001742:                       4942                    lw      s2,16(sp)
+20001744:                       49b2                    lw      s3,12(sp)
+20001746:                       6105                    addi    sp,sp,32
+20001748:                       8082                    ret
+
+2000174a <ottf_console_flow_control_enable>:
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:274
+    default:
+      return kTopEarlgreyPlicIrqIdUart0RxWatermark;
+  }
+}
+
+void ottf_console_flow_control_enable(void) {
+2000174a:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:275
+  CHECK_DIF_OK(dif_rv_plic_init(
+2000174c:                 ce06                  sw      ra,28(sp)
+2000174e:                 cc22                  sw      s0,24(sp)
+20001750:                 ca26                  sw      s1,20(sp)
+20001752:                 c84a                  sw      s2,16(sp)
+20001754:                 c64e                  sw      s3,12(sp)
+20001756:                 f0001517              auipc   a0,0xf0001
+2000175a:                 93e50593              addi    a1,a0,-1730 # 10002094 <ottf_plic>
+2000175e:                 48000537              lui     a0,0x48000
+20001762:                 4ef000ef              jal     ra,20002450 <dif_rv_plic_init>
+20001766:                 00005497              auipc   s1,0x5
+2000176a:       /-------- cd05                  beqz    a0,200017a2 <ottf_console_flow_control_enable+0x58>
+2000176c:       |         862a                  mv      a2,a0
+2000176e:       |         b5e4a503              lw      a0,-1186(s1) # 200062c4 <kDeviceLogBypassUartAddress>
+20001772:       |  /----- cd01                  beqz    a0,2000178a <ottf_console_flow_control_enable+0x40>
+20001774:       |  |      e000f517              auipc   a0,0xe000f
+20001778:       |  |      88c50513              addi    a0,a0,-1908 # 10000 <_chip_info_end>
+2000177c:       |  |      25c00593              li      a1,604
+20001780:       |  |      952e                  add     a0,a0,a1
+20001782:       |  |      4585                  li      a1,1
+20001784:       |  |      07c010ef              jal     ra,20002800 <base_log_internal_dv>
+20001788:       |  |  /-- a801                  j       20001798 <ottf_console_flow_control_enable+0x4e>
+2000178a:       |  \--|-> 00004517              auipc   a0,0x4
+2000178e:       |     |   02a50513              addi    a0,a0,42 # 200057b4 <ottf_console_flow_control_enable.log_fields>
+20001792:       |     |   85b2                  mv      a1,a2
+20001794:       |     |   7d1000ef              jal     ra,20002764 <base_log_internal_core>
+20001798:       |     \-> 6531                  lui     a0,0xc
+2000179a:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000179e:       |         67d000ef              jal     ra,2000261a <test_status_set>
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+200017a2:       \-------> 00003517              auipc   a0,0x3
+200017a6:                 e5e50413              addi    s0,a0,-418 # 20004600 <kOttfTestConfig>
+200017aa:                 4048                  lw      a0,4(s0)
+200017ac:                 4585                  li      a1,1
+200017ae:          /----- 00b50763              beq     a0,a1,200017bc <ottf_console_flow_control_enable+0x72>
+200017b2:          |      f0001517              auipc   a0,0xf0001
+200017b6:          |      8c650913              addi    s2,a0,-1850 # 10002078 <ottf_console_uart>
+200017ba:          |  /-- a029                  j       200017c4 <ottf_console_flow_control_enable+0x7a>
+200017bc:          \--|-> f0001517              auipc   a0,0xf0001
+200017c0:             |   97450913              addi    s2,a0,-1676 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:279
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic));
+
+  dif_uart_t *uart = (dif_uart_t *)ottf_console_get();
+  CHECK_DIF_OK(dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark));
+200017c4:             \-> 458d                  li      a1,3
+200017c6:                 854a                  mv      a0,s2
+200017c8:                 096020ef              jal     ra,2000385e <dif_uart_watermark_rx_set>
+200017cc:       /-------- cd05                  beqz    a0,20001804 <ottf_console_flow_control_enable+0xba>
+200017ce:       |         862a                  mv      a2,a0
+200017d0:       |         b5e4a503              lw      a0,-1186(s1)
+200017d4:       |  /----- cd01                  beqz    a0,200017ec <ottf_console_flow_control_enable+0xa2>
+200017d6:       |  |      e000f517              auipc   a0,0xe000f
+200017da:       |  |      82a50513              addi    a0,a0,-2006 # 10000 <_chip_info_end>
+200017de:       |  |      27000593              li      a1,624
+200017e2:       |  |      952e                  add     a0,a0,a1
+200017e4:       |  |      4585                  li      a1,1
+200017e6:       |  |      01a010ef              jal     ra,20002800 <base_log_internal_dv>
+200017ea:       |  |  /-- a801                  j       200017fa <ottf_console_flow_control_enable+0xb0>
+200017ec:       |  \--|-> 00004517              auipc   a0,0x4
+200017f0:       |     |   fdc50513              addi    a0,a0,-36 # 200057c8 <ottf_console_flow_control_enable.log_fields.30>
+200017f4:       |     |   85b2                  mv      a1,a2
+200017f6:       |     |   76f000ef              jal     ra,20002764 <base_log_internal_core>
+200017fa:       |     \-> 6531                  lui     a0,0xc
+200017fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001800:       |         61b000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:280
+  CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001804:       \-------> 4585                  li      a1,1
+20001806:                 4605                  li      a2,1
+20001808:                 854a                  mv      a0,s2
+2000180a:                 70f010ef              jal     ra,20003718 <dif_uart_irq_set_enabled>
+2000180e:       /-------- cd05                  beqz    a0,20001846 <ottf_console_flow_control_enable+0xfc>
+20001810:       |         862a                  mv      a2,a0
+20001812:       |         b5e4a503              lw      a0,-1186(s1)
+20001816:       |  /----- cd01                  beqz    a0,2000182e <ottf_console_flow_control_enable+0xe4>
+20001818:       |  |      e000e517              auipc   a0,0xe000e
+2000181c:       |  |      7e850513              addi    a0,a0,2024 # 10000 <_chip_info_end>
+20001820:       |  |      28400593              li      a1,644
+20001824:       |  |      952e                  add     a0,a0,a1
+20001826:       |  |      4585                  li      a1,1
+20001828:       |  |      7d9000ef              jal     ra,20002800 <base_log_internal_dv>
+2000182c:       |  |  /-- a801                  j       2000183c <ottf_console_flow_control_enable+0xf2>
+2000182e:       |  \--|-> 00004517              auipc   a0,0x4
+20001832:       |     |   fae50513              addi    a0,a0,-82 # 200057dc <ottf_console_flow_control_enable.log_fields.33>
+20001836:       |     |   85b2                  mv      a1,a2
+20001838:       |     |   72d000ef              jal     ra,20002764 <base_log_internal_core>
+2000183c:       |     \-> 6531                  lui     a0,0xc
+2000183e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001842:       |         5d9000ef              jal     ra,2000261a <test_status_set>
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001846:       \-------> 4408                  lw      a0,8(s0)
+20001848:                 c00005b7              lui     a1,0xc0000
+2000184c:                 95aa                  add     a1,a1,a0
+2000184e:                 81c1                  srli    a1,a1,0x10
+20001850:                 0542                  slli    a0,a0,0x10
+20001852:                 8d4d                  or      a0,a0,a1
+20001854:                 fff50413              addi    s0,a0,-1
+20001858:                 450d                  li      a0,3
+2000185a:                 208469b3              sh3add  s3,s0,s0
+2000185e:          /----- 00a46463              bltu    s0,a0,20001866 <ottf_console_flow_control_enable+0x11c>
+20001862:          |      4589                  li      a1,2
+20001864:          |  /-- a019                  j       2000186a <ottf_console_flow_control_enable+0x120>
+20001866:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:284
+                                        kDifToggleEnabled));
+
+  // Set IRQ priorities to MAX
+  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
+2000186a:             \-> 00004517              auipc   a0,0x4
+2000186e:                 60252603              lw      a2,1538(a0) # 20005e6c <kDifRvPlicMaxPriority>
+20001872:                 f0001517              auipc   a0,0xf0001
+20001876:                 82250513              addi    a0,a0,-2014 # 10002094 <ottf_plic>
+2000187a:                 42d000ef              jal     ra,200024a6 <dif_rv_plic_irq_set_priority>
+2000187e:       /-------- cd05                  beqz    a0,200018b6 <ottf_console_flow_control_enable+0x16c>
+20001880:       |         862a                  mv      a2,a0
+20001882:       |         b5e4a503              lw      a0,-1186(s1)
+20001886:       |  /----- cd01                  beqz    a0,2000189e <ottf_console_flow_control_enable+0x154>
+20001888:       |  |      e000e517              auipc   a0,0xe000e
+2000188c:       |  |      77850513              addi    a0,a0,1912 # 10000 <_chip_info_end>
+20001890:       |  |      29800593              li      a1,664
+20001894:       |  |      952e                  add     a0,a0,a1
+20001896:       |  |      4585                  li      a1,1
+20001898:       |  |      769000ef              jal     ra,20002800 <base_log_internal_dv>
+2000189c:       |  |  /-- a801                  j       200018ac <ottf_console_flow_control_enable+0x162>
+2000189e:       |  \--|-> 00004517              auipc   a0,0x4
+200018a2:       |     |   f5250513              addi    a0,a0,-174 # 200057f0 <ottf_console_flow_control_enable.log_fields.36>
+200018a6:       |     |   85b2                  mv      a1,a2
+200018a8:       |     |   6bd000ef              jal     ra,20002764 <base_log_internal_core>
+200018ac:       |     \-> 6531                  lui     a0,0xc
+200018ae:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200018b2:       |         569000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:287
+      &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority));
+  // Set Ibex IRQ priority threshold level
+  CHECK_DIF_OK(dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget,
+200018b6:       \-------> 00004517              auipc   a0,0x4
+200018ba:                 5b252603              lw      a2,1458(a0) # 20005e68 <kDifRvPlicMinPriority>
+200018be:                 f0000517              auipc   a0,0xf0000
+200018c2:                 7d650513              addi    a0,a0,2006 # 10002094 <ottf_plic>
+200018c6:                 4581                  li      a1,0
+200018c8:                 409000ef              jal     ra,200024d0 <dif_rv_plic_target_set_threshold>
+200018cc:       /-------- cd05                  beqz    a0,20001904 <ottf_console_flow_control_enable+0x1ba>
+200018ce:       |         862a                  mv      a2,a0
+200018d0:       |         b5e4a503              lw      a0,-1186(s1)
+200018d4:       |  /----- cd01                  beqz    a0,200018ec <ottf_console_flow_control_enable+0x1a2>
+200018d6:       |  |      e000e517              auipc   a0,0xe000e
+200018da:       |  |      72a50513              addi    a0,a0,1834 # 10000 <_chip_info_end>
+200018de:       |  |      2ac00593              li      a1,684
+200018e2:       |  |      952e                  add     a0,a0,a1
+200018e4:       |  |      4585                  li      a1,1
+200018e6:       |  |      71b000ef              jal     ra,20002800 <base_log_internal_dv>
+200018ea:       |  |  /-- a801                  j       200018fa <ottf_console_flow_control_enable+0x1b0>
+200018ec:       |  \--|-> 00004517              auipc   a0,0x4
+200018f0:       |     |   f1850513              addi    a0,a0,-232 # 20005804 <ottf_console_flow_control_enable.log_fields.39>
+200018f4:       |     |   85b2                  mv      a1,a2
+200018f6:       |     |   66f000ef              jal     ra,20002764 <base_log_internal_core>
+200018fa:       |     \-> 6531                  lui     a0,0xc
+200018fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001900:       |         51b000ef              jal     ra,2000261a <test_status_set>
+20001904:       \-------> 450d                  li      a0,3
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001906:          /----- 00a46463              bltu    s0,a0,2000190e <ottf_console_flow_control_enable+0x1c4>
+2000190a:          |      4589                  li      a1,2
+2000190c:          |  /-- a019                  j       20001912 <ottf_console_flow_control_enable+0x1c8>
+2000190e:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:290
+                                                kDifRvPlicMinPriority));
+  // Enable IRQs in PLIC
+  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(&ottf_plic,
+20001912:             \-> f0000517              auipc   a0,0xf0000
+20001916:                 78250513              addi    a0,a0,1922 # 10002094 <ottf_plic>
+2000191a:                 4685                  li      a3,1
+2000191c:                 4405                  li      s0,1
+2000191e:                 4601                  li      a2,0
+20001920:                 33f000ef              jal     ra,2000245e <dif_rv_plic_irq_set_enabled>
+20001924:       /-------- cd05                  beqz    a0,2000195c <ottf_console_flow_control_enable+0x212>
+20001926:       |         862a                  mv      a2,a0
+20001928:       |         b5e4a503              lw      a0,-1186(s1)
+2000192c:       |  /----- cd01                  beqz    a0,20001944 <ottf_console_flow_control_enable+0x1fa>
+2000192e:       |  |      e000e517              auipc   a0,0xe000e
+20001932:       |  |      6d250513              addi    a0,a0,1746 # 10000 <_chip_info_end>
+20001936:       |  |      2c000593              li      a1,704
+2000193a:       |  |      952e                  add     a0,a0,a1
+2000193c:       |  |      4585                  li      a1,1
+2000193e:       |  |      6c3000ef              jal     ra,20002800 <base_log_internal_dv>
+20001942:       |  |  /-- a801                  j       20001952 <ottf_console_flow_control_enable+0x208>
+20001944:       |  \--|-> 00004517              auipc   a0,0x4
+20001948:       |     |   ed450513              addi    a0,a0,-300 # 20005818 <ottf_console_flow_control_enable.log_fields.42>
+2000194c:       |     |   85b2                  mv      a1,a2
+2000194e:       |     |   617000ef              jal     ra,20002764 <base_log_internal_core>
+20001952:       |     \-> 6531                  lui     a0,0xc
+20001954:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001958:       |         4c3000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:294
+                                           get_flow_control_watermark_plic_id(),
+                                           kPlicTarget, kDifToggleEnabled));
+
+  flow_control_state = kOttfConsoleFlowControlAuto;
+2000195c:       \-------> f0000517              auipc   a0,0xf0000
+20001960:                 72852423              sw      s0,1832(a0) # 10002084 <flow_control_state>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:295
+  irq_global_ctrl(true);
+20001964:                 4505                  li      a0,1
+20001966:                 2eb1                  jal     20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:296
+  irq_external_ctrl(true);
+20001968:                 4505                  li      a0,1
+2000196a:                 26ad                  jal     20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:298
+  // Make sure we're in the Resume state and we emit a Resume to the UART.
+  ottf_console_flow_control((dif_uart_t *)ottf_console_get(),
+2000196c:                 45c5                  li      a1,17
+2000196e:                 854a                  mv      a0,s2
+20001970:                 40f2                  lw      ra,28(sp)
+20001972:                 4462                  lw      s0,24(sp)
+20001974:                 44d2                  lw      s1,20(sp)
+20001976:                 4942                  lw      s2,16(sp)
+20001978:                 49b2                  lw      s3,12(sp)
+2000197a:                 6105                  addi    sp,sp,32
+2000197c:                 a009                  j       2000197e <ottf_console_flow_control>
+
+2000197e <ottf_console_flow_control>:
+ottf_console_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:351
+}
+
+// The public API has to save and restore interrupts to avoid an
+// unexpected write to the global `flow_control_state`.
+status_t ottf_console_flow_control(const dif_uart_t *uart,
+                                   ottf_console_flow_control_t ctrl) {
+2000197e:                 1101                  addi    sp,sp,-32
+20001980:                 ce06                  sw      ra,28(sp)
+20001982:                 cc22                  sw      s0,24(sp)
+20001984:                 ca26                  sw      s1,20(sp)
+20001986:                 c84a                  sw      s2,16(sp)
+20001988:                 84ae                  mv      s1,a1
+2000198a:                 842a                  mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:353
+  dif_uart_irq_enable_snapshot_t snapshot;
+  CHECK_DIF_OK(dif_uart_irq_disable_all(uart, &snapshot));
+2000198c:                 006c                  addi    a1,sp,12
+2000198e:                 5b5010ef              jal     ra,20003742 <dif_uart_irq_disable_all>
+20001992:                 00005917              auipc   s2,0x5
+20001996:       /-------- cd05                  beqz    a0,200019ce <ottf_console_flow_control+0x50>
+20001998:       |         862a                  mv      a2,a0
+2000199a:       |         93292503              lw      a0,-1742(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+2000199e:       |  /----- cd01                  beqz    a0,200019b6 <ottf_console_flow_control+0x38>
+200019a0:       |  |      e000e517              auipc   a0,0xe000e
+200019a4:       |  |      66050513              addi    a0,a0,1632 # 10000 <_chip_info_end>
+200019a8:       |  |      2fc00593              li      a1,764
+200019ac:       |  |      952e                  add     a0,a0,a1
+200019ae:       |  |      4585                  li      a1,1
+200019b0:       |  |      651000ef              jal     ra,20002800 <base_log_internal_dv>
+200019b4:       |  |  /-- a801                  j       200019c4 <ottf_console_flow_control+0x46>
+200019b6:       |  \--|-> 00004517              auipc   a0,0x4
+200019ba:       |     |   e9e50513              addi    a0,a0,-354 # 20005854 <ottf_console_flow_control.log_fields>
+200019be:       |     |   85b2                  mv      a1,a2
+200019c0:       |     |   5a5000ef              jal     ra,20002764 <base_log_internal_core>
+200019c4:       |     \-> 6531                  lui     a0,0xc
+200019c6:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200019ca:       |         451000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:354
+  status_t s = manage_flow_control(uart, ctrl);
+200019ce:       \-------> 8522                  mv      a0,s0
+200019d0:                 85a6                  mv      a1,s1
+200019d2:                 223d                  jal     20001b00 <manage_flow_control>
+200019d4:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:355
+  CHECK_DIF_OK(dif_uart_irq_restore_all(uart, &snapshot));
+200019d6:                 006c                  addi    a1,sp,12
+200019d8:                 8522                  mv      a0,s0
+200019da:                 581010ef              jal     ra,2000375a <dif_uart_irq_restore_all>
+200019de:       /-------- cd05                  beqz    a0,20001a16 <ottf_console_flow_control+0x98>
+200019e0:       |         862a                  mv      a2,a0
+200019e2:       |         93292503              lw      a0,-1742(s2)
+200019e6:       |  /----- cd01                  beqz    a0,200019fe <ottf_console_flow_control+0x80>
+200019e8:       |  |      e000e517              auipc   a0,0xe000e
+200019ec:       |  |      61850513              addi    a0,a0,1560 # 10000 <_chip_info_end>
+200019f0:       |  |      31000593              li      a1,784
+200019f4:       |  |      952e                  add     a0,a0,a1
+200019f6:       |  |      4585                  li      a1,1
+200019f8:       |  |      609000ef              jal     ra,20002800 <base_log_internal_dv>
+200019fc:       |  |  /-- a801                  j       20001a0c <ottf_console_flow_control+0x8e>
+200019fe:       |  \--|-> 00004517              auipc   a0,0x4
+20001a02:       |     |   e6a50513              addi    a0,a0,-406 # 20005868 <ottf_console_flow_control.log_fields.50>
+20001a06:       |     |   85b2                  mv      a1,a2
+20001a08:       |     |   55d000ef              jal     ra,20002764 <base_log_internal_core>
+20001a0c:       |     \-> 6531                  lui     a0,0xc
+20001a0e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001a12:       |         409000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:357
+  return s;
+}
+20001a16:       \-------> 8526                  mv      a0,s1
+20001a18:                 40f2                  lw      ra,28(sp)
+20001a1a:                 4462                  lw      s0,24(sp)
+20001a1c:                 44d2                  lw      s1,20(sp)
+20001a1e:                 4942                  lw      s2,16(sp)
+20001a20:                 6105                  addi    sp,sp,32
+20001a22:                 8082                  ret
+
+20001a24 <ottf_console_flow_control_isr>:
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:335
+bool ottf_console_flow_control_isr(uint32_t *exc_info) {
+20001a24:                 1101                  addi    sp,sp,-32
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+20001a26:                 ce06                  sw      ra,28(sp)
+20001a28:                 cc22                  sw      s0,24(sp)
+20001a2a:                 ca26                  sw      s1,20(sp)
+20001a2c:                 c84a                  sw      s2,16(sp)
+20001a2e:                 00003517              auipc   a0,0x3
+20001a32:                 bd652503              lw      a0,-1066(a0) # 20004604 <kOttfTestConfig+0x4>
+20001a36:                 4585                  li      a1,1
+20001a38:          /----- 00b50763              beq     a0,a1,20001a46 <ottf_console_flow_control_isr+0x22>
+20001a3c:          |      f0000517              auipc   a0,0xf0000
+20001a40:          |      63c50413              addi    s0,a0,1596 # 10002078 <ottf_console_uart>
+20001a44:          |  /-- a029                  j       20001a4e <ottf_console_flow_control_isr+0x2a>
+20001a46:          \--|-> f0000517              auipc   a0,0xf0000
+20001a4a:             |   6ea50413              addi    s0,a0,1770 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:337
+  flow_control_irqs += 1;
+20001a4e:             \-> f0000517              auipc   a0,0xf0000
+20001a52:                 63a52583              lw      a1,1594(a0) # 10002088 <flow_control_irqs>
+20001a56:                 0585                  addi    a1,a1,1
+20001a58:                 62b52d23              sw      a1,1594(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:339
+  CHECK_DIF_OK(dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx));
+20001a5c:                 4585                  li      a1,1
+20001a5e:                 00f10613              addi    a2,sp,15
+20001a62:                 8522                  mv      a0,s0
+20001a64:                 46f010ef              jal     ra,200036d2 <dif_uart_irq_is_pending>
+20001a68:                 00005917              auipc   s2,0x5
+20001a6c:       /-------- cd05                  beqz    a0,20001aa4 <ottf_console_flow_control_isr+0x80>
+20001a6e:       |         862a                  mv      a2,a0
+20001a70:       |         85c92503              lw      a0,-1956(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+20001a74:       |  /----- cd01                  beqz    a0,20001a8c <ottf_console_flow_control_isr+0x68>
+20001a76:       |  |      e000e517              auipc   a0,0xe000e
+20001a7a:       |  |      58a50513              addi    a0,a0,1418 # 10000 <_chip_info_end>
+20001a7e:       |  |      2d400593              li      a1,724
+20001a82:       |  |      952e                  add     a0,a0,a1
+20001a84:       |  |      4585                  li      a1,1
+20001a86:       |  |      57b000ef              jal     ra,20002800 <base_log_internal_dv>
+20001a8a:       |  |  /-- a801                  j       20001a9a <ottf_console_flow_control_isr+0x76>
+20001a8c:       |  \--|-> 00004517              auipc   a0,0x4
+20001a90:       |     |   da050513              addi    a0,a0,-608 # 2000582c <ottf_console_flow_control_isr.log_fields>
+20001a94:       |     |   85b2                  mv      a1,a2
+20001a96:       |     |   4cf000ef              jal     ra,20002764 <base_log_internal_core>
+20001a9a:       |     \-> 6531                  lui     a0,0xc
+20001a9c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aa0:       |         37b000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001aa4:       \-------> 00f14483              lbu     s1,15(sp)
+20001aa8:       /-------- c4a1                  beqz    s1,20001af0 <ottf_console_flow_control_isr+0xcc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:341
+    manage_flow_control(uart, kOttfConsoleFlowControlAuto);
+20001aaa:       |         4585                  li      a1,1
+20001aac:       |         8522                  mv      a0,s0
+20001aae:       |         2889                  jal     20001b00 <manage_flow_control>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:342
+    CHECK_DIF_OK(dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark));
+20001ab0:       |         4585                  li      a1,1
+20001ab2:       |         8522                  mv      a0,s0
+20001ab4:       |         449010ef              jal     ra,200036fc <dif_uart_irq_acknowledge>
+20001ab8:       +-------- cd05                  beqz    a0,20001af0 <ottf_console_flow_control_isr+0xcc>
+20001aba:       |         862a                  mv      a2,a0
+20001abc:       |         85c92503              lw      a0,-1956(s2)
+20001ac0:       |  /----- cd01                  beqz    a0,20001ad8 <ottf_console_flow_control_isr+0xb4>
+20001ac2:       |  |      e000e517              auipc   a0,0xe000e
+20001ac6:       |  |      53e50513              addi    a0,a0,1342 # 10000 <_chip_info_end>
+20001aca:       |  |      2e800593              li      a1,744
+20001ace:       |  |      952e                  add     a0,a0,a1
+20001ad0:       |  |      4585                  li      a1,1
+20001ad2:       |  |      52f000ef              jal     ra,20002800 <base_log_internal_dv>
+20001ad6:       |  |  /-- a801                  j       20001ae6 <ottf_console_flow_control_isr+0xc2>
+20001ad8:       |  \--|-> 00004517              auipc   a0,0x4
+20001adc:       |     |   d6850513              addi    a0,a0,-664 # 20005840 <ottf_console_flow_control_isr.log_fields.46>
+20001ae0:       |     |   85b2                  mv      a1,a2
+20001ae2:       |     |   483000ef              jal     ra,20002764 <base_log_internal_core>
+20001ae6:       |     \-> 6531                  lui     a0,0xc
+20001ae8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aec:       |         32f000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001af0:       \-------> 00903533              snez    a0,s1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:346
+}
+20001af4:                 40f2                  lw      ra,28(sp)
+20001af6:                 4462                  lw      s0,24(sp)
+20001af8:                 44d2                  lw      s1,20(sp)
+20001afa:                 4942                  lw      s2,16(sp)
+20001afc:                 6105                  addi    sp,sp,32
+20001afe:                 8082                  ret
+
+20001b00 <manage_flow_control>:
+manage_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:304
+                                    ottf_console_flow_control_t ctrl) {
+20001b00:                                1101                   addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:305
+  if (flow_control_state == kOttfConsoleFlowControlNone) {
+20001b02:                                ce06                   sw      ra,28(sp)
+20001b04:                                cc22                   sw      s0,24(sp)
+20001b06:                                ca26                   sw      s1,20(sp)
+20001b08:                                c84a                   sw      s2,16(sp)
+20001b0a:                                f0000417               auipc   s0,0xf0000
+20001b0e:                                57a42603               lw      a2,1402(s0) # 10002084 <flow_control_state>
+20001b12:                      /-------- c249                   beqz    a2,20001b94 <manage_flow_control+0x94>
+20001b14:                      |         84ae                   mv      s1,a1
+20001b16:                      |         892a                   mv      s2,a0
+20001b18:                      |         4505                   li      a0,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:308
+  if (ctrl == kOttfConsoleFlowControlAuto) {
+20001b1a:       /--------------|-------- 12a59863               bne     a1,a0,20001c4a <manage_flow_control+0x14a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001b1e:       |              |         006c                   addi    a1,sp,12
+20001b20:       |              |         854a                   mv      a0,s2
+20001b22:       |              |         5eb010ef               jal     ra,2000390c <dif_uart_rx_bytes_available>
+20001b26:       |              |         c42a                   sw      a0,8(sp)
+20001b28:       |              |         0048                   addi    a0,sp,4
+20001b2a:       |              |         002c                   addi    a1,sp,8
+20001b2c:       |              |         4611                   li      a2,4
+20001b2e:       |              |         562020ef               jal     ra,20004090 <memcpy>
+20001b32:       |              |         4512                   lw      a0,4(sp)
+20001b34:       |              |         00153593               seqz    a1,a0
+20001b38:       |              |         15fd                   addi    a1,a1,-1
+20001b3a:       |              |         1365f693               andi    a3,a1,310
+20001b3e:       |              |         00003597               auipc   a1,0x3
+20001b42:       |              |         f5a58613               addi    a2,a1,-166 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001b46:       |              |         0e8f05b7               lui     a1,0xe8f0
+20001b4a:       |              |         6d2010ef               jal     ra,2000321c <status_create>
+20001b4e:       |              |     /-- 06054363               bltz    a0,20001bb4 <manage_flow_control+0xb4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b52:       |              |     |   4532                   lw      a0,12(sp)
+20001b54:       |              |     |   458d                   li      a1,3
+20001b56:       |              |  /--|-- 06a5ee63               bltu    a1,a0,20001bd2 <manage_flow_control+0xd2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:312
+        flow_control_state != kOttfConsoleFlowControlResume) {
+20001b5a:       |              |  |  |   57a42503               lw      a0,1402(s0)
+20001b5e:       |              |  |  |   44c5                   li      s1,17
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b60:       |           /--|--|--|-- 08950163               beq     a0,s1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001b64:       |           |  |  |  |   4585                   li      a1,1
+20001b66:       |           |  |  |  |   4605                   li      a2,1
+20001b68:       |           |  |  |  |   854a                   mv      a0,s2
+20001b6a:       |           |  |  |  |   3af010ef               jal     ra,20003718 <dif_uart_irq_set_enabled>
+20001b6e:       +-----------|--|--|--|-- 0c050e63               beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001b72:       |           |  |  |  |   862a                   mv      a2,a0
+20001b74:       |           |  |  |  |   00004517               auipc   a0,0x4
+20001b78:       |           |  |  |  |   75052503               lw      a0,1872(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001b7c:       |     /-----|--|--|--|-- c14d                   beqz    a0,20001c1e <manage_flow_control+0x11e>
+20001b7e:       |     |     |  |  |  |   e000e517               auipc   a0,0xe000e
+20001b82:       |     |     |  |  |  |   48250513               addi    a0,a0,1154 # 10000 <_chip_info_end>
+20001b86:       |     |     |  |  |  |   40000593               li      a1,1024
+20001b8a:       |     |     |  |  |  |   952e                   add     a0,a0,a1
+20001b8c:       |     |     |  |  |  |   4585                   li      a1,1
+20001b8e:       |     |     |  |  |  |   473000ef               jal     ra,20002800 <base_log_internal_dv>
+20001b92:       |     |  /--|--|--|--|-- a869                   j       20001c2c <manage_flow_control+0x12c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:306
+    return OK_STATUS((int32_t)flow_control_state);
+20001b94:       |     |  |  |  \--|--|-> 57a42683               lw      a3,1402(s0)
+20001b98:       |     |  |  |     |  |   00003517               auipc   a0,0x3
+20001b9c:       |     |  |  |     |  |   f0050613               addi    a2,a0,-256 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ba0:       |     |  |  |     |  |   0e8f05b7               lui     a1,0xe8f0
+20001ba4:       |     |  |  |     |  |   4501                   li      a0,0
+20001ba6:       |     |  |  |     |  |   40f2                   lw      ra,28(sp)
+20001ba8:       |     |  |  |     |  |   4462                   lw      s0,24(sp)
+20001baa:       |     |  |  |     |  |   44d2                   lw      s1,20(sp)
+20001bac:       |     |  |  |     |  |   4942                   lw      s2,16(sp)
+20001bae:       |     |  |  |     |  |   6105                   addi    sp,sp,32
+20001bb0:       |     |  |  |     |  |   66c0106f               j       2000321c <status_create>
+20001bb4:       |     |  |  |     |  \-> 84aa                   mv      s1,a0
+20001bb6:       |     |  |  |     |      897d                   andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001bb8:       |     |  |  |     |      00003597               auipc   a1,0x3
+20001bbc:       |     |  |  |     |      ee058613               addi    a2,a1,-288 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bc0:       |     |  |  |     |      0e8f05b7               lui     a1,0xe8f0
+20001bc4:       |     |  |  |     |      13600693               li      a3,310
+20001bc8:       |     |  |  |     |      654010ef               jal     ra,2000321c <status_create>
+20001bcc:       |     |  |  |     |      f37fe0ef               jal     ra,20000b02 <status_report>
+20001bd0:       |  /--|--|--|-----|----- a0d5                   j       20001cb4 <manage_flow_control+0x1b4>
+20001bd2:       |  |  |  |  |     \----> 45a1                   li      a1,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bd4:       |  |  |  |  +----------- 00b56763               bltu    a0,a1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:319
+               flow_control_state != kOttfConsoleFlowControlPause) {
+20001bd8:       |  |  |  |  |            57a42503               lw      a0,1402(s0)
+20001bdc:       |  |  |  |  |            44cd                   li      s1,19
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bde:       |  |  |  |  |        /-- 00951963               bne     a0,s1,20001bf0 <manage_flow_control+0xf0>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:326
+      return OK_STATUS((int32_t)flow_control_state);
+20001be2:       |  |  |  |  \--------|-> 57a42683               lw      a3,1402(s0)
+20001be6:       |  |  |  |           |   00003517               auipc   a0,0x3
+20001bea:       |  |  |  |           |   eb250613               addi    a2,a0,-334 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bee:       |  |  |  |  /--------|-- a86d                   j       20001ca8 <manage_flow_control+0x1a8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001bf0:       |  |  |  |  |        \-> 4585                   li      a1,1
+20001bf2:       |  |  |  |  |            854a                   mv      a0,s2
+20001bf4:       |  |  |  |  |            4601                   li      a2,0
+20001bf6:       |  |  |  |  |            323010ef               jal     ra,20003718 <dif_uart_irq_set_enabled>
+20001bfa:       +--|--|--|--|----------- c921                   beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001bfc:       |  |  |  |  |            862a                   mv      a2,a0
+20001bfe:       |  |  |  |  |            00004517               auipc   a0,0x4
+20001c02:       |  |  |  |  |            6c652503               lw      a0,1734(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001c06:       |  |  |  |  |  /-------- c50d                   beqz    a0,20001c30 <manage_flow_control+0x130>
+20001c08:       |  |  |  |  |  |         e000e517               auipc   a0,0xe000e
+20001c0c:       |  |  |  |  |  |         3f850513               addi    a0,a0,1016 # 10000 <_chip_info_end>
+20001c10:       |  |  |  |  |  |         41400593               li      a1,1044
+20001c14:       |  |  |  |  |  |         952e                   add     a0,a0,a1
+20001c16:       |  |  |  |  |  |         4585                   li      a1,1
+20001c18:       |  |  |  |  |  |         3e9000ef               jal     ra,20002800 <base_log_internal_dv>
+20001c1c:       |  |  |  |  |  |  /----- a00d                   j       20001c3e <manage_flow_control+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c1e:       |  |  \--|--|--|--|----> 00004517               auipc   a0,0x4
+20001c22:       |  |     |  |  |  |      cd650513               addi    a0,a0,-810 # 200058f4 <manage_flow_control.log_fields>
+20001c26:       |  |     |  |  |  |      85b2                   mv      a1,a2
+20001c28:       |  |     |  |  |  |      33d000ef               jal     ra,20002764 <base_log_internal_core>
+20001c2c:       |  |     \--|--|--|----> 44c5                   li      s1,17
+20001c2e:       |  |        |  |  |  /-- a809                   j       20001c40 <manage_flow_control+0x140>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c30:       |  |        |  \--|--|-> 00004517               auipc   a0,0x4
+20001c34:       |  |        |     |  |   cd850513               addi    a0,a0,-808 # 20005908 <manage_flow_control.log_fields.82>
+20001c38:       |  |        |     |  |   85b2                   mv      a1,a2
+20001c3a:       |  |        |     |  |   32b000ef               jal     ra,20002764 <base_log_internal_core>
+20001c3e:       |  |        |     \--|-> 44cd                   li      s1,19
+20001c40:       |  |        |        \-> 6531                   lui     a0,0xc
+20001c42:       |  |        |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c46:       |  |        |            1d5000ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:329
+  uint8_t byte = (uint8_t)ctrl;
+20001c4a:       \--|--------|----------> 009101a3               sb      s1,3(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:330
+  CHECK_DIF_OK(dif_uart_bytes_send(uart, &byte, 1, NULL));
+20001c4e:          |        |            00310593               addi    a1,sp,3
+20001c52:          |        |            4605                   li      a2,1
+20001c54:          |        |            854a                   mv      a0,s2
+20001c56:          |        |            4681                   li      a3,0
+20001c58:          |        |            429010ef               jal     ra,20003880 <dif_uart_bytes_send>
+20001c5c:          |        |  /-------- cd15                   beqz    a0,20001c98 <manage_flow_control+0x198>
+20001c5e:          |        |  |         862a                   mv      a2,a0
+20001c60:          |        |  |         00004517               auipc   a0,0x4
+20001c64:          |        |  |         66452503               lw      a0,1636(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001c68:          |        |  |  /----- cd01                   beqz    a0,20001c80 <manage_flow_control+0x180>
+20001c6a:          |        |  |  |      e000e517               auipc   a0,0xe000e
+20001c6e:          |        |  |  |      39650513               addi    a0,a0,918 # 10000 <_chip_info_end>
+20001c72:          |        |  |  |      42800593               li      a1,1064
+20001c76:          |        |  |  |      952e                   add     a0,a0,a1
+20001c78:          |        |  |  |      4585                   li      a1,1
+20001c7a:          |        |  |  |      387000ef               jal     ra,20002800 <base_log_internal_dv>
+20001c7e:          |        |  |  |  /-- a801                   j       20001c8e <manage_flow_control+0x18e>
+20001c80:          |        |  |  \--|-> 00004517               auipc   a0,0x4
+20001c84:          |        |  |     |   c9c50513               addi    a0,a0,-868 # 2000591c <manage_flow_control.log_fields.85>
+20001c88:          |        |  |     |   85b2                   mv      a1,a2
+20001c8a:          |        |  |     |   2db000ef               jal     ra,20002764 <base_log_internal_core>
+20001c8e:          |        |  |     \-> 6531                   lui     a0,0xc
+20001c90:          |        |  |         aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c94:          |        |  |         187000ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:331
+  flow_control_state = ctrl;
+20001c98:          |        |  \-------> 56942d23               sw      s1,1402(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:332
+  return OK_STATUS((int32_t)flow_control_state);
+20001c9c:          |        |            57a42683               lw      a3,1402(s0)
+20001ca0:          |        |            00003517               auipc   a0,0x3
+20001ca4:          |        |            df850613               addi    a2,a0,-520 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ca8:          |        \----------> 0e8f05b7               lui     a1,0xe8f0
+20001cac:          |                     4501                   li      a0,0
+20001cae:          |                     56e010ef               jal     ra,2000321c <status_create>
+20001cb2:          |                     84aa                   mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:333
+}
+20001cb4:          \-------------------> 8526                   mv      a0,s1
+20001cb6:                                40f2                   lw      ra,28(sp)
+20001cb8:                                4462                   lw      s0,24(sp)
+20001cba:                                44d2                   lw      s1,20(sp)
+20001cbc:                                4942                   lw      s2,16(sp)
+20001cbe:                                6105                   addi    sp,sp,32
+20001cc0:                                8082                   ret
+
+20001cc2 <irq_global_ctrl>:
+irq_global_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:18
+void irq_set_vector_offset(uintptr_t address) {
+  CSR_WRITE(CSR_REG_MTVEC, (uint32_t)address);
+}
+
+void irq_global_ctrl(bool en) {
+  if (en) {
+20001cc2:       /-- c509                        beqz    a0,20001ccc <irq_global_ctrl+0xa>
+20001cc4:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:19
+    CSR_SET_BITS(CSR_REG_MSTATUS, 0x8);
+20001cc6:       |   30052073            csrs    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+  }
+}
+20001cca:       |   8082                        ret
+20001ccc:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:21
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+20001cce:           30053073            csrc    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+}
+20001cd2:           8082                        ret
+
+20001cd4 <irq_external_ctrl>:
+irq_external_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:27
+
+void irq_external_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_EXT_ENABLE_OFFSET;
+  if (en) {
+20001cd4:       /-- c511                        beqz    a0,20001ce0 <irq_external_ctrl+0xc>
+20001cd6:       |   28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:28
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cda:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cde:       |   8082                        ret
+20001ce0:       \-> 28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:30
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001ce4:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+}
+20001ce8:           8082                        ret
+
+20001cea <irq_timer_ctrl>:
+irq_timer_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:36
+
+void irq_timer_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_TIMER_ENABLE_OFFSET;
+  if (en) {
+20001cea:       /-- c511                        beqz    a0,20001cf6 <irq_timer_ctrl+0xc>
+20001cec:       |   08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:37
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cf0:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cf4:       |   8082                        ret
+20001cf6:       \-> 08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:39
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001cfa:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+}
+20001cfe:           8082                        ret
+
+20001d00 <irq_software_ctrl>:
+irq_software_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:45
+
+void irq_software_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_SW_ENABLE_OFFSET;
+  if (en) {
+20001d00:       /-- c509                        beqz    a0,20001d0a <irq_software_ctrl+0xa>
+20001d02:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:46
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001d04:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001d08:       |   8082                        ret
+20001d0a:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:48
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001d0c:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+}
+20001d10:           8082                        ret
+
+20001d12 <spi_device_testutils_wait_for_upload>:
+spi_device_testutils_wait_for_upload():
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:361
+  }
+  return OK_STATUS();
+}
+
+status_t spi_device_testutils_wait_for_upload(dif_spi_device_handle_t *spid,
+                                              upload_info_t *info) {
+20001d12:                                               7179                    addi    sp,sp,-48
+20001d14:                                               d606                    sw      ra,44(sp)
+20001d16:                                               d422                    sw      s0,40(sp)
+20001d18:                                               d226                    sw      s1,36(sp)
+20001d1a:                                               d04a                    sw      s2,32(sp)
+20001d1c:                                               ce4e                    sw      s3,28(sp)
+20001d1e:                                               cc52                    sw      s4,24(sp)
+20001d20:                                               892e                    mv      s2,a1
+20001d22:                                               8a2a                    mv      s4,a0
+20001d24:                                               00004517                auipc   a0,0x4
+20001d28:                                               c0c50413                addi    s0,a0,-1012 # 20005930 <manage_flow_control.log_fields.85+0x14>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+  // Wait for a SPI transaction cause an upload.
+  bool upload_pending;
+  do {
+    // The UploadCmdfifoNotEmpty interrupt status is updated after the SPI
+    // transaction completes.
+    TRY(dif_spi_device_irq_is_pending(
+20001d2c:                                           /-> 01710613                addi    a2,sp,23
+20001d30:                                           |   8552                    mv      a0,s4
+20001d32:                                           |   4581                    li      a1,0
+20001d34:                                           |   62e010ef                jal     ra,20003362 <dif_spi_device_irq_is_pending>
+20001d38:                                           |   c82a                    sw      a0,16(sp)
+20001d3a:                                           |   0068                    addi    a0,sp,12
+20001d3c:                                           |   080c                    addi    a1,sp,16
+20001d3e:                                           |   4611                    li      a2,4
+20001d40:                                           |   350020ef                jal     ra,20004090 <memcpy>
+20001d44:                                           |   4532                    lw      a0,12(sp)
+20001d46:                                           |   00153593                seqz    a1,a0
+20001d4a:                                           |   15fd                    addi    a1,a1,-1
+20001d4c:                                           |   1705f693                andi    a3,a1,368
+20001d50:                                           |   509305b7                lui     a1,0x50930
+20001d54:                                           |   8622                    mv      a2,s0
+20001d56:                                           |   4c6010ef                jal     ra,2000321c <status_create>
+20001d5a:                /--------------------------|-- 1c054463                bltz    a0,20001f22 <spi_device_testutils_wait_for_upload+0x210>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:369
+        &spid->dev, kDifSpiDeviceIrqUploadCmdfifoNotEmpty, &upload_pending));
+  } while (!upload_pending);
+20001d5e:                |                          |   01714503                lbu     a0,23(sp)
+20001d62:                |                          \-- d569                    beqz    a0,20001d2c <spi_device_testutils_wait_for_upload+0x1a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+
+  uint8_t occupancy;
+
+  // Get the SPI opcode.
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001d64:                |                              00b10593                addi    a1,sp,11
+20001d68:                |                              8552                    mv      a0,s4
+20001d6a:                |                              7c4010ef                jal     ra,2000352e <dif_spi_device_get_flash_command_fifo_occupancy>
+20001d6e:                |                              c82a                    sw      a0,16(sp)
+20001d70:                |                              0068                    addi    a0,sp,12
+20001d72:                |                              080c                    addi    a1,sp,16
+20001d74:                |                              4611                    li      a2,4
+20001d76:                |                              31a020ef                jal     ra,20004090 <memcpy>
+20001d7a:                |                              4532                    lw      a0,12(sp)
+20001d7c:                |                              00153593                seqz    a1,a0
+20001d80:                |                              15fd                    addi    a1,a1,-1
+20001d82:                |                              1765f693                andi    a3,a1,374
+20001d86:                |                              00004597                auipc   a1,0x4
+20001d8a:                |                              baa58613                addi    a2,a1,-1110 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001d8e:                |                              509305b7                lui     a1,0x50930
+20001d92:                |                              48a010ef                jal     ra,2000321c <status_create>
+20001d96:                |                       /----- 1a054163                bltz    a0,20001f38 <spi_device_testutils_wait_for_upload+0x226>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:375
+  if (occupancy != 1) {
+20001d9a:                |                       |      00b14503                lbu     a0,11(sp)
+20001d9e:                |                       |      4585                    li      a1,1
+20001da0:       /--------|-----------------------|----- 1ab51763                bne     a0,a1,20001f4e <spi_device_testutils_wait_for_upload+0x23c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+    // Cannot have an uploaded command without an opcode.
+    return INTERNAL();
+  }
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001da4:       |        |                       |      8552                    mv      a0,s4
+20001da6:       |        |                       |      85ca                    mv      a1,s2
+20001da8:       |        |                       |      7f0010ef                jal     ra,20003598 <dif_spi_device_pop_flash_command_fifo>
+20001dac:       |        |                       |      c82a                    sw      a0,16(sp)
+20001dae:       |        |                       |      0068                    addi    a0,sp,12
+20001db0:       |        |                       |      080c                    addi    a1,sp,16
+20001db2:       |        |                       |      4611                    li      a2,4
+20001db4:       |        |                       |      2dc020ef                jal     ra,20004090 <memcpy>
+20001db8:       |        |                       |      4532                    lw      a0,12(sp)
+20001dba:       |        |                       |      00153593                seqz    a1,a0
+20001dbe:       |        |                       |      15fd                    addi    a1,a1,-1
+20001dc0:       |        |                       |      17b5f693                andi    a3,a1,379
+20001dc4:       |        |                       |      00004597                auipc   a1,0x4
+20001dc8:       |        |                       |      b6c58613                addi    a2,a1,-1172 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001dcc:       |        |                       |      509305b7                lui     a1,0x50930
+20001dd0:       |        |                       |      44c010ef                jal     ra,2000321c <status_create>
+20001dd4:       |  /-----|-----------------------|----- 18054a63                bltz    a0,20001f68 <spi_device_testutils_wait_for_upload+0x256>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  // Get the flash_status register.
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001dd8:       |  |     |                       |      00890593                addi    a1,s2,8
+20001ddc:       |  |     |                       |      8552                    mv      a0,s4
+20001dde:       |  |     |                       |      0cd010ef                jal     ra,200036aa <dif_spi_device_get_flash_status_registers>
+20001de2:       |  |     |                       |      c82a                    sw      a0,16(sp)
+20001de4:       |  |     |                       |      0068                    addi    a0,sp,12
+20001de6:       |  |     |                       |      080c                    addi    a1,sp,16
+20001de8:       |  |     |                       |      4611                    li      a2,4
+20001dea:       |  |     |                       |      2a6020ef                jal     ra,20004090 <memcpy>
+20001dee:       |  |     |                       |      4532                    lw      a0,12(sp)
+20001df0:       |  |     |                       |      00153593                seqz    a1,a0
+20001df4:       |  |     |                       |      15fd                    addi    a1,a1,-1
+20001df6:       |  |     |                       |      17d5f693                andi    a3,a1,381
+20001dfa:       |  |     |                       |      00004597                auipc   a1,0x4
+20001dfe:       |  |     |                       |      b3658613                addi    a2,a1,-1226 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e02:       |  |     |                       |      509305b7                lui     a1,0x50930
+20001e06:       |  |     |                       |      416010ef                jal     ra,2000321c <status_create>
+20001e0a:       |  |  /--|-----------------------|----- 16054a63                bltz    a0,20001f7e <spi_device_testutils_wait_for_upload+0x26c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+
+  // Get the SPI address (if available).
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001e0e:       |  |  |  |                       |      00b10593                addi    a1,sp,11
+20001e12:       |  |  |  |                       |      8552                    mv      a0,s4
+20001e14:       |  |  |  |                       |      738010ef                jal     ra,2000354c <dif_spi_device_get_flash_address_fifo_occupancy>
+20001e18:       |  |  |  |                       |      c82a                    sw      a0,16(sp)
+20001e1a:       |  |  |  |                       |      0068                    addi    a0,sp,12
+20001e1c:       |  |  |  |                       |      080c                    addi    a1,sp,16
+20001e1e:       |  |  |  |                       |      4611                    li      a2,4
+20001e20:       |  |  |  |                       |      270020ef                jal     ra,20004090 <memcpy>
+20001e24:       |  |  |  |                       |      4532                    lw      a0,12(sp)
+20001e26:       |  |  |  |                       |      00153593                seqz    a1,a0
+20001e2a:       |  |  |  |                       |      15fd                    addi    a1,a1,-1
+20001e2c:       |  |  |  |                       |      1805f693                andi    a3,a1,384
+20001e30:       |  |  |  |                       |      00004597                auipc   a1,0x4
+20001e34:       |  |  |  |                       |      b0058613                addi    a2,a1,-1280 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e38:       |  |  |  |                       |      509305b7                lui     a1,0x50930
+20001e3c:       |  |  |  |                       |      3e0010ef                jal     ra,2000321c <status_create>
+20001e40:       |  |  |  |     /-----------------|----- 14054a63                bltz    a0,20001f94 <spi_device_testutils_wait_for_upload+0x282>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:385
+  if (occupancy) {
+20001e44:       |  |  |  |     |                 |      00b14503                lbu     a0,11(sp)
+20001e48:       |  |  |  |     |                 |  /-- cd35                    beqz    a0,20001ec4 <spi_device_testutils_wait_for_upload+0x1b2>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:387
+    dif_toggle_t addr_4b;
+    TRY(dif_spi_device_get_4b_address_mode(spid, &addr_4b));
+20001e4a:       |  |  |  |     |                 |  |   080c                    addi    a1,sp,16
+20001e4c:       |  |  |  |     |                 |  |   8552                    mv      a0,s4
+20001e4e:       |  |  |  |     |                 |  |   5aa010ef                jal     ra,200033f8 <dif_spi_device_get_4b_address_mode>
+20001e52:       |  |  |  |     |                 |  |   c62a                    sw      a0,12(sp)
+20001e54:       |  |  |  |     |                 |  |   0048                    addi    a0,sp,4
+20001e56:       |  |  |  |     |                 |  |   006c                    addi    a1,sp,12
+20001e58:       |  |  |  |     |                 |  |   4611                    li      a2,4
+20001e5a:       |  |  |  |     |                 |  |   236020ef                jal     ra,20004090 <memcpy>
+20001e5e:       |  |  |  |     |                 |  |   4512                    lw      a0,4(sp)
+20001e60:       |  |  |  |     |                 |  |   00153593                seqz    a1,a0
+20001e64:       |  |  |  |     |                 |  |   15fd                    addi    a1,a1,-1
+20001e66:       |  |  |  |     |                 |  |   1835f693                andi    a3,a1,387
+20001e6a:       |  |  |  |     |                 |  |   00004597                auipc   a1,0x4
+20001e6e:       |  |  |  |     |                 |  |   ac658613                addi    a2,a1,-1338 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e72:       |  |  |  |     |                 |  |   509305b7                lui     a1,0x50930
+20001e76:       |  |  |  |     |                 |  |   3a6010ef                jal     ra,2000321c <status_create>
+20001e7a:       |  |  |  |     |  /--------------|--|-- 12054863                bltz    a0,20001faa <spi_device_testutils_wait_for_upload+0x298>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:388
+    info->addr_4b = addr_4b;
+20001e7e:       |  |  |  |     |  |              |  |   4542                    lw      a0,16(sp)
+20001e80:       |  |  |  |     |  |              |  |   00a03533                snez    a0,a0
+20001e84:       |  |  |  |     |  |              |  |   00a90123                sb      a0,2(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:389
+    TRY(dif_spi_device_pop_flash_address_fifo(spid, &info->address));
+20001e88:       |  |  |  |     |  |              |  |   00c90593                addi    a1,s2,12
+20001e8c:       |  |  |  |     |  |              |  |   8552                    mv      a0,s4
+20001e8e:       |  |  |  |     |  |              |  |   730010ef                jal     ra,200035be <dif_spi_device_pop_flash_address_fifo>
+20001e92:       |  |  |  |     |  |              |  |   c62a                    sw      a0,12(sp)
+20001e94:       |  |  |  |     |  |              |  |   0048                    addi    a0,sp,4
+20001e96:       |  |  |  |     |  |              |  |   006c                    addi    a1,sp,12
+20001e98:       |  |  |  |     |  |              |  |   4611                    li      a2,4
+20001e9a:       |  |  |  |     |  |              |  |   1f6020ef                jal     ra,20004090 <memcpy>
+20001e9e:       |  |  |  |     |  |              |  |   4512                    lw      a0,4(sp)
+20001ea0:       |  |  |  |     |  |              |  |   00153593                seqz    a1,a0
+20001ea4:       |  |  |  |     |  |              |  |   15fd                    addi    a1,a1,-1
+20001ea6:       |  |  |  |     |  |              |  |   1855f693                andi    a3,a1,389
+20001eaa:       |  |  |  |     |  |              |  |   00004597                auipc   a1,0x4
+20001eae:       |  |  |  |     |  |              |  |   a8658613                addi    a2,a1,-1402 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001eb2:       |  |  |  |     |  |              |  |   509305b7                lui     a1,0x50930
+20001eb6:       |  |  |  |     |  |              |  |   366010ef                jal     ra,2000321c <status_create>
+20001eba:       |  |  |  |     |  |     /--------|--|-- 10054763                bltz    a0,20001fc8 <spi_device_testutils_wait_for_upload+0x2b6>
+20001ebe:       |  |  |  |     |  |     |        |  |   4505                    li      a0,1
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:390
+    info->has_address = true;
+20001ec0:       |  |  |  |     |  |     |        |  |   00a900a3                sb      a0,1(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  }
+
+  // Get the SPI data payload (if available).
+  uint32_t start;
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001ec4:       |  |  |  |     |  |     |        |  \-> 00490993                addi    s3,s2,4
+20001ec8:       |  |  |  |     |  |     |        |      0810                    addi    a2,sp,16
+20001eca:       |  |  |  |     |  |     |        |      8552                    mv      a0,s4
+20001ecc:       |  |  |  |     |  |     |        |      85ce                    mv      a1,s3
+20001ece:       |  |  |  |     |  |     |        |      69e010ef                jal     ra,2000356c <dif_spi_device_get_flash_payload_fifo_occupancy>
+20001ed2:       |  |  |  |     |  |     |        |      c62a                    sw      a0,12(sp)
+20001ed4:       |  |  |  |     |  |     |        |      0048                    addi    a0,sp,4
+20001ed6:       |  |  |  |     |  |     |        |      006c                    addi    a1,sp,12
+20001ed8:       |  |  |  |     |  |     |        |      4611                    li      a2,4
+20001eda:       |  |  |  |     |  |     |        |      1b6020ef                jal     ra,20004090 <memcpy>
+20001ede:       |  |  |  |     |  |     |        |      4512                    lw      a0,4(sp)
+20001ee0:       |  |  |  |     |  |     |        |      00153593                seqz    a1,a0
+20001ee4:       |  |  |  |     |  |     |        |      15fd                    addi    a1,a1,-1
+20001ee6:       |  |  |  |     |  |     |        |      18c5f693                andi    a3,a1,396
+20001eea:       |  |  |  |     |  |     |        |      00004597                auipc   a1,0x4
+20001eee:       |  |  |  |     |  |     |        |      a4658613                addi    a2,a1,-1466 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001ef2:       |  |  |  |     |  |     |        |      509305b7                lui     a1,0x50930
+20001ef6:       |  |  |  |     |  |     |        |      326010ef                jal     ra,2000321c <status_create>
+20001efa:       |  |  |  |     |  |     |     /--|----- 0a054c63                bltz    a0,20001fb2 <spi_device_testutils_wait_for_upload+0x2a0>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:397
+                                                      &start));
+  if (info->data_len) {
+20001efe:       |  |  |  |     |  |     |     |  |      0009d603                lhu     a2,0(s3)
+20001f02:       |  |  |  |     |  |  /--|-----|--|----- 12060763                beqz    a2,20002030 <spi_device_testutils_wait_for_upload+0x31e>
+20001f06:       |  |  |  |     |  |  |  |     |  |      10100513                li      a0,257
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:398
+    if (info->data_len > sizeof(info->data)) {
+20001f0a:       |  |  |  |     |  |  |  |  /--|--|----- 0ea66763                bltu    a2,a0,20001ff8 <spi_device_testutils_wait_for_upload+0x2e6>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:400
+      // We aren't expecting more than 256 bytes of data.
+      return INVALID_ARGUMENT();
+20001f0e:       |  |  |  |     |  |  |  |  |  |  |      00004517                auipc   a0,0x4
+20001f12:       |  |  |  |     |  |  |  |  |  |  |      a2250613                addi    a2,a0,-1502 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f16:       |  |  |  |     |  |  |  |  |  |  |      450d                    li      a0,3
+20001f18:       |  |  |  |     |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f1c:       |  |  |  |     |  |  |  |  |  |  |      19000693                li      a3,400
+20001f20:       |  |  |  |  /--|--|--|--|--|--|--|----- a081                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20001f22:       |  |  |  \--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f24:       |  |  |     |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+    TRY(dif_spi_device_irq_is_pending(
+20001f26:       |  |  |     |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f2a:       |  |  |     |  |  |  |  |  |  |  |      a0a58613                addi    a2,a1,-1526 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f2e:       |  |  |     |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f32:       |  |  |     |  |  |  |  |  |  |  |      17000693                li      a3,368
+20001f36:       |  |  |  /--|--|--|--|--|--|--|--|----- a065                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f38:       |  |  |  |  |  |  |  |  |  |  |  \----> 84aa                    mv      s1,a0
+20001f3a:       |  |  |  |  |  |  |  |  |  |  |         897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001f3c:       |  |  |  |  |  |  |  |  |  |  |         00004597                auipc   a1,0x4
+20001f40:       |  |  |  |  |  |  |  |  |  |  |         9f458613                addi    a2,a1,-1548 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f44:       |  |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f48:       |  |  |  |  |  |  |  |  |  |  |         17600693                li      a3,374
+20001f4c:       |  |  |  +--|--|--|--|--|--|--|-------- a849                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:377
+    return INTERNAL();
+20001f4e:       \--|--|--|--|--|--|--|--|--|--|-------> 00004517                auipc   a0,0x4
+20001f52:          |  |  |  |  |  |  |  |  |  |         9e250613                addi    a2,a0,-1566 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f56:          |  |  |  |  |  |  |  |  |  |         4535                    li      a0,13
+20001f58:          |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f5c:          |  |  |  |  |  |  |  |  |  |         17900693                li      a3,377
+20001f60:          |  |  |  >--|--|--|--|--|--|-------> 2bc010ef                jal     ra,2000321c <status_create>
+20001f64:          |  |  |  |  |  |  |  |  |  |         84aa                    mv      s1,a0
+20001f66:          |  |  |  |  |  |  |  |  |  |  /----- a041                    j       20001fe6 <spi_device_testutils_wait_for_upload+0x2d4>
+20001f68:          \--|--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f6a:             |  |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001f6c:             |  |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f70:             |  |  |  |  |  |  |  |  |  |      9c458613                addi    a2,a1,-1596 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f74:             |  |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f78:             |  |  |  |  |  |  |  |  |  |      17b00693                li      a3,379
+20001f7c:             |  +--|--|--|--|--|--|--|--|----- a08d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f7e:             \--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f80:                |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001f82:                |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f86:                |  |  |  |  |  |  |  |  |      9ae58613                addi    a2,a1,-1618 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f8a:                |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f8e:                |  |  |  |  |  |  |  |  |      17d00693                li      a3,381
+20001f92:                +--|--|--|--|--|--|--|--|----- a0b1                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f94:                |  |  \--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f96:                |  |     |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001f98:                |  |     |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f9c:                |  |     |  |  |  |  |  |      99858613                addi    a2,a1,-1640 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fa0:                |  |     |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001fa4:                |  |     |  |  |  |  |  |      18000693                li      a3,384
+20001fa8:                +--|-----|--|--|--|--|--|----- a81d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001faa:                |  |     \--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001fac:                |  |        |  |  |  |  |      18300693                li      a3,387
+20001fb0:                |  |        |  |  |  |  |  /-- a839                    j       20001fce <spi_device_testutils_wait_for_upload+0x2bc>
+20001fb2:                |  |        |  |  |  \--|--|-> 84aa                    mv      s1,a0
+20001fb4:                |  |        |  |  |     |  |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001fb6:                |  |        |  |  |     |  |   00004597                auipc   a1,0x4
+20001fba:                |  |        |  |  |     |  |   97a58613                addi    a2,a1,-1670 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fbe:                |  |        |  |  |     |  |   509305b7                lui     a1,0x50930
+20001fc2:                |  |        |  |  |     |  |   18c00693                li      a3,396
+20001fc6:                +--|--------|--|--|-----|--|-- a821                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001fc8:                |  |        |  \--|-----|--|-> 84aa                    mv      s1,a0
+20001fca:                |  |        |     |     |  |   18500693                li      a3,389
+20001fce:                |  |        |     |     |  \-> 01f4f513                andi    a0,s1,31
+20001fd2:                |  |        |     |     |      00004597                auipc   a1,0x4
+20001fd6:                |  |        |     |     |      95e58613                addi    a2,a1,-1698 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fda:                |  |        |     |     |      509305b7                lui     a1,0x50930
+20001fde:                >--|--------|-----|-----|----> 23e010ef                jal     ra,2000321c <status_create>
+20001fe2:                |  |        |     |     |      b21fe0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:410
+
+  // Finished: ack the IRQ.
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+                                     kDifSpiDeviceIrqUploadCmdfifoNotEmpty));
+  return OK_STATUS();
+}
+20001fe6:                |  |        |     |     \----> 8526                    mv      a0,s1
+20001fe8:                |  |        |     |            50b2                    lw      ra,44(sp)
+20001fea:                |  |        |     |            5422                    lw      s0,40(sp)
+20001fec:                |  |        |     |            5492                    lw      s1,36(sp)
+20001fee:                |  |        |     |            5902                    lw      s2,32(sp)
+20001ff0:                |  |        |     |            49f2                    lw      s3,28(sp)
+20001ff2:                |  |        |     |            4a62                    lw      s4,24(sp)
+20001ff4:                |  |        |     |            6145                    addi    sp,sp,48
+20001ff6:                |  |        |     |            8082                    ret
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20001ff8:                |  |        |     \----------> 45c2                    lw      a1,16(sp)
+20001ffa:                |  |        |                  01090693                addi    a3,s2,16
+20001ffe:                |  |        |                  8552                    mv      a0,s4
+20002000:                |  |        |                  5e4010ef                jal     ra,200035e4 <dif_spi_device_read_flash_payload_buffer>
+20002004:                |  |        |                  c62a                    sw      a0,12(sp)
+20002006:                |  |        |                  0048                    addi    a0,sp,4
+20002008:                |  |        |                  006c                    addi    a1,sp,12
+2000200a:                |  |        |                  4611                    li      a2,4
+2000200c:                |  |        |                  084020ef                jal     ra,20004090 <memcpy>
+20002010:                |  |        |                  4512                    lw      a0,4(sp)
+20002012:                |  |        |                  00153593                seqz    a1,a0
+20002016:                |  |        |                  15fd                    addi    a1,a1,-1
+20002018:                |  |        |                  1935f693                andi    a3,a1,403
+2000201c:                |  |        |                  00004597                auipc   a1,0x4
+20002020:                |  |        |                  91458613                addi    a2,a1,-1772 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002024:                |  |        |                  509305b7                lui     a1,0x50930
+20002028:                |  |        |                  1f4010ef                jal     ra,2000321c <status_create>
+2000202c:                |  |        |           /----- 06054063                bltz    a0,2000208c <spi_device_testutils_wait_for_upload+0x37a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+20002030:                |  |        \-----------|----> 8552                    mv      a0,s4
+20002032:                |  |                    |      4581                    li      a1,0
+20002034:                |  |                    |      358010ef                jal     ra,2000338c <dif_spi_device_irq_acknowledge>
+20002038:                |  |                    |      c62a                    sw      a0,12(sp)
+2000203a:                |  |                    |      0048                    addi    a0,sp,4
+2000203c:                |  |                    |      006c                    addi    a1,sp,12
+2000203e:                |  |                    |      4611                    li      a2,4
+20002040:                |  |                    |      050020ef                jal     ra,20004090 <memcpy>
+20002044:                |  |                    |      4512                    lw      a0,4(sp)
+20002046:                |  |                    |      00153593                seqz    a1,a0
+2000204a:                |  |                    |      15fd                    addi    a1,a1,-1
+2000204c:                |  |                    |      1985f693                andi    a3,a1,408
+20002050:                |  |                    |      00004597                auipc   a1,0x4
+20002054:                |  |                    |      8e058613                addi    a2,a1,-1824 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002058:                |  |                    |      509305b7                lui     a1,0x50930
+2000205c:                |  |                    |      1c0010ef                jal     ra,2000321c <status_create>
+20002060:                |  |                    |  /-- 00054b63                bltz    a0,20002076 <spi_device_testutils_wait_for_upload+0x364>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:409
+  return OK_STATUS();
+20002064:                |  |                    |  |   00004517                auipc   a0,0x4
+20002068:                |  |                    |  |   8cc50613                addi    a2,a0,-1844 # 20005930 <manage_flow_control.log_fields.85+0x14>
+2000206c:                |  |                    |  |   509305b7                lui     a1,0x50930
+20002070:                |  |                    |  |   4501                    li      a0,0
+20002072:                |  |                    |  |   4681                    li      a3,0
+20002074:                |  \--------------------|--|-- b5f5                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20002076:                |                       |  \-> 84aa                    mv      s1,a0
+20002078:                |                       |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+2000207a:                |                       |      00004597                auipc   a1,0x4
+2000207e:                |                       |      8b658613                addi    a2,a1,-1866 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002082:                |                       |      509305b7                lui     a1,0x50930
+20002086:                |                       |      19800693                li      a3,408
+2000208a:                +-----------------------|----- bf91                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+2000208c:                |                       \----> 84aa                    mv      s1,a0
+2000208e:                |                              897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20002090:                |                              00004597                auipc   a1,0x4
+20002094:                |                              8a058613                addi    a2,a1,-1888 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002098:                |                              509305b7                lui     a1,0x50930
+2000209c:                |                              19300693                li      a3,403
+200020a0:                \----------------------------- bf3d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+
+200020a2 <dif_pinmux_init>:
+dif_pinmux_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:18
+
+#include "pinmux_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_pinmux_init(mmio_region_t base_addr, dif_pinmux_t *pinmux) {
+  if (pinmux == NULL) {
+200020a2:       /----- c581                     beqz    a1,200020aa <dif_pinmux_init+0x8>
+200020a4:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:22
+    return kDifBadArg;
+  }
+
+  pinmux->base_addr = base_addr;
+200020a6:       |      c188                     sw      a0,0(a1)
+200020a8:       |  /-- a011                     j       200020ac <dif_pinmux_init+0xa>
+200020aa:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:25
+
+  return kDifOk;
+}
+200020ac:          \-> 8532                     mv      a0,a2
+200020ae:              8082                     ret
+
+200020b0 <dif_pinmux_output_select>:
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:175
+}
+
+dif_result_t dif_pinmux_output_select(const dif_pinmux_t *pinmux,
+                                      dif_pinmux_index_t mio_pad_output,
+                                      dif_pinmux_index_t outsel) {
+  if (pinmux == NULL || mio_pad_output >= PINMUX_PARAM_N_MIO_PADS ||
+200020b0:           00153693            seqz    a3,a0
+200020b4:           02f5b713            sltiu   a4,a1,47
+200020b8:           00174713            xori    a4,a4,1
+200020bc:           8ed9                        or      a3,a3,a4
+200020be:           04e63713            sltiu   a4,a2,78
+200020c2:           00174713            xori    a4,a4,1
+200020c6:           8f55                        or      a4,a4,a3
+200020c8:           468d                        li      a3,3
+200020ca:       /-- ef01                        bnez    a4,200020e2 <dif_pinmux_output_select+0x32>
+dif_pinmux_is_locked():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:142
+  uint32_t reg_value = mmio_region_read32(pinmux->base_addr, reg_offset);
+200020cc:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200020ce:       |   20a5c533            sh2add  a0,a1,a0
+200020d2:       |   1cc52583            lw      a1,460(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+ */
+OT_WARN_UNUSED_RESULT
+inline bool bitfield_bit32_read(uint32_t bitfield,
+                                bitfield_bit32_index_t bit_index) {
+  return bitfield_field32_read(bitfield,
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200020d6:       |   8985                        andi    a1,a1,1
+200020d8:       |   46a5                        li      a3,9
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:185
+  dif_result_t result = dif_pinmux_is_locked(
+      pinmux, mio_pad_output, kDifPinmuxLockTargetOutsel, &is_locked);
+  if (result != kDifOk) {
+    return result;
+  }
+  if (is_locked) {
+200020da:       +-- c581                        beqz    a1,200020e2 <dif_pinmux_output_select+0x32>
+200020dc:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200020de:       |   28c52423            sw      a2,648(a0)
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:194
+      PINMUX_MIO_OUTSEL_0_REG_OFFSET + (ptrdiff_t)(mio_pad_output << 2);
+  uint32_t reg_value =
+      bitfield_field32_write(0, PINMUX_MIO_OUTSEL_0_OUT_0_FIELD, outsel);
+  mmio_region_write32(pinmux->base_addr, reg_offset, reg_value);
+  return kDifOk;
+}
+200020e2:       \-> 8536                        mv      a0,a3
+200020e4:           8082                        ret
+
+200020e6 <ottf_generic_fault_print>:
+ottf_generic_fault_print():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:65
+    "  s3", "  s4", "  s5", "  s6", "  s7", "  s8", "  s9", " s10",
+    " s11", "  t3", "  t4", "  t5", "  t6", "msts",
+};
+
+void ottf_generic_fault_print(uint32_t *exc_info, const char *reason,
+                              uint32_t mcause) {
+200020e6:                 7179                  addi    sp,sp,-48
+200020e8:                 d606                  sw      ra,44(sp)
+200020ea:                 d422                  sw      s0,40(sp)
+200020ec:                 d226                  sw      s1,36(sp)
+200020ee:                 d04a                  sw      s2,32(sp)
+200020f0:                 ce4e                  sw      s3,28(sp)
+200020f2:                 cc52                  sw      s4,24(sp)
+200020f4:                 ca56                  sw      s5,20(sp)
+200020f6:                 c85a                  sw      s6,16(sp)
+200020f8:                 c65e                  sw      s7,12(sp)
+200020fa:                 c462                  sw      s8,8(sp)
+200020fc:                 c266                  sw      s9,4(sp)
+200020fe:                 c06a                  sw      s10,0(sp)
+20002100:                 8932                  mv      s2,a2
+20002102:                 89ae                  mv      s3,a1
+20002104:                 8b2a                  mv      s6,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:67
+  enum { kExcWords = 30 };
+  uint32_t mepc = ibex_mepc_read();
+20002106:                 2da1                  jal     2000275e <ibex_mepc_read>
+20002108:                 8a2a                  mv      s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:68
+  uint32_t mtval = ibex_mtval_read();
+2000210a:                 25b9                  jal     20002758 <ibex_mtval_read>
+2000210c:                 8aaa                  mv      s5,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:69
+  if (exc_info) {
+2000210e:       /-------- 0c0b0763              beqz    s6,200021dc <ottf_generic_fault_print+0xf6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:70
+    base_printf("===== Exception Frame @ %08x =====", exc_info);
+20002112:       |         00004517              auipc   a0,0x4
+20002116:       |         90250513              addi    a0,a0,-1790 # 20005a14 <manage_flow_control.log_fields.85+0xf8>
+2000211a:       |         85da                  mv      a1,s6
+2000211c:       |         139000ef              jal     ra,20002a54 <base_printf>
+20002120:       |         4481                  li      s1,0
+20002122:       |         00004517              auipc   a0,0x4
+20002126:       |         c1250d13              addi    s10,a0,-1006 # 20005d34 <exc_frame>
+2000212a:       |         00004517              auipc   a0,0x4
+2000212e:       |         e8a50b93              addi    s7,a0,-374 # 20005fb4 <test_status_set.log_fields.7+0x24>
+20002132:       |         00004517              auipc   a0,0x4
+20002136:       |         90550c13              addi    s8,a0,-1787 # 20005a37 <manage_flow_control.log_fields.85+0x11b>
+2000213a:       |         4cf9                  li      s9,30
+2000213c:       |         845a                  mv      s0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:72
+    for (size_t i = 0; i < kExcWords; ++i) {
+      if (i % 4 == 0) {
+2000213e:       |  /----> 0034f513              andi    a0,s1,3
+20002142:       |  |  /-- e501                  bnez    a0,2000214a <ottf_generic_fault_print+0x64>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:73
+        base_printf("\n");
+20002144:       |  |  |   855e                  mv      a0,s7
+20002146:       |  |  |   10f000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:75
+      }
+      const char *name = exc_frame[i];
+2000214a:       |  |  \-> 000d2583              lw      a1,0(s10)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:78
+      if (name == NULL)
+        continue;
+      base_printf(" %4s=%08x", name, exc_info[i]);
+2000214e:       |  |      4010                  lw      a2,0(s0)
+20002150:       |  |      8562                  mv      a0,s8
+20002152:       |  |      103000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:71
+    for (size_t i = 0; i < kExcWords; ++i) {
+20002156:       |  |      0485                  addi    s1,s1,1
+20002158:       |  |      0411                  addi    s0,s0,4
+2000215a:       |  |      0d11                  addi    s10,s10,4
+2000215c:       |  \----- ff9491e3              bne     s1,s9,2000213e <ottf_generic_fault_print+0x58>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:80
+    }
+    uint32_t *sp = exc_info + kExcWords;
+20002160:       |         078b0413              addi    s0,s6,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:81
+    base_printf("\n");
+20002164:       |         00004517              auipc   a0,0x4
+20002168:       |         e5050513              addi    a0,a0,-432 # 20005fb4 <test_status_set.log_fields.7+0x24>
+2000216c:       |         0e9000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:90
+                     TOP_EARLGREY_SRAM_CTRL_MAIN_RAM_SIZE_BYTES);
+
+    extern const char _text_start[], _text_end[];
+    const uint32_t text_start = (uint32_t)_text_start;
+    const uint32_t text_end = (uint32_t)_text_end;
+    base_printf("===== Call Stack =====\n");
+20002170:       |         00004517              auipc   a0,0x4
+20002174:       |         8d150513              addi    a0,a0,-1839 # 20005a41 <manage_flow_control.log_fields.85+0x125>
+20002178:       |         0dd000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+2000217c:       |         01c45513              srli    a0,s0,0x1c
+20002180:       |         00153513              seqz    a0,a0
+20002184:       |         10020bb7              lui     s7,0x10020
+20002188:       |         fffb8593              addi    a1,s7,-1 # 1001ffff <_exception_frame_start+0x7f>
+2000218c:       |         0085b5b3              sltu    a1,a1,s0
+20002190:       |         8d4d                  or      a0,a0,a1
+20002192:       +-------- e529                  bnez    a0,200021dc <ottf_generic_fault_print+0xf6>
+20002194:       |         07cb0493              addi    s1,s6,124
+20002198:       |         ffffe517              auipc   a0,0xffffe
+2000219c:       |         26850c13              addi    s8,a0,616 # 20000400 <_ottf_interrupt_vector>
+200021a0:       |         00002517              auipc   a0,0x2
+200021a4:       |         1f050413              addi    s0,a0,496 # 20004390 <_text_end>
+200021a8:       |         00004517              auipc   a0,0x4
+200021ac:       |         8b150b13              addi    s6,a0,-1871 # 20005a59 <manage_flow_control.log_fields.85+0x13d>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:92
+      uint32_t val = *sp;
+200021b0:       |  /----> ffc4a583              lw      a1,-4(s1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:93
+      if (val >= text_start && val < text_end) {
+200021b4:       |  |      0185b533              sltu    a0,a1,s8
+200021b8:       |  |      0085b633              sltu    a2,a1,s0
+200021bc:       |  |      00164613              xori    a2,a2,1
+200021c0:       |  |      8d51                  or      a0,a0,a2
+200021c2:       |  |  /-- e501                  bnez    a0,200021ca <ottf_generic_fault_print+0xe4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:94
+        base_printf("    %08x\n", val);
+200021c4:       |  |  |   855a                  mv      a0,s6
+200021c6:       |  |  |   08f000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+200021ca:       |  |  \-> 01c4d513              srli    a0,s1,0x1c
+200021ce:       |  |      00a03533              snez    a0,a0
+200021d2:       |  |      0174b5b3              sltu    a1,s1,s7
+200021d6:       |  |      8d6d                  and     a0,a0,a1
+200021d8:       |  |      0491                  addi    s1,s1,4
+200021da:       |  \----- f979                  bnez    a0,200021b0 <ottf_generic_fault_print+0xca>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:98
+      }
+    }
+  }
+  LOG_ERROR("FAULT: %s. MCAUSE=%08x MEPC=%08x MTVAL=%08x", reason, mcause, mepc,
+200021dc:       \-------> 00004517              auipc   a0,0x4
+200021e0:                 0e852503              lw      a0,232(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+200021e4:             /-- c91d                  beqz    a0,2000221a <ottf_generic_fault_print+0x134>
+200021e6:             |   e000e517              auipc   a0,0xe000e
+200021ea:             |   e1a50513              addi    a0,a0,-486 # 10000 <_chip_info_end>
+200021ee:             |   43c00593              li      a1,1084
+200021f2:             |   952e                  add     a0,a0,a1
+200021f4:             |   4591                  li      a1,4
+200021f6:             |   864e                  mv      a2,s3
+200021f8:             |   86ca                  mv      a3,s2
+200021fa:             |   8752                  mv      a4,s4
+200021fc:             |   87d6                  mv      a5,s5
+200021fe:             |   50b2                  lw      ra,44(sp)
+20002200:             |   5422                  lw      s0,40(sp)
+20002202:             |   5492                  lw      s1,36(sp)
+20002204:             |   5902                  lw      s2,32(sp)
+20002206:             |   49f2                  lw      s3,28(sp)
+20002208:             |   4a62                  lw      s4,24(sp)
+2000220a:             |   4ad2                  lw      s5,20(sp)
+2000220c:             |   4b42                  lw      s6,16(sp)
+2000220e:             |   4bb2                  lw      s7,12(sp)
+20002210:             |   4c22                  lw      s8,8(sp)
+20002212:             |   4c92                  lw      s9,4(sp)
+20002214:             |   4d02                  lw      s10,0(sp)
+20002216:             |   6145                  addi    sp,sp,48
+20002218:             |   a3e5                  j       20002800 <base_log_internal_dv>
+2000221a:             \-> 00004517              auipc   a0,0x4
+2000221e:                 b9250513              addi    a0,a0,-1134 # 20005dac <ottf_generic_fault_print.log_fields>
+20002222:                 85ce                  mv      a1,s3
+20002224:                 864a                  mv      a2,s2
+20002226:                 86d2                  mv      a3,s4
+20002228:                 8756                  mv      a4,s5
+2000222a:                 50b2                  lw      ra,44(sp)
+2000222c:                 5422                  lw      s0,40(sp)
+2000222e:                 5492                  lw      s1,36(sp)
+20002230:                 5902                  lw      s2,32(sp)
+20002232:                 49f2                  lw      s3,28(sp)
+20002234:                 4a62                  lw      s4,24(sp)
+20002236:                 4ad2                  lw      s5,20(sp)
+20002238:                 4b42                  lw      s6,16(sp)
+2000223a:                 4bb2                  lw      s7,12(sp)
+2000223c:                 4c22                  lw      s8,8(sp)
+2000223e:                 4c92                  lw      s9,4(sp)
+20002240:                 4d02                  lw      s10,0(sp)
+20002242:                 6145                  addi    sp,sp,48
+20002244:                 a305                  j       20002764 <base_log_internal_core>
+
+20002246 <ottf_exception_handler>:
+ottf_exception_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:119
+ */
+OT_WEAK
+void *pxCurrentTCB = NULL;
+
+OT_WEAK
+void ottf_exception_handler(uint32_t *exc_info) {
+20002246:           1141                        addi    sp,sp,-16
+20002248:           c606                        sw      ra,12(sp)
+2000224a:           c422                        sw      s0,8(sp)
+2000224c:           842a                        mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:120
+  uint32_t mcause = ibex_mcause_read();
+2000224e:           2311                        jal     20002752 <ibex_mcause_read>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:122
+
+  switch ((ibex_exc_t)(mcause & kIbexExcMax)) {
+20002250:           897d                        andi    a0,a0,31
+20002252:           45ad                        li      a1,11
+20002254:       /-- 04a5ee63            bltu    a1,a0,200022b0 <ottf_exception_handler+0x6a>
+20002258:       |   00003597            auipc   a1,0x3
+2000225c:       |   78c58593            addi    a1,a1,1932 # 200059e4 <manage_flow_control.log_fields.85+0xc8>
+20002260:       |   20b54533            sh2add  a0,a0,a1
+20002264:       |   4108                        lw      a0,0(a0)
+20002266:       |   8502                        jr      a0
+20002268:       |   8522                        mv      a0,s0
+2000226a:       |   40b2                        lw      ra,12(sp)
+2000226c:       |   4422                        lw      s0,8(sp)
+2000226e:       |   0141                        addi    sp,sp,16
+20002270:       |   a091                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:124
+    case kIbexExcInstrMisaligned:
+      ottf_instr_misaligned_fault_handler(exc_info);
+20002272:       |   8522                        mv      a0,s0
+20002274:       |   40b2                        lw      ra,12(sp)
+20002276:       |   4422                        lw      s0,8(sp)
+20002278:       |   0141                        addi    sp,sp,16
+2000227a:       |   a82d                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:127
+      break;
+    case kIbexExcInstrAccessFault:
+      ottf_instr_access_fault_handler(exc_info);
+2000227c:       |   8522                        mv      a0,s0
+2000227e:       |   40b2                        lw      ra,12(sp)
+20002280:       |   4422                        lw      s0,8(sp)
+20002282:       |   0141                        addi    sp,sp,16
+20002284:       |   a805                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:130
+      break;
+    case kIbexExcIllegalInstrFault:
+      ottf_illegal_instr_fault_handler(exc_info);
+20002286:       |   8522                        mv      a0,s0
+20002288:       |   40b2                        lw      ra,12(sp)
+2000228a:       |   4422                        lw      s0,8(sp)
+2000228c:       |   0141                        addi    sp,sp,16
+2000228e:       |   a01d                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:133
+      break;
+    case kIbexExcBreakpoint:
+      ottf_breakpoint_handler(exc_info);
+20002290:       |   8522                        mv      a0,s0
+20002292:       |   40b2                        lw      ra,12(sp)
+20002294:       |   4422                        lw      s0,8(sp)
+20002296:       |   0141                        addi    sp,sp,16
+20002298:       |   a831                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:145
+      break;
+    case kIbexExcMachineECall:
+      ottf_machine_ecall_handler(exc_info);
+      break;
+    case kIbexExcUserECall:
+      ottf_user_ecall_handler(exc_info);
+2000229a:       |   8522                        mv      a0,s0
+2000229c:       |   40b2                        lw      ra,12(sp)
+2000229e:       |   4422                        lw      s0,8(sp)
+200022a0:       |   0141                        addi    sp,sp,16
+200022a2:       |   a809                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:142
+      ottf_machine_ecall_handler(exc_info);
+200022a4:       |   8522                        mv      a0,s0
+200022a6:       |   40b2                        lw      ra,12(sp)
+200022a8:       |   4422                        lw      s0,8(sp)
+200022aa:       |   0141                        addi    sp,sp,16
+200022ac:       |   81ffe06f            j       20000aca <ottf_machine_ecall_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:148
+      break;
+    default:
+      generic_fault_handler(exc_info);
+200022b0:       \-> 8522                        mv      a0,s0
+200022b2:           2009                        jal     200022b4 <ottf_breakpoint_handler>
+
+200022b4 <ottf_breakpoint_handler>:
+generic_fault_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:102
+static void generic_fault_handler(uint32_t *exc_info) {
+200022b4:       1141                    addi    sp,sp,-16
+200022b6:       c606                    sw      ra,12(sp)
+200022b8:       c422                    sw      s0,8(sp)
+200022ba:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:103
+  uint32_t mcause = ibex_mcause_read();
+200022bc:       2959                    jal     20002752 <ibex_mcause_read>
+200022be:       862a                    mv      a2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:104
+  ottf_generic_fault_print(exc_info, exception_reason[mcause & kIbexExcMax],
+200022c0:       897d                    andi    a0,a0,31
+200022c2:       00004597                auipc   a1,0x4
+200022c6:       b2658593                addi    a1,a1,-1242 # 20005de8 <exception_reason>
+200022ca:       20b54533                sh2add  a0,a0,a1
+200022ce:       410c                    lw      a1,0(a0)
+200022d0:       8522                    mv      a0,s0
+200022d2:       3d11                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:106
+  abort();
+200022d4:       29a5                    jal     2000274c <abort>
+
+200022d6 <ottf_software_isr>:
+ottf_software_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:181
+OT_WEAK
+OT_ALIAS("generic_fault_handler")
+void ottf_user_ecall_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_software_isr(uint32_t *exc_info) {
+200022d6:       1141                    addi    sp,sp,-16
+200022d8:       c606                    sw      ra,12(sp)
+200022da:       c422                    sw      s0,8(sp)
+200022dc:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:182
+  ottf_generic_fault_print(exc_info, "Software IRQ", ibex_mcause_read());
+200022de:       2995                    jal     20002752 <ibex_mcause_read>
+200022e0:       862a                    mv      a2,a0
+200022e2:       00003517                auipc   a0,0x3
+200022e6:       7de50593                addi    a1,a0,2014 # 20005ac0 <manage_flow_control.log_fields.85+0x1a4>
+200022ea:       8522                    mv      a0,s0
+200022ec:       3bed                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:183
+  abort();
+200022ee:       29b9                    jal     2000274c <abort>
+
+200022f0 <ottf_timer_isr>:
+ottf_timer_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:187
+}
+
+OT_WEAK
+void ottf_timer_isr(uint32_t *exc_info) {
+200022f0:       1141                    addi    sp,sp,-16
+200022f2:       c606                    sw      ra,12(sp)
+200022f4:       c422                    sw      s0,8(sp)
+200022f6:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:188
+  ottf_generic_fault_print(exc_info, "Timer IRQ", ibex_mcause_read());
+200022f8:       29a9                    jal     20002752 <ibex_mcause_read>
+200022fa:       862a                    mv      a2,a0
+200022fc:       00003517                auipc   a0,0x3
+20002300:       7d150593                addi    a1,a0,2001 # 20005acd <manage_flow_control.log_fields.85+0x1b1>
+20002304:       8522                    mv      a0,s0
+20002306:       33c5                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:189
+  abort();
+20002308:       2191                    jal     2000274c <abort>
+
+2000230a <ottf_external_isr>:
+ottf_external_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:196
+
+OT_WEAK
+bool ottf_console_flow_control_isr(uint32_t *exc_info) { return false; }
+
+OT_WEAK
+void ottf_external_isr(uint32_t *exc_info) {
+2000230a:                    1141                       addi    sp,sp,-16
+2000230c:                    c606                       sw      ra,12(sp)
+2000230e:                    c422                       sw      s0,8(sp)
+20002310:                    c226                       sw      s1,4(sp)
+20002312:                    842a                       mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:199
+  const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+  dif_rv_plic_irq_id_t plic_irq_id;
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&ottf_plic, kPlicTarget, &plic_irq_id));
+20002314:                    f0000517           auipc   a0,0xf0000
+20002318:                    d8050513           addi    a0,a0,-640 # 10002094 <ottf_plic>
+2000231c:                    860a                       mv      a2,sp
+2000231e:                    4581                       li      a1,0
+20002320:                    2ae1                       jal     200024f8 <dif_rv_plic_irq_claim>
+20002322:                    00004497           auipc   s1,0x4
+20002326:          /-------- c90d                       beqz    a0,20002358 <ottf_external_isr+0x4e>
+20002328:          |         862a                       mv      a2,a0
+2000232a:          |         fa24a503           lw      a0,-94(s1) # 200062c4 <kDeviceLogBypassUartAddress>
+2000232e:          |  /----- c919                       beqz    a0,20002344 <ottf_external_isr+0x3a>
+20002330:          |  |      e000e517           auipc   a0,0xe000e
+20002334:          |  |      cd050513           addi    a0,a0,-816 # 10000 <_chip_info_end>
+20002338:          |  |      45000593           li      a1,1104
+2000233c:          |  |      952e                       add     a0,a0,a1
+2000233e:          |  |      4585                       li      a1,1
+20002340:          |  |      21c1                       jal     20002800 <base_log_internal_dv>
+20002342:          |  |  /-- a039                       j       20002350 <ottf_external_isr+0x46>
+20002344:          |  \--|-> 00004517           auipc   a0,0x4
+20002348:          |     |   a7c50513           addi    a0,a0,-1412 # 20005dc0 <ottf_external_isr.log_fields>
+2000234c:          |     |   85b2                       mv      a1,a2
+2000234e:          |     |   2919                       jal     20002764 <base_log_internal_core>
+20002350:          |     \-> 6531                       lui     a0,0xc
+20002352:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20002356:          |         24d1                       jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:202
+
+  top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
+      top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id];
+20002358:          \-------> 4502                       lw      a0,0(sp)
+2000235a:                    00004597           auipc   a1,0x4
+2000235e:                    f6e58593           addi    a1,a1,-146 # 200062c8 <top_earlgrey_plic_interrupt_for_peripheral>
+20002362:                    20b54533           sh2add  a0,a0,a1
+20002366:                    4108                       lw      a0,0(a0)
+20002368:                    4585                       li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+2000236a:       /----------- 04b51b63           bne     a0,a1,200023c0 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:205
+      ottf_console_flow_control_isr(exc_info)) {
+2000236e:       |            8522                       mv      a0,s0
+20002370:       |            eb4ff0ef           jal     ra,20001a24 <ottf_console_flow_control_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+20002374:       +----------- c531                       beqz    a0,200023c0 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:207
+    // Complete the IRQ at PLIC.
+    CHECK_DIF_OK(
+20002376:       |            4602                       lw      a2,0(sp)
+20002378:       |            f0000517           auipc   a0,0xf0000
+2000237c:       |            d1c50513           addi    a0,a0,-740 # 10002094 <ottf_plic>
+20002380:       |            4581                       li      a1,0
+20002382:       |            2a71                       jal     2000251e <dif_rv_plic_irq_complete>
+20002384:       |  /-------- c90d                       beqz    a0,200023b6 <ottf_external_isr+0xac>
+20002386:       |  |         862a                       mv      a2,a0
+20002388:       |  |         fa24a503           lw      a0,-94(s1)
+2000238c:       |  |  /----- c919                       beqz    a0,200023a2 <ottf_external_isr+0x98>
+2000238e:       |  |  |      e000e517           auipc   a0,0xe000e
+20002392:       |  |  |      c7250513           addi    a0,a0,-910 # 10000 <_chip_info_end>
+20002396:       |  |  |      46400593           li      a1,1124
+2000239a:       |  |  |      952e                       add     a0,a0,a1
+2000239c:       |  |  |      4585                       li      a1,1
+2000239e:       |  |  |      218d                       jal     20002800 <base_log_internal_dv>
+200023a0:       |  |  |  /-- a039                       j       200023ae <ottf_external_isr+0xa4>
+200023a2:       |  |  \--|-> 00004517           auipc   a0,0x4
+200023a6:       |  |     |   a3250513           addi    a0,a0,-1486 # 20005dd4 <ottf_external_isr.log_fields.12>
+200023aa:       |  |     |   85b2                       mv      a1,a2
+200023ac:       |  |     |   2e65                       jal     20002764 <base_log_internal_core>
+200023ae:       |  |     \-> 6531                       lui     a0,0xc
+200023b0:       |  |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200023b4:       |  |         249d                       jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:214
+    return;
+  }
+
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+  abort();
+}
+200023b6:       |  \-------> 40b2                       lw      ra,12(sp)
+200023b8:       |            4422                       lw      s0,8(sp)
+200023ba:       |            4492                       lw      s1,4(sp)
+200023bc:       |            0141                       addi    sp,sp,16
+200023be:       |            8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:212
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+200023c0:       \----------> 2e49                       jal     20002752 <ibex_mcause_read>
+200023c2:                    862a                       mv      a2,a0
+200023c4:                    00003517           auipc   a0,0x3
+200023c8:                    7b950593           addi    a1,a0,1977 # 20005b7d <manage_flow_control.log_fields.85+0x261>
+200023cc:                    8522                       mv      a0,s0
+200023ce:                    d19ff0ef           jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:213
+  abort();
+200023d2:                    2ead                       jal     2000274c <abort>
+
+200023d4 <ottf_external_nmi_handler>:
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:216
+
+static void generic_internal_irq_handler(uint32_t *exc_info) {
+200023d4:       1141                    addi    sp,sp,-16
+200023d6:       c606                    sw      ra,12(sp)
+200023d8:       c422                    sw      s0,8(sp)
+200023da:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+200023dc:       2e9d                    jal     20002752 <ibex_mcause_read>
+200023de:       862a                    mv      a2,a0
+200023e0:       00004517                auipc   a0,0x4
+200023e4:       94750593                addi    a1,a0,-1721 # 20005d27 <manage_flow_control.log_fields.85+0x40b>
+200023e8:       8522                    mv      a0,s0
+200023ea:       cfdff0ef                jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+200023ee:       2eb9                    jal     2000274c <abort>
+
+200023f0 <ottf_internal_isr>:
+ottf_internal_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:230
+OT_WEAK
+OT_ALIAS("generic_internal_irq_handler")
+void ottf_load_integrity_error_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_internal_isr(uint32_t *exc_info) {
+200023f0:              1141                     addi    sp,sp,-16
+200023f2:              c606                     sw      ra,12(sp)
+200023f4:              c422                     sw      s0,8(sp)
+200023f6:              842a                     mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:231
+  uint32_t mcause = ibex_mcause_read();
+200023f8:              2ea9                     jal     20002752 <ibex_mcause_read>
+200023fa:              800005b7                 lui     a1,0x80000
+200023fe:              05fd                     addi    a1,a1,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:232
+  switch ((ibex_internal_irq_t)(mcause)) {
+20002400:          /-- 00b50a63                 beq     a0,a1,20002414 <ottf_internal_isr+0x24>
+20002404:          |   5581                     li      a1,-32
+20002406:       /--|-- 00b51c63                 bne     a0,a1,2000241e <ottf_internal_isr+0x2e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:234
+    case kIbexInternalIrqLoadInteg:
+      ottf_load_integrity_error_handler(exc_info);
+2000240a:       |  |   8522                     mv      a0,s0
+2000240c:       |  |   40b2                     lw      ra,12(sp)
+2000240e:       |  |   4422                     lw      s0,8(sp)
+20002410:       |  |   0141                     addi    sp,sp,16
+20002412:       |  |   b7c9                     j       200023d4 <ottf_external_nmi_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:237
+      break;
+    case kIbexInternalIrqNmi:
+      ottf_external_nmi_handler(exc_info);
+20002414:       |  \-> 8522                     mv      a0,s0
+20002416:       |      40b2                     lw      ra,12(sp)
+20002418:       |      4422                     lw      s0,8(sp)
+2000241a:       |      0141                     addi    sp,sp,16
+2000241c:       |      bf65                     j       200023d4 <ottf_external_nmi_handler>
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+2000241e:       \----> 2e15                     jal     20002752 <ibex_mcause_read>
+20002420:              862a                     mv      a2,a0
+20002422:              00004517                 auipc   a0,0x4
+20002426:              90550593                 addi    a1,a0,-1787 # 20005d27 <manage_flow_control.log_fields.85+0x40b>
+2000242a:              8522                     mv      a0,s0
+2000242c:              cbbff0ef                 jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+20002430:              2e31                     jal     2000274c <abort>
+
+20002432 <dif_rstmgr_init>:
+dif_rstmgr_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:18
+
+#include "rstmgr_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rstmgr_init(mmio_region_t base_addr, dif_rstmgr_t *rstmgr) {
+  if (rstmgr == NULL) {
+20002432:       /----- c581                     beqz    a1,2000243a <dif_rstmgr_init+0x8>
+20002434:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rstmgr->base_addr = base_addr;
+20002436:       |      c188                     sw      a0,0(a1)
+20002438:       |  /-- a011                     j       2000243c <dif_rstmgr_init+0xa>
+2000243a:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:25
+
+  return kDifOk;
+}
+2000243c:          \-> 8532                     mv      a0,a2
+2000243e:              8082                     ret
+
+20002440 <dif_rstmgr_reset_info_clear>:
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:171
+
+  return kDifOk;
+}
+
+dif_result_t dif_rstmgr_reset_info_clear(const dif_rstmgr_t *handle) {
+  if (handle == NULL) {
+20002440:       /-- c511                        beqz    a0,2000244c <dif_rstmgr_reset_info_clear+0xc>
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:175
+    return kDifBadArg;
+  }
+
+  mmio_region_t base_addr = handle->base_addr;
+20002442:       |   410c                        lw      a1,0(a0)
+20002444:       |   4501                        li      a0,0
+20002446:       |   567d                        li      a2,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20002448:       |   c590                        sw      a2,8(a1)
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:180
+
+  rstmgr_reset_info_clear(base_addr);
+
+  return kDifOk;
+}
+2000244a:       |   8082                        ret
+2000244c:       \-> 450d                        li      a0,3
+2000244e:           8082                        ret
+
+20002450 <dif_rv_plic_init>:
+dif_rv_plic_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:18
+
+#include "rv_plic_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_plic_init(mmio_region_t base_addr, dif_rv_plic_t *rv_plic) {
+  if (rv_plic == NULL) {
+20002450:       /----- c581                     beqz    a1,20002458 <dif_rv_plic_init+0x8>
+20002452:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rv_plic->base_addr = base_addr;
+20002454:       |      c188                     sw      a0,0(a1)
+20002456:       |  /-- a011                     j       2000245a <dif_rv_plic_init+0xa>
+20002458:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:25
+
+  return kDifOk;
+}
+2000245a:          \-> 8532                     mv      a0,a2
+2000245c:              8082                     ret
+
+2000245e <dif_rv_plic_irq_set_enabled>:
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:174
+
+dif_result_t dif_rv_plic_irq_set_enabled(const dif_rv_plic_t *plic,
+                                         dif_rv_plic_irq_id_t irq,
+                                         dif_rv_plic_target_t target,
+                                         dif_toggle_t state) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+2000245e:           00153713            seqz    a4,a0
+20002462:           0ba5b793            sltiu   a5,a1,186
+20002466:           0017c793            xori    a5,a5,1
+2000246a:           00c03633            snez    a2,a2
+2000246e:           8e59                        or      a2,a2,a4
+20002470:           8e5d                        or      a2,a2,a5
+20002472:           0026b713            sltiu   a4,a3,2
+20002476:           00174713            xori    a4,a4,1
+2000247a:           8f51                        or      a4,a4,a2
+2000247c:           460d                        li      a2,3
+2000247e:       /-- e315                        bnez    a4,200024a2 <dif_rv_plic_irq_set_enabled+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:193
+      return kDifBadArg;
+  }
+
+  plic_reg_info_t reg_info = plic_irq_enable_reg_info(irq, target);
+
+  uint32_t reg = mmio_region_read32(plic->base_addr, reg_info.offset);
+20002480:       |   4108                        lw      a0,0(a0)
+plic_irq_enable_reg_info():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:92
+      .offset = plic_irq_enable_base_for_target(target) + offset,
+20002482:       |   0035d613            srli    a2,a1,0x3
+20002486:       |   28d61613            bseti   a2,a2,0xd
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000248a:       |   9a71                        andi    a2,a2,-4
+2000248c:       |   9532                        add     a0,a0,a2
+2000248e:       |   4118                        lw      a4,0(a0)
+20002490:       |   4601                        li      a2,0
+plic_irq_bit_index():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:51
+  return irq % RV_PLIC_PARAM_REG_WIDTH;
+20002492:       |   01f5f793            andi    a5,a1,31
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20002496:       |   48f71733            bclr    a4,a4,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000249a:       |   00b695b3            sll     a1,a3,a1
+2000249e:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200024a0:       |   c10c                        sw      a1,0(a0)
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:198
+  reg = bitfield_bit32_write(reg, reg_info.bit_index, flag);
+  mmio_region_write32(plic->base_addr, reg_info.offset, reg);
+
+  return kDifOk;
+}
+200024a2:       \-> 8532                        mv      a0,a2
+200024a4:           8082                        ret
+
+200024a6 <dif_rv_plic_irq_set_priority>:
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:203
+
+dif_result_t dif_rv_plic_irq_set_priority(const dif_rv_plic_t *plic,
+                                          dif_rv_plic_irq_id_t irq,
+                                          uint32_t priority) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+200024a6:           00153693            seqz    a3,a0
+200024aa:           0ba5b713            sltiu   a4,a1,186
+200024ae:           00174713            xori    a4,a4,1
+200024b2:           8ed9                        or      a3,a3,a4
+200024b4:           00463713            sltiu   a4,a2,4
+200024b8:           00174713            xori    a4,a4,1
+200024bc:           8f55                        or      a4,a4,a3
+200024be:           468d                        li      a3,3
+200024c0:       /-- e711                        bnez    a4,200024cc <dif_rv_plic_irq_set_priority+0x26>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:209
+      priority > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t offset = plic_priority_reg_offset(irq);
+  mmio_region_write32(plic->base_addr, offset, priority);
+200024c2:       |   4108                        lw      a0,0(a0)
+200024c4:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200024c6:       |   20a5c533            sh2add  a0,a1,a0
+200024ca:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:212
+
+  return kDifOk;
+}
+200024cc:       \-> 8536                        mv      a0,a3
+200024ce:           8082                        ret
+
+200024d0 <dif_rv_plic_target_set_threshold>:
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:217
+
+dif_result_t dif_rv_plic_target_set_threshold(const dif_rv_plic_t *plic,
+                                              dif_rv_plic_target_t target,
+                                              uint32_t threshold) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+200024d0:           00153693            seqz    a3,a0
+200024d4:           00b035b3            snez    a1,a1
+200024d8:           8dd5                        or      a1,a1,a3
+200024da:           00463693            sltiu   a3,a2,4
+200024de:           0016c693            xori    a3,a3,1
+200024e2:           8ecd                        or      a3,a3,a1
+200024e4:           458d                        li      a1,3
+200024e6:       /-- e699                        bnez    a3,200024f4 <dif_rv_plic_target_set_threshold+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:223
+      threshold > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t threshold_offset = plic_threshold_base_for_target(target);
+  mmio_region_write32(plic->base_addr, threshold_offset, threshold);
+200024e8:       |   4108                        lw      a0,0(a0)
+200024ea:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200024ec:       |   002006b7            lui     a3,0x200
+200024f0:       |   9536                        add     a0,a0,a3
+200024f2:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:226
+
+  return kDifOk;
+}
+200024f4:       \-> 852e                        mv      a0,a1
+200024f6:           8082                        ret
+
+200024f8 <dif_rv_plic_irq_claim>:
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:245
+}
+
+dif_result_t dif_rv_plic_irq_claim(const dif_rv_plic_t *plic,
+                                   dif_rv_plic_target_t target,
+                                   dif_rv_plic_irq_id_t *claim_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+200024f8:           00153693            seqz    a3,a0
+200024fc:           00b035b3            snez    a1,a1
+20002500:           8dd5                        or      a1,a1,a3
+20002502:           00163693            seqz    a3,a2
+20002506:           8ecd                        or      a3,a3,a1
+20002508:           458d                        li      a1,3
+2000250a:       /-- ea81                        bnez    a3,2000251a <dif_rv_plic_irq_claim+0x22>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+      claim_data == NULL) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  *claim_data = mmio_region_read32(plic->base_addr, claim_complete_reg);
+2000250c:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000250e:       |   002005b7            lui     a1,0x200
+20002512:       |   952e                        add     a0,a0,a1
+20002514:       |   4148                        lw      a0,4(a0)
+20002516:       |   4581                        li      a1,0
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+20002518:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:254
+
+  return kDifOk;
+}
+2000251a:       \-> 852e                        mv      a0,a1
+2000251c:           8082                        ret
+
+2000251e <dif_rv_plic_irq_complete>:
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:259
+
+dif_result_t dif_rv_plic_irq_complete(const dif_rv_plic_t *plic,
+                                      dif_rv_plic_target_t target,
+                                      dif_rv_plic_irq_id_t complete_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
+2000251e:           00153693            seqz    a3,a0
+20002522:           00b035b3            snez    a1,a1
+20002526:           8ecd                        or      a3,a3,a1
+20002528:           458d                        li      a1,3
+2000252a:       /-- e699                        bnez    a3,20002538 <dif_rv_plic_irq_complete+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:266
+  }
+
+  // Write back the claimed IRQ ID to the target specific CC register,
+  // to notify the PLIC of the IRQ completion.
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  mmio_region_write32(plic->base_addr, claim_complete_reg, complete_data);
+2000252c:       |   4108                        lw      a0,0(a0)
+2000252e:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20002530:       |   002006b7            lui     a3,0x200
+20002534:       |   9536                        add     a0,a0,a3
+20002536:       |   c150                        sw      a2,4(a0)
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:269
+
+  return kDifOk;
+}
+20002538:       \-> 852e                        mv      a0,a1
+2000253a:           8082                        ret
+
+2000253c <rand_testutils_init>:
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:31
+/**
+ * The default timeout in usecs for fetching data from the entropy source.
+ */
+static const uint32_t kEntropyFetchTimeoutMicros = 100000;
+
+rand_testutils_rng_t rand_testutils_init(dif_rv_core_ibex_t *rv_core_ibex) {
+2000253c:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+  CHECK(rv_core_ibex != NULL);
+2000253e:                 ce06                  sw      ra,28(sp)
+20002540:                 cc22                  sw      s0,24(sp)
+20002542:                 ca26                  sw      s1,20(sp)
+20002544:                 c84a                  sw      s2,16(sp)
+20002546:                 00004617              auipc   a2,0x4
+2000254a:                 baa62483              lw      s1,-1110(a2) # 200060f0 <MODULE_ID>
+2000254e:                 892e                  mv      s2,a1
+20002550:                 842a                  mv      s0,a0
+20002552:                 00004517              auipc   a0,0x4
+20002556:                 91e50613              addi    a2,a0,-1762 # 20005e70 <kDifRvPlicMaxPriority+0x4>
+2000255a:                 4501                  li      a0,0
+2000255c:                 85a6                  mv      a1,s1
+2000255e:                 4681                  li      a3,0
+20002560:                 4bd000ef              jal     ra,2000321c <status_create>
+20002564:                 012035b3              snez    a1,s2
+20002568:                 00b107a3              sb      a1,15(sp)
+2000256c:                 00f14583              lbu     a1,15(sp)
+20002570:       /-------- ed9d                  bnez    a1,200025ae <rand_testutils_init+0x72>
+20002572:       |         00004517              auipc   a0,0x4
+20002576:       |         d5252503              lw      a0,-686(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000257a:       |  /----- c919                  beqz    a0,20002590 <rand_testutils_init+0x54>
+2000257c:       |  |      e000e517              auipc   a0,0xe000e
+20002580:       |  |      a8450513              addi    a0,a0,-1404 # 10000 <_chip_info_end>
+20002584:       |  |      47800593              li      a1,1144
+20002588:       |  |      952e                  add     a0,a0,a1
+2000258a:       |  |      4581                  li      a1,0
+2000258c:       |  |      2c95                  jal     20002800 <base_log_internal_dv>
+2000258e:       |  |  /-- a031                  j       2000259a <rand_testutils_init+0x5e>
+20002590:       |  \--|-> 00004517              auipc   a0,0x4
+20002594:       |     |   97050513              addi    a0,a0,-1680 # 20005f00 <rand_testutils_init.log_fields>
+20002598:       |     |   22f1                  jal     20002764 <base_log_internal_core>
+2000259a:       |     \-> 00004517              auipc   a0,0x4
+2000259e:       |         8d650613              addi    a2,a0,-1834 # 20005e70 <kDifRvPlicMaxPriority+0x4>
+200025a2:       |         4535                  li      a0,13
+200025a4:       |         02000693              li      a3,32
+200025a8:       |         85a6                  mv      a1,s1
+200025aa:       |         473000ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200025ae:       \-------> 00052593              slti    a1,a0,0
+200025b2:                 897d                  andi    a0,a0,31
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+200025b4:                 00a03533              snez    a0,a0
+200025b8:                 8d6d                  and     a0,a0,a1
+200025ba:             /-- c509                  beqz    a0,200025c4 <rand_testutils_init+0x88>
+200025bc:             |   6531                  lui     a0,0xc
+200025be:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200025c2:             |   28a1                  jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  // For the simulation platforms (DV and Verilator), the LFSR reseed frequency
+  // is arbitrarily set to 255. The test may choose to update this value if
+  // needed.
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+200025c4:             \-> 01242023              sw      s2,0(s0)
+200025c8:                 6561                  lui     a0,0x18
+200025ca:                 6a050513              addi    a0,a0,1696 # 186a0 <_chip_info_end+0x86a0>
+200025ce:                 c048                  sw      a0,4(s0)
+200025d0:                 deadc537              lui     a0,0xdeadc
+200025d4:                 eef50513              addi    a0,a0,-273 # deadbeef <_non_volatile_scratch_end+0xbea5beef>
+200025d8:                 c408                  sw      a0,8(s0)
+200025da:                 80000537              lui     a0,0x80000
+200025de:                 05750513              addi    a0,a0,87 # 80000057 <_non_volatile_scratch_end+0x5ff80057>
+200025e2:                 c448                  sw      a0,12(s0)
+200025e4:                 10000513              li      a0,256
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+      .polynomial_coefficients = kLfsrPolynomialCoefficients,
+      .reseed_frequency = 256,
+      .op_counter = UINT32_MAX};
+  // For non-runtime-sensitive simulations (for example, using FPGA or the
+  // debug board), always fetch random data from the hardware.
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+200025e8:                 00004597              auipc   a1,0x4
+200025ec:                 cc45a583              lw      a1,-828(a1) # 200062ac <kDeviceType>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+200025f0:                 c808                  sw      a0,16(s0)
+200025f2:                 557d                  li      a0,-1
+200025f4:                 4609                  li      a2,2
+200025f6:                 c848                  sw      a0,20(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+200025f8:             /-- 00c5e463              bltu    a1,a2,20002600 <rand_testutils_init+0xc4>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:46
+    ctx.reseed_frequency = 0;
+200025fc:             |   00042823              sw      zero,16(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:48
+  }
+  return ctx;
+20002600:             \-> 40f2                  lw      ra,28(sp)
+20002602:                 4462                  lw      s0,24(sp)
+20002604:                 44d2                  lw      s1,20(sp)
+20002606:                 4942                  lw      s2,16(sp)
+20002608:                 6105                  addi    sp,sp,32
+2000260a:                 8082                  ret
+
+2000260c <dif_rv_core_ibex_init>:
+dif_rv_core_ibex_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:19
+#include "rv_core_ibex_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_core_ibex_init(mmio_region_t base_addr,
+                                   dif_rv_core_ibex_t *rv_core_ibex) {
+  if (rv_core_ibex == NULL) {
+2000260c:       /----- c581                     beqz    a1,20002614 <dif_rv_core_ibex_init+0x8>
+2000260e:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:23
+    return kDifBadArg;
+  }
+
+  rv_core_ibex->base_addr = base_addr;
+20002610:       |      c188                     sw      a0,0(a1)
+20002612:       |  /-- a011                     j       20002616 <dif_rv_core_ibex_init+0xa>
+20002614:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:26
+
+  return kDifOk;
+}
+20002616:          \-> 8532                     mv      a0,a2
+20002618:              8082                     ret
+
+2000261a <test_status_set>:
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:25
+        mmio_region_from_addr(kDeviceTestStatusAddress);
+    mmio_region_write32(test_status_device_addr, 0x0, (uint32_t)test_status);
+  }
+}
+
+void test_status_set(test_status_t test_status) {
+2000261a:                    1141                       addi    sp,sp,-16
+2000261c:                    c606                       sw      ra,12(sp)
+2000261e:                    c422                       sw      s0,8(sp)
+20002620:                    65b1                       lui     a1,0xc
+20002622:                    aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:26
+  switch (test_status) {
+20002626:          /-------- 04b50763           beq     a0,a1,20002674 <test_status_set+0x5a>
+2000262a:          |         842a                       mv      s0,a0
+2000262c:          |         6525                       lui     a0,0x9
+2000262e:          |         0535                       addi    a0,a0,13
+20002630:       /--|-------- 04a40d63           beq     s0,a0,2000268a <test_status_set+0x70>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:40
+      test_status_device_write(test_status);
+      abort();
+      break;
+    }
+    default: {
+      LOG_INFO("test_status_set to 0x%x", test_status);
+20002634:       |  |         00004517           auipc   a0,0x4
+20002638:       |  |         c9052503           lw      a0,-880(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000263c:       |  |  /----- cd01                       beqz    a0,20002654 <test_status_set+0x3a>
+2000263e:       |  |  |      e000e517           auipc   a0,0xe000e
+20002642:       |  |  |      9c250513           addi    a0,a0,-1598 # 10000 <_chip_info_end>
+20002646:       |  |  |      50400593           li      a1,1284
+2000264a:       |  |  |      952e                       add     a0,a0,a1
+2000264c:       |  |  |      4585                       li      a1,1
+2000264e:       |  |  |      8622                       mv      a2,s0
+20002650:       |  |  |      2a45                       jal     20002800 <base_log_internal_dv>
+20002652:       |  |  |  /-- a039                       j       20002660 <test_status_set+0x46>
+20002654:       |  |  \--|-> 00004517           auipc   a0,0x4
+20002658:       |  |     |   93c50513           addi    a0,a0,-1732 # 20005f90 <test_status_set.log_fields.7>
+2000265c:       |  |     |   85a2                       mv      a1,s0
+2000265e:       |  |     |   2219                       jal     20002764 <base_log_internal_core>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+20002660:       |  |     \-> 00004517           auipc   a0,0x4
+20002664:       |  |         c6052503           lw      a0,-928(a0) # 200062c0 <kDeviceTestStatusAddress>
+20002668:       |  |     /-- c111                       beqz    a0,2000266c <test_status_set+0x52>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000266a:       |  |     |   c100                       sw      s0,0(a0)
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:45
+      test_status_device_write(test_status);
+      break;
+    }
+  }
+}
+2000266c:       |  |     \-> 40b2                       lw      ra,12(sp)
+2000266e:       |  |         4422                       lw      s0,8(sp)
+20002670:       |  |         0141                       addi    sp,sp,16
+20002672:       |  |         8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+20002674:       |  \-------> 00004517           auipc   a0,0x4
+20002678:       |            c5052503           lw      a0,-944(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000267c:       |        /-- e115                       bnez    a0,200026a0 <test_status_set+0x86>
+2000267e:       |        |   00004517           auipc   a0,0x4
+20002682:       |        |   8fe50513           addi    a0,a0,-1794 # 20005f7c <test_status_set.log_fields.4>
+20002686:       |        |   28f9                       jal     20002764 <base_log_internal_core>
+20002688:       |     /--|-- a02d                       j       200026b2 <test_status_set+0x98>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+2000268a:       \-----|--|-> 00004517           auipc   a0,0x4
+2000268e:             |  |   c3a52503           lw      a0,-966(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20002692:          /--|--|-- e90d                       bnez    a0,200026c4 <test_status_set+0xaa>
+20002694:          |  |  |   00004517           auipc   a0,0x4
+20002698:          |  |  |   8d450513           addi    a0,a0,-1836 # 20005f68 <test_status_set.log_fields>
+2000269c:          |  |  |   20e1                       jal     20002764 <base_log_internal_core>
+2000269e:       /--|--|--|-- a825                       j       200026d6 <test_status_set+0xbc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+200026a0:       |  |  |  \-> e000e517           auipc   a0,0xe000e
+200026a4:       |  |  |      96050513           addi    a0,a0,-1696 # 10000 <_chip_info_end>
+200026a8:       |  |  |      4f000593           li      a1,1264
+200026ac:       |  |  |      952e                       add     a0,a0,a1
+200026ae:       |  |  |      4581                       li      a1,0
+200026b0:       |  |  |      2a81                       jal     20002800 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026b2:       |  |  \----> 00004517           auipc   a0,0x4
+200026b6:       |  |         c0e52503           lw      a0,-1010(a0) # 200062c0 <kDeviceTestStatusAddress>
+200026ba:       |  |  /----- c515                       beqz    a0,200026e6 <test_status_set+0xcc>
+200026bc:       |  |  |      65b1                       lui     a1,0xc
+200026be:       |  |  |      aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200026c2:       |  |  |  /-- a00d                       j       200026e4 <test_status_set+0xca>
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+200026c4:       |  \--|--|-> e000e517           auipc   a0,0xe000e
+200026c8:       |     |  |   93c50513           addi    a0,a0,-1732 # 10000 <_chip_info_end>
+200026cc:       |     |  |   4dc00593           li      a1,1244
+200026d0:       |     |  |   952e                       add     a0,a0,a1
+200026d2:       |     |  |   4581                       li      a1,0
+200026d4:       |     |  |   2235                       jal     20002800 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026d6:       \-----|--|-> 00004517           auipc   a0,0x4
+200026da:             |  |   bea52503           lw      a0,-1046(a0) # 200062c0 <kDeviceTestStatusAddress>
+200026de:             +--|-- c501                       beqz    a0,200026e6 <test_status_set+0xcc>
+200026e0:             |  |   65a5                       lui     a1,0x9
+200026e2:             |  |   05b5                       addi    a1,a1,13
+200026e4:             |  \-> c10c                       sw      a1,0(a0)
+200026e6:             \----> 209d                       jal     2000274c <abort>
+
+200026e8 <busy_spin_micros>:
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:13
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/runtime/ibex.h"
+
+void busy_spin_micros(uint32_t usec) {
+200026e8:                 1141                  addi    sp,sp,-16
+200026ea:                 c606                  sw      ra,12(sp)
+200026ec:                 c422                  sw      s0,8(sp)
+200026ee:                 c226                  sw      s1,4(sp)
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+OT_WARN_UNUSED_RESULT
+inline uint64_t ibex_mcycle_read(void) {
+  uint32_t cycle_low = 0;
+  uint32_t cycle_high = 0;
+  uint32_t cycle_high_2 = 0;
+  asm volatile(
+200026f0:             /-> b8002473              csrr    s0,mcycleh
+200026f4:             |   b00024f3              csrr    s1,mcycle
+200026f8:             |   b80025f3              csrr    a1,mcycleh
+200026fc:             \-- feb41ae3              bne     s0,a1,200026f0 <busy_spin_micros+0x8>
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:15
+  uint64_t start = ibex_mcycle_read();
+  uint64_t cycles = to_cpu_cycles(usec);
+20002700:                 4581                  li      a1,0
+20002702:                 479010ef              jal     ra,2000437a <to_cpu_cycles>
+20002706:                 40900633              neg     a2,s1
+2000270a:                 009036b3              snez    a3,s1
+2000270e:                 40800733              neg     a4,s0
+20002712:                 40d706b3              sub     a3,a4,a3
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+20002716:       /-------> b8002473              csrr    s0,mcycleh
+2000271a:       |         b0002773              csrr    a4,mcycle
+2000271e:       |         b80024f3              csrr    s1,mcycleh
+20002722:       +-------- fe941ae3              bne     s0,s1,20002716 <busy_spin_micros+0x2e>
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:91
+      "  csrr %2, mcycleh;"  // Read `mcycleh` again.
+      "  bne  %0, %2, 1b;"   // Try again if `mcycle` overflowed before
+                             // reading `mcycleh`.
+      : "=r"(cycle_high), "=r"(cycle_low), "=r"(cycle_high_2)
+      :);
+  return (uint64_t)cycle_high << 32 | cycle_low;
+20002726:       |         9732                  add     a4,a4,a2
+20002728:       |         00c737b3              sltu    a5,a4,a2
+2000272c:       |         9436                  add     s0,s0,a3
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:16
+  while ((ibex_mcycle_read() - start) < cycles) {
+2000272e:       |         97a2                  add     a5,a5,s0
+20002730:       |  /----- 00b78663              beq     a5,a1,2000273c <busy_spin_micros+0x54>
+20002734:       |  |      00b7b733              sltu    a4,a5,a1
+20002738:       +--|----- ff79                  bnez    a4,20002716 <busy_spin_micros+0x2e>
+2000273a:       |  |  /-- a021                  j       20002742 <busy_spin_micros+0x5a>
+2000273c:       |  \--|-> 00a73733              sltu    a4,a4,a0
+20002740:       \-----|-- fb79                  bnez    a4,20002716 <busy_spin_micros+0x2e>
+/proc/self/cwd/sw/device/lib/runtime/hart.c:18
+  }
+}
+20002742:             \-> 40b2                  lw      ra,12(sp)
+20002744:                 4422                  lw      s0,8(sp)
+20002746:                 4492                  lw      s1,4(sp)
+20002748:                 0141                  addi    sp,sp,16
+2000274a:                 8082                  ret
+
+2000274c <abort>:
+wait_for_interrupt():
+/proc/self/cwd/./sw/device/lib/runtime/hart.h:29
+ *
+ * This function may behave as if it is a no-op.
+ */
+inline void wait_for_interrupt(void) {
+#ifdef OT_PLATFORM_RV32
+  asm volatile("wfi");
+2000274c:       /-> 10500073            wfi
+abort():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:21
+
+noreturn void abort(void) {
+  while (true) {
+20002750:       \-- bff5                        j       2000274c <abort>
+
+20002752 <ibex_mcause_read>:
+ibex_mcause_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:11
+
+#include "sw/device/lib/base/csr.h"
+
+uint32_t ibex_mcause_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MCAUSE, &mtval);
+20002752:       34202573                csrr    a0,mcause
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:12
+  return mtval;
+20002756:       8082                    ret
+
+20002758 <ibex_mtval_read>:
+ibex_mtval_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:17
+}
+
+uint32_t ibex_mtval_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MTVAL, &mtval);
+20002758:       34302573                csrr    a0,mtval
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:18
+  return mtval;
+2000275c:       8082                    ret
+
+2000275e <ibex_mepc_read>:
+ibex_mepc_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:23
+}
+
+uint32_t ibex_mepc_read(void) {
+  uint32_t mepc;
+  CSR_READ(CSR_REG_MEPC, &mepc);
+2000275e:       34102573                csrr    a0,mepc
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:24
+  return mepc;
+20002762:       8082                    ret
+
+20002764 <base_log_internal_core>:
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:47
+ * Logs `log` and the values that follow to stdout.
+ *
+ * @param log the log data to log.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_core(const log_fields_t *log, ...) {
+20002764:              7179                     addi    sp,sp,-48
+20002766:              c606                     sw      ra,12(sp)
+20002768:              c422                     sw      s0,8(sp)
+2000276a:              c226                     sw      s1,4(sp)
+2000276c:              842a                     mv      s0,a0
+2000276e:              d646                     sw      a7,44(sp)
+20002770:              d442                     sw      a6,40(sp)
+20002772:              d23e                     sw      a5,36(sp)
+20002774:              d03a                     sw      a4,32(sp)
+20002776:              ce36                     sw      a3,28(sp)
+20002778:              cc32                     sw      a2,24(sp)
+2000277a:              ca2e                     sw      a1,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+  size_t file_name_len =
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+2000277c:              4148                     lw      a0,4(a0)
+2000277e:              80000637                 lui     a2,0x80000
+20002782:              167d                     addi    a2,a2,-1
+20002784:              4581                     li      a1,0
+20002786:              1eb010ef                 jal     ra,20004170 <memchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:50
+               log->file_name);
+2000278a:              4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+2000278c:              40d50633                 sub     a2,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/log.c:51
+  const char *base_name = memrchr(log->file_name, '/', file_name_len);
+20002790:              02f00593                 li      a1,47
+20002794:              8536                     mv      a0,a3
+20002796:              289010ef                 jal     ra,2000421e <memrchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:52
+  if (base_name == NULL) {
+2000279a:       /----- c501                     beqz    a0,200027a2 <base_log_internal_core+0x3e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:55
+    base_name = log->file_name;
+  } else {
+    ++base_name;  // Remove the final '/'.
+2000279c:       |      00150693                 addi    a3,a0,1
+200027a0:       |  /-- a011                     j       200027a4 <base_log_internal_core+0x40>
+/proc/self/cwd/sw/device/lib/runtime/log.c:53
+    base_name = log->file_name;
+200027a2:       \--|-> 4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  // A small global counter that increments with each log line. This can be
+  // useful for seeing how many times this function has been called, even if
+  // nothing was printed for some time.
+  static uint16_t global_log_counter = 0;
+
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+200027a4:          \-> 4008                     lw      a0,0(s0)
+200027a6:              458d                     li      a1,3
+stringify_severity():
+/proc/self/cwd/sw/device/lib/runtime/log.c:27
+  switch (severity) {
+200027a8:       /----- 00a5ea63                 bltu    a1,a0,200027bc <base_log_internal_core+0x58>
+200027ac:       |      00004597                 auipc   a1,0x4
+200027b0:       |      81458593                 addi    a1,a1,-2028 # 20005fc0 <test_status_set.log_fields.7+0x30>
+200027b4:       |      20b54533                 sh2add  a0,a0,a1
+200027b8:       |      410c                     lw      a1,0(a0)
+200027ba:       |  /-- a029                     j       200027c4 <base_log_internal_core+0x60>
+200027bc:       \--|-> 00004517                 auipc   a0,0x4
+200027c0:          |   80050593                 addi    a1,a0,-2048 # 20005fbc <test_status_set.log_fields.7+0x2c>
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:64
+              global_log_counter, base_name, log->line);
+200027c4:          \-> f0000497                 auipc   s1,0xf0000
+200027c8:              8d44d603                 lhu     a2,-1836(s1) # 10002098 <base_log_internal_core.global_log_counter>
+200027cc:              4418                     lw      a4,8(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+200027ce:              00003517                 auipc   a0,0x3
+200027d2:              7d650513                 addi    a0,a0,2006 # 20005fa4 <test_status_set.log_fields.7+0x14>
+200027d6:              2cbd                     jal     20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:65
+  ++global_log_counter;
+200027d8:              8d449503                 lh      a0,-1836(s1)
+200027dc:              0505                     addi    a0,a0,1
+200027de:              8ca49a23                 sh      a0,-1836(s1)
+200027e2:              0848                     addi    a0,sp,20
+/proc/self/cwd/sw/device/lib/runtime/log.c:68
+
+  va_list args;
+  va_start(args, log);
+200027e4:              c02a                     sw      a0,0(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:69
+  base_vprintf(log->format, args);
+200027e6:              4808                     lw      a0,16(s0)
+200027e8:              084c                     addi    a1,sp,20
+200027ea:              2c71                     jal     20002a86 <base_vprintf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:72
+  va_end(args);
+
+  base_printf("\r\n");
+200027ec:              00003517                 auipc   a0,0x3
+200027f0:              7c750513                 addi    a0,a0,1991 # 20005fb3 <test_status_set.log_fields.7+0x23>
+200027f4:              2485                     jal     20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:73
+}
+200027f6:              40b2                     lw      ra,12(sp)
+200027f8:              4422                     lw      s0,8(sp)
+200027fa:              4492                     lw      s1,4(sp)
+200027fc:              6145                     addi    sp,sp,48
+200027fe:              8082                     ret
+
+20002800 <base_log_internal_dv>:
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:85
+ *        be invalid at runtime, since the pointed-to data will have been
+ *        stripped from the binary.
+ * @param nargs the number of arguments passed to the format string.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_dv(const log_fields_t *log, uint32_t nargs, ...) {
+20002800:              1101                     addi    sp,sp,-32
+20002802:              ce46                     sw      a7,28(sp)
+20002804:              cc42                     sw      a6,24(sp)
+20002806:              ca3e                     sw      a5,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:86
+  mmio_region_t log_device = mmio_region_from_addr(kDeviceLogBypassUartAddress);
+20002808:              00004797                 auipc   a5,0x4
+2000280c:              abc7a783                 lw      a5,-1348(a5) # 200062c4 <kDeviceLogBypassUartAddress>
+20002810:              c83a                     sw      a4,16(sp)
+20002812:              c636                     sw      a3,12(sp)
+20002814:              c432                     sw      a2,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20002816:              c388                     sw      a0,0(a5)
+20002818:              0028                     addi    a0,sp,8
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:90
+  mmio_region_write32(log_device, 0x0, (uintptr_t)log);
+
+  va_list args;
+  va_start(args, nargs);
+2000281a:              c22a                     sw      a0,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+2000281c:       /----- c989                     beqz    a1,2000282e <base_log_internal_dv+0x2e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:92
+    mmio_region_write32(log_device, 0x0, va_arg(args, uint32_t));
+2000281e:       |  /-> 4512                     lw      a0,4(sp)
+20002820:       |  |   00450613                 addi    a2,a0,4
+20002824:       |  |   c232                     sw      a2,4(sp)
+20002826:       |  |   4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+20002828:       |  |   15fd                     addi    a1,a1,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000282a:       |  |   c388                     sw      a0,0(a5)
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+2000282c:       |  \-- f9ed                     bnez    a1,2000281e <base_log_internal_dv+0x1e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:95
+  }
+  va_end(args);
+}
+2000282e:       \----> 6105                     addi    sp,sp,32
+20002830:              8082                     ret
+
+20002832 <base_dev_null>:
+base_dev_null():
+/proc/self/cwd/sw/device/lib/runtime/print.c:57
+
+static const char kErrorNul[17] = "%<unexpected nul>";
+static const char kUnknownSpec[15] = "%<unknown spec>";
+static const char kErrorTooWide[12] = "%<bad width>";
+
+static size_t base_dev_null(void *data, const char *buf, size_t len) {
+20002832:       8532                    mv      a0,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:58
+  return len;
+20002834:       8082                    ret
+
+20002836 <get_spi_device_sink>:
+get_spi_device_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:245
+  }
+
+  return write_data_len;
+}
+
+sink_func_ptr get_spi_device_sink(void) { return &base_dev_spi_device; }
+20002836:       00000517                auipc   a0,0x0
+2000283a:       00a50513                addi    a0,a0,10 # 20002840 <base_dev_spi_device>
+2000283e:       8082                    ret
+
+20002840 <base_dev_spi_device>:
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:227
+static size_t base_dev_spi_device(void *data, const char *buf, size_t len) {
+20002840:                             715d                      addi    sp,sp,-80
+20002842:                             c686                      sw      ra,76(sp)
+20002844:                             c4a2                      sw      s0,72(sp)
+20002846:                             c2a6                      sw      s1,68(sp)
+20002848:                             c0ca                      sw      s2,64(sp)
+2000284a:                             de4e                      sw      s3,60(sp)
+2000284c:                             dc52                      sw      s4,56(sp)
+2000284e:                             da56                      sw      s5,52(sp)
+20002850:                             d85a                      sw      s6,48(sp)
+20002852:                             d65e                      sw      s7,44(sp)
+20002854:                             d462                      sw      s8,40(sp)
+20002856:                             d266                      sw      s9,36(sp)
+20002858:                             d06a                      sw      s10,32(sp)
+2000285a:                             ce6e                      sw      s11,28(sp)
+2000285c:                             c22e                      sw      a1,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+2000285e:       /-------------------- 14060963                  beqz    a2,200029b0 <base_dev_spi_device+0x170>
+20002862:       |                     8ab2                      mv      s5,a2
+20002864:       |                     8d2a                      mv      s10,a0
+20002866:       |                     4c81                      li      s9,0
+20002868:       |                     a5a5c537                  lui     a0,0xa5a5c
+2000286c:       |                     eef50993                  addi    s3,a0,-273 # a5a5beef <_non_volatile_scratch_end+0x859dbeef>
+20002870:       |                     02000493                  li      s1,32
+20002874:       |                     f0000517                  auipc   a0,0xf0000
+20002878:       |                     c42a                      sw      a0,8(sp)
+2000287a:       |                     f0000c17                  auipc   s8,0xf0000
+2000287e:       |                     7ff00b13                  li      s6,2047
+20002882:       |  /----------------> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:231
+    size_t payload_len = len - write_data_len;
+20002884:       |  |                  419a8533                  sub     a0,s5,s9
+/proc/self/cwd/sw/device/lib/runtime/print.c:232
+    if (payload_len > kSpiDeviceMaxFramePayloadSizeBytes) {
+20002888:       |  |                  7e400613                  li      a2,2020
+2000288c:       |  |                  0ac55bb3                  minu    s7,a0,a2
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:132
+  const size_t data_packet_size_bytes = ((len + 3u) & ~3u);
+20002890:       |  |                  003b8513                  addi    a0,s7,3
+20002894:       |  |                  9971                      andi    a0,a0,-4
+20002896:       |  |                  0070                      addi    a2,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:145
+    frame_header_bytes[i] = (kSpiDeviceFrameMagicNumber >> (i * 8)) & 0xff;
+20002898:       |  |              /-> 00b9d6b3                  srl     a3,s3,a1
+2000289c:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:144
+  for (size_t i = 0; i < 4; ++i) {
+200028a0:       |  |              |   05a1                      addi    a1,a1,8
+200028a2:       |  |              |   0605                      addi    a2,a2,1
+200028a4:       |  |              \-- fe959ae3                  bne     a1,s1,20002898 <base_dev_spi_device+0x58>
+200028a8:       |  |                  45a2                      lw      a1,8(sp)
+200028aa:       |  |                  8305a583                  lw      a1,-2000(a1)
+200028ae:       |  |                  4601                      li      a2,0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+200028b0:       |  |                  4a12                      lw      s4,4(sp)
+200028b2:       |  |                  9a66                      add     s4,s4,s9
+200028b4:       |  |                  0814                      addi    a3,sp,16
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:149
+    frame_header_bytes[i + 4] = (spi_device_frame_num >> (i * 8)) & 0xff;
+200028b6:       |  |              /-> 00c5d733                  srl     a4,a1,a2
+200028ba:       |  |              |   00e68023                  sb      a4,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:148
+  for (size_t i = 0; i < 4; ++i) {
+200028be:       |  |              |   0621                      addi    a2,a2,8
+200028c0:       |  |              |   0685                      addi    a3,a3,1
+200028c2:       |  |              \-- fe961ae3                  bne     a2,s1,200028b6 <base_dev_spi_device+0x76>
+200028c6:       |  |                  4581                      li      a1,0
+200028c8:       |  |                  0850                      addi    a2,sp,20
+/proc/self/cwd/sw/device/lib/runtime/print.c:153
+    frame_header_bytes[i + 8] = (len >> (i * 8)) & 0xff;
+200028ca:       |  |              /-> 00bbd6b3                  srl     a3,s7,a1
+200028ce:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:152
+  for (size_t i = 0; i < 4; ++i) {
+200028d2:       |  |              |   05a1                      addi    a1,a1,8
+200028d4:       |  |              |   0605                      addi    a2,a2,1
+200028d6:       |  |              \-- fe959ae3                  bne     a1,s1,200028ca <base_dev_spi_device+0x8a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:134
+      kSpiDeviceFrameHeaderSizeBytes + data_packet_size_bytes;
+200028da:       |  |                  00c50913                  addi    s2,a0,12 # 10002880 <__global_pointer$+0x98>
+200028de:       |  |                  01850413                  addi    s0,a0,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:158
+    uint32_t last_read_address = 0;
+200028e2:       |  |        /-------> cc02                      sw      zero,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:159
+    if (dif_spi_device_get_last_read_address(spi_device, &last_read_address) !=
+200028e4:       |  |        |         082c                      addi    a1,sp,24
+200028e6:       |  |        |         856a                      mv      a0,s10
+200028e8:       |  |        |         32d000ef                  jal     ra,20003414 <dif_spi_device_get_last_read_address>
+200028ec:       |  |  /-----|-------- e15d                      bnez    a0,20002992 <base_dev_spi_device+0x152>
+/proc/self/cwd/sw/device/lib/runtime/print.c:172
+        (kSpiDeviceReadBufferSizeBytes + last_read_address -
+200028ee:       |  |  |     |         4562                      lw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+200028f0:       |  |  |     |         82ec2d83                  lw      s11,-2002(s8) # 100020a8 <spi_device_send_frame.next_write_address>
+/proc/self/cwd/sw/device/lib/runtime/print.c:175
+    uint32_t next_read_address = ((adjusted_last_read_address + 1) & ~3u) %
+200028f4:       |  |  |     |         7f550513                  addi    a0,a0,2037
+200028f8:       |  |  |     |         7fc57513                  andi    a0,a0,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+200028fc:       |  |  |     |  /----- 00ade563                  bltu    s11,a0,20002906 <base_dev_spi_device+0xc6>
+20002900:       |  |  |     |  |      41bb05b3                  sub     a1,s6,s11
+20002904:       |  |  |     |  |  /-- a019                      j       2000290a <base_dev_spi_device+0xca>
+20002906:       |  |  |     |  \--|-> fffdc593                  not     a1,s11
+2000290a:       |  |  |     |     \-> 952e                      add     a0,a0,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:185
+  } while ((frame_size_bytes + kSpiDeviceBufferPreservedSizeBytes) >
+2000290c:       |  |  |     \-------- fc856be3                  bltu    a0,s0,200028e2 <base_dev_spi_device+0xa2>
+20002910:       |  |  |               8456                      mv      s0,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:190
+      (next_write_address + kSpiDeviceFrameHeaderSizeBytes) %
+20002912:       |  |  |               0db1                      addi    s11,s11,12
+20002914:       |  |  |               7ffdf693                  andi    a3,s11,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:192
+  size_t aligned_data_len = len & (~3u);
+20002918:       |  |  |               7fcbfa93                  andi    s5,s7,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:193
+  if (!status_ok(spi_device_send_data(spi_device, (uint8_t *)buf,
+2000291c:       |  |  |               856a                      mv      a0,s10
+2000291e:       |  |  |               85d2                      mv      a1,s4
+20002920:       |  |  |               8656                      mv      a2,s5
+20002922:       |  |  |               2785                      jal     20003082 <spi_device_send_data>
+20002924:       |  |  |  /----------- 06054963                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:199
+  if (len != aligned_data_len) {
+20002928:       |  |  |  |  /-------- 037a8e63                  beq     s5,s7,20002964 <base_dev_spi_device+0x124>
+/proc/self/cwd/sw/device/lib/runtime/print.c:200
+    uint8_t pad_bytes[4] = {0xff, 0xff, 0xff, 0xff};
+2000292c:       |  |  |  |  |         557d                      li      a0,-1
+2000292e:       |  |  |  |  |         cc2a                      sw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+20002930:       |  |  |  |  |  /----- 037af163                  bgeu    s5,s7,20002952 <base_dev_spi_device+0x112>
+20002934:       |  |  |  |  |  |      003bf513                  andi    a0,s7,3
+20002938:       |  |  |  |  |  |      015c85b3                  add     a1,s9,s5
+2000293c:       |  |  |  |  |  |      4612                      lw      a2,4(sp)
+2000293e:       |  |  |  |  |  |      95b2                      add     a1,a1,a2
+20002940:       |  |  |  |  |  |      0830                      addi    a2,sp,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:205
+      pad_bytes[i] = buf[aligned_data_len + i];
+20002942:       |  |  |  |  |  |  /-> 00058683                  lb      a3,0(a1)
+20002946:       |  |  |  |  |  |  |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+2000294a:       |  |  |  |  |  |  |   0585                      addi    a1,a1,1
+2000294c:       |  |  |  |  |  |  |   157d                      addi    a0,a0,-1
+2000294e:       |  |  |  |  |  |  |   0605                      addi    a2,a2,1
+20002950:       |  |  |  |  |  |  \-- f96d                      bnez    a0,20002942 <base_dev_spi_device+0x102>
+20002952:       |  |  |  |  |  \----> 9aee                      add     s5,s5,s11
+20002954:       |  |  |  |  |         7ffaf693                  andi    a3,s5,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:207
+    if (!status_ok(spi_device_send_data(spi_device, pad_bytes, 4,
+20002958:       |  |  |  |  |         082c                      addi    a1,sp,24
+2000295a:       |  |  |  |  |         4611                      li      a2,4
+2000295c:       |  |  |  |  |         856a                      mv      a0,s10
+2000295e:       |  |  |  |  |         2715                      jal     20003082 <spi_device_send_data>
+20002960:       |  |  |  +--|-------- 02054b63                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:216
+                                      next_write_address))) {
+20002964:       |  |  |  |  \-------> 82ec2683                  lw      a3,-2002(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:214
+  if (!status_ok(spi_device_send_data(spi_device, frame_header_bytes,
+20002968:       |  |  |  |            006c                      addi    a1,sp,12
+2000296a:       |  |  |  |            4631                      li      a2,12
+2000296c:       |  |  |  |            856a                      mv      a0,s10
+2000296e:       |  |  |  |            2f11                      jal     20003082 <spi_device_send_data>
+20002970:       |  |  |  +----------- 02054363                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+20002974:       |  |  |  |            82ec2503                  lw      a0,-2002(s8)
+20002978:       |  |  |  |            4622                      lw      a2,8(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+2000297a:       |  |  |  |            83062583                  lw      a1,-2000(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+2000297e:       |  |  |  |            954a                      add     a0,a0,s2
+20002980:       |  |  |  |            7ff57513                  andi    a0,a0,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:220
+  next_write_address =
+20002984:       |  |  |  |            82ac2723                  sw      a0,-2002(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+20002988:       |  |  |  |            0585                      addi    a1,a1,1
+2000298a:       |  |  |  |            82b62823                  sw      a1,-2000(a2)
+2000298e:       |  |  |  |            855e                      mv      a0,s7
+20002990:       |  |  |  |     /----- a021                      j       20002998 <base_dev_spi_device+0x158>
+20002992:       |  |  \--|-----|----> 4501                      li      a0,0
+20002994:       |  |     |     |  /-- a019                      j       2000299a <base_dev_spi_device+0x15a>
+20002996:       |  |     \-----|--|-> 4501                      li      a0,0
+20002998:       |  |           \--|-> 8aa2                      mv      s5,s0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+2000299a:       |  |              \-> 01754533                  xor     a0,a0,s7
+2000299e:       |  |                  00a03533                  snez    a0,a0
+200029a2:       |  |                  157d                      addi    a0,a0,-1
+200029a4:       |  |                  01757533                  and     a0,a0,s7
+200029a8:       |  |                  9caa                      add     s9,s9,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+200029aa:       |  \----------------- ed5cece3                  bltu    s9,s5,20002882 <base_dev_spi_device+0x42>
+200029ae:       |                 /-- a011                      j       200029b2 <base_dev_spi_device+0x172>
+200029b0:       \-----------------|-> 4c81                      li      s9,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:242
+  return write_data_len;
+200029b2:                         \-> 8566                      mv      a0,s9
+200029b4:                             40b6                      lw      ra,76(sp)
+200029b6:                             4426                      lw      s0,72(sp)
+200029b8:                             4496                      lw      s1,68(sp)
+200029ba:                             4906                      lw      s2,64(sp)
+200029bc:                             59f2                      lw      s3,60(sp)
+200029be:                             5a62                      lw      s4,56(sp)
+200029c0:                             5ad2                      lw      s5,52(sp)
+200029c2:                             5b42                      lw      s6,48(sp)
+200029c4:                             5bb2                      lw      s7,44(sp)
+200029c6:                             5c22                      lw      s8,40(sp)
+200029c8:                             5c92                      lw      s9,36(sp)
+200029ca:                             5d02                      lw      s10,32(sp)
+200029cc:                             4df2                      lw      s11,28(sp)
+200029ce:                             6161                      addi    sp,sp,80
+200029d0:                             8082                      ret
+
+200029d2 <get_uart_sink>:
+get_uart_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:257
+    }
+  }
+  return len;
+}
+
+sink_func_ptr get_uart_sink(void) { return &base_dev_uart; }
+200029d2:       00000517                auipc   a0,0x0
+200029d6:       00a50513                addi    a0,a0,10 # 200029dc <base_dev_uart>
+200029da:       8082                    ret
+
+200029dc <base_dev_uart>:
+base_dev_uart():
+/proc/self/cwd/sw/device/lib/runtime/print.c:247
+static size_t base_dev_uart(void *data, const char *buf, size_t len) {
+200029dc:                 1101                  addi    sp,sp,-32
+200029de:                 ce06                  sw      ra,28(sp)
+200029e0:                 cc22                  sw      s0,24(sp)
+200029e2:                 ca26                  sw      s1,20(sp)
+200029e4:                 c84a                  sw      s2,16(sp)
+200029e6:                 c64e                  sw      s3,12(sp)
+200029e8:                 8932                  mv      s2,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+200029ea:       /-------- c20d                  beqz    a2,20002a0c <base_dev_uart+0x30>
+200029ec:       |         89ae                  mv      s3,a1
+200029ee:       |         842a                  mv      s0,a0
+200029f0:       |         4481                  li      s1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:250
+    if (dif_uart_byte_send_polled(uart, (uint8_t)buf[i]) != kDifOk) {
+200029f2:       |  /----> 00998533              add     a0,s3,s1
+200029f6:       |  |      00054583              lbu     a1,0(a0)
+200029fa:       |  |      8522                  mv      a0,s0
+200029fc:       |  |      6c1000ef              jal     ra,200038bc <dif_uart_byte_send_polled>
+20002a00:       |  |  /-- e519                  bnez    a0,20002a0e <base_dev_uart+0x32>
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+20002a02:       |  |  |   0485                  addi    s1,s1,1
+20002a04:       |  \--|-- fe9917e3              bne     s2,s1,200029f2 <base_dev_uart+0x16>
+20002a08:       |     |   84ca                  mv      s1,s2
+20002a0a:       |     +-- a011                  j       20002a0e <base_dev_uart+0x32>
+20002a0c:       \-----|-> 4481                  li      s1,0
+20002a0e:             \-> 0b24d533              minu    a0,s1,s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:255
+}
+20002a12:                 40f2                  lw      ra,28(sp)
+20002a14:                 4462                  lw      s0,24(sp)
+20002a16:                 44d2                  lw      s1,20(sp)
+20002a18:                 4942                  lw      s2,16(sp)
+20002a1a:                 49b2                  lw      s3,12(sp)
+20002a1c:                 6105                  addi    sp,sp,32
+20002a1e:                 8082                  ret
+
+20002a20 <base_spi_device_stdout>:
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:261
+
+void base_spi_device_stdout(const dif_spi_device_handle_t *spi_device) {
+  // Reset the frame counter.
+  spi_device_frame_num = 0;
+20002a20:       effff597                auipc   a1,0xeffff
+20002a24:       6805a223                sw      zero,1668(a1) # 100020a4 <spi_device_frame_num>
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+20002a28:       effff597                auipc   a1,0xeffff
+20002a2c:       67458593                addi    a1,a1,1652 # 1000209c <base_stdout>
+20002a30:       c188                    sw      a0,0(a1)
+20002a32:       00000517                auipc   a0,0x0
+20002a36:       e0e50513                addi    a0,a0,-498 # 20002840 <base_dev_spi_device>
+20002a3a:       c1c8                    sw      a0,4(a1)
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:264
+  base_set_stdout((buffer_sink_t){.data = (void *)spi_device,
+                                  .sink = &base_dev_spi_device});
+}
+20002a3c:       8082                    ret
+
+20002a3e <base_uart_stdout>:
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+20002a3e:       effff597                auipc   a1,0xeffff
+20002a42:       65e58593                addi    a1,a1,1630 # 1000209c <base_stdout>
+20002a46:       c188                    sw      a0,0(a1)
+20002a48:       00000517                auipc   a0,0x0
+20002a4c:       f9450513                addi    a0,a0,-108 # 200029dc <base_dev_uart>
+20002a50:       c1c8                    sw      a0,4(a1)
+base_uart_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:269
+
+void base_uart_stdout(const dif_uart_t *uart) {
+  base_set_stdout(
+      (buffer_sink_t){.data = (void *)uart, .sink = &base_dev_uart});
+}
+20002a52:       8082                    ret
+
+20002a54 <base_printf>:
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:271
+
+size_t base_printf(const char *format, ...) {
+20002a54:       7179                    addi    sp,sp,-48
+20002a56:       c606                    sw      ra,12(sp)
+20002a58:       d646                    sw      a7,44(sp)
+20002a5a:       d442                    sw      a6,40(sp)
+20002a5c:       d23e                    sw      a5,36(sp)
+20002a5e:       d03a                    sw      a4,32(sp)
+20002a60:       ce36                    sw      a3,28(sp)
+20002a62:       cc32                    sw      a2,24(sp)
+20002a64:       ca2e                    sw      a1,20(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  va_end(args);
+  return bytes_left;
+}
+
+size_t base_vprintf(const char *format, va_list args) {
+  return base_vfprintf(base_stdout, format, args);
+20002a66:       effff597                auipc   a1,0xeffff
+20002a6a:       63658593                addi    a1,a1,1590 # 1000209c <base_stdout>
+20002a6e:       4190                    lw      a2,0(a1)
+20002a70:       41cc                    lw      a1,4(a1)
+20002a72:       872a                    mv      a4,a0
+20002a74:       0848                    addi    a0,sp,20
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:273
+  va_start(args, format);
+20002a76:       c42a                    sw      a0,8(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a78:       0854                    addi    a3,sp,20
+20002a7a:       8532                    mv      a0,a2
+20002a7c:       863a                    mv      a2,a4
+20002a7e:       200d                    jal     20002aa0 <base_vfprintf>
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:276
+  return bytes_left;
+20002a80:       40b2                    lw      ra,12(sp)
+20002a82:       6145                    addi    sp,sp,48
+20002a84:       8082                    ret
+
+20002a86 <base_vprintf>:
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a86:       effff617                auipc   a2,0xeffff
+20002a8a:       61660693                addi    a3,a2,1558 # 1000209c <base_stdout>
+20002a8e:       4290                    lw      a2,0(a3)
+20002a90:       42d4                    lw      a3,4(a3)
+20002a92:       872e                    mv      a4,a1
+20002a94:       87aa                    mv      a5,a0
+20002a96:       8532                    mv      a0,a2
+20002a98:       85b6                    mv      a1,a3
+20002a9a:       863e                    mv      a2,a5
+20002a9c:       86ba                    mv      a3,a4
+20002a9e:       a009                    j       20002aa0 <base_vfprintf>
+
+20002aa0 <base_vfprintf>:
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:733
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+    }
+  }
+}
+
+size_t base_vfprintf(buffer_sink_t out, const char *format, va_list args) {
+20002aa0:                                                                          711d                 addi    sp,sp,-96
+20002aa2:                                                                          ce86                 sw      ra,92(sp)
+20002aa4:                                                                          cca2                 sw      s0,88(sp)
+20002aa6:                                                                          caa6                 sw      s1,84(sp)
+20002aa8:                                                                          c8ca                 sw      s2,80(sp)
+20002aaa:                                                                          c6ce                 sw      s3,76(sp)
+20002aac:                                                                          c4d2                 sw      s4,72(sp)
+20002aae:                                                                          c2d6                 sw      s5,68(sp)
+20002ab0:                                                                          c0da                 sw      s6,64(sp)
+20002ab2:                                                                          de5e                 sw      s7,60(sp)
+20002ab4:                                                                          dc62                 sw      s8,56(sp)
+20002ab6:                                                                          da66                 sw      s9,52(sp)
+20002ab8:                                                                          d86a                 sw      s10,48(sp)
+20002aba:                                                                          d66e                 sw      s11,44(sp)
+20002abc:                                                                          8432                 mv      s0,a2
+20002abe:                                                                          cc36                 sw      a3,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:743
+  // NOTE: This copy is necessary on amd64 and other platforms, where
+  // `va_list` is a fixed array type (and, as such, decays to a pointer in
+  // an argument list). On PSABI RV32IMC, however, `va_list` is a `void*`, so
+  // this is a copy of the pointer, not the array.
+  va_list args_copy;
+  va_copy(args_copy, args);
+20002ac0:                                                                          ca36                 sw      a3,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+
+  size_t bytes_written = 0;
+  while (format[0] != '\0') {
+20002ac2:                                                                          00064603             lbu     a2,0(a2)
+20002ac6:       /----------------------------------------------------------------- 4a060563             beqz    a2,20002f70 <base_vfprintf+0x4d0>
+20002aca:       |                                                                  89ae                 mv      s3,a1
+20002acc:       |                                                                  892a                 mv      s2,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:734
+  if (out.sink == NULL) {
+20002ace:       |                                                              /-- e589                 bnez    a1,20002ad8 <base_vfprintf+0x38>
+20002ad0:       |                                                              |   00000517             auipc   a0,0x0
+20002ad4:       |                                                              |   d6250993             addi    s3,a0,-670 # 20002832 <base_dev_null>
+20002ad8:       |                                                              \-> 4a81                 li      s5,0
+20002ada:       |                                                                  4a01                 li      s4,0
+20002adc:       |                                                                  02500c93             li      s9,37
+20002ae0:       |                                                                  02100d13             li      s10,33
+20002ae4:       |                                                                  0f600d93             li      s11,246
+20002ae8:       |                                                                  650d                 lui     a0,0x3
+20002aea:       |                                                                  c2250513             addi    a0,a0,-990 # 2c22 <_static_critical_size+0xc3a>
+20002aee:       |                                                                  c82a                 sw      a0,16(sp)
+consume_until_percent():
+/proc/self/cwd/sw/device/lib/runtime/print.c:341
+    char c = (*format)[text_len];
+20002af0:       |           /----------------------------------------------------> 01440533             add     a0,s0,s4
+20002af4:       |           |                                                      00054483             lbu     s1,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:342
+    if (c == '\0' || c == kPercent) {
+20002af8:       |           |                                                  /-- 01948363             beq     s1,s9,20002afe <base_vfprintf+0x5e>
+20002afc:       |           |                                            /-----|-- ec91                 bnez    s1,20002b18 <base_vfprintf+0x78>
+/proc/self/cwd/sw/device/lib/runtime/print.c:343
+      if (text_len > 0) {
+20002afe:       |           |                                            |  /--\-X 000a0763             beqz    s4,20002b0c <base_vfprintf+0x6c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:344
+        *bytes_written += out.sink(out.data, *format, text_len);
+20002b02:       |           |                                            |  |      854a                 mv      a0,s2
+20002b04:       |           |                                            |  |      85a2                 mv      a1,s0
+20002b06:       |           |                                            |  |      8652                 mv      a2,s4
+20002b08:       |           |                                            |  |      9982                 jalr    s3
+20002b0a:       |           |                                            |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:346
+      *format += text_len;
+20002b0c:       |           |                                            |  \----> 9452                 add     s0,s0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:347
+      return c != '\0';
+20002b0e:       |           |                                            |         00903bb3             snez    s7,s1
+20002b12:       |           |                                            |  /----- 01949663             bne     s1,s9,20002b1e <base_vfprintf+0x7e>
+20002b16:       |           |                                            |  |  /-- a029                 j       20002b20 <base_vfprintf+0x80>
+/proc/self/cwd/sw/device/lib/runtime/print.c:349
+    ++text_len;
+20002b18:       |           |                                            \--|--|-> 0a05                 addi    s4,s4,1
+20002b1a:       |           |                                               |  +-- 01948363             beq     s1,s9,20002b20 <base_vfprintf+0x80>
+20002b1e:       |           +-----------------------------------------------\--|-X f8e9                 bnez    s1,20002af0 <base_vfprintf+0x50>
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:747
+    if (!consume_until_percent(out, &format, &bytes_written)) {
+20002b20:       |           |                                                  \-> 001bf513             andi    a0,s7,1
+20002b24:       |  /--------|----------------------------------------------------- 44050763             beqz    a0,20002f72 <base_vfprintf+0x4d2>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002b28:       |  |        |                                                      00144a03             lbu     s4,1(s0)
+20002b2c:       |  |        |                                               /----- 01aa1763             bne     s4,s10,20002b3a <base_vfprintf+0x9a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002b30:       |  |        |                                               |      00244583             lbu     a1,2(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:384
+    ++(*format);
+20002b34:       |  |        |                                               |      0409                 addi    s0,s0,2
+20002b36:       |  |        |                                               |      4b05                 li      s6,1
+20002b38:       |  |        |                                               |  /-- a021                 j       20002b40 <base_vfprintf+0xa0>
+20002b3a:       |  |        |                                               \--|-> 4b01                 li      s6,0
+20002b3c:       |  |        |                                                  |   0405                 addi    s0,s0,1
+20002b3e:       |  |        |                                                  |   85d2                 mv      a1,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b40:       |  |  /-----|--------------------------------------------------\-X 40058f63             beqz    a1,20002f5e <base_vfprintf+0x4be>
+20002b44:       |  |  |     |                                                      4481                 li      s1,0
+20002b46:       |  |  |     |                                                      4c01                 li      s8,0
+20002b48:       |  |  |     |                                                      4501                 li      a0,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002b4a:       |  |  |     |                                                      0405                 addi    s0,s0,1
+20002b4c:       |  |  |     |                                         /----------> fc658613             addi    a2,a1,-58
+20002b50:       |  |  |     |                                         |            0ff67613             andi    a2,a2,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b54:       |  |  |     |                                         |            0ff5f593             andi    a1,a1,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002b58:       |  |  |     |                                         |  /-------- 03b66c63             bltu    a2,s11,20002b90 <base_vfprintf+0xf0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:403
+    if (spec->padding == 0) {
+20002b5c:       |  |  |     |                                         |  |         0ff57613             andi    a2,a0,255
+20002b60:       |  |  |     |                                         |  |  /----- ee09                 bnez    a2,20002b7a <base_vfprintf+0xda>
+20002b62:       |  |  |     |                                         |  |  |      02000c13             li      s8,32
+20002b66:       |  |  |     |                                         |  |  |      03000613             li      a2,48
+20002b6a:       |  |  |     |                                         |  |  |      02000513             li      a0,32
+/proc/self/cwd/sw/device/lib/runtime/print.c:404
+      if (c == '0') {
+20002b6e:       |  |  |     |                                         |  |  +----- 00c59663             bne     a1,a2,20002b7a <base_vfprintf+0xda>
+20002b72:       |  |  |     |                                         |  |  |      03000513             li      a0,48
+20002b76:       |  |  |     |                                         |  |  |      8c32                 mv      s8,a2
+20002b78:       |  |  |     |                                         |  |  |  /-- a039                 j       20002b86 <base_vfprintf+0xe6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:412
+    spec->width += (c - '0');
+20002b7a:       |  |  |     |                                         |  |  \--|-> 2094c633             sh2add  a2,s1,s1
+20002b7e:       |  |  |     |                                         |  |     |   20b625b3             sh1add  a1,a2,a1
+20002b82:       |  |  |     |                                         |  |     |   fd058493             addi    s1,a1,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002b86:       |  |  |     |                                         |  |     \-> 00044583             lbu     a1,0(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b8a:       |  |  |     |                                         |  |         0405                 addi    s0,s0,1
+20002b8c:       |  |  |     |                                         \--|-------- f1e1                 bnez    a1,20002b4c <base_vfprintf+0xac>
+20002b8e:       |  |  +-----|--------------------------------------------|-------- aec1                 j       20002f5e <base_vfprintf+0x4be>
+/proc/self/cwd/sw/device/lib/runtime/print.c:416
+  if ((spec->width == 0 && spec->padding != 0) || spec->width > 32) {
+20002b90:       |  |  |     |                                            \-----/-X c481                 beqz    s1,20002b98 <base_vfprintf+0xf8>
+20002b92:       |  |  |     |                                               /--|-- 01a4e763             bltu    s1,s10,20002ba0 <base_vfprintf+0x100>
+20002b96:       |  |  |  /--|-----------------------------------------------|--|-- aef5                 j       20002f92 <base_vfprintf+0x4f2>
+20002b98:       |  |  |  |  |                                               |  \-> 0ff57513             andi    a0,a0,255
+20002b9c:       |  |  |  +--|-----------------------------------------------|----- 3e051b63             bnez    a0,20002f92 <base_vfprintf+0x4f2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002ba0:       |  |  |  |  |                                               \----> 05700513             li      a0,87
+20002ba4:       |  |  |  |  |                                               /----- 04b55d63             bge     a0,a1,20002bfe <base_vfprintf+0x15e>
+20002ba8:       |  |  |  |  |                                               |      fa858513             addi    a0,a1,-88
+20002bac:       |  |  |  |  |        /--------------------------------------|----- 2cad6563             bltu    s10,a0,20002e76 <base_vfprintf+0x3d6>
+20002bb0:       |  |  |  |  |        |                                      |      00003597             auipc   a1,0x3
+20002bb4:       |  |  |  |  |        |                                      |      42058593             addi    a1,a1,1056 # 20005fd0 <test_status_set.log_fields.7+0x40>
+20002bb8:       |  |  |  |  |        |                                      |      20b54533             sh2add  a0,a0,a1
+20002bbc:       |  |  |  |  |        |                                      |      4108                 lw      a0,0(a0)
+20002bbe:       |  |  |  |  |        |                                      |      8502                 jr      a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:609
+      if (spec.is_nonstd) {
+20002bc0:       |  |  |  |  |        +--------------------------------------|----- 2baa0b63             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:612
+      uint32_t value = va_arg(*args, uint32_t);
+20002bc4:       |  |  |  |  |        |                                      |      4552                 lw      a0,20(sp)
+20002bc6:       |  |  |  |  |        |                                      |      00450593             addi    a1,a0,4
+20002bca:       |  |  |  |  |        |                                      |      ca2e                 sw      a1,20(sp)
+20002bcc:       |  |  |  |  |        |                                      |      00052b03             lw      s6,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:613
+      if (((int32_t)value) < 0) {
+20002bd0:       |  |  |  |  |        |                                      |  /-- 000b5c63             bgez    s6,20002be8 <base_vfprintf+0x148>
+/proc/self/cwd/sw/device/lib/runtime/print.c:614
+        *bytes_written += out.sink(out.data, "-", 1);
+20002bd4:       |  |  |  |  |        |                                      |  |   00003517             auipc   a0,0x3
+20002bd8:       |  |  |  |  |        |                                      |  |   4b450593             addi    a1,a0,1204 # 20006088 <test_status_set.log_fields.7+0xf8>
+20002bdc:       |  |  |  |  |        |                                      |  |   4605                 li      a2,1
+20002bde:       |  |  |  |  |        |                                      |  |   854a                 mv      a0,s2
+20002be0:       |  |  |  |  |        |                                      |  |   9982                 jalr    s3
+20002be2:       |  |  |  |  |        |                                      |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:615
+        value = -value;
+20002be4:       |  |  |  |  |        |                                      |  |   41600b33             neg     s6,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:618
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002be8:       |  |  |  |  |        |                                      |  \-> 0ffc7713             andi    a4,s8,255
+20002bec:       |  |  |  |  |        |                                      |      00003517             auipc   a0,0x3
+20002bf0:       |  |  |  |  |        |                                      |      4b550813             addi    a6,a0,1205 # 200060a1 <kDigitsLow>
+20002bf4:       |  |  |  |  |        |                                      |      47a9                 li      a5,10
+20002bf6:       |  |  |  |  |        |                                      |      854a                 mv      a0,s2
+20002bf8:       |  |  |  |  |        |                                      |      85ce                 mv      a1,s3
+20002bfa:       |  |  |  |  |        |                                      |      865a                 mv      a2,s6
+20002bfc:       |  |  |  |  |        |              /-----------------------|----- a489                 j       20002e3e <base_vfprintf+0x39e>
+20002bfe:       |  |  |  |  |        |           /--|-----------------------\----X 27958a63             beq     a1,s9,20002e72 <base_vfprintf+0x3d2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002c02:       |  |  |  |  |        |           |  |                              04300513             li      a0,67
+20002c06:       |  |  |  |  |        |     /-----|--|----------------------------- 28a58663             beq     a1,a0,20002e92 <base_vfprintf+0x3f2>
+20002c0a:       |  |  |  |  |        |     |     |  |                              04800513             li      a0,72
+20002c0e:       |  |  |  |  |        |     |     |  |                          /-- 02a58563             beq     a1,a0,20002c38 <base_vfprintf+0x198>
+20002c12:       |  |  |  |  |        +-----|-----|--|--------------------------|-- a495                 j       20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:662
+      if (spec.is_nonstd) {
+20002c14:       |  |  |  |  |        |     |     |  |                          +-- 03aa1263             bne     s4,s10,20002c38 <base_vfprintf+0x198>
+/proc/self/cwd/sw/device/lib/runtime/print.c:663
+        size_t len = va_arg(*args, size_t);
+20002c18:       |  |  |  |  |        |     |     |  |                          |   4552                 lw      a0,20(sp)
+20002c1a:       |  |  |  |  |        |     |     |  |                          |   00450593             addi    a1,a0,4
+20002c1e:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002c20:       |  |  |  |  |        |     |     |  |                          |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:664
+        char *value = va_arg(*args, char *);
+20002c22:       |  |  |  |  |        |     |     |  |                          |   00850593             addi    a1,a0,8
+20002c26:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002c28:       |  |  |  |  |        |     |     |  |                          |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:665
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002c2a:       |  |  |  |  |        |     |     |  |                          |   0ffc7793             andi    a5,s8,255
+20002c2e:       |  |  |  |  |        |     |     |  |                          |   00003517             auipc   a0,0x3
+20002c32:       |  |  |  |  |        |     |     |  |                          |   4a050893             addi    a7,a0,1184 # 200060ce <kDigitsHigh>
+20002c36:       |  |  |  |  |        |     |     |  |                       /--|-- a2cd                 j       20002e18 <base_vfprintf+0x378>
+/proc/self/cwd/sw/device/lib/runtime/print.c:671
+      uint32_t value = va_arg(*args, uint32_t);
+20002c38:       |  |  |  |  |        |     |     |  |                       |  \-> 4552                 lw      a0,20(sp)
+20002c3a:       |  |  |  |  |        |     |     |  |                       |      00450593             addi    a1,a0,4
+20002c3e:       |  |  |  |  |        |     |     |  |                       |      ca2e                 sw      a1,20(sp)
+20002c40:       |  |  |  |  |        |     |     |  |                       |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:673
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsHigh);
+20002c42:       |  |  |  |  |        |     |     |  |                       |      0ffc7713             andi    a4,s8,255
+20002c46:       |  |  |  |  |        |     |     |  |                       |      00003517             auipc   a0,0x3
+20002c4a:       |  |  |  |  |        |     |     |  |                       |      48850813             addi    a6,a0,1160 # 200060ce <kDigitsHigh>
+20002c4e:       |  |  |  |  |        |     |     |  |                    /--|----- a2ed                 j       20002e38 <base_vfprintf+0x398>
+/proc/self/cwd/sw/device/lib/runtime/print.c:687
+      if (!spec.is_nonstd) {
+20002c50:       |  |  |  |  |        +-----|-----|--|--------------------|--|----- 23aa1363             bne     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:690
+      size_t len = va_arg(*args, size_t);
+20002c54:       |  |  |  |  |        |     |     |  |                    |  |      4552                 lw      a0,20(sp)
+20002c56:       |  |  |  |  |        |     |     |  |                    |  |      00450593             addi    a1,a0,4
+20002c5a:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c5c:       |  |  |  |  |        |     |     |  |                    |  |      4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:691
+      char *value = va_arg(*args, char *);
+20002c5e:       |  |  |  |  |        |     |     |  |                    |  |      00850593             addi    a1,a0,8
+20002c62:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c64:       |  |  |  |  |        |     |     |  |                    |  |      4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:692
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002c66:       |  |  |  |  |        |     |     |  |                    |  |      0ffc7793             andi    a5,s8,255
+20002c6a:       |  |  |  |  |        |     |     |  |                    |  |      00003517             auipc   a0,0x3
+20002c6e:       |  |  |  |  |        |     |     |  |                    |  |      46450893             addi    a7,a0,1124 # 200060ce <kDigitsHigh>
+20002c72:       |  |  |  |  |        |     |     |  |        /-----------|--|----- aad5                 j       20002e66 <base_vfprintf+0x3c6>
+20002c74:       |  |  |  |  |        |     |     |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c76:       |  |  |  |  |        |     |     |  |        |           |  |      00450593             addi    a1,a0,4
+20002c7a:       |  |  |  |  |        |     |     |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c7c:       |  |  |  |  |        |     |     |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:706
+      if (spec.is_nonstd) {
+20002c7e:       |  |  |  |  |        |     |  /--|--|--------|-----------|--|----- 27aa1b63             bne     s4,s10,20002ef4 <base_vfprintf+0x454>
+/proc/self/cwd/sw/device/lib/runtime/print.c:709
+        if (va_arg(*args, int) != 0) {
+20002c82:       |  |  |  |  |  /-----|-----|--|--|--|--------|-----------|--|----- 2c060863             beqz    a2,20002f52 <base_vfprintf+0x4b2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:710
+          *bytes_written += out.sink(out.data, "true", 4);
+20002c86:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002c8a:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      40750593             addi    a1,a0,1031 # 2000608d <test_status_set.log_fields.7+0xfd>
+20002c8e:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      4611                 li      a2,4
+20002c90:       |  |  |  |  |  |  /--|-----|--|--|--|--------|-----------|--|----- aac5                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:570
+      if (spec.is_nonstd) {
+20002c92:       |  |  |  |  |  |  |  +-----|--|--|--|--------|-----------|--|----- 1faa0263             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:573
+      char value = (char)va_arg(*args, uint32_t);
+20002c96:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c98:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002c9c:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c9e:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4108                 lw      a0,0(a0)
+20002ca0:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      02a10223             sb      a0,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:574
+      *bytes_written += out.sink(out.data, &value, 1);
+20002ca4:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      104c                 addi    a1,sp,36
+20002ca6:       |  |  |  |  |  |  |  |  /--|--|--|--|--------|-----------|--|----- a465                 j       20002f4e <base_vfprintf+0x4ae>
+/proc/self/cwd/sw/device/lib/runtime/print.c:622
+      if (spec.is_nonstd) {
+20002ca8:       |  |  |  |  |  |  |  +--|--|--|--|--|--------|-----------|--|----- 1daa0763             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:625
+      uint32_t value = va_arg(*args, uint32_t);
+20002cac:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002cae:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002cb2:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002cb4:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:627
+          write_digits(out, value, spec.width, spec.padding, 8, kDigitsLow);
+20002cb6:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      0ffc7713             andi    a4,s8,255
+20002cba:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002cbe:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      3e750813             addi    a6,a0,999 # 200060a1 <kDigitsLow>
+20002cc2:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      47a1                 li      a5,8
+20002cc4:       |  |  |  |  |  |  |  |  |  |  |  |  |  /-----|-----------|--|----- aa9d                 j       20002e3a <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:631
+      if (spec.is_nonstd) {
+20002cc6:       |  |  |  |  |  |  |  +--|--|--|--|--|--|-----|-----------|--|----- 1baa0863             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002cca:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002cce:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      3c050593             addi    a1,a0,960 # 2000608a <test_status_set.log_fields.7+0xfa>
+20002cd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4609                 li      a2,2
+20002cd4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002cd6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:641
+      uintptr_t value = va_arg(*args, uintptr_t);
+20002cd8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      45d2                 lw      a1,20(sp)
+20002cda:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00458613             addi    a2,a1,4
+20002cde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      ca32                 sw      a2,20(sp)
+20002ce0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4190                 lw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002ce2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:643
+          write_digits(out, value, sizeof(uintptr_t) * 2, '0', 16, kDigitsLow);
+20002ce4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002ce8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      3bd50813             addi    a6,a0,957 # 200060a1 <kDigitsLow>
+20002cec:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      46a1                 li      a3,8
+20002cee:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      03000713             li      a4,48
+20002cf2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      47c1                 li      a5,16
+20002cf4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002cf6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      85ce                 mv      a1,s3
+20002cf8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      2155                 jal     2000319c <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:642
+      *bytes_written +=
+20002cfa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+20002cfc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-----------|--|----- a269                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:722
+      status_t value = va_arg(*args, status_t);
+20002cfe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4552                 lw      a0,20(sp)
+20002d00:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00450593             addi    a1,a0,4
+20002d04:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      ca2e                 sw      a1,20(sp)
+20002d06:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4108                 lw      a0,0(a0)
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:467
+  char mod[] = {'"', 0, 0, 0, '"', ','};
+20002d08:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45c2                 lw      a1,16(sp)
+20002d0a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02b11423             sh      a1,40(sp)
+20002d0e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02200593             li      a1,34
+20002d12:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      d22e                 sw      a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002d14:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      086c                 addi    a1,sp,28
+20002d16:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      1010                 addi    a2,sp,32
+20002d18:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02510693             addi    a3,sp,37
+20002d1c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      23e9                 jal     200032e6 <status_extract>
+/proc/self/cwd/sw/device/lib/runtime/print.c:473
+  const char *end = start;
+20002d1e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002d20:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      c62a                 sw      a0,12(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002d22:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fff58493             addi    s1,a1,-1
+20002d26:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  /-> 0005c503             lbu     a0,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:475
+    end++;
+20002d2a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0585                 addi    a1,a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002d2c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0485                 addi    s1,s1,1
+20002d2e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  \-- fd65                 bnez    a0,20002d26 <base_vfprintf+0x286>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002d30:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fdfa0513             addi    a0,s4,-33
+20002d34:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00153613             seqz    a2,a0
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002d38:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      0606                 slli    a2,a2,0x1
+20002d3a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002d3e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      35e50593             addi    a1,a0,862 # 20006098 <test_status_set.log_fields.7+0x108>
+20002d42:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d44:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d46:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002d48:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8a2a                 mv      s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d4a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      40b48633             sub     a2,s1,a1
+20002d4e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d50:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+20002d52:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8c2a                 mv      s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002d54:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002d58:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      34550593             addi    a1,a0,837 # 20006099 <test_status_set.log_fields.7+0x109>
+20002d5c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d5e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      865a                 mv      a2,s6
+20002d60:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d62:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9a2a                 add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d64:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00002517             auipc   a0,0x2
+20002d68:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      b4450593             addi    a1,a0,-1212 # 200048a8 <test_main.log_fields.21+0x204>
+20002d6c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4605                 li      a2,1
+20002d6e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d70:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002d72:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9552                 add     a0,a0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d74:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:483
+  if (err) {
+20002d76:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4532                 lw      a0,12(sp)
+20002d78:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--------|--|----- 18050663             beqz    a0,20002f04 <base_vfprintf+0x464>
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d7c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d80:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      31f50593             addi    a1,a0,799 # 2000609b <test_status_set.log_fields.7+0x10b>
+20002d84:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002d86:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d88:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+20002d8a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      84aa                 mv      s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002d8c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      104c                 addi    a1,sp,36
+20002d8e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4619                 li      a2,6
+20002d90:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d92:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d94:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      5602                 lw      a2,32(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d96:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d98:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d9c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      30950813             addi    a6,a0,777 # 200060a1 <kDigitsLow>
+20002da0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      47a9                 li      a5,10
+20002da2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002da4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      85ce                 mv      a1,s3
+20002da6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4681                 li      a3,0
+20002da8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4701                 li      a4,0
+20002daa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      2ecd                 jal     2000319c <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002dac:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:488
+    len += out.sink(out.data, "]", 1);
+20002dae:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002db2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      2ef50593             addi    a1,a0,751 # 2000609d <test_status_set.log_fields.7+0x10d>
+20002db6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002db8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002dba:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002dbc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9526                 add     a0,a0,s1
+20002dbe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     /--|--|----- aab1                 j       20002f1a <base_vfprintf+0x47a>
+20002dc0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      4552                 lw      a0,20(sp)
+20002dc2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      00450593             addi    a1,a0,4
+20002dc6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      ca2e                 sw      a1,20(sp)
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:593
+      if (spec.is_nonstd) {
+20002dc8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|--|--|----- 17aa1563             bne     s4,s10,20002f32 <base_vfprintf+0x492>
+/proc/self/cwd/sw/device/lib/runtime/print.c:595
+        len = va_arg(*args, size_t);
+20002dcc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002dce:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00850593             addi    a1,a0,8
+20002dd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002dd4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      414c                 lw      a1,4(a0)
+20002dd6:       |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|--|----- a06d                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:697
+      if (spec.is_nonstd) {
+20002dd8:       |  |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|----- 09aa0f63             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:700
+      uint32_t value = va_arg(*args, uint32_t);
+20002ddc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4552                 lw      a0,20(sp)
+20002dde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002de2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002de4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:702
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002de6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002dea:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002dee:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      2b750813             addi    a6,a0,695 # 200060a1 <kDigitsLow>
+20002df2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      47a9                 li      a5,10
+20002df4:       |  |  |  |  |  |  |  |  |  |  |  |  |  +--|--|--|--|--|--|--|----- a099                 j       20002e3a <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:647
+      if (spec.is_nonstd) {
+20002df6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /-- 03aa1663             bne     s4,s10,20002e22 <base_vfprintf+0x382>
+/proc/self/cwd/sw/device/lib/runtime/print.c:648
+        size_t len = va_arg(*args, size_t);
+20002dfa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4552                 lw      a0,20(sp)
+20002dfc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00450593             addi    a1,a0,4
+20002e00:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002e02:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:649
+        char *value = va_arg(*args, char *);
+20002e04:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00850593             addi    a1,a0,8
+20002e08:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002e0a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:650
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002e0c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   0ffc7793             andi    a5,s8,255
+20002e10:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002e14:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   29150893             addi    a7,a0,657 # 200060a1 <kDigitsLow>
+20002e18:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|-> 4805                 li      a6,1
+20002e1a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   854a                 mv      a0,s2
+20002e1c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   85ce                 mv      a1,s3
+20002e1e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   8726                 mv      a4,s1
+20002e20:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-- a0b9                 j       20002e6e <base_vfprintf+0x3ce>
+/proc/self/cwd/sw/device/lib/runtime/print.c:656
+      uint32_t value = va_arg(*args, uint32_t);
+20002e22:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \-> 4552                 lw      a0,20(sp)
+20002e24:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002e28:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002e2a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:658
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsLow);
+20002e2c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002e30:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002e34:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      27150813             addi    a6,a0,625 # 200060a1 <kDigitsLow>
+20002e38:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|----> 47c1                 li      a5,16
+20002e3a:       |  |  |  |  |  |  |  |  |  |  |  |  |  >--|--|--|--|--|-----|----> 854a                 mv      a0,s2
+20002e3c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |      85ce                 mv      a1,s3
+20002e3e:       |  |  |  |  |  |  |  |  |  |  |  |  \--|--|--|--|--|--|-----|----> 86a6                 mv      a3,s1
+20002e40:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |      2eb1                 jal     2000319c <write_digits>
+20002e42:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  /-- a089                 j       20002e84 <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:677
+      if (!spec.is_nonstd) {
+20002e44:       |  |  |  |  |  |  |  +--|--|--|--|-----|--|--|--|--|--|-----|--|-- 03aa1963             bne     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:680
+      size_t len = va_arg(*args, size_t);
+20002e48:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4552                 lw      a0,20(sp)
+20002e4a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00450593             addi    a1,a0,4
+20002e4e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002e50:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:681
+      char *value = va_arg(*args, char *);
+20002e52:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00850593             addi    a1,a0,8
+20002e56:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002e58:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:682
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002e5a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   0ffc7793             andi    a5,s8,255
+20002e5e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00003517             auipc   a0,0x3
+20002e62:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   24350893             addi    a7,a0,579 # 200060a1 <kDigitsLow>
+20002e66:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  \--|--|--|-----|--|-> 854a                 mv      a0,s2
+20002e68:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   85ce                 mv      a1,s3
+20002e6a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   8726                 mv      a4,s1
+20002e6c:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   4801                 li      a6,0
+20002e6e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     \--|-> 2a05                 jal     20002f9e <hex_dump>
+20002e70:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |        +-- a811                 j       20002e84 <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:563
+      if (spec.is_nonstd) {
+20002e72:       |  |  |  |  |  |  |  |  |  |  |  \-----|--|-----|--|--|--/-----|-X 0daa1a63             bne     s4,s10,20002f46 <base_vfprintf+0x4a6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:728
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+20002e76:       |  |  |  |  |  |  |  \--|--|--|--------|--|-----|--|--|--|-----|-> 00003517             auipc   a0,0x3
+20002e7a:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   26850593             addi    a1,a0,616 # 200060de <kUnknownSpec>
+20002e7e:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   463d                 li      a2,15
+20002e80:       |  |  |  |  |  |  >-----|--|--|--------|--|-----|--|--|--|-----|-> 854a                 mv      a0,s2
+20002e82:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   9982                 jalr    s3
+20002e84:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     \-> 9aaa                 add     s5,s5,a0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+  while (format[0] != '\0') {
+20002e86:       |  |  |  |  |  |  |     |  |  |        |  >-----|--|--|--|-------> 00044503             lbu     a0,0(s0)
+20002e8a:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |         4a01                 li      s4,0
+20002e8c:       |  |  |  |  \--|--|-----|--|--|--------|--|-----|--|--|--|-------- c60512e3             bnez    a0,20002af0 <base_vfprintf+0x50>
+20002e90:       |  +--|--|-----|--|-----|--|--|--------|--|-----|--|--|--|-------- a0cd                 j       20002f72 <base_vfprintf+0x4d2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:578
+      uint32_t value = va_arg(*args, uint32_t);
+20002e92:       |  |  |  |     |  |     |  \--|--------|--|-----|--|--|--|-------> 4552                 lw      a0,20(sp)
+20002e94:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         00450593             addi    a1,a0,4
+20002e98:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         ca2e                 sw      a1,20(sp)
+20002e9a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4104                 lw      s1,0(a0)
+20002e9c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4a11                 li      s4,4
+/proc/self/cwd/sw/device/lib/runtime/print.c:580
+        uint8_t ch = (uint8_t)value;
+20002e9e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  /----> 02910223             sb      s1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:581
+        if (ch >= 32 && ch < 127) {
+20002ea2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      0ff4f513             andi    a0,s1,255
+20002ea6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1501                 addi    a0,a0,-32
+20002ea8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      104c                 addi    a1,sp,36
+20002eaa:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      05f00613             li      a2,95
+20002eae:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  /-- 02c56a63             bltu    a0,a2,20002ee2 <base_vfprintf+0x442>
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002eb2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002eb6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   1d350593             addi    a1,a0,467 # 20006085 <test_status_set.log_fields.7+0xf5>
+20002eba:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4609                 li      a2,2
+20002ebc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002ebe:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002ec0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002ec4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+20002ec6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   8191                 srli    a1,a1,0x4
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002ec8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002ecc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   1d950b13             addi    s6,a0,473 # 200060a1 <kDigitsLow>
+20002ed0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002ed2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4605                 li      a2,1
+20002ed4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002ed6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002ed8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002edc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002ede:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   89bd                 andi    a1,a1,15
+20002ee0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002ee2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  \-> 4605                 li      a2,1
+20002ee4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      854a                 mv      a0,s2
+20002ee6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9982                 jalr    s3
+20002ee8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:579
+      for (size_t i = 0; i < sizeof(uint32_t); ++i, value >>= 8) {
+20002eea:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1a7d                 addi    s4,s4,-1
+20002eec:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      80a1                 srli    s1,s1,0x8
+20002eee:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  \----- fa0a18e3             bnez    s4,20002e9e <base_vfprintf+0x3fe>
+20002ef2:       |  |  |  |     |  |     |     |        |  +-----|--|--|--|-------- bf51                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:718
+          write_digits(out, value, spec.width, spec.padding, 2, kDigitsLow);
+20002ef4:       |  |  |  |     |  |     |     \--------|--|-----|--|--|--|-------> 0ffc7713             andi    a4,s8,255
+20002ef8:       |  |  |  |     |  |     |              |  |     |  |  |  |         00003517             auipc   a0,0x3
+20002efc:       |  |  |  |     |  |     |              |  |     |  |  |  |         1a950813             addi    a6,a0,425 # 200060a1 <kDigitsLow>
+20002f00:       |  |  |  |     |  |     |              |  |     |  |  |  |         4789                 li      a5,2
+20002f02:       |  |  |  |     |  |     |              \--|-----|--|--|--|-------- bf25                 j       20002e3a <base_vfprintf+0x39a>
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:491
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002f04:       |  |  |  |     |  |     |                 |     \--|--|--|-------> 5602                 lw      a2,32(sp)
+20002f06:       |  |  |  |     |  |     |                 |        |  |  |         00003517             auipc   a0,0x3
+20002f0a:       |  |  |  |     |  |     |                 |        |  |  |         19b50813             addi    a6,a0,411 # 200060a1 <kDigitsLow>
+20002f0e:       |  |  |  |     |  |     |                 |        |  |  |         47a9                 li      a5,10
+20002f10:       |  |  |  |     |  |     |                 |        |  |  |         854a                 mv      a0,s2
+20002f12:       |  |  |  |     |  |     |                 |        |  |  |         85ce                 mv      a1,s3
+20002f14:       |  |  |  |     |  |     |                 |        |  |  |         4681                 li      a3,0
+20002f16:       |  |  |  |     |  |     |                 |        |  |  |         4701                 li      a4,0
+20002f18:       |  |  |  |     |  |     |                 |        |  |  |         2451                 jal     2000319c <write_digits>
+20002f1a:       |  |  |  |     |  |     |                 |        |  \--|-------> 9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:493
+  len += out.sink(out.data, "}", as_json ? 1 : 0);
+20002f1c:       |  |  |  |     |  |     |                 |        |     |         00003517             auipc   a0,0x3
+20002f20:       |  |  |  |     |  |     |                 |        |     |         18350593             addi    a1,a0,387 # 2000609f <test_status_set.log_fields.7+0x10f>
+20002f24:       |  |  |  |     |  |     |                 |        |     |         854a                 mv      a0,s2
+20002f26:       |  |  |  |     |  |     |                 |        |     |         865a                 mv      a2,s6
+20002f28:       |  |  |  |     |  |     |                 |        |     |         9982                 jalr    s3
+20002f2a:       |  |  |  |     |  |     |                 |        |     |         9556                 add     a0,a0,s5
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:723
+      *bytes_written += write_status(out, value, spec.is_nonstd);
+20002f2c:       |  |  |  |     |  |     |                 |        |     |         00ac0ab3             add     s5,s8,a0
+20002f30:       |  |  |  |     |  |     |                 \--------|-----|-------- bf99                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002f32:       |  |  |  |     |  |     |                          \-----|-------> 410c                 lw      a1,0(a0)
+20002f34:       |  |  |  |     |  |     |                                |         4601                 li      a2,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002f36:       |  |  |  |     |  |     |                                |     /-> 00c58533             add     a0,a1,a2
+20002f3a:       |  |  |  |     |  |     |                                |     |   00054503             lbu     a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:601
+        ++len;
+20002f3e:       |  |  |  |     |  |     |                                |     |   0605                 addi    a2,a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002f40:       |  |  |  |     |  |     |                                |     \-- f97d                 bnez    a0,20002f36 <base_vfprintf+0x496>
+/proc/self/cwd/sw/device/lib/runtime/print.c:604
+      *bytes_written += out.sink(out.data, value, len);
+20002f42:       |  |  |  |     |  |     |                                |         167d                 addi    a2,a2,-1
+20002f44:       |  |  |  |     |  +-----|--------------------------------|-------- bf35                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:566
+      *bytes_written += out.sink(out.data, "%", 1);
+20002f46:       |  |  |  |     |  |     |                                \-------> 00003517             auipc   a0,0x3
+20002f4a:       |  |  |  |     |  |     |                                          13d50593             addi    a1,a0,317 # 20006083 <test_status_set.log_fields.7+0xf3>
+20002f4e:       |  |  |  |     |  |     \----------------------------------------> 4605                 li      a2,1
+20002f50:       |  |  |  |     |  +----------------------------------------------- bf05                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:712
+          *bytes_written += out.sink(out.data, "false", 5);
+20002f52:       |  |  |  |     \--|----------------------------------------------> 00003517             auipc   a0,0x3
+20002f56:       |  |  |  |        |                                                14050593             addi    a1,a0,320 # 20006092 <test_status_set.log_fields.7+0x102>
+20002f5a:       |  |  |  |        |                                                4615                 li      a2,5
+20002f5c:       |  |  |  |        \----------------------------------------------- b715                 j       20002e80 <base_vfprintf+0x3e0>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:397
+      *bytes_written += out.sink(out.data, kErrorNul, sizeof(kErrorNul));
+20002f5e:       |  |  \--|-------------------------------------------------------> 00003517             auipc   a0,0x3
+20002f62:       |  |     |                                                         15350593             addi    a1,a0,339 # 200060b1 <kErrorNul>
+20002f66:       |  |     |                                                         4645                 li      a2,17
+20002f68:       |  |     |                                                     /-> 854a                 mv      a0,s2
+20002f6a:       |  |     |                                                     |   9982                 jalr    s3
+20002f6c:       |  |     |                                                     |   9aaa                 add     s5,s5,a0
+20002f6e:       |  +-----|-----------------------------------------------------|-- a011                 j       20002f72 <base_vfprintf+0x4d2>
+20002f70:       \--|-----|-----------------------------------------------------|-> 4a81                 li      s5,0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:759
+
+    process_specifier(out, spec, &bytes_written, &args_copy);
+  }
+
+  va_end(args_copy);
+  return bytes_written;
+20002f72:          \-----|-----------------------------------------------------|-> 8556                 mv      a0,s5
+20002f74:                |                                                     |   40f6                 lw      ra,92(sp)
+20002f76:                |                                                     |   4466                 lw      s0,88(sp)
+20002f78:                |                                                     |   44d6                 lw      s1,84(sp)
+20002f7a:                |                                                     |   4946                 lw      s2,80(sp)
+20002f7c:                |                                                     |   49b6                 lw      s3,76(sp)
+20002f7e:                |                                                     |   4a26                 lw      s4,72(sp)
+20002f80:                |                                                     |   4a96                 lw      s5,68(sp)
+20002f82:                |                                                     |   4b06                 lw      s6,64(sp)
+20002f84:                |                                                     |   5bf2                 lw      s7,60(sp)
+20002f86:                |                                                     |   5c62                 lw      s8,56(sp)
+20002f88:                |                                                     |   5cd2                 lw      s9,52(sp)
+20002f8a:                |                                                     |   5d42                 lw      s10,48(sp)
+20002f8c:                |                                                     |   5db2                 lw      s11,44(sp)
+20002f8e:                |                                                     |   6125                 addi    sp,sp,96
+20002f90:                |                                                     |   8082                 ret
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:417
+    *bytes_written += out.sink(out.data, kErrorTooWide, sizeof(kErrorTooWide));
+20002f92:                \-----------------------------------------------------|-> 00003517             auipc   a0,0x3
+20002f96:                                                                      |   13050593             addi    a1,a0,304 # 200060c2 <kErrorTooWide>
+20002f9a:                                                                      |   4631                 li      a2,12
+20002f9c:                                                                      \-- b7f1                 j       20002f68 <base_vfprintf+0x4c8>
+
+20002f9e <hex_dump>:
+hex_dump():
+/proc/self/cwd/sw/device/lib/runtime/print.c:513
+                       const char *glyphs) {
+20002f9e:                 711d                  addi    sp,sp,-96
+20002fa0:                 ce86                  sw      ra,92(sp)
+20002fa2:                 cca2                  sw      s0,88(sp)
+20002fa4:                 caa6                  sw      s1,84(sp)
+20002fa6:                 c8ca                  sw      s2,80(sp)
+20002fa8:                 c6ce                  sw      s3,76(sp)
+20002faa:                 c4d2                  sw      s4,72(sp)
+20002fac:                 c2d6                  sw      s5,68(sp)
+20002fae:                 c0da                  sw      s6,64(sp)
+20002fb0:                 de5e                  sw      s7,60(sp)
+20002fb2:                 dc62                  sw      s8,56(sp)
+20002fb4:                 da66                  sw      s9,52(sp)
+20002fb6:                 d86a                  sw      s10,48(sp)
+20002fb8:                 d66e                  sw      s11,44(sp)
+20002fba:                 8bc6                  mv      s7,a7
+20002fbc:                 8a42                  mv      s4,a6
+20002fbe:                 8b36                  mv      s6,a3
+20002fc0:                 8ab2                  mv      s5,a2
+20002fc2:                 892e                  mv      s2,a1
+20002fc4:                 89aa                  mv      s3,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:517
+  if (len < width) {
+20002fc6:          /----- 02e6fa63              bgeu    a3,a4,20002ffa <hex_dump+0x5c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:518
+    width -= len;
+20002fca:          |      41670433              sub     s0,a4,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:519
+    memset(buf, padding, sizeof(buf));
+20002fce:          |      0068                  addi    a0,sp,12
+20002fd0:          |      02000613              li      a2,32
+20002fd4:          |      02000c13              li      s8,32
+20002fd8:          |      85be                  mv      a1,a5
+20002fda:          |      138010ef              jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002fde:          +----- cc11                  beqz    s0,20002ffa <hex_dump+0x5c>
+20002fe0:          |      4d81                  li      s11,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:521
+      size_t to_write = width > ARRAYSIZE(buf) ? 32 : width;
+20002fe2:          |  /-> 0b8454b3              minu    s1,s0,s8
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002fe6:          |  |   006c                  addi    a1,sp,12
+20002fe8:          |  |   854e                  mv      a0,s3
+20002fea:          |  |   8626                  mv      a2,s1
+20002fec:          |  |   9902                  jalr    s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:523
+      width -= to_write;
+20002fee:          |  |   8c05                  sub     s0,s0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002ff0:          |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002ff2:          |  \-- f865                  bnez    s0,20002fe2 <hex_dump+0x44>
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20002ff4:          |  /-- 000b1663              bnez    s6,20003000 <hex_dump+0x62>
+20002ff8:       /--|--|-- a0ad                  j       20003062 <hex_dump+0xc4>
+20002ffa:       |  \--|-> 4d81                  li      s11,0
+20002ffc:       +-----|-- 060b0363              beqz    s6,20003062 <hex_dump+0xc4>
+20003000:       |     \-> 4481                  li      s1,0
+20003002:       |         4601                  li      a2,0
+20003004:       |         1b7d                  addi    s6,s6,-1
+20003006:       |         00c10c13              addi    s8,sp,12
+2000300a:       |         02000c93              li      s9,32
+2000300e:       |         5d7d                  li      s10,-1
+20003010:       |  /----> 855a                  mv      a0,s6
+20003012:       |  |  /-- 000a1363              bnez    s4,20003018 <hex_dump+0x7a>
+20003016:       |  |  |   8526                  mv      a0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:529
+    buf[buffered] = glyphs[(bytes[idx] >> 4) & 0xf];
+20003018:       |  |  \-> 9556                  add     a0,a0,s5
+2000301a:       |  |      00054503              lbu     a0,0(a0)
+2000301e:       |  |      00455593              srli    a1,a0,0x4
+20003022:       |  |      95de                  add     a1,a1,s7
+20003024:       |  |      00058583              lb      a1,0(a1)
+20003028:       |  |      00cc06b3              add     a3,s8,a2
+2000302c:       |  |      00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+20003030:       |  |      893d                  andi    a0,a0,15
+20003032:       |  |      955e                  add     a0,a0,s7
+20003034:       |  |      00050503              lb      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:531
+    buffered += 2;
+20003038:       |  |      0609                  addi    a2,a2,2
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+2000303a:       |  |      00a680a3              sb      a0,1(a3)
+2000303e:       |  |  /-- 01961963              bne     a2,s9,20003050 <hex_dump+0xb2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:534
+      bytes_written += out.sink(out.data, buf, buffered);
+20003042:       |  |  |   006c                  addi    a1,sp,12
+20003044:       |  |  |   02000613              li      a2,32
+20003048:       |  |  |   854e                  mv      a0,s3
+2000304a:       |  |  |   9902                  jalr    s2
+2000304c:       |  |  |   4601                  li      a2,0
+2000304e:       |  |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20003050:       |  |  \-> 1b7d                  addi    s6,s6,-1
+20003052:       |  |      0485                  addi    s1,s1,1
+20003054:       |  \----- fbab1ee3              bne     s6,s10,20003010 <hex_dump+0x72>
+/proc/self/cwd/sw/device/lib/runtime/print.c:539
+  if (buffered != 0) {
+20003058:       +-------- c609                  beqz    a2,20003062 <hex_dump+0xc4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:540
+    bytes_written += out.sink(out.data, buf, buffered);
+2000305a:       |         006c                  addi    a1,sp,12
+2000305c:       |         854e                  mv      a0,s3
+2000305e:       |         9902                  jalr    s2
+20003060:       |         9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:542
+  return bytes_written;
+20003062:       \-------> 856e                  mv      a0,s11
+20003064:                 40f6                  lw      ra,92(sp)
+20003066:                 4466                  lw      s0,88(sp)
+20003068:                 44d6                  lw      s1,84(sp)
+2000306a:                 4946                  lw      s2,80(sp)
+2000306c:                 49b6                  lw      s3,76(sp)
+2000306e:                 4a26                  lw      s4,72(sp)
+20003070:                 4a96                  lw      s5,68(sp)
+20003072:                 4b06                  lw      s6,64(sp)
+20003074:                 5bf2                  lw      s7,60(sp)
+20003076:                 5c62                  lw      s8,56(sp)
+20003078:                 5cd2                  lw      s9,52(sp)
+2000307a:                 5d42                  lw      s10,48(sp)
+2000307c:                 5db2                  lw      s11,44(sp)
+2000307e:                 6125                  addi    sp,sp,96
+20003080:                 8082                  ret
+
+20003082 <spi_device_send_data>:
+spi_device_send_data():
+/proc/self/cwd/sw/device/lib/runtime/print.c:87
+                                     size_t address) {
+20003082:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:88
+  if (len == 0) {
+20003084:                       d606                    sw      ra,44(sp)
+20003086:                       d422                    sw      s0,40(sp)
+20003088:                       d226                    sw      s1,36(sp)
+2000308a:                       d04a                    sw      s2,32(sp)
+2000308c:                       ce4e                    sw      s3,28(sp)
+2000308e:                       cc52                    sw      s4,24(sp)
+20003090:                       ca56                    sw      s5,20(sp)
+20003092:                       c85a                    sw      s6,16(sp)
+20003094:       /-------------- c245                    beqz    a2,20003134 <spi_device_send_data+0xb2>
+20003096:       |               84b2                    mv      s1,a2
+20003098:       |               8a2e                    mv      s4,a1
+2000309a:       |               89aa                    mv      s3,a0
+2000309c:       |               28b01513                bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/print.c:92
+  size_t space_to_end_of_buffer = kSpiDeviceReadBufferSizeBytes - address;
+200030a0:       |               40d50b33                sub     s6,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/print.c:94
+      space_to_end_of_buffer < len ? space_to_end_of_buffer : len;
+200030a4:       |               0acb5ab3                minu    s5,s6,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+200030a8:       |               854e                    mv      a0,s3
+200030aa:       |               4581                    li      a1,0
+200030ac:       |               8636                    mv      a2,a3
+200030ae:       |               86d6                    mv      a3,s5
+200030b0:       |               8752                    mv      a4,s4
+200030b2:       |               2bad                    jal     2000362c <dif_spi_device_write_flash_buffer>
+200030b4:       |               c62a                    sw      a0,12(sp)
+200030b6:       |               0028                    addi    a0,sp,8
+200030b8:       |               006c                    addi    a1,sp,12
+200030ba:       |               4611                    li      a2,4
+200030bc:       |               7d5000ef                jal     ra,20004090 <memcpy>
+200030c0:       |               4522                    lw      a0,8(sp)
+200030c2:       |               00003597                auipc   a1,0x3
+200030c6:       |               02e5a903                lw      s2,46(a1) # 200060f0 <MODULE_ID>
+200030ca:       |               00153593                seqz    a1,a0
+200030ce:       |               15fd                    addi    a1,a1,-1
+200030d0:       |               0625f693                andi    a3,a1,98
+200030d4:       |               00003597                auipc   a1,0x3
+200030d8:       |               f9158613                addi    a2,a1,-111 # 20006065 <test_status_set.log_fields.7+0xd5>
+200030dc:       |               85ca                    mv      a1,s2
+200030de:       |               2a3d                    jal     2000321c <status_create>
+200030e0:       |  /----------- 06054e63                bltz    a0,2000315c <spi_device_send_data+0xda>
+/proc/self/cwd/sw/device/lib/runtime/print.c:101
+  if (first_part_size < len) {
+200030e4:       |  |        /-- 029b7e63                bgeu    s6,s1,20003120 <spi_device_send_data+0x9e>
+/proc/self/cwd/sw/device/lib/runtime/print.c:102
+    size_t second_part_size = len - first_part_size;
+200030e8:       |  |        |   415486b3                sub     a3,s1,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+200030ec:       |  |        |   015a0733                add     a4,s4,s5
+200030f0:       |  |        |   854e                    mv      a0,s3
+200030f2:       |  |        |   4581                    li      a1,0
+200030f4:       |  |        |   4601                    li      a2,0
+200030f6:       |  |        |   2b1d                    jal     2000362c <dif_spi_device_write_flash_buffer>
+200030f8:       |  |        |   c62a                    sw      a0,12(sp)
+200030fa:       |  |        |   0028                    addi    a0,sp,8
+200030fc:       |  |        |   006c                    addi    a1,sp,12
+200030fe:       |  |        |   4611                    li      a2,4
+20003100:       |  |        |   791000ef                jal     ra,20004090 <memcpy>
+20003104:       |  |        |   4522                    lw      a0,8(sp)
+20003106:       |  |        |   00153593                seqz    a1,a0
+2000310a:       |  |        |   15fd                    addi    a1,a1,-1
+2000310c:       |  |        |   0695f693                andi    a3,a1,105
+20003110:       |  |        |   00003597                auipc   a1,0x3
+20003114:       |  |        |   f5558613                addi    a2,a1,-171 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003118:       |  |        |   85ca                    mv      a1,s2
+2000311a:       |  |        |   2209                    jal     2000321c <status_create>
+2000311c:       |  |     /--|-- 04054963                bltz    a0,2000316e <spi_device_send_data+0xec>
+/proc/self/cwd/sw/device/lib/runtime/print.c:108
+  return OK_STATUS();
+20003120:       |  |     |  \-> 00003517                auipc   a0,0x3
+20003124:       |  |     |      f4550613                addi    a2,a0,-187 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003128:       |  |     |      4501                    li      a0,0
+2000312a:       |  |     |      85ca                    mv      a1,s2
+2000312c:       |  |     |      4681                    li      a3,0
+2000312e:       |  |     |      20fd                    jal     2000321c <status_create>
+20003130:       |  |     |      842a                    mv      s0,a0
+20003132:       |  |  /--|----- a891                    j       20003186 <spi_device_send_data+0x104>
+/proc/self/cwd/sw/device/lib/runtime/print.c:89
+    return OK_STATUS();
+20003134:       \--|--|--|----> 00003517                auipc   a0,0x3
+20003138:          |  |  |      fbc52583                lw      a1,-68(a0) # 200060f0 <MODULE_ID>
+2000313c:          |  |  |      00003517                auipc   a0,0x3
+20003140:          |  |  |      f2950613                addi    a2,a0,-215 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003144:          |  |  |      4501                    li      a0,0
+20003146:          |  |  |      4681                    li      a3,0
+20003148:          |  |  |      50b2                    lw      ra,44(sp)
+2000314a:          |  |  |      5422                    lw      s0,40(sp)
+2000314c:          |  |  |      5492                    lw      s1,36(sp)
+2000314e:          |  |  |      5902                    lw      s2,32(sp)
+20003150:          |  |  |      49f2                    lw      s3,28(sp)
+20003152:          |  |  |      4a62                    lw      s4,24(sp)
+20003154:          |  |  |      4ad2                    lw      s5,20(sp)
+20003156:          |  |  |      4b42                    lw      s6,16(sp)
+20003158:          |  |  |      6145                    addi    sp,sp,48
+2000315a:          |  |  |      a0c9                    j       2000321c <status_create>
+2000315c:          \--|--|----> 842a                    mv      s0,a0
+2000315e:             |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+20003160:             |  |      00003597                auipc   a1,0x3
+20003164:             |  |      f0558613                addi    a2,a1,-251 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003168:             |  |      06200693                li      a3,98
+2000316c:             |  |  /-- a809                    j       2000317e <spi_device_send_data+0xfc>
+2000316e:             |  \--|-> 842a                    mv      s0,a0
+20003170:             |     |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+20003172:             |     |   00003597                auipc   a1,0x3
+20003176:             |     |   ef358613                addi    a2,a1,-269 # 20006065 <test_status_set.log_fields.7+0xd5>
+2000317a:             |     |   06900693                li      a3,105
+2000317e:             |     \-> 85ca                    mv      a1,s2
+20003180:             |         2871                    jal     2000321c <status_create>
+20003182:             |         981fd0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/runtime/print.c:109
+}
+20003186:             \-------> 8522                    mv      a0,s0
+20003188:                       50b2                    lw      ra,44(sp)
+2000318a:                       5422                    lw      s0,40(sp)
+2000318c:                       5492                    lw      s1,36(sp)
+2000318e:                       5902                    lw      s2,32(sp)
+20003190:                       49f2                    lw      s3,28(sp)
+20003192:                       4a62                    lw      s4,24(sp)
+20003194:                       4ad2                    lw      s5,20(sp)
+20003196:                       4b42                    lw      s6,16(sp)
+20003198:                       6145                    addi    sp,sp,48
+2000319a:                       8082                    ret
+
+2000319c <write_digits>:
+write_digits():
+/proc/self/cwd/sw/device/lib/runtime/print.c:439
+                           char padding, uint32_t base, const char *glyphs) {
+2000319c:                       7179                    addi    sp,sp,-48
+2000319e:                       d606                    sw      ra,44(sp)
+200031a0:                       88ae                    mv      a7,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:446
+  if (value == 0) {
+200031a2:       /-------------- ce0d                    beqz    a2,200031dc <write_digits+0x40>
+200031a4:       |               4e01                    li      t3,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+200031a6:       |               02b10293                addi    t0,sp,43
+200031aa:       |           /-> 8332                    mv      t1,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:452
+    value /= base;
+200031ac:       |           |   02f65633                divu    a2,a2,a5
+200031b0:       |           |   02f603b3                mul     t2,a2,a5
+200031b4:       |           |   006805b3                add     a1,a6,t1
+/proc/self/cwd/sw/device/lib/runtime/print.c:453
+    buffer[kWordBits - 1 - len] = glyphs[digit];
+200031b8:       |           |   407585b3                sub     a1,a1,t2
+200031bc:       |           |   00058383                lb      t2,0(a1)
+200031c0:       |           |   01c285b3                add     a1,t0,t3
+200031c4:       |           |   00758023                sb      t2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+200031c8:       |           |   1e7d                    addi    t3,t3,-1
+200031ca:       |           \-- fef370e3                bgeu    t1,a5,200031aa <write_digits+0xe>
+/proc/self/cwd/sw/device/lib/runtime/print.c:456
+  width = width == 0 ? 1 : width;
+200031ce:       |               41c00633                neg     a2,t3
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+200031d2:       |        /----- ea99                    bnez    a3,200031e8 <write_digits+0x4c>
+200031d4:       |        |  /-> 4585                    li      a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+200031d6:       |     /--|--|-- 00b66f63                bltu    a2,a1,200031f4 <write_digits+0x58>
+200031da:       |  /--|--|--|-- a80d                    j       2000320c <write_digits+0x70>
+/proc/self/cwd/sw/device/lib/runtime/print.c:447
+    buffer[kWordBits - 1] = glyphs[0];
+200031dc:       \--|--|--|--|-> 00080583                lb      a1,0(a6)
+200031e0:          |  |  |  |   02b105a3                sb      a1,43(sp)
+200031e4:          |  |  |  |   4605                    li      a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+200031e6:          |  |  |  \-- d6fd                    beqz    a3,200031d4 <write_digits+0x38>
+200031e8:          |  |  \----> 02000593                li      a1,32
+200031ec:          |  |         0ab6d5b3                minu    a1,a3,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+200031f0:          +--|-------- 00b67e63                bgeu    a2,a1,2000320c <write_digits+0x70>
+200031f4:          |  \-------> 40c586b3                sub     a3,a1,a2
+200031f8:          |            007c                    addi    a5,sp,12
+200031fa:          |            40c78633                sub     a2,a5,a2
+200031fe:          |            067d                    addi    a2,a2,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:459
+    buffer[kWordBits - len - 1] = padding;
+20003200:          |        /-> 00e60023                sb      a4,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+20003204:          |        |   16fd                    addi    a3,a3,-1
+20003206:          |        |   167d                    addi    a2,a2,-1
+20003208:          |        \-- fee5                    bnez    a3,20003200 <write_digits+0x64>
+2000320a:          |            862e                    mv      a2,a1
+2000320c:          \----------> 006c                    addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:462
+  return out.sink(out.data, buffer + (kWordBits - len), len);
+2000320e:                       8d91                    sub     a1,a1,a2
+20003210:                       02058593                addi    a1,a1,32
+20003214:                       9882                    jalr    a7
+/proc/self/cwd/sw/device/lib/runtime/print.c:463
+}
+20003216:                       50b2                    lw      ra,44(sp)
+20003218:                       6145                    addi    sp,sp,48
+2000321a:                       8082                    ret
+
+2000321c <status_create>:
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:26
+    --f;
+  return f;
+}
+
+status_t status_create(absl_status_t code, uint32_t module_id, const char *file,
+                       int32_t arg) {
+2000321c:                          8836                 mv      a6,a3
+/proc/self/cwd/sw/device/lib/base/status.c:27
+  if (code == kOk) {
+2000321e:                /-------- c121                 beqz    a0,2000325e <status_create+0x42>
+/proc/self/cwd/sw/device/lib/base/status.c:48
+   *  +---+-------+-------+-------+-------------+-------+
+   *
+   * The sign bit is set on all not-Ok statuses, thus proviging a covenient
+   * overloaded return value from functions that may return an error.
+   */
+  if (module_id == 0) {
+20003220:       /--------|-------- e9cd                 bnez    a1,200032d2 <status_create+0xb6>
+20003222:       |     /--|-------> 8732                 mv      a4,a2
+basename():
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+20003224:       |     |  |     /-> 00074583             lbu     a1,0(a4)
+/proc/self/cwd/sw/device/lib/base/status.c:18
+    ++f;
+20003228:       |     |  |     |   0705                 addi    a4,a4,1
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+2000322a:       |     |  |     \-- fded                 bnez    a1,20003224 <status_create+0x8>
+2000322c:       |     |  |         05c00793             li      a5,92
+20003230:       |     |  |         02f00893             li      a7,47
+20003234:       |     |  |     /-> 85ba                 mv      a1,a4
+/proc/self/cwd/sw/device/lib/base/status.c:20
+  while (f > file && f[-1] != '/' && f[-1] != '\\')
+20003236:       |     |  |     |   177d                 addi    a4,a4,-1
+20003238:       |     |  |  /--|-- 00e67863             bgeu    a2,a4,20003248 <status_create+0x2c>
+2000323c:       |     |  |  |  |   ffe5c683             lbu     a3,-2(a1)
+20003240:       |     |  |  +--|-- 00f68463             beq     a3,a5,20003248 <status_create+0x2c>
+20003244:       |     |  |  |  \-- ff1698e3             bne     a3,a7,20003234 <status_create+0x18>
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    // First three characters of the filename.
+    const char *f = basename(file);
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+20003248:       |     |  |  \----> fff5c603             lbu     a2,-1(a1)
+2000324c:       |     |  |         0e067693             andi    a3,a2,224
+20003250:       |     |  |         04000713             li      a4,64
+20003254:       |     |  |     /-- 00e69b63             bne     a3,a4,2000326a <status_create+0x4e>
+20003258:       |     |  |     |   fc060613             addi    a2,a2,-64
+2000325c:       |     |  |  /--|-- a839                 j       2000327a <status_create+0x5e>
+/proc/self/cwd/sw/device/lib/base/status.c:28
+    if (arg >= 0) {
+2000325e:       |  /--|--\--|--|-X 08085263             bgez    a6,200032e2 <status_create+0xc6>
+20003262:       |  |  |     |  |   02100813             li      a6,33
+20003266:       +--|--|-----|--|-- e5b5                 bnez    a1,200032d2 <status_create+0xb6>
+20003268:       |  |  \-----|--|-- bf6d                 j       20003222 <status_create+0x6>
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+2000326a:       |  |        |  \-> fa060613             addi    a2,a2,-96
+2000326e:       |  |        |      0ff67693             andi    a3,a2,255
+20003272:       |  |        |      476d                 li      a4,27
+20003274:       |  |        +----- 00e6e363             bltu    a3,a4,2000327a <status_create+0x5e>
+20003278:       |  |        |      467d                 li      a2,31
+2000327a:       |  |        \----> 0005c683             lbu     a3,0(a1)
+2000327e:       |  |               0e06f713             andi    a4,a3,224
+20003282:       |  |               04000793             li      a5,64
+20003286:       |  |               0642                 slli    a2,a2,0x10
+20003288:       |  |           /-- 00f71563             bne     a4,a5,20003292 <status_create+0x76>
+2000328c:       |  |           |   fc068713             addi    a4,a3,-64
+20003290:       |  |        /--|-- a809                 j       200032a2 <status_create+0x86>
+20003292:       |  |        |  \-> fa068713             addi    a4,a3,-96
+20003296:       |  |        |      0ff77693             andi    a3,a4,255
+2000329a:       |  |        |      47ed                 li      a5,27
+2000329c:       |  |        +----- 00f6e363             bltu    a3,a5,200032a2 <status_create+0x86>
+200032a0:       |  |        |      477d                 li      a4,31
+200032a2:       |  |        \----> 0015c683             lbu     a3,1(a1)
+200032a6:       |  |               01571593             slli    a1,a4,0x15
+200032aa:       |  |               0e06f713             andi    a4,a3,224
+200032ae:       |  |               04000793             li      a5,64
+200032b2:       |  |               8dd1                 or      a1,a1,a2
+200032b4:       |  |           /-- 00f71563             bne     a4,a5,200032be <status_create+0xa2>
+200032b8:       |  |           |   fc068613             addi    a2,a3,-64
+200032bc:       |  |        /--|-- a809                 j       200032ce <status_create+0xb2>
+200032be:       |  |        |  \-> fa068613             addi    a2,a3,-96
+200032c2:       |  |        |      0ff67693             andi    a3,a2,255
+200032c6:       |  |        |      476d                 li      a4,27
+200032c8:       |  |        +----- 00e6e363             bltu    a3,a4,200032ce <status_create+0xb2>
+200032cc:       |  |        |      467d                 li      a2,31
+200032ce:       |  |        \----> 066a                 slli    a2,a2,0x1a
+200032d0:       |  |               8dd1                 or      a1,a1,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200032d2:       \--|-------------> 897d                 andi    a0,a0,31
+200032d4:          |               0856                 slli    a6,a6,0x15
+200032d6:          |               01085613             srli    a2,a6,0x10
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:57
+  }
+  // At this point, the module_id is already packed into the correct bitfield.
+  return (status_t){
+      .value = (int32_t)(module_id |
+                         bitfield_bit32_write(0, STATUS_BIT_ERROR, true) |
+                         bitfield_field32_write(0, STATUS_FIELD_CODE, code) |
+200032da:          |               8d4d                 or      a0,a0,a1
+200032dc:          |               8d51                 or      a0,a0,a2
+200032de:          |               29f51813             bseti   a6,a0,0x1f
+/proc/self/cwd/sw/device/lib/base/status.c:60
+                         bitfield_field32_write(0, STATUS_FIELD_ARG,
+                                                (uint32_t)arg))};
+}
+200032e2:          \-------------> 8542                 mv      a0,a6
+200032e4:                          8082                 ret
+
+200032e6 <status_extract>:
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200032e6:              00052713                 slti    a4,a0,0
+200032ea:              00174713                 xori    a4,a4,1
+200032ee:              01f57813                 andi    a6,a0,31
+200032f2:              00183793                 seqz    a5,a6
+200032f6:              00f768b3                 or      a7,a4,a5
+200032fa:              02000793                 li      a5,32
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:103
+    "ErrorError",
+};
+
+bool status_extract(status_t s, const char **code, int32_t *arg, char *mod_id) {
+  size_t err = (size_t)status_err(s);
+  if (s.value < 0 && err == 0) {
+200032fe:          /-- 00089363                 bnez    a7,20003304 <status_extract+0x1e>
+20003302:          |   87c2                     mv      a5,a6
+20003304:          \-> 177d                     addi    a4,a4,-1
+20003306:              8f7d                     and     a4,a4,a5
+/proc/self/cwd/sw/device/lib/base/status.c:106
+    err = sizeof(status_codes) / sizeof(status_codes[0]) - 1;
+  }
+  *code = status_codes[err];
+20003308:              effff797                 auipc   a5,0xeffff
+2000330c:              ce078793                 addi    a5,a5,-800 # 10001fe8 <status_codes>
+20003310:              20f747b3                 sh2add  a5,a4,a5
+20003314:              439c                     lw      a5,0(a5)
+20003316:              c19c                     sw      a5,0(a1)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+20003318:       /----- cb15                     beqz    a4,2000334c <status_extract+0x66>
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+2000331a:       |      01051593                 slli    a1,a0,0x10
+2000331e:       |      81d5                     srli    a1,a1,0x15
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:108
+    *arg = (int32_t)bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_ARG);
+20003320:       |      c20c                     sw      a1,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:111
+    uint32_t module_id =
+        bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_MODULE_ID);
+    *mod_id++ = '@' + ((module_id >> 0) & 0x1F);
+20003322:       |      00b51593                 slli    a1,a0,0xb
+20003326:       |      81ed                     srli    a1,a1,0x1b
+20003328:       |      04058593                 addi    a1,a1,64
+2000332c:       |      00b68023                 sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:112
+    *mod_id++ = '@' + ((module_id >> 5) & 0x1F);
+20003330:       |      00651593                 slli    a1,a0,0x6
+20003334:       |      81ed                     srli    a1,a1,0x1b
+20003336:       |      04058593                 addi    a1,a1,64
+2000333a:       |      00b680a3                 sb      a1,1(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:113
+    *mod_id++ = '@' + ((module_id >> 10) & 0x1F);
+2000333e:       |      0506                     slli    a0,a0,0x1
+20003340:       |      816d                     srli    a0,a0,0x1b
+20003342:       |      04050513                 addi    a0,a0,64
+20003346:       |      00a68123                 sb      a0,2(a3)
+2000334a:       |  /-- a011                     j       2000334e <status_extract+0x68>
+/proc/self/cwd/sw/device/lib/base/status.c:116
+    return true;
+  } else {
+    *arg = s.value;
+2000334c:       \--|-> c208                     sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+2000334e:          \-> 00e03533                 snez    a0,a4
+/proc/self/cwd/sw/device/lib/base/status.c:119
+    return false;
+  }
+}
+20003352:              8082                     ret
+
+20003354 <dif_spi_device_init>:
+dif_spi_device_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:19
+#include "spi_device_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_init(mmio_region_t base_addr,
+                                 dif_spi_device_t *spi_device) {
+  if (spi_device == NULL) {
+20003354:       /----- c581                     beqz    a1,2000335c <dif_spi_device_init+0x8>
+20003356:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:23
+    return kDifBadArg;
+  }
+
+  spi_device->base_addr = base_addr;
+20003358:       |      c188                     sw      a0,0(a1)
+2000335a:       |  /-- a011                     j       2000335e <dif_spi_device_init+0xa>
+2000335c:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:26
+
+  return kDifOk;
+}
+2000335e:          \-> 8532                     mv      a0,a2
+20003360:              8082                     ret
+
+20003362 <dif_spi_device_irq_is_pending>:
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:139
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_is_pending(const dif_spi_device_t *spi_device,
+                                           dif_spi_device_irq_t irq,
+                                           bool *is_pending) {
+  if (spi_device == NULL || is_pending == NULL) {
+20003362:           00153693            seqz    a3,a0
+20003366:           00163713            seqz    a4,a2
+2000336a:           8ed9                        or      a3,a3,a4
+2000336c:           0085b713            sltiu   a4,a1,8
+20003370:           00174713            xori    a4,a4,1
+20003374:           8f55                        or      a4,a4,a3
+20003376:           468d                        li      a3,3
+20003378:       /-- eb01                        bnez    a4,20003388 <dif_spi_device_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:148
+  bitfield_bit32_index_t index;
+  if (!spi_device_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+2000337a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000337c:       |   4108                        lw      a0,0(a0)
+2000337e:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+20003380:       |   48b55533            bext    a0,a0,a1
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:151
+      spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+20003384:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:154
+
+  return kDifOk;
+}
+20003388:       \-> 8536                        mv      a0,a3
+2000338a:           8082                        ret
+
+2000338c <dif_spi_device_irq_acknowledge>:
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:173
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_acknowledge(const dif_spi_device_t *spi_device,
+                                            dif_spi_device_irq_t irq) {
+  if (spi_device == NULL) {
+2000338c:           00a03633            snez    a2,a0
+20003390:           0085b693            sltiu   a3,a1,8
+20003394:           8ef1                        and     a3,a3,a2
+20003396:           460d                        li      a2,3
+20003398:       /-- c691                        beqz    a3,200033a4 <dif_spi_device_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:184
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(spi_device->base_addr,
+2000339a:       |   4108                        lw      a0,0(a0)
+2000339c:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+2000339e:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200033a2:       |   c10c                        sw      a1,0(a0)
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:189
+                      (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET,
+                      intr_state_reg);
+
+  return kDifOk;
+}
+200033a4:       \-> 8532                        mv      a0,a2
+200033a6:           8082                        ret
+
+200033a8 <dif_spi_device_init_handle>:
+dif_spi_device_init_handle():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:77
+  return -1u;
+}
+
+dif_result_t dif_spi_device_init_handle(mmio_region_t base_addr,
+                                        dif_spi_device_handle_t *spi) {
+  if (spi == NULL) {
+200033a8:       /-- c191                        beqz    a1,200033ac <dif_spi_device_init_handle+0x4>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:80
+    return kDifBadArg;
+  }
+  return dif_spi_device_init(base_addr, &spi->dev);
+200033aa:       |   b76d                        j       20003354 <dif_spi_device_init>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:81
+}
+200033ac:       \-> 450d                        li      a0,3
+200033ae:           8082                        ret
+
+200033b0 <dif_spi_device_configure>:
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:84
+
+dif_result_t dif_spi_device_configure(dif_spi_device_handle_t *spi,
+                                      dif_spi_device_config_t config) {
+200033b0:           460d                        li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:85
+  if (spi == NULL) {
+200033b2:       /-- c129                        beqz    a0,200033f4 <dif_spi_device_configure+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:89
+    return kDifBadArg;
+  }
+
+  uint32_t device_mode = extract_mode_from_config(config);
+200033b4:       |   4594                        lw      a3,8(a1)
+200033b6:       |   4709                        li      a4,2
+extract_mode_from_config():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:62
+  switch (config.device_mode) {
+200033b8:       +-- 02d76e63            bltu    a4,a3,200033f4 <dif_spi_device_configure+0x44>
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:94
+  if (device_mode == -1u) {
+    return kDifBadArg;
+  }
+
+  uint32_t device_config = build_control_word(config);
+200033bc:       |   4190                        lw      a2,0(a1)
+200033be:       |   41d8                        lw      a4,4(a1)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:49
+                             config.tx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033c0:       |   167d                        addi    a2,a2,-1
+200033c2:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200033c6:       |   060a                        slli    a2,a2,0x2
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033c8:       |   177d                        addi    a4,a4,-1
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:95
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CFG_REG_OFFSET,
+200033ca:       |   411c                        lw      a5,0(a0)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033cc:       |   00173713            seqz    a4,a4
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200033d0:       |   070e                        slli    a4,a4,0x3
+200033d2:       |   8e59                        or      a2,a2,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200033d4:       |   cbd0                        sw      a2,20(a5)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:99
+                      device_config);
+
+  uint32_t control =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET);
+200033d6:       |   4110                        lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200033d8:       |   4a18                        lw      a4,16(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200033da:       |   fcf77713            andi    a4,a4,-49
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200033de:       |   06fa                        slli    a3,a3,0x1e
+200033e0:       |   82e9                        srli    a3,a3,0x1a
+200033e2:       |   8ed9                        or      a3,a3,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200033e4:       |   ca14                        sw      a3,16(a2)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:106
+  control = bitfield_field32_write(control, SPI_DEVICE_CONTROL_MODE_FIELD,
+                                   device_mode);
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET,
+                      control);
+
+  spi->config = config;
+200033e6:       |   4590                        lw      a2,8(a1)
+200033e8:       |   c550                        sw      a2,12(a0)
+200033ea:       |   41d0                        lw      a2,4(a1)
+200033ec:       |   c510                        sw      a2,8(a0)
+200033ee:       |   418c                        lw      a1,0(a1)
+200033f0:       |   4601                        li      a2,0
+200033f2:       |   c14c                        sw      a1,4(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:108
+  return kDifOk;
+}
+200033f4:       \-> 8532                        mv      a0,a2
+200033f6:           8082                        ret
+
+200033f8 <dif_spi_device_get_4b_address_mode>:
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:205
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_4b_address_mode(dif_spi_device_handle_t *spi,
+                                                dif_toggle_t *addr_4b) {
+  if (spi == NULL || addr_4b == NULL) {
+200033f8:           00153613            seqz    a2,a0
+200033fc:           0015b693            seqz    a3,a1
+20003400:           8ed1                        or      a3,a3,a2
+20003402:           460d                        li      a2,3
+20003404:       /-- e691                        bnez    a3,20003410 <dif_spi_device_get_4b_address_mode+0x18>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:209
+    return kDifBadArg;
+  }
+  uint32_t cfg_reg =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_ADDR_MODE_REG_OFFSET);
+20003406:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003408:       |   5108                        lw      a0,32(a0)
+2000340a:       |   4601                        li      a2,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+2000340c:       |   8905                        andi    a0,a0,1
+2000340e:       |   c188                        sw      a0,0(a1)
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:216
+    *addr_4b = kDifToggleEnabled;
+  } else {
+    *addr_4b = kDifToggleDisabled;
+  }
+  return kDifOk;
+}
+20003410:       \-> 8532                        mv      a0,a2
+20003412:           8082                        ret
+
+20003414 <dif_spi_device_get_last_read_address>:
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:300
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_last_read_address(dif_spi_device_handle_t *spi,
+                                                  uint32_t *address) {
+  if (spi == NULL || address == NULL) {
+20003414:           00153613            seqz    a2,a0
+20003418:           0015b693            seqz    a3,a1
+2000341c:           8ed1                        or      a3,a3,a2
+2000341e:           460d                        li      a2,3
+20003420:       /-- e689                        bnez    a3,2000342a <dif_spi_device_get_last_read_address+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+    return kDifBadArg;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+20003422:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003424:       |   5148                        lw      a0,36(a0)
+20003426:       |   4601                        li      a2,0
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+20003428:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:306
+                                SPI_DEVICE_LAST_READ_ADDR_REG_OFFSET);
+  return kDifOk;
+}
+2000342a:       \-> 8532                        mv      a0,a2
+2000342c:           8082                        ret
+
+2000342e <dif_spi_device_set_flash_command_slot>:
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:341
+}
+
+dif_result_t dif_spi_device_set_flash_command_slot(
+    dif_spi_device_handle_t *spi, uint8_t slot, dif_toggle_t enable,
+    dif_spi_device_flash_command_t command_info) {
+  if (spi == NULL || slot >= SPI_DEVICE_PARAM_NUM_CMD_INFO ||
+2000342e:                    00153713           seqz    a4,a0
+20003432:                    0185b793           sltiu   a5,a1,24
+20003436:                    0017c793           xori    a5,a5,1
+2000343a:                    8f5d                       or      a4,a4,a5
+2000343c:                    00263793           sltiu   a5,a2,2
+20003440:                    0017c793           xori    a5,a5,1
+20003444:                    8fd9                       or      a5,a5,a4
+20003446:                    470d                       li      a4,3
+20003448:       /----------- e3ed                       bnez    a5,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:348
+    return kDifBadArg;
+  }
+  ptrdiff_t reg_offset =
+      SPI_DEVICE_CMD_INFO_0_REG_OFFSET + slot * sizeof(uint32_t);
+  uint32_t reg_val = 0;
+  if (enable == kDifToggleDisabled) {
+2000344a:       |  /-------- ca79                       beqz    a2,20003520 <dif_spi_device_set_flash_command_slot+0xf2>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:354
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, false);
+  } else {
+    // Validate command info parameters.
+    uint32_t address_mode;
+    switch (command_info.address_type) {
+2000344c:       |  |         42dc                       lw      a5,4(a3)
+2000344e:       |  |         470d                       li      a4,3
+20003450:       +--|-------- 0cf76d63           bltu    a4,a5,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:370
+        address_mode = SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_VALUE_ADDR4B;
+        break;
+      default:
+        return kDifBadArg;
+    }
+    if (command_info.dummy_cycles >
+20003454:       |  |         0086c283           lbu     t0,8(a3)
+20003458:       |  |         4621                       li      a2,8
+2000345a:       +--|-------- 0c566863           bltu    a2,t0,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+        (1u + SPI_DEVICE_CMD_INFO_0_DUMMY_SIZE_0_MASK)) {
+      return kDifBadArg;
+    }
+
+    uint32_t payload_en;
+    switch (command_info.payload_io_type) {
+2000345e:       |  |         00c6a383           lw      t2,12(a3)
+20003462:       |  |         4609                       li      a2,2
+20003464:       |  |     /-- 00764f63           blt     a2,t2,20003482 <dif_spi_device_set_flash_command_slot+0x54>
+20003468:       |  |     |   881e                       mv      a6,t2
+2000346a:       |  |  /--|-- 02038763           beqz    t2,20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+2000346e:       |  |  |  |   4605                       li      a2,1
+20003470:       +--|--|--|-- 0ac39d63           bne     t2,a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:381
+      case kDifSpiDevicePayloadIoNone:
+        payload_en = 0x0;
+        break;
+      case kDifSpiDevicePayloadIoSingle:
+        if (command_info.payload_dir_to_host) {
+20003474:       |  |  |  |   0116c603           lbu     a2,17(a3)
+20003478:       |  |  |  |   6841                       lui     a6,0x10
+2000347a:       |  |  +--|-- ce19                       beqz    a2,20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+2000347c:       |  |  |  |   00020837           lui     a6,0x20
+20003480:       |  |  +--|-- a821                       j       20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+20003482:       |  |  |  \-> 460d                       li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+    switch (command_info.payload_io_type) {
+20003484:       |  |  |  /-- 00c38863           beq     t2,a2,20003494 <dif_spi_device_set_flash_command_slot+0x66>
+20003488:       |  |  |  |   463d                       li      a2,15
+2000348a:       +--|--|--|-- 0ac39063           bne     t2,a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+2000348e:       |  |  |  |   000f0837           lui     a6,0xf0
+20003492:       |  |  +--|-- a019                       j       20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+20003494:       |  |  |  \-> 00030837           lui     a6,0x30
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:398
+      default:
+        return kDifBadArg;
+    }
+
+    uint32_t read_pipeline_mode;
+    switch (command_info.read_pipeline_mode) {
+20003498:       |  |  \----> 0146a883           lw      a7,20(a3)
+2000349c:       |  |         4609                       li      a2,2
+2000349e:       +--|-------- 09166663           bltu    a2,a7,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:416
+      default:
+        return kDifBadArg;
+    }
+
+    // Check for invalid argument combinations.
+    if (command_info.payload_swap_enable &&
+200034a2:       |  |         0126c303           lbu     t1,18(a3)
+200034a6:       |  |     /-- 00030963           beqz    t1,200034b8 <dif_spi_device_set_flash_command_slot+0x8a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:417
+        (command_info.payload_dir_to_host ||
+200034aa:       |  |     |   0116ce03           lbu     t3,17(a3)
+200034ae:       |  |     |   0013c613           xori    a2,t2,1
+200034b2:       |  |     |   01c66633           or      a2,a2,t3
+200034b6:       +--|-----|-- ea35                       bnez    a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:421
+         command_info.payload_io_type != kDifSpiDevicePayloadIoSingle)) {
+      return kDifBadArg;
+    }
+    if (command_info.passthrough_swap_address &&
+200034b8:       |  |     \-> 0106c383           lbu     t2,16(a3)
+200034bc:       |  |         00703e33           snez    t3,t2
+200034c0:       |  |         0017b613           seqz    a2,a5
+200034c4:       |  |         00ce7633           and     a2,t3,a2
+200034c8:       +--|-------- e22d                       bnez    a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:428
+      return kDifBadArg;
+    }
+
+    // Write the command info values.
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_OPCODE_0_FIELD, command_info.opcode);
+200034ca:       |  |         0006c603           lbu     a2,0(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034ce:       |  |         07fa                       slli    a5,a5,0x1e
+200034d0:       |  |         83d9                       srli    a5,a5,0x16
+200034d2:       |  |         03aa                       slli    t2,t2,0xa
+200034d4:       |  |         00766633           or      a2,a2,t2
+200034d8:       |  |         8e5d                       or      a2,a2,a5
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:434
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_FIELD, address_mode);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_SWAP_EN_0_BIT,
+                             command_info.passthrough_swap_address);
+    if (command_info.dummy_cycles > 0) {
+200034da:       |  |     /-- 00028963           beqz    t0,200034ec <dif_spi_device_set_flash_command_slot+0xbe>
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200034de:       |  |     |   12fd                       addi    t0,t0,-1
+200034e0:       |  |     |   0072f713           andi    a4,t0,7
+200034e4:       |  |     |   0732                       slli    a4,a4,0xc
+200034e6:       |  |     |   8e59                       or      a2,a2,a4
+200034e8:       |  |     |   28f61613           bseti   a2,a2,0xf
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:445
+    }
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_EN_0_FIELD, payload_en);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_DIR_0_BIT,
+                             command_info.payload_dir_to_host);
+200034ec:       |  |     \-> 0116c703           lbu     a4,17(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200034f0:       |  |         080642b3           pack    t0,a2,zero
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034f4:       |  |         0752                       slli    a4,a4,0x14
+200034f6:       |  |         01076733           or      a4,a4,a6
+200034fa:       |  |         0356                       slli    t1,t1,0x15
+200034fc:       |  |         00676733           or      a4,a4,t1
+bitfield_bit32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:138
+OT_WARN_UNUSED_RESULT
+inline uint32_t bitfield_bit32_write(uint32_t bitfield,
+                                     bitfield_bit32_index_t bit_index,
+                                     bool value) {
+  return bitfield_field32_write(bitfield, bitfield_bit32_to_field32(bit_index),
+                                value ? 0x1u : 0x0u);
+20003500:       |  |         01868783           lb      a5,24(a3)
+20003504:       |  |         01968683           lb      a3,25(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003508:       |  |         08fa                       slli    a7,a7,0x1e
+2000350a:       |  |         0088d613           srli    a2,a7,0x8
+2000350e:       |  |         07e2                       slli    a5,a5,0x18
+20003510:       |  |         06e6                       slli    a3,a3,0x19
+20003512:       |  |         8e59                       or      a2,a2,a4
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003514:       |  |         00566633           or      a2,a2,t0
+20003518:       |  |         8edd                       or      a3,a3,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000351a:       |  |         8e55                       or      a2,a2,a3
+2000351c:       |  |         29f61613           bseti   a2,a2,0x1f
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:459
+    reg_val = bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_BUSY_0_BIT,
+                                   command_info.set_busy_status);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, true);
+  }
+  mmio_region_write32(spi->dev.base_addr, reg_offset, reg_val);
+20003520:       |  \-------> 4108                       lw      a0,0(a0)
+20003522:       |            4701                       li      a4,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003524:       |            20a5c533           sh2add  a0,a1,a0
+20003528:       |            dd70                       sw      a2,124(a0)
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:461
+  return kDifOk;
+}
+2000352a:       \----------> 853a                       mv      a0,a4
+2000352c:                    8082                       ret
+
+2000352e <dif_spi_device_get_flash_command_fifo_occupancy>:
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:640
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_flash_command_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+2000352e:           00153613            seqz    a2,a0
+20003532:           0015b693            seqz    a3,a1
+20003536:           8ed1                        or      a3,a3,a2
+20003538:           460d                        li      a2,3
+2000353a:       /-- e699                        bnez    a3,20003548 <dif_spi_device_get_flash_command_fifo_occupancy+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:643
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+2000353c:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000353e:       |   5d48                        lw      a0,60(a0)
+20003540:       |   4601                        li      a2,0
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:645
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+20003542:       |   897d                        andi    a0,a0,31
+20003544:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:648
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+20003548:       \-> 8532                        mv      a0,a2
+2000354a:           8082                        ret
+
+2000354c <dif_spi_device_get_flash_address_fifo_occupancy>:
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:652
+
+dif_result_t dif_spi_device_get_flash_address_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+2000354c:           00153613            seqz    a2,a0
+20003550:           0015b693            seqz    a3,a1
+20003554:           8ed1                        or      a3,a3,a2
+20003556:           460d                        li      a2,3
+20003558:       /-- ea81                        bnez    a3,20003568 <dif_spi_device_get_flash_address_fifo_occupancy+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:655
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+2000355a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000355c:       |   5d48                        lw      a0,60(a0)
+2000355e:       |   4601                        li      a2,0
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:657
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+20003560:       |   054e                        slli    a0,a0,0x13
+20003562:       |   816d                        srli    a0,a0,0x1b
+20003564:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:660
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+20003568:       \-> 8532                        mv      a0,a2
+2000356a:           8082                        ret
+
+2000356c <dif_spi_device_get_flash_payload_fifo_occupancy>:
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:664
+
+dif_result_t dif_spi_device_get_flash_payload_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint16_t *occupancy, uint32_t *start_offset) {
+  if (spi == NULL || occupancy == NULL || start_offset == NULL) {
+2000356c:           00153693            seqz    a3,a0
+20003570:           0015b713            seqz    a4,a1
+20003574:           8ed9                        or      a3,a3,a4
+20003576:           00163713            seqz    a4,a2
+2000357a:           8f55                        or      a4,a4,a3
+2000357c:           468d                        li      a3,3
+2000357e:       /-- eb19                        bnez    a4,20003594 <dif_spi_device_get_flash_payload_fifo_occupancy+0x28>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:667
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+20003580:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003582:       |   4128                        lw      a0,64(a0)
+20003584:       |   4681                        li      a3,0
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:669
+                                        SPI_DEVICE_UPLOAD_STATUS2_REG_OFFSET);
+  *occupancy = (uint16_t)bitfield_field32_read(
+20003586:       |   1ff57713            andi    a4,a0,511
+2000358a:       |   00e59023            sh      a4,0(a1)
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+2000358e:       |   0522                        slli    a0,a0,0x8
+20003590:       |   8161                        srli    a0,a0,0x18
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:671
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_DEPTH_FIELD);
+  *start_offset = bitfield_field32_read(
+20003592:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:674
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_START_IDX_FIELD);
+  return kDifOk;
+}
+20003594:       \-> 8536                        mv      a0,a3
+20003596:           8082                        ret
+
+20003598 <dif_spi_device_pop_flash_command_fifo>:
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:678
+
+// TODO: Does the IP handle overrun / underrun correctly?
+dif_result_t dif_spi_device_pop_flash_command_fifo(dif_spi_device_handle_t *spi,
+                                                   uint8_t *command) {
+20003598:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:679
+  if (spi == NULL || command == NULL) {
+2000359a:           00153513            seqz    a0,a0
+2000359e:           0015b693            seqz    a3,a1
+200035a2:           8ec9                        or      a3,a3,a0
+200035a4:           450d                        li      a0,3
+200035a6:       /-- ea99                        bnez    a3,200035bc <dif_spi_device_pop_flash_command_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:682
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+200035a8:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035aa:       |   5e48                        lw      a0,60(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200035ac:       |   08057693            andi    a3,a0,128
+200035b0:       |   4539                        li      a0,14
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:684
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+200035b2:       +-- c689                        beqz    a3,200035bc <dif_spi_device_pop_flash_command_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035b4:       |   4270                        lw      a2,68(a2)
+200035b6:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:690
+                           SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  uint32_t cmd_item = mmio_region_read32(spi->dev.base_addr,
+                                         SPI_DEVICE_UPLOAD_CMDFIFO_REG_OFFSET);
+  *command = (uint8_t)bitfield_field32_read(
+200035b8:       |   00c58023            sb      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:693
+      cmd_item, SPI_DEVICE_UPLOAD_CMDFIFO_DATA_FIELD);
+  return kDifOk;
+}
+200035bc:       \-> 8082                        ret
+
+200035be <dif_spi_device_pop_flash_address_fifo>:
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:696
+
+dif_result_t dif_spi_device_pop_flash_address_fifo(dif_spi_device_handle_t *spi,
+                                                   uint32_t *address) {
+200035be:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:697
+  if (spi == NULL || address == NULL) {
+200035c0:           00153513            seqz    a0,a0
+200035c4:           0015b693            seqz    a3,a1
+200035c8:           8ec9                        or      a3,a3,a0
+200035ca:           450d                        li      a0,3
+200035cc:       /-- ea99                        bnez    a3,200035e2 <dif_spi_device_pop_flash_address_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:700
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+200035ce:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035d0:       |   5e48                        lw      a0,60(a2)
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:702
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+200035d2:       |   01051693            slli    a3,a0,0x10
+200035d6:       |   4539                        li      a0,14
+200035d8:       +-- 0006d563            bgez    a3,200035e2 <dif_spi_device_pop_flash_address_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035dc:       |   4630                        lw      a2,72(a2)
+200035de:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:706
+                           SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+200035e0:       |   c190                        sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:709
+                                SPI_DEVICE_UPLOAD_ADDRFIFO_REG_OFFSET);
+  return kDifOk;
+}
+200035e2:       \-> 8082                        ret
+
+200035e4 <dif_spi_device_read_flash_payload_buffer>:
+dif_spi_device_read_flash_payload_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:740
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_read_flash_payload_buffer(
+    dif_spi_device_handle_t *spi, uint32_t offset, size_t length,
+    uint8_t *buf) {
+200035e4:           8732                        mv      a4,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:741
+  if (spi == NULL || buf == NULL) {
+200035e6:           00153613            seqz    a2,a0
+200035ea:           0016b793            seqz    a5,a3
+200035ee:           8fd1                        or      a5,a5,a2
+200035f0:           460d                        li      a2,3
+200035f2:       /-- eb9d                        bnez    a5,20003628 <dif_spi_device_read_flash_payload_buffer+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:748
+  }
+  const dif_spi_device_buffer_info_t info = {
+      .buffer_len = kDifSpiDevicePayloadLen,
+      .buffer_offset = kDifSpiDevicePayloadOffset,
+  };
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+200035f4:       |   1005b793            sltiu   a5,a1,256
+200035f8:       |   0017c813            xori    a6,a5,1
+200035fc:       |   10000793            li      a5,256
+20003600:       |   8f8d                        sub     a5,a5,a1
+20003602:       |   00e7b7b3            sltu    a5,a5,a4
+20003606:       |   00f867b3            or      a5,a6,a5
+2000360a:       +-- ef99                        bnez    a5,20003628 <dif_spi_device_read_flash_payload_buffer+0x44>
+2000360c:       |   1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_INGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000360e:       |   c606                        sw      ra,12(sp)
+20003610:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:754
+                               info.buffer_offset + (ptrdiff_t)offset;
+20003612:       |   78000613            li      a2,1920
+20003616:       |   20b645b3            sh2add  a1,a2,a1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000361a:       |   8636                        mv      a2,a3
+2000361c:       |   86ba                        mv      a3,a4
+2000361e:       |   1b7000ef            jal     ra,20003fd4 <mmio_region_memcpy_from_mmio32>
+20003622:       |   4601                        li      a2,0
+20003624:       |   40b2                        lw      ra,12(sp)
+20003626:       |   0141                        addi    sp,sp,16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:758
+                                 buf, length);
+  return kDifOk;
+}
+20003628:       \-> 8532                        mv      a0,a2
+2000362a:           8082                        ret
+
+2000362c <dif_spi_device_write_flash_buffer>:
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:763
+
+dif_result_t dif_spi_device_write_flash_buffer(
+    dif_spi_device_handle_t *spi,
+    dif_spi_device_flash_buffer_type_t buffer_type, uint32_t offset,
+    size_t length, const uint8_t *buf) {
+2000362c:           1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:764
+  if (spi == NULL || buf == NULL) {
+2000362e:           c606                        sw      ra,12(sp)
+20003630:           00153813            seqz    a6,a0
+20003634:           00173793            seqz    a5,a4
+20003638:           00f86833            or      a6,a6,a5
+2000363c:           0035b793            sltiu   a5,a1,3
+20003640:           0017c793            xori    a5,a5,1
+20003644:           00f867b3            or      a5,a6,a5
+20003648:           480d                        li      a6,3
+2000364a:       /-- e7a9                        bnez    a5,20003694 <dif_spi_device_write_flash_buffer+0x68>
+dif_spi_device_get_flash_buffer_info():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:719
+  switch (buffer_type) {
+2000364c:       |   00003797            auipc   a5,0x3
+20003650:       |   c3c78793            addi    a5,a5,-964 # 20006288 <MODULE_ID+0x198>
+20003654:       |   20f5c7b3            sh2add  a5,a1,a5
+20003658:       |   0007a883            lw      a7,0(a5)
+2000365c:       |   00003797            auipc   a5,0x3
+20003660:       |   c3878793            addi    a5,a5,-968 # 20006294 <MODULE_ID+0x1a4>
+20003664:       |   20f5c5b3            sh2add  a1,a1,a5
+20003668:       |   0005a283            lw      t0,0(a1)
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:773
+  dif_result_t status =
+      dif_spi_device_get_flash_buffer_info(buffer_type, &info);
+  if (status != kDifOk) {
+    return status;
+  }
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+2000366c:       |   9896                        add     a7,a7,t0
+2000366e:       |   011637b3            sltu    a5,a2,a7
+20003672:       |   0017c793            xori    a5,a5,1
+20003676:       |   40c885b3            sub     a1,a7,a2
+2000367a:       |   00d5b5b3            sltu    a1,a1,a3
+2000367e:       |   8ddd                        or      a1,a1,a5
+20003680:       +-- e991                        bnez    a1,20003694 <dif_spi_device_write_flash_buffer+0x68>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+20003682:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:778
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+20003684:       |   005605b3            add     a1,a2,t0
+20003688:       |   6605                        lui     a2,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:779
+                               info.buffer_offset + (ptrdiff_t)offset;
+2000368a:       |   95b2                        add     a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000368c:       |   863a                        mv      a2,a4
+2000368e:       |   1ff000ef            jal     ra,2000408c <mmio_region_memcpy_to_mmio32>
+20003692:       |   4801                        li      a6,0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:783
+                               buf, length);
+  return kDifOk;
+}
+20003694:       \-> 8542                        mv      a0,a6
+20003696:           40b2                        lw      ra,12(sp)
+20003698:           0141                        addi    sp,sp,16
+2000369a:           8082                        ret
+
+2000369c <dif_spi_device_set_flash_status_registers>:
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:849
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_set_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t value) {
+  if (spi == NULL) {
+2000369c:       /-- c509                        beqz    a0,200036a6 <dif_spi_device_set_flash_status_registers+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:852
+    return kDifBadArg;
+  }
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_FLASH_STATUS_REG_OFFSET,
+2000369e:       |   4110                        lw      a2,0(a0)
+200036a0:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200036a2:       |   d60c                        sw      a1,40(a2)
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:855
+                      value);
+  return kDifOk;
+}
+200036a4:       |   8082                        ret
+200036a6:       \-> 450d                        li      a0,3
+200036a8:           8082                        ret
+
+200036aa <dif_spi_device_get_flash_status_registers>:
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:859
+
+dif_result_t dif_spi_device_get_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t *value) {
+  if (spi == NULL || value == NULL) {
+200036aa:           00153613            seqz    a2,a0
+200036ae:           0015b693            seqz    a3,a1
+200036b2:           8ed1                        or      a3,a3,a2
+200036b4:           460d                        li      a2,3
+200036b6:       /-- e689                        bnez    a3,200036c0 <dif_spi_device_get_flash_status_registers+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+    return kDifBadArg;
+  }
+  *value = mmio_region_read32(spi->dev.base_addr,
+200036b8:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200036ba:       |   5508                        lw      a0,40(a0)
+200036bc:       |   4601                        li      a2,0
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+200036be:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:865
+                              SPI_DEVICE_FLASH_STATUS_REG_OFFSET);
+  return kDifOk;
+}
+200036c0:       \-> 8532                        mv      a0,a2
+200036c2:           8082                        ret
+
+200036c4 <dif_uart_init>:
+dif_uart_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:18
+
+#include "uart_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_init(mmio_region_t base_addr, dif_uart_t *uart) {
+  if (uart == NULL) {
+200036c4:       /----- c581                     beqz    a1,200036cc <dif_uart_init+0x8>
+200036c6:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:22
+    return kDifBadArg;
+  }
+
+  uart->base_addr = base_addr;
+200036c8:       |      c188                     sw      a0,0(a1)
+200036ca:       |  /-- a011                     j       200036ce <dif_uart_init+0xa>
+200036cc:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:25
+
+  return kDifOk;
+}
+200036ce:          \-> 8532                     mv      a0,a2
+200036d0:              8082                     ret
+
+200036d2 <dif_uart_irq_is_pending>:
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:136
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_is_pending(const dif_uart_t *uart, dif_uart_irq_t irq,
+                                     bool *is_pending) {
+  if (uart == NULL || is_pending == NULL) {
+200036d2:           00153693            seqz    a3,a0
+200036d6:           00163713            seqz    a4,a2
+200036da:           8ed9                        or      a3,a3,a4
+200036dc:           0095b713            sltiu   a4,a1,9
+200036e0:           00174713            xori    a4,a4,1
+200036e4:           8f55                        or      a4,a4,a3
+200036e6:           468d                        li      a3,3
+200036e8:       /-- eb01                        bnez    a4,200036f8 <dif_uart_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:145
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+200036ea:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200036ec:       |   4108                        lw      a0,0(a0)
+200036ee:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200036f0:       |   48b55533            bext    a0,a0,a1
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:148
+      uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+200036f4:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:151
+
+  return kDifOk;
+}
+200036f8:       \-> 8536                        mv      a0,a3
+200036fa:           8082                        ret
+
+200036fc <dif_uart_irq_acknowledge>:
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:169
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_acknowledge(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq) {
+  if (uart == NULL) {
+200036fc:           00a03633            snez    a2,a0
+20003700:           0095b693            sltiu   a3,a1,9
+20003704:           8ef1                        and     a3,a3,a2
+20003706:           460d                        li      a2,3
+20003708:       /-- c691                        beqz    a3,20003714 <dif_uart_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:180
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET,
+2000370a:       |   4108                        lw      a0,0(a0)
+2000370c:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+2000370e:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003712:       |   c10c                        sw      a1,0(a0)
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:184
+                      intr_state_reg);
+
+  return kDifOk;
+}
+20003714:       \-> 8532                        mv      a0,a2
+20003716:           8082                        ret
+
+20003718 <dif_uart_irq_set_enabled>:
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:229
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_set_enabled(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq, dif_toggle_t state) {
+  if (uart == NULL) {
+20003718:           00a036b3            snez    a3,a0
+2000371c:           0095b713            sltiu   a4,a1,9
+20003720:           8f75                        and     a4,a4,a3
+20003722:           468d                        li      a3,3
+20003724:       /-- cf09                        beqz    a4,2000373e <dif_uart_irq_set_enabled+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:238
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_enable_reg = mmio_region_read32(
+20003726:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003728:       |   4158                        lw      a4,4(a0)
+2000372a:       |   4681                        li      a3,0
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:241
+      uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+
+  bool enable_bit = (state == kDifToggleEnabled) ? true : false;
+2000372c:       |   167d                        addi    a2,a2,-1
+2000372e:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+20003732:       |   48b71733            bclr    a4,a4,a1
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003736:       |   00b615b3            sll     a1,a2,a1
+2000373a:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000373c:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:247
+  intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      intr_enable_reg);
+
+  return kDifOk;
+}
+2000373e:       \-> 8536                        mv      a0,a3
+20003740:           8082                        ret
+
+20003742 <dif_uart_irq_disable_all>:
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:252
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_disable_all(
+    const dif_uart_t *uart, dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL) {
+20003742:       /----- c911                     beqz    a0,20003756 <dif_uart_irq_disable_all+0x14>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:257
+    return kDifBadArg;
+  }
+
+  // Pass the current interrupt state to the caller, if requested.
+  if (snapshot != NULL) {
+20003744:       |  /-- c581                     beqz    a1,2000374c <dif_uart_irq_disable_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+    *snapshot = mmio_region_read32(uart->base_addr,
+20003746:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003748:       |  |   4250                     lw      a2,4(a2)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+2000374a:       |  |   c190                     sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:263
+                                   (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+  }
+
+  // Disable all interrupts.
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+2000374c:       |  \-> 410c                     lw      a1,0(a0)
+2000374e:       |      4501                     li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003750:       |      0005a223                 sw      zero,4(a1)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:267
+                      0u);
+
+  return kDifOk;
+}
+20003754:       |      8082                     ret
+20003756:       \----> 450d                     li      a0,3
+20003758:              8082                     ret
+
+2000375a <dif_uart_irq_restore_all>:
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:272
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_restore_all(
+    const dif_uart_t *uart, const dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL || snapshot == NULL) {
+2000375a:           00153613            seqz    a2,a0
+2000375e:           0015b693            seqz    a3,a1
+20003762:           8ed1                        or      a3,a3,a2
+20003764:           460d                        li      a2,3
+20003766:       /-- e689                        bnez    a3,20003770 <dif_uart_irq_restore_all+0x16>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:277
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      *snapshot);
+20003768:       |   418c                        lw      a1,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:276
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+2000376a:       |   4108                        lw      a0,0(a0)
+2000376c:       |   4601                        li      a2,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000376e:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:280
+
+  return kDifOk;
+}
+20003770:       \-> 8532                        mv      a0,a2
+20003772:           8082                        ret
+
+20003774 <dif_uart_configure>:
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:92
+
+  return bytes_read;
+}
+
+dif_result_t dif_uart_configure(const dif_uart_t *uart,
+                                dif_uart_config_t config) {
+20003774:                 1141                  addi    sp,sp,-16
+20003776:                 c606                  sw      ra,12(sp)
+20003778:                 c422                  sw      s0,8(sp)
+2000377a:                 c226                  sw      s1,4(sp)
+2000377c:                 c04a                  sw      s2,0(sp)
+2000377e:                 440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+20003780:       /-------- c961                  beqz    a0,20003850 <dif_uart_configure+0xdc>
+20003782:       |         84ae                  mv      s1,a1
+20003784:       |         418c                  lw      a1,0(a1)
+20003786:       +-------- c5e9                  beqz    a1,20003850 <dif_uart_configure+0xdc>
+20003788:       |         40d0                  lw      a2,4(s1)
+2000378a:       +-------- c279                  beqz    a2,20003850 <dif_uart_configure+0xdc>
+2000378c:       |         892a                  mv      s2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:94
+      !dif_is_valid_toggle(config.tx_enable) ||
+2000378e:       |         4894                  lw      a3,16(s1)
+20003790:       |         4505                  li      a0,1
+20003792:       +-------- 0ad56f63              bltu    a0,a3,20003850 <dif_uart_configure+0xdc>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:95
+      !dif_is_valid_toggle(config.rx_enable)) {
+20003796:       |         48d4                  lw      a3,20(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+20003798:       +-------- 0ad56c63              bltu    a0,a3,20003850 <dif_uart_configure+0xdc>
+2000379c:       |         0016e537              lui     a0,0x16e
+200037a0:       |         36050513              addi    a0,a0,864 # 16e360 <_ottf_size+0xee360>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:117
+  // 2^4 should be multiplied.
+  // If uart baud rate is 1.5Mbps and IO is 24Mhz, NCO is 0x10000, which is over
+  // the NCO width, use NCO = 0xffff for this case since the error is tolerable.
+  // Refer to #4263
+  uint64_t nco =
+      ((uint64_t)config.baudrate == 1500000 && config.clk_freq_hz == 24000000)
+200037a4:       |         8d2d                  xor     a0,a0,a1
+200037a6:       |         016e36b7              lui     a3,0x16e3
+200037aa:       |         60068693              addi    a3,a3,1536 # 16e3600 <_ottf_size+0x1663600>
+200037ae:       |         8eb1                  xor     a3,a3,a2
+200037b0:       |         8d55                  or      a0,a0,a3
+200037b2:       |     /-- e501                  bnez    a0,200037ba <dif_uart_configure+0x46>
+200037b4:       |     |   6541                  lui     a0,0x10
+200037b6:       |     |   157d                  addi    a0,a0,-1
+200037b8:       |  /--|-- a831                  j       200037d4 <dif_uart_configure+0x60>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:119
+          ? 0xffff
+          : udiv64_slow((uint64_t)config.baudrate << (nco_width + 4),
+200037ba:       |  |  \-> 01459513              slli    a0,a1,0x14
+200037be:       |  |      81b1                  srli    a1,a1,0xc
+200037c0:       |  |      4681                  li      a3,0
+200037c2:       |  |      4701                  li      a4,0
+200037c4:       |  |      319000ef              jal     ra,200042dc <udiv64_slow>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:124
+                        config.clk_freq_hz, NULL);
+  uint32_t nco_masked = nco & UART_CTRL_NCO_MASK;
+
+  // Requested baudrate is too high for the given clock frequency.
+  if (nco != nco_masked) {
+200037c8:       |  |      01055613              srli    a2,a0,0x10
+200037cc:       |  |      8dd1                  or      a1,a1,a2
+200037ce:       +--|----- e1c9                  bnez    a1,20003850 <dif_uart_configure+0xdc>
+200037d0:       |  |      08054533              pack    a0,a0,zero
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:129
+    return kDifBadArg;
+  }
+
+  // Check requested RXBLVL is within bounds.
+  uint32_t rxblvl = config.rx_break_level;
+200037d4:       |  \----> 4c8c                  lw      a1,24(s1)
+200037d6:       |         440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:130
+  if ((rxblvl & UART_CTRL_RXBLVL_MASK) != rxblvl) {
+200037d8:       +-------- 06b46c63              bltu    s0,a1,20003850 <dif_uart_configure+0xdc>
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:48
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, 0u);
+200037dc:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037e0:       |         00062823              sw      zero,16(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:54
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+200037e4:       |         00092603              lw      a2,0(s2)
+200037e8:       |         468d                  li      a3,3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037ea:       |         d214                  sw      a3,32(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:56
+  mmio_region_write32(uart->base_addr, UART_OVRD_REG_OFFSET, 0u);
+200037ec:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037f0:       |         02062423              sw      zero,40(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:57
+  mmio_region_write32(uart->base_addr, UART_TIMEOUT_CTRL_REG_OFFSET, 0u);
+200037f4:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037f8:       |         02062823              sw      zero,48(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:58
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+200037fc:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003800:       |         00062223              sw      zero,4(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:59
+  mmio_region_write32(uart->base_addr, UART_INTR_STATE_REG_OFFSET,
+20003804:       |         00092603              lw      a2,0(s2)
+20003808:       |         56fd                  li      a3,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000380a:       |         c214                  sw      a3,0(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+2000380c:       |         0542                  slli    a0,a0,0x10
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+
+  // Set baudrate, enable RX and TX, configure parity.
+  uint32_t reg = 0;
+  reg = bitfield_field32_write(reg, UART_CTRL_NCO_FIELD, nco_masked);
+  reg = bitfield_field32_write(reg, UART_CTRL_RXBLVL_FIELD, rxblvl);
+  if (dif_toggle_to_bool(config.tx_enable)) {
+2000380e:       |         4890                  lw      a2,16(s1)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+20003810:       |         05fa                  slli    a1,a1,0x1e
+20003812:       |         81d9                  srli    a1,a1,0x16
+20003814:       |         8d4d                  or      a0,a0,a1
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+ * @param val A dif_toggle_t value.
+ * @return Corresponding bool value.
+ */
+OT_WARN_UNUSED_RESULT
+inline bool dif_toggle_to_bool(dif_toggle_t val) {
+  switch (val) {
+20003816:       |         167d                  addi    a2,a2,-1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+    reg = bitfield_bit32_write(reg, UART_CTRL_TX_BIT, true);
+  }
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003818:       |         48cc                  lw      a1,20(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+2000381a:       |         00163613              seqz    a2,a2
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+  if (dif_toggle_to_bool(config.tx_enable)) {
+2000381e:       |         8d51                  or      a0,a0,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+    reg = bitfield_bit32_write(reg, UART_CTRL_RX_BIT, true);
+  }
+  if (config.parity_enable == kDifToggleEnabled) {
+20003820:       |         4490                  lw      a2,8(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+20003822:       |         15fd                  addi    a1,a1,-1
+20003824:       |         0015b593              seqz    a1,a1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003828:       |         0586                  slli    a1,a1,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+2000382a:       |         167d                  addi    a2,a2,-1
+2000382c:       |         00163613              seqz    a2,a2
+20003830:       |         061a                  slli    a2,a2,0x6
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_EN_BIT, true);
+  }
+  if (config.parity == kDifUartParityOdd) {
+20003832:       |         44d4                  lw      a3,12(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003834:       |         8dd1                  or      a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+20003836:       |         8d4d                  or      a0,a0,a1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:153
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_ODD_BIT, true);
+  }
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, reg);
+20003838:       |         00092583              lw      a1,0(s2)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+  if (config.parity == kDifUartParityOdd) {
+2000383c:       |         0016b613              seqz    a2,a3
+20003840:       |         061e                  slli    a2,a2,0x7
+20003842:       |         8d51                  or      a0,a0,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003844:       |         c988                  sw      a0,16(a1)
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:156
+
+  // Disable interrupts.
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+20003846:       |         00092503              lw      a0,0(s2)
+2000384a:       |         4401                  li      s0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000384c:       |         00052223              sw      zero,4(a0) # 10004 <_chip_info_end+0x4>
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:159
+
+  return kDifOk;
+}
+20003850:       \-------> 8522                  mv      a0,s0
+20003852:                 40b2                  lw      ra,12(sp)
+20003854:                 4422                  lw      s0,8(sp)
+20003856:                 4492                  lw      s1,4(sp)
+20003858:                 4902                  lw      s2,0(sp)
+2000385a:                 0141                  addi    sp,sp,16
+2000385c:                 8082                  ret
+
+2000385e <dif_uart_watermark_rx_set>:
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:176
+  return kDifOk;
+}
+
+dif_result_t dif_uart_watermark_rx_set(const dif_uart_t *uart,
+                                       dif_uart_watermark_t watermark) {
+  if (uart == NULL) {
+2000385e:       /----- cd19                     beqz    a0,2000387c <dif_uart_watermark_rx_set+0x1e>
+20003860:       |      862a                     mv      a2,a0
+20003862:       |      4699                     li      a3,6
+20003864:       |      4535                     li      a0,13
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:183
+  }
+
+  // Check if the requested watermark is valid, and get a corresponding
+  // register definition to be written.
+  uint32_t value;
+  switch (watermark) {
+20003866:       |  /-- 00b6ea63                 bltu    a3,a1,2000387a <dif_uart_watermark_rx_set+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:210
+    default:
+      return kDifError;
+  }
+
+  // Set watermark level.
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET);
+2000386a:       |  |   4210                     lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000386c:       |  |   5214                     lw      a3,32(a2)
+2000386e:       |  |   4501                     li      a0,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003870:       |  |   9a8d                     andi    a3,a3,-29
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003872:       |  |   058a                     slli    a1,a1,0x2
+20003874:       |  |   89f1                     andi    a1,a1,28
+20003876:       |  |   8dd5                     or      a1,a1,a3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003878:       |  |   d20c                     sw      a1,32(a2)
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:215
+  reg = bitfield_field32_write(reg, UART_FIFO_CTRL_RXILVL_FIELD, value);
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+
+  return kDifOk;
+}
+2000387a:       |  \-> 8082                     ret
+2000387c:       \----> 450d                     li      a0,3
+2000387e:              8082                     ret
+
+20003880 <dif_uart_bytes_send>:
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:291
+}
+
+dif_result_t dif_uart_bytes_send(const dif_uart_t *uart, const uint8_t *data,
+                                 size_t bytes_requested,
+                                 size_t *bytes_written) {
+  if (uart == NULL || data == NULL) {
+20003880:                 00153713              seqz    a4,a0
+20003884:                 0015b793              seqz    a5,a1
+20003888:                 8fd9                  or      a5,a5,a4
+2000388a:                 470d                  li      a4,3
+2000388c:       /-------- e795                  bnez    a5,200038b8 <dif_uart_bytes_send+0x38>
+2000388e:       |         4781                  li      a5,0
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003890:       |  /----- c20d                  beqz    a2,200038b2 <dif_uart_bytes_send+0x32>
+uart_tx_full():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:22
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_STATUS_REG_OFFSET);
+20003892:       |  |  /-> 00052803              lw      a6,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003896:       |  |  |   01482703              lw      a4,20(a6)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+2000389a:       |  |  |   8b05                  andi    a4,a4,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+2000389c:       |  +--|-- eb19                  bnez    a4,200038b2 <dif_uart_bytes_send+0x32>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:70
+    uart_tx_fifo_write(uart, data[bytes_written]);
+2000389e:       |  |  |   00f58733              add     a4,a1,a5
+200038a2:       |  |  |   00074703              lbu     a4,0(a4)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:71
+    ++bytes_written;
+200038a6:       |  |  |   0785                  addi    a5,a5,1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200038a8:       |  |  |   00e82e23              sw      a4,28(a6)
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+200038ac:       |  |  \-- fef613e3              bne     a2,a5,20003892 <dif_uart_bytes_send+0x12>
+200038b0:       |  |      87b2                  mv      a5,a2
+200038b2:       |  \----> 4701                  li      a4,0
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:297
+    return kDifBadArg;
+  }
+
+  // `bytes_written` is an optional parameter.
+  size_t res = uart_bytes_send(uart, data, bytes_requested);
+  if (bytes_written != NULL) {
+200038b4:       +-------- c291                  beqz    a3,200038b8 <dif_uart_bytes_send+0x38>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:298
+    *bytes_written = res;
+200038b6:       |         c29c                  sw      a5,0(a3)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:302
+  }
+
+  return kDifOk;
+}
+200038b8:       \-------> 853a                  mv      a0,a4
+200038ba:                 8082                  ret
+
+200038bc <dif_uart_byte_send_polled>:
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:321
+
+  return kDifOk;
+}
+
+dif_result_t dif_uart_byte_send_polled(const dif_uart_t *uart, uint8_t byte) {
+  if (uart == NULL) {
+200038bc:       /----- cd19                     beqz    a0,200038da <dif_uart_byte_send_polled+0x1e>
+200038be:       |      4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200038c0:       |  /-> 4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038c2:       |  |   8a85                     andi    a3,a3,1
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:326
+    return kDifBadArg;
+  }
+
+  // Busy wait for the TX FIFO to free up.
+  while (uart_tx_full(uart)) {
+200038c4:       |  \-- fef5                     bnez    a3,200038c0 <dif_uart_byte_send_polled+0x4>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038c6:       |      4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038c8:       |      8a85                     andi    a3,a3,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+200038ca:       |  /-- e299                     bnez    a3,200038d0 <dif_uart_byte_send_polled+0x14>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200038cc:       |  |   ce4c                     sw      a1,28(a2)
+200038ce:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200038d0:       |  >-> 4a48                     lw      a0,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038d2:       |  |   8921                     andi    a0,a0,8
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:333
+
+  (void)uart_bytes_send(uart, &byte, 1);
+
+  // Busy wait for the TX FIFO to be drained and for HW to finish processing
+  // the last byte.
+  while (!uart_tx_idle(uart)) {
+200038d4:       |  \-- dd75                     beqz    a0,200038d0 <dif_uart_byte_send_polled+0x14>
+200038d6:       |      4501                     li      a0,0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:337
+  }
+
+  return kDifOk;
+}
+200038d8:       |      8082                     ret
+200038da:       \----> 450d                     li      a0,3
+200038dc:              8082                     ret
+
+200038de <dif_uart_byte_receive_polled>:
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:341
+
+dif_result_t dif_uart_byte_receive_polled(const dif_uart_t *uart,
+                                          uint8_t *byte) {
+  if (uart == NULL || byte == NULL) {
+200038de:              00153613                 seqz    a2,a0
+200038e2:              0015b693                 seqz    a3,a1
+200038e6:              8ed1                     or      a3,a3,a2
+200038e8:              460d                     li      a2,3
+200038ea:       /----- ee99                     bnez    a3,20003908 <dif_uart_byte_receive_polled+0x2a>
+200038ec:       |      4108                     lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038ee:       |  /-> 4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038f0:       |  |   02067613                 andi    a2,a2,32
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:346
+    return kDifBadArg;
+  }
+
+  // Busy wait for the RX message in the FIFO.
+  while (uart_rx_empty(uart)) {
+200038f4:       |  \-- fe6d                     bnez    a2,200038ee <dif_uart_byte_receive_polled+0x10>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038f6:       |      4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038f8:       |      02067613                 andi    a2,a2,32
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:83
+  while ((bytes_read < bytes_requested) && !uart_rx_empty(uart)) {
+200038fc:       |  /-- e609                     bnez    a2,20003906 <dif_uart_byte_receive_polled+0x28>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038fe:       |  |   4d08                     lw      a0,24(a0)
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:84
+    data[bytes_read] = uart_rx_fifo_read(uart);
+20003900:       |  |   00a58023                 sb      a0,0(a1)
+20003904:       +--|-- a011                     j       20003908 <dif_uart_byte_receive_polled+0x2a>
+20003906:       |  \-> 4601                     li      a2,0
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:352
+  }
+
+  (void)uart_bytes_receive(uart, 1, byte);
+
+  return kDifOk;
+}
+20003908:       \----> 8532                     mv      a0,a2
+2000390a:              8082                     ret
+
+2000390c <dif_uart_rx_bytes_available>:
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:356
+
+dif_result_t dif_uart_rx_bytes_available(const dif_uart_t *uart,
+                                         size_t *num_bytes) {
+  if (uart == NULL || num_bytes == NULL) {
+2000390c:           00153613            seqz    a2,a0
+20003910:           0015b693            seqz    a3,a1
+20003914:           8ed1                        or      a3,a3,a2
+20003916:           460d                        li      a2,3
+20003918:       /-- e699                        bnez    a3,20003926 <dif_uart_rx_bytes_available+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:362
+    return kDifBadArg;
+  }
+
+  // RX FIFO fill level (in bytes).
+  uint32_t reg =
+      mmio_region_read32(uart->base_addr, UART_FIFO_STATUS_REG_OFFSET);
+2000391a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000391c:       |   5148                        lw      a0,36(a0)
+2000391e:       |   4601                        li      a2,0
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+20003920:       |   0522                        slli    a0,a0,0x8
+20003922:       |   8161                        srli    a0,a0,0x18
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:363
+  *num_bytes = (size_t)bitfield_field32_read(reg, UART_FIFO_STATUS_RXLVL_FIELD);
+20003924:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:366
+
+  return kDifOk;
+}
+20003926:       \-> 8532                        mv      a0,a2
+20003928:           8082                        ret
+
+2000392a <xTaskCreate>:
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:734
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask )
+    {
+2000392a:                    7179                       addi    sp,sp,-48
+2000392c:                    d606                       sw      ra,44(sp)
+2000392e:                    d422                       sw      s0,40(sp)
+20003930:                    d226                       sw      s1,36(sp)
+20003932:                    d04a                       sw      s2,32(sp)
+20003934:                    ce4e                       sw      s3,28(sp)
+20003936:                    cc52                       sw      s4,24(sp)
+20003938:                    ca56                       sw      s5,20(sp)
+2000393a:                    c85a                       sw      s6,16(sp)
+2000393c:                    c65e                       sw      s7,12(sp)
+2000393e:                    c462                       sw      s8,8(sp)
+20003940:                    8abe                       mv      s5,a5
+20003942:                    893a                       mv      s2,a4
+20003944:                    89b6                       mv      s3,a3
+20003946:                    8c32                       mv      s8,a2
+20003948:                    84ae                       mv      s1,a1
+2000394a:                    8a2a                       mv      s4,a0
+/proc/self/cwd/external/freertos/tasks.c:768
+        #else /* portSTACK_GROWTH */
+            {
+                StackType_t * pxStack;
+
+                /* Allocate space for the stack used by the task being created. */
+                pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+2000394c:                    00261513           slli    a0,a2,0x2
+20003950:                    2be5                       jal     20003f48 <pvPortMalloc>
+20003952:                    5b7d                       li      s6,-1
+/proc/self/cwd/external/freertos/tasks.c:770
+
+                if( pxStack != NULL )
+20003954:       /----------- 1a050463           beqz    a0,20003afc <xTaskCreate+0x1d2>
+20003958:       |            842a                       mv      s0,a0
+/proc/self/cwd/external/freertos/tasks.c:773
+                {
+                    /* Allocate space for the TCB. */
+                    pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+2000395a:       |            04c00513           li      a0,76
+2000395e:       |            23ed                       jal     20003f48 <pvPortMalloc>
+/proc/self/cwd/external/freertos/tasks.c:775
+
+                    if( pxNewTCB != NULL )
+20003960:       |  /-------- cd15                       beqz    a0,2000399c <xTaskCreate+0x72>
+20003962:       |  |         8baa                       mv      s7,a0
+/proc/self/cwd/external/freertos/tasks.c:778
+                    {
+                        /* Store the stack location in the TCB. */
+                        pxNewTCB->pxStack = pxStack;
+20003964:       |  |         d900                       sw      s0,48(a0)
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:860
+     * grows from high memory to low (as per the 80x86) or vice versa.
+     * portSTACK_GROWTH is used to make the result positive or negative as required
+     * by the port. */
+    #if ( portSTACK_GROWTH < 0 )
+        {
+            pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+20003966:       |  |         208c4533           sh2add  a0,s8,s0
+2000396a:       |  |         1571                       addi    a0,a0,-4
+/proc/self/cwd/external/freertos/tasks.c:861
+            pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+2000396c:       |  |         ff057b13           andi    s6,a0,-16
+/proc/self/cwd/external/freertos/tasks.c:888
+            pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+        }
+    #endif /* portSTACK_GROWTH */
+
+    /* Store the task name in the TCB. */
+    if( pcName != NULL )
+20003970:       |  |  /----- c88d                       beqz    s1,200039a2 <xTaskCreate+0x78>
+/proc/self/cwd/external/freertos/tasks.c:890
+    {
+        for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+20003972:       |  |  |      034b8513           addi    a0,s7,52
+20003976:       |  |  |      45bd                       li      a1,15
+/proc/self/cwd/external/freertos/tasks.c:892
+        {
+            pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+20003978:       |  |  |  /-> 00048603           lb      a2,0(s1)
+2000397c:       |  |  |  |   00c50023           sb      a2,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:897
+
+            /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+             * configMAX_TASK_NAME_LEN characters just in case the memory after the
+             * string is not accessible (extremely unlikely). */
+            if( pcName[ x ] == ( char ) 0x00 )
+20003980:       |  |  |  |   0004c603           lbu     a2,0(s1)
+20003984:       |  |  |  |   00163613           seqz    a2,a2
+20003988:       |  |  |  |   0015b693           seqz    a3,a1
+2000398c:       |  |  |  |   8e55                       or      a2,a2,a3
+2000398e:       |  |  |  |   15fd                       addi    a1,a1,-1
+20003990:       |  |  |  |   0505                       addi    a0,a0,1
+20003992:       |  |  |  |   0485                       addi    s1,s1,1
+20003994:       |  |  |  \-- d275                       beqz    a2,20003978 <xTaskCreate+0x4e>
+/proc/self/cwd/external/freertos/tasks.c:909
+            }
+        }
+
+        /* Ensure the name string is terminated in the case that the string length
+         * was greater or equal to configMAX_TASK_NAME_LEN. */
+        pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+20003996:       |  |  |      040b81a3           sb      zero,67(s7)
+2000399a:       |  |  |  /-- a031                       j       200039a6 <xTaskCreate+0x7c>
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:784
+                        vPortFreeStack( pxStack );
+2000399c:       |  \--|--|-> 8522                       mv      a0,s0
+2000399e:       |     |  |   2535                       jal     20003fca <vPortFree>
+200039a0:       +-----|--|-- aab1                       j       20003afc <xTaskCreate+0x1d2>
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:915
+    }
+    else
+    {
+        /* The task has not been given a name, so just ensure there is a NULL
+         * terminator when it is read out. */
+        pxNewTCB->pcTaskName[ 0 ] = 0x00;
+200039a2:       |     \--|-> 020b8a23           sb      zero,52(s7)
+200039a6:       |        \-> 4511                       li      a0,4
+/proc/self/cwd/external/freertos/tasks.c:921
+    }
+
+    /* This is used as an array index so must ensure it's not too large. */
+    configASSERT( uxPriority < configMAX_PRIORITIES );
+
+    if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+200039a8:       |            0aa95433           minu    s0,s2,a0
+/proc/self/cwd/external/freertos/tasks.c:930
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxNewTCB->uxPriority = uxPriority;
+200039ac:       |            028ba623           sw      s0,44(s7)
+/proc/self/cwd/external/freertos/tasks.c:938
+            pxNewTCB->uxBasePriority = uxPriority;
+            pxNewTCB->uxMutexesHeld = 0;
+        }
+    #endif /* configUSE_MUTEXES */
+
+    vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+200039b0:       |            004b8913           addi    s2,s7,4
+200039b4:       |            854a                       mv      a0,s2
+200039b6:       |            23ad                       jal     20003f20 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:939
+    vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+200039b8:       |            018b8513           addi    a0,s7,24
+200039bc:       |            2395                       jal     20003f20 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:943
+
+    /* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+     * back to  the containing TCB from a generic item in a list. */
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+200039be:       |            017ba823           sw      s7,16(s7)
+200039c2:       |            4515                       li      a0,5
+/proc/self/cwd/external/freertos/tasks.c:946
+
+    /* Event lists are always in priority order. */
+    listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+200039c4:       |            8d01                       sub     a0,a0,s0
+200039c6:       |            00abac23           sw      a0,24(s7)
+/proc/self/cwd/external/freertos/tasks.c:947
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+200039ca:       |            037ba223           sw      s7,36(s7)
+/proc/self/cwd/external/freertos/tasks.c:951
+
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        {
+            pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
+200039ce:       |            040ba223           sw      zero,68(s7)
+/proc/self/cwd/external/freertos/tasks.c:1002
+        }
+    #endif
+
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        {
+            pxNewTCB->ucDelayAborted = pdFALSE;
+200039d2:       |            040b8423           sb      zero,72(s7)
+/proc/self/cwd/external/freertos/tasks.c:1052
+                        }
+                    #endif /* portSTACK_GROWTH */
+                }
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
+                {
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+200039d6:       |            855a                       mv      a0,s6
+200039d8:       |            85d2                       mv      a1,s4
+200039da:       |            864e                       mv      a2,s3
+200039dc:       |            bc1fc0ef           jal     ra,2000059c <pxPortInitialiseStack>
+200039e0:       |            00aba023           sw      a0,0(s7)
+/proc/self/cwd/external/freertos/tasks.c:1058
+                }
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
+        }
+    #endif /* portUSING_MPU_WRAPPERS */
+
+    if( pxCreatedTask != NULL )
+200039e4:       |        /-- 000a8463           beqz    s5,200039ec <xTaskCreate+0xc2>
+/proc/self/cwd/external/freertos/tasks.c:1062
+    {
+        /* Pass the handle out in an anonymous way.  The handle can be used to
+         * change the created task's priority, delete the created task, etc.*/
+        *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+200039e8:       |        |   017aa023           sw      s7,0(s5)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskEnterCritical( void )
+    {
+        portDISABLE_INTERRUPTS();
+200039ec:       |        \-> 30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+
+        if( xSchedulerRunning != pdFALSE )
+200039f0:       |            efffea17           auipc   s4,0xefffe
+200039f4:       |            6d0a2503           lw      a0,1744(s4) # 100020c0 <xSchedulerRunning>
+200039f8:       |            efffec17           auipc   s8,0xefffe
+200039fc:       |        /-- c901                       beqz    a0,20003a0c <xTaskCreate+0xe2>
+/proc/self/cwd/external/freertos/tasks.c:4349
+        {
+            ( pxCurrentTCB->uxCriticalNesting )++;
+200039fe:       |        |   6b4c2503           lw      a0,1716(s8) # 100020ac <pxCurrentTCB>
+20003a02:       |        |   416c                       lw      a1,68(a0)
+20003a04:       |        |   0585                       addi    a1,a1,1
+20003a06:       |        |   c16c                       sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+             * function so  assert() if it is being called from an interrupt
+             * context.  Only API functions that end in "FromISR" can be used in an
+             * interrupt.  Only assert if the critical nesting count is 1 to
+             * protect against recursive calls if the assert function also uses a
+             * critical section. */
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003a08:       |        |   6b4c2503           lw      a0,1716(s8)
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1077
+        uxCurrentNumberOfTasks++;
+20003a0c:       |        \-> efffe517           auipc   a0,0xefffe
+20003a10:       |            6b052583           lw      a1,1712(a0) # 100020bc <uxCurrentNumberOfTasks>
+20003a14:       |            0585                       addi    a1,a1,1
+20003a16:       |            6ab52823           sw      a1,1712(a0)
+/proc/self/cwd/external/freertos/tasks.c:1079
+        if( pxCurrentTCB == NULL )
+20003a1a:       |            6b4c2583           lw      a1,1716(s8)
+20003a1e:       |            effff617           auipc   a2,0xeffff
+20003a22:       |            83260a93           addi    s5,a2,-1998 # 10002250 <pxReadyTasksLists>
+20003a26:       |        /-- cd91                       beqz    a1,20003a42 <xTaskCreate+0x118>
+/proc/self/cwd/external/freertos/tasks.c:1102
+            if( xSchedulerRunning == pdFALSE )
+20003a28:       |        |   6d0a2503           lw      a0,1744(s4)
+20003a2c:       |     /--|-- ed25                       bnez    a0,20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1104
+                if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+20003a2e:       |     |  |   6b4c2503           lw      a0,1716(s8)
+20003a32:       |     |  |   5548                       lw      a0,44(a0)
+20003a34:       |     |  |   02cba583           lw      a1,44(s7)
+20003a38:       |     +--|-- 06a5e663           bltu    a1,a0,20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1106
+                    pxCurrentTCB = pxNewTCB;
+20003a3c:       |     |  |   6b7c2a23           sw      s7,1716(s8)
+20003a40:       |     +--|-- a095                       j       20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1083
+            pxCurrentTCB = pxNewTCB;
+20003a42:       |     |  \-> 6b7c2a23           sw      s7,1716(s8)
+/proc/self/cwd/external/freertos/tasks.c:1085
+            if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+20003a46:       |     |      6b052503           lw      a0,1712(a0)
+20003a4a:       |     |      4585                       li      a1,1
+20003a4c:       |     +----- 04b51c63           bne     a0,a1,20003aa4 <xTaskCreate+0x17a>
+20003a50:       |     |      4495                       li      s1,5
+20003a52:       |     |      8456                       mv      s0,s5
+prvInitialiseTaskLists():
+/proc/self/cwd/external/freertos/tasks.c:3665
+        vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+20003a54:       |     |  /-> 8522                       mv      a0,s0
+20003a56:       |     |  |   295d                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3663
+    for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+20003a58:       |     |  |   14fd                       addi    s1,s1,-1
+20003a5a:       |     |  |   0451                       addi    s0,s0,20
+20003a5c:       |     |  \-- fce5                       bnez    s1,20003a54 <xTaskCreate+0x12a>
+/proc/self/cwd/external/freertos/tasks.c:3668
+    vListInitialise( &xDelayedTaskList1 );
+20003a5e:       |     |      effff517           auipc   a0,0xeffff
+20003a62:       |     |      89250993           addi    s3,a0,-1902 # 100022f0 <xDelayedTaskList1>
+20003a66:       |     |      854e                       mv      a0,s3
+20003a68:       |     |      2155                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3669
+    vListInitialise( &xDelayedTaskList2 );
+20003a6a:       |     |      effff517           auipc   a0,0xeffff
+20003a6e:       |     |      89a50413           addi    s0,a0,-1894 # 10002304 <xDelayedTaskList2>
+20003a72:       |     |      8522                       mv      a0,s0
+20003a74:       |     |      2961                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3670
+    vListInitialise( &xPendingReadyList );
+20003a76:       |     |      effff517           auipc   a0,0xeffff
+20003a7a:       |     |      86650513           addi    a0,a0,-1946 # 100022dc <xPendingReadyList>
+20003a7e:       |     |      2179                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3674
+            vListInitialise( &xTasksWaitingTermination );
+20003a80:       |     |      effff517           auipc   a0,0xeffff
+20003a84:       |     |      83450513           addi    a0,a0,-1996 # 100022b4 <xTasksWaitingTermination>
+20003a88:       |     |      2151                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3680
+            vListInitialise( &xSuspendedTaskList );
+20003a8a:       |     |      effff517           auipc   a0,0xeffff
+20003a8e:       |     |      83e50513           addi    a0,a0,-1986 # 100022c8 <xSuspendedTaskList>
+20003a92:       |     |      29ad                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3686
+    pxDelayedTaskList = &xDelayedTaskList1;
+20003a94:       |     |      efffe517           auipc   a0,0xefffe
+20003a98:       |     |      63352823           sw      s3,1584(a0) # 100020c4 <pxDelayedTaskList>
+/proc/self/cwd/external/freertos/tasks.c:3687
+    pxOverflowDelayedTaskList = &xDelayedTaskList2;
+20003a9c:       |     |      efffe517           auipc   a0,0xefffe
+20003aa0:       |     |      62852623           sw      s0,1580(a0) # 100020c8 <pxOverflowDelayedTaskList>
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1119
+        uxTaskNumber++;
+20003aa4:       |     \----> efffe517           auipc   a0,0xefffe
+20003aa8:       |            61052583           lw      a1,1552(a0) # 100020b4 <uxTaskNumber>
+20003aac:       |            0585                       addi    a1,a1,1
+20003aae:       |            60b52823           sw      a1,1552(a0)
+/proc/self/cwd/external/freertos/tasks.c:1129
+        prvAddTaskToReadyList( pxNewTCB );
+20003ab2:       |            02cba503           lw      a0,44(s7)
+20003ab6:       |            efffe597           auipc   a1,0xefffe
+20003aba:       |            5fa5a603           lw      a2,1530(a1) # 100020b0 <uxTopReadyPriority>
+20003abe:       |            28a61633           bset    a2,a2,a0
+20003ac2:       |            5ec5ad23           sw      a2,1530(a1)
+20003ac6:       |            20a54533           sh2add  a0,a0,a0
+20003aca:       |            21554533           sh2add  a0,a0,s5
+20003ace:       |            414c                       lw      a1,4(a0)
+20003ad0:       |            00bba423           sw      a1,8(s7)
+20003ad4:       |            4590                       lw      a2,8(a1)
+20003ad6:       |            00cba623           sw      a2,12(s7)
+20003ada:       |            4590                       lw      a2,8(a1)
+20003adc:       |            01262223           sw      s2,4(a2)
+20003ae0:       |            0125a423           sw      s2,8(a1)
+20003ae4:       |            00abaa23           sw      a0,20(s7)
+20003ae8:       |            410c                       lw      a1,0(a0)
+20003aea:       |            0585                       addi    a1,a1,1
+20003aec:       |            c10c                       sw      a1,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:1133
+    taskEXIT_CRITICAL();
+20003aee:       |            2025                       jal     20003b16 <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:1135
+    if( xSchedulerRunning != pdFALSE )
+20003af0:       |            6d0a2503           lw      a0,1744(s4)
+20003af4:       |            4b05                       li      s6,1
+20003af6:       +----------- c119                       beqz    a0,20003afc <xTaskCreate+0x1d2>
+/proc/self/cwd/external/freertos/tasks.c:1139
+        if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+20003af8:       |            6b4c2503           lw      a0,1716(s8)
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:813
+        return xReturn;
+20003afc:       \----------> 855a                       mv      a0,s6
+20003afe:                    50b2                       lw      ra,44(sp)
+20003b00:                    5422                       lw      s0,40(sp)
+20003b02:                    5492                       lw      s1,36(sp)
+20003b04:                    5902                       lw      s2,32(sp)
+20003b06:                    49f2                       lw      s3,28(sp)
+20003b08:                    4a62                       lw      s4,24(sp)
+20003b0a:                    4ad2                       lw      s5,20(sp)
+20003b0c:                    4b42                       lw      s6,16(sp)
+20003b0e:                    4bb2                       lw      s7,12(sp)
+20003b10:                    4c22                       lw      s8,8(sp)
+20003b12:                    6145                       addi    sp,sp,48
+20003b14:                    8082                       ret
+
+20003b16 <vTaskExitCritical>:
+vTaskExitCritical():
+/proc/self/cwd/external/freertos/tasks.c:4375
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskExitCritical( void )
+    {
+        if( xSchedulerRunning != pdFALSE )
+20003b16:              efffe517                 auipc   a0,0xefffe
+20003b1a:              5aa52503                 lw      a0,1450(a0) # 100020c0 <xSchedulerRunning>
+20003b1e:       /----- c105                     beqz    a0,20003b3e <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4377
+        {
+            if( pxCurrentTCB->uxCriticalNesting > 0U )
+20003b20:       |      efffe517                 auipc   a0,0xefffe
+20003b24:       |      58c52583                 lw      a1,1420(a0) # 100020ac <pxCurrentTCB>
+20003b28:       |      41ec                     lw      a1,68(a1)
+20003b2a:       +----- c991                     beqz    a1,20003b3e <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4379
+            {
+                ( pxCurrentTCB->uxCriticalNesting )--;
+20003b2c:       |      58c52583                 lw      a1,1420(a0)
+20003b30:       |      41f0                     lw      a2,68(a1)
+20003b32:       |      167d                     addi    a2,a2,-1
+20003b34:       |      c1f0                     sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4381
+
+                if( pxCurrentTCB->uxCriticalNesting == 0U )
+20003b36:       |      58c52503                 lw      a0,1420(a0)
+20003b3a:       |      4168                     lw      a0,68(a0)
+20003b3c:       |  /-- c111                     beqz    a0,20003b40 <vTaskExitCritical+0x2a>
+/proc/self/cwd/external/freertos/tasks.c:4399
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+20003b3e:       \--|-> 8082                     ret
+/proc/self/cwd/external/freertos/tasks.c:4383
+                    portENABLE_INTERRUPTS();
+20003b40:          \-> 30046073                 csrsi   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4399
+    }
+20003b44:              8082                     ret
+
+20003b46 <vTaskSwitchContext>:
+vTaskSwitchContext():
+/proc/self/cwd/external/freertos/tasks.c:3015
+{
+20003b46:              1141                     addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:3016
+    if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+20003b48:              c606                     sw      ra,12(sp)
+20003b4a:              c422                     sw      s0,8(sp)
+20003b4c:              efffe517                 auipc   a0,0xefffe
+20003b50:              58052503                 lw      a0,1408(a0) # 100020cc <uxSchedulerSuspended>
+20003b54:          /-- c519                     beqz    a0,20003b62 <vTaskSwitchContext+0x1c>
+/proc/self/cwd/external/freertos/tasks.c:3020
+        xYieldPending = pdTRUE;
+20003b56:          |   efffe517                 auipc   a0,0xefffe
+20003b5a:          |   4585                     li      a1,1
+20003b5c:          |   56b52d23                 sw      a1,1402(a0) # 100020d0 <xYieldPending>
+20003b60:       /--|-- a0a5                     j       20003bc8 <vTaskSwitchContext+0x82>
+/proc/self/cwd/external/freertos/tasks.c:3024
+        xYieldPending = pdFALSE;
+20003b62:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b66:       |      56052723                 sw      zero,1390(a0) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:3056
+        taskCHECK_FOR_STACK_OVERFLOW();
+20003b6a:       |      efffe417                 auipc   s0,0xefffe
+20003b6e:       |      54242503                 lw      a0,1346(s0) # 100020ac <pxCurrentTCB>
+20003b72:       |      4108                     lw      a0,0(a0)
+20003b74:       |      54242583                 lw      a1,1346(s0)
+20003b78:       |      598c                     lw      a1,48(a1)
+20003b7a:       |  /-- 00a5ea63                 bltu    a1,a0,20003b8e <vTaskSwitchContext+0x48>
+20003b7e:       |  |   54242503                 lw      a0,1346(s0)
+20003b82:       |  |   54242583                 lw      a1,1346(s0)
+20003b86:       |  |   03458593                 addi    a1,a1,52
+20003b8a:       |  |   b3efd0ef                 jal     ra,20000ec8 <vApplicationStackOverflowHook>
+/proc/self/cwd/external/freertos/tasks.c:3067
+        taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003b8e:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b92:       |      52252503                 lw      a0,1314(a0) # 100020b0 <uxTopReadyPriority>
+20003b96:       |      60051513                 clz     a0,a0
+20003b9a:       |      01f54513                 xori    a0,a0,31
+20003b9e:       |      20a54533                 sh2add  a0,a0,a0
+20003ba2:       |      efffe597                 auipc   a1,0xefffe
+20003ba6:       |      6ae58593                 addi    a1,a1,1710 # 10002250 <pxReadyTasksLists>
+20003baa:       |      20b545b3                 sh2add  a1,a0,a1
+20003bae:       |      41c8                     lw      a0,4(a1)
+20003bb0:       |      4148                     lw      a0,4(a0)
+20003bb2:       |      00858613                 addi    a2,a1,8
+20003bb6:       |      c1c8                     sw      a0,4(a1)
+20003bb8:       |  /-- 00c51563                 bne     a0,a2,20003bc2 <vTaskSwitchContext+0x7c>
+20003bbc:       |  |   4148                     lw      a0,4(a0)
+20003bbe:       |  |   0591                     addi    a1,a1,4
+20003bc0:       |  |   c188                     sw      a0,0(a1)
+20003bc2:       |  \-> 4548                     lw      a0,12(a0)
+20003bc4:       |      54a42123                 sw      a0,1346(s0)
+/proc/self/cwd/external/freertos/tasks.c:3087
+}
+20003bc8:       \----> 40b2                     lw      ra,12(sp)
+20003bca:              4422                     lw      s0,8(sp)
+20003bcc:              0141                     addi    sp,sp,16
+20003bce:              8082                     ret
+
+20003bd0 <vTaskStartScheduler>:
+vTaskStartScheduler():
+/proc/self/cwd/external/freertos/tasks.c:1991
+{
+20003bd0:           1141                        addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:2024
+            xReturn = xTaskCreate( prvIdleTask,
+20003bd2:           c606                        sw      ra,12(sp)
+20003bd4:           00000517            auipc   a0,0x0
+20003bd8:           05a50513            addi    a0,a0,90 # 20003c2e <prvIdleTask>
+20003bdc:           00002597            auipc   a1,0x2
+20003be0:           6c858593            addi    a1,a1,1736 # 200062a4 <uxTopUsedPriority+0x4>
+20003be4:           efffe617            auipc   a2,0xefffe
+20003be8:           4f060793            addi    a5,a2,1264 # 100020d4 <xIdleTaskHandle>
+20003bec:           10000613            li      a2,256
+20003bf0:           4681                        li      a3,0
+20003bf2:           4701                        li      a4,0
+20003bf4:           d37ff0ef            jal     ra,2000392a <xTaskCreate>
+20003bf8:           4585                        li      a1,1
+/proc/self/cwd/external/freertos/tasks.c:2046
+    if( xReturn == pdPASS )
+20003bfa:       /-- 02b51363            bne     a0,a1,20003c20 <vTaskStartScheduler+0x50>
+/proc/self/cwd/external/freertos/tasks.c:2062
+        portDISABLE_INTERRUPTS();
+20003bfe:       |   30047073            csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:2074
+        xNextTaskUnblockTime = portMAX_DELAY;
+20003c02:       |   efffe517            auipc   a0,0xefffe
+20003c06:       |   567d                        li      a2,-1
+20003c08:       |   4cc52b23            sw      a2,1238(a0) # 100020d8 <xNextTaskUnblockTime>
+/proc/self/cwd/external/freertos/tasks.c:2075
+        xSchedulerRunning = pdTRUE;
+20003c0c:       |   efffe517            auipc   a0,0xefffe
+20003c10:       |   4ab52a23            sw      a1,1204(a0) # 100020c0 <xSchedulerRunning>
+/proc/self/cwd/external/freertos/tasks.c:2076
+        xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+20003c14:       |   efffe517            auipc   a0,0xefffe
+20003c18:       |   4c052423            sw      zero,1224(a0) # 100020dc <xTickCount>
+/proc/self/cwd/external/freertos/tasks.c:2090
+        if( xPortStartScheduler() != pdFALSE )
+20003c1c:       |   aeafd0ef            jal     ra,20000f06 <xPortStartScheduler>
+/proc/self/cwd/external/freertos/tasks.c:2114
+    ( void ) uxTopUsedPriority;
+20003c20:       \-> 00002517            auipc   a0,0x2
+20003c24:           68052503            lw      a0,1664(a0) # 200062a0 <uxTopUsedPriority>
+/proc/self/cwd/external/freertos/tasks.c:2115
+}
+20003c28:           40b2                        lw      ra,12(sp)
+20003c2a:           0141                        addi    sp,sp,16
+20003c2c:           8082                        ret
+
+20003c2e <prvIdleTask>:
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3435
+{
+20003c2e:                 1101                  addi    sp,sp,-32
+20003c30:                 ce06                  sw      ra,28(sp)
+20003c32:                 cc22                  sw      s0,24(sp)
+20003c34:                 ca26                  sw      s1,20(sp)
+20003c36:                 c84a                  sw      s2,16(sp)
+20003c38:                 c64e                  sw      s3,12(sp)
+20003c3a:                 c452                  sw      s4,8(sp)
+20003c3c:                 c256                  sw      s5,4(sp)
+20003c3e:                 efffe497              auipc   s1,0xefffe
+20003c42:                 efffe917              auipc   s2,0xefffe
+20003c46:                 efffe997              auipc   s3,0xefffe
+20003c4a:                 efffea17              auipc   s4,0xefffe
+20003c4e:                 efffea97              auipc   s5,0xefffe
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3701
+            while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+20003c52:       /-------> 47a4a503              lw      a0,1146(s1) # 100020b8 <uxDeletedTasksWaitingCleanUp>
+20003c56:       |  /----- c521                  beqz    a0,20003c9e <prvIdleTask+0x70>
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003c58:       |  |      30047073              csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003c5c:       |  |      47e92503              lw      a0,1150(s2) # 100020c0 <xSchedulerRunning>
+20003c60:       |  |  /-- c901                  beqz    a0,20003c70 <prvIdleTask+0x42>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003c62:       |  |  |   45eaa503              lw      a0,1118(s5) # 100020ac <pxCurrentTCB>
+20003c66:       |  |  |   416c                  lw      a1,68(a0)
+20003c68:       |  |  |   0585                  addi    a1,a1,1
+20003c6a:       |  |  |   c16c                  sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003c6c:       |  |  |   45eaa503              lw      a0,1118(s5)
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3705
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003c70:       |  |  \-> 67a9a503              lw      a0,1658(s3) # 100022c0 <xTasksWaitingTermination+0xc>
+20003c74:       |  |      4540                  lw      s0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:3706
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+20003c76:       |  |      00440513              addi    a0,s0,4
+20003c7a:       |  |      2475                  jal     20003f26 <uxListRemove>
+/proc/self/cwd/external/freertos/tasks.c:3707
+                    --uxCurrentNumberOfTasks;
+20003c7c:       |  |      472a2503              lw      a0,1138(s4) # 100020bc <uxCurrentNumberOfTasks>
+20003c80:       |  |      157d                  addi    a0,a0,-1
+20003c82:       |  |      46aa2923              sw      a0,1138(s4)
+/proc/self/cwd/external/freertos/tasks.c:3708
+                    --uxDeletedTasksWaitingCleanUp;
+20003c86:       |  |      47a4a503              lw      a0,1146(s1)
+20003c8a:       |  |      157d                  addi    a0,a0,-1
+20003c8c:       |  |      46a4ad23              sw      a0,1146(s1)
+/proc/self/cwd/external/freertos/tasks.c:3710
+                taskEXIT_CRITICAL();
+20003c90:       |  |      e87ff0ef              jal     ra,20003b16 <vTaskExitCritical>
+prvDeleteTCB():
+/proc/self/cwd/external/freertos/tasks.c:3964
+                vPortFreeStack( pxTCB->pxStack );
+20003c94:       |  |      5808                  lw      a0,48(s0)
+20003c96:       |  |      2e15                  jal     20003fca <vPortFree>
+/proc/self/cwd/external/freertos/tasks.c:3965
+                vPortFree( pxTCB );
+20003c98:       |  |      8522                  mv      a0,s0
+20003c9a:       |  |      2e05                  jal     20003fca <vPortFree>
+20003c9c:       +--|----- bf5d                  j       20003c52 <prvIdleTask+0x24>
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3459
+                taskYIELD();
+20003c9e:       |  \----> 00000073              ecall
+20003ca2:       \-------- bf45                  j       20003c52 <prvIdleTask+0x24>
+
+20003ca4 <vTaskSuspendAll>:
+vTaskSuspendAll():
+/proc/self/cwd/external/freertos/tasks.c:2142
+    ++uxSchedulerSuspended;
+20003ca4:       efffe517                auipc   a0,0xefffe
+20003ca8:       42852583                lw      a1,1064(a0) # 100020cc <uxSchedulerSuspended>
+20003cac:       0585                    addi    a1,a1,1
+20003cae:       42b52423                sw      a1,1064(a0)
+/proc/self/cwd/external/freertos/tasks.c:2147
+}
+20003cb2:       8082                    ret
+
+20003cb4 <xTaskResumeAll>:
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2214
+{
+20003cb4:                    1101                       addi    sp,sp,-32
+20003cb6:                    ce06                       sw      ra,28(sp)
+20003cb8:                    cc22                       sw      s0,24(sp)
+20003cba:                    ca26                       sw      s1,20(sp)
+20003cbc:                    c84a                       sw      s2,16(sp)
+20003cbe:                    c64e                       sw      s3,12(sp)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003cc0:                    30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003cc4:                    efffe517           auipc   a0,0xefffe
+20003cc8:                    3fc52503           lw      a0,1020(a0) # 100020c0 <xSchedulerRunning>
+20003ccc:                /-- c911                       beqz    a0,20003ce0 <xTaskResumeAll+0x2c>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003cce:                |   efffe517           auipc   a0,0xefffe
+20003cd2:                |   3de52583           lw      a1,990(a0) # 100020ac <pxCurrentTCB>
+20003cd6:                |   41f0                       lw      a2,68(a1)
+20003cd8:                |   0605                       addi    a2,a2,1
+20003cda:                |   c1f0                       sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003cdc:                |   3de52503           lw      a0,990(a0)
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2229
+        --uxSchedulerSuspended;
+20003ce0:                \-> efffe517           auipc   a0,0xefffe
+20003ce4:                    3ec52583           lw      a1,1004(a0) # 100020cc <uxSchedulerSuspended>
+20003ce8:                    15fd                       addi    a1,a1,-1
+20003cea:                    3eb52623           sw      a1,1004(a0)
+/proc/self/cwd/external/freertos/tasks.c:2231
+        if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003cee:                    3ec52503           lw      a0,1004(a0)
+20003cf2:       /----------- e565                       bnez    a0,20003dda <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2233
+            if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+20003cf4:       |            efffe517           auipc   a0,0xefffe
+20003cf8:       |            3c852503           lw      a0,968(a0) # 100020bc <uxCurrentNumberOfTasks>
+20003cfc:       +----------- cd79                       beqz    a0,20003dda <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003cfe:       |            efffe517           auipc   a0,0xefffe
+20003d02:       |            5de50513           addi    a0,a0,1502 # 100022dc <xPendingReadyList>
+20003d06:       |            410c                       lw      a1,0(a0)
+20003d08:       |            efffe997           auipc   s3,0xefffe
+20003d0c:       |  /-------- c9dd                       beqz    a1,20003dc2 <xTaskResumeAll+0x10e>
+20003d0e:       |  |         efffe597           auipc   a1,0xefffe
+20003d12:       |  |         efffe617           auipc   a2,0xefffe
+20003d16:       |  |         53e60893           addi    a7,a2,1342 # 10002250 <pxReadyTasksLists>
+20003d1a:       |  |         efffe297           auipc   t0,0xefffe
+20003d1e:       |  |         4805                       li      a6,1
+/proc/self/cwd/external/freertos/tasks.c:2239
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003d20:       |  |  /----> 4558                       lw      a4,12(a0)
+20003d22:       |  |  |      4758                       lw      a4,12(a4)
+/proc/self/cwd/external/freertos/tasks.c:2240
+                    listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003d24:       |  |  |      5304                       lw      s1,32(a4)
+20003d26:       |  |  |      4f40                       lw      s0,28(a4)
+20003d28:       |  |  |      5710                       lw      a2,40(a4)
+20003d2a:       |  |  |      c404                       sw      s1,8(s0)
+20003d2c:       |  |  |      5304                       lw      s1,32(a4)
+20003d2e:       |  |  |      c0c0                       sw      s0,4(s1)
+20003d30:       |  |  |      4240                       lw      s0,4(a2)
+20003d32:       |  |  |      01870793           addi    a5,a4,24
+20003d36:       |  |  |  /-- 00f41363           bne     s0,a5,20003d3c <xTaskResumeAll+0x88>
+20003d3a:       |  |  |  |   c244                       sw      s1,4(a2)
+20003d3c:       |  |  |  \-> 02072423           sw      zero,40(a4)
+20003d40:       |  |  |      421c                       lw      a5,0(a2)
+20003d42:       |  |  |      17fd                       addi    a5,a5,-1
+20003d44:       |  |  |      c21c                       sw      a5,0(a2)
+/proc/self/cwd/external/freertos/tasks.c:2242
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003d46:       |  |  |      4750                       lw      a2,12(a4)
+20003d48:       |  |  |      471c                       lw      a5,8(a4)
+20003d4a:       |  |  |      4b44                       lw      s1,20(a4)
+20003d4c:       |  |  |      c790                       sw      a2,8(a5)
+20003d4e:       |  |  |      4740                       lw      s0,12(a4)
+20003d50:       |  |  |      c05c                       sw      a5,4(s0)
+20003d52:       |  |  |      40d0                       lw      a2,4(s1)
+20003d54:       |  |  |      00470793           addi    a5,a4,4
+20003d58:       |  |  |  /-- 00f61363           bne     a2,a5,20003d5e <xTaskResumeAll+0xaa>
+20003d5c:       |  |  |  |   c0c0                       sw      s0,4(s1)
+20003d5e:       |  |  |  \-> 4090                       lw      a2,0(s1)
+20003d60:       |  |  |      167d                       addi    a2,a2,-1
+20003d62:       |  |  |      c090                       sw      a2,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2243
+                    prvAddTaskToReadyList( pxTCB );
+20003d64:       |  |  |      5750                       lw      a2,44(a4)
+20003d66:       |  |  |      3a25a483           lw      s1,930(a1) # 100020b0 <uxTopReadyPriority>
+20003d6a:       |  |  |      28c494b3           bset    s1,s1,a2
+20003d6e:       |  |  |      3a95a123           sw      s1,930(a1)
+20003d72:       |  |  |      20c644b3           sh2add  s1,a2,a2
+20003d76:       |  |  |      2114c4b3           sh2add  s1,s1,a7
+20003d7a:       |  |  |      40c0                       lw      s0,4(s1)
+20003d7c:       |  |  |      c700                       sw      s0,8(a4)
+20003d7e:       |  |  |      4414                       lw      a3,8(s0)
+20003d80:       |  |  |      c754                       sw      a3,12(a4)
+20003d82:       |  |  |      4414                       lw      a3,8(s0)
+20003d84:       |  |  |      c2dc                       sw      a5,4(a3)
+20003d86:       |  |  |      c41c                       sw      a5,8(s0)
+20003d88:       |  |  |      cb44                       sw      s1,20(a4)
+20003d8a:       |  |  |      4094                       lw      a3,0(s1)
+20003d8c:       |  |  |      0685                       addi    a3,a3,1
+20003d8e:       |  |  |      c094                       sw      a3,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2247
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+20003d90:       |  |  |      3922a683           lw      a3,914(t0) # 100020ac <pxCurrentTCB>
+20003d94:       |  |  |      56d4                       lw      a3,44(a3)
+20003d96:       |  |  |  /-- 00d66463           bltu    a2,a3,20003d9e <xTaskResumeAll+0xea>
+/proc/self/cwd/external/freertos/tasks.c:2249
+                        xYieldPending = pdTRUE;
+20003d9a:       |  |  |  |   3d09a423           sw      a6,968(s3) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003d9e:       |  |  |  \-> 4110                       lw      a2,0(a0)
+20003da0:       |  |  \----- f241                       bnez    a2,20003d20 <xTaskResumeAll+0x6c>
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003da2:       |  |         efffe517           auipc   a0,0xefffe
+20003da6:       |  |         32252583           lw      a1,802(a0) # 100020c4 <pxDelayedTaskList>
+20003daa:       |  |         418c                       lw      a1,0(a1)
+20003dac:       |  |  /----- c591                       beqz    a1,20003db8 <xTaskResumeAll+0x104>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003dae:       |  |  |      32252503           lw      a0,802(a0)
+20003db2:       |  |  |      4548                       lw      a0,12(a0)
+20003db4:       |  |  |      4108                       lw      a0,0(a0)
+20003db6:       |  |  |  /-- a011                       j       20003dba <xTaskResumeAll+0x106>
+20003db8:       |  |  \--|-> 557d                       li      a0,-1
+20003dba:       |  |     \-> efffe597           auipc   a1,0xefffe
+20003dbe:       |  |         30a5af23           sw      a0,798(a1) # 100020d8 <xNextTaskUnblockTime>
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2273
+                    TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
+20003dc2:       |  \-------> efffe917           auipc   s2,0xefffe
+20003dc6:       |            31e92483           lw      s1,798(s2) # 100020e0 <xPendedTicks>
+/proc/self/cwd/external/freertos/tasks.c:2275
+                    if( xPendedCounts > ( TickType_t ) 0U )
+20003dca:       |     /----- c491                       beqz    s1,20003dd6 <xTaskResumeAll+0x122>
+/proc/self/cwd/external/freertos/tasks.c:2279
+                            if( xTaskIncrementTick() != pdFALSE )
+20003dcc:       |     |  /-> 200d                       jal     20003dee <xTaskIncrementTick>
+/proc/self/cwd/external/freertos/tasks.c:2288
+                            --xPendedCounts;
+20003dce:       |     |  |   14fd                       addi    s1,s1,-1
+/proc/self/cwd/external/freertos/tasks.c:2289
+                        } while( xPendedCounts > ( TickType_t ) 0U );
+20003dd0:       |     |  \-- fcf5                       bnez    s1,20003dcc <xTaskResumeAll+0x118>
+/proc/self/cwd/external/freertos/tasks.c:2291
+                        xPendedTicks = 0;
+20003dd2:       |     |      30092f23           sw      zero,798(s2)
+/proc/self/cwd/external/freertos/tasks.c:2299
+                if( xYieldPending != pdFALSE )
+20003dd6:       |     \----> 3c89a503           lw      a0,968(s3)
+/proc/self/cwd/external/freertos/tasks.c:2319
+    taskEXIT_CRITICAL();
+20003dda:       \----------> d3dff0ef           jal     ra,20003b16 <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:2321
+    return xAlreadyYielded;
+20003dde:                    4501                       li      a0,0
+20003de0:                    40f2                       lw      ra,28(sp)
+20003de2:                    4462                       lw      s0,24(sp)
+20003de4:                    44d2                       lw      s1,20(sp)
+20003de6:                    4942                       lw      s2,16(sp)
+20003de8:                    49b2                       lw      s3,12(sp)
+20003dea:                    6105                       addi    sp,sp,32
+20003dec:                    8082                       ret
+
+20003dee <xTaskIncrementTick>:
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2740
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003dee:                          efffe517             auipc   a0,0xefffe
+20003df2:                          2de52503             lw      a0,734(a0) # 100020cc <uxSchedulerSuspended>
+20003df6:                      /-- c909                 beqz    a0,20003e08 <xTaskIncrementTick+0x1a>
+/proc/self/cwd/external/freertos/tasks.c:2887
+        ++xPendedTicks;
+20003df8:                      |   efffe517             auipc   a0,0xefffe
+20003dfc:                      |   2e852583             lw      a1,744(a0) # 100020e0 <xPendedTicks>
+20003e00:                      |   0585                 addi    a1,a1,1
+20003e02:                      |   2eb52423             sw      a1,744(a0)
+20003e06:       /--------------|-- a209                 j       20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2744
+        const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+20003e08:       |              \-> efffe517             auipc   a0,0xefffe
+20003e0c:       |                  2d452283             lw      t0,724(a0) # 100020dc <xTickCount>
+20003e10:       |                  0285                 addi    t0,t0,1
+/proc/self/cwd/external/freertos/tasks.c:2748
+        xTickCount = xConstTickCount;
+20003e12:       |                  2c552a23             sw      t0,724(a0)
+20003e16:       |                  efffe317             auipc   t1,0xefffe
+20003e1a:       |                  efffe817             auipc   a6,0xefffe
+/proc/self/cwd/external/freertos/tasks.c:2750
+        if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+20003e1e:       |        /-------- 02029f63             bnez    t0,20003e5c <xTaskIncrementTick+0x6e>
+/proc/self/cwd/external/freertos/tasks.c:2752
+            taskSWITCH_DELAYED_LISTS();
+20003e22:       |        |         2ae32503             lw      a0,686(t1) # 100020c4 <pxDelayedTaskList>
+20003e26:       |        |         efffe597             auipc   a1,0xefffe
+20003e2a:       |        |         2a25a683             lw      a3,674(a1) # 100020c8 <pxOverflowDelayedTaskList>
+20003e2e:       |        |         2ad32723             sw      a3,686(t1)
+20003e32:       |        |         2aa5a123             sw      a0,674(a1)
+20003e36:       |        |         efffe517             auipc   a0,0xefffe
+20003e3a:       |        |         2ae52583             lw      a1,686(a0) # 100020e4 <xNumOfOverflows>
+20003e3e:       |        |         0585                 addi    a1,a1,1
+20003e40:       |        |         2ab52723             sw      a1,686(a0)
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e44:       |        |         2ae32503             lw      a0,686(t1)
+20003e48:       |        |         4108                 lw      a0,0(a0)
+20003e4a:       |        |  /----- c511                 beqz    a0,20003e56 <xTaskIncrementTick+0x68>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003e4c:       |        |  |      2ae32503             lw      a0,686(t1)
+20003e50:       |        |  |      4548                 lw      a0,12(a0)
+20003e52:       |        |  |      4108                 lw      a0,0(a0)
+20003e54:       |        |  |  /-- a011                 j       20003e58 <xTaskIncrementTick+0x6a>
+20003e56:       |        |  \--|-> 557d                 li      a0,-1
+20003e58:       |        |     \-> 2aa82f23             sw      a0,702(a6) # 100020d8 <xNextTaskUnblockTime>
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2763
+        if( xConstTickCount >= xNextTaskUnblockTime )
+20003e5c:       |        \-------> 2be82503             lw      a0,702(a6)
+20003e60:       +----------------- 0aa2e463             bltu    t0,a0,20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e64:       |                  2ae32503             lw      a0,686(t1)
+20003e68:       |                  4108                 lw      a0,0(a0)
+20003e6a:       |  /-------------- c949                 beqz    a0,20003efc <xTaskIncrementTick+0x10e>
+20003e6c:       |  |               efffe397             auipc   t2,0xefffe
+20003e70:       |  |               efffe517             auipc   a0,0xefffe
+20003e74:       |  |               3e050893             addi    a7,a0,992 # 10002250 <pxReadyTasksLists>
+/proc/self/cwd/external/freertos/tasks.c:2783
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003e78:       |  |     /-------> 2ae32503             lw      a0,686(t1)
+20003e7c:       |  |     |         4548                 lw      a0,12(a0)
+20003e7e:       |  |     |         4548                 lw      a0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:2784
+                    xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+20003e80:       |  |     |         414c                 lw      a1,4(a0)
+/proc/self/cwd/external/freertos/tasks.c:2786
+                    if( xConstTickCount < xItemValue )
+20003e82:       |  |  /--|-------- 08b2e163             bltu    t0,a1,20003f04 <xTaskIncrementTick+0x116>
+/proc/self/cwd/external/freertos/tasks.c:2802
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003e86:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e88:       |  |  |  |         4510                 lw      a2,8(a0)
+20003e8a:       |  |  |  |         4958                 lw      a4,20(a0)
+20003e8c:       |  |  |  |         c60c                 sw      a1,8(a2)
+20003e8e:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e90:       |  |  |  |         c1d0                 sw      a2,4(a1)
+20003e92:       |  |  |  |         4350                 lw      a2,4(a4)
+20003e94:       |  |  |  |         00450693             addi    a3,a0,4
+20003e98:       |  |  |  |     /-- 00d61363             bne     a2,a3,20003e9e <xTaskIncrementTick+0xb0>
+20003e9c:       |  |  |  |     |   c34c                 sw      a1,4(a4)
+20003e9e:       |  |  |  |     \-> 430c                 lw      a1,0(a4)
+20003ea0:       |  |  |  |         15fd                 addi    a1,a1,-1
+20003ea2:       |  |  |  |         c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003ea4:       |  |  |  |         5518                 lw      a4,40(a0)
+20003ea6:       |  |  |  |  /----- c30d                 beqz    a4,20003ec8 <xTaskIncrementTick+0xda>
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003ea8:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003eaa:       |  |  |  |  |      4d50                 lw      a2,28(a0)
+20003eac:       |  |  |  |  |      c60c                 sw      a1,8(a2)
+20003eae:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003eb0:       |  |  |  |  |      c1d0                 sw      a2,4(a1)
+20003eb2:       |  |  |  |  |      4350                 lw      a2,4(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003eb4:       |  |  |  |  |      01850793             addi    a5,a0,24
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003eb8:       |  |  |  |  |  /-- 00f61363             bne     a2,a5,20003ebe <xTaskIncrementTick+0xd0>
+20003ebc:       |  |  |  |  |  |   c34c                 sw      a1,4(a4)
+20003ebe:       |  |  |  |  |  \-> 02052423             sw      zero,40(a0)
+20003ec2:       |  |  |  |  |      430c                 lw      a1,0(a4)
+20003ec4:       |  |  |  |  |      15fd                 addi    a1,a1,-1
+20003ec6:       |  |  |  |  |      c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2817
+                    prvAddTaskToReadyList( pxTCB );
+20003ec8:       |  |  |  |  \----> 554c                 lw      a1,44(a0)
+20003eca:       |  |  |  |         2443a603             lw      a2,580(t2) # 100020b0 <uxTopReadyPriority>
+20003ece:       |  |  |  |         28b61633             bset    a2,a2,a1
+20003ed2:       |  |  |  |         24c3a223             sw      a2,580(t2)
+20003ed6:       |  |  |  |         20b5c5b3             sh2add  a1,a1,a1
+20003eda:       |  |  |  |         2115c5b3             sh2add  a1,a1,a7
+20003ede:       |  |  |  |         41d0                 lw      a2,4(a1)
+20003ee0:       |  |  |  |         c510                 sw      a2,8(a0)
+20003ee2:       |  |  |  |         4618                 lw      a4,8(a2)
+20003ee4:       |  |  |  |         c558                 sw      a4,12(a0)
+20003ee6:       |  |  |  |         4618                 lw      a4,8(a2)
+20003ee8:       |  |  |  |         c354                 sw      a3,4(a4)
+20003eea:       |  |  |  |         c614                 sw      a3,8(a2)
+20003eec:       |  |  |  |         c94c                 sw      a1,20(a0)
+20003eee:       |  |  |  |         4188                 lw      a0,0(a1)
+20003ef0:       |  |  |  |         0505                 addi    a0,a0,1
+20003ef2:       |  |  |  |         c188                 sw      a0,0(a1)
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003ef4:       |  |  |  |         2ae32503             lw      a0,686(t1)
+20003ef8:       |  |  |  |         4108                 lw      a0,0(a0)
+20003efa:       |  |  |  \-------- fd3d                 bnez    a0,20003e78 <xTaskIncrementTick+0x8a>
+20003efc:       |  \--|----------> 557d                 li      a0,-1
+/proc/self/cwd/external/freertos/tasks.c:2774
+                    xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+20003efe:       |     |            2aa82f23             sw      a0,702(a6)
+20003f02:       +-----|----------- a019                 j       20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2793
+                        xNextTaskUnblockTime = xItemValue;
+20003f04:       |     \----------> 2ab82f23             sw      a1,702(a6)
+/proc/self/cwd/external/freertos/tasks.c:2898
+    return xSwitchRequired;
+20003f08:       \----------------> 4501                 li      a0,0
+20003f0a:                          8082                 ret
+
+20003f0c <vListInitialise>:
+vListInitialise():
+/proc/self/cwd/external/freertos/list.c:55
+void vListInitialise( List_t * const pxList )
+{
+    /* The list structure contains a list item which is used to mark the
+     * end of the list.  To initialise the list the list end is inserted
+     * as the only list entry. */
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f0c:       00850593                addi    a1,a0,8
+20003f10:       c14c                    sw      a1,4(a0)
+20003f12:       567d                    li      a2,-1
+/proc/self/cwd/external/freertos/list.c:59
+
+    /* The list end value is the highest possible value in the list to
+     * ensure it remains at the end of the list. */
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
+20003f14:       c510                    sw      a2,8(a0)
+/proc/self/cwd/external/freertos/list.c:63
+
+    /* The list end next and previous pointers point to itself so we know
+     * when the list is empty. */
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );     /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f16:       c54c                    sw      a1,12(a0)
+/proc/self/cwd/external/freertos/list.c:64
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f18:       c90c                    sw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:66
+
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+20003f1a:       00052023                sw      zero,0(a0)
+/proc/self/cwd/external/freertos/list.c:72
+
+    /* Write known values into the list if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+}
+20003f1e:       8082                    ret
+
+20003f20 <vListInitialiseItem>:
+vListInitialiseItem():
+/proc/self/cwd/external/freertos/list.c:78
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+    /* Make sure the list item is not recorded as being on a list. */
+    pxItem->pxContainer = NULL;
+20003f20:       00052823                sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:84
+
+    /* Write known values into the list item if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+20003f24:       8082                    ret
+
+20003f26 <uxListRemove>:
+uxListRemove():
+/proc/self/cwd/external/freertos/list.c:194
+{
+/* The list item knows which list it is in.  Obtain the list from the list
+ * item. */
+    List_t * const pxList = pxItemToRemove->pxContainer;
+
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003f26:           4510                        lw      a2,8(a0)
+20003f28:           4154                        lw      a3,4(a0)
+/proc/self/cwd/external/freertos/list.c:192
+    List_t * const pxList = pxItemToRemove->pxContainer;
+20003f2a:           490c                        lw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:194
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003f2c:           c690                        sw      a2,8(a3)
+/proc/self/cwd/external/freertos/list.c:195
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+20003f2e:           4510                        lw      a2,8(a0)
+20003f30:           c254                        sw      a3,4(a2)
+/proc/self/cwd/external/freertos/list.c:201
+
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
+
+    /* Make sure the index is left pointing to a valid item. */
+    if( pxList->pxIndex == pxItemToRemove )
+20003f32:           41d4                        lw      a3,4(a1)
+20003f34:       /-- 00a69363            bne     a3,a0,20003f3a <uxListRemove+0x14>
+/proc/self/cwd/external/freertos/list.c:203
+    {
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
+20003f38:       |   c1d0                        sw      a2,4(a1)
+/proc/self/cwd/external/freertos/list.c:210
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxItemToRemove->pxContainer = NULL;
+20003f3a:       \-> 00052823            sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:211
+    ( pxList->uxNumberOfItems )--;
+20003f3e:           4188                        lw      a0,0(a1)
+20003f40:           157d                        addi    a0,a0,-1
+20003f42:           c188                        sw      a0,0(a1)
+/proc/self/cwd/external/freertos/list.c:213
+
+    return pxList->uxNumberOfItems;
+20003f44:           4188                        lw      a0,0(a1)
+20003f46:           8082                        ret
+
+20003f48 <pvPortMalloc>:
+pvPortMalloc():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:72
+static size_t xNextFreeByte = ( size_t ) 0;
+
+/*-----------------------------------------------------------*/
+
+void * pvPortMalloc( size_t xWantedSize )
+{
+20003f48:                 1141                  addi    sp,sp,-16
+20003f4a:                 c606                  sw      ra,12(sp)
+20003f4c:                 c422                  sw      s0,8(sp)
+20003f4e:                 c226                  sw      s1,4(sp)
+20003f50:                 c04a                  sw      s2,0(sp)
+20003f52:                 842a                  mv      s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:79
+    static uint8_t * pucAlignedHeap = NULL;
+
+    /* Ensure that blocks are always aligned. */
+    #if ( portBYTE_ALIGNMENT != 1 )
+        {
+            if( xWantedSize & portBYTE_ALIGNMENT_MASK )
+20003f54:                 893d                  andi    a0,a0,15
+20003f56:             /-- c909                  beqz    a0,20003f68 <pvPortMalloc+0x20>
+20003f58:             |   ff047513              andi    a0,s0,-16
+20003f5c:             |   0541                  addi    a0,a0,16
+20003f5e:             |   00a435b3              sltu    a1,s0,a0
+20003f62:             |   40b00433              neg     s0,a1
+20003f66:             |   8c69                  and     s0,s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:94
+                }
+            }
+        }
+    #endif
+
+    vTaskSuspendAll();
+20003f68:             \-> d3dff0ef              jal     ra,20003ca4 <vTaskSuspendAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:96
+    {
+        if( pucAlignedHeap == NULL )
+20003f6c:                 efffe517              auipc   a0,0xefffe
+20003f70:                 17c52483              lw      s1,380(a0) # 100020e8 <pvPortMalloc.pucAlignedHeap>
+20003f74:             /-- c099                  beqz    s1,20003f7a <pvPortMalloc+0x32>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+            /* Ensure the heap starts on a correctly aligned boundary. */
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+        }
+
+        /* Check there is enough room left for the allocation and. */
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f76:          /--|-- e811                  bnez    s0,20003f8a <pvPortMalloc+0x42>
+20003f78:       /--|--|-- a835                  j       20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:99
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+20003f7a:       |  |  \-> efffe597              auipc   a1,0xefffe
+20003f7e:       |  |      3ae58493              addi    s1,a1,942 # 10002328 <ucHeap+0x10>
+20003f82:       |  |      98c1                  andi    s1,s1,-16
+20003f84:       |  |      16952e23              sw      s1,380(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f88:       +--|----- c415                  beqz    s0,20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:104
+            ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
+20003f8a:       |  \----> efffe517              auipc   a0,0xefffe
+20003f8e:       |         16252903              lw      s2,354(a0) # 100020ec <xNextFreeByte>
+20003f92:       |         944a                  add     s0,s0,s2
+20003f94:       |         00445593              srli    a1,s0,0x4
+20003f98:       |         7ff5b593              sltiu   a1,a1,2047
+20003f9c:       |         00893633              sltu    a2,s2,s0
+20003fa0:       |         8df1                  and     a1,a1,a2
+20003fa2:       +-------- c989                  beqz    a1,20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:110
+            ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */
+        {
+            /* Return the next free byte then increment the index past this
+             * block. */
+            pvReturn = pucAlignedHeap + xNextFreeByte;
+            xNextFreeByte += xWantedSize;
+20003fa4:       |         16852123              sw      s0,354(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+        }
+
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
+20003fa8:       |         d0dff0ef              jal     ra,20003cb4 <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:119
+
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+20003fac:       |     /-- c491                  beqz    s1,20003fb8 <pvPortMalloc+0x70>
+20003fae:       |     |   01248533              add     a0,s1,s2
+20003fb2:       |  /--|-- a031                  j       20003fbe <pvPortMalloc+0x76>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+    ( void ) xTaskResumeAll();
+20003fb4:       \--|--|-> d01ff0ef              jal     ra,20003cb4 <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:122
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+20003fb8:          |  \-> ec7fc0ef              jal     ra,20000e7e <vApplicationMallocFailedHook>
+20003fbc:          |      4501                  li      a0,0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:127
+            }
+        }
+    #endif
+
+    return pvReturn;
+20003fbe:          \----> 40b2                  lw      ra,12(sp)
+20003fc0:                 4422                  lw      s0,8(sp)
+20003fc2:                 4492                  lw      s1,4(sp)
+20003fc4:                 4902                  lw      s2,0(sp)
+20003fc6:                 0141                  addi    sp,sp,16
+20003fc8:                 8082                  ret
+
+20003fca <vPortFree>:
+vPortFree():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:140
+     * https://www.FreeRTOS.org for more information. */
+    ( void ) pv;
+
+    /* Force an assert as it is invalid to call this function. */
+    configASSERT( pv == NULL );
+}
+20003fca:       8082                    ret
+
+20003fcc <manufacturer_pre_test_hook>:
+manufacturer_pre_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:14
+// The default test hooks do nothing, but exist as the OTTF expects some hooks
+// to exist. Additionally, they are weak symbols so they may be overridden by
+// other custom test hooks.
+
+OT_WEAK
+bool manufacturer_pre_test_hook(void) { return true; }
+20003fcc:       4505                    li      a0,1
+20003fce:       8082                    ret
+
+20003fd0 <manufacturer_post_test_hook>:
+manufacturer_post_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:17
+
+OT_WEAK
+bool manufacturer_post_test_hook(void) { return true; }
+20003fd0:       4505                    li      a0,1
+20003fd2:       8082                    ret
+
+20003fd4 <mmio_region_memcpy_from_mmio32>:
+mmio_region_memcpy_from_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:104
+  }
+}
+
+void mmio_region_memcpy_from_mmio32(mmio_region_t base, uint32_t offset,
+                                    void *dest, size_t len) {
+  mmio_region_memcpy32(base, offset, dest, len, true);
+20003fd4:       4705                    li      a4,1
+20003fd6:       a009                    j       20003fd8 <mmio_region_memcpy32>
+
+20003fd8 <mmio_region_memcpy32>:
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:27
+                                 uint8_t *buf, size_t len, bool from_mmio) {
+20003fd8:                    7179                       addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/base/mmio.c:28
+  if (len == 0) {
+20003fda:                    d606                       sw      ra,44(sp)
+20003fdc:                    d422                       sw      s0,40(sp)
+20003fde:                    d226                       sw      s1,36(sp)
+20003fe0:                    d04a                       sw      s2,32(sp)
+20003fe2:                    ce4e                       sw      s3,28(sp)
+20003fe4:                    cc52                       sw      s4,24(sp)
+20003fe6:                    ca56                       sw      s5,20(sp)
+20003fe8:                    c85a                       sw      s6,16(sp)
+20003fea:       /----------- c6d9                       beqz    a3,20004078 <mmio_region_memcpy32+0xa0>
+20003fec:       |            893a                       mv      s2,a4
+20003fee:       |            84b6                       mv      s1,a3
+20003ff0:       |            89b2                       mv      s3,a2
+20003ff2:       |            8b2e                       mv      s6,a1
+20003ff4:       |            8a2a                       mv      s4,a0
+misalignment32_of():
+/proc/self/cwd/./sw/device/lib/base/memory.h:58
+ * Computes how many bytes `addr` is ahead of the previous 32-bit word alignment
+ * boundary.
+ */
+OT_WARN_UNUSED_RESULT
+inline ptrdiff_t misalignment32_of(uintptr_t addr) {
+  return addr % alignof(uint32_t);
+20003ff6:       |            0035f513           andi    a0,a1,3
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:35
+  if (misalignment != 0) {
+20003ffa:       |  /-------- cd0d                       beqz    a0,20004034 <mmio_region_memcpy32+0x5c>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003ffc:       |  |         ffcb7413           andi    s0,s6,-4
+20004000:       |  |         9452                       add     s0,s0,s4
+20004002:       |  |         400c                       lw      a1,0(s0)
+20004004:       |  |         4611                       li      a2,4
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:38
+    size_t realignment = sizeof(uint32_t) - OT_UNSIGNED(misalignment);
+20004006:       |  |         8e09                       sub     a2,a2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:42
+    if (realignment > len) {
+20004008:       |  |         0a965ab3           minu    s5,a2,s1
+/proc/self/cwd/sw/device/lib/base/mmio.c:49
+    uint32_t current_word = mmio_region_read32(base, current_word_offset);
+2000400c:       |  |         c62e                       sw      a1,12(sp)
+2000400e:       |  |         006c                       addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/base/mmio.c:53
+    uint8_t *current_byte = ((uint8_t *)&current_word) + misalignment;
+20004010:       |  |         8dc9                       or      a1,a1,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:54
+    if (from_mmio) {
+20004012:       |  |     /-- 00090663           beqz    s2,2000401e <mmio_region_memcpy32+0x46>
+/proc/self/cwd/sw/device/lib/base/mmio.c:55
+      memcpy(buf, current_byte, realignment);
+20004016:       |  |     |   854e                       mv      a0,s3
+20004018:       |  |     |   8656                       mv      a2,s5
+2000401a:       |  |     |   289d                       jal     20004090 <memcpy>
+2000401c:       |  |  /--|-- a039                       j       2000402a <mmio_region_memcpy32+0x52>
+/proc/self/cwd/sw/device/lib/base/mmio.c:58
+      memcpy(current_byte, buf, realignment);
+2000401e:       |  |  |  \-> 852e                       mv      a0,a1
+20004020:       |  |  |      85ce                       mv      a1,s3
+20004022:       |  |  |      8656                       mv      a2,s5
+20004024:       |  |  |      20b5                       jal     20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:59
+      mmio_region_write32(base, current_word_offset, current_word);
+20004026:       |  |  |      4532                       lw      a0,12(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20004028:       |  |  |      c008                       sw      a0,0(s0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:64
+    len -= realignment;
+2000402a:       |  |  \----> 415484b3           sub     s1,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+2000402e:       +--|-------- c4a9                       beqz    s1,20004078 <mmio_region_memcpy32+0xa0>
+20004030:       |  |         9b56                       add     s6,s6,s5
+20004032:       |  |         99d6                       add     s3,s3,s5
+20004034:       |  \-------> 4a91                       li      s5,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:73
+    if (bytes_to_copy > len) {
+20004036:       |  /-------> 0044b513           sltiu   a0,s1,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+2000403a:       |  |         00a96533           or      a0,s2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:78
+    uint32_t current_word = 0;
+2000403e:       |  |         c402                       sw      zero,8(sp)
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+20004040:       |  |     /-- c511                       beqz    a0,2000404c <mmio_region_memcpy32+0x74>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20004042:       |  |     |   ffcb7513           andi    a0,s6,-4
+20004046:       |  |     |   9552                       add     a0,a0,s4
+20004048:       |  |     |   4108                       lw      a0,0(a0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:84
+      current_word = mmio_region_read32(base, OT_SIGNED(offset));
+2000404a:       |  |     |   c42a                       sw      a0,8(sp)
+2000404c:       |  |     \-> 0b54d433           minu    s0,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:88
+    if (from_mmio) {
+20004050:       |  |     /-- 00090763           beqz    s2,2000405e <mmio_region_memcpy32+0x86>
+/proc/self/cwd/sw/device/lib/base/mmio.c:89
+      memcpy(buf, &current_word, bytes_to_copy);
+20004054:       |  |     |   002c                       addi    a1,sp,8
+20004056:       |  |     |   854e                       mv      a0,s3
+20004058:       |  |     |   8622                       mv      a2,s0
+2000405a:       |  |     |   281d                       jal     20004090 <memcpy>
+2000405c:       |  |  /--|-- a811                       j       20004070 <mmio_region_memcpy32+0x98>
+/proc/self/cwd/sw/device/lib/base/mmio.c:92
+      memcpy(&current_word, buf, bytes_to_copy);
+2000405e:       |  |  |  \-> 0028                       addi    a0,sp,8
+20004060:       |  |  |      85ce                       mv      a1,s3
+20004062:       |  |  |      8622                       mv      a2,s0
+20004064:       |  |  |      2035                       jal     20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:93
+      mmio_region_write32(base, OT_SIGNED(offset), current_word);
+20004066:       |  |  |      4522                       lw      a0,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20004068:       |  |  |      ffcb7593           andi    a1,s6,-4
+2000406c:       |  |  |      95d2                       add     a1,a1,s4
+2000406e:       |  |  |      c188                       sw      a0,0(a1)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:96
+    offset += bytes_to_copy;
+20004070:       |  |  \----> 9b22                       add     s6,s6,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:98
+    len -= bytes_to_copy;
+20004072:       |  |         8c81                       sub     s1,s1,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:97
+    buf += bytes_to_copy;
+20004074:       |  |         99a2                       add     s3,s3,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+20004076:       |  \-------- f0e1                       bnez    s1,20004036 <mmio_region_memcpy32+0x5e>
+/proc/self/cwd/sw/device/lib/base/mmio.c:100
+}
+20004078:       \----------> 50b2                       lw      ra,44(sp)
+2000407a:                    5422                       lw      s0,40(sp)
+2000407c:                    5492                       lw      s1,36(sp)
+2000407e:                    5902                       lw      s2,32(sp)
+20004080:                    49f2                       lw      s3,28(sp)
+20004082:                    4a62                       lw      s4,24(sp)
+20004084:                    4ad2                       lw      s5,20(sp)
+20004086:                    4b42                       lw      s6,16(sp)
+20004088:                    6145                       addi    sp,sp,48
+2000408a:                    8082                       ret
+
+2000408c <mmio_region_memcpy_to_mmio32>:
+mmio_region_memcpy_to_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:112
+void mmio_region_memcpy_to_mmio32(mmio_region_t base, uint32_t offset,
+                                  const void *src, size_t len) {
+  // Below `const` cast is necessary to be able to use `mmio_region_memcpy32`
+  // for both read and write operations but `from_mmio = false` means that `src`
+  // will never be written to.
+  mmio_region_memcpy32(base, offset, (void *)src, len, false);
+2000408c:       4701                    li      a4,0
+2000408e:       b7a9                    j       20003fd8 <mmio_region_memcpy32>
+
+20004090 <memcpy>:
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:63
+  return word << 24 | word << 16 | word << 8 | word;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memcpy)(void *restrict dest,
+                                    const void *restrict src, size_t len) {
+  if (dest == NULL || src == NULL) {
+20004090:                    00153693           seqz    a3,a0
+20004094:                    0015b713           seqz    a4,a1
+20004098:                    8ed9                       or      a3,a3,a4
+2000409a:       /----------- eabd                       bnez    a3,20004110 <memcpy+0x80>
+2000409c:       |            4691                       li      a3,4
+2000409e:       |            88b2                       mv      a7,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+200040a0:       |        /-- 00d66c63           bltu    a2,a3,200040b8 <memcpy+0x28>
+200040a4:       |        |   00a5c6b3           xor     a3,a1,a0
+200040a8:       |        |   8a8d                       andi    a3,a3,3
+200040aa:       |        |   8832                       mv      a6,a2
+200040ac:       |        |   88b2                       mv      a7,a2
+200040ae:       |     /--|-- ee81                       bnez    a3,200040c6 <memcpy+0x36>
+200040b0:       |     |  |   40a006b3           neg     a3,a0
+200040b4:       |     |  |   0036f893           andi    a7,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+200040b8:       |     |  \-> 411606b3           sub     a3,a2,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+200040bc:       |     |      9af1                       andi    a3,a3,-4
+200040be:       |     |      0116e833           or      a6,a3,a7
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  unsigned char *dest8 = (unsigned char *)dest;
+  const unsigned char *src8 = (const unsigned char *)src;
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, src, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+200040c2:       |  /--|----- 00088d63           beqz    a7,200040dc <memcpy+0x4c>
+200040c6:       |  |  \----> 82ae                       mv      t0,a1
+200040c8:       |  |         872a                       mv      a4,a0
+200040ca:       |  |         86c6                       mv      a3,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:72
+    dest8[i] = src8[i];
+200040cc:       |  |     /-> 00028783           lb      a5,0(t0)
+200040d0:       |  |     |   00f70023           sb      a5,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  for (; i < body_offset; ++i) {
+200040d4:       |  |     |   16fd                       addi    a3,a3,-1
+200040d6:       |  |     |   0705                       addi    a4,a4,1
+200040d8:       |  |     |   0285                       addi    t0,t0,1
+200040da:       |  |     \-- faed                       bnez    a3,200040cc <memcpy+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  }
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200040dc:       |  \--/----X 0108fb63           bgeu    a7,a6,200040f2 <memcpy+0x62>
+/proc/self/cwd/sw/device/lib/base/memory.c:75
+    uint32_t word = read_32(&src8[i]);
+200040e0:       |     |  /-> 011586b3           add     a3,a1,a7
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  // Failing to get that particular codegen in either GCC or Clang with -O2 or
+  // -Os set shall be considered a bug in this function. The same applies to
+  // `write32()`.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  uint32_t val;
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200040e4:       |     |  |   4294                       lw      a3,0(a3)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:76
+    write_32(word, &dest8[i]);
+200040e6:       |     |  |   01150733           add     a4,a0,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200040ea:       |     |  |   0891                       addi    a7,a7,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+inline void write_32(uint32_t value, void *ptr) {
+  // Both GCC and Clang optimize the code below into a single word-store on most
+  // platforms. See the comment in `read_32()` for more implementation-private
+  // information.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  __builtin_memcpy(ptr, &value, sizeof(uint32_t));
+200040ec:       |     |  |   c314                       sw      a3,0(a4)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+200040ee:       |     |  \-- ff08e9e3           bltu    a7,a6,200040e0 <memcpy+0x50>
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  }
+  for (; i < len; ++i) {
+200040f2:       +-----\----X 00c8ff63           bgeu    a7,a2,20004110 <memcpy+0x80>
+200040f6:       |            41160633           sub     a2,a2,a7
+200040fa:       |            01150733           add     a4,a0,a7
+200040fe:       |            95c6                       add     a1,a1,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:79
+    dest8[i] = src8[i];
+20004100:       |        /-> 00058683           lb      a3,0(a1)
+20004104:       |        |   00d70023           sb      a3,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  for (; i < len; ++i) {
+20004108:       |        |   167d                       addi    a2,a2,-1
+2000410a:       |        |   0705                       addi    a4,a4,1
+2000410c:       |        |   0585                       addi    a1,a1,1
+2000410e:       |        \-- fa6d                       bnez    a2,20004100 <memcpy+0x70>
+/proc/self/cwd/sw/device/lib/base/memory.c:82
+  }
+  return dest;
+}
+20004110:       \----------> 8082                       ret
+
+20004112 <memset>:
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:84
+
+void *OT_PREFIX_IF_NOT_RV32(memset)(void *dest, int value, size_t len) {
+20004112:                 4691                  li      a3,4
+20004114:                 8732                  mv      a4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004116:             /-- 00d66563              bltu    a2,a3,20004120 <memset+0xe>
+2000411a:             |   40a00733              neg     a4,a0
+2000411e:             |   8b0d                  andi    a4,a4,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+20004120:             \-> 40e606b3              sub     a3,a2,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+20004124:                 9af1                  andi    a3,a3,-4
+20004126:                 00e6e833              or      a6,a3,a4
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+2000412a:          /----- cb01                  beqz    a4,2000413a <memset+0x28>
+2000412c:          |      87aa                  mv      a5,a0
+2000412e:          |      86ba                  mv      a3,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:92
+    dest8[i] = value8;
+20004130:          |  /-> 00b78023              sb      a1,0(a5)
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  for (; i < body_offset; ++i) {
+20004134:          |  |   16fd                  addi    a3,a3,-1
+20004136:          |  |   0785                  addi    a5,a5,1
+20004138:          |  \-- fee5                  bnez    a3,20004130 <memset+0x1e>
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+2000413a:       /--\----X 03077063              bgeu    a4,a6,2000415a <memset+0x48>
+2000413e:       |         0ff5f693              andi    a3,a1,255
+20004142:       |         010107b7              lui     a5,0x1010
+20004146:       |         10178793              addi    a5,a5,257 # 1010101 <_ottf_size+0xf90101>
+2000414a:       |         02f687b3              mul     a5,a3,a5
+/proc/self/cwd/sw/device/lib/base/memory.c:96
+    write_32(value32, &dest8[i]);
+2000414e:       |     /-> 00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004152:       |     |   0711                  addi    a4,a4,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+20004154:       |     |   c29c                  sw      a5,0(a3)
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+20004156:       |     \-- ff076ce3              bltu    a4,a6,2000414e <memset+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  }
+  for (; i < len; ++i) {
+2000415a:       \--/----X 00c77a63              bgeu    a4,a2,2000416e <memset+0x5c>
+2000415e:          |      8e19                  sub     a2,a2,a4
+20004160:          |      00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:99
+    dest8[i] = value8;
+20004164:          |  /-> 00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  for (; i < len; ++i) {
+20004168:          |  |   167d                  addi    a2,a2,-1
+2000416a:          |  |   0685                  addi    a3,a3,1
+2000416c:          |  \-- fe65                  bnez    a2,20004164 <memset+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:101
+  }
+  return dest;
+2000416e:          \----> 8082                  ret
+
+20004170 <memchr>:
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:190
+    }
+  }
+  return kMemCmpEq;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memchr)(const void *ptr, int value, size_t len) {
+20004170:                             4691                      li      a3,4
+20004172:                             8eb2                      mv      t4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004174:                         /-- 00d66663                  bltu    a2,a3,20004180 <memchr+0x10>
+20004178:                         |   40a00733                  neg     a4,a0
+2000417c:                         |   00377e93                  andi    t4,a4,3
+20004180:                         \-> 0ff5fe13                  andi    t3,a1,255
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+20004184:                      /----- 000e8b63                  beqz    t4,2000419a <memchr+0x2a>
+20004188:                      |      85aa                      mv      a1,a0
+2000418a:                      |      87f6                      mv      a5,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:198
+    if (ptr8[i] == value8) {
+2000418c:                      |  /-> 0005c683                  lbu     a3,0(a1)
+20004190:       /--------------|--|-- 07c68f63                  beq     a3,t3,2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  for (; i < body_offset; ++i) {
+20004194:       |              |  |   17fd                      addi    a5,a5,-1
+20004196:       |              |  |   0585                      addi    a1,a1,1
+20004198:       |              |  \-- fbf5                      bnez    a5,2000418c <memchr+0x1c>
+2000419a:       |              \----> 41d605b3                  sub     a1,a2,t4
+2000419e:       |                     99f1                      andi    a1,a1,-4
+200041a0:       |                     01d5e833                  or      a6,a1,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+      return (void *)&ptr8[i];
+    }
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200041a4:       |  /----------------- 050ef763                  bgeu    t4,a6,200041f2 <memchr+0x82>
+200041a8:       |  |                  010105b7                  lui     a1,0x1010
+200041ac:       |  |                  10158593                  addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+200041b0:       |  |                  02be02b3                  mul     t0,t3,a1
+200041b4:       |  |                  0ff00893                  li      a7,255
+200041b8:       |  |                  65c1                      lui     a1,0x10
+200041ba:       |  |                  f0058393                  addi    t2,a1,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+200041be:       |  |                  00ff0337                  lui     t1,0xff0
+/proc/self/cwd/sw/device/lib/base/memory.c:204
+    uint32_t word = read_32(&ptr8[i]);
+200041c2:       |  |              /-> 01d505b3                  add     a1,a0,t4
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200041c6:       |  |              |   4194                      lw      a3,0(a1)
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:205
+    uint32_t bits_eq = ~(word ^ value32);
+200041c8:       |  |              |   0056c7b3                  xor     a5,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:208
+    static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+                  "memchr assumes that the system is little endian.");
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+200041cc:       |  |              |   40f8f733                  andn    a4,a7,a5
+200041d0:       +--|--------------|-- 03170f63                  beq     a4,a7,2000420e <memchr+0x9e>
+200041d4:       |  |              |   4056c6b3                  xnor    a3,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:211
+      return (void *)&ptr8[i];
+    }
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+200041d8:       |  |              |   0076f733                  and     a4,a3,t2
+200041dc:       |  |  /-----------|-- 02770b63                  beq     a4,t2,20004212 <memchr+0xa2>
+/proc/self/cwd/sw/device/lib/base/memory.c:214
+      return (void *)&ptr8[i + 1];
+    }
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+200041e0:       |  |  |           |   0066f6b3                  and     a3,a3,t1
+200041e4:       |  |  |  /--------|-- 02668963                  beq     a3,t1,20004216 <memchr+0xa6>
+/proc/self/cwd/sw/device/lib/base/memory.c:217
+      return (void *)&ptr8[i + 2];
+    }
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+200041e8:       |  |  |  |        |   83e1                      srli    a5,a5,0x18
+200041ea:       |  |  |  |  /-----|-- cb85                      beqz    a5,2000421a <memchr+0xaa>
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200041ec:       |  |  |  |  |     |   0e91                      addi    t4,t4,4
+200041ee:       |  |  |  |  |     \-- fd0eeae3                  bltu    t4,a6,200041c2 <memchr+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+      return (void *)&ptr8[i + 3];
+    }
+  }
+  for (; i < len; ++i) {
+200041f2:       |  \--|--|--|--/----X 00cefd63                  bgeu    t4,a2,2000420c <memchr+0x9c>
+200041f6:       |     |  |  |  |      41d60633                  sub     a2,a2,t4
+200041fa:       |     |  |  |  |      01d505b3                  add     a1,a0,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:222
+    if (ptr8[i] == value8) {
+200041fe:       |     |  |  |  |  /-> 0005c503                  lbu     a0,0(a1)
+20004202:       +-----|--|--|--|--|-- 01c50663                  beq     a0,t3,2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+  for (; i < len; ++i) {
+20004206:       |     |  |  |  |  |   167d                      addi    a2,a2,-1
+20004208:       |     |  |  |  |  |   0585                      addi    a1,a1,1
+2000420a:       |     |  |  |  |  \-- fa75                      bnez    a2,200041fe <memchr+0x8e>
+2000420c:       |     |  |  |  \----> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/base/memory.c:227
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+2000420e:       >-----|--|--|-------> 852e                      mv      a0,a1
+20004210:       |     |  |  |         8082                      ret
+/proc/self/cwd/sw/device/lib/base/memory.c:212
+      return (void *)&ptr8[i + 1];
+20004212:       |     \--|--|-------> 0585                      addi    a1,a1,1
+20004214:       +--------|--|-------- bfed                      j       2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:215
+      return (void *)&ptr8[i + 2];
+20004216:       |        \--|-------> 0589                      addi    a1,a1,2
+20004218:       +-----------|-------- bfdd                      j       2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:218
+      return (void *)&ptr8[i + 3];
+2000421a:       |           \-------> 058d                      addi    a1,a1,3
+2000421c:       \-------------------- bfcd                      j       2000420e <memchr+0x9e>
+
+2000421e <memrchr>:
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:229
+
+void *OT_PREFIX_IF_NOT_RV32(memrchr)(const void *ptr, int value, size_t len) {
+2000421e:                          4691                 li      a3,4
+20004220:                          82b2                 mv      t0,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004222:                      /-- 00d66663             bltu    a2,a3,2000422e <memrchr+0x10>
+20004226:                      |   40a006b3             neg     a3,a0
+2000422a:                      |   0036f293             andi    t0,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+2000422e:                      \-> 405606b3             sub     a3,a2,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+20004232:                          9af1                 andi    a3,a3,-4
+20004234:                          0056e7b3             or      a5,a3,t0
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:237
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+
+  size_t end = len;
+  for (; end > tail_offset; --end) {
+20004238:                          0ac7d3b3             minu    t2,a5,a2
+2000423c:                          00c50733             add     a4,a0,a2
+20004240:                          0ff5f313             andi    t1,a1,255
+20004244:                   /--/-X 00c7fc63             bgeu    a5,a2,2000425c <memrchr+0x3e>
+/proc/self/cwd/sw/device/lib/base/memory.c:239
+    const size_t i = end - 1;
+    if (ptr8[i] == value8) {
+20004248:                   |  |   fff74683             lbu     a3,-1(a4)
+2000424c:                   |  |   fff70593             addi    a1,a4,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:238
+    const size_t i = end - 1;
+20004250:                   |  |   167d                 addi    a2,a2,-1
+20004252:                   |  |   872e                 mv      a4,a1
+20004254:                   |  \-- fe6698e3             bne     a3,t1,20004244 <memrchr+0x26>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+    if (ptr8[i] == value8) {
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+20004258:       /-----------|----> 852e                 mv      a0,a1
+2000425a:       |           |      8082                 ret
+2000425c:       |           \----> 010105b7             lui     a1,0x1010
+20004260:       |                  10158593             addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+repeat_byte_to_u32():
+/proc/self/cwd/sw/device/lib/base/memory.c:58
+  return word << 24 | word << 16 | word << 8 | word;
+20004264:       |                  02b305b3             mul     a1,t1,a1
+20004268:       |                  00ff0837             lui     a6,0xff0
+2000426c:       |                  6641                 lui     a2,0x10
+2000426e:       |                  f0060613             addi    a2,a2,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+20004272:       |                  0ff00893             li      a7,255
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:244
+  for (; end > body_offset; end -= sizeof(uint32_t)) {
+20004276:       |           /--/-X 0272fc63             bgeu    t0,t2,200042ae <memrchr+0x90>
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:88
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+2000427a:       |           |  |   007507b3             add     a5,a0,t2
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+2000427e:       |           |  |   ffc7a703             lw      a4,-4(a5)
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:247
+    uint32_t bits_eq = ~(word ^ value32);
+20004282:       |           |  |   00b746b3             xor     a3,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:250
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+20004286:       |           |  |   82e1                 srli    a3,a3,0x18
+20004288:       |  /--------|--|-- ce9d                 beqz    a3,200042c6 <memrchr+0xa8>
+2000428a:       |  |        |  |   40b74733             xnor    a4,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:253
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+2000428e:       |  |        |  |   010776b3             and     a3,a4,a6
+20004292:       |  |  /-----|--|-- 03068d63             beq     a3,a6,200042cc <memrchr+0xae>
+/proc/self/cwd/sw/device/lib/base/memory.c:256
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+20004296:       |  |  |     |  |   00c776b3             and     a3,a4,a2
+2000429a:       |  |  |  /--|--|-- 02c68c63             beq     a3,a2,200042d2 <memrchr+0xb4>
+/proc/self/cwd/sw/device/lib/base/memory.c:259
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+2000429e:       |  |  |  |  |  |   0ff77693             andi    a3,a4,255
+/proc/self/cwd/sw/device/lib/base/memory.c:245
+    const size_t i = end - sizeof(uint32_t);
+200042a2:       |  |  |  |  |  |   13f1                 addi    t2,t2,-4
+200042a4:       |  |  |  |  |  \-- fd1699e3             bne     a3,a7,20004276 <memrchr+0x58>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+}
+200042a8:       |  |  |  |  |      007505b3             add     a1,a0,t2
+200042ac:       +--|--|--|--|----- b775                 j       20004258 <memrchr+0x3a>
+200042ae:       |  |  |  |  \----> 951e                 add     a0,a0,t2
+200042b0:       |  |  |  |  /--/-X 02038463             beqz    t2,200042d8 <memrchr+0xba>
+/proc/self/cwd/sw/device/lib/base/memory.c:265
+    if (ptr8[i] == value8) {
+200042b4:       |  |  |  |  |  |   fff54603             lbu     a2,-1(a0)
+200042b8:       |  |  |  |  |  |   fff50593             addi    a1,a0,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:264
+    const size_t i = end - 1;
+200042bc:       |  |  |  |  |  |   13fd                 addi    t2,t2,-1
+200042be:       |  |  |  |  |  |   852e                 mv      a0,a1
+200042c0:       |  |  |  |  |  \-- fe6618e3             bne     a2,t1,200042b0 <memrchr+0x92>
+200042c4:       +--|--|--|--|----- bf51                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:251
+      return (void *)&ptr8[i + 3];
+200042c6:       |  \--|--|--|----> fff78593             addi    a1,a5,-1
+200042ca:       +-----|--|--|----- b779                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:254
+      return (void *)&ptr8[i + 2];
+200042cc:       |     \--|--|----> ffe78593             addi    a1,a5,-2
+200042d0:       +--------|--|----- b761                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:257
+      return (void *)&ptr8[i + 1];
+200042d2:       |        \--|----> ffd78593             addi    a1,a5,-3
+200042d6:       +-----------|----- b749                 j       20004258 <memrchr+0x3a>
+200042d8:       |           \----> 4581                 li      a1,0
+200042da:       \----------------- bfbd                 j       20004258 <memrchr+0x3a>
+
+200042dc <udiv64_slow>:
+udiv64_slow():
+/proc/self/cwd/sw/device/lib/base/math.c:14
+/**
+ * Extern declaration of inline function.
+ */
+extern size_t ceil_div(size_t a, size_t b);
+
+uint64_t udiv64_slow(uint64_t a, uint64_t b, uint64_t *rem_out) {
+200042dc:                 1141                  addi    sp,sp,-16
+200042de:                 c622                  sw      s0,12(sp)
+200042e0:                 4881                  li      a7,0
+200042e2:                 4801                  li      a6,0
+200042e4:                 4381                  li      t2,0
+200042e6:                 4e01                  li      t3,0
+200042e8:                 03f00f93              li      t6,63
+200042ec:                 00159293              slli    t0,a1,0x1
+200042f0:                 537d                  li      t1,-1
+/proc/self/cwd/sw/device/lib/base/math.c:28
+  // upon.
+  size_t bits = sizeof(uint64_t) * 8;
+  for (size_t i = 0; i < bits; ++i) {
+    rem <<= 1;
+    quot <<= 1;
+    rem |= (a >> (bits - i - 1)) & 1;
+200042f2:       /-------> fe0f8793              addi    a5,t6,-32
+200042f6:       |     /-- 0007c563              bltz    a5,20004300 <udiv64_slow+0x24>
+200042fa:       |     |   01f5deb3              srl     t4,a1,t6
+200042fe:       |  /--|-- a809                  j       20004310 <udiv64_slow+0x34>
+20004300:       |  |  \-> 01f55eb3              srl     t4,a0,t6
+20004304:       |  |      ffffc793              not     a5,t6
+20004308:       |  |      00f297b3              sll     a5,t0,a5
+2000430c:       |  |      00feeeb3              or      t4,t4,a5
+20004310:       |  \----> 01f3d793              srli    a5,t2,0x1f
+20004314:       |         0e06                  slli    t3,t3,0x1
+20004316:       |         00fe6e33              or      t3,t3,a5
+2000431a:       |         0386                  slli    t2,t2,0x1
+2000431c:       |         001ef793              andi    a5,t4,1
+20004320:       |         0077eeb3              or      t4,a5,t2
+/proc/self/cwd/sw/device/lib/base/math.c:34
+
+    // We need to keep bringing down zeros until `rem`, the running total, is
+    // large enough that we can subtract off `b`; this tells us the value we
+    // would have had to multiply `a` by to produce this current step in the
+    // division.
+    if (rem >= b) {
+20004324:       |  /----- 00de0563              beq     t3,a3,2000432e <udiv64_slow+0x52>
+20004328:       |  |      00de37b3              sltu    a5,t3,a3
+2000432c:       |  |  /-- a019                  j       20004332 <udiv64_slow+0x56>
+2000432e:       |  \--|-> 00ceb7b3              sltu    a5,t4,a2
+20004332:       |     \-> 0017cf13              xori    t5,a5,1
+20004336:       |         01f8d793              srli    a5,a7,0x1f
+2000433a:       |         0806                  slli    a6,a6,0x1
+2000433c:       |         00f86833              or      a6,a6,a5
+20004340:       |         0886                  slli    a7,a7,0x1
+20004342:       |         41e007b3              neg     a5,t5
+20004346:       |         00d7f433              and     s0,a5,a3
+2000434a:       |         8ff1                  and     a5,a5,a2
+2000434c:       |         40fe83b3              sub     t2,t4,a5
+20004350:       |         00feb7b3              sltu    a5,t4,a5
+20004354:       |         408e0433              sub     s0,t3,s0
+20004358:       |         40f40e33              sub     t3,s0,a5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+2000435c:       |         1ffd                  addi    t6,t6,-1
+/proc/self/cwd/sw/device/lib/base/math.c:34
+    if (rem >= b) {
+2000435e:       |         01e8e8b3              or      a7,a7,t5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+20004362:       \-------- f86f98e3              bne     t6,t1,200042f2 <udiv64_slow+0x16>
+/proc/self/cwd/sw/device/lib/base/math.c:40
+      rem -= b;
+      quot |= 1;
+    }
+  }
+
+  if (rem_out != NULL) {
+20004366:             /-- c709                  beqz    a4,20004370 <udiv64_slow+0x94>
+/proc/self/cwd/sw/device/lib/base/math.c:41
+    *rem_out = rem;
+20004368:             |   00772023              sw      t2,0(a4)
+2000436c:             |   01c72223              sw      t3,4(a4)
+/proc/self/cwd/sw/device/lib/base/math.c:43
+  }
+  return quot;
+20004370:             \-> 8546                  mv      a0,a7
+20004372:                 85c2                  mv      a1,a6
+20004374:                 4432                  lw      s0,12(sp)
+20004376:                 0141                  addi    sp,sp,16
+20004378:                 8082                  ret
+
+2000437a <to_cpu_cycles>:
+to_cpu_cycles():
+/proc/self/cwd/sw/device/lib/arch/device_silicon.c:23
+
+const uint64_t kClockFreqCpuMhz = 100;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+2000437a:       06400613                li      a2,100
+2000437e:       02c585b3                mul     a1,a1,a2
+20004382:       02c536b3                mulhu   a3,a0,a2
+20004386:       95b6                    add     a1,a1,a3
+20004388:       02c50533                mul     a0,a0,a2
+2000438c:       8082                    ret
+2000438e:       0000                    unimp
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.signed.bin b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..401a51233daef
Binary files /dev/null and b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.dis b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.dis
new file mode 100644
index 0000000000000..5c52da9d4b254
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.dis
@@ -0,0 +1,22507 @@
+
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_sim_dv.elf:     file format elf32-littleriscv
+bazel-out/k8-fastbuild-ST-2cc462681f62/bin/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test_sim_dv.elf
+architecture: riscv:rv32, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x20000480
+
+Program Header:
+    LOAD off    0x000000d4 vaddr 0x00000000 paddr 0x00000000 align 2**12
+         filesz 0x00000000 memsz 0x00000000 flags ---
+    LOAD off    0x00001000 vaddr 0x20000000 paddr 0x20000000 align 2**12
+         filesz 0x000065b0 memsz 0x000065b0 flags rwx
+    LOAD off    0x00007fe8 vaddr 0x10001fe8 paddr 0x200065b0 align 2**12
+         filesz 0x00000084 memsz 0x00000330 flags rw-
+    LOAD off    0x00000318 vaddr 0x10002318 paddr 0x20006634 align 2**12
+         filesz 0x00000000 memsz 0x00008000 flags rw-
+    LOAD off    0x00000000 vaddr 0x20079000 paddr 0x20079000 align 2**12
+         filesz 0x00000000 memsz 0x00000800 flags rw-
+
+Sections:
+Idx Name                     Size      VMA       LMA       File off  Algn  Flags
+  0 .static_critical         00001fe8  10000000  10000000  00000000  2**2  ALLOC
+  1 .manifest                00000400  20000000  20000000  00001000  2**2  CONTENTS, ALLOC, LOAD, DATA
+  2 .rom_ext_immutable       00000000  20000400  20000400  0000806c  2**2  CONTENTS
+  3 .vectors                 00000080  20000400  20000400  00001400  2**8  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  4 .crt                     000000c6  20000480  20000480  00001480  2**2  CONTENTS, ALLOC, LOAD, READONLY, CODE
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+00001551 l       .debug_str     00000000 
+0000248e l       .debug_str     00000000 
+00000b70 l       .debug_frame   00000000 
+2000253c g     F .text  000000d0 rand_testutils_init
+2007b000 g       *ABS*  00000000 _non_volatile_scratch_start
+20079800 g       *ABS*  00000000 _non_volatile_counter_3_end
+20000400 g       .rom_ext_immutable     00000000 _rom_ext_immutable_end
+200036d2 g     F .text  0000002a dif_uart_irq_is_pending
+20000a84 g     F .text  00000038 dif_gpio_write
+20003742 g     F .text  00000018 dif_uart_irq_disable_all
+20079000 g       *ABS*  00000000 _non_volatile_counter_3_start
+200022b4  w    F .text  00000022 ottf_instr_misaligned_fault_handler
+2007b000 g       .non_volatile_scratch  00000000 begin_of_non_volatile_scratch
+2000352e g     F .text  0000001e dif_spi_device_get_flash_command_fifo_occupancy
+200023d4  w    F .text  0000001c ottf_external_nmi_handler
+100027e8 g       .data  00000000 __global_pointer$
+10002094 g     O .bss   00000004 ottf_plic
+10000004 g     O .static_critical       00000040 boot_measurements
+200022b4  w    F .text  00000022 ottf_instr_access_fault_handler
+20003414 g     F .text  0000001a dif_spi_device_get_last_read_address
+2000421e g     F .text  000000be memrchr
+2000385e g     F .text  00000022 dif_uart_watermark_rx_set
+200038bc g     F .text  00000022 dif_uart_byte_send_polled
+200022b4  w    F .text  00000022 ottf_user_ecall_handler
+20001304 g     F .text  00000316 ottf_console_configure_spi_device
+200020a2 g     F .text  0000000e dif_pinmux_init
+20004390 g       .shutdown      00000000 _text_end
+20001cd4 g     F .text  00000016 irq_external_ctrl
+2000375a g     F .text  0000001a dif_uart_irq_restore_all
+200020e6 g     F .text  00000160 ottf_generic_fault_print
+00010000 g       .static_critical       00000000 _chip_info_end
+100020ac g     O .bss   00000004 pxCurrentTCB
+200023f0  w    F .text  00000042 ottf_internal_isr
+20002432 g     F .text  0000000e dif_rstmgr_init
+2000260c g     F .text  0000000e dif_rv_core_ibex_init
+200062c8 g     O .rodata        000002e8 top_earlgrey_plic_interrupt_for_peripheral
+200062b0 g     O .rodata        00000008 kClockFreqPeripheralHz
+2000251e g     F .text  0000001e dif_rv_plic_irq_complete
+20000400 g       .rom_ext_immutable     00000000 _rom_ext_immutable_start
+20000f06 g     F .text  00000022 xPortStartScheduler
+20004090 g     F .text  00000082 memcpy
+2000230a  w    F .text  000000ca ottf_external_isr
+2000354c g     F .text  00000020 dif_spi_device_get_flash_address_fifo_occupancy
+20080000 g       .non_volatile_scratch  00000000 end_of_non_volatile_scratch
+200022b4  w    F .text  00000022 ottf_illegal_instr_fault_handler
+20005e68 g     O .rodata        00000004 kDifRvPlicMinPriority
+20003fca g     F .text  00000002 vPortFree
+20003fd0  w    F .text  00000004 manufacturer_post_test_hook
+20002a20 g     F .text  0000001e base_spi_device_stdout
+00005000 g       *ABS*  00000000 _non_volatile_scratch_size
+200033a8 g     F .text  00000008 dif_spi_device_init_handle
+1000206c g       .bss   00000000 _bss_start
+20001cea g     F .text  00000016 irq_timer_ctrl
+00000400 g       *ABS*  00000000 _manifest_code_start
+20000a68 g     F .text  0000000e dif_gpio_init
+00000000 g       *ABS*  00000000 __DYNAMIC
+2000275e g     F .text  00000006 ibex_mepc_read
+2007b000 g       *ABS*  00000000 _non_volatile_counter_0_end
+200022b4  w    F .text  00000022 ottf_load_store_fault_handler
+20000400 g       .rom_ext_immutable     00000000 _text_start
+200033b0 g     F .text  00000048 dif_spi_device_configure
+20003f20 g     F .text  00000006 vListInitialiseItem
+10002318 g     O .freertos.heap 00008000 ucHeap
+20002440 g     F .text  00000010 dif_rstmgr_reset_info_clear
+20005e6c g     O .rodata        00000004 kDifRvPlicMaxPriority
+00004390 g       *ABS*  00000000 _manifest_code_end
+20000400 g     F .vectors       00000080 _ottf_interrupt_vector
+20000548 g       .init_array    00000000 _init_array_end
+20002800 g     F .text  00000032 base_log_internal_dv
+20006634 g       *ABS*  00000000 _data_init_end
+20003774 g     F .text  000000ea dif_uart_configure
+2000274c g     F .text  00000006 abort
+10000044 g     O .static_critical       00000054 epmp_state
+20003f48 g     F .text  00000082 pvPortMalloc
+20003fd4 g     F .text  00000004 mmio_region_memcpy_from_mmio32
+20003f0c g     F .text  00000014 vListInitialise
+2000369c g     F .text  0000000e dif_spi_device_set_flash_status_registers
+10002318 g       .bss   00000000 _bss_end
+20000abc g     F .text  0000000e dif_gpio_output_set_enabled_all
+20003fcc  w    F .text  00000004 manufacturer_pre_test_hook
+2000408c g     F .text  00000004 mmio_region_memcpy_to_mmio32
+20000aca g     F .text  00000038 ottf_machine_ecall_handler
+20000f28 g     F .text  00000166 ottf_console_init
+200065b0 g       *ABS*  00000000 _data_init_start
+20001cc2 g     F .text  00000012 irq_global_ctrl
+1001ff80 g       *ABS*  00000000 _exception_frame_start
+20000e7e g     F .text  0000004a vApplicationMallocFailedHook
+200020b0 g     F .text  00000036 dif_pinmux_output_select
+20000480 g     F .crt   00000068 _ottf_start
+10001fe8 g     O .data  00000084 status_codes
+00001fe8 g       *ABS*  00000000 _static_critical_size
+20002450 g     F .text  0000000e dif_rv_plic_init
+20001d00 g     F .text  00000012 irq_software_ctrl
+2000390c g     F .text  0000001e dif_uart_rx_bytes_available
+200036aa g     F .text  0000001a dif_spi_device_get_flash_status_registers
+200024d0 g     F .text  00000028 dif_rv_plic_target_set_threshold
+2000197e g     F .text  000000a6 ottf_console_flow_control
+2000050c g     F .crt   0000003a crt_section_copy
+200062b8 g     O .rodata        00000008 kUartBaudrate
+2000356c g     F .text  0000002c dif_spi_device_get_flash_payload_fifo_occupancy
+20004170 g     F .text  000000ae memchr
+00000800 g       *ABS*  00000000 _non_volatile_counter_size
+00080000 g       *ABS*  00000000 _ottf_size
+2000321c g     F .text  000000ca status_create
+200022f0  w    F .text  0000001a ottf_timer_isr
+20003ca4 g     F .text  00000010 vTaskSuspendAll
+10001fe8 g       .data  00000000 _data_start
+2000342e g     F .text  00000100 dif_spi_device_set_flash_command_slot
+2007a800 g       *ABS*  00000000 _non_volatile_counter_0_start
+20003f26 g     F .text  00000022 uxListRemove
+20080000 g       .freertos.heap 00000000 _non_volatile_scratch_end
+2007a000 g       *ABS*  00000000 _non_volatile_counter_2_end
+200023d4  w    F .text  0000001c ottf_load_integrity_error_handler
+20079800 g       *ABS*  00000000 _non_volatile_counter_2_start
+20003b46 g     F .text  0000008a vTaskSwitchContext
+20003718 g     F .text  0000002a dif_uart_irq_set_enabled
+200024a6 g     F .text  0000002a dif_rv_plic_irq_set_priority
+200022b4  w    F .text  00000022 ottf_breakpoint_handler
+00003f80 g       *ABS*  00000000 _stack_size
+20000608 g     F .text  00000052 handler_exception
+20002aa0 g     F .text  000004fe base_vfprintf
+1000206c g       .data  00000000 _data_end
+20000ec8 g     F .text  0000003e vApplicationStackOverflowHook
+00000080 g       *ABS*  00000000 _exception_frame_size
+20002a3e g     F .text  00000016 base_uart_stdout
+20003362 g     F .text  0000002a dif_spi_device_irq_is_pending
+20001d12 g     F .text  00000390 spi_device_testutils_wait_for_upload
+20000758 g     F .text  00000054 handler_irq_internal
+20002a86 g     F .text  0000001a base_vprintf
+200036fc g     F .text  0000001c dif_uart_irq_acknowledge
+200022d6  w    F .text  0000001a ottf_software_isr
+10000098 g     O .static_critical       00001f50 sec_mmio_ctx
+20004112 g     F .text  0000005e memset
+20002752 g     F .text  00000006 ibex_mcause_read
+200006b0 g     F .text  00000054 handler_irq_timer
+2000174a g     F .text  00000234 ottf_console_flow_control_enable
+20004908  w    O .rodata        00000004 kStatusReportListSize
+200033f8 g     F .text  0000001c dif_spi_device_get_4b_address_mode
+1001ff80 g       *ABS*  00000000 _stack_end
+100020f0 g     O .bss   00000018 rand_testutils_rng_ctx
+10002318 g       .freertos.heap 00000000 _freertos_heap_start
+1001c000 g       *ABS*  00000000 _stack_start
+200004e8 g     F .crt   00000024 crt_section_clear
+20003cb4 g     F .text  0000013a xTaskResumeAll
+2000065c g     F .text  00000054 handler_irq_software
+200062a0 g     O .rodata        00000004 uxTopUsedPriority
+20003bd0 g     F .text  0000005e vTaskStartScheduler
+10000000 g     O .static_critical       00000004 static_critical_version
+20000548 g     F .text  00000052 xPortStartFirstTask
+00010000 g       *ABS*  00000000 _dv_log_offset
+20002246  w    F .text  0000006e ottf_exception_handler
+0000ff80 g       *ABS*  00000000 _chip_info_start
+20000814 g     F .text  00000254 test_main
+200029d2 g     F .text  0000000a get_uart_sink
+2000245e g     F .text  00000048 dif_rv_plic_irq_set_enabled
+20001a24 g     F .text  000000dc ottf_console_flow_control_isr
+200035e4 g     F .text  00000048 dif_spi_device_read_flash_payload_buffer
+2000362c g     F .text  00000070 dif_spi_device_write_flash_buffer
+2000437a g     F .text  00000014 to_cpu_cycles
+10002108  w    O .bss   00000028 status_report_list
+20003dee g     F .text  0000011e xTaskIncrementTick
+200062c0 g     O .rodata        00000004 kDeviceTestStatusAddress
+20004600 g     O .rodata        00000018 kOttfTestConfig
+20003354 g     F .text  0000000e dif_spi_device_init
+00000800 g       *ABS*  00000000 _epmp_reset_rx_size
+200042dc g     F .text  0000009e udiv64_slow
+20002a54 g     F .text  00000032 base_printf
+200024f8 g     F .text  00000026 dif_rv_plic_irq_claim
+20003880 g     F .text  0000003c dif_uart_bytes_send
+200062c4 g     O .rodata        00000004 kDeviceLogBypassUartAddress
+2000392a g     F .text  000001ec xTaskCreate
+10020000 g       .static_critical       00000000 _exception_frame_end
+200062ac g     O .rodata        00000004 kDeviceType
+000001d4 g       *ABS*  00000000 _manifest_address_translation
+20002758 g     F .text  00000006 ibex_mtval_read
+2007a800 g       *ABS*  00000000 _non_volatile_counter_1_end
+00000480 g       *ABS*  00000000 _manifest_entry_point
+20000b2c g     F .text  000001e6 _ottf_main
+200026e8 g     F .text  00000064 busy_spin_micros
+00000080 g       *ABS*  00000000 _chip_info_size
+200038de g     F .text  0000002e dif_uart_byte_receive_polled
+2000108e g     F .text  000001d4 ottf_console_configure_uart
+20003b16 g     F .text  00000030 vTaskExitCritical
+2000059c g     F .text  00000024 pxPortInitialiseStack
+200032e6 g     F .text  0000006e status_extract
+20000a76 g     F .text  0000000e dif_gpio_write_all
+00000100 g       *ABS*  00000000 _non_volatile_counter_flash_words
+200060f0 g     O .rodata        00000004 MODULE_ID
+20000e7c g     F .text  00000002 coverage_send_buffer
+200035be g     F .text  00000026 dif_spi_device_pop_flash_address_fifo
+20002836 g     F .text  0000000a get_spi_device_sink
+200036c4 g     F .text  0000000e dif_uart_init
+2007a000 g       *ABS*  00000000 _non_volatile_counter_1_start
+20000000 g       .static_critical       00000000 _ottf_start_address
+20000548 g       .init_array    00000000 _init_array_start
+20000b02 g     F .text  0000002a status_report
+2000261a g     F .text  000000ce test_status_set
+2000338c g     F .text  0000001c dif_spi_device_irq_acknowledge
+20002764 g     F .text  0000009c base_log_internal_core
+200007ac g     F .text  00000068 ottf_isr_exit
+20000704 g     F .text  00000054 handler_irq_external
+20003598 g     F .text  00000026 dif_spi_device_pop_flash_command_fifo
+
+
+
+Disassembly of section .vectors:
+
+20000400 <_ottf_interrupt_vector>:
+_ottf_interrupt_vector():
+20000400:       2080006f                j       20000608 <handler_exception>
+20000404:       c0001073                unimp
+20000408:       c0001073                unimp
+2000040c:       2500006f                j       2000065c <handler_irq_software>
+20000410:       c0001073                unimp
+20000414:       c0001073                unimp
+20000418:       c0001073                unimp
+2000041c:       2940006f                j       200006b0 <handler_irq_timer>
+20000420:       c0001073                unimp
+20000424:       c0001073                unimp
+20000428:       c0001073                unimp
+2000042c:       2d80006f                j       20000704 <handler_irq_external>
+20000430:       c0001073                unimp
+20000434:       c0001073                unimp
+20000438:       c0001073                unimp
+2000043c:       c0001073                unimp
+20000440:       c0001073                unimp
+20000444:       c0001073                unimp
+20000448:       c0001073                unimp
+2000044c:       c0001073                unimp
+20000450:       c0001073                unimp
+20000454:       c0001073                unimp
+20000458:       c0001073                unimp
+2000045c:       c0001073                unimp
+20000460:       c0001073                unimp
+20000464:       c0001073                unimp
+20000468:       c0001073                unimp
+2000046c:       c0001073                unimp
+20000470:       c0001073                unimp
+20000474:       c0001073                unimp
+20000478:       c0001073                unimp
+2000047c:       2dc0006f                j       20000758 <handler_irq_internal>
+
+Disassembly of section .crt:
+
+20000480 <_ottf_start>:
+_ottf_start():
+20000480:       f0002197                auipc   gp,0xf0002
+20000484:       36818193                addi    gp,gp,872 # 100027e8 <__global_pointer$>
+20000488:       f0020117                auipc   sp,0xf0020
+2000048c:       af810113                addi    sp,sp,-1288 # 1001ff80 <_exception_frame_start>
+20000490:       00000297                auipc   t0,0x0
+20000494:       f7128293                addi    t0,t0,-143 # 20000401 <_ottf_interrupt_vector+0x1>
+20000498:       30529073                csrw    mtvec,t0
+2000049c:       f0002517                auipc   a0,0xf0002
+200004a0:       b4c50513                addi    a0,a0,-1204 # 10001fe8 <status_codes>
+200004a4:       88418593                addi    a1,gp,-1916 # 1000206c <gpio>
+200004a8:       00006617                auipc   a2,0x6
+200004ac:       10860613                addi    a2,a2,264 # 200065b0 <_data_init_start>
+200004b0:       28b1                    jal     2000050c <crt_section_copy>
+200004b2:       f0002517                auipc   a0,0xf0002
+200004b6:       bba50513                addi    a0,a0,-1094 # 1000206c <gpio>
+200004ba:       f0002597                auipc   a1,0xf0002
+200004be:       e5e58593                addi    a1,a1,-418 # 10002318 <ucHeap>
+200004c2:       201d                    jal     200004e8 <crt_section_clear>
+200004c4:       00000417                auipc   s0,0x0
+200004c8:       08440413                addi    s0,s0,132 # 20000548 <xPortStartFirstTask>
+200004cc:       00000497                auipc   s1,0x0
+200004d0:       07c48493                addi    s1,s1,124 # 20000548 <xPortStartFirstTask>
+200004d4:       00947863                bgeu    s0,s1,200004e4 <init_array_loop_end>
+
+200004d8 <init_array_loop>:
+200004d8:       /-> 00042283            lw      t0,0(s0)
+200004dc:       |   9282                        jalr    t0
+200004de:       |   0411                        addi    s0,s0,4
+200004e0:       \-- fe946ce3            bltu    s0,s1,200004d8 <init_array_loop>
+
+200004e4 <init_array_loop_end>:
+200004e4:       6480006f                j       20000b2c <_ottf_main>
+
+200004e8 <crt_section_clear>:
+crt_section_clear():
+/proc/self/cwd/sw/device/lib/crt/crt.S:41
+  .global crt_section_clear
+  .type crt_section_clear, @function
+crt_section_clear:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_clear_nothing
+200004e8:       /-------- 00b57e63              bgeu    a0,a1,20000504 <crt_section_clear+0x1c>
+/proc/self/cwd/sw/device/lib/crt/crt.S:44
+
+  // Check that start and end are word aligned.
+  or   t0, a0, a1
+200004ec:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:45
+  andi t0, t0, 0x3
+200004f0:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:46
+  bnez t0, .L_clear_error
+200004f4:       |  /----- 00029b63              bnez    t0,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:51
+
+.L_clear_loop:
+  // Write zero into section memory word-by-word.
+  // TODO: unroll
+  sw   zero, 0(a0)
+200004f8:       |  |  /-> 00052023              sw      zero,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:52
+  addi a0, a0, 4
+200004fc:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:53
+  bltu a0, a1, .L_clear_loop
+200004fe:       |  |  \-- feb56de3              bltu    a0,a1,200004f8 <crt_section_clear+0x10>
+/proc/self/cwd/sw/device/lib/crt/crt.S:54
+  ret
+20000502:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:59
+
+.L_clear_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_clear_error
+20000504:       \--+----X 00b51363              bne     a0,a1,2000050a <crt_section_clear+0x22>
+/proc/self/cwd/sw/device/lib/crt/crt.S:60
+  ret
+20000508:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:63
+
+.L_clear_error:
+  unimp
+2000050a:          \----> 0000                  unimp
+
+2000050c <crt_section_copy>:
+crt_section_copy():
+/proc/self/cwd/sw/device/lib/crt/crt.S:95
+  .global crt_section_copy
+  .type crt_section_copy, @function
+crt_section_copy:
+
+  // Check that start is before end.
+  bgeu a0, a1, .L_copy_nothing
+2000050c:       /-------- 02b57963              bgeu    a0,a1,2000053e <crt_section_copy+0x32>
+/proc/self/cwd/sw/device/lib/crt/crt.S:98
+
+  // Check that start, end and src are word aligned.
+  or   t0, a0, a1
+20000510:       |         00b562b3              or      t0,a0,a1
+/proc/self/cwd/sw/device/lib/crt/crt.S:99
+  or   t0, t0, a2
+20000514:       |         00c2e2b3              or      t0,t0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:100
+  andi t0, t0, 0x3
+20000518:       |         0032f293              andi    t0,t0,3
+/proc/self/cwd/sw/device/lib/crt/crt.S:101
+  bnez t0, .L_copy_error
+2000051c:       |  /----- 02029463              bnez    t0,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:118
+  //        +-------------+
+  //        |             |
+  //      start          end
+  //
+  // TODO: disallow all overlap since it indicates API misuse?
+  sub  t0, a0, a2           // (start - src) mod 2**32
+20000520:       |  |      40c502b3              sub     t0,a0,a2
+/proc/self/cwd/sw/device/lib/crt/crt.S:119
+  sub  t1, a1, a0           // end - start
+20000524:       |  |      40a58333              sub     t1,a1,a0
+/proc/self/cwd/sw/device/lib/crt/crt.S:120
+  bltu t0, t1, .L_copy_error
+20000528:       |  +----- 0062ee63              bltu    t0,t1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:125
+
+.L_copy_loop:
+  // Copy data from src into section word-by-word.
+  // TODO: unroll
+  lw   t0, 0(a2)
+2000052c:       |  |  /-> 00062283              lw      t0,0(a2)
+/proc/self/cwd/sw/device/lib/crt/crt.S:126
+  addi a2, a2, 4
+20000530:       |  |  |   0611                  addi    a2,a2,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:127
+  sw   t0, 0(a0)
+20000532:       |  |  |   00552023              sw      t0,0(a0)
+/proc/self/cwd/sw/device/lib/crt/crt.S:128
+  addi a0, a0, 4
+20000536:       |  |  |   0511                  addi    a0,a0,4
+/proc/self/cwd/sw/device/lib/crt/crt.S:129
+  bltu a0, a1, .L_copy_loop
+20000538:       |  |  \-- feb56ae3              bltu    a0,a1,2000052c <crt_section_copy+0x20>
+/proc/self/cwd/sw/device/lib/crt/crt.S:130
+  ret
+2000053c:       |  |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:135
+
+.L_copy_nothing:
+  // If section length is 0 just return. Otherwise end is before start
+  // which is invalid so trigger an error.
+  bne a0, a1, .L_copy_error
+2000053e:       \--+----X 00b51363              bne     a0,a1,20000544 <crt_section_copy+0x38>
+/proc/self/cwd/sw/device/lib/crt/crt.S:136
+  ret
+20000542:          |      8082                  ret
+/proc/self/cwd/sw/device/lib/crt/crt.S:139
+
+.L_copy_error:
+  unimp
+20000544:          \----> 0000                  unimp
+
+Disassembly of section .text:
+
+20000548 <xPortStartFirstTask>:
+xPortStartFirstTask():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:18
+  .global xPortStartFirstTask
+  .type xPortStartFirstTask, @function
+xPortStartFirstTask:
+  // Load the stack pointer for the current TCB (just going to clobber sp here
+  // since we are setting it here anyway).
+  lw  sp, pxCurrentTCB
+20000548:       f0002117                auipc   sp,0xf0002
+2000054c:       b6412103                lw      sp,-1180(sp) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:19
+  lw  sp, 0(sp)
+20000550:       4102                    lw      sp,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:23
+
+  // NOTE: for starting the FreeRTOS scheduler, the exception return address is
+  // used as the function return address. See pxPortInitialiseStack below.
+  lw  ra, 0(sp)
+20000552:       4082                    lw      ra,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:26
+
+  // Restore registers initialized on task start.
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000554:       4332                    lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:27
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000556:       43c2                    lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:28
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000558:       4452                    lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:29
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000055a:       44e2                    lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:30
+  lw   a0,  7 * OTTF_WORD_SIZE(sp) // task parameters (pvParameters)
+2000055c:       4572                    lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:31
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000055e:       5582                    lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:32
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000560:       5612                    lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:33
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000562:       56a2                    lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:34
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000564:       5732                    lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:35
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000566:       57c2                    lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:36
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000568:       5852                    lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:37
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000056a:       58e2                    lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:38
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000056c:       5972                    lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:39
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000056e:       4986                    lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:40
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000570:       4a16                    lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:41
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000572:       4aa6                    lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:42
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000574:       4b36                    lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:43
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000576:       4bc6                    lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:44
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000578:       4c56                    lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:45
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000057a:       4ce6                    lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:46
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000057c:       4d76                    lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:47
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000057e:       5d86                    lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:48
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000580:       5e16                    lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:49
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000582:       5ea6                    lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:50
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000584:       5f36                    lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:51
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000586:       5fc6                    lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:55
+
+  // Initialize t0 to the value of MSTATUS with global interrupts enabled, which
+  // is required because this returns with ret, not eret.
+  lw t0, 29 * OTTF_WORD_SIZE(sp) // Load the MSTATUS state from the stack.
+20000588:       52d6                    lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:56
+  ori t0, t0, 1<<3               // Set MIE field.
+2000058a:       0082e293                ori     t0,t0,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:57
+  csrw mstatus, t0               // Ibex interrupts enabled from here!
+2000058e:       30029073                csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:60
+
+  // Restore t0 register from the stack (after using it to manipulate MSTATUS).
+  lw t0, 2 * OTTF_WORD_SIZE(sp)
+20000592:       42a2                    lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:63
+
+  // Update the stack pointer (shrinking the stack).
+  addi sp, sp, OTTF_CONTEXT_SIZE
+20000594:       07810113                addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:65
+
+  ret
+20000598:       8082                    ret
+2000059a:       0001                    nop
+
+2000059c <pxPortInitialiseStack>:
+pxPortInitialiseStack():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:133
+  .balign 4
+  .global pxPortInitialiseStack
+  .type pxPortInitialiseStack, @function
+pxPortInitialiseStack:
+  // Setup the MSTATUS register.
+  csrr t0, mstatus
+2000059c:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:137
+  // Ensure interrupts are disabled when the stack is restored within an ISR.
+  // Required when a task is created after the scheduler has been started,
+  // otherwise interrupts would be disabled anyway.
+  andi t0, t0, ~0x8
+200005a0:       ff72f293                andi    t0,t0,-9
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:139
+  // Generate the value 0x1880, to set the MPIE and MPP bits in MSTATUS.
+  li t1, 0x188 << 4
+200005a4:       6309                    lui     t1,0x2
+200005a6:       88030313                addi    t1,t1,-1920 # 1880 <_epmp_reset_rx_size+0x1080>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:140
+  or t0, t0, t1
+200005aa:       0062e2b3                or      t0,t0,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:143
+
+  // Setup the stack frame detailed above (a0 holds the task stack pointer).
+  addi a0, a0, -OTTF_CONTEXT_SIZE
+200005ae:       f8850513                addi    a0,a0,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:145
+  // Push MSTATUS onto the stack.
+  sw t0, 29 * OTTF_WORD_SIZE(a0)
+200005b2:       06552a23                sw      t0,116(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:148
+
+  // Push task parameters (pvParameters that is in x12/a2, on the stack.
+  sw a2, 7 * OTTF_WORD_SIZE(a0)
+200005b6:       cd50                    sw      a2,28(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:150
+  // Push 0 for the portTASK_RETURN_ADDRESS for now.
+  sw zero, 1 * OTTF_WORD_SIZE(a0)
+200005b8:       00052223                sw      zero,4(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:155
+  // Push the pointer to the task's entry point (pxCode) onto the stack. This
+  // will be loaded into either ra (in xPortStartFirstTask) or mepc (in
+  // freertosIrqExit), so that when ret/mret is called control flow will be
+  // transferred accordingly.
+  sw a1, 0(a0)
+200005bc:       c10c                    sw      a1,0(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.S:157
+
+  ret
+200005be:       8082                    ret
+
+200005c0 <compute_mepc_on_synchronous_irq>:
+compute_mepc_on_synchronous_irq():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:32
+   * address below will cause another exception.
+   */
+  .balign 4
+  .type compute_mepc_on_synchronous_irq, @function
+compute_mepc_on_synchronous_irq:
+  csrr t0, mepc
+200005c0:           341022f3            csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:33
+  csrr t1, mcause
+200005c4:           34202373            csrr    t1,mcause
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:34
+  li t2, 0x01
+200005c8:           4385                        li      t2,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:35
+  bne t1, t2, .L_load_mepc
+200005ca:       /-- 00731363            bne     t1,t2,200005d0 <compute_mepc_on_synchronous_irq+0x10>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:36
+  ret
+200005ce:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:38
+.L_load_mepc:
+  lh t2, 0(t0)
+200005d0:       \-> 00029383            lh      t2,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:39
+  li t1, 0x3
+200005d4:           430d                        li      t1,3
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:40
+  and t3, t2, t1
+200005d6:           0063fe33            and     t3,t2,t1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:41
+  beq t3, t1, .L_32bit_trap_instr
+200005da:       /-- 006e0463            beq     t3,t1,200005e2 <compute_mepc_on_synchronous_irq+0x22>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:42
+  addi t0, t0, OTTF_HALF_WORD_SIZE
+200005de:       |   0289                        addi    t0,t0,2
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:43
+  ret
+200005e0:       |   8082                        ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:45
+.L_32bit_trap_instr:
+  addi t0, t0, OTTF_WORD_SIZE
+200005e2:       \-> 0291                        addi    t0,t0,4
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:46
+  ret
+200005e4:           8082                        ret
+200005e6:           0001                        nop
+
+200005e8 <save_current_sp_to_tcb>:
+save_current_sp_to_tcb():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:61
+   * exception, if we attempt to perform a store to said address.
+   */
+  .balign 4
+  .type save_current_sp_to_tcb, @function
+save_current_sp_to_tcb:
+  la t0, kOttfTestConfig
+200005e8:           00004297            auipc   t0,0x4
+200005ec:           01828293            addi    t0,t0,24 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:62
+  lb t1, 0(t0)
+200005f0:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:63
+  beqz t1, .L_skip_sp_save
+200005f4:       /-- 00030863            beqz    t1,20000604 <save_current_sp_to_tcb+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:64
+  lw t2, pxCurrentTCB
+200005f8:       |   f0002397            auipc   t2,0xf0002
+200005fc:       |   ab43a383            lw      t2,-1356(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:65
+  sw sp, 0(t2)
+20000600:       |   0023a023            sw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:67
+.L_skip_sp_save:
+  ret
+20000604:       \-> 8082                        ret
+20000606:           0001                        nop
+
+20000608 <handler_exception>:
+handler_exception():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:80
+  .balign 4
+  .global handler_exception
+  .type handler_exception, @function
+handler_exception:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000608:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:81
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000060c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:82
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000060e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:83
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000610:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:84
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000612:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:85
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000614:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:86
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000616:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:87
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000618:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:88
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000061a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:89
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000061c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:90
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000061e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:91
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000620:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:92
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000622:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:93
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000624:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:94
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000626:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:95
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000628:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:96
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000062a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:97
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000062c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:98
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000062e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:99
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000630:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:100
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000632:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:101
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000634:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:102
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000636:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:103
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000638:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:104
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000063a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:105
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000063c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:106
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000063e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:107
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000640:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:108
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000642:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:111
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000644:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:112
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000648:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:116
+
+  // Save MEPC to the stack after updating it to the next instruction (since
+  // this is a synchronous IRQ).
+  jal compute_mepc_on_synchronous_irq
+2000064a:       3f9d                    jal     200005c0 <compute_mepc_on_synchronous_irq>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:117
+  sw t0, 0(sp)
+2000064c:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:121
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000064e:       3f69                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:124
+
+  // Jump to the exception handler.
+  mv a0, sp
+20000650:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:125
+  jal ottf_exception_handler
+20000652:       3f5010ef                jal     ra,20002246 <ottf_exception_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:128
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000656:       1560006f                j       200007ac <ottf_isr_exit>
+2000065a:       0001                    nop
+
+2000065c <handler_irq_software>:
+handler_irq_software():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:141
+  .balign 4
+  .global handler_irq_software
+  .type handler_irq_software, @function
+handler_irq_software:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+2000065c:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:142
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000660:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:143
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+20000662:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:144
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000664:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:145
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000666:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:146
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000668:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:147
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+2000066a:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:148
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+2000066c:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:149
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000066e:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:150
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000670:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:151
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+20000672:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:152
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000674:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:153
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000676:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:154
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000678:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:155
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+2000067a:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:156
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+2000067c:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:157
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000067e:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:158
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000680:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:159
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+20000682:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:160
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000684:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:161
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000686:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:162
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000688:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:163
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+2000068a:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:164
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+2000068c:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:165
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000068e:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:166
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000690:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:167
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000692:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:168
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000694:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:169
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000696:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:172
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000698:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:173
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+2000069c:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:177
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000069e:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:178
+  sw t0, 0(sp)
+200006a2:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:182
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006a4:       3791                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:185
+
+  // Jump to the software ISR.
+  mv a0, sp
+200006a6:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:186
+  jal ottf_software_isr
+200006a8:       42f010ef                jal     ra,200022d6 <ottf_software_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:189
+
+  // Return from ISR.
+  j ottf_isr_exit
+200006ac:       1000006f                j       200007ac <ottf_isr_exit>
+
+200006b0 <handler_irq_timer>:
+handler_irq_timer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:202
+  .balign 4
+  .global handler_irq_timer
+  .type handler_irq_timer, @function
+handler_irq_timer:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+200006b0:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:203
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+200006b4:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:204
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+200006b6:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:205
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+200006b8:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:206
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+200006ba:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:207
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+200006bc:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:208
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+200006be:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:209
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+200006c0:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:210
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+200006c2:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:211
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+200006c4:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:212
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+200006c6:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:213
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+200006c8:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:214
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+200006ca:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:215
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+200006cc:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:216
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+200006ce:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:217
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+200006d0:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:218
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+200006d2:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:219
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+200006d4:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:220
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+200006d6:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:221
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+200006d8:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:222
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+200006da:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:223
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+200006dc:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:224
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+200006de:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:225
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+200006e0:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:226
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+200006e2:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:227
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+200006e4:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:228
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+200006e6:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:229
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+200006e8:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:230
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+200006ea:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:233
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+200006ec:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:234
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+200006f0:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:238
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+200006f2:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:239
+  sw t0, 0(sp)
+200006f6:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:243
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200006f8:       3dc5                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:246
+
+  // Jump to timer ISR.
+  mv a0, sp
+200006fa:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:247
+  jal ottf_timer_isr
+200006fc:       3f5010ef                jal     ra,200022f0 <ottf_timer_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:250
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000700:       0ac0006f                j       200007ac <ottf_isr_exit>
+
+20000704 <handler_irq_external>:
+handler_irq_external():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:263
+  .balign 4
+  .global handler_irq_external
+  .type handler_irq_external, @function
+handler_irq_external:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000704:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:264
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+20000708:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:265
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000070a:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:266
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+2000070c:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:267
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+2000070e:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:268
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000710:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:269
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000712:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:270
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000714:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:271
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+20000716:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:272
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+20000718:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:273
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000071a:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:274
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+2000071c:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:275
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+2000071e:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:276
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000720:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:277
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000722:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:278
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000724:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:279
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+20000726:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:280
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+20000728:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:281
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000072a:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:282
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+2000072c:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:283
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+2000072e:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:284
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000730:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:285
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000732:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:286
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000734:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:287
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000736:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:288
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000738:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:289
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000073a:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:290
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+2000073c:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:291
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000073e:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:294
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000740:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:295
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000744:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:299
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+20000746:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:300
+  sw t0, 0(sp)
+2000074a:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:304
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+2000074c:       3d71                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:307
+
+  // Jump to external ISR.
+  mv a0, sp
+2000074e:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:308
+  jal ottf_external_isr
+20000750:       3bb010ef                jal     ra,2000230a <ottf_external_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:311
+
+  // Return from ISR.
+  j ottf_isr_exit
+20000754:       0580006f                j       200007ac <ottf_isr_exit>
+
+20000758 <handler_irq_internal>:
+handler_irq_internal():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:324
+  .balign 4
+  .global handler_irq_internal
+  .type handler_irq_internal, @function
+handler_irq_internal:
+  // Save all registers to the stack.
+  addi sp, sp, -OTTF_CONTEXT_SIZE
+20000758:       f8810113                addi    sp,sp,-120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:325
+  sw   ra,  1 * OTTF_WORD_SIZE(sp)
+2000075c:       c206                    sw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:326
+  sw   t0,  2 * OTTF_WORD_SIZE(sp)
+2000075e:       c416                    sw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:327
+  sw   t1,  3 * OTTF_WORD_SIZE(sp)
+20000760:       c61a                    sw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:328
+  sw   t2,  4 * OTTF_WORD_SIZE(sp)
+20000762:       c81e                    sw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:329
+  sw   s0,  5 * OTTF_WORD_SIZE(sp)
+20000764:       ca22                    sw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:330
+  sw   s1,  6 * OTTF_WORD_SIZE(sp)
+20000766:       cc26                    sw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:331
+  sw   a0,  7 * OTTF_WORD_SIZE(sp)
+20000768:       ce2a                    sw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:332
+  sw   a1,  8 * OTTF_WORD_SIZE(sp)
+2000076a:       d02e                    sw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:333
+  sw   a2,  9 * OTTF_WORD_SIZE(sp)
+2000076c:       d232                    sw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:334
+  sw   a3, 10 * OTTF_WORD_SIZE(sp)
+2000076e:       d436                    sw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:335
+  sw   a4, 11 * OTTF_WORD_SIZE(sp)
+20000770:       d63a                    sw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:336
+  sw   a5, 12 * OTTF_WORD_SIZE(sp)
+20000772:       d83e                    sw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:337
+  sw   a6, 13 * OTTF_WORD_SIZE(sp)
+20000774:       da42                    sw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:338
+  sw   a7, 14 * OTTF_WORD_SIZE(sp)
+20000776:       dc46                    sw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:339
+  sw   s2, 15 * OTTF_WORD_SIZE(sp)
+20000778:       de4a                    sw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:340
+  sw   s3, 16 * OTTF_WORD_SIZE(sp)
+2000077a:       c0ce                    sw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:341
+  sw   s4, 17 * OTTF_WORD_SIZE(sp)
+2000077c:       c2d2                    sw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:342
+  sw   s5, 18 * OTTF_WORD_SIZE(sp)
+2000077e:       c4d6                    sw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:343
+  sw   s6, 19 * OTTF_WORD_SIZE(sp)
+20000780:       c6da                    sw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:344
+  sw   s7, 20 * OTTF_WORD_SIZE(sp)
+20000782:       c8de                    sw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:345
+  sw   s8, 21 * OTTF_WORD_SIZE(sp)
+20000784:       cae2                    sw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:346
+  sw   s9, 22 * OTTF_WORD_SIZE(sp)
+20000786:       cce6                    sw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:347
+  sw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000788:       ceea                    sw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:348
+  sw  s11, 24 * OTTF_WORD_SIZE(sp)
+2000078a:       d0ee                    sw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:349
+  sw   t3, 25 * OTTF_WORD_SIZE(sp)
+2000078c:       d2f2                    sw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:350
+  sw   t4, 26 * OTTF_WORD_SIZE(sp)
+2000078e:       d4f6                    sw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:351
+  sw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000790:       d6fa                    sw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:352
+  sw   t6, 28 * OTTF_WORD_SIZE(sp)
+20000792:       d8fe                    sw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:355
+
+  // Save MSTATUS for the MPIE bit.
+  csrr t0, mstatus
+20000794:       300022f3                csrr    t0,mstatus
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:356
+  sw t0, 29 * OTTF_WORD_SIZE(sp)
+20000798:       da96                    sw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:360
+
+  // Save MEPC to the stack.
+  // NOTE: this IRQ is asynchronous, therefore, we do not need to modify MEPC.
+  csrr t0, mepc
+2000079a:       341022f3                csrr    t0,mepc
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:361
+  sw t0, 0(sp)
+2000079e:       c016                    sw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:365
+
+  // Store stack pointer to current TCB (only if concurrency is enabled, i.e.,
+  // the test that triggers this is running as a FreeRTOS task).
+  jal save_current_sp_to_tcb
+200007a0:       35a1                    jal     200005e8 <save_current_sp_to_tcb>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:368
+
+  // Jump to the internal ISR.
+  mv a0, sp
+200007a2:       850a                    mv      a0,sp
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:369
+  jal ottf_internal_isr
+200007a4:       44d010ef                jal     ra,200023f0 <ottf_internal_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:372
+
+  // Return from ISR.
+  j ottf_isr_exit
+200007a8:       0040006f                j       200007ac <ottf_isr_exit>
+
+200007ac <ottf_isr_exit>:
+ottf_isr_exit():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:389
+  // Load the stack pointer for the current task control block (TCB), only if
+  // the `enable_concurrency` flag is set in the test configuration struct,
+  // meaning a test is run as a FreeRTOS task, where each task maintains its own
+  // stack. Otherwise, the test is run on bare-metal, and there is no TCB, and
+  // only a single stack/stack pointer.
+  la t0, kOttfTestConfig
+200007ac:           00004297            auipc   t0,0x4
+200007b0:           e5428293            addi    t0,t0,-428 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:390
+  lb t1, 0(t0)
+200007b4:           00028303            lb      t1,0(t0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:391
+  beqz t1, .L_skip_sp_restore
+200007b8:       /-- 00030863            beqz    t1,200007c8 <ottf_isr_exit+0x1c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:392
+  lw  t2, pxCurrentTCB
+200007bc:       |   f0002397            auipc   t2,0xf0002
+200007c0:       |   8f03a383            lw      t2,-1808(t2) # 100020ac <pxCurrentTCB>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:393
+  lw  sp, 0(t2)
+200007c4:       |   0003a103            lw      sp,0(t2)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:397
+.L_skip_sp_restore:
+
+  // Load the correct MEPC for the next instruction in the current task.
+  lw t0, 0(sp)
+200007c8:       \-> 4282                        lw      t0,0(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:398
+  csrw mepc, t0
+200007ca:           34129073            csrw    mepc,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:401
+
+  // Load MSTATUS for the MPIE bit.
+  lw  t0, 29 * OTTF_WORD_SIZE(sp)
+200007ce:           52d6                        lw      t0,116(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:402
+  csrw mstatus, t0
+200007d0:           30029073            csrw    mstatus,t0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:405
+
+  // Restore all registers from the stack.
+  lw   ra,  1 * OTTF_WORD_SIZE(sp)
+200007d4:           4092                        lw      ra,4(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:406
+  lw   t0,  2 * OTTF_WORD_SIZE(sp)
+200007d6:           42a2                        lw      t0,8(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:407
+  lw   t1,  3 * OTTF_WORD_SIZE(sp)
+200007d8:           4332                        lw      t1,12(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:408
+  lw   t2,  4 * OTTF_WORD_SIZE(sp)
+200007da:           43c2                        lw      t2,16(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:409
+  lw   s0,  5 * OTTF_WORD_SIZE(sp)
+200007dc:           4452                        lw      s0,20(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:410
+  lw   s1,  6 * OTTF_WORD_SIZE(sp)
+200007de:           44e2                        lw      s1,24(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:411
+  lw   a0,  7 * OTTF_WORD_SIZE(sp)
+200007e0:           4572                        lw      a0,28(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:412
+  lw   a1,  8 * OTTF_WORD_SIZE(sp)
+200007e2:           5582                        lw      a1,32(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:413
+  lw   a2,  9 * OTTF_WORD_SIZE(sp)
+200007e4:           5612                        lw      a2,36(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:414
+  lw   a3, 10 * OTTF_WORD_SIZE(sp)
+200007e6:           56a2                        lw      a3,40(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:415
+  lw   a4, 11 * OTTF_WORD_SIZE(sp)
+200007e8:           5732                        lw      a4,44(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:416
+  lw   a5, 12 * OTTF_WORD_SIZE(sp)
+200007ea:           57c2                        lw      a5,48(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:417
+  lw   a6, 13 * OTTF_WORD_SIZE(sp)
+200007ec:           5852                        lw      a6,52(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:418
+  lw   a7, 14 * OTTF_WORD_SIZE(sp)
+200007ee:           58e2                        lw      a7,56(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:419
+  lw   s2, 15 * OTTF_WORD_SIZE(sp)
+200007f0:           5972                        lw      s2,60(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:420
+  lw   s3, 16 * OTTF_WORD_SIZE(sp)
+200007f2:           4986                        lw      s3,64(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:421
+  lw   s4, 17 * OTTF_WORD_SIZE(sp)
+200007f4:           4a16                        lw      s4,68(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:422
+  lw   s5, 18 * OTTF_WORD_SIZE(sp)
+200007f6:           4aa6                        lw      s5,72(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:423
+  lw   s6, 19 * OTTF_WORD_SIZE(sp)
+200007f8:           4b36                        lw      s6,76(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:424
+  lw   s7, 20 * OTTF_WORD_SIZE(sp)
+200007fa:           4bc6                        lw      s7,80(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:425
+  lw   s8, 21 * OTTF_WORD_SIZE(sp)
+200007fc:           4c56                        lw      s8,84(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:426
+  lw   s9, 22 * OTTF_WORD_SIZE(sp)
+200007fe:           4ce6                        lw      s9,88(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:427
+  lw  s10, 23 * OTTF_WORD_SIZE(sp)
+20000800:           4d76                        lw      s10,92(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:428
+  lw  s11, 24 * OTTF_WORD_SIZE(sp)
+20000802:           5d86                        lw      s11,96(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:429
+  lw   t3, 25 * OTTF_WORD_SIZE(sp)
+20000804:           5e16                        lw      t3,100(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:430
+  lw   t4, 26 * OTTF_WORD_SIZE(sp)
+20000806:           5ea6                        lw      t4,104(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:431
+  lw   t5, 27 * OTTF_WORD_SIZE(sp)
+20000808:           5f36                        lw      t5,108(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:432
+  lw   t6, 28 * OTTF_WORD_SIZE(sp)
+2000080a:           5fc6                        lw      t6,112(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:433
+  addi sp, sp, OTTF_CONTEXT_SIZE
+2000080c:           07810113            addi    sp,sp,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.S:437
+
+  // This exits the ISR completely, and does not return control flow to the ISR
+  // that called this sub-routine.
+  mret
+20000810:           30200073            mret
+
+20000814 <test_main>:
+test_main():
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:23
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+
+static const dif_gpio_pin_t kGpioPinIoa5 = 0;
+
+bool test_main(void) {
+20000814:                 1141                  addi    sp,sp,-16
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:25
+  // Initialize pinmux and GPIO peripherals.
+  CHECK_DIF_OK(
+20000816:                 c606                  sw      ra,12(sp)
+20000818:                 c422                  sw      s0,8(sp)
+2000081a:                 f0002517              auipc   a0,0xf0002
+2000081e:                 85250593              addi    a1,a0,-1966 # 1000206c <gpio>
+20000822:                 40040537              lui     a0,0x40040
+20000826:                 2489                  jal     20000a68 <dif_gpio_init>
+20000828:                 00006417              auipc   s0,0x6
+2000082c:       /-------- cd05                  beqz    a0,20000864 <test_main+0x50>
+2000082e:       |         862a                  mv      a2,a0
+20000830:       |         a9c42503              lw      a0,-1380(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000834:       |  /----- cd01                  beqz    a0,2000084c <test_main+0x38>
+20000836:       |  |      e000f517              auipc   a0,0xe000f
+2000083a:       |  |      7ca50513              addi    a0,a0,1994 # 10000 <_chip_info_end>
+2000083e:       |  |      00400593              li      a1,4
+20000842:       |  |      952e                  add     a0,a0,a1
+20000844:       |  |      4585                  li      a1,1
+20000846:       |  |      7bb010ef              jal     ra,20002800 <base_log_internal_dv>
+2000084a:       |  |  /-- a801                  j       2000085a <test_main+0x46>
+2000084c:       |  \--|-> 00004517              auipc   a0,0x4
+20000850:       |     |   dcc50513              addi    a0,a0,-564 # 20004618 <test_main.log_fields>
+20000854:       |     |   85b2                  mv      a1,a2
+20000856:       |     |   70f010ef              jal     ra,20002764 <base_log_internal_core>
+2000085a:       |     \-> 6531                  lui     a0,0xc
+2000085c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000860:       |         5bb010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:27
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(dif_pinmux_init(
+20000864:       \-------> f0002517              auipc   a0,0xf0002
+20000868:                 80c50593              addi    a1,a0,-2036 # 10002070 <pinmux>
+2000086c:                 40460537              lui     a0,0x40460
+20000870:                 033010ef              jal     ra,200020a2 <dif_pinmux_init>
+20000874:       /-------- cd05                  beqz    a0,200008ac <test_main+0x98>
+20000876:       |         862a                  mv      a2,a0
+20000878:       |         a9c42503              lw      a0,-1380(s0)
+2000087c:       |  /----- cd01                  beqz    a0,20000894 <test_main+0x80>
+2000087e:       |  |      e000f517              auipc   a0,0xe000f
+20000882:       |  |      78250513              addi    a0,a0,1922 # 10000 <_chip_info_end>
+20000886:       |  |      01800593              li      a1,24
+2000088a:       |  |      952e                  add     a0,a0,a1
+2000088c:       |  |      4585                  li      a1,1
+2000088e:       |  |      773010ef              jal     ra,20002800 <base_log_internal_dv>
+20000892:       |  |  /-- a801                  j       200008a2 <test_main+0x8e>
+20000894:       |  \--|-> 00004517              auipc   a0,0x4
+20000898:       |     |   d9850513              addi    a0,a0,-616 # 2000462c <test_main.log_fields.4>
+2000089c:       |     |   85b2                  mv      a1,a2
+2000089e:       |     |   6c7010ef              jal     ra,20002764 <base_log_internal_core>
+200008a2:       |     \-> 6531                  lui     a0,0xc
+200008a4:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008a8:       |         573010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:29
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIoa5,
+200008ac:       \-------> f0001517              auipc   a0,0xf0001
+200008b0:                 7c450513              addi    a0,a0,1988 # 10002070 <pinmux>
+200008b4:                 4595                  li      a1,5
+200008b6:                 460d                  li      a2,3
+200008b8:                 7f8010ef              jal     ra,200020b0 <dif_pinmux_output_select>
+200008bc:       /-------- cd05                  beqz    a0,200008f4 <test_main+0xe0>
+200008be:       |         862a                  mv      a2,a0
+200008c0:       |         a9c42503              lw      a0,-1380(s0)
+200008c4:       |  /----- cd01                  beqz    a0,200008dc <test_main+0xc8>
+200008c6:       |  |      e000f517              auipc   a0,0xe000f
+200008ca:       |  |      73a50513              addi    a0,a0,1850 # 10000 <_chip_info_end>
+200008ce:       |  |      02c00593              li      a1,44
+200008d2:       |  |      952e                  add     a0,a0,a1
+200008d4:       |  |      4585                  li      a1,1
+200008d6:       |  |      72b010ef              jal     ra,20002800 <base_log_internal_dv>
+200008da:       |  |  /-- a801                  j       200008ea <test_main+0xd6>
+200008dc:       |  \--|-> 00004517              auipc   a0,0x4
+200008e0:       |     |   d6450513              addi    a0,a0,-668 # 20004640 <test_main.log_fields.7>
+200008e4:       |     |   85b2                  mv      a1,a2
+200008e6:       |     |   67f010ef              jal     ra,20002764 <base_log_internal_core>
+200008ea:       |     \-> 6531                  lui     a0,0xc
+200008ec:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200008f0:       |         52b010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:31
+                                        kTopEarlgreyPinmuxOutselGpioGpio0));
+  CHECK_DIF_OK(
+200008f4:       \-------> f0001517              auipc   a0,0xf0001
+200008f8:                 77850513              addi    a0,a0,1912 # 1000206c <gpio>
+200008fc:                 4585                  li      a1,1
+200008fe:                 2a7d                  jal     20000abc <dif_gpio_output_set_enabled_all>
+20000900:       /-------- cd05                  beqz    a0,20000938 <test_main+0x124>
+20000902:       |         862a                  mv      a2,a0
+20000904:       |         a9c42503              lw      a0,-1380(s0)
+20000908:       |  /----- cd01                  beqz    a0,20000920 <test_main+0x10c>
+2000090a:       |  |      e000f517              auipc   a0,0xe000f
+2000090e:       |  |      6f650513              addi    a0,a0,1782 # 10000 <_chip_info_end>
+20000912:       |  |      04000593              li      a1,64
+20000916:       |  |      952e                  add     a0,a0,a1
+20000918:       |  |      4585                  li      a1,1
+2000091a:       |  |      6e7010ef              jal     ra,20002800 <base_log_internal_dv>
+2000091e:       |  |  /-- a801                  j       2000092e <test_main+0x11a>
+20000920:       |  \--|-> 00004517              auipc   a0,0x4
+20000924:       |     |   d3450513              addi    a0,a0,-716 # 20004654 <test_main.log_fields.10>
+20000928:       |     |   85b2                  mv      a1,a2
+2000092a:       |     |   63b010ef              jal     ra,20002764 <base_log_internal_core>
+2000092e:       |     \-> 6531                  lui     a0,0xc
+20000930:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000934:       |         4e7010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:33
+      dif_gpio_output_set_enabled_all(&gpio, 0x1));  // Enable first GPIO.
+  CHECK_DIF_OK(
+20000938:       \-------> f0001517              auipc   a0,0xf0001
+2000093c:                 73450513              addi    a0,a0,1844 # 1000206c <gpio>
+20000940:                 4581                  li      a1,0
+20000942:                 2a15                  jal     20000a76 <dif_gpio_write_all>
+20000944:       /-------- cd05                  beqz    a0,2000097c <test_main+0x168>
+20000946:       |         862a                  mv      a2,a0
+20000948:       |         a9c42503              lw      a0,-1380(s0)
+2000094c:       |  /----- cd01                  beqz    a0,20000964 <test_main+0x150>
+2000094e:       |  |      e000f517              auipc   a0,0xe000f
+20000952:       |  |      6b250513              addi    a0,a0,1714 # 10000 <_chip_info_end>
+20000956:       |  |      05400593              li      a1,84
+2000095a:       |  |      952e                  add     a0,a0,a1
+2000095c:       |  |      4585                  li      a1,1
+2000095e:       |  |      6a3010ef              jal     ra,20002800 <base_log_internal_dv>
+20000962:       |  |  /-- a801                  j       20000972 <test_main+0x15e>
+20000964:       |  \--|-> 00004517              auipc   a0,0x4
+20000968:       |     |   d0450513              addi    a0,a0,-764 # 20004668 <test_main.log_fields.13>
+2000096c:       |     |   85b2                  mv      a1,a2
+2000096e:       |     |   5f7010ef              jal     ra,20002764 <base_log_internal_core>
+20000972:       |     \-> 6531                  lui     a0,0xc
+20000974:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000978:       |         4a3010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:37
+      dif_gpio_write_all(&gpio, /*write_val=*/0));  // Intialize all to 0.
+
+  // Toggle IOA5.
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+2000097c:       \-------> f0001517              auipc   a0,0xf0001
+20000980:                 6f050513              addi    a0,a0,1776 # 1000206c <gpio>
+20000984:                 4605                  li      a2,1
+20000986:                 4581                  li      a1,0
+20000988:                 28f5                  jal     20000a84 <dif_gpio_write>
+2000098a:       /-------- cd05                  beqz    a0,200009c2 <test_main+0x1ae>
+2000098c:       |         862a                  mv      a2,a0
+2000098e:       |         a9c42503              lw      a0,-1380(s0)
+20000992:       |  /----- cd01                  beqz    a0,200009aa <test_main+0x196>
+20000994:       |  |      e000f517              auipc   a0,0xe000f
+20000998:       |  |      66c50513              addi    a0,a0,1644 # 10000 <_chip_info_end>
+2000099c:       |  |      06800593              li      a1,104
+200009a0:       |  |      952e                  add     a0,a0,a1
+200009a2:       |  |      4585                  li      a1,1
+200009a4:       |  |      65d010ef              jal     ra,20002800 <base_log_internal_dv>
+200009a8:       |  |  /-- a801                  j       200009b8 <test_main+0x1a4>
+200009aa:       |  \--|-> 00004517              auipc   a0,0x4
+200009ae:       |     |   cd250513              addi    a0,a0,-814 # 2000467c <test_main.log_fields.16>
+200009b2:       |     |   85b2                  mv      a1,a2
+200009b4:       |     |   5b1010ef              jal     ra,20002764 <base_log_internal_core>
+200009b8:       |     \-> 6531                  lui     a0,0xc
+200009ba:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200009be:       |         45d010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:38
+  busy_spin_micros(100);
+200009c2:       \-------> 06400513              li      a0,100
+200009c6:                 523010ef              jal     ra,200026e8 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:39
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, false));
+200009ca:                 f0001517              auipc   a0,0xf0001
+200009ce:                 6a250513              addi    a0,a0,1698 # 1000206c <gpio>
+200009d2:                 4581                  li      a1,0
+200009d4:                 4601                  li      a2,0
+200009d6:                 207d                  jal     20000a84 <dif_gpio_write>
+200009d8:       /-------- cd05                  beqz    a0,20000a10 <test_main+0x1fc>
+200009da:       |         862a                  mv      a2,a0
+200009dc:       |         a9c42503              lw      a0,-1380(s0)
+200009e0:       |  /----- cd01                  beqz    a0,200009f8 <test_main+0x1e4>
+200009e2:       |  |      e000f517              auipc   a0,0xe000f
+200009e6:       |  |      61e50513              addi    a0,a0,1566 # 10000 <_chip_info_end>
+200009ea:       |  |      07c00593              li      a1,124
+200009ee:       |  |      952e                  add     a0,a0,a1
+200009f0:       |  |      4585                  li      a1,1
+200009f2:       |  |      60f010ef              jal     ra,20002800 <base_log_internal_dv>
+200009f6:       |  |  /-- a801                  j       20000a06 <test_main+0x1f2>
+200009f8:       |  \--|-> 00004517              auipc   a0,0x4
+200009fc:       |     |   c9850513              addi    a0,a0,-872 # 20004690 <test_main.log_fields.19>
+20000a00:       |     |   85b2                  mv      a1,a2
+20000a02:       |     |   563010ef              jal     ra,20002764 <base_log_internal_core>
+20000a06:       |     \-> 6531                  lui     a0,0xc
+20000a08:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a0c:       |         40f010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:40
+  busy_spin_micros(100);
+20000a10:       \-------> 06400513              li      a0,100
+20000a14:                 4d5010ef              jal     ra,200026e8 <busy_spin_micros>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:41
+  CHECK_DIF_OK(dif_gpio_write(&gpio, kGpioPinIoa5, true));
+20000a18:                 f0001517              auipc   a0,0xf0001
+20000a1c:                 65450513              addi    a0,a0,1620 # 1000206c <gpio>
+20000a20:                 4605                  li      a2,1
+20000a22:                 4581                  li      a1,0
+20000a24:                 2085                  jal     20000a84 <dif_gpio_write>
+20000a26:       /-------- cd05                  beqz    a0,20000a5e <test_main+0x24a>
+20000a28:       |         862a                  mv      a2,a0
+20000a2a:       |         a9c42503              lw      a0,-1380(s0)
+20000a2e:       |  /----- cd01                  beqz    a0,20000a46 <test_main+0x232>
+20000a30:       |  |      e000f517              auipc   a0,0xe000f
+20000a34:       |  |      5d050513              addi    a0,a0,1488 # 10000 <_chip_info_end>
+20000a38:       |  |      09000593              li      a1,144
+20000a3c:       |  |      952e                  add     a0,a0,a1
+20000a3e:       |  |      4585                  li      a1,1
+20000a40:       |  |      5c1010ef              jal     ra,20002800 <base_log_internal_dv>
+20000a44:       |  |  /-- a801                  j       20000a54 <test_main+0x240>
+20000a46:       |  \--|-> 00004517              auipc   a0,0x4
+20000a4a:       |     |   c5e50513              addi    a0,a0,-930 # 200046a4 <test_main.log_fields.21>
+20000a4e:       |     |   85b2                  mv      a1,a2
+20000a50:       |     |   515010ef              jal     ra,20002764 <base_log_internal_core>
+20000a54:       |     \-> 6531                  lui     a0,0xc
+20000a56:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000a5a:       |         3c1010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/silicon_creator/rom/e2e/ate/ate_gpio_toggle_test.c:43
+
+  return true;
+20000a5e:       \-------> 4505                  li      a0,1
+20000a60:                 40b2                  lw      ra,12(sp)
+20000a62:                 4422                  lw      s0,8(sp)
+20000a64:                 0141                  addi    sp,sp,16
+20000a66:                 8082                  ret
+
+20000a68 <dif_gpio_init>:
+dif_gpio_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:18
+
+#include "gpio_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_gpio_init(mmio_region_t base_addr, dif_gpio_t *gpio) {
+  if (gpio == NULL) {
+20000a68:       /----- c581                     beqz    a1,20000a70 <dif_gpio_init+0x8>
+20000a6a:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:22
+    return kDifBadArg;
+  }
+
+  gpio->base_addr = base_addr;
+20000a6c:       |      c188                     sw      a0,0(a1)
+20000a6e:       |  /-- a011                     j       20000a72 <dif_gpio_init+0xa>
+20000a70:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_gpio_autogen.c:25
+
+  return kDifOk;
+}
+20000a72:          \-> 8532                     mv      a0,a2
+20000a74:              8082                     ret
+
+20000a76 <dif_gpio_write_all>:
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:210
+  return kDifOk;
+}
+
+dif_result_t dif_gpio_write_all(const dif_gpio_t *gpio,
+                                dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000a76:       /-- c509                        beqz    a0,20000a80 <dif_gpio_write_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:214
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OUT_REG_OFFSET, state);
+20000a78:       |   4110                        lw      a2,0(a0)
+20000a7a:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+ * @param offset the offset to write at, in bytes.
+ * @param value the value to write.
+ */
+inline void mmio_region_write32(mmio_region_t base, ptrdiff_t offset,
+                                uint32_t value) {
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20000a7c:       |   ca4c                        sw      a1,20(a2)
+dif_gpio_write_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:217
+
+  return kDifOk;
+}
+20000a7e:       |   8082                        ret
+20000a80:       \-> 450d                        li      a0,3
+20000a82:           8082                        ret
+
+20000a84 <dif_gpio_write>:
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:90
+  if (gpio == NULL || index >= kDifGpioNumPins) {
+20000a84:              00a036b3                 snez    a3,a0
+20000a88:              0205b713                 sltiu   a4,a1,32
+20000a8c:              8f75                     and     a4,a4,a3
+20000a8e:              468d                     li      a3,3
+20000a90:       /----- c705                     beqz    a4,20000ab8 <dif_gpio_write+0x34>
+20000a92:       |      46c1                     li      a3,16
+20000a94:       |      4861                     li      a6,24
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:96
+  const ptrdiff_t offset = (index < 16) ? reg_lower_offset : reg_upper_offset;
+20000a96:       |  /-- 00d5e363                 bltu    a1,a3,20000a9c <dif_gpio_write+0x18>
+20000a9a:       |  |   4871                     li      a6,28
+20000a9c:       |  \-> 4681                     li      a3,0
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:99
+  const uint32_t mask = index_to_mask(index % 16);
+20000a9e:       |      89bd                     andi    a1,a1,15
+index_to_mask():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:18
+static uint32_t index_to_mask(uint32_t index) { return 1u << index; }
+20000aa0:       |      28b017b3                 bset    a5,zero,a1
+20000aa4:       |      6741                     lui     a4,0x10
+gpio_masked_bit_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aa6:       |      00b715b3                 sll     a1,a4,a1
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:100
+  mmio_region_write32(gpio->base_addr, offset,
+20000aaa:       |      4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:101
+                      (mask << 16) | (val ? mask : 0u));
+20000aac:       |      40c00633                 neg     a2,a2
+20000ab0:       |      8e7d                     and     a2,a2,a5
+20000ab2:       |      8dd1                     or      a1,a1,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ab4:       |      9542                     add     a0,a0,a6
+20000ab6:       |      c10c                     sw      a1,0(a0)
+dif_gpio_write():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:221
+
+dif_result_t dif_gpio_write(const dif_gpio_t *gpio, dif_gpio_pin_t pin,
+                            bool state) {
+  return gpio_masked_bit_write(gpio, GPIO_MASKED_OUT_LOWER_REG_OFFSET,
+20000ab8:       \----> 8536                     mv      a0,a3
+20000aba:              8082                     ret
+
+20000abc <dif_gpio_output_set_enabled_all>:
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:233
+                           GPIO_MASKED_OUT_UPPER_REG_OFFSET, mask, state);
+}
+
+dif_result_t dif_gpio_output_set_enabled_all(const dif_gpio_t *gpio,
+                                             dif_gpio_state_t state) {
+  if (gpio == NULL) {
+20000abc:       /-- c509                        beqz    a0,20000ac6 <dif_gpio_output_set_enabled_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:237
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(gpio->base_addr, GPIO_DIRECT_OE_REG_OFFSET, state);
+20000abe:       |   4110                        lw      a2,0(a0)
+20000ac0:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20000ac2:       |   d20c                        sw      a1,32(a2)
+dif_gpio_output_set_enabled_all():
+/proc/self/cwd/sw/device/lib/dif/dif_gpio.c:240
+
+  return kDifOk;
+}
+20000ac4:       |   8082                        ret
+20000ac6:       \-> 450d                        li      a0,3
+20000ac8:           8082                        ret
+
+20000aca <ottf_machine_ecall_handler>:
+ottf_machine_ecall_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:52
+rand_testutils_rng_t rand_testutils_rng_ctx;
+
+// The OTTF overrides the default machine ecall exception handler to implement
+// FreeRTOS context switching, required for supporting cooperative scheduling.
+void ottf_machine_ecall_handler(uint32_t *exc_info) {
+  if (pxCurrentTCB != NULL) {
+20000aca:           f0001517            auipc   a0,0xf0001
+20000ace:           5e252503            lw      a0,1506(a0) # 100020ac <pxCurrentTCB>
+20000ad2:       /-- c119                        beqz    a0,20000ad8 <ottf_machine_ecall_handler+0xe>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:56
+    // If the pointer to the current TCB is not NULL, we are operating in
+    // concurrency mode. In this case, our default behavior is to assume a
+    // context switch has been requested.
+    vTaskSwitchContext();
+20000ad4:       |   0720306f            j       20003b46 <vTaskSwitchContext>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:59
+    return;
+  }
+  LOG_ERROR(
+20000ad8:       \-> 00005517            auipc   a0,0x5
+20000adc:           7ec52503            lw      a0,2028(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000ae0:       /-- c919                        beqz    a0,20000af6 <ottf_machine_ecall_handler+0x2c>
+20000ae2:       |   e000f517            auipc   a0,0xe000f
+20000ae6:       |   51e50513            addi    a0,a0,1310 # 10000 <_chip_info_end>
+20000aea:       |   0a400593            li      a1,164
+20000aee:       |   952e                        add     a0,a0,a1
+20000af0:       |   4581                        li      a1,0
+20000af2:       |   50f0106f            j       20002800 <base_log_internal_dv>
+20000af6:       \-> 00004517            auipc   a0,0x4
+20000afa:           dfe50513            addi    a0,a0,-514 # 200048f4 <ottf_machine_ecall_handler.log_fields>
+20000afe:           4670106f            j       20002764 <base_log_internal_core>
+
+20000b02 <status_report>:
+status_report():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:100
+static size_t status_report_list_cnt = 0;
+
+// Override the status report function to store it in the array above.
+void status_report(status_t status) {
+  // In case of overflow, we overwrite previous values.
+  status_report_list[status_report_list_cnt % kStatusReportListSize] = status;
+20000b02:       f0001597                auipc   a1,0xf0001
+20000b06:       5725a603                lw      a2,1394(a1) # 10002074 <status_report_list_cnt>
+20000b0a:       00004697                auipc   a3,0x4
+20000b0e:       dfe6a683                lw      a3,-514(a3) # 20004908 <kStatusReportListSize>
+20000b12:       02d676b3                remu    a3,a2,a3
+20000b16:       f0001717                auipc   a4,0xf0001
+20000b1a:       5f270713                addi    a4,a4,1522 # 10002108 <status_report_list>
+20000b1e:       20e6c6b3                sh2add  a3,a3,a4
+20000b22:       c288                    sw      a0,0(a3)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:101
+  status_report_list_cnt++;
+20000b24:       0605                    addi    a2,a2,1
+20000b26:       56c5a923                sw      a2,1394(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:102
+}
+20000b2a:       8082                    ret
+
+20000b2c <_ottf_main>:
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:151
+  result = result && test_main();
+  result = result && manufacturer_post_test_hook();
+  report_test_status(result);
+}
+
+void _ottf_main(void) {
+20000b2c:                 7179                  addi    sp,sp,-48
+20000b2e:                 d606                  sw      ra,44(sp)
+20000b30:                 d422                  sw      s0,40(sp)
+20000b32:                 d226                  sw      s1,36(sp)
+20000b34:                 6511                  lui     a0,0x4
+20000b36:                 35450513              addi    a0,a0,852 # 4354 <_stack_size+0x3d4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:152
+  test_status_set(kTestStatusInTest);
+20000b3a:                 2e1010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:156
+
+  // Clear reset reason register.
+  dif_rstmgr_t rstmgr;
+  CHECK_DIF_OK(dif_rstmgr_init(
+20000b3e:                 40410537              lui     a0,0x40410
+20000b42:                 100c                  addi    a1,sp,32
+20000b44:                 0ef010ef              jal     ra,20002432 <dif_rstmgr_init>
+20000b48:                 00005417              auipc   s0,0x5
+20000b4c:       /-------- cd05                  beqz    a0,20000b84 <_ottf_main+0x58>
+20000b4e:       |         862a                  mv      a2,a0
+20000b50:       |         77c42503              lw      a0,1916(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000b54:       |  /----- cd01                  beqz    a0,20000b6c <_ottf_main+0x40>
+20000b56:       |  |      e000f517              auipc   a0,0xe000f
+20000b5a:       |  |      4aa50513              addi    a0,a0,1194 # 10000 <_chip_info_end>
+20000b5e:       |  |      0b800593              li      a1,184
+20000b62:       |  |      952e                  add     a0,a0,a1
+20000b64:       |  |      4585                  li      a1,1
+20000b66:       |  |      49b010ef              jal     ra,20002800 <base_log_internal_dv>
+20000b6a:       |  |  /-- a801                  j       20000b7a <_ottf_main+0x4e>
+20000b6c:       |  \--|-> 00004517              auipc   a0,0x4
+20000b70:       |     |   da050513              addi    a0,a0,-608 # 2000490c <_ottf_main.log_fields>
+20000b74:       |     |   85b2                  mv      a1,a2
+20000b76:       |     |   3ef010ef              jal     ra,20002764 <base_log_internal_core>
+20000b7a:       |     \-> 6531                  lui     a0,0xc
+20000b7c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000b80:       |         29b010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:158
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  if (kOttfTestConfig.clear_reset_reason) {
+20000b84:       \-------> 00004517              auipc   a0,0x4
+20000b88:                 a7c50493              addi    s1,a0,-1412 # 20004600 <kOttfTestConfig>
+20000b8c:                 0114c503              lbu     a0,17(s1)
+20000b90:       /-------- c121                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:159
+    CHECK_DIF_OK(dif_rstmgr_reset_info_clear(&rstmgr));
+20000b92:       |         1008                  addi    a0,sp,32
+20000b94:       |         0ad010ef              jal     ra,20002440 <dif_rstmgr_reset_info_clear>
+20000b98:       +-------- cd05                  beqz    a0,20000bd0 <_ottf_main+0xa4>
+20000b9a:       |         862a                  mv      a2,a0
+20000b9c:       |         77c42503              lw      a0,1916(s0)
+20000ba0:       |  /----- cd01                  beqz    a0,20000bb8 <_ottf_main+0x8c>
+20000ba2:       |  |      e000f517              auipc   a0,0xe000f
+20000ba6:       |  |      45e50513              addi    a0,a0,1118 # 10000 <_chip_info_end>
+20000baa:       |  |      0cc00593              li      a1,204
+20000bae:       |  |      952e                  add     a0,a0,a1
+20000bb0:       |  |      4585                  li      a1,1
+20000bb2:       |  |      44f010ef              jal     ra,20002800 <base_log_internal_dv>
+20000bb6:       |  |  /-- a801                  j       20000bc6 <_ottf_main+0x9a>
+20000bb8:       |  \--|-> 00004517              auipc   a0,0x4
+20000bbc:       |     |   d6850513              addi    a0,a0,-664 # 20004920 <_ottf_main.log_fields.5>
+20000bc0:       |     |   85b2                  mv      a1,a2
+20000bc2:       |     |   3a3010ef              jal     ra,20002764 <base_log_internal_core>
+20000bc6:       |     \-> 6531                  lui     a0,0xc
+20000bc8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000bcc:       |         24f010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:163
+  }
+
+  // Initialize the console to enable logging for non-DV simulation platforms.
+  if (kDeviceType != kDeviceSimDV) {
+20000bd0:       \-------> 00005517              auipc   a0,0x5
+20000bd4:                 6dc52503              lw      a0,1756(a0) # 200062ac <kDeviceType>
+20000bd8:          /----- c91d                  beqz    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:164
+    ottf_console_init();
+20000bda:          |      26b9                  jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:165
+    if (!kOttfTestConfig.silence_console_prints) {
+20000bdc:          |      0124c503              lbu     a0,18(s1)
+20000be0:          +----- e51d                  bnez    a0,20000c0e <_ottf_main+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:166
+      LOG_INFO("Running %s", kOttfTestConfig.file);
+20000be2:          |      77c42503              lw      a0,1916(s0)
+20000be6:          |      48d0                  lw      a2,20(s1)
+20000be8:          |  /-- cd01                  beqz    a0,20000c00 <_ottf_main+0xd4>
+20000bea:          |  |   e000f517              auipc   a0,0xe000f
+20000bee:          |  |   41650513              addi    a0,a0,1046 # 10000 <_chip_info_end>
+20000bf2:          |  |   0e000593              li      a1,224
+20000bf6:          |  |   952e                  add     a0,a0,a1
+20000bf8:          |  |   4585                  li      a1,1
+20000bfa:          |  |   407010ef              jal     ra,20002800 <base_log_internal_dv>
+20000bfe:          +--|-- a801                  j       20000c0e <_ottf_main+0xe2>
+20000c00:          |  \-> 00004517              auipc   a0,0x4
+20000c04:          |      d3450513              addi    a0,a0,-716 # 20004934 <_ottf_main.log_fields.8>
+20000c08:          |      85b2                  mv      a1,a2
+20000c0a:          |      35b010ef              jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:173
+  }
+
+  // Initialize a global random number generator testutil context to provide
+  // tests with a source of entropy for randomizing test behaviors.
+  dif_rv_core_ibex_t rv_core_ibex;
+  CHECK_DIF_OK(dif_rv_core_ibex_init(
+20000c0e:          \----> 411f0537              lui     a0,0x411f0
+20000c12:                 082c                  addi    a1,sp,24
+20000c14:                 1f9010ef              jal     ra,2000260c <dif_rv_core_ibex_init>
+20000c18:       /-------- cd05                  beqz    a0,20000c50 <_ottf_main+0x124>
+20000c1a:       |         862a                  mv      a2,a0
+20000c1c:       |         77c42503              lw      a0,1916(s0)
+20000c20:       |  /----- cd01                  beqz    a0,20000c38 <_ottf_main+0x10c>
+20000c22:       |  |      e000f517              auipc   a0,0xe000f
+20000c26:       |  |      3de50513              addi    a0,a0,990 # 10000 <_chip_info_end>
+20000c2a:       |  |      0f400593              li      a1,244
+20000c2e:       |  |      952e                  add     a0,a0,a1
+20000c30:       |  |      4585                  li      a1,1
+20000c32:       |  |      3cf010ef              jal     ra,20002800 <base_log_internal_dv>
+20000c36:       |  |  /-- a801                  j       20000c46 <_ottf_main+0x11a>
+20000c38:       |  \--|-> 00004517              auipc   a0,0x4
+20000c3c:       |     |   d1050513              addi    a0,a0,-752 # 20004948 <_ottf_main.log_fields.11>
+20000c40:       |     |   85b2                  mv      a1,a2
+20000c42:       |     |   323010ef              jal     ra,20002764 <base_log_internal_core>
+20000c46:       |     \-> 6531                  lui     a0,0xc
+20000c48:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000c4c:       |         1cf010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:176
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  rand_testutils_rng_ctx = rand_testutils_init(&rv_core_ibex);
+20000c50:       \-------> 850a                  mv      a0,sp
+20000c52:                 082c                  addi    a1,sp,24
+20000c54:                 0e9010ef              jal     ra,2000253c <rand_testutils_init>
+20000c58:                 f0001517              auipc   a0,0xf0001
+20000c5c:                 49850513              addi    a0,a0,1176 # 100020f0 <rand_testutils_rng_ctx>
+20000c60:                 858a                  mv      a1,sp
+20000c62:                 4661                  li      a2,24
+20000c64:                 42c030ef              jal     ra,20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:179
+
+  // Run the test.
+  if (kOttfTestConfig.enable_concurrency) {
+20000c68:                 0004c503              lbu     a0,0(s1)
+20000c6c:          /----- c11d                  beqz    a0,20000c92 <_ottf_main+0x166>
+ottf_task_create():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:67
+  return xTaskCreate(/*pvTaskCode=*/task_function, /*pcName=*/task_name,
+20000c6e:          |      00000517              auipc   a0,0x0
+20000c72:          |      0a450513              addi    a0,a0,164 # 20000d12 <test_wrapper>
+20000c76:          |      00004597              auipc   a1,0x4
+20000c7a:          |      bf358593              addi    a1,a1,-1037 # 20004869 <test_main.log_fields.21+0x1c5>
+20000c7e:          |      40000613              li      a2,1024
+20000c82:          |      4705                  li      a4,1
+20000c84:          |      4681                  li      a3,0
+20000c86:          |      4781                  li      a5,0
+20000c88:          |      4a3020ef              jal     ra,2000392a <xTaskCreate>
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:184
+    // Run `test_main()` in a FreeRTOS task, allowing other FreeRTOS tasks to
+    // be spawned, if requested in the main test task. Note, we spawn the main
+    // test task at a priority level of 0.
+    ottf_task_create(test_wrapper, "test_main", /*task_stack_depth=*/1024, 0);
+    vTaskStartScheduler();
+20000c8c:          |      745020ef              jal     ra,20003bd0 <vTaskStartScheduler>
+20000c90:          |  /-- a011                  j       20000c94 <_ottf_main+0x168>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:187
+  } else {
+    // Otherwise, launch `test_main()` on bare-metal.
+    test_wrapper(NULL);
+20000c92:          \--|-> 2041                  jal     20000d12 <test_wrapper>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+  }
+
+  // Unreachable.
+  CHECK(false);
+20000c94:             \-> 00004517              auipc   a0,0x4
+20000c98:                 a2450613              addi    a2,a0,-1500 # 200046b8 <test_main.log_fields.21+0x14>
+20000c9c:                 368f05b7              lui     a1,0x368f0
+20000ca0:                 4501                  li      a0,0
+20000ca2:                 4681                  li      a3,0
+20000ca4:                 578020ef              jal     ra,2000321c <status_create>
+20000ca8:                 00010023              sb      zero,0(sp)
+20000cac:                 00014583              lbu     a1,0(sp)
+20000cb0:       /-------- e1a1                  bnez    a1,20000cf0 <_ottf_main+0x1c4>
+20000cb2:       |         77c42503              lw      a0,1916(s0)
+20000cb6:       |  /----- cd01                  beqz    a0,20000cce <_ottf_main+0x1a2>
+20000cb8:       |  |      e000f517              auipc   a0,0xe000f
+20000cbc:       |  |      34850513              addi    a0,a0,840 # 10000 <_chip_info_end>
+20000cc0:       |  |      10800593              li      a1,264
+20000cc4:       |  |      952e                  add     a0,a0,a1
+20000cc6:       |  |      4581                  li      a1,0
+20000cc8:       |  |      339010ef              jal     ra,20002800 <base_log_internal_dv>
+20000ccc:       |  |  /-- a039                  j       20000cda <_ottf_main+0x1ae>
+20000cce:       |  \--|-> 00004517              auipc   a0,0x4
+20000cd2:       |     |   c8e50513              addi    a0,a0,-882 # 2000495c <_ottf_main.log_fields.15>
+20000cd6:       |     |   28f010ef              jal     ra,20002764 <base_log_internal_core>
+20000cda:       |     \-> 00004517              auipc   a0,0x4
+20000cde:       |         9de50613              addi    a2,a0,-1570 # 200046b8 <test_main.log_fields.21+0x14>
+20000ce2:       |         4535                  li      a0,13
+20000ce4:       |         368f05b7              lui     a1,0x368f0
+20000ce8:       |         0bf00693              li      a3,191
+20000cec:       |         530020ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+ * @param s The status code.
+ * @return `absl_status_t` contained within the status_t.
+ */
+OT_WARN_UNUSED_RESULT
+OT_ALWAYS_INLINE absl_status_t status_err(status_t s) {
+  return s.value < 0 ? (absl_status_t)bitfield_field32_read(
+20000cf0:       \-------> 00052593              slti    a1,a0,0
+20000cf4:                 897d                  andi    a0,a0,31
+_ottf_main():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:191
+20000cf6:                 00a03533              snez    a0,a0
+20000cfa:                 8d6d                  and     a0,a0,a1
+20000cfc:             /-- c511                  beqz    a0,20000d08 <_ottf_main+0x1dc>
+20000cfe:             |   6531                  lui     a0,0xc
+20000d00:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20000d04:             |   117010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:192
+}
+20000d08:             \-> 50b2                  lw      ra,44(sp)
+20000d0a:                 5422                  lw      s0,40(sp)
+20000d0c:                 5492                  lw      s1,36(sp)
+20000d0e:                 6145                  addi    sp,sp,48
+20000d10:                 8082                  ret
+
+20000d12 <test_wrapper>:
+test_wrapper():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:143
+static void test_wrapper(void *task_parameters) {
+20000d12:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:145
+  bool result = manufacturer_pre_test_hook();
+20000d14:                       d606                    sw      ra,44(sp)
+20000d16:                       d422                    sw      s0,40(sp)
+20000d18:                       d226                    sw      s1,36(sp)
+20000d1a:                       d04a                    sw      s2,32(sp)
+20000d1c:                       ce4e                    sw      s3,28(sp)
+20000d1e:                       cc52                    sw      s4,24(sp)
+20000d20:                       ca56                    sw      s5,20(sp)
+20000d22:                       c85a                    sw      s6,16(sp)
+20000d24:                       c65e                    sw      s7,12(sp)
+20000d26:                       c462                    sw      s8,8(sp)
+20000d28:                       2a4030ef                jal     ra,20003fcc <manufacturer_pre_test_hook>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:146
+  result = result && test_main();
+20000d2c:                /----- c519                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d2e:                |      34dd                    jal     20000814 <test_main>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:147
+  result = result && manufacturer_post_test_hook();
+20000d30:                +----- c509                    beqz    a0,20000d3a <test_wrapper+0x28>
+20000d32:                |      29e030ef                jal     ra,20003fd0 <manufacturer_post_test_hook>
+20000d36:                |      842a                    mv      s0,a0
+20000d38:                |  /-- a011                    j       20000d3c <test_wrapper+0x2a>
+20000d3a:                \--|-> 4401                    li      s0,0
+report_test_status():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:106
+  if (kDeviceType != kDeviceSimDV) {
+20000d3c:                   \-> 00005517                auipc   a0,0x5
+20000d40:                       57052503                lw      a0,1392(a0) # 200062ac <kDeviceType>
+20000d44:          /----------- cd05                    beqz    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:107
+    if (kOttfTestConfig.console.test_may_clobber) {
+20000d46:          |            00004517                auipc   a0,0x4
+20000d4a:          |            8ba50493                addi    s1,a0,-1862 # 20004600 <kOttfTestConfig>
+20000d4e:          |            00c4c503                lbu     a0,12(s1)
+20000d52:          |        /-- c111                    beqz    a0,20000d56 <test_wrapper+0x44>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:108
+      ottf_console_init();
+20000d54:          |        |   2ad1                    jal     20000f28 <ottf_console_init>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:110
+    if (!kOttfTestConfig.silence_console_prints) {
+20000d56:          |        \-> 0124c503                lbu     a0,18(s1)
+20000d5a:          +----------- e10d                    bnez    a0,20000d7c <test_wrapper+0x6a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d5c:          |            00005517                auipc   a0,0x5
+20000d60:          |            56852503                lw      a0,1384(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000d64:          |            48d0                    lw      a2,20(s1)
+20000d66:          |  /-------- cd19                    beqz    a0,20000d84 <test_wrapper+0x72>
+20000d68:          |  |         e000f517                auipc   a0,0xe000f
+20000d6c:          |  |         29850513                addi    a0,a0,664 # 10000 <_chip_info_end>
+20000d70:          |  |         11c00593                li      a1,284
+20000d74:          |  |         952e                    add     a0,a0,a1
+20000d76:          |  |         4585                    li      a1,1
+20000d78:          |  |         289010ef                jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d7c:          \--|--/----X cc01                    beqz    s0,20000d94 <test_wrapper+0x82>
+20000d7e:             |  |  /-> 6425                    lui     s0,0x9
+20000d80:             |  |  |   0435                    addi    s0,s0,13
+20000d82:       /-----|--|--|-- a8f1                    j       20000e5e <test_wrapper+0x14c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:111
+      LOG_INFO("Finished %s", kOttfTestConfig.file);
+20000d84:       |     \--|--|-> 00004517                auipc   a0,0x4
+20000d88:       |        |  |   bec50513                addi    a0,a0,-1044 # 20004970 <report_test_status.log_fields>
+20000d8c:       |        |  |   85b2                    mv      a1,a2
+20000d8e:       |        |  |   1d7010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:117
+  if (!result) {
+20000d92:       |        |  \-- f475                    bnez    s0,20000d7e <test_wrapper+0x6c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:118
+    LOG_INFO("Status reported by the test:");
+20000d94:       |        \----> 00005517                auipc   a0,0x5
+20000d98:       |               53052983                lw      s3,1328(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000d9c:       |        /----- 00098d63                beqz    s3,20000db6 <test_wrapper+0xa4>
+20000da0:       |        |      e000f517                auipc   a0,0xe000f
+20000da4:       |        |      26050513                addi    a0,a0,608 # 10000 <_chip_info_end>
+20000da8:       |        |      13000593                li      a1,304
+20000dac:       |        |      952e                    add     a0,a0,a1
+20000dae:       |        |      4581                    li      a1,0
+20000db0:       |        |      251010ef                jal     ra,20002800 <base_log_internal_dv>
+20000db4:       |        |  /-- a039                    j       20000dc2 <test_wrapper+0xb0>
+20000db6:       |        \--|-> 00004517                auipc   a0,0x4
+20000dba:       |           |   bce50513                addi    a0,a0,-1074 # 20004984 <report_test_status.log_fields.20>
+20000dbe:       |           |   1a7010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:120
+    size_t print_cnt = status_report_list_cnt;
+20000dc2:       |           \-> f0001a97                auipc   s5,0xf0001
+20000dc6:       |               2b2aa503                lw      a0,690(s5) # 10002074 <status_report_list_cnt>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:121
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000dca:       |               00004597                auipc   a1,0x4
+20000dce:       |               b3e5ab03                lw      s6,-1218(a1) # 20004908 <kStatusReportListSize>
+20000dd2:       |               0b655bb3                minu    s7,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000dd6:       |  /----------- 040b8c63                beqz    s7,20000e2e <test_wrapper+0x11c>
+20000dda:       |  |            4405                    li      s0,1
+20000ddc:       |  |            54fd                    li      s1,-1
+20000dde:       |  |            f0001517                auipc   a0,0xf0001
+20000de2:       |  |            32a50c13                addi    s8,a0,810 # 10002108 <status_report_list>
+20000de6:       |  |            00004517                auipc   a0,0x4
+20000dea:       |  |            bb250913                addi    s2,a0,-1102 # 20004998 <report_test_status.log_fields.23>
+20000dee:       |  |            e000f517                auipc   a0,0xe000f
+20000df2:       |  |            21250a13                addi    s4,a0,530 # 10000 <_chip_info_end>
+20000df6:       |  |            14400513                li      a0,324
+20000dfa:       |  |            9a2a                    add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:126
+      size_t idx = (status_report_list_cnt - i) % kStatusReportListSize;
+20000dfc:       |  |  /-------> 2b2aa503                lw      a0,690(s5)
+20000e00:       |  |  |         9526                    add     a0,a0,s1
+20000e02:       |  |  |         03657533                remu    a0,a0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:127
+      LOG_INFO("- %r", status_report_list[idx]);
+20000e06:       |  |  |         21854533                sh2add  a0,a0,s8
+20000e0a:       |  |  |         4110                    lw      a2,0(a0)
+20000e0c:       |  |  |  /----- 00098763                beqz    s3,20000e1a <test_wrapper+0x108>
+20000e10:       |  |  |  |      4585                    li      a1,1
+20000e12:       |  |  |  |      8552                    mv      a0,s4
+20000e14:       |  |  |  |      1ed010ef                jal     ra,20002800 <base_log_internal_dv>
+20000e18:       |  |  |  |  /-- a029                    j       20000e22 <test_wrapper+0x110>
+20000e1a:       |  |  |  \--|-> 854a                    mv      a0,s2
+20000e1c:       |  |  |     |   85b2                    mv      a1,a2
+20000e1e:       |  |  |     |   147010ef                jal     ra,20002764 <base_log_internal_core>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:125
+    for (size_t i = 1; i <= print_cnt; i++) {
+20000e22:       |  |  |     \-> 0405                    addi    s0,s0,1
+20000e24:       |  |  |         14fd                    addi    s1,s1,-1
+20000e26:       |  |  \-------- fc8bfbe3                bgeu    s7,s0,20000dfc <test_wrapper+0xea>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:130
+    if (status_report_list_cnt > kStatusReportListSize) {
+20000e2a:       |  |            2b2aa503                lw      a0,690(s5)
+20000e2e:       |  \-----/----X 02ab7563                bgeu    s6,a0,20000e58 <test_wrapper+0x146>
+20000e32:       |        |  /-- 00098d63                beqz    s3,20000e4c <test_wrapper+0x13a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:131
+      LOG_INFO(
+20000e36:       |        |  |   e000f517                auipc   a0,0xe000f
+20000e3a:       |        |  |   1ca50513                addi    a0,a0,458 # 10000 <_chip_info_end>
+20000e3e:       |        |  |   15800593                li      a1,344
+20000e42:       |        |  |   952e                    add     a0,a0,a1
+20000e44:       |        |  |   4581                    li      a1,0
+20000e46:       |        |  |   1bb010ef                jal     ra,20002800 <base_log_internal_dv>
+20000e4a:       |        +--|-- a039                    j       20000e58 <test_wrapper+0x146>
+20000e4c:       |        |  \-> 00004517                auipc   a0,0x4
+20000e50:       |        |      b6050513                addi    a0,a0,-1184 # 200049ac <report_test_status.log_fields.26>
+20000e54:       |        |      111010ef                jal     ra,20002764 <base_log_internal_core>
+20000e58:       |        \----> 6531                    lui     a0,0xc
+20000e5a:       |               aad50413                addi    s0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:136
+  coverage_send_buffer();
+20000e5e:       \-------------> 2839                    jal     20000e7c <coverage_send_buffer>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_main.c:137
+  test_status_set(result ? kTestStatusPassed : kTestStatusFailed);
+20000e60:                       8522                    mv      a0,s0
+20000e62:                       50b2                    lw      ra,44(sp)
+20000e64:                       5422                    lw      s0,40(sp)
+20000e66:                       5492                    lw      s1,36(sp)
+20000e68:                       5902                    lw      s2,32(sp)
+20000e6a:                       49f2                    lw      s3,28(sp)
+20000e6c:                       4a62                    lw      s4,24(sp)
+20000e6e:                       4ad2                    lw      s5,20(sp)
+20000e70:                       4b42                    lw      s6,16(sp)
+20000e72:                       4bb2                    lw      s7,12(sp)
+20000e74:                       4c22                    lw      s8,8(sp)
+20000e76:                       6145                    addi    sp,sp,48
+20000e78:                       7a20106f                j       2000261a <test_status_set>
+
+20000e7c <coverage_send_buffer>:
+coverage_send_buffer():
+/proc/self/cwd/sw/device/lib/testing/test_framework/coverage_none.c:9
+
+#include "sw/device/lib/testing/test_framework/coverage.h"
+
+// This NOP function gets linked in when coverage is disabled. See
+// `test_coverage_llvm.c` for its actual definition when coverage is enabled.
+void coverage_send_buffer(void) {}
+20000e7c:       8082                    ret
+
+20000e7e <vApplicationMallocFailedHook>:
+vApplicationMallocFailedHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:18
+
+/**
+ * This is called if configUSE_MALLOC_FAILED_HOOK is set to 1 in
+ * FreeRTOSConfig.h, and a call to pvPortMalloc() fails.
+ */
+void vApplicationMallocFailedHook(void) {
+20000e7e:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:19
+  LOG_INFO("%s",
+20000e80:              c606                     sw      ra,12(sp)
+20000e82:              00005517                 auipc   a0,0x5
+20000e86:              44252503                 lw      a0,1090(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000e8a:          /-- ed01                     bnez    a0,20000ea2 <vApplicationMallocFailedHook+0x24>
+20000e8c:          |   00004517                 auipc   a0,0x4
+20000e90:          |   be450513                 addi    a0,a0,-1052 # 20004a70 <vApplicationMallocFailedHook.log_fields>
+20000e94:          |   00004597                 auipc   a1,0x4
+20000e98:          |   b6258593                 addi    a1,a1,-1182 # 200049f6 <report_test_status.log_fields.26+0x4a>
+20000e9c:          |   0c9010ef                 jal     ra,20002764 <base_log_internal_core>
+20000ea0:       /--|-- a839                     j       20000ebe <vApplicationMallocFailedHook+0x40>
+20000ea2:       |  \-> e000f517                 auipc   a0,0xe000f
+20000ea6:       |      15e50513                 addi    a0,a0,350 # 10000 <_chip_info_end>
+20000eaa:       |      16c00593                 li      a1,364
+20000eae:       |      952e                     add     a0,a0,a1
+20000eb0:       |      00004597                 auipc   a1,0x4
+20000eb4:       |      b4658613                 addi    a2,a1,-1210 # 200049f6 <report_test_status.log_fields.26+0x4a>
+20000eb8:       |      4585                     li      a1,1
+20000eba:       |      147010ef                 jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:21
+           "FreeRTOS malloc failed. Increase heap size in FreeRTOSConfig.h");
+  irq_global_ctrl(false);
+20000ebe:       \----> 4501                     li      a0,0
+20000ec0:              603000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:22
+  abort();
+20000ec4:              089010ef                 jal     ra,2000274c <abort>
+
+20000ec8 <vApplicationStackOverflowHook>:
+vApplicationStackOverflowHook():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:29
+
+/**
+ * This is called if configCHECK_FOR_STACK_OVERFLOW is set to 1 or 2 in
+ * FreeRTOSConfig.h, and a task detects a stack overflow.
+ */
+void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
+20000ec8:              1141                     addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:30
+  LOG_INFO("FreeRTOS stack overflow. Increase stack size of task: %s",
+20000eca:              c606                     sw      ra,12(sp)
+20000ecc:              00005517                 auipc   a0,0x5
+20000ed0:              3f852503                 lw      a0,1016(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000ed4:              862e                     mv      a2,a1
+20000ed6:          /-- e909                     bnez    a0,20000ee8 <vApplicationStackOverflowHook+0x20>
+20000ed8:          |   00004517                 auipc   a0,0x4
+20000edc:          |   bac50513                 addi    a0,a0,-1108 # 20004a84 <vApplicationStackOverflowHook.log_fields>
+20000ee0:          |   85b2                     mv      a1,a2
+20000ee2:          |   083010ef                 jal     ra,20002764 <base_log_internal_core>
+20000ee6:       /--|-- a819                     j       20000efc <vApplicationStackOverflowHook+0x34>
+20000ee8:       |  \-> e000f517                 auipc   a0,0xe000f
+20000eec:       |      11850513                 addi    a0,a0,280 # 10000 <_chip_info_end>
+20000ef0:       |      18000593                 li      a1,384
+20000ef4:       |      952e                     add     a0,a0,a1
+20000ef6:       |      4585                     li      a1,1
+20000ef8:       |      109010ef                 jal     ra,20002800 <base_log_internal_dv>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:32
+           pcTaskName);
+  irq_global_ctrl(false);
+20000efc:       \----> 4501                     li      a0,0
+20000efe:              5c5000ef                 jal     ra,20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_hooks.c:33
+  abort();
+20000f02:              04b010ef                 jal     ra,2000274c <abort>
+
+20000f06 <xPortStartScheduler>:
+xPortStartScheduler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:93
+// ----------------------------------------------------------------------------
+// Scheduler Setup
+// ----------------------------------------------------------------------------
+extern void xPortStartFirstTask(void);
+
+BaseType_t xPortStartScheduler(void) {
+20000f06:       1141                    addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:97
+#if configUSE_PREEMPTION
+  vPortSetupTimerInterrupt();
+#endif  // configUSE_PREEMPTION
+  irq_timer_ctrl(true);
+20000f08:       c606                    sw      ra,12(sp)
+20000f0a:       4505                    li      a0,1
+20000f0c:       5df000ef                jal     ra,20001cea <irq_timer_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:98
+  irq_external_ctrl(true);
+20000f10:       4505                    li      a0,1
+20000f12:       5c3000ef                jal     ra,20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:99
+  irq_software_ctrl(true);
+20000f16:       4505                    li      a0,1
+20000f18:       5e9000ef                jal     ra,20001d00 <irq_software_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:103
+  // Note: no need to call 'irq_global_ctrl(true)' since the global interrupt
+  // enable is set in the xPortStartFirstTask sub-routine in
+  // sw/device/lib/testing/test_framework/freertos_port.S.
+  xPortStartFirstTask();
+20000f1c:       e2cff0ef                jal     ra,20000548 <xPortStartFirstTask>
+/proc/self/cwd/sw/device/lib/testing/test_framework/freertos_port.c:106
+
+  // Unreachable.
+  return pdFAIL;
+20000f20:       4501                    li      a0,0
+20000f22:       40b2                    lw      ra,12(sp)
+20000f24:       0141                    addi    sp,sp,16
+20000f26:       8082                    ret
+
+20000f28 <ottf_console_init>:
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:123
+        i * ARRAYSIZE(kEmptyPattern), ARRAYSIZE(kEmptyPattern), kEmptyPattern));
+  }
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+}
+
+void ottf_console_init(void) {
+20000f28:                                1141                   addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  // Initialize/Configure the console device.
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f2a:                                c606                   sw      ra,12(sp)
+20000f2c:                                c422                   sw      s0,8(sp)
+20000f2e:                                00003517               auipc   a0,0x3
+20000f32:                                6d250593               addi    a1,a0,1746 # 20004600 <kOttfTestConfig>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f36:                                41c8                   lw      a0,4(a1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:125
+  uintptr_t base_addr = kOttfTestConfig.console.base_addr;
+20000f38:                                4580                   lw      s0,8(a1)
+20000f3a:                                4585                   li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:126
+  switch (kOttfTestConfig.console.type) {
+20000f3c:                            /-- 04b50663               beq     a0,a1,20000f88 <ottf_console_init+0x60>
+20000f40:                         /--|-- e52d                   bnez    a0,20000faa <ottf_console_init+0x82>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:130
+    case kOttfConsoleUart:
+      // Set a default for the console base address if the base address is not
+      // configured. The default is to use UART0.
+      if (base_addr == 0) {
+20000f42:       /-----------------|--|-- 12041263               bnez    s0,20001066 <ottf_console_init+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20000f46:       |                 |  |   00004517               auipc   a0,0x4
+20000f4a:       |                 |  |   b5250613               addi    a2,a0,-1198 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000f4e:       |                 |  |   0e8f05b7               lui     a1,0xe8f0
+20000f52:       |                 |  |   4501                   li      a0,0
+20000f54:       |                 |  |   4681                   li      a3,0
+20000f56:       |                 |  |   2c6020ef               jal     ra,2000321c <status_create>
+20000f5a:       |                 |  |   4585                   li      a1,1
+20000f5c:       |                 |  |   00b103a3               sb      a1,7(sp)
+20000f60:       |                 |  |   00714583               lbu     a1,7(sp)
+20000f64:       |  /--------------|--|-- 0e059363               bnez    a1,2000104a <ottf_console_init+0x122>
+20000f68:       |  |              |  |   00005517               auipc   a0,0x5
+20000f6c:       |  |              |  |   35c52503               lw      a0,860(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000f70:       |  |     /--------|--|-- cd45                   beqz    a0,20001028 <ottf_console_init+0x100>
+20000f72:       |  |     |        |  |   e000f517               auipc   a0,0xe000f
+20000f76:       |  |     |        |  |   08e50513               addi    a0,a0,142 # 10000 <_chip_info_end>
+20000f7a:       |  |     |        |  |   19400593               li      a1,404
+20000f7e:       |  |     |        |  |   952e                   add     a0,a0,a1
+20000f80:       |  |     |        |  |   4581                   li      a1,0
+20000f82:       |  |     |        |  |   07f010ef               jal     ra,20002800 <base_log_internal_dv>
+20000f86:       |  |     |  /-----|--|-- a07d                   j       20001034 <ottf_console_init+0x10c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:140
+      ottf_console_configure_uart(base_addr);
+      sink = get_uart_sink();
+      getc = uart_getc;
+      break;
+    case (kOttfConsoleSpiDevice):
+      ottf_console_configure_spi_device(base_addr);
+20000f88:       |  |     |  |     |  \-> 8522                   mv      a0,s0
+20000f8a:       |  |     |  |     |      2ead                   jal     20001304 <ottf_console_configure_spi_device>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:141
+      sink = get_spi_device_sink();
+20000f8c:       |  |     |  |     |      0ab010ef               jal     ra,20002836 <get_spi_device_sink>
+20000f90:       |  |     |  |     |      f0001597               auipc   a1,0xf0001
+20000f94:       |  |     |  |     |      0ea5a623               sw      a0,236(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:142
+      getc = spi_device_getc;
+20000f98:       |  |     |  |     |      f0001517               auipc   a0,0xf0001
+20000f9c:       |  |     |  |     |      00000597               auipc   a1,0x0
+20000fa0:       |  |     |  |     |      67e58593               addi    a1,a1,1662 # 2000161a <spi_device_getc>
+20000fa4:       |  |     |  |     |      0eb52423               sw      a1,232(a0) # 10002080 <getc>
+20000fa8:       |  |  /--|--|-----|----- a8f9                   j       20001086 <ottf_console_init+0x15e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+      break;
+    default:
+      CHECK(false, "unsupported OTTF console interface.");
+20000faa:       |  |  |  |  |     \----> 00004517               auipc   a0,0x4
+20000fae:       |  |  |  |  |            aee50613               addi    a2,a0,-1298 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000fb2:       |  |  |  |  |            0e8f05b7               lui     a1,0xe8f0
+20000fb6:       |  |  |  |  |            4501                   li      a0,0
+20000fb8:       |  |  |  |  |            4681                   li      a3,0
+20000fba:       |  |  |  |  |            262020ef               jal     ra,2000321c <status_create>
+20000fbe:       |  |  |  |  |            00010323               sb      zero,6(sp)
+20000fc2:       |  |  |  |  |            00614583               lbu     a1,6(sp)
+20000fc6:       |  |  |  |  |  /-------- e1b1                   bnez    a1,2000100a <ottf_console_init+0xe2>
+20000fc8:       |  |  |  |  |  |         00005517               auipc   a0,0x5
+20000fcc:       |  |  |  |  |  |         2fc52503               lw      a0,764(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20000fd0:       |  |  |  |  |  |  /----- cd01                   beqz    a0,20000fe8 <ottf_console_init+0xc0>
+20000fd2:       |  |  |  |  |  |  |      e000f517               auipc   a0,0xe000f
+20000fd6:       |  |  |  |  |  |  |      02e50513               addi    a0,a0,46 # 10000 <_chip_info_end>
+20000fda:       |  |  |  |  |  |  |      1a800593               li      a1,424
+20000fde:       |  |  |  |  |  |  |      952e                   add     a0,a0,a1
+20000fe0:       |  |  |  |  |  |  |      4581                   li      a1,0
+20000fe2:       |  |  |  |  |  |  |      01f010ef               jal     ra,20002800 <base_log_internal_dv>
+20000fe6:       |  |  |  |  |  |  |  /-- a039                   j       20000ff4 <ottf_console_init+0xcc>
+20000fe8:       |  |  |  |  |  |  \--|-> 00004517               auipc   a0,0x4
+20000fec:       |  |  |  |  |  |     |   65450513               addi    a0,a0,1620 # 2000563c <ottf_console_init.log_fields.4>
+20000ff0:       |  |  |  |  |  |     |   774010ef               jal     ra,20002764 <base_log_internal_core>
+20000ff4:       |  |  |  |  |  |     \-> 00004517               auipc   a0,0x4
+20000ff8:       |  |  |  |  |  |         aa450613               addi    a2,a0,-1372 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20000ffc:       |  |  |  |  |  |         4535                   li      a0,13
+20000ffe:       |  |  |  |  |  |         0e8f05b7               lui     a1,0xe8f0
+20001002:       |  |  |  |  |  |         09100693               li      a3,145
+20001006:       |  |  |  |  |  |         216020ef               jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000100a:       |  |  |  |  |  \-------> 00052593               slti    a1,a0,0
+2000100e:       |  |  |  |  |            897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:145
+20001010:       |  |  |  |  |            00a03533               snez    a0,a0
+20001014:       |  |  |  |  |            8d6d                   and     a0,a0,a1
+20001016:       |  |  +--|--|----------- c925                   beqz    a0,20001086 <ottf_console_init+0x15e>
+20001018:       |  |  |  |  |            6531                   lui     a0,0xc
+2000101a:       |  |  |  |  |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000101e:       |  |  |  |  |            40b2                   lw      ra,12(sp)
+20001020:       |  |  |  |  |            4422                   lw      s0,8(sp)
+20001022:       |  |  |  |  |            0141                   addi    sp,sp,16
+20001024:       |  |  |  |  |            5f60106f               j       2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+        CHECK(kOttfTestConfig.console.type == kOttfConsoleUart);
+20001028:       |  |  |  \--|----------> 00004517               auipc   a0,0x4
+2000102c:       |  |  |     |            60050513               addi    a0,a0,1536 # 20005628 <ottf_console_init.log_fields>
+20001030:       |  |  |     |            734010ef               jal     ra,20002764 <base_log_internal_core>
+20001034:       |  |  |     \----------> 00004517               auipc   a0,0x4
+20001038:       |  |  |                  a6450613               addi    a2,a0,-1436 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000103c:       |  |  |                  4535                   li      a0,13
+2000103e:       |  |  |                  0e8f05b7               lui     a1,0xe8f0
+20001042:       |  |  |                  08300693               li      a3,131
+20001046:       |  |  |                  1d6020ef               jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000104a:       |  \--|----------------> 00052593               slti    a1,a0,0
+2000104e:       |     |                  897d                   andi    a0,a0,31
+ottf_console_init():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:131
+20001050:       |     |                  00a03533               snez    a0,a0
+20001054:       |     |                  8d6d                   and     a0,a0,a1
+20001056:       |     |                  40000437               lui     s0,0x40000
+2000105a:       +-----|----------------- c511                   beqz    a0,20001066 <ottf_console_init+0x13e>
+2000105c:       |     |                  6531                   lui     a0,0xc
+2000105e:       |     |                  aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001062:       |     |                  5b8010ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:135
+      ottf_console_configure_uart(base_addr);
+20001066:       \-----|----------------> 8522                   mv      a0,s0
+20001068:             |                  201d                   jal     2000108e <ottf_console_configure_uart>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:136
+      sink = get_uart_sink();
+2000106a:             |                  169010ef               jal     ra,200029d2 <get_uart_sink>
+2000106e:             |                  f0001597               auipc   a1,0xf0001
+20001072:             |                  00a5a723               sw      a0,14(a1) # 1000207c <sink>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:137
+      getc = uart_getc;
+20001076:             |                  f0001517               auipc   a0,0xf0001
+2000107a:             |                  00000597               auipc   a1,0x0
+2000107e:             |                  1e858593               addi    a1,a1,488 # 20001262 <uart_getc>
+20001082:             |                  00b52523               sw      a1,10(a0) # 10002080 <getc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:148
+      break;
+  }
+}
+20001086:             \----------------> 40b2                   lw      ra,12(sp)
+20001088:                                4422                   lw      s0,8(sp)
+2000108a:                                0141                   addi    sp,sp,16
+2000108c:                                8082                   ret
+
+2000108e <ottf_console_configure_uart>:
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:150
+
+void ottf_console_configure_uart(uintptr_t base_addr) {
+2000108e:                 7179                  addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:151
+  CHECK_DIF_OK(
+20001090:                 d606                  sw      ra,44(sp)
+20001092:                 d422                  sw      s0,40(sp)
+20001094:                 d226                  sw      s1,36(sp)
+20001096:                 d04a                  sw      s2,32(sp)
+20001098:                 f0001597              auipc   a1,0xf0001
+2000109c:                 fe058593              addi    a1,a1,-32 # 10002078 <ottf_console_uart>
+200010a0:                 624020ef              jal     ra,200036c4 <dif_uart_init>
+200010a4:                 00005917              auipc   s2,0x5
+200010a8:       /-------- cd05                  beqz    a0,200010e0 <ottf_console_configure_uart+0x52>
+200010aa:       |         862a                  mv      a2,a0
+200010ac:       |         22092503              lw      a0,544(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+200010b0:       |  /----- cd01                  beqz    a0,200010c8 <ottf_console_configure_uart+0x3a>
+200010b2:       |  |      e000f517              auipc   a0,0xe000f
+200010b6:       |  |      f4e50513              addi    a0,a0,-178 # 10000 <_chip_info_end>
+200010ba:       |  |      1bc00593              li      a1,444
+200010be:       |  |      952e                  add     a0,a0,a1
+200010c0:       |  |      4585                  li      a1,1
+200010c2:       |  |      73e010ef              jal     ra,20002800 <base_log_internal_dv>
+200010c6:       |  |  /-- a801                  j       200010d6 <ottf_console_configure_uart+0x48>
+200010c8:       |  \--|-> 00004517              auipc   a0,0x4
+200010cc:       |     |   58850513              addi    a0,a0,1416 # 20005650 <ottf_console_configure_uart.log_fields>
+200010d0:       |     |   85b2                  mv      a1,a2
+200010d2:       |     |   692010ef              jal     ra,20002764 <base_log_internal_core>
+200010d6:       |     \-> 6531                  lui     a0,0xc
+200010d8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200010dc:       |         53e010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+      dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart));
+  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
+200010e0:       \-------> 00004517              auipc   a0,0x4
+200010e4:                 9b850613              addi    a2,a0,-1608 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200010e8:                 0e8f05b7              lui     a1,0xe8f0
+200010ec:                 4501                  li      a0,0
+200010ee:                 4681                  li      a3,0
+200010f0:                 12c020ef              jal     ra,2000321c <status_create>
+200010f4:                 00005597              auipc   a1,0x5
+200010f8:                 1c458493              addi    s1,a1,452 # 200062b8 <kUartBaudrate>
+200010fc:                 40cc                  lw      a1,4(s1)
+200010fe:                 0015b593              seqz    a1,a1
+20001102:                 00b10023              sb      a1,0(sp)
+20001106:                 00014583              lbu     a1,0(sp)
+2000110a:       /-------- e1a1                  bnez    a1,2000114a <ottf_console_configure_uart+0xbc>
+2000110c:       |         22092503              lw      a0,544(s2)
+20001110:       |  /----- cd01                  beqz    a0,20001128 <ottf_console_configure_uart+0x9a>
+20001112:       |  |      e000f517              auipc   a0,0xe000f
+20001116:       |  |      eee50513              addi    a0,a0,-274 # 10000 <_chip_info_end>
+2000111a:       |  |      1d000593              li      a1,464
+2000111e:       |  |      952e                  add     a0,a0,a1
+20001120:       |  |      4581                  li      a1,0
+20001122:       |  |      6de010ef              jal     ra,20002800 <base_log_internal_dv>
+20001126:       |  |  /-- a039                  j       20001134 <ottf_console_configure_uart+0xa6>
+20001128:       |  \--|-> 00004517              auipc   a0,0x4
+2000112c:       |     |   53c50513              addi    a0,a0,1340 # 20005664 <ottf_console_configure_uart.log_fields.9>
+20001130:       |     |   634010ef              jal     ra,20002764 <base_log_internal_core>
+20001134:       |     \-> 00004517              auipc   a0,0x4
+20001138:       |         96450613              addi    a2,a0,-1692 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000113c:       |         4535                  li      a0,13
+2000113e:       |         0e8f05b7              lui     a1,0xe8f0
+20001142:       |         09900693              li      a3,153
+20001146:       |         0d6020ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+2000114a:       \-------> 00052593              slti    a1,a0,0
+2000114e:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:153
+20001150:                 00a03533              snez    a0,a0
+20001154:                 8d6d                  and     a0,a0,a1
+20001156:             /-- c511                  beqz    a0,20001162 <ottf_console_configure_uart+0xd4>
+20001158:             |   6531                  lui     a0,0xc
+2000115a:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000115e:             |   4bc010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
+20001162:             \-> 00004517              auipc   a0,0x4
+20001166:                 93650613              addi    a2,a0,-1738 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+2000116a:                 0e8f05b7              lui     a1,0xe8f0
+2000116e:                 4501                  li      a0,0
+20001170:                 4681                  li      a3,0
+20001172:                 0aa020ef              jal     ra,2000321c <status_create>
+20001176:                 00005597              auipc   a1,0x5
+2000117a:                 13a58413              addi    s0,a1,314 # 200062b0 <kClockFreqPeripheralHz>
+2000117e:                 404c                  lw      a1,4(s0)
+20001180:                 0015b593              seqz    a1,a1
+20001184:                 00b10023              sb      a1,0(sp)
+20001188:                 00014583              lbu     a1,0(sp)
+2000118c:       /-------- e1a1                  bnez    a1,200011cc <ottf_console_configure_uart+0x13e>
+2000118e:       |         22092503              lw      a0,544(s2)
+20001192:       |  /----- cd01                  beqz    a0,200011aa <ottf_console_configure_uart+0x11c>
+20001194:       |  |      e000f517              auipc   a0,0xe000f
+20001198:       |  |      e6c50513              addi    a0,a0,-404 # 10000 <_chip_info_end>
+2000119c:       |  |      1e400593              li      a1,484
+200011a0:       |  |      952e                  add     a0,a0,a1
+200011a2:       |  |      4581                  li      a1,0
+200011a4:       |  |      65c010ef              jal     ra,20002800 <base_log_internal_dv>
+200011a8:       |  |  /-- a039                  j       200011b6 <ottf_console_configure_uart+0x128>
+200011aa:       |  \--|-> 00004517              auipc   a0,0x4
+200011ae:       |     |   4ce50513              addi    a0,a0,1230 # 20005678 <ottf_console_configure_uart.log_fields.12>
+200011b2:       |     |   5b2010ef              jal     ra,20002764 <base_log_internal_core>
+200011b6:       |     \-> 00004517              auipc   a0,0x4
+200011ba:       |         8e250613              addi    a2,a0,-1822 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200011be:       |         4535                  li      a0,13
+200011c0:       |         0e8f05b7              lui     a1,0xe8f0
+200011c4:       |         09b00693              li      a3,155
+200011c8:       |         054020ef              jal     ra,2000321c <status_create>
+200011cc:       \-------> 4084                  lw      s1,0(s1)
+200011ce:                 4000                  lw      s0,0(s0)
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200011d0:                 00052593              slti    a1,a0,0
+200011d4:                 897d                  andi    a0,a0,31
+ottf_console_configure_uart():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:154
+200011d6:                 00a03533              snez    a0,a0
+200011da:                 8d6d                  and     a0,a0,a1
+200011dc:             /-- c511                  beqz    a0,200011e8 <ottf_console_configure_uart+0x15a>
+200011de:             |   6531                  lui     a0,0xc
+200011e0:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200011e4:             |   436010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:156
+        "kClockFreqPeripheralHz must fit in uint32_t");
+  CHECK_DIF_OK(dif_uart_configure(
+200011e8:             \-> c026                  sw      s1,0(sp)
+200011ea:                 c222                  sw      s0,4(sp)
+200011ec:                 c402                  sw      zero,8(sp)
+200011ee:                 4505                  li      a0,1
+200011f0:                 c62a                  sw      a0,12(sp)
+200011f2:                 c82a                  sw      a0,16(sp)
+200011f4:                 ca2a                  sw      a0,20(sp)
+200011f6:                 cc02                  sw      zero,24(sp)
+200011f8:                 f0001517              auipc   a0,0xf0001
+200011fc:                 e8050513              addi    a0,a0,-384 # 10002078 <ottf_console_uart>
+20001200:                 858a                  mv      a1,sp
+20001202:                 572020ef              jal     ra,20003774 <dif_uart_configure>
+20001206:       /-------- cd05                  beqz    a0,2000123e <ottf_console_configure_uart+0x1b0>
+20001208:       |         862a                  mv      a2,a0
+2000120a:       |         22092503              lw      a0,544(s2)
+2000120e:       |  /----- cd01                  beqz    a0,20001226 <ottf_console_configure_uart+0x198>
+20001210:       |  |      e000f517              auipc   a0,0xe000f
+20001214:       |  |      df050513              addi    a0,a0,-528 # 10000 <_chip_info_end>
+20001218:       |  |      1f800593              li      a1,504
+2000121c:       |  |      952e                  add     a0,a0,a1
+2000121e:       |  |      4585                  li      a1,1
+20001220:       |  |      5e0010ef              jal     ra,20002800 <base_log_internal_dv>
+20001224:       |  |  /-- a801                  j       20001234 <ottf_console_configure_uart+0x1a6>
+20001226:       |  \--|-> 00004517              auipc   a0,0x4
+2000122a:       |     |   46650513              addi    a0,a0,1126 # 2000568c <ottf_console_configure_uart.log_fields.16>
+2000122e:       |     |   85b2                  mv      a1,a2
+20001230:       |     |   534010ef              jal     ra,20002764 <base_log_internal_core>
+20001234:       |     \-> 6531                  lui     a0,0xc
+20001236:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000123a:       |         3e0010ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:165
+                              .parity_enable = kDifToggleDisabled,
+                              .parity = kDifUartParityEven,
+                              .tx_enable = kDifToggleEnabled,
+                              .rx_enable = kDifToggleEnabled,
+                          }));
+  base_uart_stdout(&ottf_console_uart);
+2000123e:       \-------> f0001517              auipc   a0,0xf0001
+20001242:                 e3a50513              addi    a0,a0,-454 # 10002078 <ottf_console_uart>
+20001246:                 7f8010ef              jal     ra,20002a3e <base_uart_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:168
+
+  // Initialize/Configure console flow control (if requested).
+  if (kOttfTestConfig.enable_uart_flow_control) {
+2000124a:                 00003517              auipc   a0,0x3
+2000124e:                 3c654503              lbu     a0,966(a0) # 20004610 <kOttfTestConfig+0x10>
+20001252:             /-- c111                  beqz    a0,20001256 <ottf_console_configure_uart+0x1c8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:169
+    ottf_console_flow_control_enable();
+20001254:             |   29dd                  jal     2000174a <ottf_console_flow_control_enable>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:171
+  }
+}
+20001256:             \-> 50b2                  lw      ra,44(sp)
+20001258:                 5422                  lw      s0,40(sp)
+2000125a:                 5492                  lw      s1,36(sp)
+2000125c:                 5902                  lw      s2,32(sp)
+2000125e:                 6145                  addi    sp,sp,48
+20001260:                 8082                  ret
+
+20001262 <uart_getc>:
+uart_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:72
+static status_t uart_getc(void *io) {
+20001262:                 1101                  addi    sp,sp,-32
+20001264:                 ce06                  sw      ra,28(sp)
+20001266:                 cc22                  sw      s0,24(sp)
+20001268:                 ca26                  sw      s1,20(sp)
+2000126a:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+2000126c:                 01310593              addi    a1,sp,19
+20001270:                 66e020ef              jal     ra,200038de <dif_uart_byte_receive_polled>
+20001274:                 c62a                  sw      a0,12(sp)
+20001276:                 0028                  addi    a0,sp,8
+20001278:                 006c                  addi    a1,sp,12
+2000127a:                 4611                  li      a2,4
+2000127c:                 615020ef              jal     ra,20004090 <memcpy>
+20001280:                 4522                  lw      a0,8(sp)
+20001282:                 00153593              seqz    a1,a0
+20001286:                 15fd                  addi    a1,a1,-1
+20001288:                 04b5f693              andi    a3,a1,75
+2000128c:                 00004597              auipc   a1,0x4
+20001290:                 80c58613              addi    a2,a1,-2036 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001294:                 0e8f05b7              lui     a1,0xe8f0
+20001298:                 785010ef              jal     ra,2000321c <status_create>
+2000129c:             /-- 02054563              bltz    a0,200012c6 <uart_getc+0x64>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012a0:             |   4585                  li      a1,1
+200012a2:             |   8526                  mv      a0,s1
+200012a4:             |   6da000ef              jal     ra,2000197e <ottf_console_flow_control>
+200012a8:          /--|-- 02054a63              bltz    a0,200012dc <uart_getc+0x7a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:77
+  return OK_STATUS(byte);
+200012ac:          |  |   01314683              lbu     a3,19(sp)
+200012b0:          |  |   00003517              auipc   a0,0x3
+200012b4:          |  |   7e850613              addi    a2,a0,2024 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012b8:          |  |   0e8f05b7              lui     a1,0xe8f0
+200012bc:          |  |   4501                  li      a0,0
+200012be:          |  |   75f010ef              jal     ra,2000321c <status_create>
+200012c2:          |  |   842a                  mv      s0,a0
+200012c4:       /--|--|-- a815                  j       200012f8 <uart_getc+0x96>
+200012c6:       |  |  \-> 842a                  mv      s0,a0
+200012c8:       |  |      897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:75
+  TRY(dif_uart_byte_receive_polled(uart, &byte));
+200012ca:       |  |      00003597              auipc   a1,0x3
+200012ce:       |  |      7ce58613              addi    a2,a1,1998 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012d2:       |  |      0e8f05b7              lui     a1,0xe8f0
+200012d6:       |  |      04b00693              li      a3,75
+200012da:       |  |  /-- a819                  j       200012f0 <uart_getc+0x8e>
+200012dc:       |  \--|-> 842a                  mv      s0,a0
+200012de:       |     |   897d                  andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:76
+  TRY(ottf_console_flow_control(uart, kOttfConsoleFlowControlAuto));
+200012e0:       |     |   00003597              auipc   a1,0x3
+200012e4:       |     |   7b858613              addi    a2,a1,1976 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+200012e8:       |     |   0e8f05b7              lui     a1,0xe8f0
+200012ec:       |     |   04c00693              li      a3,76
+200012f0:       |     \-> 72d010ef              jal     ra,2000321c <status_create>
+200012f4:       |         80fff0ef              jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:78
+}
+200012f8:       \-------> 8522                  mv      a0,s0
+200012fa:                 40f2                  lw      ra,28(sp)
+200012fc:                 4462                  lw      s0,24(sp)
+200012fe:                 44d2                  lw      s1,20(sp)
+20001300:                 6105                  addi    sp,sp,32
+20001302:                 8082                  ret
+
+20001304 <ottf_console_configure_spi_device>:
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:173
+
+void ottf_console_configure_spi_device(uintptr_t base_addr) {
+20001304:                    714d                       addi    sp,sp,-336
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:174
+  CHECK_DIF_OK(dif_spi_device_init_handle(mmio_region_from_addr(base_addr),
+20001306:                    14112623           sw      ra,332(sp)
+2000130a:                    14812423           sw      s0,328(sp)
+2000130e:                    14912223           sw      s1,324(sp)
+20001312:                    15212023           sw      s2,320(sp)
+20001316:                    13312e23           sw      s3,316(sp)
+2000131a:                    13412c23           sw      s4,312(sp)
+2000131e:                    13512a23           sw      s5,308(sp)
+20001322:                    13612823           sw      s6,304(sp)
+20001326:                    13712623           sw      s7,300(sp)
+2000132a:                    13812423           sw      s8,296(sp)
+2000132e:                    f0001597           auipc   a1,0xf0001
+20001332:                    e0258593           addi    a1,a1,-510 # 10002130 <ottf_console_spi_device>
+20001336:                    072020ef           jal     ra,200033a8 <dif_spi_device_init_handle>
+2000133a:                    862a                       mv      a2,a0
+2000133c:                    00005417           auipc   s0,0x5
+20001340:                    e000f517           auipc   a0,0xe000f
+20001344:                    cc050a93           addi    s5,a0,-832 # 10000 <_chip_info_end>
+20001348:          /-------- c61d                       beqz    a2,20001376 <ottf_console_configure_spi_device+0x72>
+2000134a:          |         f8842503           lw      a0,-120(s0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000134e:          |     /-- c901                       beqz    a0,2000135e <ottf_console_configure_spi_device+0x5a>
+20001350:          |     |   20c00513           li      a0,524
+20001354:          |     |   9556                       add     a0,a0,s5
+20001356:          |     |   4585                       li      a1,1
+20001358:          |     |   4a8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000135c:          |  /--|-- a801                       j       2000136c <ottf_console_configure_spi_device+0x68>
+2000135e:          |  |  \-> 00004517           auipc   a0,0x4
+20001362:          |  |      34250513           addi    a0,a0,834 # 200056a0 <ottf_console_configure_spi_device.log_fields>
+20001366:          |  |      85b2                       mv      a1,a2
+20001368:          |  |      3fc010ef           jal     ra,20002764 <base_log_internal_core>
+2000136c:          |  \----> 6531                       lui     a0,0xc
+2000136e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001372:          |         2a8010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:176
+                                          &ottf_console_spi_device));
+  CHECK_DIF_OK(dif_spi_device_configure(
+20001376:          \-------> c802                       sw      zero,16(sp)
+20001378:                    ca02                       sw      zero,20(sp)
+2000137a:                    4505                       li      a0,1
+2000137c:                    cc2a                       sw      a0,24(sp)
+2000137e:                    f0001517           auipc   a0,0xf0001
+20001382:                    db250513           addi    a0,a0,-590 # 10002130 <ottf_console_spi_device>
+20001386:                    080c                       addi    a1,sp,16
+20001388:                    028020ef           jal     ra,200033b0 <dif_spi_device_configure>
+2000138c:                    f8842b03           lw      s6,-120(s0)
+20001390:          /-------- c51d                       beqz    a0,200013be <ottf_console_configure_spi_device+0xba>
+20001392:          |         862a                       mv      a2,a0
+20001394:          |  /----- 000b0963           beqz    s6,200013a6 <ottf_console_configure_spi_device+0xa2>
+20001398:          |  |      22000513           li      a0,544
+2000139c:          |  |      9556                       add     a0,a0,s5
+2000139e:          |  |      4585                       li      a1,1
+200013a0:          |  |      460010ef           jal     ra,20002800 <base_log_internal_dv>
+200013a4:          |  |  /-- a801                       j       200013b4 <ottf_console_configure_spi_device+0xb0>
+200013a6:          |  \--|-> 00004517           auipc   a0,0x4
+200013aa:          |     |   30e50513           addi    a0,a0,782 # 200056b4 <ottf_console_configure_spi_device.log_fields.20>
+200013ae:          |     |   85b2                       mv      a1,a2
+200013b0:          |     |   3b4010ef           jal     ra,20002764 <base_log_internal_core>
+200013b4:          |     \-> 6531                       lui     a0,0xc
+200013b6:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013ba:          |         260010ef           jal     ra,2000261a <test_status_set>
+200013be:          \-------> 4481                       li      s1,0
+200013c0:                    00004517           auipc   a0,0x4
+200013c4:                    30850413           addi    s0,a0,776 # 200056c8 <ottf_console_configure_spi_device.log_fields.20+0x14>
+200013c8:                    f0001517           auipc   a0,0xf0001
+200013cc:                    d6850b93           addi    s7,a0,-664 # 10002130 <ottf_console_spi_device>
+200013d0:                    4c19                       li      s8,6
+200013d2:                    00004517           auipc   a0,0x4
+200013d6:                    39e50913           addi    s2,a0,926 # 20005770 <ottf_console_configure_spi_device.log_fields.23>
+200013da:                    6531                       lui     a0,0xc
+200013dc:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200013e0:                    23400a13           li      s4,564
+200013e4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:235
+          .payload_dir_to_host = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceReadCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+200013e6:       /----------> 0808                       addi    a0,sp,16
+200013e8:       |            4671                       li      a2,28
+200013ea:       |            85a2                       mv      a1,s0
+200013ec:       |            4a5020ef           jal     ra,20004090 <memcpy>
+200013f0:       |            0ff4f593           andi    a1,s1,255
+200013f4:       |            4605                       li      a2,1
+200013f6:       |            0814                       addi    a3,sp,16
+200013f8:       |            855e                       mv      a0,s7
+200013fa:       |            034020ef           jal     ra,2000342e <dif_spi_device_set_flash_command_slot>
+200013fe:       |  /-------- c105                       beqz    a0,2000141e <ottf_console_configure_spi_device+0x11a>
+20001400:       |  |         862a                       mv      a2,a0
+20001402:       |  |  /----- 000b0763           beqz    s6,20001410 <ottf_console_configure_spi_device+0x10c>
+20001406:       |  |  |      4585                       li      a1,1
+20001408:       |  |  |      8552                       mv      a0,s4
+2000140a:       |  |  |      3f6010ef           jal     ra,20002800 <base_log_internal_dv>
+2000140e:       |  |  |  /-- a029                       j       20001418 <ottf_console_configure_spi_device+0x114>
+20001410:       |  |  \--|-> 854a                       mv      a0,s2
+20001412:       |  |     |   85b2                       mv      a1,a2
+20001414:       |  |     |   350010ef           jal     ra,20002764 <base_log_internal_core>
+20001418:       |  |     \-> 854e                       mv      a0,s3
+2000141a:       |  |         200010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:233
+  for (size_t i = 0; i < ARRAYSIZE(read_commands); ++i) {
+2000141e:       |  \-------> 0485                       addi    s1,s1,1
+20001420:       |            0471                       addi    s0,s0,28
+20001422:       \----------- fd8492e3           bne     s1,s8,200013e6 <ottf_console_configure_spi_device+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:251
+          .set_busy_status = true,
+      },
+  };
+  for (size_t i = 0; i < ARRAYSIZE(write_commands); ++i) {
+    uint8_t slot = (uint8_t)i + kSpiDeviceWriteCommandSlotBase;
+    CHECK_DIF_OK(dif_spi_device_set_flash_command_slot(
+20001426:                    00004517           auipc   a0,0x4
+2000142a:                    35e50593           addi    a1,a0,862 # 20005784 <ottf_console_configure_spi_device.log_fields.23+0x14>
+2000142e:                    0808                       addi    a0,sp,16
+20001430:                    4671                       li      a2,28
+20001432:                    45f020ef           jal     ra,20004090 <memcpy>
+20001436:                    f0001517           auipc   a0,0xf0001
+2000143a:                    cfa50513           addi    a0,a0,-774 # 10002130 <ottf_console_spi_device>
+2000143e:                    45ad                       li      a1,11
+20001440:                    4605                       li      a2,1
+20001442:                    0814                       addi    a3,sp,16
+20001444:                    7eb010ef           jal     ra,2000342e <dif_spi_device_set_flash_command_slot>
+20001448:          /-------- c51d                       beqz    a0,20001476 <ottf_console_configure_spi_device+0x172>
+2000144a:          |         862a                       mv      a2,a0
+2000144c:          |  /----- 000b0963           beqz    s6,2000145e <ottf_console_configure_spi_device+0x15a>
+20001450:          |  |      24800513           li      a0,584
+20001454:          |  |      9556                       add     a0,a0,s5
+20001456:          |  |      4585                       li      a1,1
+20001458:          |  |      3a8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000145c:          |  |  /-- a801                       j       2000146c <ottf_console_configure_spi_device+0x168>
+2000145e:          |  \--|-> 00004517           auipc   a0,0x4
+20001462:          |     |   34250513           addi    a0,a0,834 # 200057a0 <ottf_console_configure_spi_device.log_fields.26>
+20001466:          |     |   85b2                       mv      a1,a2
+20001468:          |     |   2fc010ef           jal     ra,20002764 <base_log_internal_core>
+2000146c:          |     \-> 6531                       lui     a0,0xc
+2000146e:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001472:          |         1a8010ef           jal     ra,2000261a <test_status_set>
+20001476:          \-------> 4401                       li      s0,0
+20001478:                    cafeb537           lui     a0,0xcafeb
+2000147c:                    0509                       addi    a0,a0,2
+spi_device_wait_for_sync():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:102
+  const uint8_t kBootMagicPattern[4] = {0x02, 0xb0, 0xfe, 0xca};
+2000147e:                    12a12223           sw      a0,292(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:103
+  const uint8_t kEmptyPattern[4] = {0};
+20001482:                    12012023           sw      zero,288(sp)
+20001486:                    f0001517           auipc   a0,0xf0001
+2000148a:                    caa50493           addi    s1,a0,-854 # 10002130 <ottf_console_spi_device>
+2000148e:                    28b01b93           bseti   s7,zero,0xb
+20001492:                    00004517           auipc   a0,0x4
+20001496:                    41250913           addi    s2,a0,1042 # 200058a4 <spi_device_wait_for_sync.log_fields>
+2000149a:                    6531                       lui     a0,0xc
+2000149c:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200014a0:                    39c00a13           li      s4,924
+200014a4:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:106
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+200014a6:       /----------> 4691                       li      a3,4
+200014a8:       |            1258                       addi    a4,sp,292
+200014aa:       |            8526                       mv      a0,s1
+200014ac:       |            4581                       li      a1,0
+200014ae:       |            8622                       mv      a2,s0
+200014b0:       |            17c020ef           jal     ra,2000362c <dif_spi_device_write_flash_buffer>
+200014b4:       |  /-------- c105                       beqz    a0,200014d4 <ottf_console_configure_spi_device+0x1d0>
+200014b6:       |  |         862a                       mv      a2,a0
+200014b8:       |  |  /----- 000b0763           beqz    s6,200014c6 <ottf_console_configure_spi_device+0x1c2>
+200014bc:       |  |  |      4585                       li      a1,1
+200014be:       |  |  |      8552                       mv      a0,s4
+200014c0:       |  |  |      340010ef           jal     ra,20002800 <base_log_internal_dv>
+200014c4:       |  |  |  /-- a029                       j       200014ce <ottf_console_configure_spi_device+0x1ca>
+200014c6:       |  |  \--|-> 854a                       mv      a0,s2
+200014c8:       |  |     |   85b2                       mv      a1,a2
+200014ca:       |  |     |   29a010ef           jal     ra,20002764 <base_log_internal_core>
+200014ce:       |  |     \-> 854e                       mv      a0,s3
+200014d0:       |  |         14a010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:105
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200014d4:       |  \-------> 0411                       addi    s0,s0,4
+200014d6:       \----------- fd7418e3           bne     s0,s7,200014a6 <ottf_console_configure_spi_device+0x1a2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:112
+  upload_info_t info = {0};
+200014da:                    0808                       addi    a0,sp,16
+200014dc:                    11000613           li      a2,272
+200014e0:                    4581                       li      a1,0
+200014e2:                    431020ef           jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:113
+  CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+200014e6:                    f0001517           auipc   a0,0xf0001
+200014ea:                    c4a50513           addi    a0,a0,-950 # 10002130 <ottf_console_spi_device>
+200014ee:                    080c                       addi    a1,sp,16
+200014f0:                    023000ef           jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+200014f4:       /----------- 06055063           bgez    a0,20001554 <ottf_console_configure_spi_device+0x250>
+200014f8:       |  /-------- 020b0b63           beqz    s6,2000152e <ottf_console_configure_spi_device+0x22a>
+200014fc:       |  |         00010523           sb      zero,10(sp)
+20001500:       |  |         00011423           sh      zero,8(sp)
+20001504:       |  |         006c                       addi    a1,sp,12
+20001506:       |  |         0050                       addi    a2,sp,4
+20001508:       |  |         0034                       addi    a3,sp,8
+2000150a:       |  |         5dd010ef           jal     ra,200032e6 <status_extract>
+2000150e:       |  |  /----- c905                       beqz    a0,2000153e <ottf_console_configure_spi_device+0x23a>
+20001510:       |  |  |      00814603           lbu     a2,8(sp)
+20001514:       |  |  |      00914683           lbu     a3,9(sp)
+20001518:       |  |  |      00a14703           lbu     a4,10(sp)
+2000151c:       |  |  |      4792                       lw      a5,4(sp)
+2000151e:       |  |  |      4832                       lw      a6,12(sp)
+20001520:       |  |  |      3b000513           li      a0,944
+20001524:       |  |  |      9556                       add     a0,a0,s5
+20001526:       |  |  |      4595                       li      a1,5
+20001528:       |  |  |      2d8010ef           jal     ra,20002800 <base_log_internal_dv>
+2000152c:       |  |  |  /-- a839                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000152e:       |  \--|--|-> 85aa                       mv      a1,a0
+20001530:       |     |  |   00004517           auipc   a0,0x4
+20001534:       |     |  |   38850513           addi    a0,a0,904 # 200058b8 <spi_device_wait_for_sync.log_fields.74>
+20001538:       |     |  |   22c010ef           jal     ra,20002764 <base_log_internal_core>
+2000153c:       |     |  +-- a039                       j       2000154a <ottf_console_configure_spi_device+0x246>
+2000153e:       |     \--|-> 3c400513           li      a0,964
+20001542:       |        |   9556                       add     a0,a0,s5
+20001544:       |        |   4585                       li      a1,1
+20001546:       |        |   2ba010ef           jal     ra,20002800 <base_log_internal_dv>
+2000154a:       |        \-> 6531                       lui     a0,0xc
+2000154c:       |            aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001550:       |            0ca010ef           jal     ra,2000261a <test_status_set>
+20001554:       \----------> 4401                       li      s0,0
+20001556:                    f0001517           auipc   a0,0xf0001
+2000155a:                    bda50493           addi    s1,a0,-1062 # 10002130 <ottf_console_spi_device>
+2000155e:                    00004517           auipc   a0,0x4
+20001562:                    36e50913           addi    s2,a0,878 # 200058cc <spi_device_wait_for_sync.log_fields.77>
+20001566:                    6531                       lui     a0,0xc
+20001568:                    aad50993           addi    s3,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000156c:                    3d800a13           li      s4,984
+20001570:                    9a56                       add     s4,s4,s5
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:116
+    CHECK_DIF_OK(dif_spi_device_write_flash_buffer(
+20001572:       /----------> 4691                       li      a3,4
+20001574:       |            1218                       addi    a4,sp,288
+20001576:       |            8526                       mv      a0,s1
+20001578:       |            4581                       li      a1,0
+2000157a:       |            8622                       mv      a2,s0
+2000157c:       |            0b0020ef           jal     ra,2000362c <dif_spi_device_write_flash_buffer>
+20001580:       |  /-------- c105                       beqz    a0,200015a0 <ottf_console_configure_spi_device+0x29c>
+20001582:       |  |         862a                       mv      a2,a0
+20001584:       |  |  /----- 000b0763           beqz    s6,20001592 <ottf_console_configure_spi_device+0x28e>
+20001588:       |  |  |      4585                       li      a1,1
+2000158a:       |  |  |      8552                       mv      a0,s4
+2000158c:       |  |  |      274010ef           jal     ra,20002800 <base_log_internal_dv>
+20001590:       |  |  |  /-- a029                       j       2000159a <ottf_console_configure_spi_device+0x296>
+20001592:       |  |  \--|-> 854a                       mv      a0,s2
+20001594:       |  |     |   85b2                       mv      a1,a2
+20001596:       |  |     |   1ce010ef           jal     ra,20002764 <base_log_internal_core>
+2000159a:       |  |     \-> 854e                       mv      a0,s3
+2000159c:       |  |         07e010ef           jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:115
+  for (size_t i = 0; i < SPI_DEVICE_PARAM_SRAM_READ_BUFFER_DEPTH; i++) {
+200015a0:       |  \-------> 0411                       addi    s0,s0,4
+200015a2:       \----------- fd7418e3           bne     s0,s7,20001572 <ottf_console_configure_spi_device+0x26e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:120
+  CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200015a6:                    f0001517           auipc   a0,0xf0001
+200015aa:                    b8a50513           addi    a0,a0,-1142 # 10002130 <ottf_console_spi_device>
+200015ae:                    4581                       li      a1,0
+200015b0:                    0ec020ef           jal     ra,2000369c <dif_spi_device_set_flash_status_registers>
+200015b4:          /-------- c51d                       beqz    a0,200015e2 <ottf_console_configure_spi_device+0x2de>
+200015b6:          |         862a                       mv      a2,a0
+200015b8:          |  /----- 000b0963           beqz    s6,200015ca <ottf_console_configure_spi_device+0x2c6>
+200015bc:          |  |      3ec00513           li      a0,1004
+200015c0:          |  |      9556                       add     a0,a0,s5
+200015c2:          |  |      4585                       li      a1,1
+200015c4:          |  |      23c010ef           jal     ra,20002800 <base_log_internal_dv>
+200015c8:          |  |  /-- a801                       j       200015d8 <ottf_console_configure_spi_device+0x2d4>
+200015ca:          |  \--|-> 00004517           auipc   a0,0x4
+200015ce:          |     |   31650513           addi    a0,a0,790 # 200058e0 <spi_device_wait_for_sync.log_fields.79>
+200015d2:          |     |   85b2                       mv      a1,a2
+200015d4:          |     |   190010ef           jal     ra,20002764 <base_log_internal_core>
+200015d8:          |     \-> 6531                       lui     a0,0xc
+200015da:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200015de:          |         03c010ef           jal     ra,2000261a <test_status_set>
+ottf_console_configure_spi_device():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:255
+        &ottf_console_spi_device, slot, kDifToggleEnabled, write_commands[i]));
+  }
+  spi_device_wait_for_sync(&ottf_console_spi_device);
+  base_spi_device_stdout(&ottf_console_spi_device);
+200015e2:          \-------> f0001517           auipc   a0,0xf0001
+200015e6:                    b4e50513           addi    a0,a0,-1202 # 10002130 <ottf_console_spi_device>
+200015ea:                    436010ef           jal     ra,20002a20 <base_spi_device_stdout>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:256
+}
+200015ee:                    14c12083           lw      ra,332(sp)
+200015f2:                    14812403           lw      s0,328(sp)
+200015f6:                    14412483           lw      s1,324(sp)
+200015fa:                    14012903           lw      s2,320(sp)
+200015fe:                    13c12983           lw      s3,316(sp)
+20001602:                    13812a03           lw      s4,312(sp)
+20001606:                    13412a83           lw      s5,308(sp)
+2000160a:                    13012b03           lw      s6,304(sp)
+2000160e:                    12c12b83           lw      s7,300(sp)
+20001612:                    12812c03           lw      s8,296(sp)
+20001616:                    6171                       addi    sp,sp,336
+20001618:                    8082                       ret
+
+2000161a <spi_device_getc>:
+spi_device_getc():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:87
+static status_t spi_device_getc(void *io) {
+2000161a:                       1101                    addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:91
+  if (index == info.data_len) {
+2000161c:                       ce06                    sw      ra,28(sp)
+2000161e:                       cc22                    sw      s0,24(sp)
+20001620:                       ca26                    sw      s1,20(sp)
+20001622:                       c84a                    sw      s2,16(sp)
+20001624:                       c64e                    sw      s3,12(sp)
+20001626:                       f0001417                auipc   s0,0xf0001
+2000162a:                       a6642583                lw      a1,-1434(s0) # 1000208c <spi_device_getc.index>
+2000162e:                       f0001617                auipc   a2,0xf0001
+20001632:                       b1260993                addi    s3,a2,-1262 # 10002140 <spi_device_getc.info>
+20001636:                       0049d603                lhu     a2,4(s3)
+2000163a:       /-------------- 0ec59063                bne     a1,a2,2000171a <spi_device_getc+0x100>
+2000163e:       |               892a                    mv      s2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:92
+    memset(&info, 0, sizeof(upload_info_t));
+20001640:       |               f0001517                auipc   a0,0xf0001
+20001644:       |               b0050493                addi    s1,a0,-1280 # 10002140 <spi_device_getc.info>
+20001648:       |               11000613                li      a2,272
+2000164c:       |               8526                    mv      a0,s1
+2000164e:       |               4581                    li      a1,0
+20001650:       |               2c3020ef                jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:93
+    CHECK_STATUS_OK(spi_device_testutils_wait_for_upload(spi_device, &info));
+20001654:       |               854a                    mv      a0,s2
+20001656:       |               85a6                    mv      a1,s1
+20001658:       |               6ba000ef                jal     ra,20001d12 <spi_device_testutils_wait_for_upload>
+2000165c:       |  /----------- 06055b63                bgez    a0,200016d2 <spi_device_getc+0xb8>
+20001660:       |  |            85aa                    mv      a1,a0
+20001662:       |  |            00005517                auipc   a0,0x5
+20001666:       |  |            c6252503                lw      a0,-926(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000166a:       |  |  /-------- cd15                    beqz    a0,200016a6 <spi_device_getc+0x8c>
+2000166c:       |  |  |         00010323                sb      zero,6(sp)
+20001670:       |  |  |         00011223                sh      zero,4(sp)
+20001674:       |  |  |         002c                    addi    a1,sp,8
+20001676:       |  |  |         860a                    mv      a2,sp
+20001678:       |  |  |         0054                    addi    a3,sp,4
+2000167a:       |  |  |         46d010ef                jal     ra,200032e6 <status_extract>
+2000167e:       |  |  |  /----- c91d                    beqz    a0,200016b4 <spi_device_getc+0x9a>
+20001680:       |  |  |  |      00414603                lbu     a2,4(sp)
+20001684:       |  |  |  |      00514683                lbu     a3,5(sp)
+20001688:       |  |  |  |      00614703                lbu     a4,6(sp)
+2000168c:       |  |  |  |      4782                    lw      a5,0(sp)
+2000168e:       |  |  |  |      4822                    lw      a6,8(sp)
+20001690:       |  |  |  |      e000f517                auipc   a0,0xe000f
+20001694:       |  |  |  |      97050513                addi    a0,a0,-1680 # 10000 <_chip_info_end>
+20001698:       |  |  |  |      36000593                li      a1,864
+2000169c:       |  |  |  |      952e                    add     a0,a0,a1
+2000169e:       |  |  |  |      4595                    li      a1,5
+200016a0:       |  |  |  |      160010ef                jal     ra,20002800 <base_log_internal_dv>
+200016a4:       |  |  |  |  /-- a015                    j       200016c8 <spi_device_getc+0xae>
+200016a6:       |  |  \--|--|-> 00004517                auipc   a0,0x4
+200016aa:       |  |     |  |   1d650513                addi    a0,a0,470 # 2000587c <spi_device_getc.log_fields.64>
+200016ae:       |  |     |  |   0b6010ef                jal     ra,20002764 <base_log_internal_core>
+200016b2:       |  |     |  +-- a819                    j       200016c8 <spi_device_getc+0xae>
+200016b4:       |  |     \--|-> e000f517                auipc   a0,0xe000f
+200016b8:       |  |        |   94c50513                addi    a0,a0,-1716 # 10000 <_chip_info_end>
+200016bc:       |  |        |   37400593                li      a1,884
+200016c0:       |  |        |   952e                    add     a0,a0,a1
+200016c2:       |  |        |   4585                    li      a1,1
+200016c4:       |  |        |   13c010ef                jal     ra,20002800 <base_log_internal_dv>
+200016c8:       |  |        \-> 6531                    lui     a0,0xc
+200016ca:       |  |            aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200016ce:       |  |            74d000ef                jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:94
+    index = 0;
+200016d2:       |  \----------> a6042323                sw      zero,-1434(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:95
+    CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(spi_device, 0x00));
+200016d6:       |               854a                    mv      a0,s2
+200016d8:       |               4581                    li      a1,0
+200016da:       |               7c3010ef                jal     ra,2000369c <dif_spi_device_set_flash_status_registers>
+200016de:       +-------------- cd15                    beqz    a0,2000171a <spi_device_getc+0x100>
+200016e0:       |               862a                    mv      a2,a0
+200016e2:       |               00005517                auipc   a0,0x5
+200016e6:       |               be252503                lw      a0,-1054(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+200016ea:       |        /----- cd01                    beqz    a0,20001702 <spi_device_getc+0xe8>
+200016ec:       |        |      e000f517                auipc   a0,0xe000f
+200016f0:       |        |      91450513                addi    a0,a0,-1772 # 10000 <_chip_info_end>
+200016f4:       |        |      38800593                li      a1,904
+200016f8:       |        |      952e                    add     a0,a0,a1
+200016fa:       |        |      4585                    li      a1,1
+200016fc:       |        |      104010ef                jal     ra,20002800 <base_log_internal_dv>
+20001700:       |        |  /-- a801                    j       20001710 <spi_device_getc+0xf6>
+20001702:       |        \--|-> 00004517                auipc   a0,0x4
+20001706:       |           |   18e50513                addi    a0,a0,398 # 20005890 <spi_device_getc.log_fields.67>
+2000170a:       |           |   85b2                    mv      a1,a2
+2000170c:       |           |   058010ef                jal     ra,20002764 <base_log_internal_core>
+20001710:       |           \-> 6531                    lui     a0,0xc
+20001712:       |               aad50513                addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001716:       |               705000ef                jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:98
+  return OK_STATUS(info.data[index++]);
+2000171a:       \-------------> a6642503                lw      a0,-1434(s0)
+2000171e:                       99aa                    add     s3,s3,a0
+20001720:                       0109c683                lbu     a3,16(s3)
+20001724:                       0505                    addi    a0,a0,1
+20001726:                       a6a42323                sw      a0,-1434(s0)
+2000172a:                       00003517                auipc   a0,0x3
+2000172e:                       36e50613                addi    a2,a0,878 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001732:                       0e8f05b7                lui     a1,0xe8f0
+20001736:                       4501                    li      a0,0
+20001738:                       2e5010ef                jal     ra,2000321c <status_create>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:99
+}
+2000173c:                       40f2                    lw      ra,28(sp)
+2000173e:                       4462                    lw      s0,24(sp)
+20001740:                       44d2                    lw      s1,20(sp)
+20001742:                       4942                    lw      s2,16(sp)
+20001744:                       49b2                    lw      s3,12(sp)
+20001746:                       6105                    addi    sp,sp,32
+20001748:                       8082                    ret
+
+2000174a <ottf_console_flow_control_enable>:
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:274
+    default:
+      return kTopEarlgreyPlicIrqIdUart0RxWatermark;
+  }
+}
+
+void ottf_console_flow_control_enable(void) {
+2000174a:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:275
+  CHECK_DIF_OK(dif_rv_plic_init(
+2000174c:                 ce06                  sw      ra,28(sp)
+2000174e:                 cc22                  sw      s0,24(sp)
+20001750:                 ca26                  sw      s1,20(sp)
+20001752:                 c84a                  sw      s2,16(sp)
+20001754:                 c64e                  sw      s3,12(sp)
+20001756:                 f0001517              auipc   a0,0xf0001
+2000175a:                 93e50593              addi    a1,a0,-1730 # 10002094 <ottf_plic>
+2000175e:                 48000537              lui     a0,0x48000
+20001762:                 4ef000ef              jal     ra,20002450 <dif_rv_plic_init>
+20001766:                 00005497              auipc   s1,0x5
+2000176a:       /-------- cd05                  beqz    a0,200017a2 <ottf_console_flow_control_enable+0x58>
+2000176c:       |         862a                  mv      a2,a0
+2000176e:       |         b5e4a503              lw      a0,-1186(s1) # 200062c4 <kDeviceLogBypassUartAddress>
+20001772:       |  /----- cd01                  beqz    a0,2000178a <ottf_console_flow_control_enable+0x40>
+20001774:       |  |      e000f517              auipc   a0,0xe000f
+20001778:       |  |      88c50513              addi    a0,a0,-1908 # 10000 <_chip_info_end>
+2000177c:       |  |      25c00593              li      a1,604
+20001780:       |  |      952e                  add     a0,a0,a1
+20001782:       |  |      4585                  li      a1,1
+20001784:       |  |      07c010ef              jal     ra,20002800 <base_log_internal_dv>
+20001788:       |  |  /-- a801                  j       20001798 <ottf_console_flow_control_enable+0x4e>
+2000178a:       |  \--|-> 00004517              auipc   a0,0x4
+2000178e:       |     |   02a50513              addi    a0,a0,42 # 200057b4 <ottf_console_flow_control_enable.log_fields>
+20001792:       |     |   85b2                  mv      a1,a2
+20001794:       |     |   7d1000ef              jal     ra,20002764 <base_log_internal_core>
+20001798:       |     \-> 6531                  lui     a0,0xc
+2000179a:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+2000179e:       |         67d000ef              jal     ra,2000261a <test_status_set>
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+200017a2:       \-------> 00003517              auipc   a0,0x3
+200017a6:                 e5e50413              addi    s0,a0,-418 # 20004600 <kOttfTestConfig>
+200017aa:                 4048                  lw      a0,4(s0)
+200017ac:                 4585                  li      a1,1
+200017ae:          /----- 00b50763              beq     a0,a1,200017bc <ottf_console_flow_control_enable+0x72>
+200017b2:          |      f0001517              auipc   a0,0xf0001
+200017b6:          |      8c650913              addi    s2,a0,-1850 # 10002078 <ottf_console_uart>
+200017ba:          |  /-- a029                  j       200017c4 <ottf_console_flow_control_enable+0x7a>
+200017bc:          \--|-> f0001517              auipc   a0,0xf0001
+200017c0:             |   97450913              addi    s2,a0,-1676 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:279
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic));
+
+  dif_uart_t *uart = (dif_uart_t *)ottf_console_get();
+  CHECK_DIF_OK(dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark));
+200017c4:             \-> 458d                  li      a1,3
+200017c6:                 854a                  mv      a0,s2
+200017c8:                 096020ef              jal     ra,2000385e <dif_uart_watermark_rx_set>
+200017cc:       /-------- cd05                  beqz    a0,20001804 <ottf_console_flow_control_enable+0xba>
+200017ce:       |         862a                  mv      a2,a0
+200017d0:       |         b5e4a503              lw      a0,-1186(s1)
+200017d4:       |  /----- cd01                  beqz    a0,200017ec <ottf_console_flow_control_enable+0xa2>
+200017d6:       |  |      e000f517              auipc   a0,0xe000f
+200017da:       |  |      82a50513              addi    a0,a0,-2006 # 10000 <_chip_info_end>
+200017de:       |  |      27000593              li      a1,624
+200017e2:       |  |      952e                  add     a0,a0,a1
+200017e4:       |  |      4585                  li      a1,1
+200017e6:       |  |      01a010ef              jal     ra,20002800 <base_log_internal_dv>
+200017ea:       |  |  /-- a801                  j       200017fa <ottf_console_flow_control_enable+0xb0>
+200017ec:       |  \--|-> 00004517              auipc   a0,0x4
+200017f0:       |     |   fdc50513              addi    a0,a0,-36 # 200057c8 <ottf_console_flow_control_enable.log_fields.30>
+200017f4:       |     |   85b2                  mv      a1,a2
+200017f6:       |     |   76f000ef              jal     ra,20002764 <base_log_internal_core>
+200017fa:       |     \-> 6531                  lui     a0,0xc
+200017fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001800:       |         61b000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:280
+  CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001804:       \-------> 4585                  li      a1,1
+20001806:                 4605                  li      a2,1
+20001808:                 854a                  mv      a0,s2
+2000180a:                 70f010ef              jal     ra,20003718 <dif_uart_irq_set_enabled>
+2000180e:       /-------- cd05                  beqz    a0,20001846 <ottf_console_flow_control_enable+0xfc>
+20001810:       |         862a                  mv      a2,a0
+20001812:       |         b5e4a503              lw      a0,-1186(s1)
+20001816:       |  /----- cd01                  beqz    a0,2000182e <ottf_console_flow_control_enable+0xe4>
+20001818:       |  |      e000e517              auipc   a0,0xe000e
+2000181c:       |  |      7e850513              addi    a0,a0,2024 # 10000 <_chip_info_end>
+20001820:       |  |      28400593              li      a1,644
+20001824:       |  |      952e                  add     a0,a0,a1
+20001826:       |  |      4585                  li      a1,1
+20001828:       |  |      7d9000ef              jal     ra,20002800 <base_log_internal_dv>
+2000182c:       |  |  /-- a801                  j       2000183c <ottf_console_flow_control_enable+0xf2>
+2000182e:       |  \--|-> 00004517              auipc   a0,0x4
+20001832:       |     |   fae50513              addi    a0,a0,-82 # 200057dc <ottf_console_flow_control_enable.log_fields.33>
+20001836:       |     |   85b2                  mv      a1,a2
+20001838:       |     |   72d000ef              jal     ra,20002764 <base_log_internal_core>
+2000183c:       |     \-> 6531                  lui     a0,0xc
+2000183e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001842:       |         5d9000ef              jal     ra,2000261a <test_status_set>
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001846:       \-------> 4408                  lw      a0,8(s0)
+20001848:                 c00005b7              lui     a1,0xc0000
+2000184c:                 95aa                  add     a1,a1,a0
+2000184e:                 81c1                  srli    a1,a1,0x10
+20001850:                 0542                  slli    a0,a0,0x10
+20001852:                 8d4d                  or      a0,a0,a1
+20001854:                 fff50413              addi    s0,a0,-1
+20001858:                 450d                  li      a0,3
+2000185a:                 208469b3              sh3add  s3,s0,s0
+2000185e:          /----- 00a46463              bltu    s0,a0,20001866 <ottf_console_flow_control_enable+0x11c>
+20001862:          |      4589                  li      a1,2
+20001864:          |  /-- a019                  j       2000186a <ottf_console_flow_control_enable+0x120>
+20001866:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:284
+                                        kDifToggleEnabled));
+
+  // Set IRQ priorities to MAX
+  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
+2000186a:             \-> 00004517              auipc   a0,0x4
+2000186e:                 60252603              lw      a2,1538(a0) # 20005e6c <kDifRvPlicMaxPriority>
+20001872:                 f0001517              auipc   a0,0xf0001
+20001876:                 82250513              addi    a0,a0,-2014 # 10002094 <ottf_plic>
+2000187a:                 42d000ef              jal     ra,200024a6 <dif_rv_plic_irq_set_priority>
+2000187e:       /-------- cd05                  beqz    a0,200018b6 <ottf_console_flow_control_enable+0x16c>
+20001880:       |         862a                  mv      a2,a0
+20001882:       |         b5e4a503              lw      a0,-1186(s1)
+20001886:       |  /----- cd01                  beqz    a0,2000189e <ottf_console_flow_control_enable+0x154>
+20001888:       |  |      e000e517              auipc   a0,0xe000e
+2000188c:       |  |      77850513              addi    a0,a0,1912 # 10000 <_chip_info_end>
+20001890:       |  |      29800593              li      a1,664
+20001894:       |  |      952e                  add     a0,a0,a1
+20001896:       |  |      4585                  li      a1,1
+20001898:       |  |      769000ef              jal     ra,20002800 <base_log_internal_dv>
+2000189c:       |  |  /-- a801                  j       200018ac <ottf_console_flow_control_enable+0x162>
+2000189e:       |  \--|-> 00004517              auipc   a0,0x4
+200018a2:       |     |   f5250513              addi    a0,a0,-174 # 200057f0 <ottf_console_flow_control_enable.log_fields.36>
+200018a6:       |     |   85b2                  mv      a1,a2
+200018a8:       |     |   6bd000ef              jal     ra,20002764 <base_log_internal_core>
+200018ac:       |     \-> 6531                  lui     a0,0xc
+200018ae:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200018b2:       |         569000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:287
+      &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority));
+  // Set Ibex IRQ priority threshold level
+  CHECK_DIF_OK(dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget,
+200018b6:       \-------> 00004517              auipc   a0,0x4
+200018ba:                 5b252603              lw      a2,1458(a0) # 20005e68 <kDifRvPlicMinPriority>
+200018be:                 f0000517              auipc   a0,0xf0000
+200018c2:                 7d650513              addi    a0,a0,2006 # 10002094 <ottf_plic>
+200018c6:                 4581                  li      a1,0
+200018c8:                 409000ef              jal     ra,200024d0 <dif_rv_plic_target_set_threshold>
+200018cc:       /-------- cd05                  beqz    a0,20001904 <ottf_console_flow_control_enable+0x1ba>
+200018ce:       |         862a                  mv      a2,a0
+200018d0:       |         b5e4a503              lw      a0,-1186(s1)
+200018d4:       |  /----- cd01                  beqz    a0,200018ec <ottf_console_flow_control_enable+0x1a2>
+200018d6:       |  |      e000e517              auipc   a0,0xe000e
+200018da:       |  |      72a50513              addi    a0,a0,1834 # 10000 <_chip_info_end>
+200018de:       |  |      2ac00593              li      a1,684
+200018e2:       |  |      952e                  add     a0,a0,a1
+200018e4:       |  |      4585                  li      a1,1
+200018e6:       |  |      71b000ef              jal     ra,20002800 <base_log_internal_dv>
+200018ea:       |  |  /-- a801                  j       200018fa <ottf_console_flow_control_enable+0x1b0>
+200018ec:       |  \--|-> 00004517              auipc   a0,0x4
+200018f0:       |     |   f1850513              addi    a0,a0,-232 # 20005804 <ottf_console_flow_control_enable.log_fields.39>
+200018f4:       |     |   85b2                  mv      a1,a2
+200018f6:       |     |   66f000ef              jal     ra,20002764 <base_log_internal_core>
+200018fa:       |     \-> 6531                  lui     a0,0xc
+200018fc:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001900:       |         51b000ef              jal     ra,2000261a <test_status_set>
+20001904:       \-------> 450d                  li      a0,3
+get_flow_control_watermark_plic_id():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:259
+  switch (kOttfTestConfig.console.base_addr) {
+20001906:          /----- 00a46463              bltu    s0,a0,2000190e <ottf_console_flow_control_enable+0x1c4>
+2000190a:          |      4589                  li      a1,2
+2000190c:          |  /-- a019                  j       20001912 <ottf_console_flow_control_enable+0x1c8>
+2000190e:          \--|-> 00b98593              addi    a1,s3,11
+ottf_console_flow_control_enable():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:290
+                                                kDifRvPlicMinPriority));
+  // Enable IRQs in PLIC
+  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(&ottf_plic,
+20001912:             \-> f0000517              auipc   a0,0xf0000
+20001916:                 78250513              addi    a0,a0,1922 # 10002094 <ottf_plic>
+2000191a:                 4685                  li      a3,1
+2000191c:                 4405                  li      s0,1
+2000191e:                 4601                  li      a2,0
+20001920:                 33f000ef              jal     ra,2000245e <dif_rv_plic_irq_set_enabled>
+20001924:       /-------- cd05                  beqz    a0,2000195c <ottf_console_flow_control_enable+0x212>
+20001926:       |         862a                  mv      a2,a0
+20001928:       |         b5e4a503              lw      a0,-1186(s1)
+2000192c:       |  /----- cd01                  beqz    a0,20001944 <ottf_console_flow_control_enable+0x1fa>
+2000192e:       |  |      e000e517              auipc   a0,0xe000e
+20001932:       |  |      6d250513              addi    a0,a0,1746 # 10000 <_chip_info_end>
+20001936:       |  |      2c000593              li      a1,704
+2000193a:       |  |      952e                  add     a0,a0,a1
+2000193c:       |  |      4585                  li      a1,1
+2000193e:       |  |      6c3000ef              jal     ra,20002800 <base_log_internal_dv>
+20001942:       |  |  /-- a801                  j       20001952 <ottf_console_flow_control_enable+0x208>
+20001944:       |  \--|-> 00004517              auipc   a0,0x4
+20001948:       |     |   ed450513              addi    a0,a0,-300 # 20005818 <ottf_console_flow_control_enable.log_fields.42>
+2000194c:       |     |   85b2                  mv      a1,a2
+2000194e:       |     |   617000ef              jal     ra,20002764 <base_log_internal_core>
+20001952:       |     \-> 6531                  lui     a0,0xc
+20001954:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001958:       |         4c3000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:294
+                                           get_flow_control_watermark_plic_id(),
+                                           kPlicTarget, kDifToggleEnabled));
+
+  flow_control_state = kOttfConsoleFlowControlAuto;
+2000195c:       \-------> f0000517              auipc   a0,0xf0000
+20001960:                 72852423              sw      s0,1832(a0) # 10002084 <flow_control_state>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:295
+  irq_global_ctrl(true);
+20001964:                 4505                  li      a0,1
+20001966:                 2eb1                  jal     20001cc2 <irq_global_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:296
+  irq_external_ctrl(true);
+20001968:                 4505                  li      a0,1
+2000196a:                 26ad                  jal     20001cd4 <irq_external_ctrl>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:298
+  // Make sure we're in the Resume state and we emit a Resume to the UART.
+  ottf_console_flow_control((dif_uart_t *)ottf_console_get(),
+2000196c:                 45c5                  li      a1,17
+2000196e:                 854a                  mv      a0,s2
+20001970:                 40f2                  lw      ra,28(sp)
+20001972:                 4462                  lw      s0,24(sp)
+20001974:                 44d2                  lw      s1,20(sp)
+20001976:                 4942                  lw      s2,16(sp)
+20001978:                 49b2                  lw      s3,12(sp)
+2000197a:                 6105                  addi    sp,sp,32
+2000197c:                 a009                  j       2000197e <ottf_console_flow_control>
+
+2000197e <ottf_console_flow_control>:
+ottf_console_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:351
+}
+
+// The public API has to save and restore interrupts to avoid an
+// unexpected write to the global `flow_control_state`.
+status_t ottf_console_flow_control(const dif_uart_t *uart,
+                                   ottf_console_flow_control_t ctrl) {
+2000197e:                 1101                  addi    sp,sp,-32
+20001980:                 ce06                  sw      ra,28(sp)
+20001982:                 cc22                  sw      s0,24(sp)
+20001984:                 ca26                  sw      s1,20(sp)
+20001986:                 c84a                  sw      s2,16(sp)
+20001988:                 84ae                  mv      s1,a1
+2000198a:                 842a                  mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:353
+  dif_uart_irq_enable_snapshot_t snapshot;
+  CHECK_DIF_OK(dif_uart_irq_disable_all(uart, &snapshot));
+2000198c:                 006c                  addi    a1,sp,12
+2000198e:                 5b5010ef              jal     ra,20003742 <dif_uart_irq_disable_all>
+20001992:                 00005917              auipc   s2,0x5
+20001996:       /-------- cd05                  beqz    a0,200019ce <ottf_console_flow_control+0x50>
+20001998:       |         862a                  mv      a2,a0
+2000199a:       |         93292503              lw      a0,-1742(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+2000199e:       |  /----- cd01                  beqz    a0,200019b6 <ottf_console_flow_control+0x38>
+200019a0:       |  |      e000e517              auipc   a0,0xe000e
+200019a4:       |  |      66050513              addi    a0,a0,1632 # 10000 <_chip_info_end>
+200019a8:       |  |      2fc00593              li      a1,764
+200019ac:       |  |      952e                  add     a0,a0,a1
+200019ae:       |  |      4585                  li      a1,1
+200019b0:       |  |      651000ef              jal     ra,20002800 <base_log_internal_dv>
+200019b4:       |  |  /-- a801                  j       200019c4 <ottf_console_flow_control+0x46>
+200019b6:       |  \--|-> 00004517              auipc   a0,0x4
+200019ba:       |     |   e9e50513              addi    a0,a0,-354 # 20005854 <ottf_console_flow_control.log_fields>
+200019be:       |     |   85b2                  mv      a1,a2
+200019c0:       |     |   5a5000ef              jal     ra,20002764 <base_log_internal_core>
+200019c4:       |     \-> 6531                  lui     a0,0xc
+200019c6:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200019ca:       |         451000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:354
+  status_t s = manage_flow_control(uart, ctrl);
+200019ce:       \-------> 8522                  mv      a0,s0
+200019d0:                 85a6                  mv      a1,s1
+200019d2:                 223d                  jal     20001b00 <manage_flow_control>
+200019d4:                 84aa                  mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:355
+  CHECK_DIF_OK(dif_uart_irq_restore_all(uart, &snapshot));
+200019d6:                 006c                  addi    a1,sp,12
+200019d8:                 8522                  mv      a0,s0
+200019da:                 581010ef              jal     ra,2000375a <dif_uart_irq_restore_all>
+200019de:       /-------- cd05                  beqz    a0,20001a16 <ottf_console_flow_control+0x98>
+200019e0:       |         862a                  mv      a2,a0
+200019e2:       |         93292503              lw      a0,-1742(s2)
+200019e6:       |  /----- cd01                  beqz    a0,200019fe <ottf_console_flow_control+0x80>
+200019e8:       |  |      e000e517              auipc   a0,0xe000e
+200019ec:       |  |      61850513              addi    a0,a0,1560 # 10000 <_chip_info_end>
+200019f0:       |  |      31000593              li      a1,784
+200019f4:       |  |      952e                  add     a0,a0,a1
+200019f6:       |  |      4585                  li      a1,1
+200019f8:       |  |      609000ef              jal     ra,20002800 <base_log_internal_dv>
+200019fc:       |  |  /-- a801                  j       20001a0c <ottf_console_flow_control+0x8e>
+200019fe:       |  \--|-> 00004517              auipc   a0,0x4
+20001a02:       |     |   e6a50513              addi    a0,a0,-406 # 20005868 <ottf_console_flow_control.log_fields.50>
+20001a06:       |     |   85b2                  mv      a1,a2
+20001a08:       |     |   55d000ef              jal     ra,20002764 <base_log_internal_core>
+20001a0c:       |     \-> 6531                  lui     a0,0xc
+20001a0e:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001a12:       |         409000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:357
+  return s;
+}
+20001a16:       \-------> 8526                  mv      a0,s1
+20001a18:                 40f2                  lw      ra,28(sp)
+20001a1a:                 4462                  lw      s0,24(sp)
+20001a1c:                 44d2                  lw      s1,20(sp)
+20001a1e:                 4942                  lw      s2,16(sp)
+20001a20:                 6105                  addi    sp,sp,32
+20001a22:                 8082                  ret
+
+20001a24 <ottf_console_flow_control_isr>:
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:335
+bool ottf_console_flow_control_isr(uint32_t *exc_info) {
+20001a24:                 1101                  addi    sp,sp,-32
+ottf_console_get():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:64
+  switch (kOttfTestConfig.console.type) {
+20001a26:                 ce06                  sw      ra,28(sp)
+20001a28:                 cc22                  sw      s0,24(sp)
+20001a2a:                 ca26                  sw      s1,20(sp)
+20001a2c:                 c84a                  sw      s2,16(sp)
+20001a2e:                 00003517              auipc   a0,0x3
+20001a32:                 bd652503              lw      a0,-1066(a0) # 20004604 <kOttfTestConfig+0x4>
+20001a36:                 4585                  li      a1,1
+20001a38:          /----- 00b50763              beq     a0,a1,20001a46 <ottf_console_flow_control_isr+0x22>
+20001a3c:          |      f0000517              auipc   a0,0xf0000
+20001a40:          |      63c50413              addi    s0,a0,1596 # 10002078 <ottf_console_uart>
+20001a44:          |  /-- a029                  j       20001a4e <ottf_console_flow_control_isr+0x2a>
+20001a46:          \--|-> f0000517              auipc   a0,0xf0000
+20001a4a:             |   6ea50413              addi    s0,a0,1770 # 10002130 <ottf_console_spi_device>
+ottf_console_flow_control_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:337
+  flow_control_irqs += 1;
+20001a4e:             \-> f0000517              auipc   a0,0xf0000
+20001a52:                 63a52583              lw      a1,1594(a0) # 10002088 <flow_control_irqs>
+20001a56:                 0585                  addi    a1,a1,1
+20001a58:                 62b52d23              sw      a1,1594(a0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:339
+  CHECK_DIF_OK(dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx));
+20001a5c:                 4585                  li      a1,1
+20001a5e:                 00f10613              addi    a2,sp,15
+20001a62:                 8522                  mv      a0,s0
+20001a64:                 46f010ef              jal     ra,200036d2 <dif_uart_irq_is_pending>
+20001a68:                 00005917              auipc   s2,0x5
+20001a6c:       /-------- cd05                  beqz    a0,20001aa4 <ottf_console_flow_control_isr+0x80>
+20001a6e:       |         862a                  mv      a2,a0
+20001a70:       |         85c92503              lw      a0,-1956(s2) # 200062c4 <kDeviceLogBypassUartAddress>
+20001a74:       |  /----- cd01                  beqz    a0,20001a8c <ottf_console_flow_control_isr+0x68>
+20001a76:       |  |      e000e517              auipc   a0,0xe000e
+20001a7a:       |  |      58a50513              addi    a0,a0,1418 # 10000 <_chip_info_end>
+20001a7e:       |  |      2d400593              li      a1,724
+20001a82:       |  |      952e                  add     a0,a0,a1
+20001a84:       |  |      4585                  li      a1,1
+20001a86:       |  |      57b000ef              jal     ra,20002800 <base_log_internal_dv>
+20001a8a:       |  |  /-- a801                  j       20001a9a <ottf_console_flow_control_isr+0x76>
+20001a8c:       |  \--|-> 00004517              auipc   a0,0x4
+20001a90:       |     |   da050513              addi    a0,a0,-608 # 2000582c <ottf_console_flow_control_isr.log_fields>
+20001a94:       |     |   85b2                  mv      a1,a2
+20001a96:       |     |   4cf000ef              jal     ra,20002764 <base_log_internal_core>
+20001a9a:       |     \-> 6531                  lui     a0,0xc
+20001a9c:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aa0:       |         37b000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001aa4:       \-------> 00f14483              lbu     s1,15(sp)
+20001aa8:       /-------- c4a1                  beqz    s1,20001af0 <ottf_console_flow_control_isr+0xcc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:341
+    manage_flow_control(uart, kOttfConsoleFlowControlAuto);
+20001aaa:       |         4585                  li      a1,1
+20001aac:       |         8522                  mv      a0,s0
+20001aae:       |         2889                  jal     20001b00 <manage_flow_control>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:342
+    CHECK_DIF_OK(dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark));
+20001ab0:       |         4585                  li      a1,1
+20001ab2:       |         8522                  mv      a0,s0
+20001ab4:       |         449010ef              jal     ra,200036fc <dif_uart_irq_acknowledge>
+20001ab8:       +-------- cd05                  beqz    a0,20001af0 <ottf_console_flow_control_isr+0xcc>
+20001aba:       |         862a                  mv      a2,a0
+20001abc:       |         85c92503              lw      a0,-1956(s2)
+20001ac0:       |  /----- cd01                  beqz    a0,20001ad8 <ottf_console_flow_control_isr+0xb4>
+20001ac2:       |  |      e000e517              auipc   a0,0xe000e
+20001ac6:       |  |      53e50513              addi    a0,a0,1342 # 10000 <_chip_info_end>
+20001aca:       |  |      2e800593              li      a1,744
+20001ace:       |  |      952e                  add     a0,a0,a1
+20001ad0:       |  |      4585                  li      a1,1
+20001ad2:       |  |      52f000ef              jal     ra,20002800 <base_log_internal_dv>
+20001ad6:       |  |  /-- a801                  j       20001ae6 <ottf_console_flow_control_isr+0xc2>
+20001ad8:       |  \--|-> 00004517              auipc   a0,0x4
+20001adc:       |     |   d6850513              addi    a0,a0,-664 # 20005840 <ottf_console_flow_control_isr.log_fields.46>
+20001ae0:       |     |   85b2                  mv      a1,a2
+20001ae2:       |     |   483000ef              jal     ra,20002764 <base_log_internal_core>
+20001ae6:       |     \-> 6531                  lui     a0,0xc
+20001ae8:       |         aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001aec:       |         32f000ef              jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:340
+  if (rx) {
+20001af0:       \-------> 00903533              snez    a0,s1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:346
+}
+20001af4:                 40f2                  lw      ra,28(sp)
+20001af6:                 4462                  lw      s0,24(sp)
+20001af8:                 44d2                  lw      s1,20(sp)
+20001afa:                 4942                  lw      s2,16(sp)
+20001afc:                 6105                  addi    sp,sp,32
+20001afe:                 8082                  ret
+
+20001b00 <manage_flow_control>:
+manage_flow_control():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:304
+                                    ottf_console_flow_control_t ctrl) {
+20001b00:                                1101                   addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:305
+  if (flow_control_state == kOttfConsoleFlowControlNone) {
+20001b02:                                ce06                   sw      ra,28(sp)
+20001b04:                                cc22                   sw      s0,24(sp)
+20001b06:                                ca26                   sw      s1,20(sp)
+20001b08:                                c84a                   sw      s2,16(sp)
+20001b0a:                                f0000417               auipc   s0,0xf0000
+20001b0e:                                57a42603               lw      a2,1402(s0) # 10002084 <flow_control_state>
+20001b12:                      /-------- c249                   beqz    a2,20001b94 <manage_flow_control+0x94>
+20001b14:                      |         84ae                   mv      s1,a1
+20001b16:                      |         892a                   mv      s2,a0
+20001b18:                      |         4505                   li      a0,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:308
+  if (ctrl == kOttfConsoleFlowControlAuto) {
+20001b1a:       /--------------|-------- 12a59863               bne     a1,a0,20001c4a <manage_flow_control+0x14a>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001b1e:       |              |         006c                   addi    a1,sp,12
+20001b20:       |              |         854a                   mv      a0,s2
+20001b22:       |              |         5eb010ef               jal     ra,2000390c <dif_uart_rx_bytes_available>
+20001b26:       |              |         c42a                   sw      a0,8(sp)
+20001b28:       |              |         0048                   addi    a0,sp,4
+20001b2a:       |              |         002c                   addi    a1,sp,8
+20001b2c:       |              |         4611                   li      a2,4
+20001b2e:       |              |         562020ef               jal     ra,20004090 <memcpy>
+20001b32:       |              |         4512                   lw      a0,4(sp)
+20001b34:       |              |         00153593               seqz    a1,a0
+20001b38:       |              |         15fd                   addi    a1,a1,-1
+20001b3a:       |              |         1365f693               andi    a3,a1,310
+20001b3e:       |              |         00003597               auipc   a1,0x3
+20001b42:       |              |         f5a58613               addi    a2,a1,-166 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001b46:       |              |         0e8f05b7               lui     a1,0xe8f0
+20001b4a:       |              |         6d2010ef               jal     ra,2000321c <status_create>
+20001b4e:       |              |     /-- 06054363               bltz    a0,20001bb4 <manage_flow_control+0xb4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b52:       |              |     |   4532                   lw      a0,12(sp)
+20001b54:       |              |     |   458d                   li      a1,3
+20001b56:       |              |  /--|-- 06a5ee63               bltu    a1,a0,20001bd2 <manage_flow_control+0xd2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:312
+        flow_control_state != kOttfConsoleFlowControlResume) {
+20001b5a:       |              |  |  |   57a42503               lw      a0,1402(s0)
+20001b5e:       |              |  |  |   44c5                   li      s1,17
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:311
+    if (avail < kFlowControlLowWatermark &&
+20001b60:       |           /--|--|--|-- 08950163               beq     a0,s1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001b64:       |           |  |  |  |   4585                   li      a1,1
+20001b66:       |           |  |  |  |   4605                   li      a2,1
+20001b68:       |           |  |  |  |   854a                   mv      a0,s2
+20001b6a:       |           |  |  |  |   3af010ef               jal     ra,20003718 <dif_uart_irq_set_enabled>
+20001b6e:       +-----------|--|--|--|-- 0c050e63               beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001b72:       |           |  |  |  |   862a                   mv      a2,a0
+20001b74:       |           |  |  |  |   00004517               auipc   a0,0x4
+20001b78:       |           |  |  |  |   75052503               lw      a0,1872(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001b7c:       |     /-----|--|--|--|-- c14d                   beqz    a0,20001c1e <manage_flow_control+0x11e>
+20001b7e:       |     |     |  |  |  |   e000e517               auipc   a0,0xe000e
+20001b82:       |     |     |  |  |  |   48250513               addi    a0,a0,1154 # 10000 <_chip_info_end>
+20001b86:       |     |     |  |  |  |   40000593               li      a1,1024
+20001b8a:       |     |     |  |  |  |   952e                   add     a0,a0,a1
+20001b8c:       |     |     |  |  |  |   4585                   li      a1,1
+20001b8e:       |     |     |  |  |  |   473000ef               jal     ra,20002800 <base_log_internal_dv>
+20001b92:       |     |  /--|--|--|--|-- a869                   j       20001c2c <manage_flow_control+0x12c>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:306
+    return OK_STATUS((int32_t)flow_control_state);
+20001b94:       |     |  |  |  \--|--|-> 57a42683               lw      a3,1402(s0)
+20001b98:       |     |  |  |     |  |   00003517               auipc   a0,0x3
+20001b9c:       |     |  |  |     |  |   f0050613               addi    a2,a0,-256 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ba0:       |     |  |  |     |  |   0e8f05b7               lui     a1,0xe8f0
+20001ba4:       |     |  |  |     |  |   4501                   li      a0,0
+20001ba6:       |     |  |  |     |  |   40f2                   lw      ra,28(sp)
+20001ba8:       |     |  |  |     |  |   4462                   lw      s0,24(sp)
+20001baa:       |     |  |  |     |  |   44d2                   lw      s1,20(sp)
+20001bac:       |     |  |  |     |  |   4942                   lw      s2,16(sp)
+20001bae:       |     |  |  |     |  |   6105                   addi    sp,sp,32
+20001bb0:       |     |  |  |     |  |   66c0106f               j       2000321c <status_create>
+20001bb4:       |     |  |  |     |  \-> 84aa                   mv      s1,a0
+20001bb6:       |     |  |  |     |      897d                   andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:310
+    TRY(dif_uart_rx_bytes_available(uart, &avail));
+20001bb8:       |     |  |  |     |      00003597               auipc   a1,0x3
+20001bbc:       |     |  |  |     |      ee058613               addi    a2,a1,-288 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bc0:       |     |  |  |     |      0e8f05b7               lui     a1,0xe8f0
+20001bc4:       |     |  |  |     |      13600693               li      a3,310
+20001bc8:       |     |  |  |     |      654010ef               jal     ra,2000321c <status_create>
+20001bcc:       |     |  |  |     |      f37fe0ef               jal     ra,20000b02 <status_report>
+20001bd0:       |  /--|--|--|-----|----- a0d5                   j       20001cb4 <manage_flow_control+0x1b4>
+20001bd2:       |  |  |  |  |     \----> 45a1                   li      a1,8
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bd4:       |  |  |  |  +----------- 00b56763               bltu    a0,a1,20001be2 <manage_flow_control+0xe2>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:319
+               flow_control_state != kOttfConsoleFlowControlPause) {
+20001bd8:       |  |  |  |  |            57a42503               lw      a0,1402(s0)
+20001bdc:       |  |  |  |  |            44cd                   li      s1,19
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:318
+    } else if (avail >= kFlowControlHighWatermark &&
+20001bde:       |  |  |  |  |        /-- 00951963               bne     a0,s1,20001bf0 <manage_flow_control+0xf0>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:326
+      return OK_STATUS((int32_t)flow_control_state);
+20001be2:       |  |  |  |  \--------|-> 57a42683               lw      a3,1402(s0)
+20001be6:       |  |  |  |           |   00003517               auipc   a0,0x3
+20001bea:       |  |  |  |           |   eb250613               addi    a2,a0,-334 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001bee:       |  |  |  |  /--------|-- a86d                   j       20001ca8 <manage_flow_control+0x1a8>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001bf0:       |  |  |  |  |        \-> 4585                   li      a1,1
+20001bf2:       |  |  |  |  |            854a                   mv      a0,s2
+20001bf4:       |  |  |  |  |            4601                   li      a2,0
+20001bf6:       |  |  |  |  |            323010ef               jal     ra,20003718 <dif_uart_irq_set_enabled>
+20001bfa:       +--|--|--|--|----------- c921                   beqz    a0,20001c4a <manage_flow_control+0x14a>
+20001bfc:       |  |  |  |  |            862a                   mv      a2,a0
+20001bfe:       |  |  |  |  |            00004517               auipc   a0,0x4
+20001c02:       |  |  |  |  |            6c652503               lw      a0,1734(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001c06:       |  |  |  |  |  /-------- c50d                   beqz    a0,20001c30 <manage_flow_control+0x130>
+20001c08:       |  |  |  |  |  |         e000e517               auipc   a0,0xe000e
+20001c0c:       |  |  |  |  |  |         3f850513               addi    a0,a0,1016 # 10000 <_chip_info_end>
+20001c10:       |  |  |  |  |  |         41400593               li      a1,1044
+20001c14:       |  |  |  |  |  |         952e                   add     a0,a0,a1
+20001c16:       |  |  |  |  |  |         4585                   li      a1,1
+20001c18:       |  |  |  |  |  |         3e9000ef               jal     ra,20002800 <base_log_internal_dv>
+20001c1c:       |  |  |  |  |  |  /----- a00d                   j       20001c3e <manage_flow_control+0x13e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:315
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c1e:       |  |  \--|--|--|--|----> 00004517               auipc   a0,0x4
+20001c22:       |  |     |  |  |  |      cd650513               addi    a0,a0,-810 # 200058f4 <manage_flow_control.log_fields>
+20001c26:       |  |     |  |  |  |      85b2                   mv      a1,a2
+20001c28:       |  |     |  |  |  |      33d000ef               jal     ra,20002764 <base_log_internal_core>
+20001c2c:       |  |     \--|--|--|----> 44c5                   li      s1,17
+20001c2e:       |  |        |  |  |  /-- a809                   j       20001c40 <manage_flow_control+0x140>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:323
+      CHECK_DIF_OK(dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark,
+20001c30:       |  |        |  \--|--|-> 00004517               auipc   a0,0x4
+20001c34:       |  |        |     |  |   cd850513               addi    a0,a0,-808 # 20005908 <manage_flow_control.log_fields.82>
+20001c38:       |  |        |     |  |   85b2                   mv      a1,a2
+20001c3a:       |  |        |     |  |   32b000ef               jal     ra,20002764 <base_log_internal_core>
+20001c3e:       |  |        |     \--|-> 44cd                   li      s1,19
+20001c40:       |  |        |        \-> 6531                   lui     a0,0xc
+20001c42:       |  |        |            aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c46:       |  |        |            1d5000ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:329
+  uint8_t byte = (uint8_t)ctrl;
+20001c4a:       \--|--------|----------> 009101a3               sb      s1,3(sp)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:330
+  CHECK_DIF_OK(dif_uart_bytes_send(uart, &byte, 1, NULL));
+20001c4e:          |        |            00310593               addi    a1,sp,3
+20001c52:          |        |            4605                   li      a2,1
+20001c54:          |        |            854a                   mv      a0,s2
+20001c56:          |        |            4681                   li      a3,0
+20001c58:          |        |            429010ef               jal     ra,20003880 <dif_uart_bytes_send>
+20001c5c:          |        |  /-------- cd15                   beqz    a0,20001c98 <manage_flow_control+0x198>
+20001c5e:          |        |  |         862a                   mv      a2,a0
+20001c60:          |        |  |         00004517               auipc   a0,0x4
+20001c64:          |        |  |         66452503               lw      a0,1636(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20001c68:          |        |  |  /----- cd01                   beqz    a0,20001c80 <manage_flow_control+0x180>
+20001c6a:          |        |  |  |      e000e517               auipc   a0,0xe000e
+20001c6e:          |        |  |  |      39650513               addi    a0,a0,918 # 10000 <_chip_info_end>
+20001c72:          |        |  |  |      42800593               li      a1,1064
+20001c76:          |        |  |  |      952e                   add     a0,a0,a1
+20001c78:          |        |  |  |      4585                   li      a1,1
+20001c7a:          |        |  |  |      387000ef               jal     ra,20002800 <base_log_internal_dv>
+20001c7e:          |        |  |  |  /-- a801                   j       20001c8e <manage_flow_control+0x18e>
+20001c80:          |        |  |  \--|-> 00004517               auipc   a0,0x4
+20001c84:          |        |  |     |   c9c50513               addi    a0,a0,-868 # 2000591c <manage_flow_control.log_fields.85>
+20001c88:          |        |  |     |   85b2                   mv      a1,a2
+20001c8a:          |        |  |     |   2db000ef               jal     ra,20002764 <base_log_internal_core>
+20001c8e:          |        |  |     \-> 6531                   lui     a0,0xc
+20001c90:          |        |  |         aad50513               addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20001c94:          |        |  |         187000ef               jal     ra,2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:331
+  flow_control_state = ctrl;
+20001c98:          |        |  \-------> 56942d23               sw      s1,1402(s0)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:332
+  return OK_STATUS((int32_t)flow_control_state);
+20001c9c:          |        |            57a42683               lw      a3,1402(s0)
+20001ca0:          |        |            00003517               auipc   a0,0x3
+20001ca4:          |        |            df850613               addi    a2,a0,-520 # 20004a98 <vApplicationStackOverflowHook.log_fields+0x14>
+20001ca8:          |        \----------> 0e8f05b7               lui     a1,0xe8f0
+20001cac:          |                     4501                   li      a0,0
+20001cae:          |                     56e010ef               jal     ra,2000321c <status_create>
+20001cb2:          |                     84aa                   mv      s1,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_console.c:333
+}
+20001cb4:          \-------------------> 8526                   mv      a0,s1
+20001cb6:                                40f2                   lw      ra,28(sp)
+20001cb8:                                4462                   lw      s0,24(sp)
+20001cba:                                44d2                   lw      s1,20(sp)
+20001cbc:                                4942                   lw      s2,16(sp)
+20001cbe:                                6105                   addi    sp,sp,32
+20001cc0:                                8082                   ret
+
+20001cc2 <irq_global_ctrl>:
+irq_global_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:18
+void irq_set_vector_offset(uintptr_t address) {
+  CSR_WRITE(CSR_REG_MTVEC, (uint32_t)address);
+}
+
+void irq_global_ctrl(bool en) {
+  if (en) {
+20001cc2:       /-- c509                        beqz    a0,20001ccc <irq_global_ctrl+0xa>
+20001cc4:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:19
+    CSR_SET_BITS(CSR_REG_MSTATUS, 0x8);
+20001cc6:       |   30052073            csrs    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+  }
+}
+20001cca:       |   8082                        ret
+20001ccc:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:21
+    CSR_CLEAR_BITS(CSR_REG_MSTATUS, 0x8);
+20001cce:           30053073            csrc    mstatus,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:23
+}
+20001cd2:           8082                        ret
+
+20001cd4 <irq_external_ctrl>:
+irq_external_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:27
+
+void irq_external_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_EXT_ENABLE_OFFSET;
+  if (en) {
+20001cd4:       /-- c511                        beqz    a0,20001ce0 <irq_external_ctrl+0xc>
+20001cd6:       |   28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:28
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cda:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cde:       |   8082                        ret
+20001ce0:       \-> 28b01513            bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/irq.c:30
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001ce4:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:32
+}
+20001ce8:           8082                        ret
+
+20001cea <irq_timer_ctrl>:
+irq_timer_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:36
+
+void irq_timer_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_TIMER_ENABLE_OFFSET;
+  if (en) {
+20001cea:       /-- c511                        beqz    a0,20001cf6 <irq_timer_ctrl+0xc>
+20001cec:       |   08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:37
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001cf0:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001cf4:       |   8082                        ret
+20001cf6:       \-> 08000513            li      a0,128
+/proc/self/cwd/sw/device/lib/runtime/irq.c:39
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001cfa:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:41
+}
+20001cfe:           8082                        ret
+
+20001d00 <irq_software_ctrl>:
+irq_software_ctrl():
+/proc/self/cwd/sw/device/lib/runtime/irq.c:45
+
+void irq_software_ctrl(bool en) {
+  const uint32_t mask = 1 << IRQ_SW_ENABLE_OFFSET;
+  if (en) {
+20001d00:       /-- c509                        beqz    a0,20001d0a <irq_software_ctrl+0xa>
+20001d02:       |   4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:46
+    CSR_SET_BITS(CSR_REG_MIE, mask);
+20001d04:       |   30452073            csrs    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+  } else {
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+  }
+}
+20001d08:       |   8082                        ret
+20001d0a:       \-> 4521                        li      a0,8
+/proc/self/cwd/sw/device/lib/runtime/irq.c:48
+    CSR_CLEAR_BITS(CSR_REG_MIE, mask);
+20001d0c:           30453073            csrc    mie,a0
+/proc/self/cwd/sw/device/lib/runtime/irq.c:50
+}
+20001d10:           8082                        ret
+
+20001d12 <spi_device_testutils_wait_for_upload>:
+spi_device_testutils_wait_for_upload():
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:361
+  }
+  return OK_STATUS();
+}
+
+status_t spi_device_testutils_wait_for_upload(dif_spi_device_handle_t *spid,
+                                              upload_info_t *info) {
+20001d12:                                               7179                    addi    sp,sp,-48
+20001d14:                                               d606                    sw      ra,44(sp)
+20001d16:                                               d422                    sw      s0,40(sp)
+20001d18:                                               d226                    sw      s1,36(sp)
+20001d1a:                                               d04a                    sw      s2,32(sp)
+20001d1c:                                               ce4e                    sw      s3,28(sp)
+20001d1e:                                               cc52                    sw      s4,24(sp)
+20001d20:                                               892e                    mv      s2,a1
+20001d22:                                               8a2a                    mv      s4,a0
+20001d24:                                               00004517                auipc   a0,0x4
+20001d28:                                               c0c50413                addi    s0,a0,-1012 # 20005930 <manage_flow_control.log_fields.85+0x14>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+  // Wait for a SPI transaction cause an upload.
+  bool upload_pending;
+  do {
+    // The UploadCmdfifoNotEmpty interrupt status is updated after the SPI
+    // transaction completes.
+    TRY(dif_spi_device_irq_is_pending(
+20001d2c:                                           /-> 01710613                addi    a2,sp,23
+20001d30:                                           |   8552                    mv      a0,s4
+20001d32:                                           |   4581                    li      a1,0
+20001d34:                                           |   62e010ef                jal     ra,20003362 <dif_spi_device_irq_is_pending>
+20001d38:                                           |   c82a                    sw      a0,16(sp)
+20001d3a:                                           |   0068                    addi    a0,sp,12
+20001d3c:                                           |   080c                    addi    a1,sp,16
+20001d3e:                                           |   4611                    li      a2,4
+20001d40:                                           |   350020ef                jal     ra,20004090 <memcpy>
+20001d44:                                           |   4532                    lw      a0,12(sp)
+20001d46:                                           |   00153593                seqz    a1,a0
+20001d4a:                                           |   15fd                    addi    a1,a1,-1
+20001d4c:                                           |   1705f693                andi    a3,a1,368
+20001d50:                                           |   509305b7                lui     a1,0x50930
+20001d54:                                           |   8622                    mv      a2,s0
+20001d56:                                           |   4c6010ef                jal     ra,2000321c <status_create>
+20001d5a:                /--------------------------|-- 1c054463                bltz    a0,20001f22 <spi_device_testutils_wait_for_upload+0x210>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:369
+        &spid->dev, kDifSpiDeviceIrqUploadCmdfifoNotEmpty, &upload_pending));
+  } while (!upload_pending);
+20001d5e:                |                          |   01714503                lbu     a0,23(sp)
+20001d62:                |                          \-- d569                    beqz    a0,20001d2c <spi_device_testutils_wait_for_upload+0x1a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+
+  uint8_t occupancy;
+
+  // Get the SPI opcode.
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001d64:                |                              00b10593                addi    a1,sp,11
+20001d68:                |                              8552                    mv      a0,s4
+20001d6a:                |                              7c4010ef                jal     ra,2000352e <dif_spi_device_get_flash_command_fifo_occupancy>
+20001d6e:                |                              c82a                    sw      a0,16(sp)
+20001d70:                |                              0068                    addi    a0,sp,12
+20001d72:                |                              080c                    addi    a1,sp,16
+20001d74:                |                              4611                    li      a2,4
+20001d76:                |                              31a020ef                jal     ra,20004090 <memcpy>
+20001d7a:                |                              4532                    lw      a0,12(sp)
+20001d7c:                |                              00153593                seqz    a1,a0
+20001d80:                |                              15fd                    addi    a1,a1,-1
+20001d82:                |                              1765f693                andi    a3,a1,374
+20001d86:                |                              00004597                auipc   a1,0x4
+20001d8a:                |                              baa58613                addi    a2,a1,-1110 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001d8e:                |                              509305b7                lui     a1,0x50930
+20001d92:                |                              48a010ef                jal     ra,2000321c <status_create>
+20001d96:                |                       /----- 1a054163                bltz    a0,20001f38 <spi_device_testutils_wait_for_upload+0x226>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:375
+  if (occupancy != 1) {
+20001d9a:                |                       |      00b14503                lbu     a0,11(sp)
+20001d9e:                |                       |      4585                    li      a1,1
+20001da0:       /--------|-----------------------|----- 1ab51763                bne     a0,a1,20001f4e <spi_device_testutils_wait_for_upload+0x23c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+    // Cannot have an uploaded command without an opcode.
+    return INTERNAL();
+  }
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001da4:       |        |                       |      8552                    mv      a0,s4
+20001da6:       |        |                       |      85ca                    mv      a1,s2
+20001da8:       |        |                       |      7f0010ef                jal     ra,20003598 <dif_spi_device_pop_flash_command_fifo>
+20001dac:       |        |                       |      c82a                    sw      a0,16(sp)
+20001dae:       |        |                       |      0068                    addi    a0,sp,12
+20001db0:       |        |                       |      080c                    addi    a1,sp,16
+20001db2:       |        |                       |      4611                    li      a2,4
+20001db4:       |        |                       |      2dc020ef                jal     ra,20004090 <memcpy>
+20001db8:       |        |                       |      4532                    lw      a0,12(sp)
+20001dba:       |        |                       |      00153593                seqz    a1,a0
+20001dbe:       |        |                       |      15fd                    addi    a1,a1,-1
+20001dc0:       |        |                       |      17b5f693                andi    a3,a1,379
+20001dc4:       |        |                       |      00004597                auipc   a1,0x4
+20001dc8:       |        |                       |      b6c58613                addi    a2,a1,-1172 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001dcc:       |        |                       |      509305b7                lui     a1,0x50930
+20001dd0:       |        |                       |      44c010ef                jal     ra,2000321c <status_create>
+20001dd4:       |  /-----|-----------------------|----- 18054a63                bltz    a0,20001f68 <spi_device_testutils_wait_for_upload+0x256>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  // Get the flash_status register.
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001dd8:       |  |     |                       |      00890593                addi    a1,s2,8
+20001ddc:       |  |     |                       |      8552                    mv      a0,s4
+20001dde:       |  |     |                       |      0cd010ef                jal     ra,200036aa <dif_spi_device_get_flash_status_registers>
+20001de2:       |  |     |                       |      c82a                    sw      a0,16(sp)
+20001de4:       |  |     |                       |      0068                    addi    a0,sp,12
+20001de6:       |  |     |                       |      080c                    addi    a1,sp,16
+20001de8:       |  |     |                       |      4611                    li      a2,4
+20001dea:       |  |     |                       |      2a6020ef                jal     ra,20004090 <memcpy>
+20001dee:       |  |     |                       |      4532                    lw      a0,12(sp)
+20001df0:       |  |     |                       |      00153593                seqz    a1,a0
+20001df4:       |  |     |                       |      15fd                    addi    a1,a1,-1
+20001df6:       |  |     |                       |      17d5f693                andi    a3,a1,381
+20001dfa:       |  |     |                       |      00004597                auipc   a1,0x4
+20001dfe:       |  |     |                       |      b3658613                addi    a2,a1,-1226 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e02:       |  |     |                       |      509305b7                lui     a1,0x50930
+20001e06:       |  |     |                       |      416010ef                jal     ra,2000321c <status_create>
+20001e0a:       |  |  /--|-----------------------|----- 16054a63                bltz    a0,20001f7e <spi_device_testutils_wait_for_upload+0x26c>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+
+  // Get the SPI address (if available).
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001e0e:       |  |  |  |                       |      00b10593                addi    a1,sp,11
+20001e12:       |  |  |  |                       |      8552                    mv      a0,s4
+20001e14:       |  |  |  |                       |      738010ef                jal     ra,2000354c <dif_spi_device_get_flash_address_fifo_occupancy>
+20001e18:       |  |  |  |                       |      c82a                    sw      a0,16(sp)
+20001e1a:       |  |  |  |                       |      0068                    addi    a0,sp,12
+20001e1c:       |  |  |  |                       |      080c                    addi    a1,sp,16
+20001e1e:       |  |  |  |                       |      4611                    li      a2,4
+20001e20:       |  |  |  |                       |      270020ef                jal     ra,20004090 <memcpy>
+20001e24:       |  |  |  |                       |      4532                    lw      a0,12(sp)
+20001e26:       |  |  |  |                       |      00153593                seqz    a1,a0
+20001e2a:       |  |  |  |                       |      15fd                    addi    a1,a1,-1
+20001e2c:       |  |  |  |                       |      1805f693                andi    a3,a1,384
+20001e30:       |  |  |  |                       |      00004597                auipc   a1,0x4
+20001e34:       |  |  |  |                       |      b0058613                addi    a2,a1,-1280 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e38:       |  |  |  |                       |      509305b7                lui     a1,0x50930
+20001e3c:       |  |  |  |                       |      3e0010ef                jal     ra,2000321c <status_create>
+20001e40:       |  |  |  |     /-----------------|----- 14054a63                bltz    a0,20001f94 <spi_device_testutils_wait_for_upload+0x282>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:385
+  if (occupancy) {
+20001e44:       |  |  |  |     |                 |      00b14503                lbu     a0,11(sp)
+20001e48:       |  |  |  |     |                 |  /-- cd35                    beqz    a0,20001ec4 <spi_device_testutils_wait_for_upload+0x1b2>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:387
+    dif_toggle_t addr_4b;
+    TRY(dif_spi_device_get_4b_address_mode(spid, &addr_4b));
+20001e4a:       |  |  |  |     |                 |  |   080c                    addi    a1,sp,16
+20001e4c:       |  |  |  |     |                 |  |   8552                    mv      a0,s4
+20001e4e:       |  |  |  |     |                 |  |   5aa010ef                jal     ra,200033f8 <dif_spi_device_get_4b_address_mode>
+20001e52:       |  |  |  |     |                 |  |   c62a                    sw      a0,12(sp)
+20001e54:       |  |  |  |     |                 |  |   0048                    addi    a0,sp,4
+20001e56:       |  |  |  |     |                 |  |   006c                    addi    a1,sp,12
+20001e58:       |  |  |  |     |                 |  |   4611                    li      a2,4
+20001e5a:       |  |  |  |     |                 |  |   236020ef                jal     ra,20004090 <memcpy>
+20001e5e:       |  |  |  |     |                 |  |   4512                    lw      a0,4(sp)
+20001e60:       |  |  |  |     |                 |  |   00153593                seqz    a1,a0
+20001e64:       |  |  |  |     |                 |  |   15fd                    addi    a1,a1,-1
+20001e66:       |  |  |  |     |                 |  |   1835f693                andi    a3,a1,387
+20001e6a:       |  |  |  |     |                 |  |   00004597                auipc   a1,0x4
+20001e6e:       |  |  |  |     |                 |  |   ac658613                addi    a2,a1,-1338 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001e72:       |  |  |  |     |                 |  |   509305b7                lui     a1,0x50930
+20001e76:       |  |  |  |     |                 |  |   3a6010ef                jal     ra,2000321c <status_create>
+20001e7a:       |  |  |  |     |  /--------------|--|-- 12054863                bltz    a0,20001faa <spi_device_testutils_wait_for_upload+0x298>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:388
+    info->addr_4b = addr_4b;
+20001e7e:       |  |  |  |     |  |              |  |   4542                    lw      a0,16(sp)
+20001e80:       |  |  |  |     |  |              |  |   00a03533                snez    a0,a0
+20001e84:       |  |  |  |     |  |              |  |   00a90123                sb      a0,2(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:389
+    TRY(dif_spi_device_pop_flash_address_fifo(spid, &info->address));
+20001e88:       |  |  |  |     |  |              |  |   00c90593                addi    a1,s2,12
+20001e8c:       |  |  |  |     |  |              |  |   8552                    mv      a0,s4
+20001e8e:       |  |  |  |     |  |              |  |   730010ef                jal     ra,200035be <dif_spi_device_pop_flash_address_fifo>
+20001e92:       |  |  |  |     |  |              |  |   c62a                    sw      a0,12(sp)
+20001e94:       |  |  |  |     |  |              |  |   0048                    addi    a0,sp,4
+20001e96:       |  |  |  |     |  |              |  |   006c                    addi    a1,sp,12
+20001e98:       |  |  |  |     |  |              |  |   4611                    li      a2,4
+20001e9a:       |  |  |  |     |  |              |  |   1f6020ef                jal     ra,20004090 <memcpy>
+20001e9e:       |  |  |  |     |  |              |  |   4512                    lw      a0,4(sp)
+20001ea0:       |  |  |  |     |  |              |  |   00153593                seqz    a1,a0
+20001ea4:       |  |  |  |     |  |              |  |   15fd                    addi    a1,a1,-1
+20001ea6:       |  |  |  |     |  |              |  |   1855f693                andi    a3,a1,389
+20001eaa:       |  |  |  |     |  |              |  |   00004597                auipc   a1,0x4
+20001eae:       |  |  |  |     |  |              |  |   a8658613                addi    a2,a1,-1402 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001eb2:       |  |  |  |     |  |              |  |   509305b7                lui     a1,0x50930
+20001eb6:       |  |  |  |     |  |              |  |   366010ef                jal     ra,2000321c <status_create>
+20001eba:       |  |  |  |     |  |     /--------|--|-- 10054763                bltz    a0,20001fc8 <spi_device_testutils_wait_for_upload+0x2b6>
+20001ebe:       |  |  |  |     |  |     |        |  |   4505                    li      a0,1
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:390
+    info->has_address = true;
+20001ec0:       |  |  |  |     |  |     |        |  |   00a900a3                sb      a0,1(s2)
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  }
+
+  // Get the SPI data payload (if available).
+  uint32_t start;
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001ec4:       |  |  |  |     |  |     |        |  \-> 00490993                addi    s3,s2,4
+20001ec8:       |  |  |  |     |  |     |        |      0810                    addi    a2,sp,16
+20001eca:       |  |  |  |     |  |     |        |      8552                    mv      a0,s4
+20001ecc:       |  |  |  |     |  |     |        |      85ce                    mv      a1,s3
+20001ece:       |  |  |  |     |  |     |        |      69e010ef                jal     ra,2000356c <dif_spi_device_get_flash_payload_fifo_occupancy>
+20001ed2:       |  |  |  |     |  |     |        |      c62a                    sw      a0,12(sp)
+20001ed4:       |  |  |  |     |  |     |        |      0048                    addi    a0,sp,4
+20001ed6:       |  |  |  |     |  |     |        |      006c                    addi    a1,sp,12
+20001ed8:       |  |  |  |     |  |     |        |      4611                    li      a2,4
+20001eda:       |  |  |  |     |  |     |        |      1b6020ef                jal     ra,20004090 <memcpy>
+20001ede:       |  |  |  |     |  |     |        |      4512                    lw      a0,4(sp)
+20001ee0:       |  |  |  |     |  |     |        |      00153593                seqz    a1,a0
+20001ee4:       |  |  |  |     |  |     |        |      15fd                    addi    a1,a1,-1
+20001ee6:       |  |  |  |     |  |     |        |      18c5f693                andi    a3,a1,396
+20001eea:       |  |  |  |     |  |     |        |      00004597                auipc   a1,0x4
+20001eee:       |  |  |  |     |  |     |        |      a4658613                addi    a2,a1,-1466 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001ef2:       |  |  |  |     |  |     |        |      509305b7                lui     a1,0x50930
+20001ef6:       |  |  |  |     |  |     |        |      326010ef                jal     ra,2000321c <status_create>
+20001efa:       |  |  |  |     |  |     |     /--|----- 0a054c63                bltz    a0,20001fb2 <spi_device_testutils_wait_for_upload+0x2a0>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:397
+                                                      &start));
+  if (info->data_len) {
+20001efe:       |  |  |  |     |  |     |     |  |      0009d603                lhu     a2,0(s3)
+20001f02:       |  |  |  |     |  |  /--|-----|--|----- 12060763                beqz    a2,20002030 <spi_device_testutils_wait_for_upload+0x31e>
+20001f06:       |  |  |  |     |  |  |  |     |  |      10100513                li      a0,257
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:398
+    if (info->data_len > sizeof(info->data)) {
+20001f0a:       |  |  |  |     |  |  |  |  /--|--|----- 0ea66763                bltu    a2,a0,20001ff8 <spi_device_testutils_wait_for_upload+0x2e6>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:400
+      // We aren't expecting more than 256 bytes of data.
+      return INVALID_ARGUMENT();
+20001f0e:       |  |  |  |     |  |  |  |  |  |  |      00004517                auipc   a0,0x4
+20001f12:       |  |  |  |     |  |  |  |  |  |  |      a2250613                addi    a2,a0,-1502 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f16:       |  |  |  |     |  |  |  |  |  |  |      450d                    li      a0,3
+20001f18:       |  |  |  |     |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f1c:       |  |  |  |     |  |  |  |  |  |  |      19000693                li      a3,400
+20001f20:       |  |  |  |  /--|--|--|--|--|--|--|----- a081                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20001f22:       |  |  |  \--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f24:       |  |  |     |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:367
+    TRY(dif_spi_device_irq_is_pending(
+20001f26:       |  |  |     |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f2a:       |  |  |     |  |  |  |  |  |  |  |      a0a58613                addi    a2,a1,-1526 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f2e:       |  |  |     |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f32:       |  |  |     |  |  |  |  |  |  |  |      17000693                li      a3,368
+20001f36:       |  |  |  /--|--|--|--|--|--|--|--|----- a065                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f38:       |  |  |  |  |  |  |  |  |  |  |  \----> 84aa                    mv      s1,a0
+20001f3a:       |  |  |  |  |  |  |  |  |  |  |         897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:374
+  TRY(dif_spi_device_get_flash_command_fifo_occupancy(spid, &occupancy));
+20001f3c:       |  |  |  |  |  |  |  |  |  |  |         00004597                auipc   a1,0x4
+20001f40:       |  |  |  |  |  |  |  |  |  |  |         9f458613                addi    a2,a1,-1548 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f44:       |  |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f48:       |  |  |  |  |  |  |  |  |  |  |         17600693                li      a3,374
+20001f4c:       |  |  |  +--|--|--|--|--|--|--|-------- a849                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:377
+    return INTERNAL();
+20001f4e:       \--|--|--|--|--|--|--|--|--|--|-------> 00004517                auipc   a0,0x4
+20001f52:          |  |  |  |  |  |  |  |  |  |         9e250613                addi    a2,a0,-1566 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f56:          |  |  |  |  |  |  |  |  |  |         4535                    li      a0,13
+20001f58:          |  |  |  |  |  |  |  |  |  |         509305b7                lui     a1,0x50930
+20001f5c:          |  |  |  |  |  |  |  |  |  |         17900693                li      a3,377
+20001f60:          |  |  |  >--|--|--|--|--|--|-------> 2bc010ef                jal     ra,2000321c <status_create>
+20001f64:          |  |  |  |  |  |  |  |  |  |         84aa                    mv      s1,a0
+20001f66:          |  |  |  |  |  |  |  |  |  |  /----- a041                    j       20001fe6 <spi_device_testutils_wait_for_upload+0x2d4>
+20001f68:          \--|--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f6a:             |  |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:379
+  TRY(dif_spi_device_pop_flash_command_fifo(spid, &info->opcode));
+20001f6c:             |  |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f70:             |  |  |  |  |  |  |  |  |  |      9c458613                addi    a2,a1,-1596 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f74:             |  |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f78:             |  |  |  |  |  |  |  |  |  |      17b00693                li      a3,379
+20001f7c:             |  +--|--|--|--|--|--|--|--|----- a08d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f7e:             \--|--|--|--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f80:                |  |  |  |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:381
+  TRY(dif_spi_device_get_flash_status_registers(spid, &info->flash_status));
+20001f82:                |  |  |  |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f86:                |  |  |  |  |  |  |  |  |      9ae58613                addi    a2,a1,-1618 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001f8a:                |  |  |  |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001f8e:                |  |  |  |  |  |  |  |  |      17d00693                li      a3,381
+20001f92:                +--|--|--|--|--|--|--|--|----- a0b1                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001f94:                |  |  \--|--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001f96:                |  |     |  |  |  |  |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:384
+  TRY(dif_spi_device_get_flash_address_fifo_occupancy(spid, &occupancy));
+20001f98:                |  |     |  |  |  |  |  |      00004597                auipc   a1,0x4
+20001f9c:                |  |     |  |  |  |  |  |      99858613                addi    a2,a1,-1640 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fa0:                |  |     |  |  |  |  |  |      509305b7                lui     a1,0x50930
+20001fa4:                |  |     |  |  |  |  |  |      18000693                li      a3,384
+20001fa8:                +--|-----|--|--|--|--|--|----- a81d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001faa:                |  |     \--|--|--|--|--|----> 84aa                    mv      s1,a0
+20001fac:                |  |        |  |  |  |  |      18300693                li      a3,387
+20001fb0:                |  |        |  |  |  |  |  /-- a839                    j       20001fce <spi_device_testutils_wait_for_upload+0x2bc>
+20001fb2:                |  |        |  |  |  \--|--|-> 84aa                    mv      s1,a0
+20001fb4:                |  |        |  |  |     |  |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:395
+  TRY(dif_spi_device_get_flash_payload_fifo_occupancy(spid, &info->data_len,
+20001fb6:                |  |        |  |  |     |  |   00004597                auipc   a1,0x4
+20001fba:                |  |        |  |  |     |  |   97a58613                addi    a2,a1,-1670 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fbe:                |  |        |  |  |     |  |   509305b7                lui     a1,0x50930
+20001fc2:                |  |        |  |  |     |  |   18c00693                li      a3,396
+20001fc6:                +--|--------|--|--|-----|--|-- a821                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+20001fc8:                |  |        |  \--|-----|--|-> 84aa                    mv      s1,a0
+20001fca:                |  |        |     |     |  |   18500693                li      a3,389
+20001fce:                |  |        |     |     |  \-> 01f4f513                andi    a0,s1,31
+20001fd2:                |  |        |     |     |      00004597                auipc   a1,0x4
+20001fd6:                |  |        |     |     |      95e58613                addi    a2,a1,-1698 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20001fda:                |  |        |     |     |      509305b7                lui     a1,0x50930
+20001fde:                >--|--------|-----|-----|----> 23e010ef                jal     ra,2000321c <status_create>
+20001fe2:                |  |        |     |     |      b21fe0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:410
+
+  // Finished: ack the IRQ.
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+                                     kDifSpiDeviceIrqUploadCmdfifoNotEmpty));
+  return OK_STATUS();
+}
+20001fe6:                |  |        |     |     \----> 8526                    mv      a0,s1
+20001fe8:                |  |        |     |            50b2                    lw      ra,44(sp)
+20001fea:                |  |        |     |            5422                    lw      s0,40(sp)
+20001fec:                |  |        |     |            5492                    lw      s1,36(sp)
+20001fee:                |  |        |     |            5902                    lw      s2,32(sp)
+20001ff0:                |  |        |     |            49f2                    lw      s3,28(sp)
+20001ff2:                |  |        |     |            4a62                    lw      s4,24(sp)
+20001ff4:                |  |        |     |            6145                    addi    sp,sp,48
+20001ff6:                |  |        |     |            8082                    ret
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20001ff8:                |  |        |     \----------> 45c2                    lw      a1,16(sp)
+20001ffa:                |  |        |                  01090693                addi    a3,s2,16
+20001ffe:                |  |        |                  8552                    mv      a0,s4
+20002000:                |  |        |                  5e4010ef                jal     ra,200035e4 <dif_spi_device_read_flash_payload_buffer>
+20002004:                |  |        |                  c62a                    sw      a0,12(sp)
+20002006:                |  |        |                  0048                    addi    a0,sp,4
+20002008:                |  |        |                  006c                    addi    a1,sp,12
+2000200a:                |  |        |                  4611                    li      a2,4
+2000200c:                |  |        |                  084020ef                jal     ra,20004090 <memcpy>
+20002010:                |  |        |                  4512                    lw      a0,4(sp)
+20002012:                |  |        |                  00153593                seqz    a1,a0
+20002016:                |  |        |                  15fd                    addi    a1,a1,-1
+20002018:                |  |        |                  1935f693                andi    a3,a1,403
+2000201c:                |  |        |                  00004597                auipc   a1,0x4
+20002020:                |  |        |                  91458613                addi    a2,a1,-1772 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002024:                |  |        |                  509305b7                lui     a1,0x50930
+20002028:                |  |        |                  1f4010ef                jal     ra,2000321c <status_create>
+2000202c:                |  |        |           /----- 06054063                bltz    a0,2000208c <spi_device_testutils_wait_for_upload+0x37a>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+20002030:                |  |        \-----------|----> 8552                    mv      a0,s4
+20002032:                |  |                    |      4581                    li      a1,0
+20002034:                |  |                    |      358010ef                jal     ra,2000338c <dif_spi_device_irq_acknowledge>
+20002038:                |  |                    |      c62a                    sw      a0,12(sp)
+2000203a:                |  |                    |      0048                    addi    a0,sp,4
+2000203c:                |  |                    |      006c                    addi    a1,sp,12
+2000203e:                |  |                    |      4611                    li      a2,4
+20002040:                |  |                    |      050020ef                jal     ra,20004090 <memcpy>
+20002044:                |  |                    |      4512                    lw      a0,4(sp)
+20002046:                |  |                    |      00153593                seqz    a1,a0
+2000204a:                |  |                    |      15fd                    addi    a1,a1,-1
+2000204c:                |  |                    |      1985f693                andi    a3,a1,408
+20002050:                |  |                    |      00004597                auipc   a1,0x4
+20002054:                |  |                    |      8e058613                addi    a2,a1,-1824 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002058:                |  |                    |      509305b7                lui     a1,0x50930
+2000205c:                |  |                    |      1c0010ef                jal     ra,2000321c <status_create>
+20002060:                |  |                    |  /-- 00054b63                bltz    a0,20002076 <spi_device_testutils_wait_for_upload+0x364>
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:409
+  return OK_STATUS();
+20002064:                |  |                    |  |   00004517                auipc   a0,0x4
+20002068:                |  |                    |  |   8cc50613                addi    a2,a0,-1844 # 20005930 <manage_flow_control.log_fields.85+0x14>
+2000206c:                |  |                    |  |   509305b7                lui     a1,0x50930
+20002070:                |  |                    |  |   4501                    li      a0,0
+20002072:                |  |                    |  |   4681                    li      a3,0
+20002074:                |  \--------------------|--|-- b5f5                    j       20001f60 <spi_device_testutils_wait_for_upload+0x24e>
+20002076:                |                       |  \-> 84aa                    mv      s1,a0
+20002078:                |                       |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:407
+  TRY(dif_spi_device_irq_acknowledge(&spid->dev,
+2000207a:                |                       |      00004597                auipc   a1,0x4
+2000207e:                |                       |      8b658613                addi    a2,a1,-1866 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002082:                |                       |      509305b7                lui     a1,0x50930
+20002086:                |                       |      19800693                li      a3,408
+2000208a:                +-----------------------|----- bf91                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+2000208c:                |                       \----> 84aa                    mv      s1,a0
+2000208e:                |                              897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/testing/spi_device_testutils.c:402
+    TRY(dif_spi_device_read_flash_payload_buffer(spid, start, info->data_len,
+20002090:                |                              00004597                auipc   a1,0x4
+20002094:                |                              8a058613                addi    a2,a1,-1888 # 20005930 <manage_flow_control.log_fields.85+0x14>
+20002098:                |                              509305b7                lui     a1,0x50930
+2000209c:                |                              19300693                li      a3,403
+200020a0:                \----------------------------- bf3d                    j       20001fde <spi_device_testutils_wait_for_upload+0x2cc>
+
+200020a2 <dif_pinmux_init>:
+dif_pinmux_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:18
+
+#include "pinmux_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_pinmux_init(mmio_region_t base_addr, dif_pinmux_t *pinmux) {
+  if (pinmux == NULL) {
+200020a2:       /----- c581                     beqz    a1,200020aa <dif_pinmux_init+0x8>
+200020a4:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:22
+    return kDifBadArg;
+  }
+
+  pinmux->base_addr = base_addr;
+200020a6:       |      c188                     sw      a0,0(a1)
+200020a8:       |  /-- a011                     j       200020ac <dif_pinmux_init+0xa>
+200020aa:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_pinmux_autogen.c:25
+
+  return kDifOk;
+}
+200020ac:          \-> 8532                     mv      a0,a2
+200020ae:              8082                     ret
+
+200020b0 <dif_pinmux_output_select>:
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:175
+}
+
+dif_result_t dif_pinmux_output_select(const dif_pinmux_t *pinmux,
+                                      dif_pinmux_index_t mio_pad_output,
+                                      dif_pinmux_index_t outsel) {
+  if (pinmux == NULL || mio_pad_output >= PINMUX_PARAM_N_MIO_PADS ||
+200020b0:           00153693            seqz    a3,a0
+200020b4:           02f5b713            sltiu   a4,a1,47
+200020b8:           00174713            xori    a4,a4,1
+200020bc:           8ed9                        or      a3,a3,a4
+200020be:           04e63713            sltiu   a4,a2,78
+200020c2:           00174713            xori    a4,a4,1
+200020c6:           8f55                        or      a4,a4,a3
+200020c8:           468d                        li      a3,3
+200020ca:       /-- ef01                        bnez    a4,200020e2 <dif_pinmux_output_select+0x32>
+dif_pinmux_is_locked():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:142
+  uint32_t reg_value = mmio_region_read32(pinmux->base_addr, reg_offset);
+200020cc:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200020ce:       |   20a5c533            sh2add  a0,a1,a0
+200020d2:       |   1cc52583            lw      a1,460(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+ */
+OT_WARN_UNUSED_RESULT
+inline bool bitfield_bit32_read(uint32_t bitfield,
+                                bitfield_bit32_index_t bit_index) {
+  return bitfield_field32_read(bitfield,
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200020d6:       |   8985                        andi    a1,a1,1
+200020d8:       |   46a5                        li      a3,9
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:185
+  dif_result_t result = dif_pinmux_is_locked(
+      pinmux, mio_pad_output, kDifPinmuxLockTargetOutsel, &is_locked);
+  if (result != kDifOk) {
+    return result;
+  }
+  if (is_locked) {
+200020da:       +-- c581                        beqz    a1,200020e2 <dif_pinmux_output_select+0x32>
+200020dc:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200020de:       |   28c52423            sw      a2,648(a0)
+dif_pinmux_output_select():
+/proc/self/cwd/sw/device/lib/dif/dif_pinmux.c:194
+      PINMUX_MIO_OUTSEL_0_REG_OFFSET + (ptrdiff_t)(mio_pad_output << 2);
+  uint32_t reg_value =
+      bitfield_field32_write(0, PINMUX_MIO_OUTSEL_0_OUT_0_FIELD, outsel);
+  mmio_region_write32(pinmux->base_addr, reg_offset, reg_value);
+  return kDifOk;
+}
+200020e2:       \-> 8536                        mv      a0,a3
+200020e4:           8082                        ret
+
+200020e6 <ottf_generic_fault_print>:
+ottf_generic_fault_print():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:65
+    "  s3", "  s4", "  s5", "  s6", "  s7", "  s8", "  s9", " s10",
+    " s11", "  t3", "  t4", "  t5", "  t6", "msts",
+};
+
+void ottf_generic_fault_print(uint32_t *exc_info, const char *reason,
+                              uint32_t mcause) {
+200020e6:                 7179                  addi    sp,sp,-48
+200020e8:                 d606                  sw      ra,44(sp)
+200020ea:                 d422                  sw      s0,40(sp)
+200020ec:                 d226                  sw      s1,36(sp)
+200020ee:                 d04a                  sw      s2,32(sp)
+200020f0:                 ce4e                  sw      s3,28(sp)
+200020f2:                 cc52                  sw      s4,24(sp)
+200020f4:                 ca56                  sw      s5,20(sp)
+200020f6:                 c85a                  sw      s6,16(sp)
+200020f8:                 c65e                  sw      s7,12(sp)
+200020fa:                 c462                  sw      s8,8(sp)
+200020fc:                 c266                  sw      s9,4(sp)
+200020fe:                 c06a                  sw      s10,0(sp)
+20002100:                 8932                  mv      s2,a2
+20002102:                 89ae                  mv      s3,a1
+20002104:                 8b2a                  mv      s6,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:67
+  enum { kExcWords = 30 };
+  uint32_t mepc = ibex_mepc_read();
+20002106:                 2da1                  jal     2000275e <ibex_mepc_read>
+20002108:                 8a2a                  mv      s4,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:68
+  uint32_t mtval = ibex_mtval_read();
+2000210a:                 25b9                  jal     20002758 <ibex_mtval_read>
+2000210c:                 8aaa                  mv      s5,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:69
+  if (exc_info) {
+2000210e:       /-------- 0c0b0763              beqz    s6,200021dc <ottf_generic_fault_print+0xf6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:70
+    base_printf("===== Exception Frame @ %08x =====", exc_info);
+20002112:       |         00004517              auipc   a0,0x4
+20002116:       |         90250513              addi    a0,a0,-1790 # 20005a14 <manage_flow_control.log_fields.85+0xf8>
+2000211a:       |         85da                  mv      a1,s6
+2000211c:       |         139000ef              jal     ra,20002a54 <base_printf>
+20002120:       |         4481                  li      s1,0
+20002122:       |         00004517              auipc   a0,0x4
+20002126:       |         c1250d13              addi    s10,a0,-1006 # 20005d34 <exc_frame>
+2000212a:       |         00004517              auipc   a0,0x4
+2000212e:       |         e8a50b93              addi    s7,a0,-374 # 20005fb4 <test_status_set.log_fields.7+0x24>
+20002132:       |         00004517              auipc   a0,0x4
+20002136:       |         90550c13              addi    s8,a0,-1787 # 20005a37 <manage_flow_control.log_fields.85+0x11b>
+2000213a:       |         4cf9                  li      s9,30
+2000213c:       |         845a                  mv      s0,s6
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:72
+    for (size_t i = 0; i < kExcWords; ++i) {
+      if (i % 4 == 0) {
+2000213e:       |  /----> 0034f513              andi    a0,s1,3
+20002142:       |  |  /-- e501                  bnez    a0,2000214a <ottf_generic_fault_print+0x64>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:73
+        base_printf("\n");
+20002144:       |  |  |   855e                  mv      a0,s7
+20002146:       |  |  |   10f000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:75
+      }
+      const char *name = exc_frame[i];
+2000214a:       |  |  \-> 000d2583              lw      a1,0(s10)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:78
+      if (name == NULL)
+        continue;
+      base_printf(" %4s=%08x", name, exc_info[i]);
+2000214e:       |  |      4010                  lw      a2,0(s0)
+20002150:       |  |      8562                  mv      a0,s8
+20002152:       |  |      103000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:71
+    for (size_t i = 0; i < kExcWords; ++i) {
+20002156:       |  |      0485                  addi    s1,s1,1
+20002158:       |  |      0411                  addi    s0,s0,4
+2000215a:       |  |      0d11                  addi    s10,s10,4
+2000215c:       |  \----- ff9491e3              bne     s1,s9,2000213e <ottf_generic_fault_print+0x58>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:80
+    }
+    uint32_t *sp = exc_info + kExcWords;
+20002160:       |         078b0413              addi    s0,s6,120
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:81
+    base_printf("\n");
+20002164:       |         00004517              auipc   a0,0x4
+20002168:       |         e5050513              addi    a0,a0,-432 # 20005fb4 <test_status_set.log_fields.7+0x24>
+2000216c:       |         0e9000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:90
+                     TOP_EARLGREY_SRAM_CTRL_MAIN_RAM_SIZE_BYTES);
+
+    extern const char _text_start[], _text_end[];
+    const uint32_t text_start = (uint32_t)_text_start;
+    const uint32_t text_end = (uint32_t)_text_end;
+    base_printf("===== Call Stack =====\n");
+20002170:       |         00004517              auipc   a0,0x4
+20002174:       |         8d150513              addi    a0,a0,-1839 # 20005a41 <manage_flow_control.log_fields.85+0x125>
+20002178:       |         0dd000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+2000217c:       |         01c45513              srli    a0,s0,0x1c
+20002180:       |         00153513              seqz    a0,a0
+20002184:       |         10020bb7              lui     s7,0x10020
+20002188:       |         fffb8593              addi    a1,s7,-1 # 1001ffff <_exception_frame_start+0x7f>
+2000218c:       |         0085b5b3              sltu    a1,a1,s0
+20002190:       |         8d4d                  or      a0,a0,a1
+20002192:       +-------- e529                  bnez    a0,200021dc <ottf_generic_fault_print+0xf6>
+20002194:       |         07cb0493              addi    s1,s6,124
+20002198:       |         ffffe517              auipc   a0,0xffffe
+2000219c:       |         26850c13              addi    s8,a0,616 # 20000400 <_ottf_interrupt_vector>
+200021a0:       |         00002517              auipc   a0,0x2
+200021a4:       |         1f050413              addi    s0,a0,496 # 20004390 <_text_end>
+200021a8:       |         00004517              auipc   a0,0x4
+200021ac:       |         8b150b13              addi    s6,a0,-1871 # 20005a59 <manage_flow_control.log_fields.85+0x13d>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:92
+      uint32_t val = *sp;
+200021b0:       |  /----> ffc4a583              lw      a1,-4(s1)
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:93
+      if (val >= text_start && val < text_end) {
+200021b4:       |  |      0185b533              sltu    a0,a1,s8
+200021b8:       |  |      0085b633              sltu    a2,a1,s0
+200021bc:       |  |      00164613              xori    a2,a2,1
+200021c0:       |  |      8d51                  or      a0,a0,a2
+200021c2:       |  |  /-- e501                  bnez    a0,200021ca <ottf_generic_fault_print+0xe4>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:94
+        base_printf("    %08x\n", val);
+200021c4:       |  |  |   855a                  mv      a0,s6
+200021c6:       |  |  |   08f000ef              jal     ra,20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:91
+    for (; sp >= ram_start && sp < ram_end; ++sp) {
+200021ca:       |  |  \-> 01c4d513              srli    a0,s1,0x1c
+200021ce:       |  |      00a03533              snez    a0,a0
+200021d2:       |  |      0174b5b3              sltu    a1,s1,s7
+200021d6:       |  |      8d6d                  and     a0,a0,a1
+200021d8:       |  |      0491                  addi    s1,s1,4
+200021da:       |  \----- f979                  bnez    a0,200021b0 <ottf_generic_fault_print+0xca>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:98
+      }
+    }
+  }
+  LOG_ERROR("FAULT: %s. MCAUSE=%08x MEPC=%08x MTVAL=%08x", reason, mcause, mepc,
+200021dc:       \-------> 00004517              auipc   a0,0x4
+200021e0:                 0e852503              lw      a0,232(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+200021e4:             /-- c91d                  beqz    a0,2000221a <ottf_generic_fault_print+0x134>
+200021e6:             |   e000e517              auipc   a0,0xe000e
+200021ea:             |   e1a50513              addi    a0,a0,-486 # 10000 <_chip_info_end>
+200021ee:             |   43c00593              li      a1,1084
+200021f2:             |   952e                  add     a0,a0,a1
+200021f4:             |   4591                  li      a1,4
+200021f6:             |   864e                  mv      a2,s3
+200021f8:             |   86ca                  mv      a3,s2
+200021fa:             |   8752                  mv      a4,s4
+200021fc:             |   87d6                  mv      a5,s5
+200021fe:             |   50b2                  lw      ra,44(sp)
+20002200:             |   5422                  lw      s0,40(sp)
+20002202:             |   5492                  lw      s1,36(sp)
+20002204:             |   5902                  lw      s2,32(sp)
+20002206:             |   49f2                  lw      s3,28(sp)
+20002208:             |   4a62                  lw      s4,24(sp)
+2000220a:             |   4ad2                  lw      s5,20(sp)
+2000220c:             |   4b42                  lw      s6,16(sp)
+2000220e:             |   4bb2                  lw      s7,12(sp)
+20002210:             |   4c22                  lw      s8,8(sp)
+20002212:             |   4c92                  lw      s9,4(sp)
+20002214:             |   4d02                  lw      s10,0(sp)
+20002216:             |   6145                  addi    sp,sp,48
+20002218:             |   a3e5                  j       20002800 <base_log_internal_dv>
+2000221a:             \-> 00004517              auipc   a0,0x4
+2000221e:                 b9250513              addi    a0,a0,-1134 # 20005dac <ottf_generic_fault_print.log_fields>
+20002222:                 85ce                  mv      a1,s3
+20002224:                 864a                  mv      a2,s2
+20002226:                 86d2                  mv      a3,s4
+20002228:                 8756                  mv      a4,s5
+2000222a:                 50b2                  lw      ra,44(sp)
+2000222c:                 5422                  lw      s0,40(sp)
+2000222e:                 5492                  lw      s1,36(sp)
+20002230:                 5902                  lw      s2,32(sp)
+20002232:                 49f2                  lw      s3,28(sp)
+20002234:                 4a62                  lw      s4,24(sp)
+20002236:                 4ad2                  lw      s5,20(sp)
+20002238:                 4b42                  lw      s6,16(sp)
+2000223a:                 4bb2                  lw      s7,12(sp)
+2000223c:                 4c22                  lw      s8,8(sp)
+2000223e:                 4c92                  lw      s9,4(sp)
+20002240:                 4d02                  lw      s10,0(sp)
+20002242:                 6145                  addi    sp,sp,48
+20002244:                 a305                  j       20002764 <base_log_internal_core>
+
+20002246 <ottf_exception_handler>:
+ottf_exception_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:119
+ */
+OT_WEAK
+void *pxCurrentTCB = NULL;
+
+OT_WEAK
+void ottf_exception_handler(uint32_t *exc_info) {
+20002246:           1141                        addi    sp,sp,-16
+20002248:           c606                        sw      ra,12(sp)
+2000224a:           c422                        sw      s0,8(sp)
+2000224c:           842a                        mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:120
+  uint32_t mcause = ibex_mcause_read();
+2000224e:           2311                        jal     20002752 <ibex_mcause_read>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:122
+
+  switch ((ibex_exc_t)(mcause & kIbexExcMax)) {
+20002250:           897d                        andi    a0,a0,31
+20002252:           45ad                        li      a1,11
+20002254:       /-- 04a5ee63            bltu    a1,a0,200022b0 <ottf_exception_handler+0x6a>
+20002258:       |   00003597            auipc   a1,0x3
+2000225c:       |   78c58593            addi    a1,a1,1932 # 200059e4 <manage_flow_control.log_fields.85+0xc8>
+20002260:       |   20b54533            sh2add  a0,a0,a1
+20002264:       |   4108                        lw      a0,0(a0)
+20002266:       |   8502                        jr      a0
+20002268:       |   8522                        mv      a0,s0
+2000226a:       |   40b2                        lw      ra,12(sp)
+2000226c:       |   4422                        lw      s0,8(sp)
+2000226e:       |   0141                        addi    sp,sp,16
+20002270:       |   a091                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:124
+    case kIbexExcInstrMisaligned:
+      ottf_instr_misaligned_fault_handler(exc_info);
+20002272:       |   8522                        mv      a0,s0
+20002274:       |   40b2                        lw      ra,12(sp)
+20002276:       |   4422                        lw      s0,8(sp)
+20002278:       |   0141                        addi    sp,sp,16
+2000227a:       |   a82d                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:127
+      break;
+    case kIbexExcInstrAccessFault:
+      ottf_instr_access_fault_handler(exc_info);
+2000227c:       |   8522                        mv      a0,s0
+2000227e:       |   40b2                        lw      ra,12(sp)
+20002280:       |   4422                        lw      s0,8(sp)
+20002282:       |   0141                        addi    sp,sp,16
+20002284:       |   a805                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:130
+      break;
+    case kIbexExcIllegalInstrFault:
+      ottf_illegal_instr_fault_handler(exc_info);
+20002286:       |   8522                        mv      a0,s0
+20002288:       |   40b2                        lw      ra,12(sp)
+2000228a:       |   4422                        lw      s0,8(sp)
+2000228c:       |   0141                        addi    sp,sp,16
+2000228e:       |   a01d                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:133
+      break;
+    case kIbexExcBreakpoint:
+      ottf_breakpoint_handler(exc_info);
+20002290:       |   8522                        mv      a0,s0
+20002292:       |   40b2                        lw      ra,12(sp)
+20002294:       |   4422                        lw      s0,8(sp)
+20002296:       |   0141                        addi    sp,sp,16
+20002298:       |   a831                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:145
+      break;
+    case kIbexExcMachineECall:
+      ottf_machine_ecall_handler(exc_info);
+      break;
+    case kIbexExcUserECall:
+      ottf_user_ecall_handler(exc_info);
+2000229a:       |   8522                        mv      a0,s0
+2000229c:       |   40b2                        lw      ra,12(sp)
+2000229e:       |   4422                        lw      s0,8(sp)
+200022a0:       |   0141                        addi    sp,sp,16
+200022a2:       |   a809                        j       200022b4 <ottf_breakpoint_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:142
+      ottf_machine_ecall_handler(exc_info);
+200022a4:       |   8522                        mv      a0,s0
+200022a6:       |   40b2                        lw      ra,12(sp)
+200022a8:       |   4422                        lw      s0,8(sp)
+200022aa:       |   0141                        addi    sp,sp,16
+200022ac:       |   81ffe06f            j       20000aca <ottf_machine_ecall_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:148
+      break;
+    default:
+      generic_fault_handler(exc_info);
+200022b0:       \-> 8522                        mv      a0,s0
+200022b2:           2009                        jal     200022b4 <ottf_breakpoint_handler>
+
+200022b4 <ottf_breakpoint_handler>:
+generic_fault_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:102
+static void generic_fault_handler(uint32_t *exc_info) {
+200022b4:       1141                    addi    sp,sp,-16
+200022b6:       c606                    sw      ra,12(sp)
+200022b8:       c422                    sw      s0,8(sp)
+200022ba:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:103
+  uint32_t mcause = ibex_mcause_read();
+200022bc:       2959                    jal     20002752 <ibex_mcause_read>
+200022be:       862a                    mv      a2,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:104
+  ottf_generic_fault_print(exc_info, exception_reason[mcause & kIbexExcMax],
+200022c0:       897d                    andi    a0,a0,31
+200022c2:       00004597                auipc   a1,0x4
+200022c6:       b2658593                addi    a1,a1,-1242 # 20005de8 <exception_reason>
+200022ca:       20b54533                sh2add  a0,a0,a1
+200022ce:       410c                    lw      a1,0(a0)
+200022d0:       8522                    mv      a0,s0
+200022d2:       3d11                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:106
+  abort();
+200022d4:       29a5                    jal     2000274c <abort>
+
+200022d6 <ottf_software_isr>:
+ottf_software_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:181
+OT_WEAK
+OT_ALIAS("generic_fault_handler")
+void ottf_user_ecall_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_software_isr(uint32_t *exc_info) {
+200022d6:       1141                    addi    sp,sp,-16
+200022d8:       c606                    sw      ra,12(sp)
+200022da:       c422                    sw      s0,8(sp)
+200022dc:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:182
+  ottf_generic_fault_print(exc_info, "Software IRQ", ibex_mcause_read());
+200022de:       2995                    jal     20002752 <ibex_mcause_read>
+200022e0:       862a                    mv      a2,a0
+200022e2:       00003517                auipc   a0,0x3
+200022e6:       7de50593                addi    a1,a0,2014 # 20005ac0 <manage_flow_control.log_fields.85+0x1a4>
+200022ea:       8522                    mv      a0,s0
+200022ec:       3bed                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:183
+  abort();
+200022ee:       29b9                    jal     2000274c <abort>
+
+200022f0 <ottf_timer_isr>:
+ottf_timer_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:187
+}
+
+OT_WEAK
+void ottf_timer_isr(uint32_t *exc_info) {
+200022f0:       1141                    addi    sp,sp,-16
+200022f2:       c606                    sw      ra,12(sp)
+200022f4:       c422                    sw      s0,8(sp)
+200022f6:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:188
+  ottf_generic_fault_print(exc_info, "Timer IRQ", ibex_mcause_read());
+200022f8:       29a9                    jal     20002752 <ibex_mcause_read>
+200022fa:       862a                    mv      a2,a0
+200022fc:       00003517                auipc   a0,0x3
+20002300:       7d150593                addi    a1,a0,2001 # 20005acd <manage_flow_control.log_fields.85+0x1b1>
+20002304:       8522                    mv      a0,s0
+20002306:       33c5                    jal     200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:189
+  abort();
+20002308:       2191                    jal     2000274c <abort>
+
+2000230a <ottf_external_isr>:
+ottf_external_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:196
+
+OT_WEAK
+bool ottf_console_flow_control_isr(uint32_t *exc_info) { return false; }
+
+OT_WEAK
+void ottf_external_isr(uint32_t *exc_info) {
+2000230a:                    1141                       addi    sp,sp,-16
+2000230c:                    c606                       sw      ra,12(sp)
+2000230e:                    c422                       sw      s0,8(sp)
+20002310:                    c226                       sw      s1,4(sp)
+20002312:                    842a                       mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:199
+  const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+  dif_rv_plic_irq_id_t plic_irq_id;
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&ottf_plic, kPlicTarget, &plic_irq_id));
+20002314:                    f0000517           auipc   a0,0xf0000
+20002318:                    d8050513           addi    a0,a0,-640 # 10002094 <ottf_plic>
+2000231c:                    860a                       mv      a2,sp
+2000231e:                    4581                       li      a1,0
+20002320:                    2ae1                       jal     200024f8 <dif_rv_plic_irq_claim>
+20002322:                    00004497           auipc   s1,0x4
+20002326:          /-------- c90d                       beqz    a0,20002358 <ottf_external_isr+0x4e>
+20002328:          |         862a                       mv      a2,a0
+2000232a:          |         fa24a503           lw      a0,-94(s1) # 200062c4 <kDeviceLogBypassUartAddress>
+2000232e:          |  /----- c919                       beqz    a0,20002344 <ottf_external_isr+0x3a>
+20002330:          |  |      e000e517           auipc   a0,0xe000e
+20002334:          |  |      cd050513           addi    a0,a0,-816 # 10000 <_chip_info_end>
+20002338:          |  |      45000593           li      a1,1104
+2000233c:          |  |      952e                       add     a0,a0,a1
+2000233e:          |  |      4585                       li      a1,1
+20002340:          |  |      21c1                       jal     20002800 <base_log_internal_dv>
+20002342:          |  |  /-- a039                       j       20002350 <ottf_external_isr+0x46>
+20002344:          |  \--|-> 00004517           auipc   a0,0x4
+20002348:          |     |   a7c50513           addi    a0,a0,-1412 # 20005dc0 <ottf_external_isr.log_fields>
+2000234c:          |     |   85b2                       mv      a1,a2
+2000234e:          |     |   2919                       jal     20002764 <base_log_internal_core>
+20002350:          |     \-> 6531                       lui     a0,0xc
+20002352:          |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+20002356:          |         24d1                       jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:202
+
+  top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
+      top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id];
+20002358:          \-------> 4502                       lw      a0,0(sp)
+2000235a:                    00004597           auipc   a1,0x4
+2000235e:                    f6e58593           addi    a1,a1,-146 # 200062c8 <top_earlgrey_plic_interrupt_for_peripheral>
+20002362:                    20b54533           sh2add  a0,a0,a1
+20002366:                    4108                       lw      a0,0(a0)
+20002368:                    4585                       li      a1,1
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+2000236a:       /----------- 04b51b63           bne     a0,a1,200023c0 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:205
+      ottf_console_flow_control_isr(exc_info)) {
+2000236e:       |            8522                       mv      a0,s0
+20002370:       |            eb4ff0ef           jal     ra,20001a24 <ottf_console_flow_control_isr>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:204
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+20002374:       +----------- c531                       beqz    a0,200023c0 <ottf_external_isr+0xb6>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:207
+    // Complete the IRQ at PLIC.
+    CHECK_DIF_OK(
+20002376:       |            4602                       lw      a2,0(sp)
+20002378:       |            f0000517           auipc   a0,0xf0000
+2000237c:       |            d1c50513           addi    a0,a0,-740 # 10002094 <ottf_plic>
+20002380:       |            4581                       li      a1,0
+20002382:       |            2a71                       jal     2000251e <dif_rv_plic_irq_complete>
+20002384:       |  /-------- c90d                       beqz    a0,200023b6 <ottf_external_isr+0xac>
+20002386:       |  |         862a                       mv      a2,a0
+20002388:       |  |         fa24a503           lw      a0,-94(s1)
+2000238c:       |  |  /----- c919                       beqz    a0,200023a2 <ottf_external_isr+0x98>
+2000238e:       |  |  |      e000e517           auipc   a0,0xe000e
+20002392:       |  |  |      c7250513           addi    a0,a0,-910 # 10000 <_chip_info_end>
+20002396:       |  |  |      46400593           li      a1,1124
+2000239a:       |  |  |      952e                       add     a0,a0,a1
+2000239c:       |  |  |      4585                       li      a1,1
+2000239e:       |  |  |      218d                       jal     20002800 <base_log_internal_dv>
+200023a0:       |  |  |  /-- a039                       j       200023ae <ottf_external_isr+0xa4>
+200023a2:       |  |  \--|-> 00004517           auipc   a0,0x4
+200023a6:       |  |     |   a3250513           addi    a0,a0,-1486 # 20005dd4 <ottf_external_isr.log_fields.12>
+200023aa:       |  |     |   85b2                       mv      a1,a2
+200023ac:       |  |     |   2e65                       jal     20002764 <base_log_internal_core>
+200023ae:       |  |     \-> 6531                       lui     a0,0xc
+200023b0:       |  |         aad50513           addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200023b4:       |  |         249d                       jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:214
+    return;
+  }
+
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+  abort();
+}
+200023b6:       |  \-------> 40b2                       lw      ra,12(sp)
+200023b8:       |            4422                       lw      s0,8(sp)
+200023ba:       |            4492                       lw      s1,4(sp)
+200023bc:       |            0141                       addi    sp,sp,16
+200023be:       |            8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:212
+  ottf_generic_fault_print(exc_info, "External IRQ", ibex_mcause_read());
+200023c0:       \----------> 2e49                       jal     20002752 <ibex_mcause_read>
+200023c2:                    862a                       mv      a2,a0
+200023c4:                    00003517           auipc   a0,0x3
+200023c8:                    7b950593           addi    a1,a0,1977 # 20005b7d <manage_flow_control.log_fields.85+0x261>
+200023cc:                    8522                       mv      a0,s0
+200023ce:                    d19ff0ef           jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:213
+  abort();
+200023d2:                    2ead                       jal     2000274c <abort>
+
+200023d4 <ottf_external_nmi_handler>:
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:216
+
+static void generic_internal_irq_handler(uint32_t *exc_info) {
+200023d4:       1141                    addi    sp,sp,-16
+200023d6:       c606                    sw      ra,12(sp)
+200023d8:       c422                    sw      s0,8(sp)
+200023da:       842a                    mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+200023dc:       2e9d                    jal     20002752 <ibex_mcause_read>
+200023de:       862a                    mv      a2,a0
+200023e0:       00004517                auipc   a0,0x4
+200023e4:       94750593                addi    a1,a0,-1721 # 20005d27 <manage_flow_control.log_fields.85+0x40b>
+200023e8:       8522                    mv      a0,s0
+200023ea:       cfdff0ef                jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+200023ee:       2eb9                    jal     2000274c <abort>
+
+200023f0 <ottf_internal_isr>:
+ottf_internal_isr():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:230
+OT_WEAK
+OT_ALIAS("generic_internal_irq_handler")
+void ottf_load_integrity_error_handler(uint32_t *exc_info);
+
+OT_WEAK
+void ottf_internal_isr(uint32_t *exc_info) {
+200023f0:              1141                     addi    sp,sp,-16
+200023f2:              c606                     sw      ra,12(sp)
+200023f4:              c422                     sw      s0,8(sp)
+200023f6:              842a                     mv      s0,a0
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:231
+  uint32_t mcause = ibex_mcause_read();
+200023f8:              2ea9                     jal     20002752 <ibex_mcause_read>
+200023fa:              800005b7                 lui     a1,0x80000
+200023fe:              05fd                     addi    a1,a1,31
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:232
+  switch ((ibex_internal_irq_t)(mcause)) {
+20002400:          /-- 00b50a63                 beq     a0,a1,20002414 <ottf_internal_isr+0x24>
+20002404:          |   5581                     li      a1,-32
+20002406:       /--|-- 00b51c63                 bne     a0,a1,2000241e <ottf_internal_isr+0x2e>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:234
+    case kIbexInternalIrqLoadInteg:
+      ottf_load_integrity_error_handler(exc_info);
+2000240a:       |  |   8522                     mv      a0,s0
+2000240c:       |  |   40b2                     lw      ra,12(sp)
+2000240e:       |  |   4422                     lw      s0,8(sp)
+20002410:       |  |   0141                     addi    sp,sp,16
+20002412:       |  |   b7c9                     j       200023d4 <ottf_external_nmi_handler>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:237
+      break;
+    case kIbexInternalIrqNmi:
+      ottf_external_nmi_handler(exc_info);
+20002414:       |  \-> 8522                     mv      a0,s0
+20002416:       |      40b2                     lw      ra,12(sp)
+20002418:       |      4422                     lw      s0,8(sp)
+2000241a:       |      0141                     addi    sp,sp,16
+2000241c:       |      bf65                     j       200023d4 <ottf_external_nmi_handler>
+generic_internal_irq_handler():
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:217
+  ottf_generic_fault_print(exc_info, "Internal IRQ", ibex_mcause_read());
+2000241e:       \----> 2e15                     jal     20002752 <ibex_mcause_read>
+20002420:              862a                     mv      a2,a0
+20002422:              00004517                 auipc   a0,0x4
+20002426:              90550593                 addi    a1,a0,-1787 # 20005d27 <manage_flow_control.log_fields.85+0x40b>
+2000242a:              8522                     mv      a0,s0
+2000242c:              cbbff0ef                 jal     ra,200020e6 <ottf_generic_fault_print>
+/proc/self/cwd/sw/device/lib/testing/test_framework/ottf_isrs.c:218
+  abort();
+20002430:              2e31                     jal     2000274c <abort>
+
+20002432 <dif_rstmgr_init>:
+dif_rstmgr_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:18
+
+#include "rstmgr_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rstmgr_init(mmio_region_t base_addr, dif_rstmgr_t *rstmgr) {
+  if (rstmgr == NULL) {
+20002432:       /----- c581                     beqz    a1,2000243a <dif_rstmgr_init+0x8>
+20002434:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rstmgr->base_addr = base_addr;
+20002436:       |      c188                     sw      a0,0(a1)
+20002438:       |  /-- a011                     j       2000243c <dif_rstmgr_init+0xa>
+2000243a:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rstmgr_autogen.c:25
+
+  return kDifOk;
+}
+2000243c:          \-> 8532                     mv      a0,a2
+2000243e:              8082                     ret
+
+20002440 <dif_rstmgr_reset_info_clear>:
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:171
+
+  return kDifOk;
+}
+
+dif_result_t dif_rstmgr_reset_info_clear(const dif_rstmgr_t *handle) {
+  if (handle == NULL) {
+20002440:       /-- c511                        beqz    a0,2000244c <dif_rstmgr_reset_info_clear+0xc>
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:175
+    return kDifBadArg;
+  }
+
+  mmio_region_t base_addr = handle->base_addr;
+20002442:       |   410c                        lw      a1,0(a0)
+20002444:       |   4501                        li      a0,0
+20002446:       |   567d                        li      a2,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20002448:       |   c590                        sw      a2,8(a1)
+dif_rstmgr_reset_info_clear():
+/proc/self/cwd/sw/device/lib/dif/dif_rstmgr.c:180
+
+  rstmgr_reset_info_clear(base_addr);
+
+  return kDifOk;
+}
+2000244a:       |   8082                        ret
+2000244c:       \-> 450d                        li      a0,3
+2000244e:           8082                        ret
+
+20002450 <dif_rv_plic_init>:
+dif_rv_plic_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:18
+
+#include "rv_plic_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_plic_init(mmio_region_t base_addr, dif_rv_plic_t *rv_plic) {
+  if (rv_plic == NULL) {
+20002450:       /----- c581                     beqz    a1,20002458 <dif_rv_plic_init+0x8>
+20002452:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:22
+    return kDifBadArg;
+  }
+
+  rv_plic->base_addr = base_addr;
+20002454:       |      c188                     sw      a0,0(a1)
+20002456:       |  /-- a011                     j       2000245a <dif_rv_plic_init+0xa>
+20002458:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_plic_autogen.c:25
+
+  return kDifOk;
+}
+2000245a:          \-> 8532                     mv      a0,a2
+2000245c:              8082                     ret
+
+2000245e <dif_rv_plic_irq_set_enabled>:
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:174
+
+dif_result_t dif_rv_plic_irq_set_enabled(const dif_rv_plic_t *plic,
+                                         dif_rv_plic_irq_id_t irq,
+                                         dif_rv_plic_target_t target,
+                                         dif_toggle_t state) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+2000245e:           00153713            seqz    a4,a0
+20002462:           0ba5b793            sltiu   a5,a1,186
+20002466:           0017c793            xori    a5,a5,1
+2000246a:           00c03633            snez    a2,a2
+2000246e:           8e59                        or      a2,a2,a4
+20002470:           8e5d                        or      a2,a2,a5
+20002472:           0026b713            sltiu   a4,a3,2
+20002476:           00174713            xori    a4,a4,1
+2000247a:           8f51                        or      a4,a4,a2
+2000247c:           460d                        li      a2,3
+2000247e:       /-- e315                        bnez    a4,200024a2 <dif_rv_plic_irq_set_enabled+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:193
+      return kDifBadArg;
+  }
+
+  plic_reg_info_t reg_info = plic_irq_enable_reg_info(irq, target);
+
+  uint32_t reg = mmio_region_read32(plic->base_addr, reg_info.offset);
+20002480:       |   4108                        lw      a0,0(a0)
+plic_irq_enable_reg_info():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:92
+      .offset = plic_irq_enable_base_for_target(target) + offset,
+20002482:       |   0035d613            srli    a2,a1,0x3
+20002486:       |   28d61613            bseti   a2,a2,0xd
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000248a:       |   9a71                        andi    a2,a2,-4
+2000248c:       |   9532                        add     a0,a0,a2
+2000248e:       |   4118                        lw      a4,0(a0)
+20002490:       |   4601                        li      a2,0
+plic_irq_bit_index():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:51
+  return irq % RV_PLIC_PARAM_REG_WIDTH;
+20002492:       |   01f5f793            andi    a5,a1,31
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20002496:       |   48f71733            bclr    a4,a4,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000249a:       |   00b695b3            sll     a1,a3,a1
+2000249e:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200024a0:       |   c10c                        sw      a1,0(a0)
+dif_rv_plic_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:198
+  reg = bitfield_bit32_write(reg, reg_info.bit_index, flag);
+  mmio_region_write32(plic->base_addr, reg_info.offset, reg);
+
+  return kDifOk;
+}
+200024a2:       \-> 8532                        mv      a0,a2
+200024a4:           8082                        ret
+
+200024a6 <dif_rv_plic_irq_set_priority>:
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:203
+
+dif_result_t dif_rv_plic_irq_set_priority(const dif_rv_plic_t *plic,
+                                          dif_rv_plic_irq_id_t irq,
+                                          uint32_t priority) {
+  if (plic == NULL || irq >= RV_PLIC_PARAM_NUM_SRC ||
+200024a6:           00153693            seqz    a3,a0
+200024aa:           0ba5b713            sltiu   a4,a1,186
+200024ae:           00174713            xori    a4,a4,1
+200024b2:           8ed9                        or      a3,a3,a4
+200024b4:           00463713            sltiu   a4,a2,4
+200024b8:           00174713            xori    a4,a4,1
+200024bc:           8f55                        or      a4,a4,a3
+200024be:           468d                        li      a3,3
+200024c0:       /-- e711                        bnez    a4,200024cc <dif_rv_plic_irq_set_priority+0x26>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:209
+      priority > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t offset = plic_priority_reg_offset(irq);
+  mmio_region_write32(plic->base_addr, offset, priority);
+200024c2:       |   4108                        lw      a0,0(a0)
+200024c4:       |   4681                        li      a3,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200024c6:       |   20a5c533            sh2add  a0,a1,a0
+200024ca:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_irq_set_priority():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:212
+
+  return kDifOk;
+}
+200024cc:       \-> 8536                        mv      a0,a3
+200024ce:           8082                        ret
+
+200024d0 <dif_rv_plic_target_set_threshold>:
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:217
+
+dif_result_t dif_rv_plic_target_set_threshold(const dif_rv_plic_t *plic,
+                                              dif_rv_plic_target_t target,
+                                              uint32_t threshold) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+200024d0:           00153693            seqz    a3,a0
+200024d4:           00b035b3            snez    a1,a1
+200024d8:           8dd5                        or      a1,a1,a3
+200024da:           00463693            sltiu   a3,a2,4
+200024de:           0016c693            xori    a3,a3,1
+200024e2:           8ecd                        or      a3,a3,a1
+200024e4:           458d                        li      a1,3
+200024e6:       /-- e699                        bnez    a3,200024f4 <dif_rv_plic_target_set_threshold+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:223
+      threshold > kDifRvPlicMaxPriority) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t threshold_offset = plic_threshold_base_for_target(target);
+  mmio_region_write32(plic->base_addr, threshold_offset, threshold);
+200024e8:       |   4108                        lw      a0,0(a0)
+200024ea:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200024ec:       |   002006b7            lui     a3,0x200
+200024f0:       |   9536                        add     a0,a0,a3
+200024f2:       |   c110                        sw      a2,0(a0)
+dif_rv_plic_target_set_threshold():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:226
+
+  return kDifOk;
+}
+200024f4:       \-> 852e                        mv      a0,a1
+200024f6:           8082                        ret
+
+200024f8 <dif_rv_plic_irq_claim>:
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:245
+}
+
+dif_result_t dif_rv_plic_irq_claim(const dif_rv_plic_t *plic,
+                                   dif_rv_plic_target_t target,
+                                   dif_rv_plic_irq_id_t *claim_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET ||
+200024f8:           00153693            seqz    a3,a0
+200024fc:           00b035b3            snez    a1,a1
+20002500:           8dd5                        or      a1,a1,a3
+20002502:           00163693            seqz    a3,a2
+20002506:           8ecd                        or      a3,a3,a1
+20002508:           458d                        li      a1,3
+2000250a:       /-- ea81                        bnez    a3,2000251a <dif_rv_plic_irq_claim+0x22>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+      claim_data == NULL) {
+    return kDifBadArg;
+  }
+
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  *claim_data = mmio_region_read32(plic->base_addr, claim_complete_reg);
+2000250c:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000250e:       |   002005b7            lui     a1,0x200
+20002512:       |   952e                        add     a0,a0,a1
+20002514:       |   4148                        lw      a0,4(a0)
+20002516:       |   4581                        li      a1,0
+dif_rv_plic_irq_claim():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:251
+20002518:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:254
+
+  return kDifOk;
+}
+2000251a:       \-> 852e                        mv      a0,a1
+2000251c:           8082                        ret
+
+2000251e <dif_rv_plic_irq_complete>:
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:259
+
+dif_result_t dif_rv_plic_irq_complete(const dif_rv_plic_t *plic,
+                                      dif_rv_plic_target_t target,
+                                      dif_rv_plic_irq_id_t complete_data) {
+  if (plic == NULL || target >= RV_PLIC_PARAM_NUM_TARGET) {
+2000251e:           00153693            seqz    a3,a0
+20002522:           00b035b3            snez    a1,a1
+20002526:           8ecd                        or      a3,a3,a1
+20002528:           458d                        li      a1,3
+2000252a:       /-- e699                        bnez    a3,20002538 <dif_rv_plic_irq_complete+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:266
+  }
+
+  // Write back the claimed IRQ ID to the target specific CC register,
+  // to notify the PLIC of the IRQ completion.
+  ptrdiff_t claim_complete_reg = plic_claim_complete_base_for_target(target);
+  mmio_region_write32(plic->base_addr, claim_complete_reg, complete_data);
+2000252c:       |   4108                        lw      a0,0(a0)
+2000252e:       |   4581                        li      a1,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20002530:       |   002006b7            lui     a3,0x200
+20002534:       |   9536                        add     a0,a0,a3
+20002536:       |   c150                        sw      a2,4(a0)
+dif_rv_plic_irq_complete():
+/proc/self/cwd/sw/device/lib/dif/dif_rv_plic.c:269
+
+  return kDifOk;
+}
+20002538:       \-> 852e                        mv      a0,a1
+2000253a:           8082                        ret
+
+2000253c <rand_testutils_init>:
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:31
+/**
+ * The default timeout in usecs for fetching data from the entropy source.
+ */
+static const uint32_t kEntropyFetchTimeoutMicros = 100000;
+
+rand_testutils_rng_t rand_testutils_init(dif_rv_core_ibex_t *rv_core_ibex) {
+2000253c:                 1101                  addi    sp,sp,-32
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+  CHECK(rv_core_ibex != NULL);
+2000253e:                 ce06                  sw      ra,28(sp)
+20002540:                 cc22                  sw      s0,24(sp)
+20002542:                 ca26                  sw      s1,20(sp)
+20002544:                 c84a                  sw      s2,16(sp)
+20002546:                 00004617              auipc   a2,0x4
+2000254a:                 baa62483              lw      s1,-1110(a2) # 200060f0 <MODULE_ID>
+2000254e:                 892e                  mv      s2,a1
+20002550:                 842a                  mv      s0,a0
+20002552:                 00004517              auipc   a0,0x4
+20002556:                 91e50613              addi    a2,a0,-1762 # 20005e70 <kDifRvPlicMaxPriority+0x4>
+2000255a:                 4501                  li      a0,0
+2000255c:                 85a6                  mv      a1,s1
+2000255e:                 4681                  li      a3,0
+20002560:                 4bd000ef              jal     ra,2000321c <status_create>
+20002564:                 012035b3              snez    a1,s2
+20002568:                 00b107a3              sb      a1,15(sp)
+2000256c:                 00f14583              lbu     a1,15(sp)
+20002570:       /-------- ed9d                  bnez    a1,200025ae <rand_testutils_init+0x72>
+20002572:       |         00004517              auipc   a0,0x4
+20002576:       |         d5252503              lw      a0,-686(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000257a:       |  /----- c919                  beqz    a0,20002590 <rand_testutils_init+0x54>
+2000257c:       |  |      e000e517              auipc   a0,0xe000e
+20002580:       |  |      a8450513              addi    a0,a0,-1404 # 10000 <_chip_info_end>
+20002584:       |  |      47800593              li      a1,1144
+20002588:       |  |      952e                  add     a0,a0,a1
+2000258a:       |  |      4581                  li      a1,0
+2000258c:       |  |      2c95                  jal     20002800 <base_log_internal_dv>
+2000258e:       |  |  /-- a031                  j       2000259a <rand_testutils_init+0x5e>
+20002590:       |  \--|-> 00004517              auipc   a0,0x4
+20002594:       |     |   97050513              addi    a0,a0,-1680 # 20005f00 <rand_testutils_init.log_fields>
+20002598:       |     |   22f1                  jal     20002764 <base_log_internal_core>
+2000259a:       |     \-> 00004517              auipc   a0,0x4
+2000259e:       |         8d650613              addi    a2,a0,-1834 # 20005e70 <kDifRvPlicMaxPriority+0x4>
+200025a2:       |         4535                  li      a0,13
+200025a4:       |         02000693              li      a3,32
+200025a8:       |         85a6                  mv      a1,s1
+200025aa:       |         473000ef              jal     ra,2000321c <status_create>
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200025ae:       \-------> 00052593              slti    a1,a0,0
+200025b2:                 897d                  andi    a0,a0,31
+rand_testutils_init():
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:32
+200025b4:                 00a03533              snez    a0,a0
+200025b8:                 8d6d                  and     a0,a0,a1
+200025ba:             /-- c509                  beqz    a0,200025c4 <rand_testutils_init+0x88>
+200025bc:             |   6531                  lui     a0,0xc
+200025be:             |   aad50513              addi    a0,a0,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200025c2:             |   28a1                  jal     2000261a <test_status_set>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  // For the simulation platforms (DV and Verilator), the LFSR reseed frequency
+  // is arbitrarily set to 255. The test may choose to update this value if
+  // needed.
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+200025c4:             \-> 01242023              sw      s2,0(s0)
+200025c8:                 6561                  lui     a0,0x18
+200025ca:                 6a050513              addi    a0,a0,1696 # 186a0 <_chip_info_end+0x86a0>
+200025ce:                 c048                  sw      a0,4(s0)
+200025d0:                 deadc537              lui     a0,0xdeadc
+200025d4:                 eef50513              addi    a0,a0,-273 # deadbeef <_non_volatile_scratch_end+0xbea5beef>
+200025d8:                 c408                  sw      a0,8(s0)
+200025da:                 80000537              lui     a0,0x80000
+200025de:                 05750513              addi    a0,a0,87 # 80000057 <_non_volatile_scratch_end+0x5ff80057>
+200025e2:                 c448                  sw      a0,12(s0)
+200025e4:                 10000513              li      a0,256
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+      .polynomial_coefficients = kLfsrPolynomialCoefficients,
+      .reseed_frequency = 256,
+      .op_counter = UINT32_MAX};
+  // For non-runtime-sensitive simulations (for example, using FPGA or the
+  // debug board), always fetch random data from the hardware.
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+200025e8:                 00004597              auipc   a1,0x4
+200025ec:                 cc45a583              lw      a1,-828(a1) # 200062ac <kDeviceType>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:36
+  rand_testutils_rng_t ctx = (rand_testutils_rng_t){
+200025f0:                 c808                  sw      a0,16(s0)
+200025f2:                 557d                  li      a0,-1
+200025f4:                 4609                  li      a2,2
+200025f6:                 c848                  sw      a0,20(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:45
+  if (kDeviceType != kDeviceSimDV && kDeviceType != kDeviceSimVerilator) {
+200025f8:             /-- 00c5e463              bltu    a1,a2,20002600 <rand_testutils_init+0xc4>
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:46
+    ctx.reseed_frequency = 0;
+200025fc:             |   00042823              sw      zero,16(s0)
+/proc/self/cwd/sw/device/lib/testing/rand_testutils.c:48
+  }
+  return ctx;
+20002600:             \-> 40f2                  lw      ra,28(sp)
+20002602:                 4462                  lw      s0,24(sp)
+20002604:                 44d2                  lw      s1,20(sp)
+20002606:                 4942                  lw      s2,16(sp)
+20002608:                 6105                  addi    sp,sp,32
+2000260a:                 8082                  ret
+
+2000260c <dif_rv_core_ibex_init>:
+dif_rv_core_ibex_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:19
+#include "rv_core_ibex_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_rv_core_ibex_init(mmio_region_t base_addr,
+                                   dif_rv_core_ibex_t *rv_core_ibex) {
+  if (rv_core_ibex == NULL) {
+2000260c:       /----- c581                     beqz    a1,20002614 <dif_rv_core_ibex_init+0x8>
+2000260e:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:23
+    return kDifBadArg;
+  }
+
+  rv_core_ibex->base_addr = base_addr;
+20002610:       |      c188                     sw      a0,0(a1)
+20002612:       |  /-- a011                     j       20002616 <dif_rv_core_ibex_init+0xa>
+20002614:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_rv_core_ibex_autogen.c:26
+
+  return kDifOk;
+}
+20002616:          \-> 8532                     mv      a0,a2
+20002618:              8082                     ret
+
+2000261a <test_status_set>:
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:25
+        mmio_region_from_addr(kDeviceTestStatusAddress);
+    mmio_region_write32(test_status_device_addr, 0x0, (uint32_t)test_status);
+  }
+}
+
+void test_status_set(test_status_t test_status) {
+2000261a:                    1141                       addi    sp,sp,-16
+2000261c:                    c606                       sw      ra,12(sp)
+2000261e:                    c422                       sw      s0,8(sp)
+20002620:                    65b1                       lui     a1,0xc
+20002622:                    aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:26
+  switch (test_status) {
+20002626:          /-------- 04b50763           beq     a0,a1,20002674 <test_status_set+0x5a>
+2000262a:          |         842a                       mv      s0,a0
+2000262c:          |         6525                       lui     a0,0x9
+2000262e:          |         0535                       addi    a0,a0,13
+20002630:       /--|-------- 04a40d63           beq     s0,a0,2000268a <test_status_set+0x70>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:40
+      test_status_device_write(test_status);
+      abort();
+      break;
+    }
+    default: {
+      LOG_INFO("test_status_set to 0x%x", test_status);
+20002634:       |  |         00004517           auipc   a0,0x4
+20002638:       |  |         c9052503           lw      a0,-880(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000263c:       |  |  /----- cd01                       beqz    a0,20002654 <test_status_set+0x3a>
+2000263e:       |  |  |      e000e517           auipc   a0,0xe000e
+20002642:       |  |  |      9c250513           addi    a0,a0,-1598 # 10000 <_chip_info_end>
+20002646:       |  |  |      50400593           li      a1,1284
+2000264a:       |  |  |      952e                       add     a0,a0,a1
+2000264c:       |  |  |      4585                       li      a1,1
+2000264e:       |  |  |      8622                       mv      a2,s0
+20002650:       |  |  |      2a45                       jal     20002800 <base_log_internal_dv>
+20002652:       |  |  |  /-- a039                       j       20002660 <test_status_set+0x46>
+20002654:       |  |  \--|-> 00004517           auipc   a0,0x4
+20002658:       |  |     |   93c50513           addi    a0,a0,-1732 # 20005f90 <test_status_set.log_fields.7>
+2000265c:       |  |     |   85a2                       mv      a1,s0
+2000265e:       |  |     |   2219                       jal     20002764 <base_log_internal_core>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+20002660:       |  |     \-> 00004517           auipc   a0,0x4
+20002664:       |  |         c6052503           lw      a0,-928(a0) # 200062c0 <kDeviceTestStatusAddress>
+20002668:       |  |     /-- c111                       beqz    a0,2000266c <test_status_set+0x52>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000266a:       |  |     |   c100                       sw      s0,0(a0)
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:45
+      test_status_device_write(test_status);
+      break;
+    }
+  }
+}
+2000266c:       |  |     \-> 40b2                       lw      ra,12(sp)
+2000266e:       |  |         4422                       lw      s0,8(sp)
+20002670:       |  |         0141                       addi    sp,sp,16
+20002672:       |  |         8082                       ret
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+20002674:       |  \-------> 00004517           auipc   a0,0x4
+20002678:       |            c5052503           lw      a0,-944(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+2000267c:       |        /-- e115                       bnez    a0,200026a0 <test_status_set+0x86>
+2000267e:       |        |   00004517           auipc   a0,0x4
+20002682:       |        |   8fe50513           addi    a0,a0,-1794 # 20005f7c <test_status_set.log_fields.4>
+20002686:       |        |   28f9                       jal     20002764 <base_log_internal_core>
+20002688:       |     /--|-- a02d                       j       200026b2 <test_status_set+0x98>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+2000268a:       \-----|--|-> 00004517           auipc   a0,0x4
+2000268e:             |  |   c3a52503           lw      a0,-966(a0) # 200062c4 <kDeviceLogBypassUartAddress>
+20002692:          /--|--|-- e90d                       bnez    a0,200026c4 <test_status_set+0xaa>
+20002694:          |  |  |   00004517           auipc   a0,0x4
+20002698:          |  |  |   8d450513           addi    a0,a0,-1836 # 20005f68 <test_status_set.log_fields>
+2000269c:          |  |  |   20e1                       jal     20002764 <base_log_internal_core>
+2000269e:       /--|--|--|-- a825                       j       200026d6 <test_status_set+0xbc>
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:34
+      LOG_INFO("FAIL!");
+200026a0:       |  |  |  \-> e000e517           auipc   a0,0xe000e
+200026a4:       |  |  |      96050513           addi    a0,a0,-1696 # 10000 <_chip_info_end>
+200026a8:       |  |  |      4f000593           li      a1,1264
+200026ac:       |  |  |      952e                       add     a0,a0,a1
+200026ae:       |  |  |      4581                       li      a1,0
+200026b0:       |  |  |      2a81                       jal     20002800 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026b2:       |  |  \----> 00004517           auipc   a0,0x4
+200026b6:       |  |         c0e52503           lw      a0,-1010(a0) # 200062c0 <kDeviceTestStatusAddress>
+200026ba:       |  |  /----- c515                       beqz    a0,200026e6 <test_status_set+0xcc>
+200026bc:       |  |  |      65b1                       lui     a1,0xc
+200026be:       |  |  |      aad58593           addi    a1,a1,-1363 # baad <_non_volatile_scratch_size+0x6aad>
+200026c2:       |  |  |  /-- a00d                       j       200026e4 <test_status_set+0xca>
+test_status_set():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:28
+      LOG_INFO("PASS!");
+200026c4:       |  \--|--|-> e000e517           auipc   a0,0xe000e
+200026c8:       |     |  |   93c50513           addi    a0,a0,-1732 # 10000 <_chip_info_end>
+200026cc:       |     |  |   4dc00593           li      a1,1244
+200026d0:       |     |  |   952e                       add     a0,a0,a1
+200026d2:       |     |  |   4581                       li      a1,0
+200026d4:       |     |  |   2235                       jal     20002800 <base_log_internal_dv>
+test_status_device_write():
+/proc/self/cwd/sw/device/lib/testing/test_framework/status.c:18
+  if (kDeviceTestStatusAddress != 0) {
+200026d6:       \-----|--|-> 00004517           auipc   a0,0x4
+200026da:             |  |   bea52503           lw      a0,-1046(a0) # 200062c0 <kDeviceTestStatusAddress>
+200026de:             +--|-- c501                       beqz    a0,200026e6 <test_status_set+0xcc>
+200026e0:             |  |   65a5                       lui     a1,0x9
+200026e2:             |  |   05b5                       addi    a1,a1,13
+200026e4:             |  \-> c10c                       sw      a1,0(a0)
+200026e6:             \----> 209d                       jal     2000274c <abort>
+
+200026e8 <busy_spin_micros>:
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:13
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/runtime/ibex.h"
+
+void busy_spin_micros(uint32_t usec) {
+200026e8:                 1141                  addi    sp,sp,-16
+200026ea:                 c606                  sw      ra,12(sp)
+200026ec:                 c422                  sw      s0,8(sp)
+200026ee:                 c226                  sw      s1,4(sp)
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+OT_WARN_UNUSED_RESULT
+inline uint64_t ibex_mcycle_read(void) {
+  uint32_t cycle_low = 0;
+  uint32_t cycle_high = 0;
+  uint32_t cycle_high_2 = 0;
+  asm volatile(
+200026f0:             /-> b8002473              csrr    s0,mcycleh
+200026f4:             |   b00024f3              csrr    s1,mcycle
+200026f8:             |   b80025f3              csrr    a1,mcycleh
+200026fc:             \-- feb41ae3              bne     s0,a1,200026f0 <busy_spin_micros+0x8>
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:15
+  uint64_t start = ibex_mcycle_read();
+  uint64_t cycles = to_cpu_cycles(usec);
+20002700:                 4581                  li      a1,0
+20002702:                 479010ef              jal     ra,2000437a <to_cpu_cycles>
+20002706:                 40900633              neg     a2,s1
+2000270a:                 009036b3              snez    a3,s1
+2000270e:                 40800733              neg     a4,s0
+20002712:                 40d706b3              sub     a3,a4,a3
+ibex_mcycle_read():
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:82
+20002716:       /-------> b8002473              csrr    s0,mcycleh
+2000271a:       |         b0002773              csrr    a4,mcycle
+2000271e:       |         b80024f3              csrr    s1,mcycleh
+20002722:       +-------- fe941ae3              bne     s0,s1,20002716 <busy_spin_micros+0x2e>
+/proc/self/cwd/./sw/device/lib/runtime/ibex.h:91
+      "  csrr %2, mcycleh;"  // Read `mcycleh` again.
+      "  bne  %0, %2, 1b;"   // Try again if `mcycle` overflowed before
+                             // reading `mcycleh`.
+      : "=r"(cycle_high), "=r"(cycle_low), "=r"(cycle_high_2)
+      :);
+  return (uint64_t)cycle_high << 32 | cycle_low;
+20002726:       |         9732                  add     a4,a4,a2
+20002728:       |         00c737b3              sltu    a5,a4,a2
+2000272c:       |         9436                  add     s0,s0,a3
+busy_spin_micros():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:16
+  while ((ibex_mcycle_read() - start) < cycles) {
+2000272e:       |         97a2                  add     a5,a5,s0
+20002730:       |  /----- 00b78663              beq     a5,a1,2000273c <busy_spin_micros+0x54>
+20002734:       |  |      00b7b733              sltu    a4,a5,a1
+20002738:       +--|----- ff79                  bnez    a4,20002716 <busy_spin_micros+0x2e>
+2000273a:       |  |  /-- a021                  j       20002742 <busy_spin_micros+0x5a>
+2000273c:       |  \--|-> 00a73733              sltu    a4,a4,a0
+20002740:       \-----|-- fb79                  bnez    a4,20002716 <busy_spin_micros+0x2e>
+/proc/self/cwd/sw/device/lib/runtime/hart.c:18
+  }
+}
+20002742:             \-> 40b2                  lw      ra,12(sp)
+20002744:                 4422                  lw      s0,8(sp)
+20002746:                 4492                  lw      s1,4(sp)
+20002748:                 0141                  addi    sp,sp,16
+2000274a:                 8082                  ret
+
+2000274c <abort>:
+wait_for_interrupt():
+/proc/self/cwd/./sw/device/lib/runtime/hart.h:29
+ *
+ * This function may behave as if it is a no-op.
+ */
+inline void wait_for_interrupt(void) {
+#ifdef OT_PLATFORM_RV32
+  asm volatile("wfi");
+2000274c:       /-> 10500073            wfi
+abort():
+/proc/self/cwd/sw/device/lib/runtime/hart.c:21
+
+noreturn void abort(void) {
+  while (true) {
+20002750:       \-- bff5                        j       2000274c <abort>
+
+20002752 <ibex_mcause_read>:
+ibex_mcause_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:11
+
+#include "sw/device/lib/base/csr.h"
+
+uint32_t ibex_mcause_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MCAUSE, &mtval);
+20002752:       34202573                csrr    a0,mcause
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:12
+  return mtval;
+20002756:       8082                    ret
+
+20002758 <ibex_mtval_read>:
+ibex_mtval_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:17
+}
+
+uint32_t ibex_mtval_read(void) {
+  uint32_t mtval;
+  CSR_READ(CSR_REG_MTVAL, &mtval);
+20002758:       34302573                csrr    a0,mtval
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:18
+  return mtval;
+2000275c:       8082                    ret
+
+2000275e <ibex_mepc_read>:
+ibex_mepc_read():
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:23
+}
+
+uint32_t ibex_mepc_read(void) {
+  uint32_t mepc;
+  CSR_READ(CSR_REG_MEPC, &mepc);
+2000275e:       34102573                csrr    a0,mepc
+/proc/self/cwd/sw/device/lib/runtime/ibex.c:24
+  return mepc;
+20002762:       8082                    ret
+
+20002764 <base_log_internal_core>:
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:47
+ * Logs `log` and the values that follow to stdout.
+ *
+ * @param log the log data to log.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_core(const log_fields_t *log, ...) {
+20002764:              7179                     addi    sp,sp,-48
+20002766:              c606                     sw      ra,12(sp)
+20002768:              c422                     sw      s0,8(sp)
+2000276a:              c226                     sw      s1,4(sp)
+2000276c:              842a                     mv      s0,a0
+2000276e:              d646                     sw      a7,44(sp)
+20002770:              d442                     sw      a6,40(sp)
+20002772:              d23e                     sw      a5,36(sp)
+20002774:              d03a                     sw      a4,32(sp)
+20002776:              ce36                     sw      a3,28(sp)
+20002778:              cc32                     sw      a2,24(sp)
+2000277a:              ca2e                     sw      a1,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+  size_t file_name_len =
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+2000277c:              4148                     lw      a0,4(a0)
+2000277e:              80000637                 lui     a2,0x80000
+20002782:              167d                     addi    a2,a2,-1
+20002784:              4581                     li      a1,0
+20002786:              1eb010ef                 jal     ra,20004170 <memchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:50
+               log->file_name);
+2000278a:              4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:49
+      (size_t)(((const char *)memchr(log->file_name, '\0', PTRDIFF_MAX)) -
+2000278c:              40d50633                 sub     a2,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/log.c:51
+  const char *base_name = memrchr(log->file_name, '/', file_name_len);
+20002790:              02f00593                 li      a1,47
+20002794:              8536                     mv      a0,a3
+20002796:              289010ef                 jal     ra,2000421e <memrchr>
+/proc/self/cwd/sw/device/lib/runtime/log.c:52
+  if (base_name == NULL) {
+2000279a:       /----- c501                     beqz    a0,200027a2 <base_log_internal_core+0x3e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:55
+    base_name = log->file_name;
+  } else {
+    ++base_name;  // Remove the final '/'.
+2000279c:       |      00150693                 addi    a3,a0,1
+200027a0:       |  /-- a011                     j       200027a4 <base_log_internal_core+0x40>
+/proc/self/cwd/sw/device/lib/runtime/log.c:53
+    base_name = log->file_name;
+200027a2:       \--|-> 4054                     lw      a3,4(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  // A small global counter that increments with each log line. This can be
+  // useful for seeing how many times this function has been called, even if
+  // nothing was printed for some time.
+  static uint16_t global_log_counter = 0;
+
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+200027a4:          \-> 4008                     lw      a0,0(s0)
+200027a6:              458d                     li      a1,3
+stringify_severity():
+/proc/self/cwd/sw/device/lib/runtime/log.c:27
+  switch (severity) {
+200027a8:       /----- 00a5ea63                 bltu    a1,a0,200027bc <base_log_internal_core+0x58>
+200027ac:       |      00004597                 auipc   a1,0x4
+200027b0:       |      81458593                 addi    a1,a1,-2028 # 20005fc0 <test_status_set.log_fields.7+0x30>
+200027b4:       |      20b54533                 sh2add  a0,a0,a1
+200027b8:       |      410c                     lw      a1,0(a0)
+200027ba:       |  /-- a029                     j       200027c4 <base_log_internal_core+0x60>
+200027bc:       \--|-> 00004517                 auipc   a0,0x4
+200027c0:          |   80050593                 addi    a1,a0,-2048 # 20005fbc <test_status_set.log_fields.7+0x2c>
+base_log_internal_core():
+/proc/self/cwd/sw/device/lib/runtime/log.c:64
+              global_log_counter, base_name, log->line);
+200027c4:          \-> f0000497                 auipc   s1,0xf0000
+200027c8:              8d44d603                 lhu     a2,-1836(s1) # 10002098 <base_log_internal_core.global_log_counter>
+200027cc:              4418                     lw      a4,8(s0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:63
+  base_printf("%s%05d %s:%d] ", stringify_severity(log->severity),
+200027ce:              00003517                 auipc   a0,0x3
+200027d2:              7d650513                 addi    a0,a0,2006 # 20005fa4 <test_status_set.log_fields.7+0x14>
+200027d6:              2cbd                     jal     20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:65
+  ++global_log_counter;
+200027d8:              8d449503                 lh      a0,-1836(s1)
+200027dc:              0505                     addi    a0,a0,1
+200027de:              8ca49a23                 sh      a0,-1836(s1)
+200027e2:              0848                     addi    a0,sp,20
+/proc/self/cwd/sw/device/lib/runtime/log.c:68
+
+  va_list args;
+  va_start(args, log);
+200027e4:              c02a                     sw      a0,0(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:69
+  base_vprintf(log->format, args);
+200027e6:              4808                     lw      a0,16(s0)
+200027e8:              084c                     addi    a1,sp,20
+200027ea:              2c71                     jal     20002a86 <base_vprintf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:72
+  va_end(args);
+
+  base_printf("\r\n");
+200027ec:              00003517                 auipc   a0,0x3
+200027f0:              7c750513                 addi    a0,a0,1991 # 20005fb3 <test_status_set.log_fields.7+0x23>
+200027f4:              2485                     jal     20002a54 <base_printf>
+/proc/self/cwd/sw/device/lib/runtime/log.c:73
+}
+200027f6:              40b2                     lw      ra,12(sp)
+200027f8:              4422                     lw      s0,8(sp)
+200027fa:              4492                     lw      s1,4(sp)
+200027fc:              6145                     addi    sp,sp,48
+200027fe:              8082                     ret
+
+20002800 <base_log_internal_dv>:
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:85
+ *        be invalid at runtime, since the pointed-to data will have been
+ *        stripped from the binary.
+ * @param nargs the number of arguments passed to the format string.
+ * @param ... format parameters matching the format string.
+ */
+void base_log_internal_dv(const log_fields_t *log, uint32_t nargs, ...) {
+20002800:              1101                     addi    sp,sp,-32
+20002802:              ce46                     sw      a7,28(sp)
+20002804:              cc42                     sw      a6,24(sp)
+20002806:              ca3e                     sw      a5,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:86
+  mmio_region_t log_device = mmio_region_from_addr(kDeviceLogBypassUartAddress);
+20002808:              00004797                 auipc   a5,0x4
+2000280c:              abc7a783                 lw      a5,-1348(a5) # 200062c4 <kDeviceLogBypassUartAddress>
+20002810:              c83a                     sw      a4,16(sp)
+20002812:              c636                     sw      a3,12(sp)
+20002814:              c432                     sw      a2,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20002816:              c388                     sw      a0,0(a5)
+20002818:              0028                     addi    a0,sp,8
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:90
+  mmio_region_write32(log_device, 0x0, (uintptr_t)log);
+
+  va_list args;
+  va_start(args, nargs);
+2000281a:              c22a                     sw      a0,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+2000281c:       /----- c989                     beqz    a1,2000282e <base_log_internal_dv+0x2e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:92
+    mmio_region_write32(log_device, 0x0, va_arg(args, uint32_t));
+2000281e:       |  /-> 4512                     lw      a0,4(sp)
+20002820:       |  |   00450613                 addi    a2,a0,4
+20002824:       |  |   c232                     sw      a2,4(sp)
+20002826:       |  |   4108                     lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+  for (int i = 0; i < nargs; ++i) {
+20002828:       |  |   15fd                     addi    a1,a1,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000282a:       |  |   c388                     sw      a0,0(a5)
+base_log_internal_dv():
+/proc/self/cwd/sw/device/lib/runtime/log.c:91
+2000282c:       |  \-- f9ed                     bnez    a1,2000281e <base_log_internal_dv+0x1e>
+/proc/self/cwd/sw/device/lib/runtime/log.c:95
+  }
+  va_end(args);
+}
+2000282e:       \----> 6105                     addi    sp,sp,32
+20002830:              8082                     ret
+
+20002832 <base_dev_null>:
+base_dev_null():
+/proc/self/cwd/sw/device/lib/runtime/print.c:57
+
+static const char kErrorNul[17] = "%<unexpected nul>";
+static const char kUnknownSpec[15] = "%<unknown spec>";
+static const char kErrorTooWide[12] = "%<bad width>";
+
+static size_t base_dev_null(void *data, const char *buf, size_t len) {
+20002832:       8532                    mv      a0,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:58
+  return len;
+20002834:       8082                    ret
+
+20002836 <get_spi_device_sink>:
+get_spi_device_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:245
+  }
+
+  return write_data_len;
+}
+
+sink_func_ptr get_spi_device_sink(void) { return &base_dev_spi_device; }
+20002836:       00000517                auipc   a0,0x0
+2000283a:       00a50513                addi    a0,a0,10 # 20002840 <base_dev_spi_device>
+2000283e:       8082                    ret
+
+20002840 <base_dev_spi_device>:
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:227
+static size_t base_dev_spi_device(void *data, const char *buf, size_t len) {
+20002840:                             715d                      addi    sp,sp,-80
+20002842:                             c686                      sw      ra,76(sp)
+20002844:                             c4a2                      sw      s0,72(sp)
+20002846:                             c2a6                      sw      s1,68(sp)
+20002848:                             c0ca                      sw      s2,64(sp)
+2000284a:                             de4e                      sw      s3,60(sp)
+2000284c:                             dc52                      sw      s4,56(sp)
+2000284e:                             da56                      sw      s5,52(sp)
+20002850:                             d85a                      sw      s6,48(sp)
+20002852:                             d65e                      sw      s7,44(sp)
+20002854:                             d462                      sw      s8,40(sp)
+20002856:                             d266                      sw      s9,36(sp)
+20002858:                             d06a                      sw      s10,32(sp)
+2000285a:                             ce6e                      sw      s11,28(sp)
+2000285c:                             c22e                      sw      a1,4(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+2000285e:       /-------------------- 14060963                  beqz    a2,200029b0 <base_dev_spi_device+0x170>
+20002862:       |                     8ab2                      mv      s5,a2
+20002864:       |                     8d2a                      mv      s10,a0
+20002866:       |                     4c81                      li      s9,0
+20002868:       |                     a5a5c537                  lui     a0,0xa5a5c
+2000286c:       |                     eef50993                  addi    s3,a0,-273 # a5a5beef <_non_volatile_scratch_end+0x859dbeef>
+20002870:       |                     02000493                  li      s1,32
+20002874:       |                     f0000517                  auipc   a0,0xf0000
+20002878:       |                     c42a                      sw      a0,8(sp)
+2000287a:       |                     f0000c17                  auipc   s8,0xf0000
+2000287e:       |                     7ff00b13                  li      s6,2047
+20002882:       |  /----------------> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:231
+    size_t payload_len = len - write_data_len;
+20002884:       |  |                  419a8533                  sub     a0,s5,s9
+/proc/self/cwd/sw/device/lib/runtime/print.c:232
+    if (payload_len > kSpiDeviceMaxFramePayloadSizeBytes) {
+20002888:       |  |                  7e400613                  li      a2,2020
+2000288c:       |  |                  0ac55bb3                  minu    s7,a0,a2
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:132
+  const size_t data_packet_size_bytes = ((len + 3u) & ~3u);
+20002890:       |  |                  003b8513                  addi    a0,s7,3
+20002894:       |  |                  9971                      andi    a0,a0,-4
+20002896:       |  |                  0070                      addi    a2,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:145
+    frame_header_bytes[i] = (kSpiDeviceFrameMagicNumber >> (i * 8)) & 0xff;
+20002898:       |  |              /-> 00b9d6b3                  srl     a3,s3,a1
+2000289c:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:144
+  for (size_t i = 0; i < 4; ++i) {
+200028a0:       |  |              |   05a1                      addi    a1,a1,8
+200028a2:       |  |              |   0605                      addi    a2,a2,1
+200028a4:       |  |              \-- fe959ae3                  bne     a1,s1,20002898 <base_dev_spi_device+0x58>
+200028a8:       |  |                  45a2                      lw      a1,8(sp)
+200028aa:       |  |                  8305a583                  lw      a1,-2000(a1)
+200028ae:       |  |                  4601                      li      a2,0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+200028b0:       |  |                  4a12                      lw      s4,4(sp)
+200028b2:       |  |                  9a66                      add     s4,s4,s9
+200028b4:       |  |                  0814                      addi    a3,sp,16
+spi_device_send_frame():
+/proc/self/cwd/sw/device/lib/runtime/print.c:149
+    frame_header_bytes[i + 4] = (spi_device_frame_num >> (i * 8)) & 0xff;
+200028b6:       |  |              /-> 00c5d733                  srl     a4,a1,a2
+200028ba:       |  |              |   00e68023                  sb      a4,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:148
+  for (size_t i = 0; i < 4; ++i) {
+200028be:       |  |              |   0621                      addi    a2,a2,8
+200028c0:       |  |              |   0685                      addi    a3,a3,1
+200028c2:       |  |              \-- fe961ae3                  bne     a2,s1,200028b6 <base_dev_spi_device+0x76>
+200028c6:       |  |                  4581                      li      a1,0
+200028c8:       |  |                  0850                      addi    a2,sp,20
+/proc/self/cwd/sw/device/lib/runtime/print.c:153
+    frame_header_bytes[i + 8] = (len >> (i * 8)) & 0xff;
+200028ca:       |  |              /-> 00bbd6b3                  srl     a3,s7,a1
+200028ce:       |  |              |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:152
+  for (size_t i = 0; i < 4; ++i) {
+200028d2:       |  |              |   05a1                      addi    a1,a1,8
+200028d4:       |  |              |   0605                      addi    a2,a2,1
+200028d6:       |  |              \-- fe959ae3                  bne     a1,s1,200028ca <base_dev_spi_device+0x8a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:134
+      kSpiDeviceFrameHeaderSizeBytes + data_packet_size_bytes;
+200028da:       |  |                  00c50913                  addi    s2,a0,12 # 10002880 <__global_pointer$+0x98>
+200028de:       |  |                  01850413                  addi    s0,a0,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:158
+    uint32_t last_read_address = 0;
+200028e2:       |  |        /-------> cc02                      sw      zero,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:159
+    if (dif_spi_device_get_last_read_address(spi_device, &last_read_address) !=
+200028e4:       |  |        |         082c                      addi    a1,sp,24
+200028e6:       |  |        |         856a                      mv      a0,s10
+200028e8:       |  |        |         32d000ef                  jal     ra,20003414 <dif_spi_device_get_last_read_address>
+200028ec:       |  |  /-----|-------- e15d                      bnez    a0,20002992 <base_dev_spi_device+0x152>
+/proc/self/cwd/sw/device/lib/runtime/print.c:172
+        (kSpiDeviceReadBufferSizeBytes + last_read_address -
+200028ee:       |  |  |     |         4562                      lw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+200028f0:       |  |  |     |         82ec2d83                  lw      s11,-2002(s8) # 100020a8 <spi_device_send_frame.next_write_address>
+/proc/self/cwd/sw/device/lib/runtime/print.c:175
+    uint32_t next_read_address = ((adjusted_last_read_address + 1) & ~3u) %
+200028f4:       |  |  |     |         7f550513                  addi    a0,a0,2037
+200028f8:       |  |  |     |         7fc57513                  andi    a0,a0,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:178
+    if (next_read_address > next_write_address) {
+200028fc:       |  |  |     |  /----- 00ade563                  bltu    s11,a0,20002906 <base_dev_spi_device+0xc6>
+20002900:       |  |  |     |  |      41bb05b3                  sub     a1,s6,s11
+20002904:       |  |  |     |  |  /-- a019                      j       2000290a <base_dev_spi_device+0xca>
+20002906:       |  |  |     |  \--|-> fffdc593                  not     a1,s11
+2000290a:       |  |  |     |     \-> 952e                      add     a0,a0,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:185
+  } while ((frame_size_bytes + kSpiDeviceBufferPreservedSizeBytes) >
+2000290c:       |  |  |     \-------- fc856be3                  bltu    a0,s0,200028e2 <base_dev_spi_device+0xa2>
+20002910:       |  |  |               8456                      mv      s0,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:190
+      (next_write_address + kSpiDeviceFrameHeaderSizeBytes) %
+20002912:       |  |  |               0db1                      addi    s11,s11,12
+20002914:       |  |  |               7ffdf693                  andi    a3,s11,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:192
+  size_t aligned_data_len = len & (~3u);
+20002918:       |  |  |               7fcbfa93                  andi    s5,s7,2044
+/proc/self/cwd/sw/device/lib/runtime/print.c:193
+  if (!status_ok(spi_device_send_data(spi_device, (uint8_t *)buf,
+2000291c:       |  |  |               856a                      mv      a0,s10
+2000291e:       |  |  |               85d2                      mv      a1,s4
+20002920:       |  |  |               8656                      mv      a2,s5
+20002922:       |  |  |               2785                      jal     20003082 <spi_device_send_data>
+20002924:       |  |  |  /----------- 06054963                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:199
+  if (len != aligned_data_len) {
+20002928:       |  |  |  |  /-------- 037a8e63                  beq     s5,s7,20002964 <base_dev_spi_device+0x124>
+/proc/self/cwd/sw/device/lib/runtime/print.c:200
+    uint8_t pad_bytes[4] = {0xff, 0xff, 0xff, 0xff};
+2000292c:       |  |  |  |  |         557d                      li      a0,-1
+2000292e:       |  |  |  |  |         cc2a                      sw      a0,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+20002930:       |  |  |  |  |  /----- 037af163                  bgeu    s5,s7,20002952 <base_dev_spi_device+0x112>
+20002934:       |  |  |  |  |  |      003bf513                  andi    a0,s7,3
+20002938:       |  |  |  |  |  |      015c85b3                  add     a1,s9,s5
+2000293c:       |  |  |  |  |  |      4612                      lw      a2,4(sp)
+2000293e:       |  |  |  |  |  |      95b2                      add     a1,a1,a2
+20002940:       |  |  |  |  |  |      0830                      addi    a2,sp,24
+/proc/self/cwd/sw/device/lib/runtime/print.c:205
+      pad_bytes[i] = buf[aligned_data_len + i];
+20002942:       |  |  |  |  |  |  /-> 00058683                  lb      a3,0(a1)
+20002946:       |  |  |  |  |  |  |   00d60023                  sb      a3,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:204
+    for (size_t i = 0; i + aligned_data_len < len; i++) {
+2000294a:       |  |  |  |  |  |  |   0585                      addi    a1,a1,1
+2000294c:       |  |  |  |  |  |  |   157d                      addi    a0,a0,-1
+2000294e:       |  |  |  |  |  |  |   0605                      addi    a2,a2,1
+20002950:       |  |  |  |  |  |  \-- f96d                      bnez    a0,20002942 <base_dev_spi_device+0x102>
+20002952:       |  |  |  |  |  \----> 9aee                      add     s5,s5,s11
+20002954:       |  |  |  |  |         7ffaf693                  andi    a3,s5,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:207
+    if (!status_ok(spi_device_send_data(spi_device, pad_bytes, 4,
+20002958:       |  |  |  |  |         082c                      addi    a1,sp,24
+2000295a:       |  |  |  |  |         4611                      li      a2,4
+2000295c:       |  |  |  |  |         856a                      mv      a0,s10
+2000295e:       |  |  |  |  |         2715                      jal     20003082 <spi_device_send_data>
+20002960:       |  |  |  +--|-------- 02054b63                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:216
+                                      next_write_address))) {
+20002964:       |  |  |  |  \-------> 82ec2683                  lw      a3,-2002(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:214
+  if (!status_ok(spi_device_send_data(spi_device, frame_header_bytes,
+20002968:       |  |  |  |            006c                      addi    a1,sp,12
+2000296a:       |  |  |  |            4631                      li      a2,12
+2000296c:       |  |  |  |            856a                      mv      a0,s10
+2000296e:       |  |  |  |            2f11                      jal     20003082 <spi_device_send_data>
+20002970:       |  |  |  +----------- 02054363                  bltz    a0,20002996 <base_dev_spi_device+0x156>
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+20002974:       |  |  |  |            82ec2503                  lw      a0,-2002(s8)
+20002978:       |  |  |  |            4622                      lw      a2,8(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+2000297a:       |  |  |  |            83062583                  lw      a1,-2000(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:221
+      (next_write_address + frame_size_bytes) % kSpiDeviceReadBufferSizeBytes;
+2000297e:       |  |  |  |            954a                      add     a0,a0,s2
+20002980:       |  |  |  |            7ff57513                  andi    a0,a0,2047
+/proc/self/cwd/sw/device/lib/runtime/print.c:220
+  next_write_address =
+20002984:       |  |  |  |            82ac2723                  sw      a0,-2002(s8)
+/proc/self/cwd/sw/device/lib/runtime/print.c:222
+  spi_device_frame_num++;
+20002988:       |  |  |  |            0585                      addi    a1,a1,1
+2000298a:       |  |  |  |            82b62823                  sw      a1,-2000(a2)
+2000298e:       |  |  |  |            855e                      mv      a0,s7
+20002990:       |  |  |  |     /----- a021                      j       20002998 <base_dev_spi_device+0x158>
+20002992:       |  |  \--|-----|----> 4501                      li      a0,0
+20002994:       |  |     |     |  /-- a019                      j       2000299a <base_dev_spi_device+0x15a>
+20002996:       |  |     \-----|--|-> 4501                      li      a0,0
+20002998:       |  |           \--|-> 8aa2                      mv      s5,s0
+base_dev_spi_device():
+/proc/self/cwd/sw/device/lib/runtime/print.c:236
+    if (spi_device_send_frame(data, buf + write_data_len, payload_len) ==
+2000299a:       |  |              \-> 01754533                  xor     a0,a0,s7
+2000299e:       |  |                  00a03533                  snez    a0,a0
+200029a2:       |  |                  157d                      addi    a0,a0,-1
+200029a4:       |  |                  01757533                  and     a0,a0,s7
+200029a8:       |  |                  9caa                      add     s9,s9,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:230
+  while (write_data_len < len) {
+200029aa:       |  \----------------- ed5cece3                  bltu    s9,s5,20002882 <base_dev_spi_device+0x42>
+200029ae:       |                 /-- a011                      j       200029b2 <base_dev_spi_device+0x172>
+200029b0:       \-----------------|-> 4c81                      li      s9,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:242
+  return write_data_len;
+200029b2:                         \-> 8566                      mv      a0,s9
+200029b4:                             40b6                      lw      ra,76(sp)
+200029b6:                             4426                      lw      s0,72(sp)
+200029b8:                             4496                      lw      s1,68(sp)
+200029ba:                             4906                      lw      s2,64(sp)
+200029bc:                             59f2                      lw      s3,60(sp)
+200029be:                             5a62                      lw      s4,56(sp)
+200029c0:                             5ad2                      lw      s5,52(sp)
+200029c2:                             5b42                      lw      s6,48(sp)
+200029c4:                             5bb2                      lw      s7,44(sp)
+200029c6:                             5c22                      lw      s8,40(sp)
+200029c8:                             5c92                      lw      s9,36(sp)
+200029ca:                             5d02                      lw      s10,32(sp)
+200029cc:                             4df2                      lw      s11,28(sp)
+200029ce:                             6161                      addi    sp,sp,80
+200029d0:                             8082                      ret
+
+200029d2 <get_uart_sink>:
+get_uart_sink():
+/proc/self/cwd/sw/device/lib/runtime/print.c:257
+    }
+  }
+  return len;
+}
+
+sink_func_ptr get_uart_sink(void) { return &base_dev_uart; }
+200029d2:       00000517                auipc   a0,0x0
+200029d6:       00a50513                addi    a0,a0,10 # 200029dc <base_dev_uart>
+200029da:       8082                    ret
+
+200029dc <base_dev_uart>:
+base_dev_uart():
+/proc/self/cwd/sw/device/lib/runtime/print.c:247
+static size_t base_dev_uart(void *data, const char *buf, size_t len) {
+200029dc:                 1101                  addi    sp,sp,-32
+200029de:                 ce06                  sw      ra,28(sp)
+200029e0:                 cc22                  sw      s0,24(sp)
+200029e2:                 ca26                  sw      s1,20(sp)
+200029e4:                 c84a                  sw      s2,16(sp)
+200029e6:                 c64e                  sw      s3,12(sp)
+200029e8:                 8932                  mv      s2,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+200029ea:       /-------- c20d                  beqz    a2,20002a0c <base_dev_uart+0x30>
+200029ec:       |         89ae                  mv      s3,a1
+200029ee:       |         842a                  mv      s0,a0
+200029f0:       |         4481                  li      s1,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:250
+    if (dif_uart_byte_send_polled(uart, (uint8_t)buf[i]) != kDifOk) {
+200029f2:       |  /----> 00998533              add     a0,s3,s1
+200029f6:       |  |      00054583              lbu     a1,0(a0)
+200029fa:       |  |      8522                  mv      a0,s0
+200029fc:       |  |      6c1000ef              jal     ra,200038bc <dif_uart_byte_send_polled>
+20002a00:       |  |  /-- e519                  bnez    a0,20002a0e <base_dev_uart+0x32>
+/proc/self/cwd/sw/device/lib/runtime/print.c:249
+  for (size_t i = 0; i < len; ++i) {
+20002a02:       |  |  |   0485                  addi    s1,s1,1
+20002a04:       |  \--|-- fe9917e3              bne     s2,s1,200029f2 <base_dev_uart+0x16>
+20002a08:       |     |   84ca                  mv      s1,s2
+20002a0a:       |     +-- a011                  j       20002a0e <base_dev_uart+0x32>
+20002a0c:       \-----|-> 4481                  li      s1,0
+20002a0e:             \-> 0b24d533              minu    a0,s1,s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:255
+}
+20002a12:                 40f2                  lw      ra,28(sp)
+20002a14:                 4462                  lw      s0,24(sp)
+20002a16:                 44d2                  lw      s1,20(sp)
+20002a18:                 4942                  lw      s2,16(sp)
+20002a1a:                 49b2                  lw      s3,12(sp)
+20002a1c:                 6105                  addi    sp,sp,32
+20002a1e:                 8082                  ret
+
+20002a20 <base_spi_device_stdout>:
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:261
+
+void base_spi_device_stdout(const dif_spi_device_handle_t *spi_device) {
+  // Reset the frame counter.
+  spi_device_frame_num = 0;
+20002a20:       effff597                auipc   a1,0xeffff
+20002a24:       6805a223                sw      zero,1668(a1) # 100020a4 <spi_device_frame_num>
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+20002a28:       effff597                auipc   a1,0xeffff
+20002a2c:       67458593                addi    a1,a1,1652 # 1000209c <base_stdout>
+20002a30:       c188                    sw      a0,0(a1)
+20002a32:       00000517                auipc   a0,0x0
+20002a36:       e0e50513                addi    a0,a0,-498 # 20002840 <base_dev_spi_device>
+20002a3a:       c1c8                    sw      a0,4(a1)
+base_spi_device_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:264
+  base_set_stdout((buffer_sink_t){.data = (void *)spi_device,
+                                  .sink = &base_dev_spi_device});
+}
+20002a3c:       8082                    ret
+
+20002a3e <base_uart_stdout>:
+base_set_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:71
+  base_stdout = out;
+20002a3e:       effff597                auipc   a1,0xeffff
+20002a42:       65e58593                addi    a1,a1,1630 # 1000209c <base_stdout>
+20002a46:       c188                    sw      a0,0(a1)
+20002a48:       00000517                auipc   a0,0x0
+20002a4c:       f9450513                addi    a0,a0,-108 # 200029dc <base_dev_uart>
+20002a50:       c1c8                    sw      a0,4(a1)
+base_uart_stdout():
+/proc/self/cwd/sw/device/lib/runtime/print.c:269
+
+void base_uart_stdout(const dif_uart_t *uart) {
+  base_set_stdout(
+      (buffer_sink_t){.data = (void *)uart, .sink = &base_dev_uart});
+}
+20002a52:       8082                    ret
+
+20002a54 <base_printf>:
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:271
+
+size_t base_printf(const char *format, ...) {
+20002a54:       7179                    addi    sp,sp,-48
+20002a56:       c606                    sw      ra,12(sp)
+20002a58:       d646                    sw      a7,44(sp)
+20002a5a:       d442                    sw      a6,40(sp)
+20002a5c:       d23e                    sw      a5,36(sp)
+20002a5e:       d03a                    sw      a4,32(sp)
+20002a60:       ce36                    sw      a3,28(sp)
+20002a62:       cc32                    sw      a2,24(sp)
+20002a64:       ca2e                    sw      a1,20(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  va_end(args);
+  return bytes_left;
+}
+
+size_t base_vprintf(const char *format, va_list args) {
+  return base_vfprintf(base_stdout, format, args);
+20002a66:       effff597                auipc   a1,0xeffff
+20002a6a:       63658593                addi    a1,a1,1590 # 1000209c <base_stdout>
+20002a6e:       4190                    lw      a2,0(a1)
+20002a70:       41cc                    lw      a1,4(a1)
+20002a72:       872a                    mv      a4,a0
+20002a74:       0848                    addi    a0,sp,20
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:273
+  va_start(args, format);
+20002a76:       c42a                    sw      a0,8(sp)
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a78:       0854                    addi    a3,sp,20
+20002a7a:       8532                    mv      a0,a2
+20002a7c:       863a                    mv      a2,a4
+20002a7e:       200d                    jal     20002aa0 <base_vfprintf>
+base_printf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:276
+  return bytes_left;
+20002a80:       40b2                    lw      ra,12(sp)
+20002a82:       6145                    addi    sp,sp,48
+20002a84:       8082                    ret
+
+20002a86 <base_vprintf>:
+base_vprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:280
+  return base_vfprintf(base_stdout, format, args);
+20002a86:       effff617                auipc   a2,0xeffff
+20002a8a:       61660693                addi    a3,a2,1558 # 1000209c <base_stdout>
+20002a8e:       4290                    lw      a2,0(a3)
+20002a90:       42d4                    lw      a3,4(a3)
+20002a92:       872e                    mv      a4,a1
+20002a94:       87aa                    mv      a5,a0
+20002a96:       8532                    mv      a0,a2
+20002a98:       85b6                    mv      a1,a3
+20002a9a:       863e                    mv      a2,a5
+20002a9c:       86ba                    mv      a3,a4
+20002a9e:       a009                    j       20002aa0 <base_vfprintf>
+
+20002aa0 <base_vfprintf>:
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:733
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+    }
+  }
+}
+
+size_t base_vfprintf(buffer_sink_t out, const char *format, va_list args) {
+20002aa0:                                                                          711d                 addi    sp,sp,-96
+20002aa2:                                                                          ce86                 sw      ra,92(sp)
+20002aa4:                                                                          cca2                 sw      s0,88(sp)
+20002aa6:                                                                          caa6                 sw      s1,84(sp)
+20002aa8:                                                                          c8ca                 sw      s2,80(sp)
+20002aaa:                                                                          c6ce                 sw      s3,76(sp)
+20002aac:                                                                          c4d2                 sw      s4,72(sp)
+20002aae:                                                                          c2d6                 sw      s5,68(sp)
+20002ab0:                                                                          c0da                 sw      s6,64(sp)
+20002ab2:                                                                          de5e                 sw      s7,60(sp)
+20002ab4:                                                                          dc62                 sw      s8,56(sp)
+20002ab6:                                                                          da66                 sw      s9,52(sp)
+20002ab8:                                                                          d86a                 sw      s10,48(sp)
+20002aba:                                                                          d66e                 sw      s11,44(sp)
+20002abc:                                                                          8432                 mv      s0,a2
+20002abe:                                                                          cc36                 sw      a3,24(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:743
+  // NOTE: This copy is necessary on amd64 and other platforms, where
+  // `va_list` is a fixed array type (and, as such, decays to a pointer in
+  // an argument list). On PSABI RV32IMC, however, `va_list` is a `void*`, so
+  // this is a copy of the pointer, not the array.
+  va_list args_copy;
+  va_copy(args_copy, args);
+20002ac0:                                                                          ca36                 sw      a3,20(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+
+  size_t bytes_written = 0;
+  while (format[0] != '\0') {
+20002ac2:                                                                          00064603             lbu     a2,0(a2)
+20002ac6:       /----------------------------------------------------------------- 4a060563             beqz    a2,20002f70 <base_vfprintf+0x4d0>
+20002aca:       |                                                                  89ae                 mv      s3,a1
+20002acc:       |                                                                  892a                 mv      s2,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:734
+  if (out.sink == NULL) {
+20002ace:       |                                                              /-- e589                 bnez    a1,20002ad8 <base_vfprintf+0x38>
+20002ad0:       |                                                              |   00000517             auipc   a0,0x0
+20002ad4:       |                                                              |   d6250993             addi    s3,a0,-670 # 20002832 <base_dev_null>
+20002ad8:       |                                                              \-> 4a81                 li      s5,0
+20002ada:       |                                                                  4a01                 li      s4,0
+20002adc:       |                                                                  02500c93             li      s9,37
+20002ae0:       |                                                                  02100d13             li      s10,33
+20002ae4:       |                                                                  0f600d93             li      s11,246
+20002ae8:       |                                                                  650d                 lui     a0,0x3
+20002aea:       |                                                                  c2250513             addi    a0,a0,-990 # 2c22 <_static_critical_size+0xc3a>
+20002aee:       |                                                                  c82a                 sw      a0,16(sp)
+consume_until_percent():
+/proc/self/cwd/sw/device/lib/runtime/print.c:341
+    char c = (*format)[text_len];
+20002af0:       |           /----------------------------------------------------> 01440533             add     a0,s0,s4
+20002af4:       |           |                                                      00054483             lbu     s1,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:342
+    if (c == '\0' || c == kPercent) {
+20002af8:       |           |                                                  /-- 01948363             beq     s1,s9,20002afe <base_vfprintf+0x5e>
+20002afc:       |           |                                            /-----|-- ec91                 bnez    s1,20002b18 <base_vfprintf+0x78>
+/proc/self/cwd/sw/device/lib/runtime/print.c:343
+      if (text_len > 0) {
+20002afe:       |           |                                            |  /--\-X 000a0763             beqz    s4,20002b0c <base_vfprintf+0x6c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:344
+        *bytes_written += out.sink(out.data, *format, text_len);
+20002b02:       |           |                                            |  |      854a                 mv      a0,s2
+20002b04:       |           |                                            |  |      85a2                 mv      a1,s0
+20002b06:       |           |                                            |  |      8652                 mv      a2,s4
+20002b08:       |           |                                            |  |      9982                 jalr    s3
+20002b0a:       |           |                                            |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:346
+      *format += text_len;
+20002b0c:       |           |                                            |  \----> 9452                 add     s0,s0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:347
+      return c != '\0';
+20002b0e:       |           |                                            |         00903bb3             snez    s7,s1
+20002b12:       |           |                                            |  /----- 01949663             bne     s1,s9,20002b1e <base_vfprintf+0x7e>
+20002b16:       |           |                                            |  |  /-- a029                 j       20002b20 <base_vfprintf+0x80>
+/proc/self/cwd/sw/device/lib/runtime/print.c:349
+    ++text_len;
+20002b18:       |           |                                            \--|--|-> 0a05                 addi    s4,s4,1
+20002b1a:       |           |                                               |  +-- 01948363             beq     s1,s9,20002b20 <base_vfprintf+0x80>
+20002b1e:       |           +-----------------------------------------------\--|-X f8e9                 bnez    s1,20002af0 <base_vfprintf+0x50>
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:747
+    if (!consume_until_percent(out, &format, &bytes_written)) {
+20002b20:       |           |                                                  \-> 001bf513             andi    a0,s7,1
+20002b24:       |  /--------|----------------------------------------------------- 44050763             beqz    a0,20002f72 <base_vfprintf+0x4d2>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002b28:       |  |        |                                                      00144a03             lbu     s4,1(s0)
+20002b2c:       |  |        |                                               /----- 01aa1763             bne     s4,s10,20002b3a <base_vfprintf+0x9a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002b30:       |  |        |                                               |      00244583             lbu     a1,2(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:384
+    ++(*format);
+20002b34:       |  |        |                                               |      0409                 addi    s0,s0,2
+20002b36:       |  |        |                                               |      4b05                 li      s6,1
+20002b38:       |  |        |                                               |  /-- a021                 j       20002b40 <base_vfprintf+0xa0>
+20002b3a:       |  |        |                                               \--|-> 4b01                 li      s6,0
+20002b3c:       |  |        |                                                  |   0405                 addi    s0,s0,1
+20002b3e:       |  |        |                                                  |   85d2                 mv      a1,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b40:       |  |  /-----|--------------------------------------------------\-X 40058f63             beqz    a1,20002f5e <base_vfprintf+0x4be>
+20002b44:       |  |  |     |                                                      4481                 li      s1,0
+20002b46:       |  |  |     |                                                      4c01                 li      s8,0
+20002b48:       |  |  |     |                                                      4501                 li      a0,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002b4a:       |  |  |     |                                                      0405                 addi    s0,s0,1
+20002b4c:       |  |  |     |                                         /----------> fc658613             addi    a2,a1,-58
+20002b50:       |  |  |     |                                         |            0ff67613             andi    a2,a2,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b54:       |  |  |     |                                         |            0ff5f593             andi    a1,a1,255
+/proc/self/cwd/sw/device/lib/runtime/print.c:400
+    if (c < '0' || c > '9') {
+20002b58:       |  |  |     |                                         |  /-------- 03b66c63             bltu    a2,s11,20002b90 <base_vfprintf+0xf0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:403
+    if (spec->padding == 0) {
+20002b5c:       |  |  |     |                                         |  |         0ff57613             andi    a2,a0,255
+20002b60:       |  |  |     |                                         |  |  /----- ee09                 bnez    a2,20002b7a <base_vfprintf+0xda>
+20002b62:       |  |  |     |                                         |  |  |      02000c13             li      s8,32
+20002b66:       |  |  |     |                                         |  |  |      03000613             li      a2,48
+20002b6a:       |  |  |     |                                         |  |  |      02000513             li      a0,32
+/proc/self/cwd/sw/device/lib/runtime/print.c:404
+      if (c == '0') {
+20002b6e:       |  |  |     |                                         |  |  +----- 00c59663             bne     a1,a2,20002b7a <base_vfprintf+0xda>
+20002b72:       |  |  |     |                                         |  |  |      03000513             li      a0,48
+20002b76:       |  |  |     |                                         |  |  |      8c32                 mv      s8,a2
+20002b78:       |  |  |     |                                         |  |  |  /-- a039                 j       20002b86 <base_vfprintf+0xe6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:412
+    spec->width += (c - '0');
+20002b7a:       |  |  |     |                                         |  |  \--|-> 2094c633             sh2add  a2,s1,s1
+20002b7e:       |  |  |     |                                         |  |     |   20b625b3             sh1add  a1,a2,a1
+20002b82:       |  |  |     |                                         |  |     |   fd058493             addi    s1,a1,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:395
+    char c = (*format)[spec_len];
+20002b86:       |  |  |     |                                         |  |     \-> 00044583             lbu     a1,0(s0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:396
+    if (c == '\0') {
+20002b8a:       |  |  |     |                                         |  |         0405                 addi    s0,s0,1
+20002b8c:       |  |  |     |                                         \--|-------- f1e1                 bnez    a1,20002b4c <base_vfprintf+0xac>
+20002b8e:       |  |  +-----|--------------------------------------------|-------- aec1                 j       20002f5e <base_vfprintf+0x4be>
+/proc/self/cwd/sw/device/lib/runtime/print.c:416
+  if ((spec->width == 0 && spec->padding != 0) || spec->width > 32) {
+20002b90:       |  |  |     |                                            \-----/-X c481                 beqz    s1,20002b98 <base_vfprintf+0xf8>
+20002b92:       |  |  |     |                                               /--|-- 01a4e763             bltu    s1,s10,20002ba0 <base_vfprintf+0x100>
+20002b96:       |  |  |  /--|-----------------------------------------------|--|-- aef5                 j       20002f92 <base_vfprintf+0x4f2>
+20002b98:       |  |  |  |  |                                               |  \-> 0ff57513             andi    a0,a0,255
+20002b9c:       |  |  |  +--|-----------------------------------------------|----- 3e051b63             bnez    a0,20002f92 <base_vfprintf+0x4f2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002ba0:       |  |  |  |  |                                               \----> 05700513             li      a0,87
+20002ba4:       |  |  |  |  |                                               /----- 04b55d63             bge     a0,a1,20002bfe <base_vfprintf+0x15e>
+20002ba8:       |  |  |  |  |                                               |      fa858513             addi    a0,a1,-88
+20002bac:       |  |  |  |  |        /--------------------------------------|----- 2cad6563             bltu    s10,a0,20002e76 <base_vfprintf+0x3d6>
+20002bb0:       |  |  |  |  |        |                                      |      00003597             auipc   a1,0x3
+20002bb4:       |  |  |  |  |        |                                      |      42058593             addi    a1,a1,1056 # 20005fd0 <test_status_set.log_fields.7+0x40>
+20002bb8:       |  |  |  |  |        |                                      |      20b54533             sh2add  a0,a0,a1
+20002bbc:       |  |  |  |  |        |                                      |      4108                 lw      a0,0(a0)
+20002bbe:       |  |  |  |  |        |                                      |      8502                 jr      a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:609
+      if (spec.is_nonstd) {
+20002bc0:       |  |  |  |  |        +--------------------------------------|----- 2baa0b63             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:612
+      uint32_t value = va_arg(*args, uint32_t);
+20002bc4:       |  |  |  |  |        |                                      |      4552                 lw      a0,20(sp)
+20002bc6:       |  |  |  |  |        |                                      |      00450593             addi    a1,a0,4
+20002bca:       |  |  |  |  |        |                                      |      ca2e                 sw      a1,20(sp)
+20002bcc:       |  |  |  |  |        |                                      |      00052b03             lw      s6,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:613
+      if (((int32_t)value) < 0) {
+20002bd0:       |  |  |  |  |        |                                      |  /-- 000b5c63             bgez    s6,20002be8 <base_vfprintf+0x148>
+/proc/self/cwd/sw/device/lib/runtime/print.c:614
+        *bytes_written += out.sink(out.data, "-", 1);
+20002bd4:       |  |  |  |  |        |                                      |  |   00003517             auipc   a0,0x3
+20002bd8:       |  |  |  |  |        |                                      |  |   4b450593             addi    a1,a0,1204 # 20006088 <test_status_set.log_fields.7+0xf8>
+20002bdc:       |  |  |  |  |        |                                      |  |   4605                 li      a2,1
+20002bde:       |  |  |  |  |        |                                      |  |   854a                 mv      a0,s2
+20002be0:       |  |  |  |  |        |                                      |  |   9982                 jalr    s3
+20002be2:       |  |  |  |  |        |                                      |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:615
+        value = -value;
+20002be4:       |  |  |  |  |        |                                      |  |   41600b33             neg     s6,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:618
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002be8:       |  |  |  |  |        |                                      |  \-> 0ffc7713             andi    a4,s8,255
+20002bec:       |  |  |  |  |        |                                      |      00003517             auipc   a0,0x3
+20002bf0:       |  |  |  |  |        |                                      |      4b550813             addi    a6,a0,1205 # 200060a1 <kDigitsLow>
+20002bf4:       |  |  |  |  |        |                                      |      47a9                 li      a5,10
+20002bf6:       |  |  |  |  |        |                                      |      854a                 mv      a0,s2
+20002bf8:       |  |  |  |  |        |                                      |      85ce                 mv      a1,s3
+20002bfa:       |  |  |  |  |        |                                      |      865a                 mv      a2,s6
+20002bfc:       |  |  |  |  |        |              /-----------------------|----- a489                 j       20002e3e <base_vfprintf+0x39e>
+20002bfe:       |  |  |  |  |        |           /--|-----------------------\----X 27958a63             beq     a1,s9,20002e72 <base_vfprintf+0x3d2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:561
+  switch (spec.type) {
+20002c02:       |  |  |  |  |        |           |  |                              04300513             li      a0,67
+20002c06:       |  |  |  |  |        |     /-----|--|----------------------------- 28a58663             beq     a1,a0,20002e92 <base_vfprintf+0x3f2>
+20002c0a:       |  |  |  |  |        |     |     |  |                              04800513             li      a0,72
+20002c0e:       |  |  |  |  |        |     |     |  |                          /-- 02a58563             beq     a1,a0,20002c38 <base_vfprintf+0x198>
+20002c12:       |  |  |  |  |        +-----|-----|--|--------------------------|-- a495                 j       20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:662
+      if (spec.is_nonstd) {
+20002c14:       |  |  |  |  |        |     |     |  |                          +-- 03aa1263             bne     s4,s10,20002c38 <base_vfprintf+0x198>
+/proc/self/cwd/sw/device/lib/runtime/print.c:663
+        size_t len = va_arg(*args, size_t);
+20002c18:       |  |  |  |  |        |     |     |  |                          |   4552                 lw      a0,20(sp)
+20002c1a:       |  |  |  |  |        |     |     |  |                          |   00450593             addi    a1,a0,4
+20002c1e:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002c20:       |  |  |  |  |        |     |     |  |                          |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:664
+        char *value = va_arg(*args, char *);
+20002c22:       |  |  |  |  |        |     |     |  |                          |   00850593             addi    a1,a0,8
+20002c26:       |  |  |  |  |        |     |     |  |                          |   ca2e                 sw      a1,20(sp)
+20002c28:       |  |  |  |  |        |     |     |  |                          |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:665
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002c2a:       |  |  |  |  |        |     |     |  |                          |   0ffc7793             andi    a5,s8,255
+20002c2e:       |  |  |  |  |        |     |     |  |                          |   00003517             auipc   a0,0x3
+20002c32:       |  |  |  |  |        |     |     |  |                          |   4a050893             addi    a7,a0,1184 # 200060ce <kDigitsHigh>
+20002c36:       |  |  |  |  |        |     |     |  |                       /--|-- a2cd                 j       20002e18 <base_vfprintf+0x378>
+/proc/self/cwd/sw/device/lib/runtime/print.c:671
+      uint32_t value = va_arg(*args, uint32_t);
+20002c38:       |  |  |  |  |        |     |     |  |                       |  \-> 4552                 lw      a0,20(sp)
+20002c3a:       |  |  |  |  |        |     |     |  |                       |      00450593             addi    a1,a0,4
+20002c3e:       |  |  |  |  |        |     |     |  |                       |      ca2e                 sw      a1,20(sp)
+20002c40:       |  |  |  |  |        |     |     |  |                       |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:673
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsHigh);
+20002c42:       |  |  |  |  |        |     |     |  |                       |      0ffc7713             andi    a4,s8,255
+20002c46:       |  |  |  |  |        |     |     |  |                       |      00003517             auipc   a0,0x3
+20002c4a:       |  |  |  |  |        |     |     |  |                       |      48850813             addi    a6,a0,1160 # 200060ce <kDigitsHigh>
+20002c4e:       |  |  |  |  |        |     |     |  |                    /--|----- a2ed                 j       20002e38 <base_vfprintf+0x398>
+/proc/self/cwd/sw/device/lib/runtime/print.c:687
+      if (!spec.is_nonstd) {
+20002c50:       |  |  |  |  |        +-----|-----|--|--------------------|--|----- 23aa1363             bne     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:690
+      size_t len = va_arg(*args, size_t);
+20002c54:       |  |  |  |  |        |     |     |  |                    |  |      4552                 lw      a0,20(sp)
+20002c56:       |  |  |  |  |        |     |     |  |                    |  |      00450593             addi    a1,a0,4
+20002c5a:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c5c:       |  |  |  |  |        |     |     |  |                    |  |      4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:691
+      char *value = va_arg(*args, char *);
+20002c5e:       |  |  |  |  |        |     |     |  |                    |  |      00850593             addi    a1,a0,8
+20002c62:       |  |  |  |  |        |     |     |  |                    |  |      ca2e                 sw      a1,20(sp)
+20002c64:       |  |  |  |  |        |     |     |  |                    |  |      4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:692
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002c66:       |  |  |  |  |        |     |     |  |                    |  |      0ffc7793             andi    a5,s8,255
+20002c6a:       |  |  |  |  |        |     |     |  |                    |  |      00003517             auipc   a0,0x3
+20002c6e:       |  |  |  |  |        |     |     |  |                    |  |      46450893             addi    a7,a0,1124 # 200060ce <kDigitsHigh>
+20002c72:       |  |  |  |  |        |     |     |  |        /-----------|--|----- aad5                 j       20002e66 <base_vfprintf+0x3c6>
+20002c74:       |  |  |  |  |        |     |     |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c76:       |  |  |  |  |        |     |     |  |        |           |  |      00450593             addi    a1,a0,4
+20002c7a:       |  |  |  |  |        |     |     |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c7c:       |  |  |  |  |        |     |     |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:706
+      if (spec.is_nonstd) {
+20002c7e:       |  |  |  |  |        |     |  /--|--|--------|-----------|--|----- 27aa1b63             bne     s4,s10,20002ef4 <base_vfprintf+0x454>
+/proc/self/cwd/sw/device/lib/runtime/print.c:709
+        if (va_arg(*args, int) != 0) {
+20002c82:       |  |  |  |  |  /-----|-----|--|--|--|--------|-----------|--|----- 2c060863             beqz    a2,20002f52 <base_vfprintf+0x4b2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:710
+          *bytes_written += out.sink(out.data, "true", 4);
+20002c86:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002c8a:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      40750593             addi    a1,a0,1031 # 2000608d <test_status_set.log_fields.7+0xfd>
+20002c8e:       |  |  |  |  |  |     |     |  |  |  |        |           |  |      4611                 li      a2,4
+20002c90:       |  |  |  |  |  |  /--|-----|--|--|--|--------|-----------|--|----- aac5                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:570
+      if (spec.is_nonstd) {
+20002c92:       |  |  |  |  |  |  |  +-----|--|--|--|--------|-----------|--|----- 1faa0263             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:573
+      char value = (char)va_arg(*args, uint32_t);
+20002c96:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002c98:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002c9c:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002c9e:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      4108                 lw      a0,0(a0)
+20002ca0:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      02a10223             sb      a0,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:574
+      *bytes_written += out.sink(out.data, &value, 1);
+20002ca4:       |  |  |  |  |  |  |  |     |  |  |  |        |           |  |      104c                 addi    a1,sp,36
+20002ca6:       |  |  |  |  |  |  |  |  /--|--|--|--|--------|-----------|--|----- a465                 j       20002f4e <base_vfprintf+0x4ae>
+/proc/self/cwd/sw/device/lib/runtime/print.c:622
+      if (spec.is_nonstd) {
+20002ca8:       |  |  |  |  |  |  |  +--|--|--|--|--|--------|-----------|--|----- 1daa0763             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:625
+      uint32_t value = va_arg(*args, uint32_t);
+20002cac:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4552                 lw      a0,20(sp)
+20002cae:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00450593             addi    a1,a0,4
+20002cb2:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      ca2e                 sw      a1,20(sp)
+20002cb4:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:627
+          write_digits(out, value, spec.width, spec.padding, 8, kDigitsLow);
+20002cb6:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      0ffc7713             andi    a4,s8,255
+20002cba:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      00003517             auipc   a0,0x3
+20002cbe:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      3e750813             addi    a6,a0,999 # 200060a1 <kDigitsLow>
+20002cc2:       |  |  |  |  |  |  |  |  |  |  |  |  |        |           |  |      47a1                 li      a5,8
+20002cc4:       |  |  |  |  |  |  |  |  |  |  |  |  |  /-----|-----------|--|----- aa9d                 j       20002e3a <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:631
+      if (spec.is_nonstd) {
+20002cc6:       |  |  |  |  |  |  |  +--|--|--|--|--|--|-----|-----------|--|----- 1baa0863             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002cca:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002cce:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      3c050593             addi    a1,a0,960 # 2000608a <test_status_set.log_fields.7+0xfa>
+20002cd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4609                 li      a2,2
+20002cd4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002cd6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:641
+      uintptr_t value = va_arg(*args, uintptr_t);
+20002cd8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      45d2                 lw      a1,20(sp)
+20002cda:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00458613             addi    a2,a1,4
+20002cde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      ca32                 sw      a2,20(sp)
+20002ce0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      4190                 lw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:640
+      *bytes_written += out.sink(out.data, "0x", 2);
+20002ce2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:643
+          write_digits(out, value, sizeof(uintptr_t) * 2, '0', 16, kDigitsLow);
+20002ce4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      00003517             auipc   a0,0x3
+20002ce8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      3bd50813             addi    a6,a0,957 # 200060a1 <kDigitsLow>
+20002cec:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      46a1                 li      a3,8
+20002cee:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      03000713             li      a4,48
+20002cf2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      47c1                 li      a5,16
+20002cf4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      854a                 mv      a0,s2
+20002cf6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      85ce                 mv      a1,s3
+20002cf8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      2155                 jal     2000319c <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:642
+      *bytes_written +=
+20002cfa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |     |           |  |      9aaa                 add     s5,s5,a0
+20002cfc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-----------|--|----- a269                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:722
+      status_t value = va_arg(*args, status_t);
+20002cfe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4552                 lw      a0,20(sp)
+20002d00:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00450593             addi    a1,a0,4
+20002d04:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      ca2e                 sw      a1,20(sp)
+20002d06:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4108                 lw      a0,0(a0)
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:467
+  char mod[] = {'"', 0, 0, 0, '"', ','};
+20002d08:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45c2                 lw      a1,16(sp)
+20002d0a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02b11423             sh      a1,40(sp)
+20002d0e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02200593             li      a1,34
+20002d12:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      d22e                 sw      a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002d14:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      086c                 addi    a1,sp,28
+20002d16:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      1010                 addi    a2,sp,32
+20002d18:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      02510693             addi    a3,sp,37
+20002d1c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      23e9                 jal     200032e6 <status_extract>
+/proc/self/cwd/sw/device/lib/runtime/print.c:473
+  const char *end = start;
+20002d1e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:470
+  bool err = status_extract(value, &start, &arg, &mod[1]);
+20002d20:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      c62a                 sw      a0,12(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002d22:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fff58493             addi    s1,a1,-1
+20002d26:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  /-> 0005c503             lbu     a0,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:475
+    end++;
+20002d2a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0585                 addi    a1,a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:474
+  while (*end)
+20002d2c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  |   0485                 addi    s1,s1,1
+20002d2e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |  \-- fd65                 bnez    a0,20002d26 <base_vfprintf+0x286>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:382
+  if ((*format)[0] == '!') {
+20002d30:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      fdfa0513             addi    a0,s4,-33
+20002d34:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00153613             seqz    a2,a0
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002d38:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      0606                 slli    a2,a2,0x1
+20002d3a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002d3e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      35e50593             addi    a1,a0,862 # 20006098 <test_status_set.log_fields.7+0x108>
+20002d42:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d44:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d46:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      45f2                 lw      a1,28(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:478
+  len += out.sink(out.data, "{\"", as_json ? 2 : 0);
+20002d48:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8a2a                 mv      s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d4a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      40b48633             sub     a2,s1,a1
+20002d4e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d50:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+20002d52:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      8c2a                 mv      s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002d54:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00003517             auipc   a0,0x3
+20002d58:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      34550593             addi    a1,a0,837 # 20006099 <test_status_set.log_fields.7+0x109>
+20002d5c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d5e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      865a                 mv      a2,s6
+20002d60:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:479
+  len += out.sink(out.data, start, (size_t)(end - start));
+20002d62:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9a2a                 add     s4,s4,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d64:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      00002517             auipc   a0,0x2
+20002d68:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      b4450593             addi    a1,a0,-1212 # 200048a8 <test_main.log_fields.21+0x204>
+20002d6c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4605                 li      a2,1
+20002d6e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      854a                 mv      a0,s2
+20002d70:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:480
+  len += out.sink(out.data, "\"", as_json ? 1 : 0);
+20002d72:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9552                 add     a0,a0,s4
+/proc/self/cwd/sw/device/lib/runtime/print.c:482
+  len += out.sink(out.data, ":", 1);
+20002d74:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:483
+  if (err) {
+20002d76:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |           |  |      4532                 lw      a0,12(sp)
+20002d78:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--------|--|----- 18050663             beqz    a0,20002f04 <base_vfprintf+0x464>
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d7c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d80:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      31f50593             addi    a1,a0,799 # 2000609b <test_status_set.log_fields.7+0x10b>
+20002d84:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002d86:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d88:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+20002d8a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      84aa                 mv      s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002d8c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      104c                 addi    a1,sp,36
+20002d8e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4619                 li      a2,6
+20002d90:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002d92:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d94:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      5602                 lw      a2,32(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:485
+    len += out.sink(out.data, "[", 1);
+20002d96:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002d98:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002d9c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      30950813             addi    a6,a0,777 # 200060a1 <kDigitsLow>
+20002da0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      47a9                 li      a5,10
+20002da2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002da4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      85ce                 mv      a1,s3
+20002da6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4681                 li      a3,0
+20002da8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4701                 li      a4,0
+20002daa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      2ecd                 jal     2000319c <write_digits>
+/proc/self/cwd/sw/device/lib/runtime/print.c:486
+    len += out.sink(out.data, mod, sizeof(mod));
+20002dac:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      94aa                 add     s1,s1,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:488
+    len += out.sink(out.data, "]", 1);
+20002dae:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      00003517             auipc   a0,0x3
+20002db2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      2ef50593             addi    a1,a0,751 # 2000609d <test_status_set.log_fields.7+0x10d>
+20002db6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      4605                 li      a2,1
+20002db8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      854a                 mv      a0,s2
+20002dba:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:487
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002dbc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |        |  |      9526                 add     a0,a0,s1
+20002dbe:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     /--|--|----- aab1                 j       20002f1a <base_vfprintf+0x47a>
+20002dc0:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      4552                 lw      a0,20(sp)
+20002dc2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      00450593             addi    a1,a0,4
+20002dc6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |  |  |      ca2e                 sw      a1,20(sp)
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:593
+      if (spec.is_nonstd) {
+20002dc8:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|--|--|----- 17aa1563             bne     s4,s10,20002f32 <base_vfprintf+0x492>
+/proc/self/cwd/sw/device/lib/runtime/print.c:595
+        len = va_arg(*args, size_t);
+20002dcc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002dce:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00850593             addi    a1,a0,8
+20002dd2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002dd4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      414c                 lw      a1,4(a0)
+20002dd6:       |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|--|----- a06d                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:697
+      if (spec.is_nonstd) {
+20002dd8:       |  |  |  |  |  |  |  +--|--|--|--|--|--|--|--|--|--|--|--|--|----- 09aa0f63             beq     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:700
+      uint32_t value = va_arg(*args, uint32_t);
+20002ddc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4552                 lw      a0,20(sp)
+20002dde:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002de2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002de4:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:702
+          write_digits(out, value, spec.width, spec.padding, 10, kDigitsLow);
+20002de6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002dea:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002dee:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      2b750813             addi    a6,a0,695 # 200060a1 <kDigitsLow>
+20002df2:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      47a9                 li      a5,10
+20002df4:       |  |  |  |  |  |  |  |  |  |  |  |  |  +--|--|--|--|--|--|--|----- a099                 j       20002e3a <base_vfprintf+0x39a>
+/proc/self/cwd/sw/device/lib/runtime/print.c:647
+      if (spec.is_nonstd) {
+20002df6:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /-- 03aa1663             bne     s4,s10,20002e22 <base_vfprintf+0x382>
+/proc/self/cwd/sw/device/lib/runtime/print.c:648
+        size_t len = va_arg(*args, size_t);
+20002dfa:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4552                 lw      a0,20(sp)
+20002dfc:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00450593             addi    a1,a0,4
+20002e00:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002e02:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:649
+        char *value = va_arg(*args, char *);
+20002e04:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00850593             addi    a1,a0,8
+20002e08:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   ca2e                 sw      a1,20(sp)
+20002e0a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:650
+        *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002e0c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   0ffc7793             andi    a5,s8,255
+20002e10:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002e14:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |   29150893             addi    a7,a0,657 # 200060a1 <kDigitsLow>
+20002e18:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|-> 4805                 li      a6,1
+20002e1a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   854a                 mv      a0,s2
+20002e1c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   85ce                 mv      a1,s3
+20002e1e:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |   8726                 mv      a4,s1
+20002e20:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  /--|-- a0b9                 j       20002e6e <base_vfprintf+0x3ce>
+/proc/self/cwd/sw/device/lib/runtime/print.c:656
+      uint32_t value = va_arg(*args, uint32_t);
+20002e22:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \-> 4552                 lw      a0,20(sp)
+20002e24:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00450593             addi    a1,a0,4
+20002e28:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      ca2e                 sw      a1,20(sp)
+20002e2a:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      4110                 lw      a2,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:658
+          write_digits(out, value, spec.width, spec.padding, 16, kDigitsLow);
+20002e2c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      0ffc7713             andi    a4,s8,255
+20002e30:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      00003517             auipc   a0,0x3
+20002e34:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |      27150813             addi    a6,a0,625 # 200060a1 <kDigitsLow>
+20002e38:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  \--|----> 47c1                 li      a5,16
+20002e3a:       |  |  |  |  |  |  |  |  |  |  |  |  |  >--|--|--|--|--|-----|----> 854a                 mv      a0,s2
+20002e3c:       |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |  |     |      85ce                 mv      a1,s3
+20002e3e:       |  |  |  |  |  |  |  |  |  |  |  |  \--|--|--|--|--|--|-----|----> 86a6                 mv      a3,s1
+20002e40:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |      2eb1                 jal     2000319c <write_digits>
+20002e42:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  /-- a089                 j       20002e84 <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:677
+      if (!spec.is_nonstd) {
+20002e44:       |  |  |  |  |  |  |  +--|--|--|--|-----|--|--|--|--|--|-----|--|-- 03aa1963             bne     s4,s10,20002e76 <base_vfprintf+0x3d6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:680
+      size_t len = va_arg(*args, size_t);
+20002e48:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4552                 lw      a0,20(sp)
+20002e4a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00450593             addi    a1,a0,4
+20002e4e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002e50:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4114                 lw      a3,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:681
+      char *value = va_arg(*args, char *);
+20002e52:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00850593             addi    a1,a0,8
+20002e56:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   ca2e                 sw      a1,20(sp)
+20002e58:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   4150                 lw      a2,4(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:682
+      *bytes_written += hex_dump(out, value, len, spec.width, spec.padding,
+20002e5a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   0ffc7793             andi    a5,s8,255
+20002e5e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   00003517             auipc   a0,0x3
+20002e62:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  |  |  |  |     |  |   24350893             addi    a7,a0,579 # 200060a1 <kDigitsLow>
+20002e66:       |  |  |  |  |  |  |  |  |  |  |  |     |  |  \--|--|--|-----|--|-> 854a                 mv      a0,s2
+20002e68:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   85ce                 mv      a1,s3
+20002e6a:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   8726                 mv      a4,s1
+20002e6c:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     |  |   4801                 li      a6,0
+20002e6e:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |     \--|-> 2a05                 jal     20002f9e <hex_dump>
+20002e70:       |  |  |  |  |  |  |  |  |  |  |  |     |  |     |  |  |        +-- a811                 j       20002e84 <base_vfprintf+0x3e4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:563
+      if (spec.is_nonstd) {
+20002e72:       |  |  |  |  |  |  |  |  |  |  |  \-----|--|-----|--|--|--/-----|-X 0daa1a63             bne     s4,s10,20002f46 <base_vfprintf+0x4a6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:728
+      *bytes_written += out.sink(out.data, kUnknownSpec, sizeof(kUnknownSpec));
+20002e76:       |  |  |  |  |  |  |  \--|--|--|--------|--|-----|--|--|--|-----|-> 00003517             auipc   a0,0x3
+20002e7a:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   26850593             addi    a1,a0,616 # 200060de <kUnknownSpec>
+20002e7e:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   463d                 li      a2,15
+20002e80:       |  |  |  |  |  |  >-----|--|--|--------|--|-----|--|--|--|-----|-> 854a                 mv      a0,s2
+20002e82:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     |   9982                 jalr    s3
+20002e84:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |     \-> 9aaa                 add     s5,s5,a0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:746
+  while (format[0] != '\0') {
+20002e86:       |  |  |  |  |  |  |     |  |  |        |  >-----|--|--|--|-------> 00044503             lbu     a0,0(s0)
+20002e8a:       |  |  |  |  |  |  |     |  |  |        |  |     |  |  |  |         4a01                 li      s4,0
+20002e8c:       |  |  |  |  \--|--|-----|--|--|--------|--|-----|--|--|--|-------- c60512e3             bnez    a0,20002af0 <base_vfprintf+0x50>
+20002e90:       |  +--|--|-----|--|-----|--|--|--------|--|-----|--|--|--|-------- a0cd                 j       20002f72 <base_vfprintf+0x4d2>
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:578
+      uint32_t value = va_arg(*args, uint32_t);
+20002e92:       |  |  |  |     |  |     |  \--|--------|--|-----|--|--|--|-------> 4552                 lw      a0,20(sp)
+20002e94:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         00450593             addi    a1,a0,4
+20002e98:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         ca2e                 sw      a1,20(sp)
+20002e9a:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4104                 lw      s1,0(a0)
+20002e9c:       |  |  |  |     |  |     |     |        |  |     |  |  |  |         4a11                 li      s4,4
+/proc/self/cwd/sw/device/lib/runtime/print.c:580
+        uint8_t ch = (uint8_t)value;
+20002e9e:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  /----> 02910223             sb      s1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:581
+        if (ch >= 32 && ch < 127) {
+20002ea2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      0ff4f513             andi    a0,s1,255
+20002ea6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1501                 addi    a0,a0,-32
+20002ea8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      104c                 addi    a1,sp,36
+20002eaa:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      05f00613             li      a2,95
+20002eae:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  /-- 02c56a63             bltu    a0,a2,20002ee2 <base_vfprintf+0x442>
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002eb2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002eb6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   1d350593             addi    a1,a0,467 # 20006085 <test_status_set.log_fields.7+0xf5>
+20002eba:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4609                 li      a2,2
+20002ebc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002ebe:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002ec0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:584
+          *bytes_written += out.sink(out.data, "\\x", 2);
+20002ec4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+20002ec6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   8191                 srli    a1,a1,0x4
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002ec8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   00003517             auipc   a0,0x3
+20002ecc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   1d950b13             addi    s6,a0,473 # 200060a1 <kDigitsLow>
+20002ed0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002ed2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   4605                 li      a2,1
+20002ed4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   854a                 mv      a0,s2
+20002ed6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9982                 jalr    s3
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002ed8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   02414583             lbu     a1,36(sp)
+/proc/self/cwd/sw/device/lib/runtime/print.c:585
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch >> 4], 1);
+20002edc:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:586
+          *bytes_written += out.sink(out.data, &kDigitsLow[ch & 15], 1);
+20002ede:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   89bd                 andi    a1,a1,15
+20002ee0:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  |   95da                 add     a1,a1,s6
+20002ee2:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |  \-> 4605                 li      a2,1
+20002ee4:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      854a                 mv      a0,s2
+20002ee6:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9982                 jalr    s3
+20002ee8:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      9aaa                 add     s5,s5,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:579
+      for (size_t i = 0; i < sizeof(uint32_t); ++i, value >>= 8) {
+20002eea:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      1a7d                 addi    s4,s4,-1
+20002eec:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  |      80a1                 srli    s1,s1,0x8
+20002eee:       |  |  |  |     |  |     |     |        |  |     |  |  |  |  \----- fa0a18e3             bnez    s4,20002e9e <base_vfprintf+0x3fe>
+20002ef2:       |  |  |  |     |  |     |     |        |  +-----|--|--|--|-------- bf51                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:718
+          write_digits(out, value, spec.width, spec.padding, 2, kDigitsLow);
+20002ef4:       |  |  |  |     |  |     |     \--------|--|-----|--|--|--|-------> 0ffc7713             andi    a4,s8,255
+20002ef8:       |  |  |  |     |  |     |              |  |     |  |  |  |         00003517             auipc   a0,0x3
+20002efc:       |  |  |  |     |  |     |              |  |     |  |  |  |         1a950813             addi    a6,a0,425 # 200060a1 <kDigitsLow>
+20002f00:       |  |  |  |     |  |     |              |  |     |  |  |  |         4789                 li      a5,2
+20002f02:       |  |  |  |     |  |     |              \--|-----|--|--|--|-------- bf25                 j       20002e3a <base_vfprintf+0x39a>
+write_status():
+/proc/self/cwd/sw/device/lib/runtime/print.c:491
+    len += write_digits(out, (uint32_t)arg, 0, 0, 10, kDigitsLow);
+20002f04:       |  |  |  |     |  |     |                 |     \--|--|--|-------> 5602                 lw      a2,32(sp)
+20002f06:       |  |  |  |     |  |     |                 |        |  |  |         00003517             auipc   a0,0x3
+20002f0a:       |  |  |  |     |  |     |                 |        |  |  |         19b50813             addi    a6,a0,411 # 200060a1 <kDigitsLow>
+20002f0e:       |  |  |  |     |  |     |                 |        |  |  |         47a9                 li      a5,10
+20002f10:       |  |  |  |     |  |     |                 |        |  |  |         854a                 mv      a0,s2
+20002f12:       |  |  |  |     |  |     |                 |        |  |  |         85ce                 mv      a1,s3
+20002f14:       |  |  |  |     |  |     |                 |        |  |  |         4681                 li      a3,0
+20002f16:       |  |  |  |     |  |     |                 |        |  |  |         4701                 li      a4,0
+20002f18:       |  |  |  |     |  |     |                 |        |  |  |         2451                 jal     2000319c <write_digits>
+20002f1a:       |  |  |  |     |  |     |                 |        |  \--|-------> 9c2a                 add     s8,s8,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:493
+  len += out.sink(out.data, "}", as_json ? 1 : 0);
+20002f1c:       |  |  |  |     |  |     |                 |        |     |         00003517             auipc   a0,0x3
+20002f20:       |  |  |  |     |  |     |                 |        |     |         18350593             addi    a1,a0,387 # 2000609f <test_status_set.log_fields.7+0x10f>
+20002f24:       |  |  |  |     |  |     |                 |        |     |         854a                 mv      a0,s2
+20002f26:       |  |  |  |     |  |     |                 |        |     |         865a                 mv      a2,s6
+20002f28:       |  |  |  |     |  |     |                 |        |     |         9982                 jalr    s3
+20002f2a:       |  |  |  |     |  |     |                 |        |     |         9556                 add     a0,a0,s5
+process_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:723
+      *bytes_written += write_status(out, value, spec.is_nonstd);
+20002f2c:       |  |  |  |     |  |     |                 |        |     |         00ac0ab3             add     s5,s8,a0
+20002f30:       |  |  |  |     |  |     |                 \--------|-----|-------- bf99                 j       20002e86 <base_vfprintf+0x3e6>
+/proc/self/cwd/sw/device/lib/runtime/print.c:598
+      char *value = va_arg(*args, char *);
+20002f32:       |  |  |  |     |  |     |                          \-----|-------> 410c                 lw      a1,0(a0)
+20002f34:       |  |  |  |     |  |     |                                |         4601                 li      a2,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002f36:       |  |  |  |     |  |     |                                |     /-> 00c58533             add     a0,a1,a2
+20002f3a:       |  |  |  |     |  |     |                                |     |   00054503             lbu     a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:601
+        ++len;
+20002f3e:       |  |  |  |     |  |     |                                |     |   0605                 addi    a2,a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:599
+      while (!spec.is_nonstd && value[len] != '\0') {
+20002f40:       |  |  |  |     |  |     |                                |     \-- f97d                 bnez    a0,20002f36 <base_vfprintf+0x496>
+/proc/self/cwd/sw/device/lib/runtime/print.c:604
+      *bytes_written += out.sink(out.data, value, len);
+20002f42:       |  |  |  |     |  |     |                                |         167d                 addi    a2,a2,-1
+20002f44:       |  |  |  |     |  +-----|--------------------------------|-------- bf35                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:566
+      *bytes_written += out.sink(out.data, "%", 1);
+20002f46:       |  |  |  |     |  |     |                                \-------> 00003517             auipc   a0,0x3
+20002f4a:       |  |  |  |     |  |     |                                          13d50593             addi    a1,a0,317 # 20006083 <test_status_set.log_fields.7+0xf3>
+20002f4e:       |  |  |  |     |  |     \----------------------------------------> 4605                 li      a2,1
+20002f50:       |  |  |  |     |  +----------------------------------------------- bf05                 j       20002e80 <base_vfprintf+0x3e0>
+/proc/self/cwd/sw/device/lib/runtime/print.c:712
+          *bytes_written += out.sink(out.data, "false", 5);
+20002f52:       |  |  |  |     \--|----------------------------------------------> 00003517             auipc   a0,0x3
+20002f56:       |  |  |  |        |                                                14050593             addi    a1,a0,320 # 20006092 <test_status_set.log_fields.7+0x102>
+20002f5a:       |  |  |  |        |                                                4615                 li      a2,5
+20002f5c:       |  |  |  |        \----------------------------------------------- b715                 j       20002e80 <base_vfprintf+0x3e0>
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:397
+      *bytes_written += out.sink(out.data, kErrorNul, sizeof(kErrorNul));
+20002f5e:       |  |  \--|-------------------------------------------------------> 00003517             auipc   a0,0x3
+20002f62:       |  |     |                                                         15350593             addi    a1,a0,339 # 200060b1 <kErrorNul>
+20002f66:       |  |     |                                                         4645                 li      a2,17
+20002f68:       |  |     |                                                     /-> 854a                 mv      a0,s2
+20002f6a:       |  |     |                                                     |   9982                 jalr    s3
+20002f6c:       |  |     |                                                     |   9aaa                 add     s5,s5,a0
+20002f6e:       |  +-----|-----------------------------------------------------|-- a011                 j       20002f72 <base_vfprintf+0x4d2>
+20002f70:       \--|-----|-----------------------------------------------------|-> 4a81                 li      s5,0
+base_vfprintf():
+/proc/self/cwd/sw/device/lib/runtime/print.c:759
+
+    process_specifier(out, spec, &bytes_written, &args_copy);
+  }
+
+  va_end(args_copy);
+  return bytes_written;
+20002f72:          \-----|-----------------------------------------------------|-> 8556                 mv      a0,s5
+20002f74:                |                                                     |   40f6                 lw      ra,92(sp)
+20002f76:                |                                                     |   4466                 lw      s0,88(sp)
+20002f78:                |                                                     |   44d6                 lw      s1,84(sp)
+20002f7a:                |                                                     |   4946                 lw      s2,80(sp)
+20002f7c:                |                                                     |   49b6                 lw      s3,76(sp)
+20002f7e:                |                                                     |   4a26                 lw      s4,72(sp)
+20002f80:                |                                                     |   4a96                 lw      s5,68(sp)
+20002f82:                |                                                     |   4b06                 lw      s6,64(sp)
+20002f84:                |                                                     |   5bf2                 lw      s7,60(sp)
+20002f86:                |                                                     |   5c62                 lw      s8,56(sp)
+20002f88:                |                                                     |   5cd2                 lw      s9,52(sp)
+20002f8a:                |                                                     |   5d42                 lw      s10,48(sp)
+20002f8c:                |                                                     |   5db2                 lw      s11,44(sp)
+20002f8e:                |                                                     |   6125                 addi    sp,sp,96
+20002f90:                |                                                     |   8082                 ret
+consume_format_specifier():
+/proc/self/cwd/sw/device/lib/runtime/print.c:417
+    *bytes_written += out.sink(out.data, kErrorTooWide, sizeof(kErrorTooWide));
+20002f92:                \-----------------------------------------------------|-> 00003517             auipc   a0,0x3
+20002f96:                                                                      |   13050593             addi    a1,a0,304 # 200060c2 <kErrorTooWide>
+20002f9a:                                                                      |   4631                 li      a2,12
+20002f9c:                                                                      \-- b7f1                 j       20002f68 <base_vfprintf+0x4c8>
+
+20002f9e <hex_dump>:
+hex_dump():
+/proc/self/cwd/sw/device/lib/runtime/print.c:513
+                       const char *glyphs) {
+20002f9e:                 711d                  addi    sp,sp,-96
+20002fa0:                 ce86                  sw      ra,92(sp)
+20002fa2:                 cca2                  sw      s0,88(sp)
+20002fa4:                 caa6                  sw      s1,84(sp)
+20002fa6:                 c8ca                  sw      s2,80(sp)
+20002fa8:                 c6ce                  sw      s3,76(sp)
+20002faa:                 c4d2                  sw      s4,72(sp)
+20002fac:                 c2d6                  sw      s5,68(sp)
+20002fae:                 c0da                  sw      s6,64(sp)
+20002fb0:                 de5e                  sw      s7,60(sp)
+20002fb2:                 dc62                  sw      s8,56(sp)
+20002fb4:                 da66                  sw      s9,52(sp)
+20002fb6:                 d86a                  sw      s10,48(sp)
+20002fb8:                 d66e                  sw      s11,44(sp)
+20002fba:                 8bc6                  mv      s7,a7
+20002fbc:                 8a42                  mv      s4,a6
+20002fbe:                 8b36                  mv      s6,a3
+20002fc0:                 8ab2                  mv      s5,a2
+20002fc2:                 892e                  mv      s2,a1
+20002fc4:                 89aa                  mv      s3,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:517
+  if (len < width) {
+20002fc6:          /----- 02e6fa63              bgeu    a3,a4,20002ffa <hex_dump+0x5c>
+/proc/self/cwd/sw/device/lib/runtime/print.c:518
+    width -= len;
+20002fca:          |      41670433              sub     s0,a4,s6
+/proc/self/cwd/sw/device/lib/runtime/print.c:519
+    memset(buf, padding, sizeof(buf));
+20002fce:          |      0068                  addi    a0,sp,12
+20002fd0:          |      02000613              li      a2,32
+20002fd4:          |      02000c13              li      s8,32
+20002fd8:          |      85be                  mv      a1,a5
+20002fda:          |      138010ef              jal     ra,20004112 <memset>
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002fde:          +----- cc11                  beqz    s0,20002ffa <hex_dump+0x5c>
+20002fe0:          |      4d81                  li      s11,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:521
+      size_t to_write = width > ARRAYSIZE(buf) ? 32 : width;
+20002fe2:          |  /-> 0b8454b3              minu    s1,s0,s8
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002fe6:          |  |   006c                  addi    a1,sp,12
+20002fe8:          |  |   854e                  mv      a0,s3
+20002fea:          |  |   8626                  mv      a2,s1
+20002fec:          |  |   9902                  jalr    s2
+/proc/self/cwd/sw/device/lib/runtime/print.c:523
+      width -= to_write;
+20002fee:          |  |   8c05                  sub     s0,s0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:522
+      bytes_written += out.sink(out.data, buf, to_write);
+20002ff0:          |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:520
+    while (width > 0) {
+20002ff2:          |  \-- f865                  bnez    s0,20002fe2 <hex_dump+0x44>
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20002ff4:          |  /-- 000b1663              bnez    s6,20003000 <hex_dump+0x62>
+20002ff8:       /--|--|-- a0ad                  j       20003062 <hex_dump+0xc4>
+20002ffa:       |  \--|-> 4d81                  li      s11,0
+20002ffc:       +-----|-- 060b0363              beqz    s6,20003062 <hex_dump+0xc4>
+20003000:       |     \-> 4481                  li      s1,0
+20003002:       |         4601                  li      a2,0
+20003004:       |         1b7d                  addi    s6,s6,-1
+20003006:       |         00c10c13              addi    s8,sp,12
+2000300a:       |         02000c93              li      s9,32
+2000300e:       |         5d7d                  li      s10,-1
+20003010:       |  /----> 855a                  mv      a0,s6
+20003012:       |  |  /-- 000a1363              bnez    s4,20003018 <hex_dump+0x7a>
+20003016:       |  |  |   8526                  mv      a0,s1
+/proc/self/cwd/sw/device/lib/runtime/print.c:529
+    buf[buffered] = glyphs[(bytes[idx] >> 4) & 0xf];
+20003018:       |  |  \-> 9556                  add     a0,a0,s5
+2000301a:       |  |      00054503              lbu     a0,0(a0)
+2000301e:       |  |      00455593              srli    a1,a0,0x4
+20003022:       |  |      95de                  add     a1,a1,s7
+20003024:       |  |      00058583              lb      a1,0(a1)
+20003028:       |  |      00cc06b3              add     a3,s8,a2
+2000302c:       |  |      00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+20003030:       |  |      893d                  andi    a0,a0,15
+20003032:       |  |      955e                  add     a0,a0,s7
+20003034:       |  |      00050503              lb      a0,0(a0)
+/proc/self/cwd/sw/device/lib/runtime/print.c:531
+    buffered += 2;
+20003038:       |  |      0609                  addi    a2,a2,2
+/proc/self/cwd/sw/device/lib/runtime/print.c:530
+    buf[buffered + 1] = glyphs[bytes[idx] & 0xf];
+2000303a:       |  |      00a680a3              sb      a0,1(a3)
+2000303e:       |  |  /-- 01961963              bne     a2,s9,20003050 <hex_dump+0xb2>
+/proc/self/cwd/sw/device/lib/runtime/print.c:534
+      bytes_written += out.sink(out.data, buf, buffered);
+20003042:       |  |  |   006c                  addi    a1,sp,12
+20003044:       |  |  |   02000613              li      a2,32
+20003048:       |  |  |   854e                  mv      a0,s3
+2000304a:       |  |  |   9902                  jalr    s2
+2000304c:       |  |  |   4601                  li      a2,0
+2000304e:       |  |  |   9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:527
+  for (size_t i = 0; i < len; ++i) {
+20003050:       |  |  \-> 1b7d                  addi    s6,s6,-1
+20003052:       |  |      0485                  addi    s1,s1,1
+20003054:       |  \----- fbab1ee3              bne     s6,s10,20003010 <hex_dump+0x72>
+/proc/self/cwd/sw/device/lib/runtime/print.c:539
+  if (buffered != 0) {
+20003058:       +-------- c609                  beqz    a2,20003062 <hex_dump+0xc4>
+/proc/self/cwd/sw/device/lib/runtime/print.c:540
+    bytes_written += out.sink(out.data, buf, buffered);
+2000305a:       |         006c                  addi    a1,sp,12
+2000305c:       |         854e                  mv      a0,s3
+2000305e:       |         9902                  jalr    s2
+20003060:       |         9daa                  add     s11,s11,a0
+/proc/self/cwd/sw/device/lib/runtime/print.c:542
+  return bytes_written;
+20003062:       \-------> 856e                  mv      a0,s11
+20003064:                 40f6                  lw      ra,92(sp)
+20003066:                 4466                  lw      s0,88(sp)
+20003068:                 44d6                  lw      s1,84(sp)
+2000306a:                 4946                  lw      s2,80(sp)
+2000306c:                 49b6                  lw      s3,76(sp)
+2000306e:                 4a26                  lw      s4,72(sp)
+20003070:                 4a96                  lw      s5,68(sp)
+20003072:                 4b06                  lw      s6,64(sp)
+20003074:                 5bf2                  lw      s7,60(sp)
+20003076:                 5c62                  lw      s8,56(sp)
+20003078:                 5cd2                  lw      s9,52(sp)
+2000307a:                 5d42                  lw      s10,48(sp)
+2000307c:                 5db2                  lw      s11,44(sp)
+2000307e:                 6125                  addi    sp,sp,96
+20003080:                 8082                  ret
+
+20003082 <spi_device_send_data>:
+spi_device_send_data():
+/proc/self/cwd/sw/device/lib/runtime/print.c:87
+                                     size_t address) {
+20003082:                       7179                    addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/runtime/print.c:88
+  if (len == 0) {
+20003084:                       d606                    sw      ra,44(sp)
+20003086:                       d422                    sw      s0,40(sp)
+20003088:                       d226                    sw      s1,36(sp)
+2000308a:                       d04a                    sw      s2,32(sp)
+2000308c:                       ce4e                    sw      s3,28(sp)
+2000308e:                       cc52                    sw      s4,24(sp)
+20003090:                       ca56                    sw      s5,20(sp)
+20003092:                       c85a                    sw      s6,16(sp)
+20003094:       /-------------- c245                    beqz    a2,20003134 <spi_device_send_data+0xb2>
+20003096:       |               84b2                    mv      s1,a2
+20003098:       |               8a2e                    mv      s4,a1
+2000309a:       |               89aa                    mv      s3,a0
+2000309c:       |               28b01513                bseti   a0,zero,0xb
+/proc/self/cwd/sw/device/lib/runtime/print.c:92
+  size_t space_to_end_of_buffer = kSpiDeviceReadBufferSizeBytes - address;
+200030a0:       |               40d50b33                sub     s6,a0,a3
+/proc/self/cwd/sw/device/lib/runtime/print.c:94
+      space_to_end_of_buffer < len ? space_to_end_of_buffer : len;
+200030a4:       |               0acb5ab3                minu    s5,s6,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+200030a8:       |               854e                    mv      a0,s3
+200030aa:       |               4581                    li      a1,0
+200030ac:       |               8636                    mv      a2,a3
+200030ae:       |               86d6                    mv      a3,s5
+200030b0:       |               8752                    mv      a4,s4
+200030b2:       |               2bad                    jal     2000362c <dif_spi_device_write_flash_buffer>
+200030b4:       |               c62a                    sw      a0,12(sp)
+200030b6:       |               0028                    addi    a0,sp,8
+200030b8:       |               006c                    addi    a1,sp,12
+200030ba:       |               4611                    li      a2,4
+200030bc:       |               7d5000ef                jal     ra,20004090 <memcpy>
+200030c0:       |               4522                    lw      a0,8(sp)
+200030c2:       |               00003597                auipc   a1,0x3
+200030c6:       |               02e5a903                lw      s2,46(a1) # 200060f0 <MODULE_ID>
+200030ca:       |               00153593                seqz    a1,a0
+200030ce:       |               15fd                    addi    a1,a1,-1
+200030d0:       |               0625f693                andi    a3,a1,98
+200030d4:       |               00003597                auipc   a1,0x3
+200030d8:       |               f9158613                addi    a2,a1,-111 # 20006065 <test_status_set.log_fields.7+0xd5>
+200030dc:       |               85ca                    mv      a1,s2
+200030de:       |               2a3d                    jal     2000321c <status_create>
+200030e0:       |  /----------- 06054e63                bltz    a0,2000315c <spi_device_send_data+0xda>
+/proc/self/cwd/sw/device/lib/runtime/print.c:101
+  if (first_part_size < len) {
+200030e4:       |  |        /-- 029b7e63                bgeu    s6,s1,20003120 <spi_device_send_data+0x9e>
+/proc/self/cwd/sw/device/lib/runtime/print.c:102
+    size_t second_part_size = len - first_part_size;
+200030e8:       |  |        |   415486b3                sub     a3,s1,s5
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+200030ec:       |  |        |   015a0733                add     a4,s4,s5
+200030f0:       |  |        |   854e                    mv      a0,s3
+200030f2:       |  |        |   4581                    li      a1,0
+200030f4:       |  |        |   4601                    li      a2,0
+200030f6:       |  |        |   2b1d                    jal     2000362c <dif_spi_device_write_flash_buffer>
+200030f8:       |  |        |   c62a                    sw      a0,12(sp)
+200030fa:       |  |        |   0028                    addi    a0,sp,8
+200030fc:       |  |        |   006c                    addi    a1,sp,12
+200030fe:       |  |        |   4611                    li      a2,4
+20003100:       |  |        |   791000ef                jal     ra,20004090 <memcpy>
+20003104:       |  |        |   4522                    lw      a0,8(sp)
+20003106:       |  |        |   00153593                seqz    a1,a0
+2000310a:       |  |        |   15fd                    addi    a1,a1,-1
+2000310c:       |  |        |   0695f693                andi    a3,a1,105
+20003110:       |  |        |   00003597                auipc   a1,0x3
+20003114:       |  |        |   f5558613                addi    a2,a1,-171 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003118:       |  |        |   85ca                    mv      a1,s2
+2000311a:       |  |        |   2209                    jal     2000321c <status_create>
+2000311c:       |  |     /--|-- 04054963                bltz    a0,2000316e <spi_device_send_data+0xec>
+/proc/self/cwd/sw/device/lib/runtime/print.c:108
+  return OK_STATUS();
+20003120:       |  |     |  \-> 00003517                auipc   a0,0x3
+20003124:       |  |     |      f4550613                addi    a2,a0,-187 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003128:       |  |     |      4501                    li      a0,0
+2000312a:       |  |     |      85ca                    mv      a1,s2
+2000312c:       |  |     |      4681                    li      a3,0
+2000312e:       |  |     |      20fd                    jal     2000321c <status_create>
+20003130:       |  |     |      842a                    mv      s0,a0
+20003132:       |  |  /--|----- a891                    j       20003186 <spi_device_send_data+0x104>
+/proc/self/cwd/sw/device/lib/runtime/print.c:89
+    return OK_STATUS();
+20003134:       \--|--|--|----> 00003517                auipc   a0,0x3
+20003138:          |  |  |      fbc52583                lw      a1,-68(a0) # 200060f0 <MODULE_ID>
+2000313c:          |  |  |      00003517                auipc   a0,0x3
+20003140:          |  |  |      f2950613                addi    a2,a0,-215 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003144:          |  |  |      4501                    li      a0,0
+20003146:          |  |  |      4681                    li      a3,0
+20003148:          |  |  |      50b2                    lw      ra,44(sp)
+2000314a:          |  |  |      5422                    lw      s0,40(sp)
+2000314c:          |  |  |      5492                    lw      s1,36(sp)
+2000314e:          |  |  |      5902                    lw      s2,32(sp)
+20003150:          |  |  |      49f2                    lw      s3,28(sp)
+20003152:          |  |  |      4a62                    lw      s4,24(sp)
+20003154:          |  |  |      4ad2                    lw      s5,20(sp)
+20003156:          |  |  |      4b42                    lw      s6,16(sp)
+20003158:          |  |  |      6145                    addi    sp,sp,48
+2000315a:          |  |  |      a0c9                    j       2000321c <status_create>
+2000315c:          \--|--|----> 842a                    mv      s0,a0
+2000315e:             |  |      897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:96
+  TRY(dif_spi_device_write_flash_buffer(spi_device,
+20003160:             |  |      00003597                auipc   a1,0x3
+20003164:             |  |      f0558613                addi    a2,a1,-251 # 20006065 <test_status_set.log_fields.7+0xd5>
+20003168:             |  |      06200693                li      a3,98
+2000316c:             |  |  /-- a809                    j       2000317e <spi_device_send_data+0xfc>
+2000316e:             |  \--|-> 842a                    mv      s0,a0
+20003170:             |     |   897d                    andi    a0,a0,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:103
+    TRY(dif_spi_device_write_flash_buffer(
+20003172:             |     |   00003597                auipc   a1,0x3
+20003176:             |     |   ef358613                addi    a2,a1,-269 # 20006065 <test_status_set.log_fields.7+0xd5>
+2000317a:             |     |   06900693                li      a3,105
+2000317e:             |     \-> 85ca                    mv      a1,s2
+20003180:             |         2871                    jal     2000321c <status_create>
+20003182:             |         981fd0ef                jal     ra,20000b02 <status_report>
+/proc/self/cwd/sw/device/lib/runtime/print.c:109
+}
+20003186:             \-------> 8522                    mv      a0,s0
+20003188:                       50b2                    lw      ra,44(sp)
+2000318a:                       5422                    lw      s0,40(sp)
+2000318c:                       5492                    lw      s1,36(sp)
+2000318e:                       5902                    lw      s2,32(sp)
+20003190:                       49f2                    lw      s3,28(sp)
+20003192:                       4a62                    lw      s4,24(sp)
+20003194:                       4ad2                    lw      s5,20(sp)
+20003196:                       4b42                    lw      s6,16(sp)
+20003198:                       6145                    addi    sp,sp,48
+2000319a:                       8082                    ret
+
+2000319c <write_digits>:
+write_digits():
+/proc/self/cwd/sw/device/lib/runtime/print.c:439
+                           char padding, uint32_t base, const char *glyphs) {
+2000319c:                       7179                    addi    sp,sp,-48
+2000319e:                       d606                    sw      ra,44(sp)
+200031a0:                       88ae                    mv      a7,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:446
+  if (value == 0) {
+200031a2:       /-------------- ce0d                    beqz    a2,200031dc <write_digits+0x40>
+200031a4:       |               4e01                    li      t3,0
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+200031a6:       |               02b10293                addi    t0,sp,43
+200031aa:       |           /-> 8332                    mv      t1,a2
+/proc/self/cwd/sw/device/lib/runtime/print.c:452
+    value /= base;
+200031ac:       |           |   02f65633                divu    a2,a2,a5
+200031b0:       |           |   02f603b3                mul     t2,a2,a5
+200031b4:       |           |   006805b3                add     a1,a6,t1
+/proc/self/cwd/sw/device/lib/runtime/print.c:453
+    buffer[kWordBits - 1 - len] = glyphs[digit];
+200031b8:       |           |   407585b3                sub     a1,a1,t2
+200031bc:       |           |   00058383                lb      t2,0(a1)
+200031c0:       |           |   01c285b3                add     a1,t0,t3
+200031c4:       |           |   00758023                sb      t2,0(a1)
+/proc/self/cwd/sw/device/lib/runtime/print.c:450
+  while (value > 0) {
+200031c8:       |           |   1e7d                    addi    t3,t3,-1
+200031ca:       |           \-- fef370e3                bgeu    t1,a5,200031aa <write_digits+0xe>
+/proc/self/cwd/sw/device/lib/runtime/print.c:456
+  width = width == 0 ? 1 : width;
+200031ce:       |               41c00633                neg     a2,t3
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+200031d2:       |        /----- ea99                    bnez    a3,200031e8 <write_digits+0x4c>
+200031d4:       |        |  /-> 4585                    li      a1,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+200031d6:       |     /--|--|-- 00b66f63                bltu    a2,a1,200031f4 <write_digits+0x58>
+200031da:       |  /--|--|--|-- a80d                    j       2000320c <write_digits+0x70>
+/proc/self/cwd/sw/device/lib/runtime/print.c:447
+    buffer[kWordBits - 1] = glyphs[0];
+200031dc:       \--|--|--|--|-> 00080583                lb      a1,0(a6)
+200031e0:          |  |  |  |   02b105a3                sb      a1,43(sp)
+200031e4:          |  |  |  |   4605                    li      a2,1
+/proc/self/cwd/sw/device/lib/runtime/print.c:457
+  width = width > kWordBits ? kWordBits : width;
+200031e6:          |  |  |  \-- d6fd                    beqz    a3,200031d4 <write_digits+0x38>
+200031e8:          |  |  \----> 02000593                li      a1,32
+200031ec:          |  |         0ab6d5b3                minu    a1,a3,a1
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+200031f0:          +--|-------- 00b67e63                bgeu    a2,a1,2000320c <write_digits+0x70>
+200031f4:          |  \-------> 40c586b3                sub     a3,a1,a2
+200031f8:          |            007c                    addi    a5,sp,12
+200031fa:          |            40c78633                sub     a2,a5,a2
+200031fe:          |            067d                    addi    a2,a2,31
+/proc/self/cwd/sw/device/lib/runtime/print.c:459
+    buffer[kWordBits - len - 1] = padding;
+20003200:          |        /-> 00e60023                sb      a4,0(a2)
+/proc/self/cwd/sw/device/lib/runtime/print.c:458
+  while (len < width) {
+20003204:          |        |   16fd                    addi    a3,a3,-1
+20003206:          |        |   167d                    addi    a2,a2,-1
+20003208:          |        \-- fee5                    bnez    a3,20003200 <write_digits+0x64>
+2000320a:          |            862e                    mv      a2,a1
+2000320c:          \----------> 006c                    addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/runtime/print.c:462
+  return out.sink(out.data, buffer + (kWordBits - len), len);
+2000320e:                       8d91                    sub     a1,a1,a2
+20003210:                       02058593                addi    a1,a1,32
+20003214:                       9882                    jalr    a7
+/proc/self/cwd/sw/device/lib/runtime/print.c:463
+}
+20003216:                       50b2                    lw      ra,44(sp)
+20003218:                       6145                    addi    sp,sp,48
+2000321a:                       8082                    ret
+
+2000321c <status_create>:
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:26
+    --f;
+  return f;
+}
+
+status_t status_create(absl_status_t code, uint32_t module_id, const char *file,
+                       int32_t arg) {
+2000321c:                          8836                 mv      a6,a3
+/proc/self/cwd/sw/device/lib/base/status.c:27
+  if (code == kOk) {
+2000321e:                /-------- c121                 beqz    a0,2000325e <status_create+0x42>
+/proc/self/cwd/sw/device/lib/base/status.c:48
+   *  +---+-------+-------+-------+-------------+-------+
+   *
+   * The sign bit is set on all not-Ok statuses, thus proviging a covenient
+   * overloaded return value from functions that may return an error.
+   */
+  if (module_id == 0) {
+20003220:       /--------|-------- e9cd                 bnez    a1,200032d2 <status_create+0xb6>
+20003222:       |     /--|-------> 8732                 mv      a4,a2
+basename():
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+20003224:       |     |  |     /-> 00074583             lbu     a1,0(a4)
+/proc/self/cwd/sw/device/lib/base/status.c:18
+    ++f;
+20003228:       |     |  |     |   0705                 addi    a4,a4,1
+/proc/self/cwd/sw/device/lib/base/status.c:17
+  while (*f)
+2000322a:       |     |  |     \-- fded                 bnez    a1,20003224 <status_create+0x8>
+2000322c:       |     |  |         05c00793             li      a5,92
+20003230:       |     |  |         02f00893             li      a7,47
+20003234:       |     |  |     /-> 85ba                 mv      a1,a4
+/proc/self/cwd/sw/device/lib/base/status.c:20
+  while (f > file && f[-1] != '/' && f[-1] != '\\')
+20003236:       |     |  |     |   177d                 addi    a4,a4,-1
+20003238:       |     |  |  /--|-- 00e67863             bgeu    a2,a4,20003248 <status_create+0x2c>
+2000323c:       |     |  |  |  |   ffe5c683             lbu     a3,-2(a1)
+20003240:       |     |  |  +--|-- 00f68463             beq     a3,a5,20003248 <status_create+0x2c>
+20003244:       |     |  |  |  \-- ff1698e3             bne     a3,a7,20003234 <status_create+0x18>
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    // First three characters of the filename.
+    const char *f = basename(file);
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+20003248:       |     |  |  \----> fff5c603             lbu     a2,-1(a1)
+2000324c:       |     |  |         0e067693             andi    a3,a2,224
+20003250:       |     |  |         04000713             li      a4,64
+20003254:       |     |  |     /-- 00e69b63             bne     a3,a4,2000326a <status_create+0x4e>
+20003258:       |     |  |     |   fc060613             addi    a2,a2,-64
+2000325c:       |     |  |  /--|-- a839                 j       2000327a <status_create+0x5e>
+/proc/self/cwd/sw/device/lib/base/status.c:28
+    if (arg >= 0) {
+2000325e:       |  /--|--\--|--|-X 08085263             bgez    a6,200032e2 <status_create+0xc6>
+20003262:       |  |  |     |  |   02100813             li      a6,33
+20003266:       +--|--|-----|--|-- e5b5                 bnez    a1,200032d2 <status_create+0xb6>
+20003268:       |  |  \-----|--|-- bf6d                 j       20003222 <status_create+0x6>
+/proc/self/cwd/sw/device/lib/base/status.c:51
+    module_id = MAKE_MODULE_ID(f[0], f[1], f[2]);
+2000326a:       |  |        |  \-> fa060613             addi    a2,a2,-96
+2000326e:       |  |        |      0ff67693             andi    a3,a2,255
+20003272:       |  |        |      476d                 li      a4,27
+20003274:       |  |        +----- 00e6e363             bltu    a3,a4,2000327a <status_create+0x5e>
+20003278:       |  |        |      467d                 li      a2,31
+2000327a:       |  |        \----> 0005c683             lbu     a3,0(a1)
+2000327e:       |  |               0e06f713             andi    a4,a3,224
+20003282:       |  |               04000793             li      a5,64
+20003286:       |  |               0642                 slli    a2,a2,0x10
+20003288:       |  |           /-- 00f71563             bne     a4,a5,20003292 <status_create+0x76>
+2000328c:       |  |           |   fc068713             addi    a4,a3,-64
+20003290:       |  |        /--|-- a809                 j       200032a2 <status_create+0x86>
+20003292:       |  |        |  \-> fa068713             addi    a4,a3,-96
+20003296:       |  |        |      0ff77693             andi    a3,a4,255
+2000329a:       |  |        |      47ed                 li      a5,27
+2000329c:       |  |        +----- 00f6e363             bltu    a3,a5,200032a2 <status_create+0x86>
+200032a0:       |  |        |      477d                 li      a4,31
+200032a2:       |  |        \----> 0015c683             lbu     a3,1(a1)
+200032a6:       |  |               01571593             slli    a1,a4,0x15
+200032aa:       |  |               0e06f713             andi    a4,a3,224
+200032ae:       |  |               04000793             li      a5,64
+200032b2:       |  |               8dd1                 or      a1,a1,a2
+200032b4:       |  |           /-- 00f71563             bne     a4,a5,200032be <status_create+0xa2>
+200032b8:       |  |           |   fc068613             addi    a2,a3,-64
+200032bc:       |  |        /--|-- a809                 j       200032ce <status_create+0xb2>
+200032be:       |  |        |  \-> fa068613             addi    a2,a3,-96
+200032c2:       |  |        |      0ff67693             andi    a3,a2,255
+200032c6:       |  |        |      476d                 li      a4,27
+200032c8:       |  |        +----- 00e6e363             bltu    a3,a4,200032ce <status_create+0xb2>
+200032cc:       |  |        |      467d                 li      a2,31
+200032ce:       |  |        \----> 066a                 slli    a2,a2,0x1a
+200032d0:       |  |               8dd1                 or      a1,a1,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200032d2:       \--|-------------> 897d                 andi    a0,a0,31
+200032d4:          |               0856                 slli    a6,a6,0x15
+200032d6:          |               01085613             srli    a2,a6,0x10
+status_create():
+/proc/self/cwd/sw/device/lib/base/status.c:57
+  }
+  // At this point, the module_id is already packed into the correct bitfield.
+  return (status_t){
+      .value = (int32_t)(module_id |
+                         bitfield_bit32_write(0, STATUS_BIT_ERROR, true) |
+                         bitfield_field32_write(0, STATUS_FIELD_CODE, code) |
+200032da:          |               8d4d                 or      a0,a0,a1
+200032dc:          |               8d51                 or      a0,a0,a2
+200032de:          |               29f51813             bseti   a6,a0,0x1f
+/proc/self/cwd/sw/device/lib/base/status.c:60
+                         bitfield_field32_write(0, STATUS_FIELD_ARG,
+                                                (uint32_t)arg))};
+}
+200032e2:          \-------------> 8542                 mv      a0,a6
+200032e4:                          8082                 ret
+
+200032e6 <status_extract>:
+status_err():
+/proc/self/cwd/./sw/device/lib/base/status.h:240
+200032e6:              00052713                 slti    a4,a0,0
+200032ea:              00174713                 xori    a4,a4,1
+200032ee:              01f57813                 andi    a6,a0,31
+200032f2:              00183793                 seqz    a5,a6
+200032f6:              00f768b3                 or      a7,a4,a5
+200032fa:              02000793                 li      a5,32
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:103
+    "ErrorError",
+};
+
+bool status_extract(status_t s, const char **code, int32_t *arg, char *mod_id) {
+  size_t err = (size_t)status_err(s);
+  if (s.value < 0 && err == 0) {
+200032fe:          /-- 00089363                 bnez    a7,20003304 <status_extract+0x1e>
+20003302:          |   87c2                     mv      a5,a6
+20003304:          \-> 177d                     addi    a4,a4,-1
+20003306:              8f7d                     and     a4,a4,a5
+/proc/self/cwd/sw/device/lib/base/status.c:106
+    err = sizeof(status_codes) / sizeof(status_codes[0]) - 1;
+  }
+  *code = status_codes[err];
+20003308:              effff797                 auipc   a5,0xeffff
+2000330c:              ce078793                 addi    a5,a5,-800 # 10001fe8 <status_codes>
+20003310:              20f747b3                 sh2add  a5,a4,a5
+20003314:              439c                     lw      a5,0(a5)
+20003316:              c19c                     sw      a5,0(a1)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+20003318:       /----- cb15                     beqz    a4,2000334c <status_extract+0x66>
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+2000331a:       |      01051593                 slli    a1,a0,0x10
+2000331e:       |      81d5                     srli    a1,a1,0x15
+status_extract():
+/proc/self/cwd/sw/device/lib/base/status.c:108
+    *arg = (int32_t)bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_ARG);
+20003320:       |      c20c                     sw      a1,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:111
+    uint32_t module_id =
+        bitfield_field32_read((uint32_t)s.value, STATUS_FIELD_MODULE_ID);
+    *mod_id++ = '@' + ((module_id >> 0) & 0x1F);
+20003322:       |      00b51593                 slli    a1,a0,0xb
+20003326:       |      81ed                     srli    a1,a1,0x1b
+20003328:       |      04058593                 addi    a1,a1,64
+2000332c:       |      00b68023                 sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:112
+    *mod_id++ = '@' + ((module_id >> 5) & 0x1F);
+20003330:       |      00651593                 slli    a1,a0,0x6
+20003334:       |      81ed                     srli    a1,a1,0x1b
+20003336:       |      04058593                 addi    a1,a1,64
+2000333a:       |      00b680a3                 sb      a1,1(a3)
+/proc/self/cwd/sw/device/lib/base/status.c:113
+    *mod_id++ = '@' + ((module_id >> 10) & 0x1F);
+2000333e:       |      0506                     slli    a0,a0,0x1
+20003340:       |      816d                     srli    a0,a0,0x1b
+20003342:       |      04050513                 addi    a0,a0,64
+20003346:       |      00a68123                 sb      a0,2(a3)
+2000334a:       |  /-- a011                     j       2000334e <status_extract+0x68>
+/proc/self/cwd/sw/device/lib/base/status.c:116
+    return true;
+  } else {
+    *arg = s.value;
+2000334c:       \--|-> c208                     sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/base/status.c:107
+  if (err) {
+2000334e:          \-> 00e03533                 snez    a0,a4
+/proc/self/cwd/sw/device/lib/base/status.c:119
+    return false;
+  }
+}
+20003352:              8082                     ret
+
+20003354 <dif_spi_device_init>:
+dif_spi_device_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:19
+#include "spi_device_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_init(mmio_region_t base_addr,
+                                 dif_spi_device_t *spi_device) {
+  if (spi_device == NULL) {
+20003354:       /----- c581                     beqz    a1,2000335c <dif_spi_device_init+0x8>
+20003356:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:23
+    return kDifBadArg;
+  }
+
+  spi_device->base_addr = base_addr;
+20003358:       |      c188                     sw      a0,0(a1)
+2000335a:       |  /-- a011                     j       2000335e <dif_spi_device_init+0xa>
+2000335c:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:26
+
+  return kDifOk;
+}
+2000335e:          \-> 8532                     mv      a0,a2
+20003360:              8082                     ret
+
+20003362 <dif_spi_device_irq_is_pending>:
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:139
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_is_pending(const dif_spi_device_t *spi_device,
+                                           dif_spi_device_irq_t irq,
+                                           bool *is_pending) {
+  if (spi_device == NULL || is_pending == NULL) {
+20003362:           00153693            seqz    a3,a0
+20003366:           00163713            seqz    a4,a2
+2000336a:           8ed9                        or      a3,a3,a4
+2000336c:           0085b713            sltiu   a4,a1,8
+20003370:           00174713            xori    a4,a4,1
+20003374:           8f55                        or      a4,a4,a3
+20003376:           468d                        li      a3,3
+20003378:       /-- eb01                        bnez    a4,20003388 <dif_spi_device_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:148
+  bitfield_bit32_index_t index;
+  if (!spi_device_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+2000337a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000337c:       |   4108                        lw      a0,0(a0)
+2000337e:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+20003380:       |   48b55533            bext    a0,a0,a1
+dif_spi_device_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:151
+      spi_device->base_addr, (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+20003384:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:154
+
+  return kDifOk;
+}
+20003388:       \-> 8536                        mv      a0,a3
+2000338a:           8082                        ret
+
+2000338c <dif_spi_device_irq_acknowledge>:
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:173
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_spi_device_irq_acknowledge(const dif_spi_device_t *spi_device,
+                                            dif_spi_device_irq_t irq) {
+  if (spi_device == NULL) {
+2000338c:           00a03633            snez    a2,a0
+20003390:           0085b693            sltiu   a3,a1,8
+20003394:           8ef1                        and     a3,a3,a2
+20003396:           460d                        li      a2,3
+20003398:       /-- c691                        beqz    a3,200033a4 <dif_spi_device_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:184
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(spi_device->base_addr,
+2000339a:       |   4108                        lw      a0,0(a0)
+2000339c:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+2000339e:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200033a2:       |   c10c                        sw      a1,0(a0)
+dif_spi_device_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_spi_device_autogen.c:189
+                      (ptrdiff_t)SPI_DEVICE_INTR_STATE_REG_OFFSET,
+                      intr_state_reg);
+
+  return kDifOk;
+}
+200033a4:       \-> 8532                        mv      a0,a2
+200033a6:           8082                        ret
+
+200033a8 <dif_spi_device_init_handle>:
+dif_spi_device_init_handle():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:77
+  return -1u;
+}
+
+dif_result_t dif_spi_device_init_handle(mmio_region_t base_addr,
+                                        dif_spi_device_handle_t *spi) {
+  if (spi == NULL) {
+200033a8:       /-- c191                        beqz    a1,200033ac <dif_spi_device_init_handle+0x4>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:80
+    return kDifBadArg;
+  }
+  return dif_spi_device_init(base_addr, &spi->dev);
+200033aa:       |   b76d                        j       20003354 <dif_spi_device_init>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:81
+}
+200033ac:       \-> 450d                        li      a0,3
+200033ae:           8082                        ret
+
+200033b0 <dif_spi_device_configure>:
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:84
+
+dif_result_t dif_spi_device_configure(dif_spi_device_handle_t *spi,
+                                      dif_spi_device_config_t config) {
+200033b0:           460d                        li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:85
+  if (spi == NULL) {
+200033b2:       /-- c129                        beqz    a0,200033f4 <dif_spi_device_configure+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:89
+    return kDifBadArg;
+  }
+
+  uint32_t device_mode = extract_mode_from_config(config);
+200033b4:       |   4594                        lw      a3,8(a1)
+200033b6:       |   4709                        li      a4,2
+extract_mode_from_config():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:62
+  switch (config.device_mode) {
+200033b8:       +-- 02d76e63            bltu    a4,a3,200033f4 <dif_spi_device_configure+0x44>
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:94
+  if (device_mode == -1u) {
+    return kDifBadArg;
+  }
+
+  uint32_t device_config = build_control_word(config);
+200033bc:       |   4190                        lw      a2,0(a1)
+200033be:       |   41d8                        lw      a4,4(a1)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:49
+                             config.tx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033c0:       |   167d                        addi    a2,a2,-1
+200033c2:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200033c6:       |   060a                        slli    a2,a2,0x2
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033c8:       |   177d                        addi    a4,a4,-1
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:95
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CFG_REG_OFFSET,
+200033ca:       |   411c                        lw      a5,0(a0)
+build_control_word():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:51
+                             config.rx_order == kDifSpiDeviceBitOrderLsbToMsb);
+200033cc:       |   00173713            seqz    a4,a4
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200033d0:       |   070e                        slli    a4,a4,0x3
+200033d2:       |   8e59                        or      a2,a2,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200033d4:       |   cbd0                        sw      a2,20(a5)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:99
+                      device_config);
+
+  uint32_t control =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET);
+200033d6:       |   4110                        lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200033d8:       |   4a18                        lw      a4,16(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200033da:       |   fcf77713            andi    a4,a4,-49
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200033de:       |   06fa                        slli    a3,a3,0x1e
+200033e0:       |   82e9                        srli    a3,a3,0x1a
+200033e2:       |   8ed9                        or      a3,a3,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200033e4:       |   ca14                        sw      a3,16(a2)
+dif_spi_device_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:106
+  control = bitfield_field32_write(control, SPI_DEVICE_CONTROL_MODE_FIELD,
+                                   device_mode);
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_CONTROL_REG_OFFSET,
+                      control);
+
+  spi->config = config;
+200033e6:       |   4590                        lw      a2,8(a1)
+200033e8:       |   c550                        sw      a2,12(a0)
+200033ea:       |   41d0                        lw      a2,4(a1)
+200033ec:       |   c510                        sw      a2,8(a0)
+200033ee:       |   418c                        lw      a1,0(a1)
+200033f0:       |   4601                        li      a2,0
+200033f2:       |   c14c                        sw      a1,4(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:108
+  return kDifOk;
+}
+200033f4:       \-> 8532                        mv      a0,a2
+200033f6:           8082                        ret
+
+200033f8 <dif_spi_device_get_4b_address_mode>:
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:205
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_4b_address_mode(dif_spi_device_handle_t *spi,
+                                                dif_toggle_t *addr_4b) {
+  if (spi == NULL || addr_4b == NULL) {
+200033f8:           00153613            seqz    a2,a0
+200033fc:           0015b693            seqz    a3,a1
+20003400:           8ed1                        or      a3,a3,a2
+20003402:           460d                        li      a2,3
+20003404:       /-- e691                        bnez    a3,20003410 <dif_spi_device_get_4b_address_mode+0x18>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:209
+    return kDifBadArg;
+  }
+  uint32_t cfg_reg =
+      mmio_region_read32(spi->dev.base_addr, SPI_DEVICE_ADDR_MODE_REG_OFFSET);
+20003406:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003408:       |   5108                        lw      a0,32(a0)
+2000340a:       |   4601                        li      a2,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+2000340c:       |   8905                        andi    a0,a0,1
+2000340e:       |   c188                        sw      a0,0(a1)
+dif_spi_device_get_4b_address_mode():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:216
+    *addr_4b = kDifToggleEnabled;
+  } else {
+    *addr_4b = kDifToggleDisabled;
+  }
+  return kDifOk;
+}
+20003410:       \-> 8532                        mv      a0,a2
+20003412:           8082                        ret
+
+20003414 <dif_spi_device_get_last_read_address>:
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:300
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_last_read_address(dif_spi_device_handle_t *spi,
+                                                  uint32_t *address) {
+  if (spi == NULL || address == NULL) {
+20003414:           00153613            seqz    a2,a0
+20003418:           0015b693            seqz    a3,a1
+2000341c:           8ed1                        or      a3,a3,a2
+2000341e:           460d                        li      a2,3
+20003420:       /-- e689                        bnez    a3,2000342a <dif_spi_device_get_last_read_address+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+    return kDifBadArg;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+20003422:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003424:       |   5148                        lw      a0,36(a0)
+20003426:       |   4601                        li      a2,0
+dif_spi_device_get_last_read_address():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:303
+20003428:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:306
+                                SPI_DEVICE_LAST_READ_ADDR_REG_OFFSET);
+  return kDifOk;
+}
+2000342a:       \-> 8532                        mv      a0,a2
+2000342c:           8082                        ret
+
+2000342e <dif_spi_device_set_flash_command_slot>:
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:341
+}
+
+dif_result_t dif_spi_device_set_flash_command_slot(
+    dif_spi_device_handle_t *spi, uint8_t slot, dif_toggle_t enable,
+    dif_spi_device_flash_command_t command_info) {
+  if (spi == NULL || slot >= SPI_DEVICE_PARAM_NUM_CMD_INFO ||
+2000342e:                    00153713           seqz    a4,a0
+20003432:                    0185b793           sltiu   a5,a1,24
+20003436:                    0017c793           xori    a5,a5,1
+2000343a:                    8f5d                       or      a4,a4,a5
+2000343c:                    00263793           sltiu   a5,a2,2
+20003440:                    0017c793           xori    a5,a5,1
+20003444:                    8fd9                       or      a5,a5,a4
+20003446:                    470d                       li      a4,3
+20003448:       /----------- e3ed                       bnez    a5,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:348
+    return kDifBadArg;
+  }
+  ptrdiff_t reg_offset =
+      SPI_DEVICE_CMD_INFO_0_REG_OFFSET + slot * sizeof(uint32_t);
+  uint32_t reg_val = 0;
+  if (enable == kDifToggleDisabled) {
+2000344a:       |  /-------- ca79                       beqz    a2,20003520 <dif_spi_device_set_flash_command_slot+0xf2>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:354
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, false);
+  } else {
+    // Validate command info parameters.
+    uint32_t address_mode;
+    switch (command_info.address_type) {
+2000344c:       |  |         42dc                       lw      a5,4(a3)
+2000344e:       |  |         470d                       li      a4,3
+20003450:       +--|-------- 0cf76d63           bltu    a4,a5,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:370
+        address_mode = SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_VALUE_ADDR4B;
+        break;
+      default:
+        return kDifBadArg;
+    }
+    if (command_info.dummy_cycles >
+20003454:       |  |         0086c283           lbu     t0,8(a3)
+20003458:       |  |         4621                       li      a2,8
+2000345a:       +--|-------- 0c566863           bltu    a2,t0,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+        (1u + SPI_DEVICE_CMD_INFO_0_DUMMY_SIZE_0_MASK)) {
+      return kDifBadArg;
+    }
+
+    uint32_t payload_en;
+    switch (command_info.payload_io_type) {
+2000345e:       |  |         00c6a383           lw      t2,12(a3)
+20003462:       |  |         4609                       li      a2,2
+20003464:       |  |     /-- 00764f63           blt     a2,t2,20003482 <dif_spi_device_set_flash_command_slot+0x54>
+20003468:       |  |     |   881e                       mv      a6,t2
+2000346a:       |  |  /--|-- 02038763           beqz    t2,20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+2000346e:       |  |  |  |   4605                       li      a2,1
+20003470:       +--|--|--|-- 0ac39d63           bne     t2,a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:381
+      case kDifSpiDevicePayloadIoNone:
+        payload_en = 0x0;
+        break;
+      case kDifSpiDevicePayloadIoSingle:
+        if (command_info.payload_dir_to_host) {
+20003474:       |  |  |  |   0116c603           lbu     a2,17(a3)
+20003478:       |  |  |  |   6841                       lui     a6,0x10
+2000347a:       |  |  +--|-- ce19                       beqz    a2,20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+2000347c:       |  |  |  |   00020837           lui     a6,0x20
+20003480:       |  |  +--|-- a821                       j       20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+20003482:       |  |  |  \-> 460d                       li      a2,3
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:376
+    switch (command_info.payload_io_type) {
+20003484:       |  |  |  /-- 00c38863           beq     t2,a2,20003494 <dif_spi_device_set_flash_command_slot+0x66>
+20003488:       |  |  |  |   463d                       li      a2,15
+2000348a:       +--|--|--|-- 0ac39063           bne     t2,a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+2000348e:       |  |  |  |   000f0837           lui     a6,0xf0
+20003492:       |  |  +--|-- a019                       j       20003498 <dif_spi_device_set_flash_command_slot+0x6a>
+20003494:       |  |  |  \-> 00030837           lui     a6,0x30
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:398
+      default:
+        return kDifBadArg;
+    }
+
+    uint32_t read_pipeline_mode;
+    switch (command_info.read_pipeline_mode) {
+20003498:       |  |  \----> 0146a883           lw      a7,20(a3)
+2000349c:       |  |         4609                       li      a2,2
+2000349e:       +--|-------- 09166663           bltu    a2,a7,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:416
+      default:
+        return kDifBadArg;
+    }
+
+    // Check for invalid argument combinations.
+    if (command_info.payload_swap_enable &&
+200034a2:       |  |         0126c303           lbu     t1,18(a3)
+200034a6:       |  |     /-- 00030963           beqz    t1,200034b8 <dif_spi_device_set_flash_command_slot+0x8a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:417
+        (command_info.payload_dir_to_host ||
+200034aa:       |  |     |   0116ce03           lbu     t3,17(a3)
+200034ae:       |  |     |   0013c613           xori    a2,t2,1
+200034b2:       |  |     |   01c66633           or      a2,a2,t3
+200034b6:       +--|-----|-- ea35                       bnez    a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:421
+         command_info.payload_io_type != kDifSpiDevicePayloadIoSingle)) {
+      return kDifBadArg;
+    }
+    if (command_info.passthrough_swap_address &&
+200034b8:       |  |     \-> 0106c383           lbu     t2,16(a3)
+200034bc:       |  |         00703e33           snez    t3,t2
+200034c0:       |  |         0017b613           seqz    a2,a5
+200034c4:       |  |         00ce7633           and     a2,t3,a2
+200034c8:       +--|-------- e22d                       bnez    a2,2000352a <dif_spi_device_set_flash_command_slot+0xfc>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:428
+      return kDifBadArg;
+    }
+
+    // Write the command info values.
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_OPCODE_0_FIELD, command_info.opcode);
+200034ca:       |  |         0006c603           lbu     a2,0(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034ce:       |  |         07fa                       slli    a5,a5,0x1e
+200034d0:       |  |         83d9                       srli    a5,a5,0x16
+200034d2:       |  |         03aa                       slli    t2,t2,0xa
+200034d4:       |  |         00766633           or      a2,a2,t2
+200034d8:       |  |         8e5d                       or      a2,a2,a5
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:434
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_MODE_0_FIELD, address_mode);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_ADDR_SWAP_EN_0_BIT,
+                             command_info.passthrough_swap_address);
+    if (command_info.dummy_cycles > 0) {
+200034da:       |  |     /-- 00028963           beqz    t0,200034ec <dif_spi_device_set_flash_command_slot+0xbe>
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+200034de:       |  |     |   12fd                       addi    t0,t0,-1
+200034e0:       |  |     |   0072f713           andi    a4,t0,7
+200034e4:       |  |     |   0732                       slli    a4,a4,0xc
+200034e6:       |  |     |   8e59                       or      a2,a2,a4
+200034e8:       |  |     |   28f61613           bseti   a2,a2,0xf
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:445
+    }
+    reg_val = bitfield_field32_write(
+        reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_EN_0_FIELD, payload_en);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_PAYLOAD_DIR_0_BIT,
+                             command_info.payload_dir_to_host);
+200034ec:       |  |     \-> 0116c703           lbu     a4,17(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+200034f0:       |  |         080642b3           pack    t0,a2,zero
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+200034f4:       |  |         0752                       slli    a4,a4,0x14
+200034f6:       |  |         01076733           or      a4,a4,a6
+200034fa:       |  |         0356                       slli    t1,t1,0x15
+200034fc:       |  |         00676733           or      a4,a4,t1
+bitfield_bit32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:138
+OT_WARN_UNUSED_RESULT
+inline uint32_t bitfield_bit32_write(uint32_t bitfield,
+                                     bitfield_bit32_index_t bit_index,
+                                     bool value) {
+  return bitfield_field32_write(bitfield, bitfield_bit32_to_field32(bit_index),
+                                value ? 0x1u : 0x0u);
+20003500:       |  |         01868783           lb      a5,24(a3)
+20003504:       |  |         01968683           lb      a3,25(a3)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003508:       |  |         08fa                       slli    a7,a7,0x1e
+2000350a:       |  |         0088d613           srli    a2,a7,0x8
+2000350e:       |  |         07e2                       slli    a5,a5,0x18
+20003510:       |  |         06e6                       slli    a3,a3,0x19
+20003512:       |  |         8e59                       or      a2,a2,a4
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003514:       |  |         00566633           or      a2,a2,t0
+20003518:       |  |         8edd                       or      a3,a3,a5
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+2000351a:       |  |         8e55                       or      a2,a2,a3
+2000351c:       |  |         29f61613           bseti   a2,a2,0x1f
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:459
+    reg_val = bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_BUSY_0_BIT,
+                                   command_info.set_busy_status);
+    reg_val =
+        bitfield_bit32_write(reg_val, SPI_DEVICE_CMD_INFO_0_VALID_0_BIT, true);
+  }
+  mmio_region_write32(spi->dev.base_addr, reg_offset, reg_val);
+20003520:       |  \-------> 4108                       lw      a0,0(a0)
+20003522:       |            4701                       li      a4,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003524:       |            20a5c533           sh2add  a0,a1,a0
+20003528:       |            dd70                       sw      a2,124(a0)
+dif_spi_device_set_flash_command_slot():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:461
+  return kDifOk;
+}
+2000352a:       \----------> 853a                       mv      a0,a4
+2000352c:                    8082                       ret
+
+2000352e <dif_spi_device_get_flash_command_fifo_occupancy>:
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:640
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_get_flash_command_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+2000352e:           00153613            seqz    a2,a0
+20003532:           0015b693            seqz    a3,a1
+20003536:           8ed1                        or      a3,a3,a2
+20003538:           460d                        li      a2,3
+2000353a:       /-- e699                        bnez    a3,20003548 <dif_spi_device_get_flash_command_fifo_occupancy+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:643
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+2000353c:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000353e:       |   5d48                        lw      a0,60(a0)
+20003540:       |   4601                        li      a2,0
+dif_spi_device_get_flash_command_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:645
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+20003542:       |   897d                        andi    a0,a0,31
+20003544:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:648
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+20003548:       \-> 8532                        mv      a0,a2
+2000354a:           8082                        ret
+
+2000354c <dif_spi_device_get_flash_address_fifo_occupancy>:
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:652
+
+dif_result_t dif_spi_device_get_flash_address_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint8_t *occupancy) {
+  if (spi == NULL || occupancy == NULL) {
+2000354c:           00153613            seqz    a2,a0
+20003550:           0015b693            seqz    a3,a1
+20003554:           8ed1                        or      a3,a3,a2
+20003556:           460d                        li      a2,3
+20003558:       /-- ea81                        bnez    a3,20003568 <dif_spi_device_get_flash_address_fifo_occupancy+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:655
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+2000355a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000355c:       |   5d48                        lw      a0,60(a0)
+2000355e:       |   4601                        li      a2,0
+dif_spi_device_get_flash_address_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:657
+                                        SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  *occupancy = (uint8_t)bitfield_field32_read(
+20003560:       |   054e                        slli    a0,a0,0x13
+20003562:       |   816d                        srli    a0,a0,0x1b
+20003564:       |   00a58023            sb      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:660
+      reg_val, SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_DEPTH_FIELD);
+  return kDifOk;
+}
+20003568:       \-> 8532                        mv      a0,a2
+2000356a:           8082                        ret
+
+2000356c <dif_spi_device_get_flash_payload_fifo_occupancy>:
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:664
+
+dif_result_t dif_spi_device_get_flash_payload_fifo_occupancy(
+    dif_spi_device_handle_t *spi, uint16_t *occupancy, uint32_t *start_offset) {
+  if (spi == NULL || occupancy == NULL || start_offset == NULL) {
+2000356c:           00153693            seqz    a3,a0
+20003570:           0015b713            seqz    a4,a1
+20003574:           8ed9                        or      a3,a3,a4
+20003576:           00163713            seqz    a4,a2
+2000357a:           8f55                        or      a4,a4,a3
+2000357c:           468d                        li      a3,3
+2000357e:       /-- eb19                        bnez    a4,20003594 <dif_spi_device_get_flash_payload_fifo_occupancy+0x28>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:667
+    return kDifBadArg;
+  }
+  uint32_t reg_val = mmio_region_read32(spi->dev.base_addr,
+20003580:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003582:       |   4128                        lw      a0,64(a0)
+20003584:       |   4681                        li      a3,0
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:669
+                                        SPI_DEVICE_UPLOAD_STATUS2_REG_OFFSET);
+  *occupancy = (uint16_t)bitfield_field32_read(
+20003586:       |   1ff57713            andi    a4,a0,511
+2000358a:       |   00e59023            sh      a4,0(a1)
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+2000358e:       |   0522                        slli    a0,a0,0x8
+20003590:       |   8161                        srli    a0,a0,0x18
+dif_spi_device_get_flash_payload_fifo_occupancy():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:671
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_DEPTH_FIELD);
+  *start_offset = bitfield_field32_read(
+20003592:       |   c208                        sw      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:674
+      reg_val, SPI_DEVICE_UPLOAD_STATUS2_PAYLOAD_START_IDX_FIELD);
+  return kDifOk;
+}
+20003594:       \-> 8536                        mv      a0,a3
+20003596:           8082                        ret
+
+20003598 <dif_spi_device_pop_flash_command_fifo>:
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:678
+
+// TODO: Does the IP handle overrun / underrun correctly?
+dif_result_t dif_spi_device_pop_flash_command_fifo(dif_spi_device_handle_t *spi,
+                                                   uint8_t *command) {
+20003598:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:679
+  if (spi == NULL || command == NULL) {
+2000359a:           00153513            seqz    a0,a0
+2000359e:           0015b693            seqz    a3,a1
+200035a2:           8ec9                        or      a3,a3,a0
+200035a4:           450d                        li      a0,3
+200035a6:       /-- ea99                        bnez    a3,200035bc <dif_spi_device_pop_flash_command_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:682
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+200035a8:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035aa:       |   5e48                        lw      a0,60(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+200035ac:       |   08057693            andi    a3,a0,128
+200035b0:       |   4539                        li      a0,14
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:684
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+200035b2:       +-- c689                        beqz    a3,200035bc <dif_spi_device_pop_flash_command_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035b4:       |   4270                        lw      a2,68(a2)
+200035b6:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_command_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:690
+                           SPI_DEVICE_UPLOAD_STATUS_CMDFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  uint32_t cmd_item = mmio_region_read32(spi->dev.base_addr,
+                                         SPI_DEVICE_UPLOAD_CMDFIFO_REG_OFFSET);
+  *command = (uint8_t)bitfield_field32_read(
+200035b8:       |   00c58023            sb      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:693
+      cmd_item, SPI_DEVICE_UPLOAD_CMDFIFO_DATA_FIELD);
+  return kDifOk;
+}
+200035bc:       \-> 8082                        ret
+
+200035be <dif_spi_device_pop_flash_address_fifo>:
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:696
+
+dif_result_t dif_spi_device_pop_flash_address_fifo(dif_spi_device_handle_t *spi,
+                                                   uint32_t *address) {
+200035be:           862a                        mv      a2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:697
+  if (spi == NULL || address == NULL) {
+200035c0:           00153513            seqz    a0,a0
+200035c4:           0015b693            seqz    a3,a1
+200035c8:           8ec9                        or      a3,a3,a0
+200035ca:           450d                        li      a0,3
+200035cc:       /-- ea99                        bnez    a3,200035e2 <dif_spi_device_pop_flash_address_fifo+0x24>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:700
+    return kDifBadArg;
+  }
+  uint32_t upload_status = mmio_region_read32(
+200035ce:       |   4210                        lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035d0:       |   5e48                        lw      a0,60(a2)
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:702
+      spi->dev.base_addr, SPI_DEVICE_UPLOAD_STATUS_REG_OFFSET);
+  if (!bitfield_bit32_read(upload_status,
+200035d2:       |   01051693            slli    a3,a0,0x10
+200035d6:       |   4539                        li      a0,14
+200035d8:       +-- 0006d563            bgez    a3,200035e2 <dif_spi_device_pop_flash_address_fifo+0x24>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200035dc:       |   4630                        lw      a2,72(a2)
+200035de:       |   4501                        li      a0,0
+dif_spi_device_pop_flash_address_fifo():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:706
+                           SPI_DEVICE_UPLOAD_STATUS_ADDRFIFO_NOTEMPTY_BIT)) {
+    return kDifUnavailable;
+  }
+  *address = mmio_region_read32(spi->dev.base_addr,
+200035e0:       |   c190                        sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:709
+                                SPI_DEVICE_UPLOAD_ADDRFIFO_REG_OFFSET);
+  return kDifOk;
+}
+200035e2:       \-> 8082                        ret
+
+200035e4 <dif_spi_device_read_flash_payload_buffer>:
+dif_spi_device_read_flash_payload_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:740
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_read_flash_payload_buffer(
+    dif_spi_device_handle_t *spi, uint32_t offset, size_t length,
+    uint8_t *buf) {
+200035e4:           8732                        mv      a4,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:741
+  if (spi == NULL || buf == NULL) {
+200035e6:           00153613            seqz    a2,a0
+200035ea:           0016b793            seqz    a5,a3
+200035ee:           8fd1                        or      a5,a5,a2
+200035f0:           460d                        li      a2,3
+200035f2:       /-- eb9d                        bnez    a5,20003628 <dif_spi_device_read_flash_payload_buffer+0x44>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:748
+  }
+  const dif_spi_device_buffer_info_t info = {
+      .buffer_len = kDifSpiDevicePayloadLen,
+      .buffer_offset = kDifSpiDevicePayloadOffset,
+  };
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+200035f4:       |   1005b793            sltiu   a5,a1,256
+200035f8:       |   0017c813            xori    a6,a5,1
+200035fc:       |   10000793            li      a5,256
+20003600:       |   8f8d                        sub     a5,a5,a1
+20003602:       |   00e7b7b3            sltu    a5,a5,a4
+20003606:       |   00f867b3            or      a5,a6,a5
+2000360a:       +-- ef99                        bnez    a5,20003628 <dif_spi_device_read_flash_payload_buffer+0x44>
+2000360c:       |   1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_INGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000360e:       |   c606                        sw      ra,12(sp)
+20003610:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:754
+                               info.buffer_offset + (ptrdiff_t)offset;
+20003612:       |   78000613            li      a2,1920
+20003616:       |   20b645b3            sh2add  a1,a2,a1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:755
+  mmio_region_memcpy_from_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000361a:       |   8636                        mv      a2,a3
+2000361c:       |   86ba                        mv      a3,a4
+2000361e:       |   1b7000ef            jal     ra,20003fd4 <mmio_region_memcpy_from_mmio32>
+20003622:       |   4601                        li      a2,0
+20003624:       |   40b2                        lw      ra,12(sp)
+20003626:       |   0141                        addi    sp,sp,16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:758
+                                 buf, length);
+  return kDifOk;
+}
+20003628:       \-> 8532                        mv      a0,a2
+2000362a:           8082                        ret
+
+2000362c <dif_spi_device_write_flash_buffer>:
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:763
+
+dif_result_t dif_spi_device_write_flash_buffer(
+    dif_spi_device_handle_t *spi,
+    dif_spi_device_flash_buffer_type_t buffer_type, uint32_t offset,
+    size_t length, const uint8_t *buf) {
+2000362c:           1141                        addi    sp,sp,-16
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:764
+  if (spi == NULL || buf == NULL) {
+2000362e:           c606                        sw      ra,12(sp)
+20003630:           00153813            seqz    a6,a0
+20003634:           00173793            seqz    a5,a4
+20003638:           00f86833            or      a6,a6,a5
+2000363c:           0035b793            sltiu   a5,a1,3
+20003640:           0017c793            xori    a5,a5,1
+20003644:           00f867b3            or      a5,a6,a5
+20003648:           480d                        li      a6,3
+2000364a:       /-- e7a9                        bnez    a5,20003694 <dif_spi_device_write_flash_buffer+0x68>
+dif_spi_device_get_flash_buffer_info():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:719
+  switch (buffer_type) {
+2000364c:       |   00003797            auipc   a5,0x3
+20003650:       |   c3c78793            addi    a5,a5,-964 # 20006288 <MODULE_ID+0x198>
+20003654:       |   20f5c7b3            sh2add  a5,a1,a5
+20003658:       |   0007a883            lw      a7,0(a5)
+2000365c:       |   00003797            auipc   a5,0x3
+20003660:       |   c3878793            addi    a5,a5,-968 # 20006294 <MODULE_ID+0x1a4>
+20003664:       |   20f5c5b3            sh2add  a1,a1,a5
+20003668:       |   0005a283            lw      t0,0(a1)
+dif_spi_device_write_flash_buffer():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:773
+  dif_result_t status =
+      dif_spi_device_get_flash_buffer_info(buffer_type, &info);
+  if (status != kDifOk) {
+    return status;
+  }
+  if (offset >= (info.buffer_offset + (ptrdiff_t)info.buffer_len) ||
+2000366c:       |   9896                        add     a7,a7,t0
+2000366e:       |   011637b3            sltu    a5,a2,a7
+20003672:       |   0017c793            xori    a5,a5,1
+20003676:       |   40c885b3            sub     a1,a7,a2
+2000367a:       |   00d5b5b3            sltu    a1,a1,a3
+2000367e:       |   8ddd                        or      a1,a1,a5
+20003680:       +-- e991                        bnez    a1,20003694 <dif_spi_device_write_flash_buffer+0x68>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+                (ptrdiff_t)offset)) {
+    return kDifBadArg;
+  }
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+                               info.buffer_offset + (ptrdiff_t)offset;
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+20003682:       |   4108                        lw      a0,0(a0)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:778
+  ptrdiff_t offset_from_base = SPI_DEVICE_EGRESS_BUFFER_REG_OFFSET +
+20003684:       |   005605b3            add     a1,a2,t0
+20003688:       |   6605                        lui     a2,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:779
+                               info.buffer_offset + (ptrdiff_t)offset;
+2000368a:       |   95b2                        add     a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:780
+  mmio_region_memcpy_to_mmio32(spi->dev.base_addr, (uint32_t)offset_from_base,
+2000368c:       |   863a                        mv      a2,a4
+2000368e:       |   1ff000ef            jal     ra,2000408c <mmio_region_memcpy_to_mmio32>
+20003692:       |   4801                        li      a6,0
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:783
+                               buf, length);
+  return kDifOk;
+}
+20003694:       \-> 8542                        mv      a0,a6
+20003696:           40b2                        lw      ra,12(sp)
+20003698:           0141                        addi    sp,sp,16
+2000369a:           8082                        ret
+
+2000369c <dif_spi_device_set_flash_status_registers>:
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:849
+  return kDifOk;
+}
+
+dif_result_t dif_spi_device_set_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t value) {
+  if (spi == NULL) {
+2000369c:       /-- c509                        beqz    a0,200036a6 <dif_spi_device_set_flash_status_registers+0xa>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:852
+    return kDifBadArg;
+  }
+  mmio_region_write32(spi->dev.base_addr, SPI_DEVICE_FLASH_STATUS_REG_OFFSET,
+2000369e:       |   4110                        lw      a2,0(a0)
+200036a0:       |   4501                        li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200036a2:       |   d60c                        sw      a1,40(a2)
+dif_spi_device_set_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:855
+                      value);
+  return kDifOk;
+}
+200036a4:       |   8082                        ret
+200036a6:       \-> 450d                        li      a0,3
+200036a8:           8082                        ret
+
+200036aa <dif_spi_device_get_flash_status_registers>:
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:859
+
+dif_result_t dif_spi_device_get_flash_status_registers(
+    dif_spi_device_handle_t *spi, uint32_t *value) {
+  if (spi == NULL || value == NULL) {
+200036aa:           00153613            seqz    a2,a0
+200036ae:           0015b693            seqz    a3,a1
+200036b2:           8ed1                        or      a3,a3,a2
+200036b4:           460d                        li      a2,3
+200036b6:       /-- e689                        bnez    a3,200036c0 <dif_spi_device_get_flash_status_registers+0x16>
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+    return kDifBadArg;
+  }
+  *value = mmio_region_read32(spi->dev.base_addr,
+200036b8:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200036ba:       |   5508                        lw      a0,40(a0)
+200036bc:       |   4601                        li      a2,0
+dif_spi_device_get_flash_status_registers():
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:862
+200036be:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_spi_device.c:865
+                              SPI_DEVICE_FLASH_STATUS_REG_OFFSET);
+  return kDifOk;
+}
+200036c0:       \-> 8532                        mv      a0,a2
+200036c2:           8082                        ret
+
+200036c4 <dif_uart_init>:
+dif_uart_init():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:18
+
+#include "uart_regs.h"  // Generated.
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_init(mmio_region_t base_addr, dif_uart_t *uart) {
+  if (uart == NULL) {
+200036c4:       /----- c581                     beqz    a1,200036cc <dif_uart_init+0x8>
+200036c6:       |      4601                     li      a2,0
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:22
+    return kDifBadArg;
+  }
+
+  uart->base_addr = base_addr;
+200036c8:       |      c188                     sw      a0,0(a1)
+200036ca:       |  /-- a011                     j       200036ce <dif_uart_init+0xa>
+200036cc:       \--|-> 460d                     li      a2,3
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:25
+
+  return kDifOk;
+}
+200036ce:          \-> 8532                     mv      a0,a2
+200036d0:              8082                     ret
+
+200036d2 <dif_uart_irq_is_pending>:
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:136
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_is_pending(const dif_uart_t *uart, dif_uart_irq_t irq,
+                                     bool *is_pending) {
+  if (uart == NULL || is_pending == NULL) {
+200036d2:           00153693            seqz    a3,a0
+200036d6:           00163713            seqz    a4,a2
+200036da:           8ed9                        or      a3,a3,a4
+200036dc:           0095b713            sltiu   a4,a1,9
+200036e0:           00174713            xori    a4,a4,1
+200036e4:           8f55                        or      a4,a4,a3
+200036e6:           468d                        li      a3,3
+200036e8:       /-- eb01                        bnez    a4,200036f8 <dif_uart_irq_is_pending+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:145
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_state_reg = mmio_region_read32(
+200036ea:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200036ec:       |   4108                        lw      a0,0(a0)
+200036ee:       |   4681                        li      a3,0
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200036f0:       |   48b55533            bext    a0,a0,a1
+dif_uart_irq_is_pending():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:148
+      uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET);
+
+  *is_pending = bitfield_bit32_read(intr_state_reg, index);
+200036f4:       |   00a60023            sb      a0,0(a2)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:151
+
+  return kDifOk;
+}
+200036f8:       \-> 8536                        mv      a0,a3
+200036fa:           8082                        ret
+
+200036fc <dif_uart_irq_acknowledge>:
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:169
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_acknowledge(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq) {
+  if (uart == NULL) {
+200036fc:           00a03633            snez    a2,a0
+20003700:           0095b693            sltiu   a3,a1,9
+20003704:           8ef1                        and     a3,a3,a2
+20003706:           460d                        li      a2,3
+20003708:       /-- c691                        beqz    a3,20003714 <dif_uart_irq_acknowledge+0x18>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:180
+    return kDifBadArg;
+  }
+
+  // Writing to the register clears the corresponding bits (Write-one clear).
+  uint32_t intr_state_reg = bitfield_bit32_write(0, index, true);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_STATE_REG_OFFSET,
+2000370a:       |   4108                        lw      a0,0(a0)
+2000370c:       |   4601                        li      a2,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+2000370e:       |   28b015b3            bset    a1,zero,a1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003712:       |   c10c                        sw      a1,0(a0)
+dif_uart_irq_acknowledge():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:184
+                      intr_state_reg);
+
+  return kDifOk;
+}
+20003714:       \-> 8532                        mv      a0,a2
+20003716:           8082                        ret
+
+20003718 <dif_uart_irq_set_enabled>:
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:229
+}
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_set_enabled(const dif_uart_t *uart,
+                                      dif_uart_irq_t irq, dif_toggle_t state) {
+  if (uart == NULL) {
+20003718:           00a036b3            snez    a3,a0
+2000371c:           0095b713            sltiu   a4,a1,9
+20003720:           8f75                        and     a4,a4,a3
+20003722:           468d                        li      a3,3
+20003724:       /-- cf09                        beqz    a4,2000373e <dif_uart_irq_set_enabled+0x26>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:238
+  bitfield_bit32_index_t index;
+  if (!uart_get_irq_bit_index(irq, &index)) {
+    return kDifBadArg;
+  }
+
+  uint32_t intr_enable_reg = mmio_region_read32(
+20003726:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003728:       |   4158                        lw      a4,4(a0)
+2000372a:       |   4681                        li      a3,0
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:241
+      uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+
+  bool enable_bit = (state == kDifToggleEnabled) ? true : false;
+2000372c:       |   167d                        addi    a2,a2,-1
+2000372e:       |   00163613            seqz    a2,a2
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+20003732:       |   48b71733            bclr    a4,a4,a1
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003736:       |   00b615b3            sll     a1,a2,a1
+2000373a:       |   8dd9                        or      a1,a1,a4
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+2000373c:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_set_enabled():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:247
+  intr_enable_reg = bitfield_bit32_write(intr_enable_reg, index, enable_bit);
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      intr_enable_reg);
+
+  return kDifOk;
+}
+2000373e:       \-> 8536                        mv      a0,a3
+20003740:           8082                        ret
+
+20003742 <dif_uart_irq_disable_all>:
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:252
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_disable_all(
+    const dif_uart_t *uart, dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL) {
+20003742:       /----- c911                     beqz    a0,20003756 <dif_uart_irq_disable_all+0x14>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:257
+    return kDifBadArg;
+  }
+
+  // Pass the current interrupt state to the caller, if requested.
+  if (snapshot != NULL) {
+20003744:       |  /-- c581                     beqz    a1,2000374c <dif_uart_irq_disable_all+0xa>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+    *snapshot = mmio_region_read32(uart->base_addr,
+20003746:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003748:       |  |   4250                     lw      a2,4(a2)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:258
+2000374a:       |  |   c190                     sw      a2,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:263
+                                   (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET);
+  }
+
+  // Disable all interrupts.
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+2000374c:       |  \-> 410c                     lw      a1,0(a0)
+2000374e:       |      4501                     li      a0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003750:       |      0005a223                 sw      zero,4(a1)
+dif_uart_irq_disable_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:267
+                      0u);
+
+  return kDifOk;
+}
+20003754:       |      8082                     ret
+20003756:       \----> 450d                     li      a0,3
+20003758:              8082                     ret
+
+2000375a <dif_uart_irq_restore_all>:
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:272
+
+OT_WARN_UNUSED_RESULT
+dif_result_t dif_uart_irq_restore_all(
+    const dif_uart_t *uart, const dif_uart_irq_enable_snapshot_t *snapshot) {
+  if (uart == NULL || snapshot == NULL) {
+2000375a:           00153613            seqz    a2,a0
+2000375e:           0015b693            seqz    a3,a1
+20003762:           8ed1                        or      a3,a3,a2
+20003764:           460d                        li      a2,3
+20003766:       /-- e689                        bnez    a3,20003770 <dif_uart_irq_restore_all+0x16>
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:277
+    return kDifBadArg;
+  }
+
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+                      *snapshot);
+20003768:       |   418c                        lw      a1,0(a1)
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:276
+  mmio_region_write32(uart->base_addr, (ptrdiff_t)UART_INTR_ENABLE_REG_OFFSET,
+2000376a:       |   4108                        lw      a0,0(a0)
+2000376c:       |   4601                        li      a2,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000376e:       |   c14c                        sw      a1,4(a0)
+dif_uart_irq_restore_all():
+/proc/self/cwd/sw/device/lib/dif/autogen/dif_uart_autogen.c:280
+
+  return kDifOk;
+}
+20003770:       \-> 8532                        mv      a0,a2
+20003772:           8082                        ret
+
+20003774 <dif_uart_configure>:
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:92
+
+  return bytes_read;
+}
+
+dif_result_t dif_uart_configure(const dif_uart_t *uart,
+                                dif_uart_config_t config) {
+20003774:                 1141                  addi    sp,sp,-16
+20003776:                 c606                  sw      ra,12(sp)
+20003778:                 c422                  sw      s0,8(sp)
+2000377a:                 c226                  sw      s1,4(sp)
+2000377c:                 c04a                  sw      s2,0(sp)
+2000377e:                 440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+20003780:       /-------- c961                  beqz    a0,20003850 <dif_uart_configure+0xdc>
+20003782:       |         84ae                  mv      s1,a1
+20003784:       |         418c                  lw      a1,0(a1)
+20003786:       +-------- c5e9                  beqz    a1,20003850 <dif_uart_configure+0xdc>
+20003788:       |         40d0                  lw      a2,4(s1)
+2000378a:       +-------- c279                  beqz    a2,20003850 <dif_uart_configure+0xdc>
+2000378c:       |         892a                  mv      s2,a0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:94
+      !dif_is_valid_toggle(config.tx_enable) ||
+2000378e:       |         4894                  lw      a3,16(s1)
+20003790:       |         4505                  li      a0,1
+20003792:       +-------- 0ad56f63              bltu    a0,a3,20003850 <dif_uart_configure+0xdc>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:95
+      !dif_is_valid_toggle(config.rx_enable)) {
+20003796:       |         48d4                  lw      a3,20(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:93
+  if (uart == NULL || config.baudrate == 0 || config.clk_freq_hz == 0 ||
+20003798:       +-------- 0ad56c63              bltu    a0,a3,20003850 <dif_uart_configure+0xdc>
+2000379c:       |         0016e537              lui     a0,0x16e
+200037a0:       |         36050513              addi    a0,a0,864 # 16e360 <_ottf_size+0xee360>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:117
+  // 2^4 should be multiplied.
+  // If uart baud rate is 1.5Mbps and IO is 24Mhz, NCO is 0x10000, which is over
+  // the NCO width, use NCO = 0xffff for this case since the error is tolerable.
+  // Refer to #4263
+  uint64_t nco =
+      ((uint64_t)config.baudrate == 1500000 && config.clk_freq_hz == 24000000)
+200037a4:       |         8d2d                  xor     a0,a0,a1
+200037a6:       |         016e36b7              lui     a3,0x16e3
+200037aa:       |         60068693              addi    a3,a3,1536 # 16e3600 <_ottf_size+0x1663600>
+200037ae:       |         8eb1                  xor     a3,a3,a2
+200037b0:       |         8d55                  or      a0,a0,a3
+200037b2:       |     /-- e501                  bnez    a0,200037ba <dif_uart_configure+0x46>
+200037b4:       |     |   6541                  lui     a0,0x10
+200037b6:       |     |   157d                  addi    a0,a0,-1
+200037b8:       |  /--|-- a831                  j       200037d4 <dif_uart_configure+0x60>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:119
+          ? 0xffff
+          : udiv64_slow((uint64_t)config.baudrate << (nco_width + 4),
+200037ba:       |  |  \-> 01459513              slli    a0,a1,0x14
+200037be:       |  |      81b1                  srli    a1,a1,0xc
+200037c0:       |  |      4681                  li      a3,0
+200037c2:       |  |      4701                  li      a4,0
+200037c4:       |  |      319000ef              jal     ra,200042dc <udiv64_slow>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:124
+                        config.clk_freq_hz, NULL);
+  uint32_t nco_masked = nco & UART_CTRL_NCO_MASK;
+
+  // Requested baudrate is too high for the given clock frequency.
+  if (nco != nco_masked) {
+200037c8:       |  |      01055613              srli    a2,a0,0x10
+200037cc:       |  |      8dd1                  or      a1,a1,a2
+200037ce:       +--|----- e1c9                  bnez    a1,20003850 <dif_uart_configure+0xdc>
+200037d0:       |  |      08054533              pack    a0,a0,zero
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:129
+    return kDifBadArg;
+  }
+
+  // Check requested RXBLVL is within bounds.
+  uint32_t rxblvl = config.rx_break_level;
+200037d4:       |  \----> 4c8c                  lw      a1,24(s1)
+200037d6:       |         440d                  li      s0,3
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:130
+  if ((rxblvl & UART_CTRL_RXBLVL_MASK) != rxblvl) {
+200037d8:       +-------- 06b46c63              bltu    s0,a1,20003850 <dif_uart_configure+0xdc>
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:48
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, 0u);
+200037dc:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037e0:       |         00062823              sw      zero,16(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:54
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+200037e4:       |         00092603              lw      a2,0(s2)
+200037e8:       |         468d                  li      a3,3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037ea:       |         d214                  sw      a3,32(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:56
+  mmio_region_write32(uart->base_addr, UART_OVRD_REG_OFFSET, 0u);
+200037ec:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037f0:       |         02062423              sw      zero,40(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:57
+  mmio_region_write32(uart->base_addr, UART_TIMEOUT_CTRL_REG_OFFSET, 0u);
+200037f4:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+200037f8:       |         02062823              sw      zero,48(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:58
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+200037fc:       |         00092603              lw      a2,0(s2)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003800:       |         00062223              sw      zero,4(a2)
+uart_reset():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:59
+  mmio_region_write32(uart->base_addr, UART_INTR_STATE_REG_OFFSET,
+20003804:       |         00092603              lw      a2,0(s2)
+20003808:       |         56fd                  li      a3,-1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000380a:       |         c214                  sw      a3,0(a2)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+2000380c:       |         0542                  slli    a0,a0,0x10
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+
+  // Set baudrate, enable RX and TX, configure parity.
+  uint32_t reg = 0;
+  reg = bitfield_field32_write(reg, UART_CTRL_NCO_FIELD, nco_masked);
+  reg = bitfield_field32_write(reg, UART_CTRL_RXBLVL_FIELD, rxblvl);
+  if (dif_toggle_to_bool(config.tx_enable)) {
+2000380e:       |         4890                  lw      a2,16(s1)
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+20003810:       |         05fa                  slli    a1,a1,0x1e
+20003812:       |         81d9                  srli    a1,a1,0x16
+20003814:       |         8d4d                  or      a0,a0,a1
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+ * @param val A dif_toggle_t value.
+ * @return Corresponding bool value.
+ */
+OT_WARN_UNUSED_RESULT
+inline bool dif_toggle_to_bool(dif_toggle_t val) {
+  switch (val) {
+20003816:       |         167d                  addi    a2,a2,-1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+    reg = bitfield_bit32_write(reg, UART_CTRL_TX_BIT, true);
+  }
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003818:       |         48cc                  lw      a1,20(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+2000381a:       |         00163613              seqz    a2,a2
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:141
+  if (dif_toggle_to_bool(config.tx_enable)) {
+2000381e:       |         8d51                  or      a0,a0,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+    reg = bitfield_bit32_write(reg, UART_CTRL_RX_BIT, true);
+  }
+  if (config.parity_enable == kDifToggleEnabled) {
+20003820:       |         4490                  lw      a2,8(s1)
+dif_toggle_to_bool():
+/proc/self/cwd/./sw/device/lib/dif/dif_base.h:153
+20003822:       |         15fd                  addi    a1,a1,-1
+20003824:       |         0015b593              seqz    a1,a1
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003828:       |         0586                  slli    a1,a1,0x1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+2000382a:       |         167d                  addi    a2,a2,-1
+2000382c:       |         00163613              seqz    a2,a2
+20003830:       |         061a                  slli    a2,a2,0x6
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_EN_BIT, true);
+  }
+  if (config.parity == kDifUartParityOdd) {
+20003832:       |         44d4                  lw      a3,12(s1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:144
+  if (dif_toggle_to_bool(config.rx_enable)) {
+20003834:       |         8dd1                  or      a1,a1,a2
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:147
+  if (config.parity_enable == kDifToggleEnabled) {
+20003836:       |         8d4d                  or      a0,a0,a1
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:153
+    reg = bitfield_bit32_write(reg, UART_CTRL_PARITY_ODD_BIT, true);
+  }
+  mmio_region_write32(uart->base_addr, UART_CTRL_REG_OFFSET, reg);
+20003838:       |         00092583              lw      a1,0(s2)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:150
+  if (config.parity == kDifUartParityOdd) {
+2000383c:       |         0016b613              seqz    a2,a3
+20003840:       |         061e                  slli    a2,a2,0x7
+20003842:       |         8d51                  or      a0,a0,a2
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+20003844:       |         c988                  sw      a0,16(a1)
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:156
+
+  // Disable interrupts.
+  mmio_region_write32(uart->base_addr, UART_INTR_ENABLE_REG_OFFSET, 0u);
+20003846:       |         00092503              lw      a0,0(s2)
+2000384a:       |         4401                  li      s0,0
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+2000384c:       |         00052223              sw      zero,4(a0) # 10004 <_chip_info_end+0x4>
+dif_uart_configure():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:159
+
+  return kDifOk;
+}
+20003850:       \-------> 8522                  mv      a0,s0
+20003852:                 40b2                  lw      ra,12(sp)
+20003854:                 4422                  lw      s0,8(sp)
+20003856:                 4492                  lw      s1,4(sp)
+20003858:                 4902                  lw      s2,0(sp)
+2000385a:                 0141                  addi    sp,sp,16
+2000385c:                 8082                  ret
+
+2000385e <dif_uart_watermark_rx_set>:
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:176
+  return kDifOk;
+}
+
+dif_result_t dif_uart_watermark_rx_set(const dif_uart_t *uart,
+                                       dif_uart_watermark_t watermark) {
+  if (uart == NULL) {
+2000385e:       /----- cd19                     beqz    a0,2000387c <dif_uart_watermark_rx_set+0x1e>
+20003860:       |      862a                     mv      a2,a0
+20003862:       |      4699                     li      a3,6
+20003864:       |      4535                     li      a0,13
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:183
+  }
+
+  // Check if the requested watermark is valid, and get a corresponding
+  // register definition to be written.
+  uint32_t value;
+  switch (watermark) {
+20003866:       |  /-- 00b6ea63                 bltu    a3,a1,2000387a <dif_uart_watermark_rx_set+0x1c>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:210
+    default:
+      return kDifError;
+  }
+
+  // Set watermark level.
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET);
+2000386a:       |  |   4210                     lw      a2,0(a2)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+2000386c:       |  |   5214                     lw      a3,32(a2)
+2000386e:       |  |   4501                     li      a0,0
+bitfield_field32_write():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:75
+  bitfield &= ~(field.mask << field.index);
+20003870:       |  |   9a8d                     andi    a3,a3,-29
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:76
+  bitfield |= (value & field.mask) << field.index;
+20003872:       |  |   058a                     slli    a1,a1,0x2
+20003874:       |  |   89f1                     andi    a1,a1,28
+20003876:       |  |   8dd5                     or      a1,a1,a3
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20003878:       |  |   d20c                     sw      a1,32(a2)
+dif_uart_watermark_rx_set():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:215
+  reg = bitfield_field32_write(reg, UART_FIFO_CTRL_RXILVL_FIELD, value);
+  mmio_region_write32(uart->base_addr, UART_FIFO_CTRL_REG_OFFSET, reg);
+
+  return kDifOk;
+}
+2000387a:       |  \-> 8082                     ret
+2000387c:       \----> 450d                     li      a0,3
+2000387e:              8082                     ret
+
+20003880 <dif_uart_bytes_send>:
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:291
+}
+
+dif_result_t dif_uart_bytes_send(const dif_uart_t *uart, const uint8_t *data,
+                                 size_t bytes_requested,
+                                 size_t *bytes_written) {
+  if (uart == NULL || data == NULL) {
+20003880:                 00153713              seqz    a4,a0
+20003884:                 0015b793              seqz    a5,a1
+20003888:                 8fd9                  or      a5,a5,a4
+2000388a:                 470d                  li      a4,3
+2000388c:       /-------- e795                  bnez    a5,200038b8 <dif_uart_bytes_send+0x38>
+2000388e:       |         4781                  li      a5,0
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+20003890:       |  /----- c20d                  beqz    a2,200038b2 <dif_uart_bytes_send+0x32>
+uart_tx_full():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:22
+  uint32_t reg = mmio_region_read32(uart->base_addr, UART_STATUS_REG_OFFSET);
+20003892:       |  |  /-> 00052803              lw      a6,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20003896:       |  |  |   01482703              lw      a4,20(a6)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+                               bitfield_bit32_to_field32(bit_index)) == 0x1u;
+2000389a:       |  |  |   8b05                  andi    a4,a4,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+2000389c:       |  +--|-- eb19                  bnez    a4,200038b2 <dif_uart_bytes_send+0x32>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:70
+    uart_tx_fifo_write(uart, data[bytes_written]);
+2000389e:       |  |  |   00f58733              add     a4,a1,a5
+200038a2:       |  |  |   00074703              lbu     a4,0(a4)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:71
+    ++bytes_written;
+200038a6:       |  |  |   0785                  addi    a5,a5,1
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200038a8:       |  |  |   00e82e23              sw      a4,28(a6)
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+200038ac:       |  |  \-- fef613e3              bne     a2,a5,20003892 <dif_uart_bytes_send+0x12>
+200038b0:       |  |      87b2                  mv      a5,a2
+200038b2:       |  \----> 4701                  li      a4,0
+dif_uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:297
+    return kDifBadArg;
+  }
+
+  // `bytes_written` is an optional parameter.
+  size_t res = uart_bytes_send(uart, data, bytes_requested);
+  if (bytes_written != NULL) {
+200038b4:       +-------- c291                  beqz    a3,200038b8 <dif_uart_bytes_send+0x38>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:298
+    *bytes_written = res;
+200038b6:       |         c29c                  sw      a5,0(a3)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:302
+  }
+
+  return kDifOk;
+}
+200038b8:       \-------> 853a                  mv      a0,a4
+200038ba:                 8082                  ret
+
+200038bc <dif_uart_byte_send_polled>:
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:321
+
+  return kDifOk;
+}
+
+dif_result_t dif_uart_byte_send_polled(const dif_uart_t *uart, uint8_t byte) {
+  if (uart == NULL) {
+200038bc:       /----- cd19                     beqz    a0,200038da <dif_uart_byte_send_polled+0x1e>
+200038be:       |      4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200038c0:       |  /-> 4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038c2:       |  |   8a85                     andi    a3,a3,1
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:326
+    return kDifBadArg;
+  }
+
+  // Busy wait for the TX FIFO to free up.
+  while (uart_tx_full(uart)) {
+200038c4:       |  \-- fef5                     bnez    a3,200038c0 <dif_uart_byte_send_polled+0x4>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038c6:       |      4a54                     lw      a3,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038c8:       |      8a85                     andi    a3,a3,1
+uart_bytes_send():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:69
+  while ((bytes_written < bytes_requested) && !uart_tx_full(uart)) {
+200038ca:       |  /-- e299                     bnez    a3,200038d0 <dif_uart_byte_send_polled+0x14>
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+200038cc:       |  |   ce4c                     sw      a1,28(a2)
+200038ce:       |  |   4110                     lw      a2,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+200038d0:       |  >-> 4a48                     lw      a0,20(a2)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038d2:       |  |   8921                     andi    a0,a0,8
+dif_uart_byte_send_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:333
+
+  (void)uart_bytes_send(uart, &byte, 1);
+
+  // Busy wait for the TX FIFO to be drained and for HW to finish processing
+  // the last byte.
+  while (!uart_tx_idle(uart)) {
+200038d4:       |  \-- dd75                     beqz    a0,200038d0 <dif_uart_byte_send_polled+0x14>
+200038d6:       |      4501                     li      a0,0
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:337
+  }
+
+  return kDifOk;
+}
+200038d8:       |      8082                     ret
+200038da:       \----> 450d                     li      a0,3
+200038dc:              8082                     ret
+
+200038de <dif_uart_byte_receive_polled>:
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:341
+
+dif_result_t dif_uart_byte_receive_polled(const dif_uart_t *uart,
+                                          uint8_t *byte) {
+  if (uart == NULL || byte == NULL) {
+200038de:              00153613                 seqz    a2,a0
+200038e2:              0015b693                 seqz    a3,a1
+200038e6:              8ed1                     or      a3,a3,a2
+200038e8:              460d                     li      a2,3
+200038ea:       /----- ee99                     bnez    a3,20003908 <dif_uart_byte_receive_polled+0x2a>
+200038ec:       |      4108                     lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038ee:       |  /-> 4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038f0:       |  |   02067613                 andi    a2,a2,32
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:346
+    return kDifBadArg;
+  }
+
+  // Busy wait for the RX message in the FIFO.
+  while (uart_rx_empty(uart)) {
+200038f4:       |  \-- fe6d                     bnez    a2,200038ee <dif_uart_byte_receive_polled+0x10>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038f6:       |      4950                     lw      a2,20(a0)
+bitfield_bit32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:122
+200038f8:       |      02067613                 andi    a2,a2,32
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:83
+  while ((bytes_read < bytes_requested) && !uart_rx_empty(uart)) {
+200038fc:       |  /-- e609                     bnez    a2,20003906 <dif_uart_byte_receive_polled+0x28>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+200038fe:       |  |   4d08                     lw      a0,24(a0)
+uart_bytes_receive():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:84
+    data[bytes_read] = uart_rx_fifo_read(uart);
+20003900:       |  |   00a58023                 sb      a0,0(a1)
+20003904:       +--|-- a011                     j       20003908 <dif_uart_byte_receive_polled+0x2a>
+20003906:       |  \-> 4601                     li      a2,0
+dif_uart_byte_receive_polled():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:352
+  }
+
+  (void)uart_bytes_receive(uart, 1, byte);
+
+  return kDifOk;
+}
+20003908:       \----> 8532                     mv      a0,a2
+2000390a:              8082                     ret
+
+2000390c <dif_uart_rx_bytes_available>:
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:356
+
+dif_result_t dif_uart_rx_bytes_available(const dif_uart_t *uart,
+                                         size_t *num_bytes) {
+  if (uart == NULL || num_bytes == NULL) {
+2000390c:           00153613            seqz    a2,a0
+20003910:           0015b693            seqz    a3,a1
+20003914:           8ed1                        or      a3,a3,a2
+20003916:           460d                        li      a2,3
+20003918:       /-- e699                        bnez    a3,20003926 <dif_uart_rx_bytes_available+0x1a>
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:362
+    return kDifBadArg;
+  }
+
+  // RX FIFO fill level (in bytes).
+  uint32_t reg =
+      mmio_region_read32(uart->base_addr, UART_FIFO_STATUS_REG_OFFSET);
+2000391a:       |   4108                        lw      a0,0(a0)
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+2000391c:       |   5148                        lw      a0,36(a0)
+2000391e:       |   4601                        li      a2,0
+bitfield_field32_read():
+/proc/self/cwd/./sw/device/lib/base/bitfield.h:56
+  return (bitfield >> field.index) & field.mask;
+20003920:       |   0522                        slli    a0,a0,0x8
+20003922:       |   8161                        srli    a0,a0,0x18
+dif_uart_rx_bytes_available():
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:363
+  *num_bytes = (size_t)bitfield_field32_read(reg, UART_FIFO_STATUS_RXLVL_FIELD);
+20003924:       |   c188                        sw      a0,0(a1)
+/proc/self/cwd/sw/device/lib/dif/dif_uart.c:366
+
+  return kDifOk;
+}
+20003926:       \-> 8532                        mv      a0,a2
+20003928:           8082                        ret
+
+2000392a <xTaskCreate>:
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:734
+                            const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */
+                            const configSTACK_DEPTH_TYPE usStackDepth,
+                            void * const pvParameters,
+                            UBaseType_t uxPriority,
+                            TaskHandle_t * const pxCreatedTask )
+    {
+2000392a:                    7179                       addi    sp,sp,-48
+2000392c:                    d606                       sw      ra,44(sp)
+2000392e:                    d422                       sw      s0,40(sp)
+20003930:                    d226                       sw      s1,36(sp)
+20003932:                    d04a                       sw      s2,32(sp)
+20003934:                    ce4e                       sw      s3,28(sp)
+20003936:                    cc52                       sw      s4,24(sp)
+20003938:                    ca56                       sw      s5,20(sp)
+2000393a:                    c85a                       sw      s6,16(sp)
+2000393c:                    c65e                       sw      s7,12(sp)
+2000393e:                    c462                       sw      s8,8(sp)
+20003940:                    8abe                       mv      s5,a5
+20003942:                    893a                       mv      s2,a4
+20003944:                    89b6                       mv      s3,a3
+20003946:                    8c32                       mv      s8,a2
+20003948:                    84ae                       mv      s1,a1
+2000394a:                    8a2a                       mv      s4,a0
+/proc/self/cwd/external/freertos/tasks.c:768
+        #else /* portSTACK_GROWTH */
+            {
+                StackType_t * pxStack;
+
+                /* Allocate space for the stack used by the task being created. */
+                pxStack = pvPortMallocStack( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */
+2000394c:                    00261513           slli    a0,a2,0x2
+20003950:                    2be5                       jal     20003f48 <pvPortMalloc>
+20003952:                    5b7d                       li      s6,-1
+/proc/self/cwd/external/freertos/tasks.c:770
+
+                if( pxStack != NULL )
+20003954:       /----------- 1a050463           beqz    a0,20003afc <xTaskCreate+0x1d2>
+20003958:       |            842a                       mv      s0,a0
+/proc/self/cwd/external/freertos/tasks.c:773
+                {
+                    /* Allocate space for the TCB. */
+                    pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */
+2000395a:       |            04c00513           li      a0,76
+2000395e:       |            23ed                       jal     20003f48 <pvPortMalloc>
+/proc/self/cwd/external/freertos/tasks.c:775
+
+                    if( pxNewTCB != NULL )
+20003960:       |  /-------- cd15                       beqz    a0,2000399c <xTaskCreate+0x72>
+20003962:       |  |         8baa                       mv      s7,a0
+/proc/self/cwd/external/freertos/tasks.c:778
+                    {
+                        /* Store the stack location in the TCB. */
+                        pxNewTCB->pxStack = pxStack;
+20003964:       |  |         d900                       sw      s0,48(a0)
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:860
+     * grows from high memory to low (as per the 80x86) or vice versa.
+     * portSTACK_GROWTH is used to make the result positive or negative as required
+     * by the port. */
+    #if ( portSTACK_GROWTH < 0 )
+        {
+            pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] );
+20003966:       |  |         208c4533           sh2add  a0,s8,s0
+2000396a:       |  |         1571                       addi    a0,a0,-4
+/proc/self/cwd/external/freertos/tasks.c:861
+            pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception.  Avoiding casts between pointers and integers is not practical.  Size differences accounted for using portPOINTER_SIZE_TYPE type.  Checked by assert(). */
+2000396c:       |  |         ff057b13           andi    s6,a0,-16
+/proc/self/cwd/external/freertos/tasks.c:888
+            pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 );
+        }
+    #endif /* portSTACK_GROWTH */
+
+    /* Store the task name in the TCB. */
+    if( pcName != NULL )
+20003970:       |  |  /----- c88d                       beqz    s1,200039a2 <xTaskCreate+0x78>
+/proc/self/cwd/external/freertos/tasks.c:890
+    {
+        for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ )
+20003972:       |  |  |      034b8513           addi    a0,s7,52
+20003976:       |  |  |      45bd                       li      a1,15
+/proc/self/cwd/external/freertos/tasks.c:892
+        {
+            pxNewTCB->pcTaskName[ x ] = pcName[ x ];
+20003978:       |  |  |  /-> 00048603           lb      a2,0(s1)
+2000397c:       |  |  |  |   00c50023           sb      a2,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:897
+
+            /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than
+             * configMAX_TASK_NAME_LEN characters just in case the memory after the
+             * string is not accessible (extremely unlikely). */
+            if( pcName[ x ] == ( char ) 0x00 )
+20003980:       |  |  |  |   0004c603           lbu     a2,0(s1)
+20003984:       |  |  |  |   00163613           seqz    a2,a2
+20003988:       |  |  |  |   0015b693           seqz    a3,a1
+2000398c:       |  |  |  |   8e55                       or      a2,a2,a3
+2000398e:       |  |  |  |   15fd                       addi    a1,a1,-1
+20003990:       |  |  |  |   0505                       addi    a0,a0,1
+20003992:       |  |  |  |   0485                       addi    s1,s1,1
+20003994:       |  |  |  \-- d275                       beqz    a2,20003978 <xTaskCreate+0x4e>
+/proc/self/cwd/external/freertos/tasks.c:909
+            }
+        }
+
+        /* Ensure the name string is terminated in the case that the string length
+         * was greater or equal to configMAX_TASK_NAME_LEN. */
+        pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0';
+20003996:       |  |  |      040b81a3           sb      zero,67(s7)
+2000399a:       |  |  |  /-- a031                       j       200039a6 <xTaskCreate+0x7c>
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:784
+                        vPortFreeStack( pxStack );
+2000399c:       |  \--|--|-> 8522                       mv      a0,s0
+2000399e:       |     |  |   2535                       jal     20003fca <vPortFree>
+200039a0:       +-----|--|-- aab1                       j       20003afc <xTaskCreate+0x1d2>
+prvInitialiseNewTask():
+/proc/self/cwd/external/freertos/tasks.c:915
+    }
+    else
+    {
+        /* The task has not been given a name, so just ensure there is a NULL
+         * terminator when it is read out. */
+        pxNewTCB->pcTaskName[ 0 ] = 0x00;
+200039a2:       |     \--|-> 020b8a23           sb      zero,52(s7)
+200039a6:       |        \-> 4511                       li      a0,4
+/proc/self/cwd/external/freertos/tasks.c:921
+    }
+
+    /* This is used as an array index so must ensure it's not too large. */
+    configASSERT( uxPriority < configMAX_PRIORITIES );
+
+    if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES )
+200039a8:       |            0aa95433           minu    s0,s2,a0
+/proc/self/cwd/external/freertos/tasks.c:930
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxNewTCB->uxPriority = uxPriority;
+200039ac:       |            028ba623           sw      s0,44(s7)
+/proc/self/cwd/external/freertos/tasks.c:938
+            pxNewTCB->uxBasePriority = uxPriority;
+            pxNewTCB->uxMutexesHeld = 0;
+        }
+    #endif /* configUSE_MUTEXES */
+
+    vListInitialiseItem( &( pxNewTCB->xStateListItem ) );
+200039b0:       |            004b8913           addi    s2,s7,4
+200039b4:       |            854a                       mv      a0,s2
+200039b6:       |            23ad                       jal     20003f20 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:939
+    vListInitialiseItem( &( pxNewTCB->xEventListItem ) );
+200039b8:       |            018b8513           addi    a0,s7,24
+200039bc:       |            2395                       jal     20003f20 <vListInitialiseItem>
+/proc/self/cwd/external/freertos/tasks.c:943
+
+    /* Set the pxNewTCB as a link back from the ListItem_t.  This is so we can get
+     * back to  the containing TCB from a generic item in a list. */
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB );
+200039be:       |            017ba823           sw      s7,16(s7)
+200039c2:       |            4515                       li      a0,5
+/proc/self/cwd/external/freertos/tasks.c:946
+
+    /* Event lists are always in priority order. */
+    listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+200039c4:       |            8d01                       sub     a0,a0,s0
+200039c6:       |            00abac23           sw      a0,24(s7)
+/proc/self/cwd/external/freertos/tasks.c:947
+    listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB );
+200039ca:       |            037ba223           sw      s7,36(s7)
+/proc/self/cwd/external/freertos/tasks.c:951
+
+    #if ( portCRITICAL_NESTING_IN_TCB == 1 )
+        {
+            pxNewTCB->uxCriticalNesting = ( UBaseType_t ) 0U;
+200039ce:       |            040ba223           sw      zero,68(s7)
+/proc/self/cwd/external/freertos/tasks.c:1002
+        }
+    #endif
+
+    #if ( INCLUDE_xTaskAbortDelay == 1 )
+        {
+            pxNewTCB->ucDelayAborted = pdFALSE;
+200039d2:       |            040b8423           sb      zero,72(s7)
+/proc/self/cwd/external/freertos/tasks.c:1052
+                        }
+                    #endif /* portSTACK_GROWTH */
+                }
+            #else /* portHAS_STACK_OVERFLOW_CHECKING */
+                {
+                    pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters );
+200039d6:       |            855a                       mv      a0,s6
+200039d8:       |            85d2                       mv      a1,s4
+200039da:       |            864e                       mv      a2,s3
+200039dc:       |            bc1fc0ef           jal     ra,2000059c <pxPortInitialiseStack>
+200039e0:       |            00aba023           sw      a0,0(s7)
+/proc/self/cwd/external/freertos/tasks.c:1058
+                }
+            #endif /* portHAS_STACK_OVERFLOW_CHECKING */
+        }
+    #endif /* portUSING_MPU_WRAPPERS */
+
+    if( pxCreatedTask != NULL )
+200039e4:       |        /-- 000a8463           beqz    s5,200039ec <xTaskCreate+0xc2>
+/proc/self/cwd/external/freertos/tasks.c:1062
+    {
+        /* Pass the handle out in an anonymous way.  The handle can be used to
+         * change the created task's priority, delete the created task, etc.*/
+        *pxCreatedTask = ( TaskHandle_t ) pxNewTCB;
+200039e8:       |        |   017aa023           sw      s7,0(s5)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskEnterCritical( void )
+    {
+        portDISABLE_INTERRUPTS();
+200039ec:       |        \-> 30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+
+        if( xSchedulerRunning != pdFALSE )
+200039f0:       |            efffea17           auipc   s4,0xefffe
+200039f4:       |            6d0a2503           lw      a0,1744(s4) # 100020c0 <xSchedulerRunning>
+200039f8:       |            efffec17           auipc   s8,0xefffe
+200039fc:       |        /-- c901                       beqz    a0,20003a0c <xTaskCreate+0xe2>
+/proc/self/cwd/external/freertos/tasks.c:4349
+        {
+            ( pxCurrentTCB->uxCriticalNesting )++;
+200039fe:       |        |   6b4c2503           lw      a0,1716(s8) # 100020ac <pxCurrentTCB>
+20003a02:       |        |   416c                       lw      a1,68(a0)
+20003a04:       |        |   0585                       addi    a1,a1,1
+20003a06:       |        |   c16c                       sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+             * function so  assert() if it is being called from an interrupt
+             * context.  Only API functions that end in "FromISR" can be used in an
+             * interrupt.  Only assert if the critical nesting count is 1 to
+             * protect against recursive calls if the assert function also uses a
+             * critical section. */
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003a08:       |        |   6b4c2503           lw      a0,1716(s8)
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1077
+        uxCurrentNumberOfTasks++;
+20003a0c:       |        \-> efffe517           auipc   a0,0xefffe
+20003a10:       |            6b052583           lw      a1,1712(a0) # 100020bc <uxCurrentNumberOfTasks>
+20003a14:       |            0585                       addi    a1,a1,1
+20003a16:       |            6ab52823           sw      a1,1712(a0)
+/proc/self/cwd/external/freertos/tasks.c:1079
+        if( pxCurrentTCB == NULL )
+20003a1a:       |            6b4c2583           lw      a1,1716(s8)
+20003a1e:       |            effff617           auipc   a2,0xeffff
+20003a22:       |            83260a93           addi    s5,a2,-1998 # 10002250 <pxReadyTasksLists>
+20003a26:       |        /-- cd91                       beqz    a1,20003a42 <xTaskCreate+0x118>
+/proc/self/cwd/external/freertos/tasks.c:1102
+            if( xSchedulerRunning == pdFALSE )
+20003a28:       |        |   6d0a2503           lw      a0,1744(s4)
+20003a2c:       |     /--|-- ed25                       bnez    a0,20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1104
+                if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority )
+20003a2e:       |     |  |   6b4c2503           lw      a0,1716(s8)
+20003a32:       |     |  |   5548                       lw      a0,44(a0)
+20003a34:       |     |  |   02cba583           lw      a1,44(s7)
+20003a38:       |     +--|-- 06a5e663           bltu    a1,a0,20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1106
+                    pxCurrentTCB = pxNewTCB;
+20003a3c:       |     |  |   6b7c2a23           sw      s7,1716(s8)
+20003a40:       |     +--|-- a095                       j       20003aa4 <xTaskCreate+0x17a>
+/proc/self/cwd/external/freertos/tasks.c:1083
+            pxCurrentTCB = pxNewTCB;
+20003a42:       |     |  \-> 6b7c2a23           sw      s7,1716(s8)
+/proc/self/cwd/external/freertos/tasks.c:1085
+            if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 )
+20003a46:       |     |      6b052503           lw      a0,1712(a0)
+20003a4a:       |     |      4585                       li      a1,1
+20003a4c:       |     +----- 04b51c63           bne     a0,a1,20003aa4 <xTaskCreate+0x17a>
+20003a50:       |     |      4495                       li      s1,5
+20003a52:       |     |      8456                       mv      s0,s5
+prvInitialiseTaskLists():
+/proc/self/cwd/external/freertos/tasks.c:3665
+        vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) );
+20003a54:       |     |  /-> 8522                       mv      a0,s0
+20003a56:       |     |  |   295d                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3663
+    for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ )
+20003a58:       |     |  |   14fd                       addi    s1,s1,-1
+20003a5a:       |     |  |   0451                       addi    s0,s0,20
+20003a5c:       |     |  \-- fce5                       bnez    s1,20003a54 <xTaskCreate+0x12a>
+/proc/self/cwd/external/freertos/tasks.c:3668
+    vListInitialise( &xDelayedTaskList1 );
+20003a5e:       |     |      effff517           auipc   a0,0xeffff
+20003a62:       |     |      89250993           addi    s3,a0,-1902 # 100022f0 <xDelayedTaskList1>
+20003a66:       |     |      854e                       mv      a0,s3
+20003a68:       |     |      2155                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3669
+    vListInitialise( &xDelayedTaskList2 );
+20003a6a:       |     |      effff517           auipc   a0,0xeffff
+20003a6e:       |     |      89a50413           addi    s0,a0,-1894 # 10002304 <xDelayedTaskList2>
+20003a72:       |     |      8522                       mv      a0,s0
+20003a74:       |     |      2961                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3670
+    vListInitialise( &xPendingReadyList );
+20003a76:       |     |      effff517           auipc   a0,0xeffff
+20003a7a:       |     |      86650513           addi    a0,a0,-1946 # 100022dc <xPendingReadyList>
+20003a7e:       |     |      2179                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3674
+            vListInitialise( &xTasksWaitingTermination );
+20003a80:       |     |      effff517           auipc   a0,0xeffff
+20003a84:       |     |      83450513           addi    a0,a0,-1996 # 100022b4 <xTasksWaitingTermination>
+20003a88:       |     |      2151                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3680
+            vListInitialise( &xSuspendedTaskList );
+20003a8a:       |     |      effff517           auipc   a0,0xeffff
+20003a8e:       |     |      83e50513           addi    a0,a0,-1986 # 100022c8 <xSuspendedTaskList>
+20003a92:       |     |      29ad                       jal     20003f0c <vListInitialise>
+/proc/self/cwd/external/freertos/tasks.c:3686
+    pxDelayedTaskList = &xDelayedTaskList1;
+20003a94:       |     |      efffe517           auipc   a0,0xefffe
+20003a98:       |     |      63352823           sw      s3,1584(a0) # 100020c4 <pxDelayedTaskList>
+/proc/self/cwd/external/freertos/tasks.c:3687
+    pxOverflowDelayedTaskList = &xDelayedTaskList2;
+20003a9c:       |     |      efffe517           auipc   a0,0xefffe
+20003aa0:       |     |      62852623           sw      s0,1580(a0) # 100020c8 <pxOverflowDelayedTaskList>
+prvAddNewTaskToReadyList():
+/proc/self/cwd/external/freertos/tasks.c:1119
+        uxTaskNumber++;
+20003aa4:       |     \----> efffe517           auipc   a0,0xefffe
+20003aa8:       |            61052583           lw      a1,1552(a0) # 100020b4 <uxTaskNumber>
+20003aac:       |            0585                       addi    a1,a1,1
+20003aae:       |            60b52823           sw      a1,1552(a0)
+/proc/self/cwd/external/freertos/tasks.c:1129
+        prvAddTaskToReadyList( pxNewTCB );
+20003ab2:       |            02cba503           lw      a0,44(s7)
+20003ab6:       |            efffe597           auipc   a1,0xefffe
+20003aba:       |            5fa5a603           lw      a2,1530(a1) # 100020b0 <uxTopReadyPriority>
+20003abe:       |            28a61633           bset    a2,a2,a0
+20003ac2:       |            5ec5ad23           sw      a2,1530(a1)
+20003ac6:       |            20a54533           sh2add  a0,a0,a0
+20003aca:       |            21554533           sh2add  a0,a0,s5
+20003ace:       |            414c                       lw      a1,4(a0)
+20003ad0:       |            00bba423           sw      a1,8(s7)
+20003ad4:       |            4590                       lw      a2,8(a1)
+20003ad6:       |            00cba623           sw      a2,12(s7)
+20003ada:       |            4590                       lw      a2,8(a1)
+20003adc:       |            01262223           sw      s2,4(a2)
+20003ae0:       |            0125a423           sw      s2,8(a1)
+20003ae4:       |            00abaa23           sw      a0,20(s7)
+20003ae8:       |            410c                       lw      a1,0(a0)
+20003aea:       |            0585                       addi    a1,a1,1
+20003aec:       |            c10c                       sw      a1,0(a0)
+/proc/self/cwd/external/freertos/tasks.c:1133
+    taskEXIT_CRITICAL();
+20003aee:       |            2025                       jal     20003b16 <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:1135
+    if( xSchedulerRunning != pdFALSE )
+20003af0:       |            6d0a2503           lw      a0,1744(s4)
+20003af4:       |            4b05                       li      s6,1
+20003af6:       +----------- c119                       beqz    a0,20003afc <xTaskCreate+0x1d2>
+/proc/self/cwd/external/freertos/tasks.c:1139
+        if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority )
+20003af8:       |            6b4c2503           lw      a0,1716(s8)
+xTaskCreate():
+/proc/self/cwd/external/freertos/tasks.c:813
+        return xReturn;
+20003afc:       \----------> 855a                       mv      a0,s6
+20003afe:                    50b2                       lw      ra,44(sp)
+20003b00:                    5422                       lw      s0,40(sp)
+20003b02:                    5492                       lw      s1,36(sp)
+20003b04:                    5902                       lw      s2,32(sp)
+20003b06:                    49f2                       lw      s3,28(sp)
+20003b08:                    4a62                       lw      s4,24(sp)
+20003b0a:                    4ad2                       lw      s5,20(sp)
+20003b0c:                    4b42                       lw      s6,16(sp)
+20003b0e:                    4bb2                       lw      s7,12(sp)
+20003b10:                    4c22                       lw      s8,8(sp)
+20003b12:                    6145                       addi    sp,sp,48
+20003b14:                    8082                       ret
+
+20003b16 <vTaskExitCritical>:
+vTaskExitCritical():
+/proc/self/cwd/external/freertos/tasks.c:4375
+
+#if ( portCRITICAL_NESTING_IN_TCB == 1 )
+
+    void vTaskExitCritical( void )
+    {
+        if( xSchedulerRunning != pdFALSE )
+20003b16:              efffe517                 auipc   a0,0xefffe
+20003b1a:              5aa52503                 lw      a0,1450(a0) # 100020c0 <xSchedulerRunning>
+20003b1e:       /----- c105                     beqz    a0,20003b3e <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4377
+        {
+            if( pxCurrentTCB->uxCriticalNesting > 0U )
+20003b20:       |      efffe517                 auipc   a0,0xefffe
+20003b24:       |      58c52583                 lw      a1,1420(a0) # 100020ac <pxCurrentTCB>
+20003b28:       |      41ec                     lw      a1,68(a1)
+20003b2a:       +----- c991                     beqz    a1,20003b3e <vTaskExitCritical+0x28>
+/proc/self/cwd/external/freertos/tasks.c:4379
+            {
+                ( pxCurrentTCB->uxCriticalNesting )--;
+20003b2c:       |      58c52583                 lw      a1,1420(a0)
+20003b30:       |      41f0                     lw      a2,68(a1)
+20003b32:       |      167d                     addi    a2,a2,-1
+20003b34:       |      c1f0                     sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4381
+
+                if( pxCurrentTCB->uxCriticalNesting == 0U )
+20003b36:       |      58c52503                 lw      a0,1420(a0)
+20003b3a:       |      4168                     lw      a0,68(a0)
+20003b3c:       |  /-- c111                     beqz    a0,20003b40 <vTaskExitCritical+0x2a>
+/proc/self/cwd/external/freertos/tasks.c:4399
+        }
+        else
+        {
+            mtCOVERAGE_TEST_MARKER();
+        }
+    }
+20003b3e:       \--|-> 8082                     ret
+/proc/self/cwd/external/freertos/tasks.c:4383
+                    portENABLE_INTERRUPTS();
+20003b40:          \-> 30046073                 csrsi   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4399
+    }
+20003b44:              8082                     ret
+
+20003b46 <vTaskSwitchContext>:
+vTaskSwitchContext():
+/proc/self/cwd/external/freertos/tasks.c:3015
+{
+20003b46:              1141                     addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:3016
+    if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE )
+20003b48:              c606                     sw      ra,12(sp)
+20003b4a:              c422                     sw      s0,8(sp)
+20003b4c:              efffe517                 auipc   a0,0xefffe
+20003b50:              58052503                 lw      a0,1408(a0) # 100020cc <uxSchedulerSuspended>
+20003b54:          /-- c519                     beqz    a0,20003b62 <vTaskSwitchContext+0x1c>
+/proc/self/cwd/external/freertos/tasks.c:3020
+        xYieldPending = pdTRUE;
+20003b56:          |   efffe517                 auipc   a0,0xefffe
+20003b5a:          |   4585                     li      a1,1
+20003b5c:          |   56b52d23                 sw      a1,1402(a0) # 100020d0 <xYieldPending>
+20003b60:       /--|-- a0a5                     j       20003bc8 <vTaskSwitchContext+0x82>
+/proc/self/cwd/external/freertos/tasks.c:3024
+        xYieldPending = pdFALSE;
+20003b62:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b66:       |      56052723                 sw      zero,1390(a0) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:3056
+        taskCHECK_FOR_STACK_OVERFLOW();
+20003b6a:       |      efffe417                 auipc   s0,0xefffe
+20003b6e:       |      54242503                 lw      a0,1346(s0) # 100020ac <pxCurrentTCB>
+20003b72:       |      4108                     lw      a0,0(a0)
+20003b74:       |      54242583                 lw      a1,1346(s0)
+20003b78:       |      598c                     lw      a1,48(a1)
+20003b7a:       |  /-- 00a5ea63                 bltu    a1,a0,20003b8e <vTaskSwitchContext+0x48>
+20003b7e:       |  |   54242503                 lw      a0,1346(s0)
+20003b82:       |  |   54242583                 lw      a1,1346(s0)
+20003b86:       |  |   03458593                 addi    a1,a1,52
+20003b8a:       |  |   b3efd0ef                 jal     ra,20000ec8 <vApplicationStackOverflowHook>
+/proc/self/cwd/external/freertos/tasks.c:3067
+        taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003b8e:       |  \-> efffe517                 auipc   a0,0xefffe
+20003b92:       |      52252503                 lw      a0,1314(a0) # 100020b0 <uxTopReadyPriority>
+20003b96:       |      60051513                 clz     a0,a0
+20003b9a:       |      01f54513                 xori    a0,a0,31
+20003b9e:       |      20a54533                 sh2add  a0,a0,a0
+20003ba2:       |      efffe597                 auipc   a1,0xefffe
+20003ba6:       |      6ae58593                 addi    a1,a1,1710 # 10002250 <pxReadyTasksLists>
+20003baa:       |      20b545b3                 sh2add  a1,a0,a1
+20003bae:       |      41c8                     lw      a0,4(a1)
+20003bb0:       |      4148                     lw      a0,4(a0)
+20003bb2:       |      00858613                 addi    a2,a1,8
+20003bb6:       |      c1c8                     sw      a0,4(a1)
+20003bb8:       |  /-- 00c51563                 bne     a0,a2,20003bc2 <vTaskSwitchContext+0x7c>
+20003bbc:       |  |   4148                     lw      a0,4(a0)
+20003bbe:       |  |   0591                     addi    a1,a1,4
+20003bc0:       |  |   c188                     sw      a0,0(a1)
+20003bc2:       |  \-> 4548                     lw      a0,12(a0)
+20003bc4:       |      54a42123                 sw      a0,1346(s0)
+/proc/self/cwd/external/freertos/tasks.c:3087
+}
+20003bc8:       \----> 40b2                     lw      ra,12(sp)
+20003bca:              4422                     lw      s0,8(sp)
+20003bcc:              0141                     addi    sp,sp,16
+20003bce:              8082                     ret
+
+20003bd0 <vTaskStartScheduler>:
+vTaskStartScheduler():
+/proc/self/cwd/external/freertos/tasks.c:1991
+{
+20003bd0:           1141                        addi    sp,sp,-16
+/proc/self/cwd/external/freertos/tasks.c:2024
+            xReturn = xTaskCreate( prvIdleTask,
+20003bd2:           c606                        sw      ra,12(sp)
+20003bd4:           00000517            auipc   a0,0x0
+20003bd8:           05a50513            addi    a0,a0,90 # 20003c2e <prvIdleTask>
+20003bdc:           00002597            auipc   a1,0x2
+20003be0:           6c858593            addi    a1,a1,1736 # 200062a4 <uxTopUsedPriority+0x4>
+20003be4:           efffe617            auipc   a2,0xefffe
+20003be8:           4f060793            addi    a5,a2,1264 # 100020d4 <xIdleTaskHandle>
+20003bec:           10000613            li      a2,256
+20003bf0:           4681                        li      a3,0
+20003bf2:           4701                        li      a4,0
+20003bf4:           d37ff0ef            jal     ra,2000392a <xTaskCreate>
+20003bf8:           4585                        li      a1,1
+/proc/self/cwd/external/freertos/tasks.c:2046
+    if( xReturn == pdPASS )
+20003bfa:       /-- 02b51363            bne     a0,a1,20003c20 <vTaskStartScheduler+0x50>
+/proc/self/cwd/external/freertos/tasks.c:2062
+        portDISABLE_INTERRUPTS();
+20003bfe:       |   30047073            csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:2074
+        xNextTaskUnblockTime = portMAX_DELAY;
+20003c02:       |   efffe517            auipc   a0,0xefffe
+20003c06:       |   567d                        li      a2,-1
+20003c08:       |   4cc52b23            sw      a2,1238(a0) # 100020d8 <xNextTaskUnblockTime>
+/proc/self/cwd/external/freertos/tasks.c:2075
+        xSchedulerRunning = pdTRUE;
+20003c0c:       |   efffe517            auipc   a0,0xefffe
+20003c10:       |   4ab52a23            sw      a1,1204(a0) # 100020c0 <xSchedulerRunning>
+/proc/self/cwd/external/freertos/tasks.c:2076
+        xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT;
+20003c14:       |   efffe517            auipc   a0,0xefffe
+20003c18:       |   4c052423            sw      zero,1224(a0) # 100020dc <xTickCount>
+/proc/self/cwd/external/freertos/tasks.c:2090
+        if( xPortStartScheduler() != pdFALSE )
+20003c1c:       |   aeafd0ef            jal     ra,20000f06 <xPortStartScheduler>
+/proc/self/cwd/external/freertos/tasks.c:2114
+    ( void ) uxTopUsedPriority;
+20003c20:       \-> 00002517            auipc   a0,0x2
+20003c24:           68052503            lw      a0,1664(a0) # 200062a0 <uxTopUsedPriority>
+/proc/self/cwd/external/freertos/tasks.c:2115
+}
+20003c28:           40b2                        lw      ra,12(sp)
+20003c2a:           0141                        addi    sp,sp,16
+20003c2c:           8082                        ret
+
+20003c2e <prvIdleTask>:
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3435
+{
+20003c2e:                 1101                  addi    sp,sp,-32
+20003c30:                 ce06                  sw      ra,28(sp)
+20003c32:                 cc22                  sw      s0,24(sp)
+20003c34:                 ca26                  sw      s1,20(sp)
+20003c36:                 c84a                  sw      s2,16(sp)
+20003c38:                 c64e                  sw      s3,12(sp)
+20003c3a:                 c452                  sw      s4,8(sp)
+20003c3c:                 c256                  sw      s5,4(sp)
+20003c3e:                 efffe497              auipc   s1,0xefffe
+20003c42:                 efffe917              auipc   s2,0xefffe
+20003c46:                 efffe997              auipc   s3,0xefffe
+20003c4a:                 efffea17              auipc   s4,0xefffe
+20003c4e:                 efffea97              auipc   s5,0xefffe
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3701
+            while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U )
+20003c52:       /-------> 47a4a503              lw      a0,1146(s1) # 100020b8 <uxDeletedTasksWaitingCleanUp>
+20003c56:       |  /----- c521                  beqz    a0,20003c9e <prvIdleTask+0x70>
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003c58:       |  |      30047073              csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003c5c:       |  |      47e92503              lw      a0,1150(s2) # 100020c0 <xSchedulerRunning>
+20003c60:       |  |  /-- c901                  beqz    a0,20003c70 <prvIdleTask+0x42>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003c62:       |  |  |   45eaa503              lw      a0,1118(s5) # 100020ac <pxCurrentTCB>
+20003c66:       |  |  |   416c                  lw      a1,68(a0)
+20003c68:       |  |  |   0585                  addi    a1,a1,1
+20003c6a:       |  |  |   c16c                  sw      a1,68(a0)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003c6c:       |  |  |   45eaa503              lw      a0,1118(s5)
+prvCheckTasksWaitingTermination():
+/proc/self/cwd/external/freertos/tasks.c:3705
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003c70:       |  |  \-> 67a9a503              lw      a0,1658(s3) # 100022c0 <xTasksWaitingTermination+0xc>
+20003c74:       |  |      4540                  lw      s0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:3706
+                    ( void ) uxListRemove( &( pxTCB->xStateListItem ) );
+20003c76:       |  |      00440513              addi    a0,s0,4
+20003c7a:       |  |      2475                  jal     20003f26 <uxListRemove>
+/proc/self/cwd/external/freertos/tasks.c:3707
+                    --uxCurrentNumberOfTasks;
+20003c7c:       |  |      472a2503              lw      a0,1138(s4) # 100020bc <uxCurrentNumberOfTasks>
+20003c80:       |  |      157d                  addi    a0,a0,-1
+20003c82:       |  |      46aa2923              sw      a0,1138(s4)
+/proc/self/cwd/external/freertos/tasks.c:3708
+                    --uxDeletedTasksWaitingCleanUp;
+20003c86:       |  |      47a4a503              lw      a0,1146(s1)
+20003c8a:       |  |      157d                  addi    a0,a0,-1
+20003c8c:       |  |      46a4ad23              sw      a0,1146(s1)
+/proc/self/cwd/external/freertos/tasks.c:3710
+                taskEXIT_CRITICAL();
+20003c90:       |  |      e87ff0ef              jal     ra,20003b16 <vTaskExitCritical>
+prvDeleteTCB():
+/proc/self/cwd/external/freertos/tasks.c:3964
+                vPortFreeStack( pxTCB->pxStack );
+20003c94:       |  |      5808                  lw      a0,48(s0)
+20003c96:       |  |      2e15                  jal     20003fca <vPortFree>
+/proc/self/cwd/external/freertos/tasks.c:3965
+                vPortFree( pxTCB );
+20003c98:       |  |      8522                  mv      a0,s0
+20003c9a:       |  |      2e05                  jal     20003fca <vPortFree>
+20003c9c:       +--|----- bf5d                  j       20003c52 <prvIdleTask+0x24>
+prvIdleTask():
+/proc/self/cwd/external/freertos/tasks.c:3459
+                taskYIELD();
+20003c9e:       |  \----> 00000073              ecall
+20003ca2:       \-------- bf45                  j       20003c52 <prvIdleTask+0x24>
+
+20003ca4 <vTaskSuspendAll>:
+vTaskSuspendAll():
+/proc/self/cwd/external/freertos/tasks.c:2142
+    ++uxSchedulerSuspended;
+20003ca4:       efffe517                auipc   a0,0xefffe
+20003ca8:       42852583                lw      a1,1064(a0) # 100020cc <uxSchedulerSuspended>
+20003cac:       0585                    addi    a1,a1,1
+20003cae:       42b52423                sw      a1,1064(a0)
+/proc/self/cwd/external/freertos/tasks.c:2147
+}
+20003cb2:       8082                    ret
+
+20003cb4 <xTaskResumeAll>:
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2214
+{
+20003cb4:                    1101                       addi    sp,sp,-32
+20003cb6:                    ce06                       sw      ra,28(sp)
+20003cb8:                    cc22                       sw      s0,24(sp)
+20003cba:                    ca26                       sw      s1,20(sp)
+20003cbc:                    c84a                       sw      s2,16(sp)
+20003cbe:                    c64e                       sw      s3,12(sp)
+vTaskEnterCritical():
+/proc/self/cwd/external/freertos/tasks.c:4345
+        portDISABLE_INTERRUPTS();
+20003cc0:                    30047073           csrci   mstatus,8
+/proc/self/cwd/external/freertos/tasks.c:4347
+        if( xSchedulerRunning != pdFALSE )
+20003cc4:                    efffe517           auipc   a0,0xefffe
+20003cc8:                    3fc52503           lw      a0,1020(a0) # 100020c0 <xSchedulerRunning>
+20003ccc:                /-- c911                       beqz    a0,20003ce0 <xTaskResumeAll+0x2c>
+/proc/self/cwd/external/freertos/tasks.c:4349
+            ( pxCurrentTCB->uxCriticalNesting )++;
+20003cce:                |   efffe517           auipc   a0,0xefffe
+20003cd2:                |   3de52583           lw      a1,990(a0) # 100020ac <pxCurrentTCB>
+20003cd6:                |   41f0                       lw      a2,68(a1)
+20003cd8:                |   0605                       addi    a2,a2,1
+20003cda:                |   c1f0                       sw      a2,68(a1)
+/proc/self/cwd/external/freertos/tasks.c:4357
+            if( pxCurrentTCB->uxCriticalNesting == 1 )
+20003cdc:                |   3de52503           lw      a0,990(a0)
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2229
+        --uxSchedulerSuspended;
+20003ce0:                \-> efffe517           auipc   a0,0xefffe
+20003ce4:                    3ec52583           lw      a1,1004(a0) # 100020cc <uxSchedulerSuspended>
+20003ce8:                    15fd                       addi    a1,a1,-1
+20003cea:                    3eb52623           sw      a1,1004(a0)
+/proc/self/cwd/external/freertos/tasks.c:2231
+        if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003cee:                    3ec52503           lw      a0,1004(a0)
+20003cf2:       /----------- e565                       bnez    a0,20003dda <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2233
+            if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U )
+20003cf4:       |            efffe517           auipc   a0,0xefffe
+20003cf8:       |            3c852503           lw      a0,968(a0) # 100020bc <uxCurrentNumberOfTasks>
+20003cfc:       +----------- cd79                       beqz    a0,20003dda <xTaskResumeAll+0x126>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003cfe:       |            efffe517           auipc   a0,0xefffe
+20003d02:       |            5de50513           addi    a0,a0,1502 # 100022dc <xPendingReadyList>
+20003d06:       |            410c                       lw      a1,0(a0)
+20003d08:       |            efffe997           auipc   s3,0xefffe
+20003d0c:       |  /-------- c9dd                       beqz    a1,20003dc2 <xTaskResumeAll+0x10e>
+20003d0e:       |  |         efffe597           auipc   a1,0xefffe
+20003d12:       |  |         efffe617           auipc   a2,0xefffe
+20003d16:       |  |         53e60893           addi    a7,a2,1342 # 10002250 <pxReadyTasksLists>
+20003d1a:       |  |         efffe297           auipc   t0,0xefffe
+20003d1e:       |  |         4805                       li      a6,1
+/proc/self/cwd/external/freertos/tasks.c:2239
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003d20:       |  |  /----> 4558                       lw      a4,12(a0)
+20003d22:       |  |  |      4758                       lw      a4,12(a4)
+/proc/self/cwd/external/freertos/tasks.c:2240
+                    listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003d24:       |  |  |      5304                       lw      s1,32(a4)
+20003d26:       |  |  |      4f40                       lw      s0,28(a4)
+20003d28:       |  |  |      5710                       lw      a2,40(a4)
+20003d2a:       |  |  |      c404                       sw      s1,8(s0)
+20003d2c:       |  |  |      5304                       lw      s1,32(a4)
+20003d2e:       |  |  |      c0c0                       sw      s0,4(s1)
+20003d30:       |  |  |      4240                       lw      s0,4(a2)
+20003d32:       |  |  |      01870793           addi    a5,a4,24
+20003d36:       |  |  |  /-- 00f41363           bne     s0,a5,20003d3c <xTaskResumeAll+0x88>
+20003d3a:       |  |  |  |   c244                       sw      s1,4(a2)
+20003d3c:       |  |  |  \-> 02072423           sw      zero,40(a4)
+20003d40:       |  |  |      421c                       lw      a5,0(a2)
+20003d42:       |  |  |      17fd                       addi    a5,a5,-1
+20003d44:       |  |  |      c21c                       sw      a5,0(a2)
+/proc/self/cwd/external/freertos/tasks.c:2242
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003d46:       |  |  |      4750                       lw      a2,12(a4)
+20003d48:       |  |  |      471c                       lw      a5,8(a4)
+20003d4a:       |  |  |      4b44                       lw      s1,20(a4)
+20003d4c:       |  |  |      c790                       sw      a2,8(a5)
+20003d4e:       |  |  |      4740                       lw      s0,12(a4)
+20003d50:       |  |  |      c05c                       sw      a5,4(s0)
+20003d52:       |  |  |      40d0                       lw      a2,4(s1)
+20003d54:       |  |  |      00470793           addi    a5,a4,4
+20003d58:       |  |  |  /-- 00f61363           bne     a2,a5,20003d5e <xTaskResumeAll+0xaa>
+20003d5c:       |  |  |  |   c0c0                       sw      s0,4(s1)
+20003d5e:       |  |  |  \-> 4090                       lw      a2,0(s1)
+20003d60:       |  |  |      167d                       addi    a2,a2,-1
+20003d62:       |  |  |      c090                       sw      a2,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2243
+                    prvAddTaskToReadyList( pxTCB );
+20003d64:       |  |  |      5750                       lw      a2,44(a4)
+20003d66:       |  |  |      3a25a483           lw      s1,930(a1) # 100020b0 <uxTopReadyPriority>
+20003d6a:       |  |  |      28c494b3           bset    s1,s1,a2
+20003d6e:       |  |  |      3a95a123           sw      s1,930(a1)
+20003d72:       |  |  |      20c644b3           sh2add  s1,a2,a2
+20003d76:       |  |  |      2114c4b3           sh2add  s1,s1,a7
+20003d7a:       |  |  |      40c0                       lw      s0,4(s1)
+20003d7c:       |  |  |      c700                       sw      s0,8(a4)
+20003d7e:       |  |  |      4414                       lw      a3,8(s0)
+20003d80:       |  |  |      c754                       sw      a3,12(a4)
+20003d82:       |  |  |      4414                       lw      a3,8(s0)
+20003d84:       |  |  |      c2dc                       sw      a5,4(a3)
+20003d86:       |  |  |      c41c                       sw      a5,8(s0)
+20003d88:       |  |  |      cb44                       sw      s1,20(a4)
+20003d8a:       |  |  |      4094                       lw      a3,0(s1)
+20003d8c:       |  |  |      0685                       addi    a3,a3,1
+20003d8e:       |  |  |      c094                       sw      a3,0(s1)
+/proc/self/cwd/external/freertos/tasks.c:2247
+                    if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority )
+20003d90:       |  |  |      3922a683           lw      a3,914(t0) # 100020ac <pxCurrentTCB>
+20003d94:       |  |  |      56d4                       lw      a3,44(a3)
+20003d96:       |  |  |  /-- 00d66463           bltu    a2,a3,20003d9e <xTaskResumeAll+0xea>
+/proc/self/cwd/external/freertos/tasks.c:2249
+                        xYieldPending = pdTRUE;
+20003d9a:       |  |  |  |   3d09a423           sw      a6,968(s3) # 100020d0 <xYieldPending>
+/proc/self/cwd/external/freertos/tasks.c:2237
+                while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE )
+20003d9e:       |  |  |  \-> 4110                       lw      a2,0(a0)
+20003da0:       |  |  \----- f241                       bnez    a2,20003d20 <xTaskResumeAll+0x6c>
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003da2:       |  |         efffe517           auipc   a0,0xefffe
+20003da6:       |  |         32252583           lw      a1,802(a0) # 100020c4 <pxDelayedTaskList>
+20003daa:       |  |         418c                       lw      a1,0(a1)
+20003dac:       |  |  /----- c591                       beqz    a1,20003db8 <xTaskResumeAll+0x104>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003dae:       |  |  |      32252503           lw      a0,802(a0)
+20003db2:       |  |  |      4548                       lw      a0,12(a0)
+20003db4:       |  |  |      4108                       lw      a0,0(a0)
+20003db6:       |  |  |  /-- a011                       j       20003dba <xTaskResumeAll+0x106>
+20003db8:       |  |  \--|-> 557d                       li      a0,-1
+20003dba:       |  |     \-> efffe597           auipc   a1,0xefffe
+20003dbe:       |  |         30a5af23           sw      a0,798(a1) # 100020d8 <xNextTaskUnblockTime>
+xTaskResumeAll():
+/proc/self/cwd/external/freertos/tasks.c:2273
+                    TickType_t xPendedCounts = xPendedTicks; /* Non-volatile copy. */
+20003dc2:       |  \-------> efffe917           auipc   s2,0xefffe
+20003dc6:       |            31e92483           lw      s1,798(s2) # 100020e0 <xPendedTicks>
+/proc/self/cwd/external/freertos/tasks.c:2275
+                    if( xPendedCounts > ( TickType_t ) 0U )
+20003dca:       |     /----- c491                       beqz    s1,20003dd6 <xTaskResumeAll+0x122>
+/proc/self/cwd/external/freertos/tasks.c:2279
+                            if( xTaskIncrementTick() != pdFALSE )
+20003dcc:       |     |  /-> 200d                       jal     20003dee <xTaskIncrementTick>
+/proc/self/cwd/external/freertos/tasks.c:2288
+                            --xPendedCounts;
+20003dce:       |     |  |   14fd                       addi    s1,s1,-1
+/proc/self/cwd/external/freertos/tasks.c:2289
+                        } while( xPendedCounts > ( TickType_t ) 0U );
+20003dd0:       |     |  \-- fcf5                       bnez    s1,20003dcc <xTaskResumeAll+0x118>
+/proc/self/cwd/external/freertos/tasks.c:2291
+                        xPendedTicks = 0;
+20003dd2:       |     |      30092f23           sw      zero,798(s2)
+/proc/self/cwd/external/freertos/tasks.c:2299
+                if( xYieldPending != pdFALSE )
+20003dd6:       |     \----> 3c89a503           lw      a0,968(s3)
+/proc/self/cwd/external/freertos/tasks.c:2319
+    taskEXIT_CRITICAL();
+20003dda:       \----------> d3dff0ef           jal     ra,20003b16 <vTaskExitCritical>
+/proc/self/cwd/external/freertos/tasks.c:2321
+    return xAlreadyYielded;
+20003dde:                    4501                       li      a0,0
+20003de0:                    40f2                       lw      ra,28(sp)
+20003de2:                    4462                       lw      s0,24(sp)
+20003de4:                    44d2                       lw      s1,20(sp)
+20003de6:                    4942                       lw      s2,16(sp)
+20003de8:                    49b2                       lw      s3,12(sp)
+20003dea:                    6105                       addi    sp,sp,32
+20003dec:                    8082                       ret
+
+20003dee <xTaskIncrementTick>:
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2740
+    if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE )
+20003dee:                          efffe517             auipc   a0,0xefffe
+20003df2:                          2de52503             lw      a0,734(a0) # 100020cc <uxSchedulerSuspended>
+20003df6:                      /-- c909                 beqz    a0,20003e08 <xTaskIncrementTick+0x1a>
+/proc/self/cwd/external/freertos/tasks.c:2887
+        ++xPendedTicks;
+20003df8:                      |   efffe517             auipc   a0,0xefffe
+20003dfc:                      |   2e852583             lw      a1,744(a0) # 100020e0 <xPendedTicks>
+20003e00:                      |   0585                 addi    a1,a1,1
+20003e02:                      |   2eb52423             sw      a1,744(a0)
+20003e06:       /--------------|-- a209                 j       20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2744
+        const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1;
+20003e08:       |              \-> efffe517             auipc   a0,0xefffe
+20003e0c:       |                  2d452283             lw      t0,724(a0) # 100020dc <xTickCount>
+20003e10:       |                  0285                 addi    t0,t0,1
+/proc/self/cwd/external/freertos/tasks.c:2748
+        xTickCount = xConstTickCount;
+20003e12:       |                  2c552a23             sw      t0,724(a0)
+20003e16:       |                  efffe317             auipc   t1,0xefffe
+20003e1a:       |                  efffe817             auipc   a6,0xefffe
+/proc/self/cwd/external/freertos/tasks.c:2750
+        if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */
+20003e1e:       |        /-------- 02029f63             bnez    t0,20003e5c <xTaskIncrementTick+0x6e>
+/proc/self/cwd/external/freertos/tasks.c:2752
+            taskSWITCH_DELAYED_LISTS();
+20003e22:       |        |         2ae32503             lw      a0,686(t1) # 100020c4 <pxDelayedTaskList>
+20003e26:       |        |         efffe597             auipc   a1,0xefffe
+20003e2a:       |        |         2a25a683             lw      a3,674(a1) # 100020c8 <pxOverflowDelayedTaskList>
+20003e2e:       |        |         2ad32723             sw      a3,686(t1)
+20003e32:       |        |         2aa5a123             sw      a0,674(a1)
+20003e36:       |        |         efffe517             auipc   a0,0xefffe
+20003e3a:       |        |         2ae52583             lw      a1,686(a0) # 100020e4 <xNumOfOverflows>
+20003e3e:       |        |         0585                 addi    a1,a1,1
+20003e40:       |        |         2ab52723             sw      a1,686(a0)
+prvResetNextTaskUnblockTime():
+/proc/self/cwd/external/freertos/tasks.c:4001
+    if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e44:       |        |         2ae32503             lw      a0,686(t1)
+20003e48:       |        |         4108                 lw      a0,0(a0)
+20003e4a:       |        |  /----- c511                 beqz    a0,20003e56 <xTaskIncrementTick+0x68>
+/proc/self/cwd/external/freertos/tasks.c:4015
+        xNextTaskUnblockTime = listGET_ITEM_VALUE_OF_HEAD_ENTRY( pxDelayedTaskList );
+20003e4c:       |        |  |      2ae32503             lw      a0,686(t1)
+20003e50:       |        |  |      4548                 lw      a0,12(a0)
+20003e52:       |        |  |      4108                 lw      a0,0(a0)
+20003e54:       |        |  |  /-- a011                 j       20003e58 <xTaskIncrementTick+0x6a>
+20003e56:       |        |  \--|-> 557d                 li      a0,-1
+20003e58:       |        |     \-> 2aa82f23             sw      a0,702(a6) # 100020d8 <xNextTaskUnblockTime>
+xTaskIncrementTick():
+/proc/self/cwd/external/freertos/tasks.c:2763
+        if( xConstTickCount >= xNextTaskUnblockTime )
+20003e5c:       |        \-------> 2be82503             lw      a0,702(a6)
+20003e60:       +----------------- 0aa2e463             bltu    t0,a0,20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003e64:       |                  2ae32503             lw      a0,686(t1)
+20003e68:       |                  4108                 lw      a0,0(a0)
+20003e6a:       |  /-------------- c949                 beqz    a0,20003efc <xTaskIncrementTick+0x10e>
+20003e6c:       |  |               efffe397             auipc   t2,0xefffe
+20003e70:       |  |               efffe517             auipc   a0,0xefffe
+20003e74:       |  |               3e050893             addi    a7,a0,992 # 10002250 <pxReadyTasksLists>
+/proc/self/cwd/external/freertos/tasks.c:2783
+                    pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too.  Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */
+20003e78:       |  |     /-------> 2ae32503             lw      a0,686(t1)
+20003e7c:       |  |     |         4548                 lw      a0,12(a0)
+20003e7e:       |  |     |         4548                 lw      a0,12(a0)
+/proc/self/cwd/external/freertos/tasks.c:2784
+                    xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) );
+20003e80:       |  |     |         414c                 lw      a1,4(a0)
+/proc/self/cwd/external/freertos/tasks.c:2786
+                    if( xConstTickCount < xItemValue )
+20003e82:       |  |  /--|-------- 08b2e163             bltu    t0,a1,20003f04 <xTaskIncrementTick+0x116>
+/proc/self/cwd/external/freertos/tasks.c:2802
+                    listREMOVE_ITEM( &( pxTCB->xStateListItem ) );
+20003e86:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e88:       |  |  |  |         4510                 lw      a2,8(a0)
+20003e8a:       |  |  |  |         4958                 lw      a4,20(a0)
+20003e8c:       |  |  |  |         c60c                 sw      a1,8(a2)
+20003e8e:       |  |  |  |         454c                 lw      a1,12(a0)
+20003e90:       |  |  |  |         c1d0                 sw      a2,4(a1)
+20003e92:       |  |  |  |         4350                 lw      a2,4(a4)
+20003e94:       |  |  |  |         00450693             addi    a3,a0,4
+20003e98:       |  |  |  |     /-- 00d61363             bne     a2,a3,20003e9e <xTaskIncrementTick+0xb0>
+20003e9c:       |  |  |  |     |   c34c                 sw      a1,4(a4)
+20003e9e:       |  |  |  |     \-> 430c                 lw      a1,0(a4)
+20003ea0:       |  |  |  |         15fd                 addi    a1,a1,-1
+20003ea2:       |  |  |  |         c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003ea4:       |  |  |  |         5518                 lw      a4,40(a0)
+20003ea6:       |  |  |  |  /----- c30d                 beqz    a4,20003ec8 <xTaskIncrementTick+0xda>
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003ea8:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003eaa:       |  |  |  |  |      4d50                 lw      a2,28(a0)
+20003eac:       |  |  |  |  |      c60c                 sw      a1,8(a2)
+20003eae:       |  |  |  |  |      510c                 lw      a1,32(a0)
+20003eb0:       |  |  |  |  |      c1d0                 sw      a2,4(a1)
+20003eb2:       |  |  |  |  |      4350                 lw      a2,4(a4)
+/proc/self/cwd/external/freertos/tasks.c:2806
+                    if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL )
+20003eb4:       |  |  |  |  |      01850793             addi    a5,a0,24
+/proc/self/cwd/external/freertos/tasks.c:2808
+                        listREMOVE_ITEM( &( pxTCB->xEventListItem ) );
+20003eb8:       |  |  |  |  |  /-- 00f61363             bne     a2,a5,20003ebe <xTaskIncrementTick+0xd0>
+20003ebc:       |  |  |  |  |  |   c34c                 sw      a1,4(a4)
+20003ebe:       |  |  |  |  |  \-> 02052423             sw      zero,40(a0)
+20003ec2:       |  |  |  |  |      430c                 lw      a1,0(a4)
+20003ec4:       |  |  |  |  |      15fd                 addi    a1,a1,-1
+20003ec6:       |  |  |  |  |      c30c                 sw      a1,0(a4)
+/proc/self/cwd/external/freertos/tasks.c:2817
+                    prvAddTaskToReadyList( pxTCB );
+20003ec8:       |  |  |  |  \----> 554c                 lw      a1,44(a0)
+20003eca:       |  |  |  |         2443a603             lw      a2,580(t2) # 100020b0 <uxTopReadyPriority>
+20003ece:       |  |  |  |         28b61633             bset    a2,a2,a1
+20003ed2:       |  |  |  |         24c3a223             sw      a2,580(t2)
+20003ed6:       |  |  |  |         20b5c5b3             sh2add  a1,a1,a1
+20003eda:       |  |  |  |         2115c5b3             sh2add  a1,a1,a7
+20003ede:       |  |  |  |         41d0                 lw      a2,4(a1)
+20003ee0:       |  |  |  |         c510                 sw      a2,8(a0)
+20003ee2:       |  |  |  |         4618                 lw      a4,8(a2)
+20003ee4:       |  |  |  |         c558                 sw      a4,12(a0)
+20003ee6:       |  |  |  |         4618                 lw      a4,8(a2)
+20003ee8:       |  |  |  |         c354                 sw      a3,4(a4)
+20003eea:       |  |  |  |         c614                 sw      a3,8(a2)
+20003eec:       |  |  |  |         c94c                 sw      a1,20(a0)
+20003eee:       |  |  |  |         4188                 lw      a0,0(a1)
+20003ef0:       |  |  |  |         0505                 addi    a0,a0,1
+20003ef2:       |  |  |  |         c188                 sw      a0,0(a1)
+/proc/self/cwd/external/freertos/tasks.c:2767
+                if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE )
+20003ef4:       |  |  |  |         2ae32503             lw      a0,686(t1)
+20003ef8:       |  |  |  |         4108                 lw      a0,0(a0)
+20003efa:       |  |  |  \-------- fd3d                 bnez    a0,20003e78 <xTaskIncrementTick+0x8a>
+20003efc:       |  \--|----------> 557d                 li      a0,-1
+/proc/self/cwd/external/freertos/tasks.c:2774
+                    xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */
+20003efe:       |     |            2aa82f23             sw      a0,702(a6)
+20003f02:       +-----|----------- a019                 j       20003f08 <xTaskIncrementTick+0x11a>
+/proc/self/cwd/external/freertos/tasks.c:2793
+                        xNextTaskUnblockTime = xItemValue;
+20003f04:       |     \----------> 2ab82f23             sw      a1,702(a6)
+/proc/self/cwd/external/freertos/tasks.c:2898
+    return xSwitchRequired;
+20003f08:       \----------------> 4501                 li      a0,0
+20003f0a:                          8082                 ret
+
+20003f0c <vListInitialise>:
+vListInitialise():
+/proc/self/cwd/external/freertos/list.c:55
+void vListInitialise( List_t * const pxList )
+{
+    /* The list structure contains a list item which is used to mark the
+     * end of the list.  To initialise the list the list end is inserted
+     * as the only list entry. */
+    pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f0c:       00850593                addi    a1,a0,8
+20003f10:       c14c                    sw      a1,4(a0)
+20003f12:       567d                    li      a2,-1
+/proc/self/cwd/external/freertos/list.c:59
+
+    /* The list end value is the highest possible value in the list to
+     * ensure it remains at the end of the list. */
+    pxList->xListEnd.xItemValue = portMAX_DELAY;
+20003f14:       c510                    sw      a2,8(a0)
+/proc/self/cwd/external/freertos/list.c:63
+
+    /* The list end next and previous pointers point to itself so we know
+     * when the list is empty. */
+    pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd );     /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f16:       c54c                    sw      a1,12(a0)
+/proc/self/cwd/external/freertos/list.c:64
+    pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM.  This is checked and valid. */
+20003f18:       c90c                    sw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:66
+
+    pxList->uxNumberOfItems = ( UBaseType_t ) 0U;
+20003f1a:       00052023                sw      zero,0(a0)
+/proc/self/cwd/external/freertos/list.c:72
+
+    /* Write known values into the list if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList );
+    listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList );
+}
+20003f1e:       8082                    ret
+
+20003f20 <vListInitialiseItem>:
+vListInitialiseItem():
+/proc/self/cwd/external/freertos/list.c:78
+/*-----------------------------------------------------------*/
+
+void vListInitialiseItem( ListItem_t * const pxItem )
+{
+    /* Make sure the list item is not recorded as being on a list. */
+    pxItem->pxContainer = NULL;
+20003f20:       00052823                sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:84
+
+    /* Write known values into the list item if
+     * configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */
+    listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+    listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem );
+}
+20003f24:       8082                    ret
+
+20003f26 <uxListRemove>:
+uxListRemove():
+/proc/self/cwd/external/freertos/list.c:194
+{
+/* The list item knows which list it is in.  Obtain the list from the list
+ * item. */
+    List_t * const pxList = pxItemToRemove->pxContainer;
+
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003f26:           4510                        lw      a2,8(a0)
+20003f28:           4154                        lw      a3,4(a0)
+/proc/self/cwd/external/freertos/list.c:192
+    List_t * const pxList = pxItemToRemove->pxContainer;
+20003f2a:           490c                        lw      a1,16(a0)
+/proc/self/cwd/external/freertos/list.c:194
+    pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious;
+20003f2c:           c690                        sw      a2,8(a3)
+/proc/self/cwd/external/freertos/list.c:195
+    pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext;
+20003f2e:           4510                        lw      a2,8(a0)
+20003f30:           c254                        sw      a3,4(a2)
+/proc/self/cwd/external/freertos/list.c:201
+
+    /* Only used during decision coverage testing. */
+    mtCOVERAGE_TEST_DELAY();
+
+    /* Make sure the index is left pointing to a valid item. */
+    if( pxList->pxIndex == pxItemToRemove )
+20003f32:           41d4                        lw      a3,4(a1)
+20003f34:       /-- 00a69363            bne     a3,a0,20003f3a <uxListRemove+0x14>
+/proc/self/cwd/external/freertos/list.c:203
+    {
+        pxList->pxIndex = pxItemToRemove->pxPrevious;
+20003f38:       |   c1d0                        sw      a2,4(a1)
+/proc/self/cwd/external/freertos/list.c:210
+    else
+    {
+        mtCOVERAGE_TEST_MARKER();
+    }
+
+    pxItemToRemove->pxContainer = NULL;
+20003f3a:       \-> 00052823            sw      zero,16(a0)
+/proc/self/cwd/external/freertos/list.c:211
+    ( pxList->uxNumberOfItems )--;
+20003f3e:           4188                        lw      a0,0(a1)
+20003f40:           157d                        addi    a0,a0,-1
+20003f42:           c188                        sw      a0,0(a1)
+/proc/self/cwd/external/freertos/list.c:213
+
+    return pxList->uxNumberOfItems;
+20003f44:           4188                        lw      a0,0(a1)
+20003f46:           8082                        ret
+
+20003f48 <pvPortMalloc>:
+pvPortMalloc():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:72
+static size_t xNextFreeByte = ( size_t ) 0;
+
+/*-----------------------------------------------------------*/
+
+void * pvPortMalloc( size_t xWantedSize )
+{
+20003f48:                 1141                  addi    sp,sp,-16
+20003f4a:                 c606                  sw      ra,12(sp)
+20003f4c:                 c422                  sw      s0,8(sp)
+20003f4e:                 c226                  sw      s1,4(sp)
+20003f50:                 c04a                  sw      s2,0(sp)
+20003f52:                 842a                  mv      s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:79
+    static uint8_t * pucAlignedHeap = NULL;
+
+    /* Ensure that blocks are always aligned. */
+    #if ( portBYTE_ALIGNMENT != 1 )
+        {
+            if( xWantedSize & portBYTE_ALIGNMENT_MASK )
+20003f54:                 893d                  andi    a0,a0,15
+20003f56:             /-- c909                  beqz    a0,20003f68 <pvPortMalloc+0x20>
+20003f58:             |   ff047513              andi    a0,s0,-16
+20003f5c:             |   0541                  addi    a0,a0,16
+20003f5e:             |   00a435b3              sltu    a1,s0,a0
+20003f62:             |   40b00433              neg     s0,a1
+20003f66:             |   8c69                  and     s0,s0,a0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:94
+                }
+            }
+        }
+    #endif
+
+    vTaskSuspendAll();
+20003f68:             \-> d3dff0ef              jal     ra,20003ca4 <vTaskSuspendAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:96
+    {
+        if( pucAlignedHeap == NULL )
+20003f6c:                 efffe517              auipc   a0,0xefffe
+20003f70:                 17c52483              lw      s1,380(a0) # 100020e8 <pvPortMalloc.pucAlignedHeap>
+20003f74:             /-- c099                  beqz    s1,20003f7a <pvPortMalloc+0x32>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+            /* Ensure the heap starts on a correctly aligned boundary. */
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+        }
+
+        /* Check there is enough room left for the allocation and. */
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f76:          /--|-- e811                  bnez    s0,20003f8a <pvPortMalloc+0x42>
+20003f78:       /--|--|-- a835                  j       20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:99
+            pucAlignedHeap = ( uint8_t * ) ( ( ( portPOINTER_SIZE_TYPE ) & ucHeap[ portBYTE_ALIGNMENT ] ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) );
+20003f7a:       |  |  \-> efffe597              auipc   a1,0xefffe
+20003f7e:       |  |      3ae58493              addi    s1,a1,942 # 10002328 <ucHeap+0x10>
+20003f82:       |  |      98c1                  andi    s1,s1,-16
+20003f84:       |  |      16952e23              sw      s1,380(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:103
+        if( ( xWantedSize > 0 ) && /* valid size */
+20003f88:       +--|----- c415                  beqz    s0,20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:104
+            ( ( xNextFreeByte + xWantedSize ) < configADJUSTED_HEAP_SIZE ) &&
+20003f8a:       |  \----> efffe517              auipc   a0,0xefffe
+20003f8e:       |         16252903              lw      s2,354(a0) # 100020ec <xNextFreeByte>
+20003f92:       |         944a                  add     s0,s0,s2
+20003f94:       |         00445593              srli    a1,s0,0x4
+20003f98:       |         7ff5b593              sltiu   a1,a1,2047
+20003f9c:       |         00893633              sltu    a2,s2,s0
+20003fa0:       |         8df1                  and     a1,a1,a2
+20003fa2:       +-------- c989                  beqz    a1,20003fb4 <pvPortMalloc+0x6c>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:110
+            ( ( xNextFreeByte + xWantedSize ) > xNextFreeByte ) ) /* Check for overflow. */
+        {
+            /* Return the next free byte then increment the index past this
+             * block. */
+            pvReturn = pucAlignedHeap + xNextFreeByte;
+            xNextFreeByte += xWantedSize;
+20003fa4:       |         16852123              sw      s0,354(a0)
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+        }
+
+        traceMALLOC( pvReturn, xWantedSize );
+    }
+    ( void ) xTaskResumeAll();
+20003fa8:       |         d0dff0ef              jal     ra,20003cb4 <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:119
+
+    #if ( configUSE_MALLOC_FAILED_HOOK == 1 )
+        {
+            if( pvReturn == NULL )
+20003fac:       |     /-- c491                  beqz    s1,20003fb8 <pvPortMalloc+0x70>
+20003fae:       |     |   01248533              add     a0,s1,s2
+20003fb2:       |  /--|-- a031                  j       20003fbe <pvPortMalloc+0x76>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:115
+    ( void ) xTaskResumeAll();
+20003fb4:       \--|--|-> d01ff0ef              jal     ra,20003cb4 <xTaskResumeAll>
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:122
+            {
+                extern void vApplicationMallocFailedHook( void );
+                vApplicationMallocFailedHook();
+20003fb8:          |  \-> ec7fc0ef              jal     ra,20000e7e <vApplicationMallocFailedHook>
+20003fbc:          |      4501                  li      a0,0
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:127
+            }
+        }
+    #endif
+
+    return pvReturn;
+20003fbe:          \----> 40b2                  lw      ra,12(sp)
+20003fc0:                 4422                  lw      s0,8(sp)
+20003fc2:                 4492                  lw      s1,4(sp)
+20003fc4:                 4902                  lw      s2,0(sp)
+20003fc6:                 0141                  addi    sp,sp,16
+20003fc8:                 8082                  ret
+
+20003fca <vPortFree>:
+vPortFree():
+/proc/self/cwd/external/freertos/portable/MemMang/heap_1.c:140
+     * https://www.FreeRTOS.org for more information. */
+    ( void ) pv;
+
+    /* Force an assert as it is invalid to call this function. */
+    configASSERT( pv == NULL );
+}
+20003fca:       8082                    ret
+
+20003fcc <manufacturer_pre_test_hook>:
+manufacturer_pre_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:14
+// The default test hooks do nothing, but exist as the OTTF expects some hooks
+// to exist. Additionally, they are weak symbols so they may be overridden by
+// other custom test hooks.
+
+OT_WEAK
+bool manufacturer_pre_test_hook(void) { return true; }
+20003fcc:       4505                    li      a0,1
+20003fce:       8082                    ret
+
+20003fd0 <manufacturer_post_test_hook>:
+manufacturer_post_test_hook():
+/proc/self/cwd/external/manufacturer_test_hooks/test_hooks_default.c:17
+
+OT_WEAK
+bool manufacturer_post_test_hook(void) { return true; }
+20003fd0:       4505                    li      a0,1
+20003fd2:       8082                    ret
+
+20003fd4 <mmio_region_memcpy_from_mmio32>:
+mmio_region_memcpy_from_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:104
+  }
+}
+
+void mmio_region_memcpy_from_mmio32(mmio_region_t base, uint32_t offset,
+                                    void *dest, size_t len) {
+  mmio_region_memcpy32(base, offset, dest, len, true);
+20003fd4:       4705                    li      a4,1
+20003fd6:       a009                    j       20003fd8 <mmio_region_memcpy32>
+
+20003fd8 <mmio_region_memcpy32>:
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:27
+                                 uint8_t *buf, size_t len, bool from_mmio) {
+20003fd8:                    7179                       addi    sp,sp,-48
+/proc/self/cwd/sw/device/lib/base/mmio.c:28
+  if (len == 0) {
+20003fda:                    d606                       sw      ra,44(sp)
+20003fdc:                    d422                       sw      s0,40(sp)
+20003fde:                    d226                       sw      s1,36(sp)
+20003fe0:                    d04a                       sw      s2,32(sp)
+20003fe2:                    ce4e                       sw      s3,28(sp)
+20003fe4:                    cc52                       sw      s4,24(sp)
+20003fe6:                    ca56                       sw      s5,20(sp)
+20003fe8:                    c85a                       sw      s6,16(sp)
+20003fea:       /----------- c6d9                       beqz    a3,20004078 <mmio_region_memcpy32+0xa0>
+20003fec:       |            893a                       mv      s2,a4
+20003fee:       |            84b6                       mv      s1,a3
+20003ff0:       |            89b2                       mv      s3,a2
+20003ff2:       |            8b2e                       mv      s6,a1
+20003ff4:       |            8a2a                       mv      s4,a0
+misalignment32_of():
+/proc/self/cwd/./sw/device/lib/base/memory.h:58
+ * Computes how many bytes `addr` is ahead of the previous 32-bit word alignment
+ * boundary.
+ */
+OT_WARN_UNUSED_RESULT
+inline ptrdiff_t misalignment32_of(uintptr_t addr) {
+  return addr % alignof(uint32_t);
+20003ff6:       |            0035f513           andi    a0,a1,3
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:35
+  if (misalignment != 0) {
+20003ffa:       |  /-------- cd0d                       beqz    a0,20004034 <mmio_region_memcpy32+0x5c>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+20003ffc:       |  |         ffcb7413           andi    s0,s6,-4
+20004000:       |  |         9452                       add     s0,s0,s4
+20004002:       |  |         400c                       lw      a1,0(s0)
+20004004:       |  |         4611                       li      a2,4
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:38
+    size_t realignment = sizeof(uint32_t) - OT_UNSIGNED(misalignment);
+20004006:       |  |         8e09                       sub     a2,a2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:42
+    if (realignment > len) {
+20004008:       |  |         0a965ab3           minu    s5,a2,s1
+/proc/self/cwd/sw/device/lib/base/mmio.c:49
+    uint32_t current_word = mmio_region_read32(base, current_word_offset);
+2000400c:       |  |         c62e                       sw      a1,12(sp)
+2000400e:       |  |         006c                       addi    a1,sp,12
+/proc/self/cwd/sw/device/lib/base/mmio.c:53
+    uint8_t *current_byte = ((uint8_t *)&current_word) + misalignment;
+20004010:       |  |         8dc9                       or      a1,a1,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:54
+    if (from_mmio) {
+20004012:       |  |     /-- 00090663           beqz    s2,2000401e <mmio_region_memcpy32+0x46>
+/proc/self/cwd/sw/device/lib/base/mmio.c:55
+      memcpy(buf, current_byte, realignment);
+20004016:       |  |     |   854e                       mv      a0,s3
+20004018:       |  |     |   8656                       mv      a2,s5
+2000401a:       |  |     |   289d                       jal     20004090 <memcpy>
+2000401c:       |  |  /--|-- a039                       j       2000402a <mmio_region_memcpy32+0x52>
+/proc/self/cwd/sw/device/lib/base/mmio.c:58
+      memcpy(current_byte, buf, realignment);
+2000401e:       |  |  |  \-> 852e                       mv      a0,a1
+20004020:       |  |  |      85ce                       mv      a1,s3
+20004022:       |  |  |      8656                       mv      a2,s5
+20004024:       |  |  |      20b5                       jal     20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:59
+      mmio_region_write32(base, current_word_offset, current_word);
+20004026:       |  |  |      4532                       lw      a0,12(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20004028:       |  |  |      c008                       sw      a0,0(s0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:64
+    len -= realignment;
+2000402a:       |  |  \----> 415484b3           sub     s1,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+2000402e:       +--|-------- c4a9                       beqz    s1,20004078 <mmio_region_memcpy32+0xa0>
+20004030:       |  |         9b56                       add     s6,s6,s5
+20004032:       |  |         99d6                       add     s3,s3,s5
+20004034:       |  \-------> 4a91                       li      s5,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:73
+    if (bytes_to_copy > len) {
+20004036:       |  /-------> 0044b513           sltiu   a0,s1,4
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+2000403a:       |  |         00a96533           or      a0,s2,a0
+/proc/self/cwd/sw/device/lib/base/mmio.c:78
+    uint32_t current_word = 0;
+2000403e:       |  |         c402                       sw      zero,8(sp)
+/proc/self/cwd/sw/device/lib/base/mmio.c:79
+    if (from_mmio || bytes_to_copy != sizeof(uint32_t)) {
+20004040:       |  |     /-- c511                       beqz    a0,2000404c <mmio_region_memcpy32+0x74>
+mmio_region_read32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:96
+  return (
+20004042:       |  |     |   ffcb7513           andi    a0,s6,-4
+20004046:       |  |     |   9552                       add     a0,a0,s4
+20004048:       |  |     |   4108                       lw      a0,0(a0)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:84
+      current_word = mmio_region_read32(base, OT_SIGNED(offset));
+2000404a:       |  |     |   c42a                       sw      a0,8(sp)
+2000404c:       |  |     \-> 0b54d433           minu    s0,s1,s5
+/proc/self/cwd/sw/device/lib/base/mmio.c:88
+    if (from_mmio) {
+20004050:       |  |     /-- 00090763           beqz    s2,2000405e <mmio_region_memcpy32+0x86>
+/proc/self/cwd/sw/device/lib/base/mmio.c:89
+      memcpy(buf, &current_word, bytes_to_copy);
+20004054:       |  |     |   002c                       addi    a1,sp,8
+20004056:       |  |     |   854e                       mv      a0,s3
+20004058:       |  |     |   8622                       mv      a2,s0
+2000405a:       |  |     |   281d                       jal     20004090 <memcpy>
+2000405c:       |  |  /--|-- a811                       j       20004070 <mmio_region_memcpy32+0x98>
+/proc/self/cwd/sw/device/lib/base/mmio.c:92
+      memcpy(&current_word, buf, bytes_to_copy);
+2000405e:       |  |  |  \-> 0028                       addi    a0,sp,8
+20004060:       |  |  |      85ce                       mv      a1,s3
+20004062:       |  |  |      8622                       mv      a2,s0
+20004064:       |  |  |      2035                       jal     20004090 <memcpy>
+/proc/self/cwd/sw/device/lib/base/mmio.c:93
+      mmio_region_write32(base, OT_SIGNED(offset), current_word);
+20004066:       |  |  |      4522                       lw      a0,8(sp)
+mmio_region_write32():
+/proc/self/cwd/./sw/device/lib/base/mmio.h:149
+  ((volatile uint32_t *)base.base)[OT_UNSIGNED(offset) / sizeof(uint32_t)] =
+20004068:       |  |  |      ffcb7593           andi    a1,s6,-4
+2000406c:       |  |  |      95d2                       add     a1,a1,s4
+2000406e:       |  |  |      c188                       sw      a0,0(a1)
+mmio_region_memcpy32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:96
+    offset += bytes_to_copy;
+20004070:       |  |  \----> 9b22                       add     s6,s6,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:98
+    len -= bytes_to_copy;
+20004072:       |  |         8c81                       sub     s1,s1,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:97
+    buf += bytes_to_copy;
+20004074:       |  |         99a2                       add     s3,s3,s0
+/proc/self/cwd/sw/device/lib/base/mmio.c:68
+  while (len > 0) {
+20004076:       |  \-------- f0e1                       bnez    s1,20004036 <mmio_region_memcpy32+0x5e>
+/proc/self/cwd/sw/device/lib/base/mmio.c:100
+}
+20004078:       \----------> 50b2                       lw      ra,44(sp)
+2000407a:                    5422                       lw      s0,40(sp)
+2000407c:                    5492                       lw      s1,36(sp)
+2000407e:                    5902                       lw      s2,32(sp)
+20004080:                    49f2                       lw      s3,28(sp)
+20004082:                    4a62                       lw      s4,24(sp)
+20004084:                    4ad2                       lw      s5,20(sp)
+20004086:                    4b42                       lw      s6,16(sp)
+20004088:                    6145                       addi    sp,sp,48
+2000408a:                    8082                       ret
+
+2000408c <mmio_region_memcpy_to_mmio32>:
+mmio_region_memcpy_to_mmio32():
+/proc/self/cwd/sw/device/lib/base/mmio.c:112
+void mmio_region_memcpy_to_mmio32(mmio_region_t base, uint32_t offset,
+                                  const void *src, size_t len) {
+  // Below `const` cast is necessary to be able to use `mmio_region_memcpy32`
+  // for both read and write operations but `from_mmio = false` means that `src`
+  // will never be written to.
+  mmio_region_memcpy32(base, offset, (void *)src, len, false);
+2000408c:       4701                    li      a4,0
+2000408e:       b7a9                    j       20003fd8 <mmio_region_memcpy32>
+
+20004090 <memcpy>:
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:63
+  return word << 24 | word << 16 | word << 8 | word;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memcpy)(void *restrict dest,
+                                    const void *restrict src, size_t len) {
+  if (dest == NULL || src == NULL) {
+20004090:                    00153693           seqz    a3,a0
+20004094:                    0015b713           seqz    a4,a1
+20004098:                    8ed9                       or      a3,a3,a4
+2000409a:       /----------- eabd                       bnez    a3,20004110 <memcpy+0x80>
+2000409c:       |            4691                       li      a3,4
+2000409e:       |            88b2                       mv      a7,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+200040a0:       |        /-- 00d66c63           bltu    a2,a3,200040b8 <memcpy+0x28>
+200040a4:       |        |   00a5c6b3           xor     a3,a1,a0
+200040a8:       |        |   8a8d                       andi    a3,a3,3
+200040aa:       |        |   8832                       mv      a6,a2
+200040ac:       |        |   88b2                       mv      a7,a2
+200040ae:       |     /--|-- ee81                       bnez    a3,200040c6 <memcpy+0x36>
+200040b0:       |     |  |   40a006b3           neg     a3,a0
+200040b4:       |     |  |   0036f893           andi    a7,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+200040b8:       |     |  \-> 411606b3           sub     a3,a2,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+200040bc:       |     |      9af1                       andi    a3,a3,-4
+200040be:       |     |      0116e833           or      a6,a3,a7
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  unsigned char *dest8 = (unsigned char *)dest;
+  const unsigned char *src8 = (const unsigned char *)src;
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, src, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+200040c2:       |  /--|----- 00088d63           beqz    a7,200040dc <memcpy+0x4c>
+200040c6:       |  |  \----> 82ae                       mv      t0,a1
+200040c8:       |  |         872a                       mv      a4,a0
+200040ca:       |  |         86c6                       mv      a3,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:72
+    dest8[i] = src8[i];
+200040cc:       |  |     /-> 00028783           lb      a5,0(t0)
+200040d0:       |  |     |   00f70023           sb      a5,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:71
+  for (; i < body_offset; ++i) {
+200040d4:       |  |     |   16fd                       addi    a3,a3,-1
+200040d6:       |  |     |   0705                       addi    a4,a4,1
+200040d8:       |  |     |   0285                       addi    t0,t0,1
+200040da:       |  |     \-- faed                       bnez    a3,200040cc <memcpy+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  }
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200040dc:       |  \--/----X 0108fb63           bgeu    a7,a6,200040f2 <memcpy+0x62>
+/proc/self/cwd/sw/device/lib/base/memory.c:75
+    uint32_t word = read_32(&src8[i]);
+200040e0:       |     |  /-> 011586b3           add     a3,a1,a7
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  // Failing to get that particular codegen in either GCC or Clang with -O2 or
+  // -Os set shall be considered a bug in this function. The same applies to
+  // `write32()`.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  uint32_t val;
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200040e4:       |     |  |   4294                       lw      a3,0(a3)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:76
+    write_32(word, &dest8[i]);
+200040e6:       |     |  |   01150733           add     a4,a0,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200040ea:       |     |  |   0891                       addi    a7,a7,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+inline void write_32(uint32_t value, void *ptr) {
+  // Both GCC and Clang optimize the code below into a single word-store on most
+  // platforms. See the comment in `read_32()` for more implementation-private
+  // information.
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+  __builtin_memcpy(ptr, &value, sizeof(uint32_t));
+200040ec:       |     |  |   c314                       sw      a3,0(a4)
+memcpy():
+/proc/self/cwd/sw/device/lib/base/memory.c:74
+200040ee:       |     |  \-- ff08e9e3           bltu    a7,a6,200040e0 <memcpy+0x50>
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  }
+  for (; i < len; ++i) {
+200040f2:       +-----\----X 00c8ff63           bgeu    a7,a2,20004110 <memcpy+0x80>
+200040f6:       |            41160633           sub     a2,a2,a7
+200040fa:       |            01150733           add     a4,a0,a7
+200040fe:       |            95c6                       add     a1,a1,a7
+/proc/self/cwd/sw/device/lib/base/memory.c:79
+    dest8[i] = src8[i];
+20004100:       |        /-> 00058683           lb      a3,0(a1)
+20004104:       |        |   00d70023           sb      a3,0(a4)
+/proc/self/cwd/sw/device/lib/base/memory.c:78
+  for (; i < len; ++i) {
+20004108:       |        |   167d                       addi    a2,a2,-1
+2000410a:       |        |   0705                       addi    a4,a4,1
+2000410c:       |        |   0585                       addi    a1,a1,1
+2000410e:       |        \-- fa6d                       bnez    a2,20004100 <memcpy+0x70>
+/proc/self/cwd/sw/device/lib/base/memory.c:82
+  }
+  return dest;
+}
+20004110:       \----------> 8082                       ret
+
+20004112 <memset>:
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:84
+
+void *OT_PREFIX_IF_NOT_RV32(memset)(void *dest, int value, size_t len) {
+20004112:                 4691                  li      a3,4
+20004114:                 8732                  mv      a4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004116:             /-- 00d66563              bltu    a2,a3,20004120 <memset+0xe>
+2000411a:             |   40a00733              neg     a4,a0
+2000411e:             |   8b0d                  andi    a4,a4,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+20004120:             \-> 40e606b3              sub     a3,a2,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+20004124:                 9af1                  andi    a3,a3,-4
+20004126:                 00e6e833              or      a6,a3,a4
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(dest, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+2000412a:          /----- cb01                  beqz    a4,2000413a <memset+0x28>
+2000412c:          |      87aa                  mv      a5,a0
+2000412e:          |      86ba                  mv      a3,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:92
+    dest8[i] = value8;
+20004130:          |  /-> 00b78023              sb      a1,0(a5)
+/proc/self/cwd/sw/device/lib/base/memory.c:91
+  for (; i < body_offset; ++i) {
+20004134:          |  |   16fd                  addi    a3,a3,-1
+20004136:          |  |   0785                  addi    a5,a5,1
+20004138:          |  \-- fee5                  bnez    a3,20004130 <memset+0x1e>
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+2000413a:       /--\----X 03077063              bgeu    a4,a6,2000415a <memset+0x48>
+2000413e:       |         0ff5f693              andi    a3,a1,255
+20004142:       |         010107b7              lui     a5,0x1010
+20004146:       |         10178793              addi    a5,a5,257 # 1010101 <_ottf_size+0xf90101>
+2000414a:       |         02f687b3              mul     a5,a3,a5
+/proc/self/cwd/sw/device/lib/base/memory.c:96
+    write_32(value32, &dest8[i]);
+2000414e:       |     /-> 00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+20004152:       |     |   0711                  addi    a4,a4,4
+write_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:149
+20004154:       |     |   c29c                  sw      a5,0(a3)
+memset():
+/proc/self/cwd/sw/device/lib/base/memory.c:95
+20004156:       |     \-- ff076ce3              bltu    a4,a6,2000414e <memset+0x3c>
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  }
+  for (; i < len; ++i) {
+2000415a:       \--/----X 00c77a63              bgeu    a4,a2,2000416e <memset+0x5c>
+2000415e:          |      8e19                  sub     a2,a2,a4
+20004160:          |      00e506b3              add     a3,a0,a4
+/proc/self/cwd/sw/device/lib/base/memory.c:99
+    dest8[i] = value8;
+20004164:          |  /-> 00b68023              sb      a1,0(a3)
+/proc/self/cwd/sw/device/lib/base/memory.c:98
+  for (; i < len; ++i) {
+20004168:          |  |   167d                  addi    a2,a2,-1
+2000416a:          |  |   0685                  addi    a3,a3,1
+2000416c:          |  \-- fe65                  bnez    a2,20004164 <memset+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:101
+  }
+  return dest;
+2000416e:          \----> 8082                  ret
+
+20004170 <memchr>:
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:190
+    }
+  }
+  return kMemCmpEq;
+}
+
+void *OT_PREFIX_IF_NOT_RV32(memchr)(const void *ptr, int value, size_t len) {
+20004170:                             4691                      li      a3,4
+20004172:                             8eb2                      mv      t4,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004174:                         /-- 00d66663                  bltu    a2,a3,20004180 <memchr+0x10>
+20004178:                         |   40a00733                  neg     a4,a0
+2000417c:                         |   00377e93                  andi    t4,a4,3
+20004180:                         \-> 0ff5fe13                  andi    t3,a1,255
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  const uint8_t value8 = (uint8_t)value;
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+  size_t i = 0;
+  for (; i < body_offset; ++i) {
+20004184:                      /----- 000e8b63                  beqz    t4,2000419a <memchr+0x2a>
+20004188:                      |      85aa                      mv      a1,a0
+2000418a:                      |      87f6                      mv      a5,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:198
+    if (ptr8[i] == value8) {
+2000418c:                      |  /-> 0005c683                  lbu     a3,0(a1)
+20004190:       /--------------|--|-- 07c68f63                  beq     a3,t3,2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:197
+  for (; i < body_offset; ++i) {
+20004194:       |              |  |   17fd                      addi    a5,a5,-1
+20004196:       |              |  |   0585                      addi    a1,a1,1
+20004198:       |              |  \-- fbf5                      bnez    a5,2000418c <memchr+0x1c>
+2000419a:       |              \----> 41d605b3                  sub     a1,a2,t4
+2000419e:       |                     99f1                      andi    a1,a1,-4
+200041a0:       |                     01d5e833                  or      a6,a1,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+      return (void *)&ptr8[i];
+    }
+  }
+  const uint32_t value32 = repeat_byte_to_u32(value8);
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200041a4:       |  /----------------- 050ef763                  bgeu    t4,a6,200041f2 <memchr+0x82>
+200041a8:       |  |                  010105b7                  lui     a1,0x1010
+200041ac:       |  |                  10158593                  addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+200041b0:       |  |                  02be02b3                  mul     t0,t3,a1
+200041b4:       |  |                  0ff00893                  li      a7,255
+200041b8:       |  |                  65c1                      lui     a1,0x10
+200041ba:       |  |                  f0058393                  addi    t2,a1,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+200041be:       |  |                  00ff0337                  lui     t1,0xff0
+/proc/self/cwd/sw/device/lib/base/memory.c:204
+    uint32_t word = read_32(&ptr8[i]);
+200041c2:       |  |              /-> 01d505b3                  add     a1,a0,t4
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+200041c6:       |  |              |   4194                      lw      a3,0(a1)
+memchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:205
+    uint32_t bits_eq = ~(word ^ value32);
+200041c8:       |  |              |   0056c7b3                  xor     a5,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:208
+    static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+                  "memchr assumes that the system is little endian.");
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+200041cc:       |  |              |   40f8f733                  andn    a4,a7,a5
+200041d0:       +--|--------------|-- 03170f63                  beq     a4,a7,2000420e <memchr+0x9e>
+200041d4:       |  |              |   4056c6b3                  xnor    a3,a3,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:211
+      return (void *)&ptr8[i];
+    }
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+200041d8:       |  |              |   0076f733                  and     a4,a3,t2
+200041dc:       |  |  /-----------|-- 02770b63                  beq     a4,t2,20004212 <memchr+0xa2>
+/proc/self/cwd/sw/device/lib/base/memory.c:214
+      return (void *)&ptr8[i + 1];
+    }
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+200041e0:       |  |  |           |   0066f6b3                  and     a3,a3,t1
+200041e4:       |  |  |  /--------|-- 02668963                  beq     a3,t1,20004216 <memchr+0xa6>
+/proc/self/cwd/sw/device/lib/base/memory.c:217
+      return (void *)&ptr8[i + 2];
+    }
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+200041e8:       |  |  |  |        |   83e1                      srli    a5,a5,0x18
+200041ea:       |  |  |  |  /-----|-- cb85                      beqz    a5,2000421a <memchr+0xaa>
+/proc/self/cwd/sw/device/lib/base/memory.c:203
+  for (; i < tail_offset; i += sizeof(uint32_t)) {
+200041ec:       |  |  |  |  |     |   0e91                      addi    t4,t4,4
+200041ee:       |  |  |  |  |     \-- fd0eeae3                  bltu    t4,a6,200041c2 <memchr+0x52>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+      return (void *)&ptr8[i + 3];
+    }
+  }
+  for (; i < len; ++i) {
+200041f2:       |  \--|--|--|--/----X 00cefd63                  bgeu    t4,a2,2000420c <memchr+0x9c>
+200041f6:       |     |  |  |  |      41d60633                  sub     a2,a2,t4
+200041fa:       |     |  |  |  |      01d505b3                  add     a1,a0,t4
+/proc/self/cwd/sw/device/lib/base/memory.c:222
+    if (ptr8[i] == value8) {
+200041fe:       |     |  |  |  |  /-> 0005c503                  lbu     a0,0(a1)
+20004202:       +-----|--|--|--|--|-- 01c50663                  beq     a0,t3,2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:221
+  for (; i < len; ++i) {
+20004206:       |     |  |  |  |  |   167d                      addi    a2,a2,-1
+20004208:       |     |  |  |  |  |   0585                      addi    a1,a1,1
+2000420a:       |     |  |  |  |  \-- fa75                      bnez    a2,200041fe <memchr+0x8e>
+2000420c:       |     |  |  |  \----> 4581                      li      a1,0
+/proc/self/cwd/sw/device/lib/base/memory.c:227
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+2000420e:       >-----|--|--|-------> 852e                      mv      a0,a1
+20004210:       |     |  |  |         8082                      ret
+/proc/self/cwd/sw/device/lib/base/memory.c:212
+      return (void *)&ptr8[i + 1];
+20004212:       |     \--|--|-------> 0585                      addi    a1,a1,1
+20004214:       +--------|--|-------- bfed                      j       2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:215
+      return (void *)&ptr8[i + 2];
+20004216:       |        \--|-------> 0589                      addi    a1,a1,2
+20004218:       +-----------|-------- bfdd                      j       2000420e <memchr+0x9e>
+/proc/self/cwd/sw/device/lib/base/memory.c:218
+      return (void *)&ptr8[i + 3];
+2000421a:       |           \-------> 058d                      addi    a1,a1,3
+2000421c:       \-------------------- bfcd                      j       2000420e <memchr+0x9e>
+
+2000421e <memrchr>:
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:229
+
+void *OT_PREFIX_IF_NOT_RV32(memrchr)(const void *ptr, int value, size_t len) {
+2000421e:                          4691                 li      a3,4
+20004220:                          82b2                 mv      t0,a2
+compute_num_leading_bytes():
+/proc/self/cwd/sw/device/lib/base/memory.c:20
+  if (len < alignof(uint32_t)) {
+20004222:                      /-- 00d66663             bltu    a2,a3,2000422e <memrchr+0x10>
+20004226:                      |   40a006b3             neg     a3,a0
+2000422a:                      |   0036f293             andi    t0,a3,3
+compute_alignment():
+/proc/self/cwd/sw/device/lib/base/memory.c:52
+  const size_t num_words = (len - num_leading_bytes) / sizeof(uint32_t);
+2000422e:                      \-> 405606b3             sub     a3,a2,t0
+/proc/self/cwd/sw/device/lib/base/memory.c:53
+  *out_tail_offset = num_leading_bytes + num_words * sizeof(uint32_t);
+20004232:                          9af1                 andi    a3,a3,-4
+20004234:                          0056e7b3             or      a5,a3,t0
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:237
+
+  size_t body_offset, tail_offset;
+  compute_alignment(ptr, NULL, len, &body_offset, &tail_offset);
+
+  size_t end = len;
+  for (; end > tail_offset; --end) {
+20004238:                          0ac7d3b3             minu    t2,a5,a2
+2000423c:                          00c50733             add     a4,a0,a2
+20004240:                          0ff5f313             andi    t1,a1,255
+20004244:                   /--/-X 00c7fc63             bgeu    a5,a2,2000425c <memrchr+0x3e>
+/proc/self/cwd/sw/device/lib/base/memory.c:239
+    const size_t i = end - 1;
+    if (ptr8[i] == value8) {
+20004248:                   |  |   fff74683             lbu     a3,-1(a4)
+2000424c:                   |  |   fff70593             addi    a1,a4,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:238
+    const size_t i = end - 1;
+20004250:                   |  |   167d                 addi    a2,a2,-1
+20004252:                   |  |   872e                 mv      a4,a1
+20004254:                   |  \-- fe6698e3             bne     a3,t1,20004244 <memrchr+0x26>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+    if (ptr8[i] == value8) {
+      return (void *)&ptr8[i];
+    }
+  }
+  return NULL;
+}
+20004258:       /-----------|----> 852e                 mv      a0,a1
+2000425a:       |           |      8082                 ret
+2000425c:       |           \----> 010105b7             lui     a1,0x1010
+20004260:       |                  10158593             addi    a1,a1,257 # 1010101 <_ottf_size+0xf90101>
+repeat_byte_to_u32():
+/proc/self/cwd/sw/device/lib/base/memory.c:58
+  return word << 24 | word << 16 | word << 8 | word;
+20004264:       |                  02b305b3             mul     a1,t1,a1
+20004268:       |                  00ff0837             lui     a6,0xff0
+2000426c:       |                  6641                 lui     a2,0x10
+2000426e:       |                  f0060613             addi    a2,a2,-256 # ff00 <_non_volatile_scratch_size+0xaf00>
+20004272:       |                  0ff00893             li      a7,255
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:244
+  for (; end > body_offset; end -= sizeof(uint32_t)) {
+20004276:       |           /--/-X 0272fc63             bgeu    t0,t2,200042ae <memrchr+0x90>
+read_32():
+/proc/self/cwd/./sw/device/lib/base/memory.h:88
+  ptr = __builtin_assume_aligned(ptr, alignof(uint32_t));
+2000427a:       |           |  |   007507b3             add     a5,a0,t2
+/proc/self/cwd/./sw/device/lib/base/memory.h:90
+  __builtin_memcpy(&val, ptr, sizeof(uint32_t));
+2000427e:       |           |  |   ffc7a703             lw      a4,-4(a5)
+memrchr():
+/proc/self/cwd/sw/device/lib/base/memory.c:247
+    uint32_t bits_eq = ~(word ^ value32);
+20004282:       |           |  |   00b746b3             xor     a3,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:250
+    if (((bits_eq >> 24) & UINT8_MAX) == UINT8_MAX) {
+20004286:       |           |  |   82e1                 srli    a3,a3,0x18
+20004288:       |  /--------|--|-- ce9d                 beqz    a3,200042c6 <memrchr+0xa8>
+2000428a:       |  |        |  |   40b74733             xnor    a4,a4,a1
+/proc/self/cwd/sw/device/lib/base/memory.c:253
+    if (((bits_eq >> 16) & UINT8_MAX) == UINT8_MAX) {
+2000428e:       |  |        |  |   010776b3             and     a3,a4,a6
+20004292:       |  |  /-----|--|-- 03068d63             beq     a3,a6,200042cc <memrchr+0xae>
+/proc/self/cwd/sw/device/lib/base/memory.c:256
+    if (((bits_eq >> 8) & UINT8_MAX) == UINT8_MAX) {
+20004296:       |  |  |     |  |   00c776b3             and     a3,a4,a2
+2000429a:       |  |  |  /--|--|-- 02c68c63             beq     a3,a2,200042d2 <memrchr+0xb4>
+/proc/self/cwd/sw/device/lib/base/memory.c:259
+    if ((bits_eq & UINT8_MAX) == UINT8_MAX) {
+2000429e:       |  |  |  |  |  |   0ff77693             andi    a3,a4,255
+/proc/self/cwd/sw/device/lib/base/memory.c:245
+    const size_t i = end - sizeof(uint32_t);
+200042a2:       |  |  |  |  |  |   13f1                 addi    t2,t2,-4
+200042a4:       |  |  |  |  |  \-- fd1699e3             bne     a3,a7,20004276 <memrchr+0x58>
+/proc/self/cwd/sw/device/lib/base/memory.c:270
+}
+200042a8:       |  |  |  |  |      007505b3             add     a1,a0,t2
+200042ac:       +--|--|--|--|----- b775                 j       20004258 <memrchr+0x3a>
+200042ae:       |  |  |  |  \----> 951e                 add     a0,a0,t2
+200042b0:       |  |  |  |  /--/-X 02038463             beqz    t2,200042d8 <memrchr+0xba>
+/proc/self/cwd/sw/device/lib/base/memory.c:265
+    if (ptr8[i] == value8) {
+200042b4:       |  |  |  |  |  |   fff54603             lbu     a2,-1(a0)
+200042b8:       |  |  |  |  |  |   fff50593             addi    a1,a0,-1
+/proc/self/cwd/sw/device/lib/base/memory.c:264
+    const size_t i = end - 1;
+200042bc:       |  |  |  |  |  |   13fd                 addi    t2,t2,-1
+200042be:       |  |  |  |  |  |   852e                 mv      a0,a1
+200042c0:       |  |  |  |  |  \-- fe6618e3             bne     a2,t1,200042b0 <memrchr+0x92>
+200042c4:       +--|--|--|--|----- bf51                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:251
+      return (void *)&ptr8[i + 3];
+200042c6:       |  \--|--|--|----> fff78593             addi    a1,a5,-1
+200042ca:       +-----|--|--|----- b779                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:254
+      return (void *)&ptr8[i + 2];
+200042cc:       |     \--|--|----> ffe78593             addi    a1,a5,-2
+200042d0:       +--------|--|----- b761                 j       20004258 <memrchr+0x3a>
+/proc/self/cwd/sw/device/lib/base/memory.c:257
+      return (void *)&ptr8[i + 1];
+200042d2:       |        \--|----> ffd78593             addi    a1,a5,-3
+200042d6:       +-----------|----- b749                 j       20004258 <memrchr+0x3a>
+200042d8:       |           \----> 4581                 li      a1,0
+200042da:       \----------------- bfbd                 j       20004258 <memrchr+0x3a>
+
+200042dc <udiv64_slow>:
+udiv64_slow():
+/proc/self/cwd/sw/device/lib/base/math.c:14
+/**
+ * Extern declaration of inline function.
+ */
+extern size_t ceil_div(size_t a, size_t b);
+
+uint64_t udiv64_slow(uint64_t a, uint64_t b, uint64_t *rem_out) {
+200042dc:                 1141                  addi    sp,sp,-16
+200042de:                 c622                  sw      s0,12(sp)
+200042e0:                 4881                  li      a7,0
+200042e2:                 4801                  li      a6,0
+200042e4:                 4381                  li      t2,0
+200042e6:                 4e01                  li      t3,0
+200042e8:                 03f00f93              li      t6,63
+200042ec:                 00159293              slli    t0,a1,0x1
+200042f0:                 537d                  li      t1,-1
+/proc/self/cwd/sw/device/lib/base/math.c:28
+  // upon.
+  size_t bits = sizeof(uint64_t) * 8;
+  for (size_t i = 0; i < bits; ++i) {
+    rem <<= 1;
+    quot <<= 1;
+    rem |= (a >> (bits - i - 1)) & 1;
+200042f2:       /-------> fe0f8793              addi    a5,t6,-32
+200042f6:       |     /-- 0007c563              bltz    a5,20004300 <udiv64_slow+0x24>
+200042fa:       |     |   01f5deb3              srl     t4,a1,t6
+200042fe:       |  /--|-- a809                  j       20004310 <udiv64_slow+0x34>
+20004300:       |  |  \-> 01f55eb3              srl     t4,a0,t6
+20004304:       |  |      ffffc793              not     a5,t6
+20004308:       |  |      00f297b3              sll     a5,t0,a5
+2000430c:       |  |      00feeeb3              or      t4,t4,a5
+20004310:       |  \----> 01f3d793              srli    a5,t2,0x1f
+20004314:       |         0e06                  slli    t3,t3,0x1
+20004316:       |         00fe6e33              or      t3,t3,a5
+2000431a:       |         0386                  slli    t2,t2,0x1
+2000431c:       |         001ef793              andi    a5,t4,1
+20004320:       |         0077eeb3              or      t4,a5,t2
+/proc/self/cwd/sw/device/lib/base/math.c:34
+
+    // We need to keep bringing down zeros until `rem`, the running total, is
+    // large enough that we can subtract off `b`; this tells us the value we
+    // would have had to multiply `a` by to produce this current step in the
+    // division.
+    if (rem >= b) {
+20004324:       |  /----- 00de0563              beq     t3,a3,2000432e <udiv64_slow+0x52>
+20004328:       |  |      00de37b3              sltu    a5,t3,a3
+2000432c:       |  |  /-- a019                  j       20004332 <udiv64_slow+0x56>
+2000432e:       |  \--|-> 00ceb7b3              sltu    a5,t4,a2
+20004332:       |     \-> 0017cf13              xori    t5,a5,1
+20004336:       |         01f8d793              srli    a5,a7,0x1f
+2000433a:       |         0806                  slli    a6,a6,0x1
+2000433c:       |         00f86833              or      a6,a6,a5
+20004340:       |         0886                  slli    a7,a7,0x1
+20004342:       |         41e007b3              neg     a5,t5
+20004346:       |         00d7f433              and     s0,a5,a3
+2000434a:       |         8ff1                  and     a5,a5,a2
+2000434c:       |         40fe83b3              sub     t2,t4,a5
+20004350:       |         00feb7b3              sltu    a5,t4,a5
+20004354:       |         408e0433              sub     s0,t3,s0
+20004358:       |         40f40e33              sub     t3,s0,a5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+2000435c:       |         1ffd                  addi    t6,t6,-1
+/proc/self/cwd/sw/device/lib/base/math.c:34
+    if (rem >= b) {
+2000435e:       |         01e8e8b3              or      a7,a7,t5
+/proc/self/cwd/sw/device/lib/base/math.c:25
+  for (size_t i = 0; i < bits; ++i) {
+20004362:       \-------- f86f98e3              bne     t6,t1,200042f2 <udiv64_slow+0x16>
+/proc/self/cwd/sw/device/lib/base/math.c:40
+      rem -= b;
+      quot |= 1;
+    }
+  }
+
+  if (rem_out != NULL) {
+20004366:             /-- c709                  beqz    a4,20004370 <udiv64_slow+0x94>
+/proc/self/cwd/sw/device/lib/base/math.c:41
+    *rem_out = rem;
+20004368:             |   00772023              sw      t2,0(a4)
+2000436c:             |   01c72223              sw      t3,4(a4)
+/proc/self/cwd/sw/device/lib/base/math.c:43
+  }
+  return quot;
+20004370:             \-> 8546                  mv      a0,a7
+20004372:                 85c2                  mv      a1,a6
+20004374:                 4432                  lw      s0,12(sp)
+20004376:                 0141                  addi    sp,sp,16
+20004378:                 8082                  ret
+
+2000437a <to_cpu_cycles>:
+to_cpu_cycles():
+/proc/self/cwd/sw/device/lib/arch/device_sim_dv.c:26
+
+const uint64_t kClockFreqCpuMhz = 100;
+
+const uint64_t kClockFreqCpuHz = kClockFreqCpuMhz * 1000 * 1000;
+
+uint64_t to_cpu_cycles(uint64_t usec) { return usec * kClockFreqCpuMhz; }
+2000437a:       06400613                li      a2,100
+2000437e:       02c585b3                mul     a1,a1,a2
+20004382:       02c536b3                mulhu   a3,a0,a2
+20004386:       95b6                    add     a1,a1,a3
+20004388:       02c50533                mul     a0,a0,a2
+2000438c:       8082                    ret
+2000438e:       0000                    unimp
diff --git a/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.signed.bin b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.signed.bin
new file mode 100644
index 0000000000000..34299199cf688
Binary files /dev/null and b/sw/device/silicon_creator/rom/e2e/ate/binaries/ate_gpio_toggle_test_sim_dv.signed.bin differ
diff --git a/sw/device/silicon_creator/rom/e2e/ate/signatures/BUILD b/sw/device/silicon_creator/rom/e2e/ate/signatures/BUILD
new file mode 100644
index 0000000000000..0771afe455eb8
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/signatures/BUILD
@@ -0,0 +1,18 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "ecdsa_signatures",
+    srcs = glob(["*.ecdsa_sig"]),
+)
+
+filegroup(
+    name = "spx_signatures",
+    srcs = glob(
+        ["*.spx_sig"],
+        allow_empty = True,
+    ),
+)
diff --git a/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_fpga_cw310_sival.ecdsa_sig b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_fpga_cw310_sival.ecdsa_sig
new file mode 100644
index 0000000000000..96b532b183e43
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_fpga_cw310_sival.ecdsa_sig
@@ -0,0 +1,2 @@
+GñR!Q!àThûþ£ïΆí‹þÛ¦§m
+XóLž¢íV™¬p�ñDZץÑ#Æíx­úsC}êxU(©æ
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..bf5b84b6f39c3
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_silicon_creator.ecdsa_sig
@@ -0,0 +1 @@
+±ÈAdLØNÀQŽqé%ÌÁ4ð'^“š@¨³çPíÙl
Paò’(Ü:H[nçå3&pÃ
RÄBˆ8õºŒ}†ä
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_sim_dv.ecdsa_sig b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_sim_dv.ecdsa_sig
new file mode 100644
index 0000000000000..4de5b257c8722
Binary files /dev/null and b/sw/device/silicon_creator/rom/e2e/ate/signatures/ate_gpio_toggle_test_sim_dv.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom/e2e/boot_data_recovery/BUILD b/sw/device/silicon_creator/rom/e2e/boot_data_recovery/BUILD
index 41e1e947160db..e1867d78cfbf0 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_data_recovery/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_data_recovery/BUILD
@@ -10,20 +10,14 @@ load(
     "fpga_params",
     "opentitan_test",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:const.bzl",
     "CONST",
     "hex",
     "hex_digits",
 )
-load(
-    "//rules:manifest.bzl",
-    "manifest",
-)
+load("//rules:manifest.bzl", "manifest")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -32,10 +26,7 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_PASS",
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_bad_manifest/BUILD b/sw/device/silicon_creator/rom/e2e/boot_policy_bad_manifest/BUILD
index b08031376c0d9..cf1d512b86f14 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_bad_manifest/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_bad_manifest/BUILD
@@ -13,11 +13,6 @@ load(
     "//rules:manifest.bzl",
     "manifest",
 )
-load(
-    "//rules:opentitan_test.bzl",
-    "OTTF_SUCCESS_MSG",
-    "ROM_BOOT_FAILURE_MSG",
-)
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -31,6 +26,8 @@ load(
 )
 load(
     "//rules/opentitan:defs.bzl",
+    "OTTF_SUCCESS_MSG",
+    "ROM_BOOT_FAILURE_MSG",
     "cw310_params",
     "fpga_params",
     "opentitan_test",
@@ -241,7 +238,7 @@ BOOT_POLICY_BAD_MANIFEST_CASES = [
         ),
         srcs = ["//sw/device/silicon_creator/rom/e2e:empty_test"],
         # Use the prod key because it is valid in every LC state.
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
         },
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_big_image/BUILD b/sw/device/silicon_creator/rom/e2e/boot_policy_big_image/BUILD
index bd43dd46720ed..506c0cef81313 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_big_image/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_big_image/BUILD
@@ -34,7 +34,7 @@ BOOT_POLICY_BIG_IMAGE_CASES = [
         ),
         srcs = ["resizable_test.c"],
         # Use the prod key because it is valid in every LC state.
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
         },
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/BUILD b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/BUILD
index 2fa1cd3f86986..69bd59b59c56a 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/BUILD
@@ -22,7 +22,6 @@ load(
 )
 load(
     "//rules/opentitan:defs.bzl",
-    "cw310_params",
     "fpga_params",
     "opentitan_binary",
     "opentitan_test",
@@ -31,90 +30,24 @@ load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "SLOTS",
 )
+load(
+    "//sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error:defs.bzl",
+    "BOOT_POLICY_FLASH_ECC_ERROR_TESTS",
+    "FLASH_ECC_ERROR_CAUSES",
+    "SEC_VERS",
+)
 
 package(default_visibility = ["//visibility:public"])
 
-FLASH_ECC_ERROR_CAUSES = [
-    {
-        "cause": "manifest_security_version",
-        "id": 0,
-    },
-    {
-        "cause": "manifest_identifier",
-        "id": 1,
-    },
-    {
-        "cause": "manifest_length",
-        "id": 2,
-    },
-    {
-        "cause": "manifest_manifest_version",
-        "id": 3,
-    },
-    {
-        "cause": "manifest_signed_region_end",
-        "id": 4,
-    },
-    {
-        "cause": "manifest_code_start",
-        "id": 5,
-    },
-    {
-        "cause": "manifest_code_end",
-        "id": 6,
-    },
-    {
-        "cause": "manifest_entry_point",
-        "id": 7,
-    },
-    {
-        "cause": "manifest_ecdsa_public_key",
-        "id": 8,
-    },
-    {
-        "cause": "manifest_usage_constraints_selector_bits",
-        "id": 9,
-    },
-    {
-        "cause": "manifest_ecdsa_signature",
-        "id": 10,
-    },
-    {
-        "cause": "manifest_extension_spx_public_key",
-        "id": 11,
-    },
-    {
-        "cause": "manifest_extension_spx_signature",
-        "id": 12,
-    },
-    {
-        "cause": "code_first_word",
-        "id": 13,
-    },
-    {
-        "cause": "code_middle_word",
-        "id": 14,
-    },
-    {
-        "cause": "code_last_word",
-        "id": 15,
-    },
-]
+filegroup(
+    name = "uncorrupted_test_src",
+    srcs = ["uncorrupted_test.c"],
+)
 
-BOOT_POLICY_FLASH_ECC_ERROR_TESTS = [
-    {
-        "name": "a_corrupt_b_valid_{}",
-        "a": ":flash_ecc_self_corruption_slot_a_{}",
-        "b": ":uncorrupted_test_slot_b",
-        "exit_success": "Booted slot=0x20080000; Cause={}",
-    },
-    {
-        "name": "a_valid_b_corrupt_{}",
-        "a": ":uncorrupted_test_slot_a",
-        "b": ":flash_ecc_self_corruption_slot_b_{}",
-        "exit_success": "Booted slot=0x20000000; Cause={}",
-    },
-]
+filegroup(
+    name = "flash_ecc_error_test_src",
+    srcs = ["flash_ecc_error_test.c"],
+)
 
 otp_json(
     name = "otp_json_flash_data_cfg_default_scr_and_ecc_enabled",
@@ -160,11 +93,6 @@ otp_image(
     visibility = ["//visibility:private"],
 )
 
-SEC_VERS = [
-    0,
-    1,
-]
-
 [
     manifest({
         "name": "manifest_sec_ver_{}".format(sec_ver),
@@ -179,9 +107,9 @@ SEC_VERS = [
     opentitan_binary(
         name = "uncorrupted_test_slot_{}".format(slot),
         testonly = True,
-        srcs = ["uncorrupted_test.c"],
+        srcs = [":uncorrupted_test_src"],
         # Use the prod key because it is valid in every LC state.
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = [
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
         ],
@@ -189,7 +117,7 @@ SEC_VERS = [
         # This image always get the lower security version as we want the image that self-corrupts the ECC
         # of the manifest identifier to always boot first, befause attempting to boot this (known-good) image.
         manifest = ":manifest_sec_ver_0",
-        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
+        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
         deps = [
             "//sw/device/lib/runtime:log",
             "//sw/device/lib/testing/test_framework:ottf_main",
@@ -207,9 +135,9 @@ SEC_VERS = [
             c["cause"],
         ),
         testonly = True,
-        srcs = ["flash_ecc_error_test.c"],
+        srcs = ["flash_ecc_error_test_src"],
         # Use the prod key because it is valid in every LC state.
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = [
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
         ],
@@ -219,11 +147,12 @@ SEC_VERS = [
         ],
         # This image always get the higher security version as we want it to always boot first.
         manifest = ":manifest_sec_ver_1",
-        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
+        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
         deps = [
             "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
             "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
             "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/arch:boot_stage",
             "//sw/device/lib/base:abs_mmio",
             "//sw/device/lib/base:macros",
             "//sw/device/lib/base:status",
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/defs.bzl b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/defs.bzl
new file mode 100644
index 0000000000000..649907622727d
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/defs.bzl
@@ -0,0 +1,96 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+FLASH_ECC_ERROR_CAUSES = [
+    {
+        "cause": "manifest_security_version",
+        "id": 0,
+    },
+    {
+        "cause": "manifest_identifier",
+        "id": 1,
+    },
+    {
+        "cause": "manifest_length",
+        "id": 2,
+    },
+    {
+        "cause": "manifest_manifest_version",
+        "id": 3,
+    },
+    {
+        "cause": "manifest_signed_region_end",
+        "id": 4,
+    },
+    {
+        "cause": "manifest_code_start",
+        "id": 5,
+    },
+    {
+        "cause": "manifest_code_end",
+        "id": 6,
+    },
+    {
+        "cause": "manifest_entry_point",
+        "id": 7,
+    },
+    {
+        "cause": "manifest_ecdsa_public_key",
+        "id": 8,
+    },
+    {
+        "cause": "manifest_usage_constraints_selector_bits",
+        "id": 9,
+    },
+    {
+        "cause": "manifest_ecdsa_signature",
+        "id": 10,
+    },
+    {
+        "cause": "manifest_extension_spx_public_key",
+        "id": 11,
+    },
+    {
+        "cause": "manifest_extension_spx_signature",
+        "id": 12,
+    },
+    # We only test corrupting the first flash word since this is likely not in
+    # the range of test code that needs to execute successfully to drive the
+    # test, but still exercising the scenario of a flash corruption happening
+    # in the code region.
+    {
+        "cause": "code_first_word",
+        "id": 13,
+    },
+]
+
+BOOT_POLICY_FLASH_ECC_ERROR_TESTS = [
+    {
+        "name": "a_corrupt_b_valid_{}",
+        "a": ":flash_ecc_self_corruption_slot_a_{}",
+        "b": ":uncorrupted_test_slot_b",
+        # The regex allows either 8 or 1 in the address, which accomodates the test program
+        # being linked as either a ROM_EXT or application.
+        "exit_success": "Booted slot=0x200[89]0000; Cause={}",
+        # When running under the ROM_EXT, we want to try SlotA first and make sure that
+        # we handle the corrupted flash properly.
+        "primary": "SlotA",
+    },
+    {
+        "name": "a_valid_b_corrupt_{}",
+        "a": ":uncorrupted_test_slot_a",
+        "b": ":flash_ecc_self_corruption_slot_b_{}",
+        # The regex allows either 0 or 1 in the address, which accomodates the test program
+        # being linked as either a ROM_EXT or application.
+        "exit_success": "Booted slot=0x200[01]0000; Cause={}",
+        # When running under the ROM_EXT, we want to try SlotB first and make sure that
+        # we handle the corrupted flash properly.
+        "primary": "SlotB",
+    },
+]
+
+SEC_VERS = [
+    0,
+    1,
+]
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/flash_ecc_error_test.c b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/flash_ecc_error_test.c
index 87032bcb40ffd..e222a27675811 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/flash_ecc_error_test.c
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error/flash_ecc_error_test.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/arch/boot_stage.h"
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/status.h"
@@ -51,7 +52,8 @@ typedef enum rom_ext_slot {
 /**
  * Manifest offsets to corrupt.
  *
- * These fields are unique as they are read via pointer dereferces in the ROM.
+ * These fields are unique as they are read via pointer dereferces in the
+ * ROM[_EXT].
  * See `sw/device/silicon_creator/lib/manifest.h`.
  */
 enum {
@@ -70,7 +72,7 @@ enum {
 };
 
 /**
- * ROM_EXT code offsets to corrupt.
+ * ROM_EXT/Application code offsets to corrupt.
  *
  * These are assigned non-word aligned values so thay can be differentiated from
  * the hardcoded manifest offsets above.
@@ -95,9 +97,9 @@ enum {
   kRomExtSlotAManifestIdAddr = kRomExtSlotAFirstAddr + kManifestIdOffest,
   kRomExtSlotBManifestIdAddr = kRomExtSlotBFirstAddr + kManifestIdOffest,
 
-  // Flash banks for each half of flash.
-  kFlashBank0DataRegion = 0,
-  kFlashBank1DataRegion = 1,
+  // We use flash configuration region 2 because when this test runs under the
+  // ROM_EXT, the ROM_EXT will use regions 0 & 1 for itself.
+  kFlashConfigRegion = 2,
 };
 
 OT_ASSERT_MEMBER_OFFSET_AS_ENUM(manifest_t, security_version,
@@ -136,7 +138,7 @@ typedef struct corruption_word {
 /**
  * Offsets of the manifest fields and code words we corrupt in this test.
  *
- * The fields of the manifest we corrupt are based on the order in which ROM
+ * The fields of the manifest we corrupt are based on the order in which
  * manifest fields are currently checked during boot process:
  *   1.  security_version
  *   2.  identifier
@@ -152,10 +154,11 @@ typedef struct corruption_word {
  *   12. usage_constraints->selector_bits,
  *   13. ecdsa signature
  *
- * We corrupt the flash ECC of each field / code word to test the ROM either:
- *   a. proceeds immediately to try to boot the next slot, or
- *   b. triggers a signature verification failure that will then cause the ROM
- *      to try to boot the next slot.
+ * We corrupt the flash ECC of each field / code word to test the ROM[_EXT]
+ * either:
+ *     a. proceeds immediately to try to boot the next slot, or
+ *     b. triggers a signature verification failure that will then cause the
+ *        ROM[_EXT] to try to boot the next slot.
  */
 static const corruption_word_t kWords2Corrupt[] = {
     // Manifest corruption offsets.
@@ -186,8 +189,6 @@ static const corruption_word_t kWords2Corrupt[] = {
 
     // Code corruption offsets.
     {.offset = kCodeFirstWordOffset, .description = "code_first_word"},
-    {.offset = kCodeMiddleWordOffset, .description = "code_middle_word"},
-    {.offset = kCodeLastWordOffset, .description = "code_last_word"},
 };
 
 static void init_peripherals(void) {
@@ -216,26 +217,25 @@ static uint32_t compute_flash_page_index(rom_ext_slot_t rom_ext_slot,
                                          uint32_t byte_offset_in_bank) {
   uint32_t page_idx = rom_ext_slot == kRomExtSlotA ? kRomExtSlotAFirstPageIndex
                                                    : kRomExtSlotBFirstPageIndex;
+
   page_idx += byte_offset_in_bank / FLASH_CTRL_PARAM_BYTES_PER_PAGE;
   return page_idx;
 }
 
 /**
- * Corrupts a word of the currently running ROM_EXT at the provided offset
+ * Corrupts a word of the currently running program at the provided offset
  * address of the given slot to trigger an ECC integrity errory (load access
  * fault) on the next boot.
  */
 static status_t corrupt_rom_ext_word(rom_ext_slot_t slot,
                                      uint32_t offset_to_corrupt) {
   uint32_t page_idx = compute_flash_page_index(slot, offset_to_corrupt);
-  uint32_t flash_data_bank =
-      slot == kRomExtSlotA ? kFlashBank0DataRegion : kFlashBank1DataRegion;
   uint32_t first_flash_addr_in_slot =
       slot == kRomExtSlotA ? kRomExtSlotAFirstAddr : kRomExtSlotBFirstAddr;
 
   // Setup full access (read, erase, program) to first flash page in the slot.
   TRY(flash_ctrl_testutils_data_region_setup_properties(
-      &flash_ctrl, page_idx, flash_data_bank,
+      &flash_ctrl, page_idx, kFlashConfigRegion,
       /*region_size=*/1, kFlashFullAccessScrambledEcc, NULL));
 
   // Read the flash word we are about to corrupt, via the flash_ctrl interface,
@@ -245,7 +245,8 @@ static status_t corrupt_rom_ext_word(rom_ext_slot_t slot,
       &flash_ctrl, first_flash_addr_in_slot + offset_to_corrupt,
       /*partition_id=*/0, &word_to_corrupt, kDifFlashCtrlPartitionTypeData,
       /*word_count=*/1, /*delay_micros=*/0));
-  LOG_INFO("Uncorrupted Flash Word: 0x%08x", word_to_corrupt);
+  LOG_INFO("Uncorrupted Flash Word: 0x%08x at %08x", word_to_corrupt,
+           first_flash_addr_in_slot + offset_to_corrupt);
 
   // Overwrite the target flash word inverted value (without first erasing the
   // page) to corrupt its ECC (since flash writes can only transition 1 bits to
@@ -305,9 +306,18 @@ bool test_main(void) {
       break;
   }
 
+  if (kBootStage == kBootStageOwner) {
+    // If we're running at the owner stage, we want to compute a location
+    // inside the owner code, which starts after the ROM_EXT.
+    // The ROM_EXT is 64K.
+    addr_of_corruption += 0x10000;
+  }
+
   // Corrupt the ECC of a targeted flash word by performing a double write.
   boot_log_t *boot_log = &retention_sram_get()->creator.boot_log;
-  if (boot_log->rom_ext_slot == kBootSlotA) {
+  uint32_t slot = kBootStage == kBootStageRomExt ? boot_log->rom_ext_slot
+                                                 : boot_log->bl0_slot;
+  if (slot == kBootSlotA) {
     LOG_INFO("Slot A self corrupting (%s) ...", corruption_desc);
     CHECK_STATUS_OK(corrupt_rom_ext_word(kRomExtSlotA, addr_of_corruption));
   } else {
@@ -316,7 +326,11 @@ bool test_main(void) {
   }
 
   // Issue a reset.
-  LOG_INFO("Resetting chip to trigger load access fault in the ROM ...");
+  if (kBootStage == kBootStageOwner) {
+    LOG_INFO("Resetting chip to trigger load access fault in the ROM_EXT ...");
+  } else {
+    LOG_INFO("Resetting chip to trigger load access fault in the ROM ...");
+  }
   sw_reset();
 
   return true;
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_newer/BUILD b/sw/device/silicon_creator/rom/e2e/boot_policy_newer/BUILD
index 318f36ac62a16..4d3667b307d2d 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_newer/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_newer/BUILD
@@ -59,7 +59,7 @@ SEC_VERS = [
         testonly = True,
         srcs = ["//sw/device/silicon_creator/rom/e2e:empty_test"],
         # Use the prod key because it is valid in every LC state.
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = [
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
         ],
diff --git a/sw/device/silicon_creator/rom/e2e/boot_policy_valid/BUILD b/sw/device/silicon_creator/rom/e2e/boot_policy_valid/BUILD
index b690786d78ba2..1110032d599fd 100644
--- a/sw/device/silicon_creator/rom/e2e/boot_policy_valid/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/boot_policy_valid/BUILD
@@ -63,7 +63,8 @@ BOOT_POLICY_VALID_CASES = [
         name = "bitstream_boot_policy_valid_{}".format(lc_state),
         src = "//hw/bitstream:mask_rom",
         data = ":otp_img_boot_policy_valid_{}".format(lc_state),
-        meminfo = "//hw/bitstream:otp_mmi",
+        instance = "otp",
+        meminfo = "//hw/bitstream:cw310_mmi",
         update_usr_access = True,
     )
     for lc_state, _ in get_lc_items()
@@ -86,8 +87,8 @@ BOOT_POLICY_VALID_CASES = [
             ),
             binaries = {
                 # PROD keys can sign binaries able to run across all life cycle states.
-                "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_fake_ecdsa_prod_key_0{}".format(a["suffix"]): "slot_a",
-                "//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_fake_ecdsa_prod_key_0{}".format(b["suffix"]): "slot_b",
+                "//sw/device/silicon_creator/rom/e2e:empty_test_slot_a_prod_key_0{}".format(a["suffix"]): "slot_a",
+                "//sw/device/silicon_creator/rom/e2e:empty_test_slot_b_prod_key_0{}".format(b["suffix"]): "slot_b",
             },
             bitstream = "bitstream_boot_policy_valid_{}".format(lc_state),
             exit_failure = MSG_PASS if a["desc"] == b["desc"] and a["desc"] == "bad" else DEFAULT_TEST_FAILURE_MSG,
diff --git a/sw/device/silicon_creator/rom/e2e/bootstrap/BUILD b/sw/device/silicon_creator/rom/e2e/bootstrap/BUILD
index 71a043623cab9..3fe5f8613bab6 100644
--- a/sw/device/silicon_creator/rom/e2e/bootstrap/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/bootstrap/BUILD
@@ -9,14 +9,8 @@ load(
     "fpga_params",
     "opentitan_test",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "//rules:const.bzl",
-    "CONST",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
+load("//rules:const.bzl", "CONST")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
diff --git a/sw/device/silicon_creator/rom/e2e/chip_info_test.c b/sw/device/silicon_creator/rom/e2e/chip_info_test.c
new file mode 100644
index 0000000000000..739e55e875aed
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/chip_info_test.c
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/testing/ret_sram_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+extern const char _chip_info_start[];
+
+bool test_main(void) {
+  build_info_t *build_info = (build_info_t *)&_chip_info_start;
+  LOG_INFO("ROM Build Info");
+  LOG_INFO("  Version: %x", build_info->version);
+  LOG_INFO("   SCM lo: %x", build_info->scm_revision.scm_revision_low);
+  LOG_INFO("   SCM hi: %x", build_info->scm_revision.scm_revision_high);
+
+  // Make sure that the version is valid.
+  CHECK(build_info->version == kBuildInfoVersion1);
+
+  bool is_testrom = false;
+  CHECK_STATUS_OK(ret_sram_testutils_is_testrom(&is_testrom));
+  if (!is_testrom) {
+    boot_log_t *boot_log = &retention_sram_get()->creator.boot_log;
+    LOG_INFO("Boot Log Info");
+    LOG_INFO("   SCM lo: %x", boot_log->chip_version.scm_revision_low);
+    LOG_INFO("   SCM hi: %x", boot_log->chip_version.scm_revision_high);
+
+    // Make sure that the boot log correctly reflects the ROM build info.
+    CHECK(build_info->scm_revision.scm_revision_low ==
+          boot_log->chip_version.scm_revision_low);
+    CHECK(build_info->scm_revision.scm_revision_high ==
+          boot_log->chip_version.scm_revision_high);
+  } else {
+    LOG_INFO("Boot log info check skipped (test_rom detected).");
+  }
+
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom/e2e/chip_specific_startup/BUILD b/sw/device/silicon_creator/rom/e2e/chip_specific_startup/BUILD
index 7934cec5f5be7..466d2d9cb1e13 100644
--- a/sw/device/silicon_creator/rom/e2e/chip_specific_startup/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/chip_specific_startup/BUILD
@@ -9,18 +9,9 @@ load(
     "fpga_params",
     "opentitan_test",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "//rules:const.bzl",
-    "get_lc_items",
-)
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
+load("//rules:const.bzl", "get_lc_items")
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c b/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c
index f520a76add2f0..88cecc837e881 100644
--- a/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c
+++ b/sw/device/silicon_creator/rom/e2e/chip_specific_startup/chip_specific_startup.c
@@ -27,7 +27,7 @@
 #include "otp_ctrl_regs.h"
 #include "sensor_ctrl_regs.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 enum {
   kAstInitEnOffset = OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_INIT_EN_OFFSET -
diff --git a/sw/device/silicon_creator/rom/e2e/clkmgr/BUILD b/sw/device/silicon_creator/rom/e2e/clkmgr/BUILD
new file mode 100644
index 0000000000000..9f1fa06cf746f
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/clkmgr/BUILD
@@ -0,0 +1,78 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "opentitan_test",
+)
+load(
+    "//rules:const.bzl",
+    "CONST",
+)
+load(
+    "//rules:otp.bzl",
+    "STD_OTP_OVERLAYS",
+    "otp_hex",
+    "otp_image",
+    "otp_json",
+    "otp_partition",
+)
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_test",
+)
+
+otp_json(
+    name = "otp_json_jitter_enabled",
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items = {
+                "CREATOR_SW_CFG_JITTER_EN": otp_hex(CONST.MUBI4_TRUE),
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_img_jitter_enabled",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = STD_OTP_OVERLAYS + [":otp_json_jitter_enabled"],
+)
+
+JITTER_TESTCASES = [
+    {
+        "name": "disabled",
+        "fpga": fpga_params(),
+        "defines": ["TEST_JITTER_DISABLED"],
+    },
+    {
+        "name": "enabled",
+        "fpga": fpga_params(
+            otp = ":otp_img_jitter_enabled",
+        ),
+        "defines": ["TEST_JITTER_ENABLED"],
+    },
+]
+
+[
+    opentitan_test(
+        name = "jitter_{}_test".format(testcase["name"]),
+        srcs = ["jitter_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+        },
+        fpga = testcase["fpga"],
+        local_defines = testcase["defines"],
+        deps = [
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/dif:base",
+            "//sw/device/lib/dif:clkmgr",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+        ],
+    )
+    for testcase in JITTER_TESTCASES
+]
diff --git a/sw/device/silicon_creator/rom/e2e/clkmgr/jitter_test.c b/sw/device/silicon_creator/rom/e2e/clkmgr/jitter_test.c
new file mode 100644
index 0000000000000..9b8c9bcbcc0dc
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/clkmgr/jitter_test.c
@@ -0,0 +1,31 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/dif/dif_base.h"
+#include "sw/device/lib/dif/dif_clkmgr.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  dif_clkmgr_t clkmgr;
+  CHECK_DIF_OK(dif_clkmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
+
+  // Get the initial jitter state: this is right after reset so it should be
+  // disabled.
+  dif_toggle_t state;
+  CHECK_DIF_OK(dif_clkmgr_jitter_get_enabled(&clkmgr, &state));
+#if defined(TEST_JITTER_DISABLED)
+  CHECK(state == kDifToggleDisabled);
+#elif defined(TEST_JITTER_ENABLED)
+  CHECK(state == kDifToggleEnabled);
+#else
+#error "no jitter test variant is defined"
+#endif
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom/e2e/defs.bzl b/sw/device/silicon_creator/rom/e2e/defs.bzl
index 8f44906cd6691..b931df4abc7fa 100644
--- a/sw/device/silicon_creator/rom/e2e/defs.bzl
+++ b/sw/device/silicon_creator/rom/e2e/defs.bzl
@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("//rules:const.bzl", "CONST", "hex_digits")
-load("//rules:opentitan.bzl", "SILICON_CREATOR_KEYS")
+load("//rules/opentitan:keyutils.bzl", "SILICON_CREATOR_KEYS")
 
 MSG_TEMPLATE_BFV = "{}{}\r\n(?s:.*){}{}\r\n".format(
     CONST.SHUTDOWN.PREFIX.BFV,
@@ -34,13 +34,13 @@ MSG_TEMPLATE_BFV_LCV = "{}{}\r\n{}{}\r\n(?s:.*){}{}\r\n{}{}\r\n".format(
     "{1}",
 )
 
-MSG_STARTING_ROM_EXT = "Starting ROM_EXT"
+MSG_STARTING_ROM_EXT = "\nROM_EXT:"
 
 MSG_PASS = "PASS!"
 
 SLOTS = {
-    "a": "0x0",
-    "b": "0x80000",
+    "a": "{rom_ext_slot_a}",
+    "b": "{rom_ext_slot_b}",
 }
 
 # list of keys that will be used to build various flash images
diff --git a/sw/device/silicon_creator/rom/e2e/epmp_init/BUILD b/sw/device/silicon_creator/rom/e2e/epmp_init/BUILD
index c4a000bdffff1..887c6c3effade 100644
--- a/sw/device/silicon_creator/rom/e2e/epmp_init/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/epmp_init/BUILD
@@ -15,14 +15,8 @@ load(
     "CONST",
     "get_lc_items",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/BUILD b/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/BUILD
index 5d6dd3ef7b98e..a1970ddcf0bdf 100644
--- a/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/BUILD
@@ -26,10 +26,38 @@ load(
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_TEMPLATE_BFV",
+    "SLOTS",
 )
 
 package(default_visibility = ["//visibility:public"])
 
+ROM_EXT_SLOTS = [
+    {
+        "name": "a",
+        "slot": "a",
+        "offset": SLOTS["a"],
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+    },
+    {
+        "name": "virtual_a",
+        "slot": "a",
+        "offset": SLOTS["a"],
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_virtual",
+    },
+    {
+        "name": "b",
+        "slot": "b",
+        "offset": SLOTS["b"],
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_b",
+    },
+    {
+        "name": "virtual_b",
+        "slot": "b",
+        "offset": SLOTS["b"],
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_virtual",
+    },
+]
+
 IMMUTABLE_PARTITION_TEST_CASES = [
     {
         "name": "exec_enabled_hash_valid",
@@ -45,7 +73,7 @@ IMMUTABLE_PARTITION_TEST_CASES = [
             "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN": otp_hex(CONST.HARDENED_TRUE),
             "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH": otp_hex(0x1234),
         },
-        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.ILLEGAL_INSTRUCTION)),
+        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.ROM.IMM_SECTION)),
         "exit_failure": DEFAULT_TEST_SUCCESS_MSG,
     },
     {
@@ -88,7 +116,7 @@ IMMUTABLE_PARTITION_TEST_CASES = [
         # The hash check should fail, since the offset is included in the hash,
         # triggering a hardened check fail (which executes an unimp; triggering
         # an exception and shutdown).
-        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.ILLEGAL_INSTRUCTION)),
+        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.ROM.IMM_SECTION)),
         "exit_failure": DEFAULT_TEST_SUCCESS_MSG,
     },
     {
@@ -109,7 +137,7 @@ IMMUTABLE_PARTITION_TEST_CASES = [
         # The hash check should fail, since the length is included in the hash,
         # triggering a hardened check fail (which executes an unimp; triggering
         # an exception and shutdown).
-        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.INTERRUPT.ILLEGAL_INSTRUCTION)),
+        "exit_success": MSG_TEMPLATE_BFV.format(hex_digits(CONST.BFV.ROM.IMM_SECTION)),
         "exit_failure": DEFAULT_TEST_SUCCESS_MSG,
     },
     {
@@ -125,7 +153,10 @@ IMMUTABLE_PARTITION_TEST_CASES = [
 
 [
     otp_json_immutable_rom_ext(
-        name = "otp_json_immutable_rom_ext_{}".format(t["name"]),
+        name = "otp_json_immutable_rom_ext_{}_{}".format(
+            t["name"],
+            s["name"],
+        ),
         testonly = True,
         partitions = [
             otp_partition(
@@ -133,59 +164,80 @@ IMMUTABLE_PARTITION_TEST_CASES = [
                 items = t["otp_fields"],
             ),
         ],
-        rom_ext = ":immutable_rom_ext_section_test",
+        rom_ext = ":immutable_rom_ext_section_test_{}".format(s["name"]),
         visibility = ["//visibility:private"],
     )
+    for s in ROM_EXT_SLOTS
     for t in IMMUTABLE_PARTITION_TEST_CASES
 ]
 
 [
     otp_image(
-        name = "otp_img_immutable_rom_ext_{}".format(t["name"]),
+        name = "otp_img_immutable_rom_ext_{}_{}".format(
+            t["name"],
+            s["name"],
+        ),
         testonly = True,
         src = "//hw/ip/otp_ctrl/data:otp_json_prod",
         overlays = STD_OTP_OVERLAYS + [
-            ":otp_json_immutable_rom_ext_{}".format(t["name"]),
+            ":otp_json_immutable_rom_ext_{}_{}".format(
+                t["name"],
+                s["name"],
+            ),
         ],
         visibility = ["//visibility:private"],
     )
+    for s in ROM_EXT_SLOTS
     for t in IMMUTABLE_PARTITION_TEST_CASES
 ]
 
-opentitan_binary(
-    name = "immutable_rom_ext_section_test",
-    testonly = True,
-    srcs = ["immutable_rom_ext_section_test.c"],
-    exec_env = [
-        "//hw/top_earlgrey:fpga_cw310_sival",
-    ],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:status",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/drivers:retention_sram",
-        "//sw/device/silicon_creator/lib/drivers:uart",
-    ],
-)
+[
+    opentitan_binary(
+        name = "immutable_rom_ext_section_test_{}".format(s["name"]),
+        testonly = True,
+        srcs = ["immutable_rom_ext_section_test.c"],
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw310_sival",
+        ],
+        linker_script = s["linker_script"],
+        deps = [
+            "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:hardened",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib/drivers:otp",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:uart",
+        ],
+    )
+    for s in ROM_EXT_SLOTS
+]
 
 [
     opentitan_test(
-        name = "immutable_section_{}".format(t["name"]),
+        name = "immutable_section_{}_{}".format(
+            t["name"],
+            s["name"],
+        ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
         },
         fpga = fpga_params(
+            assemble = "{firmware}@{offset}",
             binaries = {
-                ":immutable_rom_ext_section_test": "firmware",
+                ":immutable_rom_ext_section_test_{}".format(s["name"]): "firmware",
             },
             exit_failure = t["exit_failure"],
             exit_success = t["exit_success"],
-            otp = ":otp_img_immutable_rom_ext_{}".format(t["name"]),
+            offset = s["offset"],
+            otp = ":otp_img_immutable_rom_ext_{}_{}".format(
+                t["name"],
+                s["name"],
+            ),
         ),
     )
+    for s in ROM_EXT_SLOTS
     for t in IMMUTABLE_PARTITION_TEST_CASES
 ]
 
@@ -193,7 +245,108 @@ test_suite(
     name = "immutable_rom_ext_section",
     tags = ["manual"],
     tests = [
-        "immutable_section_{}".format(t["name"])
+        "immutable_section_{}_{}".format(
+            t["name"],
+            s["name"],
+        )
+        for s in ROM_EXT_SLOTS
         for t in IMMUTABLE_PARTITION_TEST_CASES
     ],
 )
+
+BAD_SECTION_BINS = {
+    "invalid": {
+        #              l b a t u m m i
+        "message": "0x6c626174756d6d69",
+    },
+    "valid": {
+        #              l b a t u m m I
+        "message": "0x6c626174756d6d49",
+    },
+}
+
+# Both `imm_section_{valid,invalid}` are valid signed ROM_EXTs.  There is a
+# single bit difference in the immutable section ("Immutable" vs "immutable").
+# The former produces an immutable section with a valid hash, whereas the
+# later produces an invalid hash.
+[
+    opentitan_binary(
+        name = "imm_section_{}".format(name),
+        testonly = True,
+        srcs = ["immutable_rom_ext_section_test.c"],
+        defines = [
+            "IMMUTABLE_MESSAGE={}".format(param["message"]),
+        ],
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw310_sival",
+        ],
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_virtual",
+        deps = [
+            "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:hardened",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib/drivers:otp",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:uart",
+        ],
+    )
+    for name, param in BAD_SECTION_BINS.items()
+]
+
+# Tests that "imm_section_invalid" is functional when OTP disabled the immutable
+# section.  This test proves that `imm_section_invalid` is a valid signed
+# ROM_EXT stage.
+opentitan_test(
+    name = "immutable_section_invalid_ok_when_disabled",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_sival": None,
+    },
+    fpga = fpga_params(
+        assemble = "{invalid}@{rom_ext_slot_a}",
+        binaries = {
+            ":imm_section_invalid": "invalid",
+        },
+        otp = ":otp_img_immutable_rom_ext_exec_disabled_hash_valid_virtual_a",
+    ),
+)
+
+# Tests that we can boot "imm_section_valid" when there is a valid signed
+# ROM_EXT with an invalid immutable section in the primary slot.
+# The ROM should skip the primary slot and boot the secondary slot.
+opentitan_test(
+    name = "immutable_section_a_bad_b_good",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_sival": None,
+    },
+    fpga = fpga_params(
+        assemble = "{invalid}@{rom_ext_slot_a} {valid}@{rom_ext_slot_b}",
+        binaries = {
+            ":imm_section_invalid": "invalid",
+            ":imm_section_valid": "valid",
+        },
+        exit_failure = DEFAULT_TEST_FAILURE_MSG,
+        exit_success = "(?msR)Immutable$.*PASS!$",
+        otp = ":otp_img_immutable_rom_ext_exec_enabled_hash_valid_virtual_a",
+    ),
+)
+
+# Test that the ROM fails to boot when both slots have valid signatures
+# and invalid immutable sections.
+opentitan_test(
+    name = "immutable_section_a_bad_b_bad",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_sival": None,
+    },
+    fpga = fpga_params(
+        assemble = "{invalid}@{rom_ext_slot_a} {invalid}@{rom_ext_slot_b}",
+        binaries = {
+            ":imm_section_invalid": "invalid",
+        },
+        exit_failure = DEFAULT_TEST_SUCCESS_MSG,
+        # This fault code is kErrorRomImmSection.
+        exit_success = "BFV:034d5203$",
+        otp = ":otp_img_immutable_rom_ext_exec_enabled_hash_valid_virtual_a",
+    ),
+)
diff --git a/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/immutable_rom_ext_section_test.c b/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/immutable_rom_ext_section_test.c
index aed03c3ddfd5e..8e7b7d79deb82 100644
--- a/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/immutable_rom_ext_section_test.c
+++ b/sw/device/silicon_creator/rom/e2e/immutable_rom_ext_section/immutable_rom_ext_section_test.c
@@ -17,6 +17,11 @@
 
 OTTF_DEFINE_TEST_CONFIG();
 
+#ifndef IMMUTABLE_MESSAGE
+//                           l b a t u m m I
+#define IMMUTABLE_MESSAGE 0x6c626174756d6d49;
+#endif
+
 enum {
   kImmutableRomExtSectionHashSizeIn32BitWords =
       OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH_SIZE /
@@ -27,8 +32,7 @@ enum {
 OT_SECTION(".rom_ext_immutable")
 void rom_ext_non_mutable(void) {
   // Print "Immutable" to the UART console.
-  //                        l b a t u m m I
-  const uint64_t kStr1 = 0x6c626174756d6d49;
+  const uint64_t kStr1 = IMMUTABLE_MESSAGE;
   //                        e
   const uint32_t kStr2 = 0x65;
   const uint32_t kNewline = 0x0a0d;
@@ -36,6 +40,10 @@ void rom_ext_non_mutable(void) {
   uart_write_imm(kStr2);
   uart_write_imm(kNewline);
 
+  // Wait until the UART is done transmitting.
+  while (!uart_tx_idle()) {
+  }
+
   // Set a magic value ("PASS") in retention SRAM.
   retention_sram_get()->owner.reserved[0] = kSramValuePass;
 
@@ -64,6 +72,15 @@ bool test_main(void) {
       immutable_rom_ext_hash[3], immutable_rom_ext_hash[2],
       immutable_rom_ext_hash[1], immutable_rom_ext_hash[0]);
 
+  // Check the same immutable section offset is used by every test to ensure it
+  // is portable across various ROM_EXT slot configurations.
+  if (immutable_rom_ext_section_enabled == kHardenedBoolTrue) {
+    CHECK(
+        otp_read32(
+            OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_START_OFFSET_OFFSET) ==
+        0x400);
+  }
+
   // Check the immutabled section executed by reading out the retention SRAM.
   if (immutable_rom_ext_section_enabled == kHardenedBoolTrue) {
     CHECK(retention_sram_get()->owner.reserved[0] == kSramValuePass);
diff --git a/sw/device/silicon_creator/rom/e2e/keymgr/BUILD b/sw/device/silicon_creator/rom/e2e/keymgr/BUILD
index 53f592056d25e..fcb73c9a15a3c 100644
--- a/sw/device/silicon_creator/rom/e2e/keymgr/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/keymgr/BUILD
@@ -16,10 +16,10 @@ load(
 )
 load(
     "//rules/opentitan:defs.bzl",
-    "cw310_params",
     "dv_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
     "verilator_params",
 )
 
@@ -73,16 +73,20 @@ rom_e2e_keymgr_init_configs = [
             otp = ":otp_img_keymgr_{}".format(config["name"]),
             rom = "//sw/device/silicon_creator/rom:mask_rom",
         ),
-        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
             "//hw/top_earlgrey:sim_dv": None,
             "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             otp = ":otp_img_keymgr_{}".format(config["name"]),
         ),
         manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+        qemu = qemu_params(
+            otp = ":otp_img_keymgr_{}".format(config["name"]),
+        ),
         verilator = verilator_params(
             timeout = "eternal",
             otp = ":otp_img_keymgr_{}".format(config["name"]),
@@ -90,7 +94,11 @@ rom_e2e_keymgr_init_configs = [
         ),
         deps = [
             "//sw/device/lib/dif:keymgr",
+            "//sw/device/lib/dif:otp_ctrl",
+            "//sw/device/lib/dif:rstmgr",
             "//sw/device/lib/testing:keymgr_testutils",
+            "//sw/device/lib/testing:otp_ctrl_testutils",
+            "//sw/device/lib/testing:rstmgr_testutils",
             "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
             "//sw/device/lib/testing/test_framework:ottf_main",
             "//sw/device/silicon_creator/lib/drivers:hmac",
diff --git a/sw/device/silicon_creator/rom/e2e/keymgr/rom_e2e_keymgr_init_test.c b/sw/device/silicon_creator/rom/e2e/keymgr/rom_e2e_keymgr_init_test.c
index 74442ba6e7220..a0001312b3c5f 100644
--- a/sw/device/silicon_creator/rom/e2e/keymgr/rom_e2e_keymgr_init_test.c
+++ b/sw/device/silicon_creator/rom/e2e/keymgr/rom_e2e_keymgr_init_test.c
@@ -6,9 +6,13 @@
 
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_keymgr.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
 #include "sw/device/lib/runtime/ibex.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/silicon_creator/lib/base/boot_measurements.h"
@@ -23,12 +27,49 @@
 
 OTTF_DEFINE_TEST_CONFIG();
 
+static dif_keymgr_t keymgr;
+static dif_otp_ctrl_t otp_ctrl;
+static dif_rstmgr_t rstmgr;
 static uint32_t otp_state[kHmacDigestNumWords + 4] = {0};
 
+static void print_otp_sw_cfg_digests(void) {
+  uint64_t creator_digest, owner_digest = 0;
+  CHECK_DIF_OK(dif_otp_ctrl_get_digest(
+      &otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg, &creator_digest));
+  CHECK_DIF_OK(dif_otp_ctrl_get_digest(
+      &otp_ctrl, kDifOtpCtrlPartitionOwnerSwCfg, &owner_digest));
+  LOG_INFO("CreatorSwCfg Digest: 0x%08x%08x", (uint32_t)(creator_digest >> 32),
+           (uint32_t)creator_digest);
+  LOG_INFO("OwnerSwCfg Digest:   0x%08x%08x", (uint32_t)(owner_digest >> 32),
+           (uint32_t)owner_digest);
+}
+
 bool test_main(void) {
-  dif_keymgr_t keymgr;
   CHECK_DIF_OK(dif_keymgr_init(
       mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR), &keymgr));
+  CHECK_DIF_OK(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+
+  /*// Lock OTP *SwCfg partitions if this is the first boot and reset.*/
+  if (UNWRAP(rstmgr_testutils_is_reset_info(&rstmgr, kDifRstmgrResetInfoPor))) {
+    LOG_INFO("Power on reset. Locking OTP *SwCfg partitions ...");
+    const uint64_t kFakeOtpDigest = 0xaaaabbbbccccdddd;
+    CHECK_STATUS_OK(otp_ctrl_testutils_lock_partition(
+        &otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg,
+        /*digest=*/kFakeOtpDigest));
+    CHECK_STATUS_OK(otp_ctrl_testutils_lock_partition(
+        &otp_ctrl, kDifOtpCtrlPartitionOwnerSwCfg,
+        /*digest=*/kFakeOtpDigest));
+    rstmgr_testutils_reason_clear();
+    LOG_INFO("Issuing a software reset ...");
+    CHECK_DIF_OK(dif_rstmgr_software_device_reset(&rstmgr));
+    wait_for_interrupt();
+  } else {
+    print_otp_sw_cfg_digests();
+    LOG_INFO("SW reset. Executing test ...");
+  }
 
   CHECK_STATUS_OK(keymgr_testutils_check_state(&keymgr, kDifKeymgrStateReset));
 
@@ -39,34 +80,31 @@ bool test_main(void) {
 
   if (otp_read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_KEYMGR_OTP_MEAS_EN_OFFSET) ==
       kHardenedBoolTrue) {
+    LOG_INFO("ROM OTP measurement feature ENABLED.");
     // Check that the attestation is equal to the digest of concatenations of:
     //   - the digest of the CreatorSwCfg partition,
     //   - the digest of the OwnerSwCfg partition,
     //   - the SHA256 integrity hash of the first stage boot keys.
-    otp_dai_read(kOtpPartitionCreatorSwCfg,
-                 /*relative_address=*/
-                 kOtpPartitions[kOtpPartitionCreatorSwCfg].digest_addr -
-                     OTP_CTRL_PARAM_CREATOR_SW_CFG_OFFSET,
-                 otp_state,
-                 /*num_words=*/2);
-    otp_dai_read(kOtpPartitionOwnerSwCfg,
-                 /*relative_address=*/
-                 kOtpPartitions[kOtpPartitionOwnerSwCfg].digest_addr -
-                     OTP_CTRL_PARAM_OWNER_SW_CFG_OFFSET,
-                 &otp_state[2],
-                 /*num_words=*/2);
-    otp_dai_read(kOtpPartitionRotCreatorAuthCodesign,
-                 /*relative_address=*/
-                 OTP_CTRL_PARAM_ROTCREATORAUTHCODESIGNBLOCKSHA2_256HASHOFFSET -
-                     OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_OFFSET,
-                 &otp_state[4],
-                 /*num_words=*/kHmacDigestNumWords);
+    CHECK_DIF_OK(dif_otp_ctrl_get_digest(
+        &otp_ctrl, kDifOtpCtrlPartitionCreatorSwCfg, (uint64_t *)otp_state));
+    CHECK_DIF_OK(dif_otp_ctrl_get_digest(
+        &otp_ctrl, kDifOtpCtrlPartitionOwnerSwCfg, (uint64_t *)&otp_state[2]));
+    CHECK_STATUS_OK(otp_ctrl_testutils_dai_read32_array(
+        &otp_ctrl, kDifOtpCtrlPartitionRotCreatorAuthCodesign,
+        OTP_CTRL_PARAM_ROTCREATORAUTHCODESIGNBLOCKSHA2_256HASHOFFSET -
+            OTP_CTRL_PARAM_ROT_CREATOR_AUTH_CODESIGN_OFFSET,
+        &otp_state[4], /*num_words=*/kHmacDigestNumWords));
     hmac_digest_t otp_measurement;
-    hmac_sha256(otp_state, (kHmacDigestNumWords + 4) * sizeof(uint32_t),
-                &otp_measurement);
+    hmac_sha256(otp_state, sizeof(otp_state), &otp_measurement);
+    LOG_INFO("OTP CreatorSwCfg Digest: 0x%08x%08x", otp_state[1], otp_state[0]);
+    LOG_INFO("OTP OwnerSwCfg Digest:   0x%08x%08x", otp_state[3], otp_state[2]);
+    LOG_INFO("OTP Root Keys Digest:    0x%08x%08x%08x%08x%08x%08x%08x%08x",
+             otp_state[11], otp_state[10], otp_state[9], otp_state[8],
+             otp_state[7], otp_state[6], otp_state[5], otp_state[4]);
     CHECK_ARRAYS_EQ(bindings.attestation, otp_measurement.digest,
                     ARRAYSIZE(bindings.attestation));
   } else {
+    LOG_INFO("ROM OTP measurement feature DISABLED.");
     // Check that the attestation is equal to `binding_value` field of the
     // manifest.
     CHECK_ARRAYS_EQ(bindings.attestation, manifest->binding_value.data,
diff --git a/sw/device/silicon_creator/rom/e2e/presigned_images/BUILD b/sw/device/silicon_creator/rom/e2e/presigned_images/BUILD
deleted file mode 100644
index a9821bccdd4bb..0000000000000
--- a/sw/device/silicon_creator/rom/e2e/presigned_images/BUILD
+++ /dev/null
@@ -1,54 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load(
-    "//rules:opentitan.bzl",
-    "bin_to_vmem",
-    "scramble_flash_vmem",
-)
-
-package(default_visibility = ["//visibility:public"])
-
-# Empty test binaries and aliases.
-_EMPTY_TEST_DEVICES = [
-    "sim_dv",
-    "sim_verilator",
-    "fpga_cw310",
-]
-
-# ROM self hash test binaries and aliases.
-bin_to_vmem(
-    name = "rom_e2e_self_hash_sim_dv_vmem64",
-    bin = "rom_e2e_self_hash_sim_dv.signed.bin",
-    word_size = 64,
-)
-
-scramble_flash_vmem(
-    name = "rom_e2e_self_hash_sim_dv_scr_vmem64",
-    otp = "//hw/ip/otp_ctrl/data:img_test_unlocked0",
-    vmem = ":rom_e2e_self_hash_sim_dv_vmem64",
-)
-
-[
-    filegroup(
-        name = "rom_e2e_self_hash_{}".format(dev),
-        srcs = [
-            "rom_e2e_self_hash_{}.signed.bin".format(dev),
-        ] + [] if dev == "fpga_cw310" else [
-            ":rom_e2e_self_hash_sim_dv.logs.txt",
-            ":rom_e2e_self_hash_sim_dv.rodata.txt",
-            ":rom_e2e_self_hash_sim_dv_scr_vmem64",
-            ":rom_e2e_self_hash_sim_dv_vmem64",
-        ],
-    )
-    for dev in [
-        "sim_dv",
-        "fpga_cw310",
-    ]
-]
-
-alias(
-    name = "rom_e2e_self_hash_fpga_cw310_bin",
-    actual = ":rom_e2e_self_hash_fpga_cw310",
-)
diff --git a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_fpga_cw310.signed.bin
deleted file mode 100644
index 15345408ff22b..0000000000000
Binary files a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_fpga_cw310.signed.bin and /dev/null differ
diff --git a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.logs.txt b/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.logs.txt
deleted file mode 100644
index 6769571769f47..0000000000000
--- a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.logs.txt
+++ /dev/null
@@ -1,364 +0,0 @@
-addr: 10000
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 67
-nargs: 8
-format: ROM Hash: 0x%08h%08h%08h%08h%08h%08h%08h%08h
-str_arg_idx: 
-addr: 10014
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 69
-nargs: 1
-format: rom_chip_info @ %0h:
-str_arg_idx: 
-addr: 10028
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 72
-nargs: 2
-format: scm_revision = %08h%08h
-str_arg_idx: 
-addr: 1003c
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 73
-nargs: 1
-format: version = %08h
-str_arg_idx: 
-addr: 10050
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 80
-nargs: 1
-format: CHECK-fail: (uint8_t *)output.data%0smatches (uint8_t *)kSimDvGoldenRomHash
-str_arg_idx: 0
-addr: 10064
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 80
-nargs: 3
-format: CHECK-fail: [%0d] got: 0x%02h; want: 0x%02h
-str_arg_idx: 
-addr: 10078
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 84
-nargs: 1
-format: CHECK-fail: (uint8_t *)output.data%0smatches (uint8_t *)kFpgaCw310GoldenRomHash
-str_arg_idx: 0
-addr: 1008c
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 84
-nargs: 3
-format: CHECK-fail: [%0d] got: 0x%02h; want: 0x%02h
-str_arg_idx: 
-addr: 100a0
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 87
-nargs: 1
-format: ROM hash not self-checked for this device type: 0x%0h
-str_arg_idx: 
-addr: 100b4
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 96
-nargs: 0
-format: Starting test hash_rom...
-str_arg_idx: 
-addr: 100c8
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 96
-nargs: 0
-format: CHECK-fail: cycles_ <= 4294967295U
-str_arg_idx: 
-addr: 100dc
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 96
-nargs: 0
-format: CHECK-fail:
-str_arg_idx: 
-addr: 100f0
-severity: 0
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 96
-nargs: 3
-format: Successfully finished test hash_rom in %0d cycles or %0d us @ %0d MHz.
-str_arg_idx: 
-addr: 10104
-severity: 2
-file: sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-line: 96
-nargs: 1
-format: Finished test hash_rom: %r.
-str_arg_idx: 
-addr: 10118
-severity: 2
-file: in.c
-line: 58
-nargs: 0
-format: OTTF currently only supports use of machine-mode ecall for FreeRTOS context switching.
-str_arg_idx: 
-addr: 1012c
-severity: 0
-file: in.c
-line: 129
-nargs: 1
-format: Running %0s
-str_arg_idx: 0
-addr: 10140
-severity: 2
-file: in.c
-line: 137
-nargs: 1
-format: DIF-fail: dif_rv_core_ibex_init( mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR), &rv_core_ibex) returns %0d
-str_arg_idx: 
-addr: 10154
-severity: 2
-file: in.c
-line: 153
-nargs: 0
-format: CHECK-fail: 0
-str_arg_idx: 
-addr: 10168
-severity: 0
-file: in.c
-line: 99
-nargs: 1
-format: Finished %0s
-str_arg_idx: 0
-addr: 1017c
-severity: 0
-file: in.c
-line: 103
-nargs: 0
-format: Status reported by the test:
-str_arg_idx: 
-addr: 10190
-severity: 0
-file: in.c
-line: 105
-nargs: 1
-format: - %r
-str_arg_idx: 
-addr: 101a4
-severity: 0
-file: w/device/lib/testing/test_framework/freertos_hooks.c
-line: 20
-nargs: 1
-format: %0s
-str_arg_idx: 0
-addr: 101b8
-severity: 0
-file: w/device/lib/testing/test_framework/freertos_hooks.c
-line: 31
-nargs: 1
-format: FreeRTOS stack overflow. Increase stack size of task: %0s
-str_arg_idx: 0
-addr: 101cc
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 71
-nargs: 0
-format: CHECK-fail: kOttfTestConfig.console.type == kOttfConsoleUart
-str_arg_idx: 
-addr: 101e0
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 75
-nargs: 1
-format: DIF-fail: dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart) returns %0d
-str_arg_idx: 
-addr: 101f4
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 76
-nargs: 0
-format: CHECK-fail: kUartBaudrate must fit in uint32_t
-str_arg_idx: 
-addr: 10208
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 78
-nargs: 0
-format: CHECK-fail: kClockFreqPeripheralHz must fit in uint32_t
-str_arg_idx: 
-addr: 1021c
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 88
-nargs: 1
-format: DIF-fail: dif_uart_configure( &ottf_console_uart, (dif_uart_config_t){ .baudrate = (uint32_t)kUartBaudrate, .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz, .parity_enable = kDifToggleDisabled, .parity = kDifUartParityEven, .tx_enable = kDifToggleEnabled, .rx_enable = kDifToggleEnabled, }) returns %0d
-str_arg_idx: 
-addr: 10230
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 99
-nargs: 1
-format: DIF-fail: dif_spi_device_init_handle( mmio_region_from_addr(kOttfTestConfig.console.base_addr), &ottf_console_spi_device) returns %0d
-str_arg_idx: 
-addr: 10244
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 117
-nargs: 1
-format: DIF-fail: dif_spi_device_configure( &ottf_console_spi_device, (dif_spi_device_config_t){ .clock_polarity = kDifSpiDeviceEdgePositive, .data_phase = kDifSpiDeviceEdgeNegative, .tx_order = kDifSpiDeviceBitOrderMsbToLsb, .rx_order = kDifSpiDeviceBitOrderMsbToLsb, .device_mode = kDifSpiDeviceModeGeneric, .mode_cfg = { .generic = { .rx_fifo_commit_wait = kSpiDeviceRxCommitWait, .rx_fifo_len = kDifSpiDeviceBufferLen / 2, .tx_fifo_len = kDifSpiDeviceBufferLen / 2, }, }, }) returns %0d
-str_arg_idx: 
-addr: 10258
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 121
-nargs: 0
-format: CHECK-fail: unsupported OTTF console interface.
-str_arg_idx: 
-addr: 1026c
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 144
-nargs: 1
-format: DIF-fail: dif_rv_plic_init( mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic) returns %0d
-str_arg_idx: 
-addr: 10280
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 147
-nargs: 1
-format: DIF-fail: dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark) returns %0d
-str_arg_idx: 
-addr: 10294
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 149
-nargs: 1
-format: DIF-fail: dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark, kDifToggleEnabled) returns %0d
-str_arg_idx: 
-addr: 102a8
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 153
-nargs: 1
-format: DIF-fail: dif_rv_plic_irq_set_priority( &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority) returns %0d
-str_arg_idx: 
-addr: 102bc
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 156
-nargs: 1
-format: DIF-fail: dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget, kDifRvPlicMinPriority) returns %0d
-str_arg_idx: 
-addr: 102d0
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 160
-nargs: 1
-format: DIF-fail: dif_rv_plic_irq_set_enabled(&ottf_plic, get_flow_control_watermark_plic_id(), kPlicTarget, kDifToggleEnabled) returns %0d
-str_arg_idx: 
-addr: 102e4
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 199
-nargs: 1
-format: DIF-fail: dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx) returns %0d
-str_arg_idx: 
-addr: 102f8
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 202
-nargs: 1
-format: DIF-fail: dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark) returns %0d
-str_arg_idx: 
-addr: 1030c
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 213
-nargs: 1
-format: DIF-fail: dif_uart_irq_disable_all(uart, &snapshot) returns %0d
-str_arg_idx: 
-addr: 10320
-severity: 2
-file: w/device/lib/testing/test_framework/ottf_console.c
-line: 215
-nargs: 1
-format: DIF-fail: dif_uart_irq_restore_all(uart, &snapshot) returns %0d
-str_arg_idx: 
-addr: 10334
-severity: 2
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diff --git a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.rodata.txt b/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.rodata.txt
deleted file mode 100644
index 9d4811dbe42aa..0000000000000
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-string: DIF-fail: dif_rv_core_ibex_init( mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR), &rv_core_ibex) returns %d
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-addr: 2000683c
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-string: FreeRTOS stack overflow. Increase stack size of task: %s
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-string: 
-addr: 200068fc
-string: 

-addr: 20006900
-string: �h
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-string: @h
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-addr: 20006910
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-addr: 20006914
-string: �h
-addr: 20006917
-string: sw/device/lib/testing/test_framework/ottf_console.c
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-string: DIF-fail: dif_uart_init(mmio_region_from_addr(base_addr), &ottf_console_uart) returns %d
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-string: CHECK-fail: kUartBaudrate must fit in uint32_t
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-string: CHECK-fail: kClockFreqPeripheralHz must fit in uint32_t
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-addr: 20006b77
-string: DIF-fail: dif_spi_device_init_handle( mmio_region_from_addr(kOttfTestConfig.console.base_addr), &ottf_console_spi_device) returns %d
-addr: 20006bfc
-string: DIF-fail: dif_spi_device_configure( &ottf_console_spi_device, (dif_spi_device_config_t){ .clock_polarity = kDifSpiDeviceEdgePositive, .data_phase = kDifSpiDeviceEdgeNegative, .tx_order = kDifSpiDeviceBitOrderMsbToLsb, .rx_order = kDifSpiDeviceBitOrderMsbToLsb, .device_mode = kDifSpiDeviceModeGeneric, .mode_cfg = { .generic = { .rx_fifo_commit_wait = kSpiDeviceRxCommitWait, .rx_fifo_len = kDifSpiDeviceBufferLen / 2, .tx_fifo_len = kDifSpiDeviceBufferLen / 2, }, }, }) returns %d
-addr: 20006dde
-string: CHECK-fail: unsupported OTTF console interface.
-addr: 20006e0e
-string: DIF-fail: dif_rv_plic_init( mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &ottf_plic) returns %d
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-string: DIF-fail: dif_uart_watermark_rx_set(uart, kFlowControlRxWatermark) returns %d
-addr: 20006ec6
-string: DIF-fail: dif_uart_irq_set_enabled(uart, kDifUartIrqRxWatermark, kDifToggleEnabled) returns %d
-addr: 20006f25
-string: DIF-fail: dif_rv_plic_irq_set_priority( &ottf_plic, get_flow_control_watermark_plic_id(), kDifRvPlicMaxPriority) returns %d
-addr: 20006fa1
-string: DIF-fail: dif_rv_plic_target_set_threshold(&ottf_plic, kPlicTarget, kDifRvPlicMinPriority) returns %d
-addr: 20007007
-string: DIF-fail: dif_rv_plic_irq_set_enabled(&ottf_plic, get_flow_control_watermark_plic_id(), kPlicTarget, kDifToggleEnabled) returns %d
-addr: 2000708a
-string: DIF-fail: dif_uart_irq_is_pending(uart, kDifUartIrqRxWatermark, &rx) returns %d
-addr: 200070da
-string: DIF-fail: dif_uart_irq_acknowledge(uart, kDifUartIrqRxWatermark) returns %d
-addr: 20007126
-string: DIF-fail: dif_uart_irq_disable_all(uart, &snapshot) returns %d
-addr: 20007165
-string: DIF-fail: dif_uart_irq_restore_all(uart, &snapshot) returns %d
-addr: 200071a4
-string: DIF-fail: dif_uart_bytes_send(uart, &byte, 1, NULL) returns %d
-addr: 200071e4
-string: 
-addr: 200071e8
-string: i
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-string: G
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-string: &6
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-string: 6
-addr: 20007383
-string: &6
-addr: 20007387
-string: &6
-addr: 2000738b
-string: 6
-addr: 2000738f
-string: sw/device/lib/testing/test_framework/ottf_isrs.c
-addr: 200073c1
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-addr: 200073ed
-string: Software IRQ
-addr: 200073fa
-string: Timer IRQ
-addr: 20007404
-string: DIF-fail: dif_rv_plic_irq_claim(&ottf_plic, kPlicTarget, &plic_irq_id) returns %d
-addr: 20007456
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-addr: 0
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-addr: 100
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-addr: 180
-string: ����sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-addr: 200
-string: ����sw/device/silicon_creator/rom/e2e/rom_e2e_self_hash_test.c
-addr: 280
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-addr: 300
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-string: ����sw/device/lib/testing/rand_testutils.c
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-string: ����sw/device/lib/testing/rand_testutils.c
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-addr: 700
-string: ����sw/device/lib/testing/rv_core_ibex_testutils.c
-addr: 780
-string: ����sw/device/lib/testing/rv_core_ibex_testutils.c
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.signed.bin b/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.signed.bin
deleted file mode 100644
index 212447f780156..0000000000000
Binary files a/sw/device/silicon_creator/rom/e2e/presigned_images/rom_e2e_self_hash_sim_dv.signed.bin and /dev/null differ
diff --git a/sw/device/silicon_creator/rom/e2e/release/BUILD b/sw/device/silicon_creator/rom/e2e/release/BUILD
index b839fb14686aa..c3f344e381311 100644
--- a/sw/device/silicon_creator/rom/e2e/release/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/release/BUILD
@@ -7,12 +7,13 @@ load(
     "STD_OTP_OVERLAYS",
     "otp_image",
 )
-load(
-    "//rules/opentitan:defs.bzl",
-    "dv_params",
-    "fpga_params",
-    "opentitan_test",
-)
+# Uncomment when self hash test is re-enabled below.
+# load(
+#     "//rules/opentitan:defs.bzl",
+#     "dv_params",
+#     "fpga_params",
+#     "opentitan_test",
+# )
 
 package(default_visibility = ["//visibility:public"])
 
@@ -25,30 +26,32 @@ otp_image(
     visibility = ["//visibility:private"],
 )
 
-opentitan_test(
-    name = "rom_e2e_self_hash_test",
-    srcs = ["rom_e2e_self_hash_test.c"],
-    dv = dv_params(
-        rom = "//sw/device/silicon_creator/rom:mask_rom",
-    ),
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
-        "//hw/top_earlgrey:sim_dv": None,
-        "//hw/top_earlgrey:silicon_creator": None,  # This is added to support GLS and bringup environments.
-    },
-    fpga = fpga_params(
-        otp = ":otp_img_sigverify_spx_prod",
-    ),
-    manifest = "//sw/device/silicon_creator/rom_ext:manifest",
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
-        "//sw/device/lib/base:status",
-        "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-        "//sw/device/silicon_creator/lib:chip_info",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-    ],
-)
+# The self hash test is disabled except when we're releasing a new ROM.
+# opentitan_test(
+#     name = "rom_e2e_self_hash_test",
+#     srcs = ["rom_e2e_self_hash_test.c"],
+#     dv = dv_params(
+#         rom = "//sw/device/silicon_creator/rom:mask_rom",
+#     ),
+#     ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+#     exec_env = {
+#         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+#         "//hw/top_earlgrey:sim_dv": None,
+#         "//hw/top_earlgrey:silicon_creator": None,  # This is added to support GLS and bringup environments.
+#     },
+#     fpga = fpga_params(
+#         otp = ":otp_img_sigverify_spx_prod",
+#     ),
+#     manifest = "//sw/device/silicon_creator/rom_ext:manifest",
+#     spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+#     deps = [
+#         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+#         "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
+#         "//sw/device/lib/base:status",
+#         "//sw/device/lib/runtime:print",
+#         "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+#         "//sw/device/lib/testing/test_framework:ottf_main",
+#         "//sw/device/silicon_creator/lib:build_info",
+#         "//sw/device/silicon_creator/lib/drivers:hmac",
+#     ],
+# )
diff --git a/sw/device/silicon_creator/rom/e2e/release/rom_e2e_self_hash_test.c b/sw/device/silicon_creator/rom/e2e/release/rom_e2e_self_hash_test.c
index 582974017d5c3..d1b8311676c97 100644
--- a/sw/device/silicon_creator/rom/e2e/release/rom_e2e_self_hash_test.c
+++ b/sw/device/silicon_creator/rom/e2e/release/rom_e2e_self_hash_test.c
@@ -6,15 +6,16 @@
 
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.silence_console_prints = true);
 
 enum {
   // Hash size.
@@ -37,18 +38,18 @@ enum {
  *    report.
  */
 
-const size_t kGoldenRomSizeBytes = 32652 - sizeof(chip_info_t);
+const size_t kGoldenRomSizeBytes = 32652 - sizeof(build_info_t);
 const uint32_t kSimDvGoldenRomHash[kSha256HashSizeIn32BitWords] = {
-    0x953cca70, 0x018fb4c7, 0xcd2ebc02, 0x95680df3,
-    0x220ca956, 0xe890a35d, 0xe8b62c21, 0x15bfa5e0,
+    0x25c5b824, 0x428a20dc, 0xc139cfb8, 0xb0b03a5a,
+    0xda61df49, 0x00bdab5f, 0x565f383e, 0x58234921,
 };
 const uint32_t kFpgaCw310GoldenRomHash[kSha256HashSizeIn32BitWords] = {
-    0x876747cf, 0xec01137f, 0x159bdc7f, 0x8177d11c,
-    0xcad1fb4e, 0xc0d3ccd0, 0xc7cb8699, 0x99c8a56b,
+    0x036c3e10, 0xd1add4c5, 0x24574287, 0x4f50c492,
+    0x3f0feb73, 0xdeb18dd4, 0xb453d84c, 0x573e0d1f,
 };
 const uint32_t kSiliconGoldenRomHash[kSha256HashSizeIn32BitWords] = {
-    0x5d02eeae, 0x76d7386c, 0x063a84ea, 0x279865f6,
-    0xf05b04e8, 0x06a569e0, 0xa8f2053b, 0x66c2cb77,
+    0x5eb4c370, 0xddec31a1, 0xe73816f2, 0x7ee119d1,
+    0xac8c89a5, 0x198ce068, 0xca885ef2, 0x4f41f620,
 };
 
 extern const char _chip_info_start[];
@@ -58,18 +59,22 @@ status_t hash_rom(void) {
   hmac_digest_t rom_hash;
   hmac_sha256((void *)TOP_EARLGREY_ROM_BASE_ADDR, kGoldenRomSizeBytes,
               &rom_hash);
-  LOG_INFO("ROM Hash: 0x%08x%08x%08x%08x%08x%08x%08x%08x", rom_hash.digest[7],
-           rom_hash.digest[6], rom_hash.digest[5], rom_hash.digest[4],
-           rom_hash.digest[3], rom_hash.digest[2], rom_hash.digest[1],
-           rom_hash.digest[0]);
-  chip_info_t *rom_chip_info = (chip_info_t *)_chip_info_start;
-  LOG_INFO("rom_chip_info @ %p:", rom_chip_info);
+  // Use printf directly here instead of the `LOG()` macros which print extra
+  // filenames and line numbers which bloat DV and GLS runtimes.
+  // DO NOT MODIFY the printf immediately below without modifying the check in
+  // `hw/top_earlgrey/dv/env/seq_lib/chip_sw_rom_e2e_self_hash_gls_vseq.sv`
+  base_printf("ROM Hash: 0x%08x%08x%08x%08x%08x%08x%08x%08x\r\n",
+              rom_hash.digest[7], rom_hash.digest[6], rom_hash.digest[5],
+              rom_hash.digest[4], rom_hash.digest[3], rom_hash.digest[2],
+              rom_hash.digest[1], rom_hash.digest[0]);
+  build_info_t *rom_build_info = (build_info_t *)_chip_info_start;
+  LOG_INFO("rom_build_info @ %p:", rom_build_info);
   LOG_INFO("scm_revision = %08x%08x",
-           rom_chip_info->scm_revision.scm_revision_high,
-           rom_chip_info->scm_revision.scm_revision_low);
-  LOG_INFO("version = %08x", rom_chip_info->version);
+           rom_build_info->scm_revision.scm_revision_high,
+           rom_build_info->scm_revision.scm_revision_low);
+  LOG_INFO("version = %08x", rom_build_info->version);
 
-  // TODO(#18868) Add checks for the chip_info values we expect to see in the
+  // TODO(#18868) Add checks for the build_info values we expect to see in the
   // released ROM binary.
 
   if (kDeviceType == kDeviceSimDV) {
@@ -90,8 +95,4 @@ status_t hash_rom(void) {
   return OK_STATUS();
 };
 
-bool test_main(void) {
-  status_t test_result = OK_STATUS();
-  EXECUTE_TEST(test_result, hash_rom);
-  return status_ok(test_result);
-}
+bool test_main(void) { return status_ok(hash_rom()); }
diff --git a/sw/device/silicon_creator/rom/e2e/rom_ext_upgrade_interrupt/BUILD b/sw/device/silicon_creator/rom/e2e/rom_ext_upgrade_interrupt/BUILD
index 49241154ba126..c85c7a233348a 100644
--- a/sw/device/silicon_creator/rom/e2e/rom_ext_upgrade_interrupt/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/rom_ext_upgrade_interrupt/BUILD
@@ -9,20 +9,14 @@ load(
     "fpga_params",
     "opentitan_test",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:const.bzl",
     "CONST",
     "get_lc_items",
     "hex",
 )
-load(
-    "//rules:manifest.bzl",
-    "manifest",
-)
+load("//rules:manifest.bzl", "manifest")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -31,10 +25,7 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/rstmgr/BUILD b/sw/device/silicon_creator/rom/e2e/rstmgr/BUILD
new file mode 100644
index 0000000000000..1c1bc198f57a3
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/rstmgr/BUILD
@@ -0,0 +1,148 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules/opentitan:defs.bzl", "fpga_params", "opentitan_test")
+load(
+    "//rules:const.bzl",
+    "CONST",
+)
+load(
+    "//rules:otp.bzl",
+    "STD_OTP_OVERLAYS",
+    "otp_hex",
+    "otp_image",
+    "otp_json",
+    "otp_partition",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+otp_json(
+    name = "otp_json_cpu_info_enabled",
+    partitions = [
+        otp_partition(
+            name = "OWNER_SW_CFG",
+            items = {
+                "OWNER_SW_CFG_ROM_RSTMGR_INFO_EN": otp_hex(CONST.HARDENED_BYTE_TRUE << 8),
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_img_cpu_info_enabled",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = STD_OTP_OVERLAYS + [":otp_json_cpu_info_enabled"],
+)
+
+CPU_INFO_TESTCASES = [
+    {
+        "name": "disabled",
+        "fpga": fpga_params(),
+        "defines": ["TEST_CPU_INFO_DISABLED"],
+    },
+    {
+        "name": "enabled",
+        "fpga": fpga_params(
+            exit_failure = "PASS!",
+
+            # These expectations only applies to earlgrey. See #27498.
+            # After the ROM is fixed, the test should report PASS.
+            exit_success = "BFV:0152530d",
+            otp = ":otp_img_cpu_info_enabled",
+        ),
+        "defines": ["TEST_CPU_INFO_ENABLED"],
+    },
+]
+
+[
+    opentitan_test(
+        name = "cpu_info_{}_test".format(testcase["name"]),
+        srcs = ["cpu_info_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+        },
+        fpga = testcase["fpga"],
+        local_defines = testcase["defines"],
+        deps = [
+            "//sw/device/lib/base:macros",
+            "//sw/device/lib/base:mmio",
+            "//sw/device/lib/dif:rv_core_ibex",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing:rv_core_ibex_testutils",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:error",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        ],
+    )
+    for testcase in CPU_INFO_TESTCASES
+]
+
+otp_json(
+    name = "otp_json_alert_info_enabled",
+    partitions = [
+        otp_partition(
+            name = "OWNER_SW_CFG",
+            items = {
+                "OWNER_SW_CFG_ROM_RSTMGR_INFO_EN": otp_hex(CONST.HARDENED_BYTE_TRUE << 0),
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_img_alert_info_enabled",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = STD_OTP_OVERLAYS + [
+        ":otp_json_alert_info_enabled",
+        "//sw/device/silicon_creator/rom/e2e/shutdown_alert:shutdown_alert_owner_sw_cfg",
+        "//sw/device/silicon_creator/rom/e2e/shutdown_alert:shutdown_alert_digest_cfg",
+    ],
+)
+
+ALERT_INFO_TESTCASES = [
+    {
+        "name": "disabled",
+        "fpga": fpga_params(
+            otp = "//sw/device/silicon_creator/rom/e2e/shutdown_alert:otp_img_shutdown_alert_rma",
+        ),
+        "defines": ["TEST_ALERT_INFO_DISABLED"],
+    },
+    {
+        "name": "enabled",
+        "fpga": fpga_params(
+            otp = ":otp_img_alert_info_enabled",
+        ),
+        "defines": ["TEST_ALERT_INFO_ENABLED"],
+    },
+]
+
+[
+    opentitan_test(
+        name = "alert_info_{}_test".format(testcase["name"]),
+        srcs = ["alert_info_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+        },
+        fpga = testcase["fpga"],
+        local_defines = testcase["defines"],
+        deps = [
+            "//hw/ip/uart/data:uart_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:abs_mmio",
+            "//sw/device/lib/base:macros",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:error",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        ],
+    )
+    for testcase in ALERT_INFO_TESTCASES
+]
diff --git a/sw/device/silicon_creator/rom/e2e/rstmgr/alert_info_test.c b/sw/device/silicon_creator/rom/e2e/rstmgr/alert_info_test.c
new file mode 100644
index 0000000000000..92e87b91ed015
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/rstmgr/alert_info_test.c
@@ -0,0 +1,66 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "uart_regs.h"
+
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
+
+enum {
+  /**
+   * Base address of uart.
+   */
+  kBaseUart = TOP_EARLGREY_UART0_BASE_ADDR,
+};
+
+static void uart_alert_trigger(void) {
+  abs_mmio_write32(
+      kBaseUart + UART_ALERT_TEST_REG_OFFSET,
+      bitfield_bit32_write(0, UART_ALERT_TEST_FATAL_FAULT_BIT, true));
+}
+
+static void check_alert_info_dump(void) {
+  rstmgr_info_t info;
+
+  rstmgr_alert_info_collect(&info);
+  uint32_t all_values = 0;
+  for (int i = 0; i < info.length; i++) {
+    LOG_INFO("DUMP[%d]: 0x%x", i, info.info[i]);
+    all_values |= info.info[i];
+  }
+
+#if defined(TEST_ALERT_INFO_ENABLED)
+  CHECK(all_values != 0, "All crashdump values are zero.");
+#elif defined(TEST_ALERT_INFO_DISABLED)
+  CHECK(all_values == 0, "All crashdump values should be zero.");
+#else
+#error "no alert info test variant is defined"
+#endif
+}
+
+bool test_main(void) {
+  uint32_t reset_reasons = retention_sram_get()->creator.reset_reasons;
+  switch (reset_reasons) {
+    case 1 << kRstmgrReasonPowerOn:
+      LOG_INFO("No alert escalation, going to trigger alert...");
+      uart_alert_trigger();
+      LOG_INFO("UART alert routine returned!");
+      return false;
+    case 1 << kRstmgrReasonEscalation:
+      LOG_INFO("Escalation detected!");
+      check_alert_info_dump();
+      return true;
+    default:
+      LOG_INFO("Unhandled reset reason: %d", reset_reasons);
+      return false;
+  }
+}
diff --git a/sw/device/silicon_creator/rom/e2e/rstmgr/cpu_info_test.c b/sw/device/silicon_creator/rom/e2e/rstmgr/cpu_info_test.c
new file mode 100644
index 0000000000000..b6290dfb5b012
--- /dev/null
+++ b/sw/device/silicon_creator/rom/e2e/rstmgr/cpu_info_test.c
@@ -0,0 +1,96 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+#include "rstmgr_regs.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+enum {
+  kCpuDumpSize = 8,
+  kIllegalAddr0 = 0xF0000000,
+};
+
+// The labels to points in the code of which the memory address is needed.
+extern const char kFaultAddrStart[];
+extern const char kFaultAddrEnd[];
+
+// This variable is used to ensure loads from an address aren't optimised out.
+volatile static uint32_t addr_val;
+
+/**
+ * Overrides the default OTTF exception handler.
+ */
+void ottf_exception_handler(uint32_t *exc_info) {
+  OT_DISCARD(exc_info);
+  rstmgr_reset();
+}
+
+static void check_cpu_info_dump(void) {
+  LOG_INFO("Checking CPU info dump after fault.");
+
+  rstmgr_info_t info;
+
+  rstmgr_cpu_info_collect(&info);
+  CHECK(info.length == kCpuDumpSize,
+        "The observed cpu info dump's size was %d, "
+        "but it was expected to be %d",
+        info.length, kCpuDumpSize);
+
+  dif_rv_core_ibex_crash_dump_state_t dump =
+      ((dif_rv_core_ibex_crash_dump_info_t *)info.info)->fault_state;
+
+  RV_CORE_IBEX_TESTUTILS_PRINT_CRASH_DUMP(dump);
+
+#if defined(TEST_CPU_INFO_ENABLED)
+  uint32_t start = (uint32_t)kFaultAddrStart;
+  uint32_t end = (uint32_t)kFaultAddrEnd;
+
+  CHECK(kIllegalAddr0 == dump.mtval,
+        "Last Exception Access Addr: Expected 0x%x != Observed 0x%x",
+        kIllegalAddr0, dump.mtval);
+  CHECK(start <= dump.mpec && dump.mpec <= end,
+        "The Observed MPEC, 0x%x, was not in the expected range [0x%x, 0x%x]",
+        dump.mpec, start, end);
+#elif defined(TEST_CPU_INFO_DISABLED)
+  CHECK(dump.mtval == 0, "mtval should be zero, got 0x%x", dump.mtval);
+  CHECK(dump.mpec == 0, "mpec should be zero, got 0x%x", dump.mpec);
+  CHECK(dump.mdaa == 0, "mdaa should be zero, got 0x%x", dump.mdaa);
+  CHECK(dump.mnpc == 0, "mnpc should be zero, got 0x%x", dump.mnpc);
+  CHECK(dump.mcpc == 0, "mcpc should be zero, got 0x%x", dump.mcpc);
+#else
+#error "no cpu info test variant is defined"
+#endif
+}
+
+bool test_main(void) {
+  uint32_t reset_reasons = retention_sram_get()->creator.reset_reasons;
+  switch (reset_reasons) {
+    case 1 << kRstmgrReasonPowerOn:
+      LOG_INFO("Triggering fault.");
+
+      OT_ADDRESSABLE_LABEL(kFaultAddrStart);
+      addr_val = mmio_region_read32(mmio_region_from_addr(kIllegalAddr0), 0);
+      OT_ADDRESSABLE_LABEL(kFaultAddrEnd);
+      return false;
+    case 1 << kRstmgrReasonSoftwareRequest:
+      LOG_INFO("Escalation detected!");
+      check_cpu_info_dump();
+      return true;
+    default:
+      LOG_INFO("Unhandled reset reason: %d", reset_reasons);
+      return false;
+  }
+
+  return false;
+}
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_alert/BUILD b/sw/device/silicon_creator/rom/e2e/shutdown_alert/BUILD
index 39b1a6119db7a..3a729c57aea8d 100644
--- a/sw/device/silicon_creator/rom/e2e/shutdown_alert/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/shutdown_alert/BUILD
@@ -2,10 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:const.bzl",
     "CONST",
@@ -33,10 +30,7 @@ load(
     "otp_per_class_ints",
     "otp_per_class_lists",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c
index ef0a47caa0711..acc8c4bf14ed3 100644
--- a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c
+++ b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_alert_config_test.c
@@ -10,7 +10,7 @@
 
 #include "otp_ctrl_regs.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Check that the alert_handler register CRC32 matches OTP value.
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c
index 25193fb2d8277..205f73ac4c22e 100644
--- a/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c
+++ b/sw/device/silicon_creator/rom/e2e/shutdown_alert/rom_e2e_shutdown_alert_config_test.c
@@ -11,7 +11,7 @@
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "uart_regs.h"
 
-OTTF_DEFINE_TEST_CONFIG();
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 enum {
   /**
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_output/BUILD b/sw/device/silicon_creator/rom/e2e/shutdown_output/BUILD
index b88373426f4e1..e11ff80051f57 100644
--- a/sw/device/silicon_creator/rom/e2e/shutdown_output/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/shutdown_output/BUILD
@@ -10,10 +10,7 @@ load(
     "fpga_params",
     "opentitan_test",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:const.bzl",
     "CONST",
diff --git a/sw/device/silicon_creator/rom/e2e/shutdown_watchdog/BUILD b/sw/device/silicon_creator/rom/e2e/shutdown_watchdog/BUILD
index 759edd4d9813b..afb8cf2e367d9 100644
--- a/sw/device/silicon_creator/rom/e2e/shutdown_watchdog/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/shutdown_watchdog/BUILD
@@ -14,10 +14,7 @@ load(
     "CONST",
     "get_lc_items",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -26,10 +23,7 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_always/BUILD b/sw/device/silicon_creator/rom/e2e/sigverify_always/BUILD
index adf2f1c9b30e5..ef00c30fccb2a 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_always/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_always/BUILD
@@ -7,6 +7,7 @@ load(
     "cw310_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
 )
 load(
     "//rules:const.bzl",
@@ -15,7 +16,7 @@ load(
     "hex_digits",
 )
 load(
-    "//rules:opentitan.bzl",
+    "//rules/opentitan:keyutils.bzl",
     "ECDSA_ONLY_KEY_STRUCTS",
     "filter_key_structs_for_lc_state",
 )
@@ -75,6 +76,7 @@ SIGVERIFY_BAD_CASES = [
         ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             assemble = " ".join([
@@ -99,6 +101,28 @@ SIGVERIFY_BAD_CASES = [
             otp = ":otp_img_sigverify_always_{}".format(lc_state),
             tags = maybe_skip_in_ci(lc_state_val),
         ),
+        qemu = qemu_params(
+            assemble = " ".join([
+                "{{slot_{}}}@{}".format(slot, addr)
+                for (slot, addr) in SLOTS.items()
+                if case[slot] == "bad"
+            ]),
+            binaries = {
+                "//sw/device/silicon_creator/rom/e2e:empty_test_slot_{}_{}_corrupted_sim_qemu_rom_with_fake_keys_signed_bin"
+                    .format(
+                    slot,
+                    filter_key_structs_for_lc_state(ECDSA_ONLY_KEY_STRUCTS, lc_state_val)[0].ecdsa.name,
+                ): "slot_{}".format(slot)
+                for (slot, addr) in SLOTS.items()
+                if case[slot] == "bad"
+            },
+            exit_failure = MSG_PASS,
+            exit_success = MSG_TEMPLATE_BFV_LCV.format(
+                case["expected_bfv"],
+                hex_digits(lc_state_val),
+            ),
+            otp = ":otp_img_sigverify_always_{}".format(lc_state),
+        ),
     )
     for case in SIGVERIFY_BAD_CASES
     for lc_state, lc_state_val in get_lc_items()
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_key_type/BUILD b/sw/device/silicon_creator/rom/e2e/sigverify_key_type/BUILD
index cfb9197c8660f..85cd542cdf7b2 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_key_type/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_key_type/BUILD
@@ -2,20 +2,14 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load(
-    "//rules:const.bzl",
-    "CONST",
-    "get_lc_items",
-)
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_SPX_KEY_STRUCTS",
-)
+load("//rules:const.bzl", "CONST", "get_lc_items")
+load("//rules/opentitan:keyutils.bzl", "ECDSA_SPX_KEY_STRUCTS")
 load(
     "//rules/opentitan:defs.bzl",
     "cw310_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
 )
 load(
     "//rules:otp.bzl",
@@ -25,14 +19,8 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
-load(
-    "@bazel_skylib//lib:dicts.bzl",
-    "dicts",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
+load("@bazel_skylib//lib:dicts.bzl", "dicts")
 load(
     ":key_type.bzl",
     "ecdsa_exit_failure",
@@ -99,11 +87,11 @@ SPX_ALLOWED_IN_LC_STATES = {
 # LC states.
 KEY_TYPE_ECDSA_TESTS = [
     {
-        "name": key.ecdsa.name,
+        "name": "ecdsa_{}".format(key.ecdsa.name),
         "exit_failure": ECDSA_ALLOWED_IN_LC_STATES["exit_failure"][key.ecdsa.name],
         "exit_success": ECDSA_ALLOWED_IN_LC_STATES["exit_success"][key.ecdsa.name],
         "ecdsa_key": {key.ecdsa.label: key.ecdsa.name},
-        "spx_key": {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0_spx"},
+        "spx_key": {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
     }
     for key in ECDSA_SPX_KEY_STRUCTS
 ]
@@ -112,10 +100,10 @@ KEY_TYPE_ECDSA_TESTS = [
 # LC states.
 KEY_TYPE_SPX_TESTS = [
     {
-        "name": key.spx.name,
+        "name": "spx_{}".format(key.spx.name),
         "exit_failure": SPX_ALLOWED_IN_LC_STATES["exit_failure"][key.spx.name],
         "exit_success": SPX_ALLOWED_IN_LC_STATES["exit_success"][key.spx.name],
-        "ecdsa_key": {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+        "ecdsa_key": {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
         "spx_key": {key.spx.label: key.spx.name},
     }
     for key in ECDSA_SPX_KEY_STRUCTS
@@ -158,6 +146,7 @@ otp_json(
         ecdsa_key = test["ecdsa_key"],
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             exit_failure = test["exit_failure"][lc_state],
@@ -165,6 +154,11 @@ otp_json(
             otp = "otp_img_sigverify_key_type_{}".format(lc_state),
             tags = maybe_skip_in_ci(lc_state_val),
         ),
+        qemu = qemu_params(
+            exit_failure = test["exit_failure"][lc_state],
+            exit_success = test["exit_success"][lc_state],
+            otp = "otp_img_sigverify_key_type_{}".format(lc_state),
+        ),
         spx_key = test["spx_key"],
         deps = [
             "//sw/device/lib/testing/test_framework:ottf_main",
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_key_type/key_type.bzl b/sw/device/silicon_creator/rom/e2e/sigverify_key_type/key_type.bzl
index 5f4329b63e50e..bd85e1050a4e0 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_key_type/key_type.bzl
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_key_type/key_type.bzl
@@ -4,24 +4,14 @@
 
 """Helper functions for generating expected test signatures for sigverify_key_type tests."""
 
-load(
-    "//rules/opentitan:defs.bzl",
-    "DEFAULT_TEST_FAILURE_MSG",
-)
-load(
-    "//rules:const.bzl",
-    "CONST",
-    "hex_digits",
-)
+load("//rules/opentitan:defs.bzl", "DEFAULT_TEST_FAILURE_MSG")
+load("//rules:const.bzl", "CONST", "hex_digits")
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_PASS",
     "MSG_TEMPLATE_BFV_LCV",
 )
-load(
-    "//rules:opentitan.bzl",
-    "key_allowed_in_lc_state",
-)
+load("//rules/opentitan:keyutils.bzl", "key_allowed_in_lc_state")
 
 # SPHINCS+ is disabled uncoditionally in these lifecycle states.
 SPX_DISABLED_LC_STATES = [
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_key_validity/BUILD b/sw/device/silicon_creator/rom/e2e/sigverify_key_validity/BUILD
index 5f5aa8f03a4e7..5a9414eebb0c2 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_key_validity/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_key_validity/BUILD
@@ -8,6 +8,7 @@ load(
     "cw310_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
 )
 load(
     "//rules:const.bzl",
@@ -16,7 +17,7 @@ load(
     "hex_digits",
 )
 load(
-    "//rules:opentitan.bzl",
+    "//rules/opentitan:keyutils.bzl",
     "ECDSA_SPX_KEY_STRUCTS",
     "filter_key_structs_for_lc_state",
 )
@@ -218,6 +219,7 @@ KEY_VALIDITY_TESTS = [
         ecdsa_key = {key.ecdsa.label: key.ecdsa.name},
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             exit_failure = test["exit_failure"][lc_state],
@@ -228,6 +230,14 @@ KEY_VALIDITY_TESTS = [
             ),
             tags = maybe_skip_in_ci(lc_state_val),
         ),
+        qemu = qemu_params(
+            exit_failure = test["exit_failure"][lc_state],
+            exit_success = test["exit_success"][lc_state],
+            otp = ":otp_img_sigverify_key_validity_{}_{}".format(
+                test["name"],
+                lc_state,
+            ),
+        ),
         spx_key = {key.spx.label: key.spx.name},
         deps = [
             "//sw/device/lib/testing/test_framework:ottf_main",
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_spx/BUILD b/sw/device/silicon_creator/rom/e2e/sigverify_spx/BUILD
index 61c85d6d1d532..7465f5d98815f 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_spx/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_spx/BUILD
@@ -9,17 +9,11 @@ load(
     "fpga_params",
     "opentitan_binary",
     "opentitan_test",
+    "qemu_params",
     "spx_key_for_lc_state",
 )
-load(
-    "//rules:const.bzl",
-    "CONST",
-    "get_lc_items",
-)
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_SPX_KEY_STRUCTS",
-)
+load("//rules:const.bzl", "CONST", "get_lc_items")
+load("//rules/opentitan:keyutils.bzl", "ECDSA_SPX_KEY_STRUCTS")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -28,18 +22,9 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
-load(
-    "//rules:splice.bzl",
-    "bitstream_splice",
-)
-load(
-    "@bazel_skylib//lib:dicts.bzl",
-    "dicts",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
+load("//rules:splice.bzl", "bitstream_splice")
+load("@bazel_skylib//lib:dicts.bzl", "dicts")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -114,6 +99,7 @@ opentitan_binary(
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
         "//hw/top_earlgrey:sim_dv",
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys",
         "//hw/top_earlgrey:sim_verilator",
     ],
     kind = "flash",
@@ -173,7 +159,8 @@ opentitan_binary(
             lc_state,
             t["name"],
         ),
-        meminfo = "//hw/bitstream:otp_mmi",
+        instance = "otp",
+        meminfo = "//hw/bitstream:cw310_mmi",
         update_usr_access = True,
         visibility = ["//visibility:private"],
     )
@@ -194,6 +181,7 @@ opentitan_binary(
         ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             bitstream = ":bitstream_sigverify_spx_{}_{}".format(
@@ -203,6 +191,13 @@ opentitan_binary(
             exit_success = t["exit_success"][lc_state],
             tags = maybe_skip_in_ci(lc_state_val),
         ),
+        qemu = qemu_params(
+            exit_success = t["exit_success"][lc_state],
+            otp = ":otp_img_sigverify_spx_{}_{}".format(
+                lc_state,
+                t["name"],
+            ),
+        ),
         spx_key = spx_key_for_lc_state(
             ECDSA_SPX_KEY_STRUCTS,
             lc_state_val,
@@ -232,3 +227,32 @@ test_suite(
         for t in SIGVERIFY_SPX_CASES
     ],
 )
+
+opentitan_test(
+    name = "sigverify_spx_prehashed_test",
+    srcs = ["sigverify_spx_test.c"],
+    ecdsa_key = {
+        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_1",
+    },
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+    },
+    fpga = fpga_params(
+        otp = ":otp_img_sigverify_spx_prod_enabled_true",
+    ),
+    qemu = qemu_params(
+        otp = ":otp_img_sigverify_spx_prod_enabled_true",
+    ),
+    spx_key = {
+        "//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_1",
+    },
+    deps = [
+        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+        "//sw/device/lib/testing/test_framework:ottf_ld_silicon_creator_slot_a",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/drivers:otp",
+        "//sw/device/silicon_creator/lib/sigverify:spx_verify",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom/e2e/sigverify_usage_constraints/BUILD b/sw/device/silicon_creator/rom/e2e/sigverify_usage_constraints/BUILD
index a954ff407327f..b5af6ad328af6 100644
--- a/sw/device/silicon_creator/rom/e2e/sigverify_usage_constraints/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/sigverify_usage_constraints/BUILD
@@ -9,6 +9,7 @@ load(
     "ecdsa_key_for_lc_state",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
 )
 load(
     "//rules:const.bzl",
@@ -18,14 +19,8 @@ load(
     "hex_digits",
     "lcv_hw_to_sw",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "//rules:manifest.bzl",
-    "manifest",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
+load("//rules:manifest.bzl", "manifest")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -33,14 +28,8 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
-load(
-    "@bazel_skylib//lib:structs.bzl",
-    "structs",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
+load("@bazel_skylib//lib:structs.bzl", "structs")
 load(
     "//sw/device/silicon_creator/rom/e2e:defs.bzl",
     "MSG_TEMPLATE_BFV",
@@ -283,6 +272,7 @@ test_cases = device_id_test_cases + lc_state_test_cases + manuf_state_test_cases
         ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             exit_failure = t["exit_failure"],
@@ -298,6 +288,11 @@ test_cases = device_id_test_cases + lc_state_test_cases + manuf_state_test_cases
                 identifier = hex(CONST.ROM_EXT),
             ),
         ),
+        qemu = qemu_params(
+            exit_failure = t["exit_failure"],
+            exit_success = t["exit_success"],
+            otp = t["otp"],
+        ),
         deps = [
             "//sw/device/lib/testing/test_framework:ottf_main",
             "//sw/device/silicon_creator/lib/drivers:otp",
diff --git a/sw/device/silicon_creator/rom/e2e/watchdog/BUILD b/sw/device/silicon_creator/rom/e2e/watchdog/BUILD
index 26be038a4be06..df359a5515252 100644
--- a/sw/device/silicon_creator/rom/e2e/watchdog/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/watchdog/BUILD
@@ -11,14 +11,8 @@ load(
     "opentitan_test",
     "verilator_params",
 )
-load(
-    "@//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "//rules:const.bzl",
-    "get_lc_items",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
+load("//rules:const.bzl", "get_lc_items")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -26,10 +20,7 @@ load(
     "otp_json",
     "otp_partition",
 )
-load(
-    "//rules:rom_e2e.bzl",
-    "maybe_skip_in_ci",
-)
+load("//rules:rom_e2e.bzl", "maybe_skip_in_ci")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/sw/device/silicon_creator/rom/e2e/weak_straps/BUILD b/sw/device/silicon_creator/rom/e2e/weak_straps/BUILD
index 423214e85c047..a4105e4fc7dd6 100644
--- a/sw/device/silicon_creator/rom/e2e/weak_straps/BUILD
+++ b/sw/device/silicon_creator/rom/e2e/weak_straps/BUILD
@@ -73,6 +73,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 40 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
         test_cmd = CLEAR_TEST_CMD,
         test_harness = "//sw/host/tests/rom/sw_strap_value",
     ),
diff --git a/sw/device/silicon_creator/rom/keys/README.md b/sw/device/silicon_creator/rom/keys/README.md
index 942c85ea0e9fd..58c030042d038 100644
--- a/sw/device/silicon_creator/rom/keys/README.md
+++ b/sw/device/silicon_creator/rom/keys/README.md
@@ -15,7 +15,7 @@ bazel build //sw/host/opentitantool
 ```
 Generate new key:
 ```
-bazel-bin/sw/host/opentitantool/opentitantool spx key generate sw/device/silicon_creator/rom/keys/fake/spx/ test_key_0_spx
+bazel-bin/sw/host/opentitantool/opentitantool spx key generate sw/device/silicon_creator/rom/keys/fake/spx/ spx_keyset "test_key_0"
 ```
 Manually fix data in the header file (in this case `sw/device/silicon_creator/rom/keys/fake/spx/test_key_0_spx.h`). Skip this step for unauthorized keys. This command prints the data in the right format:
 ```
diff --git a/sw/device/silicon_creator/rom/keys/fake/ecdsa/BUILD b/sw/device/silicon_creator/rom/keys/fake/ecdsa/BUILD
index d0e467d6fe171..0d6b1664593fc 100644
--- a/sw/device/silicon_creator/rom/keys/fake/ecdsa/BUILD
+++ b/sw/device/silicon_creator/rom/keys/fake/ecdsa/BUILD
@@ -2,42 +2,19 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules/opentitan:keyutils.bzl", "key_ecdsa")
+load("//rules:signing.bzl", "keyset")
 
 package(default_visibility = ["//visibility:public"])
 
-key_ecdsa(
-    name = "test_key_0_ecdsa_p256",
-    config = "EcdsaP256",
-    method = "local",
-    private_key = "test_key_0_ecdsa_p256.der",
-    pub_key = "test_key_0_ecdsa_p256.pub.der",
-    type = "TestKey",
-)
-
-key_ecdsa(
-    name = "dev_key_0_ecdsa_p256",
-    config = "EcdsaP256",
-    method = "local",
-    private_key = "dev_key_0_ecdsa_p256.der",
-    pub_key = "dev_key_0_ecdsa_p256.pub.der",
-    type = "DevKey",
-)
-
-key_ecdsa(
-    name = "prod_key_0_ecdsa_p256",
-    config = "EcdsaP256",
-    method = "local",
-    private_key = "prod_key_0_ecdsa_p256.der",
-    pub_key = "prod_key_0_ecdsa_p256.pub.der",
-    type = "ProdKey",
-)
-
-key_ecdsa(
-    name = "prod_key_1_ecdsa_p256",
-    config = "EcdsaP256",
-    method = "local",
-    private_key = "prod_key_1_ecdsa_p256.der",
-    pub_key = "prod_key_1_ecdsa_p256.pub.der",
-    type = "ProdKey",
+keyset(
+    name = "ecdsa_keyset",
+    build_setting_default = "",
+    keys = {
+        "test_key_0_ecdsa_p256.der": "test_key_0",
+        "dev_key_0_ecdsa_p256.der": "dev_key_0",
+        "prod_key_0_ecdsa_p256.der": "prod_key_0",
+        "prod_key_1_ecdsa_p256.der": "prod_key_1",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
 )
diff --git a/sw/device/silicon_creator/rom/keys/fake/otp/BUILD b/sw/device/silicon_creator/rom/keys/fake/otp/BUILD
index c95886aeab945..fd447ca39ec0e 100644
--- a/sw/device/silicon_creator/rom/keys/fake/otp/BUILD
+++ b/sw/device/silicon_creator/rom/keys/fake/otp/BUILD
@@ -18,41 +18,41 @@ otp_json_rot_keys(
         otp_partition(
             name = "ROT_CREATOR_AUTH_CODESIGN",
             items = {
-                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256
+                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset "test_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE0": otp_hex(CONST.SIGVERIFY.KEY_TYPE.TEST),
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY0": "0xdeb1e092bb56aeb4a5d7eb1df773fc51012abb223c413ac2444da9ded8e17e502e66e6cb6937e2375bcb453d845024cfe9e0f4807bfccca80bba6de3ee07109a",
 
-                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:dev_key_0_ecdsa_p256
+                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset "dev_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE1": otp_hex(CONST.SIGVERIFY.KEY_TYPE.DEV),
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY1": "0xce8c4b5b70df4ad0c9dbc64bf7a103fdb1dfa2cc40529329ba9eb9172fbccaafd0b7ee1365a85787b9e7bf8aa742ec258ce157388a01ceb04f7ed1a3c11c931c",
 
-                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256
+                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset "prod_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE2": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY2": "0x7e571d04866f12e00a5b3c2e734ebd05611a0325ef6d90140e3cd2091ddda9bd8277988ce6557b33923499d90eeeff0028a525c10fa3a5a438daf96b9bf2dafd",
 
-                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_1_ecdsa_p256
+                # //sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset "prod_key_1"
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY_TYPE3": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
                 "ROT_CREATOR_AUTH_CODESIGN_ECDSA_KEY3": "0xb70fd07db1c79bbb87f974e6d3ea06e1f120582d2e8abaf1ddd1167aac4d7547fbf0b76ae2838f6cec711f34204d24202fccd456ad9f2278d80fe551423e545e",
 
-                # //sw/device/silicon_creator/rom/keys/fake/spx:test_key_0_spx
+                # //sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset "test_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE0": otp_hex(CONST.SIGVERIFY.KEY_TYPE.TEST),
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY0": "0xa7fd92541005bf04f172710eaafa228220ce5b2a73e009c74fdc04eefa2a1ba6",
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG0": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
 
-                # //sw/device/silicon_creator/rom/keys/fake/spx:dev_key_0_spx
+                # //sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset "dev_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE1": otp_hex(CONST.SIGVERIFY.KEY_TYPE.DEV),
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY1": "0x594087c53775908295afa7000d11eec6fc430f8e7858e774e595f1d161f34ce4",
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG1": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
 
-                # //sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx
+                # //sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset "prod_key_0"
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE2": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY2": "0x789b490a8c50f4dadee29c091dfe267bfedece98519c46bdb2ade5d32d3e6e02",
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG2": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
 
-                # //sw/device/silicon_creator/rom/keys/fake/spx:prod_key_1_spx
+                # //sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset "prod_key_1"
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE3": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
                 "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY3": "0x4d83c8d10356fbb033ae5f9a3ee242a21f5a1a8b8c9a5579496271faad63458a",
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG3": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
+                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG3": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S_PREHASH),
             },
         ),
         otp_partition(
diff --git a/sw/device/silicon_creator/rom/keys/fake/spx/BUILD b/sw/device/silicon_creator/rom/keys/fake/spx/BUILD
index c168eaffbcb89..f887d4b2709de 100644
--- a/sw/device/silicon_creator/rom/keys/fake/spx/BUILD
+++ b/sw/device/silicon_creator/rom/keys/fake/spx/BUILD
@@ -2,62 +2,19 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules/opentitan:keyutils.bzl", "key_sphincs_plus")
+load("//rules:signing.bzl", "keyset")
 
 package(default_visibility = ["//visibility:public"])
 
-filegroup(
-    name = "test_key_0_spx",
-    srcs = ["test_key_0_spx.pem"],
-)
-
-key_sphincs_plus(
-    name = "test_key_0_spx_key",
-    config = "Sha2128s",
-    method = "local",
-    private_key = "test_key_0_spx.pem",
-    pub_key = "test_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "dev_key_0_spx",
-    srcs = ["dev_key_0_spx.pem"],
-)
-
-key_sphincs_plus(
-    name = "dev_key_0_spx_key",
-    config = "Sha2128s",
-    method = "local",
-    private_key = "dev_key_0_spx.pem",
-    pub_key = "dev_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "prod_key_0_spx",
-    srcs = ["prod_key_0_spx.pem"],
-)
-
-key_sphincs_plus(
-    name = "prod_key_0_spx_key",
-    config = "Sha2128s",
-    method = "local",
-    private_key = "prod_key_0_spx.pem",
-    pub_key = "prod_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "prod_key_1_spx",
-    srcs = ["prod_key_1_spx.pem"],
-)
-
-key_sphincs_plus(
-    name = "prod_key_1_spx_key",
-    config = "Sha2128s",
-    method = "local",
-    private_key = "prod_key_0_spx.pem",
-    pub_key = "prod_key_0_spx.pub.pem",
-    type = "TestKey",
+keyset(
+    name = "spx_keyset",
+    build_setting_default = "",
+    keys = {
+        "test_key_0_spx.pem": "test_key_0",
+        "dev_key_0_spx.pem": "dev_key_0",
+        "prod_key_0_spx.pem": "prod_key_0",
+        "prod_key_1_spx.pem": "prod_key_1:domain=PreHashedSha256",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
 )
diff --git a/sw/device/silicon_creator/rom/keys/real/otp/BUILD b/sw/device/silicon_creator/rom/keys/real/otp/BUILD
deleted file mode 100644
index 3a22b5f9ec24a..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/otp/BUILD
+++ /dev/null
@@ -1,56 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:const.bzl", "CONST")
-load(
-    "//rules:otp.bzl",
-    "otp_hex",
-    "otp_json_rot_keys",
-    "otp_partition",
-)
-
-package(default_visibility = ["//visibility:public"])
-
-otp_json_rot_keys(
-    name = "json_rot_keys",
-    partitions = [
-        otp_partition(
-            name = "ROT_CREATOR_AUTH_CODESIGN",
-            items = {
-                # //sw/device/silicon_creator/rom/keys/real/spx:test_key_0_spx
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE0": otp_hex(CONST.SIGVERIFY.KEY_TYPE.TEST),
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY0": "0x2BB062EECDAFCD22015BA9BB38E0A97FFD0F8D4CD416672ABE0FA6069D629D35",
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG0": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
-
-                # //sw/device/silicon_creator/rom/keys/real/spx:dev_key_0_spx
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE1": otp_hex(CONST.SIGVERIFY.KEY_TYPE.DEV),
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY1": "0x93B089AE7FCB2D37C3FB0E6C2810489E4137BCAF50FFE2F4E05226E6CE99F1C8",
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG1": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
-
-                # //sw/device/silicon_creator/rom/keys/real/spx:prod_key_0_spx
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE2": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY2": "0xAA68F9D4D64FF84C32185CB4F80EBA3924E9351B3C0A258DCE66247AC310E733",
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG2": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
-
-                # //sw/device/silicon_creator/rom/keys/real/spx:prod_key_1_spx
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_TYPE3": otp_hex(CONST.SIGVERIFY.KEY_TYPE.PROD),
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY3": "0xAFE44BE7289CAD6034D51734A445AFB187FC782599E2479C1F62FEB880F14530",
-                "ROT_CREATOR_AUTH_CODESIGN_SPX_KEY_CONFIG3": otp_hex(CONST.SPX_CONFIG_ID.SHA2_128S),
-            },
-        ),
-        otp_partition(
-            name = "ROT_CREATOR_AUTH_STATE",
-            items = {
-                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY0": otp_hex(CONST.SIGVERIFY.KEY_STATE.BLANK),
-                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY1": otp_hex(CONST.SIGVERIFY.KEY_STATE.BLANK),
-                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY2": otp_hex(CONST.SIGVERIFY.KEY_STATE.BLANK),
-                "ROT_CREATOR_AUTH_STATE_ECDSA_KEY3": otp_hex(CONST.SIGVERIFY.KEY_STATE.BLANK),
-                "ROT_CREATOR_AUTH_STATE_SPX_KEY0": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
-                "ROT_CREATOR_AUTH_STATE_SPX_KEY1": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
-                "ROT_CREATOR_AUTH_STATE_SPX_KEY2": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
-                "ROT_CREATOR_AUTH_STATE_SPX_KEY3": otp_hex(CONST.SIGVERIFY.KEY_STATE.PROVISIONED),
-            },
-        ),
-    ],
-)
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/BUILD b/sw/device/silicon_creator/rom/keys/real/spx/BUILD
deleted file mode 100644
index 7540a20e38388..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/BUILD
+++ /dev/null
@@ -1,59 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules/opentitan:keyutils.bzl", "key_sphincs_plus")
-
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "test_key_0_spx",
-    srcs = ["test_key_0_spx.pub.pem"],
-)
-
-key_sphincs_plus(
-    name = "test_key_0_spx_key",
-    config = "Sha2128s",
-    method = "hsmtool",
-    pub_key = "test_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "dev_key_0_spx",
-    srcs = ["dev_key_0_spx.pub.pem"],
-)
-
-key_sphincs_plus(
-    name = "dev_key_0_spx_key",
-    config = "Sha2128s",
-    method = "hsmtool",
-    pub_key = "dev_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "prod_key_0_spx",
-    srcs = ["prod_key_0_spx.pub.pem"],
-)
-
-key_sphincs_plus(
-    name = "prod_key_0_spx_key",
-    config = "Sha2128s",
-    method = "hsmtool",
-    pub_key = "prod_key_0_spx.pub.pem",
-    type = "TestKey",
-)
-
-filegroup(
-    name = "prod_key_1_spx",
-    srcs = ["prod_key_1_spx.pub.pem"],
-)
-
-key_sphincs_plus(
-    name = "prod_key_1_spx_key",
-    config = "Sha2128s",
-    method = "hsmtool",
-    pub_key = "prod_key_1_spx.pub.pem",
-    type = "TestKey",
-)
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.h b/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.h
deleted file mode 100644
index 4f590ac10adcf..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_DEV_KEY_0_SPX_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_DEV_KEY_0_SPX_H_
-
-#define DEV_KEY_0_SPX \
-  {                   \
-    .data = {         \
-      0xCE99F1C8,     \
-      0xE05226E6,     \
-      0x50FFE2F4,     \
-      0x4137BCAF,     \
-      0x2810489E,     \
-      0xC3FB0E6C,     \
-      0x7FCB2D37,     \
-      0x93B089AE      \
-    }                 \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_DEV_KEY_0_SPX_H_
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.pub.pem b/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.pub.pem
deleted file mode 100644
index fdd32d15a1b16..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/dev_key_0_spx.pub.pem
+++ /dev/null
@@ -1,3 +0,0 @@
------BEGIN RAW SPHINCS+ PUBLIC KEY-----
-yPGZzuYmUuD04v9Qr7w3QZ5IEChsDvvDNy3Lf66JsJM=
------END RAW SPHINCS+ PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.h b/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.h
deleted file mode 100644
index c169f70c72af0..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_0_SPX_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_0_SPX_H_
-
-#define PROD_KEY_0_SPX \
-  {                    \
-    .data = {          \
-      0xC310E733,      \
-      0xCE66247A,      \
-      0x3C0A258D,      \
-      0x24E9351B,      \
-      0xF80EBA39,      \
-      0x32185CB4,      \
-      0xD64FF84C,      \
-      0xAA68F9D4       \
-    }                  \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_0_SPX_H_
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.pub.pem b/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.pub.pem
deleted file mode 100644
index 0fd5da681e194..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_0_spx.pub.pem
+++ /dev/null
@@ -1,3 +0,0 @@
------BEGIN RAW SPHINCS+ PUBLIC KEY-----
-M+cQw3okZs6NJQo8GzXpJDm6Dvi0XBgyTPhP1tT5aKo=
------END RAW SPHINCS+ PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.h b/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.h
deleted file mode 100644
index 471857474ea8c..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_1_SPX_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_1_SPX_H_
-
-#define PROD_KEY_1_SPX \
-  {                    \
-    .data = {          \
-      0x80F14530,      \
-      0x1F62FEB8,      \
-      0x99E2479C,      \
-      0x87FC7825,      \
-      0xA445AFB1,      \
-      0x34D51734,      \
-      0x289CAD60,      \
-      0xAFE44BE7       \
-    }                  \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_PROD_KEY_1_SPX_H_
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.pub.pem b/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.pub.pem
deleted file mode 100644
index 7fa8f9d538a9a..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/prod_key_1_spx.pub.pem
+++ /dev/null
@@ -1,3 +0,0 @@
------BEGIN RAW SPHINCS+ PUBLIC KEY-----
-MEXxgLj+Yh+cR+KZJXj8h7GvRaQ0F9U0YK2cKOdL5K8=
------END RAW SPHINCS+ PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.h b/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.h
deleted file mode 100644
index 983f43ae5a86d..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.h
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_TEST_KEY_0_SPX_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_TEST_KEY_0_SPX_H_
-
-#define TEST_KEY_0_SPX \
-  {                    \
-    .data = {          \
-      0x9D629D35,      \
-      0xBE0FA606,      \
-      0xD416672A,      \
-      0xFD0F8D4C,      \
-      0x38E0A97F,      \
-      0x15BA9BB,       \
-      0xCDAFCD22,      \
-      0x2BB062EE       \
-    }                  \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_KEYS_REAL_SPX_TEST_KEY_0_SPX_H_
diff --git a/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.pub.pem b/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.pub.pem
deleted file mode 100644
index 5ac2b09a56a77..0000000000000
--- a/sw/device/silicon_creator/rom/keys/real/spx/test_key_0_spx.pub.pem
+++ /dev/null
@@ -1,3 +0,0 @@
------BEGIN RAW SPHINCS+ PUBLIC KEY-----
-NZ1inQamD74qZxbUTI0P/X+p4Di7qVsBIs2vze5isCs=
------END RAW SPHINCS+ PUBLIC KEY-----
diff --git a/sw/device/silicon_creator/rom/keys/unauthorized/ecdsa/BUILD b/sw/device/silicon_creator/rom/keys/unauthorized/ecdsa/BUILD
index 03bf157f1f269..f8315f9554567 100644
--- a/sw/device/silicon_creator/rom/keys/unauthorized/ecdsa/BUILD
+++ b/sw/device/silicon_creator/rom/keys/unauthorized/ecdsa/BUILD
@@ -2,15 +2,16 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules/opentitan:keyutils.bzl", "key_ecdsa")
+load("//rules:signing.bzl", "keyset")
 
 package(default_visibility = ["//visibility:public"])
 
-key_ecdsa(
-    name = "unauthorized_key_0_ecdsa_p256",
-    config = "EcdsaP256",
-    method = "local",
-    private_key = "unauthorized_key_0_ecdsa_p256.der",
-    pub_key = "unauthorized_key_0_ecdsa_p256.pub.der",
-    type = "TestKey",
+keyset(
+    name = "ecdsa_keyset",
+    build_setting_default = "",
+    keys = {
+        "unauthorized_key_0_ecdsa_p256.der": "unauthorized_key_0",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
 )
diff --git a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/BUILD b/sw/device/silicon_creator/rom/keys/unauthorized/rsa/BUILD
deleted file mode 100644
index d1f8bda9491e1..0000000000000
--- a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/BUILD
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "unauthorized_private_key_0",
-    srcs = ["unauthorized_0_rsa_3072_exp_f4.der"],
-)
diff --git a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.der b/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.der
deleted file mode 100644
index 54acb673eeefd..0000000000000
Binary files a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.pub.der b/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.pub.der
deleted file mode 100644
index 6d28ecd2d9874..0000000000000
Binary files a/sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.pub.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom/keys/unauthorized/spx/BUILD b/sw/device/silicon_creator/rom/keys/unauthorized/spx/BUILD
index 1393523d80298..875af30b7be91 100644
--- a/sw/device/silicon_creator/rom/keys/unauthorized/spx/BUILD
+++ b/sw/device/silicon_creator/rom/keys/unauthorized/spx/BUILD
@@ -4,7 +4,14 @@
 
 package(default_visibility = ["//visibility:public"])
 
-filegroup(
-    name = "unauthorized_0_spx",
-    srcs = ["unauthorized_0_spx.pem"],
+load("//rules:signing.bzl", "keyset")
+
+keyset(
+    name = "spx_keyset",
+    build_setting_default = "",
+    keys = {
+        "unauthorized_0_spx.pem": "unauthorized_key_0",
+    },
+    profile = "local",
+    tool = "//signing/tokens:local",
 )
diff --git a/sw/device/silicon_creator/rom/rom.c b/sw/device/silicon_creator/rom/rom.c
index dd47164a650a0..49d99473650f4 100644
--- a/sw/device/silicon_creator/rom/rom.c
+++ b/sw/device/silicon_creator/rom/rom.c
@@ -18,10 +18,11 @@
 #include "sw/device/silicon_creator/lib/base/boot_measurements.h"
 #include "sw/device/silicon_creator/lib/base/sec_mmio.h"
 #include "sw/device/silicon_creator/lib/base/static_critical_version.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
 #include "sw/device/silicon_creator/lib/boot_data.h"
 #include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/build_info.h"
 #include "sw/device/silicon_creator/lib/cfi.h"
-#include "sw/device/silicon_creator/lib/chip_info.h"
 #include "sw/device/silicon_creator/lib/drivers/alert.h"
 #include "sw/device/silicon_creator/lib/drivers/ast.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
@@ -245,7 +246,7 @@ static rom_error_t rom_init(void) {
   boot_log_t *boot_log = &retention_sram_get()->creator.boot_log;
   memset(boot_log, 0, sizeof(*boot_log));
   boot_log->identifier = kBootLogIdentifier;
-  boot_log->chip_version = kChipInfo.scm_revision;
+  boot_log->chip_version = kBuildInfo.scm_revision;
   boot_log->retention_ram_initialized =
       reset_reasons & reset_mask ? kHardenedBoolTrue : kHardenedBoolFalse;
 
@@ -378,12 +379,18 @@ static rom_error_t rom_verify(const manifest_t *manifest,
   // Add remaining part of manifest / ROM_EXT image to the measurement.
   hmac_sha256_update(digest_region.start, digest_region.length);
   hmac_sha256_process();
-  hmac_digest_t act_digest;
-  hmac_sha256_final(&act_digest);
+  // The ECDSA verify function expects the digest in reverse order, which
+  // is what hmac_sha256_final produces.
+  hmac_digest_t rev_digest;
+  hmac_sha256_final(&rev_digest);
+  // The SPHINCS+ verify function expects the digest in the natural order,
+  // so we copy and reverse the bytes.
+  hmac_digest_t fwd_digest = rev_digest;
+  util_reverse_bytes(&fwd_digest, sizeof(fwd_digest));
   // Copy the ROM_EXT measurement to the .static_critical section.
-  static_assert(sizeof(boot_measurements.rom_ext) == sizeof(act_digest),
+  static_assert(sizeof(boot_measurements.rom_ext) == sizeof(rev_digest),
                 "Unexpected ROM_EXT digest size.");
-  memcpy(&boot_measurements.rom_ext, &act_digest,
+  memcpy(&boot_measurements.rom_ext, &rev_digest,
          sizeof(boot_measurements.rom_ext));
 
   CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomVerify, 2);
@@ -396,22 +403,22 @@ static rom_error_t rom_verify(const manifest_t *manifest,
   *flash_exec = 0;
   if (rnd_uint32() < 0x80000000) {
     HARDENED_RETURN_IF_ERROR(sigverify_ecdsa_p256_verify(
-        &manifest->ecdsa_signature, ecdsa_key, &act_digest, flash_exec));
+        &manifest->ecdsa_signature, ecdsa_key, &rev_digest, flash_exec));
 
     return sigverify_spx_verify(
         spx_signature, spx_key, spx_config, lc_state,
         &usage_constraints_from_hw, sizeof(usage_constraints_from_hw),
         anti_rollback, anti_rollback_len, digest_region.start,
-        digest_region.length, &act_digest, flash_exec);
+        digest_region.length, &fwd_digest, flash_exec);
   } else {
     HARDENED_RETURN_IF_ERROR(sigverify_spx_verify(
         spx_signature, spx_key, spx_config, lc_state,
         &usage_constraints_from_hw, sizeof(usage_constraints_from_hw),
         anti_rollback, anti_rollback_len, digest_region.start,
-        digest_region.length, &act_digest, flash_exec));
+        digest_region.length, &fwd_digest, flash_exec));
 
     return sigverify_ecdsa_p256_verify(&manifest->ecdsa_signature, ecdsa_key,
-                                       &act_digest, flash_exec);
+                                       &rev_digest, flash_exec);
   }
 }
 
@@ -515,12 +522,12 @@ static rom_error_t rom_measure_otp_partitions(
   hmac_sha256_update(
       (unsigned char *)(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR +
                         OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET +
-                        OTP_CTRL_CREATOR_SW_CFG_DIGEST_0_REG_OFFSET),
+                        OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_OFFSET),
       sizeof(uint64_t));
   hmac_sha256_update(
       (unsigned char *)(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR +
                         OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET +
-                        OTP_CTRL_OWNER_SW_CFG_DIGEST_0_REG_OFFSET),
+                        OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_OFFSET),
       sizeof(uint64_t));
   hmac_sha256_update(sigverify_ctx.keys.integrity_measurement.digest,
                      kHmacDigestNumBytes);
@@ -542,7 +549,9 @@ static rom_error_t rom_measure_otp_partitions(
  * @return rom_error_t Result of the operation.
  */
 OT_WARN_UNUSED_RESULT
-static rom_error_t rom_boot(const manifest_t *manifest, uint32_t flash_exec) {
+static rom_error_t rom_boot(const manifest_t *manifest,
+                            uintptr_t imm_section_entry_point,
+                            uint32_t flash_exec) {
   CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomBoot, 1);
   HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateReset));
 
@@ -667,7 +676,19 @@ static rom_error_t rom_boot(const manifest_t *manifest, uint32_t flash_exec) {
   // In a normal build, this function inlines to nothing.
   stack_utilization_print();
 
-  // (Potentially) Execute the immutable ROM_EXT section.
+  if (imm_section_entry_point != kHardenedBoolFalse) {
+    ((rom_ext_entry_point *)imm_section_entry_point)();
+  }
+  // Jump to ROM_EXT.
+  ((rom_ext_entry_point *)entry_point)();
+  return kErrorRomBootFailed;
+}
+
+static rom_error_t rom_verify_immutable_section(
+    rom_error_t verify_result, const manifest_t *manifest,
+    uintptr_t *imm_section_entry_point) {
+  *imm_section_entry_point = kHardenedBoolFalse;
+  // Verify the immutable ROM_EXT section.
   uint32_t rom_ext_immutable_section_enabled =
       otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET);
   if (launder32(rom_ext_immutable_section_enabled) == kHardenedBoolTrue) {
@@ -698,17 +719,26 @@ static rom_error_t rom_boot(const manifest_t *manifest, uint32_t flash_exec) {
     otp_read(OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH_OFFSET,
              immutable_rom_ext_hash.digest, kHmacDigestNumWords);
     for (size_t i = 0; i < kHmacDigestNumWords; ++i) {
-      HARDENED_CHECK_EQ(immutable_rom_ext_hash.digest[i],
-                        actual_immutable_section_digest.digest[i]);
+      if (immutable_rom_ext_hash.digest[i] !=
+          actual_immutable_section_digest.digest[i]) {
+        verify_result = kErrorRomImmSection;
+      }
+    }
+    // If address translation is enabled, adjust the entry_point.
+    if (launder32(manifest->address_translation) == kHardenedBoolTrue) {
+      HARDENED_CHECK_EQ(manifest->address_translation, kHardenedBoolTrue);
+      immutable_rom_ext_entry_point =
+          rom_ext_vma_get(manifest, immutable_rom_ext_entry_point);
+    } else {
+      HARDENED_CHECK_NE(manifest->address_translation, kHardenedBoolTrue);
+    }
+    if (verify_result == kErrorOk) {
+      *imm_section_entry_point = immutable_rom_ext_entry_point;
     }
-    ((rom_ext_entry_point *)immutable_rom_ext_entry_point)();
   } else {
     HARDENED_CHECK_NE(rom_ext_immutable_section_enabled, kHardenedBoolTrue);
   }
-
-  // Jump to ROM_EXT.
-  ((rom_ext_entry_point *)entry_point)();
-  return kErrorRomBootFailed;
+  return verify_result;
 }
 
 /**
@@ -725,9 +755,12 @@ static rom_error_t rom_try_boot(void) {
 
   boot_policy_manifests_t manifests = boot_policy_manifests_get();
   uint32_t flash_exec = 0;
+  uintptr_t imm_section_entry_point = kHardenedBoolFalse;
 
   CFI_FUNC_COUNTER_PREPCALL(rom_counters, kCfiRomTryBoot, 2, kCfiRomVerify);
   rom_error_t error = rom_verify(manifests.ordered[0], &flash_exec);
+  error = rom_verify_immutable_section(error, manifests.ordered[0],
+                                       &imm_section_entry_point);
   CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomTryBoot, 4);
 
   if (launder32(error) == kErrorOk) {
@@ -735,17 +768,21 @@ static rom_error_t rom_try_boot(void) {
     CFI_FUNC_COUNTER_CHECK(rom_counters, kCfiRomVerify, 3);
     CFI_FUNC_COUNTER_INIT(rom_counters, kCfiRomTryBoot);
     CFI_FUNC_COUNTER_PREPCALL(rom_counters, kCfiRomTryBoot, 1, kCfiRomBoot);
-    HARDENED_RETURN_IF_ERROR(rom_boot(manifests.ordered[0], flash_exec));
+    HARDENED_RETURN_IF_ERROR(
+        rom_boot(manifests.ordered[0], imm_section_entry_point, flash_exec));
     return kErrorRomBootFailed;
   }
 
   CFI_FUNC_COUNTER_PREPCALL(rom_counters, kCfiRomTryBoot, 5, kCfiRomVerify);
-  HARDENED_RETURN_IF_ERROR(rom_verify(manifests.ordered[1], &flash_exec));
+  error = rom_verify(manifests.ordered[1], &flash_exec);
+  HARDENED_RETURN_IF_ERROR(rom_verify_immutable_section(
+      error, manifests.ordered[1], &imm_section_entry_point));
   CFI_FUNC_COUNTER_INCREMENT(rom_counters, kCfiRomTryBoot, 7);
   CFI_FUNC_COUNTER_CHECK(rom_counters, kCfiRomVerify, 3);
 
   CFI_FUNC_COUNTER_PREPCALL(rom_counters, kCfiRomTryBoot, 8, kCfiRomBoot);
-  HARDENED_RETURN_IF_ERROR(rom_boot(manifests.ordered[1], flash_exec));
+  HARDENED_RETURN_IF_ERROR(
+      rom_boot(manifests.ordered[1], imm_section_entry_point, flash_exec));
   return kErrorRomBootFailed;
 }
 
diff --git a/sw/device/silicon_creator/rom/rom.ld b/sw/device/silicon_creator/rom/rom.ld
index 58f4fdc69695b..1ebeb30e58352 100644
--- a/sw/device/silicon_creator/rom/rom.ld
+++ b/sw/device/silicon_creator/rom/rom.ld
@@ -110,9 +110,9 @@ SECTIONS {
    *
    * This is placed next to the ".shutdown" section.
    */
-  .rom_isrs : ALIGN(4) {
-    *(.rom_isrs)
-    *(.rom_isrs.*)
+  .isrs : ALIGN(4) {
+    *(.isrs)
+    *(.isrs.*)
 
     /* Ensure section end is word-aligned. */
     . = ALIGN(4);
@@ -199,7 +199,7 @@ SECTIONS {
    * This is the last thing in rom.
    */
   .chip_info _chip_info_start : ALIGN(4) {
-    KEEP(*(.chip_info))
+    KEEP(*(.build_info))
   } > rom
 
   INCLUDE sw/device/info_sections.ld
diff --git a/sw/device/silicon_creator/rom/rom_epmp_test.c b/sw/device/silicon_creator/rom/rom_epmp_test.c
index f41152e456507..5a4a8b88a420b 100644
--- a/sw/device/silicon_creator/rom/rom_epmp_test.c
+++ b/sw/device/silicon_creator/rom/rom_epmp_test.c
@@ -125,6 +125,12 @@ void rom_exception_handler(void) {
   wait_for_interrupt();
 }
 
+// The ROM jumps to the flash_exception_handler first to deal with ECC errors.
+// We don't use the flash exception handler in this test, so we alias the
+// symbol to rom_exception_handler to allow the test program to link.
+OT_ALIAS("rom_exception_handler")
+void flash_exception_handler(void);
+
 /**
  * Attempt to execute the code at `pc` by calling it like a function.
  *
diff --git a/sw/device/silicon_creator/rom/rom_isrs.S b/sw/device/silicon_creator/rom/rom_isrs.S
deleted file mode 100644
index 690f55cc10e16..0000000000000
--- a/sw/device/silicon_creator/rom/rom_isrs.S
+++ /dev/null
@@ -1,230 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/lib/base/hardened_asm.h"
-#include "flash_ctrl_regs.h"
-
-.equ LOAD_ACCESS_FAULT, 5
-
-// If we get an ECC error reading from internal flash, one of these bits
-// will be set in the flash controller's FAULT_STATUS register.
-.equ PHY_ERRORS, (1 << FLASH_CTRL_FAULT_STATUS_PHY_STORAGE_ERR_BIT) | \
-                 (1 << FLASH_CTRL_FAULT_STATUS_PHY_RELBL_ERR_BIT)
-
-// NOTE: The "ax" flag below is necessary to ensure that this section
-// is allocated executable space in ROM by the linker.
-.section .rom_isrs, "ax"
-
-// -----------------------------------------------------------------------------
-
-  /**
-   * Exception handler.
-   */
-  .balign 4
-  .global rom_exception_handler
-  .type rom_exception_handler, @function
-  .extern flash_ecc_exc_handler_en
-rom_exception_handler:
-  // Save all registers to the exception frame.  The ROM locates its initial
-  // stack_end at `ram_end - 128` and the stack grows downwards from there.
-  // Save `sp` into `mscratch` and use the 128 bytes reserved at the top of
-  // RAM as the exception frame.
-  csrw mscratch, sp
-
-  // Before saving the stack frame, check if handling of flash exceptions is
-  // enabled.  Determine this with just the stack pointer so that if not enabled,
-  // we don't have to do any other register save/restore.
-  la   sp, flash_ecc_exc_handler_en
-  lw   sp, 0(sp)
-  xori sp, sp, HARDENED_BOOL_TRUE
-  bnez sp, .L_no_flash_exceptions
-
-  // Note: we save the exception frame in RISCV register number order so that
-  // we can extract the destination register from the faulting instruction and
-  // use it as an index into the exception frame.
-  la   sp, _exception_frame_start
-  sw   x1,  1 * OT_WORD_SIZE(sp)
-  sw   x2,  2 * OT_WORD_SIZE(sp)
-  sw   x3,  3 * OT_WORD_SIZE(sp)
-  sw   x4,  4 * OT_WORD_SIZE(sp)
-  sw   x5,  5 * OT_WORD_SIZE(sp)
-  sw   x6,  6 * OT_WORD_SIZE(sp)
-  sw   x7,  7 * OT_WORD_SIZE(sp)
-  sw   x8,  8 * OT_WORD_SIZE(sp)
-  sw   x9,  9 * OT_WORD_SIZE(sp)
-  sw   x10,  10 * OT_WORD_SIZE(sp)
-  sw   x11,  11 * OT_WORD_SIZE(sp)
-  sw   x12,  12 * OT_WORD_SIZE(sp)
-  sw   x13,  13 * OT_WORD_SIZE(sp)
-  sw   x14,  14 * OT_WORD_SIZE(sp)
-  sw   x15,  15 * OT_WORD_SIZE(sp)
-  sw   x16,  16 * OT_WORD_SIZE(sp)
-  sw   x17,  17 * OT_WORD_SIZE(sp)
-  sw   x18,  18 * OT_WORD_SIZE(sp)
-  sw   x19,  19 * OT_WORD_SIZE(sp)
-  sw   x20,  20 * OT_WORD_SIZE(sp)
-  sw   x21,  21 * OT_WORD_SIZE(sp)
-  sw   x22,  22 * OT_WORD_SIZE(sp)
-  sw   x23,  23 * OT_WORD_SIZE(sp)
-  sw   x24,  24 * OT_WORD_SIZE(sp)
-  sw   x25,  25 * OT_WORD_SIZE(sp)
-  sw   x26,  26 * OT_WORD_SIZE(sp)
-  sw   x27,  27 * OT_WORD_SIZE(sp)
-  sw   x28,  28 * OT_WORD_SIZE(sp)
-  sw   x29,  29 * OT_WORD_SIZE(sp)
-  sw   x30,  30 * OT_WORD_SIZE(sp)
-  sw   x31,  31 * OT_WORD_SIZE(sp)
-
-  // Get the mcause, mask the reason and check that it is LoadAccessFault.
-  csrr a1, mcause
-  andi a1, a1, 31
-  li   a2, LOAD_ACCESS_FAULT
-  bne  a1, a2, .L_not_a_flash_error
-
-  // Check if there is a flash error.
-  li   a3, TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR
-  lw   a1, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
-  andi a1, a1, PHY_ERRORS
-  beqz a1, .L_not_a_flash_error
-
-  // Clear the flash error.
-  sw   x0, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
-  // Hardening: check that the error is cleared.
-  lw   a1, FLASH_CTRL_FAULT_STATUS_REG_OFFSET(a3)
-  beqz a1, .L_flash_fault_handled
-  j    .L_not_a_flash_error
-  unimp
-  unimp
-
-.L_flash_fault_handled:
-  // Compute the MEPC of the instruction after the fault.
-  //
-  // Since we support the RISC-V compressed instructions extension, we need to
-  // check if the two least significant bits of the instruction are
-  // b11 (0x3), which means that the trapped instruction is not compressed,
-  // i.e., the trapped instruction is 32bits = 4bytes. Otherwise, the trapped
-  // instruction is 16bits = 2bytes.
-  //
-  // Instruction formats for loads:
-  //
-  //  LB, LH, LW, LBU, LHU:
-  //  31                  20 19      15 14  12 11       7 6            0
-  // +----------------------+----------+------+----------+--------------+
-  // |      imm[11:0]       |    rs1   |funct3|    rd    |   0000011    |
-  // +----------------------+----------+------+----------+--------------+
-  //
-  // C.LW
-  //  15  13 12  10 9    7 6  5 4    2 1  0
-  // +------+------+------+----+------+----+
-  // |funct3| imm  | rs1' | imm|  rd' | 00 |
-  // +------+------+------+----+------+----+
-  // Where rd' and rs1' are (register_num - 8, ie: rd' of 0 means reg x8).
-  //
-
-  csrr a0, mepc
-  lh   a2, 0(a0)
-  addi a0, a0, OT_HALF_WORD_SIZE
-  // Check if its a 16-bit compressed instruction.
-  li   a1, 3
-  and  a3, a2, a1
-  bne  a3, a1, .L_compressed_trap_instr
-  // Check if its an uncompressed load instruction by checking that the next
-  // five bits are zero.
-  srli a3, a2, 2
-  andi a3, a3, 0x1f
-  bnez a3, .L_not_a_flash_error
-  // Get the register number into a3 by masking off the rd field.
-  srli a3, a2, 7
-  andi a3, a3, 0x1f
-  // We already added one half word, so for a 32-bit instruction, add another.
-  addi a0, a0, OT_HALF_WORD_SIZE
-  j    .L_hardened_mepc_check
-
-.L_compressed_trap_instr:
-  // Check if its a compressed load instruction.
-  bnez a3, .L_not_a_flash_error
-  // Get the register number into a3 by masking off the rd' field and adding 8.
-  srli a3, a2, 2
-  andi a3, a3, 7
-  addi a3, a3, 8
-
-.L_hardened_mepc_check:
-  // Hardening: double-check that the retval calculation is 4 bytes or fewer
-  // from the original value of MEPC.
-  addi a1, a1, 1
-  csrr a2, mepc
-  sub  a2, a0, a2
-  bgtu a2, a1, .L_not_a_flash_error
-
-  // Now, using `rd` from the faulting instruction (in a3), load all ones into
-  // that register.
-  // RISCV register x0, aka zero.  This register is always const 0, so there
-  // is nothing to do.
-  beqz a3, .L_flash_fault_done
-
-  // All other registers load the value 0xFFFFFFFF as the faulting value.
-  li   a2, -1
-  slli a3, a3, 2
-  add  a3, a3, sp
-  sw   a2, 0(a3)
-
-.L_flash_fault_done:
-  // Exception handler exit and return to C:
-  // Load the correct MEPC for the next instruction in the current task.
-  csrw mepc, a0
-
-  // Restore all registers from the stack and restore SP to its former value.
-  lw   x1,  1 * OT_WORD_SIZE(sp)
-  lw   x2,  2 * OT_WORD_SIZE(sp)
-  lw   x3,  3 * OT_WORD_SIZE(sp)
-  lw   x4,  4 * OT_WORD_SIZE(sp)
-  lw   x5,  5 * OT_WORD_SIZE(sp)
-  lw   x6,  6 * OT_WORD_SIZE(sp)
-  lw   x7,  7 * OT_WORD_SIZE(sp)
-  lw   x8,  8 * OT_WORD_SIZE(sp)
-  lw   x9,  9 * OT_WORD_SIZE(sp)
-  lw   x10,  10 * OT_WORD_SIZE(sp)
-  lw   x11,  11 * OT_WORD_SIZE(sp)
-  lw   x12,  12 * OT_WORD_SIZE(sp)
-  lw   x13,  13 * OT_WORD_SIZE(sp)
-  lw   x14,  14 * OT_WORD_SIZE(sp)
-  lw   x15,  15 * OT_WORD_SIZE(sp)
-  lw   x16,  16 * OT_WORD_SIZE(sp)
-  lw   x17,  17 * OT_WORD_SIZE(sp)
-  lw   x18,  18 * OT_WORD_SIZE(sp)
-  lw   x19,  19 * OT_WORD_SIZE(sp)
-  lw   x20,  20 * OT_WORD_SIZE(sp)
-  lw   x21,  21 * OT_WORD_SIZE(sp)
-  lw   x22,  22 * OT_WORD_SIZE(sp)
-  lw   x23,  23 * OT_WORD_SIZE(sp)
-  lw   x24,  24 * OT_WORD_SIZE(sp)
-  lw   x25,  25 * OT_WORD_SIZE(sp)
-  lw   x26,  26 * OT_WORD_SIZE(sp)
-  lw   x27,  27 * OT_WORD_SIZE(sp)
-  lw   x28,  28 * OT_WORD_SIZE(sp)
-  lw   x29,  29 * OT_WORD_SIZE(sp)
-  lw   x30,  30 * OT_WORD_SIZE(sp)
-  lw   x31,  31 * OT_WORD_SIZE(sp)
-  csrr sp, mscratch
-  mret
-
-.L_no_flash_exceptions:
-  csrr sp, mscratch
-.L_not_a_flash_error:
-  // Since we aren't dealing with a flash error, we'll jump to the normal
-  // handler for all other exceptiosn and interrupts.  That handler emits
-  // the fault info to the UART and initiates shutdown.  No register state
-  // preservation is necessary because we're not coming back.
-  //
-  // Note: we _also_ do not restore SP - we'll restart the stack at
-  // `ram_end - 128`.  This allows us to report exceptions after jumping
-  // to the next stage if the next stage has trashed its SP register.
-  j rom_interrupt_handler
-
-  // Normally, we'd put an `unimp` sled here, however, we know by inspecting
-  // the disassembly of the linked ROM binary that the very next instruction
-  // is the beginning of `rom_interrupt_handler`.
-  .size rom_exception_handler, .-rom_exception_handler
diff --git a/sw/device/silicon_creator/rom/rom_isrs.h b/sw/device/silicon_creator/rom/rom_isrs.h
index 6252b47b47dac..63b8fc5786983 100644
--- a/sw/device/silicon_creator/rom/rom_isrs.h
+++ b/sw/device/silicon_creator/rom/rom_isrs.h
@@ -24,7 +24,7 @@ extern "C" {
  * Denotes functions that have to be near the interrupt vector, because they
  * are jumped to from it.
  */
-#define ROM_VECTOR_FUNCTION __attribute__((section(".rom_isrs")))
+#define ROM_VECTOR_FUNCTION __attribute__((section(".isrs")))
 
 /**
  * ROM hardware exception handler.
diff --git a/sw/device/silicon_creator/rom/rom_start.S b/sw/device/silicon_creator/rom/rom_start.S
index ee4837eb6523f..35b1884f7326b 100644
--- a/sw/device/silicon_creator/rom/rom_start.S
+++ b/sw/device/silicon_creator/rom/rom_start.S
@@ -93,7 +93,7 @@ _rom_interrupt_vector_asm:
   .type _rom_interrupt_vector_c, @function
 _rom_interrupt_vector_c:
   // Entry 0: exception handler.
-  j rom_exception_handler
+  j flash_exception_handler
 
   // Entries 1-30: interrupt handlers.
   .rept 30
@@ -236,12 +236,17 @@ LABEL_FOR_TEST(kRomStartWatchdogEnabled)
             OTP_CTRL_PARAM_CREATOR_SW_CFG_AST_CFG_OFFSET)
   call crt_section_copy
 
-  // Enable jittery clock if enabled in OTP.
+  // Enable jittery clock if not strictly disabled in OTP.
+  // Use hardcoded MULTIBIT_ASM_BOOL4_TRUE as the enable word to reduce all
+  // other possible OTP values to true.
   li   a0, (TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR + \
             OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET)
   lw   t0, OTP_CTRL_PARAM_CREATOR_SW_CFG_JITTER_EN_OFFSET(a0)
+  li   t1, MULTIBIT_ASM_BOOL4_FALSE
+  beq  t0, t1, .L_ast_init_end
   li   a0, TOP_EARLGREY_CLKMGR_AON_BASE_ADDR
-  sw   t0, CLKMGR_JITTER_ENABLE_REG_OFFSET(a0)
+  li   t1, MULTIBIT_ASM_BOOL4_TRUE
+  sw   t1, CLKMGR_JITTER_ENABLE_REG_OFFSET(a0)
 
 .L_ast_init_end:
   // Check if we are trying to transition to RMA. If so, busy loop for
diff --git a/sw/device/silicon_creator/rom/sigverify_otp_keys.c b/sw/device/silicon_creator/rom/sigverify_otp_keys.c
index 8029a6470a7ea..0523655e26491 100644
--- a/sw/device/silicon_creator/rom/sigverify_otp_keys.c
+++ b/sw/device/silicon_creator/rom/sigverify_otp_keys.c
@@ -65,7 +65,7 @@ static rom_error_t key_is_valid_in_lc_state_rma(sigverify_key_type_t key_type) {
       return kErrorOk;
     case kSigverifyKeyTypeDev:
       HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
-      return kErrorSigverifyBadKey;
+      return kErrorOk;
     default:
       HARDENED_TRAP();
       OT_UNREACHABLE();
@@ -145,7 +145,7 @@ static rom_error_t key_is_valid_in_lc_state_test(
       return kErrorOk;
     case kSigverifyKeyTypeDev:
       HARDENED_CHECK_EQ(key_type, kSigverifyKeyTypeDev);
-      return kErrorSigverifyBadKey;
+      return kErrorOk;
     default:
       HARDENED_TRAP();
       OT_UNREACHABLE();
diff --git a/sw/device/silicon_creator/rom_ext/BUILD b/sw/device/silicon_creator/rom_ext/BUILD
index fd74c0c9c13c8..9aa589c471d25 100644
--- a/sw/device/silicon_creator/rom_ext/BUILD
+++ b/sw/device/silicon_creator/rom_ext/BUILD
@@ -2,45 +2,65 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_fuzzing//fuzzing:cc_defs.bzl", "cc_fuzz_test")
+load("@rules_pkg//pkg:mappings.bzl", "pkg_filegroup", "pkg_files")
+load("//rules:files.bzl", "output_groups")
 load("//rules:const.bzl", "CONST", "hex")
-load("//rules:cross_platform.bzl", "dual_cc_library", "dual_inputs")
+load("//rules:cross_platform.bzl", "dual_cc_device_library_of", "dual_cc_library", "dual_inputs")
 load("//rules:linker.bzl", "ld_library")
 load("//rules:manifest.bzl", "manifest")
 load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU", "opentitan_binary")
 load(
     "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
     "ROM_EXT_VERSION",
+    "SLOTS",
+    "TEST_OWNER_CONFIGS",
 )
+load("@bazel_skylib//rules:common_settings.bzl", "string_flag")
+load("//rules:signing.bzl", "signature_test")
 
 package(default_visibility = ["//visibility:public"])
 
-cc_library(
-    name = "rom_ext_epmp",
-    srcs = ["rom_ext_epmp.c"],
-    hdrs = ["rom_ext_epmp.h"],
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:bitfield",
-        "//sw/device/lib/base:csr",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/silicon_creator/lib:epmp_state",
+filegroup(
+    name = "signed_spx_binaries",
+    testonly = True,
+    srcs = ["//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a"],
+    output_group = "fpga_cw310_signed_bin",
+)
+
+signature_test(
+    name = "rom_ext_signature_test",
+    srcs = [
+        ":signed_spx_binaries",
     ],
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+    spx_domain = "Pure",  # "Pure", "PrehashedSha256"
+    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+)
+
+string_flag(
+    name = "secver_write",
+    build_setting_default = "false",
+    values = [
+        "false",
+        "true",
+    ],
+)
+
+config_setting(
+    name = "secver_write_true",
+    flag_values = {":secver_write": "true"},
 )
 
 cc_library(
-    name = "rescue",
-    srcs = ["rescue.c"],
-    hdrs = ["rescue.h"],
+    name = "rom_ext_manifest",
+    srcs = ["rom_ext_manifest.c"],
+    hdrs = ["rom_ext_manifest.h"],
+    target_compatible_with = [OPENTITAN_CPU],
     deps = [
-        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
-        "//sw/device/lib/base:memory",
-        "//sw/device/silicon_creator/lib:dbg_print",
-        "//sw/device/silicon_creator/lib:error",
-        "//sw/device/silicon_creator/lib:xmodem",
-        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
-        "//sw/device/silicon_creator/lib/drivers:retention_sram",
-        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib:manifest",
     ],
 )
 
@@ -94,55 +114,81 @@ cc_test(
 )
 
 cc_library(
-    name = "bootstrap",
-    srcs = ["bootstrap.c"],
-    hdrs = ["bootstrap.h"],
+    name = "rom_ext_boot_services",
+    srcs = ["rom_ext_boot_services.c"],
+    hdrs = ["rom_ext_boot_services.h"],
     deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib:bootstrap",
+        ":rom_ext_boot_policy",
+        ":rom_ext_verify",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib:boot_log",
         "//sw/device/silicon_creator/lib:error",
-        "//sw/device/silicon_creator/lib/base:chip",
-        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+        "//sw/device/silicon_creator/lib/ownership:ownership_activate",
+        "//sw/device/silicon_creator/lib/ownership:ownership_unlock",
+        "//sw/device/silicon_creator/lib/rescue",
+        "//sw/device/silicon_creator/lib/sigverify:flash_exec",
     ],
 )
 
 cc_test(
-    name = "bootstrap_unittest",
-    srcs = ["bootstrap_unittest.cc"],
+    name = "rom_ext_boot_services_unittest",
+    srcs = ["rom_ext_boot_services_unittest.cc"],
     deps = [
-        ":bootstrap",
-        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
-        "//sw/device/lib/base:memory",
-        "//sw/device/silicon_creator/lib:bootstrap",
-        "//sw/device/silicon_creator/lib:bootstrap_unittest_util",
-        "//sw/device/silicon_creator/lib:error_unittest_util",
-        "//sw/device/silicon_creator/lib/base:chip",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/drivers:rstmgr",
-        "//sw/device/silicon_creator/lib/drivers:spi_device",
+        ":rom_ext_boot_services",
+        dual_cc_device_library_of("//sw/device/silicon_creator/lib/boot_svc:boot_svc_header"),
+        "//sw/device/silicon_creator/lib/rescue:rescue_null",
         "//sw/device/silicon_creator/testing:rom_test",
-        "@com_google_absl//absl/types:optional",
-        "@com_google_absl//absl/types:span",
         "@googletest//:gtest_main",
     ],
 )
 
-# To test this target, you must specify `--config=asan-libfuzzer`.
-cc_fuzz_test(
-    name = "bootstrap_fuzz_test",
-    srcs = ["bootstrap_fuzz_test.cc"],
-    tags = [
-        "fuzzer",
-        "manual",
+cc_library(
+    name = "rom_ext_flash_exc_handler",
+    srcs = ["//sw/device/silicon_creator/lib:flash_exc_handler"],
+    defines = [
+        "INTERRUPT_HANDLER=rom_ext_interrupt_handler",
+    ],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:macros",
+    ],
+)
+
+cc_library(
+    name = "rom_ext_isrs",
+    srcs = ["rom_ext_isrs.c"],
+    hdrs = ["rom_ext_isrs.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":rom_ext_flash_exc_handler",
+        "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib:error",
     ],
+)
+
+cc_library(
+    name = "rom_ext_verify",
+    srcs = ["rom_ext_verify.c"],
+    hdrs = ["rom_ext_verify.h"],
     deps = [
-        ":bootstrap",
-        "//sw/device/silicon_creator/lib:bootstrap_fuzzer_util",
-        "@com_google_absl//absl/types:span",
+        ":rom_ext_boot_policy",
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/base:boot_measurements",
+        "//sw/device/silicon_creator/lib/ownership:isfb",
+        "//sw/device/silicon_creator/lib/ownership:owner_block",
+        "//sw/device/silicon_creator/lib/ownership:owner_verify",
+        "//sw/device/silicon_creator/lib/sigverify:usage_constraints",
     ],
 )
 
@@ -151,7 +197,9 @@ ld_library(
     includes = ["rom_ext_common.ld"],
     deps = [
         "//sw/device:info_sections",
+        "//sw/device/lib/coverage:coverage_sections",
         "//sw/device/silicon_creator/lib/base:static_critical_sections",
+        "//sw/device/silicon_creator/lib/base:static_dice_sections",
     ],
 )
 
@@ -183,86 +231,80 @@ ld_library(
 )
 
 cc_library(
-    name = "sigverify_keys",
-    srcs = ["sigverify_keys.c"],
-    hdrs = ["sigverify_keys.h"],
-    deps = [
-        "//sw/device/lib/base:hardened",
-        "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib:error",
-        "//sw/device/silicon_creator/lib/drivers:rnd",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_key",
-    ],
-)
-
-cc_test(
-    name = "sigverify_keys_unittest",
-    srcs = ["sigverify_keys_unittest.cc"],
+    name = "rom_ext_start",
+    srcs = ["rom_ext_start.S"],
+    target_compatible_with = [OPENTITAN_CPU],
     deps = [
-        ":sigverify_keys",
+        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/silicon_creator/testing:rom_test",
-        "@googletest//:gtest_main",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/coverage:api_asm",
     ],
 )
 
-cc_library(
-    name = "rom_ext",
-    srcs = [
-        "rom_ext.c",
-        "rom_ext_start.S",
-    ],
-    hdrs = ["rom_ext.h"],
-    target_compatible_with = [OPENTITAN_CPU],
-    deps = [
-        ":rescue",
-        ":rom_ext_boot_policy",
-        ":rom_ext_boot_policy_ptrs",
-        ":rom_ext_epmp",
-        ":sigverify_keys",
-        "//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
-        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
-        "//sw/device/lib/arch:device",
-        "//sw/device/lib/base:csr",
-        "//sw/device/lib/base:macros",
-        "//sw/device/lib/base:stdasm",
-        "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/runtime:hart",
-        "//sw/device/silicon_creator/lib:attestation",
-        "//sw/device/silicon_creator/lib:attestation_key_diversifiers",
-        "//sw/device/silicon_creator/lib:boot_data",
-        "//sw/device/silicon_creator/lib:boot_log",
-        "//sw/device/silicon_creator/lib:dbg_print",
-        "//sw/device/silicon_creator/lib:dice",
-        "//sw/device/silicon_creator/lib:manifest",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/lib:otbn_boot_services",
-        "//sw/device/silicon_creator/lib:shutdown",
-        "//sw/device/silicon_creator/lib/base:chip",
-        "//sw/device/silicon_creator/lib/base:sec_mmio",
-        "//sw/device/silicon_creator/lib/base:static_critical",
-        "//sw/device/silicon_creator/lib/base:util",
-        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
-        "//sw/device/silicon_creator/lib/cert",
-        "//sw/device/silicon_creator/lib/cert:cdi_0_template_library",
-        "//sw/device/silicon_creator/lib/cert:cdi_1_template_library",
-        "//sw/device/silicon_creator/lib/drivers:ast",
-        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:ibex",
-        "//sw/device/silicon_creator/lib/drivers:keymgr",
-        "//sw/device/silicon_creator/lib/drivers:lifecycle",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/drivers:pinmux",
-        "//sw/device/silicon_creator/lib/drivers:retention_sram",
-        "//sw/device/silicon_creator/lib/drivers:rnd",
-        "//sw/device/silicon_creator/lib/drivers:uart",
-        "//sw/device/silicon_creator/lib/ownership",
-        "//sw/device/silicon_creator/lib/ownership:ownership_unlock",
-        "//sw/device/silicon_creator/lib/sigverify",
-        "//sw/otbn/crypto:boot",
-    ],
-)
+[
+    cc_library(
+        name = "rom_ext_{}".format(variation_name),
+        srcs = ["rom_ext.c"],
+        hdrs = ["rom_ext.h"],
+        target_compatible_with = [OPENTITAN_CPU],
+        deps = [
+            ":rom_ext_boot_policy",
+            ":rom_ext_boot_policy_ptrs",
+            ":rom_ext_boot_services",
+            ":rom_ext_isrs",
+            ":rom_ext_manifest",
+            ":rom_ext_start",
+            "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+            "//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
+            "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+            "//sw/device/lib/arch:device",
+            "//sw/device/lib/base:csr",
+            "//sw/device/lib/base:macros",
+            "//sw/device/lib/base:memory",
+            "//sw/device/lib/base:stdasm",
+            "//sw/device/lib/coverage:api",
+            "//sw/device/lib/coverage:uart_runtime",
+            "//sw/device/lib/runtime:hart",
+            "//sw/device/silicon_creator/lib:boot_data",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib:dbg_print",
+            "//sw/device/silicon_creator/lib:manifest",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib:shutdown",
+            "//sw/device/silicon_creator/lib/base:chip",
+            "//sw/device/silicon_creator/lib/base:sec_mmio",
+            "//sw/device/silicon_creator/lib/base:static_critical",
+            "//sw/device/silicon_creator/lib/base:static_dice",
+            "//sw/device/silicon_creator/lib/base:util",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+            "//sw/device/silicon_creator/lib/cert:dice_chain",
+            "//sw/device/silicon_creator/lib/drivers:ast",
+            "//sw/device/silicon_creator/lib/drivers:epmp",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/drivers:hmac",
+            "//sw/device/silicon_creator/lib/drivers:ibex",
+            "//sw/device/silicon_creator/lib/drivers:lifecycle",
+            "//sw/device/silicon_creator/lib/drivers:otp",
+            "//sw/device/silicon_creator/lib/drivers:pinmux",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rnd",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+            "//sw/device/silicon_creator/lib/drivers:uart",
+            "//sw/device/silicon_creator/lib/drivers:watchdog",
+            "//sw/device/silicon_creator/lib/ownership",
+            "//sw/device/silicon_creator/lib/ownership:isfb",
+            "//sw/device/silicon_creator/lib/ownership:owner_verify",
+            "//sw/device/silicon_creator/lib/ownership:ownership_activate",
+            "//sw/device/silicon_creator/lib/ownership:ownership_unlock",
+            "//sw/device/silicon_creator/lib/rescue",
+            "//sw/device/silicon_creator/lib/sigverify",
+            "//sw/device/silicon_creator/rom_ext/imm_section:imm_section_version",
+            "//sw/otbn/crypto:boot",
+        ] + variation_deps,
+    )
+    for variation_name, variation_deps in ROM_EXT_VARIATIONS.items()
+]
 
 manifest(d = {
     "name": "manifest",
@@ -273,95 +315,128 @@ manifest(d = {
     "security_version": ROM_EXT_VERSION.SECURITY,
 })
 
+[
+    opentitan_binary(
+        name = "rom_ext_{}_slot_{}".format(variation_name, slot),
+        testonly = True,
+        # TODO(#22780): Integrate real keys for A1 flows.
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw310",
+            "//hw/top_earlgrey:fpga_cw340",
+            "//hw/top_earlgrey:sim_dv_base",
+            "//hw/top_earlgrey:sim_qemu_base",
+            "//hw/top_earlgrey:sim_verilator_base",
+            "//hw/top_earlgrey:silicon_creator",
+        ],
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = ":ld_slot_{}".format(slot),
+        manifest = ":manifest",
+        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+        deps = [
+            ":rom_ext_{}".format(variation_name),
+            "//sw/device/lib/crt",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/ownership:test_owner",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake",
+            "//sw/device/silicon_creator/lib/rescue:rescue_xmodem",
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_section_{}_slot_{}".format(variation_name, slot),
+        ],
+    )
+    for variation_name, variation_deps in ROM_EXT_VARIATIONS.items()
+    for slot in SLOTS
+]
+
+[
+    opentitan_binary(
+        name = "rom_ext_{}".format(name),
+        testonly = True,
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw340",
+            "//hw/top_earlgrey:fpga_cw310",
+            "//hw/top_earlgrey:sim_qemu_base",
+        ],
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = ":ld_slot_a",
+        manifest = ":manifest",
+        deps = [
+            ":rom_ext_dice_x509",
+            "//sw/device/lib/crt",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/ownership:test_owner_{}".format(name),
+            "//sw/device/silicon_creator/lib/ownership/keys/fake",
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_section_dice_x509_slot_a",
+        ] + param["rescue_module"],
+    )
+    for name, param in TEST_OWNER_CONFIGS.items()
+]
+
+manifest(d = {
+    "name": "manifest_bad_address_translation",
+    "address_translation": "0",
+    "identifier": hex(CONST.ROM_EXT),
+})
+
 opentitan_binary(
-    name = "rom_ext_slot_a",
-    # TODO(#22780): Integrate real keys for A1 flows.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
+    name = "rom_ext_dice_x509_slot_a_bad_address_translation",
+    testonly = True,
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "test_key_0"},
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310",
         "//hw/top_earlgrey:fpga_cw340",
         "//hw/top_earlgrey:sim_dv_base",
+        "//hw/top_earlgrey:sim_qemu_base",
         "//hw/top_earlgrey:sim_verilator_base",
-        "//hw/top_earlgrey:silicon_creator",
+    ],
+    extra_bazel_features = [
+        "minsize",
+        "use_lld",
     ],
     linker_script = ":ld_slot_a",
-    manifest = ":manifest",
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
+    manifest = ":manifest_bad_address_translation",
     deps = [
-        ":rom_ext",
+        ":rom_ext_dice_x509",
         "//sw/device/lib/crt",
         "//sw/device/silicon_creator/lib:manifest_def",
+        "//sw/device/silicon_creator/lib/ownership:test_owner",
         "//sw/device/silicon_creator/lib/ownership/keys/fake",
-        "//sw/device/silicon_creator/rom_ext/keys/fake",
+        "//sw/device/silicon_creator/lib/rescue:rescue_xmodem",
+        "//sw/device/silicon_creator/rom_ext/imm_section:main_section_dice_x509_slot_a",
     ],
 )
 
-opentitan_binary(
-    name = "rom_ext_slot_b",
-    # TODO(#22780): Integrate real keys for A1 flows.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:fpga_cw340",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-        "//hw/top_earlgrey:silicon_creator",
-    ],
-    linker_script = ":ld_slot_b",
-    manifest = ":manifest",
-    spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:prod_key_0_spx": "prod_key_0"},
-    deps = [
-        ":rom_ext",
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/lib/ownership/keys/fake",
-        "//sw/device/silicon_creator/rom_ext/keys/fake",
+output_groups(
+    name = "fpga_dev_binaries",
+    testonly = True,
+    srcs = [":rom_ext_dice_x509_slot_virtual"],
+    groups = [
+        "fpga_cw310_signed_bin",
+        "fpga_cw340_signed_bin",
     ],
 )
 
-opentitan_binary(
-    name = "rom_ext_slot_virtual",
-    # TODO(#22780): Integrate real keys for A1 flows.
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:fpga_cw340",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-        "//hw/top_earlgrey:silicon_creator",
-    ],
-    linker_script = ":ld_slot_virtual",
-    manifest = ":manifest",
-    deps = [
-        ":rom_ext",
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/lib/ownership/keys/fake",
-        "//sw/device/silicon_creator/rom_ext/keys/fake",
+pkg_files(
+    name = "fpga_dev_files",
+    testonly = True,
+    srcs = [
+        ":fpga_dev_binaries",
     ],
+    tags = ["manual"],
 )
 
-manifest(d = {
-    "name": "manifest_bad_address_translation",
-    "address_translation": "0",
-    "identifier": hex(CONST.ROM_EXT),
-})
-
-opentitan_binary(
-    name = "rom_ext_slot_a_bad_address_translation",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:test_key_0_ecdsa_p256": "test_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:fpga_cw340",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-    ],
-    linker_script = ":ld_slot_a",
-    manifest = ":manifest_bad_address_translation",
-    deps = [
-        ":rom_ext",
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext/keys/fake",
+pkg_filegroup(
+    name = "fpga_dev_pkg",
+    testonly = True,
+    srcs = [
+        ":fpga_dev_files",
     ],
+    prefix = "rom_ext",
+    tags = ["manual"],
 )
diff --git a/sw/device/silicon_creator/rom_ext/bootstrap.c b/sw/device/silicon_creator/rom_ext/bootstrap.c
deleted file mode 100644
index cd5c891589895..0000000000000
--- a/sw/device/silicon_creator/rom_ext/bootstrap.c
+++ /dev/null
@@ -1,154 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/rom_ext/bootstrap.h"
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/base/chip.h"
-#include "sw/device/silicon_creator/lib/bootstrap.h"
-#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
-#include "sw/device/silicon_creator/lib/drivers/otp.h"
-#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
-#include "sw/device/silicon_creator/lib/error.h"
-
-#include "flash_ctrl_regs.h"
-#include "hw/ip/otp_ctrl/data/otp_ctrl_regs.h"
-
-enum {
-  /*
-   * Maximum flash address, exclusive.
-   */
-  kMaxAddress =
-      FLASH_CTRL_PARAM_BYTES_PER_BANK * FLASH_CTRL_PARAM_REG_NUM_BANKS,
-  /*
-   * The total number of flash pages.
-   */
-  kNumPages =
-      FLASH_CTRL_PARAM_REG_PAGES_PER_BANK * FLASH_CTRL_PARAM_REG_NUM_BANKS,
-
-};
-
-rom_error_t bootstrap_chip_erase(void) {
-  // Unlike ROM bootstrap, we cannot erase entire banks at a time because that
-  // would erase ROM_EXT regions as well.
-  flash_ctrl_bank_erase_perms_set(kHardenedBoolTrue);
-  rom_error_t last_err = kErrorOk;
-  for (uint32_t i = 0; i < kNumPages; ++i) {
-    const uint32_t addr = i * FLASH_CTRL_PARAM_BYTES_PER_PAGE;
-    // Do not erase this page if it lies within ROM_EXT on either slot.
-    if (addr < CHIP_ROM_EXT_SIZE_MAX ||
-        (addr >= FLASH_CTRL_PARAM_BYTES_PER_BANK &&
-         addr < FLASH_CTRL_PARAM_BYTES_PER_BANK + CHIP_ROM_EXT_SIZE_MAX)) {
-      continue;
-    }
-    rom_error_t err = flash_ctrl_data_erase(addr, kFlashCtrlEraseTypePage);
-    if (err != kErrorOk) {
-      last_err = err;
-    }
-  }
-  flash_ctrl_bank_erase_perms_set(kHardenedBoolFalse);
-  return last_err;
-}
-
-rom_error_t bootstrap_erase_verify(void) {
-  rom_error_t last_err = kErrorOk;
-  for (uint32_t i = 0; i < kNumPages; ++i) {
-    const uint32_t addr = i * FLASH_CTRL_PARAM_BYTES_PER_PAGE;
-    // Do not verify this page if it lies within ROM_EXT on either slot.
-    if (addr < CHIP_ROM_EXT_SIZE_MAX ||
-        (addr >= FLASH_CTRL_PARAM_BYTES_PER_BANK &&
-         addr < FLASH_CTRL_PARAM_BYTES_PER_BANK + CHIP_ROM_EXT_SIZE_MAX)) {
-      continue;
-    }
-    rom_error_t err =
-        flash_ctrl_data_erase_verify(addr, kFlashCtrlEraseTypePage);
-    if (err != kErrorOk) {
-      last_err = err;
-    }
-  }
-  return last_err;
-}
-
-hardened_bool_t rom_ext_bootstrap_enabled(void) {
-  // Check that bootstrap is enabled in OTP.
-  uint32_t bootstrap_en =
-      otp_read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN_OFFSET);
-  if (launder32(bootstrap_en) != kHardenedBoolTrue) {
-    return kHardenedBoolFalse;
-  }
-  HARDENED_CHECK_EQ(bootstrap_en, kHardenedBoolTrue);
-
-  // Check that the reset reason is PoR.
-  const uint32_t reset_mask = 1 << kRstmgrReasonPowerOn;
-  const uint32_t reset_reason = rstmgr_reason_get();
-  const uint32_t is_por = reset_reason & reset_mask;
-  if (launder32(is_por) == 0) {
-    return kHardenedBoolFalse;
-  }
-  HARDENED_CHECK_EQ(is_por, reset_mask);
-  return kHardenedBoolTrue;
-}
-
-rom_error_t rom_ext_bootstrap(void) {
-  hardened_bool_t enabled = rom_ext_bootstrap_enabled();
-  if (launder32(enabled) != kHardenedBoolTrue) {
-    return kErrorBootstrapDisabledRomExt;
-  }
-  HARDENED_CHECK_EQ(enabled, kHardenedBoolTrue);
-
-  enum {
-    kNumPagesInRomExt = CHIP_ROM_EXT_SIZE_MAX / FLASH_CTRL_PARAM_BYTES_PER_PAGE
-  };
-  static_assert(CHIP_ROM_EXT_SIZE_MAX % FLASH_CTRL_PARAM_BYTES_PER_PAGE == 0,
-                "ROM_EXT size must be an integer multiple of flash page size.");
-  static_assert(kNumPagesInRomExt <= FLASH_CTRL_PARAM_REG_PAGES_PER_BANK,
-                "ROM_EXT must fit within a single flash bank.");
-
-  // Read the DEFAULT_REGION register to determine default values for some
-  // fields of MP_REGION_CFG_${region}.
-  const flash_ctrl_cfg_t default_cfg = flash_ctrl_data_default_cfg_get();
-
-  // The region of slot A following the ROM_EXT region is erasable and
-  // programmable.
-  flash_ctrl_data_region_protect(
-      /*region=*/0,
-      /*page_offset=*/kNumPagesInRomExt,
-      /*num_pages=*/FLASH_CTRL_PARAM_REG_PAGES_PER_BANK - kNumPagesInRomExt,
-      (flash_ctrl_perms_t){
-          .read = kMultiBitBool4True,
-          .write = kMultiBitBool4True,
-          .erase = kMultiBitBool4True,
-      },
-      default_cfg);
-
-  // The region of slot B following the ROM_EXT region is erasable, but not
-  // programmable.
-  flash_ctrl_data_region_protect(
-      /*region=*/1,
-      /*page_offset=*/FLASH_CTRL_PARAM_REG_PAGES_PER_BANK + kNumPagesInRomExt,
-      /*num_pages=*/FLASH_CTRL_PARAM_REG_PAGES_PER_BANK - kNumPagesInRomExt,
-      (flash_ctrl_perms_t){
-          .read = kMultiBitBool4True,
-          .write = kMultiBitBool4False,
-          .erase = kMultiBitBool4True,
-      },
-      default_cfg);
-
-  // With the lowest priority, disable programming and erasing the flash.
-  flash_ctrl_data_region_protect(
-      /*region=*/2,
-      /*page_offset=*/0,
-      /*num_pages=*/FLASH_CTRL_PARAM_REG_PAGES_PER_BANK *
-          FLASH_CTRL_PARAM_REG_NUM_BANKS,
-      (flash_ctrl_perms_t){
-          .read = kMultiBitBool4True,
-          .write = kMultiBitBool4False,
-          .erase = kMultiBitBool4False,
-      },
-      default_cfg);
-
-  return enter_bootstrap();
-}
diff --git a/sw/device/silicon_creator/rom_ext/bootstrap.h b/sw/device/silicon_creator/rom_ext/bootstrap.h
deleted file mode 100644
index d2c16eb5c8c6a..0000000000000
--- a/sw/device/silicon_creator/rom_ext/bootstrap.h
+++ /dev/null
@@ -1,62 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_BOOTSTRAP_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_BOOTSTRAP_H_
-
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/lib/error.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * Checks whether recovery is enabled.
- *
- * Returns `kHardenedBoolTrue` iff recovery is enabled in OTP and the reset
- * reason is power on reset. Otherwise, it returns `kHardenedBoolFalse`.
- *
- * @return Whether recovery may proceed.
- */
-OT_WARN_UNUSED_RESULT
-hardened_bool_t rom_ext_bootstrap_enabled(void);
-
-/**
- * Bootstraps the data partition of the embedded flash with data received by the
- * spi_device. This function will never erase or reprogram ROM_EXT's flash
- * regions in slot A or slot B.
- *
- * OpenTitan's ROM_EXT bootstrap uses the typical SPI flash EEPROM commands. A
- * typical bootstrap session involves:
- * - Asserting bootstrap pins to enter bootstrap mode,
- * - Erasing the chip (WREN, CHIP_ERASE, busy loop ...),
- * - Programming the chip (WREN, PAGE_PROGRAM, busy loop ...), and
- * - Resetting the chip (RESET).
- *
- * This function configures flash memory protection to control which operations
- * can be performed on individual regions, e.g. the ROM_EXT in slot A should be
- * non-erasable and non-programmable. In more detail:
- *
- *   | Flash Region     | Erasable | Programmable |
- *   |------------------|----------|--------------|
- *   | Slot A ROM_EXT   | No       | No           |
- *   | Slot A remainder | Yes      | Yes          |
- *   | Slot B ROM_EXT   | No       | No           |
- *   | Slot B remainder | Yes      | No           |
- *
- * This function only returns on error since a successful bootstrap ends with a
- * chip reset.
- *
- * @return The error that caused recovery to fail.
- */
-OT_WARN_UNUSED_RESULT
-rom_error_t rom_ext_bootstrap(void);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_BOOTSTRAP_H_
diff --git a/sw/device/silicon_creator/rom_ext/bootstrap_fuzz_test.cc b/sw/device/silicon_creator/rom_ext/bootstrap_fuzz_test.cc
deleted file mode 100644
index 9823f5fe1077b..0000000000000
--- a/sw/device/silicon_creator/rom_ext/bootstrap_fuzz_test.cc
+++ /dev/null
@@ -1,45 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include <stddef.h>
-#include <utility>
-
-#include "absl/types/span.h"
-#include "sw/device/silicon_creator/lib/bootstrap_fuzzer_util.h"
-#include "sw/device/silicon_creator/rom_ext/bootstrap.h"
-
-#include "hw/ip/otp_ctrl/data/otp_ctrl_regs.h"
-
-namespace {
-using bootstrap_fuzzer::AbstractBootstrapMockGroup;
-using bootstrap_fuzzer::StreamParser;
-
-class RomExtMockGroup : public AbstractBootstrapMockGroup {
- public:
-  RomExtMockGroup(StreamParser stream, bool verbose)
-      : AbstractBootstrapMockGroup(std::move(stream), verbose) {}
-
-  void ConfigureMocks() override {
-    AbstractBootstrapMockGroup::ConfigureMocks();
-
-    ON_CALL(otp_,
-            read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN_OFFSET))
-        .WillByDefault(::testing::Return(stream_.ParseIntOr<hardened_bool_t>(
-            "bootstrap_enabled", kHardenedBoolFalse)));
-  }
-};
-}  // namespace
-
-extern "C" int LLVMFuzzerTestOneInput(const uint8_t *data, size_t size) {
-  static bootstrap_fuzzer::StaticFuzzerEnvironment static_fuzzer_env;
-
-  constexpr bool kVerbose = false;
-  StreamParser stream(absl::MakeConstSpan(data, size), kVerbose);
-  RomExtMockGroup mock_group(std::move(stream), kVerbose);
-  mock_group.ConfigureMocks();
-
-  (void)rom_ext_bootstrap();
-
-  return 0;  // Values other than 0 and -1 are reserved for future use.
-}
diff --git a/sw/device/silicon_creator/rom_ext/bootstrap_unittest.cc b/sw/device/silicon_creator/rom_ext/bootstrap_unittest.cc
deleted file mode 100644
index 09ebced0de74d..0000000000000
--- a/sw/device/silicon_creator/rom_ext/bootstrap_unittest.cc
+++ /dev/null
@@ -1,744 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/rom_ext/bootstrap.h"
-
-#include <stdint.h>
-#include <vector>
-
-#include "absl/types/optional.h"
-#include "absl/types/span.h"
-#include "gtest/gtest.h"
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/silicon_creator/lib/base/chip.h"
-#include "sw/device/silicon_creator/lib/bootstrap.h"
-#include "sw/device/silicon_creator/lib/bootstrap_unittest_util.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_otp.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_rstmgr.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_spi_device.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/error_unittest_util.h"
-#include "sw/device/silicon_creator/testing/rom_test.h"
-
-#include "flash_ctrl_regs.h"
-#include "hw/ip/otp_ctrl/data/otp_ctrl_regs.h"
-
-// Custom equality operator for `flash_ctrl_cfg_t`. This must be defined outside
-// the test's namespace for GTest to find it.
-bool operator==(const flash_ctrl_cfg_t a, const flash_ctrl_cfg_t b) {
-  return memcmp(&a, &b, sizeof(a)) == 0;
-}
-
-namespace rom_ext_bootstrap_unittest {
-namespace {
-
-using ::testing::_;
-using ::testing::AtLeast;
-using ::testing::Each;
-using ::testing::Eq;
-using ::testing::Return;
-
-using bootstrap_unittest_util::ChipEraseCmd;
-using bootstrap_unittest_util::PageProgramCmd;
-using bootstrap_unittest_util::ResetCmd;
-using bootstrap_unittest_util::SectorEraseCmd;
-
-constexpr size_t kNumFlashCtrlMpRegions = 8;
-
-/**
- * A collection of functions for simulating flash_ctrl operations on a chunk
- * of host memory.
- */
-class FlashCtrlSim {
- private:
-  // This struct defines the protection configuration for a single region.
-  struct MpRegion {
-    size_t page_offset = 0;
-    size_t num_pages = 0;
-    bool read_enabled = false;
-    bool prog_enabled = false;
-    bool erase_enabled = false;
-    bool enabled = false;
-  };
-
- public:
-  // A human-readable byte value that represents the last operation performed on
-  // an address in the simulated flash. This is intentionally written as a
-  // regular enum rather than an enum class so implicit conversions and type
-  // inferences on `Span<char>` work automatically.
-  enum FlashByte : char {
-    kDefault = 'd',
-    kErased = 'e',
-    kErasedVerified = 'v',
-  };
-
-  FlashCtrlSim() : memory_(flash_size(), FlashByte::kDefault) {}
-
-  void BankErasePermsSet(hardened_bool_t enable) {
-    bank_erase_perms_ = enable == kHardenedBoolTrue;
-  }
-
-  rom_error_t DataRegionProtect(flash_ctrl_region_index_t region,
-                                uint32_t page_offset, uint32_t num_pages,
-                                flash_ctrl_perms_t perms,
-                                flash_ctrl_cfg_t cfg) {
-    EXPECT_LT(region, kNumFlashCtrlMpRegions);
-    EXPECT_LT(page_offset, FlashCtrlSim::num_pages());
-    mp_regions_[region] = MpRegion{
-        .page_offset = page_offset,
-        .num_pages = num_pages,
-        .read_enabled = perms.read == kMultiBitBool4True,
-        .prog_enabled = perms.write == kMultiBitBool4True,
-        .erase_enabled = perms.erase == kMultiBitBool4True,
-        .enabled = true,
-    };
-    return kErrorOk;
-  }
-
-  rom_error_t DataErase(uint32_t addr, flash_ctrl_erase_type_t erase_type) {
-    using ::testing::Eq;
-
-    absl::Span<char> region;
-    switch (erase_type) {
-      case kFlashCtrlEraseTypeBank: {
-        EXPECT_EQ(addr % bank_size(), 0);
-        for (size_t i = 0; i < num_pages(); ++i) {
-          uint32_t page_addr = addr + i * page_size();
-          if (!ErasePageOk(page_addr)) {
-            return kErrorFlashCtrlDataErase;
-          }
-        }
-        region = GetFlash().subspan(addr, bank_size());
-        break;
-      }
-      case kFlashCtrlEraseTypePage: {
-        EXPECT_EQ(addr % page_size(), 0);
-        if (!ErasePageOk(addr)) {
-          return kErrorFlashCtrlDataErase;
-        }
-        region = GetFlash().subspan(addr, page_size());
-        break;
-      }
-      default:
-        ADD_FAILURE() << "DataErase is only implemented for banks and pages";
-        return kErrorUnknown;
-    }
-
-    EXPECT_THAT(region, Each(Eq(FlashByte::kDefault)))
-        << "DataErase should only see memory that hasn't been touched yet";
-    memset(region.data(), FlashByte::kErased, region.size());
-
-    return kErrorOk;
-  }
-
-  rom_error_t DataEraseVerify(uint32_t addr,
-                              flash_ctrl_erase_type_t erase_type) {
-    using ::testing::Eq;
-
-    absl::Span<char> region;
-    switch (erase_type) {
-      case kFlashCtrlEraseTypeBank: {
-        EXPECT_EQ(addr % bank_size(), 0);
-        for (size_t i = 0; i < num_pages(); ++i) {
-          uint32_t page_addr = addr + i * page_size();
-          if (!ReadPageOk(page_addr)) {
-            return kErrorFlashCtrlDataEraseVerify;
-          }
-        }
-        region = GetFlash().subspan(addr, bank_size());
-        break;
-      }
-      case kFlashCtrlEraseTypePage: {
-        EXPECT_EQ(addr % page_size(), 0);
-        region = GetFlash().subspan(addr, page_size());
-        break;
-      }
-      default:
-        ADD_FAILURE()
-            << "DataEraseVerify is only implemented for banks and pages";
-        return kErrorUnknown;
-    }
-
-    EXPECT_THAT(region, Each(Eq(FlashByte::kErased)))
-        << "DataEraseVerify should only encounter that is already erased";
-    memset(region.data(), FlashByte::kErasedVerified, region.size());
-    return kErrorOk;
-  }
-
-  rom_error_t DataWrite(uint32_t addr, uint32_t word_count, const void *data) {
-    if (!WritePageOk(addr)) {
-      return kErrorFlashCtrlDataWrite;
-    }
-
-    const size_t num_bytes = word_count * sizeof(uint32_t);
-    absl::Span<char> region = GetFlash().subspan(addr, num_bytes);
-    EXPECT_EQ(region.size(), num_bytes);
-    memcpy(region.data(), data, region.size());
-    return kErrorOk;
-  }
-
-  static constexpr size_t flash_size() { return num_banks() * bank_size(); }
-
-  absl::Span<char> GetFlash() { return absl::MakeSpan(memory_); }
-  absl::Span<char> GetSlotA() { return GetFlash().subspan(0, bank_size()); }
-  absl::Span<char> GetSlotB() { return GetFlash().subspan(bank_size()); }
-
-  absl::Span<char> GetRomExtSlotA() {
-    return GetSlotA().subspan(0, rom_ext_size());
-  }
-
-  absl::Span<char> GetRomExtSlotB() {
-    return GetSlotB().subspan(0, rom_ext_size());
-  }
-
- private:
-  static constexpr size_t num_banks() { return FLASH_CTRL_PARAM_REG_NUM_BANKS; }
-  static constexpr size_t bank_size() {
-    return FLASH_CTRL_PARAM_BYTES_PER_BANK;
-  }
-  static constexpr size_t page_size() {
-    return FLASH_CTRL_PARAM_BYTES_PER_PAGE;
-  }
-  static constexpr size_t num_pages() {
-    constexpr size_t kFlashSize = bank_size() * num_banks();
-    static_assert(kFlashSize % page_size() == 0,
-                  "Flash size must be divisible by page size");
-    return kFlashSize / page_size();
-  }
-  static constexpr size_t rom_ext_size() { return CHIP_ROM_EXT_SIZE_MAX; }
-
-  // Finds the first enabled region that covers the given address. If no regions
-  // cover the address, returns `absl::nullopt`.
-  absl::optional<MpRegion> FindMpRegion(uint32_t addr) const {
-    const size_t page = addr / page_size();
-    for (const MpRegion &region : mp_regions_) {
-      if (region.enabled && region.page_offset <= page &&
-          page < region.page_offset + region.num_pages) {
-        return region;
-      }
-    }
-    return absl::nullopt;
-  }
-  // Returns true iff memory protection rules allow this address to be erased.
-  // If there is no matching rule, it returns the last flash-wide
-  // erasability configured with `flash_ctrl_bank_erase_perms_set()`.
-  bool ErasePageOk(uint32_t addr) const {
-    absl::optional<MpRegion> region = FindMpRegion(addr);
-    return region ? region->erase_enabled : bank_erase_perms_;
-  }
-  // Returns true iff memory protection rules allow this address to be read.
-  // If there is no matching rule, it returns the last flash-wide
-  // readability configured with `flash_ctrl_bank_erase_perms_set()`.
-  bool ReadPageOk(uint32_t addr) const {
-    absl::optional<MpRegion> region = FindMpRegion(addr);
-    return region ? region->read_enabled : bank_erase_perms_;
-  }
-  // Returns true iff memory protection rules allow programming pages at this
-  // address. Otherwise, returns false.
-  bool WritePageOk(uint32_t addr) const {
-    absl::optional<MpRegion> region = FindMpRegion(addr);
-    return region ? region->prog_enabled : false;
-  }
-
-  bool bank_erase_perms_ = false;
-
-  MpRegion mp_regions_[kNumFlashCtrlMpRegions]{};
-
-  std::vector<char> memory_;
-};
-
-/**
- * A test fixture with convenience methods for setting expectations related to
- * ROM_EXT bootstrap.
- */
-class RomExtBootstrapTest : public bootstrap_unittest_util::BootstrapTest {
- protected:
-  /**
-   * Sets an expectation that `otp_read32()` will be called with the address
-   * of ROM_EXT_BOOTSTRAP_EN.
-   *
-   * @param value The value to return from the mocked `otp_read32()`.
-   */
-  void SetRomExtBootstrapEnabledInOtp(uint32_t value) {
-    EXPECT_CALL(otp_,
-                read32(OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_EXT_BOOTSTRAP_EN_OFFSET))
-        .WillOnce(Return(value));
-  }
-
-  /**
-   * Sets an expectation that `rstmgr_reason_get()` will be called.
-   *
-   * @param value The value to return from the mocked `rstmgr_reason_get()`.
-   */
-  void SetResetReason(uint32_t value) {
-    EXPECT_CALL(rstmgr_, ReasonGet()).WillOnce(Return(value));
-  }
-
-  /**
-   * Delegates some flash_ctrl operations to `FlashCtrlSim`. This enables tests
-   * to write expectations in terms of the contents of flash.
-   */
-  void DelegateToFlashCtrlSim() {
-    using ::testing::_;
-
-    ON_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, _))
-        .WillByDefault([&](flash_ctrl_region_index_t region,
-                           uint32_t page_offset, uint32_t num_pages,
-                           flash_ctrl_perms_t perms, flash_ctrl_cfg_t cfg) {
-          return flash_ctrl_sim_.DataRegionProtect(region, page_offset,
-                                                   num_pages, perms, cfg);
-        });
-    ON_CALL(flash_ctrl_, BankErasePermsSet(_))
-        .WillByDefault([&](hardened_bool_t enable) {
-          return flash_ctrl_sim_.BankErasePermsSet(enable);
-        });
-    ON_CALL(flash_ctrl_, DataErase(_, _))
-        .WillByDefault([&](uint32_t addr, flash_ctrl_erase_type_t type) {
-          return flash_ctrl_sim_.DataErase(addr, type);
-        });
-    ON_CALL(flash_ctrl_, DataEraseVerify(_, _))
-        .WillByDefault([&](uint32_t addr, flash_ctrl_erase_type_t type) {
-          return flash_ctrl_sim_.DataEraseVerify(addr, type);
-        });
-    ON_CALL(flash_ctrl_, DataWrite(_, _, _))
-        .WillByDefault(
-            [&](uint32_t addr, uint32_t word_count, const void *data) {
-              return flash_ctrl_sim_.DataWrite(addr, word_count, data);
-            });
-  }
-
-  void ExpectRomExtSlotA(FlashCtrlSim::FlashByte byte) {
-    const absl::Span<char> rom_ext_slot_a = flash_ctrl_sim_.GetRomExtSlotA();
-    EXPECT_FALSE(rom_ext_slot_a.empty());
-    EXPECT_THAT(rom_ext_slot_a, Each(Eq(byte)));
-  }
-
-  void ExpectRomExtSlotB(FlashCtrlSim::FlashByte byte) {
-    const absl::Span<char> rom_ext_slot_b = flash_ctrl_sim_.GetRomExtSlotB();
-    EXPECT_FALSE(rom_ext_slot_b.empty());
-    EXPECT_THAT(rom_ext_slot_b, Each(Eq(byte)));
-  }
-
-  void ExpectSuffixSlotA(FlashCtrlSim::FlashByte byte) {
-    const absl::Span<char> slot_a_suffix = flash_ctrl_sim_.GetSlotA().subspan(
-        flash_ctrl_sim_.GetRomExtSlotA().size());
-    EXPECT_FALSE(slot_a_suffix.empty());
-    EXPECT_THAT(slot_a_suffix, Each(Eq(byte)));
-  }
-
-  void ExpectSuffixSlotB(FlashCtrlSim::FlashByte byte) {
-    const absl::Span<char> slot_b_suffix = flash_ctrl_sim_.GetSlotB().subspan(
-        flash_ctrl_sim_.GetRomExtSlotB().size());
-    EXPECT_THAT(slot_b_suffix, Each(Eq(byte)));
-  }
-
-  FlashCtrlSim flash_ctrl_sim_;
-
-  const flash_ctrl_cfg_t kFlashCtrlCfg = {
-      .scrambling = kMultiBitBool4True,
-      .ecc = kMultiBitBool4True,
-      .he = kMultiBitBool4True,
-  };
-};
-
-// ROM_EXT bootstrap is disabled when the OTP value is `kHardenedBoolFalse`.
-TEST_F(RomExtBootstrapTest, BootstrapDisabledByOtp) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolFalse);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolFalse);
-}
-
-// Bootstrap is disabled when the OTP value is an invalid hardened bool.
-TEST_F(RomExtBootstrapTest, BootstrapDisabledByOtpGlitch) {
-  constexpr hardened_bool_t kHardenedBoolMiddle =
-      static_cast<hardened_bool_t>(kHardenedBoolFalse + 1);
-  static_assert(kHardenedBoolMiddle != kHardenedBoolTrue &&
-                    kHardenedBoolMiddle != kHardenedBoolFalse,
-                "kHardenedBoolMiddle should be invalid");
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolMiddle);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolFalse);
-}
-
-// Bootstrap is disabled when the OTP value is `kHardenedBoolTrue` and the reset
-// reason is zero.
-TEST_F(RomExtBootstrapTest, BootstrapDisabledByResetReasonZero) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(0);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolFalse);
-}
-
-// Bootstrap is disabled when the OTP value is hardened true, but the reset
-// reason is something other than PoR.
-TEST_F(RomExtBootstrapTest, BootstrapDisabledByResetReasonLowPowerExit) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonLowPowerExit);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolFalse);
-}
-
-// Bootstrap is enabled when the OTP value is hardened true and the reset reason
-// is PoR.
-TEST_F(RomExtBootstrapTest, BootstrapEnabledByResetReasonPor) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolTrue);
-}
-
-// Bootstrap is enabled when the OTP value is hardened true and the reset reason
-// contains PoR and other values.
-TEST_F(RomExtBootstrapTest, BootstrapEnabledByResetReasonPorEtc) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-  EXPECT_EQ(rom_ext_bootstrap_enabled(), kHardenedBoolTrue);
-}
-
-// Verify that `rom_ext_bootstrap()` fails with the appropriate status when
-// bootstrap is disabled in OTP.
-TEST_F(RomExtBootstrapTest, BootstrapDisabled) {
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolFalse);
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorBootstrapDisabledRomExt);
-}
-
-// A minimal ROM_EXT bootstrap session erases both flash slots except for the
-// ROM_EXT region in each slot.
-TEST_F(RomExtBootstrapTest, BootstrapEnabledSimple) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(ResetCmd());
-  EXPECT_CALL(rstmgr_, Reset());
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  // Host-specific behavior causes bootstrap to return `kErrorUnknown` on RESET.
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorUnknown);
-
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-// ROM_EXT bootstrap ignores every non-erase command it receives until it has
-// performed a chip erase.
-TEST_F(RomExtBootstrapTest, BootstrapEnabledJunkBeforeEraseCmd) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-
-  // Non-erase command PAGE_PROGRAM is ignored.
-  ExpectSpiCmd(PageProgramCmd(0x0, 123));
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // Non-erase command RESET is ignored.
-  ExpectSpiCmd(ResetCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // CHIP_ERASE command kicks off the bootstrap procedure.
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(ResetCmd());
-  EXPECT_CALL(rstmgr_, Reset());
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  // Host-specific behavior causes bootstrap to return `kErrorUnknown` on RESET.
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorUnknown);
-
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-// Bootstrap refuses to act on SECTOR_ERASE commands that would erase part of
-// ROM_EXT in slot A.
-TEST_F(RomExtBootstrapTest, BootstrapProtectsRomExtWithSectorEraseInSlotA) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-
-  // CHIP_ERASE command kicks off the bootstrap procedure.
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(SectorEraseCmd(0x0));
-  ExpectSpiFlashStatusGet(true);
-  ExpectFlashCtrlEraseEnable();
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(2);
-  ExpectFlashCtrlAllDisable();
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorFlashCtrlDataErase);
-
-  // The ROM_EXT region in slot A should have been untouched by initial chip
-  // erase. Later, during the programming loop, the SECTOR_ERASE command should
-  // have been caught by the memory protection rules.
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-// Bootstrap refuses to act on SECTOR_ERASE commands that would erase any part
-// of ROM_EXT in slot B.
-TEST_F(RomExtBootstrapTest, BootstrapProtectsRomExtWithSectorEraseInSlotB) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-
-  // CHIP_ERASE command kicks off the bootstrap procedure.
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(SectorEraseCmd(FLASH_CTRL_PARAM_BYTES_PER_BANK +
-                              CHIP_ROM_EXT_SIZE_MAX / 2));
-  ExpectSpiFlashStatusGet(true);
-  ExpectFlashCtrlEraseEnable();
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(2);
-  ExpectFlashCtrlAllDisable();
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  // Host-specific behavior causes bootstrap to return `kErrorUnknown` on RESET.
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorFlashCtrlDataErase);
-
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-
-  // The ROM_EXT region in slot B should have been untouched by initial chip
-  // erase. Later, during the programming loop, the SECTOR_ERASE command should
-  // have been caught by the memory protection rules rather than erasing two
-  // pages in the middle of the ROM_EXT.
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-// Bootstrap refuses to act on PAGE_PROGRAM commands that would overwrite any
-// part of ROM_EXT in slot A.
-TEST_F(RomExtBootstrapTest, BootstrapProtectsRomExtWithPageProgramInSlotA) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(PageProgramCmd(CHIP_ROM_EXT_SIZE_MAX / 2, 16));
-  ExpectSpiFlashStatusGet(true);
-  ExpectFlashCtrlWriteEnable();
-  EXPECT_CALL(flash_ctrl_, DataWrite(testing::_, 4, testing::_));
-  ExpectFlashCtrlAllDisable();
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  // Host-specific behavior causes bootstrap to return `kErrorUnknown` on RESET.
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorFlashCtrlDataWrite);
-
-  // The ROM_EXT region in slot A should have been untouched by initial chip
-  // erase. Later, during the programming loop, the PAGE_PROGRAM command should
-  // have been caught by the memory protection rules rather than erasing 16
-  // words in the middle of the ROM_EXT.
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-// Bootstrap refuses to act on PAGE_PROGRAM commands that would overwrite any
-// part of ROM_EXT in slot B.
-TEST_F(RomExtBootstrapTest, BootstrapProtectsRomExtWithPageProgramInSlotB) {
-  using FlashByte = FlashCtrlSim::FlashByte;
-
-  // This test will forward calls to flash_ctrl functions to
-  // `flash_ctrl_sim_`, enabling us to set expectations in terms of the
-  // contents of the flash.
-  DelegateToFlashCtrlSim();
-
-  SetRomExtBootstrapEnabledInOtp(kHardenedBoolTrue);
-  SetResetReason(1 << kRstmgrReasonPowerOn | 1 << kRstmgrReasonSoftwareRequest);
-
-  EXPECT_CALL(flash_ctrl_, DataDefaultCfgGet()).WillOnce(Return(kFlashCtrlCfg));
-
-  EXPECT_CALL(flash_ctrl_, DataRegionProtect(_, _, _, _, kFlashCtrlCfg))
-      .Times(3);
-
-  EXPECT_CALL(spi_device_, Init());
-
-  // bootstrap_handle_erase
-  ExpectSpiCmd(ChipEraseCmd());
-  ExpectSpiFlashStatusGet(true);
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolTrue));
-  EXPECT_CALL(flash_ctrl_, DataErase(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(flash_ctrl_, BankErasePermsSet(kHardenedBoolFalse));
-
-  // bootstrap_handle_erase_verify
-  EXPECT_CALL(flash_ctrl_, DataEraseVerify(testing::_, kFlashCtrlEraseTypePage))
-      .Times(AtLeast(1));
-  EXPECT_CALL(spi_device_, FlashStatusClear());
-
-  // bootstrap_handle_program
-  ExpectSpiCmd(PageProgramCmd(FLASH_CTRL_PARAM_BYTES_PER_BANK, 16));
-  ExpectSpiFlashStatusGet(true);
-  ExpectFlashCtrlWriteEnable();
-  EXPECT_CALL(flash_ctrl_, DataWrite(testing::_, 4, testing::_));
-  ExpectFlashCtrlAllDisable();
-
-  EXPECT_THAT(flash_ctrl_sim_.GetFlash(), Each(Eq(FlashByte::kDefault)))
-      << "Before rom_ext_bootstrap(), flash should be unmodified.";
-
-  // Host-specific behavior causes bootstrap to return `kErrorUnknown` on RESET.
-  EXPECT_EQ(rom_ext_bootstrap(), kErrorFlashCtrlDataWrite);
-
-  // The ROM_EXT region in slot B should have been untouched by initial chip
-  // erase. Later, during the programming loop, the PAGE_PROGRAM command should
-  // have been caught by the memory protection rules rather than erasing 16
-  // words at the front of the ROM_EXT.
-  ExpectRomExtSlotA(FlashByte::kDefault);
-  ExpectSuffixSlotA(FlashByte::kErasedVerified);
-  ExpectRomExtSlotB(FlashByte::kDefault);
-  ExpectSuffixSlotB(FlashByte::kErasedVerified);
-}
-
-}  // namespace
-}  // namespace rom_ext_bootstrap_unittest
diff --git a/sw/device/silicon_creator/rom_ext/data/rom_ext_e2e_testplan.hjson b/sw/device/silicon_creator/rom_ext/data/rom_ext_e2e_testplan.hjson
index 483cf6ca71a9b..d5569156efd95 100644
--- a/sw/device/silicon_creator/rom_ext/data/rom_ext_e2e_testplan.hjson
+++ b/sw/device/silicon_creator/rom_ext/data/rom_ext_e2e_testplan.hjson
@@ -12,7 +12,7 @@
       Component:RomExt/E2e/Test
     ]
     project: OpenTitan
-    milestone: "Earlgrey ES ROM_EXT"
+    milestone: Earlgrey-PROD.ROM_EXT
     priority: P1
   }
   testpoints:
@@ -216,7 +216,6 @@
         url: https://github.com/lowRISC/opentitan/issues/20247
       }
     }
-
     {
       name: rom_ext_e2e_transfer_any_test
       desc:
@@ -236,6 +235,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24465
+      }
     }
     {
       name: rom_ext_e2e_bad_unlock_test
@@ -254,6 +257,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24466
+      }
     }
     {
       name: rom_ext_e2e_bad_activate_test
@@ -274,6 +281,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24467
+      }
     }
     {
       name: rom_ext_e2e_bad_owner_block_test
@@ -294,6 +305,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24468
+      }
     }
     {
       name: rom_ext_e2e_bad_app_key_test
@@ -314,6 +329,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24469
+      }
     }
     {
       name: rom_ext_e2e_transfer_endorsed_test
@@ -334,6 +353,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24470
+      }
     }
     {
       name: rom_ext_e2e_bad_endorsee_test
@@ -354,6 +377,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24471
+      }
     }
     {
       name: rom_ext_e2e_locked_update_test
@@ -362,7 +389,7 @@
         Verify that ROM_EXT accepts an owner configuration update.
 
         - Start in an locked & owned state with the `fake` owner as owner.
-        - Unlock the chip into the LockedUpdate state using the `fake` owner unlock key.
+        - Unlock the chip into the UnlockedSelf state using the `fake` owner unlock key.
         - Upload an new owner block using the `fake` owner key (ie: embed the `dummy` app key in the `fake` owner block).
         - Activate ownership with the `fake` activate key.
         - Confirm code execution with the `dummy` owner application key.
@@ -374,6 +401,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24472
+      }
     }
     {
       name: rom_ext_e2e_bad_locked_update_test
@@ -382,7 +413,7 @@
         Verify that ROM_EXT rejects an owner configuration update.
 
         - Start in an locked & owned state with the `fake` owner as owner.
-        - Unlock the chip into the LockedUpdate state using the `fake` owner unlock key.
+        - Unlock the chip into the UnlockedSelf state using the `fake` owner unlock key.
         - Upload an new owner block using the wrong owner key (ie: use the `dummy` owner and app key).
         - Activate ownership with the `fake` activate key.
         - Confirm the activate is rejected with an `OwnershipInvalidInfoPage` error.
@@ -395,6 +426,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24473
+      }
     }
     {
       name: rom_ext_e2e_rescue_limit_test
@@ -416,6 +451,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24474
+      }
     }
     {
       name: rom_ext_e2e_rescue_permission_test
@@ -437,6 +476,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24475
+      }
     }
     {
       name: rom_ext_e2e_flash_permission_test
@@ -450,10 +493,10 @@
           The new flash configuration should have a different scrambling or ECC configuration than the current configuration.
         - Boot owner firmware and examine the flash controller's region configuration registers.
         - Confirm that in the intermediate "dual-owner" state, the primary half of the flash is configured for the previous owner and the secondary half is configured for the next owner.
-          Confirm that the `protect_when_primary` condition does not apply during the dual-owner state.
+          Confirm that the `protect_when_active` condition does not apply during the dual-owner state.
         - Activate ownership with the `dummy` activate key.
         - Use the rescue protocol to upload owner firmware into the newly-configured flash regions.
-        - Confirm that in the owned state, the entire flash is configured for the new owner and that the `protect_when_primary` condition removes erase/program permissions appropriately.
+        - Confirm that in the owned state, the entire flash is configured for the new owner and that the `protect_when_active` condition removes erase/program permissions appropriately.
         '''
       tags:
       [
@@ -462,6 +505,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24476
+      }
     }
     {
       name: rom_ext_e2e_info_permission_test
@@ -482,7 +529,10 @@
       ]
       stage: V3
       tests: []
+      github:
+      {
+        url: https://github.com/lowRISC/opentitan/issues/24477
+      }
     }
-
   ]
 }
diff --git a/sw/device/silicon_creator/rom_ext/defs.bzl b/sw/device/silicon_creator/rom_ext/defs.bzl
index 464c57ea73bca..2a8a2ecc54623 100644
--- a/sw/device/silicon_creator/rom_ext/defs.bzl
+++ b/sw/device/silicon_creator/rom_ext/defs.bzl
@@ -2,11 +2,268 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+def secver_write_selection():
+    """Return the secver_write value based on the configuration setting."""
+    return select({
+        "//sw/device/silicon_creator/rom_ext:secver_write_true": "true",
+        "//conditions:default": "false",
+    })
+
 # The ROM_EXT version number to encode into the manifest.
 # NOTE: the version numbers are integers, but have to be encoded as strings
 # because of how the bazel rule accepts attributes.
 ROM_EXT_VERSION = struct(
     MAJOR = "0",
-    MINOR = "1",
+    MINOR = "116",
     SECURITY = "0",
 )
+
+ROM_EXT_VARIATIONS = {
+    "dice_x509": [
+        "//sw/device/silicon_creator/lib/cert:dice",
+    ],
+    "dice_cwt": [
+        "//sw/device/silicon_creator/lib/cert:dice_cwt",
+    ],
+}
+
+SLOTS = [
+    "a",
+    "b",
+    "virtual",
+]
+
+TEST_OWNER_CONFIGS = {
+    "boot_svc_after_wakeup": {
+        "owner_defines": ["TEST_OWNER_BOOT_SVC_AFTER_WAKEUP=kHardenedBoolTrue"],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "hybrid_owner_keys": {
+        # Enable hybrid ECDSA/SPX+ ownership.
+        "owner_defines": ["TEST_OWNER_KEY_ALG_HYBRID_SPX_PURE=1"],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "hybrid_owner_update_newversion": {
+        # Enable hybrid ECDSA/SPX+ ownership.
+        "owner_defines": [
+            "TEST_OWNER_UPDATE_MODE=kOwnershipUpdateModeNewVersion",
+            "TEST_OWNER_KEY_ALG_HYBRID_SPX_PREHASH=1",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "spx_pure_owner_keys": {
+        # Enable SPX+ ownership.
+        "owner_defines": ["TEST_OWNER_KEY_ALG_SPX_PURE=1"],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "corrupted_owner_key_alg": {
+        # Overwrite the ownership_key_alg to 0x0.
+        "owner_defines": ["TEST_OWNER_KEY_ALG_CORRUPTED=1"],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "default_ownership_state_recovery": {
+        "owner_defines": [
+            "TEST_OWNER_UPDATE_MODE=kOwnershipUpdateModeNewVersion",
+            "TEST_OWNERSHIP_STATE=kOwnershipStateRecovery",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "default_ownership_state_unlock_any": {
+        "owner_defines": [
+            "TEST_OWNER_UPDATE_MODE=kOwnershipUpdateModeNewVersion",
+            "TEST_OWNERSHIP_STATE=kOwnershipStateUnlockedAny",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "invalid_key_alg": {
+        "owner_defines": [
+            "TEST_OWNER_UPDATE_MODE=kOwnershipUpdateModeNewVersion",
+            "TEST_OWNER_KEY_ALG_CORRUPTED=1",
+            "TEST_OWNERSHIP_STATE=kOwnershipStateUnlockedAny",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "owner_update_newversion": {
+        # Enable the NewVersion update mode of ownership.
+        "owner_defines": ["TEST_OWNER_UPDATE_MODE=kOwnershipUpdateModeNewVersion"],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "owner_sram_exec_enabled": {
+        "owner_defines": [
+            "TEST_OWNER_SRAM_EXEC_MODE=kOwnerSramExecModeEnabled",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "owner_sram_exec_disabled": {
+        "owner_defines": [
+            "TEST_OWNER_SRAM_EXEC_MODE=kOwnerSramExecModeDisabled",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "usbdfu": {
+        # Enable USB-DFU triggered by SW_STRAPS value 3.
+        "owner_defines": [
+            # 0x55 is 'U'sb.
+            "WITH_RESCUE_PROTOCOL=0x55",
+            # Trigger 2 is strap pins combination.
+            "WITH_RESCUE_TRIGGER=2",
+            # Strapping value of 3.
+            "WITH_RESCUE_INDEX=3",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_usbdfu"],
+    },
+    "spidfu": {
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Trigger 3 is GPIO pin.
+            "WITH_RESCUE_TRIGGER=3",
+            # When the trigger is GPIO, the index is the MuxedPad to us as the sense
+            # input. Index 2 is kTopEarlgreyMuxedPadsIoa2.
+            "WITH_RESCUE_INDEX=2",
+            # GPIO param 3 means enable the internal pull resistor and trigger
+            # rescue when the GPIO is high.
+            "WITH_RESCUE_MISC_GPIO_PARAM=3",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_spidfu"],
+    },
+    "xmodem_timeout": {
+        # Enable Xmodem rescue with enter-on-fail and a timeout.
+        "owner_defines": [
+            # 0x58 is 'X'modem.
+            "WITH_RESCUE_PROTOCOL=0x58",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "xmodem_restricted_commands": {
+        # Enable Xmodem rescue with enter-on-fail and a timeout.
+        "owner_defines": [
+            # 0x58 is 'X'modem.
+            "WITH_RESCUE_PROTOCOL=0x58",
+            # Restrict rescue to only one command
+            "WITH_RESCUE_COMMAND_ALLOW=kRescueModeOpenTitanID",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "xmodem_enter_on_watchdog": {
+        # Enable Xmodem rescue with enter-on-fail and a timeout.
+        "owner_defines": [
+            # 0x58 is 'X'modem.
+            "WITH_RESCUE_PROTOCOL=0x58",
+            # misc_gpio: 0x80=enter_on_watchdog.
+            "WITH_RESCUE_MISC_GPIO_PARAM=0x80",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "spidfu_restricted_commands": {
+        # Enable USB-DFU triggered by SW_STRAPS value 3.
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Trigger 3 is GPIO pin.
+            "WITH_RESCUE_TRIGGER=3",
+            # When the trigger is GPIO, the index is the MuxedPad to us as the sense
+            # input. Index 2 is kTopEarlgreyMuxedPadsIoa2.
+            "WITH_RESCUE_INDEX=2",
+            # GPIO param 3 means enable the internal pull resistor and trigger
+            # rescue when the GPIO is high.
+            "WITH_RESCUE_MISC_GPIO_PARAM=3",
+            # Timeout: 0x80=enter_on_fail, 0x00 = No timeout.
+            "WITH_RESCUE_TIMEOUT=0x80",
+            # Restrict rescue to only one command
+            "WITH_RESCUE_COMMAND_ALLOW=kRescueModeOpenTitanID",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_spidfu"],
+    },
+    "xmodem_rescue_disability": {
+        # Enable Xmodem rescue with enter-on-fail and a timeout.
+        "owner_defines": [
+            # 0x58 is 'X'modem.
+            "WITH_RESCUE_PROTOCOL=0x58",
+            # Disallow all the rescue commands.
+            "WITH_RESCUE_COMMAND_ALLOW",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "spidfu_rescue_disability": {
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Trigger 3 is GPIO pin.
+            "WITH_RESCUE_TRIGGER=3",
+            # When the trigger is GPIO, the index is the MuxedPad to us as the sense
+            # input. Index 2 is kTopEarlgreyMuxedPadsIoa2.
+            "WITH_RESCUE_INDEX=2",
+            # GPIO param 3 means enable the internal pull resistor and trigger
+            # rescue when the GPIO is high.
+            "WITH_RESCUE_MISC_GPIO_PARAM=3",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+            # Disallow all the rescue commands.
+            "WITH_RESCUE_COMMAND_ALLOW",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_spidfu"],
+    },
+    "rescue_config_module_mismatch": {
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+        ],
+        # Set a rescue module that is not matched with the specified rescue protocol.
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+    "spidfu_rescue_boot_svc_req_disability": {
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Trigger 3 is GPIO pin.
+            "WITH_RESCUE_TRIGGER=3",
+            # When the trigger is GPIO, the index is the MuxedPad to us as the sense
+            # input. Index 2 is kTopEarlgreyMuxedPadsIoa2.
+            "WITH_RESCUE_INDEX=2",
+            # GPIO param 3 means enable the internal pull resistor and trigger
+            # rescue when the GPIO is high.
+            "WITH_RESCUE_MISC_GPIO_PARAM=3",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+            "WITH_RESCUE_COMMAND_ALLOW=kRescueModeBootSvcReq",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_spidfu"],
+    },
+    "spidfu_flash_limit_zero": {
+        "owner_defines": [
+            # 0x53 is 'S'pi.
+            "WITH_RESCUE_PROTOCOL=0x53",
+            # Trigger 3 is GPIO pin.
+            "WITH_RESCUE_TRIGGER=3",
+            # When the trigger is GPIO, the index is the MuxedPad to us as the sense
+            # input. Index 2 is kTopEarlgreyMuxedPadsIoa2.
+            "WITH_RESCUE_INDEX=2",
+            # GPIO param 3 means enable the internal pull resistor and trigger
+            # rescue when the GPIO is high.
+            "WITH_RESCUE_MISC_GPIO_PARAM=3",
+            # Timeout: 0x80=enter_on_fail, 0x05 = 5 seconds.
+            "WITH_RESCUE_TIMEOUT=0x85",
+            # Set rescue start and size to 0 to test writing past the end of the flash.
+            "WITH_RESCUE_START=0",
+            "WITH_RESCUE_SIZE=0",
+            # Disable the owner block check in test_owner.c so that the rescue start addr can be 0.
+            "TEST_OWNER_DISABLE_OWNER_BLOCK_CHECK=1",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_spidfu"],
+    },
+    "isfb": {
+        "owner_defines": [
+            "WITH_ISFB=1",
+        ],
+        "rescue_module": ["//sw/device/silicon_creator/lib/rescue:rescue_xmodem"],
+    },
+}
diff --git a/sw/device/silicon_creator/rom_ext/doc/ownership.md b/sw/device/silicon_creator/rom_ext/doc/ownership.md
new file mode 100644
index 0000000000000..90e226baaf9f1
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/doc/ownership.md
@@ -0,0 +1,860 @@
+# OpenTitan Ownership Transfer
+
+> [!NOTE]
+> This document is a draft.
+
+## Introduction
+
+This document discusses the OpenTitan Ownership Transfer protocol, including the commands, operations, data and data structures needed for ownership transfer.
+Ownership Transfer allows the owner of the chip to securely root an OpenTitan chip to their own public key infrastructure and to transfer the chip to a new owner when they no longer want or need to be the owner of the chip (e.g. reselling used equipment or transferring equipment among different security domains within the same organization).
+
+### Definitions
+
+- Owner Configuration: a data structure encoding the ownership information for a given owner.
+  The owner configuration includes an owner key, one or more application keys and various owner configuration data.
+- Owner Key: an ECDSA P-256 public/private key-pair used to authenticate the ownership block.
+- Activate Key: an ECDSA P-256 public/private key-pair used to authenticate an Activate Owner command.
+  This key is endorsed by the Owner key by virtue of being present in the owner configuration.
+- Unlock Key: an ECDSA P-256 public/private key-pair used to authenticate an Unlock Owner command.
+  This key is endorsed by the Owner key by virtue of being present in the owner configuration.
+- Ownership State: The state of a chip with respect to ownership transfer.
+  A chip may be in one of the following states: `LockedOwner`, `UnlockedSelf`, `UnlockedAny`, `UnlockedEndorsed`, `Recovery`.
+- Ownership Nonce: A 64-bit random integer used as a validation challenge for all ownership-related boot services requests.
+- Owner Page 0 & 1: The Owner Configuration is stored by the chip in a pair of flash INFO pages.
+  Normally the two pages are identical and serve as redundant backups.
+  During an update or transfer, page 0 is the current configuration and page 1 is the next configuration.
+- Application Key: an ECDSA public/private key-pair used to authenticate the owner’s application firmware payload.
+- Tag/Length/Value (TLV): A structure encoding scheme for encoding heterogenious and variable-length data structures.
+
+## Ownership Transfer
+
+Ownership Transfer allows owners of OpenTitan chips to securely transfer chips and OpenTitan devices between different public key infrastructures (PKIs) without assistance (or interference) from the manufacturer of the chip.
+
+Ownership Transfer gives each owner of a chip the ability to specify their own application firmware keys, key domains and chip configurations.
+
+### Ownership State
+
+The ownership state is a non-volatile chip state that controls the ownership transfer mechanism.
+A chip may be in one of the following states:
+- `LockedOwner`: The chip is currently owned and will not accept new owner configurations.
+- `UnlockedSelf`: The chip is currently owned and is expecting an ownership block update for the same owner (ie: config change or key rotation).
+- `UnlockedAny`: The chip is currently owned but will accept an ownership block for any new owner.
+- `UnlockedEndorsed`: The chip is currently owned but will accept an ownership block only from a new owner endorsed by the current owner.
+- `Recovery` The chip doesn’t have an owner and is unable to accept a new owner.
+  This is a nearly-fatal error state and requires intervention by *sku\_creator* to recover the chip.
+
+When the chip is in one of the `Unlocked` states, the ROM\_EXT will unlock Owner Page 1 allowing firmware to write a new owner configuration into that location.
+
+The ownership state is stored in the `boot_data` record.
+
+```mermaid
+flowchart LR
+subgraph container["<font size=6>Ownership State Transitions</font>"]
+    direction LR
+    start[LockedOwner] --> unlock{BootSvc::OwnershipUnlock}
+    unlock -->|mode: Any| any[UnlockedAny]
+    unlock -->|mode: Endorsed| endorsed[UnlockedEndorsed]
+    unlock -->|mode: Update| self[UnlockedSelf]
+    any --> activate{BootSvc::OwnershipActivate}
+    endorsed --> activate
+    self --> activate
+    activate --> done[LockedOwner]
+    style container fill:none,stroke:black
+end
+```
+
+### Owner Configuration
+
+The owner configuration (sometimes called "owner block") allows an owner to tailor the configuration of the chip to their use case.
+The configuration allows the owner to control the flash configuration, application verification keys, rescue mode configuration and miscellaneous configuration of the chip.
+
+- The flash configuration allows the owner to set access control (read, program, erase) and storage policy (ECC, scrambling, high endurance) of various regions and INFO pages of flash.
+- The owner may add a number of application verification keys that permit code execution.
+  The application key configuration includes an execution domain (e.g. `prod`, `dev` or `test`) and a key diversifier constant allowing the owner to control the derivation of sealing keys by the OpenTitan key manager.
+- The rescue configuration allows the owner to configure the operation of the rescue mode.
+  The configuration allows protecting flash regions from erasure during rescue and designating the allowed set of rescue commands (an owner may want to disable certain rescue commands if they feel those commands represent an attack or denial of service vector in their use case).
+- The miscellaneous configuration contains configuration for features that aren't well categorized into one of the above configurations:
+  - Enable or disable SRAM execution.
+  - Reset the BL0 minimum security version.
+
+#### Update Mode
+
+There are several allowed update modes for the ownership configuration.
+These update modes are motivated by two scenarios:
+
+- The Unlock Key is a very powerful key and owners may want to attenuate the power of the unlock key to mitigate the risk of the key leaking.
+- An owner may want to provide a configuration update for devices in the field that does not require the unlock and activate procedure.
+
+The update mode provides for four types of owner configuration update procedures:
+
+- `Open` mode allows the unlock key to unlock the device into any of the unlocked states.
+- `Self` mode allows the unlock key to unlock the device into only the `UnlockedSelf` state.
+- `NewVersion` mode forbids the unlock key from unlocking the device.
+  Instead, the device may accept an ownership configuration update at any time _if and only if_ the new configuration is signed by the self-same owner _and_ the configuration has a newer `config_version` number.
+- `SelfVersion` is a combination of the `Self` and `NewVersion` modes.
+  Instead, the device may accept an ownership configuration update at any time _if and only if_ the new configuration is signed by the self-same owner _and_ the configuration has a newer `config_version` number.  The device will _also_ allow the unlock key to unlock the device into the `UnlockedSelf` state.  When in the `UnlockedSelf` state, the device can accept a configuration that would move the `config_version` backwards.
+
+When the update mode is `Self`, `NewVersion` or `SelfVersion`, the power of the unlock key is reduced to only allow ownership operations that do not change the owner.
+
+### Ownership Nonce
+
+The ownership nonce is a random 64-bit integer value used as a challenge for ownership transfer operations
+All ownership-related boot services commands include the nonce and a signature by either the current owner or the next owner.
+
+Each successful ownership-related boot services request (ie: `OwnershipUnlock` and `OwnershipActivate`) will cause a new nonce to be generated
+Any subsequent ownership-related request must use the new nonce value.
+
+The ownership nonce is stored in the `boot_data` record.
+
+### Owner Key
+
+The Owner key represents the identify of the device owner.
+The Owner key signs the ownership configuration and endorses the other keys contained within the configuration.
+
+The Owner key is considered to be the highest value key among all of the ownership keys and it should have the highest level of protection.
+For example, an owner may choose to store the owner key in an offline HSM and require a multi-party quorum to use the key.
+
+### Activate Key
+
+The Activate key is used to authenticate the Activate Owner boot services command
+This key is separate from the Owner Key to allow owners to have different security policies for the Owner and Activate keys
+For example, this permits the Owner private key to be stored in an offline system and the Activate key to be stored in an online system.
+
+The Activate Owner key is endorsed by the Owner key via the Ownership Configuration data structure.
+
+### Unlock Key
+
+The Unlock key is used to authenticate the Unlock Ownership boot services command
+This key is separate from the Owner Key to allow owners to have different security policies for the Owner and Unlock keys.
+
+The Unlock key is endorsed by the Owner key via the Ownership Configuration data structure.
+
+### Detached Signature
+
+A detached signature is a signature that is stored separately from the data it signs. It can be used to validate either a signed command or an owner block.
+
+Detached signatures have the following properties:
+- They are necessary when using PQC (Post-Quantum Cryptography) algorithms, either on their own or in a hybrid mode alongside ECDSA. This is because PQC signatures are typically too large to fit within the designated signature area of the original data structure.
+- They may be located anywhere in flash, as long as flash page alignment constraints are met.
+- They only need to be stored in flash temporarily. Once the device verifies the signature against its corresponding data structure or command, the flash space occupied by the detached signature may be reclaimed for other purposes.
+
+## Ownership Transfer Operations
+
+The following flows support ownership transfer operations
+Each of the flows assumes the owner currently has `primary_bl0` set to SideA (the flows will also work with the `primary_bl0` set to SideB, but any reference to SideB in the flows would need to be changed to SideA).
+
+#### Next Owner Key
+
+The next owner key is the public ECDSA key of the next owner when performing an endorsed ownership transfer operation.
+The next owner’s public key fingerprint (ie: sha256 of the public key material) is stored in the `boot_data` record.
+
+### Self Update of Owner Configuration
+
+A self update allows an owner to update their Owner Configuration without transferring ownership to a new owner.
+
+1. The owner prepares for the update by staging a signed boot services `OwnershipUnlock` command with the current ownership nonce and the mode set to `UnlockedSelf`.
+   - After staging the command, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will move the chip into the `UnlockedSelf` state and will unlock Owner Page 1 to accept an Owner Configuration update.
+2. The owner updates the Owner Configuration in Owner Page 1 to the new preferred settings (e.g. key rotation or configuration change).  The owner configuration must be signed with the owner key.
+   - After updating the page, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will inspect the new configuration block.  If and only if the new owner configuration is valid, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the new owner configuration.
+3. The owner will stage a firmware update on the non-primary half of the flash. This firmware must be signed with a valid owner application key.  The owner will stage a Boot Services `next_boot_bl0` message requesting a boot to the non-primary partition (i.e. Side B).
+   - After staging the firmware and boot services request, the chip will be rebooted.
+   - Upon booting, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the new owner configuration and then attempt to find and validate a firmware payload located in the non-primary half of the flash.
+      - If there is a valid firmware in the non-primary half, it will be booted.
+      - If there is no valid firmware in the non-primary half, the primary half will be booted according to the settings of the current (non-updated) Owner Configuration.
+4. If the boot -
+   - Succeeds:
+      - The owner will stage a signed boot services `activate_owner` command with the current ownership nonce to finalize the update.  The activate owner command must be signed with the Activate key.
+      - After staging the command the chip is rebooted.
+      - Upon booting, the ROM\_EXT will move the chip into the `LockedOwner` state and update Owner Page 0 with the new Owner Configuration located in page 1.
+   - Fails:
+      - The owner can retry the update from step 2.
+
+```mermaid
+flowchart LR
+subgraph container["<font size=6>Flow: Locked Configuration Update</font>"]
+    subgraph flow[" "]
+        direction TB
+        start((<b>Start</b>))
+        prepare[
+            <b>Prepare</b>
+            Send <code>OwnershipUnlock</code> with <code>mode=UnlockedSelf</code>.
+            Reboot.
+        ]
+        update[<b>Update Owner Config</b>
+            Store new Owner Config in Owner Page 1.
+            Reboot.
+        ]
+        flash[<b>Flash</b>
+            Flash new firmware to side B.
+            Send <code>NextBootBl0</code> with <code>side=SideB</code>.
+            Reboot.
+        ]
+        success{Success?}
+        activate[<b>Activate</b>
+            Send <code>OwnershipActivate</code> with <code>primary_bl0=SideB</code>.
+            Reboot.
+        ]
+        done((<b>Done</b>))
+        start --> prepare
+        prepare --> update
+        update --> flash
+        flash --> success
+        success -->|Yes| activate
+        success -->|No| update
+        activate --> done((<b>Done</b>))
+    end
+
+    signing[
+        <span style="color:black"><b>Signing Service</b>
+        Owner
+        </span>
+    ]
+
+    prepare <-- "Sign command with Unlock Key" --> signing
+    update <-- "Sign Owner Config with Owner Key" --> signing
+    flash <-- "Sign firmware with Application Key" --> signing
+    activate <-- "Sign command with Activate Key" --> signing
+
+    style flow fill:none,stroke:none
+    style signing fill:#aea,stroke:#6c6
+    style container fill:none,stroke:black
+end
+```
+
+### Unlocked Ownership Transfer
+
+An unlocked ownership transfer allows the current owner to unlock the chip so that it will accept any new owner.
+
+1. The current owner prepares for the transfer by staging a signed boot services `OwnershipUnlock` command with the current ownership nonce and the mode set to `UnlockedAny`.
+   After staging the command, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will move the chip into the `UnlockedAny` state and will unlock Owner Page 1 to accept an Owner Configuration update.
+2. The current owner will deliver the chip (device) to the next owner.
+3. The next owner updates the Owner Configuration in Owner Page 1 giving the chip the next owner’s public key material and preferred configuration settings.
+   - After updating the page, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will inspect the next owner configuration.
+     If and only if the next Owner Configuration is valid, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the new owner configuration.
+4. The next owner will stage a firmware update on the non-primary half of the flash.
+   This firmware must be signed with a valid (next) owner application key.
+   The owner will stage a Boot Services `next_boot_bl0` message requesting a boot to the non-primary partition (i.e. Side B).
+   - After staging the firmware and boot services request, the chip will be rebooted.
+   - Upon booting, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the next owner configuration and then attempt to find and validate a firmware payload located in the non-primary half of the flash.
+      - If there is a valid firmware in the non-primary half, it will be booted.
+      - If there is no valid firmware in the non-primary half, the primary half will be booted according to the settings of the previous Owner Configuration.
+5. If the boot -
+   - Succeeds:
+      - The next owner will stage a signed boot services `OwnershipActivate` command with the current ownership nonce to finalize the update.
+The activate owner command must be signed with the Activate key.
+      - After staging the command the chip is rebooted.
+      - Upon booting, the ROM\_EXT will move the chip into the `LockedOwner` state and update Owner Page 0 with the new Owner Configuration located in page 1.
+   - Fails:
+      - The next owner can retry the update from step 3.
+
+```mermaid
+flowchart LR
+subgraph container["<font size=6>Flow: Unlocked Ownership Transfer</font>"]
+    subgraph flow[" "]
+        direction TB
+        start((<b>Start</b>))
+        prepare[
+            <b>Prepare</b>
+            Send <code>OwnershipUnlock</code> with <code>mode=UnlockedAny</code>.
+            Reboot.
+        ]
+        deliver((Deliver to next owner.))
+        update[<b>New Owner Config</b>
+            Store new Owner Config in Owner Page 1.
+            Reboot.
+        ]
+        flash[<b>Flash</b>
+            Flash new firmware to side B.
+            Send <code>NextBootBl0</code> with <code>side=SideB</code>.
+            Reboot.
+        ]
+        success{Success?}
+        activate[<b>Activate</b>
+            Send <code>OwnershipActivate</code> with <code>primary_bl0=SideB</code>.
+            Reboot.
+        ]
+        done((<b>Done</b>))
+        start --> prepare
+        prepare --> deliver
+        deliver --> update
+        update --> flash
+        flash --> success
+        success -->|Yes| activate
+        success -->|No| update
+        activate --> done((<b>Done</b>))
+    end
+
+    curr_owner[
+        <span style="color:black"><b>Signing Service</b>
+        Current Owner
+        </span>
+    ]
+    next_owner[
+        <span style="color:black"><b>Signing Service</b>
+        Next Owner
+        </span>
+    ]
+
+    prepare <-- "Sign command with Unlock Key" --> curr_owner
+    update <-- "Sign Owner Config with Owner Key" --> next_owner
+    flash <-- "Sign firmware with Application Key" --> next_owner
+    activate <-- "Sign command with Activate Key" --> next_owner
+    style flow fill:none,stroke:none
+    style curr_owner fill:#aea,stroke:#6c6
+    style next_owner fill:#aee,stroke:#6cc
+    style container fill:none,stroke:black
+end
+```
+
+### Endorsed Ownership Transfer
+
+An endorsed ownership transfer allows the current owner to transfer ownership to a specific new owner.
+
+1. The current owner prepares for the transfer by staging a signed boot services `OwnershipUnlock` command with the current ownership nonce, the next owner’s public key and the mode set to `UnlockedEndorsed`.  After staging the command, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will move the chip into the `UnlockedEndorsed` state and will unlock Owner Page 1 to accept an Owner Configuration update.
+2. The current owner will deliver the chip (device) to the next owner.
+3. The next owner updates the Owner Configuration in Owner Page 1 giving the chip the next owner’s public key material and preferred configuration settings.
+   - After updating the page, the chip is rebooted.
+   - Upon booting, the ROM\_EXT will inspect the next owner configuration.  If and only if the next Owner Configuration is valid, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the new owner configuration.
+4. The next owner will stage a firmware update on the non-primary half of the flash.  This firmware must be signed with a valid (next) owner application key.  The owner will stage a Boot Services `next_boot_bl0` message requesting a boot to the non-primary partition (i.e. Side B).
+   - After staging the firmware and boot services request, the chip will be rebooted.
+   - Upon booting, the ROM\_EXT will configure the non-primary half of the flash (i.e. Side B) as requested in the next owner configuration and then attempt to find and validate a firmware payload located in the non-primary half of the flash.
+      - If there is a valid firmware in the non-primary half, it will be booted.
+      - If there is no valid firmware in the non-primary half, the primary half will be booted according to the settings of the previous Owner Configuration.
+5. If the boot -
+   - Succeeds:
+      - The next owner will stage a signed boot services `OwnershipActivate` command with the current ownership nonce to finalize the update.  The activate owner command must be signed with the Activate key.
+      - After staging the command the chip is rebooted.
+      - Upon booting, the ROM\_EXT will move the chip into the `LockedOwner` state and update Owner Page 0 with the new Owner Configuration located in page 1.
+   - Fails:
+      - The next owner can retry the update from step 3.
+
+```mermaid
+flowchart LR
+subgraph container["<font size=6>Flow: Endorsed Ownership Transfer</font>"]
+    subgraph flow[" "]
+        direction TB
+        start((<b>Start</b>))
+        prepare[
+            <b>Prepare</b>
+            Send <code>OwnershipUnlock</code> with <code>mode=UnlockedEndorsed</code>
+            and next owner's public key.
+            Reboot.
+        ]
+        deliver((Deliver to next owner.))
+        update[<b>New Owner Config</b>
+            Store new Owner Config in Owner Page 1.
+            Reboot.
+        ]
+        flash[<b>Flash</b>
+            Flash new firmware to side B.
+            Send <code>NextBootBl0</code> with <code>side=SideB</code>.
+            Reboot.
+        ]
+        success{Success?}
+        activate[<b>Activate</b>
+            Send <code>OwnershipActivate</code> with <code>primary_bl0=SideB</code>.
+            Reboot.
+        ]
+        done((<b>Done</b>))
+        start --> prepare
+        prepare --> deliver
+        deliver --> update
+        update --> flash
+        flash --> success
+        success -->|Yes| activate
+        success -->|No| update
+        activate --> done((<b>Done</b>))
+    end
+
+    curr_owner[
+        <span style="color:black"><b>Signing Service</b>
+        Current Owner
+        </span>
+    ]
+    next_owner[
+        <span style="color:black"><b>Signing Service</b>
+        Next Owner
+        </span>
+    ]
+
+    prepare <-- "Sign command with Unlock Key" --> curr_owner
+    prepare <-- "Next Owner's public key" --> next_owner
+    update <-- "Sign Owner Config with Owner Key" --> next_owner
+    flash <-- "Sign firmware with Application Key" --> next_owner
+    activate <-- "Sign command with Activate Key" --> next_owner
+    style flow fill:none,stroke:none
+    style curr_owner fill:#aea,stroke:#6c6
+    style next_owner fill:#aee,stroke:#6cc
+    style container fill:none,stroke:black
+end
+```
+
+## Boot Services Commands
+
+All ownership operations are facilitated by boot services commands to the ROM\_EXT.
+The following boot services commands are supported.
+
+### Ownership Unlock
+
+The ownership unlock command prepares the chip for an ownership transfer or a non-transferring owner configuration update.
+The ownership unlock command must include the current ROM\_EXT nonce and a signature with the current owner's unlock key.
+
+```c
+typedef struct boot_svc_ownership_unlock_req {
+  /** Boot services message header.  */
+  boot_svc_header_t header;
+  /** Unlock mode: Any, Endorsed, Update or Abort.  */
+  uint32_t unlock_mode;
+  /** The 64-bit DIN subfield of the full 256-bit device ID.  */
+  uint32_t din[2];
+  /** Reserved for future use.  */
+  uint32_t reserved[7];
+  /** Algorithm identifier of the next owner (for endorsed mode).  */
+  owner_key_t next_owner_key;
+  /** The current ownership nonce.  */
+  nonce_t nonce;
+  /** The public key of the next owner (for endorsed mode).  */
+  owner_key_t next_owner_key;
+  /** Signature over [unlock_mode..next_owner_key] */
+  owner_signature_t signature;
+} boot_svc_ownership_unlock_req_t;
+```
+See the definition in [boot_svc_ownership_unlock.h](../../lib/boot_svc/boot_svc_ownership_unlock.h).
+
+A valid ownership unlock command will prepare the chip for an ownership transfer.
+
+When the mode is `UnlockedAny`, `UnlockedEndorsed` or `UnlockedSelf`, the ROM\_EXT will:
+- Rotate the ROM\_EXT nonce value.
+- Update the ownership state.
+- If endorsed mode, save the next owner key into `boot_data`.
+
+When the mode is `Abort`, the ROM\_EXT will:
+- Rotate the ROM\_EXT nonce value.
+- Update the ownership state to `LockedOwner`.
+- Copy the owner configuration from owner page 0 to owner page 1.
+
+### Ownership Activate
+
+The ownership activate command completes an ownership transfer or update and moves the chip into the `LockedOwner` state.
+The ownership activate command must include the current ROM\_EXT nonce and a signature with the next owner's activate key (or the current owner's activate key in the case of a non-transferring update).
+
+```c
+typedef struct boot_svc_ownership_activate_req {
+  /** Boot services message header.  */
+  boot_svc_header_t header;
+  /** Which side of the flash is primary after activation.  */
+  uint32_t primary_bl0_slot;
+  /** The 64-bit DIN subfield of the full 256-bit device ID.  */
+  uint32_t din[2];
+  /** Erase previous owner's flash (hardened_bool_t, currently unimplemented).  */
+  uint32_t erase_previous;
+  /** Reserved for future use.  */
+  uint32_t reserved[31];
+  /** The current ownership nonce.  */
+  nonce_t nonce;
+  /** Signature over [primary_bl0_slot..nonce] */
+  owner_signature_t signature;
+} boot_svc_ownership_activate_req_t;
+
+```
+See the definition in [boot_svc_ownership_activate.h](../../lib/boot_svc/boot_svc_ownership_activate.h).
+
+A valid ownership activate request will:
+- Rotate the ROM\_EXT nonce value.
+- Update the ownership state to `LockedOwner`.
+- Set the primary BL0 slot.
+- Erase the previous owner's flash slot (ie: the non-primary slot).
+- Copy the owner configuration from owner page 1 into owner page 0.
+
+## Owner Configuration
+
+### Contents
+
+The owner configuration contains the following items:
+- Owner Key:  This key is the owner's identity and is used to endorse the keys used for application verification and future owner configuration updates or transfer request.
+- Activation Key:  This key is used to authenticate an `OwnershipActivate` command.
+- Unlock Key:  This key is used to authenticate an `OwnershipUnlock` command.
+- Owner Application Keys:  These keys are used to authenticate the owner's firmware payload.
+   The keys also carry some additional metadata used to configure the OpenTitan key manager.
+- EFLASH configuration.
+  The EFLASH configuration sets the desired properties on ranges of flash data pages (such as access permissions and error correction properties).
+- EFLASH-INFO configuration: The EFLASH-INFO configuration sets the desired properties on flash info pages.
+  Some info pages are reserved for use by the `silicon_creator` and have restricted access.
+  The remaining info pages are available to the owner and the owner can set specific access permissions.
+- Miscellaneous settings:
+   - SRAM execution: depending on the application, the owner may want to allow or forbid code execution from SRAM.
+   - Rescue configuration: The ROM\_EXT supports a rescue protocol for recovering from an internal flash corruption event and querying data about the chip.
+     The rescue configuration allows the owner to control interactions with the rescue protocol.
+
+Because the Owner Configuration is composed of several sections of varying size and count (e.g. perhaps several different keys), the owner configuration utilizes tag-length-value (TLV) encoded structures.
+
+```c
+typedef struct tlv_header {
+    uint32_t tag;
+    uint16_t length;
+    struct_version_t version;
+} tlv_header_t;
+
+typedef struct struct_version {
+    uint8_t major;
+    uint8_t minor;
+} struct_version_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+### Owner Keydata
+
+The `owner_keydata_t` structure is a union that can hold different types of cryptographic keys. The actual key type is determined by a separate field in the owner block or application key types.
+
+- The `ecdsa` field holds an ECDSA P-256 public key.
+- The `spx` field holds a SPHINCS+ public key.
+- The `hybrid` field holds a hybrid of both an ECDSA and a SPHINCS+ public key.
+- The `raw` field provides enough space to hold both key types for hybrid schemes.
+- The `id` field is the first 32-bit word of the key data, serving as a key identifier.
+
+```c
+typedef union owner_key_data {
+  /** ECDSA P256 public key */
+  ecdsa_p256_public_key_t ecdsa;
+  /** SPHINCS+ public key */
+  sigverify_spx_key_t spx;
+  /** Hybrid ECDSA & SPHINCS+ public key */
+  hybrid_key_t hybrid;
+  /** Enough space to hold an ECDSA key and a SPX+ key for hybrid schemes */
+  uint32_t raw[16 + 8];
+  /** A key ID is the first 32-bit word of the key data */
+  uint32_t id;
+} owner_keydata_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+## Data Structures
+
+### Owner Configuration
+
+The Owner Configuration struct carries the required owner key materials and validation information and is a container for all of the TLV structs specifying the configuration.
+- The `owner_key` Key is an ECDSA P-256 key used to authenticate the owner configuration and endorse the other keys.
+- The `signature` is an ECDSA signature over the struct, excluding the `signature` and `seal` members (ie: the first 1952 bytes).
+- The `seal` is a KMAC over the owner configuration binding the configuration to a particular chip.
+   - During secure boot, the `seal` is used to confirm the validity of the owner configuration.
+   - During ownership transfer, the `seal` is computed by the chip.
+
+```c
+typedef struct owner_block {
+  /**
+   * Header identifying this struct.
+   * tag: `OWNR`.
+   * length: 2048.
+   */
+  tlv_header_t header;
+  /** Configuraion version (monotonically increasing per owner) */
+  uint32_t config_version;
+  /** SRAM execution configuration (DisabledLocked, Disabled, Enabled). */
+  uint32_t sram_exec_mode;
+  /** Ownership key algorithm (currently, only ECDSA is supported). */
+  uint32_t ownership_key_alg;
+  /** Ownership update mode (one of OPEN, SELF, NEWV) */
+  uint32_t update_mode;
+  /** Set the minimum security version to this value (UINT32_MAX: no change) */
+  uint32_t min_security_version_bl0;
+  /** The device ID locking constraint */
+  uint32_t lock_constraint;
+  /** The device ID to which this config applies */
+  uint32_t device_id[8];
+  /** Reserved space for future use. */
+  uint32_t reserved[16];
+  /** Owner public key. */
+  owner_keydata_t owner_key;
+  /** Owner's Activate public key. */
+  owner_keydata_t activate_key;
+  /** Owner's Unlock public key. */
+  owner_keydata_t unlock_key;
+  /** Data region to hold the other configuration structs. */
+  uint8_t data[1536];
+  /** Signature over [tag..data] with the owner private key. */
+  owner_signature_t signature;
+  /** A sealing value to seal the owner block to a specific chip. */
+  uint32_t seal[8];
+} owner_block_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+### Application Keys
+
+The Application Keys verify owner firmware payloads during the secure boot process.
+- The `key_algorithm` refers to the key algorithm to be used with this key (ECDSA, SPX or SPXq20).
+- The `key_domain` refers to the application-level key domain: `prod`, `dev` or `test`.
+  These values have no relationship with the chip's lifecycle state.
+  This value is used to diversify the key manager's key derivations.
+- The `key_diversifier` is an arbitrary owner-selected value to further diversify key derivation.
+  This allows the owner to create additional key domains within each of the `prod`, `dev` or `test` categories.
+  The 8 words of `key_domain || key_diversifier` are programmed into the key manager sealing binding registers.
+- The `usage_constraint` is a bitmask that is combined (bitwise OR-ed) with the firmware manifest's `usage_constraint.selector` bits.
+  This can be used to create application keys that required class- or node-locked firmware.
+- The `data` field contains the key material itself.
+
+```c
+typedef struct owner_application_key {
+  /**
+   * Header identifying this struct.
+   * tag: `APPK`.
+   * length: 48 + sizeof(key).
+   */
+  tlv_header_t header;
+  /** Key algorithm.  One of ECDSA, SPX+ or SPXq20. */
+  uint32_t key_alg;
+  union {
+    struct {
+      /** Key domain.  Recognized values: PROD, DEV, TEST */
+      uint32_t key_domain;
+      /** Key diversifier.
+       *
+       * This value is concatenated to key_domain to create an 8 word
+       * diversification constant to be programmed into the keymgr.
+       */
+      uint32_t key_diversifier[7];
+    };
+    uint32_t raw_diversifier[8];
+  };
+  /** Usage constraint must match manifest header's constraint */
+  uint32_t usage_constraint;
+  /** Key material.  Varies by algorithm type. */
+  owner_keydata_t data;
+} owner_application_key_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+### EFLASH Configuration
+
+The EFLASH configuration describes the owner's desired flash configuration.
+- The flash region `start` and `size` are expressed in pages.
+- No flash region should span over the A and B halves of the flash.
+  This is to allow configuring the A and B havles differently during an ownership transfer operation.
+
+```c
+typedef struct owner_flash_region {
+  /** The start of the region, in flash pages. */
+  uint16_t start;
+  /** The size of the region, in flash pages. */
+  uint16_t size;
+  /**
+   * The access properties of the flash region.
+   * The 32-bit word is a packed set of multi-bit bools.
+   * +------+---------+----+----+----+-------+---------+------+
+   * | Lock | Protect |    |    |    | Erase | Program | Read |
+   * +------+---------+----+----+----+-------+---------+------+
+   */
+  uint32_t access;
+  /**
+   * The flash properties of the flash region.
+   * The 32-bit word is a packed set of multi-bit bools.
+   * +----+----+----+----+----+----+-----+----------+
+   * |    |    |    |    |    | HE | ECC | Scramble |
+   * +----+----+----+----+----+----+-----+----------+
+   */
+  uint32_t properties;
+} owner_flash_region_t;
+
+typedef struct owner_flash_config {
+  /**
+   * Header identifiying this struct.
+   * tag: `FLSH`.
+   * length: 8 + 12 * length(config).
+   */
+  tlv_header_t header;
+  /**
+   * A list of flash region configurations.
+   * In each `config` item, the `access` and `properties` fields are xor-ed
+   * with the region index in each nibble (ie: index 1 == 0x11111111).
+   */
+  owner_flash_region_t config[];
+} owner_flash_config_t;
+
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+
+### FLASH\_INFO Configuration
+
+The FLASH-INFO configuration describes the owner's desired configuration for flash info pages.
+
+Info page configurations apply only to pages accessible to the owner.
+Upon ingestion of a new owner configuration, the ROM\_EXT will reject a configuration that attempts to use info pages reserved for `silicon_creator`.
+
+```c
+typedef struct owner_info_page {
+  /** The bank where the info page is located. */
+  uint8_t bank;
+  /** The info page number. */
+  uint8_t page;
+  uint16_t _pad;
+  /**
+   * The access properties of the flash region.
+   * The 32-bit word is a packed set of multi-bit bools.
+   * +------+-----+----+----+----+-------+---------+------+
+   * | Lock |     |    |    |    | Erase | Program | Read |
+   * +------+-----+----+----+----+-------+---------+------+
+   */
+  uint32_t access;
+  /**
+   * The flash properties of the flash region.
+   * The 32-bit word is a packed set of multi-bit bools.
+   * +----+----+----+----+----+----+-----+----------+
+   * |    |    |    |    |    | HE | ECC | Scramble |
+   * +----+----+----+----+----+----+-----+----------+
+   */
+  uint32_t properties;
+} owner_info_page_t;
+
+typedef struct owner_flash_info_config {
+  /**
+   * Header identifiying this struct.
+   * tag: `INFO`.
+   * length: 8 + 12 * length(config).
+   */
+  tlv_header_t header;
+  /**
+   * A list of flash info page configurations.
+   * In each `config` item, the `access` and `properties` fields are xor-ed
+   * with the region index in each nibble (ie: index 1 == 0x11111111).
+   */
+  owner_info_page_t config[];
+} owner_flash_info_config_t;
+
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+### Rescue Configuration
+
+The rescue configuration describes the owner's desired configuration of the ROM\_EXT rescue protocol.
+- The owner may configure desired rescue protocol: Xmodem, USB-DFU or SPI-DFU.
+- The owner may configure desired rescue trigger: UART break, Strapping combination or GPIO pin.
+  - When the trigger is UART break, at least 350us of the break condition must be observed on the UART RX line to trigger the rescue protocol.
+  - When the trigger is a strapping combination, the desired strap pattern must be configured (e.g. a value 0-61).
+  - When the trigger is a GPIO pin, the desired IO pin as well as the sense of the pin and whether or not to enable the internal pull-up/down resistor must be configured.
+- The owner may configure rescue to be triggered by failure to boot an owner payload.
+- The owner may configure rescue to be triggered by a watchdog timeout as the reset reason.
+- The owner may configure rescue to automatically exit after a specific timeout of no activity.
+- The owner may configure the region of flash to be erased and reprogrammed during firmware rescue.
+- The owner may configure the allowed interactions with the rescue protocol.
+   - Allowed rescue modes permit whether the rescue client can upload firmware or interact with the boot log and boot services.
+   - Allowed boot services commands determine whether or not a boot services request from the rescue protocol will be accepted or rejected.
+
+```c
+typedef struct owner_rescue_config {
+  /**
+   * Header identifiying this struct.
+   * tag: `RSCU`.
+   * length: 16 + sizeof(command_allow).
+   */
+  tlv_header_t header;
+  /**
+   * The rescue protocol:
+   * - 'X'modem.
+   * - 'U'SB-DFU.
+   * - 'S'PI-DFU.
+   */
+  uint8_t protocol;
+  /**
+   * The miscellaneous and gpio configuration (if relevant, depending on `detect`).
+   *
+   *      7 6       2       1       0
+   * +---------------+--------+-------+
+   * | WDT | Resv'd  | PullEn | Value |
+   * +---------------+--------+-------+
+   *
+   * WDT: Enter rescue if the reset reason is watchdog timeout.
+   * PullEn: When GPIO is the trigger, enable the internal pullup in the
+   *         opposite direction of Value.
+   * Value: When GPIO is the trigger, the GPIO value which signifies entry
+   *        into rescue mode.
+   */
+  uint8_t gpio;
+  /**
+   * The timeout configuration.
+   *
+   *     7  6                        0
+   * +-----+--------------------------+
+   * | EoF |                  Timeout |
+   * +-----+--------------------------+
+   *
+   * EoF: Enter rescue on failure to boot.
+   * Timeout: After `timeout` seconds of no activity, exit rescue mode and
+   *          reboot.
+   */
+  uint8_t timeout;
+  /**
+   * Trigger detection configuration.
+   *
+   *  7     6  5                    0
+   * +--------+-----------------------+
+   * | Detect |                 Index |
+   * +--------+-----------------------+
+   *
+   * Detect and Index:
+   *  0 - None; index is meaningless.
+   *  1 - UART Break; index is meaningless.
+   *  2 - Strapping pins; index is the strapping value.
+   *  3 - GPIO; index is the pin to sample.
+   */
+  uint8_t detect;
+  /** The start offset of the rescue region in flash (in pages). */
+  uint16_t start;
+  /** The size of the rescue region in flash (in pages). */
+  uint16_t size;
+  /**
+   * An allowlist of rescue and boot_svc commands that may be invoked by the
+   * rescue protocol.  The commands are identified by their 4-byte tags (tag
+   * identifiers between rescue commands and boot_svc commands are unique).
+   */
+  uint32_t command_allow[];
+} owner_rescue_config_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
+
+### Detached Signature
+
+A detached signature can be used to validate either a signed command or an
+owner block.
+
+Detached signatures are used when the signature is too larger to fit within
+the designated signature area of the original buffer. In such cases, the
+orginal buffer's signature field will be all zeros and the verification
+function will scan through the flash data pages to find the detached
+signature.
+
+The detached signature must be aligned on a flash page boundary.
+
+```c
+typedef struct owner_detached_signature {
+  /**
+   * Header identifying this struct.
+   * tag: `SIGN`.
+   * length: 8192.
+   */
+  tlv_header_t header;
+  uint32_t _pad[2];
+  /** The command associated with this signature (e.g. UNLK, ACTV, OWNR). */
+  uint32_t command;
+  /** The algorithm used to generate this signature (ownership_key_alg_t). */
+  uint32_t algorithm;
+  /** The current nonce associated with the command. */
+  nonce_t nonce;
+  /** The signature data. */
+  union {
+    uint32_t raw[2040];
+    ecdsa_p256_signature_t ecdsa;
+    sigverify_spx_signature_t spx;
+    struct {
+      ecdsa_p256_signature_t ecdsa;
+      sigverify_spx_signature_t spx;
+    } hybrid;
+  } signature;
+} owner_detached_signature_t;
+```
+See the definition in [datatypes.h](../../lib/ownership/datatypes.h).
diff --git a/sw/device/silicon_creator/rom_ext/doc/rescue.md b/sw/device/silicon_creator/rom_ext/doc/rescue.md
index 3981e1fe261f6..fec81dd24960b 100644
--- a/sw/device/silicon_creator/rom_ext/doc/rescue.md
+++ b/sw/device/silicon_creator/rom_ext/doc/rescue.md
@@ -56,7 +56,39 @@ ok: send firmware via xmodem-crc
 The ROM_EXT will then prompt for the transfer to start by sending the Xmodem-CRC start character (which is the ASCII character `C`).
 Normally, the rescue payload is stored into slot A of the flash.
 The alternative code `RESB` causes the ROM_EXT to store the payload in slot B of the flash.
-After receiving the payload, the ROM_EXT will reboot the chip (unless commanded to `WAIT`).
+After receiving the payload, the rescue will wait for subsequent commands.
+
+#### Request a change in the serial data rate (`BAUD`)
+
+The user may request a change in the serial data rate.
+By default, the ROM_EXT operates at 115200 bps, however, a number of alternate speeds are supported.
+
+To change speeds, the user first issues the 4-byte code `BAUD`.
+The ROM_EXT will respond with the following message:
+```
+ok: waiting for baudrate
+```
+
+The user has 10 seconds to enter one of the following 4-byte symbols specifying a new rate:
+
+- `115K` - 115,200 bps
+- `230K` - 230,400 bps
+- `460K` - 460,800 bps
+- `921K` - 921,600 bps
+- `1M33` - 1,333,333 bps
+- `1M50` - 1,500,000 bps
+
+If a supported symbol is entered, the ROM_EXT will respond with the following message and then adjust the rate:
+```
+ok: new baudrate <symbol>
+```
+
+If an unsupported symbol is entered, the ROM_EXT will responde with the following message:
+```
+error: unsupported baudrate <symbol>
+```
+
+After changing the serial data rate, the ROM_EXT resumes operating in the prior operating mode.
 
 #### Request Boot Log Data (`BLOG`)
 
@@ -82,7 +114,7 @@ ok: send boot_svc request via xmodem-crc
 ```
 
 The ROM_EXT will then will prompt for the transfer to start by sending the Xmodem-CRC start character (which is the ASCII character `C`).
-After receiving the payload, the ROM_EXT will reboot the chip (unless commanded to `WAIT`).
+After receiving the payload, the rescue will wait for subsequent commands.
 
 
 #### Request the last Boot Services Response (`BRSP`)
@@ -114,6 +146,33 @@ After receiving the payload, the ROM_EXT will reboot the chip (unless commanded
 
 Note: the ROM_EXT will only accept the Owner Block if the chip is in an ownership transfer state and the receive owner block meets all validity criteria.
 
+#### Get Owner Page (`OPG0`, `OPG1`)
+
+The user may request the current contents of the owner pages.
+The ROM_EXT will acknowledge this request with the following message:
+
+```
+mode: OPG0
+ok: receive owner page via xmodem-crc
+```
+
+The ROM_EXT will then transmit the request owner page to the user via the Xmodem-CRC protocol.
+After completing this action, the ROM_EXT will switch back to firmware rescue mode.
+
+
+#### Get OpenTitan Device ID (`OTID`)
+
+The user may request the OpenTitan Device ID with the 4-byte code `OTID`.
+The ROM_EXT will acknowledge this request with the following message:
+
+```
+mode: OTID
+ok: receive device ID via xmodem-crc
+```
+
+The ROM_EXT will then transmit the 256-bit device ID to the user via the Xmodem-CRC protocol.
+After completing this action, the ROM_EXT will switch back to firmware rescue mode.
+
 #### Request a Reboot (`REBO`)
 
 The user may request a reboot operation with the 4-byte code `REBO`.
@@ -129,6 +188,8 @@ The ROM_EXT will then exit rescue mode and reboot the chip.
 
 #### Disable automatic reboot (`WAIT`)
 
+> NOTE: the `WAIT` command is deprecated.  Rescue mode now always waits for subsequent commands.
+
 The user may request that the ROM_EXT disable the automatic reboot after upload actions with the 4-byte code `WAIT`.
 The ROM_EXT will acknowledge this request with the following message:
 
@@ -158,3 +219,13 @@ The following errors and error responses can occur during Xmodem-CRC.
 - An invalid start-of-packet: the transfer is aborted.
 - An invalid block number: the transfer is cancelled.
 - An invalid CRC checksum: the frame is NAKed and the sender should retry the frame.
+
+## Security Considerations
+
+The ownership configuration can contain a `RescueConfig` structure that specifies which rescue commands are allowed.
+When the `RescueConfig` is absent from the ownership configuration, all commands are allowed.
+When the `RescueConfig` is present in the ownership configuration, all commands are subject to the `command_allow` list in the rescue configuration except for the following:
+
+- The reboot (`REBO`) command is always allowed.
+- The disable automatic reboot (`WAIT`) command is always allowed.
+- The change serial data rate (`BAUD`) command is always allowed.
diff --git a/sw/device/silicon_creator/rom_ext/e2e/BUILD b/sw/device/silicon_creator/rom_ext/e2e/BUILD
index 0f4b80cbefbb3..f2bb82b8e7ed9 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/BUILD
@@ -2,13 +2,22 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load(
+    "//rules:const.bzl",
+    "CONST",
+)
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
+    "otp_hex",
     "otp_image",
     "otp_json",
     "otp_partition",
 )
+load(
+    "//sw/device/silicon_creator/rom_ext/e2e:defs.bzl",
+    "DEVICE_ID",
+)
 
 package(default_visibility = ["//visibility:public"])
 
@@ -26,8 +35,14 @@ otp_json(
             },
             lock = True,
         ),
+        otp_partition(
+            name = "HW_CFG0",
+            items = {
+                "DEVICE_ID": DEVICE_ID,
+            },
+            lock = True,
+        ),
     ],
-    visibility = ["//visibility:private"],
 )
 
 otp_image(
@@ -37,3 +52,25 @@ otp_image(
         ":otp_json_secret2_locked",
     ],
 )
+
+otp_json(
+    name = "otp_json_reset_reason",
+    partitions = [
+        otp_partition(
+            name = "OWNER_SW_CFG",
+            items = {
+                "OWNER_SW_CFG_ROM_PRESERVE_RESET_REASON_EN": otp_hex(CONST.HARDENED_TRUE),
+                "OWNER_SW_CFG_ROM_WATCHDOG_BITE_THRESHOLD_CYCLES": otp_hex(200000),
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_img_secret2_locked_preserve_reset_prod",
+    src = "//hw/ip/otp_ctrl/data:otp_json_prod",
+    overlays = STD_OTP_OVERLAYS + [
+        ":otp_json_secret2_locked",
+        ":otp_json_reset_reason",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/attestation/BUILD b/sw/device/silicon_creator/rom_ext/e2e/attestation/BUILD
new file mode 100644
index 0000000000000..251f783bd2244
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/attestation/BUILD
@@ -0,0 +1,62 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_test",
+    "qemu_params",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+opentitan_binary(
+    name = "print_certs",
+    testonly = True,
+    srcs = ["print_certs.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+    ],
+)
+
+opentitan_test(
+    name = "print_certs_test",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(
+        binaries = {
+            ":print_certs": "firmware",
+        },
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/attestation:attestation_test",
+    ),
+    qemu = qemu_params(
+        binaries = {
+            ":print_certs": "firmware",
+        },
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/attestation:attestation_test",
+    ),
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/attestation/print_certs.c b/sw/device/silicon_creator/rom_ext/e2e/attestation/print_certs.c
new file mode 100644
index 0000000000000..46052c796c681
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/attestation/print_certs.c
@@ -0,0 +1,93 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+const char kBase64[] =
+    "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/";
+
+static void base64_encode(char *dest, const uint8_t *data, int32_t len) {
+  for (int32_t i = 0; len > 0; i += 3, len -= 3) {
+    // clang-format off
+    uint32_t val = (uint32_t)(data[i] << 16 |
+                              (len > 1 ? data[i + 1] << 8 : 0) |
+                              (len > 2 ? data[i + 2] : 0));
+    // clang-format on
+    *dest++ = kBase64[(val >> 18) & 0x3f];
+    *dest++ = kBase64[(val >> 12) & 0x3f];
+    *dest++ = len > 1 ? kBase64[(val >> 6) & 0x3f] : '=';
+    *dest++ = len > 2 ? kBase64[(val >> 0) & 0x3f] : '=';
+  }
+  *dest = '\0';
+}
+
+static status_t print_cert(char *dest,
+                           const flash_ctrl_info_page_t *info_page) {
+  uint8_t data[2048];
+  TRY(flash_ctrl_info_read(info_page, 0, sizeof(data) / sizeof(uint32_t),
+                           data));
+
+  uint32_t offset = 0;
+  size_t len = sizeof(data);
+  while (true) {
+    perso_tlv_cert_obj_t obj = {0};
+    rom_error_t err = perso_tlv_get_cert_obj(data + offset, len, &obj);
+    if (err != kErrorOk) {
+      break;
+    }
+    base64_encode(dest, obj.cert_body_p, (int32_t)obj.cert_body_size);
+    LOG_INFO("%s type=%d sz=%d", obj.name, obj.obj_type, obj.obj_size);
+    LOG_INFO("%s: %s", obj.name, dest);
+    offset += (obj.obj_size + 7) & ~7u;
+    len -= obj.obj_size;
+  }
+  return OK_STATUS();
+}
+
+static status_t print_owner_block(char *dest,
+                                  const flash_ctrl_info_page_t *info_page) {
+  uint8_t data[2048];
+  TRY(flash_ctrl_info_read(info_page, 0, sizeof(data) / sizeof(uint32_t),
+                           data));
+  base64_encode(dest, data, sizeof(data));
+  return OK_STATUS();
+}
+
+static status_t print_certs(void) {
+  char buf[3072];
+  // Print certificates.
+  // TODO: print factory certs on FPGA;
+  // On non-silicon targets, the factory certs pages will not be provisioned,
+  // and it is not updated by the ROM_EXT if it is not provisioned. This will
+  // trigger an ECC error when trying to read a page that has scrambling setup
+  // by the ROM_EXT but is not erased after.
+  if (kDeviceType == kDeviceSilicon) {
+    TRY(print_cert(buf, &kFlashCtrlInfoPageFactoryCerts));
+  }
+  TRY(print_cert(buf, &kFlashCtrlInfoPageDiceCerts));
+
+  // Print owner information.
+  TRY(print_owner_block(buf, &kFlashCtrlInfoPageOwnerSlot0));
+  LOG_INFO("OWNER_PAGE_0: %s", buf);
+
+  TRY(print_owner_block(buf, &kFlashCtrlInfoPageOwnerSlot1));
+  LOG_INFO("OWNER_PAGE_1: %s", buf);
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  status_t sts = print_certs();
+  if (status_err(sts)) {
+    LOG_ERROR("print_certs: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/BUILD b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/BUILD
index 3efd9ee5bebc7..0660ba2a7d0ed 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/BUILD
@@ -1,15 +1,19 @@
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex")
 load(
     "//rules/opentitan:defs.bzl",
     "DEFAULT_TEST_FAILURE_MSG",
     "DEFAULT_TEST_SUCCESS_MSG",
     "EARLGREY_TEST_ENVS",
-    "cw310_params",
     "fpga_params",
+    "opentitan_binary",
     "opentitan_test",
+    "qemu_params",
 )
+load("//rules:manifest.bzl", "manifest")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -25,18 +29,31 @@ cc_library(
     ],
 )
 
+# Note: the boot_svc commands for ownership_{activate,unlock} are tested by
+# the ownership transfer tests.  These two commands are unlike the rest of
+# the ownership commands in that they require a nonce, the device
+# identification number and a signature, and thus require far more test
+# infrastructure than the common boot_svc commands.
+
 opentitan_test(
     name = "boot_svc_empty_test",
     srcs = ["boot_svc_empty_test.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
-        assemble = "{rom_ext}@0 {firmware}@0x10000 {firmware}@0x90000",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
         exit_failure = "BFV|PASS|FAIL",
-        exit_success = "FinalBootLog: 2:AA\r\n",
+        exit_success = "FinalBootLog: 4:AAAA\r\n",
     ),
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    qemu = qemu_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV|PASS|FAIL",
+        exit_success = "FinalBootLog: 4:AAAA\r\n",
+    ),
     deps = [
         ":boot_svc_test_lib",
         "//sw/device/lib/base:status",
@@ -51,17 +68,198 @@ opentitan_test(
 )
 
 opentitan_test(
-    name = "boot_svc_next_test",
-    srcs = ["boot_svc_next_test.c"],
+    name = "boot_svc_enter_rescue_test",
+    srcs = ["boot_svc_enter_rescue_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(
+        timeout = "moderate",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV|PASS|FAIL",
+        exit_success = "mode: RESQ\r\n",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            # Try the `REBO` mode and make sure it works.
+            --exec="rescue no-op --reset-target=reboot"
+            no-op
+        """,
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    qemu = qemu_params(
+        timeout = "moderate",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV|PASS|FAIL",
+        exit_success = "mode: RESQ\r\n",
+        # TODO: add bootstrap when QEMU bootstraps instead of splicing firmware
+        test_cmd = """
+            --exec="transport init"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            # Try the `REBO` mode and make sure it works.
+            --exec="rescue no-op --reset-target=reboot"
+            no-op
+        """,
+    ),
+    deps = [
+        ":boot_svc_test_lib",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_enter_rescue",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+    ],
+)
+
+opentitan_test(
+    name = "boot_svc_after_wakeup_disabled_test",
+    srcs = ["boot_svc_wakeup_test.c"],
+    defines = ["BOOT_SVC_AFTER_WAKEUP_ENABLED=0"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        # Not supported in QEMU whilst low power is not modelled
     },
     fpga = fpga_params(
-        assemble = "{rom_ext}@0 {firmware}@0x10000 {firmware}@0x90000",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        #exit_failure = "BFV|PASS|FAIL",
+        #exit_success = "FinalBootLog: 2:AA\r\n",
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    deps = [
+        ":boot_svc_test_lib",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:aon_timer",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_empty",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+    ],
+)
+
+opentitan_test(
+    name = "boot_svc_after_wakeup_enabled_test",
+    srcs = ["boot_svc_wakeup_test.c"],
+    defines = ["BOOT_SVC_AFTER_WAKEUP_ENABLED=1"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        # Not supported in QEMU whilst low power is not modelled
+    },
+    fpga = fpga_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        changes_otp = True,
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_boot_svc_after_wakeup",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    deps = [
+        ":boot_svc_test_lib",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:aon_timer",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_empty",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+    ],
+)
+
+NEXT_TEST_SEQUENCES = [
+    "AAB",
+    "ABA",
+    "ABB",
+]
+
+[
+    opentitan_test(
+        name = "boot_svc_next_{}_test".format(test_sequence.lower()),
+        srcs = ["boot_svc_next_test.c"],
+        defines = ["TEST_SEQUENCE_{}=1".format(test_sequence)],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+            changes_otp = True,  # Clear the primary slot settings
+            exit_failure = "BFV:.*|PASS|FAIL",
+            exit_success = "FinalBootLog: 3:{}\r\n".format(test_sequence),
+        ),
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+        qemu = qemu_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+            exit_failure = "BFV:.*|PASS|FAIL",
+            exit_success = "FinalBootLog: 3:{}\r\n".format(test_sequence),
+        ),
+        deps = [
+            ":boot_svc_test_lib",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_next_boot_bl0_slot",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        ],
+    )
+    for test_sequence in NEXT_TEST_SEQUENCES
+]
+
+opentitan_test(
+    name = "boot_svc_primary_test",
+    srcs = ["boot_svc_primary_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
         exit_failure = "BFV:.*|PASS|FAIL",
-        exit_success = "FinalBootLog: 3:ABA\r\n",
+        exit_success = "FinalBootLog: 5:ABBBA\r\n",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
     ),
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    qemu = qemu_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV:.*|PASS|FAIL",
+        exit_success = "FinalBootLog: 5:ABBBA\r\n",
+        # TODO: add bootstrap when QEMU bootstraps instead of splicing firmware
+    ),
     deps = [
         ":boot_svc_test_lib",
         "//sw/device/lib/base:status",
@@ -80,14 +278,21 @@ opentitan_test(
     name = "boot_svc_bad_next_test",
     srcs = ["boot_svc_bad_next_test.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
-        assemble = "{rom_ext}@0 {firmware}@0x10000 {firmware}@0x90000",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
         exit_failure = "BFV:.*|PASS|FAIL",
         exit_success = "FinalBootLog: 3:AAA\r\n",
     ),
     linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    qemu = qemu_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV:.*|PASS|FAIL",
+        exit_success = "FinalBootLog: 3:AAA\r\n",
+    ),
     deps = [
         ":boot_svc_test_lib",
         "//sw/device/lib/base:status",
@@ -103,38 +308,130 @@ opentitan_test(
 )
 
 opentitan_test(
-    name = "boot_svc_ownership_unlock_test",
-    srcs = [
-        "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
-    ],
+    name = "boot_svc_bad_primary_test",
+    srcs = ["boot_svc_bad_primary_test.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
-        data = [
-            "//sw/device/silicon_creator/lib/ownership/keys/fake:no_owner_recovery_key",
-        ],
-        exit_failure = "(PASS|FAIL|FAULT).*\n",
-        # This test requires serial break support which is not available in CI yet.
-        tags = ["broken"],
-        test_cmd = """
-            --exec="transport init"
-            --exec="fpga clear-bitstream"
-            --exec="fpga load-bitstream {bitstream}"
-            --exec="bootstrap --clear-uart=true {firmware}"
-            --exec="console --non-interactive --exit-success='ownership_state = LockedNone\r\n' --exit-failure='{exit_failure}'"
-            --exec="rescue boot-svc ownership-unlock \
-                    --mode Any \
-                    --nonce 0 \
-                    --sign $(location //sw/device/silicon_creator/lib/ownership/keys/fake:no_owner_recovery_key)"
-            --exec="console --non-interactive --exit-success='ownership_state = UnlockedAny\r\n' --exit-failure='{exit_failure}'"
-            no-op
-        """,
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV:.*|PASS|FAIL",
+        exit_success = "FinalBootLog: 3:ABA\r\n",
     ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    qemu = qemu_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a} {firmware}@{owner_slot_b}",
+        exit_failure = "BFV:.*|PASS|FAIL",
+        exit_success = "FinalBootLog: 3:ABA\r\n",
+    ),
+    deps = [
+        ":boot_svc_test_lib",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_next_boot_bl0_slot",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+    ],
+)
+
+manifest({
+    "name": "manifest_version_4",
+    "address_translation": hex(CONST.HARDENED_TRUE),
+    "security_version": "4",
+    "identifier": hex(CONST.OWNER),
+})
+
+manifest({
+    "name": "manifest_version_5",
+    "address_translation": hex(CONST.HARDENED_TRUE),
+    "security_version": "5",
+    "identifier": hex(CONST.OWNER),
+})
+
+opentitan_binary(
+    name = "min_sec_ver_5",
+    testonly = True,
+    srcs = ["boot_svc_min_sec_ver_test.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+        "//hw/top_earlgrey:fpga_cw340_rom_ext",
+        "//hw/top_earlgrey:sim_qemu_rom_ext",
+    ],
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    manifest = ":manifest_version_5",
     deps = [
+        ":boot_svc_test_lib",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_min_bl0_sec_ver",
+        "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
         "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
     ],
 )
+
+MIN_SEC_VER_SLOTS = [
+    "ab",
+    "ba",
+]
+
+[
+    opentitan_test(
+        name = "boot_svc_min_sec_ver_{}_test".format(slots[1]),
+        srcs = ["boot_svc_min_sec_ver_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{v0_slot} {min_sec_ver_5:signed_bin}@{v5_slot}",
+            binaries = {
+                ":min_sec_ver_5": "min_sec_ver_5",
+            },
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+                --exec="fpga clear-bitstream"
+                no-op
+            """,
+            v0_slot = "{{owner_slot_{}}}".format(slots[0]),
+            v5_slot = "{{owner_slot_{}}}".format(slots[1]),
+        ),
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+        manifest = ":manifest_version_4",
+        qemu = qemu_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {firmware}@{v0_slot} {min_sec_ver_5:signed_bin}@{v5_slot}",
+            binaries = {
+                ":min_sec_ver_5": "min_sec_ver_5",
+            },
+            v0_slot = "{{owner_slot_{}}}".format(slots[0]),
+            v5_slot = "{{owner_slot_{}}}".format(slots[1]),
+        ),
+        deps = [
+            ":boot_svc_test_lib",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_min_bl0_sec_ver",
+            "//sw/device/silicon_creator/lib/boot_svc:boot_svc_msg",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        ],
+    )
+    for slots in MIN_SEC_VER_SLOTS
+]
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_next_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_next_test.c
index 83bf9d727a14f..acde01eba56ef 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_next_test.c
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_next_test.c
@@ -16,7 +16,9 @@ OTTF_DEFINE_TEST_CONFIG();
 static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
   boot_svc_msg_t msg = {0};
   // Intentionally request a bad boot slot of 'ZZZZ'.
-  boot_svc_next_boot_bl0_slot_req_init(0x5a5a5a5a, &msg.next_boot_bl0_slot_req);
+  boot_svc_next_boot_bl0_slot_req_init(
+      /*primary_slot=*/kBootSlotUnspecified,
+      /*next_slot=*/0x5a5a5a5a, &msg.next_boot_bl0_slot_req);
   retram->creator.boot_svc_msg = msg;
   state->state = kBootSvcTestStateNextSideB;
   rstmgr_reset();
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_primary_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_primary_test.c
new file mode 100644
index 0000000000000..988497621cd8d
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_bad_primary_test.c
@@ -0,0 +1,82 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  // Intentionally request a bad primary slot of 'ZZZZ'.
+  boot_svc_next_boot_bl0_slot_req_init(
+      /*primary_slot=*/0x5a5a5a5a,
+      /*next_slot=*/kBootSlotB, &msg.next_boot_bl0_slot_req);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateNextSideB;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t check_side_b(retention_sram_t *retram,
+                             boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcNextBl0SlotResType);
+  TRY_CHECK(msg.next_boot_bl0_slot_res.status == kErrorBootSvcBadSlot);
+  TRY_CHECK(state->primary_side == 'A');
+  TRY_CHECK(state->current_side == 'B');
+  state->state = kBootSvcTestStateReturnSideA;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t check_return_side_a(retention_sram_t *retram,
+                                    boot_svc_retram_t *state) {
+  TRY_CHECK(state->primary_side == 'A');
+  TRY_CHECK(state->current_side == 'A');
+  state->state = kBootSvcTestStateFinal;
+  return OK_STATUS();
+}
+
+static status_t bad_next_slot_test(void) {
+  retention_sram_t *retram = retention_sram_get();
+  TRY(boot_svc_test_init(retram, kBootSvcTestEmpty));
+  boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
+
+  for (;;) {
+    LOG_INFO("Test state = %d", state->state);
+    switch (state->state) {
+      case kBootSvcTestStateInit:
+        TRY(initialize(retram, state));
+        break;
+      case kBootSvcTestStateNextSideB:
+        TRY(check_side_b(retram, state));
+        break;
+      case kBootSvcTestStateReturnSideA:
+        TRY(check_return_side_a(retram, state));
+        break;
+      case kBootSvcTestStateFinal:
+        LOG_INFO("FinalBootLog: %d:%s", state->boots, state->partition);
+        return OK_STATUS();
+      default:
+        LOG_ERROR("Unknown state: %d", state->state);
+        return UNKNOWN();
+    }
+  }
+}
+
+bool test_main(void) {
+  status_t sts = bad_next_slot_test();
+  if (status_err(sts)) {
+    LOG_ERROR("bad_next_slot_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_empty_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_empty_test.c
index c673aa23d6c1d..2a6215740acb9 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_empty_test.c
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_empty_test.c
@@ -16,7 +16,7 @@ OTTF_DEFINE_TEST_CONFIG();
 
 static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
   boot_svc_msg_t msg = {0};
-  boot_svc_empty_init(&msg.empty);
+  boot_svc_empty_req_init(&msg.empty);
   retram->creator.boot_svc_msg = msg;
   state->state = kBootSvcTestStateCheckEmpty;
   rstmgr_reset();
@@ -27,11 +27,31 @@ static status_t check_empty(retention_sram_t *retram,
                             boot_svc_retram_t *state) {
   boot_svc_msg_t msg = retram->creator.boot_svc_msg;
   TRY(boot_svc_header_check(&msg.header));
-  TRY_CHECK(msg.header.type == kBootSvcEmptyType);
-  state->state = kBootSvcTestStateFinal;
+  TRY_CHECK(msg.header.type == kBootSvcEmptyResType);
+  state->state = kBootSvcTestStateEmptyRes;
   return OK_STATUS();
 }
 
+static status_t send_empty_res(retention_sram_t *retram,
+                               boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  boot_svc_empty_res_init(&msg.empty);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateInvalidMsg;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t send_invalid_msg(retention_sram_t *retram,
+                                 boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  boot_svc_header_finalize(0x1234, sizeof(boot_svc_msg_t), &msg.header);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateFinal;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
 static status_t empty_message_test(void) {
   retention_sram_t *retram = retention_sram_get();
   TRY(boot_svc_test_init(retram, kBootSvcTestEmpty));
@@ -46,6 +66,12 @@ static status_t empty_message_test(void) {
       case kBootSvcTestStateCheckEmpty:
         TRY(check_empty(retram, state));
         break;
+      case kBootSvcTestStateEmptyRes:
+        TRY(send_empty_res(retram, state));
+        break;
+      case kBootSvcTestStateInvalidMsg:
+        TRY(send_invalid_msg(retram, state));
+        break;
       case kBootSvcTestStateFinal:
         LOG_INFO("FinalBootLog: %d:%s", state->boots, state->partition);
         return OK_STATUS();
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_enter_rescue_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_enter_rescue_test.c
new file mode 100644
index 0000000000000..65db74fa45487
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_enter_rescue_test.c
@@ -0,0 +1,52 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  boot_svc_enter_rescue_req_init(/*skip_once=*/kHardenedBoolFalse,
+                                 &msg.enter_rescue_req);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateEnterRescue;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t enter_rescue_message_test(void) {
+  retention_sram_t *retram = retention_sram_get();
+  TRY(boot_svc_test_init(retram, kBootSvcTestEmpty));
+  boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
+
+  for (;;) {
+    LOG_INFO("Test state = %d", state->state);
+    switch (state->state) {
+      case kBootSvcTestStateInit:
+        TRY(initialize(retram, state));
+        break;
+      default:
+        // We never expect to come back because the test's exit_success is to
+        // observe the rescue entry message.
+        LOG_INFO("Unexpected State: %d", state->state);
+        return UNKNOWN();
+    }
+  }
+}
+
+bool test_main(void) {
+  status_t sts = enter_rescue_message_test();
+  if (status_err(sts)) {
+    LOG_ERROR("enter_rescue_message_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_min_sec_ver_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_min_sec_ver_test.c
new file mode 100644
index 0000000000000..ff5fced071ee1
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_min_sec_ver_test.c
@@ -0,0 +1,132 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_min_bl0_sec_ver.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+#define MANIFEST_SEC_VER 4
+
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  LOG_INFO("Initialize: try to advance to min_sec_ver %d", 2);
+  boot_svc_min_bl0_sec_ver_req_init(2, &msg.min_bl0_sec_ver_req);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateMinSecAdvance;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t advance(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcMinBl0SecVerResType);
+  LOG_INFO("Response: status=%08x min_bl0_sec_ver=%d",
+           msg.min_bl0_sec_ver_res.status,
+           msg.min_bl0_sec_ver_res.min_bl0_sec_ver);
+
+  TRY_CHECK(msg.min_bl0_sec_ver_res.status == kErrorOk);
+
+  if (msg.min_bl0_sec_ver_res.min_bl0_sec_ver < MANIFEST_SEC_VER) {
+    // Advance by one and check again for success
+    LOG_INFO("Advance: try to advance to min_sec_ver %d",
+             msg.min_bl0_sec_ver_res.min_bl0_sec_ver + 1);
+    boot_svc_min_bl0_sec_ver_req_init(
+        msg.min_bl0_sec_ver_res.min_bl0_sec_ver + 1, &msg.min_bl0_sec_ver_req);
+    retram->creator.boot_svc_msg = msg;
+    rstmgr_reset();
+  }
+
+  if (msg.min_bl0_sec_ver_res.min_bl0_sec_ver == MANIFEST_SEC_VER) {
+    // Advance by one and check for failure
+    LOG_INFO("Too Far: try to advance to min_sec_ver %d",
+             msg.min_bl0_sec_ver_res.min_bl0_sec_ver + 1);
+    state->state = kBootSvcTestStateMinSecTooFar;
+    boot_svc_min_bl0_sec_ver_req_init(
+        msg.min_bl0_sec_ver_res.min_bl0_sec_ver + 1, &msg.min_bl0_sec_ver_req);
+    retram->creator.boot_svc_msg = msg;
+    rstmgr_reset();
+  }
+  return INTERNAL();
+}
+
+static status_t too_far(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcMinBl0SecVerResType);
+  LOG_INFO("Response: status=%08x min_bl0_sec_ver=%d",
+           msg.min_bl0_sec_ver_res.status,
+           msg.min_bl0_sec_ver_res.min_bl0_sec_ver);
+  TRY_CHECK(msg.min_bl0_sec_ver_res.status == kErrorBootSvcBadSecVer);
+  TRY_CHECK(msg.min_bl0_sec_ver_res.min_bl0_sec_ver == MANIFEST_SEC_VER);
+
+  // Try to go back
+  LOG_INFO("Go Back: try to advance to min_sec_ver %d",
+           msg.min_bl0_sec_ver_res.min_bl0_sec_ver - 1);
+  state->state = kBootSvcTestStateMinSecGoBack;
+  boot_svc_min_bl0_sec_ver_req_init(msg.min_bl0_sec_ver_res.min_bl0_sec_ver - 1,
+                                    &msg.min_bl0_sec_ver_req);
+  retram->creator.boot_svc_msg = msg;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t go_back(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcMinBl0SecVerResType);
+  LOG_INFO("Response: status=%08x min_bl0_sec_ver=%d",
+           msg.min_bl0_sec_ver_res.status,
+           msg.min_bl0_sec_ver_res.min_bl0_sec_ver);
+  TRY_CHECK(msg.min_bl0_sec_ver_res.status == kErrorBootSvcBadSecVer);
+  TRY_CHECK(msg.min_bl0_sec_ver_res.min_bl0_sec_ver == MANIFEST_SEC_VER);
+
+  // End of test sequence.
+  state->state = kBootSvcTestStateFinal;
+  return OK_STATUS();
+}
+
+static status_t min_sec_ver_test(void) {
+  retention_sram_t *retram = retention_sram_get();
+  TRY(boot_svc_test_init(retram, kBootSvcTestBl0MinSecVer));
+  boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
+
+  for (;;) {
+    LOG_INFO("Test state = %d", state->state);
+    switch (state->state) {
+      case kBootSvcTestStateInit:
+        TRY(initialize(retram, state));
+        break;
+      case kBootSvcTestStateMinSecAdvance:
+        TRY(advance(retram, state));
+        break;
+      case kBootSvcTestStateMinSecTooFar:
+        TRY(too_far(retram, state));
+        break;
+      case kBootSvcTestStateMinSecGoBack:
+        TRY(go_back(retram, state));
+        break;
+      case kBootSvcTestStateFinal:
+        LOG_INFO("FinalBootLog: %d:%s", state->boots, state->partition);
+        return OK_STATUS();
+      default:
+        return UNKNOWN();
+    }
+  }
+}
+
+bool test_main(void) {
+  status_t sts = min_sec_ver_test();
+  if (status_err(sts)) {
+    LOG_ERROR("min_sec_ver_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_next_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_next_test.c
index 65b034fd99ecc..94a8c3ab2c135 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_next_test.c
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_next_test.c
@@ -13,37 +13,79 @@
 
 OTTF_DEFINE_TEST_CONFIG();
 
-static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+static status_t next(retention_sram_t *retram, uint32_t primary_slot,
+                     uint32_t next_slot) {
   boot_svc_msg_t msg = {0};
-  boot_svc_next_boot_bl0_slot_req_init(kBootSlotB, &msg.next_boot_bl0_slot_req);
+  boot_svc_next_boot_bl0_slot_req_init(primary_slot, next_slot,
+                                       &msg.next_boot_bl0_slot_req);
   retram->creator.boot_svc_msg = msg;
-  state->state = kBootSvcTestStateNextSideB;
   rstmgr_reset();
   return INTERNAL();
 }
 
-static status_t check_side_b(retention_sram_t *retram,
-                             boot_svc_retram_t *state) {
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  state->state = kBootSvcTestStateNextSideB;
+
+#if defined(TEST_SEQUENCE_ABA)
+  TRY(next(retram, kBootSlotUnspecified, kBootSlotB));
+#elif defined(TEST_SEQUENCE_AAB)
+  TRY(next(retram, kBootSlotB, kBootSlotA));
+#elif defined(TEST_SEQUENCE_ABB)
+  TRY(next(retram, kBootSlotB, kBootSlotUnspecified));
+#else
+#error "test sequence is not defined"
+#endif
+
+  return INTERNAL();
+}
+
+static status_t check_side_next(retention_sram_t *retram,
+                                boot_svc_retram_t *state) {
+  state->state = kBootSvcTestStateReturnSideA;
+
   boot_svc_msg_t msg = retram->creator.boot_svc_msg;
   TRY(boot_svc_header_check(&msg.header));
   TRY_CHECK(msg.header.type == kBootSvcNextBl0SlotResType);
   TRY_CHECK(msg.next_boot_bl0_slot_res.status == kErrorOk);
+
+#if defined(TEST_SEQUENCE_ABA)
   TRY_CHECK(state->current_side == 'B');
-  state->state = kBootSvcTestStateReturnSideA;
+  TRY_CHECK(state->primary_side == 'A');
+  TRY_CHECK(msg.next_boot_bl0_slot_res.primary_bl0_slot == kBootSlotA);
+#elif defined(TEST_SEQUENCE_AAB)
+  TRY_CHECK(state->current_side == 'A');
+  TRY_CHECK(state->primary_side == 'B');
+  TRY_CHECK(msg.next_boot_bl0_slot_res.primary_bl0_slot == kBootSlotB);
+#elif defined(TEST_SEQUENCE_ABB)
+  TRY_CHECK(state->current_side == 'B');
+  TRY_CHECK(state->primary_side == 'B');
+  TRY_CHECK(msg.next_boot_bl0_slot_res.primary_bl0_slot == kBootSlotB);
+  TRY(next(retram, kBootSlotA, kBootSlotB));
+#endif
+
   rstmgr_reset();
   return INTERNAL();
 }
 
-static status_t check_return_side_a(retention_sram_t *retram,
-                                    boot_svc_retram_t *state) {
+static status_t check_return_side_primary(retention_sram_t *retram,
+                                          boot_svc_retram_t *state) {
+#if defined(TEST_SEQUENCE_ABA)
   TRY_CHECK(state->current_side == 'A');
+  TRY_CHECK(state->primary_side == 'A');
+#elif defined(TEST_SEQUENCE_AAB)
+  TRY_CHECK(state->current_side == 'B');
+  TRY_CHECK(state->primary_side == 'B');
+#elif defined(TEST_SEQUENCE_ABB)
+  TRY_CHECK(state->current_side == 'B');
+  TRY_CHECK(state->primary_side == 'A');
+#endif
   state->state = kBootSvcTestStateFinal;
   return OK_STATUS();
 }
 
 static status_t next_bl0_slot_test(void) {
   retention_sram_t *retram = retention_sram_get();
-  TRY(boot_svc_test_init(retram, kBootSvcTestEmpty));
+  TRY(boot_svc_test_init(retram, kBootSvcTestNextBl0));
   boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
 
   for (;;) {
@@ -54,10 +96,10 @@ static status_t next_bl0_slot_test(void) {
         TRY(initialize(retram, state));
         break;
       case kBootSvcTestStateNextSideB:
-        TRY(check_side_b(retram, state));
+        TRY(check_side_next(retram, state));
         break;
       case kBootSvcTestStateReturnSideA:
-        TRY(check_return_side_a(retram, state));
+        TRY(check_return_side_primary(retram, state));
         break;
       case kBootSvcTestStateFinal:
         LOG_INFO("FinalBootLog: %d:%s", state->boots, state->partition);
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_primary_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_primary_test.c
new file mode 100644
index 0000000000000..68b3bf90a63c1
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_primary_test.c
@@ -0,0 +1,96 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_next_boot_bl0_slot.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  TRY_CHECK(state->primary_side == 'A');
+  boot_svc_next_boot_bl0_slot_req_init(
+      /*primary_slot=*/kBootSlotB,
+      /*next_slot=*/kBootSlotUnspecified, &msg.next_boot_bl0_slot_req);
+
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateNextSideB;
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t check_side_b(retention_sram_t *retram,
+                             boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcNextBl0SlotResType);
+  TRY_CHECK(msg.next_boot_bl0_slot_res.status == kErrorOk);
+  TRY_CHECK(msg.next_boot_bl0_slot_res.primary_bl0_slot == kBootSlotB);
+  TRY_CHECK(state->current_side == 'B');
+  TRY_CHECK(state->primary_side == 'B');
+  if (state->boots == 4) {
+    // When we reach 4 boots, transition back to SlotA.
+    boot_svc_next_boot_bl0_slot_req_init(
+        /*primary_slot=*/kBootSlotA,
+        /*next_slot=*/kBootSlotUnspecified, &msg.next_boot_bl0_slot_req);
+    retram->creator.boot_svc_msg = msg;
+    state->state = kBootSvcTestStateReturnSideA;
+  }
+  rstmgr_reset();
+  return INTERNAL();
+}
+
+static status_t check_return_side_a(retention_sram_t *retram,
+                                    boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+  TRY_CHECK(msg.header.type == kBootSvcNextBl0SlotResType);
+  TRY_CHECK(state->current_side == 'A');
+  TRY_CHECK(state->primary_side == 'A');
+  TRY_CHECK(msg.next_boot_bl0_slot_res.primary_bl0_slot == kBootSlotA);
+  state->state = kBootSvcTestStateFinal;
+  return OK_STATUS();
+}
+
+static status_t next_boot_bl0_slot_test(void) {
+  retention_sram_t *retram = retention_sram_get();
+  TRY(boot_svc_test_init(retram, kBootSvcTestPrimaryBl0));
+  boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
+
+  for (;;) {
+    LOG_INFO("Test state = %d", state->state);
+    LOG_INFO("CurrentBootLog: %d:%s", state->boots, state->partition);
+    switch (state->state) {
+      case kBootSvcTestStateInit:
+        TRY(initialize(retram, state));
+        break;
+      case kBootSvcTestStateNextSideB:
+        TRY(check_side_b(retram, state));
+        break;
+      case kBootSvcTestStateReturnSideA:
+        TRY(check_return_side_a(retram, state));
+        break;
+      case kBootSvcTestStateFinal:
+        LOG_INFO("FinalBootLog: %d:%s", state->boots, state->partition);
+        return OK_STATUS();
+      default:
+        LOG_ERROR("Unknown state: %d", state->state);
+        return UNKNOWN();
+    }
+  }
+}
+
+bool test_main(void) {
+  status_t sts = next_boot_bl0_slot_test();
+  if (status_err(sts)) {
+    LOG_ERROR("next_boot_bl0_slot_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.c
index df6b3b9cd1215..f4fda18aeb104 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.c
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.c
@@ -32,6 +32,9 @@ status_t boot_svc_test_init(retention_sram_t *retram, boot_svc_test_t test) {
   state->current_side = (boot_log->bl0_slot == kBootSlotA)   ? 'A'
                         : (boot_log->bl0_slot == kBootSlotB) ? 'B'
                                                              : 'x';
+  state->primary_side = (boot_log->primary_bl0_slot == kBootSlotA)   ? 'A'
+                        : (boot_log->primary_bl0_slot == kBootSlotB) ? 'B'
+                                                                     : 'x';
   state->partition[state->boots] = state->current_side;
   state->boots += 1;
   return OK_STATUS();
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h
index ba4747179820e..0c2370cfac263 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h
@@ -9,13 +9,24 @@
 
 typedef enum boot_svc_test {
   kBootSvcTestEmpty = 1,
+  kBootSvcTestNextBl0 = 2,
+  kBootSvcTestBadNextBl0 = 3,
+  kBootSvcTestBl0MinSecVer = 4,
+  kBootSvcTestWakeup = 5,
+  kBootSvcTestPrimaryBl0 = 6,
 } boot_svc_test_t;
 
 typedef enum boot_svc_test_state {
   kBootSvcTestStateInit = 0,
   kBootSvcTestStateCheckEmpty,
+  kBootSvcTestStateEmptyRes,
+  kBootSvcTestStateInvalidMsg,
   kBootSvcTestStateNextSideB,
   kBootSvcTestStateReturnSideA,
+  kBootSvcTestStateMinSecAdvance,
+  kBootSvcTestStateMinSecTooFar,
+  kBootSvcTestStateMinSecGoBack,
+  kBootSvcTestStateEnterRescue,
   kBootSvcTestStateFinal,
 } boot_svc_test_state_t;
 
@@ -28,6 +39,8 @@ typedef struct boot_svc_retram {
   int boots;
   // The side we're currently booted to.
   char current_side;
+  // The primary side.
+  char primary_side;
   // The owner partition that was booted on each boot.
   char partition[10];
 } boot_svc_retram_t;
diff --git a/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_wakeup_test.c b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_wakeup_test.c
new file mode 100644
index 0000000000000..4a559e9e9bcd9
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_wakeup_test.c
@@ -0,0 +1,112 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_aon_timer.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/rom_ext/e2e/boot_svc/boot_svc_test_lib.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_pwrmgr_t pwrmgr;
+static dif_aon_timer_t aon_timer;
+
+static status_t test_init(void) {
+  // Initialize aon timer to use the wdog.
+  CHECK_DIF_OK(dif_aon_timer_init(
+      mmio_region_from_addr(TOP_EARLGREY_AON_TIMER_AON_BASE_ADDR), &aon_timer));
+  TRY(dif_pwrmgr_init(mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR),
+                      &pwrmgr));
+  return OK_STATUS();
+}
+
+static status_t deep_sleep_enter(uint32_t wakeup_ticks) {
+  dif_pwrmgr_domain_config_t pwrmgr_domain_cfg = 0;
+  // WakeupSourceFive is the AonTimer source.
+  // See hw/top_earlgrey/ip_autogen/pwrmgr/dv/env/pwrmgr_env_pkg.sv%wakeup_e.
+  TRY(pwrmgr_testutils_enable_low_power(
+      &pwrmgr, kDifPwrmgrWakeupRequestSourceFive, pwrmgr_domain_cfg));
+  TRY(dif_aon_timer_wakeup_start(&aon_timer, wakeup_ticks, 0));
+  LOG_INFO("Going to sleep.");
+  wait_for_interrupt();
+  LOG_INFO("Unexpected wakeup from deep sleep.");
+  return UNKNOWN();
+}
+
+static status_t deep_sleep_check(void) {
+  bool wkup = TRY(pwrmgr_testutils_is_wakeup_reason(
+      &pwrmgr, kDifPwrmgrWakeupRequestSourceFive));
+  return OK_STATUS(wkup);
+}
+
+static status_t initialize(retention_sram_t *retram, boot_svc_retram_t *state) {
+  boot_svc_msg_t msg = {0};
+  boot_svc_empty_req_init(&msg.empty);
+  retram->creator.boot_svc_msg = msg;
+  state->state = kBootSvcTestStateCheckEmpty;
+  TRY(deep_sleep_enter((uint32_t)kClockFreqAonHz));
+  return INTERNAL();
+}
+
+static status_t check_empty(retention_sram_t *retram,
+                            boot_svc_retram_t *state) {
+  if (!TRY(deep_sleep_check())) {
+    LOG_ERROR("Expected wakup from deep sleep");
+    return INTERNAL();
+  }
+  boot_svc_msg_t msg = retram->creator.boot_svc_msg;
+  TRY(boot_svc_header_check(&msg.header));
+#if BOOT_SVC_AFTER_WAKEUP_ENABLED == 0
+  // We expect the `EmptyReqType` here because the ROM_EXT should not process
+  // boot_svc requests when waking from deep sleep.
+  TRY_CHECK(msg.header.type == kBootSvcEmptyReqType);
+#else  // WAKEUP_ENABLED == 1
+  // We expect the `EmptyResType` here because the ROM_EXT should process
+  // boot_svc requests when waking from deep sleep.
+  TRY_CHECK(msg.header.type == kBootSvcEmptyResType);
+#endif
+  state->state = kBootSvcTestStateFinal;
+  return OK_STATUS();
+}
+
+static status_t empty_message_test(void) {
+  TRY(test_init());
+  retention_sram_t *retram = retention_sram_get();
+  TRY(boot_svc_test_init(retram, kBootSvcTestWakeup));
+  boot_svc_retram_t *state = (boot_svc_retram_t *)&retram->owner;
+
+  for (;;) {
+    LOG_INFO("Test state = %d", state->state);
+    switch (state->state) {
+      case kBootSvcTestStateInit:
+        TRY(initialize(retram, state));
+        break;
+      case kBootSvcTestStateCheckEmpty:
+        TRY(check_empty(retram, state));
+        break;
+      case kBootSvcTestStateFinal:
+        return OK_STATUS();
+      default:
+        return UNKNOWN();
+    }
+  }
+}
+
+bool test_main(void) {
+  status_t sts = empty_message_test();
+  if (status_err(sts)) {
+    LOG_ERROR("boot_svc_wakeup_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/defs.bzl b/sw/device/silicon_creator/rom_ext/e2e/defs.bzl
new file mode 100644
index 0000000000000..79df1ac52c893
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/defs.bzl
@@ -0,0 +1,10 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+OWNER_SLOTS = {
+    "a": "{owner_slot_a}",
+    "b": "{owner_slot_b}",
+}
+
+DEVICE_ID = "0000000011111111222222223333333344444444555555556666666600010001"
diff --git a/sw/device/silicon_creator/rom_ext/e2e/dice_chain/BUILD b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/BUILD
new file mode 100644
index 0000000000000..431b1ca648ad7
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/BUILD
@@ -0,0 +1,276 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex")
+load("//rules:manifest.bzl", "manifest")
+load("//rules/opentitan:cc.bzl", "opentitan_binary_assemble")
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_test",
+    "qemu_params",
+)
+load(
+    "//sw/device/silicon_creator/rom/e2e:defs.bzl",
+    "SLOTS",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext/e2e:defs.bzl",
+    "OWNER_SLOTS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+[
+    opentitan_test(
+        name = "no_refresh_{}_test".format(variation),
+        srcs = ["no_refresh_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+        },
+        fpga = fpga_params(
+            exit_failure = "Rebooting[\\s\\S]*CDI_1 certificate not valid[\\s\\S]*Rebooted",
+            exit_success = "Rebooted\r\n",
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_{}_slot_a".format(variation),
+        ),
+        qemu = qemu_params(
+            exit_failure = "Rebooting[\\s\\S]*CDI_1 certificate not valid[\\s\\S]*Rebooted",
+            exit_success = "Rebooted\r\n",
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_{}_slot_a".format(variation),
+        ),
+        deps = [
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        ],
+    )
+    for variation in ROM_EXT_VARIATIONS.keys()
+]
+
+manifest({
+    "name": "owner_manifest",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:private"],
+})
+
+opentitan_binary(
+    name = "print_certs_for_assemble",
+    testonly = True,
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/attestation:print_certs.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+    manifest = ":owner_manifest",
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+    ],
+)
+
+[
+    opentitan_binary_assemble(
+        name = "{}_rom_ext_owner_bundle".format(variation),
+        testonly = True,
+        bins = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_{}_slot_a".format(variation): SLOTS["a"],
+            ":print_certs_for_assemble": OWNER_SLOTS["a"],
+        },
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys",
+        ],
+    )
+    for variation in ROM_EXT_VARIATIONS.keys()
+]
+
+_VARIATION_INTEROP_TEST_CASES = [
+    {
+        "first": "x509",
+        "second": "cwt",
+    },
+    {
+        "first": "cwt",
+        "second": "x509",
+    },
+]
+
+[
+    opentitan_test(
+        name = "variation_interop_{}_first_test".format(tc["first"]),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+        },
+        fpga = fpga_params(
+            binaries = {
+                ":dice_{}_rom_ext_owner_bundle".format(tc["second"]): "second",
+                ":dice_{}_rom_ext_owner_bundle".format(tc["first"]): "firmware",
+            },
+            otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma",
+            test_cmd = """
+                --clear-bitstream
+                --bootstrap={firmware}
+                --second-bootstrap={second}
+            """,
+            test_harness = "//sw/host/tests/rom_ext/e2e_variation_interop",
+        ),
+        qemu = qemu_params(
+            binaries = {
+                ":dice_{}_rom_ext_owner_bundle".format(tc["second"]): "second",
+                ":dice_{}_rom_ext_owner_bundle".format(tc["first"]): "firmware",
+            },
+            otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma",
+            test_cmd = """
+                --bootstrap={firmware}
+                --second-bootstrap={second}
+            """,
+            test_harness = "//sw/host/tests/rom_ext/e2e_variation_interop",
+        ),
+    )
+    for tc in _VARIATION_INTEROP_TEST_CASES
+]
+
+test_suite(
+    name = "variation_interop_tests",
+    tags = ["manual"],
+    tests = [
+        "variation_interop_{}_first_test".format(
+            tc["first"],
+        )
+        for tc in _VARIATION_INTEROP_TEST_CASES
+    ],
+)
+
+opentitan_binary(
+    name = "modify_digest",
+    testonly = True,
+    srcs = ["modify_digest.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys",
+    ],
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+    ],
+)
+
+CORRUPTED_DIGEST_TEST_CMDS = """
+    --exec="no-op --info='##### Prepare CDI cert page'"
+    --exec="bootstrap --clear-uart=true {firmware}"
+    --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}' --timeout=10s"
+    --exec="no-op --info='##### Corrupt CDI cert page'"
+    --exec="bootstrap --clear-uart=true {modify_digest}"
+    --exec="console --non-interactive --exit-success='PASS!' --timeout=10s"
+    --exec="bootstrap --clear-uart=true {firmware}"
+    --exec="no-op --info='##### Corruption should be detected and reboot'"
+    --exec="console --non-interactive --exit-success='BFV:03444303' --exit-failure='{exit_success}' --timeout=10s"
+    --exec="no-op --info='##### Corruption fixed in the second boot'"
+    --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}' --timeout=10s"
+    no-op
+"""
+
+opentitan_test(
+    name = "corrupted_digest_test",
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(
+        binaries = {
+            ":modify_digest": "modify_digest",
+        },
+        test_cmd = ("""
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+        """ + CORRUPTED_DIGEST_TEST_CMDS),
+    ),
+    qemu = qemu_params(
+        binaries = {
+            ":modify_digest": "modify_digest",
+        },
+        test_cmd = ("""
+            --exec="transport init"
+        """ + CORRUPTED_DIGEST_TEST_CMDS),
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+DEBUG_MODE_TESTCASES = [
+    {
+        "name": "off",
+        "key": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        "defines": ["TEST_EXPECT_DEBUG_OFF=1"],
+    },
+    {
+        "name": "on",
+        "key": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_test_0"},
+        "defines": ["TEST_EXPECT_DEBUG_ON=1"],
+    },
+]
+
+[
+    opentitan_test(
+        name = "debug_mode_{}_{}_test".format(
+            testcase["name"],
+            variation,
+        ),
+        srcs = ["debug_mode_test.c"],
+        defines = testcase["defines"],
+        ecdsa_key = testcase["key"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+        },
+        fpga = fpga_params(
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_{}_slot_a".format(variation),
+        ),
+        qemu = qemu_params(
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_{}_slot_a".format(variation),
+        ),
+        deps = [
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:check",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/manuf/base:perso_tlv_data",
+        ],
+    )
+    for testcase in DEBUG_MODE_TESTCASES
+    for variation in ROM_EXT_VARIATIONS.keys()
+]
diff --git a/sw/device/silicon_creator/rom_ext/e2e/dice_chain/debug_mode_test.c b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/debug_mode_test.c
new file mode 100644
index 0000000000000..a65587cc2c95e
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/debug_mode_test.c
@@ -0,0 +1,143 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/manuf/base/perso_tlv_data.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+enum {
+  kX509Cdi1DebugOffset = 585,
+  kCwtCdi1DebugOffset = 266,
+};
+
+const char kX509Cdi1DebugOff[] = {
+    // kAsn1TagClassContext | DiceTcbInfoFlags (7)
+    0x87,
+    // 4-bit BitString
+    0x02,
+    0x04,
+    // Debug mode = 0
+    0x00,
+};
+
+const char kX509Cdi1DebugOn[] = {
+    // kAsn1TagClassContext | DiceTcbInfoFlags (7)
+    0x87,
+    // 4-bit BitString
+    0x02,
+    0x04,
+    // Debug mode = 1
+    0x10,
+};
+
+const char kCwtCdi1DebugOff[] = {
+    // map label: mode (-4670551)
+    0x3a,
+    0x00,
+    0x47,
+    0x44,
+    0x56,
+    // 1-byte bytestring
+    0x41,
+    // Debug mode = normal (1)
+    0x01,
+};
+
+const char kCwtCdi1DebugOn[] = {
+    // map label: mode (-4670551)
+    0x3a,
+    0x00,
+    0x47,
+    0x44,
+    0x56,
+    // 1-byte bytestring
+    0x41,
+    // Debug mode = debug (2)
+    0x02,
+};
+
+static status_t test_debug_mode(void) {
+  uint8_t data[2048];
+  TRY(flash_ctrl_info_read(&kFlashCtrlInfoPageDiceCerts, 0,
+                           sizeof(data) / sizeof(uint32_t), data));
+
+  uint32_t offset = 0;
+  size_t len = sizeof(data);
+  while (true) {
+    perso_tlv_cert_obj_t obj = {0};
+    rom_error_t err = perso_tlv_get_cert_obj(data + offset, len, &obj);
+    if (err != kErrorOk) {
+      break;
+    }
+    offset += (obj.obj_size + 7) & ~7u;
+    len -= obj.obj_size;
+
+    LOG_INFO("%s type=%d sz=%d", obj.name, obj.obj_type, obj.obj_size);
+
+    // Test for CDI_1
+    if (memcmp(obj.name, "CDI_1", 5) != 0) {
+      continue;
+    }
+
+    // Extract debug mode from the attestation
+    uint8_t debug_mode = 0x42;
+    if (obj.obj_type == kPersoObjectTypeX509Cert) {
+      uint8_t *mode_ptr = obj.cert_body_p + kX509Cdi1DebugOffset;
+      if (memcmp(mode_ptr, kX509Cdi1DebugOn, sizeof(kX509Cdi1DebugOn)) == 0) {
+        debug_mode = true;
+      } else if (memcmp(mode_ptr, kX509Cdi1DebugOff,
+                        sizeof(kX509Cdi1DebugOff)) == 0) {
+        debug_mode = false;
+      } else {
+        LOG_INFO("Unknown x509 debug mode");
+        return INVALID_ARGUMENT();
+      }
+    } else if (obj.obj_type == kPersoObjectTypeCwtCert) {
+      uint8_t *mode_ptr = obj.cert_body_p + kCwtCdi1DebugOffset;
+      if (memcmp(mode_ptr, kCwtCdi1DebugOn, sizeof(kCwtCdi1DebugOn)) == 0) {
+        debug_mode = true;
+      } else if (memcmp(mode_ptr, kCwtCdi1DebugOff, sizeof(kCwtCdi1DebugOff)) ==
+                 0) {
+        debug_mode = false;
+      } else {
+        LOG_INFO("Unknown CWT debug mode");
+        return INVALID_ARGUMENT();
+      }
+    } else {
+      LOG_INFO("Unknown CDI_1 format");
+      return INVALID_ARGUMENT();
+    }
+
+    // Assert the debug mode expectation
+    if (debug_mode == true) {
+      LOG_INFO("debug = true");
+#ifdef TEST_EXPECT_DEBUG_ON
+      return OK_STATUS();
+#endif
+    } else if (debug_mode == false) {
+      LOG_INFO("debug = false");
+#ifdef TEST_EXPECT_DEBUG_OFF
+      return OK_STATUS();
+#endif
+    } else {
+      LOG_INFO("Unknown debug mode");
+      return INVALID_ARGUMENT();
+    }
+  }
+
+  return UNKNOWN();
+}
+
+bool test_main(void) {
+  status_t sts = test_debug_mode();
+  if (status_err(sts)) {
+    LOG_ERROR("test_debug_mode: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/dice_chain/modify_digest.c b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/modify_digest.c
new file mode 100644
index 0000000000000..fecbaa0dcedbe
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/modify_digest.c
@@ -0,0 +1,55 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+
+#include "flash_ctrl_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+enum {
+  kNumWords = FLASH_CTRL_PARAM_BYTES_PER_PAGE / sizeof(uint32_t),
+};
+
+static status_t clear_digest_page(const flash_ctrl_info_page_t *info_page) {
+  uint32_t data[kNumWords];
+
+  TRY(flash_ctrl_info_read_zeros_on_read_error(info_page, 0, kNumWords, data));
+
+  // Invalidate the digest
+  uint32_t prev = data[kNumWords - 1];
+  data[kNumWords - 1] ^= 1;
+  LOG_INFO("Modify digest %x -> %x", prev, data[kNumWords - 1]);
+
+  TRY(flash_ctrl_info_erase(info_page, kFlashCtrlEraseTypePage));
+  TRY(flash_ctrl_info_write(info_page, 0, kNumWords, data));
+
+  return OK_STATUS();
+}
+
+static status_t modify_digest_test(void) {
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageFactoryCerts);
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageDiceCerts);
+  TRY(clear_digest_page(&kFlashCtrlInfoPageFactoryCerts));
+  TRY(clear_digest_page(&kFlashCtrlInfoPageDiceCerts));
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  // This test intentionally creates an invalid digest triggering recoverable
+  // errors. Ignore the alert in OTTF.
+  ottf_alerts_ignore_alert(kTopEarlgreyAlertIdFlashCtrlRecovErr);
+
+  status_t sts = modify_digest_test();
+  if (status_err(sts)) {
+    LOG_ERROR("modify_digest_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/dice_chain/no_refresh_test.c b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/no_refresh_test.c
new file mode 100644
index 0000000000000..d0d22f53d002f
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/dice_chain/no_refresh_test.c
@@ -0,0 +1,25 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  retention_sram_t *retram = retention_sram_get();
+
+  if (bitfield_bit32_read(retram->creator.reset_reasons,
+                          kRstmgrReasonPowerOn)) {
+    LOG_INFO("Rebooting");
+    rstmgr_reset();
+    return false;
+  }
+  LOG_INFO("Rebooted");
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/BUILD b/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/BUILD
new file mode 100644
index 0000000000000..90bfe1f9d45ed
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/BUILD
@@ -0,0 +1,257 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules:const.bzl",
+    "CONST",
+    "hex",
+    "hex_digits",
+)
+load(
+    "//rules:manifest.bzl",
+    "manifest",
+)
+load(
+    "//rules:otp.bzl",
+    "STD_OTP_OVERLAYS",
+    "otp_hex",
+    "otp_image",
+    "otp_json",
+    "otp_partition",
+)
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_test",
+)
+load(
+    "//sw/device/silicon_creator/rom/e2e:defs.bzl",
+    "SLOTS",
+)
+load(
+    "//sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error:defs.bzl",
+    "BOOT_POLICY_FLASH_ECC_ERROR_TESTS",
+    "FLASH_ECC_ERROR_CAUSES",
+    "SEC_VERS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+otp_json(
+    name = "otp_json_flash_data_cfg_default_scr_and_ecc_enabled",
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items = {
+                # Enable flash data page scrambling and ECC.
+                "CREATOR_SW_CFG_FLASH_DATA_DEFAULT_CFG": "0000090606",
+            },
+        ),
+    ],
+)
+
+otp_json(
+    name = "otp_json_flash_exc_handler_disabled",
+    partitions = [
+        otp_partition(
+            name = "OWNER_SW_CFG",
+            items = {
+                "OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN": otp_hex(CONST.HARDENED_FALSE),
+            },
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_img_flash_ecc_error",
+    src = "//hw/ip/otp_ctrl/data:otp_json_prod",
+    overlays = STD_OTP_OVERLAYS + [
+        ":otp_json_flash_data_cfg_default_scr_and_ecc_enabled",
+    ],
+    visibility = ["//visibility:private"],
+)
+
+otp_image(
+    name = "otp_img_flash_exc_handler_disabled",
+    src = "//hw/ip/otp_ctrl/data:otp_json_prod",
+    overlays = STD_OTP_OVERLAYS + [
+        ":otp_json_flash_data_cfg_default_scr_and_ecc_enabled",
+        ":otp_json_flash_exc_handler_disabled",
+    ],
+    visibility = ["//visibility:private"],
+)
+
+opentitan_binary(
+    name = "secret_page_setup",
+    testonly = True,
+    srcs = ["secret_page_setup.c"],
+    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+    ],
+    deps = [
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+[
+    opentitan_binary(
+        name = "uncorrupted_test_slot_{}".format(slot),
+        testonly = True,
+        srcs = ["//sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error:uncorrupted_test_src"],
+        exec_env = [
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+            "//hw/top_earlgrey:fpga_cw340_rom_ext",
+        ],
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_{}".format(slot),
+        deps = [
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        ],
+    )
+    for slot in SLOTS
+]
+
+[
+    opentitan_binary(
+        name = "flash_ecc_self_corruption_slot_{}_{}".format(
+            slot,
+            c["cause"],
+        ),
+        testonly = True,
+        srcs = ["//sw/device/silicon_creator/rom/e2e/boot_policy_flash_ecc_error:flash_ecc_error_test_src"],
+        exec_env = [
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+            "//hw/top_earlgrey:fpga_cw340_rom_ext",
+        ],
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_{}".format(slot),
+        local_defines = [
+            "CAUSE_ID={}".format(c["id"]),
+        ],
+        deps = [
+            "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+            "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/arch:boot_stage",
+            "//sw/device/lib/base:abs_mmio",
+            "//sw/device/lib/base:macros",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/dif:flash_ctrl",
+            "//sw/device/lib/dif:otp_ctrl",
+            "//sw/device/lib/dif:rstmgr",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing:flash_ctrl_testutils",
+            "//sw/device/lib/testing:otp_ctrl_testutils",
+            "//sw/device/lib/testing:rstmgr_testutils",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_data",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib:manifest",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/base:chip",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/rom:boot_policy_ptrs",
+        ],
+    )
+    for slot in SLOTS
+    for c in FLASH_ECC_ERROR_CAUSES
+]
+
+[
+    opentitan_test(
+        name = t["name"].format(c["cause"]),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {fw_a}@{owner_slot_a} {rom_ext}@{rom_ext_slot_b} {fw_b}@{owner_slot_b}",
+            binaries = {
+                t["a"].format(c["cause"]): "fw_a",
+                t["b"].format(c["cause"]): "fw_b",
+                ":secret_page_setup": "setup",
+            },
+            exit_success = t["exit_success"].format(c["cause"]),
+            otp = ":otp_img_flash_ecc_error",
+            primary = t["primary"],
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga load-bitstream {bitstream}"
+                # First run the setup program to make sure the keymgr secrets are configured.
+                # This is required to allow the ROM_EXT to run.
+                --exec="bootstrap --clear-uart=true {setup}"
+                --exec="console --non-interactive --exit-success='PASS!' --exit-failure='FAIL'"
+                # Next bootstrap the ROM_EXT alone so we can use boot services to set the
+                # primary slot.  This makes sure we boot the correct slot first.
+                --exec="bootstrap --clear-uart=true {rom_ext}"
+                --exec="rescue boot-svc set-next-bl0-slot --primary={primary} --get-response=true"
+                # Finally, boot the full firmware payload, which will corrupt a portion of
+                # the flash and ensure that the ROM_EXT exception handler can handle it.
+                --exec="bootstrap --clear-uart=true {firmware}"
+                --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+    )
+    for t in BOOT_POLICY_FLASH_ECC_ERROR_TESTS
+    for c in FLASH_ECC_ERROR_CAUSES
+]
+
+opentitan_test(
+    name = "flash_exc_handler_disabled_test",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{rom_ext}@{rom_ext_slot_a} {fw_a}@{owner_slot_a} {rom_ext}@{rom_ext_slot_b} {fw_b}@{owner_slot_b}",
+        binaries = {
+            ":flash_ecc_self_corruption_slot_a_manifest_identifier": "fw_a",
+            ":uncorrupted_test_slot_b": "fw_b",
+            ":secret_page_setup": "setup",
+        },
+        exit_failure = "PASS!",
+        # Since the flash ecc exception handler is disabled in this test,
+        # we expect to see a load access fault when the ROM accesses the
+        # corrupted flash word.
+        exit_success = "BFV:{}".format(hex_digits(CONST.BFV.ROM_EXT_INTR.LOAD_ACCESS)),
+        otp = ":otp_img_flash_exc_handler_disabled",
+        primary = "SlotA",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga load-bitstream {bitstream}"
+            # First run the setup program to make sure the keymgr secrets are configured.
+            # This is required to allow the ROM_EXT to run.
+            --exec="bootstrap --clear-uart=true {setup}"
+            --exec="console --non-interactive --exit-success='PASS!' --exit-failure='FAIL'"
+            # Next bootstrap the ROM_EXT alone so we can use boot services to set the
+            # primary slot.  This makes sure we boot the correct slot first.
+            --exec="bootstrap --clear-uart=true {rom_ext}"
+            --exec="rescue boot-svc set-next-bl0-slot --primary={primary} --get-response=true"
+            # Finally, boot the full firmware payload, which will corrupt a portion of
+            # the flash and ensure that the ROM_EXT exception handler can handle it.
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+)
+
+test_suite(
+    name = "flash_ecc_error",
+    tags = ["manual"],
+    tests = [
+        t["name"].format(c["cause"])
+        for t in BOOT_POLICY_FLASH_ECC_ERROR_TESTS
+        for c in FLASH_ECC_ERROR_CAUSES
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/secret_page_setup.c b/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/secret_page_setup.c
new file mode 100644
index 0000000000000..0119b70c48cfd
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/flash_ecc_error/secret_page_setup.c
@@ -0,0 +1,17 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  status_t result = keymgr_testutils_init_nvm_then_reset();
+  return status_ok(result);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/BUILD b/sw/device/silicon_creator/rom_ext/e2e/handoff/BUILD
index aaf14b1b99b0b..149a04df27983 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/handoff/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/BUILD
@@ -6,6 +6,10 @@ load("//rules:const.bzl", "CONST", "hex")
 load("//rules:linker.bzl", "ld_library")
 load("//rules:manifest.bzl", "manifest")
 load("//rules/opentitan:defs.bzl", "cw310_params", "fpga_params", "opentitan_test")
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VERSION",
+)
 
 package(default_visibility = ["//visibility:public"])
 
@@ -48,6 +52,10 @@ _FAULT_TEST_CASES = {
         "defines": ["HARDWARE_INTERRUPT=1"],
         "exit_success": "BFV:8b524902",
     },
+    "return_boot_failed": {
+        "defines": ["RETURN_TO_ROM_EXT=1"],
+        "exit_success": "BFV:01524509",  # kErrorRomExtBootFailed
+    },
 }
 
 [
@@ -59,7 +67,8 @@ _FAULT_TEST_CASES = {
         ],
         defines = test_data["defines"],
         exec_env = {
-            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
         },
         fpga = fpga_params(
             exit_success = test_data["exit_success"],
@@ -87,3 +96,127 @@ test_suite(
     name = "faults",
     tests = ["fault_{}".format(name) for name in _FAULT_TEST_CASES],
 )
+
+opentitan_test(
+    name = "epmp_test",
+    srcs = ["epmp_print.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        # Note: the application stage may have a dependency on the ePMP
+        # configuration.  If you are making changes to the ePMP layout,
+        # you need to check that your changes won't negatively affect
+        # the handoff to the application.
+        exit_success = "\r\n".join([
+            "0: 00000000 ----- ---- sz=00000000",
+            "1: 00000000 ----- ---- sz=00000000",
+            "2: a....... ----- ---- sz=00000000",  # Application code start.
+            "3: a.......   TOR -X-R sz=........",  # Application code end.
+            "4: a0000000 NAPOT ---R sz=00080000",  # Application rodata region.
+            "5: 00000000 ----- ---- sz=00000000",
+            "6: 00000000 ----- ---- sz=00000000",
+            "7: 00000000 ----- ---- sz=00000000",
+            "8: 2....... ----- ---- sz=00000000",  # ROM_EXT code start.
+            "9: 2.......   TOR -X-R sz=........",  # ROM_EXT code end.
+            "10: 00000000 ----- ---- sz=00000000",
+            "11: 1001c000   NA4 ---- sz=00000004",  # Stack guard.
+            "12: 20000000 NAPOT ---R sz=00100000",  # Entire flash region.
+            "13: 00010000 NAPOT -XWR sz=00001000",  # RvDM regionn
+            "14: 40000000 NAPOT --WR sz=10000000",  # MMIO for peripherals.
+            "15: 10000000 NAPOT --WR sz=00020000",  # All of RAM.
+            "mseccfg = 00000006",  # rlb=true, mmwp=true, mml=false
+            ".*",
+            ".*PASS!",
+            "",
+        ]),
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    deps = [
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:dbg_print",
+    ],
+)
+
+SRAM_EXEC_TESTCASES = [
+    {
+        "name": "enabled",
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_sram_exec_enabled",
+        "exit_success": "value = 00000006, 00000006, 00000001[\\s\\S]*PASS!",
+    },
+    {
+        "name": "disabled",
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_sram_exec_disabled",
+        "exit_success": "value = 00000009, 00000006, 00000001[\\s\\S]*PASS!",
+    },
+    {
+        "name": "disabled_locked",
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        "exit_success": "value = 00000009, 00000009, 00000000[\\s\\S]*MCAUSE=00000001",
+    },
+]
+
+[
+    opentitan_test(
+        name = "sram_exec_{}_test".format(test["name"]),
+        srcs = ["sram_exec_test.c"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            changes_otp = True,
+            exit_success = test["exit_success"],
+            rom_ext = test["rom_ext"],
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+        deps = [
+            "//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:abs_mmio",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:dbg_print",
+        ],
+    )
+    for test in SRAM_EXEC_TESTCASES
+]
+
+opentitan_test(
+    name = "rom_ext_device_status_test",
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        device_status = "0x1",
+        needs_jtag = True,
+        owner_fw_version = "0",
+        rom_ext_sec_version = ROM_EXT_VERSION.SECURITY,
+        rom_ext_version = ROM_EXT_VERSION.MINOR,
+        test_cmd = """
+            --bootstrap={firmware}
+            --wait-for="PASS!"
+            --rom-ext-version="{rom_ext_version}"
+            --rom-ext-sec-version="{rom_ext_sec_version}"
+            --owner-fw-version="{owner_fw_version}"
+            --device-status="{device_status}"
+        """,
+        test_harness = "//sw/host/tests/rom_ext/device_status",
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/epmp_print.c b/sw/device/silicon_creator/rom_ext/e2e/handoff/epmp_print.c
new file mode 100644
index 0000000000000..3e68d30ed3258
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/epmp_print.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  dbg_print_epmp();
+  return true;
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_common.ld b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_common.ld
index 7be8c034d6a03..0ceebbd71e6d9 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_common.ld
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_common.ld
@@ -41,6 +41,14 @@ _manifest_code_end = _text_end - _slot_start_address;
  * slot for use in the manifest.
  */
 _manifest_entry_point = _start_boot - _slot_start_address;
+/*
+ * The value kHardenedBoolFalse (0x1d4) is selected if the code is linked in
+ * the flash region.  Otherwise, the value kHardenedBoolTrue (0x739) is
+ * selected.
+ */
+_manifest_address_translation = (_text_start >= ORIGIN(eflash) &&
+                                 _text_start < (ORIGIN(eflash)
+                                              + LENGTH(eflash))) ? 0x1d4 : 0x739;
 
 /**
  * NOTE: We have to align each section to word boundaries as our current
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_slot_a.ld b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_slot_a.ld
index 626d1c6c013d9..c379ec062a358 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_slot_a.ld
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_slot_a.ld
@@ -17,7 +17,7 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
 /* Slot A starts at the start of the eFlash plus the fixed size of the first
  * Silicon Owner stage */
  /* TODO(#9045): Move ROM_EXT size to a common location. */
-_slot_start_address = ORIGIN(eflash) + 0x10000;
+_slot_start_address = ORIGIN(eflash) + _rom_ext_size;
 
 REGION_ALIAS("owner_flash", eflash);
 
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_start.S b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_start.S
index f1082ccdae7ca..6b196d2ffa68e 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_start.S
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/fault_start.S
@@ -21,6 +21,11 @@
   .global _start_boot
   .type _start_boot, @function
 _start_boot:
+
+#ifdef RETURN_TO_ROM_EXT
+  ret
+#endif
+
   /**
    * Set up the global pointer `gp`.
    *
diff --git a/sw/device/silicon_creator/rom_ext/e2e/handoff/sram_exec_test.c b/sw/device/silicon_creator/rom_ext/e2e/handoff/sram_exec_test.c
new file mode 100644
index 0000000000000..5774f020b1a24
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/handoff/sram_exec_test.c
@@ -0,0 +1,36 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+#include "sram_ctrl_regs.h"                           // Generated.
+
+OTTF_DEFINE_TEST_CONFIG();
+
+enum {
+  kBase = TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR,
+};
+
+int test_stub(void) { return 0x42; }
+
+// SRAM copy of `test_stub` bytecodes.
+uint32_t test_stub_sram[32];
+
+bool test_main(void) {
+  // Try to enable SRAM_EXEC
+  uint32_t reg_before = abs_mmio_read32(kBase + SRAM_CTRL_EXEC_REG_OFFSET);
+  uint32_t reg_wen = abs_mmio_read32(kBase + SRAM_CTRL_EXEC_REGWEN_REG_OFFSET);
+  abs_mmio_write32(kBase + SRAM_CTRL_EXEC_REG_OFFSET, kMultiBitBool4True);
+  uint32_t reg_after = abs_mmio_read32(kBase + SRAM_CTRL_EXEC_REG_OFFSET);
+  dbg_printf("value = %x, %x, %x\r\n", reg_before, reg_after, reg_wen);
+
+  // Try to execute code on SRAM.
+  memcpy(test_stub_sram, test_stub, sizeof(test_stub_sram));
+  int result = ((int (*)(void))test_stub_sram)();
+
+  return result == 0x42;
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/isfb/BUILD b/sw/device/silicon_creator/rom_ext/e2e/isfb/BUILD
new file mode 100644
index 0000000000000..000bfb3ffbf2c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/isfb/BUILD
@@ -0,0 +1,255 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex", "hex_digits")
+load(
+    "//rules/opentitan:defs.bzl",
+    "DEFAULT_TEST_FAILURE_MSG",
+    "DEFAULT_TEST_SUCCESS_MSG",
+    "fpga_params",
+    "opentitan_binary",
+    "opentitan_test",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VERSION",
+)
+load(
+    "//rules:manifest.bzl",
+    "integrator_specific_firmware_binding",
+    "isfb_erase_allowed_policy",
+    "manifest",
+    "product_expr",
+)
+
+manifest(d = {
+    "name": "manifest_allow_isfb_erase",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "device_id": [
+        hex(CONST.DEFAULT_USAGE_CONSTRAINTS),
+        hex(0x66666666),
+        hex(0x55555555),
+    ],
+    "isfb_erase_allowed_policy": isfb_erase_allowed_policy(
+        name = "isfb_erase_allowed",
+        erase_allowed = True,
+    ),
+})
+
+manifest(d = {
+    "name": "manifest_bad_erase_contraint",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "isfb_erase_allowed_policy": isfb_erase_allowed_policy(
+        name = "isfb_erase_allowed",
+        erase_allowed = True,
+    ),
+})
+
+opentitan_binary(
+    name = "isfb_page_init",
+    testonly = True,
+    srcs = ["isfb_page_test.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310_rom_ext",
+        "//hw/top_earlgrey:fpga_cw340_rom_ext",
+    ],
+    manifest = ":manifest_allow_isfb_erase",
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "isfb_page_test",
+    srcs = ["isfb_page_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        # Check that bank=0 page=5 is configured for RD/WR, but not ERase.
+        exit_success = "info region bank=0 part=0 page=5 RD-WR-uu-uu-uu-uu LK",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_isfb",
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "isfb_page_bad_erase_constraint_test",
+    srcs = ["isfb_page_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        # Even though the isfb_erase extension is present and set to true,
+        # the manifest doesn't node lock this image.  The erase condition
+        # is not met and the ISFB page should not allow erase.
+        # Check that bank=0 page=5 is configured for RD/WR, but not ERase.
+        exit_success = "info region bank=0 part=0 page=5 RD-WR-uu-uu-uu-uu LK",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_isfb",
+    ),
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    manifest = ":manifest_bad_erase_contraint",
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+manifest(d = {
+    "name": "manifest_isfb_product_expr",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "integrator_specific_firmware_binding": integrator_specific_firmware_binding(
+        name = "isfb",
+        product_exprs = [
+            product_expr(
+                name = "abc-product",
+                mask = "0xffffffff",
+                value = "0x44434241",
+            ),
+            product_expr(
+                name = "wx-feature",
+                mask = "0x0000FFFF",
+                value = "0x00005857",
+            ),
+        ],
+        strike_mask = "0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE",
+    ),
+})
+
+manifest(d = {
+    "name": "manifest_isfb_bad_product_expr",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "integrator_specific_firmware_binding": integrator_specific_firmware_binding(
+        name = "isfb",
+        product_exprs = [
+            product_expr(
+                name = "abc-product",
+                mask = "0xffffffff",
+                value = "0x44434241",
+            ),
+            product_expr(
+                name = "uu-feature",
+                mask = "0x0000FFFF",
+                value = "0x00005555",
+            ),
+        ],
+        strike_mask = "0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFE",
+    ),
+})
+
+manifest(d = {
+    "name": "manifest_isfb_bad_strike_mask",
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "integrator_specific_firmware_binding": integrator_specific_firmware_binding(
+        name = "isfb",
+        product_exprs = [
+            product_expr(
+                name = "abc-product",
+                mask = "0xFFFFFFFF",
+                value = "0x44434241",
+            ),
+            product_expr(
+                name = "wx-feature",
+                mask = "0x0000FFFF",
+                value = "0x00005857",
+            ),
+        ],
+        strike_mask = "0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+    ),
+})
+
+_ISFB_CONTRAINT_TESTS = {
+    "unconstrained": {
+        "manifest": "//sw/device/silicon_owner:manifest",
+        "success": DEFAULT_TEST_SUCCESS_MSG,
+        "failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    "product_expr": {
+        "manifest": ":manifest_isfb_product_expr",
+        "success": DEFAULT_TEST_SUCCESS_MSG,
+        "failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    "bad_product_expr": {
+        "manifest": ":manifest_isfb_bad_product_expr",
+        "success": "BFV:{}".format(hex_digits(CONST.BFV.ISFB.PRODUCT_EXP)),
+        "failure": DEFAULT_TEST_SUCCESS_MSG,
+    },
+    "bad_strike_mask": {
+        "manifest": ":manifest_isfb_bad_strike_mask",
+        "success": "BFV:{}".format(hex_digits(CONST.BFV.ISFB.STRIKE_MASK)),
+        "failure": DEFAULT_TEST_SUCCESS_MSG,
+    },
+}
+
+[
+    opentitan_test(
+        name = "isfb_{}_test".format(name),
+        srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            timeout = "long",
+            binaries = {
+                ":isfb_page_init": "isfb_page_init",
+            },
+            changes_otp = True,
+            exit_failure = param["failure"],
+            exit_success = param["success"],
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_isfb",
+            test_cmd = """
+                --exec="image assemble --output=init.bin --mirror=false --size=524288 {rom_ext}@{rom_ext_slot_a} {isfb_page_init}@{owner_slot_a}"
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true init.bin"
+                --exec="console --non-interactive --exit-success='PASS!' --timeout=10s"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}' --timeout=10s"
+                no-op
+            """,
+        ),
+        linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+        manifest = param["manifest"],
+        deps = [
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/ownership:datatypes",
+        ],
+    )
+    for name, param in _ISFB_CONTRAINT_TESTS.items()
+]
diff --git a/sw/device/silicon_creator/rom_ext/e2e/isfb/isfb_page_test.c b/sw/device/silicon_creator/rom_ext/e2e/isfb/isfb_page_test.c
new file mode 100644
index 0000000000000..a03157ef96f14
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/isfb/isfb_page_test.c
@@ -0,0 +1,85 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/flash_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/manifest_def.h"
+
+#include "flash_ctrl_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+dif_flash_ctrl_state_t flash_state;
+
+status_t isfb_page_properties(dif_flash_ctrl_state_t *f) {
+  dif_flash_ctrl_info_region_t region = {
+      .bank = 0,
+      .partition_id = 0,
+      .page = 5,
+  };
+  bool locked;
+  dif_flash_ctrl_region_properties_t p;
+  TRY(dif_flash_ctrl_get_info_region_properties(f, region, &p));
+  TRY(dif_flash_ctrl_info_region_is_locked(f, region, &locked));
+  flash_ctrl_testutils_info_region_print(region, &p, locked);
+  return OK_STATUS();
+}
+
+status_t isfb_page_erase(dif_flash_ctrl_state_t *f) {
+  uint32_t info0_page5 = 5 * FLASH_CTRL_PARAM_BYTES_PER_PAGE;
+  TRY(flash_ctrl_testutils_erase_page(f, info0_page5,
+                                      /*partition_id=*/0,
+                                      kDifFlashCtrlPartitionTypeInfo));
+
+  uint32_t strike_mask[] = {0};
+  // The strike_mask starts at 0 bytes into the ISFB info page.
+  TRY(flash_ctrl_testutils_write(f, info0_page5 + 0,
+                                 /*partition_id=*/0, strike_mask,
+                                 kDifFlashCtrlPartitionTypeInfo,
+                                 sizeof(strike_mask) / sizeof(uint32_t)));
+
+  uint32_t product_words[] = {
+      // ascii: `ABCD`
+      0x44434241,
+      // ascii: `WXYZ`
+      0x5a595857,
+  };
+  // The product_words start at 1024 bytes into the ISFB info page.
+  TRY(flash_ctrl_testutils_write(f, info0_page5 + 1024,
+                                 /*partition_id=*/0, product_words,
+                                 kDifFlashCtrlPartitionTypeInfo,
+                                 sizeof(product_words) / sizeof(uint32_t)));
+
+  return OK_STATUS();
+}
+
+status_t isfb_page_test(dif_flash_ctrl_state_t *f) {
+  TRY(isfb_page_properties(f));
+  const manifest_t *manifest = manifest_def_get();
+  const manifest_ext_isfb_erase_t *erase;
+  if (manifest_ext_get_isfb_erase(manifest, &erase) == kErrorOk) {
+    LOG_INFO("isfb_erase present with value %x", erase->erase_allowed);
+    if (erase->erase_allowed == kHardenedBoolTrue) {
+      TRY(isfb_page_erase(f));
+    }
+  }
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_DIF_OK(dif_flash_ctrl_init_state(
+      &flash_state,
+      mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  status_t sts = isfb_page_test(&flash_state);
+  if (status_err(sts)) {
+    LOG_ERROR("isfb_page_test: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/lockdown/BUILD b/sw/device/silicon_creator/rom_ext/e2e/lockdown/BUILD
index f579644b31ac4..b2f2c96bfc993 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/lockdown/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/lockdown/BUILD
@@ -14,7 +14,8 @@ opentitan_test(
     name = "otp_creator_lockdown",
     srcs = ["otp_creator_lockdown.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
     fpga = fpga_params(
         exit_failure = "PASS|FAIL|BFV:.*\r\n",
@@ -23,6 +24,7 @@ opentitan_test(
         # corresponds to the OTP controller at
         # OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET + OTP_CTRL_PARAM_CREATOR_SW_CFG_OFFSET.
         exit_success = "FAULT: Load Access Fault.*MTVAL=40131040\r\n",
+        tags = ["broken"],
     ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -36,7 +38,8 @@ opentitan_test(
     name = "otp_dai_lockdown",
     srcs = ["otp_dai_lockdown.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
     fpga = fpga_params(
         exit_failure = "PASS|FAIL|BFV:.*\r\n",
@@ -47,6 +50,7 @@ opentitan_test(
         # The address below # corresponds to the OTP controller at
         # OTP_CTRL_CHECK_REGWEN_REG_OFFSET.
         exit_success = "FAULT: Load Access Fault.*MTVAL=4013003c\r\n",
+        tags = ["broken"],
     ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -60,8 +64,12 @@ opentitan_test(
     name = "sram_lockdown",
     srcs = ["sram_lockdown.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
+    fpga = fpga_params(
+        tags = ["broken"],
+    ),
     deps = [
         "//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -74,8 +82,12 @@ opentitan_test(
     name = "epmp_rlb_lockdown",
     srcs = ["epmp_rlb_lockdown.c"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
+    fpga = fpga_params(
+        tags = ["broken"],
+    ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:status",
diff --git a/sw/device/silicon_creator/rom_ext/e2e/ownership/BUILD b/sw/device/silicon_creator/rom_ext/e2e/ownership/BUILD
new file mode 100644
index 0000000000000..67d796e1b66ea
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/ownership/BUILD
@@ -0,0 +1,1124 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_binary",
+    "qemu_params",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext/e2e/ownership:defs.bzl",
+    "ownership_transfer_test",
+)
+load("//rules:const.bzl", "CONST", "hex")
+load("//rules:manifest.bzl", "manifest")
+
+package(default_visibility = ["//visibility:public"])
+
+# TODO(#24462): The tests in this file are marked `changes_otp = True`,
+# but they don't change OTP.  They modify the ownership INFO pages,
+# so we need to clear the bitstream after the test, which is what the
+# `changes_otp` parameter actually does.
+
+# When running the ownership tests in QEMU, be careful not to run with a high
+# degree of parallelism or on a slower host. This is because the XModem-CRC
+# rescue implementation defines a timeout to receive the Xmodem frame data (300
+# ms) based upon a UART transferring at ~115200bps, with ~3x lenience (see
+# `sw/device/silicon_creator/lib/rescue/xmodem.c`). When running in QEMU, the
+# baud rate is not used and data will transfer via a PTY-backed CharDev at a
+# speed that depends on host performance and load.
+#
+# To reliably run the Xmodem rescue flow for ownership transfer, it is
+# recommended to sequence test runs serially.
+
+opentitan_binary(
+    name = "boot_test",
+    testonly = True,
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    defines = ["WITH_OWNERSHIP_INFO=1"],
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+    ],
+)
+
+opentitan_binary(
+    name = "flash_regions",
+    testonly = True,
+    srcs = ["flash_regions.c"],
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+# This manifest is node-locked to the DEVICE_ID provided by the ROM_EXT E2E OTP
+# configuration //sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_rma,
+# and required by the exec_env `fpga_hyper310_rom_ext`.
+manifest({
+    "name": "nodelocked_manifest",
+    "identifier": hex(CONST.OWNER),
+    "device_id": [
+        hex(CONST.DEFAULT_USAGE_CONSTRAINTS),
+        hex(0x66666666),
+        hex(0x55555555),
+    ],
+    "visibility": ["//visibility:public"],
+})
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_transfer_any_test
+ownership_transfer_test(
+    name = "transfer_any_test",
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0"},
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "transfer_bl0_slot_b_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --activate-bl0-slot=SlotB
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "invalid_device_id_request_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_default_ownership_state_unlock_any",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Abort
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --invalid-device-id=true
+            --expected-error=OwnershipInvalidDin
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "invalid_nonce_request_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_default_ownership_state_unlock_any",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Abort
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --invalid-nonce=true
+            --expected-error=OwnershipInvalidNonce
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "invalid_key_alg_activate_request_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_invalid_key_alg",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --skip-unlock=true
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --dual-owner-boot-check=false
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "unlock_detached_sig_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --enable-detached-sig=true
+            --dual-owner-boot-check=false
+            --rescue-after-activate={boot_test}
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "bad_unlock_signature_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --unlock-sig=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:all_zero_sig)
+            --expected-error=OwnershipSignatureNotFound
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "bad_ownership_key_alg_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_corrupted_owner_key_alg",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --expected-error=OwnershipInvalidAlgorithm
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "bad_ownership_key_alg_with_detached_sig_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_corrupted_owner_key_alg",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --key-alg=HybridSpxPure
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx)
+            --next-key-alg=SpxPrehash
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_spx)
+            --next-unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key_spx)
+            --next-activate-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key_spx)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --expected-error=OwnershipInvalidAlgorithm
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "bad_appkey_constraint_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --config-kind=with-app-constraint
+            --expected-error=SigverifyBadEcdsaSignature
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "good_appkey_constraint_test",
+    fpga = {"changes_otp": True},
+    manifest = ":nodelocked_manifest",
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --config-kind=with-app-constraint
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_unlock_test
+ownership_transfer_test(
+    name = "bad_unlock_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            # NOTE: We use the wrong unlock key to test that the unlock operation fails.
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --expected-error=OwnershipInvalidSignature
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "unlock_when_recovery_state_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_default_ownership_state_recovery",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            # NOTE: We use the owner recovery key to test that the unlock operation succeeds.
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:no_owner_recovery_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "unlock_with_owner_recovery_key_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            # NOTE: We use the owner recovery key to test that the unlock operation succeeds.
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:no_owner_recovery_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_activate_test
+ownership_transfer_test(
+    name = "bad_activate_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            # NOTE: We use the wrong activate key to test that the activate operation fails.
+            --activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --expected-error=OwnershipInvalidSignature
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_owner_block_test
+ownership_transfer_test(
+    name = "bad_owner_block_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --config-kind=corrupt
+            --dual-owner-boot-check=false
+            --expected-error=OwnershipInvalidInfoPage
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_app_key_test
+ownership_transfer_test(
+    name = "bad_app_key_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            # NOTE: We use the wrong app key (fake instead of dummy) to test that we cannot boot
+            # the test program after completing the transfer.
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --expected-error=OwnershipKeyNotFound
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_transfer_endorsed_test
+ownership_transfer_test(
+    name = "transfer_endorsed_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Endorsed
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-owner-key-pub=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_pub)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_endorsee_test
+ownership_transfer_test(
+    name = "bad_endorsee_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Endorsed
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            # NOTE: We use the wrong next-owner-public-key to test that endorsee is rejected and the activate operation fails.
+            --next-owner-key-pub=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_pub)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --dual-owner-boot-check=false
+            --expected-error=OwnershipInvalidInfoPage
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_locked_update_test
+ownership_transfer_test(
+    name = "locked_update_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Update
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            # NOTE: We rotate the `fake` test owner's application key to the dummy key to test that
+            #       we can execute code with the new key.
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --non-transfer-update=true
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_locked_update_test
+# Part 1: Ensure in UnlockedSelf that a new owner key is rejected.
+ownership_transfer_test(
+    name = "bad_locked_update_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Update
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            # NOTE: We use the wrong owner key to test that the activate operation fails.
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --dual-owner-boot-check=false
+            --expected-error=OwnershipInvalidInfoPage
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_bad_locked_update_test
+# Part 2: Ensure the UnlockedSelf state denies execution to anything signed with new app keys.
+ownership_transfer_test(
+    name = "bad_locked_update_no_exec_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Update
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+
+            # NOTE: We use the wrong owner key and the dummy app key (which the ownership_transfer_test rule
+            #       uses for signing) to check that owner code execution is denied in the intermediate
+            #       dual-owner state.
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --expected-error=OwnershipKeyNotFound
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_rescue_limit_test
+ownership_transfer_test(
+    name = "rescue_limit_test",
+    srcs = ["flash_contents.c"],
+    fpga = {"changes_otp": True},
+    linker_script = "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_b",
+    shared_params = {
+        "timeout": "long",
+        # We boot on Side B since rescue will rewrite side A.
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_b}",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+        """,
+        "test_harness": "//sw/host/tests/ownership:rescue_limit_test",
+    },
+    deps = [
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_rescue_permission_test
+ownership_transfer_test(
+    name = "rescue_permission_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+        """,
+        "test_harness": "//sw/host/tests/ownership:rescue_permission_test",
+    },
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_flash_permission_test
+# Note: rescue-after-activate tests that rescue correctly accesses regions with
+# different scrambling/ECC properties than the default flash configuration.
+_FLASH_PERMISSION_TESTS = {
+    "aa": {
+        "rom_ext_slot": "SlotA",
+        "owner_slot": "SlotA",
+        "rom_ext_offset": "{rom_ext_slot_a}",
+    },
+    "ab": {
+        "rom_ext_slot": "SlotA",
+        "owner_slot": "SlotB",
+        "rom_ext_offset": "{rom_ext_slot_a}",
+    },
+    "ba": {
+        "rom_ext_slot": "SlotB",
+        "owner_slot": "SlotA",
+        "rom_ext_offset": "{rom_ext_slot_b}",
+    },
+    "bb": {
+        "rom_ext_slot": "SlotB",
+        "owner_slot": "SlotB",
+        "rom_ext_offset": "{rom_ext_slot_b}",
+    },
+}
+
+[
+    ownership_transfer_test(
+        name = "flash_permission_test_slot_{}".format(name),
+        srcs = ["flash_regions.c"],
+        fpga = {"changes_otp": True},
+        shared_params = {
+            "assemble": "{rom_ext}@{rom_ext_offset} {firmware}@{owner_slot_a}",
+            "binaries": {
+                ":flash_regions": "flash_regions",
+            },
+            "owner_slot": param["owner_slot"],
+            "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+            "rom_ext_offset": param["rom_ext_offset"],
+            "rom_ext_slot": param["rom_ext_slot"],
+            "test_cmd": """
+                --bootstrap={firmware}
+                --unlock-mode=Any
+                --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+                --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+                --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+                --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+                --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+                --config-kind=with-flash-locked
+                --rescue-after-activate={flash_regions}
+                --rescue-slot={owner_slot}
+                --expected-rom-ext-slot={rom_ext_slot}
+            """,
+            "test_harness": "//sw/host/tests/ownership:flash_permission_test",
+        },
+        deps = [
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/dif:flash_ctrl",
+            "//sw/device/lib/testing:flash_ctrl_testutils",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        ],
+    )
+    for name, param in _FLASH_PERMISSION_TESTS.items()
+]
+
+# Tests that a owner config with an improper flash configuration cannot be activated.
+ownership_transfer_test(
+    name = "flash_error_test",
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --config-kind=with-flash-error
+            --dual-owner-boot-check=false
+            --expected-error=OwnershipFlashConfigRomExt
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+# Test that the `sku_creator_owner_init` function responsible for installing the test owner on
+# unprovisioned builds without flash info page splicing (e.g. FPGA, QEMU) will automatically
+# update from an older owner block.
+ownership_transfer_test(
+    name = "install_owner_upgrade_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Update
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            # `sku_creator_owner_init` has a newer version number than this and should self-update.
+            --config-version=0
+            # NOTE: Should sku_creator_owner_init fail to upgrade to its built-in owner block, then the
+            # dummy key will prevent the test program from executing and we'll get a failure from the test.
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --non-transfer-update=true
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_update_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --config-version=2
+            # We expect to see the version updated and the owner key the same.
+            --expect "config_version = 2"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_noupdate_with_bad_owner_block_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa_pub)
+            --config-version=2
+            --config-kind=invalid
+            # We expect to see the version unchanged.
+            --expect "config_version = 1"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_noupdate_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --config-version=0
+            # We expect to see the version unchanged.
+            --expect "config_version = 1"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_nodelock_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --config-version=2
+            # A DIN of zero will cause the test program to use the DUT's current DIN.
+            --locked-to-din=0
+            --expect "config_version = 2"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_badlock_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --config-version=2
+            --locked-to-din=12345
+            # We expect to see the version unchanged.
+            --expect "config_version = 1"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+opentitan_binary(
+    name = "keymgr_test",
+    testonly = True,
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    defines = [
+        "WITH_OWNERSHIP_INFO=1",
+        "WITH_KEYMGR=1",
+    ],
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+    },
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+    ],
+)
+
+# rom_ext_e2e_testplan.hjson%rom_ext_e2e_transfer_any_test
+ownership_transfer_test(
+    name = "transfer_keymgr_test",
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    defines = [
+        "WITH_OWNERSHIP_INFO=1",
+        "WITH_KEYMGR=1",
+    ],
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":keymgr_test": "keymgr_test",
+        },
+        "test_cmd": """
+            --bootstrap={firmware}
+            --pre-transfer-boot-check=true
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --rescue-after-activate={keymgr_test}
+            --keygen-check=true
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+    ],
+)
+
+ownership_transfer_test(
+    name = "transfer_ecdsa_to_pq_test",
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-key-alg=HybridSpxPure
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_spx)
+            --next-unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx)
+            --next-activate-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key_spx)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --dual-owner-boot-check=false
+            --rescue-after-activate={boot_test}
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "transfer_pq_to_pq_test",
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_hybrid_owner_keys",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --key-alg=HybridSpxPure
+            --unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx)
+            --next-key-alg=SpxPrehash
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_spx)
+            --next-unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key_spx)
+            --next-activate-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key_spx)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der
+            --dual-owner-boot-check=false
+            --rescue-after-activate={boot_test}
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "transfer_spx_pure_to_spx_prehash_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "binaries": {
+            ":boot_test": "boot_test",
+        },
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_spx_pure_owner_keys",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --unlock-mode=Any
+            --key-alg=SpxPure
+            --unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx)
+            --next-key-alg=SpxPrehash
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_spx)
+            --next-unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key_spx)
+            --next-activate-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key_spx)
+            --next-application-key=$(location //sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub)
+            --dual-owner-boot-check=false
+            --rescue-after-activate={boot_test}
+        """,
+        "test_harness": "//sw/host/tests/ownership:transfer_test",
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+ownership_transfer_test(
+    name = "newversion_pq_to_pq_update_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_hybrid_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --next-key-alg=HybridSpxPrehash
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_spx)
+            --next-unlock-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx)
+            --next-activate-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key_spx)
+            --config-version=2
+            # We expect to see the version updated and the owner key the same.
+            --expect "config_version = 2"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
+
+ownership_transfer_test(
+    name = "newversion_pq_downgrade_test",
+    ecdsa_key = {
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0",
+    },
+    fpga = {"changes_otp": True},
+    shared_params = {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_hybrid_owner_update_newversion",
+        "test_cmd": """
+            --bootstrap={firmware}
+            --next-owner-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key)
+            --next-unlock-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key)
+            --next-activate-key=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:activate_key)
+            --next-application-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+            --next-owner-key-spx=$(location //sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_spx)
+            --config-version=2
+            # We expect to see the version unchanged.
+            --expect "config_version = 1"
+            --expect "owner_key = 8e3dcb50"
+        """,
+        "test_harness": "//sw/host/tests/ownership:newversion_test",
+    },
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/ownership/defs.bzl b/sw/device/silicon_creator/rom_ext/e2e/ownership/defs.bzl
new file mode 100644
index 0000000000000..bfef03394f84b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/ownership/defs.bzl
@@ -0,0 +1,117 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_test",
+    "qemu_params",
+)
+load("@bazel_skylib//lib:structs.bzl", "structs")
+
+def ownership_transfer_test(
+        name,
+        srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+        },
+        ecdsa_key = {
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:ecdsa_keyset": "app_prod_0",
+        },
+        manifest = None,
+        data = [
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:app_prod_ecdsa_pub",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_pub",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:activate_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:owner_key_spx_pub",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:unlock_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/dummy:all_zero_sig",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:activate_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:owner_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:no_owner_recovery_key",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_pub",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:unlock_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:activate_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_spx",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:owner_key_spx_pub",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa_pub",
+        ],
+        defines = ["WITH_OWNERSHIP_INFO=1"],
+        deps = [
+            "//sw/device/lib/base:status",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+            "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/ownership:datatypes",
+        ],
+        fpga = None,
+        qemu = None,
+        shared_params = None,
+        **kwargs):
+    # Construct `fpga_params` from shared and FPGA-specific parameters
+    if shared_params:
+        override_params = dict(shared_params)
+        if fpga:
+            override_params.update(fpga)
+
+        # FPGA should always clear the bitstream & bootstrap first, so
+        # add these to every FPGA test cmd unless overridden
+        if not fpga or "test_cmd" not in fpga:
+            override_params["test_cmd"] = """
+                --clear-bitstream
+            """ + override_params["test_cmd"]
+        fpga = fpga_params(**override_params)
+    else:
+        fpga = fpga_params(**fpga)
+
+    # Construct `qemu_params` from shared and QEMU-specific parameters
+    if shared_params:
+        override_params = dict(shared_params)
+        if qemu:
+            override_params.update(qemu)
+
+        # QEMU takes longer to emulate entering rescue due to slow
+        # emulation of the ROM, as a result of the `sec_mmio` code hot
+        # loops falling in a misaligned EPMP region that effectively
+        # disables QEMU's TCG TLB optimisations. As such, we always
+        # increase the delay to enter rescue to 20s on QEMU targets.
+        # This is likely much larger than needed, but should give some
+        # lenience for tests being run in parallel or on slower hosts.
+        if not qemu or "test_cmd" not in qemu:
+            override_params["test_cmd"] = """
+                --rescue-enter-delay=20s
+            """ + override_params["test_cmd"]
+
+        # XModem-CRC transfer as part of the rescue flow uses somewhat
+        # tight timing based on the UART baud rate, which depends on
+        # the performance & load of the host. Change the icount shift
+        # used to make timing more lenient on QEMU, albeit at the cost
+        # of longer test executions.
+        if not qemu or "icount" not in qemu:
+            override_params["icount"] = "5"
+        qemu = qemu_params(**override_params)
+    else:
+        qemu = qemu_params(**qemu)
+
+    opentitan_test(
+        name = name,
+        srcs = srcs,
+        exec_env = exec_env,
+        ecdsa_key = ecdsa_key,
+        manifest = manifest,
+        data = data,
+        defines = defines,
+        deps = deps,
+        fpga = fpga,
+        qemu = qemu,
+        **kwargs
+    )
diff --git a/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_contents.c b/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_contents.c
new file mode 100644
index 0000000000000..380eb6f779378
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_contents.c
@@ -0,0 +1,36 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+#include "flash_ctrl_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+status_t flash_contents_print(boot_log_t *boot_log) {
+  TRY(boot_log_check(boot_log));
+  uint32_t *data = (uint32_t *)(TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR +
+                                boot_log->rom_ext_size);
+  uint32_t *end = (uint32_t *)(TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR +
+                               FLASH_CTRL_PARAM_BYTES_PER_BANK);
+  uint32_t incr = FLASH_CTRL_PARAM_BYTES_PER_PAGE / sizeof(uint32_t);
+
+  for (; data < end; data += incr) {
+    LOG_INFO("flash %p = %x", data, *data);
+  }
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  status_t sts = flash_contents_print(&retention_sram_get()->creator.boot_log);
+  if (status_err(sts)) {
+    LOG_ERROR("flash_contents_print: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_regions.c b/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_regions.c
new file mode 100644
index 0000000000000..9ecab293e27ef
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/ownership/flash_regions.c
@@ -0,0 +1,58 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/flash_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+dif_flash_ctrl_state_t flash_state;
+
+status_t flash_regions_print(boot_log_t *boot_log, dif_flash_ctrl_state_t *f) {
+  TRY(boot_log_check(boot_log));
+  LOG_INFO("boot_log rom_ext_slot = %C", boot_log->rom_ext_slot);
+  LOG_INFO("boot_log bl0_slot = %C", boot_log->bl0_slot);
+  for (uint32_t i = 0; i < 8; ++i) {
+    dif_flash_ctrl_data_region_properties_t p;
+    bool locked;
+    TRY(dif_flash_ctrl_get_data_region_properties(f, i, &p));
+    TRY(dif_flash_ctrl_data_region_is_locked(f, i, &locked));
+    flash_ctrl_testutils_data_region_print(i, &p, locked);
+  }
+  for (uint32_t bank = 0; bank < 2; ++bank) {
+    for (uint32_t page = 0; page < 10; ++page) {
+      dif_flash_ctrl_info_region_t region = {
+          .bank = bank,
+          .partition_id = 0,
+          .page = page,
+      };
+      bool locked;
+      dif_flash_ctrl_region_properties_t p;
+      TRY(dif_flash_ctrl_get_info_region_properties(f, region, &p));
+      TRY(dif_flash_ctrl_info_region_is_locked(f, region, &locked));
+      flash_ctrl_testutils_info_region_print(region, &p, locked);
+    }
+  }
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_DIF_OK(dif_flash_ctrl_init_state(
+      &flash_state,
+      mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  status_t sts = flash_regions_print(&retention_sram_get()->creator.boot_log,
+                                     &flash_state);
+
+  if (status_err(sts)) {
+    LOG_ERROR("flash_regions_print: %r", sts);
+  }
+  return status_ok(sts);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/BUILD b/sw/device/silicon_creator/rom_ext/e2e/rescue/BUILD
index 1bab13f5230a2..ffa7eb1e7c905 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/rescue/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/rescue/BUILD
@@ -1,6 +1,9 @@
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex")
+load("//rules:manifest.bzl", "manifest")
 load(
     "//rules/opentitan:defs.bzl",
     "DEFAULT_TEST_FAILURE_MSG",
@@ -11,8 +14,10 @@ load(
     "opentitan_binary",
     "opentitan_test",
 )
-load("//rules:const.bzl", "CONST", "hex")
-load("//rules:manifest.bzl", "manifest")
+load(
+    "//sw/device/silicon_creator/rom_ext/e2e:defs.bzl",
+    "DEVICE_ID",
+)
 
 package(default_visibility = ["//visibility:public"])
 
@@ -20,10 +25,49 @@ _POSITIONS = {
     "slot_a": {
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
         "slot": "SlotA",
+        "rom_ext_offset": "{rom_ext_slot_a}",
     },
     "slot_b": {
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_b",
         "slot": "SlotB",
+        "rom_ext_offset": "{rom_ext_slot_b}",
+    },
+}
+
+_RESCUE_ROMEXT_RESULTS = {
+    True: {
+        # When the ROM_EXT location and rescue upload slot are the same.
+        "success": DEFAULT_TEST_SUCCESS_MSG,
+        "failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    False: {
+        # When the ROM_EXT location and rescue upload slot are opposite.
+        "success": "{slot} rom_ext_id = OTRE\r\n.*{slot} rom_ext_version = 99.999\r\n",
+        "failure": "(PASS|FAIL|BFV).*\r\n",
+    },
+}
+
+_CONFIGS = {
+    "xmodem": {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        # This alternate rom_ext has enter-on-fail and a timeout enabled.
+        "alt_rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_xmodem_timeout",
+        "params": "",
+        "setup": "",
+        "tags": [],
+    },
+    "usbdfu": {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_usbdfu",
+        "params": "-p usb-dfu -t strap -v 3",
+        "setup": "",
+        "tags": [],
+    },
+    "spidfu": {
+        "rom_ext": "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu",
+        # Use spi-dfu, trigger with GPIO IOA2 high.
+        "params": "-p spi-dfu -t gpio -v +Ioa2",
+        "setup": "--exec=\"gpio set --mode OpenDrain Ioa2\"",
+        "tags": [],
     },
 }
 
@@ -34,14 +78,20 @@ _POSITIONS = {
         srcs = [
             "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
         ],
+        defines = [
+            "WITH_MANIFEST=1",
+        ],
         exec_env = [
-            "//hw/top_earlgrey:fpga_cw310_rom_ext",
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext",
+            "//hw/top_earlgrey:fpga_cw340_rom_ext",
         ],
         linker_script = position["linker_script"],
         deps = [
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
             "//sw/device/lib/base:status",
             "//sw/device/lib/testing/test_framework:ottf_main",
             "//sw/device/silicon_creator/lib:boot_log",
+            "//sw/device/silicon_creator/lib:manifest",
             "//sw/device/silicon_creator/lib/drivers:retention_sram",
         ],
     )
@@ -50,24 +100,32 @@ _POSITIONS = {
 
 [
     opentitan_test(
-        name = "rescue_firmware_{}".format(name),
+        name = "rescue_firmware_{}_{}".format(name, protocol),
         exec_env = {
-            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
         },
         fpga = fpga_params(
             assemble = "",
             binaries = {
                 ":boot_test_{}".format(name): "payload",
             },
+            changes_otp = True,
+            params = config["params"],
+            rom_ext = config["rom_ext"],
+            setup = config["setup"],
             slot = position["slot"],
+            tags = config["tags"],
             test_cmd = """
                 --exec="transport init"
+                --exec="fpga clear-bitstream"
                 --exec="fpga load-bitstream {bitstream}"
+                {setup}
                 --exec="bootstrap --clear-uart=true {rom_ext}"
                 # First make sure the ROM_EXT is faulting because there is no firmware
                 --exec="console --non-interactive --exit-success='BFV:' --exit-failure='PASS|FAIL'"
                 # Load firmware via rescue
-                --exec="rescue firmware --slot={slot} {payload:signed_bin}"
+                --exec="rescue {params} firmware --slot={slot} {payload:signed_bin}"
                 # Check for firmware execution
                 --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
                 no-op
@@ -75,64 +133,807 @@ _POSITIONS = {
         ),
     )
     for name, position in _POSITIONS.items()
+    for protocol, config in _CONFIGS.items()
+]
+
+# This bad ROM_EXT image is an empty image that identifies as a ROM_EXT with
+# version number 99.999.  Apart from the identifier word and version, it
+# is all zeros.  The identifier word allows rescue to identify the first block
+# of the rescue payload as a potential ROM_EXT and possibly store it in
+# flash of the inactive partition.
+genrule(
+    name = "bad_rom_ext",
+    srcs = ["bad_rom_ext.txt"],
+    outs = ["bad_rom_ext.bin"],
+    cmd = "xxd -r $< > $@",
+)
+
+# Test rescue driven ROM_EXT updates:
+# 1. Place a ROM_EXT in slot_a or slot_b.
+# 2. Use rescue to send a rom_ext+owner_firmware payload.
+# 3. If rescueing into the slot where the ROM_EXT is active, the rom_ext
+#    portion of the payload should be silently consumed and not updated.
+#    If rescueing into the opposite slot, the rom_ext portion of the
+#    payload will be programmed into the inactive rom_ext slot.
+# 4. Upon booting, the test binary will print the identifier and version
+#    fields of both ROM_EXT slots.
+[
+    opentitan_test(
+        name = "rescue_rom_ext_{}_update_{}".format(rxslot, name),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            timeout = "long",
+            assemble = "{rom_ext}@{rom_ext_offset}",
+            binaries = {
+                ":boot_test_{}".format(name): "payload",
+                ":bad_rom_ext": "bad_rom_ext",
+            },
+            changes_otp = True,
+            exit_failure = _RESCUE_ROMEXT_RESULTS[name == rxslot]["failure"],
+            exit_success = _RESCUE_ROMEXT_RESULTS[name == rxslot]["success"].format(slot = name),
+            image_name = "/tmp/rescue_rom_ext_{}.img".format(name),
+            rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+            rom_ext_offset = _POSITIONS[rxslot]["rom_ext_offset"],
+            slot = position["slot"],
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                # First make sure the ROM_EXT is faulting because there is no firmware
+                --exec="console --non-interactive --exit-success='BFV:' --exit-failure='PASS|FAIL'"
+                # Construct a firmware image with the bad ROM_EXT
+                --exec="image assemble --size=524288 --mirror=false --output={image_name} {bad_rom_ext}@{rom_ext_slot_a} {payload}@{owner_slot_a}"
+                # Load firmware via rescue, including the bad ROM_EXT
+                --exec="rescue firmware --raw --slot={slot} {image_name}"
+                # Check for firmware execution
+                --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+    )
+    for name, position in _POSITIONS.items()
+    for rxslot in _POSITIONS.keys()
+]
+
+[
+    opentitan_test(
+        name = "next_slot_{}".format(protocol),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {slot_a:signed_bin}@{owner_slot_a} {slot_b:signed_bin}@{owner_slot_b}",
+            binaries = {
+                ":boot_test_slot_a": "slot_a",
+                ":boot_test_slot_b": "slot_b",
+            },
+            changes_otp = True,
+            params = config["params"],
+            rom_ext = config["rom_ext"],
+            setup = config["setup"],
+            tags = config["tags"],
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                {setup}
+                --exec="no-op --info='##### Set next slot via the rescue protocol'"
+                --exec="rescue {params} boot-svc set-next-bl0-slot --next=SlotB --get-response=false"
+                --exec="no-op --info='##### Check for firmware execution in slot B'"
+                --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
+                --exec="no-op --info='##### Reset and observe return to slot A.'"
+                --exec="gpio apply RESET"
+                --exec="gpio remove RESET"
+                --exec="console --non-interactive --exit-success='bl0_slot = AA__\r\n' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+    )
+    for protocol, config in _CONFIGS.items()
+]
+
+[
+    opentitan_test(
+        name = "primary_slot_{}".format(protocol),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{rom_ext}@{rom_ext_slot_a} {slot_a:signed_bin}@{owner_slot_a} {slot_b:signed_bin}@{owner_slot_b}",
+            binaries = {
+                ":boot_test_slot_a": "slot_a",
+                ":boot_test_slot_b": "slot_b",
+            },
+            changes_otp = True,
+            params = config["params"],
+            rom_ext = config["rom_ext"],
+            setup = config["setup"],
+            tags = config["tags"],
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {firmware}"
+                {setup}
+                --exec="no-op --info='##### Set primary slot via the rescue protocol'"
+                --exec="rescue {params} boot-svc set-next-bl0-slot --primary=SlotB"
+                --exec="no-op --info='##### Check for firmware execution in slot B'"
+                --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
+                --exec="no-op --info='##### Reset and observe continued execution in slot B'"
+                --exec="gpio apply RESET"
+                --exec="gpio remove RESET"
+                --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
+                --exec="no-op --info='##### Set primary slot via the rescue protocol'"
+                --exec="rescue {params} boot-svc set-next-bl0-slot --primary=SlotA --get-response=false"
+                --exec="no-op --info='##### Check for firmware execution in slot A'"
+                --exec="console --non-interactive --exit-success='bl0_slot = AA__\r\n' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+    )
+    for protocol, config in _CONFIGS.items()
+]
+
+[
+    opentitan_test(
+        name = "rescue_rate_{}_test".format(rate),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "",
+            binaries = {
+                ":boot_test_slot_a": "payload",
+            },
+            changes_otp = True,
+            rate = rate,
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {rom_ext}"
+                # First make sure the ROM_EXT is faulting because there is no firmware
+                --exec="console --non-interactive --exit-success='BFV:' --exit-failure='PASS|FAIL'"
+                # Load firmware via rescue
+                --exec="rescue firmware --rate={rate} {payload:signed_bin}"
+                # Check for firmware execution
+                --exec="console --baudrate=115200 --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+                no-op
+            """,
+        ),
+    )
+    # FPGA CW310 and CW340 only support the baudrate up to 230K.
+    for rate in [
+        "115200",
+        "230400",
+    ]
+]
+
+[
+    opentitan_test(
+        name = "rescue_unsupported_rate_{}_test".format(rate),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "",
+            binaries = {
+                ":boot_test_slot_a": "payload",
+            },
+            changes_otp = True,
+            rate = rate,
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga load-bitstream {bitstream}"
+                --exec="bootstrap --clear-uart=true {rom_ext}"
+                # Trigger rescue.
+                --exec="rescue no-op"
+                --exec="console --non-interactive --send='BAUD\r{rate}\r' --exit-success='unsupported baudrate' --exit-failure='BFV:.*\r\n'"
+                # Try the `REBO` mode and make sure we reboot without crash.
+                --exec="console --non-interactive --send='REBO\r' --exit-success='ROM:' --exit-failure='BFV:.*\r\n'"
+                no-op
+            """,
+        ),
+    )
+    # FPGA CW310 and CW340 only support the baudrate up to 230K.
+    for rate in [
+        "460K",
+        "921K",
+        "1M33",
+        "1M50",
+        "INVALID",
+    ]
+]
+
+# TODO(lowRISC#26481): Eliminate this test when we no longer care about
+# supporting version 0 of the rescue protocol.
+# This test makes sure that opentitantool identifies version 0 correctly
+# and emits the `WAIT` command to make the ROM_EXT rescue implementation
+# act in accordance with the behavior of protocol 1.0, which always waits.
+opentitan_test(
+    name = "rescue_firmware_protocol_0",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "",
+        binaries = {
+            ":boot_test_slot_a": "payload",
+        },
+        changes_otp = True,
+        rom_ext = "//sw/device/silicon_creator/rom_ext/e2e/rescue/testdata:rom_ext_rescue_protocol_0",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {rom_ext}"
+            # First make sure the ROM_EXT is faulting because there is no firmware
+            --exec="console --non-interactive --exit-success='BFV:' --exit-failure='PASS|FAIL'"
+            # Load firmware via rescue
+            --exec="rescue firmware {payload:signed_bin}"
+            # Check for firmware execution
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+)
+
+opentitan_test(
+    name = "rescue_inactivity_timeout",
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_xmodem_timeout",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            # Trigger rescue and do nothing.  We expect the inactivity timer to
+            # cause rescue to exit and then boot the firmware.
+            --exec="rescue no-op"
+            # Check for firmware execution
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+opentitan_test(
+    # This test ensures that the ROM_EXT clears power-on-reset before rebooting
+    # so that the ROM wont re-scrable RET-RAM and destroy the 'skip_once' request.
+    #
+    # This test also ensures that the ROM_EXT disables the watchdog when entering
+    # rescue mode, as the normal watchdog timeout would cause the chip to reset
+    # after one second of idling in rescue.
+    #
+    # If the ROM_EXT were to fail to clear power-on-reset or to disable the
+    # watchdog, this device would boot-loop and this test would fail.
+    name = "rescue_inactivity_timeout_preserved_reset_reason",
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        # We configure OTP to preserve the reset reason and set the watchdog timeout
+        # to one second.
+        otp = "//sw/device/silicon_creator/rom_ext/e2e:otp_img_secret2_locked_preserve_reset_prod",
+        # We use the spidfu rom_ext because we can trigger with a GPIO and we
+        # want to simulate the trigger being jammed.
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            # Set the trigger with gpio command to simulate the trigger being jammed.
+            --exec="gpio set --mode PushPull --value true Ioa2"
+            # Check for firmware execution.  We'll enter rescue, timeout,
+            # then reboot and execute firmware.
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+# Check that xmodem rescue is functional when the `RESQ` mode is disabled.
+opentitan_test(
+    name = "xmodem_restricted_commands",
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        exit_failure = "ok: ",
+        exit_success = "error: mode not allowed",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_xmodem_restricted_commands",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            # Trigger rescue and make sure we can get the device ID.
+            --exec="rescue get-device-id --reboot=false"
+            # Try the `RESQ` mode and make sure we get an error message.
+            --exec="console --non-interactive --send='RESQ\r' --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            # Try the `REBO` mode and make sure we reboot without crash.
+            --exec="console --non-interactive --send='REBO\r' --exit-success='ROM:' --exit-failure='BFV:.*\r\n'"
+            no-op
+        """,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+# Check that DFU rescue is functional when the `RESQ` mode is disabled.
+# TODO: Add a test to try to perform a firmware rescue and ensure that it fails.
+opentitan_test(
+    name = "spidfu_restricted_commands",
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu_restricted_commands",
+        setup = "--exec=\"gpio set --mode OpenDrain Ioa2\"",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            {setup}
+            --exec="bootstrap --clear-uart=true {firmware}"
+            # Trigger rescue and make sure we can get the device ID.
+            --exec="rescue {params} get-device-id --reboot=false"
+            no-op
+        """,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+[
+    opentitan_test(
+        name = "rescue_enter_on_fail_{}".format(name),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "",
+            changes_otp = True,
+            exit_success = "BFV:05525304\r\n",
+            rom_ext = config.get(
+                "alt_rom_ext",
+                config["rom_ext"],
+            ),
+            setup = config["setup"],
+            tags = config["tags"],
+            test_cmd = """
+                --exec="transport init"
+                --exec="fpga clear-bitstream"
+                --exec="fpga load-bitstream {bitstream}"
+                {setup}
+                # Load only the ROM_EXT so the boot will fail because of no firmware.
+                --exec="bootstrap --clear-uart=true {rom_ext}"
+                # Check that the final boot-fault is "kErrorRescueInactivity".
+                --exec="console --non-interactive --exit-success='{exit_success}' --timeout=10s"
+                no-op
+            """,
+        ),
+    )
+    for name, config in _CONFIGS.items()
+]
+
+[
+    opentitan_test(
+        name = "rescue_get_boot_log_{}".format(protocol),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "",
+            changes_otp = True,
+            params = config["params"],
+            rom_ext = config["rom_ext"],
+            test_cmd = """
+            --clear-bitstream
+            --bootstrap={rom_ext}
+            rescue {params} --action=get-boot-log
+            """,
+            test_harness = "//sw/host/tests/rescue:rescue_test",
+        ),
+    )
+    for protocol, config in _CONFIGS.items()
+]
+
+[
+    opentitan_test(
+        name = "rescue_get_device_id_{}".format(protocol),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "",
+            changes_otp = True,
+            device_id = DEVICE_ID,
+            params = config["params"],
+            rom_ext = config["rom_ext"],
+            test_cmd = """
+            --clear-bitstream
+            --bootstrap={rom_ext}
+            --device-id={device_id}
+            rescue {params} --action=get-device-id
+            """,
+            test_harness = "//sw/host/tests/rescue:rescue_test",
+        ),
+    )
+    for protocol, config in _CONFIGS.items()
+]
+
+[
+    opentitan_test(
+        name = "rescue_get_owner_page_{}".format(protocol),
+        exec_env = {
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        },
+        fpga = fpga_params(
+            assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+            binaries = {
+                config["rom_ext"]: "romext",
+                "//sw/device/silicon_creator/rom_ext/e2e/attestation:print_certs": "firmware",
+            },
+            changes_otp = True,
+            params = config["params"],
+            test_cmd = """
+            --clear-bitstream
+            --bootstrap={firmware}
+            rescue {params} --action=get-owner-page
+            """,
+            test_harness = "//sw/host/tests/rescue:rescue_test",
+        ),
+    )
+    for protocol, config in _CONFIGS.items()
 ]
 
 opentitan_test(
-    name = "next_slot",
+    name = "rescue_disability_xmodem",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_xmodem_rescue_disability": "romext",
+            "//sw/device/silicon_creator/rom_ext/e2e/attestation:print_certs": "firmware",
+        },
+        changes_otp = True,
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue --action=disability
+        """,
+        test_harness = "//sw/host/tests/rescue:rescue_test",
+    ),
+)
+
+opentitan_test(
+    name = "rescue_disability_spidfu",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu_rescue_disability": "romext",
+            "//sw/device/silicon_creator/rom_ext/e2e/attestation:print_certs": "firmware",
+        },
+        changes_otp = True,
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=disability
+        """,
+        test_harness = "//sw/host/tests/rescue:rescue_test",
+    ),
+)
+
+opentitan_test(
+    name = "rescue_user_error",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {rom_ext}"
+            # Trigger rescue and make sure we can get the device ID.
+            --exec="rescue get-device-id --reboot=false"
+            # Send Invalid rescue command.
+            --exec="console --non-interactive --send='XYZ\r' --exit-success='error: unrecognized mode'"
+            # Try the `REBO` mode and make sure we reboot without crash.
+            --exec="console --non-interactive --send='REBO\r' --exit-success='ROM:' --exit-failure='BFV:.*\r\n'"
+            no-op
+        """,
+    ),
+)
+
+opentitan_test(
+    name = "rescue_config_module_mismatch",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
     fpga = fpga_params(
-        assemble = "{rom_ext}@0 {slot_a:signed_bin}@0x10000 {slot_b:signed_bin}@0x90000",
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
         binaries = {
-            ":boot_test_slot_a": "slot_a",
-            ":boot_test_slot_b": "slot_b",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_rescue_config_module_mismatch": "romext",
+            ":boot_test_slot_a": "firmware",
         },
         test_cmd = """
             --exec="transport init"
+            --exec="fpga clear-bitstream"
             --exec="fpga load-bitstream {bitstream}"
             --exec="bootstrap --clear-uart=true {firmware}"
-            # Set next slot via the rescue protocol
-            --exec="rescue boot-svc set-next-bl0-slot SlotB"
-            # Check for firmware execution in slot B
-            --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
-            # Reset and observe return to slot A.
-            --exec="gpio apply RESET"
-            --exec="gpio remove RESET"
-            --exec="console --non-interactive --exit-success='bl0_slot = AA__\r\n' --exit-failure='{exit_failure}'"
+            --exec="console --non-interactive --exit-success='warning: rescue' --exit-failure='{exit_failure}'"
+            # Trigger rescue and make sure we can get the device ID even if the protocol specified in the rescue
+            # config doesn't match the ROM_EXT implementation.
+            --exec="rescue get-device-id --reboot=false"
+            # Try the `REBO` mode and make sure we reboot without crash.
+            --exec="console --non-interactive --send='REBO\r' --exit-success='Finished' --exit-failure='BFV:.*\r\n'"
             no-op
         """,
     ),
 )
 
 opentitan_test(
-    name = "primary_slot",
+    name = "spidfu_rescue_boot_svc_req_disability",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu_rescue_boot_svc_req_disability": "romext",
+            "//sw/device/silicon_creator/rom_ext/e2e/attestation:print_certs": "firmware",
+        },
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=disability
+        """,
+        test_harness = "//sw/host/tests/rescue:rescue_test",
+    ),
+)
+
+opentitan_test(
+    name = "xmodem_rescue_error_handling_test",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a": "romext",
+            ":boot_test_slot_a": "firmware",
+        },
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/rescue:xmodem_rescue_error_handling",
+    ),
+)
+
+opentitan_test(
+    name = "spidfu_dfu_state_transitions",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu_flash_limit_zero": "romext",
+            ":boot_test_slot_a": "firmware",
+        },
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=spi-dfu-state-transitions
+        """,
+        test_harness = "//sw/host/tests/rescue:dfu_rescue_error_handling",
+    ),
+)
+
+opentitan_test(
+    name = "spidfu_invalid_dfu_requests",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu": "romext",
+            ":boot_test_slot_a": "firmware",
+        },
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=invalid-spi-dfu-requests
+        """,
+        test_harness = "//sw/host/tests/rescue:dfu_rescue_error_handling",
+    ),
+)
+
+opentitan_test(
+    name = "spidfu_invalid_flash_transaction",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext:rom_ext_spidfu": "romext",
+            ":boot_test_slot_a": "firmware",
+        },
+        params = "-p spi-dfu -t gpio -v +Ioa2",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=invalid-spi-flash-transaction
+        """,
+        test_harness = "//sw/host/tests/rescue:dfu_rescue_error_handling",
+    ),
+)
+
+opentitan_test(
+    name = "usbdfu_out_chunk_too_big",
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
     },
     fpga = fpga_params(
-        assemble = "{rom_ext}@0 {slot_a:signed_bin}@0x10000 {slot_b:signed_bin}@0x90000",
+        assemble = "{romext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
         binaries = {
-            ":boot_test_slot_a": "slot_a",
-            ":boot_test_slot_b": "slot_b",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_usbdfu": "romext",
+            ":boot_test_slot_a": "firmware",
         },
+        params = "-p usb-dfu -t strap -v 3",
+        test_cmd = """
+        --clear-bitstream
+        --bootstrap={firmware}
+        rescue {params} --action=usb-dfu-out-chunk-too-big
+        """,
+        test_harness = "//sw/host/tests/rescue:dfu_rescue_error_handling",
+    ),
+)
+
+# Check that when we are not configured to rescue on watchdog timeout that
+# a watchdog timeout event simply boots the firmware normally.
+opentitan_test(
+    name = "rescue_watchdog_disabled_test",
+    srcs = [
+        "watchdog_test.c",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        exit_failure = "(FAIL|BFV:|mode: RESQ).*",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        test_cmd = """
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
+            no-op
+        """,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        "//sw/device/silicon_creator/lib/drivers:watchdog",
+    ],
+)
+
+# Check that when we are configured to rescue on watchdog timeout that
+# a watchdog timeout event triggers rescue mode.
+opentitan_test(
+    name = "rescue_watchdog_enabled_test",
+    srcs = [
+        "watchdog_test.c",
+    ],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        changes_otp = True,
+        exit_success = "mode: RESQ",
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_xmodem_enter_on_watchdog",
         test_cmd = """
             --exec="transport init"
+            --exec="fpga clear-bitstream"
             --exec="fpga load-bitstream {bitstream}"
             --exec="bootstrap --clear-uart=true {firmware}"
-            # Set primary slot via the rescue protocol
-            --exec="rescue boot-svc set-primary-bl0-slot SlotB"
-            # Check for firmware execution in slot B
-            --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
-            # Reset and observe continued execution in slot B
-            --exec="gpio apply RESET"
-            --exec="gpio remove RESET"
-            --exec="console --non-interactive --exit-success='bl0_slot = __BB\r\n' --exit-failure='{exit_failure}'"
-            # Set primary slot via the rescue protocol
-            --exec="rescue boot-svc set-primary-bl0-slot SlotA"
-            # Check for firmware execution in slot A
-            --exec="console --non-interactive --exit-success='bl0_slot = AA__\r\n' --exit-failure='{exit_failure}'"
+            --exec="console --non-interactive --exit-success='{exit_success}' --exit-failure='{exit_failure}'"
             no-op
         """,
     ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/lib/drivers:rstmgr",
+        "//sw/device/silicon_creator/lib/drivers:watchdog",
+    ],
 )
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/bad_rom_ext.txt b/sw/device/silicon_creator/rom_ext/e2e/rescue/bad_rom_ext.txt
new file mode 100644
index 0000000000000..0288f231b5c24
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/rescue/bad_rom_ext.txt
@@ -0,0 +1,7 @@
+00000000: 0000 0000 0000 0000 0000 0000 0000 0000  ................
+*
+00000330: 0000 0000 4f54 5245 0000 0000 0000 0000  ....OTRE........
+00000340: 0000 0000 6300 0000 e703 0000 0000 0000  ................
+00000350: 0000 0000 0000 0000 0000 0000 0000 0000  ................
+*
+0000fff0: 0000 0000 0000 0000 0000 0000 0000 0000  ................
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/std_utils/BUILD b/sw/device/silicon_creator/rom_ext/e2e/rescue/std_utils/BUILD
new file mode 100644
index 0000000000000..947cfb927b4d8
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/rescue/std_utils/BUILD
@@ -0,0 +1,56 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "fpga_params",
+    "opentitan_test",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+opentitan_test(
+    name = "xmodem_protocol",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext/e2e/rescue:boot_test_slot_a": "boot_test",
+        },
+        changes_otp = True,
+        test_cmd = """
+            --clear-bitstream
+            --bootstrap={rom_ext}
+            --firmware={boot_test}
+        """,
+        test_harness = "//sw/host/tests/rescue:xmodem_protocol",
+    ),
+)
+
+opentitan_test(
+    name = "usbdfu_protocol",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        assemble = "",
+        binaries = {
+            "//sw/device/silicon_creator/rom_ext/e2e/rescue:boot_test_slot_a": "boot_test",
+        },
+        changes_otp = True,
+        rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_usbdfu",
+        test_cmd = """
+            --clear-bitstream
+            --bootstrap={rom_ext}
+            --firmware={boot_test}
+            --trigger=strap
+            --value=3
+        """,
+        test_harness = "//sw/host/tests/rescue:usbdfu_protocol",
+    ),
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/BUILD b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/BUILD
new file mode 100644
index 0000000000000..721f3ca5f85de
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/BUILD
@@ -0,0 +1,23 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules/opentitan:cc.bzl", "exec_env_filegroup")
+
+package(default_visibility = ["//visibility:public"])
+
+# These ROM_EXTs were built at 6ae909eed1efd43e0abd36f580504b56aaf19850 to
+# allow testing the the latest version of opentitantool against an older
+# ROM_EXT implementing the (unversioned) version 0 rescue protocol.
+exec_env_filegroup(
+    name = "rom_ext_rescue_protocol_0",
+    testonly = True,
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": "cw310",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": "cw340",
+    },
+    files = {
+        "rom_ext_dice_x509_slot_virtual_fpga_cw310.signed.bin": "cw310",
+        "rom_ext_dice_x509_slot_virtual_fpga_cw340.signed.bin": "cw340",
+    },
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..ec50814deea22
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..5473aef764eb2
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/e2e/rescue/testdata/rom_ext_dice_x509_slot_virtual_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/e2e/rescue/watchdog_test.c b/sw/device/silicon_creator/rom_ext/e2e/rescue/watchdog_test.c
new file mode 100644
index 0000000000000..1c4f04bf3374c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/rescue/watchdog_test.c
@@ -0,0 +1,63 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/lib/drivers/watchdog.h"
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+static uint32_t compute_ticks_per_ms(uint64_t hz) {
+  const uint64_t kTicksPerMs = udiv64_slow(hz, 1000, NULL);
+  CHECK(kTicksPerMs <= UINT32_MAX, "kTicksPerMs exceeds UINT32_MAX");
+  return (uint32_t)kTicksPerMs;
+}
+
+// Setup the watchdog to bite.
+static status_t watchdog_bite_setup(void) {
+  // Set watchdog bite threshold to 5ms.
+  uint32_t bite_threshold = 5 * compute_ticks_per_ms(kClockFreqAonHz);
+  uint32_t bark_threshold = 9 * bite_threshold / 8;
+  LOG_INFO("bite threshold = %d", bite_threshold);
+  LOG_INFO("bark threshold = %d", bark_threshold);
+  watchdog_configure((watchdog_config_t){
+      .bite_threshold = bite_threshold,
+      .bark_threshold = bark_threshold,
+      .enable = kHardenedBoolTrue,
+  });
+
+  // Sleep for 6ms.
+  busy_spin_micros(6 * 1000);
+
+  watchdog_disable();
+  return UNKNOWN();
+}
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  status_t result = OK_STATUS();
+  const retention_sram_t *rr = retention_sram_get();
+  uint32_t reason = rr->creator.reset_reasons;
+
+  if (bitfield_bit32_read(reason, kRstmgrReasonPowerOn)) {
+    LOG_INFO("Configure watchdog to bite.");
+    result = watchdog_bite_setup();
+  } else if (bitfield_bit32_read(reason, kRstmgrReasonWatchdog)) {
+    LOG_INFO("Got watchdog reset.");
+    result = OK_STATUS();
+  } else {
+    LOG_ERROR("Unknown reset reason");
+    result = UNKNOWN();
+  }
+  return status_ok(result);
+}
diff --git a/sw/device/silicon_creator/rom_ext/e2e/secver/BUILD b/sw/device/silicon_creator/rom_ext/e2e/secver/BUILD
new file mode 100644
index 0000000000000..d99acf591fbae
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/e2e/secver/BUILD
@@ -0,0 +1,169 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex", "hex_digits")
+load("//rules:cross_platform.bzl", "dual_cc_library", "dual_inputs")
+load("//rules:linker.bzl", "ld_library")
+load("//rules:manifest.bzl", "manifest")
+load("//rules/opentitan:defs.bzl", "fpga_params", "opentitan_binary", "opentitan_test")
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
+    "ROM_EXT_VERSION",
+    "SLOTS",
+    "TEST_OWNER_CONFIGS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+manifest(d = {
+    "name": "manifest0",
+    "identifier": hex(CONST.ROM_EXT),
+    "visibility": ["//visibility:public"],
+    "version_major": "0",
+    "version_minor": "0",
+    "security_version": "0",
+    "secver_write": "false",
+})
+
+manifest(d = {
+    "name": "manifest1",
+    "identifier": hex(CONST.ROM_EXT),
+    "visibility": ["//visibility:public"],
+    "version_major": "0",
+    "version_minor": "1",
+    "security_version": "1",
+    "secver_write": "true",
+})
+
+manifest(d = {
+    "name": "manifest2",
+    "identifier": hex(CONST.ROM_EXT),
+    "visibility": ["//visibility:public"],
+    "version_major": "0",
+    "version_minor": "2",
+    "security_version": "2",
+    "secver_write": "false",
+})
+
+manifest(d = {
+    "name": "manifest3",
+    "identifier": hex(CONST.ROM_EXT),
+    "visibility": ["//visibility:public"],
+    "version_major": "0",
+    "version_minor": "3",
+    "security_version": "3",
+    "secver_write": "true",
+})
+
+_TEST_ROM_EXTS = {
+    "0": {
+        "manifest": ":manifest0",
+    },
+    "1": {
+        "manifest": ":manifest1",
+    },
+    "2": {
+        "manifest": ":manifest2",
+    },
+    "3": {
+        "manifest": ":manifest3",
+    },
+}
+
+[
+    opentitan_binary(
+        name = "rom_ext_{}".format(name),
+        testonly = True,
+        ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+        exec_env = [
+            "//hw/top_earlgrey:fpga_cw310",
+            "//hw/top_earlgrey:fpga_cw340",
+        ],
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_virtual",
+        manifest = param["manifest"],
+        spx_key = {"//sw/device/silicon_creator/rom/keys/fake/spx:spx_keyset": "prod_key_0"},
+        deps = [
+            "//sw/device/lib/crt",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/ownership:test_owner",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake",
+            "//sw/device/silicon_creator/lib/rescue:rescue_xmodem",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509",
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_section_dice_x509_slot_virtual",
+        ],
+    )
+    for name, param in _TEST_ROM_EXTS.items()
+]
+
+opentitan_test(
+    name = "secver_write_test",
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    fpga = fpga_params(
+        timeout = "long",
+        assemble = "{rom_ext}@{rom_ext_slot_a} {boot_test}@{owner_slot_a}",
+        binaries = {
+            ":boot_test": "boot_test",
+            ":rom_ext_1": "rom_ext1",
+            ":rom_ext_2": "rom_ext2",
+            ":rom_ext_3": "rom_ext3",
+        },
+        changes_otp = True,
+        exit_success = "BFV:{}".format(hex_digits(CONST.BFV.BOOT_POLICY.ROLLBACK)),
+        rom_ext = ":rom_ext_0",
+        test_cmd = """
+            # First, assemble the additional images we'll need for this test.
+            --exec="image assemble -s 524288 --mirror=false -o fw1.bin {rom_ext1}@{rom_ext_slot_a} {boot_test}@{owner_slot_a}"
+            --exec="image assemble -s 524288 --mirror=false -o fw2.bin {rom_ext2}@{rom_ext_slot_a} {boot_test}@{owner_slot_a}"
+            --exec="image assemble -s 524288 --mirror=false -o fw3.bin {rom_ext3}@{rom_ext_slot_a} {boot_test}@{owner_slot_a}"
+            --exec="transport init"
+            --exec="fpga clear-bitstream"
+            --exec="fpga load-bitstream {bitstream}"
+
+            # Bootstrap the initial version 0 into SlotA
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='rom_ext_min_sec_ver = 0'"
+
+            # Rescue and update to SlotB.  We expect to update the secver.
+            --exec="rescue firmware --raw --slot=SlotB fw1.bin"
+            --exec="console --non-interactive --exit-success='rom_ext_min_sec_ver = 1'"
+
+            # Rescue and update to SlotA.  We expect NOT to update the secver.
+            --exec="rescue firmware --raw --slot=SlotA fw2.bin"
+            --exec="console --non-interactive --exit-success='rom_ext_min_sec_ver = 1'"
+
+            # Rescue and update to SlotB.  We expect to update the secver.
+            --exec="rescue firmware --raw --slot=SlotB fw3.bin"
+            --exec="console --non-interactive --exit-success='rom_ext_min_sec_ver = 3'"
+
+            # Finally, bootstrap back to version 0, which we expect NOT to work.
+            --exec="bootstrap --clear-uart=true {firmware}"
+            --exec="console --non-interactive --exit-success='{exit_success}' --timeout=10s"
+            no-op
+        """,
+    ),
+)
+
+opentitan_binary(
+    name = "boot_test",
+    testonly = True,
+    srcs = ["//sw/device/silicon_creator/rom_ext/e2e/verified_boot:boot_test"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/verified_boot/BUILD b/sw/device/silicon_creator/rom_ext/e2e/verified_boot/BUILD
index 144a098ee7931..69db31358a34b 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/verified_boot/BUILD
+++ b/sw/device/silicon_creator/rom_ext/e2e/verified_boot/BUILD
@@ -1,17 +1,36 @@
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
+
+load("//rules:const.bzl", "CONST", "hex")
+load(
+    "//rules:manifest.bzl",
+    "integrator_specific_firmware_binding",
+    "manifest",
+    "product_expr",
+)
+load(
+    "//rules:otp.bzl",
+    "STD_OTP_OVERLAYS",
+    "otp_hex",
+    "otp_image",
+    "otp_json_immutable_rom_ext",
+    "otp_partition",
+)
 load(
     "//rules/opentitan:defs.bzl",
     "DEFAULT_TEST_FAILURE_MSG",
     "DEFAULT_TEST_SUCCESS_MSG",
-    "EARLGREY_TEST_ENVS",
-    "cw310_params",
     "fpga_params",
     "opentitan_test",
+    "qemu_params",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext/imm_section:defs.bzl",
+    "IMMUTABLE_HASH_UNENFORCED_MSG",
+    "IMM_SECTION_MAJOR_VERSION",
+    "IMM_SECTION_MINOR_VERSION",
 )
-load("//rules:const.bzl", "CONST", "hex")
-load("//rules:manifest.bzl", "manifest")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -20,62 +39,113 @@ filegroup(
     srcs = ["boot_test.c"],
 )
 
+otp_json_immutable_rom_ext(
+    name = "otp_json_with_imm_romext_enabled",
+    testonly = True,
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items = {
+                "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN": otp_hex(CONST.HARDENED_TRUE),
+            },
+        ),
+    ],
+    rom_ext = "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+    visibility = ["//visibility:private"],
+)
+
+otp_image(
+    name = "otp_img_with_imm_romext_enabled",
+    testonly = True,
+    src = "//hw/ip/otp_ctrl/data:otp_json_prod",
+    overlays = STD_OTP_OVERLAYS + [
+        "//sw/device/silicon_creator/rom_ext/e2e:otp_json_secret2_locked",
+        ":otp_json_with_imm_romext_enabled",
+    ],
+    visibility = ["//visibility:private"],
+)
+
 _POSITIONS = {
     "owner_slot_a": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "bl0_slot = AA__\r\n",
+        "otp_img": None,
     },
     "owner_slot_b": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_b",
-        "owner_offset": "0x90000",
+        "owner_offset": "{owner_slot_b}",
         "success": "bl0_slot = __BB\r\n",
+        "otp_img": None,
     },
     "owner_virtual_a": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "bl0_slot = AA__\r\n",
+        "otp_img": None,
     },
     "owner_virtual_b": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_virtual",
-        "owner_offset": "0x90000",
+        "owner_offset": "{owner_slot_b}",
         "success": "bl0_slot = __BB\r\n",
+        "otp_img": None,
     },
     "romext_slot_a": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_a",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_a",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "rom_ext_slot = AA__\r\n",
+        "otp_img": None,
     },
     "romext_slot_b": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_b",
-        "romext_offset": "0x80000",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_b",
+        "romext_offset": "{rom_ext_slot_b}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "rom_ext_slot = __BB\r\n",
+        "otp_img": None,
     },
     "romext_virtual_a": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_virtual",
-        "romext_offset": "0",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        "romext_offset": "{rom_ext_slot_a}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "rom_ext_slot = AA__\r\n",
+        "otp_img": None,
     },
     "romext_virtual_b": {
-        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_slot_virtual",
-        "romext_offset": "0x80000",
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        "romext_offset": "{rom_ext_slot_b}",
         "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
-        "owner_offset": "0x10000",
+        "owner_offset": "{owner_slot_a}",
         "success": "rom_ext_slot = __BB\r\n",
+        "otp_img": None,
+    },
+    "romext_virtual_a_with_imm_romext_enabled": {
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        "romext_offset": "{rom_ext_slot_a}",
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+        "owner_offset": "{owner_slot_a}",
+        "success": "rom_ext_slot = AA__\r\n",
+        "failure": IMMUTABLE_HASH_UNENFORCED_MSG,
+        "otp_img": ":otp_img_with_imm_romext_enabled",
+    },
+    "imm_section_virtual_a": {
+        "romext": "//sw/device/silicon_creator/rom_ext:rom_ext_dice_x509_slot_virtual",
+        "romext_offset": "{rom_ext_slot_a}",
+        "linker_script": "//sw/device/lib/testing/test_framework:ottf_ld_silicon_owner_slot_a",
+        "owner_offset": "{owner_slot_a}",
+        "success": "IMM_SECTION:{}.{}".format(IMM_SECTION_MAJOR_VERSION, IMM_SECTION_MINOR_VERSION),
+        "otp_img": None,
     },
 }
 
@@ -84,18 +154,33 @@ _POSITIONS = {
         name = "position_{}".format(name),
         srcs = [":boot_test"],
         exec_env = {
-            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
         },
         fpga = fpga_params(
             assemble = "{romext}@{romext_offset} {firmware}@{owner_offset}",
             binaries = {
                 position["romext"]: "romext",
             },
+            exit_failure = position.get("failure", DEFAULT_TEST_FAILURE_MSG),
             exit_success = position["success"],
+            otp = position["otp_img"],
             owner_offset = position["owner_offset"],
             romext_offset = position["romext_offset"],
         ),
         linker_script = position["linker_script"],
+        qemu = qemu_params(
+            assemble = "{romext}@{romext_offset} {firmware}@{owner_offset}",
+            binaries = {
+                position["romext"]: "romext",
+            },
+            exit_failure = position.get("failure", DEFAULT_TEST_FAILURE_MSG),
+            exit_success = position["success"],
+            otp = position["otp_img"],
+            owner_offset = position["owner_offset"],
+            romext_offset = position["romext_offset"],
+        ),
         deps = [
             "//sw/device/lib/base:status",
             "//sw/device/lib/testing/test_framework:ottf_main",
@@ -124,7 +209,9 @@ opentitan_test(
     name = "bad_manifest_test",
     srcs = [":boot_test"],
     exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
     },
     fpga = fpga_params(
         exit_failure = "PASS|FAIL|FAULT|BFV:.{8}",
@@ -133,6 +220,63 @@ opentitan_test(
         exit_success = "BFV:054d410d",
     ),
     manifest = ":bad_manifest",
+    qemu = qemu_params(
+        exit_failure = "PASS|FAIL|FAULT|BFV:.{8}",
+        exit_success = "BFV:054d410d",
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+manifest(d = {
+    "name": "bad_spx_manifest",
+    "address_translation": hex(CONST.HARDENED_FALSE),
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "extensions": [
+        "spx_key",
+        "",
+        "secver_write",
+        "isfb",
+        "isfb_erase",
+        "",
+        "",
+        "",
+        "",
+        "",
+        "",
+        "",
+        "",
+        "",
+        "spx_signature",
+    ],
+})
+
+opentitan_test(
+    name = "bad_spx_manifest_test",
+    srcs = [":boot_test"],
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(
+        exit_failure = "PASS|FAIL|FAULT|BFV:.{8}",
+        # Because our bad manifest placed spx_signature in a wrong slot, we
+        # should expect kErrorManifestBadExtension from the ROM_EXT.
+        exit_success = "BFV:044d410d",
+    ),
+    manifest = ":bad_spx_manifest",
+    qemu = qemu_params(
+        exit_failure = "PASS|FAIL|FAULT|BFV:.{8}",
+        exit_success = "BFV:044d410d",
+    ),
+    spx_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset": "app_prod_0"},
     deps = [
         "//sw/device/lib/base:status",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -142,23 +286,39 @@ opentitan_test(
 )
 
 _KEYS = {
+    "dev": {
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_dev_0"},
+        "spx": {},
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+    },
+    "dev_hybrid_spx_prehashed": {
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_dev_0"},
+        "spx": {"//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset": "app_dev_0"},
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+    },
     "prod": {
-        "key": {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_prod_private_key_0": "prod_key_0"},
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        "spx": {},
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
-    "test": {
-        "key": {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_test_private_key_0": "test_key_0"},
+    "prod_hybrid_spx_pure": {
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+        "spx": {"//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset": "app_prod_0"},
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
-    "dev": {
-        "key": {"//sw/device/silicon_creator/rom_ext/keys/fake:rom_ext_dev_private_key_0": "dev_key_0"},
+    "test": {
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_test_0"},
+        "spx": {},
         "exit_success": DEFAULT_TEST_SUCCESS_MSG,
         "exit_failure": DEFAULT_TEST_FAILURE_MSG,
     },
     "unauthorized": {
-        "key": {"//sw/device/silicon_creator/rom/keys/unauthorized/rsa:unauthorized_private_key_0": "unauthorized_key_0"},
+        "ecdsa": {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_unauthorized_0"},
+        "spx": {},
         "exit_success": DEFAULT_TEST_FAILURE_MSG,
         "exit_failure": DEFAULT_TEST_SUCCESS_MSG,
     },
@@ -168,14 +328,21 @@ _KEYS = {
     opentitan_test(
         name = "key_{}".format(name),
         srcs = [":boot_test"],
+        ecdsa_key = keyinfo["ecdsa"],
         exec_env = {
-            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_ext": None,
         },
         fpga = fpga_params(
             exit_failure = keyinfo["exit_failure"],
             exit_success = keyinfo["exit_success"],
         ),
-        rsa_key = keyinfo["key"],
+        qemu = qemu_params(
+            exit_failure = keyinfo["exit_failure"],
+            exit_success = keyinfo["exit_success"],
+        ),
+        spx_key = keyinfo["spx"],
         deps = [
             "//sw/device/lib/base:status",
             "//sw/device/lib/testing/test_framework:ottf_main",
@@ -190,3 +357,41 @@ test_suite(
     name = "keys",
     tests = ["key_{}".format(name) for name in _KEYS],
 )
+
+manifest(d = {
+    "name": "isfb_manifest",
+    "address_translation": hex(CONST.HARDENED_FALSE),
+    "identifier": hex(CONST.OWNER),
+    "visibility": ["//visibility:public"],
+    "integrator_specific_firmware_binding": integrator_specific_firmware_binding(
+        name = "isfb",
+        product_exprs = [
+            product_expr(
+                name = "none",
+                mask = "0xFFFFFFFF",
+                value = "0xFFFFFFFF",
+            ),
+        ],
+        strike_mask = "0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF",
+    ),
+})
+
+opentitan_test(
+    name = "isfb_boot_test",
+    srcs = [":boot_test"],
+    ecdsa_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset": "app_prod_0"},
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+        "//hw/top_earlgrey:sim_qemu_rom_ext": None,
+    },
+    fpga = fpga_params(),
+    manifest = ":isfb_manifest",
+    spx_key = {"//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset": "app_prod_0"},
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:boot_log",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/e2e/verified_boot/boot_test.c b/sw/device/silicon_creator/rom_ext/e2e/verified_boot/boot_test.c
index ad78aa82dbefd..1c2006b1aafa3 100644
--- a/sw/device/silicon_creator/rom_ext/e2e/verified_boot/boot_test.c
+++ b/sw/device/silicon_creator/rom_ext/e2e/verified_boot/boot_test.c
@@ -8,6 +8,113 @@
 #include "sw/device/silicon_creator/lib/boot_log.h"
 #include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
 
+#ifdef WITH_OWNERSHIP_INFO
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+
+status_t ownership_print(void) {
+  owner_block_t config;
+  TRY(flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                           sizeof(config) / sizeof(uint32_t), &config));
+
+  LOG_INFO("owner_page0 tag = %C", config.header.tag);
+  LOG_INFO("owner_page0 ownership_key_alg = %C", config.ownership_key_alg);
+  LOG_INFO("owner_page0 config_version = %d", config.config_version);
+  LOG_INFO("owner_page0 min_security_version_bl0 = %08x",
+           config.min_security_version_bl0);
+  LOG_INFO("owner_page0 update_mode = %C", config.update_mode);
+  LOG_INFO("owner_page0 owner_key = %08x", config.owner_key.raw[0]);
+  return OK_STATUS();
+}
+#else
+status_t ownership_print(void) { return OK_STATUS(); }
+#endif
+
+#ifdef WITH_KEYMGR
+#include "sw/device/lib/dif/dif_keymgr.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+const char *keymgr_state(dif_keymgr_state_t s) {
+  switch (s) {
+    case kDifKeymgrStateReset:
+      return "Reset";
+    case kDifKeymgrStateInitialized:
+      return "Initialized";
+    case kDifKeymgrStateCreatorRootKey:
+      return "CreatorRootKey";
+    case kDifKeymgrStateOwnerIntermediateKey:
+      return "OwnerIntermediateKey";
+    case kDifKeymgrStateOwnerRootKey:
+      return "OwnerRootKey";
+    case kDifKeymgrStateDisabled:
+      return "Disabled";
+    case kDifKeymgrStateInvalid:
+      return "Invalid";
+    default:
+      return "Unknown";
+  }
+}
+
+status_t keymgr_print(void) {
+  dif_keymgr_t km;
+  TRY(dif_keymgr_init(mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR),
+                      &km));
+
+  dif_keymgr_state_t state;
+  TRY(dif_keymgr_get_state(&km, &state));
+  LOG_INFO("keymgr state = %s", keymgr_state(state));
+
+  dif_keymgr_binding_value_t bind;
+  TRY(dif_keymgr_read_binding(&km, &bind));
+  LOG_INFO("keymgr bind_sealing = %08x%08x%08x%08x%08x%08x%08x%08x",
+           bind.sealing[0], bind.sealing[1], bind.sealing[2], bind.sealing[3],
+           bind.sealing[4], bind.sealing[5], bind.sealing[6], bind.sealing[7]);
+  LOG_INFO("keymgr bind_attest = %08x%08x%08x%08x%08x%08x%08x%08x",
+           bind.attestation[0], bind.attestation[1], bind.attestation[2],
+           bind.attestation[3], bind.attestation[4], bind.attestation[5],
+           bind.attestation[6], bind.attestation[7]);
+
+  dif_keymgr_versioned_key_params_t p = {kDifKeymgrVersionedKeyDestSw};
+  TRY(dif_keymgr_generate_versioned_key(&km, p));
+
+  dif_keymgr_output_t out;
+  TRY(dif_keymgr_read_output(&km, &out));
+  LOG_INFO("keymgr sw_key = %08x%08x%08x%08x%08x%08x%08x%08x",
+           out.value[0][0] ^ out.value[1][0], out.value[0][1] ^ out.value[1][1],
+           out.value[0][2] ^ out.value[1][2], out.value[0][3] ^ out.value[1][3],
+           out.value[0][4] ^ out.value[1][4], out.value[0][5] ^ out.value[1][5],
+           out.value[0][6] ^ out.value[1][6],
+           out.value[0][7] ^ out.value[1][7]);
+
+  return OK_STATUS();
+}
+#else
+status_t keymgr_print(void) { return OK_STATUS(); }
+#endif
+
+#ifdef WITH_MANIFEST
+#include "sw/device/silicon_creator/lib/manifest.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+status_t manifest_print(void) {
+  const manifest_t *a = (const manifest_t *)TOP_EARLGREY_EFLASH_BASE_ADDR;
+  const manifest_t *b =
+      (const manifest_t *)(TOP_EARLGREY_EFLASH_BASE_ADDR +
+                           (TOP_EARLGREY_EFLASH_SIZE_BYTES / 2));
+  LOG_INFO("slot_a rom_ext_id = %C", a->identifier);
+  LOG_INFO("slot_a rom_ext_version = %u.%u", a->version_major,
+           a->version_minor);
+  LOG_INFO("slot_b rom_ext_id = %C", b->identifier);
+  LOG_INFO("slot_b rom_ext_version = %u.%u", b->version_major,
+           b->version_minor);
+  return OK_STATUS();
+}
+#else
+status_t manifest_print(void) { return OK_STATUS(); }
+#endif
+
 OTTF_DEFINE_TEST_CONFIG();
 
 status_t boot_log_print(boot_log_t *boot_log) {
@@ -29,6 +136,9 @@ status_t boot_log_print(boot_log_t *boot_log) {
   LOG_INFO("boot_log rom_ext_min_sec_ver = %u", boot_log->rom_ext_min_sec_ver);
   LOG_INFO("boot_log bl0_min_sec_ver = %u", boot_log->bl0_min_sec_ver);
   LOG_INFO("boot_log primary_bl0_slot = %C", boot_log->primary_bl0_slot);
+  TRY(manifest_print());
+  TRY(ownership_print());
+  TRY(keymgr_print());
   return OK_STATUS();
 }
 
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/BUILD b/sw/device/silicon_creator/rom_ext/imm_section/BUILD
new file mode 100644
index 0000000000000..e5855cdb9994b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/BUILD
@@ -0,0 +1,155 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@lowrisc_opentitan//rules/opentitan:transform.bzl", "obj_transform")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU", "opentitan_binary")
+load("//rules:linker.bzl", "ld_library")
+load(
+    "//sw/device/silicon_creator/rom_ext/imm_section:defs.bzl",
+    "DEFAULT_EXEC_ENV",
+    "IMM_SECTION_MAJOR_VERSION",
+    "IMM_SECTION_MINOR_VERSION",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
+    "SLOTS",
+)
+load(
+    "//sw/device/silicon_creator/rom_ext/imm_section:utils.bzl",
+    "create_imm_section_targets",
+    "imm_section_bundle",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+cc_library(
+    name = "main_lib",
+    srcs = [
+        "imm_section.c",
+        "imm_section_start.S",
+    ],
+    hdrs = ["imm_section.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        ":imm_section_epmp",
+        ":imm_section_version_def",
+        "//hw/top_earlgrey/ip_autogen/flash_ctrl:flash_ctrl_c_regs",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:hardened",
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib:epmp_state",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/base:boot_measurements",
+        "//sw/device/silicon_creator/lib/base:sec_mmio",
+        "//sw/device/silicon_creator/lib/base:static_critical",
+        "//sw/device/silicon_creator/lib/base:static_dice",
+        "//sw/device/silicon_creator/lib/cert:dice_chain",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/drivers:otbn",
+        "//sw/device/silicon_creator/lib/drivers:rnd",
+        "//sw/device/silicon_creator/lib/ownership:ownership_key",
+        "//sw/device/silicon_creator/rom_ext:rom_ext_manifest",
+    ],
+)
+
+cc_library(
+    name = "imm_section_version",
+    hdrs = ["imm_section_version.h"],
+    deps = [
+        "//sw/device/lib/base:macros",
+    ],
+)
+
+cc_library(
+    name = "imm_section_version_def",
+    srcs = [
+        "imm_section_version_def.c",
+        "//rules:autogen_stamp_include",
+    ],
+    local_defines = [
+        "IMM_SECTION_MAJOR_VERSION={}".format(IMM_SECTION_MAJOR_VERSION),
+        "IMM_SECTION_MINOR_VERSION={}".format(IMM_SECTION_MINOR_VERSION),
+    ],
+    deps = [
+        ":imm_section_version",
+    ],
+    alwayslink = True,
+)
+
+cc_library(
+    name = "imm_section_epmp",
+    srcs = ["imm_section_epmp.c"],
+    hdrs = ["imm_section_epmp.h"],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:macros",
+        "//sw/device/silicon_creator/lib:epmp_state",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib:manifest",
+        "//sw/device/silicon_creator/lib/drivers:epmp",
+        "//sw/device/silicon_creator/lib/drivers:lifecycle",
+    ],
+)
+
+ld_library(
+    name = "ld_common",
+    includes = ["imm_section_common.ld"],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
+        "//sw/device:info_sections",
+        "//sw/device/silicon_creator/lib/base:static_critical_sections",
+        "//sw/device/silicon_creator/lib/base:static_dice_sections",
+    ],
+)
+
+[
+    ld_library(
+        name = "ld_slot_{}".format(slot),
+        script = "imm_section_slot_{}.ld".format(slot),
+        deps = [
+            ":ld_common",
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey_memory",
+        ],
+    )
+    for slot in SLOTS
+]
+
+[
+    opentitan_binary(
+        name = "main_binaries_{}_slot_{}".format(variation_name, slot),
+        exec_env = DEFAULT_EXEC_ENV,
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = ":ld_slot_{}".format(slot),
+        manifest = "//hw/top_earlgrey:none_manifest",
+        deps = [
+            ":main_lib",
+            "//sw/device/lib/crt",
+        ] + variation_deps,
+    )
+    for variation_name, variation_deps in ROM_EXT_VARIATIONS.items()
+    for slot in SLOTS
+]
+
+[
+    create_imm_section_targets(
+        name = "main_section_{}_slot_{}".format(variation_name, slot),
+        src = ":main_binaries_{}_slot_{}".format(variation_name, slot),
+    )
+    for variation_name, variation_deps in ROM_EXT_VARIATIONS.items()
+    for slot in SLOTS
+]
+
+imm_section_bundle(
+    name = "release_bundle",
+    variants = {
+        variation_name: ":main_binaries_{}_slot_virtual".format(variation_name)
+        for variation_name, _ in ROM_EXT_VARIATIONS.items()
+    },
+)
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/README.md b/sw/device/silicon_creator/rom_ext/imm_section/README.md
new file mode 100644
index 0000000000000..4729ab67462f3
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/README.md
@@ -0,0 +1,97 @@
+# RomExt Immutable Section Release Guide
+
+## Bump the release version
+
+Edit the `IMM_SECTION_VERSION_{MAJOR,MINOR}"` line in the bazel file.
+`sw/device/silicon_creator/rom_ext/imm_section/defs.bzl`
+
+After editing, the edit PR should be MERGED before continuing to create
+reproducible builds from a clean tree in the mainline.
+
+Building / stamping from a dirty tree should only be done for testing purposes.
+
+## Build a release bundle
+
+```shell
+$ bazel build --stamp //sw/device/silicon_creator/rom_ext/imm_section:release_bundle
+```
+
+Building with --stamp flag will stamp the built immutable section, including
+the commit hash and the workspace status.
+
+Note: Building from a dirty tree or unmerged commit should only be done for
+testing purposes. When building under dirty tree, the output folder will be
+suffixed with "-modified" automatically.
+
+The command will create a release tarball in
+`bazel-bin/sw/device/silicon_creator/rom_ext/imm_section/release_bundle.tar`.
+
+The built tarball contains:
+
+*   a generated BUILD file that can be referenced by the ROM\_EXT target, and
+*   compiled imm\_section binary for each variant, and
+*   elf / map files corresponding to each binary for debugging purposes.
+
+## Submit a prebuilt release
+
+Extracting the tarball to your prebuilt folder will create the prebuilt targets
+that can be linked to ROM\_EXT. The prebuilt folder should be checked-in to either:
+
+*   this (upstream) repo under: `sw/device/silicon_creator/rom\_ext/imm_section/prebuilts/`, or
+*   to a (downstream) integrators repo.
+
+```shell
+$ tar xvf \
+  bazel-bin/sw/device/silicon_creator/rom_ext/imm_section/release_bundle.tar \
+  -C sw/device/silicon_creator/rom_ext/imm_section/prebuilts/
+2025-03-28-v0.1-d686b36b/BUILD
+2025-03-28-v0.1-d686b36b/main_binaries_dice_x509_slot_virtual_silicon_creator.bin
+2025-03-28-v0.1-d686b36b/main_binaries_dice_x509_slot_virtual_silicon_creator.elf
+2025-03-28-v0.1-d686b36b/main_binaries_dice_x509_slot_virtual_silicon_creator.map
+2025-03-28-v0.1-d686b36b/main_binaries_dice_cwt_slot_virtual_silicon_creator.bin
+2025-03-28-v0.1-d686b36b/main_binaries_dice_cwt_slot_virtual_silicon_creator.elf
+2025-03-28-v0.1-d686b36b/main_binaries_dice_cwt_slot_virtual_silicon_creator.map
+
+$ ./bazelisk.sh query //sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b/...
+//sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b:dice_cwt
+//sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b:dice_cwt_object
+//sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b:dice_x509
+//sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b:dice_x509_object
+```
+
+## Create ROM\_EXT with a prebuilt release
+
+The immutable section is linked to ROM\_EXT by deps. To build a ROM\_EXT with
+prebuilt release, please update the deps to the corresponding variants listed
+above. For example,
+
+```diff
+  deps = [
+-     "@//sw/device/silicon_creator/rom_ext/imm_section:main_section_dice_cwt_slot_virtual",
++     "@//sw/device/silicon_creator/rom_ext/imm_section/prebuilts/2025-03-28-v0.1-d686b36b:dice_cwt",
+  ]
+```
+
+## Enforce immutability hash check in OTP
+
+The immutability check is disabled by default. Integrator needs to flip the
+settings in their SKU's OTP image to enforce the hash of the immutable section.
+
+For example, include the following overlay to the perso OTP images.
+
+```python
+otp_json_immutable_rom_ext(
+    name = "otp_json_imm_rom_ext_hash",
+    partitions = [
+        otp_partition(
+            name = "CREATOR_SW_CFG",
+            items =
+                {
+                    "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN": otp_hex(CONST.HARDENED_TRUE),
+                },
+        ),
+    ],
+    rom_ext = "//path/to/your:rom_ext_target",
+    visibility = ["//visibility:private"],
+)
+```
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/defs.bzl b/sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
new file mode 100644
index 0000000000000..01656d30e652d
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
@@ -0,0 +1,22 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# The version struct will be appened to the end of imm_section.
+IMM_SECTION_MAJOR_VERSION = 0
+IMM_SECTION_MINOR_VERSION = 4
+
+IMM_SECTION_VERSION = "{}.{}".format(IMM_SECTION_MAJOR_VERSION, IMM_SECTION_MINOR_VERSION)
+
+DEFAULT_EXEC_ENV = [
+    "//hw/top_earlgrey:fpga_cw310",
+    "//hw/top_earlgrey:fpga_cw340",
+    "//hw/top_earlgrey:sim_dv_base",
+    "//hw/top_earlgrey:sim_qemu_base",
+    "//hw/top_earlgrey:sim_verilator_base",
+    "//hw/top_earlgrey:silicon_creator",
+]
+
+# CAUTION: The message below should match the message defined in:
+#   //sw/device/silicon_creator/rom_ext/imm_section/imm_section.c
+IMMUTABLE_HASH_UNENFORCED_MSG = "hash unenforced"
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/e2e/BUILD b/sw/device/silicon_creator/rom_ext/imm_section/e2e/BUILD
new file mode 100644
index 0000000000000..74d93418a4d25
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/e2e/BUILD
@@ -0,0 +1,10 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "empty_test",
+    srcs = ["empty_test.c"],
+)
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/e2e/empty_test.c b/sw/device/silicon_creator/rom_ext/imm_section/e2e/empty_test.c
new file mode 100644
index 0000000000000..4beb355c443c0
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/e2e/empty_test.c
@@ -0,0 +1,9 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) { return true; }
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/BUILD b/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/BUILD
new file mode 100644
index 0000000000000..a935741163d8b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_python//python:defs.bzl", "py_test")
+load(
+    "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
+    "SLOTS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+[
+    py_test(
+        name = "env_independent_{}_slot_{}_test".format(variation, slot),
+        srcs = ["env_independent_test.py"],
+        data = [
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_binaries_{}_slot_{}".format(variation, slot),
+        ],
+        main = "env_independent_test.py",
+    )
+    for slot in SLOTS
+    for variation in ROM_EXT_VARIATIONS.keys()
+]
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/env_independent_test.py b/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/env_independent_test.py
new file mode 100644
index 0000000000000..31058ff6d2fa4
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/env_independent_test.py
@@ -0,0 +1,12 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from pathlib import Path
+
+binaries = list(Path('.').glob('**/*.bin'))
+assert len(binaries) > 2
+
+contents = [path.read_bytes() for path in binaries]
+assert len(set(contents)) == 1, "Immutable ROM_EXT is not exec env independent"
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section.c b/sw/device/silicon_creator/rom_ext/imm_section/imm_section.c
new file mode 100644
index 0000000000000..752b2a605b39c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section.c
@@ -0,0 +1,76 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/imm_section/imm_section.h"
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/hardened.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/base/boot_measurements.h"
+#include "sw/device/silicon_creator/lib/base/sec_mmio.h"
+#include "sw/device/silicon_creator/lib/cert/dice_chain.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/otbn.h"
+#include "sw/device/silicon_creator/lib/drivers/rnd.h"
+#include "sw/device/silicon_creator/lib/epmp_state.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+#include "sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_manifest.h"
+
+OT_WARN_UNUSED_RESULT
+static rom_error_t imm_section_start(void) {
+  // Patch a bug in the OTBN ECDSA-P256 program.
+  //
+  // There is a single instruction with mistakenly transposed operands which
+  // can affect the random share values.  This bug DOES NOT affect the
+  // correctness of the OTBN calculations.
+  sc_otbn_patch();
+
+  // Check the ePMP state.
+  HARDENED_RETURN_IF_ERROR(epmp_state_check());
+  // Check sec_mmio expectations.
+  // We don't check the counters since we don't want to tie ROM_EXT to a
+  // specific ROM version.
+  sec_mmio_check_values(rnd_uint32());
+
+  // Initialize Immutable ROM EXT.
+  sec_mmio_next_stage_init();
+  HARDENED_RETURN_IF_ERROR(imm_section_epmp_reconfigure());
+
+  // Lockdown the attestation seed to readonly as soon as possible to prevent
+  // key tampering and exfiltration.
+  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageAttestationKeySeeds);
+  flash_ctrl_cert_info_page_owner_restrict(
+      &kFlashCtrlInfoPageAttestationKeySeeds);
+  flash_ctrl_info_cfg_lock(&kFlashCtrlInfoPageAttestationKeySeeds);
+
+  // Establish our identity.
+  const manifest_t *rom_ext = rom_ext_manifest();
+  HARDENED_RETURN_IF_ERROR(dice_chain_init());
+  HARDENED_RETURN_IF_ERROR(dice_chain_attestation_silicon());
+
+  // Sideload sealing key to KMAC hw keyslot.
+  HARDENED_RETURN_IF_ERROR(ownership_seal_init());
+
+  HARDENED_RETURN_IF_ERROR(
+      dice_chain_attestation_creator(&boot_measurements.rom_ext, rom_ext));
+
+  // Make mutable part executable.
+  HARDENED_RETURN_IF_ERROR(imm_section_epmp_mutable_rx(rom_ext));
+
+  return kErrorOk;
+}
+
+void imm_section_main(void) {
+  rom_error_t error = imm_section_start();
+
+  // If there's an error, this hardened check will trigger the irq handler
+  // in ROM to shutdown.
+  HARDENED_CHECK_EQ(error, kErrorOk);
+
+  // Go back to ROM / Mutable ROM_EXT.
+  return;
+}
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section.h b/sw/device/silicon_creator/rom_ext/imm_section/imm_section.h
new file mode 100644
index 0000000000000..422308cbdc26b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section.h
@@ -0,0 +1,18 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void imm_section_main(void);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_H_
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld
new file mode 100644
index 0000000000000..d2131cd42f9f0
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld
@@ -0,0 +1,171 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * TODO(#24368): Adapt the linker script for real IMM_SECTION. This linker
+ * script only works for hello-world ROM_EXT IMM_SECTION.
+ */
+
+OUTPUT_ARCH(riscv)
+
+/**
+ * Indicate that there are no dynamic libraries, whatsoever.
+ */
+__DYNAMIC = 0;
+
+/* DV Log offset (has to be different to other boot stages). */
+_dv_log_offset = 0x10000;
+
+ENTRY(_imm_section_start_boot)
+
+SECTIONS {
+  /**
+   * Ibex interrupt vector.
+   *
+   * This has to be set up at a 256-byte offset, so that we can use it with
+   * Ibex.
+   */
+  .vectors : ALIGN(256) {
+    _text_start = .;
+    _rom_ext_immutable_start = .;
+    KEEP(*(.vectors))
+  } > rom_ext_flash
+
+  /**
+   * C runtime (CRT) section, containing program initialization code.
+   */
+  .crt : ALIGN(4) {
+    KEEP(*(.crt))
+  } > rom_ext_flash
+
+  /**
+   * Standard text section, containing program code.
+   */
+  .text : ALIGN(4) {
+    *(.text)
+    *(.text.*)
+
+    /* Ensure section end is word-aligned. */
+    . = ALIGN(4);
+  } > rom_ext_flash
+
+  /**
+   * Shutdown text section, containing shutdown function(s).
+   *
+   * This must be the last executable section in the ROM_EXT flash image.
+   */
+  .shutdown : ALIGN(4) {
+    *(.shutdown)
+    *(.shutdown.*)
+
+    /* Ensure section end is word-aligned. */
+    . = ALIGN(4);
+    _text_end = .;
+  } > rom_ext_flash
+
+  /**
+   * Read-only data section, containing all large compile-time constants, like
+   * strings.
+   */
+  .rodata : ALIGN(4) {
+    /* Small read-only data comes before regular read-only data for the same
+     * reasons as in the data section */
+    *(.srodata)
+    *(.srodata.*)
+    *(.rodata)
+    *(.rodata.*)
+  } > rom_ext_flash
+
+  /**
+   * Critical static data that is accessible by both the ROM and the ROM
+   * extension.
+   */
+  INCLUDE sw/device/silicon_creator/lib/base/static_critical.ld
+
+  /**
+   * Critical static data that is accessible by both the immutable and
+   * mutable ROM extension.
+   */
+  INCLUDE sw/device/silicon_creator/lib/base/static_dice.ld
+
+  /**
+   * Mutable data section, at the bottom of ram_main. This will be initialized
+   * from flash at runtime by the CRT.
+   *
+   * Load this by copying the bytes from [_data_init_start, _data_init_end] into
+   * the range [_data_start, _data_end].
+   */
+  .data : ALIGN(4) {
+    _data_start = .;
+    _data_init_start = LOADADDR(.data);
+
+    /* This will get loaded into `gp`, and the linker will use that register for
+     * accessing data within [-2048,2047] of `__global_pointer$`.
+     *
+     * This is much cheaper (for small data) than materializing the
+     * address and loading from that (which will take one extra instruction).
+     */
+    __global_pointer$ = . + 2048;
+
+    /* Small data should come before larger data. This helps to ensure small
+     * globals are within 2048 bytes of the value of `gp`, making their accesses
+     * hopefully only take one instruction. */
+    *(.sdata)
+    *(.sdata.*)
+
+    /* Other data will likely need multiple instructions to load, so we're less
+     * concerned about address materialisation taking more than one instruction.
+     */
+    *(.data)
+    *(.data.*)
+
+    /* Ensure section end is word-aligned. */
+    . = ALIGN(4);
+    _data_end = .;
+    _data_init_end = LOADADDR(.data) + SIZEOF(.data);
+    _rom_ext_immutable_end = LOADADDR(.data) + SIZEOF(.data);
+
+    /* This puts it in ram_main at runtime (for the VMA), but puts the section
+     * into flash for load time (for the LMA). This is why `_data_init_*` uses
+     * `LOADADDR`.
+     *
+     * Using `AT>` means we don't have to keep track of the next free part of
+     * flash, as we do in our other linker scripts. */
+  } > ram_main AT> rom_ext_flash
+
+  /**
+   * Standard BSS section. This will be zeroed at runtime by the CRT.
+   */
+  .bss : ALIGN(4) {
+    _bss_start = .;
+
+    /* Small BSS comes before regular BSS for the same reasons as in the data
+     * section */
+    *(.sbss)
+    *(.sbss.*)
+    *(.bss)
+    *(.bss.*)
+
+    /* Ensure section end is word-aligned. */
+    . = ALIGN(4);
+    _bss_end = .;
+  } > ram_main
+
+  INCLUDE sw/device/info_sections.ld
+
+  /**
+   * Store the immutable section version at the last 32 bytes.
+   *
+   * The version is defined in the bazel file:
+   *   sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
+   */
+  .imm_section_version : ALIGN(32) {
+    KEEP(*(.imm_section_version))
+    KEEP(*(.imm_section_version.*))
+
+    ASSERT(
+      SIZEOF(.imm_section_version) == 32,
+      "Error: immutable section version string should be exactly 32 bytes");
+  } > rom_ext_flash
+}
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.c b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.c
new file mode 100644
index 0000000000000..971befe1bddc9
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.c
@@ -0,0 +1,112 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.h"
+
+#include "sw/device/lib/base/csr.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/drivers/epmp.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/epmp_state.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+
+// Address populated by the linker.
+extern char _rom_ext_immutable_start[];
+extern char _rom_ext_immutable_end[];
+extern char _text_end[];
+extern char _stack_start[];  // Lowest stack address.
+
+static const epmp_region_t kMmioRegion = {
+    .start = TOP_EARLGREY_MMIO_BASE_ADDR,
+    .end = TOP_EARLGREY_MMIO_BASE_ADDR + TOP_EARLGREY_MMIO_SIZE_BYTES,
+};
+
+static const epmp_region_t kFlashRegion = {
+    .start = TOP_EARLGREY_EFLASH_BASE_ADDR,
+    .end = TOP_EARLGREY_EFLASH_BASE_ADDR + TOP_EARLGREY_EFLASH_SIZE_BYTES,
+};
+
+static const epmp_region_t kRvDmRegion = {
+    .start = TOP_EARLGREY_RV_DM_MEM_BASE_ADDR,
+    .end = TOP_EARLGREY_RV_DM_MEM_BASE_ADDR + TOP_EARLGREY_RV_DM_MEM_SIZE_BYTES,
+};
+
+static const epmp_region_t kStackGuard = {.start = (uintptr_t)_stack_start,
+                                          .end = (uintptr_t)_stack_start + 4};
+
+static const epmp_region_t kImmTextRegion = {
+    .start = (uintptr_t)_rom_ext_immutable_start,
+    .end = (uintptr_t)_text_end,
+};
+
+rom_error_t imm_section_epmp_reconfigure(void) {
+  // ePMP region 15 gives read/write access to RAM.
+  // Leave it unchanged.
+
+  // Reconfigure the ePMP MMIO region to be NAPOT region 14, thus freeing
+  // up an ePMP entry for use elsewhere.
+  epmp_set_napot(14, kMmioRegion, kEpmpPermLockedReadWrite);
+
+  // ePMP region 11 protects the stack from overflow.
+  // This stack guard was in ePMP region 14.
+  epmp_set_napot(11, kStackGuard, kEpmpPermLockedNoAccess);
+
+  // ePMP region 12 gives read access to all of flash for both M and U modes.
+  // This flash region was in ePMP region 5.
+  epmp_set_napot(12, kFlashRegion, kEpmpPermLockedReadOnly);
+
+  // ePMP region 13 allows RvDM access.
+  if (lifecycle_is_prod() == kHardenedBoolTrue) {
+    // No RvDM access in Prod states, so we can clear the entry.
+    epmp_clear(13);
+  } else {
+    epmp_set_napot(13, kRvDmRegion, kEpmpPermLockedReadWriteExecute);
+  }
+
+  // Move the ROM_EXT virtual region from entry 6 to 10.
+  uint32_t virtual_napot;
+  CSR_READ(CSR_REG_PMPADDR6, &virtual_napot);
+  epmp_clear(10);
+  if (virtual_napot) {
+    epmp_set_napot(10, epmp_decode_napot(virtual_napot),
+                   kEpmpPermLockedReadOnly);
+  }
+
+  // Clear mutable ROM_EXT entries (8 & 9).
+  epmp_clear(9);
+  epmp_clear(8);
+
+  // Immutable ROM_EXT TOR (6 & 7).
+  epmp_set_tor(6, kImmTextRegion, kEpmpPermLockedReadExecute);
+
+  // Clear entries from 5 ~ 3.
+  epmp_clear(5);
+  epmp_clear(4);
+  epmp_clear(3);
+
+  // 3 ~ 0 are ROM ePMP entries.
+  // Leave them unchanged.
+
+  HARDENED_RETURN_IF_ERROR(epmp_state_check());
+
+  return kErrorOk;
+}
+
+rom_error_t imm_section_epmp_mutable_rx(const manifest_t *manifest) {
+  // Immutable ROM_EXT TOR (8 & 9).
+  epmp_region_t mutable_code_region = manifest_code_region_get(manifest);
+
+  // Manifest code_region includes immutable data segment. Move the start
+  // address to exclude.
+  mutable_code_region.start = (uintptr_t)_rom_ext_immutable_end;
+
+  epmp_set_tor(8, mutable_code_region, kEpmpPermLockedReadExecute);
+
+  HARDENED_RETURN_IF_ERROR(epmp_state_check());
+
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.h b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.h
new file mode 100644
index 0000000000000..a6b1f2b140a74
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_epmp.h
@@ -0,0 +1,66 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_EPMP_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_EPMP_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+
+/**
+ * Reconfigure ePMP entries to lower priority.
+ *
+ * ePMP will be reconfigured to:
+ *    0: ROM      ----- ----
+ *    1: ROM        TOR LX-R
+ *    2: ROM      NAPOT L--R
+ *    3: -------  ----- ----
+ *    4: -------  ----- ----
+ *    5: -------  ----- ----
+ *    6: IM_EXT   ----- ----
+ *    7: IM_EXT     TOR LX-R
+ *    8:[MU_EXT   ----- ----]
+ *    9:[MU_EXT     TOR LX-R]
+ *   10: VIRTUAL  NAPOT L--R
+ *   11: STACK      NA4 L---
+ *   12: RvDM     NAPOT LXWR
+ *   13: FLASH    NAPOT L--R
+ *   14: MMIO     NAPOT L-WR
+ *   15: RAM      NAPOT L-WR
+ *
+ * Mutable ROM_EXT segment (8 & 9) won't be configured by this function.
+ * `imm_section_epmp_mutable_rx` will configure them when we are ready to
+ * jump back to ROM.
+ *
+ * Entries 6~12 can be recycled in Owner SW stage.
+ *
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t imm_section_epmp_reconfigure(void);
+
+/**
+ * Configure the Mutable ROM_EXT text segment with read-execute permissions.
+ *
+ *    8: MU_EXT   ----- ----
+ *    9: MU_EXT     TOR LX-R
+ *
+ * Note: When address translation is enabled, the manifest argument should
+ * point to the one in the virtual space.
+ *
+ * @param manifest Pointer to the rom_ext manifest.
+ * @return The result of the operation.
+ */
+OT_WARN_UNUSED_RESULT
+rom_error_t imm_section_epmp_mutable_rx(const manifest_t *manifest);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_EPMP_H_
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_a.ld b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_a.ld
new file mode 100644
index 0000000000000..51b26f9c70fb9
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_a.ld
@@ -0,0 +1,27 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Linker script for an OpenTitan ROM_EXT IMM_SECTION.
+ *
+ * Portions of this file are Ibex-specific.
+ *
+ * The IMM_SECTION is kept in the .rom_ext_immutable section in ROM, after the
+ * .manifest section. This linker script targets to use slot A address, and
+ * the addresses are similar to the linker script rom_ext_slot_a.ld that ROM_EXT
+ * is using.
+ */
+
+INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
+
+/**
+ * Symbols to be used in the setup of the address translation for IMM_SECTION.
+ */
+
+MEMORY {
+  imm_section_slot_a(rx) : ORIGIN = ORIGIN(eflash) + 0x400, LENGTH = LENGTH(eflash) / 2 - 0x400
+}
+REGION_ALIAS("rom_ext_flash", imm_section_slot_a);
+
+INCLUDE sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_b.ld b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_b.ld
new file mode 100644
index 0000000000000..7dd0e412344e8
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_b.ld
@@ -0,0 +1,28 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Linker script for an OpenTitan ROM_EXT IMM_SECTION.
+ *
+ * Portions of this file are Ibex-specific.
+ *
+ * The IMM_SECTION is kept in the .rom_ext_immutable section in ROM, after the
+ * .manifest section. This linker script targets to use slot B address, and
+ * the addresses are similar to the linker script rom_ext_slot_b.ld that ROM_EXT
+ * is using.
+ */
+
+INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
+
+/**
+ * Symbols to be used in the setup of the address translation for IMM_SECTION.
+ */
+
+/* Slot B starts at the half-size mark of the eFlash. */
+MEMORY {
+  imm_section_slot_b(rx) : ORIGIN = ORIGIN(eflash) + LENGTH(eflash) / 2 + 0x400, LENGTH = LENGTH(eflash) / 2 - 0x400
+}
+REGION_ALIAS("rom_ext_flash", imm_section_slot_b);
+
+INCLUDE sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_virtual.ld b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_virtual.ld
new file mode 100644
index 0000000000000..8d90112ab4636
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_slot_virtual.ld
@@ -0,0 +1,27 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Linker script for an OpenTitan ROM_EXT IMM_SECTION.
+ *
+ * Portions of this file are Ibex-specific.
+ *
+ * The IMM_SECTION is kept in the .rom_ext_immutable section in ROM, after the
+ * .manifest section. This linker script targets to use virtual address, and
+ * the addresses are similar to the linker script rom_ext_slot_virtual.ld that
+ * ROM_EXT is using.
+ */
+
+INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
+
+/**
+ * Symbols to be used in the setup of the address translation for IMM_SECTION.
+ */
+
+MEMORY {
+  imm_section_virtual(rx) : ORIGIN = ORIGIN(rom_ext_virtual) + 0x400, LENGTH = 0x80000 - 0x400
+}
+REGION_ALIAS("rom_ext_flash", imm_section_virtual);
+
+INCLUDE sw/device/silicon_creator/rom_ext/imm_section/imm_section_common.ld
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_start.S b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_start.S
new file mode 100644
index 0000000000000..f4202ec82c8f7
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_start.S
@@ -0,0 +1,91 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
+#include "sw/device/lib/base/hardened_asm.h"
+
+  /**
+   * NOTE: The "ax" flag below is necessary to ensure that this section
+   * is allocated executable space in ROM by the linker.
+   */
+  .section .crt, "ax"
+
+  /**
+   * Entry point.
+   *
+   * This symbol is jumped to from `rom_boot` using the `entry_point` field
+   * of the manifest.
+   */
+  .balign 4
+  .global _imm_section_start_boot
+  .type _imm_section_start_boot, @function
+_imm_section_start_boot:
+
+  .option push
+  .option norelax
+
+  /**
+   * Set up the global pointer `gp`.
+   */
+  la gp, __global_pointer$
+
+  .option pop
+
+  /**
+   * Save registers.
+   */
+  addi sp, sp, -8
+  sw ra, 4(sp)
+
+  /**
+   * Disable Interrupts.
+   *
+   * We cannot disable exceptions, or Ibex's non-maskable interrupts (interrupt
+   * 31), so we still need to be careful.
+   */
+
+  // Clear `MIE` field of `mstatus` (disable interrupts globally).
+  csrci mstatus, 0x8
+
+  /**
+   * Clear all the machine-defined interrupts, `MEIE`, `MTIE`, and `MSIE` fields
+   * of `mie`.
+   */
+  li   t0, 0xFFFF0888
+  csrc mie, t0
+
+  /**
+   * Setup C Runtime
+   */
+  /**
+   * Initialize the `.data` section in RAM from ROM.
+   */
+  la   a0, _data_start
+  la   a1, _data_end
+  la   a2, _data_init_start
+  jal  ra, crt_section_copy
+
+  /**
+   * Initialize the `.bss` section.
+   *
+   * We do this despite zeroing all of SRAM above, so that we still zero `.bss`
+   * once we've enabled SRAM scrambling.
+   */
+  la   a0, _bss_start
+  la   a1, _bss_end
+  jal  ra, crt_section_clear
+
+
+  /**
+   * Restore registers.
+   */
+  lw ra, 4(sp)
+  addi sp, sp, 8
+
+  /**
+   * Jump to IMM_SECTION.
+   */
+  tail imm_section_main
+
+  .size _imm_section_start_boot, .-_imm_section_start_boot
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version.h b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version.h
new file mode 100644
index 0000000000000..56a6358c7c826
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version.h
@@ -0,0 +1,77 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_VERSION_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_VERSION_H_
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/macros.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * The version struct is stored at the last 32 bytes of imm_section.
+ */
+enum {
+  kImmVersionSize = 32,
+  kImmVersionMagic = 0x43534d49,
+};
+
+/**
+ * Version info append at the end of built imm_section.
+ */
+typedef struct imm_section_version {
+  /**
+   * Magic Identifier 0x43534d49 `IMSC`.
+   */
+  uint32_t magic;
+  /**
+   * Major version (breaking changes).
+   *
+   * The version is defined in the bazel file:
+   *   sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
+   */
+  uint32_t major;
+  /**
+   * Minor version (non-breaking changes).
+   *
+   * The version is defined in the bazel file:
+   *   sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
+   */
+  uint32_t minor;
+  /**
+   * Build status modifiers.
+   *
+   * Values:
+   *   ' '  : Git workspace is clean, or build without --stamp
+   *   '+'  : Git workspace is dirty
+   */
+  char build_status;
+  /**
+   * Git commit hash truncated to first 4 bytes.
+   *
+   * This field will only be set when building with --stamp, zero otherwise.
+   */
+  uint32_t commit_hash;
+  /**
+   * Reserved space for future update.
+   */
+  uint8_t reserved[12];
+} imm_section_version_t;
+
+OT_ASSERT_MEMBER_OFFSET(imm_section_version_t, magic, 0);
+OT_ASSERT_MEMBER_OFFSET(imm_section_version_t, major, 4);
+OT_ASSERT_MEMBER_OFFSET(imm_section_version_t, minor, 8);
+OT_ASSERT_MEMBER_OFFSET(imm_section_version_t, build_status, 12);
+OT_ASSERT_MEMBER_OFFSET(imm_section_version_t, commit_hash, 16);
+OT_ASSERT_SIZE(imm_section_version_t, 32);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_IMM_SECTION_IMM_SECTION_VERSION_H_
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version_def.c b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version_def.c
new file mode 100644
index 0000000000000..6a7652fffc1e4
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/imm_section_version_def.c
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/imm_section/imm_section_version.h"
+
+/*
+ * Load stamp variables and set default values when building without --stamp
+ */
+#include "rules/autogen_stamp_include.inc"
+#ifndef BAZEL_BUILD_SCM_REVISION_SHORT
+#define BAZEL_BUILD_SCM_REVISION_SHORT 00000000
+#endif
+#ifndef BAZEL_BUILD_SCM_STATUS
+#define BAZEL_BUILD_SCM_STATUS clean
+#endif
+
+/*
+ * Map scm status to single char.
+ */
+#define SCM_INDICATOR_modified '+'
+#define SCM_INDICATOR_clean ' '
+#define SCM_INDICATOR OT_CAT(SCM_INDICATOR_, BAZEL_BUILD_SCM_STATUS)
+
+/*
+ * The version struct is stored at the end of imm_section.
+ *
+ * These values are generated by bazel and populated with C defines.
+ */
+OT_USED
+OT_SECTION(".imm_section_version")
+const imm_section_version_t imm_section_version = {
+    .magic = kImmVersionMagic,
+    .major = IMM_SECTION_MAJOR_VERSION,
+    .minor = IMM_SECTION_MINOR_VERSION,
+    // We cannot record clean/modified status because this affects build
+    // reproducibility during ROM_EXT signing.
+    //
+    // During a signing ceremony:
+    // - First we generate pre-signing artifacts, typically in a clean codebase.
+    // - Next, we take hashes of the pre-signing artifacts offline and sign them
+    //   with our signing infrastructure.
+    // - Finally, we bring the offline signatures back to the codebase and land
+    //   them in an appropriate `signatures` subdirectory.  This modifies the
+    //   codebase, which then causes a change in the build_status value, which
+    //   causes bazel to rebuild pre-signing artifacts, which invalidates the
+    //   signatures.
+    .build_status = SCM_INDICATOR_clean,
+    .commit_hash = OT_CAT(0x0, BAZEL_BUILD_SCM_REVISION_SHORT),
+};
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/BUILD b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/BUILD
new file mode 100644
index 0000000000000..cd3e97830d895
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/BUILD
@@ -0,0 +1,11 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+cc_import(
+    name = "nop_imm_section",
+    objects = ["nop.o"],
+    alwayslink = 1,
+)
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/README.md b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/README.md
new file mode 100644
index 0000000000000..b13322515be5d
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/README.md
@@ -0,0 +1,11 @@
+# ROM_EXT IMM_SECTION Prebuilts
+
+This markdown explains all of the prebuilt collections in this folder and the
+usage of them.
+
+## NOP IMM_SECTION
+
+* The `nop.o` is built by the following command:
+  `riscv32-unknown-elf-as -march=rv32i nop.S -o nop.o`
+* This `IMM_SECTION` only contains a section called `.rom_ext_immutable` and a
+  single `ret` command, and it is only used for testing.
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.S b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.S
new file mode 100644
index 0000000000000..07d8fbaccd34c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.S
@@ -0,0 +1,8 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+.section .rom_ext_immutable, "ax"
+.globl _imm_section_start
+_imm_section_start:
+    ret
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.o b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.o
new file mode 100644
index 0000000000000..5509dcfe436d8
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/imm_section/prebuilts/nop.o differ
diff --git a/sw/device/silicon_creator/rom_ext/imm_section/utils.bzl b/sw/device/silicon_creator/rom_ext/imm_section/utils.bzl
new file mode 100644
index 0000000000000..f2f35ec4137af
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/imm_section/utils.bzl
@@ -0,0 +1,171 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:providers.bzl",
+    "SiliconBinaryInfo",
+    "get_one_binary_file",
+)
+load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
+load("@rules_cc//cc:find_cc_toolchain.bzl", "find_cc_toolchain")
+load("@rules_cc//cc:action_names.bzl", "OBJ_COPY_ACTION_NAME")
+load("@lowrisc_opentitan//rules:rv.bzl", "rv_rule")
+load(
+    "//sw/device/silicon_creator/rom_ext/imm_section:defs.bzl",
+    "IMM_SECTION_VERSION",
+)
+
+def _bin_to_imm_section_object_impl(ctx):
+    cc_toolchain = find_cc_toolchain(ctx)
+    feature_config = cc_common.configure_features(
+        ctx = ctx,
+        cc_toolchain = cc_toolchain,
+        requested_features = ctx.features,
+        unsupported_features = ctx.disabled_features,
+    )
+    objcopy = cc_common.get_tool_for_action(
+        feature_configuration = feature_config,
+        action_name = OBJ_COPY_ACTION_NAME,
+    )
+
+    for src in ctx.files.src:
+        if src.extension != "bin":
+            continue
+        object = ctx.actions.declare_file(
+            "{}.{}".format(
+                src.basename.replace("." + src.extension, ""),
+                "o",
+            ),
+        )
+        ctx.actions.run(
+            outputs = [object],
+            inputs = [src] + cc_toolchain.all_files.to_list(),
+            arguments = [
+                "-I",
+                "binary",
+                "-O",
+                "elf32-littleriscv",
+                "--rename-section",
+                ".data=.rom_ext_immutable,alloc,load,readonly,data,contents",
+                src.path,
+                object.path,
+            ],
+            executable = objcopy,
+        )
+
+        # e2e/exec_env tests ensure the immutable rom_ext is the same across all
+        # exec env, so simply return the first one.
+        outputs = [object]
+        return [
+            DefaultInfo(
+                files = depset(outputs),
+                runfiles = ctx.runfiles(files = outputs),
+            ),
+        ]
+
+bin_to_imm_section_object = rv_rule(
+    implementation = _bin_to_imm_section_object_impl,
+    attrs = {
+        "src": attr.label(allow_files = True),
+        "_cc_toolchain": attr.label(default = Label("@bazel_tools//tools/cpp:current_cc_toolchain")),
+    },
+    fragments = ["cpp"],
+    toolchains = ["@rules_cc//cc:toolchain_type"],
+)
+
+def create_imm_section_targets(name, src):
+    object_target_name = name + "_object"
+    bin_to_imm_section_object(
+        name = object_target_name,
+        src = src,
+    )
+    native.cc_import(
+        name = name,
+        objects = [object_target_name],
+        data = [object_target_name],
+        alwayslink = 1,
+    )
+
+_RELEASE_BUILD_HEADER = """\
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//sw/device/silicon_creator/rom_ext/imm_section:utils.bzl",
+    "create_imm_section_targets",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+# Release version: {version}
+"""
+
+_RELEASE_BUILD_TARGET = """
+create_imm_section_targets(
+    name = "{name}",
+    src = "{filename}",
+)
+"""
+
+def _prepare_release_files(ctx):
+    build_contents = [
+        _RELEASE_BUILD_HEADER.format(version = IMM_SECTION_VERSION),
+    ]
+    build_file = ctx.actions.declare_file("BUILD")
+
+    files = [build_file]
+    for name, target in zip(ctx.attr.variants_keys, ctx.attr.variants_values):
+        # The test //sw/device/silicon_creator/rom_ext/imm_section/e2e/exec_env/...
+        # ensures the imm_section is the same across all exec env, so we only
+        # release one of them (silicon_creator).
+        bin = get_one_binary_file(target, field = "binary", providers = [SiliconBinaryInfo])
+        files.extend([
+            bin,
+            get_one_binary_file(target, field = "elf", providers = [SiliconBinaryInfo]),
+            get_one_binary_file(target, field = "mapfile", providers = [SiliconBinaryInfo]),
+        ])
+        build_contents.append(_RELEASE_BUILD_TARGET.format(name = name, filename = bin.basename))
+
+    ctx.actions.write(build_file, "".join(build_contents))
+
+    output = ctx.actions.declare_file("{}.tar".format(ctx.attr.name))
+    ctx.actions.run(
+        outputs = [output],
+        inputs = files + [ctx.version_file],
+        arguments = [
+            "--out",
+            output.path,
+            "--stamp_file",
+            ctx.version_file.path,
+            "--version",
+            IMM_SECTION_VERSION,
+        ] + [f.path for f in files],
+        executable = ctx.executable._tool,
+    )
+
+    return [
+        DefaultInfo(files = depset([output, build_file])),
+    ]
+
+prepare_release_files = rule(
+    implementation = _prepare_release_files,
+    attrs = {
+        "variants_keys": attr.string_list(doc = "Name of the opentitan_binary to release"),
+        "variants_values": attr.label_list(doc = "Target label of the opentitan_binary to release"),
+        "_tool": attr.label(
+            default = "//util:gen_stamped_tarball",
+            executable = True,
+            cfg = "exec",
+        ),
+    },
+)
+
+def imm_section_bundle(name, variants, **kwargs):
+    prepare_release_files(
+        name = name,
+        variants_keys = variants.keys(),
+        variants_values = variants.values(),
+        **kwargs
+    )
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/BUILD b/sw/device/silicon_creator/rom_ext/keys/fake/BUILD
deleted file mode 100644
index 66082363a7c8a..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/BUILD
+++ /dev/null
@@ -1,61 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-package(default_visibility = ["//visibility:public"])
-
-cc_library(
-    name = "fake",
-    srcs = [
-        "sigverify_rsa_keys_fake.c",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys.h",
-    ],
-    hdrs = [
-        "rom_ext_dev_key_0_rsa_3072_exp_f4.h",
-        "rom_ext_prod_key_0_rsa_3072_exp_f4.h",
-        "rom_ext_test_key_0_rsa_3072_exp_f4.h",
-    ],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib/sigverify",
-    ],
-)
-
-# Flatten //sw/device/silicon_creator/lib/sigverify:rsa_verify to exclude mock_mod_exp_ibex
-cc_test(
-    name = "fake_unittest",
-    srcs = [
-        "sigverify_rsa_keys_fake_unittest.cc",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.c",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.h",
-    ],
-    deps = [
-        ":fake",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:lifecycle",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/sigverify:mod_exp_ibex_device_library",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_key",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys",
-        "//sw/device/silicon_creator/testing:rom_test",
-        "@googletest//:gtest_main",
-    ],
-)
-
-filegroup(
-    name = "rom_ext_dev_private_key_0",
-    srcs = ["rom_ext_dev_key_0_rsa_3072_exp_f4.der"],
-)
-
-filegroup(
-    name = "rom_ext_test_private_key_0",
-    srcs = ["rom_ext_test_key_0_rsa_3072_exp_f4.der"],
-)
-
-filegroup(
-    name = "rom_ext_prod_private_key_0",
-    srcs = ["rom_ext_prod_key_0_rsa_3072_exp_f4.der"],
-)
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.der
deleted file mode 100644
index e2ddcb881bd95..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.h b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.h
deleted file mode 100644
index cece1158872e6..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.h
+++ /dev/null
@@ -1,38 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_DEV_KEY_0_RSA_3072_EXP_F4_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_DEV_KEY_0_RSA_3072_EXP_F4_H_
-
-#define ROM_EXT_DEV_KEY_0_RSA_3072_EXP_F4                               \
-  {                                                                     \
-    .n =                                                                \
-        {{                                                              \
-            0x63f8a30b, 0xd703332e, 0xcfda502b, 0x2a51ada2, 0xc99413d6, \
-            0x7830792c, 0xe1107f7d, 0xe5854ec6, 0x5d410c7c, 0x88131d46, \
-            0xab8d61aa, 0xf9994b28, 0x4b52055a, 0xf7753ce2, 0xbac65041, \
-            0xf77d36c2, 0xe2c13eb1, 0xbbcf1618, 0x65f03fa4, 0x5a548fb2, \
-            0xc0845b92, 0xbb12faca, 0xb3172796, 0xe4bee37b, 0xf40ac213, \
-            0xd0914385, 0x5a4b7a11, 0x35204ba7, 0x1598a2e5, 0xcbe0e0dc, \
-            0xf5a1e236, 0x19195202, 0xfcf02de3, 0xb9757104, 0x3a3d9f19, \
-            0xf6c9a286, 0x3d30e741, 0x952bc51d, 0xe67c3a90, 0x8870ee31, \
-            0x89134026, 0xfca20db3, 0x1e82d36f, 0x034c13e3, 0xc085359f, \
-            0xc693dfdf, 0x3454d1d4, 0x7c778806, 0x80f22087, 0xeea8597c, \
-            0x467ae6d2, 0x4d5194e4, 0x2367fe77, 0xccaf7d67, 0x9fc866e0, \
-            0x3164a496, 0x58944368, 0x7ed7b0ca, 0x1cc7d16c, 0xfbd57965, \
-            0xa53c091e, 0x4dcf09ea, 0x19fccc00, 0x35422a8d, 0x66411309, \
-            0x07b1b7b7, 0xf1fcaeb0, 0xc016d776, 0x65cfb0c2, 0x383adb60, \
-            0x1e45b70f, 0x674d7502, 0x186e1c7c, 0xb9c59554, 0xab5ae125, \
-            0x110e22a9, 0x67dd11dd, 0xab890787, 0x6303702a, 0x39ff545d, \
-            0x81ef5e96, 0x682c936c, 0xa2b37ac3, 0x168138c2, 0x478d052e, \
-            0xc18577a8, 0x668b2f0c, 0xfa040834, 0x1b44c2c2, 0x37ab4e2f, \
-            0xb467dfd9, 0xf6ba4975, 0xe9894308, 0x0a2cd975, 0xca8f9260, \
-            0xa60f2fbd,                                                 \
-        }},                                                             \
-    .n0_inv = {                                                         \
-        0xccd16f5d, 0xfd731e89, 0xd45f135f, 0xf03201e9,                 \
-        0x4d574fed, 0x4a558cfc, 0x96e3e680, 0x958fb9cc,                 \
-    },                                                                  \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_DEV_KEY_0_RSA_3072_EXP_F4_H_
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.pub.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.pub.der
deleted file mode 100644
index b19914205541b..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.pub.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.der
deleted file mode 100644
index 7e83c7fd0f43c..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.h b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.h
deleted file mode 100644
index 8983089d33366..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.h
+++ /dev/null
@@ -1,39 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_PROD_KEY_0_RSA_3072_EXP_F4_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_PROD_KEY_0_RSA_3072_EXP_F4_H_
-
-#define ROM_EXT_PROD_KEY_0_RSA_3072_EXP_F4                              \
-  {                                                                     \
-    .n =                                                                \
-        {{                                                              \
-            0x57c16245, 0xef622191, 0x066fad45, 0x59e954cd, 0xfec92329, \
-            0x0159eef1, 0x1cb5d8c4, 0xc4a03e0d, 0x7bd1981f, 0xa3b1635d, \
-            0x4a4043cc, 0x96f233f3, 0x61899a37, 0xd7364c98, 0x840fd549, \
-            0x8a6e9b79, 0x4b57b805, 0x3d6e245d, 0x952aed3e, 0x4eb99cfe, \
-            0x4cc09a03, 0x0508a4e0, 0x76ca6b13, 0x87d9b6e4, 0x8b845774, \
-            0x5a5922a7, 0x0536a4c7, 0xfbda4ec3, 0x5eb92876, 0xaba0dd7c, \
-            0xbaf505b1, 0xbe54b9e9, 0x88bb8492, 0x8252f8db, 0x0a863853, \
-            0xde7aa0e3, 0x6e22419c, 0xa9f7a633, 0x307202a5, 0x94668bca, \
-            0x97eb70ba, 0xaa0cf94d, 0x316e1839, 0x459819f6, 0xd0df6c70, \
-            0xdc08075a, 0xc4a9de99, 0x4b4561b1, 0xb2441f56, 0x7aa03e20, \
-            0xb0223b2c, 0xe6f5771c, 0xc5b14137, 0xb216afac, 0xc81f8c58, \
-            0x4ebbb550, 0xcc480cb3, 0xabec7c08, 0x5add27ea, 0x96c4768e, \
-            0x17705358, 0x096e018f, 0xcb3db3f2, 0x298bad67, 0x19643908, \
-            0x57f549a4, 0x263f5bb1, 0x2a639177, 0x620b6b3b, 0xa217f4cd, \
-            0x0c34bd39, 0x382e5e82, 0xd500f1c7, 0x83c585bf, 0xa2d29016, \
-            0x6d08b243, 0xd0042413, 0x3f8d5917, 0xe65aa37f, 0x2577ce05, \
-            0x4390f0fd, 0x0533f174, 0x20a5c0ce, 0x14964d18, 0x58677957, \
-            0x5add31f4, 0x80dc1389, 0x3de51892, 0x5ae164d5, 0x68ea63d4, \
-            0x8f4dfa76, 0xcbd59ec7, 0xd1e1ea09, 0x722c74c2, 0x64ffef63, \
-            0xab0e98d1,                                                 \
-        }},                                                             \
-    .n0_inv = {                                                         \
-        0x25389f73, 0xbeda0297, 0x8e6abac3, 0x08d0109b,                 \
-        0xb27dc418, 0x6f1f68fa, 0xfdc91f89, 0xc8f474e6,                 \
-    },                                                                  \
-  }
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_PROD_KEY_0_RSA_3072_EXP_F4_H_
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.pub.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.pub.der
deleted file mode 100644
index d5e83a2c8e790..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.pub.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.der
deleted file mode 100644
index 70309225fa91a..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.h b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.h
deleted file mode 100644
index 856df9fcfeb03..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.h
+++ /dev/null
@@ -1,38 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_TEST_KEY_0_RSA_3072_EXP_F4_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_TEST_KEY_0_RSA_3072_EXP_F4_H_
-
-#define ROM_EXT_TEST_KEY_0_RSA_3072_EXP_F4                              \
-  {                                                                     \
-    .n =                                                                \
-        {{                                                              \
-            0x8cc060e5, 0xc401299d, 0xf6f6e6f7, 0x25e4392e, 0xd667b33c, \
-            0x5b8586a0, 0x24acb25c, 0xe2b291ac, 0x5866f047, 0xfe552471, \
-            0x7ba31ddf, 0x683d4c22, 0x89c4fe63, 0xf642189e, 0x8e7fa00c, \
-            0x2dbeb725, 0xd8dcb764, 0x3b0d8d12, 0x9507d661, 0x5631d52e, \
-            0xbc19dbaa, 0xc05734fe, 0x2fc72a38, 0xf22a7394, 0x9f2e752e, \
-            0xd7a05945, 0xc0e6bf7a, 0x9261e6e8, 0x89650bf1, 0x76932ef8, \
-            0x99b56c57, 0x590fda42, 0x06525cee, 0xfff0ea5b, 0x2e09ae39, \
-            0xaf51ec78, 0xfb6fde95, 0xd6112aea, 0x3fdde88d, 0x88eaec29, \
-            0xc8509a52, 0x648d38b9, 0x8ca67d25, 0x00be1651, 0x6cdd6b9b, \
-            0xd372a5ab, 0xb01b23a8, 0x6c3c43ca, 0xaa333384, 0x7b44cf31, \
-            0x48ae6650, 0x68e0be9e, 0xb3131ae3, 0xa5c6457e, 0x0cd09e62, \
-            0x51cca07b, 0x9950fe9a, 0x51371fe4, 0xdd26f224, 0xad262164, \
-            0xad4f40d2, 0x322736f9, 0x49298a49, 0xbdd376ab, 0x1aea9cdb, \
-            0xae9b2156, 0x71445f25, 0xa67c0ef4, 0x170bbe94, 0x3917d727, \
-            0x37b0c7fe, 0xab9bea53, 0x08b25e4d, 0x7d65e134, 0x35935d0f, \
-            0x824b2781, 0xbeb29840, 0xb3b84c24, 0x2bb92abf, 0x1dfaaf98, \
-            0xf1a8a765, 0x10bdde5d, 0x1e7ed4a5, 0x26c6355e, 0xdc00ce80, \
-            0xb5b94b12, 0x6d24c5c7, 0xd97266b1, 0x4fc282ce, 0xdeb39ac3, \
-            0x14f429b6, 0x221cb1ff, 0xb43df22a, 0x11dc0ea4, 0x8a676ff4, \
-            0xf396bbb4,                                                 \
-        }},                                                             \
-    .n0_inv = {                                                         \
-        0x5a7ba313, 0xb119675d, 0xd56cff72, 0x8d3991af,                 \
-        0x1f4be5ec, 0x5466a71f, 0xced86046, 0x24bdad5e,                 \
-    },                                                                  \
-  }
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_KEYS_FAKE_ROM_EXT_TEST_KEY_0_RSA_3072_EXP_F4_H_
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.pub.der b/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.pub.der
deleted file mode 100644
index 813d1b5de93c3..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.pub.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake.c b/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake.c
deleted file mode 100644
index df87f6d56c46f..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake.c
+++ /dev/null
@@ -1,43 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_dev_key_0_rsa_3072_exp_f4.h"
-#include "sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_prod_key_0_rsa_3072_exp_f4.h"
-#include "sw/device/silicon_creator/rom_ext/keys/fake/rom_ext_test_key_0_rsa_3072_exp_f4.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-
-/**
- * Number of RSA public keys.
- */
-enum {
-  kSigverifyRsaKeysCnt_ = 3,
-};
-const size_t kSigverifyRsaKeysCnt = kSigverifyRsaKeysCnt_;
-
-/**
- * Step size to use when checking RSA public keys.
- *
- * This must be coprime with and less than `kSigverifyNumRsaKeys`.
- * Note: Step size is not applicable when `kSigverifyNumRsaKeys` is 1.
- */
-const size_t kSigverifyRsaKeysStep = 1;
-
-/**
- * Fake public keys for signature verification in tests.
- */
-const sigverify_rom_ext_key_t kSigverifyRsaKeys[kSigverifyRsaKeysCnt_] = {
-    {
-        .key = ROM_EXT_PROD_KEY_0_RSA_3072_EXP_F4,
-        .key_type = kSigverifyKeyTypeFirmwareProd,
-    },
-    {
-        .key = ROM_EXT_TEST_KEY_0_RSA_3072_EXP_F4,
-        .key_type = kSigverifyKeyTypeFirmwareTest,
-    },
-    {
-        .key = ROM_EXT_DEV_KEY_0_RSA_3072_EXP_F4,
-        .key_type = kSigverifyKeyTypeFirmwareDev,
-    },
-};
diff --git a/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake_unittest.cc b/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake_unittest.cc
deleted file mode 100644
index 288aad1c9190d..0000000000000
--- a/sw/device/silicon_creator/rom_ext/keys/fake/sigverify_rsa_keys_fake_unittest.cc
+++ /dev/null
@@ -1,216 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include <array>
-#include <cstring>
-#include <limits>
-#include <numeric>
-#include <unordered_set>
-
-#include "gtest/gtest.h"
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_otp.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/sigverify/rsa_verify.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-#include "sw/device/silicon_creator/testing/rom_test.h"
-
-#include "otp_ctrl_regs.h"
-
-namespace sigverify_keys_unittest {
-namespace {
-using ::testing::Return;
-
-TEST(Keys, UniqueIds) {
-  std::unordered_set<uint32_t> ids;
-  for (size_t i = 0; i < kSigverifyRsaKeysCnt; ++i) {
-    ids.insert(sigverify_rsa_key_id_get(&kSigverifyRsaKeys[i].key.n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-/**
- * An implementation of the Euclidean algorithm since we can't use c++17's
- * `std::gcd()` yet.
- */
-uint32_t Gcd(uint32_t a, uint32_t b) {
-  while (b != 0) {
-    std::tie(a, b) = std::make_tuple(b, a % b);
-  }
-  return a;
-}
-
-TEST(KeysStep, IsCorrect) {
-  if (kSigverifyRsaKeysCnt > 1) {
-    EXPECT_LT(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt);
-    EXPECT_EQ(Gcd(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt), 1);
-  }
-}
-
-// Note: The test cases below test sigverify using ROM keys. They have some
-// overlap with sigverify_mod_exp_ibex unit tests but this way we don't have to
-// worry about keeping the keys used in those tests in sync with ROM keys.
-
-/**
- * Message and digest used in tests.
- *
- * The digest can be obtained using:
- * ```
- * echo -n "test" | openssl dgst -sha256 -binary | \
- *    xxd -p -c 4 | tac | sed 's|.*|0x&,|'
- * ```
- */
-constexpr hmac_digest_t kDigest = {
-    .digest =
-        {
-            0xb0f00a08,
-            0xd15d6c15,
-            0x2b0b822c,
-            0xa3bf4f1b,
-            0xc55ad015,
-            0x9a2feaa0,
-            0x884c7d65,
-            0x9f86d081,
-        },
-};
-
-/**
- * Keys and signatures used in tests.
- */
-struct RsaVerifyTestCase {
-  /**
-   * Signer's RSA public key.
-   */
-  const sigverify_rsa_key_t *key;
-  /**
-   * Signature to be verified.
-   */
-  sigverify_rsa_buffer_t sig;
-};
-
-const RsaVerifyTestCase kRsaVerifyTestCases[3]{
-    // message: "test"
-    {
-        .key = &kSigverifyRsaKeys[0].key,
-        /*
-         * echo -n "test" | openssl dgst -sha256 -keyform DER -sign \
-         *     rom_ext_prod_key_0_rsa_3072_exp_f4.der -binary \
-         *     | xxd -p -c 4 | tac | sed 's|.*|0x&,|'
-         */
-        .sig =
-            {
-                0x36eaced4, 0xfd86736f, 0x4be5bc52, 0xd58c0bad, 0x7bbaf753,
-                0xe1d483d5, 0xb91e93df, 0xdc5a4d8b, 0x31a81dd8, 0x03964d74,
-                0x4110c8e8, 0x4b26bd63, 0xeec9e880, 0x0658fbad, 0x9115acbb,
-                0x30546e81, 0xd89b004a, 0x46ec0654, 0x7c790757, 0x40e5518a,
-                0x5a8cac89, 0x77b9f7bf, 0xdde3ddb5, 0x74e3a826, 0xd63bfa53,
-                0x72b514f8, 0xf6122729, 0x1196c0a4, 0x8c874559, 0xd7d8e6c9,
-                0xa9dedeaa, 0xa7e09a18, 0xdcfd6da6, 0x31190e90, 0xf9e418ac,
-                0xfdecd060, 0x422ffa89, 0x96b47e16, 0xfae6baab, 0x0e483c70,
-                0x6ed98af7, 0xfdb5502a, 0xead118d2, 0x6fb8f362, 0xadfccb76,
-                0x20c69cc4, 0x6a3eb2d1, 0x0ae30269, 0xf55a6c6a, 0xc7195f63,
-                0x6178d106, 0x183df636, 0xc575b1c2, 0x0bfddb1b, 0xe3807c38,
-                0x6fbe2b23, 0xf162c7dd, 0x47a54ad4, 0x45a48579, 0xa70aa643,
-                0x77ecaa63, 0x77702f39, 0x5a7ded0c, 0x5c6db917, 0xfc5be756,
-                0x119d6f7a, 0x4e55fe65, 0xbc3ad594, 0x753675d7, 0x909ad497,
-                0x0bda2c0e, 0xc118e450, 0x99ac8b0c, 0xb1cd6836, 0x76dd6b92,
-                0xd3e982b7, 0x8719abd7, 0xb1384cee, 0x86bbcbdc, 0xc211cab7,
-                0x18ce7877, 0x9650d2ea, 0xda551fc0, 0x037bb2d5, 0x9dcadb98,
-                0x8e65dd62, 0x582c6490, 0xc2f5e492, 0xc05f78f7, 0x24ee7700,
-                0x682504ec, 0x46737d60, 0x482ab4a5, 0x23463420, 0x7b5b99c1,
-                0x4293d6b4,
-            },
-    },
-    {
-        .key = &kSigverifyRsaKeys[1].key,
-        /*
-         * echo -n "test" | openssl dgst -sha256 -keyform DER -sign \
-         *   rom_ext_test_key_0_rsa_3072_exp_f4.der -hex
-         */
-        .sig =
-            {
-                0x0a43b030, 0xa82d7c33, 0xb9b1228a, 0x5a0f8892, 0xaa58c077,
-                0x365e2b25, 0xc5f013f8, 0xbf32bc11, 0x15350128, 0x07522924,
-                0x8f7e0889, 0x82084b48, 0xb92b0077, 0x82d3514e, 0xbecda671,
-                0x571009d2, 0xd4606ba7, 0x66bd5fc3, 0xddae3c76, 0xc388a4c3,
-                0x808d5e2a, 0x2dc32965, 0x4e008e5b, 0x4abfc93d, 0xdb6eb16d,
-                0x6cb028f0, 0x4aeffb6b, 0xe7574f3e, 0xff73b548, 0x08649d80,
-                0xb2009425, 0xe2bbd368, 0xa28e3b8a, 0xdd2875cb, 0xc54fdf24,
-                0x1a9a59ac, 0x54ee1013, 0x6da6244d, 0x5cfd3eaa, 0xc7cb551f,
-                0x68626f79, 0xf1cd06c6, 0x5fe8eadd, 0x220c9362, 0x8cc33f50,
-                0xc3918984, 0xe1967286, 0xfd0376ac, 0x41e0f3ee, 0x5f221d07,
-                0x90803f71, 0x6c7cef85, 0x835975e7, 0xa6b9fee5, 0x87155038,
-                0x0fb5407e, 0x050f0cd0, 0x85225aec, 0x0a407a9f, 0x5a175126,
-                0xe2e67818, 0x21deaa56, 0x9df45426, 0x361f14ab, 0xd93d22e7,
-                0xb9cc475e, 0xe8b28289, 0xc56fbc95, 0x18b2d1ab, 0x14e18896,
-                0x07ff5105, 0xce8f5e9f, 0xdee539a9, 0x2cf56ccd, 0xabe93abf,
-                0xc51bee68, 0xd29df209, 0xebba0ab8, 0x9985a37b, 0xf30ec0fb,
-                0xeba0bf7b, 0xa508045c, 0x02f09bb2, 0x9f674fe3, 0xb9c07238,
-                0xc9c88282, 0xada38689, 0x6d7c3294, 0x479e27dd, 0x01bd6436,
-                0x412c377f, 0x51a56959, 0x530432e8, 0x53e4f546, 0x163d3282,
-                0xc25256a9,
-            },
-    },
-
-    {
-        .key = &kSigverifyRsaKeys[2].key,
-        /*
-         * echo -n "test" | openssl dgst -sha256 -keyform DER -sign \
-         *   rom_ext_dev_key_0_rsa_3072_exp_f4.der -hex
-         */
-        .sig =
-            {
-                0x6e317a1c, 0x9068313e, 0x3f9610c1, 0x261cb66b, 0x0d6f49c6,
-                0x6e062654, 0x87a0febe, 0xae824f16, 0xeca90143, 0x56ea924c,
-                0x34dc1f64, 0xa9b756f9, 0xa6965f0d, 0x366c89cc, 0x921520ca,
-                0xab0c17ec, 0x199a0b02, 0x6551663a, 0x9ff7ab3e, 0x4aea7455,
-                0x3a3d6b2f, 0x0e8fe77e, 0x1b18ed7c, 0x643168d0, 0x91de7e47,
-                0x86190fc2, 0x7b9b7a64, 0x5784b535, 0xb358354a, 0xad42ed4c,
-                0x539823a8, 0xe7cf98ec, 0x68c4a7ae, 0xad35612e, 0xc43c18c6,
-                0x5da4fa0b, 0x918a15b2, 0xbde51df7, 0x5d63a9d2, 0x96af2137,
-                0x02c1cf63, 0x0a285e1a, 0x4d228a24, 0x45aa181e, 0xdefe4371,
-                0x5a6c986e, 0x1d5455a5, 0xf342a7f2, 0x9e6d116f, 0x0cde267b,
-                0x360997c0, 0x5da55860, 0xfe2ccf61, 0xc9517096, 0xb5e3891b,
-                0xa7a0194b, 0xa1b094bd, 0x1dd61621, 0x79061426, 0x5eba1c71,
-                0x5e3981c4, 0xcd38b155, 0xe47d6d5a, 0x985ef71c, 0xe69e4ba9,
-                0xbfec165d, 0x1f5beff6, 0x15f18950, 0x18173348, 0xdfb7d0b2,
-                0x8379cf38, 0x16636f15, 0x8b741f64, 0xd7bbd6e6, 0x0915d0fa,
-                0x16f60d28, 0x54966caf, 0x5d415bc1, 0x2f033158, 0x140efe45,
-                0xe0ed8089, 0xa79d27fa, 0xb256bf12, 0x4597dc61, 0x75d62c3e,
-                0x18cb1285, 0xdedc32a3, 0x7238f240, 0xe9c7e35b, 0xecab323e,
-                0xf39e74b9, 0x04cba244, 0x36ff5c6a, 0x5ed63996, 0xe5510a91,
-                0x536875ef,
-            },
-    },
-};
-
-TEST(RsaVerifyTestCases, AllKeys) {
-  std::unordered_set<uint32_t> ids;
-  for (auto const &test_case : kRsaVerifyTestCases) {
-    ids.insert(sigverify_rsa_key_id_get(&test_case.key->n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-class SigverifyRsaVerify
-    : public rom_test::RomTest,
-      public testing::WithParamInterface<RsaVerifyTestCase> {};
-
-TEST_P(SigverifyRsaVerify, Ibex) {
-  uint32_t flash_exec = 0;
-  EXPECT_EQ(sigverify_rsa_verify(&GetParam().sig, GetParam().key, &kDigest,
-                                 kLcStateProd, &flash_exec),
-            kErrorOk);
-  EXPECT_EQ(flash_exec, kSigverifyRsaSuccess);
-}
-
-INSTANTIATE_TEST_SUITE_P(AllCases, SigverifyRsaVerify,
-                         testing::ValuesIn(kRsaVerifyTestCases));
-
-}  // namespace
-}  // namespace sigverify_keys_unittest
diff --git a/sw/device/silicon_creator/rom_ext/prodc/BUILD b/sw/device/silicon_creator/rom_ext/prodc/BUILD
deleted file mode 100644
index 3b7900385390d..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/BUILD
+++ /dev/null
@@ -1,143 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:const.bzl", "CONST", "hex")
-load("//rules:manifest.bzl", "manifest")
-load("//rules/opentitan:defs.bzl", "opentitan_binary")
-load("//rules:signing.bzl", "offline_presigning_artifacts", "offline_signature_attach")
-load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
-load(
-    "//sw/device/silicon_creator/rom_ext:defs.bzl",
-    "ROM_EXT_VERSION",
-)
-
-package(default_visibility = ["//visibility:public"])
-
-# In order to prevent the linker from prematurely discarding symbols, we
-# need to give the CRT library last.
-LINK_ORDER = [
-    "$(location //sw/device/silicon_creator/rom_ext)",
-    "$(location //sw/device/lib/crt)",
-]
-
-manifest(d = {
-    "name": "manifest_prodc",
-    "identifier": hex(CONST.ROM_EXT),
-    "manuf_state_creator": hex(CONST.MANUF_STATE.PRODC),
-    "version_major": ROM_EXT_VERSION.MAJOR,
-    "version_minor": ROM_EXT_VERSION.MINOR,
-    "security_version": ROM_EXT_VERSION.SECURITY,
-    "visibility": ["//visibility:public"],
-})
-
-# To test that the fake-signed ProdC ROM_EXT can boot, you need a bitstream
-# with the OTP word CREATOR_SW_CCFG_MANUF_STATE set to `PRODC` (as above
-# in the manifest definition).  You can manually create such a bitstream with:
-#
-# bazel build //hw/bitstream/universal:splice --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_cw310_sival
-opentitan_binary(
-    name = "rom_ext_fake_prod_signed_slot_a",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_a",
-    linkopts = LINK_ORDER,
-    manifest = ":manifest_prodc",
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/prodc/keys",
-    ],
-)
-
-opentitan_binary(
-    name = "rom_ext_fake_prod_signed_slot_b",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_b",
-    linkopts = LINK_ORDER,
-    manifest = ":manifest_prodc",
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/prodc/keys",
-    ],
-)
-
-opentitan_binary(
-    name = "rom_ext_real_prod_signed_slot_a",
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_a",
-    linkopts = LINK_ORDER,
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/prodc/keys",
-    ],
-)
-
-opentitan_binary(
-    name = "rom_ext_real_prod_signed_slot_b",
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_b",
-    linkopts = LINK_ORDER,
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/prodc/keys",
-    ],
-)
-
-offline_presigning_artifacts(
-    name = "presigning",
-    testonly = True,
-    srcs = [
-        ":rom_ext_real_prod_signed_slot_a",
-        ":rom_ext_real_prod_signed_slot_b",
-    ],
-    ecdsa_key = {
-        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "earlgrey_prod_0",
-    },
-    manifest = ":manifest_prodc",
-    tags = ["manual"],
-)
-
-pkg_tar(
-    name = "digests",
-    testonly = True,
-    srcs = [":presigning"],
-    mode = "0644",
-    tags = ["manual"],
-)
-
-offline_signature_attach(
-    name = "signed",
-    testonly = True,
-    srcs = [
-        ":presigning",
-    ],
-    ecdsa_signatures = [
-        "//sw/device/silicon_creator/rom_ext/prodc/signatures:ecdsa_signatures",
-    ],
-    tags = ["manual"],
-)
diff --git a/sw/device/silicon_creator/rom_ext/prodc/binaries/BUILD b/sw/device/silicon_creator/rom_ext/prodc/binaries/BUILD
deleted file mode 100644
index f92da317fed0d..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/binaries/BUILD
+++ /dev/null
@@ -1,7 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-package(default_visibility = ["//visibility:public"])
-
-# Add silicon binary targets once available.
diff --git a/sw/device/silicon_creator/rom_ext/prodc/keys/BUILD b/sw/device/silicon_creator/rom_ext/prodc/keys/BUILD
deleted file mode 100644
index 90ba3fe1490bc..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/keys/BUILD
+++ /dev/null
@@ -1,55 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:signing.bzl", "keyset")
-
-package(default_visibility = ["//visibility:public"])
-
-cc_library(
-    name = "keys",
-    srcs = [
-        "sigverify_rsa_keys_prodc.c",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys.h",
-    ],
-    hdrs = [
-        "earlgrey_z1_prodc_1.h",
-    ],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib/sigverify",
-    ],
-)
-
-cc_test(
-    name = "keys_unittest",
-    srcs = [
-        "sigverify_rsa_keys_prodc_unittest.cc",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.c",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.h",
-    ],
-    deps = [
-        ":keys",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:lifecycle",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/sigverify:mod_exp_ibex_device_library",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_key",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys",
-        "//sw/device/silicon_creator/testing:rom_test",
-        "@googletest//:gtest_main",
-    ],
-)
-
-keyset(
-    name = "keyset",
-    build_setting_default = "",
-    keys = {
-        "earlgrey_z1_prodc_1.der": "earlgrey_z1_prodc_1",
-    },
-    profile = "earlgrey_z1_prodc",
-    tool = "//signing:token",
-)
diff --git a/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.der b/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.der
deleted file mode 100644
index 43bbf79d33d67..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.h b/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.h
deleted file mode 100644
index ea4dc57636c82..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.h
+++ /dev/null
@@ -1,39 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_PRODC_KEYS_EARLGREY_Z1_PRODC_1_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_PRODC_KEYS_EARLGREY_Z1_PRODC_1_H_
-
-#define EARLGREY_Z1_PRODC_1                                             \
-  {                                                                     \
-    .n =                                                                \
-        {{                                                              \
-            0xd7af0dd5, 0x0a2296ff, 0x03627e28, 0x858e557a, 0xf31e2246, \
-            0x1972ff61, 0xfa972b63, 0x2f755cb8, 0xcbb7f242, 0x8b14a139, \
-            0xaf2ef152, 0x4f2991a6, 0x2b647171, 0xd9778edb, 0x434acb79, \
-            0x4fde9aa1, 0xa7be6fa0, 0xfd1e2d4f, 0xc06d497c, 0x6385b2ec, \
-            0x6b1799af, 0x3eedaf0f, 0x58a80508, 0xf9f991f3, 0xf8abee4c, \
-            0x3517ba93, 0x0f625565, 0x2c02427a, 0x3dce3809, 0x072194cd, \
-            0xe455076c, 0xab1189f1, 0x29afca62, 0xe487061c, 0xeef2255d, \
-            0x91c96072, 0xad54cb22, 0xe63ea5ff, 0xc6cf64ef, 0x66d27d1d, \
-            0x396dd4e3, 0x5bbdb7ed, 0xf7c805cf, 0xa70a282f, 0x19a8b307, \
-            0x6dd3008b, 0x686e3788, 0x0ccfdb19, 0xc47a821a, 0x83c157f5, \
-            0x52fea68b, 0xd645f4d2, 0x206ed7cb, 0x899c7b1b, 0x9a777335, \
-            0x0bc65c6b, 0x8fcea773, 0xd1799e75, 0xbc23d660, 0x0e8c18a8, \
-            0x6527b5d4, 0x3eb7e278, 0x93546a7e, 0x67deba97, 0x9433cb40, \
-            0x6b330bdf, 0xcfe52600, 0xa02f8cc2, 0xea50b2da, 0x549891cb, \
-            0x87735ceb, 0xf257b804, 0xd96c7566, 0x4dcf77da, 0xe38b464f, \
-            0xb6c9afca, 0xeab879b2, 0x3fb1ed41, 0xe1f20209, 0x2819397f, \
-            0x3c6ef023, 0x0c754ffe, 0x61512fb7, 0x448b297e, 0xba5af191, \
-            0x88dd9d71, 0xd6e05fa9, 0x5266d4a8, 0x005aa42e, 0x58cbf6c4, \
-            0x65df874e, 0x0afcf690, 0x2b24b10b, 0xf3f422ab, 0x55933e0c, \
-            0xba900bcb,                                                 \
-        }},                                                             \
-    .n0_inv = {                                                         \
-        0x52763c83, 0x4c89d945, 0x7dc117bd, 0x923a4240,                 \
-        0x88605510, 0x7f38dd72, 0xa3963a0e, 0x865793d2,                 \
-    },                                                                  \
-  }
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_PRODC_KEYS_EARLGREY_Z1_PRODC_1_H_
diff --git a/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc.c b/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc.c
deleted file mode 100644
index e4d066bafe17f..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc.c
+++ /dev/null
@@ -1,33 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/rom_ext/prodc/keys/earlgrey_z1_prodc_1.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-
-/**
- * Number of RSA public keys.
- */
-enum {
-  kSigverifyRsaKeysCnt_ = 1,
-};
-const size_t kSigverifyRsaKeysCnt = kSigverifyRsaKeysCnt_;
-
-/**
- * Step size to use when checking RSA public keys.
- *
- * This must be coprime with and less than `kSigverifyNumRsaKeys`.
- * Note: Step size is not applicable when `kSigverifyNumRsaKeys` is 1.
- */
-const size_t kSigverifyRsaKeysStep = 1;
-
-/**
- * Fake public keys for signature verification in tests.
- */
-const sigverify_rom_ext_key_t kSigverifyRsaKeys[kSigverifyRsaKeysCnt_] = {
-    {
-        .key = EARLGREY_Z1_PRODC_1,
-        .key_type = kSigverifyKeyTypeFirmwareProd,
-    },
-};
diff --git a/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc_unittest.cc b/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc_unittest.cc
deleted file mode 100644
index 06f0e889cbb44..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/keys/sigverify_rsa_keys_prodc_unittest.cc
+++ /dev/null
@@ -1,159 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include <array>
-#include <cstring>
-#include <limits>
-#include <numeric>
-#include <unordered_set>
-
-#include "gtest/gtest.h"
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_otp.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/sigverify/rsa_verify.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-#include "sw/device/silicon_creator/testing/rom_test.h"
-
-#include "otp_ctrl_regs.h"
-
-namespace sigverify_keys_unittest {
-namespace {
-using ::testing::Return;
-
-TEST(Keys, UniqueIds) {
-  std::unordered_set<uint32_t> ids;
-  for (size_t i = 0; i < kSigverifyRsaKeysCnt; ++i) {
-    ids.insert(sigverify_rsa_key_id_get(&kSigverifyRsaKeys[i].key.n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-/**
- * An implementation of the Euclidean algorithm since we can't use c++17's
- * `std::gcd()` yet.
- */
-uint32_t Gcd(uint32_t a, uint32_t b) {
-  while (b != 0) {
-    std::tie(a, b) = std::make_tuple(b, a % b);
-  }
-  return a;
-}
-
-TEST(KeysStep, IsCorrect) {
-  if (kSigverifyRsaKeysCnt > 1) {
-    EXPECT_LT(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt);
-    EXPECT_EQ(Gcd(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt), 1);
-  }
-}
-
-// Note: The test cases below test sigverify using ROM keys. They have some
-// overlap with sigverify_mod_exp_ibex unit tests but this way we don't have to
-// worry about keeping the keys used in those tests in sync with ROM keys.
-
-/**
- * Message and digest used in tests.
- *
- * The digest can be obtained using:
- * ```
- * echo -n "test" | openssl dgst -sha256 -binary | \
- *    xxd -p -c 4 | tac | sed 's|.*|0x&,|'
- * ```
- */
-constexpr hmac_digest_t kDigest = {
-    .digest =
-        {
-            0xb0f00a08,
-            0xd15d6c15,
-            0x2b0b822c,
-            0xa3bf4f1b,
-            0xc55ad015,
-            0x9a2feaa0,
-            0x884c7d65,
-            0x9f86d081,
-        },
-};
-
-/**
- * Keys and signatures used in tests.
- */
-struct RsaVerifyTestCase {
-  /**
-   * Signer's RSA public key.
-   */
-  const sigverify_rsa_key_t *key;
-  /**
-   * Signature to be verified.
-   */
-  sigverify_rsa_buffer_t sig;
-};
-
-const RsaVerifyTestCase kRsaVerifyTestCases[1]{
-    // message: "test"
-    {
-        .key = &kSigverifyRsaKeys[0].key,
-        /*
-         * echo -n "test" > test.txt
-         *
-         * hsmtool -t ot-earlgrey-z0-sival -u user rsa sign  -f plain-text \
-         *     -l earlgrey_z0_sival_1 -o test.sig test.txt
-         *
-         * cat test.sig | xxd -p -c 4 | tac | sed 's|.*|0x&,|'
-         */
-        .sig =
-            {
-                0x8f377053, 0x84f3b28b, 0x679a0612, 0x0c6113ce, 0x866d2e26,
-                0xc77cf46f, 0x6b4fbc29, 0x6ee46599, 0x5f4fb71e, 0x2545331c,
-                0xf348d902, 0xcb99fd20, 0x0d847abc, 0x9beead72, 0x1c2120bf,
-                0xfdd126f7, 0x360857af, 0xccaeb60e, 0x071bc97b, 0xa1153749,
-                0x13a70f63, 0x78f7656a, 0x87335c35, 0x17cf900c, 0x178f4da0,
-                0x92bdd3cf, 0x2e2b07ff, 0x2c9966d6, 0x62f3f6fd, 0x0d798700,
-                0xfe7f6dfd, 0x4fff2fcd, 0xd3659016, 0xd6b2294f, 0x9a9b435b,
-                0x88bf97ea, 0x15216b1d, 0x0a5c8a57, 0xae01e283, 0xf3a5f516,
-                0x08d85472, 0x0fc112db, 0x9f8b9176, 0xf5b934ed, 0x2477c59d,
-                0xb08e660b, 0x0cac1047, 0x9dcb7e15, 0x95172f46, 0x54534029,
-                0x521e1305, 0x1287fa18, 0xc612a532, 0x0c9c6adf, 0x13af326e,
-                0x0c821490, 0x34f1df90, 0x6e06b13a, 0xecd46938, 0xf8677789,
-                0xfeb279e9, 0x10e7af0e, 0xdf822495, 0x3643f357, 0xf663ed24,
-                0xb3d178a5, 0x668c2172, 0x3c6348cb, 0xec3f2790, 0xd5daf3c9,
-                0xab9fa6ee, 0x8c43b22e, 0x9dd8d59b, 0x02d762ec, 0xbd671bba,
-                0xa75549f0, 0xd755aa72, 0xfb7e9908, 0x6844ade8, 0xa8b1b689,
-                0x898aa733, 0x4a1db29d, 0x7684c27e, 0x74f0dc83, 0x7300e86f,
-                0x0a47ce7a, 0x07f7b635, 0xb42e9894, 0x4414c04a, 0x1079982a,
-                0x75a18fe6, 0x9217217b, 0xd2e6b201, 0xaa31b81a, 0x9f34c1d7,
-                0x5de12a1e,
-
-            },
-    },
-};
-
-TEST(RsaVerifyTestCases, AllKeys) {
-  std::unordered_set<uint32_t> ids;
-  for (auto const &test_case : kRsaVerifyTestCases) {
-    ids.insert(sigverify_rsa_key_id_get(&test_case.key->n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-class SigverifyRsaVerify
-    : public rom_test::RomTest,
-      public testing::WithParamInterface<RsaVerifyTestCase> {};
-
-TEST_P(SigverifyRsaVerify, Ibex) {
-  uint32_t flash_exec = 0;
-  EXPECT_EQ(sigverify_rsa_verify(&GetParam().sig, GetParam().key, &kDigest,
-                                 kLcStateProd, &flash_exec),
-            kErrorOk);
-  EXPECT_EQ(flash_exec, kSigverifyRsaSuccess);
-}
-
-INSTANTIATE_TEST_SUITE_P(AllCases, SigverifyRsaVerify,
-                         testing::ValuesIn(kRsaVerifyTestCases));
-
-}  // namespace
-}  // namespace sigverify_keys_unittest
diff --git a/sw/device/silicon_creator/rom_ext/prodc/signatures/BUILD b/sw/device/silicon_creator/rom_ext/prodc/signatures/BUILD
deleted file mode 100644
index 58a31b9e9b3fc..0000000000000
--- a/sw/device/silicon_creator/rom_ext/prodc/signatures/BUILD
+++ /dev/null
@@ -1,15 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "ecdsa_signatures",
-    srcs = glob(["*.ecdsa_sig"]),
-)
-
-filegroup(
-    name = "spx_signatures",
-    srcs = glob(["*.spx_sig"]),
-)
diff --git a/sw/device/silicon_creator/rom_ext/rescue.c b/sw/device/silicon_creator/rom_ext/rescue.c
deleted file mode 100644
index 7cddb421726dc..0000000000000
--- a/sw/device/silicon_creator/rom_ext/rescue.c
+++ /dev/null
@@ -1,289 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/rom_ext/rescue.h"
-
-#include "sw/device/lib/arch/device.h"
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/silicon_creator/lib/dbg_print.h"
-#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
-#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
-#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
-#include "sw/device/silicon_creator/lib/drivers/uart.h"
-#include "sw/device/silicon_creator/lib/xmodem.h"
-
-#include "flash_ctrl_regs.h"
-
-// All of the xmodem functions accept an opaque iohandle pointer.
-// The iohandle is used to facilitate unit tests and doesn't have
-// any function in real firmware.
-#define iohandle NULL
-
-const uint32_t kFlashPageSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE;
-const uint32_t kFlashBankSize =
-    kFlashPageSize * FLASH_CTRL_PARAM_REG_PAGES_PER_BANK;
-static rescue_state_t rescue_state;
-
-rom_error_t flash_firmware_block(rescue_state_t *state) {
-  if (state->flash_offset == 0) {
-    flash_ctrl_data_default_perms_set((flash_ctrl_perms_t){
-        .read = kMultiBitBool4True,
-        .write = kMultiBitBool4True,
-        .erase = kMultiBitBool4True,
-    });
-    for (uint32_t addr = state->flash_start; addr <= state->flash_limit;
-         addr += kFlashPageSize) {
-      HARDENED_RETURN_IF_ERROR(
-          flash_ctrl_data_erase(addr, kFlashCtrlEraseTypePage));
-    }
-    state->flash_offset = state->flash_start;
-  }
-  if (state->flash_offset <= state->flash_limit) {
-    HARDENED_RETURN_IF_ERROR(flash_ctrl_data_write(
-        state->flash_offset, sizeof(state->data) / sizeof(uint32_t),
-        state->data));
-    state->flash_offset += sizeof(state->data);
-  } else {
-    return kErrorRescueImageTooBig;
-  }
-  return kErrorOk;
-}
-
-rom_error_t flash_owner_block(rescue_state_t *state) {
-  // FIXME: validate that we're in a state capable of accepting an owner
-  // block and validate the block before flashing it.
-  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot1,
-                                                 kFlashCtrlEraseTypePage));
-  HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
-      &kFlashCtrlInfoPageOwnerSlot1, 0, sizeof(state->data) / sizeof(uint32_t),
-      state->data));
-  return kErrorOk;
-}
-
-static void change_speed(void) {
-  dbg_printf("ok: waiting for baudrate\r\n");
-  uint32_t speed = 0;
-  OT_DISCARD(uart_read((uint8_t *)&speed, sizeof(speed), 10000));
-  uint32_t nco;
-  switch (speed) {
-    case kRescueBaud115K:
-      nco = kUartBaud115K;
-      break;
-    case kRescueBaud230K:
-      nco = kUartBaud230K;
-      break;
-    case kRescueBaud460K:
-      nco = kUartBaud460K;
-      break;
-    case kRescueBaud921K:
-      nco = kUartBaud921K;
-      break;
-    case kRescueBaud1M33:
-      nco = kUartBaud1M33;
-      break;
-    case kRescueBaud1M50:
-      nco = kUartBaud1M50;
-      break;
-    default:
-      nco = 0;
-  }
-  if (nco) {
-    dbg_printf("ok: new baudrate %C\r\n", speed);
-    uart_init(nco);
-    uart_enable_receiver();
-  } else {
-    dbg_printf("error: unsupported baudrate %C\r\n", speed);
-  }
-}
-
-static void validate_mode(uint32_t mode, rescue_state_t *state) {
-  dbg_printf("\r\nmode: %C\r\n", bitfield_byteswap32(mode));
-  switch (mode) {
-    case kRescueModeBaud:
-      change_speed();
-      return;
-    case kRescueModeBootLog:
-      dbg_printf("ok: receive boot_log via xmodem-crc\r\n");
-      break;
-    case kRescueModeBootSvcRsp:
-      dbg_printf("ok: receive boot_svc response via xmodem-crc\r\n");
-      break;
-    case kRescueModeBootSvcReq:
-      dbg_printf("ok: send boot_svc request via xmodem-crc\r\n");
-      break;
-    case kRescueModeOwnerBlock:
-      dbg_printf("ok: send owner_block via xmodem-crc\r\n");
-      break;
-    case kRescueModeFirmware:
-      dbg_printf("ok: send firmware via xmodem-crc\r\n");
-      // Ensure the start/limit are in SlotA.
-      state->flash_start &= ~kFlashBankSize;
-      state->flash_limit &= ~kFlashBankSize;
-      break;
-    case kRescueModeFirmwareSlotB:
-      dbg_printf("ok: send slot-b firmware via xmodem-crc\r\n");
-      // Ensure the start/limit are in SlotB.
-      state->flash_start |= kFlashBankSize;
-      state->flash_limit |= kFlashBankSize;
-      break;
-    case kRescueModeReboot:
-      dbg_printf("ok: reboot\r\n");
-      break;
-    case kRescueModeWait:
-      state->reboot = false;
-      dbg_printf("ok: wait after upload\r\n");
-      return;
-    default:
-      // User input error.  Do not change modes.
-      dbg_printf("error: unrecognized mode\r\n");
-      return;
-  }
-  state->mode = (rescue_mode_t)mode;
-  state->frame = 1;
-  state->offset = 0;
-  state->flash_offset = 0;
-}
-
-static rom_error_t handle_send_modes(rescue_state_t *state) {
-  const retention_sram_t *rr = retention_sram_get();
-  switch (state->mode) {
-    case kRescueModeBootLog:
-      HARDENED_RETURN_IF_ERROR(xmodem_send(iohandle, &rr->creator.boot_log,
-                                           sizeof(rr->creator.boot_log)));
-      break;
-    case kRescueModeBootSvcRsp:
-      HARDENED_RETURN_IF_ERROR(xmodem_send(iohandle, &rr->creator.boot_svc_msg,
-                                           sizeof(rr->creator.boot_svc_msg)));
-      break;
-    case kRescueModeBootSvcReq:
-    case kRescueModeOwnerBlock:
-    case kRescueModeFirmware:
-    case kRescueModeFirmwareSlotB:
-      // Nothing to do for receive modes.
-      return kErrorOk;
-    case kRescueModeReboot:
-      // If a reboot was requested, return an error and go through the normal
-      // shutdown process.
-      return kErrorRescueReboot;
-    default:
-      // This state should be impossible.
-      return kErrorRescueBadMode;
-  }
-  validate_mode(kRescueModeFirmware, state);
-  return kErrorOk;
-}
-
-static rom_error_t handle_recv_modes(rescue_state_t *state) {
-  retention_sram_t *rr = retention_sram_get();
-  switch (state->mode) {
-    case kRescueModeBootLog:
-    case kRescueModeBootSvcRsp:
-      // Nothing to do for send modes.
-      break;
-    case kRescueModeBootSvcReq:
-      if (state->offset >= sizeof(rr->creator.boot_svc_msg)) {
-        memcpy(&rr->creator.boot_svc_msg, state->data,
-               sizeof(rr->creator.boot_svc_msg));
-        state->offset = 0;
-      }
-      break;
-    case kRescueModeOwnerBlock:
-      if (state->offset == sizeof(state->data)) {
-        HARDENED_RETURN_IF_ERROR(flash_owner_block(state));
-        state->offset = 0;
-      }
-      break;
-    case kRescueModeFirmware:
-    case kRescueModeFirmwareSlotB:
-      if (state->offset == sizeof(state->data)) {
-        HARDENED_RETURN_IF_ERROR(flash_firmware_block(state));
-        state->offset = 0;
-      }
-      break;
-    case kRescueModeReboot:
-    default:
-      // This state should be impossible.
-      return kErrorRescueBadMode;
-  }
-  return kErrorOk;
-}
-
-static rom_error_t protocol(rescue_state_t *state) {
-  rom_error_t result;
-  size_t rxlen;
-  uint8_t command;
-  uint32_t next_mode = 0;
-
-  state->reboot = true;
-  validate_mode(kRescueModeFirmware, &rescue_state);
-
-  // The rescue region starts immediately after the ROM_EXT and ends
-  // at the end of the flash bank.
-  // TODO(cfrantz): This needs to be owner-configurable.
-  state->flash_start = 0x10000;
-  state->flash_limit = 0x7FFFF;
-
-  xmodem_recv_start(iohandle);
-  while (true) {
-    HARDENED_RETURN_IF_ERROR(handle_send_modes(&rescue_state));
-    result = xmodem_recv_frame(iohandle, state->frame,
-                               state->data + state->offset, &rxlen, &command);
-    if (state->frame == 1 && result == kErrorXModemTimeoutStart) {
-      xmodem_recv_start(iohandle);
-      continue;
-    }
-    switch (result) {
-      case kErrorOk:
-        // Packet ok.
-        state->offset += rxlen;
-        HARDENED_RETURN_IF_ERROR(handle_recv_modes(&rescue_state));
-        xmodem_ack(iohandle, true);
-        break;
-      case kErrorXModemEndOfFile:
-        if (state->offset % 2048 != 0) {
-          // If there is unhandled residue, extend out to a full block and
-          // then handle it.
-          while (state->offset % 2048 != 0) {
-            state->data[state->offset++] = 0xFF;
-          }
-          HARDENED_RETURN_IF_ERROR(handle_recv_modes(&rescue_state));
-        }
-        xmodem_ack(iohandle, true);
-        if (!state->reboot) {
-          state->frame = 1;
-          state->offset = 0;
-          state->flash_offset = 0;
-          continue;
-        }
-        return kErrorRescueReboot;
-      case kErrorXModemCrc:
-        xmodem_ack(iohandle, false);
-        continue;
-      case kErrorXModemCancel:
-        return result;
-      case kErrorXModemUnknown:
-        if (state->frame == 1) {
-          if (command == '\r') {
-            validate_mode(next_mode, &rescue_state);
-            next_mode = 0;
-          } else {
-            next_mode = (next_mode << 8) | command;
-          }
-          continue;
-        }
-        OT_FALLTHROUGH_INTENDED;
-      default:
-        return result;
-    }
-    state->frame += 1;
-  }
-}
-
-rom_error_t rescue_protocol(void) {
-  rom_error_t result = protocol(&rescue_state);
-  if (result == kErrorRescueReboot) {
-    rstmgr_reset();
-  }
-  return result;
-}
diff --git a/sw/device/silicon_creator/rom_ext/rescue.h b/sw/device/silicon_creator/rom_ext/rescue.h
deleted file mode 100644
index b351510a3c4a3..0000000000000
--- a/sw/device/silicon_creator/rom_ext/rescue.h
+++ /dev/null
@@ -1,75 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_RESCUE_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_RESCUE_H_
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "sw/device/silicon_creator/lib/error.h"
-
-enum {
-  // Rescue is signalled by asserting serial break to the UART for at least
-  // 4 byte periods.  At 115200 bps, one byte period is about 87us; four is
-  // about 348us.  We'll wait for 350.
-  kRescueDetectTime = 350,
-};
-
-typedef enum {
-  /** `BAUD` */
-  kRescueModeBaud = 0x42415544,
-  /** `BLOG` */
-  kRescueModeBootLog = 0x424c4f47,
-  /** `BRSP` */
-  kRescueModeBootSvcRsp = 0x42525350,
-  /** `BREQ` */
-  kRescueModeBootSvcReq = 0x42524551,
-  /** `OWNR` */
-  kRescueModeOwnerBlock = 0x4f574e52,
-  /** `RESQ` */
-  kRescueModeFirmware = 0x52455351,
-  /** `RESB` */
-  kRescueModeFirmwareSlotB = 0x52455342,
-  /** `REBO` */
-  kRescueModeReboot = 0x5245424f,
-  /** `WAIT` */
-  kRescueModeWait = 0x57414954,
-} rescue_mode_t;
-
-typedef enum {
-  /** `115K` */
-  kRescueBaud115K = 0x4b353131,
-  /** `230K` */
-  kRescueBaud230K = 0x4b303332,
-  /** `460K` */
-  kRescueBaud460K = 0x4b303634,
-  /** `921K` */
-  kRescueBaud921K = 0x4b313239,
-  /** `1M33` */
-  kRescueBaud1M33 = 0x33334d31,
-  /** `1M50` */
-  kRescueBaud1M50 = 0x30354d31,
-} rescue_baud_t;
-
-typedef struct RescueState {
-  rescue_mode_t mode;
-  // Whether to reboot automatically after an xmodem upload.
-  bool reboot;
-  // Current xmodem frame.
-  uint32_t frame;
-  // Current data offset.
-  uint32_t offset;
-  // Current flash write offset.
-  uint32_t flash_offset;
-  // Range to erase and write for firmware rescue (inclusive).
-  uint32_t flash_start;
-  uint32_t flash_limit;
-  // Data buffer to hold xmodem upload data.
-  uint8_t data[2048];
-} rescue_state_t;
-
-rom_error_t rescue_protocol(void);
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_RESCUE_H_
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext.c b/sw/device/silicon_creator/rom_ext/rom_ext.c
index 482ef1e77f27a..399d59ab54f9b 100644
--- a/sw/device/silicon_creator/rom_ext/rom_ext.c
+++ b/sw/device/silicon_creator/rom_ext/rom_ext.c
@@ -7,11 +7,11 @@
 #include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/base/csr.h"
 #include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/multibits.h"
 #include "sw/device/lib/base/stdasm.h"
-#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/coverage/api.h"
 #include "sw/device/lib/runtime/hart.h"
-#include "sw/device/silicon_creator/lib/attestation.h"
-#include "sw/device/silicon_creator/lib/attestation_key_diversifiers.h"
 #include "sw/device/silicon_creator/lib/base/boot_measurements.h"
 #include "sw/device/silicon_creator/lib/base/chip.h"
 #include "sw/device/silicon_creator/lib/base/sec_mmio.h"
@@ -21,119 +21,92 @@
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_empty.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_header.h"
 #include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
-#include "sw/device/silicon_creator/lib/cert/cdi_0.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/cdi_1.h"  // Generated.
-#include "sw/device/silicon_creator/lib/cert/cert.h"
+#include "sw/device/silicon_creator/lib/cert/dice_chain.h"
 #include "sw/device/silicon_creator/lib/dbg_print.h"
-#include "sw/device/silicon_creator/lib/dice.h"
 #include "sw/device/silicon_creator/lib/drivers/ast.h"
+#include "sw/device/silicon_creator/lib/drivers/epmp.h"
 #include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
 #include "sw/device/silicon_creator/lib/drivers/hmac.h"
 #include "sw/device/silicon_creator/lib/drivers/ibex.h"
 #include "sw/device/silicon_creator/lib/drivers/keymgr.h"
-#include "sw/device/silicon_creator/lib/drivers/kmac.h"
 #include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
 #include "sw/device/silicon_creator/lib/drivers/otp.h"
 #include "sw/device/silicon_creator/lib/drivers/pinmux.h"
 #include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
 #include "sw/device/silicon_creator/lib/drivers/rnd.h"
+#include "sw/device/silicon_creator/lib/drivers/rstmgr.h"
 #include "sw/device/silicon_creator/lib/drivers/uart.h"
+#include "sw/device/silicon_creator/lib/drivers/watchdog.h"
 #include "sw/device/silicon_creator/lib/epmp_state.h"
 #include "sw/device/silicon_creator/lib/manifest.h"
 #include "sw/device/silicon_creator/lib/manifest_def.h"
-#include "sw/device/silicon_creator/lib/otbn_boot_services.h"
+#include "sw/device/silicon_creator/lib/ownership/isfb.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
 #include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
 #include "sw/device/silicon_creator/lib/ownership/ownership_unlock.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
 #include "sw/device/silicon_creator/lib/shutdown.h"
 #include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
-#include "sw/device/silicon_creator/lib/sigverify/rsa_verify.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
 #include "sw/device/silicon_creator/lib/sigverify/sigverify.h"
-#include "sw/device/silicon_creator/rom_ext/rescue.h"
+#include "sw/device/silicon_creator/lib/sigverify/sphincsplus/verify.h"
+#include "sw/device/silicon_creator/rom_ext/imm_section/imm_section_version.h"
 #include "sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.h"
 #include "sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_ptrs.h"
-#include "sw/device/silicon_creator/rom_ext/rom_ext_epmp.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_manifest.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_verify.h"
 
 #include "flash_ctrl_regs.h"                          // Generated.
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+#include "otp_ctrl_regs.h"                            // Generated.
 #include "sram_ctrl_regs.h"                           // Generated.
 
-static_assert(kCertX509Asn1SerialNumberSizeInBytes <= kHmacDigestNumBytes,
-              "The ASN.1 encoded X.509 serial number field should be <= the "
-              "size of a SHA256 digest.");
+// Useful constants for flash sizes and ROM_EXT locations.
+enum {
+  kFlashBankSize = FLASH_CTRL_PARAM_REG_PAGES_PER_BANK,
+  kFlashPageSize = FLASH_CTRL_PARAM_BYTES_PER_PAGE,
+  kFlashTotalSize = 2 * kFlashBankSize,
+
+  kRomExtSizeInPages = CHIP_ROM_EXT_SIZE_MAX / kFlashPageSize,
+  kRomExtAStart = 0 / kFlashPageSize,
+  kRomExtAEnd = kRomExtAStart + kRomExtSizeInPages,
+  kRomExtBStart = kFlashBankSize + kRomExtAStart,
+  kRomExtBEnd = kRomExtBStart + kRomExtSizeInPages,
+};
 
 // Declaration for the ROM_EXT manifest start address, populated by the linker
 extern char _rom_ext_start_address[];
 // Declaration for the chip_info structure stored in ROM.
 extern const char _chip_info_start[];
+// Declaration for the imm_section end address, populated by the linker
+extern char _rom_ext_immutable_end[];
+// Declaration for the imm_section size, populated by the linker
+extern char _rom_ext_immutable_size[];
 
 // Life cycle state of the chip.
-lifecycle_state_t lc_state = kLcStateProd;
+lifecycle_state_t lc_state;
 
-// ePMP regions for important address spaces.
-const epmp_region_t kRamRegion = {
-    .start = TOP_EARLGREY_RAM_MAIN_BASE_ADDR,
-    .end = TOP_EARLGREY_RAM_MAIN_BASE_ADDR + TOP_EARLGREY_RAM_MAIN_SIZE_BYTES,
-};
+// A ram copy of the OTP word controlling how to handle flash ECC errors.
+uint32_t flash_ecc_exc_handler_en;
 
-const epmp_region_t kMmioRegion = {
-    .start = TOP_EARLGREY_MMIO_BASE_ADDR,
-    .end = TOP_EARLGREY_MMIO_BASE_ADDR + TOP_EARLGREY_MMIO_SIZE_BYTES,
-};
+// Owner configuration details parsed from the onwer info pages.
+owner_config_t owner_config;
 
-const epmp_region_t kRvDmRegion = {
-    .start = TOP_EARLGREY_RV_DM_MEM_BASE_ADDR,
-    .end = TOP_EARLGREY_RV_DM_MEM_BASE_ADDR + TOP_EARLGREY_RV_DM_MEM_SIZE_BYTES,
-};
+// The number of strike words and product extensions parsed from the ISFB
+// configuration. Used to implement redundancy in the ISFB checks.
+uint32_t isfb_check_count;
 
-const epmp_region_t kFlashRegion = {
-    .start = TOP_EARLGREY_EFLASH_BASE_ADDR,
-    .end = TOP_EARLGREY_EFLASH_BASE_ADDR + TOP_EARLGREY_EFLASH_SIZE_BYTES,
-};
+// Owner application keys.
+owner_application_keyring_t keyring;
 
-// Certificate data.
-static uint8_t dice_certs_page[FLASH_CTRL_PARAM_BYTES_PER_PAGE];
-static hardened_bool_t dice_certs_page_dirty = kHardenedBoolFalse;
-static size_t dice_certs_page_offset = 0;
-static hmac_digest_t uds_pubkey_id;
-static hmac_digest_t cdi_0_pubkey_id;
-static hmac_digest_t cdi_1_pubkey_id;
-static dice_cert_key_id_pair_t cdi_0_key_ids = {
-    .endorsement = &uds_pubkey_id,
-    .cert = &cdi_0_pubkey_id,
-};
-static dice_cert_key_id_pair_t cdi_1_key_ids = {
-    .endorsement = &cdi_0_pubkey_id,
-    .cert = &cdi_1_pubkey_id,
-};
-static ecdsa_p256_public_key_t curr_attestation_pubkey = {.x = {0}, .y = {0}};
-static uint8_t cdi_0_cert[kCdi0MaxCertSizeBytes] = {0};
-static uint8_t cdi_1_cert[kCdi1MaxCertSizeBytes] = {0};
+// Hash chain of all previous owners.
+hmac_digest_t owner_history_hash;
 
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_irq_error(void) {
-  uint32_t mcause;
-  CSR_READ(CSR_REG_MCAUSE, &mcause);
-
-  // TODO(opentitan#22947): Remove this debug print prior to a formal release.
-  uint32_t mepc, mtval;
-  CSR_READ(CSR_REG_MEPC, &mepc);
-  CSR_READ(CSR_REG_MTVAL, &mtval);
-  dbg_printf("MCAUSE=%x MEPC=%x MTVAL=%x\r\n", mcause, mepc, mtval);
-
-  // Shuffle the mcause bits into the uppermost byte of the word and report
-  // the cause as kErrorRomExtInterrupt.
-  // Based on the ibex verilog, it appears that the most significant bit
-  // indicates whether the cause is an exception (0) or external interrupt (1),
-  // and the 5 least significant bits indicate which exception/interrupt.
-  //
-  // Preserve the MSB and shift the 7 LSBs into the upper byte.
-  // (we preserve 7 instead of 5 because the verilog hardcodes the unused bits
-  // as zero and those would be the next bits used should the number of
-  // interrupt causes increase).
-  mcause = (mcause & 0x80000000) | ((mcause & 0x7f) << 24);
-  return kErrorRomExtInterrupt + mcause;
-}
+// Verifying key index
+size_t verify_key;
 
 OT_WARN_UNUSED_RESULT
 static uint32_t rom_ext_current_slot(void) {
@@ -163,16 +136,6 @@ static uint32_t rom_ext_current_slot(void) {
   return side;
 }
 
-const manifest_t *rom_ext_manifest(void) {
-  uint32_t pc = 0;
-  asm("auipc %[pc], 0;" : [pc] "=r"(pc));
-  const uint32_t kFlashHalf = TOP_EARLGREY_FLASH_CTRL_MEM_SIZE_BYTES / 2;
-  // Align the PC to the current flash side.  The ROM_EXT must be the first
-  // entity in each flash side, so this alignment is the manifest address.
-  pc &= ~(kFlashHalf - 1);
-  return (const manifest_t *)pc;
-}
-
 void rom_ext_check_rom_expectations(void) {
   // Check the ePMP state.
   SHUTDOWN_IF_ERROR(epmp_state_check());
@@ -186,14 +149,17 @@ OT_WARN_UNUSED_RESULT
 static rom_error_t rom_ext_init(boot_data_t *boot_data) {
   sec_mmio_next_stage_init();
   lc_state = lifecycle_state_get();
+  flash_ecc_exc_handler_en = otp_read32(
+      OTP_CTRL_PARAM_OWNER_SW_CFG_ROM_FLASH_ECC_EXC_HANDLER_EN_OFFSET);
   pinmux_init();
   // Configure UART0 as stdout.
   uart_init(kUartNCOValue);
 
-  // TODO: Verify ePMP expectations from ROM.
-
-  // Conditionally patch AST and check that it is in the expected state.
-  HARDENED_RETURN_IF_ERROR(ast_patch(lc_state));
+  // Reclaim entries 0 ~ 7 from ROM and ROM_EXT IMM_SECTION.
+  for (int8_t i = 7; i >= 0; --i) {
+    epmp_clear((uint8_t)i);
+  }
+  HARDENED_RETURN_IF_ERROR(epmp_state_check());
 
   // Check that the retention RAM is initialized.
   // TODO(lowrisc#22387): Check if return-if-error here is a potential
@@ -206,20 +172,28 @@ static rom_error_t rom_ext_init(boot_data_t *boot_data) {
   return kErrorOk;
 }
 
-void rom_ext_sram_exec(hardened_bool_t enable) {
-  switch (enable) {
-    case kHardenedBoolTrue:
-      // In the case where we enable SRAM exec, we do not lock the register as
-      // some later code may want to disable it.
-      HARDENED_CHECK_EQ(enable, kHardenedBoolTrue);
+void rom_ext_sram_exec(owner_sram_exec_mode_t mode) {
+  switch (mode) {
+    case kOwnerSramExecModeEnabled:
+      // In enabled mode, we do not lock the register so owner code can disable
+      // SRAM exec at some later time.
+      HARDENED_CHECK_EQ(mode, kOwnerSramExecModeEnabled);
       sec_mmio_write32(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR +
                            SRAM_CTRL_EXEC_REG_OFFSET,
                        kMultiBitBool4True);
       break;
-    case kHardenedBoolFalse:
-      // In the case where we disable SRAM exec, we lock the register so that it
-      // cannot be re-enabled later.
-      HARDENED_CHECK_EQ(enable, kHardenedBoolFalse);
+    case kOwnerSramExecModeDisabled:
+      // In disabled mode, we do not lock the register so owner code can enable
+      // SRAM exec at some later time.
+      HARDENED_CHECK_EQ(mode, kOwnerSramExecModeDisabled);
+      sec_mmio_write32(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR +
+                           SRAM_CTRL_EXEC_REG_OFFSET,
+                       kMultiBitBool4False);
+      break;
+    case kOwnerSramExecModeDisabledLocked:
+    default:
+      // In disabled locked mode, we lock the register so the mode cannot be
+      // changed.
       sec_mmio_write32(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR +
                            SRAM_CTRL_EXEC_REG_OFFSET,
                        kMultiBitBool4False);
@@ -227,47 +201,9 @@ void rom_ext_sram_exec(hardened_bool_t enable) {
                            SRAM_CTRL_EXEC_REGWEN_REG_OFFSET,
                        0);
       break;
-    default:
-      HARDENED_TRAP();
   }
 }
 
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_verify(const manifest_t *manifest,
-                                  const boot_data_t *boot_data) {
-  RETURN_IF_ERROR(rom_ext_boot_policy_manifest_check(manifest, boot_data));
-  const sigverify_rsa_key_t *key;
-  RETURN_IF_ERROR(sigverify_rsa_key_get(
-      sigverify_rsa_key_id_get(&manifest->rsa_modulus), &key));
-
-  memset(boot_measurements.bl0.data, (int)rnd_uint32(),
-         sizeof(boot_measurements.bl0.data));
-
-  hmac_sha256_init();
-  // Hash usage constraints.
-  manifest_usage_constraints_t usage_constraints_from_hw;
-  sigverify_usage_constraints_get(manifest->usage_constraints.selector_bits,
-                                  &usage_constraints_from_hw);
-  hmac_sha256_update(&usage_constraints_from_hw,
-                     sizeof(usage_constraints_from_hw));
-  // Hash the remaining part of the image.
-  manifest_digest_region_t digest_region = manifest_digest_region_get(manifest);
-  hmac_sha256_update(digest_region.start, digest_region.length);
-  // TODO(#19596): add owner configuration block to measurement.
-  // Verify signature
-  hmac_sha256_process();
-  hmac_digest_t act_digest;
-  hmac_sha256_final(&act_digest);
-
-  static_assert(sizeof(boot_measurements.bl0) == sizeof(act_digest),
-                "Unexpected BL0 digest size.");
-  memcpy(&boot_measurements.bl0, &act_digest, sizeof(boot_measurements.bl0));
-
-  uint32_t flash_exec = 0;
-  return sigverify_rsa_verify(&manifest->rsa_signature, key, &act_digest,
-                              lc_state, &flash_exec);
-}
-
 /**
  * These symbols are defined in
  * `opentitan/sw/device/silicon_creator/rom_ext/rom_ext.ld`, and describe the
@@ -289,212 +225,42 @@ static uintptr_t owner_vma_get(const manifest_t *manifest, uintptr_t lma_addr) {
           (uintptr_t)_owner_virtual_start_address + CHIP_ROM_EXT_SIZE_MAX);
 }
 
-/**
- * Increments the DICE cert page offset (ensuring to round up to the 64-bit
- * flash word offset to prevent potential ECC issues).
- */
-static void rom_ext_attestation_increment_cert_offset(size_t cert_size) {
-  HARDENED_CHECK_GE(cert_size, 4);
-  dice_certs_page_offset += util_size_to_words(cert_size) * sizeof(uint32_t);
-  dice_certs_page_offset = util_round_up_to(dice_certs_page_offset, 3);
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_buffer_dice_certs_into_ram(void) {
-  rom_error_t err = flash_ctrl_info_read(
-      &kFlashCtrlInfoPageDiceCerts, /*offset=*/0,
-      /*word_count=*/FLASH_CTRL_PARAM_BYTES_PER_PAGE / sizeof(uint32_t),
-      dice_certs_page);
-  if (err != kErrorOk) {
-    flash_ctrl_error_code_t flash_ctrl_err_code;
-    flash_ctrl_error_code_get(&flash_ctrl_err_code);
-    if (flash_ctrl_err_code.rd_err) {
-      // If we encountered a read error, this could mean the certificate page
-      // has been corrupted or is not provisioned yet. In this case, we mark the
-      // page as "dirty" and set the buffer to all 1s, which are the values read
-      // from a freshly erased flash page.
-      memset(dice_certs_page, UINT8_MAX, FLASH_CTRL_PARAM_BYTES_PER_PAGE);
-      dice_certs_page_dirty = true;
-      return kErrorOk;
-    }
-  }
-  return err;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_attestation_silicon(void) {
-  // Initialize the entropy complex and KMAC for key manager operations.
-  // Note: `OTCRYPTO_OK.value` is equal to `kErrorOk` but we cannot add a static
-  // assertion here since its definition is not an integer constant expression.
-  HARDENED_RETURN_IF_ERROR((rom_error_t)entropy_complex_init().value);
-  HARDENED_RETURN_IF_ERROR(kmac_keymgr_configure());
-
-  // Set keymgr reseed interval. Start with the maximum value to avoid
-  // entropy complex contention during the boot process.
-  const uint16_t kScKeymgrEntropyReseedInterval = UINT16_MAX;
-  sc_keymgr_entropy_reseed_interval_set(kScKeymgrEntropyReseedInterval);
-  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioEntropyReseedIntervalSet);
-
-  // ROM sets the SW binding values for the first key stage (CreatorRootKey) but
-  // does not initialize the key manager. Advance key manager state twice to
-  // transition to the CreatorRootKey state.
-  HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateReset));
-  sc_keymgr_advance_state();
-  HARDENED_RETURN_IF_ERROR(sc_keymgr_state_check(kScKeymgrStateInit));
-
-  // Generate UDS keys.
-  sc_keymgr_advance_state();
-  HARDENED_RETURN_IF_ERROR(dice_attestation_keygen(kDiceKeyUds, &uds_pubkey_id,
-                                                   &curr_attestation_pubkey));
-  HARDENED_RETURN_IF_ERROR(otbn_boot_attestation_key_save(
-      kUdsAttestationKeySeed, kOtbnBootAttestationKeyTypeDice,
-      kUdsKeymgrDiversifier));
-  hardened_bool_t cert_valid = kHardenedBoolFalse;
-  uint32_t cert_size = 0;
-  HARDENED_RETURN_IF_ERROR(cert_x509_asn1_check_serial_number(
-      dice_certs_page, dice_certs_page_offset, (uint8_t *)uds_pubkey_id.digest,
-      &cert_valid, &cert_size));
-  if (launder32(cert_valid) == kHardenedBoolFalse) {
-    // The UDS key ID (and cert itself) should never change unless:
-    // 1. there is a hardware issue, or
-    // 2. the cert has not yet been provisioned.
-    //
-    // In either case, we do not need to (re)generate the certificate since an
-    // out of band attestation attempt will detect both conditions.
-    HARDENED_CHECK_EQ(cert_valid, kHardenedBoolFalse);
-    dbg_printf("Warning: UDS certificate not valid.\r\n");
-
-    // On sim and FPGA platforms, or silicon that has not been provisioned
-    // fully, we expect the cert to be missing. In this case, we write a
-    // 0-length (invalid) ASN.1 certificate header blob to avoid breaking tests
-    // that run on these platforms.
-    if (cert_size == 0) {
-      dbg_printf("Writing empty UDS certificate ASN.1 blob.\r\n");
-      dice_certs_page[0] = 0x30;
-      dice_certs_page[1] = 0x82;
-      dice_certs_page[2] = 0x00;
-      dice_certs_page[3] = 0x00;
-      cert_size = 4;
-      dice_certs_page_dirty = kHardenedBoolTrue;
-    }
-  }
-
-  rom_ext_attestation_increment_cert_offset(cert_size);
-
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_attestation_creator(
-    const manifest_t *rom_ext_manifest) {
-  // Generate CDI_0 attestation keys and (potentially) update certificate.
-  keymgr_binding_value_t seal_binding_value = {
-      .data = {rom_ext_manifest->identifier, 0}};
-  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioSwBindingSet +
-                           kScKeymgrSecMmioOwnerIntMaxVerSet);
-  HARDENED_RETURN_IF_ERROR(
-      sc_keymgr_owner_int_advance(/*sealing_binding=*/&seal_binding_value,
-                                  /*attest_binding=*/&boot_measurements.rom_ext,
-                                  rom_ext_manifest->max_key_version));
-  HARDENED_RETURN_IF_ERROR(dice_attestation_keygen(
-      kDiceKeyCdi0, &cdi_0_pubkey_id, &curr_attestation_pubkey));
-  hardened_bool_t cert_valid = kHardenedBoolFalse;
-  uint32_t cert_size = 0;
-  HARDENED_RETURN_IF_ERROR(cert_x509_asn1_check_serial_number(
-      dice_certs_page, dice_certs_page_offset,
-      (uint8_t *)cdi_0_pubkey_id.digest, &cert_valid, &cert_size));
-  if (launder32(cert_valid) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(cert_valid, kHardenedBoolFalse);
-    dbg_printf("CDI_0 certificate not valid. Updating it ...\r\n");
-    uint32_t updated_cert_size = kCdi0MaxCertSizeBytes;
-    HARDENED_RETURN_IF_ERROR(dice_cdi_0_cert_build(
-        (hmac_digest_t *)boot_measurements.rom_ext.data,
-        rom_ext_manifest->security_version, &cdi_0_key_ids,
-        &curr_attestation_pubkey, cdi_0_cert, &updated_cert_size));
-    // Update the cert page buffer.
-    memcpy(&dice_certs_page[dice_certs_page_offset], cdi_0_cert,
-           updated_cert_size);
-    dice_certs_page_dirty = kHardenedBoolTrue;
-    rom_ext_attestation_increment_cert_offset(updated_cert_size);
-    // If the CDI_0 cert is updated, it could overrun the CDI_1 cert, so we make
-    // sure to update that as well by erasing the existing cert from the buffer.
-    memset(&dice_certs_page[dice_certs_page_offset], UINT8_MAX,
-           FLASH_CTRL_PARAM_BYTES_PER_PAGE - dice_certs_page_offset);
-  } else {
-    rom_ext_attestation_increment_cert_offset(cert_size);
-  }
-  return kErrorOk;
-}
-
 OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_attestation_owner(const manifest_t *owner_manifest) {
-  keymgr_binding_value_t zero_binding_value = {.data = {0}};
-  // Generate CDI_1 attestation keys and (potentially) update certificate.
-  SEC_MMIO_WRITE_INCREMENT(kScKeymgrSecMmioSwBindingSet +
-                           kScKeymgrSecMmioOwnerIntMaxVerSet);
-  // TODO(cfrantz): setup sealing binding to value specified in owner
-  // configuration block.
-  HARDENED_RETURN_IF_ERROR(
-      sc_keymgr_owner_advance(/*sealing_binding=*/&zero_binding_value,
-                              /*attest_binding=*/&boot_measurements.bl0,
-                              owner_manifest->max_key_version));
-  HARDENED_RETURN_IF_ERROR(dice_attestation_keygen(
-      kDiceKeyCdi1, &cdi_1_pubkey_id, &curr_attestation_pubkey));
-  hardened_bool_t cert_valid = kHardenedBoolFalse;
-  uint32_t cert_size = 0;
-  HARDENED_RETURN_IF_ERROR(cert_x509_asn1_check_serial_number(
-      dice_certs_page, dice_certs_page_offset,
-      (uint8_t *)cdi_1_pubkey_id.digest, &cert_valid, &cert_size));
-  if (launder32(cert_valid) == kHardenedBoolFalse) {
-    HARDENED_CHECK_EQ(cert_valid, kHardenedBoolFalse);
-    dbg_printf("CDI_1 certificate not valid. Updating it ...\r\n");
-    uint32_t updated_cert_size = kCdi1MaxCertSizeBytes;
-    // TODO(#19596): add owner configuration block measurement to CDI_1 cert.
-    HARDENED_RETURN_IF_ERROR(dice_cdi_1_cert_build(
-        (hmac_digest_t *)boot_measurements.bl0.data,
-        (hmac_digest_t *)zero_binding_value.data,
-        owner_manifest->security_version, &cdi_1_key_ids,
-        &curr_attestation_pubkey, cdi_1_cert, &updated_cert_size));
-    // Update the cert page buffer.
-    memcpy(&dice_certs_page[dice_certs_page_offset], cdi_1_cert,
-           updated_cert_size);
-    dice_certs_page_dirty = kHardenedBoolTrue;
-    rom_ext_attestation_increment_cert_offset(updated_cert_size);
-    // If the CDI_1 cert is updated, it could be smaller than the previous CDI_1
-    // cert, so we make sure to clear out the rest of the buffer.
-    memset(&dice_certs_page[dice_certs_page_offset], UINT8_MAX,
-           FLASH_CTRL_PARAM_BYTES_PER_PAGE - dice_certs_page_offset);
+static rom_error_t rom_ext_boot(boot_data_t *boot_data, boot_log_t *boot_log,
+                                const manifest_t *manifest,
+                                uint32_t *flash_exec) {
+  // Determine which owner block the key came from and measure that block.
+  hmac_digest_t owner_measurement;
+  const owner_application_key_t *key = keyring.key[verify_key];
+  owner_block_measurement(owner_block_key_page(key), &owner_measurement);
+
+  keymgr_binding_value_t sealing_binding;
+  if (boot_data->ownership_state == kOwnershipStateLockedOwner) {
+    HARDENED_CHECK_EQ(boot_data->ownership_state, kOwnershipStateLockedOwner);
+    // If we're in LockedOwner, initialize the sealing binding with the
+    // diversification constant associated with key applicaiton key that
+    // validated the owner firmware payload.
+    static_assert(
+        sizeof(key->raw_diversifier) == sizeof(keymgr_binding_value_t),
+        "Expect the keymgr binding value to be the same size as an application "
+        "key diversifier");
+    memcpy(&sealing_binding, key->raw_diversifier, sizeof(sealing_binding));
   } else {
-    rom_ext_attestation_increment_cert_offset(cert_size);
+    // If we're not in LockedOwner state, we don't want to derive any valid
+    // sealing keys, so set the binding constant to a nonsense value.
+    memset(&sealing_binding, 0x55, sizeof(sealing_binding));
   }
 
-  // TODO: elimiate this call when we've fully programmed keymgr and lock it.
-  sc_keymgr_sw_binding_unlock_wait();
-
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_boot(const manifest_t *manifest) {
   // Generate CDI_1 attestation keys and certificate.
-  HARDENED_RETURN_IF_ERROR(rom_ext_attestation_owner(manifest));
+  HARDENED_RETURN_IF_ERROR(dice_chain_attestation_owner(
+      manifest, &boot_measurements.bl0, &owner_measurement, &owner_history_hash,
+      &sealing_binding, key->key_domain));
 
   // Write the DICE certs to flash if they have been updated.
-  if (launder32(dice_certs_page_dirty) == kHardenedBoolTrue) {
-    HARDENED_CHECK_EQ(dice_certs_page_dirty, kHardenedBoolTrue);
-    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_erase(&kFlashCtrlInfoPageDiceCerts,
-                                                   kFlashCtrlEraseTypePage));
-    HARDENED_RETURN_IF_ERROR(flash_ctrl_info_write(
-        &kFlashCtrlInfoPageDiceCerts,
-        /*offset=*/0,
-        /*word_count=*/FLASH_CTRL_PARAM_BYTES_PER_PAGE / sizeof(uint32_t),
-        dice_certs_page));
-  }
+  HARDENED_RETURN_IF_ERROR(dice_chain_flush_flash());
 
   // Remove write and erase access to the certificate pages before handing over
   // execution to the owner firmware (owner firmware can still read).
-  flash_ctrl_cert_info_page_owner_restrict(
-      &kFlashCtrlInfoPageAttestationKeySeeds);
   flash_ctrl_cert_info_page_owner_restrict(&kFlashCtrlInfoPageDiceCerts);
 
   // Disable access to silicon creator info pages, the OTP creator partition
@@ -504,57 +270,8 @@ static rom_error_t rom_ext_boot(const manifest_t *manifest) {
   SEC_MMIO_WRITE_INCREMENT(kFlashCtrlSecMmioCreatorInfoPagesLockdown +
                            kOtpSecMmioCreatorSwCfgLockDown);
 
-  // ePMP region 15 gives read/write access to RAM.
-  rom_ext_epmp_set_napot(15, kRamRegion, kEpmpPermReadWrite);
-
-  // Reconfigure the ePMP MMIO region to be NAPOT region 14, thus freeing
-  // up an ePMP entry for use elsewhere.
-  rom_ext_epmp_set_napot(14, kMmioRegion, kEpmpPermReadWrite);
-
-  // ePMP region 13 allows RvDM access.
-  if (lc_state == kLcStateProd || lc_state == kLcStateProdEnd) {
-    // No RvDM access in Prod states, so we can clear the entry.
-    rom_ext_epmp_clear(13);
-  } else {
-    rom_ext_epmp_set_napot(13, kRvDmRegion, kEpmpPermReadWriteExecute);
-  }
-
-  // ePMP region 12 gives read access to all of flash for both M and U modes.
-  // The flash access was in ePMP region 5.  Clear it so it doesn't take
-  // priority over 12.
-  rom_ext_epmp_set_napot(12, kFlashRegion, kEpmpPermReadOnly);
-  rom_ext_epmp_clear(5);
+  epmp_clear_lock_bits();
 
-  // Move the ROM_EXT TOR region from entries 3/4/6 to 9/10/11.
-  // If the ROM_EXT is located in the virtual window, the ROM will have
-  // configured ePMP entry 6 as the read-only region over the entire
-  // window.
-  //
-  // If not using the virtual window, we move the ROM_EXT TOR region to
-  // ePMP entries 10/11.
-  // If using the virtual window, we move the ROM_EXT read-only region to
-  // ePMP entry 11 and move the TOR region to 9/10.
-  uint32_t start, end, vwindow;
-  CSR_READ(CSR_REG_PMPADDR3, &start);
-  CSR_READ(CSR_REG_PMPADDR4, &end);
-  CSR_READ(CSR_REG_PMPADDR6, &vwindow);
-  uint8_t rxindex = 10;
-  if (vwindow) {
-    rxindex = 9;
-    uint32_t size = 1 << bitfield_count_trailing_zeroes32(~vwindow);
-    vwindow = (vwindow & ~(size - 1)) << 2;
-    size <<= 3;
-
-    rom_ext_epmp_set_napot(
-        11, (epmp_region_t){.start = vwindow, .end = vwindow + size},
-        kEpmpPermReadOnly);
-  }
-  rom_ext_epmp_set_tor(rxindex,
-                       (epmp_region_t){.start = start << 2, .end = end << 2},
-                       kEpmpPermReadExecute);
-  for (int8_t i = (int8_t)rxindex - 1; i >= 0; --i) {
-    rom_ext_epmp_clear((uint8_t)i);
-  }
   HARDENED_RETURN_IF_ERROR(epmp_state_check());
 
   // Configure address translation, compute the epmp regions and the entry
@@ -575,7 +292,7 @@ static rom_error_t rom_ext_boot(const manifest_t *manifest) {
 
       // Unlock read-only for the whole rom_ext virtual memory.
       HARDENED_RETURN_IF_ERROR(epmp_state_check());
-      rom_ext_epmp_set_napot(
+      epmp_set_napot(
           4,
           (epmp_region_t){.start = (uintptr_t)_owner_virtual_start_address,
                           .end = (uintptr_t)_owner_virtual_start_address +
@@ -592,35 +309,55 @@ static rom_error_t rom_ext_boot(const manifest_t *manifest) {
       break;
     case kHardenedBoolFalse:
       HARDENED_CHECK_EQ(manifest->address_translation, kHardenedBoolFalse);
-      // Normally we'd want to clear the ROM region since we aren't using it
-      // anymore and since it isn't being used to encode access to the virtual
-      // window.  However, for SiVal, we want to keep low entries locked to
-      // prevent using low entries to override policy in higher entries.
-      // rom_ext_epmp_clear_rom_region();
       break;
     default:
       HARDENED_TRAP();
   }
 
-  // Allow execution of owner stage executable code (text) sections,
-  // unlock the ROM_EXT code regions so the next stage can re-use those
-  // entries and clear RLB to prevent further changes to locked ePMP regions.
-  HARDENED_RETURN_IF_ERROR(epmp_state_check());
-  rom_ext_epmp_set_tor(2, text_region, kEpmpPermReadExecute);
-
-  // Now that we're done reconfiguring the ePMP, we'll clear the RLB bit to
-  // prevent any modification to locked entries.
-  rom_ext_epmp_clear_rlb();
+  // Allow execution of owner stage executable code (text) sections.
+  epmp_set_tor(2, text_region, kEpmpPermReadExecute);
   HARDENED_RETURN_IF_ERROR(epmp_state_check());
 
-  // Forbid code execution from SRAM.
-  rom_ext_sram_exec(kHardenedBoolFalse);
-
   // Lock the address translation windows.
   ibex_addr_remap_lockdown(0);
   ibex_addr_remap_lockdown(1);
 
-  dbg_print_epmp();
+  if (launder32((hardened_bool_t)owner_config.isfb) != kHardenedBoolFalse) {
+    hardened_bool_t node_locked = manifest->usage_constraints.selector_bits
+                                      ? kHardenedBoolTrue
+                                      : kHardenedBoolFalse;
+
+    const manifest_ext_isfb_erase_t *ext_isfb_erase;
+    rom_error_t ext_error =
+        manifest_ext_get_isfb_erase(manifest, &ext_isfb_erase);
+
+    hardened_bool_t erase_en = kHardenedBoolFalse;
+    HARDENED_RETURN_IF_ERROR(isfb_info_flash_erase_policy_get(
+        &owner_config, keyring.key[verify_key]->key_domain, node_locked,
+        (ext_error == kErrorOk) ? ext_isfb_erase : NULL, &erase_en));
+
+    if (launder32(erase_en) == kHardenedBoolTrue) {
+      HARDENED_RETURN_IF_ERROR(
+          owner_block_info_isfb_erase_enable(boot_data, &owner_config));
+      HARDENED_CHECK_EQ(erase_en, kHardenedBoolTrue);
+    }
+
+    // Redundant check to ensure that the ISFB check was performed earlier in
+    // the boot process.
+    const manifest_ext_isfb_t *ext_isfb;
+    rom_error_t error = manifest_ext_get_isfb(manifest, &ext_isfb);
+    if (error == kErrorOk) {
+      HARDENED_CHECK_EQ(isfb_check_count, isfb_expected_count_get(ext_isfb));
+    } else {
+      HARDENED_CHECK_NE(error, kErrorOk);
+    }
+  }
+
+  // Lock the flash according to the ownership configuration.
+  HARDENED_RETURN_IF_ERROR(
+      ownership_flash_lockdown(boot_data, boot_log, &owner_config));
+  // Lock the ownership info pages.
+  ownership_pages_lockdown(boot_data, /*rescue=*/kHardenedBoolFalse);
 
   // Verify expectations before jumping to owner code.
   // TODO: we really want to call rnd_uint32 here to select a random starting
@@ -628,164 +365,37 @@ static rom_error_t rom_ext_boot(const manifest_t *manifest) {
   // to know if it's allowed to used the CSRNG and OTP is locked down.
   sec_mmio_check_values_except_otp(/*rnd_uint32()*/ 0,
                                    TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR);
+
+  HARDENED_CHECK_EQ(*flash_exec, kSigverifyFlashExec);
+
   // Jump to OWNER entry point.
   dbg_printf("entry: 0x%x\r\n", (unsigned int)entry_point);
+  coverage_report();
+  coverage_invalidate();
   ((owner_stage_entry_point *)entry_point)();
+  coverage_init();  // re-init after invalidate.
 
   return kErrorRomExtBootFailed;
 }
 
 OT_WARN_UNUSED_RESULT
-static rom_error_t boot_svc_next_boot_bl0_slot_handler(
-    boot_svc_msg_t *boot_svc_msg, boot_data_t *boot_data) {
-  uint32_t msg_bl0_slot = boot_svc_msg->next_boot_bl0_slot_req.next_bl0_slot;
-  // We overwrite the RAM copy of the primary slot to the requested  next slot.
-  // This will cause a one-time boot of the requested side.
-  rom_error_t error = kErrorOk;
-  switch (launder32(msg_bl0_slot)) {
-    case kBootSlotA:
-      HARDENED_CHECK_EQ(msg_bl0_slot, kBootSlotA);
-      boot_data->primary_bl0_slot = kBootSlotA;
-      break;
-    case kBootSlotB:
-      HARDENED_CHECK_EQ(msg_bl0_slot, kBootSlotB);
-      boot_data->primary_bl0_slot = kBootSlotB;
-      break;
-    default:
-      error = kErrorBootSvcBadSlot;
-  }
-
-  boot_svc_next_boot_bl0_slot_res_init(error,
-                                       &boot_svc_msg->next_boot_bl0_slot_res);
-  // We always return OK here because we've logged any error status in the boot
-  // services response message and we want the boot flow to continue.
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t boot_svc_primary_boot_bl0_slot_handler(
-    boot_svc_msg_t *boot_svc_msg, boot_data_t *boot_data) {
-  uint32_t active_slot = boot_data->primary_bl0_slot;
-  uint32_t requested_slot = boot_svc_msg->primary_bl0_slot_req.primary_bl0_slot;
-
-  // In cases where the primary is already set to the requested slot, this
-  // function is a no-op.
-  if (launder32(active_slot) != launder32(requested_slot)) {
-    HARDENED_CHECK_NE(active_slot, requested_slot);
-    switch (launder32(requested_slot)) {
-      case kBootSlotA:
-        HARDENED_CHECK_EQ(requested_slot, kBootSlotA);
-        boot_data->primary_bl0_slot = requested_slot;
-        break;
-      case kBootSlotB:
-        HARDENED_CHECK_EQ(requested_slot, kBootSlotB);
-        boot_data->primary_bl0_slot = requested_slot;
-        break;
-      default:
-        HARDENED_TRAP();
-    }
-
-    // Write boot data, updating relevant fields and recomputing the digest.
-    HARDENED_RETURN_IF_ERROR(boot_data_write(boot_data));
-    // Read the boot data back to ensure the correct slot is booted this time.
-    HARDENED_RETURN_IF_ERROR(boot_data_read(lc_state, boot_data));
-  } else {
-    HARDENED_CHECK_EQ(active_slot, requested_slot);
-  }
-
-  boot_svc_primary_bl0_slot_res_init(boot_data->primary_bl0_slot, kErrorOk,
-                                     &boot_svc_msg->primary_bl0_slot_res);
-
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t boot_svc_min_sec_ver_handler(boot_svc_msg_t *boot_svc_msg,
-                                                boot_data_t *boot_data) {
-  const uint32_t current_min_sec_ver = boot_data->min_security_version_bl0;
-  const uint32_t requested_min_sec_ver =
-      boot_svc_msg->next_boot_bl0_slot_req.next_bl0_slot;
-  const uint32_t diff = requested_min_sec_ver - current_min_sec_ver;
-
-  // Ensure the requested minimum security version isn't lower than the current
-  // minimum security version.
-  if (launder32(requested_min_sec_ver) > current_min_sec_ver) {
-    HARDENED_CHECK_GT(requested_min_sec_ver, current_min_sec_ver);
-    HARDENED_CHECK_LT(diff, requested_min_sec_ver);
-
-    // Update boot data to the requested minimum BL0 security version.
-    boot_data->min_security_version_bl0 = requested_min_sec_ver;
-
-    // Write boot data, updating relevant fields and recomputing the digest.
-    HARDENED_RETURN_IF_ERROR(boot_data_write(boot_data));
-    // Read the boot data back to ensure the correct policy is used this boot.
-    HARDENED_RETURN_IF_ERROR(boot_data_read(lc_state, boot_data));
-
-    boot_svc_min_bl0_sec_ver_res_init(boot_data->min_security_version_bl0,
-                                      kErrorOk,
-                                      &boot_svc_msg->min_bl0_sec_ver_res);
-
-    HARDENED_CHECK_EQ(requested_min_sec_ver,
-                      boot_data->min_security_version_bl0);
-  } else {
-    boot_svc_min_bl0_sec_ver_res_init(current_min_sec_ver, kErrorOk,
-                                      &boot_svc_msg->min_bl0_sec_ver_res);
-  }
-
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t handle_boot_svc(boot_data_t *boot_data) {
-  boot_svc_msg_t *boot_svc_msg = &retention_sram_get()->creator.boot_svc_msg;
-  // TODO(lowRISC#22387): Examine the boot_svc code paths for boot loops.
-  if (boot_svc_msg->header.identifier == kBootSvcIdentifier) {
-    HARDENED_RETURN_IF_ERROR(boot_svc_header_check(&boot_svc_msg->header));
-    uint32_t msg_type = boot_svc_msg->header.type;
-    switch (launder32(msg_type)) {
-      case kBootSvcEmptyType:
-        HARDENED_CHECK_EQ(msg_type, kBootSvcEmptyType);
-        break;
-      case kBootSvcNextBl0SlotReqType:
-        HARDENED_CHECK_EQ(msg_type, kBootSvcNextBl0SlotReqType);
-        return boot_svc_next_boot_bl0_slot_handler(boot_svc_msg, boot_data);
-      case kBootSvcPrimaryBl0SlotReqType:
-        HARDENED_CHECK_EQ(msg_type, kBootSvcPrimaryBl0SlotReqType);
-        return boot_svc_primary_boot_bl0_slot_handler(boot_svc_msg, boot_data);
-      case kBootSvcMinBl0SecVerReqType:
-        HARDENED_CHECK_EQ(msg_type, kBootSvcMinBl0SecVerReqType);
-        return boot_svc_min_sec_ver_handler(boot_svc_msg, boot_data);
-      case kBootSvcOwnershipUnlockReqType:
-        HARDENED_CHECK_EQ(msg_type, kBootSvcOwnershipUnlockReqType);
-        return ownership_unlock_handler(boot_svc_msg, boot_data);
-      case kBootSvcNextBl0SlotResType:
-      case kBootSvcPrimaryBl0SlotResType:
-      case kBootSvcMinBl0SecVerResType:
-      case kBootSvcOwnershipUnlockResType:
-        // For response messages left in ret-ram we do nothing.
-        break;
-      default:
-          // For messages with an unknown msg_type, we do nothing.
-          ;
-    }
-  }
-  return kErrorOk;
-}
-
-OT_WARN_UNUSED_RESULT
-static rom_error_t rom_ext_try_next_stage(boot_data_t *boot_data) {
+static rom_error_t rom_ext_try_next_stage(boot_data_t *boot_data,
+                                          boot_log_t *boot_log) {
   rom_ext_boot_policy_manifests_t manifests =
       rom_ext_boot_policy_manifests_get(boot_data);
   rom_error_t error = kErrorRomExtBootFailed;
   rom_error_t slot[2] = {0, 0};
   for (size_t i = 0; i < ARRAYSIZE(manifests.ordered); ++i) {
-    error = rom_ext_verify(manifests.ordered[i], boot_data);
+    uint32_t flash_exec = 0;
+    error =
+        rom_ext_verify(manifests.ordered[i], boot_data, &flash_exec, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count);
     slot[i] = error;
     if (error != kErrorOk) {
       continue;
     }
+    HARDENED_CHECK_EQ(flash_exec, kSigverifyFlashExec);
 
-    boot_log_t *boot_log = &retention_sram_get()->creator.boot_log;
     if (manifests.ordered[i] == rom_ext_boot_policy_manifest_a_get()) {
       boot_log->bl0_slot = kBootSlotA;
     } else if (manifests.ordered[i] == rom_ext_boot_policy_manifest_b_get()) {
@@ -796,7 +406,8 @@ static rom_error_t rom_ext_try_next_stage(boot_data_t *boot_data) {
     boot_log_digest_update(boot_log);
 
     // Boot fails if a verified ROM_EXT cannot be booted.
-    RETURN_IF_ERROR(rom_ext_boot(manifests.ordered[i]));
+    RETURN_IF_ERROR(
+        rom_ext_boot(boot_data, boot_log, manifests.ordered[i], &flash_exec));
     // `rom_ext_boot()` should never return `kErrorOk`, but if it does
     // we must shut down the chip instead of trying the next ROM_EXT.
     return kErrorRomExtBootFailed;
@@ -814,60 +425,221 @@ static rom_error_t rom_ext_try_next_stage(boot_data_t *boot_data) {
   return error;
 }
 
+static void rom_ext_flash_protect_self(uint32_t rom_ext_slot) {
+  flash_ctrl_cfg_t cfg = flash_ctrl_data_default_cfg_get();
+  flash_ctrl_perms_t read = {
+      .read = kMultiBitBool4True,
+      .write = kMultiBitBool4False,
+      .erase = kMultiBitBool4False,
+  };
+  flash_ctrl_perms_t write = {
+      .read = kMultiBitBool4True,
+      .write = kMultiBitBool4True,
+      .erase = kMultiBitBool4True,
+  };
+  flash_ctrl_data_region_protect(0, kRomExtAStart, kRomExtSizeInPages,
+                                 rom_ext_slot == kBootSlotA ? read : write, cfg,
+                                 kHardenedBoolTrue);
+  flash_ctrl_data_region_protect(1, kRomExtBStart, kRomExtSizeInPages,
+                                 rom_ext_slot == kBootSlotB ? read : write, cfg,
+                                 kHardenedBoolTrue);
+}
+
+static void rom_ext_rescue_lockdown(boot_data_t *boot_data) {
+  // Forbid SRAM execution.
+  rom_ext_sram_exec(kOwnerSramExecModeDisabledLocked);
+  // Set the keymgr to disabled and clear all sideloaded keys.
+  sc_keymgr_disable();
+  // Lock out OTP.
+  otp_creator_sw_cfg_lockdown();
+  // Lock the ePMP so it cannot be changed.
+  epmp_set_lock_bits();
+  epmp_clear_rlb();
+  // Disable access to creator-level INFO pages.
+  flash_ctrl_creator_info_pages_lockdown();
+  // Set the OWNER_CONFIG pages for rescue mode (page0=ro, page1=rw).
+  ownership_pages_lockdown(boot_data, /*rescue=*/kHardenedBoolTrue);
+  // Lock access to owner-level INFO pages.  During normal boot, this
+  // is performed by `ownership_flash_lockdown`, but we can't call that
+  // function when entering rescue because rescue needs the flash DATA
+  // segments to be writable.  Rescue has no need to access the INFO
+  // pages, so we want to lock them for safety.
+  owner_block_info_lockdown(owner_config.info);
+}
+
+static rom_error_t rom_ext_advance_secver(boot_data_t *boot_data,
+                                          const manifest_t *manifest) {
+  const manifest_ext_secver_write_t *secver;
+  rom_error_t error;
+  error = manifest_ext_get_secver_write(manifest, &secver);
+  if (error == kErrorOk) {
+    if (secver->write == kHardenedBoolTrue &&
+        manifest->security_version > boot_data->min_security_version_rom_ext) {
+      // If our security version is greater than the minimum security version
+      // advance the minimum version to our version.
+      boot_data->min_security_version_rom_ext = manifest->security_version;
+      return boot_data_write(boot_data);
+    }
+  }
+  return kErrorOk;
+}
+
+// This weak function allows downstream ROM_EXT builds to override whether or
+// not boot_svc runs after a low-power wakeup.  This is a mitigation for a
+// late-added confiuration item to the owner configuration.
+OT_WEAK
+hardened_bool_t rom_ext_allow_boot_svc_after_wakeup(void) {
+  return owner_config.boot_svc_after_wakeup;
+}
+
 static rom_error_t rom_ext_start(boot_data_t *boot_data, boot_log_t *boot_log) {
   HARDENED_RETURN_IF_ERROR(rom_ext_init(boot_data));
   const manifest_t *self = rom_ext_manifest();
-  dbg_printf("Starting ROM_EXT %u.%u\r\n", self->version_major,
-             self->version_minor);
 
-  // Configure DICE certificate flash info page and buffer it into RAM.
-  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageAttestationKeySeeds);
-  flash_ctrl_cert_info_page_creator_cfg(&kFlashCtrlInfoPageDiceCerts);
-  HARDENED_RETURN_IF_ERROR(rom_ext_buffer_dice_certs_into_ram());
+  lifecycle_claim(kMultiBitBool8True);
+  lifecycle_set_status(kLifecycleStatusWordRomExtVersion, self->version_minor);
+  lifecycle_set_status(kLifecycleStatusWordRomExtSecVersion,
+                       self->security_version);
+  lifecycle_set_status(kLifecycleStatusWordOwnerVersion, 0);
+  lifecycle_set_status(kLifecycleStatusWordDeviceStatus,
+                       kLifecycleDeviceStatusRomExtStart);
+  lifecycle_claim(kMultiBitBool8False);
+
+  dbg_printf("ROM_EXT:%u.%u\r\n", self->version_major, self->version_minor);
+
+  // Print the version of immutable section if exists.
+  if ((size_t)_rom_ext_immutable_size > kImmVersionSize) {
+    imm_section_version_t *version =
+        (imm_section_version_t *)((char *)_rom_ext_immutable_end -
+                                  kImmVersionSize);
+    dbg_printf("IMM_SECTION:%u.%u-%x%c\r\n", version->major, version->minor,
+               version->commit_hash, version->build_status);
+  }
+
+  uint32_t hash_enforcement =
+      otp_read32(OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET);
+  if (hash_enforcement != kHardenedBoolTrue) {
+    // CAUTION: The message below should match the message defined in:
+    //   //sw/device/silicon_creator/rom_ext/imm_section/defs.bzl
+    dbg_printf("info: imm_section hash unenforced\r\n");
+  }
+
+  // Maybe advance the security version.
+  HARDENED_RETURN_IF_ERROR(rom_ext_advance_secver(boot_data, self));
 
-  // Establish our identity.
-  HARDENED_RETURN_IF_ERROR(rom_ext_attestation_silicon());
-  HARDENED_RETURN_IF_ERROR(rom_ext_attestation_creator(self));
+  // Prepare dice chain builder for CDI_1.
+  HARDENED_RETURN_IF_ERROR(dice_chain_init());
+  HARDENED_RETURN_IF_ERROR(dice_chain_rom_ext_check());
 
   // Initialize the boot_log in retention RAM.
-  const chip_info_t *rom_chip_info = (const chip_info_t *)_chip_info_start;
+  const build_info_t *rom_chip_info = (const build_info_t *)_chip_info_start;
   boot_log_check_or_init(boot_log, rom_ext_current_slot(), rom_chip_info);
   boot_log->rom_ext_major = self->version_major;
   boot_log->rom_ext_minor = self->version_minor;
   boot_log->rom_ext_size = CHIP_ROM_EXT_SIZE_MAX;
-  boot_log->rom_ext_nonce = boot_data->nonce;
-  boot_log->ownership_state = boot_data->ownership_state;
-  boot_log->ownership_transfers = boot_data->ownership_transfers;
-  boot_log->rom_ext_min_sec_ver = boot_data->min_security_version_rom_ext;
-  boot_log->bl0_min_sec_ver = boot_data->min_security_version_bl0;
+  // Even though `primary_bl0_slot` can be changed by boot svc, we initialize
+  // it here so the "SetNextBl0" can do a one-time override of the RAM copy
+  // of `boot_data`.
   boot_log->primary_bl0_slot = boot_data->primary_bl0_slot;
 
-  // Initialize the chip ownership state.
-  HARDENED_RETURN_IF_ERROR(ownership_init());
+  // Protect the flash pages where the ROM_EXT is located.
+  rom_ext_flash_protect_self(boot_log->rom_ext_slot);
 
-  // Handle any pending boot_svc commands.
+  // Initialize the chip ownership state.
   rom_error_t error;
-  error = handle_boot_svc(boot_data);
+  error = ownership_init(boot_data, &owner_config, &keyring);
   if (error == kErrorWriteBootdataThenReboot) {
-    // Boot services reports errors by writing a status code into the reply
-    // messages.  Regardless of whether a boot service request produced an
-    // error, we want to continue booting unless the error specifically asks
-    // for a reboot.
     return error;
   }
+  // TODO(cfrantz): evaluate permissible ownership init failure conditions
+  // and change this to HARDENED_RETURN_IF_ERROR.
+  if (error != kErrorOk) {
+    dbg_printf("error: ownership_init=%x\r\n", error);
+  }
 
-  // Re-sync the boot_log entries that could be changed by boot services.
+  // Configure SRAM execution as the owner requested.
+  rom_ext_sram_exec(owner_config.sram_exec);
+
+  // Get the ownership history.  We discard the error because there is no
+  // meaningful action we could take in the event of an error.  If there
+  // was an error, ownership_history_get will default history hash result to
+  // all ones.
+  OT_DISCARD(ownership_history_get(&owner_history_hash));
+
+  // Handle any pending boot_svc commands.
+  uint32_t reset_reasons = retention_sram_get()->creator.reset_reasons;
+  hardened_bool_t waking_from_low_power =
+      reset_reasons & (1 << kRstmgrReasonLowPowerExit) ? kHardenedBoolTrue
+                                                       : kHardenedBoolFalse;
+
+  // Determine if we want to execute boot_svc requests if this is a low-power
+  // wakeup.
+  hardened_bool_t want_boot_svc = waking_from_low_power == kHardenedBoolTrue
+                                      ? rom_ext_allow_boot_svc_after_wakeup()
+                                      : kHardenedBoolTrue;
+
+  if (want_boot_svc == kHardenedBoolTrue) {
+    boot_svc_msg_t *boot_svc_msg = &retention_sram_get()->creator.boot_svc_msg;
+    error =
+        boot_svc_handler(boot_svc_msg, boot_data, boot_log, lc_state, &keyring,
+                         &verify_key, &owner_config, &isfb_check_count);
+    if (error == kErrorWriteBootdataThenReboot) {
+      // Boot services reports errors by writing a status code into the reply
+      // messages.  Regardless of whether a boot service request produced an
+      // error, we want to continue booting unless the error specifically asks
+      // for a reboot.
+      return error;
+    }
+  }
+
+  // Synchronize the boot_log entries that could be changed by boot services.
   boot_log->rom_ext_nonce = boot_data->nonce;
   boot_log->ownership_state = boot_data->ownership_state;
+  boot_log->ownership_transfers = boot_data->ownership_transfers;
+  boot_log->rom_ext_min_sec_ver = boot_data->min_security_version_rom_ext;
+  boot_log->bl0_min_sec_ver = boot_data->min_security_version_bl0;
   boot_log_digest_update(boot_log);
 
-  if (uart_break_detect(kRescueDetectTime) == kHardenedBoolTrue) {
-    dbg_printf("rescue: remember to clear break\r\n");
-    uart_enable_receiver();
-    error = rescue_protocol();
-  } else {
-    error = rom_ext_try_next_stage(boot_data);
+  // Now that boot services is finished, the ownership sealing key is no longer
+  // needed.
+  HARDENED_RETURN_IF_ERROR(ownership_seal_clear());
+
+  // We don't want to enter rescue mode if this is a low-power wakeup.
+  hardened_bool_t want_rescue =
+      waking_from_low_power != kHardenedBoolTrue
+          ? rescue_detect_entry(owner_config.rescue, reset_reasons)
+          : kHardenedBoolFalse;
+  hardened_bool_t boot_attempted = kHardenedBoolFalse;
+
+  if (want_rescue == kHardenedBoolFalse) {
+    // If rescue wasn't triggered, try booting the next stage.
+    error = rom_ext_try_next_stage(boot_data, boot_log);
+    boot_attempted = kHardenedBoolTrue;
   }
+
+  // If we haven't already entered rescue and rescue is requested (either by
+  // the rescue trigger or by a boot failure), then enter rescue.
+  if (want_rescue == kHardenedBoolTrue ||
+      rescue_enter_on_fail(owner_config.rescue) == kHardenedBoolTrue) {
+    rom_ext_rescue_lockdown(boot_data);
+    if (error != kErrorOk) {
+      dbg_printf("BFV:%x\r\n", error);
+    }
+
+    // Disable the watchdog timer when entering rescue mode.
+    watchdog_disable();
+    error = rescue_protocol(boot_data, boot_log, owner_config.rescue);
+
+    // If rescue timed out and we didn't attempt to boot, request skipping
+    // rescue on the next boot.  This will permit booting owner code if
+    // the rescue trigger is stuck for some reason.
+    if (error == kErrorRescueInactivity &&
+        boot_attempted == kHardenedBoolFalse) {
+      rescue_skip_next_boot();
+      rstmgr_reboot();
+    }
+  }
+
   return error;
 }
 
@@ -883,14 +655,3 @@ void rom_ext_main(void) {
   }
   shutdown_finalize(error);
 }
-
-void rom_ext_interrupt_handler(void) { shutdown_finalize(rom_ext_irq_error()); }
-
-// We only need a single handler for all ROM_EXT interrupts, but we want to
-// keep distinct symbols to make writing tests easier.  In the ROM_EXT,
-// alias all interrupt handler symbols to the single handler.
-OT_ALIAS("rom_ext_interrupt_handler")
-void rom_ext_exception_handler(void);
-
-OT_ALIAS("rom_ext_interrupt_handler")
-void rom_ext_nmi_handler(void);
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.c b/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.c
index b38c1078a4b1a..b399bc923a07e 100644
--- a/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.c
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.c
@@ -15,27 +15,25 @@ rom_ext_boot_policy_manifests_t rom_ext_boot_policy_manifests_get(
   const manifest_t *slot_b = rom_ext_boot_policy_manifest_b_get();
   uint32_t slot = boot_data->primary_bl0_slot;
   switch (launder32(slot)) {
-    case kBootSlotA:
-      HARDENED_CHECK_EQ(slot, kBootSlotA);
-      return (rom_ext_boot_policy_manifests_t){
-          .ordered = {slot_a, slot_b},
-      };
     case kBootSlotB:
       HARDENED_CHECK_EQ(slot, kBootSlotB);
       return (rom_ext_boot_policy_manifests_t){
           .ordered = {slot_b, slot_a},
       };
+    case kBootSlotA:
+      OT_FALLTHROUGH_INTENDED;
     default:
-      HARDENED_TRAP();
-      OT_UNREACHABLE();
+      return (rom_ext_boot_policy_manifests_t){
+          .ordered = {slot_a, slot_b},
+      };
   }
 }
 
 // TODO(#21204): Refactor to use `manifest_check` from `lib/manifest.h`.
 OT_WARN_UNUSED_RESULT
 static inline rom_error_t manifest_check_rom_ext(const manifest_t *manifest) {
-  // Major version must be `kManifestVersionMajor1`.
-  if (manifest->manifest_version.major != kManifestVersionMajor1) {
+  // Major version must be `kManifestVersionMajor2`.
+  if (manifest->manifest_version.major != kManifestVersionMajor2) {
     return kErrorManifestBadVersionMajor;
   }
 
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_unittest.cc b/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_unittest.cc
index fbe9b18948806..7fcc1d9ab233a 100644
--- a/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_unittest.cc
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_unittest.cc
@@ -79,6 +79,39 @@ TEST_F(RomExtBootPolicyTest, ManifestCheckBadBl0SecVer) {
             kErrorBootPolicyRollback);
 }
 
+TEST_F(RomExtBootPolicyTest, ManifestCheckBadSignedRegion) {
+  boot_data_t boot_data{};
+  boot_data.min_security_version_bl0 = 1;
+
+  manifest_t manifest{};
+  manifest.identifier = CHIP_BL0_IDENTIFIER;
+  manifest.length = CHIP_BL0_SIZE_MIN;
+  manifest.security_version = 1;
+  manifest.manifest_version.major = kManifestVersionMajor2;
+  manifest.signed_region_end = manifest.length + 1;
+
+  EXPECT_EQ(rom_ext_boot_policy_manifest_check(&manifest, &boot_data),
+            kErrorManifestBadSignedRegion);
+}
+
+TEST_F(RomExtBootPolicyTest, ManifestCheckBadEntryPoint) {
+  boot_data_t boot_data{};
+  boot_data.min_security_version_bl0 = 1;
+
+  manifest_t manifest{};
+  manifest.identifier = CHIP_BL0_IDENTIFIER;
+  manifest.length = sizeof(manifest_t) + 0x1000;
+  manifest.security_version = 1;
+  manifest.manifest_version.major = kManifestVersionMajor2;
+  manifest.signed_region_end = sizeof(manifest_t) + 0x900;
+  manifest.code_start = sizeof(manifest_t);
+  manifest.code_end = sizeof(manifest_t) + 0x800;
+  manifest.entry_point = manifest.code_start - 1;
+
+  EXPECT_EQ(rom_ext_boot_policy_manifest_check(&manifest, &boot_data),
+            kErrorManifestBadEntryPoint);
+}
+
 struct ManifestOrderTestCase {
   uint32_t primary;
 };
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.c b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.c
new file mode 100644
index 0000000000000..97d62bf6a626b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.c
@@ -0,0 +1,185 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h"
+
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_unlock.h"
+#include "sw/device/silicon_creator/lib/rescue/rescue.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_policy_ptrs.h"
+
+OT_WARN_UNUSED_RESULT
+static rom_error_t boot_svc_next_boot_bl0_slot_handler(
+    boot_svc_msg_t *boot_svc_msg, boot_data_t *boot_data, boot_log_t *boot_log,
+    lifecycle_state_t lc_state) {
+  uint32_t active_slot = boot_data->primary_bl0_slot;
+  uint32_t primary_slot = boot_svc_msg->next_boot_bl0_slot_req.primary_bl0_slot;
+  rom_error_t error = kErrorOk;
+
+  // If the requested primary slot is the same as the active slot, this request
+  // is a no-op.
+  if (active_slot != primary_slot) {
+    switch (primary_slot) {
+      case kBootSlotA:
+      case kBootSlotB:
+        boot_data->primary_bl0_slot = primary_slot;
+        // Write boot data, updating relevant fields and recomputing the digest.
+        HARDENED_RETURN_IF_ERROR(boot_data_write(boot_data));
+        // Read the boot data back to ensure the correct slot is booted this
+        // time.
+        HARDENED_RETURN_IF_ERROR(boot_data_read(lc_state, boot_data));
+        // Update the boot log.
+        boot_log->primary_bl0_slot = boot_data->primary_bl0_slot;
+        break;
+      case kBootSlotUnspecified:
+        // Do nothing.
+        break;
+      default:
+        error = kErrorBootSvcBadSlot;
+    }
+  }
+
+  // Record the new primary slot for use in the response message.
+  active_slot = boot_data->primary_bl0_slot;
+
+  uint32_t next_slot = boot_svc_msg->next_boot_bl0_slot_req.next_bl0_slot;
+  switch (launder32(next_slot)) {
+    case kBootSlotA:
+    case kBootSlotB:
+      // We overwrite the RAM copy of the primary slot to the requested next
+      // slot. This will cause a one-time boot of the requested side.
+      boot_data->primary_bl0_slot = next_slot;
+      break;
+    case kBootSlotUnspecified:
+      // Do nothing.
+      break;
+    default:
+      error = kErrorBootSvcBadSlot;
+  }
+
+  boot_svc_next_boot_bl0_slot_res_init(error, active_slot,
+                                       &boot_svc_msg->next_boot_bl0_slot_res);
+  // We always return OK here because we've logged any error status in the boot
+  // services response message and we want the boot flow to continue.
+  return kErrorOk;
+}
+
+OT_WARN_UNUSED_RESULT
+static rom_error_t boot_svc_min_sec_ver_handler(
+    boot_svc_msg_t *boot_svc_msg, boot_data_t *boot_data,
+    lifecycle_state_t lc_state, owner_application_keyring_t *keyring,
+    size_t *verify_key, owner_config_t *owner_config,
+    uint32_t *isfb_check_count) {
+  const uint32_t current_min_sec_ver = boot_data->min_security_version_bl0;
+  const uint32_t requested_min_sec_ver =
+      boot_svc_msg->min_bl0_sec_ver_req.min_bl0_sec_ver;
+
+  // Ensure the requested minimum security version isn't lower than the current
+  // minimum security version.
+  if (launder32(requested_min_sec_ver) > current_min_sec_ver) {
+    HARDENED_CHECK_GT(requested_min_sec_ver, current_min_sec_ver);
+    uint32_t slot_a_max_sec_ver = UINT32_MAX;
+    uint32_t slot_b_max_sec_ver = UINT32_MAX;
+
+    // Check the two flash slots for valid manifests and determine the maximum
+    // value of the new minimum_security_version.  This prevents a malicious
+    // MinBl0SecVer request from making the chip un-bootable.
+    const manifest_t *manifest = rom_ext_boot_policy_manifest_a_get();
+    uint32_t flash_exec = 0;
+    rom_error_t error =
+        rom_ext_verify(manifest, boot_data, &flash_exec, keyring, verify_key,
+                       owner_config, isfb_check_count);
+    if (error == kErrorOk) {
+      slot_a_max_sec_ver = manifest->security_version;
+    }
+    manifest = rom_ext_boot_policy_manifest_b_get();
+    error = rom_ext_verify(manifest, boot_data, &flash_exec, keyring,
+                           verify_key, owner_config, isfb_check_count);
+    if (error == kErrorOk) {
+      slot_b_max_sec_ver = manifest->security_version;
+    }
+
+    uint32_t max_sec_ver = MIN(slot_a_max_sec_ver, slot_b_max_sec_ver);
+
+    if (requested_min_sec_ver <= max_sec_ver && max_sec_ver != UINT32_MAX) {
+      HARDENED_CHECK_LE(requested_min_sec_ver, max_sec_ver);
+      HARDENED_CHECK_NE(max_sec_ver, UINT32_MAX);
+      // Update boot data to the requested minimum BL0 security version.
+      boot_data->min_security_version_bl0 = requested_min_sec_ver;
+
+      // Write boot data, updating relevant fields and recomputing the digest.
+      HARDENED_RETURN_IF_ERROR(boot_data_write(boot_data));
+      // Read the boot data back to ensure the correct policy is used this boot.
+      HARDENED_RETURN_IF_ERROR(boot_data_read(lc_state, boot_data));
+
+      boot_svc_min_bl0_sec_ver_res_init(boot_data->min_security_version_bl0,
+                                        kErrorOk,
+                                        &boot_svc_msg->min_bl0_sec_ver_res);
+
+      HARDENED_CHECK_EQ(requested_min_sec_ver,
+                        boot_data->min_security_version_bl0);
+      return kErrorOk;
+    }
+  }
+  boot_svc_min_bl0_sec_ver_res_init(current_min_sec_ver, kErrorBootSvcBadSecVer,
+                                    &boot_svc_msg->min_bl0_sec_ver_res);
+  return kErrorOk;
+}
+
+OT_WARN_UNUSED_RESULT
+rom_error_t boot_svc_handler(boot_svc_msg_t *boot_svc_msg,
+                             boot_data_t *boot_data, boot_log_t *boot_log,
+                             lifecycle_state_t lc_state,
+                             owner_application_keyring_t *keyring,
+                             size_t *verify_key, owner_config_t *owner_config,
+                             uint32_t *isfb_check_count) {
+  // TODO(lowRISC#22387): Examine the boot_svc code paths for boot loops.
+  if (boot_svc_msg->header.identifier == kBootSvcIdentifier) {
+    HARDENED_RETURN_IF_ERROR(boot_svc_header_check(&boot_svc_msg->header));
+    uint32_t msg_type = boot_svc_msg->header.type;
+    switch (launder32(msg_type)) {
+      case kBootSvcEmptyReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcEmptyReqType);
+        boot_svc_empty_res_init(&boot_svc_msg->empty);
+        break;
+      case kBootSvcEnterRescueReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcEnterRescueReqType);
+        return rescue_enter_handler(boot_svc_msg);
+      case kBootSvcNextBl0SlotReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcNextBl0SlotReqType);
+        return boot_svc_next_boot_bl0_slot_handler(boot_svc_msg, boot_data,
+                                                   boot_log, lc_state);
+      case kBootSvcMinBl0SecVerReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcMinBl0SecVerReqType);
+        return boot_svc_min_sec_ver_handler(boot_svc_msg, boot_data, lc_state,
+                                            keyring, verify_key, owner_config,
+                                            isfb_check_count);
+      case kBootSvcOwnershipUnlockReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcOwnershipUnlockReqType);
+        return ownership_unlock_handler(boot_svc_msg, boot_data);
+      case kBootSvcOwnershipActivateReqType:
+        HARDENED_CHECK_EQ(msg_type, kBootSvcOwnershipActivateReqType);
+        return ownership_activate_handler(boot_svc_msg, boot_data);
+      case kBootSvcEmptyResType:
+      case kBootSvcEnterRescueResType:
+      case kBootSvcNextBl0SlotResType:
+      case kBootSvcMinBl0SecVerResType:
+      case kBootSvcOwnershipUnlockResType:
+      case kBootSvcOwnershipActivateResType:
+        // For response messages left in ret-ram we do nothing.
+        break;
+      default:
+          // For messages with an unknown msg_type, we do nothing.
+          ;
+    }
+  }
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h
new file mode 100644
index 0000000000000..e02d13c04f369
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_BOOT_SERVICES_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_BOOT_SERVICES_H_
+
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/boot_log.h"
+#include "sw/device/silicon_creator/lib/boot_svc/boot_svc_msg.h"
+#include "sw/device/silicon_creator/lib/drivers/lifecycle.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_verify.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+OT_WARN_UNUSED_RESULT
+rom_error_t boot_svc_handler(boot_svc_msg_t *boot_svc_msg,
+                             boot_data_t *boot_data, boot_log_t *boot_log,
+                             lifecycle_state_t lc_state,
+                             owner_application_keyring_t *keyring,
+                             size_t *verify_key, owner_config_t *owner_config,
+                             uint32_t *isfb_check_count);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_BOOT_SERVICES_H_
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_boot_services_unittest.cc b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services_unittest.cc
new file mode 100644
index 0000000000000..6d3e733e489a1
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_boot_services_unittest.cc
@@ -0,0 +1,606 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_services.h"
+
+#include "gtest/gtest.h"
+#include "sw/device/silicon_creator/lib/boot_svc/mock_boot_svc_header.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_otp.h"
+#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
+#include "sw/device/silicon_creator/lib/mock_boot_data.h"
+#include "sw/device/silicon_creator/lib/mock_manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/mock_owner_verify.h"
+#include "sw/device/silicon_creator/lib/ownership/mock_ownership_key.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_activate.h"
+#include "sw/device/silicon_creator/lib/sigverify/flash_exec.h"
+#include "sw/device/silicon_creator/rom_ext/mock_rom_ext_boot_policy_ptrs.h"
+#include "sw/device/silicon_creator/testing/rom_test.h"
+
+namespace boot_services_unittest {
+namespace {
+using ::testing::_;
+using ::testing::AnyNumber;
+using ::testing::DoAll;
+using ::testing::Each;
+using ::testing::Return;
+using ::testing::SetArgPointee;
+
+constexpr uint32_t kActivate =
+    static_cast<uint32_t>(kBootSvcOwnershipActivateReqType);
+
+constexpr uint32_t kUnlock =
+    static_cast<uint32_t>(kBootSvcOwnershipUnlockReqType);
+
+class RomExtBootServicesTest : public rom_test::RomTest {
+ protected:
+  boot_svc_msg_t boot_svc_msg{};
+  boot_data_t boot_data{};
+  boot_log_t boot_log{};
+  lifecycle_state_t lc_state{};
+  owner_application_keyring_t keyring{};
+  size_t verify_key;
+  owner_config_t owner_config{};
+  uint32_t isfb_check_count;
+
+  rom_test::MockHmac mock_hmac_;
+  rom_test::MockRomExtBootPolicyPtrs rom_ext_boot_policy_ptrs_;
+  rom_test::MockManifest mock_manifest_;
+  rom_test::MockBootData mock_boot_data_;
+  rom_test::MockRnd mock_rnd_;
+  rom_test::MockLifecycle mock_lifecycle_;
+  rom_test::MockOtp mock_otp_;
+  rom_test::MockFlashCtrl mock_flash_ctrl_;
+  rom_test::MockOwnerVerify mock_owner_verify_;
+  rom_test::MockOwnershipKey mock_ownership_key_;
+  rom_test::MockBootSvcHeader boot_svc_header_;
+
+  void MakePage1StructValid() {
+    owner_page[1].header.tag = kTlvTagOwner;
+    owner_page[1].header.length = sizeof(owner_page[1]);
+    owner_page[1].header.version = (struct_version_t){0, 0};
+    owner_page[1].config_version = 0;
+    owner_page[1].min_security_version_bl0 = UINT32_MAX;
+    owner_page[1].lock_constraint = 0;
+    memset(owner_page[1].device_id, 0x7e, sizeof(owner_page[1].device_id));
+    memset(owner_page[1].data, 0x5a, sizeof(owner_page[1].data));
+  }
+
+  void MakePage1Valid(bool valid) {
+    MakePage1StructValid();
+    ownership_state_t state =
+        static_cast<ownership_state_t>(boot_data.ownership_state);
+    owner_page_valid[1] = kOwnerPageStatusSigned;
+    uint32_t modifier = valid ? 0 : 1;
+
+    switch (state) {
+      case kOwnershipStateUnlockedEndorsed:
+        // In UnlockedEndorsed, the hash of the owner key in page1 must be equal
+        // to the value stored in boot_data.
+      case kOwnershipStateUnlockedSelf:
+
+        owner_page[1].owner_key = owner_page[0].owner_key;
+        owner_page[1].owner_key.raw[0] += modifier;
+        break;
+      case kOwnershipStateUnlockedAny:
+        // In UnlockedAny, there are no conditions that page1 must meet.
+        break;
+      case kOwnershipStateLockedOwner:
+        owner_page_valid[1] = kOwnerPageStatusSealed;
+        break;
+      case kOwnershipStateRecovery:
+        owner_page_valid[1] = kOwnerPageStatusInvalid;
+        break;
+    }
+  }
+};
+
+TEST_F(RomExtBootServicesTest, BootSvcDefault) {
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.header.type, 0);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcEmpty) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcEmptyReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_empty_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.empty.header.identifier, kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.empty.header.type, kBootSvcEmptyResType);
+
+  EXPECT_THAT(boot_svc_msg.empty.payload, Each(0));
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcEnterRescue) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcEnterRescueReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_enter_rescue_req_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.enter_rescue_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.enter_rescue_res.header.type,
+            kBootSvcEnterRescueResType);
+
+  EXPECT_EQ(boot_svc_msg.enter_rescue_res.status, kErrorOk);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcNextBl0Slot) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcNextBl0SlotReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_next_boot_bl0_slot_req_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  boot_svc_msg.next_boot_bl0_slot_req.primary_bl0_slot = kBootSlotA;
+
+  boot_svc_msg.next_boot_bl0_slot_req.next_bl0_slot = kBootSlotB;
+
+  boot_data.primary_bl0_slot = kBootSlotB;
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(mock_boot_data_, Write).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_boot_data_, Read).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.next_boot_bl0_slot_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.next_boot_bl0_slot_res.header.type,
+            kBootSvcNextBl0SlotResType);
+
+  EXPECT_EQ(boot_svc_msg.next_boot_bl0_slot_res.status, kErrorOk);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcMinBl0SecVerValid) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcMinBl0SecVerReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_min_bl0_sec_ver_req_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  boot_svc_msg.min_bl0_sec_ver_req.min_bl0_sec_ver = 2;
+
+  boot_data.min_security_version_bl0 = 1;
+
+  owner_config.isfb = (owner_isfb_config_t *)kHardenedBoolFalse;
+
+  owner_application_key_t key = {
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = sizeof(owner_application_key_t),
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+  };
+
+  keyring.length = 1;
+  keyring.key[0] = &key;
+
+  manifest_t manifest_a{};
+  manifest_t manifest_b{};
+
+  manifest_a.identifier = CHIP_BL0_IDENTIFIER;
+  manifest_a.length = CHIP_BL0_SIZE_MIN;
+  manifest_a.security_version = 2;
+  manifest_a.manifest_version.major = kManifestVersionMajor2;
+  manifest_a.length = sizeof(manifest_t) + 0x1000;
+  manifest_a.signed_region_end = sizeof(manifest_t) + 0x900;
+  manifest_a.code_start = sizeof(manifest_t);
+  manifest_a.code_end = sizeof(manifest_t) + 0x800;
+  manifest_a.entry_point = 0x500;
+  manifest_a.ecdsa_public_key.x[0] = 0;
+
+  manifest_b.identifier = CHIP_BL0_IDENTIFIER;
+  manifest_b.length = CHIP_BL0_SIZE_MIN;
+  manifest_b.security_version = 3;
+  manifest_b.manifest_version.major = kManifestVersionMajor2;
+  manifest_b.length = sizeof(manifest_t) + 0x1000;
+  manifest_b.signed_region_end = sizeof(manifest_t) + 0x900;
+  manifest_b.code_start = sizeof(manifest_t);
+  manifest_b.code_end = sizeof(manifest_t) + 0x800;
+  manifest_b.entry_point = 0x500;
+  manifest_b.ecdsa_public_key.x[0] = 0;
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(rom_ext_boot_policy_ptrs_, ManifestA)
+      .WillOnce(Return(&manifest_a));
+  EXPECT_CALL(mock_manifest_, SpxKey)
+      .WillOnce(Return(kErrorManifestBadExtension));
+  EXPECT_CALL(mock_manifest_, SpxSignature)
+      .WillOnce(Return(kErrorManifestBadExtension));
+
+  EXPECT_CALL(mock_rnd_, Uint32);
+  EXPECT_CALL(mock_hmac_, sha256_init);
+  EXPECT_CALL(mock_lifecycle_, DeviceId);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_lifecycle_, State);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_manifest_, DigestRegion);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_hmac_, sha256_process);
+  EXPECT_CALL(mock_hmac_, sha256_final);
+
+  EXPECT_CALL(mock_owner_verify_, verify).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(rom_ext_boot_policy_ptrs_, ManifestB)
+      .WillOnce(Return(&manifest_b));
+  EXPECT_CALL(mock_manifest_, SpxKey)
+      .WillOnce(Return(kErrorManifestBadExtension));
+  EXPECT_CALL(mock_manifest_, SpxSignature)
+      .WillOnce(Return(kErrorManifestBadExtension));
+
+  EXPECT_CALL(mock_rnd_, Uint32);
+  EXPECT_CALL(mock_hmac_, sha256_init);
+  EXPECT_CALL(mock_lifecycle_, DeviceId);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_lifecycle_, State);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_manifest_, DigestRegion);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_hmac_, sha256_process);
+  EXPECT_CALL(mock_hmac_, sha256_final);
+
+  EXPECT_CALL(mock_owner_verify_, verify).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_boot_data_, Write).WillOnce(Return(kErrorOk));
+  EXPECT_CALL(mock_boot_data_, Read).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.type,
+            kBootSvcMinBl0SecVerResType);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.status, kErrorOk);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcMinBl0SecVerInvalidLow) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcMinBl0SecVerReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_min_bl0_sec_ver_req_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  boot_svc_msg.min_bl0_sec_ver_req.min_bl0_sec_ver = 0;
+
+  boot_data.min_security_version_bl0 = 1;
+
+  owner_config.isfb = (owner_isfb_config_t *)kHardenedBoolFalse;
+
+  owner_application_key_t key = {
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = sizeof(owner_application_key_t),
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+  };
+
+  keyring.length = 1;
+  keyring.key[0] = &key;
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.type,
+            kBootSvcMinBl0SecVerResType);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.status, kErrorBootSvcBadSecVer);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcMinBl0SecVerInvalidHigh) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcMinBl0SecVerReqType;
+  boot_svc_msg.header.length = sizeof(boot_svc_min_bl0_sec_ver_req_t);
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+
+  boot_svc_msg.min_bl0_sec_ver_req.min_bl0_sec_ver = 3;
+
+  boot_data.min_security_version_bl0 = 1;
+
+  owner_config.isfb = (owner_isfb_config_t *)kHardenedBoolFalse;
+
+  owner_application_key_t key = {
+      .header =
+          {
+              .tag = kTlvTagApplicationKey,
+              .length = sizeof(owner_application_key_t),
+          },
+      .key_alg = kOwnershipKeyAlgEcdsaP256,
+  };
+
+  keyring.length = 1;
+  keyring.key[0] = &key;
+
+  manifest_t manifest_a{};
+  manifest_t manifest_b{};
+
+  manifest_a.identifier = CHIP_BL0_IDENTIFIER;
+  manifest_a.length = CHIP_BL0_SIZE_MIN;
+  manifest_a.security_version = 2;
+  manifest_a.manifest_version.major = kManifestVersionMajor2;
+  manifest_a.length = sizeof(manifest_t) + 0x1000;
+  manifest_a.signed_region_end = sizeof(manifest_t) + 0x900;
+  manifest_a.code_start = sizeof(manifest_t);
+  manifest_a.code_end = sizeof(manifest_t) + 0x800;
+  manifest_a.entry_point = 0x500;
+  manifest_a.ecdsa_public_key.x[0] = 0;
+
+  manifest_b.identifier = CHIP_BL0_IDENTIFIER;
+  manifest_b.length = CHIP_BL0_SIZE_MIN;
+  manifest_b.security_version = 3;
+  manifest_b.manifest_version.major = kManifestVersionMajor2;
+  manifest_b.length = sizeof(manifest_t) + 0x1000;
+  manifest_b.signed_region_end = sizeof(manifest_t) + 0x900;
+  manifest_b.code_start = sizeof(manifest_t);
+  manifest_b.code_end = sizeof(manifest_t) + 0x800;
+  manifest_b.entry_point = 0x500;
+  manifest_b.ecdsa_public_key.x[0] = 0;
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(rom_ext_boot_policy_ptrs_, ManifestA)
+      .WillOnce(Return(&manifest_a));
+  EXPECT_CALL(mock_manifest_, SpxKey)
+      .WillOnce(Return(kErrorManifestBadExtension));
+  EXPECT_CALL(mock_manifest_, SpxSignature)
+      .WillOnce(Return(kErrorManifestBadExtension));
+
+  EXPECT_CALL(mock_rnd_, Uint32);
+  EXPECT_CALL(mock_hmac_, sha256_init);
+  EXPECT_CALL(mock_lifecycle_, DeviceId);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_lifecycle_, State);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_manifest_, DigestRegion);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_hmac_, sha256_process);
+  EXPECT_CALL(mock_hmac_, sha256_final);
+
+  EXPECT_CALL(mock_owner_verify_, verify).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(rom_ext_boot_policy_ptrs_, ManifestB)
+      .WillOnce(Return(&manifest_b));
+  EXPECT_CALL(mock_manifest_, SpxKey)
+      .WillOnce(Return(kErrorManifestBadExtension));
+  EXPECT_CALL(mock_manifest_, SpxSignature)
+      .WillOnce(Return(kErrorManifestBadExtension));
+
+  EXPECT_CALL(mock_rnd_, Uint32);
+  EXPECT_CALL(mock_hmac_, sha256_init);
+  EXPECT_CALL(mock_lifecycle_, DeviceId);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_otp_, read32);
+  EXPECT_CALL(mock_lifecycle_, State);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_manifest_, DigestRegion);
+  EXPECT_CALL(mock_hmac_, sha256_update);
+  EXPECT_CALL(mock_hmac_, sha256_process);
+  EXPECT_CALL(mock_hmac_, sha256_final);
+
+  EXPECT_CALL(mock_owner_verify_, verify).WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorOk);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.header.type,
+            kBootSvcMinBl0SecVerResType);
+
+  EXPECT_EQ(boot_svc_msg.min_bl0_sec_ver_res.status, kErrorBootSvcBadSecVer);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcOwnershipUnlock) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcOwnershipUnlockReqType;
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+  boot_svc_msg.header.length = sizeof(boot_svc_ownership_unlock_req_t);
+
+  boot_svc_msg.ownership_unlock_req.din[0] = 0xdead;
+  boot_svc_msg.ownership_unlock_req.din[1] = 0xbeef;
+  boot_svc_msg.ownership_unlock_req.unlock_mode = kBootSvcUnlockAbort;
+
+  boot_data.ownership_state = kOwnershipStateUnlockedAny;
+  boot_data.nonce = {0x55555555, 0xAAAAAAAA};
+  boot_svc_msg.ownership_unlock_req.nonce = boot_data.nonce;
+  boot_svc_msg.ownership_unlock_req.signature = {{100, 101, 102, 103, 104, 105,
+                                                  106, 107, 108, 109, 110, 111,
+                                                  112, 113, 114, 115}};
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_CALL(mock_ownership_key_,
+              validate(0, static_cast<ownership_key_t>(kOwnershipKeyUnlock),
+                       kUnlock, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+  EXPECT_CALL(mock_lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){
+          0,
+          boot_svc_msg.ownership_unlock_req.din[0],
+          boot_svc_msg.ownership_unlock_req.din[1],
+      }));
+
+  EXPECT_CALL(mock_rnd_, Uint32()).WillRepeatedly(Return(5));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0x1234}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorWriteBootdataThenReboot);
+
+  EXPECT_EQ(boot_svc_msg.ownership_unlock_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.ownership_unlock_res.header.type,
+            kBootSvcOwnershipUnlockResType);
+
+  EXPECT_EQ(boot_svc_msg.ownership_unlock_res.status, kErrorOk);
+}
+
+TEST_F(RomExtBootServicesTest, BootSvcOwnershipActivate) {
+  boot_svc_msg.header.identifier = kBootSvcIdentifier;
+  boot_svc_msg.header.type = kBootSvcOwnershipActivateReqType;
+  boot_svc_msg.header.digest = hmac_digest_t{0x1234};
+  boot_svc_msg.header.length = sizeof(boot_svc_ownership_activate_req_t);
+
+  boot_svc_msg.ownership_activate_req.din[0] = 0xdead;
+  boot_svc_msg.ownership_activate_req.din[1] = 0xbeef;
+  boot_svc_msg.ownership_activate_req.erase_previous = 1;
+  boot_svc_msg.ownership_activate_req.primary_bl0_slot = 0;
+  boot_svc_msg.ownership_activate_req.nonce = {0x55555555, 0xAAAAAAAA};
+  boot_svc_msg.ownership_activate_req.signature = {
+      {100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113,
+       114, 115}};
+
+  boot_data.ownership_state = kOwnershipStateUnlockedEndorsed;
+  boot_data.nonce = {0x55555555, 0xAAAAAAAA};
+
+  owner_page[0].owner_key = {{1}};
+  memset(boot_data.next_owner, 0, sizeof(boot_data.next_owner));
+  boot_data.next_owner[0] = 0x5678;
+
+  MakePage1Valid(true);
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(
+          hmac_digest_t{boot_svc_msg.header.digest.digest[0]}));
+
+  // In UnlockedEndorsed, the hash of the owner key in page1 must be equal
+  // to the value stored in boot_data.
+  EXPECT_CALL(mock_hmac_, sha256_init());
+  EXPECT_CALL(mock_hmac_, sha256_update(_, _));
+  EXPECT_CALL(mock_hmac_, sha256_update(_, _));
+  EXPECT_CALL(mock_hmac_, sha256_process());
+  EXPECT_CALL(mock_hmac_, sha256_final(_))
+      .WillOnce(SetArgPointee<0>((hmac_digest_t){{boot_data.next_owner[0]}}));
+
+  EXPECT_CALL(mock_ownership_key_,
+              validate(1, kOwnershipKeyActivate, kActivate, _, _, _, _, _))
+      .WillOnce(DoAll(SetArgPointee<7>(kSigverifyFlashExec), Return(kErrorOk)));
+
+  EXPECT_CALL(mock_lifecycle_, DeviceId(_))
+      .WillOnce(SetArgPointee<0>((lifecycle_device_id_t){
+          0,
+          boot_svc_msg.ownership_activate_req.din[0],
+          boot_svc_msg.ownership_activate_req.din[1],
+      }));
+
+  // Once the new owner page is determined to be valid, the page will be sealed.
+  EXPECT_CALL(mock_ownership_key_, seal_page(1));
+
+  // The sealed page will be written into flash owner slot 1 first.
+  EXPECT_CALL(mock_flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot1, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(
+      mock_flash_ctrl_,
+      InfoWrite(&kFlashCtrlInfoPageOwnerSlot1, 0,
+                sizeof(owner_page[1]) / sizeof(uint32_t), &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(mock_flash_ctrl_,
+              InfoErase(&kFlashCtrlInfoPageOwnerSlot0, kFlashCtrlEraseTypePage))
+      .WillOnce(Return(kErrorOk));
+
+  EXPECT_CALL(
+      mock_flash_ctrl_,
+      InfoWrite(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                sizeof(owner_page[1]) / sizeof(uint32_t), &owner_page[1]))
+      .WillOnce(Return(kErrorOk));
+
+  if (boot_data.ownership_state != kOwnershipStateUnlockedSelf) {
+    EXPECT_CALL(mock_ownership_key_, secret_new(_, _))
+        .WillOnce(Return(kErrorOk));
+  }
+
+  EXPECT_CALL(mock_rnd_, Uint32()).WillRepeatedly(Return(99));
+
+  EXPECT_CALL(mock_hmac_, sha256)
+      .WillOnce(SetArgPointee<2>(hmac_digest_t{0xdeadbeef}));
+
+  EXPECT_EQ(
+      boot_svc_handler(&boot_svc_msg, &boot_data, &boot_log, lc_state, &keyring,
+                       &verify_key, &owner_config, &isfb_check_count),
+      kErrorWriteBootdataThenReboot);
+
+  EXPECT_EQ(boot_svc_msg.ownership_activate_res.header.identifier,
+            kBootSvcIdentifier);
+  EXPECT_EQ(boot_svc_msg.ownership_activate_res.header.type,
+            kBootSvcOwnershipActivateResType);
+
+  EXPECT_EQ(boot_svc_msg.ownership_activate_res.status, kErrorOk);
+}
+
+}  // namespace
+}  // namespace boot_services_unittest
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_common.ld b/sw/device/silicon_creator/rom_ext/rom_ext_common.ld
index 1e3485a61cd90..0b904b8c782b1 100644
--- a/sw/device/silicon_creator/rom_ext/rom_ext_common.ld
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_common.ld
@@ -56,6 +56,7 @@ _manifest_address_translation = (_text_start >= ORIGIN(eflash) &&
                                  _text_start < (ORIGIN(eflash)
                                               + LENGTH(eflash))) ? 0x1d4 : 0x739;
 
+REGION_ALIAS("coverage_flash", rom_ext_flash);
 
 /**
  * NOTE: We have to align each section to word boundaries as our current
@@ -77,9 +78,9 @@ SECTIONS {
     _text_start = .;
     _rom_ext_immutable_start = .;
     KEEP(*(.rom_ext_immutable))
-    /* Ensure section end is word-aligned. */
-    . = ALIGN(256);
     _rom_ext_immutable_end = .;
+
+    _rom_ext_immutable_size = SIZEOF(.rom_ext_immutable);
   } > rom_ext_flash
 
   /**
@@ -110,6 +111,20 @@ SECTIONS {
     . = ALIGN(4);
   } > rom_ext_flash
 
+  /**
+   * ROM_EXT ISRs text section, containing the exception handler entry/exit logic
+   * used for handling load access faults due to flash ECC errors during boot.
+   *
+   * This is placed next to the ".shutdown" section.
+   */
+  .isrs : ALIGN(4) {
+    *(.isrs)
+    *(.isrs.*)
+
+    /* Ensure section end is word-aligned. */
+    . = ALIGN(4);
+  } > rom_ext_flash
+
   /**
    * Shutdown text section, containing shutdown function(s).
    *
@@ -137,12 +152,20 @@ SECTIONS {
     *(.rodata.*)
   } > rom_ext_flash
 
+  INCLUDE sw/device/lib/coverage/rodata.ld
+
   /**
    * Critical static data that is accessible by both the ROM and the ROM
    * extension.
    */
   INCLUDE sw/device/silicon_creator/lib/base/static_critical.ld
 
+  /**
+   * Critical static data that is accessible by both the immutable and
+   * mutable ROM extension.
+   */
+  INCLUDE sw/device/silicon_creator/lib/base/static_dice.ld
+
   /**
    * Mutable data section, at the bottom of ram_main. This will be initialized
    * from flash at runtime by the CRT.
@@ -205,5 +228,7 @@ SECTIONS {
     _bss_end = .;
   } > ram_main
 
+  INCLUDE sw/device/lib/coverage/bss.ld
+
   INCLUDE sw/device/info_sections.ld
 }
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_epmp.c b/sw/device/silicon_creator/rom_ext/rom_ext_epmp.c
deleted file mode 100644
index 4cc34f6e198b4..0000000000000
--- a/sw/device/silicon_creator/rom_ext/rom_ext_epmp.c
+++ /dev/null
@@ -1,82 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/silicon_creator/rom_ext/rom_ext_epmp.h"
-
-#include "sw/device/lib/base/bitfield.h"
-#include "sw/device/lib/base/csr.h"
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/epmp_state.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-#define EPMP_SET(cfg_reg, addr_reg, mask, cfg, addr) \
-  CSR_CLEAR_BITS(CSR_REG_PMPCFG##cfg_reg, mask);     \
-  CSR_WRITE(CSR_REG_PMPADDR##addr_reg, pmpaddr);     \
-  CSR_SET_BITS(CSR_REG_PMPCFG##cfg_reg, cfg);
-
-static void rom_ext_epmp_set(uint8_t entry, uint32_t pmpcfg, uint32_t pmpaddr) {
-  uint32_t shift = 8 * (entry % 4);
-  uint32_t mask = 0xFFu << shift;
-  uint32_t cfg = (pmpcfg & 0xFFu) << shift;
-  HARDENED_CHECK_LT(entry, 16);
-  switch (entry) {
-    // clang-format off
-    case  0: EPMP_SET(0,  0, mask, cfg, pmpaddr); break;
-    case  1: EPMP_SET(0,  1, mask, cfg, pmpaddr); break;
-    case  2: EPMP_SET(0,  2, mask, cfg, pmpaddr); break;
-    case  3: EPMP_SET(0,  3, mask, cfg, pmpaddr); break;
-    case  4: EPMP_SET(1,  4, mask, cfg, pmpaddr); break;
-    case  5: EPMP_SET(1,  5, mask, cfg, pmpaddr); break;
-    case  6: EPMP_SET(1,  6, mask, cfg, pmpaddr); break;
-    case  7: EPMP_SET(1,  7, mask, cfg, pmpaddr); break;
-    case  8: EPMP_SET(2,  8, mask, cfg, pmpaddr); break;
-    case  9: EPMP_SET(2,  9, mask, cfg, pmpaddr); break;
-    case 10: EPMP_SET(2, 10, mask, cfg, pmpaddr); break;
-    case 11: EPMP_SET(2, 11, mask, cfg, pmpaddr); break;
-    case 12: EPMP_SET(3, 12, mask, cfg, pmpaddr); break;
-    case 13: EPMP_SET(3, 13, mask, cfg, pmpaddr); break;
-    case 14: EPMP_SET(3, 14, mask, cfg, pmpaddr); break;
-    case 15: EPMP_SET(3, 15, mask, cfg, pmpaddr); break;
-    // clang-format on
-    default:
-      // should be impossible to get here because of HARDENED_CHECK_LT above.
-      HARDENED_TRAP();
-  }
-  uint32_t cfgent = entry / 4;
-  epmp_state.pmpcfg[cfgent] = (epmp_state.pmpcfg[cfgent] & ~mask) | cfg;
-  epmp_state.pmpaddr[entry] = pmpaddr;
-}
-
-void rom_ext_epmp_clear(uint8_t entry) {
-  rom_ext_epmp_set(entry, kEpmpModeOff, 0);
-}
-
-void rom_ext_epmp_set_napot(uint8_t entry, epmp_region_t region,
-                            epmp_perm_t perm) {
-  uint32_t length = region.end - region.start;
-  // The length must be 4 or more.
-  HARDENED_CHECK_GE(length, 4);
-  // The length must be a power of 2.
-  HARDENED_CHECK_EQ(bitfield_popcount32(length), 1);
-  // The start address must be naturally aligned with length.
-  HARDENED_CHECK_EQ(region.start & (length - 1), 0);
-  epmp_mode_t mode = length == 4 ? kEpmpModeNa4 : kEpmpModeNapot;
-  uint32_t addr = (region.start >> 2) | ((length - 1) >> 3);
-  rom_ext_epmp_set(entry, (uint32_t)mode | (uint32_t)perm, addr);
-}
-
-void rom_ext_epmp_set_tor(uint8_t entry, epmp_region_t region,
-                          epmp_perm_t perm) {
-  uint32_t start = region.start >> 2;
-  uint32_t end = ((region.end + 3u) & ~3u) >> 2;
-  rom_ext_epmp_set(entry, kEpmpModeOff, start);
-  rom_ext_epmp_set(entry + 1, (uint32_t)kEpmpModeTor | (uint32_t)perm, end);
-}
-
-void rom_ext_epmp_clear_rlb(void) {
-  const uint32_t kMask = EPMP_MSECCFG_RLB;
-  epmp_state.mseccfg &= ~kMask;
-  CSR_CLEAR_BITS(CSR_REG_MSECCFG, kMask);
-}
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_epmp.h b/sw/device/silicon_creator/rom_ext/rom_ext_epmp.h
deleted file mode 100644
index f68f68aecefaf..0000000000000
--- a/sw/device/silicon_creator/rom_ext/rom_ext_epmp.h
+++ /dev/null
@@ -1,90 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_EPMP_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_EPMP_H_
-
-#include <stdint.h>
-
-#include "sw/device/silicon_creator/lib/epmp_state.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-/**
- * ROM_EXT ROM enhanced Physical Memory Protection (ePMP) library.
- *
- * The ePMP configuration is managed in two parts:
- *
- *   1. The actual hardware configuration held in CSRs
- *   2. The in-memory copy of register values in `epmp_state_t` that is used
- *      to verify the CSRs
- *
- * Every time the hardware configuration is updated the in-memory copy
- * must also be updated. The hardware configuration is usually interacted
- * with directly using the CSR library or assembly whereas the in-memory
- * copy of the state should normally be modified using configuration functions
- * from the silicon creator ePMP library.
- *
- * This separation of concerns allows the hardware configuration to be
- * updated efficiently as needed (including before the C runtime is
- * initialized) with the in-memory copy of the state used to double check the
- * configuration as required.
- */
-// TODO(lowrisc/opentitan#8800): Implement ePMP initialization for ROM_EXT
-// stage.
-
-/**
- * Clear an ePMP entry.
- *
- * Sets the PMPADDR and PMPCFG entries to zero.
- *
- * @param entry The ePMP entry to clear.
- */
-void rom_ext_epmp_clear(uint8_t entry);
-
-/**
- * Configures an ePMP entry for a NAPOT or NA4 region.
- *
- * The region start must have an alignment consistend with the region size.  The
- * region size must be a power of two.  If either of these conditions is not
- * met, this function will fault.
- *
- * From a configuration perspective, an NA4 region is just a special case of a
- * NAPOT region.
- *
- * @param entry The ePMP entry to configure.
- * @param region The address region to configure.
- * @param perm The ePMP permissions for the region.
- */
-void rom_ext_epmp_set_napot(uint8_t entry, epmp_region_t region,
-                            epmp_perm_t perm);
-
-/**
- * Configures an ePMP entry for a TOR region.
- *
- * The region start and end may be abitrary addresses.  The start will be
- * rounded down to a 4-byte address.  The end will be rounded up to a 4-byte
- * address.
- *
- * @param entry The ePMP entry to configure.
- * @param region The address region to configure.
- * @param perm The ePMP permissions for the region.
- */
-void rom_ext_epmp_set_tor(uint8_t entry, epmp_region_t region,
-                          epmp_perm_t perm);
-
-/**
- * Clear the rule-locking-bypass (RLB) bit.
- *
- * Clearing RLB causes the Lock bit in the ePMP to be enforced.
- */
-void rom_ext_epmp_clear_rlb(void);
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_EPMP_H_
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_isrs.c b/sw/device/silicon_creator/rom_ext/rom_ext_isrs.c
new file mode 100644
index 0000000000000..bde69f7320c7c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_isrs.c
@@ -0,0 +1,53 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/rom_ext_isrs.h"
+
+#include "sw/device/lib/base/csr.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/error.h"
+
+OT_WARN_UNUSED_RESULT
+static rom_error_t rom_ext_irq_error(void) {
+  uint32_t mcause;
+  CSR_READ(CSR_REG_MCAUSE, &mcause);
+
+  // TODO(opentitan#22947): Remove this debug print prior to a formal release.
+  uint32_t mepc, mtval;
+  CSR_READ(CSR_REG_MEPC, &mepc);
+  CSR_READ(CSR_REG_MTVAL, &mtval);
+  dbg_printf("MCAUSE=%x MEPC=%x MTVAL=%x\r\n", mcause, mepc, mtval);
+
+  // Shuffle the mcause bits into the uppermost byte of the word and report
+  // the cause as kErrorRomExtInterrupt.
+  // Based on the ibex verilog, it appears that the most significant bit
+  // indicates whether the cause is an exception (0) or external interrupt (1),
+  // and the 5 least significant bits indicate which exception/interrupt.
+  //
+  // Preserve the MSB and shift the 7 LSBs into the upper byte.
+  // (we preserve 7 instead of 5 because the verilog hardcodes the unused bits
+  // as zero and those would be the next bits used should the number of
+  // interrupt causes increase).
+  mcause = (mcause & 0x80000000) | ((mcause & 0x7f) << 24);
+  return kErrorRomExtInterrupt + mcause;
+}
+
+OT_USED
+void rom_ext_interrupt_handler(void) {
+  register rom_error_t error asm("a0") = rom_ext_irq_error();
+  asm volatile("tail shutdown_finalize;" ::"r"(error));
+  OT_UNREACHABLE();
+}
+
+// We only need a single handler for all ROM_EXT interrupts, but we want to
+// keep distinct symbols to make writing tests easier.  In the ROM_EXT,
+// alias all interrupt handler symbols to the single handler.
+OT_USED
+OT_ALIAS("rom_ext_interrupt_handler")
+void rom_ext_exception_handler(void);
+
+OT_USED
+OT_ALIAS("rom_ext_interrupt_handler")
+void rom_ext_nmi_handler(void);
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_isrs.h b/sw/device/silicon_creator/rom_ext/rom_ext_isrs.h
new file mode 100644
index 0000000000000..d9d4175d5a89c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_isrs.h
@@ -0,0 +1,40 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_ISRS_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_ISRS_H_
+
+#include <stdnoreturn.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Denotes functions that have to use the interrupt handler ABI.
+ *
+ * These must be 4-byte aligned. Note that they don't use the `interrupt`
+ * attribute since ROM_EXT handlers shut down the chip instead of returning like
+ * regular handlers.
+ */
+#define ROM_EXT_INTERRUPT_HANDLER_ABI __attribute__((aligned(4)))
+
+/**
+ * Denotes functions that have to be near the interrupt vector, because they
+ * are jumped to from it.
+ */
+#define ROM_EXT_VECTOR_FUNCTION __attribute__((section(".isrs")))
+
+/**
+ * ROM_EXT hardware exception handler.
+ */
+ROM_EXT_VECTOR_FUNCTION
+ROM_EXT_INTERRUPT_HANDLER_ABI
+noreturn void rom_ext_interrupt_handler(void);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_ISRS_H_
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_manifest.c b/sw/device/silicon_creator/rom_ext/rom_ext_manifest.c
new file mode 100644
index 0000000000000..7210301235926
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_manifest.c
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/rom_ext_manifest.h"
+
+#include "sw/device/silicon_creator/lib/manifest.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+
+enum {
+  kFlashHalf = TOP_EARLGREY_FLASH_CTRL_MEM_SIZE_BYTES / 2,
+};
+
+const manifest_t *rom_ext_manifest(void) {
+  uintptr_t pc = 0;
+  asm("auipc %[pc], 0;" : [pc] "=r"(pc));
+
+  // Align the PC to the current flash side.  The ROM_EXT must be the first
+  // entity in each flash side, so this alignment is the manifest address.
+  pc &= ~((uintptr_t)kFlashHalf - 1);
+  return (const manifest_t *)pc;
+}
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_manifest.h b/sw/device/silicon_creator/rom_ext/rom_ext_manifest.h
new file mode 100644
index 0000000000000..22d5b6324a0fb
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_manifest.h
@@ -0,0 +1,25 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_MANIFEST_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_MANIFEST_H_
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+/**
+ * Return the pointer to rom_ext manifest on the active flash bank.
+ */
+OT_WARN_UNUSED_RESULT
+const manifest_t *rom_ext_manifest(void);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_MANIFEST_H_
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_start.S b/sw/device/silicon_creator/rom_ext/rom_ext_start.S
index 5034ad316109f..210f9cd0d0721 100644
--- a/sw/device/silicon_creator/rom_ext/rom_ext_start.S
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_start.S
@@ -3,6 +3,9 @@
 // SPDX-License-Identifier: Apache-2.0
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
+#include "sw/device/lib/base/hardened_asm.h"
+#include "sw/device/lib/coverage/api_asm.h"
+#include "otp_ctrl_regs.h"
 
 /**
  * ROM_EXT Interrupt Vector
@@ -41,7 +44,7 @@
   .type _rom_ext_interrupt_vector, @function
 _rom_ext_interrupt_vector:
   // Entry 0: exception handler.
-  j rom_ext_exception_handler
+  j flash_exception_handler
 
   // Entries 1-30: interrupt handlers.
   .rept 30
@@ -78,15 +81,32 @@ _rom_ext_interrupt_vector:
   .type _rom_ext_start_boot, @function
 _rom_ext_start_boot:
   /**
-   * Set up the global pointer `gp`.
-   *
    * Linker relaxations are disabled until the global pointer is setup below,
    * because otherwise some sequences may be turned into `gp`-relative
    * sequences, which is incorrect when `gp` is not initialized.
    */
   .option push
   .option norelax
+
+  /**
+   * Call the .rom_ext_immutable first if it's not called by ROM.
+   */
+  li   a0, (TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR + \
+            OTP_CTRL_SW_CFG_WINDOW_REG_OFFSET)
+  lw   t0, OTP_CTRL_PARAM_CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN_OFFSET(a0)
+  li   t1, HARDENED_BOOL_TRUE
+  beq  t0, t1, .L_mutable_start_boot
+  call _rom_ext_immutable_start
+
+  /**
+   * Continue booting the mutable rom_ext.
+   */
+.L_mutable_start_boot:
+  /**
+   * Set up the global pointer `gp`.
+   */
   la gp, __global_pointer$
+
   .option pop
 
   /**
@@ -170,6 +190,9 @@ _rom_ext_start_boot:
   la   t0, (_rom_ext_interrupt_vector + 1)
   csrw mtvec, t0
 
+  COVERAGE_ASM_INIT()
+  COVERAGE_ASM_TRANSPORT_INIT()
+
   /**
    * Jump to C Code
    */
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_verify.c b/sw/device/silicon_creator/rom_ext/rom_ext_verify.c
new file mode 100644
index 0000000000000..34cb10a8c6669
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_verify.c
@@ -0,0 +1,109 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/rom_ext_verify.h"
+
+#include <string.h>
+
+#include "sw/device/silicon_creator/lib/base/boot_measurements.h"
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/rnd.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/isfb.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_verify.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/usage_constraints.h"
+#include "sw/device/silicon_creator/rom_ext/rom_ext_boot_policy.h"
+
+OT_WARN_UNUSED_RESULT
+rom_error_t rom_ext_verify(const manifest_t *manifest,
+                           const boot_data_t *boot_data, uint32_t *flash_exec,
+                           owner_application_keyring_t *keyring,
+                           size_t *verify_key, owner_config_t *owner_config,
+                           uint32_t *isfb_check_count) {
+  RETURN_IF_ERROR(rom_ext_boot_policy_manifest_check(manifest, boot_data));
+
+  uint32_t key_id =
+      sigverify_ecdsa_p256_key_id_get(&manifest->ecdsa_public_key);
+  // Check if there is an SPX+ key.
+  const manifest_ext_spx_key_t *ext_spx_key;
+  const manifest_ext_spx_signature_t *ext_spx_signature;
+  rom_error_t spx_err = manifest_ext_get_spx_key(manifest, &ext_spx_key);
+  spx_err += manifest_ext_get_spx_signature(manifest, &ext_spx_signature);
+  switch ((uint32_t)spx_err) {
+    case kErrorOk * 2:
+      // Both extensions present: valid SPX+ signature.
+      key_id ^= sigverify_spx_key_id_get(&ext_spx_key->key);
+      break;
+    case kErrorManifestBadExtension * 2:
+      // Both extensions absent: ECDSA only.
+      break;
+    default:
+      // One present, one absent: bad configuration.
+      return kErrorManifestBadExtension;
+  }
+
+  RETURN_IF_ERROR(owner_keyring_find_key(keyring, key_id, verify_key));
+  uint32_t key_alg = keyring->key[*verify_key]->key_alg;
+
+  dbg_printf("verify: key%u;%C;%C\r\n", (uint32_t)*verify_key, key_alg,
+             keyring->key[*verify_key]->key_domain);
+
+  memset(boot_measurements.bl0.data, (int)rnd_uint32(),
+         sizeof(boot_measurements.bl0.data));
+
+  hmac_sha256_init();
+  // Hash usage constraints.
+  manifest_usage_constraints_t usage_constraints_from_hw;
+  sigverify_usage_constraints_get(
+      manifest->usage_constraints.selector_bits |
+          keyring->key[*verify_key]->usage_constraint,
+      &usage_constraints_from_hw);
+  hmac_sha256_update(&usage_constraints_from_hw,
+                     sizeof(usage_constraints_from_hw));
+  // Hash the remaining part of the image.
+  manifest_digest_region_t digest_region = manifest_digest_region_get(manifest);
+  hmac_sha256_update(digest_region.start, digest_region.length);
+  // TODO(#19596): add owner configuration block to measurement.
+  // Verify signature
+  hmac_sha256_process();
+  hmac_digest_t act_digest;
+  hmac_sha256_final(&act_digest);
+
+  static_assert(sizeof(boot_measurements.bl0) == sizeof(act_digest),
+                "Unexpected BL0 digest size.");
+  memcpy(&boot_measurements.bl0, &act_digest, sizeof(boot_measurements.bl0));
+
+  RETURN_IF_ERROR(owner_verify(
+      key_alg, &keyring->key[*verify_key]->data, &manifest->ecdsa_signature,
+      &ext_spx_signature->signature, &usage_constraints_from_hw,
+      sizeof(usage_constraints_from_hw), NULL, 0, digest_region.start,
+      digest_region.length, &act_digest, flash_exec));
+
+  // Perform ISFB checks if the extension is present.
+  if ((hardened_bool_t)owner_config->isfb != kHardenedBoolFalse) {
+    const manifest_ext_isfb_t *ext_isfb;
+    rom_error_t error = manifest_ext_get_isfb(manifest, &ext_isfb);
+    if (error == kErrorOk) {
+      *isfb_check_count = kHardenedBoolFalse;
+      RETURN_IF_ERROR(
+          isfb_boot_request_process(ext_isfb, owner_config, isfb_check_count));
+      // The previous function returns `kErrorOwnershipISFBFailed` if the strike
+      // check or product expression check fails. The following check is to
+      // detect any faults.
+      HARDENED_CHECK_EQ(*isfb_check_count, isfb_expected_count_get(ext_isfb));
+    } else {
+      HARDENED_CHECK_NE(error, kErrorOk);
+    }
+  }
+
+  // This is given that we are expected to perform redundant checks on
+  // `flash_exec` and `isfb_check_count`. This is also the reason why don't use
+  // `HARDENED_RETURN_IF_ERROR` in the `owner_verify` and `isfb_boot_request`
+  // calls.
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/rom_ext/rom_ext_verify.h b/sw/device/silicon_creator/rom_ext/rom_ext_verify.h
new file mode 100644
index 0000000000000..095311b4e7b31
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/rom_ext_verify.h
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_VERIFY_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_VERIFY_H_
+
+#include "sw/device/silicon_creator/lib/boot_data.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/manifest.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif  // __cplusplus
+
+OT_WARN_UNUSED_RESULT
+rom_error_t rom_ext_verify(const manifest_t *manifest,
+                           const boot_data_t *boot_data, uint32_t *flash_exec,
+                           owner_application_keyring_t *keyring,
+                           size_t *verify_key, owner_config_t *owner_config,
+                           uint32_t *isfb_check_count);
+
+#ifdef __cplusplus
+}  // extern "C"
+#endif  // __cplusplus
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_ROM_EXT_VERIFY_H_
diff --git a/sw/device/silicon_creator/rom_ext/sival/BUILD b/sw/device/silicon_creator/rom_ext/sival/BUILD
index 82b6ff44d57c6..0627eaae4ab76 100644
--- a/sw/device/silicon_creator/rom_ext/sival/BUILD
+++ b/sw/device/silicon_creator/rom_ext/sival/BUILD
@@ -2,121 +2,119 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
 load("//rules:const.bzl", "CONST", "hex")
 load("//rules:manifest.bzl", "manifest")
-load("//rules/opentitan:defs.bzl", "opentitan_binary")
 load("//rules:signing.bzl", "offline_presigning_artifacts", "offline_signature_attach")
+load("//rules/opentitan:defs.bzl", "opentitan_binary")
 load(
     "//sw/device/silicon_creator/rom_ext:defs.bzl",
+    "ROM_EXT_VARIATIONS",
     "ROM_EXT_VERSION",
+    "SLOTS",
+    "secver_write_selection",
 )
-load("@rules_pkg//pkg:tar.bzl", "pkg_tar")
 
 package(default_visibility = ["//visibility:public"])
 
-# In order to prevent the linker from prematurely discarding symbols, we
-# need to give the CRT library last.
-LINK_ORDER = [
-    "$(location //sw/device/silicon_creator/rom_ext)",
-    "$(location //sw/device/lib/crt)",
-]
-
 manifest(d = {
     "name": "manifest_sival",
     "identifier": hex(CONST.ROM_EXT),
-    "manuf_state_creator": hex(CONST.MANUF_STATE.SIVAL),
     "version_major": ROM_EXT_VERSION.MAJOR,
     "version_minor": ROM_EXT_VERSION.MINOR,
     "security_version": ROM_EXT_VERSION.SECURITY,
+    "secver_write": secver_write_selection(),
     "visibility": ["//visibility:private"],
 })
 
-# To test that the fake-signed SiVAL ROM_EXT can boot, you need a bitstream
-# with the OTP word CREATOR_SW_CCFG_MANUF_STATE set to `SIVAL` (as above
-# in the manifest definition).  You can manually create such a bitstream with:
+# To test that the prod-signed SiVAL ROM_EXT boots on the FPGA, you need a bitstream
+# with the sival keys pre-programmed into OTP.
+# You can manually create such a bitstream with:
 #
-# bazel build //hw/bitstream/universal:splice --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_cw310_sival
-opentitan_binary(
-    name = "rom_ext_fake_prod_signed_slot_a",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_a",
-    linkopts = LINK_ORDER,
-    manifest = ":manifest_sival",
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/sival/keys",
-    ],
-)
-
-opentitan_binary(
-    name = "rom_ext_fake_prod_signed_slot_b",
-    ecdsa_key = {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0"},
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-        "//hw/top_earlgrey:sim_dv_base",
-        "//hw/top_earlgrey:sim_verilator_base",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_b",
-    linkopts = LINK_ORDER,
-    manifest = ":manifest_sival",
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/sival/keys",
-    ],
-)
-
-opentitan_binary(
-    name = "rom_ext_real_prod_signed_slot_a",
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_a",
-    linkopts = LINK_ORDER,
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/sival/keys",
-    ],
-)
+# bazel build //hw/bitstream/universal:splice \
+#   --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_hyper310_rom_ext \
+#   --//hw/bitstream/universal:otp=//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized
+[
+    opentitan_binary(
+        name = "rom_ext_{}_fake_slot_{}".format(variation, slot),
+        ecdsa_key = select({
+            "//signing:test_keys": {"//sw/device/silicon_creator/rom/keys/fake/ecdsa:ecdsa_keyset": "prod_key_0"},
+            "//conditions:default": {"//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset": "sv00-earlgrey-a1-root-ecdsa-test-0"},
+        }),
+        exec_env = [
+            "//hw/top_earlgrey:silicon_creator",
+            "//hw/top_earlgrey:fpga_cw310",
+            "//hw/top_earlgrey:fpga_cw340",
+        ],
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_{}".format(slot),
+        # In order to prevent the linker from prematurely discarding symbols, we
+        # need to give the CRT library last.
+        linkopts = [
+            "$(location //sw/device/silicon_creator/rom_ext:rom_ext_{})".format(variation),
+            "$(location //sw/device/lib/crt)",
+        ],
+        manifest = ":manifest_sival",
+        deps = [
+            # The sival_owner C library is included only in the "fake" ROM_EXT,
+            # as it is typically used to test FPGA flows and the FPGA doesn't
+            # retain ownership information across bitstream reloads.
+            ":sival_owner",
+            "//sw/device/lib/crt",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/rescue:rescue_xmodem",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_{}".format(variation),
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_section_{}_slot_{}".format(variation, slot),
+        ],
+    )
+    for variation in ROM_EXT_VARIATIONS.keys()
+    for slot in SLOTS
+]
 
-opentitan_binary(
-    name = "rom_ext_real_prod_signed_slot_b",
-    exec_env = [
-        "//hw/top_earlgrey:silicon_creator",
-        "//hw/top_earlgrey:fpga_cw310",
-    ],
-    linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_b",
-    linkopts = LINK_ORDER,
-    deps = [
-        "//sw/device/lib/crt",
-        "//sw/device/silicon_creator/lib:manifest_def",
-        "//sw/device/silicon_creator/rom_ext",
-        "//sw/device/silicon_creator/rom_ext/sival/keys",
-    ],
-)
+[
+    opentitan_binary(
+        name = "rom_ext_{}_prod_slot_{}".format(variation, slot),
+        exec_env = [
+            "//hw/top_earlgrey:silicon_creator",
+            "//hw/top_earlgrey:fpga_cw310",
+            "//hw/top_earlgrey:fpga_cw340",
+        ],
+        extra_bazel_features = [
+            "minsize",
+            "use_lld",
+        ],
+        linker_script = "//sw/device/silicon_creator/rom_ext:ld_slot_{}".format(slot),
+        linkopts = [
+            "$(location //sw/device/silicon_creator/rom_ext:rom_ext_{})".format(variation),
+            "$(location //sw/device/lib/crt)",
+        ],
+        deps = [
+            # The sival_owner C library is excluded from the real ROM_EXT,
+            # as chips maintain their ownership configuration in flash.
+            "//sw/device/lib/crt",
+            "//sw/device/silicon_creator/lib:manifest_def",
+            "//sw/device/silicon_creator/lib/rescue:rescue_xmodem",
+            "//sw/device/silicon_creator/rom_ext:rom_ext_{}".format(variation),
+            "//sw/device/silicon_creator/rom_ext/imm_section:main_section_{}_slot_{}".format(variation, slot),
+        ],
+    )
+    for variation in ROM_EXT_VARIATIONS.keys()
+    for slot in SLOTS
+]
 
 offline_presigning_artifacts(
     name = "presigning",
     testonly = True,
     srcs = [
-        ":rom_ext_real_prod_signed_slot_a",
-        ":rom_ext_real_prod_signed_slot_b",
+        ":rom_ext_{}_prod_slot_{}".format(variation, slot)
+        for variation in ROM_EXT_VARIATIONS.keys()
+        for slot in SLOTS
     ],
     ecdsa_key = {
-        "//sw/device/silicon_creator/rom/keys/fake/ecdsa:prod_key_0_ecdsa_p256": "prod_key_0_ecdsa_p256",
+        "//hw/ip/otp_ctrl/data/earlgrey_skus/sival/keys:keyset": "sv00-earlgrey-a1-root-ecdsa-prod-0",
     },
     manifest = ":manifest_sival",
     tags = ["manual"],
@@ -139,5 +137,24 @@ offline_signature_attach(
     ecdsa_signatures = [
         "//sw/device/silicon_creator/rom_ext/sival/signatures:ecdsa_signatures",
     ],
+    spx_signatures = [
+        "//sw/device/silicon_creator/rom_ext/sival/signatures:spx_signatures",
+    ],
     tags = ["manual"],
 )
+
+cc_library(
+    name = "sival_owner",
+    srcs = [
+        "sival_owner.c",
+        "sival_owner.h",
+    ],
+    deps = [
+        "//sw/device/silicon_creator/lib:boot_data",
+        "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+        "//sw/device/silicon_creator/lib/ownership",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/lib/ownership:owner_block",
+    ],
+    alwayslink = True,
+)
diff --git a/sw/device/silicon_creator/rom_ext/sival/README.md b/sw/device/silicon_creator/rom_ext/sival/README.md
new file mode 100644
index 0000000000000..b41af8f1597c0
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/README.md
@@ -0,0 +1,42 @@
+# SiVAL ROM\_EXT
+
+The ROM\_EXT build in this directory is for chips that are configured as the SiVAL SKU.
+
+The SiVAL SKU is initialized with the SiVAL owner during provisioning.
+The human-readable owner configuration is `sival_owner.json5` and is translated to binary form with the following command:
+
+```bash
+cd $REPO_TOP
+opentitantool ownership config \
+    --input sw/device/silicon_creator/rom_ext/sival/sival_owner.json5 \
+    sw/device/silicon_creator/rom_ext/sival/sival_owner.bin
+```
+
+The configuration is signed using the owner key stored in the Cloud KMS keyring `ot-earlgrey-a1-sival`:
+
+```bash
+cd $REPO_TOP
+
+# From https://github.com/GoogleCloudPlatform/kms-integrations/releases/tag/pkcs11-v1.2
+export HSMTOOL_MODULE=$(pwd)/libkmsp11.so
+export KMS_PKCS11_CONFIG=signing/tokens/ot-earlgrey-a1-sival.yaml
+
+hsmtool -t ot-earlgrey-a1-sival ecdsa sign \
+    -l sv00-ownership-owner-0 \
+    --little-endian \
+    --format=slice:0..1952 \
+    --update-in-place=1952..2016 \
+    sw/device/silicon_creator/rom_ext/sival/sival_owner.bin
+```
+
+The header file `sival_owner.h` was created by dumping the binary file to a C header.
+This file is only used by the "fake" ROM\_EXT used in testing FPGA configurations.
+NOTE: the repeating unused data pattern `ZZZZ` can be cut out of the hexdump as the `sku_creator_owner_init` function will fill the unused portion of the owner page with that pattern.
+```bash
+cd $REPO_TOP
+
+./util/sh/scripts/bin2c.sh \
+    --input sw/device/silicon_creator/rom_ext/sival/sival_owner.bin \
+    --output sw/device/silicon_creator/rom_ext/sival/sival_owner.h \
+    --name sival_owner
+```
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/BUILD b/sw/device/silicon_creator/rom_ext/sival/binaries/BUILD
index f92da317fed0d..c783b98080750 100644
--- a/sw/device/silicon_creator/rom_ext/sival/binaries/BUILD
+++ b/sw/device/silicon_creator/rom_ext/sival/binaries/BUILD
@@ -2,6 +2,60 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load("//rules/opentitan:cc.bzl", "exec_env_filegroup")
+load("//rules:files.bzl", "copy_files")
+load("//rules:signing.bzl", "signature_test")
+
 package(default_visibility = ["//visibility:public"])
 
-# Add silicon binary targets once available.
+copy_files(
+    name = "copy_signed",
+    testonly = True,
+    srcs = [
+        "//sw/device/silicon_creator/rom_ext/sival:signed",
+    ],
+    relative_to = ":BUILD",
+    tags = ["manual"],
+)
+
+exec_env_filegroup(
+    name = "rom_ext_dice_x509_prod",
+    testonly = True,
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": "cw310",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": "cw340",
+        "//hw/top_earlgrey:silicon_creator": "silicon",
+    },
+    files = {
+        "rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.signed.bin": "cw310",
+        "rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.signed.bin": "cw340",
+        "rom_ext_dice_x509_prod_slot_virtual_silicon_creator.signed.bin": "silicon",
+    },
+)
+
+exec_env_filegroup(
+    name = "rom_ext_dice_cwt_prod",
+    testonly = True,
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": "cw310",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": "cw340",
+        "//hw/top_earlgrey:silicon_creator": "silicon",
+    },
+    files = {
+        "rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.signed.bin": "cw310",
+        "rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.signed.bin": "cw340",
+        "rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.signed.bin": "silicon",
+    },
+)
+
+filegroup(
+    name = "signed_binaries",
+    srcs = glob(["*.signed.bin"]),
+)
+
+signature_test(
+    name = "sival_signature_test",
+    srcs = [
+        ":signed_binaries",
+    ],
+)
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..7c4b4df56bc22
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..f18c43c82df31
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..8c72a84fe7ad0
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_a_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..24e5d90d9d5b2
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..8596e5d604890
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..d7673babb0890
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_b_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..73a9f76ba84ea
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..8906155976175
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..4156fb139463e
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..cd2b27e30cf4c
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..082502ce6575c
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..16364ebe3b641
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_a_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..63c2d2aef5838
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..6a838e40ef438
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..c4ee58cbe635a
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_b_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.signed.bin
new file mode 100644
index 0000000000000..98fa20dcb441b
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.signed.bin
new file mode 100644
index 0000000000000..3bd3d77f01e6b
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.signed.bin b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.signed.bin
new file mode 100644
index 0000000000000..153c64a59073f
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/binaries/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.signed.bin differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/BUILD b/sw/device/silicon_creator/rom_ext/sival/keys/BUILD
index 895fadbb4b3aa..3d0a5ef08faca 100644
--- a/sw/device/silicon_creator/rom_ext/sival/keys/BUILD
+++ b/sw/device/silicon_creator/rom_ext/sival/keys/BUILD
@@ -6,50 +6,14 @@ load("//rules:signing.bzl", "keyset")
 
 package(default_visibility = ["//visibility:public"])
 
-cc_library(
-    name = "keys",
-    srcs = [
-        "sigverify_rsa_keys_sival.c",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys.h",
-    ],
-    hdrs = [
-        "earlgrey_z0_sival_1.h",
-    ],
-    deps = [
-        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
-        "//sw/device/lib/base:macros",
-        "//sw/device/silicon_creator/lib/sigverify",
-    ],
-)
-
-cc_test(
-    name = "keys_unittest",
-    srcs = [
-        "sigverify_rsa_keys_sival_unittest.cc",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.c",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify.h",
-    ],
-    deps = [
-        ":keys",
-        "//sw/device/lib/base:hardened",
-        "//sw/device/silicon_creator/lib/drivers:hmac",
-        "//sw/device/silicon_creator/lib/drivers:lifecycle",
-        "//sw/device/silicon_creator/lib/drivers:otp",
-        "//sw/device/silicon_creator/lib/sigverify:mod_exp_ibex_device_library",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_key",
-        "//sw/device/silicon_creator/lib/sigverify:rsa_verify",
-        "//sw/device/silicon_creator/rom_ext:sigverify_keys",
-        "//sw/device/silicon_creator/testing:rom_test",
-        "@googletest//:gtest_main",
-    ],
-)
-
 keyset(
     name = "keyset",
     build_setting_default = "",
     keys = {
-        "earlgrey_z0_sival_1.der": "earlgrey_z0_sival_1",
+        "sv00-app-key-prod-0.pub.der": "sv00-app-key-prod-0",
+        "sv00-app-key-dev-0.pub.der": "sv00-app-key-dev-0",
+        "sv00-app-key-test-0.pub.der": "sv00-app-key-test-0",
     },
-    profile = "earlgrey_z0_sival",
+    profile = "earlgrey_a1_sival_owner",
     tool = "//signing:token",
 )
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/README.md b/sw/device/silicon_creator/rom_ext/sival/keys/README.md
new file mode 100644
index 0000000000000..6cc5635b315d7
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/keys/README.md
@@ -0,0 +1,49 @@
+# SiVAL owner and application keys
+
+The keys in this directory are the owner and application keys for the SiVAL owner.
+The private components of these keys are stored in CloudKMS in the `ot-earlgrey-a1-sival` keyring.
+
+These keys were generated using the `gcloud` tool and exported with `hsmtool`:
+
+```bash
+KEYRING=ot-earlgrey-a1-sival
+KEYS=(
+    sv00-app-key-prod-0
+    sv00-app-key-dev-0
+    sv00-app-key-test-0
+    sv00-ownership-owner-0
+    sv00-ownership-activate-0
+    sv00-ownership-unlock-0
+)
+
+### Generate Keys
+for KEY in ${KEYS[@]}; do
+    gcloud kms keys create ${KEY} \
+        --keyring ${KEYRING} \
+        --location us-west1 \
+        --purpose "asymmetric-signing" \
+        --default-algorithm "ec-sign-p256-sha256" \
+        --protection-level hsm
+done
+
+### Export public keys
+# From https://github.com/GoogleCloudPlatform/kms-integrations/releases/tag/pkcs11-v1.2
+export HSMTOOL_MODULE=$(pwd)/libkmsp11.so
+export KMS_PKCS11_CONFIG=${KEYRING}.yaml
+
+cat >${KEYRING}.yaml <<EOT
+---
+tokens:
+  - key_ring: "projects/otkms-407107/locations/us-west1/keyRings/${KEYRING}"
+    label: "${KEYRING}"
+log_directory: "/tmp"
+EOT
+
+for KEY in ${KEYS[@]}; do
+    hsmtool --token ${KEYRING} \
+        ecdsa export \
+        -l ${KEY} \
+        -f der \
+        ${KEY}.pub.der
+done
+```
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.der b/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.der
deleted file mode 100644
index 9cc38d62bd78d..0000000000000
Binary files a/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.der and /dev/null differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.h b/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.h
deleted file mode 100644
index e55ea71db0bab..0000000000000
--- a/sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.h
+++ /dev/null
@@ -1,39 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_KEYS_EARLGREY_Z0_SIVAL_1_H_
-#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_KEYS_EARLGREY_Z0_SIVAL_1_H_
-
-#define EARLGREY_Z0_SIVAL_1                                             \
-  {                                                                     \
-    .n =                                                                \
-        {{                                                              \
-            0x244fec5d, 0x03bf7017, 0x651d68c3, 0x3374169d, 0x9805a84c, \
-            0x62f21102, 0xed908f32, 0xf71f8255, 0x78ef5741, 0xd26d0552, \
-            0xd2318013, 0xf28275a2, 0x4c916d97, 0xbdfce99b, 0x5ef69b79, \
-            0xd8b107fd, 0xe0212994, 0x1ab8c35a, 0x6ac74072, 0x60888896, \
-            0xcaab7ac0, 0xe61874d6, 0x52900627, 0xf9f10f13, 0xd983cb4e, \
-            0x5fe88069, 0x2d528eb4, 0xb0a4d29a, 0xc7e84cf2, 0x83f270b2, \
-            0x8d426b9e, 0x78d5e141, 0x8759e02b, 0x54749c6c, 0x74a2cda8, \
-            0x3814631f, 0xa056740a, 0x98b65ea7, 0x551433c7, 0xe47affa8, \
-            0x2492252c, 0xedcd058a, 0x8b0e0efc, 0x0ba12bdb, 0x21f225ae, \
-            0xa64dfe4d, 0x0eb4ca2c, 0x0c213dea, 0x6be70c60, 0xc3535e68, \
-            0x23318a0a, 0xa4affa8f, 0x07be0532, 0xc8921477, 0xf25dd77e, \
-            0x430b915e, 0xb116b20f, 0xb981d3f6, 0xb60217d1, 0x076c04c6, \
-            0x28cc4ad7, 0x59ac67f9, 0x816da846, 0xd1540726, 0xd4f0e019, \
-            0x299e5fe4, 0x6404de97, 0xa802ccb6, 0x2b7d6660, 0x0b4717e3, \
-            0xd650cd2f, 0xd3664047, 0x32b81c86, 0xd4f1dc37, 0x5654406e, \
-            0x3f0ac12d, 0x053d03d4, 0x16fe1c13, 0x8e56662f, 0xed8ee0d9, \
-            0x1c6d904a, 0x56656253, 0xa3405ff2, 0xb973e8aa, 0xe3f2069b, \
-            0xac0d103a, 0xd1f85484, 0x6103932c, 0x7fd5115c, 0xffc0d4d3, \
-            0xd50f5081, 0x678e9dec, 0xff838843, 0x74f11c20, 0xb748261d, \
-            0x93769b65,                                                 \
-        }},                                                             \
-    .n0_inv = {                                                         \
-        0xfe86b80b, 0x43f83fe6, 0x96163096, 0x261c4bba,                 \
-        0x4e69ab6e, 0x6e214b18, 0x9cf1da8f, 0x8183bfa0,                 \
-    },                                                                  \
-  }
-
-#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_KEYS_EARLGREY_Z0_SIVAL_1_H_
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival.c b/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival.c
deleted file mode 100644
index 0ae025e4d4fb7..0000000000000
--- a/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival.c
+++ /dev/null
@@ -1,33 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-#include "sw/device/silicon_creator/rom_ext/sival/keys/earlgrey_z0_sival_1.h"
-
-/**
- * Number of RSA public keys.
- */
-enum {
-  kSigverifyRsaKeysCnt_ = 1,
-};
-const size_t kSigverifyRsaKeysCnt = kSigverifyRsaKeysCnt_;
-
-/**
- * Step size to use when checking RSA public keys.
- *
- * This must be coprime with and less than `kSigverifyNumRsaKeys`.
- * Note: Step size is not applicable when `kSigverifyNumRsaKeys` is 1.
- */
-const size_t kSigverifyRsaKeysStep = 1;
-
-/**
- * Fake public keys for signature verification in tests.
- */
-const sigverify_rom_ext_key_t kSigverifyRsaKeys[kSigverifyRsaKeysCnt_] = {
-    {
-        .key = EARLGREY_Z0_SIVAL_1,
-        .key_type = kSigverifyKeyTypeFirmwareProd,
-    },
-};
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival_unittest.cc b/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival_unittest.cc
deleted file mode 100644
index a81d581ee2d6b..0000000000000
--- a/sw/device/silicon_creator/rom_ext/sival/keys/sigverify_rsa_keys_sival_unittest.cc
+++ /dev/null
@@ -1,156 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include <array>
-#include <cstring>
-#include <limits>
-#include <numeric>
-#include <unordered_set>
-
-#include "gtest/gtest.h"
-#include "sw/device/lib/base/hardened.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_lifecycle.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_otp.h"
-#include "sw/device/silicon_creator/lib/drivers/mock_rnd.h"
-#include "sw/device/silicon_creator/lib/error.h"
-#include "sw/device/silicon_creator/lib/sigverify/rsa_verify.h"
-#include "sw/device/silicon_creator/rom_ext/sigverify_keys.h"
-#include "sw/device/silicon_creator/testing/rom_test.h"
-
-#include "otp_ctrl_regs.h"
-
-namespace sigverify_keys_unittest {
-namespace {
-using ::testing::Return;
-
-TEST(Keys, UniqueIds) {
-  std::unordered_set<uint32_t> ids;
-  for (size_t i = 0; i < kSigverifyRsaKeysCnt; ++i) {
-    ids.insert(sigverify_rsa_key_id_get(&kSigverifyRsaKeys[i].key.n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-/**
- * An implementation of the Euclidean algorithm since we can't use c++17's
- * `std::gcd()` yet.
- */
-uint32_t Gcd(uint32_t a, uint32_t b) {
-  while (b != 0) {
-    std::tie(a, b) = std::make_tuple(b, a % b);
-  }
-  return a;
-}
-
-TEST(KeysStep, IsCorrect) {
-  if (kSigverifyRsaKeysCnt > 1) {
-    EXPECT_LT(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt);
-    EXPECT_EQ(Gcd(kSigverifyRsaKeysStep, kSigverifyRsaKeysCnt), 1);
-  }
-}
-
-// Note: The test cases below test sigverify using ROM keys. They have some
-// overlap with sigverify_mod_exp_ibex unit tests but this way we don't have to
-// worry about keeping the keys used in those tests in sync with ROM keys.
-
-/**
- * Message and digest used in tests.
- *
- * The digest can be obtained using:
- * ```
- * echo -n "test" | openssl dgst -sha256 -binary | \
- *    xxd -p -c 4 | tac | sed 's|.*|0x&,|'
- * ```
- */
-constexpr hmac_digest_t kDigest = {
-    .digest =
-        {
-            0xb0f00a08,
-            0xd15d6c15,
-            0x2b0b822c,
-            0xa3bf4f1b,
-            0xc55ad015,
-            0x9a2feaa0,
-            0x884c7d65,
-            0x9f86d081,
-        },
-};
-
-/**
- * Keys and signatures used in tests.
- */
-struct RsaVerifyTestCase {
-  /**
-   * Signer's RSA public key.
-   */
-  const sigverify_rsa_key_t *key;
-  /**
-   * Signature to be verified.
-   */
-  sigverify_rsa_buffer_t sig;
-};
-
-const RsaVerifyTestCase kRsaVerifyTestCases[1]{
-    // message: "test"
-    {
-        .key = &kSigverifyRsaKeys[0].key,
-        /*
-         * echo -n "test" > test.txt
-         * hsmtool -t ot-earlgrey-z0-sival -u user rsa sign  -f plain-text -l
-         * earlgrey_z0_sival_1 \ -o test.sig test.txt cat test.sig | xxd -p -c 4
-         * | tac | sed 's|.*|0x&,|'
-         */
-        .sig =
-            {
-                0x51f8a313, 0xdf9cadc8, 0x09849651, 0x3396dc50, 0x2523715f,
-                0x3f261117, 0xbc891dc0, 0x25e90a18, 0x7f3d68ef, 0xa49e89a9,
-                0x1e126205, 0x566de5eb, 0x1302edc8, 0x85a11622, 0xedf3b295,
-                0xbf2ead9d, 0xe2f7f62e, 0x82014f37, 0x62114a4f, 0x64d71f3d,
-                0xef9f97ae, 0x222a67e2, 0x47fd6d82, 0x8fd3f870, 0xdf07454b,
-                0x1a627fc1, 0x5697e480, 0xb5b4857d, 0x865bd8ce, 0x1f7fdc3a,
-                0x436807eb, 0xf0954b96, 0xd7556c4e, 0x6056c8d4, 0xc5e7875c,
-                0xdc4d5cdc, 0xba128354, 0xb57fccef, 0x367d4b88, 0x2b54c85e,
-                0x711b9cab, 0x747b8c65, 0xe98fb5d1, 0x272c0705, 0x9db1bf83,
-                0x33e18070, 0x7b4f73b1, 0x584e0de9, 0x75e103c2, 0x68062c61,
-                0x910b2c9c, 0x2af9ff03, 0x114d2bef, 0x278c2036, 0x1e63481e,
-                0x8fefabfd, 0xdac1fbaa, 0x769d708c, 0x94f5c336, 0xa07835b3,
-                0x0f1ee10e, 0xfe905d90, 0x5b561fe7, 0x686dd4a6, 0xb6e3507f,
-                0xadba5635, 0x9e463d0e, 0xa782afaf, 0x43366fa1, 0x7146b3c4,
-                0x9f4d2baf, 0xd9aed324, 0x36f0a5a2, 0xfa041f9d, 0x32f2fb3a,
-                0x6b56b1df, 0x2fbfceae, 0x3fe7dbe3, 0x8458b9db, 0x29860b30,
-                0x40bc9b9b, 0x36515839, 0xb414bfab, 0x6df1cfd2, 0x50431bef,
-                0x3fb2c08b, 0x7b733a06, 0x534c39f1, 0x5cd5f48b, 0xcc488cae,
-                0xb08b1fca, 0x62f9c45a, 0x72e3e064, 0x34f7fb4e, 0x64a20ebd,
-                0x0c7d4fb0,
-            },
-    },
-};
-
-TEST(RsaVerifyTestCases, AllKeys) {
-  std::unordered_set<uint32_t> ids;
-  for (auto const &test_case : kRsaVerifyTestCases) {
-    ids.insert(sigverify_rsa_key_id_get(&test_case.key->n));
-  }
-
-  EXPECT_EQ(ids.size(), kSigverifyRsaKeysCnt);
-}
-
-class SigverifyRsaVerify
-    : public rom_test::RomTest,
-      public testing::WithParamInterface<RsaVerifyTestCase> {};
-
-TEST_P(SigverifyRsaVerify, Ibex) {
-  uint32_t flash_exec = 0;
-  EXPECT_EQ(sigverify_rsa_verify(&GetParam().sig, GetParam().key, &kDigest,
-                                 kLcStateProd, &flash_exec),
-            kErrorOk);
-  EXPECT_EQ(flash_exec, kSigverifyRsaSuccess);
-}
-
-INSTANTIATE_TEST_SUITE_P(AllCases, SigverifyRsaVerify,
-                         testing::ValuesIn(kRsaVerifyTestCases));
-
-}  // namespace
-}  // namespace sigverify_keys_unittest
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-dev-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-dev-0.pub.der
new file mode 100644
index 0000000000000..731bc5bb07405
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-dev-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-prod-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-prod-0.pub.der
new file mode 100644
index 0000000000000..8bd3cf55fccf8
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-prod-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-test-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-test-0.pub.der
new file mode 100644
index 0000000000000..472c2e2d3ebfd
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-test-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-activate-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-activate-0.pub.der
new file mode 100644
index 0000000000000..1566281acf0d0
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-activate-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-owner-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-owner-0.pub.der
new file mode 100644
index 0000000000000..4156b788c65cd
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-owner-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-unlock-0.pub.der b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-unlock-0.pub.der
new file mode 100644
index 0000000000000..f0ecd44801340
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-unlock-0.pub.der differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/BUILD b/sw/device/silicon_creator/rom_ext/sival/signatures/BUILD
index 58a31b9e9b3fc..b68e04d47597b 100644
--- a/sw/device/silicon_creator/rom_ext/sival/signatures/BUILD
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/BUILD
@@ -6,10 +6,16 @@ package(default_visibility = ["//visibility:public"])
 
 filegroup(
     name = "ecdsa_signatures",
-    srcs = glob(["*.ecdsa_sig"]),
+    srcs = glob(
+        ["*.ecdsa_sig"],
+        allow_empty = True,
+    ),
 )
 
 filegroup(
     name = "spx_signatures",
-    srcs = glob(["*.spx_sig"]),
+    srcs = glob(
+        ["*.spx_sig"],
+        allow_empty = True,
+    ),
 )
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..ba97541b253c6
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw310.ecdsa_sig
@@ -0,0 +1 @@
+e©ò)Üaˆã	Üßû'ëçÀ‹´°¬”oîƃzM30F£‹($=ðñ	<@ܺ[	Î1•L!4‹ävEºxeíº£
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..091586faa8976
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_fpga_cw340.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..2a6ff7179586d
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_a_silicon_creator.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..51b248ffaaceb
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw310.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..449ba644af9da
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_fpga_cw340.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..c4783d63b34ee
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_b_silicon_creator.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..325153d109f0b
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw310.ecdsa_sig
@@ -0,0 +1 @@
+»´³à1\^R=tTrÇmW¥s'…²s\¡�ä!{˜¨Ðê‚-�yá`8WË�•Ñ}‡ô›åµõ÷4*ññË·ê$S–2¶
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..66cc6e65526e0
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_fpga_cw340.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..4f4c3365a6588
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_cwt_prod_slot_virtual_silicon_creator.ecdsa_sig
@@ -0,0 +1 @@
+Ësð$%ù¶‰Z*vÃ/{k5’âíñ…TBín¡
r¢ D?e"s_ŽI,é@n¨!|ÅÈE
V³|f²8õæÏ‹
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..7309b2889a80e
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw310.ecdsa_sig
@@ -0,0 +1 @@
+‹ˆ|•|ô+ˆ–—çòÖQƒêç—Ÿ½†;#©1’VÂjo…ׯÂCþSo¾O5pýÔF×÷8Àñ�²
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..e625b785b8d2f
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_fpga_cw340.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..de23877836be8
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_a_silicon_creator.ecdsa_sig
@@ -0,0 +1 @@
+ÂS+…~N³òü°Çƒë-~8Dù­Œ;É
^ÝïyÒ¯ÆÝý{Ô˜ÁÁAþ#–-!œr‹Àèm"{{{èìX¤
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..1bc663c210aa0
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw310.ecdsa_sig
@@ -0,0 +1 @@
+fGíÃ׎Ô¸398Ûùí%`’Ojú>PÎoŒ‚h{[æ¯â?e&¨WÉ”81
S!öX.½È5û
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..6cbaf172555e5
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_fpga_cw340.ecdsa_sig
@@ -0,0 +1 @@
+ïn`ÊLÑœUÇ Frl2XeîP/Ô-¸½x¨”4Rî©èżi.œPù/5Ë1áuåÓ³ÈLË]v ²Ï‡
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..182efa22faffa
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_b_silicon_creator.ecdsa_sig
@@ -0,0 +1 @@
+à«ó+b#™8ŸÝðâ““裉è2‚[ñ€¨òÍÓÌÀÒñÇã¡r‹9"#¥ýã¦}ü$™Øš’ô
­Ž¡løËë
\ No newline at end of file
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.ecdsa_sig
new file mode 100644
index 0000000000000..12e30de8d75dd
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw310.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.ecdsa_sig
new file mode 100644
index 0000000000000..a554ed768b8a8
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_fpga_cw340.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.ecdsa_sig b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.ecdsa_sig
new file mode 100644
index 0000000000000..457641259061e
Binary files /dev/null and b/sw/device/silicon_creator/rom_ext/sival/signatures/rom_ext_dice_x509_prod_slot_virtual_silicon_creator.ecdsa_sig differ
diff --git a/sw/device/silicon_creator/rom_ext/sival/sival_owner.c b/sw/device/silicon_creator/rom_ext/sival/sival_owner.c
new file mode 100644
index 0000000000000..203ee32537295
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/sival_owner.c
@@ -0,0 +1,71 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/silicon_creator/rom_ext/sival/sival_owner.h"
+
+#include "sw/device/lib/base/hardened_memory.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/owner_block.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership_key.h"
+
+/*
+ * This module overrides the weak `sku_creator_owner_init` symbol in
+ * ownership.c, thus allowing FPGA builds to install an owner configuration
+ * simply by booting the ROM_EXT.
+ */
+rom_error_t sku_creator_owner_init(boot_data_t *bootdata) {
+  const owner_keydata_t *owner =
+      &((const owner_block_t *)sival_owner)->owner_key;
+  uint32_t config_version =
+      ((const owner_block_t *)sival_owner)->config_version;
+  ownership_state_t state = bootdata->ownership_state;
+
+  if (state == kOwnershipStateUnlockedSelf ||
+      state == kOwnershipStateUnlockedAny ||
+      state == kOwnershipStateUnlockedEndorsed) {
+    // Nothing to do when in an unlocked state.
+    return kErrorOk;
+  } else if (state == kOwnershipStateLockedOwner) {
+    if (hardened_memeq(owner->raw, owner_page[0].owner_key.raw,
+                       ARRAYSIZE(owner->raw)) != kHardenedBoolTrue ||
+        config_version <= owner_page[0].config_version) {
+      // Different owner or already newest config version; nothing to do.
+      return kErrorOk;
+    }
+  } else {
+    // State is an unknown value, which is the same as kOwnershipStateRecovery.
+    // We'll not return, thus allowing the owner config below to be programmed
+    // into flash.
+  }
+
+  memset(&owner_page[0], 0x5a, sizeof(owner_page[0]));
+  memcpy(&owner_page[0], sival_owner, sizeof(sival_owner));
+
+  // Check that the owner_block will parse correctly.
+  RETURN_IF_ERROR(owner_block_parse(&owner_page[0],
+                                    /*check_only=*/kHardenedBoolTrue, NULL,
+                                    NULL));
+  ownership_seal_page(/*page=*/0);
+
+  // Since this code should only execute when the ownership state is unknown, we
+  // can thunk the ownership state to LockedOwner.
+  bootdata->ownership_state = kOwnershipStateLockedOwner;
+
+  // Write the configuration to page 0.
+  OT_DISCARD(flash_ctrl_info_erase(&kFlashCtrlInfoPageOwnerSlot0,
+                                   kFlashCtrlEraseTypePage));
+  OT_DISCARD(flash_ctrl_info_write(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                                   sizeof(owner_page[0]) / sizeof(uint32_t),
+                                   &owner_page[0]));
+  owner_page_valid[0] = kOwnerPageStatusSealed;
+
+  OT_DISCARD(boot_data_write(bootdata));
+  dbg_printf("sku_creator_owner_init: saved to flash\r\n");
+  return kErrorOk;
+}
diff --git a/sw/device/silicon_creator/rom_ext/sival/sival_owner.h b/sw/device/silicon_creator/rom_ext/sival/sival_owner.h
new file mode 100644
index 0000000000000..18eac9fda4c3c
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/sival_owner.h
@@ -0,0 +1,59 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#ifndef OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_SIVAL_OWNER_H_
+#define OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_SIVAL_OWNER_H_
+
+// clang-format off
+const unsigned char sival_owner[] = {
+0x4f,0x57,0x4e,0x52,0x00,0x08,0x00,0x00,0x01,0x00,0x00,0x00,0x4c,0x4e,0x45,0x58, // 00000000  OWNR........LNEX
+0x50,0x32,0x35,0x36,0x4f,0x50,0x45,0x4e,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00, // 00000010  P256OPEN........
+0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e, // 00000020  ~~~~~~~~~~~~~~~~
+0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e,0x7e, // 00000030  ~~~~~~~~~~~~~~~~
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000040  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000050  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000060  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000070  ................
+0xf3,0x20,0xd9,0x62,0x33,0x6d,0xab,0xb8,0x50,0x58,0xab,0x18,0x6f,0x23,0xdd,0xde, // 00000080  . .b3m..PX..o#..
+0xc6,0x11,0x9a,0x27,0x06,0x76,0x6d,0x29,0xde,0xd3,0x9d,0x31,0xcb,0xaf,0x2e,0x66, // 00000090  ...'.vm)...1...f
+0x5b,0x7d,0xe5,0xd4,0x73,0xbd,0xb9,0x82,0x3d,0x16,0x04,0xf7,0xbe,0x0a,0x8a,0x48, // 000000a0  [}..s...=......H
+0xdd,0xab,0xcd,0xe9,0x4b,0x84,0x38,0xa8,0xc8,0x81,0x3c,0xd3,0xf9,0xe0,0x10,0xf9, // 000000b0  ....K.8...<.....
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000c0  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000000d0  ................
+0x00,0x26,0xcd,0x0d,0x41,0xd8,0xba,0x54,0xf1,0x8b,0x27,0xb0,0x6a,0x2f,0x67,0x5a, // 000000e0  .&..A..T..'.j/gZ
+0xec,0xe9,0xd1,0x26,0x0f,0x40,0x2d,0x08,0xc8,0x66,0x74,0xe7,0x7b,0x32,0x08,0x25, // 000000f0  ...&.@-..ft.{2.%
+0xef,0xa9,0xd2,0xc1,0xf6,0x36,0xbd,0x7c,0x92,0x5e,0xeb,0x55,0xb5,0x97,0x21,0x43, // 00000100  .....6.|.^.U..!C
+0xc5,0x6b,0xc8,0xb5,0x68,0xa8,0x93,0x93,0xaf,0xa9,0x9e,0x51,0xc9,0x9a,0x6d,0xf6, // 00000110  .k..h......Q..m.
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000120  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000130  ................
+0xec,0x82,0x64,0x56,0x05,0xbb,0x7f,0x8b,0xf9,0x10,0x31,0x12,0x76,0xd5,0xc9,0x4b, // 00000140  ..dV......1.v..K
+0x1f,0x17,0xf1,0x13,0x27,0x31,0xf6,0xb1,0xe2,0x2d,0x42,0x22,0x3c,0xe2,0x8d,0xbf, // 00000150  ....'1...-B"<...
+0x6e,0x73,0x53,0xb3,0xd1,0x4b,0x09,0xef,0x38,0x3a,0x17,0x2c,0xf2,0x89,0xe9,0x24, // 00000160  nsS..K..8:.,...$
+0xd5,0x09,0x8c,0xe4,0xad,0x05,0x6d,0x6b,0xa8,0xcb,0x0c,0xe9,0xad,0x4e,0xdf,0x9f, // 00000170  ......mk.....N..
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000180  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000190  ................
+0x41,0x50,0x50,0x4b,0x70,0x00,0x00,0x00,0x50,0x32,0x35,0x36,0x70,0x72,0x6f,0x64, // 000001a0  APPKp...P256prod
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001b0  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000001c0  ................
+0x4b,0x34,0x53,0x9b,0x33,0x0f,0x8d,0xbe,0xb0,0xd3,0x10,0x9b,0xa1,0x02,0xff,0x0c, // 000001d0  K4S.3...........
+0x60,0xbd,0xc6,0xbe,0xaa,0x73,0xa9,0xd0,0x42,0x38,0x7c,0x91,0x88,0xef,0x29,0x12, // 000001e0  `....s..B8|...).
+0x4f,0x51,0x1d,0xa6,0x96,0x82,0xaf,0xae,0xed,0xf2,0xc5,0xe6,0x52,0x12,0x52,0xc3, // 000001f0  OQ..........R.R.
+0x0d,0x89,0x19,0x3f,0x6a,0x7a,0x66,0x71,0x6c,0xff,0x78,0x7d,0x0b,0x8c,0x4e,0x39, // 00000200  ...?jzfql.x}..N9
+0x41,0x50,0x50,0x4b,0x70,0x00,0x00,0x00,0x50,0x32,0x35,0x36,0x64,0x65,0x76,0x5f, // 00000210  APPKp...P256dev_
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000220  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000230  ................
+0x98,0x63,0x7d,0x7a,0xf0,0xa5,0xce,0x43,0x18,0xd0,0xb0,0xe7,0x27,0x48,0x09,0xa7, // 00000240  .c}z...C....'H..
+0x0f,0x77,0xd1,0x96,0x4e,0x7d,0x0d,0x28,0xcb,0x02,0x6d,0x2a,0x17,0x20,0x5e,0xf7, // 00000250  .w..N}.(..m*. ^.
+0x52,0xbe,0xbf,0x74,0x3a,0x6e,0x26,0x5f,0x9d,0x1f,0xc1,0x9d,0xd1,0x2f,0x89,0xb9, // 00000260  R..t:n&_...../..
+0xd7,0xcd,0xe4,0x9e,0x49,0xcc,0x41,0x01,0x03,0x16,0xc0,0xd9,0x9d,0xb6,0x0b,0x85, // 00000270  ....I.A.........
+0x41,0x50,0x50,0x4b,0x70,0x00,0x00,0x00,0x50,0x32,0x35,0x36,0x74,0x65,0x73,0x74, // 00000280  APPKp...P256test
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 00000290  ................
+0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, // 000002a0  ................
+0x69,0x6f,0xb6,0x62,0x7a,0x34,0x7a,0xbf,0x48,0x6f,0xa9,0x92,0x0a,0xa7,0xb8,0x56, // 000002b0  io.bz4z.Ho.....V
+0x05,0xe5,0x8b,0xc4,0x8c,0x27,0xe5,0x1c,0x7c,0xde,0x02,0x84,0x89,0xc9,0xab,0x4b, // 000002c0  .....'..|......K
+0x35,0x51,0x8e,0x62,0xfd,0x93,0xbb,0x36,0x88,0x22,0x09,0x29,0xc0,0x6d,0x64,0x7f, // 000002d0  5Q.b...6.".).md.
+0xaf,0xe7,0x87,0xcc,0x37,0x8b,0x2e,0x7c,0x12,0xa6,0x16,0x36,0x70,0x1f,0xde,0x1b, // 000002e0  ....7..|...6p...
+};
+// clang-format on
+
+#endif  // OPENTITAN_SW_DEVICE_SILICON_CREATOR_ROM_EXT_SIVAL_SIVAL_OWNER_H_
diff --git a/sw/device/silicon_creator/rom_ext/sival/sival_owner.json5 b/sw/device/silicon_creator/rom_ext/sival/sival_owner.json5
new file mode 100644
index 0000000000000..1f8d903efcdb0
--- /dev/null
+++ b/sw/device/silicon_creator/rom_ext/sival/sival_owner.json5
@@ -0,0 +1,68 @@
+{
+  config_version: 1,
+  update_mode: "Open",
+  sram_exec: "DisabledLocked",
+  min_security_version_bl0: "NoChange",
+
+  ownership_key_alg: "EcdsaP256",
+  owner_key: {
+    Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-owner-0.pub.der"
+    // Opentitantool will load this DER file and transform the key into the
+    // little-endian representation of the x/y cooridiantes.
+    //
+    // Ecdsa: {
+    //   x: "<hex string>",
+    //   y: "<hex string>"
+    // }
+  },
+  activate_key: {
+    Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-activate-0.pub.der"
+  },
+  unlock_key: {
+    Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-ownership-unlock-0.pub.der"
+  },
+  data: [
+    {
+      ApplicationKey: {
+        header: {
+          identifier: "ApplicationKey",
+          length: 0
+        },
+        key_alg: "EcdsaP256",
+        key_domain: "Prod",
+        usage_constraint: 0,
+        key: {
+          Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-prod-0.pub.der"
+        }
+      }
+    },
+    {
+      ApplicationKey: {
+        header: {
+          identifier: "ApplicationKey",
+          length: 0
+        },
+        key_alg: "EcdsaP256",
+        key_domain: "Dev",
+        usage_constraint: 0,
+        key: {
+          Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-dev-0.pub.der"
+        }
+      }
+    },
+    {
+      ApplicationKey: {
+        header: {
+          identifier: "ApplicationKey",
+          length: 0
+        },
+        key_alg: "EcdsaP256",
+        key_domain: "Test",
+        usage_constraint: 0,
+        key: {
+          Ecdsa: "sw/device/silicon_creator/rom_ext/sival/keys/sv00-app-key-test-0.pub.der"
+        }
+      }
+    },
+  ],
+}
diff --git a/sw/device/silicon_owner/bare_metal/BUILD b/sw/device/silicon_owner/bare_metal/BUILD
index 09777e87b48eb..0c802e0ffc966 100644
--- a/sw/device/silicon_owner/bare_metal/BUILD
+++ b/sw/device/silicon_owner/bare_metal/BUILD
@@ -5,7 +5,7 @@
 load("//rules:const.bzl", "CONST", "hex")
 load("//rules:linker.bzl", "ld_library")
 load("//rules:manifest.bzl", "manifest")
-load("//rules/opentitan:defs.bzl", "cw310_params", "fpga_params", "opentitan_binary", "opentitan_test")
+load("//rules/opentitan:defs.bzl", "fpga_params", "opentitan_binary", "opentitan_test")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -84,6 +84,8 @@ opentitan_binary(
     srcs = ["bare_metal_start.S"],
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310_rom_ext",
+        "//hw/top_earlgrey:fpga_cw340_rom_ext",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
     ],
     linker_script = ":ld_slot_b",
     manifest = ":manifest",
@@ -100,6 +102,8 @@ opentitan_binary(
     srcs = ["bare_metal_start.S"],
     exec_env = [
         "//hw/top_earlgrey:fpga_cw310_rom_ext",
+        "//hw/top_earlgrey:fpga_cw340_rom_ext",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
     ],
     linker_script = ":ld_slot_virtual",
     manifest = ":manifest",
diff --git a/sw/device/silicon_owner/bare_metal/bare_metal_slot_a.ld b/sw/device/silicon_owner/bare_metal/bare_metal_slot_a.ld
index bf31d1c91b381..80106a5d8afdc 100644
--- a/sw/device/silicon_owner/bare_metal/bare_metal_slot_a.ld
+++ b/sw/device/silicon_owner/bare_metal/bare_metal_slot_a.ld
@@ -16,8 +16,7 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
 
 /* Slot A starts at the start of the eFlash plus the fixed size of the first
  * Silicon Owner stage */
- /* TODO(#9045): Move ROM_EXT size to a common location. */
-_slot_start_address = ORIGIN(eflash) + 0x10000;
+_slot_start_address = ORIGIN(eflash) + _rom_ext_size;
 
 REGION_ALIAS("owner_flash", eflash);
 
diff --git a/sw/device/silicon_owner/bare_metal/bare_metal_slot_b.ld b/sw/device/silicon_owner/bare_metal/bare_metal_slot_b.ld
index a11a809dff9ee..51c88775f9b8c 100644
--- a/sw/device/silicon_owner/bare_metal/bare_metal_slot_b.ld
+++ b/sw/device/silicon_owner/bare_metal/bare_metal_slot_b.ld
@@ -17,8 +17,7 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
 /* Slot B starts at the half-size mark of the eFlash plus the fixed size of the
  * ROM_EXT.
  */
- /* TODO(#9045): Move ROM_EXT size to a common location. */
-_slot_start_address = ORIGIN(eflash) + (LENGTH(eflash) / 2) + 0x10000;
+_slot_start_address = ORIGIN(eflash) + (LENGTH(eflash) / 2) + _rom_ext_size;
 
 REGION_ALIAS("owner_flash", eflash);
 
diff --git a/sw/device/silicon_owner/bare_metal/bare_metal_slot_virtual.ld b/sw/device/silicon_owner/bare_metal/bare_metal_slot_virtual.ld
index 69bd18c9a3770..d303a56223e9c 100644
--- a/sw/device/silicon_owner/bare_metal/bare_metal_slot_virtual.ld
+++ b/sw/device/silicon_owner/bare_metal/bare_metal_slot_virtual.ld
@@ -17,8 +17,8 @@ INCLUDE hw/top_earlgrey/sw/autogen/top_earlgrey_memory.ld
 /**
  * Symbols to be used in the setup of the address translation for ROM_EXT.
  */
-_slot_start_address = ORIGIN(owner_virtual) + 64K;
-_slot_size = LENGTH(owner_virtual) - 64K;
+_slot_start_address = ORIGIN(owner_virtual) + _rom_ext_size;
+_slot_size = LENGTH(owner_virtual) - _rom_ext_size;
 
 REGION_ALIAS("owner_flash", owner_virtual);
 
diff --git a/sw/device/silicon_owner/tock/apps/BUILD b/sw/device/silicon_owner/tock/apps/BUILD
index c39ce29ffb421..7e3ca53335d29 100644
--- a/sw/device/silicon_owner/tock/apps/BUILD
+++ b/sw/device/silicon_owner/tock/apps/BUILD
@@ -6,17 +6,8 @@ load("//rules:linker.bzl", "ld_library")
 
 package(default_visibility = ["//visibility:public"])
 
-ld_library(
-    name = "libtock_layout",
-    includes = [
-        "@libtock//build_scripts:layout",
-    ],
-)
-
 ld_library(
     name = "single_app_layout",
+    includes = ["@libtock//build_scripts:layout"],
     script = "single_app_layout.ld",
-    deps = [
-        ":libtock_layout",
-    ],
 )
diff --git a/sw/device/silicon_owner/tock/apps/hello/BUILD b/sw/device/silicon_owner/tock/apps/hello/BUILD
index 8d6836fa698c3..d8b3e268a8e18 100644
--- a/sw/device/silicon_owner/tock/apps/hello/BUILD
+++ b/sw/device/silicon_owner/tock/apps/hello/BUILD
@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@rules_rust//rust:defs.bzl", "rust_binary")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 load("//rules:tock.bzl", "tock_elf2tab", "tock_image")
 
 package(default_visibility = ["//visibility:public"])
diff --git a/sw/device/silicon_owner/tock/apps/single_app_layout.ld b/sw/device/silicon_owner/tock/apps/single_app_layout.ld
index c8d7720276448..456245d2f588e 100644
--- a/sw/device/silicon_owner/tock/apps/single_app_layout.ld
+++ b/sw/device/silicon_owner/tock/apps/single_app_layout.ld
@@ -12,6 +12,4 @@ FLASH_LENGTH = 32M;
 RAM_START = 0x10005000;
 RAM_LENGTH = 512K;
 
-/* TODO(cfrantz): Fix the ld_library rule to allow include paths and avoid  */
-/* having to specify an `external` path here */
-INCLUDE external/libtock/build_scripts/libtock_layout.ld
+INCLUDE libtock_layout.ld
diff --git a/sw/device/silicon_owner/tock/kernel/BUILD b/sw/device/silicon_owner/tock/kernel/BUILD
index 5571a8f5702a8..ee6c7131e08d5 100644
--- a/sw/device/silicon_owner/tock/kernel/BUILD
+++ b/sw/device/silicon_owner/tock/kernel/BUILD
@@ -4,23 +4,15 @@
 
 load("@rules_rust//rust:defs.bzl", "rust_binary")
 load("//rules:linker.bzl", "ld_library")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU", "elf_to_disassembly", "obj_transform")
+load("//rules/opentitan:legacy.bzl", "obj_transform")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 package(default_visibility = ["//visibility:public"])
 
-ld_library(
-    name = "kernel_layout",
-    includes = [
-        "@tock//boards:kernel_layout",
-    ],
-)
-
 ld_library(
     name = "layout",
+    includes = ["@tock//boards:kernel_layout"],
     script = "layout.ld",
-    deps = [
-        ":kernel_layout",
-    ],
 )
 
 cc_library(
@@ -67,6 +59,6 @@ rust_binary(
 
 obj_transform(
     name = "raw_kernel",
-    srcs = [":kernel"],
+    src = ":kernel",
     tags = ["manual"],
 )
diff --git a/sw/device/silicon_owner/tock/kernel/layout.ld b/sw/device/silicon_owner/tock/kernel/layout.ld
index 42c96fdf73bec..83dd65cd61112 100644
--- a/sw/device/silicon_owner/tock/kernel/layout.ld
+++ b/sw/device/silicon_owner/tock/kernel/layout.ld
@@ -52,6 +52,4 @@ SECTIONS {
 }
 
 ASSERT (((_etext - _manifest) > 0), "Error: PMP and Flash protection setup assumes _etext follows _manifest");
-/* TODO(cfrantz): Fix the ld_library rule to allow include paths and avoid  */
-/* having to specify an `external` path here */
-INCLUDE external/tock/boards/kernel_layout.ld
+INCLUDE kernel_layout.ld
diff --git a/sw/device/silicon_owner/tock/kernel/src/io.rs b/sw/device/silicon_owner/tock/kernel/src/io.rs
index 28dbca3056175..843f5b0f41307 100644
--- a/sw/device/silicon_owner/tock/kernel/src/io.rs
+++ b/sw/device/silicon_owner/tock/kernel/src/io.rs
@@ -9,10 +9,10 @@ use earlgrey::chip_config::EarlGreyConfig;
 use kernel::debug;
 use kernel::debug::IoWrite;
 
-use crate::ChipConfig;
 use crate::CHIP;
-use crate::PROCESSES;
+use crate::ChipConfig;
 use crate::PROCESS_PRINTER;
+use crate::PROCESSES;
 
 struct Writer {}
 
diff --git a/sw/device/silicon_owner/tock/kernel/src/otbn.rs b/sw/device/silicon_owner/tock/kernel/src/otbn.rs
index 3433d10291954..0487d6e2539fc 100644
--- a/sw/device/silicon_owner/tock/kernel/src/otbn.rs
+++ b/sw/device/silicon_owner/tock/kernel/src/otbn.rs
@@ -24,16 +24,12 @@ use lowrisc::virtual_otbn::{MuxAccel, VirtualMuxAccel};
 
 #[macro_export]
 macro_rules! otbn_mux_component_static {
-    () => {{
-        kernel::static_buf!(lowrisc::virtual_otbn::MuxAccel<'static>)
-    }};
+    () => {{ kernel::static_buf!(lowrisc::virtual_otbn::MuxAccel<'static>) }};
 }
 
 #[macro_export]
 macro_rules! otbn_component_static {
-    () => {{
-        kernel::static_buf!(lowrisc::virtual_otbn::VirtualMuxAccel<'static>)
-    }};
+    () => {{ kernel::static_buf!(lowrisc::virtual_otbn::VirtualMuxAccel<'static>) }};
 }
 
 pub struct AccelMuxComponent {
diff --git a/sw/device/silicon_owner/tock/upstream_kernel/BUILD b/sw/device/silicon_owner/tock/upstream_kernel/BUILD
index dcff2c97721b5..a0f868177199b 100644
--- a/sw/device/silicon_owner/tock/upstream_kernel/BUILD
+++ b/sw/device/silicon_owner/tock/upstream_kernel/BUILD
@@ -4,23 +4,15 @@
 
 load("@rules_rust//rust:defs.bzl", "rust_binary")
 load("//rules:linker.bzl", "ld_library")
-load("//rules:opentitan.bzl", "OPENTITAN_CPU", "elf_to_disassembly", "obj_transform")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:legacy.bzl", "obj_transform")
 
 package(default_visibility = ["//visibility:public"])
 
-ld_library(
-    name = "kernel_layout",
-    includes = [
-        "@tock//boards:kernel_layout",
-    ],
-)
-
 ld_library(
     name = "layout",
+    includes = ["@tock//boards:kernel_layout"],
     script = "layout.ld",
-    deps = [
-        ":kernel_layout",
-    ],
 )
 
 cc_library(
@@ -66,6 +58,6 @@ rust_binary(
 
 obj_transform(
     name = "raw_kernel",
-    srcs = [":kernel"],
+    src = ":kernel",
     tags = ["manual"],
 )
diff --git a/sw/device/silicon_owner/tock/upstream_kernel/layout.ld b/sw/device/silicon_owner/tock/upstream_kernel/layout.ld
index 42c96fdf73bec..83dd65cd61112 100644
--- a/sw/device/silicon_owner/tock/upstream_kernel/layout.ld
+++ b/sw/device/silicon_owner/tock/upstream_kernel/layout.ld
@@ -52,6 +52,4 @@ SECTIONS {
 }
 
 ASSERT (((_etext - _manifest) > 0), "Error: PMP and Flash protection setup assumes _etext follows _manifest");
-/* TODO(cfrantz): Fix the ld_library rule to allow include paths and avoid  */
-/* having to specify an `external` path here */
-INCLUDE external/tock/boards/kernel_layout.ld
+INCLUDE kernel_layout.ld
diff --git a/sw/device/tests/BUILD b/sw/device/tests/BUILD
index 92ec251ad07d0..e01ca06722ae8 100644
--- a/sw/device/tests/BUILD
+++ b/sw/device/tests/BUILD
@@ -2,20 +2,13 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load(
-    "@bazel_skylib//lib:dicts.bzl",
-    "dicts",
-)
+load("@bazel_skylib//lib:dicts.bzl", "dicts")
 load(
     "//rules:const.bzl",
     "CONST",
     "get_lc_items",
 )
-load(
-    "//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-    "OPENTITAN_CPU",
-)
+load("//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
     "//rules:otp.bzl",
     "STD_OTP_OVERLAYS",
@@ -28,11 +21,13 @@ load(
     "EARLGREY_CW340_TEST_ENVS",
     "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
     "EARLGREY_TEST_ENVS",
+    "OPENTITAN_CPU",
     "dv_params",
     "ecdsa_key_for_lc_state",
     "fpga_params",
     "opentitan_binary",
     "opentitan_test",
+    "qemu_params",
     "silicon_params",
     "verilator_params",
 )
@@ -53,7 +48,12 @@ exports_files(glob([
 opentitan_test(
     name = "aes_masking_off_test",
     srcs = ["aes_masking_off_test.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+        },
+    ),
     verilator = verilator_params(
         timeout = "long",
     ),
@@ -65,6 +65,7 @@ opentitan_test(
         "//sw/device/lib/dif:aes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -104,6 +105,11 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    qemu = qemu_params(
+        globals = {
+            "ot-aes.fast-mode": "false",
+        },
+    ),
     deps = [
         "//hw/ip/aes:model",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -119,6 +125,32 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "aes_interrupt_encryption_test",
+    srcs = ["aes_interrupt_encryption_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/ip/aes:model",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
 alias(
     name = "aes_smoketest_entropy_testutils",
     actual = select({
@@ -131,22 +163,164 @@ alias(
 opentitan_test(
     name = "aes_smoketest",
     srcs = ["aes_smoketest.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    # Use this test to ensure that all execution environments are tested in CI.
+    run_in_ci = EARLGREY_TEST_ENVS.keys() + [
+        "//hw/top_earlgrey:fpga_cw310_sival",
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_ext",
+    ],
+    deps = [
+        "//hw/ip/aes:model",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "aes_force_prng_reseed_test",
+    srcs = ["aes_force_prng_reseed_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/ip/aes:model",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/sca/lib:simple_serial",
+    ],
+)
+
+opentitan_test(
+    name = "aes_prng_reseed_test",
+    srcs = ["aes_prng_reseed_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/ip/aes:model",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_utils",
+        "//sw/device/sca/lib:simple_serial",
+    ],
+)
+
+opentitan_test(
+    name = "aes_stall_test",
+    srcs = ["aes_stall_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
     deps = [
         "//hw/ip/aes:model",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_utils",
+        "//sw/device/sca/lib:simple_serial",
+    ],
+)
+
+opentitan_test(
+    name = "alert_handler_escalation_test",
+    srcs = ["alert_handler_escalation_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/top_earlgrey:alert_handler_c_regs",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:clkmgr",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:rstmgr",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:alert_handler_testutils",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:rstmgr_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -192,7 +366,7 @@ opentitan_test(
         # be run as part of the DV nightly regression.
         dicts.omit(
             EARLGREY_TEST_ENVS,
-            ["//hw/top_earlgrey:verilator"],
+            ["//hw/top_earlgrey:sim_verilator"],
         ),
         {
             "//hw/top_earlgrey:silicon_creator": None,
@@ -239,6 +413,9 @@ opentitan_test(
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
         },
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey:alert_handler_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -278,7 +455,7 @@ opentitan_test(
         # be run as part of the DV nightly regression.
         dicts.omit(
             EARLGREY_TEST_ENVS,
-            ["//hw/top_earlgrey:verilator"],
+            ["//hw/top_earlgrey:sim_verilator"],
         ),
         {
             "//hw/top_earlgrey:silicon_creator": None,
@@ -330,12 +507,13 @@ opentitan_test(
         # be run as part of the DV nightly regression.
         dicts.omit(
             EARLGREY_TEST_ENVS,
-            ["//hw/top_earlgrey:verilator"],
+            ["//hw/top_earlgrey:sim_verilator"],
         ),
         {
             # See #23038, this test requires a provisioned flash in sival.
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
         },
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     fpga = fpga_params(
         timeout = "moderate",
@@ -523,6 +701,9 @@ opentitan_test(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
@@ -539,17 +720,13 @@ opentitan_test(
 )
 
 opentitan_test(
-    name = "chip_power_idle_load",
-    srcs = ["chip_power_idle_load.c"],
-    broken = fpga_params(tags = ["broken"]),
+    name = "chip_power_idle_load_test",
+    srcs = ["chip_power_idle_load_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
             "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner",
-            "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_owner",
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
         },
     ),
     silicon_owner = silicon_params(
@@ -575,18 +752,15 @@ opentitan_test(
 )
 
 opentitan_test(
-    name = "chip_power_sleep_load",
-    srcs = ["chip_power_sleep_load.c"],
-    broken = fpga_params(tags = ["broken"]),
+    name = "chip_power_sleep_load_test",
+    srcs = ["chip_power_sleep_load_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
         },
     ),
-    # TODO(#16374): test doesn't make progress after enabling PWM
-    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:adc_ctrl",
@@ -640,7 +814,7 @@ opentitan_test(
         {"//hw/top_earlgrey:fpga_cw310_sival": None},
     ),
     fpga = fpga_params(
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_personalized",
     ),
     verilator = verilator_params(tags = ["broken"]),
     deps = [
@@ -657,7 +831,7 @@ opentitan_test(
         "//hw/top_earlgrey:sim_verilator": None,
     },
     fpga = fpga_params(
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_personalized",
         # TODO(lowrisc/opentitan#19620): fpga doesn't support lowering main clk frequency
         tags = ["broken"],
     ),
@@ -679,8 +853,11 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    # Broken on Verilator. See #24182.
+    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/dif:base",
         "//sw/device/lib/dif:clkmgr",
@@ -831,6 +1008,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
@@ -901,27 +1079,6 @@ opentitan_test(
     ],
 )
 
-opentitan_test(
-    name = "coverage_test",
-    srcs = ["coverage_test.c"],
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
-        {
-            "//hw/top_earlgrey:silicon_creator": None,
-        },
-    ),
-    verilator = verilator_params(timeout = "long"),
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/arch:device",
-        "//sw/device/lib/runtime:hart",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
 opentitan_test(
     name = "crt_test",
     srcs = ["crt_test.c"],
@@ -938,9 +1095,11 @@ opentitan_test(
         "//sw/device/lib/base:macros",
         "//sw/device/lib/base:stdasm",
         "//sw/device/lib/dif:uart",
+        "//sw/device/lib/runtime:ibex",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/runtime:print",
         "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_isrs",
         "//sw/device/lib/testing/test_framework:ottf_start",
         "//sw/device/lib/testing/test_framework:ottf_test_config",
         "//sw/device/lib/testing/test_framework:status",
@@ -956,13 +1115,17 @@ opentitan_test(
             "//hw/top_earlgrey:fpga_cw310_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
             "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner",
-            "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_owner",
         },
     ),
     silicon_owner = silicon_params(
         tags = ["broken"],
     ),
-    verilator = verilator_params(timeout = "eternal"),
+    verilator = verilator_params(
+        timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
+    ),
     deps = [
         ":otbn_randomness_impl",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -1042,6 +1205,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//hw/ip/aes:model",
@@ -1049,7 +1215,6 @@ opentitan_test(
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl/rsa:rsa_3072_verify",
         "//sw/device/lib/dif:aes",
         "//sw/device/lib/dif:csrng",
         "//sw/device/lib/dif:edn",
@@ -1065,7 +1230,6 @@ opentitan_test(
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/tests:otbn_randomness_impl",
-        "//sw/device/tests/crypto:rsa_3072_verify_testvectors_hardcoded_header",
     ],
 )
 
@@ -1077,6 +1241,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     verilator = verilator_params(
@@ -1098,6 +1263,7 @@ opentitan_test(
         "//sw/device/lib/testing:rand_testutils",
         "//sw/device/lib/testing:rv_core_ibex_testutils",
         "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/tests:otbn_randomness_impl",
     ],
@@ -1143,6 +1309,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     verilator = verilator_params(
@@ -1163,6 +1330,7 @@ opentitan_test(
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing:rv_core_ibex_testutils",
         "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -1316,6 +1484,9 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/ip/entropy_src/data:entropy_src_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -1341,6 +1512,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     verilator = verilator_params(timeout = "long"),
@@ -1366,45 +1538,144 @@ opentitan_test(
         "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing:otp_ctrl_testutils",
         "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
 opentitan_test(
-    name = "example_concurrency_test",
-    srcs = ["example_concurrency_test.c"],
+    name = "entropy_src_bypass_mode_health_test",
+    srcs = ["entropy_src_bypass_mode_health_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
     ),
+    verilator = verilator_params(timeout = "long"),
     deps = [
+        ":otbn_randomness_impl",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:otbn",
+        "//sw/device/lib/dif:otp_ctrl",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:hart",
         "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:alert_handler_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
 opentitan_test(
-    name = "example_mem_ujcmd_test",
-    srcs = ["example_mem_ujcmd.c"],
-    exec_env = EARLGREY_TEST_ENVS,
-    fpga = fpga_params(
-        test_cmd = " ".join([
-            "--bootstrap=\"{firmware}\"",
-            "\"{firmware:elf}\"",
-        ]),
-        test_harness = "//sw/host/tests/chip/mem",
-    ),
-    verilator = verilator_params(
-        timeout = "eternal",
-        tags = ["manual"],
-        test_cmd = " ".join([
-            "--firmware-elf=\"{firmware:elf}\"",
-        ]),
-        test_harness = "//sw/host/tests/chip/mem",
+    name = "entropy_src_fips_mode_health_test",
+    srcs = ["entropy_src_fips_mode_health_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
     ),
+    # This test uses carefully tuned health test threshold values to trigger health test alerts
+    # inside ENTROPY_SRC. Due to the probabilistic nature of the analog noise source producing the
+    # the tested entropy, the test is expected to be "flaky" on silicon targets.
+    #
+    # In contrast, FPGA platforms use a deterministic model for the analog noise source. The
+    # tested entropy bits depend on a netlist constant, the time it takes to reach the test code,
+    # and the amount of entropy consumed by endpoints until reaching the test code. Correctly
+    # tuning the health test thresholds for FPGA platforms in a robust way is not feasible
+    # currently. Instead, the test is marked as "broken" on FPGA.
+    fpga = fpga_params(tags = ["broken"]),
+    silicon = silicon_params(tags = ["flaky"]),
+    verilator = verilator_params(timeout = "long"),
     deps = [
-        "//sw/device/lib/testing/json:command",
+        ":otbn_randomness_impl",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:otbn",
+        "//sw/device/lib/dif:otp_ctrl",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:alert_handler_testutils",
+        "//sw/device/lib/testing:edn_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "example_concurrency_test",
+    srcs = ["example_concurrency_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    deps = [
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "example_mem_ujcmd_test",
+    srcs = ["example_mem_ujcmd.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_CW340_TEST_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = " ".join([
+            "--bootstrap=\"{firmware}\"",
+            "\"{firmware:elf}\"",
+        ]),
+        test_harness = "//sw/host/tests/chip/mem",
+    ),
+    verilator = verilator_params(
+        timeout = "eternal",
+        tags = ["manual"],
+        test_cmd = " ".join([
+            "\"{firmware:elf}\"",
+        ]),
+        test_harness = "//sw/host/tests/chip/mem",
+    ),
+    deps = [
+        "//sw/device/lib/testing/json:command",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/lib/testing/test_framework:ujson_ottf_commands",
@@ -1480,16 +1751,15 @@ opentitan_test(
 opentitan_test(
     name = "flash_ctrl_ops_test",
     srcs = ["flash_ctrl_ops_test.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
-        {
-            "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
     ),
+    # Run also as ROM_EXT stage as test coverage is reduced in silicon owner stage.
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     deps = [
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -1524,6 +1794,7 @@ opentitan_test(
         "//sw/device/lib/testing:isr_testutils",
         "//sw/device/lib/testing:lc_ctrl_testutils",
         "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -1547,10 +1818,15 @@ _FLASH_CTRL_INFO_ACCESS_LC_STATES = get_lc_items(
         ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
         },
         fpga = fpga_params(
             otp = "//hw/ip/otp_ctrl/data:img_{}".format(lc_state),
         ),
+        qemu = qemu_params(
+            otp = "//hw/ip/otp_ctrl/data:img_{}".format(lc_state),
+        ),
         deps = [
             "//hw/top_earlgrey/sw/autogen:top_earlgrey",
             "//sw/device/lib/base:mmio",
@@ -1580,13 +1856,13 @@ test_suite(
         name = "flash_ctrl_info_access_lc_{}_personalized".format(lc_state),
         srcs = ["flash_ctrl_info_access_lc.c"],
         dv = dv_params(
-            otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_{}_manuf_personalized".format(lc_state),
+            otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_{}_manuf_personalized".format(lc_state),
         ),
         exec_env = {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
         },
         fpga = fpga_params(
-            otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_{}_manuf_personalized".format(lc_state),
+            otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_{}_manuf_personalized".format(lc_state),
         ),
         deps = [
             "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -1626,15 +1902,15 @@ test_suite(
 opentitan_test(
     name = "flash_ctrl_clock_freqs_test",
     srcs = ["flash_ctrl_clock_freqs_test.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
     ),
+    # Run also as ROM_EXT stage as test coverage is reduced in silicon owner stage.
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
@@ -1653,17 +1929,19 @@ opentitan_test(
 opentitan_test(
     name = "flash_ctrl_test",
     srcs = ["flash_ctrl_test.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
         },
     ),
-    silicon = silicon_params(tags = ["broken"]),
+    # Run also as ROM_EXT stage as test coverage is reduced in silicon owner stage.
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -1673,6 +1951,7 @@ opentitan_test(
         "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -1708,6 +1987,7 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
             # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
             "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
         },
     ),
     verilator = verilator_params(timeout = "long"),
@@ -1720,6 +2000,7 @@ opentitan_test(
         "//sw/device/lib/dif:flash_ctrl",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -1733,7 +2014,7 @@ opentitan_test(
     fpga = fpga_params(
         changes_otp = True,
         needs_jtag = True,
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_personalized",
         tags = [
             "broken",
             "lc_dev",
@@ -1774,7 +2055,7 @@ opentitan_test(
         # Not compatible with the verilated top level.
         dicts.omit(
             EARLGREY_TEST_ENVS,
-            ["//hw/top_earlgrey:verilator"],
+            ["//hw/top_earlgrey:sim_verilator"],
         ),
         {
             "//hw/top_earlgrey:silicon_creator": None,
@@ -1803,13 +2084,13 @@ opentitan_test(
         test_cmd = """
             --bootstrap="{firmware}"
         """,
-        test_harness = "//sw/host/tests/chip/gpio",
+        test_harness = "//sw/host/tests/chip/gpio:gpio_pinmux",
     ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap={firmware}
         """,
-        test_harness = "//sw/host/tests/chip/gpio",
+        test_harness = "//sw/host/tests/chip/gpio:gpio_pinmux",
     ),
     deps = [
         "//sw/device/lib/dif:gpio",
@@ -1836,13 +2117,13 @@ opentitan_test(
         test_cmd = """
             --bootstrap="{firmware}"
         """,
-        test_harness = "//sw/host/tests/chip/gpio_intr",
+        test_harness = "//sw/host/tests/chip/gpio:gpio_intr",
     ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap={firmware}
         """,
-        test_harness = "//sw/host/tests/chip/gpio_intr",
+        test_harness = "//sw/host/tests/chip/gpio:gpio_intr",
     ),
     deps = [
         "//sw/device/lib/dif:gpio",
@@ -1952,31 +2233,186 @@ opentitan_test(
 opentitan_test(
     name = "keymgr_key_derivation_test",
     srcs = ["keymgr_key_derivation_test.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         {
             # This test is not supported by the silicon_owner_sival_rom_ext
             # configuration.
             "//hw/top_earlgrey:silicon_creator": None,
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
         },
     ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     verilator = verilator_params(timeout = "long"),
     deps = [
-        "//hw/ip/keymgr/data:keymgr_c_regs",
-        "//hw/ip/kmac/data:kmac_c_regs",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "keymgr_derive_sealing_test",
+    srcs = ["keymgr_derive_cdi_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw340_sival",
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+    ],
+    verilator = verilator_params(timeout = "eternal"),
+    deps = [
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:otbn_testutils",
+        "//sw/device/lib/testing:ret_sram_testutils",
+        "//sw/device/lib/testing:rstmgr_testutils",
+        "//sw/device/lib/testing:sram_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/otbn/crypto:x25519_sideload",
+    ],
+)
+
+opentitan_test(
+    name = "keymgr_derive_attestation_test",
+    srcs = ["keymgr_derive_cdi_test.c"],
+    copts = ["-DDERIVE_ATTESTATION"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
+    verilator = verilator_params(timeout = "eternal"),
+    deps = [
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:otbn_testutils",
+        "//sw/device/lib/testing:ret_sram_testutils",
+        "//sw/device/lib/testing:rstmgr_testutils",
+        "//sw/device/lib/testing:sram_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/otbn/crypto:x25519_sideload",
+    ],
+)
+
+otp_json(
+    name = "otp_ctrl_descrambling_otp_json",
+    partitions = [
+        otp_partition(
+            name = "SECRET0",
+            items = {
+                "TEST_UNLOCK_TOKEN": "117dbd7aca3f7de6749f1cb4a7daf4f5",
+                "TEST_EXIT_TOKEN": "1dc4b32c25ef2c31d6313735da1740e4",
+            },
+            lock = False,
+        ),
+        otp_partition(
+            name = "SECRET1",
+            items = {
+                "FLASH_ADDR_KEY_SEED": "434677540fdc9956038c1b4e7bd7394c8251c8921ed1a7fc8ed040844dde2dca",
+                "FLASH_DATA_KEY_SEED": "7cdb1a9d39c20016dcc70e44beeff5f4871b3d2726a673365cc32c34646c9a9f",
+                "SRAM_DATA_KEY_SEED": "57f20b5b2e200c010e83fabc03c68203",
+            },
+            lock = False,
+        ),
+        otp_partition(
+            name = "SECRET2",
+            items = {
+                "RMA_TOKEN": "6ef5b95acb3ded39bed4fd235f6b24d4",
+                "CREATOR_ROOT_KEY_SHARE0": "f915734729d70391ea9f54f370a2fdf8196906bfe0051fa8a9398fab0bba1e23",
+                "CREATOR_ROOT_KEY_SHARE1": "e889c1ccf0f57d6ddda3ceb51b6cbc3bbaa7bc074a97c885d3bd2ecfc0fc7581",
+            },
+            lock = False,
+        ),
+    ],
+)
+
+otp_image(
+    name = "otp_ctrl_descrambling_otp_image",
+    src = "//hw/ip/otp_ctrl/data:otp_json_rma",
+    overlays = STD_OTP_OVERLAYS + [":otp_ctrl_descrambling_otp_json"],
+    visibility = ["//visibility:private"],
+)
+
+opentitan_test(
+    name = "otp_ctrl_descrambling_test",
+    srcs = ["otp_ctrl_descrambling_test.c"],
+    dv = dv_params(
+        otp = ":otp_ctrl_descrambling_otp_image",
+    ),
+    exec_env = dicts.add(
+        {
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_test_rom": None,
+            "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+            # This test is not expected to run on silicon, as it would require a very specific OTP configuration that is only useful for this test.
+        },
+    ),
+    fpga = fpga_params(
+        otp = ":otp_ctrl_descrambling_otp_image",
+    ),
+    qemu = qemu_params(
+        otp = ":otp_ctrl_descrambling_otp_image",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:macros",
+        "//sw/device/lib/dif:otp_ctrl",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_binary(
+    name = "otp_ctrl_rot_auth_config_test",
+    testonly = True,
+    srcs = ["otp_ctrl_rot_auth_config_test.c"],
+    exec_env = [
+        "//hw/top_earlgrey:sim_dv",
+    ],
+    kind = "ram",
+    linker_script = "//sw/device/examples/sram_program:sram_program_linker_script",
+    deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:macros",
-        "//sw/device/lib/dif:keymgr",
-        "//sw/device/lib/dif:kmac",
-        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing:keymgr_testutils",
-        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_test_config",
+        "//sw/device/lib/testing/test_framework:status",
+        "//sw/device/silicon_creator/manuf/lib:individualize",
+        "//sw/device/silicon_creator/manuf/lib:individualize_sw_cfg_sv00",
+        "//sw/device/silicon_creator/manuf/lib:otp_fields",
+        "//sw/device/silicon_creator/manuf/lib:sram_start",
     ],
 )
 
@@ -1990,6 +2426,11 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     deps = [
         "//hw/ip/aes/data:aes_c_regs",
         "//hw/ip/keymgr/data:keymgr_c_regs",
@@ -2020,6 +2461,11 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/ip/keymgr/data:keymgr_c_regs",
@@ -2045,8 +2491,14 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
+    # Run in both Owner and non-Owner envs to test the keymgr initialization
+    run_in_ci = [
+        "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys",
+    ],
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/ip/otbn/data:otbn_c_regs",
@@ -2060,6 +2512,7 @@ opentitan_test(
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing:otbn_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/otbn/crypto:x25519_sideload",
     ],
@@ -2070,6 +2523,7 @@ opentitan_test(
     srcs = ["keymgr_sideload_otbn_test.c"],
     copts = ["-DTEST_SIMPLE_CASE_ONLY"],
     exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
@@ -2095,38 +2549,138 @@ opentitan_test(
     ],
 )
 
-opentitan_test(
+_KMAC_APP_ROM_LIST = [
+    ("//sw/device/lib/testing/test_rom:test_rom_sim_verilator_hashfile", "sim_verilator"),
+    ("//sw/device/lib/testing/test_rom:test_rom_fpga_cw310_hashfile", "fpga_cw310_test_rom"),
+    ("//sw/device/silicon_creator/rom:mask_rom_fpga_cw310_hashfile", "fpga_cw310_rom_with_fake_keys"),
+    ("//sw/device/silicon_creator/rom:mask_rom_fpga_cw310_hashfile", "fpga_cw310_sival"),
+    ("//sw/device/silicon_creator/rom:mask_rom_fpga_cw340_hashfile", "fpga_cw340_sival"),
+    ("//sw/device/lib/testing/test_rom:test_rom_sim_dv_hashfile", "sim_dv"),
+]
+
+[
+    opentitan_test(
+        name = "kmac_app_rom_test_{}".format(exec_env),
+        srcs = [
+            "kmac_app_rom_test.c",
+            hashfile,
+        ],
+        exec_env = {
+            "//hw/top_earlgrey:{}".format(exec_env): None,
+        },
+        deps = [
+            "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+            "//sw/device/lib/base:mmio",
+            "//sw/device/lib/dif:rom_ctrl",
+            "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing/test_framework:ottf_main",
+        ],
+    )
+    for (hashfile, exec_env) in _KMAC_APP_ROM_LIST
+]
+
+test_suite(
     name = "kmac_app_rom_test",
-    srcs = ["kmac_app_rom_test.c"],
-    exec_env = EARLGREY_TEST_ENVS,
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:mmio",
-        "//sw/device/lib/dif:rom_ctrl",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing/test_framework:ottf_main",
+    tests = [
+        "kmac_app_rom_test_{}".format(exec_env)
+        for (_, exec_env) in _KMAC_APP_ROM_LIST
     ],
 )
 
 opentitan_test(
-    name = "kmac_entropy_test",
-    srcs = ["kmac_entropy_test.c"],
-    exec_env = EARLGREY_TEST_ENVS,
-    # TODO(#15530): EDN doesn't timeout on FPGA
-    fpga = fpga_params(tags = ["broken"]),
+    name = "kmac_endianess_test",
+    srcs = ["kmac_endianess_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:macros",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:kmac",
-        "//sw/device/lib/runtime:irq",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
 opentitan_test(
-    name = "kmac_idle_test",
-    srcs = ["kmac_idle_test.c"],
+    name = "kmac_entropy_test",
+    srcs = ["kmac_entropy_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+        },
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/runtime:irq",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "kmac_error_conditions_test",
+    srcs = ["kmac_error_conditions_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+        },
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:clkmgr",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:kmac_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "kmac_entropy_stress_test",
+    srcs = ["kmac_entropy_stress_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+        },
+    ),
+    verilator = verilator_params(timeout = "eternal"),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "kmac_idle_test",
+    srcs = ["kmac_idle_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
@@ -2145,6 +2699,35 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "kmac_kmac_key_sideload_test",
+    srcs = ["kmac_kmac_key_sideload_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
+        },
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:rstmgr",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:keymgr_testutils",
+        "//sw/device/lib/testing:kmac_testutils",
+        "//sw/device/lib/testing:ret_sram_testutils",
+        "//sw/device/lib/testing:rstmgr_testutils",
+        "//sw/device/lib/testing:sram_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
 opentitan_test(
     name = "kmac_mode_cshake_test",
     srcs = ["kmac_mode_cshake_test.c"],
@@ -2212,14 +2795,7 @@ opentitan_test(
 opentitan_test(
     name = "lc_ctrl_otp_hw_cfg0_test",
     srcs = ["lc_ctrl_otp_hw_cfg0_test.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = EARLGREY_TEST_ENVS,
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:bitfield",
@@ -2255,7 +2831,7 @@ opentitan_test(
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing:rv_plic_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
-        "//sw/otbn/crypto:p256_ecdsa",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
@@ -2267,6 +2843,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     verilator = verilator_params(timeout = "long"),
@@ -2279,6 +2856,7 @@ opentitan_test(
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing:otbn_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/otbn/code-snippets:err_test",
     ],
@@ -2288,14 +2866,14 @@ opentitan_test(
     name = "otbn_mem_scramble_test",
     srcs = ["otbn_mem_scramble_test.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
         },
     ),
-    # TODO(#12486) [bazel] targets in sw/device/tests failing on cw310 and verilator when built by bazel
-    fpga = fpga_params(tags = ["broken"]),
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -2384,6 +2962,8 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
@@ -2395,6 +2975,7 @@ opentitan_test(
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing:otbn_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/otbn/code-snippets:barrett384",
         "//sw/otbn/code-snippets:err_test",
@@ -2434,6 +3015,9 @@ opentitan_test(
     fpga = fpga_params(
         changes_otp = True,
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:bitfield",
@@ -2530,6 +3114,45 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "pwm_smoketest",
+    srcs = ["pwm_smoketest.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:silicon_owner_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+        },
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/pwm_smoketest",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/pwm_smoketest",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:gpio",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:pwm",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:ibex",
+        "//sw/device/lib/runtime:irq",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_utils",
+    ],
+)
+
 cc_library(
     name = "pwrmgr_sleep_resets_lib",
     srcs = ["pwrmgr_sleep_resets_lib.c"],
@@ -2564,13 +3187,11 @@ cc_library(
 opentitan_test(
     name = "pwrmgr_all_reset_reqs_test",
     srcs = ["pwrmgr_all_reset_reqs_test.c"],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
@@ -2586,6 +3207,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_resets",
     ),
+    # FIXME this test is also broken in Verilator for the same reason as in
+    # sival ROM_EXT above. Remove this line when fixed. See #21706.
+    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -2622,6 +3246,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_resets",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -2658,6 +3285,9 @@ opentitan_test(
         test_cmd = "--bootstrap={firmware}",
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_resets",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -2690,6 +3320,9 @@ opentitan_test(
         test_cmd = "--bootstrap={firmware}",
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_resets",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -2729,6 +3362,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_por",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
@@ -2767,6 +3403,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_por",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:abs_mmio",
@@ -2800,6 +3439,15 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
     ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
+    ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/ip_autogen/pwrmgr:pwrmgr_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -2832,6 +3480,15 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
     ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap={firmware}
+        """,
+        test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
+    ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/ip_autogen/pwrmgr:pwrmgr_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -2872,6 +3529,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/ip_autogen/pwrmgr:pwrmgr_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -2918,6 +3578,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/pwrmgr:sleep_all_wakeups",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/ip_autogen/pwrmgr:pwrmgr_c_regs",
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -2936,6 +3599,46 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "sleep_pin_wake_test",
+    srcs = ["sleep_pin_wake_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/gpio:sleep_pin_wake",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/gpio:sleep_pin_wake",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/runtime:irq",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing:isr_testutils",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing:rand_testutils",
+        "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_utils",
+    ],
+)
+
 opentitan_test(
     name = "pwrmgr_sensor_ctrl_deep_sleep_wake_up",
     srcs = ["pwrmgr_sensor_ctrl_deep_sleep_wake_up.c"],
@@ -2966,7 +3669,12 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
-    verilator = verilator_params(timeout = "long"),
+    verilator = verilator_params(
+        timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
+    ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
@@ -3013,6 +3721,8 @@ opentitan_test(
             "//hw/top_earlgrey:fpga_cw310_sival": None,
         },
     ),
+    # Broken on Verilator. See #24182.
+    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//sw/device/lib/dif:aon_timer",
         "//sw/device/lib/dif:pwrmgr",
@@ -3196,21 +3906,31 @@ opentitan_test(
     name = "spi_device_tpm_tx_rx_test",
     srcs = ["spi_device_tpm_tx_rx_test.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_dv": None,
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+            "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:sim_qemu_sival_rom_ext": None,
+        },
     ),
     fpga = fpga_params(
         # This test requires the spi full duplex on the hyperdebug board.
-        tags = [
-            "broken",
-            "manual",
-        ],
+        tags = ["manual"],
         test_cmd = """
             --bootstrap="{firmware}"
             "{firmware:elf}"
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_device_tpm_test",
     ),
+    qemu = qemu_params(
+        test_cmd = """
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/spi_device:spi_device_tpm_test",
+    ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
@@ -3218,6 +3938,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_device_tpm_test",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -3229,6 +3952,7 @@ opentitan_test(
         "//sw/device/lib/runtime:irq",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:isr_testutils",
+        "//sw/device/lib/testing:spi_device_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/lib/testing/test_framework:status",
     ],
@@ -3248,6 +3972,12 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_device_flash_smoketest",
     ),
+    qemu = qemu_params(
+        test_cmd = """
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/spi_device:spi_device_flash_smoketest",
+    ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap={firmware}
@@ -3255,6 +3985,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_device_flash_smoketest",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -3272,6 +4005,36 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "spi_device_ujson_console_test",
+    srcs = ["spi_device_ujson_console_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_CW340_TEST_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        },
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/spi_device_ujson_console_test",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:spi_device",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing/json:command",
+        "//sw/device/lib/testing/json:provisioning_data",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ujson_ottf_commands",
+    ],
+)
+
 opentitan_test(
     name = "spi_device_sleep_test",
     srcs = ["spi_device_sleep_test.c"],
@@ -3344,7 +4107,12 @@ opentitan_test(
     name = "spi_host_smoketest",
     srcs = ["spi_host_smoketest.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
+        # This test requires a flash connected to the SPI bus,
+        # which is not available in Verilator.
+        dicts.omit(
+            EARLGREY_TEST_ENVS,
+            ["//hw/top_earlgrey:sim_verilator"],
+        ),
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     fpga = fpga_params(timeout = "moderate"),
@@ -3369,7 +4137,12 @@ opentitan_test(
     name = "spi_host_winbond_flash_test",
     srcs = ["spi_host_winbond_flash_test.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
+        dicts.omit(
+            EARLGREY_TEST_ENVS,
+            # This test requires an SPI flash on the bus, and therefore
+            # cannot be tested in Verilator where this is not available.
+            ["//hw/top_earlgrey:sim_verilator"],
+        ),
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     deps = [
@@ -3406,11 +4179,18 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_host_config_test",
     ),
-    deps = [
-        ":spi_host_flash_test_impl",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/arch:device",
-        "//sw/device/lib/base:memory",
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/spi_device:spi_host_config_test",
+    ),
+    deps = [
+        ":spi_host_flash_test_impl",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:spi_host",
         "//sw/device/lib/runtime:hart",
@@ -3451,7 +4231,7 @@ opentitan_test(
 
 opentitan_test(
     name = "sensor_ctrl_alert_test",
-    srcs = ["sensor_ctrl_alerts.c"],
+    srcs = ["sensor_ctrl_alerts_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
@@ -3485,7 +4265,7 @@ opentitan_test(
 
 opentitan_test(
     name = "sensor_ctrl_wakeup_test",
-    srcs = ["sensor_ctrl_wakeup.c"],
+    srcs = ["sensor_ctrl_wakeup_test.c"],
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
@@ -3498,6 +4278,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//hw/top_earlgrey/ip/sensor_ctrl/data:sensor_ctrl_c_regs",
@@ -3593,6 +4376,87 @@ cc_library(
     ],
 )
 
+opentitan_test(
+    name = "ottf_console_with_gpio_tx_indicator_test",
+    srcs = ["ottf_console_with_gpio_tx_indicator_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys": None,
+    },
+    fpga = fpga_params(
+        # We run this as part of the manuf test suite as we want to run it in
+        # the hyper310 exec_env as this is most realistic of a provisioning
+        # scenario where this feature will be used. Without this tag, the test
+        # is not run in CI which causes a CI error ("Verify FPGA Jobs" check
+        # will fail).
+        tags = ["manuf"],
+        test_cmd = """
+            --clear-bitstream
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/ottf_console_with_gpio_tx_indicator",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing/json:provisioning_data",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+    ],
+)
+
+opentitan_test(
+    name = "spi_device_ottf_console_test",
+    srcs = ["spi_device_ottf_console_test.c"],
+    exec_env = dicts.add(
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        },
+        EARLGREY_CW340_TEST_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            "{firmware:elf}"
+        """,
+        test_harness = "//sw/host/tests/chip/spi_device_ottf_console",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:spi_device",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "ottf_dual_console_test",
+    srcs = ["ottf_dual_console_test.c"],
+    exec_env = dicts.add(
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        },
+        EARLGREY_CW340_TEST_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+        """,
+        test_harness = "//sw/host/tests/chip/ottf_dual_console",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:uart_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
 opentitan_test(
     name = "sram_ctrl_sleep_sram_ret_contents_no_scramble_test",
     srcs = ["sram_ctrl_sleep_sram_ret_contents_no_scramble_test.c"],
@@ -3606,6 +4470,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -3626,6 +4493,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -3711,6 +4581,15 @@ opentitan_test(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -3739,9 +4618,22 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/usb:usb_harness",
     ),
+    qemu = qemu_params(
+        globals = {
+            # We do not need a full host for this test so just drive VBUS
+            # in override mode.
+            "ot-usbdev.vbus-override": "true",
+        },
+        test_cmd = """
+            --vbus-sense-en=VBUS_SENSE_EN
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
+            --timeout=30s
             --vbus-sense-en=VBUS_SENSE_EN
             --vbus-sense=VBUS_SENSE
             --no-wait-for-usb-device
@@ -3865,13 +4757,29 @@ opentitan_test(
     name = "usbdev_aon_wake_reset_test",
     srcs = ["usbdev_aon_wake_reset_test.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
+        dicts.omit(
+            EARLGREY_TEST_ENVS,
+            [
+                "//hw/top_earlgrey:sim_dv",
+                "//hw/top_earlgrey:sim_verilator",
+            ],
+        ),
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     fpga = fpga_params(
         tags = ["manual"],
         test_cmd = """
             --bootstrap="{firmware}"
+            --wake=reset
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_aon_wake",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+            --wake=reset
         """,
         test_harness = "//sw/host/tests/chip/usb:usbdev_aon_wake",
     ),
@@ -3901,6 +4809,14 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/usb:usb_harness",
     ),
+    qemu = qemu_params(
+        # Require the PHY_PINS_SENSE register.
+        tags = ["broken"],
+        test_cmd = """
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
@@ -3910,6 +4826,8 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/usb:usb_harness",
     ),
+    # Broken on Verilator. See #24182.
+    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/dif:pinmux",
@@ -3935,6 +4853,12 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/usb:usb_harness",
     ),
+    qemu = qemu_params(
+        test_cmd = """
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
@@ -3944,7 +4868,11 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/usb:usb_harness",
     ),
-    verilator = verilator_params(timeout = "long"),
+    verilator = verilator_params(
+        timeout = "long",
+        # Broken on Verilator. See #24182.
+        tags = ["broken"],
+    ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/dif:pinmux",
@@ -3964,7 +4892,21 @@ opentitan_test(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
-    fpga = fpga_params(tags = ["manual"]),
+    fpga = fpga_params(
+        tags = ["manual"],
+        test_cmd = """
+            --bootstrap="{firmware}"
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_smoketest",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_smoketest",
+    ),
     verilator = verilator_params(timeout = "long"),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
@@ -3979,6 +4921,25 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "usbdev_mem_test",
+    srcs = ["usbdev_mem_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:usbdev",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing:usb_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
 opentitan_test(
     name = "usbdev_mixed_test",
     srcs = ["usbdev_mixed_test.c"],
@@ -4046,79 +5007,447 @@ opentitan_test(
     ),
     verilator = verilator_params(timeout = "long"),
     deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing:pinmux_testutils",
-        "//sw/device/lib/testing:usb_testutils",
-        "//sw/device/lib/testing:usb_testutils_streams",
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing:usb_testutils",
+        "//sw/device/lib/testing:usb_testutils_streams",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_stream_test",
+    srcs = ["usbdev_stream_test.c"],
+    data = [
+        ":usbdev_stream_host_harness",
+    ],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --exec=$(rootpath :usbdev_stream_host_harness)
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+            --exec=$(rootpath :usbdev_stream_host_harness)
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing:usb_testutils",
+        "//sw/device/lib/testing:usb_testutils_streams",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_toggle_restore_test",
+    srcs = ["usbdev_toggle_restore_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+            --no-wait-for-usb-device
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:usbdev",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_logging_test",
+    srcs = ["usbdev_logging_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+        "//hw/top_earlgrey:sim_dv": None,
+        "//hw/top_earlgrey:sim_verilator": None,
+    },
+    fpga = fpga_params(
+        timeout = "eternal",
+        tags = ["manual"],
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+        # Broken on Verilator. See #24182.
+        tags = ["broken"],
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing:usb_logging",
+        "//sw/device/lib/testing:usb_testutils",
+        "//sw/device/lib/testing:usb_testutils_streams",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+cc_library(
+    name = "usbdev_suspend",
+    srcs = ["usbdev_suspend.c"],
+    hdrs = ["usbdev_suspend.h"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/dif:rstmgr",
+        "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/dif:usbdev",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:isr_testutils",
+        "//sw/device/lib/testing:pinmux_testutils",
+        "//sw/device/lib/testing:pwrmgr_testutils",
+        "//sw/device/lib/testing:rstmgr_testutils",
+        "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing:sram_ctrl_testutils",
+        "//sw/device/lib/testing:usb_testutils",
+        "//sw/device/lib/testing:usb_testutils_streams",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_suspend_resume_test",
+    srcs = [
+        "usbdev_suspend_resume_test.c",
+    ],
+    cw310 = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=suspend
+            --init-phase=suspend
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=suspend
+            --init-phase=suspend
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//sw/device/tests:usbdev_suspend",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_sleep_resume_test",
+    srcs = [
+        "usbdev_sleep_resume_test.c",
+    ],
+    cw310 = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=sleep-resume
+            --init-phase=sleep-resume
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=sleep-resume
+            --init-phase=sleep-resume
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_sleep_reset_test",
+    srcs = [
+        "usbdev_sleep_reset_test.c",
+    ],
+    cw310 = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=sleep-reset
+            --init-phase=sleep-resume
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=sleep-reset
+            --init-phase=sleep-resume
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_sleep_disconnect_test",
+    srcs = [
+        "usbdev_sleep_disconnect_test.c",
+    ],
+    cw310 = fpga_params(
+        timeout = "eternal",
+        tags = ["manual"],
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-resume
+            --init-phase=sleep-disconnect
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-resume
+            --init-phase=sleep-disconnect
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_deep_resume_test",
+    srcs = [
+        "usbdev_deep_resume_test.c",
+    ],
+    cw310 = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-resume
+            --init-phase=deep-resume
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-resume
+            --init-phase=deep-resume
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
+    ],
+)
+
+opentitan_test(
+    name = "usbdev_deep_reset_test",
+    srcs = [
+        "usbdev_deep_reset_test.c",
+    ],
+    cw310 = fpga_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-reset
+            --init-phase=deep-resume
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=deep-reset
+            --init-phase=deep-resume
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    verilator = verilator_params(timeout = "long"),
+    deps = [
         "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
     ],
 )
 
 opentitan_test(
-    name = "usbdev_stream_test",
-    srcs = ["usbdev_stream_test.c"],
-    data = [
-        ":usbdev_stream_host_harness",
+    name = "usbdev_deep_disconnect_test",
+    srcs = [
+        "usbdev_deep_disconnect_test.c",
     ],
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
-    ),
-    fpga = fpga_params(
+    cw310 = fpga_params(
         test_cmd = """
             --bootstrap="{firmware}"
-            --exec=$(rootpath :usbdev_stream_host_harness)
+            --fin-phase=shutdown
+            --init-phase=deep-disconnect
         """,
-        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
+    ),
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
     ),
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
+            --fin-phase=shutdown
+            --init-phase=deep-disconnect
             --vbus-sense-en=VBUS_SENSE_EN
             --vbus-sense=VBUS_SENSE
-            --exec=$(rootpath :usbdev_stream_host_harness)
         """,
-        test_harness = "//sw/host/tests/chip/usb:usb_harness",
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
     ),
     verilator = verilator_params(timeout = "long"),
     deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing:pinmux_testutils",
-        "//sw/device/lib/testing:usb_testutils",
-        "//sw/device/lib/testing:usb_testutils_streams",
         "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
     ],
 )
 
 opentitan_test(
-    name = "usbdev_logging_test",
-    srcs = ["usbdev_logging_test.c"],
-    exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
-        "//hw/top_earlgrey:sim_dv": None,
-        "//hw/top_earlgrey:sim_verilator": None,
-    },
-    fpga = fpga_params(
-        timeout = "eternal",
-        tags = ["manual"],
+    name = "usbdev_suspend_full_test",
+    srcs = [
+        "usbdev_suspend_full_test.c",
+    ],
+    # This test cannot be implemented on the CW310/CW340 because
+    # there is no VBUS control so we cannot disconnect the device.
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap="{firmware}"
+            --fin-phase=shutdown
+            --init-phase=suspend
+            --vbus-sense-en=VBUS_SENSE_EN
+            --vbus-sense=VBUS_SENSE
+        """,
+        test_harness = "//sw/host/tests/chip/usb:usbdev_suspend",
     ),
     verilator = verilator_params(timeout = "long"),
     deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/runtime:print",
-        "//sw/device/lib/testing:pinmux_testutils",
-        "//sw/device/lib/testing:usb_logging",
-        "//sw/device/lib/testing:usb_testutils",
-        "//sw/device/lib/testing:usb_testutils_streams",
         "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:usbdev_suspend",
     ],
 )
 
@@ -4285,6 +5614,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
@@ -4346,7 +5676,7 @@ opentitan_test(
         },
     ),
     fpga = fpga_params(
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
         test_cmd = """
             --bootstrap="{firmware}"
         """,
@@ -4394,12 +5724,14 @@ opentitan_test(
         "//sw/device/lib/dif:uart",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:alert_handler_testutils",
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing:hmac_testutils",
         "//sw/device/lib/testing:i2c_testutils",
         "//sw/device/lib/testing:otbn_testutils_rsa",
         "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing:spi_device_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -4433,9 +5765,13 @@ opentitan_test(
     silicon = silicon_params(
         test_cmd = """
             --bootstrap="{firmware}"
+            "{firmware:elf}"
         """,
         test_harness = "//sw/host/tests/chip/spi_device:spi_passthru",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//sw/device/lib/arch:device",
         "//sw/device/lib/dif:gpio",
@@ -4486,12 +5822,12 @@ opentitan_test(
 )
 
 _SIVAL_OTP_IMAGE = {
-    "test_unlocked1": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_unlocked1_manuf_individualized",
-    "test_locked0": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_test_locked0_manuf_initialized",
-    "dev": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized",
-    "prod": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
-    "prod_end": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_end_manuf_personalized",
-    "rma": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_rma_manuf_personalized",
+    "test_unlocked1": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked1_manuf_individualized",
+    "test_locked0": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_locked0_manuf_initialized",
+    "dev": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_personalized",
+    "prod": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
+    "prod_end": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_end_manuf_personalized",
+    "rma": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_rma_manuf_personalized",
 }
 
 _RV_DM_JTAG_LC_STATES = get_lc_items(
@@ -4517,7 +5853,7 @@ _RV_DM_TEST_CONFIGURATIONS = [
         "name": "dev_rv_dm_delayed_enabled",
         "lc_state": "dev",
         "rv_dm_delayed_en": "--rv-dm-delayed-enable",
-        "otp": "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_dev_manuf_personalized_enable_rv_dm_late_debug_enable",
+        "otp": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_dev_manuf_personalized_enable_rv_dm_late_debug_enable",
     },
     {
         "name": "rma",
@@ -4532,7 +5868,9 @@ _RV_DM_TEST_CONFIGURATIONS = [
         name = "rv_dm_csr_rw_{}".format(test_cfg["name"]),
         srcs = ["rv_dm_delayed_enable.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
             "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:sim_qemu_sival": None,
         },
         fpga = fpga_params(
             needs_jtag = True,
@@ -4547,6 +5885,21 @@ _RV_DM_TEST_CONFIGURATIONS = [
             """,
             test_harness = "//sw/host/tests/chip/rv_dm:csr_rw",
         ),
+        qemu = qemu_params(
+            needs_jtag = True,
+            otp = test_cfg["otp"],
+            rv_dm_delayed_en = test_cfg["rv_dm_delayed_en"],
+            tags = [
+                "lc_{}".format(test_cfg["lc_state"]),
+                # Delayed enable currently not working in QEMU.
+                "broken" if test_cfg["rv_dm_delayed_en"] != "" else "",
+            ],
+            test_cmd = """
+                --bootstrap="{firmware}"
+                {rv_dm_delayed_en}
+            """,
+            test_harness = "//sw/host/tests/chip/rv_dm:csr_rw",
+        ),
         deps = [
             "//sw/device/lib/base:multibits",
             "//sw/device/lib/dif:lc_ctrl",
@@ -4572,22 +5925,33 @@ test_suite(
 [
     opentitan_test(
         name = "rv_dm_mem_access_{}".format(test_cfg["name"]),
-        srcs = ["example_test_from_flash.c"],
+        srcs = ["rv_dm_delayed_enable.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
             "//hw/top_earlgrey:fpga_cw340_sival": None,
         },
         fpga = fpga_params(
             timeout = "moderate",
             needs_jtag = True,
             otp = test_cfg["otp"],
+            rv_dm_delayed_en = test_cfg["rv_dm_delayed_en"],
             tags = [
                 "lc_{}".format(test_cfg["lc_state"]),
             ],
-            test_cmd = " --rom={rom:binary}",
+            test_cmd = """
+                --rom={rom:binary}
+                --bootstrap="{firmware}"
+                {rv_dm_delayed_en}
+            """,
             test_harness = "//sw/host/tests/chip/rv_dm:mem_access",
         ),
         deps = [
+            "//sw/device/lib/base:multibits",
+            "//sw/device/lib/dif:lc_ctrl",
+            "//sw/device/lib/dif:rv_dm",
+            "//sw/device/lib/runtime:hart",
             "//sw/device/lib/runtime:log",
+            "//sw/device/lib/testing:lc_ctrl_testutils",
             "//sw/device/lib/testing/test_framework:ottf_main",
         ],
     )
@@ -4608,6 +5972,7 @@ test_suite(
         name = "rv_dm_jtag_{}".format(lc_state),
         srcs = ["example_test_from_flash.c"],
         exec_env = {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
             "//hw/top_earlgrey:fpga_cw340_sival": None,
         },
         fpga = fpga_params(
@@ -4637,10 +6002,8 @@ test_suite(
 
 _RV_DM_TAP_SEL_LC_STATES = get_lc_items(
     CONST.LCV.TEST_UNLOCKED1,
-    CONST.LCV.TEST_LOCKED0,
     CONST.LCV.DEV,
     CONST.LCV.PROD,
-    CONST.LCV.PROD_END,
     CONST.LCV.RMA,
 )
 
@@ -4651,6 +6014,7 @@ _RV_DM_TAP_SEL_LC_STATES = get_lc_items(
         exec_env = dicts.add(
             EARLGREY_SILICON_OWNER_ROM_EXT_ENVS if lc_state == "prod" else {},
             {
+                "//hw/top_earlgrey:fpga_cw310_sival": None,
                 "//hw/top_earlgrey:fpga_cw340_sival": None,
             },
         ),
@@ -4717,6 +6081,7 @@ _LC_STATES_DEBUG_DISALLOWED = [
         exec_env = dicts.add(
             EARLGREY_SILICON_OWNER_ROM_EXT_ENVS if lc_state == "prod" else {},
             {
+                "//hw/top_earlgrey:fpga_cw310_sival": None,
                 "//hw/top_earlgrey:fpga_cw340_sival": None,
             },
         ),
@@ -4753,6 +6118,7 @@ test_suite(
         exec_env = dicts.add(
             EARLGREY_SILICON_OWNER_ROM_EXT_ENVS if lc_state == "prod" else {},
             {
+                "//hw/top_earlgrey:fpga_cw310_sival": None,
                 "//hw/top_earlgrey:fpga_cw340_sival": None,
             },
         ),
@@ -5165,11 +6531,10 @@ opentitan_test(
     srcs = [
         "i2c_target_test.c",
     ],
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": "broken",
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
         },
     ),
     fpga = fpga_params(
@@ -5270,6 +6635,9 @@ opentitan_test(
         ]),
         test_harness = "//sw/host/tests/chip/example_sival",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//sw/device/lib/testing/test_framework:ottf_main",
         "//sw/device/lib/testing/test_framework:ottf_utils",
@@ -5282,7 +6650,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5319,7 +6687,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5357,7 +6725,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5396,7 +6764,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5434,7 +6802,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5476,7 +6844,7 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
-            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
             "//hw/top_earlgrey:sim_dv": None,
         },
     ),
@@ -5578,6 +6946,9 @@ opentitan_test(
         test_cmd = "--elf={firmware}",
         test_harness = "//sw/host/tests/chip/rv_core_ibex_isa",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:otp_ctrl_testutils",
@@ -5663,6 +7034,9 @@ opentitan_test(
         test_cmd = "--elf={firmware}",
         test_harness = "//sw/host/tests/chip/rv_core_ibex_epmp",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:otp_ctrl_testutils",
@@ -5728,6 +7102,9 @@ opentitan_test(
         ]),
         test_harness = "//sw/host/tests/chip/uart:uart_tx_rx",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/ip/lc_ctrl/data:lc_ctrl_c_regs",
         "//hw/top_earlgrey/ip/pinmux/data/autogen:pinmux_c_regs",
@@ -5782,6 +7159,9 @@ opentitan_test(
         test_cmd = "--elf={sram_program}",
         test_harness = "//sw/host/tests/chip/rv_core_ibex_epmp",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:check",
@@ -5821,7 +7201,10 @@ opentitan_test(
     name = "rv_core_ibex_mem_test_prod",
     srcs = ["rv_core_ibex_mem_test.c"],
     exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
+        dicts.omit(
+            EARLGREY_TEST_ENVS,
+            ["//hw/top_earlgrey:sim_verilator"],
+        ),
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     deps = [
@@ -5860,8 +7243,6 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
     fpga = fpga_params(
-        # FIXME broken in sival ROM_EXT, change this line when fixed. See #21706.
-        tags = ["broken"],
         test_cmd = " ".join([
             "--bootstrap=\"{firmware}\"",
             "--firmware-elf=\"{firmware:elf}\"",
@@ -5875,6 +7256,9 @@ opentitan_test(
         ]),
         test_harness = "//sw/host/tests/chip/uart:uart_baud_rate",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -5916,6 +7300,9 @@ opentitan_test(
         ]),
         test_harness = "//sw/host/tests/chip/uart:uart_loopback",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -5939,6 +7326,9 @@ opentitan_test(
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
+    # This takes around 2 hours to run on Verilator, and so should only be
+    # run manually for debugging purposes.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         ":otbn_randomness_impl",
         "//hw/ip/entropy_src/data:entropy_src_c_regs",
@@ -5992,6 +7382,9 @@ opentitan_test(
         ]),
         test_harness = "//sw/host/tests/chip/uart:uart_parity_break",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
@@ -6011,6 +7404,7 @@ opentitan_test(
     name = "sram_ctrl_scrambled_access_test",
     srcs = ["sram_ctrl_scrambled_access_test.c"],
     exec_env = dicts.add(
+        EARLGREY_CW340_TEST_ENVS,
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
@@ -6025,6 +7419,7 @@ opentitan_test(
         "//sw/device/lib/testing:flash_ctrl_testutils",
         "//sw/device/lib/testing:rstmgr_testutils",
         "//sw/device/lib/testing:sram_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_alerts",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -6036,6 +7431,8 @@ opentitan_test(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
     ),
+    # Broken on Verilator. See #24182.
+    verilator = verilator_params(tags = ["broken"]),
     deps = [
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:pwrmgr",
@@ -6081,7 +7478,7 @@ opentitan_test(
     fpga = fpga_params(
         timeout = "moderate",
         needs_jtag = True,
-        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_rma_manuf_personalized",
+        otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_rma_manuf_personalized",
         test_cmd = " ".join([
             "--bootstrap=\"{firmware}\"",
             "--firmware-elf=\"{firmware:elf}\"",
@@ -6109,6 +7506,10 @@ opentitan_test(
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+        },
     ),
     fpga = fpga_params(
         test_cmd = """
@@ -6122,6 +7523,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/gpio:sleep_pin_mio_dio_val",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
@@ -6163,6 +7567,9 @@ opentitan_test(
         """,
         test_harness = "//sw/host/tests/chip/gpio:sleep_pin_retention",
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/base:mmio",
@@ -6179,3 +7586,193 @@ opentitan_test(
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
+
+opentitan_test(
+    name = "pattgen_ios_test",
+    srcs = ["pattgen_ios_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival": None,
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:sim_dv": None,
+        },
+    ),
+    fpga = fpga_params(
+        test_cmd = """
+            --bootstrap={firmware}
+            --firmware-elf=\"{firmware:elf}\"
+        """,
+        test_harness = "//sw/host/tests/chip/pattgen:pattgen_ios",
+    ),
+    silicon = silicon_params(
+        test_cmd = """
+            --bootstrap={firmware}
+            --firmware-elf=\"{firmware:elf}\"
+        """,
+        test_harness = "//sw/host/tests/chip/pattgen:pattgen_ios",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:pattgen",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:irq",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_utils",
+    ],
+)
+
+opentitan_test(
+    name = "hmac_error_conditions_test",
+    srcs = ["hmac_error_conditions_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:hmac",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:hmac_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "hmac_endianness_test",
+    srcs = ["hmac_endianness_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:sim_verilator": None,
+            "//hw/top_earlgrey:fpga_cw340_sival": None,
+        },
+    ),
+    verilator = verilator_params(
+        timeout = "long",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:hmac",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:hmac_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+cc_library(
+    name = "rom_exit_immediately_lib",
+    srcs = ["rom_exit_immediately.S"],
+    target_compatible_with = [OPENTITAN_CPU],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/silicon_creator/lib/base:static_critical",
+    ],
+)
+
+opentitan_test(
+    name = "rom_exit_immediately",
+    exec_env = {
+        "//hw/top_earlgrey:sim_qemu_base": None,
+    },
+    kind = "rom",
+    linker_script = "//sw/device/lib/testing/test_rom:linker_script",
+    qemu = qemu_params(
+        # This test doesn't print `PASS!`, just writes the test status.
+        test_harness = "//sw/host/tests/qemu:test_status",
+    ),
+    deps = [":rom_exit_immediately_lib"],
+)
+
+opentitan_test(
+    name = "sigverify_parallel_test",
+    srcs = [
+        # This file was generated with:
+        # dd if=/dev/random of=data.bin bs=64k count=1
+        # ./util/sh/scripts/bin2c.sh -i data.bin -o sigverify_parallel_data.h -n sigverify_parallel_data
+        "sigverify_parallel_data.h",
+        # The digest file was generated with:
+        # sha256sum data.bin | awk '{print toupper($1)}' | basenc -d --base16 >data.digest
+        # ./util/sh/scripts/bin2c.sh -i data.digest -o sigverify_parallel_digest.h -n sigverify_parallel_digest
+        "sigverify_parallel_digest.h",
+        # The ECDSA signature was generated with:
+        # opentitantool ecdsa sign \
+        #         sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der \
+        #         --input data.digest --output data.ecdsa_sig
+        # ./util/sh/scripts/bin2c.sh -i data.ecdsa_sig -o sigverify_parallel_ecdsa.h -n sigverify_parallel_ecdsa
+        "sigverify_parallel_ecdsa.h",
+        # The SPX signature was generated with:
+        # opentitantool spx sign \
+        #        data.digest sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem \
+        #        --output data.spx_sig --domain PrehashedSha256
+        # ./util/sh/scripts/bin2c.sh -i data.spx_sig -o sigverify_parallel_spx.h -n sigverify_parallel_spx
+        "sigverify_parallel_spx.h",
+        "sigverify_parallel_test.c",
+    ],
+    # This test requires the ROM to have loaded the OTBN boot services program.
+    # Since the verilator and sim_dv environments use the test_rom, we exclude
+    # them from this test.
+    exec_env = dicts.add(
+        {
+            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        },
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+    ),
+    deps = [
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/silicon_creator/lib:dbg_print",
+        "//sw/device/silicon_creator/lib:error",
+        "//sw/device/silicon_creator/lib/base:util",
+        "//sw/device/silicon_creator/lib/drivers:hmac",
+        "//sw/device/silicon_creator/lib/drivers:rv_timer",
+        "//sw/device/silicon_creator/lib/ownership:datatypes",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:includes",
+        "//sw/device/silicon_creator/lib/sigverify",
+    ],
+)
+
+opentitan_test(
+    name = "ottf_alert_catch_test",
+    srcs = ["ottf_alert_catch_test.c"],
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+        },
+    ),
+    fpga = fpga_params(
+        exit_failure = "FAIL!",
+        exit_success = "Alert 3 is asserted",
+    ),
+    silicon = silicon_params(
+        exit_failure = "FAIL!",
+        exit_success = "Alert 3 is asserted",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:uart",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
diff --git a/sw/device/tests/aes_force_prng_reseed_test.c b/sw/device/tests/aes_force_prng_reseed_test.c
new file mode 100644
index 0000000000000..b24f5c6bb14eb
--- /dev/null
+++ b/sw/device/tests/aes_force_prng_reseed_test.c
@@ -0,0 +1,219 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/multibits.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_csrng_shared.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/csrng_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/sca/lib/simple_serial.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_aes_t aes;
+dif_aes_key_share_t key;
+enum {
+  kAesNumBlocks = 8,
+  // NumBytes in one block is 4x8 i.e. 32 bits in 1 block
+  kDifAesBlockNumBytes = 4,
+  kDisableEntropyAtStartEn = 1,
+};
+
+static const uint8_t kKeyShare1[16] = {
+    0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f,
+    0x8f, 0x9f, 0xaf, 0xbf, 0xcf, 0xdf, 0xef, 0xff,
+};
+
+///////////////////////////////////////////////////////////////////////////////
+static dif_edn_t edn0, edn1;
+static dif_csrng_t csrng;
+static dif_entropy_src_t entropy_src;
+
+// Function to disable entropy complex
+status_t disable_entropy_complex(void) {
+  // Using entropy test utility to stop all EDN0, EDN1, CSRNG, and the Entropy
+  // Source
+  TRY(entropy_testutils_stop_all());
+  LOG_INFO("The entire entropy complex is stopped");
+  return OK_STATUS();
+}
+
+// Function to enable entropy complex
+status_t enable_entropy_complex(void) {
+  // Using entropy test utility to enable all EDN0, EDN1, CSRNG, and the
+  // Entropy Source
+  TRY(entropy_testutils_auto_mode_init());
+  LOG_INFO("The entire entropy complex is enabled");
+  return OK_STATUS();
+}
+
+// Function to generate a new key based on provided index value
+void generate_new_key(dif_aes_key_share_t *key, int index) {
+  uint8_t new_key_share0[sizeof(kAesModesKey128)];
+  // Generate new key share0 by XOR-ing base key with kKeyShare1*index
+  for (size_t i = 0; i < sizeof(kAesModesKey128); ++i) {
+    new_key_share0[i] = kAesModesKey128[i] ^ kKeyShare1[i] * (uint8_t)(index);
+  }
+  // Update the key shares
+  memcpy(key->share0, new_key_share0, sizeof(key->share0));
+  memcpy(key->share1, kKeyShare1, sizeof(key->share1));
+}
+
+status_t execute_test(void) {
+  bool aes_idle = false;
+  bool input_ready = false;
+  bool output_valid = false;
+
+  LOG_INFO(
+      "Testing aes_prng_reseed_test with number of blocks: %d (Block 0 to %d), "
+      "and disabling entropy at start enable"
+      ": %d",
+      kAesNumBlocks, kAesNumBlocks - 1, kDisableEntropyAtStartEn);
+  // Initialize AES
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_aes_reset(&aes));
+  // Initialize EDN0, EDN1, CSRNG and Entropy Source
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+
+  // Generate key with index 0
+  generate_new_key(&key, 0);
+
+  // Prepare transaction
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey128,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = kDifAesReseedPerBlock,
+      .manual_operation = kDifAesManualOperationManual,
+      .reseed_on_key_change = true,
+      .force_masks = true,
+      .ctrl_aux_lock = false,
+  };
+
+  dif_aes_data_t plain_text[kAesNumBlocks];
+  dif_aes_data_t cipher_text[kAesNumBlocks];
+
+  // Initialize plaintext data dynamically
+  // Create plaintext with random data
+  dif_rv_core_ibex_t rv_core_ibex;
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  for (uint32_t i = 0; i < ARRAYSIZE(plain_text); ++i) {
+    for (uint32_t j = 0; j < kDifAesBlockNumBytes; ++j) {
+      uint32_t rand;
+      TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex, 2000, &rand));
+      plain_text[i].data[j] = rand;
+    }
+  }
+
+  // Start the AES operation
+  // Wait for AES to be idle before starting encryption
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+
+  TRY(dif_aes_start(&aes, &transaction, &key, NULL));
+
+  // Disabling entropy complex
+  if (kDisableEntropyAtStartEn == 1) {
+    LOG_INFO(
+        "Disabling entropy complex to induce AES stall before starting AES");
+    CHECK_STATUS_OK(disable_entropy_complex());
+    busy_spin_micros(500);
+  }
+
+  // Start encryption process
+  for (int i = 0; i < kAesNumBlocks; ++i) {
+    if (transaction.manual_operation == kDifAesManualOperationManual) {
+      // Wait for AES to be idle before starting encryption
+      TRY(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
+    }
+
+    // Wait for input ready
+    input_ready = false;
+    do {
+      TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &input_ready));
+    } while (!input_ready);
+
+    // Load data
+    TRY(dif_aes_load_data(&aes, plain_text[i]));
+
+    // Trigger AES reseed request, specific for manual operation case as per
+    // documentation
+    if (transaction.manual_operation == kDifAesManualOperationManual) {
+      TRY(dif_aes_trigger(&aes, kDifAesTriggerStart));
+    }
+
+    // Check for stall after entropy disabled
+    if (i == 0 && kDisableEntropyAtStartEn == 1) {
+      LOG_INFO(
+          "Checking AES status OutputValid status after stopping "
+          "EDN and CSRNG");
+      output_valid = false;
+      TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &output_valid));
+      CHECK(!output_valid,
+            "ERROR:AES encryption AES encryption generated output_valid after "
+            "stopping entropy indicating no stall!");
+      LOG_INFO(
+          "AES encryption is waiting for output_valid as expected at block "
+          "%d",
+          i);
+
+      LOG_INFO("Enabling entropy complex at block %d", i);
+      CHECK_STATUS_OK(enable_entropy_complex());
+      busy_spin_micros(500);
+    }
+
+    // Wait for the AES module to resume and produce output valid
+    output_valid = false;
+    do {
+      TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &output_valid));
+    } while (!output_valid);
+
+    // Read output data
+    TRY(dif_aes_read_output(&aes, &cipher_text[i]));
+  }
+
+  // Finish the AES encryption operation
+  LOG_INFO("End AES encryption operation");
+  TRY(dif_aes_end(&aes));
+
+  // Wait for AES to be idle before starting decryption
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+  LOG_INFO("AES module is idle");
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Entering AES aes_force_prng_reseed_test Test");
+
+  return status_ok(execute_test());
+}
diff --git a/sw/device/tests/aes_interrupt_encryption_test.c b/sw/device/tests/aes_interrupt_encryption_test.c
new file mode 100644
index 0000000000000..3153a7c6b4344
--- /dev/null
+++ b/sw/device/tests/aes_interrupt_encryption_test.c
@@ -0,0 +1,261 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/multibits.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_csrng_shared.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/csrng_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+enum {
+  kTestTimeout = (1000 * 1000),
+};
+
+// The mask share, used to mask kKey. Note that the masking should not be done
+// manually. Software is expected to get the key in two shares right from the
+// beginning.
+
+static const unsigned char kAesModesPlainTextBlock12[32] = {
+    0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96, 0xe9, 0x3d, 0x7e,
+    0x11, 0x73, 0x93, 0x17, 0x2a, 0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03,
+    0xac, 0x9c, 0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+};
+
+static const unsigned char kAesModesPlainTextBlock34[32] = {
+    0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11, 0xe5, 0xfb, 0xc1,
+    0x19, 0x1a, 0x0a, 0x52, 0xef, 0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f,
+    0x9b, 0x17, 0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10};
+
+static const uint8_t kKeyShare1[] = {
+    0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f, 0x8f, 0x9f, 0xaf,
+    0xbf, 0xcf, 0xdf, 0xef, 0xff, 0x0a, 0x1a, 0x2a, 0x3a, 0x4a, 0x5a,
+    0x6a, 0x7a, 0x8a, 0x9a, 0xaa, 0xba, 0xca, 0xda, 0xea, 0xfa,
+};
+
+OTTF_DEFINE_TEST_CONFIG();
+
+status_t execute_test(void) {
+  dif_aes_mode_t aes_mode;
+  dif_aes_iv_t iv_mode, iv;
+
+  for (int test_modes = 1; test_modes < 5; test_modes++) {
+    switch (test_modes) {
+      case 1:
+        LOG_INFO("Mode: CBC");
+        aes_mode = kDifAesModeCbc;
+        memcpy(iv_mode.iv, kAesModesIvCbc, sizeof(kAesModesIvCbc));
+        break;
+      case 2:
+        LOG_INFO("Mode: CFB-128");
+        aes_mode = kDifAesModeCfb;
+        memcpy(iv_mode.iv, kAesModesIvCfb, sizeof(kAesModesIvCfb));
+        break;
+      case 3:
+        LOG_INFO("Mode: OFB");
+        aes_mode = kDifAesModeOfb;
+        memcpy(iv_mode.iv, kAesModesIvOfb, sizeof(kAesModesIvOfb));
+        break;
+      case 4:
+        LOG_INFO("Mode: CTR");
+        aes_mode = kDifAesModeCtr;
+        memcpy(iv_mode.iv, kAesModesIvCtr, sizeof(kAesModesIvCtr));
+        break;
+    }
+    // Initialise AES.
+    dif_aes_t aes;
+    TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+    TRY(dif_aes_reset(&aes));
+
+    // Mask the key. Note that this should not be done manually. Software is
+    // expected to get the key in two shares right from the beginning.
+
+    uint8_t key_share0[sizeof(kAesModesKey128)];
+    for (int i = 0; i < sizeof(kAesModesKey128); ++i) {
+      key_share0[i] = kAesModesKey128[i] ^ kKeyShare1[i];
+    }
+
+    // "Convert" key share byte arrays to `dif_aes_key_share_t`.
+    dif_aes_key_share_t key;
+    memcpy(key.share0, key_share0, sizeof(key.share0));
+    memcpy(key.share1, kKeyShare1, sizeof(key.share1));
+
+    // Write the initial key share, IV and data in CSRs (known combinations).
+
+    dif_aes_transaction_t transaction = {
+        .operation = kDifAesOperationEncrypt,
+        .mode = aes_mode,
+        .key_len = kDifAesKey128,
+        .key_provider = kDifAesKeySoftwareProvided,
+        .mask_reseeding = kDifAesReseedPerBlock,
+        .manual_operation = kDifAesManualOperationAuto,
+        .reseed_on_key_change = false,
+        .ctrl_aux_lock = false,
+    };
+
+    TRY(dif_aes_start(&aes, &transaction, &key, &iv_mode));
+    // "Convert" plain data byte arrays to `dif_aes_data_t` array.
+
+    enum {
+      kAesNumBlocks = 2,
+    };
+
+    dif_aes_data_t plain_text[kAesNumBlocks], plain_text_block34[kAesNumBlocks];
+    dif_aes_data_t cipher_text[kAesNumBlocks];
+    dif_aes_data_t cipher_text_block34[kAesNumBlocks];
+
+    memcpy(plain_text[0].data, kAesModesPlainTextBlock12,
+           sizeof(kAesModesPlainTextBlock12));
+
+    // Encrypt kAesNumBlocks blocks.
+    TRY(dif_aes_process_data(&aes, plain_text, cipher_text,
+                             (size_t)kAesNumBlocks));
+    LOG_INFO("AES Encrypt of first two blocks done");
+
+    dif_aes_iv_t iv_encrypt1;
+    TRY(dif_aes_read_iv(&aes, &iv_encrypt1));
+
+    bool ready = false;
+
+    // Disable the AES unit to no longer automatically start
+    // encryption/decryption
+
+    transaction.manual_operation = kDifAesManualOperationManual;
+
+    TRY(dif_aes_trigger(&aes, kDifAesTriggerDataOutClear));
+    TRY(dif_aes_trigger(&aes, kDifAesTriggerKeyIvDataInClear));
+
+    LOG_INFO("De-initialized Automatic operation");
+
+    //***************  Perform an trial encryption using a different data and
+    // key. Message size, key size and mode can be chosen arbitrarily.
+
+    TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+
+    // Mask the key. Note that this should not be done manually. Software is
+    // expected to get the key in two shares right from the beginning.
+
+    uint8_t key_share0_t[sizeof(kAesModesKey256)];
+    for (int i = 0; i < sizeof(kAesModesKey256); ++i) {
+      key_share0_t[i] = kAesModesKey256[i] ^ kKeyShare1[i];
+    }
+
+    // "Convert" key share byte arrays to `dif_aes_key_share_t`.
+    dif_aes_key_share_t key_t;
+    memcpy(key_t.share0, key_share0, sizeof(key_t.share0));
+    memcpy(key_t.share1, kKeyShare1, sizeof(key_t.share1));
+
+    dif_aes_iv_t iv2;
+    memcpy(iv2.iv, kAesModesIvCtr, sizeof(iv2.iv));
+
+    dif_aes_transaction_t transaction_trial = {
+        .operation = kDifAesOperationEncrypt,
+        .mode = kDifAesModeCtr,
+        .key_len = kDifAesKey256,
+        .key_provider = kDifAesKeySoftwareProvided,
+        .mask_reseeding = kDifAesReseedPerBlock,
+        .manual_operation = kDifAesManualOperationAuto,
+        .reseed_on_key_change = false,
+        .ctrl_aux_lock = false,
+    };
+
+    TRY(dif_aes_start(&aes, &transaction_trial, &key_t, &iv2));
+
+    // "Convert" plain data byte arrays to `dif_aes_data_t` array.
+    enum {
+      kAesNumBlocks_t2 = 4,
+    };
+
+    dif_aes_data_t plain_text2[kAesNumBlocks_t2];
+    memcpy(plain_text2[0].data, kAesModesPlainText, sizeof(kAesModesPlainText));
+    TRY(dif_aes_load_data(&aes, plain_text2[0]));
+
+    do {
+      TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &ready));
+    } while (!ready);
+
+    //*****************Trial encryption ends ******************
+    //  Not checking successful encryption here since its a trial transaction
+    //  Trial encryption ends here
+    //  Resume the Original Encryption below
+
+    // Using the iv read from `iv_encrypt1` for resuming the encryption of
+    // remaining 2 blocks.
+
+    memcpy(iv.iv, &iv_encrypt1, sizeof(iv.iv));
+    transaction.manual_operation = kDifAesManualOperationAuto;
+
+    // "Convert" key share byte arrays to `dif_aes_key_share_t`.
+    memcpy(key.share0, key_share0, sizeof(key.share0));
+    memcpy(key.share1, kKeyShare1, sizeof(key.share1));
+
+    TRY(dif_aes_start(&aes, &transaction, &key, &iv));
+
+    memcpy(plain_text_block34[0].data, kAesModesPlainTextBlock34,
+           sizeof(kAesModesPlainTextBlock34));
+
+    TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &ready));
+    LOG_INFO("Resuming Encrypt with the remaining 2 blocks of data");
+    TRY(dif_aes_process_data(&aes, plain_text_block34, cipher_text_block34,
+                             (size_t)kAesNumBlocks));
+
+    // Decrypt operation below
+    dif_aes_transaction_t transactiond = {
+        .operation = kDifAesOperationDecrypt,
+        .mode = aes_mode,
+        .key_len = kDifAesKey128,
+        .key_provider = kDifAesKeySoftwareProvided,
+        .mask_reseeding = kDifAesReseedPerBlock,
+        .manual_operation = kDifAesManualOperationAuto,
+        .reseed_on_key_change = false,
+        .ctrl_aux_lock = false,
+    };
+
+    do {
+      TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &ready));
+    } while (!ready);
+
+    TRY(dif_aes_start(&aes, &transactiond, &key, &iv_mode));
+    // Finish the decryption transaction.
+    dif_aes_data_t out_data2[4];
+    for (int i = 0; i < 2; ++i) {
+      TRY(dif_aes_load_data(&aes, cipher_text[i]));
+
+      do {
+        TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &ready));
+      } while (!ready);
+
+      TRY(dif_aes_read_output(&aes, &out_data2[i]));
+    }
+    for (int i = 2; i < 4; ++i) {
+      TRY(dif_aes_load_data(&aes, cipher_text_block34[i - 2]));
+
+      do {
+        TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &ready));
+      } while (!ready);
+
+      TRY(dif_aes_read_output(&aes, &out_data2[i]));
+    }
+
+    TRY(dif_aes_end(&aes));
+    CHECK_ARRAYS_EQ((uint8_t *)out_data2, kAesModesPlainText,
+                    sizeof(kAesModesPlainText));
+    LOG_INFO("Decryption Successful");
+  }
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Entering AES Interrupt Encrypt Test");
+  return status_ok(execute_test());
+}
diff --git a/sw/device/tests/aes_masking_off_test.c b/sw/device/tests/aes_masking_off_test.c
index 981b962b5d9c4..d12e9f4dd71dc 100644
--- a/sw/device/tests/aes_masking_off_test.c
+++ b/sw/device/tests/aes_masking_off_test.c
@@ -14,6 +14,7 @@
 #include "sw/device/lib/testing/aes_testutils.h"
 #include "sw/device/lib/testing/csrng_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -31,6 +32,9 @@ static const uint8_t kKeyShare1[] = {
     0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
 };
 
+dif_edn_t edn;
+dif_csrng_t csrng;
+
 OTTF_DEFINE_TEST_CONFIG();
 
 status_t execute_test(void) {
@@ -85,14 +89,27 @@ status_t execute_test(void) {
       .ctrl_aux_lock = false,
   };
   CHECK_DIF_OK(dif_aes_start(&aes, &transaction, &key, NULL));
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
+
+  // The second time we reseed, the internal entropy bus will have the same
+  // value as when `aes_testutils_csrng_kat` internally reseeds previously in
+  // the test. This triggers a recoverable alert in the EDN.
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdEdn0RecovAlert));
 
   // Trigger a reseed of the internal PRNGs. This will load the seed generated
   // by CSRNG to be loaded into the AES masking PRNG. After this point, the AES
   // masking PRNG outputs an all-zero vector.
-  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
   CHECK_DIF_OK(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
   AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
 
+  uint32_t alerts;
+  CHECK_DIF_OK(dif_edn_get_recoverable_alerts(&edn, &alerts));
+  CHECK(alerts == (1 << kDifEdnRecoverableAlertRepeatedGenBits));
+
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdEdn0RecovAlert));
+
   // Trigger the clearing of the output data registers. After this point, also
   // the PRNG buffer stage will output an all-zero vector.
   CHECK_DIF_OK(dif_aes_trigger(&aes, kDifAesTriggerDataOutClear));
@@ -130,11 +147,12 @@ bool test_main(void) {
   // interfaces.
   LOG_INFO("Testing CSRNG SW application interface");
 
+  CHECK_DIF_OK(
+      dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn));
+  CHECK_DIF_OK(dif_csrng_init(
+      mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR), &csrng));
+
   // Disable EDN connected to AES as well as CSRNG.
-  const dif_edn_t edn = {
-      .base_addr = mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR)};
-  const dif_csrng_t csrng = {
-      .base_addr = mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR)};
   CHECK_DIF_OK(dif_edn_stop(&edn));
   CHECK_DIF_OK(dif_csrng_stop(&csrng));
 
diff --git a/sw/device/tests/aes_prng_reseed_test.c b/sw/device/tests/aes_prng_reseed_test.c
new file mode 100644
index 0000000000000..943e32589e816
--- /dev/null
+++ b/sw/device/tests/aes_prng_reseed_test.c
@@ -0,0 +1,257 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/multibits.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_csrng_shared.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/csrng_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/sca/lib/simple_serial.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_aes_t aes;
+dif_aes_key_share_t key;
+enum {
+  kNumTestConfigs = 2,
+  kMaxChunkSize = 300,
+};
+
+typedef struct {
+  dif_aes_mask_reseeding_t mask_reseeding;
+  uint32_t kAesNumBlocks;
+  // NumBytes in one block is 4x8 i.e. 32 bits in 1 block
+  uint32_t kDifAesBlockNumBytes;
+  uint32_t disable_entropy_after_block;
+  uint32_t enable_entropy_at_block;
+} aes_test_config_t;
+
+aes_test_config_t test_configs[kNumTestConfigs] = {
+    // Test 1 configuration with kDifAesReseedPer64Block
+    {
+        .mask_reseeding = kDifAesReseedPer64Block,
+        .kAesNumBlocks = 68,
+        .kDifAesBlockNumBytes = 4,
+        .disable_entropy_after_block = 32,
+        .enable_entropy_at_block = 63,
+    },
+    // Test 2 configuration with kDifAesReseedPer8kBlock
+    {
+        .mask_reseeding = kDifAesReseedPer8kBlock,
+        .kAesNumBlocks = 8400,
+        .kDifAesBlockNumBytes = 4,
+        .disable_entropy_after_block = 41,
+        .enable_entropy_at_block = 8191,
+    },
+};
+
+static const uint8_t kKeyShare1[16] = {
+    0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f,
+    0x8f, 0x9f, 0xaf, 0xbf, 0xcf, 0xdf, 0xef, 0xff,
+};
+
+static dif_edn_t edn0, edn1;
+static dif_csrng_t csrng;
+static dif_entropy_src_t entropy_src;
+// Function to disable entropy complex
+status_t disable_entropy_complex(void) {
+  // Using entropy test utility to stop all EDN0, EDN1, CSRNG, and the Entropy
+  // Source
+  TRY(entropy_testutils_stop_all());
+  LOG_INFO("The entire entropy complex is stopped");
+  return OK_STATUS();
+}
+
+// Function to enable entropy complex
+status_t enable_entropy_complex(void) {
+  // Using entropy test utility to enable all EDN0, EDN1, CSRNG, and the
+  // Entropy Source
+  TRY(entropy_testutils_auto_mode_init());
+  LOG_INFO("The entire entropy complex is enabled");
+  return OK_STATUS();
+}
+
+// Function to generate a new key based on provided index value
+void generate_new_key(dif_aes_key_share_t *key, int index) {
+  uint8_t new_key_share0[sizeof(kAesModesKey128)];
+  // Generate new key share0 by XOR-ing base key with kKeyShare1*index
+  for (size_t i = 0; i < sizeof(kAesModesKey128); ++i) {
+    new_key_share0[i] = kAesModesKey128[i] ^ kKeyShare1[i] * (uint8_t)(index);
+  }
+  // Update the key shares
+  memcpy(key->share0, new_key_share0, sizeof(key->share0));
+  memcpy(key->share1, kKeyShare1, sizeof(key->share1));
+}
+
+// status_t execute_test(void) {
+status_t execute_test(aes_test_config_t *config) {
+  bool aes_idle = false;
+  bool input_ready = false;
+  bool output_valid = false;
+
+  LOG_INFO(
+      "Testing AES PRNG Reseed Test with number of blocks: %d (Block 0 to %d), "
+      "and disabling entropy after block number: %d",
+      config->kAesNumBlocks, config->kAesNumBlocks - 1,
+      config->disable_entropy_after_block - 1);
+  // Initialize AES
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_aes_reset(&aes));
+  // Initialize EDN0, EDN1, CSRNG and Entropy Source
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+
+  // Generate key with index 0
+  generate_new_key(&key, 0);
+
+  // Prepare transaction
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey128,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = config->mask_reseeding,
+      .manual_operation = kDifAesManualOperationAuto,
+      .reseed_on_key_change = true,
+      .force_masks = false,
+      .ctrl_aux_lock = false,
+  };
+  // Start the AES operation
+  // Wait for AES to be idle before starting encryption
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+  TRY(dif_aes_start(&aes, &transaction, &key, NULL));
+
+  dif_aes_data_t plain_text[kMaxChunkSize];
+  dif_aes_data_t cipher_text[kMaxChunkSize];
+
+  uint32_t total_blocks = config->kAesNumBlocks;
+
+  uint32_t blocks_processed = 0;
+
+  // Initialize plaintext data dynamically
+  // Create plaintext with random data
+  dif_rv_core_ibex_t rv_core_ibex;
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  for (uint32_t i = 0; i < ARRAYSIZE(plain_text); ++i) {
+    for (uint32_t j = 0; j < config->kDifAesBlockNumBytes; ++j) {
+      uint32_t rand;
+      TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex, 2000, &rand));
+      plain_text[i].data[j] = rand;
+    }
+  }
+
+  // Now start encryption process for the blocks in chunks
+  while (blocks_processed < total_blocks) {
+    uint32_t blocks_to_process = total_blocks - blocks_processed;
+    if (blocks_to_process > kMaxChunkSize) {
+      blocks_to_process = kMaxChunkSize;
+    }
+
+    // Start encryption process
+    // Process the blocks in this chunk
+    for (uint32_t i = 0; i < blocks_to_process; ++i) {
+      uint32_t block_index = blocks_processed + i;
+
+      // Wait for input ready
+      input_ready = false;
+      do {
+        TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &input_ready));
+      } while (!input_ready);
+
+      // Load data
+      TRY(dif_aes_load_data(&aes, plain_text[i]));
+
+      // Disable entropy complex after processing enough blocks
+      if (block_index == config->disable_entropy_after_block) {
+        LOG_INFO("Disabling entropy complex to induce AES halt at block %d",
+                 block_index);
+        CHECK_STATUS_OK(disable_entropy_complex());
+        busy_spin_micros(1000);
+      }
+
+      // Check for halt when PRNG reseed is required
+      if (block_index == config->enable_entropy_at_block) {
+        output_valid = false;
+        TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &output_valid));
+        CHECK(!output_valid,
+              "ERROR: AES encryption did not halt when entropy was disabled at "
+              "block %d",
+              block_index);
+        LOG_INFO("AES encryption is halted as expected at block %d",
+                 block_index);
+
+        // Re-enable the entropy complex
+        LOG_INFO("Re-enabling entropy complex at block %d", block_index);
+        CHECK_STATUS_OK(enable_entropy_complex());
+        busy_spin_micros(500);
+      }
+
+      // Wait for the AES module to produce output valid
+      output_valid = false;
+      do {
+        TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &output_valid));
+      } while (!output_valid);
+
+      // Read output data
+      TRY(dif_aes_read_output(&aes, &cipher_text[i]));
+    }
+    // Update blocks_processed
+    blocks_processed += blocks_to_process;
+  }
+
+  // Finish the AES encryption operation
+  LOG_INFO("End AES encryption operation");
+  TRY(dif_aes_end(&aes));
+
+  // Wait for AES to be idle to check aes encryption process has ended
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+  LOG_INFO("AES module is idle");
+
+  // After ensuring the AES module is idle
+  // Reset the AES module before starting decryption
+  TRY(dif_aes_reset(&aes));
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  for (size_t i = 0; i < kNumTestConfigs; ++i) {
+    aes_test_config_t *config = &test_configs[i];
+
+    // Log the current test configuration
+    LOG_INFO("Starting AES PRNG Reseed Test with mask_reseeding: %d",
+             config->mask_reseeding);
+
+    // Call execute_test with the current configuration
+    CHECK_STATUS_OK(execute_test(config));
+  }
+
+  return true;
+}
diff --git a/sw/device/tests/aes_stall_test.c b/sw/device/tests/aes_stall_test.c
new file mode 100644
index 0000000000000..f306e6d7260cd
--- /dev/null
+++ b/sw/device/tests/aes_stall_test.c
@@ -0,0 +1,176 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/multibits.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/sca/lib/simple_serial.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_aes_t aes;
+dif_aes_key_share_t key;
+enum {
+  kAesNumBlocks = 2,
+  // NumBytes in one block is 4x8 i.e. 32 bits in 1 block
+  kDifAesBlockNumBytes = 4,
+  kDisableEntropyAtStartEn = 1,
+};
+
+static const uint8_t kKeyShare1[16] = {
+    0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f,
+    0x8f, 0x9f, 0xaf, 0xbf, 0xcf, 0xdf, 0xef, 0xff,
+};
+
+// Function to generate a new key based on provided index value
+void generate_new_key(dif_aes_key_share_t *key, int index) {
+  uint8_t new_key_share0[sizeof(kAesModesKey128)];
+  // Generate new key share0 by XOR-ing base key with kKeyShare1*index
+  for (size_t i = 0; i < sizeof(kAesModesKey128); ++i) {
+    new_key_share0[i] = kAesModesKey128[i] ^ kKeyShare1[i] * (uint8_t)(index);
+  }
+  // Updating the key shares
+  memcpy(key->share0, new_key_share0, sizeof(key->share0));
+  memcpy(key->share1, kKeyShare1, sizeof(key->share1));
+}
+
+status_t execute_test(void) {
+  bool aes_idle = false;
+  bool input_ready = false;
+  bool output_valid = false;
+
+  // Initialize AES
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_aes_reset(&aes));
+
+  // Generate key with index 0
+  generate_new_key(&key, 0);
+
+  // Prepare transaction
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey128,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = kDifAesReseedPerBlock,
+      .manual_operation = kDifAesManualOperationAuto,
+      .reseed_on_key_change = true,
+      .force_masks = true,
+      .ctrl_aux_lock = false,
+  };
+
+  dif_aes_data_t plain_text[kAesNumBlocks];
+  dif_aes_data_t cipher_text[kAesNumBlocks];
+
+  // Initialize plaintext data dynamically
+  // Create plaintext with random data
+  dif_rv_core_ibex_t rv_core_ibex;
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  for (uint32_t i = 0; i < ARRAYSIZE(plain_text); ++i) {
+    for (uint32_t j = 0; j < kDifAesBlockNumBytes; ++j) {
+      uint32_t rand;
+      TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex, 2000, &rand));
+      plain_text[i].data[j] = rand;
+    }
+  }
+
+  // Start the AES operation
+  // Wait for AES to be idle before starting encryption
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+
+  TRY(dif_aes_start(&aes, &transaction, &key, NULL));
+
+  // Variables for status checks
+  bool stall = false;
+  uint32_t num_of_blocks_loaded = 0;
+
+  // Load multiple input blocks without reading output data
+  // to generate STALL status bit assertion
+  LOG_INFO("Loading %d blocks without reading output to create back pressure",
+           kAesNumBlocks);
+  for (uint32_t i = 0; i < kAesNumBlocks; ++i) {
+    // Wait for input ready
+    input_ready = false;
+    do {
+      TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &input_ready));
+    } while (!input_ready);
+
+    // Load data
+    TRY(dif_aes_load_data(&aes, plain_text[i]));
+    num_of_blocks_loaded++;
+    busy_spin_micros(1000);
+
+    // Check for STALL condition
+    TRY(dif_aes_get_status(&aes, kDifAesStatusStall, &stall));
+    if (i > 0) {
+      TRY_CHECK(
+          stall,
+          "ERROR: AES module not STALLED as expected after loading block %d",
+          i);
+      LOG_INFO("AES module is stalled as expected after loading block %d", i);
+      break;
+    }
+  }
+
+  if (stall) {
+    // Read output data to clear stall
+    uint32_t num_of_blocks_read = 0;
+
+    while (num_of_blocks_read < num_of_blocks_loaded) {
+      // Wait for output valid
+      output_valid = false;
+      do {
+        TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &output_valid));
+      } while (!output_valid);
+
+      // Read output data
+      TRY(dif_aes_read_output(&aes, &cipher_text[num_of_blocks_read]));
+      num_of_blocks_read++;
+
+      // Check if STALL bit is cleared
+      TRY(dif_aes_get_status(&aes, kDifAesStatusStall, &stall));
+      TRY_CHECK(!stall, "ERROR: Block %u not successfully read",
+                num_of_blocks_read - 1);
+    }
+  } else {
+    TRY_CHECK(stall, "ERROR:STALL condition did not occur...");
+  }
+
+  // Finish the AES encryption operation
+  LOG_INFO("End AES encryption operation");
+  TRY(dif_aes_end(&aes));
+
+  // Wait for AES to be idle before starting decryption
+  aes_idle = false;
+  do {
+    TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &aes_idle));
+  } while (!aes_idle);
+  LOG_INFO("AES module is idle");
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Entering AES aes_stall_test Test");
+
+  return status_ok(execute_test());
+}
diff --git a/sw/device/tests/alert_handler_escalation_test.c b/sw/device/tests/alert_handler_escalation_test.c
new file mode 100644
index 0000000000000..015ae75355a2c
--- /dev/null
+++ b/sw/device/tests/alert_handler_escalation_test.c
@@ -0,0 +1,195 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_clkmgr.h"
+#include "sw/device/lib/dif/dif_keymgr.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/alert_handler_testutils.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "alert_handler_regs.h"  // Generated.
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_core_ibex_regs.h"  // Generated.
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_clkmgr_t clkmgr;
+static dif_keymgr_t keymgr;
+static dif_rstmgr_t rstmgr;
+static dif_alert_handler_t alert_handler;
+static dif_rv_core_ibex_t rv_core_ibex;
+static dif_uart_t uart;
+
+/**
+ * External ISR.
+ *
+ * Handles all peripheral interrupts on Ibex. PLIC asserts an external interrupt
+ * line to the CPU, which results in a call to this OTTF ISR. This ISR
+ * overrides the default OTTF implementation.
+ *
+ * @param exc_info Execution info.
+ */
+void ottf_external_nmi_handler(uint32_t *exc_info) {
+  // DO NOT REMOVE, DV sync message
+  LOG_INFO("You are experiencing an NMI");
+
+  dif_rv_core_ibex_nmi_state_t nmi_state = (dif_rv_core_ibex_nmi_state_t){0};
+
+  CHECK_DIF_OK(dif_rv_core_ibex_get_nmi_state(
+      &rv_core_ibex, (dif_rv_core_ibex_nmi_state_t *)&nmi_state));
+
+  CHECK(nmi_state.alert_enabled && nmi_state.alert_raised,
+        "Alert handler NMI state not expected:\n\t"
+        "alert_enable:%x\n\talert_raised:%x\n",
+        nmi_state.alert_enabled, nmi_state.alert_raised);
+
+  dif_alert_handler_class_state_t state;
+  CHECK_DIF_OK(dif_alert_handler_get_class_state(
+      &alert_handler, kDifAlertHandlerClassA, &state));
+
+  // Now intentionally hang the device
+  CHECK_DIF_OK(dif_clkmgr_gateable_clock_set_enabled(
+      &clkmgr, kTopEarlgreyGateableClocksIoDiv4Peri, kDifToggleDisabled));
+
+  // access uart after clocks have been disabled
+  CHECK_DIF_OK(dif_uart_disable_rx_timeout(&uart));
+  LOG_FATAL("This message should never be seen");
+}
+
+/**
+ * Initialize the dif handles required for this test.
+ */
+static void init_peripheral_handles(void) {
+  CHECK_DIF_OK(dif_clkmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
+
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+
+  CHECK_DIF_OK(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
+
+  CHECK_DIF_OK(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  CHECK_DIF_OK(dif_uart_init(
+      mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart));
+
+  CHECK_DIF_OK(dif_keymgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR), &keymgr));
+}
+
+/**
+ * Configure the alert handler. The escalation phases (NMI interrupt, LC scrap
+ * state, chip reset) are assigned to alert class A.
+ */
+static void config_alert_handler(void) {
+  // Escalation phase 0 is the NMI interrupt whose timeout value before
+  // progressing to phase 1 differs depending on the simulation device. For
+  // example, on the ChipWhisperer 1000000 cycles are enough to prevent a
+  // premature cancellation of the NMI interrupt handler (see
+  // `ottf_external_nmi_handler`).
+  uint32_t phase0DurationCycles = 1000000;
+  if (kDeviceType == kDeviceSimVerilator) {
+    phase0DurationCycles /= 10;
+  } else if (kDeviceType == kDeviceSimDV) {
+    phase0DurationCycles /= 100;
+  }
+
+  dif_alert_handler_escalation_phase_t escalationProfiles[] = {
+      {.phase = kDifAlertHandlerClassStatePhase0,
+       .signal = 0,
+       .duration_cycles = phase0DurationCycles},
+      {.phase = kDifAlertHandlerClassStatePhase1,
+       .signal = 1,
+       .duration_cycles = 10000},
+      {.phase = kDifAlertHandlerClassStatePhase2,
+       .signal = 3,
+       .duration_cycles = 10000},
+  };
+  dif_alert_handler_class_config_t configProfiles[] = {{
+      .auto_lock_accumulation_counter = kDifToggleDisabled,
+      .accumulator_threshold = 0,
+      .irq_deadline_cycles = 0,
+      .escalation_phases = escalationProfiles,
+      .escalation_phases_len = 3,
+      .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase1,
+  }};
+
+  // set the alert we care about to class A
+  CHECK_DIF_OK(dif_alert_handler_configure_alert(
+      &alert_handler, kTopEarlgreyAlertIdRvCoreIbexRecovSwErr,
+      kDifAlertHandlerClassA, /*enabled=*/kDifToggleEnabled,
+      /*locked=*/kDifToggleEnabled));
+
+  // configure class A
+  CHECK_DIF_OK(dif_alert_handler_configure_class(
+      &alert_handler, kDifAlertHandlerClassA, configProfiles[0],
+      /*enabled=*/kDifToggleEnabled,
+      /*locked=*/kDifToggleEnabled));
+}
+
+/**
+ * - Verify the first escalation results in NMI interrupt serviced by the CPU.
+ * - Verify the second results in device being put in escalate state, via the LC
+ *   JTAG TAP.
+ * - Verify the third results in chip reset.
+ * - Ensure that all escalation handshakes complete without errors.
+ *
+ * The first escalation is checked via the entry of the NMI handler and polling
+ * by dv. The second escalation is directly checked by dv. The third escalation
+ * is checked via reset reason.
+ */
+bool test_main(void) {
+  init_peripheral_handles();
+
+  // Check if there was a HW reset caused by the escalation.
+  dif_rstmgr_reset_info_bitfield_t rst_info;
+  rst_info = rstmgr_testutils_reason_get();
+  rstmgr_testutils_reason_clear();
+
+  if (rst_info & kDifRstmgrResetInfoPor) {
+    config_alert_handler();
+
+    // Initialize keymgr with otp contents
+    CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, NULL));
+
+    // DO NOT REMOVE, DV sync message
+    LOG_INFO("Keymgr entered Init State");
+
+    // Enable NMI
+    CHECK_DIF_OK(dif_rv_core_ibex_enable_nmi(&rv_core_ibex,
+                                             kDifRvCoreIbexNmiSourceAlert));
+
+    // force trigger the alert
+    CHECK_DIF_OK(dif_rv_core_ibex_alert_force(&rv_core_ibex,
+                                              kDifRvCoreIbexAlertRecovSwErr));
+
+    // Stop execution here and just wait for something to happen
+    wait_for_interrupt();
+    LOG_ERROR("Should have reset before this line");
+    return false;
+  } else if (rst_info & kDifRstmgrResetInfoEscalation) {
+    // DO NOT REMOVE, DV sync message
+    LOG_INFO("Reset due to alert escalation");
+    return true;
+  } else {
+    LOG_ERROR("Unexpected reset info %d", rst_info);
+  }
+
+  return false;
+}
diff --git a/sw/device/tests/alert_handler_lpg_sleep_mode_pings.c b/sw/device/tests/alert_handler_lpg_sleep_mode_pings.c
index 616f1d253d6f9..7a933df38b02c 100644
--- a/sw/device/tests/alert_handler_lpg_sleep_mode_pings.c
+++ b/sw/device/tests/alert_handler_lpg_sleep_mode_pings.c
@@ -80,23 +80,36 @@ static void init_peripherals(void) {
  */
 void wait_enough_for_alert_ping(void) {
   // wait enough
-  if (kDeviceType == kDeviceFpgaCw310) {
-    // 2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
-    // 2*4*(2**16)*(400ns) = 0.2s
-    busy_spin_micros(1000 * 200);
-  } else if (kDeviceType == kDeviceSimDV) {
-    // NUM_ALERTS*2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
-    // 2*4*(2**3)*(40ns) = 3us
-    busy_spin_micros(3);
-  } else {
-    // Verilator
-    // 2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
-    // 2*4*(2**16)*(8us) = 4s
-    // This seems to be impractical for the current clock frequency config
-    // of the Verilator tests (kClockFreqPeripheralHz = 125K).
-    LOG_FATAL("SUPPORTED PLATFORMS: DV and FPGA");
-    LOG_FATAL("TO SUPPORT THE PLATFORM %d, COMPUTE THE RIGHT WAIT-TIME",
-              kDeviceType);
+  switch (kDeviceType) {
+    case kDeviceFpgaCw310:
+    case kDeviceFpgaCw340:
+      // 2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
+      // 2*4*(2**16)*(400ns) = 0.2s
+      busy_spin_micros(1000 * 200);
+      break;
+    case kDeviceSilicon:
+      // 2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
+      // 2*4*(2**16)*(42ns) = 22ms
+      busy_spin_micros(1000 * 22);
+      break;
+    case kDeviceSimDV:
+      // NUM_ALERTS*2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
+      // 2*4*(2**16)*(42ns) = 22ms
+      busy_spin_micros(1000 * 22);
+      break;
+    case kDeviceSimVerilator:
+      // Verilator
+      // 2*margin_of_safety*(2**DW)*(1/kClockFreqPeripheralHz)
+      // 2*4*(2**16)*(8us) = 4s
+      // This seems to be impractical for the current clock frequency config
+      // of the Verilator tests (kClockFreqPeripheralHz = 125K).
+      OT_FALLTHROUGH_INTENDED;
+    default:
+      LOG_FATAL("SUPPORTED PLATFORMS: DV and FPGA");
+      LOG_FATAL("TO SUPPORT THE PLATFORM %d, COMPUTE THE RIGHT WAIT-TIME",
+                kDeviceType);
+      test_status_set(kTestStatusFailed);
+      abort();
   }
 }
 
diff --git a/sw/device/tests/ast_clk_outs_test.c b/sw/device/tests/ast_clk_outs_test.c
index 3ffdb4e7adf54..7cd952c7a2087 100644
--- a/sw/device/tests/ast_clk_outs_test.c
+++ b/sw/device/tests/ast_clk_outs_test.c
@@ -10,6 +10,7 @@
 #include "sw/device/lib/testing/pwrmgr_testutils.h"
 #include "sw/device/lib/testing/sensor_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -61,6 +62,12 @@ bool test_main(void) {
   CHECK_DIF_OK(dif_aon_timer_init(
       mmio_region_from_addr(TOP_EARLGREY_AON_TIMER_AON_BASE_ADDR), &aon_timer));
 
+  // The test will trigger many measurement errors which cause an alert that
+  // fires constantly with each new measurement and cannot really be
+  // acknowledged. Ignore this alert for the purpose of this test.
+  CHECK_STATUS_OK(
+      ottf_alerts_ignore_alert(kTopEarlgreyAlertIdClkmgrAonRecovFault));
+
   LOG_INFO("TEST: wait for ast init");
   IBEX_SPIN_FOR(sensor_ctrl_ast_init_done(&sensor_ctrl), 1000);
   LOG_INFO("TEST: done ast init");
diff --git a/sw/device/tests/autogen/BUILD b/sw/device/tests/autogen/BUILD
index 8cc5fdf5117b8..cc500cb84f2f1 100644
--- a/sw/device/tests/autogen/BUILD
+++ b/sw/device/tests/autogen/BUILD
@@ -40,7 +40,12 @@ package(default_visibility = ["//visibility:public"])
         ),
         verilator = verilator_params(
             timeout = "eternal",
-            tags = ["flaky"],
+            tags = [
+                "flaky",
+                "manual",
+            ],
+            # This test can take > 60 minutes, so mark it manual as it
+            # shouldn't run in CI/nightlies.
             # often times out in 3600s on 4 cores
         ),
         deps = [
@@ -92,15 +97,12 @@ test_suite(
 opentitan_test(
     name = "alert_test",
     srcs = ["alert_test.c"],
-    # TODO(#22871): Remove "broken" tag once the tests are fixed.
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_test_rom": None,
             "//hw/top_earlgrey:fpga_cw310_sival": None,
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
diff --git a/sw/device/tests/chip_power_idle_load.c b/sw/device/tests/chip_power_idle_load_test.c
similarity index 100%
rename from sw/device/tests/chip_power_idle_load.c
rename to sw/device/tests/chip_power_idle_load_test.c
diff --git a/sw/device/tests/chip_power_sleep_load.c b/sw/device/tests/chip_power_sleep_load.c
deleted file mode 100644
index a2159ebf924dc..0000000000000
--- a/sw/device/tests/chip_power_sleep_load.c
+++ /dev/null
@@ -1,462 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// Included code:
-
-#include <stdint.h>
-
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_adc_ctrl.h"
-#include "sw/device/lib/dif/dif_alert_handler.h"
-#include "sw/device/lib/dif/dif_gpio.h"
-#include "sw/device/lib/dif/dif_otp_ctrl.h"
-#include "sw/device/lib/dif/dif_pinmux.h"
-#include "sw/device/lib/dif/dif_pwm.h"
-#include "sw/device/lib/dif/dif_pwrmgr.h"
-#include "sw/device/lib/dif/dif_rv_core_ibex.h"
-#include "sw/device/lib/dif/dif_rv_timer.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/alert_handler_testutils.h"
-#include "sw/device/lib/testing/aon_timer_testutils.h"
-#include "sw/device/lib/testing/pwrmgr_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-#include "alert_handler_regs.h"
-#include "aon_timer_regs.h"
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "pwm_regs.h"
-
-// Global Variables
-
-typedef void (*isr_handler)(void);
-static volatile isr_handler expected_isr_handler;
-static volatile dif_rv_core_ibex_nmi_state_t nmi_state;
-static volatile bool nmi_fired = false;
-static volatile bool ext_irq_fired = false;
-static volatile bool irq_is_pending = false;
-
-static dif_aon_timer_t aon_timer;
-static dif_rv_core_ibex_t rv_core_ibex;
-static dif_rv_plic_t rv_plic;
-static dif_pwrmgr_t pwrmgr;
-static dif_rv_timer_t rv_timer;
-static dif_alert_handler_t alert_handler;
-static dif_pwm_t pwm;
-static dif_pinmux_t pinmux;
-static dif_otp_ctrl_t otp_ctrl;
-static dif_gpio_t gpio;
-static dif_adc_ctrl_t adc_ctrl;
-
-static volatile const bool kCoreClkOff = false;
-static volatile const bool kIoClkOff = false;
-static volatile const bool kUsbSlpOff = false;
-static volatile const bool kUsbActOff = false;
-static volatile const bool kDeepSleep = false;
-
-static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
-
-OTTF_DEFINE_TEST_CONFIG();
-
-// ISRs
-
-void ottf_external_isr(uint32_t *exc_info) {
-  LOG_INFO("got external IRQ");
-  ext_irq_fired = true;
-}
-
-void ottf_external_nmi_handler(uint32_t *exc_info) {
-  nmi_fired = true;
-
-  expected_isr_handler();
-
-  CHECK_DIF_OK(dif_rv_core_ibex_get_nmi_state(
-      &rv_core_ibex, (dif_rv_core_ibex_nmi_state_t *)&nmi_state));
-  CHECK_DIF_OK(dif_rv_core_ibex_clear_nmi_state(&rv_core_ibex,
-                                                kDifRvCoreIbexNmiSourceAll));
-}
-
-// Specific handlee for the wdog bark NMI IRQ.
-static void wdog_irq_handler(void) {
-  bool is_pending;
-
-  CHECK_DIF_OK(dif_aon_timer_irq_is_pending(
-      &aon_timer, kDifAonTimerIrqWdogTimerBark, &is_pending));
-  irq_is_pending = is_pending;
-
-  // Stop the watchdog.
-  CHECK_DIF_OK(dif_aon_timer_watchdog_stop(&aon_timer));
-
-  CHECK_DIF_OK(
-      dif_aon_timer_irq_acknowledge(&aon_timer, kDifAonTimerIrqWdogTimerBark));
-
-  // Signal a software interrupt
-  dif_rv_plic_t rv_plic_isr;
-  mmio_region_t plic_base_addr =
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
-  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &rv_plic_isr));
-  CHECK_DIF_OK(dif_rv_plic_software_irq_force(&rv_plic_isr, kPlicTarget));
-}
-
-// Functions
-
-void prepare_to_exit(void) {
-  CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleDisabled));
-
-  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 0));
-
-  LOG_INFO("Prepare to exit");
-
-  // Check that no external interrupts have occurred.
-  CHECK(ext_irq_fired == false, "Unexpected external interrupt triggered.");
-
-  CHECK_STATUS_OK(aon_timer_testutils_shutdown(&aon_timer));
-
-  // Set the test status flag back to "TestStatusInTest"
-  test_status_set(kTestStatusInTest);
-}
-
-bool test_main(void) {
-  // Define access to DUT IPs:
-  CHECK_DIF_OK(dif_aon_timer_init(
-      mmio_region_from_addr(TOP_EARLGREY_AON_TIMER_AON_BASE_ADDR), &aon_timer));
-  CHECK_DIF_OK(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
-  CHECK_DIF_OK(dif_pwrmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
-  CHECK_DIF_OK(dif_rv_timer_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_TIMER_BASE_ADDR), &rv_timer));
-  CHECK_DIF_OK(dif_alert_handler_init(
-      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
-      &alert_handler));
-  CHECK_DIF_OK(dif_pwm_init(
-      mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR), &pwm));
-  CHECK_DIF_OK(dif_pinmux_init(
-      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
-  CHECK_DIF_OK(dif_otp_ctrl_init(
-      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
-  CHECK_DIF_OK(
-      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
-  CHECK_DIF_OK(dif_adc_ctrl_init(
-      mmio_region_from_addr(TOP_EARLGREY_ADC_CTRL_AON_BASE_ADDR), &adc_ctrl));
-
-  LOG_INFO("Running CHIP Power Sleep Load test");
-
-  // Testplan: "The test should set a GPIO (mapped to the IOA2 pin) to high
-  // while the power state of interest is active"
-
-  const uint32_t kGpioMask = 0x00000004;
-
-  // PINMUX
-  CHECK_DIF_OK(
-      dif_pinmux_output_select(&pinmux, (kTopEarlgreyPinmuxMioOutIoa0 + 2),
-                               (kTopEarlgreyPinmuxOutselGpioGpio0 + 2)));
-
-  // Set output modes of all GPIO pins
-  CHECK_DIF_OK(dif_gpio_output_set_enabled_all(&gpio, kGpioMask));
-
-  // Write to set IOA2 low at the start of the test:
-  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 0));
-
-  LOG_INFO("GPIO active");
-
-  // PWRMGR- Read wakeup reason
-
-  dif_pwrmgr_wakeup_reason_t wakeup_reason;
-  CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
-  LOG_INFO("wakeup type:%d. wakeup reason: 0x%02X", wakeup_reason.types,
-           wakeup_reason.request_sources);
-
-  if (wakeup_reason.types == 0) {
-    // Wakeup due to Power Up - DO NOTHING HERE - go on with the rest of the
-    // test's flow....
-  } else if ((wakeup_reason.types == kDifPwrmgrWakeupTypeRequest) &&
-             (wakeup_reason.request_sources ==
-              kDifPwrmgrWakeupRequestSourceFive)) {
-    // Wakeup due to a peripheral request and reason is AON Timer
-    prepare_to_exit();
-    return true;
-  } else {
-    LOG_ERROR("unexpected wakeup reason! type=0x%x, source=0x%x",
-              wakeup_reason.types, wakeup_reason.request_sources);
-    return false;
-  }
-
-  // RV Timer
-  const uint32_t kHart = (uint32_t)kTopEarlgreyPlicTargetIbex0;
-  const uint32_t kComparator = 0;
-  const uint64_t kTickFreqHz = 1000000;
-  const uint64_t kDeadline = UINT32_MAX;
-
-  CHECK_DIF_OK(dif_rv_timer_reset(&rv_timer));
-
-  dif_rv_timer_tick_params_t rv_timer_tick_params;
-  CHECK_DIF_OK(dif_rv_timer_approximate_tick_params(
-      kClockFreqPeripheralHz, kTickFreqHz, &rv_timer_tick_params));
-  // Configure the tick params for a particular hart's counter
-  CHECK_DIF_OK(
-      dif_rv_timer_set_tick_params(&rv_timer, kHart, rv_timer_tick_params));
-
-  uint64_t current_time;
-  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, kHart, &current_time));
-  CHECK_DIF_OK(dif_rv_timer_arm(&rv_timer, kHart, kComparator,
-                                (current_time + kDeadline)));
-  CHECK_DIF_OK(
-      dif_rv_timer_counter_set_enabled(&rv_timer, kHart, kDifToggleEnabled));
-
-  LOG_INFO("RV Timer active");
-
-  // Alert Ping
-
-  // 1. Config structs for all Incoming Alerts:
-  dif_alert_handler_alert_t alerts[ALERT_HANDLER_PARAM_N_ALERTS];
-  dif_alert_handler_class_t alert_classes[ALERT_HANDLER_PARAM_N_ALERTS];
-  for (size_t i = 0; i < ALERT_HANDLER_PARAM_N_ALERTS; ++i) {
-    alerts[i] = i;
-    alert_classes[i] = kDifAlertHandlerClassA;
-  }
-
-  // 2. Config structs for Local Alerts
-  dif_alert_handler_local_alert_t loc_alerts[] = {
-      kDifAlertHandlerLocalAlertAlertPingFail};
-  dif_alert_handler_class_t loc_alert_classes[] = {kDifAlertHandlerClassB};
-
-  // 3. Config structs for Escalation phase
-  dif_alert_handler_escalation_phase_t esc_phases[] = {
-      {.phase = kDifAlertHandlerClassStatePhase0,
-       .signal = 0,
-       .duration_cycles = 2000}};
-  // Escalation protocol (struct) for an alert class
-  dif_alert_handler_class_config_t class_config = {
-      .auto_lock_accumulation_counter = kDifToggleDisabled,
-      .accumulator_threshold = UINT16_MAX,
-      .irq_deadline_cycles = UINT32_MAX,
-      .escalation_phases = esc_phases,
-      .escalation_phases_len = ARRAYSIZE(esc_phases),
-      .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase1,
-  };
-  dif_alert_handler_class_config_t class_configs[] = {class_config,
-                                                      class_config};
-  dif_alert_handler_class_t classes[] = {kDifAlertHandlerClassA,
-                                         kDifAlertHandlerClassB};
-
-  // 4. Runtime configuration (struct) for the alert handler:
-  dif_alert_handler_config_t config = {
-      .alerts = alerts,
-      .alert_classes = alert_classes,
-      .alerts_len = ARRAYSIZE(alerts),
-      .local_alerts = loc_alerts,
-      .local_alert_classes = loc_alert_classes,
-      .local_alerts_len = ARRAYSIZE(loc_alerts),
-      .classes = classes,
-      .class_configs = class_configs,
-      .classes_len = ARRAYSIZE(class_configs),
-      .ping_timeout = UINT16_MAX,
-  };
-
-  // 5. Configure Alerts
-  CHECK_STATUS_OK(alert_handler_testutils_configure_all(&alert_handler, config,
-                                                        kDifToggleEnabled));
-
-  // Checks whether alert handler's ping timer is locked
-  bool is_locked;
-  CHECK_DIF_OK(
-      dif_alert_handler_is_ping_timer_locked(&alert_handler, &is_locked));
-  CHECK(is_locked, "Expected alerts to be locked");
-
-  LOG_INFO("Alert ping is active");
-
-  // PWM
-
-  // Configuration struct for PWM general
-  const dif_pwm_config_t config_ = {
-      .clock_divisor = 0,
-      .beats_per_pulse_cycle = 32,
-  };
-
-  // Configuration struct for a specific PWM channel
-  const dif_pwm_channel_config_t default_ch_cfg_ = {
-      .duty_cycle_a = 0,
-      .duty_cycle_b = 0,
-      .phase_delay = 0,
-      .mode = kDifPwmModeFirmware,
-      .polarity = kDifPwmPolarityActiveHigh,
-      .blink_parameter_x = 0,
-      .blink_parameter_y = 0,
-  };
-  const dif_pwm_channel_t kPwmChannel[PWM_PARAM_N_OUTPUTS] = {
-      kDifPwmChannel0, kDifPwmChannel1, kDifPwmChannel2,
-      kDifPwmChannel3, kDifPwmChannel4, kDifPwmChannel5,
-  };
-  // Duty cycle (arbitrary) values (in the beats)
-  const uint16_t kPwmDutycycle[PWM_PARAM_N_OUTPUTS] = {
-      6, 11, 27, 8, 17, 7,
-  };
-
-  const dif_pinmux_index_t kPinmuxMioOut[PWM_PARAM_N_OUTPUTS] = {
-      kTopEarlgreyPinmuxMioOutIob10, kTopEarlgreyPinmuxMioOutIob11,
-      kTopEarlgreyPinmuxMioOutIob12, kTopEarlgreyPinmuxMioOutIoc10,
-      kTopEarlgreyPinmuxMioOutIoc11, kTopEarlgreyPinmuxMioOutIoc12,
-  };
-  const dif_pinmux_index_t kPinmuxOutsel[PWM_PARAM_N_OUTPUTS] = {
-      kTopEarlgreyPinmuxOutselPwmAonPwm0, kTopEarlgreyPinmuxOutselPwmAonPwm1,
-      kTopEarlgreyPinmuxOutselPwmAonPwm2, kTopEarlgreyPinmuxOutselPwmAonPwm3,
-      kTopEarlgreyPinmuxOutselPwmAonPwm4, kTopEarlgreyPinmuxOutselPwmAonPwm5,
-  };
-
-  CHECK_DIF_OK(dif_pwm_configure(&pwm, config_));
-
-  // Configure each of the PWM channels:
-  dif_pwm_channel_config_t channel_config_ = default_ch_cfg_;
-  for (size_t i = 0; i < PWM_PARAM_N_OUTPUTS; ++i) {
-    CHECK_DIF_OK(
-        dif_pwm_channel_set_enabled(&pwm, kPwmChannel[i], kDifToggleDisabled));
-    channel_config_.duty_cycle_a = kPwmDutycycle[i];
-    CHECK_DIF_OK(
-        dif_pwm_configure_channel(&pwm, kPwmChannel[i], channel_config_));
-    CHECK_DIF_OK(
-        dif_pwm_channel_set_enabled(&pwm, kPwmChannel[i], kDifToggleEnabled));
-  }
-
-  // Enable all PWM channels
-  CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleEnabled));
-
-  // PINMUX
-  for (size_t i = 0; i < PWM_PARAM_N_OUTPUTS; ++i) {
-    CHECK_DIF_OK(
-        dif_pinmux_output_select(&pinmux, kPinmuxMioOut[i], kPinmuxOutsel[i]));
-  }
-
-  LOG_INFO("PWM active");
-
-  // OTP
-
-  // Configure OTP Control to do periodic "consistency" & "integrity" checks.
-  const dif_otp_ctrl_config_t otp_ctrl_config = {
-      .check_timeout = UINT32_MAX,
-      .integrity_period_mask = 0x1,
-      .consistency_period_mask = 0x1,
-  };
-
-  CHECK_DIF_OK(dif_otp_ctrl_configure(&otp_ctrl, otp_ctrl_config));
-
-  LOG_INFO("OTP periodic checks active");
-
-  // AON Timer
-  const uint64_t kTimeTillBark = 1000;
-
-  CHECK_DIF_OK(dif_aon_timer_watchdog_stop(&aon_timer));
-  CHECK_DIF_OK(dif_aon_timer_clear_wakeup_cause(&aon_timer));
-  expected_isr_handler = wdog_irq_handler;
-  nmi_fired = false;
-  nmi_state = (dif_rv_core_ibex_nmi_state_t){0};
-  CHECK_DIF_OK(
-      dif_rv_core_ibex_enable_nmi(&rv_core_ibex, kDifRvCoreIbexNmiSourceWdog));
-  uint32_t count_cycles = 0;
-  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(kTimeTillBark,
-                                                                &count_cycles));
-
-  if (kDeepSleep) {
-    // activate in Wakeup mode (no need for IRQ)
-    CHECK_STATUS_OK(
-        aon_timer_testutils_wakeup_config(&aon_timer, kTimeTillBark));
-  } else {
-    // Unmask the software interrupt so it can be used to bring the CPU out of
-    // sleep without having an NMI race WFI.
-    irq_software_ctrl(/*en=*/true);
-
-    // activate in Watchdog mode & IRQ
-    CHECK_STATUS_OK(aon_timer_testutils_watchdog_config(
-        &aon_timer, count_cycles, UINT32_MAX, false));
-  }
-  LOG_INFO("AON Timer active");
-
-  // ADC Controller
-  const uint8_t kNumLowPowerSamples = 2;
-  const uint8_t kNumNormalPowerSamples = 1;
-  const uint64_t kPowerUpTime = 30;
-  const uint64_t kWakeUpTime = 500;
-  uint32_t power_up_time_aon_cycles = 0;
-  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(
-      kPowerUpTime, &power_up_time_aon_cycles));
-  uint32_t wake_up_time_aon_cycles = 0;
-  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(
-      kWakeUpTime, &wake_up_time_aon_cycles));
-
-  // ADC configuration
-  CHECK_DIF_OK(dif_adc_ctrl_set_enabled(&adc_ctrl, kDifToggleDisabled));
-  CHECK_DIF_OK(dif_adc_ctrl_reset(&adc_ctrl));
-  CHECK(power_up_time_aon_cycles < UINT8_MAX,
-        "power_up_time_aon_cycles must fit into uint8_t");
-  CHECK_DIF_OK(dif_adc_ctrl_configure(
-      &adc_ctrl,
-      (dif_adc_ctrl_config_t){
-          .mode = kDifAdcCtrlLowPowerScanMode,
-          .num_low_power_samples = kNumLowPowerSamples,
-          .num_normal_power_samples = kNumNormalPowerSamples,
-          .power_up_time_aon_cycles = (uint8_t)power_up_time_aon_cycles + 1,
-          .wake_up_time_aon_cycles = wake_up_time_aon_cycles}));
-  CHECK_DIF_OK(dif_adc_ctrl_set_enabled(&adc_ctrl, kDifToggleEnabled));
-
-  LOG_INFO("ADC Controller active");
-
-  // Power Manager
-  dif_pwrmgr_domain_config_t pwrmgr_cfg;
-  dif_pwrmgr_request_sources_t pwrmgr_wakeups;
-
-  // Specify which request sources are enabled for wake-up
-  pwrmgr_wakeups =
-      (kDifPwrmgrWakeupRequestSourceOne | kDifPwrmgrWakeupRequestSourceTwo |
-       kDifPwrmgrWakeupRequestSourceThree | kDifPwrmgrWakeupRequestSourceFour |
-       kDifPwrmgrWakeupRequestSourceFive | kDifPwrmgrWakeupRequestSourceSix);
-
-  // Power manager configuration
-  pwrmgr_cfg = ((kCoreClkOff ? 0 : kDifPwrmgrDomainOptionCoreClockInLowPower) |
-                (kIoClkOff ? 0 : kDifPwrmgrDomainOptionIoClockInLowPower) |
-                (kUsbSlpOff ? 0 : kDifPwrmgrDomainOptionUsbClockInLowPower) |
-                (kUsbActOff ? 0 : kDifPwrmgrDomainOptionUsbClockInActivePower) |
-                (kDeepSleep ? 0 : kDifPwrmgrDomainOptionMainPowerInLowPower));
-  CHECK_STATUS_OK(
-      pwrmgr_testutils_enable_low_power(&pwrmgr, pwrmgr_wakeups, pwrmgr_cfg));
-  LOG_INFO("Power Manage configured");
-
-  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 1));
-  LOG_INFO("all HW is active");
-  test_status_set(0xff20);
-  wait_for_interrupt();
-
-  // Check for software interrupt and clear. Re-initialize the struct in case
-  // the software interrupt did not happen.
-  mmio_region_t plic_base_addr =
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
-  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &rv_plic));
-  bool software_irq_pending;
-  CHECK_DIF_OK(dif_rv_plic_software_irq_is_pending(&rv_plic, kPlicTarget,
-                                                   &software_irq_pending));
-  CHECK(software_irq_pending,
-        "Software IRQ unexpectedly not pending after WFI");
-  CHECK_DIF_OK(dif_rv_plic_software_irq_acknowledge(&rv_plic, kPlicTarget));
-
-  // We expect the watchdog bark interrupt to be pending on the peripheral side.
-  CHECK(irq_is_pending, "Expected watchdog bark interrupt to be pending");
-
-  // Check NMI previous state (before clearing):
-  CHECK(nmi_state.wdog_enabled && nmi_state.wdog_barked,
-        "WDOG NMI state check1 not expected! wdog_enable:%x, wdog_raised:%x",
-        nmi_state.wdog_enabled, nmi_state.wdog_barked);
-
-  CHECK_DIF_OK(dif_rv_core_ibex_get_nmi_state(
-      &rv_core_ibex, (dif_rv_core_ibex_nmi_state_t *)&nmi_state));
-  // Check NMI current state (after clearing):
-  CHECK(nmi_state.wdog_enabled && !nmi_state.wdog_barked,
-        "WDOG NMI state check2 not expected! wdog_enable:%x wdog_raised:%x",
-        nmi_state.wdog_enabled, nmi_state.wdog_barked);
-
-  prepare_to_exit();
-  return true;
-}
diff --git a/sw/device/tests/chip_power_sleep_load_test.c b/sw/device/tests/chip_power_sleep_load_test.c
new file mode 100644
index 0000000000000..1403deac7fcb4
--- /dev/null
+++ b/sw/device/tests/chip_power_sleep_load_test.c
@@ -0,0 +1,467 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// Included code:
+
+#include <stdint.h>
+
+#include "sw/device/lib/arch/boot_stage.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_adc_ctrl.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_pwm.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_rv_timer.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/alert_handler_testutils.h"
+#include "sw/device/lib/testing/aon_timer_testutils.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "alert_handler_regs.h"
+#include "aon_timer_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "pwm_regs.h"
+
+typedef void (*isr_handler)(void);
+static volatile isr_handler expected_isr_handler;
+static volatile dif_rv_core_ibex_nmi_state_t nmi_state;
+static volatile bool nmi_fired = false;
+static volatile bool ext_irq_fired = false;
+static volatile bool irq_is_pending = false;
+
+static dif_aon_timer_t aon_timer;
+static dif_rv_core_ibex_t rv_core_ibex;
+static dif_rv_plic_t rv_plic;
+static dif_pwrmgr_t pwrmgr;
+static dif_rv_timer_t rv_timer;
+static dif_alert_handler_t alert_handler;
+static dif_pwm_t pwm;
+static dif_pinmux_t pinmux;
+static dif_otp_ctrl_t otp_ctrl;
+static dif_gpio_t gpio;
+static dif_adc_ctrl_t adc_ctrl;
+
+static volatile const bool kCoreClkOff = false;
+static volatile const bool kIoClkOff = false;
+static volatile const bool kUsbSlpOff = false;
+static volatile const bool kUsbActOff = false;
+static volatile const bool kDeepSleep = false;
+
+static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
+
+void ottf_external_isr(uint32_t *exc_info) {
+  LOG_INFO("got external IRQ");
+  ext_irq_fired = true;
+}
+
+void ottf_external_nmi_handler(uint32_t *exc_info) {
+  nmi_fired = true;
+
+  expected_isr_handler();
+
+  CHECK_DIF_OK(dif_rv_core_ibex_get_nmi_state(
+      &rv_core_ibex, (dif_rv_core_ibex_nmi_state_t *)&nmi_state));
+  CHECK_DIF_OK(dif_rv_core_ibex_clear_nmi_state(&rv_core_ibex,
+                                                kDifRvCoreIbexNmiSourceAll));
+}
+
+// Specific handlee for the wdog bark NMI IRQ.
+static void wdog_irq_handler(void) {
+  bool is_pending;
+
+  CHECK_DIF_OK(dif_aon_timer_irq_is_pending(
+      &aon_timer, kDifAonTimerIrqWdogTimerBark, &is_pending));
+  irq_is_pending = is_pending;
+
+  // Stop the watchdog.
+  CHECK_DIF_OK(dif_aon_timer_watchdog_stop(&aon_timer));
+
+  CHECK_DIF_OK(
+      dif_aon_timer_irq_acknowledge(&aon_timer, kDifAonTimerIrqWdogTimerBark));
+
+  // Signal a software interrupt.
+  dif_rv_plic_t rv_plic_isr;
+  mmio_region_t plic_base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &rv_plic_isr));
+  CHECK_DIF_OK(dif_rv_plic_software_irq_force(&rv_plic_isr, kPlicTarget));
+}
+
+static void prepare_to_exit(void) {
+  CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleDisabled));
+
+  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 0));
+
+  LOG_INFO("Prepare to exit");
+
+  // Check that no external interrupts have occurred.
+  CHECK(ext_irq_fired == false, "Unexpected external interrupt triggered.");
+
+  CHECK_STATUS_OK(aon_timer_testutils_shutdown(&aon_timer));
+
+  // Set the test status flag back to "TestStatusInTest".
+  test_status_set(kTestStatusInTest);
+}
+
+bool test_main(void) {
+  // Define access to DUT IPs:
+  CHECK_DIF_OK(dif_aon_timer_init(
+      mmio_region_from_addr(TOP_EARLGREY_AON_TIMER_AON_BASE_ADDR), &aon_timer));
+  CHECK_DIF_OK(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+  CHECK_DIF_OK(dif_pwrmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
+  CHECK_DIF_OK(dif_rv_timer_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_TIMER_BASE_ADDR), &rv_timer));
+  CHECK_DIF_OK(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
+  CHECK_DIF_OK(dif_pwm_init(
+      mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR), &pwm));
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
+  CHECK_DIF_OK(
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(dif_adc_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_ADC_CTRL_AON_BASE_ADDR), &adc_ctrl));
+
+  LOG_INFO("Running CHIP Power Sleep Load test");
+
+  // Testplan: "The test should set a GPIO (mapped to the IOA2 pin) to high
+  // while the power state of interest is active".
+
+  const uint32_t kGpioMask = 0x00000004;
+
+  // PINMUX.
+  CHECK_DIF_OK(
+      dif_pinmux_output_select(&pinmux, (kTopEarlgreyPinmuxMioOutIoa0 + 2),
+                               (kTopEarlgreyPinmuxOutselGpioGpio0 + 2)));
+
+  // Set output modes of all GPIO pins.
+  CHECK_DIF_OK(dif_gpio_output_set_enabled_all(&gpio, kGpioMask));
+
+  // Write to set IOA2 low at the start of the test:
+  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 0));
+
+  LOG_INFO("GPIO active");
+
+  // PWRMGR- Read wakeup reason.
+
+  dif_pwrmgr_wakeup_reason_t wakeup_reason;
+  CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
+  LOG_INFO("wakeup type:%d. wakeup reason: 0x%02X", wakeup_reason.types,
+           wakeup_reason.request_sources);
+
+  if (wakeup_reason.types == 0) {
+    // Wakeup due to Power Up - DO NOTHING HERE - go on with the rest of the
+    // test's flow....
+  } else if ((wakeup_reason.types == kDifPwrmgrWakeupTypeRequest) &&
+             (wakeup_reason.request_sources ==
+              kDifPwrmgrWakeupRequestSourceFive)) {
+    // Wakeup due to a peripheral request and reason is AON Timer.
+    prepare_to_exit();
+    return true;
+  } else {
+    LOG_ERROR("unexpected wakeup reason! type=0x%x, source=0x%x",
+              wakeup_reason.types, wakeup_reason.request_sources);
+    return false;
+  }
+
+  // RV Timer.
+  enum {
+    kHart = (uint32_t)kTopEarlgreyPlicTargetIbex0,
+    kComparator = 0,
+    kTickFreqHz = 1000000,
+    kDeadline = UINT32_MAX,
+  };
+
+  CHECK_DIF_OK(dif_rv_timer_reset(&rv_timer));
+
+  dif_rv_timer_tick_params_t rv_timer_tick_params;
+  CHECK_DIF_OK(dif_rv_timer_approximate_tick_params(
+      kClockFreqPeripheralHz, kTickFreqHz, &rv_timer_tick_params));
+  // Configure the tick params for a particular hart's counter.
+  CHECK_DIF_OK(
+      dif_rv_timer_set_tick_params(&rv_timer, kHart, rv_timer_tick_params));
+
+  uint64_t current_time;
+  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, kHart, &current_time));
+  CHECK_DIF_OK(dif_rv_timer_arm(&rv_timer, kHart, kComparator,
+                                (current_time + kDeadline)));
+  CHECK_DIF_OK(
+      dif_rv_timer_counter_set_enabled(&rv_timer, kHart, kDifToggleEnabled));
+
+  LOG_INFO("RV Timer active");
+
+  // Alert Ping.
+
+  // 1. Config structs for all Incoming Alerts:
+  dif_alert_handler_alert_t alerts[ALERT_HANDLER_PARAM_N_ALERTS];
+  dif_alert_handler_class_t alert_classes[ALERT_HANDLER_PARAM_N_ALERTS];
+  for (size_t i = 0; i < ALERT_HANDLER_PARAM_N_ALERTS; ++i) {
+    alerts[i] = i;
+    alert_classes[i] = kDifAlertHandlerClassA;
+  }
+
+  // 2. Config structs for Local Alerts:
+  dif_alert_handler_local_alert_t loc_alerts[] = {
+      kDifAlertHandlerLocalAlertAlertPingFail};
+  dif_alert_handler_class_t loc_alert_classes[] = {kDifAlertHandlerClassB};
+
+  // 3. Config structs for Escalation phase:
+  dif_alert_handler_escalation_phase_t esc_phases[] = {
+      {.phase = kDifAlertHandlerClassStatePhase0,
+       .signal = 0,
+       .duration_cycles = 2000}};
+  // Escalation protocol (struct) for an alert class.
+  dif_alert_handler_class_config_t class_config = {
+      .auto_lock_accumulation_counter = kDifToggleDisabled,
+      .accumulator_threshold = UINT16_MAX,
+      .irq_deadline_cycles = UINT32_MAX,
+      .escalation_phases = esc_phases,
+      .escalation_phases_len = ARRAYSIZE(esc_phases),
+      .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase1,
+  };
+  dif_alert_handler_class_config_t class_configs[] = {class_config,
+                                                      class_config};
+  dif_alert_handler_class_t classes[] = {kDifAlertHandlerClassA,
+                                         kDifAlertHandlerClassB};
+
+  // 4. Runtime configuration (struct) for the alert handler:
+  dif_alert_handler_config_t config = {
+      .alerts = alerts,
+      .alert_classes = alert_classes,
+      .alerts_len = ARRAYSIZE(alerts),
+      .local_alerts = loc_alerts,
+      .local_alert_classes = loc_alert_classes,
+      .local_alerts_len = ARRAYSIZE(loc_alerts),
+      .classes = classes,
+      .class_configs = class_configs,
+      .classes_len = ARRAYSIZE(class_configs),
+      .ping_timeout = UINT16_MAX,
+  };
+
+  // 5. Configure Alerts:
+  CHECK_STATUS_OK(alert_handler_testutils_configure_all(&alert_handler, config,
+                                                        kDifToggleEnabled));
+
+  // Checks whether alert handler's ping timer is locked.
+  bool is_locked;
+  CHECK_DIF_OK(
+      dif_alert_handler_is_ping_timer_locked(&alert_handler, &is_locked));
+  CHECK(is_locked, "Expected alerts to be locked");
+
+  LOG_INFO("Alert ping is active");
+
+  // PWM
+  // Configuration struct for PWM general.
+  const dif_pwm_config_t kConfig_ = {
+      .clock_divisor = 0,
+      .beats_per_pulse_cycle = 32,
+  };
+
+  // Configuration struct for a specific PWM channel.
+  const dif_pwm_channel_config_t kDefaultChCfg_ = {
+      .duty_cycle_a = 0,
+      .duty_cycle_b = 0,
+      .phase_delay = 0,
+      .mode = kDifPwmModeFirmware,
+      .polarity = kDifPwmPolarityActiveHigh,
+      .blink_parameter_x = 0,
+      .blink_parameter_y = 0,
+  };
+  const dif_pwm_channel_t kPwmChannel[PWM_PARAM_N_OUTPUTS] = {
+      kDifPwmChannel0, kDifPwmChannel1, kDifPwmChannel2,
+      kDifPwmChannel3, kDifPwmChannel4, kDifPwmChannel5,
+  };
+  // Duty cycle (arbitrary) values (in the beats).
+  const uint16_t kPwmDutycycle[PWM_PARAM_N_OUTPUTS] = {
+      6, 11, 27, 8, 17, 7,
+  };
+
+  const dif_pinmux_index_t kPinmuxMioOut[PWM_PARAM_N_OUTPUTS] = {
+      kTopEarlgreyPinmuxMioOutIob10, kTopEarlgreyPinmuxMioOutIob11,
+      kTopEarlgreyPinmuxMioOutIob12, kTopEarlgreyPinmuxMioOutIoc10,
+      kTopEarlgreyPinmuxMioOutIoc11, kTopEarlgreyPinmuxMioOutIoc12,
+  };
+  const dif_pinmux_index_t kPinmuxOutsel[PWM_PARAM_N_OUTPUTS] = {
+      kTopEarlgreyPinmuxOutselPwmAonPwm0, kTopEarlgreyPinmuxOutselPwmAonPwm1,
+      kTopEarlgreyPinmuxOutselPwmAonPwm2, kTopEarlgreyPinmuxOutselPwmAonPwm3,
+      kTopEarlgreyPinmuxOutselPwmAonPwm4, kTopEarlgreyPinmuxOutselPwmAonPwm5,
+  };
+
+  CHECK_DIF_OK(dif_pwm_configure(&pwm, kConfig_));
+
+  // Configure each of the PWM channels:
+  dif_pwm_channel_config_t channel_config_ = kDefaultChCfg_;
+  for (size_t i = 0; i < PWM_PARAM_N_OUTPUTS; ++i) {
+    CHECK_DIF_OK(
+        dif_pwm_channel_set_enabled(&pwm, kPwmChannel[i], kDifToggleDisabled));
+    channel_config_.duty_cycle_a = kPwmDutycycle[i];
+    CHECK_DIF_OK(
+        dif_pwm_configure_channel(&pwm, kPwmChannel[i], channel_config_));
+    CHECK_DIF_OK(
+        dif_pwm_channel_set_enabled(&pwm, kPwmChannel[i], kDifToggleEnabled));
+  }
+
+  // Enable all PWM channels.
+  CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleEnabled));
+
+  // PINMUX.
+  for (size_t i = 0; i < PWM_PARAM_N_OUTPUTS; ++i) {
+    CHECK_DIF_OK(
+        dif_pinmux_output_select(&pinmux, kPinmuxMioOut[i], kPinmuxOutsel[i]));
+  }
+
+  LOG_INFO("PWM active");
+
+  // OTP.
+  if (kBootStage != kBootStageOwner) {
+    // The ROM_EXT locks up the OTP register in the ePMP, any attempt to
+    // write to it would generate an exception. Therfore we can't test the
+    // OTP periodic checks when the test runs after the ROM_EXT.
+
+    // Configure OTP Control to do periodic "consistency" & "integrity" checks.
+    const dif_otp_ctrl_config_t kOtpCtrlConfig = {
+        .check_timeout = UINT32_MAX,
+        .integrity_period_mask = 0x1,
+        .consistency_period_mask = 0x1,
+    };
+
+    CHECK_DIF_OK(dif_otp_ctrl_configure(&otp_ctrl, kOtpCtrlConfig));
+
+    LOG_INFO("OTP periodic checks active");
+  } else {
+    LOG_INFO("Skipping OTP periodic checks due to ROM_EXT ePMP configuration");
+  }
+
+  // AON Timer.
+  const uint64_t kTimeTillBark = 1000;
+
+  CHECK_DIF_OK(dif_aon_timer_watchdog_stop(&aon_timer));
+  CHECK_DIF_OK(dif_aon_timer_clear_wakeup_cause(&aon_timer));
+  expected_isr_handler = wdog_irq_handler;
+  nmi_fired = false;
+  nmi_state = (dif_rv_core_ibex_nmi_state_t){0};
+  CHECK_DIF_OK(
+      dif_rv_core_ibex_enable_nmi(&rv_core_ibex, kDifRvCoreIbexNmiSourceWdog));
+  uint32_t count_cycles = 0;
+  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(kTimeTillBark,
+                                                                &count_cycles));
+
+  if (kDeepSleep) {
+    // Activate in Wakeup mode (no need for IRQ).
+    CHECK_STATUS_OK(
+        aon_timer_testutils_wakeup_config(&aon_timer, kTimeTillBark));
+  } else {
+    // Unmask the software interrupt so it can be used to bring the CPU out of
+    // sleep without having an NMI race WFI.
+    irq_software_ctrl(/*en=*/true);
+
+    // Activate in Watchdog mode & IRQ.
+    CHECK_STATUS_OK(aon_timer_testutils_watchdog_config(
+        &aon_timer, count_cycles, UINT32_MAX, false));
+  }
+  LOG_INFO("AON Timer active");
+
+  // ADC Controller.
+  enum {
+    kNumLowPowerSamples = 2,
+    kNumNormalPowerSamples = 1,
+    kPowerUpTime = 30,
+    kWakeUpTime = 500,
+  };
+  uint32_t power_up_time_aon_cycles = 0;
+  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(
+      kPowerUpTime, &power_up_time_aon_cycles));
+  uint32_t wake_up_time_aon_cycles = 0;
+  CHECK_STATUS_OK(aon_timer_testutils_get_aon_cycles_32_from_us(
+      kWakeUpTime, &wake_up_time_aon_cycles));
+
+  // ADC configuration.
+  CHECK_DIF_OK(dif_adc_ctrl_set_enabled(&adc_ctrl, kDifToggleDisabled));
+  CHECK_DIF_OK(dif_adc_ctrl_reset(&adc_ctrl));
+  CHECK(power_up_time_aon_cycles < UINT8_MAX,
+        "power_up_time_aon_cycles must fit into uint8_t");
+  CHECK_DIF_OK(dif_adc_ctrl_configure(
+      &adc_ctrl,
+      (dif_adc_ctrl_config_t){
+          .mode = kDifAdcCtrlLowPowerScanMode,
+          .num_low_power_samples = kNumLowPowerSamples,
+          .num_normal_power_samples = kNumNormalPowerSamples,
+          .power_up_time_aon_cycles = (uint8_t)power_up_time_aon_cycles + 1,
+          .wake_up_time_aon_cycles = wake_up_time_aon_cycles}));
+  CHECK_DIF_OK(dif_adc_ctrl_set_enabled(&adc_ctrl, kDifToggleEnabled));
+
+  LOG_INFO("ADC Controller active");
+
+  // Power Manager.
+  dif_pwrmgr_domain_config_t pwrmgr_cfg;
+  dif_pwrmgr_request_sources_t pwrmgr_wakeups;
+
+  // Specify which request sources are enabled for wake-up.
+  pwrmgr_wakeups =
+      (kDifPwrmgrWakeupRequestSourceOne | kDifPwrmgrWakeupRequestSourceTwo |
+       kDifPwrmgrWakeupRequestSourceThree | kDifPwrmgrWakeupRequestSourceFour |
+       kDifPwrmgrWakeupRequestSourceFive | kDifPwrmgrWakeupRequestSourceSix);
+
+  // Power manager configuration.
+  pwrmgr_cfg = ((kCoreClkOff ? 0 : kDifPwrmgrDomainOptionCoreClockInLowPower) |
+                (kIoClkOff ? 0 : kDifPwrmgrDomainOptionIoClockInLowPower) |
+                (kUsbSlpOff ? 0 : kDifPwrmgrDomainOptionUsbClockInLowPower) |
+                (kUsbActOff ? 0 : kDifPwrmgrDomainOptionUsbClockInActivePower) |
+                (kDeepSleep ? 0 : kDifPwrmgrDomainOptionMainPowerInLowPower));
+  CHECK_STATUS_OK(
+      pwrmgr_testutils_enable_low_power(&pwrmgr, pwrmgr_wakeups, pwrmgr_cfg));
+  LOG_INFO("Power Manage configured");
+
+  CHECK_DIF_OK(dif_gpio_write(&gpio, 2, 1));
+  LOG_INFO("all HW is active");
+  test_status_set(0xff20);
+  wait_for_interrupt();
+
+  // Check for software interrupt and clear. Re-initialize the struct in case
+  // the software interrupt did not happen.
+  mmio_region_t plic_base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &rv_plic));
+  bool software_irq_pending;
+  CHECK_DIF_OK(dif_rv_plic_software_irq_is_pending(&rv_plic, kPlicTarget,
+                                                   &software_irq_pending));
+  CHECK(software_irq_pending,
+        "Software IRQ unexpectedly not pending after WFI");
+  CHECK_DIF_OK(dif_rv_plic_software_irq_acknowledge(&rv_plic, kPlicTarget));
+
+  // We expect the watchdog bark interrupt to be pending on the peripheral side.
+  CHECK(irq_is_pending, "Expected watchdog bark interrupt to be pending");
+
+  // Check NMI previous state (before clearing):
+  CHECK(nmi_state.wdog_enabled && nmi_state.wdog_barked,
+        "WDOG NMI state check1 not expected! wdog_enable:%x, wdog_raised:%x",
+        nmi_state.wdog_enabled, nmi_state.wdog_barked);
+
+  CHECK_DIF_OK(dif_rv_core_ibex_get_nmi_state(
+      &rv_core_ibex, (dif_rv_core_ibex_nmi_state_t *)&nmi_state));
+  // Check NMI current state (after clearing):
+  CHECK(nmi_state.wdog_enabled && !nmi_state.wdog_barked,
+        "WDOG NMI state check2 not expected! wdog_enable:%x wdog_raised:%x",
+        nmi_state.wdog_enabled, nmi_state.wdog_barked);
+
+  prepare_to_exit();
+  return true;
+}
diff --git a/sw/device/tests/clkmgr_jitter_frequency_test.c b/sw/device/tests/clkmgr_jitter_frequency_test.c
index 9f1c9de3924ef..008bbc87811b9 100644
--- a/sw/device/tests/clkmgr_jitter_frequency_test.c
+++ b/sw/device/tests/clkmgr_jitter_frequency_test.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/arch/device.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/dif/dif_sensor_ctrl.h"
 #include "sw/device/lib/runtime/log.h"
@@ -28,6 +29,18 @@ OTTF_DEFINE_TEST_CONFIG();
  * - for simulation it requires overriding the hardware behavior via plusargs
  *   so it runs with calibrated USB clock, or the USB clock frequency will be
  *   incorrect.
+ *
+ * When jitter is enabled it checks that using jitter thresholds the checks
+ * pass, and with normal thresholds we encounter recoverable errors.
+ *
+ * When jitter is disabled it checks that either sets of thresholds cause
+ * no errors.
+ *
+ * The test flow depends on jitter enable status: once jitter is enabled it
+ * cannot be disabled.
+ *
+ * FPGA emulation platforms don't support jittery clocks so some of the
+ * checks are bypassed for them.
  */
 enum {
   kMeasurementsPerRound = 100,
@@ -36,6 +49,50 @@ enum {
 static dif_clkmgr_t clkmgr;
 static dif_pwrmgr_t pwrmgr;
 
+// Test with thresholds for jitter enabled expecting no failures, and then
+// with thresholds for jitter disabled expecting failures.
+static void test_clock_frequencies_with_jitter_enabled(uint32_t delay_micros) {
+  LOG_INFO("Testing frequencies with jitter enabled");
+  CHECK_STATUS_OK(clkmgr_testutils_enable_clock_counts_with_expected_thresholds(
+      &clkmgr, /*jitter_enabled=*/true, /*external_clk=*/false,
+      /*low_speed=*/false));
+  busy_spin_micros(delay_micros);
+  // This checks there are no errors.
+  CHECK_STATUS_OK(clkmgr_testutils_check_measurement_counts(&clkmgr));
+  CHECK_STATUS_OK(clkmgr_testutils_disable_clock_counts(&clkmgr));
+  if (kDeviceType == kDeviceSimDV || kDeviceType == kDeviceSilicon) {
+    // Set thresholds for jitter disabled expecting failures.
+    CHECK_STATUS_OK(
+        clkmgr_testutils_enable_clock_counts_with_expected_thresholds(
+            &clkmgr, /*jitter_enabled=*/false, /*external_clk=*/false,
+            /*low_speed=*/false));
+    busy_spin_micros(delay_micros);
+    dif_clkmgr_recov_err_codes_t err_codes;
+    CHECK_DIF_OK(dif_clkmgr_recov_err_code_get_codes(&clkmgr, &err_codes));
+    CHECK(err_codes != 0);
+  } else {
+    LOG_INFO("Testing with jitter enabled but no-jitter thresholds %s",
+             "is not viable for FPGAs");
+  }
+}
+
+static void test_clock_frequencies_with_jitter_disabled(uint32_t delay_micros) {
+  LOG_INFO("Testing frequencies with jitter disabled");
+  CHECK_STATUS_OK(clkmgr_testutils_enable_clock_counts_with_expected_thresholds(
+      &clkmgr, /*jitter_enabled=*/false, /*external_clk=*/false,
+      /*low_speed=*/false));
+  busy_spin_micros(delay_micros);
+  // This checks there are no errors.
+  CHECK_STATUS_OK(clkmgr_testutils_check_measurement_counts(&clkmgr));
+  CHECK_STATUS_OK(clkmgr_testutils_disable_clock_counts(&clkmgr));
+  // Set thresholds for jitter disabled expecting failures.
+  CHECK_STATUS_OK(clkmgr_testutils_enable_clock_counts_with_expected_thresholds(
+      &clkmgr, /*jitter_enabled=*/true, /*external_clk=*/false,
+      /*low_speed=*/false));
+  busy_spin_micros(delay_micros);
+  CHECK_STATUS_OK(clkmgr_testutils_check_measurement_counts(&clkmgr));
+}
+
 bool test_main(void) {
   dif_sensor_ctrl_t sensor_ctrl;
 
@@ -57,14 +114,12 @@ bool test_main(void) {
 
   CHECK(UNWRAP(pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) == true);
 
-  CHECK_STATUS_OK(clkmgr_testutils_enable_clock_counts_with_expected_thresholds(
-      &clkmgr, /*jitter_enabled=*/true, /*external_clk=*/false,
-      /*low_speed=*/false));
-  busy_spin_micros(delay_micros);
-
-  // check results
-  CHECK_STATUS_OK(clkmgr_testutils_check_measurement_counts(&clkmgr));
-  CHECK_STATUS_OK(clkmgr_testutils_disable_clock_counts(&clkmgr));
-
+  dif_toggle_t jitter_status;
+  CHECK_DIF_OK(dif_clkmgr_jitter_get_enabled(&clkmgr, &jitter_status));
+  if (jitter_status == kDifToggleDisabled) {
+    test_clock_frequencies_with_jitter_disabled(delay_micros);
+    CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr));
+  }
+  test_clock_frequencies_with_jitter_enabled(delay_micros);
   return true;
 }
diff --git a/sw/device/tests/clkmgr_jitter_test.c b/sw/device/tests/clkmgr_jitter_test.c
index 0cfa428609347..b7e763976dbef 100644
--- a/sw/device/tests/clkmgr_jitter_test.c
+++ b/sw/device/tests/clkmgr_jitter_test.c
@@ -16,19 +16,19 @@ bool test_main(void) {
   dif_clkmgr_t clkmgr;
   CHECK_DIF_OK(dif_clkmgr_init(
       mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
-  // Get the initial jitter state. It might be enabled or disabled depending
-  // on reset behavior - either is fine for the purposes of this test.
+
+  // Get the initial jitter state: this is right after reset so it should be
+  // disabled.
   dif_toggle_t state;
   CHECK_DIF_OK(dif_clkmgr_jitter_get_enabled(&clkmgr, &state));
-
-  // Toggle the enable twice so that it ends up in its original state.
-  for (int j = 0; j < 2; ++j) {
-    dif_toggle_t expected_state =
-        state == kDifToggleEnabled ? kDifToggleDisabled : kDifToggleEnabled;
-    dif_toggle_t actual_state = state;
-    CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr, expected_state));
-    CHECK_DIF_OK(dif_clkmgr_jitter_get_enabled(&clkmgr, &actual_state));
-    CHECK(actual_state == expected_state);
-  }
+  CHECK(state == kDifToggleDisabled);
+  // Check that enabling jitter doesn't depend on jitter_regwen.
+  // Lock jitter_enable with jitter_regwen.
+  CHECK_DIF_OK(dif_clkmgr_lock_jitter_enable(&clkmgr));
+  // A write to enable succeeds.
+  dif_toggle_t actual_state = kDifToggleDisabled;
+  CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr));
+  CHECK_DIF_OK(dif_clkmgr_jitter_get_enabled(&clkmgr, &actual_state));
+  CHECK(actual_state == kDifToggleEnabled);
   return true;
 }
diff --git a/sw/device/tests/clkmgr_reset_frequency_test.c b/sw/device/tests/clkmgr_reset_frequency_test.c
index 3df5c5c09c983..66cdaec3c4f29 100644
--- a/sw/device/tests/clkmgr_reset_frequency_test.c
+++ b/sw/device/tests/clkmgr_reset_frequency_test.c
@@ -10,6 +10,7 @@
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/sensor_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -52,6 +53,12 @@ bool test_main(void) {
   CHECK_DIF_OK(dif_rstmgr_init(
       mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
 
+  // The test will trigger many measurement errors which cause an alert that
+  // fires constantly with each new measurement and cannot really be
+  // acknowledged. Ignore this alert for the purpose of this test.
+  CHECK_STATUS_OK(
+      ottf_alerts_ignore_alert(kTopEarlgreyAlertIdClkmgrAonRecovFault));
+
   LOG_INFO("TEST: wait for ast init");
   IBEX_SPIN_FOR(sensor_ctrl_ast_init_done(&sensor_ctrl), 1000);
   LOG_INFO("TEST: done ast init");
diff --git a/sw/device/tests/closed_source/BUILD.bazel b/sw/device/tests/closed_source/BUILD.bazel
index 7ed9d703df9a8..304a08832e2ba 100644
--- a/sw/device/tests/closed_source/BUILD.bazel
+++ b/sw/device/tests/closed_source/BUILD.bazel
@@ -2,13 +2,10 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@//rules:const.bzl", "CONST")
+load("@lowrisc_opentitan//rules:const.bzl", "CONST")
+load("@lowrisc_opentitan//rules/opentitan:keyutils.bzl", "ECDSA_ONLY_KEY_STRUCTS")
 load(
-    "@//rules:opentitan.bzl",
-    "ECDSA_ONLY_KEY_STRUCTS",
-)
-load(
-    "@//rules/opentitan:defs.bzl",
+    "@lowrisc_opentitan//rules/opentitan:defs.bzl",
     "dv_params",
     "ecdsa_key_for_lc_state",
     "opentitan_test",
diff --git a/sw/device/tests/coverage_test.c b/sw/device/tests/coverage_test.c
deleted file mode 100644
index 9b0d6eef6d698..0000000000000
--- a/sw/device/tests/coverage_test.c
+++ /dev/null
@@ -1,43 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/testing/test_framework/coverage.h"
-
-#include <stdbool.h>
-#include <stdint.h>
-
-#include "sw/device/lib/arch/device.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/runtime/print.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-static void spin_45(uint8_t state) {
-  static const char kSpinnerChars[] = "|/-\\";
-  base_printf("%c\r", kSpinnerChars[state]);
-}
-
-static void spin_180(void) {
-  for (uint8_t state = 0; state < 4; ++state) {
-    spin_45(state);
-    busy_spin_micros(100 * 1000);  // 0.1s
-  }
-}
-
-OTTF_DEFINE_TEST_CONFIG();
-
-/**
- * A simple program for testing the coverage functionality.
- *
- * Prints a message and displays a spinning bar.
- */
-bool test_main(void) {
-  // Print an assuring message.
-  LOG_INFO("Collecting coverage data.");
-  // Display a spinning bar.
-  for (uint8_t i = 0; i < 4; ++i) {
-    spin_180();
-  }
-  return true;
-}
diff --git a/sw/device/tests/crt_test.c b/sw/device/tests/crt_test.c
index 907a4200e6490..ab8bf96faa635 100644
--- a/sw/device/tests/crt_test.c
+++ b/sw/device/tests/crt_test.c
@@ -10,9 +10,11 @@
 #include "sw/device/lib/base/stdasm.h"
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/ibex.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/status.h"
 #include "sw/device/silicon_creator/lib/manifest_def.h"
@@ -41,6 +43,23 @@ static const uintptr_t data_init_start_addr = (uintptr_t)&_data_init_start;
 volatile char ensure_data_exists = 42;
 volatile char ensure_bss_exists;
 
+volatile size_t expect_trap;
+volatile size_t trap_seen;
+void ottf_illegal_instr_fault_handler(uint32_t *exc_info) {
+  if (!expect_trap) {
+    // In all other cases, we are in an invalid test state.  Invoke the
+    // generic fault handler.
+    ottf_generic_fault_print(exc_info, "Illegal Instruction",
+                             ibex_mcause_read());
+    abort();
+  }
+  trap_seen += 1;
+
+  // Overwrite mepc to return from crt function
+  // i.e. mepc = ra
+  exc_info[0] = exc_info[1];
+}
+
 static dif_uart_t uart0;
 static void init_uart(void) {
   CHECK_DIF_OK(dif_uart_init(
@@ -79,11 +98,22 @@ static void test_crt_section_clear(void) {
   const struct {
     size_t start;
     size_t end;
-  } kTests[] = {{.start = 0, .end = 0},           {.start = 0, .end = 1},
-                {.start = kLen - 1, .end = kLen}, {.start = 0, .end = kLen - 1},
-                {.start = 1, .end = kLen},        {.start = 0, .end = kLen}};
+    size_t trap;
+  } kTests[] = {
+      {.start = 0, .end = 0, .trap = 0},
+      {.start = 0, .end = 1, .trap = 0},
+      {.start = kLen - 1, .end = kLen, .trap = 0},
+      {.start = 0, .end = kLen - 1, .trap = 0},
+      {.start = 1, .end = kLen, .trap = 0},
+      {.start = 0, .end = kLen, .trap = 0},
+      {.start = kLen, .end = 0, .trap = 1},
+  };
 
   for (size_t t = 0; t < ARRAYSIZE(kTests); ++t) {
+    // Set the trap expectation
+    expect_trap = kTests[t].trap;
+    trap_seen = 0;
+
     // Set target array to non-zero values.
     uint32_t section[kLen];
     const uint32_t kVal = ~0u;
@@ -103,6 +133,8 @@ static void test_crt_section_clear(void) {
             "%s case %u: section[%u] got 0x%08x, want 0x%08x", __func__, t, i,
             section[i], expect);
     }
+    CHECK(trap_seen == kTests[t].trap, "incorrect trap count: got %d, want %d",
+          trap_seen, kTests[t].trap);
   }
 }
 
@@ -128,22 +160,30 @@ static void test_crt_section_copy(void) {
     size_t start;
     size_t end;
     size_t source;
-  } kTests[] = {{.start = 0, .end = 0, .source = 0},
-                {.start = 0, .end = 1, .source = 1},
-                {.start = kLen - 1, .end = kLen, .source = 2},
-                {.start = 0, .end = kLen - 1, .source = 1},
-                {.start = 1, .end = kLen, .source = 1},
-                {.start = 0, .end = kLen, .source = 0},
-                {.start = 0, .end = kLen, .source = 0},
-                {.start = 1, .end = kLen, .source = 0},
-                {.start = 2, .end = kLen, .source = 0},
-                {.start = 3, .end = kLen, .source = 0},
-                {.start = 0, .end = kLen / 2, .source = 0},
-                {.start = 1, .end = kLen / 2, .source = 0},
-                {.start = 2, .end = kLen / 2, .source = 0},
-                {.start = 3, .end = kLen / 2, .source = 0}};
+    char trap;
+  } kTests[] = {
+      {.start = 0, .end = 0, .source = 0, .trap = 0},
+      {.start = 0, .end = 1, .source = 1, .trap = 0},
+      {.start = 1, .end = 0, .source = 1, .trap = 1},
+      {.start = kLen - 1, .end = kLen, .source = 2, .trap = 0},
+      {.start = 0, .end = kLen - 1, .source = 1, .trap = 0},
+      {.start = 1, .end = kLen, .source = 1, .trap = 0},
+      {.start = 0, .end = kLen, .source = 0, .trap = 0},
+      {.start = 0, .end = kLen, .source = 0, .trap = 0},
+      {.start = 1, .end = kLen, .source = 0, .trap = 0},
+      {.start = 2, .end = kLen, .source = 0, .trap = 0},
+      {.start = 3, .end = kLen, .source = 0, .trap = 0},
+      {.start = 0, .end = kLen / 2, .source = 0, .trap = 0},
+      {.start = 1, .end = kLen / 2, .source = 0, .trap = 0},
+      {.start = 2, .end = kLen / 2, .source = 0, .trap = 0},
+      {.start = 3, .end = kLen / 2, .source = 0, .trap = 0},
+  };
 
   for (size_t t = 0; t < ARRAYSIZE(kTests); ++t) {
+    // Set the trap expectation
+    expect_trap = kTests[t].trap;
+    trap_seen = 0;
+
     // Clear target array and setup source array with known values (index + 1).
     uint32_t dst[kLen], src[kLen];
     for (size_t i = 0; i < kLen; ++i) {
@@ -166,6 +206,8 @@ static void test_crt_section_copy(void) {
       CHECK(dst[i] == expect, "%s case %u: dst[%u] got 0x%08x, want 0x%08x",
             __func__, t, i, dst[i], expect);
     }
+    CHECK(trap_seen == kTests[t].trap, "incorrect trap count: got %d, want %d",
+          trap_seen, kTests[t].trap);
   }
 }
 
diff --git a/sw/device/tests/crypto/BUILD b/sw/device/tests/crypto/BUILD
index 45b5392c1a318..c63b78809d326 100644
--- a/sw/device/tests/crypto/BUILD
+++ b/sw/device/tests/crypto/BUILD
@@ -11,16 +11,11 @@ load(
     "//rules/opentitan:defs.bzl",
     "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
     "EARLGREY_TEST_ENVS",
-    "cw310_params",
     "fpga_params",
     "opentitan_test",
     "silicon_params",
     "verilator_params",
 )
-load(
-    "@bazel_skylib//lib:dicts.bzl",
-    "dicts",
-)
 load("@ot_python_deps//:requirements.bzl", "requirement")
 
 package(default_visibility = ["//visibility:public"])
@@ -36,6 +31,9 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         ":aes_testvectors",
@@ -125,6 +123,9 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         ":aes_gcm_testutils",
@@ -139,7 +140,7 @@ cc_library(
     srcs = ["aes_gcm_testutils.c"],
     hdrs = ["aes_gcm_testutils.h"],
     deps = [
-        "//sw/device/lib/crypto/impl:aes",
+        "//sw/device/lib/crypto/impl:aes_gcm",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:keyblob",
         "//sw/device/lib/runtime:log",
@@ -205,7 +206,7 @@ opentitan_test(
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p256",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -218,10 +219,13 @@ opentitan_test(
     exec_env = EARLGREY_TEST_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -234,11 +238,14 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p256",
         "//sw/device/lib/crypto/impl:key_transport",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -253,11 +260,14 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/crypto/impl:key_transport",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -284,9 +294,9 @@ opentitan_test(
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:ecc_p256",
         "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -309,12 +319,15 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -328,14 +341,17 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:keymgr",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:ecc_p256",
         "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -348,15 +364,18 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
         "//sw/device/lib/crypto/drivers:keymgr",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:ecc",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/crypto/impl:key_transport",
         "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -402,9 +421,9 @@ opentitan_test(
         ":kmac_testvectors_hardcoded_header",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:kmac",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -413,13 +432,16 @@ opentitan_test(
 opentitan_test(
     name = "kdf_hmac_ctr_functest",
     srcs = ["kdf_hmac_ctr_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/impl:kdf",
+        "//sw/device/lib/crypto/impl:kdf_ctr",
         "//sw/device/lib/crypto/impl:keyblob",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -428,17 +450,21 @@ opentitan_test(
 opentitan_test(
     name = "kdf_kmac_functest",
     srcs = ["kdf_kmac_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         ":kdf_testvectors_random_header",
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:kdf",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:kmac",
+        "//sw/device/lib/crypto/impl:kmac_kdf",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -447,15 +473,15 @@ opentitan_test(
 opentitan_test(
     name = "hmac_functest",
     srcs = ["hmac_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
     deps = [
         ":hmac_testvectors_random_header",
         "//sw/device/lib/base:macros",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:hmac",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -464,15 +490,18 @@ opentitan_test(
 opentitan_test(
     name = "hmac_multistream_functest",
     srcs = ["hmac_multistream_functest.c"],
-    exec_env = EARLGREY_TEST_ENVS,
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         ":hmac_testvectors_random_header",
         "//sw/device/lib/base:macros",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:hmac",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/testing:rand_testutils",
         "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -482,23 +511,16 @@ opentitan_test(
 opentitan_test(
     name = "kdf_kmac_sideload_functest_hardcoded",
     srcs = ["kdf_kmac_sideload_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
     deps = [
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl:kdf",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:kmac_kdf",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/dif:keymgr",
         "//sw/device/lib/dif:kmac",
         "//sw/device/lib/testing:keymgr_testutils",
@@ -510,23 +532,16 @@ opentitan_test(
 opentitan_test(
     name = "kmac_sideload_functest_hardcoded",
     srcs = ["kmac_sideload_functest.c"],
-    broken = fpga_params(tags = ["broken"]),
-    exec_env = dicts.add(
-        EARLGREY_TEST_ENVS,
-        {
-            # FIXME broken in sival ROM_EXT, remove this line when fixed. See #21706.
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-        },
-    ),
+    exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
     ),
     deps = [
         "//sw/device/lib/base:macros",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:kmac",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/dif:keymgr",
         "//sw/device/lib/dif:kmac",
         "//sw/device/lib/testing:keymgr_testutils",
@@ -545,8 +560,8 @@ opentitan_test(
     deps = [
         ":ecdsa_p256_verify_testvectors_hardcoded_header",
         "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl/ecc:ecdsa_p256",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/impl/ecc:p256",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -558,10 +573,13 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -574,10 +592,13 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -590,10 +611,13 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -606,10 +630,13 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "long",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/impl/rsa:rsa_datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
@@ -627,10 +654,13 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/impl/rsa:rsa_datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -645,11 +675,14 @@ opentitan_test(
     exec_env = CRYPTOTEST_EXEC_ENVS,
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -672,8 +705,8 @@ opentitan_test(
         tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/impl/rsa:rsa_datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -691,9 +724,9 @@ opentitan_test(
         tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -716,8 +749,8 @@ opentitan_test(
         tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/impl/rsa:rsa_datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
@@ -735,76 +768,15 @@ opentitan_test(
         tags = ["manual"],
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:profile",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
-autogen_cryptotest_header(
-    name = "rsa_3072_verify_testvectors_wycheproof_header",
-    hjson = "//sw/device/tests/crypto/testvectors:rsa_3072_verify_testvectors_wycheproof",
-    template = ":rsa_3072_verify_testvectors.h.tpl",
-    tool = "//sw/device/tests/crypto:rsa_3072_verify_set_testvectors",
-)
-
-opentitan_test(
-    name = "rsa_3072_verify_functest_wycheproof",
-    srcs = ["rsa_3072_verify_functest.c"],
-    # The test vectors don't fit in the flash allocated for ROM_EXT stage, so
-    # we have to restrict the environments to run with the test_rom.
-    exec_env = dicts.add(
-        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
-        {
-            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
-            "//hw/top_earlgrey:sim_verilator": None,
-        },
-    ),
-    fpga = fpga_params(
-        timeout = "moderate",
-    ),
-    verilator = verilator_params(
-        timeout = "eternal",
-    ),
-    deps = [
-        ":rsa_3072_verify_testvectors_wycheproof_header",
-        "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/drivers:hmac",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl/rsa:rsa_3072_verify",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
-autogen_cryptotest_header(
-    name = "rsa_3072_verify_testvectors_hardcoded_header",
-    hjson = "//sw/device/tests/crypto/testvectors:rsa_3072_verify_testvectors_hardcoded",
-    template = ":rsa_3072_verify_testvectors.h.tpl",
-    tool = "//sw/device/tests/crypto:rsa_3072_verify_set_testvectors",
-)
-
-opentitan_test(
-    name = "rsa_3072_verify_functest_hardcoded",
-    srcs = ["rsa_3072_verify_functest.c"],
-    exec_env = CRYPTOTEST_EXEC_ENVS,
-    verilator = verilator_params(
-        timeout = "long",
-    ),
-    deps = [
-        ":rsa_3072_verify_testvectors_hardcoded_header",
-        "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/drivers:otbn",
-        "//sw/device/lib/crypto/impl:hash",
-        "//sw/device/lib/crypto/impl/rsa:rsa_3072_verify",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
 opentitan_test(
     name = "sha384_functest",
     srcs = ["sha384_functest.c"],
@@ -813,7 +785,7 @@ opentitan_test(
         timeout = "long",
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -827,7 +799,7 @@ opentitan_test(
         timeout = "long",
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/crypto/impl:status",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -870,7 +842,7 @@ opentitan_test(
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:entropy",
-        "//sw/device/lib/crypto/impl:kdf",
+        "//sw/device/lib/crypto/impl:hkdf",
         "//sw/device/lib/crypto/impl:keyblob",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
@@ -886,7 +858,7 @@ opentitan_test(
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:hmac",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:hmac",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -900,7 +872,7 @@ opentitan_test(
         timeout = "long",
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:hmac",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -914,23 +886,12 @@ opentitan_test(
         timeout = "long",
     ),
     deps = [
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:hmac",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
 
-py_binary(
-    name = "rsa_3072_verify_set_testvectors",
-    srcs = ["rsa_3072_verify_set_testvectors.py"],
-    imports = ["."],
-    deps = [
-        "//util/design/lib:common",
-        requirement("hjson"),
-        requirement("mako"),
-    ],
-)
-
 py_binary(
     name = "kdf_set_testvectors",
     srcs = ["kdf_set_testvectors.py"],
@@ -973,7 +934,7 @@ opentitan_test(
     ),
     deps = [
         "//sw/device/lib/crypto/drivers:hmac",
-        "//sw/device/lib/crypto/impl:hash",
+        "//sw/device/lib/crypto/impl:sha2",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
@@ -986,6 +947,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     deps = [
@@ -1004,6 +966,7 @@ opentitan_test(
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_rom_ext": None,
+            "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
         },
     ),
     deps = [
@@ -1016,7 +979,6 @@ filegroup(
     name = "template_files",
     srcs = [
         "ecdsa_p256_verify_testvectors.h.tpl",
-        "rsa_3072_verify_testvectors.h.tpl",
     ],
 )
 
@@ -1048,9 +1010,6 @@ test_suite(
         ":rsa_2048_signature_functest",
         ":rsa_3072_encryption_functest",
         ":rsa_3072_keygen_functest",
-        ":rsa_3072_signature_functest",
-        ":rsa_3072_verify_functest_hardcoded",
-        ":rsa_3072_verify_functest_wycheproof",
         ":rsa_4096_encryption_functest",
         ":rsa_4096_keygen_functest",
         ":rsa_4096_signature_functest",
diff --git a/sw/device/tests/crypto/aes_gcm_testutils.c b/sw/device/tests/crypto/aes_gcm_testutils.c
index 6a9c251cf9158..fb2a335619121 100644
--- a/sw/device/tests/crypto/aes_gcm_testutils.c
+++ b/sw/device/tests/crypto/aes_gcm_testutils.c
@@ -9,7 +9,7 @@
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/aes.h"
+#include "sw/device/lib/crypto/include/aes_gcm.h"
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
@@ -129,7 +129,7 @@ status_t aes_gcm_testutils_encrypt(const aes_gcm_test_t *test, bool streaming,
       .key_mode = kOtcryptoKeyModeAesGcm,
       .key_length = test->key_len * sizeof(uint32_t),
       .hw_backed = kHardenedBoolFalse,
-      .security_level = kOtcryptoKeySecurityLevelLow,
+      .security_level = kOtcryptoKeySecurityLevelHigh,
   };
 
   // Construct blinded key from the key and testing mask.
@@ -226,7 +226,7 @@ status_t aes_gcm_testutils_decrypt(const aes_gcm_test_t *test,
       .key_mode = kOtcryptoKeyModeAesGcm,
       .key_length = test->key_len * sizeof(uint32_t),
       .hw_backed = kHardenedBoolFalse,
-      .security_level = kOtcryptoKeySecurityLevelLow,
+      .security_level = kOtcryptoKeySecurityLevelHigh,
   };
 
   // Construct blinded key from the key and testing mask.
diff --git a/sw/device/tests/crypto/aes_kwp_functest.c b/sw/device/tests/crypto/aes_kwp_functest.c
index f47b3d80be803..b8b1eaf548d3d 100644
--- a/sw/device/tests/crypto/aes_kwp_functest.c
+++ b/sw/device/tests/crypto/aes_kwp_functest.c
@@ -4,7 +4,6 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/include/aes.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -31,7 +30,7 @@ static const otcrypto_key_config_t kWrappingKeyConfig = {
 static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
                                 const otcrypto_blinded_key_t *key_kek) {
   size_t wrapped_num_words;
-  TRY(otcrypto_aes_kwp_wrapped_len(key_to_wrap->config, &wrapped_num_words));
+  TRY(otcrypto_wrapped_key_len(key_to_wrap->config, &wrapped_num_words));
 
   // Wrap the key.
   uint32_t wrapped_key_data[wrapped_num_words];
@@ -39,7 +38,7 @@ static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
       .data = wrapped_key_data,
       .len = ARRAYSIZE(wrapped_key_data),
   };
-  TRY(otcrypto_aes_kwp_wrap(key_to_wrap, key_kek, wrapped_key));
+  TRY(otcrypto_key_wrap(key_to_wrap, key_kek, wrapped_key));
 
   // Unwrap the key.
   hardened_bool_t success;
@@ -50,7 +49,7 @@ static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
       .keyblob_length = keyblob_words * sizeof(uint32_t),
       .keyblob = unwrapped_key_keyblob,
   };
-  TRY(otcrypto_aes_kwp_unwrap(
+  TRY(otcrypto_key_unwrap(
       (otcrypto_const_word32_buf_t){
           .data = wrapped_key_data,
           .len = ARRAYSIZE(wrapped_key_data),
diff --git a/sw/device/tests/crypto/aes_kwp_kat_functest.c b/sw/device/tests/crypto/aes_kwp_kat_functest.c
index 812e9b3ddde20..b178740dd4ad7 100644
--- a/sw/device/tests/crypto/aes_kwp_kat_functest.c
+++ b/sw/device/tests/crypto/aes_kwp_kat_functest.c
@@ -52,6 +52,8 @@ static status_t aes_kwp_wrap_kat(const uint32_t *kek, size_t kek_words,
                                  const uint32_t *ctext, size_t ctext_words) {
   // Construct an AES key.
   aes_key_t aes_kek = make_aes_key(kek, kek_words);
+  // Create the checksum of the key and store it in the key structure.
+  aes_kek.checksum = aes_key_integrity_checksum(&aes_kek);
 
   // Run key wrapping and check the result.
   uint32_t act_ctext[ctext_words + 1];
@@ -87,6 +89,8 @@ static status_t aes_kwp_unwrap_kat(const uint32_t *kek, size_t kek_words,
                                    size_t ptext_bytes) {
   // Construct an AES key.
   aes_key_t aes_kek = make_aes_key(kek, kek_words);
+  // Create the checksum of the key and store it in the key structure.
+  aes_kek.checksum = aes_key_integrity_checksum(&aes_kek);
 
   // Run key unwrapping.
   size_t ptext_words = (ptext_bytes + sizeof(uint32_t) - 1) / sizeof(uint32_t);
diff --git a/sw/device/tests/crypto/aes_kwp_sideload_functest.c b/sw/device/tests/crypto/aes_kwp_sideload_functest.c
index 65735ad36312a..9bf596b85a577 100644
--- a/sw/device/tests/crypto/aes_kwp_sideload_functest.c
+++ b/sw/device/tests/crypto/aes_kwp_sideload_functest.c
@@ -4,7 +4,6 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/include/aes.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
@@ -41,7 +40,7 @@ static const otcrypto_key_config_t kWrappingKeyConfig = {
 static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
                                 const otcrypto_blinded_key_t *key_kek) {
   size_t wrapped_num_words;
-  TRY(otcrypto_aes_kwp_wrapped_len(key_to_wrap->config, &wrapped_num_words));
+  TRY(otcrypto_wrapped_key_len(key_to_wrap->config, &wrapped_num_words));
 
   // Wrap the key.
   uint32_t wrapped_key_data[wrapped_num_words];
@@ -49,7 +48,7 @@ static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
       .data = wrapped_key_data,
       .len = ARRAYSIZE(wrapped_key_data),
   };
-  TRY(otcrypto_aes_kwp_wrap(key_to_wrap, key_kek, wrapped_key));
+  TRY(otcrypto_key_wrap(key_to_wrap, key_kek, wrapped_key));
 
   // Unwrap the key.
   hardened_bool_t success;
@@ -60,7 +59,7 @@ static status_t run_wrap_unwrap(const otcrypto_blinded_key_t *key_to_wrap,
       .keyblob_length = keyblob_words * sizeof(uint32_t),
       .keyblob = unwrapped_key_keyblob,
   };
-  TRY(otcrypto_aes_kwp_unwrap(
+  TRY(otcrypto_key_unwrap(
       (otcrypto_const_word32_buf_t){
           .data = wrapped_key_data,
           .len = ARRAYSIZE(wrapped_key_data),
diff --git a/sw/device/tests/crypto/cryptotest/BUILD b/sw/device/tests/crypto/cryptotest/BUILD
index 0c94183bbb027..2b2bd6587f7c3 100644
--- a/sw/device/tests/crypto/cryptotest/BUILD
+++ b/sw/device/tests/crypto/cryptotest/BUILD
@@ -7,7 +7,7 @@ load(":cryptotest.bzl", "cryptotest")
 package(default_visibility = ["//visibility:public"])
 
 AES_TESTVECTOR_TARGETS = [
-    "//sw/host/cryptotest/testvectors/data/aes_nist_kat:{}_{}_{}_json".format(alg, kat_type, key_len)
+    "//sw/host/cryptotest/testvectors/data:nist_cavp_aes_kat_{}_{}_{}_json".format(alg, kat_type, key_len)
     for alg in ("cbc", "cfb128", "ecb", "ofb")
     for kat_type in ("varkey", "gfsbox", "vartxt", "keysbox")
     for key_len in ("128", "192", "256")
@@ -20,6 +20,7 @@ AES_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "aes_kat",
+    slow_test = True,
     test_args = AES_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/aes_nist_kat:harness",
     test_vectors = AES_TESTVECTOR_TARGETS,
@@ -32,11 +33,10 @@ ECDSA_TESTVECTOR_TARGETS = [
         "p256_sha512",
         "p256_sha3_256",
         "p256_sha3_512",
-        # TODO uncomment when cryptolib supports ECDSA with P-384
-        # "p384_sha384",
-        # "p384_sha512",
-        # "p384_sha3_384",
-        # "p384_sha3_512",
+        "p384_sha384",
+        "p384_sha512",
+        "p384_sha3_384",
+        "p384_sha3_512",
     ]
 ] + [
     "//sw/host/cryptotest/testvectors/data:nist_cavp_ecdsa_fips_186_4_sig_ver_json",
@@ -50,13 +50,10 @@ ECDSA_TESTVECTOR_TARGETS = [
         "p256_sha3_256",
         "p256_sha3_384",
         "p256_sha3_512",
-        # TODO uncomment when cryptolib supports ECDSA with P-384
-        # "p384_sha256",
-        # "p384_sha384",
-        # "p384_sha512",
-        # "p384_sha3_256",
-        # "p384_sha3_384",
-        # "p384_sha3_512",
+        "p384_sha384",
+        "p384_sha512",
+        "p384_sha3_384",
+        "p384_sha3_512",
     ]
 ]
 
@@ -67,6 +64,7 @@ ECDSA_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "ecdsa_kat",
+    slow_test = True,
     test_args = ECDSA_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/ecdsa_kat:harness",
     test_vectors = ECDSA_TESTVECTOR_TARGETS,
@@ -76,8 +74,7 @@ ECDH_TESTVECTOR_TARGETS = [
     "//sw/host/cryptotest/testvectors/data:wycheproof_ecdh_{}".format(mode)
     for mode in [
         "p256",
-        # TODO uncomment when ECDH supports P-384
-        # "p384",
+        "p384",
     ]
 ] + [
     "//sw/host/cryptotest/testvectors/data:nist_cavp_ecdh_sp_800_56a_json",
@@ -112,6 +109,7 @@ SHA256_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha256_kat",
+    slow_test = True,
     test_args = SHA256_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA256_TESTVECTOR_TARGETS,
@@ -134,6 +132,7 @@ SHA384_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha384_kat",
+    slow_test = True,
     test_args = SHA384_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA384_TESTVECTOR_TARGETS,
@@ -156,11 +155,34 @@ SHA512_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha512_kat",
+    slow_test = True,
     test_args = SHA512_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA512_TESTVECTOR_TARGETS,
 )
 
+SHA3_224_TESTVECTOR_TARGETS = [
+    "//sw/host/cryptotest/testvectors/data:nist_cavp_sha3_fips_202_sha3_224_{}_json".format(
+        msg_type.lower(),
+    )
+    for msg_type in [
+        "ShortMsg",
+        "LongMsg",
+    ]
+]
+
+SHA3_224_TESTVECTOR_ARGS = " ".join([
+    "--hash-json=\"$(rootpath {})\"".format(target)
+    for target in SHA3_224_TESTVECTOR_TARGETS
+])
+
+cryptotest(
+    name = "sha3_224_kat",
+    test_args = SHA3_224_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/crypto/hash_kat:harness",
+    test_vectors = SHA3_224_TESTVECTOR_TARGETS,
+)
+
 SHA3_256_TESTVECTOR_TARGETS = [
     "//sw/host/cryptotest/testvectors/data:nist_cavp_sha3_fips_202_sha3_256_{}_json".format(
         msg_type.lower(),
@@ -178,6 +200,7 @@ SHA3_256_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha3_256_kat",
+    slow_test = True,
     test_args = SHA3_256_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA3_256_TESTVECTOR_TARGETS,
@@ -200,6 +223,7 @@ SHA3_384_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha3_384_kat",
+    slow_test = True,
     test_args = SHA3_384_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA3_384_TESTVECTOR_TARGETS,
@@ -222,6 +246,7 @@ SHA3_512_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sha3_512_kat",
+    slow_test = True,
     test_args = SHA3_512_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHA3_512_TESTVECTOR_TARGETS,
@@ -236,8 +261,6 @@ SHAKE128_TESTVECTOR_TARGETS = [
         "LongMsg",
         "VariableOut",
     ]
-] + [
-    "//sw/host/cryptotest/testvectors/data:hjson_shake128",
 ]
 
 SHAKE128_TESTVECTOR_ARGS = " ".join([
@@ -247,6 +270,7 @@ SHAKE128_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "shake128_kat",
+    slow_test = True,
     test_args = SHAKE128_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHAKE128_TESTVECTOR_TARGETS,
@@ -261,8 +285,6 @@ SHAKE256_TESTVECTOR_TARGETS = [
         "LongMsg",
         "VariableOut",
     ]
-] + [
-    "//sw/host/cryptotest/testvectors/data:hjson_shake256",
 ]
 
 SHAKE256_TESTVECTOR_ARGS = " ".join([
@@ -272,11 +294,28 @@ SHAKE256_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "shake256_kat",
+    slow_test = True,
     test_args = SHAKE256_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hash_kat:harness",
     test_vectors = SHAKE256_TESTVECTOR_TARGETS,
 )
 
+CSHAKE_TESTVECTOR_TARGETS = [
+    "//sw/host/cryptotest/testvectors/data:cshake_nist_example_values_json",
+]
+
+CSHAKE_TESTVECTOR_ARGS = " ".join([
+    "--hash-json=\"$(rootpath {})\"".format(target)
+    for target in CSHAKE_TESTVECTOR_TARGETS
+])
+
+cryptotest(
+    name = "cshake_kat",
+    test_args = CSHAKE_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/crypto/hash_kat:harness",
+    test_vectors = CSHAKE_TESTVECTOR_TARGETS,
+)
+
 DRBG_TESTVECTOR_TARGETS = [
     "//sw/host/cryptotest/testvectors/data:nist_cavp_drbg_sp_800_90a_reseed_json",
     "//sw/host/cryptotest/testvectors/data:nist_cavp_drbg_sp_800_90a_no_reseed_json",
@@ -289,6 +328,7 @@ DRBG_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "drbg_kat",
+    slow_test = True,
     test_args = DRBG_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/drbg_kat:harness",
     test_vectors = DRBG_TESTVECTOR_TARGETS,
@@ -306,6 +346,7 @@ HMAC_SHA256_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "hmac_sha256_kat",
+    slow_test = True,
     test_args = HMAC_SHA256_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hmac_kat:harness",
     test_vectors = HMAC_SHA256_TESTVECTOR_TARGETS,
@@ -323,6 +364,7 @@ HMAC_SHA384_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "hmac_sha384_kat",
+    slow_test = True,
     test_args = HMAC_SHA384_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hmac_kat:harness",
     test_vectors = HMAC_SHA384_TESTVECTOR_TARGETS,
@@ -340,6 +382,7 @@ HMAC_SHA512_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "hmac_sha512_kat",
+    slow_test = True,
     test_args = HMAC_SHA512_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/hmac_kat:harness",
     test_vectors = HMAC_SHA512_TESTVECTOR_TARGETS,
@@ -379,6 +422,7 @@ SPHINCSPLUS_TESTVECTOR_ARGS = " ".join([
 
 cryptotest(
     name = "sphincsplus_kat",
+    slow_test = True,
     test_args = SPHINCSPLUS_TESTVECTOR_ARGS,
     test_harness = "//sw/host/tests/crypto/sphincsplus_kat:harness",
     test_vectors = SPHINCSPLUS_TESTVECTOR_TARGETS,
@@ -396,6 +440,7 @@ test_suite(
     name = "crypto_kat_test_suite",
     tests = [
         ":aes_kat",
+        ":cshake_kat",
         ":drbg_kat",
         ":ecdh_kat",
         ":ecdsa_kat",
@@ -405,6 +450,7 @@ test_suite(
         ":kmac_kat",
         ":sha256_kat",
         ":sha384_kat",
+        ":sha3_224_kat",
         ":sha3_256_kat",
         ":sha3_384_kat",
         ":sha3_512_kat",
diff --git a/sw/device/tests/crypto/cryptotest/cryptotest.bzl b/sw/device/tests/crypto/cryptotest/cryptotest.bzl
index b097a5ce069b8..7fddcb1badf3c 100644
--- a/sw/device/tests/crypto/cryptotest/cryptotest.bzl
+++ b/sw/device/tests/crypto/cryptotest/cryptotest.bzl
@@ -6,7 +6,7 @@
 
 load(
     "//rules/opentitan:defs.bzl",
-    "cw310_params",
+    "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
     "fpga_params",
     "opentitan_test",
     "silicon_params",
@@ -16,15 +16,37 @@ load(
 # opentitan_test must have the following attributes to configure
 # each execution environment:
 # - cw310
+# - cw340
 # - silicon
-# - silicon_prodc
 CRYPTOTEST_EXEC_ENVS = {
     "//hw/top_earlgrey:fpga_cw310_test_rom": None,
-    "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon",
-    "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_prodc",
-}
+    "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": None,
+    "//hw/top_earlgrey:fpga_cw340_test_rom": "fpga_cw340",
+    "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": "fpga_cw340",
+} | EARLGREY_SILICON_OWNER_ROM_EXT_ENVS
 
-def cryptotest(name, test_vectors, test_args, test_harness):
+FIRMWARE_DEPS = [
+    "//sw/device/tests/crypto/cryptotest/firmware:aes",
+    "//sw/device/tests/crypto/cryptotest/firmware:drbg",
+    "//sw/device/tests/crypto/cryptotest/firmware:ecdh",
+    "//sw/device/tests/crypto/cryptotest/firmware:ecdsa",
+    "//sw/device/tests/crypto/cryptotest/firmware:hash",
+    "//sw/device/tests/crypto/cryptotest/firmware:hmac",
+    "//sw/device/tests/crypto/cryptotest/firmware:kmac",
+    "//sw/device/tests/crypto/cryptotest/firmware:sphincsplus",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/crypto/cryptotest/json:commands",
+]
+
+def cryptotest(name, test_vectors, test_args, test_harness, slow_test = False):
     """A macro for defining a CryptoTest test case.
 
     Args:
@@ -32,35 +54,39 @@ def cryptotest(name, test_vectors, test_args, test_harness):
         test_vectors: the test vectors to use.
         test_args: additional arguments to pass to the test.
         test_harness: the test harness to use.
+        slow_test: indicate if the test should be run in the nightly CI.
     """
+    tags = ["slow_test"] if slow_test else []
     opentitan_test(
         name = name,
+        srcs = ["//sw/device/tests/crypto/cryptotest/firmware:firmware.c"],
         fpga = fpga_params(
             timeout = "long",
-            binaries = {"//sw/device/tests/crypto/cryptotest/firmware:firmware_fpga_cw310_test_rom": "firmware"},
             data = test_vectors,
+            tags = tags,
             test_cmd = """
                 --bootstrap={firmware}
             """ + test_args,
             test_harness = test_harness,
         ),
-        exec_env = CRYPTOTEST_EXEC_ENVS,
-        silicon = silicon_params(
-            timeout = "eternal",
-            binaries = {"//sw/device/tests/crypto/cryptotest/firmware:firmware_silicon_owner_sival_rom_ext": "firmware"},
+        fpga_cw340 = fpga_params(
+            timeout = "long",
+            tags = tags,
             data = test_vectors,
             test_cmd = """
                 --bootstrap={firmware}
             """ + test_args,
             test_harness = test_harness,
         ),
-        silicon_prodc = silicon_params(
+        exec_env = CRYPTOTEST_EXEC_ENVS,
+        silicon = silicon_params(
             timeout = "eternal",
-            binaries = {"//sw/device/tests/crypto/cryptotest/firmware:firmware_silicon_owner_prodc_rom_ext": "firmware"},
+            tags = tags,
             data = test_vectors,
             test_cmd = """
                 --bootstrap={firmware}
             """ + test_args,
             test_harness = test_harness,
         ),
+        deps = FIRMWARE_DEPS,
     )
diff --git a/sw/device/tests/crypto/cryptotest/firmware/BUILD b/sw/device/tests/crypto/cryptotest/firmware/BUILD
index d5ae662c8b8d2..342104482b99a 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/BUILD
+++ b/sw/device/tests/crypto/cryptotest/firmware/BUILD
@@ -35,11 +35,10 @@ cc_library(
     deps = [
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p256",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:keyblob",
-        "//sw/device/lib/crypto/impl/ecc:ecdsa_p256",
-        "//sw/device/lib/crypto/impl/ecc:p256_common",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
@@ -55,9 +54,10 @@ cc_library(
     deps = [
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
-        "//sw/device/lib/crypto/impl:ecc",
+        "//sw/device/lib/crypto/impl:ecc_p256",
+        "//sw/device/lib/crypto/impl:ecc_p384",
         "//sw/device/lib/crypto/impl:integrity",
-        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:key_transport",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
@@ -94,9 +94,10 @@ cc_library(
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
         "//sw/device/lib/crypto/drivers:kmac",
-        "//sw/device/lib/crypto/impl:hash",
         "//sw/device/lib/crypto/impl:integrity",
         "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/impl:sha3",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
@@ -112,9 +113,9 @@ cc_library(
     deps = [
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/impl:hmac",
         "//sw/device/lib/crypto/impl:integrity",
-        "//sw/device/lib/crypto/impl:keyblob",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:key_transport",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
@@ -148,8 +149,8 @@ cc_library(
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
         "//sw/device/lib/crypto/impl:integrity",
-        "//sw/device/lib/crypto/impl:keyblob",
-        "//sw/device/lib/crypto/impl:mac",
+        "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:kmac",
         "//sw/device/lib/crypto/include:datatypes",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
@@ -174,37 +175,20 @@ FIRMWARE_DEPS = [
     "//sw/device/lib/testing/test_framework:ottf_main",
     "//sw/device/lib/testing/test_framework:ujson_ottf",
     "//sw/device/lib/ujson",
+    "//hw/top_earlgrey/sw/autogen:top_earlgrey",
 
     # Include all JSON commands.
     "//sw/device/tests/crypto/cryptotest/json:commands",
 ]
 
-[
-    opentitan_binary(
-        name = "firmware_{}".format(exec_env),
-        testonly = True,
-        srcs = [":firmware.c"],
-        exec_env = [
-            "//hw/top_earlgrey:{}".format(exec_env),
-        ],
-        deps = FIRMWARE_DEPS,
-    )
-    for exec_env in [
-        "fpga_cw310_test_rom",
-        "silicon_owner_sival_rom_ext",
-        "silicon_owner_prodc_rom_ext",
-    ]
-]
-
-opentitan_test(
-    name = "chip_pen_test",
+opentitan_binary(
+    name = "firmware",
+    testonly = True,
     srcs = [":firmware.c"],
-    exec_env = {
-        "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner",
-        "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_owner",
-    },
-    silicon_owner = silicon_params(
-        tags = ["broken"],
-    ),
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310",
+        "//hw/top_earlgrey:fpga_cw340",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
+    ],
     deps = FIRMWARE_DEPS,
 )
diff --git a/sw/device/tests/crypto/cryptotest/firmware/ecdh.c b/sw/device/tests/crypto/cryptotest/firmware/ecdh.c
index af6dbba013dca..cfd3927c2be6c 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/ecdh.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/ecdh.c
@@ -4,126 +4,351 @@
 
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
 #include "sw/device/tests/crypto/cryptotest/json/ecdh_commands.h"
 
-static const int P256_KEY_BYTES = 32;
+enum {
+  /**
+   * Bytes in one share of an unmasked P-256 private key.
+   */
+  kP256PrivateKeyBytes = 32,
+  /**
+   * Bytes in one share of a masked P-256 private key.
+   */
+  kP256MaskedPrivateKeyBytes = 40,
+  /**
+   * Words in one share of a masked P-256 private key.
+   */
+  kP256MaskedPrivateKeyWords = kP256MaskedPrivateKeyBytes / sizeof(uint32_t),
+  /**
+   * Bytes in a P-256 public key coordinate.
+   */
+  kP256CoordinateBytes = 32,
+  /**
+   * Words in a P-256 public key coordinate.
+   */
+  kP256CoordinateWords = kP256CoordinateBytes / sizeof(uint32_t),
+  /**
+   * Bytes in one share of an ECDH/P-256 shared secret.
+   */
+  kP256SharedSecretBytes = 32,
+  /**
+   * Bytes in one share of an unmasked P-384 private key.
+   */
+  kP384PrivateKeyBytes = 48,
+  /**
+   * Bytes in one share of a masked P-384 private key.
+   */
+  kP384MaskedPrivateKeyBytes = 56,
+  /**
+   * Words in one share of a masked P-384 private key.
+   */
+  kP384MaskedPrivateKeyWords = kP384MaskedPrivateKeyBytes / sizeof(uint32_t),
+  /**
+   * Bytes in a P-384 public key coordinate.
+   */
+  kP384CoordinateBytes = 48,
+  /**
+   * Words in a P-384 public key coordinate.
+   */
+  kP384CoordinateWords = kP384CoordinateBytes / sizeof(uint32_t),
+  /**
+   * Bytes in one share of an ECDH/P-384 shared secret.
+   */
+  kP384SharedSecretBytes = 48,
+};
 
-status_t handle_ecdh(ujson_t *uj) {
-  // Declare ECDH parameter ujson deserializer types
-  cryptotest_ecdh_curve_t uj_curve;
-  cryptotest_ecdh_private_key_t uj_private_key;
-  cryptotest_ecdh_coordinate_t uj_qx;
-  cryptotest_ecdh_coordinate_t uj_qy;
+/**
+ * Run ECDH with curve P-256.
+ *
+ * The caller should ensure at least kP256SharedSecretBytes of space are
+ * allocated at `ss`.
+ *
+ * If the cryptolib returns an error saying the input is invalid, the shared
+ * secret will be zero and the `valid` output will be false.
+ *
+ * @param d Private key.
+ * @param qx Public key x coordinate.
+ * @param qx Public key y coordinate.
+ * @param[out] ss Shared secret key.
+ * @param[out] valid Whether the input arguments were valid.
+ * @return Status code (OK or error).
+ */
+static status_t ecdh_p256(cryptotest_ecdh_private_key_t d,
+                          cryptotest_ecdh_coordinate_t qx,
+                          cryptotest_ecdh_coordinate_t qy, uint32_t *ss,
+                          bool *valid) {
+  if (d.d0_len > kP256MaskedPrivateKeyBytes ||
+      d.d1_len > kP256MaskedPrivateKeyBytes) {
+    LOG_ERROR(
+        "Bad P-256 private key share length (should both be <= %d): (d0 = %d, "
+        "d1 "
+        "= %d)",
+        kP256PrivateKeyBytes, d.d0_len, d.d1_len);
+    return INVALID_ARGUMENT();
+  }
+  if (qx.coordinate_len > kP256CoordinateBytes ||
+      qy.coordinate_len > kP256CoordinateBytes) {
+    LOG_ERROR(
+        "Bad P-256 coordinate length (should both be <= %d): (x = %d, y = %d)",
+        kP256CoordinateBytes, qx.coordinate_len, qy.coordinate_len);
+    return INVALID_ARGUMENT();
+  }
 
-  // Deserialize ujson byte stream into ECDH parameters
-  TRY(ujson_deserialize_cryptotest_ecdh_curve_t(uj, &uj_curve));
-  TRY(ujson_deserialize_cryptotest_ecdh_private_key_t(uj, &uj_private_key));
-  TRY(ujson_deserialize_cryptotest_ecdh_coordinate_t(uj, &uj_qx));
-  TRY(ujson_deserialize_cryptotest_ecdh_coordinate_t(uj, &uj_qy));
+  // Construct the private key object.
+  // TODO(#20762): once key-import exists for ECDH, use that instead.
+  uint32_t private_keyblob[kP256MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, d.d0, d.d0_len);
+  memcpy(private_keyblob + kP256MaskedPrivateKeyWords, d.d1, d.d1_len);
+  otcrypto_blinded_key_t private_key = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP256,
+              .key_length = kP256PrivateKeyBytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
+  };
+  private_key.checksum = integrity_blinded_checksum(&private_key);
 
-  otcrypto_ecc_curve_type_t curve_type;
-  otcrypto_unblinded_key_t public_key;
-  p256_point_t pub_p256;
+  // Construct the public key object.
+  // TODO(#20762): once key-import exists for ECDH, use that instead.
+  uint32_t public_key_buf[kP256CoordinateWords * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, qx.coordinate, qx.coordinate_len);
+  memcpy(public_key_buf + kP256CoordinateWords, qy.coordinate,
+         qy.coordinate_len);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP256,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
 
-  otcrypto_key_config_t key_config = {
-      .version = kOtcryptoLibVersion1,
-      .key_mode = kOtcryptoKeyModeEcdh,
-      .hw_backed = kHardenedBoolFalse,
-      .security_level = kOtcryptoKeySecurityLevelLow,
+  // Create a destination for the shared secret.
+  size_t shared_secret_words = kP256SharedSecretBytes / sizeof(uint32_t);
+  uint32_t shared_secretblob[shared_secret_words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kP256SharedSecretBytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
   };
-  size_t shared_key_words;
-  uint32_t *private_key_masked_raw;
-  uint32_t private_keyblob_length;
-  switch (uj_curve) {
-    case kCryptotestEcdhCurveP256:
-      curve_type = kOtcryptoEccCurveTypeNistP256;
-      memset(pub_p256.x, 0, kP256CoordWords * 4);
-      memcpy(pub_p256.x, uj_qx.coordinate, uj_qx.coordinate_len);
-      memset(pub_p256.y, 0, kP256CoordWords * 4);
-      memcpy(pub_p256.y, uj_qy.coordinate, uj_qy.coordinate_len);
-      public_key.key_mode = kOtcryptoKeyModeEcdh;
-      public_key.key_length = sizeof(p256_point_t);
-      public_key.key = (uint32_t *)&pub_p256;
-      key_config.key_length = P256_KEY_BYTES;
-      shared_key_words = P256_KEY_BYTES / sizeof(uint32_t);
-      p256_masked_scalar_t private_key_masked;
-      memset(private_key_masked.share0, 0, kP256MaskedScalarShareBytes);
-      memcpy(private_key_masked.share0, uj_private_key.d0, kP256ScalarBytes);
-      memset(private_key_masked.share1, 0, kP256MaskedScalarShareBytes);
-      memcpy(private_key_masked.share1, uj_private_key.d1, kP256ScalarBytes);
-      private_key_masked_raw = (uint32_t *)&private_key_masked;
-      private_keyblob_length = sizeof(private_key_masked);
+
+  otcrypto_status_t status =
+      otcrypto_ecdh_p256(&private_key, &public_key, &shared_secret);
+  switch (status.value) {
+    case kOtcryptoStatusValueOk: {
+      *valid = true;
       break;
-    default:
-      LOG_ERROR("Unsupported ECC curve: %d", uj_curve);
-      return INVALID_ARGUMENT();
+    }
+    case kOtcryptoStatusValueBadArgs: {
+      // If the input was rejected (e.g. invalid public key, exit early.
+      *valid = false;
+      memset(ss, 0, kP256SharedSecretBytes);
+      return OK_STATUS();
+    }
+    default: {
+      TRY(status);
+      break;
+    }
   }
-  public_key.checksum = integrity_unblinded_checksum(&public_key);
 
-  otcrypto_ecc_curve_t elliptic_curve = {
-      .curve_type = curve_type,
-      // NULL because we use a named curve
-      .domain_parameter = NULL,
-  };
+  // Unmask the shared secret.
+  uint32_t share0[shared_secret_words];
+  uint32_t share1[shared_secret_words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < shared_secret_words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+  return OK_STATUS();
+}
+
+/**
+ * Run ECDH with curve P-384.
+ *
+ * The caller should ensure at least kP384SharedSecretBytes of space are
+ * allocated at `ss`.
+ *
+ * If the cryptolib returns an error saying the input is invalid, the shared
+ * secret will be zero and the `valid` output will be false.
+ *
+ * @param d Private key.
+ * @param qx Public key x coordinate.
+ * @param qx Public key y coordinate.
+ * @param[out] ss Shared secret key.
+ * @param[out] valid Whether the input arguments were valid.
+ * @return Status code (OK or error).
+ */
+static status_t ecdh_p384(cryptotest_ecdh_private_key_t d,
+                          cryptotest_ecdh_coordinate_t qx,
+                          cryptotest_ecdh_coordinate_t qy, uint32_t *ss,
+                          bool *valid) {
+  if (d.d0_len > kP384MaskedPrivateKeyBytes ||
+      d.d1_len > kP384MaskedPrivateKeyBytes) {
+    LOG_ERROR(
+        "Bad P-384 private key share length (should both be <= %d): (d0 = %d, "
+        "d1 "
+        "= %d)",
+        kP384PrivateKeyBytes, d.d0_len, d.d1_len);
+    return INVALID_ARGUMENT();
+  }
+  if (qx.coordinate_len > kP384CoordinateBytes ||
+      qy.coordinate_len > kP384CoordinateBytes) {
+    LOG_ERROR(
+        "Bad P-384 coordinate length (should both be <= %d): (x = %d, y = %d)",
+        kP384CoordinateBytes, qx.coordinate_len, qy.coordinate_len);
+    return INVALID_ARGUMENT();
+  }
+
+  // Construct the private key object.
+  // TODO(#20762): once key-import exists for ECDH, use that instead.
+  // Note: the test harness does not produce the extra masking bytes; leave
+  // them zeroed.
+  uint32_t private_keyblob[kP384MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, d.d0, d.d0_len);
+  memcpy(private_keyblob + kP384MaskedPrivateKeyWords, d.d1, d.d1_len);
   otcrypto_blinded_key_t private_key = {
-      .config = key_config,
-      .keyblob_length = private_keyblob_length,
-      .keyblob = private_key_masked_raw,
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP384,
+              .key_length = kP384PrivateKeyBytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
   };
   private_key.checksum = integrity_blinded_checksum(&private_key);
 
-  // Create keyblob for shared key
-  uint32_t shared_keyblob[keyblob_num_words(key_config)];
-  otcrypto_blinded_key_t shared_key = {
-      .config = key_config,
-      .keyblob_length = sizeof(shared_keyblob),
-      .keyblob = shared_keyblob,
+  // Construct the public key object.
+  // TODO(#20762): once key-import exists for ECDH, use that instead.
+  uint32_t public_key_buf[kP384CoordinateWords * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, qx.coordinate, qx.coordinate_len);
+  memcpy(public_key_buf + kP384CoordinateWords, qy.coordinate,
+         qy.coordinate_len);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP384,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a destination for the shared secret.
+  size_t shared_secret_words = kP384SharedSecretBytes / sizeof(uint32_t);
+  uint32_t shared_secretblob[shared_secret_words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kP384SharedSecretBytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
   };
 
   otcrypto_status_t status =
-      otcrypto_ecdh(&private_key, &public_key, &elliptic_curve, &shared_key);
-  cryptotest_ecdh_derive_output_t uj_output;
+      otcrypto_ecdh_p384(&private_key, &public_key, &shared_secret);
   switch (status.value) {
     case kOtcryptoStatusValueOk: {
-      uj_output.ok = true;
+      *valid = true;
+      break;
+    }
+    case kOtcryptoStatusValueBadArgs: {
+      // If the input was rejected (e.g. invalid public key, exit early.
+      *valid = false;
+      memset(ss, 0, kP384SharedSecretBytes);
+      return OK_STATUS();
+    }
+    default: {
+      TRY(status);
+      break;
+    }
+  }
 
-      // Recover the shared secret key (Z) from its shares
-      uint32_t *zShare0;
-      uint32_t *zShare1;
-      TRY(keyblob_to_shares(&shared_key, &zShare0, &zShare1));
+  // Unmask the shared secret.
+  uint32_t share0[shared_secret_words];
+  uint32_t share1[shared_secret_words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < shared_secret_words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+  return OK_STATUS();
+}
 
-      // XOR the two shares to get the raw key
-      uint32_t *uj_shared_secret_u32 = (uint32_t *)uj_output.shared_secret;
-      for (size_t i = 0; i < shared_key_words; i++) {
-        uj_shared_secret_u32[i] = zShare0[i] ^ zShare1[i];
-      }
-      uj_output.shared_secret_len = shared_key_words * sizeof(uint32_t);
+status_t handle_ecdh(ujson_t *uj) {
+  // Declare ECDH parameter ujson deserializer types
+  cryptotest_ecdh_curve_t uj_curve;
+  cryptotest_ecdh_private_key_t uj_private_key;
+  cryptotest_ecdh_coordinate_t uj_qx;
+  cryptotest_ecdh_coordinate_t uj_qy;
+
+  // Deserialize ujson byte stream into ECDH parameters
+  TRY(ujson_deserialize_cryptotest_ecdh_curve_t(uj, &uj_curve));
+  TRY(ujson_deserialize_cryptotest_ecdh_private_key_t(uj, &uj_private_key));
+  TRY(ujson_deserialize_cryptotest_ecdh_coordinate_t(uj, &uj_qx));
+  TRY(ujson_deserialize_cryptotest_ecdh_coordinate_t(uj, &uj_qy));
 
+  cryptotest_ecdh_derive_output_t uj_output;
+  bool valid;
+  switch (uj_curve) {
+    case kCryptotestEcdhCurveP256: {
+      uint32_t shared_secret_words[kP256SharedSecretBytes / sizeof(uint32_t)];
+      TRY(ecdh_p256(uj_private_key, uj_qx, uj_qy, shared_secret_words, &valid));
+      memcpy(uj_output.shared_secret, shared_secret_words,
+             kP256SharedSecretBytes);
+      uj_output.shared_secret_len = kP256SharedSecretBytes;
       break;
     }
-    case kOtcryptoStatusValueBadArgs: {
-      // Some ECDH test vectors test invalid inputs. If cryptolib
-      // returns an invalid input code, we simply respond with ok =
-      // false. For other error codes, we error out entirely.
-      uj_output.ok = false;
+    case kCryptotestEcdhCurveP384: {
+      uint32_t shared_secret_words[kP384SharedSecretBytes / sizeof(uint32_t)];
+      TRY(ecdh_p384(uj_private_key, uj_qx, uj_qy, shared_secret_words, &valid));
+      memcpy(uj_output.shared_secret, shared_secret_words,
+             kP384SharedSecretBytes);
+      uj_output.shared_secret_len = kP384SharedSecretBytes;
       break;
     }
-    default: {
-      LOG_ERROR(
-          "Unexpected status value returned from otcrypto_ecdh: "
-          "0x%x",
-          status.value);
-      return INTERNAL();
-    }
+    default:
+      LOG_ERROR("Unsupported ECC curve: %d", uj_curve);
+      return INVALID_ARGUMENT();
   }
+  uj_output.ok = (uint8_t)valid;
+
   RESP_OK(ujson_serialize_cryptotest_ecdh_derive_output_t, uj, &uj_output);
   return OK_STATUS(0);
 }
diff --git a/sw/device/tests/crypto/cryptotest/firmware/ecdsa.c b/sw/device/tests/crypto/cryptotest/firmware/ecdsa.c
index 065ae94f42371..5fe599d999d77 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/ecdsa.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/ecdsa.c
@@ -4,12 +4,13 @@
 
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p256.h"
-#include "sw/device/lib/crypto/impl/ecc/p256_common.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+#include "sw/device/lib/crypto/impl/ecc/p384.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
@@ -19,23 +20,34 @@
 enum {
   /* Number of bytes in a P-256 private key. */
   kP256PrivateKeyBytes = 256 / 8,
+  /* Number of bytes in a P-384 private key. */
+  kP384PrivateKeyBytes = 384 / 8,
 };
 
 static const otcrypto_key_config_t kP256PrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdsa,
+    .key_mode = kOtcryptoKeyModeEcdsaP256,
     .key_length = kP256PrivateKeyBytes,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
 };
 
-int set_nist_p256_params(
-    cryptotest_ecdsa_coordinate_t uj_qx, cryptotest_ecdsa_coordinate_t uj_qy,
-    cryptotest_ecdsa_signature_t uj_signature,
-    otcrypto_ecc_curve_type_t *curve_type, otcrypto_unblinded_key_t *public_key,
-    ecdsa_p256_signature_t *signature_p256, p256_point_t *pub_p256,
-    otcrypto_word32_buf_t *signature_mut, size_t *digest_len) {
-  *curve_type = kOtcryptoEccCurveTypeNistP256;
+static const otcrypto_key_config_t kP384PrivateKeyConfig = {
+    .version = kOtcryptoLibVersion1,
+    .key_mode = kOtcryptoKeyModeEcdsaP384,
+    .key_length = kP384PrivateKeyBytes,
+    .hw_backed = kHardenedBoolFalse,
+    .security_level = kOtcryptoKeySecurityLevelLow,
+};
+
+int set_nist_p256_params(cryptotest_ecdsa_coordinate_t uj_qx,
+                         cryptotest_ecdsa_coordinate_t uj_qy,
+                         cryptotest_ecdsa_signature_t uj_signature,
+                         otcrypto_unblinded_key_t *public_key,
+                         p256_ecdsa_signature_t *signature_p256,
+                         p256_point_t *pub_p256,
+                         otcrypto_word32_buf_t *signature_mut,
+                         size_t *digest_len) {
   if (uj_qx.coordinate_len > kP256CoordBytes) {
     LOG_ERROR(
         "Coordinate value qx too large for P256 (have = %d bytes, max = %d "
@@ -54,7 +66,7 @@ int set_nist_p256_params(
   memcpy(pub_p256->x, uj_qx.coordinate, uj_qx.coordinate_len);
   memset(pub_p256->y, 0, kP256CoordBytes);
   memcpy(pub_p256->y, uj_qy.coordinate, uj_qy.coordinate_len);
-  public_key->key_mode = kOtcryptoKeyModeEcdsa;
+  public_key->key_mode = kOtcryptoKeyModeEcdsaP256;
   public_key->key_length = sizeof(p256_point_t);
   public_key->key = (uint32_t *)pub_p256;
   *digest_len = kP256ScalarWords;
@@ -82,6 +94,60 @@ int set_nist_p256_params(
   return true;
 }
 
+int set_nist_p384_params(cryptotest_ecdsa_coordinate_t uj_qx,
+                         cryptotest_ecdsa_coordinate_t uj_qy,
+                         cryptotest_ecdsa_signature_t uj_signature,
+                         otcrypto_unblinded_key_t *public_key,
+                         p384_ecdsa_signature_t *signature_p384,
+                         p384_point_t *pub_p384,
+                         otcrypto_word32_buf_t *signature_mut,
+                         size_t *digest_len) {
+  if (uj_qx.coordinate_len > kP384CoordBytes) {
+    LOG_ERROR(
+        "Coordinate value qx too large for P384 (have = %d bytes, max = %d "
+        "bytes)",
+        uj_qx.coordinate_len, kP384CoordBytes);
+    return false;
+  }
+  if (uj_qy.coordinate_len > kP384CoordBytes) {
+    LOG_ERROR(
+        "Coordinate value qy too large for P384 (have = %d bytes, max = %d "
+        "bytes)",
+        uj_qy.coordinate_len, kP384CoordBytes);
+    return false;
+  }
+  memset(pub_p384->x, 0, kP384CoordBytes);
+  memcpy(pub_p384->x, uj_qx.coordinate, uj_qx.coordinate_len);
+  memset(pub_p384->y, 0, kP384CoordBytes);
+  memcpy(pub_p384->y, uj_qy.coordinate, uj_qy.coordinate_len);
+  public_key->key_mode = kOtcryptoKeyModeEcdsaP384;
+  public_key->key_length = sizeof(p384_point_t);
+  public_key->key = (uint32_t *)pub_p384;
+  *digest_len = kP384ScalarWords;
+  if (uj_signature.r_len > kP384ScalarBytes) {
+    LOG_ERROR(
+        "Signature r value too large for P384 (have = %d bytes, max = %d "
+        "bytes)",
+        uj_signature.r_len, kP384ScalarBytes);
+    return false;
+  }
+  if (uj_signature.s_len > kP384ScalarBytes) {
+    LOG_ERROR(
+        "Signature s value too large for P384 (have = %d bytes, max = %d "
+        "bytes)",
+        uj_signature.s_len, kP384ScalarBytes);
+    return false;
+  }
+  memset(signature_p384->r, 0, kP384ScalarBytes);
+  memcpy(signature_p384->r, uj_signature.r, uj_signature.r_len);
+  memset(signature_p384->s, 0, kP384ScalarBytes);
+  memcpy(signature_p384->s, uj_signature.s, uj_signature.s_len);
+  signature_mut->len = kP384ScalarWords * 2;
+  signature_mut->data = (uint32_t *)signature_p384;
+
+  return true;
+}
+
 status_t interpret_verification_result(ujson_t *uj,
                                        hardened_bool_t *verification_result) {
   cryptotest_ecdsa_verify_output_t uj_output;
@@ -124,7 +190,7 @@ status_t interpret_verify_status(ujson_t *uj, otcrypto_status_t status,
 }
 
 status_t p256_sign(ujson_t *uj, cryptotest_ecdsa_private_key_t *uj_private_key,
-                   otcrypto_ecc_curve_t elliptic_curve,
+                   otcrypto_unblinded_key_t *public_key,
                    otcrypto_hash_digest_t message_digest,
                    otcrypto_word32_buf_t signature_mut,
                    cryptotest_ecdsa_signature_t *uj_signature) {
@@ -140,16 +206,16 @@ status_t p256_sign(ujson_t *uj, cryptotest_ecdsa_private_key_t *uj_private_key,
   memcpy(private_key_masked.share1, uj_private_key->d1, kP256ScalarBytes);
   private_key.checksum = integrity_blinded_checksum(&private_key);
 
-  otcrypto_status_t status = otcrypto_ecdsa_sign(
-      &private_key, message_digest, &elliptic_curve, signature_mut);
+  otcrypto_status_t status = otcrypto_ecdsa_p256_sign_verify(
+      &private_key, public_key, message_digest, signature_mut);
   if (status.value != kOtcryptoStatusValueOk) {
     return INTERNAL(status.value);
   }
 
   memset(uj_signature->r, 0, ECDSA_CMD_MAX_SIGNATURE_SCALAR_BYTES);
   memset(uj_signature->s, 0, ECDSA_CMD_MAX_SIGNATURE_SCALAR_BYTES);
-  ecdsa_p256_signature_t *signature_p256 =
-      (ecdsa_p256_signature_t *)signature_mut.data;
+  p256_ecdsa_signature_t *signature_p256 =
+      (p256_ecdsa_signature_t *)signature_mut.data;
   memcpy(uj_signature->r, signature_p256->r, kP256ScalarBytes);
   uj_signature->r_len = kP256ScalarBytes;
   memcpy(uj_signature->s, signature_p256->s, kP256ScalarBytes);
@@ -159,6 +225,42 @@ status_t p256_sign(ujson_t *uj, cryptotest_ecdsa_private_key_t *uj_private_key,
   return OK_STATUS(0);
 }
 
+status_t p384_sign(ujson_t *uj, cryptotest_ecdsa_private_key_t *uj_private_key,
+                   otcrypto_unblinded_key_t *public_key,
+                   otcrypto_hash_digest_t message_digest,
+                   otcrypto_word32_buf_t signature_mut,
+                   cryptotest_ecdsa_signature_t *uj_signature) {
+  p384_masked_scalar_t private_key_masked;
+  otcrypto_blinded_key_t private_key = {
+      .config = kP384PrivateKeyConfig,
+      .keyblob_length = sizeof(private_key_masked),
+      .keyblob = (uint32_t *)&private_key_masked,
+  };
+  memset(private_key_masked.share0, 0, kP384MaskedScalarShareBytes);
+  memcpy(private_key_masked.share0, uj_private_key->d0, kP384ScalarBytes);
+  memset(private_key_masked.share1, 0, kP384MaskedScalarShareBytes);
+  memcpy(private_key_masked.share1, uj_private_key->d1, kP384ScalarBytes);
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  otcrypto_status_t status = otcrypto_ecdsa_p384_sign_verify(
+      &private_key, public_key, message_digest, signature_mut);
+  if (status.value != kOtcryptoStatusValueOk) {
+    return INTERNAL(status.value);
+  }
+
+  memset(uj_signature->r, 0, ECDSA_CMD_MAX_SIGNATURE_SCALAR_BYTES);
+  memset(uj_signature->s, 0, ECDSA_CMD_MAX_SIGNATURE_SCALAR_BYTES);
+  p384_ecdsa_signature_t *signature_p384 =
+      (p384_ecdsa_signature_t *)signature_mut.data;
+  memcpy(uj_signature->r, signature_p384->r, kP384ScalarBytes);
+  uj_signature->r_len = kP384ScalarBytes;
+  memcpy(uj_signature->s, signature_p384->s, kP384ScalarBytes);
+  uj_signature->s_len = kP384ScalarBytes;
+  RESP_OK(ujson_serialize_cryptotest_ecdsa_signature_t, uj, uj_signature);
+
+  return OK_STATUS(0);
+}
+
 status_t handle_ecdsa(ujson_t *uj) {
   // Declare ECDSA parameter ujson deserializer types
   cryptotest_ecdsa_operation_t uj_op;
@@ -180,19 +282,28 @@ status_t handle_ecdsa(ujson_t *uj) {
   TRY(ujson_deserialize_cryptotest_ecdsa_coordinate_t(uj, &uj_qy));
   TRY(ujson_deserialize_cryptotest_ecdsa_private_key_t(uj, &uj_private_key));
 
-  otcrypto_ecc_curve_type_t curve_type;
   otcrypto_unblinded_key_t public_key;
   size_t digest_len;
 
   otcrypto_word32_buf_t signature_mut;
   int success;
-  ecdsa_p256_signature_t signature_p256;
+  p256_ecdsa_signature_t signature_p256;
+  p384_ecdsa_signature_t signature_p384;
   p256_point_t pub_p256;
+  p384_point_t pub_p384;
   switch (uj_curve) {
     case kCryptotestEcdsaCurveP256:
-      success = set_nist_p256_params(uj_qx, uj_qy, uj_signature, &curve_type,
-                                     &public_key, &signature_p256, &pub_p256,
-                                     &signature_mut, &digest_len);
+      success = set_nist_p256_params(uj_qx, uj_qy, uj_signature, &public_key,
+                                     &signature_p256, &pub_p256, &signature_mut,
+                                     &digest_len);
+      if (!success) {
+        return INVALID_ARGUMENT();
+      }
+      break;
+    case kCryptotestEcdsaCurveP384:
+      success = set_nist_p384_params(uj_qx, uj_qy, uj_signature, &public_key,
+                                     &signature_p384, &pub_p384, &signature_mut,
+                                     &digest_len);
       if (!success) {
         return INVALID_ARGUMENT();
       }
@@ -207,11 +318,6 @@ status_t handle_ecdsa(ujson_t *uj) {
       .data = signature_mut.data,
   };
 
-  otcrypto_ecc_curve_t elliptic_curve = {
-      .curve_type = curve_type,
-      // NULL because we use a named curve
-      .domain_parameter = NULL,
-  };
   otcrypto_hash_mode_t mode;
   switch (uj_hash_alg) {
     case kCryptotestEcdsaHashAlgSha256:
@@ -249,7 +355,11 @@ status_t handle_ecdsa(ujson_t *uj) {
     case kCryptotestEcdsaOperationSign: {
       switch (uj_curve) {
         case kCryptotestEcdsaCurveP256: {
-          return p256_sign(uj, &uj_private_key, elliptic_curve, message_digest,
+          return p256_sign(uj, &uj_private_key, &public_key, message_digest,
+                           signature_mut, &uj_signature);
+        }
+        case kCryptotestEcdsaCurveP384: {
+          return p384_sign(uj, &uj_private_key, &public_key, message_digest,
                            signature_mut, &uj_signature);
         }
         default:
@@ -260,11 +370,23 @@ status_t handle_ecdsa(ujson_t *uj) {
     }
     case kCryptotestEcdsaOperationVerify: {
       hardened_bool_t verification_result = kHardenedBoolFalse;
-      return interpret_verify_status(
-          uj,
-          otcrypto_ecdsa_verify(&public_key, message_digest, signature,
-                                &elliptic_curve, &verification_result),
-          &verification_result);
+      otcrypto_status_t status;
+      switch (uj_curve) {
+        case kCryptotestEcdsaCurveP256: {
+          status = otcrypto_ecdsa_p256_verify(&public_key, message_digest,
+                                              signature, &verification_result);
+          break;
+        }
+        case kCryptotestEcdsaCurveP384: {
+          status = otcrypto_ecdsa_p384_verify(&public_key, message_digest,
+                                              signature, &verification_result);
+          break;
+        }
+        default:
+          LOG_ERROR("Unsupported ECC curve: %d", uj_curve);
+          return INVALID_ARGUMENT();
+      }
+      return interpret_verify_status(uj, status, &verification_result);
     }
     default:
       LOG_ERROR("Unrecognized ECDSA operation: %d", uj_op);
diff --git a/sw/device/tests/crypto/cryptotest/firmware/firmware.c b/sw/device/tests/crypto/cryptotest/firmware/firmware.c
index c6fe80d652ae8..dce0c3adfbc13 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/firmware.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/firmware.c
@@ -10,6 +10,8 @@
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
 
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
 // Include commands
 #include "sw/device/tests/crypto/cryptotest/json/aes_commands.h"
 #include "sw/device/tests/crypto/cryptotest/json/commands.h"
@@ -31,7 +33,9 @@
 #include "kmac.h"
 #include "sphincsplus.h"
 
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false, );
 
 status_t process_cmd(ujson_t *uj) {
   while (true) {
diff --git a/sw/device/tests/crypto/cryptotest/firmware/hash.c b/sw/device/tests/crypto/cryptotest/firmware/hash.c
index 26bf2f2a004ca..65cf84c5a98da 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/hash.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/hash.c
@@ -2,15 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/lib/crypto/include/hash.h"
-
 #include "sw/device/lib/base/math.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/drivers/kmac.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/sha2.h"
+#include "sw/device/lib/crypto/include/sha3.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
@@ -49,7 +48,7 @@ status_t handle_hash(ujson_t *uj) {
 
   // Handle to correct oneshot hash API for the provided algorithm
   otcrypto_status_t (*hash_oneshot)(otcrypto_const_byte_buf_t,
-                                    otcrypto_hash_digest_t);
+                                    otcrypto_hash_digest_t *);
 
   // Digest length in 32-bit words
   size_t digest_len;
@@ -58,51 +57,51 @@ status_t handle_hash(ujson_t *uj) {
   switch (uj_algorithm) {
     case kCryptotestHashAlgorithmSha256:
       mode = kOtcryptoHashModeSha256;
-      digest_len = kSha256DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 256 / 32;
+      hash_oneshot = otcrypto_sha2_256;
       test_stepwise = true;
       break;
     case kCryptotestHashAlgorithmSha384:
       mode = kOtcryptoHashModeSha384;
-      digest_len = kSha384DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 384 / 32;
+      hash_oneshot = otcrypto_sha2_384;
       test_stepwise = true;
       break;
     case kCryptotestHashAlgorithmSha512:
       mode = kOtcryptoHashModeSha512;
-      digest_len = kSha512DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 512 / 32;
+      hash_oneshot = otcrypto_sha2_512;
       test_stepwise = true;
       break;
     case kCryptotestHashAlgorithmSha3_224:
       mode = kOtcryptoHashModeSha3_224;
-      digest_len = kSha3_224DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 224 / 32;
+      hash_oneshot = otcrypto_sha3_224;
       break;
     case kCryptotestHashAlgorithmSha3_256:
       mode = kOtcryptoHashModeSha3_256;
-      digest_len = kSha3_256DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 256 / 32;
+      hash_oneshot = otcrypto_sha3_256;
       break;
     case kCryptotestHashAlgorithmSha3_384:
       mode = kOtcryptoHashModeSha3_384;
-      digest_len = kSha3_384DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 384 / 32;
+      hash_oneshot = otcrypto_sha3_384;
       break;
     case kCryptotestHashAlgorithmSha3_512:
       mode = kOtcryptoHashModeSha3_512;
-      digest_len = kSha3_512DigestWords;
-      hash_oneshot = otcrypto_hash;
+      digest_len = 512 / 32;
+      hash_oneshot = otcrypto_sha3_512;
       break;
     case kCryptotestHashAlgorithmShake128:
       mode = kOtcryptoHashXofModeShake128;
       digest_len = ceil_div(uj_shake_digest_length.length, sizeof(uint32_t));
-      hash_oneshot = otcrypto_xof_shake;
+      hash_oneshot = otcrypto_shake128;
       break;
     case kCryptotestHashAlgorithmShake256:
       mode = kOtcryptoHashXofModeShake256;
       digest_len = ceil_div(uj_shake_digest_length.length, sizeof(uint32_t));
-      hash_oneshot = otcrypto_xof_shake;
+      hash_oneshot = otcrypto_shake256;
       break;
     case kCryptotestHashAlgorithmCshake128:
       mode = kOtcryptoHashXofModeCshake128;
@@ -122,20 +121,21 @@ status_t handle_hash(ujson_t *uj) {
   memset(digest_buf, 0, digest_len * sizeof(uint32_t));
   otcrypto_hash_digest_t digest = {
       .data = digest_buf,
-      .mode = mode,
       .len = digest_len,
   };
   otcrypto_status_t status;
   // Test oneshot API
   switch (uj_algorithm) {
     case kCryptotestHashAlgorithmCshake128:
-      OT_FALLTHROUGH_INTENDED;
+      status = otcrypto_cshake128(input_message, cshake_function_name,
+                                  customization_string, &digest);
+      break;
     case kCryptotestHashAlgorithmCshake256:
-      status = otcrypto_xof_cshake(input_message, cshake_function_name,
-                                   customization_string, digest);
+      status = otcrypto_cshake256(input_message, cshake_function_name,
+                                  customization_string, &digest);
       break;
     default:
-      status = hash_oneshot(input_message, digest);
+      status = hash_oneshot(input_message, &digest);
   }
   if (status.value != kOtcryptoStatusValueOk) {
     LOG_ERROR("Bad status value: 0x%x", status.value);
@@ -150,8 +150,8 @@ status_t handle_hash(ujson_t *uj) {
   memset(digest_buf, 0, digest_len * sizeof(uint32_t));
   // Test the stepwise API for algorithms that support it
   if (test_stepwise) {
-    otcrypto_hash_context_t ctx;
-    status = otcrypto_hash_init(&ctx, mode);
+    otcrypto_sha2_context_t ctx;
+    status = otcrypto_sha2_init(mode, &ctx);
     if (status.value != kOtcryptoStatusValueOk) {
       return INTERNAL(status.value);
     }
@@ -165,15 +165,15 @@ status_t handle_hash(ujson_t *uj) {
         .len = ceil_div(uj_message.message_len, 2),
         .data = &msg_buf[uj_message.message_len / 2],
     };
-    status = otcrypto_hash_update(&ctx, input_message_share1);
+    status = otcrypto_sha2_update(&ctx, input_message_share1);
     if (status.value != kOtcryptoStatusValueOk) {
       return INTERNAL(status.value);
     }
-    status = otcrypto_hash_update(&ctx, input_message_share2);
+    status = otcrypto_sha2_update(&ctx, input_message_share2);
     if (status.value != kOtcryptoStatusValueOk) {
       return INTERNAL(status.value);
     }
-    status = otcrypto_hash_final(&ctx, digest);
+    status = otcrypto_sha2_final(&ctx, &digest);
     if (status.value != kOtcryptoStatusValueOk) {
       return INTERNAL(status.value);
     }
diff --git a/sw/device/tests/crypto/cryptotest/firmware/hmac.c b/sw/device/tests/crypto/cryptotest/firmware/hmac.c
index 0a56deba5e773..9817dbe3e3f83 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/hmac.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/hmac.c
@@ -2,12 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/crypto/include/hmac.h"
+
+#include "sw/device/lib/base/math.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
@@ -70,18 +72,28 @@ status_t handle_hmac(ujson_t *uj) {
       .hw_backed = kHardenedBoolFalse,
       .security_level = kOtcryptoKeySecurityLevelLow,
   };
-  // Create buffer to store key
-  uint32_t key_buf[uj_key.key_len];
+  // Create key shares.
+  uint32_t key_buf[ceil_div(uj_key.key_len, sizeof(uint32_t))];
   memcpy(key_buf, uj_key.key, uj_key.key_len);
-  // Create keyblob
-  uint32_t keyblob[keyblob_num_words(config)];
+  for (size_t i = 0; i < ARRAYSIZE(key_buf); i++) {
+    key_buf[i] ^= kTestMask[i];
+  }
+  otcrypto_const_word32_buf_t share0 = {
+      .data = key_buf,
+      .len = ARRAYSIZE(key_buf),
+  };
+  otcrypto_const_word32_buf_t share1 = {
+      .data = kTestMask,
+      .len = ARRAYSIZE(key_buf),
+  };
   // Create blinded key
-  TRY(keyblob_from_key_and_mask(key_buf, kTestMask, config, keyblob));
+  uint32_t keyblob[2 * ARRAYSIZE(key_buf)];
   otcrypto_blinded_key_t key = {
       .config = config,
       .keyblob_length = sizeof(keyblob),
       .keyblob = keyblob,
   };
+  TRY(otcrypto_import_blinded_key(share0, share1, &key));
 
   // Create input message
   uint8_t msg_buf[uj_message.message_len];
diff --git a/sw/device/tests/crypto/cryptotest/firmware/kmac.c b/sw/device/tests/crypto/cryptotest/firmware/kmac.c
index cad016410cc4f..7695e8b37db70 100644
--- a/sw/device/tests/crypto/cryptotest/firmware/kmac.c
+++ b/sw/device/tests/crypto/cryptotest/firmware/kmac.c
@@ -2,12 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/crypto/include/kmac.h"
+
+#include "sw/device/lib/base/math.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
@@ -50,16 +52,13 @@ status_t handle_kmac(ujson_t *uj) {
   TRY(ujson_deserialize_cryptotest_kmac_customization_string_t(
       uj, &uj_customization_string));
 
-  otcrypto_kmac_mode_t mode;
   otcrypto_key_mode_t key_mode;
   switch (uj_mode) {
     case kCryptotestKmacModeKmac128:
       key_mode = kOtcryptoKeyModeKmac128;
-      mode = kOtcryptoKmacModeKmac128;
       break;
     case kCryptotestKmacModeKmac256:
       key_mode = kOtcryptoKeyModeKmac256;
-      mode = kOtcryptoKmacModeKmac256;
       break;
     default:
       LOG_ERROR("Unsupported KMAC mode: %d", uj_mode);
@@ -73,18 +72,28 @@ status_t handle_kmac(ujson_t *uj) {
       .hw_backed = kHardenedBoolFalse,
       .security_level = kOtcryptoKeySecurityLevelLow,
   };
-  // Create buffer to store key
-  uint32_t key_buf[uj_key.key_len];
+  // Create key shares.
+  uint32_t key_buf[ceil_div(uj_key.key_len, sizeof(uint32_t))];
   memcpy(key_buf, uj_key.key, uj_key.key_len);
-  // Create keyblob
-  uint32_t keyblob[keyblob_num_words(config)];
+  for (size_t i = 0; i < ARRAYSIZE(key_buf); i++) {
+    key_buf[i] ^= kTestMask[i];
+  }
+  otcrypto_const_word32_buf_t share0 = {
+      .data = key_buf,
+      .len = ARRAYSIZE(key_buf),
+  };
+  otcrypto_const_word32_buf_t share1 = {
+      .data = kTestMask,
+      .len = ARRAYSIZE(key_buf),
+  };
   // Create blinded key
-  TRY(keyblob_from_key_and_mask(key_buf, kTestMask, config, keyblob));
+  uint32_t keyblob[2 * ARRAYSIZE(key_buf)];
   otcrypto_blinded_key_t key = {
       .config = config,
       .keyblob_length = sizeof(keyblob),
       .keyblob = keyblob,
   };
+  TRY(otcrypto_import_blinded_key(share0, share1, &key));
 
   // Create input message
   uint8_t msg_buf[uj_message.message_len];
@@ -111,7 +120,7 @@ status_t handle_kmac(ujson_t *uj) {
       .data = tag_buf,
   };
   otcrypto_status_t status =
-      otcrypto_kmac(&key, input_message, mode, customization_string,
+      otcrypto_kmac(&key, input_message, customization_string,
                     uj_required_tag_length.required_tag_length, tag);
   if (status.value != kOtcryptoStatusValueOk) {
     return INTERNAL(status.value);
diff --git a/sw/device/tests/crypto/ecdh_p256_functest.c b/sw/device/tests/crypto/ecdh_p256_functest.c
index 0d7f0258fcfd5..c99f3325066ca 100644
--- a/sw/device/tests/crypto/ecdh_p256_functest.c
+++ b/sw/device/tests/crypto/ecdh_p256_functest.c
@@ -4,7 +4,7 @@
 
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -23,15 +23,10 @@ enum {
   kP256SharedKeyWords = kP256SharedKeyBytes / sizeof(uint32_t),
 };
 
-static const otcrypto_ecc_curve_t kCurveP256 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP256,
-    .domain_parameter = NULL,
-};
-
 // Configuration for the private key.
 static const otcrypto_key_config_t kEcdhPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdh,
+    .key_mode = kOtcryptoKeyModeEcdhP256,
     .key_length = kP256PrivateKeyBytes,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -69,23 +64,23 @@ status_t key_exchange_test(void) {
   uint32_t pkA[kP256PublicKeyWords] = {0};
   uint32_t pkB[kP256PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_keyA = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP256,
       .key_length = sizeof(pkA),
       .key = pkA,
   };
   otcrypto_unblinded_key_t public_keyB = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP256,
       .key_length = sizeof(pkB),
       .key = pkB,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair A...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP256, &private_keyA, &public_keyA));
+  TRY(otcrypto_ecdh_p256_keygen(&private_keyA, &public_keyA));
 
   // Generate a second keypair.
   LOG_INFO("Generating keypair B...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP256, &private_keyB, &public_keyB));
+  TRY(otcrypto_ecdh_p256_keygen(&private_keyB, &public_keyB));
 
   // Sanity check; public keys should be different from each other.
   CHECK_ARRAYS_NE(pkA, pkB, ARRAYSIZE(pkA));
@@ -109,12 +104,12 @@ status_t key_exchange_test(void) {
   // Compute the shared secret from A's side of the computation (using A's
   // private key and B's public key).
   LOG_INFO("Generating shared secret (A)...");
-  TRY(otcrypto_ecdh(&private_keyA, &public_keyB, &kCurveP256, &shared_keyA));
+  TRY(otcrypto_ecdh_p256(&private_keyA, &public_keyB, &shared_keyA));
 
   // Compute the shared secret from B's side of the computation (using B's
   // private key and A's public key).
   LOG_INFO("Generating shared secret (B)...");
-  TRY(otcrypto_ecdh(&private_keyB, &public_keyA, &kCurveP256, &shared_keyB));
+  TRY(otcrypto_ecdh_p256(&private_keyB, &public_keyA, &shared_keyB));
 
   // Get pointers to individual shares of both shared keys.
   uint32_t *keyA0;
diff --git a/sw/device/tests/crypto/ecdh_p256_sideload_functest.c b/sw/device/tests/crypto/ecdh_p256_sideload_functest.c
index 94b77fdfeb51d..484f249266634 100644
--- a/sw/device/tests/crypto/ecdh_p256_sideload_functest.c
+++ b/sw/device/tests/crypto/ecdh_p256_sideload_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
@@ -30,11 +30,6 @@ enum {
   kP256SharedKeyWords = kP256SharedKeyBytes / sizeof(uint32_t),
 };
 
-static const otcrypto_ecc_curve_t kCurveP256 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP256,
-    .domain_parameter = NULL,
-};
-
 // Versions for private keys A and B.
 static const uint32_t kPrivateKeyAVersion = 0;
 static const uint32_t kPrivateKeyBVersion = 0;
@@ -50,7 +45,7 @@ static const uint32_t kPrivateKeyBSalt[7] = {0xa0a1a2a3, 0xa4a5a6a7, 0xa8a9aaab,
 // Configuration for the private key.
 static const otcrypto_key_config_t kEcdhPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdh,
+    .key_mode = kOtcryptoKeyModeEcdhP256,
     .key_length = kP256PrivateKeyBytes,
     .hw_backed = kHardenedBoolTrue,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -90,23 +85,23 @@ status_t key_exchange_test(void) {
   uint32_t pkA[kP256PublicKeyWords] = {0};
   uint32_t pkB[kP256PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_keyA = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP256,
       .key_length = sizeof(pkA),
       .key = pkA,
   };
   otcrypto_unblinded_key_t public_keyB = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP256,
       .key_length = sizeof(pkB),
       .key = pkB,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair A...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP256, &private_keyA, &public_keyA));
+  TRY(otcrypto_ecdh_p256_keygen(&private_keyA, &public_keyA));
 
   // Generate a second keypair.
   LOG_INFO("Generating keypair B...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP256, &private_keyB, &public_keyB));
+  TRY(otcrypto_ecdh_p256_keygen(&private_keyB, &public_keyB));
 
   // Sanity check; public keys should be different from each other.
   CHECK_ARRAYS_NE(pkA, pkB, ARRAYSIZE(pkA));
@@ -130,12 +125,12 @@ status_t key_exchange_test(void) {
   // Compute the shared secret from A's side of the computation (using A's
   // private key and B's public key).
   LOG_INFO("Generating shared secret (A)...");
-  TRY(otcrypto_ecdh(&private_keyA, &public_keyB, &kCurveP256, &shared_keyA));
+  TRY(otcrypto_ecdh_p256(&private_keyA, &public_keyB, &shared_keyA));
 
   // Compute the shared secret from B's side of the computation (using B's
   // private key and A's public key).
   LOG_INFO("Generating shared secret (B)...");
-  TRY(otcrypto_ecdh(&private_keyB, &public_keyA, &kCurveP256, &shared_keyB));
+  TRY(otcrypto_ecdh_p256(&private_keyB, &public_keyA, &shared_keyB));
 
   // Get pointers to individual shares of both shared keys.
   uint32_t *keyA0;
diff --git a/sw/device/tests/crypto/ecdh_p384_functest.c b/sw/device/tests/crypto/ecdh_p384_functest.c
index b46550fd26026..6741c9eb12380 100644
--- a/sw/device/tests/crypto/ecdh_p384_functest.c
+++ b/sw/device/tests/crypto/ecdh_p384_functest.c
@@ -4,7 +4,7 @@
 
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -23,15 +23,10 @@ enum {
   kP384SharedKeyWords = kP384SharedKeyBytes / sizeof(uint32_t),
 };
 
-static const otcrypto_ecc_curve_t kCurveP384 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP384,
-    .domain_parameter = NULL,
-};
-
 // Configuration for the private key.
 static const otcrypto_key_config_t kEcdhPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdh,
+    .key_mode = kOtcryptoKeyModeEcdhP384,
     .key_length = kP384PrivateKeyBytes,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -69,23 +64,23 @@ status_t key_exchange_test(void) {
   uint32_t pkA[kP384PublicKeyWords] = {0};
   uint32_t pkB[kP384PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_keyA = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP384,
       .key_length = sizeof(pkA),
       .key = pkA,
   };
   otcrypto_unblinded_key_t public_keyB = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP384,
       .key_length = sizeof(pkB),
       .key = pkB,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair A...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP384, &private_keyA, &public_keyA));
+  TRY(otcrypto_ecdh_p384_keygen(&private_keyA, &public_keyA));
 
   // Generate a second keypair.
   LOG_INFO("Generating keypair B...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP384, &private_keyB, &public_keyB));
+  TRY(otcrypto_ecdh_p384_keygen(&private_keyB, &public_keyB));
 
   // Sanity check; public keys should be different from each other.
   CHECK_ARRAYS_NE(pkA, pkB, ARRAYSIZE(pkA));
@@ -111,12 +106,12 @@ status_t key_exchange_test(void) {
   // Compute the shared secret from A's side of the computation (using A's
   // private key and B's public key).
   LOG_INFO("Generating shared secret (A)...");
-  TRY(otcrypto_ecdh(&private_keyA, &public_keyB, &kCurveP384, &shared_keyA));
+  TRY(otcrypto_ecdh_p384(&private_keyA, &public_keyB, &shared_keyA));
 
   // Compute the shared secret from B's side of the computation (using B's
   // private key and A's public key).
   LOG_INFO("Generating shared secret (B)...");
-  TRY(otcrypto_ecdh(&private_keyB, &public_keyA, &kCurveP384, &shared_keyB));
+  TRY(otcrypto_ecdh_p384(&private_keyB, &public_keyA, &shared_keyB));
 
   // Get pointers to individual shares of both shared keys.
   uint32_t *keyA0;
diff --git a/sw/device/tests/crypto/ecdh_p384_sideload_functest.c b/sw/device/tests/crypto/ecdh_p384_sideload_functest.c
index b00aa1c860c71..89eb97b1fe07e 100644
--- a/sw/device/tests/crypto/ecdh_p384_sideload_functest.c
+++ b/sw/device/tests/crypto/ecdh_p384_sideload_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
-#include "sw/device/lib/crypto/include/ecc.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
@@ -27,11 +27,6 @@ enum {
   kP384SharedKeyWords = kP384SharedKeyBytes / sizeof(uint32_t),
 };
 
-static const otcrypto_ecc_curve_t kCurveP384 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP384,
-    .domain_parameter = NULL,
-};
-
 // Versions for private keys A and B.
 static const uint32_t kPrivateKeyAVersion = 0;
 static const uint32_t kPrivateKeyBVersion = 0;
@@ -47,7 +42,7 @@ static const uint32_t kPrivateKeyBSalt[7] = {0xa0a1a2a3, 0xa4a5a6a7, 0xa8a9aaab,
 // Configuration for the private key.
 static const otcrypto_key_config_t kEcdhPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdh,
+    .key_mode = kOtcryptoKeyModeEcdhP384,
     .key_length = kP384PrivateKeyBytes,
     .hw_backed = kHardenedBoolTrue,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -87,23 +82,23 @@ status_t key_exchange_test(void) {
   uint32_t pkA[kP384PublicKeyWords] = {0};
   uint32_t pkB[kP384PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_keyA = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP384,
       .key_length = sizeof(pkA),
       .key = pkA,
   };
   otcrypto_unblinded_key_t public_keyB = {
-      .key_mode = kOtcryptoKeyModeEcdh,
+      .key_mode = kOtcryptoKeyModeEcdhP384,
       .key_length = sizeof(pkB),
       .key = pkB,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair A...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP384, &private_keyA, &public_keyA));
+  TRY(otcrypto_ecdh_p384_keygen(&private_keyA, &public_keyA));
 
   // Generate a second keypair.
   LOG_INFO("Generating keypair B...");
-  TRY(otcrypto_ecdh_keygen(&kCurveP384, &private_keyB, &public_keyB));
+  TRY(otcrypto_ecdh_p384_keygen(&private_keyB, &public_keyB));
 
   // Sanity check; public keys should be different from each other.
   CHECK_ARRAYS_NE(pkA, pkB, ARRAYSIZE(pkA));
@@ -127,12 +122,12 @@ status_t key_exchange_test(void) {
   // Compute the shared secret from A's side of the computation (using A's
   // private key and B's public key).
   LOG_INFO("Generating shared secret (A)...");
-  TRY(otcrypto_ecdh(&private_keyA, &public_keyB, &kCurveP384, &shared_keyA));
+  TRY(otcrypto_ecdh_p384(&private_keyA, &public_keyB, &shared_keyA));
 
   // Compute the shared secret from B's side of the computation (using B's
   // private key and A's public key).
   LOG_INFO("Generating shared secret (B)...");
-  TRY(otcrypto_ecdh(&private_keyB, &public_keyA, &kCurveP384, &shared_keyB));
+  TRY(otcrypto_ecdh_p384(&private_keyB, &public_keyA, &shared_keyB));
 
   // Get pointers to individual shares of both shared keys.
   uint32_t *keyA0;
diff --git a/sw/device/tests/crypto/ecdsa_p256_functest.c b/sw/device/tests/crypto/ecdsa_p256_functest.c
index 8f9a2a7368123..dedf074c565cf 100644
--- a/sw/device/tests/crypto/ecdsa_p256_functest.c
+++ b/sw/device/tests/crypto/ecdsa_p256_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -25,14 +25,9 @@ enum {
 // Message
 static const char kMessage[] = "test message";
 
-static const otcrypto_ecc_curve_t kCurveP256 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP256,
-    .domain_parameter = NULL,
-};
-
 static const otcrypto_key_config_t kPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdsa,
+    .key_mode = kOtcryptoKeyModeEcdsaP256,
     .key_length = kP256PrivateKeyBytes,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -50,44 +45,42 @@ status_t sign_then_verify_test(hardened_bool_t *verification_result) {
   // Allocate space for a public key.
   uint32_t pk[kP256PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_key = {
-      .key_mode = kOtcryptoKeyModeEcdsa,
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
       .key_length = sizeof(pk),
       .key = pk,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair...");
-  CHECK_STATUS_OK(
-      otcrypto_ecdsa_keygen(&kCurveP256, &private_key, &public_key));
+  CHECK_STATUS_OK(otcrypto_ecdsa_p256_keygen(&private_key, &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg = {
       .len = sizeof(kMessage) - 1,
       .data = (unsigned char *)&kMessage,
   };
-  uint32_t msg_digest_data[kSha256DigestWords];
+  uint32_t msg_digest_data[256 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha256,
   };
-  TRY(otcrypto_hash(msg, msg_digest));
+  TRY(otcrypto_sha2_256(msg, &msg_digest));
 
   // Allocate space for the signature.
   uint32_t sig[kP256SignatureWords] = {0};
 
   // Generate a signature for the message.
   LOG_INFO("Signing...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_sign(
-      &private_key, msg_digest, &kCurveP256,
+  CHECK_STATUS_OK(otcrypto_ecdsa_p256_sign_verify(
+      &private_key, &public_key, msg_digest,
       (otcrypto_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)}));
 
   // Verify the signature.
   LOG_INFO("Verifying...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_verify(
+  CHECK_STATUS_OK(otcrypto_ecdsa_p256_verify(
       &public_key, msg_digest,
       (otcrypto_const_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)},
-      &kCurveP256, verification_result));
+      verification_result));
 
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/tests/crypto/ecdsa_p256_sideload_functest.c b/sw/device/tests/crypto/ecdsa_p256_sideload_functest.c
index a893db4d08ec4..e63afce4b9f14 100644
--- a/sw/device/tests/crypto/ecdsa_p256_sideload_functest.c
+++ b/sw/device/tests/crypto/ecdsa_p256_sideload_functest.c
@@ -5,9 +5,9 @@
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -17,6 +17,8 @@
 #define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
 enum {
+  /* Number of 32-bit words in a SHA256 digest. */
+  kSha256DigestWords = 256 / 32,
   /* Number of 32-bit words in a P-256 public key. */
   kP256PublicKeyWords = 512 / 32,
   /* Number of 32-bit words in a P-256 signature. */
@@ -28,14 +30,9 @@ enum {
 // Message
 static const char kMessage[] = "test message";
 
-static const otcrypto_ecc_curve_t kCurveP256 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP256,
-    .domain_parameter = NULL,
-};
-
 static const otcrypto_key_config_t kPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdsa,
+    .key_mode = kOtcryptoKeyModeEcdsaP256,
     .key_length = kP256PrivateKeyBytes,
     .hw_backed = kHardenedBoolTrue,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -63,14 +60,14 @@ status_t sign_then_verify_test(void) {
   // Allocate space for a public key.
   uint32_t pk[kP256PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_key = {
-      .key_mode = kOtcryptoKeyModeEcdsa,
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
       .key_length = sizeof(pk),
       .key = pk,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair...");
-  TRY(otcrypto_ecdsa_keygen(&kCurveP256, &private_key, &public_key));
+  TRY(otcrypto_ecdsa_p256_keygen(&private_key, &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t message = {
@@ -81,26 +78,25 @@ status_t sign_then_verify_test(void) {
   otcrypto_hash_digest_t message_digest = {
       .data = message_digest_data,
       .len = ARRAYSIZE(message_digest_data),
-      .mode = kOtcryptoHashModeSha256,
   };
-  TRY(otcrypto_hash(message, message_digest));
+  TRY(otcrypto_sha2_256(message, &message_digest));
 
   // Allocate space for the signature.
   uint32_t sig[kP256SignatureWords] = {0};
 
   // Generate a signature for the message.
   LOG_INFO("Signing...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_sign(
-      &private_key, message_digest, &kCurveP256,
+  CHECK_STATUS_OK(otcrypto_ecdsa_p256_sign_verify(
+      &private_key, &public_key, message_digest,
       (otcrypto_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)}));
 
   // Verify the signature.
   LOG_INFO("Verifying...");
   hardened_bool_t verification_result;
-  CHECK_STATUS_OK(otcrypto_ecdsa_verify(
+  CHECK_STATUS_OK(otcrypto_ecdsa_p256_verify(
       &public_key, message_digest,
       (otcrypto_const_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)},
-      &kCurveP256, &verification_result));
+      &verification_result));
 
   // The signature should pass verification.
   TRY_CHECK(verification_result == kHardenedBoolTrue);
diff --git a/sw/device/tests/crypto/ecdsa_p256_verify_functest.c b/sw/device/tests/crypto/ecdsa_p256_verify_functest.c
index ef6d391e5ea23..2b827ff7847cf 100644
--- a/sw/device/tests/crypto/ecdsa_p256_verify_functest.c
+++ b/sw/device/tests/crypto/ecdsa_p256_verify_functest.c
@@ -4,8 +4,8 @@
 
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p256.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -23,19 +23,18 @@ status_t ecdsa_p256_verify_test(
       .data = testvec->msg,
       .len = testvec->msg_len,
   };
-  uint32_t digest_buf[kSha256DigestWords];
+  uint32_t digest_buf[256 / 32];
   otcrypto_hash_digest_t digest = {
-      .mode = kOtcryptoHashModeSha256,
       .data = digest_buf,
-      .len = kSha256DigestWords,
+      .len = ARRAYSIZE(digest_buf),
   };
-  TRY(otcrypto_hash(msg_buf, digest));
+  TRY(otcrypto_sha2_256(msg_buf, &digest));
 
   // Attempt to verify signature.
-  TRY(ecdsa_p256_verify_start(&testvec->signature, digest.data,
+  TRY(p256_ecdsa_verify_start(&testvec->signature, digest.data,
                               &testvec->public_key));
   hardened_bool_t result;
-  TRY(ecdsa_p256_verify_finalize(&testvec->signature, &result));
+  TRY(p256_ecdsa_verify_finalize(&testvec->signature, &result));
 
   if (testvec->valid && result != kHardenedBoolTrue) {
     LOG_ERROR("Valid signature failed verification.");
diff --git a/sw/device/tests/crypto/ecdsa_p256_verify_testvectors.h.tpl b/sw/device/tests/crypto/ecdsa_p256_verify_testvectors.h.tpl
index 6e7f599b953f9..19694265966c1 100644
--- a/sw/device/tests/crypto/ecdsa_p256_verify_testvectors.h.tpl
+++ b/sw/device/tests/crypto/ecdsa_p256_verify_testvectors.h.tpl
@@ -8,7 +8,7 @@
 #ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_ECDSA_P256_VERIFY_TESTVECTORS_H_
 #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_ECDSA_P256_VERIFY_TESTVECTORS_H_
 
-#include "sw/device/lib/crypto/impl/ecc/ecdsa_p256.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -25,7 +25,7 @@ typedef const struct ecdsa_p256_verify_test_vector {
   // The public key.
   p256_point_t public_key;
   // The signature to verify.
-  ecdsa_p256_signature_t signature;
+  p256_ecdsa_signature_t signature;
   // Expected result (true iff signature is valid).
   bool valid;
   // Any notes about the test vector (a C string).
diff --git a/sw/device/tests/crypto/ecdsa_p384_functest.c b/sw/device/tests/crypto/ecdsa_p384_functest.c
index 2a97edb06f409..f69bee8aafc26 100644
--- a/sw/device/tests/crypto/ecdsa_p384_functest.c
+++ b/sw/device/tests/crypto/ecdsa_p384_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -25,14 +25,9 @@ enum {
 // Message
 static const char kMessage[] = "test message";
 
-static const otcrypto_ecc_curve_t kCurveP384 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP384,
-    .domain_parameter = NULL,
-};
-
 static const otcrypto_key_config_t kPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdsa,
+    .key_mode = kOtcryptoKeyModeEcdsaP384,
     .key_length = kP384PrivateKeyBytes,
     .hw_backed = kHardenedBoolFalse,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -50,44 +45,42 @@ status_t sign_then_verify_test(hardened_bool_t *verification_result) {
   // Allocate space for a public key.
   uint32_t pk[kP384PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_key = {
-      .key_mode = kOtcryptoKeyModeEcdsa,
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
       .key_length = sizeof(pk),
       .key = pk,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair...");
-  CHECK_STATUS_OK(
-      otcrypto_ecdsa_keygen(&kCurveP384, &private_key, &public_key));
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_keygen(&private_key, &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg = {
       .len = sizeof(kMessage) - 1,
       .data = (unsigned char *)&kMessage,
   };
-  uint32_t msg_digest_data[kSha384DigestWords];
+  uint32_t msg_digest_data[384 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha384,
   };
-  TRY(otcrypto_hash(msg, msg_digest));
+  TRY(otcrypto_sha2_384(msg, &msg_digest));
 
   // Allocate space for the signature.
   uint32_t sig[kP384SignatureWords] = {0};
 
   // Generate a signature for the message.
   LOG_INFO("Signing...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_sign(
-      &private_key, msg_digest, &kCurveP384,
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_sign_verify(
+      &private_key, &public_key, msg_digest,
       (otcrypto_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)}));
 
   // Verify the signature.
   LOG_INFO("Verifying...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_verify(
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_verify(
       &public_key, msg_digest,
       (otcrypto_const_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)},
-      &kCurveP384, verification_result));
+      verification_result));
 
   return OTCRYPTO_OK;
 }
diff --git a/sw/device/tests/crypto/ecdsa_p384_sideload_functest.c b/sw/device/tests/crypto/ecdsa_p384_sideload_functest.c
index 2a508dd49504f..781ddfa36ce0c 100644
--- a/sw/device/tests/crypto/ecdsa_p384_sideload_functest.c
+++ b/sw/device/tests/crypto/ecdsa_p384_sideload_functest.c
@@ -5,9 +5,9 @@
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/ecc.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
 #include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -28,14 +28,9 @@ enum {
 // Message
 static const char kMessage[] = "test message";
 
-static const otcrypto_ecc_curve_t kCurveP384 = {
-    .curve_type = kOtcryptoEccCurveTypeNistP384,
-    .domain_parameter = NULL,
-};
-
 static const otcrypto_key_config_t kPrivateKeyConfig = {
     .version = kOtcryptoLibVersion1,
-    .key_mode = kOtcryptoKeyModeEcdsa,
+    .key_mode = kOtcryptoKeyModeEcdsaP384,
     .key_length = kP384PrivateKeyBytes,
     .hw_backed = kHardenedBoolTrue,
     .security_level = kOtcryptoKeySecurityLevelLow,
@@ -63,45 +58,43 @@ status_t sign_then_verify_test(void) {
   // Allocate space for a public key.
   uint32_t pk[kP384PublicKeyWords] = {0};
   otcrypto_unblinded_key_t public_key = {
-      .key_mode = kOtcryptoKeyModeEcdsa,
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
       .key_length = sizeof(pk),
       .key = pk,
   };
 
   // Generate a keypair.
   LOG_INFO("Generating keypair...");
-  CHECK_STATUS_OK(
-      otcrypto_ecdsa_keygen(&kCurveP384, &private_key, &public_key));
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_keygen(&private_key, &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg = {
       .len = sizeof(kMessage) - 1,
       .data = (unsigned char *)&kMessage,
   };
-  uint32_t msg_digest_data[kSha384DigestWords];
+  uint32_t msg_digest_data[384 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha384,
   };
-  TRY(otcrypto_hash(msg, msg_digest));
+  TRY(otcrypto_sha2_384(msg, &msg_digest));
 
   // Allocate space for the signature.
   uint32_t sig[kP384SignatureWords] = {0};
 
   // Generate a signature for the message.
   LOG_INFO("Signing...");
-  CHECK_STATUS_OK(otcrypto_ecdsa_sign(
-      &private_key, msg_digest, &kCurveP384,
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_sign_verify(
+      &private_key, &public_key, msg_digest,
       (otcrypto_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)}));
 
   // Verify the signature.
   LOG_INFO("Verifying...");
   hardened_bool_t verification_result;
-  CHECK_STATUS_OK(otcrypto_ecdsa_verify(
+  CHECK_STATUS_OK(otcrypto_ecdsa_p384_verify(
       &public_key, msg_digest,
       (otcrypto_const_word32_buf_t){.data = sig, .len = ARRAYSIZE(sig)},
-      &kCurveP384, &verification_result));
+      &verification_result));
 
   // The signature should pass verification.
   TRY_CHECK(verification_result == kHardenedBoolTrue);
diff --git a/sw/device/tests/crypto/hkdf_functest.c b/sw/device/tests/crypto/hkdf_functest.c
index 72ce377c1a5c3..a9bcfb8520a9e 100644
--- a/sw/device/tests/crypto/hkdf_functest.c
+++ b/sw/device/tests/crypto/hkdf_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/kdf.h"
+#include "sw/device/lib/crypto/include/hkdf.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -156,7 +156,7 @@ static status_t run_test(hkdf_test_vector_t *test) {
   };
 
   // Run the "extract" stage of HKDF.
-  TRY(otcrypto_kdf_hkdf_extract(ikm, salt, &prk));
+  TRY(otcrypto_hkdf_extract(&ikm, salt, &prk));
 
   // If the test includes an expected value of PRK, then check the value.
   if (test->prk != NULL) {
@@ -171,7 +171,7 @@ static status_t run_test(hkdf_test_vector_t *test) {
   }
 
   // Run the "expand" stage of HKDF.
-  TRY(otcrypto_kdf_hkdf_expand(prk, info, &okm));
+  TRY(otcrypto_hkdf_expand(&prk, info, &okm));
 
   // Unmask the output key value and compare to the expected value.
   uint32_t *okm_share0;
diff --git a/sw/device/tests/crypto/hmac_functest.c b/sw/device/tests/crypto/hmac_functest.c
index 02c9d56f431a9..f514f66d0f058 100644
--- a/sw/device/tests/crypto/hmac_functest.c
+++ b/sw/device/tests/crypto/hmac_functest.c
@@ -4,8 +4,8 @@
 
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -17,37 +17,11 @@
 #include "hmac_testvectors.h"
 
 // Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('h', 'm', 'a')
+#define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
 // Global pointer to the current test vector.
 static hmac_test_vector_t *current_test_vector = NULL;
 
-/**
- * Determines `hash_mode` for given SHA-2 test vectors.
- *
- * Note that for HMAC operations, mode information is part of the key struct,
- * hence this function is only used for hash vectors.
- *
- * @param test_vec The pointer to the test vector.
- * @param[out] hash_mode The determined hash_mode of the given test vector.
- */
-static status_t get_hash_mode(hmac_test_vector_t *test_vec,
-                              otcrypto_hash_mode_t *hash_mode) {
-  switch (test_vec->test_operation) {
-    case kHmacTestOperationSha256:
-      *hash_mode = kOtcryptoHashModeSha256;
-      return OTCRYPTO_OK;
-    case kHmacTestOperationSha384:
-      *hash_mode = kOtcryptoHashModeSha384;
-      return OTCRYPTO_OK;
-    case kHmacTestOperationSha512:
-      *hash_mode = kOtcryptoHashModeSha512;
-      return OTCRYPTO_OK;
-    default:
-      return OTCRYPTO_BAD_ARGS;
-  }
-}
-
 /**
  * Run the test pointed to by `current_test_vector`.
  */
@@ -59,24 +33,24 @@ static status_t run_test_vector(void) {
   // The test vectors already have the correct digest sizes hardcoded.
   size_t digest_len = current_test_vector->digest.len;
   // Allocate the buffer for the maximum digest size (which comes from SHA-512).
-  uint32_t act_tag[kSha512DigestWords];
+  uint32_t act_tag[512 / 32];
   otcrypto_word32_buf_t tag_buf = {
       .data = act_tag,
       .len = digest_len,
   };
   otcrypto_hash_digest_t hash_digest = {
-      // .mode is to be determined below in switch-case block.
       .data = act_tag,
       .len = digest_len,
   };
   switch (current_test_vector->test_operation) {
     case kHmacTestOperationSha256:
-      OT_FALLTHROUGH_INTENDED;
+      TRY(otcrypto_sha2_256(current_test_vector->message, &hash_digest));
+      break;
     case kHmacTestOperationSha384:
-      OT_FALLTHROUGH_INTENDED;
+      TRY(otcrypto_sha2_384(current_test_vector->message, &hash_digest));
+      break;
     case kHmacTestOperationSha512:
-      TRY(get_hash_mode(current_test_vector, &hash_digest.mode));
-      TRY(otcrypto_hash(current_test_vector->message, hash_digest));
+      TRY(otcrypto_sha2_512(current_test_vector->message, &hash_digest));
       break;
     case kHmacTestOperationHmacSha256:
       OT_FALLTHROUGH_INTENDED;
@@ -87,10 +61,10 @@ static status_t run_test_vector(void) {
                         tag_buf));
       break;
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
   TRY_CHECK_ARRAYS_EQ(act_tag, current_test_vector->digest.data, digest_len);
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 OTTF_DEFINE_TEST_CONFIG();
diff --git a/sw/device/tests/crypto/hmac_multistream_functest.c b/sw/device/tests/crypto/hmac_multistream_functest.c
index 256e45df557b0..3294b53aa94ec 100644
--- a/sw/device/tests/crypto/hmac_multistream_functest.c
+++ b/sw/device/tests/crypto/hmac_multistream_functest.c
@@ -4,8 +4,8 @@
 
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/rand_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -18,11 +18,11 @@
 #include "hmac_testvectors.h"
 
 // Module ID for status codes.
-#define MODULE_ID MAKE_MODULE_ID('h', 's', 't')
+#define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
 // We need the following assertion, because we are using hash context struct
 // also for hmac contexts.
-static_assert(sizeof(otcrypto_hash_context_t) ==
+static_assert(sizeof(otcrypto_sha2_context_t) ==
                   sizeof(otcrypto_hmac_context_t),
               "Hash and Hmac contexts are expected to be of the same length");
 
@@ -75,7 +75,7 @@ typedef struct hmac_extended_test_vector {
   /* `progess` keeps track of how many message segments are streamed so far. */
   hmac_test_progress_t progress;
   /* `hash_ctx` is used to store context during streaming. */
-  otcrypto_hash_context_t hash_ctx;
+  otcrypto_sha2_context_t hash_ctx;
 } hmac_extended_test_vector_t;
 
 static hmac_extended_test_vector_t
@@ -157,15 +157,15 @@ static status_t get_hash_mode(hmac_test_vector_t *test_vec,
   switch (test_vec->test_operation) {
     case kHmacTestOperationSha256:
       *hash_mode = kOtcryptoHashModeSha256;
-      return OTCRYPTO_OK;
+      return OK_STATUS();
     case kHmacTestOperationSha384:
       *hash_mode = kOtcryptoHashModeSha384;
-      return OTCRYPTO_OK;
+      return OK_STATUS();
     case kHmacTestOperationSha512:
       *hash_mode = kOtcryptoHashModeSha512;
-      return OTCRYPTO_OK;
+      return OK_STATUS();
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
 }
 
@@ -176,7 +176,7 @@ static status_t get_hash_mode(hmac_test_vector_t *test_vec,
  * @param hash_ctx Corresponding context for given `current_test_vector`.
  * @param current_test_vector Pointer to the hardcoded test vector.
  */
-static status_t ctx_init(otcrypto_hash_context_t *hash_ctx,
+static status_t ctx_init(otcrypto_sha2_context_t *hash_ctx,
                          hmac_test_vector_t *current_test_vector) {
   // Populate `checksum` and `config.security_level` fields.
   current_test_vector->key.checksum =
@@ -191,7 +191,7 @@ static status_t ctx_init(otcrypto_hash_context_t *hash_ctx,
       OT_FALLTHROUGH_INTENDED;
     case kHmacTestOperationSha512:
       TRY(get_hash_mode(current_test_vector, &hash_mode));
-      TRY(otcrypto_hash_init(hash_ctx, hash_mode));
+      TRY(otcrypto_sha2_init(hash_mode, hash_ctx));
       break;
     case kHmacTestOperationHmacSha256:
       OT_FALLTHROUGH_INTENDED;
@@ -202,9 +202,9 @@ static status_t ctx_init(otcrypto_hash_context_t *hash_ctx,
                              &current_test_vector->key));
       break;
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 /**
@@ -221,39 +221,36 @@ static status_t hmac_oneshot(hmac_test_vector_t *current_test_vector) {
   // The test vectors already have the correct digest sizes hardcoded.
   size_t digest_len = current_test_vector->digest.len;
   // Allocate the buffer for the maximum digest size (which comes from SHA-512).
-  uint32_t act_tag[kSha512DigestWords];
-  otcrypto_word32_buf_t tag_buf = {
-      .data = act_tag,
-      .len = digest_len,
-  };
+  uint32_t act_tag[512 / 32];
   otcrypto_hash_digest_t hash_digest = {
-      // .mode is to be determined below in switch-case block.
       .data = act_tag,
       .len = digest_len,
   };
   switch (current_test_vector->test_operation) {
     case kHmacTestOperationSha256:
-      OT_FALLTHROUGH_INTENDED;
+      TRY(otcrypto_sha2_256(current_test_vector->message, &hash_digest));
+      break;
     case kHmacTestOperationSha384:
-      OT_FALLTHROUGH_INTENDED;
+      TRY(otcrypto_sha2_384(current_test_vector->message, &hash_digest));
+      break;
     case kHmacTestOperationSha512:
-      TRY(get_hash_mode(current_test_vector, &hash_digest.mode));
-      TRY(otcrypto_hash(current_test_vector->message, hash_digest));
+      TRY(otcrypto_sha2_512(current_test_vector->message, &hash_digest));
       break;
     case kHmacTestOperationHmacSha256:
       OT_FALLTHROUGH_INTENDED;
     case kHmacTestOperationHmacSha384:
       OT_FALLTHROUGH_INTENDED;
     case kHmacTestOperationHmacSha512:
-      TRY(otcrypto_hmac(&current_test_vector->key, current_test_vector->message,
-                        tag_buf));
+      TRY(otcrypto_hmac(
+          &current_test_vector->key, current_test_vector->message,
+          (otcrypto_word32_buf_t){.data = act_tag, .len = digest_len}));
       break;
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
   LOG_INFO("Comparing result for %s.", current_test_vector->vector_identifier);
   CHECK_ARRAYS_EQ(act_tag, current_test_vector->digest.data, digest_len);
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 /**
@@ -269,7 +266,7 @@ static status_t hmac_oneshot(hmac_test_vector_t *current_test_vector) {
  * @param segment_len The byte length of the chosen segment.
  * @return The result of the operation.
  */
-static status_t feed_msg(otcrypto_hash_context_t *hash_ctx,
+static status_t feed_msg(otcrypto_sha2_context_t *hash_ctx,
                          hmac_test_vector_t *current_test_vector,
                          size_t segment_start, size_t segment_len) {
   otcrypto_const_byte_buf_t msg = {
@@ -283,7 +280,7 @@ static status_t feed_msg(otcrypto_hash_context_t *hash_ctx,
     case kHmacTestOperationSha384:
       OT_FALLTHROUGH_INTENDED;
     case kHmacTestOperationSha512:
-      TRY(otcrypto_hash_update(hash_ctx, msg));
+      TRY(otcrypto_sha2_update(hash_ctx, msg));
       break;
     case kHmacTestOperationHmacSha256:
       OT_FALLTHROUGH_INTENDED;
@@ -293,9 +290,9 @@ static status_t feed_msg(otcrypto_hash_context_t *hash_ctx,
       TRY(otcrypto_hmac_update((otcrypto_hmac_context_t *)hash_ctx, msg));
       break;
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 /**
@@ -306,18 +303,17 @@ static status_t feed_msg(otcrypto_hash_context_t *hash_ctx,
  * @param current_test_vector Pointer to the hardcoded test vector.
  * @return The result of the operation.
  */
-static status_t hmac_finalize(otcrypto_hash_context_t *hash_ctx,
+static status_t hmac_finalize(otcrypto_sha2_context_t *hash_ctx,
                               hmac_test_vector_t *current_test_vector) {
   // The test vectors already have the correct digest sizes hardcoded.
   size_t digest_len = current_test_vector->digest.len;
   // Allocate the buffer for the maximum digest size (which comes from SHA-512).
-  uint32_t act_tag[kSha512DigestWords];
+  uint32_t act_tag[512 / 32];
   otcrypto_word32_buf_t tag_buf = {
       .data = act_tag,
       .len = digest_len,
   };
   otcrypto_hash_digest_t hash_digest = {
-      // .mode is to be determined below in switch-case block.
       .data = act_tag,
       .len = digest_len,
   };
@@ -327,8 +323,7 @@ static status_t hmac_finalize(otcrypto_hash_context_t *hash_ctx,
     case kHmacTestOperationSha384:
       OT_FALLTHROUGH_INTENDED;
     case kHmacTestOperationSha512:
-      TRY(get_hash_mode(current_test_vector, &hash_digest.mode));
-      TRY(otcrypto_hash_final(hash_ctx, hash_digest));
+      TRY(otcrypto_sha2_final(hash_ctx, &hash_digest));
       break;
     case kHmacTestOperationHmacSha256:
       OT_FALLTHROUGH_INTENDED;
@@ -338,11 +333,11 @@ static status_t hmac_finalize(otcrypto_hash_context_t *hash_ctx,
       TRY(otcrypto_hmac_final((otcrypto_hmac_context_t *)hash_ctx, tag_buf));
       break;
     default:
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
   }
   LOG_INFO("Comparing result for %s.", current_test_vector->vector_identifier);
   CHECK_ARRAYS_EQ(act_tag, current_test_vector->digest.data, digest_len);
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 /**
@@ -365,7 +360,7 @@ static status_t hmac_finalize(otcrypto_hash_context_t *hash_ctx,
 static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
   // If `test_ext_vec` is done, simply return.
   if (test_ext_vec->progress == kHmacTestDone) {
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
 
   // If `test_ext_vec` is one-shot, we need to call one-shot API.
@@ -376,13 +371,13 @@ static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
     hmac_oneshot(test_ext_vec->hmac_test_vector);
     // Mark this test as complete
     test_ext_vec->progress = kHmacTestDone;
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
 
   // A sanity check: oneshot calls should not arrive here and `segment_count`
   // should be valid.
   if (test_ext_vec->segment_count == 0 || test_ext_vec->segment_count > 4) {
-    return OTCRYPTO_BAD_ARGS;
+    return INVALID_ARGUMENT();
   }
 
   // If `test_ext_vec` is streaming, and this is the first call, then call init.
@@ -391,7 +386,7 @@ static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
              test_ext_vec->original_idx);
     ctx_init(&test_ext_vec->hash_ctx, test_ext_vec->hmac_test_vector);
     test_ext_vec->progress = kHmacTestFeedSegment1;
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
 
   if (test_ext_vec->progress == kHmacTestFinalize) {
@@ -399,7 +394,7 @@ static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
              test_ext_vec->original_idx);
     hmac_finalize(&test_ext_vec->hash_ctx, test_ext_vec->hmac_test_vector);
     test_ext_vec->progress = kHmacTestDone;
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
 
   // Handle the last message specially
@@ -410,14 +405,14 @@ static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
         test_ext_vec->hmac_test_vector->message.len - segment_start;
     // Sanity check
     if (segment_start > test_ext_vec->hmac_test_vector->message.len) {
-      return OTCRYPTO_BAD_ARGS;
+      return INVALID_ARGUMENT();
     }
     LOG_INFO("Streaming the last segment #%d of vector #%d.",
              test_ext_vec->progress, test_ext_vec->original_idx);
     feed_msg(&test_ext_vec->hash_ctx, test_ext_vec->hmac_test_vector,
              segment_start, segment_len);
     test_ext_vec->progress = kHmacTestFinalize;
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
 
   if (test_ext_vec->progress < test_ext_vec->segment_count) {
@@ -430,9 +425,9 @@ static status_t process_segment(hmac_extended_test_vector_t *test_ext_vec) {
     feed_msg(&test_ext_vec->hash_ctx, test_ext_vec->hmac_test_vector,
              segment_start, segment_len);
     test_ext_vec->progress++;
-    return OTCRYPTO_OK;
+    return OK_STATUS();
   }
-  return OTCRYPTO_BAD_ARGS;
+  return INVALID_ARGUMENT();
 }
 
 /**
@@ -447,7 +442,7 @@ static status_t run_test(void) {
       TRY(process_segment(&kHmacExtendedTestVectors[j]));
     }
   }
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 OTTF_DEFINE_TEST_CONFIG();
diff --git a/sw/device/tests/crypto/hmac_sha256_functest.c b/sw/device/tests/crypto/hmac_sha256_functest.c
index a2bc8b2b40a5b..492315508a783 100644
--- a/sw/device/tests/crypto/hmac_sha256_functest.c
+++ b/sw/device/tests/crypto/hmac_sha256_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/hmac.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -140,6 +140,79 @@ static status_t long_key_test(void) {
   return run_test(kLongTestKey, sizeof(kLongTestKey), msg_buf, exp_tag);
 }
 
+/**
+ * Simple streaming test.
+ *
+ * HMAC-SHA256(kBasicTestKey, 'Test message.')
+ *   = 0xb4595b02be2a1638893166366656ece12b749b95a2815e52d687535309f3126f
+ */
+static status_t streaming_test(void) {
+  const char plaintext[] = "Test message.";
+  otcrypto_const_byte_buf_t msg_buf = {
+      .data = (unsigned char *)plaintext,
+      .len = sizeof(plaintext) - 1,
+  };
+  const uint32_t exp_tag[] = {
+      0x025b59b4, 0x38162abe, 0x36663189, 0xe1ec5666,
+      0x959b742b, 0x525e81a2, 0x535387d6, 0x6f12f309,
+  };
+
+  // Construct blinded key.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeHmacSha256,
+      .key_length = sizeof(kBasicTestKey),
+      .hw_backed = kHardenedBoolFalse,
+      .exportable = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  uint32_t keyblob[keyblob_num_words(config)];
+  TRY(keyblob_from_key_and_mask(kBasicTestKey, kTestMask, config, keyblob));
+  otcrypto_blinded_key_t blinded_key = {
+      .config = config,
+      .keyblob = keyblob,
+      .keyblob_length = sizeof(keyblob),
+      .checksum = 0,
+  };
+  blinded_key.checksum = integrity_blinded_checksum(&blinded_key);
+
+  uint32_t act_tag[kTagLenWords];
+  otcrypto_word32_buf_t tag_buf = {
+      .data = act_tag,
+      .len = ARRAYSIZE(act_tag),
+  };
+
+  // First, try using the streaming interface but passing input all at once.
+  otcrypto_hmac_context_t ctx;
+  TRY(otcrypto_hmac_init(&ctx, &blinded_key));
+  TRY(otcrypto_hmac_update(&ctx, msg_buf));
+  TRY(otcrypto_hmac_final(&ctx, tag_buf));
+  TRY_CHECK_ARRAYS_EQ(act_tag, exp_tag, kTagLenWords);
+
+  // Clear the destination buffer.
+  memset(act_tag, 0, sizeof(act_tag));
+
+  // Next, try smaller chunks.
+  size_t chunk_size = 3;
+  const unsigned char *msg_bytes = msg_buf.data;
+  size_t msg_len = msg_buf.len;
+  TRY(otcrypto_hmac_init(&ctx, &blinded_key));
+  size_t offset = 0;
+  for (; offset + chunk_size < msg_len; offset += chunk_size) {
+    TRY(otcrypto_hmac_update(&ctx, (otcrypto_const_byte_buf_t){
+                                       .data = msg_bytes, .len = chunk_size}));
+    msg_bytes += chunk_size;
+  }
+  // One final update for any remaining data (may be 0-length).
+  TRY(otcrypto_hmac_update(
+      &ctx,
+      (otcrypto_const_byte_buf_t){.data = msg_bytes, .len = msg_len - offset}));
+  TRY(otcrypto_hmac_final(&ctx, tag_buf));
+  TRY_CHECK_ARRAYS_EQ(act_tag, exp_tag, kTagLenWords);
+  return OK_STATUS();
+}
+
 OTTF_DEFINE_TEST_CONFIG();
 
 // Holds the test result.
@@ -151,5 +224,6 @@ bool test_main(void) {
   EXECUTE_TEST(test_result, simple_test);
   EXECUTE_TEST(test_result, empty_test);
   EXECUTE_TEST(test_result, long_key_test);
+  EXECUTE_TEST(test_result, streaming_test);
   return status_ok(test_result);
 }
diff --git a/sw/device/tests/crypto/hmac_sha384_functest.c b/sw/device/tests/crypto/hmac_sha384_functest.c
index 2060fc3d0e9ff..8a6706716c04a 100644
--- a/sw/device/tests/crypto/hmac_sha384_functest.c
+++ b/sw/device/tests/crypto/hmac_sha384_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/hmac.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
diff --git a/sw/device/tests/crypto/hmac_sha512_functest.c b/sw/device/tests/crypto/hmac_sha512_functest.c
index 3d6693021906c..343c3ff4c7bb4 100644
--- a/sw/device/tests/crypto/hmac_sha512_functest.c
+++ b/sw/device/tests/crypto/hmac_sha512_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/hmac.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
diff --git a/sw/device/tests/crypto/hmac_testvectors.h.tpl b/sw/device/tests/crypto/hmac_testvectors.h.tpl
index d9d23dd8cdeac..8c5beccd41d48 100644
--- a/sw/device/tests/crypto/hmac_testvectors.h.tpl
+++ b/sw/device/tests/crypto/hmac_testvectors.h.tpl
@@ -8,9 +8,8 @@
 #ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_HMAC_ALL_TESTVECTORS_H_
 #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_HMAC_ALL_TESTVECTORS_H_
 
-#include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/include/mac.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 
 
 #ifdef __cplusplus
@@ -18,8 +17,8 @@ extern "C" {
 #endif  // __cplusplus
 
 /**
- * Use the following enum to route a test vector to XOF, HASH or MAC
- * call through cryptolib API.
+ * Use the following enum to route a test vector to a HASH or MAC call through
+ * cryptolib API.
  */
 typedef enum hmac_test_operation {
   kHmacTestOperationSha256,
diff --git a/sw/device/tests/crypto/kdf_hmac_ctr_functest.c b/sw/device/tests/crypto/kdf_hmac_ctr_functest.c
index 20b624febcf50..cfd16742ef8fd 100644
--- a/sw/device/tests/crypto/kdf_hmac_ctr_functest.c
+++ b/sw/device/tests/crypto/kdf_hmac_ctr_functest.c
@@ -6,7 +6,7 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/kdf.h"
+#include "sw/device/lib/crypto/include/kdf_ctr.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -133,8 +133,7 @@ static status_t run_test(kdf_test_vector_t *test) {
     case kOtcryptoKeyModeHmacSha256:
     case kOtcryptoKeyModeHmacSha384:
     case kOtcryptoKeyModeHmacSha512:
-      TRY(otcrypto_kdf_hmac_ctr(kdk, label, context, km.config.key_length,
-                                &km));
+      TRY(otcrypto_kdf_ctr_hmac(&kdk, label, context, &km));
       break;
     default:
       LOG_INFO("Should never end up here.");
diff --git a/sw/device/tests/crypto/kdf_kmac_functest.c b/sw/device/tests/crypto/kdf_kmac_functest.c
index 4d0db2fa2c433..1bd95bda72a42 100644
--- a/sw/device/tests/crypto/kdf_kmac_functest.c
+++ b/sw/device/tests/crypto/kdf_kmac_functest.c
@@ -6,9 +6,8 @@
 #include "sw/device/lib/crypto/drivers/kmac.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/kdf.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/kmac_kdf.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -22,83 +21,63 @@
 // Global pointer to the current test vector.
 static kdf_kmac_test_vector_t *current_test_vector = NULL;
 
-/**
- * Get the mode for KMAC based on test operation.
- *
- * @param test_operation Security strength of KMAC.
- * @param[out] mode KMAC mode enum value.
- */
-status_t get_kmac_mode(kdf_test_operation_t test_operation,
-                       otcrypto_kmac_mode_t *mode) {
-  switch (test_operation) {
-    case kKdfTestOperationKmac128:
-      *mode = kOtcryptoKmacModeKmac128;
-      break;
-    case kKdfTestOperationKmac256:
-      *mode = kOtcryptoKmacModeKmac256;
-      break;
-    default:
-      LOG_INFO("Invalid test operation is given for KDF-KMAC");
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS();
-}
-
 /**
  * Run the test pointed to by `current_test_vector`.
  */
 static status_t run_test_vector(void) {
-  // Below, `km` prefix refers to keying_material, and
+  // Below, `km` prefix refers to output_key_material, and
   // `kdk` prefix refers to key derivation key
-  size_t km_key_length = current_test_vector->keying_material.config.key_length;
+  size_t km_num_words = current_test_vector->expected_output.len;
+  uint32_t km_buffer[2 * km_num_words];
 
-  size_t km_num_words = km_key_length / sizeof(uint32_t);
-  if (km_key_length % sizeof(uint32_t) != 0) {
-    km_num_words++;
-  }
-  uint32_t km_buffer[km_num_words];
-
-  otcrypto_kmac_mode_t mode;
-  TRY(get_kmac_mode(current_test_vector->test_operation, &mode));
-
-  otcrypto_blinded_key_t keying_material = {
+  otcrypto_blinded_key_t output_key_material = {
       .config =
           {
               // The following key_mode is a dummy placeholder. It does not
               // necessarily match the `key_length`.
               .key_mode = kOtcryptoKeyModeKdfKmac128,
-              .key_length = km_key_length,
+              .version = kOtcryptoLibVersion1,
+              .key_length = km_num_words * sizeof(uint32_t),
               .hw_backed = kHardenedBoolFalse,
               .security_level = kOtcryptoKeySecurityLevelLow,
               .exportable = kHardenedBoolTrue,
           },
       .keyblob = km_buffer,
-      .keyblob_length = 2 * km_key_length};
+      .keyblob_length = sizeof(km_buffer),
+  };
 
   // Populate `checksum` and `config.security_level` fields.
   current_test_vector->key_derivation_key.checksum =
       integrity_blinded_checksum(&current_test_vector->key_derivation_key);
 
-  TRY(otcrypto_kdf_kmac(
-      current_test_vector->key_derivation_key, mode, current_test_vector->label,
-      current_test_vector->context, km_key_length, &keying_material));
+  TRY(otcrypto_kmac_kdf(&current_test_vector->key_derivation_key,
+                        current_test_vector->label,
+                        current_test_vector->context, &output_key_material));
 
-  HARDENED_CHECK_EQ(integrity_blinded_key_check(&keying_material),
+  HARDENED_CHECK_EQ(integrity_blinded_key_check(&output_key_material),
                     kHardenedBoolTrue);
 
-  // At the moment, the function `kmac_kmac_128` called under the hood does not
-  // return the digest in 2 shares. Therefore we can simply compare the first
-  // share of the result from the test vector, since the second share is always
-  // 0.
-  TRY_CHECK_ARRAYS_EQ((uint8_t *)keying_material.keyblob,
-                      (uint8_t *)current_test_vector->keying_material.keyblob,
-                      km_key_length);
+  // Export the derived blinded key.
+  uint32_t km_share0[km_num_words];
+  uint32_t km_share1[km_num_words];
+  TRY(otcrypto_export_blinded_key(
+      &output_key_material,
+      (otcrypto_word32_buf_t){.data = km_share0, .len = ARRAYSIZE(km_share0)},
+      (otcrypto_word32_buf_t){.data = km_share1, .len = ARRAYSIZE(km_share1)}));
+
+  // Unmask the derived key and compare to the expected value.
+  uint32_t actual_output[km_num_words];
+  for (size_t i = 0; i < ARRAYSIZE(actual_output); i++) {
+    actual_output[i] = km_share0[i] ^ km_share1[i];
+  }
+  TRY_CHECK_ARRAYS_EQ(actual_output, current_test_vector->expected_output.data,
+                      km_num_words);
   return OTCRYPTO_OK;
 }
 
 OTTF_DEFINE_TEST_CONFIG();
 bool test_main(void) {
-  LOG_INFO("Testing cryptolib KDF-KMAC driver.");
+  LOG_INFO("Testing cryptolib KMAC-KDF driver.");
 
   // Initialize the core with default parameters
   CHECK_STATUS_OK(entropy_complex_init());
diff --git a/sw/device/tests/crypto/kdf_kmac_sideload_functest.c b/sw/device/tests/crypto/kdf_kmac_sideload_functest.c
index 0d6a67151fc52..f6edddfcacc90 100644
--- a/sw/device/tests/crypto/kdf_kmac_sideload_functest.c
+++ b/sw/device/tests/crypto/kdf_kmac_sideload_functest.c
@@ -7,9 +7,9 @@
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/impl/keyblob.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/kdf.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/kmac_kdf.h"
+#include "sw/device/lib/crypto/include/sha3.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -69,6 +69,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKdfKmac128,
                         .key_length = 32,
                         .hw_backed = kHardenedBoolTrue,
@@ -78,7 +79,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x00000002,
+                        0x00000000,
                         0xa0d0e9b4,
                         0x7e790e8b,
                         0x2ed764b2,
@@ -127,6 +128,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKdfKmac128,
                         .key_length = 32,
                         .hw_backed = kHardenedBoolTrue,
@@ -136,7 +138,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x0000000f,
+                        0x00000000,
                         0x1600a35a,
                         0x6f03675a,
                         0x6b0d549b,
@@ -209,6 +211,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKdfKmac256,
                         .key_length = 32,
                         .hw_backed = kHardenedBoolTrue,
@@ -218,7 +221,7 @@ static kdf_kmac_test_vector_t kKdfTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x00000001,
+                        0x00000000,
                         0xe5f6db1d,
                         0x9acd8acd,
                         0x14b044d7,
@@ -301,55 +304,6 @@ static kmac_test_vector_t sha3_test_vector = {
 // Global pointer to the current test vector.
 static kdf_kmac_test_vector_t *current_test_vector = NULL;
 
-/**
- * Get the mode for SHA3 based on the security strength.
- *
- * @param security_str Security strength (in bits).
- * @param[out] mode Hash mode enum value.
- */
-status_t get_sha3_mode(size_t security_strength, otcrypto_hash_mode_t *mode) {
-  switch (security_strength) {
-    case 224:
-      *mode = kOtcryptoHashModeSha3_224;
-      break;
-    case 256:
-      *mode = kOtcryptoHashModeSha3_256;
-      break;
-    case 384:
-      *mode = kOtcryptoHashModeSha3_384;
-      break;
-    case 512:
-      *mode = kOtcryptoHashModeSha3_512;
-      break;
-    default:
-      LOG_INFO("Invalid size for SHA3: %d bits", security_strength);
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS();
-}
-
-/**
- * Get the mode for KMAC based on test operation.
- *
- * @param test_operation Security strength of KMAC.
- * @param[out] mode KMAC mode enum value.
- */
-status_t get_kmac_mode(kdf_test_operation_t test_operation,
-                       otcrypto_kmac_mode_t *mode) {
-  switch (test_operation) {
-    case kKdfTestOperationKmac128:
-      *mode = kOtcryptoKmacModeKmac128;
-      break;
-    case kKdfTestOperationKmac256:
-      *mode = kOtcryptoKmacModeKmac256;
-      break;
-    default:
-      LOG_INFO("Invalid test operation is given for KDF-KMAC");
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS();
-}
-
 /**
  * Run the test pointed to by `current_test_vector`.
  */
@@ -359,23 +313,23 @@ static status_t run_test_vector(void) {
   size_t km_key_len = current_test_vector->keying_material.config.key_length;
   size_t km_keyblob_len =
       keyblob_num_words(current_test_vector->keying_material.config);
+  size_t km_keyblob_share_len =
+      keyblob_share_num_words(current_test_vector->keying_material.config);
   uint32_t km_buffer1[km_keyblob_len];
   uint32_t km_buffer2[km_keyblob_len];
 
   current_test_vector->key_derivation_key.checksum =
       integrity_blinded_checksum(&current_test_vector->key_derivation_key);
 
-  otcrypto_kmac_mode_t mode;
-  TRY(get_kmac_mode(current_test_vector->test_operation, &mode));
-
   otcrypto_key_config_t km_config = {
       // The following key_mode is a dummy placeholder. It does not
       // necessarily match the `key_length`.
+      .version = kOtcryptoLibVersion1,
       .key_mode = kOtcryptoKeyModeKdfKmac128,
       .key_length = km_key_len,
       .hw_backed = kHardenedBoolFalse,
       .security_level = kOtcryptoKeySecurityLevelHigh,
-      .exportable = kHardenedBoolFalse,
+      .exportable = kHardenedBoolTrue,
   };
 
   otcrypto_blinded_key_t keying_material1 = {
@@ -402,22 +356,64 @@ static status_t run_test_vector(void) {
   };
 
   LOG_INFO("Running the first KDF-KMAC sideload operation.");
-  TRY(otcrypto_kdf_kmac(
-      current_test_vector->key_derivation_key, mode, current_test_vector->label,
-      current_test_vector->context, km_key_len, &keying_material1));
+  TRY(otcrypto_kmac_kdf(&current_test_vector->key_derivation_key,
+                        current_test_vector->label,
+                        current_test_vector->context, &keying_material1));
+
+  // Export the derived blinded key
+  uint32_t km_share0[km_keyblob_share_len];
+  uint32_t km_share1[km_keyblob_share_len];
+  TRY(otcrypto_export_blinded_key(
+      &keying_material1,
+      (otcrypto_word32_buf_t){.data = km_share0, .len = ARRAYSIZE(km_share0)},
+      (otcrypto_word32_buf_t){.data = km_share1, .len = ARRAYSIZE(km_share1)}));
+
+  // Unmask the derived key
+  uint32_t first_key[km_key_len];
+  for (size_t i = 0; i < ARRAYSIZE(first_key); i++) {
+    first_key[i] = km_share0[i] ^ km_share1[i];
+  }
 
   // Run a SHA-3 operation in between the two KMAC operations.
   LOG_INFO("Running the intermediate SHA3 operation.");
-  TRY(get_sha3_mode(sha3_test_vector.security_strength, &digest_buf.mode));
-  TRY(otcrypto_hash(sha3_test_vector.input_msg, digest_buf));
+  switch (sha3_test_vector.security_strength) {
+    case 224:
+      TRY(otcrypto_sha3_224(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 256:
+      TRY(otcrypto_sha3_256(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 384:
+      TRY(otcrypto_sha3_384(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 512:
+      TRY(otcrypto_sha3_512(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    default:
+      LOG_INFO("Invalid security level for SHA3: %d bits",
+               sha3_test_vector.security_strength);
+      return INVALID_ARGUMENT();
+  }
 
   LOG_INFO("Running the second KDF-KMAC sideload operation for comparison.");
-  TRY(otcrypto_kdf_kmac(
-      current_test_vector->key_derivation_key, mode, current_test_vector->label,
-      current_test_vector->context, km_key_len, &keying_material2));
+  TRY(otcrypto_kmac_kdf(&current_test_vector->key_derivation_key,
+                        current_test_vector->label,
+                        current_test_vector->context, &keying_material2));
+
+  // Export the second derived blinded key
+  TRY(otcrypto_export_blinded_key(
+      &keying_material2,
+      (otcrypto_word32_buf_t){.data = km_share0, .len = ARRAYSIZE(km_share0)},
+      (otcrypto_word32_buf_t){.data = km_share1, .len = ARRAYSIZE(km_share1)}));
 
-  TRY_CHECK_ARRAYS_EQ((unsigned char *)keying_material1.keyblob,
-                      (unsigned char *)keying_material2.keyblob, km_key_len);
+  // Unmask the second derived key
+  uint32_t second_key[km_key_len];
+  for (size_t i = 0; i < ARRAYSIZE(second_key); i++) {
+    second_key[i] = km_share0[i] ^ km_share1[i];
+  }
+
+  TRY_CHECK_ARRAYS_EQ((unsigned char *)first_key, (unsigned char *)second_key,
+                      km_key_len);
   return OTCRYPTO_OK;
 }
 
@@ -426,12 +422,12 @@ bool test_main(void) {
   // Initialize keymgr and advance to CreatorRootKey state.
   dif_keymgr_t keymgr;
   dif_kmac_t kmac;
-  CHECK_STATUS_OK(keymgr_testutils_startup(&keymgr, &kmac));
+  CHECK_STATUS_OK(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  const char *state_name;
+  CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
 
-  CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
-  CHECK_STATUS_OK(keymgr_testutils_check_state(
-      &keymgr, kDifKeymgrStateOwnerIntermediateKey));
-  LOG_INFO("Keymgr entered OwnerIntKey State");
+  LOG_INFO("Keymgr entered %s State", state_name);
   LOG_INFO("Testing cryptolib KDF-KMAC driver with sideloaded key.");
 
   // Initialize the core with default parameters
diff --git a/sw/device/tests/crypto/kdf_set_testvectors.py b/sw/device/tests/crypto/kdf_set_testvectors.py
index e00e106d2bbec..4936727d8f073 100755
--- a/sw/device/tests/crypto/kdf_set_testvectors.py
+++ b/sw/device/tests/crypto/kdf_set_testvectors.py
@@ -69,7 +69,6 @@ def main() -> int:
         t["key_derivation_key"] = t["key"]
         t["context"] = t["input_msg"]
         t["label"] = t["cust_str"]
-        t["keying_material"] = t["digest"]
 
         if t["security_str"] == 128:
             t["test_operation"] = "kKdfTestOperationKmac128"
@@ -85,8 +84,7 @@ def main() -> int:
         t["keyblob"] += ["0x00000000"] * len(t["keyblob"])
 
         # Derived key material also needs to have word granularity
-        t["km_keyblob"] = str_to_hex_array(t["keying_material"], return_byte_array = False)
-        t["km_keyblob"] += ["0x00000000"] * len(t["km_keyblob"])
+        t["expected_output"] = str_to_hex_array(t["digest"], return_byte_array = False)
 
     args.headerfile.write(Template(args.template.read()).render(tests=testvecs))
     args.headerfile.close()
diff --git a/sw/device/tests/crypto/kdf_testvectors.h.tpl b/sw/device/tests/crypto/kdf_testvectors.h.tpl
index c5a5ea79b0e04..a48854e8e0df7 100644
--- a/sw/device/tests/crypto/kdf_testvectors.h.tpl
+++ b/sw/device/tests/crypto/kdf_testvectors.h.tpl
@@ -9,7 +9,7 @@
 #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_KDF_TESTVECTORS_H_
 
 #include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/kmac.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -30,7 +30,7 @@ typedef struct kdf_test_vector {
   otcrypto_blinded_key_t key_derivation_key;
   otcrypto_const_byte_buf_t label;
   otcrypto_const_byte_buf_t context;
-  otcrypto_blinded_key_t keying_material;
+  otcrypto_word32_buf_t expected_output;
 } kdf_kmac_test_vector_t;
 
 static kdf_kmac_test_vector_t kKdfTestVectors[${len(tests)}] = {
@@ -40,10 +40,12 @@ static kdf_kmac_test_vector_t kKdfTestVectors[${len(tests)}] = {
         .test_operation = ${t["test_operation"]},
         .key_derivation_key = {
             .config = {
+                .version = kOtcryptoLibVersion1,
                 .key_mode = ${"kOtcryptoKeyModeKdfKmac" + str(t["security_str"])},
                 .key_length = ${2 * len(t["keyblob"])},
                 .hw_backed = kHardenedBoolFalse,
                 .security_level = kOtcryptoKeySecurityLevelLow,
+                .exportable = kHardenedBoolTrue,
             },
             .keyblob_length = ${4 * len(t["keyblob"])},
             .keyblob = (uint32_t[]){
@@ -78,15 +80,11 @@ static kdf_kmac_test_vector_t kKdfTestVectors[${len(tests)}] = {
             .len = 0,
   % endif
         },
-        .keying_material = {
-            .config = {
-                .key_length = ${2 * len(t["km_keyblob"])},
-                .hw_backed = kHardenedBoolFalse,
-            },
-            .keyblob_length = ${4 * len(t["km_keyblob"])},
-            .keyblob = (uint32_t[]){
-      % for i in range(0, len(t["km_keyblob"]), 4):
-                ${', '.join(t["km_keyblob"][i:i + 4])},
+        .expected_output = {
+            .len = ${len(t["expected_output"])},
+            .data = (uint32_t[]){
+      % for i in range(0, len(t["expected_output"]), 4):
+                ${', '.join(t["expected_output"][i:i + 4])},
       % endfor
             },
         },
diff --git a/sw/device/tests/crypto/kmac_functest.c b/sw/device/tests/crypto/kmac_functest.c
index dd59dbe8f3751..58fd0ec14fc06 100644
--- a/sw/device/tests/crypto/kmac_functest.c
+++ b/sw/device/tests/crypto/kmac_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/drivers/kmac.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/kmac.h"
+#include "sw/device/lib/crypto/include/sha3.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -95,24 +95,93 @@ status_t get_sha3_mode(size_t security_strength, otcrypto_hash_mode_t *mode) {
 }
 
 /**
- * Get the mode for KMAC based on the security strength.
+ * Call SHA3 to compute the digest.
  *
- * @param security_str Security strength (in bits).
- * @param[out] mode KMAC mode enum value.
+ * Should only be called when `current_test_vector` is a SHA3 operation.
+ *
+ * @param[out] digest Computed digest.
+ * @return OK or error.
  */
-status_t get_kmac_mode(size_t security_strength, otcrypto_kmac_mode_t *mode) {
-  switch (security_strength) {
-    case 128:
-      *mode = kOtcryptoKmacModeKmac128;
+static status_t run_sha3(otcrypto_hash_digest_t *digest) {
+  switch (current_test_vector->security_strength) {
+    case 224:
+      return otcrypto_sha3_224(current_test_vector->input_msg, digest);
+    case 256:
+      return otcrypto_sha3_256(current_test_vector->input_msg, digest);
+    case 384:
+      return otcrypto_sha3_384(current_test_vector->input_msg, digest);
+    case 512:
+      return otcrypto_sha3_512(current_test_vector->input_msg, digest);
+    default:
       break;
+  }
+  LOG_ERROR("Invalid strength for SHA3: %d bits",
+            current_test_vector->security_strength);
+  return INVALID_ARGUMENT();
+}
+
+/**
+ * Call SHAKE to compute the digest.
+ *
+ * Should only be called when `current_test_vector` is a SHAKE operation.
+ *
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+static status_t run_shake(otcrypto_hash_digest_t *digest) {
+  switch (current_test_vector->security_strength) {
+    case 128:
+      return otcrypto_shake128(current_test_vector->input_msg, digest);
     case 256:
-      *mode = kOtcryptoKmacModeKmac256;
+      return otcrypto_shake256(current_test_vector->input_msg, digest);
+    default:
       break;
+  }
+  LOG_ERROR("Invalid strength for SHAKE: %d bits",
+            current_test_vector->security_strength);
+  return INVALID_ARGUMENT();
+}
+
+/**
+ * Call cSHAKE to compute the digest.
+ *
+ * Should only be called when `current_test_vector` is a cSHAKE operation.
+ *
+ * @param[out] digest Computed digest.
+ * @return OK or error.
+ */
+static status_t run_cshake(otcrypto_hash_digest_t *digest) {
+  switch (current_test_vector->security_strength) {
+    case 128:
+      return otcrypto_cshake128(current_test_vector->input_msg,
+                                current_test_vector->func_name,
+                                current_test_vector->cust_str, digest);
+    case 256:
+      return otcrypto_cshake256(current_test_vector->input_msg,
+                                current_test_vector->func_name,
+                                current_test_vector->cust_str, digest);
     default:
-      LOG_INFO("Invalid size for KMAC: %d bits", security_strength);
-      return INVALID_ARGUMENT();
+      break;
   }
-  return OK_STATUS();
+  LOG_ERROR("Invalid strength for cSHAKE: %d bits",
+            current_test_vector->security_strength);
+  return INVALID_ARGUMENT();
+}
+
+/**
+ * Call KMAC to compute the authentication tag.
+ *
+ * Should only be called when `current_test_vector` is a KMAC operation.
+ *
+ * @param[out] tag Computed tag (digest).
+ * @return OK or error.
+ */
+static status_t run_kmac(otcrypto_word32_buf_t tag) {
+  current_test_vector->key.checksum =
+      integrity_blinded_checksum(&current_test_vector->key);
+  return otcrypto_kmac(
+      &current_test_vector->key, current_test_vector->input_msg,
+      current_test_vector->cust_str, current_test_vector->digest.len, tag);
 }
 
 /**
@@ -123,46 +192,31 @@ static status_t run_test_vector(void) {
   if (current_test_vector->digest.len % sizeof(uint32_t) != 0) {
     digest_num_words++;
   }
-  uint32_t digest[digest_num_words];
-  otcrypto_hash_digest_t digest_buf = {
-      .data = digest,
+  uint32_t digest_data[digest_num_words];
+  otcrypto_hash_digest_t digest = {
+      .data = digest_data,
       .len = digest_num_words,
   };
 
   switch (current_test_vector->test_operation) {
     case kKmacTestOperationShake: {
-      TRY(get_shake_mode(current_test_vector->security_strength,
-                         &digest_buf.mode));
-      TRY(otcrypto_xof_shake(current_test_vector->input_msg, digest_buf));
+      run_shake(&digest);
       break;
     }
     case kKmacTestOperationCshake: {
-      TRY(get_cshake_mode(current_test_vector->security_strength,
-                          &digest_buf.mode));
-      TRY(otcrypto_xof_cshake(current_test_vector->input_msg,
-                              current_test_vector->func_name,
-                              current_test_vector->cust_str, digest_buf));
+      run_cshake(&digest);
       break;
     }
     case kKmacTestOperationSha3: {
-      TRY(get_sha3_mode(current_test_vector->security_strength,
-                        &digest_buf.mode));
-      TRY(otcrypto_hash(current_test_vector->input_msg, digest_buf));
+      run_sha3(&digest);
       break;
     }
     case kKmacTestOperationKmac: {
-      current_test_vector->key.checksum =
-          integrity_blinded_checksum(&current_test_vector->key);
-      otcrypto_kmac_mode_t mode;
-      TRY(get_kmac_mode(current_test_vector->security_strength, &mode));
       otcrypto_word32_buf_t tag_buf = {
-          .data = digest_buf.data,
-          .len = digest_buf.len,
+          .data = digest.data,
+          .len = digest.len,
       };
-      TRY(otcrypto_kmac(&current_test_vector->key,
-                        current_test_vector->input_msg, mode,
-                        current_test_vector->cust_str,
-                        current_test_vector->digest.len, tag_buf));
+      run_kmac(tag_buf);
       break;
     }
     default: {
@@ -172,7 +226,7 @@ static status_t run_test_vector(void) {
     }
   }
 
-  TRY_CHECK_ARRAYS_EQ((unsigned char *)digest_buf.data,
+  TRY_CHECK_ARRAYS_EQ((unsigned char *)digest.data,
                       current_test_vector->digest.data,
                       current_test_vector->digest.len);
   return OTCRYPTO_OK;
diff --git a/sw/device/tests/crypto/kmac_sideload_functest.c b/sw/device/tests/crypto/kmac_sideload_functest.c
index d6ba2f132f6fa..41708f97142b8 100644
--- a/sw/device/tests/crypto/kmac_sideload_functest.c
+++ b/sw/device/tests/crypto/kmac_sideload_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/drivers/kmac.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/kmac.h"
+#include "sw/device/lib/crypto/include/sha3.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -15,6 +15,11 @@
 
 #define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
+enum {
+  // Size of the KMAC hardware's sideload slot.
+  kKmacSideloadKeyLengthBytes = 256 / 8,
+};
+
 // Most fields of the following structs are not used during sideload testing
 // but they are copied over from KMAC testing for consistency. Later, we can
 // merge the sideload and non-sideload testing if required. Normally, these two
@@ -48,8 +53,9 @@ static kmac_test_vector_t kKmacTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKmac128,
-                        .key_length = kKmacSideloadKeyLength / 8,
+                        .key_length = kKmacSideloadKeyLengthBytes,
                         .hw_backed = kHardenedBoolTrue,
                         .exportable = kHardenedBoolFalse,
                         .security_level = kOtcryptoKeySecurityLevelHigh,
@@ -57,7 +63,7 @@ static kmac_test_vector_t kKmacTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x00000001,
+                        0x00000000,
                         0x47464544,
                         0x4b4a4948,
                         0x4f4e4d4c,
@@ -103,8 +109,9 @@ static kmac_test_vector_t kKmacTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKmac256,
-                        .key_length = kKmacSideloadKeyLength / 8,
+                        .key_length = kKmacSideloadKeyLengthBytes,
                         .hw_backed = kHardenedBoolTrue,
                         .exportable = kHardenedBoolFalse,
                         .security_level = kOtcryptoKeySecurityLevelHigh,
@@ -112,7 +119,7 @@ static kmac_test_vector_t kKmacTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x00000002,
+                        0x00000000,
                         0x11111111,
                         0x4b4a4948,
                         0x4f4e4d4c,
@@ -182,8 +189,9 @@ static kmac_test_vector_t kKmacTestVectors[] = {
             {
                 .config =
                     {
+                        .version = kOtcryptoLibVersion1,
                         .key_mode = kOtcryptoKeyModeKmac128,
-                        .key_length = kKmacSideloadKeyLength / 8,
+                        .key_length = kKmacSideloadKeyLengthBytes,
                         .hw_backed = kHardenedBoolTrue,
                         .exportable = kHardenedBoolFalse,
                         .security_level = kOtcryptoKeySecurityLevelHigh,
@@ -191,7 +199,7 @@ static kmac_test_vector_t kKmacTestVectors[] = {
                 .keyblob_length = 32,
                 .keyblob =
                     (uint32_t[]){
-                        0x00000001,
+                        0x00000000,
                         0x00000000,
                         0x00000000,
                         0x00000000,
@@ -260,54 +268,6 @@ static kmac_test_vector_t sha3_test_vector = {
 // Global pointer to the current test vector.
 static kmac_test_vector_t *current_test_vector = NULL;
 
-/**
- * Get the mode for SHA3 based on the security strength.
- *
- * @param security_str Security strength (in bits).
- * @param[out] mode Hash mode enum value.
- */
-status_t get_sha3_mode(size_t security_strength, otcrypto_hash_mode_t *mode) {
-  switch (security_strength) {
-    case 224:
-      *mode = kOtcryptoHashModeSha3_224;
-      break;
-    case 256:
-      *mode = kOtcryptoHashModeSha3_256;
-      break;
-    case 384:
-      *mode = kOtcryptoHashModeSha3_384;
-      break;
-    case 512:
-      *mode = kOtcryptoHashModeSha3_512;
-      break;
-    default:
-      LOG_INFO("Invalid size for SHA3: %d bits", security_strength);
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS();
-}
-
-/**
- * Get the mode for KMAC based on the security strength.
- *
- * @param security_str Security strength (in bits).
- * @param[out] mode KMAC mode enum value.
- */
-status_t get_kmac_mode(size_t security_strength, otcrypto_kmac_mode_t *mode) {
-  switch (security_strength) {
-    case 128:
-      *mode = kOtcryptoKmacModeKmac128;
-      break;
-    case 256:
-      *mode = kOtcryptoKmacModeKmac256;
-      break;
-    default:
-      LOG_INFO("Invalid size for KMAC: %d bits", security_strength);
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS();
-}
-
 /**
  * Run the test pointed to by `current_test_vector`.
  */
@@ -322,9 +282,6 @@ static status_t run_test_vector(void) {
   current_test_vector->key.checksum =
       integrity_blinded_checksum(&current_test_vector->key);
 
-  otcrypto_kmac_mode_t mode;
-  TRY(get_kmac_mode(current_test_vector->security_strength, &mode));
-
   otcrypto_word32_buf_t tag_buf1 = {
       .data = digest1,
       .len = ARRAYSIZE(digest1),
@@ -347,23 +304,39 @@ static status_t run_test_vector(void) {
 
   LOG_INFO("Running the first KMAC sideload operation.");
   TRY(otcrypto_kmac(&current_test_vector->key, current_test_vector->input_msg,
-                    mode, current_test_vector->cust_str,
+                    current_test_vector->cust_str,
                     current_test_vector->digest.len, tag_buf1));
 
   // Run a SHA-3 operation in between the two KMAC operations.
   LOG_INFO("Running the intermediate SHA3 operation.");
-  TRY(get_sha3_mode(sha3_test_vector.security_strength, &digest_buf.mode));
-  TRY(otcrypto_hash(sha3_test_vector.input_msg, digest_buf));
+  switch (sha3_test_vector.security_strength) {
+    case 224:
+      TRY(otcrypto_sha3_224(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 256:
+      TRY(otcrypto_sha3_256(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 384:
+      TRY(otcrypto_sha3_384(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    case 512:
+      TRY(otcrypto_sha3_512(sha3_test_vector.input_msg, &digest_buf));
+      break;
+    default:
+      LOG_INFO("Invalid security level for SHA3: %d bits",
+               sha3_test_vector.security_strength);
+      return INVALID_ARGUMENT();
+  }
 
   LOG_INFO("Running the second KMAC sideload operation for comparison.");
   TRY(otcrypto_kmac(&current_test_vector->key, current_test_vector->input_msg,
-                    mode, current_test_vector->cust_str,
+                    current_test_vector->cust_str,
                     current_test_vector->digest.len, tag_buf2));
 
   TRY_CHECK_ARRAYS_EQ((unsigned char *)tag_buf1.data,
                       (unsigned char *)tag_buf2.data,
                       current_test_vector->digest.len);
-  return OTCRYPTO_OK;
+  return OK_STATUS();
 }
 
 OTTF_DEFINE_TEST_CONFIG();
@@ -371,12 +344,12 @@ bool test_main(void) {
   // Initialize keymgr and advance to CreatorRootKey state.
   dif_keymgr_t keymgr;
   dif_kmac_t kmac;
-  CHECK_STATUS_OK(keymgr_testutils_startup(&keymgr, &kmac));
+  CHECK_STATUS_OK(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  const char *state_name;
+  CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
 
-  CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
-  CHECK_STATUS_OK(keymgr_testutils_check_state(
-      &keymgr, kDifKeymgrStateOwnerIntermediateKey));
-  LOG_INFO("Keymgr entered OwnerIntKey State");
+  LOG_INFO("Keymgr entered %s State", state_name);
   LOG_INFO("Testing cryptolib KMAC driver with sideloaded key.");
 
   // Initialize the core with default parameters
diff --git a/sw/device/tests/crypto/kmac_testvectors.h.tpl b/sw/device/tests/crypto/kmac_testvectors.h.tpl
index b45a1ad3c9043..5f7813be14492 100644
--- a/sw/device/tests/crypto/kmac_testvectors.h.tpl
+++ b/sw/device/tests/crypto/kmac_testvectors.h.tpl
@@ -9,7 +9,7 @@
 #define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_KMAC_TESTVECTORS_H_
 
 #include "sw/device/lib/crypto/drivers/kmac.h"
-#include "sw/device/lib/crypto/include/mac.h"
+#include "sw/device/lib/crypto/include/kmac.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -47,9 +47,12 @@ static kmac_test_vector_t kKmacTestVectors[${len(tests)}] = {
   % if "key" in t:
         .key = {
             .config = {
+                .version = kOtcryptoLibVersion1,
                 .key_mode = ${"kOtcryptoKeyModeKmac" + str(t["security_str"])},
                 .key_length = ${t["key_len"]},
                 .hw_backed = kHardenedBoolFalse,
+                .security_level = kOtcryptoKeySecurityLevelLow,
+                .exportable = kHardenedBoolTrue,
             },
             .keyblob_length = ${4 * len(t["keyblob"])},
             .keyblob = (uint32_t[]){
diff --git a/sw/device/tests/crypto/otcrypto_export_test.c b/sw/device/tests/crypto/otcrypto_export_test.c
index 637f201084792..89c5035dc85f6 100644
--- a/sw/device/tests/crypto/otcrypto_export_test.c
+++ b/sw/device/tests/crypto/otcrypto_export_test.c
@@ -51,9 +51,8 @@ enum {
 
 int32_t hash_test(void) {
   uint32_t digest_content[kHashLength];
-  otcrypto_hash_context_t ctx;
+  otcrypto_sha2_context_t ctx;
   otcrypto_hash_digest_t digest = {
-      .mode = kOtcryptoHashModeSha256,
       .len = kHashLength,
       .data = digest_content,
   };
@@ -62,9 +61,9 @@ int32_t hash_test(void) {
       .data = (const uint8_t *)kGettysburgPrelude,
   };
 
-  RETURN_IF_ERROR(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha256));
-  RETURN_IF_ERROR(otcrypto_hash_update(&ctx, buf));
-  RETURN_IF_ERROR(otcrypto_hash_final(&ctx, digest));
+  RETURN_IF_ERROR(otcrypto_sha2_init(kOtcryptoHashModeSha256, &ctx));
+  RETURN_IF_ERROR(otcrypto_sha2_update(&ctx, buf));
+  RETURN_IF_ERROR(otcrypto_sha2_final(&ctx, &digest));
 
   if (memcmp(digest.data, kGettysburgDigest, sizeof(kGettysburgDigest)) != 0) {
     return -1;
diff --git a/sw/device/tests/crypto/otcrypto_hash_test.c b/sw/device/tests/crypto/otcrypto_hash_test.c
index 6d94c70839000..b6c9d3465397a 100644
--- a/sw/device/tests/crypto/otcrypto_hash_test.c
+++ b/sw/device/tests/crypto/otcrypto_hash_test.c
@@ -7,7 +7,7 @@
 
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
@@ -35,9 +35,8 @@ static const uint8_t kGettysburgDigest[] = {
 
 status_t hash_test(void) {
   uint32_t digest_content[8];
-  otcrypto_hash_context_t ctx;
+  otcrypto_sha2_context_t ctx;
   otcrypto_hash_digest_t digest = {
-      .mode = kOtcryptoHashModeSha256,
       .len = ARRAYSIZE(digest_content),
       .data = digest_content,
   };
@@ -46,12 +45,13 @@ status_t hash_test(void) {
       .data = (const uint8_t *)kGettysburgPrelude,
   };
 
-  TRY(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha256));
-  TRY(otcrypto_hash_update(&ctx, buf));
-  TRY(otcrypto_hash_final(&ctx, digest));
+  TRY(otcrypto_sha2_init(kOtcryptoHashModeSha256, &ctx));
+  TRY(otcrypto_sha2_update(&ctx, buf));
+  TRY(otcrypto_sha2_final(&ctx, &digest));
 
   TRY_CHECK_ARRAYS_EQ((const uint8_t *)digest.data, kGettysburgDigest,
                       ARRAYSIZE(kGettysburgDigest));
+  TRY_CHECK(digest.mode == kOtcryptoHashModeSha256);
   return OK_STATUS();
 }
 
diff --git a/sw/device/tests/crypto/rsa_2048_encryption_functest.c b/sw/device/tests/crypto/rsa_2048_encryption_functest.c
index 2f4289b941443..a6cf15703dc8a 100644
--- a/sw/device/tests/crypto/rsa_2048_encryption_functest.c
+++ b/sw/device/tests/crypto/rsa_2048_encryption_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -50,7 +50,6 @@ static uint32_t kTestPrivateExponent[kRsa2048NumWords] = {
     0xcaa6815c, 0x08ca0fd3, 0x8f996093, 0x30b7c446, 0xf69b11f7, 0xa298dd00,
     0xfd4e8120, 0x059df602, 0x25feb268, 0x0f3f749e,
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -113,7 +112,7 @@ static status_t run_rsa_2048_encrypt(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize2048, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
@@ -132,7 +131,7 @@ static status_t run_rsa_2048_encrypt(const uint8_t *msg, size_t msg_len,
 /**
  * Helper function to run the RSA-2048 decryption routine.
  *
- * Packages input into cryptolib-style structs and calls `otcrypto_rsa_encrypt`
+ * Packages input into cryptolib-style structs and calls `otcrypto_rsa_decrypt`
  * using the constant test private key.
  *
  * The caller must allocate enough space at `msg` for the maximum message
@@ -180,9 +179,8 @@ static status_t run_rsa_2048_decrypt(const uint8_t *label, size_t label_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize2048, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize2048, modulus, d_share0, d_share1, &private_key));
 
   otcrypto_byte_buf_t plaintext_buf = {.data = msg, .len = kMaxPlaintextBytes};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
diff --git a/sw/device/tests/crypto/rsa_2048_key_from_cofactor_functest.c b/sw/device/tests/crypto/rsa_2048_key_from_cofactor_functest.c
index 7b090eb5a27e8..d2728705938ec 100644
--- a/sw/device/tests/crypto/rsa_2048_key_from_cofactor_functest.c
+++ b/sw/device/tests/crypto/rsa_2048_key_from_cofactor_functest.c
@@ -49,7 +49,6 @@ static uint32_t kTestPrivateExponent[kRsa2048NumWords] = {
     0xcaa6815c, 0x08ca0fd3, 0x8f996093, 0x30b7c446, 0xf69b11f7, 0xa298dd00,
     0xfd4e8120, 0x059df602, 0x25feb268, 0x0f3f749e,
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Key mode for testing.
 static otcrypto_key_mode_t kTestKeyMode = kOtcryptoKeyModeRsaSignPss;
@@ -131,9 +130,9 @@ static status_t run_key_from_cofactor(const uint32_t *cofactor) {
 
   // Construct the RSA key pair using the cofactor.
   uint64_t t_start = profile_start();
-  TRY(otcrypto_rsa_keypair_from_cofactor(
-      kOtcryptoRsaSize2048, modulus, kTestPublicExponent, cofactor_share0,
-      cofactor_share1, &public_key, &private_key));
+  TRY(otcrypto_rsa_keypair_from_cofactor(kOtcryptoRsaSize2048, modulus,
+                                         cofactor_share0, cofactor_share1,
+                                         &public_key, &private_key));
   profile_end_and_print(t_start, "RSA keypair from cofactor");
 
   // Interpret the private key and ensure the private exponent matches the
@@ -141,7 +140,7 @@ static status_t run_key_from_cofactor(const uint32_t *cofactor) {
   // keyblobs, and will need to be updated if the representation changes.
   TRY_CHECK(private_key.keyblob_length == sizeof(rsa_2048_private_key_t));
   rsa_2048_private_key_t *sk = (rsa_2048_private_key_t *)private_key.keyblob;
-  TRY_CHECK_ARRAYS_EQ(sk->d.data, kTestPrivateExponent,
+  TRY_CHECK_ARRAYS_EQ(sk->d0.data, kTestPrivateExponent,
                       ARRAYSIZE(kTestPrivateExponent));
 
   // Check the other values too, just to be safe.
@@ -149,7 +148,6 @@ static status_t run_key_from_cofactor(const uint32_t *cofactor) {
   TRY_CHECK(public_key.key_length == sizeof(rsa_2048_public_key_t));
   rsa_2048_public_key_t *pk = (rsa_2048_public_key_t *)public_key.key;
   TRY_CHECK_ARRAYS_EQ(pk->n.data, kTestModulus, ARRAYSIZE(kTestModulus));
-  TRY_CHECK(pk->e == kTestPublicExponent);
   return OK_STATUS();
 }
 
diff --git a/sw/device/tests/crypto/rsa_2048_keygen_functest.c b/sw/device/tests/crypto/rsa_2048_keygen_functest.c
index 9dc7d527b90e3..6680e8242ca31 100644
--- a/sw/device/tests/crypto/rsa_2048_keygen_functest.c
+++ b/sw/device/tests/crypto/rsa_2048_keygen_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -66,9 +66,6 @@ status_t keygen_then_sign_test(void) {
   TRY_CHECK(private_key.keyblob_length == sizeof(rsa_2048_private_key_t));
   rsa_2048_private_key_t *sk = (rsa_2048_private_key_t *)private_key.keyblob;
 
-  // Check that the key uses the F4 exponent.
-  TRY_CHECK(pk->e == 65537);
-
   // Check that the moduli match.
   TRY_CHECK(ARRAYSIZE(pk->n.data) == ARRAYSIZE(sk->n.data));
   TRY_CHECK_ARRAYS_EQ(pk->n.data, sk->n.data, ARRAYSIZE(pk->n.data));
@@ -77,7 +74,7 @@ status_t keygen_then_sign_test(void) {
   // ensuring that the most significant half is nonzero.
   bool d_large_enough = false;
   for (size_t i = kRsa2048NumWords / 2; i < kRsa2048NumWords; i++) {
-    if (sk->d.data[i] != 0) {
+    if ((sk->d0.data[i] ^ sk->d1.data[i]) != 0) {
       d_large_enough = true;
     }
   }
@@ -86,13 +83,12 @@ status_t keygen_then_sign_test(void) {
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = kTestMessage,
                                        .len = kTestMessageLen};
-  uint32_t msg_digest_data[kSha256DigestWords];
+  uint32_t msg_digest_data[256 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha256,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
 
   uint32_t sig[kRsa2048NumWords];
   otcrypto_word32_buf_t sig_buf = {
diff --git a/sw/device/tests/crypto/rsa_2048_signature_functest.c b/sw/device/tests/crypto/rsa_2048_signature_functest.c
index e275efcca8bff..3c258f2f5eaa6 100644
--- a/sw/device/tests/crypto/rsa_2048_signature_functest.c
+++ b/sw/device/tests/crypto/rsa_2048_signature_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -50,7 +50,6 @@ static uint32_t kTestPrivateExponent[kRsa2048NumWords] = {
     0xcaa6815c, 0x08ca0fd3, 0x8f996093, 0x30b7c446, 0xf69b11f7, 0xa298dd00,
     0xfd4e8120, 0x059df602, 0x25feb268, 0x0f3f749e,
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -147,19 +146,17 @@ static status_t run_rsa_2048_sign(const uint8_t *msg, size_t msg_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize2048, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize2048, modulus, d_share0, d_share1, &private_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
-  uint32_t msg_digest_data[kSha256DigestWords];
+  uint32_t msg_digest_data[256 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha256,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
 
   otcrypto_word32_buf_t sig_buf = {
       .data = sig,
@@ -215,17 +212,16 @@ static status_t run_rsa_2048_verify(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize2048, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
-  uint32_t msg_digest_data[kSha256DigestWords];
+  uint32_t msg_digest_data[256 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha256,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
 
   otcrypto_const_word32_buf_t sig_buf = {
       .data = sig,
diff --git a/sw/device/tests/crypto/rsa_3072_encryption_functest.c b/sw/device/tests/crypto/rsa_3072_encryption_functest.c
index 26d3bef5080f0..fd51cdda21f4c 100644
--- a/sw/device/tests/crypto/rsa_3072_encryption_functest.c
+++ b/sw/device/tests/crypto/rsa_3072_encryption_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -67,7 +67,6 @@ static uint32_t kTestPrivateExponent[kRsa3072NumWords] = {
     0x31837e6a, 0xb02d0228, 0x9be7eb6e, 0xe1746942, 0xb6b48e76, 0xbf8c79d3,
     0xd81b2383, 0x9e277621, 0x8c4ca670, 0xcfa2b928, 0xd60f0279, 0x2e1fdefe,
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -135,7 +134,7 @@ static status_t run_rsa_3072_encrypt(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize3072, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
@@ -202,9 +201,8 @@ static status_t run_rsa_3072_decrypt(const uint8_t *label, size_t label_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize3072, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize3072, modulus, d_share0, d_share1, &private_key));
 
   otcrypto_byte_buf_t plaintext_buf = {.data = msg, .len = kMaxPlaintextBytes};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
diff --git a/sw/device/tests/crypto/rsa_3072_keygen_functest.c b/sw/device/tests/crypto/rsa_3072_keygen_functest.c
index 2fcbe68d39bbf..ae94f6d768933 100644
--- a/sw/device/tests/crypto/rsa_3072_keygen_functest.c
+++ b/sw/device/tests/crypto/rsa_3072_keygen_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -66,9 +66,6 @@ status_t keygen_then_sign_test(void) {
   TRY_CHECK(private_key.keyblob_length == sizeof(rsa_3072_private_key_t));
   rsa_3072_private_key_t *sk = (rsa_3072_private_key_t *)private_key.keyblob;
 
-  // Check that the key uses the F4 exponent.
-  TRY_CHECK(pk->e == 65537);
-
   // Check that the moduli match.
   TRY_CHECK(ARRAYSIZE(pk->n.data) == ARRAYSIZE(sk->n.data));
   TRY_CHECK_ARRAYS_EQ(pk->n.data, sk->n.data, ARRAYSIZE(pk->n.data));
@@ -77,7 +74,7 @@ status_t keygen_then_sign_test(void) {
   // ensuring that the most significant half is nonzero.
   bool d_large_enough = false;
   for (size_t i = kRsa3072NumWords / 2; i < kRsa3072NumWords; i++) {
-    if (sk->d.data[i] != 0) {
+    if ((sk->d0.data[i] ^ sk->d1.data[i]) != 0) {
       d_large_enough = true;
     }
   }
@@ -88,13 +85,12 @@ status_t keygen_then_sign_test(void) {
       .len = kTestMessageLen,
       .data = kTestMessage,
   };
-  uint32_t msg_digest_data[kSha512DigestWords];
+  uint32_t msg_digest_data[512 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   uint32_t sig[kRsa3072NumWords];
   otcrypto_word32_buf_t sig_buf = {
diff --git a/sw/device/tests/crypto/rsa_3072_signature_functest.c b/sw/device/tests/crypto/rsa_3072_signature_functest.c
index 2005a7695ef04..e477ca3090dd5 100644
--- a/sw/device/tests/crypto/rsa_3072_signature_functest.c
+++ b/sw/device/tests/crypto/rsa_3072_signature_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -16,6 +16,7 @@
 #define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
 enum {
+  kSha512DigestWords = 512 / 32,
   kRsa3072NumBytes = 3072 / 8,
   kRsa3072NumWords = kRsa3072NumBytes / sizeof(uint32_t),
 };
@@ -67,7 +68,6 @@ static uint32_t kTestPrivateExponent[kRsa3072NumWords] = {
     0x31837e6a, 0xb02d0228, 0x9be7eb6e, 0xe1746942, 0xb6b48e76, 0xbf8c79d3,
     0xd81b2383, 0x9e277621, 0x8c4ca670, 0xcfa2b928, 0xd60f0279, 0x2e1fdefe,
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -173,9 +173,8 @@ static status_t run_rsa_3072_sign(const uint8_t *msg, size_t msg_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize3072, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize3072, modulus, d_share0, d_share1, &private_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
@@ -183,9 +182,8 @@ static status_t run_rsa_3072_sign(const uint8_t *msg, size_t msg_len,
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   otcrypto_word32_buf_t sig_buf = {
       .data = sig,
@@ -242,7 +240,7 @@ static status_t run_rsa_3072_verify(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize3072, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
@@ -250,9 +248,8 @@ static status_t run_rsa_3072_verify(const uint8_t *msg, size_t msg_len,
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   otcrypto_const_word32_buf_t sig_buf = {
       .data = sig,
diff --git a/sw/device/tests/crypto/rsa_3072_verify_functest.c b/sw/device/tests/crypto/rsa_3072_verify_functest.c
deleted file mode 100644
index f3fb2dea5b6f0..0000000000000
--- a/sw/device/tests/crypto/rsa_3072_verify_functest.c
+++ /dev/null
@@ -1,98 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-// The autogen rule that creates this header creates it in a directory named
-// after the rule, then manipulates the include path in the
-// cc_compilation_context to include that directory, so the compiler will find
-// the version of this file matching the Bazel rule under test.
-#include "rsa_3072_verify_testvectors.h"
-
-status_t rsa_3072_verify_test(const rsa_3072_verify_test_vector_t *testvec) {
-  // Encode message
-  rsa_3072_int_t encodedMessage;
-  CHECK_STATUS_OK(
-      rsa_3072_encode_sha256(testvec->msg, testvec->msgLen, &encodedMessage));
-
-  // Precompute Montgomery constants
-  rsa_3072_constants_t constants;
-  TRY(rsa_3072_compute_constants(&testvec->publicKey, &constants));
-
-  // Attempt to verify signature
-  hardened_bool_t result;
-  status_t err = rsa_3072_verify(&testvec->signature, &encodedMessage,
-                                 &testvec->publicKey, &constants, &result);
-
-  if (testvec->valid) {
-    // Return the error value if not OK.
-    TRY(err);
-    // Check result.
-    if (result != kHardenedBoolTrue) {
-      LOG_ERROR("Valid signature failed verification.");
-      return OTCRYPTO_RECOV_ERR;
-    }
-  } else {
-    // Signature is expected to be invalid.
-    if (result != kHardenedBoolFalse) {
-      LOG_ERROR("Invalid signature passed verification.");
-      return OTCRYPTO_RECOV_ERR;
-    }
-    // Error code may be OK or BAD_ARGS, but other errors indicate a problem.
-    if (!status_ok(err) && err.value != kOtcryptoStatusValueBadArgs) {
-      LOG_ERROR("Unexpected error on invalid signature: %r.", err);
-      return err;
-    }
-  }
-
-  return OTCRYPTO_OK;
-}
-
-OTTF_DEFINE_TEST_CONFIG();
-
-bool test_main(void) {
-  // Stays true only if all tests pass.
-  bool result = true;
-
-  // Set entropy complex to auto mode.
-  CHECK_STATUS_OK(entropy_complex_init());
-
-  // The definition of `RULE_NAME` comes from the autogen Bazel rule.
-  LOG_INFO("Starting rsa_3072_verify_test:%s", RULE_NAME);
-  for (uint32_t i = 0; i < RSA_3072_VERIFY_NUM_TESTS; i++) {
-    LOG_INFO("Starting rsa_3072_verify_test on test vector %d of %d...", i + 1,
-             RSA_3072_VERIFY_NUM_TESTS);
-
-    // Extract test vector and check for unsupported exponents (e.g. 3); these
-    // signatures are expected to fail verification, so mark them invalid.
-    rsa_3072_verify_test_vector_t testvec = rsa_3072_verify_tests[i];
-    if (testvec.publicKey.e != 65537) {
-      testvec.valid = false;
-    }
-
-    // Run test and print out result.
-    status_t err = rsa_3072_verify_test(&testvec);
-    if (status_ok(err)) {
-      LOG_INFO("Finished rsa_3072_verify_test on test vector %d : ok", i + 1);
-    } else {
-      LOG_ERROR("Finished rsa_3072_verify_test on test vector %d : error %r",
-                i + 1, err);
-      // For help with debugging, print the OTBN error bits, instruction
-      // count, and test vector notes.
-      LOG_INFO("OTBN error bits: 0x%08x", otbn_err_bits_get());
-      LOG_INFO("OTBN instruction count: 0x%08x", otbn_instruction_count_get());
-      LOG_INFO("Test notes: %s", testvec.comment);
-      result = false;
-    }
-  }
-  LOG_INFO("Finished rsa_3072_verify_test:%s", RULE_NAME);
-
-  return result;
-}
diff --git a/sw/device/tests/crypto/rsa_3072_verify_gen_random_testvectors.py b/sw/device/tests/crypto/rsa_3072_verify_gen_random_testvectors.py
deleted file mode 100755
index 93e1fa0699aa1..0000000000000
--- a/sw/device/tests/crypto/rsa_3072_verify_gen_random_testvectors.py
+++ /dev/null
@@ -1,95 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import argparse
-import random
-import sys
-
-import hjson
-from Crypto.Hash import SHA256
-from Crypto.PublicKey import RSA
-from Crypto.Signature import pkcs1_15
-
-
-def gen_random_test(key, idx):
-    # Generate a random message with length between 0 and 1000 bytes
-    msg_len = random.randint(0, 1000)
-    msg_bytes = random.randbytes(msg_len)
-    msg = int.from_bytes(msg_bytes, byteorder='big')
-
-    # Decide randomly whether to generate a valid or invalid signature
-    valid = random.choice([True, False])
-
-    if valid:
-        h = SHA256.new(msg_bytes)
-        signature_bytes = pkcs1_15.new(key).sign(h)
-    else:
-        # Generate a random 3072-bit signature
-        signature_bytes = random.randbytes(int(3072 / 8))
-        comment = 'Randomly-generated test vector (id={}) with invalid signature'.format(
-            idx)
-
-    signature = int.from_bytes(signature_bytes, byteorder='big')
-
-    testvec = {
-        'n': key.n,
-        'e': key.e,
-        'msg': msg,
-        'msg_len': msg_len,
-        'signature': signature,
-        'valid': valid,
-    }
-
-    # Set the comment to print the whole test vector (so failures can be
-    # replicated)
-    comment = 'Randomly-generated test vector (id={}):'.format(idx)
-    comment += ', '.join('{}: {}'.format(k, v) for k, v in testvec.items())
-    testvec['comment'] = comment
-
-    return testvec
-
-
-def main():
-    parser = argparse.ArgumentParser()
-    parser.add_argument('--verbose', action='store_true')
-    parser.add_argument('n',
-                        type=int,
-                        help='Number of random test vectors to generate.')
-    parser.add_argument('--tests-per-key',
-                        metavar='num',
-                        type=int,
-                        required=False,
-                        default=5,
-                        help='Number of test vectors to generate per key '
-                        'generation (default=5). Increase for faster test '
-                        'generation, and decrease for more coverage.')
-    parser.add_argument('outfile',
-                        metavar='FILE',
-                        type=argparse.FileType('w'),
-                        help='Write output to this file.')
-
-    args = parser.parse_args()
-
-    random.seed()
-    testvecs = []
-    key = None
-    for i in range(args.n):
-        if args.verbose:
-            print('Generating test case {}'.format(i))
-
-        if i % args.tests_per_key == 0:
-            # Generate a new RSA key
-            key = RSA.generate(3072, e=65537)
-
-        testvecs.append(gen_random_test(key, i))
-
-    hjson.dump(testvecs, args.outfile)
-    args.outfile.close()
-
-    return 0
-
-
-if __name__ == '__main__':
-    sys.exit(main())
diff --git a/sw/device/tests/crypto/rsa_3072_verify_set_testvectors.py b/sw/device/tests/crypto/rsa_3072_verify_set_testvectors.py
deleted file mode 100755
index fcd0b00d4ffff..0000000000000
--- a/sw/device/tests/crypto/rsa_3072_verify_set_testvectors.py
+++ /dev/null
@@ -1,75 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import argparse
-import sys
-
-import hjson
-from mako.template import Template
-
-'''
-Read in a JSON test vector file, convert the test vector to C constants, and
-generate a header file with these test vectors.
-'''
-
-# Number of 32-bit words in a 3072-bit number
-RSA_3072_NUMWORDS = int(3072 / 32)
-
-
-def rsa_3072_int_to_hexwords(x):
-    '''Convert a 3072-bit integer to a list of 32-bit integers (little-endian).'''
-    out = []
-    for _ in range(RSA_3072_NUMWORDS):
-        out.append(x & ((1 << 32) - 1))
-        x >>= 32
-    # Note: some test sets may contain (invalid) signatures that are > 3072
-    # words. The type signature of our RSA-3072 implementation rules out
-    # getting the full value as input, so they are truncated here.
-    return ['{:#010x}'.format(w) for w in out]
-
-
-def main() -> int:
-    parser = argparse.ArgumentParser()
-    parser.add_argument('--hjsonfile', '-j',
-                        metavar='FILE',
-                        required=True,
-                        type=argparse.FileType('r'),
-                        help='Read test vectors from this HJSON file.')
-    parser.add_argument('--template', '-t',
-                        metavar='FILE',
-                        required=True,
-                        type=argparse.FileType('r'),
-                        help='Read header template from this file.')
-    parser.add_argument('--headerfile', '-o',
-                        metavar='FILE',
-                        required=True,
-                        type=argparse.FileType('w'),
-                        help='Write output to this file.')
-
-    args = parser.parse_args()
-
-    # Read test vectors and stringify them
-    testvecs = hjson.load(args.hjsonfile)
-    args.hjsonfile.close()
-
-    # Convert the 3072-bit numbers n and sig into words expressed in hex
-    for t in testvecs:
-        t['n_hexwords'] = rsa_3072_int_to_hexwords(t['n'])
-        t['sig_hexwords'] = rsa_3072_int_to_hexwords(t['signature'])
-
-    # Convert the message into an array of bytes
-    for t in testvecs:
-        t['msg_bytes'] = t['msg'].to_bytes(t['msg_len'], byteorder='big')
-
-    tpl = Template(args.template.read())
-    args.headerfile.write(tpl.render(tests=testvecs))
-    args.headerfile.close()
-    args.template.close()
-
-    return 0
-
-
-if __name__ == '__main__':
-    sys.exit(main())
diff --git a/sw/device/tests/crypto/rsa_3072_verify_testvectors.h.tpl b/sw/device/tests/crypto/rsa_3072_verify_testvectors.h.tpl
deleted file mode 100644
index 911c3a1723644..0000000000000
--- a/sw/device/tests/crypto/rsa_3072_verify_testvectors.h.tpl
+++ /dev/null
@@ -1,74 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// AUTOGENERATED. Do not edit this file by hand.
-// See the crypto/tests README for details.
-
-#ifndef OPENTITAN_SW_DEVICE_TESTS_CRYPTO_RSA_3072_VERIFY_TESTVECTORS_H_
-#define OPENTITAN_SW_DEVICE_TESTS_CRYPTO_RSA_3072_VERIFY_TESTVECTORS_H_
-
-#include "sw/device/lib/crypto/impl/rsa/rsa_3072_verify.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif  // __cplusplus
-
-// A test vector for RSA-3072 verify (message hashed with SHA-256)
-typedef struct rsa_3072_verify_test_vector_t {
-  rsa_3072_public_key_t publicKey;  // The public key
-  rsa_3072_int_t signature;         // The signature to verify
-  bool valid;                       // Expected result (true if signature valid)
-  char *comment;                    // Any notes about the test vector
-  size_t msgLen;                    // Length (in bytes) of the message
-  uint8_t *msg;                     // Message bytes
-} rsa_3072_verify_test_vector_t;
-
-static const size_t RSA_3072_VERIFY_NUM_TESTS = ${len(tests)};
-
-// Static message arrays.
-% for i in range(len(tests)):
-  % if tests[i]["msg_len"] == 0:
-// msg${i} is empty.
-  % else:
-static uint8_t msg${i}[${tests[i]["msg_len"]}] = {${', '.join(['{:#04x}'.format(b) for b in tests[i]["msg_bytes"]])}};
-  %endif
-% endfor
-
-static const rsa_3072_verify_test_vector_t rsa_3072_verify_tests[${len(tests)}] = {
-% for idx, t in enumerate(tests):
-    {
-        .publicKey =
-            {
-                .n = {.data =
-                          {
-  % for i in range(0, len(t["n_hexwords"]), 4):
-                              ${', '.join(t["n_hexwords"][i:i + 4])},
-  % endfor
-                          }},
-                .e = ${'{:#x}'.format(t["e"])},
-            },
-        .signature =
-            {.data =
-                 {
-  % for i in range(0, len(t["sig_hexwords"]), 5):
-                     ${', '.join(t["sig_hexwords"][i:i + 5])},
-  % endfor
-                 }},
-  % if t["msg_len"] == 0:
-        .msg = NULL,
-  % else:
-        .msg = msg${idx},
-  % endif
-        .msgLen = ${t["msg_len"]},
-        .valid = ${"true" if t["valid"] else "false"},
-        .comment = "${t["comment"]}",
-    },
-% endfor
-};
-
-#ifdef __cplusplus
-}  // extern "C"
-#endif  // __cplusplus
-
-#endif  // OPENTITAN_SW_DEVICE_TESTS_CRYPTO_RSA_3072_VERIFY_TESTVECTORS_H_
diff --git a/sw/device/tests/crypto/rsa_4096_encryption_functest.c b/sw/device/tests/crypto/rsa_4096_encryption_functest.c
index 55ff110aedb68..f8257cbe19256 100644
--- a/sw/device/tests/crypto/rsa_4096_encryption_functest.c
+++ b/sw/device/tests/crypto/rsa_4096_encryption_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -81,7 +81,6 @@ static uint32_t kTestPrivateExponent[kRsa4096NumWords] = {
     0x965d9408, 0x19aacb83,
 
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -155,7 +154,7 @@ static status_t run_rsa_4096_encrypt(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize4096, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
@@ -222,9 +221,8 @@ static status_t run_rsa_4096_decrypt(const uint8_t *label, size_t label_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize4096, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize4096, modulus, d_share0, d_share1, &private_key));
 
   otcrypto_byte_buf_t plaintext_buf = {.data = msg, .len = kMaxPlaintextBytes};
   otcrypto_const_byte_buf_t label_buf = {.data = label, .len = label_len};
diff --git a/sw/device/tests/crypto/rsa_4096_keygen_functest.c b/sw/device/tests/crypto/rsa_4096_keygen_functest.c
index 762ac0cde583e..11869a83b5706 100644
--- a/sw/device/tests/crypto/rsa_4096_keygen_functest.c
+++ b/sw/device/tests/crypto/rsa_4096_keygen_functest.c
@@ -6,8 +6,8 @@
 #include "sw/device/lib/crypto/drivers/otbn.h"
 #include "sw/device/lib/crypto/impl/rsa/rsa_datatypes.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -66,9 +66,6 @@ status_t keygen_then_sign_test(void) {
   TRY_CHECK(private_key.keyblob_length == sizeof(rsa_4096_private_key_t));
   rsa_4096_private_key_t *sk = (rsa_4096_private_key_t *)private_key.keyblob;
 
-  // Check that the key uses the F4 exponent.
-  TRY_CHECK(pk->e == 65537);
-
   // Check that the moduli match.
   TRY_CHECK(ARRAYSIZE(pk->n.data) == ARRAYSIZE(sk->n.data));
   TRY_CHECK_ARRAYS_EQ(pk->n.data, sk->n.data, ARRAYSIZE(pk->n.data));
@@ -77,7 +74,7 @@ status_t keygen_then_sign_test(void) {
   // ensuring that the most significant half is nonzero.
   bool d_large_enough = false;
   for (size_t i = kRsa4096NumWords / 2; i < kRsa4096NumWords; i++) {
-    if (sk->d.data[i] != 0) {
+    if ((sk->d0.data[i] ^ sk->d1.data[i]) != 0) {
       d_large_enough = true;
     }
   }
@@ -88,13 +85,12 @@ status_t keygen_then_sign_test(void) {
       .len = kTestMessageLen,
       .data = kTestMessage,
   };
-  uint32_t msg_digest_data[kSha512DigestWords];
+  uint32_t msg_digest_data[512 / 32];
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   uint32_t sig[kRsa4096NumWords];
   otcrypto_word32_buf_t sig_buf = {
diff --git a/sw/device/tests/crypto/rsa_4096_signature_functest.c b/sw/device/tests/crypto/rsa_4096_signature_functest.c
index ebc41f94c8657..c61a239f06264 100644
--- a/sw/device/tests/crypto/rsa_4096_signature_functest.c
+++ b/sw/device/tests/crypto/rsa_4096_signature_functest.c
@@ -5,8 +5,8 @@
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/integrity.h"
-#include "sw/device/lib/crypto/include/hash.h"
 #include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/profile.h"
 #include "sw/device/lib/testing/test_framework/check.h"
@@ -16,6 +16,7 @@
 #define MODULE_ID MAKE_MODULE_ID('t', 's', 't')
 
 enum {
+  kSha512DigestWords = 512 / 32,
   kRsa4096NumBytes = 4096 / 8,
   kRsa4096NumWords = kRsa4096NumBytes / sizeof(uint32_t),
 };
@@ -81,7 +82,6 @@ static uint32_t kTestPrivateExponent[kRsa4096NumWords] = {
     0x965d9408, 0x19aacb83,
 
 };
-static uint32_t kTestPublicExponent = 65537;
 
 // Message data for testing.
 static const unsigned char kTestMessage[] = "Test message.";
@@ -202,9 +202,8 @@ static status_t run_rsa_4096_sign(const uint8_t *msg, size_t msg_len,
       .data = kTestModulus,
       .len = ARRAYSIZE(kTestModulus),
   };
-  TRY(otcrypto_rsa_private_key_from_exponents(kOtcryptoRsaSize4096, modulus,
-                                              kTestPublicExponent, d_share0,
-                                              d_share1, &private_key));
+  TRY(otcrypto_rsa_private_key_from_exponents(
+      kOtcryptoRsaSize4096, modulus, d_share0, d_share1, &private_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
@@ -212,9 +211,8 @@ static status_t run_rsa_4096_sign(const uint8_t *msg, size_t msg_len,
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   otcrypto_word32_buf_t sig_buf = {
       .data = sig,
@@ -271,7 +269,7 @@ static status_t run_rsa_4096_verify(const uint8_t *msg, size_t msg_len,
       .key = public_key_data,
   };
   TRY(otcrypto_rsa_public_key_construct(kOtcryptoRsaSize4096, modulus,
-                                        kTestPublicExponent, &public_key));
+                                        &public_key));
 
   // Hash the message.
   otcrypto_const_byte_buf_t msg_buf = {.data = msg, .len = msg_len};
@@ -279,9 +277,8 @@ static status_t run_rsa_4096_verify(const uint8_t *msg, size_t msg_len,
   otcrypto_hash_digest_t msg_digest = {
       .data = msg_digest_data,
       .len = ARRAYSIZE(msg_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(msg_buf, msg_digest));
+  TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
 
   otcrypto_const_word32_buf_t sig_buf = {
       .data = sig,
diff --git a/sw/device/tests/crypto/sha256_functest.c b/sw/device/tests/crypto/sha256_functest.c
index 1428c2b58bf6e..7b16ab845bc81 100644
--- a/sw/device/tests/crypto/sha256_functest.c
+++ b/sw/device/tests/crypto/sha256_functest.c
@@ -2,14 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/crypto/drivers/hmac.h"
 #include "sw/device/lib/crypto/include/datatypes.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
+enum {
+  kSha256DigestWords = 256 / 32,
+};
+
 /**
  * Two-block test data.
  *
@@ -49,21 +51,21 @@ static const uint8_t kExactBlockExpDigest[] = {
 };
 
 /**
- * Call the `otcrypto_hash` API and check the resulting digest.
+ * Call the `otcrypto_sha2` API and check the resulting digest.
  *
  * @param msg Input message.
  * @param exp_digest Expected digest (256 bits).
  */
 static status_t run_test(otcrypto_const_byte_buf_t msg,
                          const uint32_t *exp_digest) {
-  uint32_t act_digest[kHmacSha256DigestWords];
+  uint32_t act_digest[kSha256DigestWords];
   otcrypto_hash_digest_t digest_buf = {
       .data = act_digest,
-      .len = kHmacSha256DigestWords,
-      .mode = kOtcryptoHashModeSha256,
+      .len = kSha256DigestWords,
   };
-  TRY(otcrypto_hash(msg, digest_buf));
-  TRY_CHECK_ARRAYS_EQ(act_digest, exp_digest, kHmacSha256DigestWords);
+  TRY(otcrypto_sha2_256(msg, &digest_buf));
+  TRY_CHECK_ARRAYS_EQ(act_digest, exp_digest, kSha256DigestWords);
+  TRY_CHECK(digest_buf.mode == kOtcryptoHashModeSha256);
   return OK_STATUS();
 }
 
@@ -104,30 +106,41 @@ static status_t empty_test(void) {
   return run_test(msg_buf, exp_digest);
 }
 
+/**
+ * Test with a two-block message.
+ */
+static status_t two_block_test(void) {
+  otcrypto_const_byte_buf_t msg_buf = {
+      .data = kTwoBlockMessage,
+      .len = kTwoBlockMessageLen,
+  };
+  uint32_t exp_digest[kSha256DigestWords];
+  memcpy(exp_digest, kTwoBlockExpDigest, sizeof(exp_digest));
+  return run_test(msg_buf, exp_digest);
+}
+
 /**
  * Test streaming API with a one-block message in one update.
  */
 static status_t one_update_streaming_test(void) {
-  otcrypto_hash_context_t ctx;
-  TRY(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha256));
+  otcrypto_sha2_context_t ctx;
+  TRY(otcrypto_sha2_init(kOtcryptoHashModeSha256, &ctx));
 
   otcrypto_const_byte_buf_t msg_buf = {
       .data = kExactBlockMessage,
       .len = kExactBlockMessageLen,
   };
-  TRY(otcrypto_hash_update(&ctx, msg_buf));
+  TRY(otcrypto_sha2_update(&ctx, msg_buf));
 
-  size_t digest_num_words =
-      (sizeof(kExactBlockExpDigest) + sizeof(uint32_t) - 1) / sizeof(uint32_t);
-  uint32_t act_digest[digest_num_words];
+  uint32_t act_digest[kSha256DigestWords];
   otcrypto_hash_digest_t digest_buf = {
       .data = act_digest,
-      .len = digest_num_words,
-      .mode = kOtcryptoHashModeSha256,
+      .len = ARRAYSIZE(act_digest),
   };
-  TRY(otcrypto_hash_final(&ctx, digest_buf));
+  TRY(otcrypto_sha2_final(&ctx, &digest_buf));
   TRY_CHECK_ARRAYS_EQ((unsigned char *)act_digest, kExactBlockExpDigest,
                       sizeof(kExactBlockExpDigest));
+  TRY_CHECK(digest_buf.mode == kOtcryptoHashModeSha256);
   return OK_STATUS();
 }
 
@@ -135,8 +148,8 @@ static status_t one_update_streaming_test(void) {
  * Test streaming API with a two-block message in multiple updates.
  */
 static status_t multiple_update_streaming_test(void) {
-  otcrypto_hash_context_t ctx;
-  TRY(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha256));
+  otcrypto_sha2_context_t ctx;
+  TRY(otcrypto_sha2_init(kOtcryptoHashModeSha256, &ctx));
 
   // Send 0 bytes, then 1, then 2, etc. until message is done.
   const unsigned char *next = kTwoBlockMessage;
@@ -148,22 +161,20 @@ static status_t multiple_update_streaming_test(void) {
         .data = next,
         .len = update_size,
     };
+    TRY(otcrypto_sha2_update(&ctx, msg_buf));
     next += update_size;
     len -= update_size;
     update_size++;
-    TRY(otcrypto_hash_update(&ctx, msg_buf));
   }
-  size_t digest_num_words =
-      (sizeof(kTwoBlockExpDigest) + sizeof(uint32_t) - 1) / sizeof(uint32_t);
-  uint32_t act_digest[digest_num_words];
+  uint32_t act_digest[kSha256DigestWords];
   otcrypto_hash_digest_t digest_buf = {
       .data = act_digest,
-      .len = digest_num_words,
-      .mode = kOtcryptoHashModeSha256,
+      .len = ARRAYSIZE(act_digest),
   };
-  TRY(otcrypto_hash_final(&ctx, digest_buf));
+  TRY(otcrypto_sha2_final(&ctx, &digest_buf));
   TRY_CHECK_ARRAYS_EQ((unsigned char *)act_digest, kTwoBlockExpDigest,
                       sizeof(kTwoBlockExpDigest));
+  TRY_CHECK(digest_buf.mode == kOtcryptoHashModeSha256);
   return OK_STATUS();
 }
 
@@ -171,9 +182,9 @@ OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
   status_t test_result = OK_STATUS();
-  CHECK_STATUS_OK(entropy_complex_init());
   EXECUTE_TEST(test_result, simple_test);
   EXECUTE_TEST(test_result, empty_test);
+  EXECUTE_TEST(test_result, two_block_test);
   EXECUTE_TEST(test_result, one_update_streaming_test);
   EXECUTE_TEST(test_result, multiple_update_streaming_test);
   return status_ok(test_result);
diff --git a/sw/device/tests/crypto/sha384_functest.c b/sw/device/tests/crypto/sha384_functest.c
index 528f1fbdd3abf..014166bf5d5e6 100644
--- a/sw/device/tests/crypto/sha384_functest.c
+++ b/sw/device/tests/crypto/sha384_functest.c
@@ -2,9 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/status.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -63,13 +62,13 @@ status_t sha384_test(const unsigned char *msg, const size_t msg_len,
   otcrypto_hash_digest_t actual_digest = {
       .data = actual_digest_data,
       .len = ARRAYSIZE(actual_digest_data),
-      .mode = kOtcryptoHashModeSha384,
   };
-  TRY(otcrypto_hash(input_message, actual_digest));
+  TRY(otcrypto_sha2_384(input_message, &actual_digest));
 
   // Check that the expected and actual digests match.
   TRY_CHECK_ARRAYS_EQ((unsigned char *)actual_digest_data, expected_digest,
                       sizeof(actual_digest_data));
+  TRY_CHECK(actual_digest.mode == kOtcryptoHashModeSha384);
 
   return OTCRYPTO_OK;
 }
@@ -79,8 +78,8 @@ status_t sha384_test(const unsigned char *msg, const size_t msg_len,
  */
 status_t sha384_streaming_test(const unsigned char *msg, size_t msg_len,
                                const uint8_t *expected_digest) {
-  otcrypto_hash_context_t ctx;
-  TRY(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha384));
+  otcrypto_sha2_context_t ctx;
+  TRY(otcrypto_sha2_init(kOtcryptoHashModeSha384, &ctx));
 
   // Send the message 5 bytes at a time.
   while (msg_len > 0) {
@@ -92,7 +91,7 @@ status_t sha384_streaming_test(const unsigned char *msg, size_t msg_len,
     };
     msg += len;
     msg_len -= len;
-    TRY(otcrypto_hash_update(&ctx, input_message));
+    TRY(otcrypto_sha2_update(&ctx, input_message));
   }
 
   // Allocate space for the computed digest.
@@ -100,13 +99,13 @@ status_t sha384_streaming_test(const unsigned char *msg, size_t msg_len,
   otcrypto_hash_digest_t actual_digest = {
       .data = actual_digest_data,
       .len = ARRAYSIZE(actual_digest_data),
-      .mode = kOtcryptoHashModeSha384,
   };
-  TRY(otcrypto_hash_final(&ctx, actual_digest));
+  TRY(otcrypto_sha2_final(&ctx, &actual_digest));
 
   // Check that the expected and actual digests match.
   TRY_CHECK_ARRAYS_EQ((unsigned char *)actual_digest_data, expected_digest,
                       sizeof(actual_digest_data));
+  TRY_CHECK(actual_digest.mode == kOtcryptoHashModeSha384);
 
   return OTCRYPTO_OK;
 }
@@ -135,7 +134,6 @@ static volatile status_t test_result;
 
 bool test_main(void) {
   test_result = OK_STATUS();
-  CHECK_STATUS_OK(entropy_complex_init());
   EXECUTE_TEST(test_result, empty_test);
   EXECUTE_TEST(test_result, one_block_test);
   EXECUTE_TEST(test_result, two_block_test);
diff --git a/sw/device/tests/crypto/sha512_functest.c b/sw/device/tests/crypto/sha512_functest.c
index d965afaffd0a8..cb03a2bee32fc 100644
--- a/sw/device/tests/crypto/sha512_functest.c
+++ b/sw/device/tests/crypto/sha512_functest.c
@@ -2,9 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include "sw/device/lib/crypto/drivers/entropy.h"
 #include "sw/device/lib/crypto/impl/status.h"
-#include "sw/device/lib/crypto/include/hash.h"
+#include "sw/device/lib/crypto/include/sha2.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -56,13 +55,13 @@ status_t sha512_test(const unsigned char *msg, const size_t msg_len,
   otcrypto_hash_digest_t actual_digest = {
       .len = ARRAYSIZE(actual_digest_data),
       .data = actual_digest_data,
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash(input_message, actual_digest));
+  TRY(otcrypto_sha2_512(input_message, &actual_digest));
 
   // Check that the expected and actual digests match.
   TRY_CHECK_ARRAYS_EQ((unsigned char *)actual_digest_data, expected_digest,
                       sizeof(actual_digest_data));
+  TRY_CHECK(actual_digest.mode == kOtcryptoHashModeSha512);
 
   return OTCRYPTO_OK;
 }
@@ -72,8 +71,8 @@ status_t sha512_test(const unsigned char *msg, const size_t msg_len,
  */
 status_t sha512_streaming_test(const unsigned char *msg, size_t msg_len,
                                const uint8_t *expected_digest) {
-  otcrypto_hash_context_t ctx;
-  TRY(otcrypto_hash_init(&ctx, kOtcryptoHashModeSha512));
+  otcrypto_sha2_context_t ctx;
+  TRY(otcrypto_sha2_init(kOtcryptoHashModeSha512, &ctx));
 
   // Send the message 5 bytes at a time.
   while (msg_len > 0) {
@@ -85,7 +84,7 @@ status_t sha512_streaming_test(const unsigned char *msg, size_t msg_len,
     };
     msg += len;
     msg_len -= len;
-    TRY(otcrypto_hash_update(&ctx, input_message));
+    TRY(otcrypto_sha2_update(&ctx, input_message));
   }
 
   // Allocate space for the computed digest.
@@ -93,13 +92,13 @@ status_t sha512_streaming_test(const unsigned char *msg, size_t msg_len,
   otcrypto_hash_digest_t actual_digest = {
       .data = actual_digest_data,
       .len = ARRAYSIZE(actual_digest_data),
-      .mode = kOtcryptoHashModeSha512,
   };
-  TRY(otcrypto_hash_final(&ctx, actual_digest));
+  TRY(otcrypto_sha2_final(&ctx, &actual_digest));
 
   // Check that the expected and actual digests match.
   TRY_CHECK_ARRAYS_EQ((unsigned char *)actual_digest_data, expected_digest,
                       sizeof(actual_digest_data));
+  TRY_CHECK(actual_digest.mode == kOtcryptoHashModeSha512);
 
   return OTCRYPTO_OK;
 }
@@ -124,7 +123,6 @@ static volatile status_t test_result;
 
 bool test_main(void) {
   test_result = OK_STATUS();
-  CHECK_STATUS_OK(entropy_complex_init());
   EXECUTE_TEST(test_result, one_block_test);
   EXECUTE_TEST(test_result, two_block_test);
   EXECUTE_TEST(test_result, streaming_test);
diff --git a/sw/device/tests/crypto/testvectors/BUILD b/sw/device/tests/crypto/testvectors/BUILD
index 3405475579880..5bc305b00b0ae 100644
--- a/sw/device/tests/crypto/testvectors/BUILD
+++ b/sw/device/tests/crypto/testvectors/BUILD
@@ -49,9 +49,4 @@ autogen_cryptotest_hjson_external(
 
 exports_files([
     "sha3_224_hardcoded.hjson",
-    "sha3_256_hardcoded.hjson",
-    "sha3_384_hardcoded.hjson",
-    "sha3_512_hardcoded.hjson",
-    "shake128_hardcoded.hjson",
-    "shake256_hardcoded.hjson",
 ])
diff --git a/sw/device/tests/crypto/testvectors/cshake_hardcoded.hjson b/sw/device/tests/crypto/testvectors/cshake_hardcoded.hjson
deleted file mode 100644
index 37cc3c4d4169c..0000000000000
--- a/sw/device/tests/crypto/testvectors/cshake_hardcoded.hjson
+++ /dev/null
@@ -1,25 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// The following vectors are obtained from:
-// https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines/example-values
-
-[
-  {
-    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #1"
-    operation: CSHAKE
-    security_str: 128
-    input_msg: 0x00010203
-    cust_str: 0x456d61696c205369676e6174757265
-    digest: 0xc1c36925b6409a04f1b504fcbca9d82b4017277cb5ed2b2065fc1d3814d5aaf5
-  }
-  {
-    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #3"
-    operation: CSHAKE
-    security_str: 256
-    input_msg: 0x00010203
-    cust_str: 0x456d61696c205369676e6174757265
-    digest: 0xd008828e2b80ac9d2218ffee1d070c48b8e4c87bff32c9699d5b6896eee0edd164020e2be0560858d9c00c037e34a96937c561a74c412bb4c746469527281c8c
-  }
-]
diff --git a/sw/device/tests/crypto/testvectors/sha3_256_hardcoded.hjson b/sw/device/tests/crypto/testvectors/sha3_256_hardcoded.hjson
deleted file mode 100644
index a9c7256b47f0c..0000000000000
--- a/sw/device/tests/crypto/testvectors/sha3_256_hardcoded.hjson
+++ /dev/null
@@ -1,15 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// Source: https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Secure-Hashing
-
-[
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHA3_256ShortMsg.rsp, Len = 152"
-    operation: SHA3
-    security_str: 256
-    input_msg: 0xd751ccd2cd65f27db539176920a70057a08a6b
-    digest: 0x7aaca80dbeb8dc3677d18b84795985463650d72f2543e0ec709c9e70b8cd7b79
-  }
-]
diff --git a/sw/device/tests/crypto/testvectors/sha3_384_hardcoded.hjson b/sw/device/tests/crypto/testvectors/sha3_384_hardcoded.hjson
deleted file mode 100644
index 8e7f319023e0e..0000000000000
--- a/sw/device/tests/crypto/testvectors/sha3_384_hardcoded.hjson
+++ /dev/null
@@ -1,15 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// Source: https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Secure-Hashing
-
-[
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHA3_384LongMsg.rsp, Len = 1672"
-    operation: SHA3
-    security_str: 384
-    input_msg: 0x5fe35923b4e0af7dd24971812a58425519850a506dfa9b0d254795be785786c319a2567cbaa5e35bcf8fe83d943e23fa5169b73adc1fcf8b607084b15e6a013df147e46256e4e803ab75c110f77848136be7d806e8b2f868c16c3a90c14463407038cb7d9285079ef162c6a45cedf9c9f066375c969b5fcbcda37f02aacff4f31cded3767570885426bebd9eca877e44674e9ae2f0c24cdd0e7e1aaf1ff2fe7f80a1c4f5078eb34cd4f06fa94a2d1eab5806ca43fd0f06c60b63d5402b95c70c21ea65a151c5cfaf8262a46be3c722264b
-    digest: 0x3054d249f916a6039b2a9c3ebec1418791a0608a170e6d36486035e5f92635eaba98072a85373cb54e2ae3f982ce132b
-  }
-]
diff --git a/sw/device/tests/crypto/testvectors/sha3_512_hardcoded.hjson b/sw/device/tests/crypto/testvectors/sha3_512_hardcoded.hjson
deleted file mode 100644
index 70dad3d0724fd..0000000000000
--- a/sw/device/tests/crypto/testvectors/sha3_512_hardcoded.hjson
+++ /dev/null
@@ -1,15 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// Source: https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Secure-Hashing
-
-[
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHA3_512ShortMsg.rsp, Len = 296"
-    operation: SHA3
-    security_str: 512
-    input_msg: 0xf34d100269aee3ead156895e8644d4749464d5921d6157dffcbbadf7a719aee35ae0fd4872
-    digest: 0x565a1dd9d49f8ddefb79a3c7a209f53f0bc9f5396269b1ce2a2b283a3cb45ee3ae652e4ca10b26ced7e5236227006c94a37553db1b6fe5c0c2eded756c896bb1
-  }
-]
diff --git a/sw/device/tests/crypto/testvectors/shake128_hardcoded.hjson b/sw/device/tests/crypto/testvectors/shake128_hardcoded.hjson
deleted file mode 100644
index 47d05272829fe..0000000000000
--- a/sw/device/tests/crypto/testvectors/shake128_hardcoded.hjson
+++ /dev/null
@@ -1,39 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// The following vectors are obtained from two different sources:
-// SHAKE: https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Secure-Hashing
-// CSHAKE: https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines/example-values
-
-[
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHAKE128ShortMsg_msg.rsp, Len = 56"
-    operation: SHAKE
-    security_str: 128
-    input_msg: 0x7216a825029da1
-    digest: 0x9de6ffacf3e59693a3de81b02f7db77a
-  }
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHAKE128ShortMsg_msg.rsp, Len = 128"
-    operation: SHAKE
-    security_str: 128
-    input_msg: 0xd4d67b00ca51397791b81205d5582c0a
-    digest: 0xd0acfb2a14928caf8c168ae514925e4e
-  }
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHAKE128ShortMsg_msg.rsp, Len = 1336"
-    operation: SHAKE
-    security_str: 128
-    input_msg: 0x18636f702f216b1b9302e59d82192f4e002f82d526c3f04cbd4f9b9f0bcd2535ed7a67d326da66bdf7fc821ef0fff1a905d56c81e4472856863908d104301133ad111e39552cd542ef78d9b35f20419b893f4a93aee848e9f86ae3fd53d27fea7fb1fc69631fa0f3a5ff51267785086ab4f682d42baf394b3b6992e9a0bb58a38ce0692df9bbaf183e18523ee1352c5fad817e0c04a3e1c476be7f5e92f482a6fb29cd4bbf09ea
-    digest: 0xb7b9db481898f888e5ee4ed629859844
-  }
-  {
-    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #1"
-    operation: CSHAKE
-    security_str: 128
-    input_msg: 0x00010203
-    cust_str: 0x456d61696c205369676e6174757265
-    digest: 0xc1c36925b6409a04f1b504fcbca9d82b4017277cb5ed2b2065fc1d3814d5aaf5
-  }
-]
diff --git a/sw/device/tests/crypto/testvectors/shake256_hardcoded.hjson b/sw/device/tests/crypto/testvectors/shake256_hardcoded.hjson
deleted file mode 100644
index f5fad70c4bceb..0000000000000
--- a/sw/device/tests/crypto/testvectors/shake256_hardcoded.hjson
+++ /dev/null
@@ -1,32 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-// The following vectors are obtained from two different sources:
-// SHAKE: https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Secure-Hashing
-// CSHAKE: https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines/example-values
-
-[
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHAKE256ShortMsg.rsp, Len = 312"
-    operation: SHAKE
-    security_str: 256
-    input_msg: 0xf532d0ece583bebaec55d030c93fcd43ad7c96a493ef15e7d06470e5eb19825fae7d8be47d3726
-    digest: 0x225ace4d5140a3d75993ca8c7b993662030d046fa0201ee9c5c335d92b4d5801
-  }
-  {
-    vector_identifier: "NIST CAVP, byte-oriented, SHAKE256VariableOut.rsp, Count = 1245, Len = 2000"
-    operation: SHAKE
-    security_str: 256
-    input_msg: 0x8d8001e2c096f1b88e7c9224a086efd4797fbf74a8033a2d422a2b6b8f6747e4
-    digest: 0x2e975f6a8a14f0704d51b13667d8195c219f71e6345696c49fa4b9d08e9225d3d39393425152c97e71dd24601c11abcfa0f12f53c680bd3ae757b8134a9c10d429615869217fdd5885c4db174985703a6d6de94a667eac3023443a8337ae1bc601b76d7d38ec3c34463105f0d3949d78e562a039e4469548b609395de5a4fd43c46ca9fd6ee29ada5efc07d84d553249450dab4a49c483ded250c9338f85cd937ae66bb436f3b4026e859fda1ca571432f3bfc09e7c03ca4d183b741111ca0483d0edabc03feb23b17ee48e844ba2408d9dcfd0139d2e8c7310125aee801c61ab7900d1efc47c078281766f361c5e6111346235e1dc38325666c
-  }
-  {
-    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #3"
-    operation: CSHAKE
-    security_str: 256
-    input_msg: 0x00010203
-    cust_str: 0x456d61696c205369676e6174757265
-    digest: 0xd008828e2b80ac9d2218ffee1d070c48b8e4c87bff32c9699d5b6896eee0edd164020e2be0560858d9c00c037e34a96937c561a74c412bb4c746469527281c8c
-  }
-]
diff --git a/sw/device/tests/doc/sival/devguide.md b/sw/device/tests/doc/sival/devguide.md
index 015320d9cc6ea..efb7473e33286 100644
--- a/sw/device/tests/doc/sival/devguide.md
+++ b/sw/device/tests/doc/sival/devguide.md
@@ -79,8 +79,11 @@ Silicon bring-up and validation activities have to be planned in a way that
 minimizes the number of OTP configurations given that there may be limited
 availability of samples during early post-silicon stages.
 
-`//hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD` contains the OTP
-configurations used in Silicon Validation (SiVal) for the EarlGrey design.
+* `//hw/ip/otp_ctrl/data/earlgrey_skus/emulation/BUILD`: contains the OTP
+  configurations used for pre-silicon simulation and emulation, as well as for
+  Silicon Validation (SiVal) targets running on the FPGA.
+* `//hw/ip/otp_ctrl/data/earlgrey_skus/sival/BUILD`: contains the OTP
+  configurations used in Silicon Validation (SiVal) for the EarlGrey design.
 
 ### `:otp_img_test_unlocked0_manuf_empty`
 
@@ -187,7 +190,7 @@ Configuration:
 ```python
 {
     rom = "//sw/device/silicon_creator/rom:mask_rom",
-    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/sival:otp_img_prod_manuf_personalized",
+    otp = "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_prod_manuf_personalized",
 }
 ```
 
diff --git a/sw/device/tests/edn_boot_mode.c b/sw/device/tests/edn_boot_mode.c
index 76c037729ea47..325ec3a53ece2 100644
--- a/sw/device/tests/edn_boot_mode.c
+++ b/sw/device/tests/edn_boot_mode.c
@@ -15,6 +15,7 @@
 #include "sw/device/lib/testing/otbn_testutils.h"
 #include "sw/device/lib/testing/rv_core_ibex_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/tests/otbn_randomness_impl.h"
 
@@ -138,6 +139,13 @@ static void consume_entropy(unsigned int round,
   dif_rv_core_ibex_rnd_status_t ibex_rnd_status;
   dif_otbn_irq_state_snapshot_t intr_state;
   CHECK_STATUS_OK(entropy_config(round));
+
+  // Expect the recoverable error alert only if errors are expected.
+  if (otbn_err_val != kDifOtbnErrBitsNoError) {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdOtbnRecov));
+  }
+
   // Launch an OTBN program consuming entropy via both
   // the RND and the URND interface.
   CHECK_STATUS_OK(otbn_testutils_execute(&otbn));
@@ -147,6 +155,12 @@ static void consume_entropy(unsigned int round,
   CHECK_DIF_OK(dif_otbn_irq_get_state(&otbn, &intr_state));
   CHECK(intr_state & 0x1);
   CHECK_DIF_OK(dif_otbn_irq_acknowledge_all(&otbn));
+
+  if (otbn_err_val != kDifOtbnErrBitsNoError) {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdOtbnRecov));
+  }
+
   // Read rnd data through the IBEX and verify if the FIPS compliance
   // status is as expected.
   // The first read gets rid of leftover entropy from previous configurations
diff --git a/sw/device/tests/edn_kat.c b/sw/device/tests/edn_kat.c
index bdb34143e140e..8bfd2ef698624 100644
--- a/sw/device/tests/edn_kat.c
+++ b/sw/device/tests/edn_kat.c
@@ -14,6 +14,7 @@
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/rv_core_ibex_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "edn_regs.h"  // Generated
@@ -24,6 +25,7 @@ enum {
   kEdnKatMaxClen = 12,
   kEdnKatOutputLen = 16,
   kEdnKatWordsPerBlock = 4,
+  kEdnKatRecovAlertDelay = 100 * 1000,  // 100ms
 };
 
 static dif_entropy_src_t entropy_src;
@@ -229,10 +231,18 @@ static bool execute_kat(void) {
 }
 
 static void execute_alert_test(void) {
-  uint32_t alerts;
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdEdn0RecovAlert));
   for (int i = 0; i <= 2 * kEdnKatWordsPerBlock; ++i) {
     ibex_get_rnd_data();
   }
+  // Note: the alert from EDN can be delayed after `get_random_data` so we
+  // must wait before finishing the expectation.
+  busy_spin_micros(kEdnKatRecovAlertDelay);
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdEdn0RecovAlert));
+
+  uint32_t alerts;
   CHECK_DIF_OK(dif_edn_get_recoverable_alerts(&edn0, &alerts));
   CHECK((alerts >> kDifEdnRecoverableAlertRepeatedGenBits) & 0x1);
 }
diff --git a/sw/device/tests/entropy_src_bypass_mode_health_test.c b/sw/device/tests/entropy_src_bypass_mode_health_test.c
new file mode 100644
index 0000000000000..0f4d3824e47da
--- /dev/null
+++ b/sw/device/tests/entropy_src_bypass_mode_health_test.c
@@ -0,0 +1,478 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/arch/boot_stage.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_base.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_otbn.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/otbn_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/otbn_randomness_impl.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "sw/device/lib/dif/autogen/dif_entropy_src_autogen.h"
+
+#define TIMEOUT (1000 * 1000)
+
+OTTF_DEFINE_TEST_CONFIG();
+
+// Module handles
+static dif_entropy_src_t entropy_src;
+static dif_csrng_t csrng;
+static dif_edn_t edn0;
+static dif_edn_t edn1;
+static dif_aes_t aes;
+static dif_otbn_t otbn;
+static dif_alert_handler_t alert_handler;
+
+status_t init_test_environment(void) {
+  LOG_INFO(
+      "Initializing modules sntropy_src, csrng, edn0, edn1, aes, otbn and "
+      "alert_handler...");
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+  TRY(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
+
+  // Entropy testutils handle this recoverable alert separately, disable OTTF
+  // handling.
+  ottf_alerts_ignore_alert(kTopEarlgreyAlertIdEntropySrcRecovAlert);
+  return OK_STATUS();
+}
+
+// Function to disable entropy complex
+status_t disable_entropy_complex(void) {
+  // Using entropy test utility to stop all EDN0, EDN1, CSRNG, and the Entropy
+  // Source
+  LOG_INFO("Disabling the entropy complex...");
+  return entropy_testutils_stop_all();
+}
+
+status_t configure_loose_health_tests(void) {
+  LOG_INFO("Configuring loose health test thresholds...");
+
+  // Check if entropy source is locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure Repetition Count Test
+  dif_entropy_src_health_test_config_t repcnt_test_config = {
+      .test_type = kDifEntropySrcTestRepetitionCount,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, repcnt_test_config));
+
+  // Configure Adaptive Proportion Test
+  dif_entropy_src_health_test_config_t adaptp_test_config = {
+      .test_type = kDifEntropySrcTestAdaptiveProportion,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, adaptp_test_config));
+
+  // Configure Bucket Test
+  dif_entropy_src_health_test_config_t bucket_test_config = {
+      .test_type = kDifEntropySrcTestBucket,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, bucket_test_config));
+
+  // Configure Markov Test
+  dif_entropy_src_health_test_config_t markov_test_config = {
+      .test_type = kDifEntropySrcTestMarkov,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, markov_test_config));
+
+  return OK_STATUS();
+}
+
+status_t enable_loose_entropy_src_bypass_mode(void) {
+  LOG_INFO("Enabling ENTROPY_SRC in bypass mode...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure ENTROPY_SRC in bypass mode with health tests enabled
+  dif_entropy_src_config_t config = {
+      .fips_enable = false,
+      .route_to_firmware = false,
+      .fips_flag = false,
+      .rng_fips = false,
+      .bypass_conditioner = true,
+      .single_bit_mode = kDifEntropySrcSingleBitModeDisabled,
+      .health_test_threshold_scope = false,
+      .health_test_window_size = 512,
+      .alert_threshold = 0xFFFF,
+  };
+
+  // Apply the configuration and enable ENTROPY_SRC
+  TRY(dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+
+  return OK_STATUS();
+}
+
+status_t enable_csrng(void) {
+  LOG_INFO("Enabling and instantiating CSRNG...");
+
+  // Configure CSRNG with default settings
+  TRY(dif_csrng_configure(&csrng));
+
+  // Instantiate the CSRNG
+  dif_csrng_seed_material_t seed_material = {
+      .seed_material_len = 0,
+      .seed_material = {0},
+  };
+  TRY(dif_csrng_instantiate(&csrng, kDifCsrngEntropySrcToggleDisable,
+                            &seed_material));
+
+  dif_csrng_cmd_status_t status;
+  TRY(dif_csrng_get_cmd_interface_status(&csrng, &status));
+  TRY_CHECK(status.cmd_sts == kDifCsrngCmdStsSuccess,
+            "csrng error status. err: 0x%x, kind: 0x%x", status.cmd_sts,
+            status.kind);
+
+  LOG_INFO("CSRNG is now instantiated and enabled");
+
+  return OK_STATUS();
+}
+
+status_t enable_edns_boot_mode(void) {
+  LOG_INFO("Enabling EDNs in boot-time request mode...");
+  TRY(dif_edn_set_boot_mode(&edn0));
+  TRY(dif_edn_set_boot_mode(&edn1));
+  TRY(dif_edn_configure(&edn0));
+  TRY(dif_edn_configure(&edn1));
+  return OK_STATUS();
+}
+
+status_t entropy_testutils_error_check_b4_proceeding(void) {
+  LOG_INFO("Debugging error checks b4 proceeding...");
+  return entropy_testutils_error_check(&entropy_src, &csrng, &edn0, &edn1);
+}
+
+status_t test_and_verify_aes_operation(void) {
+  LOG_INFO("Triggering AES operation in ECB mode...");
+
+  // Setup ECB encryption transaction
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey256,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = kDifAesReseedPer8kBlock,
+      .manual_operation = kDifAesManualOperationAuto,
+      .reseed_on_key_change = false,
+      .ctrl_aux_lock = false,
+  };
+
+  // Configure encryption
+  CHECK_STATUS_OK(aes_testutils_setup_encryption(transaction, &aes));
+
+  // Wait for the encryption to complete
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusOutputValid, true, TIMEOUT);
+
+  // Decrypt and verify
+  CHECK_STATUS_OK(aes_testutils_decrypt_ciphertext(transaction, &aes));
+
+  LOG_INFO("AES operation in ECB mode verified successfully");
+  return OK_STATUS();
+}
+
+status_t start_otbn_program(void) {
+  LOG_INFO("Starting OTBN randomness test...");
+
+  // Start the OTBN randomness test with one iteration
+  otbn_randomness_test_start(&otbn, 1);
+
+  LOG_INFO("OTBN randomness test started");
+  return OK_STATUS();
+}
+
+status_t verify_otbn_hang(void) {
+  LOG_INFO("Verifying OTBN program hang...");
+
+  // Wait for a timeout period to check if OTBN is still busy
+  const uint32_t kIterateMaxRetries = 1000000;
+  bool otbn_busy = true;
+  uint32_t iter_cntr = kIterateMaxRetries;
+
+  dif_otbn_status_t otbn_status;
+
+  while (iter_cntr > 0) {
+    // Check if OTBN is still busy
+    TRY(dif_otbn_get_status(&otbn, &otbn_status));
+
+    // Check if any of the busy status flags are set
+    otbn_busy = (otbn_status &
+                 (kDifOtbnStatusBusyExecute | kDifOtbnStatusBusySecWipeDmem |
+                  kDifOtbnStatusBusySecWipeImem)) != 0;
+    TRY_CHECK(otbn_busy,
+              "OTBN program completed unexpectedly; expected it to hang");
+    iter_cntr--;
+  }
+
+  // After timeout, if OTBN is still busy, we shall conclude it's hanging as
+  // expected
+  if (otbn_busy) {
+    LOG_INFO("OTBN program is still running as expected (hang detected)");
+
+    // Print OTBN status and error bits
+    dif_otbn_err_bits_t otbn_err_bits;
+    TRY(dif_otbn_get_err_bits(&otbn, &otbn_err_bits));
+    LOG_INFO("OTBN status: 0x%x", otbn_status);
+    LOG_INFO("OTBN error bits: 0x%x", otbn_err_bits);
+
+    // Double check to confirm no other unexpected errors are
+    // present leading to hang
+    if (otbn_err_bits != kDifOtbnErrBitsNoError) {
+      LOG_ERROR("OTBN encountered unexpected errors");
+
+      // Optionally, decode and print specific error bits
+      if (otbn_err_bits & kDifOtbnErrBitsBadDataAddr) {
+        LOG_ERROR("A BAD_DATA_ADDR error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsBadInsnAddr) {
+        LOG_ERROR("A BAD_INSN_ADDR error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsCallStack) {
+        LOG_ERROR("A CALL_STACK error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsIllegalInsn) {
+        LOG_ERROR("An ILLEGAL_INSN error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsLoop) {
+        LOG_ERROR("A LOOP error was observed");
+      }
+
+      otbn_randomness_test_end(&otbn, 1);
+      return INTERNAL();
+    }
+    return OK_STATUS();
+  } else {
+    LOG_ERROR("OTBN program did not hang as expected");
+    return INTERNAL();
+  }
+}
+
+status_t set_threshold_and_enable_stringent_entropy_src_bypass_mode(void) {
+  LOG_INFO("Enabling ENTROPY_SRC in bypass mode...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure ENTROPY_SRC in bypass mode with health tests enabled
+  dif_entropy_src_config_t config = {
+      .fips_enable = false,
+      .route_to_firmware = false,
+      .fips_flag = false,
+      .rng_fips = false,
+      .bypass_conditioner = true,
+      .single_bit_mode = kDifEntropySrcSingleBitModeDisabled,
+      .health_test_threshold_scope = false,
+      .health_test_window_size = 512,
+      .alert_threshold = 1,
+  };
+
+  // Apply the configuration and enable ENTROPY_SRC
+  TRY(dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+
+  return OK_STATUS();
+}
+
+status_t configure_stringent_health_tests(void) {
+  LOG_INFO("Configuring stringent health test thresholds...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure Repetition Count Test with stringent threshold
+  dif_entropy_src_health_test_config_t repcnt_test_config = {
+      .test_type = kDifEntropySrcTestRepetitionCount,
+      .high_threshold = 1,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, repcnt_test_config));
+
+  // Configure Adaptive Proportion Test with stringent threshold
+  dif_entropy_src_health_test_config_t adaptp_test_config = {
+      .test_type = kDifEntropySrcTestAdaptiveProportion,
+      .high_threshold = 1,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, adaptp_test_config));
+
+  // Configure Bucket Test with stringent threshold
+  dif_entropy_src_health_test_config_t bucket_test_config = {
+      .test_type = kDifEntropySrcTestBucket,
+      .high_threshold = 1,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, bucket_test_config));
+
+  // Configure Markov Test with stringent threshold
+  dif_entropy_src_health_test_config_t markov_test_config = {
+      .test_type = kDifEntropySrcTestMarkov,
+      .high_threshold = 1,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, markov_test_config));
+
+  return OK_STATUS();
+}
+
+status_t verify_recoverable_alert(void) {
+  LOG_INFO("Verifying recoverable alerts...");
+
+  // Retrieve the recoverable alerts
+  uint32_t alerts;
+  TRY(dif_entropy_src_get_recoverable_alerts(&entropy_src, &alerts));
+
+  if (alerts != 0) {
+    LOG_INFO("Recoverable alert detected. Alerts: 0x%x", alerts);
+
+    // Define alert bit masks based on documentation
+    const uint32_t kEsMainSmAlertBit = 1 << 12;
+    const uint32_t kEsThreshCfgAlertBit = 1 << 14;
+
+    // Debug check if ES_THRESH_CFG_ALERT is set
+    TRY_CHECK((alerts & kEsThreshCfgAlertBit) == 0,
+              "ES_THRESH_CFG_ALERT is asserted");
+    LOG_INFO("ES_THRESH_CFG_ALERT is not asserted and expected");
+
+    // Check if ES_MAIN_SM_ALERT is set
+    TRY_CHECK((alerts & kEsMainSmAlertBit) != 0,
+              "ES_MAIN_SM_ALERT is not asserted when expected");
+    LOG_INFO("ES_MAIN_SM_ALERT is asserted as expected");
+
+    // Clear the recoverable alerts
+    TRY(dif_entropy_src_clear_recoverable_alerts(&entropy_src, alerts));
+
+    // Verify that the alerts have been cleared
+    TRY(dif_entropy_src_get_recoverable_alerts(&entropy_src, &alerts));
+
+    TRY_CHECK(alerts == 0, "Recoverable alerts not cleared. Alerts: 0x%x",
+              alerts);
+    LOG_INFO("Recoverable alerts successfully cleared");
+
+    // Acknowledge the Health Test Failed interrupt
+    TRY(dif_entropy_src_irq_acknowledge(&entropy_src,
+                                        kDifEntropySrcIrqEsHealthTestFailed));
+
+    // Check the IRQ state again
+    dif_entropy_src_irq_state_snapshot_t irq_state;
+    TRY(dif_entropy_src_irq_get_state(&entropy_src, &irq_state));
+    LOG_INFO("ENTROPY_SRC IRQ State after acknowledging: 0x%x", irq_state);
+
+    return OK_STATUS();
+  } else {
+    LOG_ERROR("No recoverable alerts detected when expected");
+    return INTERNAL();
+  }
+}
+
+status_t execute_test(void) {
+  // Initialize peripherals and test environments
+  CHECK_STATUS_OK(init_test_environment());
+
+  // Step 1: Disable the entropy complex
+  CHECK_STATUS_OK(disable_entropy_complex());
+
+  // Step 2: Configure loose health test threshold values for boot-time / bypass
+  // mode
+  CHECK_STATUS_OK(configure_loose_health_tests());
+
+  // Step 3: Enable ENTROPY_SRC in boot-time / bypass mode
+  CHECK_STATUS_OK(enable_loose_entropy_src_bypass_mode());
+
+  // Step 4: Enable CSRNG
+  CHECK_STATUS_OK(enable_csrng());
+
+  // Step 5: Enable both EDNs in boot-time request mode
+  CHECK_STATUS_OK(enable_edns_boot_mode());
+
+  // Check for any error in configuring the modules
+  CHECK_STATUS_OK(entropy_testutils_error_check_b4_proceeding());
+
+  // Step 6: Trigger the execution of a cryptographic hardware block consuming
+  // entropy (e.g. AES) to test EDN0
+  // Step 7: Verify the entropy consuming
+  // endpoint(e.g. AES) finishes its operation
+  CHECK_STATUS_OK(test_and_verify_aes_operation());
+
+  // Step 8: Trigger the execution of an OTBN program requiring entropy from
+  // both EDN1 and EDN0
+  CHECK_STATUS_OK(start_otbn_program());
+
+  // Step 9: Verify the OTBN program hangs
+  CHECK_STATUS_OK(verify_otbn_hang());
+
+  // Step 10: Disable the entropy complex again
+  CHECK_STATUS_OK(disable_entropy_complex());
+
+  // Step 11: Configure unrealistically stringent health test threshold values
+  // for boot-time / bypass mode
+  CHECK_STATUS_OK(configure_stringent_health_tests());
+
+  // Step 12: Configure an alert threshold value of 1 in the ALERT_THRESHOLD
+  // register Step 13,14,15: Enable ENTROPY_SRC, CSRNG, and EDNs in boot-time /
+  // bypass mode again (complex)
+  CHECK_STATUS_OK(set_threshold_and_enable_stringent_entropy_src_bypass_mode());
+  CHECK_STATUS_OK(enable_csrng());
+  CHECK_STATUS_OK(enable_edns_boot_mode());
+
+  // Check for any error in configuring the modules
+  CHECK_STATUS_OK(entropy_testutils_error_check_b4_proceeding());
+
+  // Step 16: Verify that ENTROPY_SRC triggers a recoverable alert and sets the
+  // RECOV_ALERT_STS.ES_MAIN_SM_ALERT bit
+  CHECK_STATUS_OK(verify_recoverable_alert());
+
+  LOG_INFO("Entropy source bypass mode health test completed");
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Entering Entropy Source Bypass Mode Health Test");
+
+  return status_ok(execute_test());
+}
diff --git a/sw/device/tests/entropy_src_edn_reqs_test.c b/sw/device/tests/entropy_src_edn_reqs_test.c
index 293d0cb80e165..e0407cb78579e 100644
--- a/sw/device/tests/entropy_src_edn_reqs_test.c
+++ b/sw/device/tests/entropy_src_edn_reqs_test.c
@@ -22,6 +22,7 @@
 #include "sw/device/lib/testing/otp_ctrl_testutils.h"
 #include "sw/device/lib/testing/pwrmgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/tests/otbn_randomness_impl.h"
 
@@ -224,6 +225,10 @@ void test_initialize(void) {
   CHECK_DIF_OK(dif_alert_handler_init(
       mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
       &alert_handler));
+
+  // We intentionally trigger this alert later, ignore it in OTTF.
+  CHECK_STATUS_OK(
+      ottf_alerts_ignore_alert(kTopEarlgreyAlertIdPwrmgrAonFatalFault));
 }
 
 status_t execute_test(void) {
diff --git a/sw/device/tests/entropy_src_fips_mode_health_test.c b/sw/device/tests/entropy_src_fips_mode_health_test.c
new file mode 100644
index 0000000000000..48b093c88cc78
--- /dev/null
+++ b/sw/device/tests/entropy_src_fips_mode_health_test.c
@@ -0,0 +1,975 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_otbn.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/csrng_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/otbn_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/otbn_randomness_impl.h"
+
+#include "entropy_src_regs.h"  // autogenerated
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+#define TIMEOUT (1000 * 1000)
+
+enum {
+  kEntropySrcStartupWaitMicros = 250000,
+};
+
+OTTF_DEFINE_TEST_CONFIG();
+
+// Module handles
+static dif_entropy_src_t entropy_src;
+static dif_csrng_t csrng;
+static dif_edn_t edn0;
+static dif_edn_t edn1;
+static dif_aes_t aes;
+static dif_otbn_t otbn;
+static dif_alert_handler_t alert_handler;
+
+status_t init_test_environment(void) {
+  LOG_INFO(
+      "Initializing modules entropy_src, csrng, edn0, edn1, aes, otbn and "
+      "alert_handler...");
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+  TRY(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
+  return OK_STATUS();
+}
+
+status_t print_entropy_src_state(const dif_entropy_src_t *entropy_src) {
+  // Declare a variable to hold the current state
+  dif_entropy_src_main_fsm_t cur_state;
+
+  // Get the current state of the entropy source
+  TRY(dif_entropy_src_get_main_fsm_state(entropy_src, &cur_state));
+
+  // Print the current state
+  LOG_INFO("Current ENTROPY_SRC state: 0x%x", cur_state);
+
+  const char *state_description;
+  switch (cur_state) {
+    case kDifEntropySrcMainFsmStateIdle:
+      state_description = "Idle: Initial or inactive state.";
+      break;
+    case kDifEntropySrcMainFsmStateBootHTRunning:
+      state_description =
+          "Boot Health Tests Running: Health tests during boot.";
+      break;
+    case kDifEntropySrcMainFsmStateBootPostHTChk:
+      state_description =
+          "Boot Post Health Test Check: Health tests completed after boot.";
+      break;
+    case kDifEntropySrcMainFsmStateBootPhaseDone:
+      state_description =
+          "Boot Phase Done: Initial setup and checks completed.";
+      break;
+    case kDifEntropySrcMainFsmStateStartupHTStart:
+      state_description =
+          "Startup Health Tests Start: Start of health tests during startup.";
+      break;
+    case kDifEntropySrcMainFsmStateStartupPhase1:
+      state_description =
+          "Startup Phase 1: Initial configuration or loading constants.";
+      break;
+    case kDifEntropySrcMainFsmStateStartupPass1:
+      state_description =
+          "Startup Phase 1 Pass: Successful completion of the first phase of "
+          "startup.";
+      break;
+    case kDifEntropySrcMainFsmStateStartupFail1:
+      state_description =
+          "Startup Phase 1 Fail: Failure during the first phase of startup.";
+      break;
+    case kDifEntropySrcMainFsmStateContHTStart:
+      state_description =
+          "Continuous Health Tests Start: Start of continuous health tests.";
+      break;
+    case kDifEntropySrcMainFsmStateContHTRunning:
+      state_description =
+          "Continuous Health Tests Running: Health tests running in the "
+          "background.";
+      break;
+    case kDifEntropySrcMainFsmStateFWInsertStart:
+      state_description =
+          "Firmware Insert Start: Start of firmware insertion process.";
+      break;
+    case kDifEntropySrcMainFsmStateFWInsertMsg:
+      state_description =
+          "Firmware Insert Message: Firmware is providing data to the entropy "
+          "source.";
+      break;
+    case kDifEntropySrcMainFsmStateSha3MsgDone:
+      state_description =
+          "SHA-3 Message Done: SHA-3 message processing complete.";
+      break;
+    case kDifEntropySrcMainFsmStateSha3Process:
+      state_description =
+          "SHA-3 Process: SHA-3 hashing process actively running.";
+      break;
+    case kDifEntropySrcMainFsmStateSha3Valid:
+      state_description = "SHA-3 Valid: SHA-3 hash output is valid and ready.";
+      break;
+    case kDifEntropySrcMainFsmStateSha3Done:
+      state_description =
+          "SHA-3 Done: SHA-3 hashing process is fully complete.";
+      break;
+    case kDifEntropySrcMainFsmStateAlertState:
+      state_description = "Alert State: Entropy source has triggered an alert.";
+      break;
+    case kDifEntropySrcMainFsmStateAlertHang:
+      state_description =
+          "Alert Hang: Entropy source is in a hang state due to an alert.";
+      break;
+    case kDifEntropySrcMainFsmStateError:
+      state_description =
+          "Error: Generic error condition within the entropy source.";
+      break;
+    default:
+      state_description = "Unknown State";
+      break;
+  }
+  LOG_INFO("Current Entropy Source State: %s (0x%x)", state_description,
+           cur_state);
+
+  return OK_STATUS();
+}
+
+// Log alert fail test statistics
+status_t log_entropy_src_failures_and_alerts(
+    const dif_entropy_src_t *entropy_src) {
+  // Statistics for total failures
+  dif_entropy_src_health_test_stats_t stats;
+  TRY(dif_entropy_src_get_health_test_stats(entropy_src, &stats));
+
+  // Fail counts
+  dif_entropy_src_alert_fail_counts_t fail_counts;
+  TRY(dif_entropy_src_get_alert_fail_counts(entropy_src, &fail_counts));
+
+  // Iterate over all test variants (0..kDifEntropySrcTestNumVariants-1).
+  for (size_t i = 0; i < kDifEntropySrcTestNumVariants; ++i) {
+    switch ((dif_entropy_src_test_t)i) {
+      case kDifEntropySrcTestRepetitionCount:
+        LOG_INFO("Test Repetition Count (Index %u):", i);
+        LOG_INFO("Watermarks: high=%u, low=%u", stats.high_watermark[i],
+                 stats.low_watermark[i]);
+        LOG_INFO("All Fails: high=%u, low=%u", stats.high_fails[i],
+                 stats.low_fails[i]);
+        LOG_INFO("Alert Fails (RepetitionCount): high=%u, low=%u",
+                 fail_counts.high_fails[i], fail_counts.low_fails[i]);
+        break;
+      case kDifEntropySrcTestAdaptiveProportion:
+        LOG_INFO("Test Adaptive Proportion (Index %u):", i);
+        LOG_INFO("Watermarks: high=%u, low=%u", stats.high_watermark[i],
+                 stats.low_watermark[i]);
+        LOG_INFO("All Fails: high=%u, low=%u", stats.high_fails[i],
+                 stats.low_fails[i]);
+        LOG_INFO("Alert Fails (Adaptive Proportion): high=%u, low=%u",
+                 fail_counts.high_fails[i], fail_counts.low_fails[i]);
+        break;
+      case kDifEntropySrcTestBucket:
+        LOG_INFO("Test Bucket (Index %u):", i);
+        LOG_INFO("Watermarks: high=%u, low=%u", stats.high_watermark[i],
+                 stats.low_watermark[i]);
+        LOG_INFO("All Fails: high=%u, low=%u", stats.high_fails[i],
+                 stats.low_fails[i]);
+        LOG_INFO("Alert Fails (Bucket): high=%u, low=%u",
+                 fail_counts.high_fails[i], fail_counts.low_fails[i]);
+        break;
+      case kDifEntropySrcTestMarkov:
+        LOG_INFO("Test Markov (Index %u):", i);
+        LOG_INFO("Watermarks: high=%u, low=%u", stats.high_watermark[i],
+                 stats.low_watermark[i]);
+        LOG_INFO("All Fails: high=%u, low=%u", stats.high_fails[i],
+                 stats.low_fails[i]);
+        LOG_INFO("Alert Fails (Markov): high=%u, low=%u",
+                 fail_counts.high_fails[i], fail_counts.low_fails[i]);
+        break;
+      default:
+        LOG_INFO("Test %u: Unused test type, moving on...", i);
+        break;
+    }
+  }
+
+  return OK_STATUS();
+}
+
+// Function to disable entropy complex
+status_t disable_entropy_complex(void) {
+  // Using entropy test utility function to stop all EDN0, EDN1, CSRNG, and the
+  // Entropy
+  LOG_INFO("Disabling the entropy complex...");
+  return entropy_testutils_stop_all();
+}
+
+status_t configure_realistic_fips_health_tests(void) {
+  LOG_INFO("Configuring loose health test thresholds...");
+
+  // Check if entropy source is locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure Repetition Count Test
+  dif_entropy_src_health_test_config_t repcnt_test_config = {
+      .test_type = kDifEntropySrcTestRepetitionCount,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, repcnt_test_config));
+
+  // Configure Adaptive Proportion Test
+  dif_entropy_src_health_test_config_t adaptp_test_config = {
+      .test_type = kDifEntropySrcTestAdaptiveProportion,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, adaptp_test_config));
+
+  // Configure Bucket Test
+  dif_entropy_src_health_test_config_t bucket_test_config = {
+      .test_type = kDifEntropySrcTestBucket,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, bucket_test_config));
+
+  // Configure Markov Test
+  dif_entropy_src_health_test_config_t markov_test_config = {
+      .test_type = kDifEntropySrcTestMarkov,
+      .high_threshold = 512,
+      .low_threshold = 0,
+  };
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, markov_test_config));
+
+  return OK_STATUS();
+}
+
+status_t enable_realistic_entropy_src_fips_mode(
+    uint16_t health_test_window_size) {
+  LOG_INFO("Enabling ENTROPY_SRC in fips mode...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure ENTROPY_SRC in fips mode with health tests enabled
+  dif_entropy_src_config_t config = {
+      .fips_enable = true,
+      .route_to_firmware = false,
+      .fips_flag = true,
+      .rng_fips = true,
+      .bypass_conditioner = false,
+      .single_bit_mode = kDifEntropySrcSingleBitModeDisabled,
+      .health_test_threshold_scope = true,
+      .health_test_window_size = health_test_window_size,
+      .alert_threshold = 0xFF,
+  };
+
+  // Apply the configuration and enable ENTROPY_SRC
+  TRY(dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+
+  return OK_STATUS();
+}
+
+status_t set_threshold_and_enable_stringent_entropy_src_fips_mode(void) {
+  LOG_INFO("Enabling stringent ENTROPY_SRC in fips mode...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+
+  // Configure ENTROPY_SRC in fips mode with health tests enabled
+  dif_entropy_src_config_t config = {
+      .fips_enable = true,
+      .route_to_firmware = false,
+      .fips_flag = true,
+      .rng_fips = true,
+      .bypass_conditioner = false,
+      .single_bit_mode = kDifEntropySrcSingleBitModeDisabled,
+      .health_test_threshold_scope = true,
+      .health_test_window_size = 4096,
+      .alert_threshold = 1,
+  };
+
+  print_entropy_src_state(&entropy_src);
+  LOG_INFO("ENTROPY_SRC Configuration:");
+  LOG_INFO("fips_enable: %d", config.fips_enable);
+  LOG_INFO("route_to_firmware: %d", config.route_to_firmware);
+  LOG_INFO("fips_flag: %d", config.fips_flag);
+  LOG_INFO("rng_fips: %d", config.rng_fips);
+  LOG_INFO("bypass_conditioner: %d", config.bypass_conditioner);
+  LOG_INFO("single_bit_mode: %d", config.single_bit_mode);
+  LOG_INFO("health_test_threshold_scope: %d",
+           config.health_test_threshold_scope);
+  LOG_INFO("health_test_window_size: %d", config.health_test_window_size);
+  LOG_INFO("alert_threshold: %d", config.alert_threshold);
+
+  // Apply the configuration and enable ENTROPY_SRC
+  TRY(dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+  uint32_t errors;
+  TRY(dif_entropy_src_get_errors(&entropy_src, &errors));
+  LOG_INFO("ENTROPY_SRC Errors: 0x%x", errors);
+
+  dif_entropy_src_irq_state_snapshot_t irq_state;
+  TRY(dif_entropy_src_irq_get_state(&entropy_src, &irq_state));
+  LOG_INFO("ENTROPY_SRC IRQ State: 0x%x", irq_state);
+  CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+  // Debug try
+  dif_entropy_src_health_test_stats_t stats;
+  TRY(dif_entropy_src_get_health_test_stats(&entropy_src, &stats));
+
+  CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+
+  LOG_INFO("Done enabling stringent ENTROPY_SRC in fips mode...");
+  return OK_STATUS();
+}
+
+status_t configure_stringent_fips_health_tests(void) {
+  LOG_INFO("Configuring stringent health test thresholds...");
+
+  // Ensure the entropy source is not locked
+  bool is_locked;
+  TRY(dif_entropy_src_is_locked(&entropy_src, &is_locked));
+  TRY_CHECK(!is_locked,
+            "Entropy source is locked. Cannot configure ENTROPY_SRC");
+  // Configure Repetition Count Test with stringent threshold
+  dif_entropy_src_health_test_config_t repcnt_test_config = {
+      .test_type = kDifEntropySrcTestRepetitionCount,
+      .high_threshold = 50,
+      .low_threshold = 0,
+  };
+  LOG_INFO("Repetition Count Test Configuration:");
+  LOG_INFO("test_type: %d", repcnt_test_config.test_type);
+  LOG_INFO("high_threshold: %d", repcnt_test_config.high_threshold);
+  LOG_INFO("low_threshold: %d", repcnt_test_config.low_threshold);
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, repcnt_test_config));
+
+  // Configure Adaptive Proportion Test with stringent threshold
+  dif_entropy_src_health_test_config_t adaptp_test_config = {
+      .test_type = kDifEntropySrcTestAdaptiveProportion,
+      .high_threshold = 270,
+      .low_threshold = 0,
+  };
+  LOG_INFO("Adaptive Proportion Test Configuration:");
+  LOG_INFO("test_type: %d", adaptp_test_config.test_type);
+  LOG_INFO("high_threshold: %d", adaptp_test_config.high_threshold);
+  LOG_INFO("low_threshold: %d", adaptp_test_config.low_threshold);
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, adaptp_test_config));
+
+  // Configure Bucket Test with stringent threshold
+  dif_entropy_src_health_test_config_t bucket_test_config = {
+      .test_type = kDifEntropySrcTestBucket,
+      .high_threshold = 270,
+      .low_threshold = 0,
+  };
+  LOG_INFO("Bucket Test Configuration:");
+  LOG_INFO("test_type: %d", bucket_test_config.test_type);
+  LOG_INFO("high_threshold: %d", bucket_test_config.high_threshold);
+  LOG_INFO("low_threshold: %d", bucket_test_config.low_threshold);
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, bucket_test_config));
+
+  // Configure Markov Test with stringent threshold
+  dif_entropy_src_health_test_config_t markov_test_config = {
+      .test_type = kDifEntropySrcTestMarkov,
+      .high_threshold = 270,
+      .low_threshold = 0,
+  };
+  LOG_INFO("Markov Test Configuration:");
+  LOG_INFO("test_type: %d", markov_test_config.test_type);
+  LOG_INFO("high_threshold: %d", markov_test_config.high_threshold);
+  LOG_INFO("low_threshold: %d", markov_test_config.low_threshold);
+  TRY(dif_entropy_src_health_test_configure(&entropy_src, markov_test_config));
+
+  return OK_STATUS();
+}
+
+//
+// Custom version of entropy_testutils_auto_mode_init() for this test.
+//
+// Differences from the original version:
+// Does NOT reinitialize the entropy complex (to retain previous state).
+// Uses a custom reseed_interval (value = 4 instead of default 32).
+// Includes additional debug logs to help track hang behavior.
+
+status_t my_entropy_testutils_auto_mode_init(void) {
+  TRY(entropy_testutils_stop_all());
+  busy_spin_micros(kEntropySrcStartupWaitMicros);
+
+  print_entropy_src_state(&entropy_src);
+  // re-enable entropy src and csrng
+  dif_entropy_src_config_t config = entropy_testutils_config_default();
+  CHECK_DIF_OK(
+      dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+  print_entropy_src_state(&entropy_src);
+  busy_spin_micros(kEntropySrcStartupWaitMicros);
+  LOG_INFO("Configuring csrng:");
+  TRY(dif_csrng_configure(&csrng));
+  print_entropy_src_state(&entropy_src);
+
+  LOG_INFO("Configuring csrng done:");
+  LOG_INFO("Setting EDN in auto mode...");
+  CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+  const int my_reseed_interval = 4;
+  LOG_INFO("Setting EDN0 reseed_interval to %d", my_reseed_interval);
+  print_entropy_src_state(&entropy_src);
+  // Re-enable EDN0 in auto mode.
+  TRY(dif_edn_set_auto_mode(
+      &edn0,
+      (dif_edn_auto_params_t){
+          // EDN0 provides lower-quality entropy.  Let one generate command
+          // return 8 blocks
+          .instantiate_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdInstantiate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .reseed_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(
+                      kCsrngAppCmdReseed, kDifCsrngEntropySrcToggleEnable,
+                      /*cmd_len=*/0, /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .generate_cmd =
+              {
+                  // Generate 8 128-bit blocks.
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdGenerate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/8),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          // Reseed every 4 generates
+          .reseed_interval = my_reseed_interval,
+      }));
+
+  LOG_INFO("Setting edn0 done:");
+  print_entropy_src_state(&entropy_src);
+  // Re-enable EDN1 in auto mode.
+  TRY(dif_edn_set_auto_mode(
+      &edn1,
+      (dif_edn_auto_params_t){
+          // EDN1 provides highest-quality entropy.  Let one generate command
+          // return 1 block, and reseed after every generate.
+          .instantiate_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdInstantiate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .reseed_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(
+                      kCsrngAppCmdReseed, kDifCsrngEntropySrcToggleEnable,
+                      /*cmd_len=*/0, /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .generate_cmd =
+              {
+                  // Generate 1 128-bit block.
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdGenerate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/1),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          // Reseed after every 4 generates.
+          .reseed_interval = 4,
+      }));
+  LOG_INFO("Setting edn1 done:");
+  return OK_STATUS();
+}
+
+status_t enable_realistic_csrng_edns_auto_mode(void) {
+  LOG_INFO("Enabling EDNs in auto mode...");
+  CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
+  return OK_STATUS();
+}
+
+status_t enable_csrng_edns_auto_mode(void) {
+  LOG_INFO("Enabling EDNs in auto mode for fips(locally modified function)...");
+  CHECK_STATUS_OK(my_entropy_testutils_auto_mode_init());
+  LOG_INFO("Done Enabling EDNs in auto mode for fips...");
+  return OK_STATUS();
+}
+
+status_t test_and_verify_aes_operation(void) {
+  LOG_INFO("Triggering AES operation in ECB mode...");
+
+  // Setup ECB encryption transaction
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey256,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = kDifAesReseedPerBlock,
+      .manual_operation = kDifAesManualOperationAuto,
+      .reseed_on_key_change = false,
+      .ctrl_aux_lock = false,
+  };
+
+  // Configure encryption
+  CHECK_STATUS_OK(aes_testutils_setup_encryption(transaction, &aes));
+
+  // Wait for the encryption to complete
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusOutputValid, true, TIMEOUT);
+
+  // Decrypt and verify
+  CHECK_STATUS_OK(aes_testutils_decrypt_ciphertext(transaction, &aes));
+
+  LOG_INFO("AES operation in ECB mode verified successfully");
+  return OK_STATUS();
+}
+
+static bool poll_for_output_valid_or_starve(const dif_aes_t *aes) {
+  const uint32_t kMaxRetries = 1000;
+  for (uint32_t i = 0; i < kMaxRetries; i++) {
+    bool out_valid = false;
+    dif_result_t dif_res =
+        dif_aes_get_status(aes, kDifAesStatusOutputValid, &out_valid);
+    if (dif_res != kDifOk) {
+      LOG_ERROR("dif_aes_get_status() = %d while polling OUTPUT_VALID.",
+                dif_res);
+      return false;
+    }
+    if (out_valid) {
+      return true;
+    }
+    // if no out_valid wait for 3ms
+    busy_spin_micros(3000);
+  }
+  // Timed out after kMaxRetries of 1000 * 3000 us i.e 3 sec
+  return false;
+}
+
+#define AES_OPERATION_HANG_STATUS_VALUE 0x700B
+static inline status_t aes_starve_ok_status(void) {
+  status_t st;
+  st.value = AES_OPERATION_HANG_STATUS_VALUE;
+  return st;
+}
+
+static inline bool status_is_aes_starve_ok(status_t s) {
+  return (s.value == AES_OPERATION_HANG_STATUS_VALUE);
+}
+
+status_t test_and_verify_aes_operation_hang(void) {
+  LOG_INFO("Perform AES-256 in ECB mode");
+
+  // Construct a 256-bit software key share
+  // For a known 256-bit key: kAesModesKey256 (32 bytes)
+  // and a share array kKeyShare1[] (32 bytes).
+  static const uint8_t kKeyShare1[32] = {
+      0x0f, 0x1f, 0x2f, 0x3f, 0x4f, 0x5f, 0x6f, 0x7f, 0x8f, 0x9f, 0xaf,
+      0xbf, 0xcf, 0xdf, 0xef, 0xff, 0x0a, 0x1a, 0x2a, 0x3a, 0x4a, 0x5a,
+      0x6a, 0x7a, 0x8a, 0x9a, 0xaa, 0xba, 0xca, 0xda, 0xea, 0xfa};
+
+  dif_aes_key_share_t key;
+  uint8_t key_share0[32];
+  for (int i = 0; i < 32; i++) {
+    key_share0[i] = kAesModesKey256[i] ^ kKeyShare1[i];
+  }
+  memcpy(key.share0, key_share0, 16);
+  memcpy(key.share1, &key_share0[16], 16);
+
+  // Prepare an AES transaction for 256-bit ECB encryption.
+  dif_aes_transaction_t transaction = {
+      .operation = kDifAesOperationEncrypt,
+      .mode = kDifAesModeEcb,
+      .key_len = kDifAesKey256,
+      .key_provider = kDifAesKeySoftwareProvided,
+      .mask_reseeding = kDifAesReseedPerBlock,
+      .manual_operation = kDifAesManualOperationAuto,
+      .reseed_on_key_change = false,
+      .ctrl_aux_lock = false,
+  };
+
+  // Single-block plaintext (16 bytes).
+  dif_aes_data_t in_data;
+  memcpy(in_data.data, kAesModesPlainText, 16);
+
+  // Start AES encryption
+  LOG_INFO("Starting AES encryption...");
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, TIMEOUT);
+  CHECK_DIF_OK(dif_aes_start(&aes, &transaction, &key, NULL));
+
+  // Wait for InputReady, load the plaintext block.
+  LOG_INFO("Wait for AES InputReady, then load the single-block plaintext...");
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusInputReady, true, TIMEOUT);
+  CHECK_DIF_OK(dif_aes_load_data(&aes, in_data));
+  LOG_INFO("Plaintext block loaded for encryption.");
+
+  // Poll for OutputValid or starve
+  LOG_INFO("Polling for OutputValid in encryption...", TIMEOUT);
+  bool got_output_valid = poll_for_output_valid_or_starve(&aes);
+
+  if (!got_output_valid) {
+    // starved; we shall treat it as pass
+    LOG_INFO(
+        "No OUTPUT_VALID... EDN starved during encryption expected pass "
+        "scenario");
+    return aes_starve_ok_status();
+  }
+
+  // If we do get OUTPUT_VALID
+  dif_aes_data_t out_data;
+  CHECK_DIF_OK(dif_aes_read_output(&aes, &out_data));
+
+  // End encryption transaction
+  CHECK_DIF_OK(dif_aes_end(&aes));
+  LOG_INFO("AES encryption transaction ended successfully.");
+
+  // Switch to AES decryption
+  LOG_INFO("Switching to AES decryption mode...");
+  transaction.operation = kDifAesOperationDecrypt;
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, TIMEOUT);
+  CHECK_DIF_OK(dif_aes_start(&aes, &transaction, &key, NULL));
+
+  // Wait for InputReady, load the ciphertext
+  LOG_INFO("Waiting for InputReady to load ciphertext for decryption...");
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusInputReady, true, TIMEOUT);
+  CHECK_DIF_OK(dif_aes_load_data(&aes, out_data));
+
+  // Poll for OutputValid or starve
+  LOG_INFO("Polling for OutputValid in decryption...");
+  got_output_valid = poll_for_output_valid_or_starve(&aes);
+
+  if (!got_output_valid) {
+    // starved; we shall treat it as pass
+    LOG_INFO(
+        "EDN starved during decryption expected pass "
+        "scenario");
+    return aes_starve_ok_status();
+  }
+
+  // If we are here means we have a decrypted block
+  dif_aes_data_t dec_data;
+  CHECK_DIF_OK(dif_aes_read_output(&aes, &dec_data));
+  LOG_INFO("Decryption output read from hardware.");
+
+  uint8_t *dec_bytes = (uint8_t *)dec_data.data;
+
+  // End the AES decryption transaction
+  CHECK_DIF_OK(dif_aes_end(&aes));
+  LOG_INFO("ECB decryption transaction ended successfully.");
+
+  // Compare the decrypted block with the original plaintext
+  LOG_INFO("Verifying decrypted block with original plaintext?");
+  if (memcmp(dec_data.data, kAesModesPlainText, 16) != 0) {
+    LOG_ERROR("Decryption mismatch => final plaintext != original!");
+    for (int i = 0; i < 16; i++) {
+      LOG_ERROR("Byte[%d]: got=0x%02x, want=0x%02x", i, dec_bytes[i],
+                kAesModesPlainText[i]);
+    }
+    return INTERNAL();
+  }
+
+  LOG_INFO("AES operation in ECB mode verified successfully");
+  return OK_STATUS();
+}
+
+status_t test_and_verify_otbn_operation(void) {
+  LOG_INFO("Starting OTBN randomness test...(expect completion)");
+
+  // Start the OTBN randomness test with one iteration
+  otbn_randomness_test_start(&otbn, 1);
+  busy_spin_micros(9500);
+
+  // Wait for a timeout period to check if OTBN is still busy
+  const uint32_t kIterateMaxRetries = 10;
+  bool otbn_busy = true;
+  uint32_t iter_cntr = kIterateMaxRetries;
+
+  dif_otbn_status_t otbn_status;
+
+  while (iter_cntr > 0) {
+    // Check if OTBN is still busy
+    TRY(dif_otbn_get_status(&otbn, &otbn_status));
+
+    // Check if any of the busy status flags are set
+    otbn_busy = (otbn_status &
+                 (kDifOtbnStatusBusyExecute | kDifOtbnStatusBusySecWipeDmem |
+                  kDifOtbnStatusBusySecWipeImem)) != 0;
+    // If OTBN is no longer busy, it has completed successfully
+    // Break the loop
+    if (!otbn_busy) {
+      break;
+    }
+    iter_cntr--;
+  }
+
+  // After timeout, if OTBN is not busy, we shall conclude it's
+  // completed running, lets check final status
+  if (!otbn_busy) {
+    // Print OTBN status and error bits
+    dif_otbn_err_bits_t otbn_err_bits;
+    TRY(dif_otbn_get_err_bits(&otbn, &otbn_err_bits));
+    LOG_INFO("OTBN status: 0x%x", otbn_status);
+    LOG_INFO("OTBN error bits: 0x%x", otbn_err_bits);
+
+    LOG_INFO("OTBN program ran as expected with no hang");
+
+    // Double check to confirm no other unexpected errors are
+    // present leading to hang
+    if (otbn_err_bits != kDifOtbnErrBitsNoError) {
+      LOG_ERROR("OTBN encountered unexpected errors");
+
+      // Optionally, decode and print specific error bits
+      if (otbn_err_bits & kDifOtbnErrBitsBadDataAddr) {
+        LOG_ERROR("A BAD_DATA_ADDR error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsBadInsnAddr) {
+        LOG_ERROR("A BAD_INSN_ADDR error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsCallStack) {
+        LOG_ERROR("A CALL_STACK error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsIllegalInsn) {
+        LOG_ERROR("An ILLEGAL_INSN error was observed");
+      }
+      if (otbn_err_bits & kDifOtbnErrBitsLoop) {
+        LOG_ERROR("A LOOP error was observed");
+      }
+
+      otbn_randomness_test_end(&otbn, 1);
+      return INTERNAL();
+    }
+    return OK_STATUS();
+  } else {
+    // If still busy after kIterateMaxRetries, OTBN has not completed and failed
+    LOG_ERROR("OTBN program did not complete run");
+    return INTERNAL();
+  }
+}
+
+status_t wait_for_recoverable_alert(void) {
+  LOG_INFO("Waiting for Entropy Source recoverable alert to be asserted...");
+
+  while (true) {
+    // Poll the recoverable alerts
+    uint32_t alerts = 0;
+    dif_result_t res =
+        dif_entropy_src_get_recoverable_alerts(&entropy_src, &alerts);
+    if (res != kDifOk) {
+      LOG_ERROR("dif_entropy_src_get_recoverable_alerts failed (res=%d)", res);
+      return INTERNAL();
+    }
+
+    if (alerts != 0) {
+      // if found a recoverable alert => log & break
+      LOG_INFO("Recoverable alert detected. Alerts: 0x%x", alerts);
+
+      print_entropy_src_state(&entropy_src);
+      log_entropy_src_failures_and_alerts(&entropy_src);
+
+      const uint32_t kEsMainSmAlertBit =
+          ENTROPY_SRC_RECOV_ALERT_STS_ES_MAIN_SM_ALERT_BIT;
+
+      if ((alerts & kEsMainSmAlertBit) != 0) {
+        LOG_INFO("ES_MAIN_SM_ALERT bit is set, as expected.");
+      } else {
+        LOG_INFO("ES_MAIN_SM_ALERT bit not set, continuing anyway...");
+      }
+
+      // Acknowledge the Health Test Failed interrupt
+      dif_result_t ack_res = dif_entropy_src_irq_acknowledge(
+          &entropy_src, kDifEntropySrcIrqEsHealthTestFailed);
+      if (ack_res != kDifOk) {
+        LOG_INFO("Failed to acknowledge HealthTestFailed IRQ (res=%d).",
+                 ack_res);
+      } else {
+        LOG_INFO("HealthTestFailed IRQ acknowledged.");
+      }
+      break;
+    }
+    // If no alerts --> sleep and poll again
+    busy_spin_micros(50000);
+  }
+
+  LOG_INFO("Done waiting for Entropy Source recoverable alert (found).");
+  return OK_STATUS();
+}
+
+status_t start_otbn_program(void) {
+  LOG_INFO("Starting OTBN randomness test...");
+
+  // Start the OTBN randomness test with one iteration
+  otbn_randomness_test_start(&otbn, 1);
+
+  LOG_INFO("OTBN randomness test started");
+  return OK_STATUS();
+}
+
+status_t execute_test(void) {
+  // Initialize peripherals and test environments
+  CHECK_STATUS_OK(init_test_environment());
+
+  // Step 8:  Repeat the procedure with different health test window sizes for
+  // FIPS mode.
+  uint16_t window_sizes[5] = {256, 512, 1024, 2048, 4096};
+  for (uint16_t i = 0; i < ARRAYSIZE(window_sizes); i++) {
+    LOG_INFO("Testing health test window size value = %u", window_sizes[i]);
+    // Step 1: Disable the entropy complex
+    CHECK_STATUS_OK(disable_entropy_complex());
+
+    // Step 2: Configure realistic health test threshold values for fips FIPS/CC
+    // compliant mode mode
+    CHECK_STATUS_OK(configure_realistic_fips_health_tests());
+
+    // Step 3: Enable ENTROPY_SRC in FIPS mode
+    CHECK_STATUS_OK(enable_realistic_entropy_src_fips_mode(window_sizes[i]));
+
+    // Step 4: Enable CSRNG
+    // Step 5: Enable both EDNs in auto request mode
+    CHECK_STATUS_OK(enable_realistic_csrng_edns_auto_mode());
+
+    // Step 6: Trigger the execution of a cryptographic hardware block to stess
+    // test the entropy (e.g. AES, OTBN) to test EDN0
+    // Step 7: Verify the entropy consuming endpoint(e.g. AES, OTBN)
+    // finishes its operation
+    CHECK_STATUS_OK(test_and_verify_aes_operation());
+    CHECK_STATUS_OK(test_and_verify_aes_operation());
+    CHECK_STATUS_OK(test_and_verify_aes_operation());
+    CHECK_STATUS_OK(test_and_verify_otbn_operation());
+    CHECK_STATUS_OK(test_and_verify_otbn_operation());
+    CHECK_STATUS_OK(test_and_verify_otbn_operation());
+  }
+  LOG_INFO(
+      "Realistic Test successfully passed with different health test window "
+      "sizes...");
+
+  for (uint16_t iter = 0; iter < 1; iter++) {
+    LOG_INFO("iter = %d", iter);
+
+    // Step 9: Disable the entropy complex again
+    LOG_INFO("Step 9: Disable the entropy complex again. iter = %d", iter);
+    CHECK_STATUS_OK(disable_entropy_complex());
+
+    // Step 10: Configure unrealistically stringent health test threshold values
+    // for FIPS mode
+    LOG_INFO(
+        "Step 10: Configure unrealistically stringent health test threshold "
+        "values. iter = %d",
+        iter);
+    CHECK_STATUS_OK(configure_stringent_fips_health_tests());
+
+    // Step 11: Configure a low alert threshold value in the ALERT_THRESHOLD
+    // register Step 12: Enable ENTROPY_SRC in FIPS mode
+    LOG_INFO(
+        "Step 11 and Step 12:Configure a low alert threshold value in the "
+        "ALERT_THRESHOLD and enable entropy_src. iter = %d",
+        iter);
+    CHECK_STATUS_OK(set_threshold_and_enable_stringent_entropy_src_fips_mode());
+
+    //  Wait for Entropy Source startup tests to complete
+    busy_spin_micros(kEntropySrcStartupWaitMicros);
+    // Step 13: Enable CSRNG
+    // Step 14: Enable both EDNs in auto request mode and with low values for
+    // the generate length parameter to request fresh entropy more often
+    LOG_INFO(
+        "Step 13 and Step 14:Enable CSRNG and both EDNs in auto request mode. "
+        "iter = %d",
+        iter);
+    CHECK_STATUS_OK(enable_csrng_edns_auto_mode());
+    CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+
+    busy_spin_micros(kEntropySrcStartupWaitMicros);
+
+    // Step 15: Trigger the execution of various cryptographic hardware blocks
+    // consuming entropy to stress test the entropy complex
+    LOG_INFO("Step 15 skipped!");
+    CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+
+    busy_spin_micros(kEntropySrcStartupWaitMicros);
+    // Step 16: Verify that ENTROPY_SRC triggers a recoverable alert and sets
+    // the RECOV_ALERT_STS.ES_MAIN_SM_ALERT bit
+    CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+    // Find if we get recoverable alert and untill we hit
+    // recoverable alert we do not proceed
+    LOG_INFO("Step 16: Wait for recoverable alert");
+    LOG_INFO("Step 16:iter = %d", iter);
+    status_t st = wait_for_recoverable_alert();
+    if (!status_ok(st)) {
+      LOG_ERROR("wait_for_recoverable_alert() error=0x%x", st.value);
+      return INTERNAL();
+    }
+    CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+
+    // Step 17 Verify that various entropy consuming endpoints hang as
+    // ENTROPY_SRC stops generating entropy after triggering the recoverable
+    // alert
+    for (uint16_t i = 0; i < 500; i++) {
+      status_t st = test_and_verify_aes_operation_hang();
+      if (status_is_aes_starve_ok(st)) {
+        LOG_INFO(
+            "Step 17: Starve event encountered confirming AES expected hang");
+        break;
+      }
+      TRY(st);
+    }
+    CHECK_STATUS_OK(print_entropy_src_state(&entropy_src));
+  }
+
+  LOG_INFO("Entropy source fips mode health test completed");
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Entering Entropy Source FIPS Mode Health Test");
+
+  return status_ok(execute_test());
+}
diff --git a/sw/device/tests/entropy_src_fw_observe_many_contiguous.c b/sw/device/tests/entropy_src_fw_observe_many_contiguous.c
index a84a54a851dbf..ec31fa436f529 100644
--- a/sw/device/tests/entropy_src_fw_observe_many_contiguous.c
+++ b/sw/device/tests/entropy_src_fw_observe_many_contiguous.c
@@ -27,6 +27,11 @@ enum {
    * The number of contiguous samples we want to capture.
    */
   kContiguousSamplesCount = 1024,
+  /**
+   * The number of contiguous samples we want to capture when running on
+   * Verilator.
+   */
+  kVerilatorContiguousSamplesCount = 8,
   /*
    * Timeout to read kContiguousSamplesCount.
    */
@@ -203,10 +208,19 @@ bool test_main(void) {
       kDifEntropySrcSingleBitMode1,        kDifEntropySrcSingleBitMode2,
       kDifEntropySrcSingleBitMode3,
   };
+  uint32_t contiguous_sample_count = kContiguousSamplesCount;
+  if (kDeviceType == kDeviceSimVerilator) {
+    // If running on Verilator, then entropy is observed much more slowly,
+    // in addition to the standard simulator overhead. Observing 1024 words
+    // would take around 30+ seconds each, which would take dozens of hours
+    // to simulate. We only care that entropy observation works on Verilator
+    // and not that it works at a given rate, so we just observe 8 samples.
+    contiguous_sample_count = kVerilatorContiguousSamplesCount;
+  }
   status_t test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(kModes); i++) {
     EXECUTE_TEST(test_result, firmware_override_observe,
-                 kContiguousSamplesCount, kModes[i], kTimeoutUsec,
+                 contiguous_sample_count, kModes[i], kTimeoutUsec,
                  kRepeatCount);
   }
 
diff --git a/sw/device/tests/entropy_src_fw_override_test.c b/sw/device/tests/entropy_src_fw_override_test.c
index c29ca2c4b62af..79d5519f5dd17 100644
--- a/sw/device/tests/entropy_src_fw_override_test.c
+++ b/sw/device/tests/entropy_src_fw_override_test.c
@@ -66,6 +66,30 @@ enum {
    * firmware override mode.
    */
   kEntropyFifoBufferSize = 12,
+  /**
+   * The amount of random numbers to generate as entropy consumers in each test.
+   */
+  kRandomNumberCount = 16,
+  /*
+   * Timeout to generate a random number in micro seconds.
+   */
+  kRandomNumberTimeoutUsec = 100 * 1000,
+  /**
+   * Timeout to generate a random number in micro seconds when running in a
+   * Verilator simulation environment. Verilator observes entropy more slowly
+   * than other environments, and so is given a longer timeout.
+   */
+  kVerilatorRandomNumberTimeoutUsec = 48 * 100 * 1000,
+  /**
+   * Timeout to run AES testutils in micro seconds.
+   */
+  kAesTestutilsTimeoutUsec = 1 * 1000 * 1000,
+  /**
+   * Timeout to run AES testutils in micro seconds when running in a
+   * Verilator simulation environment. Verilator observes entropy more slowly
+   * than other environments, and so is given a longer timeout.
+   */
+  kVerilatorAesTestutilsTimeoutUsec = 48 * 1000 * 1000,
 };
 
 static dif_aes_t aes;
@@ -360,10 +384,17 @@ status_t firmware_override_extract_insert(
 
   // Generate some random numbers.
   LOG_INFO("Generating random numbers...");
+  uint32_t rnd_timeout_usec = kRandomNumberTimeoutUsec;
+  if (kDeviceType == kDeviceSimVerilator) {
+    // Simulation on Verilator generates entropy much more slowly than other
+    // execution environments. As a result, the timeout to generate random
+    // numbers is increased only when running on Verilator.
+    rnd_timeout_usec = kVerilatorRandomNumberTimeoutUsec;
+  }
   uint32_t data;
-  for (size_t i = 0; i < 16; i++) {
+  for (size_t i = 0; i < kRandomNumberCount; i++) {
     TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex,
-                                            /*timeout_usec=*/100 * 1000,
+                                            /*timeout_usec=*/rnd_timeout_usec,
                                             &data));
   }
 
@@ -386,9 +417,16 @@ status_t firmware_override_extract_insert(
   };
 
   LOG_INFO("Running AES...");
+  uint32_t aes_timeout_usec = kAesTestutilsTimeoutUsec;
+  if (kDeviceType == kDeviceSimVerilator) {
+    // Simulation on Verilator generates entropy much more slowly than other
+    // execution environments. As a result, the timeout for AES testuils is
+    // increased only when running on Verilator.
+    aes_timeout_usec = kVerilatorAesTestutilsTimeoutUsec;
+  }
   TRY(aes_testutils_setup_encryption(transaction, &aes));
   AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusOutputValid, true,
-                                /*timeout_usec=*/1 * 1000 * 1000);
+                                /*timeout_usec=*/aes_timeout_usec);
   TRY(aes_testutils_decrypt_ciphertext(transaction, &aes));
 
   // Run KMAC
@@ -466,20 +504,39 @@ bool test_main(void) {
       kDifEntropySrcSingleBitMode3,
   };
 
+  size_t entropy_src_mode_count = ARRAYSIZE(kModes);
+
+  // If running on Verilator, then we only test ModeDisabled and Mode0, since
+  // the subsequent 3 modes are very similar and are much slower, causing
+  // Verilator simulation to take an impractical amount of time.
+  if (kDeviceType == kDeviceSimVerilator) {
+    entropy_src_mode_count = 2;
+  }
+
   status_t test_result = OK_STATUS();
 
-  for (size_t i = 0; i < ARRAYSIZE(kModes); i++) {
+  for (size_t i = 0; i < entropy_src_mode_count; i++) {
     EXECUTE_TEST(test_result, firmware_override_extract_insert, kModes[i],
                  false, false);
     EXECUTE_TEST(test_result, firmware_override_extract_insert, kModes[i], true,
                  false);
   }
+
   // Rerun the test with single bit mode disabled, this time we reenable the
   // entropy_src without reenabling the rest of the entropy complex.
   EXECUTE_TEST(test_result, firmware_override_extract_insert,
                kDifEntropySrcSingleBitModeDisabled, false, true);
   EXECUTE_TEST(test_result, firmware_override_extract_insert,
                kDifEntropySrcSingleBitModeDisabled, true, true);
+
+  if (kDeviceType == kDeviceSimVerilator) {
+    // If running on Verilator, then we skip the final phase of testing,
+    // since entropy is generated much more slowly on Verilator and we do not
+    // learn a lot of useful information from running these tests. This stops
+    // simulaton on Verilator taking an impractical amount of time.
+    return status_ok(test_result);
+  }
+
   // Rerun the test with single bit mode disabled,
   // this time with an output delay.
   fw_ov_insert_wait_enabled = true;
diff --git a/sw/device/tests/flash_ctrl_clock_freqs_test.c b/sw/device/tests/flash_ctrl_clock_freqs_test.c
index 5c72c17eff69a..dcbac70134c7a 100644
--- a/sw/device/tests/flash_ctrl_clock_freqs_test.c
+++ b/sw/device/tests/flash_ctrl_clock_freqs_test.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/arch/boot_stage.h"
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_clkmgr.h"
@@ -38,10 +39,6 @@ enum {
   kFlashDataBank0 = 0,
   kFlashDataBank1 = 1,
   kRegionBaseBank0Page0Index = 0,
-  kRegionBaseBank1Page0Index = 256,
-  kRegionBaseBank1Page255Index = 511,
-  kFlashBank0DataRegion = 0,
-  kFlashBank1DataRegion = 1,
   kPartitionId = 0,
   kRegionSize = 1,
   kDataSize = 16,
@@ -49,9 +46,15 @@ enum {
   kNumLoops = 10,
 };
 
+static dif_flash_ctrl_device_info_t flash_info;
 static dif_flash_ctrl_state_t flash_state;
 static uint32_t test_data[kDataSize];
 
+static uint32_t flash_bank_0_data_region;
+static uint32_t flash_bank_1_data_region;
+static uint32_t flash_bank_1_page_index;
+static uint32_t flash_bank_1_page_index_last;
+
 /**
  * Check data read from host interface against known data.
  */
@@ -120,7 +123,7 @@ static void do_data_partition_test(uint32_t bank_number) {
         .rd_en = kMultiBitBool4True};
 
     CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup_properties(
-        &flash_state, kRegionBaseBank0Page0Index, kFlashBank0DataRegion,
+        &flash_state, kRegionBaseBank0Page0Index, flash_bank_0_data_region,
         kRegionSize, region_properties, &address));
 
     uint32_t readback_data[kDataSize];
@@ -132,13 +135,13 @@ static void do_data_partition_test(uint32_t bank_number) {
   } else if (bank_number == 1) {
     for (int i = 0; i < 2; ++i) {
       uint32_t page_index =
-          (i == 0) ? kRegionBaseBank1Page0Index : kRegionBaseBank1Page255Index;
+          (i == 0) ? flash_bank_1_page_index : flash_bank_1_page_index_last;
       for (int j = 0; j < kDataSize; ++j) {
-        test_data[i] = rand_testutils_gen32();
+        test_data[j] = rand_testutils_gen32();
       }
       uint32_t address = 0;
       CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
-          &flash_state, page_index, kFlashBank1DataRegion, kRegionSize,
+          &flash_state, page_index, flash_bank_1_data_region, kRegionSize,
           &address));
       CHECK_STATUS_OK(flash_ctrl_testutils_erase_page(
           &flash_state, address, kPartitionId, kDifFlashCtrlPartitionTypeData));
@@ -159,18 +162,37 @@ static void do_data_partition_test(uint32_t bank_number) {
 }
 
 bool test_main(void) {
+  flash_info = dif_flash_ctrl_get_device_info();
+
+  // Determine the region index and page index to use for tests.
+  // Test data page used for flash bank 1 should be the lowest and highest
+  // usable page.
+  if (kBootStage != kBootStageOwner) {
+    flash_bank_0_data_region = 0;
+    flash_bank_1_page_index = flash_info.data_pages;
+  } else {
+    // If we boot up in owner stage, the first 2 regions will be used by
+    // ROM_EXT.
+    flash_bank_0_data_region = 2;
+    // First 0x20 pages are configured by ROM_EXT. To avoid conflicts, skip over
+    // these pages.
+    flash_bank_1_page_index = flash_info.data_pages + 0x20;
+  }
+  flash_bank_1_data_region = flash_bank_0_data_region + 1;
+  flash_bank_1_page_index_last = flash_info.data_pages * 2 - 1;
+
   dif_clkmgr_t clkmgr;
   CHECK_DIF_OK(dif_clkmgr_init(
       mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
 
-  CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr, kDifToggleEnabled));
+  CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr));
 
   CHECK_DIF_OK(dif_flash_ctrl_init_state(
       &flash_state,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
 
   for (int i = 0; i < kNumLoops; ++i) {
-    if (kDeviceType != kDeviceSilicon) {
+    if (kBootStage != kBootStageOwner) {
       do_info_partition_test(kFlashInfoPageIdCreatorSecret);
       do_info_partition_test(kFlashInfoPageIdOwnerSecret);
       do_info_partition_test(kFlashInfoPageIdIsoPart);
diff --git a/sw/device/tests/flash_ctrl_idle_low_power_test.c b/sw/device/tests/flash_ctrl_idle_low_power_test.c
index f380f55db51d8..c3ba21d06bc6d 100644
--- a/sw/device/tests/flash_ctrl_idle_low_power_test.c
+++ b/sw/device/tests/flash_ctrl_idle_low_power_test.c
@@ -22,7 +22,7 @@
 #include "sw/device/lib/testing/autogen/isr_testutils.h"
 
 OTTF_DEFINE_TEST_CONFIG();
-
+static uint32_t flash_region_index;
 static dif_rv_plic_t plic;
 static dif_aon_timer_t aon;
 static dif_rv_core_ibex_t rv_core_ibex;
@@ -43,8 +43,10 @@ static top_earlgrey_plic_peripheral_t peripheral_serviced;
 static dif_aon_timer_irq_t irq_serviced;
 
 enum {
-  kFlashDataRegion = 0,
-  kRegionBasePageIndex = 256,  // First page in bank 1 (avoids program code.)
+  //  kFlashDataRegion = 7,  // The ROM_EXT protects itself using regions 0-1.
+  kFlashCtrlParamNumRegions = 7,
+  kRegionBasePageIndex =
+      256 + 32,  // First non-ROM_EXT page in bank 1 (avoids program code.)
   kPartitionId = 0,
   kRegionSize = 1,
   kNumWords = 128,
@@ -125,8 +127,24 @@ bool test_main(void) {
   rstmgr_reset_info = rstmgr_testutils_reason_get();
 
   uint32_t address = 0;
+
+  for (uint32_t region = 0; region < kFlashCtrlParamNumRegions + 1; region++) {
+    bool locked;
+    LOG_INFO("Testing  REGION 0x%x", region);
+    CHECK_DIF_OK(dif_flash_ctrl_data_region_is_locked(&flash, region, &locked));
+    if (!locked) {
+      // We can use this region
+      flash_region_index = region;
+      LOG_INFO("This region is unlocked REGION 0x%x", region);
+      break;
+    }
+  }
+
+  //  CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
+  //    &flash, kRegionBasePageIndex, kFlashDataRegion, kRegionSize, &address));
+
   CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
-      &flash, kRegionBasePageIndex, kFlashDataRegion, kRegionSize, &address));
+      &flash, kRegionBasePageIndex, flash_region_index, kRegionSize, &address));
 
   if (rstmgr_reset_info == kDifRstmgrResetInfoPor) {
     // Create data. Random data will be different than
diff --git a/sw/device/tests/flash_ctrl_info_access_lc.c b/sw/device/tests/flash_ctrl_info_access_lc.c
index cf2e2384f1de1..0dcdc8339d74a 100644
--- a/sw/device/tests/flash_ctrl_info_access_lc.c
+++ b/sw/device/tests/flash_ctrl_info_access_lc.c
@@ -12,6 +12,7 @@
 #include "sw/device/lib/testing/lc_ctrl_testutils.h"
 #include "sw/device/lib/testing/rv_plic_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -72,15 +73,28 @@ static volatile bool fired_irqs[kNumIRQs];
  *
  * This function overrides the default OTTF external ISR.
  */
-void ottf_external_isr(uint32_t *exc_info) {
-  top_earlgrey_plic_peripheral_t peripheral_serviced;
-  dif_flash_ctrl_irq_t irq_serviced;
-  // Instruct the ISR to mute any status interrupt that is firing.
-  isr_testutils_flash_ctrl_isr(plic_ctx, flash_ctx, true, &peripheral_serviced,
-                               &irq_serviced);
-  CHECK(peripheral_serviced == kTopEarlgreyPlicPeripheralFlashCtrl,
-        "Interurpt from unexpected peripheral: %d", peripheral_serviced);
-  fired_irqs[irq_serviced] = true;
+bool ottf_handle_irq(uint32_t *exc_info,
+                     top_earlgrey_plic_peripheral_t peripheral,
+                     dif_rv_plic_irq_id_t plic_id) {
+  if (peripheral != kTopEarlgreyPlicPeripheralFlashCtrl) {
+    return false;
+  }
+
+  dif_flash_ctrl_irq_t irq =
+      (dif_flash_ctrl_irq_t)(plic_id - flash_ctx.plic_flash_ctrl_start_irq_id);
+  fired_irqs[irq] = true;
+
+  // Either acknowledge or mute IRQ.
+  dif_irq_type_t type;
+  CHECK_DIF_OK(dif_flash_ctrl_irq_get_type(flash_ctx.flash_ctrl, irq, &type));
+  if (type == kDifIrqTypeStatus) {
+    CHECK_DIF_OK(dif_flash_ctrl_irq_set_enabled(flash_ctx.flash_ctrl, irq,
+                                                kDifToggleDisabled));
+  } else {
+    CHECK_DIF_OK(dif_flash_ctrl_irq_acknowledge(flash_ctx.flash_ctrl, irq));
+  }
+
+  return true;
 }
 
 /**
@@ -119,7 +133,8 @@ static void flash_ctrl_init_with_event_irqs(mmio_region_t base_addr,
  */
 static void compare_and_clear_irq_variables(void) {
   for (int i = 0; i < kNumIRQs; ++i) {
-    CHECK(expected_irqs[i] == fired_irqs[i], "expected IRQ mismatch = %d", i);
+    CHECK(expected_irqs[i] == fired_irqs[i], "IRQ %d was %sexpected", i,
+          expected_irqs[i] ? "" : "not ");
   }
   clear_irq_variables();
 }
@@ -165,9 +180,13 @@ static void test_info_part(uint32_t partition_number, const uint32_t *test_data,
     compare_and_clear_irq_variables();
     LOG_INFO("partition:%1d write done", partition_number);
   } else {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
     CHECK_STATUS_NOT_OK(flash_ctrl_testutils_write(
         &flash_state, address, kPartitionId, test_data,
         kDifFlashCtrlPartitionTypeInfo, kInfoSize));
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdFlashCtrlRecovErr));
     LOG_INFO("partition:%1d write not allowed", partition_number);
   }
 
@@ -192,9 +211,13 @@ static void test_info_part(uint32_t partition_number, const uint32_t *test_data,
     CHECK_ARRAYS_EQ(readback_data, test_data, kInfoSize);
     LOG_INFO("partition:%1d read done", partition_number);
   } else {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
     CHECK_STATUS_NOT_OK(flash_ctrl_testutils_read(
         &flash_state, address, kPartitionId, readback_data,
         kDifFlashCtrlPartitionTypeInfo, kInfoSize, 1));
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdFlashCtrlRecovErr));
     LOG_INFO("partition:%1d read not allowed", partition_number);
   }
 }
diff --git a/sw/device/tests/flash_ctrl_mem_protection_test.c b/sw/device/tests/flash_ctrl_mem_protection_test.c
index 7dfb2a42359fd..043aeb56b698a 100644
--- a/sw/device/tests/flash_ctrl_mem_protection_test.c
+++ b/sw/device/tests/flash_ctrl_mem_protection_test.c
@@ -10,6 +10,7 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "flash_ctrl_regs.h"
@@ -161,10 +162,14 @@ static void test_mem_access(test_t region) {
       LOG_INFO("test_mem_access: page %d write complete",
                region.page_start + i);
     } else {
+      CHECK_STATUS_OK(
+          ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
       CHECK_STATUS_NOT_OK(flash_ctrl_testutils_write(
           &flash, start_epage,
           /*partition_id=*/0, wdata, kDifFlashCtrlPartitionTypeData,
           ARRAYSIZE(wdata)));
+      CHECK_STATUS_OK(ottf_alerts_expect_alert_finish(
+          kTopEarlgreyAlertIdFlashCtrlRecovErr));
       LOG_INFO("test_mem_access: page %d write is not allowed",
                region.page_start + i);
     }
@@ -179,10 +184,14 @@ static void test_mem_access(test_t region) {
       LOG_INFO("test_mem_access: page %d read check complete",
                region.page_start + i);
     } else {
+      CHECK_STATUS_OK(
+          ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
       CHECK_STATUS_NOT_OK(flash_ctrl_testutils_read(
           &flash, start_epage, /*partition_id=*/0, rdata,
           kDifFlashCtrlPartitionTypeData, ARRAYSIZE(rdata),
           /*delay=*/1));
+      CHECK_STATUS_OK(ottf_alerts_expect_alert_finish(
+          kTopEarlgreyAlertIdFlashCtrlRecovErr));
       LOG_INFO("test_mem_access: page %d read is not allowed",
                region.page_start + i);
     }
diff --git a/sw/device/tests/flash_ctrl_ops_test.c b/sw/device/tests/flash_ctrl_ops_test.c
index 82df1cb5f830d..9e2511a90f414 100644
--- a/sw/device/tests/flash_ctrl_ops_test.c
+++ b/sw/device/tests/flash_ctrl_ops_test.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/arch/boot_stage.h"
 #include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
@@ -35,6 +36,7 @@
 OTTF_DEFINE_TEST_CONFIG();
 
 static dif_rv_plic_t plic0;
+static dif_flash_ctrl_device_info_t flash_info;
 static dif_flash_ctrl_state_t flash_state;
 static dif_flash_ctrl_t flash_ctrl;
 
@@ -49,17 +51,18 @@ static flash_ctrl_isr_ctx_t flash_ctx = {
     .is_only_irq = false,
 };
 
+static uint32_t flash_bank_0_data_region;
+static uint32_t flash_bank_1_data_region;
+static uint32_t flash_bank_1_data_region_scr;
+static uint32_t flash_bank_1_page_index;
+static uint32_t flash_bank_1_page_index_scr;
+
 enum {
   kFlashInfoPageIdCreatorSecret = 1,
   kFlashInfoPageIdOwnerSecret = 2,
   kFlashInfoPageIdIsoPart = 3,
   kFlashInfoBank = 0,
   kRegionBaseBank0Page0Index = 0,
-  kRegionBaseBank1Page0Index = 256,
-  kRegionBaseBank1Page255Index = 511,
-  kFlashBank0DataRegion = 0,
-  kFlashBank1DataRegion = 1,
-  kFlashBank1DataRegionSCR = 2,
   kPartitionId = 0,
   kRegionSize = 1,
   kInfoSize = 16,
@@ -67,6 +70,7 @@ enum {
   kPageSize = 2048,
 };
 
+const uint32_t FLASH_CTRL_PARAM_NUM_REGIONS = 7;
 const uint32_t kRandomData1[kInfoSize] = {
     0xb295d21b, 0xecdfbdcd, 0x67e7ab2d, 0x6f660b08, 0x273bf65c, 0xe80f1695,
     0x586b80db, 0xc3dba27e, 0xdc124c5d, 0xb01ccd52, 0x815713e1, 0x31a141b2,
@@ -264,7 +268,7 @@ static void do_bank0_data_partition_test(void) {
       .rd_en = kMultiBitBool4True};
 
   CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup_properties(
-      &flash_state, kRegionBaseBank0Page0Index, kFlashBank0DataRegion,
+      &flash_state, kRegionBaseBank0Page0Index, flash_bank_0_data_region,
       kRegionSize, region_properties, &address));
   CHECK_DIF_OK(dif_flash_ctrl_set_read_fifo_watermark(&flash_state, 8));
 
@@ -290,7 +294,7 @@ static void do_bank0_data_partition_test(void) {
 
 /**
  * Tests the interrupts for erase, write and read of
- * the lowest and highest page of bank 1 data partition.
+ * the lowest and highest (usable) page of bank 1 data partition.
  * Confirms that the written data is read back correctly.
  * The whole bank is then erased and the interrupt is checked
  * followed by confirmation that the previously written data
@@ -304,18 +308,30 @@ static void do_bank1_data_partition_test(void) {
   // Loop for low and high page erase, write and read.
   for (int i = 0; i < 2; ++i) {
     uint32_t page_index =
-        (i == 0) ? kRegionBaseBank1Page0Index : kRegionBaseBank1Page255Index;
+        (i == 0) ? flash_bank_1_page_index : flash_bank_1_page_index_scr;
     const uint32_t *test_data = (i == 0) ? kRandomData4 : kRandomData5;
 
+    for (uint32_t region = 0; region < FLASH_CTRL_PARAM_NUM_REGIONS; region++) {
+      bool locked;
+      // CHECK_DIF_OK(dif_flash_ctrl_data_region_is_locked(&flash_state,
+      // flash_bank_1_data_region, &locked));
+      CHECK_DIF_OK(
+          dif_flash_ctrl_data_region_is_locked(&flash_state, region, &locked));
+      if (!locked) {
+        flash_bank_1_data_region = region;
+        LOG_INFO("This region is unlocked REGION 0x%x", region);
+        break;
+      }
+    }
     if (i == 0) {
       // Set region1 for non-scrambled ecc enabled.
       CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
-          &flash_state, page_index, kFlashBank1DataRegion, kRegionSize,
+          &flash_state, page_index, flash_bank_1_data_region, kRegionSize,
           &address));
     } else {
       // Set region2 for scrambled ecc enabled.
       CHECK_STATUS_OK(flash_ctrl_testutils_data_region_scrambled_setup(
-          &flash_state, page_index, kFlashBank1DataRegionSCR, kRegionSize,
+          &flash_state, page_index, flash_bank_1_data_region_scr, kRegionSize,
           &address));
     }
     clear_irq_variables();
@@ -370,7 +386,7 @@ static void do_bank1_data_partition_test(void) {
   expected_irqs[kDifFlashCtrlIrqOpDone] = true;
 
   CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
-      &flash_state, kRegionBaseBank1Page0Index, kFlashBank1DataRegion,
+      &flash_state, flash_bank_1_page_index, flash_bank_1_data_region,
       kRegionSize, &address));
   dif_flash_ctrl_transaction_t transaction = {
       .byte_address = address,
@@ -386,10 +402,10 @@ static void do_bank1_data_partition_test(void) {
   // Loop for low and high page read back after bank erase.
   for (int i = 0; i < 2; ++i) {
     uint32_t page_index =
-        (i == 0) ? kRegionBaseBank1Page0Index : kRegionBaseBank1Page255Index;
+        (i == 0) ? flash_bank_1_page_index : flash_bank_1_page_index_scr;
 
     CHECK_STATUS_OK(flash_ctrl_testutils_data_region_setup(
-        &flash_state, page_index, kFlashBank1DataRegion, kRegionSize,
+        &flash_state, page_index, flash_bank_1_data_region, kRegionSize,
         &address));
 
     uint32_t readback_data[kDataSize];
@@ -418,6 +434,39 @@ static void do_bank1_data_partition_test(void) {
 }
 
 bool test_main(void) {
+  flash_info = dif_flash_ctrl_get_device_info();
+
+  // for(uint32_t region = 0; region < FLASH_CTRL_PARAM_NUM_REGIONS+1; region++)
+  //  {
+  //  bool locked;
+  //  LOG_INFO("Testing  REGION 0x%x" ,region);
+  //  CHECK_DIF_OK(dif_flash_ctrl_data_region_is_locked(&flash, region,
+  //  &locked)); if(!locked) { We can use this region
+  // flash_region_index = region;
+  //   LOG_INFO("This region is unlocked REGION 0x%x" ,region);
+  //     }
+  // break;
+  // }
+
+  // Determine the region index and page index to use for tests.
+  // Test data page used for flash bank 1 should be the lowest and highest
+  // usable page.
+  if (kBootStage != kBootStageOwner) {
+    flash_bank_0_data_region = 0;
+    flash_bank_1_page_index = flash_info.data_pages;
+    LOG_INFO("Running as owner");
+  } else {
+    // If we boot up in owner stage, the first 2 regions will be used by
+    // ROM_EXT.
+    flash_bank_0_data_region = 3;
+    // First 0x20 pages are configured by ROM_EXT. To avoid conflicts, skip over
+    // these pages.
+    flash_bank_1_page_index = flash_info.data_pages + 0x20;
+  }
+  flash_bank_1_data_region = flash_bank_0_data_region + 1;
+  flash_bank_1_data_region_scr = flash_bank_0_data_region + 2;
+  flash_bank_1_page_index_scr = flash_info.data_pages * 2 - 1;
+
   CHECK_DIF_OK(dif_rv_plic_init(
       mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic0));
 
@@ -432,12 +481,14 @@ bool test_main(void) {
   irq_global_ctrl(true);
   irq_external_ctrl(true);
 
-  if (kDeviceType != kDeviceSilicon) {
+  if (kBootStage != kBootStageOwner) {
     do_info_partition_test(kFlashInfoPageIdCreatorSecret, kRandomData1);
     do_info_partition_test(kFlashInfoPageIdOwnerSecret, kRandomData2);
     do_info_partition_test(kFlashInfoPageIdIsoPart, kRandomData3);
     do_bank0_data_partition_test();
+    LOG_INFO("Running as not owner");
   }
+  LOG_INFO(" Non -owner");
   do_bank1_data_partition_test();
 
   return true;
diff --git a/sw/device/tests/flash_ctrl_test.c b/sw/device/tests/flash_ctrl_test.c
index b85f74b93b577..1d6c14c0aa774 100644
--- a/sw/device/tests/flash_ctrl_test.c
+++ b/sw/device/tests/flash_ctrl_test.c
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+#include "sw/device/lib/arch/boot_stage.h"
 #include "sw/device/lib/base/macros.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/mmio.h"
@@ -10,6 +11,7 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -26,6 +28,9 @@ static dif_flash_ctrl_device_info_t flash_info;
 
 static dif_flash_ctrl_state_t flash;
 
+static uint32_t flash_region_index;
+static uint32_t flash_page_to_test;
+
 /*
  * Basic test of page erase / program / read functions. Tests pages from both
  * the data and info partitions.
@@ -55,37 +60,34 @@ static void test_basic_io(void) {
   region_properties.erase_en = kMultiBitBool4True;
 
   dif_flash_ctrl_data_region_properties_t data_region = {
-      .base = FLASH_PAGES_PER_BANK,
-      .size = 0x1,
-      .properties = region_properties};
+      .base = flash_page_to_test, .size = 0x1, .properties = region_properties};
 
-  CHECK_DIF_OK(
-      dif_flash_ctrl_set_data_region_properties(&flash, 0, data_region));
-  CHECK_DIF_OK(
-      dif_flash_ctrl_set_data_region_enablement(&flash, 0, kDifToggleEnabled));
+  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_properties(
+      &flash, flash_region_index, data_region));
+  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_enablement(
+      &flash, flash_region_index, kDifToggleEnabled));
 
-  ptrdiff_t flash_bank_1_addr =
-      (ptrdiff_t)flash_info.data_pages * (ptrdiff_t)flash_info.bytes_per_page;
-  ptrdiff_t bank1_info5_addr =
-      flash_bank_1_addr + (ptrdiff_t)(FLASH_PAGE_SZ * 5);
+  uint32_t flash_test_page_addr = data_region.base * FLASH_PAGE_SZ;
+  uint32_t bank1_info5_addr =
+      FLASH_PAGES_PER_BANK * FLASH_PAGE_SZ + FLASH_PAGE_SZ * 5;
 
-  mmio_region_t flash_bank_1 = mmio_region_from_addr(
-      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_bank_1_addr);
+  mmio_region_t flash_test_page = mmio_region_from_addr(
+      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_test_page_addr);
 
   // Test erasing flash data partition; this should turn the whole bank to all
   // ones.
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_page(
-      &flash, (uint32_t)flash_bank_1_addr,
+      &flash, flash_test_page_addr,
       /*partition_id=*/0, kDifFlashCtrlPartitionTypeData));
 
   for (int i = 0; i < FLASH_UINT32_WORDS_PER_PAGE; ++i) {
     CHECK_EQZ(
-        ~mmio_region_read32(flash_bank_1, i * (ptrdiff_t)sizeof(uint32_t)));
+        ~mmio_region_read32(flash_test_page, i * (ptrdiff_t)sizeof(uint32_t)));
   }
 
   // Erasing flash info partition 5; this should turn one page to all ones.
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_page(
-      &flash, (uint32_t)bank1_info5_addr,
+      &flash, bank1_info5_addr,
       /*partition_id=*/0, kDifFlashCtrlPartitionTypeInfo));
 
   // Prepare an entire page of non-trivial data to program into flash.
@@ -105,10 +107,10 @@ static void test_basic_io(void) {
   // Attempt to live-program an entire page, where the overall payload is much
   // larger than the internal flash FIFO.
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_and_write_page(
-      &flash, (uint32_t)flash_bank_1_addr, /*partition_id=*/0, input_page,
+      &flash, flash_test_page_addr, /*partition_id=*/0, input_page,
       kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
   CHECK_STATUS_OK(flash_ctrl_testutils_read(
-      &flash, (uint32_t)flash_bank_1_addr, /*partition_id=*/0, output_page,
+      &flash, flash_test_page_addr, /*partition_id=*/0, output_page,
       kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE,
       /*delay=*/0));
   CHECK_ARRAYS_EQ(output_page, input_page, FLASH_UINT32_WORDS_PER_PAGE);
@@ -116,16 +118,16 @@ static void test_basic_io(void) {
   // Check from host side also.
   for (int i = 0; i < FLASH_UINT32_WORDS_PER_PAGE; i++) {
     output_page[i] =
-        mmio_region_read32(flash_bank_1, i * (ptrdiff_t)sizeof(uint32_t));
+        mmio_region_read32(flash_test_page, i * (ptrdiff_t)sizeof(uint32_t));
   }
   CHECK_ARRAYS_EQ(output_page, input_page, FLASH_UINT32_WORDS_PER_PAGE);
 
   // Similar check for info page.
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_and_write_page(
-      &flash, (uint32_t)bank1_info5_addr, /*partition_id=*/0, input_page,
+      &flash, bank1_info5_addr, /*partition_id=*/0, input_page,
       kDifFlashCtrlPartitionTypeInfo, FLASH_UINT32_WORDS_PER_PAGE));
   CHECK_STATUS_OK(flash_ctrl_testutils_read(
-      &flash, (uint32_t)bank1_info5_addr, /*partition_id=*/0, output_page,
+      &flash, bank1_info5_addr, /*partition_id=*/0, output_page,
       kDifFlashCtrlPartitionTypeInfo, FLASH_UINT32_WORDS_PER_PAGE,
       /*delay=*/0));
   CHECK_ARRAYS_EQ(output_page, input_page, FLASH_UINT32_WORDS_PER_PAGE);
@@ -133,7 +135,7 @@ static void test_basic_io(void) {
   // If current platform uses sramble, you can't turn it off once you write your
   // test with scrambled form. Add if / else to make sure not to revert
   // scrambled region by default.
-  if (kDeviceType == kDeviceSilicon) {
+  if (kBootStage == kBootStageOwner) {
     CHECK_STATUS_OK(flash_ctrl_testutils_default_region_access(
         &flash, /*rd_en=*/true, /*prog_en=*/true, /*erase_en=*/true,
         /*scramble_en=*/true, /*ecc_en=*/true, /*high_endurance_en=*/false));
@@ -144,13 +146,13 @@ static void test_basic_io(void) {
   }
 
   // Perform similar test on the last page of the first bank.
-  ptrdiff_t flash_bank_0_last_page_addr =
-      flash_bank_1_addr - (ptrdiff_t)FLASH_PAGE_SZ;
+  uint32_t flash_bank_0_last_page_addr =
+      (FLASH_PAGES_PER_BANK - 1) * FLASH_PAGE_SZ;
   mmio_region_t flash_bank_0_last_page =
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR +
                             (uintptr_t)flash_bank_0_last_page_addr);
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_page(
-      &flash, (uint32_t)flash_bank_0_last_page_addr,
+      &flash, flash_bank_0_last_page_addr,
       /*partition_id=*/0, kDifFlashCtrlPartitionTypeData));
   for (int i = 0; i < FLASH_UINT32_WORDS_PER_PAGE; ++i) {
     CHECK_EQZ(~mmio_region_read32(flash_bank_0_last_page,
@@ -158,10 +160,10 @@ static void test_basic_io(void) {
   }
 
   CHECK_STATUS_OK(flash_ctrl_testutils_write(
-      &flash, (uint32_t)flash_bank_0_last_page_addr, /*partition_id=*/0,
-      input_page, kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
+      &flash, flash_bank_0_last_page_addr, /*partition_id=*/0, input_page,
+      kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
   CHECK_STATUS_OK(flash_ctrl_testutils_read(
-      &flash, (uint32_t)flash_bank_0_last_page_addr,
+      &flash, flash_bank_0_last_page_addr,
       /*partition_id=*/0, output_page, kDifFlashCtrlPartitionTypeData,
       FLASH_UINT32_WORDS_PER_PAGE, /*delay=*/0));
 
@@ -177,7 +179,7 @@ static void test_memory_protection(void) {
   // If current platform uses scramble, you can't turn it off once you write
   // your test with scrambled form. Add if / else to make sure not to revert
   // scrambled region by default.
-  if (kDeviceType == kDeviceSilicon) {
+  if (kBootStage == kBootStageOwner) {
     CHECK_STATUS_OK(flash_ctrl_testutils_default_region_access(
         &flash, /*rd_en=*/true, /*prog_en=*/true, /*erase_en=*/true,
         /*scramble_en=*/true, /*ecc_en=*/true, /*high_endurance_en=*/false));
@@ -197,7 +199,7 @@ static void test_memory_protection(void) {
       .high_endurance_en = kMultiBitBool4False};
 
   dif_flash_ctrl_data_region_properties_t protected_region = {
-      .base = FLASH_PAGES_PER_BANK,
+      .base = flash_page_to_test,
       .size = 0x1,
       .properties = protected_properties};
 
@@ -218,7 +220,7 @@ static void test_memory_protection(void) {
       /*partition_id=*/0, kDifFlashCtrlPartitionTypeData));
 
   // Turn off flash access by default.
-  if (kDeviceType == kDeviceSilicon) {
+  if (kBootStage == kBootStageOwner) {
     CHECK_STATUS_OK(flash_ctrl_testutils_default_region_access(
         &flash, /*rd_en=*/false, /*prog_en=*/false, /*erase_en=*/false,
         /*scramble_en=*/true, /*ecc_en=*/true, /*high_endurance_en=*/false));
@@ -229,8 +231,8 @@ static void test_memory_protection(void) {
   }
 
   // Enable protected region for access.
-  CHECK_DIF_OK(
-      dif_flash_ctrl_set_data_region_properties(&flash, 0, protected_region));
+  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_properties(
+      &flash, flash_region_index, protected_region));
 
   // Attempt to perform a write.
   uintptr_t region_boundary_start = bad_region_start - (FLASH_WORD_SZ * 2);
@@ -244,9 +246,14 @@ static void test_memory_protection(void) {
   }
 
   // Perform a partial write.
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
   CHECK(status_err(flash_ctrl_testutils_write(
       &flash, region_boundary_start, /*partition_id=*/0, words,
       kDifFlashCtrlPartitionTypeData, ARRAYSIZE(words))));
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdFlashCtrlRecovErr));
+
   // Words in the good region should still match, while words in the bad region
   // should be all-ones, since we erased.
   for (int i = 0; i < ARRAYSIZE(words); ++i) {
@@ -259,9 +266,13 @@ static void test_memory_protection(void) {
   }
 
   // Attempt to erase bad page, which should fail.
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdFlashCtrlRecovErr));
   CHECK(status_err(flash_ctrl_testutils_erase_page(
       &flash, bad_region_start,
       /*partition_id=*/0, kDifFlashCtrlPartitionTypeData)));
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdFlashCtrlRecovErr));
 
   // Attempt to erase the good page, which should succeed.
   CHECK_STATUS_OK(flash_ctrl_testutils_erase_page(
@@ -276,6 +287,17 @@ OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
   flash_info = dif_flash_ctrl_get_device_info();
+
+  // ROM_EXT will use 2 regions to configure access to first 0x20 pages of each
+  // bank. Therefore skip these pages when running as owner stage.
+  if (kBootStage == kBootStageOwner) {
+    flash_region_index = 2;
+    flash_page_to_test = FLASH_PAGES_PER_BANK + 0x20;
+  } else {
+    flash_region_index = 0;
+    flash_page_to_test = FLASH_PAGES_PER_BANK;
+  }
+
   CHECK_DIF_OK(dif_flash_ctrl_init_state(
       &flash, mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
   CHECK_STATUS_OK(flash_ctrl_testutils_wait_for_init(&flash));
diff --git a/sw/device/tests/flash_ctrl_write_clear_test.c b/sw/device/tests/flash_ctrl_write_clear_test.c
index 5fc699ddd85f6..c2e934888caad 100644
--- a/sw/device/tests/flash_ctrl_write_clear_test.c
+++ b/sw/device/tests/flash_ctrl_write_clear_test.c
@@ -22,6 +22,9 @@
 
 OTTF_DEFINE_TEST_CONFIG();
 
+static uint32_t flash_region_index;
+static uint32_t flash_page_to_test;
+
 enum {
   // Some dif_flash_ctrl functions don't require the partition parameter when
   // interacting with data partitions. This constant is added to improve
@@ -38,6 +41,10 @@ enum {
   // The start page used by this test. Points to the start of the owner
   // partition in bank 1, otherwise known as owner partition B.
   kBank1StartPageNum = 256 + kRomExtPageCount,
+
+  // The ROM_EXT protects itself using regions 0-1.
+  kFlashRegionNum = 3,
+
 };
 
 // The `flash_word_verify()` function will need to be updated if this assertion
@@ -101,6 +108,29 @@ bool test_main(void) {
   CHECK_DIF_OK(dif_flash_ctrl_init_state(
       &flash, mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
 
+  flash_region_index = 0;
+  flash_page_to_test = 0;
+  for (uint32_t region = 0; region < FLASH_CTRL_PARAM_NUM_REGIONS; region++) {
+    bool locked;
+    LOG_INFO("Testing  REGION 0x%x", region);
+    CHECK_DIF_OK(dif_flash_ctrl_data_region_is_locked(&flash, region, &locked));
+    if (!locked) {
+      // We can use this region
+      flash_region_index = region;
+      LOG_INFO("This region is unlocked REGION 0x%x", region);
+      break;
+    }
+    dif_flash_ctrl_data_region_properties_t cfg;
+    CHECK_DIF_OK(
+        dif_flash_ctrl_get_data_region_properties(&flash, region, &cfg));
+    // Avoid this region
+    if (cfg.size > 0) {
+      flash_page_to_test = MAX(flash_page_to_test, cfg.base + cfg.size);
+    }
+  }
+
+  // kFlashRegionNum = flash_region_index;
+
   // The ROM_EXT configures the default region access. We can't modify the
   // values after configured.
   if (kBootStage != kBootStageOwner) {
@@ -110,7 +140,7 @@ bool test_main(void) {
   }
 
   LOG_INFO("ECC enabled with high endurance disabled.");
-  flash_ctrl_write_clear_test(/*mp_region_index=*/0,
+  flash_ctrl_write_clear_test(/*mp_region_index=*/flash_region_index,
                               (dif_flash_ctrl_data_region_properties_t){
                                   .base = kBank1StartPageNum,
                                   .size = 1,
@@ -124,7 +154,7 @@ bool test_main(void) {
                                   }});
 
   LOG_INFO("ECC enabled with high endurance enabled.");
-  flash_ctrl_write_clear_test(/*mp_region_index=*/1,
+  flash_ctrl_write_clear_test(/*mp_region_index=*/kFlashRegionNum,
                               (dif_flash_ctrl_data_region_properties_t){
                                   .base = kBank1StartPageNum + 1,
                                   .size = 1,
diff --git a/sw/device/tests/hmac_endianness_test.c b/sw/device/tests/hmac_endianness_test.c
new file mode 100644
index 0000000000000..cc429b95132f1
--- /dev/null
+++ b/sw/device/tests/hmac_endianness_test.c
@@ -0,0 +1,165 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_hmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/hmac_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hmac_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "sw/device/lib/dif/autogen/dif_hmac_autogen.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static const dif_hmac_transaction_t kHmacconfig_littled_littlem = {
+    .digest_endianness = kDifHmacEndiannessLittle,
+    .message_endianness = kDifHmacEndiannessLittle,
+};
+
+static const dif_hmac_transaction_t kHmacconfig_littled_bigm = {
+    .digest_endianness = kDifHmacEndiannessLittle,
+    .message_endianness = kDifHmacEndiannessBig,
+};
+
+static const dif_hmac_transaction_t kHmacconfig_bigd_littlem = {
+    .digest_endianness = kDifHmacEndiannessBig,
+    .message_endianness = kDifHmacEndiannessLittle,
+};
+
+static const dif_hmac_transaction_t kHmacconfig_bigd_bigm = {
+    .digest_endianness = kDifHmacEndiannessBig,
+    .message_endianness = kDifHmacEndiannessBig,
+};
+
+static const char kData[142] =
+    "Every one suspects himself of at least one of "
+    "the cardinal virtues, and this is mine: I am "
+    "one of the few honest people that I have ever "
+    "known";
+
+static const char kData2[8] = "Help Us ";
+static const char kData2_endian[8] = "pleH sU ";
+
+static const dif_hmac_digest_t kExpectedShaDigest = {
+    .digest =
+        {
+            0xd6c6c94e,
+            0xf7cff519,
+            0x45c76d42,
+            0x9d37a8b8,
+            0xe2762fe9,
+            0x71ff68cb,
+            0x68e236af,
+            0x3dc296dc,
+        },
+};
+
+static const dif_hmac_digest_t kExpectedShaDigest_bigendian = {
+    .digest =
+        {
+            0x4ec9c6d6,
+            0x19f5cff7,
+            0x426dc745,
+            0xb8a8379d,
+            0xe92f76e2,
+            0xcb68ff71,
+            0xaf36e268,
+            0xdc96c23d,
+        },
+};
+
+static const dif_hmac_digest_t kExpectedShaDigest_shortmessage = {
+    .digest =
+        {
+            0x8ce72131,
+            0xd5ac567a,
+            0x234045e8,
+            0x04f2ac21,
+            0x29e62b92,
+            0x99255af0,
+            0x392a3664,
+            0x31066f19,
+        },
+};
+
+static const dif_hmac_digest_t kExpectedShaDigest_shortmessage_bigendian = {
+    .digest =
+        {
+            0x3121e78c,
+            0x7a56acd5,
+            0xe8454023,
+            0x21acf204,
+            0x922be629,
+            0xf05a2599,
+            0x64362a39,
+            0x196f0631,
+        },
+};
+
+/**
+ * Initialize the HMAC engine. Return `true` if the configuration is valid.
+ */
+static void test_setup(mmio_region_t base_addr, dif_hmac_t *hmac) {
+  CHECK_DIF_OK(dif_hmac_init(base_addr, hmac));
+}
+
+static void run_test_endianness(const dif_hmac_t *hmac, const char *data,
+                                size_t len, const dif_hmac_transaction_t config,
+                                const dif_hmac_digest_t *expected_digest) {
+  CHECK_DIF_OK(dif_hmac_mode_sha256_start(hmac, config));
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  CHECK_STATUS_OK(hmac_testutils_check_message_length(hmac, len * 8));
+  CHECK_DIF_OK(dif_hmac_process(hmac));
+  CHECK_STATUS_OK(
+      hmac_testutils_finish_and_check_polled(hmac, expected_digest));
+}
+
+bool test_main(void) {
+  LOG_INFO("Running HMAC DIF test...");
+  dif_hmac_t hmac;
+  test_setup(mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR), &hmac);
+
+  LOG_INFO(
+      "Running test SHA256 pass little-endian digest and little-endian "
+      "message...");
+  run_test_endianness(&hmac, kData, sizeof(kData), kHmacconfig_littled_littlem,
+                      &kExpectedShaDigest);
+
+  LOG_INFO(
+      "Running test SHA256 with big-endian digest,little-endian message "
+      "config...");
+  run_test_endianness(&hmac, kData, sizeof(kData), kHmacconfig_bigd_littlem,
+                      &kExpectedShaDigest_bigendian);
+
+  LOG_INFO(
+      "Running test SHA256 pass with big-endian digest,big endian message "
+      "config... ");
+  run_test_endianness(&hmac, kData2, sizeof(kData2), kHmacconfig_bigd_bigm,
+                      &kExpectedShaDigest_shortmessage_bigendian);
+
+  LOG_INFO(
+      "Running test SHA256 pass little-endian digest, big endian message "
+      "config... ");
+  run_test_endianness(&hmac, kData2, sizeof(kData2), kHmacconfig_littled_bigm,
+                      &kExpectedShaDigest_shortmessage);
+
+  LOG_INFO(
+      "Running test SHA256 pass big-endian digest, little endian message "
+      "config \n"
+      " with input message byte-swapped to verify the in-built byteswap "
+      "function..");
+  run_test_endianness(&hmac, kData2_endian, sizeof(kData2_endian),
+                      kHmacconfig_bigd_littlem,
+                      &kExpectedShaDigest_shortmessage_bigendian);
+
+  return true;
+}
diff --git a/sw/device/tests/hmac_error_conditions_test.c b/sw/device/tests/hmac_error_conditions_test.c
new file mode 100644
index 0000000000000..aa67e6519c77a
--- /dev/null
+++ b/sw/device/tests/hmac_error_conditions_test.c
@@ -0,0 +1,382 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_hmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/hmac_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+#include "hmac_regs.h"
+
+typedef enum hmac_err {
+
+  /**
+   * No error has occured.
+   */
+  kErrorNone = 0x0,
+
+  /**
+   * This error is reported when HMAC detects the CMD.start command while SHA is
+   * disabled
+   */
+  kErrorSwHashStartWhenShaDisabled = 0x02,
+
+  /**
+   *This error occurs when software attempts to modify the secret key CSRs
+   *during hashing
+   */
+  kErrorSwUpdateSecretKeyInProcess = 0x03,
+
+  /**
+   *This error is reported when CMD.start is received while HMAC is running
+   */
+  kErrorSwHashStartWhenActive = 0x04,
+
+  /**
+   *This error is reported when the MSG_FIFO is updated when disallowed
+   */
+  kErrorSwPushMsgWhenDisallowed = 0x05,
+
+  /**
+   *This error is reported when HMAC has been configured incorrectly by software
+   */
+  kErrorSwInvalidConfig = 0x06,
+
+} hmac_error_t;
+
+static const dif_hmac_transaction_t kHmacTransactionConfig = {
+    .digest_endianness = kDifHmacEndiannessLittle,
+    .message_endianness = kDifHmacEndiannessLittle,
+};
+
+static const char kData[142] =
+    "Every one suspects himself of at least one of "
+    "the cardinal virtues, and this is mine: I am "
+    "one of the few honest people that I have ever "
+    "known";
+
+static uint32_t kHmacKey[8] = {
+    0xec4e6c89, 0x082efa98, 0x299f31d0, 0xa4093822,
+    0x03707344, 0x13198a2e, 0x85a308d3, 0x243f6a88,
+};
+
+static const dif_hmac_digest_t kExpectedShaDigest = {
+    .digest =
+        {
+            0xd6c6c94e,
+            0xf7cff519,
+            0x45c76d42,
+            0x9d37a8b8,
+            0xe2762fe9,
+            0x71ff68cb,
+            0x68e236af,
+            0x3dc296dc,
+        },
+};
+
+static const dif_hmac_digest_t kExpectedHmacDigest = {
+    .digest =
+        {
+            0xebce4019,
+            0x284d39f1,
+            0x5eae12b0,
+            0x0c48fb23,
+            0xfadb9531,
+            0xafbbf3c2,
+            0x90d3833f,
+            0x397b98e4,
+        },
+};
+
+/**
+ * Initialize the HMAC engine. Return `true` if the configuration is valid.
+ */
+static void test_setup(mmio_region_t base_addr, dif_hmac_t *hmac) {
+  CHECK_DIF_OK(dif_hmac_init(base_addr, hmac));
+}
+
+/**
+ * Start HMAC in the correct mode. If `key` == NULL use SHA256 mode, otherwise
+ * use the provided key in HMAC mode.
+ */
+
+static void test_start(const dif_hmac_t *hmac, const uint8_t *key) {
+  // Let a null key indicate we are operating in SHA256-only mode.
+  if (key == NULL) {
+    CHECK_DIF_OK(dif_hmac_mode_sha256_start(hmac, kHmacTransactionConfig));
+  } else {
+    CHECK_DIF_OK(dif_hmac_mode_hmac_start(hmac, key, kHmacTransactionConfig));
+  }
+}
+
+/**
+ * Kick off the HMAC (or SHA256) run.
+ */
+static void run_hmac(const dif_hmac_t *hmac) {
+  CHECK_DIF_OK(dif_hmac_process(hmac));
+}
+
+static void run_hmac_enable_interrupt(void) {
+  // Enable Interrupt enable register
+  uint32_t reg = 0;
+  reg = bitfield_bit32_write(reg, HMAC_INTR_ENABLE_HMAC_DONE_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_INTR_ENABLE_FIFO_EMPTY_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_INTR_ENABLE_HMAC_ERR_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_INTR_ENABLE_REG_OFFSET,
+                   reg);
+}
+
+static void run_hmac_clear_interrupt(void) {
+  uint32_t reg = 0;
+  reg = bitfield_bit32_write(reg, HMAC_INTR_STATE_HMAC_DONE_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_INTR_STATE_FIFO_EMPTY_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_INTR_STATE_HMAC_ERR_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_INTR_STATE_REG_OFFSET,
+                   reg);
+}
+
+// The following function reports error when attempts to write data into the
+// message FIFO (MSG_FIFO) while the SHA engine is disabled.
+status_t run_test_pushmsg_when_shadisabled(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  // Read current config register
+  uint32_t cfg_reg_3 =
+      abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET);
+  // Disable SHA_EN
+  cfg_reg_3 = bitfield_bit32_write(cfg_reg_3, HMAC_CFG_SHA_EN_BIT, false);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET,
+                   cfg_reg_3);
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  uint32_t hmac_err_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmac_err_reg == kErrorSwPushMsgWhenDisallowed,
+            "Error code doesn't match expected code ");
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+// The following function reports error when attempts to write data into the
+// message FIFO (MSG_FIFO) when hmac is already in process
+status_t run_test_pushmsg_when_disallowed(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  test_start(hmac, key);
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  run_hmac(hmac);
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  uint32_t hmac_err_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmac_err_reg == kErrorSwPushMsgWhenDisallowed,
+            "Error code doesn't match expected code");
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+// The following function reports error when the HMAC has been incorrectly
+// configured by software. This could include an invalid key length for HMAC
+// mode
+status_t run_test_invalidconfig_keylength(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  // Set HMAC KeyLength to Key_none  and SHA2/HMAC Digest size to SHA2_256
+  uint32_t reg = 0;
+  reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD,
+                               HMAC_CFG_KEY_LENGTH_VALUE_KEY_NONE);
+  reg = bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD,
+                               HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, reg);
+  uint32_t hmac_cmd_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_START_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  uint32_t hmacerr_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmacerr_reg == kErrorSwInvalidConfig,
+            "Error code doesn't match expected code");
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  run_hmac(hmac);
+  hmac_cmd_reg = mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_STOP_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  // Write default cfg reg values to clear the error
+  uint32_t cfg_reg_default = HMAC_CFG_REG_RESVAL;
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET,
+                   cfg_reg_default);
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+// The following function reports error is reported when the HMAC has been
+// incorrectly configured by software. This could include an invalid digest size
+// for SHA-2/HMAC modes or an invalid key length for HMAC mode
+status_t run_test_invalidconfig_digest(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  // Set HMAC KeyLength to 256 bit  and SHA2/HMAC Digest size to SHA2_None
+  uint32_t reg = 0;
+  reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD,
+                               HMAC_CFG_KEY_LENGTH_VALUE_KEY_256);
+  reg = bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD,
+                               HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_NONE);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, reg);
+  uint32_t hmac_cmd_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_START_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  uint32_t hmacerr_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmacerr_reg == kErrorSwInvalidConfig,
+            "Error code doesn't match expected code");
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  run_hmac(hmac);
+  hmac_cmd_reg = mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_STOP_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  // Write default cfg reg values to clear the error
+  uint32_t cfg_reg_default = HMAC_CFG_REG_RESVAL;
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET,
+                   cfg_reg_default);
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+// The following function reports error is reported when the HMAC has been
+// incorrectly configured by software. This could include an invalid digest size
+// for SHA-2/HMAC modes or an invalid key length for HMAC mode
+status_t run_test_updatekey(const dif_hmac_t *hmac, const char *data,
+                            size_t len, const uint8_t *key,
+                            const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  test_start(hmac, key);
+  CHECK_STATUS_OK(hmac_testutils_push_message(hmac, data, len));
+  CHECK_STATUS_OK(hmac_testutils_fifo_empty_polled(hmac));
+  // Updating the config with swap key - while hmac engine is in process state
+  CHECK_DIF_OK(dif_hmac_mode_hmac_start(hmac, key, kHmacTransactionConfig));
+  uint32_t hmacerr_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmacerr_reg == kErrorSwUpdateSecretKeyInProcess,
+            "Error code doesn't match expected code");
+  run_hmac(hmac);
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+//   Reported when CMD.start is received when SHA is disabled
+status_t run_test_hashstartwhendisabled(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  uint32_t cfg_reg =
+      abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET);
+  // Disable SHA_EN
+  cfg_reg = bitfield_bit32_write(cfg_reg, HMAC_CFG_SHA_EN_BIT, false);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, cfg_reg);
+  // Write HASH_START_BIT
+  uint32_t hmac_cmd_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_START_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  uint32_t hmacerr_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmacerr_reg == kErrorSwHashStartWhenShaDisabled,
+            "Error code doesn't match expected code");
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+//   Reported when CMD.start is received while the HMAC is running
+status_t run_test_hashstartwhenactive(
+    const dif_hmac_t *hmac, const char *data, size_t len, const uint8_t *key,
+    const dif_hmac_digest_t *expected_digest) {
+  run_hmac_enable_interrupt();
+  test_start(hmac, key);
+  uint32_t hmac_cmd_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_CMD_REG_OFFSET);
+  hmac_cmd_reg =
+      bitfield_bit32_write(hmac_cmd_reg, HMAC_CMD_HASH_START_BIT, true);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CMD_REG_OFFSET,
+                   hmac_cmd_reg);
+  uint32_t hmac_err_reg =
+      mmio_region_read32(hmac->base_addr, HMAC_ERR_CODE_REG_OFFSET);
+  TRY_CHECK(hmac_err_reg == kErrorSwHashStartWhenActive,
+            "Error code doesn't match expected code");
+  run_hmac(hmac);
+  run_hmac_clear_interrupt();
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  LOG_INFO("Running HMAC Error Condition test...");
+
+  dif_hmac_t hmac;
+  test_setup(mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR), &hmac);
+  LOG_INFO("Running test push message when sha disabled...");
+  run_test_pushmsg_when_shadisabled(&hmac, kData, sizeof(kData), NULL,
+                                    &kExpectedHmacDigest);
+
+  LOG_INFO("Running Hash start test  when sha is disabled...");
+  run_test_hashstartwhendisabled(&hmac, kData, sizeof(kData), NULL,
+                                 &kExpectedShaDigest);
+
+  LOG_INFO("Running test with key when disallowed..,");
+  run_test_updatekey(&hmac, kData, sizeof(kData), (uint8_t *)(&kHmacKey[0]),
+                     &kExpectedHmacDigest);
+
+  LOG_INFO("Running test HMAC hash start when active...");
+  run_test_hashstartwhenactive(&hmac, kData, sizeof(kData),
+                               (uint8_t *)(&kHmacKey[0]), &kExpectedHmacDigest);
+
+  LOG_INFO("Running test push message when  disallowed...");
+  run_test_pushmsg_when_disallowed(&hmac, kData, sizeof(kData),
+                                   (uint8_t *)(&kHmacKey[0]),
+                                   &kExpectedHmacDigest);
+
+  LOG_INFO("Running test HMAC invalid config keylength...");
+  run_test_invalidconfig_keylength(&hmac, kData, sizeof(kData),
+                                   (uint8_t *)(&kHmacKey[0]),
+                                   &kExpectedHmacDigest);
+
+  LOG_INFO("Running test HMAC hash start when active...");
+  run_test_hashstartwhenactive(&hmac, kData, sizeof(kData),
+                               (uint8_t *)(&kHmacKey[0]), &kExpectedHmacDigest);
+
+  LOG_INFO("Running test HMAC invalid config digest size...");
+  run_test_invalidconfig_digest(&hmac, kData, sizeof(kData),
+                                (uint8_t *)(&kHmacKey[0]),
+                                &kExpectedHmacDigest);
+
+  return true;
+}
diff --git a/sw/device/tests/i2c_target_smbus_arp_test.c b/sw/device/tests/i2c_target_smbus_arp_test.c
index 324f4c26f618d..468e4ba6cade4 100644
--- a/sw/device/tests/i2c_target_smbus_arp_test.c
+++ b/sw/device/tests/i2c_target_smbus_arp_test.c
@@ -295,7 +295,8 @@ static status_t test_init(void) {
   TRY(dif_i2c_init(base_addr, &i2c));
 
   TRY(i2c_testutils_select_pinmux(&pinmux, 0, I2cPinmuxPlatformIdHyper310));
-  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedStandard));
+  TRY(i2c_testutils_set_speed(&i2c, kDifI2cSpeedStandard,
+                              /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
 
   // 25 ms bus timeout. The upper limit of support is ~1 GHz for the IP, so OK
   // to make the frequency a uint32_t.
diff --git a/sw/device/tests/i2c_target_test.c b/sw/device/tests/i2c_target_test.c
index bc2c6a4076466..8689cedb10b5c 100644
--- a/sw/device/tests/i2c_target_test.c
+++ b/sw/device/tests/i2c_target_test.c
@@ -119,7 +119,8 @@ static status_t i2c_configure_instance(dif_i2c_t *i2c, dif_pinmux_t *pinmux,
 
   TRY(i2c_testutils_select_pinmux(pinmux, i2c_instance,
                                   I2cPinmuxPlatformIdHyper310));
-  TRY(i2c_testutils_set_speed(i2c, kDifI2cSpeedStandard));
+  TRY(i2c_testutils_set_speed(i2c, kDifI2cSpeedStandard, /*sda_rise_nanos=*/400,
+                              /*sda_fall_nanos=*/110));
   TRY(dif_i2c_host_set_enabled(i2c, kDifToggleEnabled));
   return OK_STATUS();
 }
@@ -329,7 +330,7 @@ static status_t command_processor(ujson_t *uj) {
         break;
       case kTestCommandI2cTestConfig: {
         i2c_test_config_t config;
-        TRY(ujson_deserialize_i2c_test_config_t(uj, &config));
+        TRY(UJSON_WITH_CRC(ujson_deserialize_i2c_test_config_t, uj, &config));
         i2c_clock_stretching_delay_micros =
             config.clock_stretching_delay_millis * 1000;
         RESP_ERR(uj, RESP_OK_STATUS(uj));
diff --git a/sw/device/tests/keymgr_derive_cdi_test.c b/sw/device/tests/keymgr_derive_cdi_test.c
new file mode 100644
index 0000000000000..a67d8384131a6
--- /dev/null
+++ b/sw/device/tests/keymgr_derive_cdi_test.c
@@ -0,0 +1,450 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <string.h>
+
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/otbn_testutils.h"
+#include "sw/device/lib/testing/ret_sram_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/lib/testing/sram_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static dif_keymgr_t keymgr;
+static dif_kmac_t kmac;
+static dif_otbn_t otbn;
+static dif_rstmgr_t rstmgr;
+static dif_sram_ctrl_t sram_ctrl;
+
+enum {
+  kKeymgrOutputSizeWords = 8,
+  kKeymgrOutputSizeBytes = 32,
+
+  kX2551PublicKeySizeBytes = 32,
+
+  // The retention SRAM testutils allocate some internal data as well as a
+  // number of counters; both of which should not be overwritten by this
+  // test. Hence, the actual base address is offset to account for this.
+  kRetSramBaseAddr = TOP_EARLGREY_RAM_RET_AON_BASE_ADDR +
+                     offsetof(retention_sram_t, owner) +
+                     4 * kRetSramTestutilsNumberOfCounters,
+
+// Compile-time directive to choose between CDI flow types. The default
+// derivation type is sealing.
+#ifndef DERIVE_ATTESTATION
+  kCdiType = kDifKeymgrSealingCdi
+#else
+  kCdiType = kDifKeymgrAttestationCdi
+#endif
+};
+
+/**
+ * Grouping of the three CDI output variants that can be generated in
+ * each key manager state (identity, versioned software key, sideload OTBN key).
+ *
+ * Note that the sideload OTBN key is not visible to software. In order to
+ * run the same verification steps as for the identity and software keys, a
+ * X25519 public key is generated in the OTBN and retrieved. For the sake of
+ * simplicity, and only in the confines of this test, we can assume that the
+ * X25519 public key and the sideload OTBN key refer to the same thing.
+ */
+typedef struct cdi_outputs {
+  dif_keymgr_output_t identity;
+  dif_keymgr_output_t sw_key;
+  uint32_t sideload_key[kX2551PublicKeySizeBytes];
+} cdi_outputs_t;
+
+// Symbols of the OTBN X22519 public key generation program.
+// See sw/otbn/crypto/x25519_sideload.s for the source code.
+OTBN_DECLARE_APP_SYMBOLS(x25519_sideload);
+OTBN_DECLARE_SYMBOL_ADDR(x25519_sideload, enc_u);
+OTBN_DECLARE_SYMBOL_ADDR(x25519_sideload, enc_result);
+static const otbn_app_t kOtbnAppX25519 = OTBN_APP_T_INIT(x25519_sideload);
+static const otbn_addr_t kOtbnVarEncU =
+    OTBN_ADDR_T_INIT(x25519_sideload, enc_u);
+static const otbn_addr_t kOtbnVarEncResult =
+    OTBN_ADDR_T_INIT(x25519_sideload, enc_result);
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/**
+ * Initialize the dif handles required for this test.
+ */
+static void init_peripheral_handles(void) {
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  CHECK_DIF_OK(dif_sram_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR),
+      &sram_ctrl));
+  CHECK_DIF_OK(
+      dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+  CHECK_DIF_OK(dif_keymgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR), &keymgr));
+  CHECK_DIF_OK(
+      dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+}
+
+/**
+ * Equality check of two masked key manager outputs without unmasking.
+ *
+ * @param output_a First key manager output.
+ * @param output_b Second key manager output.
+ * @return Result of the equality check.
+ */
+static bool compare_outputs(const dif_keymgr_output_t *output_a,
+                            const dif_keymgr_output_t *output_b) {
+  uint32_t scratch[kKeymgrOutputSizeWords];
+  for (int i = 0; i < kKeymgrOutputSizeWords; i++) {
+    // Check whether two masked keys are equal without unmasking them:
+    //
+    // output_a0 = k0 + m0, output_a1 = m0
+    // output_b0 = k1 + m1, output_b1 = m1
+    // t = output_a0 + output_b0 = m0 + m1
+    // 0 = t ^ output_a1 ^ output_b1
+    //
+    // In order to prevent an accidental unmasking through reordering of the
+    // operation after compilation, `t` is read into an auxiliary array.
+    scratch[i] = output_a->value[0][i] ^ output_b->value[0][i];
+    if ((scratch[i] ^ output_a->value[1][i] ^ output_b->value[1][i]) != 0x0) {
+      return false;
+    }
+  }
+  return true;
+}
+
+/**
+ * Write a `cdi_outputs_t` object into the retention SRAM at a specific offset
+ * from `kRetSramBaseAddr`. The offset then is incremented by the size of the
+ * written data.
+ *
+ * @param outputs The CDI outputs to be stored.
+ * @param offset The offset from `kRetSramBaseAddr`.
+ */
+static void ret_sram_write_keys(const cdi_outputs_t *outputs, size_t *offset) {
+  uint32_t buf[sizeof(cdi_outputs_t)];
+  memcpy(buf, outputs, sizeof(cdi_outputs_t));
+
+  sram_ctrl_testutils_write(
+      kRetSramBaseAddr + *offset,
+      (sram_ctrl_testutils_data_t){.words = buf, .len = sizeof(cdi_outputs_t)});
+  *offset += sizeof(cdi_outputs_t);
+}
+
+/**
+ * Read a `cdi_outputs_t` object from the retention SRAM at a specific offset
+ * from `kRetSramBaseAddr`. The offset then is incremented by the size of the
+ * read data.
+ *
+ * @param outputs The destination of the read CDI outputs.
+ * @param offset The offset from `kRetSramBaseAddr`.
+ */
+static void ret_sram_read_keys(cdi_outputs_t *outputs, size_t *offset) {
+  memcpy(outputs, (uint8_t *)(kRetSramBaseAddr + *offset),
+         sizeof(cdi_outputs_t));
+  *offset += sizeof(cdi_outputs_t);
+}
+
+/**
+ * Invoke the generation of an CDI identity and read it back.
+ *
+ * @param state_name The current key manager state string.
+ * @param identity The destination of the read identity.
+ */
+static void derive_identity(const char *state_name,
+                            dif_keymgr_output_t *identity) {
+  CHECK_STATUS_OK(keymgr_testutils_generate_identity(
+      &keymgr, (dif_keymgr_identity_seed_params_t){.cdi_type = kCdiType}));
+  LOG_INFO("Keymgr generated identity at %s State", state_name);
+
+  CHECK_DIF_OK(dif_keymgr_read_output(&keymgr, identity));
+}
+
+/**
+ * Invoke the generation of a CDI versioned software key and read it back.
+ * A second generation with an invalid key version should fail.
+ *
+ * @param state_name The current key manager state string.
+ * @param key The destination of the read software key.
+ */
+static void derive_sw_key(const char *state_name, dif_keymgr_output_t *key) {
+  uint32_t max_version;
+  CHECK_STATUS_OK(keymgr_testutils_max_key_version_get(&keymgr, &max_version));
+
+  dif_keymgr_versioned_key_params_t params = kKeyVersionedParams;
+  params.dest = kDifKeymgrVersionedKeyDestSw;
+  params.version = max_version;
+  params.cdi_type = kCdiType;
+
+  CHECK_STATUS_OK(keymgr_testutils_generate_versioned_key(&keymgr, params));
+  LOG_INFO("Keymgr generated SW output at %s State", state_name);
+
+  CHECK_DIF_OK(dif_keymgr_read_output(&keymgr, key));
+
+#ifndef DERIVE_ATTESTATION
+  // If the key version is larger than the permitted maximum version, then
+  // the key generation must fail.
+  params.version += 1;
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_start(
+      kTopEarlgreyAlertIdKeymgrRecovOperationErr));
+  CHECK_STATUS_NOT_OK(keymgr_testutils_generate_versioned_key(&keymgr, params));
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_finish(
+      kTopEarlgreyAlertIdKeymgrRecovOperationErr));
+#endif
+}
+
+/**
+ * Invoke the generation of sideload OTBN key, run the X25519 OTBN program and
+ * read back the resulting public key. A second generation with an invalid key
+ * version should fail.
+ *
+ * @param state_name The current key manager state string.
+ * @param The destination of the read X25519 public key.
+ */
+static void derive_sideload_otbn_key(const char *state_name,
+                                     uint32_t key[kKeymgrOutputSizeWords]) {
+  uint32_t max_version;
+  CHECK_STATUS_OK(keymgr_testutils_max_key_version_get(&keymgr, &max_version));
+
+  dif_keymgr_versioned_key_params_t params = kKeyVersionedParams;
+  params.dest = kDifKeymgrVersionedKeyDestOtbn;
+  params.version = max_version;
+
+  CHECK_STATUS_OK(keymgr_testutils_generate_versioned_key(&keymgr, params));
+  LOG_INFO("Keymgr generated HW output for Otbn at %s State", state_name);
+
+  // Run the X25519 public key generation. For more details, see the OTBN
+  // sideload test sw/device/tests/keymgr_sideload_otbn_test.c.
+  CHECK_STATUS_OK(otbn_testutils_load_app(&otbn, kOtbnAppX25519));
+  CHECK_DIF_OK(dif_otbn_set_ctrl_software_errs_fatal(&otbn, false));
+
+  const uint32_t kEncodedU[8] = {
+      // Montgomery u-Coordinate.
+      0x9, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+  };
+  CHECK_STATUS_OK(otbn_testutils_write_data(&otbn, sizeof(kEncodedU),
+                                            &kEncodedU, kOtbnVarEncU));
+  LOG_INFO("Starting OTBN program...");
+  CHECK_DIF_OK(dif_otbn_set_ctrl_software_errs_fatal(&otbn, false));
+  CHECK_STATUS_OK(otbn_testutils_execute(&otbn));
+  CHECK_STATUS_OK(otbn_testutils_wait_for_done(&otbn, 0));
+  CHECK_STATUS_OK(otbn_testutils_read_data(&otbn, kX2551PublicKeySizeBytes,
+                                           kOtbnVarEncResult, key));
+
+#ifndef DERIVE_ATTESTATION
+  // If the key version is larger than the permitted maximum version, then
+  // the key generation must fail.
+  params.version += 1;
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_start(
+      kTopEarlgreyAlertIdKeymgrRecovOperationErr));
+  CHECK_STATUS_NOT_OK(keymgr_testutils_generate_versioned_key(&keymgr, params));
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_finish(
+      kTopEarlgreyAlertIdKeymgrRecovOperationErr));
+#endif
+}
+
+/**
+ * Derive a CDI identity, software key and sideload OTBN key. If the `write`
+ * flag is set, then the keys are written at specific offset in the retention
+ * SRAM. In the other case, the generated outputs are compared against outputs
+ * from the retention SRAM (corresponding to a run before the reset). Pre- and
+ * post- prefix outputs should match. If some previous outputs are provided from
+ * an earlier key manager state, compare that the newly generated ones differ.
+ *
+ * @param state_name The current key manager state string.
+ * @param prev_outputs Generated outptus from a previous key manager state.
+ * @param offset The offset at which to read or write in the retention SRAM.
+ * @param write Indicating whether to write the new keys to the retention SRAM.
+ * @param next_outputs The destination of the newly generated CDI outputs.
+ */
+static void derive_keys(const char *state_name,
+                        const cdi_outputs_t *prev_outputs, size_t *offset,
+                        bool write, cdi_outputs_t *next_outputs) {
+  derive_identity(state_name, &next_outputs->identity);
+  derive_sw_key(state_name, &next_outputs->sw_key);
+  derive_sideload_otbn_key(state_name, next_outputs->sideload_key);
+
+  if (prev_outputs) {
+    CHECK(!compare_outputs(&prev_outputs->identity, &next_outputs->identity));
+    CHECK(!compare_outputs(&prev_outputs->sw_key, &next_outputs->sw_key));
+    CHECK_ARRAYS_NE(prev_outputs->sideload_key, next_outputs->sideload_key,
+                    kKeymgrOutputSizeWords);
+  }
+
+  if (write) {
+    ret_sram_write_keys(next_outputs, offset);
+  } else {
+    cdi_outputs_t scratch;
+    ret_sram_read_keys(&scratch, offset);
+
+    CHECK(compare_outputs(&scratch.identity, &next_outputs->identity));
+    CHECK(compare_outputs(&scratch.sw_key, &next_outputs->sw_key));
+    CHECK_ARRAYS_EQ(scratch.sideload_key, next_outputs->sideload_key,
+                    kKeymgrOutputSizeWords);
+  }
+}
+
+/**
+ * This test implements both the `chip_sw_keymgr_derive_sealing` and
+ * `chip_sw_keymgr_derive_attestation` testplan items, i.e.,
+ * verifies the validity of the sealing and attestation CDI flows. The
+ * individual testpoint requirements are as follows:
+ *
+ * - For each keymgr operational state: `CreatorRootKey`, `OwnerIntKey` and
+ *   `OwnerKey`:
+ *   - Generate identity SW output for the Attestation CDI.
+ *   - Generate SW output for the Attestation CDI.
+ *   - Generate OTBN sideload output for the Attestation CDI.
+ *
+ * The creation of the three outputs is handled by the `derive_identity`,
+ * `derive_sw_key` and `derive_sideload_otbn_key` functions, which are invoked
+ * by `derive_keys` through `test_derive_cdi` that traverses the three
+ * operational states.
+ *
+ * - Ensure that the key output changes after calculating the previous steps
+ *   after a keymgr advance operation.
+ *
+ * The generated CDI outputs in state `i` are passed to state `i+1` and checked
+ * in `derive_keys` that they differ.
+ *
+ * - The keymgr shall be able to reproduce the same keys for a give device
+ *   configuration and known set of inputs.
+ *
+ * The CDI outputs in each state are written into the retention SRAM. After
+ * having cycled through all the states, a software reset is performed and
+ * CDI output generation is repeated making sure that the same keys are being
+ * created (same as the keys in the retention SRAM from the first run) as the
+ * device configuration and inputs are unchanged. Reading/writing and key
+ * comparison all happen in `derive_keys`.
+ *
+ * - The software binding registers must be locked after configuration until a
+ *   keymgr advance operation.
+ *
+ * This check is implemented in the keymgr DIF (see `dif_keymgr_advance_state`).
+ *
+ * - OTP SECRET2 partition (which contains the CREATOR_ROOT_KEY) and flash info
+ *   pages 1 and 2 in partition 0 must be configured, otherwise the keymgr will
+ * fail to advance into operational states.
+ *
+ * The provisioning of the device secrets in the OTP SECRET2 partition is
+ * handled by the Bazel execution environment, and the flash info secrets are
+ * handled by the keymgr testutils (see `keymgr_testutils_init_nvm_then_reset`).
+ *
+ * - Ensure the entropy complex is running in continuous mode, and that KMAC is
+ *   configured to extract entropy from EDN.
+ *
+ * This is configured in the keymgr testutils (see `keymgr_testutils_startup`)
+ * and in `init_peripheral_handles`.
+ *
+ * - The test should check for any error or fault code status, to ensure all
+ *   operations executed successfully.
+ *
+ * Every API call to either the keymgr testutils or the DIF is checked for its
+ * correctness.
+ *
+ * @param reset_counter Indicator of the test phase.
+ */
+static void test_derive_cdi(size_t reset_counter) {
+  const char *state_name;
+
+  dif_keymgr_state_t keymgr_state;
+  CHECK_DIF_OK(dif_keymgr_get_state(&keymgr, &keymgr_state));
+
+  cdi_outputs_t curr_outputs;
+  cdi_outputs_t next_outputs;
+
+  size_t offset = 0;
+  const bool write = reset_counter == 0;
+
+  switch (keymgr_state) {
+    case kDifKeymgrStateCreatorRootKey:
+
+      CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
+      LOG_INFO("Keymgr entered %s State", state_name);
+
+      derive_keys(state_name, NULL, &offset, write, &curr_outputs);
+
+      CHECK_STATUS_OK(
+          keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
+
+      OT_FALLTHROUGH_INTENDED;
+    case kDifKeymgrStateOwnerIntermediateKey:
+
+      CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
+      LOG_INFO("Keymgr entered %s State", state_name);
+
+      derive_keys(state_name,
+                  // If the initial key manager state is smaller than
+                  // the current one, verify that the new keys differ
+                  // from the previous ones.
+                  keymgr_state < kDifKeymgrStateOwnerIntermediateKey
+                      ? &curr_outputs
+                      : NULL,
+                  &offset, write, &next_outputs);
+      memcpy(&curr_outputs, &next_outputs, sizeof(cdi_outputs_t));
+
+      CHECK_STATUS_OK(
+          keymgr_testutils_advance_state(&keymgr, &kOwnerRootKeyParams));
+
+      OT_FALLTHROUGH_INTENDED;
+    case kDifKeymgrStateOwnerRootKey:
+
+      CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
+      LOG_INFO("Keymgr entered %s State", state_name);
+
+      derive_keys(
+          state_name,
+          keymgr_state < kDifKeymgrStateOwnerRootKey ? &curr_outputs : NULL,
+          &offset, write, &next_outputs);
+
+      break;
+    default:
+      // Theoretically, the key manager can boot into an earlier state
+      // (`kDifKeymgrStateReset` or `kDifKeymgrStateInitialized`). This is not
+      // supported by the testutils and thus must not occur here.
+      CHECK(0, "unexpected key manager state %u", keymgr_state);
+  }
+}
+
+bool test_main(void) {
+  const dif_rstmgr_reset_info_bitfield_t reset_info =
+      rstmgr_testutils_reason_get();
+  size_t reset_counter;
+
+  // Reset the reset counter after the first power up.
+  if (reset_info == kDifRstmgrResetInfoPor) {
+    CHECK_STATUS_OK(ret_sram_testutils_counter_clear(0));
+  }
+  CHECK_STATUS_OK(ret_sram_testutils_counter_get(0, &reset_counter));
+
+  init_peripheral_handles();
+
+  // Prepare the flash with secrets only on the first reset.
+  CHECK_STATUS_OK(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  // Reconfigure the KMAC to use the EDN entropy source as opposed to a
+  // software-provided one as is default in the testutils.
+  dif_kmac_config_t config = {
+      .entropy_mode = kDifKmacEntropyModeEdn,
+      .entropy_fast_process = true,
+      .sideload = true,
+  };
+  CHECK_DIF_OK(dif_kmac_configure(&kmac, config));
+
+  test_derive_cdi(reset_counter);
+
+  // Increment the reset counter then reset the device.
+  if (reset_counter == 0) {
+    CHECK_STATUS_OK(ret_sram_testutils_counter_increment(0));
+    CHECK_DIF_OK(dif_rstmgr_software_device_reset(&rstmgr));
+    wait_for_interrupt();
+  }
+
+  return true;
+}
diff --git a/sw/device/tests/keymgr_key_derivation_test.c b/sw/device/tests/keymgr_key_derivation_test.c
index 18470bf744eea..fd8975b0cd860 100644
--- a/sw/device/tests/keymgr_key_derivation_test.c
+++ b/sw/device/tests/keymgr_key_derivation_test.c
@@ -2,64 +2,65 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#include <stdbool.h>
 #include <stdint.h>
 
-#include "sw/device/lib/arch/device.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/lib/dif/dif_keymgr.h"
-#include "sw/device/lib/dif/dif_kmac.h"
-#include "sw/device/lib/dif/dif_otp_ctrl.h"
-#include "sw/device/lib/dif/dif_rstmgr.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
-#include "sw/device/lib/testing/kmac_testutils.h"
-#include "sw/device/lib/testing/rstmgr_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "keymgr_regs.h"  // Generated.
-#include "kmac_regs.h"    // Generated.
-
 OTTF_DEFINE_TEST_CONFIG();
 
 bool test_main(void) {
-  // Initialize keymgr and advance to CreatorRootKey state.
   dif_keymgr_t keymgr;
   dif_kmac_t kmac;
-  CHECK_STATUS_OK(keymgr_testutils_startup(&keymgr, &kmac));
 
-  CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
-  CHECK_STATUS_OK(keymgr_testutils_check_state(
-      &keymgr, kDifKeymgrStateOwnerIntermediateKey));
-  LOG_INFO("Keymgr entered OwnerIntKey State");
+  // Initialize keymgr and advance to the state specified by the loaded ROM.
+  CHECK_STATUS_OK(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  const char *state_name;
+  CHECK_STATUS_OK(keymgr_testutils_state_string_get(&keymgr, &state_name));
+
+  LOG_INFO("Keymgr entered %s State", state_name);
+
+  CHECK_STATUS_OK(keymgr_testutils_generate_identity(
+      &keymgr,
+      (dif_keymgr_identity_seed_params_t){.cdi_type = kDifKeymgrSealingCdi}));
+  LOG_INFO("Keymgr generated identity at %s State", state_name);
+
+  dif_keymgr_versioned_key_params_t sideload_params = kKeyVersionedParams;
+
+  // Get the maximum key version supported by the keymgr in its current state.
+  uint32_t max_key_version;
+  CHECK_STATUS_OK(
+      keymgr_testutils_max_key_version_get(&keymgr, &max_key_version));
 
-  CHECK_STATUS_OK(keymgr_testutils_generate_identity(&keymgr));
-  LOG_INFO("Keymgr generated identity at OwnerIntKey State");
+  if (sideload_params.version > max_key_version) {
+    LOG_INFO("Key version %d is greater than the maximum key version %d",
+             sideload_params.version, max_key_version);
+    LOG_INFO("Setting key version to the maximum key version %d",
+             max_key_version);
+    sideload_params.version = max_key_version;
+  }
 
+  // Generate sw versioned key.
   CHECK_STATUS_OK(
-      keymgr_testutils_generate_versioned_key(&keymgr, kKeyVersionedParams));
-  LOG_INFO("Keymgr generated SW output at OwnerIntKey State");
+      keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
+  LOG_INFO("Keymgr generated SW output at %s State", state_name);
 
   // Generate sideload keys for 3 HW interfaces - Kmac, Aes, Otbn.
-  dif_keymgr_versioned_key_params_t sideload_params = kKeyVersionedParams;
   sideload_params.dest = kDifKeymgrVersionedKeyDestKmac;
   CHECK_STATUS_OK(
       keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
-  LOG_INFO("Keymgr generated HW output for Kmac at OwnerIntKey State");
+  LOG_INFO("Keymgr generated HW output for Kmac at %s State", state_name);
 
   sideload_params.dest = kDifKeymgrVersionedKeyDestAes;
   CHECK_STATUS_OK(
       keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
-  LOG_INFO("Keymgr generated HW output for Aes at OwnerIntKey State");
+  LOG_INFO("Keymgr generated HW output for Aes at %s State", state_name);
 
   sideload_params.dest = kDifKeymgrVersionedKeyDestOtbn;
   CHECK_STATUS_OK(
       keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
-  LOG_INFO("Keymgr generated HW output for Otbn at OwnerIntKey State");
+  LOG_INFO("Keymgr generated HW output for Otbn at %s State", state_name);
 
   CHECK_STATUS_OK(keymgr_testutils_disable(&keymgr));
   CHECK_STATUS_OK(
diff --git a/sw/device/tests/keymgr_sideload_otbn_test.c b/sw/device/tests/keymgr_sideload_otbn_test.c
index 14291cf0eb961..f08ef8d28bac2 100644
--- a/sw/device/tests/keymgr_sideload_otbn_test.c
+++ b/sw/device/tests/keymgr_sideload_otbn_test.c
@@ -16,6 +16,7 @@
 #include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/otbn_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -136,11 +137,14 @@ static void test_otbn_with_sideloaded_key(dif_keymgr_t *keymgr,
 
   // Clear the sideload key and check that OTBN errors with the correct error
   // code (`KEY_INVALID` bit 5 = 1).
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdOtbnRecov));
   CHECK_DIF_OK(
       dif_keymgr_sideload_clear_set_enabled(keymgr, kDifToggleEnabled));
   LOG_INFO("Clearing the Keymgr generated sideload keys.");
   uint32_t at_clear_salt_result[8];
   run_x25519_app(otbn, at_clear_salt_result, kOtbnInvalidKeyErr);
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdOtbnRecov));
 
   // Disable sideload key clearing.
   CHECK_DIF_OK(
diff --git a/sw/device/tests/kmac_app_rom_test.c b/sw/device/tests/kmac_app_rom_test.c
index de360e975413a..97c527dacd373 100644
--- a/sw/device/tests/kmac_app_rom_test.c
+++ b/sw/device/tests/kmac_app_rom_test.c
@@ -5,11 +5,14 @@
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_rom_ctrl.h"
 #include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 
+extern const uint32_t kRomImageHash[ROM_CTRL_DIGEST_MULTIREG_COUNT];
+
 static dif_rom_ctrl_t rom_ctrl;
 
 OTTF_DEFINE_TEST_CONFIG();
@@ -29,6 +32,10 @@ bool test_main(void) {
   CHECK_ARRAYS_EQ(computed_digest.digest, expected_digest.digest,
                   ROM_CTRL_DIGEST_MULTIREG_COUNT,
                   "Mismatch between computed and expected digest.");
+  CHECK_ARRAYS_EQ(expected_digest.digest, kRomImageHash,
+                  ROM_CTRL_DIGEST_MULTIREG_COUNT,
+                  "Mismatch between the expected digest and one generated by "
+                  "`scramble_image.py`.");
 
   return true;
 }
diff --git a/sw/device/tests/kmac_endianess_test.c b/sw/device/tests/kmac_endianess_test.c
new file mode 100644
index 0000000000000..91de970026d3e
--- /dev/null
+++ b/sw/device/tests/kmac_endianess_test.c
@@ -0,0 +1,158 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/**
+ * KMAC test description.
+ */
+typedef struct kmac_test {
+  dif_kmac_mode_kmac_t mode;
+  dif_kmac_key_t key;
+
+  const char *message_big_endian;
+  const char *message_little_endian;
+  size_t message_len;
+
+  size_t digest_len;
+} kmac_test_t;
+
+/**
+ * KMAC test.
+ *
+ * Example taken from:
+ * https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/KMAC_samples.pdf
+ */
+const kmac_test_t kmac_test = {
+    // KMAC
+    .mode = kDifKmacModeKmacLen128,
+    .key =
+        (dif_kmac_key_t){
+            .share0 = {0x43424140, 0x47464544, 0x4B4A4948, 0x4F4E4D4C,
+                       0x53525150, 0x57565554, 0x5B5A5958, 0x5F5E5D5C},
+            .share1 = {0},
+            .length = kDifKmacKeyLen256,
+        },
+    .message_big_endian = "\x00\x01\x02\x03",
+    .message_little_endian = "\x03\x02\x01\x00",
+    .message_len = 4,
+    .digest_len = 8,
+};
+
+/**
+ * Big to little endianess converter.
+ *
+ * Helper function to convert from big to little endian.
+ *
+ * @param big_endian the number in big endian representation.
+ * @return the number in little endian representation.
+ */
+uint32_t big_to_little_endian(uint32_t big_endian) {
+  uint32_t little_endian = 0;
+  little_endian = (big_endian >> 24) & 0xff;
+  little_endian |= (big_endian >> 8) & 0xff00;
+  little_endian |= (big_endian << 8) & 0xff0000;
+  little_endian |= (big_endian << 24) & 0xff000000;
+
+  return little_endian;
+}
+
+/**
+ * Endianess test.
+ *
+ * This test runs the same KMAC operation four times with the following
+ * endianess configuration:
+ * - Little endian message, little endian digest.
+ * - Little endian message, big endian digest.
+ * - Big endian message, little endian digest.
+ * - Big endian message, big endian digest.
+ *
+ * The output of the little endian message and little endian digest is used as a
+ * reference output as this is the default configuration. The other outputs are
+ * accordingly converted and compared.
+ *
+ * @return OK or error.
+ */
+status_t test_endianess(void) {
+  // Intialize KMAC hardware.
+  dif_kmac_t kmac;
+  dif_kmac_operation_state_t kmac_operation_state;
+  CHECK_DIF_OK(
+      dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Test configurations.
+  char msg_log[4][7] = {"little", "little", "big", "big"};
+  char digest_log[4][7] = {"little", "big", "little", "big"};
+  bool msg_endianess_big[4] = {false, false, true, true};
+  bool digest_endianess_big[4] = {false, true, false, true};
+
+  // Reference output for little endian message & digest.
+  uint32_t ref_out[kmac_test.digest_len];
+
+  for (size_t it = 0; it < ARRAYSIZE(msg_endianess_big); it++) {
+    LOG_INFO("Testing %s endian message and %s endian digest.", msg_log[it],
+             digest_log[it]);
+
+    dif_kmac_config_t config = (dif_kmac_config_t){
+        .entropy_mode = kDifKmacEntropyModeSoftware,
+        .entropy_seed = {0xb153e3fe, 0x09596819, 0x3e85a6e8, 0xb6dcdaba,
+                         0x50dc409c, 0x11e1ebd1},
+        .entropy_fast_process = kDifToggleEnabled,
+        .message_big_endian = msg_endianess_big[it],
+        .output_big_endian = digest_endianess_big[it],
+    };
+
+    CHECK_DIF_OK(dif_kmac_configure(&kmac, config));
+    CHECK_DIF_OK(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                                          kmac_test.mode, kmac_test.digest_len,
+                                          &kmac_test.key, NULL));
+    const char *message;
+    if (msg_endianess_big[it]) {
+      message = kmac_test.message_big_endian;
+    } else {
+      message = kmac_test.message_little_endian;
+    }
+
+    uint32_t out[kmac_test.digest_len];
+    CHECK_DIF_OK(dif_kmac_absorb(&kmac, &kmac_operation_state, message,
+                                 kmac_test.message_len, NULL));
+    CHECK_DIF_OK(dif_kmac_squeeze(&kmac, &kmac_operation_state, out,
+                                  kmac_test.digest_len, /*processed=*/NULL,
+                                  /*capacity=*/NULL));
+    CHECK_DIF_OK(dif_kmac_end(&kmac, &kmac_operation_state));
+
+    if (msg_endianess_big[it] == false && digest_endianess_big[it] == false) {
+      // We use little endian message/digest as the reference output.
+      memcpy(ref_out, out, sizeof(ref_out));
+    } else if (digest_endianess_big[it] == true) {
+      // Got big endianess digest, convert to little endian and compare with
+      // reference digest.
+      uint32_t big_to_little[kmac_test.digest_len];
+      for (int i = 0; i < kmac_test.digest_len; i++) {
+        big_to_little[i] = big_to_little_endian(out[i]);
+      }
+      CHECK_ARRAYS_EQ(big_to_little, ref_out, kmac_test.digest_len);
+    } else {
+      // Got little endianess digest, compare with reference digest.
+      CHECK_ARRAYS_EQ(out, ref_out, kmac_test.digest_len);
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  test_endianess();
+  return true;
+}
diff --git a/sw/device/tests/kmac_entropy_stress_test.c b/sw/device/tests/kmac_entropy_stress_test.c
new file mode 100644
index 0000000000000..82686ad479535
--- /dev/null
+++ b/sw/device/tests/kmac_entropy_stress_test.c
@@ -0,0 +1,265 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "kmac_regs.h"  // Generated.
+
+OTTF_DEFINE_TEST_CONFIG();
+
+dif_kmac_config_t kKmacTestCases[] = {
+
+    //////////////////////////////////////////////////////////////////////////////
+    // EDN Mode
+    //////////////////////////////////////////////////////////////////////////////
+
+    // Entropy wait timer is zero
+    {
+        .entropy_mode = kDifKmacEntropyModeEdn,
+        .entropy_fast_process = false,
+        .entropy_hash_threshold = 8,
+        .entropy_wait_timer = 0,
+        .entropy_prescaler = 0,
+    },
+
+    // Entropy wait timer is nonzero
+    {
+        .entropy_mode = kDifKmacEntropyModeEdn,
+        .entropy_fast_process = false,
+        .entropy_hash_threshold = 8,
+        .entropy_wait_timer = 0xffff,
+        .entropy_prescaler = 0x3ff,
+    },
+
+    // Entropy refresh hash count is 0 -- expect no hash counter reset
+    {
+        .entropy_mode = kDifKmacEntropyModeEdn,
+        .entropy_fast_process = false,
+        .entropy_hash_threshold = 0,
+        .entropy_wait_timer = 0,
+        .entropy_prescaler = 1,
+    },
+
+    // Entropy refresh hash count is 1023, the maximum
+    {
+        .entropy_mode = kDifKmacEntropyModeEdn,
+        .entropy_fast_process = false,
+        .entropy_hash_threshold = 1023,
+        .entropy_wait_timer = 0,
+        .entropy_prescaler = 1,
+    },
+
+    //////////////////////////////////////////////////////////////////////////////
+    // SW Mode
+    //////////////////////////////////////////////////////////////////////////////
+
+    // entropy_hash_threshold = 8; in SW mode, the hash counter will still be
+    // reset but entropy will not be refreshed
+    {
+        .entropy_mode = kDifKmacEntropyModeSoftware,
+        .entropy_fast_process = false,
+        .entropy_seed =
+            {
+                0x1234567,
+                0x1234567,
+                0x1234567,
+                0x1234567,
+                0x1234567,
+            },
+        .entropy_hash_threshold = 8,
+        .entropy_wait_timer = 0xffff,
+        .entropy_prescaler = 0x3ff,
+    },
+
+    // entropy_hash_threshold = 0
+    {
+        .entropy_mode = kDifKmacEntropyModeSoftware,
+        .entropy_fast_process = false,
+        .entropy_seed =
+            {
+                0x1234567,
+                0x1234567,
+                0x1234567,
+                0x1234567,
+                0x1234567,
+            },
+        .entropy_hash_threshold = 0,
+        .entropy_wait_timer = 0xffff,
+        .entropy_prescaler = 0x3ff,
+    },
+};
+
+enum {
+  kKmacDigestLenMax = 100,
+  kTestConfigCount = ARRAYSIZE(kKmacTestCases),
+  kKmacIterations = 1000,
+
+  // ENTROPY_REFRESH_THRESHOLD_SHADOWED and ENTROPY_REFRESH_HASH_CNT registers
+  // are 10 bits wide, so the refresh threshold cannot be set higher and the
+  // hash counter cannot count higher than this value
+  kHashCntMax = 0x3ff,
+};
+
+typedef struct kmac_test_vector {
+  dif_kmac_mode_kmac_t mode;
+  dif_kmac_key_t key;
+
+  const char *message;
+  size_t message_len;
+
+  const char *customization_string;
+  size_t customization_string_len;
+
+  const uint32_t digest[kKmacDigestLenMax];
+  size_t digest_len;
+} kmac_test_vector_t;
+
+/**
+ * A single KMAC test vector:
+ * https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/KMAC_samples.pdf
+ */
+const kmac_test_vector_t kKmacTestVector = {
+    .mode = kDifKmacModeKmacLen256,
+    .key =
+        (dif_kmac_key_t){
+            .share0 = {0x43424140, 0x47464544, 0x4b4a4948, 0x4f4e4f4c,
+                       0x53525150, 0x57565554, 0x5b5a5958, 0x5f5e5d5c},
+            .share1 = {0},
+            .length = kDifKmacKeyLen256,
+        },
+    .message =
+        "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+        "\x10\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+        "\x20\x21\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+        "\x30\x31\x32\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+        "\x40\x41\x42\x43\x44\x45\x46\x47\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+        "\x50\x51\x52\x53\x54\x55\x56\x57\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+        "\x60\x61\x62\x63\x64\x65\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f"
+        "\x70\x71\x72\x73\x74\x75\x76\x77\x78\x79\x7a\x7b\x7c\x7d\x7e\x7f"
+        "\x80\x81\x82\x83\x84\x85\x86\x87\x88\x89\x8a\x8b\x8c\x8d\x8e\x8f"
+        "\x90\x91\x92\x93\x94\x95\x96\x97\x98\x99\x9a\x9b\x9c\x9d\x9e\x9f"
+        "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+        "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7\xb8\xb9\xba\xbb\xbc\xbd\xbe\xbf"
+        "\xc0\xc1\xc2\xc3\xc4\xc5\xc6\xc7",
+    .message_len = 200,
+    .customization_string = "My Tagged Application",
+    .customization_string_len = 21,
+    .digest = {0x1c73bed5, 0x73d74e95, 0x59bb4628, 0xe3a8e3db, 0x7ae7830f,
+               0x5944ff4b, 0xb4c2f1f2, 0xceb8ebec, 0xc601ba67, 0x57b88a2e,
+               0x9b492d8d, 0x6727bbd1, 0x90117868, 0x6a300a02, 0x1d28de97,
+               0x5d3030cc},
+    .digest_len = 16,
+};
+
+/**
+ * Run many KMAC operations with a particular entropy configuration.
+ *
+ * This test checks that the KMAC block does not produce any errors and that
+ * the hash counter behaves as expected.
+ */
+status_t test_kmac_config(dif_kmac_config_t *test_case) {
+  // The ENTROPY_REFRESH_THRESHOLD_SHADOWED register is 10 bits wide and cannot
+  // be set to a value higher than kHashCntMax.
+  TRY_CHECK(
+      test_case->entropy_hash_threshold <= kHashCntMax,
+      "Invalid test case: entropy_hash_threshold too high; greater than %d",
+      kHashCntMax);
+
+  dif_kmac_t kmac;
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Handle customization string
+  dif_kmac_customization_string_t cust_str;
+  TRY(dif_kmac_customization_string_init(
+      kKmacTestVector.customization_string,
+      kKmacTestVector.customization_string_len, &cust_str));
+
+  // Configure the KMAC block with the config from the test case
+  test_case->message_big_endian = false;
+  test_case->output_big_endian = false;
+  test_case->sideload = false;
+  test_case->msg_mask = true;
+  TRY(dif_kmac_configure(&kmac, *test_case));
+
+  // Manually clear the hash counter
+  uint32_t hash_count, expected_hash_count = 0;
+  uint32_t cmd_reg = mmio_region_read32(kmac.base_addr, KMAC_CMD_REG_OFFSET);
+  cmd_reg = bitfield_bit32_write(cmd_reg, KMAC_CMD_HASH_CNT_CLR_BIT, 1);
+  mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+  TRY(dif_kmac_get_hash_counter(&kmac, &hash_count));
+  TRY_CHECK(hash_count == 0, "Failed to clear hash counter");
+
+  // Run many KMAC operations
+  for (size_t i = 0; i < kKmacIterations; i++) {
+    dif_kmac_operation_state_t op_state;
+    // Wait for the idle state
+    TRY(dif_kmac_poll_status(&kmac, KMAC_STATUS_SHA3_IDLE_BIT));
+    TRY(dif_kmac_mode_kmac_start(&kmac, &op_state, kKmacTestVector.mode,
+                                 kKmacTestVector.digest_len,
+                                 &kKmacTestVector.key, &cust_str));
+
+    TRY(dif_kmac_absorb(&kmac, &op_state, kKmacTestVector.message,
+                        kKmacTestVector.message_len,
+                        /* processed=*/NULL));
+
+    // All squeeze operations in this test are expected to succeed
+    uint32_t out[kKmacDigestLenMax];
+    TRY(dif_kmac_squeeze(&kmac, &op_state, out, kKmacTestVector.digest_len,
+                         /*processed=*/NULL, /*capacity=*/NULL));
+
+    // Check if the KMAC block is signaling any errors
+    bool irq_err_pending;
+    TRY(dif_kmac_irq_is_pending(&kmac, kDifKmacIrqKmacErr, &irq_err_pending));
+
+    // If IrqKmacErr is pending, get the error status and abort
+    if (irq_err_pending) {
+      dif_kmac_error_t err_status;
+      TRY(dif_kmac_get_error(&kmac, &err_status, NULL));
+
+      TRY_CHECK(!irq_err_pending, "KMAC error occurred: 0x%x", err_status);
+    }
+
+    // Check the hash counter value
+    TRY(dif_kmac_get_hash_counter(&kmac, &hash_count));
+    if (test_case->entropy_hash_threshold != 0) {
+      expected_hash_count =
+          (expected_hash_count + 1) % test_case->entropy_hash_threshold;
+    } else {
+      // If the hash counter threshold is not enabled (i.e. set to 0), the hash
+      // counter maxes out at kHashCntMax and should not overflow
+      expected_hash_count = MIN(expected_hash_count + 1, (uint32_t)kHashCntMax);
+    }
+    TRY_CHECK(expected_hash_count == hash_count,
+              "Unexpected hash counter value: Got %d, Expected %d", hash_count,
+              expected_hash_count);
+
+    TRY(dif_kmac_end(&kmac, &op_state));
+  }
+
+  return OK_STATUS();
+}
+
+status_t test_kmac_entropy_stress(void) {
+  LOG_INFO("Running KMAC entropy stress test...");
+
+  for (size_t i = 0; i < kTestConfigCount; i++) {
+    LOG_INFO("Running test case %d", i);
+    test_kmac_config(&kKmacTestCases[i]);
+  }
+
+  LOG_INFO("DONE");
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  static status_t result;
+  EXECUTE_TEST(result, test_kmac_entropy_stress);
+  return status_ok(result);
+}
diff --git a/sw/device/tests/kmac_entropy_test.c b/sw/device/tests/kmac_entropy_test.c
index 06e110b272d5e..95a8d84fc7493 100644
--- a/sw/device/tests/kmac_entropy_test.c
+++ b/sw/device/tests/kmac_entropy_test.c
@@ -6,10 +6,12 @@
 #include "sw/device/lib/base/mmio.h"
 #include "sw/device/lib/dif/dif_kmac.h"
 #include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "kmac_regs.h"  // Generated.
 
 OTTF_DEFINE_TEST_CONFIG();
 
@@ -53,6 +55,8 @@ enum {
   kKmacTimeoutTestCount = ARRAYSIZE(kTestTimeoutVals),
   // Maxiumum digest size in bytes
   kKmacDigestLenMax = 100,
+  kKmacEntropyHashThresholdStall = 2,
+  kNumIterationsStall = kKmacEntropyHashThresholdStall,
 };
 
 /**
@@ -111,7 +115,112 @@ const kmac_test_t kKmacTestVector = {
     .digest_len_is_fixed = false,
 };
 
-bool test_main(void) {
+// Function to disable entropy complex
+status_t disable_entropy_complex(void) {
+  // Using entropy test utility to stop all EDN0, EDN1, CSRNG, and the Entropy
+  // Source
+  TRY(entropy_testutils_stop_all());
+  LOG_INFO("The entire entropy complex is stopped");
+  return OK_STATUS();
+}
+
+// Function to enable entropy complex
+status_t enable_entropy_complex(void) {
+  // Using entropy test utility to enable all EDN0, EDN1, CSRNG, and the
+  // Entropy Source
+  TRY(entropy_testutils_auto_mode_init());
+  LOG_INFO("The entire entropy complex is enabled");
+  return OK_STATUS();
+}
+
+status_t test_kmac_entropy_stall(void) {
+  LOG_INFO("Running KMAC ENTROPY STALL test...");
+
+  // Initialize KMAC HWIP
+  dif_kmac_t kmac;
+  CHECK_DIF_OK(
+      dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Configure KMAC to use EDN entropy
+  dif_kmac_config_t config = {
+      .entropy_mode = kDifKmacEntropyModeEdn,
+      .entropy_fast_process = false,
+      .entropy_hash_threshold = kKmacEntropyHashThresholdStall,
+      .message_big_endian = false,
+      .output_big_endian = false,
+      .sideload = false,
+      .msg_mask = false,
+      .entropy_prescaler = 0x3ff,
+      .entropy_wait_timer = 0xffff,
+  };
+
+  // Handle string encoding
+  dif_kmac_customization_string_t str_buffer;
+  CHECK_DIF_OK(dif_kmac_customization_string_init(
+      kKmacTestVector.customization_string,
+      kKmacTestVector.customization_string_len, &str_buffer));
+
+  // When customization_string is empty, use NULL to activate empty str path
+  dif_kmac_customization_string_t *str_buffer_ptr =
+      kKmacTestVector.customization_string_len == 0 ? NULL : &str_buffer;
+
+  size_t test_digest_len =
+      kKmacTestVector.digest_len_is_fixed ? kKmacTestVector.digest_len : 0;
+
+  uint32_t hash_ctr;
+  CHECK_DIF_OK(dif_kmac_get_hash_counter(&kmac, &hash_ctr));
+  for (size_t i = 0; i < kNumIterationsStall; i++) {
+    LOG_INFO("loop_ctr = %d", i);
+
+    if (i == kKmacEntropyHashThresholdStall - 1) {
+      LOG_INFO("Disabling entropy complex to trigger a stall");
+      TRY(disable_entropy_complex());
+    }
+
+    TRY(dif_kmac_configure(&kmac, config));
+
+    dif_kmac_operation_state_t kmac_operation_state;
+    TRY(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                                 kKmacTestVector.mode, test_digest_len,
+                                 &kKmacTestVector.key, str_buffer_ptr));
+
+    TRY(dif_kmac_absorb(&kmac, &kmac_operation_state, kKmacTestVector.message,
+                        kKmacTestVector.message_len, NULL));
+    CHECK(kKmacDigestLenMax >= kKmacTestVector.digest_len);
+
+    uint32_t out[kKmacDigestLenMax];
+    if (i == kKmacEntropyHashThresholdStall - 1) {
+      // Manually issue a squeeze command to check whether KMAC stalls if
+      // entropy complex is disabled.
+      uint32_t cmd_reg = bitfield_field32_write(0, KMAC_CMD_CMD_FIELD,
+                                                KMAC_CMD_CMD_VALUE_PROCESS);
+      mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+      kmac_operation_state.squeezing = true;
+      // Check status.
+      dif_kmac_status_t kmac_status;
+      CHECK_DIF_OK(dif_kmac_get_status(&kmac, &kmac_status));
+      TRY_CHECK(kmac_status.sha3_state != kDifKmacSha3StateSqueezing,
+                "KMAC not stalling");
+      LOG_INFO("KMAC stalled as expected after disabling entropy complex");
+      // Re-enable entropy complex and check whether we can resume operation.
+      TRY(enable_entropy_complex());
+      CHECK_DIF_OK(dif_kmac_get_status(&kmac, &kmac_status));
+      TRY_CHECK(kmac_status.sha3_state == kDifKmacSha3StateSqueezing,
+                "KMAC not in squeeze state");
+      LOG_INFO("KMAC is is squeeze state after enabling entropy complex");
+    } else {
+      TRY(dif_kmac_squeeze(&kmac, &kmac_operation_state, out,
+                           kKmacTestVector.digest_len,
+                           /*processed=*/NULL, /*capacity=*/NULL));
+    }
+    // Flush out the result and check correctness
+    CHECK_DIF_OK(dif_kmac_end(&kmac, &kmac_operation_state));
+  }
+
+  return OK_STATUS();
+}
+
+status_t test_kmac_entropy(void) {
   LOG_INFO("Running KMAC ENTROPY test...");
 
   // Initialize KMAC HWIP
@@ -223,5 +332,14 @@ bool test_main(void) {
     LOG_INFO("hash_ctr = %d", hash_ctr);
   }
 
-  return true;
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  static status_t result;
+
+  EXECUTE_TEST(result, test_kmac_entropy);
+  EXECUTE_TEST(result, test_kmac_entropy_stall);
+
+  return status_ok(result);
 }
diff --git a/sw/device/tests/kmac_error_conditions_test.c b/sw/device/tests/kmac_error_conditions_test.c
new file mode 100644
index 0000000000000..bc4aca3736ef9
--- /dev/null
+++ b/sw/device/tests/kmac_error_conditions_test.c
@@ -0,0 +1,718 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_clkmgr.h"
+#include "sw/device/lib/dif/dif_keymgr.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/kmac_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "keymgr_regs.h"  // Generated.
+#include "kmac_regs.h"    // Generated.
+
+static dif_kmac_t kmac;
+static dif_keymgr_t keymgr;
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/**
+ * KMAC test description.
+ */
+typedef struct kmac_test {
+  dif_kmac_mode_kmac_t mode;
+  dif_kmac_key_t key;
+
+  const char *message;
+  size_t message_len;
+
+  const char *customization_string;
+  size_t customization_string_len;
+
+  const uint32_t digest[16];
+  size_t digest_len;
+  bool digest_len_is_fixed;
+} kmac_test_t;
+
+/**
+ * A single KMAC example taken from:
+ * https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/KMAC_samples.pdf
+ */
+static const kmac_test_t kKmacTestVector = {
+    .mode = kDifKmacModeKmacLen256,
+    .key =
+        (dif_kmac_key_t){
+            .share0 = {0x43424140, 0x47464544, 0x4b4a4948, 0x4f4e4f4c,
+                       0x53525150, 0x57565554, 0x5b5a5958, 0x5f5e5d5c},
+            .share1 = {0},
+            .length = kDifKmacKeyLen256,
+        },
+    .message =
+        "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+        "\x10\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+        "\x20\x21\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+        "\x30\x31\x32\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+        "\x40\x41\x42\x43\x44\x45\x46\x47\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+        "\x50\x51\x52\x53\x54\x55\x56\x57\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+        "\x60\x61\x62\x63\x64\x65\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f"
+        "\x70\x71\x72\x73\x74\x75\x76\x77\x78\x79\x7a\x7b\x7c\x7d\x7e\x7f"
+        "\x80\x81\x82\x83\x84\x85\x86\x87\x88\x89\x8a\x8b\x8c\x8d\x8e\x8f"
+        "\x90\x91\x92\x93\x94\x95\x96\x97\x98\x99\x9a\x9b\x9c\x9d\x9e\x9f"
+        "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+        "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7\xb8\xb9\xba\xbb\xbc\xbd\xbe\xbf"
+        "\xc0\xc1\xc2\xc3\xc4\xc5\xc6\xc7",
+    .message_len = 200,
+    .customization_string = "My Tagged Application",
+    .customization_string_len = 21,
+    .digest = {0x1c73bed5, 0x73d74e95, 0x59bb4628, 0xe3a8e3db, 0x7ae7830f,
+               0x5944ff4b, 0xb4c2f1f2, 0xceb8ebec, 0xc601ba67, 0x57b88a2e,
+               0x9b492d8d, 0x6727bbd1, 0x90117868, 0x6a300a02, 0x1d28de97,
+               0x5d3030cc},
+    .digest_len = 16,
+    .digest_len_is_fixed = false,
+};
+
+/**
+ * Init key manager.
+ *
+ * @return OK or error.
+ */
+status_t setup_keymgr(void) {
+  // Initialize keymgr and advance to the state specified by the loaded ROM.
+  TRY(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  return OK_STATUS();
+}
+
+/**
+ * Poll the SHA3_IDLE bit.
+ *
+ * @param kmac The KMAC handle.
+ */
+void poll_sha3_idle_bit(const dif_kmac_t *kmac) {
+  uint32_t reg;
+  do {
+    reg = mmio_region_read32(kmac->base_addr, KMAC_STATUS_REG_OFFSET);
+  } while (!bitfield_bit32_read(reg, KMAC_STATUS_SHA3_IDLE_BIT));
+}
+
+/**
+ * Poll the KMAC_DONE bit.
+ *
+ * @param kmac The KMAC handle.
+ */
+void poll_kmac_done_bit(const dif_kmac_t *kmac) {
+  uint32_t reg;
+  do {
+    reg = mmio_region_read32(kmac->base_addr, KMAC_INTR_STATE_REG_OFFSET);
+  } while (!bitfield_bit32_read(reg, KMAC_INTR_STATE_KMAC_DONE_BIT));
+}
+
+/**
+ * Check and clear the KMAC error.
+ *
+ * Performs the following:
+ * - Check whether error interrupt was seen.
+ * - Check whether the expected error was seen.
+ * - Clears the error interrupt.
+ * - Sets the error processed bit.
+ * - Reset the KMAC IP.
+ * - Waits until KMAC again gets ready.
+ * - Waits until the KMAC_DONE bit is seen.
+ *
+ * @param kmac The KMAC handle.
+ * @param exp_err The expected error.
+ * @param wait_done Wait for kmac_done bit. Not needed for tests that don't
+ * start KMAC.
+ * @return OK or error.
+ */
+status_t check_and_clear_error(const dif_kmac_t *kmac, dif_kmac_error_t exp_err,
+                               bool wait_done) {
+  dif_kmac_error_t err;
+  dif_kmac_operation_state_t kmac_operation_state;
+  uint32_t info;
+  bool error;
+
+  // Check whether the KMAC ERR bit was set in the interrupt state register.
+  TRY(dif_kmac_has_error_occurred(kmac, &error));
+  TRY_CHECK(error, "No error was triggered.");
+
+  TRY(dif_kmac_get_error(kmac, &err, &info));
+  TRY_CHECK(err == exp_err, "Unexpected error was triggered.");
+
+  // Clear the error IRQ.
+  TRY(dif_kmac_clear_err_irq(kmac));
+  // Set err_processed bit.
+  TRY(dif_kmac_err_processed(kmac));
+  // Reset the KMAC IP.
+  TRY(dif_kmac_reset(kmac, &kmac_operation_state));
+
+  // Wait until sha3_idle is again set.
+  poll_sha3_idle_bit(kmac);
+
+  // Wait until KMAC flags the done bit.
+  if (wait_done) {
+    poll_kmac_done_bit(kmac);
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * ErrWaitTimerExpired.
+ *
+ * This test checks whether the ErrWaitTimerExpired error code is
+ * returned by the hardware when KMAC timed out while waiting for EDN entropy.
+ * By configuring a small wait timer (=1), the timeout immediately will be
+ * triggered and we should see the expected error code.
+ *
+ * @return OK or error.
+ */
+status_t test_err_wait_timer_expired(void) {
+  LOG_INFO("Testing ErrWaitTimerExpired error.");
+
+  // Init the KMAC block.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  const dif_kmac_config_t config = (dif_kmac_config_t){
+      .entropy_mode = kDifKmacEntropyModeEdn,
+      .entropy_wait_timer = 0x001,  // Small wait time out to trigger the error.
+      .entropy_prescaler = 0x000,
+      .entropy_fast_process = kDifToggleDisabled,
+      .entropy_seed = {0xaa25b4bf, 0x48ce8fff, 0x5a78282a, 0x48465647,
+                       0x70410fef},
+      .message_big_endian = kDifToggleDisabled,
+      .output_big_endian = kDifToggleDisabled,
+      .sideload = kDifToggleDisabled,
+      .msg_mask = kDifToggleEnabled,
+  };
+
+  TRY(dif_kmac_configure(&kmac, config));
+
+  dif_kmac_operation_state_t kmac_operation_state;
+  TRY(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                               kKmacTestVector.mode, 0, &kKmacTestVector.key,
+                               NULL));
+
+  TRY(dif_kmac_absorb(&kmac, &kmac_operation_state, kKmacTestVector.message,
+                      kKmacTestVector.message_len, NULL));
+
+  // This is where timeout might happen, so we handle dif return manually.
+  uint32_t digest[kKmacTestVector.digest_len];
+  dif_result_t res = dif_kmac_squeeze(&kmac, &kmac_operation_state, digest,
+                                      kKmacTestVector.digest_len,
+                                      /*processed=*/NULL, /*capacity=*/NULL);
+
+  // It is OK to get kDifError at this point because of possible timeout.
+  TRY_CHECK(res == kDifOk || res == kDifError);
+
+  // Check if there is a new error.
+  bool irq_err_pending;
+  TRY(dif_kmac_irq_is_pending(&kmac, kDifKmacIrqKmacErr, &irq_err_pending));
+  if (irq_err_pending) {
+    dif_kmac_error_t err_status;
+    uint32_t err_info;
+    TRY(dif_kmac_get_error(&kmac, &err_status, &err_info));
+    TRY_CHECK(err_status == kDifErrorEntropyWaitTimerExpired,
+              "Error other than EDN timeout occurred.");
+    LOG_INFO("EDN timed out.");
+  } else {
+    LOG_INFO("EDN seed received before timeout.");
+  }
+
+  // At this point, irq_err_pending says if timeout is observed
+  TRY_CHECK(irq_err_pending == true,
+            "EDN timeout expectation doesn't match observation.");
+
+  // Flush out the result and check correctness
+  TRY(dif_kmac_end(&kmac, &kmac_operation_state));
+
+  // If err interrupt is generated, we need clean-up
+  if (irq_err_pending) {
+    // Clean INTR_STATE
+    TRY(dif_kmac_irq_acknowledge_all(&kmac));
+
+    // Reset FSM by setting `err_processed` bit
+    TRY(dif_kmac_reset(&kmac, &kmac_operation_state));
+
+    // At this point, we expect that there are no remaining interrupts.
+    dif_kmac_irq_state_snapshot_t intr_snapshot;
+    TRY(dif_kmac_irq_get_state(&kmac, &intr_snapshot));
+    TRY_CHECK(intr_snapshot == 0,
+              "INTR_STATE is non-zero after timeout clean-up.");
+
+    bool is_kmac_locked;
+    TRY(dif_kmac_config_is_locked(&kmac, &is_kmac_locked));
+    TRY_CHECK(!is_kmac_locked, "KMAC still locked after timeout clean-up.");
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * ErrIncorrectEntropyMode.
+ *
+ * This test checks whether the ErrIncorrectEntropyMode error code is
+ * returned by the hardware when using a wrong entropy mode configuration.
+ *
+ * @return OK or error.
+ */
+status_t test_err_incorrect_entropy_mode(void) {
+  LOG_INFO("Testing ErrIncorrectEntropyMode error.");
+
+  // Re-init KMAC for the test.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Write configuration register.
+  uint32_t cfg_reg = 0;
+  // Provide invalid entropy mode (other than kDifKmacEntropyModeSoftware or
+  // kDifKmacEntropyModeEdn)
+  cfg_reg = bitfield_field32_write(cfg_reg,
+                                   KMAC_CFG_SHADOWED_ENTROPY_MODE_FIELD, 0xf);
+  // Set remaining config to a valid one.
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_MSG_ENDIANNESS_BIT,
+                                 kDifToggleDisabled);
+  cfg_reg = bitfield_bit32_write(
+      cfg_reg, KMAC_CFG_SHADOWED_STATE_ENDIANNESS_BIT, kDifToggleDisabled);
+  cfg_reg = bitfield_bit32_write(
+      cfg_reg, KMAC_CFG_SHADOWED_ENTROPY_FAST_PROCESS_BIT, kDifToggleDisabled);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_SIDELOAD_BIT,
+                                 kDifToggleDisabled);
+  cfg_reg =
+      bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_ENTROPY_READY_BIT, true);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_MSG_MASK_BIT,
+                                 kDifToggleEnabled);
+  mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                               cfg_reg);
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(&kmac, kDifErrorEntropyModeIncorrect, false);
+}
+
+/**
+ * ErrSwHashingWithoutEntropyReady.
+ *
+ * This test checks whether the ErrSwHashingWithoutEntropyReady error code is
+ * returned by the hardware when the entropy is not ready within the KMAC IP
+ * block.
+ *
+ * @return OK or error.
+ */
+status_t test_err_sw_hashing_without_entropy_ready(void) {
+  LOG_INFO("Testing ErrSwHashingWithoutEntropyReady error.");
+
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Manually init the KMAC block and do not set entropy_ready bit.
+  // Write entropy period register.
+  uint32_t entropy_period_reg = 0;
+  entropy_period_reg = bitfield_field32_write(
+      entropy_period_reg, KMAC_ENTROPY_PERIOD_WAIT_TIMER_FIELD, 0);
+  entropy_period_reg = bitfield_field32_write(
+      entropy_period_reg, KMAC_ENTROPY_PERIOD_PRESCALER_FIELD, 0);
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_PERIOD_REG_OFFSET,
+                      entropy_period_reg);
+
+  // Write threshold register.
+  uint32_t entropy_threshold_reg =
+      KMAC_ENTROPY_REFRESH_THRESHOLD_SHADOWED_REG_RESVAL;
+  entropy_threshold_reg = bitfield_field32_write(
+      entropy_threshold_reg,
+      KMAC_ENTROPY_REFRESH_THRESHOLD_SHADOWED_THRESHOLD_FIELD, 0);
+  mmio_region_write32_shadowed(
+      kmac.base_addr, KMAC_ENTROPY_REFRESH_THRESHOLD_SHADOWED_REG_OFFSET,
+      entropy_threshold_reg);
+  // Write configuration register.
+  uint32_t cfg_reg = 0;
+  // Set entropy ready bit to false in order to trigger the error we want to
+  // see.
+  cfg_reg =
+      bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_ENTROPY_READY_BIT, false);
+  cfg_reg =
+      bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_ENTROPY_MODE_FIELD,
+                             KMAC_CFG_SHADOWED_ENTROPY_MODE_VALUE_EDN_MODE);
+  cfg_reg = bitfield_bit32_write(
+      cfg_reg, KMAC_CFG_SHADOWED_ENTROPY_FAST_PROCESS_BIT, kDifToggleDisabled);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_SIDELOAD_BIT,
+                                 kDifToggleDisabled);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_MSG_MASK_BIT,
+                                 kDifToggleEnabled);
+  mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                               cfg_reg);
+  // Write entropy seed registers.
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_SEED_REG_OFFSET, 0xaa25b4bf);
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_SEED_REG_OFFSET, 0x48ce8fff);
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_SEED_REG_OFFSET, 0x5a78282a);
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_SEED_REG_OFFSET, 0x48465647);
+  mmio_region_write32(kmac.base_addr, KMAC_ENTROPY_SEED_REG_OFFSET, 0x70410fef);
+
+  // Configure cSHAKE mode with the given strength and enable KMAC mode.
+  cfg_reg = mmio_region_read32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_KMAC_EN_BIT, true);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_KSTRENGTH_FIELD,
+                                   KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L256);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_MODE_FIELD,
+                                   KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE);
+  mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                               cfg_reg);
+
+  // Write prefix to module.
+  uint32_t prefix_regs[11] = {
+      0x4D4B2001,  //  1  32  'K' 'M'
+      0x00014341,  // 'A' 'C'  1   0
+  };
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_0_REG_OFFSET, prefix_regs[0]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_1_REG_OFFSET, prefix_regs[1]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_2_REG_OFFSET, prefix_regs[2]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_3_REG_OFFSET, prefix_regs[3]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_4_REG_OFFSET, prefix_regs[4]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_5_REG_OFFSET, prefix_regs[5]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_6_REG_OFFSET, prefix_regs[6]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_7_REG_OFFSET, prefix_regs[7]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_8_REG_OFFSET, prefix_regs[8]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_9_REG_OFFSET, prefix_regs[9]);
+  mmio_region_write32(kmac.base_addr, KMAC_PREFIX_10_REG_OFFSET,
+                      prefix_regs[10]);
+
+  // Issue START command.
+  uint32_t cmd_reg =
+      bitfield_field32_write(0, KMAC_CMD_CMD_FIELD, KMAC_CMD_CMD_VALUE_START);
+  mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(
+      &kmac, kDifErrorSoftwareHashingWithoutEntropyReady, false);
+}
+
+/**
+ * ErrorIncorrectFunctionName.
+ *
+ * This test checks whether the kDifErrorIncorrectFunctionName error code is
+ * returned by the hardware when using a wrong (i.e., other than "KMAC")
+ * function name when in KMAC mode.
+ *
+ * @return OK or error.
+ */
+status_t test_err_incorrect_fnc_name(void) {
+  LOG_INFO("Testing kDifErrorIncorrectFunctionName error.");
+  // Re-init KMAC for the test.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+  TRY(kmac_testutils_config(&kmac, false));
+
+  // Configure cSHAKE mode with the given strength and enable KMAC mode.
+  uint32_t cfg_reg =
+      mmio_region_read32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_KMAC_EN_BIT, true);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_KSTRENGTH_FIELD,
+                                   KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L256);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_MODE_FIELD,
+                                   KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE);
+  mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                               cfg_reg);
+
+  // Expected function name is "KMAC", set it to something different in order to
+  // trigger the expected error.
+  uint32_t prefix_regs[11];
+  memset(&prefix_regs, 0xff, ARRAYSIZE(prefix_regs) * sizeof(uint32_t));
+
+  // Write PREFIX register values.
+  const mmio_region_t base = kmac.base_addr;
+  mmio_region_write32(base, KMAC_PREFIX_0_REG_OFFSET, prefix_regs[0]);
+  mmio_region_write32(base, KMAC_PREFIX_1_REG_OFFSET, prefix_regs[1]);
+  mmio_region_write32(base, KMAC_PREFIX_2_REG_OFFSET, prefix_regs[2]);
+  mmio_region_write32(base, KMAC_PREFIX_3_REG_OFFSET, prefix_regs[3]);
+  mmio_region_write32(base, KMAC_PREFIX_4_REG_OFFSET, prefix_regs[4]);
+  mmio_region_write32(base, KMAC_PREFIX_5_REG_OFFSET, prefix_regs[5]);
+  mmio_region_write32(base, KMAC_PREFIX_6_REG_OFFSET, prefix_regs[6]);
+  mmio_region_write32(base, KMAC_PREFIX_7_REG_OFFSET, prefix_regs[7]);
+  mmio_region_write32(base, KMAC_PREFIX_8_REG_OFFSET, prefix_regs[8]);
+  mmio_region_write32(base, KMAC_PREFIX_9_REG_OFFSET, prefix_regs[9]);
+  mmio_region_write32(base, KMAC_PREFIX_10_REG_OFFSET, prefix_regs[10]);
+
+  // Issue START command.
+  uint32_t cmd_reg =
+      bitfield_field32_write(0, KMAC_CMD_CMD_FIELD, KMAC_CMD_CMD_VALUE_START);
+  mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+  // The error should have been triggered after issuing the START command.
+  // Manually finish the KMAC operation in order to again reach the IDLE state.
+  dif_kmac_operation_state_t kmac_operation_state;
+  kmac_operation_state.r = 34;
+  kmac_operation_state.squeezing = false;
+  kmac_operation_state.offset = 0;
+  kmac_operation_state.d = 0;
+  kmac_operation_state.append_d = false;
+  TRY(dif_kmac_absorb(&kmac, &kmac_operation_state, kKmacTestVector.message,
+                      kKmacTestVector.message_len, NULL));
+  TRY(dif_kmac_squeeze(&kmac, &kmac_operation_state, NULL, 0,
+                       /*processed=*/NULL, /*capacity=*/NULL));
+  TRY(dif_kmac_end(&kmac, &kmac_operation_state));
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(&kmac, kDifErrorIncorrectFunctionName, true);
+}
+
+/**
+ * ErrKeyNotValid.
+ *
+ * This test checks whether the ErrKeyNotValid error code is returned by the
+ * hardware when an invalid key is provided.
+ *
+ * @return OK or error.
+ */
+status_t test_err_key_not_valid(void) {
+  LOG_INFO("Testing ErrKeyNotValid error.");
+  // Re-init KMAC for the test.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+  // Configure KMAC to use the sideloaded key.
+  TRY(kmac_testutils_config(&kmac, true));
+
+  // Start the KMAC operation without setting a valid sideloaded key. The
+  // provided SW key is ignored as we configured KMAC to use the sideloaded key.
+  dif_kmac_operation_state_t kmac_operation_state;
+  TRY(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                               kKmacTestVector.mode, 0, &kKmacTestVector.key,
+                               NULL));
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(&kmac, kDifErrorKeyNotValid, true);
+}
+
+/**
+ * Shadow register update alert.
+ *
+ * This test checks whether the recoverable alert gets triggered when a shadow
+ * register update error occurs. For this test, the KMAC_CFG_SHADOWED register
+ * is written twice with two different configurations.
+ *
+ * @return OK or error.
+ */
+status_t test_err_shadow_reg_update(void) {
+  LOG_INFO("Testing shadow register update error.");
+
+  // Init the KMAC block.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  // Configure KMAC hardware.
+  TRY(kmac_testutils_config(&kmac, false));
+  // Configure some valid mode and strength.
+  uint32_t cfg_reg =
+      mmio_region_read32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_KSTRENGTH_FIELD,
+                                   KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L256);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_MODE_FIELD,
+                                   KMAC_CFG_SHADOWED_MODE_VALUE_CSHAKE);
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_KMAC_EN_BIT, true);
+  // Only write once to the register.
+  mmio_region_write32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET, cfg_reg);
+  // Change the value of one config bit and write again.
+  cfg_reg = bitfield_bit32_write(cfg_reg, KMAC_CFG_SHADOWED_KMAC_EN_BIT, false);
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdKmacRecovOperationErr));
+  mmio_region_write32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET, cfg_reg);
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_finish(
+      kTopEarlgreyAlertIdKmacRecovOperationErr));
+
+  // On a mismatch between first and second write, the recoverable alert should
+  // trigger.
+  uint32_t status_reg =
+      mmio_region_read32(kmac.base_addr, KMAC_STATUS_REG_OFFSET);
+  TRY_CHECK(bitfield_bit32_read(status_reg,
+                                KMAC_STATUS_ALERT_RECOV_CTRL_UPDATE_ERR_BIT),
+            "No recoverable alert occured.");
+
+  // Reset the KMAC FSM.
+  dif_kmac_operation_state_t kmac_operation_state;
+  TRY(dif_kmac_reset(&kmac, &kmac_operation_state));
+
+  return OK_STATUS();
+}
+
+/**
+ * ErrorSoftwareCommandSequence.
+ *
+ * This test checks whether the kDifErrorSoftwareCommandSequence error code is
+ * returned by the hardware when sending software commands in a wrong order to
+ * the KMAC block. Note that this test is not exhaustive, i.e., the test does
+ * not trying to reach the ErrorSoftwareCommandSequence error state from each
+ * other state.
+ *
+ * @return OK or error.
+ */
+status_t test_err_sw_cmd_sequence(void) {
+  LOG_INFO("Testing kDifErrorSoftwareCommandSequence error.");
+  uint32_t cmds[3] = {KMAC_CMD_CMD_VALUE_PROCESS, KMAC_CMD_CMD_VALUE_RUN,
+                      KMAC_CMD_CMD_VALUE_DONE};
+
+  for (int it = 0; it < ARRAYSIZE(cmds); it++) {
+    // Re-init KMAC for the test.
+    TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR),
+                      &kmac));
+    // Configure KMAC hardware (using software key and software entropy).
+    TRY(kmac_testutils_config(&kmac, false));
+
+    // Send CmdDone after initializing KMAC.
+    uint32_t cmd_reg = bitfield_field32_write(0, KMAC_CMD_CMD_FIELD, cmds[it]);
+    mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+
+    // Check whether we got the expected error.
+    check_and_clear_error(&kmac, kDifErrorSoftwareCommandSequence, true);
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * ErrUnexpectedModeStrength.
+ *
+ * This test checks whether the ErrUnexpectedModeStrength error code is
+ * returned by the hardware when using a wrong strength. For mode SHA3 use
+ * 128-bit strength and for SHAKE 224-bit.
+ *
+ * @return OK or error.
+ */
+status_t test_err_unexpected_mode_strength(void) {
+  LOG_INFO("Testing ErrUnexpectedModeStrength error.");
+
+  uint32_t misconfigured_strength[2] = {KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L128,
+                                        KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L224};
+  uint32_t mode[2] = {KMAC_CFG_SHADOWED_MODE_VALUE_SHA3,
+                      KMAC_CFG_SHADOWED_MODE_VALUE_SHAKE};
+
+  for (int it = 0; it < ARRAYSIZE(mode); it++) {
+    // Re-init KMAC for the test.
+    TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR),
+                      &kmac));
+    TRY(kmac_testutils_config(&kmac, false));
+
+    uint32_t cfg_reg =
+        mmio_region_read32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET);
+    // Misconfigure the strength.
+    cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_KSTRENGTH_FIELD,
+                                     misconfigured_strength[it]);
+    cfg_reg =
+        bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_MODE_FIELD, mode[it]);
+    mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                                 cfg_reg);
+
+    // Issue start command.
+    uint32_t cmd_reg =
+        bitfield_field32_write(0, KMAC_CMD_CMD_FIELD, KMAC_CMD_CMD_VALUE_START);
+    mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_reg);
+
+    // Check whether we got the expected error.
+    check_and_clear_error(&kmac, kDifErrorUnexpectedModeStrength, false);
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * ErrSwIssuedCmdInAppActive.
+ *
+ * This test checks whether the ErrSwIssuedCmdInAppActive error code is
+ * returned by the hardware when a KMAC software command is issued during the
+ * app interface is active. For this, the key manager is instrumented to request
+ * a key from KMAC, which triggers an app interface request.
+ *
+ * @return OK or error.
+ */
+status_t test_err_sw_issued_cmd_in_app(void) {
+  LOG_INFO("Testing ErrSwIssuedCmdInAppActive error.");
+
+  // Configure KMAC with some config.
+  uint32_t cfg_reg =
+      mmio_region_read32(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_KSTRENGTH_FIELD,
+                                   KMAC_CFG_SHADOWED_KSTRENGTH_VALUE_L224);
+  cfg_reg = bitfield_field32_write(cfg_reg, KMAC_CFG_SHADOWED_MODE_FIELD,
+                                   KMAC_CFG_SHADOWED_MODE_VALUE_SHA3);
+  mmio_region_write32_shadowed(kmac.base_addr, KMAC_CFG_SHADOWED_REG_OFFSET,
+                               cfg_reg);
+
+  // Instrument key manager to use the KMAC app interface.
+  uint32_t reg_control =
+      bitfield_field32_write(0, KEYMGR_CONTROL_SHADOWED_DEST_SEL_FIELD,
+                             KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC);
+  reg_control = bitfield_field32_write(
+      reg_control, KEYMGR_CONTROL_SHADOWED_OPERATION_FIELD,
+      KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT);
+  mmio_region_write32_shadowed(keymgr.base_addr,
+                               KEYMGR_CONTROL_SHADOWED_REG_OFFSET, reg_control);
+
+  // Test whether ErrSwIssuedCmdInAppActive can be triggered by writing START
+  // command. Setup the START KMAC command.
+  uint32_t cmd_start =
+      bitfield_field32_write(0, KMAC_CMD_CMD_FIELD, KMAC_CMD_CMD_VALUE_START);
+  // Start the key manager operation.
+  mmio_region_write32(keymgr.base_addr, KEYMGR_START_REG_OFFSET,
+                      1 << KEYMGR_START_EN_BIT);
+  // Do not wait until operation has finished. Directly issue the command to
+  // trigger the ErrSwIssuedCmdInAppActive error.
+  mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, cmd_start);
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(
+      &kmac, kDifErrorSoftwareIssuedCommandWhileAppInterfaceActive, true);
+}
+
+/**
+ * ErrSwPushedMsgFifo.
+ *
+ * This test checks whether the ErrSwPushedMsgFifo error code is
+ * returned by the hardware when writing to the message FIFO while the
+ * application interface is active.
+ *
+ * @return OK or error.
+ */
+status_t test_err_sw_pushed_msg_fifo(void) {
+  LOG_INFO("Testing ErrSwPushedMsgFifo error.");
+
+  // Instrument key manager to use the KMAC app interface.
+  uint32_t reg_control =
+      bitfield_field32_write(0, KEYMGR_CONTROL_SHADOWED_DEST_SEL_FIELD,
+                             KEYMGR_CONTROL_SHADOWED_DEST_SEL_VALUE_KMAC);
+  reg_control = bitfield_field32_write(
+      reg_control, KEYMGR_CONTROL_SHADOWED_OPERATION_FIELD,
+      KEYMGR_CONTROL_SHADOWED_OPERATION_VALUE_GENERATE_HW_OUTPUT);
+  mmio_region_write32_shadowed(keymgr.base_addr,
+                               KEYMGR_CONTROL_SHADOWED_REG_OFFSET, reg_control);
+
+  // Start the key manager operation.
+  mmio_region_write32(keymgr.base_addr, KEYMGR_START_REG_OFFSET,
+                      1 << KEYMGR_START_EN_BIT);
+  // Write to message FIFO while app interface operation is ongoing.
+  mmio_region_write8(kmac.base_addr, KMAC_MSG_FIFO_REG_OFFSET, 0xff);
+
+  // Check whether we got the expected error.
+  return check_and_clear_error(&kmac, kDifErrorSoftwarePushedMessageFifo, true);
+}
+
+bool test_main(void) {
+  // The first three tests don't run on CW310 (see lowRISC/opentitan#15530).
+  if (kDeviceType != kDeviceFpgaCw310) {
+    CHECK_STATUS_OK(test_err_wait_timer_expired());
+    CHECK_STATUS_OK(test_err_incorrect_entropy_mode());
+    CHECK_STATUS_OK(test_err_sw_hashing_without_entropy_ready());
+  }
+
+  CHECK_STATUS_OK(test_err_incorrect_fnc_name());
+  CHECK_STATUS_OK(test_err_key_not_valid());
+  CHECK_STATUS_OK(test_err_shadow_reg_update());
+  CHECK_STATUS_OK(test_err_sw_cmd_sequence());
+  CHECK_STATUS_OK(test_err_unexpected_mode_strength());
+
+  // Setup the key manager as the last two tests use the key manager KMAC app
+  // interface.
+  CHECK_STATUS_OK(setup_keymgr());
+  CHECK_STATUS_OK(test_err_sw_issued_cmd_in_app());
+  CHECK_STATUS_OK(test_err_sw_pushed_msg_fifo());
+
+  return true;
+}
diff --git a/sw/device/tests/kmac_kmac_key_sideload_test.c b/sw/device/tests/kmac_kmac_key_sideload_test.c
new file mode 100644
index 0000000000000..b06c2e19b54ce
--- /dev/null
+++ b/sw/device/tests/kmac_kmac_key_sideload_test.c
@@ -0,0 +1,216 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_keymgr.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/kmac_testutils.h"
+#include "sw/device/lib/testing/ret_sram_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/lib/testing/sram_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// The KMAC dif expects a secret key, even though if the configuration is set
+// to use the sideloaded key then it will be ignored. We will write a software
+// key and then ensure that the output does NOT match the expected value for
+// this key when sideloading is used.
+//
+// Test taken from sample #1 here:
+// https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/KMAC_samples.pdf
+static const dif_kmac_key_t kSoftwareKey = {
+    .share0 = {0x43424140, 0x47464544, 0x4B4A4948, 0x4F4E4D4C, 0x53525150,
+               0x57565554, 0x5B5A5958, 0x5F5E5D5C},
+    .share1 = {0},
+    .length = kDifKmacKeyLen256,
+};
+static const dif_kmac_mode_kmac_t kKmacModes[2] = {kDifKmacModeKmacLen128,
+                                                   kDifKmacModeKmacLen256};
+static const size_t kKmacOutputLen = 8;
+static const char *kCustomString = NULL;
+static const size_t kCustomStringLen = 0;
+static const char kKmacMessage[] = "\x00\x01\x02\x03";
+static const size_t kKmacMessageLen = 4;
+
+enum {
+  /**
+   * Retention SRAM start address (inclusive).
+   */
+  kRetSramBaseAddr = TOP_EARLGREY_SRAM_CTRL_RET_AON_RAM_BASE_ADDR,
+
+  kRetSramOwnerAddr = kRetSramBaseAddr + offsetof(retention_sram_t, owner),
+  kRetRamLastAddr =
+      kRetSramBaseAddr + TOP_EARLGREY_SRAM_CTRL_RET_AON_RAM_SIZE_BYTES - 1,
+};
+
+static dif_keymgr_t keymgr;
+static dif_kmac_t kmac;
+static dif_sram_ctrl_t ret_sram;
+static dif_rstmgr_t rstmgr;
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/**
+ * Initializes all DIF handles for each peripheral used in this test.
+ */
+static void init_peripheral_handles(void) {
+  CHECK_DIF_OK(
+      dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+  CHECK_DIF_OK(dif_keymgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR), &keymgr));
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  CHECK_DIF_OK(dif_sram_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR),
+      &ret_sram));
+}
+
+/**
+ * KMAC key sideload test.
+ *
+ * This function is executed twice.
+ *
+ * In phase 0, KMAC outputs for kDifKmacModeKmacLen128 and
+ * kDifKmacModeKmacLen256 with a sideloaded key are computed. The outputs are
+ * stored in the retention SRAM to preserve the results. Then, the sideload key
+ * is invalidated, a new sideload key with a different salt is generated and the
+ * test checks whether KMAC can no longer reproduce the same KMAC output.
+ *
+ * Then, test_main performs a software reset.
+ *
+ * In phase 1, KMAC outputs for kDifKmacModeKmacLen128 and
+ * kDifKmacModeKmacLen256 with a sideloaded key are computed. The outputs are
+ * compared to the previous value stored in the retention SRAM.
+ *
+ * @param keymgr the key manager handle.
+ * @param kmac the kmac handle.
+ * @param test_phase the current test phase.
+ */
+static void test_kmac_key_sideload(dif_keymgr_t *keymgr, dif_kmac_t *kmac,
+                                   size_t test_phase) {
+  // Configure KMAC to use the sideloaded key.
+  CHECK_STATUS_OK(kmac_testutils_config(kmac, true));
+
+  // Generate the sideloaded key.
+  dif_keymgr_versioned_key_params_t sideload_params = kKeyVersionedParams;
+  sideload_params.dest = kDifKeymgrVersionedKeyDestKmac;
+
+  // Get the maximum key version supported by the keymgr in its current state.
+  uint32_t max_key_version;
+  CHECK_STATUS_OK(
+      keymgr_testutils_max_key_version_get(keymgr, &max_key_version));
+
+  if (sideload_params.version > max_key_version) {
+    LOG_INFO("Key version %d is greater than the maximum key version %d",
+             sideload_params.version, max_key_version);
+    LOG_INFO("Setting key version to the maximum key version %d",
+             max_key_version);
+    sideload_params.version = max_key_version;
+  }
+
+  CHECK_STATUS_OK(
+      keymgr_testutils_generate_versioned_key(keymgr, sideload_params));
+  LOG_INFO("Keymgr generated HW output for Kmac");
+  uint32_t output_sideload[ARRAYSIZE(kKmacModes)][kKmacOutputLen];
+
+  for (size_t it = 0; it < ARRAYSIZE(kKmacModes); it++) {
+    CHECK_STATUS_OK(kmac_testutils_kmac(
+        kmac, kKmacModes[it], &kSoftwareKey, kCustomString, kCustomStringLen,
+        kKmacMessage, kKmacMessageLen, kKmacOutputLen, output_sideload[it],
+        /*capacity=*/NULL));
+  }
+  LOG_INFO("Computed KMAC output for sideloaded key.");
+
+  if (!test_phase) {
+    // In test phase 0, store the KMAC digest into the retention SRAM.
+    for (size_t it = 0; it < ARRAYSIZE(kKmacModes); it++) {
+      // Use kRetSramOwnerAddr + 4 to avoid overwriting test_phase_cnt.
+      sram_ctrl_testutils_write(
+          kRetSramOwnerAddr + 4 + 4 * it * kKmacOutputLen,
+          (sram_ctrl_testutils_data_t){.words = output_sideload[it],
+                                       .len = kKmacOutputLen});
+    }
+
+    LOG_INFO("Clearing the sideloaded key.");
+
+    // Enable "clear the key" toggle, so that previous sideload key port is
+    // cleared.
+    CHECK_DIF_OK(
+        dif_keymgr_sideload_clear_set_enabled(keymgr, kDifToggleEnabled));
+
+    // Disable "clear the key" toggle, so that the sideload key port is stable.
+    // Otherwise, the sideload port is continuously overwritten by fresh
+    // randomness every clock cycle.
+    CHECK_DIF_OK(
+        dif_keymgr_sideload_clear_set_enabled(keymgr, kDifToggleDisabled));
+
+    // Let the keymanager generate a new key with a different salt.
+    sideload_params.salt[0] = ~sideload_params.salt[0];
+    CHECK_STATUS_OK(
+        keymgr_testutils_generate_versioned_key(keymgr, sideload_params));
+    LOG_INFO("Keymgr generated new HW output for Kmac.");
+
+    uint32_t output_sideload_after_clear[kKmacOutputLen];
+    CHECK_STATUS_OK(
+        kmac_testutils_kmac(kmac, kKmacModes[0], &kSoftwareKey, kCustomString,
+                            kCustomStringLen, kKmacMessage, kKmacMessageLen,
+                            kKmacOutputLen, output_sideload_after_clear,
+                            /*capacity=*/NULL));
+    LOG_INFO(
+        "Ran KMAC with an another sideload key and checked that the output is "
+        "not identical to before.");
+
+    CHECK_ARRAYS_NE(output_sideload_after_clear, output_sideload[0],
+                    kKmacOutputLen);
+
+  } else {
+    // In test phase 1, read the previous KMAC digests from the retention SRAM
+    // and compare them with the calculated ones.
+    for (size_t it = 0; it < ARRAYSIZE(kKmacModes); it++) {
+      uint32_t prev_digest[kKmacOutputLen];
+      memcpy(prev_digest,
+             (uint8_t *)(kRetSramOwnerAddr + 4 + 4 * it * kKmacOutputLen),
+             sizeof(prev_digest));
+      CHECK_ARRAYS_EQ(output_sideload[it], prev_digest, kKmacOutputLen);
+    }
+    LOG_INFO("Checked current and previous KMAC digest.");
+  }
+}
+
+bool test_main(void) {
+  // Use the retention SRAM to store a test phase counter.
+  const dif_rstmgr_reset_info_bitfield_t reset_info =
+      rstmgr_testutils_reason_get();
+  size_t test_phase_cnt;
+
+  if (reset_info == kDifRstmgrResetInfoPor) {
+    // Init counter to 0 after first power up.
+    CHECK_STATUS_OK(ret_sram_testutils_counter_clear(0));
+  }
+  CHECK_STATUS_OK(ret_sram_testutils_counter_get(0, &test_phase_cnt));
+
+  // Initialize peripherals and the keymanager.
+  init_peripheral_handles();
+  CHECK_STATUS_OK(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  LOG_INFO("Starting test phase %d", test_phase_cnt);
+  test_kmac_key_sideload(&keymgr, &kmac, test_phase_cnt);
+  LOG_INFO("Finished test phase %x", test_phase_cnt);
+
+  // After phase 0, trigger a software reset.
+  if (test_phase_cnt == 0) {
+    CHECK_STATUS_OK(ret_sram_testutils_counter_increment(0));
+    CHECK_DIF_OK(dif_rstmgr_software_device_reset(&rstmgr));
+    wait_for_interrupt();
+  }
+
+  return true;
+}
diff --git a/sw/device/tests/otbn_ecdsa_op_irq_test.c b/sw/device/tests/otbn_ecdsa_op_irq_test.c
index 42d80b30e275a..a1a6877795da8 100644
--- a/sw/device/tests/otbn_ecdsa_op_irq_test.c
+++ b/sw/device/tests/otbn_ecdsa_op_irq_test.c
@@ -35,37 +35,35 @@
  * </code>
  */
 
-OTBN_DECLARE_APP_SYMBOLS(p256_ecdsa);
-
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, mode);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, msg);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, r);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, s);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, x);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, y);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, d0);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, d1);
-OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa, x_r);
-
-static const otbn_app_t kOtbnAppP256Ecdsa = OTBN_APP_T_INIT(p256_ecdsa);
-
-static const otbn_addr_t kOtbnVarMode = OTBN_ADDR_T_INIT(p256_ecdsa, mode);
-static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(p256_ecdsa, msg);
-static const otbn_addr_t kOtbnVarR = OTBN_ADDR_T_INIT(p256_ecdsa, r);
-static const otbn_addr_t kOtbnVarS = OTBN_ADDR_T_INIT(p256_ecdsa, s);
-static const otbn_addr_t kOtbnVarX = OTBN_ADDR_T_INIT(p256_ecdsa, x);
-static const otbn_addr_t kOtbnVarY = OTBN_ADDR_T_INIT(p256_ecdsa, y);
-static const otbn_addr_t kOtbnVarD0 = OTBN_ADDR_T_INIT(p256_ecdsa, d0);
-static const otbn_addr_t kOtbnVarD1 = OTBN_ADDR_T_INIT(p256_ecdsa, d1);
-static const otbn_addr_t kOtbnVarXR = OTBN_ADDR_T_INIT(p256_ecdsa, x_r);
-
-/**
- * Hardened values for different modes (see p256_ecdsa.s).
- */
-enum {
-  kModeSign = 0x15b,
-  kModeVerify = 0x727,
-};
+OTBN_DECLARE_APP_SYMBOLS(run_p256);
+
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, mode);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, msg);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, r);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, s);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, x);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, y);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, d0_io);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, d1_io);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, x_r);
+
+static const otbn_app_t kOtbnAppP256Ecdsa = OTBN_APP_T_INIT(run_p256);
+
+static const otbn_addr_t kOtbnVarMode = OTBN_ADDR_T_INIT(run_p256, mode);
+static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(run_p256, msg);
+static const otbn_addr_t kOtbnVarR = OTBN_ADDR_T_INIT(run_p256, r);
+static const otbn_addr_t kOtbnVarS = OTBN_ADDR_T_INIT(run_p256, s);
+static const otbn_addr_t kOtbnVarX = OTBN_ADDR_T_INIT(run_p256, x);
+static const otbn_addr_t kOtbnVarY = OTBN_ADDR_T_INIT(run_p256, y);
+static const otbn_addr_t kOtbnVarD0 = OTBN_ADDR_T_INIT(run_p256, d0_io);
+static const otbn_addr_t kOtbnVarD1 = OTBN_ADDR_T_INIT(run_p256, d1_io);
+static const otbn_addr_t kOtbnVarXR = OTBN_ADDR_T_INIT(run_p256, x_r);
+
+// Declare mode constants.
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_SIGN);
+OTBN_DECLARE_SYMBOL_ADDR(run_p256, MODE_VERIFY);
+static const uint32_t kModeSign = OTBN_ADDR_T_INIT(run_p256, MODE_SIGN);
+static const uint32_t kModeVerify = OTBN_ADDR_T_INIT(run_p256, MODE_VERIFY);
 
 OTTF_DEFINE_TEST_CONFIG();
 
diff --git a/sw/device/tests/otbn_irq_test.c b/sw/device/tests/otbn_irq_test.c
index 1351332d1fc0a..b8a90ca352542 100644
--- a/sw/device/tests/otbn_irq_test.c
+++ b/sw/device/tests/otbn_irq_test.c
@@ -10,6 +10,7 @@
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/otbn_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -21,6 +22,8 @@ static const otbn_app_t kAppErrTest = OTBN_APP_T_INIT(err_test);
 OTTF_DEFINE_TEST_CONFIG();
 
 static dif_rv_plic_t plic;
+static dif_otbn_t otbn;
+
 static volatile bool otbn_finished;
 
 /**
@@ -71,6 +74,12 @@ static void run_test_with_irqs(dif_otbn_t *otbn, otbn_app_t app,
   // we see the Done interrupt fire.
   otbn_finished = false;
 
+  // Expect the recoverable error alert only if errors are expected.
+  if (expected_err_bits != kDifOtbnErrBitsNoError) {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdOtbnRecov));
+  }
+
   CHECK_STATUS_OK(otbn_testutils_load_app(otbn, app));
 
   // If the CTRL.SOFTWARE_ERRS_FATAL flag is set, a software error will be
@@ -89,6 +98,11 @@ static void run_test_with_irqs(dif_otbn_t *otbn, otbn_app_t app,
   // it's done.
   ATOMIC_WAIT_FOR_INTERRUPT(otbn_finished);
 
+  if (expected_err_bits != kDifOtbnErrBitsNoError) {
+    CHECK_STATUS_OK(
+        ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdOtbnRecov));
+  }
+
   check_otbn_status(otbn, expected_status);
   check_otbn_err_bits(otbn, expected_insn_cnt);
   check_otbn_insn_cnt(otbn, expected_err_bits);
@@ -116,26 +130,18 @@ static void plic_init_with_irqs(void) {
       &plic, kTopEarlgreyPlicTargetIbex0, 0x0));
 }
 
-/**
- * The ISR for this test.
- *
- * This function overrides the default OTTF external ISR.
- */
-void ottf_external_isr(uint32_t *exc_info) {
-  // Find which interrupt fired at PLIC by claiming it.
-  dif_rv_plic_irq_id_t irq_id;
-  CHECK_DIF_OK(
-      dif_rv_plic_irq_claim(&plic, kTopEarlgreyPlicTargetIbex0, &irq_id));
-
+bool ottf_handle_irq(uint32_t *exc_info,
+                     top_earlgrey_plic_peripheral_t peripheral,
+                     dif_rv_plic_irq_id_t irq_id) {
   // Check it was from OTBN
-  top_earlgrey_plic_peripheral_t peri =
-      top_earlgrey_plic_interrupt_for_peripheral[irq_id];
-  CHECK(peri == kTopEarlgreyPlicPeripheralOtbn,
-        "Interrupt from incorrect peripheral: (exp: %d, obs: %s)",
-        kTopEarlgreyPlicPeripheralOtbn, peri);
+  if (peripheral != kTopEarlgreyPlicPeripheralOtbn) {
+    return false;
+  }
 
   // Check this is the interrupt we expected
-  CHECK(irq_id == kTopEarlgreyPlicIrqIdOtbnDone);
+  if (irq_id != kTopEarlgreyPlicIrqIdOtbnDone) {
+    return false;
+  }
 
   // otbn_finished should currently be false (we're supposed to clear it before
   // starting OTBN)
@@ -143,9 +149,16 @@ void ottf_external_isr(uint32_t *exc_info) {
 
   // Set otbn_finished, which we'll pick up in run_test_with_irqs.
   otbn_finished = true;
+
+  CHECK_DIF_OK(dif_otbn_irq_acknowledge(&otbn, kDifOtbnIrqDone));
+
+  return true;
 }
 
 bool test_main(void) {
+  CHECK_DIF_OK(
+      dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+
   CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
   plic_init_with_irqs();
 
@@ -153,11 +166,6 @@ bool test_main(void) {
   irq_global_ctrl(true);
   irq_external_ctrl(true);
 
-  mmio_region_t base_addr = mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR);
-
-  dif_otbn_t otbn;
-  CHECK_DIF_OK(dif_otbn_init(base_addr, &otbn));
-
   run_test_with_irqs(&otbn, kAppErrTest, kDifOtbnStatusIdle,
                      kDifOtbnErrBitsBadDataAddr, 1);
 
diff --git a/sw/device/tests/otbn_mem_scramble_test.c b/sw/device/tests/otbn_mem_scramble_test.c
index 982d0b3158dbd..a0aa39b1e20a7 100644
--- a/sw/device/tests/otbn_mem_scramble_test.c
+++ b/sw/device/tests/otbn_mem_scramble_test.c
@@ -8,6 +8,7 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/otbn_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -82,6 +83,7 @@ static volatile bool has_irq_fired;
  * This overrides the default OTTF load integrity handler.
  */
 void ottf_load_integrity_error_handler(uint32_t *exc_info) {
+  OT_DISCARD(exc_info);
   has_irq_fired = true;
 }
 
@@ -235,6 +237,11 @@ bool test_main(void) {
   CHECK_DIF_OK(dif_otbn_write_cmd(&otbn, kDifOtbnCmdSecWipeDmem));
   CHECK_STATUS_OK(otbn_testutils_wait_for_done(&otbn, kDifOtbnErrBitsNoError));
 
+  // The following integrity errors in OTBN's memory causes a fatal alert in
+  // Ibex which cannot be acknowledge/dismissed, so we must ignore it instead.
+  CHECK_STATUS_OK(
+      ottf_alerts_ignore_alert(kTopEarlgreyAlertIdRvCoreIbexFatalHwErr));
+
   // Read back and check random address offsets. We don't care about the values.
   // "Most" reads should trigger integrity errors.
   otbn_check_mem_words(&otbn, kNumAddrs, imem_offsets, dif_otbn_imem_read,
diff --git a/sw/device/tests/otbn_rsa_test.c b/sw/device/tests/otbn_rsa_test.c
index b2168286d6349..1fdc9ee9df50a 100644
--- a/sw/device/tests/otbn_rsa_test.c
+++ b/sw/device/tests/otbn_rsa_test.c
@@ -105,15 +105,16 @@ static void check_data(const uint8_t *actual, const uint8_t *expected,
  *
  * @param size_bytes Size of all data arguments/buffers, in bytes.
  * @param modulus The modulus (n).
- * @param private_exponent The private exponent (d).
+ * @param d_share0 First share of the private exponent (d).
+ * @param d_share1 Second share of the private exponent (d).
  * @param in The input data of size `size_bytes`.
  * @param encrypted_expected The encrypted version of `in`.
  * @param out_encrypted Buffer to hold the encrypted data, as produced by OTBN.
  * @param out_decrypted Buffer to hold the decrypted data, as produced by OTBN.
  */
 static void rsa_roundtrip(uint32_t size_bytes, const uint8_t *modulus,
-                          const uint8_t *private_exponent, const uint8_t *in,
-                          const uint8_t *encrypted_expected,
+                          const uint8_t *d_share0, const uint8_t *d_share1,
+                          const uint8_t *in, const uint8_t *encrypted_expected,
                           uint8_t *out_encrypted, uint8_t *out_decrypted) {
   dif_otbn_t otbn;
 
@@ -139,7 +140,7 @@ static void rsa_roundtrip(uint32_t size_bytes, const uint8_t *modulus,
     LOG_INFO("Decrypting");
     t_start = profile_start();
     CHECK_STATUS_OK(otbn_testutils_rsa_modexp_consttime_start(
-        &otbn, modulus, private_exponent, encrypted_expected, size_bytes));
+        &otbn, modulus, d_share0, d_share1, encrypted_expected, size_bytes));
     CHECK_STATUS_OK(otbn_testutils_rsa_modexp_consttime_finalize(
         &otbn, out_decrypted, size_bytes));
     check_data(out_decrypted, in, size_bytes);
@@ -156,7 +157,7 @@ static void test_rsa512_roundtrip(void) {
       0x1a, 0x3f, 0x77, 0xdc, 0xc6, 0x27, 0x6d, 0x83, 0x5c, 0xcd, 0x1d,
       0xdf, 0xe5, 0xf3, 0x98, 0xe6, 0x8b, 0xe6, 0x5b, 0xd4};
 
-  static const uint8_t kPrivateExponent[kRsa512SizeBytes] = {
+  static const uint8_t kDShare0[kRsa512SizeBytes] = {
       0xc1, 0xf3, 0x5d, 0x18, 0x12, 0x7e, 0xe7, 0x0c, 0xbf, 0x33, 0xd0,
       0x1c, 0xd8, 0x5d, 0x91, 0x26, 0xb6, 0xc5, 0xae, 0x78, 0xda, 0x4c,
       0xae, 0x43, 0xa1, 0x57, 0xab, 0x32, 0xcf, 0xa4, 0xd4, 0x72, 0x20,
@@ -164,6 +165,8 @@ static void test_rsa512_roundtrip(void) {
       0x18, 0x06, 0xc8, 0x26, 0x64, 0x28, 0xcf, 0x2c, 0x3b, 0x6e, 0x6b,
       0x5c, 0x28, 0xde, 0x76, 0x6c, 0x2f, 0xcc, 0xf3, 0x31};
 
+  static const uint8_t kDShare1[kRsa512SizeBytes] = {0};
+
   static const uint8_t kEncryptedExpected[kRsa512SizeBytes] = {
       0xb7, 0x02, 0x28, 0xcb, 0x63, 0x5e, 0xa6, 0xfd, 0x55, 0x4a, 0x85,
       0x43, 0x1d, 0x26, 0x13, 0xb3, 0x78, 0x66, 0xd9, 0xe2, 0xe1, 0xbf,
@@ -178,7 +181,7 @@ static void test_rsa512_roundtrip(void) {
   uint8_t out_decrypted[kRsa512SizeBytes] = {0};
 
   LOG_INFO("Running RSA512 test");
-  rsa_roundtrip(kRsa512SizeBytes, kModulus, kPrivateExponent, kIn,
+  rsa_roundtrip(kRsa512SizeBytes, kModulus, kDShare0, kDShare1, kIn,
                 kEncryptedExpected, out_encrypted, out_decrypted);
 }
 
@@ -196,7 +199,7 @@ static void test_rsa1024_roundtrip(void) {
       0x8c, 0xd,  0x7c, 0x76, 0xc5, 0x85, 0xa7, 0xa,  0xa1, 0x91, 0xe0, 0xad,
       0xae, 0xfa, 0xb,  0xc5, 0xc4, 0x88, 0x7e, 0xbe};
 
-  static const uint8_t kPrivateExponent[kRsa1024SizeBytes] = {
+  static const uint8_t kDShare0[kRsa1024SizeBytes] = {
       0x1,  0x66, 0x7f, 0x2,  0xdb, 0x27, 0x92, 0x7d, 0xd6, 0x41, 0x4e, 0xbf,
       0x47, 0x31, 0x95, 0x8e, 0xfb, 0x5d, 0xee, 0xa1, 0xdf, 0x6d, 0x31, 0xd2,
       0xeb, 0xee, 0xe2, 0xf4, 0xa4, 0x21, 0xa9, 0xb9, 0xd2, 0xcf, 0x94, 0xfe,
@@ -209,6 +212,8 @@ static void test_rsa1024_roundtrip(void) {
       0xd,  0xfa, 0xba, 0x6b, 0xfd, 0xa3, 0x6a, 0x84, 0xa4, 0x8b, 0x95, 0xd6,
       0xac, 0x5d, 0x4e, 0x2e, 0x7b, 0x14, 0x1f, 0x3d};
 
+  static const uint8_t kDShare1[kRsa1024SizeBytes] = {0};
+
   static const uint8_t kEncryptedExpected[kRsa1024SizeBytes] = {
       0x76, 0x71, 0x99, 0x16, 0x38, 0x3a, 0xe0, 0xca, 0x9e, 0xc4, 0x5e, 0x9b,
       0x68, 0xb6, 0x3f, 0x78, 0x0d, 0x6e, 0x43, 0x7c, 0xaf, 0x24, 0xcc, 0x3e,
@@ -228,7 +233,7 @@ static void test_rsa1024_roundtrip(void) {
   uint8_t out_decrypted[kRsa1024SizeBytes] = {0};
 
   LOG_INFO("Running RSA1024 test");
-  rsa_roundtrip(kRsa1024SizeBytes, kModulus, kPrivateExponent, kIn,
+  rsa_roundtrip(kRsa1024SizeBytes, kModulus, kDShare0, kDShare1, kIn,
                 kEncryptedExpected, out_encrypted, out_decrypted);
 }
 
@@ -257,7 +262,7 @@ static void test_rsa2048_roundtrip(void) {
       0x21, 0xc0, 0xc9, 0x61, 0xc3, 0xc6, 0x1f, 0xaf, 0xf4, 0x47, 0x1a, 0xa5,
       0x2d, 0xa9, 0xc5, 0xbd};
 
-  static const uint8_t kPrivateExponent[kRsa2048SizeBytes] = {
+  static const uint8_t kDShare0[kRsa2048SizeBytes] = {
       0xfd, 0x82, 0x16, 0x63, 0x74, 0xc0, 0x2a, 0xde, 0x83, 0x69, 0x77, 0x3d,
       0x1a, 0x5c, 0x07, 0xbb, 0x97, 0x34, 0xd4, 0xcb, 0x28, 0xc3, 0x28, 0xc0,
       0x6a, 0x28, 0xaf, 0x05, 0xfd, 0x24, 0x84, 0x76, 0xd6, 0xc5, 0xfa, 0x3f,
@@ -281,6 +286,8 @@ static void test_rsa2048_roundtrip(void) {
       0x2c, 0x63, 0x73, 0xcb, 0x6b, 0x89, 0x2e, 0xe1, 0xf7, 0xc4, 0x74, 0x61,
       0x67, 0x9a, 0x63, 0x9e};
 
+  static const uint8_t kDShare1[kRsa2048SizeBytes] = {0};
+
   static const uint8_t kEncryptedExpected[kRsa2048SizeBytes] = {
       0x54, 0x83, 0x7c, 0xb0, 0xd9, 0x77, 0x76, 0xb5, 0xf5, 0xc8, 0x51, 0x02,
       0x41, 0xab, 0xeb, 0xa6, 0x8e, 0x01, 0x15, 0x54, 0x30, 0x9b, 0x05, 0xb6,
@@ -310,7 +317,7 @@ static void test_rsa2048_roundtrip(void) {
   uint8_t out_decrypted[kRsa2048SizeBytes] = {0};
 
   LOG_INFO("Running RSA2048 test");
-  rsa_roundtrip(kRsa2048SizeBytes, kModulus, kPrivateExponent, kIn,
+  rsa_roundtrip(kRsa2048SizeBytes, kModulus, kDShare0, kDShare1, kIn,
                 kEncryptedExpected, out_encrypted, out_decrypted);
 }
 
@@ -349,7 +356,7 @@ static void test_rsa3072_roundtrip(void) {
       0x89, 0x89, 0x92, 0xc3, 0x67, 0x97, 0x97, 0x0c, 0x26, 0xcd, 0xec, 0x6b,
       0xbd, 0x2e, 0xc3, 0xa4, 0xa5, 0x86, 0xf1, 0xd5, 0x56, 0x9b, 0xb2, 0xac};
 
-  static const uint8_t kPrivateExponent[kRsa3072SizeBytes] = {
+  static const uint8_t kDShare0[kRsa3072SizeBytes] = {
       0x01, 0xd7, 0x1b, 0x43, 0xb7, 0x32, 0x49, 0x3b, 0xc0, 0x5c, 0x93, 0x33,
       0xfa, 0x2d, 0xd6, 0x33, 0x70, 0x6f, 0xeb, 0x5b, 0x53, 0xdb, 0x2c, 0x0f,
       0x72, 0x26, 0x6a, 0x7c, 0x10, 0x0a, 0x02, 0x1f, 0xed, 0xf0, 0x5f, 0x8d,
@@ -383,6 +390,8 @@ static void test_rsa3072_roundtrip(void) {
       0x8c, 0xc5, 0x2b, 0x2b, 0x7e, 0x65, 0x22, 0x19, 0xf5, 0x71, 0x58, 0xa3,
       0xd2, 0x25, 0xa9, 0xb6, 0xc8, 0x8d, 0x85, 0x8c, 0x00, 0x45, 0xf9, 0x32};
 
+  static const uint8_t kDShare1[kRsa3072SizeBytes] = {0};
+
   static const uint8_t kEncryptedExpected[kRsa3072SizeBytes] = {
       0x45, 0x91, 0x09, 0xad, 0x6a, 0xbd, 0xc1, 0x7f, 0x68, 0xea, 0x1e, 0xad,
       0xb7, 0x59, 0xfa, 0x98, 0xa6, 0x13, 0x03, 0x35, 0x45, 0x45, 0x64, 0xca,
@@ -423,7 +432,7 @@ static void test_rsa3072_roundtrip(void) {
   uint8_t out_decrypted[kRsa3072SizeBytes] = {0};
 
   LOG_INFO("Running RSA3072 test");
-  rsa_roundtrip(kRsa3072SizeBytes, kModulus, kPrivateExponent, kIn,
+  rsa_roundtrip(kRsa3072SizeBytes, kModulus, kDShare0, kDShare1, kIn,
                 kEncryptedExpected, out_encrypted, out_decrypted);
 }
 
@@ -473,7 +482,7 @@ static void test_rsa4096_roundtrip(void) {
       0x28, 0xfb, 0xef, 0x16, 0xa5, 0xf9, 0x9d, 0xe0, 0x54, 0x13, 0xf8, 0x28,
       0x98, 0xb7, 0x1a, 0x4a, 0x7f, 0xa2, 0x74, 0xf0};
 
-  static const uint8_t kPrivateExponent[kRsa4096SizeBytes] = {
+  static const uint8_t kDShare0[kRsa4096SizeBytes] = {
       0xc1, 0x91, 0x67, 0x67, 0xb2, 0xe7, 0xd2, 0xba, 0x16, 0xf1, 0x70, 0xec,
       0xbf, 0x6e, 0x73, 0x6f, 0x3b, 0x4f, 0x09, 0xed, 0x09, 0x91, 0xc1, 0xc3,
       0x73, 0x8c, 0x19, 0x33, 0x93, 0xcd, 0xd2, 0xb2, 0x9d, 0x53, 0x49, 0xa4,
@@ -518,6 +527,8 @@ static void test_rsa4096_roundtrip(void) {
       0xec, 0x28, 0x79, 0x17, 0xa6, 0x9f, 0xca, 0x15, 0xe1, 0xd6, 0x67, 0x35,
       0x6f, 0x9b, 0x99, 0x46, 0x7f, 0x20, 0x4a, 0x43};
 
+  static const uint8_t kDShare1[kRsa4096SizeBytes] = {0};
+
   static const uint8_t kEncryptedExpected[kRsa4096SizeBytes] = {
       0x59, 0x13, 0x5c, 0x73, 0xb2, 0xee, 0xe6, 0x48, 0x24, 0x95, 0x80, 0xe3,
       0x5b, 0x54, 0x08, 0x7d, 0x81, 0x98, 0x4a, 0x64, 0xb0, 0xf4, 0x06, 0x29,
@@ -568,7 +579,7 @@ static void test_rsa4096_roundtrip(void) {
   uint8_t out_decrypted[kRsa4096SizeBytes] = {0};
 
   LOG_INFO("Running RSA4096 test");
-  rsa_roundtrip(kRsa4096SizeBytes, kModulus, kPrivateExponent, kIn,
+  rsa_roundtrip(kRsa4096SizeBytes, kModulus, kDShare0, kDShare1, kIn,
                 kEncryptedExpected, out_encrypted, out_decrypted);
 }
 
diff --git a/sw/device/tests/otbn_smoketest.c b/sw/device/tests/otbn_smoketest.c
index 2f75f0ae53311..30af2af7accc5 100644
--- a/sw/device/tests/otbn_smoketest.c
+++ b/sw/device/tests/otbn_smoketest.c
@@ -8,6 +8,7 @@
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/otbn_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -30,6 +31,8 @@ OTBN_DECLARE_APP_SYMBOLS(err_test);
 
 static const otbn_app_t kAppErrTest = OTBN_APP_T_INIT(err_test);
 
+static dif_otbn_t otbn;
+
 OTTF_DEFINE_TEST_CONFIG();
 
 /**
@@ -126,10 +129,13 @@ static void test_err_test(dif_otbn_t *otbn) {
   // TODO: Turn on software_errs_fatal for err_test. Currently the model doesn't
   // support this feature so turning it on leads to a failure when run with the
   // model.
+  CHECK_STATUS_OK(ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdOtbnRecov));
   CHECK_DIF_OK(dif_otbn_set_ctrl_software_errs_fatal(otbn, false));
   CHECK_STATUS_OK(otbn_testutils_execute(otbn));
   CHECK_STATUS_OK(
       otbn_testutils_wait_for_done(otbn, kDifOtbnErrBitsBadDataAddr));
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdOtbnRecov));
 
   check_otbn_insn_cnt(otbn, 1);
 }
@@ -151,7 +157,6 @@ static void test_sec_wipe(dif_otbn_t *otbn) {
 bool test_main(void) {
   CHECK_STATUS_OK(entropy_testutils_auto_mode_init());
 
-  dif_otbn_t otbn;
   CHECK_DIF_OK(
       dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
 
diff --git a/sw/device/tests/otp_ctrl_descrambling_test.c b/sw/device/tests/otp_ctrl_descrambling_test.c
new file mode 100644
index 0000000000000..40789d472b731
--- /dev/null
+++ b/sw/device/tests/otp_ctrl_descrambling_test.c
@@ -0,0 +1,127 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdbool.h>
+
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otp_ctrl_regs.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+typedef struct partition_data {
+  dif_otp_ctrl_partition_t partition;
+  size_t size;
+} partition_data_t;
+
+static const partition_data_t kPartitions[] = {
+    {
+        .partition = kDifOtpCtrlPartitionSecret0,
+        .size =
+            (OTP_CTRL_PARAM_SECRET0_SIZE - OTP_CTRL_PARAM_SECRET0_DIGEST_SIZE) /
+            sizeof(uint64_t),
+    },
+    {
+        .partition = kDifOtpCtrlPartitionSecret1,
+        .size =
+            (OTP_CTRL_PARAM_SECRET1_SIZE - OTP_CTRL_PARAM_SECRET1_DIGEST_SIZE) /
+            sizeof(uint64_t),
+    },
+    {
+        .partition = kDifOtpCtrlPartitionSecret2,
+        .size =
+            (OTP_CTRL_PARAM_SECRET2_SIZE - OTP_CTRL_PARAM_SECRET2_DIGEST_SIZE) /
+            sizeof(uint64_t),
+    },
+};
+
+static inline uint32_t lower(uint64_t dword) { return (uint32_t)dword; }
+
+static inline uint32_t upper(uint64_t dword) { return (uint32_t)(dword >> 32); }
+
+size_t compare_dword(const uint64_t *actual_arr, uint32_t part_idx,
+                     uint32_t dword_idx, uint64_t expected) {
+  const uint64_t actual = actual_arr[dword_idx];
+  if (actual == expected) {
+    return 0;
+  } else {
+    LOG_WARNING("SECRET%d, dword %d: 0x%08x%08x != 0x%08x%08x", part_idx,
+                dword_idx, upper(actual), lower(actual), upper(expected),
+                lower(expected));
+    return 1;
+  }
+}
+
+bool test_main(void) {
+  dif_otp_ctrl_t otp_ctrl;
+
+  CHECK_DIF_OK(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
+
+  // Number of 64-bit words that differ from the expected value; used to
+  // determine overall test pass or failure.
+  size_t dwords_diff = 0;
+
+  // Iterate over the partitions that are scrambled and read them out via the
+  // DAI.  This SW-based access is only possible because the partitions have not
+  // been locked in/before this test.
+  for (uint32_t i = 0; i < ARRAYSIZE(kPartitions); ++i) {
+    const partition_data_t *partition = &kPartitions[i];
+    uint64_t readout[partition->size];
+
+    LOG_INFO("Checking partition SECRET%d.", i);
+    CHECK_STATUS_OK(otp_ctrl_testutils_dai_read64_array(
+        &otp_ctrl, partition->partition, 0, readout, ARRAYSIZE(readout)));
+
+    // Compare values read from OTP to expected values stored in the OTP image.
+    switch (i) {
+      case 0:
+        dwords_diff += compare_dword(readout, 0, 0, 0x749f1cb4a7daf4f5);
+        dwords_diff += compare_dword(readout, 0, 1, 0x117dbd7aca3f7de6);
+        dwords_diff += compare_dword(readout, 0, 2, 0xd6313735da1740e4);
+        dwords_diff += compare_dword(readout, 0, 3, 0x1dc4b32c25ef2c31);
+        CHECK(partition->size == 4, "Unexpected size of SECRET0 partition!");
+        break;
+
+      case 1:
+        dwords_diff += compare_dword(readout, 1, 0, 0x8ed040844dde2dca);
+        dwords_diff += compare_dword(readout, 1, 1, 0x8251c8921ed1a7fc);
+        dwords_diff += compare_dword(readout, 1, 2, 0x038c1b4e7bd7394c);
+        dwords_diff += compare_dword(readout, 1, 3, 0x434677540fdc9956);
+        dwords_diff += compare_dword(readout, 1, 4, 0x5cc32c34646c9a9f);
+        dwords_diff += compare_dword(readout, 1, 5, 0x871b3d2726a67336);
+        dwords_diff += compare_dword(readout, 1, 6, 0xdcc70e44beeff5f4);
+        dwords_diff += compare_dword(readout, 1, 7, 0x7cdb1a9d39c20016);
+        dwords_diff += compare_dword(readout, 1, 8, 0x0e83fabc03c68203);
+        dwords_diff += compare_dword(readout, 1, 9, 0x57f20b5b2e200c01);
+        CHECK(partition->size == 10, "Unexpected size of SECRET1 partition!");
+        break;
+
+      case 2:
+        dwords_diff += compare_dword(readout, 2, 0, 0xbed4fd235f6b24d4);
+        dwords_diff += compare_dword(readout, 2, 1, 0x6ef5b95acb3ded39);
+        dwords_diff += compare_dword(readout, 2, 2, 0xa9398fab0bba1e23);
+        dwords_diff += compare_dword(readout, 2, 3, 0x196906bfe0051fa8);
+        dwords_diff += compare_dword(readout, 2, 4, 0xea9f54f370a2fdf8);
+        dwords_diff += compare_dword(readout, 2, 5, 0xf915734729d70391);
+        dwords_diff += compare_dword(readout, 2, 6, 0xd3bd2ecfc0fc7581);
+        dwords_diff += compare_dword(readout, 2, 7, 0xbaa7bc074a97c885);
+        dwords_diff += compare_dword(readout, 2, 8, 0xdda3ceb51b6cbc3b);
+        dwords_diff += compare_dword(readout, 2, 9, 0xe889c1ccf0f57d6d);
+        CHECK(partition->size == 10, "Unexpected size of SECRET2 partition!");
+        break;
+
+      default:
+        OT_UNREACHABLE();
+        break;
+    }
+  }
+
+  // Test succeeds if no value read from OTP differed from the expected value.
+  return dwords_diff == 0;
+}
diff --git a/sw/device/tests/otp_ctrl_rot_auth_config_test.c b/sw/device/tests/otp_ctrl_rot_auth_config_test.c
new file mode 100644
index 0000000000000..537f9e8b0efd2
--- /dev/null
+++ b/sw/device/tests/otp_ctrl_rot_auth_config_test.c
@@ -0,0 +1,35 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/silicon_creator/manuf/lib/individualize.h"
+#include "sw/device/silicon_creator/manuf/lib/individualize_sw_cfg.h"
+#include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  static dif_otp_ctrl_t otp_ctrl;
+  CHECK_DIF_OK(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp_ctrl));
+  CHECK_STATUS_OK(
+      manuf_individualize_device_rot_creator_auth_codesign(&otp_ctrl));
+  CHECK_STATUS_OK(manuf_individualize_device_rot_creator_auth_state(&otp_ctrl));
+  if (kDeviceType == kDeviceSimDV) {
+    test_status_set(kTestStatusPassed);
+  }
+  return true;
+}
diff --git a/sw/device/tests/ottf_alert_catch_test.c b/sw/device/tests/ottf_alert_catch_test.c
new file mode 100644
index 0000000000000..58d9cd288943a
--- /dev/null
+++ b/sw/device/tests/ottf_alert_catch_test.c
@@ -0,0 +1,58 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// This test exercises OTTF's alert catching mechanism.
+//
+// We force two alerts: `Uart1FatalFault` and `Uart2FatalFault`. We expect the
+// first to be handled by our custom handler and the second to be handled by
+// OTTF leading to an error message and abort.
+//
+// The test is considered passing if we abort with `Alert 2 is asserted` and
+// failing if the test ends naturally.
+
+OTTF_DEFINE_TEST_CONFIG();
+
+enum {
+  kAlertTimeoutMicros = 1000,
+};
+
+bool test_main(void) {
+  dif_uart_t uart1, uart2, uart3;
+  CHECK_DIF_OK(dif_uart_init(
+      mmio_region_from_addr(TOP_EARLGREY_UART1_BASE_ADDR), &uart1));
+  CHECK_DIF_OK(dif_uart_init(
+      mmio_region_from_addr(TOP_EARLGREY_UART2_BASE_ADDR), &uart2));
+  CHECK_DIF_OK(dif_uart_init(
+      mmio_region_from_addr(TOP_EARLGREY_UART3_BASE_ADDR), &uart3));
+
+  LOG_INFO("Forcing alert on UART1 (expected)");
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_start(kTopEarlgreyAlertIdUart1FatalFault));
+  CHECK_DIF_OK(dif_uart_alert_force(&uart1, kDifUartAlertFatalFault));
+  busy_spin_micros(kAlertTimeoutMicros);
+  CHECK_STATUS_OK(
+      ottf_alerts_expect_alert_finish(kTopEarlgreyAlertIdUart1FatalFault));
+
+  LOG_INFO("Forcing alert on UART2 (ignored)");
+  CHECK_STATUS_OK(ottf_alerts_ignore_alert(kTopEarlgreyAlertIdUart2FatalFault));
+  CHECK_DIF_OK(dif_uart_alert_force(&uart2, kDifUartAlertFatalFault));
+  busy_spin_micros(kAlertTimeoutMicros);
+
+  LOG_INFO("Forcing alert on UART3 (unexpected)");
+  CHECK_DIF_OK(dif_uart_alert_force(&uart3, kDifUartAlertFatalFault));
+
+  LOG_INFO("Waiting for alert to be caught");
+  busy_spin_micros(kAlertTimeoutMicros);
+
+  LOG_INFO("Alert was not caught, we should not have gotten here");
+  return false;
+}
diff --git a/sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c b/sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c
new file mode 100644
index 0000000000000..3d52704b4a881
--- /dev/null
+++ b/sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c
@@ -0,0 +1,125 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static const dif_gpio_pin_t kGpioPinSpiConsoleTxReady = 0;
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false,
+                        .console.putbuf_buffered = true,
+                        .silence_console_prints = true,
+                        .console_tx_indicator.enable = true,
+                        .console_tx_indicator.spi_console_tx_ready_mio =
+                            kTopEarlgreyPinmuxMioOutIoa5,
+                        .console_tx_indicator.spi_console_tx_ready_gpio =
+                            kGpioPinSpiConsoleTxReady);
+
+static const char kTest4KbDataStr[] =
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa"
+    "aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaabbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbbb"
+    "bbbbbbbbbbbbbbbbbbbbbbbbbb";
+
+static perso_blob_t perso_blob_to_host;
+
+static status_t test_base_printf(void) {
+  // Send a string using the TX-ready GPIO indicator pin. Note, we use
+  // `base_printf()`directly, instead of LOG_INFO(), as we only want to print
+  // the exact string as is, with no additional metadata.
+  base_printf("ABC");
+
+  // Send 4k worth of data to the host using the TX-ready GPIO indicator pin.
+  // 4k is larger than the 2k SPI read buffer size, which excercies the circular
+  // buffer operations.
+  base_printf("%s", kTest4KbDataStr);
+
+  // Repeat the above.
+  base_printf("ABC");
+  base_printf("%s", kTest4KbDataStr);
+
+  return OK_STATUS();
+}
+
+static status_t test_large_ujson_tx(ujson_t *uj) {
+  // Note: this should match the size of the "body" field in
+  // `sw/device/lib/testing/json/provisioning_data.h`.
+  const size_t kPayloadSize = 5120;
+  for (size_t i = 0; i < kPayloadSize; ++i) {
+    perso_blob_to_host.body[i] = (uint8_t)(i % 256);
+  }
+  perso_blob_to_host.num_objs = 1;
+  perso_blob_to_host.next_free = kPayloadSize;
+  RESP_OK(ujson_serialize_perso_blob_t, uj, &perso_blob_to_host);
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  ujson_t uj = ujson_ottf_console();
+  CHECK_STATUS_OK(test_base_printf());
+  CHECK_STATUS_OK(test_large_ujson_tx(&uj));
+  abort();
+  return true;
+}
diff --git a/sw/device/tests/ottf_dual_console_test.c b/sw/device/tests/ottf_dual_console_test.c
new file mode 100644
index 0000000000000..2586100bb2d54
--- /dev/null
+++ b/sw/device/tests/ottf_dual_console_test.c
@@ -0,0 +1,36 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/uart_testutils.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+/**
+ * Test the ability to have several independent consoles. The main
+ * console is connected to the "console" UART and a secondary console
+ * is created which is connected to the "dut" UART.
+ */
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static dif_pinmux_t pinmux;
+static ottf_console_t debug_console;
+
+bool test_main(void) {
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_STATUS_OK(uart_testutils_select_pinmux(&pinmux, /* uart= */ 1,
+                                               kUartPinmuxChannelDut));
+  ottf_console_configure_uart(&debug_console, TOP_EARLGREY_UART1_BASE_ADDR);
+  LOG_INFO("Main UART console");
+  base_fprintf(ottf_console_get_buffer_sink(&debug_console),
+               "Second UART console\n");
+  return true;
+}
diff --git a/sw/device/tests/pattgen_ios_test.c b/sw/device/tests/pattgen_ios_test.c
new file mode 100644
index 0000000000000..7a7d79330404d
--- /dev/null
+++ b/sw/device/tests/pattgen_ios_test.c
@@ -0,0 +1,276 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_pattgen.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ottf_utils.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "pattgen_regs.h"  // Generated.
+
+/**
+   PATTGEN IOS test
+   The test programs both channels of the pattgen to random patterns.
+   Pattgen ios are connected as follows:
+   pda_tx[0] - IOB9
+   pcl_tx[0] - IOB10
+   pda_tx[1] - IOB11
+   pcl_tx[1] - IOB12
+
+   The random pattern programmed by 'chip_sw_patt_ios_vseq.sv'
+   and output will be collected at the PADS and compared in SV test bench.
+ */
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+enum {
+  kTestCmdTimeoutUsec = 5000000,
+};
+
+/* Macro to define and use variable that need to be stored in flash
+ * for DV tests and RAM for real tests, to enable backdoor access. */
+#define DEFINE_BACKDOOR_VAR(type, name, default_val)                       \
+  /* DV variable in flash. */                                              \
+  OT_SECTION(".rodata") static volatile const type name##DV = default_val; \
+  /* non-DV variable in RAM. */                                            \
+  OT_SECTION(".data") type name##Real = default_val;
+
+#define BACKDOOR_VAR(name) (kDeviceType == kDeviceSimDV ? name##DV : name##Real)
+
+// Following volatile const will be overwritten by
+// SV testbench with random values.
+// 1: channel 0, 2: channel 1, 3: Both channels
+DEFINE_BACKDOOR_VAR(uint8_t, kChannelEnable, 3)
+
+DEFINE_BACKDOOR_VAR(uint8_t, kPattPol0, kDifPattgenPolarityLow)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattInactiveLevelPda0, 0)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattInactiveLevelPcl0, 0)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattDiv0, 0)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattLower0, 0x76543210)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattUpper0, 0x76543210)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattLen0, 40)
+DEFINE_BACKDOOR_VAR(uint16_t, kPattRep0, 3)
+
+DEFINE_BACKDOOR_VAR(uint8_t, kPattPol1, kDifPattgenPolarityLow)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattInactiveLevelPda1, 0)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattInactiveLevelPcl1, 0)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattDiv1, 0)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattLower1, 0x76543210)
+DEFINE_BACKDOOR_VAR(uint32_t, kPattUpper1, 0x76543210)
+DEFINE_BACKDOOR_VAR(uint8_t, kPattLen1, 40)
+DEFINE_BACKDOOR_VAR(uint16_t, kPattRep1, 3)
+
+typedef enum {
+  kTestCmdWait = 0,
+  kTestCmdConfigure = 1,
+  kTestCmdRun = 2,
+  kTestCmdStop = 3,
+} test_cmd_t;
+
+/* Backdoor variable for real device */
+uint8_t test_cmd = kTestCmdWait;
+
+static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
+static const uint8_t kPattOuts = 4;
+
+static const dif_pinmux_index_t kPinmuxOutsel[] = {
+    kTopEarlgreyPinmuxOutselPattgenPda0Tx, /**< = 49: Peripheral Output 46 */
+    kTopEarlgreyPinmuxOutselPattgenPcl0Tx, /**< = 50: Peripheral Output 47 */
+    kTopEarlgreyPinmuxOutselPattgenPda1Tx, /**< = 51: Peripheral Output 48 */
+    kTopEarlgreyPinmuxOutselPattgenPcl1Tx, /**< = 52: Peripheral Output 49 */
+};
+static const dif_pinmux_index_t kPinmuxMioOutDV[] = {
+    kTopEarlgreyPinmuxMioOutIob9,   // pda0_tx
+    kTopEarlgreyPinmuxMioOutIob10,  // pcl0_tx
+    kTopEarlgreyPinmuxMioOutIob11,  // pda1_tx
+    kTopEarlgreyPinmuxMioOutIob12,  // pcl1_tx
+};
+static const dif_pinmux_index_t kPinmuxMioOutReal[] = {
+    kTopEarlgreyPinmuxMioOutIor10,  // pda0_tx
+    kTopEarlgreyPinmuxMioOutIor11,  // pcl0_tx
+    kTopEarlgreyPinmuxMioOutIor12,  // pda1_tx
+    kTopEarlgreyPinmuxMioOutIor13,  // pcl1_tx
+};
+
+static dif_rv_plic_t plic;
+static dif_pattgen_t pattgen;
+static volatile uint8_t channel_fired = 0;
+
+/**
+ * External interrupt handler.
+ */
+void ottf_external_isr(uint32_t *exc_info) {
+  dif_rv_plic_irq_id_t irq_id;
+
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&plic, kPlicTarget, &irq_id));
+  // Handle OTTF interrupt.
+  top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
+      top_earlgrey_plic_interrupt_for_peripheral[irq_id];
+  if (peripheral == kTopEarlgreyPlicPeripheralUart0 &&
+      ottf_console_flow_control_isr(exc_info)) {
+    return;
+  }
+
+  LOG_INFO("IRQ detected %d", irq_id);
+
+  bool is_pending;
+  switch (irq_id) {
+    case kTopEarlgreyPlicIrqIdPattgenDoneCh0:
+      LOG_INFO("Channel 0");
+      channel_fired |= 1 << 0;
+      // Check the expected interrupt is triggered.
+      CHECK_DIF_OK(dif_pattgen_irq_is_pending(&pattgen, kDifPattgenIrqDoneCh0,
+                                              &is_pending));
+      CHECK(is_pending == true);
+      CHECK_DIF_OK(
+          dif_pattgen_irq_acknowledge(&pattgen, kDifPattgenIrqDoneCh0));
+      break;
+    case kTopEarlgreyPlicIrqIdPattgenDoneCh1:
+      channel_fired |= 1 << 1;
+      LOG_INFO("Channel 1");
+      // Check the expected interrupt is triggered.
+      CHECK_DIF_OK(dif_pattgen_irq_is_pending(&pattgen, kDifPattgenIrqDoneCh1,
+                                              &is_pending));
+      CHECK(is_pending == true);
+      CHECK_DIF_OK(
+          dif_pattgen_irq_acknowledge(&pattgen, kDifPattgenIrqDoneCh1));
+      break;
+    default:
+      LOG_FATAL("IRQ: unknown irq %d", irq_id);
+      break;
+  }
+  // Complete the IRQ by writing the IRQ source to the Ibex specific CC.
+  // register.
+  CHECK_DIF_OK(dif_rv_plic_irq_complete(&plic, kPlicTarget, irq_id));
+}
+
+static void run_test(void);
+
+bool test_main(void) {
+  dif_pinmux_t pinmux;
+  // Let the host know the peripheral frequency.
+  LOG_INFO("peripheral frequency: %u", (unsigned int)kClockFreqPeripheralHz);
+
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  CHECK_DIF_OK(dif_pattgen_init(
+      mmio_region_from_addr(TOP_EARLGREY_PATTGEN_BASE_ADDR), &pattgen));
+  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel0,
+                                               kDifToggleDisabled));
+  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel1,
+                                               kDifToggleDisabled));
+  CHECK_DIF_OK(dif_rv_plic_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic));
+  rv_plic_testutils_irq_range_enable(&plic, kPlicTarget,
+                                     kTopEarlgreyPlicIrqIdPattgenDoneCh0,
+                                     kTopEarlgreyPlicIrqIdPattgenDoneCh1);
+
+  // Initialize pinmux
+  // Assign PattgenOutput to IOB9..12
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+
+  LOG_INFO("pinmux_init begin");
+  const dif_pinmux_index_t *kPinmuxMioOut =
+      kDeviceType == kDeviceSimDV ? kPinmuxMioOutDV : kPinmuxMioOutReal;
+  for (uint8_t i = 0; i < kPattOuts; ++i) {
+    CHECK_DIF_OK(
+        dif_pinmux_output_select(&pinmux, kPinmuxMioOut[i], kPinmuxOutsel[i]));
+  }
+  // Do not remove below msg.
+  LOG_INFO("pinmux_init end");
+
+  // In DV, we only run the test once.
+  if (kDeviceType == kDeviceSimDV) {
+    run_test();
+    return true;
+  }
+  // On FPGA/silicon, we run the test in a loop.
+  while (true) {
+    test_cmd = kTestCmdWait;
+    OTTF_WAIT_FOR(test_cmd != kTestCmdWait, kTestCmdTimeoutUsec);
+    if (test_cmd == kTestCmdStop) {
+      break;
+    }
+    CHECK(test_cmd == kTestCmdConfigure);
+    run_test();
+  }
+  return true;
+}
+
+static void run_test(void) {
+  // Enable pattgen interrupt at plic
+  CHECK_DIF_OK(dif_pattgen_irq_set_enabled(&pattgen, kDifPattgenIrqDoneCh0,
+                                           kDifToggleEnabled));
+  CHECK_DIF_OK(dif_pattgen_irq_set_enabled(&pattgen, kDifPattgenIrqDoneCh1,
+                                           kDifToggleEnabled));
+
+  channel_fired = 0;
+  // Program pattgen if the channel is enabled.
+  dif_pattgen_channel_config_t patt_cfg;
+  if (BACKDOOR_VAR(kChannelEnable) & 0x1) {
+    patt_cfg.polarity = BACKDOOR_VAR(kPattPol0);
+    patt_cfg.inactive_level_pda = BACKDOOR_VAR(kPattInactiveLevelPda0);
+    patt_cfg.inactive_level_pcl = BACKDOOR_VAR(kPattInactiveLevelPcl0);
+    patt_cfg.clock_divisor = BACKDOOR_VAR(kPattDiv0);
+    patt_cfg.seed_pattern_lower_word = BACKDOOR_VAR(kPattLower0);
+    patt_cfg.seed_pattern_upper_word = BACKDOOR_VAR(kPattUpper0);
+    patt_cfg.seed_pattern_length = BACKDOOR_VAR(kPattLen0);
+    patt_cfg.num_pattern_repetitions = BACKDOOR_VAR(kPattRep0);
+    CHECK_DIF_OK(
+        dif_pattgen_configure_channel(&pattgen, kDifPattgenChannel0, patt_cfg));
+  }
+
+  if (BACKDOOR_VAR(kChannelEnable) & 0x2) {
+    patt_cfg.polarity = BACKDOOR_VAR(kPattPol1);
+    patt_cfg.inactive_level_pda = BACKDOOR_VAR(kPattInactiveLevelPda1);
+    patt_cfg.inactive_level_pcl = BACKDOOR_VAR(kPattInactiveLevelPcl1);
+    patt_cfg.clock_divisor = BACKDOOR_VAR(kPattDiv1);
+    patt_cfg.seed_pattern_lower_word = BACKDOOR_VAR(kPattLower1);
+    patt_cfg.seed_pattern_upper_word = BACKDOOR_VAR(kPattUpper1);
+    patt_cfg.seed_pattern_length = BACKDOOR_VAR(kPattLen1);
+    patt_cfg.num_pattern_repetitions = BACKDOOR_VAR(kPattRep1);
+    CHECK_DIF_OK(
+        dif_pattgen_configure_channel(&pattgen, kDifPattgenChannel1, patt_cfg));
+  }
+  // Tell host that the channels are configured.
+  LOG_INFO("Channels configured");
+  // Wait for host to tell us to run.
+  if (kDeviceType != kDeviceSimDV) {
+    OTTF_WAIT_FOR(test_cmd == kTestCmdRun, kTestCmdTimeoutUsec);
+  }
+
+  // Start channels.
+  if (BACKDOOR_VAR(kChannelEnable) & 0x1) {
+    CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel0,
+                                                 kDifToggleEnabled));
+  }
+  if (BACKDOOR_VAR(kChannelEnable) & 0x2) {
+    CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel1,
+                                                 kDifToggleEnabled));
+  }
+
+  // Make sure both interrupts are triggered when both channels are enabled.
+  // Because interrupt from each channel can be triggered at different time,
+  // 'wait_for_interrupt' is not sufficient
+  ATOMIC_WAIT_FOR_INTERRUPT(channel_fired == BACKDOOR_VAR(kChannelEnable));
+
+  // Disable both channels.
+  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel0,
+                                               kDifToggleDisabled));
+  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel1,
+                                               kDifToggleDisabled));
+
+  // Do not remove the below message
+  LOG_INFO("TEST DONE");
+}
diff --git a/sw/device/tests/penetrationtests/BUILD b/sw/device/tests/penetrationtests/BUILD
new file mode 100644
index 0000000000000..c7a38e7d72010
--- /dev/null
+++ b/sw/device/tests/penetrationtests/BUILD
@@ -0,0 +1,453 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(":pentest.bzl", "pentest_cryptolib_fi_asym", "pentest_cryptolib_fi_sym", "pentest_cryptolib_sca_asym", "pentest_cryptolib_sca_sym", "pentest_fi", "pentest_fi_ibex", "pentest_fi_otbn", "pentest_sca")
+load("@ot_python_deps//:requirements.bzl", "requirement")
+
+package(default_visibility = ["//visibility:public"])
+
+IBEX_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_ibex",
+]
+
+IBEX_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-ibex-json=\"$(rootpath {})\"".format(target)
+    for target in IBEX_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi_ibex(
+    name = "fi_ibex",
+    tags = [],
+    test_args = IBEX_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_ibex:harness",
+    test_vectors = IBEX_FI_TESTVECTOR_TARGETS,
+)
+
+CRYPTO_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_crypto",
+]
+
+CRYPTO_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-crypto-json=\"$(rootpath {})\"".format(target)
+    for target in CRYPTO_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi(
+    name = "fi_crypto",
+    tags = [],
+    test_args = CRYPTO_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_crypto:harness",
+    test_vectors = CRYPTO_FI_TESTVECTOR_TARGETS,
+)
+
+LCCTRL_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_lc_ctrl",
+]
+
+LCCTRL_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-lc-ctrl-json=\"$(rootpath {})\"".format(target)
+    for target in LCCTRL_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi(
+    name = "fi_lc_ctrl",
+    tags = [],
+    test_args = LCCTRL_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_lc_ctrl:harness",
+    test_vectors = LCCTRL_FI_TESTVECTOR_TARGETS,
+)
+
+OTP_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_otp",
+]
+
+OTP_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-otp-json=\"$(rootpath {})\"".format(target)
+    for target in OTP_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi(
+    name = "fi_otp",
+    tags = [],
+    test_args = OTP_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_otp:harness",
+    test_vectors = OTP_FI_TESTVECTOR_TARGETS,
+)
+
+RNG_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_rng",
+]
+
+RNG_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-rng-json=\"$(rootpath {})\"".format(target)
+    for target in RNG_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi(
+    name = "fi_rng",
+    tags = [],
+    test_args = RNG_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_rng:harness",
+    test_vectors = RNG_FI_TESTVECTOR_TARGETS,
+)
+
+ROM_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_rom",
+]
+
+ROM_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-rom-json=\"$(rootpath {})\"".format(target)
+    for target in ROM_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi(
+    name = "fi_rom",
+    tags = [],
+    test_args = ROM_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_rom:harness",
+    test_vectors = ROM_FI_TESTVECTOR_TARGETS,
+)
+
+OTBN_FI_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_otbn",
+]
+
+OTBN_FI_TESTVECTOR_ARGS = " ".join([
+    "--fi-otbn-json=\"$(rootpath {})\"".format(target)
+    for target in OTBN_FI_TESTVECTOR_TARGETS
+])
+
+pentest_fi_otbn(
+    name = "fi_otbn",
+    tags = [],
+    test_args = OTBN_FI_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_otbn:harness",
+    test_vectors = OTBN_FI_TESTVECTOR_TARGETS,
+)
+
+AES_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_aes",
+]
+
+AES_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-aes-json=\"$(rootpath {})\"".format(target)
+    for target in AES_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_aes",
+    tags = [],
+    test_args = AES_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_aes:harness",
+    test_vectors = AES_SCA_TESTVECTOR_TARGETS,
+)
+
+EDN_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_edn",
+]
+
+EDN_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-edn-json=\"$(rootpath {})\"".format(target)
+    for target in EDN_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_edn",
+    tags = [],
+    test_args = EDN_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_edn:harness",
+    test_vectors = EDN_SCA_TESTVECTOR_TARGETS,
+)
+
+HMAC_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_hmac",
+]
+
+HMAC_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-hmac-json=\"$(rootpath {})\"".format(target)
+    for target in HMAC_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_hmac",
+    tags = [],
+    test_args = HMAC_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_hmac:harness",
+    test_vectors = HMAC_SCA_TESTVECTOR_TARGETS,
+)
+
+IBEX_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_ibex",
+]
+
+IBEX_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-ibex-json=\"$(rootpath {})\"".format(target)
+    for target in IBEX_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_ibex",
+    tags = [],
+    test_args = IBEX_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_ibex:harness",
+    test_vectors = IBEX_SCA_TESTVECTOR_TARGETS,
+)
+
+KMAC_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_kmac",
+]
+
+KMAC_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-kmac-json=\"$(rootpath {})\"".format(target)
+    for target in KMAC_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_kmac",
+    tags = [],
+    test_args = KMAC_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_kmac:harness",
+    test_vectors = KMAC_SCA_TESTVECTOR_TARGETS,
+)
+
+OTBN_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_otbn",
+]
+
+OTBN_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-otbn-json=\"$(rootpath {})\"".format(target)
+    for target in OTBN_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_otbn",
+    tags = [],
+    test_args = OTBN_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_otbn:harness",
+    test_vectors = OTBN_SCA_TESTVECTOR_TARGETS,
+)
+
+SHA3_SCA_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_sha3",
+]
+
+SHA3_SCA_TESTVECTOR_ARGS = " ".join([
+    "--sca-sha3-json=\"$(rootpath {})\"".format(target)
+    for target in SHA3_SCA_TESTVECTOR_TARGETS
+])
+
+pentest_sca(
+    name = "sca_sha3",
+    tags = [],
+    test_args = SHA3_SCA_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_sha3:harness",
+    test_vectors = SHA3_SCA_TESTVECTOR_TARGETS,
+)
+
+CRYPTOLIB_FI_SYM_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_sym_cryptolib",
+]
+
+CRYPTOLIB_FI_ASYM_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:fi_asym_cryptolib",
+]
+
+CRYPTOLIB_FI_SYM_TESTVECTOR_ARGS = " ".join([
+    "--fi-sym-cryptolib-json=\"$(rootpath {})\"".format(target)
+    for target in CRYPTOLIB_FI_SYM_TESTVECTOR_TARGETS
+])
+
+CRYPTOLIB_FI_ASYM_TESTVECTOR_ARGS = " ".join([
+    "--fi-asym-cryptolib-json=\"$(rootpath {})\"".format(target)
+    for target in CRYPTOLIB_FI_ASYM_TESTVECTOR_TARGETS
+])
+
+pentest_cryptolib_fi_sym(
+    name = "fi_sym_cryptolib",
+    tags = [],
+    test_args = CRYPTOLIB_FI_SYM_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_sym_cryptolib:harness",
+    test_vectors = CRYPTOLIB_FI_SYM_TESTVECTOR_TARGETS,
+)
+
+pentest_cryptolib_fi_sym(
+    name = "fi_sym_cryptolib_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_sym_cryptolib_python_test",
+    test_vectors = [],
+)
+
+pentest_cryptolib_fi_asym(
+    name = "fi_asym_cryptolib",
+    tags = [],
+    test_args = CRYPTOLIB_FI_ASYM_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/fi_asym_cryptolib:harness",
+    test_vectors = CRYPTOLIB_FI_ASYM_TESTVECTOR_TARGETS,
+)
+
+pentest_cryptolib_fi_asym(
+    name = "fi_asym_cryptolib_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_asym_cryptolib_python_test",
+    test_vectors = [],
+)
+
+CRYPTOLIB_SCA_SYM_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_sym_cryptolib",
+]
+
+CRYPTOLIB_SCA_ASYM_TESTVECTOR_TARGETS = [
+    "//sw/host/penetrationtests/testvectors/data:sca_asym_cryptolib",
+]
+
+CRYPTOLIB_SCA_SYM_TESTVECTOR_ARGS = " ".join([
+    "--sca-sym-cryptolib-json=\"$(rootpath {})\"".format(target)
+    for target in CRYPTOLIB_SCA_SYM_TESTVECTOR_TARGETS
+])
+
+CRYPTOLIB_SCA_ASYM_TESTVECTOR_ARGS = " ".join([
+    "--sca-asym-cryptolib-json=\"$(rootpath {})\"".format(target)
+    for target in CRYPTOLIB_SCA_ASYM_TESTVECTOR_TARGETS
+])
+
+pentest_cryptolib_sca_sym(
+    name = "sca_sym_cryptolib",
+    tags = [],
+    test_args = CRYPTOLIB_SCA_SYM_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_sym_cryptolib:harness",
+    test_vectors = CRYPTOLIB_SCA_SYM_TESTVECTOR_TARGETS,
+)
+
+pentest_cryptolib_sca_sym(
+    name = "sca_sym_cryptolib_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_sym_cryptolib_python_test",
+    test_vectors = [],
+)
+
+pentest_cryptolib_sca_asym(
+    name = "sca_asym_cryptolib",
+    tags = [],
+    test_args = CRYPTOLIB_SCA_ASYM_TESTVECTOR_ARGS,
+    test_harness = "//sw/host/tests/penetrationtests/sca_asym_cryptolib:harness",
+    test_vectors = CRYPTOLIB_SCA_ASYM_TESTVECTOR_TARGETS,
+)
+
+pentest_cryptolib_sca_asym(
+    name = "sca_asym_cryptolib_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_asym_cryptolib_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_ibex_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_ibex_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_aes_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_aes_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_hmac_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_hmac_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_kmac_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_kmac_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_otbn_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_otbn_python_test",
+    test_vectors = [],
+)
+
+pentest_sca(
+    name = "sca_sha3_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/sca:sca_sha3_python_test",
+    test_vectors = [],
+)
+
+pentest_fi_ibex(
+    name = "fi_ibex_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_ibex_python_test",
+    test_vectors = [],
+)
+
+pentest_fi(
+    name = "fi_crypto_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_crypto_python_test",
+    test_vectors = [],
+)
+
+pentest_fi_otbn(
+    name = "fi_otbn_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_otbn_python_test",
+    test_vectors = [],
+)
+
+pentest_fi(
+    name = "fi_otp_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_otp_python_test",
+    test_vectors = [],
+)
+
+pentest_fi(
+    name = "fi_rom_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_rom_python_test",
+    test_vectors = [],
+)
+
+pentest_fi(
+    name = "fi_alert_python_test",
+    tags = [
+        "manual",
+        "skip_in_ci",
+    ],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_alert_python_test",
+    test_vectors = [],
+)
+
+pentest_fi(
+    name = "fi_rng_python_test",
+    tags = [],
+    test_args = "",
+    test_harness = "//sw/host/penetrationtests/python/fi:fi_rng_python_test",
+    test_vectors = [],
+)
diff --git a/sw/device/tests/penetrationtests/README.md b/sw/device/tests/penetrationtests/README.md
deleted file mode 100644
index 16309139bf192..0000000000000
--- a/sw/device/tests/penetrationtests/README.md
+++ /dev/null
@@ -1,4 +0,0 @@
-# Penetration Testing Framework
-
-The penetration testing framework is based on the [Cryptotest](../crypto/cryptotest/README.md) framework.
-The purpose of this framework is to perform side-channel analysis (SCA) and fault injection (FI) attacks on the FPGA as well as on the chip.
diff --git a/sw/device/tests/penetrationtests/doc/README.md b/sw/device/tests/penetrationtests/doc/README.md
new file mode 100644
index 0000000000000..39a44023261aa
--- /dev/null
+++ b/sw/device/tests/penetrationtests/doc/README.md
@@ -0,0 +1,77 @@
+# Penetration Testing Framework
+
+The purpose of this framework is to perform side-channel analysis (SCA) and fault injection (FI) attacks on the FPGA as well as on the chip.
+
+![Full hardware setup](pentest_setup.png)
+
+As shown in the block diagram, the pentest framework runs on the target and receives configuration commands by the SCA and FI [ot-sca](https://github.com/lowRISC/ot-sca) framework.
+
+## Usage
+
+To run the penetration tests either on the FPGA or the chip, please follow the instructions in the [ot-sca](https://github.com/lowRISC/ot-sca) repository.
+You can also find the files to communicate to the pentest framework via Python scripts in //sw/host/penetrationtests/python.
+
+## Contributing
+
+When contributing to the pentest framework, run the automated testing as explained below.
+
+### Building Images
+
+Due to code size memory limitations, the firmware for the chip and the FPGA is split into a SCA, general FI, IBEX FI, and OTBN FI binary. To build these binaries for the chip, run:
+```console
+cd $REPO_TOP
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_sca_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_fi_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_fi_ibex_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_fi_otbn_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_cryptolib_sym_fi_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_cryptolib_asym_fi_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_cryptolib_sym_sca_silicon_owner_sival_rom_ext
+
+./bazelisk.sh build \
+  --//signing:token=//signing/tokens:cloud_kms_sival \
+  //sw/device/tests/penetrationtests/firmware:pen_test_cryptolib_asym_sca_silicon_owner_sival_rom_ext
+```
+
+The binaries are located in `bazel-bin/sw/device/tests/penetrationtests/firmware/`.
+
+## Automated Testing
+
+To automatically test whether the pentest framework works, an automatic testing framework is provided.
+This framework compares the responses of the pentest frameworks with reference testvectors.
+
+Use the following command to automatically test the Ibex FI tests on the CW340 FPGA board:
+
+```console
+cd $REPO_TOP
+./bazelisk.sh run //sw/device/tests/penetrationtests:fi_ibex_fpga_cw340_sival_rom_ext
+```
+
+In addition, we have Python scripts to use the pentest framework in //sw/host/penetrationtests/python.
+These scripts are also tested.
+Use the following command to automatically test the Ibex FI tests on the CW340 FPGA board:
+
+```console
+cd $REPO_TOP
+./bazelisk.sh run //sw/device/tests/penetrationtests:fi_ibex_python_test_fpga_cw340_sival_rom_ext
+```
diff --git a/sw/device/tests/penetrationtests/doc/pentest_setup.png b/sw/device/tests/penetrationtests/doc/pentest_setup.png
new file mode 100644
index 0000000000000..9331d68a501b1
Binary files /dev/null and b/sw/device/tests/penetrationtests/doc/pentest_setup.png differ
diff --git a/sw/device/tests/penetrationtests/firmware/BUILD b/sw/device/tests/penetrationtests/firmware/BUILD
index e64cf46724df0..275eefe059f5e 100644
--- a/sw/device/tests/penetrationtests/firmware/BUILD
+++ b/sw/device/tests/penetrationtests/firmware/BUILD
@@ -2,8 +2,15 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
+load(
+    "@bazel_skylib//lib:dicts.bzl",
+    "dicts",
+)
 load(
     "//rules/opentitan:defs.bzl",
+    "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
+    "EARLGREY_TEST_ENVS",
+    "fpga_params",
     "opentitan_binary",
     "opentitan_test",
     "silicon_params",
@@ -11,16 +18,79 @@ load(
 
 package(default_visibility = ["//visibility:public"])
 
-FIRMWARE_DEPS_FPGA = [
+PENTEST_EXEC_ENVS = dicts.add(
+    {
+        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+        "//hw/top_earlgrey:fpga_cw340_test_rom": None,
+        "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": None,
+        "//hw/top_earlgrey:fpga_cw340_rom_ext": None,
+    },
+    EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+)
+
+FIRMWARE_DEPS_FI = [
+    "//sw/device/tests/penetrationtests/firmware/fi:alert_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:crypto_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:lc_ctrl_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:otp_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:rng_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:rom_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_FI_IBEX = [
     "//sw/device/tests/penetrationtests/firmware/fi:ibex_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_FI_OTBN = [
     "//sw/device/tests/penetrationtests/firmware/fi:otbn_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_SCA = [
     "//sw/device/tests/penetrationtests/firmware/sca:aes_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:edn_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:hmac_sca",
     "//sw/device/tests/penetrationtests/firmware/sca:ibex_sca",
     "//sw/device/tests/penetrationtests/firmware/sca:kmac_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:otbn_sca",
     "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
     "//sw/device/tests/penetrationtests/firmware/sca:sha3_sca",
     "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
     "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     "//sw/device/lib/base:csr",
     "//sw/device/lib/base:status",
     "//sw/device/lib/crypto/drivers:entropy",
@@ -33,10 +103,11 @@ FIRMWARE_DEPS_FPGA = [
     "//sw/device/tests/penetrationtests/json:commands",
 ]
 
-FIRMWARE_DEPS_FI = [
-    "//sw/device/tests/penetrationtests/firmware/fi:ibex_fi",
-    "//sw/device/tests/penetrationtests/firmware/fi:otbn_fi",
+FIRMWARE_DEPS_CRYPTOLIB_FI_SYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_sym",
     "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     "//sw/device/lib/base:csr",
     "//sw/device/lib/base:status",
     "//sw/device/lib/crypto/drivers:entropy",
@@ -49,14 +120,45 @@ FIRMWARE_DEPS_FI = [
     "//sw/device/tests/penetrationtests/json:commands",
 ]
 
-FIRMWARE_DEPS_SCA = [
-    "//sw/device/tests/penetrationtests/firmware/sca:aes_sca",
-    "//sw/device/tests/penetrationtests/firmware/sca:ibex_sca",
-    "//sw/device/tests/penetrationtests/firmware/sca:kmac_sca",
+FIRMWARE_DEPS_CRYPTOLIB_FI_ASYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_asym",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_SCA_SYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_sym",
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
     "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
-    "//sw/device/tests/penetrationtests/firmware/sca:sha3_sca",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_SCA_ASYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_asym",
     "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
     "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
     "//sw/device/lib/base:csr",
     "//sw/device/lib/base:status",
     "//sw/device/lib/crypto/drivers:entropy",
@@ -69,49 +171,162 @@ FIRMWARE_DEPS_SCA = [
     "//sw/device/tests/penetrationtests/json:commands",
 ]
 
-[
-    opentitan_binary(
-        name = "firmware_{}".format(exec_env),
-        testonly = True,
-        srcs = [":firmware.c"],
-        exec_env = [
-            "//hw/top_earlgrey:{}".format(exec_env),
-        ],
-        deps = FIRMWARE_DEPS_FPGA,
-    )
-    for exec_env in [
-        "fpga_cw310_test_rom",
-    ]
-]
+opentitan_binary(
+    name = "firmware_cryptolib_fi_sym",
+    testonly = True,
+    srcs = [":firmware_cryptolib_fi_sym.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310",
+        "//hw/top_earlgrey:fpga_cw340",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
+    ],
+    deps = FIRMWARE_DEPS_CRYPTOLIB_FI_SYM,
+)
+
+opentitan_binary(
+    name = "firmware_cryptolib_fi_asym",
+    testonly = True,
+    srcs = [":firmware_cryptolib_fi_asym.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310",
+        "//hw/top_earlgrey:fpga_cw340",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
+    ],
+    deps = FIRMWARE_DEPS_CRYPTOLIB_FI_ASYM,
+)
+
+opentitan_binary(
+    name = "firmware_cryptolib_sca_sym",
+    testonly = True,
+    srcs = [":firmware_cryptolib_sca_sym.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310",
+        "//hw/top_earlgrey:fpga_cw340",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
+    ],
+    deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_SYM,
+)
+
+opentitan_binary(
+    name = "firmware_cryptolib_sca_asym",
+    testonly = True,
+    srcs = [":firmware_cryptolib_sca_asym.c"],
+    exec_env = [
+        "//hw/top_earlgrey:fpga_cw310",
+        "//hw/top_earlgrey:fpga_cw340",
+        "//hw/top_earlgrey:silicon_owner_sival_rom_ext",
+    ],
+    deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_ASYM,
+)
 
 opentitan_test(
-    name = "chip_pen_test_fi",
+    name = "pen_test_fi",
     srcs = [":firmware_fi.c"],
-    exec_env = {
-        "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner",
-        "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_owner",
-    },
-    silicon_owner = silicon_params(
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
         tags = [
-            "broken",
             "manual",
+            "skip_in_ci",
         ],
     ),
     deps = FIRMWARE_DEPS_FI,
 )
 
 opentitan_test(
-    name = "chip_pen_test_sca",
+    name = "pen_test_fi_ibex",
+    srcs = [":firmware_fi_ibex.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_FI_IBEX,
+)
+
+opentitan_test(
+    name = "pen_test_fi_otbn",
+    srcs = [":firmware_fi_otbn.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_FI_OTBN,
+)
+
+opentitan_test(
+    name = "pen_test_sca",
     srcs = [":firmware_sca.c"],
-    exec_env = {
-        "//hw/top_earlgrey:silicon_owner_sival_rom_ext": "silicon_owner",
-        "//hw/top_earlgrey:silicon_owner_prodc_rom_ext": "silicon_owner",
-    },
-    silicon_owner = silicon_params(
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
         tags = [
-            "broken",
             "manual",
+            "skip_in_ci",
         ],
     ),
     deps = FIRMWARE_DEPS_SCA,
 )
+
+opentitan_test(
+    name = "pen_test_cryptolib_fi_sym",
+    srcs = [":firmware_cryptolib_fi_sym.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_CRYPTOLIB_FI_SYM,
+)
+
+opentitan_test(
+    name = "pen_test_cryptolib_fi_asym",
+    srcs = [":firmware_cryptolib_fi_asym.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_CRYPTOLIB_FI_ASYM,
+)
+
+opentitan_test(
+    name = "pen_test_cryptolib_sca_sym",
+    srcs = [":firmware_cryptolib_sca_sym.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_SYM,
+)
+
+opentitan_test(
+    name = "pen_test_cryptolib_sca_asym",
+    srcs = [":firmware_cryptolib_sca_asym.c"],
+    exec_env = PENTEST_EXEC_ENVS,
+    fpga = fpga_params(tags = ["skip_in_ci"]),
+    silicon = silicon_params(
+        tags = [
+            "manual",
+            "skip_in_ci",
+        ],
+    ),
+    deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_ASYM,
+)
diff --git a/sw/device/tests/penetrationtests/firmware/fi/BUILD b/sw/device/tests/penetrationtests/firmware/fi/BUILD
index aba5b8c8e4f89..761c83c66ab7f 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/BUILD
+++ b/sw/device/tests/penetrationtests/firmware/fi/BUILD
@@ -4,6 +4,121 @@
 
 package(default_visibility = ["//visibility:public"])
 
+cc_library(
+    name = "crypto_fi",
+    srcs = ["crypto_fi.c"],
+    hdrs = ["crypto_fi.h"],
+    deps = [
+        "//hw/ip/aes/data:aes_c_regs",
+        "//hw/ip/hmac/data:hmac_c_regs",
+        "//hw/ip/kmac/data:kmac_c_regs",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:hmac",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:aes_testutils",
+        "//sw/device/lib/testing:hmac_testutils",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:crypto_fi_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_fi_sym",
+    srcs = ["cryptolib_fi_sym.c"],
+    hdrs = ["cryptolib_fi_sym.h"],
+    deps = [
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_sym_impl",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_fi_sym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_fi_asym",
+    srcs = ["cryptolib_fi_asym.c"],
+    hdrs = ["cryptolib_fi_asym.h"],
+    deps = [
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_asym_impl",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_fi_asym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_fi_asym_impl",
+    srcs = ["cryptolib_fi_asym_impl.c"],
+    hdrs = [
+        "cryptolib_fi_asym_impl.h",
+        "//sw/device/tests/penetrationtests/firmware/lib:cryptolib_asym.h",
+    ],
+    deps = [
+        "//sw/device/lib/base:math",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/impl:ecc_p256",
+        "//sw/device/lib/crypto/impl:ecc_p384",
+        "//sw/device/lib/crypto/impl:integrity",
+        "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/include:crypto_hdrs",
+        "//sw/device/lib/crypto/include:datatypes",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_fi_asym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_fi_sym_impl",
+    srcs = ["cryptolib_fi_sym_impl.c"],
+    hdrs = [
+        "cryptolib_fi_sym_impl.h",
+        "//sw/device/tests/penetrationtests/firmware/lib:cryptolib_sym.h",
+    ],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/impl:aes",
+        "//sw/device/lib/crypto/impl:aes_gcm",
+        "//sw/device/lib/crypto/impl:drbg",
+        "//sw/device/lib/crypto/impl:hmac",
+        "//sw/device/lib/crypto/impl:integrity",
+        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/include:crypto_hdrs",
+        "//sw/device/lib/crypto/include:datatypes",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_fi_sym_commands",
+    ],
+)
+
 cc_library(
     name = "ibex_fi",
     srcs = [
@@ -12,21 +127,54 @@ cc_library(
     ],
     hdrs = ["ibex_fi.h"],
     deps = [
+        "//hw/ip/aes/data:aes_c_regs",
+        "//hw/ip/entropy_src/data:entropy_src_c_regs",
+        "//hw/ip/hmac/data:hmac_c_regs",
+        "//hw/ip/keymgr/data:keymgr_c_regs",
+        "//hw/ip/otp_ctrl/data:otp_ctrl_c_regs",
+        "//hw/ip/sram_ctrl/data:sram_ctrl_c_regs",
+        "//hw/top_earlgrey:alert_handler_c_regs",
+        "//sw/device/lib/arch:boot_stage",
+        "//sw/device/lib/base:abs_mmio",
         "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:hardened",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
         "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/dif:otp_ctrl",
         "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/dif:sram_ctrl",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:flash_ctrl_testutils",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing:sram_ctrl_testutils",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-        "//sw/device/sca/lib:sca",
-        "//sw/device/tests/penetrationtests/firmware/lib:sca_lib",
+        "//sw/device/silicon_creator/lib/drivers:retention_sram",
+        "//sw/device/silicon_creator/manuf/lib:otp_fields",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/device/tests/penetrationtests/json:ibex_fi_commands",
     ],
 )
 
+cc_library(
+    name = "lc_ctrl_fi",
+    srcs = ["lc_ctrl_fi.c"],
+    hdrs = ["lc_ctrl_fi.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:lc_ctrl",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:rv_core_ibex_testutils",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:lc_ctrl_fi_commands",
+    ],
+)
+
 cc_library(
     name = "otbn_fi",
     srcs = ["otbn_fi.c"],
@@ -34,17 +182,137 @@ cc_library(
     deps = [
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/drivers:keymgr",
         "//sw/device/lib/crypto/drivers:otbn",
         "//sw/device/lib/dif:otbn",
+        "//sw/device/lib/dif:rv_core_ibex",
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-        "//sw/device/sca/lib:sca",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_beq",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_bn_rshi",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_bn_sel",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_bn_wsrr",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_bne",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_dmem_access",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_dmem_write",
         "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_hardware_dmem_op_loop",
         "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_hardware_reg_op_loop",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_jal",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_lw",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_rf",
         "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_unrolled_dmem_op_loop",
         "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_char_unrolled_reg_op_loop",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_key_sideload",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_load_integrity",
+        "//sw/device/tests/penetrationtests/firmware/fi/otbn:otbn_pc",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/device/tests/penetrationtests/json:otbn_fi_commands",
     ],
 )
+
+cc_library(
+    name = "rng_fi",
+    srcs = ["rng_fi.c"],
+    hdrs = ["rng_fi.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:csrng",
+        "//sw/device/lib/dif:csrng_shared",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:csrng_testutils",
+        "//sw/device/lib/testing:edn_testutils",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:rv_core_ibex_testutils",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:rng_fi_commands",
+    ],
+)
+
+cc_library(
+    name = "otp_fi",
+    srcs = ["otp_fi.c"],
+    hdrs = ["otp_fi.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:otp_ctrl",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:otp_ctrl_testutils",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:otp_fi_commands",
+    ],
+)
+
+cc_library(
+    name = "rom_fi",
+    srcs = ["rom_fi.c"],
+    hdrs = ["rom_fi.h"],
+    deps = [
+        "//hw/ip/rom_ctrl/data:rom_ctrl_c_regs",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:rom_ctrl",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:rom_fi_commands",
+    ],
+)
+
+cc_library(
+    name = "alert_fi",
+    srcs = ["alert_fi.c"],
+    hdrs = ["alert_fi.h"],
+    deps = [
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:adc_ctrl",
+        "//sw/device/lib/dif:aes",
+        "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:aon_timer",
+        "//sw/device/lib/dif:csrng",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:flash_ctrl",
+        "//sw/device/lib/dif:gpio",
+        "//sw/device/lib/dif:hmac",
+        "//sw/device/lib/dif:i2c",
+        "//sw/device/lib/dif:keymgr",
+        "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:otbn",
+        "//sw/device/lib/dif:otp_ctrl",
+        "//sw/device/lib/dif:pattgen",
+        "//sw/device/lib/dif:pwm",
+        "//sw/device/lib/dif:pwrmgr",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/dif:rv_timer",
+        "//sw/device/lib/dif:sensor_ctrl",
+        "//sw/device/lib/dif:spi_device",
+        "//sw/device/lib/dif:spi_host",
+        "//sw/device/lib/dif:sysrst_ctrl",
+        "//sw/device/lib/dif:uart",
+        "//sw/device/lib/dif:usbdev",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:alert_fi_commands",
+    ],
+)
diff --git a/sw/device/tests/penetrationtests/firmware/fi/alert_fi.c b/sw/device/tests/penetrationtests/firmware/fi/alert_fi.c
new file mode 100644
index 0000000000000..0ff48e29fd668
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/alert_fi.c
@@ -0,0 +1,689 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/alert_fi.h"
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_adc_ctrl.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_aon_timer.h"
+#include "sw/device/lib/dif/dif_clkmgr.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_hmac.h"
+#include "sw/device/lib/dif/dif_i2c.h"
+#include "sw/device/lib/dif/dif_keymgr.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/dif/dif_lc_ctrl.h"
+#include "sw/device/lib/dif/dif_otbn.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/dif/dif_pattgen.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_pwm.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rom_ctrl.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/dif/dif_rv_timer.h"
+#include "sw/device/lib/dif/dif_sensor_ctrl.h"
+#include "sw/device/lib/dif/dif_spi_device.h"
+#include "sw/device/lib/dif/dif_spi_host.h"
+#include "sw/device/lib/dif/dif_sram_ctrl.h"
+#include "sw/device/lib/dif/dif_sysrst_ctrl.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/dif/dif_usbdev.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/alert_fi_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+// Interface to Ibex.
+static dif_rv_core_ibex_t rv_core_ibex;
+
+static dif_alert_handler_t alert_handler;
+static dif_adc_ctrl_t adc_ctrl_aon;
+static dif_aes_t aes;
+static dif_aon_timer_t aon_timer_aon;
+static dif_clkmgr_t clkmgr_aon;
+static dif_csrng_t csrng;
+static dif_edn_t edn0;
+static dif_edn_t edn1;
+static dif_entropy_src_t entropy_src;
+static dif_flash_ctrl_t flash_ctrl;
+static dif_gpio_t gpio;
+static dif_hmac_t hmac;
+static dif_i2c_t i2c0;
+static dif_i2c_t i2c1;
+static dif_i2c_t i2c2;
+static dif_keymgr_t keymgr;
+static dif_kmac_t kmac;
+static dif_lc_ctrl_t lc_ctrl;
+static dif_otbn_t otbn;
+static dif_otp_ctrl_t otp_ctrl;
+static dif_pattgen_t pattgen;
+static dif_pinmux_t pinmux_aon;
+static dif_pwm_t pwm_aon;
+static dif_pwrmgr_t pwrmgr_aon;
+static dif_rom_ctrl_t rom_ctrl;
+static dif_rstmgr_t rstmgr_aon;
+static dif_rv_core_ibex_t rv_core_ibex;
+static dif_rv_plic_t rv_plic;
+static dif_rv_timer_t rv_timer;
+static dif_sensor_ctrl_t sensor_ctrl_aon;
+static dif_spi_device_t spi_device;
+static dif_spi_host_t spi_host0;
+static dif_spi_host_t spi_host1;
+static dif_sram_ctrl_t sram_ctrl_main;
+static dif_sram_ctrl_t sram_ctrl_ret_aon;
+static dif_sysrst_ctrl_t sysrst_ctrl_aon;
+static dif_uart_t uart0;
+static dif_uart_t uart1;
+static dif_uart_t uart2;
+static dif_uart_t uart3;
+static dif_usbdev_t usbdev;
+
+enum { kNumberTestRegisters = 63 };
+
+static status_t init_peripherals(void) {
+  mmio_region_t base_addr;
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR);
+  TRY(dif_alert_handler_init(base_addr, &alert_handler));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_ADC_CTRL_AON_BASE_ADDR);
+  TRY(dif_adc_ctrl_init(base_addr, &adc_ctrl_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR);
+  TRY(dif_aes_init(base_addr, &aes));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_AON_TIMER_AON_BASE_ADDR);
+  TRY(dif_aon_timer_init(base_addr, &aon_timer_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR);
+  TRY(dif_clkmgr_init(base_addr, &clkmgr_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR);
+  TRY(dif_csrng_init(base_addr, &csrng));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR);
+  TRY(dif_edn_init(base_addr, &edn0));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR);
+  TRY(dif_edn_init(base_addr, &edn1));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR);
+  TRY(dif_entropy_src_init(base_addr, &entropy_src));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR);
+  TRY(dif_flash_ctrl_init(base_addr, &flash_ctrl));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR);
+  TRY(dif_gpio_init(base_addr, &gpio));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR);
+  TRY(dif_hmac_init(base_addr, &hmac));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_I2C0_BASE_ADDR);
+  TRY(dif_i2c_init(base_addr, &i2c0));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_I2C1_BASE_ADDR);
+  TRY(dif_i2c_init(base_addr, &i2c1));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_I2C2_BASE_ADDR);
+  TRY(dif_i2c_init(base_addr, &i2c2));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR);
+  TRY(dif_keymgr_init(base_addr, &keymgr));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR);
+  TRY(dif_kmac_init(base_addr, &kmac));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR);
+  TRY(dif_lc_ctrl_init(base_addr, &lc_ctrl));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR);
+  TRY(dif_otbn_init(base_addr, &otbn));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR);
+  TRY(dif_otp_ctrl_init(base_addr, &otp_ctrl));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_PATTGEN_BASE_ADDR);
+  TRY(dif_pattgen_init(base_addr, &pattgen));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  TRY(dif_pinmux_init(base_addr, &pinmux_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR);
+  TRY(dif_pwm_init(base_addr, &pwm_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR);
+  TRY(dif_pwrmgr_init(base_addr, &pwrmgr_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_ROM_CTRL_REGS_BASE_ADDR);
+  TRY(dif_rom_ctrl_init(base_addr, &rom_ctrl));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR);
+  TRY(dif_rstmgr_init(base_addr, &rstmgr_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR);
+  TRY(dif_rv_core_ibex_init(base_addr, &rv_core_ibex));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  TRY(dif_rv_plic_init(base_addr, &rv_plic));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_RV_TIMER_BASE_ADDR);
+  TRY(dif_rv_timer_init(base_addr, &rv_timer));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR);
+  TRY(dif_sensor_ctrl_init(base_addr, &sensor_ctrl_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SPI_DEVICE_BASE_ADDR);
+  TRY(dif_spi_device_init(base_addr, &spi_device));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST0_BASE_ADDR);
+  TRY(dif_spi_host_init(base_addr, &spi_host0));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
+  TRY(dif_spi_host_init(base_addr, &spi_host1));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR);
+  TRY(dif_sram_ctrl_init(base_addr, &sram_ctrl_main));
+
+  base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR);
+  TRY(dif_sram_ctrl_init(base_addr, &sram_ctrl_ret_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SYSRST_CTRL_AON_BASE_ADDR);
+  TRY(dif_sysrst_ctrl_init(base_addr, &sysrst_ctrl_aon));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR);
+  TRY(dif_uart_init(base_addr, &uart0));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_UART1_BASE_ADDR);
+  TRY(dif_uart_init(base_addr, &uart1));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_UART2_BASE_ADDR);
+  TRY(dif_uart_init(base_addr, &uart2));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_UART3_BASE_ADDR);
+  TRY(dif_uart_init(base_addr, &uart3));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_USBDEV_BASE_ADDR);
+  TRY(dif_usbdev_init(base_addr, &usbdev));
+
+  return OK_STATUS();
+}
+
+status_t handle_alert_fi_trigger(ujson_t *uj) {
+  alert_fi_trigger_t uj_trigger;
+  TRY(ujson_deserialize_alert_fi_trigger_t(uj, &uj_trigger));
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (uj_trigger.alert >= kNumberTestRegisters) {
+    alert_fi_empty_out_t uj_output;
+    uj_output.success = false;
+    LOG_ERROR("Wrong alert given");
+    RESP_OK(ujson_serialize_alert_fi_empty_out_t, uj, &uj_output);
+  }
+
+  // Trigger the alert given by the user. Namely, trigger the test register from
+  // the corresponding block.
+  switch (uj_trigger.alert) {
+    case 0:
+      TRY(dif_aes_alert_force(&aes, kDifAesAlertRecovCtrlUpdateErr));
+      break;
+    case 1:
+      TRY(dif_aes_alert_force(&aes, kDifAesAlertFatalFault));
+      break;
+    case 2:
+      TRY(dif_aon_timer_alert_force(&aon_timer_aon,
+                                    kDifAonTimerAlertFatalFault));
+      break;
+    case 3:
+      TRY(dif_clkmgr_alert_force(&clkmgr_aon, kDifClkmgrAlertRecovFault));
+      break;
+    case 4:
+      TRY(dif_clkmgr_alert_force(&clkmgr_aon, kDifClkmgrAlertFatalFault));
+      break;
+    case 5:
+      TRY(dif_csrng_alert_force(&csrng, kDifCsrngAlertRecovAlert));
+      break;
+    case 6:
+      TRY(dif_csrng_alert_force(&csrng, kDifCsrngAlertFatalAlert));
+      break;
+    case 7:
+      TRY(dif_edn_alert_force(&edn0, kDifEdnAlertRecovAlert));
+      break;
+    case 8:
+      TRY(dif_edn_alert_force(&edn0, kDifEdnAlertFatalAlert));
+      break;
+    case 9:
+      TRY(dif_edn_alert_force(&edn1, kDifEdnAlertRecovAlert));
+      break;
+    case 10:
+      TRY(dif_edn_alert_force(&edn1, kDifEdnAlertFatalAlert));
+      break;
+    case 11:
+      TRY(dif_entropy_src_alert_force(&entropy_src,
+                                      kDifEntropySrcAlertRecovAlert));
+      break;
+    case 12:
+      TRY(dif_entropy_src_alert_force(&entropy_src,
+                                      kDifEntropySrcAlertFatalAlert));
+      break;
+    case 13:
+      TRY(dif_flash_ctrl_alert_force(&flash_ctrl, kDifFlashCtrlAlertRecovErr));
+      break;
+    case 14:
+      TRY(dif_flash_ctrl_alert_force(&flash_ctrl,
+                                     kDifFlashCtrlAlertFatalStdErr));
+      break;
+    case 15:
+      TRY(dif_flash_ctrl_alert_force(&flash_ctrl, kDifFlashCtrlAlertFatalErr));
+      break;
+    case 16:
+      TRY(dif_flash_ctrl_alert_force(&flash_ctrl,
+                                     kDifFlashCtrlAlertFatalPrimFlashAlert));
+      break;
+    case 17:
+      TRY(dif_flash_ctrl_alert_force(&flash_ctrl,
+                                     kDifFlashCtrlAlertRecovPrimFlashAlert));
+      break;
+    case 18:
+      TRY(dif_gpio_alert_force(&gpio, kDifGpioAlertFatalFault));
+      break;
+    case 19:
+      TRY(dif_hmac_alert_force(&hmac, kDifHmacAlertFatalFault));
+      break;
+    case 20:
+      TRY(dif_i2c_alert_force(&i2c0, kDifI2cAlertFatalFault));
+      break;
+    case 21:
+      TRY(dif_i2c_alert_force(&i2c1, kDifI2cAlertFatalFault));
+      break;
+    case 22:
+      TRY(dif_i2c_alert_force(&i2c2, kDifI2cAlertFatalFault));
+      break;
+    case 23:
+      TRY(dif_keymgr_alert_force(&keymgr, kDifKeymgrAlertRecovOperationErr));
+      break;
+    case 24:
+      TRY(dif_keymgr_alert_force(&keymgr, kDifKeymgrAlertFatalFaultErr));
+      break;
+    case 25:
+      TRY(dif_kmac_alert_force(&kmac, kDifKmacAlertRecovOperationErr));
+      break;
+    case 26:
+      TRY(dif_kmac_alert_force(&kmac, kDifKmacAlertFatalFaultErr));
+      break;
+    case 27:
+      TRY(dif_lc_ctrl_alert_force(&lc_ctrl, kDifLcCtrlAlertFatalProgError));
+      break;
+    case 28:
+      TRY(dif_lc_ctrl_alert_force(&lc_ctrl, kDifLcCtrlAlertFatalStateError));
+      break;
+    case 29:
+      TRY(dif_lc_ctrl_alert_force(&lc_ctrl, kDifLcCtrlAlertFatalBusIntegError));
+      break;
+    case 30:
+      TRY(dif_otbn_alert_force(&otbn, kDifOtbnAlertFatal));
+      break;
+    case 31:
+      TRY(dif_otbn_alert_force(&otbn, kDifOtbnAlertRecov));
+      break;
+    case 32:
+      TRY(dif_otp_ctrl_alert_force(&otp_ctrl, kDifOtpCtrlAlertFatalMacroError));
+      break;
+    case 33:
+      TRY(dif_otp_ctrl_alert_force(&otp_ctrl, kDifOtpCtrlAlertFatalCheckError));
+      break;
+    case 34:
+      TRY(dif_otp_ctrl_alert_force(&otp_ctrl,
+                                   kDifOtpCtrlAlertFatalBusIntegError));
+      break;
+    case 35:
+      TRY(dif_otp_ctrl_alert_force(&otp_ctrl,
+                                   kDifOtpCtrlAlertFatalPrimOtpAlert));
+      break;
+    case 36:
+      TRY(dif_otp_ctrl_alert_force(&otp_ctrl,
+                                   kDifOtpCtrlAlertRecovPrimOtpAlert));
+      break;
+    case 37:
+      TRY(dif_pattgen_alert_force(&pattgen, kDifPattgenAlertFatalFault));
+      break;
+    case 38:
+      TRY(dif_pinmux_alert_force(&pinmux_aon, kDifPinmuxAlertFatalFault));
+      break;
+    case 39:
+      TRY(dif_pwm_alert_force(&pwm_aon, kDifPwmAlertFatalFault));
+      break;
+    case 40:
+      TRY(dif_pwrmgr_alert_force(&pwrmgr_aon, kDifPwrmgrAlertFatalFault));
+      break;
+    case 41:
+      TRY(dif_rom_ctrl_alert_force(&rom_ctrl, kDifRomCtrlAlertFatal));
+      break;
+    case 42:
+      TRY(dif_rstmgr_alert_force(&rstmgr_aon, kDifRstmgrAlertFatalFault));
+      break;
+    case 43:
+      TRY(dif_rstmgr_alert_force(&rstmgr_aon, kDifRstmgrAlertFatalCnstyFault));
+      break;
+    case 44:
+      TRY(dif_rv_core_ibex_alert_force(&rv_core_ibex,
+                                       kDifRvCoreIbexAlertFatalSwErr));
+      break;
+    case 45:
+      TRY(dif_rv_core_ibex_alert_force(&rv_core_ibex,
+                                       kDifRvCoreIbexAlertRecovSwErr));
+      break;
+    case 46:
+      TRY(dif_rv_core_ibex_alert_force(&rv_core_ibex,
+                                       kDifRvCoreIbexAlertFatalHwErr));
+      break;
+    case 47:
+      TRY(dif_rv_core_ibex_alert_force(&rv_core_ibex,
+                                       kDifRvCoreIbexAlertRecovHwErr));
+      break;
+    case 48:
+      TRY(dif_rv_plic_alert_force(&rv_plic, kDifRvPlicAlertFatalFault));
+      break;
+    case 49:
+      TRY(dif_rv_timer_alert_force(&rv_timer, kDifRvTimerAlertFatalFault));
+      break;
+    case 50:
+      TRY(dif_sensor_ctrl_alert_force(&sensor_ctrl_aon,
+                                      kDifSensorCtrlAlertRecovAlert));
+      break;
+    case 51:
+      TRY(dif_sensor_ctrl_alert_force(&sensor_ctrl_aon,
+                                      kDifSensorCtrlAlertFatalAlert));
+      break;
+    case 52:
+      TRY(dif_spi_device_alert_force(&spi_device,
+                                     kDifSpiDeviceAlertFatalFault));
+      break;
+    case 53:
+      TRY(dif_spi_host_alert_force(&spi_host0, kDifSpiHostAlertFatalFault));
+      break;
+    case 54:
+      TRY(dif_spi_host_alert_force(&spi_host1, kDifSpiHostAlertFatalFault));
+      break;
+    case 55:
+      TRY(dif_sram_ctrl_alert_force(&sram_ctrl_main,
+                                    kDifSramCtrlAlertFatalError));
+      break;
+    case 56:
+      TRY(dif_sram_ctrl_alert_force(&sram_ctrl_ret_aon,
+                                    kDifSramCtrlAlertFatalError));
+      break;
+    case 57:
+      TRY(dif_sysrst_ctrl_alert_force(&sysrst_ctrl_aon,
+                                      kDifSysrstCtrlAlertFatalFault));
+      break;
+    case 58:
+      TRY(dif_uart_alert_force(&uart0, kDifUartAlertFatalFault));
+      break;
+    case 59:
+      TRY(dif_uart_alert_force(&uart1, kDifUartAlertFatalFault));
+      break;
+    case 60:
+      TRY(dif_uart_alert_force(&uart2, kDifUartAlertFatalFault));
+      break;
+    case 61:
+      TRY(dif_uart_alert_force(&uart3, kDifUartAlertFatalFault));
+      break;
+    case 62:
+      TRY(dif_usbdev_alert_force(&usbdev, kDifUsbdevAlertFatalFault));
+      break;
+    default:
+      LOG_ERROR("Wrong alert given");
+      return INVALID_ARGUMENT();
+  }
+
+  // Cycle a duration to ensure escalation propagated following the duration
+  // settings of the user.
+  uint32_t duration_cycles = 0;
+  ptrdiff_t phase0_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase0_cycles_reg_offset);
+  ptrdiff_t phase1_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase1_cycles_reg_offset);
+  ptrdiff_t phase2_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase2_cycles_reg_offset);
+  ptrdiff_t phase3_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase3_cycles_reg_offset);
+
+  for (uint32_t wait = 0; wait < duration_cycles; wait++)
+    asm volatile("nop");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  alert_fi_alert_out_t uj_output;
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_alert_fi_alert_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_alert_fi_sensor_ctrl_trigger(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Write to sensor control's ALERT_TRIG
+  TRY(dif_sensor_ctrl_set_ast_event_trigger(&sensor_ctrl_aon, 0,
+                                            kDifToggleEnabled));
+
+  // Cycle a duration to ensure escalation propagated following the duration
+  // settings of the user.
+  uint32_t duration_cycles = 0;
+  ptrdiff_t phase0_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase0_cycles_reg_offset);
+  ptrdiff_t phase1_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase1_cycles_reg_offset);
+  ptrdiff_t phase2_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase2_cycles_reg_offset);
+  ptrdiff_t phase3_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase3_cycles_reg_offset);
+
+  for (uint32_t wait = 0; wait < duration_cycles; wait++)
+    asm volatile("nop");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  alert_fi_alert_out_t uj_output;
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_alert_fi_alert_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_alert_fi_ibex_sw_fatal(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Write to the CSR.
+  TRY(dif_rv_core_ibex_trigger_sw_fatal_err_alert(&rv_core_ibex));
+
+  // Cycle a duration to ensure escalation propagated following the duration
+  // settings of the user.
+  uint32_t duration_cycles = 0;
+  ptrdiff_t phase0_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase0_cycles_reg_offset);
+  ptrdiff_t phase1_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase1_cycles_reg_offset);
+  ptrdiff_t phase2_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase2_cycles_reg_offset);
+  ptrdiff_t phase3_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles +=
+      mmio_region_read32(alert_handler.base_addr, phase3_cycles_reg_offset);
+
+  for (uint32_t wait = 0; wait < duration_cycles; wait++)
+    asm volatile("nop");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  alert_fi_alert_out_t uj_output;
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_alert_fi_alert_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_alert_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Initialize all HW blocks
+  TRY(init_peripherals());
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_alert_fi(ujson_t *uj) {
+  alert_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_alert_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kAlertFiSubcommandInit:
+      return handle_alert_fi_init(uj);
+    case kAlertFiSubcommandTrigger:
+      return handle_alert_fi_trigger(uj);
+    case kAlertFiSubcommandSensorCtrlTrigger:
+      return handle_alert_fi_sensor_ctrl_trigger(uj);
+    case kAlertFiSubcommandIbexSwFatal:
+      return handle_alert_fi_ibex_sw_fatal(uj);
+    default:
+      LOG_ERROR("Unrecognized Alert FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/alert_fi.h b/sw/device/tests/penetrationtests/firmware/fi/alert_fi.h
new file mode 100644
index 0000000000000..646c61379673b
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/alert_fi.h
@@ -0,0 +1,154 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ALERT_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ALERT_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * Alert Trigger FI test.
+ *
+ * Trigger a specified alert test from a hardware and get the reaction from the
+ * chip.
+ *
+ * AES: recoverable and fatal alerts related to control updates and general
+ * faults.
+ *  - RecovCtrlUpdateErr [Case 0]
+ *  - FatalFault [Case 1]
+ * AON_TIMER: a fatal fault alert.
+ *  - FatalFault [Case 2]
+ * CLKMGR: recoverable and fatal clock manager faults.
+ *  - RecovFault [Case 3]
+ *  - FatalFault [Case 4]
+ * CSRNG: recoverable and fatal alerts for the Continuous Self-Test Random
+ * Number Generator.
+ *  - RecovAlert [Case 5]
+ *  - FatalAlert [Case 6]
+ * EDN: recoverable and fatal alerts for the Entropy Distribution Network (EDN0
+ * and EDN1).
+ *  - EDN0 RecovAlert [Case 7]
+ *  - EDN0 FatalAlert [Case 8]
+ *  - EDN1 RecovAlert [Case 9]
+ *  - EDN1 FatalAlert [Case 10]
+ * ENTROPY_SRC: recoverable and fatal alerts for the Entropy Source.
+ *  - RecovAlert [Case 11]
+ *  - FatalAlert [Case 12]
+ * FLASH_CTRL: various recoverable and fatal errors and alerts related to flash
+ * control.
+ *  - RecovErr [Case 13]
+ *  - FatalStdErr [Case 14]
+ *  - FatalErr [Case 15]
+ *  - FatalPrimFlashAlert [Case 16]
+ *  - RecovPrimFlashAlert [Case 17]
+ * GPIO: a fatal fault alert.
+ *  - FatalFault [Case 18]
+ * HMAC: a fatal fault alert.
+ *  - FatalFault [Case 19]
+ * I2C: a fatal fault alert (I2C0, I2C1, and I2C2).
+ *  - I2C0 FatalFault [Case 20]
+ *  - I2C1 FatalFault [Case 21]
+ *  - I2C2 FatalFault [Case 22]
+ * KEYMGR: recoverable and fatal key manager errors.
+ *  - RecovOperationErr [Case 23]
+ *  - FatalFaultErr [Case 24]
+ * KMAC: recoverable and fatal KMAC errors.
+ *  - RecovOperationErr [Case 25]
+ *  - FatalFaultErr [Case 26]
+ * LC_CTRL: fatal programming, state, and bus integrity errors for the lifecycle
+ * controller.
+ *  - FatalProgError [Case 27]
+ *  - FatalStateError [Case 28]
+ *  - FatalBusIntegError [Case 29]
+ * OTBN: recoverable and fatal alerts for the OpenTitan Big Number accelerator.
+ *  - FatalAlert [Case 30]
+ *  - RecovAlert [Case 30]
+ * OTP_CTRL: fatal macro, check, bus integrity errors, and primary OTP alerts
+ * (both fatal and recoverable).
+ *  - FatalMacroError [Case 31]
+ *  - FatalCheckError [Case 32]
+ *  - FatalBusIntegError [Case 33]
+ *  - FatalPrimOtpAlert [Case 34]
+ *  - RecovPrimOtpAlert [Case 35]
+ * PATTGEN: a fatal fault alert for the pattern generator.
+ *  - FatalFault [Case 36]
+ * PINMUX: a fatal fault alert.
+ *  - FatalFault [Case 37]
+ * PWM: a fatal fault alert.
+ *  - FatalFault [Case 38]
+ * PWRMGR: a fatal fault alert.
+ *  - FatalFault [Case 39]
+ * ROM_CTRL: a fatal alert.
+ *  - Fatal [Case 40]
+ * RSTMGR: fatal faults and consistency faults for the reset manager.
+ *  - FatalFault [Case 41]
+ *  - FatalCnstyFault [Case 42]
+ * RV_CORE_IBEX: recoverable and fatal software and hardware errors for the Ibex
+ * core.
+ *  - FatalSwErr [Case 43]
+ *  - RecovSwErr [Case 44]
+ *  - FatalHwErr [Case 45]
+ *  - RecovHwErr [Case 46]
+ * RV_PLIC: a fatal fault for the Platform-Level Interrupt Controller.
+ *  - FatalFault [Case 47]
+ * RV_TIMER: a fatal fault.
+ *  - FatalFault [Case 48]
+ * SENSOR_CTRL: recoverable and fatal sensor controller alerts.
+ *  - RecovAlert [Case 49]
+ *  - FatalAlert [Case 50]
+ * SPI_DEVICE: a fatal fault for the SPI device.
+ *  - FatalFault [Case 51]
+ * SPI_HOST: a fatal fault for the SPI host (SPI_HOST0 and SPI_HOST1).
+ *  - SPI_HOST0 FatalFault [Case 52]
+ *  - SPI_HOST1 FatalFault [Case 53]
+ * SRAM_CTRL: a fatal error for both main and retention SRAM controllers.
+ *  - Main SRAM FatalError [Case 54]
+ *  - Retention SRAM FatalError [Case 55]
+ * SYSRST_CTRL: a fatal fault for the system reset controller.
+ *  - FatalFault [Case 56]
+ * UART: a fatal fault (UART0, UART1, UART2, and UART3).
+ *  - UART0 FatalFault [Case 57]
+ *  - UART1 FatalFault [Case 58]
+ *  - UART2 FatalFault [Case 59]
+ *  - UART3 FatalFault [Case 60]
+ * USBDEV: a fatal fault for the USB device controller.
+ *  - FatalFault [Case 61]
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_alert_fi_trigger(ujson_t *uj);
+
+/**
+ * Alert FI sensor control trigger test.
+ *
+ * Writes to the ALERT_TRIG register in the sensor control.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_alert_fi_sensor_ctrl_trigger(ujson_t *uj);
+
+/**
+ * Alert FI ibex sw fatal write.
+ *
+ * Writes to the sw fatal fault register.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_alert_fi_ibex_sw_fatal(ujson_t *uj);
+
+/**
+ * Alert FI command handler.
+ *
+ * Command handler for the Alert FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_alert_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ALERT_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.c b/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.c
new file mode 100644
index 0000000000000..4e455b3105d47
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.c
@@ -0,0 +1,822 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/crypto_fi.h"
+
+#include "hw/ip/aes/model/aes_modes.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_aes.h"
+#include "sw/device/lib/dif/dif_hmac.h"
+#include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/hmac_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/crypto_fi_commands.h"
+
+#include "aes_regs.h"
+#include "hmac_regs.h"
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "kmac_regs.h"
+
+#define SHADOW_REG_ACCESS(shadow_reg_addr, tmp)    \
+  abs_mmio_write32_shadowed(shadow_reg_addr, tmp); \
+  tmp = abs_mmio_read32(shadow_reg_addr);
+
+#define SHADOW_REG_ACCESS_10(shadow_reg_addr, tmp) \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)          \
+  SHADOW_REG_ACCESS(shadow_reg_addr, tmp)
+
+enum {
+  /**
+   * Timeout for waiting that an AES operation has completed.
+   */
+  kAesWaitTimeout = 1000000,
+};
+
+static dif_aes_t aes;
+static dif_kmac_t kmac;
+static dif_hmac_t hmac;
+// Interface to Ibex.
+static dif_rv_core_ibex_t rv_core_ibex;
+
+/**
+ * KMAC test description.
+ */
+typedef struct kmac_test {
+  dif_kmac_mode_kmac_t mode;
+  dif_kmac_key_t key;
+
+  const char *message;
+  size_t message_len;
+
+  const char *customization_string;
+  size_t customization_string_len;
+
+  const uint32_t digest[16];
+  size_t digest_len;
+  bool digest_len_is_fixed;
+} kmac_test_t;
+
+/**
+ * A single KMAC example:
+ * https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/KMAC_samples.pdf
+ */
+static const kmac_test_t kKmacTestVector = {
+    .mode = kDifKmacModeKmacLen256,
+    .key =
+        (dif_kmac_key_t){
+            .share0 = {0x43424140, 0x47464544, 0x4b4a4948, 0x4f4e4f4c,
+                       0x53525150, 0x57565554, 0x5b5a5958, 0x5f5e5d5c},
+            .share1 = {0},
+            .length = kDifKmacKeyLen256,
+        },
+    .message =
+        "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+        "\x10\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f"
+        "\x20\x21\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f"
+        "\x30\x31\x32\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f"
+        "\x40\x41\x42\x43\x44\x45\x46\x47\x48\x49\x4a\x4b\x4c\x4d\x4e\x4f"
+        "\x50\x51\x52\x53\x54\x55\x56\x57\x58\x59\x5a\x5b\x5c\x5d\x5e\x5f"
+        "\x60\x61\x62\x63\x64\x65\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f"
+        "\x70\x71\x72\x73\x74\x75\x76\x77\x78\x79\x7a\x7b\x7c\x7d\x7e\x7f"
+        "\x80\x81\x82\x83\x84\x85\x86\x87\x88\x89\x8a\x8b\x8c\x8d\x8e\x8f"
+        "\x90\x91\x92\x93\x94\x95\x96\x97\x98\x99\x9a\x9b\x9c\x9d\x9e\x9f"
+        "\xa0\xa1\xa2\xa3\xa4\xa5\xa6\xa7\xa8\xa9\xaa\xab\xac\xad\xae\xaf"
+        "\xb0\xb1\xb2\xb3\xb4\xb5\xb6\xb7\xb8\xb9\xba\xbb\xbc\xbd\xbe\xbf"
+        "\xc0\xc1\xc2\xc3\xc4\xc5\xc6\xc7",
+    .message_len = 200,
+    .customization_string = "My Tagged Application",
+    .customization_string_len = 21,
+    .digest = {0x1c73bed5, 0x73d74e95, 0x59bb4628, 0xe3a8e3db, 0x7ae7830f,
+               0x5944ff4b, 0xb4c2f1f2, 0xceb8ebec, 0xc601ba67, 0x57b88a2e,
+               0x9b492d8d, 0x6727bbd1, 0x90117868, 0x6a300a02, 0x1d28de97,
+               0x5d3030cc},
+    .digest_len = 16,
+    .digest_len_is_fixed = false,
+};
+
+static dif_aes_transaction_t transaction = {
+    .operation = kDifAesOperationEncrypt,
+    .mode = kDifAesModeEcb,
+    .key_len = kDifAesKey128,
+    .manual_operation = kDifAesManualOperationManual,
+    .key_provider = kDifAesKeySoftwareProvided,
+    .mask_reseeding = kDifAesReseedPer8kBlock,
+    .reseed_on_key_change = false,
+    .force_masks = false,
+    .ctrl_aux_lock = false,
+};
+
+/**
+ * Spins until the AES hardware reports a specific status bit.
+ */
+static inline uint32_t aes_spin_until(uint32_t bit) {
+  while (true) {
+    uint32_t reg =
+        abs_mmio_read32(TOP_EARLGREY_AES_BASE_ADDR + AES_STATUS_REG_OFFSET);
+    if (bitfield_bit32_read(reg, AES_STATUS_ALERT_RECOV_CTRL_UPDATE_ERR_BIT) ||
+        bitfield_bit32_read(reg, AES_STATUS_ALERT_FATAL_FAULT_BIT)) {
+      return 1;
+    }
+    if (bitfield_bit32_read(reg, bit)) {
+      return 0;
+    }
+  }
+}
+
+status_t handle_crypto_fi_aes(ujson_t *uj) {
+  // Get the plaintext and key.
+  crypto_fi_aes_input_t uj_input;
+  TRY(ujson_deserialize_crypto_fi_aes_input_t(uj, &uj_input));
+  // Get the test mode.
+  crypto_fi_aes_mode_t uj_data;
+  TRY(ujson_deserialize_crypto_fi_aes_mode_t(uj, &uj_data));
+
+  // Copy in the plaintext and key
+  dif_aes_data_t aes_plaintext;
+  memcpy(aes_plaintext.data, uj_input.plaintext, sizeof(aes_plaintext.data));
+  dif_aes_key_share_t aes_key_shares;
+  // Mask the provided key.
+  for (int i = 0; i < 4; ++i) {
+    aes_key_shares.share1[i] = pentest_non_linear_layer(
+        pentest_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking)));
+    aes_key_shares.share0[i] =
+        *((uint32_t *)uj_input.key + i) ^ aes_key_shares.share1[i];
+  }
+  // Provide random shares for unused key bits.
+  for (size_t i = 4; i < 8; ++i) {
+    aes_key_shares.share1[i] =
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
+    aes_key_shares.share0[i] =
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
+  }
+
+  // Reset the AES
+  TRY(dif_aes_reset(&aes));
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Write the key into the AES block. Set and unset the trigger when
+  // key_trigger is true.
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kAesWaitTimeout);
+  if (uj_data.key_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_aes_start(&aes, &transaction, &aes_key_shares, NULL));
+  // Busy polling because AES_TESTUTILS_WAIT_FOR_STATUS seems to take longer
+  // (~100us) as expected.
+  while (!aes_testutils_get_status(&aes, kDifAesStatusInputReady))
+    ;
+  if (uj_data.key_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Write the plaintext into the AES block. Set and unset the trigger when
+  // plaintext_trigger is true.
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kAesWaitTimeout);
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusInputReady, true,
+                                kAesWaitTimeout);
+  if (uj_data.plaintext_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_aes_load_data(&aes, aes_plaintext));
+  if (uj_data.plaintext_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Start the encryption. Set and unset the trigger when encrypt_trigger is
+  // true.
+  if (uj_data.encrypt_trigger) {
+    pentest_set_trigger_high();
+  }
+  asm volatile(NOP30);
+  TRY(dif_aes_trigger(&aes, kDifAesTriggerStart));
+  // Busy polling because AES_TESTUTILS_WAIT_FOR_STATUS seems to take longer
+  // (~100us) as expected.
+  while (!aes_testutils_get_status(&aes, kDifAesStatusOutputValid))
+    ;
+  asm volatile(NOP30);
+  if (uj_data.encrypt_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Read the ciphertext. Set and unset the trigger when ciphertext_trigger is
+  // true.
+  dif_aes_data_t ciphertext;
+  if (uj_data.ciphertext_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_aes_read_output(&aes, &ciphertext));
+  if (uj_data.ciphertext_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send the ciphertext and the alerts back to the host.
+  crypto_fi_aes_ciphertext_t uj_output;
+  uj_output.err_status = codes;
+  memcpy(uj_output.ciphertext, ciphertext.data, 16);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_crypto_fi_aes_ciphertext_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralAes |
+                   kPentestPeripheralKmac | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralHmac,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Init the AES block.
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+
+  // Init the KMAC block.
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+
+  dif_kmac_config_t config = (dif_kmac_config_t){
+      .entropy_mode = kDifKmacEntropyModeSoftware,
+      .entropy_fast_process = kDifToggleDisabled,
+      .entropy_seed = {0xaa25b4bf, 0x48ce8fff, 0x5a78282a, 0x48465647,
+                       0x70410fef},
+      .message_big_endian = kDifToggleDisabled,
+      .output_big_endian = kDifToggleDisabled,
+      .sideload = kDifToggleDisabled,
+      .msg_mask = kDifToggleEnabled,
+  };
+
+  TRY(dif_kmac_configure(&kmac, config));
+
+  // Init the HMAC block.
+  mmio_region_t base_addr = mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR);
+  TRY(dif_hmac_init(base_addr, &hmac));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_kmac(ujson_t *uj) {
+  // Get the test mode.
+  crypto_fi_kmac_mode_t uj_data;
+  TRY(ujson_deserialize_crypto_fi_kmac_mode_t(uj, &uj_data));
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Configure and write key to the KMAC block. Set and unset the trigger when
+  // key_trigger is true.
+  dif_kmac_operation_state_t kmac_operation_state;
+  if (uj_data.key_trigger) {
+    pentest_set_trigger_high();
+  }
+
+  TRY(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                               kKmacTestVector.mode, 0, &kKmacTestVector.key,
+                               NULL));
+  if (uj_data.key_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Absorb. Set and unset the trigger when absorb_trigger is true.
+  if (uj_data.absorb_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_kmac_absorb(&kmac, &kmac_operation_state, kKmacTestVector.message,
+                      kKmacTestVector.message_len, NULL));
+  if (uj_data.absorb_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Static. Set and unset the trigger when static_trigger is true.
+  if (uj_data.static_trigger) {
+    pentest_set_trigger_high();
+  }
+  asm volatile(NOP30);
+  asm volatile(NOP30);
+  asm volatile(NOP30);
+  if (uj_data.static_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Squeeze. Set and unset the trigger when squeeze_trigger is true.
+  uint32_t digest[kKmacTestVector.digest_len];
+  if (uj_data.squeeze_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_kmac_squeeze(&kmac, &kmac_operation_state, digest,
+                       kKmacTestVector.digest_len, /*processed=*/NULL,
+                       /*capacity=*/NULL));
+  if (uj_data.squeeze_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // 2nd Squeeze. This shall enforce a permutation. Any injected fault will
+  // result in a completely different digest. Hence, allows for easy detection
+  // of an injected fault.
+  uint32_t digest_2nd[kKmacTestVector.digest_len];
+  TRY(dif_kmac_squeeze(&kmac, &kmac_operation_state, digest_2nd,
+                       kKmacTestVector.digest_len, /*processed=*/NULL,
+                       /*capacity=*/NULL));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  TRY(dif_kmac_end(&kmac, &kmac_operation_state));
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send the first 8 bytes of the digest and the alerts back to the host.
+  crypto_fi_kmac_digest_t uj_output;
+  uj_output.err_status = codes;
+  memcpy(uj_output.digest, (uint8_t *)digest, 8);
+  memcpy(uj_output.digest_2nd, (uint8_t *)digest_2nd, 8);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_crypto_fi_kmac_digest_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_kmac_state(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Configure and write key to the KMAC block.
+  dif_kmac_operation_state_t kmac_operation_state;
+  TRY(dif_kmac_mode_kmac_start(&kmac, &kmac_operation_state,
+                               kKmacTestVector.mode, 0, &kKmacTestVector.key,
+                               NULL));
+  // Absorb.
+  TRY(dif_kmac_absorb(&kmac, &kmac_operation_state, kKmacTestVector.message,
+                      kKmacTestVector.message_len, NULL));
+
+  // Squeeze. Set and unset the trigger when squeeze_trigger is true.
+  uint32_t digest[kKmacTestVector.digest_len];
+  TRY(dif_kmac_squeeze(&kmac, &kmac_operation_state, digest,
+                       kKmacTestVector.digest_len, /*processed=*/NULL,
+                       /*capacity=*/NULL));
+
+  // Static.
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  asm volatile(NOP30);
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send the Keccak state and the alerts back to the host.
+  crypto_fi_kmac_state_t uj_output;
+  // Read Keccak state shares
+  const mmio_region_t base = kmac.base_addr;
+  ptrdiff_t offset = KMAC_STATE_REG_OFFSET;
+  for (size_t i = 0; i < 200; i++) {
+    uj_output.share0[i] = mmio_region_read8(base, offset);
+    uj_output.share1[i] =
+        mmio_region_read8(base, offset + kDifKmacStateShareOffset);
+    offset += sizeof(uint8_t);
+  }
+  // Read error, digest, and alerts
+  uj_output.err_status = codes;
+  memcpy(uj_output.digest, (uint8_t *)digest, 8);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+
+  RESP_OK(ujson_serialize_crypto_fi_kmac_state_t, uj, &uj_output);
+
+  TRY(dif_kmac_end(&kmac, &kmac_operation_state));
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_hmac(ujson_t *uj) {
+  // Get the message and key.
+  crypto_fi_hmac_input_t uj_input;
+  TRY(ujson_deserialize_crypto_fi_hmac_input_t(uj, &uj_input));
+  // Get the test mode.
+  crypto_fi_hmac_mode_t uj_data;
+  TRY(ujson_deserialize_crypto_fi_hmac_mode_t(uj, &uj_data));
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+
+  // hash_mode 0 equals SHA256, 1 equals SHA384, and 2 equals SHA512
+  uint32_t digest_cfg_size = 0;
+  uint32_t key_cfg_size = 0;
+  uint32_t digest_word_size = 0;
+  uint32_t key_word_size = 0;
+  switch (uj_data.hash_mode) {
+    case 0:
+      digest_cfg_size = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256;
+      key_cfg_size = HMAC_CFG_KEY_LENGTH_VALUE_KEY_256;
+      digest_word_size = 8;
+      key_word_size = 8;
+      break;
+    case 1:
+      digest_cfg_size = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_384;
+      key_cfg_size = HMAC_CFG_KEY_LENGTH_VALUE_KEY_384;
+      digest_word_size = 12;
+      key_word_size = 12;
+      break;
+    case 2:
+      digest_cfg_size = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_512;
+      key_cfg_size = HMAC_CFG_KEY_LENGTH_VALUE_KEY_512;
+      digest_word_size = 16;
+      key_word_size = 16;
+      break;
+    default:
+      digest_cfg_size = HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_256;
+      key_cfg_size = HMAC_CFG_KEY_LENGTH_VALUE_KEY_256;
+      digest_word_size = 8;
+      key_word_size = 8;
+  }
+
+  if (uj_data.start_trigger) {
+    pentest_set_trigger_high();
+  }
+  // This mimics dif_hmac_mode_sha256_start, however, we need to include SHA384
+  // and SHA512 as well.
+  uint32_t reg = mmio_region_read32(hmac.base_addr, HMAC_CFG_REG_OFFSET);
+
+  // Set the byte-order of the input message and the digest.
+  reg = bitfield_bit32_write(reg, HMAC_CFG_ENDIAN_SWAP_BIT,
+                             uj_data.message_endianness_big);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_DIGEST_SWAP_BIT,
+                             uj_data.digest_endianness_big);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_KEY_SWAP_BIT,
+                             uj_data.key_endianness_big);
+
+  // Set HMAC to process in SHA2 or HMAC mode.
+  reg = bitfield_bit32_write(reg, HMAC_CFG_SHA_EN_BIT, true);
+  reg = bitfield_bit32_write(reg, HMAC_CFG_HMAC_EN_BIT, uj_data.enable_hmac);
+
+  // Set digest size.
+  reg =
+      bitfield_field32_write(reg, HMAC_CFG_DIGEST_SIZE_FIELD, digest_cfg_size);
+  // Set key size.
+  reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD, key_cfg_size);
+  // Set the key size (only matters for HMAC).
+  reg = bitfield_field32_write(reg, HMAC_CFG_KEY_LENGTH_FIELD, key_cfg_size);
+
+  // Write new CFG register value.
+  mmio_region_write32(hmac.base_addr, HMAC_CFG_REG_OFFSET, reg);
+
+  // Write the key.
+  if (uj_data.enable_hmac) {
+    for (size_t i = 0; i < key_word_size; ++i) {
+      abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_KEY_0_REG_OFFSET +
+                           i * sizeof(uint32_t),
+                       uj_input.key[i]);
+    }
+  }
+
+  // Begin HMAC operation.
+  mmio_region_nonatomic_set_bit32(hmac.base_addr, HMAC_CMD_REG_OFFSET,
+                                  HMAC_CMD_HASH_START_BIT);
+
+  if (uj_data.start_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_data.msg_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(hmac_testutils_push_message(&hmac, (char *)uj_input.message,
+                                  sizeof(uj_input.message)));
+  if (uj_data.msg_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_data.process_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_hmac_process(&hmac));
+  if (uj_data.process_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  uint32_t digest[CRYPTOFI_HMAC_CMD_MAX_TAG_WORDS];
+  memset(digest, 0, CRYPTOFI_HMAC_CMD_MAX_TAG_WORDS);
+  if (uj_data.finish_trigger) {
+    pentest_set_trigger_high();
+  }
+  // We again adapt the dif to allow for SHA384 and SHA512 outputs
+  uint32_t usec;
+  compute_hmac_testutils_finish_timeout_usec(&usec);
+  mmio_region_nonatomic_set_bit32(hmac.base_addr, HMAC_INTR_STATE_REG_OFFSET,
+                                  HMAC_INTR_STATE_HMAC_DONE_BIT);
+
+  // Read digest
+  for (size_t i = 0; i < digest_word_size; ++i) {
+    digest[digest_word_size - i - 1] = mmio_region_read32(
+        hmac.base_addr,
+        HMAC_DIGEST_0_REG_OFFSET + (ptrdiff_t)(i * sizeof(uint32_t)));
+  }
+
+  // Disable after done
+  uint32_t device_config =
+      mmio_region_read32(hmac.base_addr, HMAC_CFG_REG_OFFSET);
+  device_config =
+      bitfield_bit32_write(device_config, HMAC_CFG_SHA_EN_BIT, false);
+  device_config =
+      bitfield_bit32_write(device_config, HMAC_CFG_HMAC_EN_BIT, false);
+  device_config =
+      bitfield_field32_write(device_config, HMAC_CFG_DIGEST_SIZE_FIELD,
+                             HMAC_CFG_DIGEST_SIZE_VALUE_SHA2_NONE);
+  device_config =
+      bitfield_field32_write(device_config, HMAC_CFG_KEY_LENGTH_FIELD,
+                             HMAC_CFG_KEY_LENGTH_VALUE_KEY_256);
+
+  mmio_region_write32(hmac.base_addr, HMAC_CFG_REG_OFFSET, device_config);
+  if (uj_data.finish_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send the digest and the alerts back to the host.
+  crypto_fi_hmac_tag_t uj_output;
+  uj_output.err_status = codes;
+  memset(uj_output.tag, 0, sizeof(uj_output.tag));
+  memcpy(uj_output.tag, digest, digest_word_size * 4);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_crypto_fi_hmac_tag_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_shadow_reg_access(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  crypto_fi_test_result_mult_t uj_output;
+
+  // Values we want to write into the KMAC shadow registers during FI.
+  uint32_t ctrl_reg_kmac = KMAC_CFG_SHADOWED_REG_RESVAL;
+  ctrl_reg_kmac = bitfield_bit32_write(ctrl_reg_kmac,
+                                       KMAC_CFG_SHADOWED_MSG_ENDIANNESS_BIT, 1);
+  ctrl_reg_kmac = bitfield_bit32_write(
+      ctrl_reg_kmac, KMAC_CFG_SHADOWED_STATE_ENDIANNESS_BIT, 1);
+  ctrl_reg_kmac =
+      bitfield_bit32_write(ctrl_reg_kmac, KMAC_CFG_SHADOWED_SIDELOAD_BIT, 1);
+  ctrl_reg_kmac = bitfield_bit32_write(
+      ctrl_reg_kmac, KMAC_CFG_SHADOWED_ENTROPY_FAST_PROCESS_BIT, 0);
+  ctrl_reg_kmac =
+      bitfield_bit32_write(ctrl_reg_kmac, KMAC_CFG_SHADOWED_MSG_MASK_BIT, 1);
+  ctrl_reg_kmac = bitfield_bit32_write(ctrl_reg_kmac,
+                                       KMAC_CFG_SHADOWED_ENTROPY_READY_BIT, 0);
+  ctrl_reg_kmac = bitfield_bit32_write(
+      ctrl_reg_kmac, KMAC_CFG_SHADOWED_EN_UNSUPPORTED_MODESTRENGTH_BIT, 1);
+
+  uint32_t ctrl_reg_kmac_addr =
+      TOP_EARLGREY_KMAC_BASE_ADDR + KMAC_CFG_SHADOWED_REG_OFFSET;
+
+  pentest_set_trigger_high();
+  asm volatile(NOP10);
+  SHADOW_REG_ACCESS_10(ctrl_reg_kmac_addr, ctrl_reg_kmac)
+  SHADOW_REG_ACCESS_10(ctrl_reg_kmac_addr, ctrl_reg_kmac)
+  SHADOW_REG_ACCESS_10(ctrl_reg_kmac_addr, ctrl_reg_kmac)
+  asm volatile(NOP10);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Read back KMAC shadow registers.
+  uint32_t ctrl_reg_kmac_read = abs_mmio_read32(TOP_EARLGREY_KMAC_BASE_ADDR +
+                                                KMAC_CFG_SHADOWED_REG_OFFSET);
+  uj_output.result[0] = ctrl_reg_kmac_read;
+  // Zeroize unused
+  uj_output.result[1] = 0;
+  uj_output.result[2] = 0;
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_crypto_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi_shadow_reg_read(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  crypto_fi_test_result_mult_t uj_output;
+
+  // Initialize AES and KMAC with the default values.
+  uint32_t ctrl_reg_aes_init = AES_CTRL_SHADOWED_REG_RESVAL;
+  ctrl_reg_aes_init =
+      bitfield_field32_write(ctrl_reg_aes_init, AES_CTRL_SHADOWED_KEY_LEN_FIELD,
+                             AES_CTRL_SHADOWED_KEY_LEN_VALUE_AES_128);
+  ctrl_reg_aes_init =
+      bitfield_field32_write(ctrl_reg_aes_init, AES_CTRL_SHADOWED_MODE_FIELD,
+                             AES_CTRL_SHADOWED_MODE_VALUE_AES_ECB);
+  ctrl_reg_aes_init = bitfield_field32_write(
+      ctrl_reg_aes_init, AES_CTRL_SHADOWED_PRNG_RESEED_RATE_FIELD,
+      AES_CTRL_SHADOWED_PRNG_RESEED_RATE_VALUE_PER_64);
+  ctrl_reg_aes_init = bitfield_bit32_write(
+      ctrl_reg_aes_init, AES_CTRL_SHADOWED_SIDELOAD_BIT, true);
+  ctrl_reg_aes_init = bitfield_field32_write(
+      ctrl_reg_aes_init, AES_CTRL_SHADOWED_OPERATION_FIELD,
+      AES_CTRL_SHADOWED_OPERATION_VALUE_AES_DEC);
+  ctrl_reg_aes_init = bitfield_bit32_write(
+      ctrl_reg_aes_init, AES_CTRL_SHADOWED_MANUAL_OPERATION_BIT, true);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_AES_BASE_ADDR + AES_CTRL_SHADOWED_REG_OFFSET,
+      ctrl_reg_aes_init);
+  aes_spin_until(AES_STATUS_IDLE_BIT);
+
+  uint32_t ctrl_reg_kmac_init = KMAC_CFG_SHADOWED_REG_RESVAL;
+  ctrl_reg_kmac_init = bitfield_bit32_write(
+      ctrl_reg_kmac_init, KMAC_CFG_SHADOWED_MSG_ENDIANNESS_BIT, 0);
+  ctrl_reg_kmac_init = bitfield_bit32_write(
+      ctrl_reg_kmac_init, KMAC_CFG_SHADOWED_STATE_ENDIANNESS_BIT, 0);
+  ctrl_reg_kmac_init = bitfield_bit32_write(ctrl_reg_kmac_init,
+                                            KMAC_CFG_SHADOWED_SIDELOAD_BIT, 0);
+  ctrl_reg_kmac_init = bitfield_bit32_write(
+      ctrl_reg_kmac_init, KMAC_CFG_SHADOWED_ENTROPY_FAST_PROCESS_BIT, 1);
+  ctrl_reg_kmac_init = bitfield_bit32_write(ctrl_reg_kmac_init,
+                                            KMAC_CFG_SHADOWED_MSG_MASK_BIT, 0);
+  ctrl_reg_kmac_init = bitfield_bit32_write(
+      ctrl_reg_kmac_init, KMAC_CFG_SHADOWED_ENTROPY_READY_BIT, 1);
+  ctrl_reg_kmac_init = bitfield_bit32_write(
+      ctrl_reg_kmac_init, KMAC_CFG_SHADOWED_EN_UNSUPPORTED_MODESTRENGTH_BIT, 0);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_KMAC_BASE_ADDR + KMAC_CFG_SHADOWED_REG_OFFSET,
+      ctrl_reg_kmac_init);
+
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  uint32_t ctrl_reg_aes_read = abs_mmio_read32(TOP_EARLGREY_AES_BASE_ADDR +
+                                               AES_CTRL_SHADOWED_REG_OFFSET);
+  uint32_t ctrl_reg_kmac_read = abs_mmio_read32(TOP_EARLGREY_KMAC_BASE_ADDR +
+                                                KMAC_CFG_SHADOWED_REG_OFFSET);
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Compare AES and KMAC values.
+  uj_output.result[0] = 0;
+  if (ctrl_reg_aes_read != ctrl_reg_aes_init) {
+    uj_output.result[0] = ctrl_reg_aes_read;
+  }
+
+  uj_output.result[1] = 0;
+  if (ctrl_reg_kmac_read != ctrl_reg_kmac_init) {
+    uj_output.result[1] = ctrl_reg_kmac_read;
+  }
+
+  uj_output.result[2] = 0;
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_crypto_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_crypto_fi(ujson_t *uj) {
+  crypto_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_crypto_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kCryptoFiSubcommandAes:
+      return handle_crypto_fi_aes(uj);
+    case kCryptoFiSubcommandInit:
+      return handle_crypto_fi_init(uj);
+    case kCryptoFiSubcommandKmac:
+      return handle_crypto_fi_kmac(uj);
+    case kCryptoFiSubcommandKmacState:
+      return handle_crypto_fi_kmac_state(uj);
+    case kCryptoFiSubcommandHmac:
+      return handle_crypto_fi_hmac(uj);
+    case kCryptoFiSubcommandShadowRegAccess:
+      return handle_crypto_fi_shadow_reg_access(uj);
+    case kCryptoFiSubcommandShadowRegRead:
+      return handle_crypto_fi_shadow_reg_read(uj);
+    default:
+      LOG_ERROR("Unrecognized Crypto FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.h b/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.h
new file mode 100644
index 0000000000000..5258dd5fa7cfa
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/crypto_fi.h
@@ -0,0 +1,102 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTO_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTO_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * AES FI test.
+ *
+ * This test encrypts a static plaintext with a static key and returns the
+ * ciphertext over UART back to the host. The host can define, whether the
+ * trigger gets set and unset during(i) loading the key, (ii) loading the
+ * plaintext, (iii) encryption, or (iv) when reading back the ciphertext.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_aes(ujson_t *uj);
+
+/**
+ * Initializes the trigger and configures the device for the Crypto FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_init(ujson_t *uj);
+
+/**
+ * KMAC FI test.
+ *
+ * This test absorbs a static message with a static key and returns the
+ * digest over UART back to the host. The host can define, whether the
+ * trigger gets set and unset during(i) loading the key, (ii) absorbing, or
+ * (iii) squeezing.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_kmac(ujson_t *uj);
+
+/**
+ * KMAC State FI test.
+ *
+ * Try to inject a fault into the KMAC state.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_kmac_state(ujson_t *uj);
+
+/**
+ * HMAC FI test.
+ *
+ * Receive message & trigger configuration from host. Perform SHA2 or HMAC
+ * operation and return the digest back to the host.
+ *
+ * There are triggers over each interface function.
+ * The HMAC has the option to swap the endianness of its message, key, or
+ * digest, and it accepts its mode to be in SHA256, SHA384, or SHA512. Enable
+ * hmac means that HMAC is used, otherwise SHA2 is used.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_hmac(ujson_t *uj);
+
+/**
+ * Shadow Register Access FI test.
+ *
+ * In this test, faults are injected when accessing KMAC shadow registers.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_shadow_reg_access(ujson_t *uj);
+
+/**
+ * Shadow Register Read FI test.
+ *
+ * In this test, faults are injected when reading the AES and KMAC shadow
+ * registers.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi_shadow_reg_read(ujson_t *uj);
+
+/**
+ * Crypto FI command handler.
+ *
+ * Command handler for the Crypto FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_crypto_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTO_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.c b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.c
new file mode 100644
index 0000000000000..83d6324da6933
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.c
@@ -0,0 +1,579 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+status_t handle_cryptolib_fi_asym_rsa_enc(ujson_t *uj) {
+  cryptolib_fi_asym_rsa_enc_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_rsa_enc_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform an RSA encryption with hashing and padding options.
+  // You can give cfg a value such that the RSA generates its own private key.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_rsa_enc_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_rsa_enc_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_rsa_enc_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_rsa_sign(ujson_t *uj) {
+  cryptolib_fi_asym_rsa_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_rsa_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform an RSA signing with hashing and padding options.
+  // You can give cfg a value such that the RSA generates its own private key.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_rsa_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_rsa_sign_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_rsa_sign_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_rsa_verify(ujson_t *uj) {
+  cryptolib_fi_asym_rsa_verify_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_rsa_verify_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform an RSA verification with hashing and padding options.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_rsa_verify_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_rsa_verify_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_rsa_verify_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_prime(ujson_t *uj) {
+  cryptolib_fi_asym_prime_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_prime_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Generate a prime.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_prime_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memset(uj_output.prime, 0, RSA_CMD_MAX_MESSAGE_BYTES);
+  uj_output.prime_len = RSA_CMD_MAX_MESSAGE_BYTES;
+  uj_output.cfg = 0;
+  uj_output.status = 0;
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_prime_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p256_base_mul(ujson_t *uj) {
+  cryptolib_fi_asym_p256_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p256_base_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in P256.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_p256_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p256_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p256_point_mul(ujson_t *uj) {
+  cryptolib_fi_asym_p256_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p256_point_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in P256.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_fi_asym_p256_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p256_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p256_ecdh(ujson_t *uj) {
+  cryptolib_fi_asym_p256_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p256_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ecdh in P256.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p256_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p256_ecdh_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p256_ecdh_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p256_sign(ujson_t *uj) {
+  cryptolib_fi_asym_p256_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p256_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a P256 signature.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p256_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p256_sign_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p256_sign_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p256_verify(ujson_t *uj) {
+  cryptolib_fi_asym_p256_verify_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p256_verify_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a P256 verification.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p256_verify_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p256_verify_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p256_verify_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p384_base_mul(ujson_t *uj) {
+  cryptolib_fi_asym_p384_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p384_base_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in p384.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_p384_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p384_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p384_point_mul(ujson_t *uj) {
+  cryptolib_fi_asym_p384_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p384_point_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in p384.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_fi_asym_p384_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p384_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p384_ecdh(ujson_t *uj) {
+  cryptolib_fi_asym_p384_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p384_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ecdh in P384.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p384_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p384_ecdh_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p384_ecdh_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p384_sign(ujson_t *uj) {
+  cryptolib_fi_asym_p384_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p384_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a p384 signature.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p384_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p384_sign_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p384_sign_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_p384_verify(ujson_t *uj) {
+  cryptolib_fi_asym_p384_verify_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_p384_verify_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a p384 verification.
+  // Trigger are over the API calls.
+  cryptolib_fi_asym_p384_verify_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_p384_verify_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_p384_verify_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_secp256k1_base_mul(ujson_t *uj) {
+  cryptolib_fi_asym_secp256k1_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_secp256k1_base_mul_in_t(uj,
+                                                                  &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in secp256k1.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_secp256k1_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_secp256k1_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_secp256k1_point_mul(ujson_t *uj) {
+  cryptolib_fi_asym_secp256k1_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_secp256k1_point_mul_in_t(uj,
+                                                                   &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in secp256k1.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_fi_asym_secp256k1_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_secp256k1_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_secp256k1_ecdh(ujson_t *uj) {
+  cryptolib_fi_asym_secp256k1_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_secp256k1_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ecdh in secp256k1.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_secp256k1_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_secp256k1_ecdh_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_secp256k1_sign(ujson_t *uj) {
+  cryptolib_fi_asym_secp256k1_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_secp256k1_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a secp256k1 signature.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_secp256k1_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_secp256k1_sign_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_secp256k1_verify(ujson_t *uj) {
+  cryptolib_fi_asym_secp256k1_verify_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_secp256k1_verify_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a secp256k1 verification.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_secp256k1_verify_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.result = true;
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_secp256k1_verify_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_x25519_base_mul(ujson_t *uj) {
+  cryptolib_fi_asym_x25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_x25519_base_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in X25519.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_x25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_x25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_x25519_point_mul(ujson_t *uj) {
+  cryptolib_fi_asym_x25519_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_x25519_point_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in X25519.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_fi_asym_x25519_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_x25519_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_x25519_ecdh(ujson_t *uj) {
+  cryptolib_fi_asym_x25519_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_x25519_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ecdh in x25519.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_x25519_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_x25519_ecdh_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_ed25519_base_mul(ujson_t *uj) {
+  cryptolib_fi_asym_ed25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_ed25519_base_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in ED25519.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_ed25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_ed25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_ed25519_sign(ujson_t *uj) {
+  cryptolib_fi_asym_ed25519_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_ed25519_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a ED25519 signature.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_ed25519_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_ed25519_sign_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_ed25519_verify(ujson_t *uj) {
+  cryptolib_fi_asym_ed25519_verify_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_asym_ed25519_verify_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a ED25519 verification.
+  // Trigger are over the API calls.
+
+  cryptolib_fi_asym_ed25519_verify_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.result = true;
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_asym_ed25519_verify_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  /////////////// STUB START ///////////////
+  // Add things like versioning.
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_asym(ujson_t *uj) {
+  cryptolib_fi_asym_subcommand_t cmd;
+  TRY(ujson_deserialize_cryptolib_fi_asym_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kCryptoLibFiAsymSubcommandRsaEnc:
+      return handle_cryptolib_fi_asym_rsa_enc(uj);
+    case kCryptoLibFiAsymSubcommandRsaSign:
+      return handle_cryptolib_fi_asym_rsa_sign(uj);
+    case kCryptoLibFiAsymSubcommandRsaVerify:
+      return handle_cryptolib_fi_asym_rsa_verify(uj);
+    case kCryptoLibFiAsymSubcommandPrime:
+      return handle_cryptolib_fi_asym_prime(uj);
+    case kCryptoLibFiAsymSubcommandP256BaseMul:
+      return handle_cryptolib_fi_asym_p256_base_mul(uj);
+    case kCryptoLibFiAsymSubcommandP256PointMul:
+      return handle_cryptolib_fi_asym_p256_point_mul(uj);
+    case kCryptoLibFiAsymSubcommandP256Ecdh:
+      return handle_cryptolib_fi_asym_p256_ecdh(uj);
+    case kCryptoLibFiAsymSubcommandP256Sign:
+      return handle_cryptolib_fi_asym_p256_sign(uj);
+    case kCryptoLibFiAsymSubcommandP256Verify:
+      return handle_cryptolib_fi_asym_p256_verify(uj);
+    case kCryptoLibFiAsymSubcommandP384BaseMul:
+      return handle_cryptolib_fi_asym_p384_base_mul(uj);
+    case kCryptoLibFiAsymSubcommandP384PointMul:
+      return handle_cryptolib_fi_asym_p384_point_mul(uj);
+    case kCryptoLibFiAsymSubcommandP384Ecdh:
+      return handle_cryptolib_fi_asym_p384_ecdh(uj);
+    case kCryptoLibFiAsymSubcommandP384Sign:
+      return handle_cryptolib_fi_asym_p384_sign(uj);
+    case kCryptoLibFiAsymSubcommandP384Verify:
+      return handle_cryptolib_fi_asym_p384_verify(uj);
+    case kCryptoLibFiAsymSubcommandSecp256k1BaseMul:
+      return handle_cryptolib_fi_asym_secp256k1_base_mul(uj);
+    case kCryptoLibFiAsymSubcommandSecp256k1PointMul:
+      return handle_cryptolib_fi_asym_secp256k1_point_mul(uj);
+    case kCryptoLibFiAsymSubcommandSecp256k1Ecdh:
+      return handle_cryptolib_fi_asym_secp256k1_ecdh(uj);
+    case kCryptoLibFiAsymSubcommandSecp256k1Sign:
+      return handle_cryptolib_fi_asym_secp256k1_sign(uj);
+    case kCryptoLibFiAsymSubcommandSecp256k1Verify:
+      return handle_cryptolib_fi_asym_secp256k1_verify(uj);
+    case kCryptoLibFiAsymSubcommandX25519BaseMul:
+      return handle_cryptolib_fi_asym_x25519_base_mul(uj);
+    case kCryptoLibFiAsymSubcommandX25519PointMul:
+      return handle_cryptolib_fi_asym_x25519_point_mul(uj);
+    case kCryptoLibFiAsymSubcommandX25519Ecdh:
+      return handle_cryptolib_fi_asym_x25519_ecdh(uj);
+    case kCryptoLibFiAsymSubcommandEd25519BaseMul:
+      return handle_cryptolib_fi_asym_ed25519_base_mul(uj);
+    case kCryptoLibFiAsymSubcommandEd25519Sign:
+      return handle_cryptolib_fi_asym_ed25519_sign(uj);
+    case kCryptoLibFiAsymSubcommandEd25519Verify:
+      return handle_cryptolib_fi_asym_ed25519_verify(uj);
+    case kCryptoLibFiAsymSubcommandInit:
+      return handle_cryptolib_fi_asym_init(uj);
+    default:
+      LOG_ERROR("Unrecognized CryptoLib FI ASYM subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h
new file mode 100644
index 0000000000000..0293d7d62ecff
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h
@@ -0,0 +1,315 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * The cryptolib fi rsa enc handler.
+ *
+ * This command encrypts or decrypts using an RSA call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_rsa_enc(ujson_t *uj);
+
+/**
+ * The cryptolib fi rsa sign handler.
+ *
+ * This command signs using an RSA call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_rsa_sign(ujson_t *uj);
+
+/**
+ * The cryptolib fi rsa verify handler.
+ *
+ * This command verifies using an RSA call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_rsa_verify(ujson_t *uj);
+
+/**
+ * The cryptolib fi drbg handler.
+ *
+ * This command generates a prime.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_prime(ujson_t *uj);
+
+/**
+ * The cryptolib fi p256 base mul handler.
+ *
+ * This command performs a multiplication between a scalar and the base point.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p256_base_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi p256 point mul handler.
+ *
+ * This command performs a multiplication between a scalar and a chosen point.
+ * It takes two scalars, the Bob scalar is multiplied by the base point and then
+ * multiplied by Alice's scalar.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p256_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi p256 sign handler.
+ *
+ * This command signs on p256.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p256_sign(ujson_t *uj);
+
+/**
+ * The cryptolib fi p256 verify handler.
+ *
+ * This command verifies a signature for p256.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p256_verify(ujson_t *uj);
+
+/**
+ * The cryptolib fi p384 base mul handler.
+ *
+ * This command performs a multiplication between a scalar and the base point.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p384_base_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi p384 point mul handler.
+ *
+ * This command performs a multiplication between a scalar and a chosen point.
+ * It takes two scalars, the Bob scalar is multiplied by the base point and then
+ * multiplied by Alice's scalar.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p384_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi p384 sign handler.
+ *
+ * This command signs on p384.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p384_sign(ujson_t *uj);
+
+/**
+ * The cryptolib fi p384 verify handler.
+ *
+ * This command verifies a signature for p384.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_p384_verify(ujson_t *uj);
+
+/**
+ * The cryptolib fi secp256k1 base mul handler.
+ *
+ * This command performs a multiplication between a scalar and the base point.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_secp256k1_base_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi secp256k1 point mul handler.
+ *
+ * This command performs a multiplication between a scalar and a chosen point.
+ * It takes two scalars, the Bob scalar is multiplied by the base point and then
+ * multiplied by Alice's scalar.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_secp256k1_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi secp256k1 sign handler.
+ *
+ * This command signs on secp256k1.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_secp256k1_sign(ujson_t *uj);
+
+/**
+ * The cryptolib fi secp256k1 verify handler.
+ *
+ * This command verifies a signature for secp256k1.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_secp256k1_verify(ujson_t *uj);
+
+/**
+ * The cryptolib fi x25519 base mul handler.
+ *
+ * This command performs a multiplication between a scalar and the base point.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_x25519_base_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi x25519 point mul handler.
+ *
+ * This command performs a multiplication between a scalar and a chosen point.
+ * It takes two scalars, the Bob scalar is multiplied by the base point and then
+ * multiplied by Alice's scalar.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_x25519_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi ed25519 base mul handler.
+ *
+ * This command performs a multiplication between a scalar and the base point.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_ed25519_base_mul(ujson_t *uj);
+
+/**
+ * The cryptolib fi ed25519 sign handler.
+ *
+ * This command signs on ed25519.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_ed25519_sign(ujson_t *uj);
+
+/**
+ * The cryptolib fi ed25519 verify handler.
+ *
+ * This command verifies a signature for ed25519.
+ *
+ * See cryptolib_fi_asym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_ed25519_verify(ujson_t *uj);
+
+/**
+ * Initialize CryptoLib command handler.
+ *
+ * This command is designed to setup the CryptoLib FI firmware.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym_init(ujson_t *uj);
+
+/**
+ * CryptoLib FI command handler.
+ *
+ * Command handler for the CryptoLib FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_asym(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.c b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.c
new file mode 100644
index 0000000000000..86ddfa6f976de
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.c
@@ -0,0 +1,1029 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.h"
+
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+#include "sw/device/lib/crypto/impl/ecc/p384.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/cryptolib_asym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h"
+
+// OAEP label for testing.
+static const unsigned char kTestLabel[] = "Test label.";
+static const size_t kTestLabelLen = sizeof(kTestLabel) - 1;
+
+status_t cryptolib_fi_rsa_enc_impl(cryptolib_fi_asym_rsa_enc_in_t uj_input,
+                                   cryptolib_fi_asym_rsa_enc_out_t *uj_output) {
+  size_t public_key_bytes;
+  size_t private_key_bytes;
+  size_t private_key_blob_bytes;
+  size_t num_words;
+  size_t num_bytes;
+  otcrypto_rsa_size_t rsa_size;
+  switch (uj_input.mode) {
+    case kPentestRsa2048:
+      public_key_bytes = kOtcryptoRsa2048PublicKeyBytes;
+      private_key_bytes = kOtcryptoRsa2048PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa2048PrivateKeyblobBytes;
+      num_words = kPentestRsa2048NumWords;
+      num_bytes = kPentestRsa2048NumBytes;
+      rsa_size = kOtcryptoRsaSize2048;
+      break;
+    case kPentestRsa3072:
+      public_key_bytes = kOtcryptoRsa3072PublicKeyBytes;
+      private_key_bytes = kOtcryptoRsa3072PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa3072PrivateKeyblobBytes;
+      num_words = kPentestRsa3072NumWords;
+      num_bytes = kPentestRsa3072NumBytes;
+      rsa_size = kOtcryptoRsaSize3072;
+      break;
+    case kPentestRsa4096:
+      public_key_bytes = kOtcryptoRsa4096PublicKeyBytes;
+      private_key_bytes = kOtcryptoRsa4096PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa4096PrivateKeyblobBytes;
+      num_words = kPentestRsa4096NumWords;
+      num_bytes = kPentestRsa4096NumBytes;
+      rsa_size = kOtcryptoRsaSize4096;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA mode: %d", uj_input.mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Sanity check inputs.
+  TRY_CHECK(num_bytes == uj_input.n_len);
+
+  otcrypto_hash_mode_t hash_mode;
+  size_t hash_digest_bytes;
+  switch (uj_input.hashing) {
+    case kPentestRsaHashmodeSha256:
+      hash_mode = kOtcryptoHashModeSha256;
+      hash_digest_bytes = kPentestSha256DigestBytes;
+      break;
+    case kPentestRsaHashmodeSha384:
+      hash_mode = kOtcryptoHashModeSha384;
+      hash_digest_bytes = kPentestSha384DigestBytes;
+      break;
+    case kPentestRsaHashmodeSha512:
+      hash_mode = kOtcryptoHashModeSha512;
+      hash_digest_bytes = kPentestSha512DigestBytes;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA hash mode: %d", uj_input.hashing);
+      return INVALID_ARGUMENT();
+  }
+
+  if (uj_input.padding != 0) {
+    LOG_ERROR("Only padding = 0 (OAEP) is supported.");
+    return INVALID_ARGUMENT();
+  }
+
+  // Create the modulus N buffer.
+  uint32_t n_buf[kPentestRsaMaxNWords];
+  memset(n_buf, 0, sizeof(n_buf));
+  memcpy(n_buf, uj_input.n, num_bytes);
+
+  otcrypto_const_word32_buf_t modulus = {
+      .data = n_buf,
+      .len = num_words,
+  };
+
+  // Create label.
+  otcrypto_const_byte_buf_t label_buf = {.data = kTestLabel,
+                                         .len = kTestLabelLen};
+
+  if (uj_input.op_enc) {
+    // Encryption.
+    uint32_t public_key_data[ceil_div(public_key_bytes, sizeof(uint32_t))];
+
+    // Construct the public key.
+    otcrypto_unblinded_key_t public_key = {
+        .key_mode = kOtcryptoKeyModeRsaEncryptOaep,
+        .key_length = public_key_bytes,
+        .key = public_key_data,
+    };
+    TRY(otcrypto_rsa_public_key_construct(rsa_size, modulus, &public_key));
+
+    // Create input message.
+    uint8_t msg_buf[num_words];
+    memcpy(msg_buf, uj_input.data, uj_input.data_len);
+    otcrypto_const_byte_buf_t input_message = {
+        .len = uj_input.data_len,
+        .data = msg_buf,
+    };
+
+    // Output buffer.
+    uint32_t ciphertext_buf[kPentestRsaMaxMsgWords];
+    otcrypto_word32_buf_t ciphertext = {
+        .data = ciphertext_buf,
+        .len = num_words,
+    };
+
+    // Trigger window.
+    if (uj_input.trigger & kPentestTrigger1) {
+      pentest_set_trigger_high();
+    }
+    otcrypto_status_t status_out = otcrypto_rsa_encrypt(
+        &public_key, hash_mode, input_message, label_buf, ciphertext);
+    if (uj_input.trigger & kPentestTrigger1) {
+      pentest_set_trigger_low();
+    }
+
+    // Return data back to host.
+    uj_output->data_len = num_bytes;
+    uj_output->cfg = 0;
+    uj_output->status = (size_t)status_out.value;
+    memset(uj_output->data, 0, RSA_CMD_MAX_MESSAGE_BYTES);
+    memcpy(uj_output->data, ciphertext_buf, uj_output->data_len);
+    // Return received n and d back to host.
+    uj_output->n_len = uj_input.n_len;
+    memset(uj_output->n, 0, RSA_CMD_MAX_N_BYTES);
+    memcpy(uj_output->n, uj_input.n, uj_input.n_len);
+    memset(uj_output->d, 0, RSA_CMD_MAX_N_BYTES);
+    memcpy(uj_output->d, uj_input.d, uj_input.n_len);
+  } else {
+    // Decryption.
+
+    // Create two shares for the private exponent (second share is all-zero).
+    uint32_t d_buf[kPentestRsaMaxDWords];
+    memset(d_buf, 0, sizeof(d_buf));
+    memcpy(d_buf, uj_input.d, num_bytes);
+
+    otcrypto_const_word32_buf_t d_share0 = {
+        .data = d_buf,
+        .len = num_words,
+    };
+    uint32_t share1[kPentestRsaMaxDWords] = {0};
+    otcrypto_const_word32_buf_t d_share1 = {
+        .data = share1,
+        .len = num_words,
+    };
+
+    // Construct the private key.
+    otcrypto_key_config_t private_key_config = {
+        .version = kOtcryptoLibVersion1,
+        .key_mode = kOtcryptoKeyModeRsaEncryptOaep,
+        .key_length = private_key_bytes,
+        .hw_backed = kHardenedBoolFalse,
+        .security_level = kOtcryptoKeySecurityLevelLow,
+    };
+    size_t keyblob_words = ceil_div(private_key_blob_bytes, sizeof(uint32_t));
+    uint32_t keyblob[keyblob_words];
+    otcrypto_blinded_key_t private_key = {
+        .config = private_key_config,
+        .keyblob = keyblob,
+        .keyblob_length = private_key_blob_bytes,
+    };
+
+    // Trigger window.
+    if (uj_input.trigger & kPentestTrigger1) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_rsa_private_key_from_exponents(rsa_size, modulus, d_share0,
+                                                d_share1, &private_key));
+    if (uj_input.trigger & kPentestTrigger1) {
+      pentest_set_trigger_low();
+    }
+
+    uint32_t ciphertext_buf[num_words];
+    memset(ciphertext_buf, 0, sizeof(ciphertext_buf));
+    memcpy(ciphertext_buf, uj_input.data, uj_input.data_len);
+
+    otcrypto_const_word32_buf_t ciphertext = {
+        .len = num_words,
+        .data = ciphertext_buf,
+    };
+
+    // Create output buffer for the plaintext.
+    size_t kMaxPlaintextBytes = num_bytes - 2 * hash_digest_bytes - 2;
+    uint8_t plaintext_buf[kMaxPlaintextBytes];
+    otcrypto_byte_buf_t plaintext = {
+        .data = plaintext_buf,
+        .len = kMaxPlaintextBytes,
+    };
+
+    size_t msg_len;
+    // Trigger window.
+    if (uj_input.trigger & kPentestTrigger2) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_rsa_decrypt(&private_key, hash_mode, ciphertext, label_buf,
+                             plaintext, &msg_len));
+    if (uj_input.trigger & kPentestTrigger2) {
+      pentest_set_trigger_low();
+    }
+
+    // Return data back to host.
+    uj_output->data_len = msg_len;
+    uj_output->cfg = 0;
+    memset(uj_output->data, 0, RSA_CMD_MAX_MESSAGE_BYTES);
+    memcpy(uj_output->data, plaintext_buf, msg_len);
+    // Return received n and d back to host.
+    uj_output->n_len = uj_input.n_len;
+    memset(uj_output->n, 0, RSA_CMD_MAX_N_BYTES);
+    memcpy(uj_output->n, uj_input.n, uj_input.n_len);
+    memset(uj_output->d, 0, RSA_CMD_MAX_N_BYTES);
+    memcpy(uj_output->d, uj_input.d, uj_input.n_len);
+  }
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_rsa_sign_impl(
+    cryptolib_fi_asym_rsa_sign_in_t uj_input,
+    cryptolib_fi_asym_rsa_sign_out_t *uj_output) {
+  size_t private_key_bytes;
+  size_t private_key_blob_bytes;
+  size_t num_words;
+  otcrypto_rsa_size_t rsa_size;
+  switch (uj_input.n_len) {
+    case kPentestRsa2048NumBytes:
+      private_key_bytes = kOtcryptoRsa2048PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa2048PrivateKeyblobBytes;
+      num_words = kPentestRsa2048NumWords;
+      rsa_size = kOtcryptoRsaSize2048;
+      break;
+    case kPentestRsa3072NumBytes:
+      private_key_bytes = kOtcryptoRsa3072PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa3072PrivateKeyblobBytes;
+      num_words = kPentestRsa3072NumWords;
+      rsa_size = kOtcryptoRsaSize3072;
+      break;
+    case kPentestRsa4096NumBytes:
+      private_key_bytes = kOtcryptoRsa4096PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa4096PrivateKeyblobBytes;
+      num_words = kPentestRsa4096NumWords;
+      rsa_size = kOtcryptoRsaSize4096;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA mode: %d", uj_input.n_len);
+      return INVALID_ARGUMENT();
+  }
+
+  otcrypto_key_mode_t key_mode;
+  otcrypto_rsa_padding_t padding_mode;
+  switch (uj_input.padding) {
+    case kPentestRsaPaddingPkcs:
+      padding_mode = kOtcryptoRsaPaddingPkcs;
+      key_mode = kOtcryptoKeyModeRsaSignPkcs;
+      break;
+    case kPentestRsaPaddingPss:
+      padding_mode = kOtcryptoRsaPaddingPss;
+      key_mode = kOtcryptoKeyModeRsaSignPss;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA padding mode: %d", uj_input.padding);
+      return INVALID_ARGUMENT();
+  };
+
+  otcrypto_hash_mode_t hash_mode;
+  size_t hash_digest_words;
+  switch (uj_input.hashing) {
+    case kPentestRsaHashmodeSha256:
+      hash_mode = kOtcryptoHashModeSha256;
+      hash_digest_words = kPentestSha256DigestWords;
+      break;
+    case kPentestRsaHashmodeSha384:
+      hash_mode = kOtcryptoHashModeSha384;
+      hash_digest_words = kPentestSha384DigestWords;
+      break;
+    case kPentestRsaHashmodeSha512:
+      hash_mode = kOtcryptoHashModeSha512;
+      hash_digest_words = kPentestSha512DigestWords;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA hash mode: %d", uj_input.hashing);
+      return INVALID_ARGUMENT();
+  }
+  // Create two shares for the private exponent (second share is all-zero).
+  uint32_t d_buf[kPentestRsaMaxDWords];
+  memset(d_buf, 0, sizeof(d_buf));
+  memcpy(d_buf, uj_input.d, uj_input.n_len);
+
+  otcrypto_const_word32_buf_t d_share0 = {
+      .data = d_buf,
+      .len = num_words,
+  };
+  uint32_t share1[kPentestRsaMaxDWords] = {0};
+  otcrypto_const_word32_buf_t d_share1 = {
+      .data = share1,
+      .len = num_words,
+  };
+
+  // Construct the private key.
+  otcrypto_key_config_t private_key_config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = private_key_bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+  size_t keyblob_words = ceil_div(private_key_blob_bytes, sizeof(uint32_t));
+  uint32_t keyblob[keyblob_words];
+  otcrypto_blinded_key_t private_key = {
+      .config = private_key_config,
+      .keyblob = keyblob,
+      .keyblob_length = private_key_blob_bytes,
+  };
+
+  // Create the modulus N buffer.
+  uint32_t n_buf[kPentestRsaMaxNWords];
+  memset(n_buf, 0, sizeof(n_buf));
+  memcpy(n_buf, uj_input.n, uj_input.n_len);
+
+  otcrypto_const_word32_buf_t modulus = {
+      .data = n_buf,
+      .len = num_words,
+  };
+
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_private_key_from_exponents(rsa_size, modulus, d_share0,
+                                              d_share1, &private_key));
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  // Copy the message into the buffer.
+  uint8_t msg[uj_input.data_len];
+  memcpy(msg, uj_input.data, uj_input.data_len);
+  otcrypto_const_byte_buf_t msg_buf = {
+      .len = uj_input.data_len,
+      .data = msg,
+  };
+
+  // Buffer to store the digest.
+  uint32_t msg_digest_data[hash_digest_words];
+  otcrypto_hash_digest_t msg_digest = {
+      .data = msg_digest_data,
+      .len = ARRAYSIZE(msg_digest_data),
+      .mode = hash_mode,
+  };
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  // Hash the message.
+  if (hash_mode == kOtcryptoHashModeSha256) {
+    TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
+  } else if (hash_mode == kOtcryptoHashModeSha384) {
+    TRY(otcrypto_sha2_384(msg_buf, &msg_digest));
+  } else {
+    TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
+  }
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  uint32_t sig[kPentestRsaMaxMsgWords];
+  otcrypto_word32_buf_t sig_buf = {
+      .data = sig,
+      .len = num_words,
+  };
+
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger3) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_sign(&private_key, msg_digest, padding_mode, sig_buf));
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger3) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->sig_len = uj_input.n_len;
+  uj_output->cfg = 0;
+  memset(uj_output->sig, 0, RSA_CMD_MAX_SIGNATURE_BYTES);
+  memcpy(uj_output->sig, sig, uj_output->sig_len);
+  // Return received n and d back to host.
+  uj_output->n_len = uj_input.n_len;
+  memset(uj_output->n, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(uj_output->n, uj_input.n, uj_input.n_len);
+  memset(uj_output->d, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(uj_output->d, uj_input.d, uj_input.n_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_rsa_verify_impl(
+    cryptolib_fi_asym_rsa_verify_in_t uj_input,
+    cryptolib_fi_asym_rsa_verify_out_t *uj_output) {
+  size_t public_key_bytes;
+  size_t num_words;
+  otcrypto_rsa_size_t rsa_size;
+  switch (uj_input.n_len) {
+    case kPentestRsa2048NumBytes:
+      public_key_bytes = kOtcryptoRsa2048PublicKeyBytes;
+      num_words = kPentestRsa2048NumWords;
+      rsa_size = kOtcryptoRsaSize2048;
+      break;
+    case kPentestRsa3072NumBytes:
+      public_key_bytes = kOtcryptoRsa3072PublicKeyBytes;
+      num_words = kPentestRsa3072NumWords;
+      rsa_size = kOtcryptoRsaSize3072;
+      break;
+    case kPentestRsa4096NumBytes:
+      public_key_bytes = kOtcryptoRsa4096PublicKeyBytes;
+      num_words = kPentestRsa4096NumWords;
+      rsa_size = kOtcryptoRsaSize4096;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA mode: %d", uj_input.n_len);
+      return INVALID_ARGUMENT();
+  }
+
+  otcrypto_hash_mode_t hash_mode;
+  size_t hash_digest_words;
+  switch (uj_input.hashing) {
+    case kPentestRsaHashmodeSha256:
+      hash_mode = kOtcryptoHashModeSha256;
+      hash_digest_words = kPentestSha256DigestWords;
+      break;
+    case kPentestRsaHashmodeSha384:
+      hash_mode = kOtcryptoHashModeSha384;
+      hash_digest_words = kPentestSha384DigestWords;
+      break;
+    case kPentestRsaHashmodeSha512:
+      hash_mode = kOtcryptoHashModeSha512;
+      hash_digest_words = kPentestSha512DigestWords;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA hash mode: %d", uj_input.hashing);
+      return INVALID_ARGUMENT();
+  }
+
+  otcrypto_key_mode_t key_mode;
+  otcrypto_rsa_padding_t padding_mode;
+  switch (uj_input.padding) {
+    case kPentestRsaPaddingPkcs:
+      padding_mode = kOtcryptoRsaPaddingPkcs;
+      key_mode = kOtcryptoKeyModeRsaSignPkcs;
+      break;
+    case kPentestRsaPaddingPss:
+      padding_mode = kOtcryptoRsaPaddingPss;
+      key_mode = kOtcryptoKeyModeRsaSignPss;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA padding mode: %d", uj_input.padding);
+      return INVALID_ARGUMENT();
+  };
+
+  // Create the modulus N buffer.
+  uint32_t n_buf[kPentestRsaMaxNWords];
+  memset(n_buf, 0, sizeof(n_buf));
+  memcpy(n_buf, uj_input.n, uj_input.n_len);
+
+  otcrypto_const_word32_buf_t modulus = {
+      .data = n_buf,
+      .len = num_words,
+  };
+
+  // Create the public key.
+  uint32_t public_key_data[ceil_div(public_key_bytes, sizeof(uint32_t))];
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = key_mode,
+      .key_length = public_key_bytes,
+      .key = public_key_data,
+  };
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_public_key_construct(rsa_size, modulus, &public_key));
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  // Create the signature buffer.
+  uint32_t sig_buf[num_words];
+  memset(sig_buf, 0, sizeof(sig_buf));
+  memcpy(sig_buf, uj_input.sig, uj_input.sig_len);
+
+  otcrypto_const_word32_buf_t sig = {
+      .data = sig_buf,
+      .len = num_words,
+  };
+
+  // Copy the message into the buffer.
+  uint8_t msg[uj_input.data_len];
+  memcpy(msg, uj_input.data, uj_input.data_len);
+  otcrypto_const_byte_buf_t msg_buf = {
+      .len = uj_input.data_len,
+      .data = msg,
+  };
+
+  // Buffer to store the digest.
+  uint32_t msg_digest_data[hash_digest_words];
+  otcrypto_hash_digest_t msg_digest = {
+      .data = msg_digest_data,
+      .len = ARRAYSIZE(msg_digest_data),
+      .mode = hash_mode,
+  };
+
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  // Hash the message.
+  if (hash_mode == kOtcryptoHashModeSha256) {
+    TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
+  } else if (hash_mode == kOtcryptoHashModeSha384) {
+    TRY(otcrypto_sha2_384(msg_buf, &msg_digest));
+  } else {
+    TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
+  }
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  hardened_bool_t verification_result;
+  // Trigger window.
+  if (uj_input.trigger & kPentestTrigger3) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_verify(&public_key, msg_digest, padding_mode, sig,
+                          &verification_result));
+  if (uj_input.trigger & kPentestTrigger3) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->result = true;
+  if (verification_result != kHardenedBoolTrue) {
+    uj_output->result = false;
+  }
+  uj_output->cfg = 0;
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p256_ecdh_impl(
+    cryptolib_fi_asym_p256_ecdh_in_t uj_input,
+    cryptolib_fi_asym_p256_ecdh_out_t *uj_output) {
+  // Construct the private key object.
+  uint32_t private_keyblob[kPentestP256MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, uj_input.private_key, P256_CMD_BYTES);
+  memcpy(private_keyblob + kPentestP256MaskedPrivateKeyWords, 0,
+         P256_CMD_BYTES);
+  otcrypto_blinded_key_t private_key = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP256,
+              .key_length = kPentestP256Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
+      .checksum = 0,
+  };
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Construct the public key object.
+  uint32_t public_key_buf[kPentestP256Words * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, uj_input.public_x, P256_CMD_BYTES);
+  memcpy(public_key_buf + kPentestP256Words, uj_input.public_y, P256_CMD_BYTES);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP256,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a destination for the shared secret.
+  uint32_t shared_secretblob[kPentestP256Words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kPentestP256Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
+  };
+
+  pentest_set_trigger_high();
+  TRY(otcrypto_ecdh_p256(&private_key, &public_key, &shared_secret));
+  pentest_set_trigger_low();
+
+  uint32_t share0[kPentestP256Words];
+  uint32_t share1[kPentestP256Words];
+  uint32_t ss[kPentestP256Words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < kPentestP256Words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->shared_key, 0, P256_CMD_BYTES);
+  memcpy(uj_output->shared_key, ss, P256_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p256_sign_impl(
+    cryptolib_fi_asym_p256_sign_in_t uj_input,
+    cryptolib_fi_asym_p256_sign_out_t *uj_output) {
+  static const otcrypto_key_config_t kP256PrivateKeyConfig = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
+      .key_length = kPentestP256Bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create the private key.
+  p256_masked_scalar_t private_key_masked;
+  otcrypto_blinded_key_t private_key = {
+      .config = kP256PrivateKeyConfig,
+      .keyblob_length = sizeof(private_key_masked),
+      .keyblob = (uint32_t *)&private_key_masked,
+  };
+  memset(private_key_masked.share0, 0, kP256MaskedScalarShareBytes);
+  memcpy(private_key_masked.share0, uj_input.scalar, kP256ScalarBytes);
+  memset(private_key_masked.share1, 0, kP256MaskedScalarShareBytes);
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Create the public key.
+  p256_point_t pub_p256;
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
+      .key_length = sizeof(p256_point_t),
+      .key = (uint32_t *)&pub_p256,
+  };
+  memset(pub_p256.x, 0, kP256CoordBytes);
+  memcpy(pub_p256.x, uj_input.pubx, P256_CMD_BYTES);
+  memset(pub_p256.y, 0, kP256CoordBytes);
+  memcpy(pub_p256.y, uj_input.puby, P256_CMD_BYTES);
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a key pair if requested.
+  // This will overwrite the private and public key above.
+  if (uj_input.cfg == 1) {
+    // Trigger window 0.
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_ecdsa_p256_keygen(&private_key, &public_key));
+    pentest_set_trigger_low();
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_low();
+    }
+  }
+
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP256Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P256_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha256,
+      .len = kPentestP256Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Set up the signature buffer.
+  uint32_t sig[kPentestP256Words * 2] = {0};
+  otcrypto_word32_buf_t signature_mut = {
+      .data = sig,
+      .len = ARRAYSIZE(sig),
+  };
+
+  // Trigger window 1.
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_high();
+  }
+  // Sign the message.
+  TRY(otcrypto_ecdsa_p256_sign_verify(&private_key, &public_key, message_digest,
+                                      signature_mut));
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->r, 0, P256_CMD_BYTES);
+  memset(uj_output->s, 0, P256_CMD_BYTES);
+  p256_ecdsa_signature_t *signature_p256 =
+      (p256_ecdsa_signature_t *)signature_mut.data;
+  memcpy(uj_output->r, signature_p256->r, kP256ScalarBytes);
+  memcpy(uj_output->s, signature_p256->s, kP256ScalarBytes);
+
+  // Return the public key.
+  p256_point_t *pub = (p256_point_t *)public_key.key;
+  memcpy(uj_output->pubx, pub->x, P256_CMD_BYTES);
+  memcpy(uj_output->puby, pub->y, P256_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p256_verify_impl(
+    cryptolib_fi_asym_p256_verify_in_t uj_input,
+    cryptolib_fi_asym_p256_verify_out_t *uj_output) {
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP256Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P256_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha256,
+      .len = kPentestP256Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Setup the public key buffer.
+  p256_point_t pub_p256;
+  memcpy(pub_p256.x, uj_input.pubx, P256_CMD_BYTES);
+  memcpy(pub_p256.y, uj_input.puby, P256_CMD_BYTES);
+
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
+      .key_length = sizeof(p256_point_t),
+      .key = (uint32_t *)&pub_p256,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Setup the signature buffer.
+  p256_ecdsa_signature_t signature_p256;
+  memcpy(signature_p256.r, uj_input.r, P256_CMD_BYTES);
+  memcpy(signature_p256.s, uj_input.s, P256_CMD_BYTES);
+
+  otcrypto_const_word32_buf_t signature = {
+      .len = kPentestP256Words * 2,
+      .data = (uint32_t *)&signature_p256,
+  };
+
+  hardened_bool_t verification_result = kHardenedBoolFalse;
+
+  pentest_set_trigger_high();
+  TRY(otcrypto_ecdsa_p256_verify(&public_key, message_digest, signature,
+                                 &verification_result));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  uj_output->result = true;
+  if (verification_result != kHardenedBoolTrue) {
+    uj_output->result = false;
+  }
+  uj_output->cfg = 0;
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p384_ecdh_impl(
+    cryptolib_fi_asym_p384_ecdh_in_t uj_input,
+    cryptolib_fi_asym_p384_ecdh_out_t *uj_output) {
+  // Construct the private key object.
+  uint32_t private_keyblob[kPentestP384MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, uj_input.private_key, P384_CMD_BYTES);
+  memcpy(private_keyblob + kPentestP384MaskedPrivateKeyWords, 0,
+         P384_CMD_BYTES);
+  otcrypto_blinded_key_t private_key = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP384,
+              .key_length = kPentestP384Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
+      .checksum = 0,
+  };
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Construct the public key object.
+  uint32_t public_key_buf[kPentestP384Words * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, uj_input.public_x, P384_CMD_BYTES);
+  memcpy(public_key_buf + kPentestP384Words, uj_input.public_y, P384_CMD_BYTES);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP384,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a destination for the shared secret.
+  uint32_t shared_secretblob[kPentestP384Words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kPentestP384Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
+  };
+
+  pentest_set_trigger_high();
+  TRY(otcrypto_ecdh_p384(&private_key, &public_key, &shared_secret));
+  pentest_set_trigger_low();
+
+  uint32_t share0[kPentestP384Words];
+  uint32_t share1[kPentestP384Words];
+  uint32_t ss[kPentestP384Words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < kPentestP384Words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->shared_key, 0, P384_CMD_BYTES);
+  memcpy(uj_output->shared_key, ss, P384_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p384_sign_impl(
+    cryptolib_fi_asym_p384_sign_in_t uj_input,
+    cryptolib_fi_asym_p384_sign_out_t *uj_output) {
+  static const otcrypto_key_config_t kP384PrivateKeyConfig = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
+      .key_length = kPentestP384Bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create the private key.
+  p384_masked_scalar_t private_key_masked;
+  otcrypto_blinded_key_t private_key = {
+      .config = kP384PrivateKeyConfig,
+      .keyblob_length = sizeof(private_key_masked),
+      .keyblob = (uint32_t *)&private_key_masked,
+  };
+  memset(private_key_masked.share0, 0, kP384MaskedScalarShareBytes);
+  memcpy(private_key_masked.share0, uj_input.scalar, kP384ScalarBytes);
+  memset(private_key_masked.share1, 0, kP384MaskedScalarShareBytes);
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Create the public key.
+  p384_point_t pub_p384;
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
+      .key_length = sizeof(p384_point_t),
+      .key = (uint32_t *)&pub_p384,
+  };
+  memset(pub_p384.x, 0, kP384CoordBytes);
+  memcpy(pub_p384.x, uj_input.pubx, P384_CMD_BYTES);
+  memset(pub_p384.y, 0, kP384CoordBytes);
+  memcpy(pub_p384.y, uj_input.puby, P384_CMD_BYTES);
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a key pair if requested.
+  // This will overwrite the private and public key above.
+  if (uj_input.cfg == 1) {
+    // Trigger window 0.
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_ecdsa_p384_keygen(&private_key, &public_key));
+    pentest_set_trigger_low();
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_low();
+    }
+  }
+
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP384Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P384_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha384,
+      .len = kPentestP384Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Set up the signature buffer.
+  uint32_t sig[kPentestP384Words * 2] = {0};
+  otcrypto_word32_buf_t signature_mut = {
+      .data = sig,
+      .len = ARRAYSIZE(sig),
+  };
+
+  // Trigger window 1.
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_ecdsa_p384_sign_verify(&private_key, &public_key, message_digest,
+                                      signature_mut));
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->r, 0, P384_CMD_BYTES);
+  memset(uj_output->s, 0, P384_CMD_BYTES);
+  p384_ecdsa_signature_t *signature_p384 =
+      (p384_ecdsa_signature_t *)signature_mut.data;
+  memcpy(uj_output->r, signature_p384->r, kP384ScalarBytes);
+  memcpy(uj_output->s, signature_p384->s, kP384ScalarBytes);
+
+  // Return the public key.
+  p384_point_t *pub = (p384_point_t *)public_key.key;
+  memcpy(uj_output->pubx, pub->x, P384_CMD_BYTES);
+  memcpy(uj_output->puby, pub->y, P384_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_p384_verify_impl(
+    cryptolib_fi_asym_p384_verify_in_t uj_input,
+    cryptolib_fi_asym_p384_verify_out_t *uj_output) {
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP384Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P384_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha384,
+      .len = kPentestP384Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Setup the public key buffer.
+  p384_point_t pub_p384;
+  memcpy(pub_p384.x, uj_input.pubx, P384_CMD_BYTES);
+  memcpy(pub_p384.y, uj_input.puby, P384_CMD_BYTES);
+
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
+      .key_length = sizeof(p384_point_t),
+      .key = (uint32_t *)&pub_p384,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Setup the signature buffer.
+  p384_ecdsa_signature_t signature_p384;
+  memcpy(signature_p384.r, uj_input.r, P384_CMD_BYTES);
+  memcpy(signature_p384.s, uj_input.s, P384_CMD_BYTES);
+
+  otcrypto_const_word32_buf_t signature = {
+      .len = kPentestP384Words * 2,
+      .data = (uint32_t *)&signature_p384,
+  };
+
+  hardened_bool_t verification_result = kHardenedBoolFalse;
+
+  pentest_set_trigger_high();
+  TRY(otcrypto_ecdsa_p384_verify(&public_key, message_digest, signature,
+                                 &verification_result));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  uj_output->result = true;
+  if (verification_result != kHardenedBoolTrue) {
+    uj_output->result = false;
+  }
+  uj_output->cfg = 0;
+
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.h b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.h
new file mode 100644
index 0000000000000..3df5805a0eed1
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym_impl.h
@@ -0,0 +1,110 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_IMPL_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_IMPL_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h"
+
+/**
+ * Wrapper to RSA ENC cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_rsa_enc_impl(cryptolib_fi_asym_rsa_enc_in_t uj_input,
+                                   cryptolib_fi_asym_rsa_enc_out_t *uj_output);
+
+/**
+ * Wrapper to RSA Sign cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_rsa_sign_impl(
+    cryptolib_fi_asym_rsa_sign_in_t uj_input,
+    cryptolib_fi_asym_rsa_sign_out_t *uj_output);
+
+/**
+ * Wrapper to RSA Verify cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_rsa_verify_impl(
+    cryptolib_fi_asym_rsa_verify_in_t uj_input,
+    cryptolib_fi_asym_rsa_verify_out_t *uj_output);
+
+/**
+ * Wrapper to ECDH in P256 cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p256_ecdh_impl(
+    cryptolib_fi_asym_p256_ecdh_in_t uj_input,
+    cryptolib_fi_asym_p256_ecdh_out_t *uj_output);
+
+/**
+ * Wrapper to P256 Sign cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p256_sign_impl(
+    cryptolib_fi_asym_p256_sign_in_t uj_input,
+    cryptolib_fi_asym_p256_sign_out_t *uj_output);
+
+/**
+ * Wrapper to P256 Verify cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p256_verify_impl(
+    cryptolib_fi_asym_p256_verify_in_t uj_input,
+    cryptolib_fi_asym_p256_verify_out_t *uj_output);
+
+/**
+ * Wrapper to ECDH in P384 cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p384_ecdh_impl(
+    cryptolib_fi_asym_p384_ecdh_in_t uj_input,
+    cryptolib_fi_asym_p384_ecdh_out_t *uj_output);
+
+/**
+ * Wrapper to P384 Sign cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p384_sign_impl(
+    cryptolib_fi_asym_p384_sign_in_t uj_input,
+    cryptolib_fi_asym_p384_sign_out_t *uj_output);
+
+/**
+ * Wrapper to P384 Verify cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_p384_verify_impl(
+    cryptolib_fi_asym_p384_verify_in_t uj_input,
+    cryptolib_fi_asym_p384_verify_out_t *uj_output);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_ASYM_IMPL_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.c b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.c
new file mode 100644
index 0000000000000..31e3887223d2e
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.c
@@ -0,0 +1,261 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+status_t handle_cryptolib_fi_sym_aes(ujson_t *uj) {
+  cryptolib_fi_sym_aes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_aes_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform an AES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // The total size of this test can be large due to all these options.
+  // Triggers are over the API calls.
+  cryptolib_fi_sym_aes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status = (size_t)cryptolib_fi_aes_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_aes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_cmac(ujson_t *uj) {
+  cryptolib_fi_sym_cmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_cmac_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a CMAC encryption.
+  // Verify the tag before sending the output.
+  // Triggers are over the API calls.
+
+  cryptolib_fi_sym_cmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_cmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_gcm(ujson_t *uj) {
+  cryptolib_fi_sym_gcm_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_gcm_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a GCM encryption with aad and generate a tag.
+  // Then, verify that tag again, before sending the output.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_gcm_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status = (size_t)cryptolib_fi_gcm_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_gcm_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_tdes(ujson_t *uj) {
+  cryptolib_fi_sym_tdes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_tdes_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a TDES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // Triggers are over the API calls.
+
+  cryptolib_fi_sym_tdes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_tdes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_hmac(ujson_t *uj) {
+  cryptolib_fi_sym_hmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_hmac_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform an HMAC call.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_hmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status = (size_t)cryptolib_fi_hmac_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_hmac_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_drbg_generate(ujson_t *uj) {
+  cryptolib_fi_sym_drbg_generate_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_drbg_generate_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a DRBG call to generate random output.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_drbg_generate_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_drbg_generate_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_drbg_generate_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_drbg_reseed(ujson_t *uj) {
+  cryptolib_fi_sym_drbg_reseed_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_drbg_reseed_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a DRBG call to reseed/instantiate the DRBG.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_drbg_reseed_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_fi_drbg_reseed_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_drbg_reseed_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_trng_generate(ujson_t *uj) {
+  cryptolib_fi_sym_trng_generate_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_trng_generate_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a TRNG call to generate random output.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_trng_generate_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_trng_generate_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_trng_init(ujson_t *uj) {
+  cryptolib_fi_sym_trng_init_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_fi_sym_trng_init_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a TRNG call to instantiate the TRNG.
+  // Trigger are over the API calls.
+  cryptolib_fi_sym_trng_init_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_fi_sym_trng_init_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  /////////////// STUB START ///////////////
+  // Add things like versioning.
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_fi_sym(ujson_t *uj) {
+  cryptolib_fi_sym_subcommand_t cmd;
+  TRY(ujson_deserialize_cryptolib_fi_sym_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kCryptoLibFiSymSubcommandAes:
+      return handle_cryptolib_fi_sym_aes(uj);
+    case kCryptoLibFiSymSubcommandCmac:
+      return handle_cryptolib_fi_sym_cmac(uj);
+    case kCryptoLibFiSymSubcommandGcm:
+      return handle_cryptolib_fi_sym_gcm(uj);
+    case kCryptoLibFiSymSubcommandTdes:
+      return handle_cryptolib_fi_sym_tdes(uj);
+    case kCryptoLibFiSymSubcommandHmac:
+      return handle_cryptolib_fi_sym_hmac(uj);
+    case kCryptoLibFiSymSubcommandDrbgGenerate:
+      return handle_cryptolib_fi_sym_drbg_generate(uj);
+    case kCryptoLibFiSymSubcommandDrbgReseed:
+      return handle_cryptolib_fi_sym_drbg_reseed(uj);
+    case kCryptoLibFiSymSubcommandTrngGenerate:
+      return handle_cryptolib_fi_sym_trng_generate(uj);
+    case kCryptoLibFiSymSubcommandTrngInit:
+      return handle_cryptolib_fi_sym_trng_init(uj);
+    case kCryptoLibFiSymSubcommandInit:
+      return handle_cryptolib_fi_sym_init(uj);
+    default:
+      LOG_ERROR("Unrecognized CryptoLib FI SYM subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.h b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.h
new file mode 100644
index 0000000000000..be696fb314bce
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.h
@@ -0,0 +1,151 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * The cryptolib fi aes handler.
+ *
+ * This command encrypts or decrypts using an AES call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_aes(ujson_t *uj);
+
+/**
+ * The cryptolib fi cmac handler.
+ *
+ * This command generates and verifies a tag using CMAC.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_cmac(ujson_t *uj);
+
+/**
+ * The cryptolib fi gcm handler.
+ *
+ * This command generates a ciphertext and a tag which is verified using GCM.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_gcm(ujson_t *uj);
+
+/**
+ * The cryptolib fi tdes handler.
+ *
+ * This command encrypts or decrypts using a TDES call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_tdes(ujson_t *uj);
+
+/**
+ * The cryptolib fi hmac handler.
+ *
+ * This command uses an HMAC call accepting multiple
+ * padding schemes and modes of operation.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_hmac(ujson_t *uj);
+
+/**
+ * The cryptolib fi drbg generate handler.
+ *
+ * This command generates randomness using a DRBG call.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_drbg_generate(ujson_t *uj);
+
+/**
+ * The cryptolib fi drbg reseed handler.
+ *
+ * This command reseeds/instantiates the DRBG call.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_drbg_reseed(ujson_t *uj);
+
+/**
+ * The cryptolib fi trng generate handler.
+ *
+ * This command generates randomness from the trng.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_trng_generate(ujson_t *uj);
+
+/**
+ * The cryptolib fi trng init handler.
+ *
+ * This command instantiates the TRNG.
+ *
+ * See cryptolib_fi_sym_commands.h for inputs and outputs.
+ * See fi_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_trng_init(ujson_t *uj);
+
+/**
+ * Initialize CryptoLib command handler.
+ *
+ * This command is designed to setup the CryptoLib FI firmware.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym_init(ujson_t *uj);
+
+/**
+ * CryptoLib FI command handler.
+ *
+ * Command handler for the CryptoLib FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_fi_sym(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.c b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.c
new file mode 100644
index 0000000000000..2e9c48d9f4fc1
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.c
@@ -0,0 +1,399 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/aes.h"
+#include "sw/device/lib/crypto/include/aes_gcm.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/drbg.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/cryptolib_sym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h"
+
+status_t cryptolib_fi_aes_impl(cryptolib_fi_sym_aes_in_t uj_input,
+                               cryptolib_fi_sym_aes_out_t *uj_output) {
+  // Set the AES mode.
+  otcrypto_aes_mode_t mode;
+  otcrypto_key_mode_t key_mode;
+  switch (uj_input.mode) {
+    case kPentestAesModeEcb:
+      mode = kOtcryptoAesModeEcb;
+      key_mode = kOtcryptoKeyModeAesEcb;
+      break;
+    case kPentestAesModeCbc:
+      mode = kOtcryptoAesModeCbc;
+      key_mode = kOtcryptoKeyModeAesCbc;
+      break;
+    case kPentestAesModeCfb:
+      mode = kOtcryptoAesModeCfb;
+      key_mode = kOtcryptoKeyModeAesCfb;
+      break;
+    case kPentestAesModeOfb:
+      mode = kOtcryptoAesModeOfb;
+      key_mode = kOtcryptoKeyModeAesOfb;
+      break;
+    case kPentestAesModeCtr:
+      mode = kOtcryptoAesModeCtr;
+      key_mode = kOtcryptoKeyModeAesCtr;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES block cipher mode: %d", uj_input.mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Set operation.
+  otcrypto_aes_operation_t op;
+  if (uj_input.op_enc) {
+    op = kOtcryptoAesOperationEncrypt;
+  } else {
+    op = kOtcryptoAesOperationDecrypt;
+  }
+
+  // Set padding.
+  otcrypto_aes_padding_t padding;
+  switch (uj_input.padding) {
+    case kPentestAesPaddingPkcs7:
+      padding = kOtcryptoAesPaddingPkcs7;
+      break;
+    case kPentestAesPaddingIso9797M2:
+      padding = kOtcryptoAesPaddingIso9797M2;
+      break;
+    case kPentestAesPaddingNull:
+      padding = kOtcryptoAesPaddingNull;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES padding scheme: %d", uj_input.padding);
+      return INVALID_ARGUMENT();
+  }
+
+  // Convert the data struct into cryptolib types.
+  uint32_t iv_buf[kPentestAesIvSize];
+  memcpy(iv_buf, uj_input.iv, sizeof(uj_input.iv));
+  otcrypto_word32_buf_t iv = {
+      .data = iv_buf,
+      .len = kPentestAesBlockWords,
+  };
+
+  otcrypto_const_byte_buf_t input = {
+      .data = uj_input.data,
+      .len = uj_input.data_len,
+  };
+
+  // Build the key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = uj_input.key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create buffer to store key.
+  uint32_t key_buf[kPentestAesMaxKeyWords];
+  memset(key_buf, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key_buf, uj_input.key, uj_input.key_len);
+  // Create keyblob.
+  uint32_t keyblob[keyblob_num_words(config)];
+  // Create blinded key.
+  uint32_t aes_key_mask[kPentestAesMaxKeyWords];
+  memset(aes_key_mask, 0, AES_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestAesMaxKeyWords; it++) {
+    aes_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+  TRY(keyblob_from_key_and_mask(key_buf, aes_key_mask, config, keyblob));
+  otcrypto_blinded_key_t key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+  };
+  key.checksum = integrity_blinded_checksum(&key);
+
+  size_t padded_len_bytes;
+  otcrypto_aes_padded_plaintext_length(uj_input.data_len, padding,
+                                       &padded_len_bytes);
+
+  if (padded_len_bytes > AES_CMD_MAX_MSG_BYTES) {
+    return OUT_OF_RANGE();
+  }
+  uint32_t output_buf[padded_len_bytes / sizeof(uint32_t)];
+  otcrypto_byte_buf_t output = {
+      .data = (unsigned char *)output_buf,
+      .len = sizeof(output_buf),
+  };
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_aes(&key, iv, mode, op, input, padding, output));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  uj_output->data_len = padded_len_bytes;
+  uj_output->cfg = 0;
+  memset(uj_output->data, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(uj_output->data, output_buf, uj_output->data_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_drbg_generate_impl(
+    cryptolib_fi_sym_drbg_generate_in_t uj_input,
+    cryptolib_fi_sym_drbg_generate_out_t *uj_output) {
+  // Nonce buffer used for the generate command of the DRBG.
+  uint8_t nonce_buf[uj_input.nonce_len];
+  memcpy(nonce_buf, uj_input.nonce, uj_input.nonce_len);
+
+  otcrypto_const_byte_buf_t nonce = {
+      .len = uj_input.nonce_len,
+      .data = nonce_buf,
+  };
+
+  // Buffer for the output entropy data.
+  uint32_t output_data[uj_input.data_len];
+  otcrypto_word32_buf_t output = {
+      .data = output_data,
+      .len = ARRAYSIZE(output_data),
+  };
+
+  // Trigger window 0.
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_drbg_generate(nonce, output));
+  if (uj_input.trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->data, 0, DRBG_CMD_MAX_OUTPUT_BYTES);
+  memcpy(uj_output->data, output_data, uj_input.data_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_drbg_reseed_impl(
+    cryptolib_fi_sym_drbg_reseed_in_t uj_input,
+    cryptolib_fi_sym_drbg_reseed_out_t *uj_output) {
+  // Entropy buffer used for the instantiation of the DRBG.
+  uint8_t entropy_buf[uj_input.entropy_len];
+  memcpy(entropy_buf, uj_input.entropy, uj_input.entropy_len);
+
+  otcrypto_const_byte_buf_t entropy = {
+      .len = uj_input.entropy_len,
+      .data = entropy_buf,
+  };
+
+  // Trigger window 0.
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_drbg_instantiate(entropy));
+  if (uj_input.trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_gcm_impl(cryptolib_fi_sym_gcm_in_t uj_input,
+                               cryptolib_fi_sym_gcm_out_t *uj_output) {
+  // Construct the blinded key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeAesGcm,
+      .key_length = uj_input.key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelHigh,
+  };
+
+  // Construct blinded key from the key and testing mask.
+  uint32_t key_buf[kPentestAesMaxKeyWords];
+  memset(key_buf, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key_buf, uj_input.key, uj_input.key_len);
+
+  // Create random mask.
+  uint32_t aes_key_mask[kPentestAesMaxKeyWords];
+  memset(aes_key_mask, 0, AES_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestAesMaxKeyWords; it++) {
+    aes_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+
+  uint32_t keyblob[keyblob_num_words(config)];
+  TRY(keyblob_from_key_and_mask(key_buf, aes_key_mask, config, keyblob));
+
+  // Construct the blinded key.
+  otcrypto_blinded_key_t key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+      .checksum = 0,
+  };
+
+  // Set the checksum.
+  key.checksum = integrity_blinded_checksum(&key);
+
+  // Prepare the input buffers.
+  size_t iv_num_words = 4;
+  uint32_t iv_data[iv_num_words];
+  memcpy(iv_data, uj_input.iv, sizeof(iv_data));
+  otcrypto_const_word32_buf_t iv = {
+      .data = iv_data,
+      .len = iv_num_words,
+  };
+  otcrypto_const_byte_buf_t plaintext = {
+      .data = uj_input.data,
+      .len = uj_input.data_len,
+  };
+  otcrypto_const_byte_buf_t aad = {
+      .data = uj_input.aad,
+      .len = uj_input.aad_len,
+  };
+
+  size_t tag_num_words =
+      (uj_input.tag_len + sizeof(uint32_t) - 1) / sizeof(uint32_t);
+  uint32_t actual_tag_data[tag_num_words];
+  otcrypto_word32_buf_t actual_tag = {
+      .data = actual_tag_data,
+      .len = tag_num_words,
+  };
+
+  uint8_t actual_ciphertext_data[AES_CMD_MAX_MSG_BYTES];
+  otcrypto_byte_buf_t actual_ciphertext = {
+      .data = actual_ciphertext_data,
+      .len = uj_input.data_len,
+  };
+
+  otcrypto_aes_gcm_tag_len_t tag_len;
+  switch (uj_input.tag_len) {
+    case (128 / 8):
+      tag_len = kOtcryptoAesGcmTagLen128;
+      break;
+    case (96 / 8):
+      tag_len = kOtcryptoAesGcmTagLen96;
+      break;
+    case (64 / 8):
+      tag_len = kOtcryptoAesGcmTagLen64;
+      break;
+    case (32 / 8):
+      tag_len = kOtcryptoAesGcmTagLen32;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES-GCM tag length: %d", uj_input.tag_len);
+      return INVALID_ARGUMENT();
+  }
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_aes_gcm_encrypt(&key, plaintext, iv, aad, tag_len,
+                               actual_ciphertext, actual_tag));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  // Ciphertext.
+  uj_output->data_len = uj_input.data_len;
+  memset(uj_output->data, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(uj_output->data, actual_ciphertext_data, uj_output->data_len);
+  // Tag.
+  uj_output->tag_len = uj_input.tag_len;
+  memset(uj_output->tag, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(uj_output->tag, actual_tag_data, uj_output->tag_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_fi_hmac_impl(cryptolib_fi_sym_hmac_in_t uj_input,
+                                cryptolib_fi_sym_hmac_out_t *uj_output) {
+  // Set the HMAC mode.
+  otcrypto_key_mode_t key_mode;
+  unsigned int tag_bytes;
+  switch (uj_input.mode) {
+    case kPentestHmacHashAlgSha256:
+      key_mode = kOtcryptoKeyModeHmacSha256;
+      tag_bytes = kPentestHmacTagBytesSha256;
+      break;
+    case kPentestHmacHashAlgSha384:
+      key_mode = kOtcryptoKeyModeHmacSha384;
+      tag_bytes = kPentestHmacTagBytesSha384;
+      break;
+    case kPentestHmacHashAlgSha512:
+      key_mode = kOtcryptoKeyModeHmacSha512;
+      tag_bytes = kPentestHmacTagBytesSha512;
+      break;
+    default:
+      LOG_ERROR("Unsupported HMAC key mode: %d", uj_input.mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Build the key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = uj_input.key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create buffer to store key.
+
+  // Create buffer to store key.
+  uint32_t key_buf[kPentestHmacMaxKeyWords];
+  memset(key_buf, 0, HMAC_CMD_MAX_KEY_BYTES);
+  memcpy(key_buf, uj_input.key, uj_input.key_len);
+  // Create keyblob.
+  uint32_t keyblob[keyblob_num_words(config)];
+  // Create blinded key.
+  uint32_t hmac_key_mask[kPentestHmacMaxKeyWords];
+  memset(hmac_key_mask, 0, HMAC_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestHmacMaxKeyWords; it++) {
+    hmac_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+  TRY(keyblob_from_key_and_mask(key_buf, hmac_key_mask, config, keyblob));
+  otcrypto_blinded_key_t key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+  };
+  key.checksum = integrity_blinded_checksum(&key);
+
+  // Create input message.
+  uint8_t msg_buf[uj_input.data_len];
+  memcpy(msg_buf, uj_input.data, uj_input.data_len);
+  otcrypto_const_byte_buf_t input_message = {
+      .len = uj_input.data_len,
+      .data = msg_buf,
+  };
+
+  // Create tag.
+  uint32_t tag_buf[kPentestHmacMaxTagWords];
+  otcrypto_word32_buf_t tag = {
+      .len = tag_bytes / sizeof(uint32_t),
+      .data = tag_buf,
+  };
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_hmac(&key, input_message, tag));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  uj_output->data_len = tag_bytes;
+  uj_output->cfg = 0;
+  memset(uj_output->data, 0, HMAC_CMD_MAX_TAG_BYTES);
+  memcpy(uj_output->data, tag_buf, uj_output->data_len);
+
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.h b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.h
new file mode 100644
index 0000000000000..d0c838654fe34
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym_impl.h
@@ -0,0 +1,64 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_IMPL_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_IMPL_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h"
+
+/**
+ * Wrapper to AES cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_aes_impl(cryptolib_fi_sym_aes_in_t uj_input,
+                               cryptolib_fi_sym_aes_out_t *uj_output);
+
+/**
+ * Wrapper to DRBG generate cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_drbg_generate_impl(
+    cryptolib_fi_sym_drbg_generate_in_t uj_input,
+    cryptolib_fi_sym_drbg_generate_out_t *uj_output);
+
+/**
+ * Wrapper to DRBG reseed/instantiate cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_drbg_reseed_impl(
+    cryptolib_fi_sym_drbg_reseed_in_t uj_input,
+    cryptolib_fi_sym_drbg_reseed_out_t *uj_output);
+
+/**
+ * Wrapper to AES-GCM cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_gcm_impl(cryptolib_fi_sym_gcm_in_t uj_input,
+                               cryptolib_fi_sym_gcm_out_t *uj_output);
+
+/**
+ * Wrapper to HMAC cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_fi_hmac_impl(cryptolib_fi_sym_hmac_in_t uj_input,
+                                cryptolib_fi_sym_hmac_out_t *uj_output);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_CRYPTOLIB_FI_SYM_IMPL_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.c b/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.c
index f467464523fb0..9c249252e4521 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.c
+++ b/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.c
@@ -4,22 +4,57 @@
 
 #include "sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h"
 
+#include "sw/device/lib/arch/boot_stage.h"
+#include "sw/device/lib/base/abs_mmio.h"
 #include "sw/device/lib/base/csr.h"
 #include "sw/device/lib/base/csr_registers.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/dif/dif_flash_ctrl.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
 #include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_sram_ctrl.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/flash_ctrl_testutils.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/sram_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
-#include "sw/device/sca/lib/sca.h"
-#include "sw/device/tests/penetrationtests/firmware/lib/sca_lib.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/manuf/lib/otp_fields.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 #include "sw/device/tests/penetrationtests/json/ibex_fi_commands.h"
 
+// Generated
+#include "aes_regs.h"
+#include "alert_handler_regs.h"
+#include "csrng_regs.h"
+#include "edn_regs.h"
+#include "entropy_src_regs.h"
+#include "hmac_regs.h"
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "keymgr_regs.h"
+#include "otp_ctrl_regs.h"
+#include "rv_core_ibex_regs.h"
+#include "sram_ctrl_regs.h"
+
+enum {
+  /**
+   * Size (in number of 32-bit words) of the buffer that is allocated in the
+   * SRAM. This buffer is used by various SRAM tests.
+   */
+  kSramMainBufSize =
+      1 << 13,  // Size of the SRAM buffer used in the SRAM tests.
+  /**
+   * Number of reference values that are available in the ref_values array.
+   */
+  kNumRefValues = 32,
+  /**
+   * Number of values used for the sram_write_read_alt test.
+   */
+  kSramWriteReadAltNumValues = 16,
+};
 
 // A function which takes an uint32_t as its only argument.
 typedef uint32_t (*str_fn_t)(uint32_t);
@@ -31,18 +66,51 @@ extern uint32_t increment_100x1(uint32_t start_value);
 static str_fn_t increment_100x10_remapped = (str_fn_t)increment_100x10;
 static str_fn_t increment_100x1_remapped = (str_fn_t)increment_100x1;
 
-// Make sure that this function does not get optimized by the compiler.
-uint32_t increment_counter(uint32_t counter) __attribute__((optnone)) {
-  uint32_t return_value = counter + 1;
-  return return_value;
-}
+// Interface to Ibex.
+static dif_rv_core_ibex_t rv_core_ibex;
+
+// Interface to OTP.
+static dif_otp_ctrl_t otp;
+
+// Interface to retention SRAM.
+static dif_sram_ctrl_t ret_sram;
+
+// Indicates whether flash already was initialized for the test or not.
+static bool flash_init;
+// Indicates whether flash content is valid or not.
+static bool flash_data_valid;
+// Indicates whether ret SRAM already was initialized for the test or not.
+static bool sram_ret_init;
+// Indicates whether the otp arrays hold the valid reference values read from
+// the OTP partitions.
+static bool otp_ref_init;
+
+// Arrays holding the reference data read from the OTP VENDOR_TEST,
+// CREATOR_SW_CFG, and OWNER_SW_CFG partitions.
+uint32_t
+    otp_data_read_ref_vendor_test[(OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
+                                   OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
+                                  sizeof(uint32_t)];
+uint32_t otp_data_read_ref_creator_sw_cfg
+    [(OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+      OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE) /
+     sizeof(uint32_t)];
+uint32_t
+    otp_data_read_ref_owner_sw_cfg[(OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+                                    OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+                                   sizeof(uint32_t)];
+
+// CharFlash config parameters.
+static uint32_t flash_region_index;
+static uint32_t flash_test_page_addr;
 
-// NOP macros.
-#define NOP1 "addi x0, x0, 0\n"
-#define NOP10 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1
-#define NOP100 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10
-#define NOP1000 \
-  NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100
+// Cond. branch macros.
+#define CONDBRANCHBEQ "beq x5, x6, endfitestfaultybeq\n"
+#define CONDBRANCHBNE "bne x5, x6, endfitestfaultybne\n"
+#define CONDBRANCHBGE "bge x5, x6, endfitestfaultybge\n"
+#define CONDBRANCHBGEU "bgeu x5, x6, endfitestfaultybgeu\n"
+#define CONDBRANCHBLT "blt x5, x6, endfitestfaultyblt\n"
+#define CONDBRANCHBLTU "bltu x5, x6, endfitestfaultybltu\n"
 
 // Init x5 = 0 macro.
 #define INITX5 "addi x5, x0, 0"
@@ -56,6 +124,16 @@ uint32_t increment_counter(uint32_t counter) __attribute__((optnone)) {
   ADDI100 ADDI100 ADDI100 ADDI100 ADDI100 ADDI100 ADDI100 ADDI100 ADDI100 \
       ADDI100
 
+// Init tmpregs = 0 macro.
+#define INIT_TMPREGS                                   \
+  "addi x5, x0, 0\n addi x6, x0, 0\n addi x7, x0, 0\n" \
+  "addi x28, x0, 0\n addi x29, x0, 0\n addi x30, x0, 0\n"
+
+// Addi chain macro.
+#define ADDI_CHAIN                                      \
+  "addi x6, x5, 1\n addi x7, x6, 1\n addi x28, x7, 1\n" \
+  "addi x29, x28, 1\n addi x30, x29, 1\n addi x5, x30, 1\n"
+
 // Init x6 = 10000 macro.
 #define INITX6 "li x6, 10000"
 
@@ -77,8 +155,8 @@ uint32_t increment_counter(uint32_t counter) __attribute__((optnone)) {
 // Load word, subi, sw macro.
 #define LWSUBISW1 "lw x6, (%0)\n addi x6, x6, -1\n sw x6, (%0)\n"
 
-// Reference values.
-const uint32_t ref_values[32] = {
+// Reference values used by different FI tests.
+const uint32_t ref_values[kNumRefValues] = {
     0x1BADB002, 0x8BADF00D, 0xA5A5A5A5, 0xABABABAB, 0xABBABABE, 0xABADCAFE,
     0xBAAAAAAD, 0xBAD22222, 0xBBADBEEF, 0xBEBEBEBE, 0xBEEFCACE, 0xC00010FF,
     0xCAFED00D, 0xCAFEFEED, 0xCCCCCCCC, 0xCDCDCDCD, 0x0D15EA5E, 0xDEAD10CC,
@@ -86,6 +164,218 @@ const uint32_t ref_values[32] = {
     0xDEADDEAD, 0xD00D2BAD, 0xEBEBEBEB, 0xFADEDEAD, 0xFDFDFDFD, 0xFEE1DEAD,
     0xFEEDFACE, 0xFEEEFEEE};
 
+// variables to hold register values
+uint32_t registers_saved[IBEXFI_NUM_REGS];
+uint32_t registers_dumped[IBEXFI_NUM_REGS];
+
+/**
+ * Initialize the register file with the ref_values.
+ *
+ * This inline function pre-initializes the register file with the ref_values
+ * before a FI test. All registers except x0 (zero register), x2 (stack
+ * pointer), and x8 (frame pointer) are written. The idea of bringing the
+ * register file to a pre-defined state is to more easily detect any potential
+ * bit-flip that was introduced by FI.
+ */
+OT_ALWAYS_INLINE void init_reg_ref_values(void) {
+  asm volatile("li x1, %0" : : "i"(ref_values[kRegX1]));
+  asm volatile("li x3, %0" : : "i"(ref_values[kRegX3]));
+  asm volatile("li x4, %0" : : "i"(ref_values[kRegX4]));
+  asm volatile("li x5, %0" : : "i"(ref_values[kRegX5]));
+  asm volatile("li x6, %0" : : "i"(ref_values[kRegX6]));
+  asm volatile("li x7, %0" : : "i"(ref_values[kRegX7]));
+  asm volatile("li x9, %0" : : "i"(ref_values[kRegX9]));
+  asm volatile("li x10, %0" : : "i"(ref_values[kRegX10]));
+  asm volatile("li x11, %0" : : "i"(ref_values[kRegX11]));
+  asm volatile("li x12, %0" : : "i"(ref_values[kRegX12]));
+  asm volatile("li x13, %0" : : "i"(ref_values[kRegX13]));
+  asm volatile("li x14, %0" : : "i"(ref_values[kRegX14]));
+  asm volatile("li x15, %0" : : "i"(ref_values[kRegX15]));
+  asm volatile("li x16, %0" : : "i"(ref_values[kRegX16]));
+  asm volatile("li x17, %0" : : "i"(ref_values[kRegX17]));
+  asm volatile("li x18, %0" : : "i"(ref_values[kRegX18]));
+  asm volatile("li x19, %0" : : "i"(ref_values[kRegX19]));
+  asm volatile("li x20, %0" : : "i"(ref_values[kRegX20]));
+  asm volatile("li x21, %0" : : "i"(ref_values[kRegX21]));
+  asm volatile("li x22, %0" : : "i"(ref_values[kRegX22]));
+  asm volatile("li x23, %0" : : "i"(ref_values[kRegX23]));
+  asm volatile("li x24, %0" : : "i"(ref_values[kRegX24]));
+  asm volatile("li x25, %0" : : "i"(ref_values[kRegX25]));
+  asm volatile("li x26, %0" : : "i"(ref_values[kRegX26]));
+  asm volatile("li x27, %0" : : "i"(ref_values[kRegX27]));
+  asm volatile("li x28, %0" : : "i"(ref_values[kRegX28]));
+  asm volatile("li x29, %0" : : "i"(ref_values[kRegX29]));
+  asm volatile("li x30, %0" : : "i"(ref_values[kRegX30]));
+  asm volatile("li x31, %0" : : "i"(ref_values[kRegX31]));
+}
+
+/**
+ * Initialize the temporary and function argument registers with the ref_values.
+ *
+ * This inline function pre-initializes the temporary and some function argument
+ * registers in the RF with the ref_values. This includes x5...x7, x12...x17,
+ * and x28...x31.
+ */
+OT_ALWAYS_INLINE void init_tmp_reg_ref_values(void) {
+  asm volatile("li x5, %0" : : "i"(ref_values[kRegX5]));
+  asm volatile("li x6, %0" : : "i"(ref_values[kRegX6]));
+  asm volatile("li x7, %0" : : "i"(ref_values[kRegX7]));
+
+  asm volatile("li x12, %0" : : "i"(ref_values[kRegX12]));
+  asm volatile("li x13, %0" : : "i"(ref_values[kRegX13]));
+  asm volatile("li x14, %0" : : "i"(ref_values[kRegX14]));
+  asm volatile("li x15, %0" : : "i"(ref_values[kRegX15]));
+  asm volatile("li x16, %0" : : "i"(ref_values[kRegX16]));
+  asm volatile("li x17, %0" : : "i"(ref_values[kRegX17]));
+
+  asm volatile("li x28, %0" : : "i"(ref_values[kRegX28]));
+  asm volatile("li x29, %0" : : "i"(ref_values[kRegX29]));
+  asm volatile("li x30, %0" : : "i"(ref_values[kRegX30]));
+  asm volatile("li x31, %0" : : "i"(ref_values[kRegX31]));
+}
+
+/**
+ * Save the content of the register file (x0...x31) into the buffer.
+ *
+ * This function can be used to save the register file state before and after
+ * the FI trigger window. Call this function before init_reg_ref_values() such
+ * that the register file content can be restored after the FI test. After a FI
+ * test this function can be used to dump the register file content to detect
+ * any differences.
+ *
+ * @param buffer: The buffer to store the register file content.
+ */
+OT_ALWAYS_INLINE void save_all_regs(uint32_t buffer[]) {
+  asm volatile("sw x0,    0(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x1,    4(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x2,    8(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x3,   12(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x4,   16(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x5,   20(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x6,   24(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x7,   28(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x8,   32(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x9,   36(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x10,  40(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x11,  44(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x12,  48(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x13,  52(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x14,  56(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x15,  60(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x16,  64(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x17,  68(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x18,  72(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x19,  76(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x20,  80(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x21,  84(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x22,  88(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x23,  92(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x24,  96(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x25, 100(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x26, 104(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x27, 108(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x28, 112(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x29, 116(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x30, 120(%0)" : : "r"(&buffer[0]));
+  asm volatile("sw x31, 124(%0)" : : "r"(&buffer[0]));
+}
+
+/**
+ * Initialize the temporary and function argument registers with the ref_values.
+ *
+ * This inline function pre-initializes the temporary and some function argument
+ * registers in the RF with the ref_values. This includes x5...x7, x12...x17,
+ * and x28...x31.
+ */
+
+/**
+ * Save the content of the temporary and function argument registers into the
+ * buffer.
+ *
+ * This includes x5...x7, x12...x17, and x28...x31.
+ *
+ * @param buffer: The buffer to store the register file content.
+ */
+OT_ALWAYS_INLINE void save_tmp_regs(uint32_t buffer[]) {
+  asm volatile("mv %0, x5" : "=r"(buffer[kRegX5]));
+  asm volatile("mv %0, x6" : "=r"(buffer[kRegX6]));
+  asm volatile("mv %0, x7" : "=r"(buffer[kRegX7]));
+
+  asm volatile("mv %0, x12" : "=r"(buffer[kRegX12]));
+  asm volatile("mv %0, x13" : "=r"(buffer[kRegX13]));
+  asm volatile("mv %0, x14" : "=r"(buffer[kRegX14]));
+  asm volatile("mv %0, x15" : "=r"(buffer[kRegX15]));
+  asm volatile("mv %0, x16" : "=r"(buffer[kRegX16]));
+  asm volatile("mv %0, x17" : "=r"(buffer[kRegX17]));
+
+  asm volatile("mv %0, x28" : "=r"(buffer[kRegX28]));
+  asm volatile("mv %0, x29" : "=r"(buffer[kRegX29]));
+  asm volatile("mv %0, x30" : "=r"(buffer[kRegX30]));
+  asm volatile("mv %0, x31" : "=r"(buffer[kRegX31]));
+}
+
+/**
+ * Restore the content of the register file (x0...x31) from the buffer.
+ *
+ * @param buffer: The buffer to store the register file content.
+ */
+OT_ALWAYS_INLINE void restore_all_regs(uint32_t buffer[]) {
+  asm volatile("lw x0,    0(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x1,    4(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x2,    8(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x3,   12(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x4,   16(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x5,   20(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x6,   24(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x7,   28(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x8,   32(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x9,   36(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x10,  40(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x11,  44(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x12,  48(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x13,  52(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x14,  56(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x15,  60(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x16,  64(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x17,  68(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x18,  72(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x19,  76(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x20,  80(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x21,  84(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x22,  88(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x23,  92(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x24,  96(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x25, 100(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x26, 104(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x27, 108(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x28, 112(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x29, 116(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x30, 120(%0)" : : "r"(&buffer[0]));
+  asm volatile("lw x31, 124(%0)" : : "r"(&buffer[0]));
+}
+
+// Save the current register file content and initialize it with pre-defined
+// values.
+#define INIT_REGISTER_FILE                              \
+  memset(registers_saved, 0, sizeof(registers_dumped)); \
+  save_all_regs(registers_saved);                       \
+  init_reg_ref_values();                                \
+  uint32_t registers_dumped[IBEXFI_NUM_REGS];
+
+// Init the temporary registers with reference values.
+#define INIT_TMP_REGISTER_FILE                           \
+  memset(registers_dumped, 0, sizeof(registers_dumped)); \
+  init_tmp_reg_ref_values();
+
+// Save the current register file content and restore it wit the saved
+// values.
+#define DUMP_REGISTER_FILE         \
+  save_all_regs(registers_dumped); \
+  restore_all_regs(registers_saved);
+
+// Save the temporary registers.
+#define DUMP_TMP_REGISTER_FILE save_tmp_regs(registers_dumped);
+
 // Flash information.
 static dif_flash_ctrl_state_t flash;
 static dif_flash_ctrl_device_info_t flash_info;
@@ -99,14 +389,146 @@ static dif_flash_ctrl_device_info_t flash_info;
 // we can do the write/read test without the risk of clobbering data
 // used by the program.
 OT_SECTION(".data")
-static volatile uint32_t sram_main_buffer[32];
+static volatile uint32_t sram_main_buffer[kSramMainBufSize];
 
-status_t handle_ibex_fi_address_translation(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+// Make sure that this function does not get optimized by the compiler.
+void increment_counter(void) __attribute__((optnone)) {
+  asm volatile("addi x5, x5, 1");
+}
+
+static status_t init_ref_otp_data(void) {
+  // Fetch faulty-free reference values from OTP paritions.
+  if (!otp_ref_init) {
+    // Read VENDOR_TEST partition.
+    TRY(otp_ctrl_testutils_dai_read32_array(
+        &otp, kDifOtpCtrlPartitionVendorTest, 0, otp_data_read_ref_vendor_test,
+        (OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
+         OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
+            sizeof(uint32_t)));
+
+    // Read CREATOR_SW_CFG partition.
+    TRY(otp_ctrl_testutils_dai_read32_array(
+        &otp, kDifOtpCtrlPartitionCreatorSwCfg, 0,
+        otp_data_read_ref_creator_sw_cfg,
+        (OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+         OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE) /
+            sizeof(uint32_t)));
+
+    // READ OWNER_SW_CFG partition.
+    TRY(otp_ctrl_testutils_dai_read32_array(
+        &otp, kDifOtpCtrlPartitionOwnerSwCfg, 0, otp_data_read_ref_owner_sw_cfg,
+        (OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+         OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+            sizeof(uint32_t)));
+    otp_ref_init = true;
+  }
+  return OK_STATUS();
+}
+
+static status_t read_otp_partitions(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t
+      otp_data_read_res_vendor_test[(OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
+                                     OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
+                                    sizeof(uint32_t)];
+  uint32_t otp_data_read_res_creator_sw_cfg
+      [(OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+        OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE) /
+       sizeof(uint32_t)];
+  uint32_t
+      otp_data_read_res_owner_sw_cfg[(OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+                                      OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+                                     sizeof(uint32_t)];
+
+  pentest_set_trigger_high();
+  asm volatile(NOP10);
+  TRY(otp_ctrl_testutils_dai_read32_array(
+      &otp, kDifOtpCtrlPartitionVendorTest, 0, otp_data_read_res_vendor_test,
+      (OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
+       OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
+          sizeof(uint32_t)));
+  TRY(otp_ctrl_testutils_dai_read32_array(
+      &otp, kDifOtpCtrlPartitionCreatorSwCfg, 0,
+      otp_data_read_res_creator_sw_cfg,
+      (OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+       OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE) /
+          sizeof(uint32_t)));
+  TRY(otp_ctrl_testutils_dai_read32_array(
+      &otp, kDifOtpCtrlPartitionOwnerSwCfg, 0, otp_data_read_res_owner_sw_cfg,
+      (OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+       OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+          sizeof(uint32_t)));
+  asm volatile(NOP10);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Detect potential mismatch caused by faults.
+  uint32_t res = 0;
+  for (size_t i = 0; i < ((OTP_CTRL_PARAM_VENDOR_TEST_SIZE -
+                           OTP_CTRL_PARAM_VENDOR_TEST_DIGEST_SIZE) /
+                          sizeof(uint32_t));
+       i++) {
+    if (otp_data_read_ref_vendor_test[i] != otp_data_read_res_vendor_test[i]) {
+      res |= 1;
+    }
+  }
+
+  for (size_t i = 0; i < ((OTP_CTRL_PARAM_CREATOR_SW_CFG_SIZE -
+                           OTP_CTRL_PARAM_CREATOR_SW_CFG_DIGEST_SIZE) /
+                          sizeof(uint32_t));
+       i++) {
+    if (otp_data_read_ref_creator_sw_cfg[i] !=
+        otp_data_read_res_creator_sw_cfg[i]) {
+      res |= 2;
+    }
+  }
+
+  for (size_t i = 0; i < ((OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE -
+                           OTP_CTRL_PARAM_OWNER_SW_CFG_DIGEST_SIZE) /
+                          sizeof(uint32_t));
+       i++) {
+    if (otp_data_read_ref_owner_sw_cfg[i] !=
+        otp_data_read_res_owner_sw_cfg[i]) {
+      res |= 4;
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send res & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  uj_output.result = res;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+// Make sure that this function does not get optimized by the compiler.
+void not_increment_counter(void) __attribute__((optnone)) {
+  asm volatile("ret");
+  asm volatile(ADDI10);
+}
+
+status_t handle_ibex_fi_address_translation(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
   // Create translation descriptions.
   dif_rv_core_ibex_addr_translation_mapping_t increment_100x10_mapping = {
@@ -121,9 +543,16 @@ status_t handle_ibex_fi_address_translation(ujson_t *uj) {
   };
 
   // Configure slot 0 for the increment_100x10.
-  TRY(dif_rv_core_ibex_configure_addr_translation(
+  dif_result_t status = dif_rv_core_ibex_configure_addr_translation(
       &rv_core_ibex, kDifRvCoreIbexAddrTranslationSlot_0,
-      kDifRvCoreIbexAddrTranslationIBus, increment_100x10_mapping));
+      kDifRvCoreIbexAddrTranslationIBus, increment_100x10_mapping);
+  if (status == kDifLocked) {
+    LOG_INFO("address translation locked");
+    ibex_fi_empty_t uj_output;
+    uj_output.success = false;
+    RESP_OK(ujson_serialize_ibex_fi_empty_t, uj, &uj_output);
+    return OK_STATUS();
+  }
   TRY(dif_rv_core_ibex_configure_addr_translation(
       &rv_core_ibex, kDifRvCoreIbexAddrTranslationSlot_0,
       kDifRvCoreIbexAddrTranslationDBus, increment_100x10_mapping));
@@ -153,10 +582,15 @@ status_t handle_ibex_fi_address_translation(ujson_t *uj) {
 
   // FI code target.
   uint32_t result_expected = 0;
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   asm volatile(NOP100);
   result_expected = increment_100x10_remapped(0);
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
   uint32_t result_target = increment_100x1_remapped(0);
   // Compare values
   uint32_t res = 0;
@@ -176,16 +610,19 @@ status_t handle_ibex_fi_address_translation(ujson_t *uj) {
   ibex_fi_test_result_t uj_output;
   uj_output.result = res;
   uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_address_translation_config(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_address_translation_config(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
   // Address translation configuration.
   dif_rv_core_ibex_addr_translation_mapping_t mapping1 = {
@@ -201,19 +638,30 @@ status_t handle_ibex_fi_address_translation_config(ujson_t *uj) {
   };
 
   // Write address translation configuration.
-  TRY(dif_rv_core_ibex_configure_addr_translation(
+  dif_result_t status = dif_rv_core_ibex_configure_addr_translation(
       &rv_core_ibex, kDifRvCoreIbexAddrTranslationSlot_0,
-      kDifRvCoreIbexAddrTranslationIBus, mapping1));
+      kDifRvCoreIbexAddrTranslationIBus, mapping1);
+  if (status == kDifLocked) {
+    LOG_INFO("address translation locked");
+    ibex_fi_empty_t uj_output;
+    uj_output.success = false;
+    RESP_OK(ujson_serialize_ibex_fi_empty_t, uj, &uj_output);
+    return OK_STATUS();
+  }
 
   // FI code target.
   // Either slot 0 config, which is already written, or slot 1 config, which
   // gets written is targeted using FI.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   TRY(dif_rv_core_ibex_configure_addr_translation(
       &rv_core_ibex, kDifRvCoreIbexAddrTranslationSlot_1,
       kDifRvCoreIbexAddrTranslationDBus, mapping2));
   asm volatile(NOP1000);
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read back address translation configuration.
   dif_rv_core_ibex_addr_translation_mapping_t mapping1_read_back;
@@ -248,515 +696,3378 @@ status_t handle_ibex_fi_address_translation_config(ujson_t *uj) {
   ibex_fi_test_result_t uj_output;
   uj_output.result = res;
   uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_csr_write(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_addi_single_beq(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Init x5 and x6.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x1a\n");
 
   // FI code target.
-  sca_set_trigger_high();
-  asm volatile(NOP10);
-  for (int i = 0; i < 100; i++) {
-    CSR_WRITE(CSR_REG_MSCRATCH, ref_values[0]);
-  }
-  asm volatile(NOP10);
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n"
+      "beq x5, x6, correctaddibeq\n"
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "c.addi x14, 16\n"
+      "c.addi x15, 16\n"
+      "c.addi x16, 16\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "j badaddibeq\n"
+      "correctaddibeq:\n"
+      "addi x5, x5, 0x11\n"
+      "addi x6, x6, 0x22\n"
+      "badaddibeq:\n");
+  PENTEST_ASM_TRIGGER_LOW
 
-  uint32_t res_values;
-  // Read values from CSRs.
-  CSR_READ(CSR_REG_MSCRATCH, &res_values);
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
 
-  // Compare against reference values.
-  uint32_t res = 0;
-  if (res_values != ref_values[0]) {
-    res = 1;
-  }
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != (0x11 + 0x1a)) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != (0x22 + 0x1a)) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_csr_read(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_addi_single_beq_cm(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Write reference value into CSR.
-  CSR_WRITE(CSR_REG_MSCRATCH, ref_values[0]);
+  // As this test is expected to crash, pull down the trigger to low to avoid
+  // that it is still at high.
+  PENTEST_ASM_TRIGGER_LOW;
+  asm volatile(NOP100);
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Those values are on purpose different such that the hardened check fails.
+  volatile hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  volatile hardened_bool_t value2 = HARDENED_BOOL_FALSE;
 
-  uint32_t res_values[32];
   // FI code target.
-  sca_set_trigger_high();
-  asm volatile(NOP10);
-  for (int i = 0; i < 32; i++) {
-    CSR_READ(CSR_REG_MSCRATCH, &res_values[i]);
-  }
-  asm volatile(NOP10);
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n");
+  HARDENED_CHECK_EQ(value1, value2);
+  asm volatile(
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "j labelend\n"
+      "j labelend\n"
+      "c.addi x14, 16\n"
+      "j labelend\n"
+      "c.addi x15, 16\n"
+      "j labelend\n"
+      "c.addi x16, 16\n"
+      "j labelend\n"
+      "j labelend\n"
+      "j labelend\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "j labelend\n"
+      "j labelend\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "labelend:\n");
+  PENTEST_ASM_TRIGGER_LOW
 
-  // Compare against reference values.
-  uint32_t res = 0;
-  for (int i = 0; i < 32; i++) {
-    if (res_values[i] != ref_values[0]) {
-      res |= 1;
-    }
-  }
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_rf_dump_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_rf_dump_t, uj, &uj_output);
+
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_flash_read(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_addi_single_beq_cm2(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Configure the data flash.
-  // Flash configuration.
-  dif_flash_ctrl_region_properties_t region_properties = {
-      .rd_en = kMultiBitBool4True,
-      .prog_en = kMultiBitBool4True,
-      .erase_en = kMultiBitBool4True,
-      .scramble_en = kMultiBitBool4True,
-      .ecc_en = kMultiBitBool4True,
-      .high_endurance_en = kMultiBitBool4False};
-
-  dif_flash_ctrl_data_region_properties_t data_region = {
-      .base = FLASH_PAGES_PER_BANK,
-      .size = 0x1,
-      .properties = region_properties};
-
-  TRY(dif_flash_ctrl_set_data_region_properties(&flash, 0, data_region));
-  TRY(dif_flash_ctrl_set_data_region_enablement(&flash, 0, kDifToggleEnabled));
-
-  ptrdiff_t flash_bank_1_addr =
-      (ptrdiff_t)flash_info.data_pages * (ptrdiff_t)flash_info.bytes_per_page;
-  mmio_region_t flash_bank_1 = mmio_region_from_addr(
-      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_bank_1_addr);
+  // As this test is expected to crash, pull down the trigger to low to avoid
+  // that it is still at high.
+  PENTEST_ASM_TRIGGER_LOW;
+  asm volatile(NOP100);
 
-  // Prepare page and write reference values into it.
-  uint32_t input_page[FLASH_UINT32_WORDS_PER_PAGE];
-  memset(input_page, 0x0, FLASH_UINT32_WORDS_PER_PAGE * sizeof(uint32_t));
-  for (int i = 0; i < 32; i++) {
-    input_page[i] = ref_values[i];
-  }
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
-  // Erase flash and write page with reference values.
-  TRY(flash_ctrl_testutils_erase_and_write_page(
-      &flash, (uint32_t)flash_bank_1_addr, /*partition_id=*/0, input_page,
-      kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
+  // Those values are on purpose different such that the hardened check fails.
+  volatile hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  volatile hardened_bool_t value2 = HARDENED_BOOL_FALSE;
 
   // FI code target.
-  uint32_t res_values[32];
-  sca_set_trigger_high();
-  for (int i = 0; i < 32; i++) {
-    res_values[i] =
-        mmio_region_read32(flash_bank_1, i * (ptrdiff_t)sizeof(uint32_t));
-  }
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n"
+      "mv a0, %0\n"
+      "mv a1, %1\n"
+      "beq a0,a1,cm2_fault\n"
+      "cm2_correct:\n"
+      "unimp\n"
+      "unimp\n"
+      "bne a0,a1,cm2_correct\n"
+      "cm2_fault:\n"
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "j labelend2\n"
+      "j labelend2\n"
+      "c.addi x14, 16\n"
+      "j labelend2\n"
+      "c.addi x15, 16\n"
+      "j labelend2\n"
+      "c.addi x16, 16\n"
+      "j labelend2\n"
+      "j labelend2\n"
+      "j labelend2\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "j labelend2\n"
+      "j labelend2\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "labelend2:\n"
+      : "=r"(value1), "=r"(value2));
+  PENTEST_ASM_TRIGGER_LOW
 
-  // Compare against reference values.
-  uint32_t res = 0;
-  for (int i = 0; i < 32; i++) {
-    if (res_values[i] != ref_values[i]) {
-      res |= 1;
-    }
-  }
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_rf_dump_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_rf_dump_t, uj, &uj_output);
+
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_flash_write(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
-  // Configure the data flash.
-  // Flash configuration.
-  dif_flash_ctrl_region_properties_t region_properties = {
-      .rd_en = kMultiBitBool4True,
-      .prog_en = kMultiBitBool4True,
-      .erase_en = kMultiBitBool4True,
-      .scramble_en = kMultiBitBool4True,
-      .ecc_en = kMultiBitBool4True,
-      .high_endurance_en = kMultiBitBool4False};
-  dif_flash_ctrl_data_region_properties_t data_region = {
-      .base = FLASH_PAGES_PER_BANK,
-      .size = 0x1,
-      .properties = region_properties};
-  TRY(dif_flash_ctrl_set_data_region_properties(&flash, 0, data_region));
-  TRY(dif_flash_ctrl_set_data_region_enablement(&flash, 0, kDifToggleEnabled));
-
-  ptrdiff_t flash_bank_1_addr =
-      (ptrdiff_t)flash_info.data_pages * (ptrdiff_t)flash_info.bytes_per_page;
-  mmio_region_t flash_bank_1 = mmio_region_from_addr(
-      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_bank_1_addr);
+status_t handle_ibex_fi_char_addi_single_beq_neg(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Prepare page and write reference values into it.
-  uint32_t input_page[FLASH_UINT32_WORDS_PER_PAGE];
-  memset(input_page, 0x0, FLASH_UINT32_WORDS_PER_PAGE * sizeof(uint32_t));
-  for (int i = 0; i < 32; i++) {
-    input_page[i] = ref_values[i];
-  }
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
-  // FI code target.
-  sca_set_trigger_high();
-  // Erase flash and write page with reference values.
-  TRY(flash_ctrl_testutils_erase_and_write_page(
-      &flash, (uint32_t)flash_bank_1_addr, /*partition_id=*/0, input_page,
-      kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
-  sca_set_trigger_low();
+  // Set the registers used in the FI trigger window (x5, x6) to constants.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x0f\n");
 
-  // Read back and compare against reference values.
-  uint32_t res_values[32];
-  uint32_t res = 0;
-  for (int i = 0; i < 32; i++) {
-    res_values[i] =
-        mmio_region_read32(flash_bank_1, i * (ptrdiff_t)sizeof(uint32_t));
-    if (res_values[i] != ref_values[i]) {
-      res |= 1;
-    }
-  }
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n"
+      "beq x5, x6, badbeqneg\n"
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "c.addi x14, 16\n"
+      "c.addi x15, 16\n"
+      "c.addi x16, 16\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "j correctbeqneg\n"
+      "badbeqneg:\n"
+      "addi x5, x5, 0x11\n"
+      "addi x6, x6, 0x22\n"
+      "correctbeqneg:\n");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != 0x1a) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != 0x0f) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_sram_read(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_addi_single_bne(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Get address of buffer located in SRAM.
-  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
-  mmio_region_t sram_region_main_addr =
-      mmio_region_from_addr(sram_main_buffer_addr);
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
-  // Write reference values into SRAM.
-  for (int i = 0; i < 32; i++) {
-    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
-                        ref_values[i]);
-  }
+  // Set the registers used in the FI trigger window (x5, x6) to constants.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x0a\n");
 
-  uint32_t res_values[32];
-  // FI code target.
-  sca_set_trigger_high();
-  for (int i = 0; i < 32; i++) {
-    res_values[i] = mmio_region_read32(sram_region_main_addr,
-                                       i * (ptrdiff_t)sizeof(uint32_t));
-  }
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n"
+      "bne x5, x6, correctaddibne\n"
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "c.addi x14, 16\n"
+      "c.addi x15, 16\n"
+      "c.addi x16, 16\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "j badaddibne\n"
+      "correctaddibne:\n"
+      "addi x5, x5, 0x11\n"
+      "addi x6, x6, 0x22\n"
+      "badaddibne:\n");
+  PENTEST_ASM_TRIGGER_LOW
 
-  // Compare against reference values.
-  uint32_t res = 0;
-  for (int i = 0; i < 32; i++) {
-    if (res_values[i] != ref_values[i]) {
-      res |= 1;
-    }
-  }
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != (0x11 + 0x1a)) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != (0x22 + 0x0a)) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_sram_write(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_addi_single_bne_neg(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Get address of buffer located in SRAM.
-  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
-  mmio_region_t sram_region_main_addr =
-      mmio_region_from_addr(sram_main_buffer_addr);
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
-  // FI code target.
-  sca_set_trigger_high();
-  for (int i = 0; i < 32; i++) {
-    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
-                        ref_values[i]);
-  }
-  sca_set_trigger_low();
+  // Set the registers used in the FI trigger window (x5, x6) to a constant.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x1a\n");
 
-  // Read back and compare against reference values.
-  uint32_t res_values[32];
-  uint32_t res = 0;
-  for (int i = 0; i < 32; i++) {
-    res_values[i] = mmio_region_read32(sram_region_main_addr,
-                                       i * (ptrdiff_t)sizeof(uint32_t));
-    if (res_values[i] != ref_values[i]) {
-      res |= 1;
-    }
-  }
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "c.addi x12, 1\n"
+      "c.addi x13, 1\n"
+      "c.addi x14, 1\n"
+      "c.addi x15, 1\n"
+      "c.addi x16, 1\n"
+      "c.addi x17, 1\n"
+      "c.addi x28, 1\n"
+      "c.addi x29, 1\n"
+      "c.addi x30, 1\n"
+      "c.addi x31, 1\n"
+      "bne x5, x6, badbneneg\n"
+      "c.addi x12, 16\n"
+      "c.addi x13, 16\n"
+      "c.addi x14, 16\n"
+      "c.addi x15, 16\n"
+      "c.addi x16, 16\n"
+      "c.addi x17, 16\n"
+      "c.addi x28, 16\n"
+      "c.addi x29, 16\n"
+      "c.addi x30, 16\n"
+      "c.addi x31, 16\n"
+      "j correctbneneg\n"
+      "badbneneg:\n"
+      "addi x5, x5, 0x11\n"
+      "addi x6, x6, 0x22\n"
+      "correctbneneg:\n");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send res & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != 0x1a) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != 0x1a) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_unconditional_branch(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_combi(ujson_t *uj) __attribute__((optnone)) {
+  //////////// TEST 1
 
-  // FI code target.
-  uint32_t result = 0;
-  sca_set_trigger_high();
-  asm volatile(NOP10);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  result = increment_counter(result);
-  sca_set_trigger_low();
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // Read ERR_STATUS register.
-  dif_rv_core_ibex_error_status_t codes;
-  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
 
-  // Send loop counters & ERR_STATUS to host.
+  // Init the used registers.
+  asm volatile("addi x5, x0, 0xaf");
+  asm volatile("addi x6, x0, 0xaf");
+
+  asm volatile("addi x12, x0, 0xa0");
+  asm volatile("addi x13, x0, 0x0f");
+
+  asm volatile("addi x14, x0, 0x01");
+  asm volatile("addi x15, x0, 0x03");
+
+  asm volatile("addi x16, x0, 0x0a");
+  asm volatile("addi x17, x0, 0x1c");
+
+  asm volatile("addi x28, x0, 0xa2");
+  asm volatile("addi x29, x0, 0x05");
+
+  asm volatile("addi x30, x0, 0xc4");
+  asm volatile("addi x31, x0, 0x07");
+
+  asm volatile("addi x7, x0, 0");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "bne x5, x6, endcombifaultybne\n"
+      "bne x5, x6, endcombifaultybne\n"
+      "bne x5, x6, endcombifaultybne\n"
+      "bne x5, x6, endcombifaultybne\n"
+      "bne x5, x6, endcombifaultybne\n"
+      "bne x5, x6, endcombifaultybne\n"
+
+      "beq x12, x13, endcombifaultybeq\n"
+      "beq x12, x13, endcombifaultybeq\n"
+      "beq x12, x13, endcombifaultybeq\n"
+      "beq x12, x13, endcombifaultybeq\n"
+      "beq x12, x13, endcombifaultybeq\n"
+      "beq x12, x13, endcombifaultybeq\n"
+
+      "bge x14, x15, endcombifaultybge\n"
+      "bge x14, x15, endcombifaultybge\n"
+      "bge x14, x15, endcombifaultybge\n"
+      "bge x14, x15, endcombifaultybge\n"
+      "bge x14, x15, endcombifaultybge\n"
+      "bge x14, x15, endcombifaultybge\n"
+
+      "bgeu x16, x17, endcombifaultybgeu\n"
+      "bgeu x16, x17, endcombifaultybgeu\n"
+      "bgeu x16, x17, endcombifaultybgeu\n"
+      "bgeu x16, x17, endcombifaultybgeu\n"
+      "bgeu x16, x17, endcombifaultybgeu\n"
+      "bgeu x16, x17, endcombifaultybgeu\n"
+
+      "blt x28, x29, endcombifaultyblt\n"
+      "blt x28, x29, endcombifaultyblt\n"
+      "blt x28, x29, endcombifaultyblt\n"
+      "blt x28, x29, endcombifaultyblt\n"
+      "blt x28, x29, endcombifaultyblt\n"
+      "blt x28, x29, endcombifaultyblt\n"
+
+      "bltu x30, x31, endcombifaultybltu\n"
+      "bltu x30, x31, endcombifaultybltu\n"
+      "bltu x30, x31, endcombifaultybltu\n"
+      "bltu x30, x31, endcombifaultybltu\n"
+      "bltu x30, x31, endcombifaultybltu\n"
+      "bltu x30, x31, endcombifaultybltu\n"
+
+      NOP100
+
+      "j endcombicorrect\n"
+
+      "endcombifaultybne:\n"
+      "addi x5, x5, 0x1\n"
+      "addi x6, x6, 0x1\n"
+      "j endcombicorrect\n"
+
+      "endcombifaultybeq:\n"
+      "addi x12, x12, 0x1\n"
+      "addi x13, x13, 0x1\n"
+      "j endcombicorrect\n"
+
+      "endcombifaultybge:\n"
+      "addi x14, x14, 0x1\n"
+      "addi x15, x15, 0x1\n"
+      "j endcombicorrect\n"
+
+      "endcombifaultybgeu:\n"
+      "addi x16, x16, 0x1\n"
+      "addi x17, x17, 0x1\n"
+      "j endcombicorrect\n"
+
+      "endcombifaultyblt:\n"
+      "addi x28, x28, 0x1\n"
+      "addi x29, x29, 0x1\n"
+      "j endcombicorrect\n"
+
+      "endcombifaultybltu:\n"
+      "addi x30, x30, 0x1\n"
+      "addi x31, x31, 0x1\n"
+
+      "endcombicorrect:\n");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  uint32_t registers_dumped_test_1[IBEXFI_NUM_REGS];
+  memcpy(registers_dumped_test_1, registers_dumped, sizeof(registers_dumped));
+
+  //////////////// TEST 2
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
+
+  asm volatile("addi x5, x0, 0");
+  asm volatile("addi x6, x0, 0");
+  asm volatile("addi x7, x0, 0");
+  asm volatile("addi x12, x0, 0");
+  asm volatile("addi x13, x0, 0");
+  asm volatile("addi x14, x0, 0");
+  asm volatile("addi x15, x0, 0");
+  asm volatile("addi x16, x0, 0");
+  asm volatile("addi x17, x0, 0");
+  asm volatile("addi x28, x0, 0");
+  asm volatile("addi x29, x0, 0");
+  asm volatile("addi x30, x0, 0");
+  asm volatile("addi x31, x0, 0");
+
+  uint32_t counter = 0;
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(
+      "lw x5, (%0)\n addi x5, x5, 1\n sw x5, (%0)\n"
+      "lw x6, (%0)\n addi x6, x6, 1\n sw x6, (%0)\n"
+      "lw x7, (%0)\n addi x7, x7, 1\n sw x7, (%0)\n"
+      "lw x12, (%0)\n addi x12, x12, 1\n sw x12, (%0)\n"
+      "lw x13, (%0)\n addi x13, x13, 1\n sw x13, (%0)\n"
+      "lw x14, (%0)\n addi x14, x14, 1\n sw x14, (%0)\n"
+      "lw x15, (%0)\n addi x15, x15, 1\n sw x15, (%0)\n"
+      "lw x16, (%0)\n addi x16, x16, 1\n sw x16, (%0)\n"
+      "lw x17, (%0)\n addi x17, x17, 1\n sw x17, (%0)\n"
+      "lw x28, (%0)\n addi x28, x28, 1\n sw x28, (%0)\n"
+      "lw x29, (%0)\n addi x29, x29, 1\n sw x29, (%0)\n"
+      "lw x30, (%0)\n addi x30, x30, 1\n sw x30, (%0)\n"
+      "lw x31, (%0)\n addi x31, x31, 1\n sw x31, (%0)\n"
+      :
+      : "r"((uint32_t *)&counter));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  uint32_t registers_dumped_test_2[IBEXFI_NUM_REGS];
+  memcpy(registers_dumped_test_2, registers_dumped, sizeof(registers_dumped));
+
+  ////////// TEST 3
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
+
+  // Init x5 register we are using for the increment.
+  asm volatile(INITX5);
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Attack target.
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  uint32_t registers_dumped_test_3[IBEXFI_NUM_REGS];
+  memcpy(registers_dumped_test_3, registers_dumped, sizeof(registers_dumped));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  dif_rv_core_ibex_error_status_t codes;
+
+  // Read ERR_STATUS register.
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_combi_data_t uj_test_output;
+
+  // Return errors and alerts.
+  uj_test_output.err_status = codes;
+  memcpy(uj_test_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_test_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+
+  // Return the results for the first test.
+  // Preset buffers to 0.
+  memset(uj_test_output.data_faulty_test_1, false,
+         sizeof(uj_test_output.data_faulty_test_1));
+  memset(uj_test_output.data_test_1, 0, sizeof(uj_test_output.data_test_1));
+  memset(uj_test_output.registers_test_1, 0,
+         sizeof(uj_test_output.registers_test_1));
+  // Return register file from the first test dump back to host.
+  memcpy(uj_test_output.registers_test_1, registers_dumped_test_1,
+         sizeof(registers_dumped_test_1));
+  // Check the content of x5, x6, x12-x17, x28-x31.
+  size_t compare_regs[12] = {kRegX5,  kRegX6,  kRegX12, kRegX13,
+                             kRegX14, kRegX15, kRegX16, kRegX17,
+                             kRegX28, kRegX29, kRegX30, kRegX31};
+  size_t expected_values[12] = {0xaf, 0xaf, 0xa0, 0x0f, 0x01, 0x03,
+                                0x0a, 0x1c, 0xa2, 0x05, 0xc4, 0x07};
+  for (size_t it = 0; it < 12; it++) {
+    if (registers_dumped_test_1[compare_regs[it]] != expected_values[it]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_test_output.data_faulty_test_1[it] = true;
+      uj_test_output.data_test_1[it] =
+          registers_dumped_test_1[compare_regs[it]];
+    }
+  }
+
+  // Return the results from the second test.
+  memset(uj_test_output.registers_test_2, 0,
+         sizeof(uj_test_output.registers_test_2));
+  // Return register file dump back to host.
+  memcpy(uj_test_output.registers_test_2, registers_dumped_test_2,
+         sizeof(registers_dumped_test_2));
+  // Return counter back to host.
+  uj_test_output.result_test_2 = counter;
+
+  // Return the results from the third test.
+  // Return result and registers back to host.
+  memset(uj_test_output.registers_test_3, 0,
+         sizeof(uj_test_output.registers_test_3));
+  // Return register file dump back to host.
+  memcpy(uj_test_output.registers_test_3, registers_dumped_test_3,
+         sizeof(registers_dumped_test_3));
+  // Return x5 back to host.
+  uj_test_output.result_test_3 = registers_dumped_test_3[kRegX5];
+  // Send loop counters & ERR_STATUS to host.
+  uj_test_output.err_status = codes;
+  memcpy(uj_test_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_test_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+
+  // Send over the response
+  RESP_OK(ujson_serialize_ibex_fi_combi_data_t, uj, &uj_test_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_beq(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xaf");
+  asm volatile("addi x6, x0, 0xef");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  asm volatile(CONDBRANCHBEQ);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestbeq");
+  asm volatile(
+      "endfitestfaultybeq:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestbeq:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_bge(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xaf");
+  asm volatile("addi x6, x0, 0xef");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  asm volatile(CONDBRANCHBGE);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestbge");
+  asm volatile(
+      "endfitestfaultybge:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestbge:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_bgeu(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xaf");
+  asm volatile("addi x6, x0, 0xef");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  asm volatile(CONDBRANCHBGEU);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestbgeu");
+  asm volatile(
+      "endfitestfaultybgeu:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestbgeu:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_blt(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xef");
+  asm volatile("addi x6, x0, 0xaf");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  asm volatile(CONDBRANCHBLT);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestblt");
+  asm volatile(
+      "endfitestfaultyblt:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestblt:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_bltu(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xef");
+  asm volatile("addi x6, x0, 0xaf");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  asm volatile(CONDBRANCHBLTU);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestbltu");
+  asm volatile(
+      "endfitestfaultybltu:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestbltu:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_conditional_branch_bne(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t result1 = 0;
+  uint32_t result2 = 0;
+
+  asm volatile("addi x5, x0, 0xaf");
+  asm volatile("addi x6, x0, 0xaf");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  asm volatile(CONDBRANCHBNE);
+  PENTEST_ASM_TRIGGER_LOW
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("beq x0, x0, endfitestbne");
+  asm volatile(
+      "endfitestfaultybne:\n"
+      "addi x5, x0, 0x11\n"
+      "addi x6, x0, 0x22");
+  asm volatile("mv %0, x5" : "=r"(result1));
+  asm volatile("mv %0, x6" : "=r"(result2));
+  asm volatile("endfitestbne:\n");
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send loop counters & ERR_STATUS to host.
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.result1 = result1;
+  uj_output.result2 = result2;
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_csr_read(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Write reference value into CSR.
+  CSR_WRITE(CSR_REG_MSCRATCH, ref_values[0]);
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrr x6,mscratch");
+  asm volatile("csrr x7,mscratch");
+  asm volatile("csrr x12,mscratch");
+  asm volatile("csrr x13,mscratch");
+  asm volatile("csrr x14,mscratch");
+  asm volatile("csrr x15,mscratch");
+  asm volatile("csrr x16,mscratch");
+  asm volatile("csrr x17,mscratch");
+  asm volatile("csrr x28,mscratch");
+  asm volatile("csrr x29,mscratch");
+  asm volatile("csrr x30,mscratch");
+  asm volatile("csrr x31,mscratch");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Compare against reference values.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[0]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send alerts back to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_csr_write(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  asm volatile("csrw	mscratch, x5");
+  asm volatile("csrr x5,mscratch");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Compare against reference values.
   ibex_fi_test_result_t uj_output;
-  uj_output.result = result;
+  // Compare x5 with the expected value.
+  uj_output.result = 0;
+  if (registers_dumped[kRegX5] != ref_values[kRegX5]) {
+    uj_output.result = registers_dumped[kRegX5];
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send res & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_csr_combi(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read the trigger data and the reference values
+  ibex_fi_csr_combi_in_t uj_data;
+  TRY(ujson_deserialize_ibex_fi_csr_combi_in_t(uj, &uj_data));
+
+  uint32_t read_csrs[IBEXFI_NUM_CSR_COMBI];
+  for (int i = 0; i < IBEXFI_NUM_CSR_COMBI; i++) {
+    read_csrs[i] = 0x1BADB002;
+  }
+
+  // Clear the `sha_en` bit to ensure the message length registers are
+  // writeable. Leave the rest of the configuration unchanged.
+  uint32_t cfg =
+      abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET);
+  cfg = bitfield_bit32_write(cfg, HMAC_CFG_SHA_EN_BIT, false);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_CFG_REG_OFFSET, cfg);
+
+  // Make explicit register variables for the test
+  register volatile uint32_t reg_x9 asm("x9");
+  register volatile uint32_t reg_x19 asm("x19");
+  register volatile uint32_t reg_x29 asm("x29");
+
+  // Write reference value into CSR.
+  if (uj_data.trigger & 0x1) {
+    PENTEST_ASM_TRIGGER_HIGH
+  }
+  abs_mmio_write32(TOP_EARLGREY_AES_BASE_ADDR + AES_IV_0_REG_OFFSET,
+                   uj_data.ref_values[0]);
+  abs_mmio_write32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_DIGEST_0_REG_OFFSET,
+                   uj_data.ref_values[1]);
+  abs_mmio_write32(
+      TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_MSG_LENGTH_LOWER_REG_OFFSET,
+      uj_data.ref_values[2]);
+  abs_mmio_write32(
+      TOP_EARLGREY_KEYMGR_BASE_ADDR + KEYMGR_SEALING_SW_BINDING_7_REG_OFFSET,
+      uj_data.ref_values[3]);
+  abs_mmio_write32(TOP_EARLGREY_KEYMGR_BASE_ADDR + KEYMGR_SALT_0_REG_OFFSET,
+                   uj_data.ref_values[4]);
+  abs_mmio_write32(
+      TOP_EARLGREY_CSRNG_BASE_ADDR + CSRNG_RESEED_INTERVAL_REG_OFFSET,
+      uj_data.ref_values[5]);
+  abs_mmio_write32(TOP_EARLGREY_CSRNG_BASE_ADDR + CSRNG_CTRL_REG_OFFSET,
+                   uj_data.ref_values[6]);
+  abs_mmio_write32(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR +
+                       SRAM_CTRL_READBACK_REG_OFFSET,
+                   uj_data.ref_values[7]);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_AES_BASE_ADDR + AES_CTRL_SHADOWED_REG_OFFSET,
+      uj_data.ref_values[8]);
+  abs_mmio_write32_shadowed(TOP_EARLGREY_KEYMGR_BASE_ADDR +
+                                KEYMGR_RESEED_INTERVAL_SHADOWED_REG_OFFSET,
+                            uj_data.ref_values[9]);
+  abs_mmio_write32(TOP_EARLGREY_EDN0_BASE_ADDR + EDN_CTRL_REG_OFFSET,
+                   uj_data.ref_values[10]);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+          ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_REG_OFFSET,
+      uj_data.ref_values[11]);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+          ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET,
+      uj_data.ref_values[12]);
+  abs_mmio_write32_shadowed(
+      TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+          ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET,
+      uj_data.ref_values[13]);
+  reg_x9 = uj_data.ref_values[14];
+  reg_x19 = uj_data.ref_values[15];
+  reg_x29 = uj_data.ref_values[16];
+  if (uj_data.trigger & 0x1) {
+    PENTEST_ASM_TRIGGER_LOW
+  }
+
+  if (uj_data.trigger & 0x2) {
+    PENTEST_ASM_TRIGGER_HIGH
+  }
+  asm volatile(NOP100);
+  if (uj_data.trigger & 0x2) {
+    PENTEST_ASM_TRIGGER_LOW
+  }
+
+  if (uj_data.trigger & 0x4) {
+    PENTEST_ASM_TRIGGER_HIGH
+  }
+  read_csrs[0] =
+      abs_mmio_read32(TOP_EARLGREY_AES_BASE_ADDR + AES_IV_0_REG_OFFSET);
+  read_csrs[1] =
+      abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR + HMAC_DIGEST_0_REG_OFFSET);
+  read_csrs[2] = abs_mmio_read32(TOP_EARLGREY_HMAC_BASE_ADDR +
+                                 HMAC_MSG_LENGTH_LOWER_REG_OFFSET);
+  read_csrs[3] = abs_mmio_read32(TOP_EARLGREY_KEYMGR_BASE_ADDR +
+                                 KEYMGR_SEALING_SW_BINDING_7_REG_OFFSET);
+  read_csrs[4] =
+      abs_mmio_read32(TOP_EARLGREY_KEYMGR_BASE_ADDR + KEYMGR_SALT_0_REG_OFFSET);
+
+  read_csrs[5] = abs_mmio_read32(TOP_EARLGREY_CSRNG_BASE_ADDR +
+                                 CSRNG_RESEED_INTERVAL_REG_OFFSET);
+  read_csrs[6] =
+      abs_mmio_read32(TOP_EARLGREY_CSRNG_BASE_ADDR + CSRNG_CTRL_REG_OFFSET);
+  read_csrs[7] = abs_mmio_read32(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR +
+                                 SRAM_CTRL_READBACK_REG_OFFSET);
+  read_csrs[8] = abs_mmio_read32(TOP_EARLGREY_AES_BASE_ADDR +
+                                 AES_CTRL_SHADOWED_REG_OFFSET);
+  read_csrs[9] = abs_mmio_read32(TOP_EARLGREY_KEYMGR_BASE_ADDR +
+                                 KEYMGR_RESEED_INTERVAL_SHADOWED_REG_OFFSET);
+  read_csrs[10] =
+      abs_mmio_read32(TOP_EARLGREY_EDN0_BASE_ADDR + EDN_CTRL_REG_OFFSET);
+  read_csrs[11] =
+      abs_mmio_read32(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+                      ALERT_HANDLER_CLASSA_TIMEOUT_CYC_SHADOWED_REG_OFFSET);
+  read_csrs[12] =
+      abs_mmio_read32(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+                      ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET);
+  read_csrs[13] =
+      abs_mmio_read32(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR +
+                      ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET);
+  read_csrs[14] = reg_x9;
+  read_csrs[15] = reg_x19;
+  read_csrs[16] = reg_x29;
+  if (uj_data.trigger & 0x4) {
+    PENTEST_ASM_TRIGGER_LOW
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_csr_combi_out_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.output, 0, sizeof(uj_output.output));
+
+  for (size_t it = 0; it < IBEXFI_NUM_CSR_COMBI; it++) {
+    if (read_csrs[it] != uj_data.ref_values[it]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+    }
+    uj_output.output[it] = read_csrs[it];
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send alerts back to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_csr_combi_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_flash_read(ujson_t *uj) __attribute__((optnone)) {
+  // Set the flash region we want to test.
+  ibex_fi_flash_region_t uj_data;
+  TRY(ujson_deserialize_ibex_fi_flash_region_t(uj, &uj_data));
+  if (uj_data.flash_region != flash_region_index) {
+    flash_region_index = uj_data.flash_region;
+    flash_init = false;
+  }
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (!flash_init) {
+    // Configure the data flash.
+    // Flash configuration.
+    dif_flash_ctrl_region_properties_t region_properties = {
+        .rd_en = kMultiBitBool4True,
+        .prog_en = kMultiBitBool4True,
+        .erase_en = kMultiBitBool4True,
+        .scramble_en = kMultiBitBool4True,
+        .ecc_en = kMultiBitBool4True,
+        .high_endurance_en = kMultiBitBool4False};
+
+    dif_flash_ctrl_data_region_properties_t data_region = {
+        .base = FLASH_PAGES_PER_BANK,
+        .size = 0x1,
+        .properties = region_properties};
+
+    dif_result_t res_prop = dif_flash_ctrl_set_data_region_properties(
+        &flash, flash_region_index, data_region);
+    dif_result_t res_en = dif_flash_ctrl_set_data_region_enablement(
+        &flash, flash_region_index, kDifToggleEnabled);
+    if (res_prop == kDifLocked || res_en == kDifLocked) {
+      LOG_INFO("Flash region locked, aborting!");
+      ibex_fi_empty_t uj_output;
+      uj_output.success = false;
+      RESP_OK(ujson_serialize_ibex_fi_empty_t, uj, &uj_output);
+      return OK_STATUS();
+    }
+
+    flash_init = true;
+    flash_test_page_addr = data_region.base * FLASH_PAGE_SZ;
+  }
+
+  mmio_region_t flash_test_page = mmio_region_from_addr(
+      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_test_page_addr);
+
+  if (!flash_data_valid) {
+    // Prepare page and write reference values into it.
+    uint32_t input_page[FLASH_UINT32_WORDS_PER_PAGE];
+    memset(input_page, 0x0, FLASH_UINT32_WORDS_PER_PAGE * sizeof(uint32_t));
+    for (int i = 0; i < kNumRefValues; i++) {
+      input_page[i] = ref_values[i];
+    }
+
+    // Erase flash and write page with reference values.
+    TRY(flash_ctrl_testutils_erase_and_write_page(
+        &flash, flash_test_page_addr, /*partition_id=*/0, input_page,
+        kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
+
+    flash_data_valid = true;
+  }
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("lw x5, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x6, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x7, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x12, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x13, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x14, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x15, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x16, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x17, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x28, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x29, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x30, (%0)" : : "r"((flash_test_page.base)));
+  asm volatile("lw x31, (%0)" : : "r"((flash_test_page.base)));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Check if one or multiple registers values are faulty.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[0]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+      // Re-init flash with valid data.
+      flash_data_valid = false;
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_flash_write(ujson_t *uj) __attribute__((optnone)) {
+  // Set the flash region we want to test.
+  ibex_fi_flash_region_t uj_data;
+  TRY(ujson_deserialize_ibex_fi_flash_region_t(uj, &uj_data));
+  if (uj_data.flash_region != flash_region_index) {
+    flash_region_index = uj_data.flash_region;
+    flash_init = false;
+  }
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (!flash_init) {
+    // Configure the data flash.
+    // Flash configuration.
+    dif_flash_ctrl_region_properties_t region_properties = {
+        .rd_en = kMultiBitBool4True,
+        .prog_en = kMultiBitBool4True,
+        .erase_en = kMultiBitBool4True,
+        .scramble_en = kMultiBitBool4True,
+        .ecc_en = kMultiBitBool4True,
+        .high_endurance_en = kMultiBitBool4False};
+
+    dif_flash_ctrl_data_region_properties_t data_region = {
+        .base = FLASH_PAGES_PER_BANK,
+        .size = 0x1,
+        .properties = region_properties};
+
+    dif_result_t res_prop = dif_flash_ctrl_set_data_region_properties(
+        &flash, flash_region_index, data_region);
+    dif_result_t res_en = dif_flash_ctrl_set_data_region_enablement(
+        &flash, flash_region_index, kDifToggleEnabled);
+    if (res_prop == kDifLocked || res_en == kDifLocked) {
+      ibex_fi_empty_t uj_output;
+      uj_output.success = false;
+      RESP_OK(ujson_serialize_ibex_fi_empty_t, uj, &uj_output);
+      return OK_STATUS();
+    }
+
+    flash_init = true;
+    flash_test_page_addr = data_region.base * FLASH_PAGE_SZ;
+  }
+
+  mmio_region_t flash_test_page = mmio_region_from_addr(
+      TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR + (uintptr_t)flash_test_page_addr);
+
+  // Prepare page and write reference values into it.
+  uint32_t input_page[FLASH_UINT32_WORDS_PER_PAGE];
+  memset(input_page, 0x0, FLASH_UINT32_WORDS_PER_PAGE * sizeof(uint32_t));
+  for (int i = 0; i < kNumRefValues; i++) {
+    input_page[i] = ref_values[i];
+  }
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Erase flash and write page with reference values.
+  TRY(flash_ctrl_testutils_erase_and_write_page(
+      &flash, flash_test_page_addr, /*partition_id=*/0, input_page,
+      kDifFlashCtrlPartitionTypeData, FLASH_UINT32_WORDS_PER_PAGE));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read back and compare against reference values.
+  uint32_t res_values[kNumRefValues];
+  uint32_t res = 0;
+  for (int i = 0; i < kNumRefValues; i++) {
+    res_values[i] =
+        mmio_region_read32(flash_test_page, i * (ptrdiff_t)sizeof(uint32_t));
+    if (res_values[i] != ref_values[i]) {
+      res |= 1;
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send res & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  uj_output.result = res;
+  uj_output.err_status = codes;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_complement_branch(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile(
+    "beq" " %0, %1, .L_HARDENED_%=;" \
+    ".UNIMP_%=: unimp;" \
+    "bne" " %0, %1, .UNIMP_%=;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2)
+  );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_unimp(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile("beq" " %0, %1, .L_HARDENED_%=;" \
+    "unimp;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2) );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_2_unimps(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile("beq" " %0, %1, .L_HARDENED_%=;" \
+    "unimp; unimp;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2) );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_3_unimps(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile("beq" " %0, %1, .L_HARDENED_%=;" \
+    "unimp; unimp; unimp;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2) );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_4_unimps(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile("beq" " %0, %1, .L_HARDENED_%=;" \
+    "unimp; unimp; unimp; unimp;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2) );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_hardened_check_eq_5_unimps(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Values are intentially not equal.
+  hardened_bool_t value1 = HARDENED_BOOL_TRUE;
+  hardened_bool_t value2 = HARDENED_BOOL_FALSE;
+
+  PENTEST_ASM_TRIGGER_HIGH
+  // The HARDENED_CHECK macro from hardened.h is solved explicitely.
+  // clang-format off
+  asm volatile("beq" " %0, %1, .L_HARDENED_%=;" \
+    "unimp; unimp; unimp; unimp; unimp;" \
+    ".L_HARDENED_%=:;"::"r"(value1), "r"(value2) );
+  // clang-format on
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_test_result_mult_t uj_output;
+  uj_output.err_status = codes;
+  uj_output.result1 = value1;
+  uj_output.result2 = value2;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_mem_op_loop(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Init the loop counters.
+  uint32_t loop_counter1 = 0;
+  uint32_t loop_counter2 = 10000;
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  for (int loop_cnt = 0; loop_cnt < 10000; loop_cnt++) {
+    asm volatile(LWADDISW1 : : "r"((uint32_t *)&loop_counter1));
+    asm volatile(LWSUBISW1 : : "r"((uint32_t *)&loop_counter2));
+  }
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send register file dump, loop counter, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_array_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send back loop counters.
+  memset(uj_output.result, 0, sizeof(uj_output.result));
+  uj_output.result[0] = loop_counter1;
+  uj_output.result[1] = loop_counter2;
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_array_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_register_file(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(NOP1000);
+  PENTEST_ASM_TRIGGER_LOW;
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Check if one or multiple registers values are faulty.
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Compare against reference values.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[compare_regs[it]]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_register_file_read(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("or x5, x5, x5");
+  asm volatile("or x6, x6, x6");
+  asm volatile("or x7, x7, x7");
+  asm volatile("or x12, x12, x12");
+  asm volatile("or x13, x13, x13");
+  asm volatile("or x14, x14, x14");
+  asm volatile("or x15, x15, x15");
+  asm volatile("or x16, x16, x16");
+  asm volatile("or x17, x17, x17");
+  asm volatile("or x28, x28, x28");
+  asm volatile("or x29, x29, x29");
+  asm volatile("or x30, x30, x30");
+  asm volatile("or x31, x31, x31");
+
+  asm volatile("or x5, x5, x5");
+  asm volatile("or x6, x6, x6");
+  asm volatile("or x7, x7, x7");
+  asm volatile("or x12, x12, x12");
+  asm volatile("or x13, x13, x13");
+  asm volatile("or x14, x14, x14");
+  asm volatile("or x15, x15, x15");
+  asm volatile("or x16, x16, x16");
+  asm volatile("or x17, x17, x17");
+  asm volatile("or x28, x28, x28");
+  asm volatile("or x29, x29, x29");
+  asm volatile("or x30, x30, x30");
+  asm volatile("or x31, x31, x31");
+
+  asm volatile("or x5, x5, x5");
+  asm volatile("or x6, x6, x6");
+  asm volatile("or x7, x7, x7");
+  asm volatile("or x12, x12, x12");
+  asm volatile("or x13, x13, x13");
+  asm volatile("or x14, x14, x14");
+  asm volatile("or x15, x15, x15");
+  asm volatile("or x16, x16, x16");
+  asm volatile("or x17, x17, x17");
+  asm volatile("or x28, x28, x28");
+  asm volatile("or x29, x29, x29");
+  asm volatile("or x30, x30, x30");
+  asm volatile("or x31, x31, x31");
+
+  asm volatile("or x5, x5, x5");
+  asm volatile("or x6, x6, x6");
+  asm volatile("or x7, x7, x7");
+  asm volatile("or x12, x12, x12");
+  asm volatile("or x13, x13, x13");
+  asm volatile("or x14, x14, x14");
+  asm volatile("or x15, x15, x15");
+  asm volatile("or x16, x16, x16");
+  asm volatile("or x17, x17, x17");
+  asm volatile("or x28, x28, x28");
+  asm volatile("or x29, x29, x29");
+  asm volatile("or x30, x30, x30");
+  asm volatile("or x31, x31, x31");
+
+  asm volatile("or x5, x5, x5");
+  asm volatile("or x6, x6, x6");
+  asm volatile("or x7, x7, x7");
+  asm volatile("or x12, x12, x12");
+  asm volatile("or x13, x13, x13");
+  asm volatile("or x14, x14, x14");
+  asm volatile("or x15, x15, x15");
+  asm volatile("or x16, x16, x16");
+  asm volatile("or x17, x17, x17");
+  asm volatile("or x28, x28, x28");
+  asm volatile("or x29, x29, x29");
+  asm volatile("or x30, x30, x30");
+  asm volatile("or x31, x31, x31");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Check if one or multiple registers values are faulty.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[compare_regs[it]]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_reg_op_loop(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Init x5=0 and x6=10000.
+  asm volatile(INITX5);
+  asm volatile(INITX6);
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  for (int loop_cnt = 0; loop_cnt < 10000; loop_cnt++) {
+    asm volatile(ADDI1);
+    asm volatile(SUBI1);
+  }
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_faulty_data_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Check if loop counters match expected values.
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.data_faulty, 0, sizeof(uj_output.data_faulty));
+  // x5 should be 10000.
+  if (registers_dumped[kRegX5] != 10000) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+  // x6 should be 0.
+  if (registers_dumped[kRegX6] != 0) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_single_beq(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Init x5 and x6.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x1a\n");
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(NOP10 "beq x5, x6, correctbeq\n" NOP10
+                     "j badbeq\n"
+                     "correctbeq:\n"
+                     "addi x5, x5, 0x11\n"
+                     "addi x6, x6, 0x22\n"
+                     "badbeq:\n");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != (0x11 + 0x1a)) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != (0x22 + 0x1a)) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_single_bne(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Init x5 and x6.
+  asm volatile("li x5, 0x1a\n");
+  asm volatile("li x6, 0x0a\n");
+
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(NOP10 "bne x5, x6, correctbne\n" NOP10
+                     "j badbne\n"
+                     "correctbne:\n"
+                     "addi x5, x5, 0x11\n"
+                     "addi x6, x6, 0x22\n"
+                     "badbne:\n");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  // If there is a mismatch, set data_faulty to true and return the
+  // faulty value.
+  if (registers_dumped[kRegX5] != (0x11 + 0x1a)) {
+    uj_output.data_faulty[0] = true;
+    uj_output.data[0] = registers_dumped[kRegX5];
+  }
+
+  if (registers_dumped[kRegX6] != (0x22 + 0x0a)) {
+    uj_output.data_faulty[1] = true;
+    uj_output.data[1] = registers_dumped[kRegX6];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_sram_read(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  int sram_buffer_size = sizeof(sram_main_buffer) / 4;
+  int sram_half_size = sram_buffer_size / 2;
+
+  // Init the SRAM with counter values.
+  for (size_t i = 0; i < sram_buffer_size; i++) {
+    sram_main_buffer[i] = i;
+  }
+
+  // Init the SRAM position we are reading from with ref_values[0].
+  sram_main_buffer[sram_half_size] = ref_values[0];
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Read from SRAM into temporary registers.
+  asm volatile("lw x5, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x6, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x7, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x12, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x13, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x14, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x15, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x16, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x17, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x28, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x29, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x30, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  asm volatile("lw x31, (%0)" : : "r"(&sram_main_buffer[sram_half_size]));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Check if one or multiple registers values are faulty.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[0]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_sram_read_ret(ujson_t *uj)
+    __attribute__((optnone)) {
+  if (!sram_ret_init) {
+    // Init retention SRAM, wipe and scramble it.
+    mmio_region_t addr =
+        mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR);
+    TRY(dif_sram_ctrl_init(addr, &ret_sram));
+    TRY(sram_ctrl_testutils_wipe(&ret_sram));
+    TRY(sram_ctrl_testutils_scramble(&ret_sram));
+    sram_ret_init = true;
+  }
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t *ret_ram = (uint32_t *)TOP_EARLGREY_RAM_RET_AON_BASE_ADDR;
+  size_t ret_ram_len = TOP_EARLGREY_RAM_RET_AON_SIZE_BYTES / sizeof(ret_ram[0]);
+  size_t ret_ram_half_len = ret_ram_len / 2;
+
+  // Write counter value into ret SRAM.
+  for (size_t i = 0; i < ret_ram_len; i++) {
+    ret_ram[i] = i;
+  }
+
+  // Init the SRAM position we are reading from with ref_values[0].
+  ret_ram[ret_ram_half_len] = ref_values[0];
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Read from ret. SRAM into temporary registers.
+  asm volatile("lw x5, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x6, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x7, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x12, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x13, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x14, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x15, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x16, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x17, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x28, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x29, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x30, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  asm volatile("lw x31, (%0)" : : "r"(&ret_ram[ret_ram_half_len]));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_data_sram_codes_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Check if one or multiple registers values are faulty.
+  size_t compare_regs[IBEXFI_MAX_FAULTY_ADDRESSES_DATA] = {
+      kRegX5,  kRegX6,  kRegX7,  kRegX12, kRegX13, kRegX14, kRegX15,
+      kRegX16, kRegX17, kRegX28, kRegX29, kRegX30, kRegX31};
+  for (size_t it = 0; it < IBEXFI_MAX_FAULTY_ADDRESSES_DATA; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[0]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Read the ret. SRAM errors from the status register.
+  dif_sram_ctrl_status_bitfield_t ret_sram_codes;
+  TRY(dif_sram_ctrl_get_status(&ret_sram, &ret_sram_codes));
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  uj_output.sram_err_status = ret_sram_codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_sram_codes_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_sram_static(ujson_t *uj) __attribute__((optnone)) {
+  if (!sram_ret_init) {
+    // Init retention SRAM, wipe and scramble it.
+    mmio_region_t addr =
+        mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR);
+    TRY(dif_sram_ctrl_init(addr, &ret_sram));
+    TRY(sram_ctrl_testutils_wipe(&ret_sram));
+    TRY(sram_ctrl_testutils_scramble(&ret_sram));
+    sram_ret_init = true;
+  }
+
+  int max_words = sizeof(retention_sram_owner_t) / sizeof(uint32_t);
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Get address of the ret. SRAM at the beginning of the owner section.
+  uintptr_t sram_ret_buffer_addr =
+      TOP_EARLGREY_SRAM_CTRL_RET_AON_RAM_BASE_ADDR +
+      offsetof(retention_sram_t, owner);
+  mmio_region_t sram_region_ret_addr =
+      mmio_region_from_addr(sram_ret_buffer_addr);
+
+  // Write reference value into SRAM.
+  for (int i = 0; i < max_words; i++) {
+    mmio_region_write32(sram_region_ret_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        ref_values[0]);
+  }
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(NOP1000);
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  ibex_fi_faulty_addresses_data_t uj_output;
+  // Send back register file dump.
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Compare against reference values.
+  memset(uj_output.addresses, 0, sizeof(uj_output.addresses));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  int faulty_address_pos = 0;
+  for (int sram_pos = 0; sram_pos < max_words; sram_pos++) {
+    uint32_t res_value = mmio_region_read32(
+        sram_region_ret_addr, sram_pos * (ptrdiff_t)sizeof(uint32_t));
+    if (res_value != ref_values[0]) {
+      uj_output.addresses[faulty_address_pos] = (uint32_t)sram_pos;
+      uj_output.data[faulty_address_pos] = res_value;
+      faulty_address_pos++;
+      // Currently, we register only up to IBEXFI_MAX_FAULTY_ADDRESSES_DATA
+      // faulty SRAM positions. If there are more, we overwrite the addresses
+      // array.
+      if (faulty_address_pos >= IBEXFI_MAX_FAULTY_ADDRESSES_DATA) {
+        faulty_address_pos = 0;
+      }
+    }
+  }
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send res & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_addresses_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_sram_write(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // Initialize SRAM region with inverse ref_values[0] to avoid that data from a
+  // previous run is still in memory.
+  for (int i = 0; i < IBEXFI_SRAM_WORDS; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        ~ref_values[0]);
+  }
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  for (int i = 0; i < IBEXFI_SRAM_WORDS; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        ref_values[i % 32]);
+  }
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send register file dump, memory dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_sram_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Return memory back to host.
+  for (int it = 0; it < IBEXFI_SRAM_WORDS; it++) {
+    uj_output.memory[it] = mmio_region_read32(sram_region_main_addr,
+                                              it * (ptrdiff_t)sizeof(uint32_t));
+  }
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_sram_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_conditional_branch(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_sram_write_read(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
   // FI code target.
-  uint32_t branch_if_ = 1;
-  uint32_t branch_else = 0;
-  sca_set_trigger_high();
-  asm volatile(NOP10);
-  for (int i = 0; i < 10000; i++) {
-    if (branch_if_ > 0) {
-      branch_if_++;
-    } else {
-      branch_else++;
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  ibex_fi_faulty_data_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Check if one or multiple registers values are faulty.
+  size_t compare_regs[3] = {kRegX5, kRegX6, kRegX7};
+  for (size_t it = 0; it < 3; it++) {
+    if (registers_dumped[compare_regs[it]] != ref_values[compare_regs[it]]) {
+      // If there is a mismatch, set data_faulty to true and return the
+      // faulty value.
+      uj_output.data_faulty[it] = true;
+      uj_output.data[it] = registers_dumped[compare_regs[it]];
     }
   }
-  sca_set_trigger_low();
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_faulty_data_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_sram_write_read_alt(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the SRAM with a counter
+  for (size_t i = 0; i < kSramWriteReadAltNumValues; i++) {
+    sram_main_buffer[i] = i;
+  }
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[0]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[1]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[1]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[2]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[2]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[3]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[3]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[4]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[4]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[5]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[5]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[6]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[6]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[7]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[7]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[8]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[8]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[9]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[9]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[10]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[10]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[11]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[11]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[12]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[12]));
+  asm volatile("sw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[13]));
+  asm volatile("lw x6, (%0)" : : "r"((uint32_t *)&sram_main_buffer[13]));
+  asm volatile("sw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[14]));
+  asm volatile("lw x7, (%0)" : : "r"((uint32_t *)&sram_main_buffer[14]));
+  asm volatile("sw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[15]));
+  asm volatile("lw x5, (%0)" : : "r"((uint32_t *)&sram_main_buffer[15]));
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Load the values stored in the sram buffer.
+  uint32_t sram_values[kSramWriteReadAltNumValues] = {0};
+  for (size_t i = 0; i < kSramWriteReadAltNumValues; i++) {
+    sram_values[i] = sram_main_buffer[i];
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send loop counters & ERR_STATUS to host.
-  ibex_fi_test_result_mult_t uj_output;
-  uj_output.result1 = branch_if_;
-  uj_output.result2 = branch_else;
+  ibex_fi_test_result_sram_t uj_output;
+  // Preset buffers to 0.
+  memset(uj_output.memory, 0, sizeof(uj_output.memory));
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+
+  // Return the 16 values from SRAM.
+  for (size_t it = 0; it < kSramWriteReadAltNumValues; it++) {
+    uj_output.memory[it] = sram_values[it];
+  }
+
+  // Return register file dump back to host.
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Send result & ERR_STATUS to host.
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_mult_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_sram_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_mem_op_loop(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_sram_write_static_unrolled(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // Initialize SRAM region with inverse ref_values to avoid that data from a
+  // previous run is still in memory.
+  for (int i = 0; i < IBEXFI_SRAM_WORDS; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        ~ref_values[0]);
+  }
+
+  // Initialize the register file before the FI trigger window.
+  INIT_TMP_REGISTER_FILE
 
   // FI code target.
-  uint32_t loop_counter1 = 0;
-  uint32_t loop_counter2 = 10000;
-  sca_set_trigger_high();
-  asm volatile(NOP100);
-  for (int loop_cnt = 0; loop_cnt < 10000; loop_cnt++) {
-    asm volatile(LWADDISW1 : : "r"((uint32_t *)&loop_counter1));
-    asm volatile(LWSUBISW1 : : "r"((uint32_t *)&loop_counter2));
+  // Unrolled for easier fault injection characterization.
+  PENTEST_ASM_TRIGGER_HIGH
+  mmio_region_write32(sram_region_main_addr, 0 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 1 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 2 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 3 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 4 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 5 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 6 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 7 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 8 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 9 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 10 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 11 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 12 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 13 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 14 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 15 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 16 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 17 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 18 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 19 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 20 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 21 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 22 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 23 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 24 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 25 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 26 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 27 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 28 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 29 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 30 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 31 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 32 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 33 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 34 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 35 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 36 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 37 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 38 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 39 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 40 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 41 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 42 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 43 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 44 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 45 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 46 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 47 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 48 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 49 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 50 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 51 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 52 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 53 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 54 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 55 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 56 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 57 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 58 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 59 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 60 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 61 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 62 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  mmio_region_write32(sram_region_main_addr, 63 * (ptrdiff_t)sizeof(uint32_t),
+                      ref_values[0]);
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_TMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send register file dump, memory dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_sram_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Return memory back to host.
+  for (int it = 0; it < IBEXFI_SRAM_WORDS; it++) {
+    uj_output.memory[it] = mmio_region_read32(sram_region_main_addr,
+                                              it * (ptrdiff_t)sizeof(uint32_t));
   }
-  sca_set_trigger_low();
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_sram_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_unconditional_branch(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Set the register that is used in the FI trigger window (x5) to 0.
+  asm volatile(INITX5);
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Attack target.
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  asm volatile("jal ra, increment_counter");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send loop counters & ERR_STATUS to host.
-  ibex_fi_loop_counter_mirrored_t uj_output;
-  uj_output.loop_counter1 = loop_counter1;
-  uj_output.loop_counter2 = loop_counter2;
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Incremented counter is stored in register x5.
+  uj_output.result = registers_dumped[kRegX5];
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_loop_counter_mirrored_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_unrolled_mem_op_loop(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_unconditional_branch_nop(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Set the register that is used in the FI trigger window (x5) to 0.
+  asm volatile(INITX5);
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
+  // Attack target.
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  asm volatile("jal ra, not_increment_counter");
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Incremented counter is stored in register x5.
+  uj_output.result = registers_dumped[kRegX5];
+
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_char_unrolled_mem_op_loop(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
   // FI code target.
   uint32_t loop_counter = 0;
-  sca_set_trigger_high();
-  asm volatile(NOP100);
+  PENTEST_ASM_TRIGGER_HIGH
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
@@ -767,67 +4078,49 @@ status_t handle_ibex_fi_char_unrolled_mem_op_loop(ujson_t *uj) {
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
   asm volatile(LWADDISW1000 : : "r"((uint32_t *)&loop_counter));
-  sca_set_trigger_low();
-
-  // Read ERR_STATUS register.
-  dif_rv_core_ibex_error_status_t codes;
-  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
-
-  // Send loop counter & ERR_STATUS to host.
-  ibex_fi_loop_counter_t uj_output;
-  uj_output.loop_counter = loop_counter;
-  uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_loop_counter_t, uj, &uj_output);
-  return OK_STATUS();
-}
+  PENTEST_ASM_TRIGGER_LOW
 
-status_t handle_ibex_fi_char_reg_op_loop(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
 
-  // FI code target.
-  uint32_t loop_counter1 = 0;
-  uint32_t loop_counter2 = 10000;
-  sca_set_trigger_high();
-  asm volatile(INITX5);
-  asm volatile(INITX6);
-  asm volatile(NOP100);
-  for (int loop_cnt = 0; loop_cnt < 10000; loop_cnt++) {
-    asm volatile(ADDI1);
-    asm volatile(SUBI1);
-  }
-  asm volatile("mv %0, x5" : "=r"(loop_counter1));
-  asm volatile("mv %0, x6" : "=r"(loop_counter2));
-  sca_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send loop counters & ERR_STATUS to host.
-  ibex_fi_loop_counter_mirrored_t uj_output;
-  uj_output.loop_counter1 = loop_counter1;
-  uj_output.loop_counter2 = loop_counter2;
+  // Send register file dump, loop counter, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  uj_output.result = loop_counter;
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_loop_counter_mirrored_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_unrolled_reg_op_loop(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_unrolled_reg_op_loop(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  // FI code target.
-  uint32_t loop_counter = 0;
-  sca_set_trigger_high();
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
+
+  // Set the register that is used in the FI trigger window (x5) to 0.
   asm volatile(INITX5);
-  asm volatile(NOP100);
+
+  // FI code target.
+  PENTEST_ASM_TRIGGER_HIGH
   asm volatile(ADDI1000);
   asm volatile(ADDI1000);
   asm volatile(ADDI1000);
@@ -838,138 +4131,232 @@ status_t handle_ibex_fi_char_unrolled_reg_op_loop(ujson_t *uj) {
   asm volatile(ADDI1000);
   asm volatile(ADDI1000);
   asm volatile(ADDI1000);
-  asm volatile("mv %0, x5" : "=r"(loop_counter));
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_LOW
+
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send loop counter & ERR_STATUS to host.
-  ibex_fi_loop_counter_t uj_output;
-  uj_output.loop_counter = loop_counter;
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Loop counter is stored in register x5.
+  uj_output.result = registers_dumped[kRegX5];
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_loop_counter_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_register_file(ujson_t *uj) {
-  // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
-  TRY(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
+status_t handle_ibex_fi_char_unrolled_reg_op_loop_chain(ujson_t *uj)
+    __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
 
-  uint32_t res_values[7];
+  // Initialize the register file before the FI trigger window.
+  INIT_REGISTER_FILE
 
-  // Initialize temporary registers with reference values.
-  asm volatile("li x5, %0" : : "i"(ref_values[0]));
-  asm volatile("li x6, %0" : : "i"(ref_values[1]));
-  asm volatile("li x7, %0" : : "i"(ref_values[2]));
-  asm volatile("li x28, %0" : : "i"(ref_values[3]));
-  asm volatile("li x29, %0" : : "i"(ref_values[4]));
-  asm volatile("li x30, %0" : : "i"(ref_values[5]));
-  asm volatile("li x31, %0" : : "i"(ref_values[6]));
+  // Set the registers that are used in the FI trigger window (x5, x6, x7, x28,
+  // x29, and x30) to 0.
+  asm volatile(INIT_TMPREGS);
 
   // FI code target.
-  sca_set_trigger_high();
-  asm volatile(NOP1000);
-  sca_set_trigger_low();
+  PENTEST_ASM_TRIGGER_HIGH
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  asm volatile(ADDI_CHAIN);
+  PENTEST_ASM_TRIGGER_LOW
 
-  // Load register values.
-  asm volatile("mv %0, x5" : "=r"(res_values[0]));
-  asm volatile("mv %0, x6" : "=r"(res_values[1]));
-  asm volatile("mv %0, x7" : "=r"(res_values[2]));
-  asm volatile("mv %0, x28" : "=r"(res_values[3]));
-  asm volatile("mv %0, x29" : "=r"(res_values[4]));
-  asm volatile("mv %0, x30" : "=r"(res_values[5]));
-  asm volatile("mv %0, x31" : "=r"(res_values[6]));
+  // Dump the register file after the FI trigger window.
+  DUMP_REGISTER_FILE
 
-  // Check if one or multiple registers values are faulty.
-  uint32_t res = 0;
-  for (int it = 0; it < 7; it++) {
-    if (res_values[it] != ref_values[it]) {
-      res |= 1;
-      LOG_ERROR("reg %d exp=%u got=%u", it, ref_values[it], res_values[it]);
-    }
-  }
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send result & ERR_STATUS to host.
-  ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  // Send register file dump, alerts & ERR_STATUS to host.
+  ibex_fi_test_result_array_t uj_output;
+  memset(uj_output.registers, 0, sizeof(uj_output.registers));
+  memcpy(uj_output.registers, registers_dumped, sizeof(registers_dumped));
+  // Return registers used in the FI trigger window back to the host.
+  memset(uj_output.result, 0, sizeof(uj_output.result));
+  uj_output.result[0] = registers_dumped[kRegX5];
+  uj_output.result[1] = registers_dumped[kRegX6];
+  uj_output.result[2] = registers_dumped[kRegX7];
+  uj_output.result[3] = registers_dumped[kRegX28];
+  uj_output.result[4] = registers_dumped[kRegX29];
+  uj_output.result[5] = registers_dumped[kRegX30];
+
   uj_output.err_status = codes;
-  RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_ibex_fi_test_result_array_t, uj, &uj_output);
+
   return OK_STATUS();
 }
 
-status_t handle_ibex_fi_char_register_file_read(ujson_t *uj) {
+status_t handle_ibex_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Enable the flash.
+  flash_info = dif_flash_ctrl_get_device_info();
+  TRY(dif_flash_ctrl_init_state(
+      &flash, mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+  TRY(flash_ctrl_testutils_wait_for_init(&flash));
+
+  // Init OTP.
+  TRY(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp));
+
   // Configure Ibex to allow reading ERR_STATUS register.
-  dif_rv_core_ibex_t rv_core_ibex;
   TRY(dif_rv_core_ibex_init(
       mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
       &rv_core_ibex));
 
-  uint32_t res_values[3];
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
 
-  // Initialize temporary registers with reference values.
-  asm volatile("li x5, %0" : : "i"(ref_values[0]));
-  asm volatile("li x6, %0" : : "i"(ref_values[1]));
-  asm volatile("li x7, %0" : : "i"(ref_values[2]));
-  asm volatile("li x28, 0");
-  asm volatile("li x29, 0");
-  asm volatile("li x30, 0");
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
 
-  // FI code target.
-  sca_set_trigger_high();
-  asm volatile("mv x28, x5");
-  asm volatile("mv x29, x6");
-  asm volatile("mv x30, x7");
-  sca_set_trigger_low();
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
 
-  // Load register values.
-  asm volatile("mv %0, x28" : "=r"(res_values[0]));
-  asm volatile("mv %0, x29" : "=r"(res_values[1]));
-  asm volatile("mv %0, x30" : "=r"(res_values[2]));
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
 
-  // Check if one or multiple registers values are faulty.
-  uint32_t res = 0;
-  for (int it = 0; it < 3; it++) {
-    if (res_values[it] != ref_values[it]) {
-      res |= 1;
-      LOG_ERROR("reg %d exp=%u got=%u", it, ref_values[it], res_values[it]);
-    }
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  // Initialize flash for the flash test and write reference values into page.
+  flash_init = false;
+  flash_data_valid = false;
+  // Initialize retention SRAM.
+  sram_ret_init = false;
+  // Fetch reference values from OTP before OTP tests.
+  otp_ref_init = false;
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_otp_data_read(ujson_t *uj) __attribute__((optnone)) {
+  TRY(init_ref_otp_data());
+  TRY(read_otp_partitions(uj));
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_otp_read_lock(ujson_t *uj) __attribute__((optnone)) {
+  TRY(init_ref_otp_data());
+  TRY(dif_otp_ctrl_lock_reading(&otp, kDifOtpCtrlPartitionVendorTest));
+  TRY(dif_otp_ctrl_lock_reading(&otp, kDifOtpCtrlPartitionCreatorSwCfg));
+  TRY(dif_otp_ctrl_lock_reading(&otp, kDifOtpCtrlPartitionOwnerSwCfg));
+
+  TRY(read_otp_partitions(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_ibex_fi_otp_write_lock(ujson_t *uj) __attribute__((optnone)) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint64_t faulty_token[kSecret0TestUnlockTokenSizeIn64BitWords];
+  for (size_t i = 0; i < kSecret0TestUnlockTokenSizeIn64BitWords; i++) {
+    faulty_token[i] = 0xdeadbeef;
   }
+  pentest_set_trigger_high();
+  asm volatile(NOP10);
+  TRY(otp_ctrl_testutils_dai_write64(
+      &otp, kDifOtpCtrlPartitionSecret0, kSecret0TestUnlockTokenOffset,
+      faulty_token, kSecret0TestUnlockTokenSizeIn64BitWords));
+  asm volatile(NOP10);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read ERR_STATUS register.
   dif_rv_core_ibex_error_status_t codes;
   TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
 
-  // Send result & ERR_STATUS to host.
+  // Send res & ERR_STATUS to host.
   ibex_fi_test_result_t uj_output;
-  uj_output.result = res;
+  uj_output.result =
+      0;  // Writing to the locked OTP partition crashes the chip.
   uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_ibex_fi_test_result_t, uj, &uj_output);
-  return OK_STATUS();
-}
-
-status_t handle_ibex_fi_init_trigger(ujson_t *uj) {
-  sca_select_trigger_type(kScaTriggerTypeSw);
-  // As we are using the software defined trigger, the first argument of
-  // sca_init is not needed. kScaTriggerSourceAes is selected as a placeholder.
-  sca_init(kScaTriggerSourceAes, kScaPeripheralIoDiv4);
-
-  // Disable the instruction cache and dummy instructions for FI attacks.
-  sca_configure_cpu();
-
-  // Enable the flash.
-  flash_info = dif_flash_ctrl_get_device_info();
-  TRY(dif_flash_ctrl_init_state(
-      &flash, mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
-  TRY(flash_ctrl_testutils_wait_for_init(&flash));
 
   return OK_STATUS();
 }
@@ -978,40 +4365,100 @@ status_t handle_ibex_fi(ujson_t *uj) {
   ibex_fi_subcommand_t cmd;
   TRY(ujson_deserialize_ibex_fi_subcommand_t(uj, &cmd));
   switch (cmd) {
-    case kIbexFiSubcommandInitTrigger:
-      return handle_ibex_fi_init_trigger(uj);
-    case kIbexFiSubcommandCharUnrolledRegOpLoop:
-      return handle_ibex_fi_char_unrolled_reg_op_loop(uj);
-    case kIbexFiSubcommandCharRegOpLoop:
-      return handle_ibex_fi_char_reg_op_loop(uj);
-    case kIbexFiSubcommandCharUnrolledMemOpLoop:
-      return handle_ibex_fi_char_unrolled_mem_op_loop(uj);
+    case kIbexFiSubcommandAddressTranslation:
+      return handle_ibex_fi_address_translation(uj);
+    case kIbexFiSubcommandAddressTranslationCfg:
+      return handle_ibex_fi_address_translation_config(uj);
+    case kIbexFiSubcommandCharAddiSingleBeq:
+      return handle_ibex_fi_char_addi_single_beq(uj);
+    case kIbexFiSubcommandCharAddiSingleBeqCm:
+      return handle_ibex_fi_char_addi_single_beq_cm(uj);
+    case kIbexFiSubcommandCharAddiSingleBeqCm2:
+      return handle_ibex_fi_char_addi_single_beq_cm2(uj);
+    case kIbexFiSubcommandCharAddiSingleBeqNeg:
+      return handle_ibex_fi_char_addi_single_beq_neg(uj);
+    case kIbexFiSubcommandCharAddiSingleBne:
+      return handle_ibex_fi_char_addi_single_bne(uj);
+    case kIbexFiSubcommandCharAddiSingleBneNeg:
+      return handle_ibex_fi_char_addi_single_bne_neg(uj);
+    case kIbexFiSubcommandCharCombi:
+      return handle_ibex_fi_char_combi(uj);
+    case kIbexFiSubcommandCharCondBranchBeq:
+      return handle_ibex_fi_char_conditional_branch_beq(uj);
+    case kIbexFiSubcommandCharCondBranchBge:
+      return handle_ibex_fi_char_conditional_branch_bge(uj);
+    case kIbexFiSubcommandCharCondBranchBgeu:
+      return handle_ibex_fi_char_conditional_branch_bgeu(uj);
+    case kIbexFiSubcommandCharCondBranchBlt:
+      return handle_ibex_fi_char_conditional_branch_blt(uj);
+    case kIbexFiSubcommandCharCondBranchBltu:
+      return handle_ibex_fi_char_conditional_branch_bltu(uj);
+    case kIbexFiSubcommandCharCondBranchBne:
+      return handle_ibex_fi_char_conditional_branch_bne(uj);
+    case kIbexFiSubcommandCharCsrRead:
+      return handle_ibex_fi_char_csr_read(uj);
+    case kIbexFiSubcommandCharCsrWrite:
+      return handle_ibex_fi_char_csr_write(uj);
+    case kIbexFiSubcommandCharCsrCombi:
+      return handle_ibex_fi_char_csr_combi(uj);
+    case kIbexFiSubcommandCharFlashRead:
+      return handle_ibex_fi_char_flash_read(uj);
+    case kIbexFiSubcommandCharFlashWrite:
+      return handle_ibex_fi_char_flash_write(uj);
+    case kIbexFiSubcommandCharHardenedCheckComplementBranch:
+      return handle_ibex_fi_char_hardened_check_eq_complement_branch(uj);
+    case kIbexFiSubcommandCharHardenedCheckUnimp:
+      return handle_ibex_fi_char_hardened_check_eq_unimp(uj);
+    case kIbexFiSubcommandCharHardenedCheck2Unimps:
+      return handle_ibex_fi_char_hardened_check_eq_2_unimps(uj);
+    case kIbexFiSubcommandCharHardenedCheck3Unimps:
+      return handle_ibex_fi_char_hardened_check_eq_3_unimps(uj);
+    case kIbexFiSubcommandCharHardenedCheck4Unimps:
+      return handle_ibex_fi_char_hardened_check_eq_4_unimps(uj);
+    case kIbexFiSubcommandCharHardenedCheck5Unimps:
+      return handle_ibex_fi_char_hardened_check_eq_5_unimps(uj);
     case kIbexFiSubcommandCharMemOpLoop:
       return handle_ibex_fi_char_mem_op_loop(uj);
     case kIbexFiSubcommandCharRegisterFile:
       return handle_ibex_fi_char_register_file(uj);
     case kIbexFiSubcommandCharRegisterFileRead:
       return handle_ibex_fi_char_register_file_read(uj);
-    case kIbexFiSubcommandCharCondBranch:
-      return handle_ibex_fi_char_conditional_branch(uj);
-    case kIbexFiSubcommandCharUncondBranch:
-      return handle_ibex_fi_char_unconditional_branch(uj);
-    case kIbexFiSubcommandCharSramWrite:
-      return handle_ibex_fi_char_sram_write(uj);
+    case kIbexFiSubcommandCharRegOpLoop:
+      return handle_ibex_fi_char_reg_op_loop(uj);
+    case kIbexFiSubcommandCharSingleBeq:
+      return handle_ibex_fi_char_single_beq(uj);
+    case kIbexFiSubcommandCharSingleBne:
+      return handle_ibex_fi_char_single_bne(uj);
     case kIbexFiSubcommandCharSramRead:
       return handle_ibex_fi_char_sram_read(uj);
-    case kIbexFiSubcommandCharFlashWrite:
-      return handle_ibex_fi_char_flash_write(uj);
-    case kIbexFiSubcommandCharFlashRead:
-      return handle_ibex_fi_char_flash_read(uj);
-    case kIbexFiSubcommandCharCsrWrite:
-      return handle_ibex_fi_char_csr_write(uj);
-    case kIbexFiSubcommandCharCsrRead:
-      return handle_ibex_fi_char_csr_read(uj);
-    case kIbexFiSubcommandAddressTranslationCfg:
-      return handle_ibex_fi_address_translation_config(uj);
-    case kIbexFiSubcommandAddressTranslation:
-      return handle_ibex_fi_address_translation(uj);
+    case kIbexFiSubcommandCharSramReadRet:
+      return handle_ibex_fi_char_sram_read_ret(uj);
+    case kIbexFiSubcommandCharSramStatic:
+      return handle_ibex_fi_char_sram_static(uj);
+    case kIbexFiSubcommandCharSramWrite:
+      return handle_ibex_fi_char_sram_write(uj);
+    case kIbexFiSubcommandCharSramWriteRead:
+      return handle_ibex_fi_char_sram_write_read(uj);
+    case kIbexFiSubcommandCharSramWriteReadAlt:
+      return handle_ibex_fi_char_sram_write_read_alt(uj);
+    case kIbexFiSubcommandCharSramWriteStaticUnrolled:
+      return handle_ibex_fi_char_sram_write_static_unrolled(uj);
+    case kIbexFiSubcommandCharUncondBranch:
+      return handle_ibex_fi_char_unconditional_branch(uj);
+    case kIbexFiSubcommandCharUncondBranchNop:
+      return handle_ibex_fi_char_unconditional_branch_nop(uj);
+    case kIbexFiSubcommandCharUnrolledMemOpLoop:
+      return handle_ibex_fi_char_unrolled_mem_op_loop(uj);
+    case kIbexFiSubcommandCharUnrolledRegOpLoop:
+      return handle_ibex_fi_char_unrolled_reg_op_loop(uj);
+    case kIbexFiSubcommandCharUnrolledRegOpLoopChain:
+      return handle_ibex_fi_char_unrolled_reg_op_loop_chain(uj);
+    case kIbexFiSubcommandInit:
+      return handle_ibex_fi_init(uj);
+    case kIbexFiSubcommandOtpDataRead:
+      return handle_ibex_fi_otp_data_read(uj);
+    case kIbexFiSubcommandOtpReadLock:
+      return handle_ibex_fi_otp_read_lock(uj);
     default:
       LOG_ERROR("Unrecognized IBEX FI subcommand: %d", cmd);
       return INVALID_ARGUMENT();
diff --git a/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h b/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h
index aea44e72750ff..89c9680789af0 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h
+++ b/sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h
@@ -8,6 +8,44 @@
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/ujson/ujson.h"
 
+enum {
+  /**
+   * Mapping from register name (e.g., x5) to position in register array.
+   */
+  kRegX0 = 0,
+  kRegX1 = 1,
+  kRegX2 = 2,
+  kRegX3 = 3,
+  kRegX4 = 4,
+  kRegX5 = 5,
+  kRegX6 = 6,
+  kRegX7 = 7,
+  kRegX8 = 8,
+  kRegX9 = 9,
+  kRegX10 = 10,
+  kRegX11 = 11,
+  kRegX12 = 12,
+  kRegX13 = 13,
+  kRegX14 = 14,
+  kRegX15 = 15,
+  kRegX16 = 16,
+  kRegX17 = 17,
+  kRegX18 = 18,
+  kRegX19 = 19,
+  kRegX20 = 20,
+  kRegX21 = 21,
+  kRegX22 = 22,
+  kRegX23 = 23,
+  kRegX24 = 24,
+  kRegX25 = 25,
+  kRegX26 = 26,
+  kRegX27 = 27,
+  kRegX28 = 28,
+  kRegX29 = 29,
+  kRegX30 = 30,
+  kRegX31 = 31,
+};
+
 /**
  * ibex.fi.address_translation command handler.
  *
@@ -52,24 +90,239 @@ status_t handle_ibex_fi_address_translation(ujson_t *uj);
 status_t handle_ibex_fi_address_translation_config(ujson_t *uj);
 
 /**
- * ibex.fi.char.csr_write command handler.
+ * ibex.fi.char_addi_single_beq command handler.
+ * Similar to handle_ibex_fi_char_single_beq but replaces nops by addi.
  *
  * This FI penetration tests executes the following instructions:
- * - Set the trigger.
  * - Add 10 NOPs to delay the trigger
- * - Write reference values into CSR.
- * - Unset the trigger.
- * - Read value from CSR.
- * - Compare the values.
+ * - Execute 1 beq instruction. Without a fault, the branch is taken where two
+ * register values are set to a pattern that can be detected at the host. With a
+ * fault, the branch is not taken and the register values are not set.
+ * - Perform addi operations to indicate where faults happened around the beq
+ * test.
  * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
  *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_addi_single_beq(ujson_t *uj);
+
+/**
+ * ibex.fi.char_addi_single_beq_cm command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute the HARDENED_CHECK_EQ macro. Without a fault, the Ibex will execute
+ * an unimp crashing it. With a fault, the macro could be skipped where the
+ * information is given to the host.
+ * - Perform addi operations to indicate where faults happened around the test.
+ * - Return the values over UART.
  * Faults are injected during the trigger_high & trigger_low.
  * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_csr_write(ujson_t *uj);
+status_t handle_ibex_fi_char_addi_single_beq_cm(ujson_t *uj);
+
+/**
+ * ibex.fi.char_addi_single_beq_cm2 command handler.
+ *
+ * Similar to handle_ibex_fi_char_addi_single_beq_cm but with an extra unimp.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_addi_single_beq_cm2(ujson_t *uj);
+
+/**
+ * ibex.fi.char_addi_single_beq command handler.
+ * Similar to handle_ibex_fi_char_addi_single_beq but sets input values not
+ * equal to each other.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 1 beq instruction. Without a fault, the branch is not taken. With a
+ * fault, the branch is taken and two
+ * register values are set to a pattern that can be detected at the host.
+ * - Perform addi operations to indicate where faults happened around the beq
+ * test.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_addi_single_beq_neg(ujson_t *uj);
+
+/**
+ * ibex.fi.char_addi_single_bne command handler.
+ * Similar to handle_ibex_fi_char_single_bne but replaces nops by addi.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 1 bne instruction. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybeq where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Perform addi operations to indicate where faults happened around the bne
+ * test.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_addi_single_bne(ujson_t *uj);
+
+/**
+ * ibex.fi.char_addi_single_bne_neg command handler.
+ * Similar to handle_ibex_fi_char_addi_single_bne but sets input values equal to
+ * each other.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 1 bne instruction. Without a fault, the branch is taken.
+ *   In the faulty case, a branch redirects the control-flow where two register
+ * values are not set such that the taking of the branch can be detected at the
+ * host.
+ * - Perform addi operations to indicate where faults happened around the bne
+ * test.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_addi_single_bne_neg(ujson_t *uj);
+
+/**
+ * ibex.char_combi command handler.
+ *
+ * This FI penetration test executes three main tests:
+ * - A combination of branch tests
+ * - The loading, incrementing, and storing of values
+ * - Jump tests
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_combi(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_beq command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 beq instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybeq where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_beq(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_bge command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 bge instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybge where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_bge(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_bgeu command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 bgeu instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybgeu where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_bgeu(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_blt command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 blt instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultyblt where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_blt(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_bltu command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 bltu instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybltu where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_bltu(ujson_t *uj);
+
+/**
+ * ibex.fi.char.conditional_branch_bne command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 bne instructions. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybne where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_conditional_branch_bne(ujson_t *uj);
 
 /**
  * ibex.fi.char.csr_read command handler.
@@ -92,7 +345,82 @@ status_t handle_ibex_fi_char_csr_write(ujson_t *uj);
 status_t handle_ibex_fi_char_csr_read(ujson_t *uj);
 
 /**
- * ibex.char.flash_read command handler.
+ * ibex.fi.char.csr_write command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Init x5 with reference value.
+ * - Set the trigger.
+ * - Add 10 NOPs to delay the trigger
+ * - Repeat:
+ *  - Write x5 into CSR.
+ *  - Read CSR into x5
+ * - Unset the trigger.
+ * - Compare x5 with reference value.
+ * - Return the values over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_csr_write(ujson_t *uj);
+
+/**
+ * ibex.fi.char.csr_combi command handler.
+ *
+ * Note that this test configures the CSRs of the chip by user specified inputs.
+ * This test can be highly volatile in its responses. Namely, inputs can crash
+ * the chip or provide for HW alerts. The test is not dangerous to the chip
+ * itself in that a reset clear it. Please check some input vectors which are
+ * safe to use in the test framework in fi_ibex.json
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Set the trigger.
+ * - Write reference values to a list of CSRs.
+ * - Unset the trigger.
+ * - Set the trigger.
+ * - Do nothing.
+ * - Unset the trigger.
+ * - Set the trigger.
+ * - Read CSRs.
+ * - Unset the trigger.
+ * - Compare the read values with the reference values.
+ * - Return the values over UART.
+ *
+ * The CSRs written and read are
+ * - AES_IV_0: Unprotected register
+ * - HMAC_MSG_LENGTH_LOWER: Unprotected register
+ * - HMAC_DIGEST_0: Unprotected register
+ * - KEYMGR_SEALING_SW_BINDING_7: Unprotected register
+ * - KEYMGR_SALT_0: Unprotected register
+ * - CSRNG_RESEED_INTERVAL: Unprotected register
+ * - RAM_CTRL_READBACK: Register only accepting kMultiBitBool4True and
+ * kMultiBitBool4False
+ * - AES_CTRL: Shadowed register only accepting one-hot
+ * encodings for each part of the register
+ * - KEYMGR_RESEED_INTERVAL: Shadowed
+ * register
+ * - CSRNG_CTRL_REG_OFFSET: Register only accepting kMultiBitBool4True and
+ * kMultiBitBool4False
+ * - EDN_CTRL: Register only accepting kMultiBitBool4True and
+ * kMultiBitBool4False
+ * - ALERT_HANDLER_CLASSA_TIMEOUT_CYC: Shadowed register
+ * - ALERT_HANDLER_CLASSA_PHASE0_CYC: Shadowed register
+ * - ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET: Shadowed register
+ *
+ * In addition, the working registers x9, x19, and x29 are written to and read
+ * back.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_csr_combi(ujson_t *uj);
+
+/**
+ * ibex.fi.char.flash_read command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Write reference values into flash.
@@ -112,7 +440,7 @@ status_t handle_ibex_fi_char_csr_read(ujson_t *uj);
 status_t handle_ibex_fi_char_flash_read(ujson_t *uj);
 
 /**
- * ibex.char.flash_write command handler.
+ * ibex.fi.char.flash_write command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Set the trigger.
@@ -131,7 +459,186 @@ status_t handle_ibex_fi_char_flash_read(ujson_t *uj);
 status_t handle_ibex_fi_char_flash_write(ujson_t *uj);
 
 /**
- * ibex.char.sram_read command handler.
+ * ibex.fi.char.hardened_check_eq_complement_branch command handler.
+ *
+ * Same as ibex.fi.char.hardened_check_eq_unimp but with an additional
+ * complement branch to the unimp instruction.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_complement_branch(ujson_t *uj);
+
+/**
+ * ibex.fi.char.hardened_check_eq_unimp command handler.
+ *
+ * Inject faults during a hardened check is executed. As the values to compare
+ * are not equal, this test is expected to crash the system.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_unimp(ujson_t *uj);
+
+/**
+ * ibex.fi.char.hardened_check_eq_2_unimps command handler.
+ *
+ * Same as ibex.fi.char.hardened_check_eq_unimp but with 2 unimp instructions.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_2_unimps(ujson_t *uj);
+
+/**
+ * ibex.fi.char.hardened_check_eq_3_unimps command handler.
+ *
+ * Same as ibex.fi.char.hardened_check_eq_unimp but with 3 unimp instructions.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_3_unimps(ujson_t *uj);
+
+/**
+ * ibex.fi.char.hardened_check_eq_4_unimps command handler.
+ *
+ * Same as ibex.fi.char.hardened_check_eq_unimp but with 4 unimp instructions.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_4_unimps(ujson_t *uj);
+
+/**
+ * ibex.fi.char.hardened_check_eq_5_unimps command handler.
+ *
+ * Same as ibex.fi.char.hardened_check_eq_unimp but with 5 unimp instructions.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_hardened_check_eq_5_unimps(ujson_t *uj);
+
+/**
+ * ibex.fi.char.mem_op_loop command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 100 NOPs to delay the trigger
+ * - 10000 iterations with a for loop:
+ *  - Load loop_counter1 value into x5: lw x5, (&loop_counter1)
+ *  - Increment loop counter1: addi x5, x5, 1
+ *  - Store loop counter1 back to loop_counter1: sw x5, (&loop_counter1)
+ *  - Load loop_counter2 value into x6: lw x6, (&loop_counter2)
+ *  - Decrement loop counter2: addi x6, x6, -1
+ *  - Store loop counter2 back to loop_counter2: sw x6, (&loop_counter2)
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_mem_op_loop(ujson_t *uj);
+
+/**
+ * ibex.fi.char.register_file command handler.
+ *
+ * This FI penetration test executes the following instructions:
+ * - Initialize temp. registers with reference values
+ * - Execute 1000 NOPs
+ * - Read back temp. register values and compare against reference values
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_register_file(ujson_t *uj);
+
+/**
+ * ibex.fi.char.register_file_read command handler.
+ *
+ * This FI penetration test executes the following instructions:
+ * - Initialize temp. registers with reference values
+ * - or reg reg reg
+ * - Compare against reference values
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_register_file_read(ujson_t *uj);
+
+/**
+ * ibex.fi.char.reg_op_loop command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Initialize register x5=0 & x6=10000
+ * - Add 100 NOPs to delay the trigger
+ * - Perform 10000 x5 = x5 + 1 additions and x6 = x6 - 1 subtractions
+ * - Return the values over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_reg_op_loop(ujson_t *uj);
+
+/**
+ * ibex.fi.char_single_beq command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 1 beq instruction. Without a fault, the branch is taken where two
+ * register values are set to a pattern that can be detected at the host. With a
+ * fault, the branch is not taken and the register values are not set.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_single_beq(ujson_t *uj);
+
+/**
+ * ibex.fi.char_single_bne command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 1 bne instruction. Without a fault, the branch is not taken.
+ *   In the faulty case, a branch redirects the control-flow to the label
+ *   endfitestfaultybeq where two register values are set to a pattern that can
+ *   be detected at the host.
+ * - Return the values over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_single_bne(ujson_t *uj);
+
+/**
+ * ibex.fi.char.sram_read command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Write reference values into SRAM.
@@ -151,7 +658,40 @@ status_t handle_ibex_fi_char_flash_write(ujson_t *uj);
 status_t handle_ibex_fi_char_sram_read(ujson_t *uj);
 
 /**
- * ibex.char.sram_write command handler.
+ * ibex.fi.char.sram_read_ret command handler.
+ *
+ * Same as handle_ibex_fi_char_sram_read but runs on the retention SRAM instead
+ * of the main SRAM.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_sram_read(ujson_t *uj);
+
+/**
+ * ibex.fi.char.sram_static command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Write ref_values[0] to the 4kB retention SRAM.
+ * - Set the trigger.
+ * - Add 1000 NOPs to give the setup the chance to inject faults.
+ * - Unset the trigger.
+ * - Read back content of the ret. SRAM and compare against reference value.
+ * - If faulty words are detected, transmit addresses back to host.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_sram_static(ujson_t *uj);
+
+/**
+ * ibex.fi.char.sram_write command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Set the trigger.
@@ -170,79 +710,106 @@ status_t handle_ibex_fi_char_sram_read(ujson_t *uj);
 status_t handle_ibex_fi_char_sram_write(ujson_t *uj);
 
 /**
- * ibex.char.unconditional_branch command handler.
+ * ibex.fi.char.sram_write_read command handler.
  *
  * This FI penetration tests executes the following instructions:
+ * - Set the trigger.
  * - Add 10 NOPs to delay the trigger
- * - 10000 iterations with a for loop:
- *  - Execute an unconditional branch instruction
- *  - Increment variable
+ * - Do 16 times:
+ *  - sw t0, 0(SRAM_ADDR)
+ *  - lw t0, 0(SRAM_ADDR)
+ *  - sw t1, 0(SRAM_ADDR)
+ *  - lw t1, 0(SRAM_ADDR)
+ *  - sw t2, 0(SRAM_ADDR)
+ *  - lw t2, 0(SRAM_ADDR)
+ * - Unset the trigger.
+ * - Read back values and compare.
  * - Return the values over UART.
+ *
  * Faults are injected during the trigger_high & trigger_low.
  * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_unconditional_branch(ujson_t *uj);
+status_t handle_ibex_fi_char_sram_write_read(ujson_t *uj);
 
 /**
- * ibex.char.conditional_branch command handler.
+ * ibex.fi.char.sram_write_read_alt command handler.
  *
  * This FI penetration tests executes the following instructions:
+ * - Set the trigger.
  * - Add 10 NOPs to delay the trigger
- * - 10000 iterations with a for loop:
- *  - Execute a branch instruction
- *  - Increment variable if branch is taken or not
+ * - Store a reference value in SRAM, load the value back in a different
+ * register and repeat for a different SRAM address repeated 16 times.
+ * - Unset the trigger.
+ * - Read back values from the registers and the SRAM and compare.
  * - Return the values over UART.
+ *
  * Faults are injected during the trigger_high & trigger_low.
  * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_conditional_branch(ujson_t *uj);
+status_t handle_ibex_fi_char_sram_write_read_alt(ujson_t *uj);
 
 /**
- * ibex.char.mem_op_loop command handler.
+ * ibex.fi.char.sram_write_static_unrolled command handler.
  *
  * This FI penetration tests executes the following instructions:
- * - Add 100 NOPs to delay the trigger
- * - 10000 iterations with a for loop:
- *  - Load loop_counter1 value into x5: lw x5, (&loop_counter1)
- *  - Increment loop counter1: addi x5, x5, 1
- *  - Store loop counter1 back to loop_counter1: sw x5, (&loop_counter1)
- *  - Load loop_counter2 value into x6: lw x6, (&loop_counter2)
- *  - Decrement loop counter2: addi x6, x6, -1
- *  - Store loop counter2 back to loop_counter2: sw x6, (&loop_counter2)
+ * - Set the trigger.
+ * - Add 10 NOPs to delay the trigger
+ * - Write 32 static values into SRAM.
+ * - Unset the trigger.
+ * - Read back values and compare.
  * - Return the values over UART.
+ *
  * Faults are injected during the trigger_high & trigger_low.
  * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_mem_op_loop(ujson_t *uj);
+status_t handle_ibex_fi_char_sram_write_static_unrolled(ujson_t *uj);
 
 /**
- * ibex.char.reg_op_loop command handler.
+ * ibex.fi.char.unconditional_branch command handler.
  *
  * This FI penetration tests executes the following instructions:
- * - Initialize register x5=0 & x6=10000
- * - Add 100 NOPs to delay the trigger
- * - Perform 10000 x5 = x5 + 1 additions and x6 = x6 - 1 subtractions
- * - Return the values over UART.
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 JAL uncond. branches to the following instruction sequence:
+ *   addi x5, x5, 1
+ *   ret
+ * - Return the increment counter value over UART.
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_unconditional_branch(ujson_t *uj);
+
+/**
+ * ibex.fi.char.unconditional_branch_nop command handler.
  *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger
+ * - Execute 30 JAL uncond. branches to the following instruction sequence:
+ *   ret
+ *   10x addi x5, x5, 1
+ *   ret
+ * - Return the increment counter value over UART.
  * Faults are injected during the trigger_high & trigger_low.
  * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_reg_op_loop(ujson_t *uj);
+status_t handle_ibex_fi_char_unconditional_branch_nop(ujson_t *uj);
 
 /**
- * ibex.char.unrolled_mem_op_loop command handler.
+ * ibex.fi.char.unrolled_mem_op_loop command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Add 100 NOPs to delay the trigger
@@ -260,7 +827,7 @@ status_t handle_ibex_fi_char_reg_op_loop(ujson_t *uj);
 status_t handle_ibex_fi_char_unrolled_mem_op_loop(ujson_t *uj);
 
 /**
- * ibex.char.unrolled_reg_op_loop command handler.
+ * ibex.fi.char.unrolled_reg_op_loop command handler.
  *
  * This FI penetration tests executes the following instructions:
  * - Initialize register x5=0
@@ -276,45 +843,81 @@ status_t handle_ibex_fi_char_unrolled_mem_op_loop(ujson_t *uj);
  */
 status_t handle_ibex_fi_char_unrolled_reg_op_loop(ujson_t *uj);
 
+/**
+ * ibex.fi.char.unrolled_reg_op_loop_chain command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Initialize register x5=0; x6=0; x7=0; x28=0; x29=0; x30=0
+ * - Add 10 NOPs to delay the trigger
+ * - Perform 10 `chained` additions defined as following:
+ *   -  x6 =  x5 + 1
+ *   -  x7 =  x6 + 1
+ *   - x28 =  x7 + 1
+ *   - x29 = x28 + 1
+ *   - x30 = x29 + 1
+ *   -  x5 = x30 + 1
+ * - Return the 6 register values over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_char_unrolled_reg_op_loop_chain(ujson_t *uj);
+
 /**
  * Initializes the trigger and configures the device for the Ibex FI test.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_init_trigger(ujson_t *uj);
+status_t handle_ibex_fi_init(ujson_t *uj);
 
 /**
- * ibex.char.register_file command handler.
+ * otp_ctrl.data_read command handler.
  *
- * This FI penetration test executes the following instructions:
- * - Initialize temp. registers with reference values
- * - Execute 1000 NOPs
- * - Read back temp. register values and compare against reference values
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger.
+ * - Read VENDOR_TEST, CREATOR_SW_CFG, and OWNER_SW_CFG partition from OTP
+ * - Compare against reference values
  *
  * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_register_file(ujson_t *uj);
+status_t handle_ibex_fi_otp_data_read(ujson_t *uj);
 
 /**
- * ibex.char.register_file_read command handler.
+ * otp_ctrl.read_lock command handler.
  *
- * This FI penetration test executes the following instructions:
- * - Initialize temp. registers with reference values
- * - Read these registers.
+ * This FI penetration tests executes the following instructions:
+ * - Lock the read for VENDOR_TEST, CREATOR_SW_CFG, and OWNER_SW_CFG partition
+ * - Add 10 NOPs to delay the trigger.
+ * - Read VENDOR_TEST, CREATOR_SW_CFG, and OWNER_SW_CFG partition from OTP
  * - Compare against reference values
  *
  * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_fi_char_register_file_read(ujson_t *uj);
+status_t handle_ibex_fi_otp_read_lock(ujson_t *uj);
+
+/**
+ * otp_ctrl.write_lock command handler.
+ *
+ * This FI penetration tests executes the following instructions:
+ * - Add 10 NOPs to delay the trigger.
+ * - Try writing to the locked Unlock Token field in the Secret0 partition.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_fi_otp_write_lock(ujson_t *uj);
 
 /**
  * Ibex FI command handler.
diff --git a/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.c b/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.c
new file mode 100644
index 0000000000000..82006189815de
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.c
@@ -0,0 +1,161 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_lc_ctrl.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static dif_rv_core_ibex_t rv_core_ibex;
+static dif_lc_ctrl_t lc;
+
+status_t handle_lc_ctrl_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralCsrng,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Configure LC Controller.
+  mmio_region_t lc_reg = mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR);
+  TRY(dif_lc_ctrl_init(lc_reg, &lc));
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_lc_ctrl_fi_runtime_corruption(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read LC CTRL to get reference values.
+  dif_lc_ctrl_state_t lc_state_ref;
+  uint8_t lc_count_ref;
+  TRY(dif_lc_ctrl_get_state(&lc, &lc_state_ref));
+  TRY(dif_lc_ctrl_get_attempts(&lc, &lc_count_ref));
+
+  pentest_set_trigger_high();
+  asm volatile(NOP100);
+  asm volatile(NOP100);
+  asm volatile(NOP100);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Check if we have managed to manipulate the LC Controller.
+  dif_lc_ctrl_state_t lc_state_cmp;
+  uint8_t lc_count_cmp;
+  TRY(dif_lc_ctrl_get_state(&lc, &lc_state_cmp));
+  TRY(dif_lc_ctrl_get_attempts(&lc, &lc_count_cmp));
+
+  // Do the comparison. Return res = 0 if no mismatch was detected. 1 is
+  // returned if only the lc_state was manipulated. 2 if only the counter was
+  // manipulated. 3 if state and counter was manipulated.
+  lc_ctrl_fi_corruption_t uj_output;
+  uj_output.res = 0;
+  if (lc_state_cmp != lc_state_ref) {
+    uj_output.res = 1;
+  }
+
+  if (lc_count_cmp != lc_count_ref) {
+    if (uj_output.res) {
+      uj_output.res = 3;
+    } else {
+      uj_output.res = 2;
+    }
+  }
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Send result & ERR_STATUS to host.
+  uj_output.state = lc_state_cmp;
+  uj_output.counter = lc_count_cmp;
+  uj_output.err_status = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_lc_ctrl_fi_corruption_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_lc_ctrl_fi(ujson_t *uj) {
+  lc_ctrl_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_lc_ctrl_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kLcCtrlFiSubcommandInit:
+      return handle_lc_ctrl_fi_init(uj);
+    case kLcCtrlFiSubcommandRuntimeCorruption:
+      return handle_lc_ctrl_fi_runtime_corruption(uj);
+    default:
+      LOG_ERROR("Unrecognized LC CTRL FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.h b/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.h
new file mode 100644
index 0000000000000..130aa47f0dc8d
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.h
@@ -0,0 +1,41 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_LC_CTRL_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_LC_CTRL_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * Initializes the trigger and configures the device for the LC CTRL FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_lc_ctrl_fi_init(ujson_t *uj);
+
+/**
+ * lc_ctrl.runtime_corruption command handler.
+ *
+ * Try to manipulate the LC state and counter using FI.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_lc_ctrl_fi_runtime_corruption(ujson_t *uj);
+
+/**
+ * LC CTRL FI command handler.
+ *
+ * Command handler for the LC CTRL FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_lc_ctrl_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_LC_CTRL_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/BUILD b/sw/device/tests/penetrationtests/firmware/fi/otbn/BUILD
index d8b69b1aa6190..846c290c44941 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/otbn/BUILD
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/BUILD
@@ -6,6 +6,55 @@ load("//rules:otbn.bzl", "otbn_binary")
 
 package(default_visibility = ["//visibility:public"])
 
+otbn_binary(
+    name = "otbn_char_beq",
+    srcs = [
+        "otbn_char_beq.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_bn_rshi",
+    srcs = [
+        "otbn_char_bn_rshi.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_bn_sel",
+    srcs = [
+        "otbn_char_bn_sel.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_bn_wsrr",
+    srcs = [
+        "otbn_char_bn_wsrr.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_bne",
+    srcs = [
+        "otbn_char_bne.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_dmem_access",
+    srcs = [
+        "otbn_char_dmem_access.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_dmem_write",
+    srcs = [
+        "otbn_char_dmem_write.s",
+    ],
+)
+
 otbn_binary(
     name = "otbn_char_hardware_dmem_op_loop",
     srcs = [
@@ -20,6 +69,27 @@ otbn_binary(
     ],
 )
 
+otbn_binary(
+    name = "otbn_char_jal",
+    srcs = [
+        "otbn_char_jal.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_lw",
+    srcs = [
+        "otbn_char_lw.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_char_rf",
+    srcs = [
+        "otbn_char_rf.s",
+    ],
+)
+
 otbn_binary(
     name = "otbn_char_unrolled_dmem_op_loop",
     srcs = [
@@ -33,3 +103,24 @@ otbn_binary(
         "otbn_char_unrolled_reg_op_loop.s",
     ],
 )
+
+otbn_binary(
+    name = "otbn_key_sideload",
+    srcs = [
+        "otbn_key_sideload.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_load_integrity",
+    srcs = [
+        "otbn_load_integrity.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_pc",
+    srcs = [
+        "otbn_pc.s",
+    ],
+)
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_beq.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_beq.s
new file mode 100644
index 0000000000000..85b5ef4d4f4ca
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_beq.s
@@ -0,0 +1,1527 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_BEQ FI Penetration Test
+*/
+.section .text.start
+  /* x1=counter, x2&x3=BEQ parameters. */
+  li   x1, 0
+  li   x2, 0xabba
+  li   x3, 0xabba
+
+  /* Try to hit a BEQ instruction such that the branch is not taken.
+     Then, the counter at the end is different to 0. */
+  beq  x2, x3, label0
+  addi x1, x1, 1
+label0:
+  beq  x2, x3, label1
+  addi x1, x1, 1
+label1:
+  beq  x2, x3, label2
+  addi x1, x1, 1
+label2:
+  beq  x2, x3, label3
+  addi x1, x1, 1
+label3:
+  beq  x2, x3, label4
+  addi x1, x1, 1
+label4:
+  beq  x2, x3, label5
+  addi x1, x1, 1
+label5:
+  beq  x2, x3, label6
+  addi x1, x1, 1
+label6:
+  beq  x2, x3, label7
+  addi x1, x1, 1
+label7:
+  beq  x2, x3, label8
+  addi x1, x1, 1
+label8:
+  beq  x2, x3, label9
+  addi x1, x1, 1
+label9:
+  beq  x2, x3, label10
+  addi x1, x1, 1
+label10:
+  beq  x2, x3, label11
+  addi x1, x1, 1
+label11:
+  beq  x2, x3, label12
+  addi x1, x1, 1
+label12:
+  beq  x2, x3, label13
+  addi x1, x1, 1
+label13:
+  beq  x2, x3, label14
+  addi x1, x1, 1
+label14:
+  beq  x2, x3, label15
+  addi x1, x1, 1
+label15:
+  beq  x2, x3, label16
+  addi x1, x1, 1
+label16:
+  beq  x2, x3, label17
+  addi x1, x1, 1
+label17:
+  beq  x2, x3, label18
+  addi x1, x1, 1
+label18:
+  beq  x2, x3, label19
+  addi x1, x1, 1
+label19:
+  beq  x2, x3, label20
+  addi x1, x1, 1
+label20:
+  beq  x2, x3, label21
+  addi x1, x1, 1
+label21:
+  beq  x2, x3, label22
+  addi x1, x1, 1
+label22:
+  beq  x2, x3, label23
+  addi x1, x1, 1
+label23:
+  beq  x2, x3, label24
+  addi x1, x1, 1
+label24:
+  beq  x2, x3, label25
+  addi x1, x1, 1
+label25:
+  beq  x2, x3, label26
+  addi x1, x1, 1
+label26:
+  beq  x2, x3, label27
+  addi x1, x1, 1
+label27:
+  beq  x2, x3, label28
+  addi x1, x1, 1
+label28:
+  beq  x2, x3, label29
+  addi x1, x1, 1
+label29:
+  beq  x2, x3, label30
+  addi x1, x1, 1
+label30:
+  beq  x2, x3, label31
+  addi x1, x1, 1
+label31:
+  beq  x2, x3, label32
+  addi x1, x1, 1
+label32:
+  beq  x2, x3, label33
+  addi x1, x1, 1
+label33:
+  beq  x2, x3, label34
+  addi x1, x1, 1
+label34:
+  beq  x2, x3, label35
+  addi x1, x1, 1
+label35:
+  beq  x2, x3, label36
+  addi x1, x1, 1
+label36:
+  beq  x2, x3, label37
+  addi x1, x1, 1
+label37:
+  beq  x2, x3, label38
+  addi x1, x1, 1
+label38:
+  beq  x2, x3, label39
+  addi x1, x1, 1
+label39:
+  beq  x2, x3, label40
+  addi x1, x1, 1
+label40:
+  beq  x2, x3, label41
+  addi x1, x1, 1
+label41:
+  beq  x2, x3, label42
+  addi x1, x1, 1
+label42:
+  beq  x2, x3, label43
+  addi x1, x1, 1
+label43:
+  beq  x2, x3, label44
+  addi x1, x1, 1
+label44:
+  beq  x2, x3, label45
+  addi x1, x1, 1
+label45:
+  beq  x2, x3, label46
+  addi x1, x1, 1
+label46:
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+  addi x1, x1, 1
+label286:
+  beq  x2, x3, label287
+  addi x1, x1, 1
+label287:
+  beq  x2, x3, label288
+  addi x1, x1, 1
+label288:
+  beq  x2, x3, label289
+  addi x1, x1, 1
+label289:
+  beq  x2, x3, label290
+  addi x1, x1, 1
+label290:
+  beq  x2, x3, label291
+  addi x1, x1, 1
+label291:
+  beq  x2, x3, label292
+  addi x1, x1, 1
+label292:
+  beq  x2, x3, label293
+  addi x1, x1, 1
+label293:
+  beq  x2, x3, label294
+  addi x1, x1, 1
+label294:
+  beq  x2, x3, label295
+  addi x1, x1, 1
+label295:
+  beq  x2, x3, label296
+  addi x1, x1, 1
+label296:
+  beq  x2, x3, label297
+  addi x1, x1, 1
+label297:
+  beq  x2, x3, label298
+  addi x1, x1, 1
+label298:
+  beq  x2, x3, label299
+  addi x1, x1, 1
+label299:
+  beq  x2, x3, label300
+  addi x1, x1, 1
+label300:
+  beq  x2, x3, label301
+  addi x1, x1, 1
+label301:
+  beq  x2, x3, label302
+  addi x1, x1, 1
+label302:
+  beq  x2, x3, label303
+  addi x1, x1, 1
+label303:
+  beq  x2, x3, label304
+  addi x1, x1, 1
+label304:
+  beq  x2, x3, label305
+  addi x1, x1, 1
+label305:
+  beq  x2, x3, label306
+  addi x1, x1, 1
+label306:
+  beq  x2, x3, label307
+  addi x1, x1, 1
+label307:
+  beq  x2, x3, label308
+  addi x1, x1, 1
+label308:
+  beq  x2, x3, label309
+  addi x1, x1, 1
+label309:
+  beq  x2, x3, label310
+  addi x1, x1, 1
+label310:
+  beq  x2, x3, label311
+  addi x1, x1, 1
+label311:
+  beq  x2, x3, label312
+  addi x1, x1, 1
+label312:
+  beq  x2, x3, label313
+  addi x1, x1, 1
+label313:
+  beq  x2, x3, label314
+  addi x1, x1, 1
+label314:
+  beq  x2, x3, label315
+  addi x1, x1, 1
+label315:
+  beq  x2, x3, label316
+  addi x1, x1, 1
+label316:
+  beq  x2, x3, label317
+  addi x1, x1, 1
+label317:
+  beq  x2, x3, label318
+  addi x1, x1, 1
+label318:
+  beq  x2, x3, label319
+  addi x1, x1, 1
+label319:
+  beq  x2, x3, label320
+  addi x1, x1, 1
+label320:
+  beq  x2, x3, label321
+  addi x1, x1, 1
+label321:
+  beq  x2, x3, label322
+  addi x1, x1, 1
+label322:
+  beq  x2, x3, label323
+  addi x1, x1, 1
+label323:
+  beq  x2, x3, label324
+  addi x1, x1, 1
+label324:
+  beq  x2, x3, label325
+  addi x1, x1, 1
+label325:
+  beq  x2, x3, label326
+  addi x1, x1, 1
+label326:
+  beq  x2, x3, label327
+  addi x1, x1, 1
+label327:
+  beq  x2, x3, label328
+  addi x1, x1, 1
+label328:
+  beq  x2, x3, label329
+  addi x1, x1, 1
+label329:
+  beq  x2, x3, label330
+  addi x1, x1, 1
+label330:
+  beq  x2, x3, label331
+  addi x1, x1, 1
+label331:
+  beq  x2, x3, label332
+  addi x1, x1, 1
+label332:
+  beq  x2, x3, label333
+  addi x1, x1, 1
+label333:
+  beq  x2, x3, label334
+  addi x1, x1, 1
+label334:
+  beq  x2, x3, label335
+  addi x1, x1, 1
+label335:
+  beq  x2, x3, label336
+  addi x1, x1, 1
+label336:
+  beq  x2, x3, label337
+  addi x1, x1, 1
+label337:
+  beq  x2, x3, label338
+  addi x1, x1, 1
+label338:
+  beq  x2, x3, label339
+  addi x1, x1, 1
+label339:
+  beq  x2, x3, label340
+  addi x1, x1, 1
+label340:
+  beq  x2, x3, label341
+  addi x1, x1, 1
+label341:
+  beq  x2, x3, label342
+  addi x1, x1, 1
+label342:
+  beq  x2, x3, label343
+  addi x1, x1, 1
+label343:
+  beq  x2, x3, label344
+  addi x1, x1, 1
+label344:
+  beq  x2, x3, label345
+  addi x1, x1, 1
+label345:
+  beq  x2, x3, label346
+  addi x1, x1, 1
+label346:
+  beq  x2, x3, label347
+  addi x1, x1, 1
+label347:
+  beq  x2, x3, label348
+  addi x1, x1, 1
+label348:
+  beq  x2, x3, label349
+  addi x1, x1, 1
+label349:
+  beq  x2, x3, label350
+  addi x1, x1, 1
+label350:
+  beq  x2, x3, label351
+  addi x1, x1, 1
+label351:
+  beq  x2, x3, label352
+  addi x1, x1, 1
+label352:
+  beq  x2, x3, label353
+  addi x1, x1, 1
+label353:
+  beq  x2, x3, label354
+  addi x1, x1, 1
+label354:
+  beq  x2, x3, label355
+  addi x1, x1, 1
+label355:
+  beq  x2, x3, label356
+  addi x1, x1, 1
+label356:
+  beq  x2, x3, label357
+  addi x1, x1, 1
+label357:
+  beq  x2, x3, label358
+  addi x1, x1, 1
+label358:
+  beq  x2, x3, label359
+  addi x1, x1, 1
+label359:
+  beq  x2, x3, label360
+  addi x1, x1, 1
+label360:
+  beq  x2, x3, label361
+  addi x1, x1, 1
+label361:
+  beq  x2, x3, label362
+  addi x1, x1, 1
+label362:
+  beq  x2, x3, label363
+  addi x1, x1, 1
+label363:
+  beq  x2, x3, label364
+  addi x1, x1, 1
+label364:
+  beq  x2, x3, label365
+  addi x1, x1, 1
+label365:
+  beq  x2, x3, label366
+  addi x1, x1, 1
+label366:
+  beq  x2, x3, label367
+  addi x1, x1, 1
+label367:
+  beq  x2, x3, label368
+  addi x1, x1, 1
+label368:
+  beq  x2, x3, label369
+  addi x1, x1, 1
+label369:
+  beq  x2, x3, label370
+  addi x1, x1, 1
+label370:
+  beq  x2, x3, label371
+  addi x1, x1, 1
+label371:
+  beq  x2, x3, label372
+  addi x1, x1, 1
+label372:
+  beq  x2, x3, label373
+  addi x1, x1, 1
+label373:
+  beq  x2, x3, label374
+  addi x1, x1, 1
+label374:
+  beq  x2, x3, label375
+  addi x1, x1, 1
+label375:
+  beq  x2, x3, label376
+  addi x1, x1, 1
+label376:
+  beq  x2, x3, label377
+  addi x1, x1, 1
+label377:
+  beq  x2, x3, label378
+  addi x1, x1, 1
+label378:
+  beq  x2, x3, label379
+  addi x1, x1, 1
+label379:
+  beq  x2, x3, label380
+  addi x1, x1, 1
+label380:
+  beq  x2, x3, label381
+  addi x1, x1, 1
+label381:
+  beq  x2, x3, label382
+  addi x1, x1, 1
+label382:
+  beq  x2, x3, label383
+  addi x1, x1, 1
+label383:
+  beq  x2, x3, label384
+  addi x1, x1, 1
+label384:
+  beq  x2, x3, label385
+  addi x1, x1, 1
+label385:
+  beq  x2, x3, label386
+  addi x1, x1, 1
+label386:
+  beq  x2, x3, label387
+  addi x1, x1, 1
+label387:
+  beq  x2, x3, label388
+  addi x1, x1, 1
+label388:
+  beq  x2, x3, label389
+  addi x1, x1, 1
+label389:
+  beq  x2, x3, label390
+  addi x1, x1, 1
+label390:
+  beq  x2, x3, label391
+  addi x1, x1, 1
+label391:
+  beq  x2, x3, label392
+  addi x1, x1, 1
+label392:
+  beq  x2, x3, label393
+  addi x1, x1, 1
+label393:
+  beq  x2, x3, label394
+  addi x1, x1, 1
+label394:
+  beq  x2, x3, label395
+  addi x1, x1, 1
+label395:
+  beq  x2, x3, label396
+  addi x1, x1, 1
+label396:
+  beq  x2, x3, label397
+  addi x1, x1, 1
+label397:
+  beq  x2, x3, label398
+  addi x1, x1, 1
+label398:
+  beq  x2, x3, label399
+  addi x1, x1, 1
+label399:
+  beq  x2, x3, label400
+  addi x1, x1, 1
+label400:
+  beq  x2, x3, label401
+  addi x1, x1, 1
+label401:
+  beq  x2, x3, label402
+  addi x1, x1, 1
+label402:
+  beq  x2, x3, label403
+  addi x1, x1, 1
+label403:
+  beq  x2, x3, label404
+  addi x1, x1, 1
+label404:
+  beq  x2, x3, label405
+  addi x1, x1, 1
+label405:
+  beq  x2, x3, label406
+  addi x1, x1, 1
+label406:
+  beq  x2, x3, label407
+  addi x1, x1, 1
+label407:
+  beq  x2, x3, label408
+  addi x1, x1, 1
+label408:
+  beq  x2, x3, label409
+  addi x1, x1, 1
+label409:
+  beq  x2, x3, label410
+  addi x1, x1, 1
+label410:
+  beq  x2, x3, label411
+  addi x1, x1, 1
+label411:
+  beq  x2, x3, label412
+  addi x1, x1, 1
+label412:
+  beq  x2, x3, label413
+  addi x1, x1, 1
+label413:
+  beq  x2, x3, label414
+  addi x1, x1, 1
+label414:
+  beq  x2, x3, label415
+  addi x1, x1, 1
+label415:
+  beq  x2, x3, label416
+  addi x1, x1, 1
+label416:
+  beq  x2, x3, label417
+  addi x1, x1, 1
+label417:
+  beq  x2, x3, label418
+  addi x1, x1, 1
+label418:
+  beq  x2, x3, label419
+  addi x1, x1, 1
+label419:
+  beq  x2, x3, label420
+  addi x1, x1, 1
+label420:
+  beq  x2, x3, label421
+  addi x1, x1, 1
+label421:
+  beq  x2, x3, label422
+  addi x1, x1, 1
+label422:
+  beq  x2, x3, label423
+  addi x1, x1, 1
+label423:
+  beq  x2, x3, label424
+  addi x1, x1, 1
+label424:
+  beq  x2, x3, label425
+  addi x1, x1, 1
+label425:
+  beq  x2, x3, label426
+  addi x1, x1, 1
+label426:
+  beq  x2, x3, label427
+  addi x1, x1, 1
+label427:
+  beq  x2, x3, label428
+  addi x1, x1, 1
+label428:
+  beq  x2, x3, label429
+  addi x1, x1, 1
+label429:
+  beq  x2, x3, label430
+  addi x1, x1, 1
+label430:
+  beq  x2, x3, label431
+  addi x1, x1, 1
+label431:
+  beq  x2, x3, label432
+  addi x1, x1, 1
+label432:
+  beq  x2, x3, label433
+  addi x1, x1, 1
+label433:
+  beq  x2, x3, label434
+  addi x1, x1, 1
+label434:
+  beq  x2, x3, label435
+  addi x1, x1, 1
+label435:
+  beq  x2, x3, label436
+  addi x1, x1, 1
+label436:
+  beq  x2, x3, label437
+  addi x1, x1, 1
+label437:
+  beq  x2, x3, label438
+  addi x1, x1, 1
+label438:
+  beq  x2, x3, label439
+  addi x1, x1, 1
+label439:
+  beq  x2, x3, label440
+  addi x1, x1, 1
+label440:
+  beq  x2, x3, label441
+  addi x1, x1, 1
+label441:
+  beq  x2, x3, label442
+  addi x1, x1, 1
+label442:
+  beq  x2, x3, label443
+  addi x1, x1, 1
+label443:
+  beq  x2, x3, label444
+  addi x1, x1, 1
+label444:
+  beq  x2, x3, label445
+  addi x1, x1, 1
+label445:
+  beq  x2, x3, label446
+  addi x1, x1, 1
+label446:
+  beq  x2, x3, label447
+  addi x1, x1, 1
+label447:
+  beq  x2, x3, label448
+  addi x1, x1, 1
+label448:
+  beq  x2, x3, label449
+  addi x1, x1, 1
+label449:
+  beq  x2, x3, label450
+  addi x1, x1, 1
+label450:
+  beq  x2, x3, label451
+  addi x1, x1, 1
+label451:
+  beq  x2, x3, label452
+  addi x1, x1, 1
+label452:
+  beq  x2, x3, label453
+  addi x1, x1, 1
+label453:
+  beq  x2, x3, label454
+  addi x1, x1, 1
+label454:
+  beq  x2, x3, label455
+  addi x1, x1, 1
+label455:
+  beq  x2, x3, label456
+  addi x1, x1, 1
+label456:
+  beq  x2, x3, label457
+  addi x1, x1, 1
+label457:
+  beq  x2, x3, label458
+  addi x1, x1, 1
+label458:
+  beq  x2, x3, label459
+  addi x1, x1, 1
+label459:
+  beq  x2, x3, label460
+  addi x1, x1, 1
+label460:
+  beq  x2, x3, label461
+  addi x1, x1, 1
+label461:
+  beq  x2, x3, label462
+  addi x1, x1, 1
+label462:
+  beq  x2, x3, label463
+  addi x1, x1, 1
+label463:
+  beq  x2, x3, label464
+  addi x1, x1, 1
+label464:
+  beq  x2, x3, label465
+  addi x1, x1, 1
+label465:
+  beq  x2, x3, label466
+  addi x1, x1, 1
+label466:
+  beq  x2, x3, label467
+  addi x1, x1, 1
+label467:
+  beq  x2, x3, label468
+  addi x1, x1, 1
+label468:
+  beq  x2, x3, label469
+  addi x1, x1, 1
+label469:
+  beq  x2, x3, label470
+  addi x1, x1, 1
+label470:
+  beq  x2, x3, label471
+  addi x1, x1, 1
+label471:
+  beq  x2, x3, label472
+  addi x1, x1, 1
+label472:
+  beq  x2, x3, label473
+  addi x1, x1, 1
+label473:
+  beq  x2, x3, label474
+  addi x1, x1, 1
+label474:
+  beq  x2, x3, label475
+  addi x1, x1, 1
+label475:
+  beq  x2, x3, label476
+  addi x1, x1, 1
+label476:
+  beq  x2, x3, label477
+  addi x1, x1, 1
+label477:
+  beq  x2, x3, label478
+  addi x1, x1, 1
+label478:
+  beq  x2, x3, label479
+  addi x1, x1, 1
+label479:
+  beq  x2, x3, label480
+  addi x1, x1, 1
+label480:
+  beq  x2, x3, label481
+  addi x1, x1, 1
+label481:
+  beq  x2, x3, label482
+  addi x1, x1, 1
+label482:
+  beq  x2, x3, label483
+  addi x1, x1, 1
+label483:
+  beq  x2, x3, label484
+  addi x1, x1, 1
+label484:
+  beq  x2, x3, label485
+  addi x1, x1, 1
+label485:
+  beq  x2, x3, label486
+  addi x1, x1, 1
+label486:
+  beq  x2, x3, label487
+  addi x1, x1, 1
+label487:
+  beq  x2, x3, label488
+  addi x1, x1, 1
+label488:
+  beq  x2, x3, label489
+  addi x1, x1, 1
+label489:
+  beq  x2, x3, label490
+  addi x1, x1, 1
+label490:
+  beq  x2, x3, label491
+  addi x1, x1, 1
+label491:
+  beq  x2, x3, label492
+  addi x1, x1, 1
+label492:
+  beq  x2, x3, label493
+  addi x1, x1, 1
+label493:
+  beq  x2, x3, label494
+  addi x1, x1, 1
+label494:
+  beq  x2, x3, label495
+  addi x1, x1, 1
+label495:
+  beq  x2, x3, label496
+  addi x1, x1, 1
+label496:
+  beq  x2, x3, label497
+  addi x1, x1, 1
+label497:
+  beq  x2, x3, label498
+  addi x1, x1, 1
+label498:
+  beq  x2, x3, label499
+  addi x1, x1, 1
+label499:
+
+
+  /* Write counter into DEM. */
+  la   x5, res
+  sw   x1, 0(x5)
+
+  ecall
+
+.data
+  .balign 32
+  .globl res
+  res:
+    .zero 4
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_rshi.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_rshi.s
new file mode 100644
index 0000000000000..976b4ded339c8
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_rshi.s
@@ -0,0 +1,177 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_BN_RSHI FI Penetration Test
+*/
+.section .text.start
+  /* Load 2x256 bit big_num provided by host into w4 & w31. */
+  la      x1, big_num
+  li      x2, 4
+  li      x3, 31
+  bn.lid  x2, 0x00(x1++)
+  bn.lid  x3, 0x00(x1)
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  bn.rshi w4, w31, w4 >> 129
+  bn.rshi w4, w4, w31 >> 127
+
+  /* Write w4 & w31 back to DEM. */
+  li      x2, 4
+  li      x3, 31
+  la      x1, big_num_out
+  bn.sid  x2, 0x000(x1++)
+  bn.sid  x3, 0x000(x1)
+
+  ecall
+
+.data
+  .balign 32
+  .globl big_num
+  big_num:
+    .zero 64
+
+  .globl big_num_out
+  .balign 32
+  big_num_out:
+    .zero 64
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_sel.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_sel.s
new file mode 100644
index 0000000000000..425e294b0ba78
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_sel.s
@@ -0,0 +1,1289 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_BN_SEL FI Penetration Test
+*/
+.section .text.start
+  /* Load 2x256 bit big_num provided by host into w0 & w1. */
+  la      x1, big_num
+  li      x2, 0
+  li      x3, 1
+  bn.lid  x2, 0x00(x1++)
+  bn.lid  x3, 0x00(x1)
+
+  /* Add with carry: big_num = big_num + big_num. */
+  bn.addc w0, w0, w0
+
+  /* If C is set, these four instructions swap the content of w0 and w1. */
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  /* Repeat 250 times. */
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
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+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+  bn.sel  w2, w1, w0, C
+  bn.sel  w3, w0, w1, C
+  bn.sel  w1, w3, w2, C
+  bn.sel  w0, w2, w3, C
+
+
+  /* Write w0 & w1 back to DEM. */
+  li      x2, 0
+  li      x3, 1
+  la      x1, big_num_out
+  bn.sid  x2, 0x000(x1++)
+  bn.sid  x3, 0x000(x1)
+
+  ecall
+
+.data
+  .balign 32
+  .globl big_num
+  big_num:
+    .zero 64
+
+  .globl big_num_out
+  .balign 32
+  big_num_out:
+    .zero 64
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_wsrr.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_wsrr.s
new file mode 100644
index 0000000000000..dd4d1b83e882d
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bn_wsrr.s
@@ -0,0 +1,90 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_BN_WSRR FI Penetration Test
+*/
+.section .text.start
+  /* Load random values into w0...w31 (FI target). */
+  bn.wsrr w0,  URND
+  bn.wsrr w1,  URND
+  bn.wsrr w2,  URND
+  bn.wsrr w3,  URND
+  bn.wsrr w4,  URND
+  bn.wsrr w5,  URND
+  bn.wsrr w6,  URND
+  bn.wsrr w7,  URND
+  bn.wsrr w8,  URND
+  bn.wsrr w9,  URND
+  bn.wsrr w10, URND
+  bn.wsrr w11, URND
+  bn.wsrr w12, URND
+  bn.wsrr w13, URND
+  bn.wsrr w14, URND
+  bn.wsrr w15, URND
+  bn.wsrr w16, URND
+  bn.wsrr w17, URND
+  bn.wsrr w18, URND
+  bn.wsrr w19, URND
+  bn.wsrr w20, URND
+  bn.wsrr w21, URND
+  bn.wsrr w22, URND
+  bn.wsrr w23, URND
+  bn.wsrr w24, URND
+  bn.wsrr w25, URND
+  bn.wsrr w26, URND
+  bn.wsrr w27, URND
+  bn.wsrr w28, URND
+  bn.wsrr w29, URND
+  bn.wsrr w30, URND
+  bn.wsrr w31, URND
+
+  /* 1000 NOPs*/
+  loopi 10, 3
+    loopi 100, 1
+      nop
+    nop
+
+  /* Read WDR RF into DMEM. */
+  la x31, otbn_res_values_wdr
+  li        x1, 0
+  bn.sid    x1++, 0x000(x31)
+  bn.sid    x1++, 0x020(x31)
+  bn.sid    x1++, 0x040(x31)
+  bn.sid    x1++, 0x060(x31)
+  bn.sid    x1++, 0x080(x31)
+  bn.sid    x1++, 0x0a0(x31)
+  bn.sid    x1++, 0x0c0(x31)
+  bn.sid    x1++, 0x0e0(x31)
+  bn.sid    x1++, 0x100(x31)
+  bn.sid    x1++, 0x120(x31)
+  bn.sid    x1++, 0x140(x31)
+  bn.sid    x1++, 0x160(x31)
+  bn.sid    x1++, 0x180(x31)
+  bn.sid    x1++, 0x1a0(x31)
+  bn.sid    x1++, 0x1c0(x31)
+  bn.sid    x1++, 0x1e0(x31)
+  bn.sid    x1++, 0x200(x31)
+  bn.sid    x1++, 0x220(x31)
+  bn.sid    x1++, 0x240(x31)
+  bn.sid    x1++, 0x260(x31)
+  bn.sid    x1++, 0x280(x31)
+  bn.sid    x1++, 0x2a0(x31)
+  bn.sid    x1++, 0x2c0(x31)
+  bn.sid    x1++, 0x2e0(x31)
+  bn.sid    x1++, 0x300(x31)
+  bn.sid    x1++, 0x320(x31)
+  bn.sid    x1++, 0x340(x31)
+  bn.sid    x1++, 0x360(x31)
+  bn.sid    x1++, 0x380(x31)
+  bn.sid    x1++, 0x3a0(x31)
+  bn.sid    x1++, 0x3c0(x31)
+  bn.sid    x1++, 0x3e0(x31)
+
+  ecall
+
+.data
+  .balign 32
+  .globl otbn_res_values_wdr
+  otbn_res_values_wdr:
+    .zero 1024
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bne.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bne.s
new file mode 100644
index 0000000000000..c1fbc30a0c128
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_bne.s
@@ -0,0 +1,1527 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_BNE FI Penetration Test
+*/
+.section .text.start
+  /* x1=counter, x2&x3=BNE parameters. */
+  li   x1, 0
+  li   x2, 0xabba
+  li   x3, 0xcafe
+
+  /* Try to hit a BNE instruction such that the branch is not taken.
+     Then, the counter at the end is different to 0. */
+  bne  x2, x3, label0
+  addi x1, x1, 1
+label0:
+  bne  x2, x3, label1
+  addi x1, x1, 1
+label1:
+  bne  x2, x3, label2
+  addi x1, x1, 1
+label2:
+  bne  x2, x3, label3
+  addi x1, x1, 1
+label3:
+  bne  x2, x3, label4
+  addi x1, x1, 1
+label4:
+  bne  x2, x3, label5
+  addi x1, x1, 1
+label5:
+  bne  x2, x3, label6
+  addi x1, x1, 1
+label6:
+  bne  x2, x3, label7
+  addi x1, x1, 1
+label7:
+  bne  x2, x3, label8
+  addi x1, x1, 1
+label8:
+  bne  x2, x3, label9
+  addi x1, x1, 1
+label9:
+  bne  x2, x3, label10
+  addi x1, x1, 1
+label10:
+  bne  x2, x3, label11
+  addi x1, x1, 1
+label11:
+  bne  x2, x3, label12
+  addi x1, x1, 1
+label12:
+  bne  x2, x3, label13
+  addi x1, x1, 1
+label13:
+  bne  x2, x3, label14
+  addi x1, x1, 1
+label14:
+  bne  x2, x3, label15
+  addi x1, x1, 1
+label15:
+  bne  x2, x3, label16
+  addi x1, x1, 1
+label16:
+  bne  x2, x3, label17
+  addi x1, x1, 1
+label17:
+  bne  x2, x3, label18
+  addi x1, x1, 1
+label18:
+  bne  x2, x3, label19
+  addi x1, x1, 1
+label19:
+  bne  x2, x3, label20
+  addi x1, x1, 1
+label20:
+  bne  x2, x3, label21
+  addi x1, x1, 1
+label21:
+  bne  x2, x3, label22
+  addi x1, x1, 1
+label22:
+  bne  x2, x3, label23
+  addi x1, x1, 1
+label23:
+  bne  x2, x3, label24
+  addi x1, x1, 1
+label24:
+  bne  x2, x3, label25
+  addi x1, x1, 1
+label25:
+  bne  x2, x3, label26
+  addi x1, x1, 1
+label26:
+  bne  x2, x3, label27
+  addi x1, x1, 1
+label27:
+  bne  x2, x3, label28
+  addi x1, x1, 1
+label28:
+  bne  x2, x3, label29
+  addi x1, x1, 1
+label29:
+  bne  x2, x3, label30
+  addi x1, x1, 1
+label30:
+  bne  x2, x3, label31
+  addi x1, x1, 1
+label31:
+  bne  x2, x3, label32
+  addi x1, x1, 1
+label32:
+  bne  x2, x3, label33
+  addi x1, x1, 1
+label33:
+  bne  x2, x3, label34
+  addi x1, x1, 1
+label34:
+  bne  x2, x3, label35
+  addi x1, x1, 1
+label35:
+  bne  x2, x3, label36
+  addi x1, x1, 1
+label36:
+  bne  x2, x3, label37
+  addi x1, x1, 1
+label37:
+  bne  x2, x3, label38
+  addi x1, x1, 1
+label38:
+  bne  x2, x3, label39
+  addi x1, x1, 1
+label39:
+  bne  x2, x3, label40
+  addi x1, x1, 1
+label40:
+  bne  x2, x3, label41
+  addi x1, x1, 1
+label41:
+  bne  x2, x3, label42
+  addi x1, x1, 1
+label42:
+  bne  x2, x3, label43
+  addi x1, x1, 1
+label43:
+  bne  x2, x3, label44
+  addi x1, x1, 1
+label44:
+  bne  x2, x3, label45
+  addi x1, x1, 1
+label45:
+  bne  x2, x3, label46
+  addi x1, x1, 1
+label46:
+  bne  x2, x3, label47
+  addi x1, x1, 1
+label47:
+  bne  x2, x3, label48
+  addi x1, x1, 1
+label48:
+  bne  x2, x3, label49
+  addi x1, x1, 1
+label49:
+  bne  x2, x3, label50
+  addi x1, x1, 1
+label50:
+  bne  x2, x3, label51
+  addi x1, x1, 1
+label51:
+  bne  x2, x3, label52
+  addi x1, x1, 1
+label52:
+  bne  x2, x3, label53
+  addi x1, x1, 1
+label53:
+  bne  x2, x3, label54
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+  bne  x2, x3, label55
+  addi x1, x1, 1
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+  bne  x2, x3, label56
+  addi x1, x1, 1
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+  addi x1, x1, 1
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+  bne  x2, x3, label58
+  addi x1, x1, 1
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+  bne  x2, x3, label59
+  addi x1, x1, 1
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+  bne  x2, x3, label60
+  addi x1, x1, 1
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+  bne  x2, x3, label61
+  addi x1, x1, 1
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+  bne  x2, x3, label62
+  addi x1, x1, 1
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+  bne  x2, x3, label63
+  addi x1, x1, 1
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+  bne  x2, x3, label64
+  addi x1, x1, 1
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+  bne  x2, x3, label65
+  addi x1, x1, 1
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+  bne  x2, x3, label66
+  addi x1, x1, 1
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+  bne  x2, x3, label67
+  addi x1, x1, 1
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+  bne  x2, x3, label68
+  addi x1, x1, 1
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+  bne  x2, x3, label69
+  addi x1, x1, 1
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+  bne  x2, x3, label70
+  addi x1, x1, 1
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+  bne  x2, x3, label71
+  addi x1, x1, 1
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+  bne  x2, x3, label72
+  addi x1, x1, 1
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+  bne  x2, x3, label73
+  addi x1, x1, 1
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+  bne  x2, x3, label74
+  addi x1, x1, 1
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+  bne  x2, x3, label75
+  addi x1, x1, 1
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+  bne  x2, x3, label76
+  addi x1, x1, 1
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+  bne  x2, x3, label77
+  addi x1, x1, 1
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+  bne  x2, x3, label78
+  addi x1, x1, 1
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+  bne  x2, x3, label79
+  addi x1, x1, 1
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+  bne  x2, x3, label80
+  addi x1, x1, 1
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+  bne  x2, x3, label81
+  addi x1, x1, 1
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+  bne  x2, x3, label82
+  addi x1, x1, 1
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+  bne  x2, x3, label83
+  addi x1, x1, 1
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+  bne  x2, x3, label84
+  addi x1, x1, 1
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+  bne  x2, x3, label85
+  addi x1, x1, 1
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+  bne  x2, x3, label86
+  addi x1, x1, 1
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+  bne  x2, x3, label87
+  addi x1, x1, 1
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+  bne  x2, x3, label88
+  addi x1, x1, 1
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+  bne  x2, x3, label89
+  addi x1, x1, 1
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+  bne  x2, x3, label90
+  addi x1, x1, 1
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+  bne  x2, x3, label91
+  addi x1, x1, 1
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+  bne  x2, x3, label92
+  addi x1, x1, 1
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+  bne  x2, x3, label93
+  addi x1, x1, 1
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+  bne  x2, x3, label94
+  addi x1, x1, 1
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+  bne  x2, x3, label95
+  addi x1, x1, 1
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+  bne  x2, x3, label96
+  addi x1, x1, 1
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+  bne  x2, x3, label97
+  addi x1, x1, 1
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+  bne  x2, x3, label98
+  addi x1, x1, 1
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+  bne  x2, x3, label99
+  addi x1, x1, 1
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+  bne  x2, x3, label100
+  addi x1, x1, 1
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+  bne  x2, x3, label101
+  addi x1, x1, 1
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+  bne  x2, x3, label102
+  addi x1, x1, 1
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+  bne  x2, x3, label103
+  addi x1, x1, 1
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+  bne  x2, x3, label104
+  addi x1, x1, 1
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+  bne  x2, x3, label105
+  addi x1, x1, 1
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+  bne  x2, x3, label106
+  addi x1, x1, 1
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+  bne  x2, x3, label107
+  addi x1, x1, 1
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+  bne  x2, x3, label108
+  addi x1, x1, 1
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+  bne  x2, x3, label109
+  addi x1, x1, 1
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+  bne  x2, x3, label110
+  addi x1, x1, 1
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+  bne  x2, x3, label111
+  addi x1, x1, 1
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+  bne  x2, x3, label112
+  addi x1, x1, 1
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+  bne  x2, x3, label113
+  addi x1, x1, 1
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+  bne  x2, x3, label114
+  addi x1, x1, 1
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+  bne  x2, x3, label115
+  addi x1, x1, 1
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+  bne  x2, x3, label116
+  addi x1, x1, 1
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+  bne  x2, x3, label117
+  addi x1, x1, 1
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+  bne  x2, x3, label118
+  addi x1, x1, 1
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+  bne  x2, x3, label119
+  addi x1, x1, 1
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+  bne  x2, x3, label120
+  addi x1, x1, 1
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+  bne  x2, x3, label121
+  addi x1, x1, 1
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+  bne  x2, x3, label122
+  addi x1, x1, 1
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+  bne  x2, x3, label123
+  addi x1, x1, 1
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+  bne  x2, x3, label124
+  addi x1, x1, 1
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+  bne  x2, x3, label125
+  addi x1, x1, 1
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+  bne  x2, x3, label126
+  addi x1, x1, 1
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+  bne  x2, x3, label127
+  addi x1, x1, 1
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+  bne  x2, x3, label128
+  addi x1, x1, 1
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+  bne  x2, x3, label129
+  addi x1, x1, 1
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+  bne  x2, x3, label130
+  addi x1, x1, 1
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+  bne  x2, x3, label131
+  addi x1, x1, 1
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+  bne  x2, x3, label132
+  addi x1, x1, 1
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+  bne  x2, x3, label133
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+  bne  x2, x3, label134
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+  bne  x2, x3, label135
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+  bne  x2, x3, label136
+  addi x1, x1, 1
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+  bne  x2, x3, label137
+  addi x1, x1, 1
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+  bne  x2, x3, label138
+  addi x1, x1, 1
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+  bne  x2, x3, label139
+  addi x1, x1, 1
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+  bne  x2, x3, label140
+  addi x1, x1, 1
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+  bne  x2, x3, label141
+  addi x1, x1, 1
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+  bne  x2, x3, label142
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+  addi x1, x1, 1
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+  bne  x2, x3, label144
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+  bne  x2, x3, label145
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+  bne  x2, x3, label146
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+  bne  x2, x3, label147
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+  bne  x2, x3, label148
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+  bne  x2, x3, label149
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+  bne  x2, x3, label152
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+  bne  x2, x3, label159
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+  bne  x2, x3, label171
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+label293:
+  bne  x2, x3, label294
+  addi x1, x1, 1
+label294:
+  bne  x2, x3, label295
+  addi x1, x1, 1
+label295:
+  bne  x2, x3, label296
+  addi x1, x1, 1
+label296:
+  bne  x2, x3, label297
+  addi x1, x1, 1
+label297:
+  bne  x2, x3, label298
+  addi x1, x1, 1
+label298:
+  bne  x2, x3, label299
+  addi x1, x1, 1
+label299:
+  bne  x2, x3, label300
+  addi x1, x1, 1
+label300:
+  bne  x2, x3, label301
+  addi x1, x1, 1
+label301:
+  bne  x2, x3, label302
+  addi x1, x1, 1
+label302:
+  bne  x2, x3, label303
+  addi x1, x1, 1
+label303:
+  bne  x2, x3, label304
+  addi x1, x1, 1
+label304:
+  bne  x2, x3, label305
+  addi x1, x1, 1
+label305:
+  bne  x2, x3, label306
+  addi x1, x1, 1
+label306:
+  bne  x2, x3, label307
+  addi x1, x1, 1
+label307:
+  bne  x2, x3, label308
+  addi x1, x1, 1
+label308:
+  bne  x2, x3, label309
+  addi x1, x1, 1
+label309:
+  bne  x2, x3, label310
+  addi x1, x1, 1
+label310:
+  bne  x2, x3, label311
+  addi x1, x1, 1
+label311:
+  bne  x2, x3, label312
+  addi x1, x1, 1
+label312:
+  bne  x2, x3, label313
+  addi x1, x1, 1
+label313:
+  bne  x2, x3, label314
+  addi x1, x1, 1
+label314:
+  bne  x2, x3, label315
+  addi x1, x1, 1
+label315:
+  bne  x2, x3, label316
+  addi x1, x1, 1
+label316:
+  bne  x2, x3, label317
+  addi x1, x1, 1
+label317:
+  bne  x2, x3, label318
+  addi x1, x1, 1
+label318:
+  bne  x2, x3, label319
+  addi x1, x1, 1
+label319:
+  bne  x2, x3, label320
+  addi x1, x1, 1
+label320:
+  bne  x2, x3, label321
+  addi x1, x1, 1
+label321:
+  bne  x2, x3, label322
+  addi x1, x1, 1
+label322:
+  bne  x2, x3, label323
+  addi x1, x1, 1
+label323:
+  bne  x2, x3, label324
+  addi x1, x1, 1
+label324:
+  bne  x2, x3, label325
+  addi x1, x1, 1
+label325:
+  bne  x2, x3, label326
+  addi x1, x1, 1
+label326:
+  bne  x2, x3, label327
+  addi x1, x1, 1
+label327:
+  bne  x2, x3, label328
+  addi x1, x1, 1
+label328:
+  bne  x2, x3, label329
+  addi x1, x1, 1
+label329:
+  bne  x2, x3, label330
+  addi x1, x1, 1
+label330:
+  bne  x2, x3, label331
+  addi x1, x1, 1
+label331:
+  bne  x2, x3, label332
+  addi x1, x1, 1
+label332:
+  bne  x2, x3, label333
+  addi x1, x1, 1
+label333:
+  bne  x2, x3, label334
+  addi x1, x1, 1
+label334:
+  bne  x2, x3, label335
+  addi x1, x1, 1
+label335:
+  bne  x2, x3, label336
+  addi x1, x1, 1
+label336:
+  bne  x2, x3, label337
+  addi x1, x1, 1
+label337:
+  bne  x2, x3, label338
+  addi x1, x1, 1
+label338:
+  bne  x2, x3, label339
+  addi x1, x1, 1
+label339:
+  bne  x2, x3, label340
+  addi x1, x1, 1
+label340:
+  bne  x2, x3, label341
+  addi x1, x1, 1
+label341:
+  bne  x2, x3, label342
+  addi x1, x1, 1
+label342:
+  bne  x2, x3, label343
+  addi x1, x1, 1
+label343:
+  bne  x2, x3, label344
+  addi x1, x1, 1
+label344:
+  bne  x2, x3, label345
+  addi x1, x1, 1
+label345:
+  bne  x2, x3, label346
+  addi x1, x1, 1
+label346:
+  bne  x2, x3, label347
+  addi x1, x1, 1
+label347:
+  bne  x2, x3, label348
+  addi x1, x1, 1
+label348:
+  bne  x2, x3, label349
+  addi x1, x1, 1
+label349:
+  bne  x2, x3, label350
+  addi x1, x1, 1
+label350:
+  bne  x2, x3, label351
+  addi x1, x1, 1
+label351:
+  bne  x2, x3, label352
+  addi x1, x1, 1
+label352:
+  bne  x2, x3, label353
+  addi x1, x1, 1
+label353:
+  bne  x2, x3, label354
+  addi x1, x1, 1
+label354:
+  bne  x2, x3, label355
+  addi x1, x1, 1
+label355:
+  bne  x2, x3, label356
+  addi x1, x1, 1
+label356:
+  bne  x2, x3, label357
+  addi x1, x1, 1
+label357:
+  bne  x2, x3, label358
+  addi x1, x1, 1
+label358:
+  bne  x2, x3, label359
+  addi x1, x1, 1
+label359:
+  bne  x2, x3, label360
+  addi x1, x1, 1
+label360:
+  bne  x2, x3, label361
+  addi x1, x1, 1
+label361:
+  bne  x2, x3, label362
+  addi x1, x1, 1
+label362:
+  bne  x2, x3, label363
+  addi x1, x1, 1
+label363:
+  bne  x2, x3, label364
+  addi x1, x1, 1
+label364:
+  bne  x2, x3, label365
+  addi x1, x1, 1
+label365:
+  bne  x2, x3, label366
+  addi x1, x1, 1
+label366:
+  bne  x2, x3, label367
+  addi x1, x1, 1
+label367:
+  bne  x2, x3, label368
+  addi x1, x1, 1
+label368:
+  bne  x2, x3, label369
+  addi x1, x1, 1
+label369:
+  bne  x2, x3, label370
+  addi x1, x1, 1
+label370:
+  bne  x2, x3, label371
+  addi x1, x1, 1
+label371:
+  bne  x2, x3, label372
+  addi x1, x1, 1
+label372:
+  bne  x2, x3, label373
+  addi x1, x1, 1
+label373:
+  bne  x2, x3, label374
+  addi x1, x1, 1
+label374:
+  bne  x2, x3, label375
+  addi x1, x1, 1
+label375:
+  bne  x2, x3, label376
+  addi x1, x1, 1
+label376:
+  bne  x2, x3, label377
+  addi x1, x1, 1
+label377:
+  bne  x2, x3, label378
+  addi x1, x1, 1
+label378:
+  bne  x2, x3, label379
+  addi x1, x1, 1
+label379:
+  bne  x2, x3, label380
+  addi x1, x1, 1
+label380:
+  bne  x2, x3, label381
+  addi x1, x1, 1
+label381:
+  bne  x2, x3, label382
+  addi x1, x1, 1
+label382:
+  bne  x2, x3, label383
+  addi x1, x1, 1
+label383:
+  bne  x2, x3, label384
+  addi x1, x1, 1
+label384:
+  bne  x2, x3, label385
+  addi x1, x1, 1
+label385:
+  bne  x2, x3, label386
+  addi x1, x1, 1
+label386:
+  bne  x2, x3, label387
+  addi x1, x1, 1
+label387:
+  bne  x2, x3, label388
+  addi x1, x1, 1
+label388:
+  bne  x2, x3, label389
+  addi x1, x1, 1
+label389:
+  bne  x2, x3, label390
+  addi x1, x1, 1
+label390:
+  bne  x2, x3, label391
+  addi x1, x1, 1
+label391:
+  bne  x2, x3, label392
+  addi x1, x1, 1
+label392:
+  bne  x2, x3, label393
+  addi x1, x1, 1
+label393:
+  bne  x2, x3, label394
+  addi x1, x1, 1
+label394:
+  bne  x2, x3, label395
+  addi x1, x1, 1
+label395:
+  bne  x2, x3, label396
+  addi x1, x1, 1
+label396:
+  bne  x2, x3, label397
+  addi x1, x1, 1
+label397:
+  bne  x2, x3, label398
+  addi x1, x1, 1
+label398:
+  bne  x2, x3, label399
+  addi x1, x1, 1
+label399:
+  bne  x2, x3, label400
+  addi x1, x1, 1
+label400:
+  bne  x2, x3, label401
+  addi x1, x1, 1
+label401:
+  bne  x2, x3, label402
+  addi x1, x1, 1
+label402:
+  bne  x2, x3, label403
+  addi x1, x1, 1
+label403:
+  bne  x2, x3, label404
+  addi x1, x1, 1
+label404:
+  bne  x2, x3, label405
+  addi x1, x1, 1
+label405:
+  bne  x2, x3, label406
+  addi x1, x1, 1
+label406:
+  bne  x2, x3, label407
+  addi x1, x1, 1
+label407:
+  bne  x2, x3, label408
+  addi x1, x1, 1
+label408:
+  bne  x2, x3, label409
+  addi x1, x1, 1
+label409:
+  bne  x2, x3, label410
+  addi x1, x1, 1
+label410:
+  bne  x2, x3, label411
+  addi x1, x1, 1
+label411:
+  bne  x2, x3, label412
+  addi x1, x1, 1
+label412:
+  bne  x2, x3, label413
+  addi x1, x1, 1
+label413:
+  bne  x2, x3, label414
+  addi x1, x1, 1
+label414:
+  bne  x2, x3, label415
+  addi x1, x1, 1
+label415:
+  bne  x2, x3, label416
+  addi x1, x1, 1
+label416:
+  bne  x2, x3, label417
+  addi x1, x1, 1
+label417:
+  bne  x2, x3, label418
+  addi x1, x1, 1
+label418:
+  bne  x2, x3, label419
+  addi x1, x1, 1
+label419:
+  bne  x2, x3, label420
+  addi x1, x1, 1
+label420:
+  bne  x2, x3, label421
+  addi x1, x1, 1
+label421:
+  bne  x2, x3, label422
+  addi x1, x1, 1
+label422:
+  bne  x2, x3, label423
+  addi x1, x1, 1
+label423:
+  bne  x2, x3, label424
+  addi x1, x1, 1
+label424:
+  bne  x2, x3, label425
+  addi x1, x1, 1
+label425:
+  bne  x2, x3, label426
+  addi x1, x1, 1
+label426:
+  bne  x2, x3, label427
+  addi x1, x1, 1
+label427:
+  bne  x2, x3, label428
+  addi x1, x1, 1
+label428:
+  bne  x2, x3, label429
+  addi x1, x1, 1
+label429:
+  bne  x2, x3, label430
+  addi x1, x1, 1
+label430:
+  bne  x2, x3, label431
+  addi x1, x1, 1
+label431:
+  bne  x2, x3, label432
+  addi x1, x1, 1
+label432:
+  bne  x2, x3, label433
+  addi x1, x1, 1
+label433:
+  bne  x2, x3, label434
+  addi x1, x1, 1
+label434:
+  bne  x2, x3, label435
+  addi x1, x1, 1
+label435:
+  bne  x2, x3, label436
+  addi x1, x1, 1
+label436:
+  bne  x2, x3, label437
+  addi x1, x1, 1
+label437:
+  bne  x2, x3, label438
+  addi x1, x1, 1
+label438:
+  bne  x2, x3, label439
+  addi x1, x1, 1
+label439:
+  bne  x2, x3, label440
+  addi x1, x1, 1
+label440:
+  bne  x2, x3, label441
+  addi x1, x1, 1
+label441:
+  bne  x2, x3, label442
+  addi x1, x1, 1
+label442:
+  bne  x2, x3, label443
+  addi x1, x1, 1
+label443:
+  bne  x2, x3, label444
+  addi x1, x1, 1
+label444:
+  bne  x2, x3, label445
+  addi x1, x1, 1
+label445:
+  bne  x2, x3, label446
+  addi x1, x1, 1
+label446:
+  bne  x2, x3, label447
+  addi x1, x1, 1
+label447:
+  bne  x2, x3, label448
+  addi x1, x1, 1
+label448:
+  bne  x2, x3, label449
+  addi x1, x1, 1
+label449:
+  bne  x2, x3, label450
+  addi x1, x1, 1
+label450:
+  bne  x2, x3, label451
+  addi x1, x1, 1
+label451:
+  bne  x2, x3, label452
+  addi x1, x1, 1
+label452:
+  bne  x2, x3, label453
+  addi x1, x1, 1
+label453:
+  bne  x2, x3, label454
+  addi x1, x1, 1
+label454:
+  bne  x2, x3, label455
+  addi x1, x1, 1
+label455:
+  bne  x2, x3, label456
+  addi x1, x1, 1
+label456:
+  bne  x2, x3, label457
+  addi x1, x1, 1
+label457:
+  bne  x2, x3, label458
+  addi x1, x1, 1
+label458:
+  bne  x2, x3, label459
+  addi x1, x1, 1
+label459:
+  bne  x2, x3, label460
+  addi x1, x1, 1
+label460:
+  bne  x2, x3, label461
+  addi x1, x1, 1
+label461:
+  bne  x2, x3, label462
+  addi x1, x1, 1
+label462:
+  bne  x2, x3, label463
+  addi x1, x1, 1
+label463:
+  bne  x2, x3, label464
+  addi x1, x1, 1
+label464:
+  bne  x2, x3, label465
+  addi x1, x1, 1
+label465:
+  bne  x2, x3, label466
+  addi x1, x1, 1
+label466:
+  bne  x2, x3, label467
+  addi x1, x1, 1
+label467:
+  bne  x2, x3, label468
+  addi x1, x1, 1
+label468:
+  bne  x2, x3, label469
+  addi x1, x1, 1
+label469:
+  bne  x2, x3, label470
+  addi x1, x1, 1
+label470:
+  bne  x2, x3, label471
+  addi x1, x1, 1
+label471:
+  bne  x2, x3, label472
+  addi x1, x1, 1
+label472:
+  bne  x2, x3, label473
+  addi x1, x1, 1
+label473:
+  bne  x2, x3, label474
+  addi x1, x1, 1
+label474:
+  bne  x2, x3, label475
+  addi x1, x1, 1
+label475:
+  bne  x2, x3, label476
+  addi x1, x1, 1
+label476:
+  bne  x2, x3, label477
+  addi x1, x1, 1
+label477:
+  bne  x2, x3, label478
+  addi x1, x1, 1
+label478:
+  bne  x2, x3, label479
+  addi x1, x1, 1
+label479:
+  bne  x2, x3, label480
+  addi x1, x1, 1
+label480:
+  bne  x2, x3, label481
+  addi x1, x1, 1
+label481:
+  bne  x2, x3, label482
+  addi x1, x1, 1
+label482:
+  bne  x2, x3, label483
+  addi x1, x1, 1
+label483:
+  bne  x2, x3, label484
+  addi x1, x1, 1
+label484:
+  bne  x2, x3, label485
+  addi x1, x1, 1
+label485:
+  bne  x2, x3, label486
+  addi x1, x1, 1
+label486:
+  bne  x2, x3, label487
+  addi x1, x1, 1
+label487:
+  bne  x2, x3, label488
+  addi x1, x1, 1
+label488:
+  bne  x2, x3, label489
+  addi x1, x1, 1
+label489:
+  bne  x2, x3, label490
+  addi x1, x1, 1
+label490:
+  bne  x2, x3, label491
+  addi x1, x1, 1
+label491:
+  bne  x2, x3, label492
+  addi x1, x1, 1
+label492:
+  bne  x2, x3, label493
+  addi x1, x1, 1
+label493:
+  bne  x2, x3, label494
+  addi x1, x1, 1
+label494:
+  bne  x2, x3, label495
+  addi x1, x1, 1
+label495:
+  bne  x2, x3, label496
+  addi x1, x1, 1
+label496:
+  bne  x2, x3, label497
+  addi x1, x1, 1
+label497:
+  bne  x2, x3, label498
+  addi x1, x1, 1
+label498:
+  bne  x2, x3, label499
+  addi x1, x1, 1
+label499:
+
+
+  /* Write counter into DEM. */
+  la   x5, res
+  sw   x1, 0(x5)
+
+  ecall
+
+.data
+  .balign 32
+  .globl res
+  res:
+    .zero 4
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_access.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_access.s
new file mode 100644
index 0000000000000..770de2449231c
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_access.s
@@ -0,0 +1,381 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR.DMEM_LOAD FI Penetration Test
+*/
+.section .text.start
+  la x2, values
+  li x1, 0
+
+  loopi 100, 1
+    nop
+
+  bn.lid    x1++, 0x000(x2)
+  bn.lid    x1++, 0x020(x2)
+  bn.lid    x1++, 0x040(x2)
+  bn.lid    x1++, 0x060(x2)
+  bn.lid    x1++, 0x080(x2)
+  bn.lid    x1++, 0x0a0(x2)
+  bn.lid    x1++, 0x0c0(x2)
+  bn.lid    x1++, 0x0e0(x2)
+  bn.lid    x1++, 0x100(x2)
+  bn.lid    x1++, 0x120(x2)
+  bn.lid    x1++, 0x140(x2)
+  bn.lid    x1++, 0x160(x2)
+  bn.lid    x1++, 0x180(x2)
+  bn.lid    x1++, 0x1a0(x2)
+  bn.lid    x1++, 0x1c0(x2)
+  bn.lid    x1++, 0x1e0(x2)
+  bn.lid    x1++, 0x200(x2)
+  bn.lid    x1++, 0x220(x2)
+  bn.lid    x1++, 0x240(x2)
+  bn.lid    x1++, 0x260(x2)
+  bn.lid    x1++, 0x280(x2)
+  bn.lid    x1++, 0x2a0(x2)
+  bn.lid    x1++, 0x2c0(x2)
+  bn.lid    x1++, 0x2e0(x2)
+  bn.lid    x1++, 0x300(x2)
+  bn.lid    x1++, 0x320(x2)
+  bn.lid    x1++, 0x340(x2)
+  bn.lid    x1++, 0x360(x2)
+  bn.lid    x1++, 0x380(x2)
+  bn.lid    x1++, 0x3a0(x2)
+  bn.lid    x1++, 0x3c0(x2)
+  bn.lid    x1++, 0x3e0(x2)
+
+  loopi 100, 1
+    nop
+  li        x1, 0
+  bn.sid    x1++, 0x3e0(x2)
+  bn.sid    x1++, 0x3c0(x2)
+  bn.sid    x1++, 0x3a0(x2)
+  bn.sid    x1++, 0x380(x2)
+  bn.sid    x1++, 0x360(x2)
+  bn.sid    x1++, 0x340(x2)
+  bn.sid    x1++, 0x320(x2)
+  bn.sid    x1++, 0x300(x2)
+  bn.sid    x1++, 0x2e0(x2)
+  bn.sid    x1++, 0x2c0(x2)
+  bn.sid    x1++, 0x2a0(x2)
+  bn.sid    x1++, 0x280(x2)
+  bn.sid    x1++, 0x260(x2)
+  bn.sid    x1++, 0x240(x2)
+  bn.sid    x1++, 0x220(x2)
+  bn.sid    x1++, 0x200(x2)
+  bn.sid    x1++, 0x1e0(x2)
+  bn.sid    x1++, 0x1c0(x2)
+  bn.sid    x1++, 0x1a0(x2)
+  bn.sid    x1++, 0x180(x2)
+  bn.sid    x1++, 0x160(x2)
+  bn.sid    x1++, 0x140(x2)
+  bn.sid    x1++, 0x120(x2)
+  bn.sid    x1++, 0x100(x2)
+  bn.sid    x1++, 0x0e0(x2)
+  bn.sid    x1++, 0x0c0(x2)
+  bn.sid    x1++, 0x0a0(x2)
+  bn.sid    x1++, 0x080(x2)
+  bn.sid    x1++, 0x060(x2)
+  bn.sid    x1++, 0x040(x2)
+  bn.sid    x1++, 0x020(x2)
+  bn.sid    x1++, 0x000(x2)
+
+  ecall
+
+.data
+  /*
+    Since each .word is a 32-bit value stored little-endian, this is 32 bytes
+    laid out in memory as 00, 01, 02, .., 1f. If loaded 256-bit little endian,
+    the result will be 0x1f1e1d...020100.
+  */
+  .balign 32
+  .globl values
+  values:
+    /* Address 0x000: */
+    .word 0xeeeeeeee
+    .word 0x07060504
+    .word 0x0b0a0908
+    .word 0x0f0e0d0c
+    .word 0x13121110
+    .word 0x17161514
+    .word 0x1b1a1918
+    .word 0x1f1e1d1c
+    /* Address 0x020 */
+    .word 0xfa6aa305
+    .word 0x4bf25027
+    .word 0x3c2c3c75
+    .word 0x4f60fbef
+    .word 0xfc5d5be5
+    .word 0x45e07607
+    .word 0xd4eaf866
+    .word 0xac8c5968
+    /* Address 0x040 */
+    .word 0xd1d0238c
+    .word 0xbf926173
+    .word 0x7aa4459b
+    .word 0x82df4fba
+    .word 0xc3ed3171
+    .word 0xafa3f885
+    .word 0xe32bba64
+    .word 0x90fe233e
+    /* Address 0x060 */
+    .word 0xc03ada84
+    .word 0xf7a2411b
+    .word 0xdc382d37
+    .word 0xbe18f426
+    .word 0x96cc0604
+    .word 0x6b6799c2
+    .word 0x505d0e77
+    .word 0x2160cae8
+    /* Address 0x080 */
+    .word 0x54bc863a
+    .word 0x679163f2
+    .word 0x35a47508
+    .word 0xb92482e0
+    .word 0xe43d9d95
+    .word 0xe26aad45
+    .word 0x605023e6
+    .word 0xc8bb925c
+    /* Address 0x0a0 */
+    .word 0xed163557
+    .word 0x98bd371f
+    .word 0x9cec224a
+    .word 0x8a6af545
+    .word 0xf8455ed4
+    .word 0x665acf3a
+    .word 0x0b690299
+    .word 0xe543605b
+    /* Address 0x0c0 */
+    .word 0x15cb958f
+    .word 0x6472a98f
+    .word 0x5a512b04
+    .word 0xcd0b8525
+    .word 0xc94b94b6
+    .word 0x96e16897
+    .word 0xc8895ab9
+    .word 0x152dbe4c
+    /* Address 0x0e0 */
+    .word 0xccf94503
+    .word 0xd342d748
+    .word 0x02f2c658
+    .word 0x01abd65f
+    .word 0xda5eeb22
+    .word 0x2d6cbaab
+    .word 0x571a839d
+    .word 0x9469e967
+    /* Address 0x100 */
+    .word 0xf510061b
+    .word 0xbec0536f
+    .word 0x78448c7a
+    .word 0xb1d99c89
+    .word 0x928cb04e
+    .word 0x4e9cf63d
+    .word 0x2d69eda4
+    .word 0xb4d62cb4
+    /* Address 0x120 */
+    .word 0x77a61161
+    .word 0x75cc1b32
+    .word 0xbc2a88bd
+    .word 0x2355ed13
+    .word 0xdce18035
+    .word 0x1568ae28
+    .word 0x846b2991
+    .word 0x3490ade4
+    /* Address 0x140 */
+    .word 0x5069a4fe
+    .word 0x9e61ec9e
+    .word 0xca4e439f
+    .word 0x28fecdc5
+    .word 0x225e8c6e
+    .word 0x583026a9
+    .word 0x8c82b7ab
+    .word 0x4086523d
+    /* Address 0x160 */
+    .word 0x331f6054
+    .word 0x2e0c7a25
+    .word 0x2fda6c25
+    .word 0x7eafe001
+    .word 0xcb0f4ae0
+    .word 0x692f9a96
+    .word 0x36d703d2
+    .word 0xefee445d
+    /* Address 0x180 */
+    .word 0x3de45d57
+    .word 0x934311f8
+    .word 0xfb755fbd
+    .word 0xdf4d73c5
+    .word 0x5659c824
+    .word 0xc276ca89
+    .word 0x6302b6e0
+    .word 0x6fe7a8b1
+    /* Address 0x1a0 */
+    .word 0xc94bbff7
+    .word 0xc4b09004
+    .word 0xc20e470b
+    .word 0xc677098e
+    .word 0xa83713fd
+    .word 0xc3ca25b6
+    .word 0xfc1feb7e
+    .word 0x312e622e
+    /* Address 0x1c0 */
+    .word 0x3b98dd07
+    .word 0x0de57522
+    .word 0xbbc42b94
+    .word 0x20ac185d
+    .word 0xbf4bf36e
+    .word 0xe7cbc776
+    .word 0xa4d46e9d
+    .word 0xd4a1c273
+    /* Address 0x1e0 */
+    .word 0x4b84019e
+    .word 0xe943a915
+    .word 0x4116b514
+    .word 0x252dd283
+    .word 0x4f320dae
+    .word 0x64473bea
+    .word 0x9687b795
+    .word 0x057a32bf
+    /* Address 0x200 */
+    .word 0xd1686cd2
+    .word 0xc099a878
+    .word 0xa71b9fa0
+    .word 0xb8c713d7
+    .word 0x267d497f
+    .word 0x8c69ca33
+    .word 0x583d79c7
+    .word 0x81768429
+    /* Address 0x220 */
+    .word 0x3866bb40
+    .word 0xc2bc4ff1
+    .word 0xbe1bb3c1
+    .word 0xec48e6c4
+    .word 0x34fcf348
+    .word 0xd05b6e22
+    .word 0x5b28f949
+    .word 0x9ae81d2e
+    /* Address 0x240 */
+    .word 0x61ae0041
+    .word 0xb8a512d7
+    .word 0xd41f32f0
+    .word 0x3941c129
+    .word 0x7310be64
+    .word 0x63a1a1d5
+    .word 0x0eee3deb
+    .word 0x9a246593
+    /* Address 0x260 */
+    .word 0x2c8fb248
+    .word 0x0a09b1d2
+    .word 0x067a11a4
+    .word 0xffdd4528
+    .word 0x2f611ede
+    .word 0x855ff86e
+    .word 0x167a56ea
+    .word 0x30e6b89e
+    /* Address 0x280 */
+    .word 0x86750ae0
+    .word 0xd22aa4c8
+    .word 0x97311c40
+    .word 0xd4babab5
+    .word 0x7c1353b2
+    .word 0x5a5f37cc
+    .word 0x0fce50d3
+    .word 0x308298b5
+    /* Address 0x2a0 */
+    .word 0x48ed55e0
+    .word 0x3a16fc9f
+    .word 0x8bba1c50
+    .word 0x2db1aa22
+    .word 0x73cb4559
+    .word 0x43e965bb
+    .word 0x047eb4b2
+    .word 0x031fcace
+    /* Address 0x2c0 */
+    .word 0x03d74112
+    .word 0xaa250aae
+    .word 0xe0001ad6
+    .word 0xbcade300
+    .word 0xd3e9a20d
+    .word 0x59387c0e
+    .word 0x40ee386b
+    .word 0xff700fad
+    /* Address 0x2e0 */
+    .word 0x635e374e
+    .word 0x188b144a
+    .word 0x4569c4bd
+    .word 0x627dd8a6
+    .word 0xb6a67672
+    .word 0x7897ee48
+    .word 0x64a44eeb
+    .word 0x125ffab8
+    /* Address 0x300 */
+    .word 0xbc0afc35
+    .word 0xda6e551e
+    .word 0xb28288ee
+    .word 0x1bb6a1d6
+    .word 0xa5eed9f4
+    .word 0x00777753
+    .word 0xc36fe559
+    .word 0x5bba215a
+    /* Address 0x320 */
+    .word 0x747d6d3e
+    .word 0x4ed1128d
+    .word 0xf6662e91
+    .word 0xa4bd7d21
+    .word 0x8320954a
+    .word 0xdc53ab50
+    .word 0x0d54f79c
+    .word 0x700135f3
+    /* Address 0x340 */
+    .word 0x851f978c
+    .word 0x55d5c1a4
+    .word 0x7d512f4f
+    .word 0xfb8070ed
+    .word 0xd84d0218
+    .word 0x782a3321
+    .word 0x1d9d1c2b
+    .word 0x7d33e0db
+    /* Address 0x360 */
+    .word 0x9c1be92c
+    .word 0x792c41b0
+    .word 0x40b5b236
+    .word 0x9f42454b
+    .word 0x60bbb6e3
+    .word 0x71fb8fae
+    .word 0xca2421c9
+    .word 0xfdb27cdc
+    /* Address 0x380 */
+    .word 0x8e43137e
+    .word 0xc744c51a
+    .word 0x88b7f4ed
+    .word 0x86de6a48
+    .word 0x2c996256
+    .word 0x538607bd
+    .word 0x3026c936
+    .word 0xde53ffd6
+    /* Address 0x3a0 */
+    .word 0xf0449e22
+    .word 0x7806fc6e
+    .word 0x35490afa
+    .word 0x4e2f74b9
+    .word 0x5527567f
+    .word 0xf59a9351
+    .word 0xf1ce2e82
+    .word 0xef9cdbba
+    /* Address 0x3c0 */
+    .word 0x5d7b6326
+    .word 0x7c2e02c0
+    .word 0x310a9d5a
+    .word 0x571110b6
+    .word 0x9360891a
+    .word 0x5eedd494
+    .word 0xce6185bd
+    .word 0xa29720ce
+    /* Address 0x3e0 */
+    .word 0x6870007a
+    .word 0xcbc8c93e
+    .word 0x2df95a26
+    .word 0xef048af4
+    .word 0x940a38bf
+    .word 0x27c49143
+    .word 0xf6e7246d
+    .word 0x0f6ecb03
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_write.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_write.s
new file mode 100644
index 0000000000000..5de841e17ac12
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_dmem_write.s
@@ -0,0 +1,16 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR.DMEM_WRITE FI Penetration Test
+*/
+.section .text.start
+  /* Just return back to Ibex as the target is the DMEM write. */
+
+  ecall
+
+.data
+  .balign 32
+  .globl mem
+  mem:
+    .zero 128
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_jal.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_jal.s
new file mode 100644
index 0000000000000..2a092cade8f2c
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_jal.s
@@ -0,0 +1,1524 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_JAL FI Penetration Test
+*/
+.section .text.start
+  /* x1=counter. */
+  li   x1, 0
+
+  /* Try to hit a JAL instruction such that the branch is not taken.
+     Then, the counter at the end is different to 0. */
+  jal  x0, label0
+  addi x1, x1, 1
+label0:
+  jal  x0, label1
+  addi x1, x1, 1
+label1:
+  jal  x0, label2
+  addi x1, x1, 1
+label2:
+  jal  x0, label3
+  addi x1, x1, 1
+label3:
+  jal  x0, label4
+  addi x1, x1, 1
+label4:
+  jal  x0, label5
+  addi x1, x1, 1
+label5:
+  jal  x0, label6
+  addi x1, x1, 1
+label6:
+  jal  x0, label7
+  addi x1, x1, 1
+label7:
+  jal  x0, label8
+  addi x1, x1, 1
+label8:
+  jal  x0, label9
+  addi x1, x1, 1
+label9:
+  jal  x0, label10
+  addi x1, x1, 1
+label10:
+  jal  x0, label11
+  addi x1, x1, 1
+label11:
+  jal  x0, label12
+  addi x1, x1, 1
+label12:
+  jal  x0, label13
+  addi x1, x1, 1
+label13:
+  jal  x0, label14
+  addi x1, x1, 1
+label14:
+  jal  x0, label15
+  addi x1, x1, 1
+label15:
+  jal  x0, label16
+  addi x1, x1, 1
+label16:
+  jal  x0, label17
+  addi x1, x1, 1
+label17:
+  jal  x0, label18
+  addi x1, x1, 1
+label18:
+  jal  x0, label19
+  addi x1, x1, 1
+label19:
+  jal  x0, label20
+  addi x1, x1, 1
+label20:
+  jal  x0, label21
+  addi x1, x1, 1
+label21:
+  jal  x0, label22
+  addi x1, x1, 1
+label22:
+  jal  x0, label23
+  addi x1, x1, 1
+label23:
+  jal  x0, label24
+  addi x1, x1, 1
+label24:
+  jal  x0, label25
+  addi x1, x1, 1
+label25:
+  jal  x0, label26
+  addi x1, x1, 1
+label26:
+  jal  x0, label27
+  addi x1, x1, 1
+label27:
+  jal  x0, label28
+  addi x1, x1, 1
+label28:
+  jal  x0, label29
+  addi x1, x1, 1
+label29:
+  jal  x0, label30
+  addi x1, x1, 1
+label30:
+  jal  x0, label31
+  addi x1, x1, 1
+label31:
+  jal  x0, label32
+  addi x1, x1, 1
+label32:
+  jal  x0, label33
+  addi x1, x1, 1
+label33:
+  jal  x0, label34
+  addi x1, x1, 1
+label34:
+  jal  x0, label35
+  addi x1, x1, 1
+label35:
+  jal  x0, label36
+  addi x1, x1, 1
+label36:
+  jal  x0, label37
+  addi x1, x1, 1
+label37:
+  jal  x0, label38
+  addi x1, x1, 1
+label38:
+  jal  x0, label39
+  addi x1, x1, 1
+label39:
+  jal  x0, label40
+  addi x1, x1, 1
+label40:
+  jal  x0, label41
+  addi x1, x1, 1
+label41:
+  jal  x0, label42
+  addi x1, x1, 1
+label42:
+  jal  x0, label43
+  addi x1, x1, 1
+label43:
+  jal  x0, label44
+  addi x1, x1, 1
+label44:
+  jal  x0, label45
+  addi x1, x1, 1
+label45:
+  jal  x0, label46
+  addi x1, x1, 1
+label46:
+  jal  x0, label47
+  addi x1, x1, 1
+label47:
+  jal  x0, label48
+  addi x1, x1, 1
+label48:
+  jal  x0, label49
+  addi x1, x1, 1
+label49:
+  jal  x0, label50
+  addi x1, x1, 1
+label50:
+  jal  x0, label51
+  addi x1, x1, 1
+label51:
+  jal  x0, label52
+  addi x1, x1, 1
+label52:
+  jal  x0, label53
+  addi x1, x1, 1
+label53:
+  jal  x0, label54
+  addi x1, x1, 1
+label54:
+  jal  x0, label55
+  addi x1, x1, 1
+label55:
+  jal  x0, label56
+  addi x1, x1, 1
+label56:
+  jal  x0, label57
+  addi x1, x1, 1
+label57:
+  jal  x0, label58
+  addi x1, x1, 1
+label58:
+  jal  x0, label59
+  addi x1, x1, 1
+label59:
+  jal  x0, label60
+  addi x1, x1, 1
+label60:
+  jal  x0, label61
+  addi x1, x1, 1
+label61:
+  jal  x0, label62
+  addi x1, x1, 1
+label62:
+  jal  x0, label63
+  addi x1, x1, 1
+label63:
+  jal  x0, label64
+  addi x1, x1, 1
+label64:
+  jal  x0, label65
+  addi x1, x1, 1
+label65:
+  jal  x0, label66
+  addi x1, x1, 1
+label66:
+  jal  x0, label67
+  addi x1, x1, 1
+label67:
+  jal  x0, label68
+  addi x1, x1, 1
+label68:
+  jal  x0, label69
+  addi x1, x1, 1
+label69:
+  jal  x0, label70
+  addi x1, x1, 1
+label70:
+  jal  x0, label71
+  addi x1, x1, 1
+label71:
+  jal  x0, label72
+  addi x1, x1, 1
+label72:
+  jal  x0, label73
+  addi x1, x1, 1
+label73:
+  jal  x0, label74
+  addi x1, x1, 1
+label74:
+  jal  x0, label75
+  addi x1, x1, 1
+label75:
+  jal  x0, label76
+  addi x1, x1, 1
+label76:
+  jal  x0, label77
+  addi x1, x1, 1
+label77:
+  jal  x0, label78
+  addi x1, x1, 1
+label78:
+  jal  x0, label79
+  addi x1, x1, 1
+label79:
+  jal  x0, label80
+  addi x1, x1, 1
+label80:
+  jal  x0, label81
+  addi x1, x1, 1
+label81:
+  jal  x0, label82
+  addi x1, x1, 1
+label82:
+  jal  x0, label83
+  addi x1, x1, 1
+label83:
+  jal  x0, label84
+  addi x1, x1, 1
+label84:
+  jal  x0, label85
+  addi x1, x1, 1
+label85:
+  jal  x0, label86
+  addi x1, x1, 1
+label86:
+  jal  x0, label87
+  addi x1, x1, 1
+label87:
+  jal  x0, label88
+  addi x1, x1, 1
+label88:
+  jal  x0, label89
+  addi x1, x1, 1
+label89:
+  jal  x0, label90
+  addi x1, x1, 1
+label90:
+  jal  x0, label91
+  addi x1, x1, 1
+label91:
+  jal  x0, label92
+  addi x1, x1, 1
+label92:
+  jal  x0, label93
+  addi x1, x1, 1
+label93:
+  jal  x0, label94
+  addi x1, x1, 1
+label94:
+  jal  x0, label95
+  addi x1, x1, 1
+label95:
+  jal  x0, label96
+  addi x1, x1, 1
+label96:
+  jal  x0, label97
+  addi x1, x1, 1
+label97:
+  jal  x0, label98
+  addi x1, x1, 1
+label98:
+  jal  x0, label99
+  addi x1, x1, 1
+label99:
+  jal  x0, label100
+  addi x1, x1, 1
+label100:
+  jal  x0, label101
+  addi x1, x1, 1
+label101:
+  jal  x0, label102
+  addi x1, x1, 1
+label102:
+  jal  x0, label103
+  addi x1, x1, 1
+label103:
+  jal  x0, label104
+  addi x1, x1, 1
+label104:
+  jal  x0, label105
+  addi x1, x1, 1
+label105:
+  jal  x0, label106
+  addi x1, x1, 1
+label106:
+  jal  x0, label107
+  addi x1, x1, 1
+label107:
+  jal  x0, label108
+  addi x1, x1, 1
+label108:
+  jal  x0, label109
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+  addi x1, x1, 1
+label372:
+  jal  x0, label373
+  addi x1, x1, 1
+label373:
+  jal  x0, label374
+  addi x1, x1, 1
+label374:
+  jal  x0, label375
+  addi x1, x1, 1
+label375:
+  jal  x0, label376
+  addi x1, x1, 1
+label376:
+  jal  x0, label377
+  addi x1, x1, 1
+label377:
+  jal  x0, label378
+  addi x1, x1, 1
+label378:
+  jal  x0, label379
+  addi x1, x1, 1
+label379:
+  jal  x0, label380
+  addi x1, x1, 1
+label380:
+  jal  x0, label381
+  addi x1, x1, 1
+label381:
+  jal  x0, label382
+  addi x1, x1, 1
+label382:
+  jal  x0, label383
+  addi x1, x1, 1
+label383:
+  jal  x0, label384
+  addi x1, x1, 1
+label384:
+  jal  x0, label385
+  addi x1, x1, 1
+label385:
+  jal  x0, label386
+  addi x1, x1, 1
+label386:
+  jal  x0, label387
+  addi x1, x1, 1
+label387:
+  jal  x0, label388
+  addi x1, x1, 1
+label388:
+  jal  x0, label389
+  addi x1, x1, 1
+label389:
+  jal  x0, label390
+  addi x1, x1, 1
+label390:
+  jal  x0, label391
+  addi x1, x1, 1
+label391:
+  jal  x0, label392
+  addi x1, x1, 1
+label392:
+  jal  x0, label393
+  addi x1, x1, 1
+label393:
+  jal  x0, label394
+  addi x1, x1, 1
+label394:
+  jal  x0, label395
+  addi x1, x1, 1
+label395:
+  jal  x0, label396
+  addi x1, x1, 1
+label396:
+  jal  x0, label397
+  addi x1, x1, 1
+label397:
+  jal  x0, label398
+  addi x1, x1, 1
+label398:
+  jal  x0, label399
+  addi x1, x1, 1
+label399:
+  jal  x0, label400
+  addi x1, x1, 1
+label400:
+  jal  x0, label401
+  addi x1, x1, 1
+label401:
+  jal  x0, label402
+  addi x1, x1, 1
+label402:
+  jal  x0, label403
+  addi x1, x1, 1
+label403:
+  jal  x0, label404
+  addi x1, x1, 1
+label404:
+  jal  x0, label405
+  addi x1, x1, 1
+label405:
+  jal  x0, label406
+  addi x1, x1, 1
+label406:
+  jal  x0, label407
+  addi x1, x1, 1
+label407:
+  jal  x0, label408
+  addi x1, x1, 1
+label408:
+  jal  x0, label409
+  addi x1, x1, 1
+label409:
+  jal  x0, label410
+  addi x1, x1, 1
+label410:
+  jal  x0, label411
+  addi x1, x1, 1
+label411:
+  jal  x0, label412
+  addi x1, x1, 1
+label412:
+  jal  x0, label413
+  addi x1, x1, 1
+label413:
+  jal  x0, label414
+  addi x1, x1, 1
+label414:
+  jal  x0, label415
+  addi x1, x1, 1
+label415:
+  jal  x0, label416
+  addi x1, x1, 1
+label416:
+  jal  x0, label417
+  addi x1, x1, 1
+label417:
+  jal  x0, label418
+  addi x1, x1, 1
+label418:
+  jal  x0, label419
+  addi x1, x1, 1
+label419:
+  jal  x0, label420
+  addi x1, x1, 1
+label420:
+  jal  x0, label421
+  addi x1, x1, 1
+label421:
+  jal  x0, label422
+  addi x1, x1, 1
+label422:
+  jal  x0, label423
+  addi x1, x1, 1
+label423:
+  jal  x0, label424
+  addi x1, x1, 1
+label424:
+  jal  x0, label425
+  addi x1, x1, 1
+label425:
+  jal  x0, label426
+  addi x1, x1, 1
+label426:
+  jal  x0, label427
+  addi x1, x1, 1
+label427:
+  jal  x0, label428
+  addi x1, x1, 1
+label428:
+  jal  x0, label429
+  addi x1, x1, 1
+label429:
+  jal  x0, label430
+  addi x1, x1, 1
+label430:
+  jal  x0, label431
+  addi x1, x1, 1
+label431:
+  jal  x0, label432
+  addi x1, x1, 1
+label432:
+  jal  x0, label433
+  addi x1, x1, 1
+label433:
+  jal  x0, label434
+  addi x1, x1, 1
+label434:
+  jal  x0, label435
+  addi x1, x1, 1
+label435:
+  jal  x0, label436
+  addi x1, x1, 1
+label436:
+  jal  x0, label437
+  addi x1, x1, 1
+label437:
+  jal  x0, label438
+  addi x1, x1, 1
+label438:
+  jal  x0, label439
+  addi x1, x1, 1
+label439:
+  jal  x0, label440
+  addi x1, x1, 1
+label440:
+  jal  x0, label441
+  addi x1, x1, 1
+label441:
+  jal  x0, label442
+  addi x1, x1, 1
+label442:
+  jal  x0, label443
+  addi x1, x1, 1
+label443:
+  jal  x0, label444
+  addi x1, x1, 1
+label444:
+  jal  x0, label445
+  addi x1, x1, 1
+label445:
+  jal  x0, label446
+  addi x1, x1, 1
+label446:
+  jal  x0, label447
+  addi x1, x1, 1
+label447:
+  jal  x0, label448
+  addi x1, x1, 1
+label448:
+  jal  x0, label449
+  addi x1, x1, 1
+label449:
+  jal  x0, label450
+  addi x1, x1, 1
+label450:
+  jal  x0, label451
+  addi x1, x1, 1
+label451:
+  jal  x0, label452
+  addi x1, x1, 1
+label452:
+  jal  x0, label453
+  addi x1, x1, 1
+label453:
+  jal  x0, label454
+  addi x1, x1, 1
+label454:
+  jal  x0, label455
+  addi x1, x1, 1
+label455:
+  jal  x0, label456
+  addi x1, x1, 1
+label456:
+  jal  x0, label457
+  addi x1, x1, 1
+label457:
+  jal  x0, label458
+  addi x1, x1, 1
+label458:
+  jal  x0, label459
+  addi x1, x1, 1
+label459:
+  jal  x0, label460
+  addi x1, x1, 1
+label460:
+  jal  x0, label461
+  addi x1, x1, 1
+label461:
+  jal  x0, label462
+  addi x1, x1, 1
+label462:
+  jal  x0, label463
+  addi x1, x1, 1
+label463:
+  jal  x0, label464
+  addi x1, x1, 1
+label464:
+  jal  x0, label465
+  addi x1, x1, 1
+label465:
+  jal  x0, label466
+  addi x1, x1, 1
+label466:
+  jal  x0, label467
+  addi x1, x1, 1
+label467:
+  jal  x0, label468
+  addi x1, x1, 1
+label468:
+  jal  x0, label469
+  addi x1, x1, 1
+label469:
+  jal  x0, label470
+  addi x1, x1, 1
+label470:
+  jal  x0, label471
+  addi x1, x1, 1
+label471:
+  jal  x0, label472
+  addi x1, x1, 1
+label472:
+  jal  x0, label473
+  addi x1, x1, 1
+label473:
+  jal  x0, label474
+  addi x1, x1, 1
+label474:
+  jal  x0, label475
+  addi x1, x1, 1
+label475:
+  jal  x0, label476
+  addi x1, x1, 1
+label476:
+  jal  x0, label477
+  addi x1, x1, 1
+label477:
+  jal  x0, label478
+  addi x1, x1, 1
+label478:
+  jal  x0, label479
+  addi x1, x1, 1
+label479:
+  jal  x0, label480
+  addi x1, x1, 1
+label480:
+  jal  x0, label481
+  addi x1, x1, 1
+label481:
+  jal  x0, label482
+  addi x1, x1, 1
+label482:
+  jal  x0, label483
+  addi x1, x1, 1
+label483:
+  jal  x0, label484
+  addi x1, x1, 1
+label484:
+  jal  x0, label485
+  addi x1, x1, 1
+label485:
+  jal  x0, label486
+  addi x1, x1, 1
+label486:
+  jal  x0, label487
+  addi x1, x1, 1
+label487:
+  jal  x0, label488
+  addi x1, x1, 1
+label488:
+  jal  x0, label489
+  addi x1, x1, 1
+label489:
+  jal  x0, label490
+  addi x1, x1, 1
+label490:
+  jal  x0, label491
+  addi x1, x1, 1
+label491:
+  jal  x0, label492
+  addi x1, x1, 1
+label492:
+  jal  x0, label493
+  addi x1, x1, 1
+label493:
+  jal  x0, label494
+  addi x1, x1, 1
+label494:
+  jal  x0, label495
+  addi x1, x1, 1
+label495:
+  jal  x0, label496
+  addi x1, x1, 1
+label496:
+  jal  x0, label497
+  addi x1, x1, 1
+label497:
+  jal  x0, label498
+  addi x1, x1, 1
+label498:
+  jal  x0, label499
+  addi x1, x1, 1
+label499:
+
+  /* Write counter into DEM. */
+  la   x5, res
+  sw   x1, 0(x5)
+
+  ecall
+
+.data
+  .balign 32
+  .globl res
+  res:
+    .zero 4
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_lw.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_lw.s
new file mode 100644
index 0000000000000..3cccb39046714
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_lw.s
@@ -0,0 +1,89 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR.LW FI Penetration Test
+*/
+.section .text.start
+  /* Load values from DMEM into a register (FI target). */
+  la x31, mem_in
+  lw x2, 0(x31)
+  lw x3, 4(x31)
+  lw x4, 8(x31)
+  lw x5, 12(x31)
+  lw x6, 16(x31)
+  lw x7, 20(x31)
+  lw x8, 24(x31)
+  lw x9, 28(x31)
+  lw x10, 32(x31)
+  lw x11, 36(x31)
+  lw x12, 40(x31)
+  lw x13, 44(x31)
+  lw x14, 48(x31)
+  lw x15, 52(x31)
+  lw x16, 56(x31)
+  lw x17, 60(x31)
+  lw x18, 64(x31)
+  lw x19, 68(x31)
+  lw x20, 72(x31)
+  lw x21, 76(x31)
+  lw x22, 80(x31)
+  lw x23, 84(x31)
+  lw x24, 88(x31)
+  lw x25, 92(x31)
+  lw x26, 96(x31)
+  lw x27, 100(x31)
+  lw x28, 104(x31)
+  lw x29, 108(x31)
+  lw x30, 112(x31)
+
+  /* 1000 NOPs to not accidentally hit the instructions below. */
+  loopi 10, 3
+    loopi 100, 1
+      nop
+    nop
+
+  /* Store values from registers into DMEM. */
+  la x31, mem_out
+  sw x2, 0(x31)
+  sw x3, 4(x31)
+  sw x4, 8(x31)
+  sw x5, 12(x31)
+  sw x6, 16(x31)
+  sw x7, 20(x31)
+  sw x8, 24(x31)
+  sw x9, 28(x31)
+  sw x10, 32(x31)
+  sw x11, 36(x31)
+  sw x12, 40(x31)
+  sw x13, 44(x31)
+  sw x14, 48(x31)
+  sw x15, 52(x31)
+  sw x16, 56(x31)
+  sw x17, 60(x31)
+  sw x18, 64(x31)
+  sw x19, 68(x31)
+  sw x20, 72(x31)
+  sw x21, 76(x31)
+  sw x22, 80(x31)
+  sw x23, 84(x31)
+  sw x24, 88(x31)
+  sw x25, 92(x31)
+  sw x26, 96(x31)
+  sw x27, 100(x31)
+  sw x28, 104(x31)
+  sw x29, 108(x31)
+  sw x30, 112(x31)
+
+  ecall
+
+.data
+  .balign 32
+  .globl mem_in
+  mem_in:
+    .zero 128
+
+  .balign 32
+  .globl mem_out
+  mem_out:
+    .zero 128
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_rf.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_rf.s
new file mode 100644
index 0000000000000..92e5c3401c7c1
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_char_rf.s
@@ -0,0 +1,165 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.CHAR_RF FI Penetration Test
+*/
+.section .text.start
+  /* Init GPR RF. */
+  la x31, otbn_ref_values
+  lw x2, 0(x31)
+  lw x3, 4(x31)
+  lw x4, 8(x31)
+  lw x5, 12(x31)
+  lw x6, 16(x31)
+  lw x7, 20(x31)
+  lw x8, 24(x31)
+  lw x9, 28(x31)
+  lw x10, 32(x31)
+  lw x11, 36(x31)
+  lw x12, 40(x31)
+  lw x13, 44(x31)
+  lw x14, 48(x31)
+  lw x15, 52(x31)
+  lw x16, 56(x31)
+  lw x17, 60(x31)
+  lw x18, 64(x31)
+  lw x19, 68(x31)
+  lw x20, 72(x31)
+  lw x21, 76(x31)
+  lw x22, 80(x31)
+  lw x23, 84(x31)
+  lw x24, 88(x31)
+  lw x25, 92(x31)
+  lw x26, 96(x31)
+  lw x27, 100(x31)
+  lw x28, 104(x31)
+  lw x29, 108(x31)
+  lw x30, 112(x31)
+
+  /* Init WDR RF. */
+  li x1, 0
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x0(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+  bn.lid    x1++, 0x00(x31)
+  bn.lid    x1++, 0x20(x31)
+  bn.lid    x1++, 0x40(x31)
+  bn.lid    x1++, 0x60(x31)
+
+  /* 10000 NOPs (FI target). */
+  loopi 10, 3
+    loopi 1000, 1
+      nop
+    nop
+
+  /* Read GPR RF into DMEM. */
+  la x31, otbn_res_values_gpr
+  sw x2, 0(x31)
+  sw x3, 4(x31)
+  sw x4, 8(x31)
+  sw x5, 12(x31)
+  sw x6, 16(x31)
+  sw x7, 20(x31)
+  sw x8, 24(x31)
+  sw x9, 28(x31)
+  sw x10, 32(x31)
+  sw x11, 36(x31)
+  sw x12, 40(x31)
+  sw x13, 44(x31)
+  sw x14, 48(x31)
+  sw x15, 52(x31)
+  sw x16, 56(x31)
+  sw x17, 60(x31)
+  sw x18, 64(x31)
+  sw x19, 68(x31)
+  sw x20, 72(x31)
+  sw x21, 76(x31)
+  sw x22, 80(x31)
+  sw x23, 84(x31)
+  sw x24, 88(x31)
+  sw x25, 92(x31)
+  sw x26, 96(x31)
+  sw x27, 100(x31)
+  sw x28, 104(x31)
+  sw x29, 108(x31)
+  sw x30, 112(x31)
+
+  /* Read WDR RF into DMEM. */
+  la x31, otbn_res_values_wdr
+  li        x1, 0
+  bn.sid    x1++, 0x000(x31)
+  bn.sid    x1++, 0x020(x31)
+  bn.sid    x1++, 0x040(x31)
+  bn.sid    x1++, 0x060(x31)
+  bn.sid    x1++, 0x080(x31)
+  bn.sid    x1++, 0x0a0(x31)
+  bn.sid    x1++, 0x0c0(x31)
+  bn.sid    x1++, 0x0e0(x31)
+  bn.sid    x1++, 0x100(x31)
+  bn.sid    x1++, 0x120(x31)
+  bn.sid    x1++, 0x140(x31)
+  bn.sid    x1++, 0x160(x31)
+  bn.sid    x1++, 0x180(x31)
+  bn.sid    x1++, 0x1a0(x31)
+  bn.sid    x1++, 0x1c0(x31)
+  bn.sid    x1++, 0x1e0(x31)
+  bn.sid    x1++, 0x200(x31)
+  bn.sid    x1++, 0x220(x31)
+  bn.sid    x1++, 0x240(x31)
+  bn.sid    x1++, 0x260(x31)
+  bn.sid    x1++, 0x280(x31)
+  bn.sid    x1++, 0x2a0(x31)
+  bn.sid    x1++, 0x2c0(x31)
+  bn.sid    x1++, 0x2e0(x31)
+  bn.sid    x1++, 0x300(x31)
+  bn.sid    x1++, 0x320(x31)
+  bn.sid    x1++, 0x340(x31)
+  bn.sid    x1++, 0x360(x31)
+  bn.sid    x1++, 0x380(x31)
+  bn.sid    x1++, 0x3a0(x31)
+  bn.sid    x1++, 0x3c0(x31)
+  bn.sid    x1++, 0x3e0(x31)
+
+  ecall
+
+.data
+  .balign 32
+  .globl otbn_ref_values
+  otbn_ref_values:
+    .zero 128
+
+  .balign 32
+  .globl otbn_res_values_gpr
+  otbn_res_values_gpr:
+    .zero 128
+
+  .balign 32
+  .globl otbn_res_values_wdr
+  otbn_res_values_wdr:
+    .zero 1024
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_key_sideload.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_key_sideload.s
new file mode 100644
index 0000000000000..d57588e47f3cc
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_key_sideload.s
@@ -0,0 +1,53 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.KEY_SIDELOAD FI Penetration Test
+*/
+.section .text.start
+
+    /* Load all key shares into w20...w23. */
+    bn.wsrr  w20, KEY_S0_L
+    bn.wsrr  w21, KEY_S1_L
+    bn.wsrr  w22, KEY_S0_H
+    bn.wsrr  w23, KEY_S1_H
+
+    /* Write key shared into accessible DMEM. */
+    li      x2, 20
+    la      x3, k_s0_l
+    bn.sid  x2, 0(x3)
+
+    li      x2, 21
+    la      x3, k_s0_h
+    bn.sid  x2, 0(x3)
+
+    li      x2, 22
+    la      x3, k_s1_l
+    bn.sid  x2, 0(x3)
+
+    li      x2, 23
+    la      x3, k_s1_h
+    bn.sid  x2, 0(x3)
+
+    ecall
+
+.data
+    .globl k_s0_l
+    .balign 32
+    k_s0_l:
+    .zero 32
+
+    .globl k_s0_h
+    .balign 32
+    k_s0_h:
+    .zero 32
+
+    .globl k_s1_l
+    .balign 32
+    k_s1_l:
+    .zero 32
+
+    .globl k_s1_h
+    .balign 32
+    k_s1_h:
+    .zero 32
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_load_integrity.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_load_integrity.s
new file mode 100644
index 0000000000000..b2e6736e36528
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_load_integrity.s
@@ -0,0 +1,31 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.LOAD_INTEGRITY FI Penetration Test
+*/
+.section .text.start
+
+    /* Execute 10 NOPs. */
+    li x1, 10
+    loop x1, 1
+      nop
+
+    ecall
+
+.data
+    /* Reference values. */
+    .balign 32
+    .globl refval1
+    refval1:
+      .word 0x1BADB002
+
+    .balign 32
+    .globl refval2
+    refval2:
+      .word 0x8BADF00D
+
+    .balign 32
+    .globl refval3
+    refval3:
+      .word 0xA5A5A5A5
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_pc.s b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_pc.s
new file mode 100644
index 0000000000000..0d70b59833495
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn/otbn_pc.s
@@ -0,0 +1,1048 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.PC FI Penetration Test
+*/
+.section .text.start
+  /* Load PC from DMEM. */
+  la x31, pc
+  lw x2, 0(x31)
+
+  /* Jump to given PC. */
+  jalr  x0, x2, 0
+
+  /* NOP slide. */
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+  nop
+
+  /* Write back PC to DMEM. */
+  la x31, pc_out
+  sw x2, 0(x31)
+
+  ecall
+
+.data
+  .balign 32
+  .globl pc
+  pc:
+    .zero 4
+
+  .balign 32
+  .globl pc_out
+  pc_out:
+    .zero 4
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.c b/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.c
index 68eda79462371..2f1741d7aa091 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.c
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.c
@@ -6,44 +6,695 @@
 
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/keymgr.h"
+#include "sw/device/lib/crypto/drivers/otbn.h"
+#include "sw/device/lib/dif/dif_otbn.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
-#include "sw/device/sca/lib/sca.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 #include "sw/device/tests/penetrationtests/json/otbn_fi_commands.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
 #include "otbn_regs.h"
 
+// Interface to Ibex.
+static dif_rv_core_ibex_t rv_core_ibex;
+
+static dif_otbn_t otbn;
+static dif_keymgr_t keymgr;
+
+// Indicates whether the load_integrity test is already initialized.
+static bool load_integrity_init;
+// Indicates whether the char mem test is already initialized.
+static bool char_mem_init;
+// Indicates whether the char mem test config is valid.
+static bool char_mem_test_cfg_valid;
+// Reference checksum for the load integrity test.
+static uint32_t load_checksum_ref;
+// Load integrity test. Initialize OTBN app, load it, and get interface to
+// OTBN data memory.
+OTBN_DECLARE_APP_SYMBOLS(otbn_load_integrity);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval1);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval2);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_load_integrity, refval3);
+static const otbn_app_t kOtbnAppLoadIntegrity =
+    OTBN_APP_T_INIT(otbn_load_integrity);
+static const otbn_addr_t kOtbnAppLoadIntegrityRefVal1 =
+    OTBN_ADDR_T_INIT(otbn_load_integrity, refval1);
+static const otbn_addr_t kOtbnAppLoadIntegrityRefVal2 =
+    OTBN_ADDR_T_INIT(otbn_load_integrity, refval2);
+static const otbn_addr_t kOtbnAppLoadIntegrityRefVal3 =
+    OTBN_ADDR_T_INIT(otbn_load_integrity, refval3);
+
+// Indicates whether the key sideloading test is already initialized.
+static bool key_sideloading_init;
+// Key sideloading test. Initialize OTBN app, load it, and get interface to
+// OTBN data memory.
+OTBN_DECLARE_APP_SYMBOLS(otbn_key_sideload);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s0_l);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s0_h);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s1_l);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload, k_s1_h);
+const otbn_app_t kOtbnAppKeySideload = OTBN_APP_T_INIT(otbn_key_sideload);
+static const otbn_addr_t kOtbnAppKeySideloadks0l =
+    OTBN_ADDR_T_INIT(otbn_key_sideload, k_s0_l);
+static const otbn_addr_t kOtbnAppKeySideloadks0h =
+    OTBN_ADDR_T_INIT(otbn_key_sideload, k_s0_h);
+static const otbn_addr_t kOtbnAppKeySideloadks1l =
+    OTBN_ADDR_T_INIT(otbn_key_sideload, k_s1_l);
+static const otbn_addr_t kOtbnAppKeySideloadks1h =
+    OTBN_ADDR_T_INIT(otbn_key_sideload, k_s1_h);
+
+// Config for the otbn.fi.char_mem test.
+static bool char_mem_imem;
+static bool char_mem_dmem;
+static uint32_t char_mem_byte_offset;
+static uint32_t char_mem_num_words;
+
+uint32_t key_share_0_l_ref, key_share_0_h_ref;
+uint32_t key_share_1_l_ref, key_share_1_h_ref;
+
+// Reference values.
+static const uint32_t ref_values[32] = {
+    0x1BADB002, 0x8BADF00D, 0xA5A5A5A5, 0xABABABAB, 0xABBABABE, 0xABADCAFE,
+    0xBAAAAAAD, 0xBAD22222, 0xBBADBEEF, 0xBEBEBEBE, 0xBEEFCACE, 0xC00010FF,
+    0xCAFED00D, 0xCAFEFEED, 0xCCCCCCCC, 0xCDCDCDCD, 0x0D15EA5E, 0xDEAD10CC,
+    0xDEADBEEF, 0xDEADCAFE, 0xDEADC0DE, 0xDEADFA11, 0xDEADF00D, 0xDEFEC8ED,
+    0xDEADDEAD, 0xD00D2BAD, 0xEBEBEBEB, 0xFADEDEAD, 0xFDFDFDFD, 0xFEE1DEAD,
+    0xFEEDFACE, 0xFEEEFEEE};
+
+static const dif_keymgr_versioned_key_params_t kKeyVersionedParamsOTBNFI = {
+    .dest = kDifKeymgrVersionedKeyDestSw,
+    .salt =  // the salt doesn't really matter here.
+    {
+        0xb6521d8f,
+        0x13a0e876,
+        0x1ca1567b,
+        0xb4fb0fdf,
+        0x9f89bc56,
+        0x4bd127c7,
+        0x322288d8,
+        0xde919d54,
+    },
+    .version = 0x0,  // specify a low enough version to work with the ROM EXT.
+};
+
 /**
- * Reat the error bits of the OTBN accelerator.
+ * Clears the OTBN DMEM and IMEM.
  *
- * @returns Error bits.
+ * @returns OK or error.
  */
-status_t read_otbn_err_bits(dif_otbn_err_bits_t *err_bits) {
-  dif_otbn_t otbn;
-  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
-  TRY(dif_otbn_get_err_bits(&otbn, err_bits));
-  return OK_STATUS(0);
+static status_t clear_otbn(void) {
+  // Clear OTBN memory.
+  TRY(otbn_dmem_sec_wipe());
+  TRY(otbn_imem_sec_wipe());
+
+  return OK_STATUS();
 }
 
 /**
- * otbn.fi.char.hardware.dmem.op.loop command handler.
+ * Read the error bits of the OTBN accelerator.
  *
- * This FI penetration tests executes the following instructions on OTBN:
- * - Initialize register x3=0
- * - Perform 10000 x3 = x3 + 1 additions using hardware loop instructions.
- *   Load loop counter from memory and write back after increment.
- * - Return the value over UART.
- *
- * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
+ * @returns Error bits.
+ */
+status_t read_otbn_err_bits(dif_otbn_err_bits_t *err_otbn) {
+  TRY(dif_otbn_get_err_bits(&otbn, err_otbn));
+  return OK_STATUS();
+}
+
+/**
+ * Read the OTBN load checksum.
  *
- * @param uj The received uJSON data.
+ * @returns Load checksum.
+ */
+status_t read_otbn_load_checksum(uint32_t *checksum) {
+  TRY(dif_otbn_get_load_checksum(&otbn, checksum));
+  return OK_STATUS();
+}
+
+/**
+ * Clear the OTBN load checksum.
  */
+status_t clear_otbn_load_checksum(void) {
+  TRY(dif_otbn_clear_load_checksum(&otbn));
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_beq(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_beq);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_beq, res);
+  const otbn_app_t kOtbnAppCharBeq = OTBN_APP_T_INIT(otbn_char_beq);
+  static const otbn_addr_t kOtbnAppCharBeqRes =
+      OTBN_ADDR_T_INIT(otbn_char_beq, res);
+  otbn_load_app(kOtbnAppCharBeq);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read counter (x1) from OTBN data memory.
+  otbn_fi_result_cnt_t uj_output;
+  uj_output.result = 0;
+  otbn_dmem_read(1, kOtbnAppCharBeqRes, &uj_output.result);
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_cnt_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_bn_rshi(ujson_t *uj) {
+  // Get big number (2x256 bit).
+  otbn_fi_big_num_t uj_data;
+  TRY(ujson_deserialize_otbn_fi_big_num_t(uj, &uj_data));
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_bn_rshi);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bn_rshi, big_num);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bn_rshi, big_num_out);
+  const otbn_app_t kOtbnAppCharBnRshi = OTBN_APP_T_INIT(otbn_char_bn_rshi);
+  static const otbn_addr_t kOtbnAppCharBnRshiBigNum =
+      OTBN_ADDR_T_INIT(otbn_char_bn_rshi, big_num);
+  static const otbn_addr_t kOtbnAppCharBnRshiBigNumOut =
+      OTBN_ADDR_T_INIT(otbn_char_bn_rshi, big_num_out);
+
+  // Load app and write received big_num into DMEM.
+  otbn_load_app(kOtbnAppCharBnRshi);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnAppCharBnRshiBigNum, uj_data.big_num,
+                          sizeof(uj_data.big_num)));
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read big_num_out from OTBN data memory.
+  otbn_fi_big_num_out_t uj_output;
+  memset(uj_output.big_num, 0, sizeof(uj_output.big_num));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnAppCharBnRshiBigNumOut, uj_output.big_num,
+                         sizeof(uj_output.big_num)));
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_big_num_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_bn_sel(ujson_t *uj) {
+  // Get big number (2x256 bit).
+  otbn_fi_big_num_t uj_data;
+  TRY(ujson_deserialize_otbn_fi_big_num_t(uj, &uj_data));
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_bn_sel);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bn_sel, big_num);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bn_sel, big_num_out);
+  const otbn_app_t kOtbnAppCharBnSel = OTBN_APP_T_INIT(otbn_char_bn_sel);
+  static const otbn_addr_t kOtbnAppCharBnSelBigNum =
+      OTBN_ADDR_T_INIT(otbn_char_bn_sel, big_num);
+  static const otbn_addr_t kOtbnAppCharBnSelBigNumOut =
+      OTBN_ADDR_T_INIT(otbn_char_bn_sel, big_num_out);
+
+  // Load app and write received big_num into DMEM.
+  otbn_load_app(kOtbnAppCharBnSel);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnAppCharBnSelBigNum, uj_data.big_num,
+                          sizeof(uj_data.big_num)));
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read big_num_out from OTBN data memory.
+  otbn_fi_big_num_out_t uj_output;
+  memset(uj_output.big_num, 0, sizeof(uj_output.big_num));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnAppCharBnSelBigNumOut, uj_output.big_num,
+                         sizeof(uj_output.big_num)));
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_big_num_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_bn_wsrr(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_bn_wsrr);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bn_wsrr, otbn_res_values_wdr);
+  const otbn_app_t kOtbnAppCharBnWsrr = OTBN_APP_T_INIT(otbn_char_bn_wsrr);
+  static const otbn_addr_t kOtbnAppCharBnWsrrResValuesWDR =
+      OTBN_ADDR_T_INIT(otbn_char_bn_wsrr, otbn_res_values_wdr);
+
+  // Load app and write received big_num into DMEM.
+  otbn_load_app(kOtbnAppCharBnWsrr);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Read DMEM
+  otbn_fi_data_t uj_output;
+  uj_output.res = 0;
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnAppCharBnWsrrResValuesWDR, uj_output.data,
+                         sizeof(uj_output.data)));
+  // Read OTBN instruction counter
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_data_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_bne(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_bne);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_bne, res);
+  const otbn_app_t kOtbnAppCharBne = OTBN_APP_T_INIT(otbn_char_bne);
+  static const otbn_addr_t kOtbnAppCharBneRes =
+      OTBN_ADDR_T_INIT(otbn_char_bne, res);
+  otbn_load_app(kOtbnAppCharBne);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+  // Read counter (x1) from OTBN data memory.
+  otbn_fi_result_cnt_t uj_output;
+  uj_output.result = 0;
+  otbn_dmem_read(1, kOtbnAppCharBneRes, &uj_output.result);
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_cnt_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_dmem_access(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Config for the otbn.fi.char_dmem_access test.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_dmem_access);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_dmem_access, values);
+  static const otbn_app_t kOtbnAppCharDmemAccess =
+      OTBN_APP_T_INIT(otbn_char_dmem_access);
+  static const otbn_addr_t kOtbnVarCharDmemAccessValues =
+      OTBN_ADDR_T_INIT(otbn_char_dmem_access, values);
+
+  otbn_load_app(kOtbnAppCharDmemAccess);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Read DMEM
+  otbn_fi_data_t uj_output;
+  uj_output.res = 0;
+  memset(uj_output.data, 0, sizeof(uj_output.data));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarCharDmemAccessValues, uj_output.data,
+                         sizeof(uj_output.data)));
+  // Read OTBN instruction counter
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_data_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_dmem_write(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Config for the otbn.fi.char_rf test.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_dmem_write);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_dmem_write, mem);
+
+  static const otbn_app_t kOtbnAppCharDmemWrite =
+      OTBN_APP_T_INIT(otbn_char_dmem_write);
+  static const otbn_addr_t kOtbnVarCharDmemWriteMem =
+      OTBN_ADDR_T_INIT(otbn_char_dmem_write, mem);
+
+  // Init application and load reference values into DMEM.
+  otbn_load_app(kOtbnAppCharDmemWrite);
+  // FI code target.
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  // Unrolled instruction sequence.
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem),
+      ref_values[0]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 4),
+      ref_values[1]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 8),
+      ref_values[2]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 12),
+      ref_values[3]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 16),
+      ref_values[4]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 20),
+      ref_values[5]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 24),
+      ref_values[6]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 28),
+      ref_values[7]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 32),
+      ref_values[8]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 36),
+      ref_values[9]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 40),
+      ref_values[10]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 44),
+      ref_values[11]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 48),
+      ref_values[12]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 52),
+      ref_values[13]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 56),
+      ref_values[14]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 60),
+      ref_values[15]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 64),
+      ref_values[16]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 68),
+      ref_values[17]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 72),
+      ref_values[18]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 76),
+      ref_values[19]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 80),
+      ref_values[20]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 84),
+      ref_values[21]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 88),
+      ref_values[22]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 92),
+      ref_values[23]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 96),
+      ref_values[24]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 100),
+      ref_values[25]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 104),
+      ref_values[26]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 108),
+      ref_values[27]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 112),
+      ref_values[28]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 116),
+      ref_values[29]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 120),
+      ref_values[30]);
+  mmio_region_write32(
+      otbn.base_addr,
+      (ptrdiff_t)(OTBN_DMEM_REG_OFFSET + kOtbnVarCharDmemWriteMem + 124),
+      ref_values[31]);
+  asm volatile(NOP10);
+  pentest_set_trigger_low();
+
+  // Execute OTBN application.
+  otbn_execute();
+  otbn_busy_wait_for_done();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Compare reference values.
+  otbn_fi_result_array_t uj_output;
+  uint32_t res_values[ARRAYSIZE(ref_values)];
+  memset(res_values, 0, sizeof(res_values));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarCharDmemWriteMem, res_values,
+                         sizeof(res_values)));
+  for (size_t it = 0; it < ARRAYSIZE(ref_values); it++) {
+    uj_output.result[it] = res_values[it] ^ ref_values[it];
+  }
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_array_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
 status_t handle_otbn_fi_char_hardware_dmem_op_loop(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
   // Initialize OTBN app, load it, and get interface to OTBN data memory.
   OTBN_DECLARE_APP_SYMBOLS(otbn_char_hardware_dmem_op_loop);
   OTBN_DECLARE_SYMBOL_ADDR(otbn_char_hardware_dmem_op_loop, lc);
@@ -56,40 +707,47 @@ status_t handle_otbn_fi_char_hardware_dmem_op_loop(ujson_t *uj) {
   uint32_t loop_counter;
 
   // FI code target.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   otbn_execute();
   otbn_busy_wait_for_done();
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read loop counter from OTBN data memory.
   otbn_dmem_read(1, kOtbnAppCharHardwareDmemOpLoopLC, &loop_counter);
 
   // Read ERR_STATUS register from OTBN.
-  dif_otbn_err_bits_t err_bits;
-  read_otbn_err_bits(&err_bits);
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
 
   // Send loop counter & ERR_STATUS to host.
   otbn_fi_loop_counter_t uj_output;
   uj_output.loop_counter = loop_counter;
-  uj_output.err_status = err_bits;
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_otbn_fi_loop_counter_t, uj, &uj_output);
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
-/**
- * otbn.fi.char.hardware.reg.op.loop command handler.
- *
- * This FI penetration tests executes the following instructions on OTBN:
- * - Initialize register x3=0
- * - Perform 10000 x3 = x3 + 1 additions using hardware loop instructions
- * - Return the value over UART.
- *
- * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
- *
- * @param uj The received uJSON data.
- */
 status_t handle_otbn_fi_char_hardware_reg_op_loop(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
   // Initialize OTBN app, load it, and get interface to OTBN data memory.
   OTBN_DECLARE_APP_SYMBOLS(otbn_char_hardware_reg_op_loop);
   OTBN_DECLARE_SYMBOL_ADDR(otbn_char_hardware_reg_op_loop, lc);
@@ -102,42 +760,370 @@ status_t handle_otbn_fi_char_hardware_reg_op_loop(ujson_t *uj) {
   uint32_t loop_counter;
 
   // FI code target.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   otbn_execute();
   otbn_busy_wait_for_done();
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read loop counter from OTBN data memory.
   otbn_dmem_read(1, kOtbnAppCharHardwareRegOpLoopLC, &loop_counter);
 
   // Read ERR_STATUS register from OTBN.
-  dif_otbn_err_bits_t err_bits;
-  read_otbn_err_bits(&err_bits);
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
 
   // Send loop counter & ERR_STATUS to host.
   otbn_fi_loop_counter_t uj_output;
   uj_output.loop_counter = loop_counter;
-  uj_output.err_status = err_bits;
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_otbn_fi_loop_counter_t, uj, &uj_output);
-  return OK_STATUS(0);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_jal(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_jal);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_jal, res);
+  const otbn_app_t kOtbnAppCharJal = OTBN_APP_T_INIT(otbn_char_jal);
+  static const otbn_addr_t kOtbnAppCharJalRes =
+      OTBN_ADDR_T_INIT(otbn_char_jal, res);
+  otbn_load_app(kOtbnAppCharJal);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read counter (x1) from OTBN data memory.
+  otbn_fi_result_cnt_t uj_output;
+  uj_output.result = 0;
+  otbn_dmem_read(1, kOtbnAppCharJalRes, &uj_output.result);
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_cnt_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_lw(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_lw);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_lw, mem_in);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_lw, mem_out);
+  const otbn_app_t kOtbnAppCharLw = OTBN_APP_T_INIT(otbn_char_lw);
+  static const otbn_addr_t kOtbnMemIn = OTBN_ADDR_T_INIT(otbn_char_lw, mem_in);
+  static const otbn_addr_t kOtbnMemOut =
+      OTBN_ADDR_T_INIT(otbn_char_lw, mem_out);
+
+  // Load app and write reference values into mem_in DMEM.
+  otbn_load_app(kOtbnAppCharLw);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnMemIn, ref_values, sizeof(ref_values)));
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Compare reference values. 29 values as we are loading into 29 registers.
+  otbn_fi_result_array_t uj_output;
+  uint32_t res_values[29];
+  memset(res_values, 0, sizeof(res_values));
+  memset(uj_output.result, 0, sizeof(uj_output.result));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnMemOut, res_values, sizeof(res_values)));
+  for (size_t it = 0; it < 29; it++) {
+    uj_output.result[it] = res_values[it] ^ ref_values[it];
+  }
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_array_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_mem(ujson_t *uj) {
+  // Get the test mode. The test mode only can be set at the beginning of a
+  // test.
+  if (!char_mem_test_cfg_valid) {
+    otbn_fi_mem_cfg_t uj_cfg;
+    TRY(ujson_deserialize_otbn_fi_mem_cfg_t(uj, &uj_cfg));
+    char_mem_imem = uj_cfg.imem;
+    char_mem_dmem = uj_cfg.dmem;
+    char_mem_byte_offset = uj_cfg.byte_offset;
+    char_mem_num_words = uj_cfg.num_words;
+    // Set config to valid.
+    char_mem_test_cfg_valid = true;
+  }
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Reference values for DMEM and IMEM.
+  uint32_t dmem_array_ref[char_mem_num_words];
+  uint32_t imem_array_ref[char_mem_num_words];
+  if (char_mem_dmem) {
+    memset(dmem_array_ref, 0xab, sizeof(dmem_array_ref));
+  }
+  if (char_mem_imem) {
+    memset(imem_array_ref, 0xdf, sizeof(imem_array_ref));
+  }
+
+  if (!char_mem_init) {
+    if (char_mem_dmem) {
+      TRY(dif_otbn_dmem_write(&otbn, char_mem_byte_offset, dmem_array_ref,
+                              sizeof(dmem_array_ref)));
+    }
+    if (char_mem_imem) {
+      TRY(dif_otbn_imem_write(&otbn, char_mem_byte_offset, imem_array_ref,
+                              sizeof(imem_array_ref)));
+    }
+    char_mem_init = true;
+  }
+
+  // FI code target.
+  pentest_set_trigger_high();
+  asm volatile(NOP100);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  otbn_fi_mem_t uj_output;
+  // Init with all 0 for defaults.
+  memset(uj_output.dmem_data, 0, sizeof(uj_output.dmem_data));
+  memset(uj_output.dmem_addr, 0, sizeof(uj_output.dmem_addr));
+  memset(uj_output.imem_data, 0, sizeof(uj_output.imem_data));
+  memset(uj_output.imem_addr, 0, sizeof(uj_output.imem_addr));
+  uj_output.res = 0;
+
+  // Check DMEM for data errors.
+  size_t fault_pos = 0;
+  if (char_mem_dmem) {
+    uint32_t dmem_array_res[char_mem_num_words];
+    TRY(dif_otbn_dmem_read(&otbn, char_mem_byte_offset, dmem_array_res,
+                           sizeof(dmem_array_ref)));
+    for (size_t it = 0; it < char_mem_num_words; it++) {
+      if (dmem_array_res[it] != dmem_array_ref[it] &&
+          fault_pos < ARRAYSIZE(uj_output.dmem_data)) {
+        uj_output.dmem_data[fault_pos] = dmem_array_res[it];
+        uj_output.dmem_addr[fault_pos] = it;
+        fault_pos++;
+        // Re-init memory.
+        char_mem_init = false;
+        uj_output.res = 1;
+      }
+    }
+  }
+
+  // Check IMEM for data errors.
+  uint32_t imem_array_res[char_mem_num_words];
+  if (char_mem_imem) {
+    TRY(dif_otbn_imem_read(&otbn, char_mem_byte_offset, imem_array_res,
+                           sizeof(imem_array_ref)));
+    fault_pos = 0;
+    for (size_t it = 0; it < char_mem_num_words; it++) {
+      if (imem_array_res[it] != imem_array_ref[it] &&
+          fault_pos < ARRAYSIZE(uj_output.imem_data)) {
+        uj_output.imem_data[fault_pos] = imem_array_res[it];
+        uj_output.imem_addr[fault_pos] = it;
+        fault_pos++;
+        // Re-init memory.
+        char_mem_init = false;
+        uj_output.res = 1;
+      }
+    }
+  }
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_mem_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_char_register_file(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Config for the otbn.fi.char_rf test.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_char_rf);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_rf, otbn_ref_values);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_rf, otbn_res_values_gpr);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_char_rf, otbn_res_values_wdr);
+
+  static const otbn_app_t kOtbnAppCharRF = OTBN_APP_T_INIT(otbn_char_rf);
+  static const otbn_addr_t kOtbnVarCharRFRefValues =
+      OTBN_ADDR_T_INIT(otbn_char_rf, otbn_ref_values);
+  static const otbn_addr_t kOtbnVarCharRFResValuesGPR =
+      OTBN_ADDR_T_INIT(otbn_char_rf, otbn_res_values_gpr);
+  static const otbn_addr_t kOtbnVarCharRFResValuesWDR =
+      OTBN_ADDR_T_INIT(otbn_char_rf, otbn_res_values_wdr);
+
+  // Init application and load reference values into DMEM.
+  otbn_load_app(kOtbnAppCharRF);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarCharRFRefValues, ref_values,
+                          sizeof(ref_values)));
+
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Read GPR RF values from DMEM.
+  uint32_t res_values_gpr[29];
+  memset(res_values_gpr, 0, sizeof(res_values_gpr));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarCharRFResValuesGPR, res_values_gpr,
+                         sizeof(res_values_gpr)));
+
+  // Compare GPR RF values to reference values.
+  otbn_fi_rf_char_t uj_output;
+  memset(uj_output.faulty_gpr, 0, sizeof(uj_output.faulty_gpr));
+  uj_output.res = 0;
+  for (size_t it = 0; it < ARRAYSIZE(res_values_gpr); it++) {
+    if (res_values_gpr[it] != ref_values[it]) {
+      uj_output.res = 1;
+      // Report reference value XOR faulty value back to also detect faulty
+      // values that are 0.
+      uj_output.faulty_gpr[it] = res_values_gpr[it] ^ ref_values[it];
+    }
+  }
+
+  // Read WDR RF values from DMEM.
+  uint32_t res_values_wdr[256];
+  memset(res_values_wdr, 0, sizeof(res_values_wdr));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarCharRFResValuesWDR, res_values_wdr,
+                         sizeof(res_values_wdr)));
+
+  // Compare WDR RF values to reference values.
+  memset(uj_output.faulty_wdr, 0, sizeof(uj_output.faulty_wdr));
+  for (size_t it = 0; it < ARRAYSIZE(res_values_wdr); it++) {
+    if (res_values_wdr[it] != ref_values[it % 32]) {
+      uj_output.res = 1;
+      // Report reference value XOR faulty value back to also detect faulty
+      // values that are 0.
+      uj_output.faulty_wdr[it] = res_values_wdr[it] ^ ref_values[it % 32];
+    }
+  }
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_rf_char_t, uj, &uj_output);
+
+  return OK_STATUS();
 }
 
-/**
- * otbn.fi.char.unrolled.dmem.op.loop command handler.
- *
- * This FI penetration tests executes the following instructions on OTBN:
- * - Perform 100 times:
- *  - Load loop counter from memory
- *  - Increment loop counter
- *  - Store back to memory
- * - Return the value over UART.
- *
- * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
- *
- * @param uj The received uJSON data.
- */
 status_t handle_otbn_fi_char_unrolled_dmem_op_loop(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
   // Initialize OTBN app, load it, and get interface to OTBN data memory.
   OTBN_DECLARE_APP_SYMBOLS(otbn_char_unrolled_dmem_op_loop);
   OTBN_DECLARE_SYMBOL_ADDR(otbn_char_unrolled_dmem_op_loop, lc);
@@ -150,40 +1136,47 @@ status_t handle_otbn_fi_char_unrolled_dmem_op_loop(ujson_t *uj) {
   uint32_t loop_counter;
 
   // FI code target.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   otbn_execute();
   otbn_busy_wait_for_done();
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read loop counter from OTBN data memory.
   otbn_dmem_read(1, kOtbnAppCharUnrolledDmemOpLoopLC, &loop_counter);
 
   // Read ERR_STATUS register from OTBN.
-  dif_otbn_err_bits_t err_bits;
-  read_otbn_err_bits(&err_bits);
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
 
   // Send loop counter & ERR_STATUS to host.
   otbn_fi_loop_counter_t uj_output;
   uj_output.loop_counter = loop_counter;
-  uj_output.err_status = err_bits;
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_otbn_fi_loop_counter_t, uj, &uj_output);
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
-/**
- * otbn.char.unrolled.reg.op.loop command handler.
- *
- * This FI penetration tests executes the following instructions on OTBN:
- * - Initialize register x2=0
- * - Perform 100 x2 = x2 + 1 additions
- * - Return the value over UART.
- *
- * Faults are injected during the trigger_high & trigger_low.
- * It needs to be ensured that the compiler does not optimize this code.
- *
- * @param uj The received uJSON data.
- */
 status_t handle_otbn_fi_char_unrolled_reg_op_loop(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
   // Initialize OTBN app, load it, and get interface to OTBN data memory.
   OTBN_DECLARE_APP_SYMBOLS(otbn_char_unrolled_reg_op_loop);
   OTBN_DECLARE_SYMBOL_ADDR(otbn_char_unrolled_reg_op_loop, lc);
@@ -196,64 +1189,395 @@ status_t handle_otbn_fi_char_unrolled_reg_op_loop(ujson_t *uj) {
   uint32_t loop_counter;
 
   // FI code target.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   otbn_execute();
   otbn_busy_wait_for_done();
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
 
   // Read loop counter from OTBN data memory.
   otbn_dmem_read(1, kOtbnAppCharUnrolledRegOpLoopLC, &loop_counter);
 
   // Read ERR_STATUS register from OTBN.
-  dif_otbn_err_bits_t err_bits;
-  read_otbn_err_bits(&err_bits);
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
 
   // Send loop counter & ERR_STATUS to host.
   otbn_fi_loop_counter_t uj_output;
   uj_output.loop_counter = loop_counter;
-  uj_output.err_status = err_bits;
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
   RESP_OK(ujson_serialize_otbn_fi_loop_counter_t, uj, &uj_output);
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
-/**
- * Initializes the SCA trigger.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_otbn_fi_init_trigger(ujson_t *uj) {
-  status_t err = entropy_testutils_auto_mode_init();
-  sca_select_trigger_type(kScaTriggerTypeSw);
-  sca_init(kScaTriggerSourceOtbn, kScaPeripheralEntropy | kScaPeripheralIoDiv4 |
-                                      kScaPeripheralOtbn | kScaPeripheralCsrng |
-                                      kScaPeripheralEdn | kScaPeripheralHmac);
-  return err;
+status_t handle_otbn_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  // Configure the entropy complex for OTBN. Set the reseed interval to max
+  // to avoid a non-constant trigger window.
+  TRY(pentest_configure_entropy_source_max_reseed_interval());
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  pentest_init(kPentestTriggerSourceOtbn,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Init the OTBN core.
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // The load integrity, key sideloading, and char_mem tests get initialized at
+  // the first run.
+  load_integrity_init = false;
+  key_sideloading_init = false;
+  char_mem_init = false;
+  char_mem_test_cfg_valid = false;
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_init_keymgr(ujson_t *uj) {
+  dif_kmac_t kmac;
+  TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
+  TRY(dif_keymgr_init(mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR),
+                      &keymgr));
+  TRY(keymgr_testutils_initialize(&keymgr, &kmac));
+
+  dif_keymgr_versioned_key_params_t sideload_params = kKeyVersionedParamsOTBNFI;
+  sideload_params.dest = kDifKeymgrVersionedKeyDestOtbn;
+  TRY(keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_key_sideload(ujson_t *uj) {
+  TRY(dif_otbn_set_ctrl_software_errs_fatal(&otbn, /*enable=*/false));
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (!key_sideloading_init) {
+    // Setup keymanager for sideloading key into OTBN.
+    otbn_load_app(kOtbnAppKeySideload);
+    // Get reference keys.
+    otbn_execute();
+    otbn_busy_wait_for_done();
+
+    otbn_dmem_read(1, kOtbnAppKeySideloadks0l, &key_share_0_l_ref);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks0h, &key_share_0_h_ref);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks1l, &key_share_1_l_ref);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks1h, &key_share_1_h_ref);
+
+    key_sideloading_init = true;
+  }
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read loop counter from OTBN data memory.
+  uint32_t key_share_0_l, key_share_0_h;
+  uint32_t key_share_1_l, key_share_1_h;
+  otbn_dmem_read(1, kOtbnAppKeySideloadks0l, &key_share_0_l);
+  otbn_dmem_read(1, kOtbnAppKeySideloadks0h, &key_share_0_h);
+  otbn_dmem_read(1, kOtbnAppKeySideloadks1l, &key_share_1_l);
+  otbn_dmem_read(1, kOtbnAppKeySideloadks1h, &key_share_1_h);
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  otbn_fi_keys_t uj_output;
+  uj_output.keys[0] = key_share_0_l;
+  uj_output.keys[1] = key_share_0_h;
+  uj_output.keys[2] = key_share_1_l;
+  uj_output.keys[3] = key_share_1_h;
+
+  uj_output.res = 0;
+  if ((key_share_0_l != key_share_0_l_ref) ||
+      (key_share_0_h != key_share_0_h_ref) ||
+      (key_share_1_l != key_share_1_l_ref) ||
+      (key_share_1_h != key_share_1_h_ref)) {
+    uj_output.res = 1;
+  }
+
+  // Send result & ERR_STATUS to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_keys_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_load_integrity(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (!load_integrity_init) {
+    // Load the OTBN app and read the load checksum without FI to retrieve
+    // reference value.
+    clear_otbn_load_checksum();
+    otbn_load_app(kOtbnAppLoadIntegrity);
+    read_otbn_load_checksum(&load_checksum_ref);
+    clear_otbn_load_checksum();
+
+    load_integrity_init = true;
+  }
+
+  // FI code target.
+  pentest_set_trigger_high();
+  otbn_load_app(kOtbnAppLoadIntegrity);
+  pentest_set_trigger_low();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read back checksum.
+  uint32_t load_checksum;
+  read_otbn_load_checksum(&load_checksum);
+  clear_otbn_load_checksum();
+
+  // Read loop counter from OTBN data memory.
+  uint32_t ref_val1, ref_val2, ref_val3;
+  otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal1, &ref_val1);
+  otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal2, &ref_val2);
+  otbn_dmem_read(1, kOtbnAppLoadIntegrityRefVal3, &ref_val3);
+
+  // Check if DMEM is corrupted.
+  bool dmem_corrupted = false;
+  if ((ref_val1 != 0x1BADB002) || (ref_val2 != 0x8BADF00D) ||
+      (ref_val3 != 0xA5A5A5A5)) {
+    dmem_corrupted = true;
+  }
+
+  // If DMEM is corrupted and the checksum is still correct, we achieved the
+  // attack goal.
+  uint32_t res = 0;
+  if ((load_checksum_ref == load_checksum) && dmem_corrupted) {
+    res = 1;
+  }
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send result & ERR_STATUS to host.
+  otbn_fi_result_t uj_output;
+  uj_output.result = res;
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_fi_pc(ujson_t *uj) {
+  // Get OTBN program counter from host.
+  otbn_fi_pc_t uj_data;
+  TRY(ujson_deserialize_otbn_fi_pc_t(uj, &uj_data));
+
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Initialize OTBN app, load it, and get interface to OTBN data memory.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_pc);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_pc, pc);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_pc, pc_out);
+  const otbn_app_t kOtbnAppPc = OTBN_APP_T_INIT(otbn_pc);
+  static const otbn_addr_t kOtbnPc = OTBN_ADDR_T_INIT(otbn_pc, pc);
+  static const otbn_addr_t kOtbnPcOut = OTBN_ADDR_T_INIT(otbn_pc, pc_out);
+  dif_otbn_status_t otbn_status;
+
+  // Load app.
+  otbn_load_app(kOtbnAppPc);
+
+  // FI code target.
+  pentest_set_trigger_high();
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnPc, &uj_data.pc, sizeof(uj_data.pc)));
+  otbn_execute();
+  // Wait until is started before deasserting the trigger.
+  bool is_running = false;
+  while (!is_running) {
+    TRY(dif_otbn_get_status(&otbn, &otbn_status));
+    if (otbn_status != kDifOtbnStatusIdle) {
+      is_running = true;
+    }
+  }
+  pentest_set_trigger_low();
+  otbn_busy_wait_for_done();
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read pc_out from OTBN data memory.
+  otbn_fi_pc_out_t uj_output;
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnPcOut, &uj_output.pc_otbn,
+                         sizeof(uj_output.pc_otbn)));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnPc, &uj_output.pc_dmem,
+                         sizeof(uj_output.pc_dmem)));
+
+  // Read OTBN instruction counter.
+  TRY(dif_otbn_get_insn_cnt(&otbn, &uj_output.insn_cnt));
+
+  // Read ERR_STATUS register from OTBN.
+  dif_otbn_err_bits_t err_otbn;
+  read_otbn_err_bits(&err_otbn);
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Clear OTBN memory.
+  TRY(clear_otbn());
+
+  // Send back to host.
+  uj_output.err_otbn = err_otbn;
+  uj_output.err_ibx = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otbn_fi_pc_out_t, uj, &uj_output);
+  return OK_STATUS();
 }
 
-/**
- * OTBN FI command handler.
- *
- * Command handler for the OTBN FI command.
- *
- * @param uj The received uJSON data.
- */
 status_t handle_otbn_fi(ujson_t *uj) {
   otbn_fi_subcommand_t cmd;
   TRY(ujson_deserialize_otbn_fi_subcommand_t(uj, &cmd));
   switch (cmd) {
-    case kOtbnFiSubcommandInitTrigger:
-      return handle_otbn_fi_init_trigger(uj);
-    case kOtbnFiSubcommandCharUnrolledRegOpLoop:
-      return handle_otbn_fi_char_unrolled_reg_op_loop(uj);
-    case kOtbnFiSubcommandCharUnrolledDmemOpLoop:
-      return handle_otbn_fi_char_unrolled_dmem_op_loop(uj);
-    case kOtbnFiSubcommandCharHardwareRegOpLoop:
-      return handle_otbn_fi_char_hardware_reg_op_loop(uj);
+    case kOtbnFiSubcommandCharBeq:
+      return handle_otbn_fi_char_beq(uj);
+    case kOtbnFiSubcommandCharBnRshi:
+      return handle_otbn_fi_char_bn_rshi(uj);
+    case kOtbnFiSubcommandCharBnSel:
+      return handle_otbn_fi_char_bn_sel(uj);
+    case kOtbnFiSubcommandCharBnWsrr:
+      return handle_otbn_fi_char_bn_wsrr(uj);
+    case kOtbnFiSubcommandCharBne:
+      return handle_otbn_fi_char_bne(uj);
+    case kOtbnFiSubcommandCharDmemAccess:
+      return handle_otbn_fi_char_dmem_access(uj);
+    case kOtbnFiSubcommandCharDmemWrite:
+      return handle_otbn_fi_char_dmem_write(uj);
     case kOtbnFiSubcommandCharHardwareDmemOpLoop:
       return handle_otbn_fi_char_hardware_dmem_op_loop(uj);
+    case kOtbnFiSubcommandCharHardwareRegOpLoop:
+      return handle_otbn_fi_char_hardware_reg_op_loop(uj);
+    case kOtbnFiSubcommandCharJal:
+      return handle_otbn_fi_char_jal(uj);
+    case kOtbnFiSubcommandCharLw:
+      return handle_otbn_fi_char_lw(uj);
+    case kOtbnFiSubcommandCharMem:
+      return handle_otbn_fi_char_mem(uj);
+    case kOtbnFiSubcommandCharRF:
+      return handle_otbn_fi_char_register_file(uj);
+    case kOtbnFiSubcommandCharUnrolledDmemOpLoop:
+      return handle_otbn_fi_char_unrolled_dmem_op_loop(uj);
+    case kOtbnFiSubcommandCharUnrolledRegOpLoop:
+      return handle_otbn_fi_char_unrolled_reg_op_loop(uj);
+    case kOtbnFiSubcommandInit:
+      return handle_otbn_fi_init(uj);
+    case kOtbnFiSubcommandInitKeyMgr:
+      return handle_otbn_fi_init_keymgr(uj);
+    case kOtbnFiSubcommandKeySideload:
+      return handle_otbn_fi_key_sideload(uj);
+    case kOtbnFiSubcommandLoadIntegrity:
+      return handle_otbn_fi_load_integrity(uj);
+    case kOtbnFiSubcommandPC:
+      return handle_otbn_fi_pc(uj);
     default:
       LOG_ERROR("Unrecognized OTBN FI subcommand: %d", cmd);
       return INVALID_ARGUMENT();
   }
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.h b/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.h
index fc16226c38ce4..3c013a70c5697 100644
--- a/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.h
+++ b/sw/device/tests/penetrationtests/firmware/fi/otbn_fi.h
@@ -6,17 +6,282 @@
 #define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_OTBN_FI_H_
 
 #include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/drivers/otbn.h"
-#include "sw/device/lib/dif/dif_otbn.h"
 #include "sw/device/lib/ujson/ujson.h"
 
-status_t read_otbn_err_bits(dif_otbn_err_bits_t *err_bits);
+/**
+ * otbn.fi.char.beq command handler.
+ *
+ * The goal of this test is to fault to BEQ instruction such that the jump is
+ * not performed. Then, a counter gets incremented. When no effective fault
+ * occurs, the counter is 0.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_beq(ujson_t *uj);
 
+/**
+ * otbn.fi.char.bn_rshi command handler.
+ *
+ * The goal of this test is to manipulate the BN.RSHI instruction.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_bn_rshi(ujson_t *uj);
+
+/**
+ * otbn.fi.char.bn_sel command handler.
+ *
+ * The goal of this test is to manipulate the carry flag or the BN.SEL
+ * instruction.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_bn_sel(ujson_t *uj);
+
+/**
+ * otbn.fi.char.bn_wsrr command handler.
+ *
+ * The goal of this test is to manipulate the BN.WSRR instruction or the content
+ * of the registers.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_bn_wsrr(ujson_t *uj);
+
+/**
+ * otbn.fi.char.bne command handler.
+ *
+ * The goal of this test is to fault to BNE instruction such that the jump is
+ * not performed. Then, a counter gets incremented. When no effective fault
+ * occurs, the counter is 0.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_bne(ujson_t *uj);
+
+/**
+ * otbn.fi.char_dmem_access command handler.
+ *
+ * OTBN loads WDRs with words from DMEM. These values are stored in different
+ * data sections.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj The received uJSON data.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_char_dmem_access(ujson_t *uj);
+
+/**
+ * otbn.fi.char_dmem_write command handler.
+ *
+ * Inject faults during Ibex writes data to DMEM.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_dmem_write(ujson_t *uj);
+
+/**
+ * otbn.fi.char.hardware.dmem.op.loop command handler.
+ *
+ * This FI penetration tests executes the following instructions on OTBN:
+ * - Initialize register x3=0
+ * - Perform 10000 x3 = x3 + 1 additions using hardware loop instructions.
+ *   Load loop counter from memory and write back after increment.
+ * - Return the value over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_otbn_fi_char_hardware_dmem_op_loop(ujson_t *uj);
+
+/**
+ * otbn.fi.char.hardware.reg.op.loop command handler.
+ *
+ * This FI penetration tests executes the following instructions on OTBN:
+ * - Initialize register x3=0
+ * - Perform 10000 x3 = x3 + 1 additions using hardware loop instructions
+ * - Return the value over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_otbn_fi_char_hardware_reg_op_loop(ujson_t *uj);
+
+/**
+ * otbn.fi.char.jal command handler.
+ *
+ * The goal of this test is to fault to JAL instruction such that the jump is
+ * not performed. Then, a counter gets incremented. When no effective fault
+ * occurs, the counter is 0.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj The received uJSON data.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_char_jal(ujson_t *uj);
+
+/**
+ * otbn.fi.char.lw command handler.
+ *
+ * The goal of this test is to manipulate LW instructions using FI.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_char_lw(ujson_t *uj);
+
+/**
+ * otbn.fi.char_mem command handler.
+ *
+ * Initializes IMEM and DMEM of OTBN with a fixed pattern. Inject a fault and
+ * check whether the data in memory got corrupted.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_char_mem(ujson_t *uj);
+
+/**
+ * otbn.fi.char_rf command handler.
+ *
+ * Init GPRs and WDRs of OTBN with reference values. Inject faults during 10000
+ * NOPS. Read back GPRs and WDRs and compare against reference values. Report
+ * faulty values back to host.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_char_register_file(ujson_t *uj);
+
+/**
+ * otbn.fi.char.unrolled.dmem.op.loop command handler.
+ *
+ * This FI penetration tests executes the following instructions on OTBN:
+ * - Perform 100 times:
+ *  - Load loop counter from memory
+ *  - Increment loop counter
+ *  - Store back to memory
+ * - Return the value over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_otbn_fi_char_unrolled_dmem_op_loop(ujson_t *uj);
+
+/**
+ * otbn.char.unrolled.reg.op.loop command handler.
+ *
+ * This FI penetration tests executes the following instructions on OTBN:
+ * - Initialize register x2=0
+ * - Perform 100 x2 = x2 + 1 additions
+ * - Return the value over UART.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ * It needs to be ensured that the compiler does not optimize this code.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_otbn_fi_char_unrolled_reg_op_loop(ujson_t *uj);
-status_t handle_otbn_init_trigger(ujson_t *uj);
+
+/**
+ * Initializes the OTBN FI test.
+ *
+ * Setup the trigger and alert handler. Disable dummy instructions and the
+ * iCache.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_init(ujson_t *uj);
+
+/**
+ * Initializes the key manager.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_init_keymgr(ujson_t *uj);
+
+/**
+ * otbn.fi.key_sideload command handler.
+ *
+ * Injects a fault when a key is sideloaded from the key manager into OTBN.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_key_sideload(ujson_t *uj);
+
+/**
+ * otbn.fi.load_integrity command handler.
+ *
+ * Tests, whether a fault during loading the OTBN app can manipulate data in
+ * DMEM without changing the CRC-32 checksum that is used to check the
+ * integrity of the DMEM and IMEM.
+ *
+ * As the OTBN app itself is not the target of this FI analysis, it only
+ * consists of NOPs. The DMEM is initialized with reference values that
+ * are checked.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_fi_load_integrity(ujson_t *uj);
+
+/**
+ * otbn.fi.pc command handler.
+ *
+ * The goal of this test is to fault the OTBN program counter that is passed
+ * from Ibex into OTBN. OTBN jumps to this PC. Manipulation can be detected by
+ * reading the instruction counter.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_otbn_fi_pc(ujson_t *uj);
+
+/**
+ * OTBN FI command handler.
+ *
+ * Command handler for the OTBN FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_otbn_fi(ujson_t *uj);
 
 #endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_OTBN_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otp_fi.c b/sw/device/tests/penetrationtests/firmware/fi/otp_fi.c
new file mode 100644
index 0000000000000..cff7d564c5f1a
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otp_fi.c
@@ -0,0 +1,411 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/otp_fi.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_otp_ctrl.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/otp_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/otp_fi_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otp_ctrl_regs.h"  // Generated.
+
+static dif_otp_ctrl_t otp;
+
+enum {
+  /**
+   * OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE in words.
+   */
+  kOtpFiOwnerSwCfgSize = OTP_CTRL_PARAM_OWNER_SW_CFG_SIZE / sizeof(uint32_t),
+  /**
+   * OTP_CTRL_PARAM_VENDOR_TEST_SIZE in words.
+   */
+  kOtpFiVendorTestSize = OTP_CTRL_PARAM_VENDOR_TEST_SIZE / sizeof(uint32_t),
+  /**
+   * OTP_CTRL_PARAM_HW_CFG0_SIZE in words.
+   */
+  kOtpFiHwCfg0Size = OTP_CTRL_PARAM_HW_CFG0_SIZE / sizeof(uint32_t),
+  /**
+   * OTP_CTRL_PARAM_LIFE_CYCLE_SIZE in words.
+   */
+  kOtpFiLifeCycleSize = OTP_CTRL_PARAM_LIFE_CYCLE_SIZE / sizeof(uint32_t),
+};
+
+uint32_t otp_read32_result_vendor_test_comp[kOtpFiVendorTestSize];
+uint32_t otp_read32_result_vendor_test_fi[kOtpFiVendorTestSize];
+uint32_t otp_read32_result_owner_sw_cfg_comp[kOtpFiOwnerSwCfgSize];
+uint32_t otp_read32_result_owner_sw_cfg_fi[kOtpFiOwnerSwCfgSize];
+uint32_t otp_read32_result_hw_cfg_comp[kOtpFiHwCfg0Size];
+uint32_t otp_read32_result_hw_cfg_fi[kOtpFiHwCfg0Size];
+uint32_t otp_read32_result_life_cycle_comp[kOtpFiLifeCycleSize];
+uint32_t otp_read32_result_life_cycle_fi[kOtpFiLifeCycleSize];
+
+void init_otp_mem_dump_buffers(void) {
+  for (uint32_t i = 0; i < kOtpFiVendorTestSize; i++) {
+    otp_read32_result_vendor_test_comp[i] = 0x00000001;
+    otp_read32_result_vendor_test_fi[i] = 0x00000001;
+  }
+  for (uint32_t i = 0; i < kOtpFiOwnerSwCfgSize; i++) {
+    otp_read32_result_owner_sw_cfg_comp[i] = 0x00000001;
+    otp_read32_result_owner_sw_cfg_fi[i] = 0x00000001;
+  }
+  for (uint32_t i = 0; i < kOtpFiHwCfg0Size; i++) {
+    otp_read32_result_hw_cfg_comp[i] = 0x00000001;
+    otp_read32_result_hw_cfg_fi[i] = 0x00000001;
+  }
+  for (uint32_t i = 0; i < kOtpFiLifeCycleSize; i++) {
+    otp_read32_result_life_cycle_comp[i] = 0x00000001;
+    otp_read32_result_life_cycle_fi[i] = 0x00000001;
+  }
+}
+
+status_t otp_vendor_test_dump(uint32_t *buffer) {
+  // Read VENDOR_TEST partition
+  TRY(otp_ctrl_testutils_dai_read32_array(&otp, kDifOtpCtrlPartitionVendorTest,
+                                          0, buffer, kOtpFiVendorTestSize));
+
+  return OK_STATUS();
+}
+
+status_t otp_owner_sw_cfg_dump(uint32_t *buffer) {
+  // Read OWNER_SW_CFG partition
+  TRY(otp_ctrl_testutils_dai_read32_array(&otp, kDifOtpCtrlPartitionOwnerSwCfg,
+                                          0, buffer, kOtpFiOwnerSwCfgSize));
+
+  return OK_STATUS();
+}
+
+status_t otp_hw_cfg_dump(uint32_t *buffer) {
+  // Read HW_CFG partition
+  TRY(otp_ctrl_testutils_dai_read32_array(&otp, kDifOtpCtrlPartitionHwCfg0, 0,
+                                          buffer, kOtpFiHwCfg0Size));
+
+  return OK_STATUS();
+}
+
+status_t otp_life_cycle_dump(uint32_t *buffer) {
+  // Read LIFE_CYCLE partition
+  TRY(otp_ctrl_testutils_dai_read32_array(&otp, kDifOtpCtrlPartitionLifeCycle,
+                                          0, buffer, kOtpFiLifeCycleSize));
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi_hw_cfg(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read OTP partition for comparison values
+  TRY(otp_hw_cfg_dump(otp_read32_result_hw_cfg_comp));
+
+  // FI code target.
+  pentest_set_trigger_high();
+
+  // Point for FI
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+
+  pentest_set_trigger_low();
+
+  // Read OTP partition again to see if values changed
+  TRY(otp_hw_cfg_dump(otp_read32_result_hw_cfg_fi));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Get OTP CTRL status
+  dif_otp_ctrl_status_t status;
+  TRY(dif_otp_ctrl_get_status(&otp, &status));
+
+  // Send result & status codes to host.
+  otp_fi_hwcfg_partition_t uj_output;
+  memset(uj_output.partition_ref, 0, sizeof(uj_output.partition_ref));
+  memset(uj_output.partition_fi, 0, sizeof(uj_output.partition_fi));
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  for (uint32_t i = 0; i < kOtpFiHwCfg0Size; i++) {
+    uj_output.partition_ref[i] = otp_read32_result_hw_cfg_comp[i];
+    uj_output.partition_fi[i] = otp_read32_result_hw_cfg_fi[i];
+    if (uj_output.partition_ref[i] != uj_output.partition_fi[i]) {
+      uj_output.data_faulty[i] = true;
+    }
+  }
+  uj_output.otp_status_codes = status.codes;
+  memcpy(uj_output.otp_error_causes, (uint8_t *)status.causes,
+         kDifOtpCtrlStatusCodeHasCauseLast + 1);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otp_fi_hwcfg_partition_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  TRY(dif_otp_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_OTP_CTRL_CORE_BASE_ADDR), &otp));
+
+  init_otp_mem_dump_buffers();
+
+  // Sanity check lengths of uJSON buffers.
+  TRY_CHECK(kOtpFiOwnerSwCfgSize <= OTPFI_MAX_OWNER_SW_CFG_SIZE);
+  TRY_CHECK(kOtpFiVendorTestSize <= OTPFI_MAX_VENDOR_TEST_SIZE);
+  TRY_CHECK(kOtpFiHwCfg0Size <= OTPFI_MAX_HW_CFG0_SIZE);
+  TRY_CHECK(kOtpFiLifeCycleSize <= OTPFI_MAX_LC_SIZE);
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi_life_cycle(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read OTP partition for comparison values
+  TRY(otp_life_cycle_dump(otp_read32_result_life_cycle_comp));
+
+  // FI code target.
+  pentest_set_trigger_high();
+
+  // Point for FI
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+
+  pentest_set_trigger_low();
+
+  // Read OTP partition again to see if values changed
+  TRY(otp_life_cycle_dump(otp_read32_result_life_cycle_fi));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Get OTP CTRL status
+  dif_otp_ctrl_status_t status;
+  TRY(dif_otp_ctrl_get_status(&otp, &status));
+
+  // Send result & status codes to host.
+  otp_fi_lifecycle_partition_t uj_output;
+  memset(uj_output.partition_ref, 0, sizeof(uj_output.partition_ref));
+  memset(uj_output.partition_fi, 0, sizeof(uj_output.partition_fi));
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  for (uint32_t i = 0; i < kOtpFiLifeCycleSize; i++) {
+    uj_output.partition_ref[i] = otp_read32_result_life_cycle_comp[i];
+    uj_output.partition_fi[i] = otp_read32_result_life_cycle_fi[i];
+    if (uj_output.partition_ref[i] != uj_output.partition_fi[i]) {
+      uj_output.data_faulty[i] = true;
+    }
+  }
+  uj_output.otp_status_codes = status.codes;
+  memcpy(uj_output.otp_error_causes, (uint8_t *)status.causes,
+         kDifOtpCtrlStatusCodeHasCauseLast + 1);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otp_fi_lifecycle_partition_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi_owner_sw_cfg(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read OTP partition for comparison values
+  TRY(otp_owner_sw_cfg_dump(otp_read32_result_owner_sw_cfg_comp));
+
+  // FI code target.
+  pentest_set_trigger_high();
+
+  // Point for FI
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+
+  pentest_set_trigger_low();
+
+  // Read OTP partition again to see if values changed
+  TRY(otp_owner_sw_cfg_dump(otp_read32_result_owner_sw_cfg_fi));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Get OTP CTRL status
+  dif_otp_ctrl_status_t status;
+  TRY(dif_otp_ctrl_get_status(&otp, &status));
+
+  // Send result & status codes to host.
+  otp_fi_ownerswcfg_partition_t uj_output;
+  memset(uj_output.partition_ref, 0, sizeof(uj_output.partition_ref));
+  memset(uj_output.partition_fi, 0, sizeof(uj_output.partition_fi));
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  for (uint32_t i = 0; i < kOtpFiOwnerSwCfgSize; i++) {
+    uj_output.partition_ref[i] = otp_read32_result_owner_sw_cfg_comp[i];
+    uj_output.partition_fi[i] = otp_read32_result_owner_sw_cfg_fi[i];
+    if (uj_output.partition_ref[i] != uj_output.partition_fi[i]) {
+      uj_output.data_faulty[i] = true;
+    }
+  }
+  uj_output.otp_status_codes = status.codes;
+  memcpy(uj_output.otp_error_causes, (uint8_t *)status.causes,
+         kDifOtpCtrlStatusCodeHasCauseLast + 1);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otp_fi_ownerswcfg_partition_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi_vendor_test(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  // Read OTP partition for comparison values
+  TRY(otp_vendor_test_dump(otp_read32_result_vendor_test_comp));
+
+  // FI code target.
+  pentest_set_trigger_high();
+
+  // Point for FI
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+  asm volatile(NOP1000);
+
+  pentest_set_trigger_low();
+
+  // Read OTP partition again to see if values changed
+  TRY(otp_vendor_test_dump(otp_read32_result_vendor_test_fi));
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Get OTP CTRL status
+  dif_otp_ctrl_status_t status;
+  TRY(dif_otp_ctrl_get_status(&otp, &status));
+
+  // Send result & status codes to host.
+  otp_fi_vendortest_partition_t uj_output;
+  memset(uj_output.partition_ref, 0, sizeof(uj_output.partition_ref));
+  memset(uj_output.partition_fi, 0, sizeof(uj_output.partition_fi));
+  memset(uj_output.data_faulty, false, sizeof(uj_output.data_faulty));
+  for (uint32_t i = 0; i < kOtpFiVendorTestSize; i++) {
+    uj_output.partition_ref[i] = otp_read32_result_vendor_test_comp[i];
+    uj_output.partition_fi[i] = otp_read32_result_vendor_test_fi[i];
+    if (uj_output.partition_ref[i] != uj_output.partition_fi[i]) {
+      uj_output.data_faulty[i] = true;
+    }
+  }
+  uj_output.otp_status_codes = status.codes;
+  memcpy(uj_output.otp_error_causes, (uint8_t *)status.causes,
+         kDifOtpCtrlStatusCodeHasCauseLast + 1);
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_otp_fi_vendortest_partition_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otp_fi(ujson_t *uj) {
+  otp_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_otp_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kOtpFiSubcommandInit:
+      return handle_otp_fi_init(uj);
+    case kOtpFiSubcommandVendorTest:
+      return handle_otp_fi_vendor_test(uj);
+    case kOtpFiSubcommandOwnerSwCfg:
+      return handle_otp_fi_owner_sw_cfg(uj);
+    case kOtpFiSubcommandHwCfg:
+      return handle_otp_fi_hw_cfg(uj);
+    case kOtpFiSubcommandLifeCycle:
+      return handle_otp_fi_life_cycle(uj);
+    default:
+      LOG_ERROR("Unrecognized OTP FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/otp_fi.h b/sw/device/tests/penetrationtests/firmware/fi/otp_fi.h
new file mode 100644
index 0000000000000..6c84965b380ce
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/otp_fi.h
@@ -0,0 +1,69 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_OTP_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_OTP_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * Otp HW Cfg FI test.
+ *
+ * Tests whether a fault into the HW CFG partition is possible.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi_hw_cfg(ujson_t *uj);
+
+/**
+ * Initializes the trigger and configures the device for the Otp FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi_init(ujson_t *uj);
+
+/**
+ * Otp LC FI test.
+ *
+ * Tests whether a fault into the LifeCycle partition is possible.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi_life_cycle(ujson_t *uj);
+
+/**
+ * Otp SW Cfg FI test.
+ *
+ * Tests whether a fault into the SW CFG partition is possible.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi_owner_sw_cfg(ujson_t *uj);
+
+/**
+ * Otp Vendor FI test.
+ *
+ * Tests whether a fault into the vendor partition is possible.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi_vendor_test(ujson_t *uj);
+
+/**
+ * Otp FI command handler.
+ *
+ * Command handler for the Otp FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otp_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_OTP_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/rng_fi.c b/sw/device/tests/penetrationtests/firmware/fi/rng_fi.c
new file mode 100644
index 0000000000000..5f75d01cc13ca
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/rng_fi.c
@@ -0,0 +1,722 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_csrng_shared.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/csrng_testutils.h"
+#include "sw/device/lib/testing/edn_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/rng_fi_commands.h"
+
+#include "edn_regs.h"  // Generated
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+enum {
+  kEdnKatTimeout = (10 * 1000 * 1000),
+  kCsrngExpectedOutputLen = 16,
+  kEdnBusAckMaxData = 64,
+  kEdnBiasMaxData = 16,
+  kEdnKatMaxClen = 12,
+  kEdnKatOutputLen = 16,
+  kEdnKatWordsPerBlock = 4,
+  kEntropyFifoBufferSize = 32,
+  kCsrngBiasFWFifoBufferSize = 12,
+  kMaxReadCountNotBlocking = 32,
+  kTestParamEntropySrcMaxAttempts = 256,
+};
+
+static dif_rv_core_ibex_t rv_core_ibex;
+static dif_entropy_src_t entropy_src;
+static dif_csrng_t csrng;
+static dif_edn_t edn0;
+static dif_edn_t edn1;
+static bool disable_health_check;
+
+static bool firmware_override_init;
+
+static const uint32_t kInputMsg[kCsrngBiasFWFifoBufferSize] = {
+    0xa52a0da9, 0xcae141b2, 0x6d5bab9d, 0x2c3e5cc0, 0x225afc93, 0x5d31a610,
+    0x91b7f960, 0x0d566bb3, 0xef35e170, 0x94ba7d8e, 0x534eb741, 0x6b60b0da,
+};
+
+// Seed material for the EDN KAT instantiate command.
+static const dif_edn_seed_material_t kEdnKatSeedMaterialInstantiate = {
+    .len = kEdnKatMaxClen,
+    .data = {0x73bec010, 0x9262474c, 0x16a30f76, 0x531b51de, 0x2ee494e5,
+             0xdfec9db3, 0xcb7a879d, 0x5600419c, 0xca79b0b0, 0xdda33b5c,
+             0xa468649e, 0xdf5d73fa},
+};
+// Seed material for the EDN KAT reseed command.
+static const dif_edn_seed_material_t kEdnKatSeedMaterialReseed = {
+    .len = kEdnKatMaxClen,
+    .data = {0x73bec010, 0x9262474c, 0x16a30f76, 0x531b51de, 0x2ee494e5,
+             0xdfec9db3, 0xcb7a879d, 0x5600419c, 0xca79b0b0, 0xdda33b5c,
+             0xa468649e, 0xdf5d73fa},
+};
+// Seed material for the EDN KAT generate command.
+static const dif_edn_seed_material_t kEdnKatSeedMaterialGenerate = {
+    .len = 0,
+};
+
+static dif_edn_auto_params_t kat_auto_params_build(void) {
+  return (dif_edn_auto_params_t){
+      .instantiate_cmd =
+          {
+              .cmd = csrng_cmd_header_build(kCsrngAppCmdInstantiate,
+                                            kDifCsrngEntropySrcToggleDisable,
+                                            kEdnKatSeedMaterialInstantiate.len,
+                                            /*generate_len=*/0),
+              .seed_material = kEdnKatSeedMaterialInstantiate,
+          },
+      .reseed_cmd =
+          {
+              .cmd = csrng_cmd_header_build(kCsrngAppCmdReseed,
+                                            kDifCsrngEntropySrcToggleDisable,
+                                            kEdnKatSeedMaterialReseed.len,
+                                            /*generate_len=*/0),
+              .seed_material = kEdnKatSeedMaterialReseed,
+          },
+      .generate_cmd =
+          {
+              .cmd = csrng_cmd_header_build(
+                  kCsrngAppCmdGenerate, kDifCsrngEntropySrcToggleDisable,
+                  kEdnKatSeedMaterialGenerate.len,
+                  /*generate_len=*/
+                  kEdnKatOutputLen / kEdnKatWordsPerBlock),
+              .seed_material = kEdnKatSeedMaterialGenerate,
+          },
+      .reseed_interval = 32,
+  };
+}
+
+/**
+ * Flushes the data entropy buffer until there is no data available to read.
+ *
+ * Asserts test error if any of the returned words is equal to zero. Logs the
+ * number of entropy words flushed in a single call.
+ *
+ * @param entropy An entropy source instance.
+ */
+static void entropy_data_flush(dif_entropy_src_t *entropy_src) {
+  uint32_t entropy_bits;
+  uint32_t read_count = 0;
+
+  // TODO: Remove this limit. Entropy source should block if there is no entropy
+  // available in FW override mode.
+  const uint32_t kMaxReadCount = 128;
+
+  while (dif_entropy_src_is_entropy_available(entropy_src) == kDifOk) {
+    CHECK_DIF_OK(dif_entropy_src_non_blocking_read(entropy_src, &entropy_bits));
+    CHECK(entropy_bits != 0);
+    read_count++;
+    if (read_count >= kMaxReadCount) {
+      break;
+    }
+  }
+}
+
+/**
+ * Stops the entropy_src conditioner.
+ *
+ * @param entropy_src A entropy source handle.
+ */
+static void entropy_conditioner_stop(const dif_entropy_src_t *entropy_src) {
+  uint32_t fail_count = 0;
+  dif_result_t op_result;
+  do {
+    op_result = dif_entropy_src_conditioner_stop(entropy_src);
+    if (op_result == kDifIpFifoFull) {
+      CHECK(fail_count++ < kTestParamEntropySrcMaxAttempts);
+    } else {
+      CHECK_DIF_OK(op_result);
+    }
+  } while (op_result == kDifIpFifoFull);
+}
+
+status_t handle_rng_fi_entropy_src_bias(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  TRY(dif_entropy_src_set_enabled(&entropy_src, kDifToggleDisabled));
+
+  // Setup fips grade entropy that can be read by firmware.
+  const dif_entropy_src_config_t config = {
+      .fips_enable = true,
+      .route_to_firmware = true,
+      .single_bit_mode = kDifEntropySrcSingleBitModeDisabled,
+      .health_test_threshold_scope = false, /*default*/
+      .health_test_window_size = 0x0200,    /*default*/
+      .alert_threshold = 2,                 /*default*/
+  };
+
+  // Re-enable entropy src.
+  TRY(dif_entropy_src_configure(&entropy_src, config, kDifToggleEnabled));
+  // ensure health tests are actually running
+  TRY(entropy_testutils_wait_for_state(
+      &entropy_src, kDifEntropySrcMainFsmStateContHTRunning));
+
+  entropy_data_flush(&entropy_src);
+
+  uint32_t entropy_bits[kMaxReadCountNotBlocking] = {0};
+
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  for (size_t it = 0; it < kMaxReadCountNotBlocking; it++) {
+    while (dif_entropy_src_non_blocking_read(&entropy_src, &entropy_bits[it]) !=
+           kDifOk)
+      ;
+  }
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Send result & ERR_STATUS to host.
+  rng_fi_entropy_src_bias_t uj_output;
+  // Send result & ERR_STATUS to host.
+  memcpy(uj_output.rand, entropy_bits, sizeof(entropy_bits));
+  uj_output.err_status = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_rng_fi_entropy_src_bias_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_firmware_override(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  if (!firmware_override_init) {
+    // Check if we keep heal tests enabled.
+    rng_fi_fw_overwrite_health_t uj_data;
+    TRY(ujson_deserialize_rng_fi_fw_overwrite_health_t(uj, &uj_data));
+    disable_health_check = uj_data.disable_health_check;
+
+    firmware_override_init = true;
+  }
+
+  TRY(entropy_testutils_stop_all());
+
+  if (disable_health_check) {
+    // Disable all health tests.
+    TRY(entropy_testutils_disable_health_tests(&entropy_src));
+  }
+
+  TRY(entropy_testutils_fw_override_enable(&entropy_src, kEntropyFifoBufferSize,
+                                           /*route_to_firmware=*/true,
+                                           /*bypass_conditioner=*/true));
+
+  entropy_data_flush(&entropy_src);
+
+  uint32_t buf[kEntropyFifoBufferSize] = {0};
+
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  for (size_t it = 0; it < kEntropyFifoBufferSize; it++) {
+    while (buf[it] == 0) {
+      TRY(dif_entropy_src_observe_fifo_blocking_read(&entropy_src, &buf[it],
+                                                     kEntropyFifoBufferSize));
+    }
+  }
+
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Send result & ERR_STATUS to host.
+  rng_fi_fw_overwrite_t uj_output;
+  // Send result & ERR_STATUS to host.
+  memcpy(uj_output.rand, buf, sizeof(buf));
+  uj_output.err_status = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_rng_fi_fw_overwrite_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_edn_bias(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  dif_edn_auto_params_t edn_params =
+      edn_testutils_auto_params_build(true, /*res_itval=*/0, /*glen_val=*/0);
+  // Disable the entropy complex.
+  TRY(entropy_testutils_stop_all());
+  // Enable ENTROPY_SRC in FIPS mode.
+  TRY(dif_entropy_src_configure(
+      &entropy_src, entropy_testutils_config_default(), kDifToggleEnabled));
+  // Enable CSRNG.
+  TRY(dif_csrng_configure(&csrng));
+  // Enable EDN1 in auto request mode.
+  TRY(dif_edn_set_auto_mode(&edn1, edn_params));
+  // Enable EDN0 in auto request mode.
+  TRY(dif_edn_set_auto_mode(&edn0, kat_auto_params_build()));
+
+  rng_fi_edn_t uj_output;
+  memset(uj_output.rand, 0, sizeof(uj_output.rand));
+
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  for (size_t it = 0; it < kEdnBiasMaxData; it++) {
+    CHECK_STATUS_OK(rv_core_ibex_testutils_get_rnd_data(
+        &rv_core_ibex, kEdnKatTimeout, &uj_output.rand[it]));
+  }
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Send result & ERR_STATUS to host.
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  uj_output.err_status = err_ibx;
+  RESP_OK(ujson_serialize_rng_fi_edn_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_edn_resp_ack(ujson_t *uj) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+  // Enable entropy complex, CSRNG and EDN so Ibex can get entropy.
+  // Configure entropy in auto_mode to avoid starving the system from entropy,
+  // given that boot mode entropy has a limited number of generated bits.
+  TRY(entropy_testutils_auto_mode_init());
+
+  uint32_t ibex_rnd_data[kEdnBusAckMaxData];
+
+  // Inject faults during generating and receiving random data.
+  // Goal is to manipulate ACK on bus to trigger that the same
+  // data chunk is transmitted multiple times.
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  for (size_t it = 0; it < kEdnBusAckMaxData; it++) {
+    TRY(rv_core_ibex_testutils_get_rnd_data(&rv_core_ibex, kEdnKatTimeout,
+                                            &ibex_rnd_data[it]));
+  }
+  pentest_set_trigger_low();
+
+  // Check if there are any collisions.
+  rng_fi_edn_collisions_t uj_output;
+  memset(uj_output.rand, 0, sizeof(uj_output.rand));
+  size_t collisions = 0;
+  for (size_t outer = 0; outer < kEdnBusAckMaxData; outer++) {
+    for (size_t inner = 0; inner < kEdnBusAckMaxData; inner++) {
+      if (outer != inner && ibex_rnd_data[outer] == ibex_rnd_data[inner]) {
+        if (collisions < 16) {
+          uj_output.rand[collisions] = ibex_rnd_data[outer];
+        }
+        collisions++;
+      }
+    }
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Send result & ERR_STATUS to host.
+  uj_output.collisions = collisions;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  uj_output.err_status = err_ibx;
+  RESP_OK(ujson_serialize_rng_fi_edn_collisions_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_edn_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEntropy |
+                   kPentestPeripheralCsrng | kPentestPeripheralEdn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Initialize peripherals used in this FI test.
+  TRY(dif_entropy_src_init(
+      mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy_src));
+  TRY(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                     &csrng));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+  TRY(dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  firmware_override_init = false;
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_csrng_bias(ujson_t *uj) {
+  // Get the test mode.
+  crypto_fi_csrng_mode_t uj_data;
+  TRY(ujson_deserialize_crypto_fi_csrng_mode_t(uj, &uj_data));
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  TRY(csrng_testutils_cmd_ready_wait(&csrng));
+  TRY(dif_csrng_uninstantiate(&csrng));
+
+  const dif_csrng_seed_material_t kEntropyInput = {
+      .seed_material = {0x73bec010, 0x9262474c, 0x16a30f76, 0x531b51de,
+                        0x2ee494e5, 0xdfec9db3, 0xcb7a879d, 0x5600419c,
+                        0xca79b0b0, 0xdda33b5c, 0xa468649e, 0xdf5d73fa},
+      .seed_material_len = 12,
+  };
+
+  CHECK_DIF_OK(dif_csrng_instantiate(&csrng, kDifCsrngEntropySrcToggleDisable,
+                                     &kEntropyInput));
+
+  // FI code target.
+  uint32_t rand_data_got[kCsrngExpectedOutputLen];
+  TRY(csrng_testutils_cmd_ready_wait(&csrng));
+
+  if (uj_data.all_trigger || uj_data.start_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_csrng_generate_start(&csrng, kCsrngExpectedOutputLen));
+  if (uj_data.start_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_data.valid_trigger) {
+    pentest_set_trigger_high();
+  }
+  dif_csrng_output_status_t output_status;
+  do {
+    TRY(dif_csrng_get_output_status(&csrng, &output_status));
+  } while (!output_status.valid_data);
+  if (uj_data.valid_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_data.read_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_csrng_generate_read(&csrng, rand_data_got, kCsrngExpectedOutputLen));
+  if (uj_data.all_trigger || uj_data.read_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  // Compare with expected data.
+  const uint32_t kExpectedOutput[kCsrngExpectedOutputLen] = {
+      932170270,  3480632584, 387346064,  186012424,  899661374,  2795183089,
+      336687633,  3222931513, 1490543709, 3319795384, 3464147855, 1850271046,
+      1239323641, 2292604615, 3314177342, 1567494162,
+  };
+  rng_fi_csrng_output_t uj_output;
+  uj_output.res = 0;
+  for (size_t it = 0; it < kCsrngExpectedOutputLen; it++) {
+    if (rand_data_got[it] != kExpectedOutput[it]) {
+      uj_output.res = 1;
+    }
+  }
+
+  // Send result & ERR_STATUS to host.
+  memcpy(uj_output.rand, rand_data_got, sizeof(rand_data_got));
+  uj_output.err_status = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_rng_fi_csrng_output_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_csrng_bias_fw_override(ujson_t *uj, bool static_seed) {
+  // Clear registered alerts in alert handler.
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+  // Clear the AST recoverable alerts.
+  pentest_clear_sensor_recov_alerts();
+
+  uint32_t received_data[kCsrngBiasFWFifoBufferSize];
+  const dif_csrng_seed_material_t kEmptySeedMaterial = {0};
+
+  uint32_t seed[kCsrngBiasFWFifoBufferSize];
+
+  if (static_seed) {
+    memcpy(seed, kInputMsg, sizeof(kInputMsg));
+  } else {
+    rng_fi_seed_t uj_data;
+    TRY(ujson_deserialize_rng_fi_seed_t(uj, &uj_data));
+    memcpy(seed, uj_data.seed, sizeof(uj_data.seed));
+  }
+
+  CHECK_STATUS_OK(entropy_testutils_stop_all());
+  CHECK_STATUS_OK(entropy_testutils_fw_override_enable(
+      &entropy_src, kCsrngBiasFWFifoBufferSize,
+      /*route_to_firmware=*/false,
+      /*bypass_conditioner=*/false));
+
+  entropy_data_flush(&entropy_src);
+
+  CHECK_DIF_OK(dif_csrng_configure(&csrng));
+
+  CHECK_DIF_OK(dif_entropy_src_conditioner_start(&entropy_src));
+
+  uint32_t fail_count = 0;
+  uint32_t total = 0;
+  do {
+    uint32_t count;
+    dif_result_t op_result = dif_entropy_src_fw_ov_data_write(
+        &entropy_src, seed + total, ARRAYSIZE(seed) - total, &count);
+    total += count;
+    if (op_result == kDifIpFifoFull) {
+      CHECK(fail_count++ < kTestParamEntropySrcMaxAttempts);
+    } else {
+      fail_count = 0;
+      CHECK_DIF_OK(op_result);
+    }
+  } while (total < ARRAYSIZE(seed));
+
+  pentest_set_trigger_high();
+  entropy_conditioner_stop(&entropy_src);
+
+  TRY(csrng_testutils_cmd_ready_wait(&csrng));
+  CHECK_DIF_OK(dif_csrng_instantiate(&csrng, kDifCsrngEntropySrcToggleEnable,
+                                     &kEmptySeedMaterial));
+
+  CHECK_STATUS_OK(csrng_testutils_cmd_generate_run(&csrng, received_data,
+                                                   ARRAYSIZE(received_data)));
+
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register from Ibex.
+  dif_rv_core_ibex_error_status_t err_ibx;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &err_ibx));
+
+  rng_fi_csrng_ov_output_t uj_output;
+
+  // Send result & ERR_STATUS to host.
+  uj_output.res = 0;  // No result is returned.
+  memcpy(uj_output.rand, received_data, sizeof(received_data));
+  uj_output.err_status = err_ibx;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_rng_fi_csrng_ov_output_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi_csrng_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralCsrng,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Initialize CSRNG.
+  mmio_region_t base_addr = mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR);
+  CHECK_DIF_OK(dif_csrng_init(base_addr, &csrng));
+  CHECK_DIF_OK(dif_csrng_configure(&csrng));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_rng_fi(ujson_t *uj) {
+  rng_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_rng_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kRngFiSubcommandCsrngInit:
+      return handle_rng_fi_csrng_init(uj);
+    case kRngFiSubcommandCsrngBias:
+      return handle_rng_fi_csrng_bias(uj);
+    case kRngFiSubcommandCsrngBiasFWOverride:
+      return handle_rng_fi_csrng_bias_fw_override(uj, false);
+    case kRngFiSubcommandCsrngBiasFWOverrideStatic:
+      return handle_rng_fi_csrng_bias_fw_override(uj, true);
+    case kRngFiSubcommandEdnInit:
+      return handle_rng_fi_edn_init(uj);
+    case kRngFiSubcommandEdnRespAck:
+      return handle_rng_fi_edn_resp_ack(uj);
+    case kRngFiSubcommandEdnBias:
+      return handle_rng_fi_edn_bias(uj);
+    case kRngFiSubcommandFWOverride:
+      return handle_rng_fi_firmware_override(uj);
+    case kRngFiSubcommandEntropySrcBias:
+      return handle_rng_fi_entropy_src_bias(uj);
+    default:
+      LOG_ERROR("Unrecognized RNG FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/rng_fi.h b/sw/device/tests/penetrationtests/firmware/fi/rng_fi.h
new file mode 100644
index 0000000000000..66d936123cd56
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/rng_fi.h
@@ -0,0 +1,115 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_RNG_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_RNG_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * rng_fi_entropy_src_bias command handler.
+ *
+ * Configures the entropy source module to return data on the ENTROPY_DATA
+ * register. The goal is to inject a fault such that a BIAS is visible.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_entropy_src_bias(ujson_t *uj);
+
+/**
+ * rng_fi_firmware_override command handler.
+ *
+ * Configures the entropy source module with the firmware override mode allowing
+ * the test to directly access the generated entropy bits.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_firmware_override(ujson_t *uj);
+
+/**
+ * rng_fi_edn_bias command handler.
+ *
+ * Induce a bias into the random data generated by the EDN.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_edn_bias(ujson_t *uj);
+
+/**
+ * rng_fi_edn_resp_ack command handler.
+ *
+ * Generate random data. Try to inject fault during bus ack to receive the same
+ * random data multiple times.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_edn_resp_ack(ujson_t *uj);
+
+/**
+ * Initializes the trigger and configures the device for the EDN FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_edn_init(ujson_t *uj);
+
+/**
+ * csrng_bias command handler.
+ *
+ * Generate known data using the CSRNG.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_csrng_bias(ujson_t *uj);
+
+/**
+ * rng_fi_entropy_src_bias_fw_override command handler.
+ *
+ * Write a fixed seed into the FW_OV_WR_DATA register in the FW override mode.
+ * This seed goes through the conditioner into the CSRNG. The software interface
+ * of the CSRNG is used to extract the random data.
+ *
+ * Faults are injected during the trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @param static_seed Use static seed or seed provided by user.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_csrng_bias_fw_override(ujson_t *uj, bool static_seed);
+
+/**
+ * Initializes the trigger and configures the device for the CSRNG FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi_csrng_init(ujson_t *uj);
+
+/**
+ * Rng FI command handler.
+ *
+ * Command handler for the Rng FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rng_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_RNG_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/fi/rom_fi.c b/sw/device/tests/penetrationtests/firmware/fi/rom_fi.c
new file mode 100644
index 0000000000000..593d12c2be740
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/rom_fi.c
@@ -0,0 +1,154 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/fi/rom_fi.h"
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_rom_ctrl.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/rom_fi_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rom_ctrl_regs.h"
+
+// Interface to Ibex.
+static dif_rv_core_ibex_t rv_core_ibex;
+
+static dif_rom_ctrl_t rom_ctrl;
+
+status_t handle_rom_read(ujson_t *uj) {
+  pentest_registered_alerts_t reg_alerts = pentest_get_triggered_alerts();
+
+  dif_rom_ctrl_digest_t expected_digest;
+  dif_rom_ctrl_digest_t fi_digest[8];
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &expected_digest));
+
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[0]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[1]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[2]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[3]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[4]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[5]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[6]));
+  TRY(dif_rom_ctrl_get_digest(&rom_ctrl, &fi_digest[7]));
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+
+  // Get registered alerts from alert handler.
+  reg_alerts = pentest_get_triggered_alerts();
+  // Get fatal and recoverable AST alerts from sensor controller.
+  pentest_sensor_alerts_t sensor_alerts = pentest_get_sensor_alerts();
+
+  // Read ERR_STATUS register.
+  dif_rv_core_ibex_error_status_t codes;
+  TRY(dif_rv_core_ibex_get_error_status(&rv_core_ibex, &codes));
+
+  rom_fi_digest_t uj_output;
+  memset(uj_output.digest, 0, sizeof(uj_output.digest));
+  for (size_t i = 0; i < 8; i++) {
+    if (memcmp(&expected_digest, &fi_digest[i],
+               ROM_CTRL_DIGEST_MULTIREG_COUNT)) {
+      uj_output.digest[i] =
+          fi_digest[i]
+              .digest[0];  // Just return the first 32-bit of the digest.
+    }
+  }
+
+  // Send the first 8 bytes of the digest and the alerts back to the host.
+  uj_output.err_status = codes;
+  memcpy(uj_output.alerts, reg_alerts.alerts, sizeof(reg_alerts.alerts));
+  memcpy(uj_output.ast_alerts, sensor_alerts.alerts,
+         sizeof(sensor_alerts.alerts));
+  RESP_OK(ujson_serialize_rom_fi_digest_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_rom_fi_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+  penetrationtest_alert_config_t uj_alert_data;
+  TRY(ujson_deserialize_penetrationtest_alert_config_t(uj, &uj_alert_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralKmac,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the alert handler. Alerts triggered by IP blocks are captured
+  // and reported to the test.
+  pentest_configure_alert_handler(
+      uj_alert_data.alert_classes, uj_alert_data.enable_alerts,
+      uj_alert_data.enable_classes, uj_alert_data.accumulation_thresholds,
+      uj_alert_data.signals, uj_alert_data.duration_cycles,
+      uj_alert_data.ping_timeout);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Initialize rom_ctrl.
+  mmio_region_t rom_ctrl_reg =
+      mmio_region_from_addr(TOP_EARLGREY_ROM_CTRL_REGS_BASE_ADDR);
+  TRY(dif_rom_ctrl_init(rom_ctrl_reg, &rom_ctrl));
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read the sensor config.
+  TRY(pentest_send_sensor_config(uj));
+
+  // Read the alert config.
+  TRY(pentest_send_alert_config(uj));
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_rom_fi(ujson_t *uj) {
+  rom_fi_subcommand_t cmd;
+  TRY(ujson_deserialize_rom_fi_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kRomFiSubcommandInit:
+      return handle_rom_fi_init(uj);
+    case kRomFiSubcommandRead:
+      return handle_rom_read(uj);
+    default:
+      LOG_ERROR("Unrecognized Rom FI subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/fi/rom_fi.h b/sw/device/tests/penetrationtests/firmware/fi/rom_fi.h
new file mode 100644
index 0000000000000..796382a1d9973
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/fi/rom_fi.h
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ROM_FI_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ROM_FI_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * ROM read FI test.
+ *
+ * Read the ROM digest while injecting faults.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rom_read(ujson_t *uj);
+
+/**
+ * Initializes the trigger and configures the device for the Rom FI test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rom_fi_init(ujson_t *uj);
+
+/**
+ * Rom FI command handler.
+ *
+ * Command handler for the Rom FI command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_rom_fi(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_FI_ROM_FI_H_
diff --git a/sw/device/tests/penetrationtests/firmware/firmware.c b/sw/device/tests/penetrationtests/firmware/firmware.c
deleted file mode 100644
index 16664d38a1611..0000000000000
--- a/sw/device/tests/penetrationtests/firmware/firmware.c
+++ /dev/null
@@ -1,83 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-#include <stdbool.h>
-
-#include "sw/device/lib/base/status.h"
-#include "sw/device/lib/crypto/drivers/entropy.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
-#include "sw/device/lib/ujson/ujson.h"
-
-// Include commands
-#include "sw/device/tests/penetrationtests/json/aes_sca_commands.h"
-#include "sw/device/tests/penetrationtests/json/commands.h"
-#include "sw/device/tests/penetrationtests/json/extclk_sca_fi_commands.h"
-#include "sw/device/tests/penetrationtests/json/ibex_fi_commands.h"
-#include "sw/device/tests/penetrationtests/json/ibex_sca_commands.h"
-#include "sw/device/tests/penetrationtests/json/kmac_sca_commands.h"
-#include "sw/device/tests/penetrationtests/json/otbn_fi_commands.h"
-#include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
-#include "sw/device/tests/penetrationtests/json/sha3_sca_commands.h"
-#include "sw/device/tests/penetrationtests/json/trigger_sca_commands.h"
-
-// Include handlers
-#include "fi/ibex_fi.h"
-#include "fi/otbn_fi.h"
-#include "lib/extclk_sca_fi.h"
-#include "sca/aes_sca.h"
-#include "sca/ibex_sca.h"
-#include "sca/kmac_sca.h"
-#include "sca/prng_sca.h"
-#include "sca/sha3_sca.h"
-#include "sca/trigger_sca.h"
-
-OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
-
-status_t process_cmd(ujson_t *uj) {
-  while (true) {
-    penetrationtest_cmd_t cmd;
-    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
-    switch (cmd) {
-      case kPenetrationtestCommandAesSca:
-        RESP_ERR(uj, handle_aes_sca(uj));
-        break;
-      case kPenetrationtestCommandExtClkScaFi:
-        RESP_ERR(uj, handle_extclk_sca_fi(uj));
-        break;
-      case kPenetrationtestCommandIbexFi:
-        RESP_ERR(uj, handle_ibex_fi(uj));
-        break;
-      case kPenetrationtestCommandIbexSca:
-        RESP_ERR(uj, handle_ibex_sca(uj));
-        break;
-      case kPenetrationtestCommandKmacSca:
-        RESP_ERR(uj, handle_kmac_sca(uj));
-        break;
-      case kPenetrationtestCommandOtbnFi:
-        RESP_ERR(uj, handle_otbn_fi(uj));
-        break;
-      case kPenetrationtestCommandPrngSca:
-        RESP_ERR(uj, handle_prng_sca(uj));
-        break;
-      case kPenetrationtestCommandSha3Sca:
-        RESP_ERR(uj, handle_sha3_sca(uj));
-        break;
-      case kPenetrationtestCommandTriggerSca:
-        RESP_ERR(uj, handle_trigger_sca(uj));
-        break;
-      default:
-        LOG_ERROR("Unrecognized command: %d", cmd);
-        RESP_ERR(uj, INVALID_ARGUMENT());
-    }
-  }
-
-  return OK_STATUS(0);
-}
-
-bool test_main(void) {
-  CHECK_STATUS_OK(entropy_complex_init());
-  ujson_t uj = ujson_ottf_console();
-  return status_ok(process_cmd(&uj));
-}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_asym.c b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_asym.c
new file mode 100644
index 0000000000000..dc37950db9f91
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_asym.c
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_asym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandCryptoLibFiAsym:
+        RESP_ERR(uj, handle_cryptolib_fi_asym(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_sym.c b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_sym.c
new file mode 100644
index 0000000000000..181567a6fd53d
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_fi_sym.c
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/fi/cryptolib_fi_sym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandCryptoLibFiSym:
+        RESP_ERR(uj, handle_cryptolib_fi_sym(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_asym.c b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_asym.c
new file mode 100644
index 0000000000000..0845c04cddf01
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_asym.c
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+#include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/rng_sca.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandCryptoLibScaAsym:
+        RESP_ERR(uj, handle_cryptolib_sca_asym(uj));
+        break;
+      case kPenetrationtestCommandPrngSca:
+        RESP_ERR(uj, handle_prng_sca(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_sym.c b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_sym.c
new file mode 100644
index 0000000000000..2f36c27ab3eff
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_cryptolib_sca_sym.c
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+#include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/rng_sca.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandCryptoLibScaSym:
+        RESP_ERR(uj, handle_cryptolib_sca_sym(uj));
+        break;
+      case kPenetrationtestCommandPrngSca:
+        RESP_ERR(uj, handle_prng_sca(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_fi.c b/sw/device/tests/penetrationtests/firmware/firmware_fi.c
index 039a1e577eadc..a4b297761d92a 100644
--- a/sw/device/tests/penetrationtests/firmware/firmware_fi.c
+++ b/sw/device/tests/penetrationtests/firmware/firmware_fi.c
@@ -11,14 +11,24 @@
 #include "sw/device/lib/ujson/ujson.h"
 
 // Include commands
+#include "sw/device/tests/penetrationtests/json/alert_fi_commands.h"
 #include "sw/device/tests/penetrationtests/json/commands.h"
-#include "sw/device/tests/penetrationtests/json/ibex_fi_commands.h"
-#include "sw/device/tests/penetrationtests/json/otbn_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/crypto_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/otp_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+#include "sw/device/tests/penetrationtests/json/rng_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/rom_fi_commands.h"
 
 // Include handlers
-#include "fi/ibex_fi.h"
-#include "fi/otbn_fi.h"
-#include "lib/extclk_sca_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/alert_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/crypto_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/lc_ctrl_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/otp_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/rng_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/fi/rom_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 
 OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
 
@@ -27,14 +37,29 @@ status_t process_cmd(ujson_t *uj) {
     penetrationtest_cmd_t cmd;
     TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
     switch (cmd) {
+      case kPenetrationtestCommandAlertInfo:
+        RESP_ERR(uj, pentest_read_rstmgr_alert_info(uj));
+        break;
+      case kPenetrationtestCommandCryptoFi:
+        RESP_ERR(uj, handle_crypto_fi(uj));
+        break;
       case kPenetrationtestCommandExtClkScaFi:
         RESP_ERR(uj, handle_extclk_sca_fi(uj));
         break;
-      case kPenetrationtestCommandIbexFi:
-        RESP_ERR(uj, handle_ibex_fi(uj));
+      case kPenetrationtestCommandLCCtrlFi:
+        RESP_ERR(uj, handle_lc_ctrl_fi(uj));
+        break;
+      case kPenetrationtestCommandOtpFi:
+        RESP_ERR(uj, handle_otp_fi(uj));
+        break;
+      case kPenetrationtestCommandRngFi:
+        RESP_ERR(uj, handle_rng_fi(uj));
+        break;
+      case kPenetrationtestCommandRomFi:
+        RESP_ERR(uj, handle_rom_fi(uj));
         break;
-      case kPenetrationtestCommandOtbnFi:
-        RESP_ERR(uj, handle_otbn_fi(uj));
+      case kPenetrationtestCommandAlertFi:
+        RESP_ERR(uj, handle_alert_fi(uj));
         break;
       default:
         LOG_ERROR("Unrecognized command: %d", cmd);
@@ -42,7 +67,7 @@ status_t process_cmd(ujson_t *uj) {
     }
   }
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 bool test_main(void) {
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_fi_ibex.c b/sw/device/tests/penetrationtests/firmware/firmware_fi_ibex.c
new file mode 100644
index 0000000000000..97ca6123fdb2e
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_fi_ibex.c
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/ibex_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/fi/ibex_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandIbexFi:
+        RESP_ERR(uj, handle_ibex_fi(uj));
+        break;
+      case kPenetrationtestCommandAlertInfo:
+        RESP_ERR(uj, pentest_read_rstmgr_alert_info(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_fi_otbn.c b/sw/device/tests/penetrationtests/firmware/firmware_fi_otbn.c
new file mode 100644
index 0000000000000..26315906c3eb5
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/firmware_fi_otbn.c
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <stdbool.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/entropy.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+// Include commands
+#include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/otbn_fi_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+
+// Include handlers
+#include "sw/device/tests/penetrationtests/firmware/fi/otbn_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+status_t process_cmd(ujson_t *uj) {
+  while (true) {
+    penetrationtest_cmd_t cmd;
+    TRY(ujson_deserialize_penetrationtest_cmd_t(uj, &cmd));
+    switch (cmd) {
+      case kPenetrationtestCommandOtbnFi:
+        RESP_ERR(uj, handle_otbn_fi(uj));
+        break;
+      case kPenetrationtestCommandAlertInfo:
+        RESP_ERR(uj, pentest_read_rstmgr_alert_info(uj));
+        break;
+      default:
+        LOG_ERROR("Unrecognized command: %d", cmd);
+        RESP_ERR(uj, INVALID_ARGUMENT());
+    }
+  }
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  CHECK_STATUS_OK(entropy_complex_init());
+  ujson_t uj = ujson_ottf_console();
+  return status_ok(process_cmd(&uj));
+}
diff --git a/sw/device/tests/penetrationtests/firmware/firmware_sca.c b/sw/device/tests/penetrationtests/firmware/firmware_sca.c
index abd9a8eab4b40..9747749e98d42 100644
--- a/sw/device/tests/penetrationtests/firmware/firmware_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/firmware_sca.c
@@ -13,20 +13,28 @@
 // Include commands
 #include "sw/device/tests/penetrationtests/json/aes_sca_commands.h"
 #include "sw/device/tests/penetrationtests/json/commands.h"
+#include "sw/device/tests/penetrationtests/json/edn_sca_commands.h"
+#include "sw/device/tests/penetrationtests/json/hmac_sca_commands.h"
 #include "sw/device/tests/penetrationtests/json/ibex_sca_commands.h"
 #include "sw/device/tests/penetrationtests/json/kmac_sca_commands.h"
+#include "sw/device/tests/penetrationtests/json/otbn_sca_commands.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
 #include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
 #include "sw/device/tests/penetrationtests/json/sha3_sca_commands.h"
 #include "sw/device/tests/penetrationtests/json/trigger_sca_commands.h"
 
 // Include handlers
-#include "lib/extclk_sca_fi.h"
-#include "sca/aes_sca.h"
-#include "sca/ibex_sca.h"
-#include "sca/kmac_sca.h"
-#include "sca/prng_sca.h"
-#include "sca/sha3_sca.h"
-#include "sca/trigger_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/aes_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/edn_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/hmac_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/otbn_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/rng_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/sha3_sca.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/trigger_sca.h"
 
 OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
 
@@ -38,15 +46,27 @@ status_t process_cmd(ujson_t *uj) {
       case kPenetrationtestCommandAesSca:
         RESP_ERR(uj, handle_aes_sca(uj));
         break;
+      case kPenetrationtestCommandAlertInfo:
+        RESP_ERR(uj, pentest_read_rstmgr_alert_info(uj));
+        break;
+      case kPenetrationtestCommandEdnSca:
+        RESP_ERR(uj, handle_edn_sca(uj));
+        break;
       case kPenetrationtestCommandExtClkScaFi:
         RESP_ERR(uj, handle_extclk_sca_fi(uj));
         break;
+      case kPenetrationtestCommandHmacSca:
+        RESP_ERR(uj, handle_hmac_sca(uj));
+        break;
       case kPenetrationtestCommandIbexSca:
         RESP_ERR(uj, handle_ibex_sca(uj));
         break;
       case kPenetrationtestCommandKmacSca:
         RESP_ERR(uj, handle_kmac_sca(uj));
         break;
+      case kPenetrationtestCommandOtbnSca:
+        RESP_ERR(uj, handle_otbn_sca(uj));
+        break;
       case kPenetrationtestCommandPrngSca:
         RESP_ERR(uj, handle_prng_sca(uj));
         break;
@@ -62,7 +82,7 @@ status_t process_cmd(ujson_t *uj) {
     }
   }
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 bool test_main(void) {
diff --git a/sw/device/tests/penetrationtests/firmware/lib/BUILD b/sw/device/tests/penetrationtests/firmware/lib/BUILD
index 4fdf071317f2c..8d0e3939d5cf9 100644
--- a/sw/device/tests/penetrationtests/firmware/lib/BUILD
+++ b/sw/device/tests/penetrationtests/firmware/lib/BUILD
@@ -4,6 +4,11 @@
 
 package(default_visibility = ["//visibility:public"])
 
+exports_files([
+    "cryptolib_asym.h",
+    "cryptolib_sym.h",
+])
+
 cc_library(
     name = "extclk_sca_fi",
     srcs = ["extclk_sca_fi.c"],
@@ -21,26 +26,55 @@ cc_library(
 )
 
 cc_library(
-    name = "sca_lib",
-    srcs = ["sca_lib.c"],
-    hdrs = ["sca_lib.h"],
+    name = "pentest_lib",
+    srcs = ["pentest_lib.c"],
+    hdrs = ["pentest_lib.h"],
     deps = [
+        "//hw/ip/aes:model",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:bitfield",
         "//sw/device/lib/base:csr",
+        "//sw/device/lib/base:macros",
         "//sw/device/lib/base:mmio",
         "//sw/device/lib/dif:alert_handler",
+        "//sw/device/lib/dif:clkmgr",
         "//sw/device/lib/dif:csrng",
         "//sw/device/lib/dif:csrng_shared",
         "//sw/device/lib/dif:edn",
         "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:gpio",
         "//sw/device/lib/dif:lc_ctrl",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:rom_ctrl",
         "//sw/device/lib/dif:rstmgr",
         "//sw/device/lib/dif:rv_core_ibex",
         "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/dif:rv_timer",
+        "//sw/device/lib/dif:sensor_ctrl",
+        "//sw/device/lib/dif:sram_ctrl",
+        "//sw/device/lib/dif:uart",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:irq",
         "//sw/device/lib/testing:alert_handler_testutils",
-        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing:rv_plic_testutils",
+        "//sw/device/lib/testing/test_framework:check",
         "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ottf_start",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-    ],
+        "//sw/device/tests/penetrationtests/json:pentest_lib_commands",
+    ] + select({
+        "//sw/device:is_english_breakfast": [],
+        "//conditions:default": [
+            "//sw/device/lib/crypto/drivers:otbn",
+            "//sw/device/lib/testing:entropy_testutils",
+            "//sw/device/lib/testing:rstmgr_testutils",
+            "//sw/device/silicon_creator/lib/base:boot_measurements",
+            "//sw/device/silicon_creator/lib/drivers:flash_ctrl",
+            "//sw/device/silicon_creator/lib/drivers:retention_sram",
+            "//sw/device/silicon_creator/lib/ownership",
+        ],
+    }),
 )
diff --git a/sw/device/tests/penetrationtests/firmware/lib/cryptolib_asym.h b/sw/device/tests/penetrationtests/firmware/lib/cryptolib_asym.h
new file mode 100644
index 0000000000000..111979ad943ab
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/lib/cryptolib_asym.h
@@ -0,0 +1,86 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_ASYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_ASYM_H_
+
+enum {
+  /**
+   * SHA2 number of words.
+   */
+  kPentestSha256DigestBytes = 256 / 8,
+  kPentestSha384DigestBytes = 384 / 8,
+  kPentestSha512DigestBytes = 512 / 8,
+  kPentestSha256DigestWords = kPentestSha256DigestBytes / sizeof(uint32_t),
+  kPentestSha384DigestWords = kPentestSha384DigestBytes / sizeof(uint32_t),
+  kPentestSha512DigestWords = kPentestSha512DigestBytes / sizeof(uint32_t),
+  /**
+   * Number of words and bytes for different RSA modes.
+   */
+  kPentestRsa2048NumBytes = 2048 / 8,
+  kPentestRsa2048NumWords = kPentestRsa2048NumBytes / sizeof(uint32_t),
+  kPentestRsa3072NumBytes = 3072 / 8,
+  kPentestRsa3072NumWords = kPentestRsa2048NumBytes / sizeof(uint32_t),
+  kPentestRsa4096NumBytes = 4096 / 8,
+  kPentestRsa4096NumWords = kPentestRsa4096NumBytes / sizeof(uint32_t),
+  /**
+   * RSA mode definitions.
+   */
+  kPentestRsa2048 = 0,
+  kPentestRsa3072 = 1,
+  kPentestRsa4096 = 2,
+  /**
+   * RSA hash mode definitions.
+   */
+  kPentestRsaHashmodeSha256 = 0,
+  kPentestRsaHashmodeSha384 = 1,
+  kPentestRsaHashmodeSha512 = 2,
+  /**
+   * Number of max words in a RSA msg.
+   */
+  kPentestRsaMaxMsgWords = RSA_CMD_MAX_MESSAGE_BYTES / sizeof(uint32_t),
+  /**
+   * Number of max N words in RSA.
+   */
+  kPentestRsaMaxNWords = RSA_CMD_MAX_N_BYTES / sizeof(uint32_t),
+  /**
+   * Number of max D words in RSA.
+   */
+  kPentestRsaMaxDWords = RSA_CMD_MAX_N_BYTES / sizeof(uint32_t),
+  /**
+   * RSA padding modes.
+   */
+  kPentestRsaPaddingPkcs = 0,
+  kPentestRsaPaddingPss = 1,
+  /**
+   * P256 parameters.
+   */
+  kPentestP256Bytes = 256 / 8,
+  kPentestP256Words = kPentestP256Bytes / sizeof(uint32_t),
+  /**
+   * P384 parameters.
+   */
+  kPentestP384Bytes = 384 / 8,
+  kPentestP384Words = kPentestP384Bytes / sizeof(uint32_t),
+  /**
+   * Bytes in one share of a masked P-256 private key.
+   */
+  kPentestP256MaskedPrivateKeyBytes = 40,
+  /**
+   * Words in one share of a masked P-256 private key.
+   */
+  kPentestP256MaskedPrivateKeyWords =
+      kPentestP256MaskedPrivateKeyBytes / sizeof(uint32_t),
+  /**
+   * Bytes in one share of a masked P-384 private key.
+   */
+  kPentestP384MaskedPrivateKeyBytes = 56,
+  /**
+   * Words in one share of a masked P-384 private key.
+   */
+  kPentestP384MaskedPrivateKeyWords =
+      kPentestP384MaskedPrivateKeyBytes / sizeof(uint32_t),
+};
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_ASYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/lib/cryptolib_sym.h b/sw/device/tests/penetrationtests/firmware/lib/cryptolib_sym.h
new file mode 100644
index 0000000000000..272d4e15cc841
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/lib/cryptolib_sym.h
@@ -0,0 +1,57 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_SYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_SYM_H_
+
+enum {
+  /**
+   * AES mode definitions.
+   */
+  kPentestAesModeEcb = 0,
+  kPentestAesModeCbc = 1,
+  kPentestAesModeCfb = 2,
+  kPentestAesModeOfb = 3,
+  kPentestAesModeCtr = 4,
+  /**
+   * AES mode definitions.
+   */
+  kPentestAesPaddingNull = 0,
+  kPentestAesPaddingPkcs7 = 1,
+  kPentestAesPaddingIso9797M2 = 2,
+  /**
+   * Fixed AES IV size.
+   */
+  kPentestAesIvSize = 4,
+  /**
+   * Number of words in a block.
+   */
+  kPentestAesBlockWords = AES_CMD_MAX_BLOCK_BYTES / sizeof(uint32_t),
+  /**
+   * Number of words in an AES key.
+   */
+  kPentestAesMaxKeyWords = AES_CMD_MAX_KEY_BYTES / sizeof(uint32_t),
+  /**
+   * Number of words in a HMAC key.
+   */
+  kPentestHmacMaxKeyWords = HMAC_CMD_MAX_KEY_BYTES / sizeof(uint32_t),
+  /**
+   * HMAC mode definitions.
+   */
+  kPentestHmacHashAlgSha256 = 0,
+  kPentestHmacHashAlgSha384 = 1,
+  kPentestHmacHashAlgSha512 = 2,
+  /**
+   * HMAC number of tag bytes for each mode.
+   */
+  kPentestHmacTagBytesSha256 = 32,
+  kPentestHmacTagBytesSha384 = 48,
+  kPentestHmacTagBytesSha512 = 64,
+  /**
+   * Number of max words in a tag.
+   */
+  kPentestHmacMaxTagWords = HMAC_CMD_MAX_TAG_BYTES / sizeof(uint32_t),
+};
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_CRYPTOLIB_SYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.c b/sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.c
index 0fb7251f8dc29..a0f6b5f3951d8 100644
--- a/sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.c
+++ b/sw/device/tests/penetrationtests/firmware/lib/extclk_sca_fi.c
@@ -32,8 +32,8 @@ static bool did_extclk_settle(const dif_clkmgr_t *clkmgr) {
 }
 
 status_t handle_extclk_sca_fi_configure(ujson_t *uj) {
-  cryptotest_extclk_sca_fi_cfg_t uj_data;
-  TRY(ujson_deserialize_cryptotest_extclk_sca_fi_cfg_t(uj, &uj_data));
+  penetrationtest_extclk_sca_fi_cfg_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_extclk_sca_fi_cfg_t(uj, &uj_data));
 
   TRY(dif_clkmgr_init(mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR),
                       &clkmgr));
diff --git a/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.c b/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.c
new file mode 100644
index 0000000000000..133b7b367df5f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.c
@@ -0,0 +1,1300 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+
+#include "hw/ip/aes/model/aes.h"
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/bitfield.h"
+#include "sw/device/lib/base/csr.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_alert_handler.h"
+#include "sw/device/lib/dif/dif_clkmgr.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_csrng_shared.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_lc_ctrl.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_rom_ctrl.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/dif/dif_rv_timer.h"
+#include "sw/device/lib/dif/dif_sensor_ctrl.h"
+#include "sw/device/lib/dif/dif_sram_ctrl.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/pinmux_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_isrs.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+#include "clkmgr_regs.h"  // Generated
+#include "csrng_regs.h"   // Generated
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_core_ibex_regs.h"  // Generated
+#include "sensor_ctrl_regs.h"   // Generated.
+#include "sram_ctrl_regs.h"     // Generated
+
+#if !OT_IS_ENGLISH_BREAKFAST
+#include "sw/device/lib/crypto/drivers/otbn.h"
+#include "sw/device/lib/dif/dif_csrng.h"
+#include "sw/device/lib/dif/dif_edn.h"
+#include "sw/device/lib/dif/dif_entropy_src.h"
+#include "sw/device/lib/testing/alert_handler_testutils.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/silicon_creator/lib/base/boot_measurements.h"
+#include "sw/device/silicon_creator/lib/drivers/flash_ctrl.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+#include "sw/device/silicon_creator/lib/ownership/ownership.h"
+
+#include "edn_regs.h"        // Generated
+#include "sram_ctrl_regs.h"  // Generated
+
+#endif
+
+/**
+ * Bitfield for the trigger source.
+ *
+ * Bits 10 and 11 are used to select the trigger source. See chiplevel.sv.tpl
+ * for details.
+ */
+static const bitfield_field32_t kTriggerSourceBitfield = {
+    .index = 10,
+    .mask = 0x3,
+};
+
+enum {
+  /**
+   * Bit index of the hardware trigger gate signal for gating the hardware
+   * trigger from software.
+   *
+   * See chiplevel.sv.tpl for details.
+   */
+  kTriggerHwGateBitIndex = 9,
+  /**
+   * Bit index of the software trigger signal.
+   *
+   * See chiplevel.sv.tpl for details.
+   */
+  kTriggerSwBitIndex = 8,
+  /**
+   * RV timer settings.
+   */
+  kRvTimerComparator = 0,
+  kRvTimerHart = kTopEarlgreyPlicTargetIbex0,
+  /**
+   * CSR_REG_CPUCTRL[0] is the iCache configuration field.
+   */
+  kCpuctrlICacheIdx = 0,
+  kCpuctrlICacheMask = (1 << kCpuctrlICacheIdx),
+  /**
+   * CSR_REG_CPUCTRL[1] is the data independent timing field.
+   */
+  kCpuctrlDataIndTimingIdx = 1,
+  kCpuctrlDataIndTimingMask = (1 << kCpuctrlDataIndTimingIdx),
+  /**
+   * CSR_REG_CPUCTRL[2] is the dummy instruction enable configuration field.
+   */
+  kCpuctrlDummyInstrEnIdx = 2,
+  kCpuctrlDummyInstrEnMask = (1 << kCpuctrlDummyInstrEnIdx),
+
+  /**
+   * The dummy instruction count configuration field.
+   */
+  kCpuctrlDummyInstrCountIdx = 3,
+  kCpuctrlDummyInstrCountMask = 7,
+};
+
+// By default, we use the precise, hardware-gated capture trigger.
+static unsigned int trigger_bit_index = kTriggerHwGateBitIndex;
+
+static dif_gpio_t gpio;
+static dif_pinmux_t pinmux;
+static dif_rv_timer_t timer;
+static dif_sensor_ctrl_t sensor_ctrl;
+static dif_uart_t uart0;
+static dif_uart_t uart1;
+
+#if !OT_IS_ENGLISH_BREAKFAST
+static dif_alert_handler_t alert_handler;
+static dif_csrng_t csrng;
+static dif_edn_t edn0;
+static dif_edn_t edn1;
+static dif_lc_ctrl_t lc;
+static dif_rv_plic_t plic;
+static dif_rstmgr_t rstmgr;
+#endif
+
+status_t pentest_configure_entropy_source_max_reseed_interval(void) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  const dif_entropy_src_t entropy_src = {
+      .base_addr = mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR)};
+  const dif_csrng_t csrng = {
+      .base_addr = mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR)};
+  const dif_edn_t edn0 = {
+      .base_addr = mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR)};
+  const dif_edn_t edn1 = {
+      .base_addr = mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR)};
+
+  TRY(entropy_testutils_stop_all());
+
+  // Re-eanble entropy src and csrng.
+  TRY(dif_entropy_src_configure(
+      &entropy_src, entropy_testutils_config_default(), kDifToggleEnabled));
+  TRY(dif_csrng_configure(&csrng));
+
+  // Re-enable EDN0 in auto mode.
+  TRY(dif_edn_set_auto_mode(
+      &edn0,
+      (dif_edn_auto_params_t){
+          // EDN0 provides lower-quality entropy.  Let one generate command
+          // return 8
+          // blocks, and reseed every 32 generates.
+          .instantiate_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdInstantiate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .reseed_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(
+                      kCsrngAppCmdReseed, kDifCsrngEntropySrcToggleEnable,
+                      /*cmd_len=*/0, /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .generate_cmd =
+              {
+                  // Generate 8 128-bit blocks.
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdGenerate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/8),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          // Reseed every 0xffffffff generates.
+          .reseed_interval = 0xffffffff,
+      }));
+
+  // Re-enable EDN1 in auto mode.
+  TRY(dif_edn_set_auto_mode(
+      &edn1,
+      (dif_edn_auto_params_t){
+          // EDN1 provides highest-quality entropy.  Let one generate command
+          // return 1 block, and reseed after every generate.
+          .instantiate_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdInstantiate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .reseed_cmd =
+              {
+                  .cmd = csrng_cmd_header_build(
+                      kCsrngAppCmdReseed, kDifCsrngEntropySrcToggleEnable,
+                      /*cmd_len=*/0, /*generate_len=*/0),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          .generate_cmd =
+              {
+                  // Generate 1 128-bit block.
+                  .cmd = csrng_cmd_header_build(kCsrngAppCmdGenerate,
+                                                kDifCsrngEntropySrcToggleEnable,
+                                                /*cmd_len=*/0,
+                                                /*generate_len=*/1),
+                  .seed_material =
+                      {
+                          .len = 0,
+                      },
+              },
+          // Reseed after every 0xffffffff generates.
+          .reseed_interval = 0xffffffff,
+      }));
+#endif
+  return OK_STATUS();
+}
+
+pentest_sensor_alerts_t pentest_get_sensor_alerts(void) {
+  pentest_sensor_alerts_t registered;
+  memset(registered.alerts, 0, sizeof(registered.alerts));
+  CHECK_DIF_OK(
+      dif_sensor_ctrl_get_fatal_events(&sensor_ctrl, &registered.alerts[0]));
+  CHECK_DIF_OK(
+      dif_sensor_ctrl_get_recov_events(&sensor_ctrl, &registered.alerts[1]));
+  return registered;
+}
+
+void pentest_clear_sensor_recov_alerts(void) {
+  for (size_t it = 0; it < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS; it++) {
+    CHECK_DIF_OK(dif_sensor_ctrl_clear_recov_event(&sensor_ctrl, it));
+  }
+}
+
+pentest_registered_alerts_t pentest_get_triggered_alerts(void) {
+  pentest_registered_alerts_t registered;
+  memset(registered.alerts, 0, sizeof(registered.alerts));
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  bool is_cause;
+  // Loop over all alert_cause regs
+  for (size_t alert = 0; alert < ALERT_HANDLER_PARAM_N_ALERTS; alert++) {
+    CHECK_DIF_OK(
+        dif_alert_handler_alert_is_cause(&alert_handler, alert, &is_cause));
+    if (is_cause) {
+      if (alert < 32) {
+        registered.alerts[0] |= (1 << alert);
+      } else if (alert < 64) {
+        registered.alerts[1] |= (1 << (alert - 32));
+      } else {
+        registered.alerts[2] |= (1 << (alert - 64));
+      }
+    }
+  }
+
+  // Loop over all alert_cause regs.
+  for (dif_alert_handler_alert_t i = 0; i < ALERT_HANDLER_PARAM_N_ALERTS; i++) {
+    CHECK_DIF_OK(dif_alert_handler_alert_acknowledge(&alert_handler, i));
+  }
+#endif
+
+  return registered;
+}
+
+void pentest_configure_alert_handler(
+    uint32_t input_alert_classes[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool input_alert_en[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool input_class_en[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint16_t accumulation_thresholds[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t signals[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t duration_cycles[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t ping_timeout) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  mmio_region_t base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  CHECK_DIF_OK(dif_rv_plic_init(base_addr, &plic));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR);
+  CHECK_DIF_OK(dif_alert_handler_init(base_addr, &alert_handler));
+
+  // Configure each alert to be enabled or not and assign it to a class.
+  for (dif_alert_handler_alert_t alert = 0;
+       alert < ALERT_HANDLER_PARAM_N_ALERTS; ++alert) {
+    // Classify the alert if it is different from what is there currently.
+    ptrdiff_t class_reg_offset =
+        ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_REG_OFFSET +
+        (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+    if (mmio_region_read32(alert_handler.base_addr, class_reg_offset) !=
+        input_alert_classes[alert])
+      mmio_region_write32_shadowed(alert_handler.base_addr, class_reg_offset,
+                                   input_alert_classes[alert]);
+
+    // Enable the alert if requested.
+    ptrdiff_t enable_reg_offset =
+        ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET +
+        (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+    if (input_alert_en[alert])
+      mmio_region_write32_shadowed(alert_handler.base_addr, enable_reg_offset,
+                                   0x1);
+  }
+
+  // Link the escalation phases to the escalation signals and sets the duration
+  // for each phase. Recall that escalation signal 0 is NMI, 1 is wipe secrets,
+  // 2 is scrap state, 3 is reset (the value of signals[i]).
+  dif_alert_handler_escalation_phase_t esc_phases[] = {
+      {.phase = kDifAlertHandlerClassStatePhase0,
+       .signal = signals[0],
+       .duration_cycles = duration_cycles[0]},
+      {.phase = kDifAlertHandlerClassStatePhase1,
+       .signal = signals[1],
+       .duration_cycles = duration_cycles[1]},
+      {.phase = kDifAlertHandlerClassStatePhase2,
+       .signal = signals[2],
+       .duration_cycles = duration_cycles[2]},
+      {.phase = kDifAlertHandlerClassStatePhase3,
+       .signal = signals[3],
+       .duration_cycles = duration_cycles[3]}};
+
+  // Configure each class to leave its accumulation counter unlocked, setting
+  // the threshold for how many alerts start the first escalation phase, and
+  // which escalation phases it follows.
+  for (dif_alert_handler_class_t class = 0;
+       class < ALERT_HANDLER_PARAM_N_CLASSES; class ++) {
+    dif_alert_handler_class_config_t class_config = {
+        .auto_lock_accumulation_counter = kDifToggleDisabled,
+        .accumulator_threshold = accumulation_thresholds[class],
+        .irq_deadline_cycles = 0,
+        .escalation_phases = esc_phases,
+        .escalation_phases_len = ARRAYSIZE(esc_phases),
+        .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase0,
+    };
+
+    CHECK_DIF_OK(dif_alert_handler_configure_class(
+        &alert_handler, class, class_config, input_class_en[class],
+        kDifToggleDisabled));
+  }
+
+  // Configure the ping timeout.
+  CHECK_DIF_OK(dif_alert_handler_configure_ping_timer(
+      &alert_handler, ping_timeout, kDifToggleEnabled, kDifToggleDisabled));
+
+  // Enables alert handler irq.
+  CHECK_DIF_OK(dif_alert_handler_irq_set_enabled(
+      &alert_handler, kDifAlertHandlerIrqClassa, kDifToggleEnabled));
+#endif
+}
+
+status_t pentest_print_config_alert_handler(
+    uint32_t alert_classes[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool enabled_alerts[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool enabled_classes[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t accumulation_thresholds[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t duration_cycles[ALERT_HANDLER_PARAM_N_PHASES],
+    bool escalation_signals_en[ALERT_HANDLER_PARAM_N_PHASES],
+    uint32_t escalation_signals_map[ALERT_HANDLER_PARAM_N_PHASES]) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  for (dif_alert_handler_alert_t alert = 0;
+       alert < ALERT_HANDLER_PARAM_N_ALERTS; alert++) {
+    // Read the classification of the alert.
+    ptrdiff_t class_reg_offset =
+        ALERT_HANDLER_ALERT_CLASS_SHADOWED_0_REG_OFFSET +
+        (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+    alert_classes[alert] =
+        mmio_region_read32(alert_handler.base_addr, class_reg_offset);
+
+    // Read the enablement of the alert.
+    ptrdiff_t enable_reg_offset =
+        ALERT_HANDLER_ALERT_EN_SHADOWED_0_REG_OFFSET +
+        (ptrdiff_t)alert * (ptrdiff_t)sizeof(uint32_t);
+    enabled_alerts[alert] =
+        mmio_region_read32(alert_handler.base_addr, enable_reg_offset);
+  }
+
+  // Check whether the alert classes are enabled.
+  for (dif_alert_handler_class_t alert_class = 0;
+       alert_class < ALERT_HANDLER_PARAM_N_CLASSES; alert_class++) {
+    CHECK_DIF_OK(dif_alert_handler_is_class_enabled(
+        &alert_handler, alert_class, &enabled_classes[(int)alert_class]));
+  }
+
+  // Read the accumulation thresholds for the classes.
+  ptrdiff_t accum_thresh_reg_offsetA =
+      ALERT_HANDLER_CLASSA_ACCUM_THRESH_SHADOWED_REG_OFFSET;
+  accumulation_thresholds[0] =
+      mmio_region_read32(alert_handler.base_addr, accum_thresh_reg_offsetA);
+  ptrdiff_t accum_thresh_reg_offsetB =
+      ALERT_HANDLER_CLASSB_ACCUM_THRESH_SHADOWED_REG_OFFSET;
+  accumulation_thresholds[1] =
+      mmio_region_read32(alert_handler.base_addr, accum_thresh_reg_offsetB);
+  ptrdiff_t accum_thresh_reg_offsetC =
+      ALERT_HANDLER_CLASSC_ACCUM_THRESH_SHADOWED_REG_OFFSET;
+  accumulation_thresholds[2] =
+      mmio_region_read32(alert_handler.base_addr, accum_thresh_reg_offsetC);
+  ptrdiff_t accum_thresh_reg_offsetD =
+      ALERT_HANDLER_CLASSD_ACCUM_THRESH_SHADOWED_REG_OFFSET;
+  accumulation_thresholds[3] =
+      mmio_region_read32(alert_handler.base_addr, accum_thresh_reg_offsetD);
+
+  // Read the duration cycles for the phases.
+  ptrdiff_t phase0_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE0_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles[0] =
+      mmio_region_read32(alert_handler.base_addr, phase0_cycles_reg_offset);
+  ptrdiff_t phase1_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE1_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles[1] =
+      mmio_region_read32(alert_handler.base_addr, phase1_cycles_reg_offset);
+  ptrdiff_t phase2_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE2_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles[2] =
+      mmio_region_read32(alert_handler.base_addr, phase2_cycles_reg_offset);
+  ptrdiff_t phase3_cycles_reg_offset =
+      ALERT_HANDLER_CLASSA_PHASE3_CYC_SHADOWED_REG_OFFSET;
+  duration_cycles[3] =
+      mmio_region_read32(alert_handler.base_addr, phase3_cycles_reg_offset);
+
+  ptrdiff_t ctrl_reg_offset = ALERT_HANDLER_CLASSA_CTRL_SHADOWED_REG_OFFSET;
+  uint32_t ctrl_reg =
+      mmio_region_read32(alert_handler.base_addr, ctrl_reg_offset);
+
+  // Read whether each escalation signal is enabled.
+  bitfield_bit32_index_t signal_enable_bit_A =
+      ALERT_HANDLER_CLASSA_CTRL_SHADOWED_EN_E0_BIT;
+  escalation_signals_en[0] = bitfield_bit32_read(ctrl_reg, signal_enable_bit_A);
+  bitfield_bit32_index_t signal_enable_bit_B =
+      ALERT_HANDLER_CLASSA_CTRL_SHADOWED_EN_E1_BIT;
+  escalation_signals_en[1] = bitfield_bit32_read(ctrl_reg, signal_enable_bit_B);
+  bitfield_bit32_index_t signal_enable_bit_C =
+      ALERT_HANDLER_CLASSA_CTRL_SHADOWED_EN_E2_BIT;
+  escalation_signals_en[2] = bitfield_bit32_read(ctrl_reg, signal_enable_bit_C);
+  bitfield_bit32_index_t signal_enable_bit_D =
+      ALERT_HANDLER_CLASSA_CTRL_SHADOWED_EN_E3_BIT;
+  escalation_signals_en[3] = bitfield_bit32_read(ctrl_reg, signal_enable_bit_D);
+
+  // Read how each escalation signal is mapped.
+  escalation_signals_map[0] = bitfield_field32_read(
+      ctrl_reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_MAP_E0_FIELD);
+  escalation_signals_map[1] = bitfield_field32_read(
+      ctrl_reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_MAP_E1_FIELD);
+  escalation_signals_map[2] = bitfield_field32_read(
+      ctrl_reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_MAP_E2_FIELD);
+  escalation_signals_map[3] = bitfield_field32_read(
+      ctrl_reg, ALERT_HANDLER_CLASSA_CTRL_SHADOWED_MAP_E3_FIELD);
+#endif
+  return OK_STATUS();
+}
+
+status_t pentest_send_alert_config(ujson_t *uj) {
+  penetrationtest_alert_config_out_t uj_output_alerts;
+
+  TRY(pentest_print_config_alert_handler(
+      uj_output_alerts.alert_classes, uj_output_alerts.enabled_alerts,
+      uj_output_alerts.enabled_classes,
+      uj_output_alerts.accumulation_thresholds,
+      uj_output_alerts.duration_cycles, uj_output_alerts.escalation_signals_en,
+      uj_output_alerts.escalation_signals_map));
+
+  RESP_OK(ujson_serialize_penetrationtest_alert_config_out_t, uj,
+          &uj_output_alerts);
+
+  return OK_STATUS();
+}
+
+status_t pentest_print_config_sensor_ctrl(
+    bool sensor_ctrl_en[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS],
+    bool sensor_ctrl_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS]) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  // Check whether the sensors are enabled
+  for (uint32_t k = 0; k < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS; k++) {
+    sensor_ctrl_en[k] =
+        dif_toggle_to_bool(dif_multi_bit_bool_to_toggle(mmio_region_read32(
+            sensor_ctrl.base_addr,
+            SENSOR_CTRL_ALERT_EN_0_REG_OFFSET + ((ptrdiff_t)k << 2))));
+  }
+
+  // Check whether the sensors are configured as recoverable or fatal.
+  uint32_t reg = mmio_region_read32(sensor_ctrl.base_addr,
+                                    SENSOR_CTRL_FATAL_ALERT_EN_REG_OFFSET);
+  for (uint32_t k = 0; k < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS; k++) {
+    sensor_ctrl_fatal[k] = bitfield_bit32_read(reg, k);
+  }
+#endif
+  return OK_STATUS();
+}
+
+status_t pentest_send_sensor_config(ujson_t *uj) {
+  penetrationtest_sensor_config_out_t uj_output_sensors;
+
+  TRY(pentest_print_config_sensor_ctrl(uj_output_sensors.sensor_ctrl_en,
+                                       uj_output_sensors.sensor_ctrl_fatal));
+
+  RESP_OK(ujson_serialize_penetrationtest_sensor_config_out_t, uj,
+          &uj_output_sensors);
+
+  return OK_STATUS();
+}
+
+status_t pentest_read_device_id(uint32_t device_id[]) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  mmio_region_t lc_reg = mmio_region_from_addr(TOP_EARLGREY_LC_CTRL_BASE_ADDR);
+  CHECK_DIF_OK(dif_lc_ctrl_init(lc_reg, &lc));
+
+  dif_lc_ctrl_device_id_t lc_device_id;
+  CHECK_DIF_OK(dif_lc_ctrl_get_device_id(&lc, &lc_device_id));
+  memcpy(device_id, lc_device_id.data, 8 * sizeof(uint32_t));
+#else
+  memset(device_id, 0, 8 * sizeof(uint32_t));
+#endif
+
+  return OK_STATUS();
+}
+
+status_t pentest_read_rom_digest(uint32_t rom_digest[]) {
+  static dif_rom_ctrl_t rom_ctrl;
+  // initialize rom_ctrl
+  mmio_region_t rom_ctrl_reg =
+      mmio_region_from_addr(TOP_EARLGREY_ROM_CTRL_REGS_BASE_ADDR);
+  TRY(dif_rom_ctrl_init(rom_ctrl_reg, &rom_ctrl));
+
+  dif_rom_ctrl_digest_t expected_digest;
+  TRY(dif_rom_ctrl_get_expected_digest(&rom_ctrl, &expected_digest));
+
+  memcpy(rom_digest, expected_digest.digest, 8 * sizeof(uint32_t));
+
+  return OK_STATUS();
+}
+
+status_t pentest_configure_cpu(
+    bool enable_icache, bool *icache_en, bool enable_dummy_instr,
+    bool *dummy_instr_en, uint32_t dummy_instr_count, bool enable_jittery_clock,
+    bool enable_sram_readback, bool *clock_jitter_locked, bool *clock_jitter_en,
+    bool *sram_main_readback_locked, bool *sram_ret_readback_locked,
+    bool *sram_main_readback_en, bool *sram_ret_readback_en,
+    bool enable_data_ind_timing, bool *data_ind_timing_en) {
+  // Enable/disable the iCache.
+  if (enable_icache) {
+    // Set CSR_REG_CPUCTRL[0].
+    CSR_SET_BITS(CSR_REG_CPUCTRL, kCpuctrlICacheMask);
+  } else {
+    // Set CSR_REG_CPUCTRL[0].
+    CSR_CLEAR_BITS(CSR_REG_CPUCTRL, kCpuctrlICacheMask);
+  }
+  *icache_en = false;
+  // Read back the config stored in CSR_REG_CPUCTRL[0].
+  uint32_t csr;
+  CSR_READ(CSR_REG_CPUCTRL, &csr);
+  if (((csr & kCpuctrlICacheMask) >> kCpuctrlICacheIdx) == 1) {
+    *icache_en = true;
+  }
+
+  // Enable/disable data independent timing.
+  if (enable_data_ind_timing) {
+    // Set CSR_REG_CPUCTRL[1].
+    CSR_SET_BITS(CSR_REG_CPUCTRL, kCpuctrlDataIndTimingMask);
+  } else {
+    // Set CSR_REG_CPUCTRL[1].
+    CSR_CLEAR_BITS(CSR_REG_CPUCTRL, kCpuctrlDataIndTimingMask);
+  }
+  *data_ind_timing_en = false;
+  // Read back the config stored in CSR_REG_CPUCTRL[1].
+  CSR_READ(CSR_REG_CPUCTRL, &csr);
+  if (((csr & kCpuctrlDataIndTimingMask) >> kCpuctrlDataIndTimingIdx) == 1) {
+    *data_ind_timing_en = true;
+  }
+
+  // Enable/disable dummy instructions.
+  if (enable_dummy_instr) {
+    // Set CSR_REG_CPUCTRL[2].
+    CSR_SET_BITS(CSR_REG_CPUCTRL, kCpuctrlDummyInstrEnMask);
+    uint32_t cpuctrl_csr;
+    CSR_READ(CSR_REG_CPUCTRL, &cpuctrl_csr);
+    // 0 Dummy instruction every 0 - 4 real instructions
+    // 1 Dummy instruction every 0 - 8 real instructions
+    // 3 Dummy instruction every 0 - 16 real instructions
+    // 7 Dummy instruction every 0 - 32 real instructions
+    cpuctrl_csr = bitfield_field32_write(
+        cpuctrl_csr,
+        (bitfield_field32_t){.mask = kCpuctrlDummyInstrCountMask,
+                             .index = kCpuctrlDummyInstrCountIdx},
+        dummy_instr_count);
+    CSR_WRITE(CSR_REG_CPUCTRL, cpuctrl_csr);
+    uint32_t check_csr;
+    CSR_READ(CSR_REG_CPUCTRL, &check_csr);
+    if ((((check_csr >> kCpuctrlDummyInstrCountIdx) &
+          kCpuctrlDummyInstrCountMask)) == dummy_instr_count) {
+      LOG_INFO("CPUCTRL register correctly set");
+    } else {
+      LOG_INFO("Something in CPUCTRL was locked");
+    }
+  } else {
+    // Clear CSR_REG_CPUCTRL[2].
+    CSR_CLEAR_BITS(CSR_REG_CPUCTRL, kCpuctrlDummyInstrEnMask);
+  }
+  *dummy_instr_en = false;
+  // Read back the config stored in CSR_REG_CPUCTRL[2].
+  CSR_READ(CSR_REG_CPUCTRL, &csr);
+  if (((csr & kCpuctrlDummyInstrEnMask) >> kCpuctrlDummyInstrEnIdx) == 1) {
+    *dummy_instr_en = true;
+  }
+
+  // Enable or disable the jittery clock.
+  dif_clkmgr_t clkmgr;
+  TRY(dif_clkmgr_init(mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR),
+                      &clkmgr));
+
+  // Check if clock jitter is set as enabled or disabled in the CSR.
+  dif_toggle_t clock_jitter_state;
+  TRY(dif_clkmgr_jitter_get_enabled(&clkmgr, &clock_jitter_state));
+
+  if ((clock_jitter_state == kDifToggleDisabled) && enable_jittery_clock) {
+    // Clock jitter is disabled but host wants to enable it.
+    TRY(dif_clkmgr_jitter_set_enabled(&clkmgr));
+  } else if ((clock_jitter_state == kDifToggleEnabled) &&
+             !enable_jittery_clock) {
+    // Clock jitter is enabled but host wants to disable it. On A1, this will
+    // disable it. On A2, once the clock jitter is enabled it will stay enabled
+    // until the next reset. The host will be notified over uJSON that the
+    // jittery clock is still on.
+    mmio_region_write32(clkmgr.base_addr, CLKMGR_JITTER_ENABLE_REG_OFFSET,
+                        kMultiBitBool4False);
+  }
+  // Check if enabling / disabling the clock jitter worked and report it back to
+  // the host.
+  TRY(dif_clkmgr_jitter_get_enabled(&clkmgr, &clock_jitter_state));
+  *clock_jitter_en = (clock_jitter_state == kDifToggleDisabled) ? false : true;
+
+  // As the clock jitter regwen does not have an effect on A1/A2, just set it to
+  // false.
+  *clock_jitter_locked = false;
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  // Enable or disable SRAM main and ret readback feature.
+  dif_sram_ctrl_t sram_ctrl_ret;
+  dif_sram_ctrl_t sram_ctrl_main;
+  TRY(dif_sram_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR),
+      &sram_ctrl_ret));
+  TRY(dif_sram_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR),
+      &sram_ctrl_main));
+
+  dif_result_t ret_locked;
+  dif_result_t main_locked;
+  if (enable_sram_readback) {
+    ret_locked = dif_sram_ctrl_readback_set(&sram_ctrl_ret, kDifToggleEnabled);
+    main_locked =
+        dif_sram_ctrl_readback_set(&sram_ctrl_main, kDifToggleEnabled);
+  } else {
+    ret_locked = dif_sram_ctrl_readback_set(&sram_ctrl_ret, kDifToggleDisabled);
+    main_locked =
+        dif_sram_ctrl_readback_set(&sram_ctrl_main, kDifToggleDisabled);
+  }
+
+  uint32_t ret_status =
+      abs_mmio_read32(TOP_EARLGREY_SRAM_CTRL_RET_AON_REGS_BASE_ADDR +
+                      SRAM_CTRL_READBACK_REG_OFFSET);
+  uint32_t main_status =
+      abs_mmio_read32(TOP_EARLGREY_SRAM_CTRL_MAIN_REGS_BASE_ADDR +
+                      SRAM_CTRL_READBACK_REG_OFFSET);
+
+  // Report the configuration.
+  *sram_main_readback_locked = (main_locked == kDifLocked) ? true : false;
+  *sram_ret_readback_locked = (ret_locked == kDifLocked) ? true : false;
+
+  *sram_ret_readback_en = (ret_status == kMultiBitBool4True) ? true : false;
+  *sram_main_readback_en = (main_status == kMultiBitBool4True) ? true : false;
+#else  // OT_PLATFORM_RV32
+  *sram_main_readback_locked = false;
+  *sram_ret_readback_locked = false;
+
+  *sram_ret_readback_en = false;
+  *sram_main_readback_en = false;
+#endif
+  return OK_STATUS();
+}
+
+/**
+ * Initializes the UART peripheral.
+ */
+static void pentest_init_uart(void) {
+  CHECK(kUartBaudrate <= UINT32_MAX, "kUartBaudrate must fit in uint32_t");
+  CHECK(kClockFreqPeripheralHz <= UINT32_MAX,
+        "kClockFreqPeripheralHz must fit in uint32_t");
+  const dif_uart_config_t uart_config = {
+      .baudrate = (uint32_t)kUartBaudrate,
+      .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
+      .parity_enable = kDifToggleDisabled,
+      .parity = kDifUartParityEven,
+      .tx_enable = kDifToggleEnabled,
+      .rx_enable = kDifToggleEnabled,
+  };
+
+  OT_DISCARD(dif_uart_init(mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR),
+                           &uart0));
+  OT_DISCARD(dif_uart_configure(&uart0, uart_config));
+  base_uart_stdout(&uart0);
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  OT_DISCARD(dif_uart_init(mmio_region_from_addr(TOP_EARLGREY_UART1_BASE_ADDR),
+                           &uart1));
+  OT_DISCARD(dif_uart_configure(&uart1, uart_config));
+#endif
+}
+
+/**
+ * Initializes the GPIO peripheral.
+ *
+ * @param trigger Trigger source.
+ */
+static void pentest_init_gpio(pentest_trigger_source_t trigger) {
+  OT_DISCARD(
+      dif_gpio_init(mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR), &gpio));
+
+  uint32_t select_mask =
+      bitfield_field32_write(0, kTriggerSourceBitfield, UINT32_MAX);
+  uint32_t enable_mask = bitfield_bit32_write(0, kTriggerHwGateBitIndex, true);
+  enable_mask = bitfield_bit32_write(enable_mask, kTriggerSwBitIndex, true);
+
+  // Configure the pinmux to enable the GPIOs.
+  for (size_t i = 0; i < 32; ++i) {
+    if ((select_mask | enable_mask) & (1u << i)) {
+      dif_pinmux_index_t mio = kTopEarlgreyPinmuxInselIoa0 + i;
+      dif_pinmux_index_t periph_io =
+          kTopEarlgreyPinmuxPeripheralInGpioGpio0 + i;
+      OT_DISCARD(dif_pinmux_input_select(&pinmux, periph_io, mio));
+
+      mio = kTopEarlgreyPinmuxMioOutIoa0 + i;
+      periph_io = kTopEarlgreyPinmuxOutselGpioGpio0 + i;
+      OT_DISCARD(dif_pinmux_output_select(&pinmux, mio, periph_io));
+    }
+  }
+
+  OT_DISCARD(dif_gpio_output_set_enabled_all(&gpio, select_mask | enable_mask));
+
+  OT_DISCARD(dif_gpio_write_masked(
+      &gpio, select_mask,
+      bitfield_field32_write(0, kTriggerSourceBitfield, trigger)));
+}
+
+/**
+ * Initializes the timer peripheral.
+ */
+static void pentest_init_timer(void) {
+  OT_DISCARD(dif_rv_timer_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_TIMER_BASE_ADDR), &timer));
+  OT_DISCARD(dif_rv_timer_reset(&timer));
+  dif_rv_timer_tick_params_t tick_params;
+  OT_DISCARD(dif_rv_timer_approximate_tick_params(
+      kClockFreqPeripheralHz, kClockFreqCpuHz, &tick_params));
+  OT_DISCARD(dif_rv_timer_set_tick_params(&timer, kRvTimerHart, tick_params));
+  OT_DISCARD(dif_rv_timer_irq_set_enabled(
+      &timer, kDifRvTimerIrqTimerExpiredHart0Timer0, kDifToggleEnabled));
+  irq_timer_ctrl(true);
+  irq_global_ctrl(true);
+}
+
+/**
+ * Initializes the CSRNG handle.
+ */
+static void pentest_init_csrng(void) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  OT_DISCARD(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                            &csrng));
+  OT_DISCARD(dif_csrng_init(mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR),
+                            &csrng));
+#endif
+}
+
+static void pentest_init_sensor_ctrl(void) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  CHECK_DIF_OK(dif_sensor_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR),
+      &sensor_ctrl));
+#endif
+}
+
+/**
+ * Initializes the EDN handle.
+ */
+static void pentest_init_edn(void) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  OT_DISCARD(
+      dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN0_BASE_ADDR), &edn0));
+
+  OT_DISCARD(
+      dif_edn_init(mmio_region_from_addr(TOP_EARLGREY_EDN1_BASE_ADDR), &edn1));
+#endif
+}
+
+/**
+ * Override default Timer ISR.
+ *
+ * Disables the counter and clears pending interrupts.
+ */
+void ottf_timer_isr(uint32_t *exc_info) {
+  // Return values of below functions are ignored to improve capture
+  // performance.
+  OT_DISCARD(dif_rv_timer_counter_set_enabled(&timer, kRvTimerHart,
+                                              kDifToggleDisabled));
+  OT_DISCARD(dif_rv_timer_irq_acknowledge(
+      &timer, kDifRvTimerIrqTimerExpiredHart0Timer0));
+}
+
+/**
+ * Disables the given peripherals to reduce noise during SCA.
+ *
+ * Care must be taken when disabling the entropy complex if a peripheral that
+ * depends on it will be used in SCA. E.g., We can disable the entropy complex
+ * when analyzing AES only because AES features a parameter to skip PRNG
+ * reseeding for SCA experiments. Without this parameter, AES would simply get
+ * stalled with a disabled entropy complex.
+ *
+ * @param disable Set of peripherals to disable.
+ */
+void sca_disable_peripherals(pentest_peripherals_t disable) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (disable & kPentestPeripheralEdn) {
+    OT_DISCARD(dif_edn_stop(&edn0));
+    OT_DISCARD(dif_edn_stop(&edn1));
+  }
+  if (disable & kPentestPeripheralCsrng) {
+    OT_DISCARD(dif_csrng_stop(&csrng));
+  }
+  if (disable & kPentestPeripheralEntropy) {
+    dif_entropy_src_t entropy;
+    OT_DISCARD(dif_entropy_src_init(
+        mmio_region_from_addr(TOP_EARLGREY_ENTROPY_SRC_BASE_ADDR), &entropy));
+    OT_DISCARD(dif_entropy_src_set_enabled(&entropy, kDifToggleDisabled));
+  }
+#endif
+
+  // Disable HMAC, KMAC, OTBN and USB clocks through CLKMGR DIF.
+  dif_clkmgr_t clkmgr;
+  OT_DISCARD(dif_clkmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
+
+  if (disable & kPentestPeripheralAes) {
+    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
+        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_AES_HINT_BIT, kDifToggleDisabled));
+  }
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (disable & kPentestPeripheralHmac) {
+    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
+        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_HMAC_HINT_BIT, kDifToggleDisabled));
+  }
+#endif
+  if (disable & kPentestPeripheralIoDiv4) {
+    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
+        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV4_PERI_EN_BIT,
+        kDifToggleDisabled));
+  }
+  if (disable & kPentestPeripheralIoDiv2) {
+    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
+        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV2_PERI_EN_BIT,
+        kDifToggleDisabled));
+  }
+  if (disable & kPentestPeripheralUsb) {
+    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
+        &clkmgr, CLKMGR_CLK_ENABLES_CLK_USB_PERI_EN_BIT, kDifToggleDisabled));
+  }
+  if (disable & kPentestPeripheralIo) {
+    OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
+        &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_PERI_EN_BIT, kDifToggleDisabled));
+  }
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (disable & kPentestPeripheralKmac) {
+    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
+        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_KMAC_HINT_BIT, kDifToggleDisabled));
+  }
+  if (disable & kPentestPeripheralOtbn) {
+    OT_DISCARD(dif_clkmgr_hintable_clock_set_hint(
+        &clkmgr, CLKMGR_CLK_HINTS_CLK_MAIN_OTBN_HINT_BIT, kDifToggleDisabled));
+  }
+#endif
+}
+
+void pentest_init(
+    pentest_trigger_source_t trigger, pentest_peripherals_t peripheral_enable,
+    bool sensor_ctrl_enable,
+    bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS]) {
+  OT_DISCARD(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  pinmux_testutils_init(&pinmux);
+  pentest_init_uart();
+  pentest_init_gpio(trigger);
+  pentest_init_timer();
+  pentest_init_csrng();
+  pentest_init_edn();
+  pentest_init_sensor_ctrl();
+  sca_disable_peripherals(~peripheral_enable);
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  // Configure reset manager and enable alert crash dump capture.
+  OT_DISCARD(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+  CHECK_DIF_OK(dif_rstmgr_alert_info_set_enabled(&rstmgr, kDifToggleEnabled));
+
+  // Enable all sensor control AST alerts.
+  for (uint32_t k = 0; k < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS; k++) {
+    dif_result_t res = dif_sensor_ctrl_set_alert_en(
+        &sensor_ctrl, k, dif_bool_to_toggle(sensor_ctrl_enable));
+    if (res != kDifOk) {
+      LOG_INFO("Enabling/disabling alert %d in sensor control did not work", k);
+    }
+  }
+
+  // Make alerts fatal or recoverable.
+  for (uint32_t k = 0; k < SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS; k++) {
+    dif_result_t res = dif_sensor_ctrl_set_alert_fatal(
+        &sensor_ctrl, k, dif_bool_to_toggle(sensor_ctrl_en_fatal[k]));
+    if (res != kDifOk) {
+      LOG_INFO("Setting fatality of alert %d in sensor control did not work",
+               k);
+    }
+  }
+#endif
+}
+
+const dif_uart_t *pentest_get_uart(void) { return &uart1; }
+
+void pentest_select_trigger_type(pentest_trigger_type_t trigger_type) {
+  if (trigger_type == kPentestTriggerTypeHwGated) {
+    trigger_bit_index = kTriggerHwGateBitIndex;
+  } else if (trigger_type == kPentestTriggerTypeSw) {
+    trigger_bit_index = kTriggerSwBitIndex;
+  }
+}
+
+void pentest_set_trigger_high(void) {
+  OT_DISCARD(dif_gpio_write(&gpio, trigger_bit_index, true));
+}
+
+void pentest_set_trigger_low(void) {
+  OT_DISCARD(dif_gpio_write(&gpio, trigger_bit_index, false));
+}
+
+void pentest_call_and_sleep(sca_callee callee, uint32_t sleep_cycles,
+                            bool sw_trigger, bool otbn) {
+  // Disable the IO_DIV4_PERI clock to reduce noise during the actual capture.
+  // This also disables the UART(s) and GPIO modules required for
+  // communication with the scope. Therefore, it has to be re-enabled after
+  // the capture.
+  dif_clkmgr_t clkmgr;
+  OT_DISCARD(dif_clkmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
+
+  // Start timer to wake Ibex after the callee is done.
+  uint64_t current_time;
+  // Return values of below functions are ignored to improve capture
+  // performance.
+  OT_DISCARD(dif_rv_timer_counter_read(&timer, kRvTimerHart, &current_time));
+  OT_DISCARD(dif_rv_timer_arm(&timer, kRvTimerHart, kRvTimerComparator,
+                              current_time + sleep_cycles));
+  OT_DISCARD(dif_rv_timer_counter_set_enabled(&timer, kRvTimerHart,
+                                              kDifToggleEnabled));
+
+  if (sw_trigger) {
+    pentest_set_trigger_high();
+  }
+
+  callee();
+
+  wait_for_interrupt();
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (otbn) {
+    otbn_busy_wait_for_done();
+  }
+#endif
+
+  if (sw_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // Re-enable IO_DIV4_PERI clock to resume communication with the scope.
+  OT_DISCARD(dif_clkmgr_gateable_clock_set_enabled(
+      &clkmgr, CLKMGR_CLK_ENABLES_CLK_IO_DIV4_PERI_EN_BIT, kDifToggleEnabled));
+}
+
+static uint32_t sca_lfsr_state_masking = 0xdeadbeef;
+static uint32_t sca_lfsr_state_order = 0x99999999;
+
+void pentest_seed_lfsr(uint32_t seed, pentest_lfsr_context_t context) {
+  if (context == kPentestLfsrMasking) {
+    sca_lfsr_state_masking = seed;
+  }
+  if (context == kPentestLfsrOrder) {
+    sca_lfsr_state_order = seed;
+  }
+}
+
+uint32_t pentest_next_lfsr(uint16_t num_steps, pentest_lfsr_context_t context) {
+  uint32_t sca_lfsr_state;
+  if (context == kPentestLfsrMasking) {
+    sca_lfsr_state = sca_lfsr_state_masking;
+  }
+  if (context == kPentestLfsrOrder) {
+    sca_lfsr_state = sca_lfsr_state_order;
+  }
+  const uint32_t lfsr_out = sca_lfsr_state;
+  for (size_t i = 0; i < num_steps; ++i) {
+    bool lfsr_bit = sca_lfsr_state & 0x00000001;
+    sca_lfsr_state = sca_lfsr_state >> 1;
+    if (lfsr_bit) {
+      sca_lfsr_state ^= 0x80000057;
+    }
+  }
+  if (context == kPentestLfsrMasking) {
+    sca_lfsr_state_masking = sca_lfsr_state;
+  }
+  if (context == kPentestLfsrOrder) {
+    sca_lfsr_state_order = sca_lfsr_state;
+  }
+  return lfsr_out;
+}
+
+uint32_t pentest_linear_layer(uint32_t input) {
+  uint32_t output =
+      // output[7:0]
+      (((input >> 0) & 0x1) << 7) | (((input >> 6) & 0x1) << 6) |
+      (((input >> 11) & 0x1) << 5) | (((input >> 14) & 0x1) << 4) |
+      (((input >> 1) & 0x1) << 3) | (((input >> 7) & 0x1) << 2) |
+      (((input >> 10) & 0x1) << 1) | (((input >> 13) & 0x1) << 0) |
+      // output[15:8]
+      (((input >> 2) & 0x1) << 15) | (((input >> 4) & 0x1) << 14) |
+      (((input >> 9) & 0x1) << 13) | (((input >> 12) & 0x1) << 12) |
+      (((input >> 3) & 0x1) << 11) | (((input >> 5) & 0x1) << 10) |
+      (((input >> 8) & 0x1) << 9) | (((input >> 15) & 0x1) << 8) |
+      // output[23:16]
+      (((input >> 16) & 0x1) << 23) | (((input >> 22) & 0x1) << 22) |
+      (((input >> 27) & 0x1) << 21) | (((input >> 30) & 0x1) << 20) |
+      (((input >> 17) & 0x1) << 19) | (((input >> 23) & 0x1) << 18) |
+      (((input >> 26) & 0x1) << 17) | (((input >> 29) & 0x1) << 16) |
+      // output[31:24]
+      (((input >> 18) & 0x1) << 31) | (((input >> 20) & 0x1) << 30) |
+      (((input >> 25) & 0x1) << 29) | (((input >> 28) & 0x1) << 28) |
+      (((input >> 19) & 0x1) << 27) | (((input >> 21) & 0x1) << 26) |
+      (((input >> 24) & 0x1) << 25) | (((input >> 31) & 0x1) << 24);
+
+  return output;
+}
+
+uint32_t pentest_non_linear_layer(uint32_t input) {
+  uint32_t output;
+  if (input != 0) {
+    // Perform the AES S-Box look ups bytewise.
+    output = (uint32_t)(sbox[(input >> 24) & 0xFF] << 24) |
+             (uint32_t)(sbox[(input >> 16) & 0xFF] << 16) |
+             (uint32_t)(sbox[(input >> 8) & 0xFF] << 8) | sbox[input & 0xFF];
+  } else {
+    output = input;
+  }
+
+  return output;
+}
+
+status_t pentest_read_rstmgr_alert_info(ujson_t *uj) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  // Init the reset manager.
+  TRY(dif_rstmgr_init(mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR),
+                      &rstmgr));
+
+  // Read the reset reason from the reset manager.
+  dif_rstmgr_reset_info_bitfield_t rst_info;
+  rst_info = rstmgr_testutils_reason_get();
+  rstmgr_testutils_reason_clear();
+
+  // Read the alert dump information.
+  dif_rstmgr_alert_info_dump_segment_t dump[DIF_RSTMGR_ALERT_INFO_MAX_SIZE];
+  size_t seg_size;
+  alert_handler_testutils_info_t actual_info;
+  TRY(dif_rstmgr_alert_info_dump_read(
+      &rstmgr, dump, DIF_RSTMGR_ALERT_INFO_MAX_SIZE, &seg_size));
+  TRY(alert_handler_testutils_info_parse(dump, (int)seg_size, &actual_info));
+
+  // Transmit to host.
+  penetrationtest_alert_dump_t uj_output;
+  uj_output.rst_reason = rst_info;
+
+  // Clear the array.
+  memset(uj_output.alert_cause, 0, sizeof(uj_output.alert_cause));
+  memset(uj_output.class_accum_cnt, 0, sizeof(uj_output.class_accum_cnt));
+  memset(uj_output.class_esc_cnt, 0, sizeof(uj_output.class_esc_cnt));
+  memset(uj_output.class_esc_state, 0, sizeof(uj_output.class_esc_state));
+
+  // Copy the crash dump.
+  memcpy(uj_output.alert_cause, actual_info.alert_cause,
+         sizeof(uj_output.alert_cause));
+  uj_output.loc_alert_cause = actual_info.loc_alert_cause;
+  memcpy(uj_output.class_accum_cnt, actual_info.class_accum_cnt,
+         sizeof(uj_output.class_accum_cnt));
+  memcpy(uj_output.class_esc_cnt, actual_info.class_esc_cnt,
+         sizeof(uj_output.class_esc_cnt));
+  memcpy(uj_output.class_esc_state, actual_info.class_esc_state,
+         sizeof(uj_output.class_esc_state));
+
+  return RESP_OK(ujson_serialize_penetrationtest_alert_dump_t, uj, &uj_output);
+#else  // OT_PLATFORM_RV32
+  return OK_STATUS();
+#endif
+}
+
+/**
+ * Read out the owner's flash page.
+ */
+static status_t pentest_get_owner_flash(uint32_t *config_version,
+                                        uint32_t *sram_exec_mode,
+                                        uint32_t *ownership_key_alg,
+                                        uint32_t *update_mode,
+                                        uint32_t *min_security_version_bl0,
+                                        uint32_t *lock_constraint) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  TRY(flash_ctrl_info_read(&kFlashCtrlInfoPageOwnerSlot0, 0,
+                           sizeof(owner_page[0]) / sizeof(uint32_t),
+                           &owner_page[0]));
+  // Configuration version (monotonically increasing per owner).
+  *config_version = owner_page[0].config_version;
+  // SRAM execution configuration (DisabledLocked, Disabled, Enabled).
+  *sram_exec_mode = owner_page[0].sram_exec_mode;
+  // Ownership key algorithm (currently, only ECDSA is supported).
+  *ownership_key_alg = owner_page[0].ownership_key_alg;
+  // Ownership update mode (one of OPEN, SELF, NEWV).
+  *update_mode = owner_page[0].update_mode;
+  // Set the minimum security version to this value (UINT32_MAX: no change).
+  *min_security_version_bl0 = owner_page[0].min_security_version_bl0;
+  // The device ID locking constraint.
+  *lock_constraint = owner_page[0].lock_constraint;
+#else  // OT_PLATFORM_RV32
+  *config_version = 0;
+  *sram_exec_mode = 0;
+  *ownership_key_alg = 0;
+  *update_mode = 0;
+  *min_security_version_bl0 = 0;
+  *lock_constraint = 0;
+#endif
+
+  return OK_STATUS();
+}
+
+/**
+ * Return the boot_log data from retention RAM.
+ */
+static void pentest_get_boot_log(
+    uint32_t digest[], uint32_t *identifier, uint32_t *scm_revision_low,
+    uint32_t *scm_revision_high, uint32_t *rom_ext_slot,
+    uint32_t *rom_ext_major, uint32_t *rom_ext_minor, uint32_t *rom_ext_size,
+    uint32_t *bl0_slot, uint32_t *ownership_state,
+    uint32_t *ownership_transfers, uint32_t *rom_ext_min_sec_ver,
+    uint32_t *bl0_min_sec_ver, uint32_t *primary_bl0_slot,
+    uint32_t *retention_ram_initialized) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  boot_log_t boot_log = retention_sram_get()->creator.boot_log;
+  // Digest to indicate validity of the boot_log.
+  memcpy(digest, boot_log.digest.digest, 8 * sizeof(uint32_t));
+  // Identifier (`BLOG`).
+  *identifier = boot_log.identifier;
+  // Chip version (from the ROM).
+  *scm_revision_low = boot_log.chip_version.scm_revision_low;
+  *scm_revision_high = boot_log.chip_version.scm_revision_high;
+  // Which ROM_EXT slot booted (boot_slot_t).
+  *rom_ext_slot = boot_log.rom_ext_slot;
+  // ROM_EXT major version number.
+  *rom_ext_major = boot_log.rom_ext_major;
+  // ROM_EXT minor version number.
+  *rom_ext_minor = boot_log.rom_ext_minor;
+  // ROM_EXT size in flash.
+  *rom_ext_size = boot_log.rom_ext_size;
+  // Which BL0 slot booted (boot_slot_t).
+  *bl0_slot = boot_log.bl0_slot;
+  // Chip ownership state.
+  *ownership_state = boot_log.ownership_state;
+  // Number of ownership transfers this chip has had.
+  *ownership_transfers = boot_log.ownership_transfers;
+  // Minimum security version permitted for ROM_EXT payloads.
+  *rom_ext_min_sec_ver = boot_log.rom_ext_min_sec_ver;
+  // Minimum security version permitted for application payloads.
+  *bl0_min_sec_ver = boot_log.bl0_min_sec_ver;
+  // Primary BL0 slot.
+  *primary_bl0_slot = boot_log.primary_bl0_slot;
+  // Whether the RET-RAM was initialized on this boot (hardened_bool_t).
+  *retention_ram_initialized = boot_log.retention_ram_initialized;
+#else  // OT_PLATFORM_RV32
+  memcpy(digest, 0, 8 * sizeof(uint32_t));
+  *identifier = 0;
+  *scm_revision_low = 0;
+  *scm_revision_high = 0;
+  *rom_ext_slot = 0;
+  *rom_ext_major = 0;
+  *rom_ext_minor = 0;
+  *rom_ext_size = 0;
+  *bl0_slot = 0;
+  *ownership_state = 0;
+  *ownership_transfers = 0;
+  *rom_ext_min_sec_ver = 0;
+  *bl0_min_sec_ver = 0;
+  *primary_bl0_slot = 0;
+  *retention_ram_initialized = 0;
+#endif
+}
+
+/**
+ * Return the boot measurements shared between ROM and ROM_EXT boot stages.
+ */
+static void pentest_get_boot_measurements(uint32_t bl0[], uint32_t rom_ext[]) {
+#if !OT_IS_ENGLISH_BREAKFAST
+  // Digest of the BL0
+  memcpy(bl0, boot_measurements.bl0.data, 8 * sizeof(uint32_t));
+  // Digest of the ROM_EXT
+  memcpy(rom_ext, boot_measurements.rom_ext.data, 8 * sizeof(uint32_t));
+#else  // OT_PLATFORM_RV32
+  memcpy(bl0, 0, 8 * sizeof(uint32_t));
+  memcpy(rom_ext, 0, 8 * sizeof(uint32_t));
+#endif
+}
+
+status_t pentest_send_sku_config(ujson_t *uj) {
+  // Read the owner flash page and return to host.
+  penetrationtest_owner_page_t uj_output_flash;
+  pentest_get_owner_flash(
+      &uj_output_flash.config_version, &uj_output_flash.sram_exec_mode,
+      &uj_output_flash.ownership_key_alg, &uj_output_flash.update_mode,
+      &uj_output_flash.min_security_version_bl0,
+      &uj_output_flash.lock_constraint);
+  RESP_OK(ujson_serialize_penetrationtest_owner_page_t, uj, &uj_output_flash);
+
+  // Read the boot log and return to host.
+  penetrationtest_boot_log_t uj_output_boot_log;
+  pentest_get_boot_log(
+      uj_output_boot_log.digest, &uj_output_boot_log.identifier,
+      &uj_output_boot_log.scm_revision_low,
+      &uj_output_boot_log.scm_revision_high, &uj_output_boot_log.rom_ext_slot,
+      &uj_output_boot_log.rom_ext_major, &uj_output_boot_log.rom_ext_minor,
+      &uj_output_boot_log.rom_ext_size, &uj_output_boot_log.bl0_slot,
+      &uj_output_boot_log.ownership_state,
+      &uj_output_boot_log.ownership_transfers,
+      &uj_output_boot_log.rom_ext_min_sec_ver,
+      &uj_output_boot_log.bl0_min_sec_ver, &uj_output_boot_log.primary_bl0_slot,
+      &uj_output_boot_log.retention_ram_initialized);
+  RESP_OK(ujson_serialize_penetrationtest_boot_log_t, uj, &uj_output_boot_log);
+
+  // Read the boot measurements and return to host.
+  penetrationtest_boot_measurements_t uj_output_boot_measurements;
+  pentest_get_boot_measurements(uj_output_boot_measurements.bl0,
+                                uj_output_boot_measurements.rom_ext);
+  RESP_OK(ujson_serialize_penetrationtest_boot_measurements_t, uj,
+          &uj_output_boot_measurements);
+
+  // Send back string containing the pentest framework version.
+  RESP_OK(ujson_serialize_string, uj, PENTEST_VERSION);
+
+  return OK_STATUS();
+}
+
+static void wait_rnd_valid(void) {
+  while (true) {
+    uint32_t reg = abs_mmio_read32(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR +
+                                   RV_CORE_IBEX_RND_STATUS_REG_OFFSET);
+    if (bitfield_bit32_read(reg, RV_CORE_IBEX_RND_STATUS_RND_DATA_VALID_BIT)) {
+      return;
+    }
+  }
+}
+
+uint32_t pentest_ibex_rnd32_read(void) {
+  wait_rnd_valid();
+  return abs_mmio_read32(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR +
+                         RV_CORE_IBEX_RND_DATA_REG_OFFSET);
+}
diff --git a/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h b/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h
new file mode 100644
index 0000000000000..03e4c0b6b1f8a
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h
@@ -0,0 +1,577 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_PENTEST_LIB_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_PENTEST_LIB_H_
+
+#include "sw/device/lib/dif/dif_base.h"
+#include "sw/device/lib/dif/dif_uart.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/json/pentest_lib_commands.h"
+
+#include "alert_handler_regs.h"  // Generated.
+#include "sensor_ctrl_regs.h"    // Generated.
+
+static const char PENTEST_VERSION[16] = "PENTEST: v1.0.3";
+
+// NOP macros used in different FI tests.
+#define NOP1 "nop\n"
+#define NOP10 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1 NOP1
+#define NOP30 NOP10 NOP10 NOP10
+#define NOP100 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10 NOP10
+#define NOP1000 \
+  NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100 NOP100
+
+// Optimized (in terms of number of cycles) trigger high function.
+// Consists of:
+// - 10 NOPS to make sure that the previous code execution has finished
+// - Disassembled `dif_gpio_write(&gpio, kTriggerSwBitIndex, true)`
+// - 10 NOPS to give the trigger time to raise
+// Use with caution as the trigger pin index could change.
+#define PENTEST_ASM_TRIGGER_HIGH     \
+  asm volatile(NOP10);               \
+  asm volatile("lui a0, 0x1000;");   \
+  asm volatile("addi a0, a0, 256;"); \
+  asm volatile("lui a1, 0x40040;");  \
+  asm volatile("sw a0, 24(a1);");    \
+  asm volatile(NOP10);
+
+// Optimized (in terms of number of cycles) trigger low function.
+// Consists of:
+// - 10 NOPS to make sure that the previous code execution has finished
+// - Disassembled `dif_gpio_write(&gpio, kTriggerSwBitIndex, false)`
+// - 10 NOPS to give the trigger time to fall
+// Use with caution as the trigger pin index could change.
+#define PENTEST_ASM_TRIGGER_LOW     \
+  asm volatile(NOP10);              \
+  asm volatile("lui a0, 0x1000;");  \
+  asm volatile("lui a1, 0x40040;"); \
+  asm volatile("sw a0, 24(a1);");   \
+  asm volatile(NOP10);
+
+typedef struct pentest_registered_alerts {
+  uint32_t alerts[3];
+} pentest_registered_alerts_t;
+
+typedef struct pentest_sensor_alerts {
+  uint32_t alerts[2];
+} pentest_sensor_alerts_t;
+
+/**
+ * Trigger sources.
+ *
+ * The trigger signal for a peripheral is based on its clkmgr_aon_idle signal.
+ * These values must match the values in chiplevel.sv.tpl.
+ */
+typedef enum pentest_trigger_source {
+  /**
+   * Use AES for capture trigger.
+   *
+   * The trigger signal will go high 320 cycles after `dif_aes_trigger()` is
+   * called and remain high until the operation is complete.
+   */
+  kPentestTriggerSourceAes = 0,
+  /**
+   * Use HMAC for capture trigger.
+   */
+  kPentestTriggerSourceHmac = 1,
+  /**
+   * Use KMAC for capture trigger.
+   */
+  kPentestTriggerSourceKmac = 2,
+  /**
+   * Use OTBN for capture trigger.
+   */
+  kPentestTriggerSourceOtbn = 3,
+} pentest_trigger_source_t;
+
+/**
+ * Trigger type.
+ */
+typedef enum pentest_trigger_type {
+  /**
+   * Use the precise hardware capture trigger gateable by software. If selected,
+   * the actual capture trigger is generated based on the clkmgr_aon_idle signal
+   * of the peripheral corresponding to selected trigger source.
+   *
+   * Note that this is available on FPGA only.
+   */
+  kPentestTriggerTypeHwGated = 0,
+  /**
+   * Use the fully software controlled capture trigger. If selected, the
+   * configured trigger source is not relevant.
+   */
+  kPentestTriggerTypeSw = 1,
+} pentest_trigger_type_t;
+
+/**
+ * Trigger mask.
+ */
+typedef enum pentest_mask_type {
+  kPentestTrigger1 = 0x1,
+  kPentestTrigger2 = 0x2,
+  kPentestTrigger3 = 0x4,
+  kPentestTrigger4 = 0x8,
+  kPentestTrigger5 = 0x10,
+  kPentestTrigger6 = 0x20,
+  kPentestTrigger7 = 0x40,
+  kPentestTrigger8 = 0x80,
+} pentest_trigger_mask_t;
+
+/**
+ * Peripherals.
+ *
+ * Constants below are bitmasks that can be used to specify a set of
+ * peripherals.
+ *
+ * See also: `pentest_peripherals_t`.
+ */
+typedef enum pentest_peripheral {
+  /**
+   * EDN.
+   */
+  kPentestPeripheralEdn = 1 << 0,
+  /**
+   * CSRNG.
+   */
+  kPentestPeripheralCsrng = 1 << 1,
+  /**
+   * Entropy source.
+   */
+  kPentestPeripheralEntropy = 1 << 2,
+  /**
+   * AES.
+   */
+  kPentestPeripheralAes = 1 << 3,
+  /**
+   * HMAC.
+   */
+  kPentestPeripheralHmac = 1 << 4,
+  /**
+   * KMAC.
+   */
+  kPentestPeripheralKmac = 1 << 5,
+  /**
+   * OTBN.
+   */
+  kPentestPeripheralOtbn = 1 << 6,
+  /**
+   * Peripherals using the IO_DIV4_PERI clock (UART, GPIO, I2C, SPI Dev, ...)
+   */
+  kPentestPeripheralIoDiv4 = 1 << 7,
+  /**
+   * Peripherals using the IO_DIV2_PERI clock (SPI Host 1)
+   */
+  kPentestPeripheralIoDiv2 = 1 << 8,
+  /**
+   * USB.
+   */
+  kPentestPeripheralUsb = 1 << 9,
+  /**
+   * Peripherals using the IO_PERI clock (SPI Host 0)
+   */
+  kPentestPeripheralIo = 1 << 10,
+} pentest_peripheral_t;
+
+/**
+ * A set of peripherals.
+ *
+ * This type is used for specifying which peripherals should be enabled when
+ * calling `pentest_init()`. Remaining peripherals will be disabled to reduce
+ * noise during SCA.
+ *
+ * See also: `pentest_peripheral_t`, `pentest_init()`.
+ */
+typedef uint32_t pentest_peripherals_t;
+
+/**
+ * A set of contexts for SW LFSR
+ *
+ * This type is used for specifying the context of the LFSR, with each context
+ * corresponding to a different state variable
+ */
+typedef enum pentest_lfsr_context {
+  /**
+   * PRNG used for initial data sharing
+   */
+  kPentestLfsrMasking = 0,
+  /**
+   * PRNG used for determining the order of fixed and random measurements
+   */
+  kPentestLfsrOrder = 1,
+
+} pentest_lfsr_context_t;
+
+/**
+ * Configures the entropy complex for OTBN tests.
+ *
+ * Similar to entropy_testutils_auto_mode_init(), this function inits the
+ * entropy complex. However, in comparison to the function available in the
+ * testutils, this function maximizes the reseed intervall to 0xffffffff.
+ * This is necessary to guarantee a fixed trigger window for OTBN tests.
+ *
+ * @return OK or error.
+ */
+status_t pentest_configure_entropy_source_max_reseed_interval(void);
+
+/**
+ * Returns the registered alerts in the sensor controller.
+ *
+ * This function reads out the recov_alert and fatal_alert registers of the
+ * sensor controller. This controller collects the alerts of the AST.
+ *
+ * @return A struct containing which of the alerts were triggered during the
+ * test.
+ */
+pentest_sensor_alerts_t pentest_get_sensor_alerts(void);
+
+/**
+ * Clears the recoverable AST alerts in the sensor controller.
+ */
+void pentest_clear_sensor_recov_alerts(void);
+
+/**
+ * Returns the registered alerts.
+ *
+ * If a fault injection triggered an alert, this function returns the alert ID
+ * back to the host. Afterwards, the alert is cleared.
+ *
+ * @return A struct containing which of the alerts were triggered during the
+ * test.
+ */
+pentest_registered_alerts_t pentest_get_triggered_alerts(void);
+
+/**
+ * Configures the alert handler for FI.
+ *
+ * Set how each alert is handled and how the escalation will take place.
+ * The alert classes are set as 0 = A, 1 = B, 2 = C, and 3 = D. It is currently
+ * not possible to set an alert to the X (None) class. Escalation signals are
+ * mapped as 0 meaning Non-Maskable Interrupt (NMI), 1 meaning wipe secrets, 2
+ * meaning scrap state (turn off HW blocks), 3 meaning reset. When stting the
+ * signal to 4294967295, that signal is disabled. In this function it is not
+ * possible to set a single phase to multiple escalation signals. Accumulation
+ * threshold means after how many alerts the escalation starts. Recall that a
+ * recoverable alert just brings a single alert, and that a fatal alert
+ * increases this threshold with each cycle. Duration cycles indicate how many
+ * clock cycles each phase lasts.
+ *
+ * Note that this function only works if the alert handler is left unlocked.
+ *
+ * @param input_alert_classes The class for each of the 65 alerts.
+ * @param input_alert_en Enabling each alert.
+ * @param input_class_en Enable each class.
+ * @param accumulation_thresholds The threshold of alerts to start the first
+ * escalation phase for each class.
+ * @param signals How each phase is mapped to escalation signals.
+ * @param duration_cycles How many cycles each phase takes.
+ * @param ping_timeout How many cycles a timeout happens for pings between
+ * blocks.
+ */
+void pentest_configure_alert_handler(
+    uint32_t input_alert_classes[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool input_alert_en[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool input_class_en[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint16_t accumulation_thresholds[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t signals[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t duration_cycles[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t ping_timeout);
+
+/**
+ * Reads out the alert handler.
+ *
+ * The alert classes map 0 to class A, 1 to class B, 2 to class C, and 3 to
+ * class D. Please check
+ * opentitan/bazel-opentitan/hw/top_earlgrey/sw/autogen/top_earlgrey.c
+ * top_earlgrey_alert_peripheral_t top_earlgrey_alert_for_peripheral for what
+ * each alert is.
+ *
+ * @param alert_classes The mapping of each of the alerts to a class.
+ * @param enabled_alerts Checks which of the alerts are enabled.
+ * @param enabled_classes Checks whether the classes are enabled.
+ * @param accumulation_thresholds The accumulation threshold for each class.
+ * @param duration_cycles The duration of each escalation phase.
+ * @param escalation_signals_en Whether each escalation signal is enabled.
+ * @param escalation_signals_map How each escalation signal is mapped to the
+ * escalation phases.
+ * @return OK.
+ */
+status_t pentest_print_config_alert_handler(
+    uint32_t alert_classes[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool enabled_alerts[ALERT_HANDLER_PARAM_N_ALERTS],
+    bool enabled_classes[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t accumulation_thresholds[ALERT_HANDLER_PARAM_N_CLASSES],
+    uint32_t duration_cycles[ALERT_HANDLER_PARAM_N_PHASES],
+    bool escalation_signals_en[ALERT_HANDLER_PARAM_N_PHASES],
+    uint32_t escalation_signals_map[ALERT_HANDLER_PARAM_N_PHASES]);
+
+/**
+ * Return alert config back to host.
+ *
+ * This function reads out the fields of the alert handler and returns them
+ * back to the host over uJSON.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK.
+ */
+status_t pentest_send_alert_config(ujson_t *uj);
+
+/**
+ * Reads out the sensor control.
+ *
+ * sensor_ctrl_fatal returns true if the sensor is fatal and false if it is
+ * recoverable.
+ *
+ * @param sensor_ctrl_en Checks the enablement of the sensors.
+ * @param sensor_ctrl_fatal Checks the fatality of the sensors.
+ * @return OK.
+ */
+status_t pentest_print_config_sensor_ctrl(
+    bool sensor_ctrl_en[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS],
+    bool sensor_ctrl_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS]);
+
+/**
+ * Return sensor config back to host.
+ *
+ * This function reads out the fields of the sensor ctrl and returns them
+ * back to the host over uJSON.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK.
+ */
+status_t pentest_send_sensor_config(ujson_t *uj);
+
+/**
+ * Reads the device ID from the LC.
+ *
+ * Can be used to categorize different SCA and FI runs.
+ *
+ * @param device_id A buffer available to store the device id.
+ * @return OK or error.
+ */
+status_t pentest_read_device_id(uint32_t device_id[]);
+
+/**
+ * Reads the rom digest from the rom controller.
+ *
+ * Can be used to version the ROM.
+ *
+ * @param rom_digest A buffer available to store the rom digest.
+ * @return OK or error.
+ */
+status_t pentest_read_rom_digest(uint32_t rom_digest[]);
+
+/**
+ * Configures CPU for SCA and FI penetration tests.
+ *
+ * If disable_icache is True, this functions disables the instruction cache. If
+ * disable_icache is False, the instruction cache config remains at
+ * enabled/disabled based on the ROM configuration. This implies that the iCache
+ * could be disabled even though disable_icache is False.
+ *
+ * If disable_dummy_instr is True, this functions disables the dummy
+ * instructions. If disable_dummy_instr is False, the dummy instruction config
+ * remains at the original config that was set in the ROM. This implies that
+ * dummy instructions could disabled even though disable_dummy_instr is False.
+ *
+ * dummy_instr_count sets the number of dummy instructions per real instruction.
+ * This works via the following settings. Set to 0 for dummy instruction every 0
+ * - 4 real instructions. Set to 1 for dummy instruction every 0 - 8 real
+ * instructions. Set to 3 for dummy instruction every 0 - 16 real instructions.
+ * Set to 7 for dummy instruction every 0 - 32 real instructions.
+ *
+ * For enable_jittery_clock, the function first checks if the write protection
+ * for this register is enabled. Then, by setting enable_jittery_clock True or
+ * False, the jittery clock is enabled or disabled. When regwen is active, no
+ * change happens.
+ *
+ * For enable_sram_readback, the function first checks if the write protection
+ * for this register is enabled. Then, by setting enable_sram_readback True or
+ * False, the SRAM readback feature for the main and ret SRAM iss enabled or
+ * disabled. When regwen is active, no change happens.
+ *
+ *
+ * @param disable_icache Disable the instruction cache.
+ * @param disable_dummy_instr Disable the dummy instructions.
+ * @param dummy_instr_count Provide how often to add dummy instructions.
+ * @param enable_jittery_clock: Enable/disable the jittery clock.
+ * @param enable_sram_readback: Enable/disable the SRAM readback feature.
+ * @param clock_jitter_locked: Jittery clock register is locked.
+ * @param clock_jitter_en: Jittery clock feature is enabled.
+ * @param sram_main_readback_locked: SRAM main readback register is locked.
+ * @param sram_ret_readback_locked: SRAM ret readback register is locked.
+ * @param sram_main_readback_en: SRAM main readback feature is enabled.
+ * @param sram_ret_readback_en: SRAM ret readback feature is enabled.
+ * @return OK or error.
+ */
+status_t pentest_configure_cpu(
+    bool enable_icache, bool *icache_en, bool enable_dummy_instr,
+    bool *dummy_instr_en, uint32_t dummy_instr_count, bool enable_jittery_clock,
+    bool enable_sram_readback, bool *clock_jitter_locked, bool *clock_jitter_en,
+    bool *sram_main_readback_locked, bool *sram_ret_readback_locked,
+    bool *sram_main_readback_en, bool *sram_ret_readback_en,
+    bool enable_data_ind_timing, bool *data_ind_timing_en);
+
+/**
+ * Initializes the peripherals (pinmux, uart, gpio, and timer) used by SCA code
+ * and sets the sensor control module.
+ *
+ * @param trigger Peripheral to use for the trigger signal.
+ * @param peripheral_enable Set of peripherals to enable. Remaining peripherals
+ * will be disabled to reduce noise during SCA.
+ * @param sensor_ctrl_enable Set the sensor control's alerts to enabled or
+ * disabled.
+ * @param sensor_ctrl_en_fatal Set the sensor control's alerts to fatal (true)
+ * or recoverable (false).
+ */
+void pentest_init(
+    pentest_trigger_source_t trigger, pentest_peripherals_t peripheral_enable,
+    bool sensor_ctrl_enable,
+    bool sensor_ctrl_en_fatal[SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS]);
+
+/**
+ * Returns a handle to the intialized UART device.
+ *
+ * @return Handle to the initialized UART device.
+ */
+const dif_uart_t *pentest_get_uart(void);
+
+/**
+ * Select the capture trigger type.
+ *
+ * @param trigger_type The trigger type to select.
+ */
+void pentest_select_trigger_type(pentest_trigger_type_t trigger_type);
+
+/**
+ * Sets capture trigger high.
+ *
+ * The actual trigger signal used for capture is a combination (logical AND) of:
+ * - the trigger gate enabled here, and
+ * - the busy signal of the peripheral of interest.
+ */
+void pentest_set_trigger_high(void);
+
+/**
+ * Sets capture trigger low.
+ */
+void pentest_set_trigger_low(void);
+
+/**
+ * Functions called by `pentest_call_and_sleep()` must conform to this
+ * prototype.
+ */
+typedef void (*sca_callee)(void);
+
+/**
+ * Calls the given function and puts Ibex to sleep.
+ *
+ * This function can be used to minimize noise while capturing power traces for
+ * side-channel attacks, in which case `callee` would trigger the operation of
+ * interest, typically a crypto operation, on the target device.
+ *
+ * @param callee Function to call before putting Ibex to sleep.
+ * @param sleep_cycles Number of cycles to sleep.
+ * @param sw_trigger Raise trigger before calling the target function.
+ * @param otbn Wait until OTBN execution has finished. Not supported in
+ * ENGLISH_BREAKFAST.
+ */
+void pentest_call_and_sleep(sca_callee callee, uint32_t sleep_cycles,
+                            bool sw_trigger, bool otbn);
+
+/**
+ * Seeds the software LFSR usable e.g. for key masking.
+ *
+ * This functions seeds the Galois XOR type LFSR with the provided seed value.
+ * Note that the LFSR itself has very low diffusion.
+ *
+ * @param seed The new seed value.
+ * @param context Specifies which LFSR to seed.
+ */
+void pentest_seed_lfsr(uint32_t seed, pentest_lfsr_context_t context);
+
+/**
+ * Steps the software LFSR usable e.g. for key masking `num_steps` times.
+ *
+ * This function steps the Galois XOR type LFSR n times. Note that the LFSR
+ * itself has very low diffusion. To improve the statistical properties, the
+ * multiple steps can be run. For example, by running 32 steps it can be
+ * ensured that each state bit depends on at least two previous state bits.
+ *
+ * @param num_steps The number of steps to run.
+ * @param context Specifies which LFSR to run.
+
+ * @return The current state of the LFSR.
+ */
+uint32_t pentest_next_lfsr(uint16_t num_steps, pentest_lfsr_context_t context);
+
+/**
+ * Applies a linear layer.
+ *
+ * This function feeds the input through a linear permutation layer. This is
+ * suitable to ensure 1) that adjacent output bits of the software LFSR do not
+ * go into the same S-Box (see `pentest_non_linear_layer()`) and 2) that the
+ * output of S-Box(n) is not always going to be equal to the output of
+ * S-Box(n+1) in the subsequent cycle. For details on how this can be achieved,
+ * refer to the corresponding hardware implementation in
+ * hw/ip/prim/rtl/prim_lfsr.sv.
+ *
+ * @param input The input value.
+ *
+ * @return The output of the linear layer.
+ *
+ */
+uint32_t pentest_linear_layer(uint32_t input);
+
+/**
+ * Applies a non-linear layer.
+ *
+ * This function feeds the input through a non-linear layer. It is suitable to
+ * improve the statistical properties of the software LFSR usable for key
+ * masking, see `pentest_seed_lfsr()` and `pentest_next_lfsr()`. Internally, a
+ * LUT-based AES S-Box is applied to the invididual bytes of the input word.
+ *
+ * In addition, the ouput bytes are XORed with the sbox[0]. This is useful to
+ * ensure an all-zero seed (used to switch off key masking) also results in an
+ * all-zero output of the non-linear layer.
+ *
+ * @param input The input value.
+ *
+ * @return The output of the non-linear layer.
+ *
+ */
+uint32_t pentest_non_linear_layer(uint32_t input);
+
+/**
+ * Read alert information.
+ *
+ * This function reads the reset reason from the reason manager as well as the
+ * crash dump from the reset manager. Note that on a POR this information is NOT
+ * saved within the reset manager.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t pentest_read_rstmgr_alert_info(ujson_t *uj);
+
+/**
+ * Return SKU config back to host.
+ *
+ * This function reads out different config fields of the SKU and returns them
+ * back to the host over uJSON.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t pentest_send_sku_config(ujson_t *uj);
+
+/**
+ * Read the Ibex RND register.
+ *
+ * Blocks until data is available in the Ibex RND register. Rnd data comes from
+ * the EDN.
+ */
+uint32_t pentest_ibex_rnd32_read(void);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_PENTEST_LIB_H_
diff --git a/sw/device/tests/penetrationtests/firmware/lib/sca_lib.c b/sw/device/tests/penetrationtests/firmware/lib/sca_lib.c
deleted file mode 100644
index 527225b0ebe94..0000000000000
--- a/sw/device/tests/penetrationtests/firmware/lib/sca_lib.c
+++ /dev/null
@@ -1,27 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/csr.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-/**
- * Configures Ibex for SCA and FI.
- *
- * This function disables the iCache and the dummy instructions using the
- * CPU Control and Status Register (cpuctrlsts).
- *
- */
-void sca_configure_cpu(void) {
-  uint32_t cpuctrl_csr;
-  // Get current config.
-  CSR_READ(CSR_REG_CPUCTRL, &cpuctrl_csr);
-  // Disable the iCache.
-  cpuctrl_csr = bitfield_field32_write(
-      cpuctrl_csr, (bitfield_field32_t){.mask = 0x1, .index = 0}, 0);
-  // Disable dummy instructions.
-  cpuctrl_csr = bitfield_field32_write(
-      cpuctrl_csr, (bitfield_field32_t){.mask = 0x1, .index = 2}, 0);
-  // Write back config.
-  CSR_WRITE(CSR_REG_CPUCTRL, cpuctrl_csr);
-}
diff --git a/sw/device/tests/penetrationtests/firmware/lib/sca_lib.h b/sw/device/tests/penetrationtests/firmware/lib/sca_lib.h
deleted file mode 100644
index 886f2f0fa6dd9..0000000000000
--- a/sw/device/tests/penetrationtests/firmware/lib/sca_lib.h
+++ /dev/null
@@ -1,10 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_SCA_LIB_H_
-#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_SCA_LIB_H_
-
-void sca_configure_cpu(void);
-
-#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_LIB_SCA_LIB_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/BUILD b/sw/device/tests/penetrationtests/firmware/sca/BUILD
index 936dfd0a70e5a..bb9fb26f17f8e 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/BUILD
+++ b/sw/device/tests/penetrationtests/firmware/sca/BUILD
@@ -18,9 +18,144 @@ cc_library(
         "//sw/device/lib/ujson",
         "//sw/device/sca/lib:aes",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
-        "//sw/device/tests/penetrationtests/firmware/lib:sca_lib",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/device/tests/penetrationtests/json:aes_sca_commands",
+        "//sw/device/tests/penetrationtests/json:commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_sca_sym",
+    srcs = ["cryptolib_sca_sym.c"],
+    hdrs = ["cryptolib_sca_sym.h"],
+    deps = [
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_sym_impl",
+        "//sw/device/tests/penetrationtests/json:cryptolib_sca_sym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_sca_asym",
+    srcs = ["cryptolib_sca_asym.c"],
+    hdrs = ["cryptolib_sca_asym.h"],
+    deps = [
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_asym_impl",
+        "//sw/device/tests/penetrationtests/json:cryptolib_sca_asym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_sca_asym_impl",
+    srcs = ["cryptolib_sca_asym_impl.c"],
+    hdrs = [
+        "cryptolib_sca_asym_impl.h",
+        "//sw/device/tests/penetrationtests/firmware/lib:cryptolib_asym.h",
+    ],
+    deps = [
+        "//sw/device/lib/base:math",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/impl:ecc_p256",
+        "//sw/device/lib/crypto/impl:ecc_p384",
+        "//sw/device/lib/crypto/impl:integrity",
+        "//sw/device/lib/crypto/impl:key_transport",
+        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:rsa",
+        "//sw/device/lib/crypto/impl:sha2",
+        "//sw/device/lib/crypto/include:crypto_hdrs",
+        "//sw/device/lib/crypto/include:datatypes",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:check",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_sca_asym_commands",
+    ],
+)
+
+cc_library(
+    name = "cryptolib_sca_sym_impl",
+    srcs = ["cryptolib_sca_sym_impl.c"],
+    hdrs = [
+        "cryptolib_sca_sym_impl.h",
+        "//sw/device/tests/penetrationtests/firmware/lib:cryptolib_sym.h",
+    ],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/impl:aes",
+        "//sw/device/lib/crypto/impl:aes_gcm",
+        "//sw/device/lib/crypto/impl:drbg",
+        "//sw/device/lib/crypto/impl:hmac",
+        "//sw/device/lib/crypto/impl:integrity",
+        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/include:crypto_hdrs",
+        "//sw/device/lib/crypto/include:datatypes",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:cryptolib_sca_sym_commands",
+    ],
+)
+
+cc_library(
+    name = "ecc256_keygen_sca",
+    srcs = ["ecc256_keygen_sca.c"],
+    hdrs = ["ecc256_keygen_sca.h"],
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/base:abs_mmio",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/crypto/drivers:otbn",
+        "//sw/device/lib/runtime:ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:otbn_sca_commands",
+        "//sw/otbn/crypto:p256_key_from_seed_sca",
+    ],
+)
+
+cc_library(
+    name = "edn_sca",
+    srcs = ["edn_sca.c"],
+    hdrs = ["edn_sca.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:csrng",
+        "//sw/device/lib/dif:csrng_shared",
+        "//sw/device/lib/dif:edn",
+        "//sw/device/lib/dif:entropy_src",
+        "//sw/device/lib/dif:rv_core_ibex",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:entropy_testutils",
+        "//sw/device/lib/testing:rv_core_ibex_testutils",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:edn_sca_commands",
     ],
 )
 
@@ -42,21 +177,42 @@ cc_library(
     ],
 )
 
+cc_library(
+    name = "hmac_sca",
+    srcs = ["hmac_sca.c"],
+    hdrs = ["hmac_sca.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:hmac_testutils",
+        "//sw/device/lib/testing/test_framework:ujson_ottf",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:hmac_sca_commands",
+    ],
+)
+
 cc_library(
     name = "ibex_sca",
     srcs = ["ibex_sca.c"],
     hdrs = ["ibex_sca.h"],
     deps = [
+        ":ecc256_keygen_sca",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/dif:aes",
         "//sw/device/lib/dif:keymgr",
         "//sw/device/lib/dif:kmac",
+        "//sw/device/lib/dif:otbn",
         "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:hmac_testutils",
         "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-        "//sw/device/sca/lib:sca",
-        "//sw/device/tests/penetrationtests/firmware/lib:sca_lib",
+        "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/device/tests/penetrationtests/json:ibex_sca_commands",
     ],
 )
@@ -73,23 +229,49 @@ cc_library(
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
-        "//sw/device/tests/penetrationtests/firmware/lib:sca_lib",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:commands",
         "//sw/device/tests/penetrationtests/json:kmac_sca_commands",
     ],
 )
 
 cc_library(
-    name = "prng_sca",
-    srcs = ["prng_sca.c"],
-    hdrs = ["prng_sca.h"],
+    name = "otbn_sca",
+    srcs = ["otbn_sca.c"],
+    hdrs = ["otbn_sca.h"],
     deps = [
+        ":ecc256_keygen_sca",
         "//sw/device/lib/base:memory",
         "//sw/device/lib/base:status",
+        "//sw/device/lib/crypto/drivers:keymgr",
+        "//sw/device/lib/crypto/impl:keyblob",
+        "//sw/device/lib/crypto/impl:status",
+        "//sw/device/lib/dif:otbn",
         "//sw/device/lib/runtime:log",
+        "//sw/device/lib/testing:keymgr_testutils",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
         "//sw/device/sca/lib:prng",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/firmware/sca/otbn:otbn_insn_carry_flag",
+        "//sw/device/tests/penetrationtests/firmware/sca/otbn:otbn_insn_combi_ops",
+        "//sw/device/tests/penetrationtests/firmware/sca/otbn:otbn_key_sideload_sca",
+        "//sw/device/tests/penetrationtests/json:otbn_sca_commands",
+        "//sw/otbn/crypto:p256_ecdsa_sca",
+        "//sw/otbn/crypto:run_rsa",
+    ],
+)
+
+cc_library(
+    name = "prng_sca",
+    srcs = ["rng_sca.c"],
+    hdrs = ["rng_sca.h"],
+    deps = [
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:status",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/ujson",
+        "//sw/device/sca/lib:prng",
         "//sw/device/tests/penetrationtests/json:prng_sca_commands",
     ],
 )
@@ -106,8 +288,8 @@ cc_library(
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
         "//sw/device/sca/lib:prng",
-        "//sw/device/sca/lib:sca",
-        "//sw/device/tests/penetrationtests/firmware/lib:sca_lib",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+        "//sw/device/tests/penetrationtests/json:commands",
         "//sw/device/tests/penetrationtests/json:sha3_sca_commands",
     ],
 )
@@ -122,7 +304,7 @@ cc_library(
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing/test_framework:ujson_ottf",
         "//sw/device/lib/ujson",
-        "//sw/device/sca/lib:sca",
+        "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
         "//sw/device/tests/penetrationtests/json:trigger_sca_commands",
     ],
 )
diff --git a/sw/device/tests/penetrationtests/firmware/sca/aes_sca.c b/sw/device/tests/penetrationtests/firmware/sca/aes_sca.c
index af272c3d26130..ae72469ea8801 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/aes_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/sca/aes_sca.c
@@ -13,9 +13,9 @@
 #include "sw/device/lib/ujson/ujson.h"
 #include "sw/device/sca/lib/aes.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
-#include "sw/device/tests/penetrationtests/firmware/lib/sca_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 #include "sw/device/tests/penetrationtests/json/aes_sca_commands.h"
+#include "sw/device/tests/penetrationtests/json/commands.h"
 
 #if !OT_IS_ENGLISH_BREAKFAST
 #include "sw/device/lib/testing/aes_testutils.h"
@@ -32,6 +32,7 @@ enum {
   kAesKeyLengthMax = 32,
   kAesKeyLength = 16,
   kAesTextLength = 16,
+  kTestTimeout = (1000 * 1000),
   /**
    * Number of cycles (at `kClockFreqCpuHz`) that Ibex should sleep to minimize
    * noise during AES operations. Caution: This number should be chosen to
@@ -51,89 +52,8 @@ enum {
    * kBytes).
    */
   kNumBatchOpsMax = 256,
-  /**
-   * Max number of encryptions that can be captured before we rewrite the key to
-   * reset the internal block counter. Otherwise, the AES peripheral might
-   * trigger the reseeding of the internal masking PRNG which disturbs SCA
-   * measurements.
-   */
-  kBlockCtrMax = 8191,
 };
 
-/**
- * An array of keys to be used in a batch.
- */
-uint8_t batch_keys[kNumBatchOpsMax][kAesKeyLength];
-
-/**
- * An array of plaintexts to be used in a batch.
- */
-uint8_t batch_plaintexts[kNumBatchOpsMax][kAesTextLength];
-
-/**
- * Key selection between fixed and random key during the batch capture.
- */
-bool sample_fixed = true;
-
-/**
- * An array to store pre-computed round keys derived from the generation key.
- * The generation key (key_gen) is specified in [DTR] Section 5.1.
- * This key is used for generating all pseudo-random data for batch captures.
- * kKeyGen[kAesKeyLength] = {0x12, 0x34, 0x56, 0x78,
- *                           0x9a, 0xbc, 0xde, 0xf1,
- *                           0x23, 0x45, 0x67, 0x89,
- *                           0xab, 0xcd, 0xe0, 0xf0};
- */
-static const uint32_t kKeyGenRoundKeys[(kAesKeyLength / 4) * 11] = {
-    0xab239a12, 0xcd45bc34, 0xe067de56, 0xf089f178, 0xbc1734ae, 0xe12c69d5,
-    0x836304da, 0x9262eb1a, 0xcb776054, 0x9d7c5039, 0x71f29195, 0x64f6947f,
-    0xd2196e0e, 0x2bb6ca9a, 0xc4b547d6, 0x6602f460, 0x528099f7, 0xd1fa4c86,
-    0xd317a2e5, 0x452321d5, 0x92c040d9, 0x8756ace0, 0xed3e298b, 0x92d7f4d5,
-    0xfc6eaeee, 0xc84f19b5, 0x3ed3edc4, 0x2bb96e9a, 0x7a86e846, 0x99511e07,
-    0x350bd835, 0xd6fd442a, 0x3c46c028, 0x47de8f91, 0x25101bc3, 0x9f49b4f0,
-    0x29155393, 0xb8ff21ae, 0x36130318, 0x79e6af1b, 0xa68f9ac9, 0xcd758aab,
-    0x88beadae, 0x8ef711be};
-
-/**
- * Plaintext of the fixed set of fixed-vs-random-key TVLA
- */
-static uint8_t plaintext_fixed[kAesTextLength] = {
-    0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-    0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa};
-/**
- * Key of the of the fixed set of fixed-vs-random-key TVLA
- */
-static uint8_t key_fixed[kAesTextLength] = {0x81, 0x1E, 0x37, 0x31, 0xB0, 0x12,
-                                            0x0A, 0x78, 0x42, 0x78, 0x1E, 0x22,
-                                            0xB2, 0x5C, 0xDD, 0xF9};
-/**
- * Plaintext of the random set of fixed-vs-random-key TVLA
- */
-static uint8_t plaintext_random[kAesTextLength] = {
-    0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc,
-    0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc};
-/**
- * Key of the random set of fixed-vs-random-key TVLA
- */
-static uint8_t key_random[kAesTextLength] = {0x53, 0x53, 0x53, 0x53, 0x53, 0x53,
-                                             0x53, 0x53, 0x53, 0x53, 0x53, 0x53,
-                                             0x53, 0x53, 0x53, 0x53};
-/**
- * Temp ciphertext variable
- */
-static uint8_t ciphertext_temp[kAesTextLength];
-
-/**
- * batch_plaintext for batch capture to initially set it using command.
- */
-static uint8_t batch_plaintext[kAesTextLength];
-
-/**
- * Block counter variable for manually handling reseeding operations of the
- * masking PRNG inside the AES peripheral.
- */
-static uint32_t block_ctr;
-
 static dif_aes_t aes;
 
 dif_aes_transaction_t transaction = {
@@ -148,6 +68,28 @@ dif_aes_transaction_t transaction = {
     .ctrl_aux_lock = false,
 };
 
+/**
+ * Load fixed seed into AES.
+ *
+ * Before calling this function, use
+ * aes_testutils_masking_prng_zero_output_seed() to initialize the entropy
+ * complex for performing AES SCA measurements with masking switched off. This
+ * function then loads the fixed seed into the AES, allowing the disable the
+ * masking.
+ *
+ * @param key Key.
+ * @param key_len Key length.
+ */
+static status_t aes_sca_load_fixed_seed(void) {
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
+  // Load magic seed such that masking is turned off. We need to do this after
+  // dif_aes_start() as then the force_masks is correctly set.
+  TRY(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
+
+  return OK_STATUS();
+}
+
 /**
  * Mask and configure key.
  *
@@ -159,30 +101,34 @@ dif_aes_transaction_t transaction = {
  * @param key Key.
  * @param key_len Key length.
  */
-static aes_sca_error_t aes_key_mask_and_config(const uint8_t *key,
-                                               size_t key_len) {
+static status_t aes_key_mask_and_config(const uint8_t *key, size_t key_len) {
   if (key_len != kAesKeyLength) {
-    return aesScaOutOfRange;
+    return ABORTED();
   }
   dif_aes_key_share_t key_shares;
   // Mask the provided key.
   for (int i = 0; i < key_len / 4; ++i) {
-    key_shares.share1[i] = sca_non_linear_layer(
-        sca_linear_layer(sca_next_lfsr(1, kScaLfsrMasking)));
+    key_shares.share1[i] = pentest_non_linear_layer(
+        pentest_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking)));
     key_shares.share0[i] = *((uint32_t *)key + i) ^ key_shares.share1[i];
   }
   // Provide random shares for unused key bits.
   for (size_t i = key_len / 4; i < kAesKeyLengthMax / 4; ++i) {
     key_shares.share1[i] =
-        sca_non_linear_layer(sca_next_lfsr(1, kScaLfsrMasking));
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
     key_shares.share0[i] =
-        sca_non_linear_layer(sca_next_lfsr(1, kScaLfsrMasking));
+        pentest_non_linear_layer(pentest_next_lfsr(1, kPentestLfsrMasking));
   }
-  if (dif_aes_start(&aes, &transaction, &key_shares, NULL) != kDifOk) {
-    return aesScaAborted;
+  TRY(dif_aes_start(&aes, &transaction, &key_shares, NULL));
+
+#if !OT_IS_ENGLISH_BREAKFAST
+  if (transaction.force_masks) {
+    // Disable masking. Force the masking PRNG output value to 0.
+    TRY(aes_sca_load_fixed_seed());
   }
+#endif
 
-  return aesScaOk;
+  return OK_STATUS();
 }
 
 /**
@@ -192,71 +138,45 @@ static void aes_manual_trigger(void) {
   (void)dif_aes_trigger(&aes, kDifAesTriggerStart);
 }
 
-/**
- * Key set command handler.
- *
- * This command is designed to set the fixed_key variable and in addition also
- * configures the key into the AES peripheral.
- *
- * The key must be `kAesKeyLength` bytes long.
- *
- * The uJSON data contains:
- *  - key: The key to use.
- *  - key_length: The length of the key.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_key_set(ujson_t *uj) {
-  cryptotest_aes_sca_key_t uj_key_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_key_t(uj, &uj_key_data));
-
-  memcpy(key_fixed, uj_key_data.key, uj_key_data.key_length);
-  block_ctr = 0;
-  if (aes_key_mask_and_config(key_fixed, uj_key_data.key_length) != aesScaOk) {
-    return ABORTED();
-  }
-  return OK_STATUS(0);
-}
-
 /**
  * Encrypts a plaintext using the AES peripheral.
  *
- * This function uses `sca_call_and_sleep()` from the sca library to put Ibex
- * to sleep in order to minimize noise during captures. The plaintext must be
- * `kAesTextLength` bytes long.
+ * This function uses `pentest_call_and_sleep()` from the pentest library to put
+ * Ibex to sleep in order to minimize noise during captures. The plaintext must
+ * be `kAesTextLength` bytes long.
  *
  * @param plaintext Plaintext.
  * @param plaintext_len Length of the plaintext.
  */
-static aes_sca_error_t aes_encrypt(const uint8_t *plaintext,
-                                   size_t plaintext_len) {
+static status_t aes_encrypt(const uint8_t *plaintext, size_t plaintext_len) {
   bool ready = false;
   do {
-    if (dif_aes_get_status(&aes, kDifAesStatusInputReady, &ready) != kDifOk) {
-      return aesScaAborted;
-    }
+    TRY(dif_aes_get_status(&aes, kDifAesStatusInputReady, &ready));
   } while (!ready);
 
   dif_aes_data_t data;
   if (plaintext_len != sizeof(data.data)) {
-    return aesScaOutOfRange;
+    return ABORTED();
   }
   memcpy(data.data, plaintext, plaintext_len);
-  if (dif_aes_load_data(&aes, data)) {
-    return aesScaAborted;
-  }
+  TRY(dif_aes_load_data(&aes, data));
 
   // Start AES operation (this triggers the capture) and go to sleep.
   if (fpga_mode) {
-    // On the FPGA, the AES block automatically sets and unsets the trigger.
-    sca_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, false);
+    // On FPGA, the trigger is AND-ed with AES !IDLE and creates a LO-HI-LO per.
+    // Activate the GPIO by setting the GPIO.
+    pentest_set_trigger_high();
+    pentest_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, false,
+                           false);
+    pentest_set_trigger_low();
   } else {
     // On the chip, we need to manually set and unset the trigger. This is done
     // in this function to have the trigger as close as possible to the AES
     // operation.
-    sca_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, true);
+    pentest_call_and_sleep(aes_manual_trigger, kIbexAesSleepCycles, true,
+                           false);
   }
-  return aesScaOk;
+  return OK_STATUS();
 }
 
 /**
@@ -265,7 +185,7 @@ static aes_sca_error_t aes_encrypt(const uint8_t *plaintext,
  *
  * @param only_first_word Send only the first word of the ciphertext.
  */
-static status_t aes_send_ciphertext(bool only_first_word, ujson_t *uj) {
+static status_t aes_send_ciphertext(ujson_t *uj) {
   bool ready = false;
   do {
     TRY(dif_aes_get_status(&aes, kDifAesStatusOutputValid, &ready));
@@ -276,215 +196,34 @@ static status_t aes_send_ciphertext(bool only_first_word, ujson_t *uj) {
     return OUT_OF_RANGE();
   }
 
-  cryptotest_aes_sca_ciphertext_t uj_output;
-  memset(uj_output.ciphertext, 0, AESSCA_CMD_MAX_DATA_BYTES);
+  aes_sca_ciphertext_t uj_output;
+  memset(uj_output.ciphertext, 0, kAesTextLength);
   uj_output.ciphertext_length = kAesTextLength;
-  if (only_first_word) {
-    uj_output.ciphertext_length = 4;
-  }
   memcpy(uj_output.ciphertext, (uint8_t *)ciphertext.data,
          uj_output.ciphertext_length);
-  RESP_OK(ujson_serialize_cryptotest_aes_sca_ciphertext_t, uj, &uj_output);
-  return OK_STATUS(0);
-}
-
-/**
- * Single encrypt command handler.
- *
- * Encrypts a `kAesTextLength` bytes long plaintext using the AES peripheral and
- * sends the ciphertext over UART. This function also handles the trigger
- * signal.
- *
- * The uJSON data contains:
- *  - text: The plaintext.
- *  - text_length: The length of the plaintext.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_single_encrypt(ujson_t *uj) {
-  cryptotest_aes_sca_text_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_text_t(uj, &uj_data));
-  if (uj_data.text_length != kAesTextLength) {
-    return OUT_OF_RANGE();
-  }
-
-  block_ctr++;
-  // Rewrite the key to reset the internal block counter. Otherwise, the AES
-  // peripheral might trigger the reseeding of the internal masking PRNG which
-  // disturbs SCA measurements.
-  if (block_ctr > kBlockCtrMax) {
-    if (aes_key_mask_and_config(key_fixed, kAesKeyLength) != aesScaOk) {
-      return ABORTED();
-    }
-    block_ctr = 1;
-  }
-
-  if (fpga_mode) {
-    sca_set_trigger_high();
-  }
-  if (aes_encrypt(uj_data.text, uj_data.text_length) != aesScaOk) {
-    return ABORTED();
-  }
-  if (fpga_mode) {
-    sca_set_trigger_low();
-  }
-
-  TRY(aes_send_ciphertext(false, uj));
-  return OK_STATUS(0);
+  RESP_OK(ujson_serialize_aes_sca_ciphertext_t, uj, &uj_output);
+  return OK_STATUS();
 }
 
-/**
- * Advances data for fvsr-key TVLA - fixed set.
- *
- * This function updates plaintext_fixed for fvsr-key TVLA, according
- * to DTR recommendations.
- */
-static void aes_serial_advance_fixed(void) {
-  aes_sw_encrypt_block(plaintext_fixed, kKeyGenRoundKeys, ciphertext_temp);
-  memcpy(plaintext_fixed, ciphertext_temp, kAesTextLength);
-}
-
-/**
- * Advances data for fvsr-key TVLA - random set.
- *
- * This function updates plaintext_random and key_random for fvsr-key and
- * random TVLA, according to DTR recommendations.
- */
-static void aes_serial_advance_random(void) {
-  aes_sw_encrypt_block(plaintext_random, kKeyGenRoundKeys, ciphertext_temp);
-  memcpy(plaintext_random, ciphertext_temp, kAesTextLength);
-  aes_sw_encrypt_block(key_random, kKeyGenRoundKeys, ciphertext_temp);
-  memcpy(key_random, ciphertext_temp, kAesTextLength);
-}
-
-/**
- * Advances data for fvsr-data TVLA - random set.
- *
- * This function updates plaintext_random for fvsr-data and
- * TVLA, according to DTR recommendations, Section 5.1.
- */
-static void aes_serial_advance_random_data(void) {
-  aes_sw_encrypt_block(plaintext_random, kKeyGenRoundKeys, ciphertext_temp);
-  memcpy(plaintext_random, ciphertext_temp, kAesTextLength);
-}
-
-/**
- * Batch encrypt command handler.
- *
- * This command is designed to maximize the capture rate for side-channel
- * attacks. Instead of expecting a plaintext and sending the resulting
- * ciphertext from and to the host for each encryption, this command repeatedly
- * encrypts random plaintexts that are generated on the device. This minimizes
- * the overhead of UART communication and significantly improves the capture
- * rate. The host must use the same PRNG to be able to compute the plaintext and
- * the ciphertext of each trace.
- *
- * Packet payload must be a `uint32_t` representation of the number of
- * encryptions to perform. Since generated plaintexts are not cached, there is
- * no limit on the number of encryptions.
- *
- * The PRNG should be initialized using the seed PRNG command before
- * starting batch encryption. In addition, the key should also be set
- * using key set command before starting batch captures.
- *
- * Note that the host can partially verify this operation by checking the
- * contents of UART reponse that is sent at the end.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_batch_encrypt(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
-  uint32_t num_encryptions = 0;
-  num_encryptions = read_32(uj_data.data);
-
-  block_ctr += num_encryptions;
-  // Rewrite the key to reset the internal block counter. Otherwise, the AES
-  // peripheral might trigger the reseeding of the internal masking PRNG which
-  // disturbs SCA measurements.
-  if (block_ctr > kBlockCtrMax) {
-    if (aes_key_mask_and_config(key_fixed, kAesKeyLength) != aesScaOk) {
-      return ABORTED();
-    }
-    block_ctr = num_encryptions;
-  }
-
-  if (fpga_mode) {
-    sca_set_trigger_high();
-  }
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
-    if (aes_encrypt(plaintext_random, kAesTextLength) != aesScaOk) {
-      return ABORTED();
-    }
-    aes_serial_advance_random();
-  }
-  if (fpga_mode) {
-    sca_set_trigger_low();
-  }
+status_t handle_aes_sca_batch_daisy_chain(ujson_t *uj) {
+  aes_sca_key_t uj_key;
+  aes_sca_text_t uj_text;
+  penetrationtest_num_enc_t uj_data;
 
-  TRY(aes_send_ciphertext(true, uj));
+  TRY(ujson_deserialize_aes_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_aes_sca_text_t(uj, &uj_text));
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
 
-  return OK_STATUS(0);
-}
+  // Mask and write the key
+  TRY(aes_key_mask_and_config(uj_key.key, uj_key.key_length));
 
-/**
- * Simple serial 'a' (alternative batch encrypt) command handler.
- *
- * This command is designed to maximize the capture rate for side-channel
- * attacks. It uses the first supplied plaintext and repeats AES encryptions
- * by using every ciphertext as next plaintext with a constant key. This
- * minimizes the overhead of UART communication and significantly improves the
- * capture rate.
-
- * Packet payload must be a `uint32_t` representation of the number of
- * encryptions to perform. Since generated plaintexts are not cached, there is
- * no limit on the number of encryptions.
- *
- * The key should also be set using 'k' (key set) command.
- *
- * The host can verify the operation by checking the last 'r' (ciphertext)
- * packet that is sent at the end.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_batch_alternative_encrypt(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
-
-  // Get num_encryptions from input
-  uint32_t num_encryptions = 0;
-  num_encryptions = read_32(uj_data.data);
-
-  // Add to current block_ctr to check if > kBlockCtrMax
-  block_ctr += num_encryptions;
-  // Rewrite the key to reset the internal block counter. Otherwise, the AES
-  // peripheral might trigger the reseeding of the internal masking PRNG which
-  // disturbs SCA measurements.
-  if (block_ctr > kBlockCtrMax) {
-    aes_key_mask_and_config(key_fixed, kAesKeyLength);
-    block_ctr = num_encryptions;
-  }
-
-  // First plaintext has been set through command into batch_plaintext
-
-  // Set trigger high outside of loop
-  // On FPGA, the trigger is AND-ed with AES !IDLE and creates a LO-HI-LO per
-  // AES operation
-  if (fpga_mode) {
-    sca_set_trigger_high();
-  }
   dif_aes_data_t ciphertext;
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
+  uint8_t plaintext[uj_key.key_length];
+  memcpy(plaintext, uj_text.text, uj_text.text_length);
+
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
     // Encrypt
-    if (aes_encrypt(batch_plaintext, kAesTextLength) != aesScaOk) {
-      return ABORTED();
-    }
+    TRY(aes_encrypt(plaintext, uj_text.text_length));
 
     // Get ciphertext
     bool ready = false;
@@ -496,282 +235,177 @@ status_t handle_aes_sca_batch_alternative_encrypt(ujson_t *uj) {
       return ABORTED();
     }
 
-    // Use ciphertext as next plaintext (incl. next call to this function)
-    memcpy(batch_plaintext, ciphertext.data, kAesTextLength);
-  }
-  if (fpga_mode) {
-    sca_set_trigger_low();
+    // Use ciphertext as next plaintext
+    memcpy(plaintext, ciphertext.data, uj_text.text_length);
   }
 
   // send last ciphertext
-  cryptotest_aes_sca_ciphertext_t uj_output;
+  aes_sca_ciphertext_t uj_output;
+  uj_output.ciphertext_length = kAesTextLength;
   memcpy(uj_output.ciphertext, (uint8_t *)ciphertext.data, kAesTextLength);
-  RESP_OK(ujson_serialize_cryptotest_aes_sca_ciphertext_t, uj, &uj_output);
+  RESP_OK(ujson_serialize_aes_sca_ciphertext_t, uj, &uj_output);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
-/**
- * Batch plaintext command handler.
- *
- * This command is designed to set the initial plaintext for
- * aes_serial_batch_alternative_encrypt.
- *
- * The plaintext must be `kAesTextLength` bytes long.
- *
- *  * The uJSON data contains:
- *  - text: The plaintext.
- *  - text_length: Plaintext length.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_batch_plaintext_set(ujson_t *uj) {
-  cryptotest_aes_sca_text_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_text_t(uj, &uj_data));
+status_t handle_aes_sca_batch_fvsr_data(ujson_t *uj) {
+  aes_sca_key_t uj_key;
+  aes_sca_text_t uj_text;
+  penetrationtest_num_enc_t uj_data;
 
-  if (uj_data.text_length != kAesTextLength) {
-    return OUT_OF_RANGE();
-  }
-  memcpy(batch_plaintext, uj_data.text, uj_data.text_length);
+  TRY(ujson_deserialize_aes_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_aes_sca_text_t(uj, &uj_text));
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
 
-  return OK_STATUS(0);
-}
+  TRY(aes_key_mask_and_config(uj_key.key, uj_key.key_length));
 
-/**
- * Fvsr key set command handler.
- *
- * This command is designed to set the fixed key which is used for fvsr key TVLA
- * captures.
- *
- * The key must be `kAesKeyLength` bytes long.
- *
- * The uJSON data contains:
- *  - key: The key to use.
- *  - key_length: The length of the key.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_fvsr_key_set(ujson_t *uj) {
-  cryptotest_aes_sca_key_t uj_key_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_key_t(uj, &uj_key_data));
+  uint8_t batch_plaintexts[kNumBatchOpsMax][uj_text.text_length];
 
-  if (uj_key_data.key_length != kAesKeyLength) {
-    return OUT_OF_RANGE();
+  // First generate all FvsR data sets.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_data.num_enc; it++) {
+    if (sample_fixed) {
+      memcpy(batch_plaintexts[it], uj_text.text, uj_text.text_length);
+    } else {
+      prng_rand_bytes(batch_plaintexts[it], uj_text.text_length);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
   }
-  memcpy(key_fixed, uj_key_data.key, uj_key_data.key_length);
-  return OK_STATUS(0);
-}
 
-/**
- * Fixed vs random key batch generate command handler.
- *
- * This command generates random plaintexts and fixed or random keys using PRNG
- * for AES fixed vs random key batch capture in order to remove fake leakage.
- * Fixed or random key sequence is also determined here by using the lsb bit of
- * the plaintext. In order to simplify the analysis, the first encryption has to
- * use fixed key. The data collection method is based on the derived test
- * requirements (DTR) for TVLA:
- * https://www.rambus.com/wp-content/uploads/2015/08/TVLA-DTR-with-AES.pdf
- * The measurements are taken by using either fixed or randomly selected keys.
- * In addition, a PRNG is used for random key and plaintext generation instead
- * of AES algorithm as specified in the TVLA DTR.
- *
- * Packet payload must be a `uint32_t` representation of the number of
- * encryptions to perform. Number of operations of a batch should not be greater
- * than the 'kNumBatchOpsMax' value.
- *
- * The PRNG should be initialized using the 's' (seed PRNG) command before
- * starting batch captures. In addition, the fixed key should also be set
- * using 't' (fvsr key set) command before starting batch captures.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t aes_sca_fvsr_key_batch_generate(cryptotest_aes_sca_data_t uj_data) {
-  uint32_t num_encryptions = 0;
-  num_encryptions = read_32(uj_data.data);
-  if (num_encryptions > kNumBatchOpsMax) {
-    return OUT_OF_RANGE();
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
+    TRY(aes_encrypt(batch_plaintexts[i], uj_text.text_length));
   }
 
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
+  TRY(aes_send_ciphertext(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_aes_sca_batch_fvsr_key(ujson_t *uj) {
+  aes_sca_key_t uj_key;
+  penetrationtest_num_enc_t uj_data;
+
+  TRY(ujson_deserialize_aes_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
+
+  uint8_t batch_plaintexts[kNumBatchOpsMax][kAesKeyLength];
+  uint8_t batch_keys[kNumBatchOpsMax][uj_key.key_length];
+
+  // First generate all FvsR data sets.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_data.num_enc; it++) {
     if (sample_fixed) {
-      memcpy(batch_keys[i], key_fixed, kAesKeyLength);
-      memcpy(batch_plaintexts[i], plaintext_fixed, kAesKeyLength);
-      aes_serial_advance_fixed();
+      memcpy(batch_keys[it], uj_key.key, uj_key.key_length);
     } else {
-      memcpy(batch_keys[i], key_random, kAesKeyLength);
-      memcpy(batch_plaintexts[i], plaintext_random, kAesKeyLength);
-      aes_serial_advance_random();
+      prng_rand_bytes(batch_keys[it], uj_key.key_length);
     }
-    sample_fixed = batch_plaintexts[i][0] & 0x1;
+    prng_rand_bytes(batch_plaintexts[it], kAesKeyLength);
+    sample_fixed = prng_rand_byte() & 0x1;
   }
 
-  return OK_STATUS(0);
-}
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
+    TRY(aes_key_mask_and_config(batch_keys[i], uj_key.key_length));
+    TRY(aes_encrypt(batch_plaintexts[i], kAesKeyLength));
+  }
 
-/**
- * Fixed vs random key batch generate command handler.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_fvsr_key_batch_generate(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
+  TRY(aes_send_ciphertext(uj));
 
-  return aes_sca_fvsr_key_batch_generate(uj_data);
+  return OK_STATUS();
 }
 
-/**
- * Fixed vs random key batch encrypt and generate command handler.
- *
- * This command is designed to maximize the capture rate for side-channel
- * attacks. Instead of expecting a plaintext and sending the resulting
- * ciphertext from and to the host for each encryption, this command repeatedly
- * encrypts random plaintexts that are generated on the device. The data
- * collection method is based on the derived test requirements (DTR) for TVLA:
- * https://www.rambus.com/wp-content/uploads/2015/08/TVLA-DTR-with-AES.pdf
- * The measurements are taken by using either fixed or randomly selected keys.
- * In order to simplify the analysis, the first encryption has to use fixed key.
- * In addition, a PRNG is used for random key and plaintext generation instead
- * of AES algorithm as specified in the TVLA DTR.
- * This minimizes the overhead of UART communication and significantly improves
- * the capture rate. The host must use the same PRNG to be able to compute the
- * random plaintext, random key and the ciphertext of each trace.
- *
- * Packet payload must be a `uint32_t` representation of the number of
- * encryptions to perform. Number of operations of a batch should not be greater
- * than the 'kNumBatchOpsMax' value.
- *
- * The PRNG should be initialized using the 's' (seed PRNG) command before
- * starting batch encryption. In addition, the fixed key should also be set
- * using 't' (fvsr key set) command before starting batch encryption.
- *
- * Note that the host can partially verify this operation by checking the
- * contents of the 'r' (last ciphertext) packet that is sent at the end of every
- * batch.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_fvsr_key_batch_encrypt(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
+status_t handle_aes_sca_batch_random(ujson_t *uj) {
+  aes_sca_key_t uj_key;
+  penetrationtest_num_enc_t uj_data;
 
-  uint32_t num_encryptions = 0;
-  num_encryptions = read_32(uj_data.data);
-  if (num_encryptions > kNumBatchOpsMax) {
-    return OUT_OF_RANGE();
-  }
+  TRY(ujson_deserialize_aes_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
 
-  if (fpga_mode) {
-    sca_set_trigger_high();
-  }
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
-    if (aes_key_mask_and_config(batch_keys[i], kAesKeyLength) != aesScaOk) {
-      return ABORTED();
-    }
-    if (aes_encrypt(batch_plaintexts[i], kAesTextLength) != aesScaOk) {
-      return ABORTED();
-    }
+  TRY(aes_key_mask_and_config(uj_key.key, uj_key.key_length));
+
+  uint8_t batch_plaintexts[kNumBatchOpsMax][kAesKeyLength];
+
+  for (size_t it = 0; it < uj_data.num_enc; it++) {
+    prng_rand_bytes(batch_plaintexts[it], kAesKeyLength);
   }
-  if (fpga_mode) {
-    sca_set_trigger_low();
+
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
+    TRY(aes_encrypt(batch_plaintexts[i], kAesKeyLength));
   }
 
-  TRY(aes_send_ciphertext(false, uj));
+  TRY(aes_send_ciphertext(uj));
 
-  // Start to generate random keys and plaintexts for the next batch when the
-  // waves are getting from scope by the host to increase capture rate.
-  return aes_sca_fvsr_key_batch_generate(uj_data);
+  return OK_STATUS();
 }
 
-/**
- * Fixed vs random data batch encrypt and generate command handler.
- *
- * This command is designed to maximize the capture rate for side-channel
- * attacks. Instead of expecting a plaintext and sending the resulting
- * ciphertext from and to the host for each encryption, this command repeatedly
- * encrypts plaintexts that are generated on the device. The data
- * collection method is based on the derived test requirements (DTR) for TVLA:
- * https://www.rambus.com/wp-content/uploads/2015/08/TVLA-DTR-with-AES.pdf
- * The measurements are taken by using either fixed or randomly selected
- * plaintexts. In order to simplify the analysis, the first encryption has to
- * use fixed plaintext. This minimizes the overhead of UART communication and
- * significantly improves the capture rate. The host must use the same PRNG to
- * be able to compute the random plaintext and the ciphertext of each trace.
- *
- * Packet payload must be a `uint32_t` representation of the number of
- * encryptions to perform. Number of operations of a batch should not be greater
- * than the 'kNumBatchOpsMax' value.
- *
- * Note that the host can partially verify this operation by checking the
- * contents of the 'r' (last ciphertext) packet that is sent at the end of every
- * batch.
- *
- * The uJSON data contains:
- *  - data: The number of encryptions.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_fvsr_data_batch_encrypt(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
+status_t handle_aes_sca_single_encrypt(ujson_t *uj) {
+  aes_sca_key_t uj_key;
+  aes_sca_text_t uj_text;
+  TRY(ujson_deserialize_aes_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_aes_sca_text_t(uj, &uj_text));
 
-  uint32_t num_encryptions = 0;
-  num_encryptions = read_32(uj_data.data);
-  if (num_encryptions > kNumBatchOpsMax) {
-    return OUT_OF_RANGE();
-  }
+  TRY(aes_key_mask_and_config(uj_key.key, uj_key.key_length));
 
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
-    memcpy(batch_keys[i], key_fixed, kAesKeyLength);
-    if (sample_fixed) {
-      memcpy(batch_plaintexts[i], plaintext_fixed, kAesKeyLength);
-    } else {
-      memcpy(batch_plaintexts[i], plaintext_random, kAesKeyLength);
-      aes_serial_advance_random_data();
-    }
-    sample_fixed = sca_next_lfsr(1, kScaLfsrOrder) & 0x1;
-  }
+  TRY(aes_encrypt(uj_text.text, uj_text.text_length));
 
-  if (fpga_mode) {
-    sca_set_trigger_high();
+  TRY(aes_send_ciphertext(uj));
+  return OK_STATUS();
+}
+
+status_t handle_aes_pentest_init(ujson_t *uj) {
+  // Read mode. FPGA or discrete.
+  aes_sca_fpga_mode_t uj_data;
+  TRY(ujson_deserialize_aes_sca_fpga_mode_t(uj, &uj_data));
+  if (uj_data.fpga_mode == 0x01) {
+    fpga_mode = true;
   }
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
-    aes_key_mask_and_config(batch_keys[i], kAesKeyLength);
-    aes_encrypt(batch_plaintexts[i], kAesTextLength);
+
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralAes,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  if (dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes) !=
+      kDifOk) {
+    return ABORTED();
   }
-  if (fpga_mode) {
-    sca_set_trigger_low();
+
+  if (dif_aes_reset(&aes) != kDifOk) {
+    return ABORTED();
   }
 
-  TRY(aes_send_ciphertext(false, uj));
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
-/**
- * Seed lfsr command handler.
- *
- * This function only supports 4-byte seeds.
- * Enables/disables masking depending on seed value, i.e. 0 for disable.
- *
- * The uJSON data contains:
- *  - seed: A buffer holding the seed.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_seed_lfsr(ujson_t *uj) {
-  cryptotest_aes_sca_lfsr_t uj_lfsr_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_lfsr_t(uj, &uj_lfsr_data));
+status_t handle_aes_pentest_seed_lfsr(ujson_t *uj) {
+  aes_sca_lfsr_t uj_lfsr_data;
+  TRY(ujson_deserialize_aes_sca_lfsr_t(uj, &uj_lfsr_data));
 
   uint32_t seed_local = read_32(uj_lfsr_data.seed);
   if (seed_local == 0) {
@@ -781,7 +415,7 @@ status_t handle_aes_sca_seed_lfsr(ujson_t *uj) {
     // enable masking
     transaction.force_masks = false;
   }
-  sca_seed_lfsr(seed_local, kScaLfsrMasking);
+  pentest_seed_lfsr(seed_local, kPentestLfsrMasking);
 
 #if !OT_IS_ENGLISH_BREAKFAST
   if (transaction.force_masks) {
@@ -792,183 +426,36 @@ status_t handle_aes_sca_seed_lfsr(ujson_t *uj) {
     }
     // Load the magic seed into the PRNG. After this, the PRNG outputs
     // an all-zero vector.
-    TRY(dif_aes_trigger(&aes, kDifAesTriggerPrngReseed));
-    bool idle = false;
-    do {
-      TRY(dif_aes_get_status(&aes, kDifAesStatusIdle, &idle));
-    } while (!idle);
-    // Load the PRNG output into the buffer stage.
-    TRY(dif_aes_trigger(&aes, kDifAesTriggerDataOutClear));
+    TRY(aes_sca_load_fixed_seed());
   }
 #endif
 
-  return OK_STATUS(0);
-}
-
-/**
- * Seed lfsr command handler.
- *
- * This function only supports 4-byte seeds.
- * Sets the seed for the LFSR used to determine the order of measurements
- * in fixed-vs-random-data dataset.
- *
- * The uJSON data contains:
- *  - seed: A buffer holding the seed.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_seed_lfsr_order(ujson_t *uj) {
-  cryptotest_aes_sca_lfsr_t uj_lfsr_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_lfsr_t(uj, &uj_lfsr_data));
-
-  uint32_t seed_local = read_32(uj_lfsr_data.seed);
-  sca_seed_lfsr(seed_local, kScaLfsrOrder);
-
-  return OK_STATUS(0);
-}
-
-/**
- * Set starting values command handler.
- *
- * This function sets starting values for FvsR data generation
- * if the received value is 1.
- * These values are specified in DTR for AES TVLA.
- *
- * The uJSON data contains:
- *  - seed: A buffer holding the seed.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_fvsr_key_start_batch_generate(ujson_t *uj) {
-  cryptotest_aes_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_data_t(uj, &uj_data));
-  uint32_t command = 0;
-  command = read_32(uj_data.data);
-
-  static const uint8_t kPlaintextFixedStartFvsrKey[kAesTextLength] = {
-      0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
-      0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA};
-  static const uint8_t kKeyFixedStartFvsrKey[kAesTextLength] = {
-      0x81, 0x1E, 0x37, 0x31, 0xB0, 0x12, 0x0A, 0x78,
-      0x42, 0x78, 0x1E, 0x22, 0xB2, 0x5C, 0xDD, 0xF9};
-  static const uint8_t kPlaintextRandomStartFvsrKey[kAesTextLength] = {
-      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc,
-      0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc, 0xcc};
-  static const uint8_t kKeyRandomStartFvsrKey[kAesTextLength] = {
-      0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53,
-      0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53, 0x53};
-  // Starting constants for fixed-vs-random data, DTR Section 5.1
-  static const uint8_t kPlaintextFixedStartFvsrData[kAesTextLength] = {
-      0xDA, 0x39, 0xA3, 0xEE, 0x5E, 0x6B, 0x4B, 0x0D,
-      0x32, 0x55, 0xBF, 0xEF, 0x95, 0x60, 0x18, 0x90};
-  static const uint8_t kPlaintextRandomStartFvsrData[kAesTextLength] = {
-      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
-  static const uint8_t kKeyStartFvsrData[kAesTextLength] = {
-      0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF,
-      0x12, 0x34, 0x56, 0x78, 0x9A, 0xBC, 0xDE, 0xF0};
-
-  // Initial state of the prng
-  static const uint32_t kPrngInitialState = 0x99999999;
-
-  // If fixed-vs-random key analysis
-  if (command == 1) {
-    memcpy(plaintext_fixed, kPlaintextFixedStartFvsrKey, kAesTextLength);
-    memcpy(key_fixed, kKeyFixedStartFvsrKey, kAesKeyLength);
-    memcpy(plaintext_random, kPlaintextRandomStartFvsrKey, kAesTextLength);
-    memcpy(key_random, kKeyRandomStartFvsrKey, kAesKeyLength);
-  }
-
-  // If fixed-vs-random data analysis
-  if (command == 2) {
-    memcpy(plaintext_fixed, kPlaintextFixedStartFvsrData, kAesTextLength);
-    memcpy(key_fixed, kKeyStartFvsrData, kAesKeyLength);
-    memcpy(plaintext_random, kPlaintextRandomStartFvsrData, kAesTextLength);
-  }
-
-  sca_seed_lfsr(kPrngInitialState, kScaLfsrOrder);
-
-  return OK_STATUS(0);
-}
-
-/**
- * Initialize AES command handler.
- *
- * This command is designed to setup the AES.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_aes_sca_init(ujson_t *uj) {
-  // Read mode. FPGA or discrete.
-  cryptotest_aes_sca_fpga_mode_t uj_data;
-  TRY(ujson_deserialize_cryptotest_aes_sca_fpga_mode_t(uj, &uj_data));
-  if (uj_data.fpga_mode == 0x01) {
-    fpga_mode = true;
-  }
-  sca_init(kScaTriggerSourceAes, kScaPeripheralIoDiv4 | kScaPeripheralAes);
-
-  if (dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes) !=
-      kDifOk) {
-    return ABORTED();
-  }
-
-  if (dif_aes_reset(&aes) != kDifOk) {
-    return ABORTED();
-  }
-
-  // Disable the instruction cache and dummy instructions for better SCA
-  // measurements.
-  sca_configure_cpu();
-
-  return OK_STATUS(0);
+  TRY(dif_aes_trigger(&aes, kDifAesTriggerDataOutClear));
+  AES_TESTUTILS_WAIT_FOR_STATUS(&aes, kDifAesStatusIdle, true, kTestTimeout);
+  return OK_STATUS();
 }
 
 status_t handle_aes_sca(ujson_t *uj) {
   aes_sca_subcommand_t cmd;
   TRY(ujson_deserialize_aes_sca_subcommand_t(uj, &cmd));
   switch (cmd) {
-    case kAesScaSubcommandInit:
-      return handle_aes_sca_init(uj);
-      break;
-    case kAesScaSubcommandKeySet:
-      return handle_aes_sca_key_set(uj);
-      break;
-    case kAesScaSubcommandSingleEncrypt:
+    case kAesScaSubcommandSingle:
       return handle_aes_sca_single_encrypt(uj);
-      break;
-    case kAesScaSubcommandBatchEncrypt:
-      return handle_aes_sca_batch_encrypt(uj);
-      break;
-    case kAesScaSubcommandFvsrKeySet:
-      return handle_aes_sca_fvsr_key_set(uj);
-      break;
-    case kAesScaSubcommandFvsrKeyBatchGenerate:
-      return handle_aes_sca_fvsr_key_batch_generate(uj);
-      break;
-    case kAesScaSubcommandFvsrKeyBatchEncrypt:
-      return handle_aes_sca_fvsr_key_batch_encrypt(uj);
-      break;
-    case kAesScaSubcommandFvsrKeyStartBatchGenerate:
-      return handle_aes_sca_fvsr_key_start_batch_generate(uj);
-      break;
-    case kAesScaSubcommandFvsrDataBatchEncrypt:
-      return handle_aes_sca_fvsr_data_batch_encrypt(uj);
-      break;
+    case kAesScaSubcommandBatchDaisy:
+      return handle_aes_sca_batch_daisy_chain(uj);
+    case kAesScaSubcommandBatchRandom:
+      return handle_aes_sca_batch_random(uj);
+    case kAesScaSubcommandBatchFvsrData:
+      return handle_aes_sca_batch_fvsr_data(uj);
+    case kAesScaSubcommandBatchFvsrKey:
+      return handle_aes_sca_batch_fvsr_key(uj);
+    case kAesScaSubcommandInit:
+      return handle_aes_pentest_init(uj);
     case kAesScaSubcommandSeedLfsr:
-      return handle_aes_sca_seed_lfsr(uj);
-      break;
-    case kAesScaSubcommandSeedLfsrOrder:
-      return handle_aes_sca_seed_lfsr_order(uj);
-      break;
-    case kAesScaSubcommandBatchAlternativeEncrypt:
-      return handle_aes_sca_batch_alternative_encrypt(uj);
-      break;
-    case kAesScaSubcommandBatchPlaintextSet:
-      return handle_aes_sca_batch_plaintext_set(uj);
-      break;
+      return handle_aes_pentest_seed_lfsr(uj);
     default:
       LOG_ERROR("Unrecognized AES SCA subcommand: %d", cmd);
       return INVALID_ARGUMENT();
   }
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
diff --git a/sw/device/tests/penetrationtests/firmware/sca/aes_sca.h b/sw/device/tests/penetrationtests/firmware/sca/aes_sca.h
index 6cebf56aedcaa..785ac7fb21d73 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/aes_sca.h
+++ b/sw/device/tests/penetrationtests/firmware/sca/aes_sca.h
@@ -9,36 +9,126 @@
 #include "sw/device/lib/ujson/ujson.h"
 
 /**
- * The result of an AES SCA operation.
- */
-typedef enum aes_sca_error {
-  /**
-   * Indicates that the operation succeeded.
-   */
-  aesScaOk = 0,
-  /**
-   * Indicates some unspecified failure.
-   */
-  aesScaAborted = 1,
-  /**
-   * Indicates that the attempted operation would attempt a read/write to an
-   * address that would go out of range.
-   */
-  aesScaOutOfRange = 2
-} aes_sca_error_t;
-
-status_t handle_aes_sca_batch_plaintext_set(ujson_t *uj);
-status_t handle_aes_sca_batch_alternative_encrypt(ujson_t *uj);
-status_t handle_aes_sca_seed_lfsr(ujson_t *uj);
-status_t handle_aes_sca_fvsr_key_start_batch_generate(ujson_t *uj);
-status_t handle_aes_sca_fvsr_key_batch_encrypt(ujson_t *uj);
-status_t handle_aes_sca_fvsr_key_batch_generate(ujson_t *uj);
-status_t handle_aes_sca_fvsr_key_set(ujson_t *uj);
-status_t handle_aes_sca_batch_encrypt(ujson_t *uj);
+ * Single encrypt command handler.
+ *
+ * Encrypts a `kAesTextLength` bytes long plaintext using the AES peripheral and
+ * sends the ciphertext over UART. This function also handles the trigger
+ * signal.
+ *
+ * The uJSON data contains:
+ *  - text: The plaintext.
+ *  - text_length: The length of the plaintext.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_aes_sca_single_encrypt(ujson_t *uj);
-status_t handle_aes_sca_key_set(ujson_t *uj);
-status_t handle_aes_sca_select_trigger_source(ujson_t *uj);
-status_t handle_aes_sca_init(ujson_t *uj);
+
+/**
+ * This command is designed to maximize the capture rate for side-channel
+ * attacks. It uses the first supplied plaintext and repeats AES encryptions
+ * by using every ciphertext as next plaintext with a constant key. This
+ * minimizes the overhead of UART communication and significantly improves the
+ * capture rate.
+
+ * Packet payload must be a `uint32_t` representation of the number of
+ * encryptions to perform. Since generated plaintexts are not cached, there is
+ * no limit on the number of encryptions.
+ *
+ * The uJSON data contains:
+ *  - data: The number of encryptions.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_sca_batch_daisy_chain(ujson_t *uj);
+
+/**
+ * Batch random command handler.
+ *
+ * This command is designed to maximize the capture rate for side-channel
+ * attacks. Instead of expecting a plaintext and sending the resulting
+ * ciphertext from and to the host for each encryption, this command repeatedly
+ * encrypts random plaintexts that are generated on the device. This minimizes
+ * the overhead of UART communication and significantly improves the capture
+ * rate. The host must use the same PRNG to be able to compute the plaintext and
+ * the ciphertext of each trace.
+ *
+ * The uJSON data contains:
+ *  - data: The number of encryptions.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_sca_batch_random(ujson_t *uj);
+
+/**
+ * Batch fvsr data command handler.
+ *
+ * This command is designed to maximize the capture rate for side-channel
+ * attacks. This command coins randomness to decide whether to encrypt the given
+ * plaintext or a random one. This minimizes the overhead of UART communication
+ * and significantly improves the capture rate. The host must use the same PRNG
+ * to be able to compute the plaintext and the ciphertext of each trace.
+ *
+ * The uJSON data contains:
+ *  - data: The number of encryptions.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_sca_batch_fvsr_data(ujson_t *uj);
+
+/**
+ * Batch fvsr key command handler.
+ *
+ * This command is designed to maximize the capture rate for side-channel
+ * attacks. This command coins randomness to decide whether to encrypt a random
+ * plaintext with the given key or a random key. This minimizes the overhead of
+ * UART communication and significantly improves the capture rate. The host must
+ * use the same PRNG to be able to compute the plaintext and the ciphertext of
+ * each trace.
+ *
+ * The uJSON data contains:
+ *  - data: The number of encryptions.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_sca_batch_fvsr_key(ujson_t *uj);
+
+/**
+ * Initialize AES command handler.
+ *
+ * This command is designed to setup the AES.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_pentest_init(ujson_t *uj);
+
+/**
+ * Seed lfsr command handler.
+ *
+ * This function only supports 4-byte seeds.
+ * Enables/disables masking depending on seed value, i.e. 0 for disable.
+ *
+ * The uJSON data contains:
+ *  - seed: A buffer holding the seed.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_aes_pentest_seed_lfsr(ujson_t *uj);
+
+/**
+ * HMAC SCA command handler.
+ *
+ * Command handler for the HMAC SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
 status_t handle_aes_sca(ujson_t *uj);
 
 #endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_AES_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.c b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.c
new file mode 100644
index 0000000000000..6015e32802f1b
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.c
@@ -0,0 +1,935 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+status_t trigger_cryptolib_sca_asym_rsa_dec(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len, size_t mode,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t data_out[RSA_CMD_MAX_MESSAGE_BYTES],
+    size_t *data_out_len, size_t hashing, size_t padding, size_t cfg_in,
+    size_t *cfg_out, size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform an RSA decryption.
+  // Adjust the hashing and the padding mode.
+  // Triggers are over the API calls.
+  *status = (size_t)cryptolib_sca_rsa_dec_impl(
+                data, data_len, mode, n, d, n_len, data_out, data_out_len,
+                hashing, padding, cfg_in, cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_rsa_dec(ujson_t *uj) {
+  cryptolib_sca_asym_rsa_dec_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_rsa_dec_in_t(uj, &uj_input));
+
+  uint8_t datain[RSA_CMD_MAX_MESSAGE_BYTES];
+  memcpy(datain, uj_input.data, uj_input.data_len);
+  uint8_t data_out_buf[RSA_CMD_MAX_MESSAGE_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  uint8_t n[RSA_CMD_MAX_N_BYTES];
+  uint8_t d[RSA_CMD_MAX_N_BYTES];
+  size_t n_len = uj_input.n_len;
+  memset(n, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(n, uj_input.n, n_len);
+  memset(d, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(d, uj_input.d, n_len);
+  TRY(trigger_cryptolib_sca_asym_rsa_dec(
+      datain, uj_input.data_len, uj_input.mode, n, d, &n_len, data_out_buf,
+      &data_out_len, uj_input.hashing, uj_input.padding, uj_input.cfg, &cfg_out,
+      &status, uj_input.trigger));
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_asym_rsa_dec_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.n, n, RSA_CMD_MAX_N_BYTES);
+  memcpy(uj_output.d, d, RSA_CMD_MAX_N_BYTES);
+  uj_output.n_len = n_len;
+  memcpy(uj_output.data, data_out_buf, RSA_CMD_MAX_MESSAGE_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_rsa_dec_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_rsa_sign(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t sig[RSA_CMD_MAX_SIGNATURE_BYTES], size_t *sig_len,
+    size_t hashing, size_t padding, size_t cfg_in, size_t *cfg_out,
+    size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform an RSA sign.
+  // Adjust the hashing and the padding mode.
+  // Triggers are over the API calls.
+  *status = (size_t)cryptolib_sca_rsa_sign_impl(data, data_len, n, d, n_len,
+                                                sig, sig_len, hashing, padding,
+                                                cfg_in, cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_prime(ujson_t *uj) {
+  cryptolib_sca_asym_prime_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_prime_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Generates a prime.
+  // Triggers are over the API calls.
+
+  cryptolib_sca_asym_prime_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_prime_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_rsa_sign(ujson_t *uj) {
+  cryptolib_sca_asym_rsa_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_rsa_sign_in_t(uj, &uj_input));
+
+  uint8_t data_in_buf[RSA_CMD_MAX_MESSAGE_BYTES];
+  uint8_t sig_buf[RSA_CMD_MAX_SIGNATURE_BYTES];
+  size_t sig_len;
+  uint8_t n[RSA_CMD_MAX_N_BYTES];
+  uint8_t d[RSA_CMD_MAX_N_BYTES];
+  size_t n_len = uj_input.n_len;
+  memset(n, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(n, uj_input.n, n_len);
+  memset(d, 0, RSA_CMD_MAX_N_BYTES);
+  memcpy(d, uj_input.d, n_len);
+  memset(data_in_buf, 0, RSA_CMD_MAX_MESSAGE_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  size_t cfg_out;
+  size_t status;
+  TRY(trigger_cryptolib_sca_asym_rsa_sign(
+      data_in_buf, uj_input.data_len, n, d, &n_len, sig_buf, &sig_len,
+      uj_input.hashing, uj_input.padding, uj_input.cfg, &cfg_out, &status,
+      uj_input.trigger));
+
+  cryptolib_sca_asym_rsa_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.n, n, RSA_CMD_MAX_N_BYTES);
+  memcpy(uj_output.d, d, RSA_CMD_MAX_N_BYTES);
+  uj_output.n_len = n_len;
+  memcpy(uj_output.sig, sig_buf, RSA_CMD_MAX_SIGNATURE_BYTES);
+  uj_output.sig_len = sig_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_rsa_sign_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_p256_base_mul(
+    uint8_t scalar[P256_CMD_BYTES], uint8_t x[P256_CMD_BYTES],
+    uint8_t y[P256_CMD_BYTES], size_t cfg_in, size_t *cfg_out, size_t *status,
+    size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in P256.
+  // Trigger are over the API calls.
+
+  memset(x, 0, P256_CMD_BYTES);
+  memset(y, 0, P256_CMD_BYTES);
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p256_base_mul_fvsr(ujson_t *uj) {
+  cryptolib_sca_asym_p256_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p256_base_mul_in_t(uj, &uj_input));
+
+  uint8_t batch_scalar[uj_input.num_iterations][P256_CMD_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided data is used. When
+  // not sample_fixed, random data is generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_scalar[it], uj_input.scalar, P256_CMD_BYTES);
+    } else {
+      prng_rand_bytes(batch_scalar[it], P256_CMD_BYTES);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke point mul for each data set.
+  uint8_t x[P256_CMD_BYTES];
+  uint8_t y[P256_CMD_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_p256_base_mul(batch_scalar[it], x, y,
+                                                 uj_input.cfg, &cfg_out,
+                                                 &status, uj_input.trigger));
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_p256_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, P256_CMD_BYTES);
+  memcpy(uj_output.y, y, P256_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p256_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p256_base_mul_daisy_chaining(ujson_t *uj) {
+  cryptolib_sca_asym_p256_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p256_base_mul_in_t(uj, &uj_input));
+
+  // Invoke point mul for each data set.
+  uint8_t scalar[P256_CMD_BYTES];
+  uint8_t x[P256_CMD_BYTES];
+  uint8_t y[P256_CMD_BYTES];
+  memset(scalar, 0, P256_CMD_BYTES);
+  memcpy(scalar, uj_input.scalar, P256_CMD_BYTES);
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_p256_base_mul(
+        scalar, x, y, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+
+    // Copy out x coordinate to scalar
+    memset(scalar, 0, P256_CMD_BYTES);
+    memcpy(scalar, x, P256_CMD_BYTES);
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_p256_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, P256_CMD_BYTES);
+  memcpy(uj_output.y, y, P256_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p256_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p256_point_mul(ujson_t *uj) {
+  cryptolib_sca_asym_p256_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p256_point_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in P256.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_sca_asym_p256_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p256_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p256_ecdh(ujson_t *uj) {
+  cryptolib_sca_asym_p256_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p256_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ECDH in P256.
+  // Trigger are over the API calls.
+  cryptolib_sca_asym_p256_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_sca_p256_ecdh_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p256_ecdh_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p256_sign(ujson_t *uj) {
+  cryptolib_sca_asym_p256_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p256_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a P256 signature.
+  // Trigger are over the API calls.
+  cryptolib_sca_asym_p256_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_sca_p256_sign_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p256_sign_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_p384_base_mul(
+    uint8_t scalar[P384_CMD_BYTES], uint8_t x[P384_CMD_BYTES],
+    uint8_t y[P384_CMD_BYTES], size_t cfg_in, size_t *cfg_out, size_t *status,
+    size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in p384.
+  // Trigger are over the API calls.
+
+  memset(x, 0, P384_CMD_BYTES);
+  memset(y, 0, P384_CMD_BYTES);
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p384_base_mul_fvsr(ujson_t *uj) {
+  cryptolib_sca_asym_p384_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p384_base_mul_in_t(uj, &uj_input));
+
+  uint8_t batch_scalar[uj_input.num_iterations][P384_CMD_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided data is used. When
+  // not sample_fixed, random data is generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_scalar[it], uj_input.scalar, P384_CMD_BYTES);
+    } else {
+      prng_rand_bytes(batch_scalar[it], P384_CMD_BYTES);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke point mul for each data set.
+  uint8_t x[P384_CMD_BYTES];
+  uint8_t y[P384_CMD_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_p384_base_mul(batch_scalar[it], x, y,
+                                                 uj_input.cfg, &cfg_out,
+                                                 &status, uj_input.trigger));
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_p384_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, P384_CMD_BYTES);
+  memcpy(uj_output.y, y, P384_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p384_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p384_base_mul_daisy_chaining(ujson_t *uj) {
+  cryptolib_sca_asym_p384_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p384_base_mul_in_t(uj, &uj_input));
+
+  // Invoke point mul for each data set.
+  uint8_t scalar[P384_CMD_BYTES];
+  uint8_t x[P384_CMD_BYTES];
+  uint8_t y[P384_CMD_BYTES];
+  memset(scalar, 0, P384_CMD_BYTES);
+  memcpy(scalar, uj_input.scalar, P384_CMD_BYTES);
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_p384_base_mul(
+        scalar, x, y, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy out x coordinate to scalar
+    memset(scalar, 0, P256_CMD_BYTES);
+    memcpy(scalar, x, P256_CMD_BYTES);
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_p384_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, P384_CMD_BYTES);
+  memcpy(uj_output.y, y, P384_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p384_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p384_point_mul(ujson_t *uj) {
+  cryptolib_sca_asym_p384_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p384_point_mul_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in p384.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_sca_asym_p384_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p384_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p384_ecdh(ujson_t *uj) {
+  cryptolib_sca_asym_p384_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p384_ecdh_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform ECDH in P384.
+  // Trigger are over the API calls.
+  cryptolib_sca_asym_p384_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_sca_p384_ecdh_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p384_ecdh_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_p384_sign(ujson_t *uj) {
+  cryptolib_sca_asym_p384_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_p384_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a p384 signature.
+  // Trigger are over the API calls.
+  cryptolib_sca_asym_p384_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.status =
+      (size_t)cryptolib_sca_p384_sign_impl(uj_input, &uj_output).value;
+  /////////////// STUB END ///////////////
+
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_p384_sign_out_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_secp256k1_base_mul(
+    uint8_t scalar[SECP256K1_CMD_BYTES], uint8_t x[SECP256K1_CMD_BYTES],
+    uint8_t y[SECP256K1_CMD_BYTES], size_t cfg_in, size_t *cfg_out,
+    size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in secp256k1.
+  // Trigger are over the API calls.
+
+  memset(x, 0, SECP256K1_CMD_BYTES);
+  memset(y, 0, SECP256K1_CMD_BYTES);
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_secp256k1_base_mul_fvsr(ujson_t *uj) {
+  cryptolib_sca_asym_secp256k1_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_secp256k1_base_mul_in_t(uj,
+                                                                   &uj_input));
+
+  uint8_t batch_scalar[uj_input.num_iterations][SECP256K1_CMD_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided data is used. When
+  // not sample_fixed, random data is generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_scalar[it], uj_input.scalar, SECP256K1_CMD_BYTES);
+    } else {
+      prng_rand_bytes(batch_scalar[it], SECP256K1_CMD_BYTES);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke point mul for each data set.
+  uint8_t x[SECP256K1_CMD_BYTES];
+  uint8_t y[SECP256K1_CMD_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_secp256k1_base_mul(
+        batch_scalar[it], x, y, uj_input.cfg, &cfg_out, &status,
+        uj_input.trigger));
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_secp256k1_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, SECP256K1_CMD_BYTES);
+  memcpy(uj_output.y, y, SECP256K1_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_secp256k1_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_secp256k1_base_mul_daisy_chaining(
+    ujson_t *uj) {
+  cryptolib_sca_asym_secp256k1_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_secp256k1_base_mul_in_t(uj,
+                                                                   &uj_input));
+
+  // Invoke point mul for each data set.
+  uint8_t scalar[SECP256K1_CMD_BYTES];
+  uint8_t x[SECP256K1_CMD_BYTES];
+  uint8_t y[SECP256K1_CMD_BYTES];
+  memset(scalar, 0, SECP256K1_CMD_BYTES);
+  memcpy(scalar, uj_input.scalar, SECP256K1_CMD_BYTES);
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_secp256k1_base_mul(
+        scalar, x, y, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy out x coordinate to scalar
+    memset(scalar, 0, SECP256K1_CMD_BYTES);
+    memcpy(scalar, x, SECP256K1_CMD_BYTES);
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_secp256k1_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, SECP256K1_CMD_BYTES);
+  memcpy(uj_output.y, y, SECP256K1_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_secp256k1_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_secp256k1_point_mul(ujson_t *uj) {
+  cryptolib_sca_asym_secp256k1_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_secp256k1_point_mul_in_t(uj,
+                                                                    &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in secp256k1.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_sca_asym_secp256k1_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_secp256k1_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_secp256k1_ecdh(ujson_t *uj) {
+  cryptolib_sca_asym_secp256k1_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_secp256k1_ecdh_in_t(uj, &uj_input));
+  /////////////// STUB START ///////////////
+  // Perform ECDH in secp256k1.
+  // Trigger are over the API calls.
+
+  cryptolib_sca_asym_secp256k1_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_secp256k1_ecdh_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_secp256k1_sign(ujson_t *uj) {
+  cryptolib_sca_asym_secp256k1_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_secp256k1_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a secp256k1 signature.
+  // Trigger are over the API calls.
+
+  cryptolib_sca_asym_secp256k1_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_secp256k1_sign_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_x25519_base_mul(
+    uint8_t scalar[X25519_CMD_BYTES], uint8_t x[X25519_CMD_BYTES],
+    uint8_t y[X25519_CMD_BYTES], size_t cfg_in, size_t *cfg_out, size_t *status,
+    size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in X25519.
+  // Trigger are over the API calls.
+
+  memset(x, 0, X25519_CMD_BYTES);
+  memset(y, 0, X25519_CMD_BYTES);
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_x25519_base_mul_fvsr(ujson_t *uj) {
+  cryptolib_sca_asym_x25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_x25519_base_mul_in_t(uj, &uj_input));
+
+  uint8_t batch_scalar[uj_input.num_iterations][X25519_CMD_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided data is used. When
+  // not sample_fixed, random data is generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_scalar[it], uj_input.scalar, X25519_CMD_BYTES);
+    } else {
+      prng_rand_bytes(batch_scalar[it], X25519_CMD_BYTES);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke point mul for each data set.
+  uint8_t x[X25519_CMD_BYTES];
+  uint8_t y[X25519_CMD_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_x25519_base_mul(batch_scalar[it], x, y,
+                                                   uj_input.cfg, &cfg_out,
+                                                   &status, uj_input.trigger));
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_x25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, X25519_CMD_BYTES);
+  memcpy(uj_output.y, y, X25519_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_x25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_x25519_base_mul_daisy_chaining(ujson_t *uj) {
+  cryptolib_sca_asym_x25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_x25519_base_mul_in_t(uj, &uj_input));
+
+  // Invoke point mul for each data set.
+  uint8_t scalar[X25519_CMD_BYTES];
+  uint8_t x[X25519_CMD_BYTES];
+  uint8_t y[X25519_CMD_BYTES];
+  memset(scalar, 0, X25519_CMD_BYTES);
+  memcpy(scalar, uj_input.scalar, X25519_CMD_BYTES);
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_x25519_base_mul(
+        scalar, x, y, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy out x coordinate to scalar
+    memset(scalar, 0, X25519_CMD_BYTES);
+    memcpy(scalar, x, X25519_CMD_BYTES);
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_x25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, X25519_CMD_BYTES);
+  memcpy(uj_output.y, y, X25519_CMD_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_x25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_x25519_point_mul(ujson_t *uj) {
+  cryptolib_sca_asym_x25519_point_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_x25519_point_mul_in_t(uj,
+                                                                 &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a point multiplication in X25519.
+  // The Bob scalar is transformed to a public key to then be multiplied to the
+  // Alice scalar. Trigger are over the API calls.
+
+  cryptolib_sca_asym_x25519_point_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_x25519_point_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_x25519_ecdh(ujson_t *uj) {
+  cryptolib_sca_asym_x25519_ecdh_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_x25519_ecdh_in_t(uj, &uj_input));
+  /////////////// STUB START ///////////////
+  // Perform ECDH in x25519.
+  // Trigger are over the API calls.
+
+  cryptolib_sca_asym_x25519_ecdh_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_x25519_ecdh_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t trigger_cryptolib_sca_asym_ed25519_base_mul(
+    uint8_t scalar[ED25519_CMD_SCALAR_BYTES],
+    uint8_t x[ED25519_CMD_SCALAR_BYTES], uint8_t y[ED25519_CMD_SCALAR_BYTES],
+    size_t cfg_in, size_t *cfg_out, size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a base point multiplication in ED25519.
+  // Trigger are over the API calls.
+
+  memset(x, 0, ED25519_CMD_SCALAR_BYTES);
+  memset(y, 0, ED25519_CMD_SCALAR_BYTES);
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_ed25519_base_mul_fvsr(ujson_t *uj) {
+  cryptolib_sca_asym_ed25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_ed25519_base_mul_in_t(uj,
+                                                                 &uj_input));
+
+  uint8_t batch_scalar[uj_input.num_iterations][ED25519_CMD_SCALAR_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided data is used. When
+  // not sample_fixed, random data is generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_scalar[it], uj_input.scalar, ED25519_CMD_SCALAR_BYTES);
+    } else {
+      prng_rand_bytes(batch_scalar[it], ED25519_CMD_SCALAR_BYTES);
+    }
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke point mul for each data set.
+  uint8_t x[ED25519_CMD_SCALAR_BYTES];
+  uint8_t y[ED25519_CMD_SCALAR_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_ed25519_base_mul(batch_scalar[it], x, y,
+                                                    uj_input.cfg, &cfg_out,
+                                                    &status, uj_input.trigger));
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_ed25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, ED25519_CMD_SCALAR_BYTES);
+  memcpy(uj_output.y, y, ED25519_CMD_SCALAR_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_ed25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_ed25519_base_mul_daisy_chaining(
+    ujson_t *uj) {
+  cryptolib_sca_asym_ed25519_base_mul_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_ed25519_base_mul_in_t(uj,
+                                                                 &uj_input));
+
+  // Invoke point mul for each data set.
+  uint8_t scalar[ED25519_CMD_SCALAR_BYTES];
+  uint8_t x[ED25519_CMD_SCALAR_BYTES];
+  uint8_t y[ED25519_CMD_SCALAR_BYTES];
+  memset(scalar, 0, ED25519_CMD_SCALAR_BYTES);
+  memcpy(scalar, uj_input.scalar, ED25519_CMD_SCALAR_BYTES);
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_sca_asym_ed25519_base_mul(
+        scalar, x, y, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy out x coordinate to scalar
+    memset(scalar, 0, ED25519_CMD_SCALAR_BYTES);
+    memcpy(scalar, x, ED25519_CMD_SCALAR_BYTES);
+  }
+
+  // Send the last coordinates to host via UART.
+  cryptolib_sca_asym_ed25519_base_mul_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.x, x, ED25519_CMD_SCALAR_BYTES);
+  memcpy(uj_output.y, y, ED25519_CMD_SCALAR_BYTES);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_ed25519_base_mul_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_ed25519_sign(ujson_t *uj) {
+  cryptolib_sca_asym_ed25519_sign_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_asym_ed25519_sign_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a ED25519 signature.
+  // Trigger are over the API calls.
+
+  cryptolib_sca_asym_ed25519_sign_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  /////////////// STUB END ///////////////
+  RESP_OK(ujson_serialize_cryptolib_sca_asym_ed25519_sign_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  /////////////// STUB START ///////////////
+  // Add things like versioning.
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_asym(ujson_t *uj) {
+  cryptolib_sca_asym_subcommand_t cmd;
+  TRY(ujson_deserialize_cryptolib_sca_asym_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kCryptoLibScaAsymSubcommandRsaDec:
+      return handle_cryptolib_sca_asym_rsa_dec(uj);
+    case kCryptoLibScaAsymSubcommandRsaSign:
+      return handle_cryptolib_sca_asym_rsa_sign(uj);
+    case kCryptoLibScaAsymSubcommandPrime:
+      return handle_cryptolib_sca_asym_prime(uj);
+    case kCryptoLibScaAsymSubcommandP256BaseMulFvsr:
+      return handle_cryptolib_sca_asym_p256_base_mul_fvsr(uj);
+    case kCryptoLibScaAsymSubcommandP256BaseMulDaisy:
+      return handle_cryptolib_sca_asym_p256_base_mul_daisy_chaining(uj);
+    case kCryptoLibScaAsymSubcommandP256PointMul:
+      return handle_cryptolib_sca_asym_p256_point_mul(uj);
+    case kCryptoLibScaAsymSubcommandP256Ecdh:
+      return handle_cryptolib_sca_asym_p256_ecdh(uj);
+    case kCryptoLibScaAsymSubcommandP256Sign:
+      return handle_cryptolib_sca_asym_p256_sign(uj);
+    case kCryptoLibScaAsymSubcommandP384BaseMulFvsr:
+      return handle_cryptolib_sca_asym_p384_base_mul_fvsr(uj);
+    case kCryptoLibScaAsymSubcommandP384BaseMulDaisy:
+      return handle_cryptolib_sca_asym_p384_base_mul_daisy_chaining(uj);
+    case kCryptoLibScaAsymSubcommandP384PointMul:
+      return handle_cryptolib_sca_asym_p384_point_mul(uj);
+    case kCryptoLibScaAsymSubcommandP384Ecdh:
+      return handle_cryptolib_sca_asym_p384_ecdh(uj);
+    case kCryptoLibScaAsymSubcommandP384Sign:
+      return handle_cryptolib_sca_asym_p384_sign(uj);
+    case kCryptoLibScaAsymSubcommandSecp256k1BaseMulFvsr:
+      return handle_cryptolib_sca_asym_secp256k1_base_mul_fvsr(uj);
+    case kCryptoLibScaAsymSubcommandSecp256k1BaseMulDaisy:
+      return handle_cryptolib_sca_asym_secp256k1_base_mul_daisy_chaining(uj);
+    case kCryptoLibScaAsymSubcommandSecp256k1PointMul:
+      return handle_cryptolib_sca_asym_secp256k1_point_mul(uj);
+    case kCryptoLibScaAsymSubcommandSecp256k1Ecdh:
+      return handle_cryptolib_sca_asym_secp256k1_ecdh(uj);
+    case kCryptoLibScaAsymSubcommandSecp256k1Sign:
+      return handle_cryptolib_sca_asym_secp256k1_sign(uj);
+    case kCryptoLibScaAsymSubcommandX25519BaseMulFvsr:
+      return handle_cryptolib_sca_asym_x25519_base_mul_fvsr(uj);
+    case kCryptoLibScaAsymSubcommandX25519BaseMulDaisy:
+      return handle_cryptolib_sca_asym_x25519_base_mul_daisy_chaining(uj);
+    case kCryptoLibScaAsymSubcommandX25519PointMul:
+      return handle_cryptolib_sca_asym_x25519_point_mul(uj);
+    case kCryptoLibScaAsymSubcommandX25519Ecdh:
+      return handle_cryptolib_sca_asym_x25519_ecdh(uj);
+    case kCryptoLibScaAsymSubcommandEd25519BaseMulFvsr:
+      return handle_cryptolib_sca_asym_ed25519_base_mul_fvsr(uj);
+    case kCryptoLibScaAsymSubcommandEd25519BaseMulDaisy:
+      return handle_cryptolib_sca_asym_ed25519_base_mul_daisy_chaining(uj);
+    case kCryptoLibScaAsymSubcommandEd25519Sign:
+      return handle_cryptolib_sca_asym_ed25519_sign(uj);
+    case kCryptoLibScaAsymSubcommandInit:
+      return handle_cryptolib_sca_asym_init(uj);
+    default:
+      LOG_ERROR("Unrecognized CryptoLib SCA ASYM subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.h b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.h
new file mode 100644
index 0000000000000..3a8aa2a5eed57
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym.h
@@ -0,0 +1,388 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * cryptolib rsa sca dec test
+ *
+ * This SCA penetration test triggers a cryptolib RSA decrypt operation.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_rsa_dec_fvsr(ujson_t *uj);
+
+/**
+ * cryptolib rsa sca dec test with daisy chaining
+ *
+ * This SCA penetration test triggers a cryptolib RSA decrypt operation.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_rsa_dec_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib rsa sca sign test
+ *
+ * This SCA penetration test triggers a cryptolib RSA sign operation.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_rsa_sign_fvsr(ujson_t *uj);
+
+/**
+ * cryptolib rsa sca sign test with daisy chaining
+ *
+ * This SCA penetration test triggers a cryptolib RSA sign operation.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_rsa_sign_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib rsa sca dec test
+ *
+ * This SCA penetration test triggers a prime generation.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_prime(ujson_t *uj);
+
+/**
+ * The cryptolib sca p256 base mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p256_base_mul_fsvr(ujson_t *uj);
+
+/**
+ * The cryptolib sca p256 base mul handler with daisy chaining.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p256_base_mul_daisy_chain(ujson_t *uj);
+
+/**
+ * The cryptolib sca p256 point mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and a
+ * chosen point. It takes two scalars, the Bob scalar is multiplied by the base
+ * point and then multiplied by Alice's scalar.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p256_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib sca p256 ecdh handler.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p256_ecdh(ujson_t *uj);
+
+/**
+ * The cryptolib sca p256 sign handler.
+ *
+ * This SCA penetration test triggers a sign on p256.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p256_sign(ujson_t *uj);
+
+/**
+ * The cryptolib sca p384 base mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p384_base_mul_fvsr(ujson_t *uj);
+
+/**
+ * The cryptolib sca p384 base mul handler with daisy chaining.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p384_base_mul_daisy_chain(ujson_t *uj);
+
+/**
+ * The cryptolib sca p384 point mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and a
+ * chosen point. It takes two scalars, the Bob scalar is multiplied by the base
+ * point and then multiplied by Alice's scalar.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p384_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib sca p384 ecdh handler.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p384_ecdh(ujson_t *uj);
+
+/**
+ * The cryptolib sca p384 sign handler.
+ *
+ * This SCA penetration test triggers a sign on p384.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_p384_sign(ujson_t *uj);
+
+/**
+ * The cryptolib sca secp256k1 base mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_secp256k1_base_mul_fvsr(ujson_t *uj);
+
+/**
+ * The cryptolib sca secp256k1 base mul handler with daisy chaining.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_secp256k1_base_mul_daisy_chaining(
+    ujson_t *uj);
+
+/**
+ * The cryptolib sca secp256k1 point mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and a
+ * chosen point. It takes two scalars, the Bob scalar is multiplied by the base
+ * point and then multiplied by Alice's scalar.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_secp256k1_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib sca secp256k1 ecdh handler.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_secp256k1_ecdh(ujson_t *uj);
+
+/**
+ * The cryptolib sca secp256k1 sign handler.
+ *
+ * This SCA penetration test triggers a sign on secp256k1.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_secp256k1_sign(ujson_t *uj);
+
+/**
+ * The cryptolib sca x25519 base mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_x25519_base_mul_fvsr(ujson_t *uj);
+
+/**
+ * The cryptolib sca x25519 base mul handler with daisy chaining.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_x25519_base_mul_daisy_chaining(ujson_t *uj);
+
+/**
+ * The cryptolib sca x25519 point mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and a
+ * chosen point. It takes two scalars, the Bob scalar is multiplied by the base
+ * point and then multiplied by Alice's scalar.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_x25519_point_mul(ujson_t *uj);
+
+/**
+ * The cryptolib sca x25519 ecdh handler.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_x25519_ecdh(ujson_t *uj);
+
+/**
+ * The cryptolib sca ed25519 base mul handler.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_ed25519_base_mul_fsvr(ujson_t *uj);
+
+/**
+ * The cryptolib sca ed25519 base mul handler with daisy chaining.
+ *
+ * This SCA penetration test triggers a multiplication between a scalar and the
+ * base point.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_ed25519_base_mul_daisy_chaining(ujson_t *uj);
+
+/**
+ * The cryptolib sca ed25519 sign handler.
+ *
+ * This SCA penetration test triggers a sign on ed25519.
+ *
+ * See cryptolib_sca_asymcommands.h for inputs and outputs.
+ * See sca_cryptolib.json for examples of its use.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_ed25519_sign(ujson_t *uj);
+
+/**
+ * Initialize CryptoLib command handler.
+ *
+ * This command is designed to setup the CryptoLib SCA firmware.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym_init(ujson_t *uj);
+
+/**
+ * CryptoLib SCA command handler.
+ *
+ * Command handler for the CryptoLib SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_asym(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.c b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.c
new file mode 100644
index 0000000000000..5b53c9dcc4bec
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.c
@@ -0,0 +1,711 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.h"
+
+#include "sw/device/lib/base/math.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/impl/ecc/p256.h"
+#include "sw/device/lib/crypto/impl/ecc/p384.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/ecc_p256.h"
+#include "sw/device/lib/crypto/include/ecc_p384.h"
+#include "sw/device/lib/crypto/include/key_transport.h"
+#include "sw/device/lib/crypto/include/rsa.h"
+#include "sw/device/lib/crypto/include/sha2.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/cryptolib_asym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h"
+
+// OAEP label for testing.
+static const unsigned char kTestLabel[] = "Test label.";
+static const size_t kTestLabelLen = sizeof(kTestLabel) - 1;
+
+status_t cryptolib_sca_rsa_dec_impl(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len, size_t mode,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t data_out[RSA_CMD_MAX_MESSAGE_BYTES],
+    size_t *data_out_len, size_t hashing, size_t padding, size_t cfg_in,
+    size_t *cfg_out, size_t trigger) {
+  size_t private_key_bytes;
+  size_t private_key_blob_bytes;
+  size_t num_words;
+  size_t num_bytes;
+  otcrypto_rsa_size_t rsa_size;
+  switch (mode) {
+    case kPentestRsa2048:
+      private_key_bytes = kOtcryptoRsa2048PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa2048PrivateKeyblobBytes;
+      num_words = kPentestRsa2048NumWords;
+      num_bytes = kPentestRsa2048NumBytes;
+      rsa_size = kOtcryptoRsaSize2048;
+      break;
+    case kPentestRsa3072:
+      private_key_bytes = kOtcryptoRsa3072PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa3072PrivateKeyblobBytes;
+      num_words = kPentestRsa3072NumWords;
+      num_bytes = kPentestRsa3072NumBytes;
+      rsa_size = kOtcryptoRsaSize3072;
+      break;
+    case kPentestRsa4096:
+      private_key_bytes = kOtcryptoRsa4096PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa4096PrivateKeyblobBytes;
+      num_words = kPentestRsa4096NumWords;
+      num_bytes = kPentestRsa4096NumBytes;
+      rsa_size = kOtcryptoRsaSize4096;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA mode: %d", mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Sanity check inputs.
+  TRY_CHECK(num_bytes == *n_len);
+  // Ciphertext size is expected to be num_bytes.
+  TRY_CHECK(num_bytes == data_len);
+
+  otcrypto_hash_mode_t hash_mode;
+  size_t hash_digest_bytes;
+  switch (hashing) {
+    case kPentestRsaHashmodeSha256:
+      hash_mode = kOtcryptoHashModeSha256;
+      hash_digest_bytes = kPentestSha256DigestBytes;
+      break;
+    case kPentestRsaHashmodeSha384:
+      hash_mode = kOtcryptoHashModeSha384;
+      hash_digest_bytes = kPentestSha384DigestBytes;
+      break;
+    case kPentestRsaHashmodeSha512:
+      hash_mode = kOtcryptoHashModeSha512;
+      hash_digest_bytes = kPentestSha512DigestBytes;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA hash mode: %d", hashing);
+      return INVALID_ARGUMENT();
+  }
+
+  if (padding != 0) {
+    LOG_ERROR("Only padding = 0 (OAEP) is supported.");
+    return INVALID_ARGUMENT();
+  }
+
+  // Create two shares for the private exponent (second share is all-zero).
+  uint32_t d_buf[kPentestRsaMaxDWords];
+  memset(d_buf, 0, sizeof(d_buf));
+  memcpy(d_buf, d, num_bytes);
+
+  otcrypto_const_word32_buf_t d_share0 = {
+      .data = d_buf,
+      .len = num_words,
+  };
+  uint32_t share1[kPentestRsaMaxDWords] = {0};
+  otcrypto_const_word32_buf_t d_share1 = {
+      .data = share1,
+      .len = num_words,
+  };
+
+  // Construct the private key.
+  otcrypto_key_config_t private_key_config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeRsaEncryptOaep,
+      .key_length = private_key_bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+  size_t keyblob_words = ceil_div(private_key_blob_bytes, sizeof(uint32_t));
+  uint32_t keyblob[keyblob_words];
+  otcrypto_blinded_key_t private_key = {
+      .config = private_key_config,
+      .keyblob = keyblob,
+      .keyblob_length = private_key_blob_bytes,
+  };
+
+  // Create the modulus N buffer.
+  uint32_t n_buf[kPentestRsaMaxNWords];
+  memset(n_buf, 0, sizeof(d_buf));
+  memcpy(n_buf, n, num_bytes);
+
+  otcrypto_const_word32_buf_t modulus = {
+      .data = n_buf,
+      .len = num_words,
+  };
+
+  // Trigger window.
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_private_key_from_exponents(rsa_size, modulus, d_share0,
+                                              d_share1, &private_key));
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  uint32_t ciphertext_buf[num_words];
+  memset(ciphertext_buf, 0, sizeof(ciphertext_buf));
+  memcpy(ciphertext_buf, data, data_len);
+
+  otcrypto_const_word32_buf_t ciphertext = {
+      .len = num_words,
+      .data = ciphertext_buf,
+  };
+
+  // Create label.
+  otcrypto_const_byte_buf_t label_buf = {.data = kTestLabel,
+                                         .len = kTestLabelLen};
+
+  // Create output buffer for the plaintext.
+  size_t kMaxPlaintextBytes = num_bytes - 2 * hash_digest_bytes - 2;
+  uint8_t plaintext_buf[kMaxPlaintextBytes];
+  otcrypto_byte_buf_t plaintext = {
+      .data = plaintext_buf,
+      .len = kMaxPlaintextBytes,
+  };
+
+  size_t msg_len;
+  // Trigger window.
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_decrypt(&private_key, hash_mode, ciphertext, label_buf,
+                           plaintext, &msg_len));
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  *data_out_len = msg_len;
+  *cfg_out = 0;
+  memset(data_out, 0, RSA_CMD_MAX_MESSAGE_BYTES);
+  memcpy(data_out, plaintext_buf, msg_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_p256_ecdh_impl(
+    cryptolib_sca_asym_p256_ecdh_in_t uj_input,
+    cryptolib_sca_asym_p256_ecdh_out_t *uj_output) {
+  // Construct the private key object.
+  uint32_t private_keyblob[kPentestP256MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, uj_input.private_key, P256_CMD_BYTES);
+  memcpy(private_keyblob + kPentestP256MaskedPrivateKeyWords, 0,
+         P256_CMD_BYTES);
+  otcrypto_blinded_key_t private_key = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP256,
+              .key_length = kPentestP256Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
+      .checksum = 0,
+  };
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Construct the public key object.
+  uint32_t public_key_buf[kPentestP256Words * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, uj_input.public_x, P256_CMD_BYTES);
+  memcpy(public_key_buf + kPentestP256Words, uj_input.public_y, P256_CMD_BYTES);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP256,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a destination for the shared secret.
+  uint32_t shared_secretblob[kPentestP256Words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kPentestP256Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
+  };
+
+  pentest_set_trigger_high();
+  otcrypto_status_t status_out =
+      otcrypto_ecdh_p256(&private_key, &public_key, &shared_secret);
+  pentest_set_trigger_low();
+
+  uint32_t share0[kPentestP256Words];
+  uint32_t share1[kPentestP256Words];
+  uint32_t ss[kPentestP256Words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < kPentestP256Words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  uj_output->status = (size_t)status_out.value;
+  memset(uj_output->shared_key, 0, P256_CMD_BYTES);
+  memcpy(uj_output->shared_key, ss, P256_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_rsa_sign_impl(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t sig[RSA_CMD_MAX_SIGNATURE_BYTES], size_t *sig_len,
+    size_t hashing, size_t padding, size_t cfg_in, size_t *cfg_out,
+    size_t trigger) {
+  size_t private_key_bytes;
+  size_t private_key_blob_bytes;
+  size_t num_words;
+  otcrypto_rsa_size_t rsa_size;
+  switch (*n_len) {
+    case kPentestRsa2048NumBytes:
+      private_key_bytes = kOtcryptoRsa2048PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa2048PrivateKeyblobBytes;
+      num_words = kPentestRsa2048NumWords;
+      rsa_size = kOtcryptoRsaSize2048;
+      break;
+    case kPentestRsa3072NumBytes:
+      private_key_bytes = kOtcryptoRsa3072PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa3072PrivateKeyblobBytes;
+      num_words = kPentestRsa3072NumWords;
+      rsa_size = kOtcryptoRsaSize3072;
+      break;
+    case kPentestRsa4096NumBytes:
+      private_key_bytes = kOtcryptoRsa4096PrivateKeyBytes;
+      private_key_blob_bytes = kOtcryptoRsa4096PrivateKeyblobBytes;
+      num_words = kPentestRsa4096NumWords;
+      rsa_size = kOtcryptoRsaSize4096;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA mode: %d", *n_len);
+      return INVALID_ARGUMENT();
+  }
+
+  otcrypto_key_mode_t key_mode;
+  otcrypto_rsa_padding_t padding_mode;
+  switch (padding) {
+    case kPentestRsaPaddingPkcs:
+      padding_mode = kOtcryptoRsaPaddingPkcs;
+      key_mode = kOtcryptoKeyModeRsaSignPkcs;
+      break;
+    case kPentestRsaPaddingPss:
+      padding_mode = kOtcryptoRsaPaddingPss;
+      key_mode = kOtcryptoKeyModeRsaSignPss;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA padding mode: %d", padding);
+      return INVALID_ARGUMENT();
+  };
+
+  otcrypto_hash_mode_t hash_mode;
+  size_t hash_digest_words;
+  switch (hashing) {
+    case kPentestRsaHashmodeSha256:
+      hash_mode = kOtcryptoHashModeSha256;
+      hash_digest_words = kPentestSha256DigestWords;
+      break;
+    case kPentestRsaHashmodeSha384:
+      hash_mode = kOtcryptoHashModeSha384;
+      hash_digest_words = kPentestSha384DigestWords;
+      break;
+    case kPentestRsaHashmodeSha512:
+      hash_mode = kOtcryptoHashModeSha512;
+      hash_digest_words = kPentestSha512DigestWords;
+      break;
+    default:
+      LOG_ERROR("Unsupported RSA hash mode: %d", hashing);
+      return INVALID_ARGUMENT();
+  }
+  // Create two shares for the private exponent (second share is all-zero).
+  uint32_t d_buf[kPentestRsaMaxDWords];
+  memset(d_buf, 0, sizeof(d_buf));
+  memcpy(d_buf, d, *n_len);
+
+  otcrypto_const_word32_buf_t d_share0 = {
+      .data = d_buf,
+      .len = num_words,
+  };
+  uint32_t share1[kPentestRsaMaxDWords] = {0};
+  otcrypto_const_word32_buf_t d_share1 = {
+      .data = share1,
+      .len = num_words,
+  };
+
+  // Construct the private key.
+  otcrypto_key_config_t private_key_config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = private_key_bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+  size_t keyblob_words = ceil_div(private_key_blob_bytes, sizeof(uint32_t));
+  uint32_t keyblob[keyblob_words];
+  otcrypto_blinded_key_t private_key = {
+      .config = private_key_config,
+      .keyblob = keyblob,
+      .keyblob_length = private_key_blob_bytes,
+  };
+
+  // Create the modulus N buffer.
+  uint32_t n_buf[kPentestRsaMaxNWords];
+  memset(n_buf, 0, sizeof(n_buf));
+  memcpy(n_buf, n, *n_len);
+
+  otcrypto_const_word32_buf_t modulus = {
+      .data = n_buf,
+      .len = num_words,
+  };
+
+  // Trigger window.
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_private_key_from_exponents(rsa_size, modulus, d_share0,
+                                              d_share1, &private_key));
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  // Copy the message into the buffer.
+  uint8_t msg[data_len];
+  memcpy(msg, data, data_len);
+  otcrypto_const_byte_buf_t msg_buf = {
+      .len = data_len,
+      .data = msg,
+  };
+
+  // Buffer to store the digest.
+  uint32_t msg_digest_data[hash_digest_words];
+  otcrypto_hash_digest_t msg_digest = {
+      .data = msg_digest_data,
+      .len = ARRAYSIZE(msg_digest_data),
+      .mode = hash_mode,
+  };
+  // Trigger window.
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  // Hash the message.
+  if (hash_mode == kOtcryptoHashModeSha256) {
+    TRY(otcrypto_sha2_256(msg_buf, &msg_digest));
+  } else if (hash_mode == kOtcryptoHashModeSha384) {
+    TRY(otcrypto_sha2_384(msg_buf, &msg_digest));
+  } else {
+    TRY(otcrypto_sha2_512(msg_buf, &msg_digest));
+  }
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  uint32_t sig_buf[kPentestRsaMaxMsgWords];
+  otcrypto_word32_buf_t rsa_sig = {
+      .data = sig_buf,
+      .len = num_words,
+  };
+
+  // Trigger window.
+  if (trigger & kPentestTrigger3) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_rsa_sign(&private_key, msg_digest, padding_mode, rsa_sig));
+  // Trigger window.
+  if (trigger & kPentestTrigger3) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  *sig_len = *n_len;
+  *cfg_out = 0;
+  memset(sig, 0, RSA_CMD_MAX_SIGNATURE_BYTES);
+  memcpy(sig, sig_buf, *sig_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_p256_sign_impl(
+    cryptolib_sca_asym_p256_sign_in_t uj_input,
+    cryptolib_sca_asym_p256_sign_out_t *uj_output) {
+  static const otcrypto_key_config_t kP256PrivateKeyConfig = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
+      .key_length = kPentestP256Bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create the private key.
+  p256_masked_scalar_t private_key_masked;
+  otcrypto_blinded_key_t private_key = {
+      .config = kP256PrivateKeyConfig,
+      .keyblob_length = sizeof(private_key_masked),
+      .keyblob = (uint32_t *)&private_key_masked,
+  };
+  memset(private_key_masked.share0, 0, kP256MaskedScalarShareBytes);
+  memcpy(private_key_masked.share0, uj_input.scalar, kP256ScalarBytes);
+  memset(private_key_masked.share1, 0, kP256MaskedScalarShareBytes);
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Create the public key.
+  p256_point_t pub_p256;
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP256,
+      .key_length = sizeof(p256_point_t),
+      .key = (uint32_t *)&pub_p256,
+  };
+  memset(pub_p256.x, 0, kP256CoordBytes);
+  memcpy(pub_p256.x, uj_input.pubx, P256_CMD_BYTES);
+  memset(pub_p256.y, 0, kP256CoordBytes);
+  memcpy(pub_p256.y, uj_input.puby, P256_CMD_BYTES);
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a key pair if requested.
+  // This will overwrite the private and public key above.
+  if (uj_input.cfg == 1) {
+    // Trigger window 0.
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_ecdsa_p256_keygen(&private_key, &public_key));
+    pentest_set_trigger_low();
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_low();
+    }
+  }
+
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP256Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P256_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha256,
+      .len = kPentestP256Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Set up the signature buffer.
+  uint32_t sig[kPentestP256Words * 2] = {0};
+  otcrypto_word32_buf_t signature_mut = {
+      .data = sig,
+      .len = ARRAYSIZE(sig),
+  };
+
+  // Trigger window 1.
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_ecdsa_p256_sign_verify(&private_key, &public_key, message_digest,
+                                      signature_mut));
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->r, 0, P256_CMD_BYTES);
+  memset(uj_output->s, 0, P256_CMD_BYTES);
+  p256_ecdsa_signature_t *signature_p256 =
+      (p256_ecdsa_signature_t *)signature_mut.data;
+  memcpy(uj_output->r, signature_p256->r, kP256ScalarBytes);
+  memcpy(uj_output->s, signature_p256->s, kP256ScalarBytes);
+
+  // Return the public key.
+  p256_point_t *pub = (p256_point_t *)public_key.key;
+  memcpy(uj_output->pubx, pub->x, P256_CMD_BYTES);
+  memcpy(uj_output->puby, pub->y, P256_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_p384_ecdh_impl(
+    cryptolib_sca_asym_p384_ecdh_in_t uj_input,
+    cryptolib_sca_asym_p384_ecdh_out_t *uj_output) {
+  // Construct the private key object.
+  uint32_t private_keyblob[kPentestP384MaskedPrivateKeyWords * 2];
+  memset(private_keyblob, 0, sizeof(private_keyblob));
+  memcpy(private_keyblob, uj_input.private_key, P384_CMD_BYTES);
+  memcpy(private_keyblob + kPentestP384MaskedPrivateKeyWords, 0,
+         P384_CMD_BYTES);
+  otcrypto_blinded_key_t private_key = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeEcdhP384,
+              .key_length = kPentestP384Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(private_keyblob),
+      .keyblob = private_keyblob,
+      .checksum = 0,
+  };
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Construct the public key object.
+  uint32_t public_key_buf[kPentestP384Words * 2];
+  memset(public_key_buf, 0, sizeof(public_key_buf));
+  memcpy(public_key_buf, uj_input.public_x, P384_CMD_BYTES);
+  memcpy(public_key_buf + kPentestP384Words, uj_input.public_y, P384_CMD_BYTES);
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdhP384,
+      .key_length = sizeof(public_key_buf),
+      .key = public_key_buf,
+  };
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a destination for the shared secret.
+  uint32_t shared_secretblob[kPentestP384Words * 2];
+  memset(shared_secretblob, 0, sizeof(shared_secretblob));
+  otcrypto_blinded_key_t shared_secret = {
+      .config =
+          {
+              .version = kOtcryptoLibVersion1,
+              .key_mode = kOtcryptoKeyModeAesCtr,
+              .key_length = kPentestP384Bytes,
+              .hw_backed = kHardenedBoolFalse,
+              .exportable = kHardenedBoolTrue,
+              .security_level = kOtcryptoKeySecurityLevelLow,
+          },
+      .keyblob_length = sizeof(shared_secretblob),
+      .keyblob = shared_secretblob,
+  };
+
+  pentest_set_trigger_high();
+  TRY(otcrypto_ecdh_p384(&private_key, &public_key, &shared_secret));
+  pentest_set_trigger_low();
+
+  uint32_t share0[kPentestP384Words];
+  uint32_t share1[kPentestP384Words];
+  uint32_t ss[kPentestP384Words];
+  TRY(otcrypto_export_blinded_key(
+      &shared_secret,
+      (otcrypto_word32_buf_t){.data = share0, .len = ARRAYSIZE(share0)},
+      (otcrypto_word32_buf_t){.data = share1, .len = ARRAYSIZE(share1)}));
+  for (size_t i = 0; i < kPentestP384Words; i++) {
+    ss[i] = share0[i] ^ share1[i];
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->shared_key, 0, P384_CMD_BYTES);
+  memcpy(uj_output->shared_key, ss, P384_CMD_BYTES);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_p384_sign_impl(
+    cryptolib_sca_asym_p384_sign_in_t uj_input,
+    cryptolib_sca_asym_p384_sign_out_t *uj_output) {
+  static const otcrypto_key_config_t kP384PrivateKeyConfig = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
+      .key_length = kPentestP384Bytes,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create the private key.
+  p384_masked_scalar_t private_key_masked;
+  otcrypto_blinded_key_t private_key = {
+      .config = kP384PrivateKeyConfig,
+      .keyblob_length = sizeof(private_key_masked),
+      .keyblob = (uint32_t *)&private_key_masked,
+  };
+  memset(private_key_masked.share0, 0, kP384MaskedScalarShareBytes);
+  memcpy(private_key_masked.share0, uj_input.scalar, kP384ScalarBytes);
+  memset(private_key_masked.share1, 0, kP384MaskedScalarShareBytes);
+  private_key.checksum = integrity_blinded_checksum(&private_key);
+
+  // Create the public key.
+  p384_point_t pub_p384;
+  otcrypto_unblinded_key_t public_key = {
+      .key_mode = kOtcryptoKeyModeEcdsaP384,
+      .key_length = sizeof(p384_point_t),
+      .key = (uint32_t *)&pub_p384,
+  };
+  memset(pub_p384.x, 0, kP384CoordBytes);
+  memcpy(pub_p384.x, uj_input.pubx, P384_CMD_BYTES);
+  memset(pub_p384.y, 0, kP384CoordBytes);
+  memcpy(pub_p384.y, uj_input.puby, P384_CMD_BYTES);
+  public_key.checksum = integrity_unblinded_checksum(&public_key);
+
+  // Create a key pair if requested.
+  // This will overwrite the private and public key above.
+  if (uj_input.cfg == 1) {
+    // Trigger window 0.
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_high();
+    }
+    TRY(otcrypto_ecdsa_p384_keygen(&private_key, &public_key));
+    pentest_set_trigger_low();
+    if (uj_input.trigger == 0) {
+      pentest_set_trigger_low();
+    }
+  }
+
+  // Set up the message buffer.
+  uint32_t message_buf[kPentestP384Words];
+  memset(message_buf, 0, sizeof(message_buf));
+  memcpy(message_buf, uj_input.message, P384_CMD_BYTES);
+
+  const otcrypto_hash_digest_t message_digest = {
+      .mode = kOtcryptoHashModeSha384,
+      .len = kPentestP384Words,
+      .data = (uint32_t *)message_buf,
+  };
+
+  // Set up the signature buffer.
+  uint32_t sig[kPentestP384Words * 2] = {0};
+  otcrypto_word32_buf_t signature_mut = {
+      .data = sig,
+      .len = ARRAYSIZE(sig),
+  };
+
+  // Trigger window 1.
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_ecdsa_p384_sign_verify(&private_key, &public_key, message_digest,
+                                      signature_mut));
+  if (uj_input.trigger == 1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  uj_output->cfg = 0;
+  memset(uj_output->r, 0, P384_CMD_BYTES);
+  memset(uj_output->s, 0, P384_CMD_BYTES);
+  p384_ecdsa_signature_t *signature_p384 =
+      (p384_ecdsa_signature_t *)signature_mut.data;
+  memcpy(uj_output->r, signature_p384->r, kP384ScalarBytes);
+  memcpy(uj_output->s, signature_p384->s, kP384ScalarBytes);
+
+  // Return the public key.
+  p384_point_t *pub = (p384_point_t *)public_key.key;
+  memcpy(uj_output->pubx, pub->x, P384_CMD_BYTES);
+  memcpy(uj_output->puby, pub->y, P384_CMD_BYTES);
+
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.h b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.h
new file mode 100644
index 0000000000000..02f5de7753db3
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_asym_impl.h
@@ -0,0 +1,105 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_IMPL_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_IMPL_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h"
+
+/**
+ * Wrapper to RSA decryption implementation.
+ *
+ * @param data Input data.
+ * @param data_len Input data length.
+ * @param mode Mode.
+ * @param n RSA modulus.
+ * @param d RSA private key.
+ * @param[out] n_len RSA length.
+ * @param[out] data_out Output data.
+ * @param[out] data_out_len Output data length.
+ * @param hashing Hashing mode.
+ * @param padding Padding mode.
+ * @param cfg_in Input config.
+ * @param[out] cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_rsa_dec_impl(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len, size_t mode,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t data_out[RSA_CMD_MAX_MESSAGE_BYTES],
+    size_t *data_out_len, size_t hashing, size_t padding, size_t cfg_in,
+    size_t *cfg_out, size_t trigger);
+
+/**
+ * Wrapper to RSA decryption implementation.
+ *
+ * @param data Input data.
+ * @param data_len Input data length.
+ * @param n RSA modulus.
+ * @param d RSA private key.
+ * @param[out] n_len RSA length.
+ * @param[out] sig Output data.
+ * @param[out] sig_len Output data length.
+ * @param hashing Hashing mode.
+ * @param padding Padding mode.
+ * @param cfg_in Input config.
+ * @param[out] cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_rsa_sign_impl(
+    uint8_t data[RSA_CMD_MAX_MESSAGE_BYTES], size_t data_len,
+    uint8_t n[RSA_CMD_MAX_N_BYTES], uint8_t d[RSA_CMD_MAX_N_BYTES],
+    size_t *n_len, uint8_t sig[RSA_CMD_MAX_SIGNATURE_BYTES], size_t *sig_len,
+    size_t hashing, size_t padding, size_t cfg_in, size_t *cfg_out,
+    size_t trigger);
+
+/**
+ * Wrapper to ECDH in P256 cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_p256_ecdh_impl(
+    cryptolib_sca_asym_p256_ecdh_in_t uj_input,
+    cryptolib_sca_asym_p256_ecdh_out_t *uj_output);
+
+/**
+ * Wrapper to P256 Sign cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_p256_sign_impl(
+    cryptolib_sca_asym_p256_sign_in_t uj_input,
+    cryptolib_sca_asym_p256_sign_out_t *uj_output);
+
+/**
+ * Wrapper to ECDH in P384 cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_p384_ecdh_impl(
+    cryptolib_sca_asym_p384_ecdh_in_t uj_input,
+    cryptolib_sca_asym_p384_ecdh_out_t *uj_output);
+
+/**
+ * Wrapper to P384 Sign cryptolib implementation.
+ *
+ * @param uj_input An initialized uJSON context.
+ * @param uj_output An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_p384_sign_impl(
+    cryptolib_sca_asym_p384_sign_in_t uj_input,
+    cryptolib_sca_asym_p384_sign_out_t *uj_output);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_ASYM_IMPL_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.c b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.c
new file mode 100644
index 0000000000000..e6612f46dc6a4
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.c
@@ -0,0 +1,971 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static status_t trigger_cryptolib_aes(
+    uint8_t data_in[AES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t key[AES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[AES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    size_t padding, size_t mode, bool op_enc, size_t cfg_in, size_t *cfg_out,
+    size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform an AES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // The total size of this test can be large due to all these options.
+  // Triggers are over the API calls.
+  memset(data_out, 0, AES_CMD_MAX_MSG_BYTES);
+  *data_out_len = AES_CMD_MAX_MSG_BYTES;
+  *cfg_out = 0;
+  *status = (size_t)cryptolib_sca_aes_impl(
+                data_in, data_in_len, key, key_len, iv, data_out, data_out_len,
+                padding, mode, op_enc, cfg_in, cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+static status_t trigger_cryptolib_cmac(
+    uint8_t data_in[AES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t key[AES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[AES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    size_t cfg_in, size_t *cfg_out, size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a CMAC encryption.
+  // Verify the tag before sending the output.
+  // Triggers are over the API calls.
+
+  memset(data_out, 0, AES_CMD_MAX_MSG_BYTES);
+  *data_out_len = AES_CMD_MAX_MSG_BYTES;
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+static status_t trigger_cryptolib_gcm(
+    uint8_t data_in[AES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t aad[AES_CMD_MAX_MSG_BYTES], size_t aad_len,
+    uint8_t key[AES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[AES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    uint8_t tag[AES_CMD_MAX_MSG_BYTES], size_t *tag_len, size_t cfg_in,
+    size_t *cfg_out, size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a GCM encryption with aad and generate a tag.
+  // Then, verify that tag again, before sending the output.
+  // Trigger are over the API calls.
+  *status = (size_t)cryptolib_sca_gcm_impl(
+                data_in, data_in_len, aad, aad_len, key, key_len, iv, data_out,
+                data_out_len, tag, tag_len, cfg_in, cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+static status_t trigger_cryptolib_tdes(
+    uint8_t data_in[TDES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t key[TDES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[TDES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[TDES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    size_t padding, size_t mode, bool op_enc, size_t cfg_in, size_t *cfg_out,
+    size_t *status, size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a TDES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // Triggers are over the API calls.
+
+  memset(data_out, 0, TDES_CMD_MAX_MSG_BYTES);
+  *data_out_len = TDES_CMD_MAX_MSG_BYTES;
+  *cfg_out = 0;
+  *status = 0;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+static status_t trigger_cryptolib_hmac(
+    uint8_t data_in[HMAC_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t key[HMAC_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t data_out[HMAC_CMD_MAX_TAG_BYTES], size_t *data_out_len,
+    size_t padding, size_t mode, size_t cfg_in, size_t *cfg_out, size_t *status,
+    size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a TDES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // Triggers are over the API calls.
+  *status = (size_t)cryptolib_sca_hmac_impl(data_in, data_in_len, key, key_len,
+                                            data_out, data_out_len, padding,
+                                            mode, cfg_in, cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+static status_t trigger_cryptolib_drbg_generate(
+    uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES], size_t nonce_len,
+    uint8_t data_out[DRBG_CMD_MAX_OUTPUT_BYTES], size_t data_out_len,
+    size_t mode, size_t cfg_in, size_t *cfg_out, size_t *status,
+    size_t trigger) {
+  /////////////// STUB START ///////////////
+  // Perform a TDES encryption or decryption.
+  // Adjust the mode of operation and the padding mode.
+  // Triggers are over the API calls.
+  *status = (size_t)cryptolib_sca_drbg_generate_impl(nonce, nonce_len, data_out,
+                                                     data_out_len, mode, cfg_in,
+                                                     cfg_out, trigger)
+                .value;
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_aes_fvsr_plaintext(ujson_t *uj) {
+  cryptolib_sca_sym_aes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_aes_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_data_in[it], uj_input.data, uj_input.data_len);
+    } else {
+      prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    }
+    memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke AES for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_aes(batch_data_in[it], uj_input.data_len,
+                              batch_keys[it], uj_input.key_len, uj_input.iv,
+                              data_out_buf, &data_out_len, uj_input.padding,
+                              uj_input.mode, uj_input.op_enc, uj_input.cfg,
+                              &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_aes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_aes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_aes_fvsr_key(ujson_t *uj) {
+  cryptolib_sca_sym_aes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_aes_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    } else {
+      prng_rand_bytes(batch_keys[it], uj_input.key_len);
+    }
+    prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke AES for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_aes(batch_data_in[it], uj_input.data_len,
+                              batch_keys[it], uj_input.key_len, uj_input.iv,
+                              data_out_buf, &data_out_len, uj_input.padding,
+                              uj_input.mode, uj_input.op_enc, uj_input.cfg,
+                              &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_aes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_aes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_aes_daisy_chain(ujson_t *uj) {
+  cryptolib_sca_sym_aes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_aes_in_t(uj, &uj_input));
+
+  // Fix the key
+  uint8_t key[AES_CMD_MAX_KEY_BYTES];
+  // Pad with zero
+  memset(key, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key, uj_input.key, uj_input.key_len);
+
+  // Invoke AES for each data set.
+  uint8_t data_in_buf[AES_CMD_MAX_MSG_BYTES];
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  // Pad with zeros
+  memset(data_in_buf, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_aes(
+        data_in_buf, uj_input.data_len, key, uj_input.key_len, uj_input.iv,
+        data_out_buf, &data_out_len, uj_input.padding, uj_input.mode,
+        uj_input.op_enc, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy output to input
+    memset(data_in_buf, 0, uj_input.data_len);
+    memcpy(data_in_buf, data_out_buf, uj_input.data_len);
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_aes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_aes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_cmac_fvsr_plaintext(ujson_t *uj) {
+  cryptolib_sca_sym_cmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_cmac_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_data_in[it], uj_input.data, uj_input.data_len);
+    } else {
+      prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    }
+    memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke CMAC for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_cmac(batch_data_in[it], uj_input.data_len,
+                               batch_keys[it], uj_input.key_len, uj_input.iv,
+                               data_out_buf, &data_out_len, uj_input.cfg,
+                               &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_cmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_cmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_cmac_fvsr_key(ujson_t *uj) {
+  cryptolib_sca_sym_cmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_cmac_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    } else {
+      prng_rand_bytes(batch_keys[it], uj_input.key_len);
+    }
+    prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke CMAC for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_cmac(batch_data_in[it], uj_input.data_len,
+                               batch_keys[it], uj_input.key_len, uj_input.iv,
+                               data_out_buf, &data_out_len, uj_input.cfg,
+                               &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_cmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_cmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_cmac_daisy_chain(ujson_t *uj) {
+  cryptolib_sca_sym_cmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_cmac_in_t(uj, &uj_input));
+
+  // Fix the key
+  uint8_t key[AES_CMD_MAX_KEY_BYTES];
+  // Pad with zero
+  memset(key, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key, uj_input.key, uj_input.key_len);
+
+  // Invoke CMAC for each data set.
+  uint8_t data_in_buf[AES_CMD_MAX_MSG_BYTES];
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  // Pad with zeros
+  memset(data_in_buf, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_cmac(data_in_buf, uj_input.data_len, key,
+                               uj_input.key_len, uj_input.iv, data_out_buf,
+                               &data_out_len, uj_input.cfg, &cfg_out, &status,
+                               uj_input.trigger));
+    // Copy output to input
+    memset(data_in_buf, 0, uj_input.data_len);
+    memcpy(data_in_buf, data_out_buf, uj_input.data_len);
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_cmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_cmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_gcm_fvsr_plaintext(ujson_t *uj) {
+  cryptolib_sca_sym_gcm_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_gcm_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is fixed. When
+  // not sample_fixed, the provided key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_data_in[it], uj_input.data, uj_input.data_len);
+    } else {
+      prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    }
+    memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke GCM for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  uint8_t tag_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t tag_len = 16;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_gcm(batch_data_in[it], uj_input.data_len,
+                              uj_input.aad, uj_input.aad_len, batch_keys[it],
+                              uj_input.key_len, uj_input.iv, data_out_buf,
+                              &data_out_len, tag_buf, &tag_len, uj_input.cfg,
+                              &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_gcm_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  memcpy(uj_output.tag, tag_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.tag_len = tag_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_gcm_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_gcm_fvsr_key(ujson_t *uj) {
+  cryptolib_sca_sym_gcm_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_gcm_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][AES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][AES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    } else {
+      prng_rand_bytes(batch_keys[it], uj_input.key_len);
+    }
+    prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke GCM for each data set.
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  uint8_t tag_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t tag_len = 16;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_gcm(batch_data_in[it], uj_input.data_len,
+                              uj_input.aad, uj_input.aad_len, batch_keys[it],
+                              uj_input.key_len, uj_input.iv, data_out_buf,
+                              &data_out_len, tag_buf, &tag_len, uj_input.cfg,
+                              &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_gcm_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  memcpy(uj_output.tag, tag_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.tag_len = tag_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_gcm_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_gcm_daisy_chain(ujson_t *uj) {
+  cryptolib_sca_sym_gcm_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_gcm_in_t(uj, &uj_input));
+
+  // Fix the key
+  uint8_t key[AES_CMD_MAX_KEY_BYTES];
+  // Pad with zero
+  memset(key, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key, uj_input.key, uj_input.key_len);
+
+  // Invoke GCM for each data set.
+  uint8_t data_in_buf[AES_CMD_MAX_MSG_BYTES];
+  uint8_t data_out_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  uint8_t tag_buf[AES_CMD_MAX_MSG_BYTES];
+  size_t tag_len = 16;
+  size_t cfg_out;
+  size_t status;
+  // Pad with zeros
+  memset(data_in_buf, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_gcm(
+        data_in_buf, uj_input.data_len, uj_input.aad, uj_input.aad_len, key,
+        uj_input.key_len, uj_input.iv, data_out_buf, &data_out_len, tag_buf,
+        &tag_len, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy output to input
+    memset(data_in_buf, 0, uj_input.data_len);
+    memcpy(data_in_buf, data_out_buf, uj_input.data_len);
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_gcm_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  memcpy(uj_output.tag, tag_buf, AES_CMD_MAX_MSG_BYTES);
+  uj_output.tag_len = tag_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_gcm_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_tdes_fvsr_plaintext(ujson_t *uj) {
+  cryptolib_sca_sym_tdes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_tdes_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][TDES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][TDES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_data_in[it], uj_input.data, uj_input.data_len);
+    } else {
+      prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    }
+    memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke TDES for each data set.
+  uint8_t data_out_buf[TDES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_tdes(batch_data_in[it], uj_input.data_len,
+                               batch_keys[it], uj_input.key_len, uj_input.iv,
+                               data_out_buf, &data_out_len, uj_input.padding,
+                               uj_input.mode, uj_input.op_enc, uj_input.cfg,
+                               &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_tdes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, TDES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_tdes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_tdes_fvsr_key(ujson_t *uj) {
+  cryptolib_sca_sym_tdes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_tdes_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][TDES_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][TDES_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    } else {
+      prng_rand_bytes(batch_keys[it], uj_input.key_len);
+    }
+    prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke TDES for each data set.
+  uint8_t data_out_buf[TDES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_tdes(batch_data_in[it], uj_input.data_len,
+                               batch_keys[it], uj_input.key_len, uj_input.iv,
+                               data_out_buf, &data_out_len, uj_input.padding,
+                               uj_input.mode, uj_input.op_enc, uj_input.cfg,
+                               &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_tdes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, TDES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_tdes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_tdes_daisy_chain(ujson_t *uj) {
+  cryptolib_sca_sym_tdes_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_tdes_in_t(uj, &uj_input));
+
+  // Fix the key
+  uint8_t key[TDES_CMD_MAX_KEY_BYTES];
+  // Pad with zero
+  memset(key, 0, TDES_CMD_MAX_KEY_BYTES);
+  memcpy(key, uj_input.key, uj_input.key_len);
+
+  // Invoke TDES for each data set.
+  uint8_t data_in_buf[TDES_CMD_MAX_MSG_BYTES];
+  uint8_t data_out_buf[TDES_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  // Pad with zeros
+  memset(data_in_buf, 0, TDES_CMD_MAX_MSG_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_tdes(
+        data_in_buf, uj_input.data_len, key, uj_input.key_len, uj_input.iv,
+        data_out_buf, &data_out_len, uj_input.padding, uj_input.mode,
+        uj_input.op_enc, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+    // Copy output to input
+    memset(data_in_buf, 0, uj_input.data_len);
+    memcpy(data_in_buf, data_out_buf, uj_input.data_len);
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_tdes_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, TDES_CMD_MAX_MSG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_tdes_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_hmac_fvsr_plaintext(ujson_t *uj) {
+  cryptolib_sca_sym_hmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_hmac_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][HMAC_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][HMAC_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_data_in[it], uj_input.data, uj_input.data_len);
+    } else {
+      prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    }
+    memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke HMAC for each data set.
+  uint8_t data_out_buf[HMAC_CMD_MAX_TAG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_hmac(
+        batch_data_in[it], uj_input.data_len, batch_keys[it], uj_input.key_len,
+        data_out_buf, &data_out_len, uj_input.padding, uj_input.mode,
+        uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_hmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, HMAC_CMD_MAX_TAG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_hmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_hmac_fvsr_key(ujson_t *uj) {
+  cryptolib_sca_sym_hmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_hmac_in_t(uj, &uj_input));
+
+  uint8_t batch_data_in[uj_input.num_iterations][HMAC_CMD_MAX_MSG_BYTES];
+  uint8_t batch_keys[uj_input.num_iterations][HMAC_CMD_MAX_KEY_BYTES];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_input.key, uj_input.key_len);
+    } else {
+      prng_rand_bytes(batch_keys[it], uj_input.key_len);
+    }
+    prng_rand_bytes(batch_data_in[it], uj_input.data_len);
+    sample_fixed = prng_rand_byte() & 0x1;
+  }
+
+  // Invoke HMAC for each data set.
+  uint8_t data_out_buf[HMAC_CMD_MAX_TAG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_hmac(
+        batch_data_in[it], uj_input.data_len, batch_keys[it], uj_input.key_len,
+        data_out_buf, &data_out_len, uj_input.padding, uj_input.mode,
+        uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_hmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, HMAC_CMD_MAX_TAG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_hmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_hmac_daisy_chain(ujson_t *uj) {
+  cryptolib_sca_sym_hmac_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_hmac_in_t(uj, &uj_input));
+
+  // Fix the key
+  uint8_t key[HMAC_CMD_MAX_KEY_BYTES];
+  // Pad with zero
+  memset(key, 0, HMAC_CMD_MAX_KEY_BYTES);
+  memcpy(key, uj_input.key, uj_input.key_len);
+
+  // Invoke HMAC for each data set.
+  uint8_t data_in_buf[HMAC_CMD_MAX_MSG_BYTES];
+  uint8_t data_out_buf[HMAC_CMD_MAX_MSG_BYTES];
+  size_t data_out_len;
+  size_t cfg_out;
+  size_t status;
+  // Pad with zeros
+  memset(data_in_buf, 0, HMAC_CMD_MAX_MSG_BYTES);
+  memcpy(data_in_buf, uj_input.data, uj_input.data_len);
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    TRY(trigger_cryptolib_hmac(data_in_buf, uj_input.data_len, key,
+                               uj_input.key_len, data_out_buf, &data_out_len,
+                               uj_input.padding, uj_input.mode, uj_input.cfg,
+                               &cfg_out, &status, uj_input.trigger));
+    // Copy output to input
+    memset(data_in_buf, 0, HMAC_CMD_MAX_MSG_BYTES);
+    memcpy(data_in_buf, data_out_buf, uj_input.data_len);
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_hmac_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memcpy(uj_output.data, data_out_buf, HMAC_CMD_MAX_TAG_BYTES);
+  uj_output.data_len = data_out_len;
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_hmac_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_drbg_generate_batch(ujson_t *uj) {
+  cryptolib_sca_sym_drbg_generate_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_drbg_generate_in_t(uj, &uj_input));
+
+  // Invoke DRBG for each data set.
+  uint8_t data_out_buf[DRBG_CMD_MAX_OUTPUT_BYTES];
+  uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES];
+  size_t cfg_out;
+  size_t status;
+  for (size_t it = 0; it < uj_input.num_iterations; it++) {
+    prng_rand_bytes(nonce, uj_input.nonce_len);
+    TRY(trigger_cryptolib_drbg_generate(
+        nonce, uj_input.nonce_len, data_out_buf, uj_input.data_len,
+        uj_input.mode, uj_input.cfg, &cfg_out, &status, uj_input.trigger));
+  }
+
+  // Send the last data_out to host via UART.
+  cryptolib_sca_sym_drbg_generate_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  memset(uj_output.data, 0, DRBG_CMD_MAX_OUTPUT_BYTES);
+  memcpy(uj_output.data, data_out_buf, uj_input.data_len);
+  uj_output.cfg = cfg_out;
+  uj_output.status = status;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_drbg_generate_out_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_drbg_reseed(ujson_t *uj) {
+  cryptolib_sca_sym_drbg_reseed_in_t uj_input;
+  TRY(ujson_deserialize_cryptolib_sca_sym_drbg_reseed_in_t(uj, &uj_input));
+
+  /////////////// STUB START ///////////////
+  // Perform a DRBG reseed encryption.
+  // Triggers are over the API calls.
+  size_t cfg_out;
+  status_t status = cryptolib_sca_drbg_reseed_impl(
+      uj_input.entropy, uj_input.entropy_len, uj_input.nonce,
+      uj_input.nonce_len, uj_input.reseed_interval, uj_input.mode, uj_input.cfg,
+      &cfg_out, uj_input.trigger);
+
+  /////////////// STUB END ///////////////
+
+  cryptolib_sca_sym_drbg_reseed_out_t uj_output;
+  memset(&uj_output, 0, sizeof(uj_output));
+  uj_output.cfg = cfg_out;
+  uj_output.status = (size_t)status.value;
+  RESP_OK(ujson_serialize_cryptolib_sca_sym_drbg_reseed_out_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  // As we are using the software defined trigger, the first argument of
+  // pentest_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEdn |
+                   kPentestPeripheralCsrng | kPentestPeripheralEntropy |
+                   kPentestPeripheralAes | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralOtbn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  /////////////// STUB START ///////////////
+  // Add things like versioning.
+  /////////////// STUB END ///////////////
+
+  return OK_STATUS();
+}
+
+status_t handle_cryptolib_sca_sym(ujson_t *uj) {
+  cryptolib_sca_sym_subcommand_t cmd;
+  TRY(ujson_deserialize_cryptolib_sca_sym_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kCryptoLibScaSymSubcommandAesFvsrPlaintext:
+      return handle_cryptolib_sca_sym_aes_fvsr_plaintext(uj);
+    case kCryptoLibScaSymSubcommandAesFvsrKey:
+      return handle_cryptolib_sca_sym_aes_fvsr_key(uj);
+    case kCryptoLibScaSymSubcommandAesDaisy:
+      return handle_cryptolib_sca_sym_aes_daisy_chain(uj);
+    case kCryptoLibScaSymSubcommandCmacFvsrPlaintext:
+      return handle_cryptolib_sca_sym_cmac_fvsr_plaintext(uj);
+    case kCryptoLibScaSymSubcommandCmacFvsrKey:
+      return handle_cryptolib_sca_sym_cmac_fvsr_key(uj);
+    case kCryptoLibScaSymSubcommandCmacDaisy:
+      return handle_cryptolib_sca_sym_cmac_daisy_chain(uj);
+    case kCryptoLibScaSymSubcommandGcmFvsrPlaintext:
+      return handle_cryptolib_sca_sym_gcm_fvsr_plaintext(uj);
+    case kCryptoLibScaSymSubcommandGcmFvsrKey:
+      return handle_cryptolib_sca_sym_gcm_fvsr_key(uj);
+    case kCryptoLibScaSymSubcommandGcmDaisy:
+      return handle_cryptolib_sca_sym_gcm_daisy_chain(uj);
+    case kCryptoLibScaSymSubcommandTdesFvsrPlaintext:
+      return handle_cryptolib_sca_sym_tdes_fvsr_plaintext(uj);
+    case kCryptoLibScaSymSubcommandTdesFvsrKey:
+      return handle_cryptolib_sca_sym_tdes_fvsr_key(uj);
+    case kCryptoLibScaSymSubcommandTdesDaisy:
+      return handle_cryptolib_sca_sym_tdes_daisy_chain(uj);
+    case kCryptoLibScaSymSubcommandHmacFvsrPlaintext:
+      return handle_cryptolib_sca_sym_hmac_fvsr_plaintext(uj);
+    case kCryptoLibScaSymSubcommandHmacFvsrKey:
+      return handle_cryptolib_sca_sym_hmac_fvsr_key(uj);
+    case kCryptoLibScaSymSubcommandHmacDaisy:
+      return handle_cryptolib_sca_sym_hmac_daisy_chain(uj);
+    case kCryptoLibScaSymSubcommandDrbgGenerateBatch:
+      return handle_cryptolib_sca_sym_drbg_generate_batch(uj);
+    case kCryptoLibScaSymSubcommandDrbgReseed:
+      return handle_cryptolib_sca_sym_drbg_reseed(uj);
+    case kCryptoLibScaSymSubcommandInit:
+      return handle_cryptolib_sca_sym_init(uj);
+    default:
+      LOG_ERROR("Unrecognized CryptoLib SCA subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.h b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.h
new file mode 100644
index 0000000000000..5a329be8b78b7
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym.h
@@ -0,0 +1,262 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * cryptolib aes sca fvsr plaintext test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib AES operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_aes_fvsr_plaintext(ujson_t *uj);
+
+/**
+ * cryptolib aes sca fvsr key test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib AES operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_aes_fvsr_key(ujson_t *uj);
+
+/**
+ * cryptolib aes sca daisy chain test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib AES operations
+ * using daisy chaining meaning that the output is copied to the input.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_aes_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib cmac sca fvsr plaintext test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib CMAC operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_cmac_fvsr_plaintext(ujson_t *uj);
+
+/**
+ * cryptolib cmac sca fvsr key test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib CMAC operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_cmac_fvsr_key(ujson_t *uj);
+
+/**
+ * cryptolib cmac sca daisy chain test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib CMAC operations
+ * using daisy chaining meaning that the output is copied to the input.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_cmac_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib gcm sca fvsr plaintext test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib GCM operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_gcm_fvsr_plaintext(ujson_t *uj);
+
+/**
+ * cryptolib gcm sca fvsr key test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib GCM operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_gcm_fvsr_key(ujson_t *uj);
+
+/**
+ * cryptolib gcm sca daisy chain test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib GCM operations
+ * using daisy chaining meaning that the output is copied to the input.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_gcm_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib tdes sca fvsr plaintext test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib TDES operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_tdes_fvsr_plaintext(ujson_t *uj);
+
+/**
+ * cryptolib tdes sca fvsr key test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib TDES operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_tdes_fvsr_key(ujson_t *uj);
+
+/**
+ * cryptolib tdes sca daisy chain test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib TDES operations
+ * using daisy chaining meaning that the output is copied to the input.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_tdes_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib hmac sca fvsr plaintext test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib HMAC operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_hmac_fvsr_plaintext(ujson_t *uj);
+
+/**
+ * cryptolib hmac sca fvsr key test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib HMAC operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_hmac_fvsr_key(ujson_t *uj);
+
+/**
+ * cryptolib hmac sca daisy chain test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib HMAC operations
+ * using daisy chaining meaning that the output is copied to the input.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_hmac_daisy_chain(ujson_t *uj);
+
+/**
+ * cryptolib drbg generate sca batch test
+ *
+ * This SCA penetration test triggers num_iterations cryptolib DRBG operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_drbg_generate_batch(ujson_t *uj);
+
+/**
+ * cryptolib drbg sca reseed
+ *
+ * This reseeds the DRBG with the gievn entropy.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_drbg_reseed(ujson_t *uj);
+
+/**
+ * Initialize CryptoLib command handler.
+ *
+ * This command is designed to setup the CryptoLib SCA firmware.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym_init(ujson_t *uj);
+
+/**
+ * CryptoLib SCA command handler.
+ *
+ * Command handler for the CryptoLib SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_cryptolib_sca_sym(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.c b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.c
new file mode 100644
index 0000000000000..3c6af084f792c
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.c
@@ -0,0 +1,417 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/impl/integrity.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/include/aes.h"
+#include "sw/device/lib/crypto/include/aes_gcm.h"
+#include "sw/device/lib/crypto/include/datatypes.h"
+#include "sw/device/lib/crypto/include/drbg.h"
+#include "sw/device/lib/crypto/include/hmac.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/cryptolib_sym.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h"
+
+#define MODULE_ID MAKE_MODULE_ID('c', 's', 'i')
+
+status_t cryptolib_sca_aes_impl(uint8_t data_in[AES_CMD_MAX_MSG_BYTES],
+                                size_t data_in_len,
+                                uint8_t key[AES_CMD_MAX_KEY_BYTES],
+                                size_t key_len,
+                                uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+                                uint8_t data_out[AES_CMD_MAX_MSG_BYTES],
+                                size_t *data_out_len, size_t padding,
+                                size_t mode, bool op_enc, size_t cfg_in,
+                                size_t *cfg_out, size_t trigger) {
+  // Set the AES mode.
+  otcrypto_aes_mode_t aes_mode;
+  otcrypto_key_mode_t key_mode;
+  switch (mode) {
+    case kPentestAesModeEcb:
+      aes_mode = kOtcryptoAesModeEcb;
+      key_mode = kOtcryptoKeyModeAesEcb;
+      break;
+    case kPentestAesModeCbc:
+      aes_mode = kOtcryptoAesModeCbc;
+      key_mode = kOtcryptoKeyModeAesCbc;
+      break;
+    case kPentestAesModeCfb:
+      aes_mode = kOtcryptoAesModeCfb;
+      key_mode = kOtcryptoKeyModeAesCfb;
+      break;
+    case kPentestAesModeOfb:
+      aes_mode = kOtcryptoAesModeOfb;
+      key_mode = kOtcryptoKeyModeAesOfb;
+      break;
+    case kPentestAesModeCtr:
+      aes_mode = kOtcryptoAesModeCtr;
+      key_mode = kOtcryptoKeyModeAesCtr;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES block cipher mode: %d", mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Set operation.
+  otcrypto_aes_operation_t op;
+  if (op_enc) {
+    op = kOtcryptoAesOperationEncrypt;
+  } else {
+    op = kOtcryptoAesOperationDecrypt;
+  }
+
+  // Set padding.
+  otcrypto_aes_padding_t aes_padding;
+  switch (padding) {
+    case kPentestAesPaddingPkcs7:
+      aes_padding = kOtcryptoAesPaddingPkcs7;
+      break;
+    case kPentestAesPaddingIso9797M2:
+      aes_padding = kOtcryptoAesPaddingIso9797M2;
+      break;
+    case kPentestAesPaddingNull:
+      aes_padding = kOtcryptoAesPaddingNull;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES padding scheme: %d", padding);
+      return INVALID_ARGUMENT();
+  }
+
+  // Convert the data struct into cryptolib types.
+  uint32_t iv_buf[kPentestAesIvSize];
+  memcpy(iv_buf, iv, sizeof(iv_buf));
+  otcrypto_word32_buf_t aes_iv = {
+      .data = iv_buf,
+      .len = kPentestAesBlockWords,
+  };
+
+  otcrypto_const_byte_buf_t input = {
+      .data = data_in,
+      .len = data_in_len,
+  };
+
+  // Build the key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create buffer to store key.
+  uint32_t key_buf[kPentestAesMaxKeyWords];
+  memset(key_buf, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key_buf, key, sizeof(key_buf));
+  // Create keyblob.
+  uint32_t keyblob[keyblob_num_words(config)];
+  // Create blinded key.
+  uint32_t aes_key_mask[kPentestAesMaxKeyWords];
+  memset(aes_key_mask, 0, AES_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestAesMaxKeyWords; it++) {
+    aes_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+  TRY(keyblob_from_key_and_mask(key_buf, aes_key_mask, config, keyblob));
+  otcrypto_blinded_key_t aes_key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+  };
+  aes_key.checksum = integrity_blinded_checksum(&aes_key);
+
+  size_t padded_len_bytes;
+  otcrypto_aes_padded_plaintext_length(data_in_len, aes_padding,
+                                       &padded_len_bytes);
+
+  if (padded_len_bytes > AES_CMD_MAX_MSG_BYTES) {
+    return OUT_OF_RANGE();
+  }
+  uint32_t output_buf[padded_len_bytes / sizeof(uint32_t)];
+  otcrypto_byte_buf_t output = {
+      .data = (unsigned char *)output_buf,
+      .len = sizeof(output_buf),
+  };
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_aes(&aes_key, aes_iv, aes_mode, op, input, aes_padding, output));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  *data_out_len = padded_len_bytes;
+  *cfg_out = 0;
+  memset(data_out, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(data_out, output_buf, padded_len_bytes);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_drbg_generate_impl(
+    uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES], size_t nonce_len,
+    uint8_t data_out[DRBG_CMD_MAX_OUTPUT_BYTES], size_t data_out_len,
+    size_t mode, size_t cfg_in, size_t *cfg_out, size_t trigger) {
+  // Nonce buffer used for the generate command of the DRBG.
+  uint8_t nonce_buf[nonce_len];
+  memcpy(nonce_buf, nonce, nonce_len);
+
+  otcrypto_const_byte_buf_t nonce_in = {
+      .len = nonce_len,
+      .data = nonce_buf,
+  };
+
+  // Buffer for the output entropy data.
+  uint32_t output_data[data_out_len];
+  otcrypto_word32_buf_t output = {
+      .data = output_data,
+      .len = ARRAYSIZE(output_data),
+  };
+
+  // Trigger window 0.
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_drbg_generate(nonce_in, output));
+  if (trigger & kPentestTrigger2) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  *cfg_out = 0;
+  memset(data_out, 0, DRBG_CMD_MAX_OUTPUT_BYTES);
+  memcpy(data_out, output_data, data_out_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_drbg_reseed_impl(
+    uint8_t entropy[DRBG_CMD_MAX_ENTROPY_BYTES], size_t entropy_len,
+    uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES], size_t nonce_len,
+    size_t reseed_interval, size_t mode, size_t cfg_in, size_t *cfg_out,
+    size_t trigger) {
+  // Entropy buffer used for the instantiation of the DRBG.
+  uint8_t entropy_buf[entropy_len];
+  memcpy(entropy_buf, entropy, entropy_len);
+
+  otcrypto_const_byte_buf_t entropy_in = {
+      .len = entropy_len,
+      .data = entropy_buf,
+  };
+
+  // Trigger window 0.
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_high();
+  }
+  TRY(otcrypto_drbg_instantiate(entropy_in));
+  if (trigger & kPentestTrigger1) {
+    pentest_set_trigger_low();
+  }
+
+  // Return data back to host.
+  *cfg_out = 0;
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_gcm_impl(
+    uint8_t data_in[AES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t aad[AES_CMD_MAX_MSG_BYTES], size_t aad_len,
+    uint8_t key[AES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[AES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    uint8_t tag[AES_CMD_MAX_MSG_BYTES], size_t *tag_len, size_t cfg_in,
+    size_t *cfg_out, size_t trigger) {
+  // Construct the blinded key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = kOtcryptoKeyModeAesGcm,
+      .key_length = key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelHigh,
+  };
+
+  // Construct blinded key from the key and mask.
+  uint32_t key_buf[kPentestAesMaxKeyWords];
+  memset(key_buf, 0, AES_CMD_MAX_KEY_BYTES);
+  memcpy(key_buf, key, key_len);
+
+  // Create random mask.
+  uint32_t aes_key_mask[kPentestAesMaxKeyWords];
+  memset(aes_key_mask, 0, AES_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestAesMaxKeyWords; it++) {
+    aes_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+
+  uint32_t keyblob[keyblob_num_words(config)];
+  TRY(keyblob_from_key_and_mask(key_buf, aes_key_mask, config, keyblob));
+
+  // Construct the blinded key.
+  otcrypto_blinded_key_t gcm_key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+      .checksum = 0,
+  };
+
+  // Set the checksum.
+  gcm_key.checksum = integrity_blinded_checksum(&gcm_key);
+
+  // Prepare the input buffers.
+  size_t iv_num_words = 4;
+  uint32_t iv_data[iv_num_words];
+  memcpy(iv_data, iv, sizeof(iv_data));
+  otcrypto_const_word32_buf_t gcm_iv = {
+      .data = iv_data,
+      .len = iv_num_words,
+  };
+  otcrypto_const_byte_buf_t plaintext = {
+      .data = data_in,
+      .len = data_in_len,
+  };
+  otcrypto_const_byte_buf_t gcm_aad = {
+      .data = aad,
+      .len = aad_len,
+  };
+
+  size_t tag_num_words = (*tag_len + sizeof(uint32_t) - 1) / sizeof(uint32_t);
+  uint32_t actual_tag_data[tag_num_words];
+  otcrypto_word32_buf_t actual_tag = {
+      .data = actual_tag_data,
+      .len = tag_num_words,
+  };
+
+  uint8_t actual_ciphertext_data[AES_CMD_MAX_MSG_BYTES];
+  otcrypto_byte_buf_t actual_ciphertext = {
+      .data = actual_ciphertext_data,
+      .len = data_in_len,
+  };
+
+  otcrypto_aes_gcm_tag_len_t gcm_tag_len;
+  switch (*tag_len) {
+    case (128 / 8):
+      gcm_tag_len = kOtcryptoAesGcmTagLen128;
+      break;
+    case (96 / 8):
+      gcm_tag_len = kOtcryptoAesGcmTagLen96;
+      break;
+    case (64 / 8):
+      gcm_tag_len = kOtcryptoAesGcmTagLen64;
+      break;
+    case (32 / 8):
+      gcm_tag_len = kOtcryptoAesGcmTagLen32;
+      break;
+    default:
+      LOG_ERROR("Unrecognized AES-GCM tag length: %d", *tag_len);
+      return INVALID_ARGUMENT();
+  }
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_aes_gcm_encrypt(&gcm_key, plaintext, gcm_iv, gcm_aad,
+                               gcm_tag_len, actual_ciphertext, actual_tag));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  *cfg_out = 0;
+  // Ciphertext.
+  *data_out_len = data_in_len;
+  memset(data_out, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(data_out, actual_ciphertext_data, *data_out_len);
+  // Tag.
+  memset(tag, 0, AES_CMD_MAX_MSG_BYTES);
+  memcpy(tag, actual_tag_data, *tag_len);
+
+  return OK_STATUS();
+}
+
+status_t cryptolib_sca_hmac_impl(uint8_t data_in[HMAC_CMD_MAX_MSG_BYTES],
+                                 size_t data_in_len,
+                                 uint8_t key[HMAC_CMD_MAX_KEY_BYTES],
+                                 size_t key_len,
+                                 uint8_t data_out[HMAC_CMD_MAX_TAG_BYTES],
+                                 size_t *data_out_len, size_t padding,
+                                 size_t mode, size_t cfg_in, size_t *cfg_out,
+                                 size_t trigger) {
+  // Set the HMAC mode.
+  otcrypto_key_mode_t key_mode;
+  unsigned int tag_bytes;
+  switch (mode) {
+    case kPentestHmacHashAlgSha256:
+      key_mode = kOtcryptoKeyModeHmacSha256;
+      tag_bytes = kPentestHmacTagBytesSha256;
+      break;
+    case kPentestHmacHashAlgSha384:
+      key_mode = kOtcryptoKeyModeHmacSha384;
+      tag_bytes = kPentestHmacTagBytesSha384;
+      break;
+    case kPentestHmacHashAlgSha512:
+      key_mode = kOtcryptoKeyModeHmacSha512;
+      tag_bytes = kPentestHmacTagBytesSha512;
+      break;
+    default:
+      LOG_ERROR("Unsupported HMAC key mode: %d", mode);
+      return INVALID_ARGUMENT();
+  }
+
+  // Build the key configuration.
+  otcrypto_key_config_t config = {
+      .version = kOtcryptoLibVersion1,
+      .key_mode = key_mode,
+      .key_length = key_len,
+      .hw_backed = kHardenedBoolFalse,
+      .security_level = kOtcryptoKeySecurityLevelLow,
+  };
+
+  // Create buffer to store key.
+  uint32_t key_buf[key_len];
+  memcpy(key_buf, key, key_len);
+  // Create keyblob.
+  uint32_t keyblob[keyblob_num_words(config)];
+  // Create blinded key.
+  uint32_t hmac_key_mask[kPentestHmacMaxKeyWords];
+  memset(hmac_key_mask, 0, HMAC_CMD_MAX_KEY_BYTES);
+  for (size_t it = 0; it < kPentestHmacMaxKeyWords; it++) {
+    hmac_key_mask[it] = pentest_ibex_rnd32_read();
+  }
+  TRY(keyblob_from_key_and_mask(key_buf, hmac_key_mask, config, keyblob));
+  otcrypto_blinded_key_t hmac_key = {
+      .config = config,
+      .keyblob_length = sizeof(keyblob),
+      .keyblob = keyblob,
+  };
+  hmac_key.checksum = integrity_blinded_checksum(&hmac_key);
+
+  // Create input message.
+  uint8_t msg_buf[data_in_len];
+  memcpy(msg_buf, data_in, data_in_len);
+  otcrypto_const_byte_buf_t input_message = {
+      .len = data_in_len,
+      .data = msg_buf,
+  };
+
+  // Create tag.
+  uint32_t tag_buf[kPentestHmacMaxTagWords];
+  otcrypto_word32_buf_t tag = {
+      .len = tag_bytes / sizeof(uint32_t),
+      .data = tag_buf,
+  };
+
+  // Trigger window.
+  pentest_set_trigger_high();
+  TRY(otcrypto_hmac(&hmac_key, input_message, tag));
+  pentest_set_trigger_low();
+
+  // Return data back to host.
+  *data_out_len = tag_bytes;
+  *cfg_out = 0;
+  memset(data_out, 0, HMAC_CMD_MAX_TAG_BYTES);
+  memcpy(data_out, tag_buf, tag_bytes);
+
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.h b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.h
new file mode 100644
index 0000000000000..b0d8dfbe92b5f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/cryptolib_sca_sym_impl.h
@@ -0,0 +1,132 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_IMPL_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_IMPL_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h"
+
+/**
+ * Wrapper to AES cryptolib implementation.
+ *
+ * @param data_in Input data.
+ * @param data_in_len Input data length.
+ * @param key Key.
+ * @param key_len  Key length.
+ * @param iv IV.
+ * @param data_out Output data.
+ * @param data_out_len Output data length.
+ * @param padding Padding.
+ * @param mode Mode.
+ * @param op_enc Encryption or decryption.
+ * @param cfg_in Input config.
+ * @param cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_aes_impl(uint8_t data_in[AES_CMD_MAX_MSG_BYTES],
+                                size_t data_in_len,
+                                uint8_t key[AES_CMD_MAX_KEY_BYTES],
+                                size_t key_len,
+                                uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+                                uint8_t data_out[AES_CMD_MAX_MSG_BYTES],
+                                size_t *data_out_len, size_t padding,
+                                size_t mode, bool op_enc, size_t cfg_in,
+                                size_t *cfg_out, size_t trigger);
+
+/**
+ * Wrapper to DRBG generate cryptolib implementation.
+ *
+ * @param nonce Used in the generate command of DRBG.
+ * @param nonce_len  Length in bytes.
+ * @param[out] data_out Generated data.
+ * @param data_out_len Length in bytes.
+ * @param reseed_interval Intervall when a reseed is triggered.
+ * @param mode Mode.
+ * @param cfg_in Input config.
+ * @param cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_drbg_generate_impl(
+    uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES], size_t nonce_len,
+    uint8_t data_out[DRBG_CMD_MAX_OUTPUT_BYTES], size_t data_out_len,
+    size_t mode, size_t cfg_in, size_t *cfg_out, size_t trigger);
+
+/**
+ * Wrapper to DRBG reseed/instantiate cryptolib implementation.
+ *
+ * @param entropy Used in the instantiation of DRBG.
+ * @param entropy_len Length in bytes.
+ * @param nonce Used in the generate command of DRBG.
+ * @param nonce_len  Length in bytes.
+ * @param reseed_interval Intervall when a reseed is triggered.
+ * @param mode Mode.
+ * @param cfg_in Input config.
+ * @param cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_drbg_reseed_impl(
+    uint8_t entropy[DRBG_CMD_MAX_ENTROPY_BYTES], size_t entropy_len,
+    uint8_t nonce[DRBG_CMD_MAX_NONCE_BYTES], size_t nonce_len,
+    size_t reseed_interval, size_t mode, size_t cfg_in, size_t *cfg_out,
+    size_t trigger);
+
+/**
+ * Wrapper to AES-GCM cryptolib implementation.
+ *
+ * @param data_in .
+ * @param data_in_len .
+ * @param aad .
+ * @param aad_len .
+ * @param key .
+ * @param key_len .
+ * @param iv .
+ * @param[out] data_out .
+ * @param[out] data_out_len .
+ * @param[out] tag .
+ * @param[out] tag_len .
+ * @param cfg_in .
+ * @param[out] cfg_out .
+ * @param trigger .
+ * @return OK or error.
+ */
+status_t cryptolib_sca_gcm_impl(
+    uint8_t data_in[AES_CMD_MAX_MSG_BYTES], size_t data_in_len,
+    uint8_t aad[AES_CMD_MAX_MSG_BYTES], size_t aad_len,
+    uint8_t key[AES_CMD_MAX_KEY_BYTES], size_t key_len,
+    uint8_t iv[AES_CMD_MAX_BLOCK_BYTES],
+    uint8_t data_out[AES_CMD_MAX_MSG_BYTES], size_t *data_out_len,
+    uint8_t tag[AES_CMD_MAX_MSG_BYTES], size_t *tag_len, size_t cfg_in,
+    size_t *cfg_out, size_t trigger);
+
+/**
+ * Wrapper to HMAC cryptolib implementation.
+ *
+ * @param data_in Input data.
+ * @param data_in_len Input data length.
+ * @param key Key.
+ * @param key_len  Key length.
+ * @param data_out Output data.
+ * @param data_out_len Output data length.
+ * @param padding Padding.
+ * @param mode Mode.
+ * @param cfg_in Input config.
+ * @param cfg_out Output config.
+ * @param trigger Trigger config.
+ * @return OK or error.
+ */
+status_t cryptolib_sca_hmac_impl(uint8_t data_in[HMAC_CMD_MAX_MSG_BYTES],
+                                 size_t data_in_len,
+                                 uint8_t key[HMAC_CMD_MAX_KEY_BYTES],
+                                 size_t key_len,
+                                 uint8_t data_out[HMAC_CMD_MAX_TAG_BYTES],
+                                 size_t *data_out_len, size_t padding,
+                                 size_t mode, size_t cfg_in, size_t *cfg_out,
+                                 size_t trigger);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_CRYPTOLIB_SCA_SYM_IMPL_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.c b/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.c
new file mode 100644
index 0000000000000..311ee3338ccdb
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.c
@@ -0,0 +1,351 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.h"
+
+#include "sw/device/lib/base/abs_mmio.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/otbn_sca_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otbn_regs.h"
+
+enum {
+  /**
+   * Number of bytes for ECDSA P-256 seeds and masked private keys.
+   */
+  kEcc256SeedNumBytes = 320 / 8,
+  /**
+   * Number of 32b words for ECDSA P-256 seeds and masked private keys.
+   */
+  kEcc256SeedNumWords = kEcc256SeedNumBytes / sizeof(uint32_t),
+  /**
+   * Number of bytes for ECDSA P-256 point coordinates.
+   */
+  kEcc256CoordNumBytes = 256 / 8,
+  /**
+   * Number of 32b words for ECDSA P-256 point coordinates.
+   */
+  kEcc256CoordNumWords = kEcc256CoordNumBytes / sizeof(uint32_t),
+  /**
+   * Mode option for the ECDSA keygen app (generates the private key only).
+   */
+  kEcc256ModePrivateKeyOnly = 1,
+  /**
+   * Mode option for the ECDSA keygen app (generates the full keypair).
+   */
+  kEcc256ModeKeypair = 2,
+  /**
+   * Max number of traces per batch.
+   */
+  kNumBatchOpsMax = 256,
+  /**
+   * Number of cycles that Ibex should sleep to minimize noise during OTBN
+   * operations. Caution: This number should be chosen to provide enough time
+   * to complete the operation. Otherwise, Ibex might wake up while OTBN is
+   * still busy and disturb the capture. This was measured using mcycle_read
+   * when otbn_manual_trigger and otbn_busy_wait_for_done get executed.
+   */
+  kIbexOtbnSleepCycles = 1100,
+};
+
+/**
+ * App configuration for p256_key_from_seed_sca
+ */
+const otbn_app_t kOtbnAppP256KeyFromSeed =
+    OTBN_APP_T_INIT(p256_key_from_seed_sca);
+
+static const otbn_addr_t kOtbnVarMode =
+    OTBN_ADDR_T_INIT(p256_key_from_seed_sca, mode);
+static const otbn_addr_t kOtbnVarSeed0 =
+    OTBN_ADDR_T_INIT(p256_key_from_seed_sca, seed0);
+static const otbn_addr_t kOtbnVarSeed1 =
+    OTBN_ADDR_T_INIT(p256_key_from_seed_sca, seed1);
+static const otbn_addr_t kOtbnVarD0 =
+    OTBN_ADDR_T_INIT(p256_key_from_seed_sca, d0);
+static const otbn_addr_t kOtbnVarD1 =
+    OTBN_ADDR_T_INIT(p256_key_from_seed_sca, d1);
+
+/**
+ * An array of seeds to be used in a batch
+ */
+uint32_t batch_share0[kNumBatchOpsMax][kEcc256SeedNumWords];
+
+/**
+ * An array of masks to be used in a batch
+ */
+uint32_t batch_share1[kNumBatchOpsMax][kEcc256SeedNumWords];
+
+/**
+ * Arrays for first and second share of masked private key d to be used in a
+ * batch
+ */
+uint32_t d0_batch[kEcc256SeedNumWords];
+uint32_t d1_batch[kEcc256SeedNumWords];
+
+/**
+ * Fixed-message indicator.
+ *
+ * Used in the 'b' (batch capture) command for indicating whether to use fixed
+ * or random message.
+ */
+static bool run_fixed = true;
+
+/**
+ * Masking indicator.
+ *
+ * Used in the 'b' (batch capture) command for indicating whether to use masks.
+ */
+static bool en_masks = false;
+
+uint32_t ecc256_seed[kEcc256SeedNumWords];
+
+uint32_t ecc256_C[kEcc256SeedNumWords];
+
+uint32_t random_number[kEcc256CoordNumWords];
+
+uint32_t ecc256_fixed_number[kEcc256CoordNumWords];
+
+/**
+ * Adds two integers storred in byte arrays.
+ *
+ * Adds the integer stored in source array to the integer stored in
+ * destination aray.
+ * The user needs to ensure that dest_len is enough to store the result
+ * without overflow.
+ *
+ * @param[in] dest  Location of the first input array and the result.
+ * @param[in] source  Location of the second input array.
+ * @param[in] dest_len   Length of the dest array in bytes.
+ * @param[in] source_len   Length of the source array in bytes.
+ */
+static void add_arrays(uint8_t *dest, uint8_t *source, size_t dest_len,
+                       size_t source_len) {
+  uint16_t temp = 0;
+
+  for (size_t i = 0; i < source_len; i++) {
+    temp += (uint16_t)source[i] + dest[i];
+    dest[i] = (uint8_t)(temp & 0x00FF);
+    temp >>= 8;
+  }
+
+  for (size_t i = source_len; i < dest_len; i++) {
+    temp += (uint16_t)dest[i];
+    dest[i] = (uint8_t)(temp & 0x00FF);
+    temp >>= 8;
+  }
+}
+
+/**
+ * Callback wrapper for OTBN manual trigger function.
+ */
+static void otbn_manual_trigger(void) { otbn_execute(); }
+
+/**
+ * Runs the OTBN key generation program.
+ *
+ * The seed shares must be `kEcc256SeedNumWords` words long.
+ *
+ * @param[in] mode  Mode parameter (private key only or full keypair).
+ * @param[in] seed  Seed for key generation.
+ * @param[in] mask  Mask for seed.
+ * @return OK or error.
+ */
+static status_t p256_run_keygen(uint32_t mode, const uint32_t *share0,
+                                const uint32_t *share1) {
+  // Secure wipe to scramble DMEM.
+  TRY(otbn_load_app(kOtbnAppP256KeyFromSeed));
+
+  // Write mode.
+  TRY(otbn_dmem_write(/*num_words=*/1, &mode, kOtbnVarMode));
+
+  // Write seed shares.
+  TRY(otbn_dmem_write(kEcc256SeedNumWords, share0, kOtbnVarSeed0));
+  TRY(otbn_dmem_write(kEcc256SeedNumWords, share1, kOtbnVarSeed1));
+
+  // Execute program. Trigger is set inside this function.
+  pentest_call_and_sleep(otbn_manual_trigger, kIbexOtbnSleepCycles, true, true);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_key_batch(ujson_t *uj) {
+  penetrationtest_otbn_sca_num_traces_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_num_traces_t(uj, &uj_data));
+
+  uint32_t num_traces = uj_data.num_traces;
+  uint32_t batch_digest[kEcc256SeedNumWords];
+
+  if (num_traces > kNumBatchOpsMax) {
+    return OUT_OF_RANGE();
+  }
+
+  // Zero the batch digest.
+  for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+    batch_digest[j] = 0;
+  }
+
+  for (size_t i = 0; i < num_traces; ++i) {
+    // Set mask to a random mask (en_masks = true) or to 0 (en_masks = false).
+    if (en_masks) {
+      for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+        batch_share1[i][j] = prng_rand_uint32();
+      }
+    } else {
+      for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+        batch_share1[i][j] = 0;
+      }
+    }
+
+    // If the run is fixed, take the fixed seed received from the host. Else,
+    // generate a random seed.
+    if (run_fixed) {
+      memcpy(batch_share0[i], ecc256_seed, kEcc256SeedNumBytes);
+    } else {
+      // Here change to random_number + C.
+      // It is necessary to set the C first.
+      memcpy(batch_share0[i], ecc256_C, kEcc256SeedNumBytes);
+      for (size_t j = 0; j < kEcc256CoordNumWords; ++j) {
+        random_number[j] = prng_rand_uint32();
+      }
+      add_arrays((unsigned char *)batch_share0[i],
+                 (unsigned char *)random_number, kEcc256SeedNumBytes,
+                 kEcc256CoordNumBytes);
+    }
+    for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+      batch_share0[i][j] ^= batch_share1[i][j];
+    }
+    // Another PRNG run to determine 'run_fixed' for the next cycle.
+    run_fixed = prng_rand_uint32() & 0x1;
+  }
+
+  for (size_t i = 0; i < num_traces; ++i) {
+    TRY(p256_run_keygen(kEcc256ModeKeypair, batch_share0[i], batch_share1[i]));
+
+    // Read results.
+    TRY(otbn_dmem_read(kEcc256SeedNumWords, kOtbnVarD0, d0_batch));
+    TRY(otbn_dmem_read(kEcc256SeedNumWords, kOtbnVarD1, d1_batch));
+
+    // The correctness of each batch is verified by computing and sending
+    // the batch digest. This digest is computed by XORing all d0 shares of
+    // the batch.
+    for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+      batch_digest[j] ^= d0_batch[j];
+    }
+  }
+  // Send the batch digest to the host for verification.
+  penetrationtest_otbn_sca_batch_digest_t uj_output;
+  memcpy(uj_output.batch_digest, (uint8_t *)batch_digest,
+         kEcc256SeedNumWords * 4);
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_batch_digest_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_seed_batch(ujson_t *uj) {
+  penetrationtest_otbn_sca_num_traces_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_num_traces_t(uj, &uj_data));
+
+  uint32_t num_traces = uj_data.num_traces;
+  uint32_t batch_digest[kEcc256SeedNumWords];
+
+  if (num_traces > kNumBatchOpsMax) {
+    return OUT_OF_RANGE();
+  }
+
+  // Zero the batch digest.
+  for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+    batch_digest[j] = 0;
+  }
+
+  for (size_t i = 0; i < num_traces; ++i) {
+    // Set mask to a random mask (en_masks = true) or to 0 (en_masks = false).
+    if (en_masks) {
+      for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+        batch_share1[i][j] = prng_rand_uint32();
+      }
+    } else {
+      for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+        batch_share1[i][j] = 0;
+      }
+    }
+
+    // If the run is fixed, take the fixed seed received from the host. Else,
+    // generate a random seed.
+    if (run_fixed) {
+      memcpy(batch_share0[i], ecc256_seed, kEcc256SeedNumBytes);
+    } else {
+      for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+        batch_share0[i][j] = prng_rand_uint32();
+      }
+    }
+
+    for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+      batch_share0[i][j] ^= batch_share1[i][j];
+    }
+    run_fixed = prng_rand_uint32() & 0x1;
+  }
+
+  for (size_t i = 0; i < num_traces; ++i) {
+    TRY(p256_run_keygen(kEcc256ModeKeypair, batch_share0[i], batch_share1[i]));
+
+    // Read results.
+    TRY(otbn_dmem_read(kEcc256SeedNumWords, kOtbnVarD0, d0_batch));
+    TRY(otbn_dmem_read(kEcc256SeedNumWords, kOtbnVarD1, d1_batch));
+
+    // The correctness of each batch is verified by computing and sending
+    // the batch digest. This digest is computed by XORing all d0 shares of
+    // the batch.
+    for (size_t j = 0; j < kEcc256SeedNumWords; ++j) {
+      batch_digest[j] ^= d0_batch[j];
+    }
+  }
+
+  // Send the batch digest to the host for verification.
+  penetrationtest_otbn_sca_batch_digest_t uj_output;
+  memcpy(uj_output.batch_digest, (uint8_t *)batch_digest,
+         kEcc256SeedNumWords * 4);
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_batch_digest_t, uj,
+          &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecc256_en_masks(ujson_t *uj) {
+  penetrationtest_otbn_sca_en_masks_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_en_masks_t(uj, &uj_data));
+  if (uj_data.en_masks) {
+    en_masks = true;
+  } else {
+    en_masks = false;
+  }
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecc256_set_c(ujson_t *uj) {
+  penetrationtest_otbn_sca_constant_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_constant_t(uj, &uj_data));
+
+  memcpy(ecc256_C, uj_data.constant, kEcc256SeedNumBytes);
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecc256_set_seed(ujson_t *uj) {
+  penetrationtest_otbn_sca_seed_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_seed_t(uj, &uj_data));
+
+  memcpy(ecc256_seed, uj_data.seed, kEcc256SeedNumBytes);
+
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.h b/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.h
new file mode 100644
index 0000000000000..70e7d076ad35f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/ecc256_keygen_sca.h
@@ -0,0 +1,31 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_ECC256_KEYGEN_SCA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_ECC256_KEYGEN_SCA_H_
+
+#include "sw/device/lib/crypto/drivers/otbn.h"
+
+/**
+ * App configuration for p256_key_from_seed_sca
+ */
+OTBN_DECLARE_APP_SYMBOLS(p256_key_from_seed_sca);
+
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, mode);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, seed0);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, seed1);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, d0);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, d1);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, x);
+OTBN_DECLARE_SYMBOL_ADDR(p256_key_from_seed_sca, y);
+
+extern const otbn_app_t kOtbnAppP256KeyFromSeed;
+
+static const otbn_addr_t kOtbnVarMode;
+static const otbn_addr_t kOtbnVarSeed0;
+static const otbn_addr_t kOtbnVarSeed1;
+static const otbn_addr_t kOtbnVarD0;
+static const otbn_addr_t kOtbnVarD1;
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_ECC256_KEYGEN_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/edn_sca.c b/sw/device/tests/penetrationtests/firmware/sca/edn_sca.c
new file mode 100644
index 0000000000000..8b4d5bad970f8
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/edn_sca.c
@@ -0,0 +1,184 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_rv_core_ibex.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/rv_core_ibex_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/edn_sca_commands.h"
+
+#include "edn_regs.h"  // Generated
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "rv_core_ibex_regs.h"  // Generated
+
+enum {
+  kEdnKatTimeout = (10 * 1000 * 1000),
+  kEdnKatMaxClen = 12,
+  kEdnKatOutputLen = 16,
+  kEdnKatWordsPerBlock = 4,
+  /**
+   * Max number of traces per batch.
+   */
+  kNumBatchOpsMax = 128,
+};
+
+static dif_rv_core_ibex_t rv_core_ibex;
+
+/**
+ * Read randomness.
+ *
+ * The goal of this function is to allow the SCA setup to measure randomness
+ * transmitted from the 128-bit FIFO within the EDN to the Ibex RND_DATA
+ * register.
+ *
+ * To do so, this function first clears the 128-bit FIFO by reading it. When the
+ * FIFO is empty, the EDN sends a request to the CSRNG. When the FIFO again is
+ * full, set the SCA trigger and read the randomness from the FIFO to the
+ * RND_DATA register.
+ *
+ * @param ibex_rnd_data The array containing the randomness.
+ * @return OK or error.
+ */
+static status_t read_rnd_data_reg(uint32_t ibex_rnd_data[4]) {
+  // Clear the CSRNG FIFO containing randomness before starting the test.
+  for (size_t it = 0; it < 4; it++) {
+    TRY(dif_rv_core_ibex_read_rnd_data(&rv_core_ibex, &ibex_rnd_data[0]));
+  }
+  memset(ibex_rnd_data, 0, 4 * sizeof(uint32_t));
+  // Wait until RND_DATA_VALID becomes true, i.e., randomness is available.
+  bool rnd_data_valid = rv_core_ibex_testutils_is_rnd_data_valid(&rv_core_ibex);
+  while (!rnd_data_valid) {
+    rnd_data_valid = rv_core_ibex_testutils_is_rnd_data_valid(&rv_core_ibex);
+  }
+
+  // Read RND_DATA register. First access contains randomness that already was
+  // transmitted over the bus. Afterwards, data needs to be transmitted from the
+  // randomness FIFO into the RND_DATA register - this is what we want to
+  // measure.
+  pentest_set_trigger_high();
+  asm volatile(NOP30);
+  asm volatile("li t0, %0"
+               :
+               : "i"(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR)
+               : "t0");
+  asm volatile("lw t1, %0(t0)"
+               :
+               : "i"(RV_CORE_IBEX_RND_DATA_REG_OFFSET)
+               : "t1");
+  asm volatile(NOP30);
+  asm volatile(NOP30);
+  pentest_set_trigger_low();
+  // Read RND_DATA which was transmitted from FIFO into RND_DATA register.
+  // Read it after the trigger window to not measure load into Ibex register
+  TRY(dif_rv_core_ibex_read_rnd_data(&rv_core_ibex, &ibex_rnd_data[3]));
+
+  return OK_STATUS();
+}
+
+status_t handle_edn_sca_bus_data_batch(ujson_t *uj) {
+  // Get number of iterations.
+  edn_sca_batch_t uj_data;
+  uint32_t max_iterations = 128;
+  TRY(ujson_deserialize_edn_sca_batch_t(uj, &uj_data));
+  CHECK(uj_data.num_iterations <= max_iterations);
+
+  // Start num_iterations trigger windows.
+  uint32_t rand_data[max_iterations][4];
+  for (size_t it = 0; it < uj_data.num_iterations; it++) {
+    TRY(read_rnd_data_reg(rand_data[it]));
+  }
+
+  // Send back num_iterations rand_data.
+  for (size_t it = 0; it < uj_data.num_iterations; it++) {
+    edn_sca_result_t uj_output;
+    memcpy(&uj_output.rnd_data, rand_data[it], 4 * sizeof(uint32_t));
+    RESP_OK(ujson_serialize_edn_sca_result_t, uj, &uj_output);
+  }
+
+  return OK_STATUS();
+}
+
+status_t handle_edn_sca_bus_data(ujson_t *uj) {
+  edn_sca_result_t uj_output;
+
+  TRY(read_rnd_data_reg(uj_output.rnd_data));
+
+  // Send data back to host.
+  RESP_OK(ujson_serialize_edn_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_edn_sca_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+
+  // Disable the instruction cache and dummy instructions for SCA attacks.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // As we are using the software defined trigger, the first argument of
+  // sca_init is not needed. kPentestTriggerSourceAes is selected as a
+  // placeholder.
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralEntropy |
+                   kPentestPeripheralCsrng | kPentestPeripheralEdn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Configure Ibex to allow reading ERR_STATUS register.
+  TRY(dif_rv_core_ibex_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
+      &rv_core_ibex));
+
+  // Configure the entropy complex. Set the reseed interval to max to avoid
+  // reseed during the trigger window.
+  TRY(pentest_configure_entropy_source_max_reseed_interval());
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_edn_sca(ujson_t *uj) {
+  edn_sca_subcommand_t cmd;
+  TRY(ujson_deserialize_edn_sca_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kEdnScaSubcommandInit:
+      return handle_edn_sca_init(uj);
+    case kEdnScaSubcommandBusData:
+      return handle_edn_sca_bus_data(uj);
+    case kEdnScaSubcommandBusDataBatch:
+      return handle_edn_sca_bus_data_batch(uj);
+    default:
+      LOG_ERROR("Unrecognized EDN SCA subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/edn_sca.h b/sw/device/tests/penetrationtests/firmware/sca/edn_sca.h
new file mode 100644
index 0000000000000..f623719d85124
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/edn_sca.h
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_EDN_SCA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_EDN_SCA_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * edn.sca.bus_data_batch command handler.
+ *
+ * Batch version of edn.sca.bus_data with random data.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_edn_sca_bus_data_batch(ujson_t *uj);
+
+/**
+ * edn.sca.bus_data command handler.
+ *
+ * The goal of this penetration test is to capture traces when
+ * randomness is transported over the bus to Ibex.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_edn_sca_bus_data(ujson_t *uj);
+
+/**
+ * Initializes the trigger and configures the device for the EDN SCA test.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_edn_sca_init(ujson_t *uj);
+
+/**
+ * EDN SCA command handler.
+ *
+ * Command handler for the EDN SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_edn_sca(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_EDN_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.c b/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.c
new file mode 100644
index 0000000000000..8e4c754d6f160
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.c
@@ -0,0 +1,294 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/hmac_sca.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/hmac_testutils.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/hmac_sca_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+enum {
+  /**
+   * Key length in bytes.
+   */
+  kKeyLength = HMACSCA_CMD_MAX_KEY_BYTES,
+  /**
+   * Message length in bytes.
+   */
+  kMessageLength = HMACSCA_CMD_MAX_MESSAGE_BYTES,
+  /**
+   * Tag length in bytes.
+   */
+  kTagLength = HMACSCA_CMD_MAX_TAG_BYTES,
+  /**
+   * Tag length in words.
+   */
+  kTagLengthWord = kTagLength / sizeof(uint32_t),
+  /**
+   * Max number of traces per batch.
+   */
+  kNumBatchOpsMax = 128,
+};
+
+static dif_hmac_t hmac;
+
+static const dif_hmac_transaction_t kHmacTransactionConfig = {
+    .digest_endianness = kDifHmacEndiannessBig,
+    .message_endianness = kDifHmacEndiannessLittle,
+};
+
+static status_t trigger_hmac(uint8_t key_buf[], uint8_t msg_buf[],
+                             uint32_t tag_buf[],
+                             penetrationtest_hmac_sca_triggers_t uj_triggers) {
+  uint8_t inverted_key_buff[kKeyLength] = {0};
+
+  for (int i = 0; i < kKeyLength; i++) {
+    inverted_key_buff[i] = key_buf[31 - i];
+  }
+
+  dif_hmac_digest_t digest;
+
+  if (uj_triggers.start_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_hmac_mode_hmac_start(&hmac, inverted_key_buff,
+                               kHmacTransactionConfig));
+  if (uj_triggers.start_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_triggers.msg_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(hmac_testutils_push_message(&hmac, (char *)msg_buf, kMessageLength));
+  if (uj_triggers.msg_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_triggers.process_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(dif_hmac_process(&hmac));
+  if (uj_triggers.process_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  if (uj_triggers.finish_trigger) {
+    pentest_set_trigger_high();
+  }
+  TRY(hmac_testutils_finish_polled(&hmac, &digest));
+  if (uj_triggers.finish_trigger) {
+    pentest_set_trigger_low();
+  }
+
+  // memcpy(tag_buf, digest.digest, kTagLength);
+  for (int i = 0; i < kTagLengthWord; i++) {
+    tag_buf[i] = digest.digest[7 - i];
+  }
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_pentest_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  // Setup trigger and enable peripherals needed for the test.
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+
+  // Disable the instruction cache and dummy instructions for SCA.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Enable the HMAC module and disable unused IP blocks to improve
+  // SCA measurements.
+  pentest_init(kPentestTriggerSourceHmac,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralHmac,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  mmio_region_t base_addr = mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR);
+  TRY(dif_hmac_init(base_addr, &hmac));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_sca_batch_fvsr(ujson_t *uj) {
+  penetrationtest_hmac_sca_key_t uj_key;
+  penetrationtest_hmac_sca_num_it_t uj_it;
+  penetrationtest_hmac_sca_triggers_t uj_triggers;
+
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_num_it_t(uj, &uj_it));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_triggers_t(uj, &uj_triggers));
+
+  uint8_t batch_messages[kNumBatchOpsMax][kMessageLength];
+  uint8_t batch_keys[kNumBatchOpsMax][kKeyLength];
+
+  // First generate all FvsR data sets. When sample_fixed,
+  // the provided key is used and the message is random. When
+  // not sample_fixed, a random key and a random message is
+  // generated.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < uj_it.num_iterations; it++) {
+    if (sample_fixed) {
+      memcpy(batch_keys[it], uj_key.key, kKeyLength);
+    } else {
+      prng_rand_bytes(batch_keys[it], kKeyLength);
+    }
+    prng_rand_bytes(batch_messages[it], kMessageLength);
+    sample_fixed = batch_messages[it][0] & 0x1;
+  }
+
+  // Invoke HMAC for each data set.
+  uint32_t tag_buf[kTagLengthWord];
+  for (size_t it = 0; it < uj_it.num_iterations; it++) {
+    TRY(trigger_hmac(batch_keys[it], batch_messages[it], tag_buf, uj_triggers));
+  }
+
+  // Send the last tag to host via UART.
+  penetrationtest_hmac_sca_tag_t uj_tag;
+  memcpy(uj_tag.tag, tag_buf, kTagLength);
+  RESP_OK(ujson_serialize_penetrationtest_hmac_sca_tag_t, uj, &uj_tag);
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_sca_batch_random(ujson_t *uj) {
+  penetrationtest_hmac_sca_num_it_t uj_it;
+  penetrationtest_hmac_sca_triggers_t uj_triggers;
+
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_num_it_t(uj, &uj_it));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_triggers_t(uj, &uj_triggers));
+
+  uint8_t batch_messages[kNumBatchOpsMax][kMessageLength];
+  uint8_t batch_keys[kNumBatchOpsMax][kKeyLength];
+
+  // Generate random keys and messages.
+  for (size_t it = 0; it < uj_it.num_iterations; it++) {
+    prng_rand_bytes(batch_keys[it], kKeyLength);
+    prng_rand_bytes(batch_messages[it], kMessageLength);
+  }
+
+  // Invoke HMAC for each data set.
+  uint32_t tag_buf[kTagLengthWord];
+  for (size_t it = 0; it < uj_it.num_iterations; it++) {
+    TRY(trigger_hmac(batch_keys[it], batch_messages[it], tag_buf, uj_triggers));
+  }
+
+  // Send the last tag to host via UART.
+  penetrationtest_hmac_sca_tag_t uj_tag;
+  memcpy(uj_tag.tag, tag_buf, kTagLength);
+  RESP_OK(ujson_serialize_penetrationtest_hmac_sca_tag_t, uj, &uj_tag);
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_sca_batch_daisy_chain(ujson_t *uj) {
+  penetrationtest_hmac_sca_key_t uj_key;
+  penetrationtest_hmac_sca_message_t uj_message;
+  penetrationtest_hmac_sca_num_it_t uj_it;
+  penetrationtest_hmac_sca_triggers_t uj_triggers;
+
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_message_t(uj, &uj_message));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_num_it_t(uj, &uj_it));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_triggers_t(uj, &uj_triggers));
+
+  // Invoke HMAC for each data set.
+  uint32_t tag_buf[kTagLengthWord];
+  uint8_t message_buf[HMACSCA_CMD_MAX_MESSAGE_BYTES];
+  memcpy(message_buf, uj_message.message, sizeof(uj_message.message));
+  for (size_t it = 0; it < uj_it.num_iterations; it++) {
+    TRY(trigger_hmac(uj_key.key, message_buf, tag_buf, uj_triggers));
+    // Copy the output of the HMAC to the input
+    memcpy(message_buf, tag_buf, HMACSCA_CMD_MAX_MESSAGE_BYTES);
+  }
+
+  // Send the last tag to host via UART.
+  penetrationtest_hmac_sca_tag_t uj_tag;
+  memcpy(uj_tag.tag, tag_buf, kTagLength);
+  RESP_OK(ujson_serialize_penetrationtest_hmac_sca_tag_t, uj, &uj_tag);
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_sca_single(ujson_t *uj) {
+  penetrationtest_hmac_sca_key_t uj_key;
+  penetrationtest_hmac_sca_message_t uj_message;
+  penetrationtest_hmac_sca_triggers_t uj_triggers;
+
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_key_t(uj, &uj_key));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_message_t(uj, &uj_message));
+  TRY(ujson_deserialize_penetrationtest_hmac_sca_triggers_t(uj, &uj_triggers));
+
+  // Create buffer to store key, message, and tag.
+  uint8_t key_buf[kKeyLength];
+  memcpy(key_buf, uj_key.key, kKeyLength);
+  uint8_t msg_buf[kMessageLength];
+  memcpy(msg_buf, uj_message.message, kMessageLength);
+  uint32_t tag_buf[kTagLengthWord];
+
+  // Trigger HMAC operation.
+  TRY(trigger_hmac(key_buf, msg_buf, tag_buf, uj_triggers));
+
+  // Copy tag to uJSON type.
+  penetrationtest_hmac_sca_tag_t uj_tag;
+  memcpy(uj_tag.tag, tag_buf, kTagLength);
+
+  // Send tag to host via UART.
+  RESP_OK(ujson_serialize_penetrationtest_hmac_sca_tag_t, uj, &uj_tag);
+
+  return OK_STATUS();
+}
+
+status_t handle_hmac_sca(ujson_t *uj) {
+  hmac_sca_subcommand_t cmd;
+  TRY(ujson_deserialize_hmac_sca_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kHmacScaSubcommandInit:
+      return handle_hmac_pentest_init(uj);
+    case kHmacScaSubcommandBatchFvsr:
+      return handle_hmac_sca_batch_fvsr(uj);
+    case kHmacScaSubcommandBatchRandom:
+      return handle_hmac_sca_batch_random(uj);
+    case kHmacScaSubcommandBatchDaisy:
+      return handle_hmac_sca_batch_daisy_chain(uj);
+    case kHmacScaSubcommandSingle:
+      return handle_hmac_sca_single(uj);
+    default:
+      LOG_ERROR("Unrecognized HMAC SCA subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.h b/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.h
new file mode 100644
index 0000000000000..bcacc6323fb1f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/hmac_sca.h
@@ -0,0 +1,91 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_HMAC_SCA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_HMAC_SCA_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * Initializes the trigger and configures the device for the HMAC SCA test.
+ *
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_pentest_init(ujson_t *uj);
+
+/**
+ * hmac.sca.batch_fvsr test
+ *
+ * This SCA penetration test triggers num_iterations HMAC-SHA256 operations
+ * using a Fixed vs Random (FvsR) dataset. This dataset is generated on the
+ * device using the PRNG from the SCA library.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_sca_batch_fvsr(ujson_t *uj);
+
+/**
+ * hmac.sca.batch_random test
+ *
+ * This SCA penetration test triggers num_iterations HMAC-SHA256 operations
+ * using a random dataset. This dataset is generated on the device using the
+ * PRNG from the SCA library.
+ *
+ * Note that the key is presumed to be correctly padded or hashed already.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_sca_batch_random(ujson_t *uj);
+
+/**
+ * hmac.sca.batch_daisy_chain test
+ *
+ * This SCA penetration test triggers num_iterations HMAC-SHA256 operations
+ * by re-using the output of the HMAC by its input. This dataset is generated on
+ * the device using the PRNG from the SCA library.
+ *
+ * Note that the key is presumed to be correctly padded or hashed already.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_sca_batch_daisy_chain(ujson_t *uj);
+
+/**
+ * hmac.sca.single test
+ *
+ * This SCA penetration test triggers a single HMAC-SHA256 operation using the
+ * provided key, mask, and message. The tag is returend to the host.
+ *
+ * Note that the key is presumed to be correctly padded or hashed already.
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_sca_single(ujson_t *uj);
+
+/**
+ * HMAC SCA command handler.
+ *
+ * Command handler for the HMAC SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_hmac_sca(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_HMAC_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.c b/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.c
index 971c7306ef8a8..0c807c8b9d0c3 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.c
@@ -4,45 +4,493 @@
 
 #include "sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h"
 
+#include "ecc256_keygen_sca.h"
 #include "sw/device/lib/base/memory.h"
 #include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_aes.h"
 #include "sw/device/lib/dif/dif_keymgr.h"
 #include "sw/device/lib/dif/dif_kmac.h"
+#include "sw/device/lib/dif/dif_otbn.h"
 #include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/hmac_testutils.h"
 #include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_test_config.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
-#include "sw/device/sca/lib/sca.h"
-#include "sw/device/tests/penetrationtests/firmware/lib/sca_lib.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 #include "sw/device/tests/penetrationtests/json/ibex_sca_commands.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otbn_regs.h"  // Generated.
 
 static dif_keymgr_t keymgr;
 static dif_kmac_t kmac;
+static dif_aes_t aes;
+static dif_hmac_t hmac;
+static dif_otbn_t otbn;
+
+#define MAX_BATCH_SIZE 256
+
+// OTBN symbols used by the combinatorial test.
+OTBN_DECLARE_APP_SYMBOLS(p256_ecdsa_sca);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, msg);
+static const otbn_app_t kOtbnAppP256Ecdsa = OTBN_APP_T_INIT(p256_ecdsa_sca);
+static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(p256_ecdsa_sca, msg);
+
+// Enum for the triggers of the combinatorial test.
+typedef enum combi_operations_trigger_t {
+  kCombiOpsTriggerXor = 1,
+  kCombiOpsTriggerAdd = 2,
+  kCombiOpsTriggerSub = 4,
+  kCombiOpsTriggerShift = 8,
+  kCombiOpsTriggerMul = 16,
+  kCombiOpsTriggerDiv = 32,
+  kCombiOpsTriggerLw = 64,
+  kCombiOpsTriggerSw = 128,
+  kCombiOpsTriggerCp = 256,
+  kCombiOpsTriggerAes = 512,
+  kCombiOpsTriggerHmac = 1024,
+  kCombiOpsTriggerOtbn = 2048,
+  kCombiOpsNumResults = 12,
+} combi_operations_trigger_t;
+
+// Indicates whether the key manager is already configured for the test.
+static bool key_manager_init;
 
 // Buffer to allow the compiler to allocate a safe area in Main SRAM where
 // we can do the write/read test without the risk of clobbering data
 // used by the program.
 OT_SECTION(".data")
 static volatile uint32_t sram_main_buffer[8];
+static volatile uint32_t sram_main_buffer_batch[256];
+
+// Load value in x5, x12...x16. Zeroize x6...x7 and x28...x31.
+static inline void init_registers(uint32_t val0, uint32_t val1, uint32_t val2,
+                                  uint32_t val3, uint32_t val4, uint32_t val5) {
+  asm volatile("mv x5,  %0" : : "r"(val0) : "x5");
+  asm volatile("mv x12, %0" : : "r"(val1) : "x12");
+  asm volatile("mv x13, %0" : : "r"(val2) : "x13");
+  asm volatile("mv x14, %0" : : "r"(val3) : "x14");
+  asm volatile("mv x15, %0" : : "r"(val4) : "x15");
+  asm volatile("mv x16, %0" : : "r"(val5) : "x16");
+
+  asm volatile("mv x6,  x0" : : : "x6");
+  asm volatile("mv x7,  x0" : : : "x7");
+  asm volatile("mv x28, x0" : : : "x28");
+  asm volatile("mv x29, x0" : : : "x29");
+  asm volatile("mv x30, x0" : : : "x30");
+  asm volatile("mv x31, x0" : : : "x31");
+}
+
+// Move registers.
+// Inline to avoid function calls for SCA measurements.
+static inline void move_bw_registers(void) {
+  asm volatile("mv x6,   x5" : : : "x6");
+  asm volatile("mv x7,  x12" : : : "x7");
+  asm volatile("mv x28, x13" : : : "x28");
+  asm volatile("mv x29, x14" : : : "x29");
+  asm volatile("mv x30, x15" : : : "x30");
+  asm volatile("mv x31, x16" : : : "x31");
+}
+
+// Function to assign x5...x7 and x28...x31 the provided values val0...val6.
+// Inline to avoid function calls for SCA measurements.
+static inline void copy_to_registers(uint32_t val0, uint32_t val1,
+                                     uint32_t val2, uint32_t val3,
+                                     uint32_t val4, uint32_t val5,
+                                     uint32_t val6) {
+  asm volatile("mv x5,  %0" : : "r"(val0) : "x5");
+  asm volatile("mv x6,  %0" : : "r"(val1) : "x6");
+  asm volatile("mv x7,  %0" : : "r"(val2) : "x7");
+  asm volatile("mv x28, %0" : : "r"(val3) : "x28");
+  asm volatile("mv x29, %0" : : "r"(val4) : "x29");
+  asm volatile("mv x30, %0" : : "r"(val5) : "x30");
+  asm volatile("mv x31, %0" : : "r"(val6) : "x31");
+}
+
+// Generate Fixed vs Random (FvsR) array of values. The fixed value is provided
+// by the user and the random values are generated by the PRNG provided in the
+// SCA library.
+static void generate_fvsr(size_t num_iterations, uint32_t fixed_data,
+                          uint32_t values[]) {
+  bool sample_fixed = true;
+  for (size_t i = 0; i < num_iterations; i++) {
+    if (sample_fixed) {
+      values[i] = fixed_data;
+    } else {
+      values[i] = prng_rand_uint32();
+    }
+    sample_fixed = prng_rand_uint32() & 0x1;
+  }
+}
+
+// Generate random values used by the test by calling the SCA PRNG.
+static void generate_random(size_t num_iterations, uint32_t values[]) {
+  for (size_t i = 0; i < num_iterations; i++) {
+    values[i] = prng_rand_uint32();
+  }
+}
+
+status_t handle_ibex_pentest_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  // Setup trigger and enable peripherals needed for the test.
+  pentest_select_trigger_type(kPentestTriggerTypeSw);
+  pentest_init(kPentestTriggerSourceAes,
+               kPentestPeripheralEntropy | kPentestPeripheralIoDiv4 |
+                   kPentestPeripheralOtbn | kPentestPeripheralCsrng |
+                   kPentestPeripheralEdn | kPentestPeripheralHmac |
+                   kPentestPeripheralKmac | kPentestPeripheralAes,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Disable the instruction cache and dummy instructions for SCA.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Key manager not initialized for the handle_ibex_sca_key_sideloading test.
+  key_manager_init = false;
+
+  // Init HMAC.
+  mmio_region_t base_addr = mmio_region_from_addr(TOP_EARLGREY_HMAC_BASE_ADDR);
+  TRY(dif_hmac_init(base_addr, &hmac));
+
+  // Init AES.
+  TRY(dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  TRY(dif_aes_reset(&aes));
+
+  // Init OTBN.
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+
+  // Load p256 keygen from seed app into OTBN.
+  // This is not used, but just set so it receives input,
+  TRY(otbn_load_app(kOtbnAppP256Ecdsa));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+static status_t trigger_ibex_sca_combi_operations(uint32_t value1,
+                                                  uint32_t value2,
+                                                  uint32_t result[],
+                                                  uint32_t trigger)
+    __attribute__((optnone)) {
+  if (trigger & kCombiOpsTriggerXor) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "xor x13, x5, x12\n"
+                 "xor x14, x5, x12\n"
+                 "xor x15, x5, x12\n"
+                 "xor x16, x5, x12\n"
+                 "xor x6, x5, x12\n"
+                 "xor x7, x5, x12\n"
+                 "xor x28, x5, x12\n"
+                 "xor x29, x5, x12\n"
+                 "xor x30, x5, x12\n"
+                 "xor x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[0]));
+  }
+
+  if (trigger & kCombiOpsTriggerAdd) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "add x13, x5, x12\n"
+                 "add x14, x5, x12\n"
+                 "add x15, x5, x12\n"
+                 "add x16, x5, x12\n"
+                 "add x6, x5, x12\n"
+                 "add x7, x5, x12\n"
+                 "add x28, x5, x12\n"
+                 "add x29, x5, x12\n"
+                 "add x30, x5, x12\n"
+                 "add x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[1]));
+  }
+
+  if (trigger & kCombiOpsTriggerSub) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "sub x13, x5, x12\n"
+                 "sub x14, x5, x12\n"
+                 "sub x15, x5, x12\n"
+                 "sub x16, x5, x12\n"
+                 "sub x6, x5, x12\n"
+                 "sub x7, x5, x12\n"
+                 "sub x28, x5, x12\n"
+                 "sub x29, x5, x12\n"
+                 "sub x30, x5, x12\n"
+                 "sub x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[2]));
+  }
+
+  if (trigger & kCombiOpsTriggerShift) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "rol x13, x5, x12\n"
+                 "rol x14, x5, x12\n"
+                 "rol x15, x5, x12\n"
+                 "rol x16, x5, x12\n"
+                 "rol x6, x5, x12\n"
+                 "rol x7, x5, x12\n"
+                 "rol x28, x5, x12\n"
+                 "rol x29, x5, x12\n"
+                 "rol x30, x5, x12\n"
+                 "rol x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[3]));
+  }
+
+  if (trigger & kCombiOpsTriggerMul) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "mul x13, x5, x12\n"
+                 "mul x14, x5, x12\n"
+                 "mul x15, x5, x12\n"
+                 "mul x16, x5, x12\n"
+                 "mul x6, x5, x12\n"
+                 "mul x7, x5, x12\n"
+                 "mul x28, x5, x12\n"
+                 "mul x29, x5, x12\n"
+                 "mul x30, x5, x12\n"
+                 "mul x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[4]));
+  }
+
+  if (trigger & kCombiOpsTriggerDiv) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "div x13, x5, x12\n"
+                 "div x14, x5, x12\n"
+                 "div x15, x5, x12\n"
+                 "div x16, x5, x12\n"
+                 "div x6, x5, x12\n"
+                 "div x7, x5, x12\n"
+                 "div x28, x5, x12\n"
+                 "div x29, x5, x12\n"
+                 "div x30, x5, x12\n"
+                 "div x31, x5, x12\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    asm volatile("sw x13, (%0)" ::"r"(&result[5]));
+  }
+
+  if (trigger & kCombiOpsTriggerLw) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "lw x13, (%0)\n"
+                 "lw x14, (%0)\n"
+                 "lw x15, (%0)\n"
+                 "lw x16, (%0)\n"
+                 "lw x6, (%0)\n"
+                 "lw x7, (%0)\n"
+                 "lw x28, (%0)\n"
+                 "lw x29, (%0)\n"
+                 "lw x30, (%0)\n"
+                 "lw x31, (%0)\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    result[6] = value1;
+  }
+
+  if (trigger & kCombiOpsTriggerSw) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x5, (%0)\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    result[7] = value1;
+  }
+
+  if (trigger & kCombiOpsTriggerCp) {
+    init_registers(value1, value2, 0, 0, 0, 0);
+
+    PENTEST_ASM_TRIGGER_HIGH
+    asm volatile(NOP30
+                 "sw x5, (%1)\n"
+                 "sw x12, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x12, (%1)\n"
+                 "sw x5, (%1)\n"
+                 "sw x12, (%0)\n"
+                 "sw x5, (%0)\n"
+                 "sw x12, (%1)\n"
+                 "sw x5, (%1)\n"
+                 "sw x12, (%0)\n" NOP30
+                 :
+                 : "r"(&value1), "r"(&value2));
+    PENTEST_ASM_TRIGGER_LOW
+    result[8] = value1;
+  }
+
+  if (trigger & kCombiOpsTriggerAes) {
+    // Write to the plaintext input for the AES.
+    dif_aes_data_t data;
+    memset(data.data, (int)value1, sizeof(data.data));
+    pentest_set_trigger_high();
+    TRY(dif_aes_load_data(&aes, data));
+    pentest_set_trigger_low();
+    result[9] = value1;
+    // Reset AES such that we are ready for the next round.
+    TRY(dif_aes_reset(&aes));
+  }
+
+  if (trigger & kCombiOpsTriggerHmac) {
+    // Write to the message FIFO for the HMAC.
+    uint8_t msg_buf[16];
+    memset(msg_buf, (int)value1, sizeof(msg_buf));
+    pentest_set_trigger_high();
+    TRY(hmac_testutils_push_message(&hmac, (char *)msg_buf, 16));
+    pentest_set_trigger_low();
+    result[10] = value1;
+  }
+
+  if (trigger & kCombiOpsTriggerOtbn) {
+    // Write to the OTBN.
+    uint32_t msg[8];
+    memset(msg, (int)value1, sizeof(msg));
+    pentest_set_trigger_high();
+    TRY(otbn_dmem_write(8, msg, kOtbnVarMsg));
+    pentest_set_trigger_low();
+    result[11] = value1;
+  }
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_combi_operations_batch(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_batch_ops_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_batch_ops_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < MAX_BATCH_SIZE);
+
+  ibex_sca_ops_result_t uj_output;
+
+  // SCA code target.
+  for (size_t it = 0; it < uj_data.num_iterations; it++) {
+    // Clear the results buffer.
+    memset(uj_output.result, 0, sizeof(uj_output.result));
+    // Call the target code sequence.
+    TRY(trigger_ibex_sca_combi_operations(uj_data.fixed_data1,
+                                          uj_data.fixed_data2, uj_output.result,
+                                          uj_data.trigger));
+  }
+
+  // Write back last values to validate generated data.
+  RESP_OK(ujson_serialize_ibex_sca_ops_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_combi_operations_batch_fvsr(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_batch_ops_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_batch_ops_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < MAX_BATCH_SIZE);
+
+  // Generate FvsR values.
+  uint32_t values1[MAX_BATCH_SIZE];
+  uint32_t values2[MAX_BATCH_SIZE];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data1, values1);
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data2, values2);
+
+  ibex_sca_ops_result_t uj_output;
+
+  // SCA code target.
+  for (size_t it = 0; it < uj_data.num_iterations; it++) {
+    // Clear the results buffer.
+    memset(uj_output.result, 0, sizeof(uj_output.result));
+    // Call the target code sequence.
+    TRY(trigger_ibex_sca_combi_operations(values1[it], values2[it],
+                                          uj_output.result, uj_data.trigger));
+  }
+
+  // Write back last values to validate generated data.
+  RESP_OK(ujson_serialize_ibex_sca_ops_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
 
 status_t handle_ibex_sca_key_sideloading(ujson_t *uj) {
   ibex_sca_salt_t uj_data;
   TRY(ujson_deserialize_ibex_sca_salt_t(uj, &uj_data));
 
-  // Initialize keymgr and advance to CreatorRootKey state.
-  TRY(keymgr_testutils_startup(&keymgr, &kmac));
+  if (!key_manager_init) {
+    // Initialize keymgr and advance to CreatorRootKey state.
+    TRY(keymgr_testutils_startup(&keymgr, &kmac));
 
-  // Generate identity at CreatorRootKey (to follow same sequence and reuse
-  // chip_sw_keymgr_key_derivation_vseq.sv).
-  TRY(keymgr_testutils_generate_identity(&keymgr));
+    // Generate identity at CreatorRootKey (to follow same sequence and reuse
+    // chip_sw_keymgr_key_derivation_vseq.sv).
+    TRY(keymgr_testutils_generate_identity(
+        &keymgr,
+        (dif_keymgr_identity_seed_params_t){.cdi_type = kDifKeymgrSealingCdi}));
 
-  // Advance to OwnerIntermediateKey state.
-  TRY(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
-  TRY(keymgr_testutils_check_state(&keymgr,
-                                   kDifKeymgrStateOwnerIntermediateKey));
+    // Advance to OwnerIntermediateKey state.
+    TRY(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
+    TRY(keymgr_testutils_check_state(&keymgr,
+                                     kDifKeymgrStateOwnerIntermediateKey));
+    key_manager_init = true;
+  }
 
   // Set the salt based on the input.
   dif_keymgr_versioned_key_params_t sideload_params = kKeyVersionedParams;
@@ -51,9 +499,9 @@ status_t handle_ibex_sca_key_sideloading(ujson_t *uj) {
   }
 
   // Trigger keymanager to create a new key based on the provided salt.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   TRY(keymgr_testutils_generate_versioned_key(&keymgr, sideload_params));
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 
   // Read back generated key provided at the software interface.
   dif_keymgr_output_t key;
@@ -69,27 +517,110 @@ status_t handle_ibex_sca_key_sideloading(ujson_t *uj) {
   return OK_STATUS();
 }
 
-status_t handle_ibex_sca_tl_write(ujson_t *uj) {
-  // Get data to write into SRAM.
+status_t handle_ibex_sca_register_file_read(ujson_t *uj) {
+  // Get data to write into RF.
   ibex_sca_test_data_t uj_data;
   TRY(ujson_deserialize_ibex_sca_test_data_t(uj, &uj_data));
-
-  // Get address of buffer located in SRAM.
-  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
-  mmio_region_t sram_region_main_addr =
-      mmio_region_from_addr(sram_main_buffer_addr);
+  // Initialize temporary registers with reference values.
+  copy_to_registers(uj_data.data[0], uj_data.data[1], uj_data.data[2],
+                    uj_data.data[3], uj_data.data[4], uj_data.data[5], 0);
 
   // SCA code target.
-  for (int it = 0; it < uj_data.num_iterations; it++) {
-    sca_set_trigger_high();
-    // Write provided data into SRAM.
-    for (int i = 0; i < 8; i++) {
-      mmio_region_write32(sram_region_main_addr,
-                          i * (ptrdiff_t)sizeof(uint32_t), uj_data.data[i]);
-    }
-    sca_set_trigger_low();
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  // Copy registers.
+  asm volatile("mv x28, x5");
+  asm volatile("mv x29, x6");
+  asm volatile("mv x30, x7");
+  pentest_set_trigger_low();
+
+  // Acknowledge test.
+  ibex_sca_result_t uj_output;
+  uj_output.result = 0;
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_register_file_read_batch_fvsr(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate FvsR values.
+  uint32_t values[256];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
+
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    // Initialize temporary registers with reference values.
+    copy_to_registers(0, 0, 0, values[i], values[i], values[i], values[i]);
+    asm volatile(NOP30);
+    // SCA code target.
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Copy registers.
+    asm volatile("mv x5, x28");
+    asm volatile("mv x6, x29");
+    asm volatile("mv x7, x30");
+    pentest_set_trigger_low();
   }
 
+  // Write back last value written into the RF to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_register_file_read_batch_random(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate random values.
+  uint32_t values[256];
+  generate_random(uj_data.num_iterations, values);
+
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    // Initialize temporary registers with reference values.
+    copy_to_registers(0, 0, 0, values[i], values[i], values[i], values[i]);
+    asm volatile(NOP30);
+    // SCA code target.
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Copy registers.
+    asm volatile("mv x5, x28");
+    asm volatile("mv x6, x29");
+    asm volatile("mv x7, x30");
+    pentest_set_trigger_low();
+  }
+
+  // Write back last value written into the RF to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_register_file_write(ujson_t *uj) {
+  // Get data to write into RF.
+  ibex_sca_test_data_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_data_t(uj, &uj_data));
+
+  // SCA code target.
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  // Write provided data into register file.
+  copy_to_registers(uj_data.data[0], uj_data.data[1], uj_data.data[2],
+                    uj_data.data[3], uj_data.data[4], uj_data.data[5],
+                    uj_data.data[6]);
+  pentest_set_trigger_low();
+
   // Acknowledge test.
   ibex_sca_result_t uj_output;
   uj_output.result = 0;
@@ -97,6 +628,66 @@ status_t handle_ibex_sca_tl_write(ujson_t *uj) {
   return OK_STATUS();
 }
 
+status_t handle_ibex_sca_register_file_write_batch_fvsr(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < MAX_BATCH_SIZE);
+
+  // Generate FvsR values.
+  uint32_t values[MAX_BATCH_SIZE];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
+
+  // SCA code target.
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    pentest_set_trigger_high();
+    init_registers(values[i], values[i], values[i], values[i], values[i],
+                   values[i]);
+    // Give the trigger time to rise.
+    asm volatile(NOP10);
+    // Write provided data into register file.
+    move_bw_registers();
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value written into the RF to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_register_file_write_batch_random(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < MAX_BATCH_SIZE);
+
+  // Generate random values.
+  uint32_t values[MAX_BATCH_SIZE];
+  generate_random(uj_data.num_iterations, values);
+
+  // SCA code target.
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    pentest_set_trigger_high();
+    init_registers(values[i], values[i], values[i], values[i], values[i],
+                   values[i]);
+    // Give the trigger time to rise.
+    asm volatile(NOP10);
+    // Write provided data into register file.
+    move_bw_registers();
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value written into the RF to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
 status_t handle_ibex_sca_tl_read(ujson_t *uj) {
   // Get data to write into SRAM.
   ibex_sca_test_data_t uj_data;
@@ -116,15 +707,15 @@ status_t handle_ibex_sca_tl_read(ujson_t *uj) {
   uint32_t read_data[8];
 
   // SCA code target.
-  for (int it = 0; it < uj_data.num_iterations; it++) {
-    sca_set_trigger_high();
-    // Fetch data from SRAM.
-    for (int i = 0; i < 8; i++) {
-      read_data[i] = mmio_region_read32(sram_region_main_addr,
-                                        i * (ptrdiff_t)sizeof(uint32_t));
-    }
-    sca_set_trigger_low();
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  // Fetch data from SRAM.
+  for (int i = 0; i < 8; i++) {
+    read_data[i] = mmio_region_read32(sram_region_main_addr,
+                                      i * (ptrdiff_t)sizeof(uint32_t));
   }
+  pentest_set_trigger_low();
   // Acknowledge test.
   ibex_sca_result_t uj_output;
   uj_output.result = 0;
@@ -132,23 +723,183 @@ status_t handle_ibex_sca_tl_read(ujson_t *uj) {
   return OK_STATUS();
 }
 
-status_t handle_ibex_sca_register_file_write(ujson_t *uj) {
-  // Get data to write into RF.
+status_t handle_ibex_sca_tl_read_batch_fvsr(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate FvsR values.
+  uint32_t values[256];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // Write provided data into SRAM.
+  for (int i = 0; i < uj_data.num_iterations; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        values[i]);
+  }
+
+  uint32_t read_data[256];
+
+  // SCA code target.
+  // Fetch data from SRAM.
+  for (int i = 0; i < uj_data.num_iterations; i++) {
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    read_data[i] = mmio_region_read32(sram_region_main_addr,
+                                      i * (ptrdiff_t)sizeof(uint32_t));
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value read from SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = read_data[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_read_batch_fvsr_fix_address(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate FvsR values.
+  uint32_t values[256];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  uint32_t read_data[256];
+
+  // SCA code target.
+  // Fetch data from SRAM.
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    mmio_region_write32(sram_region_main_addr, 0, values[i]);
+    asm volatile(NOP30);
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    read_data[i] = mmio_region_read32(sram_region_main_addr, 0);
+    pentest_set_trigger_low();
+  }
+
+  // Write back last value read from SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = read_data[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_read_batch_random(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate random values.
+  uint32_t values[256];
+  generate_random(uj_data.num_iterations, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // Write provided data into SRAM.
+  for (int i = 0; i < uj_data.num_iterations; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        values[i]);
+  }
+
+  uint32_t read_data[256];
+
+  // SCA code target.
+
+  // Fetch data from SRAM.
+  for (int i = 0; i < uj_data.num_iterations; i++) {
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    read_data[i] = mmio_region_read32(sram_region_main_addr,
+                                      i * (ptrdiff_t)sizeof(uint32_t));
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value read from SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = read_data[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_read_batch_random_fix_address(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate random values.
+  uint32_t values[256];
+  generate_random(uj_data.num_iterations, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  uint32_t read_data[256];
+  // SCA code target.
+  // Fetch data from SRAM.
+  for (size_t i = 0; i < uj_data.num_iterations; i++) {
+    mmio_region_write32(sram_region_main_addr, 0, values[i]);
+    asm volatile(NOP30);
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    read_data[i] = mmio_region_read32(sram_region_main_addr, 0);
+    pentest_set_trigger_low();
+  }
+
+  // Write back last value read from SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = read_data[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_write(ujson_t *uj) {
+  // Get data to write into SRAM.
   ibex_sca_test_data_t uj_data;
   TRY(ujson_deserialize_ibex_sca_test_data_t(uj, &uj_data));
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
   // SCA code target.
-  for (int it = 0; it < uj_data.num_iterations; it++) {
-    sca_set_trigger_high();
-    // Write provided data into register file.
-    asm volatile("mv x5, %0" : : "r"(uj_data.data[0]));
-    asm volatile("mv x6, %0" : : "r"(uj_data.data[1]));
-    asm volatile("mv x7, %0" : : "r"(uj_data.data[2]));
-    asm volatile("mv x28, %0" : : "r"(uj_data.data[3]));
-    asm volatile("mv x29, %0" : : "r"(uj_data.data[4]));
-    asm volatile("mv x30, %0" : : "r"(uj_data.data[5]));
-    asm volatile("mv x31, %0" : : "r"(uj_data.data[6]));
-    sca_set_trigger_low();
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  // Write provided data into SRAM.
+  for (int i = 0; i < 8; i++) {
+    mmio_region_write32(sram_region_main_addr, i * (ptrdiff_t)sizeof(uint32_t),
+                        uj_data.data[i]);
   }
+  pentest_set_trigger_low();
+
   // Acknowledge test.
   ibex_sca_result_t uj_output;
   uj_output.result = 0;
@@ -156,44 +907,137 @@ status_t handle_ibex_sca_register_file_write(ujson_t *uj) {
   return OK_STATUS();
 }
 
-status_t handle_ibex_sca_register_file_read(ujson_t *uj) {
-  // Get data to write into RF.
-  ibex_sca_test_data_t uj_data;
-  TRY(ujson_deserialize_ibex_sca_test_data_t(uj, &uj_data));
-  // Initialize temporary registers with reference values.
-  asm volatile("mv x5, %0" : : "r"(uj_data.data[0]));
-  asm volatile("mv x6, %0" : : "r"(uj_data.data[1]));
-  asm volatile("mv x7, %0" : : "r"(uj_data.data[2]));
-  asm volatile("mv x28, %0" : : "r"(uj_data.data[3]));
-  asm volatile("mv x29, %0" : : "r"(uj_data.data[4]));
-  asm volatile("mv x30, %0" : : "r"(uj_data.data[5]));
+status_t handle_ibex_sca_tl_write_batch_fvsr(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate FvsR values.
+  uint32_t values[256];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
 
   // SCA code target.
   for (int it = 0; it < uj_data.num_iterations; it++) {
-    sca_set_trigger_high();
-    // Copy registers.
-    asm volatile("mv x28, x5");
-    asm volatile("mv x29, x6");
-    asm volatile("mv x30, x7");
-    sca_set_trigger_low();
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Write random data into SRAM.
+    mmio_region_write32(sram_region_main_addr, it * (ptrdiff_t)sizeof(uint32_t),
+                        values[it]);
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
   }
-  // Acknowledge test.
+
+  // Write back last value written into SRAM to validate generated data.
   ibex_sca_result_t uj_output;
-  uj_output.result = 0;
+  uj_output.result = values[uj_data.num_iterations - 1];
   RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
-status_t handle_ibex_sca_init(ujson_t *uj) {
-  // Setup trigger and enable peripherals needed for the test.
-  sca_select_trigger_type(kScaTriggerTypeSw);
-  // As we are using the software defined trigger, the first argument of
-  // sca_init is not needed. kScaTriggerSourceAes is selected as a placeholder.
-  sca_init(kScaTriggerSourceAes, kScaPeripheralIoDiv4 | kScaPeripheralKmac);
+status_t handle_ibex_sca_tl_write_batch_fvsr_fix_address(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  ibex_sca_test_fvsr_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_test_fvsr_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
 
-  // Disable the instruction cache and dummy instructions for SCA.
-  sca_configure_cpu();
+  // Generate FvsR values.
+  uint32_t values[256];
+  generate_fvsr(uj_data.num_iterations, uj_data.fixed_data, values);
 
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // SCA code target.
+  for (int it = 0; it < uj_data.num_iterations; it++) {
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Write random data into SRAM at the first address.
+    mmio_region_write32(sram_region_main_addr, 0, values[it]);
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value written into SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_write_batch_random(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate random values.
+  uint32_t values[256];
+  generate_random(uj_data.num_iterations, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // SCA code target.
+  for (int it = 0; it < uj_data.num_iterations; it++) {
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Write random data into SRAM.
+    mmio_region_write32(sram_region_main_addr, it * (ptrdiff_t)sizeof(uint32_t),
+                        values[it]);
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value written into SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_ibex_sca_tl_write_batch_random_fix_address(ujson_t *uj) {
+  // Get number of iterations.
+  ibex_sca_batch_t uj_data;
+  TRY(ujson_deserialize_ibex_sca_batch_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < 256);
+
+  // Generate random values.
+  uint32_t values[256];
+  generate_random(uj_data.num_iterations, values);
+
+  // Get address of buffer located in SRAM.
+  uintptr_t sram_main_buffer_addr = (uintptr_t)&sram_main_buffer_batch;
+  mmio_region_t sram_region_main_addr =
+      mmio_region_from_addr(sram_main_buffer_addr);
+
+  // SCA code target.
+  for (int it = 0; it < uj_data.num_iterations; it++) {
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    // Write random data into SRAM.
+    mmio_region_write32(sram_region_main_addr, 0, values[it]);
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+  }
+
+  // Write back last value written into SRAM to validate generated data.
+  ibex_sca_result_t uj_output;
+  uj_output.result = values[uj_data.num_iterations - 1];
+  RESP_OK(ujson_serialize_ibex_sca_result_t, uj, &uj_output);
   return OK_STATUS();
 }
 
@@ -202,17 +1046,45 @@ status_t handle_ibex_sca(ujson_t *uj) {
   TRY(ujson_deserialize_ibex_sca_subcommand_t(uj, &cmd));
   switch (cmd) {
     case kIbexScaSubcommandInit:
-      return handle_ibex_sca_init(uj);
+      return handle_ibex_pentest_init(uj);
+    case kIbexScaSubcommandCombiOperationsBatch:
+      return handle_ibex_sca_combi_operations_batch(uj);
+    case kIbexScaSubcommandCombiOperationsBatchFvsr:
+      return handle_ibex_sca_combi_operations_batch_fvsr(uj);
+    case kIbexScaSubcommandKeySideloading:
+      return handle_ibex_sca_key_sideloading(uj);
     case kIbexScaSubcommandRFRead:
       return handle_ibex_sca_register_file_read(uj);
+    case kIbexScaSubcommandRFReadBatchFvsr:
+      return handle_ibex_sca_register_file_read_batch_fvsr(uj);
+    case kIbexScaSubcommandRFReadBatchRandom:
+      return handle_ibex_sca_register_file_read_batch_random(uj);
     case kIbexScaSubcommandRFWrite:
       return handle_ibex_sca_register_file_write(uj);
+    case kIbexScaSubcommandRFWriteBatchFvsr:
+      return handle_ibex_sca_register_file_write_batch_fvsr(uj);
+    case kIbexScaSubcommandRFWriteBatchRandom:
+      return handle_ibex_sca_register_file_write_batch_random(uj);
     case kIbexScaSubcommandTLRead:
       return handle_ibex_sca_tl_read(uj);
+    case kIbexScaSubcommandTLReadBatchFvsr:
+      return handle_ibex_sca_tl_read_batch_fvsr(uj);
+    case kIbexScaSubcommandTLReadBatchFvsrFixAddress:
+      return handle_ibex_sca_tl_read_batch_fvsr_fix_address(uj);
+    case kIbexScaSubcommandTLReadBatchRandom:
+      return handle_ibex_sca_tl_read_batch_random(uj);
+    case kIbexScaSubcommandTLReadBatchRandomFixAddress:
+      return handle_ibex_sca_tl_read_batch_random_fix_address(uj);
     case kIbexScaSubcommandTLWrite:
       return handle_ibex_sca_tl_write(uj);
-    case kIbexScaSubcommandKeySideloading:
-      return handle_ibex_sca_key_sideloading(uj);
+    case kIbexScaSubcommandTLWriteBatchFvsr:
+      return handle_ibex_sca_tl_write_batch_fvsr(uj);
+    case kIbexScaSubcommandTLWriteBatchFvsrFixAddress:
+      return handle_ibex_sca_tl_write_batch_fvsr_fix_address(uj);
+    case kIbexScaSubcommandTLWriteBatchRandom:
+      return handle_ibex_sca_tl_write_batch_random(uj);
+    case kIbexScaSubcommandTLWriteBatchRandomFixAddress:
+      return handle_ibex_sca_tl_write_batch_random_fix_address(uj);
     default:
       LOG_ERROR("Unrecognized IBEX SCA subcommand: %d", cmd);
       return INVALID_ARGUMENT();
diff --git a/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h b/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h
index eac35e785add3..97ec8ca7b884f 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h
+++ b/sw/device/tests/penetrationtests/firmware/sca/ibex_sca.h
@@ -8,6 +8,65 @@
 #include "sw/device/lib/base/status.h"
 #include "sw/device/lib/ujson/ujson.h"
 
+/**
+ * Initializes the trigger and configures the device for the Ibex SCA test.
+ *
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_pentest_init(ujson_t *uj);
+
+/**
+ * ibex.sca.combi_operations_batch
+ *
+ * This SCA penetration test executes the following instructions depending on
+ * the trigger:
+ * - Loop num_iterations:
+ *  - XOR values
+ *  - ADD values
+ *  - SUB values
+ *  - SHIFT values
+ *  - MUL values
+ *  - DIV values
+ *  - Load values
+ *  - Store values
+ *  - Copy values from SRAM to another address
+ *  - Send data to the AES
+ *  - Send data to the HMAC
+ *  - Send data to the OTBN
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_combi_operations_batch(ujson_t *uj);
+
+/**
+ * ibex.sca.combi_operations_batch_fvsr
+ *
+ * This SCA penetration test executes the following tests depending on the
+ * trigger:
+ * - Generate num_iteration random values using the software LFSR.Add
+ * commentMore actions
+ * - Loop num_iterations:
+ *  - XOR values
+ *  - ADD values
+ *  - SUB values
+ *  - SHIFT values
+ *  - MUL values
+ *  - DIV values
+ *  - Load values
+ *  - Store values
+ *  - Copy values from SRAM to another address
+ *  - Send data to the AES
+ *  - Send data to the HMAC
+ *  - Send data to the OTBN
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_combi_operations_batch_fvsr(ujson_t *uj);
+
 /**
  * ibex.sca.key_sideloading
  *
@@ -26,12 +85,12 @@
 status_t handle_ibex_sca_key_sideloading(ujson_t *uj);
 
 /**
- * ibex.sca.tl_write
+ * ibex.sca.register_file_read
  *
  * This SCA penetration test executes the following instructions:
  * - Loop num_iterations:
  *  - Set trigger
- *  - Write data over TL-UL into SRAM.
+ *  - Read data from RF
  *  - Unset trigger
  *
  * SCA traces are captured during trigger_high & trigger_low.
@@ -39,15 +98,16 @@ status_t handle_ibex_sca_key_sideloading(ujson_t *uj);
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_sca_tl_write(ujson_t *uj);
+status_t handle_ibex_sca_register_file_read(ujson_t *uj);
 
 /**
- * ibex.sca.tl_read
+ * ibex.sca.register_file_read_batch_fvsr
  *
  * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration FvsR values using the software LFSR.
  * - Loop num_iterations:
  *  - Set trigger
- *  - Read data from SRAM over TL-UL.
+ *  - Read data from RF
  *  - Unset trigger
  *
  * SCA traces are captured during trigger_high & trigger_low.
@@ -55,14 +115,30 @@ status_t handle_ibex_sca_tl_write(ujson_t *uj);
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_sca_tl_read(ujson_t *uj);
+status_t handle_ibex_sca_register_file_read_batch_fvsr(ujson_t *uj);
 
 /**
- * ibex.sca.register_file_write
+ * ibex.sca.register_file_read_batch_random
  *
  * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration random values using the software LFSR.
  * - Loop num_iterations:
  *  - Set trigger
+ *  - Read data from RF
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_register_file_read_batch_random(ujson_t *uj);
+
+/**
+ * ibex.sca.register_file_write
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Set trigger
  *  - Write provided data to registers in RF
  *  - Unset trigger
  *
@@ -74,12 +150,139 @@ status_t handle_ibex_sca_tl_read(ujson_t *uj);
 status_t handle_ibex_sca_register_file_write(ujson_t *uj);
 
 /**
- * ibex.sca.register_file_read
+ * ibex.sca.register_file_write_batch_fvsr
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration FvsR values using the software LFSR.
+ *  - Set trigger
+ *  - Write random data to registers in RF
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_register_file_write_batch_fvsr(ujson_t *uj);
+
+/**
+ * ibex.sca.register_file_write_batch_random
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration random values using the software LFSR.
+ *  - Set trigger
+ *  - Write random data to registers in RF
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_register_file_write_batch_random(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_read
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Set trigger
+ *  - Read data from SRAM over TL-UL.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_read(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_read_batch_fvsr
  *
  * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration FvsR values using the software LFSR.
+ *  - Set trigger
+ *  - Read data from SRAM over TL-UL.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_read_batch_fvsr(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_read_batch_fvsr_fix_address
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration FvsR values using the software LFSR.
+ *  - Set trigger
+ *  - Read data from a single address in SRAM over TL-UL.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_read_batch_fvsr_fix_address(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_read_batch_random
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration random values using the software LFSR.
+ *  - Set trigger
+ *  - Read data from SRAM over TL-UL.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_read_batch_random(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_read_batch_random_fix_address
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Generate num_iteration random values using the software LFSR.
+ *  - Set trigger
+ *  - Read data from a single address in SRAM over TL-UL.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_read_batch_random_fix_address(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_write
+ *
+ * This SCA penetration test executes the following instructions:
+ *  - Set trigger
+ *  - Write data over TL-UL into SRAM.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_write(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_write_batch_fvsr
+ *
+ * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration FvsR values using the software LFSR.
  * - Loop num_iterations:
  *  - Set trigger
- *  - Read data from RF
+ *  - Write data over TL-UL into SRAM.
  *  - Unset trigger
  *
  * SCA traces are captured during trigger_high & trigger_low.
@@ -87,16 +290,58 @@ status_t handle_ibex_sca_register_file_write(ujson_t *uj);
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_sca_register_file_read(ujson_t *uj);
+status_t handle_ibex_sca_tl_write_batch_fvsr(ujson_t *uj);
 
 /**
- * Initializes the trigger and configures the device for the Ibex SCA test.
+ * ibex.sca.tl_write_batch_fvsr_fix_address
+ *
+ * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration FvsR values using the software LFSR.
+ * - Loop num_iterations:
+ *  - Set trigger
+ *  - Write data over TL-UL into a single position in SRAM.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
  *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_write_batch_fvsr_fix_address(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_write_batch_random
+ *
+ * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration random values using the software LFSR.
+ * - Loop num_iterations:
+ *  - Set trigger
+ *  - Write data over TL-UL into SRAM.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_ibex_sca_tl_write_batch_random(ujson_t *uj);
+
+/**
+ * ibex.sca.tl_write_batch_random_fix_address
+ *
+ * This SCA penetration test executes the following instructions:
+ * - Generate num_iteration random values using the software LFSR.
+ * - Loop num_iterations:
+ *  - Set trigger
+ *  - Write data over TL-UL into a single position in SRAM.
+ *  - Unset trigger
+ *
+ * SCA traces are captured during trigger_high & trigger_low.
  *
  * @param uj An initialized uJSON context.
  * @return OK or error.
  */
-status_t handle_ibex_sca_init(ujson_t *uj);
+status_t handle_ibex_sca_tl_write_batch_random_fix_address(ujson_t *uj);
 
 /**
  * Ibex SCA command handler.
diff --git a/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.c b/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.c
index e80d26005eb81..1b2ed35fc69e9 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.c
@@ -12,8 +12,8 @@
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
-#include "sw/device/tests/penetrationtests/firmware/lib/sca_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/commands.h"
 #include "sw/device/tests/penetrationtests/json/kmac_sca_commands.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -224,7 +224,7 @@ static kmac_sca_error_t kmac_msg_start(
   mmio_region_write32(kmac.base_addr, KMAC_KEY_LEN_REG_OFFSET, key_len);
   for (int i = 0; i < ARRAYSIZE(k->share0); ++i) {
     // Run LFSR for 32 steps to ensure that all state bits are updated.
-    const uint32_t a = sca_next_lfsr(32, kScaLfsrMasking);
+    const uint32_t a = pentest_next_lfsr(32, kPentestLfsrMasking);
     mmio_region_write32(kmac.base_addr,
                         KMAC_KEY_SHARE0_0_REG_OFFSET +
                             (ptrdiff_t)i * (ptrdiff_t)sizeof(uint32_t),
@@ -445,15 +445,19 @@ kmac_sca_error_t kmac_get_digest(uint32_t *out, size_t len) {
  *
  * This function configures KMAC to use software entropy.
  */
-status_t handle_kmac_sca_init(ujson_t *uj) {
+status_t handle_kmac_pentest_init(ujson_t *uj) {
   // Read mode. FPGA or discrete.
   cryptotest_kmac_sca_fpga_mode_t uj_data;
   TRY(ujson_deserialize_cryptotest_kmac_sca_fpga_mode_t(uj, &uj_data));
   if (uj_data.fpga_mode == 0x01) {
     fpga_mode = true;
   }
-  // Setup the trigger.
-  sca_init(kScaTriggerSourceKmac, kScaPeripheralIoDiv4 | kScaPeripheralKmac);
+
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
   TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
 
   dif_kmac_config_t config = (dif_kmac_config_t){
@@ -470,11 +474,35 @@ status_t handle_kmac_sca_init(ujson_t *uj) {
 
   kmac_block_until_idle();
 
-  // Disable the instruction cache and dummy instructions for better SCA
-  // measurements.
-  sca_configure_cpu();
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Setup the trigger.
+  pentest_init(kPentestTriggerSourceKmac,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralKmac,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -504,7 +532,7 @@ status_t handle_kmac_sca_set_key(ujson_t *uj) {
   };
   memcpy(kmac_key.share0, uj_key.key, kKeyLength);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -540,8 +568,8 @@ static kmac_sca_error_t sha3_ujson_absorb(const uint8_t *msg, size_t msg_len) {
   if (fpga_mode == false) {
     // Start command. On the chip, we need to first issue a START command
     // before writing to the message FIFO.
-    sca_call_and_sleep(kmac_start_cmd, kIbexLoadHashPrefixKeySleepCycles,
-                       false);
+    pentest_call_and_sleep(kmac_start_cmd, kIbexLoadHashPrefixKeySleepCycles,
+                           false, false);
   }
 
   // Write data to message FIFO.
@@ -555,12 +583,13 @@ static kmac_sca_error_t sha3_ujson_absorb(const uint8_t *msg, size_t msg_len) {
     // configured to start operation 320 cycles after receiving the START and
     // PROC commands. This allows Ibex to go to sleep in order to not disturb
     // the capture.
-    sca_call_and_sleep(kmac_start_process_cmd, kIbexSha3SleepCycles, false);
+    pentest_call_and_sleep(kmac_start_process_cmd, kIbexSha3SleepCycles, false,
+                           false);
   } else {
     // On the chip, issue a PROCESS command to start operation and put Ibex
     // into sleep.
-    sca_call_and_sleep(kmac_process_cmd, kIbexLoadHashMessageSleepCycles,
-                       false);
+    pentest_call_and_sleep(kmac_process_cmd, kIbexLoadHashMessageSleepCycles,
+                           false, false);
   }
 
   return kmacScaOk;
@@ -588,11 +617,11 @@ status_t handle_kmac_sca_single_absorb(ujson_t *uj) {
   }
 
   // Ungate the capture trigger signal and then start the operation.
-  sca_set_trigger_high();
+  pentest_set_trigger_high();
   if (sha3_ujson_absorb(uj_msg.msg, uj_msg.msg_length) != kmacScaOk) {
     return ABORTED();
   }
-  sca_set_trigger_low();
+  pentest_set_trigger_low();
 
   // Check KMAC has finished processing the message.
   kmac_msg_done();
@@ -611,7 +640,7 @@ status_t handle_kmac_sca_single_absorb(ujson_t *uj) {
   // another absorb.
   kmac_reset();
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -633,7 +662,7 @@ status_t handle_kmac_sca_fixed_key_set(ujson_t *uj) {
 
   memcpy(key_fixed, uj_key.key, uj_key.key_length);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -647,20 +676,17 @@ status_t handle_kmac_sca_fixed_key_set(ujson_t *uj) {
  * @param uj The received uJSON data.
  */
 status_t handle_kmac_sca_batch(ujson_t *uj) {
-  cryptotest_kmac_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_kmac_sca_data_t(uj, &uj_data));
+  penetrationtest_num_enc_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
 
-  uint32_t num_encryptions = 0;
   uint32_t out[kDigestLength];
   uint32_t batch_digest[kDigestLength];
 
-  num_encryptions = read_32(uj_data.data);
-
   for (uint32_t j = 0; j < kDigestLength; ++j) {
     batch_digest[j] = 0;
   }
 
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
     if (run_fixed) {
       memcpy(kmac_batch_keys[i], key_fixed, kKeyLength);
     } else {
@@ -670,15 +696,16 @@ status_t handle_kmac_sca_batch(ujson_t *uj) {
     run_fixed = batch_messages[i][0] & 0x1;
   }
 
-  for (uint32_t i = 0; i < num_encryptions; ++i) {
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
     kmac_reset();
     memcpy(kmac_key.share0, kmac_batch_keys[i], kKeyLength);
+    memset(kmac_key.share1, 0, kKeyLength);
 
-    sca_set_trigger_high();
+    pentest_set_trigger_high();
     if (sha3_ujson_absorb(batch_messages[i], kMessageLength) != kmacScaOk) {
       return ABORTED();
     }
-    sca_set_trigger_low();
+    pentest_set_trigger_low();
 
     kmac_msg_done();
     if (kmac_get_digest(out, kDigestLength) != kmacScaOk) {
@@ -697,7 +724,59 @@ status_t handle_kmac_sca_batch(ujson_t *uj) {
   memcpy(uj_output.batch_digest, (uint8_t *)batch_digest, kDigestLength * 4);
   RESP_OK(ujson_serialize_cryptotest_kmac_sca_batch_digest_t, uj, &uj_output);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
+}
+
+/**
+ * Batch command handler with daisy chaining.
+ *
+ * Start batch mode.
+ *
+ * The uJSON data contains:
+ *  - data: The number of encryptions.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_kmac_sca_batch_daisy_chain(ujson_t *uj) {
+  penetrationtest_num_enc_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
+  cryptotest_kmac_sca_msg_t uj_message;
+  TRY(ujson_deserialize_cryptotest_kmac_sca_msg_t(uj, &uj_message));
+  cryptotest_kmac_sca_key_t uj_key;
+  TRY(ujson_deserialize_cryptotest_kmac_sca_key_t(uj, &uj_key));
+
+  uint32_t out[kDigestLength];
+
+  uint8_t message_buf[KMACSCA_CMD_MAX_MSG_BYTES];
+  // Pad with zero.
+  memset(message_buf, 0, KMACSCA_CMD_MAX_MSG_BYTES);
+  memcpy(message_buf, uj_message.msg, uj_message.msg_length);
+
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
+    kmac_reset();
+    memcpy(kmac_key.share0, uj_key.key, kKeyLength);
+
+    pentest_set_trigger_high();
+    if (sha3_ujson_absorb(message_buf, KMACSCA_CMD_MAX_MSG_BYTES) !=
+        kmacScaOk) {
+      return ABORTED();
+    }
+    pentest_set_trigger_low();
+
+    kmac_msg_done();
+    if (kmac_get_digest(out, kDigestLength) != kmacScaOk) {
+      return ABORTED();
+    }
+
+    // Copy the output to the input.
+    memcpy(message_buf, (uint8_t *)out, KMACSCA_CMD_MAX_MSG_BYTES);
+  }
+  // Send the last digest to the host for verification.
+  cryptotest_kmac_sca_digest_t uj_output;
+  memcpy(uj_output.digest, (uint8_t *)out, kDigestLength * 2);
+  RESP_OK(ujson_serialize_cryptotest_kmac_sca_digest_t, uj, &uj_output);
+
+  return OK_STATUS();
 }
 
 /**
@@ -710,12 +789,12 @@ status_t handle_kmac_sca_batch(ujson_t *uj) {
  *
  * @param uj The received uJSON data.
  */
-status_t handle_kmac_sca_seed_lfsr(ujson_t *uj) {
+status_t handle_kmac_pentest_seed_lfsr(ujson_t *uj) {
   cryptotest_kmac_sca_lfsr_t uj_lfsr_data;
   TRY(ujson_deserialize_cryptotest_kmac_sca_lfsr_t(uj, &uj_lfsr_data));
-  sca_seed_lfsr(read_32(uj_lfsr_data.seed), kScaLfsrMasking);
+  pentest_seed_lfsr(read_32(uj_lfsr_data.seed), kPentestLfsrMasking);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -730,20 +809,22 @@ status_t handle_kmac_sca(ujson_t *uj) {
   TRY(ujson_deserialize_kmac_sca_subcommand_t(uj, &cmd));
   switch (cmd) {
     case kKmacScaSubcommandInit:
-      return handle_kmac_sca_init(uj);
+      return handle_kmac_pentest_init(uj);
     case kKmacScaSubcommandSetKey:
       return handle_kmac_sca_set_key(uj);
     case kKmacScaSubcommandSingleAbsorb:
       return handle_kmac_sca_single_absorb(uj);
     case kKmacScaSubcommandBatch:
       return handle_kmac_sca_batch(uj);
+    case kKmacScaSubcommandBatchDaisy:
+      return handle_kmac_sca_batch_daisy_chain(uj);
     case kKmacScaSubcommandFixedKeySet:
       return handle_kmac_sca_fixed_key_set(uj);
     case kKmacScaSubcommandSeedLfsr:
-      return handle_kmac_sca_seed_lfsr(uj);
+      return handle_kmac_pentest_seed_lfsr(uj);
     default:
       LOG_ERROR("Unrecognized KMAC SCA FI subcommand: %d", cmd);
       return INVALID_ARGUMENT();
   }
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
diff --git a/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h b/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h
index d61f90daebe37..4619a69c623d9 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h
+++ b/sw/device/tests/penetrationtests/firmware/sca/kmac_sca.h
@@ -27,12 +27,13 @@ typedef enum kmac_sca_error {
   kmacScaOutOfRange = 2
 } kmac_sca_error_t;
 
-status_t handle_kmac_sca_seed_lfsr(ujson_t *uj);
+status_t handle_kmac_pentest_seed_lfsr(ujson_t *uj);
 status_t handle_kmac_sca_fixed_key_set(ujson_t *uj);
 status_t handle_kmac_sca_batch(ujson_t *uj);
+status_t handle_kmac_sca_batch_daisy_chain(ujson_t *uj);
 status_t handle_kmac_sca_single_absorb(ujson_t *uj);
 status_t handle_kmac_sca_set_key(ujson_t *uj);
-status_t handle_kmac_sca_init(ujson_t *uj);
+status_t handle_kmac_pentest_init(ujson_t *uj);
 status_t handle_kmac_sca(ujson_t *uj);
 
 #endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_KMAC_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn/BUILD b/sw/device/tests/penetrationtests/firmware/sca/otbn/BUILD
new file mode 100644
index 0000000000000..33645aea1e4d9
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn/BUILD
@@ -0,0 +1,28 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:otbn.bzl", "otbn_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+otbn_binary(
+    name = "otbn_insn_carry_flag",
+    srcs = [
+        "otbn_insn_carry_flag.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_key_sideload_sca",
+    srcs = [
+        "otbn_key_sideload_sca.s",
+    ],
+)
+
+otbn_binary(
+    name = "otbn_insn_combi_ops",
+    srcs = [
+        "otbn_insn_combi_ops.s",
+    ],
+)
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_carry_flag.s b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_carry_flag.s
new file mode 100644
index 0000000000000..e06ff03d96107
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_carry_flag.s
@@ -0,0 +1,46 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.INSN.CARRY_FLAG SCA Test
+*/
+.section .text.start
+
+    /* w3 & w10 are random, w10 contains the value big_num. */
+    bn.wsrr w0, URND
+    bn.wsrr w3, URND
+    li      x10, 10
+    la      x1, big_num
+    bn.lid  x10, 0x00(x1)
+    /* Load big_num_out base address */
+    la      x1, big_num_out
+
+    loopi 10, 1
+      nop
+
+    /* Add with carry: big_num = big_num + big_num. */
+    bn.addc w10, w10, w10
+
+    loopi 10, 1
+      nop
+
+    li      x2, 2
+    bn.movr x2, x10
+    /* If carry was set, store random number into w0. If not, store big_num.  */
+    bn.sel  w0, w2, w3, C
+
+    /* Write w0 back to DEM. */
+    bn.sid  x0, 0x000(x1)
+
+    ecall
+
+.data
+    .globl big_num
+    .balign 32
+    big_num:
+        .zero 32
+
+    .globl big_num_out
+    .balign 32
+    big_num_out:
+        .zero 32
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_combi_ops.s b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_combi_ops.s
new file mode 100644
index 0000000000000..6b6ec7f53c192
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_insn_combi_ops.s
@@ -0,0 +1,403 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.INSN.COMBI_OPS SCA Test
+*/
+.section .text.start
+
+    /* Load results base addresses */
+    la      x1, result_1
+    la      x2, result_2
+    la      x3, result_3
+    la      x4, result_4
+    la      x5, result_5
+    la      x6, result_6
+    la      x7, result_7
+    la      x8, result_8
+
+    /* Load first input in w0 */
+    la      x9, big_input_1
+    bn.lid  x0, 0x00(x9)
+
+    /* Load second input in w1 */
+    li      x10, 1
+    la      x9, big_input_2
+    bn.lid  x10, 0x00(x9)
+
+    /* Set the zero register */
+    bn.xor w31, w31, w31
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Copy paste each value 8 times */
+    bn.rshi  w2, w0, w31 >> 224
+    bn.xor   w0, w0, w2
+    bn.rshi  w2, w0, w31 >> 192
+    bn.xor   w0, w0, w2
+    bn.rshi  w2, w0, w31 >> 128
+    bn.xor   w0, w0, w2
+
+    bn.rshi  w2, w1, w31 >> 224
+    bn.xor   w1, w1, w2
+    bn.rshi  w2, w1, w31 >> 192
+    bn.xor   w1, w1, w2
+    bn.rshi  w2, w1, w31 >> 128
+    bn.xor   w1, w1, w2
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Move w0 around */
+    bn.mov w10, w0
+    bn.mov w11, w0
+    bn.mov w12, w0
+    bn.mov w13, w0
+    bn.mov w14, w0
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Add the two values */
+    bn.add w15, w0, w1
+    bn.add w16, w0, w1
+    bn.add w17, w0, w1
+    bn.add w18, w0, w1
+    bn.add w19, w0, w1
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Subtract the two values */
+    bn.sub w20, w0, w1
+    bn.sub w21, w0, w1
+    bn.sub w22, w0, w1
+    bn.sub w23, w0, w1
+    bn.sub w24, w0, w1
+
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Xor the two values */
+    bn.xor w25, w0, w1
+    bn.xor w26, w0, w1
+    bn.xor w27, w0, w1
+    bn.xor w28, w0, w1
+    bn.xor w29, w0, w1
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Clear some registers */
+    bn.xor w10, w10, w10
+    bn.xor w11, w11, w11
+    bn.xor w12, w12, w12
+    bn.xor w13, w13, w13
+
+    bn.xor w15, w15, w15
+    bn.xor w16, w16, w16
+    bn.xor w17, w17, w17
+    bn.xor w18, w18, w18
+
+    bn.xor w20, w20, w20
+    bn.xor w21, w21, w21
+    bn.xor w22, w22, w22
+    bn.xor w23, w23, w23
+
+    bn.xor w25, w25, w25
+    bn.xor w26, w26, w26
+    bn.xor w27, w27, w27
+    bn.xor w28, w28, w28
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Left shift the value by one */
+    bn.rshi w4, w0, w31 >> 255
+    bn.rshi w5, w0, w31 >> 255
+    bn.rshi w6, w0, w31 >> 255
+    bn.rshi w7, w0, w31 >> 255
+    bn.rshi w8, w0, w31 >> 255
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Multiply the two values */
+    bn.mulqacc.so w9.L, w0.0, w1.0, 0
+    bn.mulqacc.so w10.L, w0.0, w1.0, 0
+    bn.mulqacc.so w11.L, w0.0, w1.0, 0
+    bn.mulqacc.so w12.L, w0.0, w1.0, 0
+    bn.mulqacc.so w13.L, w0.0, w1.0, 0
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Compare the two values */
+    bn.cmp w0, w1
+    bn.cmp w0, w1
+    bn.cmp w0, w1
+    bn.cmp w0, w1
+    bn.cmp w0, w1
+
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+    nop
+
+    /* Write back to results */
+    bn.sid  x0, 0x000(x1)
+
+    addi    x20, x0, 14
+    bn.sid  x20, 0x000(x2)
+
+    addi    x21, x0, 19
+    bn.sid  x21, 0x000(x3)
+
+    addi    x22, x0, 24
+    bn.sid  x22, 0x000(x4)
+
+    addi    x23, x0, 29
+    bn.sid  x23, 0x000(x5)
+
+    addi    x24, x0, 8
+    bn.sid  x24, 0x000(x6)
+
+    addi    x25, x0, 13
+    bn.sid  x25, 0x000(x7)
+
+    la x17, result_8
+    csrrs x16, FG0, x0
+    sw  x16, 0(x17)
+
+    ecall
+
+.data
+    .globl big_input_1
+    .balign 32
+    big_input_1:
+        .zero 32
+
+    .globl big_input_2
+    .balign 32
+    big_input_2:
+        .zero 32
+
+    .globl result_1
+    .balign 32
+    result_1:
+        .zero 32
+
+    .globl result_2
+    .balign 32
+    result_2:
+        .zero 32
+
+    .globl result_3
+    .balign 32
+    result_3:
+        .zero 32
+
+    .globl result_4
+    .balign 32
+    result_4:
+        .zero 32
+
+    .globl result_5
+    .balign 32
+    result_5:
+        .zero 32
+
+    .globl result_6
+    .balign 32
+    result_6:
+        .zero 32
+
+    .globl result_7
+    .balign 32
+    result_7:
+        .zero 32
+
+    .globl result_8
+    .balign 4
+    result_8:
+        .zero 4
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_key_sideload_sca.s b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_key_sideload_sca.s
new file mode 100644
index 0000000000000..46382546f061b
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn/otbn_key_sideload_sca.s
@@ -0,0 +1,77 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+    OBTN.KEY_SIDELOAD FI Penetration Test
+*/
+.section .text.start
+
+    /* Load all key shares into w20...w23. */
+    bn.wsrr  w20, KEY_S0_L
+    bn.wsrr  w21, KEY_S1_L
+    bn.wsrr  w22, KEY_S0_H
+    bn.wsrr  w23, KEY_S1_H
+
+    /* w8 <= KEY_S0_L ^ KEY_S1_L */
+    bn.xor  w8, w20, w21
+
+    /* w9 <= KEY_S0_H ^ KEY_S1_H */
+    bn.xor  w9, w22, w23
+
+    /* Write shares and keys into accessible DMEM. */
+    li      x2, 20
+    la      x3, k_s0_l
+    bn.sid  x2, 0(x3)
+
+    li      x2, 21
+    la      x3, k_s0_h
+    bn.sid  x2, 0(x3)
+
+    li      x2, 22
+    la      x3, k_s1_l
+    bn.sid  x2, 0(x3)
+
+    li      x2, 23
+    la      x3, k_s1_h
+    bn.sid  x2, 0(x3)
+
+    li      x2, 8
+    la      x3, k_l
+    bn.sid  x2, 0(x3)
+
+    li      x2, 9
+    la      x3, k_h
+    bn.sid  x2, 0(x3)
+
+    ecall
+
+.data
+    .globl k_s0_l
+    .balign 32
+    k_s0_l:
+    .zero 32
+
+    .globl k_s0_h
+    .balign 32
+    k_s0_h:
+    .zero 32
+
+    .globl k_s1_l
+    .balign 32
+    k_s1_l:
+    .zero 32
+
+    .globl k_s1_h
+    .balign 32
+    k_s1_h:
+    .zero 32
+
+    .globl k_l
+    .balign 32
+    k_l:
+    .zero 32
+
+    .globl k_h
+    .balign 32
+    k_h:
+    .zero 32
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.c b/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.c
new file mode 100644
index 0000000000000..f023333e59785
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.c
@@ -0,0 +1,843 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/otbn_sca.h"
+
+#include "ecc256_keygen_sca.h"
+#include "sw/device/lib/arch/boot_stage.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/crypto/drivers/keymgr.h"
+#include "sw/device/lib/crypto/impl/keyblob.h"
+#include "sw/device/lib/crypto/impl/status.h"
+#include "sw/device/lib/dif/dif_otbn.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/entropy_testutils.h"
+#include "sw/device/lib/testing/keymgr_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/otbn_sca_commands.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "otbn_regs.h"  // Generated.
+
+#define MAX_BATCH_SIZE 256
+#define BYTES_IN_WDR 32
+
+static dif_otbn_t otbn;
+static dif_keymgr_t keymgr;
+static dif_kmac_t kmac;
+
+enum {
+  kKeySideloadNumIt = 16,
+  /**
+   * Number of bytes for ECDSA P-256 private keys, message digests, and point
+   * coordinates.
+   */
+  kEcc256NumBytes = 256 / 8,
+  /**
+   * Number of 32b words for ECDSA P-256 private keys, message digests, and
+   * point coordinates.
+   */
+  kEcc256NumWords = kEcc256NumBytes / sizeof(uint32_t),
+  /**
+   * Max number of traces per batch.
+   */
+  kNumBatchOpsMax = 256,
+};
+
+// Data structs for key sideloading test.
+OTBN_DECLARE_APP_SYMBOLS(otbn_key_sideload_sca);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_s0_l);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_s0_h);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_s1_l);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_s1_h);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_l);
+OTBN_DECLARE_SYMBOL_ADDR(otbn_key_sideload_sca, k_h);
+const otbn_app_t kOtbnAppKeySideloadSca =
+    OTBN_APP_T_INIT(otbn_key_sideload_sca);
+static const otbn_addr_t kOtbnAppKeySideloadks0l =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_s0_l);
+static const otbn_addr_t kOtbnAppKeySideloadks0h =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_s0_h);
+static const otbn_addr_t kOtbnAppKeySideloadks1l =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_s1_l);
+static const otbn_addr_t kOtbnAppKeySideloadks1h =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_s1_h);
+static const otbn_addr_t kOtbnAppKeySideloadkl =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_l);
+static const otbn_addr_t kOtbnAppKeySideloadkh =
+    OTBN_ADDR_T_INIT(otbn_key_sideload_sca, k_h);
+
+// RSA-512 OTBN App.
+OTBN_DECLARE_APP_SYMBOLS(run_rsa);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, mode);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, inout);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_n);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d0);
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, rsa_d1);
+
+static const otbn_app_t kOtbnAppRsa = OTBN_APP_T_INIT(run_rsa);
+static const otbn_addr_t kOtbnVarRsaMode = OTBN_ADDR_T_INIT(run_rsa, mode);
+static const otbn_addr_t kOtbnVarRsaInOut = OTBN_ADDR_T_INIT(run_rsa, inout);
+static const otbn_addr_t kOtbnVarRsaModulus = OTBN_ADDR_T_INIT(run_rsa, rsa_n);
+static const otbn_addr_t kOtbnVarRsaD0 = OTBN_ADDR_T_INIT(run_rsa, rsa_d0);
+static const otbn_addr_t kOtbnVarRsaD1 = OTBN_ADDR_T_INIT(run_rsa, rsa_d1);
+
+OTBN_DECLARE_SYMBOL_ADDR(run_rsa, MODE_RSA_512_MODEXP);
+static const uint32_t kMode512Modexp =
+    OTBN_ADDR_T_INIT(run_rsa, MODE_RSA_512_MODEXP);
+
+// p256_ecdsa_sca has randomization removed.
+OTBN_DECLARE_APP_SYMBOLS(p256_ecdsa_sca);
+
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, mode);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, msg);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, r);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, s);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, x);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, y);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, d0);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, d1);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, k0);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, k1);
+OTBN_DECLARE_SYMBOL_ADDR(p256_ecdsa_sca, x_r);
+
+static const otbn_app_t kOtbnAppP256Ecdsa = OTBN_APP_T_INIT(p256_ecdsa_sca);
+
+static const otbn_addr_t kOtbnVarMode = OTBN_ADDR_T_INIT(p256_ecdsa_sca, mode);
+static const otbn_addr_t kOtbnVarMsg = OTBN_ADDR_T_INIT(p256_ecdsa_sca, msg);
+static const otbn_addr_t kOtbnVarR = OTBN_ADDR_T_INIT(p256_ecdsa_sca, r);
+static const otbn_addr_t kOtbnVarS = OTBN_ADDR_T_INIT(p256_ecdsa_sca, s);
+static const otbn_addr_t kOtbnVarD0 = OTBN_ADDR_T_INIT(p256_ecdsa_sca, d0);
+static const otbn_addr_t kOtbnVarD1 = OTBN_ADDR_T_INIT(p256_ecdsa_sca, d1);
+static const otbn_addr_t kOtbnVarK0 = OTBN_ADDR_T_INIT(p256_ecdsa_sca, k0);
+static const otbn_addr_t kOtbnVarK1 = OTBN_ADDR_T_INIT(p256_ecdsa_sca, k1);
+
+/**
+ * Clears the OTBN DMEM and IMEM.
+ *
+ * @returns OK or error.
+ */
+static status_t clear_otbn(void) {
+  // Clear OTBN memory.
+  TRY(otbn_dmem_sec_wipe());
+  TRY(otbn_imem_sec_wipe());
+
+  return OK_STATUS();
+}
+
+/**
+ * Generate masked shared.
+ *
+ * If mask_en is set, generate a random share.
+ * If mask_en is not set, set share to 0.
+ *
+ * @param dest_array          Destination array.
+ * @param mask_en             Masking enabled or disabled.
+ * @param len                 Length of the array.
+ */
+void gen_mask_data(uint32_t *dest_array, bool mask_en, size_t len) {
+  if (mask_en) {
+    for (size_t j = 0; j < len; ++j) {
+      dest_array[j] = prng_rand_uint32();
+    }
+  } else {
+    memset(dest_array, 0, len * sizeof(dest_array[0]));
+  }
+}
+
+/**
+ * Generate a FvsR data set.
+ *
+ * If fixed is set, copy src_fixed_array into dest_array.
+ * If fixed is not set, generate random data.
+ *
+ * @param dest_array          Destination array.
+ * @param fixed               Fixed or random set.
+ * @param src_fixed_array     Source fixed array.
+ * @param len                 Length of the array.
+ */
+void gen_fvsr_data(uint32_t *dest_array, bool fixed, uint32_t *src_fixed_array,
+                   size_t len) {
+  if (fixed) {
+    memcpy(dest_array, src_fixed_array, len * sizeof(src_fixed_array[0]));
+  } else {
+    for (size_t j = 0; j < len; ++j) {
+      dest_array[j] = prng_rand_uint32();
+    }
+  }
+}
+
+/**
+ * Signs a message with ECDSA using the P-256 curve.
+ *
+ * R = k*G
+ * r = x-coordinate of R
+ * s = k^(-1)(msg + r*d)  mod n
+ *
+ * @param otbn_ctx            The OTBN context object.
+ * @param msg                 The message to sign, msg (32B).
+ * @param private_key_d       The private key, d (32B).
+ * @param k                   The ephemeral key,  k (random scalar) (32B).
+ * @param[out] signature_r    Signature component r (the x-coordinate of R).
+ *                            Provide a pre-allocated 32B buffer.
+ * @param[out] signature_s    Signature component s (the proof).
+ *                            Provide a pre-allocated 32B buffer.
+ */
+static status_t p256_ecdsa_sign(const uint32_t *msg,
+                                const uint32_t *private_key_d,
+                                uint32_t *signature_r, uint32_t *signature_s,
+                                const uint32_t *k) {
+  uint32_t mode = 1;  // mode 1 => sign
+  // Send operation mode to OTBN
+  TRY(otbn_dmem_write(/*num_words=*/1, &mode, kOtbnVarMode));
+  // Send Msg to OTBN
+  TRY(otbn_dmem_write(kEcc256NumWords, msg, kOtbnVarMsg));
+  // Send two shares of private_key_d to OTBN
+  TRY(otbn_dmem_write(kEcc256NumWords, private_key_d, kOtbnVarD0));
+  TRY(otbn_dmem_write(kEcc256NumWords, private_key_d + kEcc256NumWords,
+                      kOtbnVarD1));
+  // Send two shares of secret_k to OTBN
+  TRY(otbn_dmem_write(kEcc256NumWords, k, kOtbnVarK0));
+  TRY(otbn_dmem_write(kEcc256NumWords, k + kEcc256NumWords, kOtbnVarK1));
+
+  // Start OTBN execution
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Read the results back (sig_r, sig_s)
+  TRY(otbn_dmem_read(kEcc256NumWords, kOtbnVarR, signature_r));
+  TRY(otbn_dmem_read(kEcc256NumWords, kOtbnVarS, signature_s));
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecdsa_p256_sign(ujson_t *uj) {
+  // Get masks off or on.
+  penetrationtest_otbn_sca_en_masks_t uj_data_masks;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_en_masks_t(uj,
+                                                            &uj_data_masks));
+
+  // Get message and key.
+  penetrationtest_otbn_sca_ecdsa_p256_sign_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_ecdsa_p256_sign_t(uj,
+                                                                   &uj_data));
+
+  // Set of share d1 for masking.
+  uint32_t ecc256_private_key_d1[kEcc256NumWords];
+  memset(ecc256_private_key_d1, 0, sizeof(ecc256_private_key_d1));
+  // If masking is activated, generate random share d1.
+  if (uj_data_masks.en_masks) {
+    for (size_t j = 0; j < kEcc256NumWords; j++) {
+      ecc256_private_key_d1[j] = prng_rand_uint32();
+    }
+  }
+
+  // Set of share k1 for masking.
+  uint32_t ecc256_secret_k1[kEcc256NumWords];
+  memset(ecc256_secret_k1, 0, sizeof(ecc256_secret_k1));
+  // If masking is activated, generate random share d1.
+  if (uj_data_masks.en_masks) {
+    for (size_t j = 0; j < kEcc256NumWords; j++) {
+      ecc256_secret_k1[j] = prng_rand_uint32();
+    }
+  }
+
+  // Combine D0 and D1 into the private key.
+  uint32_t ecc256_private_key_d[2 * kEcc256NumWords];
+  memset(ecc256_private_key_d, 0, sizeof(ecc256_private_key_d));
+  memcpy(ecc256_private_key_d, uj_data.d0, sizeof(uj_data.d0));
+  memcpy(ecc256_private_key_d + kEcc256NumWords, ecc256_private_key_d1,
+         sizeof(ecc256_private_key_d1));
+
+  // Combine K0 and K1 into the secret key.
+  uint32_t ecc256_secret_k[2 * kEcc256NumWords];
+  memset(ecc256_secret_k, 0, sizeof(ecc256_secret_k));
+  memcpy(ecc256_secret_k, uj_data.k0, sizeof(uj_data.k0));
+  memcpy(ecc256_secret_k + kEcc256NumWords, ecc256_secret_k1,
+         sizeof(ecc256_secret_k1));
+
+  otbn_load_app(kOtbnAppP256Ecdsa);
+
+  // Signature output.
+  uint32_t ecc256_signature_r[kEcc256NumWords];
+  uint32_t ecc256_signature_s[kEcc256NumWords];
+
+  // Start the operation.
+  p256_ecdsa_sign(uj_data.msg, ecc256_private_key_d, ecc256_signature_r,
+                  ecc256_signature_s, ecc256_secret_k);
+
+  // Send back signature to host.
+  penetrationtest_otbn_sca_ecdsa_p256_signature_t uj_output;
+  memcpy(uj_output.r, ecc256_signature_r, sizeof(ecc256_signature_r));
+  memcpy(uj_output.s, ecc256_signature_s, sizeof(ecc256_signature_s));
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_ecdsa_p256_signature_t, uj,
+          &uj_output);
+
+  // Clear OTBN memory
+  TRY(clear_otbn());
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecdsa_p256_sign_batch(ujson_t *uj) {
+  // Get number of traces.
+  penetrationtest_otbn_sca_num_traces_t uj_data_num_traces;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_num_traces_t(
+      uj, &uj_data_num_traces));
+
+  if (uj_data_num_traces.num_traces > kNumBatchOpsMax) {
+    return OUT_OF_RANGE();
+  }
+
+  // Get masks off or on.
+  penetrationtest_otbn_sca_en_masks_t uj_data_masks;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_en_masks_t(uj,
+                                                            &uj_data_masks));
+
+  // Create random message, k, and d.
+  uint32_t ecc256_message_batch[kNumBatchOpsMax][kEcc256NumWords];
+
+  uint32_t ecc256_private_key_d0_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_private_key_d1_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_private_key_d_batch[kNumBatchOpsMax][2 * kEcc256NumWords];
+
+  uint32_t ecc256_secret_key_k0_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_secret_key_k1_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_secret_key_k_batch[kNumBatchOpsMax][2 * kEcc256NumWords];
+
+  // Generate the FvsR data set.
+  for (size_t i = 0; i < uj_data_num_traces.num_traces; ++i) {
+    // Generate random message.
+    gen_fvsr_data(ecc256_message_batch[i], false, NULL, kEcc256NumWords);
+
+    // Set random private key d0.
+    gen_fvsr_data(ecc256_private_key_d0_batch[i], false, NULL, kEcc256NumWords);
+
+    // When masks are on, set random private key d1. If masks are off, set to 0.
+    gen_mask_data(ecc256_private_key_d1_batch[i], uj_data_masks.en_masks,
+                  kEcc256NumWords);
+
+    // Combine both shares d0 and d1 to d.
+    memcpy(ecc256_private_key_d_batch[i], ecc256_private_key_d0_batch[i],
+           sizeof(ecc256_private_key_d0_batch[i]));
+    memcpy(ecc256_private_key_d_batch[i] + kEcc256NumWords,
+           ecc256_private_key_d1_batch[i],
+           sizeof(ecc256_private_key_d1_batch[i]));
+
+    // Set random secret key k0.
+    gen_fvsr_data(ecc256_secret_key_k0_batch[i], false, NULL, kEcc256NumWords);
+
+    // When masks are on, set random secret key k1. If masks are off, set to 0.
+    gen_mask_data(ecc256_secret_key_k1_batch[i], uj_data_masks.en_masks,
+                  kEcc256NumWords);
+
+    // Combine both shares k0 and k1 to k.
+    memcpy(ecc256_secret_key_k_batch[i], ecc256_secret_key_k0_batch[i],
+           sizeof(ecc256_secret_key_k0_batch[i]));
+    memcpy(ecc256_secret_key_k_batch[i] + kEcc256NumWords,
+           ecc256_secret_key_k1_batch[i],
+           sizeof(ecc256_secret_key_k1_batch[i]));
+  }
+
+  // Last signature output.
+  uint32_t ecc256_signature_r[kEcc256NumWords];
+  uint32_t ecc256_signature_s[kEcc256NumWords];
+  // Run num_traces ECDSA operations.
+  for (size_t i = 0; i < uj_data_num_traces.num_traces; ++i) {
+    otbn_load_app(kOtbnAppP256Ecdsa);
+
+    // Start the operation.
+    p256_ecdsa_sign(ecc256_message_batch[i], ecc256_private_key_d_batch[i],
+                    ecc256_signature_r, ecc256_signature_s,
+                    ecc256_secret_key_k_batch[i]);
+  }
+
+  // Send back the last signature to host.
+  penetrationtest_otbn_sca_ecdsa_p256_signature_t uj_output;
+  memcpy(uj_output.r, ecc256_signature_r, sizeof(ecc256_signature_r));
+  memcpy(uj_output.s, ecc256_signature_s, sizeof(ecc256_signature_s));
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_ecdsa_p256_signature_t, uj,
+          &uj_output);
+
+  // Clear OTBN memory
+  TRY(clear_otbn());
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_ecdsa_p256_sign_fvsr_batch(ujson_t *uj) {
+  // Get number of traces.
+  penetrationtest_otbn_sca_num_traces_t uj_data_num_traces;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_num_traces_t(
+      uj, &uj_data_num_traces));
+
+  if (uj_data_num_traces.num_traces > kNumBatchOpsMax) {
+    return OUT_OF_RANGE();
+  }
+
+  // Get masks off or on.
+  penetrationtest_otbn_sca_en_masks_t uj_data_masks;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_en_masks_t(uj,
+                                                            &uj_data_masks));
+
+  // Get fixed message and key.
+  penetrationtest_otbn_sca_ecdsa_p256_sign_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_ecdsa_p256_sign_t(uj,
+                                                                   &uj_data));
+
+  uint32_t ecc256_message_batch[kNumBatchOpsMax][kEcc256NumWords];
+
+  uint32_t ecc256_private_key_d0_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_private_key_d1_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_private_key_d_batch[kNumBatchOpsMax][2 * kEcc256NumWords];
+
+  uint32_t ecc256_secret_key_k0_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_secret_key_k1_batch[kNumBatchOpsMax][kEcc256NumWords];
+  uint32_t ecc256_secret_key_k_batch[kNumBatchOpsMax][2 * kEcc256NumWords];
+
+  // Generate the FvsR data set. For each trace, message, k, and d is either set
+  // to fixed received from the host over uJSON or random.
+  bool run_fixed = true;
+  for (size_t i = 0; i < uj_data_num_traces.num_traces; ++i) {
+    // Set message.
+    gen_fvsr_data(ecc256_message_batch[i], run_fixed, uj_data.msg,
+                  kEcc256NumWords);
+
+    // If the run is fixed, take the private key received over uJSON. Else,
+    // generate a random private key.
+    gen_fvsr_data(ecc256_private_key_d0_batch[i], run_fixed, uj_data.d0,
+                  kEcc256NumWords);
+
+    // When masks are on, set fixed or random private key d1. If masks are off,
+    // set to 0.
+    gen_mask_data(ecc256_private_key_d1_batch[i], uj_data_masks.en_masks,
+                  kEcc256NumWords);
+
+    // Combine both shares
+    memcpy(ecc256_private_key_d_batch[i], ecc256_private_key_d0_batch[i],
+           sizeof(ecc256_private_key_d0_batch[i]));
+    memcpy(ecc256_private_key_d_batch[i] + kEcc256NumWords,
+           ecc256_private_key_d1_batch[i],
+           sizeof(ecc256_private_key_d1_batch[i]));
+
+    // Set random secret key k0.
+    // If the run is fixed, take the private key received over uJSON. Else,
+    // generate a random private key.
+    gen_fvsr_data(ecc256_secret_key_k0_batch[i], run_fixed, uj_data.k0,
+                  kEcc256NumWords);
+
+    // When masks are on, set random secret key k1. If masks are off, set to 0.
+    gen_mask_data(ecc256_secret_key_k1_batch[i], uj_data_masks.en_masks,
+                  kEcc256NumWords);
+
+    // Combine both shares k0 and k1 to k.
+    memcpy(ecc256_secret_key_k_batch[i], ecc256_secret_key_k0_batch[i],
+           sizeof(ecc256_secret_key_k0_batch[i]));
+    memcpy(ecc256_secret_key_k_batch[i] + kEcc256NumWords,
+           ecc256_secret_key_k1_batch[i],
+           sizeof(ecc256_secret_key_k1_batch[i]));
+
+    run_fixed = prng_rand_uint32() & 0x1;
+  }
+
+  // Last signature output.
+  uint32_t ecc256_signature_r[kEcc256NumWords];
+  uint32_t ecc256_signature_s[kEcc256NumWords];
+  // Run num_traces ECDSA operations.
+  for (size_t i = 0; i < uj_data_num_traces.num_traces; ++i) {
+    otbn_load_app(kOtbnAppP256Ecdsa);
+
+    // Start the operation.
+    p256_ecdsa_sign(uj_data.msg, ecc256_private_key_d_batch[i],
+                    ecc256_signature_r, ecc256_signature_s,
+                    ecc256_secret_key_k_batch[i]);
+  }
+
+  // Send back the last signature to host.
+  penetrationtest_otbn_sca_ecdsa_p256_signature_t uj_output;
+  memcpy(uj_output.r, ecc256_signature_r, sizeof(ecc256_signature_r));
+  memcpy(uj_output.s, ecc256_signature_s, sizeof(ecc256_signature_s));
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_ecdsa_p256_signature_t, uj,
+          &uj_output);
+
+  // Clear OTBN memory
+  TRY(clear_otbn());
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_pentest_init(ujson_t *uj) {
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  // Configure the entropy complex for OTBN. Set the reseed interval to max
+  // to avoid a non-constant trigger window.
+  TRY(pentest_configure_entropy_source_max_reseed_interval());
+
+  // Init the OTBN core.
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+
+  // Load p256 keygen from seed app into OTBN.
+  if (otbn_load_app(kOtbnAppP256KeyFromSeed).value != OTCRYPTO_OK.value) {
+    return ABORTED();
+  }
+
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  pentest_init(kPentestTriggerSourceOtbn,
+               kPentestPeripheralEntropy | kPentestPeripheralIoDiv4 |
+                   kPentestPeripheralOtbn | kPentestPeripheralCsrng |
+                   kPentestPeripheralEdn,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_pentest_init_keymgr(ujson_t *uj) {
+  if (kBootStage != kBootStageOwner) {
+    TRY(keymgr_testutils_startup(&keymgr, &kmac));
+    // Advance to OwnerIntermediateKey state.
+    TRY(keymgr_testutils_advance_state(&keymgr, &kOwnerIntParams));
+    TRY(keymgr_testutils_check_state(&keymgr,
+                                     kDifKeymgrStateOwnerIntermediateKey));
+    LOG_INFO("Keymgr entered OwnerIntKey State");
+  } else {
+    TRY(dif_keymgr_init(mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR),
+                        &keymgr));
+    TRY(keymgr_testutils_check_state(&keymgr, kDifKeymgrStateOwnerRootKey));
+  }
+
+  dif_otbn_t otbn;
+  TRY(dif_otbn_init(mmio_region_from_addr(TOP_EARLGREY_OTBN_BASE_ADDR), &otbn));
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_insn_carry_flag(ujson_t *uj) {
+  // Get big number (256 bit).
+  penetrationtest_otbn_sca_big_num_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_big_num_t(uj, &uj_data));
+
+  // INSN Carry Flag OTBN App.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_insn_carry_flag);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_carry_flag, big_num);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_carry_flag, big_num_out);
+
+  static const otbn_app_t kOtbnAppInsnCarryFlag =
+      OTBN_APP_T_INIT(otbn_insn_carry_flag);
+  static const otbn_addr_t kOtbnVarInsnCarryFlagBigNum =
+      OTBN_ADDR_T_INIT(otbn_insn_carry_flag, big_num);
+  static const otbn_addr_t kOtbnVarInsnCarryFlagBigNumOut =
+      OTBN_ADDR_T_INIT(otbn_insn_carry_flag, big_num_out);
+
+  // Load app and write received big_num into DMEM.
+  otbn_load_app(kOtbnAppInsnCarryFlag);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarInsnCarryFlagBigNum, uj_data.big_num,
+                          sizeof(uj_data.big_num)));
+
+  pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  penetrationtest_otbn_sca_big_num_t uj_output;
+  memset(uj_output.big_num, 0, sizeof(uj_output.big_num));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCarryFlagBigNumOut,
+                         uj_output.big_num, sizeof(uj_output.big_num)));
+
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_big_num_t, uj, &uj_output);
+
+  return OK_STATUS();
+}
+
+status_t trigger_otbn_sca_combi_operations(
+    uint32_t value1, uint32_t value2, uint32_t result1[8], uint32_t result2[8],
+    uint32_t result3[8], uint32_t result4[8], uint32_t result5[8],
+    uint32_t result6[8], uint32_t result7[8], uint32_t *result8,
+    uint32_t trigger) {
+  // INSN Combi Ops OTBN App.
+  OTBN_DECLARE_APP_SYMBOLS(otbn_insn_combi_ops);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, big_input_1);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, big_input_2);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_1);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_2);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_3);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_4);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_5);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_6);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_7);
+  OTBN_DECLARE_SYMBOL_ADDR(otbn_insn_combi_ops, result_8);
+
+  static const otbn_app_t kOtbnAppInsnCombiOps =
+      OTBN_APP_T_INIT(otbn_insn_combi_ops);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsValue1 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, big_input_1);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsValue2 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, big_input_2);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult1 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_1);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult2 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_2);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult3 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_3);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult4 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_4);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult5 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_5);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult6 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_6);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult7 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_7);
+  static const otbn_addr_t kOtbnVarInsnCombiOpsResult8 =
+      OTBN_ADDR_T_INIT(otbn_insn_combi_ops, result_8);
+
+  // Load app and write received big_num into DMEM.
+  otbn_load_app(kOtbnAppInsnCombiOps);
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarInsnCombiOpsValue1, &value1,
+                          sizeof(value1)));
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarInsnCombiOpsValue2, &value2,
+                          sizeof(value2)));
+
+  if (trigger & 0x1)
+    pentest_set_trigger_high();
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  if (trigger & 0x1)
+    pentest_set_trigger_low();
+
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult1, &result1[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult2, &result2[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult3, &result3[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult4, &result4[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult5, &result5[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult6, &result6[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult7, &result7[0],
+                         BYTES_IN_WDR));
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarInsnCombiOpsResult8, &result8[0],
+                         sizeof(*result8)));
+
+  if (trigger & 0x2)
+    pentest_set_trigger_high();
+  otbn_dmem_sec_wipe();
+  if (trigger & 0x2)
+    pentest_set_trigger_low();
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_combi_operations_batch(ujson_t *uj) {
+  // Get number of iterations and fixed data.
+  otbn_sca_test_batch_ops_t uj_data;
+  TRY(ujson_deserialize_otbn_sca_test_batch_ops_t(uj, &uj_data));
+  TRY_CHECK(uj_data.num_iterations < MAX_BATCH_SIZE);
+
+  otbn_sca_ops_result_t uj_output;
+
+  // SCA code target.
+  for (size_t it = 0; it < uj_data.num_iterations; it++) {
+    // Clear the results buffer.
+    memset(uj_output.result1, 0, sizeof(uj_output.result1));
+    memset(uj_output.result2, 0, sizeof(uj_output.result2));
+    memset(uj_output.result3, 0, sizeof(uj_output.result3));
+    memset(uj_output.result4, 0, sizeof(uj_output.result4));
+    memset(uj_output.result5, 0, sizeof(uj_output.result5));
+    memset(uj_output.result6, 0, sizeof(uj_output.result6));
+    memset(uj_output.result7, 0, sizeof(uj_output.result7));
+    uj_output.result8 = 0;
+    // Call the target code sequence.
+    TRY(trigger_otbn_sca_combi_operations(
+        uj_data.fixed_data1, uj_data.fixed_data2, uj_output.result1,
+        uj_output.result2, uj_output.result3, uj_output.result4,
+        uj_output.result5, uj_output.result6, uj_output.result7,
+        &uj_output.result8, uj_data.trigger));
+  }
+
+  // Write back last values to validate generated data if asked for.
+  if (uj_data.print_flag) {
+    RESP_OK(ujson_serialize_otbn_sca_ops_result_t, uj, &uj_output);
+  } else {
+    otbn_sca_empty_t uj_empty;
+    uj_empty.success = true;
+    RESP_OK(ujson_serialize_otbn_sca_empty_t, uj, &uj_empty);
+  }
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_key_sideload_fvsr(ujson_t *uj) {
+  // Get fixed seed.
+  penetrationtest_otbn_sca_fixed_seed_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_fixed_seed_t(uj, &uj_data));
+
+  // Key generation parameters.
+  dif_keymgr_versioned_key_params_t sideload_params[kKeySideloadNumIt];
+
+  // Generate FvsR values.
+  bool sample_fixed = true;
+  for (size_t it = 0; it < kKeySideloadNumIt; it++) {
+    sideload_params[it].version = 0x0;
+    sideload_params[it].dest = kDifKeymgrVersionedKeyDestOtbn;
+    memset(sideload_params[it].salt, 0, sizeof(sideload_params[it].salt));
+    if (sample_fixed) {
+      sideload_params[it].salt[0] = uj_data.fixed_seed;
+    } else {
+      sideload_params[it].salt[0] = prng_rand_uint32();
+    }
+    sample_fixed = prng_rand_uint32() & 0x1;
+  }
+
+  otbn_load_app(kOtbnAppKeySideloadSca);
+
+  uint32_t key_share_0_l[kKeySideloadNumIt], key_share_0_h[kKeySideloadNumIt];
+  uint32_t key_share_1_l[16], key_share_1_h[kKeySideloadNumIt];
+  uint32_t key_l[kKeySideloadNumIt], key_h[kKeySideloadNumIt];
+
+  // SCA code target.
+  for (size_t it = 0; it < kKeySideloadNumIt; it++) {
+    TRY(keymgr_testutils_generate_versioned_key(&keymgr, sideload_params[it]));
+
+    TRY(dif_otbn_set_ctrl_software_errs_fatal(&otbn, /*enable=*/false));
+
+    pentest_set_trigger_high();
+    // Give the trigger time to rise.
+    asm volatile(NOP30);
+    otbn_execute();
+    otbn_busy_wait_for_done();
+    pentest_set_trigger_low();
+    asm volatile(NOP30);
+
+    otbn_dmem_read(1, kOtbnAppKeySideloadks0l, &key_share_0_l[it]);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks0h, &key_share_0_h[it]);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks1l, &key_share_1_l[it]);
+    otbn_dmem_read(1, kOtbnAppKeySideloadks1h, &key_share_1_h[it]);
+    otbn_dmem_read(1, kOtbnAppKeySideloadkl, &key_l[it]);
+    otbn_dmem_read(1, kOtbnAppKeySideloadkh, &key_h[it]);
+  }
+
+  // Write back shares and keys to host.
+  penetrationtest_otbn_sca_key_t uj_output;
+  for (size_t it = 0; it < kKeySideloadNumIt; it++) {
+    uj_output.shares[0] = key_share_0_l[it];
+    uj_output.shares[1] = key_share_0_h[it];
+    uj_output.shares[2] = key_share_1_l[it];
+    uj_output.shares[3] = key_share_1_h[it];
+    uj_output.keys[0] = key_l[it];
+    uj_output.keys[1] = key_h[it];
+    RESP_OK(ujson_serialize_penetrationtest_otbn_sca_key_t, uj, &uj_output);
+  }
+
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca_rsa512_decrypt(ujson_t *uj) {
+  // Get RSA256 parameters.
+  penetrationtest_otbn_sca_rsa512_dec_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_otbn_sca_rsa512_dec_t(uj, &uj_data));
+  otbn_load_app(kOtbnAppRsa);
+
+  const uint8_t zero[64] = {0};
+
+  // Write data into OTBN DMEM.
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarRsaMode, &kMode512Modexp,
+                          sizeof(uint32_t)));
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarRsaModulus, uj_data.modu,
+                          sizeof(uj_data.modu)));
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarRsaD0, uj_data.exp,
+                          sizeof(uj_data.exp)));
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarRsaD1, zero, sizeof(uj_data.exp)));
+  TRY(dif_otbn_dmem_write(&otbn, kOtbnVarRsaInOut, uj_data.msg,
+                          sizeof(uj_data.msg)));
+
+  pentest_set_trigger_high();
+  // Give the trigger time to rise.
+  asm volatile(NOP30);
+  otbn_execute();
+  otbn_busy_wait_for_done();
+  pentest_set_trigger_low();
+
+  // Send back decryption result to host.
+  penetrationtest_otbn_sca_rsa512_dec_out_t uj_output;
+  TRY(dif_otbn_dmem_read(&otbn, kOtbnVarRsaInOut, uj_output.out,
+                         sizeof(uj_output.out)));
+  RESP_OK(ujson_serialize_penetrationtest_otbn_sca_rsa512_dec_out_t, uj,
+          &uj_output);
+  return OK_STATUS();
+}
+
+status_t handle_otbn_sca(ujson_t *uj) {
+  otbn_sca_subcommand_t cmd;
+  TRY(ujson_deserialize_otbn_sca_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kOtbnScaSubcommandEcc256EcdsaKeygenFvsrKeyBatch:
+      return handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_key_batch(uj);
+    case kOtbnScaSubcommandEcc256EcdsaKeygenFvsrSeedBatch:
+      return handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_seed_batch(uj);
+    case kOtbnScaSubcommandEcc256EnMasks:
+      return handle_otbn_sca_ecc256_en_masks(uj);
+    case kOtbnScaSubcommandEcc256SetC:
+      return handle_otbn_sca_ecc256_set_c(uj);
+    case kOtbnScaSubcommandEcc256SetSeed:
+      return handle_otbn_sca_ecc256_set_seed(uj);
+    case kOtbnScaSubcommandEcdsaP256Sign:
+      return handle_otbn_sca_ecdsa_p256_sign(uj);
+    case kOtbnScaSubcommandEcdsaP256SignBatch:
+      return handle_otbn_sca_ecdsa_p256_sign_batch(uj);
+    case kOtbnScaSubcommandEcdsaP256SignFvsrBatch:
+      return handle_otbn_sca_ecdsa_p256_sign_fvsr_batch(uj);
+    case kOtbnScaSubcommandInit:
+      return handle_otbn_pentest_init(uj);
+    case kOtbnScaSubcommandInitKeyMgr:
+      return handle_otbn_pentest_init_keymgr(uj);
+    case kOtbnScaSubcommandInsnCarryFlag:
+      return handle_otbn_sca_insn_carry_flag(uj);
+    case kOtbnScaSubcommandCombiOps:
+      return handle_otbn_sca_combi_operations_batch(uj);
+    case kOtbnScaSubcommandKeySideloadFvsr:
+      return handle_otbn_sca_key_sideload_fvsr(uj);
+    case kOtbnScaSubcommandRsa512Decrypt:
+      return handle_otbn_sca_rsa512_decrypt(uj);
+    default:
+      LOG_ERROR("Unrecognized OTBN SCA subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.h b/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.h
new file mode 100644
index 0000000000000..5e904734143a6
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/otbn_sca.h
@@ -0,0 +1,188 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_OTBN_SCA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_OTBN_SCA_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+/**
+ * Starts the P-256 ECDSA Key Generation from a key in batch mode.
+ *
+ * Num_traces fixed vs random keys are generated using the SCA PRNG and
+ * for each key the key generation operation on OTBN is started.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_key_batch(ujson_t *uj);
+
+/**
+ * Starts the P-256 ECDSA Key Generation from a seed in batch mode.
+ *
+ * Num_traces fixed vs random seeds are generated using the SCA PRNG and
+ * for each seed the key generation operation on OTBN is started.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecc256_ecdsa_keygen_fvsr_seed_batch(ujson_t *uj);
+
+/**
+ * Enable or disable masking.
+ *
+ * This command handler allows to enable or disable the masking. When masking is
+ * turned on, a random 320-bit mask is generated for  the seed share 1. The mask
+ * is 0 when masking is turned off.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecc256_en_masks(ujson_t *uj);
+
+/**
+ * Set the constant C.
+ *
+ * This command handler allows the host to set the constant C to generate the
+ * random key.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecc256_set_c(ujson_t *uj);
+
+/**
+ * Set the seed share 0.
+ *
+ * Allows the host to set the 320-bit seed share 0 that is used for the key
+ * generation.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecc256_set_seed(ujson_t *uj);
+
+/**
+ * otbn.sca.ecdsa256.sign command handler.
+ *
+ * Runs a ECDSA 256 sign operation, used to measure whether the operation
+ * leakes secret information.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecdsa_p256_sign(ujson_t *uj);
+
+/**
+ * otbn.sca.ecdsa256.sign_batch command handler.
+ *
+ * Same as otbn.sca.ecdsa256.sign but in batch mode. Random message, random
+ * key, and random secret is used.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecdsa_p256_sign_batch(ujson_t *uj);
+
+/**
+ * otbn.sca.ecdsa256.sign_fvsr_batch command handler.
+ *
+ * Same as otbn.sca.ecdsa256.sign but in batch mode. Fixed or random message,
+ * fixed or random key, and fixed or random secret is used.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_ecdsa_p256_sign_fvsr_batch(ujson_t *uj);
+
+/**
+ * Initializes the OTBN SCA test on the device.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_pentest_init(ujson_t *uj);
+
+/**
+ * Initializes the Keymanager used for the OTBN SCA tests.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_pentest_init_keymgr(ujson_t *uj);
+
+/**
+ * otbn.sca.insn.carry_flag command handler.
+ *
+ * Receive big_num from host. On OTBN, add big_num + big_num and get the
+ * carry flag. If the carry flag is not set, return the result. If the carry
+ * flag is set, return random number. Checks whether carry flag is leaking.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_insn_carry_flag(ujson_t *uj);
+
+/**
+ * Command handler for the otbn.sca.key_sideload_fvsr test.
+ *
+ * Side-load 16 fixed vs. random keys from keymanager to OTBN.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_key_sideload_fvsr(ujson_t *uj);
+
+/**
+ * Command handler for the otbn.sca.rsa512_decrypt test.
+ *
+ * RSA512 decryption side-channel test. Get mod, exp, and msg from uJSON.
+ * Perform RSA512 decryption and send back the message.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_rsa512_decrypt(ujson_t *uj);
+
+/**
+ * Command handler for the otbn.sca.combi_ops test.
+ *
+ * Loads two fixed values to the OTBN and performs several operations.
+ * Each operation also has an output that the test sends back.
+ * Each 32-bit fixed value is copied eight times to fill a 256-bit register.
+ *
+ * The results are those of
+ * - the loading of the first input
+ * - the bn.mov instruction of the first input
+ * - the addition between the first and second input
+ * - the subtraction between the first and second input
+ * - the xor between the first and second input
+ * - the left shift by one of the first input
+ * - the multiplication (using bn.mulqacc) between the first 64-bits of each
+ * input
+ * - the comparison of the two inputs (8 means the comparison was succesful and
+ * 4 means it was not) The above is done under a trigger signal.
+ *
+ * A second trigger window can be chosen which is over the wiping of the OTBN.
+ *
+ * The print_flag can be set to false to print a small success value instead of
+ * the full response.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca_combi_operations_batch(ujson_t *uj);
+
+/**
+ * OTBN SCA command handler.
+ *
+ * Command handler for the OTBN SCA command.
+ *
+ * @param uj An initialized uJSON context.
+ * @return OK or error.
+ */
+status_t handle_otbn_sca(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_OTBN_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/prng_sca.c b/sw/device/tests/penetrationtests/firmware/sca/prng_sca.c
deleted file mode 100644
index cef93c76585cd..0000000000000
--- a/sw/device/tests/penetrationtests/firmware/sca/prng_sca.c
+++ /dev/null
@@ -1,57 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/tests/penetrationtests/firmware/sca/prng_sca.h"
-
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/lib/base/status.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
-#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
-#include "sw/device/lib/ujson/ujson.h"
-#include "sw/device/sca/lib/prng.h"
-#include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
-
-/**
- * Seed PRNG command handler.
- *
- * Seed the SCA internal PRNG. Only 4-byte seeds are supported.
- * The uJSON data contains:
- *  - seed: A buffer holding the seed.
- *  - seed_len: Seed length.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_prng_sca_seed_prng(ujson_t *uj) {
-  cryptotest_prng_sca_lfsr_t uj_data;
-  TRY(ujson_deserialize_cryptotest_prng_sca_lfsr_t(uj, &uj_data));
-
-  if (uj_data.seed_length != sizeof(uint32_t)) {
-    return OUT_OF_RANGE();
-  }
-  prng_seed(read_32(uj_data.seed));
-
-  return OK_STATUS(0);
-}
-
-/**
- * PRNG SCA command handler.
- *
- * Command hanlder for the PRNG SCA command.
- *
- * @param uj The received uJSON data.
- */
-status_t handle_prng_sca(ujson_t *uj) {
-  prng_sca_subcommand_t cmd;
-  TRY(ujson_deserialize_prng_sca_subcommand_t(uj, &cmd));
-  switch (cmd) {
-    case kPrngScaSubcommandSeedPrng:
-      return handle_prng_sca_seed_prng(uj);
-      break;
-    default:
-      LOG_ERROR("Unrecognized PRNG SCA subcommand: %d", cmd);
-      return INVALID_ARGUMENT();
-  }
-  return OK_STATUS(0);
-}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/prng_sca.h b/sw/device/tests/penetrationtests/firmware/sca/prng_sca.h
deleted file mode 100644
index e3a2e0517fa0e..0000000000000
--- a/sw/device/tests/penetrationtests/firmware/sca/prng_sca.h
+++ /dev/null
@@ -1,14 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_PRNG_SCA_H_
-#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_PRNG_SCA_H_
-
-#include "sw/device/lib/base/status.h"
-#include "sw/device/lib/ujson/ujson.h"
-
-status_t handle_prng_sca_seed_prng(ujson_t *uj);
-status_t handle_prng_sca(ujson_t *uj);
-
-#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_PRNG_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/rng_sca.c b/sw/device/tests/penetrationtests/firmware/sca/rng_sca.c
new file mode 100644
index 0000000000000..a5a8b0df8ad2e
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/rng_sca.c
@@ -0,0 +1,55 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/tests/penetrationtests/firmware/sca/rng_sca.h"
+
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/ujson/ujson.h"
+#include "sw/device/sca/lib/prng.h"
+#include "sw/device/tests/penetrationtests/json/prng_sca_commands.h"
+
+/**
+ * Seed PRNG command handler.
+ *
+ * Seed the SCA internal PRNG. Only 4-byte seeds are supported.
+ * The uJSON data contains:
+ *  - seed: A buffer holding the seed.
+ *  - seed_len: Seed length.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_prng_sca_seed_prng(ujson_t *uj) {
+  cryptotest_prng_sca_lfsr_t uj_data;
+  TRY(ujson_deserialize_cryptotest_prng_sca_lfsr_t(uj, &uj_data));
+
+  if (uj_data.seed_length != sizeof(uint32_t)) {
+    return OUT_OF_RANGE();
+  }
+  prng_seed(read_32(uj_data.seed));
+
+  return OK_STATUS();
+}
+
+/**
+ * PRNG SCA command handler.
+ *
+ * Command hanlder for the PRNG SCA command.
+ *
+ * @param uj The received uJSON data.
+ */
+status_t handle_prng_sca(ujson_t *uj) {
+  prng_sca_subcommand_t cmd;
+  TRY(ujson_deserialize_prng_sca_subcommand_t(uj, &cmd));
+  switch (cmd) {
+    case kPrngScaSubcommandSeedPrng:
+      return handle_prng_sca_seed_prng(uj);
+      break;
+    default:
+      LOG_ERROR("Unrecognized PRNG SCA subcommand: %d", cmd);
+      return INVALID_ARGUMENT();
+  }
+  return OK_STATUS();
+}
diff --git a/sw/device/tests/penetrationtests/firmware/sca/rng_sca.h b/sw/device/tests/penetrationtests/firmware/sca/rng_sca.h
new file mode 100644
index 0000000000000..02571f0f9e9b5
--- /dev/null
+++ b/sw/device/tests/penetrationtests/firmware/sca/rng_sca.h
@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_RNG_SCA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_RNG_SCA_H_
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+status_t handle_prng_sca_seed_prng(ujson_t *uj);
+status_t handle_prng_sca(ujson_t *uj);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_RNG_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.c b/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.c
index b0f0e7ab22430..e144a46ab44c6 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.c
@@ -12,8 +12,8 @@
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
 #include "sw/device/sca/lib/prng.h"
-#include "sw/device/sca/lib/sca.h"
-#include "sw/device/tests/penetrationtests/firmware/lib/sca_lib.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
+#include "sw/device/tests/penetrationtests/json/commands.h"
 #include "sw/device/tests/penetrationtests/json/sha3_sca_commands.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -383,7 +383,7 @@ status_t handle_sha3_sca_disable_masking(ujson_t *uj) {
   uj_status.status = 0;
   RESP_OK(ujson_serialize_cryptotest_sha3_sca_status_t, uj, &uj_status);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -416,11 +416,13 @@ sha3_sca_error_t sha3_serial_absorb(const uint8_t *msg, size_t msg_len) {
     // configured to start operation 320 cycles after receiving the START and
     // PROC commands. This allows Ibex to go to sleep in order to not disturb
     // the capture.
-    sca_call_and_sleep(kmac_start_process_cmd, kIbexSha3SleepCycles, true);
+    pentest_call_and_sleep(kmac_start_process_cmd, kIbexSha3SleepCycles, true,
+                           false);
   } else {
     // On the chip, issue a PROCESS command to start operation and put Ibex
     // into sleep.
-    sca_call_and_sleep(kmac_process_cmd, kIbexLoadHashMessageSleepCycles, true);
+    pentest_call_and_sleep(kmac_process_cmd, kIbexLoadHashMessageSleepCycles,
+                           true, false);
   }
 
   return sha3ScaOk;
@@ -465,7 +467,7 @@ status_t handle_sha3_sca_single_absorb(ujson_t *uj) {
   // another absorb.
   kmac_reset();
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -489,7 +491,7 @@ status_t handle_sha3_sca_fixed_message_set(ujson_t *uj) {
 
   memcpy(message_fixed, uj_msg.msg, uj_msg.msg_length);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -503,20 +505,18 @@ status_t handle_sha3_sca_fixed_message_set(ujson_t *uj) {
  * @param uj The received uJSON data.
  */
 status_t handle_sha3_sca_batch(ujson_t *uj) {
-  cryptotest_sha3_sca_data_t uj_data;
-  TRY(ujson_deserialize_cryptotest_sha3_sca_data_t(uj, &uj_data));
+  penetrationtest_num_enc_t uj_data;
+  TRY(ujson_deserialize_penetrationtest_num_enc_t(uj, &uj_data));
 
-  uint32_t num_hashes = 0;
   uint32_t out[kDigestLength];
   uint32_t batch_digest[kDigestLength];
   uint8_t dummy_message[kMessageLength];
-  num_hashes = read_32(uj_data.data);
 
   for (uint32_t j = 0; j < kDigestLength; ++j) {
     batch_digest[j] = 0;
   }
 
-  for (uint32_t i = 0; i < num_hashes; ++i) {
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
     if (run_fixed) {
       memcpy(sha3_batch_messages[i], message_fixed, kMessageLength);
     } else {
@@ -526,7 +526,7 @@ status_t handle_sha3_sca_batch(ujson_t *uj) {
     run_fixed = dummy_message[0] & 0x1;
   }
 
-  for (uint32_t i = 0; i < num_hashes; ++i) {
+  for (uint32_t i = 0; i < uj_data.num_enc; ++i) {
     kmac_reset();
 
     if (sha3_serial_absorb(sha3_batch_messages[i], kMessageLength) !=
@@ -556,7 +556,7 @@ status_t handle_sha3_sca_batch(ujson_t *uj) {
   memcpy(uj_output.batch_digest, (uint8_t *)batch_digest, kDigestLength * 4);
   RESP_OK(ujson_serialize_cryptotest_sha3_sca_batch_digest_t, uj, &uj_output);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -569,12 +569,12 @@ status_t handle_sha3_sca_batch(ujson_t *uj) {
  *
  * @param uj The received uJSON data.
  */
-status_t handle_sha3_sca_seed_lfsr(ujson_t *uj) {
+status_t handle_sha3_pentest_seed_lfsr(ujson_t *uj) {
   cryptotest_sha3_sca_lfsr_t uj_lfsr_data;
   TRY(ujson_deserialize_cryptotest_sha3_sca_lfsr_t(uj, &uj_lfsr_data));
-  sca_seed_lfsr(read_32(uj_lfsr_data.seed), kScaLfsrMasking);
+  pentest_seed_lfsr(read_32(uj_lfsr_data.seed), kPentestLfsrMasking);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 /**
@@ -585,7 +585,7 @@ status_t handle_sha3_sca_seed_lfsr(ujson_t *uj) {
  *
  * @param uj The received uJSON data.
  */
-status_t handle_sha3_sca_init(ujson_t *uj) {
+status_t handle_sha3_pentest_init(ujson_t *uj) {
   // Read mode. FPGA or discrete.
   cryptotest_sha3_sca_fpga_mode_t uj_data;
   TRY(ujson_deserialize_cryptotest_sha3_sca_fpga_mode_t(uj, &uj_data));
@@ -593,7 +593,15 @@ status_t handle_sha3_sca_init(ujson_t *uj) {
     fpga_mode = true;
   }
 
-  sca_init(kScaTriggerSourceKmac, kScaPeripheralIoDiv4 | kScaPeripheralKmac);
+  penetrationtest_cpuctrl_t uj_cpuctrl_data;
+  TRY(ujson_deserialize_penetrationtest_cpuctrl_t(uj, &uj_cpuctrl_data));
+  penetrationtest_sensor_config_t uj_sensor_data;
+  TRY(ujson_deserialize_penetrationtest_sensor_config_t(uj, &uj_sensor_data));
+
+  pentest_init(kPentestTriggerSourceKmac,
+               kPentestPeripheralIoDiv4 | kPentestPeripheralKmac,
+               uj_sensor_data.sensor_ctrl_enable,
+               uj_sensor_data.sensor_ctrl_en_fatal);
 
   TRY(dif_kmac_init(mmio_region_from_addr(TOP_EARLGREY_KMAC_BASE_ADDR), &kmac));
 
@@ -601,11 +609,29 @@ status_t handle_sha3_sca_init(ujson_t *uj) {
 
   kmac_block_until_idle();
 
-  // Disable the instruction cache and dummy instructions for better SCA
-  // measurements.
-  sca_configure_cpu();
-
-  return OK_STATUS(0);
+  // Configure the CPU for the pentest.
+  penetrationtest_device_info_t uj_output;
+  TRY(pentest_configure_cpu(
+      uj_cpuctrl_data.enable_icache, &uj_output.icache_en,
+      uj_cpuctrl_data.enable_dummy_instr, &uj_output.dummy_instr_en,
+      uj_cpuctrl_data.dummy_instr_count, uj_cpuctrl_data.enable_jittery_clock,
+      uj_cpuctrl_data.enable_sram_readback, &uj_output.clock_jitter_locked,
+      &uj_output.clock_jitter_en, &uj_output.sram_main_readback_locked,
+      &uj_output.sram_ret_readback_locked, &uj_output.sram_main_readback_en,
+      &uj_output.sram_ret_readback_en, uj_cpuctrl_data.enable_data_ind_timing,
+      &uj_output.data_ind_timing_en));
+
+  // Read rom digest.
+  TRY(pentest_read_rom_digest(uj_output.rom_digest));
+
+  // Read device ID and return to host.
+  TRY(pentest_read_device_id(uj_output.device_id));
+  RESP_OK(ujson_serialize_penetrationtest_device_info_t, uj, &uj_output);
+
+  // Read different SKU config fields and return to host.
+  TRY(pentest_send_sku_config(uj));
+
+  return OK_STATUS();
 }
 
 /**
@@ -620,7 +646,7 @@ status_t handle_sha3_sca(ujson_t *uj) {
   TRY(ujson_deserialize_sha3_sca_subcommand_t(uj, &cmd));
   switch (cmd) {
     case kSha3ScaSubcommandInit:
-      return handle_sha3_sca_init(uj);
+      return handle_sha3_pentest_init(uj);
     case kSha3ScaSubcommandSingleAbsorb:
       return handle_sha3_sca_single_absorb(uj);
     case kSha3ScaSubcommandBatch:
@@ -628,12 +654,12 @@ status_t handle_sha3_sca(ujson_t *uj) {
     case kSha3ScaSubcommandFixedMessageSet:
       return handle_sha3_sca_fixed_message_set(uj);
     case kSha3ScaSubcommandSeedLfsr:
-      return handle_sha3_sca_seed_lfsr(uj);
+      return handle_sha3_pentest_seed_lfsr(uj);
     case kSha3ScaSubcommandDisableMasking:
       return handle_sha3_sca_disable_masking(uj);
     default:
       LOG_ERROR("Unrecognized SHA SCA FI subcommand: %d", cmd);
       return INVALID_ARGUMENT();
   }
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
diff --git a/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.h b/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.h
index b02c20b6c2852..75cc0df5dc5bf 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.h
+++ b/sw/device/tests/penetrationtests/firmware/sca/sha3_sca.h
@@ -28,11 +28,11 @@ typedef enum sha3_sca_error {
 } sha3_sca_error_t;
 
 status_t handle_sha3_sca_disable_masking(ujson_t *uj);
-status_t handle_sha3_sca_seed_lfsr(ujson_t *uj);
+status_t handle_sha3_pentest_seed_lfsr(ujson_t *uj);
 status_t handle_sha3_sca_fixed_message_set(ujson_t *uj);
 status_t handle_sha3_sca_batch(ujson_t *uj);
 status_t handle_sha3_sca_single_absorb(ujson_t *uj);
-status_t handle_sha3_sca_init(ujson_t *uj);
+status_t handle_sha3_pentest_init(ujson_t *uj);
 status_t handle_sha3_sca(ujson_t *uj);
 
 #endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_FIRMWARE_SCA_SHA3_SCA_H_
diff --git a/sw/device/tests/penetrationtests/firmware/sca/trigger_sca.c b/sw/device/tests/penetrationtests/firmware/sca/trigger_sca.c
index a69e21a2677a8..66f24caa13d37 100644
--- a/sw/device/tests/penetrationtests/firmware/sca/trigger_sca.c
+++ b/sw/device/tests/penetrationtests/firmware/sca/trigger_sca.c
@@ -9,7 +9,7 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/test_framework/ujson_ottf.h"
 #include "sw/device/lib/ujson/ujson.h"
-#include "sw/device/sca/lib/sca.h"
+#include "sw/device/tests/penetrationtests/firmware/lib/pentest_lib.h"
 #include "sw/device/tests/penetrationtests/json/trigger_sca_commands.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -27,9 +27,9 @@ status_t handle_trigger_sca_select_source(ujson_t *uj) {
   cryptotest_trigger_sca_source_t uj_trigger;
   TRY(ujson_deserialize_cryptotest_trigger_sca_source_t(uj, &uj_trigger));
 
-  sca_select_trigger_type(uj_trigger.source);
+  pentest_select_trigger_type(uj_trigger.source);
 
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
 
 status_t handle_trigger_sca(ujson_t *uj) {
@@ -43,5 +43,5 @@ status_t handle_trigger_sca(ujson_t *uj) {
       LOG_ERROR("Unrecognized TRIGGER SCA subcommand: %d", cmd);
       return INVALID_ARGUMENT();
   }
-  return OK_STATUS(0);
+  return OK_STATUS();
 }
diff --git a/sw/device/tests/penetrationtests/json/BUILD b/sw/device/tests/penetrationtests/json/BUILD
index 895bbef76fa04..f3804f71bf717 100644
--- a/sw/device/tests/penetrationtests/json/BUILD
+++ b/sw/device/tests/penetrationtests/json/BUILD
@@ -10,11 +10,23 @@ cc_library(
     hdrs = ["commands.h"],
     deps = [
         ":aes_sca_commands",
+        ":alert_fi_commands",
+        ":crypto_fi_commands",
+        ":cryptolib_fi_asym_commands",
+        ":cryptolib_fi_sym_commands",
+        ":cryptolib_sca_asym_commands",
+        ":cryptolib_sca_sym_commands",
+        ":edn_sca_commands",
         ":extclk_sca_fi_commands",
+        ":hmac_sca_commands",
         ":ibex_fi_commands",
         ":kmac_sca_commands",
+        ":lc_ctrl_fi_commands",
         ":otbn_fi_commands",
+        ":otbn_sca_commands",
+        ":otp_fi_commands",
         ":prng_sca_commands",
+        ":rom_fi_commands",
         ":sha3_sca_commands",
         ":trigger_sca_commands",
         "//sw/device/lib/ujson",
@@ -28,6 +40,48 @@ cc_library(
     deps = ["//sw/device/lib/ujson"],
 )
 
+cc_library(
+    name = "crypto_fi_commands",
+    srcs = ["crypto_fi_commands.c"],
+    hdrs = ["crypto_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "cryptolib_fi_sym_commands",
+    srcs = ["cryptolib_fi_sym_commands.c"],
+    hdrs = ["cryptolib_fi_sym_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "cryptolib_fi_asym_commands",
+    srcs = ["cryptolib_fi_asym_commands.c"],
+    hdrs = ["cryptolib_fi_asym_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "cryptolib_sca_sym_commands",
+    srcs = ["cryptolib_sca_sym_commands.c"],
+    hdrs = ["cryptolib_sca_sym_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "cryptolib_sca_asym_commands",
+    srcs = ["cryptolib_sca_asym_commands.c"],
+    hdrs = ["cryptolib_sca_asym_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "edn_sca_commands",
+    srcs = ["edn_sca_commands.c"],
+    hdrs = ["edn_sca_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
 cc_library(
     name = "extclk_sca_fi_commands",
     srcs = ["extclk_sca_fi_commands.c"],
@@ -35,6 +89,13 @@ cc_library(
     deps = ["//sw/device/lib/ujson"],
 )
 
+cc_library(
+    name = "hmac_sca_commands",
+    srcs = ["hmac_sca_commands.c"],
+    hdrs = ["hmac_sca_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
 cc_library(
     name = "ibex_fi_commands",
     srcs = ["ibex_fi_commands.c"],
@@ -56,6 +117,13 @@ cc_library(
     deps = ["//sw/device/lib/ujson"],
 )
 
+cc_library(
+    name = "lc_ctrl_fi_commands",
+    srcs = ["lc_ctrl_fi_commands.c"],
+    hdrs = ["lc_ctrl_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
 cc_library(
     name = "otbn_fi_commands",
     srcs = ["otbn_fi_commands.c"],
@@ -63,6 +131,20 @@ cc_library(
     deps = ["//sw/device/lib/ujson"],
 )
 
+cc_library(
+    name = "otbn_sca_commands",
+    srcs = ["otbn_sca_commands.c"],
+    hdrs = ["otbn_sca_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "otp_fi_commands",
+    srcs = ["otp_fi_commands.c"],
+    hdrs = ["otp_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
 cc_library(
     name = "prng_sca_commands",
     srcs = ["prng_sca_commands.c"],
@@ -70,6 +152,34 @@ cc_library(
     deps = ["//sw/device/lib/ujson"],
 )
 
+cc_library(
+    name = "rng_fi_commands",
+    srcs = ["rng_fi_commands.c"],
+    hdrs = ["rng_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "rom_fi_commands",
+    srcs = ["rom_fi_commands.c"],
+    hdrs = ["rom_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "alert_fi_commands",
+    srcs = ["alert_fi_commands.c"],
+    hdrs = ["alert_fi_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
+cc_library(
+    name = "pentest_lib_commands",
+    srcs = ["pentest_lib_commands.c"],
+    hdrs = ["pentest_lib_commands.h"],
+    deps = ["//sw/device/lib/ujson"],
+)
+
 cc_library(
     name = "sha3_sca_commands",
     srcs = ["sha3_sca_commands.c"],
diff --git a/sw/device/tests/penetrationtests/json/aes_sca_commands.h b/sw/device/tests/penetrationtests/json/aes_sca_commands.h
index 7192e9f1398ef..4fdfab6c1bb1c 100644
--- a/sw/device/tests/penetrationtests/json/aes_sca_commands.h
+++ b/sw/device/tests/penetrationtests/json/aes_sca_commands.h
@@ -19,47 +19,40 @@ extern "C" {
 // AES SCA arguments
 
 #define AESSCA_SUBCOMMAND(_, value) \
+    value(_, Single) \
+    value(_, BatchDaisy) \
+    value(_, BatchRandom) \
+    value(_, BatchFvsrData) \
+    value(_, BatchFvsrKey) \
     value(_, Init) \
-    value(_, KeySet) \
-    value(_, SingleEncrypt) \
-    value(_, BatchEncrypt) \
-    value(_, FvsrKeySet) \
-    value(_, FvsrKeyBatchGenerate) \
-    value(_, FvsrKeyBatchEncrypt) \
-    value(_, FvsrKeyStartBatchGenerate) \
-    value(_, FvsrDataBatchEncrypt) \
     value(_, SeedLfsr) \
-    value(_, SeedLfsrOrder) \
-    value(_, BatchAlternativeEncrypt) \
-    value(_, BatchPlaintextSet)
-UJSON_SERDE_ENUM(AesScaSubcommand, aes_sca_subcommand_t, AESSCA_SUBCOMMAND);
+    value(_, SeedLfsrOrder)
+C_ONLY(UJSON_SERDE_ENUM(AesScaSubcommand, aes_sca_subcommand_t, AESSCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(AesScaSubcommand, aes_sca_subcommand_t, AESSCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define AES_SCA_KEY(field, string) \
     field(key, uint8_t, AESSCA_CMD_MAX_KEY_BYTES) \
     field(key_length, size_t)
-UJSON_SERDE_STRUCT(CryptotestAesScaKey, cryptotest_aes_sca_key_t, AES_SCA_KEY);
-
-#define AES_SCA_DATA(field, string) \
-    field(data, uint8_t, AESSCA_CMD_MAX_DATA_BYTES)
-UJSON_SERDE_STRUCT(CryptotestAesScaData, cryptotest_aes_sca_data_t, AES_SCA_DATA);
+UJSON_SERDE_STRUCT(CryptotestAesScaKey, aes_sca_key_t, AES_SCA_KEY);
 
 #define AES_SCA_TEXT(field, string) \
     field(text, uint8_t, AESSCA_CMD_MAX_DATA_BYTES) \
     field(text_length, size_t)
-UJSON_SERDE_STRUCT(CryptotestAesScaText, cryptotest_aes_sca_text_t, AES_SCA_TEXT);
+UJSON_SERDE_STRUCT(CryptotestAesScaText, aes_sca_text_t, AES_SCA_TEXT);
 
 #define AES_SCA_LFSR(field, string) \
     field(seed, uint8_t, AESSCA_CMD_MAX_LFSR_BYTES)
-UJSON_SERDE_STRUCT(CryptotestAesScaLfsr, cryptotest_aes_sca_lfsr_t, AES_SCA_LFSR);
+UJSON_SERDE_STRUCT(CryptotestAesScaLfsr, aes_sca_lfsr_t, AES_SCA_LFSR);
 
 #define AES_SCA_CIPHERTEXT(field, string) \
     field(ciphertext, uint8_t, AESSCA_CMD_MAX_MSG_BYTES) \
     field(ciphertext_length, uint32_t)
-UJSON_SERDE_STRUCT(CryptotestAesScaCiphertext, cryptotest_aes_sca_ciphertext_t, AES_SCA_CIPHERTEXT);
+UJSON_SERDE_STRUCT(CryptotestAesScaCiphertext, aes_sca_ciphertext_t, AES_SCA_CIPHERTEXT);
 
 #define AES_SCA_FPGA_MODE(field, string) \
     field(fpga_mode, uint8_t)
-UJSON_SERDE_STRUCT(CryptotestAesScaFpgaMode, cryptotest_aes_sca_fpga_mode_t, AES_SCA_FPGA_MODE);
+UJSON_SERDE_STRUCT(CryptotestAesScaFpgaMode, aes_sca_fpga_mode_t, AES_SCA_FPGA_MODE);
+
 // clang-format on
 
 #ifdef __cplusplus
diff --git a/sw/device/tests/penetrationtests/json/alert_fi_commands.c b/sw/device/tests/penetrationtests/json/alert_fi_commands.c
new file mode 100644
index 0000000000000..7bde575c54f07
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/alert_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "alert_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/alert_fi_commands.h b/sw/device/tests/penetrationtests/json/alert_fi_commands.h
new file mode 100644
index 0000000000000..1ecbd78bc5ba1
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/alert_fi_commands.h
@@ -0,0 +1,43 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ALERT_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ALERT_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// clang-format off
+
+// AES SCA arguments
+
+#define ALERT_FI_SUBCOMMAND(_, value) \
+    value(_, Init) \
+    value(_, Trigger) \
+    value(_, SensorCtrlTrigger) \
+    value(_, IbexSwFatal)
+C_ONLY(UJSON_SERDE_ENUM(AlertFiSubcommand, alert_fi_subcommand_t, ALERT_FI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(AlertFiSubcommand, alert_fi_subcommand_t, ALERT_FI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define ALERT_FI_TRIGGER(field, string) \
+    field(alert, uint32_t)
+UJSON_SERDE_STRUCT(AlertFiTrigger, alert_fi_trigger_t, ALERT_FI_TRIGGER);
+
+#define ALERT_FI_ALERT_OUT(field, string) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(AlertFiAlertOut, alert_fi_alert_out_t, ALERT_FI_ALERT_OUT);
+
+#define ALERT_FI_EMPTY_OUT(field, string) \
+    field(success, bool)
+UJSON_SERDE_STRUCT(AlertFiEmptyOut, alert_fi_empty_out_t, ALERT_FI_EMPTY_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ALERT_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/commands.h b/sw/device/tests/penetrationtests/json/commands.h
index e9b7fa2d60366..fdd4fdc168249 100644
--- a/sw/device/tests/penetrationtests/json/commands.h
+++ b/sw/device/tests/penetrationtests/json/commands.h
@@ -13,16 +13,34 @@ extern "C" {
 
 #define COMMAND(_, value) \
     value(_, AesSca) \
+    value(_, AlertInfo) \
+    value(_, CryptoFi) \
+    value(_, CryptoLibFiAsym) \
+    value(_, CryptoLibFiSym) \
+    value(_, CryptoLibScaSym) \
+    value(_, CryptoLibScaAsym) \
+    value(_, EdnSca) \
     value(_, ExtClkScaFi) \
+    value(_, HmacSca) \
     value(_, IbexFi) \
     value(_, IbexSca) \
     value(_, KmacSca) \
+    value(_, LCCtrlFi) \
     value(_, OtbnFi) \
+    value(_, OtbnSca) \
+    value(_, OtpFi) \
     value(_, PrngSca) \
+    value(_, RngFi) \
+    value(_, RomFi) \
     value(_, Sha3Sca) \
-    value(_, TriggerSca)
+    value(_, TriggerSca) \
+    value(_, AlertFi)
 UJSON_SERDE_ENUM(PenetrationtestCommand, penetrationtest_cmd_t, COMMAND);
 
+#define PENTEST_NUM_ENC(field, string) \
+    field(num_enc, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestCommandNumEnc, penetrationtest_num_enc_t, PENTEST_NUM_ENC);
+
 // clang-format on
 
 #ifdef __cplusplus
diff --git a/sw/device/tests/penetrationtests/json/crypto_fi_commands.c b/sw/device/tests/penetrationtests/json/crypto_fi_commands.c
new file mode 100644
index 0000000000000..50a648d076697
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/crypto_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "crypto_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/crypto_fi_commands.h b/sw/device/tests/penetrationtests/json/crypto_fi_commands.h
new file mode 100644
index 0000000000000..02ee7c6cf7665
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/crypto_fi_commands.h
@@ -0,0 +1,111 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTO_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTO_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CRYPTOFI_HMAC_CMD_MAX_MESSAGE_BYTES 16
+#define CRYPTOFI_HMAC_CMD_MAX_KEY_WORDS 16
+#define CRYPTOFI_HMAC_CMD_MAX_TAG_WORDS 16
+
+#define CRYPTOFI_AES_MAX_MSG_BYTES 16
+#define CRYPTOFI_AES_MAX_KEY_BYTES 16
+
+// clang-format off
+
+#define CRYPTOFI_SUBCOMMAND(_, value) \
+    value(_, Aes) \
+    value(_, Init) \
+    value(_, Kmac) \
+    value(_, KmacState) \
+    value(_, Hmac) \
+    value(_, ShadowRegAccess) \
+    value(_, ShadowRegRead)
+C_ONLY(UJSON_SERDE_ENUM(CryptoFiSubcommand, crypto_fi_subcommand_t, CRYPTOFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(CryptoFiSubcommand, crypto_fi_subcommand_t, CRYPTOFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOFI_AES_MODE(field, string) \
+    field(key_trigger, bool) \
+    field(plaintext_trigger, bool) \
+    field(encrypt_trigger, bool) \
+    field(ciphertext_trigger, bool)
+UJSON_SERDE_STRUCT(CryptoFiAesMode, crypto_fi_aes_mode_t, CRYPTOFI_AES_MODE);
+
+#define CRYPTOFI_AES_INPUT(field, string) \
+    field(plaintext, uint8_t, CRYPTOFI_AES_MAX_MSG_BYTES) \
+    field(key, uint8_t, CRYPTOFI_AES_MAX_KEY_BYTES)
+UJSON_SERDE_STRUCT(CryptoFiAesInput, crypto_fi_aes_input_t, CRYPTOFI_AES_INPUT);
+
+#define CRYPTOFI_KMAC_MODE(field, string) \
+    field(key_trigger, bool) \
+    field(absorb_trigger, bool) \
+    field(static_trigger, bool) \
+    field(squeeze_trigger, bool)
+UJSON_SERDE_STRUCT(CryptoFiKmacMode, crypto_fi_kmac_mode_t, CRYPTOFI_KMAC_MODE);
+
+#define CRYPTOFI_AES_CIPHERTEXT(field, string) \
+    field(ciphertext, uint8_t, 16) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(FiAesCiphertext, crypto_fi_aes_ciphertext_t, CRYPTOFI_AES_CIPHERTEXT);
+
+#define CRYPTOFI_KMAC_STATE(field, string) \
+    field(share0, uint8_t, 200) \
+    field(share1, uint8_t, 200) \
+    field(digest, uint8_t, 8) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(FiKmacState, crypto_fi_kmac_state_t, CRYPTOFI_KMAC_STATE);
+
+#define CRYPTOFI_KMAC_DIGEST(field, string) \
+    field(digest, uint8_t, 8) \
+    field(digest_2nd, uint8_t, 8) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(FiKmacDigest, crypto_fi_kmac_digest_t, CRYPTOFI_KMAC_DIGEST);
+
+#define CRYPTOFI_TEST_RESULT_MULT(field, string) \
+    field(result, uint32_t, 3) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(CRYPTOFITestResultMult, crypto_fi_test_result_mult_t, CRYPTOFI_TEST_RESULT_MULT);
+
+#define CRYPTOFI_HMAC_INPUT(field, string) \
+    field(message, uint8_t, CRYPTOFI_HMAC_CMD_MAX_MESSAGE_BYTES) \
+    field(key, uint32_t, CRYPTOFI_HMAC_CMD_MAX_KEY_WORDS)
+UJSON_SERDE_STRUCT(FiHmacInput, crypto_fi_hmac_input_t, CRYPTOFI_HMAC_INPUT);
+
+#define CRYPTOFI_HMAC_TAG(field, string) \
+    field(tag, uint32_t, CRYPTOFI_HMAC_CMD_MAX_TAG_WORDS) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(FiHmacTag, crypto_fi_hmac_tag_t, CRYPTOFI_HMAC_TAG);
+
+#define CRYPTOFI_HMAC_MODE(field, string) \
+    field(start_trigger, bool) \
+    field(msg_trigger, bool) \
+    field(process_trigger, bool) \
+    field(finish_trigger, bool) \
+    field(enable_hmac, bool) \
+    field(message_endianness_big, bool) \
+    field(digest_endianness_big, bool) \
+    field(key_endianness_big, bool) \
+    field(hash_mode, uint32_t)
+UJSON_SERDE_STRUCT(CryptoFiHmacMode, crypto_fi_hmac_mode_t, CRYPTOFI_HMAC_MODE);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTO_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.c b/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.c
new file mode 100644
index 0000000000000..a351e5fb33db8
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "cryptolib_fi_asym_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h b/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h
new file mode 100644
index 0000000000000..414d7ddc71a01
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_fi_asym_commands.h
@@ -0,0 +1,453 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_ASYM_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_ASYM_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RSA_CMD_MAX_MESSAGE_BYTES 512
+#define RSA_CMD_MAX_N_BYTES 512
+#define RSA_CMD_MAX_SIGNATURE_BYTES 512
+
+#define P256_CMD_BYTES 32
+#define P384_CMD_BYTES 48
+#define SECP256K1_CMD_BYTES 32
+#define X25519_CMD_BYTES 32
+#define ED25519_CMD_SCALAR_BYTES 32
+#define ED25519_CMD_MAX_MSG_BYTES 128
+#define ED25519_CMD_SIG_BYTES 64
+
+// clang-format off
+
+#define CRYPTOLIBFIASYM_SUBCOMMAND(_, value) \
+    value(_, RsaEnc) \
+    value(_, RsaSign) \
+    value(_, RsaVerify) \
+    value(_, Prime) \
+    value(_, P256BaseMul) \
+    value(_, P256PointMul) \
+    value(_, P256Ecdh) \
+    value(_, P256Sign) \
+    value(_, P256Verify) \
+    value(_, P384BaseMul) \
+    value(_, P384PointMul) \
+    value(_, P384Ecdh) \
+    value(_, P384Sign) \
+    value(_, P384Verify) \
+    value(_, Secp256k1BaseMul) \
+    value(_, Secp256k1PointMul) \
+    value(_, Secp256k1Ecdh) \
+    value(_, Secp256k1Sign) \
+    value(_, Secp256k1Verify) \
+    value(_, X25519BaseMul) \
+    value(_, X25519PointMul) \
+    value(_, X25519Ecdh) \
+    value(_, Ed25519BaseMul) \
+    value(_, Ed25519Sign) \
+    value(_, Ed25519Verify) \
+    value(_, Init)
+C_ONLY(UJSON_SERDE_ENUM(CryptoLibFiAsymSubcommand, cryptolib_fi_asym_subcommand_t, CRYPTOLIBFIASYM_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(CryptoLibFiAsymSubcommand, cryptolib_fi_asym_subcommand_t, CRYPTOLIBFIASYM_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOLIBFIASYM_RSA_ENC_IN(field, string) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(mode, size_t) \
+    field(e, uint32_t) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(hashing, size_t) \
+    field(padding, size_t) \
+    field(op_enc, bool) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaEncIn, cryptolib_fi_asym_rsa_enc_in_t, CRYPTOLIBFIASYM_RSA_ENC_IN);
+
+#define CRYPTOLIBFIASYM_RSA_ENC_OUT(field, string) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaEncOut, cryptolib_fi_asym_rsa_enc_out_t, CRYPTOLIBFIASYM_RSA_ENC_OUT);
+
+#define CRYPTOLIBFIASYM_RSA_SIGN_IN(field, string) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(e, uint32_t) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(hashing, size_t) \
+    field(padding, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaSignIn, cryptolib_fi_asym_rsa_sign_in_t, CRYPTOLIBFIASYM_RSA_SIGN_IN);
+
+#define CRYPTOLIBFIASYM_RSA_SIGN_OUT(field, string) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(sig, uint8_t, RSA_CMD_MAX_SIGNATURE_BYTES) \
+    field(sig_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaSignOut, cryptolib_fi_asym_rsa_sign_out_t, CRYPTOLIBFIASYM_RSA_SIGN_OUT);
+
+#define CRYPTOLIBFIASYM_RSA_VERIFY_IN(field, string) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(e, uint32_t) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(sig, uint8_t, RSA_CMD_MAX_SIGNATURE_BYTES) \
+    field(sig_len, size_t) \
+    field(hashing, size_t) \
+    field(padding, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaVerifyIn, cryptolib_fi_asym_rsa_verify_in_t, CRYPTOLIBFIASYM_RSA_VERIFY_IN);
+
+#define CRYPTOLIBFIASYM_RSA_VERIFY_OUT(field, string) \
+    field(result, bool) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymRsaVerifyOut, cryptolib_fi_asym_rsa_verify_out_t, CRYPTOLIBFIASYM_RSA_VERIFY_OUT);
+
+#define CRYPTOLIBFIASYM_PRIME_IN(field, string) \
+    field(e, uint32_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymPrimeIn, cryptolib_fi_asym_prime_in_t, CRYPTOLIBFIASYM_PRIME_IN);
+
+#define CRYPTOLIBFIASYM_PRIME_OUT(field, string) \
+    field(prime, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(prime_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymPrimeOut, cryptolib_fi_asym_prime_out_t, CRYPTOLIBFIASYM_PRIME_OUT);
+
+#define CRYPTOLIBFIASYM_P256_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256BaseMulIn, cryptolib_fi_asym_p256_base_mul_in_t, CRYPTOLIBFIASYM_P256_BASE_MUL_IN);
+
+#define CRYPTOLIBFIASYM_P256_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, P256_CMD_BYTES) \
+    field(y, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256BaseMulOut, cryptolib_fi_asym_p256_base_mul_out_t, CRYPTOLIBFIASYM_P256_BASE_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_P256_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, P256_CMD_BYTES) \
+    field(scalar_bob, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256PointMulIn, cryptolib_fi_asym_p256_point_mul_in_t, CRYPTOLIBFIASYM_P256_POINT_MUL_IN);
+
+#define CRYPTOLIBFIASYM_P256_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, P256_CMD_BYTES) \
+    field(y, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256PointMulOut, cryptolib_fi_asym_p256_point_mul_out_t, CRYPTOLIBFIASYM_P256_POINT_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_P256_ECDH_IN(field, string) \
+    field(private_key, uint8_t, P256_CMD_BYTES) \
+    field(public_x, uint8_t, P256_CMD_BYTES) \
+    field(public_y, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256EcdhIn, cryptolib_fi_asym_p256_ecdh_in_t, CRYPTOLIBFIASYM_P256_ECDH_IN);
+
+#define CRYPTOLIBFIASYM_P256_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256EcdhOut, cryptolib_fi_asym_p256_ecdh_out_t, CRYPTOLIBFIASYM_P256_ECDH_OUT);
+
+#define CRYPTOLIBFIASYM_P256_SIGN_IN(field, string) \
+    field(scalar, uint8_t, P256_CMD_BYTES) \
+    field(pubx, uint8_t, P256_CMD_BYTES) \
+    field(puby, uint8_t, P256_CMD_BYTES) \
+    field(message, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256SignIn, cryptolib_fi_asym_p256_sign_in_t, CRYPTOLIBFIASYM_P256_SIGN_IN);
+
+#define CRYPTOLIBFIASYM_P256_SIGN_OUT(field, string) \
+    field(r, uint8_t, P256_CMD_BYTES) \
+    field(s, uint8_t, P256_CMD_BYTES) \
+    field(pubx, uint8_t, P256_CMD_BYTES) \
+    field(puby, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256SignOut, cryptolib_fi_asym_p256_sign_out_t, CRYPTOLIBFIASYM_P256_SIGN_OUT);
+
+#define CRYPTOLIBFIASYM_P256_VERIFY_IN(field, string) \
+    field(pubx, uint8_t, P256_CMD_BYTES) \
+    field(puby, uint8_t, P256_CMD_BYTES) \
+    field(r, uint8_t, P256_CMD_BYTES) \
+    field(s, uint8_t, P256_CMD_BYTES) \
+    field(message, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256VerifyIn, cryptolib_fi_asym_p256_verify_in_t, CRYPTOLIBFIASYM_P256_VERIFY_IN);
+
+#define CRYPTOLIBFIASYM_P256_VERIFY_OUT(field, string) \
+    field(result, bool) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP256VerifyOut, cryptolib_fi_asym_p256_verify_out_t, CRYPTOLIBFIASYM_P256_VERIFY_OUT);
+
+#define CRYPTOLIBFIASYM_P384_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384BaseMulIn, cryptolib_fi_asym_p384_base_mul_in_t, CRYPTOLIBFIASYM_P384_BASE_MUL_IN);
+
+#define CRYPTOLIBFIASYM_P384_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, P384_CMD_BYTES) \
+    field(y, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384BaseMulOut, cryptolib_fi_asym_p384_base_mul_out_t, CRYPTOLIBFIASYM_P384_BASE_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_P384_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, P384_CMD_BYTES) \
+    field(scalar_bob, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384PointMulIn, cryptolib_fi_asym_p384_point_mul_in_t, CRYPTOLIBFIASYM_P384_POINT_MUL_IN);
+
+#define CRYPTOLIBFIASYM_P384_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, P384_CMD_BYTES) \
+    field(y, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384PointMulOut, cryptolib_fi_asym_p384_point_mul_out_t, CRYPTOLIBFIASYM_P384_POINT_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_P384_ECDH_IN(field, string) \
+    field(private_key, uint8_t, P384_CMD_BYTES) \
+    field(public_x, uint8_t, P384_CMD_BYTES) \
+    field(public_y, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384EcdhIn, cryptolib_fi_asym_p384_ecdh_in_t, CRYPTOLIBFIASYM_P384_ECDH_IN);
+
+#define CRYPTOLIBFIASYM_P384_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384EcdhOut, cryptolib_fi_asym_p384_ecdh_out_t, CRYPTOLIBFIASYM_P384_ECDH_OUT);
+
+#define CRYPTOLIBFIASYM_P384_SIGN_IN(field, string) \
+    field(scalar, uint8_t, P384_CMD_BYTES) \
+    field(pubx, uint8_t, P384_CMD_BYTES) \
+    field(puby, uint8_t, P384_CMD_BYTES) \
+    field(message, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384SignIn, cryptolib_fi_asym_p384_sign_in_t, CRYPTOLIBFIASYM_P384_SIGN_IN);
+
+#define CRYPTOLIBFIASYM_P384_SIGN_OUT(field, string) \
+    field(r, uint8_t, P384_CMD_BYTES) \
+    field(s, uint8_t, P384_CMD_BYTES) \
+    field(pubx, uint8_t, P384_CMD_BYTES) \
+    field(puby, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384SignOut, cryptolib_fi_asym_p384_sign_out_t, CRYPTOLIBFIASYM_P384_SIGN_OUT);
+
+#define CRYPTOLIBFIASYM_P384_VERIFY_IN(field, string) \
+    field(pubx, uint8_t, P384_CMD_BYTES) \
+    field(puby, uint8_t, P384_CMD_BYTES) \
+    field(r, uint8_t, P384_CMD_BYTES) \
+    field(s, uint8_t, P384_CMD_BYTES) \
+    field(message, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384VerifyIn, cryptolib_fi_asym_p384_verify_in_t, CRYPTOLIBFIASYM_P384_VERIFY_IN);
+
+#define CRYPTOLIBFIASYM_P384_VERIFY_OUT(field, string) \
+    field(result, bool) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymP384VerifyOut, cryptolib_fi_asym_p384_verify_out_t, CRYPTOLIBFIASYM_P384_VERIFY_OUT);
+
+#define CRYPTOLIBFIASYM_SECP256K1_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1BaseMulIn, cryptolib_fi_asym_secp256k1_base_mul_in_t, CRYPTOLIBFIASYM_SECP256K1_BASE_MUL_IN);
+
+#define CRYPTOLIBFIASYM_SECP256K1_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1BaseMulOut, cryptolib_fi_asym_secp256k1_base_mul_out_t, CRYPTOLIBFIASYM_SECP256K1_BASE_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_SECP256K1_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, SECP256K1_CMD_BYTES) \
+    field(scalar_bob, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1PointMulIn, cryptolib_fi_asym_secp256k1_point_mul_in_t, CRYPTOLIBFIASYM_SECP256K1_POINT_MUL_IN);
+
+#define CRYPTOLIBFIASYM_SECP256K1_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1PointMulOut, cryptolib_fi_asym_secp256k1_point_mul_out_t, CRYPTOLIBFIASYM_SECP256K1_POINT_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_SECP256K1_ECDH_IN(field, string) \
+    field(private_key, uint8_t, SECP256K1_CMD_BYTES) \
+    field(public_x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(public_y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1EcdhIn, cryptolib_fi_asym_secp256k1_ecdh_in_t, CRYPTOLIBFIASYM_SECP256K1_ECDH_IN);
+
+#define CRYPTOLIBFIASYM_SECP256K1_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1EcdhOut, cryptolib_fi_asym_secp256k1_ecdh_out_t, CRYPTOLIBFIASYM_SECP256K1_ECDH_OUT);
+
+#define CRYPTOLIBFIASYM_SECP256K1_SIGN_IN(field, string) \
+    field(scalar, uint8_t, SECP256K1_CMD_BYTES) \
+    field(message, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1SignIn, cryptolib_fi_asym_secp256k1_sign_in_t, CRYPTOLIBFIASYM_SECP256K1_SIGN_IN);
+
+#define CRYPTOLIBFIASYM_SECP256K1_SIGN_OUT(field, string) \
+    field(r, uint8_t, SECP256K1_CMD_BYTES) \
+    field(s, uint8_t, SECP256K1_CMD_BYTES) \
+    field(pubx, uint8_t, SECP256K1_CMD_BYTES) \
+    field(puby, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1SignOut, cryptolib_fi_asym_secp256k1_sign_out_t, CRYPTOLIBFIASYM_SECP256K1_SIGN_OUT);
+
+#define CRYPTOLIBFIASYM_SECP256K1_VERIFY_IN(field, string) \
+    field(pubx, uint8_t, SECP256K1_CMD_BYTES) \
+    field(puby, uint8_t, SECP256K1_CMD_BYTES) \
+    field(r, uint8_t, SECP256K1_CMD_BYTES) \
+    field(s, uint8_t, SECP256K1_CMD_BYTES) \
+    field(message, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1VerifyIn, cryptolib_fi_asym_secp256k1_verify_in_t, CRYPTOLIBFIASYM_SECP256K1_VERIFY_IN);
+
+#define CRYPTOLIBFIASYM_SECP256K1_VERIFY_OUT(field, string) \
+    field(result, bool) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymSECP256K1VerifyOut, cryptolib_fi_asym_secp256k1_verify_out_t, CRYPTOLIBFIASYM_SECP256K1_VERIFY_OUT);
+
+#define CRYPTOLIBFIASYM_X25519_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519BaseMulIn, cryptolib_fi_asym_x25519_base_mul_in_t, CRYPTOLIBFIASYM_X25519_BASE_MUL_IN);
+
+#define CRYPTOLIBFIASYM_X25519_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, X25519_CMD_BYTES) \
+    field(y, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519BaseMulOut, cryptolib_fi_asym_x25519_base_mul_out_t, CRYPTOLIBFIASYM_X25519_BASE_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_X25519_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, X25519_CMD_BYTES) \
+    field(scalar_bob, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519PointMulIn, cryptolib_fi_asym_x25519_point_mul_in_t, CRYPTOLIBFIASYM_X25519_POINT_MUL_IN);
+
+#define CRYPTOLIBFIASYM_X25519_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, X25519_CMD_BYTES) \
+    field(y, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519PointMulOut, cryptolib_fi_asym_x25519_point_mul_out_t, CRYPTOLIBFIASYM_X25519_POINT_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_X25519_ECDH_IN(field, string) \
+    field(private_key, uint8_t, X25519_CMD_BYTES) \
+    field(public_x, uint8_t, X25519_CMD_BYTES) \
+    field(public_y, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519EcdhIn, cryptolib_fi_asym_x25519_ecdh_in_t, CRYPTOLIBFIASYM_X25519_ECDH_IN);
+
+#define CRYPTOLIBFIASYM_X25519_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymX25519EcdhOut, cryptolib_fi_asym_x25519_ecdh_out_t, CRYPTOLIBFIASYM_X25519_ECDH_OUT);
+
+#define CRYPTOLIBFIASYM_ED25519_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519BaseMulIn, cryptolib_fi_asym_ed25519_base_mul_in_t, CRYPTOLIBFIASYM_ED25519_BASE_MUL_IN);
+
+#define CRYPTOLIBFIASYM_ED25519_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(y, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519BaseMulOut, cryptolib_fi_asym_ed25519_base_mul_out_t, CRYPTOLIBFIASYM_ED25519_BASE_MUL_OUT);
+
+#define CRYPTOLIBFIASYM_ED25519_SIGN_IN(field, string) \
+    field(scalar, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(message, uint8_t, ED25519_CMD_MAX_MSG_BYTES) \
+    field(message_len, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519SignIn, cryptolib_fi_asym_ed25519_sign_in_t, CRYPTOLIBFIASYM_ED25519_SIGN_IN);
+
+#define CRYPTOLIBFIASYM_ED25519_SIGN_OUT(field, string) \
+    field(r, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(s, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(pubx, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(puby, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519SignOut, cryptolib_fi_asym_ed25519_sign_out_t, CRYPTOLIBFIASYM_ED25519_SIGN_OUT);
+
+#define CRYPTOLIBFIASYM_ED25519_VERIFY_IN(field, string) \
+    field(pubx, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(puby, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(r, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(s, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(message, uint8_t, ED25519_CMD_MAX_MSG_BYTES) \
+    field(message_len, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519VerifyIn, cryptolib_fi_asym_ed25519_verify_in_t, CRYPTOLIBFIASYM_ED25519_VERIFY_IN);
+
+#define CRYPTOLIBFIASYM_ED25519_VERIFY_OUT(field, string) \
+    field(result, bool) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiAsymED25519VerifyOut, cryptolib_fi_asym_ed25519_verify_out_t, CRYPTOLIBFIASYM_ED25519_VERIFY_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_ASYM_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.c b/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.c
new file mode 100644
index 0000000000000..b1578252ac9d0
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "cryptolib_fi_sym_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h b/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h
new file mode 100644
index 0000000000000..f69bdf6f7dbd8
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_fi_sym_commands.h
@@ -0,0 +1,202 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_SYM_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_SYM_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AES_CMD_MAX_MSG_BYTES 64
+#define AES_CMD_MAX_KEY_BYTES 32
+#define AES_CMD_MAX_BLOCK_BYTES 16
+
+#define TDES_CMD_MAX_MSG_BYTES 64
+#define TDES_CMD_MAX_KEY_BYTES 21
+#define TDES_CMD_MAX_BLOCK_BYTES 8
+
+#define HMAC_CMD_MAX_MSG_BYTES 64
+#define HMAC_CMD_MAX_KEY_BYTES 192
+#define HMAC_CMD_MAX_TAG_BYTES 64
+
+#define DRBG_CMD_MAX_ENTROPY_BYTES 32
+#define DRBG_CMD_MAX_NONCE_BYTES 16
+#define DRBG_CMD_MAX_OUTPUT_BYTES 256
+
+#define TRNG_CMD_MAX_OUTPUT_BYTES 4
+
+// clang-format off
+
+#define CRYPTOLIBFISYM_SUBCOMMAND(_, value) \
+    value(_, Aes) \
+    value(_, Cmac) \
+    value(_, Gcm) \
+    value(_, Tdes) \
+    value(_, Hmac) \
+    value(_, DrbgGenerate) \
+    value(_, DrbgReseed) \
+    value(_, TrngGenerate) \
+    value(_, TrngInit) \
+    value(_, Init)
+C_ONLY(UJSON_SERDE_ENUM(CryptoLibFiSymSubcommand, cryptolib_fi_sym_subcommand_t, CRYPTOLIBFISYM_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(CryptoLibFiSymSubcommand, cryptolib_fi_sym_subcommand_t, CRYPTOLIBFISYM_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOLIBFISYM_AES_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(op_enc, bool) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymAesIn, cryptolib_fi_sym_aes_in_t, CRYPTOLIBFISYM_AES_IN);
+
+#define CRYPTOLIBFISYM_AES_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymAesOut, cryptolib_fi_sym_aes_out_t, CRYPTOLIBFISYM_AES_OUT);
+
+#define CRYPTOLIBFISYM_CMAC_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymCmacIn, cryptolib_fi_sym_cmac_in_t, CRYPTOLIBFISYM_CMAC_IN);
+
+#define CRYPTOLIBFISYM_CMAC_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymCmacOut, cryptolib_fi_sym_cmac_out_t, CRYPTOLIBFISYM_CMAC_OUT);
+
+#define CRYPTOLIBFISYM_GCM_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(aad, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(aad_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(tag, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(tag_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymGcmIn, cryptolib_fi_sym_gcm_in_t, CRYPTOLIBFISYM_GCM_IN);
+
+#define CRYPTOLIBFISYM_GCM_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(tag, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(tag_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymGcmOut, cryptolib_fi_sym_gcm_out_t, CRYPTOLIBFISYM_GCM_OUT);
+
+#define CRYPTOLIBFISYM_TDES_IN(field, string) \
+    field(data, uint8_t, TDES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, TDES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, TDES_CMD_MAX_BLOCK_BYTES) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(op_enc, bool) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTdesIn, cryptolib_fi_sym_tdes_in_t, CRYPTOLIBFISYM_TDES_IN);
+
+#define CRYPTOLIBFISYM_TDES_OUT(field, string) \
+    field(data, uint8_t, TDES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTdesOut, cryptolib_fi_sym_tdes_out_t, CRYPTOLIBFISYM_TDES_OUT);
+
+#define CRYPTOLIBFISYM_HMAC_IN(field, string) \
+    field(data, uint8_t, HMAC_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, HMAC_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymHmacIn, cryptolib_fi_sym_hmac_in_t, CRYPTOLIBFISYM_HMAC_IN);
+
+#define CRYPTOLIBFISYM_HMAC_OUT(field, string) \
+    field(data, uint8_t, HMAC_CMD_MAX_TAG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymHmacOut, cryptolib_fi_sym_hmac_out_t, CRYPTOLIBFISYM_HMAC_OUT);
+
+#define CRYPTOLIBFISYM_DRBG_GENERATE_IN(field, string) \
+    field(nonce, uint8_t, DRBG_CMD_MAX_NONCE_BYTES) \
+    field(nonce_len, size_t) \
+    field(data_len, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymDrbgGenerateIn, cryptolib_fi_sym_drbg_generate_in_t, CRYPTOLIBFISYM_DRBG_GENERATE_IN);
+
+#define CRYPTOLIBFISYM_DRBG_RESEED_IN(field, string) \
+    field(entropy, uint8_t, DRBG_CMD_MAX_ENTROPY_BYTES) \
+    field(entropy_len, size_t) \
+    field(nonce, uint8_t, DRBG_CMD_MAX_NONCE_BYTES) \
+    field(nonce_len, size_t) \
+    field(reseed_interval, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymDrbgReseedIn, cryptolib_fi_sym_drbg_reseed_in_t, CRYPTOLIBFISYM_DRBG_RESEED_IN);
+
+#define CRYPTOLIBFISYM_DRBG_GENERATE_OUT(field, string) \
+    field(data, uint8_t, DRBG_CMD_MAX_OUTPUT_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymDrbgGenerateOut, cryptolib_fi_sym_drbg_generate_out_t, CRYPTOLIBFISYM_DRBG_GENERATE_OUT);
+
+#define CRYPTOLIBFISYM_DRBG_RESEED_OUT(field, string) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymDrbgReseedOut, cryptolib_fi_sym_drbg_reseed_out_t, CRYPTOLIBFISYM_DRBG_RESEED_OUT);
+
+#define CRYPTOLIBFISYM_TRNG_GENERATE_IN(field, string) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTrngGenerateIn, cryptolib_fi_sym_trng_generate_in_t, CRYPTOLIBFISYM_TRNG_GENERATE_IN);
+
+#define CRYPTOLIBFISYM_TRNG_INIT_IN(field, string) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTrngInitIn, cryptolib_fi_sym_trng_init_in_t, CRYPTOLIBFISYM_TRNG_INIT_IN);
+
+#define CRYPTOLIBFISYM_TRNG_GENERATE_OUT(field, string) \
+    field(data, uint8_t, TRNG_CMD_MAX_OUTPUT_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTrngGenerateOut, cryptolib_fi_sym_trng_generate_out_t, CRYPTOLIBFISYM_TRNG_GENERATE_OUT);
+
+#define CRYPTOLIBFISYM_TRNG_INIT_OUT(field, string) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibFiSymTrngInitOut, cryptolib_fi_sym_trng_init_out_t, CRYPTOLIBFISYM_TRNG_INIT_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_FI_SYM_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.c b/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.c
new file mode 100644
index 0000000000000..05ff3dff66c40
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "cryptolib_sca_asym_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h b/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h
new file mode 100644
index 0000000000000..8ad032d53d878
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_sca_asym_commands.h
@@ -0,0 +1,373 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_ASYM_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_ASYM_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define RSA_CMD_MAX_MESSAGE_BYTES 512
+#define RSA_CMD_MAX_N_BYTES 512
+#define RSA_CMD_MAX_SIGNATURE_BYTES 512
+
+#define P256_CMD_BYTES 32
+#define P384_CMD_BYTES 48
+#define SECP256K1_CMD_BYTES 32
+#define X25519_CMD_BYTES 32
+#define ED25519_CMD_SCALAR_BYTES 32
+#define ED25519_CMD_MAX_MSG_BYTES 128
+#define ED25519_CMD_SIG_BYTES 64
+
+// clang-format off
+
+#define CRYPTOLIBSCAASYM_SUBCOMMAND(_, value) \
+    value(_, RsaDec) \
+    value(_, RsaSign) \
+    value(_, Prime) \
+    value(_, P256BaseMulFvsr) \
+    value(_, P256BaseMulDaisy) \
+    value(_, P256PointMul) \
+    value(_, P256Ecdh) \
+    value(_, P256Sign) \
+    value(_, P384BaseMulFvsr) \
+    value(_, P384BaseMulDaisy) \
+    value(_, P384PointMul) \
+    value(_, P384Ecdh) \
+    value(_, P384Sign) \
+    value(_, Secp256k1BaseMulFvsr) \
+    value(_, Secp256k1BaseMulDaisy) \
+    value(_, Secp256k1PointMul) \
+    value(_, Secp256k1Ecdh) \
+    value(_, Secp256k1Sign) \
+    value(_, X25519BaseMulFvsr) \
+    value(_, X25519BaseMulDaisy) \
+    value(_, X25519PointMul) \
+    value(_, X25519Ecdh) \
+    value(_, Ed25519BaseMulFvsr) \
+    value(_, Ed25519BaseMulDaisy) \
+    value(_, Ed25519Sign) \
+    value(_, Init)
+C_ONLY(UJSON_SERDE_ENUM(CryptoLibScaAsymSubcommand, cryptolib_sca_asym_subcommand_t, CRYPTOLIBSCAASYM_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(CryptoLibScaAsymSubcommand, cryptolib_sca_asym_subcommand_t, CRYPTOLIBSCAASYM_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOLIBSCAASYM_RSA_DEC_IN(field, string) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(mode, size_t) \
+    field(e, uint32_t) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(hashing, size_t) \
+    field(padding, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymRsaDecIn, cryptolib_sca_asym_rsa_dec_in_t, CRYPTOLIBSCAASYM_RSA_DEC_IN);
+
+#define CRYPTOLIBSCAASYM_RSA_DEC_OUT(field, string) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymRsaDecOut, cryptolib_sca_asym_rsa_dec_out_t, CRYPTOLIBSCAASYM_RSA_DEC_OUT);
+
+#define CRYPTOLIBSCAASYM_RSA_SIGN_IN(field, string) \
+    field(data, uint8_t, RSA_CMD_MAX_MESSAGE_BYTES) \
+    field(data_len, size_t) \
+    field(e, uint32_t) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(hashing, size_t) \
+    field(padding, size_t) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymRsaSignIn, cryptolib_sca_asym_rsa_sign_in_t, CRYPTOLIBSCAASYM_RSA_SIGN_IN);
+
+#define CRYPTOLIBSCAASYM_RSA_SIGN_OUT(field, string) \
+    field(n, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(d, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(n_len, size_t) \
+    field(sig, uint8_t, RSA_CMD_MAX_SIGNATURE_BYTES) \
+    field(sig_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymRsaSignOut, cryptolib_sca_asym_rsa_sign_out_t, CRYPTOLIBSCAASYM_RSA_SIGN_OUT);
+
+#define CRYPTOLIBSCAASYM_PRIME_IN(field, string) \
+    field(e, uint32_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymPrimeIn, cryptolib_sca_asym_prime_in_t, CRYPTOLIBSCAASYM_PRIME_IN);
+
+#define CRYPTOLIBSCAASYM_PRIME_OUT(field, string) \
+    field(prime, uint8_t, RSA_CMD_MAX_N_BYTES) \
+    field(prime_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymPrimeOut, cryptolib_sca_asym_prime_out_t, CRYPTOLIBSCAASYM_PRIME_OUT);
+
+#define CRYPTOLIBSCAASYM_P256_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256BaseMulIn, cryptolib_sca_asym_p256_base_mul_in_t, CRYPTOLIBSCAASYM_P256_BASE_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_P256_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, P256_CMD_BYTES) \
+    field(y, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256BaseMulOut, cryptolib_sca_asym_p256_base_mul_out_t, CRYPTOLIBSCAASYM_P256_BASE_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_P256_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, P256_CMD_BYTES) \
+    field(scalar_bob, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256PointMulIn, cryptolib_sca_asym_p256_point_mul_in_t, CRYPTOLIBSCAASYM_P256_POINT_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_P256_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, P256_CMD_BYTES) \
+    field(y, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256PointMulOut, cryptolib_sca_asym_p256_point_mul_out_t, CRYPTOLIBSCAASYM_P256_POINT_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_P256_ECDH_IN(field, string) \
+    field(private_key, uint8_t, P256_CMD_BYTES) \
+    field(public_x, uint8_t, P256_CMD_BYTES) \
+    field(public_y, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256EcdhIn, cryptolib_sca_asym_p256_ecdh_in_t, CRYPTOLIBSCAASYM_P256_ECDH_IN);
+
+#define CRYPTOLIBSCAASYM_P256_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256EcdhOut, cryptolib_sca_asym_p256_ecdh_out_t, CRYPTOLIBSCAASYM_P256_ECDH_OUT);
+
+#define CRYPTOLIBSCAASYM_P256_SIGN_IN(field, string) \
+    field(scalar, uint8_t, P256_CMD_BYTES) \
+    field(pubx, uint8_t, P256_CMD_BYTES) \
+    field(puby, uint8_t, P256_CMD_BYTES) \
+    field(message, uint8_t, P256_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256SignIn, cryptolib_sca_asym_p256_sign_in_t, CRYPTOLIBSCAASYM_P256_SIGN_IN);
+
+#define CRYPTOLIBSCAASYM_P256_SIGN_OUT(field, string) \
+    field(r, uint8_t, P256_CMD_BYTES) \
+    field(s, uint8_t, P256_CMD_BYTES) \
+    field(pubx, uint8_t, P256_CMD_BYTES) \
+    field(puby, uint8_t, P256_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP256SignOut, cryptolib_sca_asym_p256_sign_out_t, CRYPTOLIBSCAASYM_P256_SIGN_OUT);
+
+#define CRYPTOLIBSCAASYM_P384_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384BaseMulIn, cryptolib_sca_asym_p384_base_mul_in_t, CRYPTOLIBSCAASYM_P384_BASE_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_P384_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, P384_CMD_BYTES) \
+    field(y, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384BaseMulOut, cryptolib_sca_asym_p384_base_mul_out_t, CRYPTOLIBSCAASYM_P384_BASE_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_P384_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, P384_CMD_BYTES) \
+    field(scalar_bob, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384PointMulIn, cryptolib_sca_asym_p384_point_mul_in_t, CRYPTOLIBSCAASYM_P384_POINT_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_P384_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, P384_CMD_BYTES) \
+    field(y, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384PointMulOut, cryptolib_sca_asym_p384_point_mul_out_t, CRYPTOLIBSCAASYM_P384_POINT_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_P384_ECDH_IN(field, string) \
+    field(private_key, uint8_t, P384_CMD_BYTES) \
+    field(public_x, uint8_t, P384_CMD_BYTES) \
+    field(public_y, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384EcdhIn, cryptolib_sca_asym_p384_ecdh_in_t, CRYPTOLIBSCAASYM_P384_ECDH_IN);
+
+#define CRYPTOLIBSCAASYM_P384_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384EcdhOut, cryptolib_sca_asym_p384_ecdh_out_t, CRYPTOLIBSCAASYM_P384_ECDH_OUT);
+
+#define CRYPTOLIBSCAASYM_P384_SIGN_IN(field, string) \
+    field(scalar, uint8_t, P384_CMD_BYTES) \
+    field(pubx, uint8_t, P384_CMD_BYTES) \
+    field(puby, uint8_t, P384_CMD_BYTES) \
+    field(message, uint8_t, P384_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384SignIn, cryptolib_sca_asym_p384_sign_in_t, CRYPTOLIBSCAASYM_P384_SIGN_IN);
+
+#define CRYPTOLIBSCAASYM_P384_SIGN_OUT(field, string) \
+    field(r, uint8_t, P384_CMD_BYTES) \
+    field(s, uint8_t, P384_CMD_BYTES) \
+    field(pubx, uint8_t, P384_CMD_BYTES) \
+    field(puby, uint8_t, P384_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymP384SignOut, cryptolib_sca_asym_p384_sign_out_t, CRYPTOLIBSCAASYM_P384_SIGN_OUT);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1BaseMulIn, cryptolib_sca_asym_secp256k1_base_mul_in_t, CRYPTOLIBSCAASYM_SECP256K1_BASE_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1BaseMulOut, cryptolib_sca_asym_secp256k1_base_mul_out_t, CRYPTOLIBSCAASYM_SECP256K1_BASE_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, SECP256K1_CMD_BYTES) \
+    field(scalar_bob, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1PointMulIn, cryptolib_sca_asym_secp256k1_point_mul_in_t, CRYPTOLIBSCAASYM_SECP256K1_POINT_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1PointMulOut, cryptolib_sca_asym_secp256k1_point_mul_out_t, CRYPTOLIBSCAASYM_SECP256K1_POINT_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_ECDH_IN(field, string) \
+    field(private_key, uint8_t, SECP256K1_CMD_BYTES) \
+    field(public_x, uint8_t, SECP256K1_CMD_BYTES) \
+    field(public_y, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1EcdhIn, cryptolib_sca_asym_secp256k1_ecdh_in_t, CRYPTOLIBSCAASYM_SECP256K1_ECDH_IN);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1EcdhOut, cryptolib_sca_asym_secp256k1_ecdh_out_t, CRYPTOLIBSCAASYM_SECP256K1_ECDH_OUT);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_SIGN_IN(field, string) \
+    field(scalar, uint8_t, SECP256K1_CMD_BYTES) \
+    field(message, uint8_t, SECP256K1_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1SignIn, cryptolib_sca_asym_secp256k1_sign_in_t, CRYPTOLIBSCAASYM_SECP256K1_SIGN_IN);
+
+#define CRYPTOLIBSCAASYM_SECP256K1_SIGN_OUT(field, string) \
+    field(r, uint8_t, SECP256K1_CMD_BYTES) \
+    field(s, uint8_t, SECP256K1_CMD_BYTES) \
+    field(pubx, uint8_t, SECP256K1_CMD_BYTES) \
+    field(puby, uint8_t, SECP256K1_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymSECP256K1SignOut, cryptolib_sca_asym_secp256k1_sign_out_t, CRYPTOLIBSCAASYM_SECP256K1_SIGN_OUT);
+
+#define CRYPTOLIBSCAASYM_X25519_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519BaseMulIn, cryptolib_sca_asym_x25519_base_mul_in_t, CRYPTOLIBSCAASYM_X25519_BASE_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_X25519_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, X25519_CMD_BYTES) \
+    field(y, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519BaseMulOut, cryptolib_sca_asym_x25519_base_mul_out_t, CRYPTOLIBSCAASYM_X25519_BASE_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_X25519_POINT_MUL_IN(field, string) \
+    field(scalar_alice, uint8_t, X25519_CMD_BYTES) \
+    field(scalar_bob, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519PointMulIn, cryptolib_sca_asym_x25519_point_mul_in_t, CRYPTOLIBSCAASYM_X25519_POINT_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_X25519_POINT_MUL_OUT(field, string) \
+    field(x, uint8_t, X25519_CMD_BYTES) \
+    field(y, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519PointMulOut, cryptolib_sca_asym_x25519_point_mul_out_t, CRYPTOLIBSCAASYM_X25519_POINT_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_X25519_ECDH_IN(field, string) \
+    field(private_key, uint8_t, X25519_CMD_BYTES) \
+    field(public_x, uint8_t, X25519_CMD_BYTES) \
+    field(public_y, uint8_t, X25519_CMD_BYTES) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519EcdhIn, cryptolib_sca_asym_x25519_ecdh_in_t, CRYPTOLIBSCAASYM_X25519_ECDH_IN);
+
+#define CRYPTOLIBSCAASYM_X25519_ECDH_OUT(field, string) \
+    field(shared_key, uint8_t, X25519_CMD_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymX25519EcdhOut, cryptolib_sca_asym_x25519_ecdh_out_t, CRYPTOLIBSCAASYM_X25519_ECDH_OUT);
+
+#define CRYPTOLIBSCAASYM_ED25519_BASE_MUL_IN(field, string) \
+    field(scalar, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymED25519BaseMulIn, cryptolib_sca_asym_ed25519_base_mul_in_t, CRYPTOLIBSCAASYM_ED25519_BASE_MUL_IN);
+
+#define CRYPTOLIBSCAASYM_ED25519_BASE_MUL_OUT(field, string) \
+    field(x, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(y, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymED25519BaseMulOut, cryptolib_sca_asym_ed25519_base_mul_out_t, CRYPTOLIBSCAASYM_ED25519_BASE_MUL_OUT);
+
+#define CRYPTOLIBSCAASYM_ED25519_SIGN_IN(field, string) \
+    field(scalar, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(message, uint8_t, ED25519_CMD_MAX_MSG_BYTES) \
+    field(message_len, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymED25519SignIn, cryptolib_sca_asym_ed25519_sign_in_t, CRYPTOLIBSCAASYM_ED25519_SIGN_IN);
+
+#define CRYPTOLIBSCAASYM_ED25519_SIGN_OUT(field, string) \
+    field(r, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(s, uint8_t, ED25519_CMD_SIG_BYTES) \
+    field(pubx, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(puby, uint8_t, ED25519_CMD_SCALAR_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaAsymED25519SignOut, cryptolib_sca_asym_ed25519_sign_out_t, CRYPTOLIBSCAASYM_ED25519_SIGN_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_ASYM_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.c b/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.c
new file mode 100644
index 0000000000000..fb05c8438d040
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "cryptolib_sca_sym_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h b/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h
new file mode 100644
index 0000000000000..98694750fdb17
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/cryptolib_sca_sym_commands.h
@@ -0,0 +1,190 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_SYM_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_SYM_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define AES_CMD_MAX_MSG_BYTES 64
+#define AES_CMD_MAX_KEY_BYTES 32
+#define AES_CMD_MAX_BLOCK_BYTES 16
+
+#define TDES_CMD_MAX_MSG_BYTES 64
+#define TDES_CMD_MAX_KEY_BYTES 21
+#define TDES_CMD_MAX_BLOCK_BYTES 8
+
+#define HMAC_CMD_MAX_MSG_BYTES 64
+#define HMAC_CMD_MAX_KEY_BYTES 192
+#define HMAC_CMD_MAX_TAG_BYTES 64
+
+#define DRBG_CMD_MAX_ENTROPY_BYTES 32
+#define DRBG_CMD_MAX_NONCE_BYTES 16
+#define DRBG_CMD_MAX_OUTPUT_BYTES 256
+
+// clang-format off
+
+#define CRYPTOLIBSCASYM_SUBCOMMAND(_, value) \
+    value(_, AesFvsrPlaintext) \
+    value(_, AesFvsrKey) \
+    value(_, AesDaisy) \
+    value(_, CmacFvsrPlaintext) \
+    value(_, CmacFvsrKey) \
+    value(_, CmacDaisy) \
+    value(_, GcmFvsrPlaintext) \
+    value(_, GcmFvsrKey) \
+    value(_, GcmDaisy) \
+    value(_, TdesFvsrPlaintext) \
+    value(_, TdesFvsrKey) \
+    value(_, TdesDaisy) \
+    value(_, HmacFvsrPlaintext) \
+    value(_, HmacFvsrKey) \
+    value(_, HmacDaisy) \
+    value(_, DrbgGenerateBatch) \
+    value(_, DrbgReseed) \
+    value(_, Init)
+C_ONLY(UJSON_SERDE_ENUM(CryptoLibScaSymSubcommand, cryptolib_sca_sym_subcommand_t, CRYPTOLIBSCASYM_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(CryptoLibScaSymSubcommand, cryptolib_sca_sym_subcommand_t, CRYPTOLIBSCASYM_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOLIBSCASYM_AES_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(op_enc, bool) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymAesIn, cryptolib_sca_sym_aes_in_t, CRYPTOLIBSCASYM_AES_IN);
+
+#define CRYPTOLIBSCASYM_AES_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymAesOut, cryptolib_sca_sym_aes_out_t, CRYPTOLIBSCASYM_AES_OUT);
+
+#define CRYPTOLIBSCASYM_CMAC_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymCmacIn, cryptolib_sca_sym_cmac_in_t, CRYPTOLIBSCASYM_CMAC_IN);
+
+#define CRYPTOLIBSCASYM_CMAC_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymCmacOut, cryptolib_sca_sym_cmac_out_t, CRYPTOLIBSCASYM_CMAC_OUT);
+
+#define CRYPTOLIBSCASYM_GCM_IN(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(aad, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(aad_len, size_t) \
+    field(key, uint8_t, AES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, AES_CMD_MAX_BLOCK_BYTES) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymGcmIn, cryptolib_sca_sym_gcm_in_t, CRYPTOLIBSCASYM_GCM_IN);
+
+#define CRYPTOLIBSCASYM_GCM_OUT(field, string) \
+    field(data, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(data_len, uint32_t) \
+    field(tag, uint8_t, AES_CMD_MAX_MSG_BYTES) \
+    field(tag_len, uint32_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymGcmOut, cryptolib_sca_sym_gcm_out_t, CRYPTOLIBSCASYM_GCM_OUT);
+
+#define CRYPTOLIBSCASYM_TDES_IN(field, string) \
+    field(data, uint8_t, TDES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, TDES_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(iv, uint8_t, TDES_CMD_MAX_BLOCK_BYTES) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(op_enc, bool) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymTdesIn, cryptolib_sca_sym_tdes_in_t, CRYPTOLIBSCASYM_TDES_IN);
+
+#define CRYPTOLIBSCASYM_TDES_OUT(field, string) \
+    field(data, uint8_t, TDES_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymTdesOut, cryptolib_sca_sym_tdes_out_t, CRYPTOLIBSCASYM_TDES_OUT);
+
+#define CRYPTOLIBSCASYM_HMAC_IN(field, string) \
+    field(data, uint8_t, HMAC_CMD_MAX_MSG_BYTES) \
+    field(data_len, size_t) \
+    field(key, uint8_t, HMAC_CMD_MAX_KEY_BYTES) \
+    field(key_len, size_t) \
+    field(padding, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymHmacIn, cryptolib_sca_sym_hmac_in_t, CRYPTOLIBSCASYM_HMAC_IN);
+
+#define CRYPTOLIBSCASYM_HMAC_OUT(field, string) \
+    field(data, uint8_t, HMAC_CMD_MAX_TAG_BYTES) \
+    field(data_len, size_t) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymHmacOut, cryptolib_sca_sym_hmac_out_t, CRYPTOLIBSCASYM_HMAC_OUT);
+
+#define CRYPTOLIBSCASYM_DRBG_GENERATE_IN(field, string) \
+    field(data_len, size_t) \
+    field(nonce, uint8_t, DRBG_CMD_MAX_NONCE_BYTES) \
+    field(nonce_len, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(num_iterations, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymDrbgGenerateIn, cryptolib_sca_sym_drbg_generate_in_t, CRYPTOLIBSCASYM_DRBG_GENERATE_IN);
+
+#define CRYPTOLIBSCASYM_DRBG_RESEED_IN(field, string) \
+    field(entropy, uint8_t, DRBG_CMD_MAX_ENTROPY_BYTES) \
+    field(entropy_len, size_t) \
+    field(nonce, uint8_t, DRBG_CMD_MAX_NONCE_BYTES) \
+    field(nonce_len, size_t) \
+    field(reseed_interval, size_t) \
+    field(mode, size_t) \
+    field(cfg, size_t) \
+    field(trigger, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymDrbgReseedIn, cryptolib_sca_sym_drbg_reseed_in_t, CRYPTOLIBSCASYM_DRBG_RESEED_IN);
+
+#define CRYPTOLIBSCASYM_DRBG_GENERATE_OUT(field, string) \
+    field(data, uint8_t, DRBG_CMD_MAX_OUTPUT_BYTES) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymDrbgGenerateOut, cryptolib_sca_sym_drbg_generate_out_t, CRYPTOLIBSCASYM_DRBG_GENERATE_OUT);
+
+#define CRYPTOLIBSCASYM_DRBG_RESEED_OUT(field, string) \
+    field(status, size_t) \
+    field(cfg, size_t)
+UJSON_SERDE_STRUCT(CryptoLibScaSymDrbgReseedOut, cryptolib_sca_sym_drbg_reseed_out_t, CRYPTOLIBSCASYM_DRBG_RESEED_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_CRYPTOLIB_SCA_SYM_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/edn_sca_commands.c b/sw/device/tests/penetrationtests/json/edn_sca_commands.c
new file mode 100644
index 0000000000000..f1b03a63b79d6
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/edn_sca_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "edn_sca_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/edn_sca_commands.h b/sw/device/tests/penetrationtests/json/edn_sca_commands.h
new file mode 100644
index 0000000000000..8ce594478d987
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/edn_sca_commands.h
@@ -0,0 +1,34 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_EDN_SCA_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_EDN_SCA_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// clang-format off
+
+#define EDNSCA_SUBCOMMAND(_, value) \
+    value(_, Init) \
+    value(_, BusData) \
+    value(_, BusDataBatch)
+C_ONLY(UJSON_SERDE_ENUM(EdnScaSubcommand, edn_sca_subcommand_t, EDNSCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(EdnScaSubcommand, edn_sca_subcommand_t, EDNSCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define EDNSCA_RESULT(field, string) \
+    field(rnd_data, uint32_t, 4)
+UJSON_SERDE_STRUCT(EdnScaResult, edn_sca_result_t, EDNSCA_RESULT);
+
+#define EDNSCA_BATCH(field, string) \
+    field(num_iterations, uint32_t)
+UJSON_SERDE_STRUCT(EdnScaBatch, edn_sca_batch_t, EDNSCA_BATCH);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_EDN_SCA_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/extclk_sca_fi_commands.h b/sw/device/tests/penetrationtests/json/extclk_sca_fi_commands.h
index 015d1201d569b..9c7dd6c3c9e23 100644
--- a/sw/device/tests/penetrationtests/json/extclk_sca_fi_commands.h
+++ b/sw/device/tests/penetrationtests/json/extclk_sca_fi_commands.h
@@ -20,7 +20,7 @@ UJSON_SERDE_ENUM(ExtClkScaFiSubcommand, extclk_sca_fi_subcommand_t, EXTCLK_SCA_F
 #define EXTCLK_SCA_FI_CFG(field, string) \
     field(sel, bool) \
     field(hi_speed_sel, bool)
-UJSON_SERDE_STRUCT(CryptotestExtClkScaFiCfg, cryptotest_extclk_sca_fi_cfg_t, EXTCLK_SCA_FI_CFG);
+UJSON_SERDE_STRUCT(PenetrationtestExtClkScaFiCfg, penetrationtest_extclk_sca_fi_cfg_t, EXTCLK_SCA_FI_CFG);
 
 // clang-format on
 
diff --git a/sw/device/tests/penetrationtests/json/hmac_sca_commands.c b/sw/device/tests/penetrationtests/json/hmac_sca_commands.c
new file mode 100644
index 0000000000000..656cfedae3fce
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/hmac_sca_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "hmac_sca_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/hmac_sca_commands.h b/sw/device/tests/penetrationtests/json/hmac_sca_commands.h
new file mode 100644
index 0000000000000..98e1034de4bf7
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/hmac_sca_commands.h
@@ -0,0 +1,55 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_HMAC_SCA_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_HMAC_SCA_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define HMACSCA_CMD_MAX_MESSAGE_BYTES 16
+#define HMACSCA_CMD_MAX_KEY_BYTES 32
+#define HMACSCA_CMD_MAX_TAG_BYTES 32
+
+// clang-format off
+
+#define HMACSCA_SUBCOMMAND(_, value) \
+    value(_, Init) \
+    value(_, BatchFvsr) \
+    value(_, BatchRandom) \
+    value(_, BatchDaisy) \
+    value(_, Single)
+C_ONLY(UJSON_SERDE_ENUM(HmacScaSubcommand, hmac_sca_subcommand_t, HMACSCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(HmacScaSubcommand, hmac_sca_subcommand_t, HMACSCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define HMACSCA_TRIGGERS(field, string) \
+    field(start_trigger, bool) \
+    field(msg_trigger, bool) \
+    field(process_trigger, bool) \
+    field(finish_trigger, bool)
+UJSON_SERDE_STRUCT(PenetrationtestHmacScaTriggers, penetrationtest_hmac_sca_triggers_t, HMACSCA_TRIGGERS);
+
+#define HMACSCA_MESSAGE(field, string) \
+    field(message, uint8_t, HMACSCA_CMD_MAX_MESSAGE_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestHmacScaMessage, penetrationtest_hmac_sca_message_t, HMACSCA_MESSAGE);
+
+#define HMACSCA_KEY(field, string) \
+    field(key, uint8_t, HMACSCA_CMD_MAX_KEY_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestHmacScaKey, penetrationtest_hmac_sca_key_t, HMACSCA_KEY);
+
+#define HMACSCA_TAG(field, string) \
+    field(tag, uint8_t, HMACSCA_CMD_MAX_TAG_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestHmacScaTag, penetrationtest_hmac_sca_tag_t, HMACSCA_TAG);
+
+#define HMACSCA_NUM_IT(field, string) \
+    field(num_iterations, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestHmacScaNumIt, penetrationtest_hmac_sca_num_it_t, HMACSCA_NUM_IT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_HMAC_SCA_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/ibex_fi_commands.h b/sw/device/tests/penetrationtests/json/ibex_fi_commands.h
index 19104168d18fe..ed619655b17a1 100644
--- a/sw/device/tests/penetrationtests/json/ibex_fi_commands.h
+++ b/sw/device/tests/penetrationtests/json/ibex_fi_commands.h
@@ -9,49 +9,166 @@
 extern "C" {
 #endif
 
+#define IBEXFI_NUM_REGS 32
+#define IBEXFI_SRAM_WORDS 64
+#define IBEXFI_MAX_FAULTY_ADDRESSES_DATA 13
+#define IBEXFI_MAX_RESULT_ARRAY 12
+#define IBEXFI_NUM_CSR_COMBI 17
+
 // clang-format off
 
 #define IBEXFI_SUBCOMMAND(_, value) \
-    value(_, InitTrigger) \
-    value(_, CharUnrolledRegOpLoop) \
-    value(_, CharRegOpLoop) \
-    value(_, CharUnrolledMemOpLoop) \
+    value(_, AddressTranslation) \
+    value(_, AddressTranslationCfg) \
+    value(_, CharAddiSingleBeq) \
+    value(_, CharAddiSingleBeqCm) \
+    value(_, CharAddiSingleBeqCm2) \
+    value(_, CharAddiSingleBeqNeg) \
+    value(_, CharAddiSingleBne) \
+    value(_, CharAddiSingleBneNeg) \
+    value(_, CharCombi) \
+    value(_, CharCondBranchBeq) \
+    value(_, CharCondBranchBge) \
+    value(_, CharCondBranchBgeu) \
+    value(_, CharCondBranchBlt) \
+    value(_, CharCondBranchBltu) \
+    value(_, CharCondBranchBne) \
+    value(_, CharCsrRead) \
+    value(_, CharCsrWrite) \
+    value(_, CharCsrCombi) \
+    value(_, CharFlashRead) \
+    value(_, CharFlashWrite) \
+    value(_, CharHardenedCheckComplementBranch) \
+    value(_, CharHardenedCheckUnimp) \
+    value(_, CharHardenedCheck2Unimps) \
+    value(_, CharHardenedCheck3Unimps) \
+    value(_, CharHardenedCheck4Unimps) \
+    value(_, CharHardenedCheck5Unimps) \
     value(_, CharMemOpLoop) \
     value(_, CharRegisterFile) \
     value(_, CharRegisterFileRead) \
-    value(_, CharCondBranch) \
-    value(_, CharUncondBranch) \
-    value(_, CharSramWrite) \
+    value(_, CharRegOpLoop) \
+    value(_, CharSingleBeq) \
+    value(_, CharSingleBne) \
     value(_, CharSramRead) \
-    value(_, CharFlashWrite) \
-    value(_, CharFlashRead) \
-    value(_, CharCsrRead) \
-    value(_, CharCsrWrite) \
-    value(_, AddressTranslationCfg) \
-    value(_, AddressTranslation)
-UJSON_SERDE_ENUM(IbexFiSubcommand, ibex_fi_subcommand_t, IBEXFI_SUBCOMMAND);
+    value(_, CharSramReadRet) \
+    value(_, CharSramStatic) \
+    value(_, CharSramWrite) \
+    value(_, CharSramWriteRead) \
+    value(_, CharSramWriteReadAlt) \
+    value(_, CharSramWriteStaticUnrolled) \
+    value(_, CharUncondBranch) \
+    value(_, CharUncondBranchNop) \
+    value(_, CharUnrolledMemOpLoop) \
+    value(_, CharUnrolledRegOpLoop) \
+    value(_, CharUnrolledRegOpLoopChain) \
+    value(_, Init) \
+    value(_, OtpDataRead) \
+    value(_, OtpReadLock) \
+    value(_, OtpWriteLock)
+C_ONLY(UJSON_SERDE_ENUM(IbexFiSubcommand, ibex_fi_subcommand_t, IBEXFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(IbexFiSubcommand, ibex_fi_subcommand_t, IBEXFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define IBEXFI_TEST_RESULT(field, string) \
     field(result, uint32_t) \
-    field(err_status, uint32_t)
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
 UJSON_SERDE_STRUCT(IbexFiTestResult, ibex_fi_test_result_t, IBEXFI_TEST_RESULT);
 
+#define IBEXFI_TEST_RESULT_ARRAY(field, string) \
+    field(result, uint32_t, IBEXFI_MAX_RESULT_ARRAY) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiTestResultArray, ibex_fi_test_result_array_t, IBEXFI_TEST_RESULT_ARRAY);
+
+#define IBEXFI_TEST_RESULT_SRAM(field, string) \
+    field(memory, uint32_t, IBEXFI_SRAM_WORDS) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiTestResultSram, ibex_fi_test_result_sram_t, IBEXFI_TEST_RESULT_SRAM);
+
 #define IBEXFI_TEST_RESULT_MULT(field, string) \
     field(result1, uint32_t) \
     field(result2, uint32_t) \
-    field(err_status, uint32_t)
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
 UJSON_SERDE_STRUCT(IbexFiTestResultMult, ibex_fi_test_result_mult_t, IBEXFI_TEST_RESULT_MULT);
 
-#define IBEXFI_LOOP_COUNTER_OUTPUT(field, string) \
-    field(loop_counter, uint32_t) \
-    field(err_status, uint32_t)
-UJSON_SERDE_STRUCT(IbexFiLoopCounterOutput, ibex_fi_loop_counter_t, IBEXFI_LOOP_COUNTER_OUTPUT);
+#define IBEXFI_FAULTY_DATA(field, string) \
+    field(err_status, uint32_t) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(data_faulty, bool, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(data, uint32_t, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiFaultyData, ibex_fi_faulty_data_t, IBEXFI_FAULTY_DATA);
+
+#define IBEXFI_FAULTY_DATA_SRAM_CODES(field, string) \
+    field(sram_err_status, uint32_t) \
+    field(err_status, uint32_t) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(data_faulty, bool, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(data, uint32_t, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiFaultyDataSramCodes, ibex_fi_faulty_data_sram_codes_t, IBEXFI_FAULTY_DATA_SRAM_CODES);
+
+#define IBEXFI_FAULTY_ADDRESS_DATA(field, string) \
+    field(err_status, uint32_t) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(addresses, uint32_t, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(data, uint32_t, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiFaultyAddressData, ibex_fi_faulty_addresses_data_t, IBEXFI_FAULTY_ADDRESS_DATA);
+
+#define IBEXFI_RF_DUMP(field, string) \
+    field(registers, uint32_t, IBEXFI_NUM_REGS) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiRfDump, ibex_fi_rf_dump_t, IBEXFI_RF_DUMP);
+
+#define IBEXFI_FLASH_REGION(field, string) \
+    field(flash_region, uint32_t)
+UJSON_SERDE_STRUCT(IbexFiFlashRegion, ibex_fi_flash_region_t, IBEXFI_FLASH_REGION);
+
+#define IBEXFI_COMBI_DATA(field, string) \
+    field(registers_test_1, uint32_t, IBEXFI_NUM_REGS) \
+    field(data_faulty_test_1, bool, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(data_test_1, uint32_t, IBEXFI_MAX_FAULTY_ADDRESSES_DATA) \
+    field(registers_test_2, uint32_t, IBEXFI_NUM_REGS) \
+    field(result_test_2, uint32_t) \
+    field(registers_test_3, uint32_t, IBEXFI_NUM_REGS) \
+    field(result_test_3, uint32_t) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(IbexFiCombiData, ibex_fi_combi_data_t, IBEXFI_COMBI_DATA);
+
+#define IBEXFI_CSR_COMBI_IN(field, string) \
+    field(trigger, uint32_t) \
+    field(ref_values, uint32_t, IBEXFI_NUM_CSR_COMBI)
+UJSON_SERDE_STRUCT(IbexFiCsrCombiIn, ibex_fi_csr_combi_in_t, IBEXFI_CSR_COMBI_IN);
+
+#define IBEXFI_CSR_COMBI_OUT(field, string) \
+    field(err_status, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2) \
+    field(data_faulty, bool, IBEXFI_NUM_CSR_COMBI) \
+    field(output, uint32_t, IBEXFI_NUM_CSR_COMBI)
+UJSON_SERDE_STRUCT(IbexFiCsrCombiOut, ibex_fi_csr_combi_out_t, IBEXFI_CSR_COMBI_OUT);
 
-#define IBEXFI_LOOP_COUNTER_MIRRORED_OUTPUT(field, string) \
-    field(loop_counter1, uint32_t) \
-    field(loop_counter2, uint32_t) \
-    field(err_status, uint32_t)
-UJSON_SERDE_STRUCT(IbexFiLoopCounterMirroredOutput, ibex_fi_loop_counter_mirrored_t, IBEXFI_LOOP_COUNTER_MIRRORED_OUTPUT);
+#define IBEXFI_EMPTY(field, string) \
+    field(success, bool)
+UJSON_SERDE_STRUCT(IbexFiEmpty, ibex_fi_empty_t, IBEXFI_EMPTY);
 
 // clang-format on
 
diff --git a/sw/device/tests/penetrationtests/json/ibex_sca_commands.h b/sw/device/tests/penetrationtests/json/ibex_sca_commands.h
index e80430926f127..e555c5681be9f 100644
--- a/sw/device/tests/penetrationtests/json/ibex_sca_commands.h
+++ b/sw/device/tests/penetrationtests/json/ibex_sca_commands.h
@@ -13,15 +13,29 @@ extern "C" {
 
 #define IBEXSCA_SUBCOMMAND(_, value) \
     value(_, Init) \
+    value(_, CombiOperationsBatchFvsr) \
+    value(_, CombiOperationsBatch) \
+    value(_, KeySideloading) \
     value(_, RFRead) \
+    value(_, RFReadBatchFvsr) \
+    value(_, RFReadBatchRandom) \
     value(_, RFWrite) \
+    value(_, RFWriteBatchFvsr) \
+    value(_, RFWriteBatchRandom) \
     value(_, TLRead) \
+    value(_, TLReadBatchFvsr) \
+    value(_, TLReadBatchFvsrFixAddress) \
+    value(_, TLReadBatchRandom) \
+    value(_, TLReadBatchRandomFixAddress) \
     value(_, TLWrite) \
-    value(_, KeySideloading)
-UJSON_SERDE_ENUM(IbexScaSubcommand, ibex_sca_subcommand_t, IBEXSCA_SUBCOMMAND);
+    value(_, TLWriteBatchFvsr) \
+    value(_, TLWriteBatchFvsrFixAddress) \
+    value(_, TLWriteBatchRandom) \
+    value(_, TLWriteBatchRandomFixAddress)
+C_ONLY(UJSON_SERDE_ENUM(IbexScaSubcommand, ibex_sca_subcommand_t, IBEXSCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(IbexScaSubcommand, ibex_sca_subcommand_t, IBEXSCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define IBEXSCA_TEST_DATA(field, string) \
-    field(num_iterations, uint32_t) \
     field(data, uint32_t, 8)
 UJSON_SERDE_STRUCT(IbexScaTestData, ibex_sca_test_data_t, IBEXSCA_TEST_DATA);
 
@@ -34,10 +48,30 @@ UJSON_SERDE_STRUCT(IbexScaSalt, ibex_sca_salt_t, IBEXSCA_SALT);
     field(share1, uint32_t, 8)
 UJSON_SERDE_STRUCT(IbexScaKey, ibex_sca_key_t, IBEXSCA_KEY);
 
+#define IBEXSCA_TEST_FVSR(field, string) \
+    field(num_iterations, uint32_t) \
+    field(fixed_data, uint32_t)
+UJSON_SERDE_STRUCT(IbexScaTestFvsr, ibex_sca_test_fvsr_t, IBEXSCA_TEST_FVSR);
+
 #define IBEXSCA_RESULT(field, string) \
     field(result, uint32_t)
 UJSON_SERDE_STRUCT(IbexScaResult, ibex_sca_result_t, IBEXSCA_RESULT);
 
+#define IBEXSCA_BATCH(field, string) \
+    field(num_iterations, uint32_t)
+UJSON_SERDE_STRUCT(IbexScaBatch, ibex_sca_batch_t, IBEXSCA_BATCH);
+
+#define IBEXSCA_TEST_BATCH_OPS(field, string) \
+    field(num_iterations, uint32_t) \
+    field(trigger, uint32_t) \
+    field(fixed_data1, uint32_t) \
+    field(fixed_data2, uint32_t)
+UJSON_SERDE_STRUCT(IbexScaTestBatchOps, ibex_sca_test_batch_ops_t, IBEXSCA_TEST_BATCH_OPS);
+
+#define IBEXSCA_OPS_RESULT(field, string) \
+    field(result, uint32_t, 12)
+UJSON_SERDE_STRUCT(IbexScaOpsResult, ibex_sca_ops_result_t, IBEXSCA_OPS_RESULT);
+
 // clang-format on
 
 #ifdef __cplusplus
diff --git a/sw/device/tests/penetrationtests/json/kmac_sca_commands.h b/sw/device/tests/penetrationtests/json/kmac_sca_commands.h
index 5e16c7e7fbd86..75750d92c068d 100644
--- a/sw/device/tests/penetrationtests/json/kmac_sca_commands.h
+++ b/sw/device/tests/penetrationtests/json/kmac_sca_commands.h
@@ -10,8 +10,9 @@ extern "C" {
 #endif
 
 #define KMACSCA_CMD_MAX_BATCH_DIGEST_BYTES 32
+#define KMACSCA_CMD_MAX_DIGEST_BYTES 16
 #define KMACSCA_CMD_MAX_DATA_BYTES 16
-#define KMACSCA_CMD_MAX_KEY_BYTES 16
+#define KMACSCA_CMD_MAX_KEY_BYTES 32
 #define KMACSCA_CMD_MAX_LFSR_BYTES 4
 #define KMACSCA_CMD_MAX_MSG_BYTES 16
 
@@ -22,9 +23,11 @@ extern "C" {
     value(_, SetKey) \
     value(_, SingleAbsorb) \
     value(_, Batch) \
+    value(_, BatchDaisy) \
     value(_, FixedKeySet) \
     value(_, SeedLfsr)
-UJSON_SERDE_ENUM(KmacScaSubcommand, kmac_sca_subcommand_t, KMAC_SCA_SUBCOMMAND);
+C_ONLY(UJSON_SERDE_ENUM(KmacScaSubcommand, kmac_sca_subcommand_t, KMAC_SCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(KmacScaSubcommand, kmac_sca_subcommand_t, KMAC_SCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define KMAC_SCA_KEY(field, string) \
     field(key, uint8_t, KMACSCA_CMD_MAX_KEY_BYTES) \
@@ -52,6 +55,10 @@ UJSON_SERDE_STRUCT(CryptotestKmacScaMsg, cryptotest_kmac_sca_msg_t, KMAC_SCA_MSG
     field(batch_digest, uint8_t, KMACSCA_CMD_MAX_BATCH_DIGEST_BYTES)
 UJSON_SERDE_STRUCT(CryptotestKmacScaBatchDigest, cryptotest_kmac_sca_batch_digest_t, KMAC_SCA_BATCH_DIGEST);
 
+#define KMAC_SCA_DIGEST(field, string) \
+    field(digest, uint8_t, KMACSCA_CMD_MAX_DIGEST_BYTES)
+UJSON_SERDE_STRUCT(CryptotestKmacScaDigest, cryptotest_kmac_sca_digest_t, KMAC_SCA_DIGEST);
+
 // clang-format on
 
 #ifdef __cplusplus
diff --git a/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.c b/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.c
new file mode 100644
index 0000000000000..f9c3821e35f05
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "lc_ctrl_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.h b/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.h
new file mode 100644
index 0000000000000..dfd61ee1b1f3d
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/lc_ctrl_fi_commands.h
@@ -0,0 +1,34 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_LC_CTRL_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_LC_CTRL_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// clang-format off
+
+#define LCCTRLFI_SUBCOMMAND(_, value) \
+    value(_, Init) \
+    value(_, RuntimeCorruption)
+C_ONLY(UJSON_SERDE_ENUM(LcCtrlFiSubcommand, lc_ctrl_fi_subcommand_t, LCCTRLFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(LcCtrlFiSubcommand, lc_ctrl_fi_subcommand_t, LCCTRLFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define LCCTRLFI_CORRUPTION(field, string) \
+    field(res, uint32_t) \
+    field(state, uint32_t) \
+    field(counter, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(LcCtrlFiCorruption, lc_ctrl_fi_corruption_t, LCCTRLFI_CORRUPTION);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_LC_CTRL_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/otbn_fi_commands.h b/sw/device/tests/penetrationtests/json/otbn_fi_commands.h
index d6311976dcf73..cfbf3fded97c6 100644
--- a/sw/device/tests/penetrationtests/json/otbn_fi_commands.h
+++ b/sw/device/tests/penetrationtests/json/otbn_fi_commands.h
@@ -12,18 +12,138 @@ extern "C" {
 // clang-format off
 
 #define OTBNFI_SUBCOMMAND(_, value) \
-    value(_, InitTrigger) \
-    value(_, CharUnrolledRegOpLoop) \
-    value(_, CharUnrolledDmemOpLoop) \
+    value(_, CharBeq) \
+    value(_, CharBnRshi) \
+    value(_, CharBnSel) \
+    value(_, CharBnWsrr) \
+    value(_, CharBne) \
+    value(_, CharDmemAccess) \
+    value(_, CharDmemWrite) \
+    value(_, CharHardwareDmemOpLoop) \
     value(_, CharHardwareRegOpLoop) \
-    value(_, CharHardwareDmemOpLoop)
-UJSON_SERDE_ENUM(OtbnFiSubcommand, otbn_fi_subcommand_t, OTBNFI_SUBCOMMAND);
+    value(_, CharJal) \
+    value(_, CharLw) \
+    value(_, CharMem) \
+    value(_, CharRF) \
+    value(_, CharUnrolledDmemOpLoop) \
+    value(_, CharUnrolledRegOpLoop) \
+    value(_, Init) \
+    value(_, InitKeyMgr) \
+    value(_, KeySideload)  \
+    value(_, LoadIntegrity) \
+    value(_, PC)
+C_ONLY(UJSON_SERDE_ENUM(OtbnFiSubcommand, otbn_fi_subcommand_t, OTBNFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(OtbnFiSubcommand, otbn_fi_subcommand_t, OTBNFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define OTBNFI_LOOP_COUNTER_OUTPUT(field, string) \
     field(loop_counter, uint32_t) \
-    field(err_status, uint32_t)
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
 UJSON_SERDE_STRUCT(OtbnFiLoopCounterOutput, otbn_fi_loop_counter_t, OTBNFI_LOOP_COUNTER_OUTPUT);
 
+#define OTBNFI_RESULT_OUTPUT(field, string) \
+    field(result, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiResultOutput, otbn_fi_result_t, OTBNFI_RESULT_OUTPUT);
+
+#define OTBNFI_KEY_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(keys, uint32_t, 4) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiKeyOutput, otbn_fi_keys_t, OTBNFI_KEY_OUTPUT);
+
+#define OTBNFI_MEM_CFG(field, string) \
+    field(byte_offset, uint32_t) \
+    field(num_words, uint32_t) \
+    field(imem, bool) \
+    field(dmem, bool)
+UJSON_SERDE_STRUCT(OtbnFiMemCfg, otbn_fi_mem_cfg_t, OTBNFI_MEM_CFG);
+
+#define OTBNFI_MEM_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(imem_data, uint32_t, 8) \
+    field(imem_addr, uint32_t, 8) \
+    field(dmem_data, uint32_t, 8) \
+    field(dmem_addr, uint32_t, 8) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiMemOutput, otbn_fi_mem_t, OTBNFI_MEM_OUTPUT);
+
+#define OTBNFI_DATA_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(data, uint32_t, 256) \
+    field(insn_cnt, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiDataOutput, otbn_fi_data_t, OTBNFI_DATA_OUTPUT);
+
+#define OTBNFI_RF_CHAR_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(faulty_gpr, uint32_t, 29) \
+    field(faulty_wdr, uint32_t, 256) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiRfCharOutput, otbn_fi_rf_char_t, OTBNFI_RF_CHAR_OUTPUT);
+
+#define OTBNFI_RESULT_CNT_OUTPUT(field, string) \
+    field(result, uint32_t) \
+    field(insn_cnt, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiResultCntOutput, otbn_fi_result_cnt_t, OTBNFI_RESULT_CNT_OUTPUT);
+
+#define OTBNFI_RESULT_ARRAY(field, string) \
+    field(result, uint32_t, 32) \
+    field(insn_cnt, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiResultArray, otbn_fi_result_array_t, OTBNFI_RESULT_ARRAY);
+
+#define OTBNFI_BIG_NUM(field, string) \
+    field(big_num, uint32_t, 16)
+UJSON_SERDE_STRUCT(OtbnFiBigNum, otbn_fi_big_num_t, OTBNFI_BIG_NUM);
+
+#define OTBNFI_BIG_NUM_OUTPUT(field, string) \
+    field(big_num, uint32_t, 16) \
+    field(insn_cnt, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiBigNumOutput, otbn_fi_big_num_out_t, OTBNFI_BIG_NUM_OUTPUT);
+
+#define OTBNFI_PC(field, string) \
+    field(pc, uint32_t)
+UJSON_SERDE_STRUCT(OtbnFiPc, otbn_fi_pc_t, OTBNFI_PC);
+
+#define OTBNFI_PC_OUTPUT(field, string) \
+    field(pc_dmem, uint32_t) \
+    field(pc_otbn, uint32_t) \
+    field(insn_cnt, uint32_t) \
+    field(err_otbn, uint32_t) \
+    field(err_ibx, uint32_t) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtbnFiPcOutput, otbn_fi_pc_out_t, OTBNFI_PC_OUTPUT);
+
 // clang-format on
 
 #ifdef __cplusplus
diff --git a/sw/device/tests/penetrationtests/json/otbn_sca_commands.c b/sw/device/tests/penetrationtests/json/otbn_sca_commands.c
new file mode 100644
index 0000000000000..3647bf0cc04a1
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/otbn_sca_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "otbn_sca_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/otbn_sca_commands.h b/sw/device/tests/penetrationtests/json/otbn_sca_commands.h
new file mode 100644
index 0000000000000..c118b4902483f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/otbn_sca_commands.h
@@ -0,0 +1,119 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTBN_SCA_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTBN_SCA_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OTBNSCA_CMD_MAX_BATCH_DIGEST_BYTES 40
+#define OTBNSCA_CMD_MAX_SEED_BYTES 40
+
+// clang-format off
+
+// OTBN SCA arguments
+
+#define OTBNSCA_SUBCOMMAND(_, value) \
+    value(_, Ecc256EcdsaKeygenFvsrKeyBatch) \
+    value(_, Ecc256EcdsaKeygenFvsrSeedBatch) \
+    value(_, Ecc256EnMasks) \
+    value(_, Ecc256SetC) \
+    value(_, Ecc256SetSeed) \
+    value(_, EcdsaP256Sign) \
+    value(_, EcdsaP256SignBatch) \
+    value(_, EcdsaP256SignFvsrBatch) \
+    value(_, Init) \
+    value(_, InitKeyMgr) \
+    value(_, InsnCarryFlag) \
+    value(_, CombiOps) \
+    value(_, KeySideloadFvsr) \
+    value(_, Rsa512Decrypt)
+C_ONLY(UJSON_SERDE_ENUM(OtbnScaSubcommand, otbn_sca_subcommand_t, OTBNSCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(OtbnScaSubcommand, otbn_sca_subcommand_t, OTBNSCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define OTBN_SCA_EN_MASKS(field, string) \
+    field(en_masks, bool)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaEnMasks, penetrationtest_otbn_sca_en_masks_t, OTBN_SCA_EN_MASKS);
+
+#define OTBN_SCA_NUM_TRACES(field, string) \
+    field(num_traces, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaNumTraces, penetrationtest_otbn_sca_num_traces_t, OTBN_SCA_NUM_TRACES);
+
+#define OTBN_SCA_BATCH_DIGEST(field, string) \
+    field(batch_digest, uint8_t, OTBNSCA_CMD_MAX_BATCH_DIGEST_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaBatchDigest, penetrationtest_otbn_sca_batch_digest_t, OTBN_SCA_BATCH_DIGEST);
+
+#define OTBN_SCA_SEED(field, string) \
+    field(seed, uint8_t, OTBNSCA_CMD_MAX_SEED_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaSeed, penetrationtest_otbn_sca_seed_t, OTBN_SCA_SEED);
+
+#define OTBN_SCA_CONSTANT(field, string) \
+    field(constant, uint8_t, OTBNSCA_CMD_MAX_SEED_BYTES)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaConstant, penetrationtest_otbn_sca_constant_t, OTBN_SCA_CONSTANT);
+
+#define OTBN_SCA_KEY(field, string) \
+    field(shares, uint32_t, 4) \
+    field(keys, uint32_t, 2)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaKey, penetrationtest_otbn_sca_key_t, OTBN_SCA_KEY);
+
+#define OTBN_SCA_FIXED_SEED(field, string) \
+    field(fixed_seed, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaFixedKey, penetrationtest_otbn_sca_fixed_seed_t, OTBN_SCA_FIXED_SEED);
+
+#define OTBN_SCA_RSA512_DEC(field, string) \
+    field(modu, uint8_t, 64) \
+    field(exp, uint8_t, 64) \
+    field(msg, uint8_t, 64)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaRsa512Dec, penetrationtest_otbn_sca_rsa512_dec_t, OTBN_SCA_RSA512_DEC);
+
+#define OTBN_SCA_RSA512_DEC_OUT(field, string) \
+    field(out, uint8_t, 64)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaRsa512DecOut, penetrationtest_otbn_sca_rsa512_dec_out_t, OTBN_SCA_RSA512_DEC_OUT);
+
+#define OTBN_SCA_BIG_NUM(field, string) \
+    field(big_num, uint32_t, 8)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaBigNum, penetrationtest_otbn_sca_big_num_t, OTBN_SCA_BIG_NUM);
+
+#define OTBN_SCA_ECDSA_P256_SIGN(field, string) \
+    field(msg, uint32_t, 8) \
+    field(d0, uint32_t, 10) \
+    field(k0, uint32_t, 10)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaEcdsaP256Sign, penetrationtest_otbn_sca_ecdsa_p256_sign_t, OTBN_SCA_ECDSA_P256_SIGN);
+
+#define OTBN_SCA_ECDSA_P256_SIGNATURE(field, string) \
+    field(r, uint8_t, 32) \
+    field(s, uint8_t, 32)
+UJSON_SERDE_STRUCT(PenetrationtestOtbnScaEcdsaP256Signature, penetrationtest_otbn_sca_ecdsa_p256_signature_t, OTBN_SCA_ECDSA_P256_SIGNATURE);
+
+#define OTBN_SCA_TEST_BATCH_OPS(field, string) \
+    field(num_iterations, uint32_t) \
+    field(fixed_data1, uint32_t) \
+    field(fixed_data2, uint32_t) \
+    field(print_flag, bool) \
+    field(trigger, uint32_t)
+UJSON_SERDE_STRUCT(OtbnScaTestBatchOps, otbn_sca_test_batch_ops_t, OTBN_SCA_TEST_BATCH_OPS);
+
+#define OTBN_SCA_OPS_RESULT(field, string) \
+    field(result1, uint32_t, 8) \
+    field(result2, uint32_t, 8) \
+    field(result3, uint32_t, 8) \
+    field(result4, uint32_t, 8) \
+    field(result5, uint32_t, 8) \
+    field(result6, uint32_t, 8) \
+    field(result7, uint32_t, 8) \
+    field(result8, uint32_t)
+UJSON_SERDE_STRUCT(OtbnScaOpsResult, otbn_sca_ops_result_t, OTBN_SCA_OPS_RESULT);
+
+#define OTBN_SCA_EMPTY(field, string) \
+    field(success, bool)
+UJSON_SERDE_STRUCT(OtbnScaEmpty, otbn_sca_empty_t, OTBN_SCA_EMPTY);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTBN_SCA_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/otp_fi_commands.c b/sw/device/tests/penetrationtests/json/otp_fi_commands.c
new file mode 100644
index 0000000000000..fe3b09c64f04f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/otp_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "otp_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/otp_fi_commands.h b/sw/device/tests/penetrationtests/json/otp_fi_commands.h
new file mode 100644
index 0000000000000..d5efa868a4924
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/otp_fi_commands.h
@@ -0,0 +1,73 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTP_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTP_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define OTPFI_MAX_OWNER_SW_CFG_SIZE 200
+#define OTPFI_MAX_VENDOR_TEST_SIZE 16
+#define OTPFI_MAX_HW_CFG0_SIZE 20
+#define OTPFI_MAX_LC_SIZE 22
+
+// clang-format off
+
+#define OTPFI_SUBCOMMAND(_, value) \
+    value(_, HwCfg) \
+    value(_, Init) \
+    value(_, LifeCycle) \
+    value(_, OwnerSwCfg) \
+    value(_, VendorTest)
+C_ONLY(UJSON_SERDE_ENUM(OtpFiSubcommand, otp_fi_subcommand_t, OTPFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(OtpFiSubcommand, otp_fi_subcommand_t, OTPFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define OTPFI_VENDORTEST_PARTITION(field, string) \
+    field(partition_ref, uint32_t, OTPFI_MAX_VENDOR_TEST_SIZE) \
+    field(partition_fi, uint32_t, OTPFI_MAX_VENDOR_TEST_SIZE) \
+    field(data_faulty, bool, OTPFI_MAX_VENDOR_TEST_SIZE) \
+    field(otp_status_codes, uint32_t) \
+    field(otp_error_causes, uint8_t, 10) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtpFiVendortestPartition, otp_fi_vendortest_partition_t, OTPFI_VENDORTEST_PARTITION);
+
+#define OTPFI_OWNERSWCFG_PARTITION(field, string) \
+    field(partition_ref, uint32_t, OTPFI_MAX_OWNER_SW_CFG_SIZE) \
+    field(partition_fi, uint32_t, OTPFI_MAX_OWNER_SW_CFG_SIZE) \
+    field(data_faulty, bool, OTPFI_MAX_OWNER_SW_CFG_SIZE) \
+    field(otp_status_codes, uint32_t) \
+    field(otp_error_causes, uint8_t, 10) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtpFiOwnerswcfgPartition, otp_fi_ownerswcfg_partition_t, OTPFI_OWNERSWCFG_PARTITION);
+
+#define OTPFI_HWCFG_PARTITION(field, string) \
+    field(partition_ref, uint32_t, OTPFI_MAX_HW_CFG0_SIZE) \
+    field(partition_fi, uint32_t, OTPFI_MAX_HW_CFG0_SIZE) \
+    field(data_faulty, bool, OTPFI_MAX_HW_CFG0_SIZE) \
+    field(otp_status_codes, uint32_t) \
+    field(otp_error_causes, uint8_t, 10) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtpFiHwcfgPartition, otp_fi_hwcfg_partition_t, OTPFI_HWCFG_PARTITION);
+
+#define OTPFI_LIFECYCLE_PARTITION(field, string) \
+    field(partition_ref, uint32_t, OTPFI_MAX_LC_SIZE) \
+    field(partition_fi, uint32_t, OTPFI_MAX_LC_SIZE) \
+    field(data_faulty, bool, OTPFI_MAX_LC_SIZE) \
+    field(otp_status_codes, uint32_t) \
+    field(otp_error_causes, uint8_t, 10) \
+    field(alerts, uint32_t, 3) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(OtpFiLifecyclePartition, otp_fi_lifecycle_partition_t, OTPFI_LIFECYCLE_PARTITION);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_OTP_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/pentest_lib_commands.c b/sw/device/tests/penetrationtests/json/pentest_lib_commands.c
new file mode 100644
index 0000000000000..5f091557bbf19
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/pentest_lib_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "pentest_lib_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/pentest_lib_commands.h b/sw/device/tests/penetrationtests/json/pentest_lib_commands.h
new file mode 100644
index 0000000000000..422bc6b6cf82f
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/pentest_lib_commands.h
@@ -0,0 +1,119 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_PENTEST_LIB_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_PENTEST_LIB_COMMANDS_H_
+
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define MAX_ALERT_HANDLER_PARAM_N_ALERTS 65
+#define MAX_ALERT_HANDLER_PARAM_N_CLASSES 4
+#define MAX_SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS 11
+#define MAX_ALERT_HANDLER_PARAM_N_PHASES 4
+
+// clang-format off
+
+#define PENETRATIONTEST_DEVICE_INFO(field, string) \
+    field(device_id, uint32_t, 8) \
+    field(rom_digest, uint32_t, 8) \
+    field(icache_en, bool) \
+    field(dummy_instr_en, bool) \
+    field(clock_jitter_locked, bool) \
+    field(clock_jitter_en, bool) \
+    field(sram_main_readback_locked, bool) \
+    field(sram_main_readback_en, bool) \
+    field(sram_ret_readback_locked, bool) \
+    field(sram_ret_readback_en, bool) \
+    field(data_ind_timing_en, bool)
+UJSON_SERDE_STRUCT(PenetrationtestDeviceInfo, penetrationtest_device_info_t, PENETRATIONTEST_DEVICE_INFO);
+
+#define PENETRATIONTEST_CPUCTRL(field, string) \
+    field(enable_icache, bool) \
+    field(enable_dummy_instr, bool) \
+    field(dummy_instr_count, uint32_t) \
+    field(enable_jittery_clock, bool) \
+    field(enable_sram_readback, bool) \
+    field(enable_data_ind_timing, bool)
+UJSON_SERDE_STRUCT(PenetrationtesCpuctrl, penetrationtest_cpuctrl_t, PENETRATIONTEST_CPUCTRL);
+
+#define PENETRATIONTEST_SENSOR_CONFIG(field, string) \
+    field(sensor_ctrl_enable, bool) \
+    field(sensor_ctrl_en_fatal, bool, MAX_SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS)
+UJSON_SERDE_STRUCT(PenetrationtesSensorConfig, penetrationtest_sensor_config_t, PENETRATIONTEST_SENSOR_CONFIG);
+
+#define PENETRATIONTEST_ALERT_CONFIG(field, string) \
+    field(alert_classes, uint32_t, MAX_ALERT_HANDLER_PARAM_N_ALERTS) \
+    field(enable_alerts, bool, MAX_ALERT_HANDLER_PARAM_N_ALERTS) \
+    field(enable_classes, bool, MAX_ALERT_HANDLER_PARAM_N_CLASSES) \
+    field(accumulation_thresholds, uint16_t, 4) \
+    field(signals, uint32_t, 4) \
+    field(duration_cycles, uint32_t, 4) \
+    field(ping_timeout, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtesAlertConfig, penetrationtest_alert_config_t, PENETRATIONTEST_ALERT_CONFIG);
+
+#define PENETRATIONTEST_ALERTDUMP(field, string) \
+    field(rst_reason, uint32_t) \
+    field(alert_cause, bool, MAX_ALERT_HANDLER_PARAM_N_ALERTS) \
+    field(loc_alert_cause, uint8_t) \
+    field(class_accum_cnt, uint16_t, MAX_ALERT_HANDLER_PARAM_N_CLASSES) \
+    field(class_esc_cnt, uint32_t, MAX_ALERT_HANDLER_PARAM_N_CLASSES) \
+    field(class_esc_state, uint32_t, MAX_ALERT_HANDLER_PARAM_N_CLASSES)
+UJSON_SERDE_STRUCT(PenetrationtesAlertDump, penetrationtest_alert_dump_t, PENETRATIONTEST_ALERTDUMP);
+
+#define PENETRATIONTEST_OWNER_PAGE(field, string) \
+    field(config_version, uint32_t) \
+    field(sram_exec_mode, uint32_t) \
+    field(ownership_key_alg, uint32_t) \
+    field(update_mode, uint32_t) \
+    field(min_security_version_bl0, uint32_t) \
+    field(lock_constraint, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestOwnerPage, penetrationtest_owner_page_t, PENETRATIONTEST_OWNER_PAGE);
+
+#define PENETRATIONTEST_BOOT_LOG(field, string) \
+    field(digest, uint32_t, 8) \
+    field(identifier, uint32_t) \
+    field(scm_revision_low, uint32_t) \
+    field(scm_revision_high, uint32_t) \
+    field(rom_ext_slot, uint32_t) \
+    field(rom_ext_major, uint32_t) \
+    field(rom_ext_minor, uint32_t) \
+    field(rom_ext_size, uint32_t) \
+    field(bl0_slot, uint32_t) \
+    field(ownership_state, uint32_t) \
+    field(ownership_transfers, uint32_t) \
+    field(rom_ext_min_sec_ver, uint32_t) \
+    field(bl0_min_sec_ver, uint32_t) \
+    field(primary_bl0_slot, uint32_t) \
+    field(retention_ram_initialized, uint32_t)
+UJSON_SERDE_STRUCT(PenetrationtestBootLog, penetrationtest_boot_log_t, PENETRATIONTEST_BOOT_LOG);
+
+#define PENETRATIONTEST_BOOT_MEASUREMENTS(field, string) \
+    field(bl0, uint32_t, 8) \
+    field(rom_ext, uint32_t, 8)
+UJSON_SERDE_STRUCT(PenetrationtestBootMeasurements, penetrationtest_boot_measurements_t, PENETRATIONTEST_BOOT_MEASUREMENTS);
+
+#define PENETRATIONTEST_ALERT_CONFIG_OUT(field, string) \
+    field(alert_classes, uint32_t, MAX_ALERT_HANDLER_PARAM_N_ALERTS) \
+    field(enabled_alerts, bool, MAX_ALERT_HANDLER_PARAM_N_ALERTS) \
+    field(enabled_classes, bool, MAX_ALERT_HANDLER_PARAM_N_CLASSES) \
+    field(accumulation_thresholds, uint32_t, MAX_ALERT_HANDLER_PARAM_N_CLASSES) \
+    field(duration_cycles, uint32_t, MAX_ALERT_HANDLER_PARAM_N_PHASES) \
+    field(escalation_signals_en, bool, MAX_ALERT_HANDLER_PARAM_N_PHASES) \
+    field(escalation_signals_map, uint32_t, MAX_ALERT_HANDLER_PARAM_N_PHASES)
+UJSON_SERDE_STRUCT(PenetrationtestAlertConfigOut, penetrationtest_alert_config_out_t, PENETRATIONTEST_ALERT_CONFIG_OUT);
+
+#define PENETRATIONTEST_SENSOR_CONFIG_OUT(field, string) \
+    field(sensor_ctrl_en, bool, MAX_SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS) \
+    field(sensor_ctrl_fatal, bool, MAX_SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS)
+UJSON_SERDE_STRUCT(PenetrationtesSensorConfigOut, penetrationtest_sensor_config_out_t, PENETRATIONTEST_SENSOR_CONFIG_OUT);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_PENTEST_LIB_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/rng_fi_commands.c b/sw/device/tests/penetrationtests/json/rng_fi_commands.c
new file mode 100644
index 0000000000000..edaca4ecd1582
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/rng_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "rng_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/rng_fi_commands.h b/sw/device/tests/penetrationtests/json/rng_fi_commands.h
new file mode 100644
index 0000000000000..70586bc1bcc43
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/rng_fi_commands.h
@@ -0,0 +1,92 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_RNG_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_RNG_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// clang-format off
+
+#define RNGFI_SUBCOMMAND(_, value) \
+    value(_, CsrngInit) \
+    value(_, CsrngBias) \
+    value(_, CsrngBiasFWOverride) \
+    value(_, CsrngBiasFWOverrideStatic) \
+    value(_, EdnInit) \
+    value(_, EdnRespAck) \
+    value(_, EdnBias) \
+    value(_, FWOverride) \
+    value(_, EntropySrcBias)
+C_ONLY(UJSON_SERDE_ENUM(RngFiSubcommand, rng_fi_subcommand_t, RNGFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(RngFiSubcommand, rng_fi_subcommand_t, RNGFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define CRYPTOFI_CSRNG_MODE(field, string) \
+    field(start_trigger, bool) \
+    field(valid_trigger, bool) \
+    field(read_trigger, bool) \
+    field(all_trigger, bool)
+UJSON_SERDE_STRUCT(CryptoFiCsrngMode, crypto_fi_csrng_mode_t, CRYPTOFI_CSRNG_MODE);
+
+#define RNGFI_CSRNG_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(rand, uint32_t, 16) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiCsrngOutput, rng_fi_csrng_output_t, RNGFI_CSRNG_OUTPUT);
+
+#define RNGFI_CSRNG_OV_OUTPUT(field, string) \
+    field(res, uint32_t) \
+    field(rand, uint32_t, 12) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiCsrngOvOutput, rng_fi_csrng_ov_output_t, RNGFI_CSRNG_OV_OUTPUT);
+
+#define RNGFI_ENTRBIAS_OUTPUT(field, string) \
+    field(rand, uint32_t, 32) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiEntrBiasOutput, rng_fi_entropy_src_bias_t, RNGFI_ENTRBIAS_OUTPUT);
+
+#define RNGFI_FWOVERWRITE_OUTPUT(field, string) \
+    field(rand, uint32_t, 32) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiFwOverwriteOutput, rng_fi_fw_overwrite_t, RNGFI_FWOVERWRITE_OUTPUT);
+
+#define RNGFI_EDN(field, string) \
+    field(rand, uint32_t, 16) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiEdn, rng_fi_edn_t, RNGFI_EDN);
+
+#define RNGFI_EDN_COLLISION(field, string) \
+    field(collisions, uint32_t) \
+    field(rand, uint32_t, 16) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RngFiEdnCollision, rng_fi_edn_collisions_t, RNGFI_EDN_COLLISION);
+
+#define RNGFI_FWOVERWRITE_HEALTH(field, string) \
+    field(disable_health_check, bool)
+UJSON_SERDE_STRUCT(RngFiFwOverwriteHealt, rng_fi_fw_overwrite_health_t, RNGFI_FWOVERWRITE_HEALTH);
+
+#define RNGFI_SEED(field, string) \
+    field(seed, uint32_t, 12)
+UJSON_SERDE_STRUCT(RngFiSeed, rng_fi_seed_t, RNGFI_SEED);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_RNG_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/rom_fi_commands.c b/sw/device/tests/penetrationtests/json/rom_fi_commands.c
new file mode 100644
index 0000000000000..cc88ff3fd4b83
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/rom_fi_commands.c
@@ -0,0 +1,6 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#define UJSON_SERDE_IMPL 1
+#include "rom_fi_commands.h"
diff --git a/sw/device/tests/penetrationtests/json/rom_fi_commands.h b/sw/device/tests/penetrationtests/json/rom_fi_commands.h
new file mode 100644
index 0000000000000..82f4d01036e28
--- /dev/null
+++ b/sw/device/tests/penetrationtests/json/rom_fi_commands.h
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ROM_FI_COMMANDS_H_
+#define OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ROM_FI_COMMANDS_H_
+#include "sw/device/lib/ujson/ujson_derive.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// clang-format off
+
+#define ROMFI_SUBCOMMAND(_, value) \
+    value(_, Init) \
+    value(_, Read)
+C_ONLY(UJSON_SERDE_ENUM(RomFiSubcommand, rom_fi_subcommand_t, ROMFI_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(RomFiSubcommand, rom_fi_subcommand_t, ROMFI_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
+
+#define ROMFI_DIGEST(field, string) \
+    field(digest, uint32_t, 8) \
+    field(alerts, uint32_t, 3) \
+    field(err_status, uint32_t) \
+    field(ast_alerts, uint32_t, 2)
+UJSON_SERDE_STRUCT(RomFiDigest, rom_fi_digest_t, ROMFI_DIGEST);
+
+// clang-format on
+
+#ifdef __cplusplus
+}
+#endif
+#endif  // OPENTITAN_SW_DEVICE_TESTS_PENETRATIONTESTS_JSON_ROM_FI_COMMANDS_H_
diff --git a/sw/device/tests/penetrationtests/json/sha3_sca_commands.h b/sw/device/tests/penetrationtests/json/sha3_sca_commands.h
index 8bab8aa8fd55c..20d724ae0999d 100644
--- a/sw/device/tests/penetrationtests/json/sha3_sca_commands.h
+++ b/sw/device/tests/penetrationtests/json/sha3_sca_commands.h
@@ -24,7 +24,8 @@ extern "C" {
     value(_, FixedMessageSet) \
     value(_, SeedLfsr) \
     value(_, DisableMasking)
-UJSON_SERDE_ENUM(Sha3ScaSubcommand, sha3_sca_subcommand_t, SHA3_SCA_SUBCOMMAND);
+C_ONLY(UJSON_SERDE_ENUM(Sha3ScaSubcommand, sha3_sca_subcommand_t, SHA3_SCA_SUBCOMMAND));
+RUST_ONLY(UJSON_SERDE_ENUM(Sha3ScaSubcommand, sha3_sca_subcommand_t, SHA3_SCA_SUBCOMMAND, RUST_DEFAULT_DERIVE, strum::EnumString));
 
 #define SHA3_SCA_MASKS(field, string) \
     field(masks_off, uint8_t)
diff --git a/sw/device/tests/penetrationtests/pentest.bzl b/sw/device/tests/penetrationtests/pentest.bzl
new file mode 100644
index 0000000000000..b28460ea489ad
--- /dev/null
+++ b/sw/device/tests/penetrationtests/pentest.bzl
@@ -0,0 +1,521 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+"""Pentest case definition"""
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "EARLGREY_SILICON_OWNER_ROM_EXT_ENVS",
+    "fpga_params",
+    "opentitan_test",
+    "silicon_params",
+)
+load("@rules_python//python:defs.bzl", "py_test")
+
+# Defines default execution environments for penetrationtests targets. All
+# opentitan_test must have the following attributes to configure
+# each execution environment:
+# - cw340
+# - silicon
+PENTEST_EXEC_ENVS = {
+    "//hw/top_earlgrey:fpga_cw340_test_rom": "fpga_cw340",
+    "//hw/top_earlgrey:fpga_cw340_sival_rom_ext": "fpga_cw340",
+    "//hw/top_earlgrey:fpga_cw340_rom_ext": "fpga_cw340",
+} | EARLGREY_SILICON_OWNER_ROM_EXT_ENVS
+
+FIRMWARE_DEPS_FI = [
+    "//sw/device/tests/penetrationtests/firmware/fi:alert_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:crypto_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:ibex_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:lc_ctrl_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:otp_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:rng_fi",
+    "//sw/device/tests/penetrationtests/firmware/fi:rom_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_FI_IBEX = [
+    "//sw/device/tests/penetrationtests/firmware/fi:ibex_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_FI_OTBN = [
+    "//sw/device/tests/penetrationtests/firmware/fi:otbn_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_SCA = [
+    "//sw/device/tests/penetrationtests/firmware/sca:aes_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:edn_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:hmac_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:ibex_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:kmac_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:otbn_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:sha3_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_FI_SYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_sym",
+    "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_FI_ASYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/fi:cryptolib_fi_asym",
+    "//sw/device/tests/penetrationtests/firmware/lib:extclk_sca_fi",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_SCA_SYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_sym",
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+FIRMWARE_DEPS_CRYPTOLIB_SCA_ASYM = [
+    "//sw/device/tests/penetrationtests/firmware/sca:cryptolib_sca_asym",
+    "//sw/device/tests/penetrationtests/firmware/sca:trigger_sca",
+    "//sw/device/tests/penetrationtests/firmware/sca:prng_sca",
+    "//sw/device/tests/penetrationtests/firmware/lib:pentest_lib",
+    "//sw/device/lib/base:csr",
+    "//sw/device/lib/base:status",
+    "//sw/device/lib/crypto/drivers:entropy",
+    "//sw/device/lib/testing/test_framework:check",
+    "//sw/device/lib/testing/test_framework:ottf_main",
+    "//sw/device/lib/testing/test_framework:ujson_ottf",
+    "//sw/device/lib/ujson",
+
+    # Include all JSON commands.
+    "//sw/device/tests/penetrationtests/json:commands",
+]
+
+def pentest_fi(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_fi.c"],
+        fpga = fpga_params(
+            timeout = "moderate",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "moderate",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_FI,
+    )
+
+def pentest_fi_ibex(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_fi_ibex.c"],
+        fpga = fpga_params(
+            timeout = "moderate",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "moderate",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_FI_IBEX,
+    )
+
+def pentest_fi_otbn(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_fi_otbn.c"],
+        fpga = fpga_params(
+            timeout = "moderate",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "moderate",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_FI_OTBN,
+    )
+
+def pentest_sca(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_sca.c"],
+        fpga = fpga_params(
+            timeout = "moderate",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "moderate",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_SCA,
+    )
+
+def pentest_cryptolib_fi_sym(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_cryptolib_fi_sym.c"],
+        fpga = fpga_params(
+            timeout = "long",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "long",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_CRYPTOLIB_FI_SYM,
+    )
+
+def pentest_cryptolib_fi_asym(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_cryptolib_fi_asym.c"],
+        fpga = fpga_params(
+            timeout = "long",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "long",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_CRYPTOLIB_FI_ASYM,
+    )
+
+def pentest_cryptolib_sca_sym(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_cryptolib_sca_sym.c"],
+        fpga = fpga_params(
+            timeout = "long",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "long",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_SYM,
+    )
+
+def pentest_cryptolib_sca_asym(name, test_vectors, test_args, test_harness, tags):
+    """A macro for defining a CryptoTest test case.
+
+    Args:
+        name: the name of the test.
+        test_vectors: the test vectors to use.
+        test_args: additional arguments to pass to the test.
+        test_harness: the test harness to use.
+        tags: indicate the tags for CI.
+    """
+    opentitan_test(
+        name = name,
+        srcs = ["//sw/device/tests/penetrationtests/firmware:firmware_cryptolib_sca_asym.c"],
+        fpga = fpga_params(
+            timeout = "long",
+            data = test_vectors,
+            tags = tags,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        fpga_cw340 = fpga_params(
+            timeout = "long",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        exec_env = PENTEST_EXEC_ENVS,
+        silicon = silicon_params(
+            timeout = "eternal",
+            tags = tags,
+            data = test_vectors,
+            test_cmd = """
+                --bootstrap={firmware}
+            """ + test_args,
+            test_harness = test_harness,
+        ),
+        deps = FIRMWARE_DEPS_CRYPTOLIB_SCA_ASYM,
+    )
diff --git a/sw/device/tests/pmod/BUILD b/sw/device/tests/pmod/BUILD
index 3d1bb3066e168..5cb77ec7a67b8 100644
--- a/sw/device/tests/pmod/BUILD
+++ b/sw/device/tests/pmod/BUILD
@@ -10,14 +10,95 @@ load(
     "fpga_params",
     "opentitan_test",
     "silicon_params",
+    "verilator_params",
+)
+load("//rules:splice.bzl", "bitstream_splice")
+load(
+    "//rules/opentitan:defs.bzl",
+    "DEFAULT_TEST_FAILURE_MSG",
+    "DEFAULT_TEST_SUCCESS_MSG",
+    "fpga_cw310",
 )
 load("@bazel_skylib//lib:dicts.bzl", "dicts")
 
 package(default_visibility = ["//visibility:public"])
 
+# A custom execution environment, which uses the same attributes as the CW310
+# SiVal ROM EXT execution environment, but uses the base universal bitstream
+# & interface for the CW310 as opposed to the hyperdebug variants, due to the
+# PMOD tests requiring the PMOD pins that are not available with hyperdebug.
+fpga_cw310(
+    name = "fpga_cw310_sival_rom_ext_no_hyper",
+    testonly = True,
+    base = "//hw/top_earlgrey:fpga_cw310_sival_rom_ext",
+    # Override the hyperdebug bitstream, interface, and OTP & ROM MMIs.
+    base_bitstream = "//hw/bitstream:bitstream",
+    mmi = "//hw/bitstream:cw310_mmi",
+    param = {
+        "interface": "cw310",
+        "exit_success": DEFAULT_TEST_SUCCESS_MSG,
+        "exit_failure": DEFAULT_TEST_FAILURE_MSG,
+        "assemble": "{rom_ext}@{rom_ext_slot_a} {firmware}@{owner_slot_a}",
+    },
+    visibility = ["//visibility:private"],
+)
+
 opentitan_test(
-    name = "spi_host_macronix_flash_test",
-    srcs = ["spi_host_macronix_flash_test.c"],
+    name = "spi_host_macronix1Gb_flash_test",
+    srcs = ["spi_host_macronix1Gb_flash_test.c"],
+    exec_env = dicts.add(
+        dicts.omit(
+            EARLGREY_TEST_ENVS,
+            # Requires special SiVal ROM EXT environment
+            ["//hw/top_earlgrey:fpga_cw310_sival_rom_ext"],
+        ),
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+            # Custom execution environment must be used for SiVal ROM EXT
+            # to ensure that all the PMOD pins are available.
+            ":fpga_cw310_sival_rom_ext_no_hyper": "sival_rom_ext_no_hyper",
+        },
+    ),
+    fpga = fpga_params(
+        tags = [
+            "manual",
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
+    silicon = silicon_params(
+        tags = [
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
+    sival_rom_ext_no_hyper = fpga_params(
+        tags = [
+            "cw310_sival_rom_ext",
+            "manual",
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:spi_host",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:spi_device_testutils",
+        "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:spi_host_flash_test_impl",
+    ],
+)
+
+opentitan_test(
+    name = "spi_host_macronix128Mb_flash_test",
+    srcs = ["spi_host_macronix128Mb_flash_test.c"],
     exec_env = {
         "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
         "//hw/top_earlgrey:fpga_cw310_test_rom": None,
@@ -107,6 +188,37 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "spi_host_issi256Mb_flash_test",
+    srcs = ["spi_host_issi256Mb_flash_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+    },
+    fpga = fpga_params(
+        tags = [
+            "manual",
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:spi_host",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:spi_device_testutils",
+        "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:spi_host_flash_test_impl",
+    ],
+)
+
 opentitan_test(
     name = "spi_host_micron512Mb_flash_test",
     srcs = ["spi_host_micron512Mb_flash_test.c"],
@@ -138,6 +250,37 @@ opentitan_test(
     ],
 )
 
+opentitan_test(
+    name = "spi_host_winbond1Gb_flash_test",
+    srcs = ["spi_host_winbond1Gb_flash_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+    },
+    fpga = fpga_params(
+        tags = [
+            "manual",
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:pinmux",
+        "//sw/device/lib/dif:spi_host",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:spi_device_testutils",
+        "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+        "//sw/device/tests:spi_host_flash_test_impl",
+    ],
+)
+
 opentitan_test(
     name = "i2c_host_accelerometer_test",
     srcs = ["i2c_host_accelerometer_test.c"],
@@ -284,16 +427,25 @@ opentitan_test(
 opentitan_test(
     name = "i2c_host_eeprom_test",
     srcs = ["i2c_host_eeprom_test.c"],
-    exec_env = {
-        "//hw/top_earlgrey:fpga_cw310_sival": None,
-        "//hw/top_earlgrey:fpga_cw310_test_rom": None,
-    },
+    exec_env = dicts.add(
+        EARLGREY_TEST_ENVS,
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
+        {
+            "//hw/top_earlgrey:fpga_cw310_rom_with_fake_keys": None,
+            "//hw/top_earlgrey:fpga_cw310_test_rom": None,
+        },
+    ),
     fpga = fpga_params(
         tags = [
             "manual",
             "pmod",
         ],  # Requires the PMOD::BoB.
     ),
+    silicon = silicon_params(
+        tags = [
+            "pmod",
+        ],  # Requires the PMOD::BoB.
+    ),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
@@ -330,6 +482,9 @@ opentitan_test(
             "pmod",
         ],  # Requires the PMOD::BoB.
     ),
+    # This test can take > 40 minutes, so mark it manual as it shouldn't run
+    # in CI/nightlies.
+    verilator = verilator_params(tags = ["manual"]),
     deps = [
         "//hw/top_earlgrey/sw/autogen:top_earlgrey",
         "//sw/device/lib/arch:device",
diff --git a/sw/device/tests/pmod/i2c_host_accelerometer_test.c b/sw/device/tests/pmod/i2c_host_accelerometer_test.c
index 4d2237199c8a0..0e83a17a21c49 100644
--- a/sw/device/tests/pmod/i2c_host_accelerometer_test.c
+++ b/sw/device/tests/pmod/i2c_host_accelerometer_test.c
@@ -145,7 +145,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_device_id);
     EXECUTE_TEST(test_result, read_write_thresh_tap);
     EXECUTE_TEST(test_result, take_measurement);
diff --git a/sw/device/tests/pmod/i2c_host_ambient_light_detector_test.c b/sw/device/tests/pmod/i2c_host_ambient_light_detector_test.c
index 80dafe411b3ae..c7ffdbdc28888 100644
--- a/sw/device/tests/pmod/i2c_host_ambient_light_detector_test.c
+++ b/sw/device/tests/pmod/i2c_host_ambient_light_detector_test.c
@@ -154,7 +154,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_part_id);
     EXECUTE_TEST(test_result, read_manufacturer_id);
     EXECUTE_TEST(test_result, write_read_measure_rate);
diff --git a/sw/device/tests/pmod/i2c_host_clock_stretching_test.c b/sw/device/tests/pmod/i2c_host_clock_stretching_test.c
index 06f0938f2cc0e..bf4756930a2f5 100644
--- a/sw/device/tests/pmod/i2c_host_clock_stretching_test.c
+++ b/sw/device/tests/pmod/i2c_host_clock_stretching_test.c
@@ -236,7 +236,8 @@ bool test_main(void) {
 
   status_t test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_manufacture_id);
     EXECUTE_TEST(test_result, read_product_id);
     EXECUTE_TEST(test_result, rx_stretch_timeout);
diff --git a/sw/device/tests/pmod/i2c_host_compass_test.c b/sw/device/tests/pmod/i2c_host_compass_test.c
index dac350661a88a..4d09011ef1712 100644
--- a/sw/device/tests/pmod/i2c_host_compass_test.c
+++ b/sw/device/tests/pmod/i2c_host_compass_test.c
@@ -138,7 +138,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_product_id);
     EXECUTE_TEST(test_result, take_measurement);
   }
@@ -146,7 +147,8 @@ bool test_main(void) {
   // Reset the i2c peripheral and re-run a test
   // to check the peripheral works after reset.
   CHECK_STATUS_OK(reset_i2c_and_check());
-  CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, kDifI2cSpeedFast));
+  CHECK_STATUS_OK(i2c_testutils_set_speed(
+      &i2c, kDifI2cSpeedFast, /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
   EXECUTE_TEST(test_result, read_product_id);
 
   return status_ok(test_result);
diff --git a/sw/device/tests/pmod/i2c_host_eeprom_test.c b/sw/device/tests/pmod/i2c_host_eeprom_test.c
index a7d7dd79e108e..563d24b2cb172 100644
--- a/sw/device/tests/pmod/i2c_host_eeprom_test.c
+++ b/sw/device/tests/pmod/i2c_host_eeprom_test.c
@@ -201,7 +201,8 @@ bool test_main(void) {
                                  kDifI2cSpeedFastPlus};
 
     for (size_t i = 0; i < ARRAYSIZE(kSpeeds); ++i) {
-      CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, kSpeeds[i]));
+      CHECK_STATUS_OK(i2c_testutils_set_speed(
+          &i2c, kSpeeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
       EXECUTE_TEST(test_result, write_read_random, &i2c);
       EXECUTE_TEST(test_result, write_read_page, &i2c, false);
       EXECUTE_TEST(test_result, write_read_page_with_irq, &i2c);
diff --git a/sw/device/tests/pmod/i2c_host_fram_test.c b/sw/device/tests/pmod/i2c_host_fram_test.c
index 3f398303aeda2..ec7cd043bdd15 100644
--- a/sw/device/tests/pmod/i2c_host_fram_test.c
+++ b/sw/device/tests/pmod/i2c_host_fram_test.c
@@ -201,18 +201,20 @@ static status_t test_shutdown(dif_i2c_t *i2c, dif_pinmux_t *pinmux,
 }
 
 typedef struct test_setup {
+  // The speed to configure the I2C with
   dif_i2c_speed_t speed;
+  // The minimum threshold estimated data rate we expect to see over the test
   uint32_t kbps;
 } test_setup_t;
 
-const test_setup_t kSetup[] = {
-    // kbps: We discount 85% for the start and stop bits.
-    // We also have to discount a factor to account for rounding errors.
-    // The rounding error becomes higher with higher speeds, as the i2c clock
-    // approaches the peripheral clock.
-    {.speed = kDifI2cSpeedStandard, .kbps = (uint32_t)(100 * 0.984 * 0.85)},
-    {.speed = kDifI2cSpeedFast, .kbps = (uint32_t)(400 * 0.92 * 0.85)},
-    {.speed = kDifI2cSpeedFastPlus, .kbps = (uint32_t)(1000 * 0.55 * 0.75)}};
+test_setup_t setup[] = {
+    // kbps: Discount 15% (* 0.85) to account for ~15% of transactions being
+    // start/stop bits, ACKs, etc. We then discount an additional factor to
+    // account for clock rounding errors. The rounding error becomes higher
+    // with higher speeds, as the i2c clock approaches the peripheral clock.
+    {.speed = kDifI2cSpeedStandard, .kbps = (uint32_t)(100 * 0.85 * 0.99)},
+    {.speed = kDifI2cSpeedFast, .kbps = (uint32_t)(400 * 0.85 * 0.92)},
+    {.speed = kDifI2cSpeedFastPlus, .kbps = (uint32_t)(1000 * 0.85 * 0.5)}};
 
 bool test_main(void) {
   dif_pinmux_t pinmux;
@@ -221,18 +223,28 @@ bool test_main(void) {
   CHECK_DIF_OK(dif_pinmux_init(
       mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
 
+  if (kDeviceType == kDeviceSilicon) {
+    // On silicon, set tighter thresholds as we expect to be much closer
+    // to our target speed.
+    setup[0].kbps = (uint32_t)(100 * 0.85 * 0.99);
+    setup[1].kbps = (uint32_t)(400 * 0.85 * 0.98);
+    setup[2].kbps = (uint32_t)(1000 * 0.85 * 0.95);
+  }
+
   i2c_pinmux_platform_id_t platform = I2cPinmuxPlatformIdCw310Pmod;
   status_t test_result = OK_STATUS();
   for (uint8_t i2c_instance = 0; i2c_instance < kI2cInstances; ++i2c_instance) {
     LOG_INFO("Testing i2c%d", i2c_instance);
     CHECK_STATUS_OK(i2c_configure(&i2c, &pinmux, i2c_instance, platform));
 
-    for (size_t i = 0; i < ARRAYSIZE(kSetup); ++i) {
-      CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, kSetup[i].speed));
+    for (size_t i = 0; i < ARRAYSIZE(setup); ++i) {
+      CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, setup[i].speed,
+                                              /*sda_rise_nanos=*/100,
+                                              /*sda_fall_nanos=*/25));
       EXECUTE_TEST(test_result, read_device_id, &i2c);
       EXECUTE_TEST(test_result, write_read_byte, &i2c);
       EXECUTE_TEST(test_result, write_read_page, &i2c);
-      EXECUTE_TEST(test_result, throughput, &i2c, kSetup[i].kbps);
+      EXECUTE_TEST(test_result, throughput, &i2c, setup[i].kbps);
       CHECK_STATUS_OK(test_result);
     }
     CHECK_STATUS_OK(test_shutdown(&i2c, &pinmux, i2c_instance));
diff --git a/sw/device/tests/pmod/i2c_host_gas_sensor_test.c b/sw/device/tests/pmod/i2c_host_gas_sensor_test.c
index c125e96c2a259..e307f0feb02a3 100644
--- a/sw/device/tests/pmod/i2c_host_gas_sensor_test.c
+++ b/sw/device/tests/pmod/i2c_host_gas_sensor_test.c
@@ -147,7 +147,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_serial_number);
     EXECUTE_TEST(test_result, measure_raw);
     EXECUTE_TEST(test_result, self_test);
diff --git a/sw/device/tests/pmod/i2c_host_hdc1080_humidity_temp_test.c b/sw/device/tests/pmod/i2c_host_hdc1080_humidity_temp_test.c
index b964b0848d28a..c983be05ba194 100644
--- a/sw/device/tests/pmod/i2c_host_hdc1080_humidity_temp_test.c
+++ b/sw/device/tests/pmod/i2c_host_hdc1080_humidity_temp_test.c
@@ -128,7 +128,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_manufacture_id);
     EXECUTE_TEST(test_result, read_product_id);
     EXECUTE_TEST(test_result, read_temperature);
diff --git a/sw/device/tests/pmod/i2c_host_irq_test.c b/sw/device/tests/pmod/i2c_host_irq_test.c
index 3848f82fe6809..38e907b911c2a 100644
--- a/sw/device/tests/pmod/i2c_host_irq_test.c
+++ b/sw/device/tests/pmod/i2c_host_irq_test.c
@@ -326,7 +326,9 @@ bool test_main(void) {
   CHECK_STATUS_OK(test_init());
 
   test_result = OK_STATUS();
-  CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, kDifI2cSpeedStandard));
+  CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, kDifI2cSpeedStandard,
+                                          /*sda_rise_nanos=*/400,
+                                          /*sda_fall_nanos=*/110));
   EXECUTE_TEST(test_result, nak_irq);
   EXECUTE_TEST(test_result, nak_irq_disabled);
   EXECUTE_TEST(test_result, cmd_complete_irq);
diff --git a/sw/device/tests/pmod/i2c_host_power_monitor_test.c b/sw/device/tests/pmod/i2c_host_power_monitor_test.c
index 0a830a754d641..01611d718e145 100644
--- a/sw/device/tests/pmod/i2c_host_power_monitor_test.c
+++ b/sw/device/tests/pmod/i2c_host_power_monitor_test.c
@@ -171,7 +171,8 @@ bool test_main(void) {
 
   test_result = OK_STATUS();
   for (size_t i = 0; i < ARRAYSIZE(speeds); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_set_speed(&i2c, speeds[i]));
+    CHECK_STATUS_OK(i2c_testutils_set_speed(
+        &i2c, speeds[i], /*sda_rise_nanos=*/400, /*sda_fall_nanos=*/110));
     EXECUTE_TEST(test_result, read_manufacture_id);
     EXECUTE_TEST(test_result, read_product_id);
     EXECUTE_TEST(test_result, read_write_1byte);
diff --git a/sw/device/tests/pmod/spi_host_gigadevice1Gb_flash_test.c b/sw/device/tests/pmod/spi_host_gigadevice1Gb_flash_test.c
index 2927b77755703..c0e7bf6e4303d 100644
--- a/sw/device/tests/pmod/spi_host_gigadevice1Gb_flash_test.c
+++ b/sw/device/tests/pmod/spi_host_gigadevice1Gb_flash_test.c
@@ -80,7 +80,7 @@ bool test_main(void) {
    * the Quad SPI.
    */
   enum GigadeviceVendorSpecific {
-    kManufactureId = 0xC8,
+    kManufacturerId = 0xC8,
     kPageQuadProgramOpcode = 0xC2,
   };
 
@@ -88,7 +88,7 @@ bool test_main(void) {
   EXECUTE_TEST(result, test_software_reset, &spi_host);
   EXECUTE_TEST(result, test_read_sfdp, &spi_host);
   EXECUTE_TEST(result, test_sector_erase, &spi_host);
-  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufactureId);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
   EXECUTE_TEST(result, test_page_program, &spi_host);
   if (is_4_bytes_address_mode_supported()) {
     EXECUTE_TEST(result, test_4bytes_address, &spi_host);
diff --git a/sw/device/tests/pmod/spi_host_gigadevice256Mb_flash_test.c b/sw/device/tests/pmod/spi_host_gigadevice256Mb_flash_test.c
index a36df3095b53a..2d939df6f1dba 100644
--- a/sw/device/tests/pmod/spi_host_gigadevice256Mb_flash_test.c
+++ b/sw/device/tests/pmod/spi_host_gigadevice256Mb_flash_test.c
@@ -26,7 +26,7 @@ static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
 
 OTTF_DEFINE_TEST_CONFIG();
 
-static void init_test(dif_spi_host_t *spi_host) {
+static void init_test(dif_spi_host_t *spi_host, dif_pinmux_index_t csb_pin) {
   dif_pinmux_t pinmux;
   mmio_region_t base_addr =
       mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
@@ -47,7 +47,6 @@ static void init_test(dif_spi_host_t *spi_host) {
       CHECK(false, "Device not supported %u", kDeviceType);
       break;
   }
-  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIoc11;
   CHECK_STATUS_OK(
       spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
 
@@ -68,33 +67,44 @@ static void init_test(dif_spi_host_t *spi_host) {
 }
 
 bool test_main(void) {
-  dif_spi_host_t spi_host;
-
-  init_test(&spi_host);
   enum GigadeviceVendorSpecific {
-    kManufactureId = 0xC8,
+    kManufacturerId = 0xC8,
     kPageQuadProgramOpcode = 0x32,
   };
 
+  // Chip select pins for the different 256Mb GigaDevice SPI Flashes available
+  // via PMOD
+  dif_pinmux_index_t csb_pins[] = {
+      kTopEarlgreyPinmuxMioOutIoc11,
+      kTopEarlgreyPinmuxMioOutIoa6,
+  };
+
   status_t result = OK_STATUS();
-  EXECUTE_TEST(result, test_software_reset, &spi_host);
-  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
-  EXECUTE_TEST(result, test_sector_erase, &spi_host);
-  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufactureId);
-  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
-  EXECUTE_TEST(result, test_page_program, &spi_host);
-  if (is_4_bytes_address_mode_supported()) {
-    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+  for (size_t i = 0; i < ARRAYSIZE(csb_pins); ++i) {
+    LOG_INFO("Testing flash device %u", (uint32_t)(i + 1));
+    dif_spi_host_t spi_host;
+
+    init_test(&spi_host, csb_pins[i]);
+
+    EXECUTE_TEST(result, test_software_reset, &spi_host);
+    EXECUTE_TEST(result, test_read_sfdp, &spi_host);
+    EXECUTE_TEST(result, test_sector_erase, &spi_host);
+    EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
+    EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
+    EXECUTE_TEST(result, test_page_program, &spi_host);
+    if (is_4_bytes_address_mode_supported()) {
+      EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+    }
+    EXECUTE_TEST(result, test_fast_read, &spi_host);
+    EXECUTE_TEST(result, test_dual_read, &spi_host);
+    EXECUTE_TEST(result, test_quad_read, &spi_host);
+
+    // The Gigadevice flash `4PP` opcode operates in 1-1-4 mode.
+    EXECUTE_TEST(result, test_page_program_quad, &spi_host,
+                 kPageQuadProgramOpcode, kTransactionWidthMode114);
+    EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
+    EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
   }
-  EXECUTE_TEST(result, test_fast_read, &spi_host);
-  EXECUTE_TEST(result, test_dual_read, &spi_host);
-  EXECUTE_TEST(result, test_quad_read, &spi_host);
-
-  // The Gigadevice flash `4PP` opcode operates in 1-1-4 mode.
-  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
-               kPageQuadProgramOpcode, kTransactionWidthMode114);
-  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
-  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
 
   return status_ok(result);
 }
diff --git a/sw/device/tests/pmod/spi_host_issi256Mb_flash_test.c b/sw/device/tests/pmod/spi_host_issi256Mb_flash_test.c
new file mode 100644
index 0000000000000..6761142fde251
--- /dev/null
+++ b/sw/device/tests/pmod/spi_host_issi256Mb_flash_test.c
@@ -0,0 +1,102 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_spi_host.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/spi_flash_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/spi_host_flash_test_impl.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static void init_test(dif_spi_host_t *spi_host) {
+  dif_pinmux_t pinmux;
+  mmio_region_t base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pinmux_init(base_addr, &pinmux));
+
+  spi_pinmux_platform_id_t platform_id = kSpiPinmuxPlatformIdCount;
+  switch (kDeviceType) {
+    case kDeviceSilicon:
+      platform_id = kSpiPinmuxPlatformIdTeacup;
+      break;
+    case kDeviceFpgaCw310:
+      platform_id = kSpiPinmuxPlatformIdCw310;
+      break;
+    case kDeviceFpgaCw340:
+      platform_id = kSpiPinmuxPlatformIdCw340;
+      break;
+    default:
+      CHECK(false, "Device not supported: %u", kDeviceType);
+      break;
+  }
+  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIoc12;
+  CHECK_STATUS_OK(
+      spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
+
+  base_addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
+  CHECK_DIF_OK(dif_spi_host_init(base_addr, spi_host));
+
+  CHECK(kClockFreqUsbHz <= UINT32_MAX, "kClockFreqUsbHz must fit in uint32_t");
+
+  CHECK_DIF_OK(dif_spi_host_configure(
+                   spi_host,
+                   (dif_spi_host_config_t){
+                       .spi_clock = 1000000,
+                       .peripheral_clock_freq_hz = (uint32_t)kClockFreqUsbHz,
+                   }),
+               "SPI_HOST config failed!");
+
+  CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, true));
+}
+
+bool test_main(void) {
+  dif_spi_host_t spi_host;
+
+  init_test(&spi_host);
+
+  enum IssiVendorSpecific {
+    kManufacturerId = 0x9D,
+    // The ISSI flash `4PP` opcode operates using 4-byte addresses.
+    // Instead, we use the `PPQ` Quad Input Page Program operation.
+    kPageQuadProgramOpcode = 0x32,
+  };
+
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, test_software_reset, &spi_host);
+  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
+  EXECUTE_TEST(result, test_sector_erase, &spi_host);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
+  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
+  EXECUTE_TEST(result, test_page_program, &spi_host);
+  if (is_4_bytes_address_mode_supported()) {
+    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+  }
+  EXECUTE_TEST(result, test_fast_read, &spi_host);
+  EXECUTE_TEST(result, test_dual_read, &spi_host);
+  EXECUTE_TEST(result, test_quad_read, &spi_host);
+  // The ISSI flash `PPQ` opcode operates in 1-1-4 mode.
+  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
+               kPageQuadProgramOpcode, kTransactionWidthMode114);
+  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
+  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
+
+  return status_ok(result);
+}
diff --git a/sw/device/tests/pmod/spi_host_macronix128Mb_flash_test.c b/sw/device/tests/pmod/spi_host_macronix128Mb_flash_test.c
new file mode 100644
index 0000000000000..7934250c5581a
--- /dev/null
+++ b/sw/device/tests/pmod/spi_host_macronix128Mb_flash_test.c
@@ -0,0 +1,97 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_spi_host.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/spi_flash_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/spi_host_flash_test_impl.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static void init_test(dif_spi_host_t *spi_host) {
+  dif_pinmux_t pinmux;
+  mmio_region_t addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pinmux_init(addr, &pinmux));
+
+  spi_pinmux_platform_id_t platform_id = kSpiPinmuxPlatformIdCount;
+  switch (kDeviceType) {
+    case kDeviceSilicon:
+      platform_id = kSpiPinmuxPlatformIdTeacup;
+      break;
+    case kDeviceFpgaCw310:
+      platform_id = kSpiPinmuxPlatformIdCw310;
+      break;
+    case kDeviceFpgaCw340:
+      platform_id = kSpiPinmuxPlatformIdCw340;
+      break;
+    default:
+      CHECK(false, "Device not supported %u", kDeviceType);
+      break;
+  }
+  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIoc9;
+  CHECK_STATUS_OK(
+      spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
+
+  addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
+  CHECK_DIF_OK(dif_spi_host_init(addr, spi_host));
+
+  CHECK(kClockFreqUsbHz <= UINT32_MAX, "kClockFreqUsbHz must fit in uint32_t");
+
+  CHECK_DIF_OK(dif_spi_host_configure(
+                   spi_host,
+                   (dif_spi_host_config_t){
+                       .spi_clock = 1000000,
+                       .peripheral_clock_freq_hz = (uint32_t)kClockFreqUsbHz,
+                   }),
+               "SPI_HOST config failed!");
+
+  CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, true));
+}
+
+bool test_main(void) {
+  dif_spi_host_t spi_host;
+
+  init_test(&spi_host);
+  enum MacronixVendorSpecific {
+    kManufacturerId = 0xC2,
+    kPageQuadProgramOpcode = 0x38,
+  };
+
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, test_software_reset, &spi_host);
+  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
+  EXECUTE_TEST(result, test_sector_erase, &spi_host);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
+  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
+  EXECUTE_TEST(result, test_page_program, &spi_host);
+  if (is_4_bytes_address_mode_supported()) {
+    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+  }
+  EXECUTE_TEST(result, test_fast_read, &spi_host);
+  EXECUTE_TEST(result, test_dual_read, &spi_host);
+  EXECUTE_TEST(result, test_quad_read, &spi_host);
+  // The Macronix flash `4PP` opcode operates in 1-4-4 mode.
+  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
+               kPageQuadProgramOpcode, kTransactionWidthMode144);
+  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
+  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
+
+  return status_ok(result);
+}
diff --git a/sw/device/tests/pmod/spi_host_macronix1Gb_flash_test.c b/sw/device/tests/pmod/spi_host_macronix1Gb_flash_test.c
new file mode 100644
index 0000000000000..4dd20984c57f0
--- /dev/null
+++ b/sw/device/tests/pmod/spi_host_macronix1Gb_flash_test.c
@@ -0,0 +1,97 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_spi_host.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/spi_flash_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/spi_host_flash_test_impl.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static void init_test(dif_spi_host_t *spi_host) {
+  dif_pinmux_t pinmux;
+  mmio_region_t addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pinmux_init(addr, &pinmux));
+
+  spi_pinmux_platform_id_t platform_id = kSpiPinmuxPlatformIdCount;
+  switch (kDeviceType) {
+    case kDeviceSilicon:
+      platform_id = kSpiPinmuxPlatformIdTeacup;
+      break;
+    case kDeviceFpgaCw310:
+      platform_id = kSpiPinmuxPlatformIdCw310;
+      break;
+    case kDeviceFpgaCw340:
+      platform_id = kSpiPinmuxPlatformIdCw340;
+      break;
+    default:
+      CHECK(false, "Device not supported %u", kDeviceType);
+      break;
+  }
+  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIob7;
+  CHECK_STATUS_OK(
+      spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
+
+  addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
+  CHECK_DIF_OK(dif_spi_host_init(addr, spi_host));
+
+  CHECK(kClockFreqUsbHz <= UINT32_MAX, "kClockFreqUsbHz must fit in uint32_t");
+
+  CHECK_DIF_OK(dif_spi_host_configure(
+                   spi_host,
+                   (dif_spi_host_config_t){
+                       .spi_clock = 1000000,
+                       .peripheral_clock_freq_hz = (uint32_t)kClockFreqUsbHz,
+                   }),
+               "SPI_HOST config failed!");
+
+  CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, true));
+}
+
+bool test_main(void) {
+  dif_spi_host_t spi_host;
+
+  init_test(&spi_host);
+  enum MacronixVendorSpecific {
+    kManufacturerId = 0xC2,
+    kPageQuadProgramOpcode = 0x38,
+  };
+
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, test_software_reset, &spi_host);
+  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
+  EXECUTE_TEST(result, test_sector_erase, &spi_host);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
+  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
+  EXECUTE_TEST(result, test_page_program, &spi_host);
+  if (is_4_bytes_address_mode_supported()) {
+    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+  }
+  EXECUTE_TEST(result, test_fast_read, &spi_host);
+  EXECUTE_TEST(result, test_dual_read, &spi_host);
+  EXECUTE_TEST(result, test_quad_read, &spi_host);
+  // The Macronix flash `4PP` opcode operates in 1-4-4 mode.
+  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
+               kPageQuadProgramOpcode, kTransactionWidthMode144);
+  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
+  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
+
+  return status_ok(result);
+}
diff --git a/sw/device/tests/pmod/spi_host_macronix_flash_test.c b/sw/device/tests/pmod/spi_host_macronix_flash_test.c
deleted file mode 100644
index 34a76159ea39d..0000000000000
--- a/sw/device/tests/pmod/spi_host_macronix_flash_test.c
+++ /dev/null
@@ -1,97 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-#include <assert.h>
-
-#include "sw/device/lib/arch/device.h"
-#include "sw/device/lib/base/macros.h"
-#include "sw/device/lib/base/memory.h"
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_spi_host.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/runtime/print.h"
-#include "sw/device/lib/testing/spi_device_testutils.h"
-#include "sw/device/lib/testing/spi_flash_testutils.h"
-#include "sw/device/lib/testing/spi_host_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-#include "sw/device/tests/spi_host_flash_test_impl.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
-              "This test assumes the target platform is little endian.");
-
-OTTF_DEFINE_TEST_CONFIG();
-
-static void init_test(dif_spi_host_t *spi_host) {
-  dif_pinmux_t pinmux;
-  mmio_region_t addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
-  CHECK_DIF_OK(dif_pinmux_init(addr, &pinmux));
-
-  spi_pinmux_platform_id_t platform_id = kSpiPinmuxPlatformIdCount;
-  switch (kDeviceType) {
-    case kDeviceSilicon:
-      platform_id = kSpiPinmuxPlatformIdTeacup;
-      break;
-    case kDeviceFpgaCw310:
-      platform_id = kSpiPinmuxPlatformIdCw310;
-      break;
-    case kDeviceFpgaCw340:
-      platform_id = kSpiPinmuxPlatformIdCw340;
-      break;
-    default:
-      CHECK(false, "Device not supported %u", kDeviceType);
-      break;
-  }
-  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIob7;
-  CHECK_STATUS_OK(
-      spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
-
-  addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
-  CHECK_DIF_OK(dif_spi_host_init(addr, spi_host));
-
-  CHECK(kClockFreqUsbHz <= UINT32_MAX, "kClockFreqUsbHz must fit in uint32_t");
-
-  CHECK_DIF_OK(dif_spi_host_configure(
-                   spi_host,
-                   (dif_spi_host_config_t){
-                       .spi_clock = 1000000,
-                       .peripheral_clock_freq_hz = (uint32_t)kClockFreqUsbHz,
-                   }),
-               "SPI_HOST config failed!");
-
-  CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, true));
-}
-
-bool test_main(void) {
-  dif_spi_host_t spi_host;
-
-  init_test(&spi_host);
-  enum MacronixVendorSpecific {
-    kManufactureId = 0xC2,
-    kPageQuadProgramOpcode = 0x38,
-  };
-
-  status_t result = OK_STATUS();
-  EXECUTE_TEST(result, test_software_reset, &spi_host);
-  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
-  EXECUTE_TEST(result, test_sector_erase, &spi_host);
-  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufactureId);
-  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
-  EXECUTE_TEST(result, test_page_program, &spi_host);
-  if (is_4_bytes_address_mode_supported()) {
-    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
-  }
-  EXECUTE_TEST(result, test_fast_read, &spi_host);
-  EXECUTE_TEST(result, test_dual_read, &spi_host);
-  EXECUTE_TEST(result, test_quad_read, &spi_host);
-  // The Macronix flash `4PP` opcode operates in 1-4-4 mode.
-  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
-               kPageQuadProgramOpcode, kTransactionWidthMode144);
-  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
-  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
-
-  return status_ok(result);
-}
diff --git a/sw/device/tests/pmod/spi_host_micron512Mb_flash_test.c b/sw/device/tests/pmod/spi_host_micron512Mb_flash_test.c
index 3bce6802c33d0..a71ba165a7285 100644
--- a/sw/device/tests/pmod/spi_host_micron512Mb_flash_test.c
+++ b/sw/device/tests/pmod/spi_host_micron512Mb_flash_test.c
@@ -79,14 +79,14 @@ bool test_main(void) {
    * here.
    */
   enum MicronVendorSpecific {
-    kManufactureId = 0x20,
+    kManufacturerId = 0x20,
   };
 
   status_t result = OK_STATUS();
   EXECUTE_TEST(result, test_software_reset, &spi_host);
   EXECUTE_TEST(result, test_read_sfdp, &spi_host);
   EXECUTE_TEST(result, test_sector_erase, &spi_host);
-  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufactureId);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
   EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
   EXECUTE_TEST(result, test_page_program, &spi_host);
   if (is_4_bytes_address_mode_supported()) {
diff --git a/sw/device/tests/pmod/spi_host_winbond1Gb_flash_test.c b/sw/device/tests/pmod/spi_host_winbond1Gb_flash_test.c
new file mode 100644
index 0000000000000..b50862119d06d
--- /dev/null
+++ b/sw/device/tests/pmod/spi_host_winbond1Gb_flash_test.c
@@ -0,0 +1,97 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+
+#include "sw/device/lib/arch/device.h"
+#include "sw/device/lib/base/macros.h"
+#include "sw/device/lib/base/memory.h"
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_spi_host.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/spi_flash_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/spi_host_flash_test_impl.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static void init_test(dif_spi_host_t *spi_host) {
+  dif_pinmux_t pinmux;
+  mmio_region_t addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pinmux_init(addr, &pinmux));
+
+  spi_pinmux_platform_id_t platform_id = kSpiPinmuxPlatformIdCount;
+  switch (kDeviceType) {
+    case kDeviceSilicon:
+      platform_id = kSpiPinmuxPlatformIdTeacup;
+      break;
+    case kDeviceFpgaCw310:
+      platform_id = kSpiPinmuxPlatformIdCw310;
+      break;
+    case kDeviceFpgaCw340:
+      platform_id = kSpiPinmuxPlatformIdCw340;
+      break;
+    default:
+      CHECK(false, "Device not supported %u", kDeviceType);
+      break;
+  }
+  dif_pinmux_index_t csb_pin = kTopEarlgreyPinmuxMioOutIoa2;
+  CHECK_STATUS_OK(
+      spi_host1_pinmux_connect_to_bob(&pinmux, csb_pin, platform_id));
+
+  addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST1_BASE_ADDR);
+  CHECK_DIF_OK(dif_spi_host_init(addr, spi_host));
+
+  CHECK(kClockFreqUsbHz <= UINT32_MAX, "kClockFreqUsbHz must fit in uint32_t");
+
+  CHECK_DIF_OK(dif_spi_host_configure(
+                   spi_host,
+                   (dif_spi_host_config_t){
+                       .spi_clock = 1000000,
+                       .peripheral_clock_freq_hz = (uint32_t)kClockFreqUsbHz,
+                   }),
+               "SPI_HOST config failed!");
+
+  CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, true));
+}
+
+bool test_main(void) {
+  dif_spi_host_t spi_host;
+
+  init_test(&spi_host);
+  enum WinbondVendorSpecific {
+    kManufacturerId = 0xEF,
+    kPageQuadProgramOpcode = 0x32,
+  };
+
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, test_software_reset, &spi_host);
+  EXECUTE_TEST(result, test_read_sfdp, &spi_host);
+  EXECUTE_TEST(result, test_sector_erase, &spi_host);
+  EXECUTE_TEST(result, test_read_jedec, &spi_host, kManufacturerId);
+  EXECUTE_TEST(result, test_enable_quad_mode, &spi_host);
+  EXECUTE_TEST(result, test_page_program, &spi_host);
+  if (is_4_bytes_address_mode_supported()) {
+    EXECUTE_TEST(result, test_4bytes_address, &spi_host);
+  }
+  EXECUTE_TEST(result, test_fast_read, &spi_host);
+  EXECUTE_TEST(result, test_dual_read, &spi_host);
+  EXECUTE_TEST(result, test_quad_read, &spi_host);
+  // The Winbond flash `4PP` opcode operates in 1-1-4 mode.
+  EXECUTE_TEST(result, test_page_program_quad, &spi_host,
+               kPageQuadProgramOpcode, kTransactionWidthMode114);
+  EXECUTE_TEST(result, test_erase_32k_block, &spi_host);
+  EXECUTE_TEST(result, test_erase_64k_block, &spi_host);
+
+  return status_ok(result);
+}
diff --git a/sw/device/tests/power_virus_systemtest.c b/sw/device/tests/power_virus_systemtest.c
index 33cdddcdf72c6..e41bff45dd678 100644
--- a/sw/device/tests/power_virus_systemtest.c
+++ b/sw/device/tests/power_virus_systemtest.c
@@ -26,12 +26,14 @@
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/aes_testutils.h"
+#include "sw/device/lib/testing/alert_handler_testutils.h"
 #include "sw/device/lib/testing/entropy_testutils.h"
 #include "sw/device/lib/testing/hmac_testutils.h"
 #include "sw/device/lib/testing/i2c_testutils.h"
 #include "sw/device/lib/testing/otbn_testutils_rsa.h"
 #include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_macros.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
@@ -56,30 +58,32 @@ OTTF_DEFINE_TEST_CONFIG(.enable_concurrency = true,
 /**
  * Peripheral DIF Handles.
  */
-static dif_pinmux_t pinmux;
-static dif_gpio_t gpio;
 static dif_adc_ctrl_t adc_ctrl;
-static dif_entropy_src_t entropy_src;
+static dif_aes_t aes;
+static dif_alert_handler_t alert_handler;
 static dif_csrng_t csrng;
 static dif_edn_t edn_0;
 static dif_edn_t edn_1;
-static dif_aes_t aes;
+static dif_entropy_src_t entropy_src;
+static dif_flash_ctrl_state_t flash_ctrl;
+static dif_gpio_t gpio;
 static dif_hmac_t hmac;
-static dif_kmac_t kmac;
-static dif_otbn_t otbn;
 static dif_i2c_t i2c_0;
 static dif_i2c_t i2c_1;
 static dif_i2c_t i2c_2;
+static dif_kmac_t kmac;
+static dif_otbn_t otbn;
+static dif_pattgen_t pattgen;
+static dif_pinmux_t pinmux;
+static dif_pwm_t pwm;
+static dif_rstmgr_t rstmgr;
+static dif_rv_plic_t rv_plic;
 static dif_spi_device_handle_t spi_device;
 static dif_spi_host_t spi_host_0;
 static dif_spi_host_t spi_host_1;
 static dif_uart_t uart_1;
 static dif_uart_t uart_2;
 static dif_uart_t uart_3;
-static dif_pattgen_t pattgen;
-static dif_pwm_t pwm;
-static dif_flash_ctrl_state_t flash_ctrl;
-static dif_rv_plic_t rv_plic;
 
 static const dif_i2c_t *i2c_handles[] = {&i2c_0, &i2c_1, &i2c_2};
 static const dif_uart_t *uart_handles[] = {&uart_1, &uart_2, &uart_3};
@@ -98,7 +102,7 @@ enum {
   /**
    * Maximum number of test iterations in silicon targets.
    */
-  kMaxIterationsSilicon = 1000,
+  kMaxIterationsSilicon = 500,
   /**
    * Test timeout parameter.
    */
@@ -350,6 +354,9 @@ static void init_peripheral_handles(void) {
       mmio_region_from_addr(TOP_EARLGREY_ADC_CTRL_AON_BASE_ADDR), &adc_ctrl));
   CHECK_DIF_OK(
       dif_aes_init(mmio_region_from_addr(TOP_EARLGREY_AES_BASE_ADDR), &aes));
+  CHECK_DIF_OK(dif_alert_handler_init(
+      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
+      &alert_handler));
   CHECK_DIF_OK(dif_csrng_init(
       mmio_region_from_addr(TOP_EARLGREY_CSRNG_BASE_ADDR), &csrng));
   CHECK_DIF_OK(
@@ -391,6 +398,8 @@ static void init_peripheral_handles(void) {
       mmio_region_from_addr(TOP_EARLGREY_PATTGEN_BASE_ADDR), &pattgen));
   CHECK_DIF_OK(dif_pwm_init(
       mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR), &pwm));
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
   CHECK_DIF_OK(dif_flash_ctrl_init_state(
       &flash_ctrl,
       mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
@@ -684,6 +693,13 @@ static void configure_pinmux_sim(void) {
   //    Channel 0 on IOR11
   CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIor11,
                                         kTopEarlgreyPinmuxOutselPwmAonPwm0));
+
+  // Configure fast slew rate, strong drive strength, and weak pull-ups for SPI
+  // Host 0 pads.
+  CHECK_STATUS_OK(spi_host_testutils_configure_host0_pad_attrs(&pinmux));
+
+  // Configure fast slew rate and strong drive strength for SPI device pads.
+  CHECK_STATUS_OK(spi_device_testutils_configure_pad_attrs(&pinmux));
 }
 
 /**
@@ -727,6 +743,34 @@ static void configure_entropy_complex(void) {
   // requires temporarily disabling it.
   CHECK_STATUS_OK(entropy_testutils_stop_all());
 
+  uint32_t recoverable_alerts = 0;
+  CHECK_DIF_OK(dif_entropy_src_get_recoverable_alerts(&entropy_src,
+                                                      &recoverable_alerts));
+  if (recoverable_alerts != 0) {
+    LOG_INFO("entropy_src - clearing recoverable alerts: %x",
+             recoverable_alerts);
+    CHECK_DIF_OK(dif_entropy_src_clear_recoverable_alerts(&entropy_src,
+                                                          recoverable_alerts));
+  }
+
+  CHECK_DIF_OK(dif_csrng_get_recoverable_alerts(&csrng, &recoverable_alerts));
+  if (recoverable_alerts != 0) {
+    LOG_INFO("csrng - clearing recoverable alerts: %x", recoverable_alerts);
+    CHECK_DIF_OK(dif_csrng_clear_recoverable_alerts(&csrng));
+  }
+
+  CHECK_DIF_OK(dif_edn_get_recoverable_alerts(&edn_0, &recoverable_alerts));
+  if (recoverable_alerts != 0) {
+    LOG_INFO("edn_0 - clearing recoverable alerts: %x", recoverable_alerts);
+    CHECK_DIF_OK(dif_edn_clear_recoverable_alerts(&edn_0));
+  }
+
+  CHECK_DIF_OK(dif_edn_get_recoverable_alerts(&edn_1, &recoverable_alerts));
+  if (recoverable_alerts != 0) {
+    LOG_INFO("edn_1 - clearing recoverable alerts: %x", recoverable_alerts);
+    CHECK_DIF_OK(dif_edn_clear_recoverable_alerts(&edn_1));
+  }
+
   // Enable entropy_src interrupts for health-test alert detection.
   CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
       &rv_plic, kTopEarlgreyPlicIrqIdEntropySrcEsHealthTestFailed, 0x1));
@@ -989,7 +1033,8 @@ void configure_pattgen(void) {
             .seed_pattern_upper_word = kPattgenSeedPatternUpperWord,
             .seed_pattern_length = kPattgenSeedPatternLength,
             .num_pattern_repetitions = kPattgenNumPatternRepetitions,
-
+            .inactive_level_pda = false,
+            .inactive_level_pcl = false,
         }));
   }
 }
@@ -1126,6 +1171,7 @@ static void crypto_data_load(void) {
 
 static void crypto_data_load_task(void *task_parameters) {
   while (test_stage != kPowerVirusTestStageComplete) {
+    LOG_INFO("Crypto data load task running ...");
     if (test_stage == kPowerVirusTestStageCryptoDataLoad) {
       crypto_data_load();
       test_stage = kPowerVirusTestStageCommsDataLoad;
@@ -1152,10 +1198,13 @@ static void comms_data_load(void) {
   // Load data into I2C FIFOs.
   static_assert(ARRAYSIZE(i2c_handles) < UINT8_MAX,
                 "Length of i2c_handles must fit in uint8_t");
-  for (uint8_t i = 0; i < ARRAYSIZE(i2c_handles); ++i) {
-    CHECK_STATUS_OK(i2c_testutils_write(i2c_handles[i], /*addr=*/i + 1,
-                                        I2C_PARAM_FIFO_DEPTH - 1, kI2cMessage,
-                                        /*skip_stop=*/false));
+  if (kDeviceType == kDeviceSimDV) {
+    for (uint8_t i = 0; i < ARRAYSIZE(i2c_handles); ++i) {
+      LOG_INFO("Loading I2C FIFO %d with data ...", i);
+      CHECK_STATUS_OK(i2c_testutils_write(i2c_handles[i], /*addr=*/i + 1,
+                                          I2C_PARAM_FIFO_DEPTH - 1, kI2cMessage,
+                                          /*skip_stop=*/false));
+    }
   }
 
   // Load data into SPI host (1; as 0 is used in passthrough mode) FIFO.
@@ -1297,6 +1346,16 @@ static void max_power(void) {
   mmio_region_write32(csrng.base_addr, CSRNG_CMD_REQ_REG_OFFSET,
                       csrng_reseed_cmd);
 
+  // This is required to avoid triggering a recoverable alert in the next
+  // test iteration. CSRNG does not accept the instantiate command when it
+  // has been previously instantiated.
+  csrng_wait_ready();
+  mmio_region_write32(csrng.base_addr, CSRNG_CMD_REQ_REG_OFFSET,
+                      csrng_cmd_header_build(kCsrngAppCmdUninstantiate,
+                                             kDifCsrngEntropySrcToggleEnable,
+                                             /*cmd_len=*/0,
+                                             /*generate_len=*/0));
+
   // Issue HMAC process and KMAC squeeze commands.
   kmac_operation_state.squeezing = true;
   mmio_region_write32(kmac.base_addr, KMAC_CMD_REG_OFFSET, kmac_cmd_reg);
@@ -1447,6 +1506,15 @@ bool test_main(void) {
   // Initialize and configure all IPs.
   // ***************************************************************************
   init_peripheral_handles();
+
+  if (kDeviceType == kDeviceSilicon || kDeviceType == kDeviceFpgaCw310 ||
+      kDeviceType == kDeviceFpgaCw340) {
+    CHECK_STATUS_OK(alert_handler_testutils_status_log(&alert_handler));
+    CHECK_STATUS_OK(alert_handler_testutils_dump_log(&rstmgr));
+    CHECK_STATUS_OK(
+        alert_handler_testutils_dump_enable(&alert_handler, &rstmgr));
+  }
+
   configure_pinmux();
   // To be compatible with the configs in chip_if.sv,
   // apply the additional pinmux settings.
diff --git a/sw/device/tests/pwm_smoketest.c b/sw/device/tests/pwm_smoketest.c
new file mode 100644
index 0000000000000..0bc61c8e1c4a2
--- /dev/null
+++ b/sw/device/tests/pwm_smoketest.c
@@ -0,0 +1,99 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdint.h>
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_gpio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_pwm.h"
+#include "sw/device/lib/runtime/hart.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ottf_utils.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+static volatile const uint8_t kClocksHz[] = {24, 48, 96};
+static volatile const uint8_t kDutyCycles[] = {11, 36, 50, 71, 91};
+
+static dif_pwm_config_t compute_clk_config(uint32_t pwm_clk) {
+  enum {
+    kDutyCycleResolution = 5,
+    kBeatsPerCycle = 1 << (kDutyCycleResolution + 1),  // 2 ^ (DC_RESN + 1)
+  };
+  return (dif_pwm_config_t){
+      .beats_per_pulse_cycle = kBeatsPerCycle,
+      .clock_divisor =
+          ((uint32_t)kClockFreqAonHz / (kBeatsPerCycle * pwm_clk)) - 1};
+}
+
+bool test_main(void) {
+  dif_pwm_t pwm;
+  mmio_region_t addr = mmio_region_from_addr(TOP_EARLGREY_PWM_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pwm_init(addr, &pwm));
+
+  dif_pinmux_t pinmux;
+  addr = mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR);
+  CHECK_DIF_OK(dif_pinmux_init(addr, &pinmux));
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopEarlgreyPinmuxMioOutIoa8,
+                                        kTopEarlgreyPinmuxOutselPwmAonPwm0));
+
+  dif_gpio_t gpio;
+  addr = mmio_region_from_addr(TOP_EARLGREY_GPIO_BASE_ADDR);
+  CHECK_DIF_OK(dif_gpio_init(addr, &gpio));
+  CHECK_DIF_OK(dif_gpio_output_set_enabled_all(&gpio, 0x1));
+
+  // The host uses IOA7 to let the device know when the sampling started.
+  CHECK_DIF_OK(dif_pinmux_input_select(&pinmux,
+                                       kTopEarlgreyPinmuxPeripheralInGpioGpio0,
+                                       kTopEarlgreyPinmuxInselIoa7));
+
+  for (size_t i = 0; i < ARRAYSIZE(kClocksHz); ++i) {
+    dif_pwm_config_t pwm_config = compute_clk_config(kClocksHz[i]);
+    for (size_t j = 0; j < ARRAYSIZE(kDutyCycles); ++j) {
+      dif_pwm_channel_config_t channel_config = {
+          .duty_cycle_a = (uint16_t)(pwm_config.beats_per_pulse_cycle *
+                                     kDutyCycles[j] / 100),
+          .duty_cycle_b = 0,
+          .phase_delay = 0,
+          .mode = kDifPwmModeFirmware,
+          .polarity = kDifPwmPolarityActiveHigh,
+          .blink_parameter_x = 0,
+          .blink_parameter_y = 0,
+      };
+
+      CHECK_DIF_OK(dif_pwm_configure(&pwm, pwm_config));
+      CHECK_DIF_OK(
+          dif_pwm_configure_channel(&pwm, kDifPwmChannel0, channel_config));
+
+      // The IOA7 goes low when the host is sampling.
+      bool not_sampling = true;
+      do {
+        CHECK_DIF_OK(dif_gpio_read(&gpio, 0, &not_sampling));
+        if (!not_sampling) {  // Debounce
+          busy_spin_micros(50);
+          CHECK_DIF_OK(dif_gpio_read(&gpio, 0, &not_sampling));
+        }
+      } while (not_sampling);
+
+      CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleEnabled));
+      CHECK_DIF_OK(dif_pwm_channel_set_enabled(&pwm, kDifPwmChannel0,
+                                               kDifToggleEnabled));
+
+      // The goes high when the host stop sampling.
+      do {
+        CHECK_DIF_OK(dif_gpio_read(&gpio, 0, &not_sampling));
+      } while (!not_sampling);
+
+      CHECK_DIF_OK(dif_pwm_channel_set_enabled(&pwm, kDifPwmChannel0,
+                                               kDifToggleDisabled));
+      CHECK_DIF_OK(dif_pwm_phase_cntr_set_enabled(&pwm, kDifToggleDisabled));
+    }
+  }
+  return true;
+}
diff --git a/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c b/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c
index 0c0ec40330f72..fb69170410ade 100644
--- a/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c
+++ b/sw/device/tests/pwrmgr_deep_sleep_all_wake_ups.c
@@ -35,7 +35,10 @@
   #5 is excluded because sensor_ctrl is not in the aon domain.
  */
 
-OTTF_DEFINE_TEST_CONFIG();
+// Test handles its own alerts.
+// `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
+// give us enough time to disable it specifically.
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Clean up pwrmgr wakeup reason register for the next round.
diff --git a/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c b/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c
index 855e8df45848b..5df3d3aa9d634 100644
--- a/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c
+++ b/sw/device/tests/pwrmgr_normal_sleep_all_wake_ups.c
@@ -33,7 +33,10 @@
 
  */
 
-OTTF_DEFINE_TEST_CONFIG();
+// Test handles its own alerts.
+// `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
+// give us enough time to disable it specifically.
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 bool test_main(void) {
   // Enable global and external IRQ at Ibex.
diff --git a/sw/device/tests/pwrmgr_sleep_wake_5_bug_test.c b/sw/device/tests/pwrmgr_sleep_wake_5_bug_test.c
index 0b0cb827f9cda..b469b1d1151f8 100644
--- a/sw/device/tests/pwrmgr_sleep_wake_5_bug_test.c
+++ b/sw/device/tests/pwrmgr_sleep_wake_5_bug_test.c
@@ -33,7 +33,10 @@
   This is tracked by a retention sram counter, given there are resets involved.
  */
 
-OTTF_DEFINE_TEST_CONFIG();
+// Test handles its own alerts.
+// `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
+// give us enough time to disable it specifically.
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
 
 /**
  * Clean up pwrmgr wakeup reason register for the next round.
diff --git a/sw/device/tests/qemu/BUILD b/sw/device/tests/qemu/BUILD
new file mode 100644
index 0000000000000..22c731a6b4342
--- /dev/null
+++ b/sw/device/tests/qemu/BUILD
@@ -0,0 +1,74 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//rules/opentitan:defs.bzl",
+    "opentitan_test",
+    "qemu_params",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+opentitan_test(
+    name = "i2c_qemu_test",
+    srcs = ["i2c_qemu_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+    },
+    qemu = qemu_params(
+        qemu_args = [
+            "-device",
+            "ds1338,bus=ot-i2c0,address=0x77",
+            "-device",
+            "ds1338,bus=ot-i2c1,address=0x77",
+            "-device",
+            "ds1338,bus=ot-i2c2,address=0x77",
+            "-device",
+            "i2c-echo,bus=ot-i2c0,address=0x2e",
+            "-device",
+            "i2c-echo,bus=ot-i2c1,address=0x2e",
+            "-device",
+            "i2c-echo,bus=ot-i2c2,address=0x2e",
+        ],
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:i2c",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:i2c_testutils",
+        "//sw/device/lib/testing:rv_core_ibex_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
+
+opentitan_test(
+    name = "i2c_qemu_target_device_test",
+    srcs = ["i2c_qemu_target_device_test.c"],
+    exec_env = {
+        "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+        "//hw/top_earlgrey:sim_qemu_sival_rom_ext": None,
+    },
+    qemu = qemu_params(
+        test_harness = "//sw/host/tests/qemu:i2c_target",
+    ),
+    deps = [
+        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
+        "//sw/device/lib/arch:device",
+        "//sw/device/lib/base:memory",
+        "//sw/device/lib/base:mmio",
+        "//sw/device/lib/dif:i2c",
+        "//sw/device/lib/dif:rv_plic",
+        "//sw/device/lib/runtime:hart",
+        "//sw/device/lib/runtime:log",
+        "//sw/device/lib/runtime:print",
+        "//sw/device/lib/testing:i2c_testutils",
+        "//sw/device/lib/testing:rv_core_ibex_testutils",
+        "//sw/device/lib/testing/test_framework:ottf_main",
+    ],
+)
diff --git a/sw/device/tests/qemu/i2c_qemu_target_device_test.c b/sw/device/tests/qemu/i2c_qemu_target_device_test.c
new file mode 100644
index 0000000000000..ac1d5110d2f0d
--- /dev/null
+++ b/sw/device/tests/qemu/i2c_qemu_target_device_test.c
@@ -0,0 +1,298 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_i2c.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/testing/i2c_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "i2c_regs.h"  // Generated.
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/*
+ * This test emulates a simple memory device over Opentitan's I2C target mode.
+ * The device consists of a 256-byte memory that can be written and read.
+ *
+ * On a write transfer to the device, the first byte written sets the pointer
+ * to which subsequent bytes are written to and read from.
+ * Subsequent written bytes set the value in memory at the pointer's location
+ * and increment it. Reads from the device read from the memory at the
+ * pointer's location and increment it.
+ *
+ * We also listen for another address on the I2C bus. Writes to that address
+ * are used to signal successful termination of the test with a magic value.
+ *
+ * This test runs in QEMU. Read and write transfers should be performed with
+ * Opentitantool.
+ */
+
+enum {
+  kHart = kTopEarlgreyPlicTargetIbex0,
+  // Our address on the bus. On this address, emulates a memory device
+  kI2cTargetMemoryDeviceAddr = 0x40u,
+  // Second address for our device. Sending a magic value to this address causes
+  // the test to terminate successfully.
+  kI2cTargetMagicDeviceAddr = 0x41u,
+  // Our address mask for I2C target mode: All 1s except least significant bit,
+  // to match addresses 0x40 and 0x41
+  kI2cTargetDeviceMask = 0x7eu,
+  // TX level threshold and how much to fill to for device reads
+  kTxThreshold = 4u,
+  kTxFill = 2u * kTxThreshold,
+  // Memory device memory size
+  kMemorySize = 256u,
+  // Magic number to terminate the test successfully
+  kMagic = 0xaau,
+};
+
+static_assert(
+    kMemorySize <= 256u,
+    "Memory size must be at most the number of representable byte values");
+
+static dif_i2c_t i2cs[3];
+static dif_rv_plic_t plic;
+
+// Memory device that Opentitan will be emulating in I2C Target Mode
+struct device {
+  /* Memory data */
+  uint8_t data[kMemorySize];
+  // Index into memory data, set by first write on byte and then
+  // auto-incremented on read/write byte
+  uint8_t ptr;
+  // Whether the next byte is the first byte to set the memory pointer
+  bool first_byte;
+  // Target used for this transfer, used by the device to emulate different
+  // functionality based on the address used
+  uint8_t address;
+};
+
+static struct device devices[3];
+
+static volatile bool quit;
+static volatile status_t isr_status;
+
+static status_t external_isr(void);
+
+void ottf_external_isr(uint32_t *exc_info) {
+  OT_DISCARD(exc_info);
+  isr_status = external_isr();
+}
+
+// Fill TX FIFO with memory data
+status_t i2c_mem_device_tx_fill(size_t i2c_idx) {
+  dif_i2c_t *i2c = &i2cs[i2c_idx];
+  struct device *device = &devices[i2c_idx];
+  dif_i2c_level_t tx_lvl;
+  do {
+    TRY(dif_i2c_transmit_byte(i2c, device->data[device->ptr]));
+    device->ptr = (device->ptr + 1) % kMemorySize;
+    TRY(dif_i2c_get_fifo_levels(i2c, NULL, NULL, &tx_lvl, NULL));
+  } while (tx_lvl < kTxFill);
+  return OK_STATUS();
+}
+
+status_t i2c_mem_device_start(size_t i2c_idx, uint8_t data) {
+  dif_i2c_t *i2c = &i2cs[i2c_idx];
+  struct device *device = &devices[i2c_idx];
+  device->first_byte = true;
+  if ((data & 0x1u) == 1u) {
+    // is a read command, enable tx threshold interrupts and queue
+    // response bytes, reading from the memory
+    TRY(dif_i2c_reset_tx_fifo(i2c));
+    TRY(i2c_mem_device_tx_fill(i2c_idx));
+    TRY(dif_i2c_set_target_watermarks(i2c, /*tx level=*/kTxThreshold,
+                                      /* acq_level */ 0u));
+    TRY(dif_i2c_irq_set_enabled(i2c, kDifI2cIrqTxThreshold, kDifToggleEnabled));
+  }
+  return OK_STATUS();
+}
+
+status_t i2c_mem_device_process_byte(size_t i2c_idx, uint8_t data) {
+  struct device *device = &devices[i2c_idx];
+  // Only received during an ongoing write transaction, so this is a write
+  // command
+  if (device->first_byte) {
+    device->first_byte = false;
+    device->ptr = data;
+  } else {
+    device->data[device->ptr] = data;
+    device->ptr = (device->ptr + 1) % kMemorySize;
+  }
+  return OK_STATUS();
+}
+
+status_t i2c_mem_device_stop(size_t i2c_idx) {
+  dif_i2c_t *i2c = &i2cs[i2c_idx];
+  TRY(dif_i2c_irq_set_enabled(i2c, kDifI2cIrqTxThreshold, kDifToggleDisabled));
+  TRY(dif_i2c_set_target_watermarks(i2c, /*tx level=*/0u,
+                                    /* acq_level */ 0u));
+  TRY(dif_i2c_reset_tx_fifo(i2c));
+  return OK_STATUS();
+}
+
+// Handle I2C transaction state change and data write
+status_t i2c_device_process_byte(size_t i2c_idx, uint8_t data,
+                                 dif_i2c_signal_t signal) {
+  struct device *device = &devices[i2c_idx];
+  switch (signal) {
+    case kDifI2cSignalStart:
+      device->address = (data >> 1u);
+      if (device->address == kI2cTargetMemoryDeviceAddr) {
+        // emulate the memory device
+        TRY(i2c_mem_device_start(i2c_idx, data));
+      } else if (device->address != kI2cTargetMagicDeviceAddr) {
+        // unreachable
+        return ABORTED();
+      }
+      break;
+    case kDifI2cSignalStop:
+      if (device->address == kI2cTargetMemoryDeviceAddr) {
+        // emulate the memory device
+        TRY(i2c_mem_device_stop(i2c_idx));
+      } else if (device->address != kI2cTargetMagicDeviceAddr) {
+        // unreachable
+        return ABORTED();
+      }
+      break;
+    case kDifI2cSignalNone:
+      if (device->address == kI2cTargetMemoryDeviceAddr) {
+        TRY(i2c_mem_device_process_byte(i2c_idx, data));
+      } else if (device->address == kI2cTargetMagicDeviceAddr) {
+        // quit if magic value was written
+        quit = (data == kMagic);
+      } else {
+        // unreachable
+        return ABORTED();
+      }
+      break;
+    default:
+      return ABORTED();
+  }
+  return OK_STATUS();
+}
+
+status_t i2c_device_acq_bytes(size_t i2c_idx) {
+  dif_i2c_t *i2c = &i2cs[i2c_idx];
+  dif_i2c_status_t status;
+  do {
+    uint8_t acq_byte = 0u;
+    dif_i2c_signal_t signal = kDifI2cSignalNone;
+    TRY(dif_i2c_acquire_byte(i2c, &acq_byte, &signal));
+    TRY(i2c_device_process_byte(i2c_idx, acq_byte, signal));
+    TRY(dif_i2c_get_status(i2c, &status));
+  } while (!status.acq_fifo_empty);
+  return OK_STATUS();
+}
+
+status_t i2c_device_emulate(size_t i2c_idx, dif_i2c_irq_t irq) {
+  if (irq == kDifI2cIrqAcqThreshold) {
+    TRY(i2c_device_acq_bytes(i2c_idx));
+  } else if (irq == kDifI2cIrqTxThreshold) {
+    TRY(i2c_mem_device_tx_fill(i2c_idx));
+  } else {
+    // Unexpected IRQ
+    return ABORTED();
+  }
+  return OK_STATUS();
+}
+
+static status_t i2c_setup(dif_i2c_t *i2c) {
+  dif_i2c_id_t i2c_address = {.address = kI2cTargetMemoryDeviceAddr,
+                              .mask = kI2cTargetDeviceMask};
+  TRY(dif_i2c_set_device_id(i2c, &i2c_address, NULL));
+  TRY(dif_i2c_set_target_watermarks(i2c, /*tx level=*/0u,
+                                    /* acq_level */ 0u));
+  TRY(dif_i2c_device_set_enabled(i2c, kDifToggleEnabled));
+  return OK_STATUS();
+}
+
+static status_t external_isr(void) {
+  dif_rv_plic_irq_id_t plic_irq_id;
+  // Claim IRQ
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&plic, kHart, &plic_irq_id));
+
+  top_earlgrey_plic_peripheral_t peripheral = (top_earlgrey_plic_peripheral_t)
+      top_earlgrey_plic_interrupt_for_peripheral[plic_irq_id];
+
+  size_t i2c_idx = 0;
+  dif_i2c_irq_t i2c_irq_id = 0;
+  switch (peripheral) {
+    case kTopEarlgreyPlicPeripheralI2c0:
+      i2c_idx = 0;
+      i2c_irq_id = (dif_i2c_irq_t)(plic_irq_id -
+                                   (dif_rv_plic_irq_id_t)
+                                       kTopEarlgreyPlicIrqIdI2c0FmtThreshold);
+      break;
+    case kTopEarlgreyPlicPeripheralI2c1:
+      i2c_idx = 1;
+      i2c_irq_id = (dif_i2c_irq_t)(plic_irq_id -
+                                   (dif_rv_plic_irq_id_t)
+                                       kTopEarlgreyPlicIrqIdI2c1FmtThreshold);
+      break;
+    case kTopEarlgreyPlicPeripheralI2c2:
+      i2c_idx = 2;
+      i2c_irq_id = (dif_i2c_irq_t)(plic_irq_id -
+                                   (dif_rv_plic_irq_id_t)
+                                       kTopEarlgreyPlicIrqIdI2c2FmtThreshold);
+      break;
+    default:
+      CHECK(false, "Interrupt from unexpected peripheral triggered");
+  }
+
+  status_t ret = i2c_device_emulate(i2c_idx, i2c_irq_id);
+
+  // Acknowledge IRQ and return
+  CHECK_DIF_OK(dif_i2c_irq_acknowledge(&i2cs[i2c_idx], i2c_irq_id));
+  CHECK_DIF_OK(dif_rv_plic_irq_complete(&plic, kHart, plic_irq_id));
+  return ret;
+}
+
+bool test_main(void) {
+  memset(&devices, 0u, sizeof(devices));
+
+  const uintptr_t kI2cBaseAddrs[3] = {TOP_EARLGREY_I2C0_BASE_ADDR,
+                                      TOP_EARLGREY_I2C1_BASE_ADDR,
+                                      TOP_EARLGREY_I2C2_BASE_ADDR};
+
+  for (size_t i = 0; i < ARRAYSIZE(i2cs); i++) {
+    mmio_region_t i2c_region;
+    i2c_region = mmio_region_from_addr(kI2cBaseAddrs[i]);
+    CHECK_DIF_OK(dif_i2c_init(i2c_region, &i2cs[i]));
+    CHECK_STATUS_OK(i2c_setup(&i2cs[i]));
+  }
+
+  mmio_region_t plic_region =
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  CHECK_DIF_OK(dif_rv_plic_init(plic_region, &plic));
+
+  rv_plic_testutils_irq_range_enable(&plic, kHart,
+                                     kTopEarlgreyPlicIrqIdI2c0FmtThreshold,
+                                     kTopEarlgreyPlicIrqIdI2c2HostTimeout);
+
+  for (size_t i = 0; i < ARRAYSIZE(i2cs); i++) {
+    CHECK_DIF_OK(dif_i2c_irq_set_enabled(&i2cs[i], kDifI2cIrqAcqThreshold,
+                                         kDifToggleEnabled));
+  }
+
+  quit = false;
+  isr_status = OK_STATUS();
+
+  irq_external_ctrl(true);
+  LOG_INFO("SYNC: Device Ready");
+
+  ATOMIC_WAIT_FOR_INTERRUPT(quit == true || !status_ok(isr_status));
+
+  return status_ok(isr_status);
+}
diff --git a/sw/device/tests/qemu/i2c_qemu_test.c b/sw/device/tests/qemu/i2c_qemu_test.c
new file mode 100644
index 0000000000000..ed067d402996a
--- /dev/null
+++ b/sw/device/tests/qemu/i2c_qemu_test.c
@@ -0,0 +1,142 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+#include <assert.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_i2c.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/i2c_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "i2c_regs.h"  // Generated.
+
+static_assert(__BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__,
+              "This test assumes the target platform is little endian.");
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/*
+ * This test runs in QEMU and expects a DS1338 with address
+ * `kDsDeviceAddr` and an i2c-echo device with address
+ * `kEchoDeviceAddr` on each i2c bus. Use the following
+ * flags in QEMU to create these devices:
+ *
+ * -device ds1338,bus=ot-i2c<0-2>,address=<kDsDeviceAddr>
+ * -device i2c-echo,bus=ot-i2c<0-2>,address=<kEchoDeviceAddr>
+ */
+
+enum {
+  // Address of the DS1338 device on each bus.
+  kDsDeviceAddr = 0x77,
+  // Start of NVRAM register in DS1338.
+  kDsNvramBaseAddr = 0x8,
+  // DS1338 NVRAM size.
+  kDsNvramSize = 56,
+  // Address of our i2c-echo devices on each bus.
+  kEchoDeviceAddr = 0x2e,
+  // Our address on the I2C bus for target mode.
+  kI2cDeviceTargetAddr = 0x43,
+  // Arbitrary payload data.
+  kPayloadData1 = 0xc8,
+  // Arbitrary payload data.
+  kPayloadData2 = 0x6b,
+  // Read timeout.
+  kTimeout = 10000,  // 10 ms
+};
+
+static status_t i2c_setup(dif_i2c_t *i2c, uintptr_t base_addr) {
+  mmio_region_t region = mmio_region_from_addr(base_addr);
+  TRY(dif_i2c_init(region, i2c));
+  TRY(dif_i2c_host_set_enabled(i2c, kDifToggleEnabled));
+  TRY(dif_i2c_device_set_enabled(i2c, kDifToggleEnabled));
+  return OK_STATUS();
+}
+
+status_t i2c_ds1338_test(dif_i2c_t *i2c) {
+  uint8_t resp[kDsNvramSize] = {0};
+  uint8_t i2c_data = kDsNvramBaseAddr;
+
+  // Check NVRAM initially contains all zeroes
+  TRY(i2c_testutils_write(i2c, kDsDeviceAddr, sizeof(uint8_t), &i2c_data,
+                          true));
+  TRY(i2c_testutils_read(i2c, kDsDeviceAddr, ARRAYSIZE(resp), resp, kTimeout));
+  for (size_t i = 0; i < ARRAYSIZE(resp); i++) {
+    TRY_CHECK(resp[i] == 0, "NVRAM should be all zeroes");
+  }
+
+  // Write arbitrary data to NVRAM, with the first byte
+  // setting the pointer to the start of NVRAM.
+  uint8_t payload[kDsNvramSize + 1] = {0};
+  payload[0] = i2c_data;
+  for (size_t i = 1; i < ARRAYSIZE(payload); i++) {
+    payload[i] = (uint8_t)(i * 5);
+  }
+  TRY(i2c_testutils_write(i2c, kDsDeviceAddr, ARRAYSIZE(payload), payload,
+                          false));
+
+  // Read back NVRAM, expecting it to be the same
+  TRY(i2c_testutils_write(i2c, kDsDeviceAddr, sizeof(uint8_t), &i2c_data,
+                          true));
+  TRY(i2c_testutils_read(i2c, kDsDeviceAddr, ARRAYSIZE(resp), resp, kTimeout));
+  TRY_CHECK(memcmp(&payload[1], resp, ARRAYSIZE(resp)) == 0);
+
+  return OK_STATUS();
+}
+
+static status_t i2c_echo_test(dif_i2c_t *i2c) {
+  dif_i2c_id_t i2c_address = {.address = kI2cDeviceTargetAddr, .mask = 0x7f};
+  TRY(dif_i2c_set_device_id(i2c, &i2c_address, NULL));
+
+  // Write our data to the device, consisting of our address
+  // on the bus and 2 payload bytes.
+  uint8_t data[] = {kI2cDeviceTargetAddr, kPayloadData1, kPayloadData2};
+  TRY(i2c_testutils_write(i2c, kEchoDeviceAddr, ARRAYSIZE(data), data, false));
+  TRY(i2c_testutils_wait_transaction_finish(i2c));
+
+  // Check the response, expecting our address and write command
+  // and a start signal, followed by our two payload bytes,
+  // and a stop signal.
+  uint8_t acq_data = 0;
+  dif_i2c_signal_t sig = kDifI2cSignalNone;
+  TRY(dif_i2c_acquire_byte(i2c, &acq_data, &sig));
+  TRY_CHECK((acq_data >> 1) == kI2cDeviceTargetAddr, "Unexpected address");
+  TRY_CHECK((acq_data & 1) == 0, "Expected write command, got read");
+  TRY_CHECK(sig == kDifI2cSignalStart, "Expected START signal");
+
+  TRY(dif_i2c_acquire_byte(i2c, &acq_data, &sig));
+  TRY_CHECK(acq_data == kPayloadData1, "Unexpected payload");
+
+  TRY(dif_i2c_acquire_byte(i2c, &acq_data, &sig));
+  TRY_CHECK(acq_data == kPayloadData2, "Unexpected payload");
+
+  TRY(dif_i2c_acquire_byte(i2c, &acq_data, &sig));
+  TRY_CHECK(sig == kDifI2cSignalStop, "Expected STOP signal");
+
+  TRY(dif_i2c_reset_acq_fifo(i2c));
+
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  dif_i2c_t i2cs[3] = {0};
+
+  const uintptr_t kI2cBaseAddrs[3] = {TOP_EARLGREY_I2C0_BASE_ADDR,
+                                      TOP_EARLGREY_I2C1_BASE_ADDR,
+                                      TOP_EARLGREY_I2C2_BASE_ADDR};
+
+  for (size_t i = 0; i < ARRAYSIZE(i2cs); i++) {
+    CHECK_STATUS_OK(i2c_setup(&i2cs[i], kI2cBaseAddrs[i]));
+  }
+
+  status_t test_result = OK_STATUS();
+  for (size_t i = 0; i < ARRAYSIZE(i2cs); i++) {
+    EXECUTE_TEST(test_result, i2c_ds1338_test, &i2cs[i]);
+    EXECUTE_TEST(test_result, i2c_echo_test, &i2cs[i]);
+  }
+
+  return status_ok(test_result);
+}
diff --git a/sw/device/tests/rom_exit_immediately.S b/sw/device/tests/rom_exit_immediately.S
new file mode 100644
index 0000000000000..bb47cf3ce8afa
--- /dev/null
+++ b/sw/device/tests/rom_exit_immediately.S
@@ -0,0 +1,21 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey_memory.h"
+#include "rv_core_ibex_regs.h"
+
+// This code can be used as the ROM in test environments to exit immediately.
+
+  .balign 4
+  .global _reset_start
+  .type _reset_start, @function
+_reset_start:
+
+// Write exit code 0 to `rv_core_ibex.dv_sim_window[0]` (exit status register).
+li a0, TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR
+li a1, 0x900d
+sw a1, RV_CORE_IBEX_DV_SIM_WINDOW_REG_OFFSET(a0)
+
+// Wait for shutdown.
+wfi
diff --git a/sw/device/tests/rstmgr_alert_info_test.c b/sw/device/tests/rstmgr_alert_info_test.c
index 40f840be95123..4530517e36036 100644
--- a/sw/device/tests/rstmgr_alert_info_test.c
+++ b/sw/device/tests/rstmgr_alert_info_test.c
@@ -255,6 +255,7 @@ static void set_extra_alert(volatile uint32_t *set) {
  * overrides the default OTTF implementation.
  */
 void ottf_external_isr(uint32_t *exc_info) {
+  OT_DISCARD(exc_info);
   top_earlgrey_plic_peripheral_t peripheral;
   dif_rv_plic_irq_id_t irq_id;
   uint32_t irq = 0;
@@ -687,6 +688,9 @@ static void init_expected_cause(void) {
       .alert_info.alert_cause[kTopEarlgreyAlertIdUart2FatalFault] = 1;
   kExpectedInfo[kRound2]
       .alert_info.alert_cause[kTopEarlgreyAlertIdUart3FatalFault] = 1;
+  kExpectedInfo[kRound2]
+      .alert_info.alert_cause[kTopEarlgreyAlertIdOtpCtrlFatalBusIntegError] = 1;
+
   kExpectedInfo[kRound3]
       .alert_info.alert_cause[kTopEarlgreyAlertIdRvCoreIbexRecovSwErr] = 1;
   kExpectedInfo[kRound3]
@@ -697,18 +701,6 @@ static void init_expected_cause(void) {
       .alert_info.alert_cause[kTopEarlgreyAlertIdSpiHost0FatalFault] = 1;
 }
 
-// Modify kExpectedInfo for runs without rom_ext, so non-owner stages. The
-// difference is that without rom_ext we expect an otp alert in round 2.
-static void init_expected_info_for_non_rom_ext(void) {
-  if (kBootStage != kBootStageOwner) {
-    kExpectedInfo[kRound2].alert_info.class_accum_cnt[1] = 1;
-    kExpectedInfo[kRound2].alert_info.class_esc_state[1] = kCstatePhase1;
-    kExpectedInfo[kRound2]
-        .alert_info.alert_cause[kTopEarlgreyAlertIdOtpCtrlFatalBusIntegError] =
-        1;
-  }
-}
-
 bool test_main(void) {
   uint32_t event_idx = 0;
 
@@ -718,7 +710,6 @@ bool test_main(void) {
 
   // set expected values
   init_expected_cause();
-  init_expected_info_for_non_rom_ext();
 
   CHECK_DIF_OK(dif_rstmgr_init(
       mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
diff --git a/sw/device/tests/rv_core_ibex_mem_test.c b/sw/device/tests/rv_core_ibex_mem_test.c
index 016213de0c5f5..16ab31ff188cc 100644
--- a/sw/device/tests/rv_core_ibex_mem_test.c
+++ b/sw/device/tests/rv_core_ibex_mem_test.c
@@ -60,7 +60,10 @@ enum {
 
   kFlashTestLoc = TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR +
                   kBank1StartPageNum * kFlashBytesPerPage,
+  // The ROM_EXT protects itself using regions 0-1.
+  kFlashRegionNum = 5,
 };
+static uint32_t flash_region_index;
 
 // The flash test location is set to the encoding of `jalr x0, 0(x1)`
 // so execution can be tested.
@@ -160,12 +163,33 @@ static void setup_flash(void) {
       .ecc_en = kMultiBitBool4False,
       .high_endurance_en = kMultiBitBool4False};
   dif_flash_ctrl_data_region_properties_t data_region = {
-      .base = kBank1StartPageNum, .size = 0x1, .properties = region_properties};
+      .base = kBank1StartPageNum, .size = 0x2, .properties = region_properties};
+
+  // Added RP - Check for unlocked region
+  for (uint32_t region = 0; region < FLASH_CTRL_PARAM_NUM_REGIONS; region++) {
+    bool locked;
+    LOG_INFO("Testing  REGION 0x%x", region);
+    CHECK_DIF_OK(
+        dif_flash_ctrl_data_region_is_locked(&flash_ctrl, region, &locked));
+    if (!locked) {
+      // We can use this region
+      flash_region_index = region;
+      LOG_INFO("This region is unlocked REGION 0x%x", region);
+      break;
+    }
+    //  dif_flash_ctrl_data_region_properties_t cfg;
+    //  CHECK_DIF_OK(dif_flash_ctrl_get_data_region_properties(&flash, region,
+    //  &cfg));
+    // Avoid this region
+    // if(cfg.size > 0) {
+    //   flash_page_to_test = MAX(flash_page_to_test, cfg.base + cfg.size);
+  }
+  // Check for unlocked region ends
 
-  CHECK_DIF_OK(
-      dif_flash_ctrl_set_data_region_properties(&flash_ctrl, 0, data_region));
-  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_enablement(&flash_ctrl, 0,
-                                                         kDifToggleEnabled));
+  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_properties(
+      &flash_ctrl, flash_region_index, data_region));
+  CHECK_DIF_OK(dif_flash_ctrl_set_data_region_enablement(
+      &flash_ctrl, flash_region_index, kDifToggleEnabled));
 
   // Make flash executable
   CHECK_DIF_OK(
diff --git a/sw/device/tests/sensor_ctrl_alerts.c b/sw/device/tests/sensor_ctrl_alerts_test.c
similarity index 100%
rename from sw/device/tests/sensor_ctrl_alerts.c
rename to sw/device/tests/sensor_ctrl_alerts_test.c
diff --git a/sw/device/tests/sensor_ctrl_wakeup.c b/sw/device/tests/sensor_ctrl_wakeup.c
deleted file mode 100644
index a327bb16ecafc..0000000000000
--- a/sw/device/tests/sensor_ctrl_wakeup.c
+++ /dev/null
@@ -1,142 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_pwrmgr.h"
-#include "sw/device/lib/dif/dif_rv_plic.h"
-#include "sw/device/lib/dif/dif_sensor_ctrl.h"
-#include "sw/device/lib/runtime/ibex.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/pwrmgr_testutils.h"
-#include "sw/device/lib/testing/rv_plic_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "sensor_ctrl_regs.h"  // Generated.
-#include "sw/device/lib/testing/autogen/isr_testutils.h"
-
-OTTF_DEFINE_TEST_CONFIG();
-
-static dif_pwrmgr_t pwrmgr;
-static dif_rv_plic_t plic;
-static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
-                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
-
-static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
-    .pwrmgr = &pwrmgr,
-    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-    .expected_irq = kDifPwrmgrIrqWakeup,
-    .is_only_irq = true};
-
-static bool get_wakeup_status(void) {
-  dif_pwrmgr_request_sources_t wake_req = ~0u;
-  CHECK_DIF_OK(dif_pwrmgr_get_current_request_sources(
-      &pwrmgr, kDifPwrmgrReqTypeWakeup, &wake_req));
-  return (wake_req > 0);
-}
-
-/**
- * External interrupt handler.
- */
-void ottf_external_isr(uint32_t *exc_info) {
-  dif_pwrmgr_irq_t irq_id;
-  top_earlgrey_plic_peripheral_t peripheral;
-
-  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
-
-  // Check that both the peripheral and the irq id is correct
-  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
-        "IRQ peripheral: %d is incorrect", peripheral);
-  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
-}
-
-bool test_main(void) {
-  dif_sensor_ctrl_t sensor_ctrl;
-
-  // Enable global and external IRQ at Ibex.
-  irq_global_ctrl(true);
-  irq_external_ctrl(true);
-
-  // Initialize the PLIC.
-  mmio_region_t plic_base_addr =
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
-  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &plic));
-
-  // Initialize pwrmgr
-  CHECK_DIF_OK(dif_pwrmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
-
-  // Initialize sensor_ctrl
-  CHECK_DIF_OK(dif_sensor_ctrl_init(
-      mmio_region_from_addr(TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR),
-      &sensor_ctrl));
-
-  // Enable all the AON interrupts used in this test.
-  rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
-                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
-
-  // Enable pwrmgr interrupt
-  CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
-
-  // Capture the number of events to test
-  uint32_t sensor_ctrl_events = SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS;
-
-  dif_pwrmgr_domain_config_t sleep_config =
-      kDifPwrmgrDomainOptionMainPowerInLowPower;
-
-  for (size_t i = 0; i < sensor_ctrl_events; ++i) {
-    LOG_INFO("Testing sensor_ctrl event %d", i);
-
-    // Enable the alert on the sensor_ctrl side
-    CHECK_DIF_OK(
-        dif_sensor_ctrl_set_alert_en(&sensor_ctrl, i, kDifToggleEnabled));
-
-    // Setup event trigger
-    CHECK_DIF_OK(dif_sensor_ctrl_set_ast_event_trigger(&sensor_ctrl, i,
-                                                       kDifToggleEnabled));
-
-    // Normal sleep.
-    CHECK_STATUS_OK(pwrmgr_testutils_enable_low_power(
-        &pwrmgr, kDifPwrmgrWakeupRequestSourceSix, sleep_config));
-
-    // Enter low power mode.
-    LOG_INFO("Issue WFI to enter sleep");
-    wait_for_interrupt();
-
-    // Wakeup from sleep.
-    LOG_INFO("Wake from sleep");
-
-    dif_sensor_ctrl_events_t events;
-    CHECK_DIF_OK(dif_sensor_ctrl_get_recov_events(&sensor_ctrl, &events));
-
-    if (events != (1 << i)) {
-      LOG_ERROR("Recoverable event 0x%x does not match expectation %d", events,
-                i);
-    }
-
-    // Disable the alert on the sensor_ctrl side
-    CHECK_DIF_OK(
-        dif_sensor_ctrl_set_alert_en(&sensor_ctrl, i, kDifToggleDisabled));
-
-    // clear event trigger
-    CHECK_DIF_OK(dif_sensor_ctrl_set_ast_event_trigger(&sensor_ctrl, i,
-                                                       kDifToggleDisabled));
-
-    // since there is synchronization delay to trigger clearing and actual event
-    // de-assertion, clear and poll until it is finished before moving on
-    while (events) {
-      CHECK_DIF_OK(dif_sensor_ctrl_clear_recov_event(&sensor_ctrl, i));
-      CHECK_DIF_OK(dif_sensor_ctrl_get_recov_events(&sensor_ctrl, &events));
-    }
-
-    // ensure the de-asserted events have cleared from the wakeup pipeline
-    // within 30us
-    IBEX_SPIN_FOR(!get_wakeup_status(), 30);
-  }
-
-  return true;
-}
diff --git a/sw/device/tests/sensor_ctrl_wakeup_test.c b/sw/device/tests/sensor_ctrl_wakeup_test.c
new file mode 100644
index 0000000000000..394b3745cd0cf
--- /dev/null
+++ b/sw/device/tests/sensor_ctrl_wakeup_test.c
@@ -0,0 +1,150 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/dif/dif_sensor_ctrl.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "sensor_ctrl_regs.h"  // Generated.
+#include "sw/device/lib/testing/autogen/isr_testutils.h"
+
+// Test handles its own alerts.
+// `sensor_ctrl_aon_recov_alert` fires immediately on wake-up which doesn't
+// give us enough time to disable it specifically.
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
+
+static dif_pwrmgr_t pwrmgr;
+static dif_rv_plic_t plic;
+static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
+                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
+
+static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
+    .pwrmgr = &pwrmgr,
+    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+    .expected_irq = kDifPwrmgrIrqWakeup,
+    .is_only_irq = true};
+
+static bool get_wakeup_status(void) {
+  dif_pwrmgr_request_sources_t wake_req = ~0u;
+  CHECK_DIF_OK(dif_pwrmgr_get_current_request_sources(
+      &pwrmgr, kDifPwrmgrReqTypeWakeup, &wake_req));
+  return (wake_req > 0);
+}
+
+/**
+ * External interrupt handler.
+ */
+void ottf_external_isr(uint32_t *exc_info) {
+  dif_pwrmgr_irq_t irq_id;
+  top_earlgrey_plic_peripheral_t peripheral;
+
+  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+
+  // Check that both the peripheral and the irq id is correct
+  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
+        "IRQ peripheral: %d is incorrect", peripheral);
+  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+}
+
+bool test_main(void) {
+  dif_sensor_ctrl_t sensor_ctrl;
+
+  // Enable global and external IRQ at Ibex.
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  // Initialize the PLIC.
+  mmio_region_t plic_base_addr =
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR);
+  CHECK_DIF_OK(dif_rv_plic_init(plic_base_addr, &plic));
+
+  // Initialize pwrmgr
+  CHECK_DIF_OK(dif_pwrmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
+
+  // Initialize sensor_ctrl
+  CHECK_DIF_OK(dif_sensor_ctrl_init(
+      mmio_region_from_addr(TOP_EARLGREY_SENSOR_CTRL_AON_BASE_ADDR),
+      &sensor_ctrl));
+
+  // Enable all the AON interrupts used in this test.
+  rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
+                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
+
+  // Enable pwrmgr interrupt
+  CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
+
+  // Capture the number of events to test
+  uint32_t sensor_ctrl_events = SENSOR_CTRL_PARAM_NUM_ALERT_EVENTS;
+
+  dif_pwrmgr_domain_config_t sleep_config =
+      kDifPwrmgrDomainOptionMainPowerInLowPower;
+
+  // Clear any prior events before we start the test
+  for (size_t i = 0; i < sensor_ctrl_events; ++i) {
+    CHECK_DIF_OK(dif_sensor_ctrl_clear_recov_event(&sensor_ctrl, i));
+  }
+
+  for (size_t i = 0; i < sensor_ctrl_events; ++i) {
+    LOG_INFO("Testing sensor_ctrl event %d", i);
+
+    // Enable the alert on the sensor_ctrl side
+    CHECK_DIF_OK(
+        dif_sensor_ctrl_set_alert_en(&sensor_ctrl, i, kDifToggleEnabled));
+
+    // Setup event trigger
+    CHECK_DIF_OK(dif_sensor_ctrl_set_ast_event_trigger(&sensor_ctrl, i,
+                                                       kDifToggleEnabled));
+
+    // Normal sleep.
+    CHECK_STATUS_OK(pwrmgr_testutils_enable_low_power(
+        &pwrmgr, kDifPwrmgrWakeupRequestSourceSix, sleep_config));
+
+    // Enter low power mode.
+    LOG_INFO("Issue WFI to enter sleep");
+    wait_for_interrupt();
+
+    // Wakeup from sleep.
+    LOG_INFO("Wake from sleep");
+
+    dif_sensor_ctrl_events_t events;
+    CHECK_DIF_OK(dif_sensor_ctrl_get_recov_events(&sensor_ctrl, &events));
+
+    if (events != (1 << i)) {
+      LOG_ERROR("Recoverable event 0x%x does not match expectation %d", events,
+                i);
+    }
+
+    // Disable the alert on the sensor_ctrl side
+    CHECK_DIF_OK(
+        dif_sensor_ctrl_set_alert_en(&sensor_ctrl, i, kDifToggleDisabled));
+
+    // clear event trigger
+    CHECK_DIF_OK(dif_sensor_ctrl_set_ast_event_trigger(&sensor_ctrl, i,
+                                                       kDifToggleDisabled));
+
+    // since there is synchronization delay to trigger clearing and actual event
+    // de-assertion, clear and poll until it is finished before moving on
+    while (events) {
+      CHECK_DIF_OK(dif_sensor_ctrl_clear_recov_event(&sensor_ctrl, i));
+      CHECK_DIF_OK(dif_sensor_ctrl_get_recov_events(&sensor_ctrl, &events));
+    }
+
+    // ensure the de-asserted events have cleared from the wakeup pipeline
+    // within 30us
+    IBEX_SPIN_FOR(!get_wakeup_status(), 30);
+  }
+
+  return true;
+}
diff --git a/sw/device/tests/sigverify_parallel_data.h b/sw/device/tests/sigverify_parallel_data.h
new file mode 100644
index 0000000000000..af622eefe061f
--- /dev/null
+++ b/sw/device/tests/sigverify_parallel_data.h
@@ -0,0 +1,4108 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DATA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DATA_H_
+
+// clang-format off
+const unsigned char sigverify_parallel_data[] = {
+0x79,0x7e,0x00,0xaa,0x4a,0xf3,0x01,0x58,0x8a,0x3b,0xf7,0xf9,0x67,0x61,0x82,0x27, // 00000000 |y~..J..X.;..ga.'|
+0x8d,0x49,0x7d,0xe5,0x9d,0x73,0x49,0xa1,0x43,0x12,0x35,0xcf,0x1b,0x20,0x44,0xb1, // 00000010 |.I}..sI.C.5.. D.|
+0xc7,0xc3,0xc6,0x96,0x6f,0xe5,0xee,0x22,0x39,0x2a,0x38,0x9d,0x51,0x4b,0x97,0x2b, // 00000020 |....o.."9*8.QK.+|
+0xe8,0xf6,0x61,0xae,0x08,0x05,0x13,0x03,0xf3,0xb7,0xe8,0x4e,0x1f,0x75,0x90,0xec, // 00000030 |..a........N.u..|
+0x28,0xcf,0x31,0x50,0x6a,0x57,0x80,0xa4,0xc3,0x0b,0x88,0x09,0x74,0x51,0x1c,0x15, // 00000040 |(.1PjW......tQ..|
+0xbd,0xdc,0x75,0x93,0x53,0x3f,0xb8,0xff,0x2c,0x3c,0xe0,0x1d,0xe9,0x9e,0x60,0x0a, // 00000050 |..u.S?..,<....`.|
+0x65,0xb4,0x14,0x67,0x3a,0xaa,0x0a,0x1a,0x03,0x55,0x7e,0xec,0x41,0xbc,0xb9,0x0b, // 00000060 |e..g:....U~.A...|
+0x9f,0x1a,0xb9,0x8c,0x27,0x7f,0x77,0x4b,0x63,0xf2,0xcb,0x3c,0x76,0xb3,0x8e,0xbd, // 00000070 |....'.wKc..<v...|
+0x7d,0x2c,0x8e,0x0f,0xf8,0x49,0x3a,0x31,0x98,0x14,0x43,0xb1,0xe0,0x5e,0xfc,0xcc, // 00000080 |},...I:1..C..^..|
+0x41,0xa0,0xb9,0xec,0xbf,0x6a,0x33,0xc0,0x73,0xf9,0x90,0x4b,0x64,0xe9,0xca,0xb3, // 00000090 |A....j3.s..Kd...|
+0xcc,0xef,0xc3,0xa0,0x0f,0x80,0xd9,0x7d,0x25,0xa9,0x6c,0xf8,0xf5,0x7e,0xf9,0x53, // 000000a0 |.......}%.l..~.S|
+0x92,0xac,0x60,0xdb,0x40,0xd0,0xb2,0xef,0x56,0x84,0xad,0xcc,0x49,0x16,0x58,0x5b, // 000000b0 |..`.@...V...I.X[|
+0x3c,0x86,0x14,0x42,0x11,0x99,0xc7,0x4a,0x62,0x5e,0x83,0x0f,0xba,0x6e,0x71,0x7c, // 000000c0 |<..B...Jb^...nq||
+0x3b,0x7e,0xfc,0xaa,0xc3,0xc3,0x68,0xe1,0xf3,0xc6,0x39,0xc1,0x99,0xe9,0x33,0xca, // 000000d0 |;~....h...9...3.|
+0x19,0x5d,0x83,0x8b,0xd5,0x79,0xb5,0xe8,0xa9,0x6a,0x49,0x57,0x68,0x12,0xdf,0x16, // 000000e0 |.]...y...jIWh...|
+0x93,0xf7,0xa9,0x8f,0xa9,0x16,0xbd,0x24,0xad,0x42,0x9b,0xb9,0xfb,0xc9,0x1d,0x7a, // 000000f0 |.......$.B.....z|
+0xb5,0x55,0xe7,0xbd,0x34,0x83,0x34,0xb3,0x9a,0x82,0xe4,0x3e,0x16,0x51,0xa5,0x0a, // 00000100 |.U..4.4....>.Q..|
+0xc7,0x32,0x55,0x17,0xf9,0xe3,0x3f,0xda,0x43,0xff,0xcd,0xf8,0x6f,0xd1,0xf3,0x28, // 00000110 |.2U...?.C...o..(|
+0xcb,0x01,0x32,0x74,0xea,0xb2,0x53,0xcb,0x5d,0x35,0xe7,0x12,0xb1,0x67,0xb5,0x5d, // 00000120 |..2t..S.]5...g.]|
+0x8d,0x06,0x94,0x16,0xa0,0x52,0x6b,0x70,0x7b,0xdd,0xab,0x71,0xb6,0xf3,0xd8,0x37, // 00000130 |.....Rkp{..q...7|
+0x47,0x9b,0x52,0x32,0x2e,0xe0,0x1b,0x84,0xd6,0x18,0xca,0x38,0x73,0x2c,0x2b,0xb5, // 00000140 |G.R2.......8s,+.|
+0x65,0xa0,0x14,0x77,0x8f,0x76,0xcc,0x9e,0x83,0x30,0x41,0xf3,0x82,0x58,0x7a,0xe5, // 00000150 |e..w.v...0A..Xz.|
+0xde,0x20,0x33,0x3c,0xc7,0xf5,0x64,0x34,0x80,0x6b,0xf2,0xf3,0xec,0x34,0xab,0x6c, // 00000160 |. 3<..d4.k...4.l|
+0xfd,0xb8,0xfe,0xb1,0xd2,0xd1,0x7f,0xf4,0xd7,0xd0,0x94,0x3b,0xdb,0xe5,0x8f,0x8f, // 00000170 |...........;....|
+0x6d,0x13,0xae,0xec,0x19,0x29,0x11,0x36,0xf2,0x2b,0xe7,0x98,0x75,0xbc,0x33,0x05, // 00000180 |m....).6.+..u.3.|
+0xd1,0x1f,0x17,0x4a,0xde,0xaa,0xab,0xf6,0xe8,0xac,0xc0,0x9c,0x9c,0x63,0xb2,0x30, // 00000190 |...J.........c.0|
+0x09,0x3c,0xd6,0x49,0x27,0xe4,0x0a,0xe3,0x5b,0x7f,0xd4,0xff,0x50,0x34,0xc3,0x03, // 000001a0 |.<.I'...[...P4..|
+0x27,0xc3,0x10,0x88,0x10,0x27,0xa5,0x8f,0xb4,0xac,0xf4,0x2a,0x90,0x2e,0x5e,0xcb, // 000001b0 |'....'.....*..^.|
+0x9c,0x14,0xee,0xaf,0x79,0xc3,0x96,0xab,0x80,0x9a,0xbe,0xf3,0x1a,0x39,0xf8,0xd9, // 000001c0 |....y........9..|
+0x96,0xda,0xee,0xe3,0xba,0x70,0x59,0x19,0xa3,0x68,0x45,0x95,0x0a,0x23,0xc3,0x8f, // 000001d0 |.....pY..hE..#..|
+0x94,0xf1,0x88,0x94,0xba,0xa4,0x01,0x16,0x36,0x56,0x2b,0x3f,0xce,0x2e,0x80,0x84, // 000001e0 |........6V+?....|
+0x16,0x3d,0x18,0xce,0xf4,0xcb,0xf6,0xa9,0xc2,0x94,0x3d,0x7a,0xc3,0xd3,0xe8,0x1f, // 000001f0 |.=........=z....|
+0x4b,0xc7,0x0f,0xb0,0x31,0xcb,0xdc,0x61,0x66,0x4b,0xb5,0xf2,0x5b,0x73,0x0a,0xbe, // 00000200 |K...1..afK..[s..|
+0x4c,0xc0,0x06,0x20,0x17,0xbf,0x71,0x5d,0x42,0x28,0xc0,0x23,0x77,0x6a,0xcb,0xd1, // 00000210 |L.. ..q]B(.#wj..|
+0x5d,0xe9,0x82,0xe4,0x67,0xa4,0x5f,0x02,0x5b,0x0d,0x1d,0xd7,0xa9,0xcf,0xfb,0xb2, // 00000220 |]...g._.[.......|
+0x4d,0x3b,0xd9,0xca,0x2d,0x73,0xb2,0x6a,0x25,0x3d,0x32,0xf0,0x05,0xc6,0x99,0x53, // 00000230 |M;..-s.j%=2....S|
+0xc7,0x41,0xf9,0xf3,0x77,0x3a,0x71,0x4c,0xe2,0x54,0x13,0x6b,0x44,0x02,0xad,0x74, // 00000240 |.A..w:qL.T.kD..t|
+0x3e,0x27,0xe6,0x97,0x11,0x26,0xa6,0xa2,0xf9,0x8f,0x4d,0x2b,0x30,0x5a,0x25,0x12, // 00000250 |>'...&....M+0Z%.|
+0x48,0xf5,0x53,0x0d,0x5b,0xfe,0x59,0x73,0x18,0xf0,0xd0,0xb5,0x50,0xa3,0x46,0x47, // 00000260 |H.S.[.Ys....P.FG|
+0xfd,0x15,0x47,0x7b,0x54,0x51,0x71,0xa3,0xec,0xdf,0xc8,0x7d,0x35,0x40,0xea,0x67, // 00000270 |..G{TQq....}5@.g|
+0xb6,0x99,0x49,0xc0,0xf0,0x65,0x40,0x48,0xc5,0x3b,0xad,0x38,0x04,0x1c,0x79,0xaf, // 00000280 |..I..e@H.;.8..y.|
+0x6a,0x87,0x84,0xa5,0x76,0x56,0xfc,0xad,0x91,0x5d,0x32,0xad,0x41,0x96,0x9a,0x6d, // 00000290 |j...vV...]2.A..m|
+0x70,0xd0,0x9e,0x2f,0xad,0x36,0x14,0x3e,0xdb,0x1b,0x4b,0xb6,0x01,0xa7,0x5a,0xa0, // 000002a0 |p../.6.>..K...Z.|
+0xbe,0x4f,0xb1,0xd5,0xad,0x77,0xab,0x09,0xae,0xeb,0x7f,0x4c,0x70,0xe7,0xde,0xbb, // 000002b0 |.O...w.....Lp...|
+0xdd,0x71,0xa4,0x20,0x78,0xf7,0x68,0x4c,0xf4,0x28,0x6e,0xc8,0x01,0xeb,0x95,0xe8, // 000002c0 |.q. x.hL.(n.....|
+0x51,0xa8,0x04,0xde,0x34,0x5b,0x50,0x60,0xe0,0x08,0x4a,0x51,0x49,0x62,0xc0,0x32, // 000002d0 |Q...4[P`..JQIb.2|
+0xee,0xf7,0xc6,0xcd,0x35,0x83,0xcf,0x90,0xe6,0xa4,0xca,0xdf,0xfc,0x60,0xe2,0x0b, // 000002e0 |....5........`..|
+0x7d,0x9a,0x69,0x1c,0xbf,0x07,0x46,0xde,0xe9,0x5e,0x07,0xe9,0xfb,0x1e,0x7c,0xfa, // 000002f0 |}.i...F..^....|.|
+0xa4,0x4f,0xeb,0x28,0xc7,0x37,0xef,0xc5,0xf3,0x82,0x4b,0xf6,0x31,0x1c,0xa5,0xc5, // 00000300 |.O.(.7....K.1...|
+0x12,0x21,0x6a,0x6d,0x29,0xba,0x46,0x76,0x59,0x3d,0xe0,0x24,0xfa,0x57,0xa8,0xbe, // 00000310 |.!jm).FvY=.$.W..|
+0x18,0x5d,0xea,0x1d,0x76,0xaf,0x9b,0x03,0xa5,0xfd,0xed,0xee,0xc5,0x10,0x8d,0xe3, // 00000320 |.]..v...........|
+0x4e,0x27,0xa2,0xc7,0xcd,0xb4,0xd6,0x58,0xed,0x67,0x2c,0x0c,0xbf,0xc8,0x9b,0xae, // 00000330 |N'.....X.g,.....|
+0xbc,0x3b,0x5f,0x5b,0xc2,0x2f,0xe2,0x6d,0x53,0x7c,0x10,0xc2,0xab,0x31,0xc8,0xf8, // 00000340 |.;_[./.mS|...1..|
+0x27,0x20,0x1d,0x6c,0xdb,0x58,0xac,0x28,0x89,0x71,0x13,0x28,0x41,0x0b,0x51,0x91, // 00000350 |' .l.X.(.q.(A.Q.|
+0x85,0x3d,0xa0,0x80,0x50,0xd1,0xb8,0x24,0xa2,0x2f,0x6c,0xeb,0x1c,0x35,0xb5,0x70, // 00000360 |.=..P..$./l..5.p|
+0x13,0x5c,0xfc,0xc4,0x6c,0xa4,0x2e,0xd8,0xf4,0x71,0x1e,0x22,0x18,0x72,0x5c,0xab, // 00000370 |.\..l....q.".r\.|
+0xe8,0xc5,0x6a,0xfa,0x98,0xb7,0x40,0x7c,0x2f,0x52,0x4a,0x22,0xb2,0x48,0x77,0x90, // 00000380 |..j...@|/RJ".Hw.|
+0xc9,0x25,0x83,0x1b,0x86,0x28,0x7b,0x16,0x1e,0x4f,0xd2,0x55,0x64,0x4c,0xf4,0x7e, // 00000390 |.%...({..O.UdL.~|
+0x0c,0x10,0x8c,0xf4,0xd8,0xb2,0x2f,0x4c,0xea,0x95,0xee,0xb3,0x49,0x87,0x11,0x69, // 000003a0 |....../L....I..i|
+0xe5,0xe3,0x11,0xe8,0x4e,0x43,0xef,0xb0,0x7f,0x05,0x8e,0x9b,0x31,0xf1,0x6a,0xaf, // 000003b0 |....NC......1.j.|
+0x68,0x30,0x68,0xd5,0x60,0x64,0xbb,0x55,0x98,0x4b,0x1c,0x1e,0x1d,0xcd,0xb2,0xe9, // 000003c0 |h0h.`d.U.K......|
+0x1f,0x44,0x58,0x86,0x00,0xe4,0xa1,0x56,0x79,0xc6,0xb2,0x5c,0x82,0xa2,0xec,0xb1, // 000003d0 |.DX....Vy..\....|
+0xd2,0x3a,0x7f,0xbf,0x30,0x0e,0x60,0xa4,0xd4,0x8d,0xb9,0x94,0xcd,0xbe,0xbd,0x21, // 000003e0 |.:..0.`........!|
+0x10,0xd7,0x00,0x6f,0x80,0x1f,0x18,0xf1,0x98,0x8f,0xc2,0x92,0x46,0x9b,0x79,0x96, // 000003f0 |...o........F.y.|
+0xf1,0xcd,0x5d,0xa4,0x1d,0x95,0x89,0xbb,0x2f,0x69,0xe7,0x82,0xfb,0x8c,0x0d,0x1d, // 00000400 |..]...../i......|
+0x12,0xcf,0x5b,0x37,0xad,0x5d,0x95,0xb0,0xa1,0xfd,0xe9,0x6c,0xb9,0x2f,0x9e,0x4d, // 00000410 |..[7.].....l./.M|
+0xea,0x22,0x1b,0x23,0x46,0xfc,0x23,0x89,0xdd,0x7d,0x11,0xc2,0x65,0x5d,0x3b,0x01, // 00000420 |.".#F.#..}..e];.|
+0x59,0x49,0x58,0xb1,0xfb,0x22,0xd0,0x3c,0x90,0x36,0x95,0x97,0x0b,0x05,0xea,0x2f, // 00000430 |YIX..".<.6...../|
+0x8f,0x7a,0x0c,0xc5,0x0f,0xb3,0x07,0x74,0xee,0x5d,0xb9,0xc9,0xa5,0xeb,0x68,0x71, // 00000440 |.z.....t.]....hq|
+0x7d,0x55,0x57,0xfb,0x73,0x10,0x99,0x4c,0xa9,0x1d,0x67,0x99,0x4a,0xf8,0xad,0xfc, // 00000450 |}UW.s..L..g.J...|
+0xe5,0xd3,0x84,0x3e,0x08,0xa3,0xfe,0x8e,0x74,0x2e,0x2f,0x9d,0xc1,0x08,0x2c,0x6b, // 00000460 |...>....t./...,k|
+0xe0,0xf7,0x91,0xb5,0xa7,0x3e,0x1c,0xe0,0x80,0xbf,0xda,0x9a,0xf3,0x73,0x06,0x13, // 00000470 |.....>.......s..|
+0x80,0xc2,0xab,0x6a,0xdd,0xe0,0x20,0xb4,0xd3,0x21,0x9b,0xda,0x72,0x83,0x55,0xb9, // 00000480 |...j.. ..!..r.U.|
+0xf4,0x01,0x7d,0x58,0xa3,0x18,0xd7,0x65,0x12,0xeb,0x96,0x3f,0xe5,0x13,0xd7,0xf5, // 00000490 |..}X...e...?....|
+0x92,0x19,0xe6,0xfb,0x84,0xe2,0x59,0x3a,0x7a,0x89,0x31,0xbd,0xd6,0x55,0x74,0xb5, // 000004a0 |......Y:z.1..Ut.|
+0xaf,0x71,0x3f,0xd1,0x7c,0x75,0x8e,0x82,0xcb,0x39,0xbf,0x9a,0xd1,0x2e,0xbf,0x29, // 000004b0 |.q?.|u...9.....)|
+0xe8,0xff,0xb8,0xe0,0xca,0x98,0x2f,0x34,0xde,0xc9,0x3b,0x86,0x3b,0x66,0xf0,0x38, // 000004c0 |....../4..;.;f.8|
+0xf5,0xc1,0x76,0x24,0x9b,0x86,0x35,0x3c,0x63,0xd8,0x8f,0x0f,0xa3,0xa8,0x22,0x38, // 000004d0 |..v$..5<c....."8|
+0x85,0x66,0x40,0xcd,0x72,0x56,0xa3,0xb3,0xff,0x0d,0xd4,0xde,0xd7,0x4c,0xcd,0x3c, // 000004e0 |.f@.rV.......L.<|
+0x3f,0xe0,0x64,0xe9,0xee,0xef,0xf4,0x2c,0x05,0xb4,0xcf,0x0b,0x46,0xa4,0x44,0x92, // 000004f0 |?.d....,....F.D.|
+0x72,0xd6,0xc6,0x5c,0x79,0x5b,0xba,0xa2,0x4d,0x0a,0x6a,0x7f,0x40,0x14,0x7c,0xa2, // 00000500 |r..\y[..M.j.@.|.|
+0x8c,0xbf,0x04,0xda,0xa1,0x95,0xca,0x79,0x60,0x09,0xce,0xd1,0xd9,0xf5,0xc7,0x34, // 00000510 |.......y`......4|
+0x44,0x82,0x47,0xc9,0x30,0xb6,0x83,0xfb,0xc3,0x51,0xdd,0xbe,0x42,0x28,0x15,0x17, // 00000520 |D.G.0....Q..B(..|
+0x0f,0x94,0x2f,0x6a,0xc0,0x3d,0xf7,0xc6,0xf3,0xa9,0xcf,0xc5,0x1c,0x8a,0xe0,0x6e, // 00000530 |../j.=.........n|
+0x61,0xfd,0xf2,0x27,0xc1,0xb6,0x23,0xb5,0x1f,0x85,0x46,0xe9,0x87,0xfb,0xd6,0xea, // 00000540 |a..'..#...F.....|
+0x88,0x49,0x93,0xf8,0x21,0x01,0xd2,0x8b,0x9d,0xf6,0x57,0x2b,0xcf,0x85,0x30,0xde, // 00000550 |.I..!.....W+..0.|
+0x3a,0x2f,0x3f,0x8f,0x88,0xb6,0x4a,0x17,0x90,0x0d,0xf5,0xd9,0x5c,0x71,0xa7,0x40, // 00000560 |:/?...J.....\q.@|
+0xc0,0xbe,0xeb,0x59,0x51,0xa0,0xc3,0xe1,0x48,0xd1,0xc1,0xbd,0x22,0x9f,0xd3,0xf6, // 00000570 |...YQ...H..."...|
+0x04,0xec,0xa8,0x46,0xe5,0x50,0x72,0xbb,0x00,0x6b,0x12,0xd9,0x6a,0x38,0x16,0xf5, // 00000580 |...F.Pr..k..j8..|
+0x1b,0xc6,0x54,0x7a,0x19,0x25,0xea,0x59,0x80,0xd4,0xee,0xc2,0x16,0xc7,0x08,0x9c, // 00000590 |..Tz.%.Y........|
+0x55,0x7e,0x97,0x5d,0x18,0xed,0xa0,0x11,0xc4,0xb2,0x00,0xa3,0xdb,0x47,0xc8,0xb2, // 000005a0 |U~.].........G..|
+0x3d,0xa7,0x96,0xa6,0xd7,0xcc,0x56,0xba,0xc6,0xbc,0xb1,0x32,0x21,0x7c,0xee,0x8f, // 000005b0 |=.....V....2!|..|
+0xb5,0x9e,0x37,0xbb,0x1f,0x22,0x4d,0x8c,0x84,0xda,0x2e,0x9d,0x41,0x32,0x0e,0xfd, // 000005c0 |..7.."M.....A2..|
+0x47,0x54,0xfc,0x32,0x91,0x4b,0xdb,0x83,0x63,0x69,0x46,0xeb,0xfc,0xbc,0x88,0x33, // 000005d0 |GT.2.K..ciF....3|
+0xf8,0xfb,0xb5,0x76,0x95,0xba,0x2e,0x5d,0x3f,0x12,0x7c,0x56,0x42,0xa9,0x89,0x3f, // 000005e0 |...v...]?.|VB..?|
+0x6a,0x21,0x6c,0xdc,0xf1,0xc6,0xd3,0xcb,0xcb,0xbe,0x6e,0xee,0x72,0x35,0x6b,0x7d, // 000005f0 |j!l.......n.r5k}|
+0xa7,0xb5,0x7d,0x8e,0xe9,0xf1,0x56,0x37,0x7e,0xb0,0x23,0xa2,0x14,0x06,0x08,0x1c, // 00000600 |..}...V7~.#.....|
+0xe8,0xa8,0x22,0xf3,0x6f,0xe6,0xa4,0x85,0x64,0x7a,0x0e,0x67,0x7c,0x04,0x39,0x01, // 00000610 |..".o...dz.g|.9.|
+0x66,0x77,0xf8,0xba,0x2e,0xf2,0x75,0x41,0xe4,0xf3,0xcc,0x09,0x37,0x28,0xde,0xb0, // 00000620 |fw....uA....7(..|
+0x28,0x22,0x71,0x07,0xa6,0x20,0x3b,0x28,0x71,0x29,0xa6,0xa0,0xc2,0x37,0xb6,0xb7, // 00000630 |("q.. ;(q)...7..|
+0x19,0x63,0x2a,0xa2,0xe1,0x26,0xbf,0xb5,0xe4,0x06,0x86,0x88,0x5e,0x84,0x4e,0x7c, // 00000640 |.c*..&......^.N||
+0xd2,0x35,0x35,0x13,0xcd,0x98,0x33,0x96,0xf5,0x2a,0x92,0x72,0x12,0x02,0x91,0x8a, // 00000650 |.55...3..*.r....|
+0xe1,0x68,0x79,0x62,0xb4,0x71,0x08,0xfd,0x82,0x8a,0x77,0x64,0xf4,0xa2,0xf6,0x07, // 00000660 |.hyb.q....wd....|
+0x8a,0xef,0x2c,0x3f,0xf4,0x85,0x01,0xa7,0x8b,0x21,0x0e,0x74,0xf3,0xfd,0x43,0xcf, // 00000670 |..,?.....!.t..C.|
+0xa8,0xc9,0x41,0x9b,0xb2,0x4d,0x05,0xe3,0xd3,0x13,0x9c,0xf0,0xc3,0x69,0xcd,0x9e, // 00000680 |..A..M.......i..|
+0x4a,0xb0,0xac,0x0a,0x09,0x5a,0x59,0xad,0xb3,0x55,0x67,0xe0,0xc1,0x90,0x8c,0x5f, // 00000690 |J....ZY..Ug...._|
+0x98,0xe1,0xc8,0x37,0xb3,0x8c,0x3e,0x8a,0x97,0x56,0x8d,0x31,0xe8,0x02,0x26,0x8b, // 000006a0 |...7..>..V.1..&.|
+0x58,0x1a,0xa1,0xf5,0x7f,0xc5,0x6f,0xa1,0x18,0xf6,0xba,0xc5,0xfa,0xc3,0xd3,0x4b, // 000006b0 |X.....o........K|
+0x7c,0x76,0x3f,0xad,0xe5,0xaa,0x15,0x3a,0x4c,0x48,0x91,0x49,0x54,0x16,0x9c,0x73, // 000006c0 ||v?....:LH.IT..s|
+0x29,0xb9,0xc6,0xe5,0x5f,0x52,0xa8,0x50,0x72,0x35,0x19,0x86,0xd0,0xe8,0x29,0x50, // 000006d0 |)..._R.Pr5....)P|
+0x4b,0xa8,0x02,0x59,0x7b,0xba,0xcf,0x58,0x4f,0xe0,0xc0,0x26,0x61,0xe6,0x70,0x0e, // 000006e0 |K..Y{..XO..&a.p.|
+0x51,0xaf,0xca,0x6d,0x55,0xa6,0x44,0x80,0x4c,0xc6,0x03,0x7b,0xa1,0xf9,0x3a,0xe1, // 000006f0 |Q..mU.D.L..{..:.|
+0x8c,0xbb,0x7c,0x9e,0x5b,0x15,0x5f,0xc6,0x17,0xce,0x70,0x16,0xb2,0x1c,0x7e,0x11, // 00000700 |..|.[._...p...~.|
+0x34,0x6d,0xea,0x1c,0x82,0x0b,0x2c,0xfa,0x22,0xfa,0x41,0x90,0x8b,0xa7,0x72,0x99, // 00000710 |4m....,.".A...r.|
+0x96,0xeb,0x4b,0x4f,0x8d,0x19,0x64,0x4b,0x05,0x50,0x28,0xdb,0x57,0xd7,0xc7,0xb4, // 00000720 |..KO..dK.P(.W...|
+0xea,0x51,0x9c,0xb8,0xc9,0x57,0xfc,0x68,0x3c,0x36,0x93,0x30,0xd3,0xce,0xec,0x9c, // 00000730 |.Q...W.h<6.0....|
+0xa0,0x6d,0xa7,0x8f,0x75,0x42,0xfc,0x3d,0x08,0xbb,0x0b,0xb7,0xf6,0x6c,0x1e,0xd0, // 00000740 |.m..uB.=.....l..|
+0xe0,0x50,0x35,0x5a,0xb1,0x30,0x40,0x7a,0x52,0xbd,0x29,0x0f,0x08,0x1b,0xc7,0x58, // 00000750 |.P5Z.0@zR.)....X|
+0x05,0x22,0x7d,0x4a,0xa8,0x32,0x83,0x5b,0x4c,0x03,0xb7,0x3b,0x55,0x3f,0x82,0xed, // 00000760 |."}J.2.[L..;U?..|
+0xd8,0xcd,0x3d,0x30,0x53,0x60,0x27,0x50,0xc1,0x69,0x0f,0xf2,0xf7,0x4d,0x24,0x9b, // 00000770 |..=0S`'P.i...M$.|
+0x5f,0xe9,0x49,0x97,0x98,0xf7,0x06,0x27,0xad,0xdf,0xfc,0xf9,0x91,0xf8,0xd5,0xec, // 00000780 |_.I....'........|
+0x23,0x81,0xa1,0x45,0x56,0xa7,0x92,0x5e,0x3a,0xc3,0x8a,0xc5,0xaf,0x3c,0x5c,0x37, // 00000790 |#..EV..^:....<\7|
+0xb6,0x73,0x03,0x83,0xe8,0x73,0x7a,0x1a,0x36,0xca,0x3d,0x78,0xe6,0xae,0x10,0xe7, // 000007a0 |.s...sz.6.=x....|
+0x65,0xac,0x42,0x3f,0x1e,0x61,0x7e,0xc2,0x30,0xea,0x38,0x0b,0x9e,0xf2,0xa8,0x6a, // 000007b0 |e.B?.a~.0.8....j|
+0x9d,0xe2,0xa1,0x09,0x38,0x50,0x70,0xfb,0x3b,0x53,0x19,0xf5,0xb7,0x4a,0xe3,0xea, // 000007c0 |....8Pp.;S...J..|
+0x8d,0x27,0x9a,0xa4,0xc7,0x05,0x95,0x4c,0x53,0xa6,0xe8,0xce,0xe6,0x78,0x87,0x4b, // 000007d0 |.'.....LS....x.K|
+0x9c,0x03,0x8b,0xb5,0x36,0x00,0x5d,0x53,0x17,0x1c,0xc5,0xbb,0xa2,0x99,0xdc,0xed, // 000007e0 |....6.]S........|
+0x15,0x68,0x2b,0x40,0x95,0xae,0xbf,0x69,0x5c,0xcb,0x9f,0x01,0x6f,0x7f,0x77,0x64, // 000007f0 |.h+@...i\...o.wd|
+0x35,0x78,0x27,0xa9,0x93,0xbb,0x44,0x4f,0x20,0x32,0x89,0x10,0xbd,0x94,0x4e,0xc4, // 00000800 |5x'...DO 2....N.|
+0xe0,0xb4,0x60,0x5c,0xed,0x64,0x92,0x90,0x23,0xae,0xea,0xc1,0xe3,0xd6,0x23,0xfb, // 00000810 |..`\.d..#.....#.|
+0xdc,0x75,0xbb,0x7e,0x00,0x71,0xc4,0x86,0x7c,0xfa,0x86,0x4a,0xe7,0x1c,0x62,0xe2, // 00000820 |.u.~.q..|..J..b.|
+0x35,0x1f,0x29,0x6d,0x8b,0xe9,0x1c,0xe2,0x8b,0x3e,0xe1,0xd3,0xfb,0x97,0xfb,0x0b, // 00000830 |5.)m.....>......|
+0xac,0xae,0xb6,0x53,0x3e,0x70,0x04,0xbc,0x13,0x63,0xf3,0xbc,0xbd,0x6b,0xde,0x5c, // 00000840 |...S>p...c...k.\|
+0x91,0x98,0x28,0xbf,0xca,0x99,0xa4,0x05,0x12,0xb6,0x77,0x87,0xd8,0x7f,0xd8,0x1b, // 00000850 |..(.......w.....|
+0x63,0x77,0xd1,0x08,0x0c,0xdb,0x43,0x8f,0x3b,0x3a,0x9c,0xea,0x2b,0x50,0x85,0xf3, // 00000860 |cw....C.;:..+P..|
+0xa8,0x41,0x38,0x33,0xcb,0xec,0xee,0x8a,0x67,0x92,0x01,0x45,0xfa,0x4b,0x97,0x55, // 00000870 |.A83....g..E.K.U|
+0xb8,0x78,0x66,0xfa,0x20,0x58,0xd5,0x7b,0x09,0xbf,0x24,0x8f,0xf5,0x4a,0x5f,0x7f, // 00000880 |.xf. X.{..$..J_.|
+0x2c,0x61,0x67,0x1a,0x67,0xb6,0x42,0xfa,0x86,0xfd,0xaa,0xfd,0x8a,0xc6,0x11,0x5c, // 00000890 |,ag.g.B........\|
+0x6f,0x5c,0xf0,0x30,0xa8,0x50,0xd1,0x0b,0x1a,0x09,0x43,0xcc,0xd1,0x64,0xa8,0x83, // 000008a0 |o\.0.P....C..d..|
+0x80,0x7d,0xa3,0x3f,0xd4,0x15,0x1f,0xf2,0x94,0xe4,0x8f,0x40,0x74,0xa0,0x47,0x63, // 000008b0 |.}.?.......@t.Gc|
+0xf4,0xa8,0xd8,0x99,0x8c,0xe1,0x5b,0xe6,0x9a,0x66,0x99,0x15,0xc2,0x65,0xe8,0xec, // 000008c0 |......[..f...e..|
+0x51,0xad,0xba,0xf4,0xdb,0x36,0x38,0x21,0xe1,0xe6,0xfe,0x13,0x2f,0x5f,0xdb,0x3b, // 000008d0 |Q....68!..../_.;|
+0x86,0x7d,0xe4,0x7a,0x47,0x89,0x5a,0x8a,0xf4,0xaf,0x2a,0x20,0x27,0xad,0xba,0x4c, // 000008e0 |.}.zG.Z...* '..L|
+0xfd,0x1a,0x94,0x65,0x59,0x7f,0x15,0x4f,0xa3,0xd1,0x73,0x76,0xdc,0x59,0x46,0x71, // 000008f0 |...eY..O..sv.YFq|
+0x9d,0xf2,0xfb,0x48,0xe3,0xab,0xea,0x9a,0xce,0xe4,0xf7,0x42,0x48,0xa1,0x28,0x19, // 00000900 |...H.......BH.(.|
+0x02,0xa0,0x4b,0x8a,0xbe,0xa0,0x6e,0x12,0x6c,0x8a,0xbe,0x60,0x08,0x23,0x4a,0x18, // 00000910 |..K...n.l..`.#J.|
+0x24,0x3d,0x5b,0xe4,0xc7,0x25,0x1d,0x3a,0x32,0xcb,0x28,0x31,0xa5,0x63,0x9a,0xd5, // 00000920 |$=[..%.:2.(1.c..|
+0x98,0x96,0x12,0x31,0xa4,0xca,0x4f,0x1d,0xf6,0xb8,0x2f,0x4a,0x05,0xf5,0xa5,0xf7, // 00000930 |...1..O.../J....|
+0x62,0x1d,0xf0,0x20,0x60,0xc0,0xb1,0x66,0x92,0x1a,0x80,0x49,0xf6,0xa0,0xfc,0x9b, // 00000940 |b.. `..f...I....|
+0x8f,0x45,0x90,0xd2,0x02,0x8b,0xfa,0x69,0x2a,0xe5,0xb7,0x35,0x8a,0x17,0x8a,0x27, // 00000950 |.E.....i*..5...'|
+0x70,0x85,0xb4,0xf5,0x4c,0xdd,0xd6,0xac,0x36,0xd5,0x9c,0xd5,0x2e,0xe1,0x12,0x00, // 00000960 |p...L...6.......|
+0x53,0x34,0xe7,0xf9,0x75,0x6d,0x54,0x71,0x14,0xbb,0xd0,0x78,0x82,0x40,0xb0,0x65, // 00000970 |S4..umTq...x.@.e|
+0x91,0xe6,0x5e,0xa9,0xc6,0x31,0x12,0x20,0x11,0x98,0xe7,0x0a,0xb3,0x75,0x19,0xef, // 00000980 |..^..1. .....u..|
+0x07,0x08,0x0d,0x47,0x67,0xb6,0x3e,0xc6,0x56,0xea,0x08,0xe7,0x41,0x05,0x0e,0x87, // 00000990 |...Gg.>.V...A...|
+0x06,0x42,0xc7,0x73,0xc8,0xa0,0xb0,0x10,0xdb,0x7b,0x41,0x63,0x53,0xcf,0x2e,0xbc, // 000009a0 |.B.s.....{AcS...|
+0x7f,0x5a,0xd4,0x02,0xbd,0xe9,0xae,0x54,0x8a,0x81,0xea,0x6d,0x93,0x14,0x61,0xb7, // 000009b0 |.Z.....T...m..a.|
+0xa2,0x12,0x26,0x6b,0x01,0xa9,0xbf,0xef,0xe0,0x5a,0xaf,0x6b,0x5e,0xda,0x66,0xff, // 000009c0 |..&k.....Z.k^.f.|
+0x2d,0x94,0xc3,0x6c,0xea,0x35,0x5b,0x06,0x7b,0xcd,0x7d,0x5e,0xfd,0x60,0xc1,0xb2, // 000009d0 |-..l.5[.{.}^.`..|
+0x3f,0x2b,0x14,0x3f,0xb6,0x3f,0x8b,0xcc,0x67,0x8d,0xf7,0x52,0x1c,0x91,0x09,0xd4, // 000009e0 |?+.?.?..g..R....|
+0x67,0x66,0x22,0x13,0xe1,0xb4,0x5e,0x93,0x78,0x0b,0x80,0xc2,0x51,0xf4,0x4c,0x00, // 000009f0 |gf"...^.x...Q.L.|
+0x35,0x51,0x4a,0xea,0x0e,0xa7,0x27,0x66,0x49,0xae,0x79,0x59,0xb0,0x76,0x26,0xb3, // 00000a00 |5QJ...'fI.yY.v&.|
+0xdf,0x2c,0x47,0x00,0x6b,0x77,0x6f,0x76,0x9d,0x2b,0xad,0xed,0x99,0x1d,0x96,0xe3, // 00000a10 |.,G.kwov.+......|
+0x6a,0xa6,0x5c,0xdb,0xb2,0x52,0x8f,0x40,0xbf,0xcc,0xe9,0xc8,0xfc,0x1a,0x1a,0xa3, // 00000a20 |j.\..R.@........|
+0x2c,0xf8,0x43,0x62,0x21,0x9a,0xd3,0x37,0x91,0xa7,0x5b,0xef,0xb1,0xa8,0x80,0x4c, // 00000a30 |,.Cb!..7..[....L|
+0xd0,0xd6,0x2a,0xe9,0x22,0x19,0xd6,0x41,0x91,0xbf,0xba,0xdd,0xc0,0x6a,0x03,0x70, // 00000a40 |..*."..A.....j.p|
+0xaf,0x46,0x39,0x91,0xd2,0x50,0x72,0xaa,0x05,0xe6,0x6c,0x7f,0x0c,0xf8,0x0b,0xc1, // 00000a50 |.F9..Pr...l.....|
+0x42,0x59,0xf2,0x3d,0xd8,0xa0,0xcb,0x94,0x89,0xce,0x69,0x6f,0x27,0x98,0xff,0xfe, // 00000a60 |BY.=......io'...|
+0x20,0xcc,0x28,0x8e,0xc1,0x3d,0x03,0x83,0xc9,0x86,0xe7,0xdc,0xd4,0x46,0xc5,0x45, // 00000a70 | .(..=.......F.E|
+0xdf,0x6b,0xe5,0x61,0x40,0x60,0xcd,0x3d,0x93,0xfb,0xaa,0xcf,0x1f,0x76,0x01,0x1a, // 00000a80 |.k.a@`.=.....v..|
+0xc7,0x74,0xf2,0xe6,0xf4,0xfa,0xea,0xa5,0x88,0xc9,0x6a,0x1e,0x6d,0x90,0x8c,0x94, // 00000a90 |.t........j.m...|
+0xae,0x22,0x3b,0xc7,0x5d,0x8e,0x1c,0x01,0xa9,0x7a,0xeb,0xac,0xc8,0x08,0xbc,0xc0, // 00000aa0 |.";.]....z......|
+0x45,0xa1,0x61,0xdf,0xb5,0xc8,0x2a,0xce,0x01,0x47,0x84,0xee,0xb9,0x57,0x6a,0x59, // 00000ab0 |E.a...*..G...WjY|
+0x87,0xd2,0xb8,0xb1,0x0b,0xee,0xee,0x28,0x2d,0x2a,0x8c,0xe1,0x36,0x5a,0xed,0x5d, // 00000ac0 |.......(-*..6Z.]|
+0xd5,0xbd,0x69,0xd4,0x01,0xb9,0xfe,0x88,0x6f,0x53,0xbf,0x3d,0x0d,0x5e,0x4b,0xb1, // 00000ad0 |..i.....oS.=.^K.|
+0xca,0xeb,0x79,0x4a,0x44,0x2b,0x16,0x77,0xfb,0xfe,0xba,0xfc,0x1e,0xb5,0xd8,0x07, // 00000ae0 |..yJD+.w........|
+0xd9,0x96,0x47,0x12,0x49,0x77,0x1b,0xef,0x9a,0x08,0xa3,0xd6,0xf5,0x79,0xca,0x93, // 00000af0 |..G.Iw.......y..|
+0x49,0x80,0x7a,0x5b,0x53,0x3a,0x42,0x17,0x51,0xd0,0xbf,0xf2,0xbe,0xfa,0x39,0x60, // 00000b00 |I.z[S:B.Q.....9`|
+0xaf,0xa9,0xc7,0xf8,0xae,0xf4,0x93,0xfe,0x26,0xb8,0x78,0x70,0x54,0x0b,0xce,0x78, // 00000b10 |........&.xpT..x|
+0x15,0x80,0x55,0x95,0x2a,0xc4,0x78,0x50,0x88,0x1c,0x0c,0xba,0x48,0x1d,0x4c,0x54, // 00000b20 |..U.*.xP....H.LT|
+0x98,0x8c,0xa7,0x1c,0x49,0xf1,0x2d,0x10,0x68,0x8f,0x86,0x3b,0x20,0x28,0x93,0xbd, // 00000b30 |....I.-.h..; (..|
+0x01,0x44,0x15,0x9e,0x58,0xdd,0x8b,0x9b,0x91,0x43,0x8d,0xcd,0x89,0x00,0xc8,0xdc, // 00000b40 |.D..X....C......|
+0x58,0x15,0xbd,0x27,0x4f,0x30,0x3e,0x06,0xa7,0x77,0xa3,0xcd,0x5f,0xee,0xe6,0x30, // 00000b50 |X..'O0>..w.._..0|
+0x48,0x12,0x6c,0x06,0x94,0x6e,0x34,0x81,0x54,0x3b,0xff,0xe9,0xd6,0xb6,0x41,0x58, // 00000b60 |H.l..n4.T;....AX|
+0x1a,0x7d,0x89,0xa8,0x20,0xe5,0x90,0x19,0x0b,0x03,0x46,0xf3,0xe4,0x1a,0x6f,0x3d, // 00000b70 |.}.. .....F...o=|
+0xa9,0x2b,0x8d,0x3c,0xce,0x03,0x06,0xaa,0x13,0x61,0xf0,0x0b,0xdd,0x29,0xaf,0x9a, // 00000b80 |.+.<.....a...)..|
+0xc2,0x85,0xcc,0x97,0xdc,0xaf,0x72,0x04,0x98,0xdf,0x1c,0x24,0x68,0xef,0x2e,0x2d, // 00000b90 |......r....$h..-|
+0xd7,0x87,0x4f,0x8a,0x39,0x63,0x78,0xa8,0x25,0x8a,0xa9,0xc4,0x5d,0xc0,0x0b,0x0e, // 00000ba0 |..O.9cx.%...]...|
+0xa8,0x41,0xa8,0x98,0x3a,0xd7,0x59,0x03,0x69,0x44,0x98,0x7d,0xed,0x1a,0x7b,0x6e, // 00000bb0 |.A..:.Y.iD.}..{n|
+0x9c,0xd8,0x0b,0x12,0x2b,0x5b,0x7f,0x35,0xa6,0x57,0xf0,0xa4,0xc8,0x54,0x94,0x2b, // 00000bc0 |....+[.5.W...T.+|
+0x9b,0x59,0x11,0x21,0xb5,0xb2,0x84,0xb1,0x5b,0x4f,0xe3,0xa1,0xc6,0xf2,0xcf,0x5f, // 00000bd0 |.Y.!....[O....._|
+0x03,0x08,0xb0,0xe0,0x72,0x14,0xe2,0xff,0xe4,0x2b,0x81,0x8c,0x6c,0x02,0x40,0x86, // 00000be0 |....r....+..l.@.|
+0xd5,0x2d,0x29,0xdb,0x0f,0x5c,0x7c,0x73,0x86,0x0a,0xeb,0x17,0xd3,0xd9,0xe9,0xcf, // 00000bf0 |.-)..\|s........|
+0xc6,0xa6,0x8b,0xa0,0x26,0x09,0x4a,0xe2,0xc9,0x51,0x09,0x08,0x2e,0xdf,0x0a,0xe2, // 00000c00 |....&.J..Q......|
+0x74,0x22,0xb3,0xd0,0xc9,0x43,0x1c,0xe6,0x5d,0x9a,0xc2,0x1d,0xaf,0x0c,0x59,0x55, // 00000c10 |t"...C..].....YU|
+0xe5,0xb4,0x33,0x51,0xda,0x65,0x13,0xf4,0x77,0xf5,0xe5,0x20,0x3b,0x16,0x91,0xd4, // 00000c20 |..3Q.e..w.. ;...|
+0x2f,0x36,0x46,0x2b,0xbb,0x9c,0xc9,0x46,0x0a,0x7b,0x86,0x51,0xb9,0x05,0x03,0x40, // 00000c30 |/6F+...F.{.Q...@|
+0x12,0x01,0x0c,0xf4,0xb5,0x5b,0x8c,0x0c,0xb6,0x3e,0x14,0x74,0x28,0x42,0x20,0x3e, // 00000c40 |.....[...>.t(B >|
+0x3d,0x9d,0x18,0x6c,0xb2,0x2a,0x20,0x4f,0x20,0x7d,0x66,0xcf,0x8c,0x02,0xdd,0x99, // 00000c50 |=..l.* O }f.....|
+0x57,0x39,0xfa,0x85,0xe3,0xa7,0x84,0x3c,0xca,0xdd,0xf7,0xb0,0x27,0x97,0xd4,0x22, // 00000c60 |W9.....<....'.."|
+0xd9,0x55,0x60,0xfd,0xe9,0x5e,0xd0,0x60,0x79,0xca,0x6c,0xeb,0xe2,0x29,0x0a,0xb2, // 00000c70 |.U`..^.`y.l..)..|
+0x74,0x60,0x11,0x3b,0x39,0x36,0x6f,0xca,0xc0,0x34,0xe9,0x2a,0x46,0x49,0x47,0xb4, // 00000c80 |t`.;96o..4.*FIG.|
+0x3f,0xb3,0x10,0xeb,0x97,0xf7,0x1e,0x84,0x4a,0x70,0x09,0xad,0x3b,0x82,0x84,0xdf, // 00000c90 |?.......Jp..;...|
+0xd7,0x3d,0x48,0x1b,0x9e,0xd1,0xf0,0xff,0xfe,0xb2,0x9f,0x97,0xd9,0x58,0x4c,0x42, // 00000ca0 |.=H..........XLB|
+0xc3,0x80,0xf0,0xa1,0x44,0x30,0xb0,0x7a,0xac,0x6a,0x8d,0x03,0x66,0xf8,0x93,0xc6, // 00000cb0 |....D0.z.j..f...|
+0xa9,0x0d,0x9c,0x66,0xb1,0xa2,0x51,0x31,0x77,0x9e,0x55,0x6b,0x14,0x5b,0x92,0x26, // 00000cc0 |...f..Q1w.Uk.[.&|
+0xff,0xd6,0xd0,0xa2,0xdd,0xe6,0x70,0x18,0xd8,0x85,0xa3,0xaf,0x55,0xa5,0x2c,0x2b, // 00000cd0 |......p.....U.,+|
+0xd5,0x48,0x88,0xaa,0xac,0x14,0xb4,0xdf,0x7c,0x88,0xd3,0x77,0x44,0x24,0x36,0xee, // 00000ce0 |.H......|..wD$6.|
+0xad,0xa4,0xae,0x93,0xeb,0x1f,0xa6,0x8a,0xc0,0x27,0x02,0x15,0x3e,0x89,0xb4,0xfc, // 00000cf0 |.........'..>...|
+0x94,0xc1,0xc8,0x35,0x62,0xca,0x59,0xc4,0x42,0x2e,0xcf,0xb3,0x1e,0xbb,0x9c,0xb0, // 00000d00 |...5b.Y.B.......|
+0x3a,0x64,0xd2,0xab,0xa0,0xbe,0xc6,0x35,0x55,0x9e,0x2b,0x00,0xe4,0x69,0x19,0xe0, // 00000d10 |:d.....5U.+..i..|
+0xcc,0x4b,0xf1,0xbf,0x3a,0x2e,0xbb,0x95,0x3f,0x3c,0x56,0xea,0xa4,0x3e,0x03,0xf9, // 00000d20 |.K..:...?<V..>..|
+0xda,0xa6,0xf4,0xa9,0x6e,0xd2,0xba,0xfc,0x31,0xcd,0x2f,0x42,0x98,0xd7,0x9e,0xd9, // 00000d30 |....n...1./B....|
+0xdb,0x74,0xf9,0xa2,0x15,0x07,0xb3,0x87,0x22,0x1c,0x5b,0xfc,0xcf,0x1c,0xf8,0x9d, // 00000d40 |.t......".[.....|
+0x31,0x81,0x81,0x4d,0x40,0xc6,0xca,0xe8,0x89,0x9e,0x0c,0x8d,0x02,0xfa,0x7c,0x3a, // 00000d50 |1..M@.........|:|
+0xeb,0x7f,0x2a,0xa2,0xc6,0xeb,0x8e,0x86,0x0a,0x26,0xa4,0x7c,0x15,0xe1,0xd4,0x73, // 00000d60 |..*......&.|...s|
+0x31,0xf9,0xf3,0x4b,0xff,0x8f,0x2a,0xcc,0x1f,0x26,0xd1,0x57,0x35,0x9e,0xc2,0x82, // 00000d70 |1..K..*..&.W5...|
+0xf3,0xeb,0x9c,0x8c,0xdc,0xb1,0x46,0x37,0xd1,0x7f,0x61,0xe1,0x0a,0x35,0x92,0x29, // 00000d80 |......F7..a..5.)|
+0xfc,0x10,0x85,0xd6,0x45,0x8b,0x5b,0xce,0x9d,0x73,0x67,0xb3,0x1e,0x60,0x40,0x23, // 00000d90 |....E.[..sg..`@#|
+0xfb,0xc9,0xb5,0x81,0x5d,0x89,0xa6,0xb2,0x41,0xc8,0xf5,0xd2,0x67,0x2c,0x95,0xc2, // 00000da0 |....]...A...g,..|
+0x84,0x05,0x6b,0x5c,0x10,0xfc,0x06,0x07,0xd5,0x63,0x1d,0xdb,0xb5,0xb9,0x0c,0xfb, // 00000db0 |..k\.....c......|
+0x98,0xc0,0xc7,0x3b,0x1f,0x0e,0x98,0xd5,0x51,0x75,0x89,0x39,0xb2,0x0c,0x00,0xb9, // 00000dc0 |...;....Qu.9....|
+0x4a,0x85,0x16,0x29,0x9c,0x69,0xdc,0x51,0x81,0xd4,0xa1,0x25,0x7d,0x97,0x31,0xb5, // 00000dd0 |J..).i.Q...%}.1.|
+0xa5,0x2e,0x7e,0x86,0xe3,0xe5,0x88,0xf6,0x78,0x83,0xf2,0x13,0xbd,0xf1,0x8f,0xcb, // 00000de0 |..~.....x.......|
+0x2f,0x99,0x1f,0x52,0x99,0x7f,0xf7,0x0d,0x71,0xce,0x67,0x41,0x79,0x2c,0x4f,0xf2, // 00000df0 |/..R....q.gAy,O.|
+0xee,0xdd,0xcb,0x52,0xd0,0xde,0xdf,0x9a,0xa0,0x39,0x29,0x29,0xf5,0xa5,0xff,0xbf, // 00000e00 |...R.....9))....|
+0x3d,0xb7,0xf3,0xe4,0xf5,0x75,0x2e,0x55,0x93,0x1e,0x44,0xc5,0x85,0x7d,0x6f,0x90, // 00000e10 |=....u.U..D..}o.|
+0x21,0x61,0x4b,0x87,0xd1,0xa7,0xac,0x32,0x51,0x0d,0xf3,0x5a,0x61,0x1e,0x86,0x8c, // 00000e20 |!aK....2Q..Za...|
+0x28,0xac,0xb2,0x82,0x98,0x22,0x2e,0xc1,0xaa,0xee,0xc2,0x5d,0xfe,0xe6,0x76,0xed, // 00000e30 |(....".....]..v.|
+0xc3,0xc2,0x33,0xfd,0x2b,0x91,0x4d,0x50,0x97,0x13,0xa3,0x54,0x56,0xf7,0xde,0xd4, // 00000e40 |..3.+.MP...TV...|
+0xfe,0xd7,0x9a,0x36,0x40,0x8e,0x69,0xcb,0x64,0xcb,0x95,0xf7,0x2b,0x25,0xe6,0xb1, // 00000e50 |...6@.i.d...+%..|
+0x73,0x1e,0x57,0x53,0x45,0xba,0x7c,0x77,0x8e,0xcf,0x3f,0x3c,0xdc,0xf6,0x07,0x31, // 00000e60 |s.WSE.|w..?<...1|
+0xe6,0x2d,0xae,0x47,0x60,0xca,0x13,0x98,0x18,0xf6,0x1b,0xd6,0xde,0x56,0x73,0x29, // 00000e70 |.-.G`........Vs)|
+0x8b,0x31,0x75,0x9b,0xa7,0x7f,0x47,0x8a,0x57,0xf6,0xff,0x60,0x15,0x35,0x70,0xe9, // 00000e80 |.1u...G.W..`.5p.|
+0x93,0xb7,0xcb,0xdc,0xbb,0x62,0x19,0x31,0x92,0x0f,0xe1,0xf1,0xb1,0x06,0x3d,0x5c, // 00000e90 |.....b.1......=\|
+0xe7,0x44,0x04,0x25,0xc6,0x38,0xed,0xc4,0xf9,0x97,0xb7,0xf8,0x87,0xe1,0xac,0x0c, // 00000ea0 |.D.%.8..........|
+0x5b,0xa8,0x3f,0x60,0xaf,0x65,0x66,0x51,0xcc,0x73,0x1b,0x27,0x42,0x0d,0x7e,0x17, // 00000eb0 |[.?`.efQ.s.'B.~.|
+0xa9,0x6e,0x34,0x6d,0xab,0x39,0xf2,0x09,0x09,0x93,0x94,0xaf,0x56,0xa5,0xcc,0xf2, // 00000ec0 |.n4m.9......V...|
+0x11,0xc2,0x91,0x46,0xe2,0x97,0x1f,0xd4,0x1b,0x0d,0xa9,0x58,0x1f,0x03,0x70,0x31, // 00000ed0 |...F.......X..p1|
+0x5e,0x70,0x80,0x8c,0xea,0x57,0x7d,0x65,0x7c,0xfa,0x71,0x04,0x62,0x25,0x7f,0xa4, // 00000ee0 |^p...W}e|.q.b%..|
+0x61,0xb1,0x23,0xb5,0xe2,0x89,0x41,0xf4,0xe2,0x23,0x5c,0x5b,0x25,0x6a,0x4b,0xa2, // 00000ef0 |a.#...A..#\[%jK.|
+0xf7,0x0c,0x2a,0x1e,0x36,0x03,0x53,0x1b,0x14,0xc7,0x22,0x1a,0xc1,0x15,0x0a,0x40, // 00000f00 |..*.6.S..."....@|
+0x5c,0x21,0x22,0x5d,0xb5,0x2f,0x32,0x06,0xed,0x3e,0xc0,0x19,0xbe,0xd8,0xee,0xd6, // 00000f10 |\!"]./2..>......|
+0x76,0x8e,0x65,0x27,0x98,0x55,0x31,0x4b,0x7f,0xd6,0x7b,0xd0,0x84,0x94,0xcf,0x2f, // 00000f20 |v.e'.U1K..{..../|
+0x3a,0x83,0xb0,0x18,0x51,0x12,0x21,0x25,0x6c,0xae,0x67,0xbc,0x4b,0x9e,0x75,0x72, // 00000f30 |:...Q.!%l.g.K.ur|
+0x2c,0x8a,0xe8,0xe0,0x35,0x35,0x7c,0x85,0x4e,0xbb,0x52,0x6e,0x6b,0xa4,0xe8,0x2f, // 00000f40 |,...55|.N.Rnk../|
+0x52,0xa5,0x1e,0xab,0x21,0x09,0x7d,0xc9,0x7f,0x8d,0x49,0xef,0x6b,0x10,0x6a,0x02, // 00000f50 |R...!.}...I.k.j.|
+0x67,0x3a,0xf8,0x03,0x68,0xcc,0xbe,0xfa,0x7f,0x68,0x0f,0xc4,0xe6,0x78,0x3a,0x19, // 00000f60 |g:..h....h...x:.|
+0x3d,0x83,0xdc,0xfd,0x8a,0x16,0x0f,0x6e,0xbf,0x3c,0xf0,0x20,0x25,0x9a,0x8c,0x56, // 00000f70 |=......n.<. %..V|
+0x67,0xe8,0x0e,0x11,0xb2,0x3d,0x1b,0x97,0x3f,0x5d,0x57,0x1d,0x58,0xf6,0x29,0x84, // 00000f80 |g....=..?]W.X.).|
+0xbe,0x2a,0x7e,0x29,0x0a,0x59,0x7d,0xca,0xcf,0xe3,0x7d,0x96,0xc7,0x9a,0x8e,0x5d, // 00000f90 |.*~).Y}...}....]|
+0x0f,0xd9,0x66,0x09,0x45,0x40,0x89,0x01,0x57,0x17,0x7b,0x01,0x5d,0xf6,0xcf,0xfc, // 00000fa0 |..f.E@..W.{.]...|
+0xd6,0xd3,0xb3,0x26,0xd0,0xcd,0x70,0x50,0x64,0x26,0x8d,0x5e,0xc4,0x50,0x63,0xb3, // 00000fb0 |...&..pPd&.^.Pc.|
+0xc1,0x61,0x1f,0x14,0x0f,0x43,0xfe,0x9f,0x39,0x09,0xc7,0x94,0x0c,0x09,0xab,0xcc, // 00000fc0 |.a...C..9.......|
+0x99,0xc2,0x67,0x3e,0x0a,0xdc,0x5c,0xf2,0xe9,0x8c,0x03,0x74,0xe7,0xa1,0x3a,0x6d, // 00000fd0 |..g>..\....t..:m|
+0x6d,0xa1,0x83,0x8d,0x22,0x5b,0xcd,0xa3,0x92,0x6b,0xd0,0xe7,0xea,0x2b,0x38,0x33, // 00000fe0 |m..."[...k...+83|
+0xcc,0xf1,0xc0,0x67,0x1b,0xbe,0xca,0x0a,0x3b,0x7f,0x05,0x12,0x04,0xea,0xb0,0x21, // 00000ff0 |...g....;......!|
+0x57,0x9f,0x2d,0xed,0x1e,0x19,0x29,0xe9,0xe0,0x58,0xe7,0x0a,0x72,0x1b,0xf7,0x0f, // 00001000 |W.-...)..X..r...|
+0x2e,0x29,0x07,0x28,0x08,0xad,0x5c,0x70,0x91,0xc3,0x5e,0x86,0xa3,0x9e,0xa3,0x61, // 00001010 |.).(..\p..^....a|
+0x71,0x21,0xe6,0x65,0x39,0x18,0x02,0x74,0x45,0xb2,0xea,0x8b,0x87,0x9b,0xbd,0x3c, // 00001020 |q!.e9..tE......<|
+0xb3,0xe1,0x4e,0xe8,0xd6,0x72,0xb7,0x1b,0x87,0x4f,0x02,0xc9,0x88,0xf8,0xa8,0x4a, // 00001030 |..N..r...O.....J|
+0xfd,0x50,0xad,0xfe,0xa4,0xa6,0x52,0x8d,0xf6,0xde,0x25,0x70,0x00,0x24,0xad,0x39, // 00001040 |.P....R...%p.$.9|
+0xae,0x4c,0x71,0x15,0xaf,0x67,0x60,0xe4,0xf2,0x83,0xdf,0x6d,0x24,0xd0,0x9d,0x35, // 00001050 |.Lq..g`....m$..5|
+0x09,0x37,0x31,0x60,0x48,0x7a,0x66,0x16,0x33,0xea,0x87,0xeb,0xab,0x91,0x9b,0xfa, // 00001060 |.71`Hzf.3.......|
+0xfe,0xff,0xa6,0x1f,0xb4,0x20,0x10,0xf2,0x0a,0xee,0x68,0xa1,0x8b,0x93,0xa2,0x17, // 00001070 |..... ....h.....|
+0x24,0x29,0xb9,0x5f,0xa2,0x14,0x0b,0x6c,0x45,0xe1,0xb1,0xa9,0xb4,0x66,0x87,0x4c, // 00001080 |$)._...lE....f.L|
+0x71,0x81,0x79,0x49,0x9e,0x76,0xdb,0x1e,0x08,0xd5,0x43,0x09,0x99,0x38,0x82,0xed, // 00001090 |q.yI.v....C..8..|
+0xdf,0x3b,0x9b,0x00,0x7e,0xb1,0x36,0x37,0xc5,0xc3,0x61,0xd4,0xb5,0x5f,0x42,0x2d, // 000010a0 |.;..~.67..a.._B-|
+0xaa,0x1d,0x3f,0x44,0x9f,0xf4,0x58,0x87,0x4c,0x3b,0x9c,0x4b,0x96,0x5e,0x1a,0xc2, // 000010b0 |..?D..X.L;.K.^..|
+0x89,0xe9,0x30,0xd9,0xe6,0x3e,0xdd,0x37,0xc1,0xcb,0xa3,0x54,0xae,0x5c,0x25,0xe1, // 000010c0 |..0..>.7...T.\%.|
+0x00,0x92,0x5d,0xae,0x98,0x04,0xfd,0xd1,0x89,0xf1,0x91,0x11,0xdf,0x33,0x0e,0xc0, // 000010d0 |..]..........3..|
+0x70,0xb1,0x00,0x97,0x10,0xa6,0x1b,0xae,0x8c,0xf8,0xf0,0x90,0x20,0xa6,0x8b,0x20, // 000010e0 |p........... .. |
+0xfb,0x3a,0x88,0x7a,0x8e,0x58,0xb7,0x5b,0x4e,0x72,0x30,0x19,0x3e,0x62,0x96,0xa3, // 000010f0 |.:.z.X.[Nr0.>b..|
+0x84,0x01,0x20,0xed,0x91,0xf0,0x2c,0x5b,0x6b,0x7f,0x45,0x5a,0x4e,0x7b,0x42,0xa7, // 00001100 |.. ...,[k.EZN{B.|
+0x34,0x8f,0xb2,0xfa,0xa7,0x67,0x15,0x37,0x4d,0x0d,0xb8,0xca,0x04,0x74,0x29,0xc3, // 00001110 |4....g.7M....t).|
+0xdd,0xe8,0xce,0x9f,0x66,0x8d,0x15,0xb5,0x7b,0xd1,0x11,0x8a,0xa6,0xb1,0xfa,0xc7, // 00001120 |....f...{.......|
+0xe2,0x48,0x5b,0x28,0xc9,0x97,0x08,0xd2,0xe6,0xed,0xfa,0xc2,0x02,0x7f,0x90,0xbf, // 00001130 |.H[(............|
+0xe0,0x8a,0x67,0x66,0x46,0x0a,0xbb,0x18,0x28,0x79,0x88,0x20,0xa9,0x97,0x7b,0x8f, // 00001140 |..gfF...(y. ..{.|
+0x1c,0xe3,0xa3,0xe3,0x4f,0x8b,0xb9,0x86,0xba,0xe9,0x8e,0xa6,0x57,0x2c,0x07,0xff, // 00001150 |....O.......W,..|
+0x0c,0x24,0x90,0x06,0x76,0xce,0x1c,0x98,0x49,0xf3,0xde,0x9c,0x1f,0x6d,0x90,0x27, // 00001160 |.$..v...I....m.'|
+0x1f,0x84,0xdb,0x3d,0xcc,0x4f,0xf8,0x9d,0x4f,0xc5,0x12,0x4b,0x39,0xe7,0xac,0x44, // 00001170 |...=.O..O..K9..D|
+0xb8,0xca,0x66,0xd1,0xea,0xbd,0x3a,0xda,0x73,0x6e,0xb5,0xd3,0x4a,0x32,0x34,0x37, // 00001180 |..f...:.sn..J247|
+0xe2,0x89,0x3d,0x60,0x3e,0xbf,0x32,0xc5,0x02,0xa4,0x9e,0x9c,0x10,0x88,0x61,0x78, // 00001190 |..=`>.2.......ax|
+0xaf,0x2a,0xf2,0xfa,0xc9,0x6f,0xae,0xa1,0xbf,0xe4,0xf0,0xad,0x22,0xd9,0x73,0x5e, // 000011a0 |.*...o......".s^|
+0x5a,0x80,0x05,0xe4,0xed,0xb1,0xad,0x8f,0x43,0x50,0x88,0xf8,0x40,0xe2,0x24,0x6c, // 000011b0 |Z.......CP..@.$l|
+0x18,0x9d,0x6c,0x9d,0xf1,0x51,0xb0,0x3f,0x9c,0xa6,0x9e,0x5a,0x09,0x3a,0x5c,0xa2, // 000011c0 |..l..Q.?...Z.:\.|
+0x4b,0x2c,0x14,0x4e,0x8c,0x3f,0xb7,0x74,0x55,0xde,0x8d,0x4a,0x37,0xf3,0x87,0x6d, // 000011d0 |K,.N.?.tU..J7..m|
+0xe9,0x1e,0xda,0x92,0xec,0xa3,0x4d,0xd9,0xdb,0xdb,0x85,0x2d,0xf3,0xb4,0x15,0xa9, // 000011e0 |......M....-....|
+0x4e,0xbc,0x88,0x99,0x94,0xd9,0xcb,0xea,0xd4,0xdf,0x1e,0xd6,0x42,0x9f,0xa1,0x52, // 000011f0 |N...........B..R|
+0x66,0xe5,0xda,0x27,0xf8,0xee,0x79,0x00,0x4f,0xa5,0x2f,0x77,0x57,0x49,0xd3,0x4d, // 00001200 |f..'..y.O./wWI.M|
+0xf8,0x6b,0xa0,0x51,0x1a,0x01,0x46,0x93,0xfc,0xf1,0x57,0xac,0xdb,0x54,0x68,0x75, // 00001210 |.k.Q..F...W..Thu|
+0x43,0x5a,0x50,0xc5,0x56,0xdf,0x14,0xb5,0x9d,0xa6,0xba,0xf8,0x1f,0x98,0xb4,0x3f, // 00001220 |CZP.V..........?|
+0x0b,0x88,0xe9,0x9e,0x0d,0xfd,0x76,0xde,0x1a,0x13,0xc5,0x48,0x32,0x6b,0x86,0xc4, // 00001230 |......v....H2k..|
+0xca,0x97,0x23,0x42,0xba,0x12,0xf4,0x4c,0xa7,0xcb,0x71,0x91,0xd0,0x30,0xc4,0xeb, // 00001240 |..#B...L..q..0..|
+0xea,0x99,0x56,0x26,0xae,0xdd,0x02,0x58,0x1d,0xd9,0x63,0x5f,0x70,0x92,0xff,0x82, // 00001250 |..V&...X..c_p...|
+0x26,0xac,0x77,0xb1,0xaa,0xb3,0x25,0x29,0x05,0xed,0x7a,0x0a,0x8a,0x4b,0xa3,0xa3, // 00001260 |&.w...%)..z..K..|
+0x33,0xc3,0x70,0x72,0x9e,0x78,0x7e,0xe0,0xc5,0x8a,0x76,0xab,0x21,0xd6,0x33,0x48, // 00001270 |3.pr.x~...v.!.3H|
+0x82,0xb7,0x89,0xc2,0xb4,0x7b,0x65,0xac,0x2c,0x1e,0x0f,0x82,0x9c,0x10,0x69,0xb5, // 00001280 |.....{e.,.....i.|
+0x71,0xe8,0xfb,0xd2,0x14,0x04,0x43,0x87,0x7a,0xed,0xd1,0x81,0xb2,0xe5,0xb8,0x65, // 00001290 |q.....C.z......e|
+0x13,0x5c,0x21,0x87,0xac,0x15,0x2b,0x61,0x56,0xc5,0x9e,0x04,0xc1,0xec,0xa3,0x87, // 000012a0 |.\!...+aV.......|
+0x3f,0xbd,0xbd,0xeb,0x52,0x34,0x6e,0x52,0xfc,0x3f,0xd2,0xd5,0xad,0x16,0xa6,0x96, // 000012b0 |?...R4nR.?......|
+0x49,0xb0,0xd9,0x9f,0x89,0x0b,0x76,0xce,0x6e,0xaf,0xe3,0xd5,0x18,0x01,0xb1,0x5e, // 000012c0 |I.....v.n......^|
+0x58,0x90,0x69,0xd6,0xd4,0xd5,0x46,0x26,0xfc,0xf1,0xee,0x40,0x27,0x34,0x4e,0xd1, // 000012d0 |X.i...F&...@'4N.|
+0xe8,0xd2,0x0c,0xc6,0xcf,0x03,0x71,0x2e,0xb7,0xc6,0x56,0x0f,0x4c,0xcf,0x56,0x01, // 000012e0 |......q...V.L.V.|
+0x12,0x3c,0xb9,0x38,0xc8,0xf3,0xbf,0x78,0xf3,0x1e,0xc8,0x1d,0xe9,0x21,0x76,0x6e, // 000012f0 |.<.8...x.....!vn|
+0xc9,0x01,0xc9,0x82,0x6a,0x85,0x7f,0x02,0xa8,0x9c,0x24,0xd0,0xbb,0x78,0x38,0x48, // 00001300 |....j.....$..x8H|
+0xa3,0x47,0xaa,0x3b,0x98,0xaa,0xcc,0x76,0xb7,0x05,0xc9,0xb6,0x60,0x5d,0x17,0xeb, // 00001310 |.G.;...v....`]..|
+0x8d,0x0e,0xe8,0xe9,0xca,0xf1,0x6e,0x79,0x04,0x35,0x77,0x5a,0x4b,0x81,0x52,0xb6, // 00001320 |......ny.5wZK.R.|
+0x82,0xc6,0xda,0x2c,0x21,0x26,0xa5,0xd7,0x9f,0x29,0x3a,0x90,0xb8,0xb8,0x57,0x61, // 00001330 |...,!&...):...Wa|
+0x5b,0x59,0xc5,0xc2,0x7f,0x94,0x54,0xa7,0x70,0x08,0xa4,0x53,0x46,0xe5,0xfd,0xd1, // 00001340 |[Y....T.p..SF...|
+0x76,0x59,0x5f,0x91,0xf7,0x55,0x89,0xc4,0x41,0xde,0x08,0x8b,0xf0,0x2b,0x9b,0xf1, // 00001350 |vY_..U..A....+..|
+0x21,0x2d,0x91,0xd6,0xc8,0x57,0x2e,0x06,0x7c,0x7c,0xf6,0x61,0x59,0x94,0x1a,0xad, // 00001360 |!-...W..||.aY...|
+0x9e,0xe5,0x3e,0x10,0x22,0x6e,0x9a,0x7f,0x58,0x6a,0xff,0x89,0x8a,0x18,0x57,0xa7, // 00001370 |..>."n..Xj....W.|
+0xc0,0xe6,0xd2,0x51,0x0d,0x08,0x49,0x41,0x4d,0x91,0xca,0x84,0x24,0x57,0xa8,0x8e, // 00001380 |...Q..IAM...$W..|
+0x00,0xb9,0x74,0x19,0x4a,0xbf,0x05,0x1c,0x35,0x23,0xb5,0xbb,0x51,0x92,0x4c,0x3a, // 00001390 |..t.J...5#..Q.L:|
+0x1e,0x99,0x74,0xa0,0x8a,0xd0,0xe0,0x50,0x39,0xe4,0xd6,0x0e,0x28,0x4e,0x7d,0xf4, // 000013a0 |..t....P9...(N}.|
+0xd7,0x0d,0xe0,0x21,0x49,0x76,0x17,0x1f,0x1d,0x3d,0x71,0xbf,0x40,0x16,0x8e,0xbe, // 000013b0 |...!Iv...=q.@...|
+0xe2,0x03,0x10,0xd0,0xe8,0x64,0xb8,0xc8,0xd4,0xcf,0x5e,0xd4,0x77,0x36,0x49,0x62, // 000013c0 |.....d....^.w6Ib|
+0xe5,0xfd,0x4c,0xc1,0x6a,0x88,0xff,0x80,0x89,0x97,0xb6,0x76,0x67,0xf2,0x64,0x20, // 000013d0 |..L.j......vg.d |
+0xa7,0xeb,0xd2,0xf0,0x48,0x05,0x4e,0x29,0x17,0xa5,0xe4,0x9a,0xc5,0x70,0xbb,0x1a, // 000013e0 |....H.N).....p..|
+0x5a,0x41,0xc5,0xaa,0xb0,0x60,0x69,0x00,0xf8,0x92,0x0d,0xb3,0x30,0xe7,0x31,0xd3, // 000013f0 |ZA...`i.....0.1.|
+0x89,0x07,0x13,0x94,0x36,0xfe,0x5c,0x27,0xd9,0x37,0xa7,0x5c,0x2c,0xb5,0x12,0x20, // 00001400 |....6.\'.7.\,.. |
+0x3a,0xfe,0x46,0x4b,0x94,0xaa,0x49,0xc5,0x49,0xc7,0x6e,0x4d,0x4d,0x95,0x1a,0xb5, // 00001410 |:.FK..I.I.nMM...|
+0xc0,0x1d,0x99,0x3f,0x03,0x05,0x3a,0xca,0x8a,0x64,0x88,0x9a,0x71,0x78,0xfd,0x52, // 00001420 |...?..:..d..qx.R|
+0xb6,0x42,0xae,0x32,0x18,0xd8,0x8c,0x30,0x34,0x7d,0xf5,0x78,0x3c,0x62,0x1b,0x09, // 00001430 |.B.2...04}.x<b..|
+0x90,0x07,0x7a,0x9e,0x34,0xc6,0xbc,0x82,0xae,0xd7,0xf7,0x68,0x30,0x30,0xe6,0x18, // 00001440 |..z.4......h00..|
+0x5a,0x7e,0x94,0xa1,0x15,0x87,0x36,0x85,0x22,0x69,0x50,0x23,0x76,0x1a,0x37,0xda, // 00001450 |Z~....6."iP#v.7.|
+0x6f,0x9f,0xd1,0xf1,0xba,0x80,0xfb,0xab,0xb2,0xeb,0x54,0x5b,0xf7,0xf9,0xa7,0xab, // 00001460 |o.........T[....|
+0x1b,0x2a,0x20,0x18,0x3f,0xf0,0x55,0xcd,0xc6,0xe5,0x61,0xab,0xeb,0x9a,0x8a,0x1f, // 00001470 |.* .?.U...a.....|
+0xb1,0x8d,0x11,0x4c,0x4e,0x09,0x32,0x6b,0xbe,0x2e,0x2d,0x68,0x62,0xc7,0x49,0x6a, // 00001480 |...LN.2k..-hb.Ij|
+0x89,0x47,0x20,0x75,0x36,0xf6,0x42,0x7d,0x96,0x61,0x8c,0x1a,0x12,0x73,0x50,0x68, // 00001490 |.G u6.B}.a...sPh|
+0x5b,0xa1,0xfd,0x0b,0x7e,0x78,0xe1,0xa9,0x55,0xf5,0xce,0x5b,0x55,0x37,0x3c,0x39, // 000014a0 |[...~x..U..[U7<9|
+0xa6,0xb1,0xdf,0x95,0x46,0x65,0x28,0xf0,0x7b,0xe5,0x86,0xd9,0x2e,0x5a,0xde,0x39, // 000014b0 |....Fe(.{....Z.9|
+0x59,0x8b,0xb0,0xe2,0x69,0xcc,0xa9,0xb1,0x24,0x23,0x93,0x48,0x00,0x5f,0x2e,0x12, // 000014c0 |Y...i...$#.H._..|
+0x01,0xbf,0x39,0x93,0x79,0x9a,0x77,0x51,0xc1,0xd1,0x2a,0xd8,0xed,0x94,0xe4,0x7b, // 000014d0 |..9.y.wQ..*....{|
+0xd0,0xe5,0x93,0xcd,0xa1,0x95,0x40,0x45,0x77,0x24,0x1b,0xe8,0x4e,0x1f,0x5d,0x1d, // 000014e0 |......@Ew$..N.].|
+0x92,0x68,0x19,0x42,0xbd,0x39,0xbb,0xe8,0x7b,0xcc,0x72,0xa1,0x8b,0x8f,0x7a,0x91, // 000014f0 |.h.B.9..{.r...z.|
+0x43,0x81,0xa7,0xe4,0x3f,0xc4,0x87,0xfd,0x2f,0x72,0x4b,0x4c,0xfc,0x31,0x0e,0x12, // 00001500 |C...?.../rKL.1..|
+0x71,0x75,0x97,0x53,0x2e,0x40,0x18,0x41,0x11,0xc7,0x84,0x99,0x40,0x5a,0x4e,0x76, // 00001510 |qu.S.@.A....@ZNv|
+0xfb,0xa9,0x1b,0x3a,0x80,0x3a,0xec,0x06,0x60,0xea,0xea,0x30,0x54,0x3f,0x5f,0x99, // 00001520 |...:.:..`..0T?_.|
+0x34,0x57,0x5d,0x63,0xfb,0xe2,0x52,0xa3,0x01,0xa5,0xbd,0xd8,0x83,0x8e,0xdf,0xb4, // 00001530 |4W]c..R.........|
+0xbc,0xee,0x45,0x86,0xc9,0x63,0xcf,0x76,0x75,0xb9,0x78,0xb8,0x1b,0x95,0x5a,0x30, // 00001540 |..E..c.vu.x...Z0|
+0xa6,0x45,0xa9,0x9e,0x08,0xd6,0x7c,0x05,0x55,0x3b,0xa8,0x3a,0x76,0xc9,0x9c,0xbe, // 00001550 |.E....|.U;.:v...|
+0xec,0xe1,0x2b,0x93,0xd9,0x46,0x3d,0xfd,0x91,0x70,0xb2,0x97,0x70,0x7d,0xf7,0xe0, // 00001560 |..+..F=..p..p}..|
+0x30,0x4a,0x6f,0x46,0x12,0x86,0x7c,0x79,0x67,0x2c,0x2f,0x7f,0xca,0x61,0x1e,0x86, // 00001570 |0JoF..|yg,/..a..|
+0x34,0xf3,0x0b,0xfe,0xa5,0x01,0x27,0x23,0x8d,0x87,0xa1,0xb8,0x08,0x61,0x14,0x79, // 00001580 |4.....'#.....a.y|
+0xf6,0xf4,0x17,0x53,0x2e,0x32,0x8e,0x35,0xfa,0xc7,0x06,0x8c,0x30,0xef,0x8c,0xae, // 00001590 |...S.2.5....0...|
+0x70,0x43,0x6c,0x89,0x3a,0xcd,0xbc,0x5e,0x10,0xc3,0x92,0x34,0xfc,0x58,0x85,0xdd, // 000015a0 |pCl.:..^...4.X..|
+0x05,0xb1,0x66,0x11,0x44,0x70,0x60,0x9e,0x2e,0xb6,0x6d,0xed,0x4c,0xf1,0x7d,0xda, // 000015b0 |..f.Dp`...m.L.}.|
+0xae,0xde,0xd3,0xba,0xf1,0xf2,0xac,0xa3,0x00,0xd1,0x8a,0xf3,0x63,0x08,0x5a,0xd3, // 000015c0 |............c.Z.|
+0x9a,0x3d,0xc2,0x03,0xca,0xf4,0x61,0x42,0x8f,0xf3,0x84,0xd0,0x38,0x7f,0xb5,0x85, // 000015d0 |.=....aB....8...|
+0x02,0xe2,0x6d,0xfd,0xc0,0x1e,0x96,0x04,0xc8,0xbb,0x13,0x8c,0xbb,0xee,0x03,0xe8, // 000015e0 |..m.............|
+0x84,0x93,0xcd,0xd8,0xc4,0x16,0x08,0x1a,0x93,0x4b,0x55,0x1e,0x54,0x36,0xd1,0xe5, // 000015f0 |.........KU.T6..|
+0x7f,0x37,0xae,0xdf,0xde,0x73,0x0c,0x22,0x79,0x56,0xe6,0xf3,0x45,0x4f,0x67,0x72, // 00001600 |.7...s."yV..EOgr|
+0xcf,0x4f,0x55,0xc7,0x2a,0x9f,0xbe,0x3a,0x94,0xd1,0x10,0x5a,0xdb,0xb5,0x47,0xfa, // 00001610 |.OU.*..:...Z..G.|
+0xd2,0x8f,0x05,0x5f,0x8f,0x83,0x9f,0xf1,0x2c,0x7f,0x8b,0xec,0xdb,0x78,0x33,0xa1, // 00001620 |..._....,....x3.|
+0xbb,0xe6,0x0b,0x5e,0x55,0x0e,0xe9,0x88,0x2e,0x33,0xb6,0xdc,0x94,0x22,0xf8,0x63, // 00001630 |...^U....3...".c|
+0x91,0x7a,0xdc,0x97,0xc4,0x39,0xa0,0x2c,0xcc,0x24,0x1f,0x40,0xaa,0x37,0xa5,0x71, // 00001640 |.z...9.,.$.@.7.q|
+0xfa,0xb3,0xe9,0x9f,0x69,0xa6,0x8b,0x04,0xcd,0xf0,0xe6,0x29,0x58,0xc3,0x01,0xb2, // 00001650 |....i......)X...|
+0xb5,0xdf,0x6b,0x8e,0x50,0x46,0x90,0x69,0x00,0xb7,0x7c,0x39,0x0f,0x3e,0x19,0x9b, // 00001660 |..k.PF.i..|9.>..|
+0x26,0x0c,0x28,0xf1,0x8b,0x04,0x7c,0xfb,0xe5,0x62,0x4e,0xc7,0x7e,0x7f,0xc6,0x14, // 00001670 |&.(...|..bN.~...|
+0xcb,0x3f,0x05,0x20,0x51,0xa5,0x93,0x2d,0x5d,0xbe,0x90,0xfc,0x93,0x72,0x2d,0xc0, // 00001680 |.?. Q..-]....r-.|
+0x0a,0x09,0xf7,0x1c,0xa6,0xc6,0x27,0x68,0x8b,0x19,0x60,0x47,0xe2,0x31,0x8d,0x7e, // 00001690 |......'h..`G.1.~|
+0xf3,0xfb,0xbe,0xab,0x49,0x0a,0x0b,0x07,0x81,0x44,0x21,0x64,0x96,0x64,0x07,0x6e, // 000016a0 |....I....D!d.d.n|
+0xd1,0x8d,0x89,0x95,0xd9,0x3f,0x99,0xcd,0x09,0xe5,0xc1,0xac,0xb8,0x2a,0x96,0x22, // 000016b0 |.....?.......*."|
+0xc8,0xa6,0x31,0xe1,0xda,0x3d,0x24,0x8b,0xa3,0x8a,0x6d,0x73,0x68,0xf7,0x5a,0xd5, // 000016c0 |..1..=$...msh.Z.|
+0x3e,0x14,0xfa,0x7c,0x32,0x5f,0x3e,0x46,0x93,0x26,0x64,0x99,0x81,0xec,0xcf,0xb9, // 000016d0 |>..|2_>F.&d.....|
+0xbf,0x79,0x91,0xf1,0x17,0xa2,0xec,0xcb,0x95,0x62,0xff,0xc0,0xc3,0xd9,0x4a,0x78, // 000016e0 |.y.......b....Jx|
+0x5c,0xee,0x1b,0x33,0x16,0x8d,0xe2,0x4d,0x7d,0x21,0xb0,0x30,0xa8,0x79,0xbf,0x97, // 000016f0 |\..3...M}!.0.y..|
+0x86,0xd5,0x85,0x08,0x71,0x3b,0x00,0x42,0x23,0xca,0xa9,0xaf,0xc8,0xa6,0xcc,0x0b, // 00001700 |....q;.B#.......|
+0xa5,0xa3,0x83,0x27,0x4b,0x26,0x4f,0xa4,0x1b,0x63,0xbd,0x0f,0x67,0x05,0xe6,0x06, // 00001710 |...'K&O..c..g...|
+0xd1,0x44,0xfd,0xe6,0xc5,0x50,0x9a,0x91,0x65,0x66,0x87,0x86,0x3d,0x93,0x3c,0x05, // 00001720 |.D...P..ef..=.<.|
+0x74,0x80,0x6a,0x5a,0x2d,0x16,0x80,0xd4,0xe4,0x56,0xc0,0x40,0x6c,0x06,0x58,0x84, // 00001730 |t.jZ-....V.@l.X.|
+0x5b,0x65,0xf5,0xac,0x6f,0xb0,0x7e,0xfc,0x83,0x79,0x3b,0x73,0x27,0xb3,0x6d,0x01, // 00001740 |[e..o.~..y;s'.m.|
+0xf5,0x34,0xd5,0x31,0x42,0x26,0x67,0x3b,0xe1,0xb6,0x03,0x36,0x81,0xb6,0xfb,0xdc, // 00001750 |.4.1B&g;...6....|
+0x01,0x4e,0xd0,0x26,0x03,0xa2,0x50,0x63,0x11,0xdf,0xa7,0xce,0xed,0x6b,0x20,0xae, // 00001760 |.N.&..Pc.....k .|
+0x6f,0xc4,0x00,0xb8,0x77,0xef,0x60,0xc9,0xbe,0x6a,0x72,0x4a,0x80,0x20,0xd5,0x49, // 00001770 |o...w.`..jrJ. .I|
+0xc4,0x09,0x37,0xb7,0x00,0x32,0x82,0x68,0xc2,0xfe,0xd5,0x62,0x91,0x63,0xc0,0x2c, // 00001780 |..7..2.h...b.c.,|
+0xca,0xe2,0x14,0x1b,0x63,0xe3,0x9d,0xc4,0xce,0xd2,0x5b,0x92,0x70,0x3d,0xfd,0xec, // 00001790 |....c.....[.p=..|
+0x29,0x0c,0x2b,0xbb,0xf6,0x94,0x42,0x43,0x55,0x6c,0xe9,0x0a,0x63,0x39,0x86,0x33, // 000017a0 |).+...BCUl..c9.3|
+0x8e,0x46,0x2e,0x9a,0xb3,0x02,0x3e,0x2f,0xf0,0xcb,0xb8,0x52,0x70,0xd6,0xf6,0x98, // 000017b0 |.F....>/...Rp...|
+0xd2,0xaa,0x84,0x7f,0x75,0x9a,0x71,0xb9,0x3c,0x4d,0xd9,0x5c,0x4a,0x56,0x81,0xac, // 000017c0 |....u.q.<M.\JV..|
+0xff,0x7a,0x73,0xce,0xb5,0x1f,0xfe,0xc6,0xa9,0xfb,0x90,0xc7,0xa2,0x1c,0x04,0x63, // 000017d0 |.zs............c|
+0x23,0x34,0xe9,0xb5,0xd8,0xe0,0xcd,0x0d,0x7c,0x0c,0x08,0x5b,0xf8,0x10,0xfe,0x47, // 000017e0 |#4......|..[...G|
+0x76,0x86,0xb6,0x9e,0x54,0x26,0x68,0x8d,0x48,0x0c,0xcb,0x72,0x96,0x42,0xf8,0xd4, // 000017f0 |v...T&h.H..r.B..|
+0xb4,0x6e,0x0b,0x12,0xd1,0x8b,0x4c,0x8f,0x84,0xa9,0x92,0x4e,0xb4,0xce,0xd3,0x85, // 00001800 |.n....L....N....|
+0xeb,0xa3,0xc1,0x8d,0x91,0x7b,0xb0,0x75,0xaf,0x0a,0xf9,0x02,0x1b,0x58,0xa9,0xde, // 00001810 |.....{.u.....X..|
+0xd1,0x8e,0x88,0xce,0xf3,0xca,0x74,0xde,0xf1,0x91,0x2c,0xfe,0x55,0xed,0xab,0x83, // 00001820 |......t...,.U...|
+0x34,0xb4,0x7a,0x1a,0xc5,0x72,0xc7,0xa3,0xde,0x2e,0xfc,0xe9,0xb3,0x63,0xb4,0x9f, // 00001830 |4.z..r.......c..|
+0xca,0x8d,0x09,0x7f,0x88,0x4b,0x83,0x3a,0x9d,0x55,0x8e,0x42,0x90,0x4f,0xb6,0xbb, // 00001840 |.....K.:.U.B.O..|
+0x50,0xb0,0x8b,0x31,0xf4,0x3f,0xd8,0xc9,0xef,0x0a,0x44,0x0b,0x04,0x49,0xce,0xc2, // 00001850 |P..1.?....D..I..|
+0x3e,0x41,0xd0,0xb5,0x4f,0x04,0x99,0x59,0x25,0x4d,0x70,0x8b,0x0a,0x33,0x45,0x1b, // 00001860 |>A..O..Y%Mp..3E.|
+0xac,0x3d,0xa0,0x1e,0x8a,0xf2,0x06,0xfe,0x0a,0x68,0xcb,0x9b,0x22,0x49,0x4c,0x12, // 00001870 |.=.......h.."IL.|
+0x6f,0xf4,0x18,0x4c,0x29,0xdd,0xb2,0x57,0x57,0x71,0x14,0x66,0xec,0x43,0x30,0x8e, // 00001880 |o..L)..WWq.f.C0.|
+0x63,0xfb,0xb0,0x96,0xbf,0x53,0xc2,0xe8,0xfc,0xfa,0x60,0x5d,0x9f,0xe7,0xd3,0x53, // 00001890 |c....S....`]...S|
+0x3e,0x30,0x71,0x07,0x85,0x63,0x9a,0xac,0x11,0xe5,0x39,0xb7,0x8c,0x84,0x11,0xaa, // 000018a0 |>0q..c....9.....|
+0x5f,0x65,0x7f,0x0b,0x3a,0xff,0xfa,0xef,0x32,0x67,0x74,0xd4,0xd6,0x73,0xe9,0x59, // 000018b0 |_e..:...2gt..s.Y|
+0x5e,0xd5,0xc9,0xa7,0x2c,0x97,0x4d,0xb7,0x69,0x1f,0x05,0x16,0x20,0xbe,0x05,0x2f, // 000018c0 |^...,.M.i... ../|
+0x18,0xdf,0x0b,0xd7,0xa6,0x12,0x4c,0xcd,0xe9,0xfe,0x30,0xd4,0x26,0xcc,0x2d,0x2b, // 000018d0 |......L...0.&.-+|
+0x83,0x48,0xb4,0x49,0x63,0x76,0x91,0xc5,0xf9,0xde,0xff,0xa0,0x4e,0x62,0x11,0x6f, // 000018e0 |.H.Icv......Nb.o|
+0x24,0xff,0xc0,0x4b,0xf2,0x1c,0xf3,0xc2,0xc1,0xa7,0x7d,0x83,0x8f,0x84,0xd2,0x71, // 000018f0 |$..K......}....q|
+0x64,0x96,0xb5,0xd1,0x08,0x6b,0xf9,0x0b,0xc7,0x28,0x5f,0xa2,0xf3,0xca,0x87,0xa7, // 00001900 |d....k...(_.....|
+0x5e,0xe4,0xe8,0x25,0x12,0x7a,0xcb,0xa2,0xbe,0x3f,0x63,0x98,0x1b,0xe6,0xff,0x49, // 00001910 |^..%.z...?c....I|
+0xbe,0x6b,0x05,0xfa,0x91,0xf7,0x92,0x83,0x2b,0x16,0xe3,0xb8,0x59,0x9d,0xe3,0x53, // 00001920 |.k......+...Y..S|
+0xa7,0xe0,0x86,0xb5,0x2a,0xb9,0x5a,0xd0,0x52,0xab,0xc3,0x48,0xf3,0x26,0xf2,0x57, // 00001930 |....*.Z.R..H.&.W|
+0xf7,0x23,0xd8,0xfb,0x0c,0xe2,0x4b,0x0c,0xfc,0x75,0x54,0xd4,0x4b,0xe2,0x20,0x43, // 00001940 |.#....K..uT.K. C|
+0x47,0xc4,0x13,0x83,0x78,0x87,0xa8,0xcf,0x36,0xae,0x28,0x75,0xa2,0xcb,0x7c,0x11, // 00001950 |G...x...6.(u..|.|
+0x75,0x81,0xe2,0x15,0x75,0x47,0xaa,0x07,0x32,0x2c,0x3a,0x9e,0x45,0x20,0x2a,0x20, // 00001960 |u...uG..2,:.E * |
+0x43,0xdb,0x3c,0xc2,0x48,0xec,0x48,0x99,0xf7,0x2d,0x8b,0x0b,0x46,0xbc,0x92,0x74, // 00001970 |C.<.H.H..-..F..t|
+0xb7,0x9b,0xc9,0xd2,0x3d,0x50,0x5e,0x80,0x8e,0x50,0xf9,0x8f,0x0c,0x92,0x42,0x6b, // 00001980 |....=P^..P....Bk|
+0x68,0x02,0x26,0x5e,0x29,0x66,0x90,0xce,0x24,0x68,0xa9,0x42,0x73,0xd8,0xda,0x16, // 00001990 |h.&^)f..$h.Bs...|
+0xdc,0xbc,0xb7,0xc7,0xdc,0x4d,0xe1,0xbc,0x57,0x8f,0xca,0x10,0xf6,0xc5,0xc5,0xc4, // 000019a0 |.....M..W.......|
+0xfc,0x7a,0xdd,0x8e,0x06,0x04,0xc8,0x9c,0x11,0x28,0xa5,0x27,0xb9,0x20,0xa9,0xd4, // 000019b0 |.z.......(.'. ..|
+0x56,0xbc,0xb6,0xa4,0x2a,0x80,0x24,0xd0,0x64,0x41,0x73,0x8c,0x83,0x07,0xd9,0x32, // 000019c0 |V...*.$.dAs....2|
+0x2c,0x3f,0xb2,0xfe,0xbb,0xd5,0x11,0x02,0x4d,0x5d,0x37,0x76,0xa4,0xb1,0xed,0x9f, // 000019d0 |,?......M]7v....|
+0xde,0x4f,0x0f,0xe7,0x63,0x52,0xb7,0x06,0x04,0x7d,0x47,0x0a,0xb4,0x0c,0x1e,0x46, // 000019e0 |.O..cR...}G....F|
+0x18,0xb1,0x92,0xed,0x84,0x27,0x78,0xc5,0x4b,0x2d,0x2a,0x0b,0xf6,0xe5,0x45,0x53, // 000019f0 |.....'x.K-*...ES|
+0x0e,0x49,0x2d,0x33,0xe8,0x06,0x0c,0x81,0xfb,0x38,0x4a,0x49,0xb5,0x61,0x21,0x0d, // 00001a00 |.I-3.....8JI.a!.|
+0x80,0xf7,0x79,0x1e,0x41,0x42,0xf9,0x46,0xd9,0x3a,0xfe,0xa1,0x3d,0x5f,0xf3,0x67, // 00001a10 |..y.AB.F.:..=_.g|
+0xa1,0xe3,0x79,0xa8,0xb1,0xe0,0x55,0x2a,0xae,0xf8,0x99,0xb3,0x1f,0xe0,0x5e,0xda, // 00001a20 |..y...U*......^.|
+0x05,0x93,0x50,0x1d,0x17,0x20,0x3a,0xcf,0xef,0x1e,0xd1,0xf2,0x0f,0x85,0x16,0xce, // 00001a30 |..P.. :.........|
+0x47,0x4c,0x88,0x78,0x8c,0xc2,0x7b,0x79,0x79,0xb8,0x8c,0x4f,0x09,0x1a,0xf0,0xcb, // 00001a40 |GL.x..{yy..O....|
+0x77,0x12,0x48,0x75,0x57,0xf3,0xdd,0x78,0x12,0xe0,0x3b,0xa2,0xf5,0x49,0xe9,0xda, // 00001a50 |w.HuW..x..;..I..|
+0x18,0xf2,0xcb,0xee,0xa2,0x5b,0x5a,0xca,0xaf,0x40,0x4c,0x67,0x22,0xec,0x2e,0x9f, // 00001a60 |.....[Z..@Lg"...|
+0x64,0x9e,0x7d,0xb2,0xcd,0x2f,0x47,0x18,0x7e,0xe7,0xae,0xb9,0xaf,0xd6,0x0f,0xd6, // 00001a70 |d.}../G.~.......|
+0x59,0x8b,0x96,0x4e,0x20,0x4b,0xd4,0x60,0xa1,0x25,0x15,0x5b,0xf3,0xbf,0x20,0xae, // 00001a80 |Y..N K.`.%.[.. .|
+0xed,0x47,0x88,0xeb,0xf8,0x91,0xc1,0xc7,0x0e,0x8f,0x4b,0x09,0xd1,0x23,0x9f,0x9c, // 00001a90 |.G........K..#..|
+0xfa,0x3f,0x5e,0x89,0xae,0xdd,0x51,0xf8,0xdf,0x65,0xbc,0xe7,0x0b,0xb6,0x4d,0xdc, // 00001aa0 |.?^...Q..e....M.|
+0x77,0x08,0x72,0x3c,0xd4,0xec,0x7a,0x52,0xef,0xe4,0x71,0xa2,0x64,0xaa,0xb4,0xb9, // 00001ab0 |w.r<..zR..q.d...|
+0x1e,0x24,0x0f,0x94,0xb1,0x65,0xb9,0x37,0xc3,0xea,0xa7,0xe4,0x2d,0xf0,0x71,0xb8, // 00001ac0 |.$...e.7....-.q.|
+0x03,0xd8,0xea,0x6e,0xfa,0x88,0x4b,0x7e,0x07,0x76,0x4a,0xfa,0xe5,0x82,0xb8,0x51, // 00001ad0 |...n..K~.vJ....Q|
+0x61,0xfa,0x9f,0xe6,0x42,0x3d,0xf2,0xad,0xe1,0xe2,0xce,0xf2,0xf4,0x2d,0xe8,0x4c, // 00001ae0 |a...B=.......-.L|
+0x91,0xa4,0x6b,0xfc,0x12,0x79,0x77,0x99,0xaf,0xa3,0x14,0x53,0x83,0x6f,0xc5,0xe5, // 00001af0 |..k..yw....S.o..|
+0xe9,0xd8,0x81,0xe9,0x98,0x92,0x54,0x2c,0x0e,0x39,0xe4,0x00,0xe5,0x73,0x75,0x46, // 00001b00 |......T,.9...suF|
+0xcb,0xc6,0x0e,0xcf,0x83,0xa3,0xed,0x10,0xfb,0x07,0x36,0xc9,0x6a,0xed,0xef,0xd4, // 00001b10 |..........6.j...|
+0x2e,0x99,0x2c,0xce,0xbb,0xf1,0xcf,0x28,0xe4,0x68,0xf6,0x1a,0x2d,0x46,0xf4,0x0f, // 00001b20 |..,....(.h..-F..|
+0x04,0xf6,0x0b,0xb7,0x44,0xed,0xcf,0x28,0x98,0xaa,0x14,0xbd,0x06,0x58,0x33,0x36, // 00001b30 |....D..(.....X36|
+0x50,0x34,0x17,0xa4,0x0e,0xc2,0x89,0x18,0xa6,0x61,0x27,0xa4,0x72,0x90,0x27,0xfe, // 00001b40 |P4.......a'.r.'.|
+0x65,0xa5,0x9b,0x1d,0xcf,0x51,0xe2,0x1f,0xf5,0x61,0x51,0x0b,0x60,0x8b,0xff,0x68, // 00001b50 |e....Q...aQ.`..h|
+0xee,0x86,0x25,0x04,0x95,0x3c,0x0d,0x3b,0x14,0x8a,0x5c,0x37,0x67,0xee,0x20,0x9b, // 00001b60 |..%..<.;..\7g. .|
+0x82,0xd7,0x2a,0x91,0x63,0x94,0x7c,0x4c,0x81,0x43,0xe1,0x1b,0xea,0xc8,0x88,0x09, // 00001b70 |..*.c.|L.C......|
+0xab,0xdc,0x32,0xe3,0xad,0xb7,0xf5,0xf4,0x27,0x49,0x1b,0x5c,0x55,0xbc,0x5c,0x9a, // 00001b80 |..2.....'I.\U.\.|
+0xff,0x3e,0x26,0x7d,0x98,0xb8,0xe9,0xf2,0x75,0xdd,0xd0,0x5f,0x09,0x1a,0xda,0x33, // 00001b90 |.>&}....u.._...3|
+0x30,0x64,0x25,0xe3,0x45,0x53,0x6e,0xbc,0x93,0x43,0x4e,0xec,0x63,0xc5,0x14,0x19, // 00001ba0 |0d%.ESn..CN.c...|
+0x24,0xc9,0xdf,0x4e,0x05,0xf8,0xfc,0x23,0xe8,0x73,0x7a,0xc7,0x30,0x66,0x88,0xd1, // 00001bb0 |$..N...#.sz.0f..|
+0x30,0x79,0xdc,0xe2,0xfa,0x93,0xf6,0x42,0x98,0xc8,0x04,0x1b,0x7a,0x74,0x6d,0xbb, // 00001bc0 |0y.....B....ztm.|
+0x21,0xbb,0xbe,0xc9,0xec,0xaf,0xfa,0xf4,0x6f,0x83,0x01,0xd5,0x92,0xa4,0x1a,0xd0, // 00001bd0 |!.......o.......|
+0x8e,0x4a,0x2e,0xd4,0x5a,0x77,0xfb,0x2d,0xff,0x5c,0x64,0x81,0x2c,0x7d,0x6f,0x52, // 00001be0 |.J..Zw.-.\d.,}oR|
+0x6e,0xea,0x9e,0xda,0x9a,0xf1,0xb8,0x3f,0xf7,0xae,0xfb,0x23,0xd7,0x38,0x2b,0x8a, // 00001bf0 |n......?...#.8+.|
+0xe5,0x7f,0xd7,0x12,0xa3,0xe0,0x7a,0xdd,0x9b,0xae,0x88,0x03,0x79,0x50,0xd1,0xff, // 00001c00 |......z.....yP..|
+0x96,0x56,0xb5,0x55,0xd7,0xa0,0x3d,0x1a,0xb3,0x7a,0x64,0x72,0x50,0xe9,0xb8,0xd5, // 00001c10 |.V.U..=..zdrP...|
+0x42,0x14,0x9e,0x20,0x3d,0x1a,0x71,0x7a,0x47,0xbc,0x96,0x01,0x83,0x27,0x48,0x1b, // 00001c20 |B.. =.qzG....'H.|
+0x70,0xf2,0xc3,0xe8,0x77,0x4f,0x59,0x1b,0x23,0x72,0xa5,0xa2,0x4b,0x4e,0xdc,0x69, // 00001c30 |p...wOY.#r..KN.i|
+0x7b,0xe7,0xff,0x85,0x00,0x43,0x82,0x93,0xdb,0x2f,0x7b,0x9a,0x28,0x7f,0x76,0xb2, // 00001c40 |{....C.../{.(.v.|
+0xfe,0xeb,0xe3,0xac,0x56,0x91,0xae,0xdf,0x9c,0x43,0xcc,0xef,0xbe,0x35,0x6e,0xa8, // 00001c50 |....V....C...5n.|
+0xe9,0x09,0x06,0x08,0x86,0x9b,0x0c,0x95,0x42,0x9c,0xef,0x97,0x80,0x7c,0x93,0x3f, // 00001c60 |........B....|.?|
+0x13,0x8b,0xcc,0xda,0xcb,0x6e,0x15,0x97,0x3d,0x0b,0x0f,0xff,0xe7,0x28,0x70,0x25, // 00001c70 |.....n..=....(p%|
+0xbf,0x10,0x10,0x94,0xef,0x89,0xc0,0x13,0xfd,0x5b,0x9d,0xad,0x62,0xef,0x5f,0x73, // 00001c80 |.........[..b._s|
+0xf3,0x79,0x55,0x71,0x5a,0x56,0x71,0xfb,0xa3,0xd0,0x0f,0x66,0x15,0xb7,0x9f,0x02, // 00001c90 |.yUqZVq....f....|
+0x7f,0xe0,0x15,0x1b,0xb6,0x44,0x53,0xa0,0x05,0x2f,0x4f,0x49,0xf2,0x96,0x9e,0xb6, // 00001ca0 |.....DS../OI....|
+0xb8,0x28,0xf5,0x70,0xc4,0x22,0xa8,0xaa,0x9b,0x84,0x71,0xef,0x92,0x8f,0xd8,0xef, // 00001cb0 |.(.p."....q.....|
+0x7a,0x43,0xfc,0x1b,0xc2,0x96,0xb6,0xed,0x16,0x24,0x68,0x1b,0xfc,0x1d,0xf2,0x7e, // 00001cc0 |zC.......$h....~|
+0x27,0xaf,0x1f,0x3f,0x76,0x9b,0x32,0xbe,0x04,0xa3,0x35,0xe2,0xa6,0x98,0x6e,0x73, // 00001cd0 |'..?v.2...5...ns|
+0x82,0x8c,0xb5,0x83,0xbc,0xe4,0x44,0x36,0x47,0x59,0x9d,0x9f,0xdf,0xc0,0xe8,0xf0, // 00001ce0 |......D6GY......|
+0xa8,0xff,0x01,0x56,0x21,0x31,0x48,0x71,0x03,0x1b,0x59,0x79,0x41,0x26,0x18,0x70, // 00001cf0 |...V!1Hq..YyA&.p|
+0x04,0x82,0xfb,0x8c,0x1f,0x13,0xb6,0x1e,0xdb,0x9a,0x39,0x5a,0xa0,0x3f,0xe5,0xc8, // 00001d00 |..........9Z.?..|
+0x65,0x2a,0x48,0xed,0xd1,0x1d,0x09,0x50,0x56,0x54,0x5e,0xea,0xdc,0xc7,0xaa,0x0e, // 00001d10 |e*H....PVT^.....|
+0xa5,0xf4,0x56,0x17,0xa2,0x51,0x05,0x96,0x7d,0x6d,0xbe,0x62,0x6c,0x4a,0xa5,0xab, // 00001d20 |..V..Q..}m.blJ..|
+0x3c,0x77,0x76,0xca,0x5e,0x2f,0x4f,0x2d,0x05,0x1b,0xce,0x3d,0x97,0xd9,0x31,0xac, // 00001d30 |<wv.^/O-...=..1.|
+0x39,0x6e,0x7e,0x8f,0x62,0x55,0x09,0xb8,0xc6,0x9e,0x12,0x94,0x9f,0x46,0x4c,0xc5, // 00001d40 |9n~.bU.......FL.|
+0xcd,0x70,0xda,0x91,0x37,0x0a,0xb8,0x1e,0xbf,0x26,0x39,0x83,0x0a,0x87,0xd7,0x32, // 00001d50 |.p..7....&9....2|
+0x6c,0x44,0x80,0xd9,0xb6,0xe0,0x06,0x98,0x53,0xb2,0x37,0x2f,0xf5,0x46,0x67,0x11, // 00001d60 |lD......S.7/.Fg.|
+0x34,0x21,0xce,0xbf,0x66,0xfb,0x50,0xfa,0x7b,0x3d,0x83,0xee,0xd1,0x63,0x99,0x85, // 00001d70 |4!..f.P.{=...c..|
+0x9c,0x4f,0x26,0x56,0xe5,0x0e,0xb4,0x0f,0x61,0x9e,0xe0,0x01,0x9b,0x5f,0x2d,0x4a, // 00001d80 |.O&V....a...._-J|
+0x28,0x19,0x60,0x8e,0x98,0xa6,0x5f,0xfc,0x26,0x1a,0x30,0xa0,0x92,0x7a,0xb2,0xa4, // 00001d90 |(.`..._.&.0..z..|
+0x64,0x03,0x08,0xb5,0x89,0xba,0x49,0x83,0x9c,0x70,0x82,0xb4,0x9d,0xca,0x01,0x9d, // 00001da0 |d.....I..p......|
+0x27,0x4b,0x68,0xa4,0xdf,0x77,0x7f,0x1d,0xf1,0xa2,0x39,0x0e,0x45,0x7c,0xfc,0xf0, // 00001db0 |'Kh..w....9.E|..|
+0xaf,0x6e,0xa3,0x54,0xe8,0xe4,0x4f,0x8d,0x5a,0xc7,0x12,0xa9,0x44,0x66,0xcb,0x60, // 00001dc0 |.n.T..O.Z...Df.`|
+0x5d,0x47,0x36,0x44,0xbb,0x61,0xde,0xc0,0x48,0xb5,0xb2,0x2d,0x51,0x56,0x62,0xd6, // 00001dd0 |]G6D.a..H..-QVb.|
+0xe4,0x1f,0x20,0x82,0x68,0x80,0x28,0x8a,0x4c,0xb6,0xc1,0x4b,0x26,0x38,0x3a,0x08, // 00001de0 |.. .h.(.L..K&8:.|
+0x49,0x8d,0xe6,0x75,0x71,0x10,0x41,0x3f,0x9a,0xe2,0x38,0xcc,0x9a,0xeb,0x2e,0x5a, // 00001df0 |I..uq.A?..8....Z|
+0x33,0xec,0xd2,0x81,0x01,0xd2,0xcb,0x7e,0xe5,0xdd,0xe6,0x26,0x70,0x31,0xb5,0xdd, // 00001e00 |3......~...&p1..|
+0xac,0xa7,0xf4,0x00,0x54,0x99,0xf0,0xf4,0x92,0x89,0xcc,0x76,0x86,0x95,0x07,0x4c, // 00001e10 |....T......v...L|
+0xf9,0x8f,0xf2,0x40,0x27,0x54,0x41,0xd0,0x58,0xf7,0x1f,0x61,0x8b,0xf2,0x40,0x61, // 00001e20 |...@'TA.X..a..@a|
+0x6e,0x9e,0x3a,0xb0,0x72,0x8c,0xc3,0x09,0x21,0x62,0xdb,0xc2,0xe6,0xa5,0xc6,0x95, // 00001e30 |n.:.r...!b......|
+0x50,0x85,0xc8,0x3b,0xe9,0xbb,0xc2,0xc9,0x9d,0xc6,0xd4,0x6e,0x41,0xda,0x76,0x0a, // 00001e40 |P..;.......nA.v.|
+0x75,0x9d,0xc9,0x88,0x14,0x30,0x8d,0xa8,0xaf,0x33,0xc0,0x07,0x5a,0x13,0xc6,0x8a, // 00001e50 |u....0...3..Z...|
+0x6d,0x9c,0x19,0x69,0xdc,0x0b,0xd8,0x45,0x02,0x84,0x18,0x8a,0xd2,0x3e,0x76,0xfa, // 00001e60 |m..i...E.....>v.|
+0xb2,0x27,0xc5,0xf5,0xbb,0xab,0x1a,0x21,0x99,0xda,0xf5,0x11,0x8f,0x96,0xbd,0x52, // 00001e70 |.'.....!.......R|
+0x60,0xc3,0x17,0x6d,0x19,0x48,0x6f,0x70,0x45,0x79,0xcd,0xe1,0x0a,0xa3,0x06,0x03, // 00001e80 |`..m.HopEy......|
+0x02,0x42,0x97,0x8a,0x71,0x01,0x8f,0xce,0x3e,0xbe,0xa6,0x92,0x87,0xa7,0xe7,0xb2, // 00001e90 |.B..q...>.......|
+0x10,0xa8,0x72,0x5f,0x3f,0x5c,0x85,0x91,0x30,0xf4,0x24,0xbc,0x54,0x1e,0xf1,0xe0, // 00001ea0 |..r_?\..0.$.T...|
+0xea,0x2f,0x9d,0x3c,0x68,0xe5,0x45,0x41,0x08,0xd1,0x92,0x32,0x36,0xd4,0xa9,0xb8, // 00001eb0 |./.<h.EA...26...|
+0xa4,0x55,0x48,0x9b,0x22,0xaa,0xb1,0x34,0xe6,0x39,0x4a,0xae,0x2d,0x4e,0x69,0x51, // 00001ec0 |.UH."..4.9J.-NiQ|
+0x7d,0x44,0xb4,0x4f,0x37,0xbf,0x72,0xc4,0x73,0xc0,0x28,0xab,0xcd,0xc5,0xba,0x2c, // 00001ed0 |}D.O7.r.s.(....,|
+0xa0,0x55,0x79,0xd9,0xef,0xca,0xf8,0xb3,0x1e,0xc8,0x79,0x2c,0xbf,0x47,0x6a,0x90, // 00001ee0 |.Uy.......y,.Gj.|
+0x6d,0xf8,0x03,0xe4,0x9e,0x29,0x95,0xb8,0x35,0x9c,0x6c,0xa9,0xe0,0x26,0x99,0xbf, // 00001ef0 |m....)..5.l..&..|
+0x3d,0xd0,0x28,0xd9,0x59,0xa4,0xab,0x9f,0x91,0x14,0x20,0xab,0x9a,0x35,0x64,0xf8, // 00001f00 |=.(.Y..... ..5d.|
+0x91,0x9a,0x6e,0x4f,0x2f,0x45,0x1e,0x14,0xa5,0xc0,0x05,0xdc,0x54,0x51,0xd4,0x76, // 00001f10 |..nO/E......TQ.v|
+0xeb,0xaa,0x5d,0x4c,0x61,0xfe,0x9d,0xdb,0x40,0xfc,0x4b,0x28,0xa7,0xbe,0x6f,0x8a, // 00001f20 |..]La...@.K(..o.|
+0xe9,0x1b,0xd6,0x36,0xf5,0x29,0xbc,0xf1,0x83,0x97,0x49,0x2d,0x50,0xef,0x4e,0x51, // 00001f30 |...6.)....I-P.NQ|
+0x9f,0xa1,0x03,0x51,0x89,0x7e,0x92,0xde,0x06,0x50,0x09,0x04,0xf1,0x01,0xe1,0xd7, // 00001f40 |...Q.~...P......|
+0x4f,0x2b,0xd0,0x5d,0xca,0x70,0xa7,0xd3,0x92,0xdb,0x8e,0x3c,0x43,0xe4,0x60,0x34, // 00001f50 |O+.].p.....<C.`4|
+0x34,0xf2,0x03,0x61,0xd8,0x64,0xef,0x99,0xb5,0x94,0x13,0x92,0x5e,0x20,0x15,0xd0, // 00001f60 |4..a.d......^ ..|
+0xed,0xab,0x46,0xcb,0x8b,0xf6,0x4d,0x34,0xe2,0x5e,0x40,0xc9,0x16,0x5d,0x4b,0x19, // 00001f70 |..F...M4.^@..]K.|
+0x43,0xa1,0xcc,0xa9,0xc1,0x03,0xe2,0x78,0x58,0xe2,0x2c,0xbb,0x72,0xfb,0x22,0xf1, // 00001f80 |C......xX.,.r.".|
+0xc8,0xe1,0x77,0xb1,0xcd,0xd5,0x68,0x58,0x13,0x4b,0x1b,0x61,0x5e,0x73,0x29,0x13, // 00001f90 |..w...hX.K.a^s).|
+0x89,0x85,0x53,0x47,0x26,0x0f,0x41,0xa3,0x15,0x0e,0x2f,0x12,0x01,0x20,0xde,0xbe, // 00001fa0 |..SG&.A.../.. ..|
+0x3e,0x91,0xb4,0xe2,0xb4,0x85,0x66,0x95,0x6c,0xe7,0x4c,0xfe,0xbf,0xf7,0x16,0x89, // 00001fb0 |>.....f.l.L.....|
+0xcd,0x80,0xda,0xc2,0x58,0x51,0xe5,0x7a,0x3d,0xe9,0x26,0x07,0xb0,0xe8,0x5f,0x86, // 00001fc0 |....XQ.z=.&..._.|
+0x1e,0x68,0x5b,0x5e,0x83,0x0d,0x87,0x43,0x33,0x3c,0xd8,0x2c,0x0f,0xe1,0x58,0xbb, // 00001fd0 |.h[^...C3<.,..X.|
+0xd8,0x9c,0x49,0xf5,0x81,0x48,0x3c,0xdd,0x03,0xe5,0x1d,0x24,0x1a,0xc2,0x5c,0x1c, // 00001fe0 |..I..H<....$..\.|
+0x81,0xad,0x48,0x68,0x2e,0x5b,0x17,0x8a,0x7d,0x4d,0x28,0x5f,0xc1,0xcc,0x96,0x5f, // 00001ff0 |..Hh.[..}M(_..._|
+0xc3,0xb3,0x80,0xf4,0x48,0x4e,0x38,0x2d,0x06,0xf8,0xc5,0xf3,0x58,0xb9,0xc4,0x66, // 00002000 |....HN8-....X..f|
+0x3d,0xa7,0xbb,0xdb,0x96,0x25,0xfb,0x05,0x96,0xa6,0xa9,0x33,0xcb,0xc9,0x3e,0xca, // 00002010 |=....%.....3..>.|
+0xcf,0x79,0x00,0xf9,0x33,0xad,0x7e,0x13,0xa4,0x9f,0x64,0x71,0xc8,0xed,0xe8,0x01, // 00002020 |.y..3.~...dq....|
+0x30,0x2f,0x12,0x46,0xab,0x94,0x06,0x64,0xdc,0x79,0xfa,0xab,0xaa,0xe2,0xe5,0x81, // 00002030 |0/.F...d.y......|
+0x79,0x93,0x0f,0x27,0x7d,0xfc,0xd2,0xef,0xdd,0xd2,0x10,0x3a,0x02,0x9b,0xe8,0x75, // 00002040 |y..'}......:...u|
+0x20,0x11,0x57,0x19,0xbf,0x10,0x7e,0xa2,0x51,0x29,0xea,0x6c,0x84,0xb6,0x60,0xee, // 00002050 | .W...~.Q).l..`.|
+0xd0,0x87,0x83,0x02,0x17,0x3c,0x49,0x5a,0xfd,0x76,0xc0,0xa1,0x37,0xb7,0x78,0x00, // 00002060 |.....<IZ.v..7.x.|
+0xfd,0x22,0x28,0xeb,0x2c,0xed,0x6e,0x1b,0xed,0xb2,0x3d,0x6f,0xb9,0x07,0x57,0xdc, // 00002070 |."(.,.n...=o..W.|
+0xde,0x5c,0x90,0xb9,0xd4,0x8b,0x04,0x57,0x3e,0x08,0x19,0xed,0x82,0x3c,0xb3,0x35, // 00002080 |.\.....W>....<.5|
+0xbb,0x1e,0x1e,0x30,0x00,0xa9,0x93,0x33,0x63,0x10,0xe0,0x65,0x30,0xf8,0x9c,0x4c, // 00002090 |...0...3c..e0..L|
+0x03,0x92,0xfd,0x4e,0xf6,0xd1,0xba,0x6b,0x02,0x18,0xc6,0x82,0x99,0xfc,0xc6,0xd6, // 000020a0 |...N...k........|
+0x6d,0xdf,0x83,0x15,0x2e,0x6a,0xb7,0xf5,0x6d,0x49,0x3e,0x35,0x72,0x4a,0xc1,0x2a, // 000020b0 |m....j..mI>5rJ.*|
+0x69,0xbc,0x6c,0xdd,0x98,0xe1,0x2b,0x51,0xf3,0xc5,0xa3,0x6d,0x90,0x57,0x1c,0x98, // 000020c0 |i.l...+Q...m.W..|
+0x36,0x03,0xed,0x13,0xfe,0x02,0xba,0x61,0x62,0x9e,0xc2,0xf2,0xb2,0x01,0xa8,0x79, // 000020d0 |6......ab......y|
+0x41,0x88,0xae,0x97,0x9d,0xfd,0x30,0xb2,0xd3,0x1f,0x62,0xe7,0x08,0x81,0x6d,0x60, // 000020e0 |A.....0...b...m`|
+0x53,0x9e,0x9e,0xfb,0xf5,0x20,0x41,0xb4,0x2a,0xf2,0x3d,0x1a,0x58,0xfd,0x5b,0x11, // 000020f0 |S.... A.*.=.X.[.|
+0x8f,0x14,0x9a,0x8b,0x59,0xe2,0x9b,0xa8,0x9b,0x04,0x33,0xd2,0xa5,0x8b,0x65,0xd1, // 00002100 |....Y.....3...e.|
+0x79,0xd8,0x33,0xe6,0x77,0x61,0x89,0x47,0x8b,0xc2,0xad,0xa1,0x9b,0xc4,0x6a,0x3c, // 00002110 |y.3.wa.G......j<|
+0x94,0xa3,0xa2,0x6b,0x43,0xba,0x8d,0xbb,0x71,0x84,0x6a,0x23,0xb9,0x9e,0xcf,0x29, // 00002120 |...kC...q.j#...)|
+0xa0,0x0f,0x11,0x19,0x88,0x6a,0x34,0xfd,0x49,0xab,0xab,0xc1,0xd9,0x02,0x9b,0xc2, // 00002130 |.....j4.I.......|
+0x1e,0x95,0x0d,0xef,0x57,0x19,0xb4,0x32,0x7c,0x87,0x62,0xd5,0x03,0x4a,0x24,0x8d, // 00002140 |....W..2|.b..J$.|
+0x44,0xdd,0x04,0x4f,0x8e,0x52,0x42,0x99,0x56,0x25,0xa4,0x14,0x5d,0x66,0xbe,0xec, // 00002150 |D..O.RB.V%..]f..|
+0x91,0x41,0xb7,0x43,0x5f,0x0b,0xc7,0x9a,0xb5,0xa7,0x29,0xac,0x43,0x4b,0x6e,0xa0, // 00002160 |.A.C_.....).CKn.|
+0x79,0xfb,0x77,0xf0,0x37,0x3a,0x15,0x44,0x5d,0x7e,0xf4,0x26,0xc1,0x99,0x36,0xbb, // 00002170 |y.w.7:.D]~.&..6.|
+0xfe,0x68,0x56,0x3a,0x7b,0x5a,0x81,0x0f,0x25,0x90,0xf8,0x9c,0x6e,0x4e,0x77,0x0e, // 00002180 |.hV:{Z..%...nNw.|
+0x55,0xe7,0x69,0xdd,0xd0,0xd7,0x73,0x31,0xe8,0xa3,0x68,0x53,0x1c,0x36,0xe3,0x9e, // 00002190 |U.i...s1..hS.6..|
+0x41,0xcc,0x90,0x11,0x10,0x83,0xdc,0x59,0xd0,0x20,0xd3,0x1c,0x6d,0x8b,0x95,0x7c, // 000021a0 |A......Y. ..m..||
+0x98,0x8d,0xab,0x3f,0x8c,0xc7,0xda,0x64,0xf8,0x65,0xa3,0x67,0xf0,0xeb,0xca,0x8d, // 000021b0 |...?...d.e.g....|
+0x9d,0x22,0x82,0xb5,0xa1,0x14,0x37,0x67,0xc9,0x92,0x36,0x15,0x8b,0x15,0xe4,0x57, // 000021c0 |."....7g..6....W|
+0x0d,0x97,0x90,0x39,0xdd,0x15,0xde,0x8b,0x53,0xc5,0xc4,0x2b,0x22,0x5f,0x72,0x44, // 000021d0 |...9....S..+"_rD|
+0x08,0x2c,0x89,0x69,0x92,0xf8,0x7f,0x08,0x91,0xd3,0xbf,0x0a,0xcd,0x5d,0xab,0x44, // 000021e0 |.,.i.........].D|
+0x39,0x2b,0x31,0xbf,0xd8,0x8a,0xc7,0xc3,0xe0,0x47,0xc7,0xad,0x58,0x93,0x85,0xec, // 000021f0 |9+1......G..X...|
+0x3d,0x91,0xbe,0x10,0x8d,0x91,0xee,0x88,0x6e,0x1d,0x0f,0x36,0x59,0x3b,0xab,0x15, // 00002200 |=.......n..6Y;..|
+0xf1,0xb1,0x5f,0x49,0xd4,0x34,0x74,0x27,0x5c,0x52,0x5b,0x87,0xfa,0xf0,0x24,0xf7, // 00002210 |.._I.4t'\R[...$.|
+0x8d,0x41,0xc2,0x4b,0x2e,0x68,0x35,0x29,0x33,0x87,0xd9,0x3c,0xe5,0x46,0xa3,0xe9, // 00002220 |.A.K.h5)3..<.F..|
+0x3a,0x23,0xfc,0x7f,0x09,0xa1,0x91,0xe9,0xec,0x5e,0xaa,0x3b,0x43,0x0e,0x19,0x82, // 00002230 |:#.......^.;C...|
+0xfc,0x92,0xb1,0x0d,0x6d,0xa3,0xf5,0xee,0x26,0x15,0xc6,0x58,0xf4,0x78,0x31,0x39, // 00002240 |....m...&..X.x19|
+0x75,0x82,0x5b,0x51,0xd4,0x26,0xa4,0xc7,0xdf,0x11,0x91,0xed,0x84,0xcf,0x2f,0xee, // 00002250 |u.[Q.&......../.|
+0xad,0x97,0x91,0xcb,0xb2,0x3e,0x6a,0xf6,0xd5,0xbd,0x7e,0x4f,0x6c,0xd8,0x6e,0xd2, // 00002260 |.....>j...~Ol.n.|
+0x0b,0x76,0x0e,0xcb,0xb3,0xf8,0x0f,0xb7,0xaf,0x7c,0xa6,0xa9,0x5f,0x17,0x88,0x3f, // 00002270 |.v.......|.._..?|
+0xe6,0xcb,0x8f,0x89,0x43,0x03,0x95,0xd1,0x27,0x50,0x8f,0xb6,0x16,0xaa,0xf3,0x5a, // 00002280 |....C...'P.....Z|
+0x1c,0x95,0xe8,0x3b,0xdb,0x8a,0x91,0x0d,0x7b,0xc8,0x0b,0x14,0x32,0xbb,0xd8,0xd2, // 00002290 |...;....{...2...|
+0xd6,0xa1,0x02,0xc7,0xcd,0x14,0x96,0xb7,0x6b,0xca,0x4c,0xaa,0x18,0xef,0x90,0xc2, // 000022a0 |........k.L.....|
+0x5f,0xe8,0x3c,0xe7,0x7f,0x25,0x6a,0x0b,0xbf,0xe1,0x9b,0x44,0x89,0x67,0x23,0x11, // 000022b0 |_.<..%j....D.g#.|
+0x4b,0xbf,0x6e,0xca,0x35,0x6c,0x7f,0xb4,0xf7,0x55,0x04,0x3e,0xbd,0xf9,0xf9,0x3c, // 000022c0 |K.n.5l...U.>...<|
+0x82,0x83,0x75,0xc4,0x4a,0xe2,0xf3,0xc1,0xe7,0x2d,0xe8,0x1e,0xd1,0xb9,0x9b,0xfb, // 000022d0 |..u.J....-......|
+0xa9,0x68,0xd4,0x38,0x15,0xdd,0xbf,0x38,0xe3,0x55,0xba,0x71,0x39,0xe6,0x35,0xe2, // 000022e0 |.h.8...8.U.q9.5.|
+0xc1,0xad,0x73,0x2c,0xb3,0x99,0xe5,0x71,0x51,0xef,0x61,0x49,0xdb,0xb4,0x21,0x15, // 000022f0 |..s,...qQ.aI..!.|
+0xfc,0x19,0xad,0x45,0x64,0xc1,0xfc,0xe0,0x39,0x0f,0xe6,0x1e,0xc8,0x6e,0x00,0x74, // 00002300 |...Ed...9....n.t|
+0x92,0x2d,0x5e,0xb9,0x4c,0x92,0x3d,0xfd,0xfb,0x16,0x10,0x9a,0x5b,0x4f,0x2f,0xc1, // 00002310 |.-^.L.=.....[O/.|
+0x6e,0x78,0xc1,0x96,0x42,0x1e,0xa1,0xd1,0x13,0x08,0x92,0x9c,0xd9,0x41,0xda,0x83, // 00002320 |nx..B........A..|
+0xbf,0x51,0x09,0xfe,0xff,0xf0,0x74,0xca,0xa1,0xdb,0x0d,0x53,0x09,0xf6,0xca,0x9a, // 00002330 |.Q....t....S....|
+0x00,0xbb,0x28,0xf8,0x0d,0x90,0x2e,0x69,0x3e,0x80,0x6a,0x7b,0x7d,0x6b,0x15,0x72, // 00002340 |..(....i>.j{}k.r|
+0x47,0xe3,0xa3,0xc5,0xf1,0x02,0xf9,0x49,0x92,0x06,0x6e,0xb5,0x5d,0x84,0x25,0x4c, // 00002350 |G......I..n.].%L|
+0xda,0xb6,0x5e,0xb8,0xae,0xf0,0x88,0x36,0x96,0xe8,0x17,0xfe,0x92,0x6f,0x21,0x4e, // 00002360 |..^....6.....o!N|
+0x96,0x92,0xfa,0x90,0x6b,0x1c,0x87,0x49,0xf8,0xc6,0x58,0x0b,0x5f,0xf8,0x74,0xa9, // 00002370 |....k..I..X._.t.|
+0x58,0x30,0x4e,0xdc,0x55,0xca,0xea,0x0c,0x04,0x04,0x04,0x7b,0x28,0x54,0xa9,0xee, // 00002380 |X0N.U......{(T..|
+0x5b,0x9a,0x75,0x1f,0x78,0x22,0xdc,0x2b,0xa5,0x07,0xda,0x91,0x45,0x45,0x0a,0xf4, // 00002390 |[.u.x".+....EE..|
+0x10,0x3e,0xdc,0x61,0xdc,0x6e,0xb8,0x6e,0xf1,0xac,0x16,0x4a,0xa8,0xae,0xa2,0xc7, // 000023a0 |.>.a.n.n...J....|
+0x71,0x47,0xbf,0x57,0x84,0x20,0x9b,0x3e,0xda,0x1a,0xcb,0x05,0x63,0x7b,0x96,0x07, // 000023b0 |qG.W. .>....c{..|
+0x38,0xfa,0x10,0xd5,0x31,0x7f,0xae,0xd4,0xd7,0xb2,0x95,0x1c,0xa4,0xd3,0x0a,0x74, // 000023c0 |8...1..........t|
+0x4a,0xed,0x9d,0x6f,0xca,0x23,0xa7,0x89,0xec,0xde,0xbb,0x96,0x51,0x80,0xbc,0xf0, // 000023d0 |J..o.#......Q...|
+0x09,0x62,0x45,0x38,0x94,0xda,0x6e,0x55,0xc8,0x51,0x9a,0x7f,0x3e,0x6c,0x4a,0x74, // 000023e0 |.bE8..nU.Q..>lJt|
+0x23,0x8a,0xb2,0xed,0x24,0x4f,0xfb,0xc1,0xcd,0x5e,0x85,0xcc,0xdd,0xcb,0xb2,0xbc, // 000023f0 |#...$O...^......|
+0x1c,0xe9,0xf7,0x24,0x1c,0x6d,0xb8,0xfd,0x7e,0x42,0xeb,0xc7,0x6e,0x9c,0x3d,0xb8, // 00002400 |...$.m..~B..n.=.|
+0xa9,0x73,0xbf,0x43,0xa2,0x32,0x09,0x99,0x39,0xcc,0xcd,0xd0,0x47,0x6c,0xc6,0xee, // 00002410 |.s.C.2..9...Gl..|
+0xd1,0x57,0x1b,0x2d,0x81,0x22,0x2f,0x7a,0xb3,0x1b,0x2f,0x16,0xf1,0x46,0x1f,0x25, // 00002420 |.W.-."/z../..F.%|
+0x79,0x2f,0x2d,0xd5,0xd4,0x51,0xb2,0x2e,0xe5,0xdc,0x66,0x5d,0x2c,0x32,0x79,0x84, // 00002430 |y/-..Q....f],2y.|
+0x1e,0x5a,0xf3,0x14,0x8b,0xac,0x80,0x94,0xa4,0x0f,0x8b,0xc4,0xed,0x4b,0xf4,0x0b, // 00002440 |.Z...........K..|
+0x9f,0x59,0x6f,0xfa,0x9d,0xf4,0x69,0x4b,0xb6,0x7c,0x0b,0xd9,0x8d,0xaa,0x33,0x35, // 00002450 |.Yo...iK.|....35|
+0x9f,0xea,0x22,0xeb,0x6c,0xa3,0xcd,0x01,0xa4,0xaa,0x1b,0x25,0x09,0x90,0x53,0x5b, // 00002460 |..".l......%..S[|
+0x91,0xac,0x91,0xb0,0x8c,0xa4,0xe1,0x61,0xca,0xc9,0x26,0xaf,0xa4,0x57,0x7f,0x96, // 00002470 |.......a..&..W..|
+0x40,0x47,0xee,0xa3,0xb2,0xfe,0xe5,0xfa,0x14,0x5f,0x42,0x07,0xdd,0xc5,0xd3,0x1a, // 00002480 |@G......._B.....|
+0x73,0x05,0x68,0xda,0x3e,0x27,0x98,0x2a,0x40,0x75,0x76,0x0b,0xa4,0xef,0xc8,0xb1, // 00002490 |s.h.>'.*@uv.....|
+0x43,0xac,0xaf,0x1f,0xe6,0x4b,0x27,0x47,0xd0,0x08,0x43,0x41,0x39,0x92,0xf7,0x89, // 000024a0 |C....K'G..CA9...|
+0x5b,0xeb,0x4e,0xe5,0x88,0xfa,0x1b,0xf9,0xa1,0x8b,0x1e,0x01,0xd9,0x54,0xb8,0xdf, // 000024b0 |[.N..........T..|
+0x86,0xa8,0xdb,0xf9,0x15,0x12,0xb2,0xb6,0xd1,0x4f,0x7d,0x06,0x9c,0x9a,0xed,0x8f, // 000024c0 |.........O}.....|
+0xa7,0xf7,0x22,0x12,0xc1,0x87,0x7a,0xfe,0x08,0xb3,0x27,0x84,0x91,0xd3,0xdc,0xb1, // 000024d0 |.."...z...'.....|
+0x5b,0x3c,0xd0,0x3a,0x8e,0x7f,0x0e,0x87,0xa1,0xae,0xf6,0xe5,0xa2,0x27,0x13,0xa5, // 000024e0 |[<.:.........'..|
+0x0d,0xb0,0x1c,0xd0,0x69,0xf0,0xe4,0x8c,0xec,0x0f,0x67,0xb7,0x7c,0x78,0xa1,0xe6, // 000024f0 |....i.....g.|x..|
+0xf9,0xa2,0x50,0xce,0xe1,0x01,0x00,0xc3,0xd0,0xd1,0x13,0x82,0xa2,0x4d,0xe8,0x94, // 00002500 |..P..........M..|
+0x85,0x55,0x17,0x8c,0xc4,0xcc,0xc3,0x8a,0xe8,0xc0,0xf0,0x64,0x50,0xbe,0xe3,0x24, // 00002510 |.U.........dP..$|
+0xf2,0x8c,0x6f,0xc6,0xe6,0x5a,0xb9,0x40,0x3d,0x2f,0x54,0xce,0x7f,0x1b,0x83,0x5c, // 00002520 |..o..Z.@=/T....\|
+0x2e,0xae,0x86,0x0a,0xee,0xde,0x25,0x0a,0x05,0x56,0x39,0x5e,0xf3,0x18,0x7f,0x83, // 00002530 |......%..V9^....|
+0xeb,0x9e,0xd9,0xf1,0x51,0x34,0x64,0xa1,0xb9,0xbf,0x96,0x8a,0xbd,0x42,0x1f,0xb4, // 00002540 |....Q4d......B..|
+0xc9,0xd9,0xb4,0xc1,0x0c,0xc5,0x35,0x59,0x0d,0x5c,0xaf,0xd2,0xff,0x29,0xee,0xd8, // 00002550 |......5Y.\...)..|
+0x6c,0xa1,0x99,0xb9,0x37,0xe5,0xae,0x0b,0x04,0xfb,0x8c,0x45,0xf4,0x3f,0xfb,0x38, // 00002560 |l...7......E.?.8|
+0x58,0x48,0x28,0x23,0x60,0xa0,0x5e,0x94,0xaf,0x7a,0xbf,0xd2,0xba,0x9f,0xa2,0xc5, // 00002570 |XH(#`.^..z......|
+0xa6,0x6b,0x2f,0xe0,0xcb,0x64,0x21,0x36,0x0e,0xcd,0x58,0x6f,0xff,0x01,0x99,0x42, // 00002580 |.k/..d!6..Xo...B|
+0x58,0x06,0xa5,0xaf,0x38,0x06,0x46,0x11,0x15,0xe7,0x60,0x01,0xe5,0x74,0x6b,0x77, // 00002590 |X...8.F...`..tkw|
+0x3c,0xd1,0x0f,0x9d,0xc7,0x40,0x8e,0xdd,0x30,0x9b,0x84,0x84,0xf1,0x42,0x1a,0x1a, // 000025a0 |<....@..0....B..|
+0x03,0xb9,0x98,0x92,0x33,0x17,0x5f,0x16,0x9f,0x4c,0x3e,0xc3,0x8b,0x19,0x60,0x09, // 000025b0 |....3._..L>...`.|
+0x3d,0x74,0x3d,0x16,0xbd,0x0c,0x70,0x01,0x79,0xe1,0x0b,0xce,0xf5,0x43,0x75,0x2d, // 000025c0 |=t=...p.y....Cu-|
+0xd0,0x73,0xc5,0xc2,0xd9,0xa7,0x5b,0x80,0xe3,0xe9,0x33,0x8a,0xb0,0xe1,0x1e,0xe3, // 000025d0 |.s....[...3.....|
+0xd9,0x8f,0xb6,0x29,0xff,0xc7,0x58,0xeb,0xfe,0x6f,0x54,0x46,0x59,0xe2,0x33,0x0e, // 000025e0 |...)..X..oTFY.3.|
+0xd1,0xef,0xe0,0xe6,0xdf,0xd4,0x25,0x16,0x8d,0x2c,0xfd,0x1f,0xb1,0xae,0x36,0x87, // 000025f0 |......%..,....6.|
+0xd5,0x2f,0x3b,0xb6,0xe2,0x27,0x8f,0xe5,0x29,0x0c,0xb3,0xd4,0xfa,0x57,0xd8,0x8d, // 00002600 |./;..'..)....W..|
+0x46,0xbe,0x65,0x19,0x6f,0xf5,0x02,0x31,0x86,0xad,0x19,0x82,0xd3,0xef,0xc6,0x28, // 00002610 |F.e.o..1.......(|
+0x79,0xda,0xe3,0x30,0xb4,0x9f,0x1e,0x4e,0x0b,0xd8,0xe1,0xe0,0x31,0x63,0x39,0x1c, // 00002620 |y..0...N....1c9.|
+0x23,0xb5,0x0a,0x1d,0xe0,0x08,0xe0,0xc8,0x41,0xf5,0xeb,0xb6,0xed,0xd7,0x5a,0x06, // 00002630 |#.......A.....Z.|
+0xf8,0x32,0xe0,0x38,0x10,0x53,0xe8,0xe0,0x43,0xca,0x7a,0x4a,0xd4,0x4a,0xca,0x18, // 00002640 |.2.8.S..C.zJ.J..|
+0x17,0x08,0x8d,0xe1,0x45,0xe4,0x0f,0x1e,0x4b,0x7c,0x67,0xaa,0x5e,0x6b,0xb6,0x9a, // 00002650 |....E...K|g.^k..|
+0x18,0x19,0x5e,0xc0,0x21,0x6b,0xc5,0xdf,0xba,0xb9,0x35,0x48,0xac,0x3f,0x93,0xec, // 00002660 |..^.!k....5H.?..|
+0x30,0xda,0xbf,0x18,0x22,0x69,0x69,0xe3,0xf4,0xc0,0xbe,0xdf,0x75,0x1f,0x21,0x23, // 00002670 |0..."ii.....u.!#|
+0x6e,0xf8,0xf8,0x27,0xb2,0x76,0x65,0x56,0x80,0x83,0xf7,0x5a,0xb0,0x58,0x53,0xf3, // 00002680 |n..'.veV...Z.XS.|
+0xb4,0x7f,0x3c,0xaf,0x1d,0xfa,0x10,0x9f,0xc6,0xb5,0xa1,0x36,0x16,0x58,0x53,0xfc, // 00002690 |..<........6.XS.|
+0x03,0x05,0x78,0x23,0x96,0x37,0x19,0x27,0x48,0x49,0xd4,0xe3,0x4e,0xa8,0x8e,0xe4, // 000026a0 |..x#.7.'HI..N...|
+0x23,0xed,0xf4,0xb4,0xf5,0x6d,0x7c,0xaf,0x6a,0xb7,0x9e,0x61,0x96,0x9f,0x7b,0x66, // 000026b0 |#....m|.j..a..{f|
+0x5d,0xb2,0xf4,0x3f,0x24,0x53,0xd2,0xea,0x6f,0x68,0x99,0xe3,0x1d,0xbd,0x95,0xc2, // 000026c0 |]..?$S..oh......|
+0x1c,0x7a,0xdf,0x8b,0xb7,0x5c,0x4a,0x03,0x61,0x81,0xe2,0xdd,0xaa,0x18,0xb5,0x34, // 000026d0 |.z...\J.a......4|
+0xf3,0xc7,0x20,0x78,0x43,0xef,0xbb,0x85,0x39,0xc9,0xe2,0x65,0xb1,0xcf,0xc4,0x0d, // 000026e0 |.. xC...9..e....|
+0xc6,0x02,0x51,0x2b,0x3b,0xce,0x87,0x0c,0x6c,0xef,0x23,0x41,0x31,0x9b,0x41,0x16, // 000026f0 |..Q+;...l.#A1.A.|
+0x70,0x29,0xc5,0xd2,0x64,0x5e,0x11,0xce,0xb4,0x50,0x77,0x45,0xd4,0xb8,0xaf,0x54, // 00002700 |p)..d^...PwE...T|
+0x8a,0xee,0xf5,0x84,0x8b,0xd2,0xe2,0xb1,0x53,0x2d,0xdb,0xd7,0x64,0x66,0x84,0xf1, // 00002710 |........S-..df..|
+0xef,0xce,0x74,0x0b,0xee,0x0f,0x65,0x5c,0xe8,0x50,0x50,0x8c,0x22,0xdb,0xd5,0x9f, // 00002720 |..t...e\.PP."...|
+0x1b,0x3f,0x30,0xb3,0xf1,0x2d,0xd5,0x2c,0xa5,0xd8,0x9b,0x8e,0xa5,0xe4,0x40,0x9b, // 00002730 |.?0..-.,......@.|
+0x07,0x73,0x9e,0x9e,0xaa,0x51,0x27,0xc6,0x6f,0x1a,0xd8,0xa0,0x28,0xc3,0x3f,0xc8, // 00002740 |.s...Q'.o...(.?.|
+0x4f,0x31,0x15,0x7d,0x49,0xf7,0xbb,0x80,0xca,0x14,0x53,0x59,0x9d,0x57,0xc2,0x1b, // 00002750 |O1.}I.....SY.W..|
+0x66,0xc2,0xed,0xa8,0x16,0xcc,0x13,0xb8,0x10,0xb6,0x21,0x59,0x5d,0x15,0x8c,0x27, // 00002760 |f.........!Y]..'|
+0x26,0x40,0x38,0xfd,0x26,0xd0,0x82,0xfd,0x68,0xc3,0x6a,0xdd,0xeb,0x6e,0x1b,0x99, // 00002770 |&@8.&...h.j..n..|
+0x81,0xa2,0x68,0x5a,0xb6,0x90,0xdc,0x88,0xa0,0x92,0xd3,0x89,0xdf,0xbe,0xfc,0xc0, // 00002780 |..hZ............|
+0x2b,0x52,0x97,0xd0,0x62,0x66,0x0d,0x0f,0x59,0x5e,0x23,0xe5,0x77,0x2c,0xe4,0x55, // 00002790 |+R..bf..Y^#.w,.U|
+0xd8,0x00,0xd9,0x6b,0x96,0xe0,0x81,0xfb,0xf9,0xd5,0xc6,0x38,0xae,0xc7,0x34,0xec, // 000027a0 |...k.......8..4.|
+0xea,0x3b,0xeb,0x8b,0x05,0x7e,0x02,0xb0,0x95,0x9f,0x04,0x24,0x82,0xd1,0x29,0x16, // 000027b0 |.;...~.....$..).|
+0x1f,0x68,0x81,0xcc,0x6a,0xd2,0x8d,0x08,0x73,0x60,0xf3,0xe1,0xcc,0xe2,0x51,0xdc, // 000027c0 |.h..j...s`....Q.|
+0xf9,0xac,0x31,0xb0,0x18,0xa5,0xc4,0x73,0x04,0x29,0x8f,0x49,0xea,0x09,0x86,0xad, // 000027d0 |..1....s.).I....|
+0x79,0xa4,0xcf,0xe9,0x5b,0x98,0x14,0xa3,0xe8,0xbb,0xd6,0x31,0xde,0x35,0x7d,0x53, // 000027e0 |y...[......1.5}S|
+0xf9,0x74,0x94,0x4b,0xa4,0xa6,0x6e,0x38,0xe4,0xa6,0x42,0x78,0x74,0xb6,0x05,0x98, // 000027f0 |.t.K..n8..Bxt...|
+0x68,0x0b,0x23,0x19,0x3b,0xf4,0xe2,0xe6,0x97,0xf4,0xda,0x9a,0x05,0x91,0xcb,0x94, // 00002800 |h.#.;...........|
+0x76,0x9e,0xbd,0xa0,0x0d,0xc0,0xdc,0xfe,0xac,0xab,0xe9,0x54,0xb9,0xfc,0xbf,0xf2, // 00002810 |v..........T....|
+0x93,0x0b,0xb6,0x2d,0x31,0x9c,0xf4,0x3b,0xe7,0x55,0xa5,0x1d,0x86,0x37,0x60,0xa7, // 00002820 |...-1..;.U...7`.|
+0x2e,0x2f,0xb6,0xff,0x37,0xdf,0x5e,0xf4,0xf5,0x72,0x6c,0x70,0xf9,0x9f,0xd8,0xee, // 00002830 |./..7.^..rlp....|
+0x16,0x2a,0xf1,0xc4,0xa1,0x8b,0xa5,0xfd,0xef,0x3b,0x3b,0x63,0x54,0x51,0x1e,0x4d, // 00002840 |.*.......;;cTQ.M|
+0x22,0xc9,0x20,0xcd,0x18,0x38,0xc4,0x34,0x30,0xb0,0x25,0x3c,0xb4,0xa8,0x0c,0xe1, // 00002850 |". ..8.40.%<....|
+0xf9,0x35,0x72,0x78,0xa9,0x2d,0xd2,0x95,0x1a,0xd2,0xd1,0xbc,0x0b,0x44,0xa8,0x6c, // 00002860 |.5rx.-.......D.l|
+0x16,0x16,0x74,0x4b,0xaa,0x9d,0x55,0x42,0xc6,0x31,0xc9,0x98,0x8d,0x6f,0x1e,0xb3, // 00002870 |..tK..UB.1...o..|
+0x42,0xa1,0x5e,0x52,0x8b,0xb3,0xc2,0x77,0xdf,0xe6,0xc2,0xa2,0x4d,0xc8,0x48,0x7a, // 00002880 |B.^R...w....M.Hz|
+0xd0,0xcb,0x39,0xda,0xf0,0xc1,0xba,0x51,0x35,0xee,0x17,0xd7,0x51,0xdc,0x20,0xc5, // 00002890 |..9....Q5...Q. .|
+0x79,0x03,0x44,0xf4,0x07,0x26,0xf8,0xb4,0xd0,0xcc,0x9b,0xe8,0xdc,0xad,0xf7,0xe4, // 000028a0 |y.D..&..........|
+0x90,0xc6,0x6d,0x5d,0x45,0xd3,0xae,0xe7,0x5c,0x12,0x33,0x7d,0x75,0xb0,0x76,0x97, // 000028b0 |..m]E...\.3}u.v.|
+0xa6,0x6a,0xd0,0xa9,0x84,0xf0,0x6c,0x9a,0x8a,0x81,0xb5,0x35,0x9a,0xf7,0x4a,0xf9, // 000028c0 |.j....l....5..J.|
+0xf4,0x6f,0xe7,0xad,0x36,0x16,0x59,0x79,0x3c,0x0a,0x6e,0x48,0x51,0x08,0x04,0x34, // 000028d0 |.o..6.Yy<.nHQ..4|
+0x4e,0x2d,0x91,0xfe,0x95,0x2f,0x1e,0x55,0x33,0x3d,0x28,0x73,0x19,0x1e,0x01,0xee, // 000028e0 |N-.../.U3=(s....|
+0xbe,0x88,0x18,0x5a,0xfc,0xea,0x6e,0x9e,0xbd,0x66,0x9a,0xbd,0x6b,0x93,0x0f,0xf7, // 000028f0 |...Z..n..f..k...|
+0x3c,0x40,0xbb,0x47,0xb1,0x19,0x28,0x29,0x85,0x3e,0x35,0xa3,0xed,0x5a,0xed,0xd9, // 00002900 |<@.G..().>5..Z..|
+0x2b,0x99,0x1b,0x0b,0x65,0xfb,0x4f,0xd6,0xe0,0xab,0xc0,0x01,0xc7,0xa9,0x90,0x59, // 00002910 |+...e.O........Y|
+0x56,0x0c,0x22,0x3f,0x81,0x15,0x6b,0x76,0x17,0x5b,0x2c,0x0e,0x3d,0x31,0x5d,0xf7, // 00002920 |V."?..kv.[,.=1].|
+0xc2,0x32,0x0e,0x90,0x4e,0xc8,0x7f,0x97,0xef,0xfc,0xd5,0xca,0x0f,0x2f,0xd9,0x79, // 00002930 |.2..N......../.y|
+0xa5,0x02,0x2f,0xba,0x1a,0x13,0x6f,0xc0,0xd0,0x94,0x43,0x55,0x5a,0x6a,0x0f,0xe7, // 00002940 |../...o...CUZj..|
+0x57,0x52,0xfa,0xd6,0x33,0xc4,0xa8,0x8d,0x37,0xad,0xca,0x38,0x9e,0x74,0x98,0x48, // 00002950 |WR..3...7..8.t.H|
+0x7f,0xbf,0x0c,0x4c,0xe9,0xf7,0xfd,0xcf,0x49,0xa6,0xed,0x7a,0x2a,0x21,0x63,0x1b, // 00002960 |...L....I..z*!c.|
+0x35,0x8b,0x11,0xd3,0x23,0xcc,0x6d,0x4a,0x45,0x39,0xf4,0xd6,0x72,0x45,0x0a,0xa4, // 00002970 |5...#.mJE9..rE..|
+0xe6,0xc0,0xa7,0x9e,0xf9,0xae,0xce,0xde,0xd5,0xf6,0x9d,0xcc,0x08,0xb4,0x40,0xd5, // 00002980 |..............@.|
+0x9b,0xa5,0x8b,0x4f,0x2f,0x39,0x0c,0xbb,0xa9,0x66,0x18,0x94,0xaf,0xa7,0x20,0x8d, // 00002990 |...O/9...f.... .|
+0xa3,0x9d,0xa8,0x92,0x0b,0x4a,0x28,0xdf,0xf9,0x2b,0x51,0x8b,0xdc,0xcc,0xf2,0x23, // 000029a0 |.....J(..+Q....#|
+0xc3,0xfa,0x49,0x38,0x7a,0xd4,0xf9,0xd2,0xf9,0x70,0xbc,0x68,0x41,0x92,0x65,0xe5, // 000029b0 |..I8z....p.hA.e.|
+0x18,0x63,0x31,0x9e,0xcd,0x4c,0x21,0x0c,0x74,0x68,0xb0,0x0d,0x93,0x2d,0x5d,0xee, // 000029c0 |.c1..L!.th...-].|
+0x34,0x5c,0xd9,0x63,0x0c,0x19,0x31,0x0a,0xbc,0x09,0x12,0xa4,0x4e,0xc2,0x5e,0x26, // 000029d0 |4\.c..1.....N.^&|
+0x79,0xc7,0x82,0xef,0x04,0x08,0x99,0xcf,0xf0,0x24,0xe9,0x02,0x83,0xa0,0x26,0x36, // 000029e0 |y........$....&6|
+0x33,0x67,0x56,0x2c,0xb8,0x73,0x0a,0x5e,0x6c,0x44,0xc8,0x02,0x58,0x4b,0x70,0xb4, // 000029f0 |3gV,.s.^lD..XKp.|
+0xc4,0x2e,0xc6,0x67,0x76,0xc9,0x2d,0xf4,0xde,0xcc,0x30,0x12,0x1f,0x4c,0xa5,0xd1, // 00002a00 |...gv.-...0..L..|
+0x86,0x38,0xda,0xdb,0x1d,0xfe,0x50,0x9c,0x76,0x96,0xcd,0x7b,0x8e,0x0e,0x5a,0x32, // 00002a10 |.8....P.v..{..Z2|
+0x9c,0x3f,0x99,0xfc,0x02,0x0c,0xe2,0x6e,0x3c,0x84,0x83,0x07,0xb4,0x48,0x38,0x03, // 00002a20 |.?.....n<....H8.|
+0xf2,0x5f,0xce,0x84,0x29,0xd4,0x9b,0xe9,0xbf,0x5d,0x10,0x8c,0xa3,0xfb,0x7d,0x3f, // 00002a30 |._..)....]....}?|
+0x3f,0x8d,0xdf,0x6f,0x77,0x03,0x6b,0x33,0x9d,0xd4,0x4f,0xeb,0xaa,0x80,0xe8,0xea, // 00002a40 |?..ow.k3..O.....|
+0x9f,0x36,0x50,0x96,0x53,0xd0,0x8b,0xcb,0x8e,0x42,0x8b,0xe4,0x81,0xff,0xba,0x50, // 00002a50 |.6P.S....B.....P|
+0x81,0xe9,0x38,0x81,0x03,0xe0,0x58,0x7e,0x4b,0x5d,0x08,0xd1,0x6b,0x91,0x21,0x4c, // 00002a60 |..8...X~K]..k.!L|
+0x3e,0xed,0x62,0x67,0x6f,0x55,0xad,0x0e,0x89,0x71,0xf0,0x91,0x53,0x04,0x51,0xe0, // 00002a70 |>.bgoU...q..S.Q.|
+0xea,0x09,0xa2,0xc2,0x61,0x16,0xba,0x7b,0xa9,0xa9,0xfa,0x83,0x99,0xe3,0xd0,0xc3, // 00002a80 |....a..{........|
+0x7a,0x6a,0xc0,0x59,0xfd,0x4a,0x9f,0x0d,0xe3,0x2e,0x77,0xc8,0xcf,0x5d,0x90,0x94, // 00002a90 |zj.Y.J....w..]..|
+0xa5,0xbb,0xbd,0xec,0x24,0xac,0x4c,0xec,0x02,0x0e,0xfe,0xb4,0x72,0x30,0x2d,0x67, // 00002aa0 |....$.L.....r0-g|
+0xdf,0x24,0xec,0x18,0xdb,0x83,0x99,0xb1,0xc4,0x82,0x3e,0x67,0x45,0xfb,0xab,0xfd, // 00002ab0 |.$........>gE...|
+0xc7,0x30,0xaa,0xe4,0xa4,0xee,0xd3,0x5e,0x60,0x84,0xaf,0xe6,0x4c,0x93,0x3e,0xf6, // 00002ac0 |.0.....^`...L.>.|
+0xb1,0x16,0x3b,0x1e,0x23,0x66,0xc3,0x34,0x2e,0x54,0x0b,0xcb,0x6c,0xb0,0xed,0x70, // 00002ad0 |..;.#f.4.T..l..p|
+0x87,0x6e,0x9b,0xb8,0xf4,0xb2,0x6e,0x90,0xb3,0x39,0x6f,0x1d,0x8f,0xf9,0x34,0x6f, // 00002ae0 |.n....n..9o...4o|
+0x21,0xd8,0x01,0x4f,0x82,0x64,0xa2,0x11,0xd0,0x49,0xfd,0xa6,0x4d,0x3f,0xf3,0x30, // 00002af0 |!..O.d...I..M?.0|
+0x57,0xfe,0xff,0xc4,0xf8,0x33,0x6a,0x70,0x8d,0xde,0x58,0x7d,0xfe,0x5f,0x0d,0x02, // 00002b00 |W....3jp..X}._..|
+0xa9,0xe8,0xa5,0xbc,0x81,0x6a,0x2d,0x02,0x34,0x36,0x7c,0x55,0xa2,0xc4,0x37,0xa3, // 00002b10 |.....j-.46|U..7.|
+0xea,0x2f,0x7d,0x32,0x28,0xc0,0x58,0xba,0x6b,0x87,0x2e,0xff,0x6f,0x9c,0xf0,0x8b, // 00002b20 |./}2(.X.k...o...|
+0xec,0xe2,0x43,0x3a,0x4d,0xbe,0xb5,0xac,0x54,0x80,0x7e,0x4b,0x3a,0xf5,0xaa,0xa6, // 00002b30 |..C:M...T.~K:...|
+0xe1,0xa4,0xd2,0x98,0xb0,0xd3,0xb7,0x13,0xae,0xda,0x33,0x91,0xc0,0x0a,0x20,0xa3, // 00002b40 |..........3... .|
+0x8e,0xf5,0x85,0x2d,0x27,0x85,0x8d,0x9a,0xfd,0x63,0x5b,0xbe,0x2b,0x48,0x5b,0x09, // 00002b50 |...-'....c[.+H[.|
+0xb8,0x24,0xfb,0x30,0xca,0x73,0xca,0x58,0x20,0x7c,0x07,0x29,0x80,0x9e,0xb8,0xed, // 00002b60 |.$.0.s.X |.)....|
+0xd4,0x3f,0xee,0x8a,0x07,0x2b,0xa0,0x54,0x6f,0x44,0x14,0x00,0xe6,0xec,0xb0,0x32, // 00002b70 |.?...+.ToD.....2|
+0x68,0x6a,0x31,0xd2,0xff,0x91,0xe4,0x48,0x24,0x21,0x53,0x9b,0x99,0x69,0x2b,0x13, // 00002b80 |hj1....H$!S..i+.|
+0xf7,0xfc,0xe6,0x39,0x62,0x43,0xd0,0xe0,0x97,0x70,0xb1,0x85,0xb1,0xa5,0x8b,0x9f, // 00002b90 |...9bC...p......|
+0x70,0x2a,0x46,0xa7,0xa7,0xc2,0x10,0x1f,0x3e,0x4a,0xbe,0x8f,0xf5,0x4f,0x98,0xd3, // 00002ba0 |p*F.....>J...O..|
+0x44,0x2c,0x7f,0xcc,0x53,0xf5,0x95,0x7f,0x39,0x0f,0xaf,0x3f,0x11,0x49,0x37,0x6a, // 00002bb0 |D,..S...9..?.I7j|
+0x52,0xff,0x96,0x7d,0x9a,0xfc,0xf8,0xa4,0x45,0xd9,0x9f,0xec,0x1f,0x40,0xf2,0xa4, // 00002bc0 |R..}....E....@..|
+0x80,0x40,0x51,0xca,0x27,0x65,0xfb,0x30,0x9d,0xe5,0xa9,0x06,0x85,0x9a,0x0f,0xf8, // 00002bd0 |.@Q.'e.0........|
+0xf5,0xc0,0xcf,0x43,0xff,0x42,0xe2,0x0f,0x6f,0x5a,0x27,0x52,0x2e,0x80,0x73,0xbe, // 00002be0 |...C.B..oZ'R..s.|
+0x81,0x6b,0xc0,0x0d,0xcc,0xba,0x86,0x4d,0x1d,0x4d,0x37,0xb2,0x5e,0x89,0xe9,0x38, // 00002bf0 |.k.....M.M7.^..8|
+0x31,0xf1,0x28,0xd8,0xfe,0xd0,0xcc,0x23,0xff,0x33,0xeb,0xef,0xf3,0x6b,0x44,0x52, // 00002c00 |1.(....#.3...kDR|
+0x0d,0xe3,0x73,0x15,0x53,0xfa,0x5a,0x50,0x7c,0x8a,0xeb,0x7d,0x19,0x98,0x83,0x4e, // 00002c10 |..s.S.ZP|..}...N|
+0x87,0xb5,0x30,0x58,0x63,0x41,0xd4,0xce,0x30,0x6a,0x1a,0xac,0x77,0x69,0xd7,0x2d, // 00002c20 |..0XcA..0j..wi.-|
+0x94,0x65,0x91,0x9c,0x65,0x8c,0x44,0x7c,0xe4,0xc6,0x37,0x7e,0x09,0xd2,0x22,0x56, // 00002c30 |.e..e.D|..7~.."V|
+0x7d,0x2d,0x3c,0xc4,0x91,0xbb,0xc7,0x77,0x7a,0x59,0x3d,0x57,0x0e,0x1b,0x20,0x8e, // 00002c40 |}-<....wzY=W.. .|
+0xc5,0x3f,0xcf,0xbb,0xf3,0x96,0x9c,0x4c,0xb7,0x6c,0x88,0x23,0x33,0xfd,0x60,0x1a, // 00002c50 |.?.....L.l.#3.`.|
+0x64,0xba,0x7f,0x71,0x69,0x02,0xa8,0x82,0xa2,0x4f,0xc4,0x72,0x14,0x79,0x0a,0x5a, // 00002c60 |d..qi....O.r.y.Z|
+0xcf,0xb3,0x4d,0x5a,0xc9,0xdd,0x52,0xfb,0x10,0xef,0x5d,0x54,0x8f,0x86,0x9d,0xa4, // 00002c70 |..MZ..R...]T....|
+0xd2,0x67,0x55,0xa6,0xa6,0x1c,0xee,0x8d,0x98,0x21,0x2f,0xc0,0x1b,0x91,0xcc,0xe0, // 00002c80 |.gU......!/.....|
+0x73,0x63,0x38,0xab,0xaf,0x47,0x80,0xd2,0x9b,0xc8,0xf0,0x72,0xe9,0x80,0xf3,0x08, // 00002c90 |sc8..G.....r....|
+0x91,0xb1,0x3d,0xc7,0xe5,0xdc,0x13,0x08,0x7d,0x32,0x10,0xf1,0xa6,0xa2,0x8a,0xe6, // 00002ca0 |..=.....}2......|
+0x60,0xca,0x78,0x73,0x3a,0x18,0xab,0x59,0x06,0xbd,0xf5,0xbc,0x5d,0x82,0xa9,0x86, // 00002cb0 |`.xs:..Y....]...|
+0x25,0xda,0x17,0x2d,0xc7,0x1b,0xa3,0x85,0x88,0x12,0x55,0x13,0x0f,0x09,0x3f,0x61, // 00002cc0 |%..-......U...?a|
+0x46,0x29,0xc9,0xfc,0x60,0xd6,0xd3,0x06,0x91,0x63,0x90,0x81,0x76,0xec,0x9c,0x78, // 00002cd0 |F)..`....c..v..x|
+0x8b,0x74,0xb3,0x0d,0x6a,0x3e,0xee,0x03,0xe0,0x98,0x65,0xca,0x23,0xa0,0x3d,0x53, // 00002ce0 |.t..j>....e.#.=S|
+0x99,0x8d,0x0f,0x8c,0x10,0x14,0xa4,0x34,0x1b,0xd6,0xf8,0x3e,0xf7,0x1d,0xa6,0x2a, // 00002cf0 |.......4...>...*|
+0x27,0x1e,0xec,0x2b,0x1c,0x26,0x1d,0x80,0x2c,0x48,0xa9,0xd0,0x09,0x71,0xde,0x43, // 00002d00 |'..+.&..,H...q.C|
+0x40,0xb4,0x8d,0x45,0x4e,0xb1,0x8c,0x6b,0xf5,0xfa,0x21,0x2a,0x8c,0xd6,0xd5,0x1f, // 00002d10 |@..EN..k..!*....|
+0xd1,0xb3,0x70,0xd5,0x0c,0x08,0xf0,0x3a,0xea,0x06,0xc0,0x68,0x44,0x21,0x19,0x84, // 00002d20 |..p....:...hD!..|
+0x78,0xf7,0xd8,0xde,0x8f,0x30,0x0c,0x5a,0x28,0x3f,0x48,0xd6,0x8e,0x29,0x70,0xc6, // 00002d30 |x....0.Z(?H..)p.|
+0xcf,0x02,0x7b,0x9d,0x5d,0x05,0x1d,0xae,0xe6,0xed,0x0c,0x67,0x7c,0x09,0x7a,0x80, // 00002d40 |..{.]......g|.z.|
+0xa1,0x5a,0xb6,0x50,0x16,0x80,0xc7,0x4c,0xa4,0xcd,0xa4,0x1a,0x5d,0x1d,0xb5,0xf4, // 00002d50 |.Z.P...L....]...|
+0x05,0x80,0x2b,0x13,0x76,0x13,0x31,0xf7,0x71,0x50,0xbb,0xc2,0x92,0x81,0x18,0x09, // 00002d60 |..+.v.1.qP......|
+0x20,0x74,0xf3,0x1f,0xbd,0x11,0x1f,0xb0,0xe2,0xfe,0xd2,0x7b,0x25,0x31,0x2d,0x3e, // 00002d70 | t.........{%1->|
+0x2f,0x98,0x4d,0xd0,0x39,0xde,0xdf,0x12,0xae,0x01,0x0d,0xf6,0x2d,0xf7,0xd4,0x8f, // 00002d80 |/.M.9.......-...|
+0xd8,0x57,0x01,0x25,0x57,0xd2,0x17,0xda,0x2a,0xf2,0x4d,0x76,0x95,0x95,0xf9,0x91, // 00002d90 |.W.%W...*.Mv....|
+0x39,0xfd,0x1f,0x32,0x46,0xff,0x3f,0x43,0xe0,0x6d,0x62,0x54,0x6c,0x73,0xf3,0xd5, // 00002da0 |9..2F.?C.mbTls..|
+0x89,0x76,0xb6,0x38,0x25,0x6a,0x3c,0x8d,0xa2,0xe0,0x50,0x59,0x44,0xe9,0x19,0x2b, // 00002db0 |.v.8%j<...PYD..+|
+0xc3,0x44,0x89,0x13,0x39,0xf8,0x19,0xd6,0xe4,0xd3,0x8e,0x44,0xdf,0x0b,0x71,0xf2, // 00002dc0 |.D..9......D..q.|
+0x8a,0xe4,0xa3,0xa3,0xde,0xaf,0xb2,0x9e,0xa7,0x25,0xeb,0x45,0xeb,0xea,0xd5,0x6b, // 00002dd0 |.........%.E...k|
+0x45,0xe1,0xac,0x98,0xae,0x91,0x01,0x23,0xe4,0x60,0x9f,0x18,0x91,0x41,0x40,0x46, // 00002de0 |E......#.`...A@F|
+0xa1,0xf1,0x23,0x3e,0x73,0xe6,0x1a,0xfd,0x8b,0x0e,0xfa,0xa8,0x55,0x8b,0x98,0x9b, // 00002df0 |..#>s.......U...|
+0x8a,0x9e,0xe4,0x36,0x39,0xe4,0xed,0xe2,0x03,0xb0,0x2a,0xa2,0xb1,0x7d,0x94,0xdc, // 00002e00 |...69.....*..}..|
+0x40,0x50,0xff,0x38,0xb2,0x87,0xfa,0xe0,0x9c,0xbc,0xd8,0x39,0xd2,0x1e,0xf6,0xfc, // 00002e10 |@P.8.......9....|
+0xb2,0x54,0x80,0xb3,0x14,0x75,0x0e,0x74,0xef,0xfd,0x62,0x90,0xf8,0xf3,0xc4,0x15, // 00002e20 |.T...u.t..b.....|
+0xd4,0xb5,0xcb,0xd9,0xf7,0x96,0x83,0x9e,0x69,0x59,0x59,0xc2,0xb2,0xc3,0xb2,0x7b, // 00002e30 |........iYY....{|
+0x0e,0x74,0x0d,0x08,0x8f,0x22,0x7f,0xfe,0x88,0x79,0xd4,0xc3,0x02,0x4b,0x86,0x3f, // 00002e40 |.t..."...y...K.?|
+0x6c,0xeb,0x17,0xd1,0x21,0x5c,0xe8,0x67,0x2e,0x8d,0x18,0x63,0x6d,0x19,0x43,0x3b, // 00002e50 |l...!\.g...cm.C;|
+0x39,0x76,0xc0,0x35,0x81,0x82,0x33,0x39,0xa2,0x0f,0xfe,0x18,0xae,0xed,0xd0,0xb5, // 00002e60 |9v.5..39........|
+0x37,0x40,0x15,0x0c,0x19,0xa8,0x66,0x08,0x7d,0x46,0x77,0x59,0xa8,0x71,0x9a,0xf2, // 00002e70 |7@....f.}FwY.q..|
+0x28,0x9d,0xf7,0xf6,0x52,0x0a,0x6d,0x7f,0xf4,0x79,0x00,0x64,0x68,0xd7,0xb9,0xcb, // 00002e80 |(...R.m..y.dh...|
+0xb8,0x00,0xb7,0x00,0x45,0xc6,0xd6,0x5a,0x58,0xee,0x27,0x9f,0x4e,0x50,0xb8,0xf7, // 00002e90 |....E..ZX.'.NP..|
+0x38,0x63,0x88,0xb8,0xb1,0x0b,0x02,0xa1,0x69,0x38,0x41,0x0a,0xa6,0x56,0x2d,0x49, // 00002ea0 |8c......i8A..V-I|
+0xc7,0x83,0xa6,0x7b,0x06,0x10,0xf7,0x1f,0xc8,0xc5,0x91,0x3d,0x3d,0xe3,0x63,0xb1, // 00002eb0 |...{.......==.c.|
+0x17,0xfc,0xf9,0x4c,0x7f,0x0e,0x1a,0x84,0x23,0xdb,0x30,0x37,0xd3,0x57,0x33,0x04, // 00002ec0 |...L....#.07.W3.|
+0xa8,0xbb,0xf8,0x2b,0xb7,0xc0,0x8f,0x3f,0x4e,0x3e,0xf8,0x0f,0xeb,0xe9,0x8a,0x50, // 00002ed0 |...+...?N>.....P|
+0x23,0xa9,0x2a,0x71,0xc0,0x6e,0xaa,0x25,0x4e,0xda,0xdd,0x08,0x65,0xde,0x9f,0x89, // 00002ee0 |#.*q.n.%N...e...|
+0xc8,0x37,0x07,0x5e,0xe9,0x28,0x4a,0xf4,0x69,0x71,0x37,0x78,0x98,0x00,0xf9,0xb7, // 00002ef0 |.7.^.(J.iq7x....|
+0x73,0x8a,0x08,0xb1,0x62,0xac,0x00,0xaa,0xa8,0xb9,0xe0,0xab,0x2c,0x4a,0x3a,0xf4, // 00002f00 |s...b.......,J:.|
+0x4f,0x68,0x21,0x9b,0xb8,0xdb,0x76,0x51,0xa7,0xa7,0xc6,0xee,0xcf,0xc9,0xba,0x99, // 00002f10 |Oh!...vQ........|
+0xc9,0xf8,0x7d,0x16,0x90,0x10,0x1c,0x3f,0xa6,0x30,0xe5,0xbf,0xf1,0xf4,0x05,0xa3, // 00002f20 |..}....?.0......|
+0x54,0x71,0x3a,0x94,0x12,0x51,0xed,0xc6,0x07,0x2e,0x8b,0xcd,0xfd,0x4c,0xd6,0x2e, // 00002f30 |Tq:..Q.......L..|
+0x8b,0xca,0x1d,0xc1,0x36,0x6a,0x41,0x17,0xd1,0x8b,0xf7,0x68,0x34,0x29,0xfa,0x5a, // 00002f40 |....6jA....h4).Z|
+0xd1,0x80,0x26,0x55,0x7d,0x4d,0xeb,0x10,0x19,0x82,0x16,0x3e,0x38,0x2a,0x95,0x9b, // 00002f50 |..&U}M.....>8*..|
+0x38,0x69,0xc6,0xf0,0x81,0xc2,0x0a,0x5b,0xc1,0xba,0x30,0x77,0xc5,0x90,0x4c,0x77, // 00002f60 |8i.....[..0w..Lw|
+0x53,0xb5,0xc3,0x61,0x35,0xe4,0x7d,0x5e,0x49,0x33,0xec,0x6d,0xc4,0x3d,0x40,0x67, // 00002f70 |S..a5.}^I3.m.=@g|
+0x60,0x42,0x54,0xeb,0xfa,0x28,0x37,0xdc,0x54,0xe9,0x37,0x85,0x2f,0xfb,0x3e,0xbf, // 00002f80 |`BT..(7.T.7./.>.|
+0x0e,0xe1,0x64,0x78,0x33,0xa3,0xe9,0x17,0x0d,0x67,0xf5,0xd0,0xa9,0x84,0x0e,0xf4, // 00002f90 |..dx3....g......|
+0x45,0x59,0x5d,0xec,0x49,0x8f,0xf3,0xa1,0x61,0x4b,0x3e,0x1f,0x5f,0x61,0x7c,0x56, // 00002fa0 |EY].I...aK>._a|V|
+0x24,0xdc,0x77,0xa6,0xb1,0x23,0x7f,0x84,0x96,0x29,0x93,0x9a,0xe9,0x4f,0x79,0x3d, // 00002fb0 |$.w..#...)...Oy=|
+0x17,0xd1,0xa9,0x61,0x0d,0xee,0x88,0x28,0x82,0xbf,0xfa,0x90,0x4d,0xa2,0x28,0xf6, // 00002fc0 |...a...(....M.(.|
+0x3b,0x08,0x46,0xfd,0x2a,0x55,0x47,0x75,0x02,0x32,0x5e,0xbd,0x4a,0x6e,0x7d,0x10, // 00002fd0 |;.F.*UGu.2^.Jn}.|
+0x4a,0xf8,0x4b,0xa2,0x23,0x0b,0x40,0xbc,0x33,0x7b,0x78,0xd8,0x9d,0xaa,0x76,0xb1, // 00002fe0 |J.K.#.@.3{x...v.|
+0x2c,0xf2,0xb2,0x7d,0xe2,0x9d,0xed,0xef,0x6d,0x88,0x50,0x70,0xb0,0xbb,0x18,0xe3, // 00002ff0 |,..}....m.Pp....|
+0x1b,0xbf,0x41,0x0d,0xe4,0x03,0x1d,0xcc,0xf1,0x5c,0xb5,0x56,0x2e,0xd8,0xe4,0xc9, // 00003000 |..A......\.V....|
+0x6e,0x77,0xb4,0xb6,0xd8,0xd9,0xe6,0x0f,0x4c,0xbd,0xfb,0xdc,0xa3,0xf2,0x05,0x81, // 00003010 |nw......L.......|
+0x99,0x01,0x9e,0x51,0x5e,0x65,0x24,0x0c,0xa5,0xd0,0x3b,0xb4,0x1b,0x8a,0x3c,0xa0, // 00003020 |...Q^e$...;...<.|
+0x09,0xe7,0x56,0x29,0x15,0xa2,0x06,0x5f,0x3e,0x09,0x58,0xfc,0xaa,0xdc,0x23,0xae, // 00003030 |..V)..._>.X...#.|
+0x4a,0xf8,0x45,0x20,0xe7,0x26,0xac,0x22,0xb8,0xe2,0xec,0x26,0xe3,0xdd,0x70,0x74, // 00003040 |J.E .&."...&..pt|
+0xae,0xb4,0x4b,0x9f,0x4f,0x82,0x7e,0x81,0x4d,0x10,0xfd,0xa4,0xc1,0x9b,0x63,0x99, // 00003050 |..K.O.~.M.....c.|
+0x23,0xaa,0x33,0x92,0xd3,0xb5,0x3c,0xbe,0x5c,0x86,0xaf,0xbe,0x36,0xf6,0xa9,0xa7, // 00003060 |#.3...<.\...6...|
+0x72,0x40,0x1f,0x68,0x99,0x17,0x86,0xbe,0xa8,0xa4,0x32,0x86,0x15,0x4e,0x87,0xd7, // 00003070 |r@.h......2..N..|
+0x74,0x35,0x67,0x32,0xac,0xc8,0x71,0x1a,0x48,0x8d,0xdf,0xee,0xc3,0xf1,0x5d,0x39, // 00003080 |t5g2..q.H.....]9|
+0xeb,0x83,0x1f,0xc5,0x7a,0x41,0xc9,0x18,0x26,0xc0,0x05,0x14,0x2f,0xc0,0x31,0x6e, // 00003090 |....zA..&.../.1n|
+0x85,0x4d,0xdf,0x1b,0x6b,0xc6,0xb8,0xae,0xf1,0xa0,0x94,0xcd,0x3b,0xb0,0xe2,0x08, // 000030a0 |.M..k.......;...|
+0x2d,0x55,0xe8,0x22,0x3f,0x8b,0xdf,0x7f,0x7a,0x6c,0xdd,0x20,0x42,0xde,0xef,0xd6, // 000030b0 |-U."?...zl. B...|
+0x95,0xc0,0xd0,0xf7,0x80,0x7a,0xa6,0x97,0x6e,0x4f,0xb4,0x56,0x35,0x77,0xe0,0xbc, // 000030c0 |.....z..nO.V5w..|
+0x35,0xad,0x3d,0xa4,0xa9,0x7c,0x04,0x6e,0x2e,0xbe,0x16,0x99,0xf2,0x6b,0xed,0x46, // 000030d0 |5.=..|.n.....k.F|
+0xa7,0xfd,0xbf,0xd5,0xcc,0xcd,0x2b,0x0c,0x60,0xc3,0x21,0xac,0xb0,0x5b,0xd5,0x90, // 000030e0 |......+.`.!..[..|
+0x24,0x16,0x10,0x0a,0x23,0xe6,0x6b,0x72,0x1f,0xb7,0x7d,0x90,0x69,0x62,0x95,0x95, // 000030f0 |$...#.kr..}.ib..|
+0x1e,0x41,0xde,0xc0,0x85,0x7c,0xfd,0x9f,0x58,0x12,0xf4,0xfa,0xfb,0x58,0x48,0x30, // 00003100 |.A...|..X....XH0|
+0x97,0xcc,0x6c,0x99,0x99,0x95,0xcd,0x9c,0x4e,0x65,0x2e,0xd7,0xe9,0x6e,0x33,0x2c, // 00003110 |..l.....Ne...n3,|
+0x08,0x56,0x89,0xb6,0x44,0x2f,0xf7,0x70,0x38,0x9f,0x42,0x82,0xf3,0x36,0xb6,0x9d, // 00003120 |.V..D/.p8.B..6..|
+0x8b,0x2a,0x02,0x5e,0xc7,0xed,0xb5,0x71,0xc1,0xee,0xa7,0xca,0xa2,0x92,0x8d,0xbb, // 00003130 |.*.^...q........|
+0x9c,0x79,0xcf,0x9a,0xd1,0x92,0x79,0xcd,0x64,0x67,0xa7,0xf7,0x32,0x58,0x33,0x1f, // 00003140 |.y....y.dg..2X3.|
+0x44,0xbb,0xa3,0x14,0x54,0x70,0xbb,0x97,0x7e,0x75,0xc5,0x70,0x97,0xc9,0x12,0x6b, // 00003150 |D...Tp..~u.p...k|
+0x65,0x0f,0x1a,0x19,0x48,0xc0,0x91,0x06,0x3a,0x3f,0x20,0x4f,0xbf,0xee,0x79,0xc8, // 00003160 |e...H...:? O..y.|
+0xad,0x91,0x53,0x7f,0x81,0x1e,0x84,0x38,0x76,0xe5,0x30,0xcf,0xc5,0x98,0xea,0xe7, // 00003170 |..S....8v.0.....|
+0x0a,0x59,0xca,0x6b,0x87,0x95,0x45,0x7e,0x30,0xcf,0xab,0xd3,0xd9,0x60,0x2e,0x70, // 00003180 |.Y.k..E~0....`.p|
+0xb2,0x35,0x9d,0x04,0x63,0x64,0x4d,0x7a,0x20,0x35,0xa5,0x2a,0x06,0x74,0x39,0x70, // 00003190 |.5..cdMz 5.*.t9p|
+0x51,0x91,0x94,0xd6,0x9b,0xfe,0x05,0x8a,0xf8,0x1b,0xae,0x43,0x28,0x66,0x28,0xbd, // 000031a0 |Q..........C(f(.|
+0xd3,0x6f,0xf5,0x86,0xac,0x7c,0x94,0x91,0xfa,0xa1,0xe5,0x91,0xae,0x4a,0x72,0xff, // 000031b0 |.o...|.......Jr.|
+0xa0,0x90,0x2b,0xe9,0x23,0x43,0xb1,0x71,0x0f,0x71,0xdf,0x49,0xa3,0x84,0x12,0x5b, // 000031c0 |..+.#C.q.q.I...[|
+0x5e,0x6d,0xaf,0x5b,0xd0,0x9b,0xe1,0xbd,0x13,0x59,0xff,0xaf,0x00,0x5a,0xba,0x3c, // 000031d0 |^m.[.....Y...Z.<|
+0xb3,0xc2,0x89,0x7b,0x33,0x25,0x22,0x6a,0x59,0x33,0x74,0xd0,0x49,0x01,0x6e,0x86, // 000031e0 |...{3%"jY3t.I.n.|
+0x36,0x25,0xef,0x1d,0x9d,0x2a,0xa5,0xc2,0x78,0x87,0x7f,0x20,0x83,0x49,0xc0,0xf4, // 000031f0 |6%...*..x.. .I..|
+0x70,0x8d,0xbd,0x4e,0x4d,0x62,0x1c,0x3e,0x0f,0x11,0xa5,0x22,0x8c,0x34,0x4c,0x26, // 00003200 |p..NMb.>...".4L&|
+0x89,0x30,0x53,0x54,0xb2,0xdd,0x86,0x07,0x9d,0xe7,0x4c,0xf4,0x86,0x55,0x86,0xdc, // 00003210 |.0ST......L..U..|
+0x58,0x6c,0xbe,0xb6,0x22,0x3e,0xcd,0xaa,0x69,0x84,0x5a,0x49,0x9b,0x09,0x6a,0x36, // 00003220 |Xl..">..i.ZI..j6|
+0xa5,0xb4,0xd7,0x1d,0xb2,0x84,0x12,0xfc,0x24,0xca,0x40,0x18,0x43,0x10,0x4f,0x75, // 00003230 |........$.@.C.Ou|
+0xde,0x90,0x23,0x04,0x8a,0x52,0x96,0xd4,0xd6,0x59,0x45,0xed,0xee,0x2e,0x02,0xe7, // 00003240 |..#..R...YE.....|
+0x52,0xe8,0xbe,0x78,0x6e,0x4b,0xd8,0xbd,0xc4,0x16,0xa9,0xe1,0xfb,0x33,0x60,0xef, // 00003250 |R..xnK.......3`.|
+0xb5,0x6a,0x4c,0xd3,0xf5,0xdc,0x0f,0xbc,0xc7,0x3c,0x93,0x5e,0xe7,0x70,0x82,0x04, // 00003260 |.jL......<.^.p..|
+0x86,0x0b,0x1e,0xbd,0x9a,0x3c,0x71,0x20,0xf5,0x65,0x19,0x2b,0x8f,0x0e,0x7c,0x36, // 00003270 |.....<q .e.+..|6|
+0x16,0xf0,0xaf,0xa7,0x0b,0x5a,0x39,0x16,0xc1,0x75,0x6f,0x26,0x43,0xe9,0x17,0x56, // 00003280 |.....Z9..uo&C..V|
+0xd2,0x9c,0x93,0x2a,0x31,0x5d,0xa3,0xeb,0x01,0xb3,0x7d,0xd3,0x4d,0x28,0xb9,0x3b, // 00003290 |...*1]....}.M(.;|
+0x2e,0x60,0xee,0xad,0xdd,0x22,0x5e,0xe1,0xa4,0x31,0x99,0xd3,0xa4,0x25,0x8a,0xe4, // 000032a0 |.`..."^..1...%..|
+0xd0,0x81,0x8a,0xab,0x0f,0x40,0xbc,0xc4,0xdb,0xfa,0xfd,0x26,0xb6,0xfc,0xf0,0xe0, // 000032b0 |.....@.....&....|
+0x6b,0xc9,0xcb,0xd0,0x6e,0x36,0xc1,0xc2,0xf4,0xde,0xee,0x6b,0x17,0xf8,0x63,0xe2, // 000032c0 |k...n6.....k..c.|
+0x42,0x4e,0x3b,0x42,0xaa,0x66,0x01,0x66,0xa8,0x2c,0xc8,0x60,0x07,0xe1,0x15,0x6a, // 000032d0 |BN;B.f.f.,.`...j|
+0x67,0x0a,0x4d,0xfa,0xac,0x46,0x10,0xd0,0x29,0x7b,0x4d,0x25,0x79,0xb4,0xef,0xdb, // 000032e0 |g.M..F..){M%y...|
+0x54,0x9a,0xc6,0xa7,0xd9,0x39,0xbe,0x22,0x74,0x6d,0xbe,0x66,0x0e,0x0e,0x8f,0xd6, // 000032f0 |T....9."tm.f....|
+0x06,0x65,0xa4,0x54,0x6e,0x40,0xae,0x60,0x60,0x48,0x5d,0x4c,0x6c,0x8e,0xb9,0x3f, // 00003300 |.e.Tn@.``H]Ll..?|
+0xca,0xf8,0x98,0x3a,0xc0,0xbd,0x95,0x26,0x89,0x82,0x24,0x87,0xd8,0x08,0x27,0xd8, // 00003310 |...:...&..$...'.|
+0x91,0x83,0x5c,0xae,0x14,0xe2,0x86,0xda,0x81,0xd8,0xe0,0x9b,0x14,0x1a,0x80,0xf1, // 00003320 |..\.............|
+0x6a,0xe1,0x79,0x3e,0xc1,0xff,0x83,0x24,0x5c,0x19,0xc7,0x68,0xd5,0xc0,0x5b,0xe9, // 00003330 |j.y>...$\..h..[.|
+0xf1,0x90,0xd9,0x2e,0x1b,0x06,0x66,0x4e,0x81,0x93,0x2b,0xe7,0xb0,0xe0,0x81,0xd7, // 00003340 |......fN..+.....|
+0x69,0xc1,0xe3,0x9d,0x33,0x47,0x8b,0x2f,0xcf,0x20,0xfd,0xed,0x17,0xba,0xa8,0x0d, // 00003350 |i...3G./. ......|
+0x28,0x52,0x58,0x51,0x05,0x0b,0xeb,0x3e,0xcb,0xd7,0xd2,0x6d,0xdc,0x61,0xea,0xd0, // 00003360 |(RXQ...>...m.a..|
+0xba,0xb3,0xb2,0xd0,0xe8,0xd7,0x6a,0x89,0x8a,0xe2,0xab,0x0f,0xda,0x08,0x54,0x9f, // 00003370 |......j.......T.|
+0xa7,0xfb,0xe1,0xdf,0x1a,0x50,0x22,0x26,0x8d,0x3a,0x3d,0x61,0xb8,0x17,0x85,0x50, // 00003380 |.....P"&.:=a...P|
+0x2d,0xfc,0x8d,0x01,0x85,0xbb,0x25,0x3f,0x28,0x46,0xc6,0x5d,0x1c,0x77,0x21,0xbd, // 00003390 |-.....%?(F.].w!.|
+0x7a,0x89,0x84,0x70,0x77,0xb7,0xbc,0xb7,0xdc,0xa5,0xe4,0x81,0x20,0xad,0x10,0x97, // 000033a0 |z..pw....... ...|
+0x5e,0x92,0x5c,0x4d,0xa4,0xb3,0x80,0x69,0x0d,0xb9,0xf4,0x02,0x87,0x43,0x2e,0x2e, // 000033b0 |^.\M...i.....C..|
+0x68,0x4e,0x00,0x6e,0xc2,0xbf,0xfb,0xa9,0xb5,0x7c,0x99,0x9e,0x8a,0x4a,0x2f,0x26, // 000033c0 |hN.n.....|...J/&|
+0x14,0x6b,0x0f,0x27,0xb2,0xc5,0x86,0x3a,0x80,0x51,0x09,0x25,0xf3,0x8a,0xab,0x5c, // 000033d0 |.k.'...:.Q.%...\|
+0xde,0x0d,0x07,0xc1,0x40,0xd1,0xbb,0xd3,0x7f,0x73,0x0b,0xee,0x91,0x31,0x18,0xe2, // 000033e0 |....@....s...1..|
+0x02,0x74,0xc5,0x79,0x44,0x1c,0xb3,0x02,0x2c,0x9f,0x3e,0xc8,0x65,0x75,0xee,0x42, // 000033f0 |.t.yD...,.>.eu.B|
+0x6b,0xae,0xaa,0x01,0x65,0x20,0x57,0x71,0x12,0xc7,0x72,0xfd,0x80,0x4f,0x21,0x83, // 00003400 |k...e Wq..r..O!.|
+0xb8,0x22,0xcc,0xcb,0xd9,0x6a,0x39,0x70,0x8f,0x7a,0xf0,0xe6,0x63,0x19,0x70,0xd5, // 00003410 |."...j9p.z..c.p.|
+0x60,0xb3,0x5a,0x29,0x63,0x7a,0x01,0xa1,0xff,0x67,0xa1,0xdd,0xd0,0x4e,0xc8,0x99, // 00003420 |`.Z)cz...g...N..|
+0x94,0xd4,0x35,0x1b,0x08,0xc6,0xff,0x74,0xff,0x00,0x24,0x2f,0x08,0x96,0xf4,0x10, // 00003430 |..5....t..$/....|
+0x71,0xc2,0x4f,0x39,0xa3,0x72,0x9b,0x9e,0x5b,0xb8,0xc9,0xb2,0x15,0xc0,0xa3,0x6f, // 00003440 |q.O9.r..[......o|
+0x28,0x22,0x55,0x35,0x61,0xa5,0xa3,0xcb,0x1a,0x1d,0x48,0x40,0xd4,0xb5,0x65,0x07, // 00003450 |("U5a.....H@..e.|
+0xae,0x39,0x8c,0x85,0xbc,0x00,0x52,0x32,0x75,0xa5,0xce,0x39,0xf6,0x12,0x48,0x00, // 00003460 |.9....R2u..9..H.|
+0xf6,0xc8,0x1f,0xb8,0xb8,0xcb,0xef,0xcc,0xef,0xa8,0xb7,0x05,0xb8,0xa4,0x29,0xcd, // 00003470 |..............).|
+0xd2,0xaa,0xf8,0xd2,0x6c,0xa8,0x71,0xe3,0x24,0xf4,0x7b,0x3c,0xdd,0x6d,0xcf,0xad, // 00003480 |....l.q.$.{<.m..|
+0x02,0xb4,0xc5,0x91,0x2a,0xea,0xd2,0xca,0x41,0x69,0xa6,0x35,0x58,0x89,0xb8,0xdb, // 00003490 |....*...Ai.5X...|
+0xae,0xbc,0x2c,0xb5,0x37,0x36,0x86,0x43,0xbb,0x5d,0x70,0x65,0xa7,0x44,0x45,0x65, // 000034a0 |..,.76.C.]pe.DEe|
+0xd3,0xfa,0xb7,0x69,0xae,0x6d,0xa8,0x63,0x6e,0xa2,0x9a,0x81,0x61,0xb7,0x96,0xf4, // 000034b0 |...i.m.cn...a...|
+0xa3,0x60,0xb0,0x61,0x0e,0x00,0x4c,0x16,0xcf,0x81,0xa9,0xd6,0xa3,0x15,0x61,0x04, // 000034c0 |.`.a..L.......a.|
+0x88,0x93,0x3b,0x4b,0x87,0xa2,0x6b,0x8c,0x4d,0x40,0xa6,0xf8,0xb7,0x91,0xb8,0x35, // 000034d0 |..;K..k.M@.....5|
+0x86,0x1f,0x96,0xb2,0x67,0x50,0x54,0xdb,0x90,0xf1,0x7e,0x18,0x0b,0x94,0x0c,0xb9, // 000034e0 |....gPT...~.....|
+0xe9,0x3d,0x2c,0x5d,0xb0,0x39,0xe6,0xf3,0x86,0x5b,0x30,0x98,0xa0,0x50,0xb4,0xca, // 000034f0 |.=,].9...[0..P..|
+0x3d,0xb3,0x4d,0xb9,0x32,0x4e,0xf4,0xee,0x33,0x71,0x98,0xe0,0x5c,0x3f,0x6b,0x2e, // 00003500 |=.M.2N..3q..\?k.|
+0x63,0xc1,0x44,0x35,0xdb,0x2c,0x20,0xd8,0x4d,0x09,0xc7,0xef,0x94,0xd6,0xc3,0x97, // 00003510 |c.D5., .M.......|
+0x7d,0xd0,0xd5,0x1a,0x98,0x89,0xaa,0xac,0x95,0x78,0x52,0xb0,0x93,0xdd,0x5e,0x4b, // 00003520 |}........xR...^K|
+0x6c,0x3d,0x61,0xa3,0x2f,0x36,0x85,0x49,0x6c,0x28,0xb0,0xb5,0xa9,0xfc,0xb9,0x05, // 00003530 |l=a./6.Il(......|
+0x59,0x5c,0x0b,0x03,0x34,0xd9,0xd3,0x91,0x2a,0xbe,0xf2,0x86,0x0e,0x9f,0xcd,0x65, // 00003540 |Y\..4...*......e|
+0xea,0xda,0xe0,0x41,0x58,0x31,0x08,0x7d,0x6b,0x29,0xe8,0x88,0x25,0xfd,0x49,0xca, // 00003550 |...AX1.}k)..%.I.|
+0xa2,0xd5,0x24,0xc4,0x1e,0x87,0xc5,0x05,0xef,0x73,0x89,0xb0,0x23,0x29,0xf4,0x9c, // 00003560 |..$......s..#)..|
+0x06,0xa6,0xdb,0x96,0x7d,0xec,0x32,0x79,0xd5,0x97,0x13,0xbe,0x6d,0x2b,0x29,0xcb, // 00003570 |....}.2y....m+).|
+0x67,0xbb,0x8f,0xad,0x31,0x94,0x61,0x5f,0x15,0x4a,0xc7,0x19,0xee,0xe7,0xcd,0x25, // 00003580 |g...1.a_.J.....%|
+0x93,0x58,0xc1,0x7e,0xed,0x0c,0x09,0x6f,0x42,0x73,0x4e,0x92,0xe1,0x6a,0x2d,0x8a, // 00003590 |.X.~...oBsN..j-.|
+0x33,0x1c,0x2f,0x47,0xc0,0x00,0x8d,0x1f,0xe1,0x65,0x18,0xa0,0x2f,0xe1,0x13,0x7c, // 000035a0 |3./G.....e../..||
+0x1b,0x88,0xaa,0x24,0x3b,0x1e,0x33,0xfd,0xf6,0x28,0xc1,0x46,0xb0,0x4e,0x97,0x40, // 000035b0 |...$;.3..(.F.N.@|
+0x91,0x9c,0x27,0x43,0x13,0x2d,0x0b,0x7b,0x01,0x20,0xb5,0x7a,0x23,0x38,0x77,0x46, // 000035c0 |..'C.-.{. .z#8wF|
+0xb1,0xd6,0x52,0x33,0xb0,0xe2,0xbf,0x8b,0xde,0x6d,0x09,0x74,0x60,0x7b,0x83,0x45, // 000035d0 |..R3.....m.t`{.E|
+0x70,0x31,0x48,0xe9,0x5a,0x61,0x7e,0x8c,0x0f,0x9b,0x73,0x9a,0xf6,0x66,0x1a,0x23, // 000035e0 |p1H.Za~...s..f.#|
+0x77,0xf4,0x14,0xd2,0xa3,0xaf,0x49,0x3e,0x67,0x5a,0x14,0xb0,0x1d,0x2a,0x94,0x83, // 000035f0 |w.....I>gZ...*..|
+0xc0,0x1a,0x25,0xd6,0x53,0x65,0x7d,0xb6,0xbc,0x53,0x64,0xdf,0xb2,0x68,0x05,0xbd, // 00003600 |..%.Se}..Sd..h..|
+0xa2,0x14,0x76,0xb2,0x46,0x8b,0x53,0xe4,0xb1,0x89,0xcb,0x8b,0x02,0x30,0x60,0x5a, // 00003610 |..v.F.S......0`Z|
+0x64,0x2a,0xc3,0x63,0x80,0xd9,0xbb,0x22,0xe5,0x00,0xd6,0x40,0xc5,0x58,0x9d,0xa9, // 00003620 |d*.c..."...@.X..|
+0x4b,0x25,0x13,0xca,0x51,0xe2,0xa5,0xae,0x43,0x84,0xfe,0x2f,0x02,0x33,0x6d,0xe0, // 00003630 |K%..Q...C../.3m.|
+0x24,0x07,0x61,0x8a,0x96,0x37,0xe6,0x8c,0x73,0x82,0xed,0x53,0x53,0xe7,0x59,0xb3, // 00003640 |$.a..7..s..SS.Y.|
+0xed,0xd9,0xaa,0xd1,0xfa,0xda,0x53,0xf8,0x8e,0xf9,0x42,0x26,0xb7,0xd7,0x6b,0x6b, // 00003650 |......S...B&..kk|
+0x44,0x11,0x3f,0x6f,0xe3,0xc4,0x69,0x60,0x29,0x54,0xaa,0x0e,0x8e,0x58,0x90,0xd2, // 00003660 |D.?o..i`)T...X..|
+0xc0,0x8b,0xbe,0x66,0x49,0x0b,0x90,0x32,0xcd,0xaf,0xee,0x6d,0x73,0x1c,0xf8,0x2a, // 00003670 |...fI..2...ms..*|
+0xd5,0x4d,0x0f,0xe8,0xaf,0x73,0x58,0x50,0xea,0x04,0xe7,0x08,0x0e,0xc9,0x58,0x29, // 00003680 |.M...sXP......X)|
+0xa9,0x20,0xd6,0x31,0xb4,0xf3,0x07,0x7a,0xf1,0xcc,0xbf,0x7a,0xff,0x70,0x69,0x72, // 00003690 |. .1...z...z.pir|
+0x37,0xe3,0x09,0x62,0x9a,0x05,0xc2,0xde,0x14,0x56,0x90,0xc0,0x35,0xc6,0xc8,0x66, // 000036a0 |7..b.....V..5..f|
+0x1c,0x64,0x16,0x9d,0x73,0xc7,0xe6,0xce,0xab,0x0d,0x2a,0x3c,0x9e,0xfc,0x17,0x79, // 000036b0 |.d..s.....*<...y|
+0x9d,0x6f,0x8e,0x25,0x76,0x97,0x02,0x51,0xdd,0x4b,0xf1,0x00,0x91,0x8c,0x8f,0xcf, // 000036c0 |.o.%v..Q.K......|
+0xb0,0x5d,0xfa,0x5e,0xb0,0xd9,0x5b,0x53,0x1a,0x5f,0x52,0x04,0x5c,0x33,0x76,0xdc, // 000036d0 |.].^..[S._R.\3v.|
+0x1c,0xa1,0x04,0x89,0x67,0x35,0xbc,0xeb,0xcb,0xa8,0x07,0x36,0xdb,0x22,0xc8,0x15, // 000036e0 |....g5.....6."..|
+0x57,0x2b,0x6f,0x81,0x81,0x18,0x64,0x39,0x54,0x64,0xcd,0x4f,0xf1,0xb3,0x47,0xd8, // 000036f0 |W+o...d9Td.O..G.|
+0x06,0x89,0xf8,0x1d,0xf9,0x43,0x0d,0x02,0x57,0xa6,0xe9,0xf6,0xf6,0x1c,0x9e,0x71, // 00003700 |.....C..W......q|
+0xfd,0x33,0x52,0xb4,0xfa,0x6c,0xf0,0xd2,0x90,0x37,0x46,0x41,0xb2,0x25,0x38,0xe8, // 00003710 |.3R..l...7FA.%8.|
+0x87,0xe1,0x5c,0x5a,0x8a,0x7c,0xd3,0xe1,0xca,0xfc,0x26,0x65,0xec,0x46,0xc3,0xa2, // 00003720 |..\Z.|....&e.F..|
+0x01,0xe3,0x82,0x79,0x4e,0xf4,0xff,0xe1,0x8f,0xc5,0xc3,0x75,0xeb,0x49,0xab,0x89, // 00003730 |...yN......u.I..|
+0xb9,0x5d,0xc9,0xec,0xb0,0x00,0x3b,0xfc,0x25,0x75,0x68,0xaf,0xce,0x45,0xa7,0xfb, // 00003740 |.]....;.%uh..E..|
+0x3a,0xcd,0x28,0x46,0x36,0x88,0x33,0xfc,0xe8,0x8c,0x9e,0x03,0x23,0x4b,0xae,0x59, // 00003750 |:.(F6.3.....#K.Y|
+0xa6,0xae,0xf1,0x6a,0xf6,0x71,0x46,0x3f,0xd8,0x52,0xde,0xa4,0x6d,0xdf,0xb8,0x3d, // 00003760 |...j.qF?.R..m..=|
+0x54,0xe6,0xb9,0xc1,0x66,0xb5,0x25,0x64,0x48,0x43,0x69,0xed,0x4c,0x16,0x72,0x7c, // 00003770 |T...f.%dHCi.L.r||
+0xab,0x2e,0x20,0x8c,0xf3,0x81,0x5a,0xd0,0x1c,0xd1,0x7d,0x42,0xa8,0x59,0x3b,0x8d, // 00003780 |.. ...Z...}B.Y;.|
+0xa3,0x01,0x34,0xab,0xf9,0x23,0x6c,0x06,0x5d,0x8e,0x9b,0xc9,0xc0,0xa9,0xae,0xbf, // 00003790 |..4..#l.].......|
+0xa8,0x77,0x98,0x27,0xa2,0x15,0x24,0xeb,0x06,0x46,0x60,0xa0,0x01,0xe9,0xf3,0xec, // 000037a0 |.w.'..$..F`.....|
+0xeb,0x15,0xb2,0xb2,0x82,0xc5,0xcf,0xb1,0xd1,0x9b,0xad,0x49,0x65,0x1a,0x9a,0x0a, // 000037b0 |...........Ie...|
+0xe6,0xee,0xab,0xdb,0xfd,0x82,0xa5,0x43,0x1d,0x0e,0x05,0x39,0xc9,0xf9,0x09,0x8a, // 000037c0 |.......C...9....|
+0x33,0x98,0xf1,0x42,0xcb,0x9f,0xf5,0x11,0xd0,0x84,0xe4,0x9b,0x92,0xab,0x89,0xca, // 000037d0 |3..B............|
+0xc0,0x9f,0xca,0xe0,0x3b,0xdc,0x2b,0x7e,0xff,0x07,0x23,0xbb,0x3c,0x05,0x91,0xf4, // 000037e0 |....;.+~..#.<...|
+0x79,0x02,0x3b,0x0c,0xd0,0xf1,0x48,0x30,0x29,0x4c,0x27,0x47,0xba,0x70,0x39,0x43, // 000037f0 |y.;...H0)L'G.p9C|
+0xea,0xeb,0x7d,0xf4,0x8a,0x52,0x98,0xb0,0x73,0xd9,0x27,0xc3,0x23,0x8b,0x6c,0x3f, // 00003800 |..}..R..s.'.#.l?|
+0x7b,0x39,0x69,0x9a,0x2f,0x09,0x1b,0x1a,0x8c,0x67,0x57,0xff,0x92,0xcd,0x78,0xd9, // 00003810 |{9i./....gW...x.|
+0x54,0xe0,0x4c,0x45,0x28,0xa4,0x5f,0x4d,0x8a,0xda,0x8f,0x94,0x2d,0x83,0x1d,0x7c, // 00003820 |T.LE(._M....-..||
+0x8e,0x20,0x1d,0x0a,0x66,0x21,0xd9,0x2c,0x4d,0xe4,0xcc,0x27,0xc3,0x0a,0xe0,0x87, // 00003830 |. ..f!.,M..'....|
+0x2f,0x88,0x17,0xf8,0x71,0xa7,0xb5,0xff,0x74,0xa5,0xfa,0x07,0xb6,0x37,0xa5,0x01, // 00003840 |/...q...t....7..|
+0x8d,0x3c,0x76,0xac,0x32,0xfb,0xa1,0x67,0xe6,0x6e,0xa6,0x8c,0xb9,0x60,0x56,0x42, // 00003850 |.<v.2..g.n...`VB|
+0x39,0xb5,0xc0,0xd1,0x6d,0x79,0x6c,0xaf,0x9a,0xa8,0xa0,0xa4,0x7e,0x47,0x7f,0x91, // 00003860 |9...myl.....~G..|
+0x51,0x94,0xd9,0xc2,0x4d,0xf1,0xf3,0x60,0x61,0x19,0x40,0xb8,0xee,0xcb,0x10,0x0a, // 00003870 |Q...M..`a.@.....|
+0x2f,0xd7,0xf2,0x82,0x31,0x7c,0xa9,0xa5,0x41,0x20,0xc3,0xbd,0xc3,0x84,0x80,0x68, // 00003880 |/...1|..A .....h|
+0x77,0x02,0x02,0x38,0xc0,0x07,0x9d,0x4e,0xf6,0x3c,0x36,0x65,0x58,0x26,0x8d,0x71, // 00003890 |w..8...N.<6eX&.q|
+0x3e,0xde,0xff,0x4f,0x2f,0x46,0x94,0x40,0xa8,0xbe,0x75,0x02,0x15,0xb2,0x6d,0x47, // 000038a0 |>..O/F.@..u...mG|
+0x5f,0xe6,0x02,0x21,0xa0,0x54,0x59,0x0d,0xe0,0x6d,0x40,0xd8,0x9a,0x4f,0x97,0xf2, // 000038b0 |_..!.TY..m@..O..|
+0xb3,0x26,0xf6,0xb4,0x93,0x89,0xff,0x51,0xdc,0x0a,0xc9,0x71,0xde,0xad,0xde,0xe8, // 000038c0 |.&.....Q...q....|
+0x68,0xe0,0x9f,0xf3,0x62,0xf2,0x2c,0x0b,0x12,0x64,0x46,0xa4,0x0b,0xd9,0xe1,0x83, // 000038d0 |h...b.,..dF.....|
+0xa4,0x87,0xbd,0x3d,0xa4,0xae,0x07,0x44,0x61,0x06,0xe8,0x86,0x74,0x60,0xce,0x7c, // 000038e0 |...=...Da...t`.||
+0x1a,0xe6,0x8b,0x5e,0xf4,0x34,0xdf,0x8a,0xb8,0xc2,0x0b,0xdd,0xcd,0xfd,0xc6,0xc5, // 000038f0 |...^.4..........|
+0x78,0x0a,0x26,0x58,0x98,0x11,0x6f,0x95,0xea,0x42,0xe1,0x15,0x5f,0xf4,0xe0,0xa0, // 00003900 |x.&X..o..B.._...|
+0xb1,0xf9,0x5c,0xd9,0xb2,0x5d,0x77,0x76,0x34,0xa0,0x94,0x26,0xa2,0x7a,0x56,0x52, // 00003910 |..\..]wv4..&.zVR|
+0xea,0xc8,0x85,0x2a,0x5b,0xae,0x4b,0x38,0x78,0xea,0x01,0x29,0x1e,0x3a,0x8e,0x51, // 00003920 |...*[.K8x..).:.Q|
+0x1c,0x60,0xff,0x78,0xfd,0xbf,0x67,0x77,0x1d,0xa3,0xc8,0xce,0x9b,0xe3,0x6c,0x55, // 00003930 |.`.x..gw......lU|
+0x0a,0xdc,0x58,0x42,0x3b,0x5b,0x32,0x1b,0x87,0x6f,0x48,0xfe,0x4a,0xd6,0x07,0x26, // 00003940 |..XB;[2..oH.J..&|
+0xe0,0x45,0x7a,0x7e,0x40,0x0f,0x6f,0x8c,0x47,0x4a,0x7b,0x6a,0xf4,0x3b,0x8d,0x5c, // 00003950 |.Ez~@.o.GJ{j.;.\|
+0xf5,0x5e,0x06,0xca,0x35,0xfe,0xd3,0x8e,0xee,0x6c,0xa7,0xe9,0x67,0x46,0x52,0xae, // 00003960 |.^..5....l..gFR.|
+0x4d,0x7b,0x51,0x35,0xe2,0x8d,0x1a,0x79,0x21,0xf9,0x70,0x12,0xc0,0xd2,0x56,0xe6, // 00003970 |M{Q5...y!.p...V.|
+0x60,0x5f,0xde,0x65,0xf8,0x70,0x00,0x34,0x0c,0x4a,0x29,0xf9,0x0d,0xf7,0xe9,0x8d, // 00003980 |`_.e.p.4.J).....|
+0xd7,0x28,0x85,0x4a,0x40,0x12,0x12,0x1a,0xae,0x70,0x58,0xfb,0x78,0x3b,0x76,0x58, // 00003990 |.(.J@....pX.x;vX|
+0xc8,0xf7,0x9e,0xd9,0x58,0x73,0xca,0x8a,0x37,0x1f,0xb8,0x81,0x03,0x98,0xe2,0xc3, // 000039a0 |....Xs..7.......|
+0x97,0x5c,0x00,0x5c,0xfa,0x92,0x2e,0x75,0x54,0xac,0x52,0xa9,0xbf,0x8f,0xca,0x8f, // 000039b0 |.\.\...uT.R.....|
+0x8f,0xca,0x92,0xbd,0x8b,0x90,0x8d,0xb5,0x94,0xea,0x8d,0x24,0x7f,0xfb,0xf3,0xbd, // 000039c0 |...........$....|
+0x67,0xbe,0xb1,0x68,0xda,0x22,0x4b,0x10,0x5d,0xd5,0x68,0x1c,0x5a,0xb6,0x3a,0xbc, // 000039d0 |g..h."K.].h.Z.:.|
+0x10,0xaa,0x72,0xd4,0x3f,0xc9,0x9d,0x5d,0xf2,0xfa,0x76,0x4a,0xe3,0xc2,0x77,0x46, // 000039e0 |..r.?..]..vJ..wF|
+0xd5,0x9c,0x85,0x23,0x56,0xdb,0x2c,0xfb,0xe5,0xc5,0x7b,0x5c,0xf6,0x5e,0x94,0xc9, // 000039f0 |...#V.,...{\.^..|
+0xc3,0x4a,0x07,0x10,0x8c,0xf1,0xd7,0x07,0xd1,0xa4,0x1a,0xf0,0xe4,0x82,0xb4,0x40, // 00003a00 |.J.............@|
+0xe0,0xa8,0x95,0xa3,0xf7,0x9e,0xb7,0x28,0x5b,0x0a,0x3b,0xab,0x89,0x44,0x69,0x27, // 00003a10 |.......([.;..Di'|
+0x41,0x1b,0xc2,0x85,0xcf,0x2c,0x2c,0xb0,0x83,0x3f,0xec,0x44,0x80,0x5a,0x6c,0x6b, // 00003a20 |A....,,..?.D.Zlk|
+0xb2,0x1f,0xee,0x67,0xa7,0x65,0xb8,0xb7,0x2c,0x54,0xfd,0x9f,0x9e,0xce,0x05,0x53, // 00003a30 |...g.e..,T.....S|
+0x3f,0x9a,0x01,0x5e,0xa5,0x70,0xd9,0x84,0x6f,0x26,0xf0,0x1d,0x43,0x6d,0xf3,0xaf, // 00003a40 |?..^.p..o&..Cm..|
+0xe1,0xc9,0x20,0x7e,0x36,0x1a,0xb5,0xcb,0x8c,0x13,0xa4,0xb9,0x0a,0xaf,0x02,0x0e, // 00003a50 |.. ~6...........|
+0x3e,0xb8,0x73,0xe5,0x63,0xb5,0x27,0xbe,0x71,0x1c,0x41,0x47,0xa9,0x71,0x7d,0x54, // 00003a60 |>.s.c.'.q.AG.q}T|
+0xb7,0x5a,0xaf,0xa5,0xcd,0x05,0x2c,0xb3,0x66,0x65,0xff,0xa1,0x72,0xe5,0x97,0xd5, // 00003a70 |.Z....,.fe..r...|
+0x54,0x7b,0xb7,0xbf,0x67,0xd3,0x06,0xfe,0x7b,0x6a,0x6b,0x00,0x5b,0x2e,0xc9,0x34, // 00003a80 |T{..g...{jk.[..4|
+0xb6,0x4d,0x56,0xb7,0x4a,0x33,0x9b,0xd3,0xab,0xa1,0xf6,0x9e,0x73,0x94,0xfe,0x0a, // 00003a90 |.MV.J3......s...|
+0xd2,0x8a,0x99,0x6c,0xad,0xa0,0xe7,0xb2,0xff,0x20,0xf5,0x0d,0x6b,0x6e,0x97,0xc2, // 00003aa0 |...l..... ..kn..|
+0x07,0x6e,0x13,0x08,0x62,0x46,0x8e,0x09,0x93,0xdc,0x4a,0xa1,0xeb,0x3e,0xb9,0x01, // 00003ab0 |.n..bF....J..>..|
+0xbd,0x72,0x2f,0xc6,0xce,0x70,0x0b,0xd3,0x28,0x1d,0xac,0xe2,0x1a,0x89,0xec,0xd6, // 00003ac0 |.r/..p..(.......|
+0xe9,0xbd,0x71,0xf3,0x5c,0xbd,0x02,0xe0,0x2f,0x6a,0x11,0xe5,0x34,0xb4,0x0f,0xae, // 00003ad0 |..q.\.../j..4...|
+0xee,0xee,0x78,0x05,0x0b,0x2f,0xa8,0x08,0x89,0x3d,0xbf,0x4c,0x22,0xa6,0xb4,0xa3, // 00003ae0 |..x../...=.L"...|
+0x1a,0xcb,0xfe,0x2a,0x02,0xc4,0x2b,0xd3,0xfc,0xd8,0x0c,0x9e,0xe6,0xfb,0x32,0xd3, // 00003af0 |...*..+.......2.|
+0xd7,0x79,0x78,0xb5,0x40,0x68,0x03,0x32,0x0d,0xcc,0x42,0x15,0x5a,0x4e,0xf2,0xa1, // 00003b00 |.yx.@h.2..B.ZN..|
+0x37,0xa1,0x0e,0x82,0x0e,0xd5,0x95,0xb7,0xef,0x2d,0x69,0xca,0xef,0x2b,0x0f,0xd0, // 00003b10 |7........-i..+..|
+0x36,0x23,0x2a,0x5a,0x89,0x29,0xa6,0x3d,0x06,0x10,0x59,0xe7,0x29,0x9f,0x28,0x4c, // 00003b20 |6#*Z.).=..Y.).(L|
+0x31,0x8a,0xfe,0xd8,0xbf,0x0c,0xda,0xb5,0x46,0xb9,0x0b,0x0c,0x80,0x23,0x80,0xea, // 00003b30 |1.......F....#..|
+0x41,0xc7,0xbb,0xab,0xfb,0xab,0xb9,0x11,0x74,0xfe,0xaf,0xb9,0xaf,0x30,0x66,0x74, // 00003b40 |A.......t....0ft|
+0x60,0xb5,0xce,0xf8,0xcf,0x2e,0xee,0xf0,0x09,0xc1,0x53,0x16,0x97,0x3d,0xe9,0xdc, // 00003b50 |`.........S..=..|
+0x58,0xaf,0x04,0xa9,0x5c,0x82,0x25,0x80,0x10,0x9a,0xab,0x97,0x5e,0x3b,0x10,0x50, // 00003b60 |X...\.%.....^;.P|
+0xee,0xfa,0x2c,0xb8,0xca,0xb1,0x0e,0x96,0x5f,0xb8,0xd4,0x6a,0x8f,0xee,0x61,0xa0, // 00003b70 |..,....._..j..a.|
+0x37,0x29,0x5c,0x16,0x67,0x21,0xe3,0x16,0x38,0xe2,0x5d,0x77,0x2a,0xbe,0x92,0x7a, // 00003b80 |7)\.g!..8.]w*..z|
+0x27,0xc6,0x1c,0x87,0xa5,0xef,0xa8,0x5b,0x4c,0x4c,0x37,0x10,0xb3,0xf4,0x5c,0x1b, // 00003b90 |'......[LL7...\.|
+0x3a,0x1b,0x26,0x54,0xc9,0x7c,0x96,0x07,0x22,0x41,0xec,0x2f,0x09,0x30,0x13,0x52, // 00003ba0 |:.&T.|.."A./.0.R|
+0x66,0x2d,0x28,0x3b,0xed,0xcb,0x3e,0x66,0x4c,0xc3,0x9d,0xaa,0x97,0x0f,0x76,0x40, // 00003bb0 |f-(;..>fL.....v@|
+0xc6,0x1c,0x6a,0xe2,0x2c,0xb7,0x8c,0xe6,0xdf,0x15,0xd1,0xda,0xc8,0xae,0x93,0xa8, // 00003bc0 |..j.,...........|
+0x85,0x42,0x91,0x30,0x42,0xd1,0xeb,0xdf,0x94,0x5b,0x96,0x92,0x8d,0x40,0xc1,0x6f, // 00003bd0 |.B.0B....[...@.o|
+0x89,0xfb,0x80,0xf7,0x1a,0x10,0xf2,0x37,0x94,0xf9,0xbe,0x30,0x8f,0x42,0x68,0x42, // 00003be0 |.......7...0.BhB|
+0x27,0x26,0x29,0x94,0x13,0xb5,0x0e,0x07,0x79,0xaa,0x70,0xac,0x90,0x70,0xfa,0x78, // 00003bf0 |'&).....y.p..p.x|
+0x10,0xd9,0x9c,0x94,0x20,0xa9,0xbe,0x09,0x51,0x39,0x8c,0x2e,0x4d,0x59,0xf7,0x03, // 00003c00 |.... ...Q9..MY..|
+0xd8,0x61,0x1a,0xbf,0x59,0xe1,0x0a,0x28,0x81,0x9e,0x5d,0x65,0x29,0x21,0xce,0xee, // 00003c10 |.a..Y..(..]e)!..|
+0xc9,0xbd,0x0f,0xc8,0x94,0xcd,0x94,0x41,0x97,0x68,0x5e,0x85,0xea,0xda,0xfb,0x32, // 00003c20 |.......A.h^....2|
+0x7b,0x8f,0x45,0x74,0x53,0x0c,0xd3,0xe3,0x79,0xb8,0x4e,0xe2,0x2e,0xa5,0xbb,0x18, // 00003c30 |{.EtS...y.N.....|
+0xa0,0x7b,0x20,0x93,0x4e,0x45,0xfd,0xb4,0x49,0x8d,0xc1,0x05,0x1f,0x54,0x76,0x00, // 00003c40 |.{ .NE..I....Tv.|
+0x0b,0x91,0x6d,0x29,0x15,0x67,0xe6,0x15,0xc8,0xc4,0x00,0xb2,0x15,0x15,0x92,0x9a, // 00003c50 |..m).g..........|
+0xa2,0x90,0x10,0xce,0x53,0x54,0x86,0x6a,0x24,0xdd,0xca,0x60,0x44,0x0b,0x55,0xde, // 00003c60 |....ST.j$..`D.U.|
+0x3f,0xe6,0x1a,0x95,0xe8,0xa4,0x11,0xf7,0x60,0x16,0xaa,0xf0,0x07,0x76,0xbf,0xf7, // 00003c70 |?.......`....v..|
+0x0c,0x43,0x63,0x67,0x62,0x41,0x51,0x4b,0x65,0xea,0xd0,0xf7,0x35,0x42,0xfe,0x64, // 00003c80 |.CcgbAQKe...5B.d|
+0x76,0xc1,0x6f,0x63,0x49,0xa6,0x20,0x60,0x1c,0xfd,0xd3,0xd4,0xa7,0xf5,0x3e,0x1d, // 00003c90 |v.ocI. `......>.|
+0x7b,0xad,0x2c,0x56,0xd5,0x3d,0x15,0x02,0x89,0xf2,0xdb,0x3a,0x9a,0x36,0xf8,0x33, // 00003ca0 |{.,V.=.....:.6.3|
+0x65,0xc9,0xbb,0x63,0x1d,0x00,0x64,0x1e,0x46,0x80,0xf5,0x46,0x00,0x94,0xd6,0xc5, // 00003cb0 |e..c..d.F..F....|
+0x6a,0xf9,0xc5,0xe1,0x21,0x46,0x87,0x9e,0xc1,0x67,0x96,0xd4,0x0c,0x38,0x22,0xb9, // 00003cc0 |j...!F...g...8".|
+0xc1,0xf2,0x19,0x8b,0xd6,0xe0,0x2d,0x17,0x40,0x12,0x95,0x2a,0x2d,0xc1,0x80,0xe4, // 00003cd0 |......-.@..*-...|
+0x03,0x07,0x87,0x41,0x4a,0x56,0x9e,0x7d,0xb9,0x20,0xcf,0xc7,0x61,0x97,0x16,0xaf, // 00003ce0 |...AJV.}. ..a...|
+0x72,0xf7,0x74,0x01,0xc4,0x1a,0x5a,0xac,0xa0,0x85,0x21,0x80,0xaf,0xca,0xb9,0x80, // 00003cf0 |r.t...Z...!.....|
+0x7e,0x06,0x86,0x50,0xce,0x3f,0xdd,0x3a,0x9f,0x9b,0x78,0x1b,0x27,0x1b,0xa0,0x10, // 00003d00 |~..P.?.:..x.'...|
+0x28,0x33,0x71,0x13,0xbf,0x76,0xf2,0xc2,0x24,0x2e,0xdc,0x4e,0x71,0x68,0x4b,0x0c, // 00003d10 |(3q..v..$..NqhK.|
+0x50,0x25,0x76,0x73,0x42,0xa0,0x1d,0x4d,0x82,0x1a,0x85,0xaf,0x4b,0xa3,0x76,0x15, // 00003d20 |P%vsB..M....K.v.|
+0x5a,0xb2,0x79,0x15,0xc0,0x40,0x1a,0x54,0x1f,0xb0,0xd7,0xe2,0x17,0x99,0x6e,0x81, // 00003d30 |Z.y..@.T......n.|
+0xb6,0xc1,0xde,0xf4,0x92,0x03,0x9b,0x96,0x62,0x75,0x53,0x67,0x50,0x56,0x70,0xc9, // 00003d40 |........buSgPVp.|
+0x4e,0x0f,0xb5,0xc8,0xae,0xa2,0xa0,0x4a,0x44,0x13,0x31,0xa2,0x71,0x86,0x76,0x16, // 00003d50 |N......JD.1.q.v.|
+0xf6,0x3d,0x7d,0x5e,0x49,0x01,0x27,0x6f,0x02,0x01,0xf0,0xd2,0xdb,0x40,0xc9,0xcf, // 00003d60 |.=}^I.'o.....@..|
+0xe7,0xa0,0xb2,0xa8,0x0f,0xb2,0x94,0xa7,0x31,0xc9,0x67,0x9b,0xc2,0x44,0xf6,0x1e, // 00003d70 |........1.g..D..|
+0x64,0xea,0x95,0x15,0x41,0x07,0x6a,0x6a,0x7f,0x11,0x69,0x80,0x4d,0x46,0x16,0x7c, // 00003d80 |d...A.jj..i.MF.||
+0x28,0xee,0xdf,0x16,0x07,0x15,0x7f,0x9b,0x2f,0xf9,0x10,0x5a,0x08,0x58,0x01,0xee, // 00003d90 |(......./..Z.X..|
+0x0b,0xfe,0xf1,0x73,0x11,0x59,0xda,0x80,0x04,0xd0,0xf9,0x79,0xba,0xb6,0x41,0x29, // 00003da0 |...s.Y.....y..A)|
+0x3f,0xaa,0xc7,0x92,0xcf,0xc3,0xbc,0x46,0x3a,0x33,0xd5,0xdc,0xd7,0xfc,0x10,0x12, // 00003db0 |?......F:3......|
+0x4c,0x94,0x63,0x55,0x33,0x5e,0x08,0x2a,0x4c,0x5e,0xf7,0xe5,0x6a,0x9b,0xd3,0xb5, // 00003dc0 |L.cU3^.*L^..j...|
+0x74,0x9e,0x60,0x84,0x66,0xe9,0xfa,0xca,0x16,0x46,0x5e,0x09,0xb8,0x2d,0x32,0xaf, // 00003dd0 |t.`.f....F^..-2.|
+0x2c,0x6f,0xf2,0x1f,0xfb,0xa5,0x8e,0x39,0x5b,0x5a,0xab,0x5c,0x83,0x52,0xdb,0xa4, // 00003de0 |,o.....9[Z.\.R..|
+0x05,0xd8,0xc6,0x9f,0x99,0xaf,0x44,0x19,0x54,0x17,0x69,0x56,0x08,0x51,0x21,0x48, // 00003df0 |......D.T.iV.Q!H|
+0xe7,0xf5,0x5e,0x85,0x63,0x0e,0xd6,0x0a,0x74,0x63,0x7e,0x78,0x83,0x4d,0x54,0x53, // 00003e00 |..^.c...tc~x.MTS|
+0xb6,0x58,0x18,0x9d,0xc4,0x1b,0x4f,0x6d,0xeb,0x00,0x33,0x1b,0x48,0x5e,0x4d,0x7c, // 00003e10 |.X....Om..3.H^M||
+0x78,0x3d,0x82,0xbf,0x94,0xbc,0x06,0xbe,0x4b,0x23,0x84,0x38,0x89,0x84,0xf4,0x47, // 00003e20 |x=......K#.8...G|
+0x9c,0xc4,0x2b,0x5e,0xc1,0xda,0x49,0xa5,0x44,0x21,0xe6,0x1f,0x3f,0xd6,0x30,0x4d, // 00003e30 |..+^..I.D!..?.0M|
+0xda,0x76,0xab,0x46,0xfb,0x66,0xd0,0x3f,0xa2,0x89,0xc5,0x94,0xf4,0x47,0xec,0x65, // 00003e40 |.v.F.f.?.....G.e|
+0x07,0xfb,0x19,0x94,0xd2,0xcd,0xf9,0x14,0xbd,0x2c,0x69,0x69,0xc5,0xa0,0xb6,0x29, // 00003e50 |.........,ii...)|
+0x96,0xc9,0xed,0x32,0xff,0xcb,0xf6,0x49,0x41,0xfd,0x69,0xc9,0xb8,0x70,0xe7,0xed, // 00003e60 |...2...IA.i..p..|
+0xbc,0x56,0x7e,0xa5,0x82,0xce,0xc6,0x0f,0xbc,0xf3,0x4a,0x0d,0x85,0xbb,0xa4,0x10, // 00003e70 |.V~.......J.....|
+0x01,0x7f,0xe5,0x14,0x35,0x65,0x7d,0xd5,0xee,0x72,0x5e,0x36,0x22,0xe9,0xa8,0x57, // 00003e80 |....5e}..r^6"..W|
+0xa5,0x93,0x3e,0xec,0x98,0x86,0x1c,0x02,0x93,0x90,0x5b,0xef,0xe9,0xce,0x67,0x74, // 00003e90 |..>.......[...gt|
+0xb7,0xc9,0x33,0x6a,0x0e,0x68,0x71,0xab,0xde,0xdf,0x43,0x3a,0xc3,0x87,0x08,0xfc, // 00003ea0 |..3j.hq...C:....|
+0xe5,0x5f,0xca,0x28,0x96,0xc0,0x4b,0x3a,0x44,0xb8,0xae,0xdd,0x4c,0x9d,0x32,0x6f, // 00003eb0 |._.(..K:D...L.2o|
+0x1f,0x7c,0x37,0x5d,0x8c,0xb4,0x67,0x7c,0xeb,0x5c,0x78,0x7f,0x14,0x0c,0xdd,0x9d, // 00003ec0 |.|7]..g|.\x.....|
+0x02,0x85,0xcc,0x4a,0x11,0x28,0x5f,0xfd,0xa7,0xb0,0xee,0x3d,0xd3,0x61,0x63,0x38, // 00003ed0 |...J.(_....=.ac8|
+0xdf,0xfc,0x11,0xb7,0xb3,0x53,0xe9,0xf3,0x56,0x7e,0xb9,0x98,0x9d,0xeb,0x72,0x1f, // 00003ee0 |.....S..V~....r.|
+0xb5,0xc9,0xa1,0x8d,0x38,0x46,0x86,0xea,0x19,0xc3,0x5e,0x7d,0xca,0xa5,0xb1,0x98, // 00003ef0 |....8F....^}....|
+0xfc,0x25,0xe0,0xbd,0x94,0x26,0x17,0xd7,0x69,0x7a,0x04,0xdc,0x2c,0xec,0x6b,0xd5, // 00003f00 |.%...&..iz..,.k.|
+0xe1,0xcc,0x02,0xb9,0x6b,0xd9,0x4a,0x99,0x3d,0x19,0x25,0xd0,0x43,0xbf,0xae,0x68, // 00003f10 |....k.J.=.%.C..h|
+0xd5,0x39,0x5b,0x65,0xbd,0x84,0xbb,0xe9,0xa2,0x9c,0x3f,0x7c,0x04,0x16,0xd3,0xc5, // 00003f20 |.9[e......?|....|
+0x82,0x72,0x3d,0x09,0xd2,0xf4,0x6b,0xf9,0x64,0xf9,0xf6,0x43,0x53,0xc9,0xb4,0x45, // 00003f30 |.r=...k.d..CS..E|
+0xf7,0x9b,0x89,0xff,0x0f,0x13,0x98,0x4d,0xe6,0x1f,0xde,0x5a,0x36,0xf7,0xdb,0x78, // 00003f40 |.......M...Z6..x|
+0xa9,0x18,0x99,0x7e,0xbb,0xd9,0x31,0x72,0xa9,0x82,0x1e,0xa3,0x82,0xee,0xd9,0x59, // 00003f50 |...~..1r.......Y|
+0x87,0x7d,0x54,0xbe,0xbd,0xb4,0x33,0x74,0x37,0xc5,0xc4,0x82,0xe8,0xbf,0x5f,0x5d, // 00003f60 |.}T...3t7....._]|
+0x72,0x88,0xd2,0xcf,0xce,0x5a,0x7d,0xa5,0x0a,0x5c,0xb1,0xe5,0x7c,0x90,0x63,0x3e, // 00003f70 |r....Z}..\..|.c>|
+0x83,0x34,0xce,0x7b,0xd2,0x3d,0xe5,0xe2,0x29,0x8f,0x09,0x8c,0xc6,0x1e,0x53,0x84, // 00003f80 |.4.{.=..).....S.|
+0x2a,0x49,0x44,0xba,0x35,0xa1,0x58,0x87,0xc6,0xef,0x45,0x4c,0xad,0x08,0x43,0xd8, // 00003f90 |*ID.5.X...EL..C.|
+0x7b,0x5a,0x7f,0x3d,0xd0,0x45,0xb2,0x61,0xf7,0xf4,0xb3,0x09,0x43,0xdf,0x95,0x55, // 00003fa0 |{Z.=.E.a....C..U|
+0x58,0x15,0x86,0x6a,0xec,0xb5,0xf7,0x35,0x59,0xf2,0x58,0x8a,0x19,0xd2,0x1f,0x53, // 00003fb0 |X..j...5Y.X....S|
+0xe3,0x3a,0xc2,0x4c,0xae,0xc0,0x2d,0x41,0x34,0x6d,0xa5,0x97,0x97,0xcc,0x13,0x89, // 00003fc0 |.:.L..-A4m......|
+0x3b,0x60,0xdb,0x70,0x21,0xef,0x20,0xb1,0xbe,0xa8,0x1a,0x59,0xfb,0x25,0x10,0xdb, // 00003fd0 |;`.p!. ....Y.%..|
+0xe2,0xfc,0x87,0x11,0x6d,0x9d,0x7c,0xe0,0x4b,0x9f,0xce,0x4d,0x23,0xe7,0x60,0xae, // 00003fe0 |....m.|.K..M#.`.|
+0x7c,0xc8,0xa6,0x98,0x0c,0x37,0xec,0x55,0x14,0xb6,0x19,0x65,0xd3,0x81,0xf1,0xd6, // 00003ff0 ||....7.U...e....|
+0xbe,0x19,0xfb,0x3f,0x0d,0x6f,0x38,0x32,0x38,0x4a,0x59,0xb8,0xf8,0x38,0x6c,0x7a, // 00004000 |...?.o828JY..8lz|
+0x47,0x53,0x43,0x91,0x17,0x9d,0x88,0xb8,0x26,0xf3,0x17,0xbd,0xc4,0xb1,0x98,0xf1, // 00004010 |GSC.....&.......|
+0x34,0x5c,0xb6,0x12,0x03,0xe8,0x53,0xf1,0xbc,0x0b,0x6b,0x40,0xff,0xbd,0x90,0xbc, // 00004020 |4\....S...k@....|
+0x4d,0xa2,0x26,0xb2,0x39,0xe2,0x83,0xed,0xb5,0x7c,0x0f,0xac,0x52,0xcf,0xf2,0xa9, // 00004030 |M.&.9....|..R...|
+0xb4,0x71,0xae,0x9d,0xee,0xd7,0xbc,0x54,0x72,0xa7,0x65,0xf4,0x15,0x4e,0xf9,0xd2, // 00004040 |.q.....Tr.e..N..|
+0x62,0xdf,0x9a,0x15,0x90,0x90,0x6a,0x97,0x7f,0xd8,0xed,0x44,0x3f,0xf9,0x8b,0x82, // 00004050 |b.....j....D?...|
+0xd6,0x7b,0x30,0x52,0xe8,0x51,0x02,0xa8,0x4d,0xdb,0xdc,0xba,0x2f,0x94,0xc3,0xb9, // 00004060 |.{0R.Q..M.../...|
+0xae,0x95,0x21,0x6a,0xb0,0x83,0x91,0xab,0xca,0xba,0x71,0x1b,0x93,0x75,0x67,0x22, // 00004070 |..!j......q..ug"|
+0x00,0x9c,0x93,0x9e,0x75,0xfd,0x52,0xc3,0x03,0xa5,0xba,0x31,0x1e,0xa6,0xc7,0xcc, // 00004080 |....u.R....1....|
+0x18,0x67,0x51,0xc9,0xef,0xf5,0x91,0x43,0x65,0x8c,0x05,0x64,0xdd,0x53,0xa8,0xc0, // 00004090 |.gQ....Ce..d.S..|
+0x65,0x4e,0xc6,0xf7,0x9c,0xe5,0x9b,0xc2,0x7a,0x67,0x2e,0x5a,0x66,0x65,0x24,0xef, // 000040a0 |eN......zg.Zfe$.|
+0xcf,0x2d,0x06,0x16,0x3d,0xeb,0x1c,0xf0,0x3d,0x98,0x56,0x75,0x6e,0x6d,0x0d,0x49, // 000040b0 |.-..=...=.Vunm.I|
+0x46,0xc1,0xbd,0xef,0xee,0x92,0x39,0xae,0x53,0x0b,0x70,0x93,0x16,0x6b,0x7b,0x43, // 000040c0 |F.....9.S.p..k{C|
+0x15,0x12,0x79,0x91,0x31,0x14,0x83,0x6b,0x14,0xb1,0xbc,0x89,0x9c,0xc2,0x05,0x0b, // 000040d0 |..y.1..k........|
+0x9e,0x4b,0xcb,0x39,0x70,0x0b,0x39,0xd0,0xf2,0xc4,0x64,0x83,0xd4,0x79,0x50,0x99, // 000040e0 |.K.9p.9...d..yP.|
+0x92,0xa5,0x54,0x5a,0xb3,0x38,0x40,0x63,0x7a,0x6f,0xbb,0xd4,0x9d,0x64,0x73,0x02, // 000040f0 |..TZ.8@czo...ds.|
+0x4c,0xb6,0xa8,0x9d,0x1a,0x76,0x8f,0x40,0xe8,0x2b,0xb9,0xbc,0xf4,0xc2,0x97,0x7a, // 00004100 |L....v.@.+.....z|
+0x36,0x7c,0xd0,0x5a,0xbd,0x13,0xc4,0x31,0x25,0xbc,0xc2,0x25,0xaa,0x39,0x46,0xfa, // 00004110 |6|.Z...1%..%.9F.|
+0x3f,0x5e,0xd4,0x3b,0x9c,0xa9,0x06,0xaa,0x5a,0xa4,0x79,0x18,0xf4,0x18,0x56,0xda, // 00004120 |?^.;....Z.y...V.|
+0x59,0xa9,0x00,0x1d,0x7d,0xc8,0x34,0x28,0xed,0x86,0x43,0xfb,0xd1,0x9c,0x7d,0xb5, // 00004130 |Y...}.4(..C...}.|
+0x38,0xa4,0xd4,0xa5,0xa5,0xff,0xcf,0x16,0x44,0x17,0x65,0x54,0xaa,0x54,0x71,0x39, // 00004140 |8.......D.eT.Tq9|
+0xcb,0x30,0xab,0xa3,0x9c,0x6e,0x99,0x17,0x19,0xdf,0x43,0xdd,0x41,0xe7,0xfa,0x93, // 00004150 |.0...n....C.A...|
+0x27,0xa6,0x07,0x60,0xdc,0xf5,0xf7,0xd0,0xf5,0xa9,0x10,0x98,0x43,0x8b,0x44,0x47, // 00004160 |'..`........C.DG|
+0x84,0x5f,0x53,0x94,0x24,0xb6,0x59,0x06,0xfb,0x48,0x27,0x7b,0x0b,0xfa,0x2e,0xf7, // 00004170 |._S.$.Y..H'{....|
+0x82,0xed,0x49,0xa1,0x62,0xec,0x28,0x0a,0xfe,0x85,0x71,0xc7,0x57,0x74,0x70,0xe6, // 00004180 |..I.b.(...q.Wtp.|
+0x96,0x8b,0x75,0xe4,0x8b,0x64,0xc6,0x46,0x66,0x8b,0xbb,0x54,0x38,0xa9,0xb9,0xa3, // 00004190 |..u..d.Ff..T8...|
+0x14,0xca,0xed,0xc0,0xc9,0xdf,0xa0,0xb5,0x37,0x46,0x77,0xb5,0x5f,0x23,0xe8,0x53, // 000041a0 |........7Fw._#.S|
+0xf9,0x31,0xa9,0xe0,0x72,0x86,0xbf,0x1e,0x13,0x31,0x5b,0x46,0x2a,0x8c,0xc2,0xce, // 000041b0 |.1..r....1[F*...|
+0xd9,0x10,0xe3,0xb7,0x05,0x88,0x06,0x41,0xc4,0xba,0x82,0x13,0x8a,0xff,0x72,0xae, // 000041c0 |.......A......r.|
+0x75,0xf9,0xd7,0xa3,0xb2,0x94,0x60,0xc6,0x9e,0x38,0x4a,0xdb,0xff,0x50,0xbe,0x7c, // 000041d0 |u.....`..8J..P.||
+0x7f,0xe9,0x9b,0x5e,0xee,0x99,0xb6,0x0b,0xca,0x72,0x29,0x7a,0xaf,0x8d,0x15,0x9d, // 000041e0 |...^.....r)z....|
+0x3d,0x6a,0x79,0x4c,0x51,0x75,0x0a,0xd9,0x1b,0x8a,0x3e,0x65,0xa5,0x50,0x2c,0x4f, // 000041f0 |=jyLQu....>e.P,O|
+0x64,0x10,0x8a,0xd7,0x30,0x9c,0x2f,0xd5,0xca,0x84,0x38,0xb1,0x3b,0x20,0xa7,0x15, // 00004200 |d...0./...8.; ..|
+0xe1,0x5b,0xcf,0x01,0x56,0x4d,0x99,0xcd,0xbf,0x9b,0xcb,0x49,0x86,0x15,0x85,0xa7, // 00004210 |.[..VM.....I....|
+0x9c,0x1b,0x39,0x77,0xfe,0xc5,0xfb,0xc6,0x46,0x10,0x07,0x6f,0x43,0x52,0x5e,0xd0, // 00004220 |..9w....F..oCR^.|
+0xc3,0x0c,0x5c,0x5f,0x86,0xba,0x1f,0x07,0x8f,0xd6,0xfd,0xd0,0xd7,0x57,0x84,0x46, // 00004230 |..\_.........W.F|
+0x07,0x18,0xc8,0x4f,0x3e,0x7b,0x45,0x45,0x80,0x4c,0x36,0xc5,0x7f,0x46,0x31,0xb5, // 00004240 |...O>{EE.L6..F1.|
+0x76,0x5e,0x98,0x21,0xd3,0x87,0xa2,0xea,0x42,0xb5,0x56,0x7d,0xeb,0x6c,0x60,0xee, // 00004250 |v^.!....B.V}.l`.|
+0x09,0x81,0xb5,0x3f,0xe1,0x6c,0x56,0x52,0x79,0xe7,0x9e,0x19,0x02,0x37,0x01,0x56, // 00004260 |...?.lVRy....7.V|
+0x93,0xf7,0x80,0x46,0xe2,0xd4,0x55,0x38,0x2d,0x61,0xde,0xc5,0x66,0x8a,0x9b,0x5e, // 00004270 |...F..U8-a..f..^|
+0x18,0x3f,0x0a,0x01,0xda,0xba,0xe6,0x27,0xaa,0xae,0xf2,0x78,0xc9,0x70,0x32,0x0e, // 00004280 |.?.....'...x.p2.|
+0x0e,0x61,0xcf,0x2a,0x12,0xe5,0xc9,0x21,0x60,0x60,0x39,0x3e,0xec,0xda,0x20,0xa4, // 00004290 |.a.*...!``9>.. .|
+0x38,0x3f,0x2d,0xb4,0x47,0xa5,0x70,0x05,0xa7,0xb0,0xe7,0xbb,0xc5,0xc6,0xe1,0xf3, // 000042a0 |8?-.G.p.........|
+0x63,0x64,0xfd,0x51,0x04,0x49,0xdd,0xea,0x9e,0xac,0x46,0xe5,0x53,0x6a,0x92,0x25, // 000042b0 |cd.Q.I....F.Sj.%|
+0xa1,0x59,0x60,0xa9,0x31,0x74,0x28,0xb8,0x31,0xe4,0x9b,0x25,0x27,0x24,0xcf,0xb7, // 000042c0 |.Y`.1t(.1..%'$..|
+0x7a,0x62,0x90,0x1d,0xfe,0xc5,0xe8,0xe1,0x97,0x0b,0xd0,0xdb,0xc5,0x96,0x8d,0x9f, // 000042d0 |zb..............|
+0xa7,0x22,0x46,0x85,0x8a,0x22,0x6e,0x33,0xbf,0x76,0x1e,0x3f,0xe3,0x22,0x04,0xec, // 000042e0 |."F.."n3.v.?."..|
+0x8c,0x0a,0x4d,0xe5,0xef,0x5e,0x35,0x94,0x76,0xe9,0x3a,0x2a,0xf5,0xab,0x29,0x86, // 000042f0 |..M..^5.v.:*..).|
+0xf9,0xfc,0xe6,0x9f,0x34,0x70,0x10,0x25,0x87,0x47,0x0b,0x12,0x74,0x61,0xbc,0xb1, // 00004300 |....4p.%.G..ta..|
+0x3a,0xba,0xad,0xc8,0x3c,0xd1,0xd2,0x8b,0xe9,0x29,0xe8,0xf6,0x00,0x2d,0xde,0x25, // 00004310 |:...<....)...-.%|
+0x01,0x64,0x88,0x82,0x34,0x8b,0x70,0x32,0xd3,0x91,0x09,0x00,0x3c,0x0b,0x94,0x8f, // 00004320 |.d..4.p2....<...|
+0xce,0xe5,0xd9,0x0e,0x0e,0x53,0x23,0x4a,0xd9,0x08,0xfb,0x14,0x37,0xab,0xb3,0x84, // 00004330 |.....S#J....7...|
+0x67,0xa3,0x54,0xd2,0xae,0x6f,0xc5,0x03,0x25,0x5b,0xc8,0x26,0x3f,0x9a,0xa1,0xdc, // 00004340 |g.T..o..%[.&?...|
+0xd4,0x7a,0xa7,0x26,0x1d,0x1c,0x6d,0x6b,0x99,0xa5,0x55,0x46,0x0b,0x24,0xff,0x1a, // 00004350 |.z.&..mk..UF.$..|
+0x2e,0x8b,0xdd,0xbe,0xc5,0x13,0x73,0x76,0x17,0x7c,0xbe,0x7c,0xf2,0x93,0x34,0xe9, // 00004360 |......sv.|.|..4.|
+0x02,0x6a,0x39,0x4b,0xdb,0x2c,0x1f,0x8c,0xf5,0xb7,0x18,0x86,0x12,0x0d,0x02,0xac, // 00004370 |.j9K.,..........|
+0xa7,0x18,0x26,0x54,0x18,0x7f,0xab,0x6f,0x53,0xc7,0xb8,0xd3,0xa1,0x13,0x32,0x5b, // 00004380 |..&T...oS.....2[|
+0xf4,0x19,0x74,0xfc,0xc7,0xa9,0xbd,0x29,0x10,0x75,0x12,0x19,0x5c,0x8d,0x15,0x76, // 00004390 |..t....).u..\..v|
+0x15,0x9d,0x28,0x57,0xaf,0x6d,0x6b,0x66,0x8a,0x18,0x5c,0x54,0x05,0xe1,0x75,0xc6, // 000043a0 |..(W.mkf..\T..u.|
+0x62,0x1b,0x42,0x17,0x8e,0x24,0xa4,0x09,0x1a,0x76,0x23,0x3a,0xdf,0x4f,0x10,0x34, // 000043b0 |b.B..$...v#:.O.4|
+0xe8,0x8d,0xc4,0xa1,0xca,0x56,0xda,0x20,0xdb,0x0b,0x0a,0xf4,0x5f,0xbf,0x6f,0xe7, // 000043c0 |.....V. ...._.o.|
+0xc6,0x96,0x9a,0x82,0x26,0xc8,0x79,0x53,0x79,0x32,0x4f,0xe2,0x22,0xbc,0x8b,0x55, // 000043d0 |....&.ySy2O."..U|
+0xdf,0xd4,0x28,0x40,0xcd,0x04,0xc3,0x85,0x3e,0xa4,0x72,0x8a,0x62,0x8f,0x40,0x77, // 000043e0 |..(@....>.r.b.@w|
+0xb5,0x2c,0x95,0x8d,0x24,0x00,0x48,0xb6,0x85,0xa8,0xa8,0x0a,0x8c,0x39,0xbc,0xd5, // 000043f0 |.,..$.H......9..|
+0xc5,0xbd,0x79,0x76,0x3b,0xe6,0x6d,0xc0,0x90,0x70,0xbb,0xda,0x82,0xa3,0xe4,0xca, // 00004400 |..yv;.m..p......|
+0x89,0xbc,0xcf,0x76,0x7e,0xce,0x83,0xff,0xa2,0xa1,0xfa,0x46,0x07,0x2f,0xf5,0x15, // 00004410 |...v~......F./..|
+0xac,0x0e,0x02,0xeb,0x37,0x55,0x80,0x1f,0x8e,0x44,0xcc,0xaa,0x10,0xec,0x0f,0xd1, // 00004420 |....7U...D......|
+0xd9,0xf4,0xae,0x1d,0xc3,0x0f,0xeb,0x27,0x78,0x2b,0x07,0xa4,0xde,0xe2,0xb2,0x1f, // 00004430 |.......'x+......|
+0xcd,0x7e,0xfd,0x39,0x70,0xa7,0x44,0x80,0xa3,0xa6,0xc9,0x61,0x60,0xda,0x15,0x7f, // 00004440 |.~.9p.D....a`...|
+0x13,0x51,0x80,0x62,0xec,0x97,0x06,0xd2,0x11,0xfb,0xa5,0x13,0xa0,0xb9,0x2f,0x23, // 00004450 |.Q.b........../#|
+0xd7,0x65,0xd1,0x7e,0x14,0xd6,0x7b,0x03,0x48,0x94,0x2c,0x12,0x5f,0xc7,0x64,0x06, // 00004460 |.e.~..{.H.,._.d.|
+0x24,0xcb,0x0a,0x1d,0xd3,0x54,0xa7,0xbc,0x99,0x0b,0x9b,0xfc,0x87,0xcf,0xe6,0x9f, // 00004470 |$....T..........|
+0x7b,0x48,0xac,0x1d,0xb5,0x8e,0x9b,0xe0,0x71,0x85,0xfb,0xc0,0x8e,0xc6,0xca,0x64, // 00004480 |{H......q......d|
+0x4d,0x4c,0xbf,0xf4,0x44,0xb0,0xed,0xf4,0xe8,0x2b,0x49,0xa3,0xab,0x70,0xb3,0x30, // 00004490 |ML..D....+I..p.0|
+0xaf,0x33,0x0c,0x4f,0xf5,0x07,0xd9,0xfa,0xd5,0x47,0xa8,0x44,0x32,0x9a,0xdd,0xb8, // 000044a0 |.3.O.....G.D2...|
+0xfb,0x2f,0xfa,0xe7,0x5e,0x18,0x25,0xae,0xbb,0x06,0x5d,0x2d,0x06,0xe4,0xb6,0x2f, // 000044b0 |./..^.%...]-.../|
+0xaf,0xda,0x8f,0x4d,0xd0,0xff,0xf8,0xfe,0xbf,0xcc,0x64,0xe5,0xf3,0x2b,0xcd,0xa2, // 000044c0 |...M......d..+..|
+0x95,0x10,0xcf,0x20,0xea,0x66,0x7f,0xa7,0x38,0x91,0xfe,0x11,0x3b,0x54,0x8f,0xb8, // 000044d0 |... .f..8...;T..|
+0xd6,0x4e,0xcd,0xee,0x7e,0xb7,0x7b,0x5a,0xb3,0x3e,0x3c,0x09,0x5f,0x3b,0x75,0xb7, // 000044e0 |.N..~.{Z.><._;u.|
+0x66,0xc9,0xdc,0xf4,0x38,0x2b,0xf8,0x08,0x38,0xdb,0x08,0x33,0x6d,0x87,0x84,0xdd, // 000044f0 |f...8+..8..3m...|
+0x3e,0x0d,0x61,0x35,0xad,0xc3,0xb2,0xbd,0x1e,0x19,0x11,0x07,0x7c,0x21,0x8e,0x7b, // 00004500 |>.a5........|!.{|
+0x9e,0x29,0x89,0x2d,0x82,0xa4,0x28,0x25,0x0f,0xce,0xde,0xdf,0x61,0x1f,0x5b,0xc7, // 00004510 |.).-..(%....a.[.|
+0x99,0x54,0xcf,0xca,0xfa,0x4e,0x7a,0x91,0xeb,0x2a,0x91,0xff,0xfd,0xc2,0x8e,0x78, // 00004520 |.T...Nz..*.....x|
+0x46,0x40,0x64,0x2e,0x20,0xd5,0x76,0x7a,0x25,0x8e,0x16,0x4d,0xd9,0x68,0xf6,0x7a, // 00004530 |F@d. .vz%..M.h.z|
+0x2a,0x4e,0x3c,0xe2,0x76,0xe5,0xfe,0xd1,0x19,0x3e,0x6a,0x9b,0x76,0x8c,0xcc,0xae, // 00004540 |*N<.v....>j.v...|
+0x33,0x78,0xf5,0x3e,0x6d,0xa8,0x45,0x75,0x12,0x59,0x45,0x76,0xe3,0xa8,0x40,0x10, // 00004550 |3x.>m.Eu.YEv..@.|
+0x1e,0x91,0x6e,0xd1,0x5f,0x12,0x11,0xd2,0x29,0x66,0xe3,0x34,0xaf,0x36,0xed,0xbd, // 00004560 |..n._...)f.4.6..|
+0x64,0x5d,0x0d,0xcc,0xa6,0xf5,0x84,0x7d,0xa4,0x41,0x4d,0xd8,0xe8,0x05,0xdb,0x4c, // 00004570 |d].....}.AM....L|
+0x44,0x43,0x11,0xa6,0xa7,0x60,0xc4,0x64,0x63,0x39,0x57,0x89,0xee,0x0e,0x48,0xfb, // 00004580 |DC...`.dc9W...H.|
+0xad,0xf1,0xfa,0xe5,0xc7,0xb1,0x0a,0xcc,0x79,0xa2,0x71,0x35,0x05,0x4d,0xb2,0x1d, // 00004590 |........y.q5.M..|
+0x1e,0xd2,0x7c,0x34,0x5b,0xb0,0x5d,0xeb,0x11,0x69,0xb4,0x49,0x87,0x20,0x90,0x94, // 000045a0 |..|4[.]..i.I. ..|
+0x3b,0x63,0x28,0x65,0xca,0xb6,0xe0,0x61,0xad,0x14,0x54,0x47,0x5a,0xda,0xa3,0xa0, // 000045b0 |;c(e...a..TGZ...|
+0x81,0x6d,0x39,0xf9,0xc9,0x6f,0x4d,0x32,0x83,0x24,0x4f,0x64,0xfa,0xa3,0xfa,0x13, // 000045c0 |.m9..oM2.$Od....|
+0xb6,0x4c,0xd0,0x56,0xaa,0xeb,0x4b,0x30,0xf0,0x50,0x0b,0x1c,0x74,0xd7,0xc5,0x2e, // 000045d0 |.L.V..K0.P..t...|
+0xfb,0xf5,0xa0,0x05,0x1a,0x6e,0xf3,0x6d,0x06,0xf7,0x82,0x28,0x68,0x61,0xd7,0x94, // 000045e0 |.....n.m...(ha..|
+0x43,0xdf,0xf4,0x42,0xb5,0xa2,0xee,0x6b,0xd2,0xfc,0x8e,0xce,0x46,0x74,0x88,0x68, // 000045f0 |C..B...k....Ft.h|
+0x8d,0x61,0xb9,0x81,0xdb,0x5a,0x57,0xe3,0x34,0x71,0x03,0xe9,0x5a,0x39,0xe2,0xbd, // 00004600 |.a...ZW.4q..Z9..|
+0x16,0x1a,0x50,0xeb,0x86,0xee,0xbd,0x3b,0xed,0xd0,0x09,0x79,0x0a,0xe9,0x8c,0xed, // 00004610 |..P....;...y....|
+0x6d,0x7d,0x8f,0x00,0x1d,0x65,0x6d,0x29,0x43,0xd3,0x84,0x88,0xac,0xf7,0x3c,0x2c, // 00004620 |m}...em)C.....<,|
+0x2a,0xcf,0x1e,0x67,0x0b,0x6c,0x4a,0x85,0x77,0x8b,0xad,0x83,0xf4,0x93,0x65,0x9f, // 00004630 |*..g.lJ.w.....e.|
+0xc8,0xb4,0x24,0x34,0xe6,0x8f,0x4c,0x9c,0xe2,0xa7,0x44,0xc1,0x2f,0x60,0x9f,0x9f, // 00004640 |..$4..L...D./`..|
+0x1c,0x62,0x34,0x4d,0xe3,0x22,0x24,0x28,0x31,0x28,0x1c,0x20,0x89,0x57,0xd1,0x6b, // 00004650 |.b4M."$(1(. .W.k|
+0x3f,0x09,0x66,0xfc,0x37,0x41,0x02,0xc3,0xb1,0xbe,0x44,0xb4,0xe2,0x04,0x12,0xf1, // 00004660 |?.f.7A....D.....|
+0xd3,0xac,0xad,0x79,0x09,0x51,0xb1,0xa0,0x7b,0xc6,0x4a,0x14,0x70,0xd7,0xaf,0xb0, // 00004670 |...y.Q..{.J.p...|
+0xf7,0x80,0x1b,0x05,0x17,0x01,0x0e,0xed,0x1c,0x54,0x25,0xc9,0x7a,0x22,0xde,0x82, // 00004680 |.........T%.z"..|
+0x7a,0x18,0x43,0x8a,0x77,0xb2,0xfe,0xa8,0x11,0xfe,0x70,0xf6,0x0a,0x59,0x20,0x3b, // 00004690 |z.C.w.....p..Y ;|
+0x0f,0x61,0x00,0x28,0x78,0xcb,0xe4,0xd3,0xd7,0xd5,0x39,0x58,0xbb,0x73,0x4e,0x64, // 000046a0 |.a.(x.....9X.sNd|
+0x6d,0x48,0xb9,0xa7,0xe4,0x85,0x73,0xb4,0x42,0x6a,0x68,0x34,0x64,0xe3,0xd8,0xc1, // 000046b0 |mH....s.Bjh4d...|
+0xac,0x6d,0x53,0xbb,0x37,0x36,0x0e,0xc6,0xfe,0x81,0x03,0xc8,0x5d,0xb3,0x98,0x07, // 000046c0 |.mS.76......]...|
+0xfb,0x76,0x10,0xfe,0xbc,0x54,0xa6,0x87,0xdb,0xf1,0xd0,0xff,0x01,0x6e,0x12,0xe0, // 000046d0 |.v...T.......n..|
+0x41,0xb0,0xc9,0xaf,0x59,0x20,0x8e,0xeb,0x7c,0xf3,0xde,0x92,0xe1,0x6b,0xcc,0xc6, // 000046e0 |A...Y ..|....k..|
+0x79,0x34,0x5c,0xf1,0xdf,0x8a,0xee,0x5d,0x5c,0x27,0x78,0xb2,0x92,0x8c,0xe1,0x18, // 000046f0 |y4\....]\'x.....|
+0xbb,0xb2,0xb7,0x4d,0x8c,0x1c,0x04,0x44,0xc8,0xd6,0x4b,0xcc,0xca,0x0c,0x67,0x3e, // 00004700 |...M...D..K...g>|
+0x21,0x18,0xb7,0xf9,0xba,0x20,0xa7,0xf0,0xb2,0xc9,0xb8,0x09,0xdb,0xfe,0x5b,0x8e, // 00004710 |!.... ........[.|
+0x2e,0x0d,0x8a,0xf2,0xdc,0xda,0x6f,0xae,0xf1,0x91,0xe2,0x29,0x3c,0x62,0xd7,0xbb, // 00004720 |......o....)<b..|
+0x4e,0xc7,0x2d,0x2a,0xc7,0xd9,0x84,0x91,0x82,0x35,0xa1,0x63,0x2a,0x1b,0xcd,0x68, // 00004730 |N.-*.....5.c*..h|
+0x98,0x49,0xcf,0x2c,0x87,0xea,0x36,0x96,0xf5,0x21,0x60,0xbc,0x92,0xaa,0xdc,0x98, // 00004740 |.I.,..6..!`.....|
+0xeb,0x24,0xa8,0xd5,0x9b,0x8a,0x92,0xc7,0xf7,0x06,0x73,0x78,0xd1,0x79,0x93,0x9e, // 00004750 |.$........sx.y..|
+0xb8,0x87,0xc4,0x30,0xf9,0x5d,0xd6,0x9e,0xd3,0x00,0x99,0xd4,0x9a,0x66,0x9f,0xb8, // 00004760 |...0.].......f..|
+0x2c,0x3d,0x5b,0x44,0x05,0x25,0x0c,0xba,0xf0,0x56,0xe0,0x8a,0x0b,0xc1,0x43,0x05, // 00004770 |,=[D.%...V....C.|
+0x9c,0x53,0xb0,0xc8,0x8a,0xf5,0xc3,0xfc,0xe6,0x9d,0x65,0x71,0xe1,0xcf,0x7a,0xda, // 00004780 |.S........eq..z.|
+0x5f,0xae,0xc3,0x51,0x90,0x5e,0xc4,0x36,0xff,0x1b,0xbb,0x79,0x19,0x97,0x7d,0x2c, // 00004790 |_..Q.^.6...y..},|
+0x8d,0x78,0x4e,0x8c,0x1f,0x0d,0xf1,0x96,0xf3,0xd3,0xf7,0x3c,0x87,0xfe,0x9c,0x6c, // 000047a0 |.xN........<...l|
+0x8d,0xe5,0x59,0xba,0xc1,0x3d,0xef,0x76,0x60,0x25,0x45,0x60,0x1a,0x10,0x42,0x1b, // 000047b0 |..Y..=.v`%E`..B.|
+0x64,0x9e,0xf0,0xcc,0xd2,0x97,0x84,0xa6,0xb0,0x4c,0x88,0xfa,0x45,0x96,0x82,0x21, // 000047c0 |d........L..E..!|
+0xd2,0xb8,0x97,0xc1,0x2b,0xb1,0xc7,0xcc,0x71,0xe6,0x35,0x06,0x99,0x21,0x8b,0xdf, // 000047d0 |....+...q.5..!..|
+0xd5,0xce,0xaf,0xe3,0xf6,0x35,0x79,0xf6,0x08,0x9a,0xe6,0xbd,0x44,0xae,0xee,0x19, // 000047e0 |.....5y.....D...|
+0xcd,0x81,0x5f,0x3b,0x08,0xbb,0xf0,0x32,0xc3,0xe3,0x3c,0x30,0xef,0x84,0xfd,0xdc, // 000047f0 |.._;...2..<0....|
+0x99,0x26,0xaa,0xd9,0xa4,0x52,0xab,0x55,0x00,0x1d,0x49,0xc0,0x3d,0x51,0x4a,0x65, // 00004800 |.&...R.U..I.=QJe|
+0xb8,0xfc,0x10,0x93,0xd8,0xf0,0xef,0x0e,0x7a,0x47,0x55,0x3a,0xf5,0x2a,0xc6,0xb7, // 00004810 |........zGU:.*..|
+0x06,0x23,0x74,0x7b,0xf7,0x81,0x3d,0xf5,0xcd,0x7c,0x41,0x23,0x94,0xf1,0x92,0x6f, // 00004820 |.#t{..=..|A#...o|
+0x7b,0x7c,0x91,0x9e,0xa9,0xf8,0x87,0x85,0x59,0xcb,0xe5,0x64,0x0b,0xab,0x96,0x08, // 00004830 |{|......Y..d....|
+0xfe,0xab,0x42,0x7c,0x2a,0x44,0xf0,0x95,0x0a,0x9c,0xde,0xd4,0x36,0x2d,0xb7,0x2c, // 00004840 |..B|*D......6-.,|
+0x24,0xec,0x9a,0x0b,0xfd,0x73,0xab,0xd4,0x71,0x92,0xcd,0x43,0x91,0x5e,0x86,0xe7, // 00004850 |$....s..q..C.^..|
+0x31,0xca,0x9e,0x02,0xf4,0x50,0x29,0xdd,0xf0,0x53,0x6a,0xff,0x37,0x9b,0xa2,0x99, // 00004860 |1....P)..Sj.7...|
+0x42,0x3d,0x46,0xc1,0x95,0x04,0xe5,0x4e,0x81,0x1c,0xe1,0x76,0x1a,0x1c,0xfd,0x4f, // 00004870 |B=F....N...v...O|
+0x99,0xc1,0x3a,0x35,0x3c,0x92,0xdf,0xd5,0x8a,0x90,0x5a,0xab,0x6a,0xa0,0xb9,0x4f, // 00004880 |..:5<.....Z.j..O|
+0x60,0x8f,0x41,0xfa,0xe6,0x37,0xc4,0x32,0x93,0x1b,0xd3,0x34,0x1e,0xad,0x64,0x59, // 00004890 |`.A..7.2...4..dY|
+0x09,0x32,0x4d,0x8d,0x21,0x24,0xb6,0x16,0x04,0xf5,0x73,0xcf,0x01,0xb2,0xf0,0x3c, // 000048a0 |.2M.!$....s....<|
+0x1b,0xfb,0x34,0x45,0xba,0x3a,0x0c,0xcc,0x33,0x4b,0x9c,0xd5,0x59,0xe8,0xe3,0xa0, // 000048b0 |..4E.:..3K..Y...|
+0xb9,0x00,0x31,0xe0,0x2c,0x63,0x4b,0x85,0x9e,0x0e,0x8a,0xbf,0xad,0xfa,0xd5,0x5f, // 000048c0 |..1.,cK........_|
+0xb5,0xec,0xf2,0x8b,0xf8,0xde,0xaf,0x92,0x37,0x65,0x1f,0x64,0x60,0x8f,0x7f,0x4f, // 000048d0 |........7e.d`..O|
+0x95,0xb7,0x94,0x98,0xcb,0xbd,0x55,0xf6,0x4c,0xc4,0xb8,0xb0,0x69,0xe6,0xa5,0xa4, // 000048e0 |......U.L...i...|
+0x15,0x75,0xd6,0x72,0x95,0x2a,0x40,0x31,0xca,0x4b,0xed,0xb9,0x2b,0xce,0x4f,0xf7, // 000048f0 |.u.r.*@1.K..+.O.|
+0x77,0x99,0x5e,0x5f,0x37,0xe5,0x19,0x3a,0xe9,0x90,0x45,0x77,0xd3,0x3e,0xa9,0xc7, // 00004900 |w.^_7..:..Ew.>..|
+0xad,0x14,0x9b,0x71,0x7f,0x52,0xfd,0x0d,0xd6,0x67,0x3b,0x48,0xcc,0x2b,0xf7,0xbb, // 00004910 |...q.R...g;H.+..|
+0xc2,0x1b,0xe7,0xd4,0xde,0xb8,0x04,0xd9,0x9a,0x5c,0xd8,0x73,0xf7,0x18,0xbc,0x5a, // 00004920 |.........\.s...Z|
+0x1c,0x10,0x6b,0xf8,0x0f,0x46,0xca,0xfe,0x17,0x34,0x8d,0xdb,0x1c,0x46,0x1e,0x5a, // 00004930 |..k..F...4...F.Z|
+0x83,0xc4,0x41,0x42,0x59,0x33,0x59,0x34,0x94,0xc5,0xeb,0xdc,0xee,0x8b,0xd4,0x19, // 00004940 |..ABY3Y4........|
+0xbf,0x01,0x42,0x19,0x6a,0xe6,0x4b,0x71,0x63,0x47,0x3d,0xb2,0x7d,0x15,0x4c,0x72, // 00004950 |..B.j.KqcG=.}.Lr|
+0x22,0x9c,0xc5,0xbb,0x03,0x36,0xd5,0x51,0xc0,0x60,0xed,0xb6,0x4b,0x12,0xb3,0x5b, // 00004960 |"....6.Q.`..K..[|
+0x7a,0x26,0x98,0x35,0xd3,0x8d,0x40,0xd3,0x9f,0x8e,0x5c,0x3d,0x07,0xaa,0x45,0xaa, // 00004970 |z&.5..@...\=..E.|
+0x73,0x67,0xd1,0x44,0xed,0x65,0xd3,0xb3,0xf7,0x3b,0x86,0xc6,0x51,0x50,0x74,0xdc, // 00004980 |sg.D.e...;..QPt.|
+0xcf,0xa3,0x2a,0xdd,0x06,0x44,0x39,0x85,0x7c,0x48,0x11,0xee,0x3e,0x34,0x0e,0x89, // 00004990 |..*..D9.|H..>4..|
+0xfc,0x39,0xae,0x08,0xdd,0xe4,0x7b,0x63,0x77,0xbd,0xcc,0x7e,0xa2,0x62,0x92,0xaa, // 000049a0 |.9....{cw..~.b..|
+0xb8,0xda,0xc0,0xea,0xee,0xbe,0xb6,0xfc,0x36,0x39,0x0c,0xe3,0x90,0xae,0x18,0x15, // 000049b0 |........69......|
+0xfb,0xd6,0x07,0xb4,0xfd,0x4b,0x38,0x13,0xa0,0x85,0x6c,0x72,0x5c,0x5e,0x3f,0x61, // 000049c0 |.....K8...lr\^?a|
+0x9b,0xd6,0x04,0x95,0xc7,0x26,0x61,0xe4,0x8c,0x89,0x5e,0x8e,0x53,0x32,0xba,0x85, // 000049d0 |.....&a...^.S2..|
+0xf8,0xe8,0xda,0x4b,0x25,0xf3,0x32,0xdd,0xd8,0x44,0x42,0x11,0x88,0xfc,0xf2,0x4a, // 000049e0 |...K%.2..DB....J|
+0xd1,0x21,0x81,0xec,0xa9,0xa4,0xa3,0x29,0xb7,0x53,0x6b,0xf5,0x42,0x0e,0xa9,0x89, // 000049f0 |.!.....).Sk.B...|
+0xbc,0x93,0x3f,0x76,0x5f,0xdd,0x50,0xe5,0xa7,0xee,0x3f,0x46,0xe4,0xf5,0x54,0xcd, // 00004a00 |..?v_.P...?F..T.|
+0x2f,0x25,0x9c,0x3d,0x37,0x2d,0xa2,0x18,0x39,0xf0,0xd9,0x47,0x68,0xf7,0x2d,0x1a, // 00004a10 |/%.=7-..9..Gh.-.|
+0xf6,0x42,0x8e,0x81,0x5b,0x56,0x98,0x9e,0xde,0x33,0xaf,0x40,0x1e,0x2f,0xa9,0x45, // 00004a20 |.B..[V...3.@./.E|
+0x4f,0x8a,0x97,0xbd,0x8b,0x6b,0x6e,0x29,0x13,0x6e,0x18,0x7c,0xdb,0x71,0xbb,0xf3, // 00004a30 |O....kn).n.|.q..|
+0xdb,0x21,0xcd,0x5f,0x1c,0x86,0x96,0xb3,0x3f,0x81,0xff,0x26,0x02,0x4e,0x86,0xff, // 00004a40 |.!._....?..&.N..|
+0xd2,0x04,0xd7,0x32,0x18,0x94,0xb8,0xee,0xa3,0xd2,0xd4,0x3a,0xf6,0x75,0x11,0x2d, // 00004a50 |...2.......:.u.-|
+0x3d,0xba,0x9d,0xf3,0x68,0xf0,0x99,0xd2,0x5c,0x1b,0x23,0x04,0xea,0xfe,0x6f,0x89, // 00004a60 |=...h...\.#...o.|
+0xb0,0xf4,0x24,0xb8,0x6b,0x67,0x09,0xcb,0x61,0x73,0x63,0x1b,0x28,0x4e,0xe8,0xef, // 00004a70 |..$.kg..asc.(N..|
+0x45,0x59,0x72,0xe0,0x67,0x4e,0x0b,0x73,0x41,0xef,0xab,0x2a,0x09,0xbd,0x91,0x50, // 00004a80 |EYr.gN.sA..*...P|
+0x17,0xe8,0xe8,0x5f,0xea,0x38,0x75,0xba,0xfd,0xd1,0x66,0x93,0x86,0xc8,0x49,0xb3, // 00004a90 |..._.8u...f...I.|
+0x33,0xcd,0x69,0x15,0x54,0x2d,0x15,0x1d,0x87,0x63,0x8e,0x5e,0xf9,0xbb,0x00,0xc0, // 00004aa0 |3.i.T-...c.^....|
+0x72,0xd5,0x2c,0xca,0xd8,0x01,0xb2,0x73,0xd9,0xa5,0x45,0x17,0x18,0x4b,0x2f,0x49, // 00004ab0 |r.,....s..E..K/I|
+0x41,0x24,0x57,0x1d,0xff,0x02,0x7b,0x5f,0x62,0xae,0x9f,0xf4,0x4d,0x20,0x32,0xa4, // 00004ac0 |A$W...{_b...M 2.|
+0xcf,0xfa,0x47,0x6a,0x7a,0x0f,0x8a,0x7f,0x05,0xe6,0x07,0x5a,0x0c,0x05,0x23,0xef, // 00004ad0 |..Gjz......Z..#.|
+0xa6,0x48,0x79,0x70,0xc3,0xa8,0xd9,0x94,0xc0,0x49,0xb5,0x62,0x5b,0x2f,0x19,0xa8, // 00004ae0 |.Hyp.....I.b[/..|
+0x88,0x3b,0x47,0x94,0x84,0x0a,0x8c,0x78,0x14,0xcb,0xa5,0x2d,0xcc,0x11,0xac,0x29, // 00004af0 |.;G....x...-...)|
+0x4b,0x56,0x70,0x71,0x57,0xb0,0x87,0xeb,0xba,0x48,0x9e,0x74,0xcd,0x1c,0x64,0xe0, // 00004b00 |KVpqW....H.t..d.|
+0x93,0x0a,0x00,0x5d,0xc4,0x2c,0x71,0xa2,0x61,0x72,0xf8,0xd8,0xe5,0x0a,0xa0,0xd6, // 00004b10 |...].,q.ar......|
+0xae,0x07,0xd0,0xe7,0x29,0x8b,0x94,0x5d,0x0c,0x57,0x96,0x16,0xbd,0x0e,0x36,0xcd, // 00004b20 |....)..].W....6.|
+0x51,0x4b,0xf6,0x5a,0x8d,0x78,0xce,0x18,0x23,0x0d,0x2d,0x47,0x9f,0xe0,0x28,0x47, // 00004b30 |QK.Z.x..#.-G..(G|
+0xf3,0x59,0x86,0x24,0x5e,0x0b,0x15,0x71,0xa7,0xad,0x61,0x4a,0x46,0xb9,0xa8,0xa1, // 00004b40 |.Y.$^..q..aJF...|
+0xa5,0x54,0x1f,0x38,0xdb,0x52,0xac,0xe6,0x34,0x14,0x8b,0xab,0x12,0xe7,0xa5,0xbb, // 00004b50 |.T.8.R..4.......|
+0xdc,0x5f,0x72,0x35,0xa8,0x19,0x2c,0x70,0x4b,0x9f,0xc4,0x9a,0xec,0x1c,0x45,0xdc, // 00004b60 |._r5..,pK.....E.|
+0x02,0x4e,0xa6,0xa8,0xa1,0xad,0x03,0x3a,0xec,0x90,0x6f,0x3b,0x49,0x07,0xba,0xb5, // 00004b70 |.N.....:..o;I...|
+0xc3,0x75,0x6a,0x7a,0xc5,0x08,0xb5,0x67,0xc2,0x14,0x7f,0x5d,0x1b,0x46,0x7a,0xa6, // 00004b80 |.ujz...g...].Fz.|
+0x30,0xa3,0x3c,0x89,0xf3,0x6a,0x71,0x3b,0x7f,0x1d,0x1c,0xd8,0xdf,0x15,0xb5,0x7a, // 00004b90 |0.<..jq;.......z|
+0xd1,0x3d,0xa9,0x1e,0x17,0x36,0x03,0xa4,0xfb,0x72,0x80,0xa9,0xad,0x6e,0xe0,0x16, // 00004ba0 |.=...6...r...n..|
+0x97,0x64,0x4d,0xb1,0xcd,0x4e,0x3e,0x12,0xe9,0x8f,0x4b,0x7b,0x30,0xce,0x64,0xb0, // 00004bb0 |.dM..N>...K{0.d.|
+0x39,0x2c,0x05,0x2c,0xa6,0x7e,0x3d,0xf2,0xc1,0x13,0x1c,0xa3,0xde,0x8c,0x87,0x73, // 00004bc0 |9,.,.~=........s|
+0xa1,0xf5,0x68,0x2d,0x88,0x9c,0x27,0x29,0x7d,0x74,0xd6,0x45,0x3e,0xca,0xbd,0x3c, // 00004bd0 |..h-..')}t.E>..<|
+0x07,0xba,0x2b,0x28,0xce,0x2c,0x57,0x96,0xc8,0xff,0xb5,0xfc,0xfc,0x2f,0xc4,0xd9, // 00004be0 |..+(.,W....../..|
+0xa0,0x2a,0xbf,0x83,0xcb,0xca,0x9d,0x91,0x9c,0xac,0x6b,0x5a,0x55,0x14,0xc9,0xc4, // 00004bf0 |.*........kZU...|
+0x89,0xd6,0x9e,0x17,0xcf,0xd7,0x71,0x4f,0xc8,0x97,0x49,0x21,0xd6,0x2a,0x31,0xf2, // 00004c00 |......qO..I!.*1.|
+0x59,0xae,0x1b,0xca,0x90,0x00,0x55,0x5b,0x93,0xc3,0x5c,0xdc,0x09,0xdb,0x00,0xa1, // 00004c10 |Y.....U[..\.....|
+0xe1,0xe7,0x13,0x4d,0x7c,0x1d,0xba,0x50,0x01,0x32,0x3d,0x4f,0x3b,0x82,0x03,0xf0, // 00004c20 |...M|..P.2=O;...|
+0x5b,0xa0,0x8c,0x68,0x0f,0xb6,0x55,0xe4,0xb6,0x0c,0xa8,0x25,0x25,0x5d,0xa1,0x11, // 00004c30 |[..h..U....%%]..|
+0xa3,0x04,0x15,0xb8,0x89,0x72,0x3d,0xa7,0xe8,0x10,0x72,0xb1,0x3b,0x1b,0xe6,0x1b, // 00004c40 |.....r=...r.;...|
+0xe3,0x9f,0xb8,0xdd,0x95,0xa5,0xd7,0x7d,0x62,0xf1,0xbc,0x8e,0xd9,0x2f,0x53,0xcc, // 00004c50 |.......}b..../S.|
+0x77,0xf1,0xb5,0xaf,0x2b,0xb3,0xff,0x50,0x0c,0xa0,0x34,0x6d,0xb7,0xdb,0x0c,0xa9, // 00004c60 |w...+..P..4m....|
+0xc2,0x28,0x4d,0x31,0x35,0x1f,0xc8,0xc8,0xea,0x1f,0xd7,0x44,0x97,0xc0,0x45,0xab, // 00004c70 |.(M15......D..E.|
+0x91,0xbe,0x62,0x4b,0x04,0x38,0x5c,0x75,0xc9,0xe3,0x38,0x19,0xa9,0x54,0x2f,0x07, // 00004c80 |..bK.8\u..8..T/.|
+0x87,0xfc,0xd8,0xda,0x7f,0x44,0xdb,0xdd,0xdb,0x0a,0xa7,0x2a,0xd7,0x00,0xad,0xb6, // 00004c90 |.....D.....*....|
+0xb4,0xf5,0xc5,0x70,0x96,0x3e,0xdd,0x8a,0x99,0x44,0xf9,0x8f,0x28,0x57,0x05,0x66, // 00004ca0 |...p.>...D..(W.f|
+0xad,0x43,0x1a,0xc0,0x87,0x94,0x3c,0xcf,0x8f,0x2b,0xf7,0x90,0xfd,0xe7,0x01,0x82, // 00004cb0 |.C....<..+......|
+0x60,0x4b,0x79,0x08,0x94,0xf2,0x41,0x54,0xb5,0xb1,0x1b,0x8b,0xe8,0x51,0xde,0x49, // 00004cc0 |`Ky...AT.....Q.I|
+0xce,0xab,0xdc,0x9e,0xff,0xac,0x89,0xe7,0x98,0x63,0xb7,0x3d,0x8d,0x37,0xcf,0x32, // 00004cd0 |.........c.=.7.2|
+0x7e,0xeb,0x4c,0x5a,0xa6,0x36,0xad,0xd0,0xc1,0x9f,0x74,0x41,0x5a,0x46,0x65,0x5f, // 00004ce0 |~.LZ.6....tAZFe_|
+0x95,0x57,0x6b,0xe8,0x67,0x51,0x6d,0x9e,0x18,0x2f,0x77,0x90,0x98,0x9d,0xac,0x48, // 00004cf0 |.Wk.gQm../w....H|
+0xc5,0x82,0x39,0xb3,0x8d,0x4c,0xf7,0x14,0x1d,0x83,0xa3,0x91,0x33,0x2b,0x6c,0x22, // 00004d00 |..9..L......3+l"|
+0x19,0x9c,0x08,0x26,0x70,0xf0,0x10,0x60,0xac,0x0a,0xb7,0xf4,0x02,0x1f,0x19,0xef, // 00004d10 |...&p..`........|
+0xb2,0xb1,0x75,0x4e,0x9c,0x89,0x49,0x8a,0xa0,0x38,0x66,0x55,0xa5,0xdb,0x25,0x77, // 00004d20 |..uN..I..8fU..%w|
+0x1e,0x1d,0x57,0xc9,0x78,0x46,0x8e,0x30,0xc2,0xc8,0x91,0x8b,0x1c,0x05,0x2b,0xfb, // 00004d30 |..W.xF.0......+.|
+0xaa,0x8c,0x80,0x23,0x4a,0xa0,0x1b,0x52,0xb8,0xb5,0xc8,0xef,0xe0,0xe3,0x68,0x26, // 00004d40 |...#J..R......h&|
+0xc6,0x75,0x38,0xf6,0xa4,0x61,0x22,0x93,0x92,0x84,0x87,0x1f,0xfe,0x65,0x3e,0x4b, // 00004d50 |.u8..a"......e>K|
+0x9b,0xde,0x34,0x04,0x7c,0x64,0xf4,0x1f,0xdd,0x98,0x0a,0xfa,0x12,0x6a,0x52,0xf1, // 00004d60 |..4.|d.......jR.|
+0x9a,0x1a,0x49,0x72,0xcb,0x8d,0x3f,0x22,0xf5,0x07,0xd4,0x39,0x37,0x87,0x94,0xd0, // 00004d70 |..Ir..?"...97...|
+0x42,0x91,0xa5,0xba,0x49,0xf2,0x0d,0x69,0x40,0x1f,0x8e,0xb9,0x2f,0x98,0xc0,0x07, // 00004d80 |B...I..i@.../...|
+0x44,0x74,0x86,0x34,0xfe,0xf6,0x39,0x04,0x12,0xe5,0xc0,0x38,0x9b,0xa8,0xd3,0x01, // 00004d90 |Dt.4..9....8....|
+0x25,0x4d,0xc2,0x24,0xb4,0xc6,0x95,0x93,0x66,0x54,0xec,0x35,0x1f,0x30,0x7f,0x02, // 00004da0 |%M.$....fT.5.0..|
+0xb4,0xe9,0x6c,0x2b,0x3c,0x0e,0x05,0xd5,0x71,0x4c,0x77,0x42,0x08,0xf0,0x2d,0xd7, // 00004db0 |..l+<...qLwB..-.|
+0x99,0x32,0x6d,0xc2,0x3a,0xca,0x98,0x00,0x56,0xec,0xab,0x79,0x75,0xb2,0xa8,0x88, // 00004dc0 |.2m.:...V..yu...|
+0xab,0x5a,0xe1,0xfd,0xc1,0xbc,0x9e,0xfe,0x06,0x9a,0x2f,0x08,0x58,0xae,0x05,0x25, // 00004dd0 |.Z......../.X..%|
+0xe2,0x94,0x7f,0xee,0xdf,0x4e,0x5e,0x3b,0xe3,0x31,0xe4,0x9e,0xf8,0xa0,0x40,0xcf, // 00004de0 |.....N^;.1....@.|
+0x6e,0x9c,0x9a,0xb0,0x75,0xea,0xe4,0x60,0x28,0x75,0xa2,0x69,0xf4,0x4d,0x11,0xd4, // 00004df0 |n...u..`(u.i.M..|
+0xb1,0xa6,0x6b,0x6c,0xb5,0xd9,0x2d,0xbb,0x50,0xaa,0x65,0x79,0x0d,0x6d,0xfa,0x14, // 00004e00 |..kl..-.P.ey.m..|
+0x3f,0x44,0xcb,0xcd,0x34,0x31,0x4f,0x60,0xb8,0x8d,0x8a,0xcf,0x19,0x2c,0x2a,0x88, // 00004e10 |?D..41O`.....,*.|
+0xf6,0x61,0x7b,0xda,0xff,0x07,0x1a,0xfb,0xf4,0x60,0xbe,0x2c,0x52,0x5f,0x4b,0x06, // 00004e20 |.a{......`.,R_K.|
+0x71,0xe9,0x71,0x57,0x57,0x0f,0xbd,0x5c,0x0d,0x14,0x0e,0x3d,0xbb,0xab,0x35,0xec, // 00004e30 |q.qWW..\...=..5.|
+0xf0,0xe7,0xc2,0x3e,0x35,0xc2,0x94,0xb6,0x76,0xd7,0x66,0x7e,0xaa,0xc0,0x69,0xa0, // 00004e40 |...>5...v.f~..i.|
+0xe1,0x25,0x5d,0x9b,0x78,0xee,0xf6,0x66,0xc7,0x53,0x1c,0x23,0xa2,0x2f,0x27,0x13, // 00004e50 |.%].x..f.S.#./'.|
+0x0b,0x85,0xbe,0x67,0xf6,0x16,0x7c,0xe2,0x2f,0x15,0x39,0x7d,0x2e,0xcc,0x5f,0xa9, // 00004e60 |...g..|./.9}.._.|
+0xa8,0xf9,0x68,0xfa,0xa4,0xa4,0xbf,0x4e,0x20,0x7c,0x27,0x9d,0xf1,0x75,0x2a,0x95, // 00004e70 |..h....N |'..u*.|
+0xb6,0x32,0xe5,0xbf,0x9b,0x18,0xf1,0xf9,0x97,0x66,0x14,0x6c,0xf1,0x6f,0x2a,0x4e, // 00004e80 |.2.......f.l.o*N|
+0x6d,0x2b,0x33,0xd4,0x91,0x2b,0x8a,0x17,0xd9,0x26,0xf6,0xbf,0xde,0x55,0x2e,0x87, // 00004e90 |m+3..+...&...U..|
+0x01,0xca,0x34,0xfd,0x7d,0x2d,0xf6,0xe4,0xea,0x23,0x83,0x54,0xa1,0x5b,0xc7,0xc5, // 00004ea0 |..4.}-...#.T.[..|
+0x7c,0x73,0x22,0x00,0x18,0xe4,0x27,0x8b,0x26,0x15,0xba,0x0e,0x0e,0x7b,0xb3,0xf9, // 00004eb0 ||s"...'.&....{..|
+0x56,0xeb,0xa3,0x28,0x7a,0xbd,0x1f,0xd1,0x8a,0xc3,0x2d,0x53,0xeb,0x80,0x1a,0xc9, // 00004ec0 |V..(z.....-S....|
+0xda,0x1b,0x9c,0x9f,0x47,0x2b,0x9a,0xda,0x27,0xcc,0x6b,0x01,0x33,0xe0,0xf2,0x86, // 00004ed0 |....G+..'.k.3...|
+0x58,0xab,0x53,0xbe,0x32,0x0b,0x86,0xe8,0xf2,0xe5,0x33,0x3f,0xb4,0x8e,0x4f,0xb0, // 00004ee0 |X.S.2.....3?..O.|
+0xc3,0x1f,0x43,0xa9,0x01,0x67,0x2b,0x05,0x32,0x0e,0xc3,0x39,0x71,0xb8,0x87,0x45, // 00004ef0 |..C..g+.2..9q..E|
+0xd4,0x5c,0x20,0xcc,0xae,0x16,0x45,0x6b,0xc9,0xa6,0xe0,0x76,0x89,0xaa,0x25,0x92, // 00004f00 |.\ ...Ek...v..%.|
+0x80,0x59,0x0e,0x27,0xcf,0xdc,0xce,0xdc,0x60,0x61,0x5a,0xb1,0xcc,0xac,0xb7,0x02, // 00004f10 |.Y.'....`aZ.....|
+0xec,0xb3,0x54,0x67,0xb6,0x30,0x4d,0x21,0x48,0x1f,0xf8,0x41,0x2d,0x45,0xe7,0x38, // 00004f20 |..Tg.0M!H..A-E.8|
+0xa4,0x22,0x5f,0xab,0x6d,0x25,0x3d,0x59,0x23,0x52,0xed,0x2b,0xab,0x91,0x06,0xca, // 00004f30 |."_.m%=Y#R.+....|
+0x8c,0xdd,0xca,0xe4,0xfd,0x25,0xfb,0x68,0xd6,0x4f,0xf3,0x7d,0x01,0x94,0xcf,0xc2, // 00004f40 |.....%.h.O.}....|
+0x23,0x46,0x58,0x9a,0x74,0xb9,0xf7,0x88,0x26,0x9a,0xf4,0xe1,0xbb,0xc3,0x25,0xde, // 00004f50 |#FX.t...&.....%.|
+0xb5,0x3c,0xe3,0xe5,0x6b,0xae,0x35,0x4d,0xcd,0x70,0x53,0x00,0x91,0xa2,0x9c,0xa8, // 00004f60 |.<..k.5M.pS.....|
+0x89,0xc9,0x9e,0x39,0x6c,0xde,0x91,0xcd,0x2d,0xa0,0x3c,0x41,0xda,0x7e,0x6d,0xe3, // 00004f70 |...9l...-.<A.~m.|
+0xe6,0x96,0x55,0x2d,0x9a,0xdd,0x83,0x9f,0x5a,0xf7,0x96,0xe2,0xfe,0x7d,0xe2,0xb5, // 00004f80 |..U-....Z....}..|
+0xda,0x2e,0xff,0xe3,0x7b,0xf3,0x1b,0xf5,0xa5,0xfc,0x8e,0xb1,0x9f,0xd9,0x13,0x5b, // 00004f90 |....{..........[|
+0x58,0x8e,0x52,0x9c,0xd7,0xc7,0x63,0x8b,0x8d,0x6e,0x30,0x70,0xb1,0x4f,0x56,0xfb, // 00004fa0 |X.R...c..n0p.OV.|
+0x05,0xf7,0xaa,0x2a,0x28,0xad,0xee,0x2f,0x25,0x5d,0xb2,0x64,0x72,0x91,0x77,0x96, // 00004fb0 |...*(../%].dr.w.|
+0x11,0xd1,0x17,0x7d,0xb5,0x73,0x0d,0x66,0x70,0xc3,0xe4,0xfa,0x6f,0x62,0x7b,0x36, // 00004fc0 |...}.s.fp...ob{6|
+0xb9,0xa8,0xa8,0x37,0xad,0xe5,0xc4,0x10,0xbf,0x76,0x56,0xef,0x29,0x5c,0x1f,0x76, // 00004fd0 |...7.....vV.)\.v|
+0x6b,0xdf,0xbd,0xcf,0x19,0x12,0x03,0x3d,0x0d,0xb3,0x6f,0x79,0xa7,0xab,0x8c,0xd9, // 00004fe0 |k......=..oy....|
+0xb2,0xbb,0xb8,0x70,0x58,0x5b,0xb7,0x59,0x9f,0xb8,0x1f,0x2b,0xb9,0x1c,0xa2,0x7c, // 00004ff0 |...pX[.Y...+...||
+0xd4,0x2a,0x42,0xbc,0x3b,0x61,0x52,0x9a,0x6f,0xeb,0xdd,0x63,0xb8,0x49,0x68,0x29, // 00005000 |.*B.;aR.o..c.Ih)|
+0xe6,0x6e,0xf1,0x76,0x3a,0x95,0x48,0x8c,0x8c,0x4f,0x92,0xae,0x6c,0xe0,0x90,0x96, // 00005010 |.n.v:.H..O..l...|
+0x05,0x4b,0x11,0xc6,0xd6,0x9e,0xab,0x02,0xf7,0x52,0x18,0xff,0x06,0x0c,0x4a,0x2c, // 00005020 |.K.......R....J,|
+0x3e,0xff,0xe0,0x4a,0xd6,0x29,0x15,0x4b,0xe2,0x6f,0x91,0x36,0x43,0x4f,0x09,0x7c, // 00005030 |>..J.).K.o.6CO.||
+0xc7,0xe8,0x18,0x2c,0x46,0x95,0x3b,0xd8,0xed,0x13,0x70,0x3b,0xec,0xf9,0xc2,0x47, // 00005040 |...,F.;...p;...G|
+0x8e,0x0b,0xab,0x31,0xab,0x71,0x51,0x83,0x9c,0xa5,0xf0,0x2c,0x41,0xe5,0x02,0x9d, // 00005050 |...1.qQ....,A...|
+0xba,0x82,0x55,0x54,0xb6,0xe1,0x87,0x70,0xae,0xf5,0xaf,0xc9,0x2e,0x07,0xab,0x3b, // 00005060 |..UT...p.......;|
+0xd7,0x7d,0x45,0x42,0x4b,0x90,0xc4,0xe4,0x43,0x02,0xdb,0x46,0x55,0xe5,0xbc,0xc3, // 00005070 |.}EBK...C..FU...|
+0xa2,0xc0,0x94,0xca,0x69,0x4d,0xc0,0xd5,0x3e,0xbb,0xe4,0xcc,0xc2,0xc7,0x74,0x1f, // 00005080 |....iM..>.....t.|
+0xae,0xee,0xa1,0xd2,0x4f,0x83,0xfe,0xa5,0xd1,0x8b,0x02,0x1c,0x0a,0xd6,0xe1,0x1d, // 00005090 |....O...........|
+0x16,0xb1,0x06,0xe6,0x13,0xfd,0x81,0x9b,0x7d,0xe0,0x58,0x25,0xaa,0x5b,0x8b,0x36, // 000050a0 |........}.X%.[.6|
+0x93,0x2d,0x12,0x54,0x76,0x61,0x41,0x0e,0xf4,0x24,0xbe,0x5b,0x71,0xe0,0xc0,0x70, // 000050b0 |.-.TvaA..$.[q..p|
+0x48,0x37,0xdb,0xf2,0xb6,0x27,0xb0,0x2b,0xbe,0xe5,0x6a,0x15,0x7e,0x5a,0x18,0x60, // 000050c0 |H7...'.+..j.~Z.`|
+0x00,0xa1,0xe0,0x12,0x83,0x5a,0x0a,0x5c,0x92,0xf2,0x35,0x51,0x78,0x43,0x49,0xcd, // 000050d0 |.....Z.\..5QxCI.|
+0xf1,0xa4,0x63,0xec,0x50,0x87,0xc3,0xeb,0x70,0xfb,0xbd,0x9c,0x4c,0x32,0xcd,0x33, // 000050e0 |..c.P...p...L2.3|
+0x22,0xf0,0xcc,0x09,0xa3,0xfe,0xe9,0xc9,0x87,0x03,0x18,0xaf,0x1d,0xea,0x9a,0xff, // 000050f0 |"...............|
+0x89,0x61,0x26,0x47,0x62,0x5a,0xdb,0xdc,0xaf,0x91,0x30,0xa9,0x70,0x9f,0xd6,0xd0, // 00005100 |.a&GbZ....0.p...|
+0x2d,0x41,0xb8,0xfe,0x96,0x56,0xd5,0x0e,0x40,0xfc,0xed,0x21,0xb0,0xd9,0xc9,0xa0, // 00005110 |-A...V..@..!....|
+0x3a,0xc3,0x2c,0xc8,0x9e,0x35,0xfb,0x70,0xd3,0x52,0x68,0xb5,0x10,0x9f,0xf2,0x84, // 00005120 |:.,..5.p.Rh.....|
+0x6b,0xb5,0xd0,0x59,0x63,0x27,0x09,0x44,0xb5,0x07,0x70,0x42,0xee,0x19,0x10,0x3d, // 00005130 |k..Yc'.D..pB...=|
+0xf8,0xc7,0x23,0x3c,0x84,0x78,0x47,0x1a,0x1b,0x05,0x10,0x64,0xe9,0x26,0x2a,0x1a, // 00005140 |..#<.xG....d.&*.|
+0xd5,0xfa,0xf4,0x20,0xc8,0x27,0x75,0x16,0x4c,0x77,0x7a,0x32,0x53,0xf2,0x2f,0x14, // 00005150 |... .'u.Lwz2S./.|
+0xd4,0xb0,0xff,0x19,0x43,0x4e,0xe5,0x06,0xde,0xe9,0x1f,0xc1,0x91,0xfa,0xbd,0x36, // 00005160 |....CN.........6|
+0xb0,0xc1,0x99,0x31,0x63,0x09,0x07,0x98,0x16,0xd4,0x45,0x5d,0x2b,0x76,0x2c,0x2f, // 00005170 |...1c.....E]+v,/|
+0x89,0xc5,0xe9,0x5c,0xf5,0xff,0x8c,0xc9,0xf2,0x6c,0x72,0x1f,0xc8,0x9a,0x48,0x66, // 00005180 |...\.....lr...Hf|
+0x26,0xdb,0x27,0x4a,0xd1,0x09,0x10,0x16,0x13,0x16,0xb6,0x89,0xc1,0xea,0x22,0x71, // 00005190 |&.'J.........."q|
+0x76,0x14,0x2c,0xae,0x3c,0x8b,0x2c,0x66,0xc0,0x88,0x33,0xe8,0xca,0xca,0x3a,0x79, // 000051a0 |v.,.<.,f..3...:y|
+0x4c,0x4f,0x64,0x1f,0x56,0xca,0x4d,0x5f,0xc3,0x58,0xc6,0xa5,0x35,0x6e,0xe6,0x0b, // 000051b0 |LOd.V.M_.X..5n..|
+0xdd,0x47,0xd4,0xa8,0x3d,0xe1,0x2c,0x12,0xb6,0x3e,0x80,0x77,0x70,0x63,0x85,0x54, // 000051c0 |.G..=.,..>.wpc.T|
+0x11,0x80,0x5f,0xb6,0xcb,0x67,0x80,0xb3,0xc9,0x98,0x48,0x8d,0x64,0xc0,0xee,0x04, // 000051d0 |.._..g....H.d...|
+0x20,0x24,0x8a,0x5b,0x4b,0x76,0x6e,0x38,0xef,0xce,0x6c,0x8b,0xa3,0x2c,0x4a,0x79, // 000051e0 | $.[Kvn8..l..,Jy|
+0x40,0xf2,0x15,0x83,0xb3,0x8f,0x15,0xa9,0xf2,0xff,0x76,0x33,0xc5,0x31,0xa2,0x48, // 000051f0 |@.........v3.1.H|
+0x94,0x2c,0xbb,0x19,0x0d,0x8b,0x38,0xa2,0x65,0x12,0x6b,0x9c,0x10,0x7b,0x3a,0x58, // 00005200 |.,....8.e.k..{:X|
+0xa0,0x0f,0xcc,0xdb,0x65,0xa2,0x20,0x21,0xc4,0x5d,0x35,0x69,0x38,0x95,0x6f,0xfe, // 00005210 |....e. !.]5i8.o.|
+0xe6,0xdb,0x85,0x52,0x67,0x58,0xd5,0x23,0x31,0x6e,0x53,0x6c,0xb9,0xfc,0xab,0x44, // 00005220 |...RgX.#1nSl...D|
+0x94,0x82,0xa5,0x38,0x1e,0xbc,0xe5,0x8a,0x2a,0x8d,0xc5,0x9b,0x98,0xba,0xa7,0xd8, // 00005230 |...8....*.......|
+0xd0,0x00,0x87,0x90,0x66,0xc1,0xd1,0x57,0x6f,0xba,0x46,0xff,0xe1,0x7f,0x9c,0x22, // 00005240 |....f..Wo.F...."|
+0x80,0x85,0x8b,0x7b,0xf1,0xde,0x58,0xb0,0x1d,0x9a,0xfa,0x9a,0x71,0xf7,0x0f,0xca, // 00005250 |...{..X.....q...|
+0xb0,0x59,0xbf,0xb9,0x49,0xde,0x96,0x29,0x61,0xe9,0xe7,0xe6,0xb5,0x8f,0x82,0x9d, // 00005260 |.Y..I..)a.......|
+0xad,0x57,0xf8,0x76,0x80,0xaf,0x18,0xad,0xb3,0x47,0x74,0x3a,0xf5,0x5d,0x55,0x5b, // 00005270 |.W.v.....Gt:.]U[|
+0x0f,0x56,0x66,0x35,0x4d,0xf7,0xe7,0xe6,0xee,0x18,0xdc,0xff,0x90,0x79,0x6c,0xcc, // 00005280 |.Vf5M........yl.|
+0xfe,0xff,0x84,0x29,0xce,0x6d,0x6e,0x7e,0x5b,0xac,0x47,0x24,0xf8,0xc8,0xdf,0x4f, // 00005290 |...).mn~[.G$...O|
+0xae,0xb7,0x89,0x01,0x15,0x8a,0x12,0xa2,0xbb,0x1b,0xd6,0x92,0x7e,0x10,0x0c,0x21, // 000052a0 |............~..!|
+0x46,0x3b,0x22,0x2c,0x73,0x4d,0x7b,0xfa,0x42,0x60,0xac,0x3a,0x36,0xf0,0xd6,0x7f, // 000052b0 |F;",sM{.B`.:6...|
+0xd3,0x84,0x38,0xf8,0xd0,0x31,0x2a,0x56,0x07,0x54,0x7b,0x3d,0x7b,0xb9,0xc0,0xfc, // 000052c0 |..8..1*V.T{={...|
+0x79,0x86,0xe9,0xec,0xde,0x18,0x41,0x5e,0x8f,0x25,0x63,0x2e,0x50,0xaa,0xa7,0x2d, // 000052d0 |y.....A^.%c.P..-|
+0xab,0x75,0xed,0xb4,0xef,0x5c,0xd6,0x73,0xad,0x4f,0x3c,0xdf,0x3b,0x4c,0xd3,0xcd, // 000052e0 |.u...\.s.O<.;L..|
+0x38,0x95,0xb5,0x47,0x0a,0x02,0x0f,0x0f,0x8d,0xd8,0xa4,0x67,0x00,0xa7,0x94,0x8b, // 000052f0 |8..G.......g....|
+0x99,0x5e,0xc2,0x84,0xfe,0x4a,0x02,0xed,0xd2,0x0a,0x53,0x9f,0xdf,0xd9,0x68,0x27, // 00005300 |.^...J....S...h'|
+0x6f,0xfa,0x0b,0x91,0xe6,0x81,0x9e,0x5c,0xe2,0x23,0x8a,0x2a,0x99,0x5a,0xc4,0xc6, // 00005310 |o......\.#.*.Z..|
+0x90,0x1f,0xfa,0xe9,0xf8,0x71,0x58,0xf4,0xb1,0x3c,0x49,0x86,0xb1,0xf6,0x1a,0xf1, // 00005320 |.....qX..<I.....|
+0xa6,0x3a,0xad,0x60,0x1b,0x30,0xa0,0xcb,0x7a,0xd9,0x49,0xdb,0xa4,0x7c,0x20,0x67, // 00005330 |.:.`.0..z.I..| g|
+0xe3,0xa8,0x49,0xd9,0x82,0x0b,0xe8,0x26,0x26,0x05,0x7b,0xf0,0x85,0x54,0x8c,0x78, // 00005340 |..I....&&.{..T.x|
+0xbb,0xa4,0x38,0x3d,0x97,0x18,0xd6,0xa7,0xe9,0xe3,0xd2,0xbe,0x96,0x27,0x97,0x06, // 00005350 |..8=.........'..|
+0x1e,0x62,0xc6,0xe5,0x0b,0x0d,0x5c,0x3b,0x2d,0xe5,0x48,0x05,0xef,0x2e,0x15,0x3c, // 00005360 |.b....\;-.H....<|
+0x24,0x43,0x0f,0x10,0xbb,0x1e,0xf7,0x3f,0x29,0xcd,0x5d,0x94,0x71,0x8c,0x83,0x68, // 00005370 |$C.....?).].q..h|
+0xd5,0xa3,0x72,0xf0,0xf0,0x61,0xd2,0xc3,0x78,0x12,0xf9,0x28,0xbe,0x01,0x01,0x5d, // 00005380 |..r..a..x..(...]|
+0xa9,0x21,0x84,0x36,0xd9,0x89,0x1d,0x84,0x11,0xdc,0x30,0x58,0xa9,0x29,0x3c,0x69, // 00005390 |.!.6......0X.)<i|
+0xe5,0x77,0xb3,0xba,0xac,0x8d,0x61,0xa1,0xdb,0xf8,0x6e,0xed,0x6b,0xb1,0xca,0x33, // 000053a0 |.w....a...n.k..3|
+0x5c,0x4f,0x21,0xd8,0xe7,0xb6,0x66,0x60,0xfa,0x98,0xe3,0x17,0x10,0x7b,0x38,0x0f, // 000053b0 |\O!...f`.....{8.|
+0xdd,0xac,0x46,0x46,0x08,0x52,0xd7,0xac,0xe8,0x5c,0x92,0xd3,0x87,0x6f,0x27,0x8f, // 000053c0 |..FF.R...\...o'.|
+0x05,0xeb,0xb6,0xde,0x2c,0x41,0x4f,0x21,0x1b,0xca,0x83,0x67,0x74,0xb1,0x9e,0x1c, // 000053d0 |....,AO!...gt...|
+0xea,0xbb,0xe2,0x8c,0x73,0xf9,0x1f,0x3e,0x07,0xe3,0x58,0x77,0xf8,0xc7,0x2f,0x7c, // 000053e0 |....s..>..Xw../||
+0x95,0x64,0xfe,0x61,0x22,0xc6,0xab,0x60,0x1d,0x72,0xfd,0xad,0x2a,0x6a,0xce,0x19, // 000053f0 |.d.a"..`.r..*j..|
+0xce,0x3e,0x16,0xf4,0xed,0x83,0x4d,0x03,0x69,0xee,0x4f,0x7d,0x05,0xf0,0x3c,0x60, // 00005400 |.>....M.i.O}..<`|
+0xfc,0x75,0x85,0x10,0xab,0x1c,0x00,0x0c,0x05,0x53,0xe9,0xbb,0x39,0x3d,0xba,0xb1, // 00005410 |.u.......S..9=..|
+0xfb,0x98,0x38,0xb9,0x49,0xde,0xd5,0xac,0xd7,0x07,0x96,0x56,0xa3,0x01,0x81,0x3f, // 00005420 |..8.I......V...?|
+0xcb,0xd5,0xd3,0x85,0xe7,0x4b,0xec,0x0e,0x26,0xcf,0xa2,0xb7,0x28,0xe7,0xd6,0x0c, // 00005430 |.....K..&...(...|
+0x7d,0x6b,0xa8,0x64,0x24,0xbe,0x62,0x76,0x20,0x0c,0x01,0x29,0x61,0x76,0x6f,0x99, // 00005440 |}k.d$.bv ..)avo.|
+0x53,0x98,0x2a,0x91,0xf0,0x42,0xef,0xea,0x76,0x12,0xff,0xc8,0x7a,0x97,0xc3,0xaa, // 00005450 |S.*..B..v...z...|
+0xdb,0x50,0x84,0x3c,0xb7,0x60,0x86,0x85,0xdb,0x97,0xa0,0xed,0x6f,0x5e,0x68,0x81, // 00005460 |.P.<.`......o^h.|
+0x7a,0xa7,0x03,0xbc,0x00,0x9c,0xb2,0x5a,0xe0,0x1a,0x82,0xae,0xf9,0x87,0xfc,0xdb, // 00005470 |z......Z........|
+0x17,0x17,0x7f,0x64,0x6e,0x9d,0x1b,0x6e,0x26,0x8c,0x63,0xb9,0x4e,0x77,0x0b,0xeb, // 00005480 |...dn..n&.c.Nw..|
+0x5a,0xad,0x3f,0xa5,0xd9,0xbe,0x76,0x85,0xb9,0xec,0xd4,0xe9,0xf7,0x70,0x6e,0x1a, // 00005490 |Z.?...v......pn.|
+0x1c,0x29,0x1a,0x35,0x71,0x21,0xa8,0xa4,0x76,0xe9,0xf8,0x25,0x65,0x43,0xf2,0x5f, // 000054a0 |.).5q!..v..%eC._|
+0xa0,0x41,0x5a,0x87,0xe6,0x7d,0x11,0xee,0x4b,0xe0,0x3f,0x43,0x9d,0xe5,0x0c,0xa4, // 000054b0 |.AZ..}..K.?C....|
+0x78,0x53,0x3e,0x19,0x18,0x3c,0xc3,0x01,0x10,0x9e,0x47,0x65,0x8e,0x18,0x5b,0x35, // 000054c0 |xS>..<....Ge..[5|
+0x39,0xdf,0x55,0xed,0x2e,0x8c,0xd4,0x2f,0x60,0xba,0x56,0x63,0x12,0xda,0xde,0xc0, // 000054d0 |9.U..../`.Vc....|
+0xa3,0x67,0x0e,0x61,0xfc,0x92,0x64,0x0f,0x57,0xd3,0xf7,0x45,0xe9,0x03,0x44,0x9b, // 000054e0 |.g.a..d.W..E..D.|
+0xa5,0x45,0x28,0x43,0x1e,0x44,0xbe,0x61,0xbd,0x50,0x33,0x9c,0x57,0x27,0xe0,0x17, // 000054f0 |.E(C.D.a.P3.W'..|
+0x6a,0x99,0xe1,0x42,0x43,0xb9,0x26,0x9f,0x05,0x4f,0x8c,0xe0,0x0c,0xad,0x1b,0xc3, // 00005500 |j..BC.&..O......|
+0xb8,0xc3,0x4e,0xb0,0x7f,0x16,0x09,0xce,0x4c,0x77,0xb3,0xca,0x8a,0xe4,0xd6,0xed, // 00005510 |..N.....Lw......|
+0x63,0xcd,0x87,0x66,0x34,0xeb,0x2b,0xb8,0xb4,0x0e,0x6b,0x7d,0xfd,0x14,0x9b,0xc1, // 00005520 |c..f4.+...k}....|
+0xb6,0x41,0x92,0x62,0x23,0x4e,0xaa,0x67,0xbb,0x6c,0x67,0x0d,0xda,0x8f,0x4d,0x2b, // 00005530 |.A.b#N.g.lg...M+|
+0x20,0x56,0x8a,0x89,0x1b,0xf9,0x95,0x84,0xe5,0x37,0x81,0xb7,0x02,0xbe,0x16,0xd9, // 00005540 | V.......7......|
+0xaf,0x5c,0x3d,0xda,0xeb,0x23,0x0c,0xb7,0xab,0x85,0x0a,0xc0,0x47,0xf9,0x64,0xe2, // 00005550 |.\=..#......G.d.|
+0xf1,0xff,0xe0,0xa1,0xdf,0x44,0x93,0x47,0x41,0x2a,0xbd,0x0e,0x6c,0x3a,0x2f,0x1e, // 00005560 |.....D.GA*..l:/.|
+0x16,0xb2,0x16,0xcf,0xfa,0x61,0x7f,0xe8,0xcd,0xb0,0xc8,0xad,0x60,0x6e,0x7b,0xf7, // 00005570 |.....a......`n{.|
+0x9a,0xe4,0xe5,0x41,0xa4,0x8b,0x9d,0x89,0x5e,0xbb,0xda,0xb7,0x75,0x50,0x4b,0x13, // 00005580 |...A....^...uPK.|
+0x19,0xa7,0x7d,0xb2,0x91,0x5c,0x51,0x50,0xcb,0x5c,0x8a,0xe9,0xb4,0x8a,0xde,0x36, // 00005590 |..}..\QP.\.....6|
+0x72,0x41,0xb2,0xbb,0x84,0x77,0xf4,0x41,0x4d,0x37,0xb2,0x87,0xbb,0x8e,0x98,0xca, // 000055a0 |rA...w.AM7......|
+0xbc,0x8d,0x65,0x96,0xd2,0x28,0xcf,0x0d,0x5b,0xbb,0xb8,0x9c,0x17,0xd8,0x21,0x51, // 000055b0 |..e..(..[.....!Q|
+0x5c,0x53,0xaf,0xbc,0x15,0x69,0xd1,0x9b,0x56,0x83,0xfa,0x86,0x25,0x05,0x7a,0x08, // 000055c0 |\S...i..V...%.z.|
+0x93,0xc7,0x43,0x7f,0xe8,0x31,0xaa,0xae,0x1c,0x8c,0xcc,0x21,0xf0,0xec,0xe0,0xdc, // 000055d0 |..C..1.....!....|
+0xf5,0x3e,0xd3,0xb1,0xf4,0x8a,0x32,0x8f,0x9f,0xb8,0x74,0xcf,0x4f,0xac,0x55,0x4b, // 000055e0 |.>....2...t.O.UK|
+0x34,0xb4,0x2c,0xfe,0x8e,0x20,0xa0,0xe3,0x8c,0x44,0xbe,0x55,0xf0,0xd5,0x09,0x17, // 000055f0 |4.,.. ...D.U....|
+0x7f,0x61,0xfc,0xfb,0xc9,0xa4,0x0c,0x54,0xc3,0x3e,0xf1,0x14,0x90,0x90,0x52,0x7d, // 00005600 |.a.....T.>....R}|
+0x92,0x8a,0x94,0x1c,0xe4,0x1a,0x5a,0x77,0xd9,0x41,0x5c,0xec,0x25,0x92,0x77,0x80, // 00005610 |......Zw.A\.%.w.|
+0xa9,0x5e,0x33,0x0b,0x37,0x94,0xf7,0x52,0x3f,0x17,0x78,0x29,0x3d,0xe4,0x73,0xd4, // 00005620 |.^3.7..R?.x)=.s.|
+0xc3,0xf9,0xbb,0xa3,0x5a,0xcc,0x3a,0xba,0xa3,0xaa,0x9f,0x8f,0x2a,0xcb,0x47,0x7a, // 00005630 |....Z.:.....*.Gz|
+0xb0,0xc9,0xa4,0xe4,0x64,0xc3,0xfa,0x2f,0xdc,0x55,0xcf,0x45,0x56,0x66,0x48,0x95, // 00005640 |....d../.U.EVfH.|
+0xa8,0x9b,0xc3,0x7f,0xde,0x84,0x5f,0xac,0xce,0x79,0x31,0x78,0x43,0xb9,0x61,0x14, // 00005650 |......_..y1xC.a.|
+0x56,0x94,0xe1,0xec,0x23,0x11,0x72,0x2e,0xc0,0xd3,0x3a,0xea,0xea,0x43,0x7e,0xd2, // 00005660 |V...#.r...:..C~.|
+0x92,0xf1,0x15,0x3e,0x52,0xca,0x6e,0xfd,0x77,0x71,0x87,0x09,0xda,0x5d,0x6d,0x34, // 00005670 |...>R.n.wq...]m4|
+0x91,0xb5,0x04,0xe0,0x23,0x04,0x06,0x0b,0xdb,0x11,0x82,0x24,0xb3,0xd8,0x8d,0xf4, // 00005680 |....#......$....|
+0x9e,0xe0,0x19,0x98,0x60,0x72,0x54,0x32,0xf1,0x5d,0xb5,0xfc,0x5c,0xda,0x12,0x16, // 00005690 |....`rT2.]..\...|
+0x46,0xe5,0x19,0x2d,0xee,0xf6,0xa1,0xa8,0xb1,0x16,0x24,0xa2,0x70,0xcd,0x4e,0x46, // 000056a0 |F..-......$.p.NF|
+0x56,0x11,0x75,0x96,0x28,0x52,0xb0,0x95,0xc1,0xbd,0x3c,0x03,0x4d,0xb9,0x0a,0xda, // 000056b0 |V.u.(R....<.M...|
+0xca,0x94,0x58,0x60,0x42,0x22,0xd2,0xbb,0x2e,0xe4,0x88,0xa7,0x3f,0xd2,0x41,0x11, // 000056c0 |..X`B"......?.A.|
+0xce,0x59,0x4e,0xb9,0x7d,0x80,0x87,0x60,0xbf,0xfd,0xf2,0x4c,0xe4,0x55,0x97,0x74, // 000056d0 |.YN.}..`...L.U.t|
+0x4c,0x49,0xcb,0xd2,0x0b,0xa8,0x06,0x06,0x48,0xc4,0x22,0x42,0xa2,0x9d,0x05,0x90, // 000056e0 |LI......H."B....|
+0x11,0x4d,0x2a,0x61,0x91,0xb6,0x94,0x27,0x52,0xa5,0xd3,0x10,0x17,0xee,0xd3,0x36, // 000056f0 |.M*a...'R......6|
+0x72,0xb1,0xb0,0x63,0x39,0x4d,0x4c,0x72,0x1a,0x13,0xf4,0x84,0x2e,0x95,0x52,0x72, // 00005700 |r..c9MLr......Rr|
+0x4c,0x71,0xb1,0xff,0x20,0x6c,0xc8,0x27,0x6f,0x56,0xa7,0x2d,0x50,0x07,0xae,0xfc, // 00005710 |Lq.. l.'oV.-P...|
+0x31,0xe9,0x04,0x6c,0xbc,0x42,0x09,0x78,0x6d,0xf1,0x6f,0x8f,0x07,0xb7,0x9d,0xf1, // 00005720 |1..l.B.xm.o.....|
+0xf0,0xe9,0xf5,0xbf,0x27,0x6e,0xea,0xee,0xba,0xda,0xdc,0xc7,0x2d,0xd0,0x1f,0x22, // 00005730 |....'n......-.."|
+0xc3,0x48,0x65,0x00,0xe4,0xfd,0xe3,0xa4,0x6d,0x42,0xd7,0x86,0xbc,0x89,0xce,0xd8, // 00005740 |.He.....mB......|
+0x21,0x6a,0x3a,0xd2,0xf6,0xb1,0x5f,0x95,0xf3,0x55,0x4e,0x13,0x2f,0xcc,0x09,0x96, // 00005750 |!j:..._..UN./...|
+0x42,0x79,0xd6,0xbc,0x2f,0x6d,0xe9,0x7f,0x9a,0x3e,0x7b,0xfb,0x53,0xcf,0x21,0x99, // 00005760 |By../m...>{.S.!.|
+0x1a,0x73,0xc3,0xb8,0xc0,0x82,0x76,0xa0,0x2e,0xf7,0x18,0x55,0xa6,0x45,0x89,0x48, // 00005770 |.s....v....U.E.H|
+0x74,0xbf,0x8c,0x73,0xb2,0xd1,0xec,0xa3,0x04,0xba,0xbb,0x4a,0x00,0xab,0x68,0x02, // 00005780 |t..s.......J..h.|
+0x92,0x61,0xd5,0xb6,0x3a,0xc9,0x6b,0xab,0xc7,0x65,0x90,0x09,0x68,0xfc,0xa6,0xee, // 00005790 |.a..:.k..e..h...|
+0xb3,0x65,0xa6,0x74,0x1b,0xc4,0x12,0x30,0xd9,0x72,0xa7,0xd1,0x54,0x8a,0x04,0x88, // 000057a0 |.e.t...0.r..T...|
+0x3c,0x35,0x81,0x47,0xd5,0xe2,0xbe,0x6d,0xe8,0x10,0xfb,0xfa,0x50,0x1c,0xc4,0xe8, // 000057b0 |<5.G...m....P...|
+0xaa,0x89,0x3c,0x26,0xaf,0x44,0x5d,0xb3,0xe4,0x03,0xf1,0x8e,0x22,0x93,0xca,0xd9, // 000057c0 |..<&.D]....."...|
+0xd9,0x5b,0x86,0x9a,0x0d,0x46,0xfe,0x7a,0x7c,0xf2,0x83,0xa7,0xcf,0xf0,0x8d,0x7e, // 000057d0 |.[...F.z|......~|
+0xd6,0x0e,0xb2,0xf8,0x96,0xd6,0x7c,0x80,0x88,0x02,0x5b,0x8c,0x24,0xa6,0xe8,0x03, // 000057e0 |......|...[.$...|
+0xcc,0x42,0x1d,0x3f,0xae,0x86,0xdf,0x63,0x2e,0xf1,0x96,0xc3,0x68,0x8f,0x86,0x9e, // 000057f0 |.B.?...c....h...|
+0xd4,0x6d,0x7d,0x9d,0xd9,0xf3,0xcb,0x6d,0x71,0x76,0xf3,0x51,0x07,0x99,0x3b,0x5c, // 00005800 |.m}....mqv.Q..;\|
+0x87,0x9a,0xb6,0x8e,0x1b,0xd4,0x5c,0x78,0x24,0x6a,0x10,0x06,0x17,0x9f,0x4f,0xda, // 00005810 |......\x$j....O.|
+0x2e,0xc1,0x0a,0x73,0x89,0x8e,0xd6,0x0f,0x45,0x0f,0xb9,0x11,0xdb,0x9b,0xb7,0xec, // 00005820 |...s....E.......|
+0xa1,0x77,0xa6,0xfe,0x12,0x93,0x0d,0xd7,0xe8,0x2b,0xc8,0x8e,0xb6,0xec,0x46,0xd3, // 00005830 |.w.......+....F.|
+0xc1,0x04,0xdc,0xe5,0xcb,0xaf,0x81,0xdc,0x22,0xbe,0x87,0xc5,0xbb,0x85,0xbc,0x0e, // 00005840 |........".......|
+0x14,0xf6,0xae,0x76,0xbc,0x72,0x8f,0x2c,0xdd,0x09,0xc3,0xf1,0xde,0xb5,0xa7,0xd2, // 00005850 |...v.r.,........|
+0xa9,0xd9,0x41,0x84,0x36,0x43,0xa2,0x2e,0x4c,0x95,0xf1,0x05,0x81,0xc1,0x53,0xcc, // 00005860 |..A.6C..L.....S.|
+0xa3,0x6f,0x62,0x57,0x2c,0x6a,0x02,0x46,0x16,0x4b,0x3c,0xb3,0x41,0x87,0xaf,0xa9, // 00005870 |.obW,j.F.K<.A...|
+0x85,0xb3,0x71,0xb2,0x06,0x48,0xdf,0x0d,0x7c,0x5b,0x1c,0x84,0x78,0x9f,0x93,0xd5, // 00005880 |..q..H..|[..x...|
+0x2e,0xbd,0x04,0x32,0x02,0x86,0xcb,0x4c,0x4f,0xe6,0xdf,0x98,0x25,0x9c,0x5d,0x73, // 00005890 |...2...LO...%.]s|
+0x3b,0x0c,0xb1,0x13,0xb2,0x94,0xe3,0xd6,0xab,0xff,0x10,0x04,0x42,0xa3,0xfb,0x42, // 000058a0 |;...........B..B|
+0x48,0x24,0x01,0x25,0x8c,0x4a,0xf3,0xfb,0x96,0x50,0x97,0x7e,0xd9,0x97,0x72,0xf1, // 000058b0 |H$.%.J...P.~..r.|
+0x75,0x69,0x9e,0xc9,0xf9,0xeb,0x23,0xae,0xa0,0xf3,0xf2,0x77,0x6c,0xbe,0x80,0xa3, // 000058c0 |ui....#....wl...|
+0x08,0x25,0x71,0xd4,0x64,0x21,0xf8,0x48,0xcf,0xdc,0x84,0xb3,0x12,0x86,0x02,0x19, // 000058d0 |.%q.d!.H........|
+0x7e,0x75,0xda,0x9d,0x8d,0x5f,0xdf,0xbf,0xc0,0x13,0x36,0x17,0x03,0x29,0x38,0x18, // 000058e0 |~u..._....6..)8.|
+0x18,0x57,0xe2,0x10,0xa8,0xe8,0x04,0x0a,0xdc,0x79,0x7e,0x63,0x9e,0xc5,0x30,0xae, // 000058f0 |.W.......y~c..0.|
+0x8b,0xf4,0x02,0xe0,0x03,0xe3,0xc4,0x48,0x87,0xec,0x4e,0x44,0xc4,0xb1,0x3f,0x2e, // 00005900 |.......H..ND..?.|
+0xbb,0x69,0x46,0x84,0xc1,0x38,0x74,0x12,0x21,0xe8,0xfa,0x48,0xca,0xe8,0xb4,0x2f, // 00005910 |.iF..8t.!..H.../|
+0x66,0xe4,0xc1,0xc0,0xcc,0x55,0x9c,0x63,0x45,0x5b,0x26,0x55,0xfa,0x69,0xd2,0xd9, // 00005920 |f....U.cE[&U.i..|
+0x68,0x9d,0x65,0x69,0x3f,0x42,0xc7,0xf7,0x74,0xfb,0xd0,0xd3,0xf4,0x35,0x0b,0xbb, // 00005930 |h.ei?B..t....5..|
+0x66,0x2a,0xe6,0xe1,0x33,0xf8,0x7f,0xd0,0x6b,0x83,0x6b,0x01,0x1d,0xc3,0xa2,0xb7, // 00005940 |f*..3...k.k.....|
+0xf5,0xe0,0xe0,0xbc,0xb2,0x8c,0x29,0x87,0xc0,0x2e,0x9a,0x69,0xc4,0x65,0xaa,0xd4, // 00005950 |......)....i.e..|
+0x49,0x59,0x3f,0xf6,0xe9,0x50,0x23,0xef,0x92,0x25,0xc8,0x3e,0x55,0x5a,0x15,0x21, // 00005960 |IY?..P#..%.>UZ.!|
+0x46,0x72,0xf8,0xfc,0x37,0x46,0x33,0x58,0xfb,0x90,0x04,0x15,0x7c,0xeb,0x29,0x09, // 00005970 |Fr..7F3X....|.).|
+0x88,0x08,0x26,0x31,0x39,0x1a,0xb8,0x15,0x45,0x5c,0x7d,0xe1,0xf8,0x42,0xd1,0x50, // 00005980 |..&19...E\}..B.P|
+0x9e,0xc7,0x60,0x2a,0x01,0xa5,0xa1,0xa1,0x88,0x8b,0xc9,0xd6,0xc1,0x9d,0x11,0x33, // 00005990 |..`*...........3|
+0xf8,0xfc,0x57,0x29,0xd2,0xdd,0xe4,0xd1,0x1e,0x5f,0xa8,0x37,0xf6,0x26,0x0b,0xb4, // 000059a0 |..W)....._.7.&..|
+0x6c,0x71,0x6b,0x90,0x7e,0x9e,0x08,0x01,0x04,0xfa,0x34,0xab,0xa6,0x5e,0x71,0x34, // 000059b0 |lqk.~.....4..^q4|
+0x61,0xc6,0xee,0x37,0x23,0x05,0x2d,0xa5,0x00,0x38,0xc9,0x2e,0xc7,0x73,0x01,0x6a, // 000059c0 |a..7#.-..8...s.j|
+0x9a,0x9f,0x2b,0xc9,0xf4,0x02,0xe1,0xb7,0x4a,0x76,0xbc,0xaf,0x4f,0x1c,0xc6,0x27, // 000059d0 |..+.....Jv..O..'|
+0x93,0x46,0x03,0x62,0xc1,0x76,0x67,0x61,0x40,0x06,0x8d,0xa7,0x80,0xdc,0x19,0x1c, // 000059e0 |.F.b.vga@.......|
+0x80,0x2b,0xd8,0x25,0xed,0xd1,0x23,0x39,0x92,0xa7,0x38,0x05,0x8d,0xf7,0x80,0x43, // 000059f0 |.+.%..#9..8....C|
+0xe5,0x46,0x58,0xe6,0x7a,0x84,0x28,0xdd,0x07,0xbb,0xe1,0x0f,0xf7,0x0e,0x80,0x10, // 00005a00 |.FX.z.(.........|
+0xa0,0x2a,0x24,0x2a,0x1a,0x82,0x1b,0x53,0x6d,0xf5,0xeb,0xc5,0x0d,0xbd,0x32,0x70, // 00005a10 |.*$*...Sm.....2p|
+0x40,0x6d,0xd8,0xe8,0x68,0x5c,0x37,0x44,0xaf,0xed,0x97,0x21,0x1c,0x12,0xd7,0x92, // 00005a20 |@m..h\7D...!....|
+0xe8,0x38,0x3f,0x31,0xfc,0xcd,0x85,0xc8,0xfc,0x8f,0x0d,0x7d,0xb2,0x31,0x0f,0x6a, // 00005a30 |.8?1.......}.1.j|
+0x96,0x65,0x40,0xa0,0xef,0x17,0xb0,0x8c,0xc2,0x08,0x3c,0x29,0x6a,0xe2,0x3a,0x46, // 00005a40 |.e@.......<)j.:F|
+0x08,0x19,0x62,0x51,0xb7,0x58,0xe8,0xc1,0x78,0x78,0xa3,0xfd,0xd2,0x47,0xa2,0x30, // 00005a50 |..bQ.X..xx...G.0|
+0xce,0xc9,0xd6,0xcf,0xc6,0x35,0xca,0xb8,0x89,0x68,0xfa,0xe8,0xbc,0x0d,0xc2,0x08, // 00005a60 |.....5...h......|
+0x0c,0x94,0xd5,0x5c,0x00,0x93,0xee,0x33,0x25,0xe0,0x49,0x3b,0xe7,0x74,0x54,0x9f, // 00005a70 |...\...3%.I;.tT.|
+0x9b,0xae,0x1c,0x57,0x81,0x98,0x47,0x79,0xf4,0x76,0xd7,0x85,0x88,0x30,0xfd,0xec, // 00005a80 |...W..Gy.v...0..|
+0x55,0xa8,0x8d,0xc5,0xa4,0x5c,0x25,0x8e,0xb0,0xa8,0x84,0x5d,0x0c,0x92,0x97,0xd1, // 00005a90 |U....\%....]....|
+0x92,0xbc,0xac,0xc1,0x64,0x00,0x89,0x31,0x75,0x8e,0x58,0x83,0xb2,0x90,0xa4,0x94, // 00005aa0 |....d..1u.X.....|
+0x5c,0x11,0xaa,0xab,0x60,0x59,0x8f,0xc5,0x5b,0x6c,0xa6,0xc1,0x51,0x1a,0x33,0xe4, // 00005ab0 |\...`Y..[l..Q.3.|
+0x90,0x15,0x0b,0x8f,0xab,0x24,0x66,0x27,0x8c,0x65,0x50,0x81,0x5c,0xb3,0xbf,0xc9, // 00005ac0 |.....$f'.eP.\...|
+0x81,0xbe,0x06,0x3c,0x25,0x91,0x46,0x85,0x19,0xd9,0xfd,0xbc,0x69,0xb8,0xa7,0x74, // 00005ad0 |...<%.F.....i..t|
+0x2e,0xe6,0x2c,0x38,0x84,0x23,0x65,0xc9,0x7c,0xc4,0x40,0x00,0xbb,0xfd,0x94,0x63, // 00005ae0 |..,8.#e.|.@....c|
+0x8a,0xde,0x4d,0x33,0xea,0xc4,0x04,0x3e,0xb2,0xb7,0x80,0xf3,0x5c,0x20,0x8e,0xd0, // 00005af0 |..M3...>....\ ..|
+0x26,0x8c,0xce,0x16,0x72,0x53,0xeb,0xca,0xb5,0x2f,0xf7,0x95,0x08,0x99,0x19,0xc4, // 00005b00 |&...rS.../......|
+0x1f,0xd0,0xb0,0x03,0x24,0x30,0xc2,0xff,0x7f,0xb7,0x50,0xcd,0x0a,0x84,0xce,0x81, // 00005b10 |....$0....P.....|
+0x5f,0xee,0xb4,0x5f,0x5c,0x35,0xce,0x1b,0xb4,0x79,0x23,0x12,0x03,0x02,0xcb,0x5c, // 00005b20 |_.._\5...y#....\|
+0x8a,0xb5,0x09,0x44,0x0a,0x58,0x27,0x9d,0x6e,0x73,0x5d,0xea,0x28,0x84,0xf6,0x73, // 00005b30 |...D.X'.ns].(..s|
+0xf7,0xd8,0x31,0x1c,0xea,0xa1,0xc6,0x5b,0x09,0xd4,0xce,0x1f,0x8a,0xbb,0xe7,0x82, // 00005b40 |..1....[........|
+0x21,0x21,0x38,0x77,0x05,0x20,0x1c,0xa9,0xff,0x70,0xd6,0x91,0xd3,0xc2,0x4d,0x11, // 00005b50 |!!8w. ...p....M.|
+0x16,0xea,0xda,0xd3,0x8b,0xe1,0xef,0x53,0x47,0x65,0x80,0xdc,0xbf,0x52,0x4f,0xbb, // 00005b60 |.......SGe...RO.|
+0x15,0xf7,0xf1,0x14,0xfd,0x05,0xe2,0xf5,0xb6,0x51,0xb3,0x78,0x5b,0x66,0x4d,0xab, // 00005b70 |.........Q.x[fM.|
+0x3f,0xcf,0x42,0x46,0x26,0xe4,0xd9,0xbe,0x90,0xa8,0xd7,0x0c,0x17,0x83,0xbe,0xc4, // 00005b80 |?.BF&...........|
+0x32,0x89,0x3b,0xd4,0xa0,0x59,0x19,0xb8,0x13,0x24,0xa0,0xa1,0x36,0xc9,0x04,0x7d, // 00005b90 |2.;..Y...$..6..}|
+0x17,0x25,0xff,0xc3,0x84,0xbf,0x81,0x22,0x0b,0x33,0x1d,0xbb,0x46,0x03,0x0a,0x37, // 00005ba0 |.%.....".3..F..7|
+0x26,0x34,0xf8,0xa3,0xfe,0x1e,0x9b,0xce,0x25,0x90,0x81,0x10,0xbd,0xe7,0xbb,0x2a, // 00005bb0 |&4......%......*|
+0x15,0x23,0x5c,0xdf,0x1f,0xe0,0x53,0x35,0x84,0xc2,0x4d,0x58,0x79,0xc5,0x65,0x8d, // 00005bc0 |.#\...S5..MXy.e.|
+0x9b,0x8d,0x31,0xae,0xc1,0xce,0x13,0xc3,0xf4,0x01,0x72,0x58,0xb0,0xa8,0x2d,0xea, // 00005bd0 |..1.......rX..-.|
+0x24,0x07,0xba,0x66,0xca,0x43,0xc7,0x0c,0x91,0xc1,0xce,0xf1,0x80,0xfd,0xe0,0x11, // 00005be0 |$..f.C..........|
+0x80,0x1f,0xe5,0xe8,0x78,0xe7,0xd3,0x11,0xff,0x9e,0xc9,0x9a,0x16,0xda,0xc5,0x7d, // 00005bf0 |....x..........}|
+0xba,0x11,0xca,0x2e,0x4b,0x20,0x25,0xdd,0x4b,0x3a,0xfc,0xe7,0xe7,0x60,0xb0,0x74, // 00005c00 |....K %.K:...`.t|
+0x02,0xc9,0xc5,0x30,0xf8,0x8d,0x4f,0x78,0x1b,0xd3,0x9f,0x21,0x47,0xa5,0x28,0x30, // 00005c10 |...0..Ox...!G.(0|
+0x09,0xa9,0xc6,0x94,0x9a,0xb6,0xea,0x7a,0x56,0x12,0x15,0x96,0x2d,0x5c,0x7b,0x2b, // 00005c20 |.......zV...-\{+|
+0xb8,0xc6,0x7b,0xf7,0x46,0x8c,0xdf,0x62,0x46,0x9e,0x00,0xa8,0xe4,0x31,0x23,0x68, // 00005c30 |..{.F..bF....1#h|
+0xf4,0x96,0x2f,0x78,0x8f,0x7b,0x43,0xa7,0x8b,0xb3,0x3b,0x95,0x57,0xe6,0xd1,0xbe, // 00005c40 |../x.{C...;.W...|
+0xbf,0xf5,0x38,0xb3,0x36,0xe9,0x36,0x66,0x7b,0x99,0x5e,0x35,0x95,0x4a,0x22,0x5e, // 00005c50 |..8.6.6f{.^5.J"^|
+0x3f,0x06,0x5d,0x15,0xa5,0x9b,0xd0,0xb8,0x36,0x15,0x9a,0x78,0xc2,0x41,0xc3,0xa3, // 00005c60 |?.].....6..x.A..|
+0xde,0x78,0xad,0xc4,0x68,0xda,0xf9,0xb0,0x39,0xf2,0x43,0x64,0xb9,0x0d,0x25,0x0d, // 00005c70 |.x..h...9.Cd..%.|
+0x09,0x14,0xe0,0x7b,0x9e,0xab,0xfb,0x27,0x6c,0x28,0xd7,0x21,0x09,0x2c,0xf4,0x2a, // 00005c80 |...{...'l(.!.,.*|
+0x4f,0x54,0xbc,0x1e,0xb8,0x91,0x47,0x21,0xe4,0x3a,0xea,0x86,0x36,0xed,0x9c,0x8d, // 00005c90 |OT....G!.:..6...|
+0x91,0x16,0x48,0xb3,0x72,0x36,0xc0,0xaa,0x94,0x1b,0xe6,0x26,0x0d,0xd7,0x79,0x58, // 00005ca0 |..H.r6.....&..yX|
+0x19,0x91,0x79,0xec,0xc7,0xf6,0x2b,0x7f,0x86,0x81,0xf5,0x48,0xcd,0x58,0x6d,0xd4, // 00005cb0 |..y...+....H.Xm.|
+0x69,0x5e,0x77,0x5d,0x3b,0x31,0xcd,0xac,0xd2,0x97,0x45,0x3d,0x80,0xd4,0xd9,0xc4, // 00005cc0 |i^w];1....E=....|
+0x2e,0xc4,0xdd,0xe5,0x98,0x17,0xec,0xc1,0x1a,0x52,0x9a,0xee,0x9c,0x37,0x77,0x4f, // 00005cd0 |.........R...7wO|
+0x6a,0x90,0xaf,0x6d,0x4b,0xdb,0x46,0xf8,0x93,0x3b,0x5b,0xaf,0xd9,0xc8,0xc2,0x07, // 00005ce0 |j..mK.F..;[.....|
+0xdb,0xc8,0xfc,0x84,0x9c,0x05,0xbc,0xca,0x29,0xeb,0x80,0x7a,0xaf,0x5a,0x49,0xa1, // 00005cf0 |........)..z.ZI.|
+0x51,0xbd,0x7c,0x6b,0xfa,0xb7,0xa9,0x66,0xf6,0x7b,0x52,0x35,0xf8,0x90,0x68,0xc2, // 00005d00 |Q.|k...f.{R5..h.|
+0x9f,0xd2,0x71,0xf2,0x3a,0x29,0x11,0xca,0xbe,0x28,0xe9,0x25,0xde,0xd0,0x2a,0xf3, // 00005d10 |..q.:)...(.%..*.|
+0xf8,0x38,0x55,0xe5,0x60,0xc2,0xf7,0x7f,0x2f,0x08,0x8f,0xf8,0x45,0xf7,0x1d,0x2c, // 00005d20 |.8U.`.../...E..,|
+0x5b,0x7f,0x17,0xb2,0x35,0xf5,0xa8,0x39,0x17,0xc1,0x7d,0xe0,0xc1,0x43,0x83,0x58, // 00005d30 |[...5..9..}..C.X|
+0xd0,0x41,0xe1,0x4b,0xa4,0xa2,0xfd,0xb5,0xd1,0xab,0xfb,0x16,0x20,0xa9,0xb9,0x23, // 00005d40 |.A.K........ ..#|
+0xc1,0xbc,0xd6,0x66,0x8b,0xae,0x65,0xcf,0xaa,0x81,0x4c,0xba,0xe5,0x4b,0x21,0x7c, // 00005d50 |...f..e...L..K!||
+0x9e,0xcd,0x96,0x03,0x73,0xb4,0x55,0x7b,0x30,0x3e,0x88,0x86,0x31,0x8a,0xaf,0x99, // 00005d60 |....s.U{0>..1...|
+0x45,0x6c,0x44,0xba,0x1a,0x9f,0x07,0xe8,0xe5,0x44,0x1c,0x00,0x8c,0xc7,0xe0,0x4a, // 00005d70 |ElD......D.....J|
+0xe8,0xbd,0x9d,0x1f,0x33,0x97,0xb0,0xe5,0x62,0x82,0x85,0x14,0x20,0xe5,0x9f,0x65, // 00005d80 |....3...b... ..e|
+0x14,0xf8,0xd8,0x3c,0x83,0x87,0xb4,0x32,0xc4,0xc5,0x6c,0x0d,0xe0,0x42,0xd2,0x58, // 00005d90 |...<...2..l..B.X|
+0x18,0x13,0x57,0xfa,0x34,0x19,0x95,0x75,0x1b,0x73,0x39,0xc8,0x0a,0x83,0x20,0x17, // 00005da0 |..W.4..u.s9... .|
+0x9d,0x4a,0x7a,0x13,0x89,0x22,0xf3,0xfd,0xe8,0x88,0x45,0x26,0x7f,0x83,0x36,0xe2, // 00005db0 |.Jz.."....E&..6.|
+0xaf,0x99,0xcf,0xd2,0xec,0x32,0xab,0x41,0xe0,0x74,0xa4,0xd7,0x8c,0xc3,0x6b,0x77, // 00005dc0 |.....2.A.t....kw|
+0x38,0x5c,0x89,0x88,0x5d,0xe7,0x2e,0x9b,0xc6,0x49,0xad,0x92,0xc3,0x24,0x39,0xa5, // 00005dd0 |8\..]....I...$9.|
+0x4f,0xc5,0x11,0xcf,0x01,0xa6,0xb9,0xb8,0x9b,0x02,0x14,0x11,0x0b,0xc5,0x1c,0x92, // 00005de0 |O...............|
+0x1d,0xb2,0x2b,0x38,0x32,0x17,0xff,0x5f,0xb2,0xe8,0xa1,0x83,0xff,0x38,0xb2,0xcc, // 00005df0 |..+82.._.....8..|
+0x5b,0x4a,0xb4,0xec,0xea,0xbe,0x01,0xdf,0xfa,0x66,0xb8,0x33,0x33,0x05,0xa7,0xa2, // 00005e00 |[J.......f.33...|
+0xcd,0xbc,0x57,0xd7,0x03,0x68,0x5d,0x51,0x23,0xb2,0x62,0x8e,0x52,0x44,0x30,0xb3, // 00005e10 |..W..h]Q#.b.RD0.|
+0xff,0x7a,0x37,0xa8,0x43,0x10,0xeb,0xc9,0x19,0xeb,0x7d,0x96,0x5b,0x8d,0x64,0x47, // 00005e20 |.z7.C.....}.[.dG|
+0x58,0xde,0x57,0xd0,0x83,0xdd,0xa6,0x7f,0x78,0xb1,0x1b,0xb2,0xb0,0xfd,0x24,0x74, // 00005e30 |X.W.....x.....$t|
+0x1b,0x50,0xbc,0x7a,0xed,0x61,0xc4,0x29,0x56,0x2d,0x2b,0x95,0x92,0xe7,0x5f,0xd2, // 00005e40 |.P.z.a.)V-+..._.|
+0x19,0xc6,0x4a,0x7a,0x14,0x66,0xb7,0xf4,0xdb,0x56,0x3d,0xa7,0x65,0xbf,0x8c,0x8f, // 00005e50 |..Jz.f...V=.e...|
+0x11,0xdb,0xce,0xda,0x4c,0x94,0xba,0xab,0xaf,0xd4,0x7c,0xe9,0x98,0x82,0x37,0x12, // 00005e60 |....L.....|...7.|
+0xf5,0xd8,0xd5,0xb8,0x54,0x1b,0xd7,0x0a,0x0c,0x32,0x2c,0x28,0xeb,0x86,0x94,0x1e, // 00005e70 |....T....2,(....|
+0x04,0x41,0x83,0x61,0xbc,0x6c,0xde,0xfd,0xe9,0x3b,0xe1,0x82,0x72,0x60,0x3d,0x63, // 00005e80 |.A.a.l...;..r`=c|
+0x17,0xac,0x13,0xd9,0x57,0xe9,0xd5,0x6e,0x3c,0x86,0x53,0xc4,0x25,0x03,0x77,0x23, // 00005e90 |....W..n<.S.%.w#|
+0x9e,0x60,0x26,0x93,0xf2,0x56,0xfc,0x1e,0x54,0x4d,0xc9,0x15,0x4e,0x84,0x56,0xc5, // 00005ea0 |.`&..V..TM..N.V.|
+0x06,0x31,0xf5,0x25,0xda,0x9c,0x73,0x93,0x81,0xe3,0x10,0xcb,0x18,0xad,0xf8,0xb4, // 00005eb0 |.1.%..s.........|
+0x17,0x8a,0x10,0xff,0xfd,0xad,0x1c,0x33,0xbf,0xf7,0xf9,0x99,0xed,0x44,0x39,0x43, // 00005ec0 |.......3.....D9C|
+0xb3,0x7d,0xa9,0x23,0x9f,0x80,0x5e,0x60,0xb5,0x4d,0xeb,0x80,0xfa,0x70,0x8f,0xc2, // 00005ed0 |.}.#..^`.M...p..|
+0xcc,0xda,0x6d,0x4e,0x3c,0x6a,0xe7,0x5b,0x46,0x4b,0xf0,0x99,0x26,0xe3,0xda,0xdf, // 00005ee0 |..mN<j.[FK..&...|
+0xd4,0x25,0x67,0xf9,0xe5,0x57,0x32,0xe5,0x59,0x46,0x83,0x6a,0xba,0x24,0x59,0xea, // 00005ef0 |.%g..W2.YF.j.$Y.|
+0x9a,0x33,0xe6,0x2f,0x36,0x89,0x63,0xfe,0x36,0xd1,0x0c,0x44,0xae,0xc6,0x9e,0xf3, // 00005f00 |.3./6.c.6..D....|
+0x91,0x0b,0x7f,0x65,0xa1,0x5d,0x71,0xd4,0xa6,0x11,0xfa,0x5b,0x7e,0x6f,0xfc,0x6d, // 00005f10 |...e.]q....[~o.m|
+0x39,0x7c,0x70,0x44,0x02,0x0b,0x57,0x94,0x38,0x4a,0xd0,0x3a,0x03,0xdc,0x43,0x38, // 00005f20 |9|pD..W.8J.:..C8|
+0x04,0x1d,0x53,0xb2,0xd8,0x0e,0xc5,0xee,0xa0,0x16,0xcc,0xc9,0x1a,0x3e,0x68,0xf1, // 00005f30 |..S..........>h.|
+0x8a,0x85,0x5d,0x82,0x1b,0x08,0xc5,0xac,0x65,0xa9,0x25,0x81,0xa7,0xae,0xcd,0x36, // 00005f40 |..].....e.%....6|
+0xf4,0x2f,0x4d,0xd1,0x8f,0xf7,0x90,0xab,0x47,0x20,0xe8,0x32,0x40,0x1f,0xd2,0x92, // 00005f50 |./M.....G .2@...|
+0xca,0x03,0x3b,0x1c,0xa9,0x1e,0x25,0xcc,0x8e,0x64,0xc1,0x66,0xb7,0x7d,0xa5,0xf6, // 00005f60 |..;...%..d.f.}..|
+0xf1,0xbd,0x3a,0xf7,0x17,0x0c,0xa3,0x6d,0xa4,0xa6,0x85,0xb1,0xec,0x89,0x7d,0x5f, // 00005f70 |..:....m......}_|
+0x97,0x7f,0x26,0x56,0x17,0xaf,0xc9,0x3e,0x01,0x6f,0x2a,0x51,0x22,0x2a,0x33,0x4c, // 00005f80 |..&V...>.o*Q"*3L|
+0x0a,0x7f,0xcb,0x83,0x9f,0x64,0x52,0x37,0xa3,0x3d,0x1a,0xd2,0xed,0x90,0x69,0xa1, // 00005f90 |.....dR7.=....i.|
+0xd5,0xe1,0x79,0x27,0x3c,0xbb,0xdd,0xc5,0xd6,0x9a,0x34,0x9e,0x65,0x94,0x0d,0x64, // 00005fa0 |..y'<.....4.e..d|
+0xc5,0x45,0x21,0xce,0x5e,0x72,0xfe,0x70,0x15,0x90,0xae,0x0b,0xa2,0x33,0xcf,0x57, // 00005fb0 |.E!.^r.p.....3.W|
+0xbb,0x0a,0x95,0x9f,0x1f,0x63,0x7d,0xc7,0x05,0xd3,0x2d,0x76,0x96,0x80,0xa7,0x0b, // 00005fc0 |.....c}...-v....|
+0x48,0x11,0xb4,0xab,0x83,0x7a,0x8d,0x85,0x92,0x5d,0xd1,0xe2,0x21,0xc4,0xd3,0x0c, // 00005fd0 |H....z...]..!...|
+0x69,0x96,0x31,0xfd,0xb3,0xaa,0xde,0xf6,0xe8,0xd2,0x9b,0xda,0x9c,0xba,0xc8,0xfe, // 00005fe0 |i.1.............|
+0x5f,0x8e,0x33,0x35,0x1c,0xae,0x5a,0x4e,0xc3,0x9d,0x10,0x89,0x9d,0x6d,0xf1,0xce, // 00005ff0 |_.35..ZN.....m..|
+0xae,0x5c,0x0b,0xbf,0xfd,0xa5,0x61,0xb6,0x19,0x59,0x8e,0xe3,0x92,0x19,0x62,0xd9, // 00006000 |.\....a..Y....b.|
+0x6d,0x4f,0xd5,0x0f,0x56,0x05,0xba,0xc3,0x11,0x99,0x3a,0x01,0xa3,0x55,0x37,0xb1, // 00006010 |mO..V.....:..U7.|
+0x7f,0x66,0xc9,0x93,0xe6,0xf3,0x25,0x70,0x13,0x0f,0xfa,0xf7,0x81,0x18,0xd1,0x16, // 00006020 |.f....%p........|
+0xcd,0x5b,0x36,0xa5,0xdc,0x15,0x0b,0x6a,0x13,0x79,0x4f,0xc5,0xca,0x44,0xfb,0x2c, // 00006030 |.[6....j.yO..D.,|
+0xf8,0x42,0x05,0x24,0x6c,0xa0,0x9c,0x73,0x3f,0x2a,0x92,0xe2,0xff,0xa7,0xcf,0x06, // 00006040 |.B.$l..s?*......|
+0xb4,0xc1,0xcb,0x1f,0x2d,0x34,0x99,0xdc,0x63,0x82,0xc4,0xa7,0x26,0xb4,0xa6,0x1d, // 00006050 |....-4..c...&...|
+0x3b,0x92,0x4f,0x87,0x0b,0xb8,0xa1,0x37,0x90,0xe2,0x48,0xfe,0xd4,0x54,0x1d,0x84, // 00006060 |;.O....7..H..T..|
+0x69,0xe5,0x3b,0xc0,0x59,0xb7,0xc5,0xef,0xc5,0x20,0x90,0x1b,0x12,0xc2,0x07,0x95, // 00006070 |i.;.Y.... ......|
+0x89,0x50,0xf4,0x41,0x5b,0x18,0x60,0xa7,0xf6,0x80,0x26,0x08,0x37,0x21,0x9f,0xdc, // 00006080 |.P.A[.`...&.7!..|
+0x33,0x2a,0xed,0xc4,0x60,0xc8,0x40,0x20,0x1d,0xcf,0x4b,0xf1,0x9f,0xaf,0x08,0x00, // 00006090 |3*..`.@ ..K.....|
+0x6a,0x09,0xf3,0x10,0x21,0x0b,0x9f,0x6f,0xa1,0x0e,0x63,0x64,0x16,0x34,0x94,0x0c, // 000060a0 |j...!..o..cd.4..|
+0xeb,0x04,0xfb,0x19,0xc4,0x7d,0x06,0x31,0x52,0x42,0xd6,0xeb,0x43,0xd8,0xf9,0xf9, // 000060b0 |.....}.1RB..C...|
+0x2f,0x01,0x3b,0x0e,0x91,0x52,0x16,0x03,0x8a,0x00,0xc3,0x24,0x53,0x3e,0x65,0x59, // 000060c0 |/.;..R.....$S>eY|
+0xfc,0x5b,0x08,0x57,0x29,0x26,0xae,0x08,0xa1,0xef,0xe3,0xc0,0x8d,0xdc,0x5a,0xb8, // 000060d0 |.[.W)&........Z.|
+0xea,0x31,0x60,0xdd,0x20,0xde,0x83,0x33,0xa2,0xe6,0x77,0xae,0xf9,0xea,0x16,0xc9, // 000060e0 |.1`. ..3..w.....|
+0xfa,0xd4,0xc4,0xb4,0xcb,0x0d,0xbb,0x75,0x79,0x20,0x54,0xe2,0xef,0x3c,0xbc,0xdb, // 000060f0 |.......uy T..<..|
+0xee,0x13,0xd6,0x46,0x58,0x6d,0xe7,0xbf,0x56,0xb0,0x0b,0xaa,0x39,0xa2,0x1b,0x01, // 00006100 |...FXm..V...9...|
+0x82,0x37,0xb7,0xf0,0xd8,0xdc,0xe1,0xd8,0x0b,0x5d,0xa7,0x9a,0x08,0x6f,0x4c,0xed, // 00006110 |.7.......]...oL.|
+0x95,0x62,0xc4,0x5d,0xd7,0x0e,0xfc,0xc1,0xa3,0x7c,0x76,0x95,0x15,0xe0,0x22,0xc9, // 00006120 |.b.].....|v...".|
+0xa5,0x67,0x5d,0xfc,0x5e,0xc5,0x95,0x5f,0x65,0xfb,0x57,0x0f,0x71,0x8e,0x3a,0x41, // 00006130 |.g].^.._e.W.q.:A|
+0x03,0xc2,0x8c,0xe4,0x42,0xe1,0xc3,0x9d,0x7e,0xcb,0xc3,0x6f,0x21,0x4c,0x96,0xef, // 00006140 |....B...~..o!L..|
+0xb3,0x0d,0x86,0x5d,0x68,0x6c,0x96,0xc8,0x8c,0x82,0x32,0x1a,0x5f,0xcf,0x71,0x3c, // 00006150 |...]hl....2._.q<|
+0x94,0x7f,0x3a,0xbd,0xee,0xa1,0x01,0x48,0x27,0xcc,0x5a,0x62,0xba,0x4d,0x70,0xa5, // 00006160 |..:....H'.Zb.Mp.|
+0x79,0x5a,0x28,0x9f,0xef,0x6a,0x31,0x0d,0x6a,0x31,0xb7,0x39,0xd1,0x4b,0xe2,0x4c, // 00006170 |yZ(..j1.j1.9.K.L|
+0x5d,0xe8,0x87,0xfd,0xfe,0x4e,0x49,0x35,0x0d,0x04,0x1f,0xdd,0x55,0x95,0x50,0xdd, // 00006180 |]....NI5....U.P.|
+0xdd,0xdd,0x4a,0x9a,0xbf,0xa1,0xf2,0xb6,0x54,0x97,0xc2,0x01,0x25,0xe1,0x4a,0x31, // 00006190 |..J.....T...%.J1|
+0xb8,0x46,0x15,0x61,0x4e,0x55,0x94,0xca,0x18,0xc7,0x14,0x20,0x21,0x22,0xae,0xd3, // 000061a0 |.F.aNU..... !"..|
+0x85,0x04,0x93,0xdc,0x95,0xe3,0xec,0xb8,0xd4,0xa1,0x7e,0x95,0xf2,0xa3,0x3e,0x85, // 000061b0 |..........~...>.|
+0xf6,0x86,0x7f,0x83,0x6d,0x51,0x14,0x0d,0xde,0x59,0x59,0x7a,0xf7,0x71,0xd3,0x8a, // 000061c0 |....mQ...YYz.q..|
+0x26,0xbe,0xeb,0x07,0x2f,0x0c,0x00,0xfb,0x45,0x87,0x0a,0xca,0xa8,0x35,0xdd,0xb1, // 000061d0 |&.../...E....5..|
+0xf2,0xf7,0xa1,0xc2,0x70,0xcb,0x83,0x91,0xac,0x43,0xa6,0xf6,0xab,0x53,0x91,0x4b, // 000061e0 |....p....C...S.K|
+0x6e,0x15,0x84,0xe0,0x7c,0xd7,0xc8,0x61,0x25,0x1f,0x06,0x15,0x51,0x85,0x55,0x53, // 000061f0 |n...|..a%...Q.US|
+0x00,0xbc,0xbf,0x02,0x37,0xfe,0x17,0xf2,0x61,0x5b,0x69,0xc2,0x29,0xfc,0x77,0xe5, // 00006200 |....7...a[i.).w.|
+0x4a,0x46,0x3d,0x49,0x06,0xa1,0xfe,0xea,0x7d,0xa0,0x23,0xcf,0xeb,0xc0,0xaf,0x8e, // 00006210 |JF=I....}.#.....|
+0x56,0x51,0x88,0x9b,0xca,0x0e,0xad,0x2d,0xbc,0x6a,0xc0,0xb4,0x16,0x95,0x45,0x87, // 00006220 |VQ.....-.j....E.|
+0x87,0x66,0x4e,0x07,0xd5,0x1a,0xf8,0x2f,0xbd,0xa3,0x57,0x2c,0x5f,0x04,0xaf,0xed, // 00006230 |.fN..../..W,_...|
+0xd1,0xbd,0x21,0xb6,0x68,0xb1,0x38,0x88,0x25,0x91,0x95,0x3e,0x70,0xe3,0x72,0x19, // 00006240 |..!.h.8.%..>p.r.|
+0x54,0x2d,0xb8,0x37,0xc7,0x6a,0xcf,0x8f,0x12,0xee,0xe7,0xa9,0xb8,0x27,0xd1,0x79, // 00006250 |T-.7.j.......'.y|
+0xa8,0x3a,0xd5,0x2f,0xe9,0x2f,0xd0,0x9c,0x3e,0xc6,0x23,0x13,0xf8,0x9c,0x17,0xed, // 00006260 |.:././..>.#.....|
+0xe7,0x5f,0x4f,0xce,0x5d,0x83,0x59,0xcf,0x13,0x63,0x2b,0xca,0x87,0xdc,0x0e,0x7b, // 00006270 |._O.].Y..c+....{|
+0x23,0x71,0xa7,0xbe,0xfd,0x46,0xe5,0x25,0xb0,0x60,0x40,0xeb,0x43,0x29,0x3e,0x24, // 00006280 |#q...F.%.`@.C)>$|
+0x56,0x07,0x6d,0x1b,0x5f,0x86,0xd9,0xf7,0x1e,0xb8,0x85,0xd2,0xe9,0x35,0x0d,0xb1, // 00006290 |V.m._........5..|
+0xe7,0xdc,0xfb,0x9e,0x20,0x04,0xf0,0xc7,0x3e,0xf3,0x51,0xf7,0xa3,0x2a,0xe5,0x1f, // 000062a0 |.... ...>.Q..*..|
+0x70,0x84,0x4c,0x8f,0x38,0xbc,0x31,0x73,0x15,0x07,0xd3,0x83,0xd1,0xd3,0xdb,0x36, // 000062b0 |p.L.8.1s.......6|
+0xaa,0xa4,0xde,0xdb,0x7b,0xf5,0x1e,0x0b,0xf2,0x23,0x4e,0x0c,0x4d,0xaa,0x8a,0xd2, // 000062c0 |....{....#N.M...|
+0x64,0x8f,0xdf,0x7e,0xc0,0x2f,0xad,0xbb,0xf6,0x9b,0x3f,0x08,0x9b,0x91,0x2c,0xbb, // 000062d0 |d..~./....?...,.|
+0x2a,0x15,0x49,0x23,0x81,0x7f,0x7f,0x2f,0x3b,0xb0,0xc5,0xad,0x3d,0xa9,0xd3,0xe7, // 000062e0 |*.I#.../;...=...|
+0xd6,0xff,0x61,0xab,0xc7,0x75,0xf3,0x63,0x2a,0x30,0x00,0x12,0x4b,0xf0,0xb1,0xd4, // 000062f0 |..a..u.c*0..K...|
+0x72,0x44,0x8e,0xfe,0x55,0x7f,0x56,0xf1,0x18,0xe9,0xa5,0x56,0xdf,0x9d,0x5d,0xfb, // 00006300 |rD..U.V....V..].|
+0x32,0x84,0x4b,0x59,0x6c,0x9b,0x34,0xbd,0x71,0xbc,0x08,0xbe,0xe9,0x59,0x25,0xe5, // 00006310 |2.KYl.4.q....Y%.|
+0x51,0xcb,0xac,0xed,0x9a,0xe2,0x76,0xff,0x8e,0x7e,0x7f,0xe5,0x9d,0x6a,0x53,0x2a, // 00006320 |Q.....v..~...jS*|
+0x92,0x3b,0xc3,0x5c,0xd6,0x5c,0x77,0x1c,0x96,0x14,0x15,0x92,0xce,0x13,0x00,0x30, // 00006330 |.;.\.\w........0|
+0x3d,0xa6,0xca,0x63,0xe6,0x4b,0x57,0x9d,0x85,0x16,0x80,0x4f,0x4a,0x3c,0xf3,0x83, // 00006340 |=..c.KW....OJ<..|
+0x79,0x32,0xbb,0x12,0xed,0xa8,0x08,0x45,0x3a,0xde,0x25,0x29,0x9a,0xa1,0x54,0xad, // 00006350 |y2.....E:.%)..T.|
+0xef,0x85,0x48,0x59,0x4f,0x3e,0xd1,0xd9,0xb0,0x9a,0x48,0x6a,0xba,0x55,0xd5,0xe4, // 00006360 |..HYO>....Hj.U..|
+0x8d,0x15,0x4c,0xea,0x83,0xf0,0x99,0x27,0x84,0x5f,0x07,0xc3,0x51,0x5e,0x65,0x10, // 00006370 |..L....'._..Q^e.|
+0xb5,0x57,0x20,0x0b,0xcb,0xc5,0x18,0x6c,0x6b,0xb2,0x41,0x3a,0x23,0x75,0x46,0xc9, // 00006380 |.W ....lk.A:#uF.|
+0xd8,0xfc,0xa8,0x1a,0x27,0x6b,0x99,0x65,0x44,0x57,0x28,0xdd,0xdb,0xcc,0x5d,0x37, // 00006390 |....'k.eDW(...]7|
+0x47,0x19,0xbe,0xcf,0x3e,0x9c,0x3d,0x57,0x3f,0xcf,0x29,0xe1,0xe0,0x63,0x54,0x93, // 000063a0 |G...>.=W?.)..cT.|
+0xc8,0x62,0x0c,0x77,0xe1,0x36,0xe7,0x27,0x1a,0x90,0xeb,0x58,0x57,0xb9,0xe7,0x43, // 000063b0 |.b.w.6.'...XW..C|
+0x51,0xdb,0x8b,0x0b,0x51,0xcf,0x23,0xdc,0x3b,0x4a,0x36,0x64,0xd4,0xb7,0x27,0x79, // 000063c0 |Q...Q.#.;J6d..'y|
+0x68,0x8d,0x8a,0x77,0x3c,0xe6,0xe1,0x04,0x12,0x19,0x4d,0xd8,0x01,0x35,0x73,0xea, // 000063d0 |h..w<.....M..5s.|
+0xdb,0xf3,0x60,0xe9,0x16,0x4f,0x4f,0x43,0x15,0xcc,0xc6,0x42,0x8a,0x93,0xf6,0xdb, // 000063e0 |..`..OOC...B....|
+0xb6,0xb3,0x3e,0x32,0xfb,0xcd,0x16,0x39,0x29,0x4d,0xbb,0xc0,0xa8,0xd7,0x3e,0x17, // 000063f0 |..>2...9)M....>.|
+0xd7,0x4d,0xfd,0x46,0xe2,0xcd,0x16,0x4d,0x84,0x42,0x61,0xe4,0xab,0x03,0x60,0x23, // 00006400 |.M.F...M.Ba...`#|
+0x55,0x48,0x5b,0xac,0xf7,0xd5,0x31,0x8f,0xf6,0x1e,0xdd,0xa1,0x81,0x3b,0x9c,0x32, // 00006410 |UH[...1......;.2|
+0x45,0x77,0xf7,0x2d,0x48,0x09,0xf7,0xbf,0xa1,0x8e,0x9a,0x5c,0x55,0xde,0x7c,0xc1, // 00006420 |Ew.-H......\U.|.|
+0x05,0x57,0xc0,0xdf,0xf2,0xbe,0x1c,0x70,0xec,0xd8,0x88,0x85,0x82,0x11,0x10,0x26, // 00006430 |.W.....p.......&|
+0xe0,0x72,0xa6,0x44,0xaa,0x64,0xc7,0x90,0x93,0xeb,0x72,0xe2,0x4d,0x10,0xf5,0x59, // 00006440 |.r.D.d....r.M..Y|
+0x61,0x40,0x18,0x55,0xc4,0xc3,0x90,0x15,0xb3,0x1b,0xb0,0xcc,0xd0,0x73,0x6f,0x39, // 00006450 |a@.U.........so9|
+0x69,0xe6,0x5b,0x95,0xdd,0xf8,0x07,0x5c,0xcb,0xb0,0x27,0x48,0x1f,0xec,0xf7,0xb1, // 00006460 |i.[....\..'H....|
+0x8f,0x43,0x55,0x39,0x51,0xd8,0x7e,0xe2,0xce,0xbd,0x12,0x57,0x96,0x39,0x1c,0xb5, // 00006470 |.CU9Q.~....W.9..|
+0x06,0xa3,0x87,0x25,0xeb,0x80,0x03,0x77,0x18,0x6c,0xa9,0xb5,0x44,0x54,0x30,0x9c, // 00006480 |...%...w.l..DT0.|
+0x01,0xff,0x68,0x8f,0xae,0x0e,0xa3,0x50,0xb5,0x62,0xf0,0x13,0xde,0x12,0xba,0x4d, // 00006490 |..h....P.b.....M|
+0x48,0x6d,0x03,0x3c,0x49,0xf4,0x78,0xc9,0xb4,0xb2,0xb4,0xb4,0x21,0xd5,0x43,0x16, // 000064a0 |Hm.<I.x.....!.C.|
+0x11,0x1f,0x12,0x48,0xda,0x9b,0xbb,0x00,0x66,0x71,0xcb,0xa0,0xf1,0xe8,0x17,0xe6, // 000064b0 |...H....fq......|
+0xaa,0xb2,0xd5,0x9b,0x8a,0x58,0x57,0xcd,0xdf,0x65,0x85,0x34,0x03,0x45,0xed,0x7b, // 000064c0 |.....XW..e.4.E.{|
+0xf0,0xfa,0x5a,0x01,0x63,0x92,0x85,0xde,0x74,0xbe,0xc3,0xf3,0x99,0x17,0x5a,0xcf, // 000064d0 |..Z.c...t.....Z.|
+0x33,0x51,0xa2,0x9a,0x90,0xac,0xcc,0x5a,0x9e,0x52,0x4b,0x76,0x41,0xed,0xbf,0x1c, // 000064e0 |3Q.....Z.RKvA...|
+0xe8,0x21,0x50,0x3b,0xe4,0x28,0x35,0xf7,0xfc,0x36,0x26,0xf5,0x1f,0x49,0xfa,0xd6, // 000064f0 |.!P;.(5..6&..I..|
+0xd8,0x0d,0xb4,0xba,0x97,0x85,0x21,0x46,0x5f,0x29,0x60,0x51,0x98,0xe3,0x1e,0xe8, // 00006500 |......!F_)`Q....|
+0xfc,0x98,0xb3,0x13,0xe4,0xdd,0xec,0xb9,0xe5,0x13,0xa0,0x9b,0x88,0x4e,0x34,0xd3, // 00006510 |.............N4.|
+0xaf,0x12,0xf1,0x64,0x8c,0x20,0x46,0xfd,0x35,0x7c,0x03,0x5d,0x21,0x21,0x8b,0x7a, // 00006520 |...d. F.5|.]!!.z|
+0x61,0x71,0x8a,0x48,0xd4,0xa6,0x5c,0x6b,0x17,0x77,0xe5,0xc4,0x27,0xd7,0x9a,0x34, // 00006530 |aq.H..\k.w..'..4|
+0xd6,0xda,0x97,0x48,0xd9,0x15,0x6a,0x45,0x76,0xa8,0x38,0xcc,0x00,0xdf,0x73,0x22, // 00006540 |...H..jEv.8...s"|
+0xe4,0x9a,0xef,0xbe,0xb3,0xd6,0x19,0x63,0x57,0x83,0x66,0x0d,0xc9,0xc9,0xcd,0x26, // 00006550 |.......cW.f....&|
+0xd0,0xde,0x55,0xae,0xfd,0xdd,0xd4,0xc2,0xa8,0x77,0x23,0x00,0x26,0x73,0x3c,0x97, // 00006560 |..U......w#.&s<.|
+0x20,0xd9,0x02,0x80,0xa5,0x6b,0x4b,0x38,0x63,0x27,0xcb,0x3d,0x7f,0x39,0x70,0x1d, // 00006570 | ....kK8c'.=.9p.|
+0xb8,0xc0,0x61,0x9e,0x9d,0x7c,0x14,0x11,0x6a,0x87,0x3e,0x62,0x6a,0xa2,0x0b,0xbc, // 00006580 |..a..|..j.>bj...|
+0x63,0x68,0x7b,0xd0,0x4d,0x8f,0xb3,0x1b,0x01,0xf3,0x7b,0xad,0xfe,0x5a,0x82,0xd5, // 00006590 |ch{.M.....{..Z..|
+0x0f,0xb0,0x34,0x8f,0x3f,0x37,0x12,0x65,0xa0,0x19,0x3d,0x82,0x2a,0xda,0xa3,0xd6, // 000065a0 |..4.?7.e..=.*...|
+0xec,0x51,0x17,0x3a,0x35,0x30,0x27,0x30,0x54,0x13,0xc1,0xd8,0x7f,0x4c,0x8f,0x7f, // 000065b0 |.Q.:50'0T....L..|
+0x07,0x4d,0xa5,0x23,0x51,0xe3,0x2e,0x6a,0xa0,0x4c,0xae,0x04,0xa3,0x3a,0x06,0xb2, // 000065c0 |.M.#Q..j.L...:..|
+0xb5,0xe0,0xbd,0x3d,0x83,0xfa,0xb4,0x7d,0xbd,0x17,0x60,0xbe,0x80,0x18,0x10,0x9a, // 000065d0 |...=...}..`.....|
+0xf6,0x3b,0x5c,0xa8,0xd9,0xe3,0x0f,0x94,0x04,0xfb,0x9c,0xb5,0x90,0xf4,0x1f,0xa0, // 000065e0 |.;\.............|
+0xa2,0xe5,0x7d,0x57,0x6e,0x0b,0x45,0x28,0x15,0x36,0x8b,0xbf,0xd6,0x53,0x77,0x37, // 000065f0 |..}Wn.E(.6...Sw7|
+0xf9,0x39,0x9b,0x3c,0x58,0xfb,0x22,0xcf,0xb9,0x43,0x8b,0x89,0x05,0x79,0x92,0x33, // 00006600 |.9.<X."..C...y.3|
+0x84,0x42,0x45,0x4d,0x1e,0xb1,0xa6,0x72,0x8a,0xd7,0xf1,0x1b,0xba,0x24,0xbb,0x7e, // 00006610 |.BEM...r.....$.~|
+0xa3,0xc7,0x2d,0xb1,0x13,0x3a,0x10,0xfc,0x06,0xee,0x3f,0x53,0x57,0xc4,0xe0,0x9c, // 00006620 |..-..:....?SW...|
+0x5c,0xa9,0x6a,0x3a,0xa2,0x3c,0xf1,0xe6,0x5d,0x00,0xd1,0x59,0xa6,0x86,0x58,0x23, // 00006630 |\.j:.<..]..Y..X#|
+0x8a,0x67,0xb6,0xfe,0xdb,0x14,0xc2,0x08,0x96,0x08,0xc4,0xe5,0x35,0x1e,0x8e,0x5b, // 00006640 |.g..........5..[|
+0xe0,0x8d,0xb0,0x73,0x94,0x5a,0x4b,0xce,0xbf,0x0b,0xdf,0x2b,0x8c,0xe6,0xae,0x1c, // 00006650 |...s.ZK....+....|
+0xb7,0xae,0x6a,0xef,0x72,0xdd,0x73,0x5c,0x53,0x67,0xc5,0xc1,0x76,0x82,0x83,0x66, // 00006660 |..j.r.s\Sg..v..f|
+0x5d,0xee,0xd2,0x9f,0x67,0x66,0xa9,0xc3,0xe2,0x9e,0x1d,0x08,0xa6,0x7d,0xc0,0x2e, // 00006670 |]...gf.......}..|
+0x9d,0x6e,0x2f,0xc4,0x60,0x32,0x57,0x94,0x6d,0xac,0x41,0x74,0xe8,0x83,0x4f,0xf9, // 00006680 |.n/.`2W.m.At..O.|
+0xe7,0xcc,0xa9,0xa2,0x13,0x52,0x3a,0xa5,0xc5,0xd9,0x2d,0xeb,0x16,0x27,0x9f,0x79, // 00006690 |.....R:...-..'.y|
+0xfd,0xc6,0xb4,0xc7,0x71,0x73,0xb5,0xac,0x8e,0xf1,0xed,0xda,0x94,0x0c,0x2a,0x51, // 000066a0 |....qs........*Q|
+0x76,0xee,0xb2,0xeb,0xf7,0x6a,0x59,0xae,0xc0,0xd3,0xe0,0xc0,0x8f,0x74,0xdb,0xde, // 000066b0 |v....jY......t..|
+0xcb,0xef,0x2f,0x88,0x64,0x8b,0x24,0x03,0x1a,0xeb,0xac,0x67,0x75,0xd5,0xff,0x0d, // 000066c0 |../.d.$....gu...|
+0xf6,0x1e,0x55,0x1e,0x2e,0x87,0x10,0x50,0x0a,0xa7,0x19,0x1b,0x7a,0xbe,0x31,0x53, // 000066d0 |..U....P....z.1S|
+0xf0,0xa8,0xbd,0xc2,0xa9,0x5a,0x76,0xaf,0x62,0xb2,0x5e,0xba,0xa6,0x7d,0x24,0x0a, // 000066e0 |.....Zv.b.^..}$.|
+0x0b,0x9d,0x4c,0xa5,0x9c,0xd0,0xb8,0x51,0x55,0xf3,0x0e,0x8a,0x8b,0xba,0xc2,0x84, // 000066f0 |..L....QU.......|
+0xa9,0x5a,0x9e,0x68,0x9e,0xab,0xe9,0x41,0x9c,0xa0,0x0e,0xae,0xdd,0x37,0x01,0x56, // 00006700 |.Z.h...A.....7.V|
+0x55,0x05,0x09,0xfa,0x80,0x53,0x5d,0x02,0x63,0xf6,0x00,0x52,0xda,0x16,0x1d,0x80, // 00006710 |U....S].c..R....|
+0x4b,0x0f,0xc4,0x4c,0x54,0x0a,0x90,0x5e,0xb4,0x2d,0x6d,0x9d,0x9a,0xa4,0xdd,0x55, // 00006720 |K..LT..^.-m....U|
+0x76,0x84,0x1e,0x9f,0x15,0x33,0x77,0xb2,0x78,0x51,0x1b,0x9c,0xb9,0xb7,0x79,0x54, // 00006730 |v....3w.xQ....yT|
+0x8a,0x74,0x46,0xb0,0xf0,0xfb,0x8d,0x51,0x40,0xf0,0xe4,0xff,0x4f,0x9d,0xf5,0x08, // 00006740 |.tF....Q@...O...|
+0xbb,0x05,0x92,0xb2,0x39,0x74,0x45,0x28,0x83,0x8d,0xb6,0x36,0xc8,0xad,0x51,0xa8, // 00006750 |....9tE(...6..Q.|
+0xb4,0xb6,0x0f,0x23,0xeb,0x48,0x30,0xea,0xa0,0xc2,0x4d,0x3e,0xbc,0x9b,0x3c,0x83, // 00006760 |...#.H0...M>..<.|
+0x0d,0x99,0xd1,0xf9,0x19,0x2e,0x33,0x29,0x4e,0xd4,0xa3,0x2b,0xed,0x3b,0x9d,0x54, // 00006770 |......3)N..+.;.T|
+0xa2,0x13,0xd3,0xbd,0x6f,0x61,0xa7,0xeb,0x3e,0x49,0x5d,0x4e,0x51,0xf3,0x96,0xe5, // 00006780 |....oa..>I]NQ...|
+0xe9,0x94,0xed,0xd3,0xff,0x30,0xe6,0x3b,0x2b,0xed,0xd3,0x16,0xf5,0xab,0x34,0xfd, // 00006790 |.....0.;+.....4.|
+0x88,0xa5,0xa9,0x4a,0x35,0x5d,0x79,0x8e,0xc1,0xf0,0x93,0x1c,0xc9,0xad,0x77,0x41, // 000067a0 |...J5]y.......wA|
+0x63,0x95,0xdf,0x93,0xe1,0x9a,0xf7,0xae,0x61,0xaa,0x7d,0xd6,0xad,0xcb,0x7b,0x21, // 000067b0 |c.......a.}...{!|
+0x17,0xb0,0xf0,0xd4,0xa9,0x43,0xf3,0x42,0xa2,0xa0,0x4f,0xc6,0x5a,0x7e,0x6e,0xf1, // 000067c0 |.....C.B..O.Z~n.|
+0x9d,0x12,0xce,0xf8,0xc9,0x6b,0xd5,0xbc,0x32,0x73,0x48,0x22,0xef,0x59,0xfb,0xf9, // 000067d0 |.....k..2sH".Y..|
+0xdb,0xfd,0x85,0x57,0x66,0xe0,0x7e,0x95,0x6b,0xdd,0x8b,0x9d,0x72,0x11,0x6c,0x47, // 000067e0 |...Wf.~.k...r.lG|
+0x44,0xcc,0xf4,0x29,0x35,0x99,0x8d,0xe0,0x96,0x3c,0x4f,0x5b,0x83,0x59,0x3d,0x93, // 000067f0 |D..)5....<O[.Y=.|
+0xa8,0x2f,0x45,0x04,0x01,0x4e,0xd8,0xb3,0x3c,0xaf,0xfc,0xc0,0xb2,0x61,0x64,0x21, // 00006800 |./E..N..<....ad!|
+0x8b,0xf2,0xad,0x01,0x44,0x66,0xef,0xdf,0x27,0x3f,0xbe,0xb9,0x54,0xe0,0x94,0x2b, // 00006810 |....Df..'?..T..+|
+0x4c,0x55,0x40,0x5d,0x56,0x98,0xe3,0xa1,0x0d,0x44,0xdf,0x70,0xc2,0xa5,0xbd,0x1c, // 00006820 |LU@]V....D.p....|
+0x08,0x51,0x6e,0x80,0xcc,0x11,0x06,0x8b,0xe6,0x09,0xe1,0x23,0x4b,0x15,0x46,0x60, // 00006830 |.Qn........#K.F`|
+0xb7,0x20,0xff,0x01,0x61,0x36,0x0f,0x26,0x89,0xea,0xdb,0x6e,0x7e,0xb4,0x90,0x23, // 00006840 |. ..a6.&...n~..#|
+0x6d,0xad,0x27,0x10,0xfc,0x81,0x0b,0xf8,0x42,0xf5,0x49,0xd4,0x8c,0x03,0xa0,0x4d, // 00006850 |m.'.....B.I....M|
+0xe6,0x3a,0x3e,0xd6,0xb4,0xb5,0x20,0x34,0x07,0xad,0x4f,0x93,0x32,0x68,0x9a,0x48, // 00006860 |.:>... 4..O.2h.H|
+0xb6,0xa3,0x9e,0x9b,0xe3,0xa7,0xed,0xc2,0x0c,0x32,0xaf,0xc7,0x56,0xe3,0xdd,0xbb, // 00006870 |.........2..V...|
+0x92,0xab,0xf0,0xad,0x88,0x77,0xc2,0x67,0x3b,0x46,0xd1,0xcf,0x95,0xe4,0x4d,0x74, // 00006880 |.....w.g;F....Mt|
+0x35,0x7b,0xc7,0x9d,0xf4,0x84,0x51,0xa6,0xc8,0x5b,0x96,0x18,0x54,0x12,0xba,0xe1, // 00006890 |5{....Q..[..T...|
+0xba,0x95,0x9d,0x07,0x43,0x67,0xdd,0xcf,0x44,0x6e,0x3c,0x8f,0x86,0x99,0x03,0xae, // 000068a0 |....Cg..Dn<.....|
+0xd6,0xcb,0xfb,0x58,0x2c,0x14,0x63,0x8e,0x6e,0x20,0x9e,0x40,0x8c,0xed,0x52,0x3d, // 000068b0 |...X,.c.n .@..R=|
+0xc5,0xe4,0x23,0xc2,0x0b,0x21,0x1c,0xdb,0xe8,0xc3,0xf1,0x99,0x11,0x8c,0xa5,0xc9, // 000068c0 |..#..!..........|
+0x79,0x56,0x23,0xd6,0x01,0xa2,0x08,0xf6,0x2f,0xe1,0x4d,0x06,0x41,0x11,0xcf,0x8b, // 000068d0 |yV#...../.M.A...|
+0xf5,0x7a,0x7f,0x78,0x42,0xa9,0xeb,0x4e,0xab,0x96,0xf9,0x95,0x02,0xf5,0xef,0xa5, // 000068e0 |.z.xB..N........|
+0x97,0x36,0xaf,0xad,0x88,0xa1,0x98,0x9e,0x94,0x90,0x1f,0x3d,0xad,0xdd,0xbd,0x72, // 000068f0 |.6.........=...r|
+0x78,0x11,0x60,0xa7,0x7f,0x87,0x8a,0xcd,0x79,0xcb,0xbb,0x1a,0x5f,0xe8,0x53,0xc7, // 00006900 |x.`.....y..._.S.|
+0xf7,0xbe,0x90,0xa8,0x9d,0x7d,0x09,0xc4,0xb7,0x6e,0xe0,0xef,0x51,0xaa,0xca,0xde, // 00006910 |.....}...n..Q...|
+0xde,0x1c,0xc7,0xa6,0xa6,0x70,0x6e,0xf2,0xc9,0x6b,0x67,0x96,0x8e,0x31,0xe7,0xce, // 00006920 |.....pn..kg..1..|
+0x2e,0x56,0x16,0x9a,0xee,0x6c,0x68,0x27,0x61,0x52,0x5f,0xdc,0x34,0x70,0xf3,0x60, // 00006930 |.V...lh'aR_.4p.`|
+0x63,0xf2,0x7d,0xdb,0xfd,0x73,0x3c,0xa6,0x86,0x18,0x11,0x66,0xe7,0xaf,0xd8,0x9b, // 00006940 |c.}..s<....f....|
+0x5b,0xee,0x85,0xce,0x60,0x09,0x25,0x76,0x1c,0xe5,0x3c,0x08,0x8b,0x8c,0xa4,0x84, // 00006950 |[...`.%v..<.....|
+0x27,0xe6,0x1a,0x54,0xe6,0x95,0x85,0x92,0xfa,0xd4,0xab,0x06,0xd4,0x7b,0xf4,0x59, // 00006960 |'..T.........{.Y|
+0x5b,0x05,0xac,0xa5,0xf8,0x45,0x13,0xf0,0x4b,0xe0,0xf7,0xc6,0x77,0x4d,0x37,0x5f, // 00006970 |[....E..K...wM7_|
+0x32,0x2f,0x8e,0x18,0x59,0xba,0xac,0x28,0xd9,0x1c,0xfe,0x08,0x16,0xef,0xd4,0x21, // 00006980 |2/..Y..(.......!|
+0x30,0xc3,0xd9,0x03,0xbf,0x0e,0x5f,0xe9,0xf1,0x90,0x6f,0xe3,0x85,0x22,0x96,0xee, // 00006990 |0....._...o.."..|
+0xf4,0x03,0x5c,0x69,0x36,0xa5,0xee,0x8b,0xb6,0x43,0x29,0xf1,0x8b,0x0f,0xee,0xda, // 000069a0 |..\i6....C).....|
+0x9c,0xda,0xd3,0xb8,0xdd,0x6c,0xc6,0x79,0x10,0x63,0x13,0xba,0xf6,0x16,0xc1,0x89, // 000069b0 |.....l.y.c......|
+0xbe,0xa3,0x38,0xa7,0x9b,0x2b,0xf0,0x20,0xc7,0x65,0xf6,0x5f,0x56,0x63,0x8c,0x69, // 000069c0 |..8..+. .e._Vc.i|
+0xcd,0x5f,0x37,0xdf,0x63,0xbe,0x49,0x6f,0x02,0x9c,0x36,0xbc,0x27,0xa3,0x0c,0x9e, // 000069d0 |._7.c.Io..6.'...|
+0xd9,0x7f,0x6d,0x00,0x41,0xed,0xb8,0xf1,0x9e,0xae,0x1f,0xf9,0x7c,0xf0,0x19,0x64, // 000069e0 |..m.A.......|..d|
+0x8a,0x52,0xad,0x3e,0x87,0xbf,0xbc,0x45,0x87,0x67,0xa1,0x09,0x7c,0xe7,0x68,0xe8, // 000069f0 |.R.>...E.g..|.h.|
+0x16,0x08,0x4b,0x8f,0x0b,0xeb,0x61,0x2f,0xb9,0x28,0x63,0x00,0x9a,0xfc,0xb5,0xbd, // 00006a00 |..K...a/.(c.....|
+0xcc,0x07,0xb4,0xaf,0x38,0xe9,0x31,0x01,0x23,0x44,0x21,0x63,0x80,0xe0,0x44,0xc5, // 00006a10 |....8.1.#D!c..D.|
+0xf6,0x91,0x47,0x07,0x20,0x30,0x8f,0x16,0x5d,0x4d,0x1a,0x04,0x2f,0x5f,0x0b,0x67, // 00006a20 |..G. 0..]M../_.g|
+0xd8,0xe8,0x97,0x44,0xd3,0xc7,0xc8,0x48,0xd7,0x84,0x40,0x77,0x9b,0xf7,0x51,0x3b, // 00006a30 |...D...H..@w..Q;|
+0x88,0xdd,0x18,0x15,0xdf,0xff,0x29,0x15,0x83,0x25,0x72,0x15,0x2e,0x1b,0xab,0xbc, // 00006a40 |......)..%r.....|
+0x88,0x4d,0x97,0x1c,0x67,0xfe,0x7a,0xbe,0x40,0x15,0xc1,0x98,0xb0,0xc5,0x49,0x05, // 00006a50 |.M..g.z.@.....I.|
+0x11,0x83,0xb3,0xfd,0x7d,0x9a,0x11,0x03,0xfc,0x10,0xfd,0xb4,0x94,0x9e,0x87,0x17, // 00006a60 |....}...........|
+0x32,0xa2,0xe5,0x11,0xef,0x28,0x2a,0xf1,0xba,0x7c,0x65,0x29,0x82,0xc1,0xfa,0x2f, // 00006a70 |2....(*..|e).../|
+0xb6,0x9b,0xc5,0xd8,0x9d,0xde,0xba,0x88,0x2e,0x56,0xdc,0x0e,0x07,0xe9,0xd1,0x82, // 00006a80 |.........V......|
+0xf0,0x33,0x3c,0x74,0x4f,0xf7,0x27,0x7b,0x4c,0xf7,0xc0,0xf6,0x5f,0x51,0x85,0x2f, // 00006a90 |.3<tO.'{L..._Q./|
+0x3b,0x21,0x42,0x14,0xf2,0x6c,0xf5,0x25,0x6f,0x7c,0x55,0x97,0x23,0x51,0x42,0x87, // 00006aa0 |;!B..l.%o|U.#QB.|
+0x98,0xcc,0x9b,0xf1,0x42,0x67,0xce,0xe3,0xcc,0x47,0x76,0x10,0x4a,0x85,0x79,0xf8, // 00006ab0 |....Bg...Gv.J.y.|
+0x9b,0xc3,0xe6,0x83,0xae,0x66,0x4b,0xe4,0xf7,0x3d,0x67,0xe4,0x69,0x15,0x90,0x15, // 00006ac0 |.....fK..=g.i...|
+0xc4,0x17,0x88,0x79,0x5a,0x33,0xbd,0xe1,0x51,0xf8,0xb7,0xd3,0x3c,0xe3,0xa0,0x7d, // 00006ad0 |...yZ3..Q...<..}|
+0xdf,0x91,0x22,0x31,0xa3,0xa1,0xc0,0xae,0x1f,0xea,0x39,0xd9,0x25,0x9b,0x9a,0x2a, // 00006ae0 |.."1......9.%..*|
+0xf7,0x12,0x6e,0x4c,0x2a,0xfc,0x9e,0x4b,0x25,0x71,0x02,0x4d,0xe2,0xe2,0x65,0x83, // 00006af0 |..nL*..K%q.M..e.|
+0xd4,0xf5,0x3d,0xc0,0x7a,0xc8,0x8a,0xcd,0x1d,0x07,0xce,0x1c,0xc5,0xe0,0xd8,0xb4, // 00006b00 |..=.z...........|
+0x5a,0xa6,0xe8,0x1b,0x0f,0x64,0x72,0x81,0xa6,0x4d,0x26,0x38,0xd7,0x6b,0x47,0x01, // 00006b10 |Z....dr..M&8.kG.|
+0x55,0xf6,0x63,0x18,0x86,0xf0,0xdf,0x15,0xb4,0x23,0x07,0x3f,0xb0,0x6f,0xb6,0x91, // 00006b20 |U.c......#.?.o..|
+0x44,0x22,0xf8,0x24,0xac,0x2c,0xb1,0x90,0x48,0x0a,0x37,0x59,0x49,0x21,0x9f,0x81, // 00006b30 |D".$.,..H.7YI!..|
+0xff,0x30,0x9e,0x0c,0x8a,0x47,0x58,0x56,0x1e,0x9a,0x6b,0x8a,0xb4,0xc7,0xff,0x5a, // 00006b40 |.0...GXV..k....Z|
+0x31,0x3c,0xc4,0x1a,0x9e,0xa1,0xa3,0x6c,0x7c,0x1a,0x61,0xf4,0x3b,0xd5,0x2d,0x99, // 00006b50 |1<.....l|.a.;.-.|
+0x95,0x74,0xf3,0x2a,0xe9,0x28,0x7c,0xc4,0xb9,0xb6,0x05,0x1a,0x94,0x5e,0x4e,0xd5, // 00006b60 |.t.*.(|......^N.|
+0x18,0x22,0x84,0x34,0xc9,0x2b,0x56,0x92,0xe3,0xb5,0xa7,0x09,0xfb,0xc7,0x18,0x3f, // 00006b70 |.".4.+V........?|
+0x72,0x3a,0x8f,0x7b,0x71,0xf5,0xc7,0x6c,0x1a,0x86,0xf9,0x05,0x29,0x87,0x73,0x76, // 00006b80 |r:.{q..l....).sv|
+0x93,0xe1,0x26,0xc3,0x28,0xf9,0x29,0x01,0xd2,0xf8,0xbf,0x00,0xdf,0xae,0x0c,0xbb, // 00006b90 |..&.(.).........|
+0x58,0x30,0xe6,0xb4,0x9b,0x2a,0xfb,0x1f,0x4f,0x5a,0xbf,0x53,0xd5,0xba,0x6f,0x7e, // 00006ba0 |X0...*..OZ.S..o~|
+0xda,0xd4,0x74,0x21,0x32,0x5a,0xb6,0xfd,0x3d,0xec,0x54,0x5a,0x9b,0xfc,0xbd,0x36, // 00006bb0 |..t!2Z..=.TZ...6|
+0x2a,0xa0,0x2f,0x57,0xee,0xfb,0x50,0x96,0xbf,0x1c,0x1c,0xcf,0x8c,0x98,0x75,0xf4, // 00006bc0 |*./W..P.......u.|
+0xfb,0xbd,0x03,0xac,0x9b,0x23,0x58,0xf7,0x40,0x12,0xea,0x6c,0x2d,0x22,0x42,0x2f, // 00006bd0 |.....#X.@..l-"B/|
+0x37,0x91,0xf4,0x02,0x95,0xfa,0x7a,0x53,0xfe,0x74,0x78,0xce,0x3f,0x16,0xe3,0xe2, // 00006be0 |7.....zS.tx.?...|
+0x51,0x71,0xcf,0x73,0x24,0x25,0x43,0x44,0x38,0x1f,0xd6,0x6b,0xa7,0xfd,0xd7,0x2b, // 00006bf0 |Qq.s$%CD8..k...+|
+0x93,0x1b,0xc7,0xdf,0x89,0x91,0x97,0x2c,0xa0,0x26,0x34,0x82,0xed,0x44,0xa8,0x4d, // 00006c00 |.......,.&4..D.M|
+0x78,0xfd,0x9a,0x5f,0x11,0xf7,0x2b,0xc1,0xf5,0xa7,0xda,0x09,0x5a,0xe6,0x0c,0x42, // 00006c10 |x.._..+.....Z..B|
+0xc8,0xb2,0xcb,0x47,0x4d,0xfd,0x34,0x8c,0x43,0xf8,0xa2,0xb1,0xcc,0xbf,0x20,0x4e, // 00006c20 |...GM.4.C..... N|
+0x54,0xeb,0x89,0xea,0xff,0xf6,0x88,0xf5,0x2f,0x92,0x73,0x7d,0x47,0x99,0xfc,0x9b, // 00006c30 |T......./.s}G...|
+0x2a,0xa8,0xd1,0x77,0x88,0x52,0x1e,0xe0,0x8b,0x4b,0x95,0xfa,0x37,0xb2,0xb7,0x11, // 00006c40 |*..w.R...K..7...|
+0xc0,0xba,0x8c,0xa9,0xed,0x9d,0xfd,0x8b,0xbe,0xe1,0xe7,0x35,0x66,0x21,0x16,0xf2, // 00006c50 |...........5f!..|
+0x2c,0xf8,0x0c,0x6b,0x29,0x79,0x06,0x41,0x04,0xa9,0x2c,0xe7,0x0a,0xa7,0x98,0xb8, // 00006c60 |,..k)y.A..,.....|
+0xca,0xf6,0x71,0x1a,0x06,0x06,0xf1,0x5a,0xce,0x8d,0x4b,0x0a,0xbc,0x79,0xca,0x9a, // 00006c70 |..q....Z..K..y..|
+0xf9,0xcb,0x1b,0x4b,0x0c,0x1a,0x07,0xa2,0x23,0xc7,0x56,0x40,0x1c,0x42,0xf9,0x0b, // 00006c80 |...K....#.V@.B..|
+0x24,0xe8,0x93,0xe6,0x61,0xe0,0x26,0x29,0xb9,0x13,0x93,0xcf,0x0c,0xd2,0x7e,0xb6, // 00006c90 |$...a.&)......~.|
+0xaf,0xc5,0x7f,0xcd,0x91,0x21,0xfb,0x58,0x58,0x49,0x34,0xc5,0x59,0x05,0x8e,0xa9, // 00006ca0 |.....!.XXI4.Y...|
+0x99,0xa8,0x8d,0xb8,0x1d,0xf3,0x72,0x74,0xac,0xc2,0xe5,0x17,0x47,0x93,0x07,0xa1, // 00006cb0 |......rt....G...|
+0x83,0x98,0xab,0xb0,0x0f,0xd1,0x91,0xad,0xbf,0x9b,0x23,0x83,0xa2,0x5c,0xde,0x27, // 00006cc0 |..........#..\.'|
+0x8f,0xde,0x50,0x18,0x99,0x8b,0xd5,0xbf,0x5d,0x0c,0x75,0x3e,0x1b,0x86,0x8b,0x52, // 00006cd0 |..P.....].u>...R|
+0xbd,0x89,0xa6,0x7a,0x4d,0x45,0xf0,0xde,0x65,0xfc,0x53,0x0e,0x5a,0x42,0x29,0x82, // 00006ce0 |...zME..e.S.ZB).|
+0x24,0xe7,0x50,0x09,0xa4,0x5d,0x0e,0x42,0xa6,0x7f,0xcd,0x01,0xcc,0xf6,0xf3,0x54, // 00006cf0 |$.P..].B.......T|
+0x59,0xcb,0xe6,0x3d,0xdf,0xdb,0xe2,0x63,0x6f,0x75,0x49,0xb5,0xb9,0xad,0x90,0xae, // 00006d00 |Y..=...couI.....|
+0x95,0x21,0xe5,0xa1,0x1e,0x61,0xbd,0xfd,0x77,0xb1,0x6c,0x09,0xbe,0x34,0xd8,0x21, // 00006d10 |.!...a..w.l..4.!|
+0x60,0x0d,0x86,0x07,0x4a,0xb7,0x90,0xd5,0xa9,0x54,0xa1,0x61,0x1e,0x9a,0x91,0x00, // 00006d20 |`...J....T.a....|
+0xf2,0x5c,0x9d,0x41,0x4b,0x29,0xb1,0x9d,0x9b,0xd3,0x7b,0xef,0xa1,0xca,0xd2,0x3c, // 00006d30 |.\.AK)....{....<|
+0x0b,0x51,0x2b,0x79,0xf0,0xda,0x74,0x9a,0x5f,0x3d,0xa8,0x8d,0xa1,0x83,0xe9,0xfb, // 00006d40 |.Q+y..t._=......|
+0xf9,0x1a,0x4d,0x80,0xe0,0x58,0x80,0xc8,0xa9,0xe1,0x44,0xe1,0xe4,0xe8,0x27,0x6e, // 00006d50 |..M..X....D...'n|
+0x79,0x65,0xc3,0xaa,0xee,0xea,0x10,0xff,0x4e,0x82,0x77,0x29,0xfd,0xfd,0xc0,0x80, // 00006d60 |ye......N.w)....|
+0xf3,0x5a,0x8d,0xec,0xd5,0x80,0x91,0x2d,0x08,0x8c,0x2f,0x24,0x81,0x79,0x5e,0x20, // 00006d70 |.Z.....-../$.y^ |
+0x23,0x15,0xc6,0xf0,0x10,0x15,0x16,0x9f,0x07,0x59,0x01,0xde,0x6f,0x99,0x5b,0xee, // 00006d80 |#........Y..o.[.|
+0x20,0x1f,0x72,0x96,0x91,0x2b,0x0b,0xca,0x52,0x9f,0x20,0xc6,0x5f,0x37,0x42,0xd0, // 00006d90 | .r..+..R. ._7B.|
+0x01,0x1f,0x25,0xab,0xf3,0xa3,0x18,0xa8,0x17,0xf3,0x48,0xac,0x60,0xb1,0x92,0x43, // 00006da0 |..%.......H.`..C|
+0xc6,0x38,0xbd,0x82,0x3c,0x0f,0xaa,0x2f,0x2b,0xb0,0xc9,0x57,0xfc,0x8a,0xb3,0xc4, // 00006db0 |.8..<../+..W....|
+0xff,0x47,0x57,0x1a,0x9d,0x3f,0xf1,0xb3,0x48,0xbd,0xe4,0xcf,0xbe,0x6e,0x76,0x47, // 00006dc0 |.GW..?..H....nvG|
+0xb0,0x96,0x9b,0x77,0x87,0x95,0x0a,0xd2,0xb2,0xb4,0x99,0xe2,0x28,0x12,0x16,0xd1, // 00006dd0 |...w........(...|
+0xa1,0x83,0xdc,0x11,0x53,0xb8,0x07,0x71,0x03,0x19,0x62,0xb0,0x46,0x96,0xd0,0x68, // 00006de0 |....S..q..b.F..h|
+0xe2,0xa5,0x1e,0x91,0x1d,0x65,0x5a,0x4f,0x31,0xdc,0xe1,0xe0,0x91,0x72,0x13,0x7b, // 00006df0 |.....eZO1....r.{|
+0x2d,0x57,0xb9,0xdd,0x91,0x12,0xee,0xe4,0x7f,0x87,0x55,0x14,0x32,0x91,0xcb,0x89, // 00006e00 |-W........U.2...|
+0xd8,0x18,0xd7,0x56,0x29,0x42,0x04,0xc4,0xb4,0xe2,0x54,0x39,0x1c,0xca,0x4a,0xa8, // 00006e10 |...V)B....T9..J.|
+0x4b,0xf8,0x9e,0x26,0x7a,0x9a,0x33,0xe9,0x60,0x5f,0xef,0xc1,0xeb,0x5b,0x18,0x8c, // 00006e20 |K..&z.3.`_...[..|
+0x8d,0x10,0x5f,0x84,0x39,0xfb,0x6b,0xe1,0xa1,0xdb,0x86,0x16,0xe7,0xc5,0x39,0x19, // 00006e30 |.._.9.k.......9.|
+0xd7,0x5b,0x7d,0xd4,0x7f,0x6b,0x85,0xc3,0xaa,0xa2,0x51,0x2e,0xb9,0x7d,0x0a,0xbf, // 00006e40 |.[}..k....Q..}..|
+0xfd,0x1b,0x68,0x02,0x21,0xcc,0xf6,0x33,0x2f,0xbe,0x90,0xb9,0x95,0x67,0x7d,0xf7, // 00006e50 |..h.!..3/....g}.|
+0x24,0xe8,0x69,0x20,0xc3,0x33,0x66,0x83,0x51,0x41,0x6e,0xa7,0xab,0x97,0x57,0xe7, // 00006e60 |$.i .3f.QAn...W.|
+0x62,0x77,0xaa,0x83,0xe6,0x0e,0x99,0x36,0x84,0x4f,0x41,0x52,0xf2,0x80,0x91,0x27, // 00006e70 |bw.....6.OAR...'|
+0x34,0x8b,0x3b,0xb8,0x20,0x1f,0xf7,0xf6,0x80,0x11,0x01,0xdb,0x8e,0xd4,0x4e,0x61, // 00006e80 |4.;. .........Na|
+0x91,0x64,0xe3,0x6d,0x39,0xf3,0xba,0xb7,0x06,0x2c,0xfa,0x79,0x98,0x1e,0x2c,0xf1, // 00006e90 |.d.m9....,.y..,.|
+0xec,0x0a,0x66,0xe9,0x82,0xdc,0xf8,0xbd,0xeb,0x93,0x73,0x9e,0x02,0xb5,0x6b,0xca, // 00006ea0 |..f.......s...k.|
+0xf1,0xdf,0xdb,0xb2,0x7d,0xf9,0x83,0xfe,0x70,0x55,0xe0,0x05,0xfb,0x32,0x8e,0x12, // 00006eb0 |....}...pU...2..|
+0x5f,0x86,0xbd,0xdf,0x25,0x0a,0x61,0x01,0xfc,0x73,0xfd,0xf3,0x3c,0x74,0x5b,0x3c, // 00006ec0 |_...%.a..s..<t[<|
+0xf2,0xd0,0x32,0xed,0x1c,0x8e,0x24,0x3d,0xe4,0xe2,0x4a,0xb6,0xbc,0xfa,0xe9,0x46, // 00006ed0 |..2...$=..J....F|
+0xd2,0x77,0x4a,0x0b,0xe9,0x93,0xd7,0x7f,0x2f,0x83,0x74,0xe6,0xd0,0xcb,0x59,0x01, // 00006ee0 |.wJ...../.t...Y.|
+0x0d,0xa3,0x1a,0x6c,0x48,0x83,0xb9,0xa5,0x0e,0xff,0x01,0xd6,0x88,0xbd,0x65,0x1e, // 00006ef0 |...lH.........e.|
+0xf2,0x37,0x87,0xab,0x61,0x07,0x66,0x0a,0x47,0xa2,0x89,0x66,0xfb,0x2b,0xe1,0x9a, // 00006f00 |.7..a.f.G..f.+..|
+0xca,0x18,0x63,0x57,0xf2,0x5e,0xfc,0xb3,0x57,0xa9,0x30,0x7e,0xbe,0xe4,0xfa,0x07, // 00006f10 |..cW.^..W.0~....|
+0xbc,0x2c,0x83,0x05,0x93,0xce,0x24,0x2c,0x34,0x1f,0x24,0x1e,0x74,0x12,0x92,0xbc, // 00006f20 |.,....$,4.$.t...|
+0xc3,0x67,0xa0,0x68,0xe4,0xb3,0x96,0x50,0xc1,0x48,0x89,0x4e,0x18,0x40,0x0f,0xfb, // 00006f30 |.g.h...P.H.N.@..|
+0x42,0x33,0x7b,0x33,0x0a,0xea,0x45,0x28,0x46,0x46,0x10,0x11,0x3d,0x66,0x67,0xc8, // 00006f40 |B3{3..E(FF..=fg.|
+0xd8,0x8f,0x2f,0x46,0xe6,0xa3,0x8b,0x3c,0x29,0xbc,0xcc,0x69,0xa8,0x32,0xb7,0x4c, // 00006f50 |../F...<)..i.2.L|
+0x7a,0x77,0xa6,0xeb,0x21,0xfa,0x26,0x96,0x19,0xb5,0x2a,0x07,0x12,0xb1,0x5b,0x5c, // 00006f60 |zw..!.&...*...[\|
+0x7b,0xc8,0x93,0xfd,0xc9,0xf4,0x39,0x18,0xc0,0x2f,0x5c,0xfe,0x06,0x13,0xad,0x5a, // 00006f70 |{.....9../\....Z|
+0x9c,0xfe,0xd0,0x3e,0xe5,0x71,0x61,0xf8,0x86,0xc6,0x6d,0x6c,0x5e,0x6d,0xfa,0x56, // 00006f80 |...>.qa...ml^m.V|
+0x62,0xec,0x5f,0xcf,0xff,0xb7,0xe0,0xae,0x84,0x48,0x95,0x0b,0xce,0x84,0x10,0x6e, // 00006f90 |b._......H.....n|
+0x99,0xbd,0x41,0xe2,0xcc,0xc4,0x73,0x9f,0xcc,0x60,0xec,0xc5,0xbd,0xb2,0xf3,0x54, // 00006fa0 |..A...s..`.....T|
+0xfe,0x48,0x80,0x87,0xea,0x0b,0xb5,0x9b,0xfe,0x58,0xbf,0xc3,0x1a,0xa3,0x72,0x69, // 00006fb0 |.H.......X....ri|
+0xf1,0x54,0x52,0x64,0x27,0xd9,0xfe,0x01,0x35,0x69,0x25,0x82,0x5d,0x60,0xcc,0xcc, // 00006fc0 |.TRd'...5i%.]`..|
+0x83,0x13,0x93,0x05,0x5f,0x0f,0xf6,0x93,0x94,0x50,0xcc,0x37,0xef,0x33,0x75,0xb5, // 00006fd0 |...._....P.7.3u.|
+0x7b,0xef,0x2e,0x83,0x8e,0x05,0x69,0x2f,0x1f,0xdc,0x78,0x35,0x23,0x79,0xd0,0xfd, // 00006fe0 |{.....i/..x5#y..|
+0x2a,0x33,0x32,0xce,0x12,0xf1,0x22,0x74,0x9f,0x55,0x8b,0x23,0x02,0x05,0x8e,0xf3, // 00006ff0 |*32..."t.U.#....|
+0xaa,0x12,0x53,0x4d,0x2b,0x46,0xc7,0xf1,0x37,0x86,0x5b,0x8e,0xf0,0xc3,0xca,0x35, // 00007000 |..SM+F..7.[....5|
+0xd7,0x0e,0xaa,0xa1,0x65,0x47,0x9e,0x65,0x70,0xd4,0x0f,0xe8,0xf5,0x92,0x97,0x5e, // 00007010 |....eG.ep......^|
+0x5f,0x10,0x41,0x7e,0x67,0xc5,0xdd,0x73,0xbb,0xba,0x06,0x5d,0x45,0x98,0xd0,0xf3, // 00007020 |_.A~g..s...]E...|
+0xfd,0x37,0x1f,0xde,0xc2,0xc4,0x24,0xac,0x21,0x20,0xa4,0x36,0x14,0x25,0x3c,0x55, // 00007030 |.7....$.! .6.%<U|
+0xbc,0xb0,0x7f,0xa7,0x22,0xfe,0xe4,0x91,0xa5,0xa9,0xf2,0x47,0x7c,0x55,0xfe,0xd1, // 00007040 |...."......G|U..|
+0x9a,0x32,0x0d,0xdd,0x40,0x09,0x02,0x25,0x8f,0x62,0x28,0x9b,0x87,0xe4,0x45,0x2f, // 00007050 |.2..@..%.b(...E/|
+0x5a,0x46,0x06,0x57,0xcd,0x77,0xbb,0x90,0x9e,0x80,0xca,0xbd,0x04,0x0f,0xee,0x62, // 00007060 |ZF.W.w.........b|
+0xe7,0xb9,0x66,0x13,0xdc,0xae,0x53,0xd8,0xaf,0xaf,0x88,0x88,0x84,0xce,0xc1,0x87, // 00007070 |..f...S.........|
+0x66,0xf5,0x7e,0x19,0xd2,0x50,0x4d,0x5c,0x3b,0x1f,0x7f,0x94,0x5d,0x9f,0xb7,0x1b, // 00007080 |f.~..PM\;...]...|
+0xca,0x91,0x4e,0x55,0x4b,0x73,0xc8,0xdf,0x5b,0x1a,0xf8,0x28,0x90,0x6f,0x91,0x21, // 00007090 |..NUKs..[..(.o.!|
+0x9d,0x3e,0x47,0x0e,0x8e,0x92,0xd4,0x46,0x43,0x49,0xf0,0xb6,0x0c,0xe4,0x01,0xc0, // 000070a0 |.>G....FCI......|
+0xf8,0x90,0x29,0xa5,0xb6,0xbc,0x8d,0x68,0x6b,0xd4,0x19,0x98,0xd8,0x7b,0x52,0x95, // 000070b0 |..)....hk....{R.|
+0x0b,0x14,0x6c,0x75,0x82,0x88,0xc3,0x18,0x1f,0x0a,0x71,0x08,0xa4,0xb5,0x85,0x8f, // 000070c0 |..lu......q.....|
+0xe6,0x78,0xa7,0x80,0xbb,0xcc,0x8a,0xe7,0x2d,0xf5,0x2e,0xf2,0x8c,0xab,0x62,0x81, // 000070d0 |.x......-.....b.|
+0xbb,0xbb,0xd1,0xdf,0x59,0x43,0xd0,0x79,0x9d,0x96,0xb6,0xd7,0x71,0x0b,0x38,0xab, // 000070e0 |....YC.y....q.8.|
+0xd2,0xbb,0x73,0x64,0x21,0x17,0xad,0xb0,0xae,0x32,0x4d,0x72,0x43,0x52,0xc2,0xcf, // 000070f0 |..sd!....2MrCR..|
+0xdc,0x38,0xb5,0xfa,0x57,0x31,0x0b,0xc2,0x04,0xd1,0xbc,0x59,0xed,0x44,0x38,0x45, // 00007100 |.8..W1.....Y.D8E|
+0x9a,0xdc,0x05,0x59,0x54,0x9a,0x5d,0xf9,0x6d,0x1b,0x4d,0x7c,0x49,0x2b,0x65,0x55, // 00007110 |...YT.].m.M|I+eU|
+0xb3,0xf1,0x18,0xca,0xbb,0xe7,0xc0,0x96,0xec,0x9f,0x41,0x1d,0x64,0x4a,0x36,0xda, // 00007120 |..........A.dJ6.|
+0xed,0xd6,0x1a,0x7a,0x44,0xba,0x2e,0x1f,0xd5,0xb9,0x8c,0xfb,0x90,0xb3,0x85,0xdf, // 00007130 |...zD...........|
+0x5f,0x54,0xd3,0x3f,0xba,0x44,0x05,0x7c,0xec,0xd2,0x3f,0xe1,0x5e,0x9f,0x73,0x6e, // 00007140 |_T.?.D.|..?.^.sn|
+0x3c,0x16,0x72,0x77,0x4d,0xcd,0xe2,0x39,0xb4,0x58,0x7a,0x8c,0xa4,0x95,0xab,0x2e, // 00007150 |<.rwM..9.Xz.....|
+0x0c,0x16,0x24,0x9a,0xdc,0xfb,0x85,0x9d,0x33,0x4f,0x4b,0x53,0xef,0xa1,0x72,0xe0, // 00007160 |..$.....3OKS..r.|
+0x8f,0x02,0xe3,0x61,0x69,0xd7,0x85,0xee,0x1d,0xcf,0xc1,0x05,0x62,0x55,0x97,0x29, // 00007170 |...ai.......bU.)|
+0xcb,0x6a,0xe4,0xdb,0xa6,0xb3,0x2c,0x0a,0xf9,0xfd,0x24,0x9c,0xf6,0x7c,0xce,0x26, // 00007180 |.j....,...$..|.&|
+0x62,0xf6,0x52,0xa8,0x02,0xd7,0xf3,0xf0,0xba,0x7e,0x6c,0x25,0x78,0x93,0x33,0xee, // 00007190 |b.R......~l%x.3.|
+0x00,0x22,0xc8,0x84,0x76,0xb5,0x6e,0x86,0x3e,0x90,0xff,0xb5,0x71,0xf0,0xec,0xd5, // 000071a0 |."..v.n.>...q...|
+0x46,0xec,0xb5,0xc0,0x7f,0xd7,0xf4,0x50,0x57,0x4e,0xc1,0xa8,0xca,0xb0,0x84,0xbc, // 000071b0 |F......PWN......|
+0x8c,0x7f,0xac,0x06,0xe4,0x73,0x5a,0x86,0x23,0xea,0x91,0x97,0xde,0xb6,0xa5,0xb7, // 000071c0 |.....sZ.#.......|
+0x0d,0x3e,0x05,0x5e,0xb3,0xad,0x34,0x70,0xd1,0xd2,0x94,0x59,0x09,0x61,0x93,0xd6, // 000071d0 |.>.^..4p...Y.a..|
+0xc3,0x2e,0x60,0x40,0x2f,0x2e,0xb9,0xf1,0xf0,0x19,0x1f,0x15,0x07,0x6f,0x4d,0x3d, // 000071e0 |..`@/........oM=|
+0xc3,0xf9,0xb1,0xe9,0x65,0xcd,0x3a,0xa5,0x40,0xe4,0xeb,0x6b,0x8d,0x2d,0x6a,0xc5, // 000071f0 |....e.:.@..k.-j.|
+0xe3,0x24,0x97,0xc5,0xb3,0xcb,0x85,0xb1,0x1c,0x0b,0x96,0x3b,0xfe,0xcf,0x1e,0xe7, // 00007200 |.$.........;....|
+0xcb,0x94,0x52,0xe1,0xd6,0x17,0x1b,0x28,0x7c,0x21,0x67,0x92,0x6f,0x94,0x3f,0xf0, // 00007210 |..R....(|!g.o.?.|
+0xf6,0xef,0x2b,0x9a,0xa2,0xe8,0x70,0xa2,0xae,0xe4,0x51,0xc2,0x46,0x3e,0x78,0x21, // 00007220 |..+...p...Q.F>x!|
+0x18,0x81,0x8a,0xc2,0x12,0xc6,0xa9,0x45,0x86,0xcc,0xf0,0xa1,0xda,0x28,0xbc,0x15, // 00007230 |.......E.....(..|
+0x78,0x40,0x6c,0xc1,0xa7,0x0a,0x6d,0xa5,0x62,0xc4,0xc1,0x4d,0xe5,0x2e,0xce,0x4e, // 00007240 |x@l...m.b..M...N|
+0x55,0x70,0x6f,0x7a,0xc3,0x3a,0x58,0x23,0xfb,0x22,0xbf,0x9f,0x26,0x9e,0xe1,0x6f, // 00007250 |Upoz.:X#."..&..o|
+0x41,0x6d,0x80,0xb4,0x3e,0x8c,0x82,0x2f,0x90,0x0e,0xc5,0x87,0xa5,0xc9,0x38,0x14, // 00007260 |Am..>../......8.|
+0x0e,0x0e,0x50,0x25,0x05,0x52,0xe9,0x7c,0xa6,0xf7,0x1c,0xb5,0x34,0xaa,0x1c,0x8e, // 00007270 |..P%.R.|....4...|
+0x08,0x6f,0x68,0x2a,0x61,0xa5,0xf1,0x19,0xff,0x6e,0xe9,0xe4,0x6d,0x6c,0x7f,0xbf, // 00007280 |.oh*a....n..ml..|
+0xa1,0x6c,0xb5,0x83,0x1a,0x04,0xe9,0x16,0x29,0x54,0x26,0xe3,0x71,0x3d,0x66,0x28, // 00007290 |.l......)T&.q=f(|
+0x79,0x14,0x6f,0x19,0xb8,0xda,0xe9,0x40,0xdd,0x81,0x5c,0x53,0xa0,0xf1,0x89,0xbc, // 000072a0 |y.o....@..\S....|
+0x31,0xb8,0x36,0x20,0x88,0xc9,0x1f,0xab,0x8e,0xd8,0x26,0x99,0xb7,0x45,0x82,0x93, // 000072b0 |1.6 ......&..E..|
+0xb2,0x80,0x9d,0x21,0x6b,0x50,0xc6,0x39,0x55,0x6b,0x64,0x0c,0x72,0xb2,0xa3,0xe7, // 000072c0 |...!kP.9Ukd.r...|
+0x09,0xe8,0xeb,0x4a,0xce,0xeb,0xe0,0xe1,0x76,0x93,0xea,0x1d,0xcd,0x7f,0xab,0x02, // 000072d0 |...J....v.......|
+0x0d,0xe9,0x45,0xc5,0xc9,0xad,0x52,0x23,0x10,0xaa,0x49,0x8f,0xd8,0x12,0x6d,0xfb, // 000072e0 |..E...R#..I...m.|
+0x8b,0xd9,0x39,0xe5,0xea,0x74,0x17,0x9d,0xe4,0x07,0x53,0xc3,0xb7,0x02,0xee,0xdf, // 000072f0 |..9..t....S.....|
+0xdf,0x11,0x3b,0xb7,0x44,0x2b,0x24,0x1d,0x09,0x36,0x2e,0x0c,0x61,0x92,0x8b,0xae, // 00007300 |..;.D+$..6..a...|
+0x82,0x75,0xf0,0x96,0x80,0xae,0x53,0xb5,0xa3,0x49,0x1b,0x64,0xb7,0x96,0x21,0x7b, // 00007310 |.u....S..I.d..!{|
+0xa3,0xe1,0x9b,0xee,0x1b,0xf4,0x6e,0x7c,0xec,0x10,0x1c,0xbb,0x33,0xe8,0xe2,0x4e, // 00007320 |......n|....3..N|
+0x2e,0x42,0xe6,0xb6,0x76,0x94,0x36,0x31,0x60,0x98,0xbf,0x10,0x78,0x0d,0xbb,0x95, // 00007330 |.B..v.61`...x...|
+0xa5,0xf0,0x40,0x70,0xb1,0x9b,0x16,0x43,0x3e,0xfd,0xef,0x01,0x98,0x5c,0xda,0x89, // 00007340 |..@p...C>....\..|
+0x26,0xad,0xc1,0xf2,0x96,0x13,0xb0,0xb7,0x04,0x4d,0x8b,0xc6,0x06,0xd8,0xb7,0xe2, // 00007350 |&........M......|
+0x36,0xe2,0x09,0x5b,0xe5,0x14,0x31,0xad,0x22,0xfc,0x69,0xc2,0xed,0x05,0x4b,0x66, // 00007360 |6..[..1.".i...Kf|
+0x0d,0x2a,0x97,0x92,0x3d,0xfc,0x59,0xd3,0xe6,0x9e,0xca,0x97,0x16,0x88,0x9b,0xad, // 00007370 |.*..=.Y.........|
+0x03,0xb1,0x89,0xfd,0xe9,0xf8,0x73,0x7d,0xb9,0xbe,0x95,0x52,0x3b,0x2f,0x23,0xbb, // 00007380 |......s}...R;/#.|
+0x5c,0xb2,0x9b,0x1a,0x25,0x91,0xf4,0x9f,0xca,0xb0,0x80,0xa5,0xff,0x80,0xba,0x72, // 00007390 |\...%..........r|
+0x32,0x62,0x53,0x95,0x6c,0x30,0x8f,0x1f,0x2a,0x33,0x4e,0x70,0x2b,0x25,0xff,0x02, // 000073a0 |2bS.l0..*3Np+%..|
+0xfb,0xf3,0xab,0x6b,0x8b,0x20,0xec,0xf4,0x4c,0x58,0x99,0xfe,0x11,0xbd,0x1d,0x9d, // 000073b0 |...k. ..LX......|
+0xa0,0x5c,0x5a,0xcf,0x46,0x67,0xca,0x2a,0xd5,0xd2,0x51,0xba,0x85,0x0a,0x96,0x85, // 000073c0 |.\Z.Fg.*..Q.....|
+0x46,0xfd,0xb4,0x1d,0xad,0x98,0x90,0x23,0xf2,0xab,0x17,0x68,0x86,0x09,0x57,0x43, // 000073d0 |F......#...h..WC|
+0xbe,0x92,0x12,0x89,0xa9,0xf4,0x59,0x86,0xb2,0xbb,0xef,0xb3,0x2d,0x9e,0xa2,0xf3, // 000073e0 |......Y.....-...|
+0x69,0xbb,0xf8,0xb8,0x71,0x03,0xda,0x04,0x80,0x88,0xa1,0xb3,0x75,0x7b,0x11,0x0c, // 000073f0 |i...q.......u{..|
+0xd2,0x7c,0x22,0xd3,0x48,0xe0,0x0a,0x75,0x83,0xd1,0x0b,0x0a,0xc8,0x54,0x12,0xce, // 00007400 |.|".H..u.....T..|
+0xce,0x7d,0xdb,0x7c,0x98,0xa0,0x65,0xdc,0x9f,0xbb,0xfa,0x3e,0x46,0xd3,0xa3,0xd3, // 00007410 |.}.|..e....>F...|
+0xde,0x3f,0x37,0xcc,0x8b,0x79,0x08,0x05,0x2d,0x98,0xfb,0x66,0x3e,0x61,0x7f,0x8e, // 00007420 |.?7..y..-..f>a..|
+0xc5,0xc0,0xff,0x19,0x13,0x9d,0x15,0x6a,0xda,0xc8,0x1f,0xd0,0x58,0x3e,0x4b,0x48, // 00007430 |.......j....X>KH|
+0x3c,0x0f,0xc7,0x7f,0xc8,0x51,0xe9,0x60,0x5f,0xc9,0x5e,0x46,0x76,0x64,0x49,0x14, // 00007440 |<....Q.`_.^FvdI.|
+0x71,0xdb,0xb9,0x66,0xf0,0xcb,0x68,0xcc,0x95,0x5a,0xfc,0x1c,0x4b,0x03,0x5c,0x13, // 00007450 |q..f..h..Z..K.\.|
+0xa2,0x81,0xda,0x2d,0x47,0x83,0xbf,0x73,0x48,0x34,0x9c,0xa3,0xad,0x2d,0xe3,0xf2, // 00007460 |...-G..sH4...-..|
+0xf7,0x09,0x8d,0xbf,0x52,0xf6,0xcf,0x19,0x96,0xad,0xca,0x81,0x3e,0x97,0xbf,0xb1, // 00007470 |....R.......>...|
+0x20,0x59,0x47,0xcb,0x04,0xf6,0xd8,0x74,0x0d,0xa4,0x86,0x50,0xc8,0x27,0xe7,0xf4, // 00007480 | YG....t...P.'..|
+0x70,0x0e,0xdc,0x55,0x31,0x05,0xb8,0x29,0x65,0x1d,0xb6,0xd9,0x0c,0xef,0xfd,0xa3, // 00007490 |p..U1..)e.......|
+0x9f,0x31,0xce,0x52,0x51,0x9b,0x2b,0x63,0x39,0x24,0x2d,0xc7,0x3d,0x1d,0x8d,0x2d, // 000074a0 |.1.RQ.+c9$-.=..-|
+0xf2,0x17,0x11,0x75,0x97,0x1e,0x54,0xa3,0xe6,0xc4,0xc1,0xb1,0x61,0xc8,0x90,0xe2, // 000074b0 |...u..T.....a...|
+0x12,0x94,0x1a,0x76,0xa2,0x74,0x9a,0x82,0x35,0xc1,0xd5,0x40,0x3a,0x29,0x41,0x54, // 000074c0 |...v.t..5..@:)AT|
+0xee,0xa5,0x06,0x7c,0x24,0x2e,0x6b,0xbb,0x7e,0x44,0x8a,0xef,0x0e,0x35,0xe1,0xe5, // 000074d0 |...|$.k.~D...5..|
+0xed,0xee,0x13,0x56,0xf1,0x51,0x07,0x36,0x40,0x1e,0x7b,0xcd,0x55,0x8e,0x4d,0xe7, // 000074e0 |...V.Q.6@.{.U.M.|
+0x80,0xe9,0xfb,0x35,0x06,0xab,0xc8,0x85,0x0d,0xc5,0xb8,0x77,0x5a,0x3b,0x6a,0x03, // 000074f0 |...5.......wZ;j.|
+0x89,0xd5,0x9e,0x8c,0x43,0xdc,0x80,0x1e,0xcd,0x73,0xfc,0xa2,0x4b,0x9d,0xa8,0x17, // 00007500 |....C....s..K...|
+0xc0,0x25,0xd0,0x65,0x95,0x59,0xb3,0xa8,0xb9,0x5c,0x56,0x12,0x6f,0x02,0x3c,0x38, // 00007510 |.%.e.Y...\V.o.<8|
+0xf6,0xdc,0x20,0x26,0x4f,0x82,0x8d,0x7d,0xb5,0x8a,0x7a,0xde,0x5b,0xad,0x2a,0xaf, // 00007520 |.. &O..}..z.[.*.|
+0x2f,0x0c,0x66,0xce,0x1f,0xf8,0xe4,0x6e,0xcb,0xd4,0x78,0x85,0x30,0xfe,0xbc,0xbe, // 00007530 |/.f....n..x.0...|
+0xbb,0x05,0x3e,0xd2,0x71,0xfc,0xae,0x15,0x85,0x1e,0xe8,0xe6,0xbd,0xc3,0x3a,0xf4, // 00007540 |..>.q.........:.|
+0x5d,0xa8,0x23,0xb1,0x71,0x92,0xf1,0x65,0xb3,0xf6,0x28,0xb9,0x6a,0xc1,0xd3,0xd1, // 00007550 |].#.q..e..(.j...|
+0xe5,0x74,0x18,0xef,0x9f,0x64,0xa0,0xd9,0x85,0x51,0xdb,0x04,0x37,0x7f,0x38,0x88, // 00007560 |.t...d...Q..7.8.|
+0x9a,0x1a,0xf4,0x91,0x11,0x10,0x69,0x05,0xab,0x4c,0xe2,0xae,0x65,0x1f,0x1a,0x0d, // 00007570 |......i..L..e...|
+0xba,0x4c,0x7a,0x1b,0xab,0x95,0x3e,0xb4,0xdd,0x77,0x38,0xa1,0x7b,0x40,0x30,0x3f, // 00007580 |.Lz...>..w8.{@0?|
+0x8b,0x84,0xef,0xad,0x6b,0x25,0x76,0x78,0xd8,0x18,0xf6,0x9c,0xd3,0x0e,0x76,0xc5, // 00007590 |....k%vx......v.|
+0xbd,0x4d,0xc7,0x59,0x63,0x11,0x5f,0xbd,0x8b,0xb7,0x04,0xe4,0x81,0x2b,0x2b,0x09, // 000075a0 |.M.Yc._......++.|
+0xfa,0x52,0xcf,0x22,0x80,0xee,0x89,0xed,0x12,0xfc,0xd3,0x3f,0x26,0xc9,0xd5,0x85, // 000075b0 |.R.".......?&...|
+0x09,0x8a,0x18,0x5e,0x08,0xc9,0xa0,0x72,0x02,0x6e,0x35,0xa2,0x09,0xcb,0x65,0x49, // 000075c0 |...^...r.n5...eI|
+0x33,0xe4,0xe9,0xe6,0xff,0x37,0x00,0xac,0xa6,0x7b,0xb5,0x34,0xfe,0xf5,0x16,0x0e, // 000075d0 |3....7...{.4....|
+0xb0,0x43,0xe7,0x94,0xa1,0x6c,0xce,0xe4,0xc0,0xad,0x53,0xe2,0xf6,0x03,0x61,0x98, // 000075e0 |.C...l....S...a.|
+0xf8,0x25,0x2a,0x1b,0xe7,0xaf,0x6e,0xe2,0x3d,0xc0,0xcc,0xe1,0x27,0xb4,0x87,0x7c, // 000075f0 |.%*...n.=...'..||
+0xc3,0xe9,0x24,0x78,0xc8,0xe5,0xf9,0x9c,0xc4,0x1c,0x94,0xa3,0x2c,0xce,0x7f,0x9c, // 00007600 |..$x........,...|
+0x5a,0x82,0x24,0xb7,0xb3,0x4d,0x06,0x0d,0x73,0x61,0x9f,0xa0,0x64,0x7a,0x6d,0x53, // 00007610 |Z.$..M..sa..dzmS|
+0x92,0x98,0xcd,0x10,0x6e,0x42,0x14,0x07,0x1a,0xa8,0xb9,0x48,0x91,0x70,0x3c,0xea, // 00007620 |....nB.....H.p<.|
+0xb3,0x02,0xe1,0x37,0x63,0x2d,0xad,0x08,0x71,0x25,0xba,0xfe,0x00,0xd9,0xbc,0x5c, // 00007630 |...7c-..q%.....\|
+0xcf,0x4a,0x8e,0x70,0xa1,0x9c,0xd3,0x51,0xf2,0xe0,0xc6,0x29,0x31,0x4d,0x45,0xb5, // 00007640 |.J.p...Q...)1ME.|
+0x86,0x70,0x1a,0xf9,0xfd,0x4f,0x56,0x56,0xd1,0xb9,0x9b,0x83,0x33,0x5c,0xaa,0xef, // 00007650 |.p...OVV....3\..|
+0xec,0xa1,0x58,0x9a,0xf2,0x8d,0x6d,0xa9,0xe9,0x18,0xe3,0x63,0xed,0x97,0xfa,0x38, // 00007660 |..X...m....c...8|
+0x53,0xe5,0x7c,0x2b,0xe0,0xb6,0x86,0x87,0xdf,0x3e,0x8f,0xaf,0xd4,0xaf,0x3b,0xa2, // 00007670 |S.|+.....>....;.|
+0xdb,0x4a,0x5c,0x97,0x88,0x49,0x59,0x68,0x26,0xb5,0x2f,0x30,0x6c,0xc4,0x3b,0xd6, // 00007680 |.J\..IYh&./0l.;.|
+0xf5,0xab,0xed,0x44,0xdf,0xf5,0x17,0x93,0x89,0x20,0x60,0xb4,0xae,0xd4,0x10,0x76, // 00007690 |...D..... `....v|
+0xfd,0xd5,0xb7,0x21,0xbb,0x24,0xe9,0x03,0x76,0xf4,0xfa,0x6a,0x7e,0xe7,0x05,0xab, // 000076a0 |...!.$..v..j~...|
+0xfc,0x53,0x73,0x65,0xeb,0x79,0x37,0xf6,0x4e,0xb3,0xea,0xb5,0xc6,0xb6,0xba,0x76, // 000076b0 |.Sse.y7.N......v|
+0x5d,0x1d,0xd1,0x5a,0x26,0xa0,0x77,0x4b,0xde,0x42,0xe8,0xdd,0x3f,0x3b,0x47,0x69, // 000076c0 |]..Z&.wK.B..?;Gi|
+0xab,0x7a,0x91,0x98,0x19,0x77,0xd4,0x3a,0x17,0xfa,0xe6,0xb7,0x96,0xa0,0x09,0xf9, // 000076d0 |.z...w.:........|
+0x93,0x41,0x28,0xe8,0x73,0xa1,0x13,0x31,0x16,0x08,0x79,0x4b,0x59,0xf4,0x90,0x52, // 000076e0 |.A(.s..1..yKY..R|
+0xe5,0x8b,0xa5,0xe3,0x52,0x4a,0x55,0xfd,0x7f,0xe8,0x4f,0xfd,0xa7,0x78,0xf9,0xa0, // 000076f0 |....RJU...O..x..|
+0x14,0x7d,0x49,0x9e,0x14,0xd6,0x5a,0xcb,0xe9,0xd9,0x52,0x04,0xb0,0xb9,0x5d,0x93, // 00007700 |.}I...Z...R...].|
+0xa4,0x84,0x73,0x6f,0xd5,0x83,0x3d,0xb9,0x3c,0x75,0x90,0x26,0x1c,0x6e,0x5b,0x67, // 00007710 |..so..=.<u.&.n[g|
+0xf6,0x73,0x98,0x71,0xc2,0x78,0x35,0xc1,0xf6,0x48,0x88,0xc3,0x31,0x67,0x14,0x52, // 00007720 |.s.q.x5..H..1g.R|
+0x37,0x1d,0x2d,0xcb,0xcd,0x1c,0xd2,0x72,0xd4,0x68,0xe4,0xc6,0xb4,0x8a,0x87,0x0b, // 00007730 |7.-....r.h......|
+0x6d,0xdf,0xb2,0xfa,0x9d,0xd8,0x52,0x0b,0x60,0x6d,0x25,0xd9,0x94,0x6a,0x74,0x7b, // 00007740 |m.....R.`m%..jt{|
+0x6b,0xbc,0x54,0x65,0xd1,0xca,0xd1,0x7d,0x59,0x31,0xc1,0x42,0x92,0x6a,0x24,0xc2, // 00007750 |k.Te...}Y1.B.j$.|
+0xff,0x6c,0x52,0x5e,0xdd,0x4e,0x8e,0x91,0xe6,0x30,0x7f,0x3d,0xac,0x68,0xf6,0x73, // 00007760 |.lR^.N...0.=.h.s|
+0x20,0xa8,0xf9,0x2e,0x8c,0x64,0x3a,0x92,0x37,0x86,0xe8,0x09,0xab,0x99,0x54,0x10, // 00007770 | ....d:.7.....T.|
+0xb8,0xc2,0xc1,0x57,0x41,0x7e,0x32,0x7b,0x7f,0xd5,0xc0,0x39,0xe1,0xf5,0xeb,0x3b, // 00007780 |...WA~2{...9...;|
+0x4d,0x7d,0xfa,0x3b,0x2d,0xcd,0x5b,0xd7,0x08,0xf8,0x83,0x39,0x6d,0x41,0xd7,0xd2, // 00007790 |M}.;-.[....9mA..|
+0x51,0x3e,0x7e,0x74,0x2a,0xd5,0x0b,0xd5,0x9b,0xec,0x71,0x6e,0x51,0x21,0x9e,0xf0, // 000077a0 |Q>~t*.....qnQ!..|
+0xcf,0x40,0xbc,0x64,0x59,0x30,0x78,0xa2,0xda,0xc6,0xca,0xe3,0x26,0xe1,0x89,0x64, // 000077b0 |.@.dY0x.....&..d|
+0x18,0x3d,0xa6,0x2c,0x7c,0x15,0x5e,0x56,0x7d,0x5a,0x24,0x5b,0x3b,0xd7,0x46,0x12, // 000077c0 |.=.,|.^V}Z$[;.F.|
+0xee,0xf4,0x11,0x78,0x07,0x56,0x7e,0x42,0xeb,0x76,0x76,0x3e,0xf1,0xae,0x19,0x1b, // 000077d0 |...x.V~B.vv>....|
+0x76,0xfb,0x91,0x13,0x6b,0x6a,0x80,0x65,0x31,0xb3,0xe2,0xb9,0x46,0x71,0xd9,0x5a, // 000077e0 |v...kj.e1...Fq.Z|
+0x69,0xf7,0x1b,0xa2,0x8c,0xa2,0x94,0x38,0xce,0xaf,0xf9,0x80,0x2a,0x03,0x3b,0xf1, // 000077f0 |i......8....*.;.|
+0x95,0xbe,0xef,0xfc,0x70,0xc7,0xbf,0x3c,0xe9,0x17,0x7b,0x4e,0x82,0x7e,0xe8,0x87, // 00007800 |....p..<..{N.~..|
+0x14,0xfc,0xf4,0xfd,0xcc,0xbe,0x23,0xc9,0x11,0x5d,0x70,0x33,0x51,0xd7,0x38,0x2c, // 00007810 |......#..]p3Q.8,|
+0x0c,0xa8,0xd9,0x1f,0x6f,0xf1,0x4c,0x71,0x0a,0x33,0x15,0x9d,0x51,0x1c,0xcb,0x81, // 00007820 |....o.Lq.3..Q...|
+0x30,0xb5,0x6b,0xdc,0xda,0x2c,0x64,0x4a,0x88,0x27,0xb7,0xf0,0xb4,0x11,0xf1,0xbc, // 00007830 |0.k..,dJ.'......|
+0x13,0x41,0x2f,0xe3,0xbe,0x8b,0xab,0xad,0x43,0x85,0xe8,0x4c,0xbd,0xde,0x60,0x43, // 00007840 |.A/.....C..L..`C|
+0x26,0xb0,0x2c,0x3e,0x14,0xe5,0x69,0x23,0xe6,0xf0,0xec,0x91,0x88,0xce,0x92,0xcc, // 00007850 |&.,>..i#........|
+0x92,0x6f,0x5b,0x57,0x4f,0x54,0xad,0x35,0xfb,0xf9,0x91,0xf6,0x8f,0x04,0xb0,0x46, // 00007860 |.o[WOT.5.......F|
+0xb3,0x09,0xa1,0xf1,0xd2,0xac,0xf6,0x9e,0x1b,0xe2,0x99,0xb9,0x0b,0xf0,0xd9,0x8a, // 00007870 |................|
+0xce,0x00,0x96,0xcc,0xe7,0xf7,0xf8,0xd1,0x42,0xd5,0x75,0x73,0x14,0xe0,0xd3,0xf8, // 00007880 |........B.us....|
+0x5e,0xc6,0x68,0x4a,0x69,0x94,0x6c,0x54,0xb7,0x8e,0xa2,0xbd,0x3e,0x82,0xac,0x40, // 00007890 |^.hJi.lT....>..@|
+0x28,0xe5,0x41,0x06,0x86,0xfe,0xe3,0x4b,0x91,0xdc,0x25,0x41,0xd7,0x6e,0x27,0x87, // 000078a0 |(.A....K..%A.n'.|
+0xd0,0x8e,0xd5,0x8d,0xb7,0x49,0x0c,0x4b,0x10,0xc5,0x6b,0xf4,0x25,0xb8,0xa8,0x01, // 000078b0 |.....I.K..k.%...|
+0x39,0x81,0x36,0x9d,0x92,0x24,0x14,0x29,0xca,0xa0,0xf8,0xc6,0x43,0x58,0xcd,0xfd, // 000078c0 |9.6..$.)....CX..|
+0xea,0xbd,0x83,0x15,0x19,0xef,0xfa,0x0f,0xa3,0xea,0x6d,0x32,0x8b,0x69,0x65,0xc2, // 000078d0 |..........m2.ie.|
+0x90,0x95,0xbc,0x98,0xc9,0x2a,0xe0,0xd3,0x14,0x93,0x01,0x99,0xf6,0xe9,0x94,0x5f, // 000078e0 |.....*........._|
+0x8d,0x54,0x55,0xfb,0xd5,0xf4,0x84,0x1c,0x2b,0xdb,0xbe,0x93,0x13,0xb7,0xd5,0xb8, // 000078f0 |.TU.....+.......|
+0x3e,0x19,0xc7,0x21,0x17,0x85,0xe2,0xd3,0xf8,0xfc,0x99,0x8a,0x67,0x1d,0xb3,0xe5, // 00007900 |>..!........g...|
+0xe1,0x92,0x89,0x28,0x0a,0xd9,0xe2,0x36,0x45,0x87,0x6b,0x67,0x74,0x37,0x00,0x83, // 00007910 |...(...6E.kgt7..|
+0x90,0x93,0xbc,0xd9,0x16,0x20,0x18,0x4f,0xf9,0xac,0x67,0x97,0x25,0x3f,0xdd,0x54, // 00007920 |..... .O..g.%?.T|
+0x62,0x54,0xff,0xbf,0x87,0xbb,0xba,0x3b,0xe5,0xc1,0xee,0xe1,0x7b,0x8d,0x46,0x58, // 00007930 |bT.....;....{.FX|
+0x26,0x8c,0x2d,0x34,0x46,0x26,0x94,0xa3,0x53,0xf1,0x27,0x76,0xfd,0x4a,0xad,0x8f, // 00007940 |&.-4F&..S.'v.J..|
+0xea,0x08,0x7d,0x27,0xf1,0x10,0x81,0xfc,0xa2,0xd4,0x35,0x0b,0x4c,0xf4,0xbe,0xf3, // 00007950 |..}'......5.L...|
+0x11,0xa8,0xdf,0x69,0xbf,0x73,0x9a,0x0d,0x76,0x45,0xbe,0x10,0xeb,0xe4,0xae,0x6b, // 00007960 |...i.s..vE.....k|
+0x69,0x70,0x1a,0x4b,0x37,0x6d,0x22,0xe1,0xc2,0x0e,0xa5,0x37,0x8f,0x7f,0xdd,0x6f, // 00007970 |ip.K7m"....7...o|
+0xa5,0xcb,0x23,0x70,0x84,0x2c,0x7c,0x36,0xa5,0x25,0xe9,0xae,0xfe,0x7d,0x78,0x92, // 00007980 |..#p.,|6.%...}x.|
+0x88,0x3d,0x56,0x06,0x45,0xcb,0x20,0x2a,0x12,0x2f,0xe1,0x5e,0xe0,0xbe,0x30,0x24, // 00007990 |.=V.E. *./.^..0$|
+0xb1,0xad,0xae,0x3a,0xfb,0xa8,0x67,0xfe,0xa0,0xc9,0x36,0x42,0x8c,0x54,0xd7,0xf8, // 000079a0 |...:..g...6B.T..|
+0x5e,0x08,0xd8,0x30,0x05,0x05,0xc3,0xb3,0x73,0x0a,0x52,0x4f,0xfc,0x0a,0xeb,0x2b, // 000079b0 |^..0....s.RO...+|
+0x1b,0xa9,0xcf,0xa5,0xb7,0x3b,0x63,0x7e,0x72,0xfb,0xa4,0x68,0x8c,0x30,0xee,0xef, // 000079c0 |.....;c~r..h.0..|
+0x9a,0x28,0xf1,0x76,0x0a,0x66,0xdc,0x5c,0x71,0xa0,0x94,0x77,0xf9,0x3f,0xa6,0xc5, // 000079d0 |.(.v.f.\q..w.?..|
+0x32,0xae,0xdc,0xad,0x85,0xbc,0xec,0x18,0xe8,0xd7,0x6c,0x2d,0x71,0x6f,0x40,0x67, // 000079e0 |2.........l-qo@g|
+0xa0,0xe1,0x9e,0x91,0x6f,0xc8,0xdd,0x80,0xc8,0x9a,0xff,0x99,0x35,0xb6,0xd5,0xfa, // 000079f0 |....o.......5...|
+0x0c,0x0f,0x7f,0xe1,0x36,0x2b,0x0a,0x11,0xbf,0x50,0x9d,0x44,0x1c,0xcc,0xa2,0x02, // 00007a00 |....6+...P.D....|
+0xbd,0x8b,0x6f,0x03,0x3f,0xfc,0x7f,0xeb,0x5a,0x5f,0x24,0xeb,0x11,0x97,0x8f,0x75, // 00007a10 |..o.?...Z_$....u|
+0xf8,0x26,0x33,0x97,0xd3,0xcb,0x1c,0x05,0xfd,0x51,0x5c,0xf8,0x94,0x97,0xf6,0xfc, // 00007a20 |.&3......Q\.....|
+0xe2,0x32,0xd6,0xa8,0xf9,0x1f,0x21,0xb1,0xac,0xbf,0x2f,0x1a,0xb1,0xdf,0x42,0xef, // 00007a30 |.2....!.../...B.|
+0x69,0x48,0x51,0xd7,0x6f,0xc0,0x38,0x19,0x93,0x5f,0x07,0xf6,0x1b,0x2e,0xae,0xff, // 00007a40 |iHQ.o.8.._......|
+0x1b,0x4e,0xe0,0x5b,0x36,0x36,0x9c,0xd3,0x17,0xf6,0x14,0x5e,0x89,0x7b,0xc4,0xff, // 00007a50 |.N.[66.....^.{..|
+0xca,0xe2,0x17,0xe0,0x40,0x33,0xa1,0xdd,0x46,0xe4,0x22,0x46,0xaa,0xd0,0xc3,0x8b, // 00007a60 |....@3..F."F....|
+0xa8,0x20,0x61,0x59,0xd6,0xbd,0x05,0x6a,0x09,0x53,0x0d,0xec,0x78,0x18,0x68,0xcf, // 00007a70 |. aY...j.S..x.h.|
+0x59,0xda,0x22,0x52,0x88,0xbb,0x74,0xd9,0xd5,0xd7,0xbb,0x91,0x1c,0x6e,0x93,0x86, // 00007a80 |Y."R..t......n..|
+0xd8,0xba,0x6e,0x26,0x40,0xda,0x6c,0xba,0x18,0x72,0xda,0x1a,0x8e,0x5a,0xf9,0xb3, // 00007a90 |..n&@.l..r...Z..|
+0x17,0xeb,0x89,0xfe,0xa0,0x39,0xa2,0x79,0x4c,0x39,0x49,0xd8,0x62,0x28,0x6b,0x22, // 00007aa0 |.....9.yL9I.b(k"|
+0x45,0x43,0x13,0x20,0x2b,0x76,0x3d,0xf7,0xa9,0xe5,0xc4,0xec,0x57,0xcd,0xf0,0xeb, // 00007ab0 |EC. +v=.....W...|
+0x1f,0xed,0xe8,0xab,0xe5,0x15,0xa6,0xea,0x87,0x0f,0xa3,0x60,0x1f,0x34,0x08,0xf8, // 00007ac0 |...........`.4..|
+0x23,0xa3,0xc4,0x3e,0x51,0x0b,0xdc,0x9e,0xe6,0x2b,0xd9,0x8a,0x1f,0xed,0x62,0xe7, // 00007ad0 |#..>Q....+....b.|
+0x5f,0x94,0xc4,0xef,0x4d,0x44,0x94,0x56,0x07,0x78,0x6c,0x82,0xcb,0x3a,0xe9,0x00, // 00007ae0 |_...MD.V.xl..:..|
+0xaf,0xd8,0x01,0x90,0x5b,0xb1,0x42,0x9d,0x85,0x4a,0x5d,0xf6,0xd1,0x5c,0xfa,0x32, // 00007af0 |....[.B..J]..\.2|
+0xb8,0xf6,0xc4,0x4d,0x23,0x01,0x31,0xb6,0x5c,0x87,0x63,0xf7,0xac,0xa2,0xfb,0xf8, // 00007b00 |...M#.1.\.c.....|
+0x8f,0xc2,0x95,0xce,0x8a,0x63,0xda,0x74,0x7f,0x82,0x19,0x56,0x83,0x9b,0x92,0x65, // 00007b10 |.....c.t...V...e|
+0xdf,0xf2,0x1d,0xcc,0x39,0xae,0x16,0x87,0xbe,0x8d,0x55,0x6a,0xb8,0x0c,0x22,0x4c, // 00007b20 |....9.....Uj.."L|
+0x9b,0x48,0x21,0xff,0x10,0xcb,0x51,0x46,0xda,0x43,0x95,0x6a,0x9b,0x40,0xc7,0xe9, // 00007b30 |.H!...QF.C.j.@..|
+0xb2,0x01,0xde,0x1d,0x1e,0xb3,0x8b,0xa5,0x1a,0x3b,0x5d,0xdd,0xf3,0x8e,0x0d,0xad, // 00007b40 |.........;].....|
+0xb0,0x05,0x15,0x4d,0x18,0x6c,0xbd,0x29,0x65,0x15,0x2d,0x75,0xd1,0x46,0x81,0xa4, // 00007b50 |...M.l.)e.-u.F..|
+0xe5,0x1a,0x32,0x6a,0xb1,0x8a,0x01,0x79,0x7a,0x05,0xa4,0x28,0x94,0x69,0xc8,0x90, // 00007b60 |..2j...yz..(.i..|
+0x6d,0x3b,0xa4,0x57,0x9e,0x72,0xc5,0x0c,0x42,0x07,0x16,0x12,0x79,0x90,0x09,0x26, // 00007b70 |m;.W.r..B...y..&|
+0xd1,0xcc,0x77,0x64,0x4b,0xa2,0x58,0x6f,0xec,0x6e,0x40,0x74,0xab,0x87,0x1a,0x8a, // 00007b80 |..wdK.Xo.n@t....|
+0x6e,0xcc,0x9b,0xb1,0xf4,0x76,0x12,0xbf,0x6b,0x04,0xe9,0x7c,0xd7,0xe9,0x6e,0x19, // 00007b90 |n....v..k..|..n.|
+0xf8,0x5f,0xf4,0xca,0x86,0x64,0x46,0x38,0xd8,0x2d,0xc7,0x27,0xdf,0x8a,0x95,0x9a, // 00007ba0 |._...dF8.-.'....|
+0xd9,0x07,0x23,0x6e,0x7e,0xf7,0xfa,0x3e,0x9b,0xcf,0x8f,0x87,0x02,0x87,0x57,0xee, // 00007bb0 |..#n~..>......W.|
+0xa5,0x4b,0x89,0x8c,0x94,0xfd,0x7c,0x23,0x9d,0x48,0xbb,0xa7,0x77,0x67,0xbd,0x31, // 00007bc0 |.K....|#.H..wg.1|
+0x1f,0x98,0x14,0x5a,0xea,0x6d,0x62,0x21,0x00,0xf9,0xf0,0xb7,0xa2,0xd5,0x56,0x2a, // 00007bd0 |...Z.mb!......V*|
+0x3e,0x89,0xf1,0x52,0x8b,0x0b,0x04,0x7e,0x78,0xaa,0x64,0x27,0xb3,0xe4,0x38,0x13, // 00007be0 |>..R...~x.d'..8.|
+0xe4,0x7d,0xba,0x2f,0x33,0x2d,0x9c,0xa2,0x4f,0x59,0xef,0x87,0xf3,0x66,0xf9,0x9c, // 00007bf0 |.}./3-..OY...f..|
+0xc6,0x6f,0x2c,0xec,0xb1,0x3e,0x0c,0xeb,0xd7,0xc4,0x9d,0xd3,0x26,0x5a,0x5a,0x24, // 00007c00 |.o,..>......&ZZ$|
+0x78,0x48,0xe0,0x75,0x8d,0x58,0xc1,0x8b,0xd7,0xce,0x02,0xfb,0xa0,0xd5,0x13,0x92, // 00007c10 |xH.u.X..........|
+0x23,0x1f,0xcc,0xb3,0x0a,0x42,0x59,0xb0,0xf4,0x2f,0xea,0xa5,0xf8,0x81,0xf0,0x03, // 00007c20 |#....BY../......|
+0x36,0x81,0x65,0xd0,0x2e,0xef,0x76,0xff,0x27,0x05,0x18,0x3d,0x6d,0xe1,0x94,0x9e, // 00007c30 |6.e...v.'..=m...|
+0x41,0x01,0x7c,0x09,0x8e,0x07,0xc9,0xb3,0xae,0xbb,0x70,0x7d,0x18,0x07,0xe6,0xa8, // 00007c40 |A.|.......p}....|
+0x39,0xa9,0xf3,0x45,0x70,0xca,0x67,0x2f,0xa3,0x23,0x28,0xe2,0x76,0xbc,0x52,0xaf, // 00007c50 |9..Ep.g/.#(.v.R.|
+0x53,0x29,0x65,0xa9,0xe4,0x48,0x9e,0xa3,0x43,0x37,0x80,0x65,0xec,0x2c,0x33,0x84, // 00007c60 |S)e..H..C7.e.,3.|
+0x3f,0x58,0x9a,0x58,0x1f,0xb7,0x09,0x91,0xe7,0x45,0x07,0x16,0x7a,0x41,0xeb,0xc6, // 00007c70 |?X.X.....E..zA..|
+0xf3,0xf1,0x05,0xc2,0x1d,0x0b,0x1c,0xe8,0xac,0xcb,0x5b,0x61,0x91,0xed,0x1d,0x78, // 00007c80 |..........[a...x|
+0xf8,0x1b,0xf0,0xe9,0x07,0xda,0xa8,0x8c,0xdc,0xd7,0xcf,0xe8,0xe1,0x87,0xd3,0x38, // 00007c90 |...............8|
+0xbd,0x3e,0x55,0xb9,0xa8,0x94,0xc8,0x2e,0x62,0x17,0x06,0x9a,0x47,0x3c,0x20,0x0f, // 00007ca0 |.>U.....b...G< .|
+0x4c,0xdb,0x0b,0x05,0x2e,0xe0,0x6c,0x3a,0x0a,0xa9,0xe9,0x64,0xac,0x7e,0x91,0x8d, // 00007cb0 |L.....l:...d.~..|
+0xe6,0xcf,0x41,0x3b,0x5d,0x85,0x1f,0x2b,0x2e,0x97,0x46,0x0f,0xd5,0x40,0xb8,0x28, // 00007cc0 |..A;]..+..F..@.(|
+0x5a,0x3a,0x86,0xac,0xeb,0x66,0x87,0xfc,0xa1,0xcc,0x0b,0xaa,0x5b,0x07,0xc2,0x2f, // 00007cd0 |Z:...f......[../|
+0x7c,0x92,0xce,0x7f,0xcd,0xaa,0x5b,0x2e,0xb4,0x75,0xa3,0x35,0xd4,0x0b,0xef,0x49, // 00007ce0 ||.....[..u.5...I|
+0x49,0x01,0xa4,0x11,0x69,0xc0,0x8a,0x39,0x72,0xd4,0x1b,0xa1,0xa8,0x3f,0x5e,0xec, // 00007cf0 |I...i..9r....?^.|
+0x3a,0xfd,0x15,0x77,0x5b,0x09,0xa4,0xe9,0xc6,0x30,0xd2,0x60,0x23,0x93,0x21,0xfc, // 00007d00 |:..w[....0.`#.!.|
+0x28,0x50,0xd2,0x49,0xf7,0xbd,0x28,0x66,0x37,0x05,0xe1,0x0a,0xb3,0xd3,0xea,0xb4, // 00007d10 |(P.I..(f7.......|
+0x33,0xd6,0xb8,0xf2,0xd2,0x60,0xa2,0x95,0x22,0x7c,0xaa,0x4e,0x61,0xcc,0xbf,0xef, // 00007d20 |3....`.."|.Na...|
+0xb2,0x85,0xd1,0x07,0x93,0x95,0x93,0x70,0x18,0xca,0xa5,0xbc,0x45,0x99,0x09,0x06, // 00007d30 |.......p....E...|
+0x02,0x98,0xc5,0xcf,0x47,0x23,0x9e,0xe3,0x31,0x95,0x8a,0x0a,0x6e,0xc2,0x96,0x0f, // 00007d40 |....G#..1...n...|
+0xa5,0x59,0xba,0xbc,0x04,0xb3,0x62,0x0a,0x90,0xed,0x58,0x9c,0xe9,0x7b,0xbb,0x0a, // 00007d50 |.Y....b...X..{..|
+0x30,0x66,0xf4,0x42,0xeb,0xcf,0x4a,0xab,0xf7,0x5e,0xf0,0xa7,0x31,0xb2,0x48,0xf0, // 00007d60 |0f.B..J..^..1.H.|
+0xb1,0x24,0x50,0x5d,0x48,0xa8,0xe6,0xa2,0x9a,0x5e,0x2f,0xfb,0xc1,0x44,0xb0,0xf0, // 00007d70 |.$P]H....^/..D..|
+0xeb,0x38,0xac,0x51,0xf5,0x34,0x8e,0xd9,0x7e,0x70,0x34,0x8f,0xa6,0xca,0xc5,0x87, // 00007d80 |.8.Q.4..~p4.....|
+0x66,0x7a,0x5a,0xd9,0x3b,0xc4,0x20,0x07,0x3d,0xd2,0xcc,0xdd,0xfe,0x77,0xdb,0x38, // 00007d90 |fzZ.;. .=....w.8|
+0x67,0xe5,0xb3,0x14,0x62,0x12,0x67,0x6b,0x5c,0x3e,0x6a,0xe0,0xcc,0xb1,0xcf,0xf5, // 00007da0 |g...b.gk\>j.....|
+0x4f,0x83,0xad,0x69,0x89,0x1e,0x5f,0x3f,0x9b,0xe2,0xfb,0x73,0x4b,0xdd,0x93,0xdf, // 00007db0 |O..i.._?...sK...|
+0x1d,0xa1,0x4c,0xd4,0x98,0x86,0x70,0xf6,0x7f,0xf4,0x45,0xf4,0xe7,0xb8,0xb4,0xb3, // 00007dc0 |..L...p...E.....|
+0xb8,0x36,0xc2,0xa5,0xa0,0x75,0xd7,0x2a,0x41,0x52,0xa1,0x41,0x50,0x06,0x0c,0xe7, // 00007dd0 |.6...u.*AR.AP...|
+0x7d,0x57,0x3c,0x1f,0xff,0x52,0xfa,0x80,0x0f,0x33,0x5c,0xcf,0xd4,0x14,0x32,0x7b, // 00007de0 |}W<..R...3\...2{|
+0x14,0x76,0x1b,0xff,0x26,0xbc,0x71,0xd6,0xc8,0x86,0x8c,0x25,0x39,0xa9,0x7b,0x5b, // 00007df0 |.v..&.q....%9.{[|
+0xc7,0xa8,0x92,0x64,0xb7,0x4a,0xd2,0x31,0x30,0x40,0x3b,0x8b,0xf3,0xb8,0x74,0x18, // 00007e00 |...d.J.10@;...t.|
+0xf4,0xaa,0xc8,0xa5,0x34,0x69,0x8c,0x22,0x30,0xf8,0x98,0x04,0x03,0x68,0x15,0xe5, // 00007e10 |....4i."0....h..|
+0x13,0x84,0xc5,0x36,0x10,0x40,0x18,0xf0,0x6d,0xe0,0xb8,0x63,0x0a,0xd3,0x66,0x81, // 00007e20 |...6.@..m..c..f.|
+0x40,0x50,0x53,0x3e,0x5c,0xf2,0x0e,0x30,0x67,0x27,0x34,0x9d,0x67,0xde,0xd0,0xcc, // 00007e30 |@PS>\..0g'4.g...|
+0x62,0xff,0xdf,0x51,0xf8,0x81,0x28,0x52,0x54,0xb9,0x26,0x16,0x22,0xdd,0xb9,0xec, // 00007e40 |b..Q..(RT.&."...|
+0x51,0xcf,0xf7,0xd8,0x8c,0xaf,0x18,0x11,0x2d,0xea,0xdb,0x30,0xfb,0xd7,0x04,0xc5, // 00007e50 |Q.......-..0....|
+0x23,0x16,0x09,0x66,0x30,0xeb,0xe5,0x6a,0xda,0xa5,0xbd,0xb6,0x2e,0x42,0x80,0x01, // 00007e60 |#..f0..j.....B..|
+0x9d,0x94,0x6c,0x34,0xd4,0xb7,0x55,0x30,0xb6,0xf6,0x4e,0x6c,0x6c,0xec,0x17,0xba, // 00007e70 |..l4..U0..Nll...|
+0x7d,0x79,0xec,0x52,0xf3,0xae,0x1b,0x8c,0x57,0x38,0xf7,0x58,0xec,0x88,0x3d,0xc0, // 00007e80 |}y.R....W8.X..=.|
+0xcf,0xf3,0x35,0x1d,0x60,0xb7,0x71,0x4c,0x60,0x59,0xa3,0x52,0x29,0x7c,0x02,0x95, // 00007e90 |..5.`.qL`Y.R)|..|
+0x09,0x1b,0x94,0xa0,0xc0,0x99,0x77,0x93,0xdc,0x5b,0xfc,0x6d,0xeb,0x44,0x2c,0x11, // 00007ea0 |......w..[.m.D,.|
+0x03,0x9a,0x0d,0xc2,0x39,0xaf,0xc9,0x88,0xbf,0xfb,0x1d,0x92,0x56,0x83,0x91,0xaf, // 00007eb0 |....9.......V...|
+0x5c,0x8c,0x29,0xb1,0xd4,0x23,0x13,0x8d,0x8c,0xd3,0xb8,0xda,0xb8,0x1c,0x3e,0xae, // 00007ec0 |\.)..#........>.|
+0x1b,0xa2,0x4c,0x5d,0x34,0xd0,0xbe,0x2f,0xa6,0x7d,0xa0,0x93,0x33,0x8b,0xfe,0x44, // 00007ed0 |..L]4../.}..3..D|
+0xa5,0x68,0x90,0x19,0x16,0x45,0x89,0x92,0x9e,0xe1,0x54,0xbb,0x51,0xa9,0x83,0x62, // 00007ee0 |.h...E....T.Q..b|
+0x2f,0xeb,0xfd,0x56,0x15,0x2e,0x0c,0x2f,0xfd,0xa5,0x34,0xdd,0xaa,0xe2,0x31,0xdc, // 00007ef0 |/..V.../..4...1.|
+0x97,0x1e,0x08,0x58,0xb5,0xde,0x79,0xac,0xd7,0xc8,0x4d,0x27,0xe2,0x7b,0xdb,0xf1, // 00007f00 |...X..y...M'.{..|
+0x97,0x5e,0xd5,0xbc,0x1d,0x5d,0x81,0xe1,0xc2,0xbc,0x10,0xc9,0xab,0x7f,0xd3,0x01, // 00007f10 |.^...]..........|
+0x17,0x6b,0xd0,0xa9,0x05,0xe4,0x95,0xc1,0x47,0x25,0xf5,0x8a,0xfe,0x57,0xd6,0x18, // 00007f20 |.k......G%...W..|
+0x1c,0xf9,0xdd,0xfe,0x66,0x3d,0xcb,0x05,0xea,0x26,0x0e,0xa8,0xb4,0x96,0x54,0xca, // 00007f30 |....f=...&....T.|
+0xc9,0x79,0x09,0xea,0x06,0xb9,0xdd,0xe1,0x75,0x5d,0x94,0xea,0xc0,0x01,0x06,0x5c, // 00007f40 |.y......u].....\|
+0x18,0x1d,0xfd,0xf2,0xaa,0x7f,0x44,0x4b,0xe8,0x26,0xc6,0xa2,0x31,0xd5,0xad,0xcb, // 00007f50 |......DK.&..1...|
+0x17,0xdc,0x35,0x50,0xe2,0xcc,0x37,0xd3,0xd5,0x74,0xc8,0x95,0xaf,0x1e,0xf9,0x24, // 00007f60 |..5P..7..t.....$|
+0xcd,0x78,0x9e,0xc1,0xa8,0xab,0xd5,0x4e,0x22,0xa4,0x24,0x71,0x63,0xd8,0x03,0x80, // 00007f70 |.x.....N".$qc...|
+0x3a,0xb5,0xd9,0xf1,0x11,0x06,0xa2,0x4a,0xfe,0xe5,0xdc,0xf4,0x6c,0xc9,0x03,0xc0, // 00007f80 |:......J....l...|
+0x03,0xc0,0x87,0xab,0x41,0x45,0xb1,0x20,0x99,0xc8,0x7e,0x36,0x05,0x3a,0x89,0x82, // 00007f90 |....AE. ..~6.:..|
+0xdc,0xa2,0x83,0xb8,0x3d,0x11,0xb9,0x3b,0xf7,0x4e,0xbb,0x8f,0xa0,0x7f,0x61,0x17, // 00007fa0 |....=..;.N....a.|
+0x61,0x01,0xaf,0x33,0xfa,0x25,0xf1,0x15,0xd2,0xc1,0xc4,0xbf,0x05,0x5c,0x00,0x62, // 00007fb0 |a..3.%.......\.b|
+0xc1,0xb1,0x2b,0xd7,0x6a,0xab,0x51,0x5c,0x44,0xc0,0x9f,0x4c,0xc9,0x76,0xab,0x62, // 00007fc0 |..+.j.Q\D..L.v.b|
+0x08,0x1f,0x4d,0xa0,0xf9,0xea,0x28,0xfb,0x6d,0xe2,0xa8,0x35,0xd1,0xd2,0x83,0xb6, // 00007fd0 |..M...(.m..5....|
+0x41,0xdb,0x5e,0x84,0x11,0x97,0xcb,0x7c,0x0a,0x48,0x33,0xf1,0xaf,0xd1,0x8b,0xb8, // 00007fe0 |A.^....|.H3.....|
+0xc6,0x5a,0x18,0xd4,0x7d,0xdb,0x8b,0xcf,0xb2,0x73,0x18,0x83,0xb6,0xd5,0x3d,0xf4, // 00007ff0 |.Z..}....s....=.|
+0x38,0x17,0x86,0xd3,0x88,0x8b,0x50,0xe6,0x21,0x60,0xae,0x93,0x10,0xd6,0xbe,0x7a, // 00008000 |8.....P.!`.....z|
+0x34,0x69,0xba,0x3a,0x58,0x80,0xe5,0x0a,0xbb,0x2d,0xd9,0x51,0x86,0x4a,0x15,0xf0, // 00008010 |4i.:X....-.Q.J..|
+0x10,0x40,0xfe,0x81,0xce,0x01,0x74,0xa7,0x9d,0x80,0xae,0x5f,0x32,0x0d,0x61,0xa0, // 00008020 |.@....t...._2.a.|
+0x27,0x2e,0xc0,0xd3,0xce,0xb2,0x3b,0xa7,0x93,0xfa,0x9c,0x0f,0xab,0xfc,0xbd,0x2a, // 00008030 |'.....;........*|
+0x9a,0xcb,0x80,0x37,0xa8,0xb2,0x15,0xdd,0xc4,0xee,0x29,0xff,0xa2,0x3a,0x06,0x6c, // 00008040 |...7......)..:.l|
+0xb1,0x5b,0x9c,0x6e,0x63,0xb9,0x21,0x29,0xff,0x08,0x88,0x49,0x88,0x31,0x36,0xd2, // 00008050 |.[.nc.!)...I.16.|
+0xbc,0xe6,0xd8,0xb6,0x7c,0x1e,0x7d,0xe8,0x7c,0x26,0xc4,0x70,0xf9,0x32,0xc9,0x3b, // 00008060 |....|.}.|&.p.2.;|
+0x4f,0x5f,0x10,0xe2,0x38,0x99,0x92,0x48,0x3a,0x6c,0x35,0x11,0x8c,0xc9,0xeb,0x2f, // 00008070 |O_..8..H:l5..../|
+0x25,0x37,0x2f,0x0f,0x58,0x84,0xfe,0xac,0xcb,0x1e,0x33,0x19,0xd7,0xd1,0x88,0x6e, // 00008080 |%7/.X.....3....n|
+0x90,0x51,0xb5,0x39,0x07,0x44,0x1d,0xb4,0x6a,0xba,0x5f,0x8e,0x5a,0x16,0xbc,0x3f, // 00008090 |.Q.9.D..j._.Z..?|
+0x86,0x95,0x6c,0x85,0x8b,0x42,0x21,0xe9,0x8b,0x20,0x96,0xb3,0x6e,0x42,0x72,0x85, // 000080a0 |..l..B!.. ..nBr.|
+0x4e,0x0b,0x10,0x3b,0xdf,0xb2,0x8c,0x6b,0x57,0xcd,0x8c,0x1f,0x2f,0xba,0xf8,0x1a, // 000080b0 |N..;...kW.../...|
+0xf2,0xeb,0x51,0xcf,0x7e,0x3e,0x90,0x0a,0xe6,0x2d,0xd4,0xbc,0xb5,0x4f,0x79,0xeb, // 000080c0 |..Q.~>...-...Oy.|
+0x57,0xe6,0xd3,0xaa,0xa7,0x0e,0xff,0xf5,0x9d,0x65,0x56,0xd7,0x7f,0xb9,0x3b,0x6f, // 000080d0 |W........eV...;o|
+0xe6,0x03,0xd1,0x36,0x07,0xf2,0xe6,0x57,0x34,0xc5,0xd0,0x37,0x7b,0x1e,0x8d,0xea, // 000080e0 |...6...W4..7{...|
+0x77,0x43,0xf1,0x27,0x7c,0x02,0x2f,0x68,0x18,0x81,0x1c,0xa1,0x78,0xb4,0xe9,0x39, // 000080f0 |wC.'|./h....x..9|
+0xf0,0x86,0x46,0x12,0xe9,0x69,0xe5,0xaa,0x98,0x6e,0x90,0x70,0xf1,0xa4,0x35,0xe8, // 00008100 |..F..i...n.p..5.|
+0x32,0x21,0x4a,0x44,0xde,0x1a,0x87,0xeb,0x25,0x98,0x07,0xe2,0xb1,0xe2,0x13,0x13, // 00008110 |2!JD....%.......|
+0x84,0x4e,0xa1,0xef,0xa5,0xf5,0x57,0x95,0xa0,0xb0,0x0a,0xf6,0x58,0x9d,0x8a,0x77, // 00008120 |.N....W.....X..w|
+0xdf,0x70,0x66,0x4a,0x41,0x83,0x7d,0xf3,0x28,0xa1,0x8a,0xea,0x21,0x4d,0x44,0xb6, // 00008130 |.pfJA.}.(...!MD.|
+0xb1,0x0a,0x55,0x70,0x96,0x78,0xe2,0xeb,0x9f,0x86,0x10,0x8e,0x65,0x88,0xa0,0x6f, // 00008140 |..Up.x......e..o|
+0x2c,0xee,0xa5,0xab,0xf5,0xdb,0x55,0xcc,0xba,0xce,0x71,0x48,0x5a,0x85,0x3f,0xa2, // 00008150 |,.....U...qHZ.?.|
+0x60,0x72,0x0c,0xee,0x10,0x61,0x26,0x36,0xd2,0xbb,0x62,0x85,0xde,0x80,0x07,0xd5, // 00008160 |`r...a&6..b.....|
+0xcd,0xab,0x5b,0xce,0xe3,0x6d,0xbf,0x60,0xc0,0x76,0xb5,0x5f,0x32,0x1c,0x76,0xaa, // 00008170 |..[..m.`.v._2.v.|
+0x89,0x9c,0x16,0xa8,0x04,0xde,0x97,0xde,0x59,0x0e,0xf1,0xc9,0x7b,0x19,0x34,0x3e, // 00008180 |........Y...{.4>|
+0x8c,0x09,0xca,0x93,0x45,0x29,0xe8,0x1a,0x4d,0x95,0xb7,0x30,0x66,0xce,0x6d,0xf8, // 00008190 |....E)..M..0f.m.|
+0xa3,0xc8,0x55,0x74,0xc1,0x85,0x92,0xc7,0x68,0x40,0xb5,0x9a,0x6d,0xff,0x2f,0xe1, // 000081a0 |..Ut....h@..m./.|
+0x97,0x87,0xeb,0x13,0x21,0x6a,0x17,0xe1,0xe6,0x4a,0xdd,0xa4,0x6a,0xb6,0xb1,0x1d, // 000081b0 |....!j...J..j...|
+0x0e,0x91,0x4f,0x32,0x1f,0x3a,0x67,0xab,0x66,0x62,0x2a,0xee,0xe3,0x75,0xba,0xf0, // 000081c0 |..O2.:g.fb*..u..|
+0x6c,0xd1,0x56,0xe3,0x0d,0xc0,0x32,0x7c,0xf2,0x25,0x6f,0xb4,0xca,0x14,0x13,0xab, // 000081d0 |l.V...2|.%o.....|
+0xae,0x78,0x34,0x78,0x4c,0x10,0xa5,0x3c,0x1f,0xaa,0xd9,0xfe,0x6c,0xbd,0x6e,0x0f, // 000081e0 |.x4xL..<....l.n.|
+0xc0,0xb3,0x1b,0x8d,0xb0,0x6d,0xb9,0xa7,0x6f,0x9b,0x58,0x8b,0xfd,0x41,0x54,0x4c, // 000081f0 |.....m..o.X..ATL|
+0xda,0xec,0x44,0x23,0x84,0x1c,0xb9,0x4b,0x44,0xdb,0xb0,0x85,0x0a,0x7a,0x0b,0x36, // 00008200 |..D#...KD....z.6|
+0xb2,0xee,0xb1,0xfb,0x9d,0xea,0x8b,0x3d,0xdc,0x99,0x4b,0x46,0x3b,0xba,0xa1,0xea, // 00008210 |.......=..KF;...|
+0x3f,0xc5,0x55,0x24,0x3e,0x92,0xb1,0x95,0x83,0x0d,0x8a,0x96,0x26,0x2c,0x0d,0xaf, // 00008220 |?.U$>.......&,..|
+0xfd,0x21,0xd4,0xb8,0x32,0x97,0x9d,0x19,0x95,0x4e,0x02,0xc3,0x24,0x9e,0xb3,0xf0, // 00008230 |.!..2....N..$...|
+0xbe,0xb8,0x2c,0x96,0x22,0xdc,0x60,0xd5,0x4e,0xbf,0xe3,0x55,0x3e,0xd6,0x68,0x8c, // 00008240 |..,.".`.N..U>.h.|
+0x34,0x71,0xad,0x9c,0xf9,0xcf,0x47,0x61,0x7b,0xf3,0x54,0xab,0xc0,0xfe,0x0c,0xfe, // 00008250 |4q....Ga{.T.....|
+0x1e,0xd6,0x3c,0x1b,0xaa,0xf7,0x80,0x95,0xa5,0xdc,0xa8,0xa7,0x6f,0x33,0x39,0xdd, // 00008260 |..<.........o39.|
+0xe0,0x00,0xd5,0x97,0xf1,0x84,0xe4,0x9e,0xed,0x2f,0x96,0x0a,0xf9,0xb9,0x1d,0x0e, // 00008270 |........./......|
+0x90,0x79,0x42,0x17,0xad,0xab,0xe8,0x9d,0x17,0xe1,0x37,0x56,0x1e,0xdc,0xb6,0x92, // 00008280 |.yB.......7V....|
+0x59,0xab,0xba,0x0b,0xcf,0x91,0x6a,0x18,0x72,0x94,0x29,0xcb,0xfb,0xca,0xe6,0xbe, // 00008290 |Y.....j.r.).....|
+0x53,0xba,0xae,0xad,0x46,0xe1,0x90,0x57,0x9e,0xa2,0xf2,0xeb,0x90,0x9b,0x42,0xa4, // 000082a0 |S...F..W......B.|
+0x2d,0xc5,0x92,0x08,0x52,0x2f,0x23,0xbc,0x53,0xdd,0x61,0xb2,0xc9,0x94,0x7e,0x94, // 000082b0 |-...R/#.S.a...~.|
+0xed,0x6c,0x76,0xe5,0xd1,0xca,0x75,0xca,0x4c,0x2e,0xdb,0xe0,0x7b,0x84,0xc6,0x15, // 000082c0 |.lv...u.L...{...|
+0x54,0x1f,0xfb,0x40,0x65,0x88,0x90,0xff,0xe0,0x45,0x1c,0xa0,0xe0,0x4a,0x03,0x1d, // 000082d0 |T..@e....E...J..|
+0xb4,0x17,0x30,0x0f,0x8d,0x46,0x45,0xda,0x3b,0x0e,0xba,0x23,0x9d,0x00,0x4e,0x01, // 000082e0 |..0..FE.;..#..N.|
+0x77,0xf0,0x96,0x7c,0xce,0x6c,0x02,0xda,0xf7,0xfa,0x36,0xb7,0x2f,0xf9,0xf0,0x36, // 000082f0 |w..|.l....6./..6|
+0x27,0xbe,0xa2,0x44,0xe7,0xfc,0x32,0x94,0x2b,0xb6,0xb5,0xc0,0xdf,0x75,0xdc,0x18, // 00008300 |'..D..2.+....u..|
+0xc4,0x88,0x85,0xbf,0xd2,0x7b,0x6d,0x27,0x9e,0xcd,0x89,0xbd,0x7d,0xa4,0x01,0xb2, // 00008310 |.....{m'....}...|
+0x6b,0x64,0x30,0xcb,0x90,0xe8,0xb8,0xee,0xb2,0x15,0x8f,0x91,0xba,0x67,0xea,0xf4, // 00008320 |kd0..........g..|
+0x06,0x06,0x6f,0x7f,0xed,0x53,0x7a,0x6a,0x63,0xbd,0xb4,0xae,0x7e,0xd3,0x15,0x62, // 00008330 |..o..Szjc...~..b|
+0x0c,0x8b,0x61,0x35,0xae,0x46,0x3d,0x09,0x30,0xd0,0xb0,0xd5,0x1a,0x90,0x39,0x52, // 00008340 |..a5.F=.0.....9R|
+0x5e,0xcc,0x32,0xa9,0x7f,0x0f,0xc1,0x65,0x36,0x46,0x49,0x40,0x5d,0xc2,0xcd,0x58, // 00008350 |^.2....e6FI@]..X|
+0xaa,0xad,0x88,0x99,0x73,0xb5,0x4e,0x00,0x9a,0xba,0x15,0x04,0x61,0x4c,0x58,0xc1, // 00008360 |....s.N.....aLX.|
+0x4d,0x65,0xa5,0xe2,0x7b,0x6b,0xde,0x4c,0x2d,0x51,0x58,0xc9,0x92,0xd8,0x49,0x07, // 00008370 |Me..{k.L-QX...I.|
+0xcf,0xcf,0xdd,0x54,0xd1,0x57,0x13,0x7b,0x1b,0x84,0xa8,0xdb,0x11,0x3c,0xb7,0x7a, // 00008380 |...T.W.{.....<.z|
+0x87,0x37,0x10,0xb3,0x0b,0x23,0x47,0xe3,0xfd,0x71,0xa6,0xa9,0x73,0x76,0x2c,0xf8, // 00008390 |.7...#G..q..sv,.|
+0xa1,0xd2,0xf4,0xf0,0x37,0x6b,0x3d,0x16,0x82,0x81,0xda,0x47,0x27,0xaf,0x63,0xff, // 000083a0 |....7k=....G'.c.|
+0x1c,0x5b,0x6b,0xd0,0xc8,0xc8,0xbd,0x70,0xcc,0xfa,0x74,0xaa,0x03,0x16,0xdf,0x54, // 000083b0 |.[k....p..t....T|
+0xa9,0x5e,0xea,0x4f,0x92,0x20,0x5f,0x3a,0xd2,0x0f,0xf7,0xee,0xe9,0x6e,0x76,0xa5, // 000083c0 |.^.O. _:.....nv.|
+0xc9,0x17,0xa9,0x9a,0x58,0x31,0x8e,0xc5,0xac,0x1e,0xbd,0xea,0x15,0x3d,0x3e,0xe3, // 000083d0 |....X1.......=>.|
+0xa5,0xd1,0xb9,0x15,0x08,0xab,0xe0,0x46,0xa4,0x37,0xe2,0x66,0xae,0x09,0x19,0xbb, // 000083e0 |.......F.7.f....|
+0xd6,0x55,0xa4,0x8e,0xc1,0x8f,0xaf,0x88,0x55,0xaf,0xdd,0xe5,0xe2,0x27,0x97,0x88, // 000083f0 |.U......U....'..|
+0x69,0x2b,0x4d,0x8d,0xc1,0xc2,0x09,0xbd,0x0b,0xff,0x3b,0x4a,0x17,0xfb,0x4b,0x02, // 00008400 |i+M.......;J..K.|
+0xd4,0xae,0x25,0xa9,0xb7,0x71,0x81,0xa3,0x42,0xd6,0xb2,0xe4,0x81,0xcd,0xcc,0x44, // 00008410 |..%..q..B......D|
+0x94,0x5f,0x26,0xfb,0xa8,0xe2,0x5e,0x4e,0x15,0xbc,0x9b,0xfc,0x2b,0x7f,0x53,0xec, // 00008420 |._&...^N....+.S.|
+0xee,0x01,0x47,0xfc,0x7f,0x21,0xda,0x7d,0x3c,0xa5,0xff,0x4f,0x7f,0x1c,0x08,0xec, // 00008430 |..G..!.}<..O....|
+0x5c,0xfb,0x45,0x65,0x37,0x37,0x08,0x9f,0x5c,0xd9,0xaa,0xa0,0xd9,0xa9,0x51,0x60, // 00008440 |\.Ee77..\.....Q`|
+0x4b,0xda,0x06,0x07,0x83,0x22,0x4e,0x3c,0x63,0xdb,0x96,0x0b,0x16,0x31,0x6f,0x82, // 00008450 |K...."N<c....1o.|
+0xaa,0x60,0xc9,0x65,0x60,0x6d,0xeb,0x7f,0xbc,0x3a,0x07,0x1c,0x53,0xad,0xd9,0xe4, // 00008460 |.`.e`m...:..S...|
+0xbe,0x30,0xc3,0x01,0x14,0x80,0x19,0xe7,0xc1,0x95,0xe6,0x10,0x5e,0xf4,0x10,0x9c, // 00008470 |.0..........^...|
+0xce,0xd6,0x98,0xec,0x3c,0x60,0xb3,0x3d,0x79,0x52,0xb7,0x92,0x65,0x45,0x96,0xa9, // 00008480 |....<`.=yR..eE..|
+0x9c,0x26,0x52,0xa5,0xaf,0xf2,0x34,0x9d,0xab,0x09,0x83,0x5e,0xdb,0x81,0xed,0xde, // 00008490 |.&R...4....^....|
+0x2e,0x69,0x15,0x1f,0xe5,0xb1,0x44,0x34,0x26,0x76,0xb1,0x21,0x5f,0xf4,0xd9,0x5c, // 000084a0 |.i....D4&v.!_..\|
+0x74,0x0c,0x64,0x68,0x2b,0x92,0xe4,0xb4,0xa8,0xbf,0x78,0x8b,0xf0,0x4a,0xc2,0xd7, // 000084b0 |t.dh+.....x..J..|
+0x2c,0x9a,0x29,0x60,0xf6,0xd7,0x79,0xfa,0xd6,0x55,0x58,0x4a,0x5e,0x87,0xd0,0x61, // 000084c0 |,.)`..y..UXJ^..a|
+0x7b,0x65,0xa0,0x5c,0x32,0x49,0x79,0x53,0xef,0xf4,0x7e,0xaf,0x7d,0xeb,0x6b,0x88, // 000084d0 |{e.\2IyS..~.}.k.|
+0x13,0x14,0xdb,0xb8,0x66,0x94,0x0e,0xd6,0x5c,0x37,0x20,0x2a,0xc5,0xa5,0x05,0x93, // 000084e0 |....f...\7 *....|
+0x51,0xd2,0x32,0x4a,0x0e,0xc3,0xab,0x34,0x29,0x37,0x0d,0xaf,0x4f,0xba,0xe2,0xba, // 000084f0 |Q.2J...4)7..O...|
+0x49,0xbd,0x67,0x4b,0x78,0xf4,0x83,0x03,0x20,0x11,0x47,0x97,0x66,0x67,0x98,0x53, // 00008500 |I.gKx... .G.fg.S|
+0xa4,0xb8,0xf8,0xc3,0xfe,0xb4,0x20,0x12,0xb4,0xce,0xd1,0x20,0xbf,0x90,0xb8,0x7c, // 00008510 |...... .... ...||
+0x9d,0xea,0xd3,0x05,0x48,0xd4,0x29,0xb1,0x98,0x4d,0x89,0xf4,0x13,0x9c,0x6b,0xdc, // 00008520 |....H.)..M....k.|
+0xeb,0x86,0x1d,0x8e,0xd6,0x7b,0x7c,0xe5,0xdf,0xdc,0xbc,0xea,0xa2,0xd5,0x3b,0x8c, // 00008530 |.....{|.......;.|
+0x8a,0x71,0xdf,0x07,0x17,0x51,0x08,0x29,0x0a,0x84,0x45,0xe5,0x2e,0x96,0xfe,0x6f, // 00008540 |.q...Q.)..E....o|
+0x56,0xa0,0xbc,0x3a,0x06,0xda,0x07,0xc1,0x48,0xa7,0x2b,0x70,0xd9,0x14,0x7d,0x52, // 00008550 |V..:....H.+p..}R|
+0x08,0x0d,0xb6,0xe4,0x41,0x0b,0x75,0xa1,0x10,0x77,0x2d,0x24,0xd9,0x13,0x09,0x6f, // 00008560 |....A.u..w-$...o|
+0x08,0x9a,0xd2,0xc7,0x4c,0xd4,0x3f,0xe8,0x93,0x9b,0xc2,0x70,0x43,0xf8,0x61,0x28, // 00008570 |....L.?....pC.a(|
+0x7e,0xf0,0x6a,0xc1,0x6f,0xd3,0xbe,0x30,0x4a,0xaa,0x08,0xbf,0x05,0xd5,0x0d,0xc2, // 00008580 |~.j.o..0J.......|
+0x9f,0xb1,0x09,0x01,0xbb,0xaf,0x60,0x56,0xbe,0xf6,0xf1,0x8f,0x33,0xd4,0x40,0x3e, // 00008590 |......`V....3.@>|
+0xc3,0x15,0x8f,0x66,0x64,0x7c,0x02,0x6a,0xc8,0xdc,0x47,0xc7,0x0c,0x4f,0x4e,0x4f, // 000085a0 |...fd|.j..G..ONO|
+0x25,0xf6,0x8b,0xa2,0x85,0xd7,0x98,0xf6,0xc9,0x16,0xf5,0x47,0xd8,0x9b,0xcc,0x2b, // 000085b0 |%..........G...+|
+0x0c,0x26,0x24,0x16,0xca,0x23,0x24,0x3c,0x13,0x91,0xcc,0x3b,0xf0,0x08,0x2c,0x87, // 000085c0 |.&$..#$<...;..,.|
+0x9c,0x7d,0xfc,0x62,0x86,0x65,0xf7,0xf0,0x65,0xc2,0x49,0x45,0xf8,0xe0,0xe7,0x84, // 000085d0 |.}.b.e..e.IE....|
+0x0b,0xc1,0xfb,0xa7,0xa7,0x41,0x29,0x47,0x91,0x0e,0xd2,0x30,0x23,0x0a,0x29,0x52, // 000085e0 |.....A)G...0#.)R|
+0x8b,0xda,0xae,0x58,0xcf,0x3d,0x5c,0xa0,0x16,0x23,0x3b,0xcf,0xb8,0x56,0xf0,0x6e, // 000085f0 |...X.=\..#;..V.n|
+0x86,0x23,0xa2,0x19,0xc1,0x56,0xfa,0x34,0x84,0xc9,0xf1,0x8a,0xe7,0x2e,0x1d,0xa9, // 00008600 |.#...V.4........|
+0x1b,0x00,0xb7,0x30,0x03,0x7d,0xfb,0x2b,0x47,0x57,0x35,0x41,0x96,0xe9,0x04,0xf8, // 00008610 |...0.}.+GW5A....|
+0x45,0x54,0x38,0x25,0x57,0x40,0xce,0x84,0x78,0xc1,0xe7,0xea,0xc6,0x3c,0x63,0xc5, // 00008620 |ET8%W@..x....<c.|
+0xe5,0xcd,0x70,0xe7,0xc4,0x39,0x7e,0x35,0xb3,0xec,0x06,0x2d,0x87,0x73,0xf5,0x7c, // 00008630 |..p..9~5...-.s.||
+0xe9,0x70,0x51,0x4c,0x2f,0x46,0x28,0x39,0xbb,0x0c,0xd4,0x09,0x31,0x28,0x1a,0xf1, // 00008640 |.pQL/F(9....1(..|
+0x9c,0x97,0x90,0x9f,0xcd,0x6a,0x8e,0xd5,0x1d,0x38,0xad,0x60,0xf8,0x06,0x4a,0x07, // 00008650 |.....j...8.`..J.|
+0xa0,0xf7,0x94,0xd8,0x20,0xa1,0x90,0x2b,0x60,0x18,0xe0,0xd5,0xbc,0x58,0xd7,0xfc, // 00008660 |.... ..+`....X..|
+0xa5,0x3c,0x8d,0xe1,0xa1,0x4a,0x34,0x5a,0x3b,0xdc,0x43,0xbe,0x53,0xe4,0x94,0xcc, // 00008670 |.<...J4Z;.C.S...|
+0xa0,0x1e,0x2b,0x29,0xd0,0x02,0x72,0xe4,0x89,0x2e,0x40,0x61,0xd0,0x49,0x81,0x05, // 00008680 |..+)..r...@a.I..|
+0x5c,0x8c,0x8d,0xe0,0x28,0x47,0xab,0xb4,0x88,0xd9,0xc6,0xfa,0x4c,0x4d,0x77,0x9b, // 00008690 |\...(G......LMw.|
+0x47,0x32,0x5f,0xa7,0xc1,0x10,0xc2,0x2a,0x6a,0xae,0x72,0x8d,0xce,0x23,0xd8,0xf4, // 000086a0 |G2_....*j.r..#..|
+0x46,0x7e,0x82,0x0e,0xec,0x60,0x54,0x0a,0xc0,0x39,0x8d,0xa6,0xb4,0x07,0x22,0x1d, // 000086b0 |F~...`T..9....".|
+0x27,0xcd,0x6d,0x27,0xf6,0x09,0x66,0x53,0x7a,0xe4,0xa1,0x73,0xd0,0xdf,0x4f,0x83, // 000086c0 |'.m'..fSz..s..O.|
+0x50,0x5c,0xf0,0x66,0x0f,0x81,0xe2,0x6e,0x1c,0xd8,0xf6,0xec,0xee,0x95,0x68,0x39, // 000086d0 |P\.f...n......h9|
+0xa4,0xcc,0x12,0xe4,0x9f,0x63,0x42,0x1e,0xce,0xeb,0x87,0xae,0x8d,0xb8,0xe7,0x4d, // 000086e0 |.....cB........M|
+0xbd,0x5d,0xff,0xb8,0x30,0xb2,0xd6,0xfc,0x8b,0x47,0xf2,0x66,0x71,0x5a,0x4a,0x86, // 000086f0 |.]..0....G.fqZJ.|
+0xfa,0xc6,0xd5,0xa2,0x81,0x6f,0x87,0x52,0x17,0x93,0x62,0x5a,0x91,0x09,0x54,0xa2, // 00008700 |.....o.R..bZ..T.|
+0xe5,0x9e,0x09,0x4c,0xd0,0x1a,0x6a,0x9f,0x01,0xd4,0x67,0x88,0x5c,0xbd,0x67,0x32, // 00008710 |...L..j...g.\.g2|
+0x4a,0x05,0xbf,0x3a,0x72,0xfa,0x7c,0x2c,0x43,0xb0,0xf1,0xf4,0xd0,0xa6,0xce,0x59, // 00008720 |J..:r.|,C......Y|
+0xf2,0x63,0xff,0x13,0x6e,0x4c,0x6f,0xa0,0x82,0x29,0xa5,0x8f,0xae,0xdd,0xd2,0x45, // 00008730 |.c..nLo..).....E|
+0x98,0x03,0xd1,0x3e,0xc2,0x1a,0x19,0xb5,0x39,0xf5,0xf5,0x4f,0x94,0xd0,0x58,0x78, // 00008740 |...>....9..O..Xx|
+0x8b,0x04,0x4f,0x06,0x26,0xe6,0xa6,0x34,0xae,0x7a,0xc1,0xea,0xa1,0x45,0x2a,0xa9, // 00008750 |..O.&..4.z...E*.|
+0xe4,0x13,0x1c,0x4b,0xd3,0xb1,0x49,0xaa,0x72,0xa5,0x75,0xb5,0xe9,0x93,0xac,0x85, // 00008760 |...K..I.r.u.....|
+0xcc,0x21,0x78,0xbe,0xa7,0xb4,0x5d,0x03,0x2b,0x40,0xd3,0x50,0xc3,0x49,0x18,0xe5, // 00008770 |.!x...].+@.P.I..|
+0x07,0xa6,0xcc,0x79,0x93,0xc2,0x7d,0xbf,0x8c,0x10,0x12,0x38,0x4f,0xa1,0x25,0xa9, // 00008780 |...y..}....8O.%.|
+0x8a,0x47,0x95,0x17,0x01,0x44,0x7e,0xca,0x97,0xc5,0x30,0x79,0x09,0x63,0x99,0x62, // 00008790 |.G...D~...0y.c.b|
+0x80,0xa4,0x95,0x0f,0x1f,0xbb,0x59,0x83,0x9c,0x13,0x9a,0xc1,0x33,0x1f,0x22,0xb2, // 000087a0 |......Y.....3.".|
+0x0e,0xb0,0xfb,0x88,0x24,0xe5,0xaf,0xce,0x5e,0xea,0xd9,0x31,0x0a,0x11,0x4f,0x8e, // 000087b0 |....$...^..1..O.|
+0x10,0x4d,0xec,0xb9,0x58,0xfa,0x97,0x2c,0xef,0x7b,0x20,0x86,0x5c,0x66,0x44,0xdc, // 000087c0 |.M..X..,.{ .\fD.|
+0xa0,0x5e,0xeb,0x18,0x94,0x56,0xb1,0x05,0x67,0xfd,0xaf,0xd3,0x34,0x4b,0x47,0x4c, // 000087d0 |.^...V..g...4KGL|
+0x95,0x4d,0xce,0x13,0xe0,0x56,0xc8,0x5d,0x50,0x86,0x55,0xcf,0x73,0x51,0x03,0x29, // 000087e0 |.M...V.]P.U.sQ.)|
+0x07,0xd5,0x22,0xdf,0x8c,0x8a,0xa6,0xa3,0x11,0x30,0x1f,0x05,0xef,0x9f,0x9c,0xa5, // 000087f0 |.."......0......|
+0x6e,0xb5,0x93,0x8f,0x4a,0x8c,0x51,0xe8,0x18,0xbe,0x0a,0x52,0x31,0xd9,0xb2,0x34, // 00008800 |n...J.Q....R1..4|
+0xd2,0xbd,0x8b,0xc2,0x6f,0x67,0xd7,0x64,0x30,0x91,0xa3,0xfe,0xdd,0x29,0xfe,0x6d, // 00008810 |....og.d0....).m|
+0xa5,0xd8,0x52,0xee,0xf7,0x72,0x0d,0xaa,0x46,0xb0,0xd9,0xe1,0x44,0x20,0xd0,0x42, // 00008820 |..R..r..F...D .B|
+0xba,0x63,0xf3,0xba,0xfa,0x30,0x9d,0x7c,0x25,0x08,0x25,0x33,0xfc,0xd9,0xfe,0x7f, // 00008830 |.c...0.|%.%3....|
+0x42,0x3f,0x2e,0x0f,0x72,0x78,0x39,0x3e,0x51,0xf9,0xbf,0x9a,0xc5,0x89,0x95,0x1c, // 00008840 |B?..rx9>Q.......|
+0xec,0x37,0x5c,0x4e,0xd5,0x3b,0xa0,0x7b,0x43,0x1c,0x28,0xab,0x92,0x30,0x69,0x28, // 00008850 |.7\N.;.{C.(..0i(|
+0x96,0x61,0xe6,0x42,0x49,0xe9,0x51,0x5c,0x6a,0x20,0xc8,0x35,0x12,0x4d,0x0b,0x27, // 00008860 |.a.BI.Q\j .5.M.'|
+0x95,0x37,0xb0,0x33,0xac,0x61,0x01,0x57,0x51,0xbe,0xde,0x51,0xe9,0xc5,0x65,0xa6, // 00008870 |.7.3.a.WQ..Q..e.|
+0xae,0x80,0xcd,0x2a,0x82,0x31,0x3f,0xd1,0xcb,0xb3,0x3f,0x37,0x6f,0xd2,0x89,0x90, // 00008880 |...*.1?...?7o...|
+0xd1,0xb7,0xd6,0x4b,0xb1,0x6d,0x96,0x6c,0xf4,0x69,0x56,0xb2,0x16,0x66,0x1b,0x2d, // 00008890 |...K.m.l.iV..f.-|
+0x5b,0x40,0x78,0x76,0x41,0x93,0xee,0x2f,0x3a,0x6c,0x83,0xae,0x9e,0xfb,0x90,0x69, // 000088a0 |[@xvA../:l.....i|
+0x49,0x42,0x1d,0xc4,0x19,0x8b,0x26,0x6d,0x58,0x8a,0x1e,0x4e,0x39,0x94,0x02,0x0f, // 000088b0 |IB....&mX..N9...|
+0xdc,0x10,0xc8,0xb3,0x0b,0x71,0xe4,0x2a,0x0e,0xd8,0xb7,0x59,0x39,0x6d,0x2c,0x3f, // 000088c0 |.....q.*...Y9m,?|
+0xf5,0x93,0x35,0x03,0xd1,0xb6,0x90,0x3d,0xf2,0x1a,0x42,0xbc,0x3f,0x6a,0x10,0x1f, // 000088d0 |..5....=..B.?j..|
+0x43,0x56,0x75,0x75,0xdb,0xf5,0x44,0x61,0x82,0x0a,0xcb,0x7d,0x47,0x87,0xc2,0x49, // 000088e0 |CVuu..Da...}G..I|
+0x91,0x10,0x7f,0xac,0x68,0x80,0x64,0x05,0x11,0x6a,0xe7,0x0e,0x07,0x7b,0x49,0xc8, // 000088f0 |....h.d..j...{I.|
+0x6f,0x3f,0xe0,0x26,0x9c,0x56,0xc8,0x28,0xcd,0x33,0x52,0x3a,0x48,0xac,0xb2,0x3d, // 00008900 |o?.&.V.(.3R:H..=|
+0x7a,0x9e,0xab,0x52,0x0a,0xf4,0x04,0xe4,0xb1,0x8f,0xbd,0x86,0xf1,0x21,0x7b,0xeb, // 00008910 |z..R.........!{.|
+0x84,0x32,0xe1,0x3c,0xa6,0x6d,0x54,0xa4,0x35,0x27,0xd4,0xd7,0x86,0x86,0x16,0xa9, // 00008920 |.2.<.mT.5'......|
+0xd7,0x78,0xc1,0xe8,0x80,0x46,0xb9,0x2a,0xce,0x4f,0x5f,0x68,0xda,0x98,0x64,0xe3, // 00008930 |.x...F.*.O_h..d.|
+0x3b,0xba,0xe3,0x49,0xaa,0x13,0x9d,0x44,0x5b,0x68,0x80,0x7c,0x39,0x7e,0xc7,0x90, // 00008940 |;..I...D[h.|9~..|
+0x6b,0xc2,0x9f,0xe6,0x6f,0xca,0xec,0x52,0x5e,0x67,0xf0,0xa9,0xed,0x0b,0x1b,0x82, // 00008950 |k...o..R^g......|
+0x43,0x5b,0x48,0x9a,0x25,0x3a,0xe9,0x18,0x70,0xd8,0x75,0x9f,0x56,0xe8,0xb6,0x24, // 00008960 |C[H.%:..p.u.V..$|
+0xb4,0x0c,0x5f,0x2d,0x8b,0xce,0xb4,0x77,0x26,0x82,0x05,0xea,0x58,0x3f,0x60,0x8e, // 00008970 |.._-...w&...X?`.|
+0xf3,0x05,0x70,0x68,0x13,0x38,0x02,0x70,0x74,0xec,0xf0,0x7e,0xbe,0xd8,0x83,0x8e, // 00008980 |..ph.8.pt..~....|
+0xfd,0xdb,0xf6,0x5b,0x90,0x02,0x35,0x70,0x48,0xd5,0xd4,0x5b,0xfb,0xc9,0xbe,0xef, // 00008990 |...[..5pH..[....|
+0xdb,0x7c,0xc5,0x0c,0xf3,0x8b,0x30,0x96,0x40,0x86,0x3d,0x8d,0x44,0xf2,0x0b,0xcc, // 000089a0 |.|....0.@.=.D...|
+0x2a,0x32,0x9c,0xb2,0x70,0x62,0x41,0xee,0xe5,0xc0,0x1c,0xe2,0x40,0x76,0x49,0x2d, // 000089b0 |*2..pbA.....@vI-|
+0xbb,0xec,0xb8,0xa9,0x7d,0x52,0x71,0x4a,0xf0,0x1e,0x8a,0xd6,0x01,0x3a,0x39,0x61, // 000089c0 |....}RqJ.....:9a|
+0x82,0x44,0x00,0x82,0xb8,0xd9,0x6e,0x32,0x85,0xe9,0xe1,0x69,0x6b,0x78,0xe2,0x56, // 000089d0 |.D....n2...ikx.V|
+0xe3,0x3d,0x28,0xb4,0x31,0x34,0x72,0xf7,0xa5,0x3b,0x02,0x76,0xee,0x91,0x02,0x2d, // 000089e0 |.=(.14r..;.v...-|
+0xf5,0x0c,0x2e,0x90,0x88,0xf7,0x9f,0x10,0x3a,0x50,0x2d,0x19,0x60,0xb9,0xc5,0x75, // 000089f0 |........:P-.`..u|
+0xb2,0xee,0xb6,0x10,0x7c,0x7b,0x8d,0xb7,0xc7,0xd1,0x75,0x9c,0xaa,0x50,0xfb,0x0a, // 00008a00 |....|{....u..P..|
+0xf6,0x93,0xa8,0x16,0xe9,0x18,0xde,0x1a,0xdf,0xc7,0xc0,0x8d,0x0f,0x73,0x73,0xfc, // 00008a10 |.............ss.|
+0xc8,0x0c,0xe1,0x0f,0xd3,0x48,0xc8,0x20,0x61,0x1b,0x1e,0x9e,0x70,0x86,0x1b,0x78, // 00008a20 |.....H. a...p..x|
+0xac,0xbf,0x1c,0x33,0x55,0xe6,0xa8,0x28,0x23,0xde,0x86,0x90,0xfb,0x14,0x11,0xdf, // 00008a30 |...3U..(#.......|
+0x4b,0x71,0x56,0xfc,0x9d,0xd1,0xe3,0xaf,0x65,0x54,0x82,0x4b,0xc2,0xcc,0x16,0xce, // 00008a40 |KqV.....eT.K....|
+0x26,0x58,0x48,0x32,0x3e,0x8b,0xd6,0x81,0xd9,0x3e,0x81,0xb6,0x09,0xbe,0x34,0xfe, // 00008a50 |&XH2>....>....4.|
+0x35,0x8f,0x26,0x13,0x22,0xf6,0x37,0x4c,0xaf,0x02,0x2b,0x1e,0x19,0x8b,0x24,0xb1, // 00008a60 |5.&.".7L..+...$.|
+0x4b,0xad,0x6f,0xb7,0x46,0x72,0x28,0x2a,0xfc,0x6d,0xc0,0x18,0x3f,0x08,0x0b,0xfe, // 00008a70 |K.o.Fr(*.m..?...|
+0x08,0xeb,0x8c,0x8c,0x58,0xa3,0xe1,0x10,0x23,0xd0,0x80,0x2d,0x17,0x00,0xcd,0xb4, // 00008a80 |....X...#..-....|
+0x94,0x57,0x7f,0x30,0xd5,0xa8,0x7a,0xb4,0x4f,0xd6,0x43,0x34,0x2b,0x8d,0x67,0x49, // 00008a90 |.W.0..z.O.C4+.gI|
+0x30,0x0b,0x03,0x36,0x97,0xe4,0x39,0xfc,0x87,0x3c,0xaf,0x41,0x30,0xa9,0xa4,0x05, // 00008aa0 |0..6..9..<.A0...|
+0xb8,0x7e,0x83,0xda,0x06,0x44,0xf6,0xa9,0x85,0xf1,0xc4,0x61,0xca,0x7c,0x7f,0x5f, // 00008ab0 |.~...D.....a.|._|
+0x71,0x3f,0xf5,0x84,0x62,0x44,0x4b,0x5a,0x78,0xc4,0x06,0xd0,0x13,0x9f,0x07,0x17, // 00008ac0 |q?..bDKZx.......|
+0xe0,0x8f,0x63,0xe9,0x86,0x98,0x1f,0x79,0x18,0xc6,0x01,0x4d,0x99,0x9b,0xe5,0xd6, // 00008ad0 |..c....y...M....|
+0x20,0xec,0x78,0x6d,0xcc,0x66,0x30,0xbc,0xa1,0xd7,0xcb,0x18,0xf1,0xac,0x7e,0xdd, // 00008ae0 | .xm.f0.......~.|
+0x9a,0x4a,0x67,0x8b,0x36,0xc7,0x4e,0x55,0xc6,0xeb,0xff,0xfc,0x6c,0x9d,0xd8,0x5e, // 00008af0 |.Jg.6.NU....l..^|
+0x57,0xb0,0xde,0x13,0x1e,0xdb,0x70,0x05,0x4b,0xb8,0x81,0xf6,0xb8,0xf0,0xb9,0x37, // 00008b00 |W.....p.K......7|
+0xe2,0xf4,0xfc,0x37,0x08,0xd6,0xbd,0x3d,0x5f,0x50,0x74,0xad,0xd4,0xc3,0xaa,0x2e, // 00008b10 |...7...=_Pt.....|
+0xd1,0xd2,0xd2,0x52,0x5c,0xf5,0xdd,0xc9,0x91,0x92,0x4f,0xd5,0x67,0xad,0xdc,0x71, // 00008b20 |...R\.....O.g..q|
+0x1e,0x55,0xe3,0x41,0x2d,0xda,0x88,0x8d,0x7b,0x48,0xac,0xef,0x2b,0xaf,0x7a,0xba, // 00008b30 |.U.A-...{H..+.z.|
+0x33,0xc6,0xe7,0xcf,0xea,0x13,0xf3,0xb5,0x0e,0xc3,0x70,0x2c,0x8a,0xd7,0x41,0x72, // 00008b40 |3.........p,..Ar|
+0x5e,0x06,0xf5,0x1b,0x5c,0xaf,0xde,0x43,0x91,0x09,0xf9,0x1b,0x82,0x76,0x46,0xd8, // 00008b50 |^...\..C.....vF.|
+0x2b,0x6c,0x5d,0xef,0x8e,0x4d,0x4d,0xc8,0x24,0xf0,0xed,0x4c,0xd6,0x48,0x15,0xce, // 00008b60 |+l]..MM.$..L.H..|
+0x75,0xac,0x82,0xe8,0x5d,0xcc,0x7c,0x0e,0x02,0x31,0xe7,0x3e,0x54,0xd1,0x9b,0x94, // 00008b70 |u...].|..1.>T...|
+0xe0,0x6a,0x12,0x08,0x6e,0xda,0x2d,0xc2,0xcb,0x91,0xce,0xe5,0x28,0xa6,0x08,0x0b, // 00008b80 |.j..n.-.....(...|
+0x97,0x74,0xbb,0x6c,0x4c,0xdc,0x9b,0x59,0x4c,0xd0,0x9f,0xe1,0xc4,0x41,0x5e,0x3f, // 00008b90 |.t.lL..YL....A^?|
+0xfd,0x2f,0x22,0x16,0x02,0x51,0x2d,0xb0,0x13,0x8d,0x27,0x8f,0x1a,0x67,0x57,0x5d, // 00008ba0 |./"..Q-...'..gW]|
+0xb4,0x1d,0x2c,0x2c,0xc2,0x44,0x85,0x19,0x78,0x6f,0x3f,0x48,0x3e,0x6f,0xd1,0x96, // 00008bb0 |..,,.D..xo?H>o..|
+0x91,0x83,0x46,0xf5,0xed,0xd2,0xe6,0x55,0xbc,0x4e,0x57,0xb6,0xff,0xce,0xac,0x26, // 00008bc0 |..F....U.NW....&|
+0x1f,0xf7,0x27,0x9d,0x3c,0x3b,0x30,0xec,0x04,0x9e,0xc2,0x97,0x5b,0x60,0x82,0xdd, // 00008bd0 |..'.<;0.....[`..|
+0x4c,0x10,0x12,0x5e,0xd9,0x68,0xc6,0xcf,0x15,0x9c,0x86,0x32,0x28,0x85,0xc6,0xba, // 00008be0 |L..^.h.....2(...|
+0x30,0x24,0x75,0xa1,0x87,0x48,0xa9,0xb2,0x37,0xbd,0x9c,0xd2,0x78,0x41,0x38,0xb4, // 00008bf0 |0$u..H..7...xA8.|
+0x4d,0x82,0xd1,0xd2,0x93,0x5f,0xc0,0x70,0x26,0xc9,0xd0,0x51,0x9e,0x24,0xf4,0x8a, // 00008c00 |M...._.p&..Q.$..|
+0xc8,0x0d,0xd1,0xa6,0x45,0x95,0x62,0x0c,0x65,0xbb,0x2a,0xc0,0x93,0x43,0xa4,0x2f, // 00008c10 |....E.b.e.*..C./|
+0x04,0xb3,0xb2,0x4d,0x0a,0xfc,0x70,0x66,0x93,0xe7,0x30,0xed,0x7f,0x87,0x1f,0x37, // 00008c20 |...M..pf..0....7|
+0x62,0xf5,0x18,0x91,0x55,0x96,0xb5,0x70,0x50,0x60,0x63,0x40,0x5a,0x77,0xcc,0x0a, // 00008c30 |b...U..pP`c@Zw..|
+0x18,0xea,0xa6,0x34,0x58,0xc6,0x60,0x81,0xb9,0xcb,0x6b,0x20,0xa6,0x9e,0xbc,0xe7, // 00008c40 |...4X.`...k ....|
+0xb4,0x27,0xb7,0xba,0x9b,0x5d,0xf6,0xc0,0x98,0xb4,0x5d,0x31,0x94,0x32,0x5d,0x30, // 00008c50 |.'...]....]1.2]0|
+0xc3,0x46,0xb6,0x24,0xe5,0xb3,0x3d,0xff,0x67,0xab,0xf9,0xd5,0x93,0x19,0x5f,0xc0, // 00008c60 |.F.$..=.g....._.|
+0x75,0x3b,0xf8,0xee,0x7e,0x19,0xe5,0xa4,0x58,0xf3,0xf6,0x99,0x7f,0x5c,0x7e,0x02, // 00008c70 |u;..~...X....\~.|
+0x17,0x1f,0x97,0x5f,0x8d,0x11,0x17,0xe9,0x97,0x7b,0xd9,0x93,0x3f,0x71,0xff,0x29, // 00008c80 |..._.....{..?q.)|
+0x77,0x7f,0xe3,0x2b,0xb6,0xf8,0xb3,0xd2,0x8e,0x9c,0xa5,0x76,0x5b,0x8b,0x2f,0x4e, // 00008c90 |w..+.......v[./N|
+0xb0,0xa0,0xf4,0xa5,0x32,0x30,0x71,0x43,0xde,0x32,0x23,0xa0,0xa3,0xc1,0xaf,0xaa, // 00008ca0 |....20qC.2#.....|
+0x92,0x34,0x9a,0xc6,0x16,0xbd,0x98,0xde,0x02,0xf6,0x79,0x27,0xb9,0xd7,0xfb,0xba, // 00008cb0 |.4........y'....|
+0x35,0x1f,0x54,0x80,0x72,0x8c,0x66,0x19,0x82,0x25,0x73,0xa3,0x0a,0xaa,0x20,0x26, // 00008cc0 |5.T.r.f..%s... &|
+0xc3,0x08,0x8b,0x32,0xc2,0x33,0xd0,0x79,0xe1,0x2e,0xa0,0x02,0x7c,0xf2,0x46,0x4b, // 00008cd0 |...2.3.y....|.FK|
+0xe9,0x66,0x93,0xf8,0x76,0xbb,0x82,0x4b,0xea,0x67,0x4c,0x0a,0x1d,0x25,0xd2,0x7a, // 00008ce0 |.f..v..K.gL..%.z|
+0x70,0xd0,0xce,0x20,0x8c,0x3b,0x84,0x85,0x9b,0x54,0xdb,0x7a,0x67,0xd7,0xa4,0x30, // 00008cf0 |p.. .;...T.zg..0|
+0x3d,0xa7,0x76,0xc3,0x1a,0xfb,0xb7,0xa6,0xf5,0x4b,0xbe,0x16,0xfb,0xc7,0xcf,0xe4, // 00008d00 |=.v......K......|
+0xee,0xad,0x4b,0xc4,0xbb,0xe1,0x7e,0x0d,0x63,0xb3,0x27,0x45,0x3d,0xf2,0x3d,0x20, // 00008d10 |..K...~.c.'E=.= |
+0x18,0x5d,0xeb,0xac,0x25,0x8b,0x2e,0xdb,0x51,0x26,0x75,0x3a,0x8e,0x98,0x6b,0xc8, // 00008d20 |.]..%...Q&u:..k.|
+0x3e,0x14,0x93,0x30,0x94,0xf5,0x4b,0xc2,0x6c,0x2e,0xe7,0xf6,0xf0,0xfd,0xce,0xa3, // 00008d30 |>..0..K.l.......|
+0xa4,0x5d,0xed,0x38,0x95,0x56,0x3f,0x7d,0x85,0xc7,0x50,0x30,0xd8,0xdd,0x2a,0x0f, // 00008d40 |.].8.V?}..P0..*.|
+0xd5,0x0f,0x4f,0x2d,0x2d,0x99,0x78,0x4e,0xfe,0x63,0x39,0x9d,0xa2,0x21,0x77,0x32, // 00008d50 |..O--.xN.c9..!w2|
+0x2d,0xb2,0xe3,0xb6,0x95,0x14,0x8f,0xd3,0x14,0x23,0x3d,0x4d,0xdd,0x88,0x42,0xdf, // 00008d60 |-........#=M..B.|
+0xe4,0xb1,0xe5,0x39,0xab,0x93,0x17,0xef,0xbf,0xc3,0xed,0x8e,0xca,0xc9,0x90,0x55, // 00008d70 |...9...........U|
+0xbf,0x5b,0xbf,0x07,0xe9,0xf9,0x4c,0xb2,0x80,0x9e,0x55,0x03,0x9f,0xa7,0x83,0xa6, // 00008d80 |.[....L...U.....|
+0xdd,0x86,0xb5,0x55,0x53,0xc5,0x05,0xaa,0xdf,0x00,0x5b,0xf0,0x3a,0x7b,0x24,0x01, // 00008d90 |...US.....[.:{$.|
+0xf5,0xbe,0xe5,0x4e,0x90,0xc5,0xc2,0x02,0x3b,0xd3,0xff,0x64,0x68,0x90,0xa7,0x1c, // 00008da0 |...N....;..dh...|
+0x2c,0xdc,0xd0,0x1a,0x13,0x00,0x70,0xec,0x92,0x08,0x68,0x3c,0x32,0x6e,0x28,0xb3, // 00008db0 |,.....p...h<2n(.|
+0x7b,0xbd,0xd1,0x5f,0xed,0x69,0x07,0x0a,0xf1,0xa2,0x02,0x3f,0x41,0x11,0xe4,0x1a, // 00008dc0 |{.._.i.....?A...|
+0x7f,0xb5,0x24,0x7b,0x6c,0xb1,0x8d,0x72,0x6c,0x57,0x72,0x26,0x82,0x83,0x13,0x01, // 00008dd0 |..${l..rlWr&....|
+0xfa,0x6a,0x54,0xb9,0x27,0x96,0x25,0x60,0x53,0xd0,0x4a,0xdb,0x75,0x1f,0xf3,0x89, // 00008de0 |.jT.'.%`S.J.u...|
+0x4a,0x55,0x9d,0x56,0xcd,0xda,0xcd,0x78,0xbd,0xd9,0x3e,0x5e,0x4d,0x5b,0xa8,0xb6, // 00008df0 |JU.V...x..>^M[..|
+0x6e,0x42,0x15,0xe8,0xea,0xf8,0x14,0x3e,0xeb,0xdb,0x7b,0x29,0x49,0xaf,0xf4,0x75, // 00008e00 |nB.....>..{)I..u|
+0xe3,0xb5,0x54,0xee,0x45,0x45,0xb3,0x68,0x57,0xa2,0x97,0xdd,0xa1,0x67,0x85,0x80, // 00008e10 |..T.EE.hW....g..|
+0xf2,0x89,0x90,0x79,0xd5,0x07,0x5d,0x4f,0x98,0x2e,0xb7,0x71,0xbc,0xb6,0xd9,0x84, // 00008e20 |...y..]O...q....|
+0x95,0x12,0x8d,0x9d,0x81,0x03,0xbe,0x18,0xff,0xae,0xa5,0x8f,0x11,0x13,0x3a,0x47, // 00008e30 |..............:G|
+0x0a,0x27,0xe2,0x0a,0x5a,0x4b,0x45,0x1c,0x3d,0x0a,0xce,0x41,0xf4,0xa5,0x1f,0x09, // 00008e40 |.'..ZKE.=..A....|
+0x2f,0x75,0x08,0x97,0x41,0xb0,0x43,0x02,0x90,0xb1,0x56,0xf4,0xc8,0xdb,0xea,0xd3, // 00008e50 |/u..A.C...V.....|
+0xed,0xc7,0xe7,0x60,0x49,0x84,0xd8,0x72,0x59,0xba,0xe5,0x99,0x1f,0xb3,0x61,0x5b, // 00008e60 |...`I..rY.....a[|
+0x2d,0x36,0xed,0xa2,0xee,0x73,0xaa,0x24,0x17,0x27,0x01,0x9a,0x96,0x2b,0xf1,0xb3, // 00008e70 |-6...s.$.'...+..|
+0xb7,0x1e,0xfa,0x90,0x65,0xaf,0x02,0x24,0x8b,0xb0,0x8e,0xc7,0x37,0x37,0x34,0x27, // 00008e80 |....e..$....774'|
+0x65,0x76,0x4a,0xd1,0x74,0x95,0xfa,0xfb,0x1d,0x41,0x79,0x4a,0x12,0x40,0x26,0xb3, // 00008e90 |evJ.t....AyJ.@&.|
+0xff,0x22,0x04,0x27,0xcf,0xff,0xde,0xad,0x3c,0x39,0xe5,0x91,0xbb,0xd0,0x7a,0x5f, // 00008ea0 |.".'....<9....z_|
+0xd5,0xb4,0x68,0x2e,0x25,0x9a,0x38,0x1c,0x20,0x36,0xb0,0x66,0x91,0xb1,0x92,0x37, // 00008eb0 |..h.%.8. 6.f...7|
+0xad,0x89,0x96,0x1f,0x7c,0x4a,0x8a,0xd8,0xa7,0x2a,0xfd,0x50,0x4f,0x78,0xc3,0xfc, // 00008ec0 |....|J...*.POx..|
+0xeb,0x36,0xe2,0xdc,0x7a,0xe0,0xfa,0x72,0x9c,0x02,0x7b,0x46,0x52,0x81,0x8a,0x4d, // 00008ed0 |.6..z..r..{FR..M|
+0x6e,0x7f,0x7d,0x6a,0x81,0x4d,0x20,0x2a,0xee,0xa8,0x5b,0x74,0x3a,0x59,0x39,0xe2, // 00008ee0 |n.}j.M *..[t:Y9.|
+0xba,0x34,0x2b,0x02,0x8d,0xee,0x03,0xda,0xa8,0x32,0xe1,0xee,0x63,0x45,0x2a,0x57, // 00008ef0 |.4+......2..cE*W|
+0x77,0xcc,0xa6,0xdd,0x81,0xd8,0x15,0xaa,0xcd,0x55,0x23,0xe2,0x06,0xc8,0x60,0x50, // 00008f00 |w........U#...`P|
+0x82,0xd3,0x58,0xd6,0xcc,0x29,0x6b,0x20,0x74,0xa4,0x3b,0xe3,0xdd,0x28,0xec,0x49, // 00008f10 |..X..)k t.;..(.I|
+0x2f,0x8f,0xbe,0x7b,0x7b,0x0a,0x20,0xc2,0xbe,0xf0,0x32,0x81,0xf0,0xb5,0x6a,0x76, // 00008f20 |/..{{. ...2...jv|
+0xff,0xb2,0xfd,0xf0,0x2c,0x81,0x30,0x62,0x12,0x8f,0x87,0x17,0xbd,0xf4,0xde,0xdf, // 00008f30 |....,.0b........|
+0x16,0x6e,0xe7,0xcd,0xbd,0x80,0x80,0x5a,0x5d,0x17,0x4b,0xac,0xa8,0xeb,0x93,0x70, // 00008f40 |.n.....Z].K....p|
+0x94,0x5d,0x93,0xb2,0xdb,0xa9,0x1f,0xf8,0xba,0x5e,0xbf,0xf8,0xe5,0xd1,0x49,0x50, // 00008f50 |.].......^....IP|
+0x38,0x2d,0xac,0xea,0x89,0x7b,0x3f,0xb4,0x67,0x16,0x6f,0x25,0x30,0x7a,0xac,0x2f, // 00008f60 |8-...{?.g.o%0z./|
+0x47,0x05,0xe9,0x24,0x9a,0xe4,0xee,0xad,0x51,0xe0,0xda,0x1b,0x1a,0xee,0x98,0x5e, // 00008f70 |G..$....Q......^|
+0x55,0x5f,0xbd,0x9f,0x2b,0x28,0x38,0xea,0x6e,0xe0,0xfd,0x87,0x6f,0x12,0x02,0x86, // 00008f80 |U_..+(8.n...o...|
+0x23,0xea,0xfb,0x29,0x82,0xb3,0xe7,0x8f,0x22,0x87,0xee,0xbe,0x3f,0x7d,0x40,0x73, // 00008f90 |#..)...."...?}@s|
+0x94,0x58,0xcb,0x4a,0x9d,0xd3,0x81,0xe0,0x79,0x87,0x3a,0x5e,0x8d,0x7e,0x64,0xbe, // 00008fa0 |.X.J....y.:^.~d.|
+0x7d,0xef,0xf6,0x84,0x4f,0x57,0xcf,0xc8,0x79,0xba,0x17,0x89,0xe9,0xce,0x1b,0x4c, // 00008fb0 |}...OW..y......L|
+0x9d,0x9a,0x20,0xea,0xe5,0xf6,0xb6,0x4c,0x79,0xe8,0x4b,0xb9,0xba,0x87,0x23,0x23, // 00008fc0 |.. ....Ly.K...##|
+0x76,0x20,0x29,0xaa,0xa0,0x33,0x12,0xf5,0x76,0x6f,0x64,0x80,0x7b,0x49,0x83,0xed, // 00008fd0 |v )..3..vod.{I..|
+0xc9,0x25,0x8b,0x79,0x9b,0x09,0x60,0x04,0x8f,0x7a,0xe4,0xc8,0xc8,0x31,0xbf,0x66, // 00008fe0 |.%.y..`..z...1.f|
+0x8e,0xa6,0x50,0xd3,0xb7,0x77,0x7a,0x76,0xf1,0x4b,0x89,0x45,0x57,0x5e,0xa5,0xdd, // 00008ff0 |..P..wzv.K.EW^..|
+0x58,0x10,0xf6,0xbd,0x1a,0xb4,0xe5,0x9c,0x31,0x7a,0x61,0xe3,0x91,0xc8,0x51,0x6c, // 00009000 |X.......1za...Ql|
+0x44,0x28,0x8b,0x93,0xa9,0xe5,0x8d,0xfc,0x4f,0xad,0x5e,0x3c,0xb5,0x12,0x48,0xcf, // 00009010 |D(......O.^<..H.|
+0xf0,0x09,0x58,0xba,0xe8,0xc2,0xeb,0xb0,0xe5,0x63,0x5e,0x6b,0x04,0xe5,0x9a,0xb5, // 00009020 |..X......c^k....|
+0x24,0xff,0xd3,0x2d,0x69,0x62,0xd5,0xc5,0xc1,0x3c,0x67,0x56,0x04,0xb4,0x45,0x5c, // 00009030 |$..-ib...<gV..E\|
+0x46,0x6d,0x33,0x0b,0xfa,0x8b,0x70,0x63,0x12,0xbf,0x5c,0x78,0xa9,0xb8,0x9c,0xa9, // 00009040 |Fm3...pc..\x....|
+0xcf,0xf2,0xbd,0x39,0x8e,0x92,0xe0,0x52,0x07,0xfc,0xfa,0xc0,0x24,0x7d,0x45,0x5e, // 00009050 |...9...R....$}E^|
+0xab,0xe9,0xfb,0xf9,0xd9,0xac,0xb0,0xa5,0x2e,0xfc,0xa2,0x7d,0x46,0x35,0x08,0x5d, // 00009060 |...........}F5.]|
+0x36,0x03,0x89,0x8c,0xd4,0x90,0xd2,0xcd,0x7a,0x9c,0x32,0x48,0x81,0x8a,0x17,0x00, // 00009070 |6.......z.2H....|
+0x79,0xcd,0x17,0x2e,0xa5,0x95,0xe9,0xb7,0x12,0x36,0x58,0x38,0xa6,0x7d,0xbf,0x6d, // 00009080 |y........6X8.}.m|
+0x85,0x86,0x0a,0xa5,0xe8,0x9a,0x59,0xf6,0x0e,0x02,0xff,0x56,0xb6,0x9c,0x04,0x25, // 00009090 |......Y....V...%|
+0x2e,0x90,0xcd,0x8e,0x9a,0x8b,0xa1,0x30,0x7f,0x03,0xf5,0x7a,0x1b,0x64,0x08,0x5f, // 000090a0 |.......0...z.d._|
+0x21,0x1a,0xd3,0xb3,0x2c,0x72,0x4f,0x12,0x72,0x35,0x1a,0x12,0xb0,0xdf,0x89,0x1f, // 000090b0 |!...,rO.r5......|
+0x2f,0x49,0xbe,0x3a,0x66,0x0e,0x63,0x8a,0xf4,0x94,0xba,0xa5,0x76,0xfa,0x78,0xb5, // 000090c0 |/I.:f.c.....v.x.|
+0xce,0xd3,0xb5,0xc5,0xbb,0x4b,0x2b,0x8e,0xaf,0xf8,0xf8,0xaa,0x5a,0x5d,0x96,0xcd, // 000090d0 |.....K+.....Z]..|
+0x67,0x6f,0x21,0xf6,0x0b,0x54,0x9c,0x73,0xcc,0xf8,0x56,0x7e,0xed,0xa8,0xa4,0xaf, // 000090e0 |go!..T.s..V~....|
+0x9b,0xaa,0x2f,0x9d,0xa7,0x5b,0x62,0x08,0x0e,0xf3,0x21,0xff,0x86,0x89,0xfb,0x33, // 000090f0 |../..[b...!....3|
+0x29,0x39,0x7c,0xed,0x08,0x2e,0xdd,0xc7,0x66,0x11,0x09,0x65,0xc4,0x3f,0x6b,0x47, // 00009100 |)9|.....f..e.?kG|
+0x6b,0x05,0x8e,0xda,0x00,0x8b,0xad,0x08,0xe4,0x88,0x86,0x28,0xfe,0xe0,0xe6,0xf9, // 00009110 |k..........(....|
+0xcc,0x78,0x44,0xdf,0xbc,0x57,0xec,0x67,0x49,0x58,0xfc,0x40,0x83,0xcf,0x9d,0xc3, // 00009120 |.xD..W.gIX.@....|
+0xe2,0xfb,0x24,0xf7,0x95,0x52,0xdf,0xd4,0xb6,0x04,0x73,0x4a,0xa5,0x04,0xff,0x1e, // 00009130 |..$..R....sJ....|
+0x5b,0x42,0x06,0x7c,0xa6,0xc2,0x9d,0xcf,0x09,0x1e,0x6c,0x72,0xa1,0x03,0xc8,0x4f, // 00009140 |[B.|......lr...O|
+0xe6,0x53,0xe7,0xa2,0xb0,0x06,0xe8,0x48,0xf1,0x98,0xfa,0xd1,0x75,0xb7,0xe1,0x64, // 00009150 |.S.....H....u..d|
+0x83,0xc2,0x93,0xbb,0xd1,0xd0,0x97,0xe6,0x20,0xbc,0xc7,0x01,0x04,0xe8,0xf3,0xf8, // 00009160 |........ .......|
+0xe0,0x6d,0x4f,0x0a,0x98,0x11,0x95,0xd1,0x10,0x0a,0x09,0x90,0x97,0x4a,0x04,0xb9, // 00009170 |.mO..........J..|
+0xe9,0x38,0xb6,0x59,0x91,0x13,0x1b,0x18,0x7c,0x50,0x7c,0x14,0xdd,0x29,0xd2,0x7e, // 00009180 |.8.Y....|P|..).~|
+0xf6,0x98,0xf0,0xea,0x78,0xee,0xf6,0xc1,0x7d,0x6f,0x64,0xac,0x31,0x5a,0x00,0x88, // 00009190 |....x...}od.1Z..|
+0xde,0x1a,0xfc,0x5f,0x89,0x73,0xc1,0xae,0x92,0x1f,0x2b,0xe3,0xfd,0x0f,0x3d,0x6d, // 000091a0 |..._.s....+...=m|
+0x78,0x96,0xf4,0xa6,0xfe,0x0d,0x39,0xd2,0x2d,0x05,0x18,0x2b,0x9a,0xd6,0x6e,0xa1, // 000091b0 |x.....9.-..+..n.|
+0xda,0xe3,0xb2,0x92,0x03,0x3c,0xc9,0xd6,0xb4,0x12,0x0a,0x15,0xaa,0xd1,0xf5,0x9c, // 000091c0 |.....<..........|
+0x57,0x01,0x7d,0xa7,0x31,0x6d,0x38,0xde,0x79,0xd9,0xac,0xc8,0x54,0x22,0x4b,0x7c, // 000091d0 |W.}.1m8.y...T"K||
+0x47,0x52,0x05,0x52,0xe3,0x13,0xfd,0xa1,0x91,0x8d,0x29,0xfe,0x6b,0xd2,0xef,0x2c, // 000091e0 |GR.R......).k..,|
+0x62,0xbb,0x7c,0x95,0x51,0xac,0x2d,0x4b,0x72,0xc8,0x68,0xf1,0x16,0x38,0x0f,0x3d, // 000091f0 |b.|.Q.-Kr.h..8.=|
+0xa2,0x7b,0xf4,0x84,0xf8,0x66,0x17,0x23,0x10,0x5f,0x53,0x0e,0x1c,0x80,0xe7,0x4c, // 00009200 |.{...f.#._S....L|
+0xdc,0xde,0x0a,0xe6,0x02,0x11,0x15,0x1f,0xbc,0xe2,0x54,0x12,0x9e,0xa3,0xc1,0xe1, // 00009210 |..........T.....|
+0x7b,0xe0,0x45,0x53,0xbc,0x42,0x7d,0xca,0x7c,0xef,0x56,0x87,0x4e,0xd3,0x9f,0x8d, // 00009220 |{.ES.B}.|.V.N...|
+0x98,0xcf,0x16,0x0e,0x81,0xfc,0x67,0x41,0x00,0xf2,0x3e,0xa9,0x65,0x29,0xe7,0x32, // 00009230 |......gA..>.e).2|
+0xe9,0xfe,0x6e,0xad,0xf2,0xcb,0x73,0xe1,0xfb,0x0a,0xdf,0x72,0x65,0x2d,0x67,0x5f, // 00009240 |..n...s....re-g_|
+0x54,0x5d,0x8d,0x25,0x99,0xbb,0x62,0xe8,0x2a,0x1a,0x2a,0xdf,0x45,0x44,0x8b,0x27, // 00009250 |T].%..b.*.*.ED.'|
+0x8a,0x1d,0x94,0x97,0x48,0x11,0x94,0x86,0x30,0xbc,0x22,0xf6,0xa3,0xe4,0x3e,0x68, // 00009260 |....H...0."...>h|
+0xcd,0x13,0xe8,0x97,0x87,0x50,0x22,0x88,0x81,0x87,0xdd,0xf0,0x87,0x4a,0xd8,0x7b, // 00009270 |.....P"......J.{|
+0xc9,0x63,0xf5,0x38,0x36,0x56,0x3e,0x20,0xb2,0x3b,0x12,0xfa,0x77,0xcd,0xb3,0x97, // 00009280 |.c.86V> .;..w...|
+0xc7,0x2f,0x0b,0xf2,0x4b,0xd1,0x66,0xed,0x78,0x81,0x00,0x35,0xcd,0xeb,0x68,0x50, // 00009290 |./..K.f.x..5..hP|
+0x5b,0x5c,0x3d,0x93,0x62,0x79,0x3d,0xf2,0x2f,0x51,0xf4,0x1b,0x29,0x7f,0x9d,0x87, // 000092a0 |[\=.by=./Q..)...|
+0x9d,0x02,0xba,0x24,0xfc,0x66,0x74,0x83,0x7e,0xe6,0xfa,0xbc,0x0d,0x37,0x71,0x59, // 000092b0 |...$.ft.~....7qY|
+0x8e,0x79,0xad,0x0c,0x25,0x3b,0x4e,0x42,0xe7,0x6f,0x12,0x1f,0xef,0xef,0x52,0x9a, // 000092c0 |.y..%;NB.o....R.|
+0x75,0x94,0x63,0xdc,0x96,0x41,0x1b,0x42,0x78,0x96,0x40,0x3b,0x37,0x93,0x86,0x2b, // 000092d0 |u.c..A.Bx.@;7..+|
+0xcd,0xf8,0x75,0x76,0x23,0xb9,0xea,0x3f,0xc4,0x54,0xd7,0xef,0xcd,0x27,0xcc,0xb6, // 000092e0 |..uv#..?.T...'..|
+0x10,0xce,0x07,0xc9,0x16,0xb9,0xd7,0x65,0xfd,0x8c,0x37,0x76,0x0d,0x81,0x2f,0x87, // 000092f0 |.......e..7v../.|
+0x6b,0x8a,0xc3,0x5e,0x1a,0x88,0x0a,0x5d,0x79,0xf9,0x82,0xcf,0xe8,0xd4,0x44,0xf9, // 00009300 |k..^...]y.....D.|
+0xe8,0xc7,0x5d,0x3e,0x7f,0x84,0x8c,0x8b,0x53,0x24,0x3e,0xd2,0xa9,0xa2,0xf4,0xd6, // 00009310 |..]>....S$>.....|
+0xde,0x7a,0x9f,0x8d,0xbe,0xb2,0x43,0x16,0x1b,0x25,0xe7,0x4b,0xd0,0x70,0xbc,0x1c, // 00009320 |.z....C..%.K.p..|
+0xb0,0xd1,0x3f,0xa7,0x82,0x4a,0xcc,0x1a,0x76,0xf7,0x06,0x57,0x35,0x64,0x26,0x67, // 00009330 |..?..J..v..W5d&g|
+0x73,0x4a,0x4f,0x9c,0x26,0xa1,0xe2,0xa9,0x03,0x83,0xa1,0xaa,0x62,0x0c,0x2a,0x76, // 00009340 |sJO.&.......b.*v|
+0x68,0x0f,0xc5,0xd9,0x1a,0xd3,0x8b,0xac,0xa1,0x46,0x32,0xa3,0x6a,0xcd,0x3d,0x01, // 00009350 |h........F2.j.=.|
+0x54,0xa7,0x17,0xb4,0x53,0x67,0xde,0x91,0xc6,0x62,0xd9,0xa0,0x88,0x45,0xe7,0x62, // 00009360 |T...Sg...b...E.b|
+0xa9,0x18,0xd2,0x87,0x91,0x40,0xf9,0xca,0x83,0xcc,0xc7,0x2f,0x03,0x15,0x60,0x7e, // 00009370 |.....@...../..`~|
+0x27,0x74,0x4e,0x74,0x71,0x31,0x55,0xb9,0xda,0x35,0xc0,0xa2,0xe8,0x0d,0xef,0x71, // 00009380 |'tNtq1U..5.....q|
+0xf0,0x74,0xc6,0xc6,0x01,0x17,0xd4,0x95,0xff,0x90,0xe3,0x29,0x43,0xb9,0x7a,0x67, // 00009390 |.t.........)C.zg|
+0x93,0x10,0x41,0xbf,0xb5,0x27,0x25,0x83,0x28,0x22,0x0a,0xde,0x50,0x1b,0xdc,0xe5, // 000093a0 |..A..'%.("..P...|
+0xe3,0x34,0x14,0xc3,0xb6,0xa0,0xa0,0xf2,0x29,0xfd,0xe6,0xa2,0x1c,0xbf,0x0d,0x0d, // 000093b0 |.4......).......|
+0x70,0xb6,0x63,0x9b,0x8d,0x3c,0xf8,0x1d,0x3c,0x60,0x70,0xf5,0x40,0xf7,0x76,0xce, // 000093c0 |p.c..<..<`p.@.v.|
+0x57,0x48,0x4e,0x4f,0xfe,0xd0,0xbd,0x2e,0x73,0xed,0x97,0x2a,0x06,0xc5,0x86,0xc3, // 000093d0 |WHNO....s..*....|
+0x49,0x34,0x2e,0x5c,0x0b,0xb5,0x1a,0x6c,0x8f,0x59,0xb8,0x6d,0xf4,0xe4,0x8c,0xe1, // 000093e0 |I4.\...l.Y.m....|
+0x9e,0xb2,0x43,0x71,0xa3,0xfc,0x77,0x80,0x66,0xf0,0xfa,0x91,0xf5,0x32,0xaf,0x7f, // 000093f0 |..Cq..w.f....2..|
+0x01,0x3b,0xb3,0x45,0x8d,0x8b,0xf9,0xef,0x3e,0x49,0xe5,0x4f,0x91,0x37,0x90,0x72, // 00009400 |.;.E....>I.O.7.r|
+0xb4,0x79,0xb5,0x19,0x50,0xe8,0x86,0xef,0x50,0x0b,0x90,0x45,0x76,0x68,0x2a,0xd9, // 00009410 |.y..P...P..Evh*.|
+0x58,0xd5,0x2c,0xbf,0x1d,0x62,0x9d,0xa4,0x59,0x27,0x9f,0xf3,0xd0,0xab,0xf3,0x2c, // 00009420 |X.,..b..Y'.....,|
+0x85,0xd8,0x86,0xd6,0x5d,0xb7,0x81,0xb7,0x1a,0x19,0x93,0xfc,0x26,0x59,0xa2,0x6b, // 00009430 |....].......&Y.k|
+0x43,0x2d,0x23,0x4e,0x21,0x91,0xae,0x78,0x96,0xec,0xeb,0x0b,0xa2,0x2b,0x55,0x37, // 00009440 |C-#N!..x.....+U7|
+0xed,0x9e,0xee,0x5c,0x16,0x1b,0xb8,0x95,0x95,0x76,0xae,0x05,0x34,0xab,0xec,0x34, // 00009450 |...\.....v..4..4|
+0x3f,0x59,0xea,0x12,0x1d,0x87,0xc8,0x16,0x10,0x8d,0x90,0xca,0x24,0xfc,0x9d,0xae, // 00009460 |?Y..........$...|
+0x90,0x11,0x80,0xb9,0x42,0xc7,0x23,0x38,0x08,0x21,0xb0,0x1b,0xef,0xd3,0x7e,0x49, // 00009470 |....B.#8.!....~I|
+0x5c,0x64,0x84,0x70,0x4c,0x7c,0xfc,0x48,0x25,0x72,0xbc,0x36,0xeb,0x19,0x2c,0x31, // 00009480 |\d.pL|.H%r.6..,1|
+0x6d,0x3d,0x36,0x76,0x47,0x49,0x88,0x09,0x0b,0x72,0x77,0xb7,0x73,0x32,0xba,0x07, // 00009490 |m=6vGI...rw.s2..|
+0x04,0xf3,0x21,0xdb,0xa6,0xfb,0xbc,0x22,0xb7,0x93,0x92,0x8d,0x7e,0x2c,0xca,0xb1, // 000094a0 |..!...."....~,..|
+0x31,0xad,0x3d,0x9b,0x31,0xa7,0x93,0x82,0x31,0x1c,0x76,0xcb,0xda,0xa2,0x50,0x5c, // 000094b0 |1.=.1...1.v...P\|
+0x2a,0x68,0x44,0xe4,0x59,0xea,0x01,0xbf,0x7d,0x1d,0xf6,0x5b,0xa6,0xf7,0xe4,0x9f, // 000094c0 |*hD.Y...}..[....|
+0x87,0xc6,0xf0,0x03,0x4e,0x64,0x00,0xb6,0xc6,0xcf,0x90,0xd2,0xd6,0xdc,0x03,0x87, // 000094d0 |....Nd..........|
+0x76,0xb5,0xcf,0x7a,0xbc,0x53,0xf8,0xb4,0xa6,0x53,0x10,0x82,0xa5,0x11,0x50,0x15, // 000094e0 |v..z.S...S....P.|
+0xfb,0x0f,0xdb,0x57,0x29,0xae,0x5f,0x74,0x71,0x36,0x52,0xc4,0xa4,0x71,0x1c,0x92, // 000094f0 |...W)._tq6R..q..|
+0xf8,0xc8,0x54,0x29,0xda,0x55,0x8e,0x02,0x33,0x60,0xaa,0x84,0x6b,0x15,0xee,0xed, // 00009500 |..T).U..3`..k...|
+0x83,0xbb,0x00,0x61,0xaa,0x02,0xdd,0x44,0x2c,0x03,0x97,0x1f,0xbb,0x40,0x0f,0x83, // 00009510 |...a...D,....@..|
+0xf5,0x41,0xe2,0xde,0x68,0xfe,0x80,0x37,0xfa,0x7d,0xe4,0xfc,0x80,0x2b,0x9f,0x2b, // 00009520 |.A..h..7.}...+.+|
+0x5e,0x2f,0x02,0xa5,0xca,0x02,0x6d,0x94,0xdf,0xfc,0x66,0x7f,0x4c,0xe1,0x29,0xb7, // 00009530 |^/....m...f.L.).|
+0x6e,0xd8,0x6b,0x2d,0x03,0xc9,0x9f,0x98,0x67,0x1a,0x74,0x25,0xf7,0xb2,0xa6,0x66, // 00009540 |n.k-....g.t%...f|
+0xb2,0xae,0x6d,0xb2,0xda,0x2d,0x66,0x5d,0x92,0x85,0xaf,0x4a,0x69,0x5c,0x43,0x24, // 00009550 |..m..-f]...Ji\C$|
+0x86,0x5c,0x92,0xdf,0x08,0x35,0x98,0x60,0xd4,0xea,0x32,0xa9,0xd4,0x65,0x0c,0x72, // 00009560 |.\...5.`..2..e.r|
+0x1e,0x70,0xaa,0x56,0x12,0x58,0x32,0x60,0xac,0x6c,0x6f,0xc7,0xd1,0xd8,0xda,0x62, // 00009570 |.p.V.X2`.lo....b|
+0x2d,0x2c,0xf9,0x03,0x6f,0x31,0x30,0x4c,0x57,0x38,0x8e,0x89,0x4e,0xe9,0x0b,0x0f, // 00009580 |-,..o10LW8..N...|
+0xf0,0xec,0x9e,0x86,0x55,0x8c,0x83,0xd6,0x78,0xb3,0xef,0xfe,0xc9,0x38,0xe8,0x5f, // 00009590 |....U...x....8._|
+0x94,0x12,0x17,0xa8,0xa8,0xa5,0xf3,0x4b,0xd4,0x90,0x24,0x54,0xb0,0xb8,0x41,0x11, // 000095a0 |.......K..$T..A.|
+0x70,0xba,0xa1,0xf4,0xc4,0xf0,0x70,0x23,0x44,0x8a,0x18,0x93,0x5b,0x00,0xc4,0x7e, // 000095b0 |p.....p#D...[..~|
+0x4e,0x78,0x75,0x78,0xdd,0x4d,0x5e,0xde,0x91,0x89,0x7a,0x0d,0x87,0xad,0xf4,0x5a, // 000095c0 |Nxux.M^...z....Z|
+0xdb,0x7f,0x5f,0x51,0x1c,0xdf,0xe6,0x13,0x93,0xcc,0x5b,0x4b,0xda,0x35,0xac,0x35, // 000095d0 |.._Q......[K.5.5|
+0xcf,0x28,0xc0,0xb3,0xe8,0xc1,0x38,0x87,0x83,0xdb,0x7a,0x6e,0xe9,0x7b,0x23,0xdd, // 000095e0 |.(....8...zn.{#.|
+0xb1,0x8f,0x03,0xd6,0x28,0x27,0x26,0x60,0x9d,0x1a,0xb1,0xb7,0x75,0xd2,0x6b,0xd8, // 000095f0 |....('&`....u.k.|
+0xf6,0x1e,0x20,0x3a,0x87,0xeb,0xc4,0xc6,0x85,0x09,0xaf,0xcf,0x30,0x60,0x8d,0x52, // 00009600 |.. :........0`.R|
+0xc6,0xd0,0x62,0x8a,0x2a,0xd3,0xac,0x5b,0x42,0xfd,0xe9,0x92,0xa6,0x23,0x39,0xfe, // 00009610 |..b.*..[B....#9.|
+0x57,0xf2,0x3b,0x43,0xa6,0x18,0x27,0x92,0x16,0x83,0x04,0x5e,0x76,0xcf,0xbb,0x10, // 00009620 |W.;C..'....^v...|
+0xb3,0x72,0xa5,0xf7,0x02,0xb9,0x7d,0x74,0x5a,0x72,0x2c,0x3a,0x07,0x29,0x94,0x93, // 00009630 |.r....}tZr,:.)..|
+0x91,0x0a,0xcd,0x06,0x3b,0x7a,0x5e,0xd7,0x64,0xa2,0x37,0x77,0xcf,0x3a,0x62,0x5f, // 00009640 |....;z^.d.7w.:b_|
+0x30,0xd5,0xbc,0x81,0x49,0xe3,0x63,0x04,0xf7,0x08,0x00,0xd7,0xd9,0xef,0x31,0xce, // 00009650 |0...I.c.......1.|
+0xfb,0xaf,0xec,0x80,0x06,0x36,0x50,0x6a,0x4c,0xa5,0xc5,0x1c,0x10,0xf9,0xdb,0x23, // 00009660 |.....6PjL......#|
+0x45,0x0c,0xef,0xc6,0x1d,0x6e,0x83,0x59,0x72,0xc9,0xf3,0xd9,0x0e,0x78,0x8b,0x9e, // 00009670 |E....n.Yr....x..|
+0x4f,0xce,0x9f,0x9a,0x10,0x39,0xe1,0xb7,0x6e,0x44,0x8d,0xef,0x74,0x13,0x8a,0xe9, // 00009680 |O....9..nD..t...|
+0x1e,0xd8,0x8c,0x35,0x1b,0x0f,0xed,0x1e,0xb6,0xb5,0x1a,0x85,0xc8,0x39,0x22,0x2c, // 00009690 |...5.........9",|
+0x76,0x2a,0x0d,0x54,0x32,0xb9,0x82,0x40,0x00,0x65,0x0e,0xfb,0x65,0x63,0x3f,0xd0, // 000096a0 |v*.T2..@.e..ec?.|
+0x29,0x2f,0x49,0x93,0xdb,0x11,0xf7,0x72,0x12,0x91,0x66,0x44,0x5c,0x84,0xce,0x1d, // 000096b0 |)/I....r..fD\...|
+0xed,0x0a,0x4c,0x84,0x8a,0x2f,0xf9,0x1c,0xcf,0x7c,0x27,0x16,0xaf,0x6d,0x3b,0x96, // 000096c0 |..L../...|'..m;.|
+0xc3,0x86,0x00,0xf5,0xe7,0xb0,0x33,0x4f,0xd3,0xa9,0xe6,0x9b,0x14,0xf4,0x98,0x52, // 000096d0 |......3O.......R|
+0xe6,0x73,0x9a,0x94,0xd8,0xa6,0xd8,0xe5,0x73,0x73,0x6c,0xa7,0xfa,0x71,0xf8,0x09, // 000096e0 |.s......ssl..q..|
+0x4f,0x2a,0x95,0x13,0xe6,0x36,0xb3,0xe9,0x67,0x02,0xfe,0xa5,0x05,0x51,0xff,0xaf, // 000096f0 |O*...6..g....Q..|
+0x35,0xb7,0x04,0x0f,0xd6,0x11,0x22,0xcb,0x1b,0xa6,0x38,0xb4,0xa8,0x37,0xc1,0x30, // 00009700 |5....."...8..7.0|
+0x95,0x0f,0xb9,0x3d,0x92,0xc1,0xd6,0xb3,0x5f,0x46,0xa5,0x9d,0x65,0x7c,0x16,0x57, // 00009710 |...=...._F..e|.W|
+0xcb,0x0d,0x21,0x2a,0xa2,0x44,0xfd,0x2b,0x30,0x79,0xdb,0x9a,0x8a,0x41,0x69,0xb4, // 00009720 |..!*.D.+0y...Ai.|
+0xdc,0x8c,0xca,0x07,0xb9,0x32,0x1c,0x65,0x4e,0x1f,0xbb,0x54,0xb8,0xeb,0x71,0xe2, // 00009730 |.....2.eN..T..q.|
+0xa6,0x81,0x95,0x01,0x29,0x64,0xab,0xde,0x18,0x3c,0x99,0x48,0x90,0x7f,0xa1,0x02, // 00009740 |....)d...<.H....|
+0xef,0xeb,0xc7,0xe8,0x87,0x73,0x3c,0x85,0x2f,0xc0,0x84,0x85,0x34,0xd1,0xbc,0x4c, // 00009750 |.....s<./...4..L|
+0xf6,0xbf,0x0f,0xe4,0xb8,0x93,0x53,0xd9,0x8e,0xb2,0x67,0x1e,0x8a,0xeb,0x0b,0x0c, // 00009760 |......S...g.....|
+0x79,0x73,0x95,0xc6,0x90,0x23,0x70,0x54,0x9c,0xc0,0xe3,0x14,0x97,0x53,0x6f,0x52, // 00009770 |ys...#pT.....SoR|
+0xb4,0xce,0xc7,0x69,0xe1,0xf5,0x3f,0xa4,0x4f,0x0a,0xd8,0x0e,0xa6,0xda,0x07,0x32, // 00009780 |...i..?.O......2|
+0x9f,0x08,0xeb,0xd7,0x1d,0x32,0xd7,0xa8,0x0c,0xae,0x6d,0xa2,0xe2,0x66,0x4d,0x1a, // 00009790 |.....2....m..fM.|
+0x73,0xc8,0x0e,0xb3,0xc1,0x0c,0x53,0xb7,0x63,0xb0,0xdc,0xb4,0xde,0xc8,0x29,0x31, // 000097a0 |s.....S.c.....)1|
+0x19,0x6e,0xa1,0x27,0x60,0xd4,0x32,0x3a,0x92,0xd1,0x4b,0x31,0x9e,0x8e,0xf6,0x6e, // 000097b0 |.n.'`.2:..K1...n|
+0x4e,0x6e,0x66,0x10,0xd7,0x0e,0xe4,0x25,0x3b,0xd3,0xd8,0x55,0x45,0x6f,0xa7,0x5b, // 000097c0 |Nnf....%;..UEo.[|
+0x6f,0xb3,0x2a,0x05,0x50,0x69,0xb9,0x01,0x42,0x2d,0x64,0xaa,0x23,0xdf,0xab,0x64, // 000097d0 |o.*.Pi..B-d.#..d|
+0xf7,0x32,0xa5,0x6c,0x35,0x8d,0x34,0x3f,0xaa,0x49,0x2a,0x24,0x92,0x89,0x87,0xd4, // 000097e0 |.2.l5.4?.I*$....|
+0x59,0xa0,0x3f,0x5b,0x97,0x0b,0x79,0x36,0xc4,0xad,0x85,0x92,0x16,0xde,0xe0,0xf7, // 000097f0 |Y.?[..y6........|
+0x82,0x7d,0x40,0x5c,0xd6,0x91,0xc7,0xd2,0x62,0xc0,0xd0,0x2c,0x63,0x7e,0x12,0x8c, // 00009800 |.}@\....b..,c~..|
+0x93,0xd3,0x70,0x39,0x11,0x32,0x69,0x20,0xd2,0x03,0x3b,0xf0,0x28,0xd1,0x0e,0xf7, // 00009810 |..p9.2i ..;.(...|
+0x50,0xe8,0x4a,0x72,0x03,0x80,0x59,0x53,0x9b,0x13,0x12,0x38,0x66,0x08,0xe9,0x34, // 00009820 |P.Jr..YS...8f..4|
+0xdc,0x65,0x30,0xcb,0xfb,0x1b,0xa4,0x92,0x9c,0x6d,0x12,0xf6,0x84,0x74,0x5d,0x3e, // 00009830 |.e0......m...t]>|
+0xb0,0x82,0x3e,0xc6,0x8d,0xf8,0xed,0x52,0xbf,0xea,0xd2,0xf0,0x1b,0xc4,0x31,0x3c, // 00009840 |..>....R......1<|
+0xa2,0x8b,0x74,0x75,0x29,0x6e,0xea,0xf9,0xf7,0xd1,0x6a,0xc3,0xc5,0xfb,0xcc,0x3d, // 00009850 |..tu)n....j....=|
+0x04,0xa4,0xc9,0x0e,0x57,0xc6,0xfb,0x44,0xbf,0xea,0xa5,0x6c,0x41,0x6d,0x2a,0x9d, // 00009860 |....W..D...lAm*.|
+0xc3,0xc5,0xc9,0x43,0x3e,0xdc,0xde,0x37,0x8c,0xa5,0xd5,0xfa,0x55,0xc8,0x5c,0x8a, // 00009870 |...C>..7....U.\.|
+0x96,0x96,0x91,0x04,0x6e,0x84,0x4f,0x06,0xc9,0xc0,0x8b,0x33,0x95,0x6c,0x67,0xae, // 00009880 |....n.O....3.lg.|
+0x50,0x59,0x6b,0xa2,0xa3,0x3f,0xff,0x6f,0x6a,0xed,0xa5,0x83,0xdd,0xb4,0x28,0xdc, // 00009890 |PYk..?.oj.....(.|
+0x88,0x1d,0x61,0xbc,0xfb,0xf3,0x70,0xc9,0xdf,0x53,0xd4,0x53,0x08,0xdc,0x10,0x61, // 000098a0 |..a...p..S.S...a|
+0x4a,0x37,0xda,0xbc,0xbe,0x9c,0x0d,0xa3,0x8e,0x9b,0x6f,0xeb,0x16,0x02,0x91,0x2c, // 000098b0 |J7........o....,|
+0xca,0xcb,0xf9,0xfd,0x2b,0x90,0x64,0xc7,0x53,0x63,0x14,0x54,0x59,0x4c,0x88,0x3a, // 000098c0 |....+.d.Sc.TYL.:|
+0xd1,0x19,0x6c,0x14,0x4c,0x30,0xb4,0x35,0x42,0x34,0x86,0xa8,0xd6,0xb9,0x49,0x92, // 000098d0 |..l.L0.5B4....I.|
+0x3c,0x8b,0x62,0xb5,0x86,0x8d,0x22,0x01,0xa2,0x04,0x4d,0x44,0x89,0x92,0xe3,0x8f, // 000098e0 |<.b..."...MD....|
+0x0b,0x9f,0x07,0xa3,0x2c,0xec,0xe8,0x51,0x96,0xae,0x43,0xe7,0xb2,0x2f,0x06,0x1f, // 000098f0 |....,..Q..C../..|
+0xf9,0xcd,0x67,0x27,0x83,0xb2,0xaf,0x26,0x20,0x80,0xd4,0xd1,0x18,0x9e,0xe2,0x8e, // 00009900 |..g'...& .......|
+0xa7,0xf8,0x35,0x20,0x4d,0x61,0x8e,0xc0,0x7c,0xc9,0x78,0x45,0xf9,0x7e,0x64,0x05, // 00009910 |..5 Ma..|.xE.~d.|
+0x97,0x1d,0x34,0xed,0x89,0x97,0xea,0x0c,0x86,0xc5,0x63,0x2c,0xa9,0xc6,0xa7,0x5b, // 00009920 |..4.......c,...[|
+0xcb,0x33,0x63,0x5b,0x52,0xfb,0x26,0x60,0xeb,0x28,0x21,0x0f,0x62,0x27,0xaf,0x4a, // 00009930 |.3c[R.&`.(!.b'.J|
+0x85,0xcc,0xcf,0x51,0x45,0xf3,0xd6,0xe6,0x74,0xde,0x05,0xba,0x4f,0x33,0xdf,0x13, // 00009940 |...QE...t...O3..|
+0x19,0x95,0xa6,0x83,0xeb,0xd7,0x10,0xed,0x1e,0x36,0xcc,0x53,0x17,0x32,0xf3,0xc4, // 00009950 |.........6.S.2..|
+0xa5,0x6a,0x07,0x3c,0xd9,0xaf,0x74,0xbb,0x55,0x19,0xa0,0xa9,0x8d,0x2a,0xac,0xee, // 00009960 |.j.<..t.U....*..|
+0x1e,0x6a,0x02,0x79,0x41,0x0e,0xf5,0xa1,0x1d,0xf0,0x63,0xb5,0x16,0x6e,0x21,0x3c, // 00009970 |.j.yA.....c..n!<|
+0x53,0xbe,0x0b,0x73,0x0c,0x39,0x01,0xd1,0x2e,0x03,0x73,0x4e,0x0b,0xfe,0x40,0xe7, // 00009980 |S..s.9....sN..@.|
+0x01,0xec,0x94,0xd3,0xff,0x23,0x30,0x51,0x1a,0xc9,0x44,0x90,0xe3,0x25,0x49,0xd1, // 00009990 |.....#0Q..D..%I.|
+0x3d,0x83,0xe5,0x4a,0xab,0x01,0xfa,0x5d,0x7d,0x7b,0x2a,0x87,0xf3,0x58,0x9c,0xad, // 000099a0 |=..J...]}{*..X..|
+0xa2,0xff,0x63,0x28,0x3d,0x70,0xbf,0xea,0xf5,0x5d,0xaa,0xc4,0x89,0x15,0x93,0x15, // 000099b0 |..c(=p...]......|
+0xca,0xf1,0xc2,0xb0,0x96,0x5e,0x53,0x25,0x53,0xeb,0x9d,0x14,0xf2,0x1c,0x8f,0xe0, // 000099c0 |.....^S%S.......|
+0x9d,0xe5,0xfd,0x34,0xe6,0xdd,0x12,0x96,0x81,0xd2,0x1d,0xeb,0x7f,0x48,0x35,0x77, // 000099d0 |...4.........H5w|
+0x62,0x29,0x1b,0xbb,0x53,0xa8,0x6b,0x86,0xe1,0x44,0xb1,0x9b,0x33,0x9d,0x48,0xd5, // 000099e0 |b)..S.k..D..3.H.|
+0x7a,0x52,0x75,0x4e,0xd7,0x99,0x85,0xc1,0x09,0x47,0x76,0x03,0xde,0x1c,0xd5,0xc0, // 000099f0 |zRuN.....Gv.....|
+0xda,0x04,0xa6,0x84,0x89,0x2b,0x96,0xb5,0x05,0x96,0xdf,0xa8,0xf0,0xfc,0x1d,0x71, // 00009a00 |.....+.........q|
+0x9a,0xf5,0x68,0x93,0x82,0xba,0xed,0x7c,0xb3,0xe4,0xa7,0x4f,0x25,0x1f,0xa7,0x4a, // 00009a10 |..h....|...O%..J|
+0x30,0xa7,0x92,0xde,0xcb,0x32,0x27,0x6c,0x36,0x43,0xd3,0x37,0x38,0x29,0x17,0x3f, // 00009a20 |0....2'l6C.78).?|
+0x8d,0x10,0x3a,0x45,0xcc,0xf3,0x8a,0xb7,0xbd,0xeb,0x30,0x1d,0xdc,0x9b,0x8f,0x9b, // 00009a30 |..:E......0.....|
+0x47,0xda,0x81,0x57,0x1f,0xaa,0x62,0x14,0xef,0xe7,0x1f,0xf0,0xbb,0xb4,0x2f,0x63, // 00009a40 |G..W..b......./c|
+0xb9,0x35,0xed,0x17,0x3d,0x58,0x12,0xed,0x22,0xa4,0x66,0xcc,0xfe,0x88,0x9f,0x32, // 00009a50 |.5..=X..".f....2|
+0x75,0x42,0x00,0x89,0x4a,0x15,0xb5,0xa9,0x83,0x94,0x4b,0x2b,0x32,0x50,0x47,0xce, // 00009a60 |uB..J.....K+2PG.|
+0x73,0x00,0xa6,0x86,0x8e,0xcd,0xdb,0xb9,0x42,0xbd,0x08,0x27,0xd6,0x96,0xab,0x0f, // 00009a70 |s.......B..'....|
+0xf4,0xc7,0x72,0x9d,0x64,0x09,0xf0,0x0a,0xe1,0xa5,0x04,0xca,0xe3,0x46,0x7d,0xbd, // 00009a80 |..r.d........F}.|
+0xc1,0x88,0x13,0xf3,0xe3,0xaf,0xda,0x94,0x10,0x81,0x0d,0x9f,0x07,0x0a,0x6b,0x24, // 00009a90 |..............k$|
+0x74,0x1a,0x15,0x3e,0x65,0xa8,0x45,0x9f,0xe5,0xce,0x3f,0xd4,0x75,0xc9,0xa0,0x85, // 00009aa0 |t..>e.E...?.u...|
+0xaa,0x2e,0xb0,0xc7,0x86,0xde,0x4c,0x34,0x3a,0xd6,0xdc,0x82,0xc4,0x36,0x0a,0x42, // 00009ab0 |......L4:....6.B|
+0x0e,0x83,0xfa,0xf2,0x9c,0x6c,0x55,0x3f,0x74,0x0e,0x8b,0x53,0x6d,0x96,0xcb,0x5b, // 00009ac0 |.....lU?t..Sm..[|
+0x07,0xf9,0x1c,0xd8,0x12,0x77,0x64,0xde,0x90,0x6f,0xb6,0x99,0xdb,0x2a,0xdd,0x9f, // 00009ad0 |.....wd..o...*..|
+0x35,0xdb,0x95,0xd2,0x9c,0x3d,0x62,0x55,0x86,0xc4,0x56,0xfe,0xf2,0x8a,0x43,0x24, // 00009ae0 |5....=bU..V...C$|
+0x3a,0x00,0x63,0x14,0x69,0xc6,0xe6,0x78,0x01,0x18,0x3e,0x82,0x8a,0x11,0x96,0x25, // 00009af0 |:.c.i..x..>....%|
+0x5e,0xd2,0xdf,0x4f,0x4c,0x2b,0x2c,0x2b,0x16,0x43,0x8b,0xb0,0x1e,0xa3,0x03,0x1f, // 00009b00 |^..OL+,+.C......|
+0xf0,0x03,0xa7,0x50,0xcb,0xc5,0xfe,0x85,0x57,0x39,0x0d,0xd4,0x8a,0xc7,0xb4,0x2f, // 00009b10 |...P....W9...../|
+0x55,0x88,0xc7,0x4c,0xfa,0xdd,0xda,0xde,0x50,0xb4,0xa0,0xea,0x0e,0xcf,0x61,0xa4, // 00009b20 |U..L....P.....a.|
+0xaf,0x1c,0xb8,0xcb,0x99,0x02,0xc4,0x81,0x7f,0x02,0x93,0xde,0x0e,0x02,0xde,0xbf, // 00009b30 |................|
+0x89,0x91,0xe4,0xf0,0x9a,0x6f,0xae,0x6c,0xb4,0x2a,0x1f,0xc6,0xd6,0xdb,0xe0,0xf5, // 00009b40 |.....o.l.*......|
+0x1a,0xa5,0xcf,0xf1,0x17,0x72,0x91,0xae,0xa8,0x7a,0x64,0x0e,0xe5,0x7f,0x0e,0x6e, // 00009b50 |.....r...zd....n|
+0x3f,0x47,0x75,0x0f,0xba,0xc9,0x60,0xa7,0xe9,0xf2,0x41,0xdb,0x56,0xf7,0x81,0x58, // 00009b60 |?Gu...`...A.V..X|
+0x2a,0x7c,0xc3,0x0a,0x75,0x6c,0x3a,0x6c,0x1f,0xec,0x79,0xf4,0x7e,0xb7,0x5e,0x83, // 00009b70 |*|..ul:l..y.~.^.|
+0xad,0x84,0xb9,0x5f,0xad,0x35,0xe6,0x23,0xac,0xac,0x72,0x61,0xae,0x49,0xb9,0xd2, // 00009b80 |..._.5.#..ra.I..|
+0x37,0xb9,0x4a,0xa6,0x9b,0x1c,0x50,0x3d,0x49,0xaf,0xfb,0x1c,0xe5,0x36,0x5a,0x18, // 00009b90 |7.J...P=I....6Z.|
+0xa6,0x60,0xbc,0x85,0x32,0x19,0xd1,0x06,0xba,0xe3,0x7c,0x30,0x23,0x0b,0x06,0xd1, // 00009ba0 |.`..2.....|0#...|
+0xb2,0xac,0xc6,0x5c,0xec,0xa8,0x8a,0xce,0x6d,0x81,0xda,0x1d,0x17,0xa3,0x13,0x59, // 00009bb0 |...\....m......Y|
+0xda,0x42,0xce,0x17,0xc3,0x2f,0xde,0xb1,0x7d,0x0b,0x8f,0xc1,0xc2,0x4b,0xc4,0xd9, // 00009bc0 |.B.../..}....K..|
+0x9c,0xa9,0x5b,0x01,0x09,0x6a,0x9a,0x54,0x97,0x7a,0xe5,0xf4,0x6f,0xa4,0x68,0xe3, // 00009bd0 |..[..j.T.z..o.h.|
+0x8e,0xec,0x7d,0x0c,0x23,0xd5,0xf1,0xb6,0xb8,0x33,0xb2,0x09,0xaa,0x2e,0x0f,0xfa, // 00009be0 |..}.#....3......|
+0x2f,0x1c,0xff,0xf7,0xd8,0xd9,0xc6,0xef,0x14,0x53,0x27,0x89,0xc2,0x4a,0x2a,0x85, // 00009bf0 |/........S'..J*.|
+0xa3,0x0d,0x3d,0x68,0x34,0x9f,0xc5,0xc3,0x54,0x1a,0x9d,0xd7,0x0c,0x1c,0x3b,0xf0, // 00009c00 |..=h4...T.....;.|
+0x6f,0x57,0x98,0x1c,0xd1,0xd2,0x79,0xcc,0x99,0x3c,0x83,0x1a,0x66,0x4a,0xf5,0x6a, // 00009c10 |oW....y..<..fJ.j|
+0xb5,0x3c,0xf1,0xed,0x27,0x1b,0xef,0xcf,0x8c,0x60,0x09,0x22,0x8b,0xdb,0x80,0x57, // 00009c20 |.<..'....`."...W|
+0x0d,0x48,0xbb,0x49,0x70,0xe4,0x26,0x29,0x92,0x44,0xcf,0x59,0xf3,0x0c,0x1b,0x85, // 00009c30 |.H.Ip.&).D.Y....|
+0x49,0x2d,0x63,0x8c,0x05,0xd3,0x98,0xdc,0xd6,0xcf,0x7d,0x2f,0x6f,0x95,0xd1,0x90, // 00009c40 |I-c.......}/o...|
+0xad,0x2b,0xe9,0xb1,0xbf,0xcf,0x01,0x3c,0xf1,0xe5,0x4d,0xac,0x1f,0x88,0x40,0x5b, // 00009c50 |.+.....<..M...@[|
+0xef,0x72,0x02,0x93,0x8c,0xab,0x69,0xb7,0x10,0x5e,0x4a,0xbd,0xa9,0x8e,0xab,0xc3, // 00009c60 |.r....i..^J.....|
+0x0f,0xad,0x56,0xae,0xa8,0x77,0xaa,0xec,0x46,0x37,0x7e,0x3c,0x29,0x18,0x20,0x6c, // 00009c70 |..V..w..F7~<). l|
+0xc2,0xa9,0xce,0x28,0x25,0xf7,0x49,0x12,0x7a,0x8f,0x41,0x15,0x4e,0x91,0xed,0x0f, // 00009c80 |...(%.I.z.A.N...|
+0xf3,0xc5,0x56,0xce,0xf3,0xa8,0xd6,0x89,0xf5,0xab,0xbe,0x86,0x12,0x1f,0xd6,0xf9, // 00009c90 |..V.............|
+0x85,0x86,0xcf,0x69,0x98,0x65,0x59,0xbe,0x3c,0xd9,0xa6,0xd3,0xec,0xe1,0x1b,0xb3, // 00009ca0 |...i.eY.<.......|
+0x24,0x2f,0xd9,0x45,0x29,0xa7,0x76,0x07,0x8b,0x36,0x54,0x64,0x32,0x99,0x6c,0x2d, // 00009cb0 |$/.E).v..6Td2.l-|
+0x27,0xd0,0xab,0x7b,0xbc,0x5c,0x86,0xdb,0xf4,0x2d,0x3e,0x36,0x06,0x0b,0xfe,0xb4, // 00009cc0 |'..{.\...->6....|
+0xe6,0x43,0x84,0xe8,0x29,0x3a,0xc6,0xbf,0xce,0x80,0x41,0xe8,0x29,0x9c,0x02,0x59, // 00009cd0 |.C..):....A.)..Y|
+0x83,0xcf,0xe0,0x2c,0xe8,0xf0,0x71,0x8b,0x14,0x56,0xa9,0x2d,0x9d,0x41,0xab,0x23, // 00009ce0 |...,..q..V.-.A.#|
+0xa1,0xde,0xed,0x0e,0xd2,0x7b,0x55,0x07,0x43,0x10,0xa6,0xdc,0x21,0x71,0xf6,0x87, // 00009cf0 |.....{U.C...!q..|
+0xcd,0xf4,0x77,0xa2,0x93,0x44,0xba,0x8e,0x28,0x66,0x1c,0xe8,0x47,0xd6,0xe2,0x84, // 00009d00 |..w..D..(f..G...|
+0x35,0xeb,0x78,0x01,0x85,0x7e,0x57,0xe1,0xe6,0x62,0xcb,0xfa,0x71,0xd5,0x3a,0x97, // 00009d10 |5.x..~W..b..q.:.|
+0xcb,0xd7,0x34,0xa4,0x2d,0x94,0xad,0x1c,0xbe,0x5b,0x0e,0x34,0x0f,0x5c,0x20,0x23, // 00009d20 |..4.-....[.4.\ #|
+0xca,0x96,0xb4,0x2f,0x40,0x7d,0x69,0x15,0xeb,0x19,0xb4,0x0a,0xdf,0xf2,0x29,0x1c, // 00009d30 |.../@}i.......).|
+0xc6,0x59,0xf4,0x49,0x8f,0xde,0xff,0xd0,0xeb,0x49,0xe3,0x14,0x5e,0xee,0x29,0x70, // 00009d40 |.Y.I.....I..^.)p|
+0x69,0x00,0x29,0xc5,0x08,0x25,0xd9,0x9e,0x28,0x8a,0x10,0x5c,0xc0,0x3d,0xfc,0x43, // 00009d50 |i.)..%..(..\.=.C|
+0x9d,0x2d,0x9d,0x21,0x62,0x9b,0x86,0xe4,0x94,0xd5,0xe9,0x40,0xa4,0x5b,0x9e,0x75, // 00009d60 |.-.!b......@.[.u|
+0x25,0x3e,0x6b,0x35,0xd2,0xa5,0xaf,0x06,0x83,0x5d,0x9d,0x36,0x81,0x62,0x4a,0x47, // 00009d70 |%>k5.....].6.bJG|
+0xd2,0xd8,0xeb,0x6f,0x4b,0x06,0x15,0xc2,0xb9,0x68,0xb6,0x39,0xb2,0x1e,0x2d,0x59, // 00009d80 |...oK....h.9..-Y|
+0x98,0xfd,0x1e,0xb8,0xfc,0xdd,0xe2,0x89,0x25,0xa2,0x1e,0x84,0x80,0xc1,0x40,0xc9, // 00009d90 |........%.....@.|
+0xf7,0x09,0x52,0xbe,0x2d,0x35,0x77,0x18,0x6f,0xda,0xd3,0x9f,0x9d,0xe0,0xc8,0x0e, // 00009da0 |..R.-5w.o.......|
+0x87,0xd4,0x12,0xbb,0x4a,0xb2,0x98,0x16,0x85,0xf2,0xa2,0x01,0xb5,0xb7,0xf8,0xaf, // 00009db0 |....J...........|
+0xda,0x86,0x7a,0x00,0x41,0x02,0x8b,0xee,0x07,0xe6,0x4c,0x0d,0xcd,0xb7,0x0b,0x53, // 00009dc0 |..z.A.....L....S|
+0x84,0xe1,0x3e,0xa4,0x77,0xa4,0xfe,0x8f,0xc5,0xe0,0x2e,0x95,0x00,0x41,0xd9,0x19, // 00009dd0 |..>.w........A..|
+0x22,0xb1,0xb5,0x1f,0x69,0xd6,0xcf,0x44,0xf6,0x71,0x31,0x76,0x9d,0x76,0xda,0xab, // 00009de0 |"...i..D.q1v.v..|
+0xc4,0x83,0xb8,0x66,0x74,0xe1,0x5b,0x4b,0xa4,0xba,0x70,0xc1,0x6e,0x34,0x21,0xae, // 00009df0 |...ft.[K..p.n4!.|
+0xe7,0xa0,0xbb,0xa3,0x1b,0xa4,0xc6,0x45,0x03,0x90,0x22,0xa3,0x8f,0x89,0x8e,0x5d, // 00009e00 |.......E.."....]|
+0x8e,0xf5,0x1d,0x4d,0x59,0xbb,0x52,0x9a,0x96,0x60,0x41,0xa6,0x03,0x9c,0x6c,0x3f, // 00009e10 |...MY.R..`A...l?|
+0xed,0x4b,0x51,0xe7,0xd8,0x76,0x15,0x0e,0x96,0xad,0x4f,0xad,0x4a,0x17,0xf3,0x7e, // 00009e20 |.KQ..v....O.J..~|
+0xf0,0xbd,0xa8,0xc8,0xc4,0x7b,0x7a,0xb6,0x60,0xd6,0xb1,0x5d,0x8a,0x3d,0x4a,0x98, // 00009e30 |.....{z.`..].=J.|
+0xc0,0x53,0xb9,0x44,0x49,0xa6,0xbe,0xb4,0x1a,0x4e,0x5e,0xd2,0xa3,0x67,0xec,0xdc, // 00009e40 |.S.DI....N^..g..|
+0xdb,0xe9,0x94,0xa2,0xa1,0x95,0x69,0xf3,0x16,0x9a,0x07,0x4f,0xe8,0x89,0x3f,0x79, // 00009e50 |......i....O..?y|
+0xde,0x17,0xfe,0x63,0x64,0xd2,0x73,0x66,0x69,0x14,0xae,0x5c,0x08,0xa9,0x8c,0xf4, // 00009e60 |...cd.sfi..\....|
+0xe1,0xb7,0xaf,0xce,0x1e,0xa6,0x76,0x5c,0xb9,0x20,0xcc,0xb0,0x93,0xdb,0xb7,0xa2, // 00009e70 |......v\. ......|
+0xbc,0xb6,0x48,0x4d,0xcc,0xe2,0x67,0x70,0xe6,0x55,0x64,0xb2,0x02,0x00,0x97,0xcc, // 00009e80 |..HM..gp.Ud.....|
+0x2f,0x1f,0x84,0xc6,0xcf,0x66,0x12,0x33,0x50,0x88,0x79,0xd1,0x01,0xf0,0x47,0x86, // 00009e90 |/....f.3P.y...G.|
+0xc3,0xd4,0xfc,0xf7,0x55,0xb3,0x3e,0x8d,0x1a,0x71,0x02,0x9d,0x95,0x95,0x3a,0xf4, // 00009ea0 |....U.>..q....:.|
+0x17,0x0a,0x93,0x74,0x4a,0xcf,0xbd,0x0d,0x46,0x0a,0x60,0xe9,0x82,0x66,0xda,0x96, // 00009eb0 |...tJ...F.`..f..|
+0xd1,0x98,0xce,0x19,0x3d,0x0c,0x01,0x39,0x03,0xb0,0x91,0xdc,0xc7,0x7a,0x39,0x78, // 00009ec0 |....=..9.....z9x|
+0x36,0x46,0xfb,0x20,0x2e,0x07,0x39,0xc8,0xf7,0x33,0x56,0x6c,0x93,0xef,0x26,0xa7, // 00009ed0 |6F. ..9..3Vl..&.|
+0x59,0xd8,0xe1,0x6f,0x1c,0x9e,0x5a,0x0b,0xf3,0x12,0xe1,0x1c,0x89,0xbd,0x64,0xf2, // 00009ee0 |Y..o..Z.......d.|
+0xeb,0xd2,0x69,0x0b,0x6a,0xb2,0x08,0x2b,0x8f,0x6f,0xaf,0x2c,0x5e,0x6d,0xaa,0x2e, // 00009ef0 |..i.j..+.o.,^m..|
+0x0a,0x17,0x3e,0x74,0x4e,0xd9,0x4d,0x6b,0x8f,0xcf,0xce,0x07,0x3c,0x9e,0x6d,0xb2, // 00009f00 |..>tN.Mk....<.m.|
+0xbb,0x17,0x10,0x3f,0xc1,0x0b,0x95,0x56,0x85,0xa3,0x71,0x47,0x4c,0x08,0x6f,0x9b, // 00009f10 |...?...V..qGL.o.|
+0x13,0x91,0xb4,0x23,0x26,0xdb,0xd9,0xcb,0xf9,0x99,0xc6,0x24,0xd2,0xa7,0x10,0xf0, // 00009f20 |...#&......$....|
+0xe8,0x9c,0x9a,0x2b,0x99,0xc0,0x26,0xa2,0x62,0xef,0xdf,0xff,0x2e,0x52,0x33,0x5b, // 00009f30 |...+..&.b....R3[|
+0xa0,0xdb,0x35,0x2d,0x09,0x47,0xc2,0x21,0x89,0xba,0x61,0x68,0xbf,0x2a,0x35,0x99, // 00009f40 |..5-.G.!..ah.*5.|
+0x49,0xcb,0x92,0x6e,0xcf,0xd3,0x24,0x9a,0x29,0x67,0xfa,0x36,0x8d,0xde,0xa6,0x48, // 00009f50 |I..n..$.)g.6...H|
+0x43,0x32,0xed,0x20,0x98,0x44,0x6a,0x8d,0x0c,0xf7,0xc2,0x04,0x34,0x3e,0x07,0xb9, // 00009f60 |C2. .Dj.....4>..|
+0x66,0xad,0x80,0xbe,0x12,0x50,0x7d,0x4d,0x86,0xd7,0xc2,0x7f,0xc3,0xa1,0xf6,0xf2, // 00009f70 |f....P}M........|
+0xeb,0x79,0x7d,0xc8,0x15,0xdb,0x31,0x02,0xb5,0x21,0x51,0xee,0x73,0xa9,0x0e,0x9f, // 00009f80 |.y}...1..!Q.s...|
+0x6a,0x15,0xca,0xf9,0xbc,0xe4,0x58,0x3b,0x58,0x8b,0x84,0xd9,0xc0,0x4a,0x49,0x06, // 00009f90 |j.....X;X....JI.|
+0xcf,0x12,0x14,0x31,0x75,0xc3,0x07,0x5a,0x7b,0xc5,0xbf,0xbb,0xb1,0xf0,0xd1,0x64, // 00009fa0 |...1u..Z{......d|
+0x16,0xf7,0xd7,0x5c,0xd2,0xe5,0xd8,0xe8,0x4a,0xc0,0xdf,0x77,0x5d,0xfb,0x29,0xd5, // 00009fb0 |...\....J..w].).|
+0x39,0x01,0x73,0x87,0x0c,0x76,0x66,0xba,0x34,0xfb,0x59,0xf7,0xa3,0x76,0x06,0xc8, // 00009fc0 |9.s..vf.4.Y..v..|
+0xe4,0xa0,0xf7,0xf8,0xd4,0x03,0x0c,0xf6,0xba,0x99,0x13,0x54,0xb3,0xff,0xbb,0x54, // 00009fd0 |...........T...T|
+0x08,0xa5,0xf9,0x5b,0xc0,0xca,0xf2,0xbd,0x7c,0x41,0xef,0x41,0x04,0x15,0x02,0x1d, // 00009fe0 |...[....|A.A....|
+0x98,0x22,0x5f,0x53,0xaa,0x1c,0x4e,0xbe,0xd5,0x24,0x43,0x13,0x9a,0xb5,0xba,0xd1, // 00009ff0 |."_S..N..$C.....|
+0x4a,0xe8,0x48,0xd0,0x84,0xf7,0x59,0x1d,0x17,0x27,0x8d,0xbf,0xc7,0x0c,0x41,0x45, // 0000a000 |J.H...Y..'....AE|
+0xf7,0x20,0x3e,0x56,0x5d,0xa6,0x57,0x4a,0x1e,0xd5,0xf0,0xde,0xe6,0x21,0x0b,0x2a, // 0000a010 |. >V].WJ.....!.*|
+0xb2,0x52,0xdd,0xda,0xfe,0x9d,0x28,0xde,0x96,0x6d,0xcb,0xbd,0x11,0x26,0x6d,0x1a, // 0000a020 |.R....(..m...&m.|
+0x70,0x63,0x22,0xa0,0xe2,0xa9,0xb6,0x0b,0x17,0x28,0x3f,0xe8,0x3f,0xd0,0xbb,0x9e, // 0000a030 |pc"......(?.?...|
+0xf5,0xdd,0x6d,0x58,0x6a,0x02,0x94,0x70,0x2e,0xc3,0x46,0x0a,0x9b,0xe2,0x18,0x2f, // 0000a040 |..mXj..p..F..../|
+0x57,0x53,0x78,0xb1,0x77,0xf2,0xd2,0x67,0xbb,0x09,0x04,0xd0,0x85,0xfa,0xfe,0x9b, // 0000a050 |WSx.w..g........|
+0xf6,0xeb,0x9c,0x76,0xfa,0xb7,0x45,0x0a,0xc2,0x63,0x5f,0x87,0xab,0xd0,0x94,0x90, // 0000a060 |...v..E..c_.....|
+0x63,0x03,0x54,0x9b,0x6a,0xc6,0xef,0x2b,0xdb,0xa6,0x0c,0x1e,0x9d,0x2f,0x48,0xfe, // 0000a070 |c.T.j..+...../H.|
+0xd3,0x70,0xc9,0xc3,0x3d,0xea,0x96,0xfa,0x21,0x5d,0xc5,0x14,0xc3,0x37,0x46,0x2a, // 0000a080 |.p..=...!]...7F*|
+0x8d,0xa0,0x20,0xfb,0xe9,0x97,0x70,0xe1,0x03,0xc2,0xd9,0x54,0x34,0xf1,0xd0,0x65, // 0000a090 |.. ...p....T4..e|
+0x16,0x2d,0xaa,0x34,0x17,0x17,0x57,0x1d,0x20,0xf4,0xb6,0x7e,0xa7,0xea,0xf8,0x43, // 0000a0a0 |.-.4..W. ..~...C|
+0xf7,0xdd,0xbe,0x7c,0x60,0x07,0x27,0x94,0x3e,0xa5,0x60,0x4c,0x8b,0xf1,0x4e,0xb1, // 0000a0b0 |...|`.'.>.`L..N.|
+0x1e,0xdd,0xac,0x3f,0x06,0xa5,0x4f,0x1b,0x36,0xaf,0xf0,0xca,0x6f,0x2a,0xc5,0xad, // 0000a0c0 |...?..O.6...o*..|
+0x62,0xf8,0x82,0x90,0xd1,0xc9,0xf7,0x75,0x9c,0x11,0xcc,0x44,0x4f,0xf5,0x1e,0x86, // 0000a0d0 |b......u...DO...|
+0x51,0x6c,0x2f,0xed,0xbd,0x2f,0x3a,0x3f,0xe2,0xfb,0xee,0x43,0x04,0x5b,0xb6,0xed, // 0000a0e0 |Ql/../:?...C.[..|
+0x1d,0x37,0x07,0xda,0xbb,0x46,0x07,0xa9,0x59,0x8b,0xb6,0x78,0x8a,0xd4,0xd2,0xa8, // 0000a0f0 |.7...F..Y..x....|
+0xe6,0xb5,0xa2,0xdc,0x0f,0x83,0x2f,0x19,0x3b,0x45,0x35,0x26,0xe4,0x7c,0xdd,0x71, // 0000a100 |....../.;E5&.|.q|
+0x74,0x0b,0x19,0xe7,0xeb,0x17,0x83,0xd2,0xb8,0xce,0x4e,0x7e,0xa1,0xaf,0xfe,0xc9, // 0000a110 |t.........N~....|
+0x62,0x8c,0xf3,0x11,0x66,0xa3,0x08,0xac,0x3b,0x0d,0x60,0xa2,0x34,0x30,0x7f,0x99, // 0000a120 |b...f...;.`.40..|
+0x4d,0x09,0x5a,0x91,0x33,0xb0,0xac,0x06,0x48,0x25,0x4e,0x1d,0x76,0x7d,0xc7,0xd7, // 0000a130 |M.Z.3...H%N.v}..|
+0x18,0xf8,0xcf,0xe2,0x64,0xd8,0x68,0xb2,0xd8,0x73,0xf5,0xc4,0xe1,0x3b,0xc0,0x6f, // 0000a140 |....d.h..s...;.o|
+0xec,0x1b,0xa9,0x47,0xce,0xe5,0xbb,0xc9,0xd1,0xc5,0xf5,0xd6,0x01,0x36,0xba,0x26, // 0000a150 |...G.........6.&|
+0xe0,0x86,0x19,0x2a,0x1c,0xf4,0x95,0x06,0x91,0x66,0xd6,0x21,0xe3,0x78,0xff,0xdb, // 0000a160 |...*.....f.!.x..|
+0x4a,0x5d,0x06,0xae,0x1f,0xb8,0x1c,0x00,0x99,0x48,0xa8,0xde,0x89,0x07,0x0d,0xb9, // 0000a170 |J].......H......|
+0x18,0xcd,0xab,0x6d,0x8f,0x3a,0x7d,0x25,0xe2,0x6a,0x49,0x1d,0x9e,0x38,0x90,0x18, // 0000a180 |...m.:}%.jI..8..|
+0xce,0x56,0x5b,0x9d,0x00,0x80,0xff,0x23,0x47,0xd8,0x48,0x71,0xff,0x91,0x79,0xd4, // 0000a190 |.V[....#G.Hq..y.|
+0xa4,0x6e,0x0f,0x07,0x7e,0x1f,0x72,0xf0,0xf2,0xdb,0xac,0xa4,0xd0,0x8f,0x97,0x5b, // 0000a1a0 |.n..~.r........[|
+0x8e,0x99,0xb8,0x70,0xea,0x19,0xb0,0x84,0x30,0x70,0xb1,0xbd,0xc9,0x47,0x8e,0x9e, // 0000a1b0 |...p....0p...G..|
+0xce,0xe0,0x67,0xa7,0x67,0x3b,0x6e,0x3c,0x1b,0x25,0x7a,0x64,0x5b,0x8f,0x90,0x0c, // 0000a1c0 |..g.g;n<.%zd[...|
+0x3b,0xbb,0x7a,0x35,0xdc,0xc4,0x58,0x46,0xd7,0x32,0x46,0xb3,0x08,0x34,0x53,0xd4, // 0000a1d0 |;.z5..XF.2F..4S.|
+0xb5,0x58,0x62,0xca,0x0f,0x32,0x01,0xb9,0xff,0x3b,0x00,0x70,0x14,0x3d,0x88,0x52, // 0000a1e0 |.Xb..2...;.p.=.R|
+0xd5,0xe0,0x30,0xaf,0x08,0xa5,0x5c,0x32,0x8d,0x87,0x91,0x41,0x4f,0x7c,0x36,0x5d, // 0000a1f0 |..0...\2...AO|6]|
+0x56,0x8c,0x53,0xb6,0x19,0xb1,0x3d,0xc7,0xdc,0x94,0x92,0x64,0x5b,0xe7,0x5c,0xbc, // 0000a200 |V.S...=....d[.\.|
+0xbd,0x9d,0xc4,0x03,0x5d,0x96,0xf2,0x2c,0x68,0x22,0x71,0xda,0xda,0x4e,0x8a,0xc2, // 0000a210 |....]..,h"q..N..|
+0xb7,0xb7,0x3d,0x1a,0x2c,0x5f,0x82,0x1c,0xf2,0xb3,0x7a,0xe0,0x82,0x02,0x72,0x4f, // 0000a220 |..=.,_....z...rO|
+0x91,0x31,0x67,0xa6,0x49,0xa5,0x79,0xd7,0x59,0xb2,0xc5,0x33,0x33,0xdf,0x93,0xc8, // 0000a230 |.1g.I.y.Y..33...|
+0x4c,0xca,0x98,0x45,0xd6,0x85,0xa6,0xc4,0x41,0xe7,0xcf,0xe4,0xf1,0xd4,0x0c,0xc8, // 0000a240 |L..E....A.......|
+0x11,0xb4,0xb8,0xd9,0x2a,0x03,0xd0,0x9a,0x68,0xc1,0x68,0x8f,0xa2,0x8f,0xc4,0x25, // 0000a250 |....*...h.h....%|
+0x6e,0xaf,0xf9,0x21,0x18,0xb7,0x39,0xe9,0x39,0x65,0xe6,0x84,0x0b,0x89,0xbe,0xe1, // 0000a260 |n..!..9.9e......|
+0xc6,0xb3,0x27,0x4f,0x51,0x0d,0x8f,0x8f,0xc3,0xf8,0xaf,0xba,0x4f,0x94,0x74,0xcf, // 0000a270 |..'OQ.......O.t.|
+0x38,0x99,0xba,0x0a,0x47,0xe4,0x33,0x55,0xc1,0xe6,0x11,0x53,0xe0,0x13,0xd1,0xc3, // 0000a280 |8...G.3U...S....|
+0x02,0xa6,0xcd,0xad,0x7d,0xae,0xcf,0x5e,0x24,0x4b,0x78,0x84,0xb4,0x92,0x01,0xb5, // 0000a290 |....}..^$Kx.....|
+0xeb,0x78,0x08,0x83,0xfe,0xf6,0x1b,0xf1,0x49,0xdf,0x3a,0x9c,0xf1,0x72,0x74,0xb9, // 0000a2a0 |.x......I.:..rt.|
+0xb2,0x11,0x9c,0x45,0x12,0xe1,0x96,0x04,0x2b,0x2d,0xd6,0xf7,0xfc,0x3c,0xe0,0xbf, // 0000a2b0 |...E....+-...<..|
+0x31,0x16,0x0d,0xfb,0x04,0x24,0x2d,0xe9,0xb7,0x82,0x5d,0xb9,0x42,0x33,0x5c,0x44, // 0000a2c0 |1....$-...].B3\D|
+0x8e,0xe2,0xde,0x45,0x46,0xd5,0xca,0xbb,0x06,0x34,0xa0,0x8c,0x94,0x77,0xe3,0xe9, // 0000a2d0 |...EF....4...w..|
+0x45,0x25,0xd2,0x06,0xd4,0x0d,0x66,0x0c,0x51,0x88,0x08,0x17,0x8e,0xa7,0x69,0x05, // 0000a2e0 |E%....f.Q.....i.|
+0x32,0x5c,0xc3,0xa8,0x98,0x51,0xc2,0x3a,0xae,0xea,0xd7,0xa3,0xb4,0xed,0xec,0x63, // 0000a2f0 |2\...Q.:.......c|
+0x70,0xa6,0xba,0x4c,0x62,0x8b,0xf4,0xf4,0x93,0xb1,0xd1,0xd2,0x30,0x8d,0xba,0xb2, // 0000a300 |p..Lb.......0...|
+0x10,0x71,0x82,0x38,0x1c,0x26,0x00,0xd4,0xcc,0x1d,0xd2,0x58,0x9f,0x54,0x00,0x4b, // 0000a310 |.q.8.&.....X.T.K|
+0x1f,0xaa,0x83,0x84,0xeb,0x5b,0xc5,0x97,0x96,0x74,0xc0,0xcd,0xbd,0x39,0xd9,0x99, // 0000a320 |.....[...t...9..|
+0x98,0x64,0x99,0x6b,0x90,0xfa,0x77,0x54,0x49,0x26,0x86,0x11,0xd6,0xb3,0xa9,0x3d, // 0000a330 |.d.k..wTI&.....=|
+0xc8,0x1c,0x5f,0x02,0xd0,0x0f,0x6b,0xf8,0x11,0x33,0xe0,0x68,0x43,0x2c,0x54,0xeb, // 0000a340 |.._...k..3.hC,T.|
+0x0a,0x49,0x4d,0x2b,0x73,0x8c,0x2c,0xbe,0x3e,0xfa,0xf4,0x68,0xa3,0xab,0xa2,0x50, // 0000a350 |.IM+s.,.>..h...P|
+0xd7,0x5d,0x76,0x54,0x1a,0xd2,0xe7,0xbb,0xa8,0x18,0xa1,0x35,0x87,0xdd,0xab,0xbf, // 0000a360 |.]vT.......5....|
+0x06,0x68,0x58,0xb2,0x0e,0x66,0xeb,0x9b,0x42,0x7a,0xc1,0xac,0x5c,0xc1,0x17,0x7a, // 0000a370 |.hX..f..Bz..\..z|
+0x4a,0x08,0x50,0x46,0xdd,0x81,0x6d,0x77,0xb7,0x3f,0xb4,0x54,0xcb,0xc9,0xc4,0xd5, // 0000a380 |J.PF..mw.?.T....|
+0x5b,0x8e,0x3f,0x85,0xa9,0xf6,0x89,0xf2,0x2f,0xfe,0xe0,0xdb,0xdd,0xf9,0xda,0x74, // 0000a390 |[.?...../......t|
+0xb5,0x84,0x6a,0x95,0x41,0x8a,0xbf,0xba,0x40,0xbe,0x77,0x3c,0x9f,0x44,0xad,0x7e, // 0000a3a0 |..j.A...@.w<.D.~|
+0xd4,0x98,0xfe,0x19,0xda,0xd6,0x0e,0xb7,0x6d,0xcf,0x32,0xfa,0x48,0xbc,0x7b,0x79, // 0000a3b0 |........m.2.H.{y|
+0x2e,0x67,0x5b,0x1c,0x4f,0xf2,0xbd,0x77,0x27,0xad,0x42,0x88,0x35,0x55,0x6c,0xbf, // 0000a3c0 |.g[.O..w'.B.5Ul.|
+0xa3,0xb7,0x22,0x0a,0x13,0x2f,0x09,0x7d,0x59,0x40,0xef,0x36,0x3c,0x09,0x52,0xfb, // 0000a3d0 |.."../.}Y@.6<.R.|
+0xc3,0x3a,0x8c,0xa9,0x43,0x89,0x6c,0x14,0x83,0x71,0x7b,0xf6,0x17,0x8f,0x32,0x58, // 0000a3e0 |.:..C.l..q{...2X|
+0x10,0xc2,0x6a,0xc1,0xad,0xb1,0x63,0x96,0x2d,0x3e,0xbc,0x49,0x61,0xab,0xff,0x18, // 0000a3f0 |..j...c.->.Ia...|
+0x11,0xe6,0xd5,0xb2,0xe8,0xc5,0x81,0xa4,0xfc,0x5e,0xf3,0x3d,0x08,0x50,0x29,0x6e, // 0000a400 |.........^.=.P)n|
+0x73,0x9d,0x5d,0xb7,0x75,0x6a,0xf7,0xab,0xee,0x2a,0x69,0x72,0xf1,0x6e,0x10,0x25, // 0000a410 |s.].uj...*ir.n.%|
+0x63,0x7a,0xd2,0x19,0x66,0x6b,0x89,0x6c,0x8f,0x2d,0x3e,0xe3,0x60,0x7c,0x66,0xd6, // 0000a420 |cz..fk.l.->.`|f.|
+0x4a,0x66,0x96,0x44,0x2e,0xe6,0xa8,0x8a,0xfc,0x87,0xa5,0xfb,0x17,0xae,0xd4,0x06, // 0000a430 |Jf.D............|
+0xce,0x07,0xad,0xab,0xcf,0x3e,0x08,0x8a,0xcc,0xe5,0x46,0x0f,0x43,0x90,0xe9,0xc0, // 0000a440 |.....>....F.C...|
+0x7f,0x10,0xb6,0xfc,0x5b,0x97,0x0a,0x89,0x8d,0x1c,0x81,0x8d,0xde,0xf9,0x8e,0x17, // 0000a450 |....[...........|
+0xa1,0x36,0xa9,0x71,0xf6,0xfa,0xe1,0x7b,0x9e,0xd0,0xa4,0x81,0x3b,0xf7,0x5b,0xeb, // 0000a460 |.6.q...{....;.[.|
+0xb8,0x77,0xea,0x10,0x4c,0x80,0x33,0x40,0xeb,0x5f,0x36,0x21,0x24,0x21,0x08,0x61, // 0000a470 |.w..L.3@._6!$!.a|
+0x1b,0xa4,0x7d,0xbe,0x2e,0x55,0xb6,0xc0,0x82,0x9c,0x2e,0x34,0xa1,0xf0,0xc2,0x01, // 0000a480 |..}..U.....4....|
+0x0d,0x22,0xce,0xc0,0x8b,0xec,0xe8,0x79,0xe6,0x72,0xcf,0xcb,0x97,0xa1,0x9e,0xbd, // 0000a490 |.".....y.r......|
+0x61,0xb3,0x8f,0x68,0x96,0x6a,0x87,0xe5,0x74,0x83,0x96,0xc7,0xc6,0x43,0x51,0x9d, // 0000a4a0 |a..h.j..t....CQ.|
+0xd4,0xd3,0xec,0xb4,0x72,0xfc,0x94,0x48,0x94,0xbc,0x1b,0xb6,0x55,0x11,0x66,0xa4, // 0000a4b0 |....r..H....U.f.|
+0x80,0x17,0x3d,0xd6,0xe2,0x29,0x0b,0x7a,0xbc,0x50,0xa3,0xbf,0xc9,0xe8,0x22,0x06, // 0000a4c0 |..=..).z.P....".|
+0xfa,0x18,0xfe,0x17,0x2e,0xba,0x64,0x9b,0xe4,0x5b,0xcd,0xdd,0x9c,0x5e,0x2a,0xcb, // 0000a4d0 |......d..[...^*.|
+0x16,0x6d,0xb9,0x92,0x0d,0x35,0x3f,0x46,0x8d,0x92,0x64,0xec,0xfb,0x32,0x22,0x02, // 0000a4e0 |.m...5?F..d..2".|
+0xb2,0x9b,0x2f,0x99,0x43,0x96,0xe2,0x65,0xae,0xcf,0xe9,0xd9,0x90,0x28,0xf3,0x76, // 0000a4f0 |../.C..e.....(.v|
+0x11,0x28,0xaa,0x07,0x52,0x0b,0x64,0xac,0x03,0xf5,0x67,0xa9,0x9a,0xf4,0xed,0x59, // 0000a500 |.(..R.d...g....Y|
+0x4d,0x3a,0x25,0x7f,0xa2,0x85,0x4e,0xc3,0x0c,0x85,0xf5,0x25,0x19,0xf4,0x0f,0x72, // 0000a510 |M:%...N....%...r|
+0xf5,0x71,0x51,0xe7,0xe3,0xd7,0xbf,0xc8,0xf8,0x3c,0xed,0x5b,0x36,0x50,0x3b,0x21, // 0000a520 |.qQ......<.[6P;!|
+0x5d,0x10,0x9e,0xa6,0x17,0x46,0x5a,0x6b,0xbb,0x9a,0xcb,0x8d,0x82,0xf4,0xaa,0x96, // 0000a530 |]....FZk........|
+0x1f,0x14,0x93,0x40,0xd9,0x98,0x69,0xbc,0xaf,0xb7,0x7c,0xb6,0x62,0x19,0x9f,0x33, // 0000a540 |...@..i...|.b..3|
+0xcc,0x39,0xbc,0xc9,0xbd,0xae,0xfa,0x43,0xd4,0x47,0x35,0x28,0x07,0x49,0x89,0x1d, // 0000a550 |.9.....C.G5(.I..|
+0x47,0x6c,0xf5,0x2b,0xc3,0xbb,0x9b,0xb4,0xb5,0x4d,0x3f,0x89,0x77,0x5b,0x85,0xfc, // 0000a560 |Gl.+.....M?.w[..|
+0xb0,0x81,0xc5,0x88,0x28,0x97,0x78,0x98,0xb2,0x48,0x03,0x11,0xa5,0x66,0x48,0xed, // 0000a570 |....(.x..H...fH.|
+0xd9,0x5c,0x2b,0x51,0x60,0xe8,0x1b,0x58,0x19,0x63,0x7f,0xdb,0xfd,0xa7,0x88,0x26, // 0000a580 |.\+Q`..X.c.....&|
+0x73,0x8b,0xb2,0x32,0x60,0x3c,0xe1,0x6c,0xa2,0x19,0xfe,0x6b,0x92,0xcf,0xf2,0x0e, // 0000a590 |s..2`<.l...k....|
+0xf0,0xe3,0x78,0xf6,0x9c,0x28,0x0c,0xe9,0x7f,0x21,0x5c,0x65,0x78,0xfc,0x9f,0xba, // 0000a5a0 |..x..(...!\ex...|
+0xfe,0xe3,0xc1,0x28,0xf1,0x5f,0xde,0xd3,0x6e,0x98,0xaf,0xbf,0xa2,0xfc,0x3e,0x2d, // 0000a5b0 |...(._..n.....>-|
+0x15,0xb1,0x61,0x67,0xc8,0x2f,0x6a,0xbc,0x0c,0x03,0xe3,0xad,0x37,0x92,0x72,0x5f, // 0000a5c0 |..ag./j.....7.r_|
+0xf4,0x6a,0x17,0x97,0x5f,0x6c,0x6b,0x78,0x48,0xc1,0xda,0x0b,0xee,0xcf,0x51,0xec, // 0000a5d0 |.j.._lkxH.....Q.|
+0x5e,0xc5,0xeb,0x5e,0xe0,0x1b,0x2e,0x26,0xe2,0x1a,0xfb,0x75,0x8d,0xe7,0x39,0xb9, // 0000a5e0 |^..^...&...u..9.|
+0x7d,0x1c,0xab,0xe5,0x4f,0xf7,0xcc,0x58,0x09,0xea,0x83,0xc6,0x83,0x7f,0xb6,0x72, // 0000a5f0 |}...O..X.......r|
+0xa4,0x7b,0x25,0xe0,0xc2,0x59,0xf1,0x43,0x3f,0xf5,0xfe,0x0c,0xeb,0x61,0xff,0x5d, // 0000a600 |.{%..Y.C?....a.]|
+0x06,0x69,0x45,0x3a,0x42,0x0c,0x90,0xde,0xc0,0x78,0xb2,0xff,0x6c,0x6c,0x93,0x2e, // 0000a610 |.iE:B....x..ll..|
+0x65,0x0f,0xfe,0xb6,0x6f,0x5a,0xeb,0xff,0x53,0x53,0x30,0x9d,0x8e,0xd6,0x9a,0x72, // 0000a620 |e...oZ..SS0....r|
+0xca,0x49,0xe3,0x57,0x51,0xed,0x81,0x4e,0x0f,0x63,0x43,0x89,0x94,0x7d,0x73,0xd9, // 0000a630 |.I.WQ..N.cC..}s.|
+0xf1,0xec,0xa2,0xbc,0x8a,0x05,0x1a,0x20,0x7c,0x4b,0x86,0x18,0x89,0x09,0x40,0xbe, // 0000a640 |....... |K....@.|
+0x64,0x46,0x19,0xfa,0xcb,0x55,0xf2,0x63,0xf1,0x94,0x02,0xa9,0xc6,0xb7,0xea,0x89, // 0000a650 |dF...U.c........|
+0x61,0xcb,0x2c,0x94,0x81,0xf9,0xa7,0x15,0xe8,0xc3,0xe0,0xc0,0x90,0x8f,0x83,0xdc, // 0000a660 |a.,.............|
+0x07,0x8f,0xf7,0x37,0xa3,0x19,0x97,0x82,0xda,0x48,0x5e,0xbc,0xea,0x2d,0x3c,0xe7, // 0000a670 |...7.....H^..-<.|
+0x05,0xe9,0xc6,0x06,0x97,0x38,0x3b,0x29,0xb7,0x1b,0x53,0x25,0x57,0x20,0x65,0x65, // 0000a680 |.....8;)..S%W ee|
+0x78,0x4d,0xa9,0xa2,0xfe,0x79,0xfa,0xb0,0x6e,0xea,0x22,0xe7,0x87,0x02,0x93,0xbf, // 0000a690 |xM...y..n.".....|
+0x26,0x67,0x7e,0x0e,0x60,0x8f,0x1a,0x0b,0x96,0x9f,0xac,0x83,0x67,0xe6,0x79,0x96, // 0000a6a0 |&g~.`.......g.y.|
+0x2a,0x45,0x77,0x01,0x5d,0x44,0xce,0x82,0x2d,0x0d,0x05,0x4d,0x36,0x62,0xbb,0xf2, // 0000a6b0 |*Ew.]D..-..M6b..|
+0x39,0x4f,0x18,0x02,0xa7,0x2e,0x1b,0xe8,0x98,0x59,0x7a,0xe3,0xa7,0xcf,0x70,0x79, // 0000a6c0 |9O.......Yz...py|
+0xdd,0x13,0xa7,0xc0,0x92,0x67,0x01,0xaa,0xfb,0x15,0x61,0xec,0x7b,0x9f,0x5d,0x70, // 0000a6d0 |.....g....a.{.]p|
+0xfd,0x6f,0x8d,0x0b,0xe6,0xad,0x20,0xeb,0x71,0x21,0x88,0x8f,0xb5,0x0f,0x26,0x3d, // 0000a6e0 |.o.... .q!....&=|
+0xcb,0x1d,0x77,0x7a,0xc1,0x9f,0x7a,0x1d,0xdb,0x58,0xc8,0x84,0x8f,0xab,0x6c,0x4e, // 0000a6f0 |..wz..z..X....lN|
+0x3a,0x7c,0x24,0x1b,0x59,0xd0,0xf0,0x41,0x4d,0x4b,0x13,0xd5,0xe4,0x81,0x32,0x1e, // 0000a700 |:|$.Y..AMK....2.|
+0xb3,0x9a,0xa6,0x23,0xdd,0x03,0x15,0x4f,0x5c,0x3d,0x1f,0x1b,0x85,0x1f,0xba,0x33, // 0000a710 |...#...O\=.....3|
+0xeb,0x38,0xb2,0x98,0xf3,0xea,0x9b,0xa9,0x78,0x67,0x81,0x60,0x1e,0x54,0x22,0xbb, // 0000a720 |.8......xg.`.T".|
+0xfd,0x4c,0x0f,0xfe,0x9e,0x7a,0xb8,0x46,0xe8,0x69,0x4a,0xbd,0xe3,0x8f,0x7d,0x27, // 0000a730 |.L...z.F.iJ...}'|
+0xfd,0x0c,0xb8,0x63,0x6f,0x78,0x5c,0xb0,0xbf,0x86,0x4f,0x92,0xb2,0x3f,0xba,0x5f, // 0000a740 |...cox\...O..?._|
+0x27,0xdd,0xed,0xb3,0xc5,0x63,0x86,0x18,0x37,0x64,0x43,0xc1,0x49,0x4c,0x2f,0xbd, // 0000a750 |'....c..7dC.IL/.|
+0x45,0x26,0x7a,0x10,0xf0,0xad,0x84,0x85,0x1a,0x20,0x34,0x36,0x92,0x4c,0x09,0x60, // 0000a760 |E&z...... 46.L.`|
+0xa7,0x3b,0xcf,0x3d,0x59,0x38,0xc8,0x50,0x0b,0xae,0xd0,0xb2,0x8f,0x81,0x57,0xd7, // 0000a770 |.;.=Y8.P......W.|
+0xa1,0x70,0x67,0xd8,0xb0,0xcd,0xef,0xb1,0x3e,0x2c,0xcd,0x80,0x98,0x3d,0x09,0x4b, // 0000a780 |.pg.....>,...=.K|
+0xf0,0xf2,0xb8,0x12,0x06,0xca,0x46,0x4c,0x7c,0x89,0xae,0xa5,0x7e,0x23,0x73,0x0f, // 0000a790 |......FL|...~#s.|
+0x82,0xbf,0x3c,0x4d,0xb9,0x78,0x0c,0xda,0x07,0x86,0x03,0x51,0xd5,0x5c,0x2a,0xca, // 0000a7a0 |..<M.x.....Q.\*.|
+0xad,0x91,0x0a,0xd5,0x9a,0x98,0x87,0x64,0x75,0x2d,0xa3,0x8e,0x49,0xde,0x5a,0x48, // 0000a7b0 |.......du-..I.ZH|
+0x53,0xdc,0xde,0x7a,0xc5,0xc4,0xd2,0xcc,0xfa,0x42,0xe3,0xc1,0x30,0xbb,0xf2,0x03, // 0000a7c0 |S..z.....B..0...|
+0x47,0x4b,0x29,0x24,0xc7,0x9b,0x66,0x82,0xf8,0xc7,0x76,0xce,0x83,0xa6,0x06,0x30, // 0000a7d0 |GK)$..f...v....0|
+0x85,0xb6,0x9b,0xc4,0x3d,0x8b,0xd0,0x15,0x78,0xc2,0x30,0xfd,0xbc,0xd9,0xee,0xa4, // 0000a7e0 |....=...x.0.....|
+0x32,0x41,0x68,0xeb,0xd1,0xc6,0x67,0x4d,0x0b,0x49,0x20,0x2e,0x70,0x74,0x1f,0x61, // 0000a7f0 |2Ah...gM.I .pt.a|
+0x60,0x48,0xc9,0x08,0x96,0x75,0xee,0xfa,0xea,0x6c,0xb6,0x55,0x1f,0x92,0x8c,0xa1, // 0000a800 |`H...u...l.U....|
+0x7c,0xbe,0xeb,0x07,0x63,0x21,0x7c,0x50,0x6d,0xe4,0x62,0x03,0x57,0xac,0xd6,0x91, // 0000a810 ||...c!|Pm.b.W...|
+0x35,0x3d,0x8d,0xe1,0x8e,0xb7,0xaa,0xce,0x9e,0xbd,0xc0,0x7c,0x77,0xff,0x5f,0x84, // 0000a820 |5=.........|w._.|
+0xa2,0xbd,0x05,0xf4,0xae,0x90,0x80,0xdf,0xb7,0x54,0x6e,0x82,0xfe,0x2b,0x89,0x24, // 0000a830 |.........Tn..+.$|
+0x39,0x02,0x78,0x7a,0x19,0x89,0x44,0x5b,0x46,0x70,0xb2,0x15,0xf4,0x9f,0xb4,0x53, // 0000a840 |9.xz..D[Fp.....S|
+0xd8,0x1d,0x58,0xdb,0x25,0x75,0x4c,0xa6,0xf7,0xe0,0xcc,0xf8,0x27,0xb2,0x8b,0x93, // 0000a850 |..X.%uL.....'...|
+0x58,0xf7,0x4f,0xf6,0x6f,0x08,0x2c,0x06,0x6a,0x44,0xca,0x8e,0x92,0xd1,0x29,0x62, // 0000a860 |X.O.o.,.jD....)b|
+0xe0,0xe4,0x4d,0x28,0xd7,0x90,0x2e,0x07,0xec,0xb6,0x33,0x73,0x42,0x57,0x20,0x29, // 0000a870 |..M(......3sBW )|
+0x1c,0xa4,0x56,0x95,0x03,0xa0,0xa2,0x98,0x0c,0x8e,0x35,0x3d,0xc9,0x18,0xb9,0x16, // 0000a880 |..V.......5=....|
+0x2d,0x33,0x0e,0xce,0x5b,0x88,0x08,0x99,0xd1,0xc1,0x8a,0xfc,0xef,0x6a,0x02,0x54, // 0000a890 |-3..[........j.T|
+0x6e,0x09,0x4d,0x59,0xa1,0x7f,0x5f,0xbf,0x06,0xc4,0x57,0xb9,0x58,0xbf,0x83,0x10, // 0000a8a0 |n.MY.._...W.X...|
+0x82,0xe5,0x9a,0x11,0x95,0x1c,0x18,0x75,0x7b,0xdf,0x31,0xf1,0x0c,0x15,0xcb,0x38, // 0000a8b0 |.......u{.1....8|
+0x4a,0x1f,0xb8,0x89,0xad,0x3c,0xd2,0x6a,0x2b,0x2e,0x62,0xe3,0xad,0x06,0xa5,0xed, // 0000a8c0 |J....<.j+.b.....|
+0x94,0xe9,0x8c,0x53,0xab,0xa5,0xb0,0x81,0x67,0x01,0xb0,0x9a,0x32,0x51,0x24,0x7c, // 0000a8d0 |...S....g...2Q$||
+0x56,0x70,0x28,0xa0,0x16,0xad,0x79,0x9e,0x29,0xb5,0x00,0x9f,0xc0,0xb9,0xf9,0x9c, // 0000a8e0 |Vp(...y.).......|
+0x6b,0x11,0x01,0xcc,0xd8,0x8d,0x58,0xfe,0x7c,0xa6,0x3e,0x00,0xa2,0x5e,0x26,0x40, // 0000a8f0 |k.....X.|.>..^&@|
+0x01,0xaf,0x68,0x5c,0x03,0x6e,0xeb,0x11,0x87,0x36,0x55,0x36,0xf9,0x59,0x80,0x62, // 0000a900 |..h\.n...6U6.Y.b|
+0x9b,0x2c,0x04,0x3e,0x97,0x58,0x04,0x87,0x0b,0x4d,0x5f,0x95,0x26,0x79,0xe8,0xd3, // 0000a910 |.,.>.X...M_.&y..|
+0xd8,0x8a,0x1e,0x24,0x2f,0x44,0x54,0x64,0x30,0x96,0x8f,0x5a,0xd6,0x7f,0x56,0x84, // 0000a920 |...$/DTd0..Z..V.|
+0xfe,0x57,0x0a,0x08,0xb6,0x57,0x00,0x2f,0x6c,0xce,0x70,0x95,0xb5,0x7a,0x73,0x61, // 0000a930 |.W...W./l.p..zsa|
+0xa3,0x6d,0x11,0xea,0x4b,0xea,0xce,0xd2,0x58,0x4e,0x7a,0x3a,0xbf,0xb1,0x81,0xf4, // 0000a940 |.m..K...XNz:....|
+0x3e,0x70,0x24,0x6c,0x83,0x45,0x82,0xfe,0x2a,0x4b,0x9d,0x4d,0x18,0xee,0x3e,0x69, // 0000a950 |>p$l.E..*K.M..>i|
+0xc6,0x43,0x36,0x96,0xa2,0x94,0x89,0x61,0x53,0x5d,0x30,0xf3,0xbb,0x90,0x0a,0xf2, // 0000a960 |.C6....aS]0.....|
+0x27,0xeb,0x28,0xbb,0xab,0x83,0xd2,0xb9,0x3f,0x16,0x07,0xf5,0x20,0x3a,0xb2,0xaf, // 0000a970 |'.(.....?... :..|
+0x0d,0xdb,0x8b,0x02,0x98,0x86,0x08,0xd3,0x1c,0xb7,0x34,0x39,0xa1,0xcb,0xc2,0x3a, // 0000a980 |..........49...:|
+0x4d,0xf8,0xd7,0xa8,0xc4,0x58,0x73,0x87,0x3b,0x91,0x03,0x6f,0x74,0x65,0xf4,0xb1, // 0000a990 |M....Xs.;..ote..|
+0x2a,0x1a,0x8b,0x76,0xd0,0xb1,0x58,0x52,0xfe,0x31,0x52,0x41,0x3f,0xad,0x1c,0x3b, // 0000a9a0 |*..v..XR.1RA?..;|
+0x93,0xfd,0x52,0x69,0xc5,0xa9,0xa5,0x01,0x53,0xdf,0xa6,0x91,0xf4,0x78,0xc3,0xde, // 0000a9b0 |..Ri....S....x..|
+0x68,0x29,0xc2,0x12,0xef,0xf3,0x22,0xe2,0xad,0x3c,0xfe,0xcd,0x1b,0xd2,0x18,0x39, // 0000a9c0 |h)...."..<.....9|
+0xf7,0x0b,0x68,0x33,0xef,0x8e,0x83,0x23,0x16,0x9b,0x2e,0xe4,0x14,0xd1,0xe2,0xb5, // 0000a9d0 |..h3...#........|
+0x75,0x44,0x11,0x57,0x75,0x7b,0x79,0x30,0x3b,0x14,0x2e,0x1e,0xd4,0x73,0x62,0xda, // 0000a9e0 |uD.Wu{y0;....sb.|
+0x67,0xfe,0xb8,0xc9,0x57,0x29,0x88,0x99,0xd6,0x51,0x4c,0xfd,0x19,0xed,0x3e,0x4c, // 0000a9f0 |g...W)...QL...>L|
+0xb0,0xf2,0x1b,0x7b,0x35,0x82,0x9f,0x58,0xc5,0xb2,0xf9,0xd5,0x84,0xb8,0xc9,0x02, // 0000aa00 |...{5..X........|
+0x45,0xd6,0xf2,0x06,0x96,0x35,0xf2,0x59,0x17,0xc6,0xff,0xff,0xfc,0x8d,0xa0,0x5a, // 0000aa10 |E....5.Y.......Z|
+0xc6,0xbf,0x84,0x66,0xda,0x75,0xed,0xb6,0x9b,0x7c,0x98,0x40,0xac,0x2e,0xfc,0xd8, // 0000aa20 |...f.u...|.@....|
+0xb0,0x2d,0xfe,0x32,0xd9,0x33,0xb9,0x74,0x9e,0x27,0x7d,0x58,0xf6,0xcc,0xc3,0xbb, // 0000aa30 |.-.2.3.t.'}X....|
+0xa6,0x20,0xb9,0xf4,0x82,0xc5,0x5b,0x2d,0x1b,0xe2,0xc8,0x4b,0x4f,0x69,0x83,0x68, // 0000aa40 |. ....[-...KOi.h|
+0xd2,0x12,0x15,0x40,0x46,0x13,0x35,0x9e,0x0c,0xcd,0xe8,0xc5,0xbb,0x97,0xdb,0xdc, // 0000aa50 |...@F.5.........|
+0x36,0xc7,0x8c,0x24,0x89,0x0d,0xa5,0xfb,0x34,0x24,0xb4,0xfd,0x7b,0xd4,0xf5,0x1c, // 0000aa60 |6..$....4$..{...|
+0x2b,0x31,0x53,0xa3,0x5e,0x37,0x87,0x06,0xb8,0xcb,0x54,0x0f,0x92,0xd4,0x89,0xbf, // 0000aa70 |+1S.^7....T.....|
+0x41,0x3a,0xfa,0x66,0xbe,0xcd,0xd4,0x56,0x56,0x4c,0xc1,0x21,0x18,0xbb,0xd5,0x6d, // 0000aa80 |A:.f...VVL.!...m|
+0xa1,0xa2,0xf8,0x2d,0x6f,0x71,0xfd,0xf0,0x9a,0xdd,0x71,0xaf,0x4b,0x71,0xf3,0x5d, // 0000aa90 |...-oq....q.Kq.]|
+0xc0,0xa4,0x49,0x1f,0x3e,0x81,0xf0,0x99,0x09,0xa3,0x95,0x7e,0x77,0x88,0x86,0x49, // 0000aaa0 |..I.>......~w..I|
+0x10,0x67,0x58,0xe4,0x23,0x54,0xf2,0xfe,0x48,0x79,0x5b,0xc5,0xbd,0x7a,0x5f,0xab, // 0000aab0 |.gX.#T..Hy[..z_.|
+0x9c,0x40,0xf1,0x9e,0x9a,0x74,0x2f,0x3e,0xec,0x6b,0x76,0x5f,0x84,0x6c,0x64,0x24, // 0000aac0 |.@...t/>.kv_.ld$|
+0xfe,0x05,0x01,0x4a,0xc7,0xd9,0x5e,0xcf,0xd2,0x6b,0xa1,0x3b,0x83,0xa9,0x07,0x22, // 0000aad0 |...J..^..k.;..."|
+0x43,0xc1,0xbc,0xe5,0xfd,0x63,0x33,0x1c,0xf6,0x1e,0xa4,0x1a,0xa9,0xee,0x70,0xb9, // 0000aae0 |C....c3.......p.|
+0xdc,0x71,0xf3,0xad,0xaf,0x28,0x2b,0x2a,0x6e,0x7a,0x25,0x50,0x6d,0x7c,0xe4,0x41, // 0000aaf0 |.q...(+*nz%Pm|.A|
+0xcf,0x72,0x87,0xe0,0x6b,0xe9,0xfe,0x00,0x80,0x75,0x5c,0x46,0x9f,0x9a,0x14,0x9c, // 0000ab00 |.r..k....u\F....|
+0xf7,0x3c,0x18,0x2e,0x70,0xe4,0xa1,0x20,0x71,0x4c,0x76,0x8f,0xfc,0x26,0x38,0xd9, // 0000ab10 |.<..p.. qLv..&8.|
+0x12,0x94,0x17,0xb3,0xd7,0xb4,0xe8,0xe4,0x0e,0x6e,0x35,0x75,0xa0,0x2a,0x2a,0xcf, // 0000ab20 |.........n5u.**.|
+0x0a,0x09,0xda,0x24,0xe9,0x6e,0x6a,0x0f,0x1c,0xd3,0x52,0x06,0xa9,0xf3,0x8a,0xd4, // 0000ab30 |...$.nj...R.....|
+0xe5,0x0c,0x85,0x89,0x0e,0xa9,0x5f,0x46,0x4a,0x93,0xa7,0x4d,0xa0,0xfc,0xd5,0x4a, // 0000ab40 |......_FJ..M...J|
+0xa5,0xc5,0xb7,0x41,0xb9,0x04,0x10,0x4d,0x6d,0x98,0xbf,0x5c,0x31,0x60,0x3e,0x2d, // 0000ab50 |...A...Mm..\1`>-|
+0x79,0xa3,0x23,0xa8,0xf6,0xb3,0x8d,0x21,0xe4,0x7f,0xfa,0x7b,0xf7,0x63,0x34,0x20, // 0000ab60 |y.#....!...{.c4 |
+0x5e,0x1a,0xa6,0x70,0x43,0xa7,0x09,0x8b,0xbe,0x95,0x71,0x25,0x3f,0x96,0x1b,0x2b, // 0000ab70 |^..pC.....q%?..+|
+0xbc,0x4b,0x76,0xce,0xa8,0x3d,0x1c,0x15,0xd8,0x4c,0xab,0x4a,0xe6,0x56,0x14,0x75, // 0000ab80 |.Kv..=...L.J.V.u|
+0xe4,0x82,0xdd,0x0b,0xbf,0xbe,0xb3,0x25,0xfc,0xdd,0x96,0xfa,0x1d,0xf7,0xff,0xf9, // 0000ab90 |.......%........|
+0x3d,0x06,0x46,0xa0,0xbf,0x8e,0x81,0xdb,0x4d,0x95,0xcd,0xcf,0xe1,0xf9,0x30,0xeb, // 0000aba0 |=.F.....M.....0.|
+0x1a,0x39,0x1a,0x92,0xfc,0xc3,0xd8,0xb5,0x57,0xc0,0x72,0x5f,0x65,0xa1,0x72,0xbe, // 0000abb0 |.9......W.r_e.r.|
+0x1c,0x02,0x34,0x0a,0xdf,0x21,0x8e,0x7b,0x23,0x51,0x98,0xeb,0xdd,0xdb,0x84,0xf1, // 0000abc0 |..4..!.{#Q......|
+0x64,0xa8,0xcc,0xc7,0xc6,0xae,0x0d,0x76,0x03,0x9e,0xff,0xff,0x1e,0xa8,0x61,0xf8, // 0000abd0 |d......v......a.|
+0x7e,0xf0,0x01,0x58,0x37,0x71,0x44,0xaf,0x23,0xd0,0x72,0xba,0xef,0x95,0x1e,0x8a, // 0000abe0 |~..X7qD.#.r.....|
+0x28,0x84,0x92,0xe9,0x88,0x3a,0xc0,0x8e,0xdf,0xab,0xa7,0x66,0xe5,0x00,0xe0,0xd3, // 0000abf0 |(....:.....f....|
+0x98,0x1f,0xe3,0x3b,0x11,0xe2,0xf7,0x42,0x54,0x41,0xbf,0x0a,0x99,0x9c,0x22,0x92, // 0000ac00 |...;...BTA....".|
+0x16,0x1a,0x80,0xb1,0x2a,0x22,0xd5,0xa3,0x5d,0x56,0x7e,0x8d,0xd8,0x88,0x61,0x02, // 0000ac10 |....*"..]V~...a.|
+0x19,0xa7,0x1c,0x26,0x22,0xaa,0xb4,0x76,0xde,0x89,0x37,0xb6,0x48,0xef,0x70,0x7c, // 0000ac20 |...&"..v..7.H.p||
+0x73,0x74,0x64,0x3f,0x08,0x14,0xc2,0xbe,0xc4,0x75,0xbc,0x83,0x41,0x49,0x09,0x1d, // 0000ac30 |std?.....u..AI..|
+0x28,0x6e,0xc1,0x8c,0xa2,0x31,0x86,0x19,0xa9,0x23,0x34,0xa8,0xaa,0xca,0xdd,0xb4, // 0000ac40 |(n...1...#4.....|
+0x3d,0x93,0xaa,0x94,0x84,0x19,0xec,0xec,0x54,0xe7,0xe4,0x9f,0x1d,0x59,0x40,0xe2, // 0000ac50 |=.......T....Y@.|
+0xa7,0x0b,0x4b,0x00,0xfb,0xc9,0xab,0xcb,0x0e,0xaa,0x26,0xaa,0x41,0x8b,0xd6,0xe8, // 0000ac60 |..K.......&.A...|
+0x24,0xce,0x3f,0xee,0x30,0x43,0xeb,0x48,0x7b,0x94,0xce,0x5c,0xde,0x33,0xd6,0x87, // 0000ac70 |$.?.0C.H{..\.3..|
+0xe4,0xb1,0xef,0x0e,0x72,0xf2,0x40,0x4d,0x3d,0x18,0xae,0xe0,0x94,0x99,0x3d,0x04, // 0000ac80 |....r.@M=.....=.|
+0x90,0x0a,0x93,0xb7,0x77,0xed,0xc9,0x3a,0x09,0xa6,0x55,0xfc,0xb6,0xac,0x33,0xbb, // 0000ac90 |....w..:..U...3.|
+0x92,0x87,0x3b,0xd0,0x46,0xd2,0x9c,0x8c,0x37,0x16,0x0c,0x07,0x25,0xfd,0x9a,0x9a, // 0000aca0 |..;.F...7...%...|
+0xac,0xf1,0xb9,0xff,0xb2,0x28,0xd7,0x7a,0xb4,0x51,0x65,0xb0,0x56,0x04,0x8e,0x71, // 0000acb0 |.....(.z.Qe.V..q|
+0x0e,0x59,0x3c,0xf7,0x9a,0x2b,0x51,0x74,0x0e,0x44,0x9c,0xe3,0xc5,0x5c,0x61,0x7e, // 0000acc0 |.Y<..+Qt.D...\a~|
+0x4b,0xda,0xe1,0xbb,0xc4,0x92,0xef,0xb7,0x9b,0x67,0xfa,0x87,0xf7,0xfb,0x42,0x0f, // 0000acd0 |K........g....B.|
+0x17,0xa7,0x49,0x06,0x77,0x6c,0x7a,0x97,0x0e,0xb9,0x47,0x9f,0x05,0x9b,0x50,0xf9, // 0000ace0 |..I.wlz...G...P.|
+0x1e,0x36,0x26,0x9d,0xcc,0x19,0x05,0x33,0x0f,0x1d,0x77,0xd1,0x67,0x27,0xb7,0x6e, // 0000acf0 |.6&....3..w.g'.n|
+0x78,0x77,0xba,0xe9,0x31,0x4d,0xfd,0x08,0xee,0xc3,0xd1,0x35,0x38,0xfb,0xd0,0xa1, // 0000ad00 |xw..1M.....58...|
+0xef,0xe4,0x03,0x3f,0xa8,0xca,0x72,0xe3,0xa9,0xbe,0x99,0x11,0x8e,0xa4,0x48,0xfb, // 0000ad10 |...?..r.......H.|
+0x18,0x90,0x25,0x7d,0xcc,0x95,0xd1,0x94,0x14,0xbb,0x7e,0xbe,0x9b,0x8a,0x46,0xec, // 0000ad20 |..%}......~...F.|
+0xeb,0x06,0xce,0x06,0x52,0xd5,0x97,0xbe,0xcc,0x79,0xb9,0xb4,0x04,0xcd,0x5d,0x5c, // 0000ad30 |....R....y....]\|
+0xac,0x34,0xb2,0x0b,0xf7,0x6c,0xfc,0x98,0x88,0xb7,0x44,0x96,0xb0,0xb0,0x62,0xca, // 0000ad40 |.4...l....D...b.|
+0xe3,0x8c,0x41,0x94,0x59,0x5a,0xa4,0x5b,0xe4,0x67,0xdc,0xd5,0xc2,0x36,0xcd,0x23, // 0000ad50 |..A.YZ.[.g...6.#|
+0x8f,0x4a,0x0f,0xfc,0x10,0x53,0x1a,0x4f,0xc7,0x3e,0xfe,0xfc,0xfb,0x13,0xfc,0x71, // 0000ad60 |.J...S.O.>.....q|
+0x27,0x58,0x29,0xd7,0x2c,0x1c,0x65,0x8c,0x8f,0x71,0x34,0x8b,0x59,0x73,0xa7,0xc9, // 0000ad70 |'X).,.e..q4.Ys..|
+0xe2,0x5b,0xbe,0xba,0xb8,0xa3,0x64,0xd2,0x4c,0x16,0xa7,0xf1,0xeb,0x4e,0x82,0x26, // 0000ad80 |.[....d.L....N.&|
+0x68,0x46,0xaf,0x6c,0xee,0x55,0xc1,0xe6,0xb9,0x44,0x03,0x02,0x2d,0x81,0x1d,0xc2, // 0000ad90 |hF.l.U...D..-...|
+0xc6,0xfa,0x88,0x78,0x46,0xaf,0x8b,0xd8,0x81,0x52,0x44,0x00,0x88,0xf5,0x39,0x61, // 0000ada0 |...xF....RD...9a|
+0x76,0x4a,0xd6,0x49,0xbc,0x0f,0x9f,0xc3,0x31,0x1a,0x12,0xba,0xd5,0x90,0xfa,0xe4, // 0000adb0 |vJ.I....1.......|
+0xc2,0xf6,0x8a,0x36,0x15,0xde,0x1b,0x18,0x67,0x44,0x0a,0x78,0x35,0xf6,0x5e,0x89, // 0000adc0 |...6....gD.x5.^.|
+0x09,0xb0,0x91,0x5c,0x72,0x29,0x49,0x78,0x30,0x22,0x4a,0xf4,0x73,0x19,0x0b,0xf1, // 0000add0 |...\r)Ix0"J.s...|
+0x61,0x56,0x14,0x07,0xb2,0x0c,0xf4,0x13,0x1b,0x25,0xf1,0xce,0xad,0xc2,0x83,0xf8, // 0000ade0 |aV.......%......|
+0xfb,0x3c,0x3b,0xa5,0x51,0xa2,0xd8,0x36,0xf5,0xe7,0x42,0x05,0x2c,0x7b,0x3c,0x6a, // 0000adf0 |.<;.Q..6..B.,{<j|
+0xa6,0x42,0x01,0x99,0xf2,0xd4,0xe7,0x61,0x5c,0xbc,0x0d,0x68,0x2d,0x0f,0x3e,0xd0, // 0000ae00 |.B.....a\..h-.>.|
+0x0a,0xa8,0x0a,0x2a,0xe7,0x80,0x15,0x7f,0x08,0xd4,0x4d,0x43,0xce,0xef,0x63,0x86, // 0000ae10 |...*......MC..c.|
+0x83,0xb3,0x9a,0xda,0x0a,0xe7,0x78,0x49,0x5b,0xa4,0xd8,0x92,0x2b,0x49,0xb8,0x0f, // 0000ae20 |......xI[...+I..|
+0x35,0x13,0x52,0xd6,0x0f,0x84,0x0b,0x1f,0xd2,0x99,0x20,0x2e,0x86,0x53,0x41,0x4a, // 0000ae30 |5.R....... ..SAJ|
+0xa5,0x86,0x4d,0x01,0x93,0x99,0xdf,0xd0,0x44,0x85,0x26,0xa3,0x31,0x78,0xf5,0xf4, // 0000ae40 |..M.....D.&.1x..|
+0x98,0x91,0x9b,0x40,0x72,0x5a,0x38,0x03,0x0f,0x5e,0xc2,0x6a,0x5b,0xa8,0xda,0x0f, // 0000ae50 |...@rZ8..^.j[...|
+0xc6,0xbe,0x86,0xbe,0x66,0x6c,0x24,0x07,0xe1,0x6a,0x6a,0xd3,0x1d,0x85,0xd2,0x86, // 0000ae60 |....fl$..jj.....|
+0x1f,0xe9,0xf9,0x99,0x13,0x63,0xdf,0x5d,0x6c,0x1a,0x9c,0x9e,0x47,0x27,0xa9,0xd0, // 0000ae70 |.....c.]l...G'..|
+0x2b,0x94,0x6e,0x1a,0xee,0xc1,0xf8,0x45,0x4d,0xe6,0xeb,0xfb,0xec,0x7b,0x74,0x0e, // 0000ae80 |+.n....EM....{t.|
+0xcb,0xa1,0x9c,0x46,0xcf,0x98,0xdb,0x97,0xa2,0xf2,0x02,0x79,0x14,0x88,0xf2,0xc8, // 0000ae90 |...F.......y....|
+0x9c,0xae,0x2e,0x98,0x5a,0x0b,0x92,0x10,0xaa,0x4f,0xaf,0x3b,0x99,0xc7,0x78,0x7b, // 0000aea0 |....Z....O.;..x{|
+0xe5,0x5b,0x42,0x0a,0xb1,0x7b,0xda,0xaf,0x55,0x1f,0xa9,0x7a,0x6f,0xf7,0xce,0x33, // 0000aeb0 |.[B..{..U..zo..3|
+0x77,0x9e,0x1a,0xe1,0xcb,0xaa,0x26,0xf1,0xef,0x7c,0xca,0xe9,0x9e,0xab,0xdd,0xcc, // 0000aec0 |w.....&..|......|
+0x01,0xee,0x57,0xef,0x9c,0x47,0x6a,0x5d,0xe4,0x79,0xd7,0x9f,0xff,0x6d,0xa3,0x37, // 0000aed0 |..W..Gj].y...m.7|
+0xab,0x24,0x54,0xbb,0x48,0x4b,0x0b,0x7c,0x49,0x69,0x6a,0x88,0x39,0xc9,0xf3,0x39, // 0000aee0 |.$T.HK.|Iij.9..9|
+0x7c,0x5d,0xcc,0x87,0xf9,0x4a,0xc7,0x05,0xf2,0x5b,0xf4,0x3a,0x95,0xf6,0x8a,0xf6, // 0000aef0 ||]...J...[.:....|
+0x63,0x1b,0xb7,0xad,0x4a,0xf4,0x92,0xc2,0x3f,0xdb,0x1b,0x8b,0xc7,0x03,0x8f,0x03, // 0000af00 |c...J...?.......|
+0xa5,0x40,0xf4,0x92,0xe1,0x35,0xb9,0x66,0xee,0x3c,0x8f,0x58,0xd6,0x5a,0xd6,0x26, // 0000af10 |.@...5.f.<.X.Z.&|
+0x1c,0xb9,0x33,0x00,0x4f,0x15,0xf3,0x28,0xe9,0x3d,0x3b,0xb4,0xe7,0x02,0xa7,0x58, // 0000af20 |..3.O..(.=;....X|
+0x39,0x31,0xde,0x75,0xba,0x5a,0x5d,0x15,0xc4,0xa2,0x13,0x7e,0xde,0x98,0xd4,0xce, // 0000af30 |91.u.Z]....~....|
+0x47,0xf9,0xd6,0x58,0x6e,0x77,0xb3,0x94,0xc7,0x57,0x85,0x6a,0xa4,0x27,0xf2,0x7a, // 0000af40 |G..Xnw...W.j.'.z|
+0x8c,0x3b,0x20,0xc6,0x15,0xb2,0x5b,0x92,0xf7,0xe0,0x4e,0xca,0xb0,0x1f,0x5d,0xf3, // 0000af50 |.; ...[...N...].|
+0x2c,0x26,0x13,0x91,0x9f,0x5a,0x12,0xb3,0xa5,0x57,0x94,0x5e,0x6d,0x53,0x63,0x53, // 0000af60 |,&...Z...W.^mScS|
+0x2f,0x39,0x6f,0xf0,0x42,0x9e,0x5c,0x04,0x04,0x66,0xb3,0x32,0xce,0xb5,0x91,0x8f, // 0000af70 |/9o.B.\..f.2....|
+0x54,0xb9,0xbd,0xc7,0x81,0x4d,0x47,0x96,0x44,0x17,0xbc,0x10,0xe9,0x88,0xea,0x87, // 0000af80 |T....MG.D.......|
+0x68,0x2c,0x83,0x08,0x94,0xba,0x42,0x64,0x27,0xe1,0xe6,0x92,0x5e,0x36,0xfa,0x8f, // 0000af90 |h,....Bd'...^6..|
+0x75,0x05,0x2a,0xe2,0x37,0x68,0x46,0x97,0x93,0x4d,0x5e,0xcc,0x7d,0xe7,0xb1,0x6f, // 0000afa0 |u.*.7hF..M^.}..o|
+0xd3,0x18,0xbd,0xdb,0xf9,0x32,0x67,0xc2,0x38,0xfe,0x55,0xdb,0x55,0xb4,0x1c,0x5c, // 0000afb0 |.....2g.8.U.U..\|
+0x1e,0xe3,0xf0,0xf9,0xaf,0x82,0xd6,0x53,0xf3,0x6b,0x06,0x97,0xcc,0x12,0xd4,0x93, // 0000afc0 |.......S.k......|
+0xd2,0x16,0x9f,0x4a,0x92,0x95,0x6a,0xf3,0xba,0xb1,0x42,0xb4,0x6e,0xc0,0x41,0x89, // 0000afd0 |...J..j...B.n.A.|
+0xa9,0xab,0x35,0xac,0x6a,0x22,0xa2,0x35,0x67,0x88,0x89,0xaf,0xf5,0x33,0xe5,0xdb, // 0000afe0 |..5.j".5g....3..|
+0xa7,0x27,0x8e,0xf8,0x8c,0x76,0x7f,0xf3,0x70,0x6c,0xaa,0x36,0x3a,0x2b,0xc8,0x36, // 0000aff0 |.'...v..pl.6:+.6|
+0xec,0x42,0x79,0xdb,0x98,0xc8,0xf1,0xb7,0x85,0x39,0xd2,0xe5,0xfb,0x14,0x0d,0xba, // 0000b000 |.By......9......|
+0x40,0x0d,0x51,0x5f,0x22,0x1a,0x3d,0x79,0x83,0xfb,0x9b,0xd6,0x14,0xc7,0xcb,0x90, // 0000b010 |@.Q_".=y........|
+0x15,0x9c,0x31,0x2c,0x9d,0x3d,0xd2,0x03,0x66,0x53,0x0a,0x7a,0x40,0xd3,0xf4,0x03, // 0000b020 |..1,.=..fS.z@...|
+0xda,0xf0,0x37,0xf9,0xb6,0xe7,0x3d,0xc1,0xef,0x99,0x89,0x90,0x5e,0x25,0x99,0x3b, // 0000b030 |..7...=.....^%.;|
+0x7c,0x1e,0x66,0x9e,0x2b,0xad,0x61,0x4d,0x39,0x20,0x6d,0x5f,0x10,0xc0,0x30,0xa6, // 0000b040 ||.f.+.aM9 m_..0.|
+0x87,0xf2,0xe1,0x5a,0xfa,0xb0,0x7e,0xfa,0x2f,0xae,0x6d,0x05,0x7c,0x0b,0x4d,0xc2, // 0000b050 |...Z..~./.m.|.M.|
+0x13,0xc6,0xbd,0x6e,0x89,0x5f,0xb8,0x03,0x46,0x43,0xac,0x3c,0xdb,0xc6,0xb1,0x82, // 0000b060 |...n._..FC.<....|
+0x24,0xe6,0x5d,0x37,0x7c,0x07,0x25,0x7e,0xc1,0xac,0x85,0x51,0x13,0xcc,0xbd,0x65, // 0000b070 |$.]7|.%~...Q...e|
+0x98,0x4f,0x89,0x07,0x94,0xa0,0x27,0x29,0x98,0x8d,0x34,0x53,0x86,0xa3,0x88,0xe9, // 0000b080 |.O....')..4S....|
+0xce,0xc9,0x9e,0xdc,0x3b,0xbe,0xa2,0x58,0x44,0xe0,0x23,0x90,0x51,0x33,0xf4,0x52, // 0000b090 |....;..XD.#.Q3.R|
+0x39,0x33,0xe1,0x1d,0xda,0x51,0x40,0xfd,0x98,0xc4,0xb8,0xb1,0xb7,0xf2,0x8c,0x6e, // 0000b0a0 |93...Q@........n|
+0x17,0x50,0x1b,0xe2,0xb2,0x00,0xe1,0xbc,0x4a,0xfd,0x8b,0x1d,0xb1,0xac,0xad,0xf3, // 0000b0b0 |.P......J.......|
+0xcd,0x8a,0x4d,0x32,0x77,0x2d,0x5e,0xa6,0xed,0xb6,0xd7,0x76,0x0c,0x96,0x48,0x73, // 0000b0c0 |..M2w-^....v..Hs|
+0xc9,0xdd,0x4d,0x93,0xdc,0xb2,0x46,0x3b,0xef,0xa6,0x86,0xdf,0xfd,0x2e,0x38,0xfe, // 0000b0d0 |..M...F;......8.|
+0x26,0x4a,0x21,0xf1,0xcf,0xb2,0x19,0x91,0xaf,0x77,0xa5,0x94,0xd7,0x23,0xa1,0x07, // 0000b0e0 |&J!......w...#..|
+0xef,0x88,0x90,0x0b,0xcf,0x58,0x1b,0x47,0x8b,0xa6,0x90,0xd1,0xf6,0x9e,0x10,0x2e, // 0000b0f0 |.....X.G........|
+0x87,0xa7,0x51,0xfc,0x70,0x94,0x48,0x52,0x9c,0x37,0xff,0x18,0x7e,0x9a,0x23,0xa5, // 0000b100 |..Q.p.HR.7..~.#.|
+0xb0,0xbe,0x2f,0xdc,0x70,0xc4,0x0f,0xf0,0xb5,0x1b,0xfd,0xc7,0xf5,0xd0,0x56,0x39, // 0000b110 |../.p.........V9|
+0xea,0x91,0x3a,0xba,0xf8,0x1e,0xa9,0x69,0x5c,0x9b,0xb6,0xe6,0x6d,0x05,0x37,0x8f, // 0000b120 |..:....i\...m.7.|
+0xb1,0x87,0xfd,0x01,0x8e,0x26,0x74,0xe2,0x43,0xda,0x8e,0x42,0x4b,0x5b,0xf7,0xd0, // 0000b130 |.....&t.C..BK[..|
+0x0c,0xe4,0xa3,0xd1,0xad,0x07,0x9f,0xa6,0xf4,0xe0,0x94,0x67,0x1b,0xb5,0x47,0x25, // 0000b140 |...........g..G%|
+0x49,0xe7,0x44,0xa6,0xe3,0x5f,0xb1,0x18,0x8d,0x69,0xd8,0x69,0x3d,0xb4,0x84,0xff, // 0000b150 |I.D.._...i.i=...|
+0xea,0xd2,0xba,0xce,0x45,0x33,0xc4,0xcd,0xe6,0xe5,0x2b,0x91,0x01,0x49,0xe3,0x3c, // 0000b160 |....E3....+..I.<|
+0xd0,0x87,0x8b,0x23,0x67,0x5e,0x7f,0xb6,0xfd,0xa1,0x56,0xff,0xcf,0xe5,0x0c,0xe9, // 0000b170 |...#g^....V.....|
+0x63,0x7b,0x08,0xc3,0xec,0x7a,0x7a,0xb8,0x88,0x8a,0x5a,0xbd,0x88,0xa3,0xa6,0x71, // 0000b180 |c{...zz...Z....q|
+0x75,0x02,0xd9,0x3a,0x27,0x20,0x9a,0x60,0x1b,0xc7,0x67,0x67,0x0e,0xae,0x34,0xb4, // 0000b190 |u..:' .`..gg..4.|
+0x17,0xe2,0x07,0x25,0x43,0x00,0xa2,0xef,0x75,0xea,0xdc,0xcd,0x14,0xec,0x7c,0x7f, // 0000b1a0 |...%C...u.....|.|
+0xb2,0x84,0x8e,0x6a,0xe9,0x73,0x4b,0x83,0x62,0x14,0x87,0xc6,0x1c,0x1a,0x41,0xbe, // 0000b1b0 |...j.sK.b.....A.|
+0x8c,0x10,0xc7,0xb4,0x8b,0x0c,0x47,0xfa,0x44,0x24,0xa2,0x4f,0x6a,0x49,0xa0,0x6c, // 0000b1c0 |......G.D$.OjI.l|
+0xe1,0x93,0x7d,0x2e,0xcf,0x76,0xe8,0xe6,0x4b,0x50,0x31,0x5a,0xd9,0x04,0xd3,0xa3, // 0000b1d0 |..}..v..KP1Z....|
+0xe7,0x35,0x97,0x8e,0xb8,0xde,0xe8,0xc3,0xda,0x3c,0xe5,0xe1,0xf2,0x39,0xd5,0xf1, // 0000b1e0 |.5.......<...9..|
+0x87,0x8d,0x58,0xe4,0xc0,0x6d,0x47,0x48,0xa6,0xbd,0xaf,0x67,0xa3,0x1c,0xe2,0xd6, // 0000b1f0 |..X..mGH...g....|
+0x4e,0x37,0x6b,0x4c,0x2a,0xc3,0xf4,0x77,0xb5,0x82,0x69,0x9d,0x64,0xac,0x25,0xb9, // 0000b200 |N7kL*..w..i.d.%.|
+0xa2,0x80,0x4b,0xe9,0x88,0x88,0x5b,0xf0,0x0f,0xdd,0x7f,0x81,0xbe,0x53,0xcc,0xe7, // 0000b210 |..K...[......S..|
+0xd9,0x49,0xda,0x74,0x35,0x00,0x71,0x81,0x4e,0x16,0x4e,0xcc,0x4d,0xee,0x3e,0xac, // 0000b220 |.I.t5.q.N.N.M.>.|
+0x2d,0x76,0xa6,0x6f,0xa4,0xf2,0xc5,0x7f,0x98,0xc2,0x19,0xe9,0x7f,0xfb,0x6f,0x1c, // 0000b230 |-v.o..........o.|
+0x30,0x53,0xbc,0x3f,0x6f,0x53,0xdf,0x2c,0x6e,0xe0,0x9b,0xa9,0x5b,0x97,0x81,0x25, // 0000b240 |0S.?oS.,n...[..%|
+0xc9,0x95,0xe0,0xa6,0x78,0x3f,0xb3,0xc0,0xb6,0x6b,0x5c,0x5d,0x83,0xa3,0x7d,0x2d, // 0000b250 |....x?...k\]..}-|
+0x2a,0xe8,0xf8,0x32,0x23,0x5a,0x34,0x7d,0xea,0xeb,0xdf,0xf9,0xfe,0x96,0x83,0x5d, // 0000b260 |*..2#Z4}.......]|
+0xf0,0x7f,0xbd,0xb3,0x51,0x27,0x55,0x4a,0xc3,0x2a,0xf7,0x95,0xe0,0x46,0xa9,0xdc, // 0000b270 |....Q'UJ.*...F..|
+0x0d,0x03,0x53,0xcd,0x6c,0x41,0x5e,0x59,0xce,0xed,0x1b,0x62,0xe4,0x00,0xb2,0xf0, // 0000b280 |..S.lA^Y...b....|
+0xb6,0x14,0x2d,0x51,0x73,0xab,0x3a,0xa9,0xce,0x78,0x78,0xdb,0x94,0x5e,0x50,0xf4, // 0000b290 |..-Qs.:..xx..^P.|
+0x7e,0x73,0x38,0x73,0x75,0x7d,0x16,0xc2,0x08,0xe5,0xa7,0x03,0x15,0x9a,0x95,0x13, // 0000b2a0 |~s8su}..........|
+0x4a,0x78,0x05,0xbd,0x02,0xf3,0xdd,0x9d,0x18,0x52,0xe9,0x8b,0x40,0x92,0x2d,0x9e, // 0000b2b0 |Jx.......R..@.-.|
+0xc0,0x18,0x9d,0x35,0xa1,0xbb,0x31,0xcb,0xbf,0x31,0x0d,0x28,0x88,0x77,0xf2,0xbc, // 0000b2c0 |...5..1..1.(.w..|
+0x4a,0x41,0xa8,0xcf,0x3b,0x7d,0x6f,0xca,0x9f,0xfb,0xb7,0xcc,0x59,0xa7,0x8a,0xb1, // 0000b2d0 |JA..;}o.....Y...|
+0x8a,0xe5,0x3e,0x48,0x64,0x95,0xe7,0x3a,0x0b,0xaa,0xa4,0x23,0xbf,0x98,0xb3,0xeb, // 0000b2e0 |..>Hd..:...#....|
+0xa0,0x69,0x8b,0xe5,0x9c,0xfb,0x30,0x81,0xc8,0x8a,0x5d,0x77,0x90,0x2b,0xe1,0x33, // 0000b2f0 |.i....0...]w.+.3|
+0xe3,0x9c,0x52,0x62,0xb7,0x18,0x15,0x18,0xac,0x1e,0x68,0x9c,0x1c,0x4f,0xd8,0xa3, // 0000b300 |..Rb......h..O..|
+0x46,0x0a,0x15,0x32,0x69,0x30,0xa0,0x6b,0xba,0xaf,0x43,0x9c,0x37,0x1b,0xa3,0xd6, // 0000b310 |F..2i0.k..C.7...|
+0x6e,0x47,0x92,0xf0,0x4a,0xc9,0xda,0x1b,0xc5,0x23,0xb5,0x5f,0x22,0x37,0x93,0x2a, // 0000b320 |nG..J....#._"7.*|
+0x5d,0xd1,0xe8,0xaf,0x21,0xe2,0x00,0x0c,0x70,0xb9,0x81,0x80,0x7b,0xcb,0xcd,0xb4, // 0000b330 |]...!...p...{...|
+0xde,0xe4,0xb8,0xe6,0x02,0x54,0xb2,0xb2,0x43,0xb1,0x6e,0xa4,0x5c,0x0c,0x12,0x28, // 0000b340 |.....T..C.n.\..(|
+0xac,0x77,0x20,0x9e,0xd8,0x70,0xa0,0x79,0x00,0xbe,0x9a,0x80,0x16,0xbc,0xbd,0xa5, // 0000b350 |.w ..p.y........|
+0x8b,0x2f,0xf8,0xff,0xe8,0xca,0x70,0xf7,0x99,0x34,0xf6,0x4c,0x41,0x2f,0x0f,0xe7, // 0000b360 |./....p..4.LA/..|
+0x73,0x39,0xae,0xce,0x75,0x06,0xf5,0x6c,0x7e,0xdd,0xf7,0x30,0xb1,0x12,0xed,0xe7, // 0000b370 |s9..u..l~..0....|
+0x15,0x19,0x21,0xbe,0xa8,0x93,0x61,0xf4,0x82,0xff,0x40,0x1f,0xdc,0x05,0xa9,0x77, // 0000b380 |..!...a...@....w|
+0x1f,0x5c,0x35,0xc1,0xef,0xd5,0x97,0x49,0xe3,0x28,0x6b,0x6a,0xbd,0x6a,0x6a,0x68, // 0000b390 |.\5....I.(kj.jjh|
+0x5c,0x41,0xa8,0x85,0xc3,0x65,0xbc,0xaf,0x78,0x8f,0xfe,0x1d,0x0e,0xb5,0xdc,0xda, // 0000b3a0 |\A...e..x.......|
+0xef,0x5d,0x76,0xb6,0x32,0x93,0xda,0x41,0x44,0x27,0x80,0x50,0xcb,0xc4,0x9e,0xfc, // 0000b3b0 |.]v.2..AD'.P....|
+0x78,0xc9,0xea,0x84,0xf9,0x76,0x56,0xb2,0x3a,0x15,0x3b,0xd9,0x71,0xb2,0xbe,0xcc, // 0000b3c0 |x....vV.:.;.q...|
+0xfe,0x46,0x68,0x1f,0x73,0xd3,0xe2,0xb7,0x45,0x1c,0x6d,0x8d,0x69,0xe9,0x23,0x52, // 0000b3d0 |.Fh.s...E.m.i.#R|
+0x80,0x26,0xac,0x8b,0x0b,0xf3,0x84,0xcb,0x97,0xe0,0x57,0xde,0xc3,0xa2,0x1e,0x0c, // 0000b3e0 |.&........W.....|
+0x59,0x11,0xf4,0x8b,0xb4,0x8d,0xa7,0x51,0xee,0xdf,0x56,0x60,0xfe,0xeb,0x48,0x32, // 0000b3f0 |Y......Q..V`..H2|
+0xf5,0x9d,0xd4,0xf2,0x20,0x11,0x94,0xc8,0x17,0xde,0xd8,0x8a,0xe3,0x17,0x41,0x21, // 0000b400 |.... .........A!|
+0x65,0x80,0xe3,0x5d,0xf7,0xcc,0x29,0xe0,0x38,0x0e,0x2b,0x16,0x0e,0x74,0xf1,0xda, // 0000b410 |e..]..).8.+..t..|
+0x2a,0x49,0x99,0x3b,0x52,0x4a,0xbb,0x08,0x7f,0x2f,0x64,0x9e,0xf7,0x8e,0x76,0xd3, // 0000b420 |*I.;RJ.../d...v.|
+0x30,0x19,0x33,0xc3,0x51,0x2c,0xa1,0x36,0x9e,0x86,0xd2,0xaa,0xde,0xe4,0x10,0x5d, // 0000b430 |0.3.Q,.6.......]|
+0x48,0x0d,0xdf,0xc3,0x4d,0xfa,0xd1,0xe6,0x90,0xe9,0x37,0x4d,0xf5,0x6a,0x8c,0x38, // 0000b440 |H...M.....7M.j.8|
+0x0a,0x8d,0x50,0xc5,0xa0,0xa3,0x03,0x16,0x52,0x26,0x33,0xde,0xb5,0xf6,0x87,0x09, // 0000b450 |..P.....R&3.....|
+0x1d,0x3b,0xdd,0xb6,0x25,0xb4,0xec,0xb0,0x9d,0x4d,0xe3,0x04,0x10,0x9f,0xb6,0xeb, // 0000b460 |.;..%....M......|
+0x76,0x71,0x8a,0xc6,0xf6,0x02,0xb0,0xd6,0x80,0x69,0x6b,0x3b,0x20,0xf3,0x50,0x93, // 0000b470 |vq.......ik; .P.|
+0x22,0x81,0x89,0x81,0x31,0x41,0xf7,0x9c,0x1d,0x42,0x3b,0x74,0x5f,0xcb,0x8f,0xfa, // 0000b480 |"...1A...B;t_...|
+0xd6,0x5b,0x85,0xab,0xc8,0x52,0x32,0xc6,0xc0,0xfe,0x51,0x76,0x04,0xea,0xeb,0xdb, // 0000b490 |.[...R2...Qv....|
+0x8a,0x03,0xf0,0xd2,0xdb,0x0a,0xe3,0x32,0x01,0x97,0xb9,0x9f,0x20,0x44,0xa5,0x1f, // 0000b4a0 |.......2.... D..|
+0x8c,0x2d,0xb1,0xb0,0xfc,0xf8,0xab,0x1c,0x96,0x1c,0x29,0x36,0x9a,0x77,0x51,0x6f, // 0000b4b0 |.-........)6.wQo|
+0xe3,0xdf,0x93,0x34,0x31,0xa5,0x02,0xa4,0x64,0x29,0xe5,0xe3,0x0d,0xfe,0x67,0xe2, // 0000b4c0 |...41...d)....g.|
+0xc5,0xb0,0x36,0x36,0xb1,0xa6,0xea,0x05,0xb0,0x6e,0x23,0x63,0xc3,0xf0,0x65,0x59, // 0000b4d0 |..66.....n#c..eY|
+0xce,0x5c,0x3b,0xcd,0xf1,0x93,0xdb,0x5c,0xeb,0xdf,0x15,0xc8,0x35,0xbf,0x50,0xda, // 0000b4e0 |.\;....\....5.P.|
+0x98,0xfb,0x1e,0x56,0xa2,0xd9,0x2e,0xac,0xcc,0xa8,0xd7,0x9d,0xba,0xf0,0x7b,0xb6, // 0000b4f0 |...V..........{.|
+0x85,0x43,0x5f,0x32,0x7b,0x22,0xc8,0x9b,0xaa,0xed,0xdc,0x19,0x14,0xfa,0xd6,0xb8, // 0000b500 |.C_2{"..........|
+0x05,0x50,0xd6,0x8e,0x46,0xca,0x6c,0x71,0x58,0x2e,0x4e,0xbc,0x3d,0x51,0xfc,0x28, // 0000b510 |.P..F.lqX.N.=Q.(|
+0x57,0xdb,0xec,0x34,0xd1,0x67,0xae,0x57,0xba,0x24,0x24,0xa7,0x58,0x74,0xb4,0x94, // 0000b520 |W..4.g.W.$$.Xt..|
+0xac,0xe7,0x01,0xec,0x19,0x80,0x26,0x5a,0x67,0xc7,0x3a,0x71,0x96,0xaf,0x33,0x4e, // 0000b530 |......&Zg.:q..3N|
+0x49,0xad,0x80,0x7d,0x90,0x2a,0x48,0x55,0x4d,0x93,0x30,0xf3,0x88,0x0f,0xb7,0x74, // 0000b540 |I..}.*HUM.0....t|
+0x44,0x58,0x3e,0xca,0x46,0x1c,0x37,0xfb,0x7c,0xa3,0xed,0x57,0x34,0x8a,0xe2,0x33, // 0000b550 |DX>.F.7.|..W4..3|
+0xe7,0xf8,0x79,0x21,0x66,0x9c,0x78,0x61,0xee,0x05,0x2a,0xb8,0x8d,0xca,0xb5,0x4c, // 0000b560 |..y!f.xa..*....L|
+0x96,0x1c,0xcf,0xbc,0x9a,0x7f,0x23,0xa9,0xc9,0x31,0x96,0x05,0x3d,0x09,0xd3,0x49, // 0000b570 |......#..1..=..I|
+0x1d,0x95,0xff,0xdc,0x93,0x93,0x57,0x14,0xc5,0x30,0x74,0x52,0x80,0xfb,0xe1,0x14, // 0000b580 |......W..0tR....|
+0x69,0x89,0x3f,0x5b,0x94,0xb9,0x37,0x33,0x65,0x1b,0x42,0x22,0xa6,0xb3,0xe4,0x82, // 0000b590 |i.?[..73e.B"....|
+0x1e,0x55,0x6c,0x80,0x11,0x69,0xf8,0x70,0xeb,0x5a,0x1b,0x37,0x85,0xbb,0x69,0x24, // 0000b5a0 |.Ul..i.p.Z.7..i$|
+0xa4,0xe3,0xb0,0x05,0x8a,0x5d,0x59,0xe7,0x85,0x6e,0x26,0x8c,0xb5,0x1d,0x9b,0xbf, // 0000b5b0 |.....]Y..n&.....|
+0xd4,0x02,0x3f,0xd7,0xff,0x6a,0x33,0x96,0x16,0xc3,0xae,0xef,0x6f,0xa9,0x99,0x2f, // 0000b5c0 |..?..j3.....o../|
+0xee,0xc1,0xb2,0x84,0x98,0xf7,0x56,0x92,0xdc,0x82,0x7b,0x20,0xeb,0x25,0x82,0x58, // 0000b5d0 |......V...{ .%.X|
+0x44,0xae,0x27,0xc0,0x9a,0x73,0x3a,0x53,0xf8,0x06,0x23,0x89,0xf4,0xd5,0x71,0xbf, // 0000b5e0 |D.'..s:S..#...q.|
+0x5b,0x5e,0x9a,0x41,0xff,0x29,0x05,0x79,0x13,0x8e,0x31,0xaa,0x54,0x67,0xec,0x41, // 0000b5f0 |[^.A.).y..1.Tg.A|
+0x4f,0xee,0xea,0x2c,0x38,0x6e,0x69,0x87,0x3d,0x3c,0xa9,0x43,0x87,0xf7,0x21,0x8d, // 0000b600 |O..,8ni.=<.C..!.|
+0xc7,0x0e,0xad,0x40,0x6d,0x57,0x6e,0xb9,0xfb,0xff,0xc7,0xf5,0xfd,0xa6,0x88,0x89, // 0000b610 |...@mWn.........|
+0x41,0xb7,0x0f,0x6f,0x2a,0x05,0x1c,0xba,0x7e,0xc1,0x04,0x31,0x79,0x1b,0x15,0x50, // 0000b620 |A..o*...~..1y..P|
+0x88,0xb4,0xea,0x6e,0x27,0x92,0x90,0xc1,0x4a,0x22,0x11,0xf9,0x4b,0xcb,0xad,0x5f, // 0000b630 |...n'...J"..K.._|
+0xc7,0x26,0xcf,0x28,0x85,0xc3,0x4d,0xd8,0x39,0x15,0x29,0x0d,0x07,0x5f,0xb4,0x47, // 0000b640 |.&.(..M.9.).._.G|
+0x93,0x02,0x66,0x5e,0x5b,0xa9,0xcd,0x88,0x21,0xf9,0x57,0x53,0xbf,0x92,0x21,0x1d, // 0000b650 |..f^[...!.WS..!.|
+0xb1,0xed,0xd7,0x01,0x2b,0x4a,0x8f,0x40,0xee,0x6d,0xd8,0xdf,0xbf,0x7b,0x3a,0xda, // 0000b660 |....+J.@.m...{:.|
+0xb9,0x18,0x3e,0x24,0xf3,0x8e,0x78,0x0a,0xbe,0xff,0xaa,0xe9,0x16,0x43,0x85,0x19, // 0000b670 |..>$..x......C..|
+0x73,0xb3,0xf5,0x4c,0x77,0x43,0xce,0xf7,0xa5,0xef,0x1e,0xb0,0x0c,0x00,0xae,0x33, // 0000b680 |s..LwC.........3|
+0x4a,0x04,0xa8,0xd0,0x95,0x5d,0xd6,0x2e,0xea,0xf9,0xa9,0xae,0x5b,0xe4,0x50,0xe8, // 0000b690 |J....]......[.P.|
+0xce,0x56,0x15,0x53,0xdd,0x3c,0x74,0x59,0x18,0x53,0xf9,0x45,0x6f,0x20,0xc6,0xd3, // 0000b6a0 |.V.S.<tY.S.Eo ..|
+0x97,0x5f,0x09,0x48,0x07,0xb5,0x0a,0x21,0xcd,0x5f,0xf5,0x2e,0x70,0x3a,0x08,0x15, // 0000b6b0 |._.H...!._..p:..|
+0xb6,0x96,0x7c,0xef,0x29,0x2d,0x16,0x19,0x11,0x42,0xda,0x82,0xde,0xdf,0xb4,0x11, // 0000b6c0 |..|.)-...B......|
+0xa1,0x82,0xf1,0xca,0x0e,0xfb,0x0d,0x05,0xe9,0x66,0xd6,0x55,0x05,0x39,0x3c,0x83, // 0000b6d0 |.........f.U.9<.|
+0xeb,0xf3,0x57,0xcd,0xd2,0x56,0x31,0xf0,0x05,0x9e,0x45,0xbd,0x84,0x93,0xbe,0xba, // 0000b6e0 |..W..V1...E.....|
+0x7a,0xc1,0x34,0x7e,0x17,0x43,0x24,0xdc,0x4f,0x88,0xc2,0x3c,0xc1,0xf7,0xce,0xe0, // 0000b6f0 |z.4~.C$.O..<....|
+0xa4,0xa2,0xa1,0x4e,0xcf,0x45,0x92,0x53,0x95,0xb0,0x37,0x5b,0x75,0xf2,0xc4,0x9f, // 0000b700 |...N.E.S..7[u...|
+0x56,0xae,0x7d,0x84,0x4e,0xda,0xad,0x16,0xc6,0x69,0x5c,0xd1,0x58,0x6d,0x6e,0x36, // 0000b710 |V.}.N....i\.Xmn6|
+0x21,0x41,0x83,0xb8,0x0f,0xf1,0x6e,0x66,0xe7,0x2e,0xaa,0xbe,0xed,0xe6,0x55,0x90, // 0000b720 |!A....nf......U.|
+0x23,0x58,0xcd,0xef,0x33,0x88,0x3f,0x3b,0x46,0x05,0x6e,0x8e,0xb8,0x95,0x89,0x39, // 0000b730 |#X..3.?;F.n....9|
+0xc0,0x6d,0x58,0x6e,0x82,0x5b,0x69,0x8b,0x40,0xb1,0x70,0x4e,0x63,0x0b,0xf8,0x61, // 0000b740 |.mXn.[i.@.pNc..a|
+0x66,0x8e,0x64,0x98,0x38,0x75,0x85,0x13,0x88,0x37,0xd5,0x4a,0x04,0xef,0xae,0x4d, // 0000b750 |f.d.8u...7.J...M|
+0x43,0x8c,0x13,0x2c,0x48,0x63,0x4e,0xd4,0x67,0xc4,0x47,0x08,0x68,0xf3,0x3f,0x6e, // 0000b760 |C..,HcN.g.G.h.?n|
+0x66,0x0d,0xea,0x93,0xe5,0xb3,0xab,0x56,0xc8,0x13,0xa3,0x61,0x8c,0xec,0x43,0x8a, // 0000b770 |f......V...a..C.|
+0x47,0x6f,0x88,0xa3,0x5a,0x86,0x9f,0x92,0x3d,0xe4,0xb8,0xcd,0xfc,0x72,0xd5,0x12, // 0000b780 |Go..Z...=....r..|
+0x0c,0x24,0x42,0x3c,0xf1,0xf5,0x9f,0x15,0x60,0x6d,0x14,0x55,0x97,0x6c,0xc2,0x6b, // 0000b790 |.$B<....`m.U.l.k|
+0xc3,0x8c,0x10,0x9e,0xc1,0xa0,0x84,0xae,0x79,0x4c,0xf2,0x96,0x52,0xe3,0x07,0xd5, // 0000b7a0 |........yL..R...|
+0x21,0xaa,0x21,0x61,0x12,0x6c,0x74,0xcf,0x10,0xe1,0x16,0xc8,0x53,0xe4,0x72,0x08, // 0000b7b0 |!.!a.lt.....S.r.|
+0x13,0xab,0x20,0x34,0xa4,0xe2,0xa1,0x26,0xb8,0x73,0x1d,0x88,0xcb,0x97,0x36,0x93, // 0000b7c0 |.. 4...&.s....6.|
+0x30,0x8a,0x83,0x8b,0x15,0xeb,0x4d,0x3f,0x36,0xcc,0xba,0xcb,0xe5,0x52,0xf1,0x34, // 0000b7d0 |0.....M?6....R.4|
+0x99,0xc7,0x04,0x22,0x3c,0x83,0x38,0x39,0x75,0x19,0x69,0xf8,0x1e,0xe7,0x2b,0x58, // 0000b7e0 |..."<.89u.i...+X|
+0xe3,0xd9,0xad,0x28,0xb6,0x2b,0x7f,0xa7,0xe4,0xf0,0x94,0xa9,0x9f,0xd9,0xbb,0xb8, // 0000b7f0 |...(.+..........|
+0x24,0x9b,0x3b,0xeb,0x6f,0x29,0xba,0x9f,0xb8,0x2a,0x19,0x18,0xfc,0x45,0xda,0x24, // 0000b800 |$.;.o)...*...E.$|
+0x68,0x1b,0x20,0x44,0xad,0xe0,0x86,0x4c,0xc6,0x76,0x2c,0xba,0x74,0x3d,0xb7,0x89, // 0000b810 |h. D...L.v,.t=..|
+0xe7,0xb0,0x85,0x9a,0x9b,0xee,0xd8,0x86,0xd1,0x2f,0xcf,0xe4,0x21,0x54,0x17,0x71, // 0000b820 |........./..!T.q|
+0x61,0x11,0xdd,0x4c,0x11,0x5a,0xd6,0xd6,0x37,0x6a,0x41,0xea,0x53,0x5e,0xf1,0x6e, // 0000b830 |a..L.Z..7jA.S^.n|
+0x13,0x0d,0x02,0xd1,0x06,0xdd,0x18,0xe0,0x89,0x0c,0x9d,0x6b,0x09,0x97,0x38,0xef, // 0000b840 |...........k..8.|
+0x50,0x94,0xf2,0x8e,0xb0,0x6c,0x3b,0xa3,0x3d,0x69,0x34,0x0e,0x02,0x05,0x16,0xd1, // 0000b850 |P....l;.=i4.....|
+0x80,0x91,0xc6,0xe1,0x7e,0x91,0x8c,0x0b,0xb3,0x17,0x42,0xe3,0x70,0xa5,0x10,0x62, // 0000b860 |....~.....B.p..b|
+0x40,0xf1,0xfe,0xbf,0xd1,0x23,0xbc,0x6b,0x0e,0x76,0x36,0x32,0x54,0x32,0xa4,0xcf, // 0000b870 |@....#.k.v62T2..|
+0xb9,0x54,0x39,0x11,0x2c,0xeb,0xe8,0xae,0x25,0x52,0x05,0x85,0x8a,0x48,0xe0,0x81, // 0000b880 |.T9.,...%R...H..|
+0x09,0xf4,0x20,0x31,0xf4,0x3d,0xd4,0x6c,0xe8,0x7f,0x0a,0xc0,0x43,0x8c,0xd1,0xec, // 0000b890 |.. 1.=.l....C...|
+0x07,0x06,0x54,0x3a,0x32,0x90,0x27,0x3b,0xb6,0x09,0x74,0xd9,0x56,0xbc,0x9a,0x45, // 0000b8a0 |..T:2.';..t.V..E|
+0x0f,0xe0,0xf9,0x69,0x44,0xb5,0xfe,0xe1,0xe8,0xe5,0x6d,0x32,0x84,0x9c,0x40,0x3c, // 0000b8b0 |...iD.....m2..@<|
+0x60,0xa7,0xdf,0x3a,0x0e,0xb7,0x34,0x93,0xd5,0xea,0x90,0xcc,0x88,0x1a,0x93,0x9f, // 0000b8c0 |`..:..4.........|
+0x11,0xfe,0x6f,0x88,0x9f,0xca,0x69,0x48,0x5f,0xb2,0x48,0x8b,0xca,0x92,0xfa,0x4b, // 0000b8d0 |..o...iH_.H....K|
+0xc0,0x36,0x7a,0x66,0x6b,0x31,0x0a,0xe8,0x79,0x79,0x56,0x47,0x07,0x81,0x89,0xae, // 0000b8e0 |.6zfk1..yyVG....|
+0x16,0xb8,0x05,0x67,0x99,0x9d,0xeb,0x26,0xe4,0xf7,0xfb,0xab,0x5f,0x4e,0x6a,0xaa, // 0000b8f0 |...g...&...._Nj.|
+0xc7,0x28,0x1c,0xe4,0xc6,0xf3,0x60,0x6b,0x9c,0x0a,0xe8,0x59,0xfe,0x2c,0x61,0x2a, // 0000b900 |.(....`k...Y.,a*|
+0xa5,0x87,0x60,0xae,0x92,0x3f,0x75,0xdb,0x59,0xf1,0x2b,0xa2,0xdd,0x1a,0xf6,0x61, // 0000b910 |..`..?u.Y.+....a|
+0x16,0x85,0x7a,0x43,0xda,0xe0,0x9c,0x2a,0x6e,0xda,0x56,0x97,0x4a,0x0a,0x5a,0x9c, // 0000b920 |..zC...*n.V.J.Z.|
+0x03,0x45,0x10,0x8c,0x18,0x7b,0xe1,0xfb,0x67,0xe2,0x30,0xf5,0x8d,0x67,0xc9,0x3c, // 0000b930 |.E...{..g.0..g.<|
+0x95,0x6f,0x47,0x99,0x2f,0x5d,0x08,0x02,0xba,0x5b,0x38,0x18,0x37,0xb0,0xaa,0x67, // 0000b940 |.oG./]...[8.7..g|
+0xd6,0xd0,0xa2,0x47,0x40,0xe0,0x04,0x90,0x6a,0x1a,0x2e,0x63,0xca,0xc3,0xab,0x25, // 0000b950 |...G@...j..c...%|
+0x77,0xdc,0x9e,0x90,0x06,0x98,0x5f,0x70,0x88,0x9d,0x38,0x0a,0x35,0xcd,0x01,0x8f, // 0000b960 |w....._p..8.5...|
+0x41,0x5c,0x07,0x45,0x1c,0xba,0x2d,0xbe,0x0e,0xe1,0x3a,0x25,0x32,0x0a,0xb4,0xc7, // 0000b970 |A\.E..-...:%2...|
+0xc7,0xff,0xdb,0x7e,0xfd,0xcb,0xdc,0x6d,0x7a,0xf4,0x7f,0x11,0x1c,0x74,0x99,0x98, // 0000b980 |...~...mz....t..|
+0xf8,0xc0,0x72,0x8f,0xb8,0x86,0xa6,0xa4,0xe8,0x1d,0xa1,0x04,0xe6,0x9b,0x6e,0xfb, // 0000b990 |..r...........n.|
+0x0e,0x80,0x6e,0xea,0x01,0x62,0x5b,0x0e,0x2b,0x21,0x66,0x10,0x66,0x67,0x9b,0x6d, // 0000b9a0 |..n..b[.+!f.fg.m|
+0x55,0x78,0x98,0x02,0x93,0xdc,0xc3,0xd6,0xa2,0xb7,0x28,0x17,0xfa,0xde,0xdd,0xee, // 0000b9b0 |Ux........(.....|
+0x3c,0xbb,0x23,0x9c,0x93,0xb2,0x5b,0x54,0xeb,0xce,0xde,0xc3,0x0e,0xf5,0x0b,0xdd, // 0000b9c0 |<.#...[T........|
+0x7c,0xad,0xd3,0xa6,0x42,0xb3,0x57,0x0e,0x5c,0x1f,0x2e,0xba,0x7f,0x59,0xbf,0x43, // 0000b9d0 ||...B.W.\....Y.C|
+0x12,0xea,0x20,0x1f,0xc8,0xb0,0x08,0x47,0x66,0x32,0x73,0x89,0xed,0xb4,0xa8,0x98, // 0000b9e0 |.. ....Gf2s.....|
+0xcd,0x5b,0xde,0x5a,0x55,0x62,0x4d,0x2c,0xee,0xef,0x41,0x8d,0xaa,0x38,0x6f,0xf1, // 0000b9f0 |.[.ZUbM,..A..8o.|
+0xa4,0x4c,0xf2,0x3d,0x74,0x07,0xf4,0xbe,0x3b,0x35,0x80,0x3f,0x07,0xad,0xbc,0x05, // 0000ba00 |.L.=t...;5.?....|
+0x1e,0xfe,0xed,0x1d,0xf7,0xd3,0xe5,0x6a,0x90,0x46,0x18,0x64,0xe0,0x60,0xcc,0x43, // 0000ba10 |.......j.F.d.`.C|
+0xd6,0x28,0xd3,0x5e,0xc5,0x2c,0xcc,0x65,0xd9,0x5d,0xd1,0x13,0x82,0x20,0xc8,0xea, // 0000ba20 |.(.^.,.e.]... ..|
+0x3e,0xf9,0x8a,0x84,0xdc,0xd8,0x90,0xf2,0x49,0x94,0x1c,0xda,0x36,0xd2,0xb6,0x12, // 0000ba30 |>.......I...6...|
+0x9d,0xef,0xd9,0xbb,0x2d,0x0f,0x6f,0xda,0x6d,0x0e,0xb3,0xff,0xfa,0x2d,0x3d,0x6f, // 0000ba40 |....-.o.m....-=o|
+0x0c,0xb8,0x4c,0x76,0xba,0xea,0x7f,0x6b,0x7f,0x2b,0xcf,0xc5,0xb6,0x41,0x51,0x1b, // 0000ba50 |..Lv...k.+...AQ.|
+0x3c,0x2c,0xaa,0x17,0xd4,0x6c,0x49,0xc8,0x88,0x75,0xef,0xfc,0xdd,0xa2,0xc4,0x03, // 0000ba60 |<,...lI..u......|
+0x78,0x25,0x2b,0x32,0x9d,0xfb,0x8f,0x16,0xaa,0xc7,0x64,0x56,0x14,0x3a,0xe0,0x81, // 0000ba70 |x%+2......dV.:..|
+0xec,0xea,0xbc,0xd4,0x33,0xdb,0xa2,0xe8,0x15,0x75,0x4e,0x0d,0xef,0x09,0xe0,0xb0, // 0000ba80 |....3....uN.....|
+0xa3,0xf1,0x9a,0xaa,0x4b,0xd7,0x0f,0x19,0xa2,0x1e,0x3f,0xa3,0x78,0x62,0xfc,0xd6, // 0000ba90 |....K.....?.xb..|
+0xe8,0x32,0x92,0x94,0xde,0x4e,0x9d,0xe8,0xee,0xcd,0xe2,0x9a,0xc3,0xe5,0x97,0xb1, // 0000baa0 |.2...N..........|
+0x67,0xea,0x0e,0x41,0x09,0x24,0xd7,0x32,0x94,0xe5,0x15,0x4a,0x53,0xab,0xf3,0xf4, // 0000bab0 |g..A.$.2...JS...|
+0x10,0xa4,0xf0,0x27,0x2e,0x40,0x73,0x5a,0xdd,0xcd,0x32,0x27,0x32,0xbb,0x9b,0xf9, // 0000bac0 |...'.@sZ..2'2...|
+0xe3,0x46,0x13,0x59,0x67,0x06,0x77,0x6a,0x77,0xa2,0xd6,0x03,0x01,0x42,0xf6,0x35, // 0000bad0 |.F.Yg.wjw....B.5|
+0xce,0x65,0xdc,0x44,0x91,0xc2,0xf3,0xde,0x90,0x98,0x37,0xed,0xde,0xc4,0x08,0xe6, // 0000bae0 |.e.D......7.....|
+0x81,0xc7,0x0e,0xf8,0x88,0xca,0xe9,0x87,0x3c,0x08,0x8a,0x4e,0x23,0x89,0xfc,0x7a, // 0000baf0 |........<..N#..z|
+0x33,0xe2,0x43,0x3d,0xc7,0x87,0x5f,0x6a,0x4e,0x91,0xb2,0x66,0x0b,0x0f,0x27,0xcd, // 0000bb00 |3.C=.._jN..f..'.|
+0x1b,0xc8,0x17,0x3e,0x7a,0x52,0x8a,0xeb,0x95,0x1f,0xcf,0x26,0x13,0xab,0xa5,0x60, // 0000bb10 |...>zR.....&...`|
+0x59,0xf2,0x3e,0x3d,0xb5,0xb6,0x3d,0x85,0xa8,0xa9,0x25,0x51,0xf7,0xae,0x44,0xdd, // 0000bb20 |Y.>=..=...%Q..D.|
+0xb8,0x5a,0xcf,0xef,0x1c,0x9c,0x72,0x15,0xe5,0x52,0xdd,0x6a,0xa2,0xb8,0x8d,0x31, // 0000bb30 |.Z....r..R.j...1|
+0x79,0x46,0x83,0xb0,0x2a,0xe1,0x97,0x42,0x89,0x74,0xc4,0x64,0x94,0xf0,0x74,0x7d, // 0000bb40 |yF..*..B.t.d..t}|
+0xe6,0x2a,0x1d,0x36,0x40,0x7b,0xf9,0x9b,0xd1,0xef,0x69,0x98,0xc9,0x3c,0xd2,0x9f, // 0000bb50 |.*.6@{....i..<..|
+0xb0,0xc2,0xd3,0x52,0x66,0x6c,0x5f,0x63,0xc1,0xbb,0x99,0xa4,0x51,0xa5,0x05,0x2a, // 0000bb60 |...Rfl_c....Q..*|
+0xea,0x78,0x57,0x60,0x81,0x3d,0xe1,0x40,0x50,0x0d,0x14,0xcd,0x27,0x80,0x46,0xc6, // 0000bb70 |.xW`.=.@P...'.F.|
+0x5e,0xf6,0xff,0x18,0x3f,0xd7,0x92,0x25,0x2f,0xa0,0x01,0x7b,0xea,0x9f,0xdd,0x11, // 0000bb80 |^...?..%/..{....|
+0xc2,0x08,0x1e,0x68,0x83,0x8f,0xf0,0xa6,0x80,0x8d,0x8e,0xe1,0x14,0xa8,0x00,0x4a, // 0000bb90 |...h...........J|
+0x88,0x56,0x99,0x76,0x0a,0x41,0x56,0x61,0x62,0x30,0xa0,0x2e,0x0a,0xb6,0xb1,0x07, // 0000bba0 |.V.v.AVab0......|
+0xa8,0xbf,0xa7,0x3f,0xff,0xf0,0x30,0x18,0xed,0x50,0xae,0x98,0x6d,0xee,0xbc,0x85, // 0000bbb0 |...?..0..P..m...|
+0x93,0xed,0x26,0xa3,0xec,0x91,0xaf,0x7c,0x4d,0xd4,0x07,0x62,0x75,0x89,0x6c,0x78, // 0000bbc0 |..&....|M..bu.lx|
+0xf4,0x3c,0x8a,0x3e,0x52,0x2d,0x05,0x81,0x2b,0xe9,0xd7,0xca,0xac,0x51,0x7e,0xac, // 0000bbd0 |.<.>R-..+....Q~.|
+0x1d,0xc5,0x94,0x15,0x1b,0xaf,0xe4,0x6b,0x57,0xb3,0x9d,0x82,0x9c,0x48,0xc5,0x9f, // 0000bbe0 |.......kW....H..|
+0x41,0xea,0xdd,0xfb,0xfb,0xc1,0xa6,0x15,0x11,0xea,0x8a,0x63,0xdd,0x14,0xa0,0x6b, // 0000bbf0 |A..........c...k|
+0xaf,0xe6,0xa3,0x5a,0xf2,0xa8,0xb1,0xb0,0x3c,0xeb,0x3e,0x98,0x9a,0xf0,0x21,0x2d, // 0000bc00 |...Z....<.>...!-|
+0x97,0x0f,0xa0,0xf3,0x1e,0xf1,0x98,0x16,0x05,0x3c,0x35,0x60,0xb8,0x30,0x5e,0xc8, // 0000bc10 |.........<5`.0^.|
+0x7e,0x0c,0xf3,0xec,0xeb,0x49,0xda,0xd4,0xfe,0x3c,0xf9,0xd2,0x6a,0xf0,0xac,0xd1, // 0000bc20 |~....I...<..j...|
+0xcb,0x44,0x8d,0x61,0xd5,0x43,0x0e,0xbd,0xcb,0x44,0xdb,0x9d,0x17,0xb5,0xba,0x62, // 0000bc30 |.D.a.C...D.....b|
+0x9f,0x67,0xb4,0x22,0x87,0x3f,0x81,0x65,0x00,0x5a,0x94,0x74,0x15,0x17,0x89,0x85, // 0000bc40 |.g.".?.e.Z.t....|
+0x09,0xb7,0x9d,0x8d,0x94,0x53,0x40,0x01,0xf0,0x88,0xeb,0x49,0x2e,0xd4,0x44,0x7f, // 0000bc50 |.....S@....I..D.|
+0x79,0x30,0x29,0x63,0x0e,0x70,0x30,0x43,0x6f,0x75,0x89,0xb4,0xa9,0xf4,0xc2,0x69, // 0000bc60 |y0)c.p0Cou.....i|
+0x92,0x2d,0xea,0xb5,0xaf,0x34,0xde,0x35,0x8b,0x47,0xd9,0x2d,0x43,0x40,0xe7,0x76, // 0000bc70 |.-...4.5.G.-C@.v|
+0xb3,0xf7,0x32,0xf5,0xb9,0x7b,0x9f,0x4d,0x4b,0x88,0x8a,0x33,0xc8,0xb5,0xee,0x44, // 0000bc80 |..2..{.MK..3...D|
+0xdf,0x08,0xb8,0x1e,0x48,0xf9,0xb9,0x44,0x02,0x6b,0x83,0x8e,0xcd,0xb3,0xb5,0xc1, // 0000bc90 |....H..D.k......|
+0xdf,0x45,0xff,0x66,0x5f,0x32,0x65,0x6b,0x86,0x47,0x73,0x7c,0xf6,0x62,0x19,0x2f, // 0000bca0 |.E.f_2ek.Gs|.b./|
+0xd5,0xb6,0x1a,0x0c,0xd7,0x38,0x03,0x82,0x70,0xd8,0x22,0xff,0xae,0x9d,0xbc,0xb1, // 0000bcb0 |.....8..p.".....|
+0x11,0x69,0x88,0x6e,0x41,0xb8,0xe0,0xf8,0xfa,0xf0,0x09,0x71,0x88,0x7f,0x4c,0x03, // 0000bcc0 |.i.nA......q..L.|
+0x7b,0x21,0x52,0x06,0xe5,0x60,0x85,0x6b,0xf7,0xc2,0x7a,0xbf,0xdb,0x8d,0xc6,0xe4, // 0000bcd0 |{!R..`.k..z.....|
+0xa6,0x47,0xed,0x69,0x0d,0x93,0xbe,0x08,0xd9,0xfa,0xef,0x7c,0x4f,0xbd,0x7e,0xb2, // 0000bce0 |.G.i.......|O.~.|
+0xcd,0x6f,0xbc,0x21,0xea,0xbe,0xec,0xc2,0x7f,0x83,0xeb,0xda,0x78,0xc1,0x7f,0xf2, // 0000bcf0 |.o.!........x...|
+0x7b,0x72,0xad,0xb0,0x4f,0xeb,0x8a,0xa2,0xb1,0xbe,0xc5,0xf9,0x91,0xdd,0x3f,0x95, // 0000bd00 |{r..O.........?.|
+0x1f,0x22,0x44,0x09,0xc5,0xdc,0xd0,0x8f,0xb0,0xd4,0x48,0x3e,0xc7,0x4c,0x03,0x17, // 0000bd10 |."D.......H>.L..|
+0xc6,0xd9,0x8a,0x8b,0x05,0x1d,0x39,0x3e,0xb2,0x71,0x9e,0xef,0xe6,0xa6,0xa9,0xbb, // 0000bd20 |......9>.q......|
+0xda,0x9a,0xa9,0x52,0x07,0xa3,0xaf,0x1c,0x4a,0x2a,0x2b,0x07,0x7a,0xcc,0x25,0x9b, // 0000bd30 |...R....J*+.z.%.|
+0x0c,0x53,0xaa,0x15,0x2e,0xac,0x38,0x46,0xbc,0x50,0xff,0x3b,0xd4,0xa1,0x83,0xff, // 0000bd40 |.S....8F.P.;....|
+0x47,0x9b,0x18,0x04,0x55,0x18,0x9f,0xc7,0xda,0xdc,0x19,0x17,0x4c,0xe0,0xda,0xc2, // 0000bd50 |G...U.......L...|
+0x30,0x0f,0x3c,0x68,0xef,0x3e,0x98,0x84,0x90,0x77,0x40,0x49,0xd0,0x6b,0x34,0x35, // 0000bd60 |0.<h.>...w@I.k45|
+0xdf,0x8d,0xac,0x73,0x20,0x9d,0xb6,0x76,0x75,0xdd,0x95,0x4a,0xf8,0x6c,0xc5,0xbc, // 0000bd70 |...s ..vu..J.l..|
+0x9f,0xa5,0xb3,0xaf,0xad,0x88,0xfc,0xe9,0xbb,0x84,0xd6,0xb8,0xc7,0x5b,0x8c,0x21, // 0000bd80 |.............[.!|
+0x31,0xd2,0x05,0x6a,0x68,0x21,0xb8,0x18,0x42,0x39,0x66,0xbf,0xe1,0xf2,0x5a,0xc5, // 0000bd90 |1..jh!..B9f...Z.|
+0xfc,0x74,0xc2,0xa3,0x8f,0x2e,0x8d,0xc0,0x47,0xcc,0x37,0xe3,0xc3,0xc7,0x9e,0xf2, // 0000bda0 |.t......G.7.....|
+0xff,0x0b,0xc4,0x54,0x42,0x86,0x2e,0x3a,0x4c,0xeb,0x3b,0xba,0x67,0xc5,0x52,0xb6, // 0000bdb0 |...TB..:L.;.g.R.|
+0x1c,0xc0,0x0d,0xd2,0xb0,0x6a,0x1e,0x27,0xdc,0x72,0x66,0x5d,0x20,0xf8,0xa5,0x2e, // 0000bdc0 |.....j.'.rf] ...|
+0x07,0xc7,0xcc,0xb2,0x59,0x1e,0x59,0x54,0x3c,0xfb,0xd3,0xca,0x99,0xe9,0x49,0xca, // 0000bdd0 |....Y.YT<.....I.|
+0x04,0x7e,0xbf,0x5e,0xd2,0x96,0x85,0x0b,0x97,0xc9,0xf6,0x3c,0xbc,0xa2,0xad,0x52, // 0000bde0 |.~.^.......<...R|
+0x57,0xe7,0x64,0xb2,0xf4,0xe7,0x19,0x72,0x08,0x61,0xaf,0xeb,0xbd,0xc0,0x24,0xbc, // 0000bdf0 |W.d....r.a....$.|
+0x71,0xd6,0x19,0xcf,0xe7,0x5a,0x30,0x75,0x7d,0x5f,0x87,0x6a,0x21,0x81,0xa7,0x41, // 0000be00 |q....Z0u}_.j!..A|
+0xa0,0x64,0xb4,0x58,0x8e,0xf1,0x8a,0xda,0xda,0xb6,0x2e,0xd2,0xc9,0x94,0x98,0x17, // 0000be10 |.d.X............|
+0x59,0x23,0x69,0x8a,0x96,0x68,0x96,0xc6,0x39,0x10,0x19,0x5d,0x24,0x5c,0x52,0xa8, // 0000be20 |Y#i..h..9..]$\R.|
+0xb6,0x18,0x33,0xc6,0xa1,0x0a,0x30,0x21,0xba,0x65,0xf1,0x92,0xda,0x8e,0x31,0x52, // 0000be30 |..3...0!.e....1R|
+0x4f,0x25,0x13,0xad,0xa2,0x88,0x30,0xe2,0xee,0x7a,0x12,0x75,0x0f,0x1b,0xb7,0x50, // 0000be40 |O%....0..z.u...P|
+0x09,0xbe,0x3c,0x07,0x88,0x2b,0x8c,0x1a,0x69,0x47,0x13,0xdc,0x99,0xc8,0xf9,0xe9, // 0000be50 |..<..+..iG......|
+0xa3,0x80,0xad,0x17,0x8d,0x4e,0x5a,0x2c,0x67,0xd5,0xe4,0x52,0x88,0x5d,0xfc,0x6a, // 0000be60 |.....NZ,g..R.].j|
+0x80,0xc4,0x07,0x54,0x0c,0x7b,0x75,0x96,0x38,0x10,0xa5,0xf9,0x08,0x61,0x86,0x79, // 0000be70 |...T.{u.8....a.y|
+0x40,0x1b,0xef,0x91,0xfd,0x1d,0x0b,0x67,0xca,0x58,0xa3,0x9e,0x15,0x85,0x29,0x2f, // 0000be80 |@......g.X....)/|
+0xf1,0x34,0x5d,0xef,0xc5,0xad,0x51,0xd1,0x1b,0xb1,0xbf,0x0f,0x0c,0x6d,0xff,0xd1, // 0000be90 |.4]...Q......m..|
+0xd4,0x8e,0xb4,0x8b,0x09,0x4f,0x88,0xd3,0xb7,0x70,0x25,0xcc,0x2a,0x8f,0x1f,0xe4, // 0000bea0 |.....O...p%.*...|
+0x60,0x1c,0xc6,0x2c,0xc4,0xd7,0x89,0x48,0x99,0x61,0x89,0xd5,0x49,0xa5,0x41,0x5b, // 0000beb0 |`..,...H.a..I.A[|
+0x45,0xb2,0xc8,0x3d,0x71,0x64,0x19,0xe5,0x1f,0x45,0x5d,0xfc,0x98,0x3e,0x56,0x92, // 0000bec0 |E..=qd...E]..>V.|
+0x54,0x1a,0xff,0xc0,0xa2,0xf1,0x48,0x06,0xba,0x74,0x90,0x21,0xfd,0x8d,0x26,0x20, // 0000bed0 |T.....H..t.!..& |
+0x36,0x26,0xaa,0x26,0x89,0xf1,0x17,0xd0,0x92,0xe4,0x33,0x47,0xc6,0x4f,0xaa,0xe5, // 0000bee0 |6&.&......3G.O..|
+0xe2,0xa7,0x12,0xfb,0x98,0xcf,0xc9,0x02,0xa7,0xc5,0x24,0x8d,0xe0,0xad,0xc1,0x56, // 0000bef0 |..........$....V|
+0x22,0xf3,0xed,0xb8,0xda,0xf5,0x3e,0xda,0x74,0xa1,0x5d,0x53,0xc2,0xfc,0x05,0x1f, // 0000bf00 |".....>.t.]S....|
+0x83,0x20,0x0c,0x97,0x53,0xc7,0xab,0xa0,0x29,0xf1,0xeb,0xe6,0x4e,0xe0,0xc4,0xc0, // 0000bf10 |. ..S...)...N...|
+0x7c,0xfd,0x6d,0xf9,0xc3,0x10,0x87,0x3d,0xfc,0xe3,0x1c,0xda,0xa7,0x33,0x58,0xf2, // 0000bf20 ||.m....=.....3X.|
+0xc0,0x3f,0x81,0x29,0x25,0xff,0x8d,0x3a,0x4d,0xb1,0x0a,0xd8,0x8b,0xe3,0xa8,0x09, // 0000bf30 |.?.)%..:M.......|
+0x92,0x9b,0x08,0xf8,0x63,0x62,0x16,0x40,0x95,0x58,0x01,0x24,0x16,0xc8,0x2e,0xb6, // 0000bf40 |....cb.@.X.$....|
+0x8d,0x7b,0xbc,0x7d,0xa4,0x74,0xd5,0xe8,0x01,0x18,0x4d,0x0d,0xa1,0x87,0x80,0x67, // 0000bf50 |.{.}.t....M....g|
+0xa5,0x48,0x98,0xe3,0x05,0x71,0x7a,0x59,0x79,0xaa,0xd0,0x91,0x7b,0xc6,0xce,0xb1, // 0000bf60 |.H...qzYy...{...|
+0xa8,0xd5,0xca,0x23,0x2b,0x75,0x9d,0x12,0xcc,0x28,0x5a,0x64,0x5e,0xe0,0x3f,0x46, // 0000bf70 |...#+u...(Zd^.?F|
+0x29,0xc2,0xc8,0x92,0xd8,0xa2,0x6a,0xab,0x08,0xf2,0x2a,0xa2,0x3a,0x83,0x2c,0x7d, // 0000bf80 |).....j...*.:.,}|
+0x7d,0xbe,0x33,0xab,0x8e,0x20,0xc4,0xb8,0x33,0xa4,0x82,0xc3,0x45,0x4e,0xa5,0xb7, // 0000bf90 |}.3.. ..3...EN..|
+0xae,0xb0,0x95,0xc5,0x7b,0x2c,0x37,0x5d,0x6b,0x7e,0x8d,0x19,0x38,0x54,0xbb,0xc5, // 0000bfa0 |....{,7]k~..8T..|
+0x16,0x03,0x5f,0xcb,0x5c,0x1d,0x81,0x40,0x5b,0x9a,0xa3,0x1d,0xcf,0x91,0xde,0x9a, // 0000bfb0 |.._.\..@[.......|
+0x35,0xf3,0xeb,0x49,0xd3,0x87,0xd3,0x13,0x6c,0x99,0xe3,0x09,0x86,0xcd,0x70,0xe2, // 0000bfc0 |5..I....l.....p.|
+0x73,0x0f,0xa1,0x63,0x20,0x13,0x91,0xcb,0x82,0xe9,0x2e,0x61,0xb5,0xf5,0x3b,0x83, // 0000bfd0 |s..c ......a..;.|
+0x9e,0x01,0x48,0x4b,0x5b,0x4d,0x58,0xe4,0x60,0x78,0x32,0xc9,0xc9,0xd5,0xc0,0xdd, // 0000bfe0 |..HK[MX.`x2.....|
+0x2f,0x3e,0x9c,0x80,0xce,0xd0,0x32,0x50,0x35,0xe0,0x0f,0xb7,0x06,0x09,0xa4,0xf1, // 0000bff0 |/>....2P5.......|
+0x32,0x3a,0x13,0x92,0x20,0xa8,0x67,0xfc,0x19,0xdb,0x41,0x7c,0x34,0x3f,0x0f,0x60, // 0000c000 |2:.. .g...A|4?.`|
+0x27,0xf3,0xe8,0xb6,0x43,0x59,0x34,0xfe,0x2d,0xa5,0x53,0x97,0x46,0x05,0x92,0xea, // 0000c010 |'...CY4.-.S.F...|
+0x89,0xa5,0x7e,0xdb,0x04,0x8e,0xfb,0x80,0x13,0xa3,0x57,0x4d,0xfe,0xe8,0xa3,0xb0, // 0000c020 |..~.......WM....|
+0xc0,0x95,0xa3,0x86,0xca,0x43,0x8c,0x9a,0x4c,0x66,0x29,0x88,0xe8,0xab,0xb4,0x98, // 0000c030 |.....C..Lf).....|
+0x4e,0xe7,0x52,0xd8,0xab,0x46,0xe3,0x9c,0x00,0x3e,0xb1,0x53,0xbf,0xd5,0x66,0x90, // 0000c040 |N.R..F...>.S..f.|
+0xbe,0x09,0xd1,0xfe,0x33,0x78,0x5a,0xe8,0x84,0xa3,0xdc,0xbf,0x92,0xff,0x10,0x58, // 0000c050 |....3xZ........X|
+0xe8,0x0c,0xc3,0xe2,0xa9,0xad,0x3d,0x21,0x81,0x8d,0x2b,0x67,0xb5,0x1d,0x16,0x52, // 0000c060 |......=!..+g...R|
+0x32,0xa8,0x84,0x6b,0x1e,0xac,0x92,0xce,0x1c,0xeb,0x34,0xd5,0x7f,0xc9,0xd8,0x46, // 0000c070 |2..k......4....F|
+0xd9,0x51,0x05,0x38,0xf6,0xcf,0xed,0x39,0xaa,0xdc,0xda,0x52,0x09,0xfa,0xe9,0xaf, // 0000c080 |.Q.8...9...R....|
+0xab,0x65,0x45,0x1a,0xe1,0x4b,0x41,0x96,0x5f,0x02,0xe0,0x99,0x01,0xaf,0x6b,0xf2, // 0000c090 |.eE..KA._.....k.|
+0x15,0xdb,0x49,0xa5,0xb5,0x11,0xea,0x74,0xb2,0xc9,0x01,0x88,0xb9,0x50,0x2e,0xe8, // 0000c0a0 |..I....t.....P..|
+0xb7,0xf0,0xe7,0x58,0xce,0x83,0x12,0x74,0xa0,0xbc,0xf4,0x3f,0x5f,0x4d,0x1b,0xed, // 0000c0b0 |...X...t...?_M..|
+0xcc,0xf4,0xf0,0x56,0x52,0x9c,0xde,0x53,0x63,0xde,0xf9,0x1d,0x14,0x89,0xb3,0x5f, // 0000c0c0 |...VR..Sc......_|
+0x09,0xc6,0x1f,0x55,0x48,0xea,0x99,0x3c,0xaa,0x3f,0x0c,0xe8,0x3b,0x80,0xf8,0x62, // 0000c0d0 |...UH..<.?..;..b|
+0x4a,0x5f,0x5a,0xcb,0xbe,0x9c,0xd9,0x21,0xd0,0x01,0x85,0x05,0x52,0x42,0x0e,0xe7, // 0000c0e0 |J_Z....!....RB..|
+0x0f,0xf9,0x1a,0xcc,0xb7,0x24,0xb0,0x79,0x82,0x66,0xe6,0x06,0x28,0x35,0x04,0xb6, // 0000c0f0 |.....$.y.f..(5..|
+0x72,0x1b,0xb1,0xe6,0xeb,0x7c,0xbc,0x4c,0xc1,0x5f,0xed,0xf6,0x41,0x3d,0xa7,0x11, // 0000c100 |r....|.L._..A=..|
+0x8b,0xc3,0x8b,0x98,0x74,0x2d,0xeb,0xf9,0xdc,0x86,0x95,0x8b,0x73,0xaa,0x4b,0xf8, // 0000c110 |....t-......s.K.|
+0xdd,0x62,0x76,0x5a,0x37,0xa0,0x59,0x2c,0x86,0x96,0x5b,0x95,0x27,0x03,0x53,0xe1, // 0000c120 |.bvZ7.Y,..[.'.S.|
+0xba,0x12,0x88,0x09,0x38,0xcf,0x1c,0x3e,0xec,0x99,0x8a,0x09,0xda,0x84,0x7a,0xec, // 0000c130 |....8..>......z.|
+0x82,0xcc,0x83,0xcb,0xbe,0xca,0xaa,0xb1,0xee,0x14,0x79,0xbf,0x2c,0x2e,0xf6,0x1a, // 0000c140 |..........y.,...|
+0x73,0xde,0x13,0x8e,0x16,0x12,0x34,0x4b,0x29,0x07,0x34,0xc4,0x74,0x39,0x1d,0x26, // 0000c150 |s.....4K).4.t9.&|
+0x53,0x45,0x94,0x3e,0x55,0xf6,0x78,0xed,0x67,0xd7,0xb2,0x67,0xc6,0xe8,0xda,0x29, // 0000c160 |SE.>U.x.g..g...)|
+0xe0,0x94,0xd1,0x83,0x39,0xef,0x51,0x63,0x96,0x10,0x3d,0x14,0x40,0x1c,0xc4,0x64, // 0000c170 |....9.Qc..=.@..d|
+0x9b,0x4d,0x5f,0xb4,0x0f,0x4f,0xd4,0x89,0xf2,0x49,0x60,0x73,0x85,0xdf,0x74,0xa7, // 0000c180 |.M_..O...I`s..t.|
+0xd4,0xbc,0x61,0x0b,0x51,0xfa,0x9d,0x91,0x43,0xb3,0x1f,0xee,0xdf,0x7d,0x45,0x24, // 0000c190 |..a.Q...C....}E$|
+0x05,0x8d,0xe8,0x21,0x30,0x8b,0x4c,0x81,0x11,0xb0,0x0d,0x53,0x00,0xda,0x35,0x22, // 0000c1a0 |...!0.L....S..5"|
+0x41,0xda,0xd3,0x21,0xca,0x71,0x1d,0xa1,0xf0,0x5d,0x2a,0x03,0x39,0x71,0xae,0x31, // 0000c1b0 |A..!.q...]*.9q.1|
+0xbd,0xc4,0x3d,0x59,0x8d,0xc3,0xae,0x82,0x23,0xe4,0xc5,0x6e,0x10,0x57,0xb0,0x9d, // 0000c1c0 |..=Y....#..n.W..|
+0x1e,0xd5,0xf0,0xa7,0x8f,0xf4,0xd0,0xe5,0x97,0xe2,0x6a,0x38,0x90,0x91,0xb7,0xe0, // 0000c1d0 |..........j8....|
+0xde,0x61,0xa5,0xe2,0x79,0x50,0x41,0xfe,0xa2,0x78,0xf1,0xb9,0x9a,0x30,0x5c,0x93, // 0000c1e0 |.a..yPA..x...0\.|
+0xc5,0x44,0x52,0xd2,0x0e,0x40,0x24,0xf2,0x92,0x30,0xe1,0xd4,0x24,0x1c,0x79,0x4c, // 0000c1f0 |.DR..@$..0..$.yL|
+0x1b,0xd6,0x3a,0x79,0x6e,0xe8,0x57,0xd7,0xa3,0xc4,0x1b,0x15,0xd3,0x59,0x4b,0x45, // 0000c200 |..:yn.W......YKE|
+0x0f,0x6d,0xe1,0x94,0x91,0x0a,0x99,0xe3,0x12,0xac,0xc8,0x3f,0x90,0xe3,0x5c,0x3b, // 0000c210 |.m.........?..\;|
+0xe3,0xe0,0x24,0xb1,0xcb,0xcd,0xcb,0x0a,0x81,0x7b,0x9a,0x32,0x65,0x72,0xfb,0x7f, // 0000c220 |..$......{.2er..|
+0xd1,0x52,0x0f,0xc0,0x5a,0x96,0x46,0xd2,0x23,0x9e,0x8c,0x05,0x3c,0xef,0x07,0x0e, // 0000c230 |.R..Z.F.#...<...|
+0xdd,0xef,0x4b,0xc2,0xed,0x5b,0xd2,0xac,0x62,0xa5,0x33,0x9d,0xae,0x56,0x43,0xd9, // 0000c240 |..K..[..b.3..VC.|
+0xfa,0xbe,0x1f,0x80,0x14,0xbb,0x16,0x43,0x87,0x31,0x4a,0xeb,0x46,0x76,0x7b,0x3a, // 0000c250 |.......C.1J.Fv{:|
+0xcb,0xe8,0xe0,0x7a,0xf8,0x41,0x50,0x43,0xa4,0x89,0x27,0x4a,0x85,0x95,0x86,0x19, // 0000c260 |...z.APC..'J....|
+0x10,0x20,0xc7,0xe1,0xd1,0xfd,0x9c,0x2d,0x80,0x06,0x83,0x3b,0x27,0x84,0x43,0xe3, // 0000c270 |. .....-...;'.C.|
+0xda,0xf9,0x38,0xbe,0x42,0xca,0x6a,0x5f,0x14,0x3a,0x3e,0x92,0x2d,0xe3,0xcc,0xa0, // 0000c280 |..8.B.j_.:>.-...|
+0x8a,0x2e,0x19,0x9d,0xb2,0x55,0xfd,0xad,0x00,0x58,0x36,0x0d,0x37,0x00,0x5e,0x3f, // 0000c290 |.....U...X6.7.^?|
+0x1d,0x00,0xf0,0x5e,0x89,0x36,0xfa,0x01,0xa3,0x4e,0xc6,0x99,0xeb,0xe9,0xa3,0x5e, // 0000c2a0 |...^.6...N.....^|
+0x10,0xe4,0x46,0x32,0x08,0x57,0x07,0xdd,0x26,0xff,0xe9,0x9e,0xc5,0xf3,0x25,0xc4, // 0000c2b0 |..F2.W..&.....%.|
+0x21,0x1b,0x0b,0x29,0x7a,0x05,0xc7,0x50,0xc9,0xd5,0x58,0x4a,0x03,0xe6,0x31,0xc8, // 0000c2c0 |!..)z..P..XJ..1.|
+0xe0,0xc2,0x2e,0x95,0x8c,0xe9,0x93,0x5f,0xf1,0x90,0xc2,0xcb,0x82,0xbc,0xae,0x2d, // 0000c2d0 |......._.......-|
+0x9b,0x47,0x72,0x67,0x54,0x3a,0xb3,0xc9,0x3d,0x79,0x50,0xfe,0x10,0x85,0xac,0x43, // 0000c2e0 |.GrgT:..=yP....C|
+0xbc,0xa2,0xba,0x0e,0x3f,0x00,0x90,0x97,0x58,0xcd,0x17,0xa2,0xfb,0x5a,0x38,0x52, // 0000c2f0 |....?...X....Z8R|
+0xa4,0xda,0xa9,0xc5,0x51,0x3c,0x14,0x86,0xeb,0x18,0xba,0xdd,0xe8,0x41,0x59,0x6e, // 0000c300 |....Q<.......AYn|
+0x93,0xde,0x59,0x72,0xb9,0xa7,0x54,0xd3,0xfb,0xd9,0x1b,0xf8,0xdc,0xfd,0xab,0xed, // 0000c310 |..Yr..T.........|
+0xce,0xc8,0xe2,0xc9,0xb1,0xc0,0x87,0xfa,0x35,0xfa,0x32,0x2b,0x6a,0x0b,0xb2,0xc7, // 0000c320 |........5.2+j...|
+0xf1,0x3a,0xbb,0xe1,0xbf,0x7c,0x09,0xb7,0x07,0xd0,0xb0,0x9d,0x2d,0x56,0x85,0x9f, // 0000c330 |.:...|......-V..|
+0x25,0xc4,0xc0,0x87,0x27,0x14,0x56,0x58,0xce,0x78,0x30,0xee,0xb1,0xb0,0x46,0x50, // 0000c340 |%...'.VX.x0...FP|
+0x7f,0x75,0xe2,0x18,0xc1,0x16,0x0a,0x6b,0xbf,0xb6,0x50,0xed,0xb3,0xd5,0xa0,0x59, // 0000c350 |.u.....k..P....Y|
+0x6d,0xb1,0xf7,0x6d,0xab,0xf7,0x52,0x8c,0xae,0xe0,0xa3,0xf6,0x9f,0xc7,0xb0,0x99, // 0000c360 |m..m..R.........|
+0x83,0x07,0x66,0xea,0xe7,0x5b,0xbd,0x2d,0x51,0xa7,0x51,0x0d,0xa2,0xee,0xbe,0xd4, // 0000c370 |..f..[.-Q.Q.....|
+0xac,0x08,0x59,0x9d,0x8f,0xa0,0xef,0x66,0x1d,0xc6,0x5a,0xcd,0xd1,0x6b,0x25,0x76, // 0000c380 |..Y....f..Z..k%v|
+0x02,0xeb,0x97,0x04,0x76,0xa3,0xcd,0x63,0x40,0x54,0xa2,0xcf,0x23,0xe8,0x8b,0x10, // 0000c390 |....v..c@T..#...|
+0x5a,0x0b,0x3d,0x13,0x78,0x66,0x2b,0x98,0x53,0x76,0x44,0x44,0xe1,0xa0,0x45,0x8f, // 0000c3a0 |Z.=.xf+.SvDD..E.|
+0xb3,0xbe,0x71,0xa9,0xb5,0x9a,0x79,0x95,0x6f,0x82,0xc1,0x64,0xc4,0x3a,0xc9,0xe6, // 0000c3b0 |..q...y.o..d.:..|
+0xa4,0x36,0x63,0xdb,0xbb,0xea,0x84,0x6d,0x7f,0x2f,0xb9,0xe4,0x1a,0x91,0xc3,0xd1, // 0000c3c0 |.6c....m./......|
+0xf8,0xf0,0x46,0x6d,0xc9,0x62,0x25,0xfd,0x74,0xe8,0x28,0x69,0xd1,0xd2,0x54,0x24, // 0000c3d0 |..Fm.b%.t.(i..T$|
+0xe3,0xf6,0x68,0xf3,0x11,0x69,0xc7,0x56,0x97,0x66,0x5a,0xb2,0x53,0x09,0x4e,0x2f, // 0000c3e0 |..h..i.V.fZ.S.N/|
+0x72,0x5a,0xa3,0x90,0xa6,0xe2,0xec,0x1f,0x49,0x26,0x83,0x4f,0x1e,0x1c,0x10,0xf5, // 0000c3f0 |rZ......I&.O....|
+0x82,0x96,0x4e,0xf9,0x24,0xb4,0x39,0x9d,0x6e,0xf4,0x9b,0x6d,0xd0,0x38,0x97,0xb3, // 0000c400 |..N.$.9.n..m.8..|
+0x44,0xfb,0x50,0x1a,0xb0,0xd1,0xb9,0xbc,0x9c,0x67,0x9c,0x12,0x76,0x5a,0xbd,0xd4, // 0000c410 |D.P......g..vZ..|
+0x3e,0x18,0x48,0xca,0x45,0x86,0x2f,0x9d,0xc4,0x12,0xa9,0xa1,0x9b,0x3b,0x81,0x4f, // 0000c420 |>.H.E./......;.O|
+0x86,0xa2,0x7f,0x76,0xc1,0x24,0x37,0x93,0x7f,0x8b,0xa1,0x7b,0xa7,0x04,0x35,0x0d, // 0000c430 |...v.$7....{..5.|
+0xb9,0xd4,0x9d,0xd2,0x04,0xe4,0xa5,0x71,0xc6,0xee,0xdf,0x8c,0x2e,0x86,0x74,0x39, // 0000c440 |.......q......t9|
+0xe2,0x32,0xaa,0xa3,0xfd,0x81,0xad,0xf1,0x17,0x7e,0xd8,0x60,0xc1,0x4f,0x33,0x36, // 0000c450 |.2.......~.`.O36|
+0x29,0x05,0x7a,0x6c,0xd0,0x42,0x5b,0xed,0xc9,0x94,0x64,0x5b,0x15,0xd7,0x43,0x53, // 0000c460 |).zl.B[...d[..CS|
+0x09,0x53,0x7a,0x91,0x87,0xf1,0xc9,0x2c,0x83,0x1a,0x39,0xc9,0xc7,0x93,0x2b,0x9d, // 0000c470 |.Sz....,..9...+.|
+0x57,0x9d,0x45,0xec,0x93,0xa7,0xdf,0xb2,0x82,0x87,0x6e,0x97,0x79,0x55,0x3e,0x66, // 0000c480 |W.E.......n.yU>f|
+0x53,0x16,0x36,0x91,0xd0,0x6d,0x2c,0x0e,0xdc,0x89,0x20,0x67,0x48,0x1d,0xd0,0x98, // 0000c490 |S.6..m,... gH...|
+0x16,0x88,0xe3,0xeb,0x62,0x0f,0x65,0x95,0x75,0x5f,0x03,0x20,0x80,0xaa,0x79,0x29, // 0000c4a0 |....b.e.u_. ..y)|
+0x8c,0xad,0xe8,0x41,0x25,0xee,0xdf,0x9f,0x48,0xe6,0x1c,0x44,0xb7,0x87,0x5c,0xd1, // 0000c4b0 |...A%...H..D..\.|
+0x42,0x5e,0xb6,0x34,0x10,0xe2,0xf9,0x2d,0xc5,0x59,0x93,0x90,0xe5,0x86,0xa8,0x69, // 0000c4c0 |B^.4...-.Y.....i|
+0xb2,0x30,0x64,0x95,0x3e,0x96,0x21,0xe7,0xd8,0x01,0x43,0xbc,0xde,0x44,0x55,0x48, // 0000c4d0 |.0d.>.!...C..DUH|
+0x6b,0x45,0x64,0xae,0xd6,0xcf,0xcb,0x16,0x2c,0xfb,0xf8,0x78,0xbb,0x30,0xcd,0xba, // 0000c4e0 |kEd.....,..x.0..|
+0xb1,0x41,0x41,0xe5,0x94,0xa0,0x23,0x1c,0xcd,0xa6,0x8d,0x6a,0xed,0xf0,0xdb,0x74, // 0000c4f0 |.AA...#....j...t|
+0x12,0x41,0xba,0xc2,0x5b,0xb2,0xa8,0x4b,0x8f,0x92,0xd6,0x0f,0x50,0xa7,0x21,0xbc, // 0000c500 |.A..[..K....P.!.|
+0x87,0x9b,0x04,0x92,0x71,0xe8,0x1a,0x24,0x97,0x49,0x67,0x6b,0xd4,0xcd,0xeb,0x5b, // 0000c510 |....q..$.Igk...[|
+0x44,0x27,0x2d,0x30,0x3b,0x69,0xd2,0x26,0xaf,0xaa,0xb0,0x8c,0x46,0x08,0x81,0xdf, // 0000c520 |D'-0;i.&....F...|
+0x43,0xf1,0xfa,0x58,0x9b,0xcb,0xed,0xc4,0x09,0x0d,0x6f,0x23,0x40,0xb8,0x98,0x01, // 0000c530 |C..X......o#@...|
+0xde,0xe0,0x7c,0xcb,0xf4,0xd0,0x22,0x7d,0x10,0x10,0xdd,0xb5,0x8a,0xdd,0x7b,0xfe, // 0000c540 |..|..."}......{.|
+0x27,0xff,0xac,0x26,0x68,0x04,0x97,0x32,0xf4,0x98,0x28,0x4a,0x40,0xa2,0x76,0x19, // 0000c550 |'..&h..2..(J@.v.|
+0x5b,0x00,0xe1,0xb0,0xab,0x05,0xf3,0x00,0xf8,0x69,0xd4,0x48,0xa3,0xb4,0x1f,0x79, // 0000c560 |[........i.H...y|
+0x82,0xb4,0x78,0xd7,0x9d,0x7a,0x9d,0xb2,0xa3,0xbf,0x98,0xd7,0xc3,0x5f,0xce,0x89, // 0000c570 |..x..z......._..|
+0x4a,0xf6,0x19,0x6e,0x67,0x68,0xe4,0x32,0x3c,0x12,0x2b,0xc2,0xd8,0x14,0xb3,0x6e, // 0000c580 |J..ngh.2<.+....n|
+0x88,0xe0,0x90,0x00,0x6d,0x0e,0xb7,0x80,0x72,0x31,0xef,0xa7,0x50,0x10,0xb4,0x9f, // 0000c590 |....m...r1..P...|
+0x8a,0x62,0x8e,0x92,0x47,0x76,0x2d,0x5f,0x5f,0x8f,0x92,0x56,0xa0,0x8b,0x47,0x28, // 0000c5a0 |.b..Gv-__..V..G(|
+0x9c,0x95,0xcb,0x02,0x09,0xef,0x16,0xb8,0xda,0x81,0x64,0x0c,0x5c,0x76,0xdd,0x64, // 0000c5b0 |..........d.\v.d|
+0x07,0x56,0x32,0xa4,0xa1,0x48,0x44,0x66,0xe4,0x4d,0x9c,0x29,0x98,0xe9,0xb3,0x0d, // 0000c5c0 |.V2..HDf.M.)....|
+0x7e,0x86,0xf9,0xab,0x81,0x81,0xb1,0xd2,0xa1,0x99,0xc1,0xc8,0xa5,0x31,0x8c,0x2d, // 0000c5d0 |~............1.-|
+0x56,0x36,0xae,0x35,0x6c,0x15,0x25,0x8f,0x2d,0x89,0xf6,0x72,0xf0,0x22,0x54,0x65, // 0000c5e0 |V6.5l.%.-..r."Te|
+0xe5,0xf0,0xf7,0x6b,0x3f,0xf9,0xae,0x81,0x85,0x10,0xec,0x0a,0x73,0x29,0xb0,0xe6, // 0000c5f0 |...k?.......s)..|
+0xc8,0x07,0x18,0x6f,0x0a,0xec,0x24,0x73,0x9b,0xe6,0x0f,0x79,0x63,0x44,0x83,0xaf, // 0000c600 |...o..$s...ycD..|
+0x57,0xc7,0x0e,0xfe,0x5c,0x78,0x9b,0xd7,0xa8,0x5f,0xb8,0x5b,0xc4,0xdf,0xed,0x8f, // 0000c610 |W...\x..._.[....|
+0xd6,0x75,0x49,0xa5,0xa8,0x50,0xb5,0x31,0xd7,0xf2,0x11,0xa1,0x1f,0xe6,0xbe,0x19, // 0000c620 |.uI..P.1........|
+0xa3,0xe0,0xfb,0xd1,0xae,0xb7,0xc2,0x00,0xf4,0x00,0x8d,0x71,0xa1,0x69,0x35,0x3a, // 0000c630 |...........q.i5:|
+0x85,0xd7,0x37,0x59,0x2d,0x7c,0x84,0xd4,0x40,0x09,0x0b,0xaa,0x07,0x70,0xf9,0xac, // 0000c640 |..7Y-|..@....p..|
+0xab,0x31,0xf2,0x50,0x97,0x65,0xd5,0xd4,0xf6,0xa8,0xee,0xee,0x09,0x11,0xd7,0x4a, // 0000c650 |.1.P.e.........J|
+0x1d,0x61,0xa9,0x55,0x64,0xea,0xa2,0xfa,0x0b,0x6a,0xe0,0xf2,0x7a,0x30,0x83,0xd1, // 0000c660 |.a.Ud....j..z0..|
+0x9b,0x7f,0x32,0x31,0x3d,0xac,0x6b,0xa0,0x10,0xa8,0x3e,0x1c,0xa3,0xeb,0x84,0xd8, // 0000c670 |..21=.k...>.....|
+0x66,0x6a,0x52,0x1a,0x3b,0x31,0x2e,0x40,0x74,0x9f,0x32,0x15,0xfb,0xb0,0x10,0x85, // 0000c680 |fjR.;1.@t.2.....|
+0x9a,0xd1,0xb6,0x93,0x26,0xe9,0x02,0xd1,0xc0,0x0d,0x9a,0x09,0x68,0x9c,0x35,0x67, // 0000c690 |....&.......h.5g|
+0xff,0x95,0x6c,0xce,0xa9,0x3a,0x8a,0xbb,0x92,0x18,0xc3,0xf4,0xed,0x89,0xdf,0x94, // 0000c6a0 |..l..:..........|
+0x95,0x16,0x78,0xd4,0xa2,0x1a,0x81,0x96,0x92,0x76,0x99,0x18,0x01,0xf0,0xe2,0x02, // 0000c6b0 |..x......v......|
+0xa8,0x40,0x63,0xd6,0x11,0x48,0xde,0x6d,0x20,0xa7,0xd5,0x07,0xc8,0x2f,0x0b,0xc9, // 0000c6c0 |.@c..H.m ..../..|
+0x8d,0x1f,0xfb,0xf1,0x8c,0x68,0x46,0x0f,0xf7,0xe8,0x35,0xbd,0xc3,0xd5,0x3e,0x72, // 0000c6d0 |.....hF...5...>r|
+0xfe,0x75,0x16,0xc9,0x8a,0x7d,0x1b,0x1f,0xfb,0xaf,0x46,0xf6,0x94,0x8e,0x61,0x26, // 0000c6e0 |.u...}....F...a&|
+0x62,0xfd,0x7d,0xfe,0x9e,0x8b,0x69,0x0f,0xcc,0x6a,0xaa,0x80,0x92,0xd1,0xd5,0xa6, // 0000c6f0 |b.}...i..j......|
+0x09,0x34,0x83,0x21,0xaa,0x93,0x29,0x6d,0xa8,0xd7,0xb4,0x84,0x63,0x0e,0xe2,0x53, // 0000c700 |.4.!..)m....c..S|
+0x94,0xf9,0x0f,0xd0,0xa0,0x94,0x3d,0x07,0x5e,0x20,0x79,0x1c,0xb9,0xf4,0x94,0x3e, // 0000c710 |......=.^ y....>|
+0x5e,0x6f,0x25,0xef,0xfc,0x7a,0xf0,0xe7,0xcb,0xa5,0xb3,0xca,0x07,0xb3,0x3e,0x3a, // 0000c720 |^o%..z........>:|
+0x76,0x84,0x01,0xcd,0x5f,0x54,0x9d,0x95,0x07,0xbd,0x23,0xfd,0xf5,0xeb,0x2a,0x44, // 0000c730 |v..._T....#...*D|
+0x54,0xa6,0x84,0x05,0x45,0x4a,0x10,0x62,0x76,0xfd,0x18,0x53,0x75,0xa3,0x00,0x67, // 0000c740 |T...EJ.bv..Su..g|
+0x4f,0xde,0x18,0x90,0x9d,0x71,0xa5,0xc8,0xf9,0x1f,0x5c,0x6a,0xaf,0x12,0xf0,0x9c, // 0000c750 |O....q....\j....|
+0xe1,0xeb,0x4d,0x4c,0x95,0x5b,0xd3,0x35,0x3d,0x7d,0x32,0x4b,0x60,0x24,0xaa,0xbe, // 0000c760 |..ML.[.5=}2K`$..|
+0x47,0xc0,0x1c,0xab,0xa1,0x15,0x93,0xc1,0x13,0xe1,0x52,0x22,0x88,0x9b,0xb7,0x4a, // 0000c770 |G.........R"...J|
+0x18,0x37,0xd1,0xbc,0xf2,0x8a,0xe4,0x0d,0xdc,0xf8,0xd1,0x88,0x69,0xd0,0x80,0x1f, // 0000c780 |.7..........i...|
+0x3d,0x48,0x67,0x6a,0xf7,0x27,0x22,0x14,0x19,0xa9,0x3b,0x2f,0xe4,0x37,0x4e,0xd1, // 0000c790 |=Hgj.'"...;/.7N.|
+0x9e,0x22,0x06,0xb2,0x1b,0x46,0xf7,0xaf,0x2e,0x35,0x18,0xf6,0x62,0x98,0xcd,0xfd, // 0000c7a0 |."...F...5..b...|
+0x01,0x08,0x32,0xe6,0xc4,0x08,0x5b,0x81,0x32,0x10,0xc8,0x51,0x90,0x10,0xc4,0x69, // 0000c7b0 |..2...[.2..Q...i|
+0xac,0xa0,0x7c,0x71,0xcc,0xaf,0x19,0x90,0x21,0xb0,0x1a,0x7c,0xb4,0xbb,0xb1,0xf5, // 0000c7c0 |..|q....!..|....|
+0x86,0xd8,0xbe,0x82,0x82,0x6c,0x2e,0x7c,0xaf,0x42,0x20,0xb0,0x91,0xa3,0xa6,0x49, // 0000c7d0 |.....l.|.B ....I|
+0xb9,0xd5,0xe0,0x25,0xeb,0xd6,0x10,0x8a,0x3f,0x32,0x69,0xab,0x76,0x29,0x27,0xba, // 0000c7e0 |...%....?2i.v)'.|
+0x81,0x07,0x5a,0xa6,0xa5,0x59,0x10,0x61,0x99,0xc2,0x64,0xe7,0x6b,0xce,0xd9,0x6f, // 0000c7f0 |..Z..Y.a..d.k..o|
+0x16,0x26,0x73,0xbc,0x5d,0xaf,0xdc,0x8f,0x73,0xd9,0xfa,0x86,0xc3,0x04,0x16,0xa6, // 0000c800 |.&s.]...s.......|
+0x7c,0x82,0x09,0x5a,0x5f,0xab,0xf7,0x95,0xa8,0xa0,0xd1,0xb7,0xa1,0x32,0xb1,0x25, // 0000c810 ||..Z_........2.%|
+0x15,0x21,0xdf,0x67,0x3d,0xf7,0x70,0xbc,0x97,0xda,0xc7,0xab,0x0d,0x2a,0xe9,0x24, // 0000c820 |.!.g=.p......*.$|
+0xb6,0x28,0xe5,0xbd,0x09,0x7e,0x1b,0xe2,0x70,0x5a,0xdb,0x72,0x45,0x7a,0x58,0x45, // 0000c830 |.(...~..pZ.rEzXE|
+0x6d,0x22,0x41,0xd1,0x25,0x15,0xae,0x22,0x86,0xd4,0x14,0x0b,0xb1,0xf4,0x66,0xce, // 0000c840 |m"A.%.."......f.|
+0xb5,0xa4,0x80,0xba,0x2e,0x9c,0xbe,0xbd,0xd4,0xcd,0xe1,0x73,0x70,0x2a,0x06,0x30, // 0000c850 |...........sp*.0|
+0xd5,0x48,0x43,0x99,0xa6,0xf1,0xa5,0xfe,0x3a,0xa2,0x94,0x4c,0x15,0x04,0x50,0x05, // 0000c860 |.HC.....:..L..P.|
+0x6d,0xca,0xb1,0x80,0x77,0xd4,0x4a,0xc4,0x77,0x7f,0xb1,0xa9,0xc7,0xc6,0x0d,0x1a, // 0000c870 |m...w.J.w.......|
+0xc1,0x97,0x3b,0xb2,0xb1,0xd7,0xd4,0xad,0x2f,0x7d,0x58,0x33,0x99,0x23,0xad,0x90, // 0000c880 |..;...../}X3.#..|
+0xdf,0x71,0x71,0x02,0xdf,0x85,0x1d,0xab,0x4e,0x07,0xd4,0xa6,0xfc,0x77,0x31,0x5c, // 0000c890 |.qq.....N....w1\|
+0x8d,0x25,0x09,0x26,0xcb,0x00,0x61,0xe6,0xb7,0xbb,0xb9,0xfc,0x65,0x55,0x25,0xd8, // 0000c8a0 |.%.&..a.....eU%.|
+0x76,0x1c,0x19,0x5a,0x3b,0x69,0xfb,0x23,0x8d,0x49,0x1b,0x8b,0x77,0xe6,0x2f,0xbd, // 0000c8b0 |v..Z;i.#.I..w./.|
+0x83,0x51,0x47,0x7b,0x09,0xe6,0xb0,0x03,0x79,0xc8,0x40,0x36,0xcc,0x40,0x2e,0x06, // 0000c8c0 |.QG{....y.@6.@..|
+0x8a,0xa4,0x6e,0x59,0x1c,0xa9,0xc4,0x17,0x1b,0xeb,0xa1,0xf3,0xec,0xe4,0x8f,0x2b, // 0000c8d0 |..nY...........+|
+0xc1,0xd3,0xb1,0x55,0xef,0xdc,0x32,0x85,0xaa,0x90,0x7e,0xea,0x07,0x4e,0xd5,0xc7, // 0000c8e0 |...U..2...~..N..|
+0x4b,0xf4,0x2b,0x29,0xec,0x80,0x74,0x67,0x15,0xd0,0xce,0xc3,0x7a,0x9e,0xc3,0xb7, // 0000c8f0 |K.+)..tg....z...|
+0x9b,0x63,0x2e,0x83,0x3a,0x0c,0x0a,0xd5,0xf5,0xdf,0x0f,0x7b,0x5f,0x23,0xb1,0x6f, // 0000c900 |.c..:......{_#.o|
+0x40,0xde,0x42,0x4f,0x1e,0x69,0xcd,0x4e,0xdb,0x06,0x20,0x2b,0xfc,0x1a,0xb2,0x87, // 0000c910 |@.BO.i.N.. +....|
+0xfe,0xc8,0x8a,0xe9,0x4f,0x69,0xea,0x39,0xff,0xe8,0x60,0x00,0x91,0xe2,0x2d,0x66, // 0000c920 |....Oi.9..`...-f|
+0x75,0xff,0xff,0xb6,0xf4,0x97,0xa6,0x73,0x13,0x61,0xf8,0x67,0x1c,0x91,0x63,0x6a, // 0000c930 |u......s.a.g..cj|
+0x38,0x98,0x84,0x52,0x93,0xac,0xb0,0x06,0x85,0xb6,0x03,0x81,0x3c,0xa9,0x58,0xf8, // 0000c940 |8..R........<.X.|
+0x64,0x5a,0x6e,0xcc,0x68,0x67,0xff,0xb1,0x95,0xfa,0x5d,0xe7,0xc8,0x1e,0x7c,0xee, // 0000c950 |dZn.hg....]...|.|
+0xba,0x04,0xaf,0x08,0x44,0x4c,0x8a,0xab,0x04,0x24,0xe0,0x53,0xac,0x60,0x6c,0x70, // 0000c960 |....DL...$.S.`lp|
+0x7e,0x44,0xcd,0xae,0x21,0x8a,0x16,0x74,0x07,0x32,0x94,0x77,0x9c,0x35,0x0e,0x0c, // 0000c970 |~D..!..t.2.w.5..|
+0x44,0x2c,0xab,0x6f,0x7b,0xe6,0x8a,0x19,0xf3,0x66,0xa9,0x99,0x26,0x79,0x83,0xd8, // 0000c980 |D,.o{....f..&y..|
+0x3c,0x3b,0x18,0x07,0x1f,0x91,0x6b,0xa7,0xce,0xf3,0x35,0x23,0x07,0x7a,0xf5,0x88, // 0000c990 |<;....k...5#.z..|
+0x1f,0x4f,0x2a,0x3b,0x17,0x4d,0xe1,0x80,0x68,0x4c,0xd9,0xfb,0x3a,0x25,0x40,0x28, // 0000c9a0 |.O*;.M..hL..:%@(|
+0xd4,0x16,0x20,0x65,0x8e,0xac,0xe4,0x6a,0x3a,0xb1,0x0a,0x40,0xe9,0x9e,0xda,0x5d, // 0000c9b0 |.. e...j:..@...]|
+0xe0,0x18,0x6e,0x3c,0x6a,0x69,0xdb,0xd8,0x3b,0xe9,0x94,0x16,0x6f,0x7c,0x3b,0xcd, // 0000c9c0 |..n<ji..;...o|;.|
+0xfe,0x6d,0x88,0x2f,0x91,0xef,0x8c,0xec,0x20,0x69,0x8f,0xe3,0xa8,0x21,0xa1,0x1a, // 0000c9d0 |.m./.... i...!..|
+0x94,0xd8,0xfb,0x1c,0x78,0xd4,0x29,0x67,0x78,0x3d,0x12,0xe3,0x0c,0x7b,0x63,0xa0, // 0000c9e0 |....x.)gx=...{c.|
+0x4e,0x1c,0xe3,0x77,0xc7,0x66,0xa6,0x67,0x0f,0x37,0x7a,0x50,0x25,0x49,0x4a,0xcb, // 0000c9f0 |N..w.f.g.7zP%IJ.|
+0x3e,0x0d,0x2e,0x4f,0x23,0x12,0xac,0xf9,0xce,0x93,0x96,0x75,0x1b,0xf4,0xbf,0xaf, // 0000ca00 |>..O#......u....|
+0xb2,0x84,0xbd,0xd7,0x25,0x4f,0xcb,0xe0,0xe2,0xad,0xa3,0x81,0x87,0x22,0xf7,0x43, // 0000ca10 |....%O.......".C|
+0x20,0xb4,0xbb,0x41,0x12,0x6c,0xea,0x50,0x8b,0x11,0x79,0x1b,0x1d,0x40,0x3e,0x3c, // 0000ca20 | ..A.l.P..y..@><|
+0xac,0xaf,0xd4,0x30,0xcf,0xa9,0x47,0xe9,0x76,0x53,0x62,0xad,0xf9,0xb8,0x88,0x5f, // 0000ca30 |...0..G.vSb...._|
+0x04,0xf8,0x97,0x5d,0x2e,0x5a,0x8e,0x6a,0xdb,0x5a,0xa0,0x5b,0xeb,0xbb,0x50,0x86, // 0000ca40 |...].Z.j.Z.[..P.|
+0xbf,0xd6,0xfc,0xe8,0x87,0x4c,0xa3,0xc4,0x80,0xc4,0x92,0x1e,0xf3,0x70,0x67,0x93, // 0000ca50 |.....L.......pg.|
+0x94,0xf5,0x7e,0x57,0x6e,0x18,0xdf,0xbe,0x35,0x2c,0x94,0x93,0x91,0x5a,0x67,0xaa, // 0000ca60 |..~Wn...5,...Zg.|
+0x2e,0x7c,0xa6,0x8e,0xa3,0xf6,0x13,0xa7,0xf8,0x17,0x38,0x03,0x58,0x6b,0xee,0x0c, // 0000ca70 |.|........8.Xk..|
+0xeb,0x4b,0x57,0x0e,0x95,0x4b,0x2f,0x94,0x5c,0x5f,0x81,0x25,0xed,0x60,0xe9,0x48, // 0000ca80 |.KW..K/.\_.%.`.H|
+0xb6,0xa5,0xea,0x69,0xba,0x76,0x82,0x08,0x3b,0x4d,0xf3,0x82,0x36,0x5c,0x00,0x11, // 0000ca90 |...i.v..;M..6\..|
+0x60,0x2f,0xc9,0x0f,0x20,0x48,0x4f,0x2b,0x9e,0x9e,0xfa,0x7d,0x78,0xac,0x27,0x08, // 0000caa0 |`/.. HO+...}x.'.|
+0x40,0xf5,0x32,0xe5,0xb2,0xf3,0x4e,0xd1,0x13,0xbb,0x97,0x39,0x3d,0xfd,0xfc,0xa8, // 0000cab0 |@.2...N....9=...|
+0xd9,0x52,0x93,0x3d,0x69,0xd3,0xe2,0xff,0xb4,0xf2,0x8c,0x02,0x21,0x50,0x3d,0xfc, // 0000cac0 |.R.=i.......!P=.|
+0xd2,0x02,0x50,0xe6,0x90,0xf0,0xdc,0x98,0xe2,0x68,0xb5,0xcd,0x23,0xc2,0x6c,0x2f, // 0000cad0 |..P......h..#.l/|
+0x56,0xa4,0x95,0xf6,0x8e,0xb2,0x49,0x8f,0x4e,0x6b,0x00,0x42,0x67,0xa0,0x33,0xcd, // 0000cae0 |V.....I.Nk.Bg.3.|
+0x9a,0x99,0xc8,0x98,0x8f,0x01,0x72,0xca,0x1e,0xf8,0xef,0x1d,0xfe,0x1b,0x83,0x11, // 0000caf0 |......r.........|
+0xff,0x94,0x7e,0x05,0x5a,0xd2,0xf0,0x7b,0x1c,0x8c,0x2f,0x4b,0xa4,0xec,0x18,0x09, // 0000cb00 |..~.Z..{../K....|
+0xaf,0x77,0x00,0x99,0x72,0x1f,0x7e,0x2a,0x55,0x61,0x35,0xc6,0xac,0xb1,0x6c,0x0c, // 0000cb10 |.w..r.~*Ua5...l.|
+0xdc,0x08,0xd3,0x4c,0xad,0x9a,0xdd,0xbf,0x05,0x94,0xb1,0xae,0x0d,0x02,0x9d,0x14, // 0000cb20 |...L............|
+0x08,0x56,0x5a,0x77,0xdf,0x9c,0x04,0x15,0x76,0x87,0xdf,0x1b,0x2b,0x34,0xf3,0x07, // 0000cb30 |.VZw....v...+4..|
+0x5d,0x25,0x5c,0x03,0xec,0x3a,0xbc,0x9b,0x46,0x7b,0x9f,0x15,0x64,0x1d,0x90,0x27, // 0000cb40 |]%\..:..F{..d..'|
+0x34,0x41,0x18,0x81,0x88,0x65,0xbe,0x16,0xdd,0xc0,0x56,0x2c,0x33,0xaa,0x9d,0x9e, // 0000cb50 |4A...e....V,3...|
+0xf7,0x91,0xab,0xf0,0x70,0x8c,0xa2,0x43,0x46,0xec,0xa9,0x5a,0x16,0xc0,0x89,0x8c, // 0000cb60 |....p..CF..Z....|
+0xee,0x32,0x35,0x32,0xff,0x84,0x56,0x44,0xbc,0x19,0xa4,0xdd,0xbf,0x85,0xa0,0x86, // 0000cb70 |.252..VD........|
+0x5e,0xb1,0x9f,0xb1,0x72,0x34,0x85,0x1e,0xb6,0xe5,0x24,0x24,0x6b,0xb2,0xb1,0x7a, // 0000cb80 |^...r4....$$k..z|
+0x90,0x16,0x4c,0x47,0xdb,0x49,0x48,0xc2,0xce,0xa8,0x9e,0xeb,0x87,0xc2,0x03,0x2a, // 0000cb90 |..LG.IH........*|
+0x0b,0x72,0x43,0x51,0x5c,0xfd,0x9a,0x36,0x44,0xdf,0x58,0xdf,0xc5,0x7b,0x12,0x06, // 0000cba0 |.rCQ\..6D.X..{..|
+0xa1,0xb6,0x8d,0x94,0xac,0xc9,0x46,0xec,0x10,0x8c,0x1d,0x47,0xec,0xb0,0xa9,0x17, // 0000cbb0 |......F....G....|
+0x28,0xd6,0xec,0x4c,0x9c,0xc9,0xd1,0x3c,0xf6,0x51,0xdd,0xc3,0x28,0x74,0x2a,0x4a, // 0000cbc0 |(..L...<.Q..(t*J|
+0xc6,0x78,0x4a,0xf6,0x90,0x67,0x8c,0x14,0xfc,0x15,0xaf,0x7a,0x31,0x1a,0xbc,0x23, // 0000cbd0 |.xJ..g.....z1..#|
+0x39,0x3c,0x42,0x8b,0x90,0x08,0x7a,0xc1,0x47,0x82,0xaa,0x42,0xa3,0xc8,0xe4,0x8b, // 0000cbe0 |9<B...z.G..B....|
+0x84,0x5e,0x2b,0x91,0x64,0x84,0x03,0xf1,0x2d,0x44,0xbe,0xee,0xc1,0x98,0x1d,0x1f, // 0000cbf0 |.^+.d...-D......|
+0x5e,0xab,0x8e,0x35,0x85,0xf5,0x67,0x3d,0x16,0x36,0xab,0x63,0x50,0x5a,0xc7,0xf9, // 0000cc00 |^..5..g=.6.cPZ..|
+0x81,0xa0,0x3f,0xd6,0x2d,0x9f,0x7e,0x45,0xf4,0xb4,0xb2,0x1a,0xb8,0xb4,0xe1,0xf3, // 0000cc10 |..?.-.~E........|
+0x90,0x5c,0x77,0xee,0x7e,0x66,0x00,0xa4,0x5d,0x63,0xcd,0x3f,0xb9,0x84,0x65,0x4d, // 0000cc20 |.\w.~f..]c.?..eM|
+0xa5,0x62,0xd7,0xa5,0xd0,0x98,0x9d,0xba,0x99,0x32,0xe7,0x91,0x79,0xcf,0x23,0xcb, // 0000cc30 |.b.......2..y.#.|
+0x2c,0xa4,0x6c,0xfe,0x05,0xb6,0x76,0x53,0x82,0xb5,0x28,0xb4,0x83,0xed,0x37,0x50, // 0000cc40 |,.l...vS..(...7P|
+0x3f,0x08,0x7d,0xf9,0x8c,0x93,0xb1,0x8b,0x14,0x68,0xf5,0x06,0xee,0x57,0xf2,0x01, // 0000cc50 |?.}......h...W..|
+0x7c,0x62,0xb7,0x99,0xed,0xd6,0x7e,0xbb,0xdc,0xae,0x11,0x40,0xd6,0xd0,0x10,0xf3, // 0000cc60 ||b....~....@....|
+0x2c,0x93,0xce,0xb5,0xd1,0x3b,0xa2,0x4e,0xde,0x61,0x33,0x80,0x35,0xb7,0x06,0xb1, // 0000cc70 |,....;.N.a3.5...|
+0xef,0x68,0x39,0x55,0x14,0xc8,0xd0,0xb1,0x54,0x93,0xf8,0x9a,0x76,0xfb,0x8b,0x3f, // 0000cc80 |.h9U....T...v..?|
+0xaf,0x91,0x55,0x8b,0x7b,0x45,0x88,0xa6,0x74,0x03,0x9f,0xd2,0xe3,0xe4,0x5b,0xb9, // 0000cc90 |..U.{E..t.....[.|
+0xcc,0xfa,0x55,0xb3,0x97,0xa7,0xd4,0xcd,0xc6,0xaf,0xd8,0x68,0x4a,0xc4,0x58,0xe6, // 0000cca0 |..U........hJ.X.|
+0x6f,0xad,0x1d,0x55,0xbe,0xac,0xc7,0xc3,0xa1,0xd7,0xe5,0x1f,0x2e,0x66,0x22,0x35, // 0000ccb0 |o..U.........f"5|
+0xa8,0x42,0x8b,0x71,0x73,0x8d,0x15,0xfc,0x72,0x0d,0x41,0x40,0x36,0x83,0x25,0xaf, // 0000ccc0 |.B.qs...r.A@6.%.|
+0x60,0x50,0x7b,0x67,0x11,0x1a,0x4b,0x42,0x17,0xf3,0xd0,0x56,0x57,0x0e,0xf6,0xf6, // 0000ccd0 |`P{g..KB...VW...|
+0x42,0x8d,0x31,0x7e,0x9c,0xeb,0x30,0xb4,0xd2,0x36,0xa7,0x9a,0x35,0x25,0xcd,0x6d, // 0000cce0 |B.1~..0..6..5%.m|
+0xab,0xc9,0xb1,0x7a,0xce,0x21,0xf7,0x70,0x0d,0x2e,0xe5,0x5a,0xa3,0x95,0x42,0x0b, // 0000ccf0 |...z.!.p...Z..B.|
+0xbe,0xc3,0xe4,0x7e,0xcc,0xbd,0x86,0x1e,0xb7,0x54,0x45,0xac,0x63,0xd1,0x7f,0x33, // 0000cd00 |...~.....TE.c..3|
+0x5c,0xd5,0xad,0x7c,0xe6,0x93,0xe6,0xbf,0x7e,0x50,0xfe,0xaf,0xc6,0xaf,0xfb,0xba, // 0000cd10 |\..|....~P......|
+0x23,0xa8,0xac,0xb9,0x21,0x63,0x7c,0xc7,0xc2,0xad,0x89,0x74,0x90,0x92,0x54,0xb8, // 0000cd20 |#...!c|....t..T.|
+0xcf,0x33,0x65,0x69,0x43,0x3d,0x26,0x19,0x86,0x73,0xcb,0x2a,0xaa,0x30,0x80,0xd0, // 0000cd30 |.3eiC=&..s.*.0..|
+0x8b,0xe4,0x57,0xdc,0xbf,0x7d,0x17,0x50,0xb3,0x1b,0x9c,0x90,0xc5,0x4a,0xbb,0x3c, // 0000cd40 |..W..}.P.....J.<|
+0x2e,0x92,0x5f,0x51,0xc4,0xbb,0x74,0xd9,0xb0,0x00,0x89,0xd5,0x9b,0xce,0x47,0xac, // 0000cd50 |.._Q..t.......G.|
+0xd7,0xd2,0xbe,0x00,0x1d,0x2d,0x9f,0xe2,0x3f,0xa5,0x9f,0xd7,0x0b,0xdc,0x26,0xcf, // 0000cd60 |.....-..?.....&.|
+0xf0,0xcc,0x61,0x23,0xe7,0x00,0x5e,0x0f,0x3c,0xd9,0xab,0xcd,0x8a,0xb4,0xa8,0xa2, // 0000cd70 |..a#..^.<.......|
+0x8a,0xd6,0x08,0x74,0x71,0x5d,0x6a,0x3c,0xa9,0x99,0x6e,0xcb,0x33,0x81,0x96,0xde, // 0000cd80 |...tq]j<..n.3...|
+0xca,0x1e,0x55,0x44,0x87,0x55,0x0a,0x9c,0xbd,0xee,0x3a,0xf8,0x1c,0xbb,0x8e,0x4b, // 0000cd90 |..UD.U....:....K|
+0xc9,0x3b,0x1b,0x0b,0xce,0xb2,0xee,0x4b,0xb2,0x66,0x17,0xf5,0xbe,0x86,0x76,0x8a, // 0000cda0 |.;.....K.f....v.|
+0x3e,0xe3,0xbf,0x2d,0x59,0x99,0xa3,0x6d,0x77,0x7f,0xe0,0xfa,0x97,0x25,0xa5,0xf3, // 0000cdb0 |>..-Y..mw....%..|
+0xc7,0xe3,0xa0,0x71,0x83,0x14,0x54,0x11,0x87,0x75,0xde,0x68,0x32,0x9c,0x90,0x1c, // 0000cdc0 |...q..T..u.h2...|
+0xf2,0x7f,0xe1,0xfd,0xcb,0x18,0xa8,0x8b,0x3a,0xa2,0xae,0xdf,0xc9,0xa9,0x52,0x97, // 0000cdd0 |........:.....R.|
+0xaf,0x61,0x09,0x0a,0x40,0x28,0xbe,0x3d,0x36,0x34,0x4a,0x18,0x8f,0x4a,0x73,0x8d, // 0000cde0 |.a..@(.=64J..Js.|
+0x7b,0x51,0x57,0x7c,0xbd,0xef,0x80,0x4e,0x6f,0x42,0x3b,0x5b,0xc1,0xd2,0x91,0xb4, // 0000cdf0 |{QW|...NoB;[....|
+0x11,0xf4,0x83,0x77,0xfe,0xf2,0x01,0x1a,0x80,0xb3,0x8d,0x56,0x19,0xcb,0xf8,0xfb, // 0000ce00 |...w.......V....|
+0xb9,0x2b,0xeb,0x22,0x58,0xc4,0x85,0x27,0x19,0x5a,0xb8,0xa3,0xa8,0xf2,0x24,0x05, // 0000ce10 |.+."X..'.Z....$.|
+0xda,0xed,0x6c,0x67,0x10,0x8f,0x3e,0x83,0x38,0x96,0x74,0x3f,0x62,0xba,0xc2,0x4c, // 0000ce20 |..lg..>.8.t?b..L|
+0x68,0x97,0xfa,0x25,0x3d,0x9a,0x3a,0xcc,0x04,0x1e,0x1d,0x5b,0x6a,0xfd,0x1f,0x4d, // 0000ce30 |h..%=.:....[j..M|
+0xbc,0x71,0xd6,0x1d,0xbf,0x8b,0x44,0x0a,0x66,0x47,0xa2,0x86,0xf8,0x78,0xd9,0x73, // 0000ce40 |.q....D.fG...x.s|
+0x96,0x95,0x84,0xdf,0xd4,0xb9,0x20,0x8f,0x3a,0xd8,0x40,0x38,0x14,0xaa,0xf7,0x7e, // 0000ce50 |...... .:.@8...~|
+0xa0,0x71,0xf4,0x07,0x57,0xcf,0x98,0xbb,0x8e,0xf6,0x23,0xc9,0x76,0x03,0x55,0xf4, // 0000ce60 |.q..W.....#.v.U.|
+0xc5,0x9f,0x7d,0x3a,0x57,0x78,0x83,0x40,0xd8,0x2d,0xd1,0x9b,0xb7,0xe7,0x9d,0xd7, // 0000ce70 |..}:Wx.@.-......|
+0x56,0x00,0xfd,0x0e,0x74,0xce,0x24,0x70,0xeb,0x03,0x75,0x6f,0x0f,0xb3,0xd0,0x73, // 0000ce80 |V...t.$p..uo...s|
+0x39,0x6d,0x6f,0x9f,0xbd,0xc7,0x75,0xe5,0x30,0xa1,0x2a,0x3f,0x38,0x6e,0x42,0x68, // 0000ce90 |9mo...u.0.*?8nBh|
+0x47,0x53,0xe5,0x7d,0x58,0xf1,0xe8,0x65,0x5e,0xd6,0x61,0xaa,0x63,0xb9,0x4d,0xbb, // 0000cea0 |GS.}X..e^.a.c.M.|
+0x24,0xcb,0x64,0x96,0xf5,0xa5,0xa9,0x25,0x8d,0x79,0x4f,0x97,0x03,0x2c,0xe0,0x95, // 0000ceb0 |$.d....%.yO..,..|
+0x59,0xe9,0x70,0x14,0xa8,0x45,0x2d,0x44,0x26,0xf6,0xde,0xbf,0x36,0x80,0x57,0xe6, // 0000cec0 |Y.p..E-D&...6.W.|
+0xe3,0x84,0xf8,0x2b,0xa7,0x44,0x78,0x4b,0xf3,0x20,0x93,0x7f,0xc6,0x0f,0x69,0x87, // 0000ced0 |...+.DxK. ....i.|
+0x8f,0xb7,0xc5,0xd5,0xcd,0xc7,0xba,0x1b,0xf7,0xfc,0x39,0xbf,0x4c,0x9f,0x71,0x08, // 0000cee0 |..........9.L.q.|
+0xac,0x67,0x72,0xbd,0x03,0xea,0xe8,0xa1,0xd7,0x25,0x64,0x88,0x44,0x17,0xf4,0x70, // 0000cef0 |.gr......%d.D..p|
+0x0a,0x80,0x21,0x8e,0x9b,0x8d,0xfe,0xfc,0x84,0x9d,0x4e,0xdb,0x8e,0x7b,0x83,0x93, // 0000cf00 |..!.......N..{..|
+0xbb,0x08,0x6c,0x00,0xee,0x4c,0xf4,0x3d,0xcd,0x5d,0x90,0x9e,0x64,0xd2,0xa2,0x00, // 0000cf10 |..l..L.=.]..d...|
+0xfe,0xe6,0x33,0x67,0xa6,0x7c,0xd1,0xd9,0x18,0xf6,0x98,0xac,0x9a,0x11,0x28,0x76, // 0000cf20 |..3g.|........(v|
+0xd7,0xa9,0xac,0xbc,0x1e,0x1f,0x40,0xd8,0x12,0xaa,0x6d,0x90,0x84,0x5c,0x0c,0x71, // 0000cf30 |......@...m..\.q|
+0x24,0xbc,0x1c,0xd6,0xc8,0x03,0x5a,0x93,0xbb,0x70,0x3f,0x48,0x94,0x85,0xe7,0x0e, // 0000cf40 |$.....Z..p?H....|
+0x32,0xed,0xb2,0x2b,0xbb,0x10,0x15,0xb1,0x9c,0x7f,0x98,0x58,0x73,0x02,0x38,0x1e, // 0000cf50 |2..+.......Xs.8.|
+0xe5,0x48,0x60,0x0e,0xad,0xb0,0x50,0x71,0xd7,0x8f,0x6e,0x8e,0xda,0x13,0xde,0x84, // 0000cf60 |.H`...Pq..n.....|
+0x1e,0xfc,0x64,0x08,0x39,0xbb,0x38,0xfc,0xc0,0xca,0xd8,0x9c,0xc6,0x2f,0x65,0x17, // 0000cf70 |..d.9.8....../e.|
+0x33,0x98,0x2e,0x57,0xa9,0x97,0xe3,0x4c,0x67,0xaf,0x4a,0x52,0xd9,0xc6,0xdf,0xca, // 0000cf80 |3..W...Lg.JR....|
+0x1e,0x69,0x9d,0x09,0x15,0x39,0x3e,0xaf,0x99,0x5a,0x13,0x91,0x7d,0x76,0x0c,0x72, // 0000cf90 |.i...9>..Z..}v.r|
+0xe1,0x54,0x59,0xe8,0x3e,0x78,0x95,0xd6,0x5a,0xbb,0x30,0x44,0xa0,0x43,0x07,0x05, // 0000cfa0 |.TY.>x..Z.0D.C..|
+0x13,0x9f,0xb6,0x8b,0xd3,0x19,0x77,0xdb,0x49,0x08,0x93,0x11,0xb5,0x8e,0x20,0x03, // 0000cfb0 |......w.I..... .|
+0xf5,0xc3,0x8b,0xc7,0xb7,0xb9,0xa2,0x17,0xd3,0x3e,0x0c,0x19,0x26,0x61,0xcd,0xbb, // 0000cfc0 |.........>..&a..|
+0x7c,0x4f,0x4b,0xc1,0x58,0xa2,0xcc,0x96,0x40,0x7d,0x10,0x5f,0xab,0x48,0xdc,0x21, // 0000cfd0 ||OK.X...@}._.H.!|
+0x0f,0xcb,0x40,0xcc,0x2a,0x5b,0x4d,0xc6,0xb3,0x32,0x5c,0xfc,0x7e,0x64,0xb5,0x28, // 0000cfe0 |..@.*[M..2\.~d.(|
+0xc7,0x9d,0x94,0x2b,0x06,0xc9,0x4b,0x42,0x83,0x7a,0x2f,0x43,0xca,0x27,0xc8,0xdb, // 0000cff0 |...+..KB.z/C.'..|
+0x37,0x9e,0x0c,0xf8,0x85,0xfe,0x6c,0xb8,0x20,0x86,0x67,0xfb,0xb2,0xf7,0xdc,0x11, // 0000d000 |7.....l. .g.....|
+0x9f,0xa9,0xa6,0x5e,0x7f,0xad,0x65,0x37,0xc3,0x00,0xf1,0x15,0x04,0x62,0xd8,0xc5, // 0000d010 |...^..e7.....b..|
+0x8b,0x0c,0x79,0xe8,0x78,0x4f,0x0f,0xca,0x0c,0xa1,0xf5,0xef,0xe7,0x8e,0x66,0x57, // 0000d020 |..y.xO........fW|
+0x70,0xd2,0x80,0x74,0xd5,0x1f,0xba,0x08,0x43,0xac,0x36,0x04,0x59,0xb7,0xdc,0xa1, // 0000d030 |p..t....C.6.Y...|
+0x63,0x2b,0x57,0xf5,0xb0,0xc2,0xed,0x2e,0x35,0xe6,0x20,0x8e,0xe9,0xb7,0x53,0xf7, // 0000d040 |c+W.....5. ...S.|
+0xdb,0x88,0x14,0x5d,0x50,0xd4,0x67,0x3a,0x4d,0x84,0x0a,0xd6,0xb1,0x88,0xff,0x32, // 0000d050 |...]P.g:M......2|
+0xea,0xd5,0x17,0x21,0x1d,0xdf,0x09,0xc5,0x8a,0xfa,0x0b,0x33,0x61,0x83,0x80,0x57, // 0000d060 |...!.......3a..W|
+0x24,0x0d,0xe7,0xff,0xef,0x79,0x9b,0xb5,0x3b,0xd6,0xa4,0xb0,0x46,0x0f,0x3e,0xed, // 0000d070 |$....y..;...F.>.|
+0xfb,0xde,0x48,0xac,0x28,0xbc,0x8b,0x72,0xec,0x04,0xb5,0xc1,0x1e,0x86,0xa2,0x4c, // 0000d080 |..H.(..r.......L|
+0xb2,0x5c,0x7c,0x18,0xcd,0x06,0x97,0x57,0xb9,0xcd,0xea,0x83,0x01,0x5b,0xa1,0x14, // 0000d090 |.\|....W.....[..|
+0x05,0x46,0x5a,0x76,0xdb,0xef,0x6f,0x48,0x48,0xb8,0xab,0x92,0x5f,0x6d,0x22,0x65, // 0000d0a0 |.FZv..oHH..._m"e|
+0x47,0xa9,0x3a,0x84,0x4c,0x02,0x53,0x0f,0x71,0x5d,0xef,0x12,0x27,0x13,0xd4,0x27, // 0000d0b0 |G.:.L.S.q]..'..'|
+0xa2,0xa5,0x33,0x3f,0xe2,0xee,0xf7,0xe9,0x57,0x26,0xc5,0xa2,0xc5,0x12,0x4a,0x37, // 0000d0c0 |..3?....W&....J7|
+0xba,0x20,0x0e,0x12,0x13,0x41,0x0b,0x52,0x4c,0xa7,0x4e,0x87,0xa6,0xa8,0xce,0x2d, // 0000d0d0 |. ...A.RL.N....-|
+0x88,0x0e,0x99,0xb6,0x42,0x6d,0x65,0x1b,0x40,0xf6,0x3f,0x65,0xa9,0xe9,0x59,0xf0, // 0000d0e0 |....Bme.@.?e..Y.|
+0xa7,0xb9,0x36,0xcc,0x3b,0x35,0xf8,0xd1,0xfd,0x8d,0x25,0x41,0x18,0x15,0x37,0x10, // 0000d0f0 |..6.;5....%A..7.|
+0x6a,0x38,0xe9,0x5a,0x08,0xa0,0xaa,0xe8,0x26,0x98,0xbc,0xf3,0x28,0x98,0x27,0x55, // 0000d100 |j8.Z....&...(.'U|
+0x28,0xf5,0xe5,0x98,0x91,0xe8,0x0e,0x3d,0xef,0xb3,0x56,0x6f,0x85,0x8e,0x9c,0x4a, // 0000d110 |(......=..Vo...J|
+0x11,0x19,0x35,0x5c,0x09,0x98,0x68,0xed,0x7c,0x05,0x11,0xf0,0xe0,0x99,0xad,0x46, // 0000d120 |..5\..h.|......F|
+0x1d,0xc6,0xb4,0xd9,0x92,0x3b,0x56,0xb7,0xa5,0x62,0x82,0xf6,0x4a,0xe0,0xfd,0xa3, // 0000d130 |.....;V..b..J...|
+0x61,0xb8,0x26,0x59,0xfd,0x2c,0x26,0x97,0xdb,0xe6,0xbc,0x5a,0xf9,0xdc,0xb5,0x54, // 0000d140 |a.&Y.,&....Z...T|
+0x16,0x86,0x96,0x55,0x56,0x88,0x5c,0x57,0xa6,0x6d,0x73,0x43,0x43,0x9b,0x47,0x3c, // 0000d150 |...UV.\W.msCC.G<|
+0xa4,0x37,0xfd,0xab,0x47,0x29,0x9e,0x74,0xac,0x07,0xfe,0x65,0xe8,0x7e,0xd5,0xe0, // 0000d160 |.7..G).t...e.~..|
+0x5a,0xae,0x1a,0x57,0x6e,0xc8,0x66,0x57,0x26,0x9c,0x65,0x5a,0x88,0x38,0xf6,0x79, // 0000d170 |Z..Wn.fW&.eZ.8.y|
+0xee,0x6e,0x3d,0x44,0x8c,0x46,0xa7,0xdc,0xa6,0xce,0x4c,0x20,0xd2,0x71,0x9d,0x15, // 0000d180 |.n=D.F....L .q..|
+0x31,0x3b,0x2f,0x30,0xf5,0xc3,0x9b,0x4f,0x62,0xd9,0xbb,0xf7,0x1b,0x4c,0x75,0xbe, // 0000d190 |1;/0...Ob....Lu.|
+0x45,0x37,0x25,0xe4,0x31,0x7e,0xe1,0x9c,0x5c,0x2e,0xd0,0x97,0x0a,0x4a,0x64,0x49, // 0000d1a0 |E7%.1~..\....JdI|
+0x1c,0x0d,0xf5,0xb8,0x08,0x3f,0x99,0x16,0xc6,0x37,0xba,0x91,0x7e,0xc5,0xe3,0x44, // 0000d1b0 |.....?...7..~..D|
+0xd2,0x47,0x64,0x52,0x9b,0x3d,0x9b,0x0e,0xb3,0xb0,0xcc,0x95,0x9d,0xd4,0x29,0xe8, // 0000d1c0 |.GdR.=........).|
+0xe8,0x27,0x75,0x78,0x3f,0x46,0xec,0x36,0x12,0x7c,0x9c,0xea,0xc7,0x00,0xf4,0x32, // 0000d1d0 |.'ux?F.6.|.....2|
+0xba,0x22,0x93,0xc7,0x83,0xae,0x6f,0x52,0xd1,0x10,0xba,0x40,0xe4,0xf4,0xdf,0xf8, // 0000d1e0 |."....oR...@....|
+0xfb,0x59,0x1e,0xb4,0xd3,0x6f,0x77,0xf3,0xef,0x37,0xd6,0x64,0x0d,0xf5,0xe8,0x57, // 0000d1f0 |.Y...ow..7.d...W|
+0xad,0xc3,0x31,0xa1,0x85,0x51,0x60,0x08,0x1a,0xa4,0x0c,0x5c,0xa1,0x53,0x70,0x4b, // 0000d200 |..1..Q`....\.SpK|
+0xc0,0x96,0xe2,0x9a,0xe9,0x4e,0x08,0x3d,0x23,0x7c,0x96,0x3e,0x1b,0xce,0x14,0xb9, // 0000d210 |.....N.=#|.>....|
+0x1f,0xd6,0x19,0x45,0x87,0x9f,0x16,0x40,0xf0,0xce,0xd2,0xce,0x12,0xb3,0x17,0x74, // 0000d220 |...E...@.......t|
+0xdd,0xb7,0x31,0xc3,0xb8,0xbb,0x7f,0x11,0xdf,0x78,0x96,0xb4,0x72,0xbd,0x4b,0x65, // 0000d230 |..1......x..r.Ke|
+0x6c,0x40,0x83,0x36,0x01,0x23,0x22,0x01,0x84,0x70,0xaf,0x59,0x90,0xd5,0x5e,0x97, // 0000d240 |l@.6.#"..p.Y..^.|
+0xf9,0x8f,0x71,0x13,0xa4,0x8e,0x09,0x0f,0xd4,0x29,0xcf,0x01,0x0d,0x27,0xea,0x50, // 0000d250 |..q......)...'.P|
+0x3e,0xe2,0xe5,0xd7,0x2a,0x2d,0xad,0xaf,0x75,0xa1,0x24,0x96,0xc4,0xcc,0xc3,0xbe, // 0000d260 |>...*-..u.$.....|
+0xb6,0xb4,0x63,0x85,0x1e,0x5d,0xef,0x82,0x6f,0xb4,0xec,0x7f,0xf1,0x43,0xda,0x8a, // 0000d270 |..c..]..o....C..|
+0xcd,0x90,0xa5,0x16,0xdd,0x97,0x2d,0xe1,0x32,0x86,0xf1,0x5a,0x45,0x5c,0xf5,0x41, // 0000d280 |......-.2..ZE\.A|
+0x74,0x97,0xee,0xa3,0xac,0xda,0xc5,0xa5,0x1b,0xa0,0xc3,0x81,0xa7,0x83,0x38,0xbe, // 0000d290 |t.............8.|
+0x47,0x5a,0xdf,0x73,0xa2,0xdc,0xfa,0x4a,0x6c,0x22,0xb9,0xd2,0x23,0x8c,0xa2,0x8f, // 0000d2a0 |GZ.s...Jl"..#...|
+0xf7,0x2d,0x2c,0x51,0x29,0xa1,0x4f,0xec,0x5d,0xd8,0xb2,0x8c,0xb2,0xe9,0x91,0x66, // 0000d2b0 |.-,Q).O.]......f|
+0x56,0xb3,0x7b,0x10,0x23,0xdf,0x36,0xce,0x0b,0x22,0xe4,0x9e,0xd3,0x7a,0x2a,0xc9, // 0000d2c0 |V.{.#.6.."...z*.|
+0x66,0xc7,0x49,0x27,0x5a,0x7e,0x13,0xf3,0xba,0x09,0x4b,0xc7,0xe1,0x84,0xe1,0x08, // 0000d2d0 |f.I'Z~....K.....|
+0x03,0xcc,0xee,0x26,0x71,0x40,0x74,0x4c,0xb8,0x27,0xd0,0xe0,0x45,0x96,0xd9,0x6c, // 0000d2e0 |...&q@tL.'..E..l|
+0xf8,0x97,0xec,0xd5,0x32,0xf4,0x88,0x83,0x90,0xb5,0x3d,0x50,0xc9,0x97,0xe1,0x7c, // 0000d2f0 |....2.....=P...||
+0x2c,0x60,0x36,0xf0,0xe5,0xea,0x04,0x25,0x24,0x2e,0xdd,0x8c,0x93,0x4c,0x83,0xba, // 0000d300 |,`6....%$....L..|
+0x71,0x76,0x40,0xd1,0x9a,0x86,0x15,0x3d,0x33,0x9b,0x47,0xa1,0xd6,0x46,0x6c,0xed, // 0000d310 |qv@....=3.G..Fl.|
+0x66,0x7a,0x42,0xcf,0xcc,0xda,0x54,0xc9,0x4e,0x6c,0x4c,0x39,0xcf,0xb1,0x21,0x41, // 0000d320 |fzB...T.NlL9..!A|
+0x76,0x0b,0x3c,0x74,0x1a,0x3b,0xad,0x9a,0x72,0xd3,0x37,0x1f,0xb4,0x51,0x30,0x5b, // 0000d330 |v.<t.;..r.7..Q0[|
+0xf3,0x83,0x47,0x8a,0xf6,0xd0,0xa3,0x22,0xa7,0x2c,0x78,0xac,0x7a,0x70,0xe3,0x78, // 0000d340 |..G....".,x.zp.x|
+0x11,0xaf,0xc7,0x41,0x77,0x5c,0xdf,0xc5,0xe0,0x40,0x79,0xce,0x96,0x5f,0x99,0x8c, // 0000d350 |...Aw\...@y.._..|
+0xc6,0x90,0x8a,0xaa,0x0d,0xea,0x58,0x11,0xe5,0xf3,0xaa,0x93,0xc3,0xcf,0xbf,0x28, // 0000d360 |......X........(|
+0x28,0xe6,0x1c,0x0a,0xa7,0xf0,0xfc,0xcc,0x5f,0x5b,0xd4,0x42,0x71,0xff,0x4f,0xfa, // 0000d370 |(......._[.Bq.O.|
+0x30,0x82,0x79,0xe8,0x8f,0xf3,0xfe,0x45,0x2c,0x2f,0x08,0xe1,0x9e,0x96,0x16,0x5c, // 0000d380 |0.y....E,/.....\|
+0x8f,0x33,0xd6,0xe5,0x45,0x12,0x0d,0xc4,0xb0,0x73,0x80,0xdd,0xa1,0xaf,0x53,0x83, // 0000d390 |.3..E....s....S.|
+0x3b,0x02,0xd1,0x64,0xa8,0x2c,0x24,0x61,0xd6,0x80,0x27,0x64,0x40,0x52,0xce,0x7d, // 0000d3a0 |;..d.,$a..'d@R.}|
+0xe1,0xa7,0xbb,0xb8,0xb5,0x6d,0xb8,0x95,0x7c,0xd6,0x11,0x62,0x25,0xa0,0x6d,0x21, // 0000d3b0 |.....m..|..b%.m!|
+0xb9,0xf3,0x55,0x1b,0xb2,0x9e,0x8c,0x7a,0x91,0x28,0x9b,0x78,0x12,0x26,0x4b,0xa6, // 0000d3c0 |..U....z.(.x.&K.|
+0x0e,0x5b,0x5b,0x2f,0xc0,0x98,0x19,0x5e,0x71,0x04,0x88,0xd8,0x1c,0xaf,0x13,0xc3, // 0000d3d0 |.[[/...^q.......|
+0x41,0x62,0x49,0x4a,0x1d,0x3e,0x72,0x0d,0x18,0x31,0xe5,0x0b,0x62,0x84,0x71,0x81, // 0000d3e0 |AbIJ.>r..1..b.q.|
+0x2f,0x45,0xa5,0x0a,0xda,0x29,0x93,0xb0,0xf2,0xee,0xc6,0x82,0x5c,0xf8,0xe6,0x4d, // 0000d3f0 |/E...)......\..M|
+0x10,0xd6,0xe7,0x35,0xc5,0x6e,0xe7,0xf6,0x16,0x3d,0x5f,0x90,0xfe,0x84,0xae,0x0f, // 0000d400 |...5.n...=_.....|
+0xa2,0x9b,0xd3,0x3c,0x96,0x50,0x4f,0xc8,0xb1,0x28,0x6b,0x2b,0xbe,0x7b,0x8a,0x31, // 0000d410 |...<.PO..(k+.{.1|
+0x7d,0xd8,0x53,0xb3,0xec,0xa4,0x5f,0x0e,0x43,0x28,0x7a,0x5f,0x89,0x2f,0xfb,0x2a, // 0000d420 |}.S..._.C(z_./.*|
+0x80,0xfd,0xcd,0x52,0x2d,0xec,0xba,0x0a,0x45,0xf2,0x0b,0x13,0xf8,0x01,0x89,0x13, // 0000d430 |...R-...E.......|
+0x44,0xf9,0xad,0x12,0x73,0x5f,0xaf,0xbf,0xc4,0xa9,0x96,0xf5,0x43,0x8b,0x3c,0xad, // 0000d440 |D...s_......C.<.|
+0x90,0xf1,0xb8,0xab,0x36,0x7b,0x8c,0x41,0x5d,0x30,0x8d,0x1d,0x07,0x27,0x8e,0xf9, // 0000d450 |....6{.A]0...'..|
+0x52,0x85,0x98,0x1c,0x27,0x94,0x98,0xa0,0x3f,0xc2,0x37,0x49,0x99,0x2e,0x8f,0x6f, // 0000d460 |R...'...?.7I...o|
+0x0a,0x22,0xf7,0xa6,0xf8,0xf4,0x49,0xb5,0x00,0xe7,0x0d,0x53,0x01,0x42,0x56,0x57, // 0000d470 |."....I....S.BVW|
+0x51,0x35,0xfa,0x63,0xa4,0x2f,0xa4,0x09,0x60,0x7e,0x0f,0x41,0x1f,0x9e,0x1a,0xfd, // 0000d480 |Q5.c./..`~.A....|
+0xca,0x55,0x5f,0xb6,0xda,0xef,0xf1,0x50,0xae,0x40,0x3b,0x65,0x36,0x95,0x2f,0x87, // 0000d490 |.U_....P.@;e6./.|
+0x2a,0xeb,0x57,0x59,0x2d,0x76,0xe8,0x3d,0x34,0xb9,0x00,0xc9,0x91,0x11,0x9f,0xed, // 0000d4a0 |*.WY-v.=4.......|
+0xdf,0x90,0x2b,0xb6,0x9d,0xd2,0x68,0x93,0xb2,0xbe,0xd1,0x4c,0x7e,0x66,0x8b,0x65, // 0000d4b0 |..+...h....L~f.e|
+0xc9,0xaf,0x91,0x2e,0x9b,0xc2,0xd5,0x02,0xbf,0x9b,0xd4,0xcd,0xd1,0xdc,0x20,0x95, // 0000d4c0 |.............. .|
+0xda,0x1a,0x39,0x87,0x32,0xd4,0x46,0x69,0x10,0x07,0x7e,0xdb,0x78,0xd0,0x88,0xa4, // 0000d4d0 |..9.2.Fi..~.x...|
+0xd6,0x85,0x0a,0xf1,0xc7,0xb2,0x12,0x88,0xa7,0x1d,0xe1,0x30,0x5f,0xfa,0x24,0x81, // 0000d4e0 |...........0_.$.|
+0x5e,0xf4,0xcc,0xbe,0xb6,0x67,0x8d,0x51,0xf2,0xe5,0xa3,0xe1,0x5d,0xf0,0x76,0xba, // 0000d4f0 |^....g.Q....].v.|
+0xcb,0x88,0x15,0x58,0xc2,0x82,0xa7,0xe9,0x63,0xb9,0xf4,0xc4,0x4b,0x56,0x2e,0x39, // 0000d500 |...X....c...KV.9|
+0x68,0x38,0xfb,0x69,0x94,0xf4,0x8e,0xe9,0xf0,0x3a,0xde,0x0c,0xc2,0xba,0xa1,0xe8, // 0000d510 |h8.i.....:......|
+0xb7,0x22,0xac,0xcf,0xba,0x64,0x72,0x46,0x7a,0x0d,0x41,0x3f,0xbb,0x22,0x5f,0x5b, // 0000d520 |."...drFz.A?."_[|
+0xfb,0xc6,0xdc,0x1b,0x8a,0x54,0x6e,0x4d,0x82,0x3b,0xdb,0x4b,0xf5,0x47,0x08,0x96, // 0000d530 |.....TnM.;.K.G..|
+0xe4,0x68,0x3a,0x11,0xba,0x44,0xe0,0xd4,0xdb,0x9f,0x93,0xed,0x99,0x0d,0x65,0xf1, // 0000d540 |.h:..D........e.|
+0xe1,0x29,0x3b,0xb2,0x4b,0x9a,0x13,0x8f,0x43,0xde,0x3a,0x0f,0x0c,0xbb,0xad,0x53, // 0000d550 |.);.K...C.:....S|
+0xd4,0x97,0xdd,0x6b,0x0d,0x3b,0xe3,0x2a,0xac,0xc7,0x22,0xfa,0x8a,0xd7,0xc6,0xa3, // 0000d560 |...k.;.*..".....|
+0x8f,0x82,0x91,0xa1,0x54,0xb1,0x69,0x01,0x1b,0x90,0xa0,0x93,0xa5,0xae,0xe9,0xcd, // 0000d570 |....T.i.........|
+0x31,0x74,0x80,0xe8,0x1c,0x99,0xaf,0x0c,0x4b,0xf5,0x44,0x95,0x59,0xaf,0x42,0x5d, // 0000d580 |1t......K.D.Y.B]|
+0x43,0x97,0x17,0x2e,0x60,0xab,0x91,0xaf,0xe5,0xad,0xe6,0xae,0x3b,0x16,0x99,0x75, // 0000d590 |C...`.......;..u|
+0x42,0x49,0xcc,0x63,0xe4,0xfb,0xe5,0x2f,0x26,0xc6,0xa3,0x96,0xf0,0x14,0xae,0x03, // 0000d5a0 |BI.c.../&.......|
+0xca,0x82,0x90,0xdc,0x05,0x5a,0xf4,0xd7,0x3c,0x21,0x99,0x20,0x61,0xb8,0xe0,0x18, // 0000d5b0 |.....Z..<!. a...|
+0x01,0xed,0xc0,0x69,0x73,0xc3,0x8a,0x7e,0xcb,0xda,0x8c,0xe4,0x64,0x50,0x32,0x74, // 0000d5c0 |...is..~....dP2t|
+0x5c,0x06,0xc8,0x2f,0x3a,0x03,0x97,0x25,0x16,0xfc,0xa7,0x9a,0x93,0x46,0x9a,0x8f, // 0000d5d0 |\../:..%.....F..|
+0x00,0xbb,0x5a,0x7b,0x36,0x95,0x39,0xb3,0x4f,0x89,0x43,0x50,0x3e,0xbc,0xc4,0x33, // 0000d5e0 |..Z{6.9.O.CP>..3|
+0x30,0x75,0x6a,0x39,0x87,0xd1,0x76,0xcf,0xc3,0x92,0x4a,0x37,0xd8,0xd4,0xf1,0x1d, // 0000d5f0 |0uj9..v...J7....|
+0x60,0x3c,0x75,0xe7,0xea,0xfe,0x96,0xce,0x21,0x67,0x66,0x34,0x65,0x58,0x40,0xa8, // 0000d600 |`<u.....!gf4eX@.|
+0xc2,0x6d,0xca,0xce,0xdb,0x10,0xc7,0x32,0x67,0xd0,0x69,0xd5,0x23,0x88,0xa8,0xa6, // 0000d610 |.m.....2g.i.#...|
+0x49,0x38,0x68,0x86,0xd7,0xb6,0x28,0x1a,0x53,0x18,0x4d,0xfc,0x45,0x23,0x01,0xdd, // 0000d620 |I8h...(.S.M.E#..|
+0x15,0x0b,0xec,0x81,0x13,0x66,0x89,0x86,0x9b,0xdd,0xcb,0x35,0x52,0xbb,0x61,0xc1, // 0000d630 |.....f.....5R.a.|
+0xb9,0x81,0x27,0xba,0xc3,0x56,0x27,0xa1,0xad,0xef,0x34,0x84,0xba,0x47,0xdf,0xb9, // 0000d640 |..'..V'...4..G..|
+0x32,0xe5,0xf5,0x8e,0x29,0x21,0x8b,0x12,0x8d,0x90,0xaf,0x69,0x9e,0xc1,0x88,0x08, // 0000d650 |2...)!.....i....|
+0x05,0xc5,0xeb,0xc7,0xca,0x1e,0x41,0x31,0xb9,0x6d,0xf2,0xf0,0xa8,0x28,0x73,0xb9, // 0000d660 |......A1.m...(s.|
+0x8a,0xa5,0x17,0xb7,0x4b,0x1c,0x3c,0xa6,0x74,0xec,0x86,0xb9,0x23,0xe6,0x5b,0xd0, // 0000d670 |....K.<.t...#.[.|
+0xa9,0x83,0x3b,0x6c,0xea,0x2e,0xff,0x23,0x58,0x0d,0x9f,0x70,0x9e,0x23,0x61,0x79, // 0000d680 |..;l...#X..p.#ay|
+0xed,0x57,0x82,0xa5,0x18,0xd4,0xc2,0x8b,0xcc,0xfa,0x35,0x22,0x17,0xe8,0xde,0x10, // 0000d690 |.W........5"....|
+0x60,0xff,0x23,0x54,0x43,0x08,0x2f,0xe1,0xce,0xf0,0x78,0x37,0xec,0xb7,0x6a,0x2d, // 0000d6a0 |`.#TC./...x7..j-|
+0x8f,0xdc,0x92,0x2c,0x67,0x43,0xdd,0x1a,0xd2,0x9f,0xad,0x2f,0xc0,0xb4,0xbe,0x9e, // 0000d6b0 |...,gC...../....|
+0xa0,0xc8,0x45,0x01,0xf3,0x92,0xa5,0x4c,0xbf,0x5f,0x38,0x33,0xcc,0x27,0x82,0x69, // 0000d6c0 |..E....L._83.'.i|
+0xbd,0x7a,0x1c,0xeb,0x16,0x5f,0xff,0xc7,0xcb,0x22,0xc5,0x49,0x67,0xf9,0x9f,0xcb, // 0000d6d0 |.z..._...".Ig...|
+0x58,0xdf,0x8a,0x88,0x90,0xa8,0xd4,0xd4,0x34,0x43,0xa8,0xa9,0x92,0x54,0xd2,0xb0, // 0000d6e0 |X.......4C...T..|
+0x5c,0xb5,0xed,0xc9,0x2f,0xa7,0x1e,0xfb,0xa8,0x0c,0x0e,0x39,0x66,0x45,0x93,0xd1, // 0000d6f0 |\.../......9fE..|
+0xb1,0xa8,0xa7,0xd4,0x57,0xd2,0xd1,0x8f,0xe6,0x8b,0x64,0xf2,0x99,0xf5,0xa0,0x1c, // 0000d700 |....W.....d.....|
+0xfe,0xf1,0x96,0x7a,0xf3,0xbf,0xd2,0x75,0xca,0xa7,0x3d,0x47,0x11,0xda,0x81,0x63, // 0000d710 |...z...u..=G...c|
+0x17,0x1b,0x42,0xda,0x34,0x99,0x5b,0xeb,0xf2,0xdd,0x67,0xc6,0xcf,0xb7,0x16,0x2c, // 0000d720 |..B.4.[...g....,|
+0x84,0x16,0x02,0x9b,0x56,0x1c,0xfc,0x7c,0xcf,0xe5,0xdf,0x4f,0x84,0xa2,0xf3,0xd6, // 0000d730 |....V..|...O....|
+0xb6,0xdf,0xa9,0x13,0x75,0xa2,0x6a,0xa0,0xf8,0xc9,0xc0,0x4a,0x50,0x0c,0x59,0xe1, // 0000d740 |....u.j....JP.Y.|
+0xac,0x01,0xa5,0x13,0x93,0x18,0x8b,0xd0,0x15,0x8e,0x45,0xff,0xde,0xb1,0x8a,0x9b, // 0000d750 |..........E.....|
+0x37,0x8b,0x6a,0xa8,0x4f,0x57,0xa5,0xf0,0xe9,0x0e,0xb3,0x7b,0x61,0x44,0x9e,0x48, // 0000d760 |7.j.OW.....{aD.H|
+0x33,0xd3,0x8a,0xda,0x97,0x19,0x5a,0x8b,0x43,0x23,0x76,0x98,0xa3,0xcf,0x2a,0x0f, // 0000d770 |3.....Z.C#v...*.|
+0x77,0x2d,0xee,0x43,0xce,0x0b,0x84,0x44,0x7f,0x62,0x6f,0xcc,0x42,0xca,0x1f,0x56, // 0000d780 |w-.C...D.bo.B..V|
+0x53,0x2d,0x2d,0xf0,0x84,0x11,0xd6,0xd2,0x20,0xd7,0x33,0xfd,0x15,0xce,0x29,0xbd, // 0000d790 |S--..... .3...).|
+0x3e,0xe6,0x47,0x58,0xa7,0x90,0x1f,0xfe,0xe2,0x10,0xdb,0x24,0x50,0xf3,0x51,0x77, // 0000d7a0 |>.GX.......$P.Qw|
+0xf8,0xc0,0xde,0xea,0xdc,0x88,0xaa,0x36,0xd0,0x06,0x98,0xdd,0x7f,0xd4,0xec,0x33, // 0000d7b0 |.......6.......3|
+0xff,0x0c,0x5d,0x42,0x6e,0x77,0x00,0xfa,0xba,0xe6,0xc6,0xd0,0xba,0x5e,0x97,0xcf, // 0000d7c0 |..]Bnw.......^..|
+0x25,0xa1,0x0b,0xab,0xcc,0x28,0x61,0x46,0x12,0xfd,0x29,0x4b,0xbe,0x10,0x00,0x56, // 0000d7d0 |%....(aF..)K...V|
+0xe9,0xed,0x54,0x1e,0xff,0xe5,0x6b,0x20,0x27,0xc2,0x26,0x08,0x2f,0x58,0x05,0x3e, // 0000d7e0 |..T...k '.&./X.>|
+0xc2,0x11,0xe0,0x5d,0x93,0xba,0x89,0xba,0x19,0xc0,0x7f,0x56,0x7f,0x14,0x81,0x8f, // 0000d7f0 |...].......V....|
+0x97,0xdd,0xa4,0x2c,0x71,0xdf,0xd6,0xf8,0x41,0x52,0x0d,0x24,0x20,0x86,0xc4,0xf3, // 0000d800 |...,q...AR.$ ...|
+0x18,0xc6,0xb3,0x46,0x23,0x66,0x22,0xea,0x13,0x9d,0xba,0x7d,0xf3,0x94,0xc7,0x1f, // 0000d810 |...F#f"....}....|
+0x02,0x49,0xd6,0xe1,0xdb,0x2f,0x3e,0x24,0x88,0x63,0x61,0x14,0x09,0xe8,0xe2,0xc9, // 0000d820 |.I.../>$.ca.....|
+0x63,0xa0,0x5f,0x5a,0xbe,0x15,0x45,0x31,0x45,0x69,0xcb,0x3e,0x38,0x43,0xe5,0xf7, // 0000d830 |c._Z..E1Ei.>8C..|
+0x4b,0x6b,0x73,0xb5,0xfa,0x51,0x2b,0x77,0xc7,0xc5,0xcf,0x8a,0xd9,0xc6,0x49,0x66, // 0000d840 |Kks..Q+w......If|
+0xdd,0x0b,0x18,0x18,0xa1,0x17,0xef,0x3e,0x69,0xb7,0x25,0x5a,0x64,0x0a,0x3e,0x14, // 0000d850 |.......>i.%Zd.>.|
+0x9c,0x5d,0x95,0x9d,0x2a,0x1b,0x32,0x3f,0xca,0xac,0xb7,0xed,0x2c,0x93,0xe3,0x9d, // 0000d860 |.]..*.2?....,...|
+0x39,0x67,0x15,0xda,0xa8,0xa7,0xcf,0x3b,0xd9,0x55,0x25,0x26,0x14,0x13,0xfc,0xbe, // 0000d870 |9g.....;.U%&....|
+0xba,0xf7,0x01,0x4f,0x73,0xaf,0x38,0x5d,0x78,0xa5,0x09,0xb5,0xbf,0x3c,0xc8,0x7e, // 0000d880 |...Os.8]x....<.~|
+0xa3,0x05,0xa1,0x1d,0xe6,0xd0,0xf2,0x6b,0x11,0xaf,0x9f,0xb7,0xee,0xac,0xac,0x11, // 0000d890 |.......k........|
+0x67,0x00,0x01,0x96,0x2b,0xeb,0x9b,0xbb,0xd6,0xd2,0xd2,0x40,0xcf,0x4d,0xec,0x61, // 0000d8a0 |g...+......@.M.a|
+0xa1,0xe5,0xef,0x67,0x3e,0xf2,0x03,0x59,0x70,0x14,0x32,0x54,0x40,0x38,0xe2,0x3b, // 0000d8b0 |...g>..Yp.2T@8.;|
+0x23,0x0b,0xf4,0x39,0x1f,0x9e,0xe2,0x1e,0x7f,0x78,0x16,0xd4,0x76,0xf3,0xec,0x47, // 0000d8c0 |#..9.....x..v..G|
+0xe5,0xbc,0x9c,0x99,0x60,0x56,0x75,0xf4,0xa4,0x06,0x30,0x47,0xde,0x5a,0xfc,0xd4, // 0000d8d0 |....`Vu...0G.Z..|
+0x1f,0xcf,0x92,0x30,0x2c,0x1d,0xf7,0xb2,0x50,0xea,0x51,0xd1,0x26,0x63,0x22,0x93, // 0000d8e0 |...0,...P.Q.&c".|
+0x93,0x0d,0x0f,0x5a,0xad,0x60,0x63,0xe4,0xc1,0x28,0xb8,0xcb,0xc8,0x7d,0xad,0xa9, // 0000d8f0 |...Z.`c..(...}..|
+0x34,0xa7,0x6c,0x0e,0x76,0x33,0x46,0xe1,0xba,0x62,0x3b,0x2b,0xbb,0xc8,0xb8,0x17, // 0000d900 |4.l.v3F..b;+....|
+0xb9,0xe5,0x0f,0x61,0x7b,0x76,0x24,0x12,0xed,0x59,0xf6,0x4c,0xda,0x12,0x2c,0x72, // 0000d910 |...a{v$..Y.L..,r|
+0x6c,0xe8,0xd1,0x2d,0xbf,0x59,0xc3,0xd3,0x52,0x80,0xc4,0x2e,0xda,0x3b,0xb2,0xef, // 0000d920 |l..-.Y..R....;..|
+0xd1,0x52,0x32,0x8a,0xfd,0x46,0x93,0xa1,0x55,0xd4,0x7e,0x3e,0x0d,0xbe,0xc8,0xd0, // 0000d930 |.R2..F..U.~>....|
+0x25,0x60,0xfb,0x0e,0x0e,0xe5,0x0a,0x3e,0x7c,0xa2,0xee,0xe4,0xb9,0xb5,0x17,0x6a, // 0000d940 |%`.....>|......j|
+0xf6,0xa3,0x5b,0xed,0x23,0xf1,0xeb,0x4b,0xd8,0x86,0x02,0x7c,0xe0,0xe7,0x1f,0xf5, // 0000d950 |..[.#..K...|....|
+0x81,0x76,0xe2,0x60,0x63,0xb9,0xea,0x43,0x9f,0x95,0x5c,0x23,0x51,0x82,0x15,0x7d, // 0000d960 |.v.`c..C..\#Q..}|
+0xf6,0x4e,0x0b,0x26,0x16,0x4d,0x48,0xb3,0x3d,0x66,0xd5,0x3c,0x13,0xcf,0x0f,0x65, // 0000d970 |.N.&.MH.=f.<...e|
+0xed,0x09,0x4a,0x86,0x86,0x0e,0xa8,0xb7,0x4e,0x78,0x74,0xd7,0x29,0x14,0xd1,0x16, // 0000d980 |..J.....Nxt.)...|
+0x40,0x25,0x4d,0x7d,0x00,0x3c,0x5e,0xe9,0x1e,0x4f,0x71,0x95,0xe1,0xf3,0x0a,0xef, // 0000d990 |@%M}.<^..Oq.....|
+0x57,0x7f,0x3b,0xa2,0x53,0xa7,0x4a,0xa8,0xc0,0xbd,0x35,0x6c,0x35,0x09,0x2f,0xac, // 0000d9a0 |W.;.S.J...5l5./.|
+0xbd,0xaa,0x2d,0x3e,0x21,0x3e,0x66,0xdd,0xbf,0xad,0x18,0x8a,0x26,0x8a,0x1e,0x45, // 0000d9b0 |..->!>f.....&..E|
+0xf7,0xdd,0x97,0xbe,0xf5,0x7f,0xb7,0xb5,0x21,0xa4,0x2e,0xd0,0x1b,0xd3,0xcc,0xfe, // 0000d9c0 |........!.......|
+0x64,0xb3,0xb1,0xcf,0x20,0x75,0x33,0xb3,0x31,0x4d,0xac,0xca,0x99,0x3d,0x79,0x86, // 0000d9d0 |d... u3.1M...=y.|
+0x99,0x28,0x30,0xa1,0xbb,0x89,0x87,0x66,0xa1,0xd4,0x29,0x34,0x57,0x07,0x06,0x1a, // 0000d9e0 |.(0....f..)4W...|
+0x1b,0x37,0x4d,0xc0,0x91,0x1d,0x8c,0xed,0x2f,0x2e,0x60,0x89,0x4b,0x15,0x15,0xd0, // 0000d9f0 |.7M...../.`.K...|
+0x44,0x32,0xa1,0xcd,0x7b,0xe4,0x60,0x61,0xe3,0x31,0x40,0x60,0xd5,0x5a,0x80,0xab, // 0000da00 |D2..{.`a.1@`.Z..|
+0x40,0x63,0xf6,0xcd,0x12,0x6f,0xa9,0x64,0x75,0x06,0x70,0xb1,0x48,0xef,0x63,0x48, // 0000da10 |@c...o.du.p.H.cH|
+0x63,0xa5,0x18,0x60,0x41,0x18,0xe7,0x67,0x68,0x73,0xa8,0x80,0x88,0xcf,0xe5,0x9c, // 0000da20 |c..`A..ghs......|
+0x5e,0x55,0xaf,0xef,0x6e,0xdf,0x58,0xc2,0x0b,0xe5,0x67,0xe9,0x60,0x3e,0xd3,0x1e, // 0000da30 |^U..n.X...g.`>..|
+0x10,0xbc,0xf1,0xaa,0x1b,0x98,0xec,0xa6,0xdd,0x20,0xb2,0xee,0x77,0xa7,0x1a,0x6b, // 0000da40 |......... ..w..k|
+0x5e,0x34,0xa7,0xc4,0x32,0xbc,0x30,0x61,0x2c,0x51,0x57,0xee,0x58,0xa2,0x2e,0x47, // 0000da50 |^4..2.0a,QW.X..G|
+0xe6,0x3a,0x35,0x2f,0x93,0x8b,0x20,0x89,0x1a,0x46,0x5c,0xfc,0x9b,0xf6,0xbf,0x28, // 0000da60 |.:5/.. ..F\....(|
+0xa8,0xd5,0x8b,0x89,0xae,0xab,0xe4,0xf2,0xce,0x18,0x4d,0xbd,0xd8,0xc3,0xb2,0x9c, // 0000da70 |..........M.....|
+0x63,0x8e,0x6e,0x1a,0x0b,0x0f,0x59,0x39,0x53,0x58,0x92,0xe3,0x0e,0x98,0x8e,0x07, // 0000da80 |c.n...Y9SX......|
+0x78,0xeb,0x89,0x2e,0xf3,0x34,0xd3,0xf7,0xa3,0x6f,0x1b,0xc5,0xb3,0xd8,0x6a,0xb8, // 0000da90 |x....4...o....j.|
+0x4e,0x85,0x5d,0x7d,0x7e,0x70,0x36,0xc1,0xaf,0x8c,0x5d,0x0b,0x01,0xa7,0xe2,0x95, // 0000daa0 |N.]}~p6...].....|
+0xe4,0x55,0xbd,0xbf,0x1d,0xf6,0xfd,0xa3,0x17,0x28,0xd9,0x05,0xd6,0x2e,0xfa,0x59, // 0000dab0 |.U.......(.....Y|
+0xb9,0x3a,0x60,0x3c,0x95,0xc5,0x01,0x24,0x76,0xed,0x44,0x6c,0x37,0x6b,0x7a,0xd3, // 0000dac0 |.:`<...$v.Dl7kz.|
+0xda,0x07,0x9c,0x3e,0xa4,0x42,0xa4,0x68,0x73,0xc0,0xc8,0xe0,0xb2,0xd0,0xfa,0x46, // 0000dad0 |...>.B.hs......F|
+0xeb,0xbb,0xe7,0x92,0x29,0x35,0x6e,0x7e,0x47,0x49,0xcc,0x59,0x3c,0x13,0x70,0xe2, // 0000dae0 |....)5n~GI.Y<.p.|
+0x99,0x8c,0xee,0xb9,0xfb,0x67,0x3d,0x3a,0xac,0xde,0x2e,0xb6,0xe4,0xa3,0x1f,0xef, // 0000daf0 |.....g=:........|
+0xb1,0x54,0xf9,0xbd,0x5a,0x31,0x8a,0x65,0xfe,0x33,0x30,0x3b,0xc8,0xdb,0x8e,0x57, // 0000db00 |.T..Z1.e.30;...W|
+0x26,0x3f,0xb3,0xe4,0x1b,0xc5,0x81,0xe1,0xd0,0xb2,0x3a,0x1f,0x80,0x59,0x35,0x2e, // 0000db10 |&?........:..Y5.|
+0x72,0x92,0x08,0xab,0x55,0x28,0x55,0xd9,0x5e,0xdc,0x5f,0x8f,0x52,0x05,0x5d,0x29, // 0000db20 |r...U(U.^._.R.])|
+0x47,0xb3,0x4b,0x8c,0x6b,0x85,0x84,0x52,0x52,0x53,0x7b,0xe6,0xbb,0x2c,0xfa,0xfa, // 0000db30 |G.K.k..RRS{..,..|
+0x39,0xc0,0x02,0x2d,0xfd,0xf7,0xc6,0x9b,0xd0,0x58,0x2e,0x7f,0x57,0x81,0xd6,0x15, // 0000db40 |9..-.....X..W...|
+0x4b,0x74,0x6e,0x7c,0xeb,0x15,0x6f,0x7c,0xa3,0x78,0x88,0x9d,0x07,0x33,0xed,0x26, // 0000db50 |Ktn|..o|.x...3.&|
+0xd1,0xd2,0xfb,0x30,0x17,0x16,0xe4,0x12,0xa3,0xd2,0x9b,0x27,0x68,0x25,0x83,0x5a, // 0000db60 |...0.......'h%.Z|
+0x2d,0x6d,0x52,0x3c,0xc0,0x2d,0x93,0x68,0x9d,0x81,0x69,0x94,0x04,0x38,0x98,0xde, // 0000db70 |-mR<.-.h..i..8..|
+0x90,0xc4,0x4e,0xc0,0x18,0xca,0x9d,0x4e,0x2e,0x29,0xa3,0x4c,0xcf,0x60,0x50,0x1d, // 0000db80 |..N....N.).L.`P.|
+0x98,0x74,0xb7,0x6b,0xb8,0xc5,0x1d,0xb8,0x52,0x38,0x56,0x2a,0x5e,0x68,0xd6,0xad, // 0000db90 |.t.k....R8V*^h..|
+0xc9,0x18,0x9f,0xcf,0x3c,0x30,0xc3,0xbc,0x36,0x24,0xd0,0xfc,0xeb,0x16,0xe0,0x19, // 0000dba0 |....<0..6$......|
+0xac,0x46,0xe3,0xcc,0xdd,0xf0,0x51,0x56,0x5c,0x7f,0xe4,0xe9,0x04,0x3b,0x5f,0x4f, // 0000dbb0 |.F....QV\....;_O|
+0xdf,0xad,0xa4,0xac,0x06,0xc2,0xd3,0x44,0xc5,0x40,0x71,0x55,0xb6,0xf1,0x06,0x19, // 0000dbc0 |.......D.@qU....|
+0xd7,0x80,0x38,0xcf,0x4a,0xfb,0xae,0xfe,0x6c,0x38,0x24,0x6f,0xde,0xa0,0x8b,0xa1, // 0000dbd0 |..8.J...l8$o....|
+0x2e,0xe0,0xdb,0x6c,0xd8,0x75,0xae,0x2e,0x5f,0x6a,0x3b,0x2d,0xc6,0xaa,0x87,0x1c, // 0000dbe0 |...l.u.._j;-....|
+0x77,0xa4,0x60,0x15,0xf4,0xc6,0x45,0x9d,0xa6,0x78,0xc6,0xe7,0x8a,0x25,0xc3,0x42, // 0000dbf0 |w.`...E..x...%.B|
+0x72,0x84,0x0b,0x2c,0x09,0x76,0x7a,0x3d,0xc6,0xd6,0xb5,0xfe,0x92,0x7a,0xd7,0x04, // 0000dc00 |r..,.vz=.....z..|
+0x62,0x40,0x7d,0xd4,0xb7,0x88,0xf6,0x98,0x50,0x71,0x8f,0xff,0x04,0xb8,0xa4,0xc8, // 0000dc10 |b@}.....Pq......|
+0xea,0xb8,0x7b,0x14,0x87,0xc6,0x2d,0xbe,0x52,0x89,0x91,0xfc,0xb3,0xa5,0x4e,0x35, // 0000dc20 |..{...-.R.....N5|
+0xd3,0x1f,0xe9,0xd3,0xe1,0x45,0x2f,0x28,0x89,0xbc,0x88,0xac,0x6e,0xa9,0x65,0x32, // 0000dc30 |.....E/(....n.e2|
+0xa4,0xd2,0xdf,0x12,0xd3,0x31,0x8a,0x1f,0x0d,0x2f,0x6b,0x58,0xc7,0xfb,0x9d,0xdf, // 0000dc40 |.....1.../kX....|
+0xf8,0xff,0xce,0xdd,0x29,0xd3,0xec,0x61,0x76,0xc9,0x5b,0x81,0xa0,0xaa,0x37,0xd5, // 0000dc50 |....)..av.[...7.|
+0xeb,0x7d,0x05,0xba,0x1b,0x23,0x91,0x75,0x02,0xef,0xac,0x7a,0xb0,0xbd,0xbc,0x29, // 0000dc60 |.}...#.u...z...)|
+0x11,0x19,0x3f,0x5e,0xc4,0xde,0xda,0xfd,0x83,0xdc,0xe6,0x43,0x0e,0xd9,0xeb,0x19, // 0000dc70 |..?^.......C....|
+0xde,0xd9,0x97,0xcc,0xd9,0xc3,0x52,0x49,0x89,0x98,0x5b,0x89,0x98,0x42,0x34,0x9d, // 0000dc80 |......RI..[..B4.|
+0xba,0x88,0x80,0x27,0xb4,0x50,0x9e,0xc7,0x60,0x60,0xb9,0xa6,0xf4,0x36,0x02,0xac, // 0000dc90 |...'.P..``...6..|
+0x84,0x15,0x12,0x47,0x3a,0x23,0xae,0xda,0x47,0x4c,0xb4,0xfe,0xd7,0xed,0xc1,0xa4, // 0000dca0 |...G:#..GL......|
+0x50,0xbd,0xce,0xfe,0xb1,0xe4,0x9a,0x8e,0x9f,0x5d,0xdc,0x64,0x27,0x5e,0x52,0x28, // 0000dcb0 |P........].d'^R(|
+0xe0,0x94,0xf0,0xd0,0xac,0x2f,0xe5,0xca,0x03,0x7a,0x90,0x88,0xca,0xdb,0xcd,0x3f, // 0000dcc0 |...../...z.....?|
+0x32,0x62,0x64,0x8d,0xb8,0xe6,0xf9,0x67,0xc8,0x6c,0xce,0xbc,0x6c,0x76,0x8a,0x04, // 0000dcd0 |2bd....g.l..lv..|
+0x51,0xdc,0x44,0xd4,0x4a,0x63,0x44,0xf7,0x0a,0xc0,0x85,0x99,0x0b,0x68,0xe6,0xa7, // 0000dce0 |Q.D.JcD......h..|
+0x04,0x94,0x2d,0xa6,0x65,0xee,0xbe,0x65,0xcc,0xf8,0x2b,0x69,0x09,0xa3,0xc8,0x78, // 0000dcf0 |..-.e..e..+i...x|
+0x2f,0x62,0xc8,0xe7,0x95,0x97,0x4c,0x8c,0x3f,0x99,0x6f,0x7c,0x36,0x43,0x91,0xa1, // 0000dd00 |/b....L.?.o|6C..|
+0x25,0xe0,0xca,0xef,0xa8,0x60,0x7c,0xe0,0xe1,0xd1,0xa1,0x0c,0x56,0x28,0x4c,0x64, // 0000dd10 |%....`|.....V(Ld|
+0x20,0x0a,0x7d,0x1a,0x31,0x01,0x0b,0x75,0x7d,0x03,0x25,0x46,0xb3,0x20,0xd3,0x1a, // 0000dd20 | .}.1..u}.%F. ..|
+0x05,0x84,0x28,0x44,0x3f,0x32,0xfc,0xb3,0x13,0xcb,0x05,0xac,0x92,0x8f,0xf0,0xfa, // 0000dd30 |..(D?2..........|
+0xef,0xad,0x81,0x2a,0x83,0x70,0x55,0xae,0x91,0xd8,0x3c,0x1c,0x1c,0xce,0x8f,0x55, // 0000dd40 |...*.pU...<....U|
+0xd3,0x36,0x9d,0x5e,0x2a,0x32,0x1f,0x32,0xde,0xf2,0x9c,0x82,0x8a,0x2d,0x31,0xd3, // 0000dd50 |.6.^*2.2.....-1.|
+0xc8,0xb5,0xa3,0x10,0x7d,0x02,0x20,0xb7,0x4c,0xed,0xc0,0xf4,0xb3,0x26,0x07,0xb9, // 0000dd60 |....}. .L....&..|
+0xe7,0xb9,0x6c,0x33,0xb0,0xf4,0xee,0x93,0xa9,0xad,0xa4,0xed,0x1a,0x6b,0xff,0x41, // 0000dd70 |..l3.........k.A|
+0x0c,0x23,0x26,0x7a,0x68,0x8b,0xba,0xa6,0x27,0x1f,0x53,0xed,0x06,0xf7,0x8d,0xd2, // 0000dd80 |.#&zh...'.S.....|
+0xbf,0xfc,0x35,0xdf,0x81,0x84,0x50,0xbe,0xcb,0x94,0xcf,0x7c,0xb3,0x09,0xe5,0x79, // 0000dd90 |..5...P....|...y|
+0x7a,0xfa,0xe3,0x5a,0x45,0xca,0x3f,0x7a,0x96,0x30,0x9b,0xd4,0x7b,0xb9,0xf6,0x2c, // 0000dda0 |z..ZE.?z.0..{..,|
+0xb9,0x8d,0xfe,0x5a,0x7a,0xb2,0xfa,0x31,0x85,0x87,0x02,0x03,0xaf,0xec,0xa1,0x47, // 0000ddb0 |...Zz..1.......G|
+0xcc,0xe3,0xfe,0x40,0xe1,0xec,0x20,0xc0,0x0a,0x56,0x8b,0x58,0x7d,0x7e,0x23,0x02, // 0000ddc0 |...@.. ..V.X}~#.|
+0x88,0x9a,0x3a,0xd5,0xb0,0xc0,0x09,0xe1,0x1f,0xf4,0x84,0x80,0xe8,0xc3,0x07,0x6a, // 0000ddd0 |..:............j|
+0x7b,0x35,0xd5,0xf8,0x01,0x0c,0x59,0x69,0x55,0x16,0x49,0x5b,0x08,0xa5,0xb7,0xdb, // 0000dde0 |{5....YiU.I[....|
+0x4d,0x40,0x74,0x27,0xba,0x9d,0xc1,0x56,0x1c,0x0c,0x7e,0x34,0xb4,0xb5,0x75,0x30, // 0000ddf0 |M@t'...V..~4..u0|
+0x5e,0x08,0x60,0x22,0x03,0xd0,0xed,0x08,0x33,0xe3,0xe3,0x12,0x3f,0x95,0xd8,0x25, // 0000de00 |^.`"....3...?..%|
+0x09,0x37,0xaf,0x68,0xa2,0xeb,0x00,0xed,0xa4,0xd6,0xbd,0x34,0x15,0x8b,0xf1,0xa5, // 0000de10 |.7.h.......4....|
+0x26,0x99,0x20,0x95,0xfc,0x50,0xd3,0x02,0xf5,0x87,0x7b,0xc2,0x4e,0xab,0x6d,0x2b, // 0000de20 |&. ..P....{.N.m+|
+0xb7,0xcb,0x4f,0x45,0xc0,0x9a,0xbb,0xf1,0x5d,0x00,0x9b,0xab,0xd6,0xb5,0x7d,0xbb, // 0000de30 |..OE....].....}.|
+0x07,0x78,0x8c,0x42,0xe8,0xc7,0x83,0x6b,0xf9,0x2d,0x20,0x38,0x55,0xad,0x53,0x65, // 0000de40 |.x.B...k.- 8U.Se|
+0x11,0x69,0xc6,0xad,0x3a,0xc3,0xbd,0xe4,0x2a,0x5e,0xff,0xb6,0x95,0xa7,0x79,0xe8, // 0000de50 |.i..:...*^....y.|
+0x83,0xfd,0xce,0x7d,0xb1,0x05,0x49,0x40,0x26,0x8d,0xcd,0x08,0xee,0xa6,0xa4,0xcb, // 0000de60 |...}..I@&.......|
+0x8e,0x1b,0x62,0x2f,0xc7,0x1e,0x08,0x40,0x19,0xa1,0x5a,0xbe,0xa6,0x41,0xac,0x4a, // 0000de70 |..b/...@..Z..A.J|
+0xd4,0x03,0x0e,0xf9,0x93,0xf7,0x77,0x01,0x1b,0x3e,0x0d,0x2d,0x74,0xf2,0xc5,0x3a, // 0000de80 |......w..>.-t..:|
+0xb9,0x56,0xf7,0xda,0xa6,0xb1,0x65,0x69,0x2c,0xde,0xd9,0x21,0xab,0xbd,0x75,0x6e, // 0000de90 |.V....ei,..!..un|
+0xfc,0x32,0x8d,0x02,0x27,0x8c,0xff,0x9e,0x53,0x50,0xef,0x5c,0x70,0x60,0x58,0xe9, // 0000dea0 |.2..'...SP.\p`X.|
+0x55,0x81,0xf4,0xdc,0x72,0xfc,0x4b,0x01,0xca,0xc1,0xdb,0x1d,0xf6,0x0d,0xcf,0xcc, // 0000deb0 |U...r.K.........|
+0xb3,0x4a,0x2e,0xd2,0x25,0x4a,0x54,0xda,0x76,0xc8,0x49,0x45,0xe3,0x5d,0x7a,0x27, // 0000dec0 |.J..%JT.v.IE.]z'|
+0xc4,0x61,0x69,0xef,0x28,0xbf,0x0e,0xaa,0x3f,0x04,0x48,0x97,0xcd,0xaf,0x55,0x9e, // 0000ded0 |.ai.(...?.H...U.|
+0xf5,0x68,0x1c,0x08,0xd6,0x95,0xe2,0xf9,0x8a,0xf7,0x8d,0xf4,0xf5,0x02,0x25,0x3e, // 0000dee0 |.h............%>|
+0xe3,0x3b,0xc6,0x41,0xef,0x31,0x49,0xf0,0x19,0xc2,0xea,0x04,0xe6,0xbf,0x68,0xe3, // 0000def0 |.;.A.1I.......h.|
+0x9b,0x0f,0xcd,0xbc,0xfc,0x10,0x78,0x9b,0x62,0xa8,0xaa,0xba,0x38,0x02,0x17,0x12, // 0000df00 |......x.b...8...|
+0x6b,0xba,0x5a,0xec,0xe2,0x08,0xeb,0x47,0x21,0x58,0x1b,0xa9,0x10,0xd9,0x90,0x5d, // 0000df10 |k.Z....G!X.....]|
+0x99,0xba,0x68,0xa1,0x4e,0x72,0x30,0x06,0x6d,0x40,0xb9,0x5b,0xa2,0x15,0x86,0x5e, // 0000df20 |..h.Nr0.m@.[...^|
+0x31,0xaa,0x7b,0x59,0xf2,0x63,0xdd,0xd2,0xa4,0x9e,0xfe,0xfd,0x1f,0x57,0xbd,0x5b, // 0000df30 |1.{Y.c.......W.[|
+0xee,0xe9,0x2a,0x59,0x97,0xc9,0x18,0x3c,0x39,0x97,0x2c,0xae,0x0a,0xdc,0x8a,0x13, // 0000df40 |..*Y...<9.,.....|
+0x92,0xfe,0x10,0x0a,0x30,0xfd,0x6d,0x3a,0xf1,0x4b,0x01,0xe4,0x34,0xcb,0x8b,0xcc, // 0000df50 |....0.m:.K..4...|
+0x3f,0xd3,0xb7,0xe9,0xe7,0xec,0xd9,0x2f,0x59,0x4f,0x49,0x87,0x65,0x8b,0xbe,0xb7, // 0000df60 |?....../YOI.e...|
+0x19,0x9c,0x28,0xab,0x06,0x4e,0x6a,0x17,0x2d,0x75,0x6d,0xbb,0xb8,0x1e,0x26,0x30, // 0000df70 |..(..Nj.-um...&0|
+0x55,0xa4,0xb0,0x90,0x0b,0xb9,0xf7,0xfb,0x03,0xb5,0x7f,0x62,0x36,0x99,0x8a,0x2f, // 0000df80 |U..........b6../|
+0xa4,0xc1,0x93,0xf0,0x9a,0xbb,0x2f,0xd0,0xb5,0xd2,0xf8,0x7e,0x56,0x4f,0x54,0x67, // 0000df90 |....../....~VOTg|
+0xa7,0x2d,0xcc,0x1f,0x3f,0x9d,0x24,0x9d,0x4a,0x8f,0x10,0x31,0x30,0x9f,0xc5,0xd8, // 0000dfa0 |.-..?.$.J..10...|
+0x4d,0xaf,0x96,0x47,0x6b,0xa4,0x48,0xc0,0x56,0xbe,0x53,0x04,0xe5,0x9b,0x2f,0x8d, // 0000dfb0 |M..Gk.H.V.S.../.|
+0xb9,0xaa,0x04,0x3e,0xfc,0x85,0xb5,0x62,0x14,0x10,0xd3,0x31,0x1e,0x2e,0xe2,0xd0, // 0000dfc0 |...>...b...1....|
+0x35,0x69,0xac,0x3e,0x48,0x2c,0xa4,0x02,0x12,0xa5,0x46,0x35,0x1a,0xed,0x6b,0xd3, // 0000dfd0 |5i.>H,....F5..k.|
+0x3b,0x40,0xa2,0x3c,0xa2,0xe8,0xf5,0x94,0x85,0x6b,0x08,0x89,0x28,0x4b,0x17,0x8e, // 0000dfe0 |;@.<.....k..(K..|
+0xd0,0x92,0x54,0x21,0x37,0x63,0x23,0x6d,0x35,0x84,0x5c,0x6f,0xc6,0x2d,0xc1,0x99, // 0000dff0 |..T!7c#m5.\o.-..|
+0x4b,0x9f,0xcb,0xb4,0x0f,0x2c,0xe4,0x2b,0xa8,0xaf,0x17,0x49,0x8b,0xbc,0xc3,0xd6, // 0000e000 |K....,.+...I....|
+0x33,0x36,0xf7,0x6d,0x19,0xc4,0x89,0x53,0xad,0xb9,0x78,0xa1,0x0c,0xec,0xfd,0x5f, // 0000e010 |36.m...S..x...._|
+0xa6,0x60,0xaa,0xe1,0xc5,0x3a,0x7b,0x12,0x73,0x29,0xb7,0xb1,0x83,0x45,0x5f,0x5d, // 0000e020 |.`...:{.s)...E_]|
+0x79,0x72,0xb1,0xee,0x9f,0xad,0x7b,0xe5,0x00,0x70,0x9a,0xcb,0x08,0x0c,0xbe,0x2b, // 0000e030 |yr....{..p.....+|
+0x9e,0xdd,0x37,0xff,0x59,0xd9,0x0d,0x4d,0x79,0x9a,0x1e,0xdd,0xbf,0x62,0x6b,0x6b, // 0000e040 |..7.Y..My....bkk|
+0xfa,0xef,0x3c,0x74,0xed,0xf0,0xea,0x9a,0x40,0x6e,0x96,0x6c,0x54,0xd3,0x12,0xb3, // 0000e050 |..<t....@n.lT...|
+0x13,0x76,0xf8,0x61,0xe3,0x8b,0x74,0x4d,0x5e,0x97,0x83,0x29,0x45,0xb2,0x6c,0x24, // 0000e060 |.v.a..tM^..)E.l$|
+0xaa,0xf7,0x3c,0x6d,0xb0,0xc5,0x60,0xbb,0x02,0xcf,0xca,0x7b,0xf3,0x89,0x87,0xed, // 0000e070 |..<m..`....{....|
+0x30,0xf1,0xce,0x3b,0x67,0x84,0x66,0x60,0x62,0x22,0x15,0x23,0x6a,0x97,0x72,0xe8, // 0000e080 |0..;g.f`b".#j.r.|
+0xb6,0xce,0x52,0x00,0xbf,0xb3,0x6a,0x93,0x35,0x15,0x92,0xcf,0x74,0x7b,0xd9,0x5d, // 0000e090 |..R...j.5...t{.]|
+0xa2,0x51,0xb1,0xac,0xea,0xc7,0xd7,0x82,0xca,0x21,0xd9,0x71,0xa0,0x5b,0x62,0x5d, // 0000e0a0 |.Q.......!.q.[b]|
+0x25,0x29,0x57,0x06,0x2f,0x04,0xb2,0xc1,0x34,0x9f,0x8b,0xbd,0x17,0x21,0x43,0x2a, // 0000e0b0 |%)W./...4....!C*|
+0x14,0x5f,0xcf,0xdc,0x67,0x45,0x8a,0x64,0x6b,0x3b,0x49,0x9d,0xb7,0xe6,0x42,0x3e, // 0000e0c0 |._..gE.dk;I...B>|
+0x37,0x80,0xee,0x88,0x6a,0xf2,0xd7,0x92,0xf1,0xcd,0xba,0x40,0xd4,0xc8,0x04,0x70, // 0000e0d0 |7...j......@...p|
+0x24,0x5d,0x15,0xe8,0x9c,0xfe,0xec,0x9f,0x67,0xc5,0x6f,0x20,0x9c,0x58,0x9d,0x95, // 0000e0e0 |$]......g.o .X..|
+0xea,0xe9,0xb0,0x42,0x52,0x09,0x2d,0x1e,0xb5,0x2a,0x5e,0xf8,0x0b,0x39,0x40,0x29, // 0000e0f0 |...BR.-..*^..9@)|
+0x0b,0x6f,0x18,0x42,0x43,0x29,0x99,0xf3,0x35,0x1f,0xfd,0x69,0x0f,0x2c,0xaf,0x3b, // 0000e100 |.o.BC)..5..i.,.;|
+0x91,0xac,0x01,0xf1,0x7a,0xcd,0x3b,0x73,0x7d,0x53,0xd9,0xb5,0x6b,0xd0,0xe2,0xd7, // 0000e110 |....z.;s}S..k...|
+0x28,0x1e,0xad,0xfc,0x3d,0x3d,0x6c,0xb0,0x0f,0x4d,0xa0,0x71,0xac,0x09,0x4b,0x55, // 0000e120 |(...==l..M.q..KU|
+0x2f,0xf7,0x24,0x94,0xbf,0xae,0x27,0xcb,0xbf,0x16,0x6a,0x5c,0xb3,0x60,0x59,0xbc, // 0000e130 |/.$...'...j\.`Y.|
+0xdd,0x6c,0xe3,0x4a,0x1b,0xd9,0x1a,0x61,0xc7,0x92,0xfb,0x49,0xa0,0x17,0x4f,0x96, // 0000e140 |.l.J...a...I..O.|
+0x05,0x5a,0x8b,0xe3,0x6d,0x30,0xc5,0xed,0xa7,0xba,0x3b,0x5f,0x4c,0xe5,0xf8,0x38, // 0000e150 |.Z..m0....;_L..8|
+0xfb,0xc9,0x7a,0xbc,0x0e,0xb9,0xc7,0x4d,0x12,0xc6,0x02,0x95,0x8c,0xc7,0x5d,0x0a, // 0000e160 |..z....M......].|
+0x1d,0x26,0x88,0xac,0x85,0x46,0x28,0x9e,0xb2,0xb7,0xfc,0x93,0x2d,0x65,0x70,0x0d, // 0000e170 |.&...F(.....-ep.|
+0x54,0x21,0x12,0x33,0x96,0xc2,0xd8,0xb8,0xe6,0xd7,0x16,0xf8,0xcd,0xb9,0xd5,0x7f, // 0000e180 |T!.3............|
+0x07,0xb2,0xa1,0x99,0xdb,0x3a,0x0f,0x34,0xef,0x5e,0x93,0x1b,0x79,0x7f,0x5e,0x97, // 0000e190 |.....:.4.^..y.^.|
+0x2b,0x91,0x49,0xb3,0x79,0x58,0xdd,0x79,0x69,0x4b,0xba,0xf1,0x00,0xff,0x9b,0xa4, // 0000e1a0 |+.I.yX.yiK......|
+0x7d,0x75,0x3f,0xce,0x71,0x3d,0xcc,0x19,0x24,0xdb,0xd6,0xb2,0xdf,0x23,0x1b,0x30, // 0000e1b0 |}u?.q=..$....#.0|
+0xa9,0xe9,0xb7,0xa9,0xee,0xbb,0x5f,0x74,0x73,0x69,0x74,0xc7,0x91,0x49,0xa2,0x01, // 0000e1c0 |......_tsit..I..|
+0xb5,0x93,0x68,0xb6,0xf4,0x45,0xab,0xf2,0x7a,0x23,0xf6,0x44,0x45,0x5d,0x2a,0x74, // 0000e1d0 |..h..E..z#.DE]*t|
+0x66,0x5c,0x07,0x99,0x47,0xd7,0xba,0xa9,0x6c,0xcf,0x8c,0xff,0x1b,0x74,0xcf,0x6b, // 0000e1e0 |f\..G...l....t.k|
+0x7f,0xb1,0x77,0x0d,0x48,0xf5,0x38,0x7e,0xfe,0xa7,0xd3,0x63,0x2a,0xe7,0xe9,0x78, // 0000e1f0 |..w.H.8~...c*..x|
+0xa0,0xb5,0xaf,0x83,0xdb,0x0b,0x13,0x39,0x97,0x6b,0x7d,0x38,0xcb,0x24,0x19,0xa5, // 0000e200 |.......9.k}8.$..|
+0xc3,0x03,0x8b,0x87,0x22,0x93,0x93,0xc0,0xd5,0xfc,0xd0,0x47,0xe1,0x59,0x36,0x5d, // 0000e210 |...."......G.Y6]|
+0x6f,0x8f,0x3a,0xd4,0xae,0xf2,0x41,0x0c,0x20,0x4f,0xc0,0x7c,0x71,0xd0,0x33,0x47, // 0000e220 |o.:...A. O.|q.3G|
+0x99,0x7e,0x05,0x10,0x4a,0xd2,0x1c,0x4e,0x9f,0x96,0xd1,0xf8,0x5e,0xfe,0x6e,0x0e, // 0000e230 |.~..J..N....^.n.|
+0xda,0x33,0x91,0x15,0x13,0xa1,0x23,0x6c,0x33,0x76,0xfc,0x25,0x13,0x45,0xc8,0xd4, // 0000e240 |.3....#l3v.%.E..|
+0x9a,0xf7,0xfe,0x5a,0xfb,0xc9,0x7a,0xf4,0x38,0x19,0xfc,0xbb,0x84,0x1d,0x69,0xa5, // 0000e250 |...Z..z.8.....i.|
+0x63,0x00,0x52,0x6f,0x4b,0xf7,0xec,0xee,0x49,0xe2,0x4b,0x3d,0x74,0xae,0xaa,0x61, // 0000e260 |c.RoK...I.K=t..a|
+0xb2,0x0c,0x8c,0xf8,0xc5,0x48,0x9f,0x75,0xfb,0xc7,0xac,0x71,0xf3,0x59,0x5a,0xfc, // 0000e270 |.....H.u...q.YZ.|
+0x2b,0xd1,0x5a,0xca,0x1b,0x07,0x60,0xa7,0x30,0x7c,0x26,0x8c,0x3e,0x7a,0xad,0xe8, // 0000e280 |+.Z...`.0|&.>z..|
+0xed,0x3c,0x72,0x3f,0xd6,0x7a,0x94,0xf3,0x5e,0xa1,0xe0,0x6d,0x63,0xf9,0xb4,0x53, // 0000e290 |.<r?.z..^..mc..S|
+0x3b,0x8b,0xe8,0x5e,0xe8,0x85,0x82,0x04,0xed,0x15,0x43,0x87,0x05,0xc1,0xf3,0xf6, // 0000e2a0 |;..^......C.....|
+0xae,0x81,0xd0,0x10,0xe8,0x3e,0x65,0x5d,0x1f,0x8d,0x42,0x6d,0xa9,0xb1,0x20,0xc6, // 0000e2b0 |.....>e]..Bm.. .|
+0x0c,0x23,0xd8,0xc6,0x4c,0xba,0xf3,0x4b,0xde,0x6e,0x56,0x7e,0x00,0xc4,0xdf,0x26, // 0000e2c0 |.#..L..K.nV~...&|
+0xcd,0x48,0xbb,0x8c,0x15,0x9d,0x47,0x14,0xdd,0xd2,0x6f,0x4b,0x35,0xf8,0x92,0xcf, // 0000e2d0 |.H....G...oK5...|
+0xd3,0x27,0x7c,0xdc,0x20,0x63,0x22,0x41,0xe6,0x04,0x02,0xbc,0x3f,0x55,0xe2,0xca, // 0000e2e0 |.'|. c"A....?U..|
+0xcb,0xc4,0x1d,0x50,0x5f,0xcc,0x9c,0xe8,0x47,0x31,0xd5,0x63,0x17,0x84,0x6f,0xe1, // 0000e2f0 |...P_...G1.c..o.|
+0xd2,0x0b,0xcd,0x1a,0x73,0x68,0xdf,0xbc,0x0e,0xe8,0x1f,0x60,0x22,0xa2,0x6a,0x66, // 0000e300 |....sh.....`".jf|
+0x6f,0xcc,0x83,0x6c,0x4e,0x34,0xa4,0x58,0x97,0x2a,0xae,0xde,0x50,0x75,0xf0,0x1b, // 0000e310 |o..lN4.X.*..Pu..|
+0xc2,0x82,0x00,0xfe,0xcf,0xe1,0xb2,0x7c,0x31,0x08,0x82,0x06,0x88,0xb6,0x02,0xa7, // 0000e320 |.......|1.......|
+0x35,0x50,0x36,0x34,0xc2,0x64,0x3d,0x46,0x7c,0x08,0xd8,0x85,0x27,0xe4,0x92,0x45, // 0000e330 |5P64.d=F|...'..E|
+0x3f,0xb9,0xaf,0xd5,0x7e,0xa9,0xef,0x73,0xe2,0x71,0x23,0xc0,0xe9,0xe7,0xcb,0x12, // 0000e340 |?...~..s.q#.....|
+0x70,0x19,0xec,0x71,0x3d,0xbd,0x6f,0x83,0x91,0x01,0x88,0xdf,0xa0,0x10,0x40,0x08, // 0000e350 |p..q=.o.......@.|
+0x83,0xff,0xc3,0x91,0xb4,0x92,0xd8,0x07,0x98,0x92,0x34,0xd2,0x7a,0x1d,0x7f,0x7a, // 0000e360 |..........4.z..z|
+0x5f,0x33,0xf5,0x1f,0x22,0xe0,0xcf,0xeb,0xd7,0xaa,0x9c,0x69,0x61,0x04,0x30,0xdd, // 0000e370 |_3.."......ia.0.|
+0x44,0x6e,0x9a,0xa0,0x16,0xbd,0x36,0x49,0xa6,0x7a,0xde,0xdf,0xa6,0x13,0xe3,0x64, // 0000e380 |Dn....6I.z.....d|
+0x41,0x8f,0x17,0x7b,0x85,0x84,0x5f,0x25,0x7a,0x18,0x71,0x73,0xfd,0x35,0x0b,0xf8, // 0000e390 |A..{.._%z.qs.5..|
+0x58,0xc2,0x41,0x9b,0x83,0x38,0x50,0xdc,0xae,0x89,0x7f,0x40,0xc2,0x2f,0xe5,0xac, // 0000e3a0 |X.A..8P....@./..|
+0x32,0xf4,0xf2,0x45,0x82,0xb3,0x18,0xf5,0x53,0xaa,0x2b,0x1c,0x1c,0x4a,0x43,0x7b, // 0000e3b0 |2..E....S.+..JC{|
+0x40,0xa5,0x6d,0x1e,0x22,0xc0,0xfc,0xba,0xe6,0x9c,0x0a,0x41,0xfd,0x79,0xde,0x1e, // 0000e3c0 |@.m."......A.y..|
+0x2e,0x82,0xf6,0xfc,0xf6,0x1f,0xd7,0xf5,0xe0,0x56,0xb3,0x0e,0x7e,0x56,0x82,0xbd, // 0000e3d0 |.........V..~V..|
+0x6f,0x7e,0xed,0x71,0xc5,0xd7,0x88,0x0b,0x9c,0x31,0x71,0x9a,0x41,0xec,0x43,0xaf, // 0000e3e0 |o~.q.....1q.A.C.|
+0xcf,0xf7,0x16,0x50,0x1f,0xcd,0xd1,0xeb,0x18,0xfe,0x12,0x7c,0x78,0x37,0x5b,0x3c, // 0000e3f0 |...P.......|x7[<|
+0x6b,0x65,0xe7,0x8f,0xe0,0x18,0x3b,0xf8,0x0f,0x3d,0x69,0x7a,0x52,0x73,0x41,0xc7, // 0000e400 |ke....;..=izRsA.|
+0x17,0xdc,0x0d,0xe4,0xc3,0x0f,0x8d,0x6d,0x00,0x92,0xff,0x34,0x0d,0xe3,0xcb,0x65, // 0000e410 |.......m...4...e|
+0xdc,0x43,0x9b,0xc8,0xe1,0x2b,0xcc,0x73,0xa9,0xe4,0x21,0xff,0x01,0xb0,0x86,0x68, // 0000e420 |.C...+.s..!....h|
+0x81,0x12,0x41,0x70,0xda,0x0e,0x66,0x4b,0xfc,0x21,0xd1,0xc2,0x2b,0x6a,0x03,0xbd, // 0000e430 |..Ap..fK.!..+j..|
+0xd9,0x91,0x7c,0xd7,0x37,0x73,0x44,0xbd,0x88,0x78,0xda,0x8b,0x5d,0x02,0x2c,0x13, // 0000e440 |..|.7sD..x..].,.|
+0x04,0x92,0x24,0xb1,0x16,0x26,0x39,0x78,0xd2,0x95,0x61,0xa7,0x09,0x9d,0xbc,0x30, // 0000e450 |..$..&9x..a....0|
+0x6f,0x6b,0xfb,0x98,0x28,0x4b,0xef,0x2c,0xd0,0xac,0xdb,0x38,0x23,0x3e,0xa0,0xbc, // 0000e460 |ok..(K.,...8#>..|
+0xbe,0xf2,0xab,0xbe,0xd9,0x6a,0xb3,0x5f,0xac,0x01,0x50,0x68,0xc7,0x78,0xac,0xfd, // 0000e470 |.....j._..Ph.x..|
+0x45,0xa1,0x5f,0xa9,0x06,0xfb,0x76,0xc3,0x4c,0x9b,0xe7,0x0a,0x73,0x1e,0x29,0x0f, // 0000e480 |E._...v.L...s.).|
+0xe3,0x78,0x53,0x76,0x59,0x02,0x9f,0xad,0x9f,0x5b,0x9c,0x93,0x78,0x80,0x71,0x6c, // 0000e490 |.xSvY....[..x.ql|
+0xff,0x12,0x01,0xe1,0xb8,0xd8,0x0a,0x33,0x7e,0x13,0x52,0x35,0x8f,0x90,0x28,0x0a, // 0000e4a0 |.......3~.R5..(.|
+0x92,0xc5,0x7d,0xed,0x94,0x0a,0xf6,0xf7,0x2a,0x04,0x4f,0x00,0xdd,0x1f,0x53,0x13, // 0000e4b0 |..}.....*.O...S.|
+0x4d,0x3d,0x83,0x7a,0xab,0x2e,0xe1,0xc1,0xf9,0xe8,0x93,0x38,0xff,0xc6,0x6a,0xbe, // 0000e4c0 |M=.z.......8..j.|
+0x87,0x57,0x31,0x42,0x3e,0xca,0xa8,0xb6,0xec,0x46,0xea,0xba,0xab,0x6d,0x60,0x95, // 0000e4d0 |.W1B>....F...m`.|
+0xd7,0x1e,0x40,0x43,0xa2,0x60,0x6d,0xc4,0x61,0xd6,0xb0,0x7c,0x8c,0x34,0xe5,0x39, // 0000e4e0 |..@C.`m.a..|.4.9|
+0x7b,0xa7,0x88,0xbd,0x68,0x25,0x57,0x23,0xd0,0xdf,0xaa,0x69,0xdf,0xe8,0x48,0x92, // 0000e4f0 |{...h%W#...i..H.|
+0x92,0x9b,0x6a,0x8a,0xc1,0x68,0xed,0x43,0x93,0x3f,0xb6,0xda,0x57,0xfb,0x89,0x53, // 0000e500 |..j..h.C.?..W..S|
+0x52,0xa7,0xb9,0x70,0x7b,0x06,0x74,0x6d,0x02,0x82,0x79,0xa7,0x08,0x8d,0x38,0x36, // 0000e510 |R..p{.tm..y...86|
+0x7e,0x99,0x6a,0xd1,0xc5,0xb2,0x31,0xe9,0x9d,0xc2,0xd6,0x5c,0x9b,0xd0,0x08,0xe5, // 0000e520 |~.j...1....\....|
+0xa8,0x11,0x13,0x6e,0xd1,0x06,0xa0,0xbe,0x18,0x08,0xf5,0x09,0x29,0xfa,0x90,0x03, // 0000e530 |...n........)...|
+0x83,0xf0,0xf7,0xb7,0x79,0xb9,0xe2,0x91,0x11,0xcf,0x5c,0xd7,0x55,0x27,0x9a,0x8a, // 0000e540 |....y.....\.U'..|
+0xfd,0x00,0xbe,0xc2,0xe1,0x8a,0xbc,0x80,0x33,0x0f,0x31,0x3e,0x5e,0xe8,0xaf,0x0e, // 0000e550 |........3.1>^...|
+0x2d,0x78,0x3e,0x2a,0x5a,0x2f,0x9a,0x5a,0x8d,0x68,0x58,0xbe,0x12,0xe7,0xdd,0x30, // 0000e560 |-x>*Z/.Z.hX....0|
+0xf4,0xd0,0xce,0xa8,0xff,0xf4,0x79,0xef,0x24,0xc6,0x28,0xfe,0xa4,0xa4,0x9f,0xe3, // 0000e570 |......y.$.(.....|
+0x11,0xd1,0xa0,0x19,0x60,0x4f,0x31,0xc4,0x6a,0x03,0xd4,0x3c,0x73,0x9a,0xf5,0x89, // 0000e580 |....`O1.j..<s...|
+0x07,0x09,0xb0,0xa4,0xdf,0xe1,0x40,0x71,0xe9,0x63,0x59,0x63,0x06,0x43,0x2a,0xd3, // 0000e590 |......@q.cYc.C*.|
+0xba,0x34,0xb8,0xb0,0x9c,0x15,0xeb,0x6f,0x2e,0x5a,0x92,0x73,0x5c,0x49,0x2d,0x8e, // 0000e5a0 |.4.....o.Z.s\I-.|
+0xf8,0x34,0xd4,0xf2,0x8e,0x89,0xbe,0x55,0x3a,0x77,0xea,0x15,0x10,0x89,0x3e,0xba, // 0000e5b0 |.4.....U:w....>.|
+0x9a,0x68,0x3b,0x98,0x27,0xc1,0x09,0x13,0xcf,0x67,0xac,0x26,0xf4,0xbd,0x25,0x11, // 0000e5c0 |.h;.'....g.&..%.|
+0x07,0xf5,0x27,0x6c,0x67,0x9e,0x26,0xd5,0xf4,0x76,0x2e,0xa1,0x56,0x35,0xf9,0x34, // 0000e5d0 |..'lg.&..v..V5.4|
+0xb1,0x5a,0x53,0xf3,0xf9,0x81,0x29,0xcf,0xda,0x0f,0xa6,0x6e,0xd5,0xd2,0x14,0x6b, // 0000e5e0 |.ZS...)....n...k|
+0xa6,0xd6,0x71,0x47,0x45,0xc3,0xfb,0xa3,0x13,0x82,0xf9,0x9e,0xf9,0xaa,0x52,0x94, // 0000e5f0 |..qGE.........R.|
+0x28,0xe4,0x92,0x2f,0xe2,0x54,0x18,0xfa,0xbe,0x22,0xfa,0x25,0x77,0x00,0x88,0x3d, // 0000e600 |(../.T...".%w..=|
+0x0b,0xa9,0xf8,0x89,0xe8,0xe9,0xfe,0x8c,0xbc,0xf9,0x26,0x8c,0x4f,0x6e,0xe6,0xe3, // 0000e610 |..........&.On..|
+0xb2,0xf1,0xe8,0x5c,0x08,0x49,0xb8,0x42,0x3d,0x20,0x81,0xfb,0x01,0x52,0x77,0x3b, // 0000e620 |...\.I.B= ...Rw;|
+0xb0,0xf0,0x71,0x07,0x94,0xac,0x52,0xf4,0x6a,0x99,0x42,0x20,0x0b,0x39,0x33,0x30, // 0000e630 |..q...R.j.B .930|
+0xd8,0x17,0x77,0xb2,0xf2,0xec,0x9f,0xf4,0xda,0x44,0xac,0xe2,0x8b,0xd9,0x05,0x0f, // 0000e640 |..w......D......|
+0x49,0x5c,0x88,0x30,0x4f,0xaa,0x55,0x74,0xc4,0x85,0x8c,0xf2,0x36,0x38,0x94,0x83, // 0000e650 |I\.0O.Ut....68..|
+0x20,0xf0,0x9a,0xbd,0xe3,0xc4,0x83,0xc9,0x1f,0xc0,0x5c,0x5f,0x7a,0xdc,0x59,0xcb, // 0000e660 | .........\_z.Y.|
+0x7b,0xe0,0x22,0x4f,0x3d,0x62,0x87,0x5e,0x4b,0xe6,0xf6,0xf2,0x4b,0x7d,0x09,0x06, // 0000e670 |{."O=b.^K...K}..|
+0xbb,0x45,0xfb,0x47,0x10,0xf7,0xe4,0xc7,0xff,0x4e,0x5f,0x8d,0xc4,0xa5,0x17,0x3d, // 0000e680 |.E.G.....N_....=|
+0xc3,0x3f,0x7e,0xdd,0xc2,0x6b,0x34,0x5d,0x0f,0xa5,0xf4,0xb8,0x3e,0xfd,0x0c,0x1d, // 0000e690 |.?~..k4]....>...|
+0x79,0x76,0x23,0x90,0xcd,0x1d,0x0b,0x33,0x30,0x19,0x44,0x9d,0x78,0xc5,0xb9,0xcc, // 0000e6a0 |yv#....30.D.x...|
+0x5e,0x50,0xec,0x53,0x61,0x8a,0x5a,0xbe,0xce,0x72,0x0c,0x87,0x6a,0xde,0x11,0xe1, // 0000e6b0 |^P.Sa.Z..r..j...|
+0x72,0xb0,0x27,0xd1,0xe2,0xb6,0xd1,0x98,0x41,0x0a,0xee,0x8d,0x11,0x04,0x2c,0xbd, // 0000e6c0 |r.'.....A.....,.|
+0xef,0x0b,0x9a,0x9e,0x03,0x07,0xab,0x82,0x3b,0x1c,0x3a,0x71,0xb7,0x69,0x96,0xbe, // 0000e6d0 |........;.:q.i..|
+0x93,0xd7,0x60,0x48,0x1f,0xfd,0x34,0xd6,0xef,0x1b,0xb6,0x4e,0x94,0x3f,0xee,0x01, // 0000e6e0 |..`H..4....N.?..|
+0x13,0x2a,0xe7,0xc5,0xaa,0x8e,0x62,0x07,0xc6,0x0d,0x4b,0xb3,0x33,0xd3,0xfa,0x7f, // 0000e6f0 |.*....b...K.3...|
+0x65,0xa9,0xb0,0xca,0x0e,0x31,0x2d,0xcc,0x30,0x59,0x8f,0x21,0xd2,0x27,0x2f,0x8f, // 0000e700 |e....1-.0Y.!.'/.|
+0x8a,0xc9,0xa2,0x0b,0xbe,0xbc,0xa1,0x3f,0xf3,0x45,0x04,0x11,0x50,0x3f,0xd2,0xf4, // 0000e710 |.......?.E..P?..|
+0xb1,0xca,0x2e,0x99,0xe4,0x28,0x7d,0x29,0x15,0xd2,0x75,0xf5,0xe2,0x10,0x7e,0xc2, // 0000e720 |.....(})..u...~.|
+0x9d,0x84,0x39,0x00,0x6a,0xae,0x0d,0x0a,0xeb,0x44,0xa6,0x64,0xe9,0x32,0xa2,0xd1, // 0000e730 |..9.j....D.d.2..|
+0x7f,0x1f,0x98,0xfb,0x1d,0x0b,0x2b,0x7b,0x98,0xae,0x05,0x5d,0xd5,0x62,0x12,0xab, // 0000e740 |......+{...].b..|
+0x81,0xa7,0x4e,0xfd,0xc0,0xec,0x62,0xe8,0xc5,0x7b,0xa3,0xbb,0xf2,0x57,0x4c,0xfb, // 0000e750 |..N...b..{...WL.|
+0x66,0xe2,0xc0,0xa1,0x7c,0x96,0x2a,0x2f,0x97,0xd2,0x38,0xb3,0xc9,0x87,0xf1,0x55, // 0000e760 |f...|.*/..8....U|
+0x66,0x2b,0xed,0xcc,0xe4,0x1b,0x98,0xf1,0xf3,0xb1,0xd3,0xac,0x3a,0x58,0x7c,0xbe, // 0000e770 |f+..........:X|.|
+0x1f,0x20,0xd0,0x2f,0xfc,0x30,0x4f,0x59,0xaf,0x14,0xd9,0xee,0x4d,0x55,0x96,0x49, // 0000e780 |. ./.0OY....MU.I|
+0x02,0x4c,0xb0,0xc3,0xa2,0x88,0x9f,0x1c,0xef,0xa0,0xb4,0x06,0xec,0xbe,0xda,0xf8, // 0000e790 |.L..............|
+0xe5,0xe0,0x97,0xec,0x80,0x7f,0xfc,0x3f,0xe3,0x80,0x38,0x4b,0xeb,0x07,0x0b,0x33, // 0000e7a0 |.......?..8K...3|
+0x81,0x07,0xc0,0xf5,0x82,0x35,0x68,0xcd,0x24,0xbe,0x1b,0x62,0x4d,0xa2,0x3b,0x81, // 0000e7b0 |.....5h.$..bM.;.|
+0x47,0xf3,0xd3,0xa9,0x0f,0xbe,0x66,0xf6,0x87,0xf1,0x21,0xc2,0x03,0xec,0xe0,0x47, // 0000e7c0 |G.....f...!....G|
+0xcd,0xf5,0x38,0xce,0x2e,0x1d,0x09,0x4b,0xe4,0x68,0x9c,0x2d,0x4f,0x32,0x52,0x32, // 0000e7d0 |..8....K.h.-O2R2|
+0x59,0xf4,0x70,0x3e,0x67,0x68,0xde,0xc7,0x75,0xb5,0x23,0x81,0x96,0xa0,0x90,0x3b, // 0000e7e0 |Y.p>gh..u.#....;|
+0x6e,0xbe,0xf5,0xa7,0x50,0xc1,0x0c,0xaa,0xfc,0x72,0x3b,0x99,0x91,0x9b,0x79,0x6c, // 0000e7f0 |n...P....r;...yl|
+0x34,0x54,0x91,0x84,0x5d,0x66,0xbc,0x4b,0x1d,0x09,0x3f,0xb1,0x25,0xe5,0xba,0x73, // 0000e800 |4T..]f.K..?.%..s|
+0x2d,0x04,0x8e,0x90,0xb1,0x55,0xe5,0xef,0x93,0x15,0x03,0x12,0x2e,0xe5,0x1b,0xd0, // 0000e810 |-....U..........|
+0x41,0x25,0x3d,0x9d,0x5d,0xb7,0x63,0x6c,0x05,0x3e,0x42,0xfc,0xf4,0x34,0x2d,0x28, // 0000e820 |A%=.].cl.>B..4-(|
+0xce,0x9a,0xad,0x1e,0x45,0xae,0xee,0x8c,0x98,0xf8,0xa8,0xb0,0xa0,0x3b,0xa8,0x80, // 0000e830 |....E........;..|
+0x8c,0x79,0xa1,0xbe,0x9a,0x68,0xeb,0x4e,0x3a,0x9d,0xaa,0x32,0x0a,0x2d,0x58,0xac, // 0000e840 |.y...h.N:..2.-X.|
+0xde,0x7d,0x61,0x37,0x05,0x1d,0xbe,0x4b,0x99,0x8c,0x01,0xc9,0x28,0x0a,0x82,0xb8, // 0000e850 |.}a7...K....(...|
+0x4a,0x63,0x59,0x22,0x6e,0x7b,0x6d,0xa9,0x5c,0xc1,0x29,0xf0,0x97,0xd3,0x56,0xcb, // 0000e860 |JcY"n{m.\.)...V.|
+0x38,0x2b,0xa8,0x1d,0x38,0x54,0x98,0x0e,0x17,0xe5,0xed,0xfb,0x03,0xa2,0x58,0xcc, // 0000e870 |8+..8T........X.|
+0xdd,0x92,0x5b,0xac,0x49,0x08,0xd9,0xd2,0x09,0x53,0x4a,0x29,0x63,0xb3,0x46,0x19, // 0000e880 |..[.I....SJ)c.F.|
+0xa2,0x46,0xcc,0x59,0xdf,0x63,0x33,0x53,0x6b,0x76,0x07,0x86,0xc4,0xbd,0x44,0xb0, // 0000e890 |.F.Y.c3Skv....D.|
+0xe6,0xbf,0xa0,0x3c,0x3f,0x2f,0x51,0x18,0x3e,0x39,0x8a,0xb0,0xae,0xaa,0xb2,0x53, // 0000e8a0 |...<?/Q.>9.....S|
+0x7b,0x31,0x39,0xcb,0xc6,0x60,0xd5,0xd3,0x48,0xae,0x2a,0x2b,0x74,0x98,0x7c,0xe2, // 0000e8b0 |{19..`..H.*+t.|.|
+0x63,0x9c,0x0f,0x4f,0xab,0x18,0x04,0x9c,0x9d,0x99,0xd7,0xe3,0xc7,0xc4,0xea,0x26, // 0000e8c0 |c..O...........&|
+0xee,0x3c,0x63,0xc2,0x94,0xa0,0xfe,0xac,0xd3,0x79,0x4f,0x95,0x3a,0x1d,0x61,0x16, // 0000e8d0 |.<c......yO.:.a.|
+0x87,0x91,0x4d,0x35,0x8a,0x2b,0xc9,0xce,0x7a,0xcb,0xb0,0xb2,0xa7,0xcd,0xec,0x9c, // 0000e8e0 |..M5.+..z.......|
+0x80,0x08,0x66,0xe9,0xb1,0xb5,0xda,0xcb,0x5d,0x18,0x80,0xc2,0x30,0x84,0x6c,0xac, // 0000e8f0 |..f.....]...0.l.|
+0x46,0xfb,0x06,0x71,0x5f,0x6c,0xf1,0xe8,0xe4,0xad,0xd9,0x99,0xe4,0x36,0xa8,0xc4, // 0000e900 |F..q_l.......6..|
+0xe4,0x80,0xd4,0x9b,0x9e,0x42,0xf1,0x27,0xe9,0xae,0xb7,0x37,0xbe,0xcf,0x47,0xc7, // 0000e910 |.....B.'...7..G.|
+0x81,0x3d,0xf4,0xe2,0xe6,0x8d,0x4f,0x14,0xab,0xf4,0xad,0xef,0xae,0xb2,0xef,0xef, // 0000e920 |.=....O.........|
+0xe0,0x26,0xad,0x57,0x77,0xe5,0x08,0x94,0x5b,0x8a,0xac,0xca,0xf4,0xea,0xd4,0xf8, // 0000e930 |.&.Ww...[.......|
+0x40,0xab,0x30,0xa4,0xe9,0xbd,0x64,0x14,0x3d,0x9e,0x6a,0x25,0xe2,0x47,0xb5,0x5b, // 0000e940 |@.0...d.=.j%.G.[|
+0x6d,0xac,0xbc,0x51,0x72,0x2c,0x58,0xe1,0x92,0x72,0x7e,0x24,0x47,0xe9,0xd1,0x3c, // 0000e950 |m..Qr,X..r~$G..<|
+0xc4,0x6e,0x96,0x0f,0xc8,0x5b,0x4e,0x46,0x22,0xc9,0xa4,0x27,0x36,0x29,0x03,0xa4, // 0000e960 |.n...[NF"..'6)..|
+0x5a,0xc8,0xb9,0x5a,0xc1,0xfe,0x76,0xf3,0xfb,0xdd,0x11,0x85,0x88,0x40,0x82,0xa4, // 0000e970 |Z..Z..v......@..|
+0xae,0x28,0xe9,0x5b,0x82,0xb8,0x5b,0xe6,0x56,0x3e,0x26,0xee,0x89,0xc2,0xe4,0xb7, // 0000e980 |.(.[..[.V>&.....|
+0x4c,0xa6,0x58,0xab,0x93,0x53,0x0a,0xc1,0xd7,0xed,0xff,0xe5,0xd5,0xd8,0xa6,0x43, // 0000e990 |L.X..S.........C|
+0x82,0xfd,0x1d,0xd1,0x72,0x27,0x92,0xa5,0x1b,0x8b,0xbf,0xd1,0x4c,0x23,0x48,0x4a, // 0000e9a0 |....r'......L#HJ|
+0xf9,0x6a,0x20,0x3b,0xca,0x3d,0x98,0xe3,0x2b,0xfc,0x04,0xe1,0x7b,0x28,0xa6,0x5d, // 0000e9b0 |.j ;.=..+...{(.]|
+0xbc,0x8f,0x1d,0xb3,0x94,0xb4,0xd3,0x9e,0x99,0x9d,0x3a,0x8a,0x30,0x7a,0x0a,0x60, // 0000e9c0 |..........:.0z.`|
+0x09,0x5e,0x2e,0x32,0xc1,0x73,0xe0,0x9c,0x4a,0xee,0x87,0x3a,0x67,0x02,0x52,0xf8, // 0000e9d0 |.^.2.s..J..:g.R.|
+0xb9,0xe9,0x98,0xcd,0x4d,0xd4,0x75,0x94,0xde,0xb8,0x5a,0x46,0xfd,0x51,0xd2,0xf3, // 0000e9e0 |....M.u...ZF.Q..|
+0x9b,0x58,0x83,0x6f,0xce,0x97,0x1e,0x20,0x1c,0xb5,0xda,0x12,0x4e,0xfa,0xcf,0x3c, // 0000e9f0 |.X.o... ....N..<|
+0xf9,0x70,0x06,0x41,0x6a,0x69,0x4d,0x02,0xce,0x2d,0xf5,0xac,0x4a,0xde,0x9b,0x5a, // 0000ea00 |.p.AjiM..-..J..Z|
+0x62,0xa3,0xae,0x79,0x0e,0x2b,0x2d,0x5b,0x33,0xbb,0x61,0xb6,0x17,0xa6,0x43,0x08, // 0000ea10 |b..y.+-[3.a...C.|
+0x46,0x0d,0x1d,0x65,0x61,0xa0,0xc8,0xf8,0x4e,0x9d,0xbb,0xeb,0x4c,0x9d,0x33,0x12, // 0000ea20 |F..ea...N...L.3.|
+0xde,0xc8,0xa9,0x31,0x22,0x1a,0xa8,0x6d,0x6a,0xe4,0x66,0x59,0x51,0x5e,0xcb,0x8f, // 0000ea30 |...1"..mj.fYQ^..|
+0x0c,0xb2,0x1f,0x35,0xb7,0x0f,0x5e,0x26,0xd8,0x0e,0xb2,0x65,0x08,0x10,0x28,0xaf, // 0000ea40 |...5..^&...e..(.|
+0xa6,0xb0,0x48,0x7f,0x6e,0x66,0x79,0x7c,0x83,0xeb,0xe6,0x7f,0x32,0x67,0xb8,0x67, // 0000ea50 |..H.nfy|....2g.g|
+0xe5,0x39,0x73,0xbc,0xf3,0xdd,0xfb,0xfb,0x98,0xed,0xf4,0xd6,0x61,0x61,0xb2,0xe3, // 0000ea60 |.9s.........aa..|
+0x70,0x3d,0xe5,0x9e,0xb9,0xb2,0xaa,0xf7,0x58,0x90,0x81,0x15,0x61,0x81,0x5b,0x5e, // 0000ea70 |p=......X...a.[^|
+0x00,0x16,0x65,0x73,0xb7,0x0c,0xc5,0xa6,0x60,0xf2,0xb5,0x3f,0xd6,0xd0,0xa9,0x9c, // 0000ea80 |..es....`..?....|
+0x61,0xec,0x18,0xac,0x76,0xeb,0x32,0x33,0x0e,0x52,0xf2,0xe4,0xf5,0x7d,0x8b,0xff, // 0000ea90 |a...v.23.R...}..|
+0x18,0x2e,0x21,0xcd,0xc6,0x4d,0x14,0xc0,0xb7,0x20,0x8d,0x90,0xc5,0x97,0x53,0x5b, // 0000eaa0 |..!..M... ....S[|
+0x12,0x01,0xfb,0x16,0x0b,0xa2,0x2b,0x01,0x09,0x98,0x62,0x54,0xe9,0xae,0x9c,0x83, // 0000eab0 |......+...bT....|
+0x18,0x70,0x89,0x4b,0x6d,0x00,0x4c,0x00,0x38,0x7f,0x08,0x7d,0x57,0x53,0xe6,0x57, // 0000eac0 |.p.Km.L.8..}WS.W|
+0x3f,0xfc,0x1a,0x3c,0x1a,0x86,0xa9,0xdd,0xc0,0x7e,0x16,0xe5,0xcc,0xcf,0xe8,0x6a, // 0000ead0 |?..<.....~.....j|
+0x29,0x82,0x9b,0x46,0xc5,0x0e,0x5b,0xec,0xe3,0x0e,0x20,0xbe,0x5f,0x44,0x81,0x80, // 0000eae0 |)..F..[... ._D..|
+0x4a,0x68,0xbb,0x8c,0xa4,0x52,0x8b,0x7d,0xc4,0xbe,0x6c,0xc2,0x78,0x18,0xae,0xa2, // 0000eaf0 |Jh...R.}..l.x...|
+0xbb,0xf7,0x34,0x8e,0x25,0x89,0xf5,0x6f,0xa6,0x2d,0x24,0x9c,0x06,0x4d,0x9b,0x18, // 0000eb00 |..4.%..o.-$..M..|
+0xed,0x8d,0xdf,0xa3,0x6a,0x74,0xb7,0xcf,0x14,0x70,0xb7,0xad,0xd9,0xd4,0x87,0xcf, // 0000eb10 |....jt...p......|
+0x68,0xbc,0xea,0x30,0x2b,0x15,0x8d,0xc4,0x34,0x33,0x47,0x58,0x66,0xdb,0x99,0x18, // 0000eb20 |h..0+...43GXf...|
+0x49,0xc2,0x74,0xa3,0xf6,0xef,0xf5,0x7a,0xaa,0xa0,0xdc,0x63,0x78,0xe2,0xb3,0xbd, // 0000eb30 |I.t....z...cx...|
+0xa6,0x04,0x36,0x07,0x22,0x84,0x1e,0x6c,0xfc,0x1e,0x01,0xce,0x4f,0x09,0xa4,0xce, // 0000eb40 |..6."..l....O...|
+0x54,0xd9,0xb2,0x7c,0xc5,0x68,0xa9,0x18,0x13,0xa0,0x65,0xd7,0x5d,0xf0,0xa1,0xcf, // 0000eb50 |T..|.h....e.]...|
+0x21,0x9e,0xff,0x22,0xff,0x4f,0xed,0x95,0xb8,0xc1,0x89,0xa1,0x33,0x5b,0x74,0x09, // 0000eb60 |!..".O......3[t.|
+0xec,0xdf,0xa9,0xf3,0x24,0xf6,0xd6,0x9b,0x39,0x61,0x76,0xd8,0x61,0x06,0x9e,0x16, // 0000eb70 |....$...9av.a...|
+0x10,0x1b,0xc2,0x82,0xcc,0xeb,0x19,0xe7,0xeb,0xaa,0x66,0x3c,0xd4,0xb1,0xe9,0x0c, // 0000eb80 |..........f<....|
+0xdb,0xc1,0x1b,0x3d,0x95,0xa1,0x2f,0x1e,0x27,0x52,0xc8,0x47,0x6d,0xda,0xa2,0xef, // 0000eb90 |...=../.'R.Gm...|
+0x6f,0xb1,0x71,0x21,0x14,0x5c,0xe9,0x3e,0x7e,0x35,0x5c,0xe6,0x7c,0x1d,0x6d,0xc1, // 0000eba0 |o.q!.\.>~5\.|.m.|
+0x49,0x38,0x1d,0xd4,0x97,0xe5,0x42,0x8e,0x99,0xa7,0xff,0x17,0x65,0x73,0xe4,0xff, // 0000ebb0 |I8....B.....es..|
+0xdb,0x1b,0x31,0x99,0xf5,0xe5,0x57,0xde,0xa0,0x7f,0x2e,0x16,0xa8,0x81,0x6b,0x4f, // 0000ebc0 |..1...W.......kO|
+0x57,0x19,0xec,0xf0,0x6e,0x16,0x60,0x26,0x9a,0x98,0xc0,0xcb,0x19,0xab,0x96,0xf9, // 0000ebd0 |W...n.`&........|
+0x51,0xc9,0x31,0x3a,0x97,0x2e,0x27,0x02,0x38,0x6b,0xdf,0x0b,0x1c,0xdb,0xe2,0xec, // 0000ebe0 |Q.1:..'.8k......|
+0xcc,0xbc,0xef,0x39,0xbb,0x82,0x89,0x01,0x0b,0x33,0xe6,0x0a,0x3d,0xc0,0x31,0x21, // 0000ebf0 |...9.....3..=.1!|
+0x0e,0xb0,0x76,0x1c,0x88,0xed,0xaf,0x51,0xc6,0x63,0xeb,0x88,0xc5,0x5f,0x09,0x19, // 0000ec00 |..v....Q.c..._..|
+0x1c,0x5a,0xdf,0x9a,0x0f,0x50,0xa5,0x51,0x7e,0x9a,0x3e,0xd3,0xf2,0x5b,0xf9,0x44, // 0000ec10 |.Z...P.Q~.>..[.D|
+0x87,0x83,0xfc,0xeb,0x14,0x37,0x01,0xa3,0xff,0x32,0x2f,0x2d,0xa3,0xa9,0x36,0xb3, // 0000ec20 |.....7...2/-..6.|
+0x7b,0xfa,0x12,0xb4,0xf1,0x9e,0x86,0x0c,0x5e,0x24,0x39,0x75,0x5a,0x82,0x7c,0x66, // 0000ec30 |{.......^$9uZ.|f|
+0x97,0x78,0x7b,0xc5,0xf7,0x23,0xf8,0xd1,0xf8,0xbe,0x98,0x52,0xda,0x43,0xf9,0x02, // 0000ec40 |.x{..#.....R.C..|
+0xe7,0x59,0xc8,0x24,0x5d,0x50,0xc6,0xd3,0x64,0xfd,0x86,0xd3,0xe2,0xcc,0x89,0x75, // 0000ec50 |.Y.$]P..d......u|
+0x1a,0x75,0x09,0x11,0x62,0x4f,0x6a,0xb2,0xcd,0x8e,0x2d,0x57,0x0d,0xb7,0xbd,0xb2, // 0000ec60 |.u..bOj...-W....|
+0x4b,0xe1,0x31,0x36,0x5d,0x2c,0xed,0x54,0x68,0x1e,0x2c,0x35,0x6c,0xe6,0xdd,0x7f, // 0000ec70 |K.16],.Th.,5l...|
+0x33,0xc3,0x97,0xd4,0x1f,0xf4,0x80,0x56,0xe1,0x71,0x25,0x9e,0x18,0xe0,0xc1,0x99, // 0000ec80 |3......V.q%.....|
+0x08,0xf3,0x5d,0x8b,0xa4,0xfa,0x37,0x3f,0xec,0x25,0xb4,0x48,0xa8,0x5f,0x76,0x7d, // 0000ec90 |..]...7?.%.H._v}|
+0x93,0xdc,0x1f,0x8f,0x28,0xa3,0xfa,0x22,0x69,0x45,0xad,0xe9,0xc4,0x01,0x5b,0x11, // 0000eca0 |....(.."iE....[.|
+0xf0,0x06,0x18,0x34,0xb3,0x5e,0x2b,0xa4,0x30,0x7a,0x2a,0xb1,0x4e,0x25,0xb2,0xaf, // 0000ecb0 |...4.^+.0z*.N%..|
+0xe3,0x90,0x31,0x27,0xb5,0x1f,0x83,0x6e,0x9a,0x87,0x5c,0x54,0x8e,0xa8,0xef,0x5f, // 0000ecc0 |..1'...n..\T..._|
+0x8f,0x8c,0xdd,0xe3,0x88,0x92,0xd8,0x6f,0x28,0x5e,0x15,0x58,0xf3,0xb0,0xc6,0xa7, // 0000ecd0 |.......o(^.X....|
+0xb3,0x11,0x02,0x0b,0x83,0x29,0x0a,0x4c,0x13,0xbd,0xca,0x44,0x4b,0xd1,0x9d,0x81, // 0000ece0 |.....).L...DK...|
+0xa7,0x4b,0xd9,0xf6,0x67,0xe4,0xb6,0x6c,0x60,0x5c,0x19,0xeb,0x24,0x49,0x93,0x9e, // 0000ecf0 |.K..g..l`\..$I..|
+0xc6,0x89,0x00,0xbe,0x4b,0x8e,0x6b,0xc7,0x5d,0xd3,0x18,0x66,0x64,0x43,0xf9,0x2b, // 0000ed00 |....K.k.]..fdC.+|
+0x98,0x76,0x8a,0x4d,0xd7,0xd2,0xa9,0x9f,0x26,0xc9,0xb7,0x9b,0x3c,0xc8,0x6a,0xc8, // 0000ed10 |.v.M....&...<.j.|
+0xfc,0xa5,0x32,0x90,0xa7,0x11,0x29,0x85,0x07,0x38,0xe7,0x9a,0x4d,0xad,0x80,0x3a, // 0000ed20 |..2...)..8..M..:|
+0xd0,0x0c,0xf2,0x9c,0xbf,0x83,0x05,0xea,0x5f,0x35,0x87,0xf4,0xf2,0xd4,0x3c,0xc0, // 0000ed30 |........_5....<.|
+0x23,0x55,0x79,0xbb,0xf6,0x2d,0xcc,0x49,0x36,0x5b,0x11,0x79,0x6d,0x48,0xa6,0xcb, // 0000ed40 |#Uy..-.I6[.ymH..|
+0xf9,0x14,0x56,0x05,0x99,0x2e,0x0c,0x78,0x18,0x03,0xe2,0xcf,0x9d,0x1c,0x26,0x9d, // 0000ed50 |..V....x......&.|
+0xab,0xba,0x6f,0xeb,0x4b,0xbd,0x96,0x76,0x6b,0x2c,0xd8,0x3e,0x99,0x36,0x70,0x92, // 0000ed60 |..o.K..vk,.>.6p.|
+0xc1,0x0e,0x98,0xc9,0x4e,0xee,0x65,0x69,0xd3,0x1e,0x7b,0xa8,0xa8,0x6a,0x52,0x9c, // 0000ed70 |....N.ei..{..jR.|
+0xce,0x68,0x17,0x76,0xf0,0x08,0x44,0xa3,0x5e,0xa8,0x7f,0x8d,0x9e,0x49,0xc7,0xd4, // 0000ed80 |.h.v..D.^....I..|
+0x25,0xd7,0x62,0xaf,0x44,0x8d,0xae,0x06,0xfb,0x58,0x22,0x30,0x7b,0x1c,0x79,0x1a, // 0000ed90 |%.b.D....X"0{.y.|
+0xa7,0xae,0xf9,0xa3,0xb0,0x68,0x9e,0xa6,0xba,0xbc,0x7e,0x67,0xae,0x48,0xfa,0x40, // 0000eda0 |.....h....~g.H.@|
+0xc1,0xf8,0xe3,0x57,0xba,0x3b,0x34,0x79,0x1c,0x77,0x14,0xf2,0x41,0x82,0xe6,0x66, // 0000edb0 |...W.;4y.w..A..f|
+0x64,0x30,0x75,0xd2,0xbf,0xcd,0xf6,0x49,0xc0,0xc7,0x17,0xbc,0x97,0x67,0x12,0xd0, // 0000edc0 |d0u....I.....g..|
+0x23,0xb1,0x1c,0xe9,0x44,0x35,0x09,0xd5,0x7d,0x4f,0x7c,0x61,0xf2,0xd7,0x76,0xa2, // 0000edd0 |#...D5..}O|a..v.|
+0xd4,0x7c,0x1f,0xf0,0x4e,0x71,0x80,0xef,0x8b,0x6f,0x65,0x36,0x9d,0x11,0x7e,0xaf, // 0000ede0 |.|..Nq...oe6..~.|
+0x7b,0x77,0x20,0xb6,0xf3,0x4f,0x50,0x5a,0xc2,0x80,0x86,0x81,0xbc,0x07,0x04,0x41, // 0000edf0 |{w ..OPZ.......A|
+0x91,0x97,0x2d,0xcf,0x8d,0x8b,0x32,0xb6,0xc3,0xa1,0xed,0x8b,0x78,0x01,0x70,0x76, // 0000ee00 |..-...2.....x.pv|
+0x89,0x60,0xc9,0x31,0x08,0xdc,0x76,0xef,0xcb,0x09,0x52,0x19,0xfb,0xed,0x8e,0x72, // 0000ee10 |.`.1..v...R....r|
+0xa4,0x06,0x14,0xb3,0xb7,0xcc,0xef,0x1c,0x32,0x21,0xd6,0x86,0x9c,0xfc,0xc3,0xa8, // 0000ee20 |........2!......|
+0x55,0xc9,0x3f,0x49,0xaf,0xd8,0x08,0xe7,0x89,0x00,0x07,0x4d,0x62,0x87,0xe0,0xa3, // 0000ee30 |U.?I.......Mb...|
+0x9a,0x97,0x92,0xf0,0x57,0x98,0x3e,0x4e,0xe8,0x44,0xcc,0xbf,0xf6,0x1a,0xdb,0x3f, // 0000ee40 |....W.>N.D.....?|
+0xd7,0x71,0xad,0x8e,0xe2,0x6a,0x2f,0x24,0xee,0x50,0xb7,0x7b,0xbf,0xac,0xcd,0x01, // 0000ee50 |.q...j/$.P.{....|
+0x4a,0x5e,0x9e,0x5b,0x9c,0x92,0x39,0x72,0xd2,0x5a,0x12,0x25,0xd4,0x0f,0x10,0xef, // 0000ee60 |J^.[..9r.Z.%....|
+0xd4,0x76,0x13,0x64,0x26,0xb4,0x2d,0x00,0x0a,0x0d,0xc9,0xbe,0x26,0x16,0x42,0x4f, // 0000ee70 |.v.d&.-.....&.BO|
+0x3e,0xee,0x13,0xdd,0xda,0x63,0x56,0xc3,0x1f,0xc5,0x61,0x81,0x7b,0x76,0x11,0x4b, // 0000ee80 |>....cV...a.{v.K|
+0x86,0x28,0xcb,0x42,0xb2,0xb7,0x2d,0x6b,0x96,0xab,0x36,0x46,0x1e,0x2c,0x65,0x5c, // 0000ee90 |.(.B..-k..6F.,e\|
+0x7a,0xa8,0x7e,0x47,0x66,0x31,0xb4,0x47,0x2c,0x2e,0x42,0x03,0x36,0x9f,0x57,0x0d, // 0000eea0 |z.~Gf1.G,.B.6.W.|
+0x14,0xda,0x82,0xa1,0xe0,0xe4,0x76,0x3e,0x0f,0xa7,0xd0,0x42,0x60,0xb2,0xff,0x97, // 0000eeb0 |......v>...B`...|
+0x95,0x11,0xea,0x5f,0xcd,0x97,0x05,0xca,0x8d,0x98,0x8e,0xc2,0x9e,0x55,0x3b,0xbb, // 0000eec0 |..._.........U;.|
+0x9f,0xbe,0x4a,0x54,0x02,0x63,0x0d,0x29,0xe0,0xe4,0x57,0xf1,0x4a,0x60,0x9b,0x89, // 0000eed0 |..JT.c.)..W.J`..|
+0x26,0xbc,0x4c,0x2c,0xf0,0xf2,0xc1,0x18,0xfd,0x01,0x82,0xdb,0x08,0xc3,0x03,0x15, // 0000eee0 |&.L,............|
+0x48,0xe6,0x19,0x77,0x58,0x2e,0x31,0x1b,0xa5,0xd4,0x5f,0x70,0x0c,0xaa,0x57,0x1d, // 0000eef0 |H..wX.1..._p..W.|
+0xe0,0xe1,0x25,0x03,0xd0,0x4b,0xba,0xab,0x5b,0xfd,0xb8,0x09,0x4d,0x06,0x13,0xbf, // 0000ef00 |..%..K..[...M...|
+0x7a,0xa2,0x0b,0xe5,0x07,0x44,0x3f,0x43,0xda,0x72,0x8d,0xcc,0x77,0xe1,0x0d,0x9b, // 0000ef10 |z....D?C.r..w...|
+0xae,0xce,0x71,0x38,0xc5,0x89,0x19,0x1b,0x09,0x52,0xd6,0xd1,0x7c,0xc1,0xa2,0xd8, // 0000ef20 |..q8.....R..|...|
+0x3a,0xc2,0x88,0x62,0x90,0x1d,0x0f,0x5b,0x02,0xa5,0xa1,0x7e,0x96,0x38,0x17,0xc1, // 0000ef30 |:..b...[...~.8..|
+0x78,0x3d,0xcd,0x27,0x74,0xd3,0xd7,0x77,0x85,0x27,0xd8,0x7c,0x57,0xfd,0x28,0x2e, // 0000ef40 |x=.'t..w.'.|W.(.|
+0x48,0xf2,0xad,0xd0,0xff,0x70,0x8e,0x9f,0x3c,0x66,0x85,0xa2,0x3e,0x11,0x83,0x6e, // 0000ef50 |H....p..<f..>..n|
+0xd2,0xe4,0x23,0xb6,0x5f,0x13,0xde,0xcd,0x64,0x86,0x48,0xae,0x91,0x0e,0x43,0x19, // 0000ef60 |..#._...d.H...C.|
+0xe3,0xf6,0x2b,0x5a,0xce,0xee,0x56,0x9a,0x6c,0x81,0xe4,0x04,0x6f,0x14,0x34,0xdc, // 0000ef70 |..+Z..V.l...o.4.|
+0xb5,0x52,0x5e,0x63,0xce,0x41,0x33,0xdd,0x50,0x9a,0x09,0xe0,0x4d,0x32,0xbd,0xb8, // 0000ef80 |.R^c.A3.P...M2..|
+0x79,0x96,0xb6,0x55,0x11,0x26,0x61,0xb2,0x55,0x2f,0x52,0xb2,0x33,0x36,0x68,0xdd, // 0000ef90 |y..U.&a.U/R.36h.|
+0x86,0x90,0x33,0xa3,0xcc,0x03,0x74,0xaf,0x55,0x12,0x83,0xd8,0xd7,0xef,0x4a,0x40, // 0000efa0 |..3...t.U.....J@|
+0x0b,0xaf,0x87,0x38,0xc7,0x06,0x91,0xb9,0xea,0xa1,0xd5,0x2b,0x7c,0x41,0xb4,0xf1, // 0000efb0 |...8.......+|A..|
+0x5b,0x2d,0xd4,0x76,0x89,0x06,0xf3,0x8a,0xaa,0xd8,0x2e,0x40,0x55,0xb2,0xaf,0x8d, // 0000efc0 |[-.v.......@U...|
+0x0a,0x13,0x31,0x7c,0x52,0xde,0x03,0x15,0xb9,0x88,0xac,0xf2,0xff,0xcf,0x9a,0x6e, // 0000efd0 |..1|R..........n|
+0x2a,0x16,0x39,0x5a,0x53,0x70,0xeb,0x3a,0x53,0x48,0x59,0xd0,0x52,0x3f,0x71,0x06, // 0000efe0 |*.9ZSp.:SHY.R?q.|
+0x45,0xc5,0x53,0x0c,0x31,0x6d,0x9d,0x4a,0xd6,0xbe,0x0a,0x09,0x84,0x15,0xc2,0x2a, // 0000eff0 |E.S.1m.J.......*|
+0x75,0xde,0x59,0x23,0x5b,0x0e,0x77,0x49,0xee,0xb2,0x6c,0x4b,0xa5,0x28,0x36,0xf1, // 0000f000 |u.Y#[.wI..lK.(6.|
+0x9b,0x17,0x54,0x92,0x21,0x44,0xc9,0xbd,0xdd,0x28,0xa3,0x10,0x28,0x93,0xdc,0x24, // 0000f010 |..T.!D...(..(..$|
+0xdd,0xa3,0x8c,0x9b,0xea,0xe5,0xeb,0x4c,0x71,0xdb,0xf6,0xdc,0xb4,0x22,0xf8,0x22, // 0000f020 |.......Lq...."."|
+0x5b,0x53,0xdf,0xe4,0x16,0x84,0xd5,0x4a,0x88,0x78,0xa5,0x0e,0x5a,0x1a,0x9e,0xb7, // 0000f030 |[S.....J.x..Z...|
+0x8c,0xad,0xa3,0x6b,0xfb,0x57,0x6d,0xf1,0xf7,0xb2,0x68,0x03,0x23,0xc6,0xc9,0xe9, // 0000f040 |...k.Wm...h.#...|
+0x94,0xae,0x9d,0xc7,0x45,0xcc,0x1a,0xda,0x73,0xfa,0x81,0xdc,0x31,0x81,0x95,0x0b, // 0000f050 |....E...s...1...|
+0x2f,0x4a,0xa5,0x1d,0x55,0x83,0x62,0xc8,0xd4,0xa6,0x2b,0xd1,0xa6,0x26,0xff,0x6c, // 0000f060 |/J..U.b...+..&.l|
+0x08,0xc7,0xaa,0x52,0xb8,0x26,0x80,0x95,0x94,0xac,0x16,0x06,0x37,0x53,0x32,0x11, // 0000f070 |...R.&......7S2.|
+0x80,0x5b,0xac,0x2c,0x41,0x7e,0xf8,0x26,0x18,0x8f,0xc9,0xfd,0xce,0xe0,0x0e,0x96, // 0000f080 |.[.,A~.&........|
+0xec,0xf1,0x35,0xf3,0x85,0x5d,0x52,0x28,0x92,0x4b,0xac,0x66,0xff,0x35,0xe0,0x4c, // 0000f090 |..5..]R(.K.f.5.L|
+0xda,0x17,0x74,0x25,0xf1,0xad,0x40,0x10,0xe5,0x38,0x1d,0xdb,0x52,0x08,0xc3,0xba, // 0000f0a0 |..t%..@..8..R...|
+0x87,0xaa,0x4f,0xeb,0x69,0x79,0x94,0xe6,0x22,0x40,0x6b,0xc8,0xde,0xde,0x8e,0x48, // 0000f0b0 |..O.iy.."@k....H|
+0x2d,0x12,0xfa,0x84,0xa5,0xa8,0xb7,0x3b,0x8d,0x82,0x77,0xb6,0x10,0xa3,0x64,0x9c, // 0000f0c0 |-......;..w...d.|
+0xe4,0x06,0xaa,0x94,0xfa,0x7a,0x72,0x2c,0xed,0x12,0x19,0x2f,0x6e,0x69,0x65,0x0e, // 0000f0d0 |.....zr,.../nie.|
+0xe7,0x50,0xc0,0x6e,0x8b,0xf8,0x1f,0x6f,0x2a,0xe8,0xaa,0xe7,0xc7,0xa1,0x48,0xb8, // 0000f0e0 |.P.n...o*.....H.|
+0xb9,0xd2,0xc1,0x54,0x15,0x5d,0xba,0xb8,0x38,0xc1,0x15,0xe5,0xb1,0x12,0xab,0xb5, // 0000f0f0 |...T.]..8.......|
+0x76,0xde,0x0e,0x13,0x6f,0xe6,0xea,0xb8,0x63,0xae,0x9b,0x48,0x07,0xed,0x3a,0x15, // 0000f100 |v...o...c..H..:.|
+0xda,0xda,0xcd,0xe1,0xc3,0x81,0x83,0x0f,0x15,0x9c,0x4c,0x3a,0x12,0xda,0xf6,0xe4, // 0000f110 |..........L:....|
+0xc3,0x64,0xbc,0xb0,0x31,0xce,0x79,0xde,0x11,0xdc,0xb5,0xb1,0x43,0x47,0xaa,0x41, // 0000f120 |.d..1.y.....CG.A|
+0x46,0x05,0x56,0xdc,0x57,0x85,0xd8,0x00,0x21,0x48,0xe6,0x1c,0x41,0x2b,0x2b,0x78, // 0000f130 |F.V.W...!H..A++x|
+0xec,0xeb,0x85,0xc9,0x04,0x30,0x79,0x49,0x8c,0x63,0x36,0x14,0x6b,0xd9,0x5f,0xd4, // 0000f140 |.....0yI.c6.k._.|
+0x3f,0x5d,0x01,0x51,0xf4,0xaa,0x2d,0x86,0xc4,0x75,0x8e,0xf9,0x44,0x25,0x3a,0x36, // 0000f150 |?].Q..-..u..D%:6|
+0x98,0x09,0x13,0xf8,0x96,0x8f,0x26,0xcd,0x53,0x6a,0xb1,0x0f,0xd4,0xc4,0xb0,0x9d, // 0000f160 |......&.Sj......|
+0xf2,0x93,0x87,0x95,0x1d,0x9a,0x5f,0xe3,0x01,0x0a,0x27,0xe1,0xca,0xea,0xcf,0x79, // 0000f170 |......_...'....y|
+0x91,0x6d,0x63,0x05,0xc5,0x8a,0xb3,0x31,0xbc,0x45,0x44,0xdb,0xb5,0xbe,0xe1,0x5e, // 0000f180 |.mc....1.ED....^|
+0xfa,0xb7,0x36,0x9a,0x95,0xd8,0x35,0xc6,0xd3,0x61,0xbf,0x87,0x35,0x2c,0xa2,0x2c, // 0000f190 |..6...5..a..5,.,|
+0x49,0xec,0x98,0xe2,0x13,0xe9,0xf2,0x54,0x04,0x62,0x3d,0x85,0x09,0xa6,0x20,0x2e, // 0000f1a0 |I......T.b=... .|
+0x3a,0xd1,0x78,0xab,0x6c,0xed,0xfa,0xbf,0xb2,0x36,0x43,0x7e,0x4d,0x85,0xdf,0xbf, // 0000f1b0 |:.x.l....6C~M...|
+0x9b,0xd7,0x70,0xb1,0x71,0x2a,0x23,0x39,0xd7,0xf3,0x7f,0x96,0xb1,0xcc,0x43,0x36, // 0000f1c0 |..p.q*#9......C6|
+0xe0,0x47,0x2b,0x34,0xdd,0x27,0x47,0x9b,0x1e,0x5a,0xae,0xdf,0x15,0x17,0x7c,0x38, // 0000f1d0 |.G+4.'G..Z....|8|
+0xcf,0x25,0xde,0x2a,0xf9,0x6d,0x2a,0x20,0xd9,0xb7,0xc0,0xac,0xde,0x33,0xc0,0xb0, // 0000f1e0 |.%.*.m* .....3..|
+0xf9,0x0e,0xf2,0xba,0xd5,0x34,0x9a,0x3d,0x85,0xd5,0xea,0x32,0xe1,0x43,0x2d,0x32, // 0000f1f0 |.....4.=...2.C-2|
+0xbd,0xff,0xb5,0xad,0xb3,0x89,0xaa,0xfb,0x32,0x87,0xaa,0xf3,0xd8,0x1a,0x02,0x57, // 0000f200 |........2......W|
+0x80,0x5c,0x80,0x0c,0x1b,0x48,0xce,0xd7,0x8d,0xe9,0x8c,0xa1,0x4e,0x9a,0x25,0xb8, // 0000f210 |.\...H......N.%.|
+0x97,0x68,0x3d,0x80,0x2d,0x43,0x8d,0xf6,0xdb,0xfe,0xc2,0xaa,0x3b,0xf2,0x42,0xae, // 0000f220 |.h=.-C......;.B.|
+0xca,0xab,0x4c,0x81,0x5e,0xb7,0x25,0x84,0x12,0x8f,0x64,0x40,0x05,0x5d,0xa4,0xcc, // 0000f230 |..L.^.%...d@.]..|
+0xa6,0x99,0xcd,0xe6,0x4d,0x8b,0x16,0xd7,0x08,0xcd,0x1b,0x4d,0xdc,0x32,0x93,0x0a, // 0000f240 |....M......M.2..|
+0xc0,0x1b,0x2a,0x53,0x22,0xc6,0x0c,0x69,0xbf,0x2b,0x32,0xed,0xc3,0x28,0xca,0x8a, // 0000f250 |..*S"..i.+2..(..|
+0xca,0x2c,0xb4,0xb6,0xb9,0xf2,0x1d,0x26,0xbb,0xdd,0x0b,0x03,0x71,0x9c,0xf4,0x24, // 0000f260 |.,.....&....q..$|
+0xee,0xeb,0x15,0x43,0x94,0x5f,0x9c,0x88,0x7d,0x98,0xe5,0x14,0xf3,0xdc,0xfa,0x93, // 0000f270 |...C._..}.......|
+0x18,0x0c,0xe6,0xb8,0x61,0xb5,0xf7,0x89,0xd4,0x82,0x4a,0x4c,0xe4,0x2a,0x7a,0xa6, // 0000f280 |....a.....JL.*z.|
+0x5c,0xf4,0x7a,0x08,0xd8,0xb1,0x98,0x3e,0x8e,0x12,0x0d,0xfd,0x72,0xe6,0xf1,0xd4, // 0000f290 |\.z....>....r...|
+0x58,0x89,0xcf,0x24,0xec,0x08,0x37,0x73,0x2f,0x3e,0x7a,0x2c,0x98,0x9f,0xe1,0xf1, // 0000f2a0 |X..$..7s/>z,....|
+0xa8,0xd9,0xd4,0xa9,0x68,0x09,0xb6,0x96,0xfd,0x4a,0x2d,0x3f,0x89,0x55,0x46,0x7f, // 0000f2b0 |....h....J-?.UF.|
+0xc3,0x7d,0x02,0xb1,0x50,0xf7,0xea,0xc5,0x95,0x75,0x1d,0x8b,0xee,0xf5,0x9a,0x9b, // 0000f2c0 |.}..P....u......|
+0x02,0xf0,0x8c,0x2d,0xa2,0x12,0x84,0x38,0xc6,0x6f,0xaf,0x75,0xc4,0x52,0x0c,0x7c, // 0000f2d0 |...-...8.o.u.R.||
+0x15,0x95,0xa7,0x96,0xe9,0x86,0xd9,0xc2,0x57,0x94,0xea,0xe1,0x08,0x39,0xab,0xbf, // 0000f2e0 |........W....9..|
+0xb5,0x0f,0x9b,0x5e,0xca,0x42,0x2e,0xbc,0x1c,0x94,0xb8,0x82,0x32,0x50,0xcd,0x27, // 0000f2f0 |...^.B......2P.'|
+0x2d,0x6d,0xbc,0xc0,0x8c,0x66,0xc2,0x62,0xcf,0x9d,0x51,0xf6,0xdc,0x82,0x08,0xa9, // 0000f300 |-m...f.b..Q.....|
+0x24,0xbe,0x00,0x94,0x46,0x09,0x79,0xe1,0x08,0xd1,0xc9,0xa9,0x36,0x16,0x28,0x80, // 0000f310 |$...F.y.....6.(.|
+0xf8,0x33,0x53,0x10,0xff,0x82,0xe3,0x75,0xcd,0x02,0x4b,0xf8,0xa0,0x7d,0xaf,0xd6, // 0000f320 |.3S....u..K..}..|
+0x1b,0x92,0xf4,0x24,0x44,0xd3,0xe2,0xc4,0xce,0x91,0x49,0x54,0xa6,0x5b,0x0e,0x59, // 0000f330 |...$D.....IT.[.Y|
+0xa8,0xac,0x9f,0x90,0xfb,0x73,0x47,0x63,0x1a,0x53,0x0f,0xa7,0x21,0x72,0xc4,0x44, // 0000f340 |.....sGc.S..!r.D|
+0x1f,0x6a,0xfd,0xf1,0x2c,0x71,0x26,0x7f,0xb3,0x71,0x3f,0x3d,0xb3,0x9e,0xbd,0x40, // 0000f350 |.j..,q&..q?=...@|
+0x28,0x02,0x86,0x6d,0x62,0x45,0xd2,0x19,0x33,0x70,0x2e,0xcd,0xb6,0xe6,0x31,0xcb, // 0000f360 |(..mbE..3p....1.|
+0x6e,0x24,0x82,0x0f,0xd5,0x69,0xf2,0x7d,0x86,0x9a,0xd1,0x2a,0x1e,0xee,0x3a,0xb4, // 0000f370 |n$...i.}...*..:.|
+0xb0,0x56,0x0e,0xf8,0x73,0x42,0x14,0xf5,0xca,0xdd,0x0c,0xa0,0xbc,0xa5,0x3b,0x08, // 0000f380 |.V..sB........;.|
+0x94,0xea,0xcf,0xfa,0xec,0xd0,0xe0,0x83,0x8a,0xf1,0x0b,0x6b,0x53,0x4d,0x04,0x8d, // 0000f390 |...........kSM..|
+0x24,0x76,0xf3,0x80,0x55,0x03,0xa2,0x8a,0x07,0x04,0xb1,0xd0,0x80,0xb8,0xd0,0x62, // 0000f3a0 |$v..U..........b|
+0x4f,0x7a,0x44,0x2e,0xa1,0xae,0x09,0x3e,0x1a,0x53,0x1d,0xaa,0x4d,0x43,0x69,0xea, // 0000f3b0 |OzD....>.S..MCi.|
+0x0e,0x7b,0x35,0x9b,0xe1,0x73,0x66,0xeb,0xe9,0x8c,0x01,0x21,0xd3,0xcc,0x7f,0x7e, // 0000f3c0 |.{5..sf....!...~|
+0x56,0xf8,0xf6,0xb0,0xab,0x81,0x71,0xe6,0x56,0xaf,0x73,0xa5,0x7b,0x83,0x9a,0x95, // 0000f3d0 |V.....q.V.s.{...|
+0xf5,0x7a,0xba,0xd9,0x98,0xf2,0x30,0x6b,0x9f,0x09,0x2a,0xd5,0x3d,0x28,0xb8,0x86, // 0000f3e0 |.z....0k..*.=(..|
+0x9f,0xf3,0x2d,0x63,0x0f,0x57,0xd9,0x1f,0xa5,0x4f,0x4e,0x7d,0x77,0xca,0x31,0x7d, // 0000f3f0 |..-c.W...ON}w.1}|
+0x0f,0x9e,0xb1,0x5d,0x8f,0xa8,0xaf,0xa6,0x7a,0xa6,0x11,0x62,0xb1,0xbf,0x6e,0x5e, // 0000f400 |...]....z..b..n^|
+0x38,0x70,0xbe,0x99,0xa3,0xe4,0x2b,0x76,0x6b,0x33,0xa4,0x33,0xad,0xde,0x14,0x1c, // 0000f410 |8p....+vk3.3....|
+0x38,0xf7,0xbd,0x98,0x9b,0x3f,0x29,0x2c,0xf2,0x45,0x63,0x30,0x22,0x74,0x2f,0x6e, // 0000f420 |8....?),.Ec0"t/n|
+0x17,0x9b,0x6c,0x9e,0xd1,0x1b,0x37,0xe3,0x7d,0x50,0xe8,0x80,0x74,0xef,0xba,0x29, // 0000f430 |..l...7.}P..t..)|
+0x42,0x45,0x5c,0x65,0x96,0x64,0xf3,0x75,0x48,0x87,0x2b,0x72,0x31,0xcc,0xd1,0xdd, // 0000f440 |BE\e.d.uH.+r1...|
+0xe2,0xda,0x04,0xc0,0x2c,0x09,0x03,0xbc,0x5e,0x32,0xd2,0x0b,0x5e,0x4d,0x42,0x4a, // 0000f450 |....,...^2..^MBJ|
+0x28,0xc3,0x7e,0x2a,0xb4,0x1f,0xff,0x50,0x9d,0x0b,0x93,0xfc,0x01,0xa5,0x5f,0x0e, // 0000f460 |(.~*...P......_.|
+0xa5,0x50,0xae,0x4c,0x30,0xb5,0xb2,0x10,0x15,0x40,0xc8,0x1f,0x84,0xbd,0x37,0x71, // 0000f470 |.P.L0....@....7q|
+0xb6,0xf2,0x9c,0x19,0x69,0x9f,0xa6,0xb5,0x43,0x04,0x06,0x9f,0x66,0x57,0x14,0x84, // 0000f480 |....i...C...fW..|
+0xb0,0x95,0x8d,0x94,0x7c,0xc9,0x5a,0xc4,0x7c,0x7b,0x0d,0x73,0x2f,0x7c,0x74,0x58, // 0000f490 |....|.Z.|{.s/|tX|
+0x63,0xdc,0x78,0xed,0x20,0xfa,0xb0,0x87,0x52,0x43,0xa2,0xff,0xb2,0x41,0xc7,0x54, // 0000f4a0 |c.x. ...RC...A.T|
+0xc2,0x07,0x37,0xa4,0x9b,0x77,0x73,0x8c,0x6c,0xc4,0xb1,0x1a,0xcb,0xfb,0x32,0xdd, // 0000f4b0 |..7..ws.l.....2.|
+0x4a,0x3a,0x6b,0x16,0x28,0x09,0x49,0x41,0x7e,0x12,0x49,0xee,0x2e,0x21,0xb8,0xc4, // 0000f4c0 |J:k.(.IA~.I..!..|
+0x95,0x7c,0x10,0xda,0x61,0xb9,0xb8,0x08,0xe1,0x19,0xe9,0x04,0xf8,0x5e,0x35,0x13, // 0000f4d0 |.|..a........^5.|
+0xef,0xd4,0x85,0xc6,0x94,0x68,0xa4,0xcf,0xf4,0x9a,0xac,0x9e,0x7e,0x61,0x94,0xb0, // 0000f4e0 |.....h......~a..|
+0x0d,0x76,0x8b,0xe8,0xf9,0xef,0x40,0x7e,0xf1,0xa3,0xec,0x58,0x4c,0xb5,0xbd,0x90, // 0000f4f0 |.v....@~...XL...|
+0x69,0x25,0xb3,0xab,0xe9,0x13,0x46,0x5d,0x44,0x71,0x7f,0x19,0x34,0x7d,0x14,0x09, // 0000f500 |i%....F]Dq..4}..|
+0xbe,0x84,0x16,0xa2,0x9e,0x8f,0x80,0x1f,0xd7,0x9d,0x8b,0x04,0x5a,0xf8,0x73,0xb1, // 0000f510 |............Z.s.|
+0xbf,0x39,0x11,0x95,0x93,0x38,0x6d,0x8c,0xd7,0x74,0x59,0x5d,0xea,0x0d,0xe1,0x54, // 0000f520 |.9...8m..tY]...T|
+0xc2,0x2a,0x3e,0x93,0xda,0xdf,0xed,0x8c,0xf6,0xb5,0x44,0x78,0xc5,0x18,0xcd,0x9a, // 0000f530 |.*>.......Dx....|
+0x1b,0x41,0x94,0x48,0x16,0xd2,0xe4,0x46,0x39,0x47,0x9b,0x80,0xd2,0x95,0x78,0xa0, // 0000f540 |.A.H...F9G....x.|
+0x5d,0x30,0x39,0x49,0x76,0x6c,0x42,0x83,0xed,0xb9,0x94,0x4a,0xa7,0x8a,0xd3,0x39, // 0000f550 |]09IvlB....J...9|
+0xc9,0xb7,0xbd,0x4a,0x03,0x6e,0xe0,0xe6,0xe4,0x74,0x15,0x27,0xcd,0x68,0x75,0xb3, // 0000f560 |...J.n...t.'.hu.|
+0x8b,0x08,0xc6,0xa2,0xbe,0x56,0x4c,0x1f,0x3d,0x83,0x9b,0x47,0x3d,0xa9,0x9d,0x1e, // 0000f570 |.....VL.=..G=...|
+0x0b,0x96,0x1a,0x0e,0x60,0x51,0x94,0xb6,0x4c,0x0a,0x7b,0xa0,0x17,0x6f,0xf5,0xc2, // 0000f580 |....`Q..L.{..o..|
+0xdf,0x42,0x59,0xb0,0x2b,0x21,0xe3,0x9c,0xc0,0xa1,0xcf,0x32,0x7e,0x99,0x53,0x06, // 0000f590 |.BY.+!.....2~.S.|
+0x28,0xe8,0x5f,0xd5,0x4d,0x66,0xbd,0x40,0x95,0x54,0x85,0xc6,0x1e,0xc6,0xf1,0x48, // 0000f5a0 |(._.Mf.@.T.....H|
+0x5d,0x4b,0x1c,0xa1,0x00,0xdb,0x50,0xb1,0x0a,0xc9,0x66,0x4e,0x90,0xc6,0xe2,0xd8, // 0000f5b0 |]K....P...fN....|
+0xc6,0xd1,0x65,0x7a,0x8a,0xe5,0x83,0x02,0xb3,0x64,0xd6,0x4d,0x86,0xeb,0x9a,0x49, // 0000f5c0 |..ez.....d.M...I|
+0x44,0x24,0x26,0xbb,0x4d,0x0e,0x39,0x8b,0x82,0xd5,0x74,0x42,0x9c,0x7a,0x37,0xc9, // 0000f5d0 |D$&.M.9...tB.z7.|
+0x30,0x75,0xa9,0x04,0x4f,0x42,0x5c,0xdf,0xab,0x41,0x41,0xa1,0x26,0xd2,0x1f,0x24, // 0000f5e0 |0u..OB\..AA.&..$|
+0x5f,0x14,0x10,0xc0,0xaa,0x93,0xee,0x1c,0xfa,0xca,0x70,0xb9,0x58,0x50,0x04,0x82, // 0000f5f0 |_.........p.XP..|
+0xe0,0x4c,0x1f,0x2f,0x39,0xab,0xc8,0x04,0xda,0x17,0x48,0xb4,0x91,0xb4,0xbf,0xc9, // 0000f600 |.L./9.....H.....|
+0x8a,0x9d,0x71,0x5c,0xe1,0xb4,0xc7,0xf8,0x1b,0x07,0x10,0xf7,0x87,0xa3,0x25,0xb9, // 0000f610 |..q\..........%.|
+0x91,0xe9,0xd4,0xf2,0xc9,0x4a,0xf0,0xb2,0xe2,0xea,0xea,0x83,0x34,0xf3,0xc5,0xa2, // 0000f620 |.....J......4...|
+0x0a,0x87,0xc4,0x4a,0x79,0x58,0xde,0xec,0xb0,0xcb,0x62,0x5e,0xdc,0x36,0x20,0x1c, // 0000f630 |...JyX....b^.6 .|
+0x99,0x71,0xc3,0xec,0xea,0x16,0x95,0xf0,0x12,0x9b,0x33,0x20,0xef,0x69,0x12,0x8e, // 0000f640 |.q........3 .i..|
+0xd4,0xd5,0x9b,0xf8,0x89,0xd2,0xa0,0xad,0x0f,0x5d,0x06,0xa0,0xa0,0x6d,0xc8,0xa6, // 0000f650 |.........]...m..|
+0xc7,0x31,0xfa,0x57,0xaf,0xfc,0x2a,0xca,0x22,0xd0,0xf8,0x7d,0x95,0xc0,0xae,0x65, // 0000f660 |.1.W..*."..}...e|
+0x8f,0x04,0x0e,0xa0,0x1a,0xa1,0xc3,0x1e,0x14,0xdb,0xcf,0x65,0x30,0x86,0xe6,0x42, // 0000f670 |...........e0..B|
+0x77,0xba,0x19,0x50,0xdf,0x82,0xec,0xa0,0xd0,0x8b,0x16,0x21,0xab,0x14,0x71,0xe2, // 0000f680 |w..P.......!..q.|
+0xf4,0x7e,0xfa,0x6b,0x90,0x47,0x85,0x76,0x73,0x5f,0x0d,0x1b,0xab,0xaf,0xd8,0xf1, // 0000f690 |.~.k.G.vs_......|
+0x12,0x62,0x34,0x1b,0x49,0x80,0xb6,0x92,0x72,0x02,0xd4,0x8c,0x42,0x82,0x56,0xe2, // 0000f6a0 |.b4.I...r...B.V.|
+0x5a,0xf1,0x1a,0x32,0x4c,0x01,0x23,0x02,0x87,0x25,0x35,0x4f,0xd4,0xdf,0xa3,0xde, // 0000f6b0 |Z..2L.#..%5O....|
+0xf8,0x99,0xf0,0xd6,0x50,0xc8,0xc2,0x7a,0xd8,0x89,0x3f,0xe7,0x5d,0xc7,0xaa,0x17, // 0000f6c0 |....P..z..?.]...|
+0x10,0xf9,0x90,0x24,0xe9,0xbe,0x32,0xad,0x7b,0xd8,0x40,0x60,0x35,0x36,0x7d,0x6b, // 0000f6d0 |...$..2.{.@`56}k|
+0xbc,0x95,0x7b,0xf5,0xb0,0xa3,0x3b,0x79,0xc6,0x92,0xbd,0x18,0x00,0xe1,0xa2,0x38, // 0000f6e0 |..{...;y.......8|
+0x18,0x7b,0x12,0x50,0xae,0xa3,0x42,0xb9,0xa0,0xf9,0x33,0x98,0x13,0x71,0xa7,0xc1, // 0000f6f0 |.{.P..B...3..q..|
+0x71,0xe5,0xed,0x4d,0xc5,0x27,0xea,0x74,0xfe,0x7c,0xdc,0x2e,0xac,0x5b,0x6b,0x21, // 0000f700 |q..M.'.t.|...[k!|
+0xe2,0xde,0xda,0x01,0xc2,0x2e,0xc1,0x90,0x0b,0xd1,0x87,0x8e,0x38,0xae,0xce,0xa5, // 0000f710 |............8...|
+0x2c,0x72,0x6a,0x42,0x31,0x09,0x79,0x3b,0xa9,0x6e,0x99,0x4b,0xa3,0x50,0x25,0x53, // 0000f720 |,rjB1.y;.n.K.P%S|
+0x3f,0xe6,0x03,0x1c,0x32,0x34,0x09,0xf0,0x41,0x5a,0xc9,0x35,0x1b,0x26,0x40,0xcd, // 0000f730 |?...24..AZ.5.&@.|
+0xc1,0x3f,0xcd,0x89,0x5a,0x4a,0xf8,0x55,0x0e,0xd8,0xd9,0x3e,0x7b,0xc8,0xb6,0x25, // 0000f740 |.?..ZJ.U...>{..%|
+0x85,0x8a,0x46,0x07,0x8f,0x4c,0xd7,0xc4,0xa9,0x7a,0xf9,0x3a,0x7c,0x39,0x43,0xf4, // 0000f750 |..F..L...z.:|9C.|
+0x90,0x59,0x67,0x3d,0x03,0x53,0xc1,0x30,0x0c,0x4e,0xb1,0x80,0x4c,0xd0,0x59,0xff, // 0000f760 |.Yg=.S.0.N..L.Y.|
+0xfa,0x4b,0x90,0xd5,0x51,0x96,0xa7,0x7b,0xea,0x48,0x70,0x6c,0xbe,0x4c,0xf0,0x4d, // 0000f770 |.K..Q..{.Hpl.L.M|
+0x9d,0x63,0x0e,0xfb,0xcc,0x47,0x86,0xae,0x7f,0xbb,0x53,0xa2,0xd5,0x7f,0x8f,0x35, // 0000f780 |.c...G....S....5|
+0xf2,0xe5,0x85,0xa9,0x09,0x1e,0x3c,0xd0,0xcf,0x31,0xf5,0xc2,0x9c,0xa7,0xc4,0x0d, // 0000f790 |......<..1......|
+0xbe,0x1a,0x28,0x4d,0x55,0x00,0x4a,0x66,0x62,0xfc,0xc6,0x53,0x19,0xa3,0xec,0xed, // 0000f7a0 |..(MU.Jfb..S....|
+0xfd,0xb7,0x4c,0x51,0x0f,0xe7,0xab,0xe5,0x64,0x72,0xd8,0x14,0x63,0xb0,0xb3,0xc9, // 0000f7b0 |..LQ....dr..c...|
+0xca,0x9e,0xb1,0xc0,0xa7,0x51,0x78,0xde,0x24,0xf4,0xee,0x6a,0x75,0x22,0xe1,0x32, // 0000f7c0 |.....Qx.$..ju".2|
+0x13,0xfa,0x58,0x5b,0x38,0x4a,0x24,0xf1,0xd6,0x3e,0x01,0x4a,0x21,0x50,0xed,0xe4, // 0000f7d0 |..X[8J$..>.J!P..|
+0x62,0x3b,0x33,0xb2,0x22,0xb3,0x72,0x32,0x29,0x14,0x62,0x2f,0x63,0xa9,0x5a,0x42, // 0000f7e0 |b;3.".r2).b/c.ZB|
+0x77,0xf0,0xf8,0x98,0x82,0xec,0x50,0xdf,0x4a,0xaa,0x64,0xd9,0x2d,0xe7,0x04,0x87, // 0000f7f0 |w.....P.J.d.-...|
+0x42,0x60,0xf1,0x4f,0x33,0xc8,0xf9,0xc9,0x12,0x13,0x3b,0x80,0x96,0x27,0x8e,0x76, // 0000f800 |B`.O3.....;..'.v|
+0x6d,0xea,0x70,0x49,0x3d,0x00,0x43,0x5f,0x16,0x33,0xa1,0x34,0x7b,0xcb,0x37,0xca, // 0000f810 |m.pI=.C_.3.4{.7.|
+0x51,0xc5,0x88,0xd9,0xfa,0x9e,0x1c,0x43,0x86,0xf7,0x28,0x9d,0x76,0x3f,0xa2,0xcb, // 0000f820 |Q......C..(.v?..|
+0xe9,0x39,0xbf,0xa0,0xf9,0xdc,0xc0,0x88,0x4b,0x55,0x6a,0x4f,0x83,0xe5,0xbb,0x1f, // 0000f830 |.9......KUjO....|
+0x0c,0x1c,0xb8,0xdb,0x6b,0x14,0x68,0x32,0x70,0x95,0x8e,0x6e,0x8c,0x27,0xbd,0xeb, // 0000f840 |....k.h2p..n.'..|
+0xda,0x8f,0x4f,0x5d,0xa7,0xc7,0x4a,0xf4,0xb1,0x25,0x5e,0x01,0xec,0x87,0xb4,0xca, // 0000f850 |..O]..J..%^.....|
+0x71,0xd6,0x18,0xf2,0xce,0x41,0x95,0x15,0xf0,0x07,0xd2,0x3d,0x39,0xa0,0x83,0x63, // 0000f860 |q....A.....=9..c|
+0x9a,0x39,0xbc,0x86,0x07,0x5b,0xfa,0x18,0x73,0x20,0xdc,0xae,0xb4,0xd3,0xb6,0x79, // 0000f870 |.9...[..s .....y|
+0x58,0x3a,0x08,0x08,0xfb,0x27,0x5f,0xa2,0xba,0x13,0xd5,0x8a,0xc6,0x05,0x9c,0x86, // 0000f880 |X:...'_.........|
+0x4d,0xd1,0xe4,0x1e,0xac,0xaf,0x08,0xf1,0xd6,0x20,0x19,0x95,0xd9,0xaa,0x9d,0xd5, // 0000f890 |M........ ......|
+0x59,0x6b,0xb2,0x0c,0x33,0x6e,0x42,0x01,0x73,0xf7,0xfc,0xc6,0xa7,0x85,0x30,0x6e, // 0000f8a0 |Yk..3nB.s.....0n|
+0x6a,0xb8,0x34,0x70,0xc5,0xe4,0xbe,0x40,0x46,0x40,0xa8,0xd1,0xb4,0x22,0x49,0x5d, // 0000f8b0 |j.4p...@F@..."I]|
+0xb3,0x13,0xf8,0x62,0x17,0x9c,0x3d,0x24,0x01,0xe7,0xe5,0x60,0x3d,0xcc,0x43,0x8e, // 0000f8c0 |...b..=$...`=.C.|
+0x1a,0xb8,0x8e,0xf7,0xe3,0xc7,0x3e,0x63,0x44,0x84,0x9e,0x4e,0x5f,0xa6,0xb6,0x20, // 0000f8d0 |......>cD..N_.. |
+0x21,0xf6,0x88,0xf9,0xe6,0xf0,0x5c,0x42,0xa1,0x1d,0xd3,0x87,0xd8,0x91,0x0d,0x99, // 0000f8e0 |!.....\B........|
+0x59,0xc1,0x84,0x57,0xa0,0x47,0xce,0xa9,0x15,0xf4,0x77,0x88,0x7c,0x8e,0x37,0x8a, // 0000f8f0 |Y..W.G....w.|.7.|
+0xe5,0xa2,0x34,0xf9,0x67,0x0c,0xb3,0x6a,0x3b,0x0e,0x62,0x00,0xbd,0x6c,0xd6,0x93, // 0000f900 |..4.g..j;.b..l..|
+0x28,0xf0,0x31,0x27,0x03,0xe1,0x5b,0xee,0xec,0xe1,0x2a,0x7a,0x81,0x64,0x01,0x43, // 0000f910 |(.1'..[...*z.d.C|
+0x3d,0xa5,0x2c,0x94,0x8a,0xba,0x63,0xcb,0xfc,0xec,0xba,0x2c,0xb6,0x92,0x0a,0x20, // 0000f920 |=.,...c....,... |
+0x3e,0x83,0xd2,0xf3,0xe5,0x33,0x84,0xd9,0x51,0xd9,0xe9,0x2c,0x7e,0xe8,0xe0,0xd1, // 0000f930 |>....3..Q..,~...|
+0x77,0x96,0x82,0x1c,0x10,0xb6,0xce,0x95,0x7b,0x9b,0xdd,0x7f,0xfe,0xe9,0xd6,0xa9, // 0000f940 |w.......{.......|
+0xda,0x5a,0x3a,0xeb,0xa3,0x91,0xed,0x8e,0xc0,0x0a,0xab,0xe4,0x09,0xeb,0x2e,0x40, // 0000f950 |.Z:............@|
+0xf6,0x4f,0xf4,0x4e,0xcc,0xca,0x22,0xff,0x1d,0xa7,0x95,0x22,0x6e,0x6a,0x3c,0xde, // 0000f960 |.O.N.."...."nj<.|
+0xe2,0x76,0x14,0xd9,0x4d,0x73,0xc4,0xb5,0x74,0xdb,0x11,0xfc,0xae,0x1f,0x06,0x4b, // 0000f970 |.v..Ms..t......K|
+0x0e,0x65,0xde,0xab,0xbe,0xa4,0x34,0x98,0xa5,0x39,0x26,0xc8,0x37,0xc2,0xb9,0xdc, // 0000f980 |.e....4..9&.7...|
+0xe4,0xe1,0xcc,0xdb,0x69,0x43,0xb0,0x28,0x6f,0xf8,0x3c,0x13,0xa6,0x44,0x2b,0x6d, // 0000f990 |....iC.(o.<..D+m|
+0x03,0x8b,0x4b,0xca,0xcb,0x55,0x72,0x38,0xd2,0x6e,0xaf,0x4c,0x8e,0xa5,0x29,0x0e, // 0000f9a0 |..K..Ur8.n.L..).|
+0x26,0x8d,0xe6,0x0a,0x08,0x17,0x1f,0x9c,0x56,0x44,0xf4,0x98,0xb5,0x10,0x6d,0xff, // 0000f9b0 |&.......VD....m.|
+0x00,0x57,0x6f,0xb3,0xe4,0x78,0x64,0x16,0x01,0xf4,0x5f,0x0a,0xe6,0xf4,0xb5,0x0f, // 0000f9c0 |.Wo..xd..._.....|
+0xcf,0xd9,0xd0,0x86,0x64,0xed,0xc5,0x01,0xe5,0xcc,0xcc,0xe5,0x8e,0xb3,0x5c,0xc1, // 0000f9d0 |....d.........\.|
+0x1e,0x8e,0xc3,0x49,0x24,0x99,0x4b,0xd0,0x93,0xf9,0xb1,0x09,0x4d,0x3b,0x25,0x35, // 0000f9e0 |...I$.K.....M;%5|
+0xcb,0x4b,0x5d,0x91,0x74,0x4b,0x61,0x2b,0xce,0xc6,0xfe,0x9a,0x27,0x77,0x5c,0x04, // 0000f9f0 |.K].tKa+....'w\.|
+0x65,0x97,0xdf,0x39,0x7f,0x85,0xde,0x3b,0xb7,0xe3,0x74,0x80,0xfe,0xe6,0x68,0x64, // 0000fa00 |e..9...;..t...hd|
+0x14,0xc3,0xd2,0xfa,0xc3,0x59,0xea,0x79,0xe8,0xc2,0xf2,0x91,0x60,0x72,0xb7,0x23, // 0000fa10 |.....Y.y....`r.#|
+0xd5,0x34,0xb9,0xff,0xa7,0xdb,0x17,0x6d,0x57,0xd9,0xf8,0x4e,0xed,0xf8,0x1b,0xfc, // 0000fa20 |.4.....mW..N....|
+0x71,0x97,0xd5,0x59,0x5b,0x95,0x81,0x14,0xa7,0x73,0x2a,0x4b,0xb1,0x72,0x23,0x1f, // 0000fa30 |q..Y[....s*K.r#.|
+0xd5,0x9b,0xbb,0xd4,0xb2,0x96,0x68,0x35,0x71,0xea,0x2b,0x74,0x97,0xa1,0x3a,0x81, // 0000fa40 |......h5q.+t..:.|
+0x2c,0x06,0xcc,0x07,0xa8,0xa2,0xba,0xda,0x3c,0x1e,0x1b,0x92,0x5b,0x72,0xc3,0x9e, // 0000fa50 |,.......<...[r..|
+0x29,0xb6,0x5e,0x36,0xea,0x59,0x4c,0x46,0x48,0xe7,0xf9,0xb2,0x9d,0x91,0x14,0xaa, // 0000fa60 |).^6.YLFH.......|
+0x70,0xda,0x48,0x29,0xe1,0x78,0xbb,0xfe,0xf3,0xed,0xde,0xfc,0x66,0x13,0x05,0x03, // 0000fa70 |p.H).x......f...|
+0xa8,0x80,0x94,0x4a,0xd1,0xbf,0xa2,0x4f,0x72,0x20,0xe8,0x93,0x88,0x6c,0x5e,0xae, // 0000fa80 |...J...Or ...l^.|
+0x41,0x81,0x59,0x03,0x13,0x4a,0x40,0x00,0x54,0xc1,0x12,0xc6,0xad,0xb1,0x8a,0xaa, // 0000fa90 |A.Y..J@.T.......|
+0x72,0x7c,0x59,0xdc,0x62,0x39,0xe7,0x99,0x8d,0xcd,0xec,0x08,0x01,0xdd,0x69,0x85, // 0000faa0 |r|Y.b9........i.|
+0x4e,0xe4,0x62,0xba,0x48,0x90,0x01,0xbb,0x79,0xc5,0x18,0xc2,0xb9,0x71,0xcb,0x62, // 0000fab0 |N.b.H...y....q.b|
+0xf8,0xbb,0x4a,0x18,0xe3,0xf2,0x6a,0x6d,0xdc,0x0b,0x35,0x71,0x18,0x2a,0x18,0xe2, // 0000fac0 |..J...jm..5q.*..|
+0xe2,0x92,0xae,0xaa,0x27,0xf5,0x9d,0x0a,0xc7,0xcb,0x8f,0x14,0x19,0xa2,0x9d,0xbd, // 0000fad0 |....'...........|
+0xb1,0x2b,0x2c,0x5a,0x48,0x56,0xe2,0xa8,0x2c,0xf8,0xd5,0x5a,0xf0,0x8c,0x36,0x29, // 0000fae0 |.+,ZHV..,..Z..6)|
+0x38,0x43,0xe6,0x91,0xb4,0xf3,0x54,0xbc,0x68,0x99,0x88,0xcf,0xd9,0xe7,0x37,0xa5, // 0000faf0 |8C....T.h.....7.|
+0xe1,0x91,0x63,0x49,0xdd,0xa6,0x1d,0x91,0xef,0xeb,0xab,0x74,0x43,0x39,0x3e,0x32, // 0000fb00 |..cI.......tC9>2|
+0xe4,0x66,0x4a,0x04,0xcd,0x57,0x2a,0x5a,0x37,0xae,0x5f,0x8a,0x69,0x27,0x29,0x08, // 0000fb10 |.fJ..W*Z7._.i').|
+0x83,0x70,0x7a,0x16,0xe5,0xce,0x7e,0x96,0x86,0xaf,0xb9,0xaf,0xb4,0x74,0x6a,0x20, // 0000fb20 |.pz...~......tj |
+0xba,0x17,0x26,0x8f,0x37,0xe3,0x7f,0xc8,0xe2,0x99,0x48,0x9f,0x8b,0x4d,0x63,0x40, // 0000fb30 |..&.7.....H..Mc@|
+0xfe,0xf6,0x3e,0xc5,0x45,0xa4,0xb4,0xf6,0x7e,0xbc,0xaa,0x78,0xd2,0xe7,0x47,0xd5, // 0000fb40 |..>.E...~..x..G.|
+0xca,0xbe,0x95,0x11,0x90,0xc0,0xbe,0xe5,0x25,0xc7,0x4d,0x55,0xb8,0xac,0x0e,0xd6, // 0000fb50 |........%.MU....|
+0x09,0xc1,0x32,0x0b,0x0d,0x24,0x46,0x26,0xfe,0x31,0x2e,0xe6,0x54,0xac,0x5a,0x39, // 0000fb60 |..2..$F&.1..T.Z9|
+0xab,0x3d,0xcf,0x48,0xfc,0x2d,0x7a,0xd9,0x1c,0x07,0xa8,0x84,0x24,0x54,0xb7,0x62, // 0000fb70 |.=.H.-z.....$T.b|
+0xd2,0xcd,0xcb,0xcc,0x47,0x54,0x88,0x46,0x78,0xe5,0xf1,0x6c,0xd5,0x6f,0xd6,0x51, // 0000fb80 |....GT.Fx..l.o.Q|
+0xb4,0xea,0xea,0x3c,0x27,0x16,0x5d,0x70,0x5e,0xdb,0xbe,0x11,0x37,0xa9,0xdc,0xaf, // 0000fb90 |...<'.]p^...7...|
+0xf6,0x3e,0xd0,0x9f,0x88,0x83,0xbf,0xae,0x6d,0x52,0x9f,0xa0,0x76,0xa1,0x8d,0xad, // 0000fba0 |.>......mR..v...|
+0x1e,0x02,0x19,0x0a,0x81,0x7c,0x71,0x63,0xd1,0xbb,0x32,0x9f,0xeb,0x87,0xae,0xb9, // 0000fbb0 |.....|qc..2.....|
+0x89,0xdb,0xce,0xcc,0x88,0x78,0x4a,0x97,0x28,0x32,0x53,0x7d,0x64,0x7b,0x0c,0x74, // 0000fbc0 |.....xJ.(2S}d{.t|
+0xe2,0xe6,0x69,0xd0,0x4f,0x60,0x4e,0x88,0xc0,0xc6,0x6e,0x26,0xcc,0x48,0x6f,0x07, // 0000fbd0 |..i.O`N...n&.Ho.|
+0x7b,0x5e,0xfa,0x67,0xc0,0x38,0x8d,0x5d,0xeb,0x47,0xf5,0x5f,0x0e,0x8d,0xed,0xeb, // 0000fbe0 |{^.g.8.].G._....|
+0x25,0x33,0x7e,0x47,0x92,0x26,0x84,0x38,0x19,0x8e,0x0b,0xb4,0x9b,0x3e,0x82,0x6d, // 0000fbf0 |%3~G.&.8.....>.m|
+0x35,0xb7,0x1a,0xdf,0xad,0xe4,0xc4,0xe1,0x64,0xac,0x1f,0x62,0x21,0x4e,0x62,0x27, // 0000fc00 |5.......d..b!Nb'|
+0xca,0xc2,0xd2,0xb2,0x62,0xad,0xfd,0x97,0xb5,0x84,0xc0,0x2d,0x01,0x74,0x97,0xed, // 0000fc10 |....b......-.t..|
+0xf5,0x2c,0xaf,0x93,0x13,0x73,0x46,0x15,0x54,0xee,0xbe,0x1d,0xf5,0xc7,0x27,0x21, // 0000fc20 |.,...sF.T.....'!|
+0x69,0x20,0xd0,0xe1,0x25,0x55,0x9f,0xaf,0x70,0x76,0x53,0xfe,0x68,0xd5,0x22,0xc6, // 0000fc30 |i ..%U..pvS.h.".|
+0x70,0x79,0x9f,0x09,0x07,0x20,0x43,0x68,0xed,0xd2,0x05,0x20,0xce,0x6f,0x60,0xb8, // 0000fc40 |py... Ch... .o`.|
+0x8e,0x16,0x87,0xd4,0x57,0x42,0x8a,0x86,0x3b,0x00,0x84,0xaa,0x47,0x54,0x03,0x32, // 0000fc50 |....WB..;...GT.2|
+0xe2,0xc7,0x81,0x57,0x47,0x4e,0xd7,0x26,0xd5,0x25,0xe0,0xd4,0x63,0x85,0x36,0xbf, // 0000fc60 |...WGN.&.%..c.6.|
+0xa4,0x4e,0x27,0x80,0x65,0x05,0x9d,0x13,0x54,0x2d,0x0b,0xd0,0x99,0x2e,0x7d,0x25, // 0000fc70 |.N'.e...T-....}%|
+0x90,0x4f,0x49,0xa4,0xae,0x2d,0x62,0xdb,0xb3,0xc9,0x20,0x66,0xe4,0x98,0x7f,0xcb, // 0000fc80 |.OI..-b... f....|
+0xe1,0xfd,0xc6,0x5d,0x48,0x71,0x33,0xde,0xf7,0xb4,0x3d,0x4b,0x68,0xda,0x50,0x8f, // 0000fc90 |...]Hq3...=Kh.P.|
+0xc3,0xd8,0x6a,0xa8,0x50,0xf2,0x0f,0xbe,0xb3,0x3e,0xfa,0x7d,0x2d,0xff,0x37,0x5c, // 0000fca0 |..j.P....>.}-.7\|
+0x2b,0xe2,0xee,0xa2,0xdb,0x74,0x82,0x8e,0x36,0x79,0x74,0x5b,0x2c,0x7a,0x66,0x69, // 0000fcb0 |+....t..6yt[,zfi|
+0xf5,0x76,0x9d,0x3e,0xcd,0x78,0xaf,0x71,0x33,0xbe,0xc5,0x6c,0xeb,0x40,0x1d,0xa5, // 0000fcc0 |.v.>.x.q3..l.@..|
+0xa7,0xce,0xe1,0x57,0x99,0x95,0x4b,0x58,0x66,0x5a,0xf8,0xc5,0x3c,0x76,0x4b,0xc8, // 0000fcd0 |...W..KXfZ..<vK.|
+0xb4,0x66,0x79,0x5a,0xb7,0x80,0x8f,0xe6,0x39,0x72,0x72,0x72,0x4f,0x6c,0xc1,0x3f, // 0000fce0 |.fyZ....9rrrOl.?|
+0x86,0x48,0x92,0x6f,0x48,0xe0,0x2b,0x1d,0xe0,0xc5,0xc3,0x70,0x12,0xe1,0x45,0x1d, // 0000fcf0 |.H.oH.+....p..E.|
+0xbe,0xc0,0xbd,0x37,0xee,0x99,0x31,0x11,0x81,0x5c,0x1d,0xe3,0x4d,0xeb,0xdd,0x83, // 0000fd00 |...7..1..\..M...|
+0xf9,0x26,0xfa,0xc6,0xc3,0xb1,0xbe,0x19,0xc9,0xa8,0x3f,0xd3,0xec,0xa2,0x4f,0x23, // 0000fd10 |.&........?...O#|
+0x3d,0x31,0x42,0x49,0x92,0x72,0xad,0xca,0x02,0x5e,0x09,0x2d,0xa8,0xb1,0x44,0x21, // 0000fd20 |=1BI.r...^.-..D!|
+0xfd,0x33,0x0f,0x1a,0x83,0xe3,0xbd,0xda,0x1a,0x8c,0xe0,0x20,0xe5,0xc5,0xb7,0x6d, // 0000fd30 |.3......... ...m|
+0x6e,0xd0,0x90,0x8f,0x67,0xc8,0x6d,0x59,0x10,0xf7,0xf0,0x4e,0x92,0x3c,0x99,0x94, // 0000fd40 |n...g.mY...N.<..|
+0xb2,0x76,0xbb,0x44,0x17,0xb5,0xb6,0x76,0x3f,0xda,0x06,0x16,0x07,0xc1,0xbd,0x80, // 0000fd50 |.v.D...v?.......|
+0x24,0xbd,0x09,0x2c,0x7c,0xc6,0xf2,0xd2,0x76,0x3f,0x15,0x59,0xff,0x70,0xbd,0x83, // 0000fd60 |$..,|...v?.Y.p..|
+0x30,0x69,0xc9,0x42,0x86,0xbf,0xce,0x7e,0xeb,0xd8,0xeb,0xe5,0x1f,0x60,0x97,0x02, // 0000fd70 |0i.B...~.....`..|
+0xf4,0xf7,0x67,0x74,0x38,0x62,0x50,0x5d,0x9d,0x40,0x2c,0x43,0x73,0x4a,0x55,0xb0, // 0000fd80 |..gt8bP].@,CsJU.|
+0x27,0x3a,0x21,0x47,0x47,0x59,0x5a,0xc2,0xfd,0x93,0xf1,0x31,0x9a,0x4c,0xa0,0x8b, // 0000fd90 |':!GGYZ....1.L..|
+0xf2,0x7b,0xaa,0x89,0x06,0x61,0xf3,0x0c,0x0f,0x56,0xa7,0xfb,0xb5,0x36,0x6e,0x67, // 0000fda0 |.{...a...V...6ng|
+0x65,0x0a,0xb5,0x34,0xb8,0x2a,0xa3,0x8c,0x21,0xa2,0xca,0x7a,0xca,0x8a,0xdf,0xde, // 0000fdb0 |e..4.*..!..z....|
+0x15,0xd2,0xc8,0x39,0xf9,0x1a,0xb2,0x36,0xf3,0x99,0x42,0x13,0xb6,0x7e,0x37,0x35, // 0000fdc0 |...9...6..B..~75|
+0xe5,0x14,0xa2,0xbf,0x85,0xe1,0x1a,0x35,0x3e,0x7e,0xe5,0x95,0xeb,0xb5,0xf6,0xa8, // 0000fdd0 |.......5>~......|
+0x3c,0xa8,0xd2,0x3d,0xee,0x20,0x84,0xee,0xa8,0x19,0xc7,0x7e,0xe4,0xe0,0x42,0x11, // 0000fde0 |<..=. .....~..B.|
+0x73,0xe0,0x18,0x2e,0x84,0x26,0x53,0xa1,0xbf,0x5c,0x89,0xb1,0x23,0xd5,0xf3,0x5b, // 0000fdf0 |s....&S..\..#..[|
+0x21,0x0a,0xbd,0x21,0x76,0x13,0x3c,0x92,0xa7,0x7d,0x12,0x7e,0x41,0x09,0xda,0x76, // 0000fe00 |!..!v.<..}.~A..v|
+0xc8,0x75,0x29,0x6f,0x34,0x4c,0xc2,0xf7,0x65,0xcb,0x34,0x8f,0xde,0xb1,0x4e,0x03, // 0000fe10 |.u)o4L..e.4...N.|
+0xd2,0x87,0xbb,0x36,0xc9,0xb4,0xd3,0xa8,0x44,0x51,0xc1,0xad,0x12,0x5d,0x2b,0x1d, // 0000fe20 |...6....DQ...]+.|
+0x33,0x26,0x56,0xc7,0x1e,0x92,0x00,0xc8,0xfc,0x4c,0x55,0x75,0x70,0xba,0x85,0x5d, // 0000fe30 |3&V......LUup..]|
+0x5e,0xbd,0x9c,0xfa,0x05,0x79,0xbd,0xe1,0x27,0xf5,0x35,0xfc,0xdb,0xa1,0xf8,0xdb, // 0000fe40 |^....y..'.5.....|
+0x2c,0xee,0x5d,0xf7,0x32,0x5a,0x2d,0x22,0xc9,0x1e,0x9a,0x37,0x06,0x91,0x81,0x24, // 0000fe50 |,.].2Z-"...7...$|
+0xf8,0x38,0xc0,0x15,0xc9,0x8e,0x8d,0x93,0x59,0x37,0xe9,0x8e,0x6e,0x02,0x9b,0xe4, // 0000fe60 |.8......Y7..n...|
+0x26,0xbf,0x20,0x9b,0xb4,0x10,0xdc,0x21,0x44,0xe0,0x3d,0x8a,0xf0,0x0b,0x2e,0x44, // 0000fe70 |&. ....!D.=....D|
+0x58,0x66,0x90,0xf8,0xd6,0x36,0x34,0x3d,0xb4,0x70,0x66,0xf9,0x5e,0x99,0x08,0xdf, // 0000fe80 |Xf...64=.pf.^...|
+0xee,0x7c,0x3d,0x28,0x5e,0x1b,0x15,0x4c,0xd3,0x22,0x95,0x81,0xde,0xc0,0x1b,0xa1, // 0000fe90 |.|=(^..L."......|
+0x47,0x21,0x2b,0x56,0x3e,0xdd,0x0a,0x4d,0xc8,0x00,0x5f,0x6a,0x4f,0x22,0x91,0xd0, // 0000fea0 |G!+V>..M.._jO"..|
+0xe5,0x15,0xd1,0x3c,0x4e,0xda,0xe8,0x80,0x39,0x13,0x6f,0x09,0xa8,0x7c,0x44,0xdd, // 0000feb0 |...<N...9.o..|D.|
+0xc4,0xe5,0x9e,0x65,0x41,0x0a,0x14,0x13,0xbb,0x2a,0x5b,0xac,0x16,0x0d,0x86,0xdf, // 0000fec0 |...eA....*[.....|
+0xbb,0xb8,0x88,0x34,0x48,0x58,0xcc,0xad,0x8f,0xbe,0x09,0x7a,0xbe,0x18,0x09,0xe6, // 0000fed0 |...4HX.....z....|
+0x13,0x2d,0x5e,0xb0,0x96,0x2f,0xa4,0x04,0x50,0xb7,0x59,0x4f,0x8a,0x5c,0x15,0xa2, // 0000fee0 |.-^../..P.YO.\..|
+0xeb,0xc7,0xea,0x63,0x39,0x43,0xf4,0x1f,0x49,0xaf,0x5c,0x81,0x37,0x11,0x4a,0x14, // 0000fef0 |...c9C..I.\.7.J.|
+0x46,0x67,0xed,0xe9,0x0d,0x85,0x92,0xc1,0x30,0xe5,0x6e,0x11,0x23,0xe7,0x12,0x3b, // 0000ff00 |Fg......0.n.#..;|
+0x28,0xa0,0x9b,0xd5,0x2b,0x40,0xb8,0x57,0x2d,0x09,0xcc,0x32,0x58,0xa7,0xfd,0xde, // 0000ff10 |(...+@.W-..2X...|
+0x67,0xad,0x8b,0x9a,0x1d,0x9f,0x2f,0xb2,0x94,0xd2,0x44,0xb7,0x25,0xd6,0x28,0xb3, // 0000ff20 |g...../...D.%.(.|
+0xf3,0xc9,0xdd,0xea,0x88,0xe0,0xea,0x7a,0x17,0x9e,0xa3,0xb6,0xcc,0xf4,0x60,0xaf, // 0000ff30 |.......z......`.|
+0x0a,0x69,0x73,0x94,0x35,0xd1,0x0c,0x61,0x4f,0xa3,0xe9,0x14,0x5b,0xb3,0x6e,0xa8, // 0000ff40 |.is.5..aO...[.n.|
+0xf2,0x25,0x6a,0x97,0xd2,0x74,0x03,0xc9,0xec,0x61,0x67,0xe5,0xc6,0x6f,0x72,0xfb, // 0000ff50 |.%j..t...ag..or.|
+0x24,0x4b,0x1c,0xa6,0x01,0x94,0x51,0xca,0x4c,0x0a,0x97,0x82,0xc3,0xb8,0x07,0xca, // 0000ff60 |$K....Q.L.......|
+0xa2,0x69,0xa9,0xa2,0x45,0xd0,0xdf,0x11,0x03,0xf8,0xe0,0x3c,0x10,0x12,0xec,0x36, // 0000ff70 |.i..E......<...6|
+0x0e,0x50,0xf3,0xa0,0x00,0xdf,0xeb,0xea,0x3f,0x15,0x2d,0xcf,0x2e,0x45,0xc5,0x31, // 0000ff80 |.P......?.-..E.1|
+0x44,0xff,0x5c,0x69,0x92,0x05,0xeb,0xa2,0x4a,0x11,0x55,0x24,0xa9,0x1f,0x76,0x1e, // 0000ff90 |D.\i....J.U$..v.|
+0xbb,0x48,0x1a,0x4f,0xf8,0x6d,0x3e,0x32,0xd2,0x10,0x4d,0xa3,0x29,0x99,0xf5,0xe8, // 0000ffa0 |.H.O.m>2..M.)...|
+0x24,0xd2,0x40,0x81,0x3c,0xbd,0x29,0xd2,0x6e,0xb0,0x05,0xcc,0x7d,0xdf,0xcb,0x76, // 0000ffb0 |$.@.<.).n...}..v|
+0x4d,0xf6,0xd5,0x3c,0xf7,0xec,0x3b,0xf1,0x8d,0xcd,0x62,0xe8,0xc1,0xb6,0xad,0xbc, // 0000ffc0 |M..<..;...b.....|
+0x08,0x3c,0x1d,0x88,0x3a,0x23,0x66,0x99,0xc6,0x2a,0xe7,0x94,0x54,0x7b,0xa1,0x9a, // 0000ffd0 |.<..:#f..*..T{..|
+0x49,0x5c,0xb6,0x77,0xa0,0x53,0xce,0xa2,0x75,0xbb,0xf2,0x92,0x57,0x4e,0x8c,0xcb, // 0000ffe0 |I\.w.S..u...WN..|
+0xc0,0x49,0x98,0xe2,0xb6,0x3e,0x8b,0x52,0x97,0xc3,0x8a,0x54,0x11,0x98,0xb8,0x72, // 0000fff0 |.I...>.R...T...r|
+};
+// clang-format on
+#endif  // OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DATA_H_
diff --git a/sw/device/tests/sigverify_parallel_digest.h b/sw/device/tests/sigverify_parallel_digest.h
new file mode 100644
index 0000000000000..c5137ddab8367
--- /dev/null
+++ b/sw/device/tests/sigverify_parallel_digest.h
@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DIGEST_H_
+#define OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DIGEST_H_
+
+// clang-format off
+const unsigned char sigverify_parallel_digest[] = {
+0xcd,0xde,0x27,0xe5,0xac,0x5c,0x8b,0xf1,0xc5,0x92,0xd4,0x22,0x94,0xe2,0x05,0xac, // 00000000 |..'..\....."....|
+0x3d,0xbb,0xbd,0x64,0xf6,0xf1,0x3c,0x8c,0x4c,0x38,0x95,0x81,0xc3,0xb4,0xbe,0xf5, // 00000010 |=..d..<.L8......|
+};
+// clang-format on
+#endif  // OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_DIGEST_H_
diff --git a/sw/device/tests/sigverify_parallel_ecdsa.h b/sw/device/tests/sigverify_parallel_ecdsa.h
new file mode 100644
index 0000000000000..7733d54dba5de
--- /dev/null
+++ b/sw/device/tests/sigverify_parallel_ecdsa.h
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_ECDSA_H_
+#define OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_ECDSA_H_
+
+// clang-format off
+const unsigned char sigverify_parallel_ecdsa[] = {
+0x04,0xc5,0xcd,0x64,0x8b,0xa1,0xc0,0x75,0x8e,0xd1,0xf2,0x9e,0xba,0x63,0x41,0xe8, // 00000000 |...d...u.....cA.|
+0x40,0x23,0xc9,0x20,0x2a,0x7f,0x74,0x01,0x47,0x50,0x54,0xdc,0x2d,0x42,0x15,0xc4, // 00000010 |@#. *.t.GPT.-B..|
+0x93,0xe2,0xff,0xf0,0x45,0x70,0x1c,0x9c,0x3c,0x41,0x33,0x86,0x15,0x64,0x2b,0x86, // 00000020 |....Ep..<A3..d+.|
+0x30,0x44,0x3b,0x89,0x3f,0xaf,0xb7,0x9b,0x43,0x34,0x2d,0x08,0x6d,0x01,0xed,0x68, // 00000030 |0D;.?...C4-.m..h|
+};
+// clang-format on
+#endif  // OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_ECDSA_H_
diff --git a/sw/device/tests/sigverify_parallel_spx.h b/sw/device/tests/sigverify_parallel_spx.h
new file mode 100644
index 0000000000000..4cd8a39ff242a
--- /dev/null
+++ b/sw/device/tests/sigverify_parallel_spx.h
@@ -0,0 +1,503 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_SPX_H_
+#define OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_SPX_H_
+
+// clang-format off
+const unsigned char sigverify_parallel_spx[] = {
+0x4f,0x5f,0x5c,0x07,0xb4,0x83,0x1b,0xc1,0xc3,0x9f,0x3a,0xed,0x25,0x13,0x85,0x01, // 00000000 |O_\.......:.%...|
+0xbc,0x36,0x39,0x6a,0x43,0xc4,0xc1,0x38,0xa9,0x99,0x0d,0x84,0xc1,0xec,0x55,0x51, // 00000010 |.69jC..8......UQ|
+0xc0,0xb6,0x99,0xa4,0xe2,0x23,0x27,0x10,0x60,0x70,0xbb,0x40,0x84,0xbe,0x8d,0x9a, // 00000020 |.....#'.`p.@....|
+0x0b,0x7d,0x63,0x53,0x6d,0xf4,0x3e,0xa1,0x8e,0x4e,0xa0,0x4d,0x60,0x90,0xa6,0xf0, // 00000030 |.}cSm.>..N.M`...|
+0xec,0x47,0x7e,0xd8,0x79,0x2e,0x9f,0xc8,0xc2,0x27,0x22,0xa5,0xdd,0x8d,0x81,0xc3, // 00000040 |.G~.y....'".....|
+0x46,0x08,0xa3,0xfe,0x60,0x53,0x8e,0x22,0x64,0x09,0xd7,0x1b,0x6f,0xde,0x3b,0x2b, // 00000050 |F...`S."d...o.;+|
+0x7f,0xd1,0x28,0xe5,0x6e,0xcd,0x6b,0x97,0xe8,0x73,0x8d,0x7c,0x76,0x5d,0xbd,0x98, // 00000060 |..(.n.k..s.|v]..|
+0x37,0x33,0xb0,0xad,0x85,0xdf,0x17,0xaa,0x4d,0x37,0x56,0xb9,0xf7,0x99,0x4b,0x86, // 00000070 |73......M7V...K.|
+0xf5,0x69,0xfa,0x36,0xa3,0xf9,0x9d,0xc2,0x61,0xea,0x35,0xc2,0x17,0x5c,0xe2,0xff, // 00000080 |.i.6....a.5..\..|
+0xb5,0xe6,0x9f,0xe9,0xf4,0x13,0xfe,0x8f,0x3a,0xf1,0x43,0xdc,0xc5,0xbd,0x11,0x85, // 00000090 |........:.C.....|
+0xca,0xb0,0x51,0xda,0x5a,0x0d,0x6f,0x27,0x71,0xb4,0x9d,0xfe,0x08,0x5e,0xcc,0x21, // 000000a0 |..Q.Z.o'q....^.!|
+0xff,0x8e,0x44,0x66,0xef,0x68,0x5e,0x82,0xac,0xb2,0xaf,0x28,0xd3,0x12,0xee,0x1d, // 000000b0 |..Df.h^....(....|
+0xe7,0x3b,0x5f,0x99,0x5c,0x85,0xb3,0xba,0xcc,0xd0,0x25,0x02,0xb0,0x98,0xe5,0x37, // 000000c0 |.;_.\.....%....7|
+0x9c,0xa5,0x37,0x81,0x0e,0xee,0x1e,0x69,0xa9,0xd1,0x8d,0xfa,0x12,0xec,0x20,0xbd, // 000000d0 |..7....i...... .|
+0x69,0x67,0x54,0x52,0x9a,0x46,0x84,0x64,0x52,0x4d,0x89,0xab,0xed,0xe1,0xe4,0xf6, // 000000e0 |igTR.F.dRM......|
+0xf3,0xbb,0x20,0xfa,0x12,0xeb,0xb8,0x3e,0x89,0x2c,0xf3,0x91,0xcd,0x6a,0x14,0xa5, // 000000f0 |.. ....>.,...j..|
+0xab,0x03,0x5d,0x71,0x21,0x62,0xff,0x5a,0x07,0x26,0x8f,0x86,0xb8,0xa6,0xed,0x95, // 00000100 |..]q!b.Z.&......|
+0x50,0xa9,0xa0,0x54,0x9e,0x2f,0x32,0xc5,0x59,0x25,0x2e,0x10,0x6c,0x33,0x9f,0x19, // 00000110 |P..T./2.Y%..l3..|
+0x75,0x52,0xb6,0x46,0xeb,0x57,0x6f,0x7f,0x29,0x16,0x3d,0x23,0x1f,0x36,0xfd,0x2e, // 00000120 |uR.F.Wo.).=#.6..|
+0x36,0xc2,0x94,0x62,0x5a,0xbf,0x99,0xd7,0x31,0x27,0x18,0xb3,0xc4,0x24,0x59,0x64, // 00000130 |6..bZ...1'...$Yd|
+0x68,0x90,0xbb,0xd5,0x6d,0x0b,0xc9,0xbd,0x31,0x72,0x46,0xb3,0x1f,0x69,0xf7,0xa5, // 00000140 |h...m...1rF..i..|
+0x37,0x27,0x18,0xa6,0x5a,0x99,0xab,0x32,0xbc,0xf0,0xa9,0x93,0x91,0xed,0x62,0x73, // 00000150 |7'..Z..2......bs|
+0xa5,0x2b,0xbf,0xed,0x85,0xc4,0xf5,0x8c,0x62,0x58,0x2f,0x2e,0xa1,0x61,0x83,0xda, // 00000160 |.+......bX/..a..|
+0xc0,0xfa,0xa2,0x7d,0x92,0x26,0x28,0x74,0x5d,0x53,0x07,0x35,0x7c,0xd8,0x33,0x69, // 00000170 |...}.&(t]S.5|.3i|
+0x14,0x21,0x16,0x95,0xe2,0x24,0xa2,0xab,0xe8,0x3f,0x81,0x59,0xd7,0xcf,0xdf,0xf8, // 00000180 |.!...$...?.Y....|
+0x48,0x44,0x29,0x1e,0x90,0xdf,0x7f,0xba,0xb3,0xc9,0xbc,0x06,0x11,0x67,0xd4,0x7f, // 00000190 |HD)..........g..|
+0x73,0x21,0x03,0x5f,0x8b,0x3a,0xc3,0x44,0x9d,0x61,0x6d,0x75,0x1f,0x8b,0xa5,0xce, // 000001a0 |s!._.:.D.amu....|
+0x05,0x74,0x0f,0xb9,0x61,0x0b,0x25,0x97,0x79,0x55,0x64,0x05,0x06,0xe7,0x60,0x36, // 000001b0 |.t..a.%.yUd...`6|
+0x7c,0x87,0xd1,0xa1,0x4c,0xed,0x16,0xea,0x3f,0x2b,0x75,0xa3,0xa6,0x6b,0x0c,0xfa, // 000001c0 ||...L...?+u..k..|
+0x17,0xac,0x79,0x53,0xe9,0xae,0x7a,0x6d,0xaf,0xa3,0x6f,0xc7,0x08,0x51,0xd0,0xd8, // 000001d0 |..yS..zm..o..Q..|
+0x15,0x38,0x57,0x37,0xb5,0x3e,0x4c,0x86,0x52,0xeb,0x7a,0x15,0x32,0x3c,0x69,0x75, // 000001e0 |.8W7.>L.R.z.2<iu|
+0xb2,0xda,0x5e,0xa1,0xa3,0x13,0xf7,0xb3,0xe7,0x59,0xb0,0xf9,0xe2,0x6b,0xf4,0xbd, // 000001f0 |..^......Y...k..|
+0x6c,0xe7,0x8d,0xae,0x86,0x7e,0x3f,0xee,0x59,0x0a,0x5e,0xf2,0x0d,0x30,0xe9,0xc8, // 00000200 |l....~?.Y.^..0..|
+0xd8,0x0a,0x92,0x76,0x9d,0x3e,0x04,0x37,0xb4,0x3c,0xb0,0x24,0xf0,0x0f,0xbf,0xe0, // 00000210 |...v.>.7.<.$....|
+0x8d,0xc3,0xcb,0x91,0xb1,0xbf,0x80,0xc2,0x49,0x8c,0x39,0x7c,0x07,0x3e,0x8d,0x5a, // 00000220 |........I.9|.>.Z|
+0x00,0x39,0x41,0xb6,0xca,0x8f,0xe9,0x13,0x4d,0x31,0x75,0x2b,0x0b,0x4c,0xd6,0xd2, // 00000230 |.9A.....M1u+.L..|
+0xc5,0x6c,0x84,0x8d,0x6d,0x09,0x1a,0x87,0xcf,0x02,0xb5,0x50,0x6d,0x0d,0xb7,0x17, // 00000240 |.l..m......Pm...|
+0x93,0x49,0xc9,0x82,0x6a,0xf2,0x71,0x08,0x49,0x21,0x05,0xf2,0xa1,0x08,0xa7,0x51, // 00000250 |.I..j.q.I!.....Q|
+0x6a,0x4b,0xd4,0x8a,0xe8,0xfe,0xfe,0x44,0xce,0x20,0x22,0xde,0xab,0xa8,0x47,0x7a, // 00000260 |jK.....D. "...Gz|
+0x29,0x60,0x3e,0x91,0x27,0x51,0xc9,0x3e,0x0c,0xa3,0x65,0x09,0x5b,0x67,0xc8,0x91, // 00000270 |)`>.'Q.>..e.[g..|
+0x24,0xaa,0x7d,0xe4,0xb9,0x94,0x55,0xdb,0x8a,0x4a,0xe1,0xc3,0x03,0xfc,0xa0,0x92, // 00000280 |$.}...U..J......|
+0x56,0xfd,0xc3,0x5e,0xcc,0xd2,0x5c,0xa5,0x68,0xd0,0x8b,0x74,0xfd,0xd6,0x55,0x90, // 00000290 |V..^..\.h..t..U.|
+0x9a,0x94,0xbd,0x80,0x4f,0xcf,0xb6,0x8d,0xa3,0xa1,0x7a,0x98,0xff,0x51,0x43,0xb3, // 000002a0 |....O.....z..QC.|
+0x60,0x15,0xe0,0x9b,0xa2,0xba,0x77,0x69,0xaa,0xaf,0x97,0xff,0x19,0x03,0x28,0xff, // 000002b0 |`.....wi......(.|
+0x44,0x19,0x7d,0x90,0x89,0xf8,0xec,0x0a,0x59,0x52,0x72,0xf7,0x73,0x10,0x11,0xd6, // 000002c0 |D.}.....YRr.s...|
+0xe3,0x7f,0x12,0x0a,0xd9,0x3e,0xf2,0xa9,0x06,0x8b,0x92,0xcc,0xd2,0xbd,0x48,0xd9, // 000002d0 |.....>........H.|
+0x7a,0x5c,0xeb,0x56,0x7b,0x0f,0x96,0xa7,0xb1,0x7c,0x79,0x3d,0x49,0x6a,0xa1,0xf4, // 000002e0 |z\.V{....|y=Ij..|
+0xad,0x26,0x02,0x0f,0x96,0x82,0x96,0x34,0x00,0x43,0xfc,0x3e,0x54,0x9f,0x3c,0x96, // 000002f0 |.&.....4.C.>T.<.|
+0x98,0x03,0x77,0xbc,0xf3,0x69,0x8e,0x5b,0x15,0x68,0xf7,0xd6,0xbf,0x61,0xb5,0x22, // 00000300 |..w..i.[.h...a."|
+0x15,0x6f,0xf9,0xcd,0x58,0x8b,0x30,0xd4,0x5d,0x7e,0x2a,0x58,0x6d,0x43,0x25,0x23, // 00000310 |.o..X.0.]~*XmC%#|
+0x7f,0x1b,0x06,0xc3,0x4a,0x04,0xdd,0xe4,0xef,0x44,0x3c,0xfa,0xb8,0x4e,0x9b,0x88, // 00000320 |....J....D<..N..|
+0xd3,0x7b,0xbe,0x23,0xaf,0x0e,0x9f,0xe9,0xc0,0x65,0x7b,0x32,0xa4,0xcf,0x84,0xb7, // 00000330 |.{.#.....e{2....|
+0x8a,0x83,0xd2,0x46,0xcd,0xa7,0x19,0x93,0xd2,0x21,0xd4,0xd0,0x0c,0x2e,0x85,0x91, // 00000340 |...F.....!......|
+0x85,0xa1,0x4b,0x1c,0x54,0xaf,0x50,0x67,0x31,0xe0,0x3a,0xae,0x0c,0xa9,0x9c,0xd4, // 00000350 |..K.T.Pg1.:.....|
+0x1f,0xde,0x1a,0x24,0xca,0xa0,0x15,0x85,0x34,0x5e,0x90,0x69,0x79,0x78,0x6d,0x54, // 00000360 |...$....4^.iyxmT|
+0x73,0xc7,0xb2,0x16,0xd1,0x74,0xa5,0x98,0x6c,0xaa,0xdb,0x68,0x1d,0xa0,0xe1,0x11, // 00000370 |s....t..l..h....|
+0xa4,0xdd,0x61,0x70,0xac,0x82,0x28,0x2e,0xf6,0x15,0x80,0xaa,0x98,0x78,0xe0,0x14, // 00000380 |..ap..(......x..|
+0xd3,0x5f,0x05,0xc0,0xd7,0x76,0x98,0x08,0xac,0x13,0xed,0x47,0xec,0x92,0xf1,0x9d, // 00000390 |._...v.....G....|
+0x75,0x46,0xb6,0x9a,0x49,0x78,0xab,0xb6,0xe6,0x49,0x89,0x79,0x70,0x57,0xf1,0x3c, // 000003a0 |uF..Ix...I.ypW.<|
+0xd8,0x23,0x51,0x36,0x31,0xf9,0x04,0xe4,0x81,0xbd,0x7c,0x29,0x7f,0x60,0x58,0xd0, // 000003b0 |.#Q61.....|).`X.|
+0x46,0x55,0x2f,0x5b,0x68,0x5e,0xe1,0x22,0x5a,0xb7,0x4a,0x11,0xfa,0x1a,0xc4,0xec, // 000003c0 |FU/[h^."Z.J.....|
+0x71,0x67,0x50,0x48,0x79,0x6c,0xe7,0x27,0xfa,0x27,0x79,0x1e,0xfd,0x84,0x4a,0xa7, // 000003d0 |qgPHyl.'.'y...J.|
+0xda,0xf3,0x40,0xfd,0xdf,0x72,0x1f,0xfa,0xdd,0xc4,0xc0,0x6a,0x70,0x00,0xc3,0xae, // 000003e0 |..@..r.....jp...|
+0x23,0xa7,0x53,0x16,0x35,0x4e,0x09,0xfc,0xca,0xd8,0x70,0xef,0xa1,0x45,0xe1,0xd3, // 000003f0 |#.S.5N....p..E..|
+0xa3,0x80,0xd6,0xd2,0xf2,0x0d,0x5d,0x39,0x5b,0x4a,0x33,0xaa,0x4b,0x0c,0x5c,0x78, // 00000400 |......]9[J3.K.\x|
+0x73,0x35,0x3d,0xdd,0xb5,0x69,0x2d,0xe8,0xfb,0x40,0x6f,0x23,0x6d,0xe0,0x74,0x84, // 00000410 |s5=..i-..@o#m.t.|
+0xe7,0x10,0x8c,0xb2,0xcb,0xe8,0x7e,0x74,0x64,0xb5,0xbf,0x58,0xa6,0xd1,0x5b,0x23, // 00000420 |......~td..X..[#|
+0x6c,0xa3,0x6e,0x19,0xee,0x3a,0xe5,0x78,0xa1,0x8d,0x59,0xc4,0xc9,0x3e,0x13,0x5e, // 00000430 |l.n..:.x..Y..>.^|
+0x8a,0x22,0x23,0x98,0xfb,0x08,0x40,0xcd,0x87,0xbd,0x91,0xfc,0x96,0x97,0x9e,0xfc, // 00000440 |."#...@.........|
+0x64,0xcf,0x1c,0x9d,0x8b,0x2a,0x54,0x4c,0xc7,0x18,0xf7,0xa9,0x5b,0x41,0x29,0x86, // 00000450 |d....*TL....[A).|
+0x77,0xd3,0x3b,0xba,0xc9,0x69,0x32,0xef,0xc7,0x76,0xc0,0x42,0x81,0xc1,0x25,0x7f, // 00000460 |w.;..i2..v.B..%.|
+0x8f,0x5c,0x64,0x46,0x6b,0x0f,0xdb,0xce,0x10,0x8c,0x05,0xef,0x6e,0xa3,0xcc,0x13, // 00000470 |.\dFk.......n...|
+0xd2,0x3a,0x7a,0xf2,0xd8,0x9a,0x47,0xa7,0x6b,0x11,0x4e,0x9e,0x53,0xaa,0x82,0x28, // 00000480 |.:z...G.k.N.S..(|
+0x19,0x0f,0x6f,0xcd,0x2b,0x5e,0xb6,0xe8,0x72,0xba,0x44,0x89,0xb5,0x3c,0x0d,0xed, // 00000490 |..o.+^..r.D..<..|
+0x29,0xcb,0x66,0xb3,0xdd,0x2c,0xa2,0xef,0x15,0xd4,0x5a,0x76,0xee,0xda,0xd2,0x97, // 000004a0 |).f..,....Zv....|
+0xc5,0x6e,0x20,0x34,0x5b,0x6a,0x46,0xe1,0x3d,0xd5,0xf6,0xa8,0xdd,0x51,0x4b,0x46, // 000004b0 |.n 4[jF.=....QKF|
+0xeb,0x9a,0x1d,0x1e,0x34,0x15,0xd9,0xa2,0x28,0x9d,0xd3,0x6b,0xb3,0x05,0xae,0x5f, // 000004c0 |....4...(..k..._|
+0x66,0x1a,0xca,0x49,0xb2,0xe0,0x38,0x47,0x2a,0x86,0xa8,0x2c,0x81,0x78,0x78,0xa8, // 000004d0 |f..I..8G*..,.xx.|
+0xce,0x16,0x01,0x86,0x67,0x6c,0x21,0x27,0xab,0x67,0x98,0xd1,0x7b,0xcc,0xd4,0x73, // 000004e0 |....gl!'.g..{..s|
+0x6e,0xcb,0xc1,0xc5,0xb7,0x35,0xb8,0x05,0x28,0x05,0x06,0xa5,0xa5,0x78,0xdd,0x87, // 000004f0 |n....5..(....x..|
+0x49,0x2e,0x7d,0xea,0xbc,0xdf,0xb8,0x40,0x46,0x80,0xbc,0x97,0x8c,0xfe,0xc8,0xdd, // 00000500 |I.}....@F.......|
+0x2a,0xa4,0x4e,0xc1,0xc0,0x78,0x2e,0x49,0xde,0xe4,0x61,0x14,0x8d,0x82,0xa2,0x9d, // 00000510 |*.N..x.I..a.....|
+0x98,0xfc,0x8d,0xec,0xd6,0x60,0xcf,0x56,0x20,0x05,0xfd,0x12,0x0f,0x5b,0xd8,0xc1, // 00000520 |.....`.V ....[..|
+0x6a,0x1a,0x4b,0x08,0xa5,0x0f,0x59,0xfc,0x67,0xcf,0x60,0xbb,0x1e,0x69,0x19,0x25, // 00000530 |j.K...Y.g.`..i.%|
+0x69,0xeb,0xc7,0x94,0x57,0x65,0x4b,0x4d,0xac,0xde,0xc8,0x99,0x71,0x5e,0xbf,0x7d, // 00000540 |i...WeKM....q^.}|
+0xd8,0x41,0x62,0x76,0x23,0x59,0xe7,0xf3,0x08,0xf2,0x11,0x02,0x3a,0xb3,0x38,0x18, // 00000550 |.Abv#Y......:.8.|
+0x15,0x9b,0x1b,0x8e,0xfc,0x12,0x91,0x7b,0x38,0xbe,0x23,0x40,0x34,0x85,0xc1,0xa0, // 00000560 |.......{8.#@4...|
+0x30,0xc2,0xff,0x6c,0xe0,0xbc,0x1a,0x8d,0xbf,0x1e,0x6d,0x5f,0x1c,0xcb,0x95,0x9e, // 00000570 |0..l......m_....|
+0xb8,0x27,0x8f,0xa5,0xa8,0x89,0xce,0xd1,0xf9,0x84,0xac,0x22,0x6b,0x65,0xa2,0x3d, // 00000580 |.'........."ke.=|
+0x49,0xd2,0xd5,0x69,0x13,0x86,0x79,0x1c,0x2c,0x3e,0x2c,0xf1,0x99,0x22,0x70,0xb7, // 00000590 |I..i..y.,>,.."p.|
+0xfe,0x3c,0xf8,0x1f,0x80,0x25,0xf6,0x53,0x47,0xe4,0x97,0xd4,0x7d,0xee,0x91,0x7e, // 000005a0 |.<...%.SG...}..~|
+0x0d,0xc3,0x7d,0x93,0xe0,0x35,0x24,0xac,0x18,0x14,0xd0,0x03,0xdf,0xa7,0x1b,0x55, // 000005b0 |..}..5$........U|
+0x15,0xf2,0xd3,0xae,0x81,0xf1,0x03,0xf4,0x72,0x96,0xaa,0x00,0xaf,0x05,0xe3,0xaa, // 000005c0 |........r.......|
+0x35,0x2e,0x50,0x47,0xbb,0x9d,0x43,0x3f,0x98,0x7e,0x72,0xe5,0x75,0xc0,0x6f,0x4c, // 000005d0 |5.PG..C?.~r.u.oL|
+0x08,0x36,0x53,0xb4,0x2a,0x36,0x76,0xd5,0x51,0x93,0xf3,0x76,0xd7,0x4b,0x7b,0x7c, // 000005e0 |.6S.*6v.Q..v.K{||
+0x01,0xd5,0x92,0xfb,0x90,0xa7,0xc5,0x3a,0xe4,0xcb,0xa6,0xd7,0x09,0xb3,0x58,0x1e, // 000005f0 |.......:......X.|
+0x91,0x49,0x6c,0x83,0x0c,0x70,0x60,0x05,0x10,0x49,0x5c,0xca,0xf2,0x3e,0x0f,0x19, // 00000600 |.Il..p`..I\..>..|
+0x8a,0xe1,0xde,0x66,0x5e,0x0c,0xdf,0xf9,0x5f,0xd0,0x19,0xc4,0xa4,0x01,0x68,0x68, // 00000610 |...f^..._.....hh|
+0xc3,0x72,0x64,0x5d,0x93,0x38,0x31,0x0e,0xf7,0x5b,0x41,0xa2,0x68,0x3d,0x58,0x56, // 00000620 |.rd].81..[A.h=XV|
+0x49,0x85,0x66,0x21,0x07,0xe0,0x01,0xaa,0xf6,0x39,0x6c,0x53,0x98,0x7b,0x47,0xd2, // 00000630 |I.f!.....9lS.{G.|
+0xa2,0xec,0xe6,0xa6,0xe4,0xc1,0xa6,0x44,0xd4,0x4c,0x8e,0xd0,0x45,0x2d,0xd5,0xe9, // 00000640 |.......D.L..E-..|
+0x5a,0x6c,0xd2,0xa4,0x48,0xb8,0x89,0x44,0x14,0x32,0x58,0x95,0xd2,0xc6,0x1f,0xb1, // 00000650 |Zl..H..D.2X.....|
+0x80,0xc9,0x94,0x3c,0xb9,0x71,0x1c,0xe3,0xd4,0xb9,0x20,0xd4,0x03,0x5e,0xd9,0x0a, // 00000660 |...<.q.... ..^..|
+0x30,0x0e,0xb3,0xbb,0x93,0xae,0x91,0x86,0x4c,0x87,0x8d,0xba,0x44,0xb8,0x63,0xc8, // 00000670 |0.......L...D.c.|
+0x0e,0x92,0x00,0x64,0xe2,0xe3,0xd0,0x0f,0xab,0x0b,0x4c,0x37,0xff,0x38,0xd3,0x8d, // 00000680 |...d......L7.8..|
+0x14,0x27,0xf5,0xa7,0x0d,0x23,0xe5,0x3a,0x84,0x0f,0xf7,0x58,0x51,0x8c,0xcb,0x05, // 00000690 |.'...#.:...XQ...|
+0x1f,0x29,0x66,0xd7,0x09,0x73,0xa7,0x08,0x3e,0xfe,0xfe,0x4b,0x50,0x8a,0x7e,0xbf, // 000006a0 |.)f..s..>..KP.~.|
+0xdd,0x31,0xad,0xc7,0xf2,0xa6,0xe5,0xd1,0x59,0x7a,0x4a,0x58,0x8a,0x42,0x94,0x6e, // 000006b0 |.1......YzJX.B.n|
+0xbf,0x6c,0xd5,0xdd,0xa1,0x61,0x20,0xe1,0x96,0xac,0xf2,0xc9,0xe4,0x1f,0x45,0x37, // 000006c0 |.l...a .......E7|
+0x71,0x4f,0xfb,0xa3,0x93,0x7e,0x28,0x3b,0x95,0xb6,0x0d,0xe8,0xee,0x61,0xfd,0x10, // 000006d0 |qO...~(;.....a..|
+0x06,0x29,0x1f,0x3f,0xeb,0x67,0xe0,0x4c,0xba,0x7f,0x99,0xb5,0x81,0xf4,0x35,0xbb, // 000006e0 |.).?.g.L......5.|
+0xfd,0x9f,0xa4,0x38,0x46,0x48,0xc8,0x3e,0x29,0x26,0xf6,0xc1,0xa3,0x3d,0xe4,0xdc, // 000006f0 |...8FH.>)&...=..|
+0xc2,0x7a,0x1d,0x67,0x50,0x6f,0xc4,0xe8,0x99,0x7f,0x33,0x58,0x69,0x9c,0x03,0xce, // 00000700 |.z.gPo....3Xi...|
+0xb5,0xc0,0xe9,0x0b,0x68,0x8f,0xb1,0x73,0x18,0xad,0x99,0x33,0x99,0xbf,0x1a,0x5f, // 00000710 |....h..s...3..._|
+0x0b,0x9d,0x05,0x8c,0xf0,0x48,0xc2,0xaa,0x57,0xf2,0xd2,0x39,0x85,0x27,0x56,0x0e, // 00000720 |.....H..W..9.'V.|
+0x03,0xc2,0x0a,0x10,0x4f,0x99,0x88,0x04,0x67,0xb6,0x59,0x95,0xbe,0x0b,0x22,0xcd, // 00000730 |....O...g.Y...".|
+0x46,0x08,0xf1,0xbd,0x84,0x4c,0x55,0x56,0x2c,0x60,0xa1,0xb5,0x6b,0x0a,0xb2,0x34, // 00000740 |F....LUV,`..k..4|
+0x92,0x19,0xa4,0x80,0x2b,0x75,0x50,0xca,0x9f,0xa4,0x95,0x4a,0x5b,0x7a,0xcb,0xb4, // 00000750 |....+uP....J[z..|
+0xde,0x9b,0x61,0x8c,0xf5,0x65,0xac,0xfa,0xc6,0x32,0xd3,0xce,0x32,0xed,0xb3,0xbc, // 00000760 |..a..e...2..2...|
+0x77,0x4f,0x6b,0x83,0x74,0xa8,0x59,0x6d,0x20,0x75,0x7e,0x64,0x30,0x5d,0x8b,0xc6, // 00000770 |wOk.t.Ym u~d0]..|
+0xe3,0x5a,0x5c,0x39,0xbb,0x1d,0xe0,0x51,0x7f,0xce,0x1d,0x39,0x91,0xcd,0x79,0xe8, // 00000780 |.Z\9...Q...9..y.|
+0xd5,0x5c,0x55,0x8b,0x6a,0xc6,0x39,0x07,0x1c,0xb9,0x7b,0x3c,0xbd,0x1f,0xdf,0xd8, // 00000790 |.\U.j.9...{<....|
+0x45,0x61,0xdd,0x7d,0x37,0xb0,0x54,0xda,0xff,0x4e,0xb9,0xb4,0xc6,0x01,0x76,0x3e, // 000007a0 |Ea.}7.T..N....v>|
+0xcb,0x25,0x5d,0xf0,0x57,0xf6,0x0b,0x12,0xa1,0xc3,0x33,0xa7,0xf8,0x70,0x13,0x43, // 000007b0 |.%].W.....3..p.C|
+0x2a,0xe0,0x14,0x56,0x6b,0xe4,0xf4,0xaf,0xf0,0xa4,0x80,0x0a,0x82,0x76,0x79,0x98, // 000007c0 |*..Vk........vy.|
+0x5e,0x59,0x87,0x8b,0x0e,0x73,0x09,0x07,0xe3,0xdb,0x60,0x94,0x1f,0x65,0xad,0x17, // 000007d0 |^Y...s....`..e..|
+0xa3,0x32,0x1d,0x2f,0xc9,0x87,0x09,0x41,0x93,0x15,0x4c,0x6c,0x1f,0xa1,0xbb,0x42, // 000007e0 |.2./...A..Ll...B|
+0x4a,0x21,0xe8,0x2e,0xbd,0xf3,0x66,0x7d,0x58,0xb1,0x99,0xda,0x3b,0x91,0xef,0x1e, // 000007f0 |J!....f}X...;...|
+0x0d,0x63,0xbe,0x51,0xfe,0x87,0x35,0x3b,0xd8,0xc6,0xb1,0x92,0x38,0x7b,0xbe,0x2b, // 00000800 |.c.Q..5;....8{.+|
+0xa1,0x09,0x6c,0x95,0x17,0x66,0xa6,0xb0,0x5b,0xb4,0x63,0x6c,0x92,0xe7,0x10,0x99, // 00000810 |..l..f..[.cl....|
+0xc6,0x1d,0x6b,0x8b,0xe2,0x74,0x94,0xe1,0xf7,0x28,0x71,0xba,0x1a,0xfe,0x63,0x76, // 00000820 |..k..t...(q...cv|
+0xc9,0xd8,0xd5,0xde,0x23,0x40,0x9e,0xe0,0x00,0x2c,0xb9,0xce,0x52,0x0f,0x1c,0x33, // 00000830 |....#@...,..R..3|
+0xf1,0x98,0x63,0x18,0x04,0x83,0xc7,0x31,0xc3,0x71,0xe2,0x9e,0x00,0x5e,0xfc,0x67, // 00000840 |..c....1.q...^.g|
+0xe6,0xc2,0xfd,0xcb,0xd2,0xfa,0x34,0xa2,0x6c,0xe0,0x59,0x0a,0x12,0x68,0x22,0x4e, // 00000850 |......4.l.Y..h"N|
+0x24,0xe4,0x4b,0xab,0xd3,0xaa,0x42,0x9e,0xc0,0xe5,0xb8,0xe5,0xe8,0x47,0xee,0x7d, // 00000860 |$.K...B......G.}|
+0x61,0xe0,0x0e,0x54,0x78,0xf8,0x59,0xa2,0x64,0x42,0x37,0xa3,0x39,0xfe,0xdc,0x8b, // 00000870 |a..Tx.Y.dB7.9...|
+0x92,0xd7,0xeb,0xbb,0xbe,0x2f,0xb6,0x29,0xf9,0x91,0x86,0x81,0xa1,0xed,0xab,0x94, // 00000880 |...../.)........|
+0xae,0xf2,0x12,0x09,0x8b,0x48,0x66,0x36,0x14,0x7f,0x6c,0xd7,0xcc,0x85,0x3c,0x4b, // 00000890 |.....Hf6..l...<K|
+0x76,0xa0,0xc4,0x68,0x09,0x34,0xe4,0x81,0xd8,0x3f,0xb4,0x7c,0xa3,0x35,0x2e,0x69, // 000008a0 |v..h.4...?.|.5.i|
+0x44,0x5c,0x96,0x6b,0xb1,0xf9,0x0a,0xd7,0x79,0xb4,0x2f,0x38,0xd6,0x2e,0x02,0xa0, // 000008b0 |D\.k....y./8....|
+0xb0,0x84,0x5c,0xcf,0x9f,0xb7,0xc4,0xd1,0x90,0x9a,0x35,0x8e,0x7e,0x6c,0xce,0x16, // 000008c0 |..\.......5.~l..|
+0x6c,0x35,0x54,0x9a,0x66,0x80,0xc2,0xd8,0xd7,0x54,0xbb,0xfd,0xe8,0x39,0xe7,0xa5, // 000008d0 |l5T.f....T...9..|
+0xb3,0x66,0x9f,0xaf,0x2b,0xb1,0xe0,0x79,0xed,0x3a,0xe6,0x81,0x3c,0x9e,0xe5,0x05, // 000008e0 |.f..+..y.:..<...|
+0x82,0xc3,0x06,0xcc,0xbb,0x5c,0x4a,0xc3,0x93,0x07,0x3e,0xd1,0x22,0x34,0x4b,0xf0, // 000008f0 |.....\J...>."4K.|
+0x3d,0x68,0x97,0xf5,0x61,0xe7,0x97,0xa6,0xdf,0x3e,0xfe,0x41,0xe6,0xe9,0x55,0xb7, // 00000900 |=h..a....>.A..U.|
+0x06,0x59,0xc8,0xa8,0x34,0xe2,0x74,0x61,0xf8,0xa6,0x19,0x15,0x95,0x28,0x32,0x58, // 00000910 |.Y..4.ta.....(2X|
+0x44,0x90,0xf0,0xee,0x43,0xfd,0x52,0xe9,0xe0,0x12,0xb2,0x64,0x01,0xdd,0xc6,0x59, // 00000920 |D...C.R....d...Y|
+0x8e,0xc9,0xfb,0x0e,0x7c,0x31,0x00,0xfc,0x3b,0x25,0xa6,0x1c,0x10,0x62,0xa5,0x35, // 00000930 |....|1..;%...b.5|
+0x6b,0x60,0xc1,0x60,0x6e,0xbb,0x76,0x24,0xec,0x38,0x1e,0xc4,0x55,0x4d,0xde,0xaa, // 00000940 |k`.`n.v$.8..UM..|
+0x49,0x64,0x27,0x78,0xa6,0x96,0xa7,0xd2,0x0c,0x1f,0x1a,0x97,0xbe,0x6e,0x20,0x69, // 00000950 |Id'x.........n i|
+0x7d,0xee,0x3f,0x9b,0x6b,0x31,0x8f,0x9e,0x8c,0x8e,0x10,0x4c,0xb9,0xd7,0x2c,0x0c, // 00000960 |}.?.k1.....L..,.|
+0x55,0x68,0x7e,0x5c,0xc4,0x78,0xb6,0xe1,0x86,0xbb,0x2c,0xe0,0x33,0xb2,0x33,0x32, // 00000970 |Uh~\.x....,.3.32|
+0x42,0x2a,0x8b,0xdf,0x70,0xa6,0xde,0xbc,0x85,0x66,0x8f,0x83,0x81,0x5b,0xc5,0x06, // 00000980 |B*..p....f...[..|
+0xdb,0xfd,0x7e,0x7b,0x4e,0xdb,0xfa,0xaa,0x92,0x07,0xec,0x45,0x76,0x30,0x3e,0xe2, // 00000990 |..~{N......Ev0>.|
+0x60,0x96,0xf8,0x26,0xfb,0xdb,0x2e,0x62,0x59,0xd4,0x45,0x89,0x56,0x06,0x39,0x4d, // 000009a0 |`..&...bY.E.V.9M|
+0x87,0x0c,0x44,0x04,0xf8,0x16,0x00,0x4e,0xe2,0x78,0xca,0xca,0xf4,0x9b,0x17,0xc9, // 000009b0 |..D....N.x......|
+0xbe,0x8d,0x3e,0x9a,0x16,0x82,0x9e,0x67,0xfb,0xb1,0xa3,0x1c,0xa9,0xa8,0x80,0xfc, // 000009c0 |..>....g........|
+0x14,0x2f,0xc8,0x30,0x8f,0xbd,0x42,0x2e,0x5d,0xf0,0x10,0xfa,0xef,0x81,0x95,0x09, // 000009d0 |./.0..B.].......|
+0x2d,0x12,0xcf,0x0d,0xcc,0xa9,0x71,0xd9,0xf0,0xbe,0xb6,0xee,0x6b,0x75,0x26,0xb4, // 000009e0 |-.....q.....ku&.|
+0x17,0x76,0x21,0x86,0xd9,0x0d,0x3e,0xa1,0x08,0x41,0x91,0x3e,0x50,0x34,0x67,0x36, // 000009f0 |.v!...>..A.>P4g6|
+0x2c,0xda,0x2b,0xce,0x50,0xbf,0x3f,0x64,0x45,0xe0,0x5d,0xa2,0x11,0xc3,0xf5,0xb1, // 00000a00 |,.+.P.?dE.].....|
+0x00,0xf0,0x2e,0xe9,0xd9,0x76,0xf7,0x37,0xe8,0xba,0x85,0xff,0xe7,0x76,0x58,0xdd, // 00000a10 |.....v.7.....vX.|
+0x89,0x2f,0xd0,0xa9,0xbc,0xae,0x25,0xab,0x6f,0xdd,0xc1,0x3d,0xb2,0xf6,0x74,0xa2, // 00000a20 |./....%.o..=..t.|
+0xef,0x16,0x60,0x84,0x47,0x3d,0xb2,0x81,0x29,0x35,0x56,0x13,0x7a,0x22,0x6a,0xf9, // 00000a30 |..`.G=..)5V.z"j.|
+0xe9,0xe9,0xc6,0x01,0xf6,0x03,0x28,0xc1,0xaa,0xad,0x86,0x2e,0x28,0x41,0x6e,0x01, // 00000a40 |......(.....(An.|
+0x5f,0x94,0x97,0x95,0xac,0x18,0x50,0x69,0x2f,0xed,0xf5,0x04,0xdf,0x51,0xdf,0x8b, // 00000a50 |_.....Pi/....Q..|
+0x0a,0x7d,0x6c,0xf3,0x2d,0x00,0x2f,0xe3,0xb8,0x10,0xd3,0xcb,0x0a,0x75,0xf5,0x1b, // 00000a60 |.}l.-./......u..|
+0xc4,0x01,0x22,0xfd,0xcc,0x0c,0x5a,0xe0,0x67,0xc5,0xf7,0x26,0x19,0xb2,0x6d,0x76, // 00000a70 |.."...Z.g..&..mv|
+0xc5,0x4c,0x8b,0x2f,0xac,0x6a,0x1d,0x49,0xa9,0x94,0x67,0x2d,0xd9,0x89,0xef,0xff, // 00000a80 |.L./.j.I..g-....|
+0xa0,0x9e,0xd7,0xa1,0x87,0x7e,0x54,0x06,0x3a,0x9a,0xd0,0xc8,0xf2,0x89,0x40,0x34, // 00000a90 |.....~T.:.....@4|
+0xc7,0x55,0x0b,0xf7,0x5d,0x03,0x91,0xd0,0x1d,0xd1,0x72,0x60,0x10,0x16,0xe2,0x4e, // 00000aa0 |.U..].....r`...N|
+0x42,0xd0,0x0b,0xfc,0x97,0xf4,0x89,0xfb,0xd0,0x85,0xf7,0x88,0xb3,0x56,0x76,0xa7, // 00000ab0 |B............Vv.|
+0x48,0x1b,0x93,0x04,0x08,0xa9,0xc2,0xa7,0x70,0x3f,0xaf,0xdb,0x2f,0xc3,0x75,0x85, // 00000ac0 |H.......p?../.u.|
+0x56,0xdf,0xee,0xe9,0x64,0xb5,0x22,0x60,0x0d,0x93,0xdd,0x4e,0xf2,0x1e,0x94,0xe4, // 00000ad0 |V...d."`...N....|
+0xab,0xe6,0xc0,0x59,0xab,0x39,0x0d,0xe0,0x90,0x59,0x30,0xa9,0x5d,0x29,0xc4,0xaa, // 00000ae0 |...Y.9...Y0.])..|
+0x8d,0x30,0xbc,0xa2,0x87,0xa9,0xed,0xb1,0x6d,0x2e,0x46,0xaa,0xe7,0xdc,0x72,0xd6, // 00000af0 |.0......m.F...r.|
+0x26,0x70,0xc7,0x35,0x3b,0x6b,0x9e,0xa2,0xcc,0x5d,0x9b,0x88,0x04,0x5d,0x73,0x1a, // 00000b00 |&p.5;k...]...]s.|
+0xbb,0xb9,0xdc,0xbc,0x91,0x42,0xfe,0xdd,0x03,0x27,0xfd,0xb7,0x6c,0x54,0xbb,0x92, // 00000b10 |.....B...'..lT..|
+0x19,0xbd,0xda,0x24,0x9b,0x8a,0x10,0xe3,0x16,0xea,0xc8,0xe1,0xd2,0x96,0x13,0xc9, // 00000b20 |...$............|
+0x04,0xe1,0x58,0x25,0x4c,0xc5,0x1f,0x3c,0x51,0x55,0x88,0x0e,0x29,0x43,0x64,0x39, // 00000b30 |..X%L..<QU..)Cd9|
+0x04,0x0d,0x7f,0x1c,0x0e,0x51,0x39,0xd6,0x2a,0x20,0xa8,0x7a,0x13,0xa1,0x45,0xdc, // 00000b40 |.....Q9.* .z..E.|
+0xda,0xff,0x35,0xb4,0xca,0xd0,0x17,0x0d,0xc5,0x4f,0xf5,0x9e,0xd4,0x55,0xa9,0xfb, // 00000b50 |..5......O...U..|
+0x1d,0x2d,0xd8,0x4b,0x6d,0x19,0x6d,0x4f,0x4c,0x43,0x1f,0xa1,0x0a,0xb9,0x3b,0x10, // 00000b60 |.-.Km.mOLC....;.|
+0x98,0x02,0xcd,0x93,0xb4,0xcc,0x2a,0x63,0xf8,0xde,0xcf,0xe7,0xe6,0x80,0xd4,0x3d, // 00000b70 |......*c.......=|
+0x5e,0xa4,0x5a,0x25,0x3c,0xa0,0xb2,0x90,0x51,0x8f,0x4e,0x5d,0xd1,0x1d,0x4b,0xde, // 00000b80 |^.Z%<...Q.N]..K.|
+0x15,0x53,0x5e,0xd1,0x56,0x0d,0x49,0x9f,0x03,0xa6,0x52,0x64,0x2a,0x05,0x81,0xc2, // 00000b90 |.S^.V.I...Rd*...|
+0x90,0x2b,0xa4,0xd3,0x2c,0x7c,0x79,0xd3,0x0c,0x85,0xff,0x9d,0x17,0x45,0x9e,0xd3, // 00000ba0 |.+..,|y......E..|
+0x4c,0xbe,0x5f,0x40,0xd9,0xf1,0x92,0x7d,0x9c,0x54,0x4b,0x5e,0x5c,0x82,0x80,0x41, // 00000bb0 |L._@...}.TK^\..A|
+0xee,0x97,0xdf,0x47,0xce,0xbe,0x98,0x2f,0x1e,0xb8,0xb5,0x4d,0xc5,0x03,0x81,0x18, // 00000bc0 |...G.../...M....|
+0xdc,0xb3,0x8e,0x24,0xf7,0x67,0x9f,0x07,0xf4,0x4b,0xaf,0x35,0x79,0xde,0xf1,0x47, // 00000bd0 |...$.g...K.5y..G|
+0x27,0xd2,0x6e,0x9a,0xdc,0xa8,0x2f,0xb6,0xef,0x8d,0xda,0x05,0x87,0x44,0x83,0x9f, // 00000be0 |'.n.../......D..|
+0xcf,0x53,0x42,0xdf,0x4e,0x12,0xe3,0x53,0x5f,0x9e,0x74,0xa6,0xe4,0xcf,0xb0,0x63, // 00000bf0 |.SB.N..S_.t....c|
+0xb8,0x89,0xa8,0x3f,0xf8,0xb1,0xc1,0x2f,0xa4,0xf4,0xc3,0xf4,0x8b,0x23,0x31,0x18, // 00000c00 |...?.../.....#1.|
+0xd9,0x5a,0x5f,0xc9,0x60,0x34,0x3b,0x95,0x1c,0x9d,0x9b,0x8e,0xea,0x19,0x95,0x9f, // 00000c10 |.Z_.`4;.........|
+0xee,0x8c,0x7f,0xf0,0x32,0x76,0xcd,0xa1,0xb6,0xc9,0xe5,0xd6,0x8a,0x2b,0x66,0x71, // 00000c20 |....2v.......+fq|
+0xc2,0x77,0x90,0x5d,0xd4,0xd4,0xaa,0x75,0x57,0x54,0x32,0x6b,0xfd,0x24,0xa6,0xb3, // 00000c30 |.w.]...uWT2k.$..|
+0x36,0x96,0x46,0xf3,0x81,0x00,0xbf,0x5d,0x3e,0x3e,0x5a,0x25,0x3a,0x50,0x54,0x49, // 00000c40 |6.F....]>>Z%:PTI|
+0x50,0xb1,0xc0,0x0b,0x9f,0x2a,0x8f,0xc0,0xce,0x2a,0xb6,0x0e,0x0e,0x4a,0x21,0xaa, // 00000c50 |P....*...*...J!.|
+0xd4,0x20,0x03,0xb6,0x0c,0xce,0xfb,0xf8,0x40,0x1b,0xba,0x55,0x08,0x42,0xcd,0xb1, // 00000c60 |. ......@..U.B..|
+0x23,0xfb,0x19,0xc8,0x48,0x7b,0xdf,0x37,0x76,0x46,0x35,0xe4,0x65,0xca,0xf5,0x2a, // 00000c70 |#...H{.7vF5.e..*|
+0x7b,0xd2,0x05,0x05,0x62,0x38,0x6f,0xc5,0x7b,0xdf,0xc2,0x22,0xfa,0x0d,0xb8,0x67, // 00000c80 |{...b8o.{.."...g|
+0x1e,0x60,0xf4,0x03,0xe0,0xd0,0xbc,0x40,0x49,0x92,0x2b,0x7d,0x9a,0x92,0xe3,0xf1, // 00000c90 |.`.....@I.+}....|
+0x98,0xb6,0xa3,0x00,0x2a,0x82,0xaa,0xa5,0xac,0x7a,0xea,0xa7,0xa9,0x00,0x44,0x1f, // 00000ca0 |....*....z....D.|
+0xd0,0x85,0x80,0x7c,0xb9,0xe5,0x94,0x7e,0x31,0x27,0x26,0xeb,0xed,0xb4,0xff,0x4f, // 00000cb0 |...|...~1'&....O|
+0xc4,0xdc,0x3f,0xf9,0x36,0x4b,0x13,0x54,0xba,0xc2,0x78,0xac,0xe4,0xb8,0x30,0xe5, // 00000cc0 |..?.6K.T..x...0.|
+0x9e,0x5d,0xc3,0x83,0x4e,0x20,0xd7,0x00,0xec,0x5b,0x18,0x30,0xd9,0x8e,0xcd,0x1b, // 00000cd0 |.]..N ...[.0....|
+0x79,0x7a,0x2a,0x8c,0xe1,0xd1,0x99,0x60,0x09,0x27,0x42,0x81,0x25,0xd4,0xf9,0xcc, // 00000ce0 |yz*....`.'B.%...|
+0xe6,0xc2,0x34,0xbb,0x38,0x31,0x39,0x4c,0x40,0x1c,0x1d,0x49,0x6c,0xd2,0xe2,0x1f, // 00000cf0 |..4.819L@..Il...|
+0x89,0xfd,0x8b,0xd0,0x8c,0x92,0xfd,0xad,0x65,0xa8,0x27,0x34,0xb2,0x6c,0xc5,0x5a, // 00000d00 |........e.'4.l.Z|
+0xf0,0x78,0xf5,0xc9,0x81,0xe3,0xce,0x52,0xfd,0x6b,0x12,0xe4,0x8b,0xe3,0x32,0x90, // 00000d10 |.x.....R.k....2.|
+0xda,0xe4,0xe8,0x82,0x81,0xe3,0xe1,0x87,0xed,0x40,0xfd,0xfa,0x42,0xbb,0x8c,0xea, // 00000d20 |.........@..B...|
+0x72,0x46,0x28,0x2f,0x7c,0x96,0x74,0x9a,0x39,0x55,0x8e,0xb4,0x36,0xeb,0x82,0x58, // 00000d30 |rF(/|.t.9U..6..X|
+0xec,0x53,0x55,0xf0,0x92,0x45,0x94,0x6b,0x72,0x53,0x43,0xbd,0xf8,0x1c,0x0a,0xdf, // 00000d40 |.SU..E.krSC.....|
+0x1d,0x62,0xb2,0xdf,0xd4,0x68,0x17,0x51,0xc7,0x74,0x3f,0xed,0x77,0x74,0xf3,0xae, // 00000d50 |.b...h.Q.t?.wt..|
+0x9e,0x23,0x51,0x61,0x2b,0x38,0x4a,0x5f,0xe0,0x3a,0xb5,0x5c,0x80,0x6a,0x1a,0xb5, // 00000d60 |.#Qa+8J_.:.\.j..|
+0xec,0x93,0xf9,0x80,0xfc,0x12,0x26,0xb7,0x7d,0xdd,0x73,0x31,0x12,0x36,0xeb,0xbe, // 00000d70 |......&.}.s1.6..|
+0x6c,0x3d,0x72,0x3a,0x01,0x5b,0x03,0xd4,0xf6,0x7e,0xb1,0xef,0xf6,0xee,0x1b,0x2c, // 00000d80 |l=r:.[...~.....,|
+0xfc,0x74,0x48,0xee,0xe5,0xe6,0x50,0xd6,0x74,0xef,0x51,0x8a,0x16,0x2e,0xe4,0xd5, // 00000d90 |.tH...P.t.Q.....|
+0xa2,0xf3,0x28,0x15,0x31,0xfc,0xbe,0xc3,0xc5,0xff,0x8c,0x95,0x3c,0x21,0x77,0x4d, // 00000da0 |..(.1.......<!wM|
+0x7d,0xff,0x4e,0x08,0x18,0xeb,0x65,0xd1,0x54,0x0f,0xc1,0x97,0xc8,0xfe,0xbe,0x4c, // 00000db0 |}.N...e.T......L|
+0xe9,0xfa,0xbf,0xf5,0xfc,0x8f,0x76,0x44,0x90,0x7c,0xb4,0x4e,0x82,0xad,0xb4,0x7c, // 00000dc0 |......vD.|.N...||
+0x19,0xc5,0xc5,0x2b,0xd5,0xec,0x2a,0xe6,0x5b,0x64,0xab,0xc4,0xf6,0x93,0xf8,0x2c, // 00000dd0 |...+..*.[d.....,|
+0xce,0xd5,0xbd,0x59,0x6f,0xd5,0x8c,0xe9,0x0e,0x12,0xc7,0x14,0x84,0x43,0x63,0x0e, // 00000de0 |...Yo........Cc.|
+0x3c,0xe5,0xee,0x0e,0xfd,0x0f,0x13,0x09,0x97,0xb0,0x3c,0xbe,0x6a,0x30,0x3b,0xcc, // 00000df0 |<.........<.j0;.|
+0xfd,0x3d,0x5c,0x6c,0x39,0x96,0x02,0xe9,0x5d,0x46,0xd1,0x77,0x44,0x79,0x14,0x89, // 00000e00 |.=\l9...]F.wDy..|
+0xe1,0x15,0xe3,0xe0,0x15,0x7b,0x65,0x31,0xb1,0xfd,0xb9,0x95,0xe2,0x54,0xfd,0xc9, // 00000e10 |.....{e1.....T..|
+0x65,0x48,0x3d,0xc9,0x2f,0x61,0xa0,0xa7,0x6e,0xb7,0x3f,0xfc,0x6b,0xab,0xf3,0xc0, // 00000e20 |eH=./a..n.?.k...|
+0x8f,0xf5,0x74,0x4a,0x8d,0x7d,0xaf,0xd8,0xa8,0x78,0xfd,0x5d,0x22,0xf3,0x1a,0xec, // 00000e30 |..tJ.}...x.]"...|
+0x7a,0x94,0x50,0x01,0x65,0x56,0x83,0x31,0xd4,0x7c,0x14,0x69,0xe0,0x30,0x74,0x0e, // 00000e40 |z.P.eV.1.|.i.0t.|
+0x9d,0x9c,0x86,0x7b,0x4c,0x0e,0xcf,0x3b,0x93,0x75,0xfd,0xcc,0xfe,0xb3,0x36,0xcd, // 00000e50 |...{L..;.u....6.|
+0x52,0x2e,0x20,0x85,0x0e,0xd8,0x9b,0x0e,0x33,0x4c,0x00,0x2f,0x1e,0xec,0x80,0x6d, // 00000e60 |R. .....3L./...m|
+0x9d,0x2d,0x18,0xeb,0x76,0x16,0x25,0x59,0x76,0x6f,0xb6,0xb6,0xeb,0xf2,0x48,0xbd, // 00000e70 |.-..v.%Yvo....H.|
+0x67,0x5a,0xba,0x50,0x62,0x0a,0x76,0x5b,0x89,0x7d,0x8d,0x30,0x43,0xb8,0x17,0x03, // 00000e80 |gZ.Pb.v[.}.0C...|
+0xcd,0xfa,0xf3,0xb7,0x6d,0xd1,0x79,0x00,0x7d,0xc8,0xa2,0xe9,0x9c,0x42,0xee,0x92, // 00000e90 |....m.y.}....B..|
+0x38,0x91,0xb2,0x37,0x18,0xfc,0x9b,0xf6,0xf8,0x5a,0xcc,0x24,0xfd,0xf1,0x50,0xf2, // 00000ea0 |8..7.....Z.$..P.|
+0xf5,0xba,0xd9,0x6c,0x27,0xcb,0x14,0x17,0xe4,0xe7,0xc0,0xeb,0x2c,0xf2,0x2d,0xb7, // 00000eb0 |...l'.......,.-.|
+0x43,0x45,0x08,0x80,0x99,0x91,0x00,0x99,0x0a,0x0b,0x08,0xb8,0xaa,0xb9,0xa2,0x7b, // 00000ec0 |CE.............{|
+0x87,0xe9,0x0e,0x20,0xd2,0x44,0x76,0x29,0x5c,0x45,0x8c,0xba,0xa5,0x67,0x27,0x34, // 00000ed0 |... .Dv)\E...g'4|
+0x1a,0x47,0x39,0xae,0x66,0x0b,0xdc,0x1d,0x2f,0x29,0x1f,0x2e,0xbf,0xda,0x2b,0x78, // 00000ee0 |.G9.f.../)....+x|
+0xda,0x0e,0xa5,0xf8,0x74,0xc3,0xb8,0xd7,0xfb,0xc6,0xdc,0x40,0x46,0x47,0xde,0x68, // 00000ef0 |....t......@FG.h|
+0x7f,0xd3,0x73,0xbd,0x71,0xc5,0x67,0xc6,0xc1,0x51,0x12,0x19,0xec,0xca,0x21,0x0a, // 00000f00 |..s.q.g..Q....!.|
+0x84,0x8e,0xd3,0x37,0x4b,0x87,0x88,0x60,0x1f,0x68,0xf6,0xa6,0x7e,0xed,0x5b,0xb3, // 00000f10 |...7K..`.h..~.[.|
+0x27,0xfe,0x29,0xc2,0xa6,0x5f,0x69,0x1e,0xdf,0x06,0xb6,0xdf,0x6a,0xd6,0x53,0xe8, // 00000f20 |'.).._i.....j.S.|
+0x71,0xab,0x7c,0x6e,0x97,0xf7,0x84,0xda,0xb2,0x8a,0x63,0xce,0xcf,0x62,0x9c,0x37, // 00000f30 |q.|n......c..b.7|
+0x73,0x93,0x3b,0x14,0xa1,0x35,0x1a,0xcb,0x46,0xcb,0x8b,0xcc,0x16,0x59,0x78,0x75, // 00000f40 |s.;..5..F....Yxu|
+0x6d,0xd3,0x11,0xea,0x4b,0x98,0x6a,0x80,0x81,0x9c,0x35,0x59,0x37,0xbe,0xaf,0x92, // 00000f50 |m...K.j...5Y7...|
+0x32,0x10,0xa0,0xde,0xa6,0xcf,0x71,0x14,0xc5,0xff,0x74,0x42,0x67,0x99,0x4e,0xdd, // 00000f60 |2.....q...tBg.N.|
+0xb1,0x08,0x5b,0xeb,0x17,0x88,0xb2,0xd3,0xbf,0x27,0x72,0x8d,0xe1,0xb4,0x60,0x2a, // 00000f70 |..[......'r...`*|
+0x07,0xc3,0xfa,0x9b,0xef,0x6f,0x34,0x02,0x33,0x22,0x9a,0x15,0x41,0x0e,0x48,0x8d, // 00000f80 |.....o4.3"..A.H.|
+0x58,0x24,0x3d,0x2a,0x8d,0x2a,0x1f,0xd4,0xaf,0xff,0xf7,0x57,0x86,0x9f,0x80,0xc6, // 00000f90 |X$=*.*.....W....|
+0x09,0x68,0x76,0x3b,0xb7,0x07,0x00,0x54,0xf8,0x3d,0xe5,0x61,0x87,0x19,0xea,0xfe, // 00000fa0 |.hv;...T.=.a....|
+0x49,0x1d,0x01,0x85,0x80,0x5d,0xce,0x9f,0xa3,0x32,0x40,0xb8,0x6e,0x81,0x52,0x26, // 00000fb0 |I....]...2@.n.R&|
+0x1e,0xeb,0xdf,0xb3,0x29,0xf3,0xd3,0x64,0xfd,0xa8,0xef,0x55,0xe1,0x6f,0x99,0x60, // 00000fc0 |....)..d...U.o.`|
+0x25,0xf1,0x3c,0x3c,0x51,0x46,0x57,0xc5,0xde,0x47,0x25,0x15,0x9d,0x6b,0xf1,0x65, // 00000fd0 |%.<<QFW..G%..k.e|
+0x4c,0x73,0x9c,0xff,0x37,0x6b,0x99,0xf2,0xe0,0x91,0x25,0x76,0x76,0x74,0xd0,0xe5, // 00000fe0 |Ls..7k....%vvt..|
+0xc1,0x4d,0xa3,0xd5,0xb0,0x8f,0x3c,0x37,0x26,0x87,0x48,0x42,0xa7,0xca,0x7d,0x7a, // 00000ff0 |.M....<7&.HB..}z|
+0x31,0xc6,0xdf,0x62,0x6a,0x7b,0x67,0x3c,0x82,0xb0,0x93,0x2c,0xd5,0x2c,0x71,0x58, // 00001000 |1..bj{g<...,.,qX|
+0x32,0x4e,0xb4,0xed,0x95,0x20,0xc0,0xb7,0x97,0x7f,0x5b,0x37,0x05,0x0d,0x85,0x94, // 00001010 |2N... ....[7....|
+0xa7,0x28,0x1d,0x2d,0x8c,0x4d,0x19,0x24,0x95,0xa2,0xd4,0x20,0x8e,0x3c,0xc6,0xef, // 00001020 |.(.-.M.$... .<..|
+0xf7,0x5e,0xc2,0x01,0x21,0xe5,0xb2,0xf7,0xe2,0xaf,0xc6,0x2b,0x2a,0x07,0x99,0xfb, // 00001030 |.^..!......+*...|
+0x3b,0x3a,0xb8,0xc5,0x5a,0x3b,0xab,0xa9,0x89,0xa5,0x3e,0xa2,0x71,0x59,0x3d,0xe6, // 00001040 |;:..Z;....>.qY=.|
+0xde,0x61,0xdd,0x94,0x96,0xb6,0xfd,0xa4,0x8b,0x27,0xe0,0xff,0xbb,0x47,0xf2,0xd5, // 00001050 |.a.......'...G..|
+0x8c,0x59,0x17,0x1b,0x0f,0xa5,0x18,0xf5,0x8c,0x54,0xe6,0xca,0x26,0xfe,0x0f,0xcb, // 00001060 |.Y.......T..&...|
+0x35,0x39,0xd1,0xc8,0x4b,0x10,0x0e,0x4b,0x87,0xdd,0x44,0xc2,0x46,0x09,0x57,0x6e, // 00001070 |59..K..K..D.F.Wn|
+0xd8,0xf1,0x7e,0x90,0x33,0x20,0x8c,0x93,0x06,0x9f,0x8a,0xaf,0x80,0x12,0xaf,0x7e, // 00001080 |..~.3 .........~|
+0x51,0xa8,0xd3,0x57,0xd9,0x71,0xa8,0xf2,0x33,0x16,0x88,0x9d,0x06,0x66,0x97,0xac, // 00001090 |Q..W.q..3....f..|
+0x22,0x28,0x71,0xb3,0x4e,0x20,0xa9,0xe7,0x54,0x6a,0x6d,0xa3,0x29,0xfe,0xcc,0x15, // 000010a0 |"(q.N ..Tjm.)...|
+0x6f,0x44,0x0c,0x79,0xce,0x6f,0xf0,0x41,0x46,0xc9,0xc8,0x11,0xa7,0x97,0x10,0x21, // 000010b0 |oD.y.o.AF......!|
+0x12,0xd2,0x8c,0x5d,0xa6,0x43,0x5c,0x38,0x49,0x77,0x60,0xf2,0xff,0x59,0x9a,0xba, // 000010c0 |...].C\8Iw`..Y..|
+0x6d,0xd6,0xe2,0xe8,0x80,0x25,0x0f,0xfe,0xb6,0x7a,0x42,0xf9,0x07,0xb0,0x76,0x6c, // 000010d0 |m....%...zB...vl|
+0x6f,0x4c,0x10,0x6d,0xdc,0x30,0xe8,0xad,0x70,0x78,0x02,0xaf,0xca,0x55,0x69,0x92, // 000010e0 |oL.m.0..px...Ui.|
+0x22,0xf4,0x05,0xee,0x23,0x13,0xd3,0x54,0x53,0x0c,0x6b,0x6e,0x3d,0xa2,0xf3,0xa0, // 000010f0 |"...#..TS.kn=...|
+0xf0,0x15,0xc2,0x88,0x27,0x67,0xd1,0x72,0x08,0x04,0x08,0x2a,0x76,0x48,0x51,0xba, // 00001100 |....'g.r...*vHQ.|
+0xf8,0xfd,0x95,0x35,0x24,0xc3,0xf3,0xc5,0xc5,0x5f,0x88,0xa9,0xa7,0x2d,0x15,0x5f, // 00001110 |...5$...._...-._|
+0x81,0xba,0xde,0xc0,0xb6,0x63,0x84,0xa3,0x43,0xbb,0xe5,0x14,0x5c,0x64,0xe1,0x81, // 00001120 |.....c..C...\d..|
+0x46,0x98,0xd0,0x0a,0x28,0x54,0x1f,0xb5,0x99,0x8f,0xcb,0x6a,0x43,0x28,0x6b,0x65, // 00001130 |F...(T.....jC(ke|
+0x3a,0x77,0xc5,0x84,0xb6,0xc6,0xfb,0xee,0x33,0x65,0x2e,0x96,0x63,0xe9,0x3f,0x1e, // 00001140 |:w......3e..c.?.|
+0x2b,0x32,0x84,0x7d,0xc4,0x64,0x4c,0xcd,0x84,0xbd,0xa8,0xab,0x42,0x12,0xe3,0x26, // 00001150 |+2.}.dL.....B..&|
+0x7d,0xa6,0x41,0x77,0x8a,0x23,0x63,0x5d,0xf1,0xd3,0xce,0x98,0x4b,0x5f,0xb5,0xae, // 00001160 |}.Aw.#c]....K_..|
+0x8d,0xbc,0x8b,0xab,0x3d,0x49,0xb9,0x7b,0x3a,0x32,0x14,0xbe,0xee,0x45,0x22,0xd9, // 00001170 |....=I.{:2...E".|
+0x98,0x9d,0xc9,0xb6,0x45,0xca,0xfe,0x7a,0xf4,0x89,0x39,0xae,0x46,0x1c,0x03,0xb3, // 00001180 |....E..z..9.F...|
+0xb9,0x97,0x5b,0xba,0x6f,0xc7,0xef,0x60,0x88,0x8e,0xba,0xbf,0xe8,0x6a,0x80,0x21, // 00001190 |..[.o..`.....j.!|
+0xe2,0xfd,0x6d,0x11,0x2d,0x37,0x79,0xfa,0xf5,0x84,0x56,0xc1,0x21,0x91,0x85,0x79, // 000011a0 |..m.-7y...V.!..y|
+0xf8,0x1f,0x4b,0x97,0xcc,0x07,0x1b,0x17,0x5c,0x59,0x98,0xb7,0xc6,0x36,0x07,0x3b, // 000011b0 |..K.....\Y...6.;|
+0xf5,0x57,0x5e,0xa5,0xcb,0x6c,0x8e,0xc6,0x05,0x50,0x49,0x94,0xbf,0xd8,0xf1,0xbb, // 000011c0 |.W^..l...PI.....|
+0x81,0x1e,0x3b,0x8a,0xc0,0x93,0x61,0x12,0xe2,0x73,0xb0,0x78,0xd6,0x96,0x4c,0x8c, // 000011d0 |..;...a..s.x..L.|
+0x89,0x14,0x4b,0xa0,0x72,0x0e,0x12,0x40,0xa7,0x83,0x60,0x62,0x0a,0x15,0x2c,0xbb, // 000011e0 |..K.r..@..`b..,.|
+0xc5,0x81,0x6f,0xb5,0x5f,0x03,0x82,0x85,0xc2,0xf6,0x84,0x71,0xa2,0x3e,0x76,0x2c, // 000011f0 |..o._......q.>v,|
+0xe8,0xe3,0xfa,0x58,0x4f,0x51,0x3b,0xc6,0x70,0x90,0x96,0x26,0x8f,0xfe,0x3c,0xe8, // 00001200 |...XOQ;.p..&..<.|
+0x41,0xb7,0xd8,0xe1,0x21,0xc7,0xdd,0x64,0x72,0x34,0xab,0x3f,0xa5,0xaa,0x90,0x22, // 00001210 |A...!..dr4.?..."|
+0x33,0xd9,0x79,0xf4,0xb8,0xcb,0x84,0x6e,0x27,0x73,0x11,0xce,0x8c,0x9e,0x3f,0x07, // 00001220 |3.y....n's....?.|
+0xcf,0x4e,0x69,0x97,0x9c,0x15,0x1c,0xc4,0x9a,0x75,0xc3,0x20,0x28,0x77,0x73,0x99, // 00001230 |.Ni......u. (ws.|
+0x4b,0xc0,0x36,0x0e,0x5e,0xe4,0xa4,0x11,0xe8,0x31,0x89,0x8e,0x27,0x1f,0x8a,0xdc, // 00001240 |K.6.^....1..'...|
+0xaf,0xe4,0xfd,0x65,0xc2,0x20,0x98,0x69,0x32,0xad,0x92,0x99,0x32,0x8c,0x17,0x33, // 00001250 |...e. .i2...2..3|
+0x50,0xb0,0xd3,0x3e,0xdf,0x6c,0xec,0x6c,0xb0,0x37,0x95,0x83,0xcc,0xdb,0x17,0x4b, // 00001260 |P..>.l.l.7.....K|
+0x77,0x23,0x5e,0xee,0xce,0x97,0xb1,0x34,0x19,0xd5,0x93,0xb2,0xca,0x3b,0x05,0xe2, // 00001270 |w#^....4.....;..|
+0xc8,0xd1,0x72,0xb4,0xae,0x3e,0x06,0x24,0xdf,0x66,0x0a,0x41,0x47,0x24,0xd6,0xd4, // 00001280 |..r..>.$.f.AG$..|
+0x9b,0xe1,0x4d,0x11,0x7f,0x08,0x20,0x09,0x21,0x04,0xaa,0x77,0x14,0xa5,0x16,0xd5, // 00001290 |..M... .!..w....|
+0x5c,0xc4,0x08,0x70,0xf2,0x50,0x99,0xf0,0x5c,0x59,0xca,0xcb,0xaa,0xf6,0x44,0x5f, // 000012a0 |\..p.P..\Y....D_|
+0xba,0x6e,0x6b,0x59,0x04,0xcc,0xc4,0x0e,0xaa,0x78,0x64,0xa5,0xf3,0x78,0x3f,0x9e, // 000012b0 |.nkY.....xd..x?.|
+0xb8,0x89,0xd3,0xde,0xa2,0xad,0x99,0xac,0x69,0xe5,0x3d,0x87,0x83,0xb8,0xdc,0x40, // 000012c0 |........i.=....@|
+0xed,0x42,0x63,0x30,0xbd,0x47,0xf4,0x4c,0xf1,0xd5,0x2a,0x06,0xd6,0xb4,0x14,0x64, // 000012d0 |.Bc0.G.L..*....d|
+0xa6,0x31,0xc8,0xe5,0x26,0x8a,0xeb,0xb0,0xd8,0x0b,0x05,0x88,0xe5,0x0a,0x16,0x22, // 000012e0 |.1..&.........."|
+0x4f,0x79,0xde,0x80,0x89,0xcd,0xcf,0xfa,0x63,0xd6,0x10,0x7a,0x79,0x69,0x78,0x6e, // 000012f0 |Oy......c..zyixn|
+0xb0,0xff,0x16,0x94,0x1d,0xaa,0xc6,0xd2,0x3b,0xcb,0x00,0xee,0xdb,0x66,0x7e,0xe6, // 00001300 |........;....f~.|
+0x90,0xdd,0x03,0x32,0x6a,0x7a,0xab,0xad,0x6c,0x5c,0xc7,0xbb,0xa9,0x4b,0x44,0xd4, // 00001310 |...2jz..l\...KD.|
+0x1d,0xc5,0xb2,0x23,0xc0,0xb2,0xcc,0xee,0x83,0x72,0xcc,0x15,0xd3,0x0a,0x6d,0xeb, // 00001320 |...#.....r....m.|
+0x95,0x3f,0x2e,0xe6,0xde,0xfb,0x68,0x92,0x5a,0x19,0xb9,0xd9,0xb8,0x36,0x2a,0x3b, // 00001330 |.?....h.Z....6*;|
+0x70,0x43,0x87,0xbb,0x52,0x65,0xa6,0x06,0x82,0x7a,0x93,0x46,0xdc,0x9e,0x52,0x32, // 00001340 |pC..Re...z.F..R2|
+0xf2,0x46,0xc6,0x93,0xa8,0x4a,0x80,0x41,0xcc,0x82,0x4e,0x51,0x0e,0x27,0x5e,0x7c, // 00001350 |.F...J.A..NQ.'^||
+0x47,0x9f,0xaf,0x63,0xdd,0x47,0x90,0xf6,0xaf,0xdb,0x44,0x6f,0xe9,0x87,0xd6,0x45, // 00001360 |G..c.G....Do...E|
+0x6d,0x0f,0x82,0xbb,0xf2,0x74,0x67,0xf4,0x0e,0xfb,0xa0,0x3b,0x56,0x2b,0xfa,0xdc, // 00001370 |m....tg....;V+..|
+0xba,0xbb,0xa7,0x76,0x36,0x99,0x24,0x82,0xa3,0x6e,0x0f,0xb0,0x06,0xb3,0x4f,0xe7, // 00001380 |...v6.$..n....O.|
+0x76,0xe4,0x0c,0xc7,0xc5,0x63,0x7e,0x51,0x4c,0x3f,0xa0,0xd0,0x54,0x1b,0x41,0xdd, // 00001390 |v....c~QL?..T.A.|
+0x73,0x02,0xbe,0x8e,0x34,0xc5,0x53,0x02,0x82,0x90,0x03,0x22,0xc5,0xed,0x60,0xaf, // 000013a0 |s...4.S...."..`.|
+0xd5,0x61,0x1d,0xe9,0x91,0x3f,0x68,0xd4,0x77,0xc8,0x25,0xce,0xaf,0xfb,0x28,0x9f, // 000013b0 |.a...?h.w.%...(.|
+0x34,0xf4,0x9c,0x6a,0x4f,0xf6,0x1a,0x2a,0x83,0xa8,0xb0,0x6b,0xd0,0x66,0xc5,0x73, // 000013c0 |4..jO..*...k.f.s|
+0x99,0x57,0x8e,0xf1,0xba,0xde,0xd5,0x1c,0xc2,0x5b,0xc9,0xbc,0xb3,0x57,0xfd,0x92, // 000013d0 |.W.......[...W..|
+0xf0,0xdb,0xf3,0xca,0x03,0xf3,0xdb,0x9f,0xba,0x62,0xba,0x7b,0x7b,0x6a,0x30,0xfc, // 000013e0 |.........b.{{j0.|
+0x3d,0x19,0xcc,0x9a,0xa9,0x79,0x4f,0xf8,0x6a,0xfb,0x4c,0x4e,0xb3,0xc1,0x86,0x46, // 000013f0 |=....yO.j.LN...F|
+0x3d,0x0a,0x03,0x03,0xe5,0x60,0x1f,0x35,0xbf,0xb7,0x3e,0xf0,0xb5,0x89,0xeb,0x53, // 00001400 |=....`.5..>....S|
+0xe7,0xa3,0x17,0x57,0xb0,0x15,0x77,0x09,0x1a,0x4e,0xb8,0x6c,0x25,0x1d,0xa4,0x31, // 00001410 |...W..w..N.l%..1|
+0x7e,0xc4,0x53,0x63,0x9f,0x2b,0x6f,0xe6,0x0b,0xa8,0xbe,0x14,0xe1,0x70,0x66,0x72, // 00001420 |~.Sc.+o......pfr|
+0xf0,0xab,0xc1,0xd3,0x18,0x73,0x27,0x74,0x66,0x03,0x87,0x68,0x1a,0x00,0xec,0x6a, // 00001430 |.....s'tf..h...j|
+0x15,0x16,0x23,0x66,0x20,0xdc,0xa0,0x52,0xd6,0xdb,0xd6,0x02,0x29,0x6a,0x13,0xa9, // 00001440 |..#f ..R....)j..|
+0x3a,0x08,0x1f,0x86,0x63,0x76,0x97,0x47,0x51,0x0e,0xba,0xaf,0xad,0x98,0xdb,0x86, // 00001450 |:...cv.GQ.......|
+0x1a,0xc2,0xde,0xe3,0xda,0xcd,0x30,0x09,0x82,0xbe,0x69,0x8c,0x69,0xa1,0xf0,0x82, // 00001460 |......0...i.i...|
+0x47,0xa1,0x09,0x3e,0xc8,0xb7,0x5a,0x61,0x8a,0x5a,0x49,0x2b,0xac,0x50,0x28,0x0f, // 00001470 |G..>..Za.ZI+.P(.|
+0xda,0x4b,0x6d,0x29,0xa2,0x49,0x41,0xcd,0x68,0x45,0x1c,0xab,0x86,0x69,0x82,0xc0, // 00001480 |.Km).IA.hE...i..|
+0xb8,0xb0,0x4b,0x01,0x44,0x14,0xc4,0x9e,0xef,0xf6,0xb4,0x42,0x2a,0x4d,0xf0,0x28, // 00001490 |..K.D......B*M.(|
+0x28,0x18,0x55,0x89,0x71,0x1f,0xf6,0x34,0xd0,0x0c,0xbb,0x73,0x35,0xa0,0x5e,0xea, // 000014a0 |(.U.q..4...s5.^.|
+0xf5,0x75,0x0e,0x61,0x1c,0x07,0x9c,0x49,0x5d,0x07,0x96,0x86,0x40,0x73,0xc1,0x46, // 000014b0 |.u.a...I]...@s.F|
+0xaa,0x30,0x8b,0xc1,0xff,0xf8,0xd9,0x53,0x5d,0xb2,0x44,0xea,0x78,0xc6,0xe8,0x93, // 000014c0 |.0.....S].D.x...|
+0xbf,0xdc,0x59,0xf4,0x95,0x70,0x68,0xc2,0x11,0xb3,0x38,0x1d,0x06,0x18,0xbb,0x24, // 000014d0 |..Y..ph...8....$|
+0x31,0xe8,0xcb,0x85,0x27,0xda,0x27,0x5f,0x76,0xa5,0x5b,0x9d,0xfc,0x6f,0x09,0x53, // 000014e0 |1...'.'_v.[..o.S|
+0x9d,0xca,0x66,0x3e,0xf5,0x27,0xce,0x8b,0x77,0x5a,0xf1,0xc0,0x14,0x6c,0x3c,0x66, // 000014f0 |..f>.'..wZ...l<f|
+0xee,0xe1,0x72,0x62,0xb6,0x24,0x1b,0x99,0x7d,0x17,0x7b,0x08,0xca,0x79,0xd7,0x50, // 00001500 |..rb.$..}.{..y.P|
+0x0d,0x11,0x08,0xa2,0x9e,0x13,0x28,0x61,0xda,0x27,0x1d,0x1e,0x65,0xaa,0x59,0x0e, // 00001510 |......(a.'..e.Y.|
+0xd4,0x91,0xfe,0x50,0x71,0x36,0x3d,0x96,0x27,0xc3,0xee,0xd2,0x53,0x33,0xbb,0x9a, // 00001520 |...Pq6=.'...S3..|
+0x5f,0x2f,0x34,0x67,0x8b,0x8e,0xdb,0x70,0x2f,0xd7,0x8a,0x68,0x3d,0x83,0xf8,0x33, // 00001530 |_/4g...p/..h=..3|
+0x18,0xe9,0x30,0x62,0xa4,0x1c,0xda,0x3b,0xcd,0x25,0x01,0x7e,0x98,0x70,0xfe,0x69, // 00001540 |..0b...;.%.~.p.i|
+0x41,0x57,0xc7,0x66,0x79,0xd3,0x2e,0x18,0x8c,0x37,0x75,0x0b,0xbc,0x6c,0xfc,0xfd, // 00001550 |AW.fy....7u..l..|
+0xe1,0xae,0x4a,0x74,0x45,0x64,0xeb,0x55,0x9e,0xf4,0xd7,0xca,0xd5,0xe1,0xf2,0x6b, // 00001560 |..JtEd.U.......k|
+0x9c,0x8e,0x55,0x15,0xfd,0xc6,0x00,0xf5,0x28,0xf4,0x57,0x50,0x72,0xff,0x1f,0x44, // 00001570 |..U.....(.WPr..D|
+0x9b,0xa7,0x25,0x71,0x18,0x4e,0x9c,0x18,0x87,0xc5,0x77,0xc7,0x2e,0x91,0x05,0xaf, // 00001580 |..%q.N....w.....|
+0x35,0xc1,0xce,0x1d,0xbf,0xb6,0xf0,0x72,0x34,0x7e,0xc9,0xad,0x79,0x74,0x8e,0x12, // 00001590 |5......r4~..yt..|
+0xd1,0x44,0xbc,0xc1,0xbf,0x7d,0x93,0x39,0xf0,0x43,0xd2,0xc1,0xe6,0x43,0x70,0xca, // 000015a0 |.D...}.9.C...Cp.|
+0x3c,0x76,0x31,0xe5,0x88,0x26,0xe7,0x4a,0x31,0x0f,0xbc,0x03,0xb8,0x6b,0x0f,0x44, // 000015b0 |<v1..&.J1....k.D|
+0x4f,0x1a,0x34,0xec,0x6f,0x61,0x96,0xa2,0x38,0x86,0x63,0x4b,0xdf,0xc0,0x96,0xc3, // 000015c0 |O.4.oa..8.cK....|
+0xb2,0x8b,0x77,0x72,0x1a,0x63,0x55,0x63,0x91,0xc8,0x57,0xe5,0xc0,0xb5,0x05,0x43, // 000015d0 |..wr.cUc..W....C|
+0x90,0xe3,0x85,0x25,0x00,0x05,0xc7,0x17,0xcf,0xc7,0x1f,0xf5,0xa3,0x9f,0x11,0xc2, // 000015e0 |...%............|
+0x4c,0x48,0xde,0xef,0x25,0xf2,0xcc,0xdf,0x85,0xbc,0x9b,0x16,0x3b,0x78,0x96,0x32, // 000015f0 |LH..%.......;x.2|
+0x29,0xa7,0xdc,0x53,0xbe,0x05,0x4e,0xcf,0xe8,0xa2,0xb4,0xe7,0xed,0xbf,0x7e,0x14, // 00001600 |)..S..N.......~.|
+0x27,0xcc,0xea,0x67,0x10,0xe3,0xd5,0x43,0x5b,0x0a,0x4c,0x2e,0xa7,0x9e,0xc8,0x31, // 00001610 |'..g...C[.L....1|
+0x88,0x49,0x88,0xfb,0x87,0x93,0xfc,0xfb,0x67,0xaa,0x78,0x23,0xc5,0x92,0x86,0x8b, // 00001620 |.I......g.x#....|
+0x3c,0xda,0x44,0x98,0x04,0xb3,0x7a,0x24,0x1b,0x17,0x24,0xdd,0xb4,0x34,0x0e,0x81, // 00001630 |<.D...z$..$..4..|
+0x94,0x14,0x60,0xdc,0x7c,0x41,0x11,0xab,0x3b,0xbd,0x73,0x30,0x7a,0x36,0x67,0xe3, // 00001640 |..`.|A..;.s0z6g.|
+0x99,0x85,0xc5,0x5a,0x20,0x92,0x1c,0xb6,0xd4,0xe4,0xa5,0x81,0x58,0x09,0x21,0x46, // 00001650 |...Z .......X.!F|
+0x59,0x05,0x24,0x29,0x15,0xe4,0x9b,0xb3,0xbb,0x7d,0x77,0xdb,0xc2,0xd5,0x72,0x3d, // 00001660 |Y.$).....}w...r=|
+0xb7,0xf9,0x94,0xd0,0x78,0x36,0xdd,0x27,0xcb,0xb3,0xbf,0x4b,0xde,0x5f,0xa0,0xc3, // 00001670 |....x6.'...K._..|
+0xab,0x55,0x12,0x40,0x5b,0x11,0xe8,0x5c,0xba,0x8d,0x30,0x95,0xf5,0xe6,0x65,0x3d, // 00001680 |.U.@[..\..0...e=|
+0x0e,0xea,0xae,0xfc,0xcf,0x73,0x2e,0x7a,0x45,0xbe,0xf6,0x25,0x47,0x83,0x67,0x2a, // 00001690 |.....s.zE..%G.g*|
+0x11,0xf9,0x4c,0xc8,0xef,0xf8,0xa0,0xbd,0x27,0x3a,0x74,0x68,0xd8,0xf8,0xc2,0x11, // 000016a0 |..L.....':th....|
+0x40,0x9c,0xb7,0x0c,0x48,0xc7,0x5a,0xb3,0x24,0xe5,0x72,0xac,0x07,0xe9,0x71,0x03, // 000016b0 |@...H.Z.$.r...q.|
+0x5c,0x00,0xfb,0x9c,0xac,0x4e,0x70,0x64,0x42,0x18,0x3c,0xa5,0x1d,0xab,0x0a,0x51, // 000016c0 |\....NpdB.<....Q|
+0xf1,0x11,0x7f,0x61,0xb9,0x1c,0xee,0x0e,0x59,0x02,0x54,0xf2,0xad,0xac,0xb1,0x22, // 000016d0 |...a....Y.T...."|
+0x5b,0xe2,0x07,0x9a,0x19,0xdd,0x5a,0xb3,0xbd,0x09,0x5a,0xd6,0x51,0xd3,0x39,0x1c, // 000016e0 |[.....Z...Z.Q.9.|
+0x44,0xab,0x28,0x95,0xbf,0x7f,0x88,0xa8,0x4a,0xc5,0xaf,0xb0,0xae,0x7f,0xd0,0xd7, // 000016f0 |D.(.....J.......|
+0x21,0xa4,0x9f,0x7f,0x9c,0x9e,0xdd,0x66,0x46,0xdf,0x3b,0x07,0x84,0x7c,0xb9,0xdf, // 00001700 |!......fF.;..|..|
+0x28,0x8a,0x54,0x45,0x32,0x97,0xaa,0xaf,0x26,0x8b,0xb6,0x91,0x1d,0xc9,0x1a,0x9e, // 00001710 |(.TE2...&.......|
+0x82,0x5b,0x32,0xd3,0xca,0x7a,0xcb,0x9c,0xcc,0xd7,0x36,0x03,0xd0,0x29,0xe3,0x64, // 00001720 |.[2..z....6..).d|
+0x4b,0x9b,0x1c,0x16,0x37,0x29,0xd4,0x34,0x80,0x6c,0x7e,0x47,0xe7,0x10,0xdb,0x75, // 00001730 |K...7).4.l~G...u|
+0x01,0xbe,0x72,0xa7,0x3f,0xcc,0xac,0xfa,0x20,0x94,0x4b,0xa1,0x7a,0x6a,0xd6,0xc0, // 00001740 |..r.?... .K.zj..|
+0x95,0xa1,0x7c,0xac,0xe8,0xc4,0x22,0x67,0xf9,0x75,0xc2,0xd7,0x8f,0x04,0xd5,0x74, // 00001750 |..|..."g.u.....t|
+0xdf,0x39,0x20,0x94,0xe8,0xf5,0x31,0xc8,0x8a,0xd4,0xf6,0xcc,0xab,0x11,0x0e,0x59, // 00001760 |.9 ...1........Y|
+0x93,0xb4,0x87,0xa2,0x82,0x5f,0xc5,0x01,0x12,0x9a,0x22,0x99,0xd1,0x38,0xde,0x79, // 00001770 |....._...."..8.y|
+0x96,0xb1,0x12,0xe3,0x05,0xff,0x9f,0x58,0x72,0x9e,0x13,0x94,0xd3,0xef,0x7e,0x4c, // 00001780 |.......Xr.....~L|
+0xc0,0x4f,0x4d,0xea,0x12,0xe9,0x81,0x2b,0x91,0x92,0x49,0x61,0xf8,0xe5,0x80,0xf0, // 00001790 |.OM....+..Ia....|
+0x91,0xe3,0x91,0x17,0x0c,0xad,0x56,0x57,0x38,0x61,0x48,0xb1,0x90,0xf2,0xdd,0x3a, // 000017a0 |......VW8aH....:|
+0xe7,0x76,0x1d,0x08,0x33,0x76,0xcd,0x71,0xdf,0x85,0x57,0x2a,0xa0,0xd5,0xab,0xdc, // 000017b0 |.v..3v.q..W*....|
+0xe9,0x0b,0xdf,0xae,0x0b,0xfe,0xb4,0x0f,0x25,0xca,0x27,0x61,0x0e,0xb0,0x9b,0x19, // 000017c0 |........%.'a....|
+0x63,0x6b,0x86,0x75,0xf5,0x65,0x08,0x68,0xd2,0x40,0xf2,0xdb,0x1e,0x43,0x22,0x0e, // 000017d0 |ck.u.e.h.@...C".|
+0x21,0xab,0x6b,0xb8,0x34,0x69,0x0c,0xc0,0x34,0xb5,0x64,0x28,0x34,0xa7,0xaf,0xaa, // 000017e0 |!.k.4i..4.d(4...|
+0x70,0x0c,0x77,0xfc,0xfe,0x0f,0xb7,0x07,0xea,0x43,0xc8,0x05,0xc7,0xa3,0x6a,0x1e, // 000017f0 |p.w......C....j.|
+0x39,0x44,0xe1,0x1e,0xfd,0xb5,0x77,0xa5,0x09,0x26,0x1f,0xfa,0x2d,0x42,0x7e,0x99, // 00001800 |9D....w..&..-B~.|
+0x51,0x65,0x53,0xe3,0xc9,0xb0,0xea,0x55,0x38,0x91,0xd3,0xeb,0xf7,0x23,0xb2,0xab, // 00001810 |QeS....U8....#..|
+0xa8,0x0b,0x5d,0x51,0xdf,0x51,0xb7,0xff,0xf0,0x3c,0x63,0xde,0x72,0x25,0x3b,0xd9, // 00001820 |..]Q.Q...<c.r%;.|
+0xd5,0xbd,0xf9,0x64,0x28,0xc1,0xd5,0xc6,0xdb,0x45,0x87,0xac,0x3f,0xd1,0xf5,0xf2, // 00001830 |...d(....E..?...|
+0xca,0xa3,0x4c,0x49,0x3e,0xba,0x90,0x0f,0x3c,0xb0,0x9e,0xc1,0x7d,0xe4,0xb7,0xf8, // 00001840 |..LI>...<...}...|
+0x9e,0x4b,0x8d,0x24,0x06,0xb2,0xef,0x7c,0x82,0xc4,0x90,0xc3,0x6e,0xcc,0x81,0x7c, // 00001850 |.K.$...|....n..||
+0xcf,0xa1,0x65,0x50,0x35,0x8e,0x4c,0xe9,0xd1,0xf2,0x62,0x20,0x1b,0x9b,0x5a,0x01, // 00001860 |..eP5.L...b ..Z.|
+0x57,0x0a,0xbe,0xca,0x4d,0x6c,0x18,0x77,0x4c,0x33,0x3e,0xcd,0x8a,0x1d,0x4b,0xae, // 00001870 |W...Ml.wL3>...K.|
+0x8e,0x5d,0x9c,0xe7,0x1a,0x38,0xc5,0xba,0x24,0x2b,0x6a,0xa9,0x07,0x6e,0x30,0x34, // 00001880 |.]...8..$+j..n04|
+0xb6,0x04,0xab,0x38,0x0d,0x39,0x72,0x2e,0x2e,0x90,0x6d,0xa9,0x12,0x64,0x53,0xcd, // 00001890 |...8.9r...m..dS.|
+0xb6,0xa0,0x84,0x91,0xb8,0xaf,0x79,0xbf,0xc6,0x79,0xe3,0x60,0x2a,0x0e,0x90,0x65, // 000018a0 |......y..y.`*..e|
+0xd8,0xb3,0xb2,0x37,0x8e,0x1d,0x87,0x04,0x35,0x58,0x85,0xdc,0x5b,0xa0,0x1b,0xb1, // 000018b0 |...7....5X..[...|
+0xc2,0x27,0x22,0x7a,0x16,0x65,0x8e,0x8f,0xae,0x01,0x80,0x15,0x4a,0xc4,0xb3,0x8d, // 000018c0 |.'"z.e......J...|
+0xd9,0x7f,0x4d,0x4b,0x92,0xa6,0x8e,0x31,0xff,0xc0,0x4a,0x2b,0x0b,0x6a,0xc1,0xc5, // 000018d0 |..MK...1..J+.j..|
+0x75,0x65,0x36,0xff,0x2a,0x21,0xad,0xcc,0xb0,0xbf,0x2e,0x34,0x9c,0x52,0xdf,0xd9, // 000018e0 |ue6.*!.....4.R..|
+0xbd,0xfc,0xa7,0xba,0x74,0x35,0xad,0xf1,0xc7,0x84,0xa1,0x5a,0xe1,0xda,0x6e,0xbe, // 000018f0 |....t5.....Z..n.|
+0x81,0x1c,0x1e,0x85,0x10,0x56,0x84,0xcc,0xe7,0x4c,0xdd,0x40,0x3b,0x37,0x6d,0xc2, // 00001900 |.....V...L.@;7m.|
+0xc6,0xc3,0x02,0x68,0xc2,0x22,0x19,0x04,0x3e,0x72,0xbc,0xa2,0x52,0x81,0x6c,0x53, // 00001910 |...h."..>r..R.lS|
+0xbc,0xca,0xac,0xd2,0xeb,0x35,0x75,0x40,0xff,0xb8,0x8f,0xe8,0x0d,0x8e,0x48,0xda, // 00001920 |.....5u@......H.|
+0x84,0x45,0x1d,0xa3,0x9a,0x6d,0x06,0x94,0x32,0x7b,0x56,0x4a,0xe4,0x9e,0xc2,0x04, // 00001930 |.E...m..2{VJ....|
+0x11,0xcf,0xc1,0x0e,0xaa,0x80,0xde,0x8b,0x47,0x63,0x8a,0x80,0x26,0x32,0xbc,0x6e, // 00001940 |........Gc..&2.n|
+0xaf,0x4c,0x9d,0x2f,0x64,0x9b,0x38,0xf2,0xd7,0xbe,0x0a,0x28,0x08,0x9e,0x83,0xb9, // 00001950 |.L./d.8....(....|
+0x04,0xaa,0x69,0xaf,0x79,0x91,0xa9,0xef,0x2b,0x8e,0x79,0x02,0xcb,0x19,0x1e,0x30, // 00001960 |..i.y...+.y....0|
+0x42,0x1b,0xb1,0xa4,0x7e,0xeb,0xa6,0xb4,0xde,0xa1,0xac,0x35,0x2d,0xbb,0x04,0xcb, // 00001970 |B...~......5-...|
+0x55,0xa5,0x27,0xb1,0xff,0x23,0x93,0xe1,0x7e,0x88,0x6b,0xe3,0x9c,0x8d,0x14,0xec, // 00001980 |U.'..#..~.k.....|
+0xf5,0x2b,0xed,0xcf,0xaf,0x7a,0xe3,0x17,0xf6,0x12,0xb0,0x08,0x76,0x85,0x34,0x1d, // 00001990 |.+...z......v.4.|
+0x33,0x46,0x7d,0x32,0x80,0xc7,0x83,0xce,0xea,0x5b,0x80,0x2b,0x4e,0x80,0x06,0xcb, // 000019a0 |3F}2.....[.+N...|
+0x37,0x6c,0x49,0x23,0x64,0x89,0x98,0xe1,0xa0,0x94,0x84,0x6d,0xe3,0x8f,0xdf,0x7a, // 000019b0 |7lI#d......m...z|
+0xce,0xf1,0x81,0x28,0x69,0x2d,0xb3,0x4f,0x2d,0x99,0xd1,0xf8,0xcd,0x83,0xb8,0x4a, // 000019c0 |...(i-.O-......J|
+0x8a,0x5c,0x14,0x25,0x5a,0xc4,0x57,0xbc,0xf2,0xcb,0x29,0x28,0x9c,0xd3,0xc1,0x35, // 000019d0 |.\.%Z.W...)(...5|
+0x67,0x42,0x71,0x28,0xc1,0x58,0xc5,0xbd,0xa0,0x8a,0x5b,0xd6,0xd2,0x78,0x66,0x12, // 000019e0 |gBq(.X....[..xf.|
+0x93,0xf9,0x36,0x30,0x8a,0xa1,0xda,0x39,0xc0,0x01,0x85,0x67,0xc5,0xad,0x4c,0x50, // 000019f0 |..60...9...g..LP|
+0x68,0x68,0x8f,0xa6,0x77,0x11,0x8e,0x4c,0x1a,0xa8,0x29,0x1e,0x95,0x0d,0xad,0xc1, // 00001a00 |hh..w..L..).....|
+0x3f,0x1d,0xcf,0x2d,0x06,0xad,0x4b,0x10,0x34,0x63,0x46,0xce,0x4c,0xff,0x84,0x42, // 00001a10 |?..-..K.4cF.L..B|
+0xed,0xf8,0xf4,0xeb,0x83,0x2c,0x45,0xcd,0xea,0xf9,0x4f,0x33,0x68,0x3b,0x89,0x06, // 00001a20 |.....,E...O3h;..|
+0x50,0x82,0x0e,0xaf,0xeb,0x2a,0xa4,0xa2,0xdd,0x63,0x17,0x32,0xbc,0x86,0xb0,0x0b, // 00001a30 |P....*...c.2....|
+0x95,0x5f,0x12,0xc8,0xcb,0xbc,0x5c,0xfa,0x7b,0xa0,0x5c,0xdf,0x4b,0xb7,0xdd,0xed, // 00001a40 |._....\.{.\.K...|
+0xde,0xbe,0x54,0x0d,0x19,0xac,0x52,0xd9,0x81,0x0a,0x69,0xd1,0xbe,0x31,0x19,0x29, // 00001a50 |..T...R...i..1.)|
+0x1f,0xc4,0x8e,0x64,0x28,0x1a,0xe2,0x1c,0x04,0x01,0x48,0x8f,0x93,0x24,0x51,0xf4, // 00001a60 |...d(.....H..$Q.|
+0x8c,0xbd,0x45,0x55,0x45,0x6e,0x8e,0x01,0x86,0x13,0x0d,0x21,0xab,0x46,0x44,0x3c, // 00001a70 |..EUEn.....!.FD<|
+0xce,0x0b,0x98,0x67,0x44,0x40,0x35,0x66,0x11,0xc2,0x98,0xbc,0x4e,0x9e,0xed,0x18, // 00001a80 |...gD@5f....N...|
+0x4a,0xf8,0xf6,0xc1,0xfe,0xa8,0x0e,0xd8,0xda,0x0d,0xdd,0x55,0x14,0xf2,0x4d,0x9c, // 00001a90 |J..........U..M.|
+0xee,0x91,0xeb,0xa4,0x98,0xca,0xd4,0xe9,0x12,0x72,0x68,0xe2,0xbe,0x1e,0x74,0x21, // 00001aa0 |.........rh...t!|
+0x4f,0xb0,0xee,0x79,0x0d,0x47,0x8a,0x78,0xa4,0x4d,0x2e,0x12,0x5a,0x5c,0xfd,0xb0, // 00001ab0 |O..y.G.x.M..Z\..|
+0xff,0xe3,0xe8,0x6c,0xd5,0x5b,0xa0,0x34,0x0c,0xfe,0x18,0xff,0x85,0xce,0xd3,0xf9, // 00001ac0 |...l.[.4........|
+0xb2,0xdd,0x05,0xb9,0x4e,0x3c,0xc7,0x41,0xe1,0x30,0x4a,0xae,0x97,0x74,0x91,0xb7, // 00001ad0 |....N<.A.0J..t..|
+0x6c,0x40,0xaf,0x4a,0x46,0x98,0x2e,0x42,0xb5,0xe9,0xda,0x99,0x9c,0x68,0x78,0xca, // 00001ae0 |l@.JF..B.....hx.|
+0x14,0xdb,0x89,0x42,0x1d,0x6e,0xe6,0x2c,0x72,0xc4,0xa0,0x70,0x83,0xbc,0xb8,0x5a, // 00001af0 |...B.n.,r..p...Z|
+0xd1,0x8f,0x42,0x44,0x4d,0x2b,0xaa,0xe5,0xdf,0x2c,0xa9,0xbc,0x01,0x24,0x46,0xa6, // 00001b00 |..BDM+...,...$F.|
+0x23,0x3c,0x1b,0x5f,0xc5,0x7f,0x1f,0xf3,0xfc,0x1f,0xef,0xab,0x70,0x6b,0x6d,0x7a, // 00001b10 |#<._........pkmz|
+0x6e,0x2d,0x21,0x10,0xb7,0xb3,0x1c,0xed,0x61,0x16,0x0a,0x30,0x45,0x53,0x60,0x59, // 00001b20 |n-!.....a..0ES`Y|
+0x84,0x99,0xd0,0xa2,0x5c,0xe0,0xa9,0x13,0x9c,0x06,0x49,0x91,0xc6,0xf6,0xec,0xda, // 00001b30 |....\.....I.....|
+0x60,0x7b,0xfd,0x7b,0x2a,0x66,0x8b,0xe8,0x81,0xd5,0xd0,0xee,0xd6,0x74,0xbe,0x61, // 00001b40 |`{.{*f.......t.a|
+0x2e,0xa4,0x58,0x91,0xd2,0x4f,0x92,0x35,0xf8,0xf9,0xf9,0x8d,0x33,0x9f,0x7a,0x8b, // 00001b50 |..X..O.5....3.z.|
+0x51,0x3f,0x73,0x2c,0xee,0xc8,0x40,0xb2,0xba,0x9c,0x3f,0xc7,0xe5,0x08,0x2a,0xe0, // 00001b60 |Q?s,..@...?...*.|
+0x2f,0x39,0x0f,0x09,0x80,0x12,0x5f,0x69,0x50,0x04,0x0f,0xde,0x3f,0xa5,0x3b,0x30, // 00001b70 |/9...._iP...?.;0|
+0x75,0x04,0x48,0x60,0xa9,0xdb,0xd4,0x6e,0x52,0xdc,0x21,0xf1,0xdb,0xcc,0x8e,0x8c, // 00001b80 |u.H`...nR.!.....|
+0xe5,0xc9,0xf5,0xf3,0xa9,0x35,0x37,0xc7,0x12,0x09,0xa2,0x2b,0xe5,0xf7,0x7b,0xde, // 00001b90 |.....57....+..{.|
+0x16,0x1a,0x86,0x31,0x0e,0x5a,0xda,0xe4,0x43,0x70,0xe6,0xc3,0xc9,0xae,0xa8,0x6a, // 00001ba0 |...1.Z..Cp.....j|
+0xf5,0x70,0x4b,0x59,0x31,0xf9,0xab,0x3e,0xfd,0xbf,0x48,0x88,0x66,0xd2,0x86,0x48, // 00001bb0 |.pKY1..>..H.f..H|
+0x22,0xfc,0x53,0x00,0x3a,0x56,0x3c,0xbb,0x25,0xe2,0x5a,0x44,0x89,0x65,0x6e,0x6f, // 00001bc0 |".S.:V<.%.ZD.eno|
+0x8f,0x16,0x4c,0x63,0x8e,0xf2,0x7c,0x21,0x75,0xf9,0x84,0xb2,0x27,0x9d,0x01,0x07, // 00001bd0 |..Lc..|!u...'...|
+0xfb,0x7a,0x2d,0x5f,0x11,0x51,0xa0,0x35,0xc0,0xa5,0x61,0xc8,0xb5,0x19,0xf1,0xce, // 00001be0 |.z-_.Q.5..a.....|
+0x48,0xa3,0x62,0x81,0xdd,0x00,0x4f,0x02,0xd8,0xe6,0x2d,0xcb,0x81,0x73,0x9e,0x00, // 00001bf0 |H.b...O...-..s..|
+0xef,0xc0,0xa1,0x65,0xd0,0x95,0xe2,0x11,0x2b,0x06,0xdc,0x16,0x87,0xec,0xb4,0x2f, // 00001c00 |...e....+....../|
+0xa4,0x48,0x6c,0xba,0x2d,0x2c,0x8c,0xbe,0x5d,0x54,0x0d,0x0e,0x32,0x91,0xd1,0x8a, // 00001c10 |.Hl.-,..]T..2...|
+0xf9,0x18,0x60,0x0b,0x0c,0x10,0xbf,0x71,0x68,0xb2,0xb2,0x3d,0x15,0x2f,0xd1,0xd1, // 00001c20 |..`....qh..=./..|
+0xe2,0x80,0x63,0x28,0x0f,0x2e,0x66,0xe5,0x0b,0x7f,0x6b,0x6c,0x90,0x7c,0x36,0x71, // 00001c30 |..c(..f...kl.|6q|
+0xbb,0xe5,0x87,0x03,0xc9,0xdd,0x18,0x45,0xdc,0x98,0xac,0xab,0xec,0x6a,0x37,0x12, // 00001c40 |.......E.....j7.|
+0x3c,0x84,0x35,0xa3,0x60,0x58,0x44,0x17,0x6d,0x9c,0x2e,0x69,0x36,0xf2,0xcc,0xc0, // 00001c50 |<.5.`XD.m..i6...|
+0xa9,0x10,0x4f,0x0f,0x8e,0x3d,0xb3,0x06,0x04,0x27,0x1a,0x46,0xe4,0x5a,0xba,0x53, // 00001c60 |..O..=...'.F.Z.S|
+0xb9,0xa5,0x98,0x8b,0x84,0x6a,0x01,0x82,0x2f,0xfd,0x96,0x7a,0x66,0xd9,0x63,0x20, // 00001c70 |.....j../..zf.c |
+0xf5,0x53,0x91,0x75,0x14,0x0a,0xd7,0x28,0x23,0x34,0xe1,0x79,0xdd,0x87,0x1c,0xcf, // 00001c80 |.S.u...(#4.y....|
+0xcc,0x21,0x9a,0x16,0x71,0x0c,0x13,0x39,0x03,0xee,0x1e,0x29,0x43,0x61,0x81,0xb6, // 00001c90 |.!..q..9...)Ca..|
+0x82,0xcf,0xd0,0x74,0x9a,0xa2,0xa0,0x71,0xb3,0xf1,0x25,0xf8,0xfa,0x43,0xc0,0xc8, // 00001ca0 |...t...q..%..C..|
+0xce,0x1d,0x44,0xfb,0x57,0x00,0x18,0x1c,0x48,0x23,0x05,0x64,0xd9,0xe0,0xc6,0xfc, // 00001cb0 |..D.W...H#.d....|
+0x85,0x5b,0xb2,0x03,0x2f,0xb8,0x0a,0x3f,0xd7,0x51,0x99,0x65,0xa8,0x6e,0x8b,0x0b, // 00001cc0 |.[../..?.Q.e.n..|
+0x78,0x8c,0x20,0x76,0xcf,0x16,0xdc,0x7c,0xdd,0x10,0x96,0xf3,0x4d,0x61,0x1a,0x96, // 00001cd0 |x. v...|....Ma..|
+0xa9,0xfb,0xf0,0x6b,0x8e,0x9b,0xdc,0xa4,0x65,0xe0,0xb3,0x5f,0x89,0x60,0xab,0xc9, // 00001ce0 |...k....e.._.`..|
+0x2d,0x93,0x6e,0x79,0x1d,0x41,0x4c,0x2d,0xa4,0x59,0x88,0x47,0xef,0xff,0x40,0x58, // 00001cf0 |-.ny.AL-.Y.G..@X|
+0x5f,0xa2,0x7f,0x64,0xbe,0x27,0xe9,0x3f,0x1b,0x91,0x6f,0x25,0xf5,0x97,0x8b,0xa7, // 00001d00 |_..d.'.?..o%....|
+0x42,0xf3,0xfd,0x5e,0x4e,0xfc,0xf5,0x58,0x96,0x23,0x27,0xd3,0x9c,0xf7,0x7f,0x11, // 00001d10 |B..^N..X.#'.....|
+0xcf,0x27,0x15,0x04,0xc1,0x4e,0xee,0xbb,0x42,0x28,0x9b,0x80,0x8a,0xc2,0x2c,0xc9, // 00001d20 |.'...N..B(....,.|
+0x0a,0x90,0x4a,0x31,0x10,0x21,0x87,0x01,0x0d,0xe6,0x93,0xd5,0x98,0x39,0xc5,0x94, // 00001d30 |..J1.!.......9..|
+0xc2,0x74,0x7e,0x06,0xfd,0x72,0x0e,0x8b,0x1b,0x24,0xa1,0x8d,0xa4,0xbe,0xe5,0xe3, // 00001d40 |.t~..r...$......|
+0x29,0x91,0xa2,0x5a,0xe9,0x80,0x7d,0xa6,0x39,0x56,0x78,0x67,0x03,0x28,0x80,0xd0, // 00001d50 |)..Z..}.9Vxg.(..|
+0xf7,0xaf,0x09,0x2f,0x00,0x1e,0x81,0x9e,0xe3,0x48,0xef,0xc9,0xd4,0xfa,0x9d,0x3d, // 00001d60 |.../.....H.....=|
+0xd8,0x55,0x4d,0xea,0xf6,0xd3,0xc2,0x30,0xd7,0x10,0x36,0x37,0x54,0x7a,0xc0,0x0f, // 00001d70 |.UM....0..67Tz..|
+0x07,0xb0,0xcf,0xaf,0x74,0xd8,0x44,0x1d,0xf3,0xbd,0x38,0x80,0x3e,0x4a,0xda,0x3f, // 00001d80 |....t.D...8.>J.?|
+0x90,0xed,0x33,0xc6,0xec,0xec,0x55,0xab,0x60,0x59,0x0f,0xe4,0x27,0x65,0x62,0x66, // 00001d90 |..3...U.`Y..'ebf|
+0x0d,0x6a,0x25,0xb7,0x2e,0xf7,0xe2,0x9d,0x9b,0xdd,0xef,0x34,0x01,0xc9,0x27,0x62, // 00001da0 |.j%........4..'b|
+0x0b,0xcc,0x18,0xba,0x30,0x03,0xff,0xc4,0x74,0xaa,0xd1,0x0a,0xa8,0xc8,0x2e,0xe2, // 00001db0 |....0...t.......|
+0x3e,0xa6,0x67,0x6a,0x7c,0xdc,0x86,0x25,0xb9,0x9b,0x5b,0x31,0x90,0x18,0xcf,0x73, // 00001dc0 |>.gj|..%..[1...s|
+0xc2,0x75,0x9c,0xf9,0x24,0x18,0xf6,0xd5,0x98,0xf0,0xc2,0x92,0xb5,0x12,0x19,0x6f, // 00001dd0 |.u..$..........o|
+0x0b,0xf1,0xc7,0x2d,0x52,0xb9,0x28,0x74,0xb7,0xd1,0x8c,0xe3,0x40,0x1d,0x57,0xfc, // 00001de0 |...-R.(t....@.W.|
+0xd2,0xa1,0x4c,0x6e,0xfe,0x21,0x00,0x58,0x26,0xe8,0x2d,0xc7,0x93,0x77,0xeb,0xb6, // 00001df0 |..Ln.!.X&.-..w..|
+0x27,0x04,0x04,0x1c,0xb3,0xae,0xba,0x3b,0x93,0x6a,0xba,0xb4,0xdd,0xe5,0x82,0x4c, // 00001e00 |'......;.j.....L|
+0x06,0x37,0x91,0xcf,0x70,0x33,0x7a,0x5b,0xff,0x0a,0xb5,0x42,0x56,0xaa,0x70,0x8b, // 00001e10 |.7..p3z[...BV.p.|
+0xfa,0xc8,0x13,0xef,0xd6,0x4b,0xe2,0x4a,0xea,0x5b,0xc6,0x31,0xb7,0xfb,0x88,0xbf, // 00001e20 |.....K.J.[.1....|
+0xbf,0xe4,0xae,0x64,0xb9,0xfa,0x63,0x5e,0xb9,0xfa,0x45,0xc4,0xae,0xfe,0x5f,0xda, // 00001e30 |...d..c^..E..._.|
+0x0f,0xb5,0xc4,0x20,0x57,0x99,0x47,0xc7,0x2f,0xbd,0x46,0x6a,0x50,0x89,0xa7,0x08, // 00001e40 |... W.G./.FjP...|
+0xdc,0x11,0x1c,0xea,0x69,0xcf,0xc0,0x5e,0x29,0x65,0x36,0xd1,0xcb,0xf2,0x91,0xcb, // 00001e50 |....i..^)e6.....|
+0x64,0xf0,0x4f,0x15,0x2f,0x1e,0xa8,0x8e,0xc7,0x2a,0x79,0xaf,0x90,0x4d,0x2f,0x36, // 00001e60 |d.O./....*y..M/6|
+0x4f,0xa9,0x00,0xc9,0xbd,0x63,0xe4,0xd8,0xc2,0x09,0x7d,0x59,0xca,0x97,0x30,0x8f, // 00001e70 |O....c....}Y..0.|
+0x85,0xcf,0x90,0x20,0x33,0xca,0x64,0xf1,0x7d,0x29,0xf6,0xef,0xe9,0x30,0xd1,0x0d, // 00001e80 |... 3.d.})...0..|
+0x5b,0x10,0x5d,0x9f,0x2f,0xf2,0x16,0xe6,0x64,0x83,0x77,0xdf,0x5c,0xda,0x15,0xbe, // 00001e90 |[.]./...d.w.\...|
+0xe0,0x04,0xb1,0xd7,0xe6,0x3a,0x66,0xe4,0x59,0x54,0xd4,0xd6,0x9d,0xdc,0x3f,0xeb, // 00001ea0 |.....:f.YT....?.|
+};
+// clang-format on
+#endif  // OPENTITAN_SW_DEVICE_TESTS_SIGVERIFY_PARALLEL_SPX_H_
diff --git a/sw/device/tests/sigverify_parallel_test.c b/sw/device/tests/sigverify_parallel_test.c
new file mode 100644
index 0000000000000..faf9036f1d761
--- /dev/null
+++ b/sw/device/tests/sigverify_parallel_test.c
@@ -0,0 +1,159 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/silicon_creator/lib/base/util.h"
+#include "sw/device/silicon_creator/lib/dbg_print.h"
+#include "sw/device/silicon_creator/lib/drivers/hmac.h"
+#include "sw/device/silicon_creator/lib/drivers/rv_timer.h"
+#include "sw/device/silicon_creator/lib/error.h"
+#include "sw/device/silicon_creator/lib/ownership/datatypes.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.h"
+#include "sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.h"
+#include "sw/device/silicon_creator/lib/sigverify/ecdsa_p256_key.h"
+#include "sw/device/silicon_creator/lib/sigverify/rsa_verify.h"
+#include "sw/device/silicon_creator/lib/sigverify/sigverify.h"
+#include "sw/device/silicon_creator/lib/sigverify/sphincsplus/verify.h"
+#include "sw/device/tests/sigverify_parallel_data.h"
+#include "sw/device/tests/sigverify_parallel_digest.h"
+#include "sw/device/tests/sigverify_parallel_ecdsa.h"
+#include "sw/device/tests/sigverify_parallel_spx.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+// This is a near-copy of the SPX verify function from the ROM_EXT.
+// Most of the hardening has been remove to simplify the function for use in
+// testing.
+static rom_error_t do_spx_verify(const sigverify_spx_signature_t *signature,
+                                 const sigverify_spx_key_t *key,
+                                 uint32_t key_alg, const void *msg_prefix_1,
+                                 size_t msg_prefix_1_len,
+                                 const void *msg_prefix_2,
+                                 size_t msg_prefix_2_len, const void *msg,
+                                 size_t msg_len, hmac_digest_t digest) {
+  key_alg &= ~(uint32_t)kOwnershipKeyAlgCategoryMask;
+  key_alg |= (uint32_t)kOwnershipKeyAlgCategorySpx;
+
+  sigverify_spx_root_t actual_root;
+  sigverify_spx_root_t expected_root;
+  spx_public_key_root(key->data, expected_root.data);
+
+  switch (key_alg) {
+    case kOwnershipKeyAlgSpxPure:
+      HARDENED_RETURN_IF_ERROR(spx_verify(
+          signature->data, kSpxVerifyPureDomainSep, kSpxVerifyPureDomainSepSize,
+          msg_prefix_1, msg_prefix_1_len, msg_prefix_2, msg_prefix_2_len, msg,
+          msg_len, key->data, actual_root.data));
+      break;
+
+    case kOwnershipKeyAlgSpxPrehash:
+      util_reverse_bytes(digest.digest, sizeof(digest.digest));
+      HARDENED_RETURN_IF_ERROR(
+          spx_verify(signature->data, kSpxVerifyPrehashDomainSep,
+                     kSpxVerifyPrehashDomainSepSize,
+                     /*msg_prefix_2=*/NULL, /*msg_prefix_2_len=*/0,
+                     /*msg_prefix_3=*/NULL, /*msg_prefix_3_len=*/0,
+                     (unsigned char *)digest.digest, sizeof(digest.digest),
+                     key->data, actual_root.data));
+      break;
+    default:
+      return kErrorSigverifyBadSpxConfig;
+  }
+  if (memcmp(expected_root.data, actual_root.data,
+             sizeof(expected_root.data))) {
+    return kErrorSigverifyBadSpxSignature;
+  }
+  return kErrorOk;
+}
+
+typedef struct stats {
+  uint32_t iterations;
+  uint32_t hashing;
+  uint32_t ecdsa_setup;
+  uint32_t ecdsa_finish;
+  uint32_t spx_verify;
+  uint32_t total;
+} stats_t;
+
+static rom_error_t parallel_verify(const void *data, size_t len,
+                                   const ecdsa_p256_signature_t *ecdsa_sig,
+                                   const ecdsa_p256_public_key_t *ecdsa_key,
+                                   const sigverify_spx_signature_t *spx_sig,
+                                   const sigverify_spx_key_t *spx_key,
+                                   uint32_t spx_alg, stats_t *stats) {
+  uint32_t t0 = rv_timer_get();
+  hmac_digest_t act_digest;
+  hmac_sha256(data, len, &act_digest);
+
+  uint32_t t1 = rv_timer_get();
+  stats->hashing += t1 - t0;
+  // Hybrid signatures check both ECDSA and SPX+ signatures.
+  // Start the ECDSA verify.
+  HARDENED_RETURN_IF_ERROR(
+      sigverify_ecdsa_p256_start(ecdsa_sig, ecdsa_key, &act_digest));
+  uint32_t t2 = rv_timer_get();
+  stats->ecdsa_setup += t2 - t1;
+
+  // While ECDSA verify is running in OTBN, compute the SPX verify on Ibex.
+  rom_error_t spx = do_spx_verify(spx_sig, spx_key, spx_alg, NULL, 0, NULL, 0,
+                                  data, len, act_digest);
+  HARDENED_RETURN_IF_ERROR(spx);
+  uint32_t t3 = rv_timer_get();
+  stats->spx_verify += t3 - t2;
+
+  // ECDSA should be finished.  Poll for completeion and get the result.
+  uint32_t flash_exec = 0;
+  rom_error_t ecdsa = sigverify_ecdsa_p256_finish(ecdsa_sig, &flash_exec);
+  HARDENED_RETURN_IF_ERROR(ecdsa);
+  uint32_t t4 = rv_timer_get();
+  stats->ecdsa_finish += t4 - t3;
+  stats->total += t4 - t0;
+  stats->iterations += 1;
+
+  // Both values should be kErrorOk.  Mix them and return the result.
+  return (rom_error_t)((ecdsa + spx) >> 1);
+}
+
+static status_t do_parallel_verify(void) {
+  const ecdsa_p256_public_key_t ecdsa_key = APP_PROD_ECDSA_P256;
+  const sigverify_spx_key_t spx_key = APP_PROD_SPX;
+
+  stats_t stats = {0};
+  for (size_t i = 0; i < 100; ++i) {
+    TRY(parallel_verify(
+        sigverify_parallel_data, sizeof(sigverify_parallel_data),
+        (const ecdsa_p256_signature_t *)sigverify_parallel_ecdsa, &ecdsa_key,
+        (const sigverify_spx_signature_t *)sigverify_parallel_spx, &spx_key,
+        kOwnershipKeyAlgSpxPrehash, &stats));
+  }
+  dbg_printf("---\r\n");
+  dbg_printf("iterations: %u\r\n", stats.iterations);
+  dbg_printf("hashing: %uus\r\n", stats.hashing);
+  dbg_printf("ecdsa_setup: %uus\r\n", stats.ecdsa_setup);
+  dbg_printf("ecdsa_finish: %uus\r\n", stats.ecdsa_finish);
+  dbg_printf("spx_verify: %uus\r\n", stats.spx_verify);
+  dbg_printf("total: %uus\r\n", stats.total);
+  return OK_STATUS();
+}
+
+#ifndef STRESS_TEST
+// By default, this test will run a single batch of 100 parallel verify and
+// report statistics.
+static status_t parallel_verify_test(void) { return do_parallel_verify(); }
+#else
+// If you run this test with `--copt=-DSTRESS_TEST`, the test will loop
+// forever running parallel verify continuously.
+static status_t parallel_verify_test(void) {
+  for (;;) {
+    TRY(do_parallel_verify());
+  }
+  return OK_STATUS();
+}
+#endif
+
+bool test_main(void) {
+  rv_timer_init();
+  return status_ok(parallel_verify_test());
+}
diff --git a/sw/device/tests/sim_dv/BUILD b/sw/device/tests/sim_dv/BUILD
index e385a01254cae..e007bcbfac9f7 100644
--- a/sw/device/tests/sim_dv/BUILD
+++ b/sw/device/tests/sim_dv/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 load("//rules/opentitan:defs.bzl", "opentitan_test")
 
 opentitan_test(
@@ -488,28 +488,6 @@ opentitan_test(
     ],
 )
 
-opentitan_test(
-    name = "sleep_pin_wake_test",
-    srcs = ["sleep_pin_wake_test.c"],
-    exec_env = {"//hw/top_earlgrey:sim_dv": None},
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:mmio",
-        "//sw/device/lib/dif:flash_ctrl",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/dif:pwrmgr",
-        "//sw/device/lib/dif:rv_plic",
-        "//sw/device/lib/runtime:irq",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:flash_ctrl_testutils",
-        "//sw/device/lib/testing:isr_testutils",
-        "//sw/device/lib/testing:pwrmgr_testutils",
-        "//sw/device/lib/testing:rand_testutils",
-        "//sw/device/lib/testing:rv_plic_testutils",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
 opentitan_test(
     name = "spi_host_tx_rx_test",
     srcs = ["spi_host_tx_rx_test.c"],
@@ -524,6 +502,7 @@ opentitan_test(
         "//sw/device/lib/runtime:log",
         "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing:rand_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -547,6 +526,7 @@ opentitan_test(
         "//sw/device/lib/testing:pinmux_testutils",
         "//sw/device/lib/testing:spi_device_testutils",
         "//sw/device/lib/testing:spi_flash_testutils",
+        "//sw/device/lib/testing:spi_host_testutils",
         "//sw/device/lib/testing/test_framework:ottf_main",
     ],
 )
@@ -669,31 +649,6 @@ opentitan_test(
     ],
 )
 
-opentitan_test(
-    name = "alert_handler_escalation_test",
-    srcs = ["alert_handler_escalation.c"],
-    exec_env = {"//hw/top_earlgrey:sim_dv": None},
-    deps = [
-        "//hw/top_earlgrey:alert_handler_c_regs",
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/arch:device",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/base:mmio",
-        "//sw/device/lib/dif:alert_handler",
-        "//sw/device/lib/dif:clkmgr",
-        "//sw/device/lib/dif:keymgr",
-        "//sw/device/lib/dif:rstmgr",
-        "//sw/device/lib/dif:rv_core_ibex",
-        "//sw/device/lib/runtime:hart",
-        "//sw/device/lib/runtime:ibex",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:alert_handler_testutils",
-        "//sw/device/lib/testing:keymgr_testutils",
-        "//sw/device/lib/testing:rstmgr_testutils",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
 opentitan_test(
     name = "alert_handler_entropy_test",
     srcs = ["alert_handler_entropy_test.c"],
@@ -873,25 +828,6 @@ opentitan_test(
     ],
 )
 
-opentitan_test(
-    name = "pattgen_ios_test",
-    srcs = ["pattgen_ios_test.c"],
-    exec_env = {"//hw/top_earlgrey:sim_dv": None},
-    deps = [
-        "//hw/top_earlgrey/sw/autogen:top_earlgrey",
-        "//sw/device/lib/base:memory",
-        "//sw/device/lib/base:mmio",
-        "//sw/device/lib/dif:pattgen",
-        "//sw/device/lib/dif:pinmux",
-        "//sw/device/lib/runtime:hart",
-        "//sw/device/lib/runtime:irq",
-        "//sw/device/lib/runtime:log",
-        "//sw/device/lib/testing:rv_plic_testutils",
-        "//sw/device/lib/testing/test_framework:check",
-        "//sw/device/lib/testing/test_framework:ottf_main",
-    ],
-)
-
 opentitan_test(
     name = "otp_ctrl_lc_signals_test",
     srcs = ["otp_ctrl_lc_signals_test.c"],
diff --git a/sw/device/tests/sim_dv/alert_handler_escalation.c b/sw/device/tests/sim_dv/alert_handler_escalation.c
deleted file mode 100644
index 45e7b8669b0ee..0000000000000
--- a/sw/device/tests/sim_dv/alert_handler_escalation.c
+++ /dev/null
@@ -1,165 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/math.h"
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_alert_handler.h"
-#include "sw/device/lib/dif/dif_clkmgr.h"
-#include "sw/device/lib/dif/dif_keymgr.h"
-#include "sw/device/lib/dif/dif_rstmgr.h"
-#include "sw/device/lib/dif/dif_rv_core_ibex.h"
-#include "sw/device/lib/dif/dif_uart.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/alert_handler_testutils.h"
-#include "sw/device/lib/testing/keymgr_testutils.h"
-#include "sw/device/lib/testing/rstmgr_testutils.h"
-#include "sw/device/lib/testing/test_framework/FreeRTOSConfig.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-#include "alert_handler_regs.h"  // Generated.
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "rv_core_ibex_regs.h"  // Generated.
-
-/*
-  - Verify the first escalation results in NMI interrupt serviced by the CPU.
-  - Verify the second results in device being put in escalate state, via the LC
-  JTAG TAP.
-  - Verify the third results in chip reset.
-  - Ensure that all escalation handshakes complete without errors.
-
-  The first escalation is checked via the entry of the NMI handler and polling
-  by dv. The second escalation is directly checked by dv. The third escalation
-  is checked via reset reason.
- */
-
-OTTF_DEFINE_TEST_CONFIG();
-
-static dif_clkmgr_t clkmgr;
-static dif_keymgr_t keymgr;
-static dif_rstmgr_t rstmgr;
-static dif_alert_handler_t alert_handler;
-static dif_rv_core_ibex_t rv_core_ibex;
-static dif_uart_t uart;
-
-typedef struct node {
-  const char *name;
-  dif_alert_handler_alert_t alert;
-  dif_alert_handler_class_t class;
-} node_t;
-
-static const dif_alert_handler_escalation_phase_t kEscProfiles[] = {
-    // TODO:
-    // this first/second duration must be long enough to
-    // accommodate a jtag transaction
-    // how can this be done in a non-hardcoded way?
-    {.phase = kDifAlertHandlerClassStatePhase0,
-     .signal = 0,
-     .duration_cycles = 10000},
-    {.phase = kDifAlertHandlerClassStatePhase1,
-     .signal = 1,
-     .duration_cycles = 10000},
-    {.phase = kDifAlertHandlerClassStatePhase2,
-     .signal = 3,
-     .duration_cycles = 3000}};
-
-static const dif_alert_handler_class_config_t kConfigProfiles[] = {{
-    .auto_lock_accumulation_counter = kDifToggleDisabled,
-    .accumulator_threshold = 0,
-    .irq_deadline_cycles = 0,
-    .escalation_phases = kEscProfiles,
-    .escalation_phases_len = 3,
-    .crashdump_escalation_phase = kDifAlertHandlerClassStatePhase1,
-}};
-
-/**
- * External ISR.
- *
- * Handles all peripheral interrupts on Ibex. PLIC asserts an external interrupt
- * line to the CPU, which results in a call to this OTTF ISR. This ISR
- * overrides the default OTTF implementation.
- */
-void ottf_external_nmi_handler(uint32_t *exc_info) {
-  // DO NOT REMOVE, DV sync message
-  LOG_INFO("You are experiencing an NMI");
-
-  // Now intentionally hang the device
-  CHECK_DIF_OK(dif_clkmgr_gateable_clock_set_enabled(
-      &clkmgr, kTopEarlgreyGateableClocksIoDiv4Peri, kDifToggleDisabled));
-
-  // access uart after clocks have been disabled
-  CHECK_DIF_OK(dif_uart_disable_rx_timeout(&uart));
-  LOG_FATAL("This message should never be seen");
-}
-
-bool test_main(void) {
-  CHECK_DIF_OK(dif_clkmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_CLKMGR_AON_BASE_ADDR), &clkmgr));
-
-  CHECK_DIF_OK(dif_rstmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
-
-  CHECK_DIF_OK(dif_alert_handler_init(
-      mmio_region_from_addr(TOP_EARLGREY_ALERT_HANDLER_BASE_ADDR),
-      &alert_handler));
-
-  CHECK_DIF_OK(dif_rv_core_ibex_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_CORE_IBEX_CFG_BASE_ADDR),
-      &rv_core_ibex));
-
-  CHECK_DIF_OK(dif_uart_init(
-      mmio_region_from_addr(TOP_EARLGREY_UART0_BASE_ADDR), &uart));
-
-  CHECK_DIF_OK(dif_keymgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_KEYMGR_BASE_ADDR), &keymgr));
-
-  // Check if there was a HW reset caused by the escalation.
-  dif_rstmgr_reset_info_bitfield_t rst_info;
-  rst_info = rstmgr_testutils_reason_get();
-  rstmgr_testutils_reason_clear();
-
-  if (rst_info & kDifRstmgrResetInfoPor) {
-    // set the alert we care about to class A
-    CHECK_DIF_OK(dif_alert_handler_configure_alert(
-        &alert_handler, kTopEarlgreyAlertIdRvCoreIbexRecovSwErr,
-        kDifAlertHandlerClassA, /*enabled=*/kDifToggleEnabled,
-        /*locked=*/kDifToggleEnabled));
-
-    // configurate class A
-    CHECK_DIF_OK(dif_alert_handler_configure_class(
-        &alert_handler, kDifAlertHandlerClassA, kConfigProfiles[0],
-        /*enabled=*/kDifToggleEnabled,
-        /*locked=*/kDifToggleEnabled));
-
-    // Initialize keymgr with otp contents
-    CHECK_STATUS_OK(keymgr_testutils_advance_state(&keymgr, NULL));
-
-    // DO NOT REMOVE, DV sync message
-    LOG_INFO("Keymgr entered Init State");
-
-    // Enable NMI
-    CHECK_DIF_OK(dif_rv_core_ibex_enable_nmi(&rv_core_ibex,
-                                             kDifRvCoreIbexNmiSourceAlert));
-
-    // force trigger the alert
-    CHECK_DIF_OK(dif_rv_core_ibex_alert_force(&rv_core_ibex,
-                                              kDifRvCoreIbexAlertRecovSwErr));
-
-    // Stop execution here and just wait for something to happen
-    wait_for_interrupt();
-    LOG_ERROR("Should have reset before this line");
-    return false;
-
-  } else if (rst_info & kDifRstmgrResetInfoEscalation) {
-    // DO NOT REMOVE, DV sync message
-    LOG_INFO("Reset due to alert escalation");
-    return true;
-
-  } else {
-    LOG_ERROR("Unexpected reset info %d", rst_info);
-  }
-
-  return false;
-}
diff --git a/sw/device/tests/sim_dv/ast_clk_rst_inputs.c b/sw/device/tests/sim_dv/ast_clk_rst_inputs.c
index 719294b63703a..8a20139d96ba6 100644
--- a/sw/device/tests/sim_dv/ast_clk_rst_inputs.c
+++ b/sw/device/tests/sim_dv/ast_clk_rst_inputs.c
@@ -539,7 +539,7 @@ bool test_main(void) {
   init_units();
 
   set_edn_auto_mode();
-  CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr, kDifToggleEnabled));
+  CHECK_DIF_OK(dif_clkmgr_jitter_set_enabled(&clkmgr));
 
   // Enable both recoverable and fatal alerts
   CHECK_DIF_OK(dif_alert_handler_configure_alert(
diff --git a/sw/device/tests/sim_dv/pattgen_ios_test.c b/sw/device/tests/sim_dv/pattgen_ios_test.c
deleted file mode 100644
index 03f6aee60ca20..0000000000000
--- a/sw/device/tests/sim_dv/pattgen_ios_test.c
+++ /dev/null
@@ -1,196 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_pattgen.h"
-#include "sw/device/lib/dif/dif_pinmux.h"
-#include "sw/device/lib/runtime/hart.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/rv_plic_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-
-/**
-   PATTGEN IOS test
-   The test programs both channels of the pattgen to random patterns.
-   Pattgen ios are connected as follows:
-   pda_tx[0] - IOB9
-   pcl_tx[0] - IOB10
-   pda_tx[1] - IOB11
-   pcl_tx[1] - IOB12
-
-   The random pattern programmed by 'chip_sw_patt_ios_vseq.sv'
-   and output will be collected at the PADS and compared in SV test bench.
- */
-
-OTTF_DEFINE_TEST_CONFIG();
-
-// Following volatile const will be overwritten by
-// SV testbench with random values.
-// 1: channel 0, 2: channel 1, 3: Both channels
-static volatile const uint8_t kChannelEnable = 3;
-
-static volatile const uint8_t kPattPol0 = kDifPattgenPolarityLow;
-static volatile const uint32_t kPattDiv0 = 0;
-static volatile const uint32_t kPattLower0 = 0x76543210;
-static volatile const uint32_t kPattUpper0 = 0x76543210;
-static volatile const uint8_t kPattLen0 = 40;
-static volatile const uint16_t kPattRep0 = 3;
-
-static volatile const uint8_t kPattPol1 = kDifPattgenPolarityLow;
-static volatile const uint32_t kPattDiv1 = 0;
-static volatile const uint32_t kPattLower1 = 0x76543210;
-static volatile const uint32_t kPattUpper1 = 0x76543210;
-static volatile const uint8_t kPattLen1 = 40;
-static volatile const uint16_t kPattRep1 = 3;
-
-static const uint32_t kPlicTarget = kTopEarlgreyPlicTargetIbex0;
-static const uint8_t kPattOuts = 4;
-
-static const dif_pinmux_index_t kPinmuxOutsel[] = {
-    kTopEarlgreyPinmuxOutselPattgenPda0Tx, /**< = 49: Peripheral Output 46 */
-    kTopEarlgreyPinmuxOutselPattgenPcl0Tx, /**< = 50: Peripheral Output 47 */
-    kTopEarlgreyPinmuxOutselPattgenPda1Tx, /**< = 51: Peripheral Output 48 */
-    kTopEarlgreyPinmuxOutselPattgenPcl1Tx, /**< = 52: Peripheral Output 49 */
-};
-static const dif_pinmux_index_t kPinmuxMioOut[] = {
-    kTopEarlgreyPinmuxMioOutIob9,   // pda0_tx
-    kTopEarlgreyPinmuxMioOutIob10,  // pcl0_tx
-    kTopEarlgreyPinmuxMioOutIob11,  // pda1_tx
-    kTopEarlgreyPinmuxMioOutIob12,  // pcl1_tx
-};
-
-static dif_rv_plic_t plic;
-static dif_pattgen_t pattgen;
-
-/**
- * External interrupt handler.
- */
-void ottf_external_isr(uint32_t *exc_info) {
-  dif_rv_plic_irq_id_t irq_id;
-
-  CHECK_DIF_OK(dif_rv_plic_irq_claim(&plic, kPlicTarget, &irq_id));
-  LOG_INFO("IRQ detected %0d", irq_id);
-
-  switch (irq_id) {
-    case kTopEarlgreyPlicIrqIdPattgenDoneCh0:
-      LOG_INFO("Channel 0");
-      break;
-    case kTopEarlgreyPlicIrqIdPattgenDoneCh1:
-      LOG_INFO("Channel 1");
-      break;
-    default:
-      LOG_FATAL("IRQ: unknown irq %d", irq_id);
-      break;
-  }
-}
-
-bool test_main(void) {
-  dif_pinmux_t pinmux;
-
-  // Disable irq_global_ctrl to avoid the race condition between
-  // `wait_for_interrupt` and OTTF interrupt handling.
-  irq_global_ctrl(/*en=*/false);
-  irq_external_ctrl(true);
-
-  CHECK_DIF_OK(dif_pattgen_init(
-      mmio_region_from_addr(TOP_EARLGREY_PATTGEN_BASE_ADDR), &pattgen));
-  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel0,
-                                               kDifToggleDisabled));
-  CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel1,
-                                               kDifToggleDisabled));
-  CHECK_DIF_OK(dif_rv_plic_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic));
-  rv_plic_testutils_irq_range_enable(&plic, kPlicTarget,
-                                     kTopEarlgreyPlicIrqIdPattgenDoneCh0,
-                                     kTopEarlgreyPlicIrqIdPattgenDoneCh1);
-
-  // Initialize pinmux
-  // Assign PattgenOutput to IOB9..12
-  CHECK_DIF_OK(dif_pinmux_init(
-      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
-
-  LOG_INFO("pinmux_init begin");
-  for (uint8_t i = 0; i < kPattOuts; ++i) {
-    CHECK_DIF_OK(
-        dif_pinmux_output_select(&pinmux, kPinmuxMioOut[i], kPinmuxOutsel[i]));
-  }
-  // Do not remove below msg.
-  LOG_INFO("pinmux_init end");
-
-  // Enable pattgen interrupt at plic
-  CHECK_DIF_OK(dif_pattgen_irq_set_enabled(&pattgen, kDifPattgenIrqDoneCh0,
-                                           kDifToggleEnabled));
-  CHECK_DIF_OK(dif_pattgen_irq_set_enabled(&pattgen, kDifPattgenIrqDoneCh1,
-                                           kDifToggleEnabled));
-
-  // Program pattgen if the channel is enabled.
-  dif_pattgen_channel_config_t patt_cfg;
-  if (kChannelEnable & 0x1) {
-    patt_cfg.polarity = kPattPol0;
-    patt_cfg.clock_divisor = kPattDiv0;
-    patt_cfg.seed_pattern_lower_word = kPattLower0;
-    patt_cfg.seed_pattern_upper_word = kPattUpper0;
-    patt_cfg.seed_pattern_length = kPattLen0;
-    patt_cfg.num_pattern_repetitions = kPattRep0;
-    CHECK_DIF_OK(
-        dif_pattgen_configure_channel(&pattgen, kDifPattgenChannel0, patt_cfg));
-
-    LOG_INFO("TEST CH0 Enable");
-    CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel0,
-                                                 kDifToggleEnabled));
-  }
-
-  if (kChannelEnable & 0x2) {
-    patt_cfg.polarity = kPattPol1;
-    patt_cfg.clock_divisor = kPattDiv1;
-    patt_cfg.seed_pattern_lower_word = kPattLower1;
-    patt_cfg.seed_pattern_upper_word = kPattUpper1;
-    patt_cfg.seed_pattern_length = kPattLen1;
-    patt_cfg.num_pattern_repetitions = kPattRep1;
-    CHECK_DIF_OK(
-        dif_pattgen_configure_channel(&pattgen, kDifPattgenChannel1, patt_cfg));
-
-    LOG_INFO("TEST CH1 Enable");
-    CHECK_DIF_OK(dif_pattgen_channel_set_enabled(&pattgen, kDifPattgenChannel1,
-                                                 kDifToggleEnabled));
-  }
-
-  LOG_INFO("Wait for interrupt");
-  wait_for_interrupt();
-
-  // Enable irq_global_ctrl to let OTTF handle interrupt.
-  irq_global_ctrl(/*en=*/true);
-
-  // Make sure both interrupts are triggered when both channels are enabled.
-  // Because interrupt from each channel can be triggered at different time,
-  // 'wait_for_interrupt' is not sufficient
-  uint32_t state = 0;
-  while (state != kChannelEnable) {
-    CHECK_DIF_OK(dif_pattgen_irq_get_state(&pattgen, &state));
-  }
-
-  // Check the expected interrupt is triggered.
-  bool is_pending;
-  if (kChannelEnable & 0x1) {
-    CHECK_DIF_OK(dif_pattgen_irq_is_pending(&pattgen, kDifPattgenIrqDoneCh0,
-                                            &is_pending));
-    CHECK(is_pending == true);
-    CHECK_DIF_OK(dif_pattgen_irq_acknowledge(&pattgen, kDifPattgenIrqDoneCh0));
-  }
-
-  if (kChannelEnable & 0x2) {
-    CHECK_DIF_OK(dif_pattgen_irq_is_pending(&pattgen, kDifPattgenIrqDoneCh1,
-                                            &is_pending));
-    CHECK(is_pending == true);
-    CHECK_DIF_OK(dif_pattgen_irq_acknowledge(&pattgen, kDifPattgenIrqDoneCh1));
-  }
-
-  // Do not remove the below message
-  LOG_INFO("TEST DONE");
-  return true;
-}
diff --git a/sw/device/tests/sim_dv/pwrmgr_sleep_all_wake_ups_impl.c b/sw/device/tests/sim_dv/pwrmgr_sleep_all_wake_ups_impl.c
index 201a88ff4a7fa..39336faa28eca 100644
--- a/sw/device/tests/sim_dv/pwrmgr_sleep_all_wake_ups_impl.c
+++ b/sw/device/tests/sim_dv/pwrmgr_sleep_all_wake_ups_impl.c
@@ -355,14 +355,16 @@ static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
 /**
  * External interrupt handler.
  */
-void ottf_external_isr(uint32_t *exc_info) {
-  dif_pwrmgr_irq_t irq_id;
-  top_earlgrey_plic_peripheral_t peripheral;
+bool ottf_handle_irq(uint32_t *exc_info,
+                     top_earlgrey_plic_peripheral_t peripheral,
+                     dif_pwrmgr_irq_t irq_id) {
+  OT_DISCARD(exc_info);
 
-  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+  if (peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon &&
+      irq_id == kTopEarlgreyPlicIrqIdPwrmgrAonWakeup) {
+    CHECK_DIF_OK(dif_pwrmgr_irq_acknowledge(&pwrmgr, kDifPwrmgrIrqWakeup));
+    return true;
+  }
 
-  // Check that both the peripheral and the irq id is correct
-  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
-        "IRQ peripheral: %d is incorrect", peripheral);
-  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+  return false;
 }
diff --git a/sw/device/tests/sim_dv/sleep_pin_wake_test.c b/sw/device/tests/sim_dv/sleep_pin_wake_test.c
deleted file mode 100644
index a7c3fbb68c6db..0000000000000
--- a/sw/device/tests/sim_dv/sleep_pin_wake_test.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-#include "sw/device/lib/base/mmio.h"
-#include "sw/device/lib/dif/dif_pinmux.h"
-#include "sw/device/lib/dif/dif_pwrmgr.h"
-#include "sw/device/lib/dif/dif_rv_plic.h"
-#include "sw/device/lib/runtime/irq.h"
-#include "sw/device/lib/runtime/log.h"
-#include "sw/device/lib/testing/flash_ctrl_testutils.h"
-#include "sw/device/lib/testing/pwrmgr_testutils.h"
-#include "sw/device/lib/testing/rand_testutils.h"
-#include "sw/device/lib/testing/rv_plic_testutils.h"
-#include "sw/device/lib/testing/test_framework/check.h"
-#include "sw/device/lib/testing/test_framework/ottf_main.h"
-
-#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
-#include "sw/device/lib/testing/autogen/isr_testutils.h"
-// Below includes are generated during compile time.
-#include "flash_ctrl_regs.h"
-#include "pinmux_regs.h"
-
-OTTF_DEFINE_TEST_CONFIG();
-
-// PLIC structures
-static dif_pwrmgr_t pwrmgr;
-static dif_pinmux_t pinmux;
-static dif_rv_plic_t plic;
-static dif_flash_ctrl_state_t flash_ctrl_state;
-
-static const uint32_t kNumDio = 16;  // top_earlgrey has 16 DIOs
-
-// kDirectDio is a list of Dio index that TB cannot control the PAD value.
-// The list should be incremental order (see the code below)
-#define NUM_DIRECT_DIO 5
-static const uint32_t kDirectDio[NUM_DIRECT_DIO] = {6, 12, 13, 14, 15};
-
-static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
-                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
-
-static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
-    .pwrmgr = &pwrmgr,
-    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-    .expected_irq = kDifPwrmgrIrqWakeup,
-    .is_only_irq = true};
-
-// Preserve wakeup_detector_selected over multiple resets
-OT_SECTION(".non_volatile_scratch") uint32_t wakeup_detector_idx;
-
-/**
- * External interrupt handler.
- */
-void ottf_external_isr(uint32_t *exc_info) {
-  dif_pwrmgr_irq_t irq_id;
-  top_earlgrey_plic_peripheral_t peripheral;
-
-  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
-
-  // Check that both the peripheral and the irq id is correct
-  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
-        "IRQ peripheral: %d is incorrect", peripheral);
-  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
-}
-
-bool test_main(void) {
-  dif_pinmux_wakeup_config_t wakeup_cfg;
-
-  // Default Deep Power Down
-  dif_pwrmgr_domain_config_t pwrmgr_domain_cfg = 0;
-
-  // Enable global and external IRQ at Ibex.
-  irq_global_ctrl(true);
-  irq_external_ctrl(true);
-
-  // Initialize power manager
-  CHECK_DIF_OK(dif_pwrmgr_init(
-      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
-  CHECK_DIF_OK(dif_rv_plic_init(
-      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic));
-  CHECK_DIF_OK(dif_pinmux_init(
-      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
-  CHECK_DIF_OK(dif_flash_ctrl_init_state(
-      &flash_ctrl_state,
-      mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
-  // Enable access to flash for storing info across resets.
-  CHECK_STATUS_OK(
-      flash_ctrl_testutils_default_region_access(&flash_ctrl_state,
-                                                 /*rd_en*/ true,
-                                                 /*prog_en*/ true,
-                                                 /*erase_en*/ true,
-                                                 /*scramble_en*/ false,
-                                                 /*ecc_en*/ false,
-                                                 /*he_en*/ false));
-  // Randomly pick one of the wakeup detectors
-  // only after the first boot.
-  dif_pinmux_index_t wakeup_detector_selected = 0;
-
-  if (UNWRAP(pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) == true) {
-    LOG_INFO("Test in POR phase");
-
-    // After randomly generated wake detector index,
-    // store to non volatile area to preserve from the reset event.
-    wakeup_detector_selected =
-        rand_testutils_gen32_range(0, PINMUX_PARAM_N_WKUP_DETECT - 1);
-    CHECK_STATUS_OK(flash_ctrl_testutils_write(
-        &flash_ctrl_state,
-        (uint32_t)(&wakeup_detector_idx) -
-            TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR,
-        0, &wakeup_detector_selected, kDifFlashCtrlPartitionTypeData, 1));
-    LOG_INFO("detector %0d is selected", wakeup_detector_selected);
-    // TODO(lowrisc/opentitan#15889): The weak pull on IOC3 needs to be
-    // disabled for this test. Remove this later.
-    dif_pinmux_pad_attr_t out_attr;
-    dif_pinmux_pad_attr_t in_attr = {0};
-    CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, kTopEarlgreyMuxedPadsIoc3,
-                                            kDifPinmuxPadKindMio, in_attr,
-                                            &out_attr));
-
-    // This print is placed here on purpose.
-    // sv sequence is waiting for this print log followed by
-    // Pad Section. So do not put any other print between
-    // this LOG_INFO and LOG_INFO("Pad Selection");
-    LOG_INFO("pinmux_init end");
-    // Random choose low power or deep powerdown
-    uint32_t deep_powerdown_en = rand_testutils_gen32_range(0, 1);
-
-    // Prepare which PAD SW want to select
-    uint32_t mio0_dio1 = rand_testutils_gen32_range(0, 1);
-    uint32_t pad_sel = 0;
-
-    // Enable AonWakeup Interrupt if normal sleep
-    if (deep_powerdown_en == 0) {
-      // Enable all the AON interrupts used in this test.
-      rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
-                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
-                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
-      // Enable pwrmgr interrupt
-      CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
-    }
-
-    // SpiDev CLK(idx 12), CS#(idx 13), D0(idx 6) and SpiHost CLK (14), CS#
-    // (15) are directly connected to the SPI IF. Cannot control them. Roll 3
-    // less and compensated later.
-    if (mio0_dio1) {
-      // DIO
-      pad_sel = rand_testutils_gen32_range(0, kNumDio - 1 - NUM_DIRECT_DIO);
-
-      for (int i = 0; i < NUM_DIRECT_DIO; i++) {
-        if (pad_sel >= kDirectDio[i]) {
-          pad_sel++;
-        }
-      }
-      LOG_INFO("Pad Selection: %d / %d", mio0_dio1, pad_sel);
-    } else {
-      // MIO: 0, 1 are tie-0, tie-1
-      pad_sel = rand_testutils_gen32_range(2, kTopEarlgreyPinmuxInselLast);
-      LOG_INFO("Pad Selection: %d / %d", mio0_dio1, pad_sel - 2);
-    }
-
-    if (mio0_dio1 == 0) {
-      // TODO: Check if the PAD is locked (kDifPinmuxLockTargetOutsel), then
-      // skip if locked.
-      // Turn off Pinmux output selection
-      CHECK_DIF_OK(dif_pinmux_output_select(
-          &pinmux, pad_sel - 2, kTopEarlgreyPinmuxOutselConstantHighZ));
-    }
-
-    wakeup_cfg.mode = kDifPinmuxWakeupModePositiveEdge;
-    wakeup_cfg.signal_filter = false;
-    wakeup_cfg.pad_type = mio0_dio1;
-    wakeup_cfg.pad_select = pad_sel;
-
-    // TODO: A better test would be to program ALL wakeup detectors with
-    // randomly chosen pin wakeup sources and prove the right wakeup source
-    // woke up the chip from sleep.
-    CHECK_DIF_OK(dif_pinmux_wakeup_detector_enable(
-        &pinmux, wakeup_detector_selected, wakeup_cfg));
-
-    if (deep_powerdown_en == 0) {
-      pwrmgr_domain_cfg = kDifPwrmgrDomainOptionMainPowerInLowPower |
-                          kDifPwrmgrDomainOptionUsbClockInActivePower;
-    }
-    // Enter low power
-    CHECK_STATUS_OK(pwrmgr_testutils_enable_low_power(
-        &pwrmgr, kDifPwrmgrWakeupRequestSourceThree, pwrmgr_domain_cfg));
-
-    LOG_INFO("Entering low power mode.");
-    wait_for_interrupt();
-  }
-
-  if (UNWRAP(pwrmgr_testutils_is_wakeup_reason(
-          &pwrmgr, kDifPwrmgrWakeupRequestSourceThree)) == true) {
-    LOG_INFO("Test in post-sleep pin wakeup phase");
-    uint32_t wakeup_cause;
-    CHECK_DIF_OK(dif_pinmux_wakeup_cause_get(&pinmux, &wakeup_cause));
-    // Get the wakeup dectector index from stored variable.
-    wakeup_detector_selected = wakeup_detector_idx;
-    CHECK(wakeup_cause == 1 << wakeup_detector_selected);
-    CHECK_DIF_OK(
-        dif_pinmux_wakeup_detector_disable(&pinmux, wakeup_detector_selected));
-    return true;
-
-  } else {
-    // Other wakeup. This is a failure.
-    dif_pwrmgr_wakeup_reason_t wakeup_reason;
-    CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
-    LOG_ERROR("Unexpected wakeup detected: type = %d, request_source = %d",
-              wakeup_reason.types, wakeup_reason.request_sources);
-    return false;
-  }
-
-  return false;
-}
-
-#undef NUM_DIRECT_DIO
-#undef NUM_LOCKED_MIO
diff --git a/sw/device/tests/sim_dv/spi_host_tx_rx_test.c b/sw/device/tests/sim_dv/spi_host_tx_rx_test.c
index 8de39e0c64d99..6d461b14a0cbc 100644
--- a/sw/device/tests/sim_dv/spi_host_tx_rx_test.c
+++ b/sw/device/tests/sim_dv/spi_host_tx_rx_test.c
@@ -11,6 +11,7 @@
 #include "sw/device/lib/runtime/log.h"
 #include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/rand_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/status.h"
@@ -33,14 +34,6 @@ static volatile const uint8_t kSPIHostIdx = 0x0;
 static dif_spi_host_t spi_host;
 static dif_pinmux_t pinmux;
 
-static const top_earlgrey_direct_pads_t spi_host0_direct_pads[6] = {
-    kTopEarlgreyDirectPadsSpiHost0Sck,   // sck
-    kTopEarlgreyDirectPadsSpiHost0Csb,   // csb
-    kTopEarlgreyDirectPadsSpiHost0Sd3,   // sio[3]
-    kTopEarlgreyDirectPadsSpiHost0Sd2,   // sio[2]
-    kTopEarlgreyDirectPadsSpiHost0Sd1,   // sio[1]
-    kTopEarlgreyDirectPadsSpiHost0Sd0};  // sio[0]
-
 // pinmap defined in chip_if.sv (spi_device1_if)
 static const top_earlgrey_muxed_pads_t spi_host1_muxed_pads[6] = {
     kTopEarlgreyMuxedPadsIob0,  // sck
@@ -141,44 +134,45 @@ void init_spi_host(dif_spi_host_t *spi_host,
   CHECK_DIF_OK(dif_spi_host_output_set_enabled(spi_host, /*enabled=*/true));
 }
 
-/**
- * Setup pads for spi_host0
- *
- * This peripheral is 'direct' connected to the pads.
- */
-void setup_pads_spi_host0(void) {
-  // set weak pull-ups for all the pads
-  dif_pinmux_pad_attr_t out_attr;
-  dif_pinmux_pad_attr_t in_attr = {
-      .slew_rate = 0,
-      .drive_strength = 0,
-      .flags = kDifPinmuxPadAttrPullResistorEnable |
-               kDifPinmuxPadAttrPullResistorUp};
-  for (uint32_t i = 0; i <= ARRAYSIZE(spi_host0_direct_pads); ++i) {
-    CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, spi_host0_direct_pads[i],
-                                            kDifPinmuxPadKindDio, in_attr,
-                                            &out_attr));
-  }
-}
-
 /**
  * Setup pads and pinmux for spi_host0
  *
  * This peripheral is 'muxed', so configure the pinmux as well as pads.
  */
 void setup_pinmux_pads_spi_host1(void) {
-  // Set weak pull-ups for the pads
+  // Set weak pull-ups, fast slew rate and strong drive strengh for the pads
   dif_pinmux_pad_attr_t out_attr;
   dif_pinmux_pad_attr_t in_attr = {
-      .slew_rate = 0,
-      .drive_strength = 0,
+      .slew_rate = 1,
+      .drive_strength = 3,
       // set weak pull-ups for all the pads
       .flags = kDifPinmuxPadAttrPullResistorEnable |
                kDifPinmuxPadAttrPullResistorUp};
+  dif_result_t res;
   for (uint32_t i = 0; i <= ARRAYSIZE(spi_host1_muxed_pads); ++i) {
-    CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, spi_host1_muxed_pads[i],
-                                            kDifPinmuxPadKindMio, in_attr,
-                                            &out_attr));
+    res = dif_pinmux_pad_write_attrs(&pinmux, spi_host1_muxed_pads[i],
+                                     kDifPinmuxPadKindMio, in_attr, &out_attr);
+    if (res == kDifError) {
+      // Some target platforms may not support the specified value for slew rate
+      // and drive strength. If that's the case, use the values actually
+      // supported.
+      if (out_attr.slew_rate != in_attr.slew_rate) {
+        LOG_INFO(
+            "Specified slew rate not supported, trying supported slew rate");
+        in_attr.slew_rate = out_attr.slew_rate;
+      }
+      if (out_attr.drive_strength != in_attr.drive_strength) {
+        LOG_INFO(
+            "Specified drive strength not supported, trying supported drive "
+            "strength");
+        in_attr.drive_strength = out_attr.drive_strength;
+      }
+      CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, spi_host1_muxed_pads[i],
+                                              kDifPinmuxPadKindMio, in_attr,
+                                              &out_attr));
+      // Note: fallthrough with the modified `in_attr` so that the same
+      // attributes are used for all pads.
+    }
   }
 
   // Setup Inputs
@@ -201,9 +195,11 @@ bool test_main(void) {
       mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
   pinmux_testutils_init(&pinmux);
 
-  // Setup pinmux if required, enable weak pull-up on relevant pads
-  setup_pads_spi_host0();         // direct
-  setup_pinmux_pads_spi_host1();  // muxed
+  // Setup pinmux if required, enable weak pull-up on relevant pads, set slew
+  // rate and drive strength.
+  CHECK_STATUS_OK(
+      spi_host_testutils_configure_host0_pad_attrs(&pinmux));  // direct
+  setup_pinmux_pads_spi_host1();                               // muxed
 
   // Setup spi host configuration
   LOG_INFO("Testing spi_host%0d", kSPIHostIdx);
diff --git a/sw/device/tests/sim_dv/spi_passthrough_test.c b/sw/device/tests/sim_dv/spi_passthrough_test.c
index daaca11c39416..3232b9e406947 100644
--- a/sw/device/tests/sim_dv/spi_passthrough_test.c
+++ b/sw/device/tests/sim_dv/spi_passthrough_test.c
@@ -19,6 +19,7 @@
 #include "sw/device/lib/testing/pinmux_testutils.h"
 #include "sw/device/lib/testing/spi_device_testutils.h"
 #include "sw/device/lib/testing/spi_flash_testutils.h"
+#include "sw/device/lib/testing/spi_host_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
@@ -377,6 +378,13 @@ bool test_main(void) {
         dif_pinmux_output_select(&pinmux, setting.pad, setting.peripheral));
   }
 
+  // Configure fast slew rate, strong drive strength, and weak pull-ups for SPI
+  // Host 0 pads.
+  CHECK_STATUS_OK(spi_host_testutils_configure_host0_pad_attrs(&pinmux));
+
+  // Configure fast slew rate and strong drive strength for SPI device pads.
+  CHECK_STATUS_OK(spi_device_testutils_configure_pad_attrs(&pinmux));
+
   // Initialize the PLIC.
   CHECK_DIF_OK(dif_rv_plic_init(
       mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &rv_plic));
diff --git a/sw/device/tests/sival/BUILD b/sw/device/tests/sival/BUILD
index 19239e1150cb6..9416fba45c0df 100644
--- a/sw/device/tests/sival/BUILD
+++ b/sw/device/tests/sival/BUILD
@@ -2,13 +2,12 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-# See sw/device/tests/doc/sival/README.md#running-test-suites for details on
-# how to run SV test suites across execution environments.
-
 test_suite(
     name = "sv1_tests",
     tests = [
         "//sw/device/silicon_creator/rom/e2e/jtag_inject:rom_e2e_openocd_debug_test",
+        "//sw/device/tests:lc_ctrl_otp_hw_cfg0_test",
+        "//sw/device/tests:pwrmgr_smoketest",
         "//sw/device/tests:rstmgr_cpu_info_test",
         "//sw/device/tests:rv_core_ibex_epmp_test_functest",
         "//sw/device/tests:rv_core_ibex_isa_test",
@@ -20,31 +19,36 @@ test_suite(
 test_suite(
     name = "sv2_tests",
     tests = [
+        "//sw/device/silicon_creator/lib:otbn_boot_services_functest",
         "//sw/device/tests:aes_smoketest",
-        "//sw/device/tests:alert_handler_lpg_clkoff_test",
-        "//sw/device/tests:alert_handler_lpg_reset_toggle_test",
         "//sw/device/tests:aon_timer_irq_test",
         "//sw/device/tests:aon_timer_smoketest",
         "//sw/device/tests:aon_timer_wdog_bite_reset_test",
         "//sw/device/tests:ast_clk_outs_test",
+        "//sw/device/tests:clkmgr_external_clk_src_for_sw_fast_test",
+        "//sw/device/tests:clkmgr_external_clk_src_for_sw_slow_test",
         "//sw/device/tests:clkmgr_smoketest",
-        "//sw/device/tests:csrng_edn_concurrency_test",
         "//sw/device/tests:csrng_smoketest",
         "//sw/device/tests:entropy_src_csrng_test",
         "//sw/device/tests:entropy_src_smoketest",
+        "//sw/device/tests:gpio_pinmux_test",
         "//sw/device/tests:gpio_smoketest",
+        "//sw/device/tests:hmac_enc_test",
         "//sw/device/tests:hmac_smoketest",
         "//sw/device/tests:i2c_target_test",
-        "//sw/device/tests:keymgr_key_derivation_test",
         "//sw/device/tests:keymgr_sideload_otbn_simple_test",
+        "//sw/device/tests:keymgr_sideload_otbn_test",
+        "//sw/device/tests:kmac_mode_kmac_test",
         "//sw/device/tests:kmac_smoketest",
         "//sw/device/tests:otbn_smoketest",
-        "//sw/device/tests:pwrmgr_random_sleep_all_reset_reqs_test",
-        "//sw/device/tests:pwrmgr_random_sleep_all_wake_ups",
+        "//sw/device/tests:otp_ctrl_smoketest",
+        "//sw/device/tests:pattgen_ios_test",
+        "//sw/device/tests:pmp_smoketest_napot",
+        "//sw/device/tests:pmp_smoketest_tor",
+        "//sw/device/tests:power_virus_systemtest",
         "//sw/device/tests:pwrmgr_smoketest",
+        "//sw/device/tests:pwrmgr_usbdev_smoketest",
         "//sw/device/tests:pwrmgr_wdog_reset_reqs_test",
-        "//sw/device/tests:rstmgr_alert_info_test",
-        "//sw/device/tests:rstmgr_cpu_info_test",
         "//sw/device/tests:rstmgr_smoketest",
         "//sw/device/tests:rv_core_ibex_nmi_irq_test",
         "//sw/device/tests:rv_dm_jtag_tap_sel",
@@ -53,13 +57,21 @@ test_suite(
         "//sw/device/tests:rv_dm_ndm_reset_req",
         "//sw/device/tests:rv_plic_smoketest",
         "//sw/device/tests:rv_timer_smoketest",
+        "//sw/device/tests:sleep_pwm_pulses_test",
+        "//sw/device/tests:spi_host_smoketest",
         "//sw/device/tests:spi_host_winbond_flash_test",
-        "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_no_scramble_test",
-        "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_scramble_test",
         "//sw/device/tests:sram_ctrl_smoketest",
         "//sw/device/tests:uart_smoketest",
         "//sw/device/tests:uart_tx_rx_test",
+        "//sw/device/tests/autogen:plic_all_irqs_test_0",
+        "//sw/device/tests/autogen:plic_all_irqs_test_10",
+        "//sw/device/tests/autogen:plic_all_irqs_test_20",
+        "//sw/device/tests/crypto:aes_kwp_functest",
+        "//sw/device/tests/crypto:aes_kwp_kat_functest",
+        "//sw/device/tests/crypto:ecdh_p256_sideload_functest",
+        "//sw/device/tests/crypto:ecdsa_p256_sideload_functest",
         "//sw/device/tests/pmod:i2c_host_eeprom_test",
+        "//sw/device/tests/pmod:spi_host_macronix1Gb_flash_test",
     ],
 )
 
@@ -72,13 +84,16 @@ test_suite(
         "//sw/device/tests:alert_handler_lpg_clkoff_test",
         "//sw/device/tests:alert_handler_lpg_reset_toggle_test",
         "//sw/device/tests:alert_handler_lpg_sleep_mode_pings_test",
+        "//sw/device/tests:alert_handler_ping_ok_test",
         "//sw/device/tests:alert_handler_ping_timeout_test",
         "//sw/device/tests:alert_handler_reverse_ping_in_deep_sleep_test",
-        "//sw/device/tests:aon_timer_irq_test",
         "//sw/device/tests:aon_timer_sleep_wdog_sleep_pause_test",
+        "//sw/device/tests:aon_timer_wdog_bite_reset_test",
         "//sw/device/tests:aon_timer_wdog_lc_escalate_test",
         "//sw/device/tests:ast_clk_outs_test",
+        "//sw/device/tests:chip_power_idle_load_test",
         "//sw/device/tests:clkmgr_jitter_frequency_test",
+        "//sw/device/tests:clkmgr_jitter_test",
         "//sw/device/tests:clkmgr_off_aes_trans_test",
         "//sw/device/tests:clkmgr_off_hmac_trans_test",
         "//sw/device/tests:clkmgr_off_kmac_trans_test",
@@ -86,8 +101,7 @@ test_suite(
         "//sw/device/tests:clkmgr_off_peri_test",
         "//sw/device/tests:clkmgr_reset_frequency_test",
         "//sw/device/tests:clkmgr_sleep_frequency_test",
-        "//sw/device/tests:coverage_test",
-        "//sw/device/tests:crt_test",
+        "//sw/device/tests:csrng_edn_concurrency_test",
         "//sw/device/tests:csrng_kat_test",
         "//sw/device/tests:edn_auto_mode",
         "//sw/device/tests:edn_boot_mode",
@@ -95,36 +109,50 @@ test_suite(
         "//sw/device/tests:edn_sw_mode",
         "//sw/device/tests:entropy_src_ast_rng_req_test",
         "//sw/device/tests:entropy_src_edn_reqs_test",
+        "//sw/device/tests:entropy_src_fw_observe_many_contiguous_test",
+        "//sw/device/tests:entropy_src_fw_override_test",
         "//sw/device/tests:entropy_src_fw_ovr_test",
         "//sw/device/tests:entropy_src_kat_test",
-        "//sw/device/tests:example_concurrency_test",
         "//sw/device/tests:flash_ctrl_clock_freqs_test",
         "//sw/device/tests:flash_ctrl_idle_low_power_test",
+        "//sw/device/tests:flash_ctrl_info_access_lc_states",
+        "//sw/device/tests:flash_ctrl_info_access_lc_states_personalized",
+        "//sw/device/tests:flash_ctrl_mem_protection_test",
         "//sw/device/tests:flash_ctrl_ops_test",
+        "//sw/device/tests:flash_ctrl_rma_test",
         "//sw/device/tests:flash_ctrl_test",
+        "//sw/device/tests:flash_ctrl_write_clear_test",
+        "//sw/device/tests:gpio_intr_test",
         "//sw/device/tests:hmac_enc_idle_test",
-        "//sw/device/tests:hmac_enc_test",
         "//sw/device/tests:hmac_secure_wipe_test",
+        "//sw/device/tests:i2c_host_override_test",
+        "//sw/device/tests:i2c_target_test",
+        "//sw/device/tests:keymgr_key_derivation_test",
         "//sw/device/tests:keymgr_sideload_aes_test",
         "//sw/device/tests:keymgr_sideload_kmac_test",
-        "//sw/device/tests:keymgr_sideload_otbn_simple_test",
-        "//sw/device/tests:keymgr_sideload_otbn_test",
+        "//sw/device/tests:kmac_endianess_test",
         "//sw/device/tests:kmac_idle_test",
+        "//sw/device/tests:kmac_kmac_key_sideload_test",
         "//sw/device/tests:kmac_mode_cshake_test",
-        "//sw/device/tests:kmac_mode_kmac_test",
         "//sw/device/tests:otbn_ecdsa_op_irq_test",
         "//sw/device/tests:otbn_irq_test",
+        "//sw/device/tests:otbn_isa_test",
         "//sw/device/tests:otbn_mem_scramble_test",
         "//sw/device/tests:otbn_randomness_test",
         "//sw/device/tests:otbn_rsa_test",
+        "//sw/device/tests:otbn_smoketest",
         "//sw/device/tests:plic_sw_irq_test",
-        "//sw/device/tests:power_virus_systemtest",
         "//sw/device/tests:pwrmgr_all_reset_reqs_test",
         "//sw/device/tests:pwrmgr_deep_sleep_all_reset_reqs_test",
+        "//sw/device/tests:pwrmgr_deep_sleep_all_wake_ups",
         "//sw/device/tests:pwrmgr_deep_sleep_por_reset_test",
+        "//sw/device/tests:pwrmgr_normal_sleep_all_reset_reqs_test",
+        "//sw/device/tests:pwrmgr_normal_sleep_all_wake_ups",
         "//sw/device/tests:pwrmgr_normal_sleep_por_reset_test",
+        "//sw/device/tests:pwrmgr_random_sleep_all_reset_reqs_test",
         "//sw/device/tests:pwrmgr_random_sleep_all_wake_ups",
         "//sw/device/tests:pwrmgr_sleep_disabled_test",
+        "//sw/device/tests:pwrmgr_sleep_wake_5_bug_test",
         "//sw/device/tests:pwrmgr_usb_clk_disabled_when_active_test",
         "//sw/device/tests:pwrmgr_wdog_reset_reqs_test",
         "//sw/device/tests:rstmgr_alert_info_test",
@@ -132,23 +160,92 @@ test_suite(
         "//sw/device/tests:rstmgr_sw_rst_ctrl_test",
         "//sw/device/tests:rv_core_ibex_address_translation_test",
         "//sw/device/tests:rv_core_ibex_icache_invalidate_test",
+        "//sw/device/tests:rv_dm_access_after_hw_reset",
+        "//sw/device/tests:rv_dm_access_after_wakeup",
+        "//sw/device/tests:rv_dm_control_status",
+        "//sw/device/tests:rv_dm_csr_rw",
+        "//sw/device/tests:rv_dm_dtm",
         "//sw/device/tests:rv_dm_jtag",
-        "//sw/device/tests:rv_dm_ndm_reset_req",
+        "//sw/device/tests:rv_dm_mem_access",
+        "//sw/device/tests:rv_dm_ndm_reset_req_when_cpu_halted",
         "//sw/device/tests:rv_timer_smoketest",
         "//sw/device/tests:rv_timer_systick_test",
         "//sw/device/tests:sensor_ctrl_alert_test",
         "//sw/device/tests:sensor_ctrl_wakeup_test",
-        "//sw/device/tests:sleep_pwm_pulses_test",
+        "//sw/device/tests:sleep_pin_mio_dio_val_test",
+        "//sw/device/tests:sleep_pin_retention_test",
+        "//sw/device/tests:spi_device_flash_smoketest",
+        "//sw/device/tests:spi_device_sleep_test",
         "//sw/device/tests:spi_device_tpm_tx_rx_test",
+        "//sw/device/tests:spi_host_config_test",
+        "//sw/device/tests:spi_host_irq_test",
+        "//sw/device/tests:spi_passthru_test",
+        "//sw/device/tests:sram_ctrl_execution_test",
+        "//sw/device/tests:sram_ctrl_lc_escalation_test",
         "//sw/device/tests:sram_ctrl_memset_test",
         "//sw/device/tests:sram_ctrl_readback_test",
+        "//sw/device/tests:sram_ctrl_scrambled_access_test",
         "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_no_scramble_test",
+        "//sw/device/tests:sram_ctrl_sleep_sram_ret_contents_scramble_test",
         "//sw/device/tests:sram_ctrl_subword_access_test",
+        "//sw/device/tests:sysrst_ctrl_ec_rst_l_test",
+        "//sw/device/tests:sysrst_ctrl_in_irq_test",
+        "//sw/device/tests:sysrst_ctrl_inputs_test",
+        "//sw/device/tests:sysrst_ctrl_outputs_test",
+        "//sw/device/tests:sysrst_ctrl_reset_test",
+        "//sw/device/tests:sysrst_ctrl_ulp_z3_wakeup_test",
+        "//sw/device/tests:uart_baud_rate_test",
+        "//sw/device/tests:uart_loopback_test",
+        "//sw/device/tests:uart_parity_break_test",
+        "//sw/device/tests:usbdev_aon_pullup_test",
+        "//sw/device/tests:usbdev_aon_wake_disconnect_test",
+        "//sw/device/tests:usbdev_aon_wake_reset_test",
+        "//sw/device/tests:usbdev_config_host_test",
+        "//sw/device/tests:usbdev_iso_test",
+        "//sw/device/tests:usbdev_mixed_test",
+        "//sw/device/tests:usbdev_pincfg_test",
+        "//sw/device/tests:usbdev_pullup_test",
+        "//sw/device/tests:usbdev_setuprx_test",
+        "//sw/device/tests:usbdev_stream_test",
+        "//sw/device/tests:usbdev_test",
+        "//sw/device/tests:usbdev_vbus_test",
         "//sw/device/tests/autogen:alert_test",
+        "//sw/device/tests/autogen:plic_all_irqs_test_0",
+        "//sw/device/tests/crypto:aes_functest",
+        "//sw/device/tests/crypto:aes_kwp_sideload_functest",
+        "//sw/device/tests/crypto:aes_sideload_functest",
+        "//sw/device/tests/crypto:ecdh_p256_sideload_functest",
+        "//sw/device/tests/crypto:ecdh_p384_sideload_functest",
+        "//sw/device/tests/crypto:ecdsa_p256_sideload_functest",
+        "//sw/device/tests/crypto:ecdsa_p384_sideload_functest",
+        "//sw/device/tests/crypto:hmac_functest",
+        "//sw/device/tests/crypto:hmac_multistream_functest",
+        "//sw/device/tests/crypto:hmac_sha256_functest",
+        "//sw/device/tests/crypto:hmac_sha384_functest",
+        "//sw/device/tests/crypto:hmac_sha512_functest",
+        "//sw/device/tests/crypto:kmac_functest_hardcoded",
+        "//sw/device/tests/crypto:kmac_sideload_functest_hardcoded",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha256_kat",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha384_kat",
+        "//sw/device/tests/crypto/cryptotest:hmac_sha512_kat",
+        "//sw/device/tests/crypto/cryptotest:kmac_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_256_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_384_kat",
+        "//sw/device/tests/crypto/cryptotest:sha3_512_kat",
+        "//sw/device/tests/crypto/cryptotest:shake128_kat",
+        "//sw/device/tests/crypto/cryptotest:shake256_kat",
+        "//sw/device/tests/pmod:i2c_host_clock_stretching_test",
         "//sw/device/tests/pmod:i2c_host_fram_test",
     ],
 )
 
+test_suite(
+    name = "sv4_tests",
+    tests = [
+        "//third_party/coremark/top_earlgrey:coremark_test",
+    ],
+)
+
 test_suite(
     name = "regression_test_suite",
     tests = [
@@ -156,7 +253,7 @@ test_suite(
         ":sv1_tests",
         ":sv2_tests",
         ":sv3_tests",
-
+        ":sv4_tests",
         # Crypto test suites.
         "//sw/device/tests/crypto:cryptolib_test_suite",
     ],
diff --git a/sw/device/tests/sleep_pin_wake_test.c b/sw/device/tests/sleep_pin_wake_test.c
new file mode 100644
index 0000000000000..f699c68efc5c1
--- /dev/null
+++ b/sw/device/tests/sleep_pin_wake_test.c
@@ -0,0 +1,252 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/mmio.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/flash_ctrl_testutils.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/rand_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ottf_utils.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+#include "sw/device/lib/testing/autogen/isr_testutils.h"
+// Below includes are generated during compile time.
+#include "flash_ctrl_regs.h"
+#include "pinmux_regs.h"
+
+/* We need control flow for the ujson messages exchanged
+ * with the host in OTTF_WAIT_FOR on real devices. */
+OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
+
+// PLIC structures
+static dif_pwrmgr_t pwrmgr;
+static dif_pinmux_t pinmux;
+static dif_rv_plic_t plic;
+static dif_flash_ctrl_state_t flash_ctrl_state;
+
+static const uint32_t kNumDio = 16;  // top_earlgrey has 16 DIOs
+
+// kDirectDio is a list of Dio index that TB cannot control the PAD value.
+// The list should be incremental order (see the code below)
+#define NUM_DIRECT_DIO 5
+static const uint32_t kDirectDio[NUM_DIRECT_DIO] = {6, 12, 13, 14, 15};
+
+static plic_isr_ctx_t plic_ctx = {.rv_plic = &plic,
+                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
+
+static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
+    .pwrmgr = &pwrmgr,
+    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+    .expected_irq = kDifPwrmgrIrqWakeup,
+    .is_only_irq = true};
+
+// Preserve wakeup_detector_selected over multiple resets
+OT_SET_BSS_SECTION(".non_volatile_scratch", uint32_t wakeup_detector_idx;)
+
+OT_SECTION(".data") int8_t sival_mio_pad = -1;  // -1 means not assigned yet.
+OT_SECTION(".data")
+int8_t sival_wakeup_detector_idx = -1;  // -1 means not assigned yet.
+OT_SECTION(".data") bool sival_ready_to_sleep = 0;
+
+/**
+ * External interrupt handler.
+ */
+void ottf_external_isr(uint32_t *exc_info) {
+  dif_pwrmgr_irq_t irq_id;
+  top_earlgrey_plic_peripheral_t peripheral;
+
+  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+
+  // Check that both the peripheral and the irq id is correct
+  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
+        "IRQ peripheral: %d is incorrect", peripheral);
+  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+}
+
+bool test_main(void) {
+  dif_pinmux_wakeup_config_t wakeup_cfg;
+
+  // Default Deep Power Down
+  dif_pwrmgr_domain_config_t pwrmgr_domain_cfg = 0;
+
+  // Enable global and external IRQ at Ibex.
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  // Initialize power manager
+  CHECK_DIF_OK(dif_pwrmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
+  CHECK_DIF_OK(dif_rv_plic_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &plic));
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  CHECK_DIF_OK(dif_flash_ctrl_init_state(
+      &flash_ctrl_state,
+      mmio_region_from_addr(TOP_EARLGREY_FLASH_CTRL_CORE_BASE_ADDR)));
+
+  if (kDeviceType == kDeviceSimDV) {
+    // Enable access to flash for storing info across resets.
+    CHECK_STATUS_OK(
+        flash_ctrl_testutils_default_region_access(&flash_ctrl_state,
+                                                   /*rd_en*/ true,
+                                                   /*prog_en*/ true,
+                                                   /*erase_en*/ true,
+                                                   /*scramble_en*/ false,
+                                                   /*ecc_en*/ false,
+                                                   /*he_en*/ false));
+  }
+
+  // Randomly pick one of the wakeup detectors
+  // only after the first boot.
+  dif_pinmux_index_t wakeup_detector_selected = 0;
+
+  if (UNWRAP(pwrmgr_testutils_is_wakeup_reason(&pwrmgr, 0)) == true) {
+    LOG_INFO("Test in POR phase");
+
+    // After randomly generated wake detector index,
+    // store to non volatile area to preserve from the reset event.
+    wakeup_detector_selected =
+        rand_testutils_gen32_range(0, PINMUX_PARAM_N_WKUP_DETECT - 1);
+    if (kDeviceType == kDeviceSimDV) {
+      CHECK_STATUS_OK(flash_ctrl_testutils_write(
+          &flash_ctrl_state,
+          (uint32_t)(&wakeup_detector_idx) -
+              TOP_EARLGREY_FLASH_CTRL_MEM_BASE_ADDR,
+          0, &wakeup_detector_selected, kDifFlashCtrlPartitionTypeData, 1));
+    }
+    LOG_INFO("detector %d is selected", wakeup_detector_selected);
+    // TODO(lowrisc/opentitan#15889): The weak pull on IOC3 needs to be
+    // disabled for this test. Remove this later.
+    dif_pinmux_pad_attr_t out_attr;
+    dif_pinmux_pad_attr_t in_attr = {0};
+    CHECK_DIF_OK(dif_pinmux_pad_write_attrs(&pinmux, kTopEarlgreyMuxedPadsIoc3,
+                                            kDifPinmuxPadKindMio, in_attr,
+                                            &out_attr));
+
+    // This print is placed here on purpose.
+    // sv sequence is waiting for this print log followed by
+    // Pad Section. So do not put any other print between
+    // this LOG_INFO and LOG_INFO("Pad Selection");
+    LOG_INFO("pinmux_init end");
+    // Random choose low power or deep powerdown
+    uint32_t deep_powerdown_en = rand_testutils_gen32_range(0, 1);
+
+    // Prepare which PAD SW want to select. In SiVal we only test the MIO pads,
+    // as the DIO ones are generally not testable with our setup.
+    uint32_t mio0_dio1 =
+        (kDeviceType == kDeviceSimDV) ? rand_testutils_gen32_range(0, 1) : 0;
+    uint32_t pad_sel = 0;
+
+    // Enable AonWakeup Interrupt if normal sleep
+    if (deep_powerdown_en == 0) {
+      // Enable all the AON interrupts used in this test.
+      rv_plic_testutils_irq_range_enable(&plic, kTopEarlgreyPlicTargetIbex0,
+                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+                                         kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
+      // Enable pwrmgr interrupt
+      CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
+    }
+
+    // SpiDev CLK(idx 12), CS#(idx 13), D0(idx 6) and SpiHost CLK (14), CS#
+    // (15) are directly connected to the SPI IF. Cannot control them. Roll 3
+    // less and compensated later.
+    if (mio0_dio1) {
+      // DIO
+      pad_sel = rand_testutils_gen32_range(0, kNumDio - 1 - NUM_DIRECT_DIO);
+
+      for (int i = 0; i < NUM_DIRECT_DIO; i++) {
+        if (pad_sel >= kDirectDio[i]) {
+          pad_sel++;
+        }
+      }
+      LOG_INFO("Pad Selection: %d / %d", mio0_dio1, pad_sel);
+    } else {
+      // MIO: 0, 1 are tie-0, tie-1
+      if (kDeviceType == kDeviceSimDV) {
+        pad_sel = rand_testutils_gen32_range(2, kTopEarlgreyPinmuxInselLast);
+      } else {
+        OTTF_WAIT_FOR(sival_mio_pad != -1, 1000000);
+        pad_sel = (uint32_t)sival_mio_pad + 2;  // skip 0, 1 (see above)
+      }
+
+      LOG_INFO("Pad Selection: %d / %d", mio0_dio1, pad_sel - 2);
+    }
+
+    if (mio0_dio1 == 0) {
+      // TODO: Check if the PAD is locked (kDifPinmuxLockTargetOutsel), then
+      // skip if locked.
+      // Turn off Pinmux output selection
+      CHECK_DIF_OK(dif_pinmux_output_select(
+          &pinmux, pad_sel - 2, kTopEarlgreyPinmuxOutselConstantHighZ));
+    }
+
+    wakeup_cfg.mode = kDifPinmuxWakeupModePositiveEdge;
+    wakeup_cfg.signal_filter = false;
+    wakeup_cfg.pad_type = mio0_dio1;
+    wakeup_cfg.pad_select = pad_sel;
+
+    // TODO: A better test would be to program ALL wakeup detectors with
+    // randomly chosen pin wakeup sources and prove the right wakeup source
+    // woke up the chip from sleep.
+    CHECK_DIF_OK(dif_pinmux_wakeup_detector_enable(
+        &pinmux, wakeup_detector_selected, wakeup_cfg));
+
+    if (deep_powerdown_en == 0) {
+      pwrmgr_domain_cfg = kDifPwrmgrDomainOptionMainPowerInLowPower |
+                          kDifPwrmgrDomainOptionUsbClockInActivePower;
+    }
+
+    if (kDeviceType != kDeviceSimDV) {
+      OTTF_WAIT_FOR(sival_ready_to_sleep != 0, 1000000);
+    }
+
+    // Enter low power
+    CHECK_STATUS_OK(pwrmgr_testutils_enable_low_power(
+        &pwrmgr, kDifPwrmgrWakeupRequestSourceThree, pwrmgr_domain_cfg));
+
+    LOG_INFO("Entering low power mode.");
+    wait_for_interrupt();
+  }
+
+  if (UNWRAP(pwrmgr_testutils_is_wakeup_reason(
+          &pwrmgr, kDifPwrmgrWakeupRequestSourceThree)) == true) {
+    LOG_INFO("Test in post-sleep pin wakeup phase");
+    uint32_t wakeup_cause;
+    CHECK_DIF_OK(dif_pinmux_wakeup_cause_get(&pinmux, &wakeup_cause));
+    // Get the wakeup dectector index from stored variable.
+    if (kDeviceType == kDeviceSimDV) {
+      wakeup_detector_selected = wakeup_detector_idx;
+    } else {
+      OTTF_WAIT_FOR(sival_wakeup_detector_idx != -1, 1000000);
+      wakeup_detector_selected = (uint32_t)sival_wakeup_detector_idx;
+    }
+
+    LOG_INFO("wakeup_cause: %x %d %d", wakeup_cause,
+             1 << wakeup_detector_selected, wakeup_detector_selected);
+    CHECK(wakeup_cause == 1 << wakeup_detector_selected);
+    CHECK_DIF_OK(
+        dif_pinmux_wakeup_detector_disable(&pinmux, wakeup_detector_selected));
+    return true;
+
+  } else {
+    // Other wakeup. This is a failure.
+    dif_pwrmgr_wakeup_reason_t wakeup_reason;
+    CHECK_DIF_OK(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
+    LOG_ERROR("Unexpected wakeup detected: type = %d, request_source = %d",
+              wakeup_reason.types, wakeup_reason.request_sources);
+    return false;
+  }
+
+  return false;
+}
+
+#undef NUM_DIRECT_DIO
+#undef NUM_LOCKED_MIO
diff --git a/sw/device/tests/spi_device_flash_smoketest.c b/sw/device/tests/spi_device_flash_smoketest.c
index ce09bbd57aafe..b753f8c59615a 100644
--- a/sw/device/tests/spi_device_flash_smoketest.c
+++ b/sw/device/tests/spi_device_flash_smoketest.c
@@ -152,13 +152,15 @@ bool test_main(void) {
       &spid, kDifSpiDeviceFlashBufferTypeEFlash, 0, ARRAYSIZE(kSpiTxData),
       kSpiTxData));
 
-  LOG_INFO("Waiting for read");
+  LOG_INFO("SYNC: Waiting for read");
   CHECK_DIF_OK(dif_spi_device_set_flash_status_registers(&spid, 0x00));
 
   busy_spin_micros(500000);
   uint32_t address;
   CHECK_DIF_OK(dif_spi_device_get_last_read_address(&spid, &address));
-  CHECK(address == (kSpiDeviceFlashAddress + kSpiDeviceDatasetSize - 1));
+  CHECK(address == (kSpiDeviceFlashAddress + kSpiDeviceDatasetSize - 1),
+        "address != expected (0x%08x != 0x%08x)", address,
+        kSpiDeviceFlashAddress + kSpiDeviceDatasetSize - 1);
 
   return true;
 }
diff --git a/sw/device/tests/spi_device_ottf_console_test.c b/sw/device/tests/spi_device_ottf_console_test.c
new file mode 100644
index 0000000000000..3833832ee85ad
--- /dev/null
+++ b/sw/device/tests/spi_device_ottf_console_test.c
@@ -0,0 +1,160 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/dif/dif_spi_device.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_console.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false, );
+
+static const char kTestStr[] = "This is a SPI device OTTF console test.";
+static const char kTest64bDataStr[] =
+    "940A859A712AC746E1290824993C8C3F1F42E4C282625BD97505B318B7018EA9";
+static const char kTest256bDataStr[] =
+    "E91258D174A16ADB6E516D494FDBAC5D09AE7E674F7CA413ACC7F429389275A52437E3EAA4"
+    "3A7C923659D9F7568CA777FE84EBF7178DBEC876A02B93C283DDCCAC9FFA34A8A069110E57"
+    "81E2755946689DBE4E8EB168F5974BA140646DDD391BAB6EF3D18F174356FC74789363080E"
+    "2DC7616744DA5AC3735E33895E061745A9";
+static const char kTest1KbDataStr[] =
+    "2A2AFF29DE2892AEC5938694E773D801C1F354E9A94CCDF06CBCDED749EE1AA006CB04E3F3"
+    "FFC441DBC0525C7968B5960C9740A1253E128886C9B4FE5AAD064F9D602B975CD48380B8D1"
+    "C1873BC83D7141993F438609709240B3B36C248CA2EB342E05DDAE72F60F8ED2C938C266B5"
+    "6AC1DC38F5EEFDD15D2334924FEC8FA87013C4715E9581C51B71159CA998A9F8E689E1B8D8"
+    "2189914B6F0CA8C44AD3C5B6E306B4357E138DF6D76D802D62D9DF69F3351C97160C9A02AC"
+    "00D114CD6E5A04A8EB41A244793D3A43E44FDF214E98BB64BC6F3E163E5CEA7E600577DA91"
+    "40B6C03F827AD525F68781A1928995D1F23EAFC0CC8C72BD9F15A65E6D9294C54E2347BEF5"
+    "3F0C727F3094D79E62B5C786FB8E380F6A3ABDB5165868ABA16E259E99234935F33CE1DFC3"
+    "82B25A5B85CD946A99681D2FA95A4C7C9A33003ACD3F1B425AED858279FFECA1567C290E5B"
+    "6474D5DCA7AC080F61D30D0DFC79D660AD51A499479F2CF16381AA012A892D97CD7AE56A7A"
+    "3D4D5590E93B9496A718B31105D97B6B10F1742059693A99B88F0D59DAC2BDF12439D9E0F6"
+    "3B2AFD642D4DBC17E2740D1E2C4195AC232FAAE7889695A24939C6D4D9A783F62E3A865A1C"
+    "15233E06BD550B59D63603A880FE1A8BADD485F8A46E458A21671CD129C2B7565AC66EAF44"
+    "DFBAED16FB4651C7C8AB4ADDAEB38346DA34E31B843FA087DC943A2DF353F9";
+static const char kTest4KbDataStr[] =
+    "7DFE2CE348C0FEDAA45BCBA3567B69B4F33E8E6E980A1242FDBE3150BACC15783D9F39F9D3"
+    "6C98837A9EF05B1F24DB6460B73A90BD120D677AA12E1B5C1056D5B4A345D20CAA77B14D26"
+    "FAB6BEE7C3136BFC3501AF94114E3E8AF2C94495BE2F1951B379B101E0C7CF3E29BCE4311D"
+    "F85414B555C7C06654D5879876C004D258F422DF382FB064C843CBE9C90D35510E96E6E77B"
+    "30FCF260559D5D535A73525BCACB3C295291F25F0C5C608D0CA0E5630AE8F26420AF3A4DB4"
+    "7CDCA659A4CD09928DDAB796AB217FC5EEFE058D89CF3CC1CC19CC5CA31A5573966EABB05C"
+    "2A3157F875A4717D7FE863F5E8EE338EADC2640CBD0671CB029764C9B8BE713E0BF93039F4"
+    "3FD7BBB8DEFECEAD60126359E7A59E49A456C9C97C3E175C158AFC0DD806A4383B750A5B73"
+    "B4DD1A60D7666F7B6BE0F85652CB726396F02382151CB05FE181910E765534CA17D8A5EF50"
+    "7B883DD7430FAEF0029E664D7692FD2729F8CB8A002D7CB7EBBE2BD02FDB727959C9565150"
+    "24CDBE1ADA3CA9466250F2F57ACA599692763B530BDB7DD1448FA5C5E42EA3E7D47CDF30D9"
+    "AB3B90AB04C3057A0D87B3C695585A22FF2CEC1AD62C15CC6078B35F838A14EE9AA41191B1"
+    "A149BE9F0FBBCD803AE2369E47B4BC64B5980B3B29C8E7DAC5DA4DC31F1384591B6EC0598F"
+    "241E0FF539A1C63C3FD3F7BF5092C87C6452D0DF93B2CB5C60B6ED1582D42C46402340F59C"
+    "D338946220CA6C5AD9577C216501DBCA53794FDF9B80A45A063D2D9E78CD6C795673AFC149"
+    "685ACA6938062EFAF6435D8425141405FDBCA27EA6A8D23ED90E2475C4987B25DCE41FCDF3"
+    "37672B9D7E9429B0827AE7223CDEABCDEFEC8C8568F4DF0C582D3A3B92C19485DED796F6B3"
+    "E54424ED3D46F12E7620A8A9FBDE8432292B0F7F23F40407A4C38E06991B6146008AC6DA07"
+    "194243BDF3F1966F1D126ED3570616BC03386CAC32FF4FC653C3F29C243F181E87AFA70FC1"
+    "5499E95D678BBF15192A06793D952EAE54E3E1A414992237BD6F5594288A57BF3B1C255D1C"
+    "6B3A26173BFBDBB622487ABE7A69EA308A7891E9FE6EA8C91C6189FB4E1C33798C4BD2B3B0"
+    "6B2B254BDC59B8BDBDB127C28630634374E9C0EBA8F2706B9527120A412F2485B0AAEDA3A5"
+    "2BB8013854E6FF2E36BA3F5C8951036B5198DAA549C9AC72897661C31BC887658C98698BB9"
+    "6473FA227C65E010D3EF9E146B5AF5C0DEC6A07AB99F6F29304718E3893FF0DC33B68530A1"
+    "3BACDC7782EB462CD8E6542843FB043FD95A36609A5FF1915AB309107BC9B26321A4D12A2F"
+    "023EEF0ADFE901B7B1E38C9F288830407CDC4AD4BAAB2F0B4598E7CA47EA1EFA7270340A24"
+    "064ED47697AEC4C15AAE7EF0862819375E7937AD366FAF069367A044B2AD73ED9ED3ED6213"
+    "7F6158ADC543FB223D7F3C7C0668D4E22C09641EA9AFF2CA99A1A9515098C68287C9C55B52"
+    "5C41A04BFE96E835E0B059712CBE57CE6F48DCF56F8FB8497E694CA0654DD3AB7BCB29FDA0"
+    "1952A5CA81964D902744A2652A0D5F878EFC84EA233B6FFEEB6F65DBA1FC0CABFC4F317FA8"
+    "C6A2AD89B1FA47E04C9423F3AC4DA988D56EC5FD6ACDC5FDB030DA6194DFB31A34567ADF1A"
+    "B570A2C96AF0B8CC1BCE3120C6629D3C722515CB503E2D5A57DB546169D6CB24A937AEAF12"
+    "DFA2CA55C8D2D952BC3C306901A74A1998465739FABF55F5465481177835D646BD957669E8"
+    "6B828A1CC8432F54F67063ED9EF75C54D77F73D78009C10FA230A71A601BA7964B9106A765"
+    "CFFF95108B392672874E85D9CD16383345468095333B996EDEC80F9089DF422112C9596A37"
+    "BC426B7B134DB5D0116D71E07F552257D8F9706D504D2891E811F11A851092C26059525539"
+    "08682BEDB6E989C2C6BCD08BA56ACABA4E64836F55D399976791067C7DFF083CCA6EA0AB29"
+    "D8B4220D8EA09CD62F68A25F66B218C064E9E6125D8D1F8D02445BC3D70CD6F97322384361"
+    "682E0B68ACBBE6522E9DFC5390C5244678C65A1D7D8512D0B964AA04748C586EAB35AEDDAE"
+    "BC69350DDB6695353819D927B3C699305C4B93A42D1E848692FB240B4BD67CB53FDA99938B"
+    "6B570F28DF6F32FABF95D5765BA833ECB424AE82EAF2C7C27E7294169DDD5B9F6753B80798"
+    "6A0B68C93A20ACDB8D6F06C00E4B4292717BF3F9997BF653C347FDFBC5FCA166AAD2535DB1"
+    "94006A3BC7B7B6BA16848326CE291E9DCA6BACB152956049619759B694FF709D215A209F28"
+    "91B085D91868C614B57E5469A918424B5124AD9FD5085DC7EA438CF0BB805DEE55A6946E49"
+    "0322C79816A3524F13B8175320E2CDFCE7BD2FBE611C85344784575EB6B3C07C4E72DD4248"
+    "A421D4012BEB80BE8D86A29A5BFBF0A81B8CE9FB4B5C17577406F7A30B9A68A67B2C044D5D"
+    "0BF5D819CD3198768022F784F1ED51E52DA691371CB545D0CAF25F8FCDF48CE855CC232E1D"
+    "5F931DEB92F787E11F1C6FC25530B39824499E7A0774982A105FC952999DA0B3E79E3815DA"
+    "CC6C7993DF8562F939F92DA1E3A2D538ADE55A534C11FA5B41983E536B3ECA2439160F49EE"
+    "2638220E062BAA4C47708C7B9337DB5CF79EB2F9244B7F4D1A10168F7DBC6120AEDC45A53D"
+    "A74C03244D7F30D211CD3153BE672A105AA8F301D2AA6179525E4C743DCC4C4764FB369063"
+    "76F30800A18A07BC8FD17B800455B0B79D488C1B067958DB0B98E8A1203A3498382016A93D"
+    "65C5D6B6F064931E0F96AF346EF447BC0BB1E33B160A145491C321934DB544813EA041EB66"
+    "B30518D571FDD6D38E0477F6CB83C7729A45494F5D7805CCC1432C816B7D8CB089CEA56216"
+    "9489E4F80E70FA685F39E1CD0AD7AD703C2E9601D442004F3D4CE043F0E84007FB7438FE82"
+    "DF4D9304C90B48BB25762DD29D";
+
+static uint8_t input_buf[5120];
+
+bool test_main(void) {
+  LOG_INFO("Sending empty string to Host...");
+  LOG_INFO("");
+  LOG_INFO("Sending test string to Host...");
+  LOG_INFO("%s", kTestStr);
+  LOG_INFO("SYNC: Waiting for console data");
+  size_t received_data_len = ottf_console_spi_device_read(
+      ottf_console_get(), sizeof(input_buf), input_buf);
+  CHECK(received_data_len == sizeof(kTestStr));
+  CHECK_ARRAYS_EQ(input_buf, kTestStr, ARRAYSIZE(kTestStr));
+
+  LOG_INFO("Sending 64B data to Host...");
+  LOG_INFO("%s", kTest64bDataStr);
+  LOG_INFO("SYNC: Waiting for console data");
+  received_data_len = ottf_console_spi_device_read(
+      ottf_console_get(), sizeof(input_buf), input_buf);
+  CHECK(received_data_len == sizeof(kTest64bDataStr));
+  CHECK_ARRAYS_EQ(input_buf, kTest64bDataStr, ARRAYSIZE(kTest64bDataStr));
+
+  LOG_INFO("Sending 256B data to Host...");
+  LOG_INFO("%s", kTest256bDataStr);
+  LOG_INFO("SYNC: Waiting for console data");
+  received_data_len = ottf_console_spi_device_read(
+      ottf_console_get(), sizeof(input_buf), input_buf);
+  CHECK(received_data_len == sizeof(kTest256bDataStr));
+  CHECK_ARRAYS_EQ(input_buf, kTest256bDataStr, ARRAYSIZE(kTest256bDataStr));
+
+  LOG_INFO("Sending 1KB data to Host...");
+  for (int i = 1; i <= 2; i++) {
+    LOG_INFO("Round: %d", i);
+    LOG_INFO("%s", kTest1KbDataStr);
+    LOG_INFO("SYNC: Waiting for console data");
+    received_data_len = ottf_console_spi_device_read(
+        ottf_console_get(), sizeof(input_buf), input_buf);
+    CHECK(received_data_len == sizeof(kTest1KbDataStr));
+    CHECK_ARRAYS_EQ(input_buf, kTest1KbDataStr, ARRAYSIZE(kTest1KbDataStr));
+  }
+
+  LOG_INFO("Sending 4KB data to Host...");
+  LOG_INFO("%s", kTest4KbDataStr);
+  LOG_INFO("SYNC: Waiting for console data");
+  received_data_len = ottf_console_spi_device_read(
+      ottf_console_get(), sizeof(input_buf), input_buf);
+  CHECK(received_data_len == sizeof(kTest4KbDataStr));
+  CHECK_ARRAYS_EQ(input_buf, kTest4KbDataStr, ARRAYSIZE(kTest4KbDataStr));
+
+  // Verify that reading data byte-by-byte using `ottf_console_getc` matches the
+  // expected output. This function is crucial in the UJSON OTTF console data
+  // pipeline.
+  memset(&input_buf, 0, sizeof(input_buf));
+  LOG_INFO("SYNC: Waiting for console data");
+  for (int i = 0; i < sizeof(kTest4KbDataStr); i++) {
+    status_t s = ottf_console_getc(ottf_console_get());
+    CHECK_STATUS_OK(s);
+    input_buf[i] = (uint8_t)s.value;
+  }
+  CHECK_ARRAYS_EQ(input_buf, kTest4KbDataStr, ARRAYSIZE(kTest4KbDataStr));
+
+  return true;
+}
diff --git a/sw/device/tests/spi_device_tpm_tx_rx_test.c b/sw/device/tests/spi_device_tpm_tx_rx_test.c
index 440dd74b718b0..2cdc01a54b294 100644
--- a/sw/device/tests/spi_device_tpm_tx_rx_test.c
+++ b/sw/device/tests/spi_device_tpm_tx_rx_test.c
@@ -11,6 +11,7 @@
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/irq.h"
 #include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 #include "sw/device/lib/testing/test_framework/status.h"
@@ -155,6 +156,9 @@ bool test_main(void) {
                                             &out_attr));
   }
 
+  // Configure fast slew rate and strong drive strength for SPI device pads.
+  CHECK_STATUS_OK(spi_device_testutils_configure_pad_attrs(&pinmux));
+
   CHECK_DIF_OK(
       dif_spi_device_tpm_configure(&spi_device, kDifToggleEnabled, kTpmConfig));
 
diff --git a/sw/device/tests/spi_device_ujson_console_test.c b/sw/device/tests/spi_device_ujson_console_test.c
new file mode 100644
index 0000000000000..8ac7cab6849a0
--- /dev/null
+++ b/sw/device/tests/spi_device_ujson_console_test.c
@@ -0,0 +1,76 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/json/command.h"
+#include "sw/device/lib/testing/json/mem.h"
+#include "sw/device/lib/testing/json/provisioning_data.h"
+#include "sw/device/lib/testing/spi_device_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf.h"
+#include "sw/device/lib/testing/test_framework/ujson_ottf_commands.h"
+#include "sw/device/lib/ujson/ujson.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
+
+/**
+ * Tests SPI device integration with the ujson OTTF console.
+ *
+ * This test verifies the ability to send and receive personalized
+ * blob ujson structs and mem commands/payloads between the host
+ * and the SPI device using the OTTF console.
+ */
+
+OTTF_DEFINE_TEST_CONFIG(.console.type = kOttfConsoleSpiDevice,
+                        .console.base_addr = TOP_EARLGREY_SPI_DEVICE_BASE_ADDR,
+                        .console.test_may_clobber = false, );
+
+volatile uint8_t kTestBytes[256];
+volatile uint32_t kTestWord;
+volatile uint32_t kEndTest;
+static perso_blob_t perso_blob_to_host;
+static perso_blob_t perso_blob_from_host;
+
+status_t command_processor(ujson_t *uj) {
+  while (!kEndTest) {
+    test_command_t command;
+    TRY(UJSON_WITH_CRC(ujson_deserialize_test_command_t, uj, &command));
+    status_t status = ujson_ottf_dispatch(uj, command);
+    if (status_err(status) == kUnimplemented) {
+      RESP_ERR(uj, status);
+    } else if (status_err(status) != kOk) {
+      return status;
+    }
+  }
+  return OK_STATUS();
+}
+
+status_t perso_blob_transaction_test(ujson_t *uj) {
+  LOG_INFO("SYNC: Sending perso blob");
+  TRY(RESP_OK(ujson_serialize_perso_blob_t, uj, &perso_blob_to_host));
+  memset(&perso_blob_from_host, 0xa5, sizeof(perso_blob_from_host));
+  LOG_INFO("SYNC: Waiting for perso blob");
+  TRY(ujson_deserialize_perso_blob_t(uj, &perso_blob_from_host));
+  CHECK_ARRAYS_EQ((uint8_t *)&perso_blob_to_host,
+                  (uint8_t *)&perso_blob_from_host,
+                  sizeof(perso_blob_from_host));
+  return OK_STATUS();
+}
+
+bool test_main(void) {
+  kEndTest = 0;
+  kTestWord = 0xface1234u;
+  for (size_t i = 0; i < 256; ++i) {
+    kTestBytes[i] = (uint8_t)i;
+  }
+  ujson_t uj = ujson_ottf_console();
+
+  status_t result = OK_STATUS();
+  EXECUTE_TEST(result, perso_blob_transaction_test, &uj);
+  EXECUTE_TEST(result, command_processor, &uj);
+
+  return status_ok(result);
+}
diff --git a/sw/device/tests/spi_host_irq_test.c b/sw/device/tests/spi_host_irq_test.c
index dbf215fa542cc..393f5fae80dde 100644
--- a/sw/device/tests/spi_host_irq_test.c
+++ b/sw/device/tests/spi_host_irq_test.c
@@ -371,12 +371,19 @@ static status_t test_init(void) {
   base_addr = mmio_region_from_addr(TOP_EARLGREY_SPI_HOST0_BASE_ADDR);
   TRY(dif_spi_host_init(base_addr, &spi_host));
 
+  uint32_t spi_clock_freq_hz = 1000000;
+  if (kDeviceType == kDeviceSimVerilator) {
+    // On verilator, we reduce the spi clock frequency by a factor of 10
+    // as otherwise we get errors in the SPI host configuration due to
+    // the low high speed peripheral frequency (500 KHz).
+    spi_clock_freq_hz = 100000;
+  }
   CHECK(kClockFreqHiSpeedPeripheralHz <= UINT32_MAX,
         "kClockFreqHiSpeedPeripheralHz must fit in uint32_t");
   TRY(dif_spi_host_configure(
       &spi_host,
       (dif_spi_host_config_t){
-          .spi_clock = 1000000,
+          .spi_clock = spi_clock_freq_hz,
           .peripheral_clock_freq_hz = (uint32_t)kClockFreqHiSpeedPeripheralHz,
           .rx_watermark = kRxWatermark,
           .tx_watermark = kTxWatermark,
diff --git a/sw/device/tests/spi_host_winbond_flash_test.c b/sw/device/tests/spi_host_winbond_flash_test.c
index 018ad4d9b82a7..f73b89470ad25 100644
--- a/sw/device/tests/spi_host_winbond_flash_test.c
+++ b/sw/device/tests/spi_host_winbond_flash_test.c
@@ -32,7 +32,12 @@ bool test_main(void) {
 
   uint32_t spi_speed = 10000000;  // 10MHz
   if (kDeviceType == kDeviceSilicon) {
-    spi_speed = 16000000;  // 16MHz
+    // On Earlgrey, Silicon's SPI core clock is 96 MHz, meaning the max SCK
+    // rate is 48 MHz. The speed is set via a divider, meaning the largest
+    // possible configurations are 12, 16, 24 and 48 MHz. By adding a small CS
+    // idle time we can support 24 MHz reliably, but 48 MHz likely requires a
+    // specialized interconnect with low capacitance.
+    spi_speed = 24000000;  // 24MHz
 
     dif_pinmux_t pinmux;
     mmio_region_t base_addr =
@@ -63,6 +68,10 @@ bool test_main(void) {
                                  .spi_clock = spi_speed,
                                  .peripheral_clock_freq_hz =
                                      (uint32_t)kClockFreqHiSpeedPeripheralHz,
+                                 .chip_select =
+                                     {
+                                         .idle = 1,
+                                     },
                              }),
       "SPI_HOST config failed!");
   CHECK_DIF_OK(dif_spi_host_output_set_enabled(&spi_host, true));
diff --git a/sw/device/tests/sram_ctrl_scrambled_access_test.c b/sw/device/tests/sram_ctrl_scrambled_access_test.c
index d23c870ee798a..fd94fe8fbbe5d 100644
--- a/sw/device/tests/sram_ctrl_scrambled_access_test.c
+++ b/sw/device/tests/sram_ctrl_scrambled_access_test.c
@@ -16,6 +16,7 @@
 #include "sw/device/lib/testing/rstmgr_testutils.h"
 #include "sw/device/lib/testing/sram_ctrl_testutils.h"
 #include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_alerts.h"
 #include "sw/device/lib/testing/test_framework/ottf_main.h"
 
 #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"
@@ -126,6 +127,26 @@ static const uint32_t kRamTestPattern2[kTestBufferSizeWords] = {
  */
 static const uint8_t kBackdoorExpectedBytes[kTestBufferSizeBytes];
 
+// This is not done on CW305/CW310 FPGAs because interrupts for ECC errors are
+// only triggered when the SecureIbex parameter is enabled. This parameter is
+// disabled for these boards due to resource constraints. On CW340 and the other
+// targets, this parameter is enabled.
+static bool expect_ecc_errors(void) {
+  switch (kDeviceType) {
+    case kDeviceFpgaCw305:
+    case kDeviceFpgaCw310:
+      return false;
+    case kDeviceFpgaCw340:
+    case kDeviceSilicon:
+    case kDeviceSimDV:
+    case kDeviceSimVerilator:
+      return true;
+    default:
+      CHECK(false, "Device type not handled: %d", kDeviceType);
+      return false;
+  }
+}
+
 /**
  * Performs scrambling, saves the test relevant data and resets the system.
  *
@@ -148,6 +169,14 @@ static noreturn void main_sram_scramble(void) {
     copy_len += sizeof(reference_frame->backdoor);
   }
 
+  // If we expect ECC errors from copying our pattern buffers then we have to
+  // disable the fatal alert associated with bus integrity checks. This is a
+  // fatal alert so we cannot "expect" it.
+  if (expect_ecc_errors()) {
+    CHECK_STATUS_OK(
+        ottf_alerts_ignore_alert(kTopEarlgreyAlertIdRvCoreIbexFatalHwErr));
+  }
+
   asm volatile(
       // Save the tests frames addresses before the scrambling.
       "lw a2, 0(%[mainFrame])                                        \n"
@@ -256,6 +285,17 @@ static void execute_main_sram_test(void) {
 }
 
 static void check_sram_data(scramble_test_frame *mem_frame) {
+  // Decide whether to perform ECC error count checks after memory is scrambled.
+  bool check_ecc_errors = expect_ecc_errors();
+
+  // If we expect ECC errors from copying our pattern buffers then we have to
+  // disable the fatal alert associated with bus integrity checks. This is a
+  // fatal alert so we cannot "expect" it.
+  if (check_ecc_errors) {
+    CHECK_STATUS_OK(
+        ottf_alerts_ignore_alert(kTopEarlgreyAlertIdRvCoreIbexFatalHwErr));
+  }
+
   LOG_INFO("Checking addr 0x%x", mem_frame->pattern);
   uint32_t tmp_buffer[kTestBufferSizeWords];
   memcpy(tmp_buffer, (const uint8_t *)mem_frame->pattern, sizeof(tmp_buffer));
@@ -265,28 +305,6 @@ static void check_sram_data(scramble_test_frame *mem_frame) {
   CHECK_ARRAYS_NE((uint32_t *)tmp_buffer, kRamTestPattern2,
                   kTestBufferSizeWords);
 
-  // Decide whether to perform ECC error count checks after memory is scrambled.
-  //
-  // This is not done on FPGAs because the interrupt handler that counts them
-  // does not currently trigger on our FPGA platforms.
-  // See #20119 for more details.
-  bool check_ecc_errors = false;
-  switch (kDeviceType) {
-    case kDeviceFpgaCw305:
-    case kDeviceFpgaCw310:
-    case kDeviceFpgaCw340:
-      check_ecc_errors = false;
-      break;
-    case kDeviceSilicon:
-    case kDeviceSimDV:
-    case kDeviceSimVerilator:
-      check_ecc_errors = true;
-      break;
-    default:
-      CHECK(false, "Device type not handled: %d", kDeviceType);
-      return;
-  }
-
   if (check_ecc_errors) {
     LOG_INFO("Checking ECC error count of %d",
              reference_frame->ecc_error_counter);
diff --git a/sw/device/tests/uart_baud_rate_test.c b/sw/device/tests/uart_baud_rate_test.c
index b618eaf4f975a..884a3c5527c16 100644
--- a/sw/device/tests/uart_baud_rate_test.c
+++ b/sw/device/tests/uart_baud_rate_test.c
@@ -24,16 +24,13 @@ static const uint32_t kBaseAddrs[4] = {
     TOP_EARLGREY_UART2_BASE_ADDR,
     TOP_EARLGREY_UART3_BASE_ADDR,
 };
-static uint32_t kBauds[7] = {
-    9600, 115200, 230400, 128000, 256000, 1000000, 1500000,
-};
+static const uint32_t kBauds[11] = {
+    4800, 9600, 19200, 38400, 57600, 115200, 230400, 128000, 256000, 1000000,
+    // This baud rate will only work on silicon, the FPGA cannot go fast enough:
+    1500000};
 
 enum {
   kTestTimeoutMillis = 500000,
-  // Number of Bauds to test from `kBauds`.
-  kBaudCountSilicon = 7,
-  // The two highest Bauds won't work at the clock speed we run the FPGAs at.
-  kBaudCountFpga = 5,
 };
 
 typedef enum test_phase {
@@ -58,24 +55,24 @@ OTTF_DEFINE_TEST_CONFIG(.enable_uart_flow_control = true);
 static status_t test_uart_baud(void) {
   test_phase = kTestPhaseCfg;
 
-  CHECK_DIF_OK(dif_uart_configure(
-      &uart, (dif_uart_config_t){
-                 .baudrate = (uint32_t)baud_rate,
-                 .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
-                 .parity_enable = kDifToggleDisabled,
-                 .parity = kDifUartParityEven,
-                 .tx_enable = kDifToggleEnabled,
-                 .rx_enable = kDifToggleEnabled,
-             }));
+  TRY(dif_uart_configure(&uart,
+                         (dif_uart_config_t){
+                             .baudrate = (uint32_t)baud_rate,
+                             .clk_freq_hz = (uint32_t)kClockFreqPeripheralHz,
+                             .parity_enable = kDifToggleDisabled,
+                             .parity = kDifUartParityEven,
+                             .tx_enable = kDifToggleEnabled,
+                             .rx_enable = kDifToggleEnabled,
+                         }));
 
-  CHECK_DIF_OK(dif_uart_fifo_reset(&uart, kDifUartDatapathAll));
+  TRY(dif_uart_fifo_reset(&uart, kDifUartDatapathAll));
 
   LOG_INFO("Configured UART%d with Baud rate %d", uart_idx, baud_rate);
 
   OTTF_WAIT_FOR(test_phase == kTestPhaseSend, kTestTimeoutMillis);
 
   LOG_INFO("Sending data...");
-  CHECK_DIF_OK(dif_uart_bytes_send(&uart, kSendData, sizeof(kSendData), NULL));
+  TRY(dif_uart_bytes_send(&uart, kSendData, sizeof(kSendData), NULL));
   LOG_INFO("Data sent");
 
   OTTF_WAIT_FOR(test_phase == kTestPhaseRecv, kTestTimeoutMillis);
@@ -83,9 +80,9 @@ static status_t test_uart_baud(void) {
   LOG_INFO("Receiving data...");
   uint8_t data[sizeof(kSendData)] = {0};
   for (size_t i = 0; i < sizeof(data); ++i) {
-    CHECK_DIF_OK(dif_uart_byte_receive_polled(&uart, &data[i]));
+    TRY(dif_uart_byte_receive_polled(&uart, &data[i]));
   }
-  CHECK_ARRAYS_EQ(data, kSendData, sizeof(kSendData));
+  TRY_CHECK_ARRAYS_EQ(data, kSendData, sizeof(kSendData));
 
   test_phase = kTestPhaseDone;
 
@@ -106,14 +103,20 @@ bool test_main(void) {
   if (uart_idx == 0) {
     CHECK_STATUS_OK(
         uart_testutils_select_pinmux(&pinmux, 1, kUartPinmuxChannelConsole));
-    ottf_console_configure_uart(TOP_EARLGREY_UART1_BASE_ADDR);
+    ottf_console_configure_uart(ottf_console_get(),
+                                TOP_EARLGREY_UART1_BASE_ADDR);
   }
 
   CHECK_STATUS_OK(
       uart_testutils_select_pinmux(&pinmux, uart_idx, kUartPinmuxChannelDut));
 
-  size_t baud_count =
-      kDeviceType == kDeviceSilicon ? kBaudCountSilicon : kBaudCountFpga;
+  size_t baud_count = ARRAYSIZE(kBauds);
+
+  // We only want to run the highest bauds (1MBd and 1.5MBd) on chips going
+  // at the real speed (24MHz). FPGAs clocking slower cannot test these.
+  if (kClockFreqPeripheralHz < 24 * 1000 * 1000) {
+    baud_count -= 2;
+  }
 
   // Check every baud rate is sent and received okay.
   status_t result = OK_STATUS();
diff --git a/sw/device/tests/uart_loopback_test.c b/sw/device/tests/uart_loopback_test.c
index 42b39fdf1cab6..f363043c901d9 100644
--- a/sw/device/tests/uart_loopback_test.c
+++ b/sw/device/tests/uart_loopback_test.c
@@ -53,7 +53,8 @@ bool test_main(void) {
   if (uart_idx == 0) {
     CHECK_STATUS_OK(
         uart_testutils_select_pinmux(&pinmux, 1, kUartPinmuxChannelConsole));
-    ottf_console_configure_uart(TOP_EARLGREY_UART1_BASE_ADDR);
+    ottf_console_configure_uart(ottf_console_get(),
+                                TOP_EARLGREY_UART1_BASE_ADDR);
   }
 
   // Attach the UART under test to the DUT channel.
diff --git a/sw/device/tests/uart_parity_break_test.c b/sw/device/tests/uart_parity_break_test.c
index 886d251b1853d..6e7d7894986ff 100644
--- a/sw/device/tests/uart_parity_break_test.c
+++ b/sw/device/tests/uart_parity_break_test.c
@@ -258,7 +258,8 @@ bool test_main(void) {
   if (uart_idx == 0) {
     CHECK_STATUS_OK(
         uart_testutils_select_pinmux(&pinmux, 1, kUartPinmuxChannelConsole));
-    ottf_console_configure_uart(TOP_EARLGREY_UART1_BASE_ADDR);
+    ottf_console_configure_uart(ottf_console_get(),
+                                TOP_EARLGREY_UART1_BASE_ADDR);
   }
 
   // Configure the UART under test.
diff --git a/sw/device/tests/uart_tx_rx_test.c b/sw/device/tests/uart_tx_rx_test.c
index a6c8e8aa9ba66..f607060196ab3 100644
--- a/sw/device/tests/uart_tx_rx_test.c
+++ b/sw/device/tests/uart_tx_rx_test.c
@@ -492,7 +492,8 @@ bool test_main(void) {
   if (kUartIdx == 0 && kDeviceType != kDeviceSimDV) {
     CHECK_STATUS_OK(
         uart_testutils_select_pinmux(&pinmux, 1, kUartPinmuxChannelConsole));
-    ottf_console_configure_uart(TOP_EARLGREY_UART1_BASE_ADDR);
+    ottf_console_configure_uart(ottf_console_get(),
+                                TOP_EARLGREY_UART1_BASE_ADDR);
   }
 
   CHECK_STATUS_OK(
diff --git a/sw/device/tests/usbdev_deep_disconnect_test.c b/sw/device/tests/usbdev_deep_disconnect_test.c
new file mode 100644
index 0000000000000..7e3812b295ef4
--- /dev/null
+++ b/sw/device/tests/usbdev_deep_disconnect_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseDeepDisconnect, kSuspendPhaseShutdown,
+                             1u, false);
+}
diff --git a/sw/device/tests/usbdev_deep_reset_test.c b/sw/device/tests/usbdev_deep_reset_test.c
new file mode 100644
index 0000000000000..96319540c8ac8
--- /dev/null
+++ b/sw/device/tests/usbdev_deep_reset_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG(.ignore_alerts = true);
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseDeepResume, kSuspendPhaseDeepReset,
+                             1u, false);
+}
diff --git a/sw/device/tests/usbdev_deep_resume_test.c b/sw/device/tests/usbdev_deep_resume_test.c
new file mode 100644
index 0000000000000..444fd322f5490
--- /dev/null
+++ b/sw/device/tests/usbdev_deep_resume_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseDeepResume, kSuspendPhaseDeepResume,
+                             1u, true);
+}
diff --git a/sw/device/tests/usbdev_mem_test.c b/sw/device/tests/usbdev_mem_test.c
new file mode 100644
index 0000000000000..21b4586fdc188
--- /dev/null
+++ b/sw/device/tests/usbdev_mem_test.c
@@ -0,0 +1,161 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// USB packet memory test
+//
+// This test performs a simple read/write test of the entire USB packet memory
+// from the CPU to check connectivity, addressing, integrity etc. A LFSR-
+// generated byte stream is used as the test pattern.
+//
+// Two methods of access are tested in turn:
+// (i)  direct access using the mmio_ routines
+// (ii) DIF-based buffer reading/writing
+
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_usbdev.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/pinmux_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+#include "sw/device/lib/dif/autogen/dif_usbdev_autogen.h"
+
+#define USBDEV_BASE_ADDR TOP_EARLGREY_USBDEV_BASE_ADDR
+
+#ifndef USBDEV_BUFFER_REG_OFFSET
+#define USBDEV_BUFFER_REG_OFFSET 0x800u
+#endif
+
+// Simple LFSR for 8-bit sequences
+/// Note: zero is an isolated state that shall be avoided
+#define LFSR_ADVANCE(lfsr)     \
+  (uint8_t)(                   \
+      (uint8_t)((lfsr) << 1) ^ \
+      ((((lfsr) >> 1) ^ ((lfsr) >> 2) ^ ((lfsr) >> 3) ^ ((lfsr) >> 7)) & 1U))
+
+// Total size of packet buffer memory in bytes
+#define USBDEV_PACKET_MEM_SIZE (USBDEV_NUM_BUFFERS * USBDEV_MAX_PACKET_SIZE)
+
+// Basic test of packet memory function from the CPU side
+static alignas(uint32_t) uint8_t testpatt[USBDEV_PACKET_MEM_SIZE];
+static alignas(uint32_t) uint8_t testcopy[USBDEV_PACKET_MEM_SIZE];
+
+static dif_usbdev_t usbdev;
+
+OTTF_DEFINE_TEST_CONFIG();
+
+/* The obvious advantage of using the DIF interface is that we are testing that
+   code too, but the disadvantage is that we have to resort to modifying the
+   buffer descriptors to perform reads because the buffers are not being used
+   in accordance with the expected flow model.
+*/
+
+static status_t mem_dif_write(const dif_usbdev_t *dev, const uint8_t *data,
+                              size_t n) {
+  const unsigned nbufs =
+      (n + USBDEV_MAX_PACKET_SIZE - 1) / USBDEV_MAX_PACKET_SIZE;
+  TRY_CHECK(nbufs <= USBDEV_NUM_BUFFERS);
+
+  for (unsigned id = 0u; id < nbufs; id++) {
+    TRY(dif_usbdev_buffer_raw_write(dev, (uint8_t)id,
+                                    &data[id * USBDEV_MAX_PACKET_SIZE],
+                                    USBDEV_MAX_PACKET_SIZE));
+  }
+
+  return OK_STATUS();
+}
+
+static status_t mem_dif_read(const dif_usbdev_t *dev, uint8_t *data, size_t n) {
+  const unsigned nbufs =
+      (n + USBDEV_MAX_PACKET_SIZE - 1) / USBDEV_MAX_PACKET_SIZE;
+  TRY_CHECK(nbufs <= USBDEV_NUM_BUFFERS);
+
+  for (unsigned id = 0u; id < nbufs; id++) {
+    TRY(dif_usbdev_buffer_raw_read(dev, (uint8_t)id,
+                                   &data[id * USBDEV_MAX_PACKET_SIZE],
+                                   USBDEV_MAX_PACKET_SIZE));
+  }
+
+  return OK_STATUS();
+}
+
+// Perform a read from the usbdev packet memory, optionally using the DIF
+// interface
+static status_t mem_read(const dif_usbdev_t *dev, unsigned use_dif,
+                         uint8_t *data, size_t n) {
+  if (use_dif) {
+    return mem_dif_read(dev, data, n);
+  } else {
+    mmio_region_memcpy_from_mmio32(dev->base_addr, USBDEV_BUFFER_REG_OFFSET,
+                                   data, n);
+    return OK_STATUS();
+  }
+}
+
+// Write a block of data to the usbdev packet memory, optionally using the DIF
+// interface
+static status_t mem_write(const dif_usbdev_t *dev, unsigned use_dif,
+                          const uint8_t *data, size_t n) {
+  if (use_dif) {
+    return mem_dif_write(dev, data, n);
+  } else {
+    mmio_region_memcpy_to_mmio32(dev->base_addr, USBDEV_BUFFER_REG_OFFSET, data,
+                                 n);
+    return OK_STATUS();
+  }
+}
+
+bool test_main(void) {
+  LOG_INFO("Running USBDEV Mem Test");
+
+  // Initialize DIF-based access to the packet buffer memory
+  CHECK_DIF_OK(
+      dif_usbdev_init(mmio_region_from_addr(USBDEV_BASE_ADDR), &usbdev));
+
+  // Exercise mmio_ routines and then dif_usbdev_ routines in turn; it provides
+  // a bit more testing of the packet memory because the two routines exhibit
+  // different access patterns/timing.
+  for (unsigned use_dif = 0u; use_dif <= 1u; use_dif++) {
+    // Set up test pattern
+    uint8_t lfsr = 0x13u;
+    for (unsigned idx = 0u; idx < sizeof(testpatt); idx++) {
+      testpatt[idx] = lfsr;
+      lfsr = LFSR_ADVANCE(lfsr);
+    }
+
+    // Write the generated test pattern to the usbdev packet memory
+    CHECK_STATUS_OK(mem_write(&usbdev, use_dif, testpatt, sizeof(testpatt)));
+
+    // Invalidate the contents of the copy buffer
+    memset(testcopy, 0xffu, sizeof(testcopy));
+
+    // Read back a copy of the test pattern from the usbdev packet memory
+    CHECK_STATUS_OK(
+        mem_read(&usbdev, use_dif, testcopy, USBDEV_PACKET_MEM_SIZE));
+
+    // Check the copy against the original
+    CHECK_ARRAYS_EQ(testcopy, testpatt, sizeof(testcopy));
+
+    for (unsigned idx = 0u; idx < sizeof(testpatt); idx++) {
+      // Invert the test pattern to ensure every byte is modified
+      testcopy[idx] = ~testcopy[idx];
+    }
+
+    // Write the modified test pattern to the device memory
+    CHECK_STATUS_OK(mem_write(&usbdev, use_dif, testcopy, sizeof(testcopy)));
+
+    // Invalidate the original test pattern buffer
+    memset(testpatt, 0xffu, sizeof(testpatt));
+
+    // Read back the modified test pattern from the device memory
+    CHECK_STATUS_OK(mem_read(&usbdev, use_dif, testpatt, sizeof(testpatt)));
+
+    // Check against the modified test pattern
+    CHECK_ARRAYS_EQ(testpatt, testcopy, USBDEV_PACKET_MEM_SIZE);
+  }
+
+  return true;
+}
diff --git a/sw/device/tests/usbdev_sleep_disconnect_test.c b/sw/device/tests/usbdev_sleep_disconnect_test.c
new file mode 100644
index 0000000000000..1b7d32a6b1436
--- /dev/null
+++ b/sw/device/tests/usbdev_sleep_disconnect_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseSleepDisconnect,
+                             kSuspendPhaseDeepResume, 1u, false);
+}
diff --git a/sw/device/tests/usbdev_sleep_reset_test.c b/sw/device/tests/usbdev_sleep_reset_test.c
new file mode 100644
index 0000000000000..2138a65197317
--- /dev/null
+++ b/sw/device/tests/usbdev_sleep_reset_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseSleepResume, kSuspendPhaseSleepReset,
+                             1u, false);
+}
diff --git a/sw/device/tests/usbdev_sleep_resume_test.c b/sw/device/tests/usbdev_sleep_resume_test.c
new file mode 100644
index 0000000000000..27da11affb25d
--- /dev/null
+++ b/sw/device/tests/usbdev_sleep_resume_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseSleepResume, kSuspendPhaseSleepResume,
+                             1u, false);
+}
diff --git a/sw/device/tests/usbdev_suspend.c b/sw/device/tests/usbdev_suspend.c
new file mode 100644
index 0000000000000..d82ee27ddbfd1
--- /dev/null
+++ b/sw/device/tests/usbdev_suspend.c
@@ -0,0 +1,1970 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// USB suspend/resume test
+//
+// Basic test of suspend/resume signaling and disconnect/reconnect behavior.
+// The DPI model sets up the device and reads the test descriptor. Having
+// ascertained the specific testing behavior that is required, it proceeds to
+// run through the appropriate states, time delays and bus activity as
+// illustrated below.
+//
+//-----------------------------------------------------------------------------
+// Test state flow
+//-----------------------------------------------------------------------------
+//
+// [PhaseSuspend]
+//
+// Power On Reset -> Configuration -> DPI drops SOF -> Suspend -> Resume ->
+//                -> DPI performs Bus Reset ...
+//
+// Three 'Normal Sleep' phases may be started from Power On Reset (to aid dev),
+// or a Bus Reset if a Bus Reset or Disconnect was the most recent wake
+// stimulus. If the wake stimulus was Resume Signaling, then configuration does
+// not occur again and we arrive via NextPhase
+//
+// [PhaseSleepResume]
+// [PhaseSleepReset]
+// [PhaseSleepDisconnect]
+//
+//  ... Bus Reset ->
+// Power On Reset -> Configuration ->
+//           [from prev phase] ... -> DPI drops SOF -> Suspend -> Activate AON
+//                -> Normal Sleep -> DPI produces wake stimulus -> Wakeup
+//                -> Deactivate AON ... [to next]
+//
+// [PhaseDeepResume]
+// [PhaseDeepReset]
+// [PhaseDeepDisconnect]
+//
+//  ... Bus Reset ->
+// Power On Reset -> Configuration ->
+//           [from prev phase] ... -> DPI drops SOF -> Suspend -> Activate AON
+//                -> Deep Sleep -> DPI produces wake stimulus -> Wakeup
+//                -> Deactivate AON .. [to next]
+//
+// [PhaseShutdown] Test Complete
+//
+//-----------------------------------------------------------------------------
+
+//-----------------------------------------------------------------------------
+// Summary notes from USB 2.0 Specification to aid apprehension (see the spec.
+// itself for details):
+//
+// Device starts transitioning to the Suspend state after observing a constant
+// Idle state on bus for more than 3.0ms, and must be in Suspend state after no
+// more than 10ms of bus inactivity. Pull-up resistor must remain asserted.
+//
+// Resuming from Suspend state is achieved by the host at any time by any non-
+// signaling, for at leasat 20ms. This is followed by a standard, low-speed EOP
+// (two low-speed bit times of SE0 followed by a J). Traffic, even if only SOF,
+// must be resumed within 3ms after entering the Idle state (J), to prevent
+// the device re-entering Suspend.
+// Additionally, the host must provide a 10ms resume recovery time during which
+// it will not attempt to access the device.
+//
+// Suspending/Resuming may occur from any Device State (Powered, Default,
+// Address or Configured), and the device returns to its pre-Suspend state.
+//-----------------------------------------------------------------------------
+
+#include "sw/device/tests/usbdev_suspend.h"
+
+#include <stdint.h>
+#include <string.h>
+
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_pwrmgr.h"
+#include "sw/device/lib/dif/dif_rstmgr.h"
+#include "sw/device/lib/dif/dif_rv_plic.h"
+#include "sw/device/lib/runtime/ibex.h"
+#include "sw/device/lib/runtime/irq.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/runtime/print.h"
+#include "sw/device/lib/testing/pinmux_testutils.h"
+#include "sw/device/lib/testing/pwrmgr_testutils.h"
+#include "sw/device/lib/testing/rstmgr_testutils.h"
+#include "sw/device/lib/testing/rv_plic_testutils.h"
+#include "sw/device/lib/testing/sram_ctrl_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/lib/testing/usb_testutils.h"
+#include "sw/device/lib/testing/usb_testutils_controlep.h"
+#include "sw/device/lib/testing/usb_testutils_streams.h"
+#include "sw/device/silicon_creator/lib/drivers/retention_sram.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+#include "sw/device/lib/testing/autogen/isr_testutils.h"
+
+#define MODULE_ID MAKE_MODULE_ID('u', 'd', 'u')
+
+// Set up the recording of function points for this module
+#define USBUTILS_FUNCPT_FILE USBUTILS_FUNCPT_FILE_USBDEV_SUSP_TEST
+
+// Are we using purely Isochronous streams for testing?
+#define USE_ISO_STREAMS 0
+// Are we using purely Bulk streams for testing?
+#define USE_BULK_STREAMS 1
+// Otherwise, we'll use a mixture
+
+// The number of streams to be employed if testing with traffic
+#if USB_ISO_STREAMS
+#define NUM_STREAMS 4U
+#else
+#define NUM_STREAMS USBUTILS_STREAMS_MAX
+#endif
+
+// Are we expecting a full frame interval?
+// Note: this must match the setting in the DPI model, but we do not have the
+// ability to share header files.
+#ifndef USBDPI_FULL_FRAME
+// By default we shorten the test duration.
+#define USBDPI_FULL_FRAME 0
+#endif
+
+// TODO: these are now set appropriately for automated testing on FPGA/ES.
+//  We need three sets of parameters:
+//  - chip simulation
+//  - FPGA/Silicon with automated host code
+//  - FPGA/Silicon with manual test stimulus
+
+/**
+ * Timeout constants in microseconds;
+ */
+enum {
+  TimeoutResumeMissed = 40U * 1000U,
+  TimeoutResetMissed = 60U * 1000U,
+  TimeoutWakeupResume = 30000u,
+  TimeoutFinishMissed = 2000u,
+  TimeoutAonResponse = 5000u,
+  TimeoutSleepFailed = 5000u,
+
+  // How long should we wait for configuration to occur if observing physical
+  // timings? (Real USB host or physically-accurate timings in simulation.)
+  TimeoutPhysConfig = 10U * 1000U * 1000U,
+
+  /**
+   * Durations that are specified in terms of bus frames, however long those
+   * simulated bus frames happen to be (ie. these intervals are determined by
+   * the DPI host behavior rather than the USB protocol specification)
+   */
+  FramesConfigDelay = 2000u,
+  FramesSuspendMissed = 2000u,
+  FramesInitiateResume = 2u,
+
+  /**
+   * Number of frame delays to wait after device signals Suspend, before we
+   * initiate sleeping.
+   */
+  FramesWaitEnterSleep = 10u,
+};
+
+/**
+ * Maximum size of the client state stored within the Retention SRAM;
+ * we leave the usb_testutils_streams/other code to specify and manage its own
+ * state.
+ */
+#define MAX_CLIENT_STATE 0x400U
+
+/**
+ * Test states
+ */
+typedef enum {
+  /**
+   * Power On Reset (start of first phase of test sequence).
+   */
+  kSuspendStatePowerOnReset = 0u,
+  /**
+   * Bus Reset from DPI/Host has occurred.
+   */
+  kSuspendStateBusReset,
+  /**
+   * Waiting for the DPI/Host to suspend the device, for normal Suspend/Resume
+   * behavior, not involving AON/Wakeup functionality.
+   */
+  kSuspendStateWaitSuspend,
+  /**
+   * Waiting for the DPI/Host to suspend the device, expecting a longer suspend
+   * period, during which we put the device into Normal/Deep Sleep using the
+   * AON/Wakeup functionality.
+   */
+  kSuspendStateWaitLongSuspend,
+  /**
+   * Waiting for the DPI/Host to initiate a Resume from Suspended.
+   */
+  kSuspendStateWaitResume,
+  /**
+   * Waiting for the DPI/Host to provide the Bus Reset stimulus.
+   */
+  kSuspendStateWaitBusReset,
+  /**
+   * Waiting whilst Suspended, until we decide to enter Normal/Deep Sleep.
+   * The DPI/Host is not expected to resume communication during this time.
+   */
+  kSuspendStateWaitSuspendTimeout,
+  /**
+   * We have instructed the AON/Wakeup module to wake over control of the USB
+   * signals. It does not do so immediately because it lives in a slower clock
+   * domain, but the delay should be very short.
+   */
+  kSuspendStateActivatedAON,
+  /**
+   * We are expecting to fall into a Normal Sleep.
+   */
+  kSuspendStateNormalSleep,
+  /**
+   * We are expecting to fall into a Deep Sleep.
+   */
+  kSuspendStateDeepSleep,
+  /**
+   * We have just returned from a Normal Sleep.
+   */
+  kSuspendStateNormalWaking,
+  /**
+   * We have just returned from a Deep Sleep.
+   */
+  kSuspendStateDeepWaking,
+  /**
+   * We've instructed the AON/Wakeup module to relinquish its control of the
+   * USB and deactivate.
+   */
+  kSuspendStateAONWakeup,
+  /**
+   * TODO: Resume Signaling still needs completing...
+   */
+  kSuspendStateWaitResumeTimeout,
+  /**
+   * Waiting for the DPI/Host to decide that the test phase is complete.
+   */
+  kSuspendStateWaitFinish,
+  /**
+   * Transition to next test phase, with the device still connected and
+   * operational, ie. Resume Signaling has occurred.
+   */
+  kSuspendStateNextPhase,
+  /**
+   * Disconnecting from the bus.
+   */
+  kSuspendStateWaitDisconnect,
+  /**
+   * Test completed successfully.
+   */
+  kSuspendStateComplete,
+  /**
+   * Test failed.
+   */
+  kSuspendStateFailed,
+} usbdev_suspend_state_t;
+
+/**
+ * Retained state; to be held in the Retention SRAM during Deep Sleep
+ */
+typedef struct {
+  /**
+   * Host-suppplied device address on the USB.
+   */
+  uint8_t dev_address;
+  /**
+   * Selected device configuration number.
+   */
+  uint8_t dev_config;
+  /**
+   * Test phase.
+   */
+  uint8_t test_phase;
+  /**
+   * Unused padding.
+   */
+  uint8_t pad0;
+  /**
+   * Number of remaining test iterations.
+   */
+  uint32_t num_iters;
+  /**
+   * Data Toggle bits.
+   */
+  uint32_t data_toggles;
+  /**
+   * Used bytes of client state.
+   */
+  uint32_t client_used;
+  /**
+   * Client state; allow, for example, the usb_testutils_streams code to specify
+   * its own per-stream retention state rather than constraining it here.
+   */
+  alignas(uint32_t) uint8_t client_state[MAX_CLIENT_STATE];
+} usbdev_retn_state_t;
+
+/**
+ * Test context
+ */
+typedef struct usbdev_suspend_ctx {
+  /**
+   * Access to usb_testutils context
+   */
+  usb_testutils_ctx_t *usbdev;
+  /**
+   * Current test state
+   */
+  usbdev_suspend_state_t test_state;
+  /**
+   * Current test phase
+   */
+  usbdev_suspend_phase_t test_phase;
+  /**
+   * Initial test phase (inclusive)
+   */
+  usbdev_suspend_phase_t init_phase;
+  /**
+   * Final test phase (inclusive)
+   */
+  usbdev_suspend_phase_t fin_phase;
+  /**
+   * Number of iterations remaining (including the present iteration).
+   */
+  uint32_t num_iters;
+  /**
+   * Streaming traffic throughout test?
+   */
+  bool with_traffic;
+  /**
+   * Timeout catching any failure of test to advance as expected
+   */
+  ibex_timeout_t timeout;
+  /**
+   * Most recent status of wakeup monitor
+   */
+  dif_usbdev_wake_status_t wake_status;
+  /**
+   * Test descriptor for current test phase
+   */
+  uint8_t test_dscr[USB_TESTUTILS_TEST_DSCR_LEN];
+  /**
+   * Our retained state; transferred to and from Retention SRAM over Sleep
+   */
+  usbdev_retn_state_t retn_state;
+} usbdev_suspend_ctx_t;
+
+enum {
+  /**
+   * Retention SRAM start address
+   */
+  kRetSramBaseAddr = TOP_EARLGREY_SRAM_CTRL_RET_AON_RAM_BASE_ADDR,
+  /**
+   * Retention SRAM address at which we may store some state.
+   */
+  kRetSramOwnerAddr = kRetSramBaseAddr + offsetof(retention_sram_t, owner),
+};
+
+// Total length of the configuration descriptor.
+#define CFG_DSCR_TOTAL_LEN \
+  (USB_CFG_DSCR_LEN +      \
+   NUM_STREAMS * (USB_INTERFACE_DSCR_LEN + 2 * USB_EP_DSCR_LEN))
+
+// This Configuration Descriptor must be capable of describing the maximal
+// number of interfaces (= number of streams). It is overwritten dynamically
+// when streaming with traffic.
+static uint8_t config_descriptors[CFG_DSCR_TOTAL_LEN] = {
+    // Default configuration, for use if we're not testing with traffic too;
+    // we still need configuration for the host to recognize and configure us.
+    USB_CFG_DSCR_HEAD(
+        USB_CFG_DSCR_LEN + 2 * (USB_INTERFACE_DSCR_LEN + 2 * USB_EP_DSCR_LEN),
+        2),
+    VEND_INTERFACE_DSCR(0, 2, 0x50, 1),
+    USB_BULK_EP_DSCR(0, 1, 32, 0),
+    USB_BULK_EP_DSCR(1, 1, 32, 4),
+    VEND_INTERFACE_DSCR(1, 2, 0x50, 1),
+    USB_BULK_EP_DSCR(0, 2, 32, 0),
+    USB_BULK_EP_DSCR(1, 2, 32, 4),
+};
+
+/**
+ * USB Bus Frame duration, in microseconds; may be reduced when communicating
+ * with the USBDPI module to reduce the simulation time.
+ */
+static uint32_t frame_interval = 1000u;
+
+/**
+ * USB device context types.
+ */
+static usb_testutils_ctx_t usbdev;
+static usb_testutils_controlep_ctx_t usbdev_control;
+static usb_testutils_streams_ctx_t usbdev_streams;
+
+/**
+ * Pinmux handle
+ */
+static dif_pinmux_t pinmux;
+/**
+ * Rstmgr handle
+ */
+static dif_rstmgr_t rstmgr;
+/**
+ * Pwrmgr handle
+ */
+static dif_pwrmgr_t pwrmgr;
+/**
+ * Interrupt controller handle
+ */
+static dif_rv_plic_t rv_plic;
+/**
+ * Do we expect this host to put the device into suspend?
+ */
+static bool host_suspends = true;
+/**
+ * Do we expect this host to perform Resume Signaling and awaken the device from
+ * a Suspended state?
+ */
+static bool host_resumes = true;
+/**
+ * Do we expect this host to perform Bus Resets to awaken the device from sleep?
+ */
+static bool host_resets = true;
+/**
+ * Do we expect this host to Disconnect the device to awaken it from sleep?
+ */
+static bool host_disconnects = true;
+/**
+ * Verbose logging? Mostly useful on FPGA; be warned that it can affect
+ * timing in simulation, and in particular will likely break Verilator sims.
+ *
+ * It can also cause timeouts on the host side with automated regression
+ * tests on FPGA/Silicon because the CPU is stalled waiting for UART FIFO
+ * space.
+ *
+ * TODO: perhaps we want a uart_flush() at carefully selected moments, eg.
+ *       when setting a timeout?
+ */
+static bool verbose = true;
+/**
+ * Verbose logging from the streaming code?
+ *
+ * Note: this makes the test a lot slower because the CPU is stalled awaiting
+ * UART FIFO space.
+ */
+static bool s_verbose = false;
+
+static plic_isr_ctx_t plic_ctx = {.rv_plic = &rv_plic,
+                                  .hart_id = kTopEarlgreyPlicTargetIbex0};
+
+static pwrmgr_isr_ctx_t pwrmgr_isr_ctx = {
+    .pwrmgr = &pwrmgr,
+    .plic_pwrmgr_start_irq_id = kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+    .expected_irq = kDifPwrmgrIrqWakeup,
+    .is_only_irq = true};
+
+// Configuration for streaming layer. This specifies the transfer type of each
+// of the streams being used and checked if we're testing with traffic enabled.
+static const unsigned nstreams = NUM_STREAMS;
+#if USE_ISO_STREAMS
+static const usb_testutils_transfer_type_t xfr_types[] = {
+    kUsbTransferTypeIsochronous, kUsbTransferTypeIsochronous,
+    kUsbTransferTypeIsochronous, kUsbTransferTypeIsochronous,
+    kUsbTransferTypeIsochronous, kUsbTransferTypeIsochronous,
+    kUsbTransferTypeIsochronous, kUsbTransferTypeIsochronous,
+    kUsbTransferTypeIsochronous, kUsbTransferTypeIsochronous,
+    kUsbTransferTypeIsochronous};
+#elif USE_BULK_STREAMS
+static const usb_testutils_transfer_type_t xfr_types[] = {
+    kUsbTransferTypeBulk, kUsbTransferTypeBulk, kUsbTransferTypeBulk,
+    kUsbTransferTypeBulk, kUsbTransferTypeBulk, kUsbTransferTypeBulk,
+    kUsbTransferTypeBulk, kUsbTransferTypeBulk, kUsbTransferTypeBulk,
+    kUsbTransferTypeBulk, kUsbTransferTypeBulk};
+#else
+static const usb_testutils_transfer_type_t xfr_types[] = {
+    kUsbTransferTypeIsochronous, kUsbTransferTypeInterrupt,
+    kUsbTransferTypeBulk,        kUsbTransferTypeBulk,
+
+    kUsbTransferTypeIsochronous, kUsbTransferTypeInterrupt,
+    kUsbTransferTypeBulk,        kUsbTransferTypeIsochronous,
+
+    kUsbTransferTypeInterrupt,   kUsbTransferTypeBulk,
+    kUsbTransferTypeBulk,
+};
+#endif
+
+// Full traffic and checking
+static const usbdev_stream_flags_t test_flags =
+    kUsbdevStreamFlagRetrieve | kUsbdevStreamFlagCheck |
+    kUsbdevStreamFlagRetry | kUsbdevStreamFlagSend;
+// We don't expect it to complete; data transfer is exercised and checked in
+// other tests.
+static const uint32_t transfer_bytes = 0x80 << 20;
+
+/**
+ * Context information for suspend/resume test
+ */
+static usbdev_suspend_ctx_t suspend_ctx;
+
+/**
+ * Report progress; these messages are obligatory for automated testing in order
+ * that the host-side test harness may synchronize with this device-side code.
+ */
+// Implement as a varargs function if it becomes more complicated.
+// static inline void report_progress(const char *msg);
+#define report_progress(...) LOG_INFO(__VA_ARGS__)
+
+/**
+ * Are we observing physically-accurate timings?
+ */
+static inline bool physical_timings(void) {
+  switch (kDeviceType) {
+    case kDeviceFpgaCw310:
+    case kDeviceFpgaCw340:
+    case kDeviceSilicon:
+      break;
+    default:
+      return false;
+  }
+  return true;
+}
+
+// Return a timeout in microseconds, scaled for the test target; longer timeout
+// periods are more appropriate for FPGA tests and decidedly undesirable for
+// Verilator top-level simulations
+static uint32_t time_frames(unsigned n) {
+  uint32_t scale = 1u;
+  if (physical_timings()) {
+    //    scale = 500u;
+  }
+  return scale * n * frame_interval;
+}
+
+// Return the name of a test phase
+static const char *phase_name(usbdev_suspend_phase_t phase) {
+  switch (phase) {
+    case kSuspendPhaseSuspend:
+      return "Suspend";
+    case kSuspendPhaseSleepResume:
+      return "SleepResume";
+    case kSuspendPhaseSleepReset:
+      return "SleepReset";
+    case kSuspendPhaseSleepDisconnect:
+      return "SleepDisconnect";
+    case kSuspendPhaseDeepResume:
+      return "DeepResume";
+    case kSuspendPhaseDeepReset:
+      return "DeepReset";
+    case kSuspendPhaseDeepDisconnect:
+      return "DeepDisconnect";
+    case kSuspendPhaseShutdown:
+      return "Shutdown";
+    default:
+      return "<Unknown>";
+  }
+}
+
+// Return the name of a test state
+static const char *state_name(usbdev_suspend_state_t state) {
+  switch (state) {
+    case kSuspendStatePowerOnReset:
+      return "PowerOnReset";
+    case kSuspendStateBusReset:
+      return "BusReset";
+    case kSuspendStateWaitSuspend:
+      return "WaitSuspend";
+    case kSuspendStateWaitResume:
+      return "WaitResume";
+    case kSuspendStateWaitBusReset:
+      return "WaitBusReset";
+    case kSuspendStateWaitLongSuspend:
+      return "WaitLongSuspend";
+    case kSuspendStateWaitSuspendTimeout:
+      return "WaitSuspendTimeout";
+    case kSuspendStateActivatedAON:
+      return "ActivatedAON";
+    case kSuspendStateNormalSleep:
+      return "NormalSleep";
+    case kSuspendStateDeepSleep:
+      return "DeepSleep";
+    case kSuspendStateNormalWaking:
+      return "NormalWaking";
+    case kSuspendStateDeepWaking:
+      return "DeepWaking";
+    case kSuspendStateAONWakeup:
+      return "AONWakeup";
+    case kSuspendStateWaitResumeTimeout:
+      return "WaitResumeTimeout";
+    case kSuspendStateWaitDisconnect:
+      return "WaitDisconnect";
+    case kSuspendStateWaitFinish:
+      return "WaitFinish";
+    case kSuspendStateNextPhase:
+      return "NextPhase";
+    case kSuspendStateComplete:
+      return "Complete";
+    case kSuspendStateFailed:
+      return "Failed";
+    default:
+      return "<Unknown>";
+  }
+}
+
+// Report any link event(s)
+static void events_report(usbdev_suspend_ctx_t *ctx, uint32_t snapshot,
+                          dif_usbdev_link_state_t link_state) {
+  // Report connection/reset events
+  if (snapshot & (1u << kDifUsbdevIrqPowered)) {
+    LOG_INFO("VBUS Connected");
+  }
+  if (snapshot & (1u << kDifUsbdevIrqDisconnected)) {
+    LOG_INFO("VBUS Disconnected");
+  }
+  if (snapshot & (1u << kDifUsbdevIrqLinkReset)) {
+    LOG_INFO("Link reset");
+  }
+  if (snapshot & (1u << kDifUsbdevIrqHostLost)) {
+    LOG_INFO("Host lost");
+  }
+
+  // Report suspend/resume status changes
+  if (snapshot &
+      ((1u << kDifUsbdevIrqLinkSuspend) | (1u << kDifUsbdevIrqLinkResume))) {
+    switch (link_state) {
+      case kDifUsbdevLinkStatePoweredSuspended:
+      case kDifUsbdevLinkStateSuspended:
+        LOG_INFO("Suspended");
+        break;
+
+      case kDifUsbdevLinkStateResuming:
+        LOG_INFO("Resuming");
+        break;
+
+      case kDifUsbdevLinkStateActiveNoSof:
+        LOG_INFO("Resuming no SOF");
+        break;
+
+      case kDifUsbdevLinkStateActive:
+        LOG_INFO("Resumed");
+        break;
+
+      default:
+        break;
+    }
+  }
+}
+
+// Transition to a (new) test state
+static inline void state_enter(usbdev_suspend_ctx_t *ctx,
+                               usbdev_suspend_state_t state) {
+  if (verbose) {
+    LOG_INFO("entering state %s", state_name(state));
+  }
+  ctx->test_state = state;
+}
+
+// Set a time out for the current test state, in microseconds
+static inline void timeout_set(usbdev_suspend_ctx_t *ctx,
+                               uint32_t interval_us) {
+  if (verbose) {
+    LOG_INFO("timeout_set %uus\n", interval_us);
+    if (false) {
+      uint64_t now = ibex_mcycle_read();
+      uint64_t then = now + interval_us;
+      LOG_INFO("  setting timeout to 0x%x%x (at 0x%x%x)",
+               (uint32_t)(then >> 32), (uint32_t)then, (uint32_t)(now >> 32),
+               (uint32_t)now);
+    }
+  }
+  ctx->timeout = ibex_timeout_init(interval_us);
+}
+
+// Set a time out, in frames, for the current test state
+static void timeout_frames_set(usbdev_suspend_ctx_t *ctx,
+                               uint32_t interval_frames) {
+  timeout_set(ctx, time_frames(interval_frames));
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// Report the state of the phy pins
+////////////////////////////////////////////////////////////////////////////////
+void sense_report(usbdev_suspend_ctx_t *ctx, uint32_t niters) {
+  while (niters-- > 0u) {
+    dif_usbdev_phy_pins_sense_t sense;
+    CHECK_DIF_OK(dif_usbdev_get_phy_pins_status(ctx->usbdev->dev, &sense));
+#if USBUTILS_FUNCTION_POINTS
+    uint32_t data = (sense.rx_dp ? 1U : 0) | (sense.rx_dn ? 2U : 0) |
+                    (sense.rx_d ? 4U : 0) | (sense.output_enable ? 8U : 0) |
+                    (sense.vbus_sense ? 0x100U : 0);
+    USBUTILS_FUNCPT(0x515, data);
+#endif
+    LOG_INFO(
+        "sense %u : rx_dp %u rx_dn %u rx_d %u : tx_dp %u tx_dn %u tx_d %u "
+        "tx_se0 %u : oe %u",
+        sense.vbus_sense, sense.rx_dp, sense.rx_dn, sense.rx_d, sense.tx_dp,
+        sense.tx_dn, sense.tx_d, sense.tx_se0, sense.output_enable);
+  }
+}
+
+/**
+ * Report the status information from the AON/Wake module.
+ */
+void report_wake_status(usbdev_suspend_ctx_t *ctx) {
+  LOG_INFO("wake status active %u disconnected %u bus_reset %u",
+           ctx->wake_status.active, ctx->wake_status.disconnected,
+           ctx->wake_status.bus_reset);
+  LOG_INFO(" bus_not_idle %u", ctx->wake_status.bus_not_idle);
+  LOG_INFO(" (host_resumes %u host_resets %u host_disconnects %u)",
+           host_resumes, host_resets, host_disconnects);
+}
+
+/**
+ * Collect and optionally report the current 'wake status' reported by the
+ * AON/Wake module. This indicates why sleep was interrupted.
+ */
+status_t collect_wake_status(usbdev_suspend_ctx_t *ctx) {
+  TRY(dif_usbdev_get_wake_status(ctx->usbdev->dev, &ctx->wake_status));
+  if (verbose) {
+    report_wake_status(ctx);
+  }
+  return OK_STATUS();
+}
+
+/**
+ * External interrupt handler.
+ */
+void ottf_external_isr(void) {
+  dif_pwrmgr_irq_t irq_id;
+  top_earlgrey_plic_peripheral_t peripheral;
+
+  isr_testutils_pwrmgr_isr(plic_ctx, pwrmgr_isr_ctx, &peripheral, &irq_id);
+
+  if (false) {
+    const bool debug = false;
+    usbdev_suspend_ctx_t *ctx = &suspend_ctx;
+    if (debug) {
+      sense_report(ctx, 2);
+      LOG_INFO("Received Wakeup IRQ in sleep");
+      if (debug) {
+        // Report wake status immediately, to see what ES captured.
+        (void)collect_wake_status(ctx);
+        sense_report(ctx, 10u);
+      }
+    } else {
+      LOG_INFO("Received Wakeup IRQ in sleep");
+    }
+  }
+
+  // Check that both the peripheral and the irq id are correct.
+  CHECK(peripheral == kTopEarlgreyPlicPeripheralPwrmgrAon,
+        "IRQ peripheral: %d is incorrect", peripheral);
+  CHECK(irq_id == kDifPwrmgrIrqWakeup, "IRQ ID: %d is incorrect", irq_id);
+}
+
+/**
+ * Simple Retention SRAM writing (from sram_ctrl_sleep_sram_ret_contents_test.c)
+ */
+static void retention_sram_store(const usbdev_retn_state_t *state) {
+  sram_ctrl_testutils_write(kRetSramOwnerAddr, (sram_ctrl_testutils_data_t){
+                                                   .words = (uint32_t *)state,
+                                                   .len = sizeof(*state) / 4});
+}
+
+/**
+ * Simple Retention SRAM reading (from sram_ctrl_sleep_sram_ret_contents_test.c)
+ */
+static void retention_sram_load(usbdev_retn_state_t *state) {
+  memcpy(state, (uint8_t *)kRetSramOwnerAddr, sizeof(*state));
+}
+
+static void phase_set(usbdev_suspend_ctx_t *ctx, usbdev_suspend_phase_t phase) {
+  if (verbose) {
+    LOG_INFO("phase_set %u (%s)", phase, phase_name(phase));
+  }
+  /**
+   * Test descriptor; indicates to the DPI model that we're interested in
+   * testing bus Suspend/Resume signaling, Reset signaling and Remote Wakeup
+   * behavior.
+   */
+  uint8_t test_descriptor[] = {
+      USB_TESTUTILS_TEST_DSCR(kUsbTestNumberSuspend,
+                              (uint8_t)phase,  // Test phase
+                              0, 0, 0)};
+
+  memcpy(ctx->test_dscr, test_descriptor, sizeof(ctx->test_dscr));
+
+  // Remember the new test phase
+  ctx->test_phase = phase;
+}
+
+// Callback handler for link events
+static status_t link_callback(void *ctx_v,
+                              dif_usbdev_irq_state_snapshot_t snapshot,
+                              dif_usbdev_link_state_t link_state) {
+  usbdev_suspend_ctx_t *ctx = (usbdev_suspend_ctx_t *)ctx_v;
+
+  if (snapshot & (1u << kDifUsbdevIrqFrame)) {
+    if (verbose) {
+      // For FPGA testing, we deliberately extend all of the timeout periods to
+      // make the activity viewable. This is therefore just an indication of
+      // activity/progress.
+      static int hb = 0;
+      if (++hb > 1000) {
+        LOG_INFO("SOF");
+        hb = 0;
+      }
+    }
+
+    // We are supplied with the SOF interrupts to help inform our decision
+    // but these are normally much too frequent to be reporting them
+    snapshot &= ~(1u << kDifUsbdevIrqFrame);
+    if (!snapshot) {
+      // If only a Frame interrupt has called, return without further reporting
+      return OK_STATUS();
+    }
+  }
+
+  if (false) {  // verbose && snapshot) {
+                //    LOG_INFO("State %u (%s) - Link events:", ctx->test_state,
+                //             state_name(ctx->test_state));
+    events_report(ctx, snapshot, link_state);
+    //    LOG_INFO(" events: 0x%x link 0x%x", snapshot, link_state);
+  }
+
+  // State machine anticipates the behavior of the host/DPI model, checking that
+  // the expected events are reported within the expected time intervals, and
+  // advances accordingly through the test states.
+
+  switch (ctx->test_state) {
+    // We're expecting the host to drop the SOF heartbeat indicating that we
+    // should suspend... (STEP_IDLE_)
+    case kSuspendStateWaitSuspend:
+      if (snapshot & (1u << kDifUsbdevIrqLinkSuspend)) {
+        state_enter(ctx, kSuspendStateWaitResume);
+        timeout_set(ctx, TimeoutResumeMissed);
+      }
+      break;
+
+    // After a short delay, the host should resume automatically...
+    // (STEP_ACTIVE_)
+    case kSuspendStateWaitResume:
+      if (snapshot & (1u << kDifUsbdevIrqLinkResume)) {
+        state_enter(ctx, kSuspendStateNextPhase);
+      }
+      break;
+
+    // The first test phase (Suspend/Resume without AON/Wakeup involvement)
+    // is terminated by a deliberate Bus Reset, advancing us to the next
+    // phase.
+    case kSuspendStateWaitBusReset:
+      if (snapshot & (1u << kDifUsbdevIrqLinkReset)) {
+        state_enter(ctx, kSuspendStateBusReset);
+      }
+      break;
+
+    // This time we're expecting a much longer Suspend...
+    case kSuspendStateWaitLongSuspend:
+      if (snapshot & (1u << kDifUsbdevIrqLinkSuspend)) {
+        state_enter(ctx, kSuspendStateWaitSuspendTimeout);
+        timeout_frames_set(ctx, FramesWaitEnterSleep);
+      }
+      break;
+
+    // We're _waiting for a timeout_ to occur, so we're not expecting any
+    // events at this point...
+    case kSuspendStateWaitSuspendTimeout:
+      if (snapshot) {
+        state_enter(ctx, kSuspendStateFailed);
+      }
+      break;
+
+    case kSuspendStateWaitDisconnect:
+      if (snapshot & (1u << kDifUsbdevIrqDisconnected)) {
+        state_enter(ctx, kSuspendStateComplete);
+      }
+      break;
+
+    case kSuspendStateActivatedAON:
+      // TODO: should respond to a resume event, and seize back control!
+      break;
+    case kSuspendStateNormalSleep:
+    case kSuspendStateDeepSleep:
+      break;
+    case kSuspendStateAONWakeup:
+      break;
+
+    case kSuspendStateWaitResumeTimeout:
+      break;
+
+    case kSuspendStateWaitFinish:
+      // We've resumed, we're just waiting for the host to perform some simple
+      // traffic and then disconnect to signal test completion
+      if (snapshot & (1u << kDifUsbdevLinkStateDisconnected)) {
+        state_enter(ctx, kSuspendStateComplete);
+      }
+      break;
+
+    case kSuspendStatePowerOnReset:
+    case kSuspendStateBusReset:
+    case kSuspendStateNextPhase:
+      break;
+
+    case kSuspendStateNormalWaking:
+    case kSuspendStateDeepWaking:
+      break;
+
+    // Ignore link events if we already have a verdict.
+    case kSuspendStateFailed:
+    case kSuspendStateComplete:
+      break;
+
+    default:
+      LOG_INFO("Unknown/invalid test state %u (%s)", ctx->test_state,
+               state_name(ctx->test_state));
+      state_enter(ctx, kSuspendStateFailed);
+      break;
+  }
+
+  if (verbose && ctx->test_state == kSuspendStateFailed) {
+    LOG_INFO(" -> failed handling snapshot 0x%x with link state 0x%x\n",
+             snapshot, link_state);
+  }
+
+  return OK_STATUS();
+}
+
+// TODO: redirect logging information in Verilator t-l sim because any attempt
+// to use the UART will introduce long delays and break the test.
+static size_t base_dev_uart(void *data, const char *buf, size_t len) {
+  if (kDeviceType == kDeviceSimVerilator) {
+    for (size_t i = 0; i < len; ++i) {
+      *(uint32_t *)0x411f0084 = ((uint8_t *)buf)[i];
+    }
+  }
+  return len;
+}
+static buffer_sink_t base_stdout = {
+    .data = NULL,
+    // Note: Using `&base_dev_null` causes this variable to be placed in the
+    // .data section and triggers the assertion in rom.ld.
+    .sink = base_dev_uart,
+};
+
+////////////////////////////////////////////////////////////////////////////////
+// Timeout handling
+//
+// Timeouts generally occur if an expected event has not happened as expected,
+// indicating a failure. Some timeouts, however, simply indicate that the test
+// should advance - ie. a necessary delay interval has elapsed - and others are
+// necessary with a physical host (FPGA runs) because the requisite behavior
+// cannot be generated by the host.
+////////////////////////////////////////////////////////////////////////////////
+static status_t timeout_handle(usbdev_suspend_ctx_t *ctx) {
+  // Timeouts typically indicate failure.
+  bool failed = true;
+
+  switch (ctx->test_state) {
+    case kSuspendStateWaitSuspend:
+      if (!host_suspends) {
+        LOG_INFO("auto-suspending (FPGA)");
+        state_enter(ctx, kSuspendStateWaitResume);
+        timeout_frames_set(ctx, FramesInitiateResume);
+        failed = false;
+      }
+      break;
+
+    case kSuspendStateWaitLongSuspend:
+      if (!host_suspends) {
+        LOG_INFO("auto-long-suspending (FPGA)");
+        state_enter(ctx, kSuspendStateWaitSuspendTimeout);
+        timeout_frames_set(ctx, FramesWaitEnterSleep);
+        failed = false;
+      }
+      break;
+
+    // Timeout is required to advance from the longer suspend state
+    // because we're not expecting any host activity in this case, but
+    // must initiate sleep/powerdown
+    case kSuspendStateWaitSuspendTimeout:
+      if (verbose) {
+        LOG_INFO("set_wake_enable...");
+      }
+      TRY(dif_usbdev_set_wake_enable(ctx->usbdev->dev, kDifToggleEnabled));
+
+      state_enter(ctx, kSuspendStateActivatedAON);
+      timeout_frames_set(ctx, TimeoutAonResponse);
+      failed = false;
+      break;
+
+    case kSuspendStateWaitResume:
+      if (!host_resumes) {
+        LOG_INFO("auto-resuming (host does not support Resume Signaling)");
+        state_enter(ctx, kSuspendStateWaitBusReset);
+        timeout_frames_set(ctx, 10000u);
+        failed = false;
+      }
+      break;
+
+    // Timeout
+    case kSuspendStateWaitResumeTimeout:
+      // TODO:
+      //             timeout_frames_set(ctx, TimeoutFinishMissed);
+      state_enter(ctx, kSuspendStateNextPhase);
+      failed = false;
+      break;
+
+    // Timeout may also be required to advance from Wait(Long)Suspend if
+    // the host does not attempt to suspend the device, in which case we
+    // shall also need to transition from WaitResume automatically...
+    case kSuspendStateWaitBusReset:
+      if (!host_resets) {
+        LOG_INFO("auto-resetting (host does not support Bus Resets)");
+        // Since we don't have an actual Bus Reset we must NOT wait around
+        // to be reconfigured.
+        state_enter(ctx, kSuspendStateNextPhase);
+        failed = false;
+      }
+      break;
+
+    // Any other timeout implies that we did not receive the expected link
+    // event promptly and the test has failed
+    default:
+      break;
+  }
+
+  if (failed) {
+    LOG_INFO("Timed out in test state %u (%s)", ctx->test_state,
+             state_name(ctx->test_state));
+    state_enter(ctx, kSuspendStateFailed);
+  }
+
+  return OK_STATUS();
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// (Re)initialize the software stack
+////////////////////////////////////////////////////////////////////////////////
+
+static status_t software_init(usbdev_suspend_ctx_t *ctx) {
+  if (verbose) {
+    LOG_INFO("Init testutils layer in state %u (%s)", ctx->test_state,
+             state_name(ctx->test_state));
+  }
+
+  // Initialize the usb_testutils layer
+  // Note: when we exit a Deep Sleep via Resume Signaling we are relying
+  // upon being able to set up the state of the endpoints and device
+  // registers again, rather than retaining the full software state in SRAM
+  TRY(usb_testutils_init(ctx->usbdev, /*pinflip=*/false,
+                         /*en_diff_rcvr=*/true,
+                         /*tx_use_d_se0=*/false));
+
+  // Register our interest in link events
+  TRY(usb_testutils_link_callback_register(ctx->usbdev, link_callback, ctx));
+
+  if (ctx->with_traffic) {
+    // Supply usb_testutils context to streaming library
+    usbdev_streams.usbdev = ctx->usbdev;
+
+#if 0
+    // Initialize the state of the streams; do this before resuming.
+    TRY(usb_testutils_streams_init(&usbdev_streams, nstreams, xfr_types,
+                                   transfer_bytes, test_flags, s_verbose));
+#else
+    // TODO: we do nothing with this at the moment, but perhaps in time we'll
+    // present it to the host via the test descriptor a la the regular
+    // streaming tests (usbdev_stream/iso/mixed_test).
+    uint32_t dpi_types;
+
+    // Initialize the state of the streams; do this before resuming.
+    TRY(usb_testutils_streams_typed_init(&usbdev_streams, config_descriptors,
+                                         sizeof(config_descriptors), nstreams,
+                                         xfr_types, transfer_bytes, test_flags,
+                                         s_verbose, &dpi_types));
+#endif
+  }
+
+  // Set up Endpoint Zero for Control Transfers, at which point the
+  // interface becomes enabled and we must be responsive to USB traffic.
+  TRY(usb_testutils_controlep_init(
+      &usbdev_control, ctx->usbdev, 0, config_descriptors,
+      sizeof(config_descriptors), ctx->test_dscr, sizeof(ctx->test_dscr)));
+
+  return OK_STATUS();
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// Handle the initial state of a new phase, and the first state after waking
+// from Deep Sleep.
+////////////////////////////////////////////////////////////////////////////////
+
+static status_t phase_start_resume(usbdev_suspend_ctx_t *ctx) {
+  uint32_t timeout = FramesSuspendMissed;
+
+  TRY_CHECK(ctx->test_state == kSuspendStateNextPhase ||
+            ctx->test_state == kSuspendStateBusReset ||
+            ctx->test_state == kSuspendStatePowerOnReset ||
+            ctx->test_state == kSuspendStateDeepSleep);
+
+  // If we can reuse the existing software state and device configuration for
+  // this phase then we avoid reinitialization...
+  if (ctx->test_state != kSuspendStateNextPhase) {
+    TRY(software_init(ctx));
+  }
+
+  switch (ctx->test_state) {
+    case kSuspendStatePowerOnReset:
+    case kSuspendStateBusReset:
+      // In this case, since we have no retention RAM, we must wait until the
+      // host has reconfigured us; do not wait indefinitely, in case something
+      // has gone wrong.
+      if (physical_timings()) {
+        timeout_set(ctx, TimeoutPhysConfig);
+      } else {
+        // It should take only a few bus frames even with the older, slower DPI
+        // behavior.
+        timeout_frames_set(ctx, 8u);
+      }
+
+      if (verbose) {
+        LOG_INFO("waiting to be configured");
+      }
+
+      while (usbdev_control.device_state != kUsbTestutilsDeviceConfigured &&
+             !ibex_timeout_check(&ctx->timeout)) {
+        TRY(usb_testutils_poll(ctx->usbdev));
+      }
+
+      // If we're out of step with the DPI model/host, stop the test.
+      TRY_CHECK(usbdev_control.device_state == kUsbTestutilsDeviceConfigured);
+
+      // The DPI model still needs to complete the 'SET_DEVICE_CONFIG' bus frame
+      // and then devote another bus frame to reading the test configuration.
+      // (GET_TEST_CONFIG), so we must expect to wait longer before seeing the
+      // Suspend signaling.
+      timeout += FramesConfigDelay;
+      break;
+
+    case kSuspendStateNextPhase:
+      // Software and device should already be up and running.
+      break;
+
+    default:
+      TRY_CHECK(ctx->test_state == kSuspendStateDeepSleep);
+
+      if (ctx->with_traffic) {
+        // Reinstate the stream information, now that we've set up the basic
+        // software structures for streaming.
+        TRY_CHECK(ctx->retn_state.client_used <=
+                  sizeof(ctx->retn_state.client_state));
+        TRY(usb_testutils_streams_resume(&usbdev_streams,
+                                         ctx->retn_state.client_state,
+                                         ctx->retn_state.client_used));
+      }
+
+      // Collect the device address and configuration previously used.
+      const uint8_t dev_address = ctx->retn_state.dev_address;
+      const uint8_t dev_config = ctx->retn_state.dev_config;
+
+      // NOTE: We have run through the usb_testutils/controlep_init sequence as
+      // normal because this sets up our endpoints as they were before, whilst
+      // requiring less information to be stored in the retention RAM, but we
+      // must still reinstate the Data Toggle bits and the Device Address
+#if USBDEV_HAVE_TOGGLE_STATE
+      uint16_t out_toggles = (uint16_t)ctx->retn_state.data_toggles;
+      uint16_t in_toggles = (uint16_t)(ctx->retn_state.data_toggles >> 16);
+      const uint16_t mask = (uint16_t)((1u << USBDEV_NUM_ENDPOINTS) - 1u);
+      CHECK_DIF_OK(dif_usbdev_data_toggle_out_write(ctx->usbdev->dev, mask,
+                                                    out_toggles));
+      CHECK_DIF_OK(
+          dif_usbdev_data_toggle_in_write(ctx->usbdev->dev, mask, in_toggles));
+#endif
+      CHECK_DIF_OK(dif_usbdev_address_set(ctx->usbdev->dev, dev_address));
+
+      // TODO: the controlep state needs to be forced to configured.
+      // TODO: introduce an API call to set/restore the state information for
+      // the control endpoint, to keep things a little cleaner/more contained?
+      usbdev_control.device_state = kUsbTestutilsDeviceConfigured;
+      usbdev_control.usb_config = dev_config;
+      usbdev_control.new_dev = dev_address;
+
+      // At this point we expected the device to be in the Powered state, and
+      // since it won't see a Bus Reset, we nudge it into the ActiveNoSOF state.
+      dif_usbdev_link_state_t link_state;
+      TRY(dif_usbdev_status_get_link_state(ctx->usbdev->dev, &link_state));
+      TRY_CHECK(link_state == kDifUsbdevLinkStatePowered ||
+                link_state == kDifUsbdevLinkStateDisconnected);
+
+      if (link_state == kDifUsbdevLinkStatePowered) {
+        TRY(dif_usbdev_resume_link_to_active(ctx->usbdev->dev));
+      }
+
+#if USBDEV_HAVE_TOGGLE_STATE
+      if (verbose) {
+        LOG_INFO("in_toggles 0x%03x out_toggles 0x%03x", in_toggles,
+                 out_toggles);
+      }
+#else
+      if (ctx->with_traffic) {
+        LOG_INFO("Warning: Unable to reinstate Data Toggle bits");
+      }
+#endif
+      break;
+  }
+
+  // Indication that we've started.
+  if (ctx->test_state != kSuspendStateNextPhase) {
+    if (ctx->with_traffic) {
+      if (ctx->test_state == kSuspendStateDeepSleep) {
+        if (verbose) {
+          LOG_INFO("Resuming streaming...");
+        }
+      } else {
+        if (verbose) {
+          LOG_INFO("Configured; starting streaming...");
+        }
+      }
+    } else {
+      if (verbose) {
+        LOG_INFO("Configured; not trying to stream...");
+      }
+    }
+  }
+
+  // Enter the appropriate starting state based upon the test phase
+  switch (ctx->test_phase) {
+    case kSuspendPhaseShutdown:
+      // Just disconnect from the bus and await notification via the link
+      // callback handler.
+      TRY(dif_usbdev_interface_enable(ctx->usbdev->dev, kDifToggleDisabled));
+      state_enter(ctx, kSuspendStateWaitDisconnect);
+      break;
+
+    case kSuspendPhaseSuspend:
+      state_enter(ctx, kSuspendStateWaitSuspend);
+      break;
+
+    default:
+      CHECK(ctx->test_phase == kSuspendPhaseDeepDisconnect);
+      OT_FALLTHROUGH_INTENDED;
+    case kSuspendPhaseDeepReset:
+    case kSuspendPhaseDeepResume:
+      if (ctx->test_state == kSuspendStateDeepSleep) {
+        state_enter(ctx, kSuspendStateDeepWaking);
+        break;
+      }
+      // If we're starting one of the Deep phases rather than waking from
+      // DeepSleep then it's the same as starting a normal Sleep phase.
+      OT_FALLTHROUGH_INTENDED;
+    //
+    case kSuspendPhaseSleepDisconnect:
+    case kSuspendPhaseSleepReset:
+    case kSuspendPhaseSleepResume:
+      if (host_suspends) {
+        // TODO: human intervention required presently
+        //        timeout *= 2000;
+      }
+      state_enter(ctx, kSuspendStateWaitLongSuspend);
+      break;
+  }
+  // Initialize timeout to catch any failure of the host to suspend the bus
+  timeout_frames_set(ctx, timeout);
+
+  return OK_STATUS();
+}
+
+////////////////////////////////////////////////////////////////////////////////
+// Foreground event handling
+//
+// Some monitoring activities must occur in the foreground because the
+// monitored event is neither immediate nor will it trigger a link
+// event.
+////////////////////////////////////////////////////////////////////////////////
+
+static status_t state_service(usbdev_suspend_ctx_t *ctx) {
+  switch (ctx->test_state) {
+    case kSuspendStateActivatedAON:
+      // Since the AON/Wakeup operates on a low clock frequency, it may
+      // take some time for it to become active....await its signal
+      TRY(collect_wake_status(ctx));
+      if (ctx->wake_status.active) {
+        // Retain our state information
+        TRY(dif_usbdev_address_get(ctx->usbdev->dev,
+                                   &ctx->retn_state.dev_address));
+        ctx->retn_state.dev_config = usbdev_control.usb_config;
+        ctx->retn_state.test_phase = (uint8_t)ctx->test_phase;
+        // Remember the number of remaining iterations.
+        ctx->retn_state.num_iters = ctx->num_iters;
+#if USBDEV_HAVE_TOGGLE_STATE
+        // Capture all current Data Toggle bits
+        uint16_t out_toggles, in_toggles;
+        TRY(dif_usbdev_data_toggle_out_read(ctx->usbdev->dev, &out_toggles));
+        TRY(dif_usbdev_data_toggle_in_read(ctx->usbdev->dev, &in_toggles));
+        ctx->retn_state.data_toggles =
+            ((uint32_t)in_toggles << 16) | out_toggles;
+#else
+        ctx->retn_state.data_toggles = 0U;
+#endif
+        if (verbose) {
+          LOG_INFO(" - retaining address %u config %u phase %u (%s)",
+                   ctx->retn_state.dev_address, ctx->retn_state.dev_config,
+                   ctx->retn_state.test_phase,
+                   phase_name(ctx->retn_state.test_phase));
+        }
+
+        if (ctx->with_traffic) {
+          // Store any state information that is necessary to resume streaming.
+          unsigned used;
+          TRY(usb_testutils_streams_suspend(
+              &usbdev_streams, ctx->retn_state.client_state,
+              sizeof(ctx->retn_state.client_state), &used));
+          TRY_CHECK(used <= sizeof(ctx->retn_state.client_state));
+          ctx->retn_state.client_used = used;
+        }
+
+        retention_sram_store(&ctx->retn_state);
+
+        // TODO: migrate this into a subfunction
+        // Enter low power mode; note that on some targets we may be unable to
+        // produce the appropriate stimuli so we have to skip over the sleep
+        // state.
+        bool can_awaken = true;
+        switch (ctx->test_phase) {
+          case kSuspendPhaseSleepReset:
+          case kSuspendPhaseDeepReset:
+            if (!host_resets) {
+              if (verbose) {
+                LOG_INFO("auto-skipping WFI (host does not support Bus Resets");
+              }
+              can_awaken = false;
+            }
+            break;
+
+          case kSuspendPhaseSleepDisconnect:
+          case kSuspendPhaseDeepDisconnect:
+            if (!host_disconnects) {
+              if (verbose) {
+                LOG_INFO(
+                    "auto-skipping WFI (host does not support Disconnects");
+              }
+              can_awaken = false;
+            }
+            break;
+
+          default:
+            TRY_CHECK(ctx->test_phase == kSuspendPhaseSleepResume ||
+                      ctx->test_phase == kSuspendPhaseDeepResume);
+            if (!host_resumes) {
+              if (verbose) {
+                LOG_INFO(
+                    "auto-skipping WFI (host does not support Resume "
+                    "Signaling");
+              }
+              can_awaken = false;
+            }
+            break;
+        }
+
+        if (can_awaken) {
+          if (ctx->test_phase == kSuspendPhaseDeepResume ||
+              ctx->test_phase == kSuspendPhaseDeepReset ||
+              ctx->test_phase == kSuspendPhaseDeepDisconnect) {
+            if (verbose) {
+              LOG_INFO("Requesting Deep sleep");
+            }
+
+            // Deep sleep.
+            //
+            // Note: we must keep the 'Active USB clock enable' bit set,
+            // because otherwise when we return to the active state, the
+            // usbdev clock will not be restored.
+            TRY(pwrmgr_testutils_enable_low_power(
+                &pwrmgr, kDifPwrmgrWakeupRequestSourceFour,
+                /*domain_config=*/
+                kDifPwrmgrDomainOptionUsbClockInActivePower));
+
+            // Record that we've asked to power down; timeout should never
+            // occur.
+            state_enter(ctx, kSuspendStateDeepSleep);
+            timeout_frames_set(ctx, TimeoutSleepFailed);
+          } else {
+            LOG_INFO("Requesting Normal sleep");
+
+            // Normal sleep.
+            TRY(pwrmgr_testutils_enable_low_power(
+                &pwrmgr, /*wakeups=*/kDifPwrmgrWakeupRequestSourceFour,
+                /*domain_config=*/
+                kDifPwrmgrDomainOptionCoreClockInLowPower |
+                    kDifPwrmgrDomainOptionUsbClockInActivePower |
+                    kDifPwrmgrDomainOptionMainPowerInLowPower));
+
+            // Record that we've asked to enter lower power mode; timeout
+            // should never occur.
+            state_enter(ctx, kSuspendStateNormalSleep);
+            timeout_frames_set(ctx, TimeoutSleepFailed);
+          }
+
+          // With a physical host (FPGA) some manual intervention is required.
+          const char *action = "";
+          if (physical_timings()) {
+            switch (ctx->test_phase) {
+              case kSuspendPhaseSleepReset:
+              case kSuspendPhaseDeepReset:
+                action = "; please Reset the device.";
+                break;
+              case kSuspendPhaseSleepDisconnect:
+              case kSuspendPhaseDeepDisconnect:
+                action = "; please disconnect and reconnect the USB cable.";
+                break;
+              default:
+                break;
+            }
+          }
+          // sense_report(ctx, 10);
+          if (verbose) {
+            LOG_INFO("Issuing WFI to enter sleep%s", action);
+          }
+          wait_for_interrupt();
+
+          // Check that a DeepSleep request did not somehow run past the
+          // WFI...
+          TRY_CHECK(ctx->test_state == kSuspendStateNormalSleep);
+        }
+
+        //---------------------------------------------------------------
+        // After a Normal sleep, we resume execution here; after a Deep
+        // sleep we start again as if from a Power On Reset, but the
+        // pwrmgr tells us otherwise.
+        //---------------------------------------------------------------
+
+        // TODO: check the IRQ source in the event of a Normal Sleep and
+        // proceeding past the WFI
+
+        // ... and we should be in one of these test phases.
+        TRY_CHECK(ctx->retn_state.test_phase == kSuspendPhaseSleepResume ||
+                  ctx->retn_state.test_phase == kSuspendPhaseSleepReset ||
+                  ctx->retn_state.test_phase == kSuspendPhaseSleepDisconnect ||
+                  (!host_resumes &&
+                   ctx->retn_state.test_phase == kSuspendPhaseDeepResume) ||
+                  (!host_resets &&
+                   ctx->retn_state.test_phase == kSuspendPhaseDeepReset) ||
+                  (!host_disconnects &&
+                   ctx->retn_state.test_phase == kSuspendPhaseDeepDisconnect));
+
+        // Retrieve it and check; just additional testing.
+        usbdev_retn_state_t stored_state;
+        retention_sram_load(&stored_state);
+        if (verbose) {
+          LOG_INFO(" - retained address %u config %u phase %u (%s)",
+                   stored_state.dev_address, stored_state.dev_config,
+                   stored_state.test_phase,
+                   phase_name(stored_state.test_phase));
+        }
+
+        // Check that the Retention SRAM did its job over Normal Sleep at least;
+        // the SRAM should remain powered and clocked so this should not be
+        // challenging.
+        TRY_CHECK(stored_state.dev_address == ctx->retn_state.dev_address &&
+                  stored_state.dev_config == ctx->retn_state.dev_config &&
+                  stored_state.test_phase == ctx->retn_state.test_phase &&
+                  stored_state.num_iters == ctx->retn_state.num_iters &&
+                  stored_state.data_toggles == ctx->retn_state.data_toggles);
+
+        dif_pwrmgr_wakeup_reason_t wakeup_reason;
+        TRY(dif_pwrmgr_wakeup_reason_get(&pwrmgr, &wakeup_reason));
+
+        if (verbose) {
+          LOG_INFO("wakeup types 0x%x sources 0x%x", wakeup_reason.types,
+                   wakeup_reason.request_sources);
+        }
+
+        state_enter(ctx, kSuspendStateNormalWaking);
+        // We just need to previous spurious timeouts at this point.
+        timeout_frames_set(ctx, TimeoutSleepFailed);
+      }
+      break;
+
+    case kSuspendStateNormalWaking:
+    case kSuspendStateDeepWaking:
+      // We've returned from sleeping; enquire of the USB AON Wake module
+      // what happened...
+      TRY(collect_wake_status(ctx));
+
+      // There are three ways that we may exit from Deep Sleep in which
+      // the AON/Wake module has been handling the bus:
+      // - Disconnecion (loss of VBUS/SENSE)
+      // - Bus Reset (from host)
+      // - Non-Idle state detected (Resume Signaling; this is inferred by
+      //   neither of the other two conditions having occurred.)
+      //   Resume signaling shall last at last 20ms, but the AON/Wake
+      //   module alerts us long before that time has elapsed.
+
+      // Check the report from the AON/Wakeup module
+      if (ctx->wake_status.active) {
+        bool got_signal = false;
+
+        switch (ctx->test_phase) {
+          case kSuspendPhaseSleepResume:
+          case kSuspendPhaseDeepResume:
+            got_signal = !host_resumes || (ctx->wake_status.bus_not_idle != 0);
+            break;
+
+          case kSuspendPhaseSleepReset:
+          case kSuspendPhaseDeepReset:
+            got_signal = !host_resets || (ctx->wake_status.bus_reset != 0);
+            break;
+
+          default:
+            TRY_CHECK(ctx->test_phase == kSuspendPhaseDeepDisconnect);
+            OT_FALLTHROUGH_INTENDED;
+          case kSuspendPhaseSleepDisconnect:
+            got_signal =
+                !host_disconnects || (ctx->wake_status.disconnected != 0);
+            break;
+        }
+
+        if (got_signal) {
+          // TODO: Issue #18562 VBUS Disconnection leaves pull ups asserted
+          // by the USB AON Wake module, so disconnect them here before
+          // potential confusion results.
+          if (ctx->wake_status.disconnected) {
+            bool sense;
+
+            TRY(dif_usbdev_status_get_sense(ctx->usbdev->dev, &sense));
+            if (verbose) {
+              LOG_INFO("Handling Disconnection when VBUS %sasserted",
+                       sense ? "" : "de-");
+            }
+
+            // TODO: experimental test code! DO NOT MERGE
+            if (false) {
+              static uint8_t buf[4096];
+              extern void usbutils_gather(dif_usbdev_t * dev, uint8_t * buf,
+                                          size_t n);
+
+              while (!sense) {
+                TRY(dif_usbdev_status_get_sense(ctx->usbdev->dev, &sense));
+              }
+
+              usbutils_gather(ctx->usbdev->dev, buf, sizeof(buf));
+            }
+
+            // If VBUS/SENSE is not asserted, then the pull up will be removed
+            // as soon as the AON Wake module is deactivated, because usbdev
+            // qualifies its own pull up assertions with VBUS/SENSE presence.
+            if (sense) {
+              TRY(dif_usbdev_interface_enable(ctx->usbdev->dev, false));
+            }
+          }
+
+          // Signal to the AON wakeup module that it should deactivate and
+          // relinquish control of the bus
+          TRY(dif_usbdev_set_wake_enable(ctx->usbdev->dev, kDifToggleDisabled));
+
+          // Although it operates at only 200kHz, it should't take long
+          state_enter(ctx, kSuspendStateAONWakeup);
+          timeout_frames_set(ctx, TimeoutAonResponse);
+        } else {
+          LOG_INFO("Unexpected report from USB AON Wake module");
+          report_wake_status(ctx);
+          state_enter(ctx, kSuspendStateFailed);
+        }
+      } else {
+        LOG_INFO("AON/Wake module not active when expected");
+        state_enter(ctx, kSuspendStateFailed);
+      }
+      break;
+
+    case kSuspendStateAONWakeup:
+      // Since the AON wakeup module operates on a much lower clock
+      // frequency it may take some time for it to stop monitoring and to
+      // report becoming inactive...
+      TRY(collect_wake_status(ctx));
+      if (!ctx->wake_status.active) {
+        // If we've been awoken by a Disconnection event or by a Bus Reset
+        // event rather than by Resume Signaling, then we must advance to
+        // the next test phase and expect to be reconfigured.
+        //
+        // Note: at this point we may assume that we _did_ get the
+        // expected wakeup stimulus/report, because it was checked above.
+        switch (ctx->test_phase) {
+          case kSuspendPhaseSleepDisconnect:
+          case kSuspendPhaseDeepDisconnect:
+            state_enter(ctx, host_disconnects ? kSuspendStatePowerOnReset
+                                              : kSuspendStateNextPhase);
+            break;
+
+          case kSuspendPhaseSleepReset:
+          case kSuspendPhaseDeepReset:
+            // TODO: Check! Reset Signaling is still ongoing at this point?
+            // state_enter(ctx, kSuspendStateWaitBusReset);
+            state_enter(ctx, kSuspendStateBusReset);
+            break;
+
+          default:
+            TRY_CHECK(ctx->test_phase == kSuspendPhaseDeepResume);
+            OT_FALLTHROUGH_INTENDED;
+          case kSuspendPhaseSleepResume:
+            state_enter(ctx, kSuspendStateWaitResumeTimeout);
+            timeout_set(ctx, TimeoutWakeupResume);
+            break;
+        }
+      } else {
+        LOG_INFO("AON Wake module not active when expected");
+        state_enter(ctx, kSuspendStateFailed);
+      }
+      break;
+
+      // TODO: do we still want this state?
+    case kSuspendStateWaitFinish:
+      break;
+
+    // Phase-initial/-final states in which we don't need to do anything here.
+    case kSuspendStatePowerOnReset:
+    case kSuspendStateBusReset:
+    case kSuspendStateNextPhase:
+    case kSuspendStateComplete:
+    case kSuspendStateFailed:
+      break;
+
+    // Verdict already decided.
+
+    // States in which we sit waiting - with a timeout - for something
+    // significant to happen...
+    default:
+      TRY_CHECK(ctx->test_state == kSuspendStateWaitResumeTimeout);
+      OT_FALLTHROUGH_INTENDED;
+    case kSuspendStateWaitSuspend:
+    case kSuspendStateWaitResume:
+    case kSuspendStateWaitBusReset:
+    case kSuspendStateWaitLongSuspend:
+    case kSuspendStateWaitSuspendTimeout:
+    case kSuspendStateWaitDisconnect:
+      break;
+  }
+
+  return OK_STATUS();
+}
+
+/**
+ * Run a single test phase to completion
+ */
+static status_t phase_run(usbdev_suspend_ctx_t *ctx) {
+  bool send_progress = (ctx->test_state != kSuspendStateDeepSleep);
+  bool phase_done = false;
+
+  // Handle the phase-initial state or resuming from Deep Sleep and continuing
+  // in the present phase.
+  TRY(phase_start_resume(ctx));
+
+  if (send_progress) {
+    report_progress("Phase awaiting stimulus (%s)",
+                    phase_name(ctx->test_phase));
+  }
+
+  switch (ctx->test_state) {
+    case kSuspendStateBusReset:
+    case kSuspendStateNextPhase:
+    case kSuspendStatePowerOnReset:
+    case kSuspendStateComplete:
+    case kSuspendStateFailed:
+      LOG_INFO(
+          "Phase-initial state %u (%s) should have been handled in "
+          "phase_start()",
+          ctx->test_state, state_name(ctx->test_state));
+      return FAILED_PRECONDITION();
+    default:
+      break;
+  }
+
+  // The DPI model and our callback handler for USB link events do most of the
+  // work of walking through the test states until completion
+  do {
+    if (ibex_timeout_check(&ctx->timeout)) {
+      TRY(timeout_handle(ctx));
+    } else {
+      TRY(state_service(ctx));
+    }
+
+    switch (ctx->test_state) {
+      // These states terminate the phase, either advancing to the next phase
+      // or terminating the test sequence.
+      case kSuspendStateBusReset:
+      case kSuspendStateNextPhase:
+      case kSuspendStatePowerOnReset:
+      case kSuspendStateComplete:  // from PhaseShutdown only
+      case kSuspendStateFailed:    // from any phase
+        phase_done = true;
+        break;
+
+      // Do not poll the USB device or perform traffic in these states.
+      case kSuspendStateActivatedAON:
+      case kSuspendStateAONWakeup:
+      case kSuspendStateDeepSleep:
+      case kSuspendStateNormalSleep:
+        break;
+
+      // TODO:
+      case kSuspendStateWaitResume:
+        // No traffic, but we must still poll the usb_testutils layer to
+        // handle hardware events and callbacks.
+        TRY(usb_testutils_poll(ctx->usbdev));
+        break;
+
+      default:
+        if (ctx->with_traffic) {
+          // Servicing streams handles usbdev/testutils events for us.
+          //
+          // TODO: streaming code has been integrated, but it would probably be
+          // quite useful to be able to see the device streaming activity too,
+          // not just that of the host side?
+          TRY(usb_testutils_streams_service(&usbdev_streams));
+        } else {
+          // No traffic, but we must still poll the usb_testutils layer to
+          // handle hardware events and callbacks.
+          TRY(usb_testutils_poll(ctx->usbdev));
+        }
+        break;
+    }
+  } while (!phase_done);
+
+  // Advance to next phase, unless we have just completed the final phase or
+  // the test has failed.
+  switch (ctx->test_state) {
+    case kSuspendStatePowerOnReset:
+    case kSuspendStateBusReset:
+    case kSuspendStateNextPhase: {
+      // Was this the final phase of the test?
+      usbdev_suspend_phase_t next_phase =
+          (usbdev_suspend_phase_t)(ctx->test_phase + 1u);
+      bool completed = false;
+      if (ctx->test_phase == ctx->fin_phase) {
+        if (ctx->num_iters == USBDEV_SUSPEND_ETERNAL || --ctx->num_iters > 0u) {
+          LOG_INFO("Rewinding to initial phase");
+          if (ctx->num_iters > 0u) {
+            LOG_INFO(" - %u iteration(s) remaining", ctx->num_iters);
+          }
+          next_phase = ctx->init_phase;
+        } else {
+          completed = true;
+        }
+      }
+      // Have we completed the entire test?
+      if (completed) {
+        state_enter(ctx, kSuspendStateComplete);
+      } else {
+        // Advance to the next test phase, or rewind for the next iteration.
+        phase_set(ctx, next_phase);
+      }
+    } break;
+
+    default:
+      TRY_CHECK(ctx->test_state == kSuspendStateComplete ||
+                ctx->test_state == kSuspendStateFailed);
+      break;
+  }
+
+  return OK_STATUS();
+}
+
+bool usbdev_suspend_test(usbdev_suspend_phase_t init_phase,
+                         usbdev_suspend_phase_t fin_phase, uint32_t num_iters,
+                         bool with_traffic) {
+  usbdev_suspend_ctx_t *ctx = &suspend_ctx;
+
+  // Wipe out any memory from the previous test phase, just to be more confident
+  // that we really are resuming from Deep Sleep and using only the Retention
+  // SRAM contents to resume.
+  //
+  // This also means that the data we subsequently store in the Retention SRAM
+  // has defined values for the unused padding fields.
+  memset(ctx, 0, sizeof(*ctx));
+
+  // Enable global and external IRQ at Ibex.
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
+  // Remember the phase in which we are to stop.
+  CHECK(fin_phase >= init_phase);
+  ctx->init_phase = init_phase;
+  ctx->fin_phase = fin_phase;
+
+  // Default behavior - for simulation with the DPI - is that all types of
+  // signaling can be performed, in response to reading the test description.
+  host_suspends = true;
+  host_resumes = true;
+  host_resets = true;
+  host_disconnects = true;
+
+  // DPI model can perform traffic and will deliberately avoid performing
+  // traffic during the periods when it stops sending the bus frames
+
+  // Override any of the above switches according to the build target.
+  switch (kDeviceType) {
+    case kDeviceSimVerilator:
+      // steal the UART output and send it via a faster mechanism
+      base_set_stdout(base_stdout);
+      verbose = true;
+
+#if !USBDPI_FULL_FRAME
+      frame_interval = 500u;  // Reduce to 0.5ms to shorten simulation time.
+#endif
+      break;
+
+    // Do NOT steal the UART output in this case because DVsim has a back door
+    // for rapid logging.
+    case kDeviceSimDV:
+      verbose = true;
+      break;
+
+    case kDeviceSilicon:
+      // Silicon targets are presently tested with the use of the HyperDebug
+      // board for control over the VBUS connection.
+      // Suspend, Resume and Reset operations all rely upon control of the
+      // parent USB hub.
+      host_suspends = true;
+      host_resumes = true;
+      host_resets = true;
+      host_disconnects = true;
+      verbose = false;
+      break;
+
+    default:
+      CHECK(kDeviceType == kDeviceFpgaCw310);
+      OT_FALLTHROUGH_INTENDED;
+    case kDeviceFpgaCw340:
+      // FPGA host can be used to perform Bus Resets and (with hoop-jumping)
+      // Suspend and Resume. With physical intervention or perhaps a capable
+      // hub it can perform VBUS Disconnects; such hubs are a rare minority,
+      // however.
+      host_suspends = true;
+      host_resumes = true;
+      host_resets = true;
+      // this must still be exercised manually with FPGA boards.
+      host_disconnects = false;
+
+      // Presently, the FPGA build is expected to be observed/monitored by a
+      // developer, so verbose reporting is appropriate.
+      verbose = false;  // true;
+      break;
+  }
+
+  ctx->with_traffic = with_traffic;
+
+  // Initialize pinmux.
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  pinmux_testutils_init(&pinmux);
+  CHECK_DIF_OK(dif_pinmux_input_select(
+      &pinmux, kTopEarlgreyPinmuxPeripheralInUsbdevSense,
+      kTopEarlgreyPinmuxInselIoc7));
+
+  // Initialize pwrmgr.
+  CHECK_DIF_OK(dif_pwrmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_PWRMGR_AON_BASE_ADDR), &pwrmgr));
+
+  // Initialize the PLIC.
+  CHECK_DIF_OK(dif_rv_plic_init(
+      mmio_region_from_addr(TOP_EARLGREY_RV_PLIC_BASE_ADDR), &rv_plic));
+
+  // Initialize rstmgr
+  CHECK_DIF_OK(dif_rstmgr_init(
+      mmio_region_from_addr(TOP_EARLGREY_RSTMGR_AON_BASE_ADDR), &rstmgr));
+
+  // Enable all the AON interrupts used in this test.
+  rv_plic_testutils_irq_range_enable(&rv_plic, kTopEarlgreyPlicTargetIbex0,
+                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup,
+                                     kTopEarlgreyPlicIrqIdPwrmgrAonWakeup);
+
+  CHECK_DIF_OK(dif_pwrmgr_set_request_sources(&pwrmgr, kDifPwrmgrReqTypeWakeup,
+                                              kDifPwrmgrWakeupRequestSourceFour,
+                                              kDifToggleEnabled));
+
+  // Enable pwrmgr interrupt.
+  CHECK_DIF_OK(dif_pwrmgr_irq_set_enabled(&pwrmgr, 0, kDifToggleEnabled));
+
+  // Check if there was a HW reset caused by the wdog bite.
+  dif_rstmgr_reset_info_bitfield_t rst_info = rstmgr_testutils_reason_get();
+  rstmgr_testutils_reason_clear();
+
+  // Initialize testing context and state machine
+  ctx->usbdev = &usbdev;
+
+  if (rst_info == kDifRstmgrResetInfoPor) {
+    const char *iters = "eternally";
+    static char buf[20];
+
+    report_progress("Running USBDEV_SUSPEND test");
+
+    // Remember the requested iteration count.
+    ctx->num_iters = num_iters;
+
+    // Report the iteration count
+    if (num_iters != USBDEV_SUSPEND_ETERNAL) {
+      base_snprintf(buf, sizeof(buf), "%u times", num_iters);
+      iters = buf;
+    }
+    LOG_INFO("  (seq: %s to %s %s with%s traffic)", phase_name(init_phase),
+             phase_name(ctx->fin_phase), iters, ctx->with_traffic ? "" : "out");
+
+    // Power On Reset
+    LOG_INFO("Booting for the first time");
+
+    phase_set(ctx, init_phase);
+    state_enter(ctx, kSuspendStatePowerOnReset);
+  } else {
+    if (verbose) {
+      // Avoid UART-based logging as much as possible because producing UART
+      // traffic will stall the CPU waiting on FIFO space, and that can lead to
+      // USB timeouts when attempting to Resume from Deep Sleep.
+      LOG_INFO("Resuming from power down!");
+    }
+
+    // Recover state from the retention RAM
+    retention_sram_load(&ctx->retn_state);
+    if (verbose) {
+      LOG_INFO(" - retained address %u config %u phase %u (%s)",
+               ctx->retn_state.dev_address, ctx->retn_state.dev_config,
+               ctx->retn_state.test_phase,
+               phase_name(ctx->retn_state.test_phase));
+    }
+
+    // To have arrived we should be in one of these test phases and we should
+    // have been in kSuspendStateDeepSleep, so we have not retained that.
+    CHECK(ctx->retn_state.test_phase == kSuspendPhaseDeepResume ||
+          ctx->retn_state.test_phase == kSuspendPhaseDeepReset ||
+          ctx->retn_state.test_phase == kSuspendPhaseDeepDisconnect);
+
+    // We can - presently - check the other parameters; revise/remove this code
+    // if the configuration becomes more variable.
+    CHECK(ctx->retn_state.dev_config == 1u);
+
+    // Reinstate the remaining test iteration count from the retained state.
+    ctx->num_iters = ctx->retn_state.num_iters;
+
+    // We must remain in the DeepSleep state in order to reinitialize the
+    // software, run through AON Wake deactivation and then check the reason
+    // for waking.
+    phase_set(ctx, ctx->retn_state.test_phase);
+    state_enter(ctx, kSuspendStateDeepSleep);
+  }
+
+  do {
+    // Run this test phase
+    CHECK_STATUS_OK(phase_run(ctx));
+
+    // Keep going if we're advancing to the next phase.
+    //  (NextPhase means that we advance whilst still active and can thus skip
+    //   device setup and configuratinon)
+  } while (ctx->test_state == kSuspendStateNextPhase ||    // from Resume
+           ctx->test_state == kSuspendStateBusReset ||     // after Bus Reset
+           ctx->test_state == kSuspendStatePowerOnReset);  // after Disconnect
+
+  if (verbose) {
+    LOG_INFO("Test concluding (%s)", state_name(ctx->test_state));
+  }
+
+  // Wait enough for a SOF (>1ms) and tear down the software stack.
+  // Note: there is no finalization code for the streaming at present, because
+  // it has no resources to release.
+  busy_spin_micros(1000);
+  CHECK_STATUS_OK(usb_testutils_fin(ctx->usbdev));
+
+#if USBUTILS_FUNCTION_POINTS && USBUTILS_FUNCPT_USE_BUFFER
+  if (false) {
+    usbutils_funcpt_report();
+  }
+#endif
+
+  return (ctx->test_state == kSuspendStateComplete);
+}
diff --git a/sw/device/tests/usbdev_suspend.h b/sw/device/tests/usbdev_suspend.h
new file mode 100644
index 0000000000000..7958728a77b15
--- /dev/null
+++ b/sw/device/tests/usbdev_suspend.h
@@ -0,0 +1,84 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#ifndef OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_
+#define OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_
+#include <stdbool.h>
+#include <stdint.h>
+
+// USB suspend/resume test
+//
+// The testing of suspend, sleep, wakeup and resume logic can consume a _lot_
+// of simulation time because the timings of the USB protocol are very
+// conservative, eg. Resume Signaling should occur for at least 20ms and Reset
+// Signaling should be at least 10ms. These durations are impractical for
+// chip simulation, so the DPI model intentionally shortens these delays.
+//
+// Additionally, to exercise both Normal and Deep Sleep modes and the three
+// different reasons for waking from each sleep, the total number of test
+// phases/states is prohibitive for a single simulation. Individual top-level
+// tests therefore specify a range of test phases, and it is expected that the
+// full sequence shall only ever be exercised on FPGA with a physical host.
+
+// Iteration count that denotes looping indefinitely
+#define USBDEV_SUSPEND_ETERNAL 0U
+
+/**
+ * Test phases; named according to the event that we are expecting to occur.
+ */
+typedef enum {
+  /**
+   * First test phase just tests regular Suspend/Resume signaling; after we've
+   * resumed, we expect a Bus Reset from the DPI/Host.
+   */
+  kSuspendPhaseSuspend = 0u,
+  /**
+   * This test phase instructs the DPI model to put the DUT into Suspend long
+   * enough that this software will attempt to put the device into its Normal
+   * Sleep state and exercise the AON/Wakeup module, stopping the clocks but not
+   * powering down.
+   */
+  kSuspendPhaseSleepResume,
+  /*
+   * The AON/Wakeup module will cause us to awaken in response to a bus reset.
+   */
+  kSuspendPhaseSleepReset,
+  /**
+   * As above, but this time we're expecting a VBUS/SENSE loss.
+   */
+  kSuspendPhaseSleepDisconnect,
+  /**
+   * Mirrors Resume detection for normal sleep, but this time we enter Deep
+   * Sleep and the power is removed too.
+   */
+  kSuspendPhaseDeepResume,
+  /**
+   * Mirrors Bus Reset detection for normal sleep, but this time we enter Deep
+   * Sleep and the power is removed too.
+   */
+  kSuspendPhaseDeepReset,
+  /**
+   * As above, but this time we're expecting a VBUS/SENSE loss.
+   */
+  kSuspendPhaseDeepDisconnect,
+  /**
+   * Final phase; shut down.
+   */
+  kSuspendPhaseShutdown,
+} usbdev_suspend_phase_t;
+
+/**
+ * USB Suspend/Sleep/Wakeup/Resume test body.
+ *
+ * @param init_phase   Initial phase of test (inclusive).
+ * @param fin_phase    Final phase of test (inclusive).
+ * @param num_iters    Number of iterations of the phase sequence. (0 = eternal)
+ * @param with_traffic Perform streaming throughout test.
+ * @param return       Successful completion of test.
+ */
+bool usbdev_suspend_test(usbdev_suspend_phase_t init_phase,
+                         usbdev_suspend_phase_t fin_phase, uint32_t num_iters,
+                         bool with_traffic);
+
+#endif  // OPENTITAN_SW_DEVICE_TESTS_USBDEV_SUSPEND_H_
diff --git a/sw/device/tests/usbdev_suspend_full_test.c b/sw/device/tests/usbdev_suspend_full_test.c
new file mode 100644
index 0000000000000..c7616d42e40c1
--- /dev/null
+++ b/sw/device/tests/usbdev_suspend_full_test.c
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  // Execute the entire test sequence; all test phases.
+  // Note: This is impractical in simulation, and should be used only on FPGA
+  // with a physical host.
+  return usbdev_suspend_test(kSuspendPhaseSuspend, kSuspendPhaseShutdown, 1u,
+                             false);
+}
diff --git a/sw/device/tests/usbdev_suspend_resume_test.c b/sw/device/tests/usbdev_suspend_resume_test.c
new file mode 100644
index 0000000000000..94b03c541a0a1
--- /dev/null
+++ b/sw/device/tests/usbdev_suspend_resume_test.c
@@ -0,0 +1,13 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+#include "sw/device/tests/usbdev_suspend.h"
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  return usbdev_suspend_test(kSuspendPhaseSuspend, kSuspendPhaseSuspend, 1u,
+                             true);
+}
diff --git a/sw/device/tests/usbdev_toggle_restore_test.c b/sw/device/tests/usbdev_toggle_restore_test.c
new file mode 100644
index 0000000000000..922adc00624c3
--- /dev/null
+++ b/sw/device/tests/usbdev_toggle_restore_test.c
@@ -0,0 +1,212 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// USB Device Toggle Restore test
+//
+// This is a simple test to exercise the ability to save and restore the
+// Data Toggle bits within the USB device. That is important for resuming
+// communication with the USB host controller after returning from a
+// Deep Sleep state.
+//
+// Note that this test does not itself attempt to enter/resume from
+// Deep Sleep.
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#include "sw/device/lib/base/status.h"
+#include "sw/device/lib/dif/dif_pinmux.h"
+#include "sw/device/lib/dif/dif_usbdev.h"
+#include "sw/device/lib/runtime/log.h"
+#include "sw/device/lib/testing/pinmux_testutils.h"
+#include "sw/device/lib/testing/test_framework/check.h"
+#include "sw/device/lib/testing/test_framework/ottf_main.h"
+
+#include "hw/top_earlgrey/sw/autogen/top_earlgrey.h"  // Generated.
+
+#define USBDEV_BASE_ADDR TOP_EARLGREY_USBDEV_BASE_ADDR
+
+/**
+ * USB device handle
+ */
+static dif_usbdev_t usbdev;
+
+/**
+ * Pinmux handle
+ */
+static dif_pinmux_t pinmux;
+
+// Wait with timeout until the VBUS/SENSE signal is in the expected state.
+static status_t vbus_wait(bool expected, uint32_t timeout_micros) {
+  ibex_timeout_t timeout = ibex_timeout_init(timeout_micros);
+  do {
+    // Read the current state of VBUS.
+    bool vbus;
+    TRY(dif_usbdev_status_get_sense(&usbdev, &vbus));
+    if (vbus == expected) {
+      return OK_STATUS();
+    }
+  } while (!ibex_timeout_check(&timeout));
+
+  return DEADLINE_EXCEEDED();
+}
+
+// Wait with timeout until the link is in the expected state.
+static status_t link_state_wait(dif_usbdev_link_state_t expected,
+                                uint32_t timeout_micros) {
+  ibex_timeout_t timeout = ibex_timeout_init(timeout_micros);
+  do {
+    // Read the current state of the link.
+    dif_usbdev_link_state_t link_state;
+    TRY(dif_usbdev_status_get_link_state(&usbdev, &link_state));
+    if (link_state == expected) {
+      return OK_STATUS();
+    }
+  } while (!ibex_timeout_check(&timeout));
+
+  return DEADLINE_EXCEEDED();
+}
+
+// Check that the data toggle bits read from the USB device match expectations.
+static void check_toggles(uint16_t exp_out_toggles, uint16_t exp_in_toggles,
+                          bool logging) {
+  uint16_t act_out_toggles;
+  uint16_t act_in_toggles;
+
+  CHECK_DIF_OK(dif_usbdev_data_toggle_out_read(&usbdev, &act_out_toggles));
+  CHECK_DIF_OK(dif_usbdev_data_toggle_in_read(&usbdev, &act_in_toggles));
+
+  // Logging could cause this test to fail with the DPI in simulation and even
+  // lead to flaky behaviour with a physical USB host controller because we
+  // ignore the host for too long and it resorts to issuing a second Bus Reset.
+  if (logging) {
+    LOG_INFO("exp_out_toggles 0x%x act_out_toggles 0x%x", exp_out_toggles,
+             act_out_toggles);
+    LOG_INFO("exp_in_toggles 0x%x act_in_toggles 0x%x", exp_in_toggles,
+             act_in_toggles);
+  }
+
+  CHECK(act_out_toggles == exp_out_toggles);
+  CHECK(act_in_toggles == exp_in_toggles);
+}
+
+OTTF_DEFINE_TEST_CONFIG();
+
+bool test_main(void) {
+  // Mask defining the valid endpoints.
+  const uint16_t all_endpoints = (uint16_t)(1u << USBDEV_NUM_ENDPOINTS) - 1u;
+  // Expected state of the Data Toggle registers.
+  uint16_t exp_out_toggles = (uint16_t)(0xAAAAu & all_endpoints);
+  uint16_t exp_in_toggles = (uint16_t)(0x5555u & all_endpoints);
+  uint32_t timeout_micros = 1000u;
+  // Default to no prompting or logging.
+  bool logging = false;
+  bool prompt = false;
+
+  switch (kDeviceType) {
+    // In simulation the DPI model connects VBUS shortly after reset.
+    case kDeviceSimDV:
+      // logging is harmless for DV sim because of the `sw_logger_if` back door
+      // reducing the simulation time.
+      logging = true;
+      OT_FALLTHROUGH_INTENDED;
+    case kDeviceSimVerilator:
+      // avoid logging with Verilator because it does not have the back door.
+      timeout_micros = 1000u;
+      break;
+    default:
+      // FPGA platforms where user intervention may be required.
+      timeout_micros = 30 * 1000 * 1000u;
+      prompt = true;
+      // logging _may_ be used in this case but it could lead to flakiness,
+      // through a failure to respond to the USB host controller promptly.
+      logging = false;
+      break;
+  }
+
+  // Ensure that the VBUS/SENSE signal is routed through to the usbdev
+  CHECK_DIF_OK(dif_pinmux_init(
+      mmio_region_from_addr(TOP_EARLGREY_PINMUX_AON_BASE_ADDR), &pinmux));
+  pinmux_testutils_init(&pinmux);
+  CHECK_DIF_OK(dif_pinmux_input_select(
+      &pinmux, kTopEarlgreyPinmuxPeripheralInUsbdevSense,
+      kTopEarlgreyPinmuxInselIoc7));
+
+  CHECK_DIF_OK(
+      dif_usbdev_init(mmio_region_from_addr(USBDEV_BASE_ADDR), &usbdev));
+
+  // Firstly, ensure that we are disconnected from the USB; if there's a
+  // physical USB host controller cabled then this will force a reset of the
+  // connection.
+  CHECK_DIF_OK(dif_usbdev_interface_enable(&usbdev, kDifToggleDisabled));
+
+  // Unfortunately we _do_ need to connect to the USB host controller/DPI model
+  // to ensure that the link comes out of reset.
+  bool vbus;
+  CHECK_DIF_OK(dif_usbdev_status_get_sense(&usbdev, &vbus));
+  if (!vbus) {
+    if (prompt) {
+      LOG_INFO("Connect or power up the USB");
+    }
+    CHECK_STATUS_OK(vbus_wait(true, timeout_micros));
+  }
+
+  // Now connect to the bus and wait for the link to come out of reset.
+  CHECK_DIF_OK(dif_usbdev_interface_enable(&usbdev, kDifToggleEnabled));
+  CHECK_STATUS_OK(
+      link_state_wait(kDifUsbdevLinkStateActiveNoSof, timeout_micros));
+  if (prompt) {
+    LOG_INFO("Link out of reset; testing...");
+  }
+
+  // We must then quickly perform the testing before any communication from the
+  // USB host controller occurs, because any communication will interfere with
+  // the data toggle bits.
+
+  // Set up a test pattern in the registers, putting all data toggle bits into
+  // a defined state.
+  CHECK_DIF_OK(dif_usbdev_data_toggle_out_write(&usbdev, all_endpoints,
+                                                exp_out_toggles));
+  CHECK_DIF_OK(
+      dif_usbdev_data_toggle_in_write(&usbdev, all_endpoints, exp_in_toggles));
+
+  // Check that they read as expected.
+  check_toggles(exp_out_toggles, exp_in_toggles, logging);
+
+  // Write an inverted test pattern.
+  exp_out_toggles ^= all_endpoints;
+  exp_in_toggles ^= all_endpoints;
+  CHECK_DIF_OK(dif_usbdev_data_toggle_out_write(&usbdev, all_endpoints,
+                                                exp_out_toggles));
+  CHECK_DIF_OK(
+      dif_usbdev_data_toggle_in_write(&usbdev, all_endpoints, exp_in_toggles));
+
+  // Check that they read as expected.
+  check_toggles(exp_out_toggles, exp_in_toggles, logging);
+
+  // Walk through each of the bits within each register, setting and resetting
+  // each bit individually.
+  for (uint8_t ep = 0u; ep < USBDEV_NUM_ENDPOINTS; ++ep) {
+    uint16_t ep_mask = (uint16_t)(1u << ep);
+
+    exp_out_toggles |= ep_mask;
+    exp_in_toggles |= ep_mask;
+    CHECK_DIF_OK(dif_usbdev_data_toggle_out_write(&usbdev, ep_mask, ep_mask));
+    CHECK_DIF_OK(dif_usbdev_data_toggle_in_write(&usbdev, ep_mask, ep_mask));
+
+    check_toggles(exp_out_toggles, exp_in_toggles, logging);
+
+    exp_out_toggles &= ~ep_mask;
+    exp_in_toggles &= ~ep_mask;
+    CHECK_DIF_OK(dif_usbdev_data_toggle_out_write(&usbdev, ep_mask, 0u));
+    CHECK_DIF_OK(dif_usbdev_data_toggle_in_write(&usbdev, ep_mask, 0u));
+
+    check_toggles(exp_out_toggles, exp_in_toggles, logging);
+  }
+
+  // Tidy up by disconnecting from the USB.
+  CHECK_DIF_OK(dif_usbdev_interface_enable(&usbdev, kDifToggleDisabled));
+
+  return true;
+}
diff --git a/sw/host/cryptotest/cryptotest_parser.rs b/sw/host/cryptotest/cryptotest_parser.rs
index cd972ade96df6..a57d8da1f1705 100644
--- a/sw/host/cryptotest/cryptotest_parser.rs
+++ b/sw/host/cryptotest/cryptotest_parser.rs
@@ -374,13 +374,15 @@ mod tests {
 
     #[test]
     fn missing_name() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {};
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -409,42 +411,48 @@ mod tests {
 
     #[test]
     fn missing_field_name() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 uint32_t;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn char_field() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 char is_not_allowed;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn bad_annotation() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 // cryptotest:omelette
                 uint32_t something;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -571,41 +579,47 @@ mod tests {
 
     #[test]
     fn missing_vec_field_name() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 uint32_t[4];
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn transposed_vec_field_name() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 uint32_t[4] foo;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn non_literal_vec_len() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 uint32_t foo[kLen];
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -641,41 +655,47 @@ mod tests {
 
     #[test]
     fn missing_cstr_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 char *mut_str;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_cstr_star() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 const char mut_str;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn cstr_right_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 char *const mut_str;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -712,8 +732,9 @@ mod tests {
 
     #[test]
     fn missing_int_array_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -721,14 +742,16 @@ mod tests {
                 uint32_t *mut;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn mystery_len() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -736,8 +759,9 @@ mod tests {
                 uint32_t *mut;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -774,8 +798,9 @@ mod tests {
 
     #[test]
     fn missing_vec_array_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -783,14 +808,16 @@ mod tests {
                 uint32_t (*keys)[32];
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_vec_array_star() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -798,14 +825,16 @@ mod tests {
                 uint32_t (keys)[32];
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_vec_array_parens() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -813,8 +842,9 @@ mod tests {
                 uint32_t *keys[32];
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
@@ -851,8 +881,9 @@ mod tests {
 
     #[test]
     fn missing_cstr_array_inner_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -860,14 +891,16 @@ mod tests {
                 char* const* sonnets;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_cstr_array_outer_const() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -875,14 +908,16 @@ mod tests {
                 const char** sonnets;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_cstr_array_outer_star() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -890,14 +925,16 @@ mod tests {
                 const char* const sonnets;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 
     #[test]
     fn missing_cstr_array_inner_star() {
-        assert!(Struct::parse(
-            "
+        assert!(
+            Struct::parse(
+                "
             // cryptotest:struct
             typedef struct {
                 size_t word_count;
@@ -905,7 +942,8 @@ mod tests {
                 const char const* sonnets;
             };
             "
+            )
+            .is_err()
         )
-        .is_err())
     }
 }
diff --git a/sw/host/cryptotest/testvectors/data/BUILD b/sw/host/cryptotest/testvectors/data/BUILD
index 31f22368c9a8f..d8f1ca3c49c09 100644
--- a/sw/host/cryptotest/testvectors/data/BUILD
+++ b/sw/host/cryptotest/testvectors/data/BUILD
@@ -6,6 +6,8 @@ load("@bazel_skylib//rules:run_binary.bzl", "run_binary")
 
 package(default_visibility = ["//visibility:public"])
 
+exports_files(["cshake_hardcoded.hjson"])
+
 # Strip the inner layer of the DRBG repository, which is a zip of zips
 genrule(
     name = "nist_cavp_drbg_sp_800_90a_reseed",
@@ -178,6 +180,10 @@ ECDSA_RANDOM_COUNT = 128
     ]
 ]
 
+################################################################################
+# SHA2, SHA3 - NIST CAVP KAT
+################################################################################
+
 [
     run_binary(
         name = "nist_cavp_{}_{}_{}_json".format(
@@ -212,6 +218,7 @@ ECDSA_RANDOM_COUNT = 128
         ("SHA256", "sha2_fips_180_4", []),
         ("SHA384", "sha2_fips_180_4", []),
         ("SHA512", "sha2_fips_180_4", []),
+        ("SHA3_224", "sha3_fips_202", []),
         ("SHA3_256", "sha3_fips_202", []),
         ("SHA3_384", "sha3_fips_202", []),
         ("SHA3_512", "sha3_fips_202", []),
@@ -232,6 +239,27 @@ ECDSA_RANDOM_COUNT = 128
     ] + extra_msg_types
 ]
 
+################################################################################
+# CSHAKE - NIST Example Values
+################################################################################
+run_binary(
+    name = "cshake_nist_example_values_json",
+    srcs = [
+        ":cshake_nist_example_values.hjson",
+        "//sw/host/cryptotest/testvectors/data/schemas:hash_schema.json",
+    ],
+    outs = [":cshake_nist_example_values.json"],
+    args = [
+        "--src",
+        "$(location :cshake_nist_example_values.hjson)",
+        "--dst",
+        "$(location :cshake_nist_example_values.json)",
+        "--schema",
+        "$(location //sw/host/cryptotest/testvectors/data/schemas:hash_schema.json)",
+    ],
+    tool = "//sw/host/cryptotest/testvectors/parsers:hjson_hash_parser",
+)
+
 run_binary(
     name = "nist_cavp_ecdh_sp_800_56a_json",
     srcs = [
@@ -301,33 +329,6 @@ run_binary(
     ]
 ]
 
-[
-    run_binary(
-        name = "hjson_{}".format(hash_alg),
-        srcs = [
-            "//sw/device/tests/crypto/testvectors:{}_hardcoded.hjson".format(hash_alg),
-            "//sw/host/cryptotest/testvectors/data/schemas:hash_schema.json",
-        ],
-        outs = [":hjson_{}.json".format(hash_alg)],
-        args = [
-            "--src",
-            "$(location //sw/device/tests/crypto/testvectors:{}_hardcoded.hjson)".format(hash_alg),
-            "--dst",
-            "$(location :hjson_{}.json)".format(hash_alg),
-            "--schema",
-            "$(location //sw/host/cryptotest/testvectors/data/schemas:hash_schema.json)",
-        ],
-        tool = "//sw/host/cryptotest/testvectors/parsers:hjson_hash_parser",
-    )
-    for hash_alg in [
-        "sha3_256",
-        "sha3_384",
-        "sha3_512",
-        "shake128",
-        "shake256",
-    ]
-]
-
 [
     run_binary(
         name = cryptotest_name,
@@ -757,3 +758,48 @@ run_binary(
     ],
     tool = "//sw/host/cryptotest/testvectors/parsers:hjson_kmac_parser",
 )
+
+################################################################################
+# NIST CAVP AES KAT
+################################################################################
+
+# NIST provides the AES KAT testvectors as RSP files which are named as
+# "{aes_mode}{test_type}{size}.rsp" (e.g. CBCGFSbox128.rsp)
+# The corresponding conventional cryptotest name uses snakecase:
+# "{aes_mode}_{test_type}_{size}" (e.g. cbc_gfsbox_128)
+NIST_CAVP_AES_KAT_TESTVECTORS = [
+    # (testname, rsp_filename, mode, size)
+    (
+        "{}_{}_{}".format(
+            mode.lower(),
+            test.lower(),
+            size.lower(),
+        ),
+        "{}{}{}.rsp".format(mode, test, size),
+        mode.lower(),
+        size.lower(),
+    )
+    for mode in ("CBC", "CFB128", "ECB", "OFB")
+    for test in ("GFSbox", "KeySbox", "VarKey", "VarTxt")
+    for size in ("128", "192", "256")
+]
+
+[
+    run_binary(
+        name = "nist_cavp_aes_kat_{}_json".format(testname),
+        srcs = [
+            "//sw/host/cryptotest/testvectors/data/schemas:aes_block_schema",
+            "@nist_cavp_aes_kat//:{}".format(rsp_filename),
+        ],
+        outs = ["nist_cavp_aes_kat_{}.json".format(testname)],
+        args = [
+            "$(location @nist_cavp_aes_kat//:{})".format(rsp_filename),  # src
+            "$(location :nist_cavp_aes_kat_{}.json)".format(testname),  # dst
+            mode,
+            size,
+            "$(location //sw/host/cryptotest/testvectors/data/schemas:aes_block_schema)",  # schema
+        ],
+        tool = "//sw/host/cryptotest/testvectors/parsers:nist_aes_parser",
+    )
+    for testname, rsp_filename, mode, size in NIST_CAVP_AES_KAT_TESTVECTORS
+]
diff --git a/sw/host/cryptotest/testvectors/data/README.md b/sw/host/cryptotest/testvectors/data/README.md
index 3af7ef29bf58a..9a89e1445e22d 100644
--- a/sw/host/cryptotest/testvectors/data/README.md
+++ b/sw/host/cryptotest/testvectors/data/README.md
@@ -1,5 +1,21 @@
 # Cryptotest Test Vectors
 
+## AES
+
+### NIST CAVP AES KAT
+
+Source: [NIST CAVP Block Ciphers](https://csrc.nist.gov/Projects/Cryptographic-Algorithm-Validation-Program/Block-Ciphers#AES)
+
+We are using the AES KAT Vectors.
+
+## Hash Functions
+
+### NIST CSHAKE Example Values
+
+Source: [NIST Example Values](https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines/example-values) - [file](https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/cSHAKE_samples.pdf)
+
+The values were transcribed from the PDF into `cshake_nist_example_values.hjson`.
+
 ## ECDSA
 
 ### NIST CAVP ECDSA FIPS 186-4 Test Vectors
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/BUILD b/sw/host/cryptotest/testvectors/data/aes_nist_kat/BUILD
deleted file mode 100644
index 16d2b7c4ab07c..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/BUILD
+++ /dev/null
@@ -1,76 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-MODE = [
-    "CBC",
-    "CFB128",
-    "ECB",
-    "OFB",
-]
-
-TEST = [
-    "GFSbox",
-    "KeySbox",
-    "VarKey",
-    "VarTxt",
-]
-
-SIZE = [
-    "128",
-    "192",
-    "256",
-]
-
-# Raw testvector sources are named as "{mode}{test}{size}.rsp".
-# E.g. CBCGFSbox128.rsp
-# Cryptotest uses the form {mode}_{test}_{size}".
-# E.g. cbc_gfsbox_128
-testcases = [
-    {
-        "nist_name": "{}{}{}".format(mode, test, size),
-        "cryptotest_name": "{}_{}_{}".format(
-            mode.lower(),
-            test.lower(),
-            size.lower(),
-        ),
-        "mode": mode.lower(),
-        "test_type": test.lower(),
-        "size": size,
-    }
-    for mode in MODE
-    for test in TEST
-    for size in SIZE
-]
-
-[
-    filegroup(
-        name = "{}_raw".format(test["cryptotest_name"]),
-        srcs = ["{}.rsp".format(test["nist_name"])],
-    )
-    for test in testcases
-]
-
-[
-    genrule(
-        name = "{}_json".format(test["cryptotest_name"]),
-        srcs = [
-            ":{}_raw".format(test["cryptotest_name"]),
-            "//sw/host/cryptotest/testvectors/data/schemas:aes_block_schema",
-        ],
-        outs = ["{}.json".format(test["cryptotest_name"])],
-        cmd = """$(location //sw/host/cryptotest/testvectors/parsers:nist_aes_parser) \
-                $(location :{}_raw) \
-                $(RULEDIR)/{} {} {} \
-                $(location //sw/host/cryptotest/testvectors/data/schemas:aes_block_schema)""".format(
-            test["cryptotest_name"],
-            test["cryptotest_name"],
-            test["mode"],
-            test["size"],
-        ),
-        message = "Parsing testvector - NIST AES KAT - {}".format(test["cryptotest_name"]),
-        tools = ["//sw/host/cryptotest/testvectors/parsers:nist_aes_parser"],
-        visibility = ["//visibility:public"],
-    )
-    for test in testcases
-]
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox128.rsp
deleted file mode 100644
index 972dc511b15f8..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox128.rsp
+++ /dev/null
@@ -1,94 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:33 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = f34481ec3cc627bacd5dc3fb08f273e6
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 9798c4640bad75c7c3227db910174e72
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 96ab5c2ff612d9dfaae8c31f30c42168
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 6a118a874519e64e9963798a503f1d35
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = cb9fceec81286ca3e989bd979b0cb284
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = b26aeb1874e47ca8358ff22378f09144
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 58c8e00b2631686d54eab84b91f0aca1
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-PLAINTEXT = f34481ec3cc627bacd5dc3fb08f273e6
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-PLAINTEXT = 9798c4640bad75c7c3227db910174e72
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-PLAINTEXT = 96ab5c2ff612d9dfaae8c31f30c42168
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-PLAINTEXT = 6a118a874519e64e9963798a503f1d35
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-PLAINTEXT = cb9fceec81286ca3e989bd979b0cb284
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-PLAINTEXT = b26aeb1874e47ca8358ff22378f09144
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-PLAINTEXT = 58c8e00b2631686d54eab84b91f0aca1
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox192.rsp
deleted file mode 100644
index e237e5232d016..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox192.rsp
+++ /dev/null
@@ -1,82 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:35 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 1b077a6af4b7f98229de786d7516b639
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 9c2d8842e5f48f57648205d39a239af1
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = bff52510095f518ecca60af4205444bb
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 51719783d3185a535bd75adc65071ce1
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 26aa49dcfe7629a8901a69a9914e6dfd
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 941a4773058224e1ef66d10e0a6ee782
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-PLAINTEXT = 1b077a6af4b7f98229de786d7516b639
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-PLAINTEXT = 9c2d8842e5f48f57648205d39a239af1
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-PLAINTEXT = bff52510095f518ecca60af4205444bb
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-PLAINTEXT = 51719783d3185a535bd75adc65071ce1
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-PLAINTEXT = 26aa49dcfe7629a8901a69a9914e6dfd
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-PLAINTEXT = 941a4773058224e1ef66d10e0a6ee782
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox256.rsp
deleted file mode 100644
index c962e6d00a9cb..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCGFSbox256.rsp
+++ /dev/null
@@ -1,70 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:38 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 014730f80ac625fe84f026c60bfd547d
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 0b24af36193ce4665f2825d7b4749c98
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 761c1fe41a18acf20d241650611d90f1
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 8a560769d605868ad80d819bdba03771
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-PLAINTEXT = 91fbef2d15a97816060bee1feaa49afe
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-PLAINTEXT = 014730f80ac625fe84f026c60bfd547d
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-PLAINTEXT = 0b24af36193ce4665f2825d7b4749c98
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-PLAINTEXT = 761c1fe41a18acf20d241650611d90f1
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-PLAINTEXT = 8a560769d605868ad80d819bdba03771
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-PLAINTEXT = 91fbef2d15a97816060bee1feaa49afe
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox128.rsp
deleted file mode 100644
index 397224636a691..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox128.rsp
+++ /dev/null
@@ -1,262 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:33 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 858075d536d79ccee571f7d7204b1f67
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 35870c6a57e9e92314bcb8087cde72ce
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6c68e9be5ec41e22c825b7c7affb4363
-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f5df39990fc688f1b07224cc03e86cea
-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a303d940ded8f0baff6f75414cac5243
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f4a70d8af877f9b02b4c40df57d45b17
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
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-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
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-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
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-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
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-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = f4a70d8af877f9b02b4c40df57d45b17
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox192.rsp
deleted file mode 100644
index ec9c17b4a675e..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox192.rsp
+++ /dev/null
@@ -1,298 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:35 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3b7c24f825e3bf9873c9f14d39a0e6f4
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = cfe4d74002696ccf7d87b14a2f9cafc9
-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
-IV = 00000000000000000000000000000000
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-
-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9b9fdd1c5975655f539998b306a324af
-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = d4f0aae13c8fe9339fbf9e69ed0ad74d
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-IV = 00000000000000000000000000000000
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-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 3cf5e1d21a17956d1dffad6a7c41c659
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
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-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-
-[DECRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
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-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
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-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
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-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
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-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
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-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-IV = 00000000000000000000000000000000
-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
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-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 19c80ec4a6deb7e5ed1033dda933498f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7656709538dd5fec41e0ce6a0f8e207d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox256.rsp
deleted file mode 100644
index 0412dd5f426a1..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCKeySbox256.rsp
+++ /dev/null
@@ -1,202 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:38 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4307456a9e67813b452e15fa8fffe398
-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 4663446607354989477a5c6f0f007ef4
-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 531c2c38344578b84d50b3c917bbb6e1
-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = fc6aec906323480005c58e7e1ab004ad
-
-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
-IV = 00000000000000000000000000000000
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-
-COUNT = 8
-KEY = 797f8b3d176dac5b7e34a2d539c4ef367a16f8635f6264737591c5c07bf57a3e
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = a74289fe73a4c123ca189ea1e1b49ad5
-
-COUNT = 9
-KEY = 6838d40caf927749c13f0329d331f448e202c73ef52c5f73a37ca635d4c47707
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = b91d4ea4488644b56cf0812fa7fcf5fc
-
-COUNT = 10
-KEY = ccd1bc3c659cd3c59bc437484e3c5c724441da8d6e90ce556cd57d0752663bbc
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 304f81ab61a80c2e743b94d5002a126b
-
-COUNT = 11
-KEY = 13428b5e4c005e0636dd338405d173ab135dec2a25c22c5df0722d69dcc43887
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 649a71545378c783e368c9ade7114f6c
-
-COUNT = 12
-KEY = 07eb03a08d291d1b07408bf3512ab40c91097ac77461aad4bb859647f74f00ee
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 47cb030da2ab051dfc6c4bf6910d12bb
-
-COUNT = 13
-KEY = 90143ae20cd78c5d8ebdd6cb9dc1762427a96c78c639bccc41a61424564eafe1
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 798c7c005dee432b2c8ea5dfa381ecc3
-
-COUNT = 14
-KEY = b7a5794d52737475d53d5a377200849be0260a67a2b22ced8bbef12882270d07
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 637c31dc2591a07636f646b72daabbe7
-
-COUNT = 15
-KEY = fca02f3d5011cfc5c1e23165d413a049d4526a991827424d896fe3435e0bf68e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 179a49c712154bbffbe6e7a84a18e220
-
-[DECRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey128.rsp
deleted file mode 100644
index 6c88c62dd4fe4..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:33 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey192.rsp
deleted file mode 100644
index 69c154ce7dfee..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey192.rsp
+++ /dev/null
@@ -1,2314 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:35 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey256.rsp
deleted file mode 100644
index 0ec4d634cc28a..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarKey256.rsp
+++ /dev/null
@@ -1,3082 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:38 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt128.rsp
deleted file mode 100644
index 2ae7d8795e6a9..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:33 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt192.rsp
deleted file mode 100644
index e7519587f8ae8..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt192.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:35 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt256.rsp
deleted file mode 100644
index 9ce2d62675ccb..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CBCVarTxt256.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CBC
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:38 2011
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-[ENCRYPT]
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-CIPHERTEXT = 1ac1f7102c59933e8b2ddc3f14e94baa
-PLAINTEXT = fffffffffffffffffffffffe00000000
-
-COUNT = 95
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 21d9ba49f276b45f11af8fc71a088e3d
-PLAINTEXT = ffffffffffffffffffffffff00000000
-
-COUNT = 96
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 649f1cddc3792b4638635a392bc9bade
-PLAINTEXT = ffffffffffffffffffffffff80000000
-
-COUNT = 97
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = e2775e4b59c1bc2e31a2078c11b5a08c
-PLAINTEXT = ffffffffffffffffffffffffc0000000
-
-COUNT = 98
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2be1fae5048a25582a679ca10905eb80
-PLAINTEXT = ffffffffffffffffffffffffe0000000
-
-COUNT = 99
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = da86f292c6f41ea34fb2068df75ecc29
-PLAINTEXT = fffffffffffffffffffffffff0000000
-
-COUNT = 100
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 220df19f85d69b1b562fa69a3c5beca5
-PLAINTEXT = fffffffffffffffffffffffff8000000
-
-COUNT = 101
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 1f11d5d0355e0b556ccdb6c7f5083b4d
-PLAINTEXT = fffffffffffffffffffffffffc000000
-
-COUNT = 102
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 62526b78be79cb384633c91f83b4151b
-PLAINTEXT = fffffffffffffffffffffffffe000000
-
-COUNT = 103
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 90ddbcb950843592dd47bbef00fdc876
-PLAINTEXT = ffffffffffffffffffffffffff000000
-
-COUNT = 104
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2fd0e41c5b8402277354a7391d2618e2
-PLAINTEXT = ffffffffffffffffffffffffff800000
-
-COUNT = 105
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 3cdf13e72dee4c581bafec70b85f9660
-PLAINTEXT = ffffffffffffffffffffffffffc00000
-
-COUNT = 106
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = afa2ffc137577092e2b654fa199d2c43
-PLAINTEXT = ffffffffffffffffffffffffffe00000
-
-COUNT = 107
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffffff00000
-
-COUNT = 108
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 705a4ef8ba2133729c20185c3d3a4763
-PLAINTEXT = fffffffffffffffffffffffffff80000
-
-COUNT = 109
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 0861a861c3db4e94194211b77ed761b9
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-
-COUNT = 110
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 4b00c27e8b26da7eab9d3a88dec8b031
-PLAINTEXT = fffffffffffffffffffffffffffe0000
-
-COUNT = 111
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 5f397bf03084820cc8810d52e5b666e9
-PLAINTEXT = ffffffffffffffffffffffffffff0000
-
-COUNT = 112
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 63fafabb72c07bfbd3ddc9b1203104b8
-PLAINTEXT = ffffffffffffffffffffffffffff8000
-
-COUNT = 113
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = ffffffffffffffffffffffffffffc000
-
-COUNT = 114
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = ffffffffffffffffffffffffffffe000
-
-COUNT = 115
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffffffff000
-
-COUNT = 116
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffffffff800
-
-COUNT = 117
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 27127daafc9accd2fb334ec3eba52323
-PLAINTEXT = fffffffffffffffffffffffffffffc00
-
-COUNT = 118
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = ee0715b96f72e3f7a22a5064fc592f4c
-PLAINTEXT = fffffffffffffffffffffffffffffe00
-
-COUNT = 119
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 29ee526770f2a11dcfa989d1ce88830f
-PLAINTEXT = ffffffffffffffffffffffffffffff00
-
-COUNT = 120
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = 0493370e054b09871130fe49af730a5a
-PLAINTEXT = ffffffffffffffffffffffffffffff80
-
-COUNT = 121
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 9b7b940f6c509f9e44a4ee140448ee46
-PLAINTEXT = ffffffffffffffffffffffffffffffc0
-
-COUNT = 122
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2915be4a1ecfdcbe3e023811a12bb6c7
-PLAINTEXT = ffffffffffffffffffffffffffffffe0
-
-COUNT = 123
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7240e524bc51d8c4d440b1be55d1062c
-PLAINTEXT = fffffffffffffffffffffffffffffff0
-
-COUNT = 124
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = da63039d38cb4612b2dc36ba26684b93
-PLAINTEXT = fffffffffffffffffffffffffffffff8
-
-COUNT = 125
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0f59cb5a4b522e2ac56c1a64f558ad9a
-PLAINTEXT = fffffffffffffffffffffffffffffffc
-
-COUNT = 126
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7bfe9d876c6d63c1d035da8fe21c409d
-PLAINTEXT = fffffffffffffffffffffffffffffffe
-
-COUNT = 127
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-CIPHERTEXT = acdace8078a32b1a182bfa4987ca1347
-PLAINTEXT = ffffffffffffffffffffffffffffffff
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox128.rsp
deleted file mode 100644
index 0dfb1160a3135..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox128.rsp
+++ /dev/null
@@ -1,94 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:53 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = f34481ec3cc627bacd5dc3fb08f273e6
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 9798c4640bad75c7c3227db910174e72
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 96ab5c2ff612d9dfaae8c31f30c42168
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 6a118a874519e64e9963798a503f1d35
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = cb9fceec81286ca3e989bd979b0cb284
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = b26aeb1874e47ca8358ff22378f09144
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 58c8e00b2631686d54eab84b91f0aca1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = f34481ec3cc627bacd5dc3fb08f273e6
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 9798c4640bad75c7c3227db910174e72
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 96ab5c2ff612d9dfaae8c31f30c42168
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 6a118a874519e64e9963798a503f1d35
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = cb9fceec81286ca3e989bd979b0cb284
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = b26aeb1874e47ca8358ff22378f09144
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 58c8e00b2631686d54eab84b91f0aca1
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox192.rsp
deleted file mode 100644
index 7b890792469e4..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox192.rsp
+++ /dev/null
@@ -1,82 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:55 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 1b077a6af4b7f98229de786d7516b639
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 9c2d8842e5f48f57648205d39a239af1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = bff52510095f518ecca60af4205444bb
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 51719783d3185a535bd75adc65071ce1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 26aa49dcfe7629a8901a69a9914e6dfd
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 941a4773058224e1ef66d10e0a6ee782
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 1b077a6af4b7f98229de786d7516b639
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 9c2d8842e5f48f57648205d39a239af1
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = bff52510095f518ecca60af4205444bb
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 51719783d3185a535bd75adc65071ce1
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 26aa49dcfe7629a8901a69a9914e6dfd
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 941a4773058224e1ef66d10e0a6ee782
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox256.rsp
deleted file mode 100644
index 82595873fe5d8..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128GFSbox256.rsp
+++ /dev/null
@@ -1,70 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:57 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 014730f80ac625fe84f026c60bfd547d
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 0b24af36193ce4665f2825d7b4749c98
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 761c1fe41a18acf20d241650611d90f1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 8a560769d605868ad80d819bdba03771
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 91fbef2d15a97816060bee1feaa49afe
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 014730f80ac625fe84f026c60bfd547d
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 0b24af36193ce4665f2825d7b4749c98
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 761c1fe41a18acf20d241650611d90f1
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 8a560769d605868ad80d819bdba03771
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 91fbef2d15a97816060bee1feaa49afe
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox128.rsp
deleted file mode 100644
index aff05a2bd974e..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox128.rsp
+++ /dev/null
@@ -1,262 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:53 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 858075d536d79ccee571f7d7204b1f67
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 35870c6a57e9e92314bcb8087cde72ce
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6c68e9be5ec41e22c825b7c7affb4363
-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f5df39990fc688f1b07224cc03e86cea
-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a303d940ded8f0baff6f75414cac5243
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f4a70d8af877f9b02b4c40df57d45b17
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 858075d536d79ccee571f7d7204b1f67
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 35870c6a57e9e92314bcb8087cde72ce
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6c68e9be5ec41e22c825b7c7affb4363
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-IV = 00000000000000000000000000000000
-CIPHERTEXT = f5df39990fc688f1b07224cc03e86cea
-PLAINTEXT = 00000000000000000000000000000000
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-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a303d940ded8f0baff6f75414cac5243
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-IV = 00000000000000000000000000000000
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox192.rsp
deleted file mode 100644
index e34e441cc00d4..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox192.rsp
+++ /dev/null
@@ -1,298 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:55 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3b7c24f825e3bf9873c9f14d39a0e6f4
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = cfe4d74002696ccf7d87b14a2f9cafc9
-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = d2eafd86f63b109b91f5dbb3a3fb7e13
-
-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9b9fdd1c5975655f539998b306a324af
-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d4f0aae13c8fe9339fbf9e69ed0ad74d
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 19c80ec4a6deb7e5ed1033dda933498f
-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 3cf5e1d21a17956d1dffad6a7c41c659
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 7656709538dd5fec41e0ce6a0f8e207d
-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-
-[DECRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
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-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
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-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-IV = 00000000000000000000000000000000
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-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
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-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
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-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
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-
-COUNT = 15
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-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
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-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
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-
-COUNT = 18
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-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
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-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
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-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
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-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7656709538dd5fec41e0ce6a0f8e207d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox256.rsp
deleted file mode 100644
index 5aa35a848ed94..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128KeySbox256.rsp
+++ /dev/null
@@ -1,202 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:57 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4307456a9e67813b452e15fa8fffe398
-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 4663446607354989477a5c6f0f007ef4
-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
-IV = 00000000000000000000000000000000
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-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = fc6aec906323480005c58e7e1ab004ad
-
-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = a3944b95ca0b52043584ef02151926a8
-
-COUNT = 8
-KEY = 797f8b3d176dac5b7e34a2d539c4ef367a16f8635f6264737591c5c07bf57a3e
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-
-COUNT = 9
-KEY = 6838d40caf927749c13f0329d331f448e202c73ef52c5f73a37ca635d4c47707
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = b91d4ea4488644b56cf0812fa7fcf5fc
-
-COUNT = 10
-KEY = ccd1bc3c659cd3c59bc437484e3c5c724441da8d6e90ce556cd57d0752663bbc
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 304f81ab61a80c2e743b94d5002a126b
-
-COUNT = 11
-KEY = 13428b5e4c005e0636dd338405d173ab135dec2a25c22c5df0722d69dcc43887
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 649a71545378c783e368c9ade7114f6c
-
-COUNT = 12
-KEY = 07eb03a08d291d1b07408bf3512ab40c91097ac77461aad4bb859647f74f00ee
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 47cb030da2ab051dfc6c4bf6910d12bb
-
-COUNT = 13
-KEY = 90143ae20cd78c5d8ebdd6cb9dc1762427a96c78c639bccc41a61424564eafe1
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 798c7c005dee432b2c8ea5dfa381ecc3
-
-COUNT = 14
-KEY = b7a5794d52737475d53d5a377200849be0260a67a2b22ced8bbef12882270d07
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 637c31dc2591a07636f646b72daabbe7
-
-COUNT = 15
-KEY = fca02f3d5011cfc5c1e23165d413a049d4526a991827424d896fe3435e0bf68e
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 179a49c712154bbffbe6e7a84a18e220
-
-[DECRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
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-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-IV = 00000000000000000000000000000000
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-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-IV = 00000000000000000000000000000000
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-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-IV = 00000000000000000000000000000000
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-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
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-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
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-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
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-COUNT = 8
-KEY = 797f8b3d176dac5b7e34a2d539c4ef367a16f8635f6264737591c5c07bf57a3e
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-COUNT = 9
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-COUNT = 10
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-COUNT = 11
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-COUNT = 12
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-COUNT = 13
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey128.rsp
deleted file mode 100644
index 06b6bb46bea4a..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:53 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey192.rsp
deleted file mode 100644
index 7f2d2e079c7a4..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey192.rsp
+++ /dev/null
@@ -1,2314 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:55 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey256.rsp
deleted file mode 100644
index 49e9dc6f36b9a..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarKey256.rsp
+++ /dev/null
@@ -1,3082 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:57 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt128.rsp
deleted file mode 100644
index 35679232d6538..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:53 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt192.rsp
deleted file mode 100644
index 1e18ae2a85206..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt192.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:55 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt256.rsp
deleted file mode 100644
index 4784c325dc8e9..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/CFB128VarTxt256.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for CFB128
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:57 2011
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-IV = fffffffffffffffffffffffffff80000
-CIPHERTEXT = 705a4ef8ba2133729c20185c3d3a4763
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 109
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffc0000
-CIPHERTEXT = 0861a861c3db4e94194211b77ed761b9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 110
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffe0000
-CIPHERTEXT = 4b00c27e8b26da7eab9d3a88dec8b031
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 111
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffff0000
-CIPHERTEXT = 5f397bf03084820cc8810d52e5b666e9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 112
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffff8000
-CIPHERTEXT = 63fafabb72c07bfbd3ddc9b1203104b8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 113
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffc000
-CIPHERTEXT = 683e2140585b18452dd4ffbb93c95df9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 114
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffe000
-CIPHERTEXT = 286894e48e537f8763b56707d7d155c8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 115
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffff000
-CIPHERTEXT = a423deabc173dcf7e2c4c53e77d37cd1
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 116
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffff800
-CIPHERTEXT = eb8168313e1cfdfdb5e986d5429cf172
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 117
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffc00
-CIPHERTEXT = 27127daafc9accd2fb334ec3eba52323
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 118
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffe00
-CIPHERTEXT = ee0715b96f72e3f7a22a5064fc592f4c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 119
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffff00
-CIPHERTEXT = 29ee526770f2a11dcfa989d1ce88830f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 120
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffff80
-CIPHERTEXT = 0493370e054b09871130fe49af730a5a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 121
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffc0
-CIPHERTEXT = 9b7b940f6c509f9e44a4ee140448ee46
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 122
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffe0
-CIPHERTEXT = 2915be4a1ecfdcbe3e023811a12bb6c7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 123
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffff0
-CIPHERTEXT = 7240e524bc51d8c4d440b1be55d1062c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 124
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffff8
-CIPHERTEXT = da63039d38cb4612b2dc36ba26684b93
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 125
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffffc
-CIPHERTEXT = 0f59cb5a4b522e2ac56c1a64f558ad9a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 126
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffffe
-CIPHERTEXT = 7bfe9d876c6d63c1d035da8fe21c409d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 127
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffff
-CIPHERTEXT = acdace8078a32b1a182bfa4987ca1347
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox128.rsp
deleted file mode 100644
index 0abd7edd0e67b..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox128.rsp
+++ /dev/null
@@ -1,80 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:26 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-PLAINTEXT = f34481ec3cc627bacd5dc3fb08f273e6
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-PLAINTEXT = 9798c4640bad75c7c3227db910174e72
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-PLAINTEXT = 96ab5c2ff612d9dfaae8c31f30c42168
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-PLAINTEXT = 6a118a874519e64e9963798a503f1d35
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-PLAINTEXT = cb9fceec81286ca3e989bd979b0cb284
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-PLAINTEXT = b26aeb1874e47ca8358ff22378f09144
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-PLAINTEXT = 58c8e00b2631686d54eab84b91f0aca1
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-PLAINTEXT = f34481ec3cc627bacd5dc3fb08f273e6
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-PLAINTEXT = 9798c4640bad75c7c3227db910174e72
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-PLAINTEXT = 96ab5c2ff612d9dfaae8c31f30c42168
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-PLAINTEXT = 6a118a874519e64e9963798a503f1d35
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-PLAINTEXT = cb9fceec81286ca3e989bd979b0cb284
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-PLAINTEXT = b26aeb1874e47ca8358ff22378f09144
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-PLAINTEXT = 58c8e00b2631686d54eab84b91f0aca1
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox192.rsp
deleted file mode 100644
index 558b0b9121418..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox192.rsp
+++ /dev/null
@@ -1,70 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:28 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = 1b077a6af4b7f98229de786d7516b639
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = 9c2d8842e5f48f57648205d39a239af1
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = bff52510095f518ecca60af4205444bb
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = 51719783d3185a535bd75adc65071ce1
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = 26aa49dcfe7629a8901a69a9914e6dfd
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-PLAINTEXT = 941a4773058224e1ef66d10e0a6ee782
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-PLAINTEXT = 1b077a6af4b7f98229de786d7516b639
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-PLAINTEXT = 9c2d8842e5f48f57648205d39a239af1
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-PLAINTEXT = bff52510095f518ecca60af4205444bb
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-PLAINTEXT = 51719783d3185a535bd75adc65071ce1
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-PLAINTEXT = 26aa49dcfe7629a8901a69a9914e6dfd
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-PLAINTEXT = 941a4773058224e1ef66d10e0a6ee782
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox256.rsp
deleted file mode 100644
index c2643dc9cc4aa..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBGFSbox256.rsp
+++ /dev/null
@@ -1,60 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:30 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-PLAINTEXT = 014730f80ac625fe84f026c60bfd547d
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-PLAINTEXT = 0b24af36193ce4665f2825d7b4749c98
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-PLAINTEXT = 761c1fe41a18acf20d241650611d90f1
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-PLAINTEXT = 8a560769d605868ad80d819bdba03771
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-PLAINTEXT = 91fbef2d15a97816060bee1feaa49afe
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-PLAINTEXT = 014730f80ac625fe84f026c60bfd547d
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-PLAINTEXT = 0b24af36193ce4665f2825d7b4749c98
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-PLAINTEXT = 761c1fe41a18acf20d241650611d90f1
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-PLAINTEXT = 8a560769d605868ad80d819bdba03771
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-PLAINTEXT = 91fbef2d15a97816060bee1feaa49afe
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox128.rsp
deleted file mode 100644
index 2d614fb7609e2..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox128.rsp
+++ /dev/null
@@ -1,220 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:26 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 858075d536d79ccee571f7d7204b1f67
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 35870c6a57e9e92314bcb8087cde72ce
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6c68e9be5ec41e22c825b7c7affb4363
-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f5df39990fc688f1b07224cc03e86cea
-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a303d940ded8f0baff6f75414cac5243
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f4a70d8af877f9b02b4c40df57d45b17
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
-CIPHERTEXT = 858075d536d79ccee571f7d7204b1f67
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-CIPHERTEXT = 35870c6a57e9e92314bcb8087cde72ce
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-CIPHERTEXT = 6c68e9be5ec41e22c825b7c7affb4363
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-CIPHERTEXT = f5df39990fc688f1b07224cc03e86cea
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-CIPHERTEXT = a303d940ded8f0baff6f75414cac5243
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-CIPHERTEXT = f4a70d8af877f9b02b4c40df57d45b17
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox192.rsp
deleted file mode 100644
index 50f63a765da5f..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox192.rsp
+++ /dev/null
@@ -1,250 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:28 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
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-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = cfe4d74002696ccf7d87b14a2f9cafc9
-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d2eafd86f63b109b91f5dbb3a3fb7e13
-
-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9b9fdd1c5975655f539998b306a324af
-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d4f0aae13c8fe9339fbf9e69ed0ad74d
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-PLAINTEXT = 00000000000000000000000000000000
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-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-PLAINTEXT = 00000000000000000000000000000000
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-
-[DECRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-CIPHERTEXT = 3b7c24f825e3bf9873c9f14d39a0e6f4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
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-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
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-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-CIPHERTEXT = cfe4d74002696ccf7d87b14a2f9cafc9
-PLAINTEXT = 00000000000000000000000000000000
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-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
-CIPHERTEXT = d2eafd86f63b109b91f5dbb3a3fb7e13
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-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
-CIPHERTEXT = 9b9fdd1c5975655f539998b306a324af
-PLAINTEXT = 00000000000000000000000000000000
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-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
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-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-CIPHERTEXT = d4f0aae13c8fe9339fbf9e69ed0ad74d
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-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-CIPHERTEXT = 19c80ec4a6deb7e5ed1033dda933498f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-CIPHERTEXT = 3cf5e1d21a17956d1dffad6a7c41c659
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
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-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
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-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-CIPHERTEXT = 7656709538dd5fec41e0ce6a0f8e207d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox256.rsp
deleted file mode 100644
index 2918f060d85d3..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBKeySbox256.rsp
+++ /dev/null
@@ -1,170 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:30 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4307456a9e67813b452e15fa8fffe398
-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4663446607354989477a5c6f0f007ef4
-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 531c2c38344578b84d50b3c917bbb6e1
-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fc6aec906323480005c58e7e1ab004ad
-
-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a3944b95ca0b52043584ef02151926a8
-
-COUNT = 8
-KEY = 797f8b3d176dac5b7e34a2d539c4ef367a16f8635f6264737591c5c07bf57a3e
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a74289fe73a4c123ca189ea1e1b49ad5
-
-COUNT = 9
-KEY = 6838d40caf927749c13f0329d331f448e202c73ef52c5f73a37ca635d4c47707
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = b91d4ea4488644b56cf0812fa7fcf5fc
-
-COUNT = 10
-KEY = ccd1bc3c659cd3c59bc437484e3c5c724441da8d6e90ce556cd57d0752663bbc
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 304f81ab61a80c2e743b94d5002a126b
-
-COUNT = 11
-KEY = 13428b5e4c005e0636dd338405d173ab135dec2a25c22c5df0722d69dcc43887
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 649a71545378c783e368c9ade7114f6c
-
-COUNT = 12
-KEY = 07eb03a08d291d1b07408bf3512ab40c91097ac77461aad4bb859647f74f00ee
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 47cb030da2ab051dfc6c4bf6910d12bb
-
-COUNT = 13
-KEY = 90143ae20cd78c5d8ebdd6cb9dc1762427a96c78c639bccc41a61424564eafe1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 798c7c005dee432b2c8ea5dfa381ecc3
-
-COUNT = 14
-KEY = b7a5794d52737475d53d5a377200849be0260a67a2b22ced8bbef12882270d07
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 637c31dc2591a07636f646b72daabbe7
-
-COUNT = 15
-KEY = fca02f3d5011cfc5c1e23165d413a049d4526a991827424d896fe3435e0bf68e
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 179a49c712154bbffbe6e7a84a18e220
-
-[DECRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-CIPHERTEXT = 4307456a9e67813b452e15fa8fffe398
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-CIPHERTEXT = 4663446607354989477a5c6f0f007ef4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
-CIPHERTEXT = 531c2c38344578b84d50b3c917bbb6e1
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
-CIPHERTEXT = fc6aec906323480005c58e7e1ab004ad
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
-CIPHERTEXT = a3944b95ca0b52043584ef02151926a8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 797f8b3d176dac5b7e34a2d539c4ef367a16f8635f6264737591c5c07bf57a3e
-CIPHERTEXT = a74289fe73a4c123ca189ea1e1b49ad5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 9
-KEY = 6838d40caf927749c13f0329d331f448e202c73ef52c5f73a37ca635d4c47707
-CIPHERTEXT = b91d4ea4488644b56cf0812fa7fcf5fc
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 10
-KEY = ccd1bc3c659cd3c59bc437484e3c5c724441da8d6e90ce556cd57d0752663bbc
-CIPHERTEXT = 304f81ab61a80c2e743b94d5002a126b
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = 13428b5e4c005e0636dd338405d173ab135dec2a25c22c5df0722d69dcc43887
-CIPHERTEXT = 649a71545378c783e368c9ade7114f6c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 12
-KEY = 07eb03a08d291d1b07408bf3512ab40c91097ac77461aad4bb859647f74f00ee
-CIPHERTEXT = 47cb030da2ab051dfc6c4bf6910d12bb
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 13
-KEY = 90143ae20cd78c5d8ebdd6cb9dc1762427a96c78c639bccc41a61424564eafe1
-CIPHERTEXT = 798c7c005dee432b2c8ea5dfa381ecc3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 14
-KEY = b7a5794d52737475d53d5a377200849be0260a67a2b22ced8bbef12882270d07
-CIPHERTEXT = 637c31dc2591a07636f646b72daabbe7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 15
-KEY = fca02f3d5011cfc5c1e23165d413a049d4526a991827424d896fe3435e0bf68e
-CIPHERTEXT = 179a49c712154bbffbe6e7a84a18e220
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey128.rsp
deleted file mode 100644
index e976c4ec1dd93..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey128.rsp
+++ /dev/null
@@ -1,1290 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:26 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 80000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0edd33d3c621e546455bd8ba1418bec8
-
-COUNT = 1
-KEY = c0000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4bc3f883450c113c64ca42e1112a9e87
-
-COUNT = 2
-KEY = e0000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 72a1da770f5d7ac4c9ef94d822affd97
-
-COUNT = 3
-KEY = f0000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 970014d634e2b7650777e8e84d03ccd8
-
-COUNT = 4
-KEY = f8000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f17e79aed0db7e279e955b5f493875a7
-
-COUNT = 5
-KEY = fc000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9ed5a75136a940d0963da379db4af26a
-
-COUNT = 6
-KEY = fe000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c4295f83465c7755e8fa364bac6a7ea5
-
-COUNT = 7
-KEY = ff000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = b1d758256b28fd850ad4944208cf1155
-
-COUNT = 8
-KEY = ff800000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 42ffb34c743de4d88ca38011c990890b
-
-COUNT = 9
-KEY = ffc00000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9958f0ecea8b2172c0c1995f9182c0f3
-
-COUNT = 10
-KEY = ffe00000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 956d7798fac20f82a8823f984d06f7f5
-
-COUNT = 11
-KEY = fff00000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a01bf44f2d16be928ca44aaf7b9b106b
-
-COUNT = 12
-KEY = fff80000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = b5f1a33e50d40d103764c76bd4c6b6f8
-
-COUNT = 13
-KEY = fffc0000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 2637050c9fc0d4817e2d69de878aee8d
-
-COUNT = 14
-KEY = fffe0000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 113ecbe4a453269a0dd26069467fb5b5
-
-COUNT = 15
-KEY = ffff0000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 97d0754fe68f11b9e375d070a608c884
-
-COUNT = 16
-KEY = ffff8000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c6a0b3e998d05068a5399778405200b4
-
-COUNT = 17
-KEY = ffffc000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = df556a33438db87bc41b1752c55e5e49
-
-COUNT = 18
-KEY = ffffe000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 90fb128d3a1af6e548521bb962bf1f05
-
-COUNT = 19
-KEY = fffff000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 26298e9c1db517c215fadfb7d2a8d691
-
-COUNT = 20
-KEY = fffff800000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a6cb761d61f8292d0df393a279ad0380
-
-COUNT = 21
-KEY = fffffc00000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 12acd89b13cd5f8726e34d44fd486108
-
-COUNT = 22
-KEY = fffffe00000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 95b1703fc57ba09fe0c3580febdd7ed4
-
-COUNT = 23
-KEY = ffffff00000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = de11722d893e9f9121c381becc1da59a
-
-COUNT = 24
-KEY = ffffff80000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6d114ccb27bf391012e8974c546d9bf2
-
-COUNT = 25
-KEY = ffffffc0000000000000000000000000
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey192.rsp
deleted file mode 100644
index f2f6016cf5689..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey192.rsp
+++ /dev/null
@@ -1,1930 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:28 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey256.rsp
deleted file mode 100644
index 2ad492458f877..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarKey256.rsp
+++ /dev/null
@@ -1,2570 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:30 2011
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-[ENCRYPT]
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-KEY = ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe0
-CIPHERTEXT = cf78618f74f6f3696e0a4779b90b5a77
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 251
-KEY = fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0
-CIPHERTEXT = 03720371a04962eaea0a852e69972858
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 252
-KEY = fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff8
-CIPHERTEXT = 1f8a8133aa8ccf70e2bd3285831ca6b7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 253
-KEY = fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffc
-CIPHERTEXT = 27936bd27fb1468fc8b48bc483321725
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 254
-KEY = fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffe
-CIPHERTEXT = b07d4f3e2cd2ef2eb545980754dfea0f
-PLAINTEXT = 00000000000000000000000000000000
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-COUNT = 255
-KEY = ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt128.rsp
deleted file mode 100644
index 08be9e58f17ef..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt128.rsp
+++ /dev/null
@@ -1,1290 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:26 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-PLAINTEXT = 80000000000000000000000000000000
-CIPHERTEXT = 3ad78e726c1ec02b7ebfe92b23d9ec34
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-PLAINTEXT = c0000000000000000000000000000000
-CIPHERTEXT = aae5939c8efdf2f04e60b9fe7117b2c2
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-PLAINTEXT = e0000000000000000000000000000000
-CIPHERTEXT = f031d4d74f5dcbf39daaf8ca3af6e527
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-PLAINTEXT = f0000000000000000000000000000000
-CIPHERTEXT = 96d9fd5cc4f07441727df0f33e401a36
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-PLAINTEXT = f8000000000000000000000000000000
-CIPHERTEXT = 30ccdb044646d7e1f3ccea3dca08b8c0
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-PLAINTEXT = fc000000000000000000000000000000
-CIPHERTEXT = 16ae4ce5042a67ee8e177b7c587ecc82
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-PLAINTEXT = fe000000000000000000000000000000
-CIPHERTEXT = b6da0bb11a23855d9c5cb1b4c6412e0a
-
-COUNT = 7
-KEY = 00000000000000000000000000000000
-PLAINTEXT = ff000000000000000000000000000000
-CIPHERTEXT = db4f1aa530967d6732ce4715eb0ee24b
-
-COUNT = 8
-KEY = 00000000000000000000000000000000
-PLAINTEXT = ff800000000000000000000000000000
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-
-COUNT = 9
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-COUNT = 10
-KEY = 00000000000000000000000000000000
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-COUNT = 11
-KEY = 00000000000000000000000000000000
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-COUNT = 12
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-COUNT = 13
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-COUNT = 14
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-COUNT = 15
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-COUNT = 16
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-COUNT = 17
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-PLAINTEXT = ffffc000000000000000000000000000
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-COUNT = 18
-KEY = 00000000000000000000000000000000
-PLAINTEXT = ffffe000000000000000000000000000
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-COUNT = 19
-KEY = 00000000000000000000000000000000
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-COUNT = 20
-KEY = 00000000000000000000000000000000
-PLAINTEXT = fffff800000000000000000000000000
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-COUNT = 21
-KEY = 00000000000000000000000000000000
-PLAINTEXT = fffffc00000000000000000000000000
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-
-COUNT = 22
-KEY = 00000000000000000000000000000000
-PLAINTEXT = fffffe00000000000000000000000000
-CIPHERTEXT = c0b5fd98190ef45fbb4301438d095950
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-COUNT = 23
-KEY = 00000000000000000000000000000000
-PLAINTEXT = ffffff00000000000000000000000000
-CIPHERTEXT = 13001ff5d99806efd25da34f56be854b
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-COUNT = 24
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-COUNT = 25
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-COUNT = 26
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-COUNT = 27
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-COUNT = 28
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-COUNT = 29
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-COUNT = 30
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-COUNT = 31
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-COUNT = 32
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-COUNT = 33
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-COUNT = 34
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-COUNT = 35
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-COUNT = 36
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-COUNT = 37
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-COUNT = 38
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-COUNT = 39
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-COUNT = 40
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-COUNT = 41
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-COUNT = 42
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-COUNT = 43
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-COUNT = 44
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-COUNT = 45
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-COUNT = 46
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-COUNT = 47
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-COUNT = 48
-KEY = 00000000000000000000000000000000
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-COUNT = 49
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-
-COUNT = 50
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-COUNT = 51
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-COUNT = 52
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-COUNT = 53
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-COUNT = 54
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-COUNT = 55
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-COUNT = 56
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-COUNT = 57
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-COUNT = 58
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-COUNT = 59
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-COUNT = 60
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-COUNT = 61
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-COUNT = 62
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-COUNT = 63
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-COUNT = 64
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-COUNT = 65
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-COUNT = 66
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-COUNT = 67
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-COUNT = 68
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-COUNT = 69
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-COUNT = 70
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-COUNT = 71
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-COUNT = 72
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-COUNT = 73
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-COUNT = 74
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-COUNT = 75
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-COUNT = 76
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-COUNT = 77
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-COUNT = 78
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-COUNT = 79
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-COUNT = 80
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-COUNT = 81
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-COUNT = 82
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-COUNT = 83
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-COUNT = 84
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-COUNT = 85
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-COUNT = 86
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-COUNT = 88
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-COUNT = 89
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-COUNT = 90
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-COUNT = 91
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-COUNT = 92
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-COUNT = 93
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-COUNT = 94
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-COUNT = 95
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-COUNT = 96
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-COUNT = 97
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-COUNT = 98
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-COUNT = 99
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-COUNT = 102
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-COUNT = 104
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-COUNT = 105
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-COUNT = 107
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-COUNT = 108
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-COUNT = 110
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-COUNT = 111
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-COUNT = 112
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-COUNT = 114
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-COUNT = 115
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-COUNT = 117
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-COUNT = 120
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-COUNT = 121
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-COUNT = 122
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-COUNT = 124
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-COUNT = 125
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-COUNT = 126
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-COUNT = 127
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-[DECRYPT]
-
-COUNT = 0
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-COUNT = 1
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-COUNT = 3
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-COUNT = 4
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-COUNT = 5
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt192.rsp
deleted file mode 100644
index 77e684d0de323..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt192.rsp
+++ /dev/null
@@ -1,1290 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:11:28 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt256.rsp
deleted file mode 100644
index c0013e90ef91b..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/ECBVarTxt256.rsp
+++ /dev/null
@@ -1,1290 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for ECB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:11:30 2011
-
-[ENCRYPT]
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-COUNT = 57
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-COUNT = 58
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-COUNT = 59
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffff00000000000000000
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-COUNT = 60
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffff80000000000000000
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-COUNT = 61
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-COUNT = 62
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-COUNT = 63
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-COUNT = 64
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-COUNT = 65
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-COUNT = 66
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-COUNT = 67
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-
-COUNT = 68
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-
-COUNT = 69
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-COUNT = 70
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-COUNT = 71
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-COUNT = 72
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-COUNT = 73
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-COUNT = 74
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-COUNT = 75
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-COUNT = 76
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-COUNT = 77
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-
-COUNT = 78
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-
-COUNT = 79
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-
-COUNT = 80
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-COUNT = 81
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-
-COUNT = 82
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-COUNT = 83
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-COUNT = 84
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-COUNT = 85
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-COUNT = 86
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-COUNT = 87
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-COUNT = 88
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-COUNT = 89
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-
-COUNT = 90
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-
-COUNT = 91
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-
-COUNT = 92
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-COUNT = 93
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-COUNT = 94
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-COUNT = 95
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-COUNT = 96
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-COUNT = 97
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-PLAINTEXT = ffffffffffffffffffffffffc0000000
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-COUNT = 98
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = ffffffffffffffffffffffffe0000000
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-COUNT = 99
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffff0000000
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-COUNT = 100
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-PLAINTEXT = fffffffffffffffffffffffff8000000
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-COUNT = 101
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffffc000000
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-COUNT = 102
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-COUNT = 103
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-COUNT = 104
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-COUNT = 105
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-COUNT = 106
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-COUNT = 107
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-COUNT = 108
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-COUNT = 109
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-COUNT = 110
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-COUNT = 111
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-COUNT = 112
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-COUNT = 113
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-COUNT = 114
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-COUNT = 115
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-COUNT = 116
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-COUNT = 117
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-
-COUNT = 118
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-
-COUNT = 119
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-
-COUNT = 120
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-PLAINTEXT = ffffffffffffffffffffffffffffff80
-
-COUNT = 121
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-COUNT = 122
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-PLAINTEXT = ffffffffffffffffffffffffffffffe0
-
-COUNT = 123
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 7240e524bc51d8c4d440b1be55d1062c
-PLAINTEXT = fffffffffffffffffffffffffffffff0
-
-COUNT = 124
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
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-PLAINTEXT = fffffffffffffffffffffffffffffff8
-
-COUNT = 125
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 0f59cb5a4b522e2ac56c1a64f558ad9a
-PLAINTEXT = fffffffffffffffffffffffffffffffc
-
-COUNT = 126
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-CIPHERTEXT = 7bfe9d876c6d63c1d035da8fe21c409d
-PLAINTEXT = fffffffffffffffffffffffffffffffe
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-COUNT = 127
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox128.rsp
deleted file mode 100644
index 099a1309ff6b6..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox128.rsp
+++ /dev/null
@@ -1,94 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:59 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = f34481ec3cc627bacd5dc3fb08f273e6
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 9798c4640bad75c7c3227db910174e72
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 96ab5c2ff612d9dfaae8c31f30c42168
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 6a118a874519e64e9963798a503f1d35
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = cb9fceec81286ca3e989bd979b0cb284
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = b26aeb1874e47ca8358ff22378f09144
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 58c8e00b2631686d54eab84b91f0aca1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 00000000000000000000000000000000
-IV = f34481ec3cc627bacd5dc3fb08f273e6
-CIPHERTEXT = 0336763e966d92595a567cc9ce537f5e
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 00000000000000000000000000000000
-IV = 9798c4640bad75c7c3227db910174e72
-CIPHERTEXT = a9a1631bf4996954ebc093957b234589
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 00000000000000000000000000000000
-IV = 96ab5c2ff612d9dfaae8c31f30c42168
-CIPHERTEXT = ff4f8391a6a40ca5b25d23bedd44a597
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 00000000000000000000000000000000
-IV = 6a118a874519e64e9963798a503f1d35
-CIPHERTEXT = dc43be40be0e53712f7e2bf5ca707209
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 00000000000000000000000000000000
-IV = cb9fceec81286ca3e989bd979b0cb284
-CIPHERTEXT = 92beedab1895a94faa69b632e5cc47ce
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 00000000000000000000000000000000
-IV = b26aeb1874e47ca8358ff22378f09144
-CIPHERTEXT = 459264f4798f6a78bacb89c15ed3d601
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = 00000000000000000000000000000000
-IV = 58c8e00b2631686d54eab84b91f0aca1
-CIPHERTEXT = 08a4e2efec8a8e3312ca7460b9040bbf
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox192.rsp
deleted file mode 100644
index 7906f1a22ad95..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox192.rsp
+++ /dev/null
@@ -1,82 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:12:01 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 1b077a6af4b7f98229de786d7516b639
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 9c2d8842e5f48f57648205d39a239af1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = bff52510095f518ecca60af4205444bb
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 51719783d3185a535bd75adc65071ce1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 26aa49dcfe7629a8901a69a9914e6dfd
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 941a4773058224e1ef66d10e0a6ee782
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 000000000000000000000000000000000000000000000000
-IV = 1b077a6af4b7f98229de786d7516b639
-CIPHERTEXT = 275cfc0413d8ccb70513c3859b1d0f72
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 000000000000000000000000000000000000000000000000
-IV = 9c2d8842e5f48f57648205d39a239af1
-CIPHERTEXT = c9b8135ff1b5adc413dfd053b21bd96d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 000000000000000000000000000000000000000000000000
-IV = bff52510095f518ecca60af4205444bb
-CIPHERTEXT = 4a3650c3371ce2eb35e389a171427440
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 000000000000000000000000000000000000000000000000
-IV = 51719783d3185a535bd75adc65071ce1
-CIPHERTEXT = 4f354592ff7c8847d2d0870ca9481b7c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 000000000000000000000000000000000000000000000000
-IV = 26aa49dcfe7629a8901a69a9914e6dfd
-CIPHERTEXT = d5e08bf9a182e857cf40b3a36ee248cc
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 000000000000000000000000000000000000000000000000
-IV = 941a4773058224e1ef66d10e0a6ee782
-CIPHERTEXT = 067cd9d3749207791841562507fa9626
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox256.rsp
deleted file mode 100644
index 06cc3ac17a058..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBGFSbox256.rsp
+++ /dev/null
@@ -1,70 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS GFSbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:12:03 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 014730f80ac625fe84f026c60bfd547d
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 0b24af36193ce4665f2825d7b4749c98
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 761c1fe41a18acf20d241650611d90f1
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 8a560769d605868ad80d819bdba03771
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 91fbef2d15a97816060bee1feaa49afe
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-
-[DECRYPT]
-
-COUNT = 0
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 014730f80ac625fe84f026c60bfd547d
-CIPHERTEXT = 5c9d844ed46f9885085e5d6a4f94c7d7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 0b24af36193ce4665f2825d7b4749c98
-CIPHERTEXT = a9ff75bd7cf6613d3731c77c3b6d0c04
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 761c1fe41a18acf20d241650611d90f1
-CIPHERTEXT = 623a52fcea5d443e48d9181ab32c7421
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 8a560769d605868ad80d819bdba03771
-CIPHERTEXT = 38f2c7ae10612415d27ca190d27da8b4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = 91fbef2d15a97816060bee1feaa49afe
-CIPHERTEXT = 1bc704f1bce135ceb810341b216d7abe
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox128.rsp
deleted file mode 100644
index 4aeb1a11959d9..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox128.rsp
+++ /dev/null
@@ -1,262 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:59 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
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-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
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-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
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-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
-IV = 00000000000000000000000000000000
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-
-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
-IV = 00000000000000000000000000000000
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-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
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-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
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-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
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-
-COUNT = 14
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-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fff60a4740086b3b9c56195b98d91a7b
-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
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-
-[DECRYPT]
-
-COUNT = 0
-KEY = 10a58869d74be5a374cf867cfb473859
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 6d251e6944b051e04eaa6fb4dbf78465
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-
-COUNT = 1
-KEY = caea65cdbb75e9169ecd22ebe6e54675
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-CIPHERTEXT = 6e29201190152df4ee058139def610bb
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a2e2fa9baf7d20822ca9f0542f764a41
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c3b44b95d9d2f25670eee9a0de099fa3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = b6364ac4e1de1e285eaf144a2415f7a0
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 5d9b05578fc944b3cf1ccf0e746cd581
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 64cf9c7abc50b888af65f49d521944b2
-IV = 00000000000000000000000000000000
-CIPHERTEXT = f7efc89d5dba578104016ce5ad659c05
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 47d6742eefcc0465dc96355e851b64d9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0306194f666d183624aa230a8b264ae7
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-
-COUNT = 6
-KEY = 3eb39790678c56bee34bbcdeccf6cdb5
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-
-COUNT = 7
-KEY = 64110a924f0743d500ccadae72c13427
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 18d8126516f8a12ab1a36d9f04d68e51
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-COUNT = 9
-KEY = f530357968578480b398a3c251cd1093
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-
-COUNT = 10
-KEY = da84367f325d42d601b4326964802e8e
-IV = 00000000000000000000000000000000
-CIPHERTEXT = bba071bcb470f8f6586e5d3add18bc66
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = e37b1c6aa2846f6fdb413f238b089f23
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 43c9f7e62f5d288bb27aa40ef8fe1ea8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 12
-KEY = 6c002b682483e0cabcc731c253be5674
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3580d19cff44f1014a7c966a69059de5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 13
-KEY = 143ae8ed6555aba96110ab58893a8ae1
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 806da864dd29d48deafbe764f8202aef
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 14
-KEY = b69418a85332240dc82492353956ae0c
-IV = 00000000000000000000000000000000
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-
-COUNT = 15
-KEY = 71b5c08a1993e1362e4d0ce9b22b78d5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = c2dabd117f8a3ecabfbb11d12194d9d0
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-
-COUNT = 16
-KEY = e234cdca2606b81f29408d5f6da21206
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-
-COUNT = 17
-KEY = 13237c49074a3da078dc1d828bb78c6f
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8146a08e2357f0caa30ca8c94d1a0544
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 3071a2a48fe6cbd04f1a129098e308f8
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 4b98e06d356deb07ebb824e5713f7be3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = 90f42ec0f68385f2ffc5dfc03a654dce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7a20a53d460fc9ce0423a7a0764c6cf2
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = febd9a24d8b65c1c787d50a4ed3619a9
-IV = 00000000000000000000000000000000
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox192.rsp
deleted file mode 100644
index 537f3b8f283a8..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox192.rsp
+++ /dev/null
@@ -1,298 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:12:01 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 3b7c24f825e3bf9873c9f14d39a0e6f4
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = cfe4d74002696ccf7d87b14a2f9cafc9
-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = d2eafd86f63b109b91f5dbb3a3fb7e13
-
-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 9b9fdd1c5975655f539998b306a324af
-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = dd619e1cf204446112e0af2b9afa8f8c
-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = d4f0aae13c8fe9339fbf9e69ed0ad74d
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-IV = 00000000000000000000000000000000
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-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 3cf5e1d21a17956d1dffad6a7c41c659
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
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-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-
-[DECRYPT]
-
-COUNT = 0
-KEY = e9f065d7c13573587f7875357dfbb16c53489f6a4bd0f7cd
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 0956259c9cd5cfd0181cca53380cde06
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 1
-KEY = 15d20f6ebc7e649fd95b76b107e6daba967c8a9484797f29
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e4e18424e591a3d5b6f0876f16f8594
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 2
-KEY = a8a282ee31c03fae4f8e9b8930d5473c2ed695a347e88b7c
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 93f3270cfc877ef17e106ce938979cb0
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 3
-KEY = cd62376d5ebb414917f0c78f05266433dc9192a1ec943300
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7f6c25ff41858561bb62f36492e93c29
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 4
-KEY = 502a6ab36984af268bf423c7f509205207fc1552af4a91e5
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8e06556dcbb00b809a025047cff2a940
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 5
-KEY = 25a39dbfd8034f71a81f9ceb55026e4037f8f6aa30ab44ce
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3608c344868e94555d23a120f8a5502d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 6
-KEY = e08c15411774ec4a908b64eadc6ac4199c7cd453f3aaef53
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 77da2021935b840b7f5dcc39132da9e5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 7
-KEY = 3b375a1ff7e8d44409696e6326ec9dec86138e2ae010b980
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 3b7c24f825e3bf9873c9f14d39a0e6f4
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 8
-KEY = 950bb9f22cc35be6fe79f52c320af93dec5bc9c0c2f9cd53
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 64ebf95686b353508c90ecd8b6134316
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 9
-KEY = 7001c487cc3e572cfc92f4d0e697d982e8856fdcc957da40
-IV = 00000000000000000000000000000000
-CIPHERTEXT = ff558c5d27210b7929b73fc708eb4cf1
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 10
-KEY = f029ce61d4e5a405b41ead0a883cc6a737da2cf50a6c92ae
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a2c3b2a818075490a7b4c14380f02702
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 11
-KEY = 61257134a518a0d57d9d244d45f6498cbc32f2bafc522d79
-IV = 00000000000000000000000000000000
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-
-COUNT = 12
-KEY = b0ab0a6a818baef2d11fa33eac947284fb7d748cfb75e570
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-
-COUNT = 13
-KEY = ee053aa011c8b428cdcc3636313c54d6a03cac01c71579d6
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-
-COUNT = 14
-KEY = d2926527e0aa9f37b45e2ec2ade5853ef807576104c7ace3
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-
-COUNT = 15
-KEY = 982215f4e173dfa0fcffe5d3da41c4812c7bcc8ed3540f93
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 16
-KEY = 98c6b8e01e379fbd14e61af6af891596583565f2a27d59e9
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 17
-KEY = b3ad5cea1dddc214ca969ac35f37dae1a9a9d1528f89bb35
-IV = 00000000000000000000000000000000
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-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 18
-KEY = 45899367c3132849763073c435a9288a766c8b9ec2308516
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 69fd12e8505f8ded2fdcb197a121b362
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 19
-KEY = ec250e04c3903f602647b85a401a1ae7ca2f02f67fa4253e
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 8aa584e2cc4d17417a97cb9a28ba29c8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 20
-KEY = d077a03bd8a38973928ccafe4a9d2f455130bd0af5ae46a9
-IV = 00000000000000000000000000000000
-CIPHERTEXT = abc786fb1edb504580c4d882ef29a0c7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 21
-KEY = d184c36cf0dddfec39e654195006022237871a47c33d3198
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 2e19fb60a3e1de0166f483c97824a978
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 22
-KEY = 4c6994ffa9dcdc805b60c2c0095334c42d95a8fc0ca5b080
-IV = 00000000000000000000000000000000
-CIPHERTEXT = 7656709538dd5fec41e0ce6a0f8e207d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 23
-KEY = c88f5b00a4ef9a6840e2acaf33f00a3bdc4e25895303fa72
-IV = 00000000000000000000000000000000
-CIPHERTEXT = a67cf333b314d411d3c0ae6e1cfcd8f5
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox256.rsp
deleted file mode 100644
index 9c2729f0dd442..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBKeySbox256.rsp
+++ /dev/null
@@ -1,202 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS KeySbox test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:12:03 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = c47b0294dbbbee0fec4757f22ffeee3587ca4730c3d33b691df38bab076bc558
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 46f2fb342d6f0ab477476fc501242c5f
-
-COUNT = 1
-KEY = 28d46cffa158533194214a91e712fc2b45b518076675affd910edeca5f41ac64
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4bf3b0a69aeb6657794f2901b1440ad4
-
-COUNT = 2
-KEY = c1cc358b449909a19436cfbb3f852ef8bcb5ed12ac7058325f56e6099aab1a1c
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 352065272169abf9856843927d0674fd
-
-COUNT = 3
-KEY = 984ca75f4ee8d706f46c2d98c0bf4a45f5b00d791c2dfeb191b5ed8e420fd627
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4307456a9e67813b452e15fa8fffe398
-
-COUNT = 4
-KEY = b43d08a447ac8609baadae4ff12918b9f68fc1653f1269222f123981ded7a92f
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 4663446607354989477a5c6f0f007ef4
-
-COUNT = 5
-KEY = 1d85a181b54cde51f0e098095b2962fdc93b51fe9b88602b3f54130bf76a5bd9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = 531c2c38344578b84d50b3c917bbb6e1
-
-COUNT = 6
-KEY = dc0eba1f2232a7879ded34ed8428eeb8769b056bbaf8ad77cb65c3541430b4cf
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = fc6aec906323480005c58e7e1ab004ad
-
-COUNT = 7
-KEY = f8be9ba615c5a952cabbca24f68f8593039624d524c816acda2c9183bd917cb9
-IV = 00000000000000000000000000000000
-PLAINTEXT = 00000000000000000000000000000000
-CIPHERTEXT = a3944b95ca0b52043584ef02151926a8
-
-COUNT = 8
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-COUNT = 9
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-COUNT = 10
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-COUNT = 11
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-COUNT = 12
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-COUNT = 13
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-COUNT = 14
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-COUNT = 15
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-
-[DECRYPT]
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-COUNT = 0
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-COUNT = 1
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-COUNT = 2
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-COUNT = 3
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-COUNT = 11
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-COUNT = 13
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-COUNT = 14
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-COUNT = 15
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey128.rsp
deleted file mode 100644
index cf3d026edee33..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:59 2011
-
-[ENCRYPT]
-
-COUNT = 0
-KEY = 80000000000000000000000000000000
-IV = 00000000000000000000000000000000
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-CIPHERTEXT = 0edd33d3c621e546455bd8ba1418bec8
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-COUNT = 1
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-COUNT = 2
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-COUNT = 3
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-COUNT = 4
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-COUNT = 5
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-COUNT = 6
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-COUNT = 7
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-COUNT = 8
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-COUNT = 9
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-COUNT = 10
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-COUNT = 12
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-COUNT = 13
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-COUNT = 14
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-COUNT = 18
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-COUNT = 20
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-COUNT = 21
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-COUNT = 22
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey192.rsp
deleted file mode 100644
index 8695cd25df7da..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey192.rsp
+++ /dev/null
@@ -1,2314 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:12:01 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey256.rsp
deleted file mode 100644
index 94b9b902d608d..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarKey256.rsp
+++ /dev/null
@@ -1,3082 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarKey test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:12:03 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt128.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt128.rsp
deleted file mode 100644
index 9e3556bae0a8f..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt128.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 128
-# Generated on Fri Apr 22 15:11:59 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt192.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt192.rsp
deleted file mode 100644
index 75f34284103af..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt192.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 192
-# Generated on Fri Apr 22 15:12:01 2011
-
-[ENCRYPT]
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diff --git a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt256.rsp b/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt256.rsp
deleted file mode 100644
index 22926e82d4f92..0000000000000
--- a/sw/host/cryptotest/testvectors/data/aes_nist_kat/OFBVarTxt256.rsp
+++ /dev/null
@@ -1,1546 +0,0 @@
-# CAVS 11.1
-# Config info for aes_values
-# AESVS VarTxt test data for OFB
-# State : Encrypt and Decrypt
-# Key Length : 256
-# Generated on Fri Apr 22 15:12:03 2011
-
-[ENCRYPT]
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-IV = ffffffffffffffffffff000000000000
-CIPHERTEXT = 12e71214ae8e04f0bb63d7425c6f14d5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 80
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffff800000000000
-CIPHERTEXT = 4cc42fc1407b008fe350907c092e80ac
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 81
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffc00000000000
-CIPHERTEXT = 08b244ce7cbc8ee97fbba808cb146fda
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 82
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffe00000000000
-CIPHERTEXT = 39b333e8694f21546ad1edd9d87ed95b
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 83
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffff00000000000
-CIPHERTEXT = 3b271f8ab2e6e4a20ba8090f43ba78f3
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 84
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffff80000000000
-CIPHERTEXT = 9ad983f3bf651cd0393f0a73cccdea50
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 85
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffc0000000000
-CIPHERTEXT = 8f476cbff75c1f725ce18e4bbcd19b32
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 86
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffe0000000000
-CIPHERTEXT = 905b6267f1d6ab5320835a133f096f2a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 87
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffff0000000000
-CIPHERTEXT = 145b60d6d0193c23f4221848a892d61a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 88
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffff8000000000
-CIPHERTEXT = 55cfb3fb6d75cad0445bbc8dafa25b0f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 89
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffc000000000
-CIPHERTEXT = 7b8e7098e357ef71237d46d8b075b0f5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 90
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffe000000000
-CIPHERTEXT = 2bf27229901eb40f2df9d8398d1505ae
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 91
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffff000000000
-CIPHERTEXT = 83a63402a77f9ad5c1e931a931ecd706
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 92
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffff800000000
-CIPHERTEXT = 6f8ba6521152d31f2bada1843e26b973
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 93
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffc00000000
-CIPHERTEXT = e5c3b8e30fd2d8e6239b17b44bd23bbd
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 94
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffe00000000
-CIPHERTEXT = 1ac1f7102c59933e8b2ddc3f14e94baa
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 95
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffff00000000
-CIPHERTEXT = 21d9ba49f276b45f11af8fc71a088e3d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 96
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffff80000000
-CIPHERTEXT = 649f1cddc3792b4638635a392bc9bade
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 97
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffc0000000
-CIPHERTEXT = e2775e4b59c1bc2e31a2078c11b5a08c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 98
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffe0000000
-CIPHERTEXT = 2be1fae5048a25582a679ca10905eb80
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 99
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffff0000000
-CIPHERTEXT = da86f292c6f41ea34fb2068df75ecc29
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 100
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffff8000000
-CIPHERTEXT = 220df19f85d69b1b562fa69a3c5beca5
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 101
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffc000000
-CIPHERTEXT = 1f11d5d0355e0b556ccdb6c7f5083b4d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 102
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffe000000
-CIPHERTEXT = 62526b78be79cb384633c91f83b4151b
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 103
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffff000000
-CIPHERTEXT = 90ddbcb950843592dd47bbef00fdc876
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 104
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffff800000
-CIPHERTEXT = 2fd0e41c5b8402277354a7391d2618e2
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 105
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffc00000
-CIPHERTEXT = 3cdf13e72dee4c581bafec70b85f9660
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 106
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffe00000
-CIPHERTEXT = afa2ffc137577092e2b654fa199d2c43
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 107
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffff00000
-CIPHERTEXT = 8d683ee63e60d208e343ce48dbc44cac
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 108
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffff80000
-CIPHERTEXT = 705a4ef8ba2133729c20185c3d3a4763
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 109
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffc0000
-CIPHERTEXT = 0861a861c3db4e94194211b77ed761b9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 110
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffe0000
-CIPHERTEXT = 4b00c27e8b26da7eab9d3a88dec8b031
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 111
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffff0000
-CIPHERTEXT = 5f397bf03084820cc8810d52e5b666e9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 112
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffff8000
-CIPHERTEXT = 63fafabb72c07bfbd3ddc9b1203104b8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 113
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffc000
-CIPHERTEXT = 683e2140585b18452dd4ffbb93c95df9
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 114
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffe000
-CIPHERTEXT = 286894e48e537f8763b56707d7d155c8
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 115
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffff000
-CIPHERTEXT = a423deabc173dcf7e2c4c53e77d37cd1
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 116
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffff800
-CIPHERTEXT = eb8168313e1cfdfdb5e986d5429cf172
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 117
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffc00
-CIPHERTEXT = 27127daafc9accd2fb334ec3eba52323
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 118
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffe00
-CIPHERTEXT = ee0715b96f72e3f7a22a5064fc592f4c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 119
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffff00
-CIPHERTEXT = 29ee526770f2a11dcfa989d1ce88830f
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 120
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffff80
-CIPHERTEXT = 0493370e054b09871130fe49af730a5a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 121
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffc0
-CIPHERTEXT = 9b7b940f6c509f9e44a4ee140448ee46
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 122
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffe0
-CIPHERTEXT = 2915be4a1ecfdcbe3e023811a12bb6c7
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 123
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffff0
-CIPHERTEXT = 7240e524bc51d8c4d440b1be55d1062c
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 124
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffff8
-CIPHERTEXT = da63039d38cb4612b2dc36ba26684b93
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 125
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffffc
-CIPHERTEXT = 0f59cb5a4b522e2ac56c1a64f558ad9a
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 126
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = fffffffffffffffffffffffffffffffe
-CIPHERTEXT = 7bfe9d876c6d63c1d035da8fe21c409d
-PLAINTEXT = 00000000000000000000000000000000
-
-COUNT = 127
-KEY = 0000000000000000000000000000000000000000000000000000000000000000
-IV = ffffffffffffffffffffffffffffffff
-CIPHERTEXT = acdace8078a32b1a182bfa4987ca1347
-PLAINTEXT = 00000000000000000000000000000000
diff --git a/sw/host/cryptotest/testvectors/data/cshake_nist_example_values.hjson b/sw/host/cryptotest/testvectors/data/cshake_nist_example_values.hjson
new file mode 100644
index 0000000000000..1744f863133cb
--- /dev/null
+++ b/sw/host/cryptotest/testvectors/data/cshake_nist_example_values.hjson
@@ -0,0 +1,41 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// The following vectors are obtained from:
+// https://csrc.nist.gov/projects/cryptographic-standards-and-guidelines/example-values
+
+[
+  {
+    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #1"
+    operation: CSHAKE
+    security_str: 128
+    input_msg: 0x00010203
+    cust_str: 0x456d61696c205369676e6174757265
+    digest: 0xc1c36925b6409a04f1b504fcbca9d82b4017277cb5ed2b2065fc1d3814d5aaf5
+  }
+  {
+    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #2"
+    operation: CSHAKE
+    security_str: 128
+    input_msg: 0x000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d1e1f202122232425262728292a2b2c2d2e2f303132333435363738393a3b3c3d3e3f404142434445464748494a4b4c4d4e4f505152535455565758595a5b5c5d5e5f606162636465666768696a6b6c6d6e6f707172737475767778797a7b7c7d7e7f808182838485868788898a8b8c8d8e8f909192939495969798999a9b9c9d9e9fa0a1a2a3a4a5a6a7a8a9aaabacadaeafb0b1b2b3b4b5b6b7b8b9babbbcbdbebfc0c1c2c3c4c5c6c7
+    cust_str: 0x456d61696c205369676e6174757265
+    digest: 0xc5221d50e4f822d96a2e8881a961420f294b7b24fe3d2094baed2c6524cc166b
+  }
+  {
+    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #3"
+    operation: CSHAKE
+    security_str: 256
+    input_msg: 0x00010203
+    cust_str: 0x456d61696c205369676e6174757265
+    digest: 0xd008828e2b80ac9d2218ffee1d070c48b8e4c87bff32c9699d5b6896eee0edd164020e2be0560858d9c00c037e34a96937c561a74c412bb4c746469527281c8c
+  }
+  {
+    vector_identifier: "NIST SP 800-185, cSHAKE_samples.pdf, Sample #4"
+    operation: CSHAKE
+    security_str: 256
+    input_msg: 0x000102030405060708090a0b0c0d0e0f101112131415161718191a1b1c1d1e1f202122232425262728292a2b2c2d2e2f303132333435363738393a3b3c3d3e3f404142434445464748494a4b4c4d4e4f505152535455565758595a5b5c5d5e5f606162636465666768696a6b6c6d6e6f707172737475767778797a7b7c7d7e7f808182838485868788898a8b8c8d8e8f909192939495969798999a9b9c9d9e9fa0a1a2a3a4a5a6a7a8a9aaabacadaeafb0b1b2b3b4b5b6b7b8b9babbbcbdbebfc0c1c2c3c4c5c6c7
+    cust_str: 0x456d61696c205369676e6174757265
+    digest: 0x07dc27b11e51fbac75bc7b3c1d983e8b4b85fb1defaf218912ac86430273091727f42b17ed1df63e8ec118f04b23633c1dfb1574c8fb55cb45da8e25afb092bb
+  }
+]
diff --git a/sw/host/cryptotest/testvectors/data/schemas/ecdsa_schema.json b/sw/host/cryptotest/testvectors/data/schemas/ecdsa_schema.json
index 167abca7822f8..cef2fcd30c2f7 100644
--- a/sw/host/cryptotest/testvectors/data/schemas/ecdsa_schema.json
+++ b/sw/host/cryptotest/testvectors/data/schemas/ecdsa_schema.json
@@ -59,10 +59,6 @@
         "description": "Qy",
         "type": "string"
       },
-      "d": {
-        "description": "Private value d",
-        "type": "string"
-      },
       "r": {
         "description": "r parameter",
         "type": "string"
diff --git a/sw/host/cryptotest/testvectors/parsers/nist_aes_parser.py b/sw/host/cryptotest/testvectors/parsers/nist_aes_parser.py
index 1fafdf04e08cf..6af4c6fb63058 100755
--- a/sw/host/cryptotest/testvectors/parsers/nist_aes_parser.py
+++ b/sw/host/cryptotest/testvectors/parsers/nist_aes_parser.py
@@ -48,7 +48,7 @@ def parse_testcases(args) -> None:
 
         testcases.append(testcase)
 
-    json_filename = f"{args.dst}.json"
+    json_filename = f"{args.dst}"
     with open(json_filename, "w") as file:
         json.dump(testcases, file, indent=4)
 
diff --git a/sw/host/cryptotest/testvectors/parsers/nist_cavp_hash_parser.py b/sw/host/cryptotest/testvectors/parsers/nist_cavp_hash_parser.py
index 5ff3fffd160ab..77be7f8cd4672 100755
--- a/sw/host/cryptotest/testvectors/parsers/nist_cavp_hash_parser.py
+++ b/sw/host/cryptotest/testvectors/parsers/nist_cavp_hash_parser.py
@@ -20,6 +20,7 @@
     "SHA256": "sha-256",
     "SHA384": "sha-384",
     "SHA512": "sha-512",
+    "SHA3_224": "sha3-224",
     "SHA3_256": "sha3-256",
     "SHA3_384": "sha3-384",
     "SHA3_512": "sha3-512",
diff --git a/sw/host/hsmtool/BUILD b/sw/host/hsmtool/BUILD
index 15805127339a2..a358617b0ed34 100644
--- a/sw/host/hsmtool/BUILD
+++ b/sw/host/hsmtool/BUILD
@@ -9,6 +9,10 @@ package(default_visibility = ["//visibility:public"])
 rust_library(
     name = "hsmlib",
     srcs = [
+        "src/commands/aes/export.rs",
+        "src/commands/aes/generate.rs",
+        "src/commands/aes/import.rs",
+        "src/commands/aes/mod.rs",
         "src/commands/ecdsa/export.rs",
         "src/commands/ecdsa/generate.rs",
         "src/commands/ecdsa/import.rs",
@@ -16,12 +20,18 @@ rust_library(
         "src/commands/ecdsa/sign.rs",
         "src/commands/ecdsa/verify.rs",
         "src/commands/exec.rs",
+        "src/commands/kdf/export.rs",
+        "src/commands/kdf/generate.rs",
+        "src/commands/kdf/import.rs",
+        "src/commands/kdf/mod.rs",
         "src/commands/mod.rs",
         "src/commands/object/destroy.rs",
         "src/commands/object/list.rs",
         "src/commands/object/mod.rs",
+        "src/commands/object/read.rs",
         "src/commands/object/show.rs",
         "src/commands/object/update.rs",
+        "src/commands/object/write.rs",
         "src/commands/rsa/decrypt.rs",
         "src/commands/rsa/encrypt.rs",
         "src/commands/rsa/export.rs",
@@ -30,8 +40,18 @@ rust_library(
         "src/commands/rsa/mod.rs",
         "src/commands/rsa/sign.rs",
         "src/commands/rsa/verify.rs",
+        "src/commands/spx/export.rs",
+        "src/commands/spx/generate.rs",
+        "src/commands/spx/import.rs",
+        "src/commands/spx/list.rs",
+        "src/commands/spx/mod.rs",
+        "src/commands/spx/sign.rs",
+        "src/commands/spx/verify.rs",
         "src/commands/token.rs",
         "src/error.rs",
+        "src/extra/mod.rs",
+        "src/extra/spxef.rs",
+        "src/extra/spxkms.rs",
         "src/lib.rs",
         "src/module.rs",
         "src/profile.rs",
@@ -45,31 +65,40 @@ rust_library(
         "src/util/attribute/mechanism_type.rs",
         "src/util/attribute/mod.rs",
         "src/util/attribute/object_class.rs",
+        "src/util/ef.rs",
         "src/util/escape.rs",
         "src/util/helper.rs",
         "src/util/key/ecdsa.rs",
         "src/util/key/mod.rs",
         "src/util/key/rsa.rs",
         "src/util/mod.rs",
+        "src/util/secret.rs",
         "src/util/signing.rs",
+        "src/util/wrap.rs",
     ],
     crate_name = "hsmtool",
     deps = [
+        "//sw/host/hsmtool/acorn",
+        "//sw/host/sphincsplus",
         "@crate_index//:anyhow",
+        "@crate_index//:base64ct",
         "@crate_index//:clap",
         "@crate_index//:cryptoki",
         "@crate_index//:cryptoki-sys",
         "@crate_index//:der",
         "@crate_index//:directories",
         "@crate_index//:ecdsa",
+        "@crate_index//:erased-serde",
         "@crate_index//:hex",
         "@crate_index//:indexmap",
         "@crate_index//:log",
         "@crate_index//:num_enum",
         "@crate_index//:once_cell",
         "@crate_index//:p256",
+        "@crate_index//:pem-rfc7468",
         "@crate_index//:rand",
         "@crate_index//:regex",
+        "@crate_index//:reqwest",
         "@crate_index//:rsa",
         "@crate_index//:rustix",
         "@crate_index//:serde",
@@ -79,6 +108,7 @@ rust_library(
         "@crate_index//:strum",
         "@crate_index//:thiserror",
         "@crate_index//:typetag",
+        "@crate_index//:zeroize",
         "@lowrisc_serde_annotate//serde_annotate",
     ],
 )
@@ -101,8 +131,11 @@ rust_test(
     name = "hsmlib_test",
     crate = ":hsmlib",
     data = glob([
-        "src/util/key/testdata/**",
+        "testdata/**",
     ]),
+    env = {
+        "TESTDATA": "$(rootpath testdata/key/test1_pkcs1.der)",
+    },
 )
 
 rust_doc(
diff --git a/sw/host/hsmtool/acorn/BUILD b/sw/host/hsmtool/acorn/BUILD
new file mode 100644
index 0000000000000..1ce0c722ef4a2
--- /dev/null
+++ b/sw/host/hsmtool/acorn/BUILD
@@ -0,0 +1,26 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test")
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "acorn",
+    srcs = [
+        "acorn.rs",
+        "lib.rs",
+        "spx.rs",
+    ],
+    crate_root = "lib.rs",
+    deps = [
+        "//sw/host/hsmtool/acorn/vendor:acorn_bindgen",
+        "//sw/host/sphincsplus",
+        "@crate_index//:anyhow",
+        "@crate_index//:bitflags",
+        "@crate_index//:libloading",
+        "@crate_index//:thiserror",
+    ],
+)
diff --git a/sw/host/hsmtool/acorn/acorn.rs b/sw/host/hsmtool/acorn/acorn.rs
new file mode 100644
index 0000000000000..b6b899fdf8331
--- /dev/null
+++ b/sw/host/hsmtool/acorn/acorn.rs
@@ -0,0 +1,538 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use libloading::Library;
+use sphincsplus::SpxDomain;
+use std::ffi::{CStr, CString};
+use thiserror::Error;
+
+use crate::{GenerateFlags, KeyEntry, KeyInfo, SpxInterface};
+
+#[derive(Error, Debug)]
+pub enum AcornError {
+    #[error("acorn library error: {0}")]
+    Message(String),
+}
+
+/// Converts a C-string into a rust string.
+///
+/// # Safety
+///
+/// `ptr` should either be a null pointer or a valid pointer to a C NUL-terminated string.
+unsafe fn rust_string(ptr: *const std::ffi::c_char) -> String {
+    if ptr.is_null() {
+        "nullptr for string!".into()
+    } else {
+        // SAFETY: `ptr` is a valid pointer to a C string.
+        unsafe { CStr::from_ptr(ptr) }
+            .to_string_lossy()
+            .into_owned()
+    }
+}
+
+#[allow(non_snake_case)]
+#[allow(dead_code)]
+struct FreeFunc {
+    getVersion: acorn_bindgen::acorn_free_getVersion,
+    list: acorn_bindgen::acorn_free_list,
+    getPublic: acorn_bindgen::acorn_free_getPublic,
+    getPublicHash: acorn_bindgen::acorn_free_getPublicHash,
+    getKeyInfo: acorn_bindgen::acorn_free_getKeyInfo,
+    generate: acorn_bindgen::acorn_free_generate,
+    importKeypair: acorn_bindgen::acorn_free_importKeypair,
+    sign: acorn_bindgen::acorn_free_sign,
+    verify: acorn_bindgen::acorn_free_verify,
+    signImmediate: acorn_bindgen::acorn_free_signImmediate,
+    verifyImmediate: acorn_bindgen::acorn_free_verifyImmediate,
+    see_getVersion: acorn_bindgen::acorn_free_see_getVersion,
+}
+
+struct AcornLibrary {
+    _library: libloading::Library,
+    func: acorn_bindgen::acorn_cmdlist,
+    free: FreeFunc,
+}
+
+impl AcornLibrary {
+    pub fn new<P>(path: P) -> Result<Self>
+    where
+        P: AsRef<std::ffi::OsStr>,
+    {
+        // SAFETY: The calls to Library::get specify the correct type of
+        // the named symbol.
+        unsafe {
+            let library = Library::new(path)?;
+            let getcmdlist: acorn_bindgen::acorn_getcmdlist =
+                library.get(b"acorn_getcmdlist\0").map(|sym| Some(*sym))?;
+
+            let mut func = acorn_bindgen::acorn_cmdlist::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let ret = (getcmdlist.expect("getcmdlist"))(&mut func, &mut err);
+            if ret != 0 {
+                return Err(AcornError::Message(rust_string(err)).into());
+            }
+            let free = FreeFunc {
+                getVersion: library
+                    .get(b"acorn_free_getVersion\0")
+                    .map(|sym| Some(*sym))?,
+                list: library.get(b"acorn_free_list\0").map(|sym| Some(*sym))?,
+                getPublic: library
+                    .get(b"acorn_free_getPublic\0")
+                    .map(|sym| Some(*sym))?,
+                getPublicHash: library
+                    .get(b"acorn_free_getPublicHash\0")
+                    .map(|sym| Some(*sym))?,
+                getKeyInfo: library
+                    .get(b"acorn_free_getKeyInfo\0")
+                    .map(|sym| Some(*sym))?,
+                generate: library
+                    .get(b"acorn_free_generate\0")
+                    .map(|sym| Some(*sym))?,
+                importKeypair: library
+                    .get(b"acorn_free_importKeypair\0")
+                    .map(|sym| Some(*sym))?,
+                sign: library.get(b"acorn_free_sign\0").map(|sym| Some(*sym))?,
+                verify: library.get(b"acorn_free_verify\0").map(|sym| Some(*sym))?,
+                signImmediate: library
+                    .get(b"acorn_free_signImmediate\0")
+                    .map(|sym| Some(*sym))?,
+                verifyImmediate: library
+                    .get(b"acorn_free_verifyImmediate\0")
+                    .map(|sym| Some(*sym))?,
+                see_getVersion: library
+                    .get(b"acorn_free_see_getVersion\0")
+                    .map(|sym| Some(*sym))?,
+            };
+
+            Ok(Self {
+                _library: library,
+                func,
+                free,
+            })
+        }
+    }
+}
+
+pub struct Acorn {
+    lib: AcornLibrary,
+}
+
+impl Acorn {
+    pub fn new<P>(path: P) -> Result<Box<Self>>
+    where
+        P: AsRef<std::ffi::OsStr>,
+    {
+        let lib = AcornLibrary::new(path)?;
+        Ok(Box::new(Acorn { lib }))
+    }
+
+    /// Get the version of the acorn host software.
+    pub fn get_host_version(&self) -> Result<String> {
+        let mut rsp = acorn_bindgen::acorn_response_getVersion::default();
+        let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+        // SAFETY: The arguments to `getVersion` are of the correct type.
+        unsafe {
+            let result = if (self.lib.func.getVersion.as_ref().expect("func.getVersion"))(
+                &mut rsp, &mut err,
+            ) == 0
+            {
+                Ok(rust_string(rsp.version))
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.getVersion.as_ref().expect("free.getVersion"))(
+                std::ptr::null_mut(),
+                &mut rsp,
+            );
+            result
+        }
+    }
+
+    /// Get the version of the acorn module running in the HSM's secure execution environment.
+    pub fn get_see_version(&self) -> Result<String> {
+        let mut req = acorn_bindgen::acorn_request_see_getVersion::default();
+        let mut rsp = acorn_bindgen::acorn_response_see_getVersion::default();
+        let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+        // SAFETY: The arguments to `see_getVersion` are of the correct type.
+        unsafe {
+            let result = if (self
+                .lib
+                .func
+                .see_getVersion
+                .as_ref()
+                .expect("func.see_getVersion"))(
+                &mut req, &mut rsp, &mut err
+            ) == 0
+            {
+                Ok(rust_string(rsp.version))
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self
+                .lib
+                .free
+                .see_getVersion
+                .as_ref()
+                .expect("free.see_getVersion"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+
+    // TODO: get_public_key, but get_key_info provides the same data.
+    pub fn get_public_key(&self, alias: &str) -> Result<Vec<u8>> {
+        let alias = CString::new(alias)?;
+        // SAFETY: The data returned by `get_public_key` is copied into a rust Vec.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let mut rsp = acorn_bindgen::acorn_response_getPublic::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self.lib.func.getPublic.as_ref().expect("func.getPublic"))(
+                alias.as_ptr(),
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                let pkey =
+                    std::slice::from_raw_parts(rsp.publicKey.ptr, rsp.publicKey.len as usize);
+                Ok(pkey.to_vec())
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.getPublic.as_ref().expect("free.getPublic"))(
+                std::ptr::null_mut(),
+                &mut rsp,
+            );
+            result
+        }
+    }
+
+    // TODO: get_public_hash, but get_key_info provides the same data.
+    pub fn get_public_hash(&self, public_key: &[u8]) -> Result<String> {
+        // SAFETY: The string returned by `get_public_hash` is copied into a rust String.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let public_key = acorn_bindgen::acorn_buffer {
+                // The acorn API wants a mut ptr (but it wont mutate).
+                ptr: public_key.as_ptr().cast_mut(),
+                len: public_key.len() as u32,
+            };
+            let mut rsp = acorn_bindgen::acorn_response_getPublicHash::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self
+                .lib
+                .func
+                .getPublicHash
+                .as_ref()
+                .expect("func.getPublicHash"))(
+                public_key, &mut rsp, &mut err
+            ) == 0
+            {
+                Ok(rust_string(rsp.hash))
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self
+                .lib
+                .free
+                .getPublicHash
+                .as_ref()
+                .expect("free.getPublicHash"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+}
+
+impl SpxInterface for Acorn {
+    fn get_version(&self) -> Result<String> {
+        Ok(format!(
+            "{} (see: {})",
+            self.get_host_version()?,
+            self.get_see_version()?
+        ))
+    }
+
+    fn list_keys(&self) -> Result<Vec<KeyEntry>> {
+        let mut rsp = acorn_bindgen::acorn_response_list::default();
+        let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+        // SAFETY: The entries returned by `list` are copied into rust types.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let result =
+                if (self.lib.func.list.as_ref().expect("func.list"))(&mut rsp, &mut err) == 0 {
+                    let entries = std::slice::from_raw_parts(rsp.entries, rsp.n_entries as usize);
+                    let entries = entries
+                        .iter()
+                        .map(|e| KeyEntry {
+                            alias: rust_string(e.alias),
+                            hash: None,
+                            algorithm: rust_string(e.algorithm),
+                            ..Default::default()
+                        })
+                        .collect::<Vec<_>>();
+                    Ok(entries)
+                } else {
+                    Err(AcornError::Message(rust_string(err)).into())
+                };
+            (self.lib.free.list.as_ref().expect("free.list"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+
+    fn get_key_info(&self, alias: &str) -> Result<KeyInfo> {
+        let alias = CString::new(alias)?;
+        // SAFETY: The data returned by `get_key_info` are copied into rust data types.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let mut rsp = acorn_bindgen::acorn_response_getKeyInfo::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self.lib.func.getKeyInfo.as_ref().expect("func.getKeyInfo"))(
+                alias.as_ptr(),
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                let pkey =
+                    std::slice::from_raw_parts(rsp.publicKey.ptr, rsp.publicKey.len as usize);
+                let blob =
+                    std::slice::from_raw_parts(rsp.privateBlob.ptr, rsp.privateBlob.len as usize);
+                Ok(KeyInfo {
+                    hash: rust_string(rsp.hash),
+                    algorithm: rust_string(rsp.algorithm),
+                    domain: None,
+                    public_key: pkey.to_vec(),
+                    private_blob: blob.to_vec(),
+                })
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.getKeyInfo.as_ref().expect("free.getKeyInfo"))(
+                std::ptr::null_mut(),
+                &mut rsp,
+            );
+            result
+        }
+    }
+
+    fn generate_key(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        _domain: SpxDomain,
+        token: &str,
+        flags: GenerateFlags,
+    ) -> Result<KeyEntry> {
+        let alias = CString::new(alias)?;
+        let alg = CString::new(algorithm)?;
+        let token = CString::new(token)?;
+        // SAFETY: The data returned by `generate` are copied into rust data types.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let mut rsp = acorn_bindgen::acorn_response_generate::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self.lib.func.generate.as_ref().expect("func.generate"))(
+                alias.as_ptr(),
+                alg.as_ptr(),
+                token.as_ptr(),
+                flags.bits(),
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                let private_blob = if rsp.privateBlob.ptr.is_null() {
+                    Vec::new()
+                } else {
+                    std::slice::from_raw_parts(rsp.privateBlob.ptr, rsp.privateBlob.len as usize)
+                        .to_vec()
+                };
+                let private_key = if rsp.privateKey.ptr.is_null() {
+                    Vec::new()
+                } else {
+                    std::slice::from_raw_parts(rsp.privateKey.ptr, rsp.privateKey.len as usize)
+                        .to_vec()
+                };
+                Ok(KeyEntry {
+                    alias: rust_string(rsp.alias),
+                    hash: Some(rust_string(rsp.hash)),
+                    algorithm: algorithm.to_string(),
+                    domain: None,
+                    private_blob,
+                    private_key,
+                })
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.generate.as_ref().expect("free.generate"))(
+                std::ptr::null_mut(),
+                &mut rsp,
+            );
+            result
+        }
+    }
+
+    fn import_keypair(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        _domain: SpxDomain,
+        token: &str,
+        overwrite: bool,
+        public_key: &[u8],
+        private_key: &[u8],
+    ) -> Result<KeyEntry> {
+        let alias = CString::new(alias)?;
+        let alg = CString::new(algorithm)?;
+        let token = CString::new(token)?;
+        // SAFETY: The data returned by `importKeypair` are copied into rust data types.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let public_key = acorn_bindgen::acorn_buffer {
+                // The acorn API wants a mut ptr (but it wont mutate).
+                ptr: public_key.as_ptr().cast_mut(),
+                len: public_key.len() as u32,
+            };
+            let private_key = acorn_bindgen::acorn_buffer {
+                // The acorn API wants a mut ptr (but it wont mutate).
+                ptr: private_key.as_ptr().cast_mut(),
+                len: private_key.len() as u32,
+            };
+
+            let mut rsp = acorn_bindgen::acorn_response_importKeypair::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self
+                .lib
+                .func
+                .importKeypair
+                .as_ref()
+                .expect("func.importKeypair"))(
+                alias.as_ptr(),
+                alg.as_ptr(),
+                public_key,
+                private_key,
+                token.as_ptr(),
+                u32::from(overwrite),
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                Ok(KeyEntry {
+                    alias: rust_string(rsp.alias),
+                    hash: Some(rust_string(rsp.hash)),
+                    algorithm: algorithm.to_string(),
+                    domain: None,
+                    ..Default::default()
+                })
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self
+                .lib
+                .free
+                .importKeypair
+                .as_ref()
+                .expect("free.importKeypair"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+
+    fn sign(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+    ) -> Result<Vec<u8>> {
+        let alias = alias.map(CString::new).transpose()?;
+        let key_hash = key_hash.map(CString::new).transpose()?;
+        let message = domain.prepare(message);
+        // SAFETY: The signature returned by `sign` is copied into a rust Vec.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let message = acorn_bindgen::acorn_buffer {
+                ptr: message.as_ptr().cast_mut(),
+                len: message.len() as u32,
+            };
+            let mut rsp = acorn_bindgen::acorn_response_sign::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self.lib.func.sign.as_ref().expect("func.sign"))(
+                alias
+                    .as_ref()
+                    .map(|x| x.as_ptr())
+                    .unwrap_or(std::ptr::null()),
+                key_hash
+                    .as_ref()
+                    .map(|x| x.as_ptr())
+                    .unwrap_or(std::ptr::null()),
+                message,
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                let signature =
+                    std::slice::from_raw_parts(rsp.signature.ptr, rsp.signature.len as usize);
+                Ok(signature.to_vec())
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.sign.as_ref().expect("free.sign"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+
+    fn verify(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+        signature: &[u8],
+    ) -> Result<bool> {
+        let alias = alias.map(CString::new).transpose()?;
+        let key_hash = key_hash.map(CString::new).transpose()?;
+        let message = domain.prepare(message);
+        // SAFETY: The signature returned by `sign` is copied into a rust Vec.
+        // The memory allocated by the acorn library is freed by the acorn library's
+        // free function.
+        unsafe {
+            let message = acorn_bindgen::acorn_buffer {
+                ptr: message.as_ptr().cast_mut(),
+                len: message.len() as u32,
+            };
+            let signature = acorn_bindgen::acorn_buffer {
+                ptr: signature.as_ptr().cast_mut(),
+                len: signature.len() as u32,
+            };
+            let mut rsp = acorn_bindgen::acorn_response_verify::default();
+            let mut err = std::ptr::null_mut::<std::ffi::c_char>();
+            let result = if (self.lib.func.verify.as_ref().expect("func.verify"))(
+                alias
+                    .as_ref()
+                    .map(|x| x.as_ptr())
+                    .unwrap_or(std::ptr::null()),
+                key_hash
+                    .as_ref()
+                    .map(|x| x.as_ptr())
+                    .unwrap_or(std::ptr::null()),
+                message,
+                signature,
+                &mut rsp,
+                &mut err,
+            ) == 0
+            {
+                Ok(rsp.verified != 0)
+            } else {
+                Err(AcornError::Message(rust_string(err)).into())
+            };
+            (self.lib.free.verify.as_ref().expect("free.verify"))(std::ptr::null_mut(), &mut rsp);
+            result
+        }
+    }
+}
diff --git a/sw/host/hsmtool/acorn/lib.rs b/sw/host/hsmtool/acorn/lib.rs
new file mode 100644
index 0000000000000..d4fbb4ab24d75
--- /dev/null
+++ b/sw/host/hsmtool/acorn/lib.rs
@@ -0,0 +1,8 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+mod acorn;
+mod spx;
+pub use acorn::Acorn;
+pub use spx::{GenerateFlags, KeyEntry, KeyInfo, SpxInterface};
diff --git a/sw/host/hsmtool/acorn/spx.rs b/sw/host/hsmtool/acorn/spx.rs
new file mode 100644
index 0000000000000..f496706e5828c
--- /dev/null
+++ b/sw/host/hsmtool/acorn/spx.rs
@@ -0,0 +1,99 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use bitflags::bitflags;
+use sphincsplus::SpxDomain;
+
+#[derive(Debug, Default)]
+pub struct KeyEntry {
+    /// Alias of the key.
+    pub alias: String,
+    /// Unique identifier for the key.
+    pub hash: Option<String>,
+    /// Algorithm to be used with the key.
+    pub algorithm: String,
+    /// Domain to be used with the key (only when keys are restricted to a specific domain).
+    pub domain: Option<SpxDomain>,
+    /// Opaque representation of the private key material.
+    pub private_blob: Vec<u8>,
+    /// Exported private key material (only when GenerateFlags::EXPORT_PRIVATE is set).
+    pub private_key: Vec<u8>,
+}
+
+#[derive(Debug, Default)]
+pub struct KeyInfo {
+    /// Unique identifier for the key.
+    pub hash: String,
+    /// Algorithm to be used with the key.
+    pub algorithm: String,
+    /// Domain to be used with the key (only when keys are restricted to a specific domain).
+    pub domain: Option<SpxDomain>,
+    /// Public key material.
+    pub public_key: Vec<u8>,
+    /// Opaque representation of the private key material.
+    pub private_blob: Vec<u8>,
+}
+
+bitflags! {
+    #[derive(Debug)]
+    pub struct GenerateFlags: u32 {
+        const NONE = 0;
+        const OVERWRITE = 1 << acorn_bindgen::acorn_enum_generateFlags_acorn_enum_generateFlags_overwrite;
+        const EXPORT_PRIVATE = 1 << acorn_bindgen::acorn_enum_generateFlags_acorn_enum_generateFlags_exportPrivate;
+    }
+}
+
+pub trait SpxInterface {
+    /// Get the version of the backend.
+    fn get_version(&self) -> Result<String>;
+
+    /// Get the version of the backend.
+    fn list_keys(&self) -> Result<Vec<KeyEntry>>;
+
+    /// Get the public key info.
+    fn get_key_info(&self, alias: &str) -> Result<KeyInfo>;
+
+    /// Generate a key pair.
+    fn generate_key(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        domain: SpxDomain,
+        token: &str,
+        flags: GenerateFlags,
+    ) -> Result<KeyEntry>;
+
+    /// Import a key pair.
+    #[allow(clippy::too_many_arguments)]
+    fn import_keypair(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        domain: SpxDomain,
+        token: &str,
+        overwrite: bool,
+        public_key: &[u8],
+        private_key: &[u8],
+    ) -> Result<KeyEntry>;
+
+    /// Sign a message.
+    fn sign(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+    ) -> Result<Vec<u8>>;
+
+    /// Verify a message.
+    fn verify(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+        signature: &[u8],
+    ) -> Result<bool>;
+}
diff --git a/sw/host/hsmtool/acorn/vendor/BUILD b/sw/host/hsmtool/acorn/vendor/BUILD
new file mode 100644
index 0000000000000..c3295d4d308a6
--- /dev/null
+++ b/sw/host/hsmtool/acorn/vendor/BUILD
@@ -0,0 +1,29 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_library")
+
+package(default_visibility = ["//visibility:public"])
+
+cc_library(
+    name = "acorn_hdr",
+    hdrs = ["acorn.h"]
+)
+
+rust_bindgen_library(
+    name = "acorn_bindgen",
+    bindgen_flags = [
+        "--with-derive-default",
+        "--impl-debug",
+        "--allowlist-type=acorn_(request|response|command|cmd|free)_.*",
+        "--allowlist-type=acorn_.*",
+    ],
+    cc_lib = ":acorn_hdr",
+    header = "acorn.h",
+    rustc_flags = [
+        "--allow=non_snake_case",
+        "--allow=non_upper_case_globals",
+        "--allow=non_camel_case_types",
+    ],
+)
diff --git a/sw/host/hsmtool/acorn/vendor/acorn.h b/sw/host/hsmtool/acorn/vendor/acorn.h
new file mode 100644
index 0000000000000..7d383921b8bfa
--- /dev/null
+++ b/sw/host/hsmtool/acorn/vendor/acorn.h
@@ -0,0 +1,1125 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+/**
+ * acorn.h: dynamic library interface for acorn.
+ * @file
+ * Copyright 2015-2024 Entrust, Inc.
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+
+ *   http://www.apache.org/licenses/LICENSE-2.0
+
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+
+ * Generated by interface.js -- DO NOT EDIT */
+#ifndef ACORN_H
+#define ACORN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef _WIN32
+# define EXPORT __declspec(dllexport) __cdecl
+#else
+# define EXPORT
+#endif
+
+#include <stdio.h>
+
+/**
+ * Automatically called by dynamic library initialization. */
+int EXPORT
+acorn_init(void);
+
+/**
+ * Automatically called by dynamic library cleanup. */
+void EXPORT
+acorn_cleanup(void);
+
+void EXPORT
+acorn_errstream(FILE *out);
+
+/** A byte array with length included */
+struct acorn_buffer {
+  /** Number of bytes referenced by ptr */
+  unsigned len;
+  /** Pointer to an array of bytes */
+  unsigned char *ptr;
+};
+
+enum acorn_enum_generateFlags {
+  acorn_enum_generateFlags_overwrite = 0,
+  acorn_enum_generateFlags_exportPrivate = 1,
+  acorn_enum_generateFlags__LIMIT = 2
+};
+
+/**
+ * Describes a key pair */
+struct acorn_object_keyEntry {
+  /**
+   * User defined name for key pair */
+  char *alias;
+    /**
+   * Cryptographic algorithm with which this key pair can be used.
+   * For example, this might be `dilitium2` */
+  char *algorithm;
+  };
+
+/**
+ * Input parameters for acorn_command_getVersion.
+ * @see acorn_command_getVersion
+ * @see acorn_response_getVersion */
+struct acorn_request_getVersion {
+  /** Some C compilers reject empty structs */
+  int unused;
+};
+
+/**
+ * Output parameters for acorn_command_getVersion.
+ * @see acorn_command_getVersion
+ * @see acorn_request_getVersion */
+struct acorn_response_getVersion {
+  /**
+   * Semantic version number for host software. For example,
+   * "0.1.2" All versions with the same initial number should be
+   * compatible at runtime. */
+  char *version;
+};
+
+typedef int (*acorn_commandfn_getVersion)
+(const struct acorn_request_getVersion *request,
+ struct acorn_response_getVersion *response,
+ char **errstring);
+
+/**
+ * Returns information about the host software.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_getVersion
+(const struct acorn_request_getVersion *request,
+ struct acorn_response_getVersion *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_getVersion)
+( struct acorn_response_getVersion *response,
+ char **errstring);
+
+/**
+ * Returns information about the host software.
+ *
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_getVersion
+(struct acorn_response_getVersion *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_getVersion
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_getVersion
+(struct acorn_request_getVersion *request,
+ struct acorn_response_getVersion *response);
+
+/**
+ * Input parameters for acorn_command_list.
+ * @see acorn_command_list
+ * @see acorn_response_list */
+struct acorn_request_list {
+  /** Some C compilers reject empty structs */
+  int unused;
+};
+
+/**
+ * Output parameters for acorn_command_list.
+ * @see acorn_command_list
+ * @see acorn_request_list */
+struct acorn_response_list {
+  /** Number of entries in entries */
+unsigned n_entries;
+  /**
+   * Description of each key saved in the system */
+  struct acorn_object_keyEntry *entries;
+};
+
+typedef int (*acorn_commandfn_list)
+(const struct acorn_request_list *request,
+ struct acorn_response_list *response,
+ char **errstring);
+
+/**
+ * Returns a list of available key aliases with algorithm names.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_list
+(const struct acorn_request_list *request,
+ struct acorn_response_list *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_list)
+( struct acorn_response_list *response,
+ char **errstring);
+
+/**
+ * Returns a list of available key aliases with algorithm names.
+ *
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_list
+(struct acorn_response_list *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_list
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_list
+(struct acorn_request_list *request,
+ struct acorn_response_list *response);
+
+/**
+ * Input parameters for acorn_command_getPublic.
+ * @see acorn_command_getPublic
+ * @see acorn_response_getPublic */
+struct acorn_request_getPublic {
+  /**
+   * Specifies which saved key pair for which to fetch the public
+   * component */
+  char *alias;
+  };
+
+/**
+ * Output parameters for acorn_command_getPublic.
+ * @see acorn_command_getPublic
+ * @see acorn_request_getPublic */
+struct acorn_response_getPublic {
+  /**
+   * Public key material */
+  struct acorn_buffer publicKey;
+};
+
+typedef int (*acorn_commandfn_getPublic)
+(const struct acorn_request_getPublic *request,
+ struct acorn_response_getPublic *response,
+ char **errstring);
+
+/**
+ * Returns the public key associated with a given alias
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_getPublic
+(const struct acorn_request_getPublic *request,
+ struct acorn_response_getPublic *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_getPublic)
+(const char *alias,
+  struct acorn_response_getPublic *response,
+ char **errstring);
+
+/**
+ * Returns the public key associated with a given alias
+ *
+ * @param alias Specifies which saved key pair for which to fetch the
+ * public component
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_getPublic
+(const char *alias,
+ struct acorn_response_getPublic *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_getPublic
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_getPublic
+(struct acorn_request_getPublic *request,
+ struct acorn_response_getPublic *response);
+
+/**
+ * Input parameters for acorn_command_getPublicHash.
+ * @see acorn_command_getPublicHash
+ * @see acorn_response_getPublicHash */
+struct acorn_request_getPublicHash {
+  /**
+   * Public key material */
+  struct acorn_buffer publicKey;
+  };
+
+/**
+ * Output parameters for acorn_command_getPublicHash.
+ * @see acorn_command_getPublicHash
+ * @see acorn_request_getPublicHash */
+struct acorn_response_getPublicHash {
+  /**
+   * Uniquely idenfies a public key */
+  char *hash;
+};
+
+typedef int (*acorn_commandfn_getPublicHash)
+(const struct acorn_request_getPublicHash *request,
+ struct acorn_response_getPublicHash *response,
+ char **errstring);
+
+/**
+ * Returns a hash value for a given public key.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_getPublicHash
+(const struct acorn_request_getPublicHash *request,
+ struct acorn_response_getPublicHash *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_getPublicHash)
+(const struct acorn_buffer publicKey,
+  struct acorn_response_getPublicHash *response,
+ char **errstring);
+
+/**
+ * Returns a hash value for a given public key.
+ *
+ * @param publicKey Public key material
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_getPublicHash
+(const struct acorn_buffer publicKey,
+ struct acorn_response_getPublicHash *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_getPublicHash
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_getPublicHash
+(struct acorn_request_getPublicHash *request,
+ struct acorn_response_getPublicHash *response);
+
+/**
+ * Input parameters for acorn_command_getKeyInfo.
+ * @see acorn_command_getKeyInfo
+ * @see acorn_response_getKeyInfo */
+struct acorn_request_getKeyInfo {
+  /**
+   * Specifies which key pair to describe */
+  char *alias;
+  };
+
+/**
+ * Output parameters for acorn_command_getKeyInfo.
+ * @see acorn_command_getKeyInfo
+ * @see acorn_request_getKeyInfo */
+struct acorn_response_getKeyInfo {
+  /**
+   * Uniquely idenfies a public key */
+  char *hash;
+  /**
+   * Cryptographic algorithm with which this key pair can be used */
+  char *algorithm;
+  /**
+   * Public key material */
+  struct acorn_buffer publicKey;
+  /**
+   * Opaque and encrypted private key */
+  struct acorn_buffer privateBlob;
+};
+
+typedef int (*acorn_commandfn_getKeyInfo)
+(const struct acorn_request_getKeyInfo *request,
+ struct acorn_response_getKeyInfo *response,
+ char **errstring);
+
+/**
+ * Returns the hash, algorithm and public key associated with a given
+ * alias.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_getKeyInfo
+(const struct acorn_request_getKeyInfo *request,
+ struct acorn_response_getKeyInfo *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_getKeyInfo)
+(const char *alias,
+  struct acorn_response_getKeyInfo *response,
+ char **errstring);
+
+/**
+ * Returns the hash, algorithm and public key associated with a given
+ * alias.
+ *
+ * @param alias Specifies which key pair to describe
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_getKeyInfo
+(const char *alias,
+ struct acorn_response_getKeyInfo *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_getKeyInfo
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_getKeyInfo
+(struct acorn_request_getKeyInfo *request,
+ struct acorn_response_getKeyInfo *response);
+
+/**
+ * Input parameters for acorn_command_generate.
+ * @see acorn_command_generate
+ * @see acorn_response_generate */
+struct acorn_request_generate {
+  /**
+   * Name for new key pair (optional) */
+  char *alias;
+    /**
+   * Cryptographic algorithm to use */
+  char *algorithm;
+    /**
+   * Specifies the operator card set or softoken to use. Use the
+   * preload command to avoid console prompts */
+  char *token;
+    /**
+   * Set bit one to overwrite existing alias key pair if one
+   * exists.
+ *
+   * Set bit two to provide private key without encryption in the
+   * response privateKey field (DANGEROUS). Setting this
+   * undermines the ability of the HSM to protect the key
+   * material, though the key still benefits from hardware random
+   * number generation. */
+  unsigned flags;
+  };
+
+/**
+ * Output parameters for acorn_command_generate.
+ * @see acorn_command_generate
+ * @see acorn_request_generate */
+struct acorn_response_generate {
+  /**
+   * Name of new key pair */
+  char *alias;
+  /**
+   * Unique identifier for key pair */
+  char *hash;
+  /**
+   * Opaque representation of encrypted private key material. */
+  struct acorn_buffer privateBlob;
+  /**
+   * Exposed private key material (present only when exportPrivate
+   * flag is set). */
+  struct acorn_buffer privateKey;
+};
+
+typedef int (*acorn_commandfn_generate)
+(const struct acorn_request_generate *request,
+ struct acorn_response_generate *response,
+ char **errstring);
+
+/**
+ * Generates a key pair and saves it under the specified alias. The key
+ * pair can be used for subsequent commands and will be saved between
+ * instances of the application.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_generate
+(const struct acorn_request_generate *request,
+ struct acorn_response_generate *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_generate)
+(const char *alias,
+ const char *algorithm,
+ const char *token,
+ unsigned flags,
+  struct acorn_response_generate *response,
+ char **errstring);
+
+/**
+ * Generates a key pair and saves it under the specified alias. The key
+ * pair can be used for subsequent commands and will be saved between
+ * instances of the application.
+ *
+ * @param alias Name for new key pair (optional)
+ * @param algorithm Cryptographic algorithm to use
+ * @param token Specifies the operator card set or softoken to use. Use
+ * the preload command to avoid console prompts
+ * @param flags Set bit one to overwrite existing alias key pair if one
+ * exists.
+ *
+ * @param flags Set bit two to provide private key without encryption in
+ * the response privateKey field (DANGEROUS). Setting this undermines
+ * the ability of the HSM to protect the key material, though the key
+ * still benefits from hardware random number generation.
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_generate
+(const char *alias,
+ const char *algorithm,
+ const char *token,
+ unsigned flags,
+ struct acorn_response_generate *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_generate
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_generate
+(struct acorn_request_generate *request,
+ struct acorn_response_generate *response);
+
+/**
+ * Input parameters for acorn_command_importKeypair.
+ * @see acorn_command_importKeypair
+ * @see acorn_response_importKeypair */
+struct acorn_request_importKeypair {
+  /**
+   * Name for new key pair (optional) */
+  char *alias;
+    /**
+   * Cryptographic algorithm to use */
+  char *algorithm;
+    /**
+   * Public portion of key pair */
+  struct acorn_buffer publicKey;
+    /**
+   * Private portion of key pair */
+  struct acorn_buffer privateKey;
+    /**
+   * Specifies the operator card set or softoken to use. Use the
+   * preload command to avoid console prompts */
+  char *token;
+    /**
+   * Delete existing alias key pair if one exists */
+  unsigned overwrite;
+  };
+
+/**
+ * Output parameters for acorn_command_importKeypair.
+ * @see acorn_command_importKeypair
+ * @see acorn_request_importKeypair */
+struct acorn_response_importKeypair {
+  /**
+   * Name of new key pair */
+  char *alias;
+  /**
+   * Unique identifier for key pair */
+  char *hash;
+  /**
+   * Opaque representation of encrypted private key material. */
+  struct acorn_buffer privateBlob;
+};
+
+typedef int (*acorn_commandfn_importKeypair)
+(const struct acorn_request_importKeypair *request,
+ struct acorn_response_importKeypair *response,
+ char **errstring);
+
+/**
+ * Imports a signature key pair and saves it under the specified alias.
+ * The key pair can be used for subsequent commands and will be saved
+ * between instances of the application.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_importKeypair
+(const struct acorn_request_importKeypair *request,
+ struct acorn_response_importKeypair *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_importKeypair)
+(const char *alias,
+ const char *algorithm,
+ const struct acorn_buffer publicKey,
+ const struct acorn_buffer privateKey,
+ const char *token,
+ unsigned overwrite,
+  struct acorn_response_importKeypair *response,
+ char **errstring);
+
+/**
+ * Imports a signature key pair and saves it under the specified alias.
+ * The key pair can be used for subsequent commands and will be saved
+ * between instances of the application.
+ *
+ * @param alias Name for new key pair (optional)
+ * @param algorithm Cryptographic algorithm to use
+ * @param publicKey Public portion of key pair
+ * @param privateKey Private portion of key pair
+ * @param token Specifies the operator card set or softoken to use. Use
+ * the preload command to avoid console prompts
+ * @param overwrite Delete existing alias key pair if one exists
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_importKeypair
+(const char *alias,
+ const char *algorithm,
+ const struct acorn_buffer publicKey,
+ const struct acorn_buffer privateKey,
+ const char *token,
+ unsigned overwrite,
+ struct acorn_response_importKeypair *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_importKeypair
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_importKeypair
+(struct acorn_request_importKeypair *request,
+ struct acorn_response_importKeypair *response);
+
+/**
+ * Input parameters for acorn_command_sign.
+ * @see acorn_command_sign
+ * @see acorn_response_sign */
+struct acorn_request_sign {
+  /**
+   * Specifies key pair to sign with */
+  char *alias;
+    /**
+   * Ignored unless alias is missing */
+  char *keyhash;
+    /**
+   * Data to be signed */
+  struct acorn_buffer message;
+  };
+
+/**
+ * Output parameters for acorn_command_sign.
+ * @see acorn_command_sign
+ * @see acorn_request_sign */
+struct acorn_response_sign {
+  /**
+   * Cryptographic signature of message */
+  struct acorn_buffer signature;
+};
+
+typedef int (*acorn_commandfn_sign)
+(const struct acorn_request_sign *request,
+ struct acorn_response_sign *response,
+ char **errstring);
+
+/**
+ * Creates a digital signature of the specified message. The keyhash
+ * argument is ignored unless the alias is missing.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_sign
+(const struct acorn_request_sign *request,
+ struct acorn_response_sign *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_sign)
+(const char *alias,
+ const char *keyhash,
+ const struct acorn_buffer message,
+  struct acorn_response_sign *response,
+ char **errstring);
+
+/**
+ * Creates a digital signature of the specified message. The keyhash
+ * argument is ignored unless the alias is missing.
+ *
+ * @param alias Specifies key pair to sign with
+ * @param keyhash Ignored unless alias is missing
+ * @param message Data to be signed
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_sign
+(const char *alias,
+ const char *keyhash,
+ const struct acorn_buffer message,
+ struct acorn_response_sign *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_sign
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_sign
+(struct acorn_request_sign *request,
+ struct acorn_response_sign *response);
+
+/**
+ * Input parameters for acorn_command_verify.
+ * @see acorn_command_verify
+ * @see acorn_response_verify */
+struct acorn_request_verify {
+  /**
+   * Specifies key pair used for signature */
+  char *alias;
+    /**
+   * Ignored unless alias is missing */
+  char *keyhash;
+    /**
+   * Data that has been signed */
+  struct acorn_buffer message;
+    /**
+   * Cryptographic signature of message */
+  struct acorn_buffer signature;
+  };
+
+/**
+ * Output parameters for acorn_command_verify.
+ * @see acorn_command_verify
+ * @see acorn_request_verify */
+struct acorn_response_verify {
+  /**
+   * True if and only if signature is cryptographically valid for
+   * given message */
+  unsigned verified;
+};
+
+typedef int (*acorn_commandfn_verify)
+(const struct acorn_request_verify *request,
+ struct acorn_response_verify *response,
+ char **errstring);
+
+/**
+ * Determines whether a given signature is valid for a message and key
+ * pair. The keyhash argument is ignored unless the alias is missing.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_verify
+(const struct acorn_request_verify *request,
+ struct acorn_response_verify *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_verify)
+(const char *alias,
+ const char *keyhash,
+ const struct acorn_buffer message,
+ const struct acorn_buffer signature,
+  struct acorn_response_verify *response,
+ char **errstring);
+
+/**
+ * Determines whether a given signature is valid for a message and key
+ * pair. The keyhash argument is ignored unless the alias is missing.
+ *
+ * @param alias Specifies key pair used for signature
+ * @param keyhash Ignored unless alias is missing
+ * @param message Data that has been signed
+ * @param signature Cryptographic signature of message
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_verify
+(const char *alias,
+ const char *keyhash,
+ const struct acorn_buffer message,
+ const struct acorn_buffer signature,
+ struct acorn_response_verify *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_verify
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_verify
+(struct acorn_request_verify *request,
+ struct acorn_response_verify *response);
+
+/**
+ * Input parameters for acorn_command_signImmediate.
+ * @see acorn_command_signImmediate
+ * @see acorn_response_signImmediate */
+struct acorn_request_signImmediate {
+  /**
+   * Opaque representation of encrypted private key material */
+  struct acorn_buffer privateBlob;
+    /**
+   * Specifies the operator card set or softoken to use. Use the
+   * preload command to avoid console prompts */
+  char *token;
+    /**
+   * Data to be signed */
+  struct acorn_buffer message;
+  };
+
+/**
+ * Output parameters for acorn_command_signImmediate.
+ * @see acorn_command_signImmediate
+ * @see acorn_request_signImmediate */
+struct acorn_response_signImmediate {
+  /**
+   * Cryptographic signature of message */
+  struct acorn_buffer signature;
+};
+
+typedef int (*acorn_commandfn_signImmediate)
+(const struct acorn_request_signImmediate *request,
+ struct acorn_response_signImmediate *response,
+ char **errstring);
+
+/**
+ * Creates a digital signature of the specified message. The keyhash
+ * argument is ignored unless the alias is missing.
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_signImmediate
+(const struct acorn_request_signImmediate *request,
+ struct acorn_response_signImmediate *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_signImmediate)
+(const struct acorn_buffer privateBlob,
+ const char *token,
+ const struct acorn_buffer message,
+  struct acorn_response_signImmediate *response,
+ char **errstring);
+
+/**
+ * Creates a digital signature of the specified message. The keyhash
+ * argument is ignored unless the alias is missing.
+ *
+ * @param privateBlob Opaque representation of encrypted private key
+ * material
+ * @param token Specifies the operator card set or softoken to use. Use
+ * the preload command to avoid console prompts
+ * @param message Data to be signed
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_signImmediate
+(const struct acorn_buffer privateBlob,
+ const char *token,
+ const struct acorn_buffer message,
+ struct acorn_response_signImmediate *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_signImmediate
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_signImmediate
+(struct acorn_request_signImmediate *request,
+ struct acorn_response_signImmediate *response);
+
+/**
+ * Input parameters for acorn_command_verifyImmediate.
+ * @see acorn_command_verifyImmediate
+ * @see acorn_response_verifyImmediate */
+struct acorn_request_verifyImmediate {
+  /**
+   * Public key of pair used to sign */
+  struct acorn_buffer publicKey;
+    /**
+   * Cryptographic algorithm used to sign */
+  char *algorithm;
+    /**
+   * Data that has been signed */
+  struct acorn_buffer message;
+    /**
+   * Cryptographic signature of message */
+  struct acorn_buffer signature;
+  };
+
+/**
+ * Output parameters for acorn_command_verifyImmediate.
+ * @see acorn_command_verifyImmediate
+ * @see acorn_request_verifyImmediate */
+struct acorn_response_verifyImmediate {
+  /**
+   * True if and only if signature is cryptographically valid for
+   * given message */
+  unsigned verified;
+};
+
+typedef int (*acorn_commandfn_verifyImmediate)
+(const struct acorn_request_verifyImmediate *request,
+ struct acorn_response_verifyImmediate *response,
+ char **errstring);
+
+/**
+ * Determines whether a given signature is valid for a message and
+ * public key
+ *
+ * @param request input data to process
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ *               and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_command_verifyImmediate
+(const struct acorn_request_verifyImmediate *request,
+ struct acorn_response_verifyImmediate *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_verifyImmediate)
+(const struct acorn_buffer publicKey,
+ const char *algorithm,
+ const struct acorn_buffer message,
+ const struct acorn_buffer signature,
+  struct acorn_response_verifyImmediate *response,
+ char **errstring);
+
+/**
+ * Determines whether a given signature is valid for a message and
+ * public key
+ *
+ * @param publicKey Public key of pair used to sign
+ * @param algorithm Cryptographic algorithm used to sign
+ * @param message Data that has been signed
+ * @param signature Cryptographic signature of message
+ * @param response output data to populate
+ * @param errstr (Optional) when not NULL, error message is allocated
+ * and assogned to this instead of being printed.
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+int EXPORT
+acorn_cmd_verifyImmediate
+(const struct acorn_buffer publicKey,
+ const char *algorithm,
+ const struct acorn_buffer message,
+ const struct acorn_buffer signature,
+ struct acorn_response_verifyImmediate *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_verifyImmediate
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_verifyImmediate
+(struct acorn_request_verifyImmediate *request,
+ struct acorn_response_verifyImmediate *response);
+
+/**
+ * Input parameters for acorn_command_see_getVersion.
+ * @see acorn_command_see_getVersion
+ * @see acorn_response_see_getVersion */
+struct acorn_request_see_getVersion {
+  /** Some C compilers reject empty structs */
+  int unused;
+};
+
+/**
+ * Output parameters for acorn_command_see_getVersion.
+ * @see acorn_command_see_getVersion
+ * @see acorn_request_see_getVersion */
+struct acorn_response_see_getVersion {
+  /**
+   * Sementic version number of SEE machine */
+  char *version;
+};
+
+typedef int (*acorn_commandfn_see_getVersion)
+(const struct acorn_request_see_getVersion *request,
+ struct acorn_response_see_getVersion *response,
+ char **errstring);
+
+int EXPORT
+acorn_command_see_getVersion
+(const struct acorn_request_see_getVersion *request,
+ struct acorn_response_see_getVersion *response,
+ char **errstring);
+
+typedef int (*acorn_cmdfn_see_getVersion)
+( struct acorn_response_see_getVersion *response,
+ char **errstring);
+
+int EXPORT
+acorn_cmd_see_getVersion
+(struct acorn_response_see_getVersion *response,
+ char **errstring);
+
+/**
+ * Reclaim resources used by corresponding command
+ *
+ * @see acorn_command_see_getVersion
+ * @param request (Optional) request data to free
+ * @param response (Optional) response data to free */
+typedef
+void EXPORT
+acorn_free_see_getVersion
+(struct acorn_request_see_getVersion *request,
+ struct acorn_response_see_getVersion *response);
+
+struct acorn_commandlist {
+  acorn_commandfn_getVersion getVersion;
+  acorn_commandfn_list list;
+  acorn_commandfn_getPublic getPublic;
+  acorn_commandfn_getPublicHash getPublicHash;
+  acorn_commandfn_getKeyInfo getKeyInfo;
+  acorn_commandfn_generate generate;
+  acorn_commandfn_importKeypair importKeypair;
+  acorn_commandfn_sign sign;
+  acorn_commandfn_verify verify;
+  acorn_commandfn_signImmediate signImmediate;
+  acorn_commandfn_verifyImmediate verifyImmediate;
+  acorn_commandfn_see_getVersion see_getVersion;
+};
+
+struct acorn_cmdlist {
+  acorn_cmdfn_getVersion getVersion;
+  acorn_cmdfn_list list;
+  acorn_cmdfn_getPublic getPublic;
+  acorn_cmdfn_getPublicHash getPublicHash;
+  acorn_cmdfn_getKeyInfo getKeyInfo;
+  acorn_cmdfn_generate generate;
+  acorn_cmdfn_importKeypair importKeypair;
+  acorn_cmdfn_sign sign;
+  acorn_cmdfn_verify verify;
+  acorn_cmdfn_signImmediate signImmediate;
+  acorn_cmdfn_verifyImmediate verifyImmediate;
+  acorn_commandfn_see_getVersion see_getVersion;
+};
+
+/**
+ * Populates a structure containing each command
+ * in request structure form.
+ *
+ * @param list function pointer list to be populated
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+typedef
+int EXPORT
+acorn_getcommandlist
+(struct acorn_commandlist *list,
+ char **errstring);
+
+/**
+ * Populates a structure containing each command
+ * in request inline form.
+ *
+ * @param list function pointer list to be populated
+ * @returns EXIT_SUCCESS (0) or a non-zero failure code */
+typedef
+int EXPORT
+acorn_getcmdlist
+(struct acorn_cmdlist *list,
+ char **errstring);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ACORN_H */
diff --git a/sw/host/hsmtool/scripts/BUILD b/sw/host/hsmtool/scripts/BUILD
index f36dddcc24f58..a26d769847fcb 100644
--- a/sw/host/hsmtool/scripts/BUILD
+++ b/sw/host/hsmtool/scripts/BUILD
@@ -23,7 +23,7 @@ filegroup(
 
 alias(
     name = "binding_srcs",
-    actual = "@crate_index__cryptoki-sys-0.1.6//:binding_srcs",
+    actual = "@crate_index//:cryptoki-sys-binding-srcs",
 )
 
 py_binary(
diff --git a/sw/host/hsmtool/src/commands/aes/export.rs b/sw/host/hsmtool/src/commands/aes/export.rs
new file mode 100644
index 0000000000000..46938e8b198b2
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/aes/export.rs
@@ -0,0 +1,63 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::helper;
+use crate::util::secret::Secret;
+use crate::util::wrap::Wrap;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Export {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    /// Wrap the exported key using an RSA wrapping key.
+    #[arg(long)]
+    wrap: Option<String>,
+    #[arg(long, default_value = "rsa-pkcs")]
+    wrap_mechanism: Option<Wrap>,
+    #[arg(short, long)]
+    output: Option<PathBuf>,
+}
+
+#[typetag::serde(name = "aes-export")]
+impl Dispatch for Export {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        let attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
+        let object = helper::find_one_object(session, attrs.as_slice())?;
+
+        let secret = Secret::Aes;
+        let key = if self.wrap.is_some() {
+            secret.wrap_key(
+                session,
+                object,
+                self.wrap.as_deref(),
+                self.wrap_mechanism
+                    .as_ref()
+                    .ok_or(anyhow!("wrap_mechanism is required when wrap is specified"))?,
+            )?
+        } else {
+            secret.export(session, object)?
+        };
+        if let Some(output) = &self.output {
+            helper::write_file(output, key.as_slice())?;
+        }
+        Ok(Box::<BasicResult>::default())
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/aes/generate.rs b/sw/host/hsmtool/src/commands/aes/generate.rs
new file mode 100644
index 0000000000000..efb330f487b15
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/aes/generate.rs
@@ -0,0 +1,55 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttrData, AttributeMap};
+use crate::util::helper;
+use crate::util::secret::Secret;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Generate {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(long)]
+    template: Option<AttributeMap>,
+}
+
+#[typetag::serde(name = "aes-generate")]
+impl Dispatch for Generate {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
+
+        let result = Box::new(BasicResult {
+            success: true,
+            id: AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id)),
+            label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
+            error: None,
+        });
+
+        let secret = Secret::Aes;
+        let _key = secret.generate(
+            session,
+            result.id.clone(),
+            result.label.clone(),
+            self.template.clone(),
+        )?;
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/aes/import.rs b/sw/host/hsmtool/src/commands/aes/import.rs
new file mode 100644
index 0000000000000..d366f8a9c148e
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/aes/import.rs
@@ -0,0 +1,79 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttrData, AttributeMap};
+use crate::util::helper;
+use crate::util::secret::Secret;
+use crate::util::wrap::Wrap;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Import {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(long)]
+    template: Option<AttributeMap>,
+    /// Unwrap the imported key with a wrapping key.
+    #[arg(long)]
+    unwrap: Option<String>,
+    #[arg(long, default_value = "rsa-pkcs")]
+    unwrap_mechanism: Option<Wrap>,
+    filename: PathBuf,
+}
+
+#[typetag::serde(name = "aes-import")]
+impl Dispatch for Import {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
+
+        let result = Box::new(BasicResult {
+            success: true,
+            id: AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id)),
+            label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
+            error: None,
+        });
+
+        let secret = Secret::Aes;
+        let key = helper::read_file(&self.filename)?;
+        if self.unwrap.is_some() {
+            let _object = secret.unwrap_key(
+                session,
+                result.id.clone(),
+                result.label.clone(),
+                key,
+                self.template.clone(),
+                self.unwrap.as_deref(),
+                self.unwrap_mechanism.as_ref().ok_or(anyhow!(
+                    "unwrap_mechanism is required when unwrap is specified"
+                ))?,
+            )?;
+        } else {
+            let _object = secret.import(
+                session,
+                result.id.clone(),
+                result.label.clone(),
+                key,
+                self.template.clone(),
+            )?;
+        }
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/aes/mod.rs b/sw/host/hsmtool/src/commands/aes/mod.rs
new file mode 100644
index 0000000000000..b12d91a911baf
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/aes/mod.rs
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+
+use crate::commands::Dispatch;
+use crate::module::Module;
+
+pub mod export;
+pub mod generate;
+pub mod import;
+
+#[derive(clap::Subcommand, Debug, Serialize, Deserialize)]
+pub enum Aes {
+    Export(export::Export),
+    Generate(generate::Generate),
+    Import(import::Import),
+}
+
+#[typetag::serde(name = "__aes__")]
+impl Dispatch for Aes {
+    fn run(
+        &self,
+        context: &dyn Any,
+        hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        match self {
+            Aes::Export(x) => x.run(context, hsm, session),
+            Aes::Generate(x) => x.run(context, hsm, session),
+            Aes::Import(x) => x.run(context, hsm, session),
+        }
+    }
+    fn leaf(&self) -> &dyn Dispatch
+    where
+        Self: Sized,
+    {
+        match self {
+            Aes::Export(x) => x.leaf(),
+            Aes::Generate(x) => x.leaf(),
+            Aes::Import(x) => x.leaf(),
+        }
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/ecdsa/export.rs b/sw/host/hsmtool/src/commands/ecdsa/export.rs
index f794cab636bba..3495c61765ac2 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/export.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/export.rs
@@ -2,12 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Result, anyhow};
 use cryptoki::object::{Attribute, ObjectHandle};
 use cryptoki::session::Session;
 use p256::ecdsa::{SigningKey, VerifyingKey};
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
@@ -16,8 +15,9 @@ use crate::error::HsmError;
 use crate::module::Module;
 use crate::util::attribute::{AttrData, AttributeMap, AttributeType, KeyType, ObjectClass};
 use crate::util::helper;
-use crate::util::key::ecdsa::{save_private_key, save_public_key};
 use crate::util::key::KeyEncoding;
+use crate::util::key::ecdsa::{save_private_key, save_public_key};
+use crate::util::wrap::{Wrap, WrapPrivateKey};
 
 #[derive(clap::Args, Debug, Serialize, Deserialize)]
 pub struct Export {
@@ -31,6 +31,9 @@ pub struct Export {
     /// Wrap the exported key a wrapping key.
     #[arg(long)]
     wrap: Option<String>,
+    // Wrapping key mechanism. Required when wrap is specified.
+    #[arg(long, default_value = "aes-key-wrap-pad")]
+    wrap_mechanism: Option<WrapPrivateKey>,
     #[arg(short, long, value_enum, default_value = "pem")]
     format: KeyEncoding,
     filename: PathBuf,
@@ -54,16 +57,14 @@ impl Export {
         Ok(())
     }
 
-    fn wrap_key(&self, session: &Session, _object: ObjectHandle) -> Result<()> {
-        let mut attrs = helper::search_spec(None, self.wrap.as_deref())?;
-        attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
-        let _wkey = helper::find_one_object(session, &attrs).context("Find wrapping key")?;
-
-        bail!("ECDSA export by wrapping is not supported yet!");
-        // FIXME(cfrantz): Turn this back on when cryptoki includes the correct mechanisms.
-        //let wrapped = session.wrap_key(&Mechanism::EcdsaPkcs, wkey, object)?;
-        //helper::write_file(&self.filename, &wrapped)?;
-        //Ok(())
+    fn wrap_key(&self, session: &Session, object: ObjectHandle) -> Result<()> {
+        let wrapper: Wrap = self
+            .wrap_mechanism
+            .ok_or(anyhow!("wrap_mechanism is required when wrap is specified"))?
+            .into();
+        let wrapped = wrapper.wrap(session, object, self.wrap.as_deref())?;
+        helper::write_file(&self.filename, &wrapped)?;
+        Ok(())
     }
 }
 
@@ -74,7 +75,7 @@ impl Dispatch for Export {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Ec.try_into()?));
diff --git a/sw/host/hsmtool/src/commands/ecdsa/generate.rs b/sw/host/hsmtool/src/commands/ecdsa/generate.rs
index c3b8464822b21..3c3232ee56bd2 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/generate.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/generate.rs
@@ -8,7 +8,6 @@ use cryptoki::session::Session;
 use p256::elliptic_curve::pkcs8;
 use p256::elliptic_curve::pkcs8::der::Encode;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::str::FromStr;
 
@@ -64,7 +63,7 @@ impl Dispatch for Generate {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
         let id = AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id));
@@ -72,6 +71,7 @@ impl Dispatch for Generate {
             success: true,
             id: id.clone(),
             label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
             error: None,
         });
 
diff --git a/sw/host/hsmtool/src/commands/ecdsa/import.rs b/sw/host/hsmtool/src/commands/ecdsa/import.rs
index 165fa3ecdd090..4afc029b5d093 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/import.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/import.rs
@@ -2,11 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
-use cryptoki::object::Attribute;
+use anyhow::{Result, anyhow};
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 use std::str::FromStr;
@@ -14,9 +12,10 @@ use std::str::FromStr;
 use crate::commands::{BasicResult, Dispatch};
 use crate::error::HsmError;
 use crate::module::Module;
-use crate::util::attribute::{AttrData, AttributeMap, AttributeType, ObjectClass};
+use crate::util::attribute::{AttrData, AttributeMap, AttributeType};
 use crate::util::helper;
 use crate::util::key::ecdsa::{load_private_key, load_public_key};
+use crate::util::wrap::{Wrap, WrapPrivateKey};
 
 #[derive(clap::Args, Debug, Serialize, Deserialize)]
 pub struct Import {
@@ -36,6 +35,9 @@ pub struct Import {
     /// Unwrap the imported key with a wrapping key.
     #[arg(long)]
     unwrap: Option<String>,
+    /// Unwrapping key mechanism. Required when unwrap is specified.
+    #[arg(long, default_value = "aes-key-wrap-pad")]
+    unwrap_mechanism: Option<WrapPrivateKey>,
     filename: PathBuf,
 }
 
@@ -56,16 +58,16 @@ impl Import {
         "CKA_SIGN": true
     }"#;
 
-    fn unwrap_key(&self, session: &Session, _template: &AttributeMap) -> Result<()> {
-        let mut attrs = helper::search_spec(None, self.unwrap.as_deref())?;
-        attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
-        let _wkey = helper::find_one_object(session, &attrs).context("Find unwrapping key")?;
-
-        bail!("ECDSA import by unwrapping is not supported yet!");
-        // FIXME(cfrantz): Turn this back on when cryptoki includes the correct mechanisms.
-        //let key = helper::read_file(&self.filename)?;
-        //let k = session.unwrap_key(&Mechanism::EcdsaPkcs, wkey, &key, &template.to_vec()?)?;
-        //Ok(())
+    fn unwrap_key(&self, session: &Session, template: &AttributeMap) -> Result<()> {
+        let key = helper::read_file(&self.filename)?;
+        let wrapper: Wrap = self
+            .unwrap_mechanism
+            .ok_or(anyhow!(
+                "unwrap_mechanism is required when wrap is specified"
+            ))?
+            .into();
+        let _key = wrapper.unwrap(session, key.as_slice(), self.unwrap.as_deref(), template)?;
+        Ok(())
     }
 }
 
@@ -76,7 +78,7 @@ impl Dispatch for Import {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
         let mut public_attrs =
@@ -89,6 +91,7 @@ impl Dispatch for Import {
             success: true,
             id: id.clone(),
             label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
             error: None,
         });
         public_attrs.insert(AttributeType::Id, id.clone());
diff --git a/sw/host/hsmtool/src/commands/ecdsa/mod.rs b/sw/host/hsmtool/src/commands/ecdsa/mod.rs
index 86f28a2567136..38dca383ab037 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/mod.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/mod.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::Dispatch;
@@ -33,7 +32,7 @@ impl Dispatch for Ecdsa {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         match self {
             Ecdsa::Generate(x) => x.run(context, hsm, session),
             Ecdsa::Export(x) => x.run(context, hsm, session),
diff --git a/sw/host/hsmtool/src/commands/ecdsa/sign.rs b/sw/host/hsmtool/src/commands/ecdsa/sign.rs
index 6643ddf607d2b..6e1fcc3696100 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/sign.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/sign.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow};
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
+use std::ops::Range;
 use std::path::PathBuf;
 
 use crate::commands::{Dispatch, SignResult};
@@ -23,13 +23,16 @@ pub struct Sign {
     id: Option<String>,
     #[arg(short, long)]
     label: Option<String>,
-    #[arg(short, long, value_enum, default_value = "sha256-hash")]
+    #[arg(short, long, default_value = "sha256-hash", help=SignData::HELP)]
     format: SignData,
-    /// Reverse the input data and result (for little-endian targets).
+    /// Reverse the result (for little-endian targets).
     #[arg(short = 'r', long)]
     little_endian: bool,
     #[arg(short, long)]
     output: Option<PathBuf>,
+    /// Update the given byte range in the input file.
+    #[arg(short, long, value_parser=helper::parse_range)]
+    update_in_place: Option<Range<usize>>,
     input: PathBuf,
 }
 
@@ -40,21 +43,14 @@ impl Dispatch for Sign {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Ec.try_into()?));
         attrs.push(Attribute::Sign(true));
         let object = helper::find_one_object(session, &attrs)?;
 
-        let mut data = helper::read_file(&self.input)?;
-        if self.little_endian {
-            // OpenTitanTool writes digest files in little-endian byte order,
-            // (same as the hmac peripheral's default output mode).  The ECDSA
-            // implementation performs the signature calculation with the bytes in
-            // big-endian order.
-            data.reverse();
-        }
+        let data = helper::read_file(&self.input)?;
         let data = self.format.prepare(KeyType::Ec, &data)?;
         let mechanism = self.format.mechanism(KeyType::Ec)?;
         let mut result = session.sign(&mechanism, object, &data)?;
@@ -66,6 +62,15 @@ impl Dispatch for Sign {
         if let Some(output) = &self.output {
             helper::write_file(output, &result)?;
         }
+        if let Some(range) = &self.update_in_place {
+            let mut data = helper::read_file(&self.input)?;
+            if let Some(slice) = data.get_mut(range.clone()) {
+                slice.copy_from_slice(&result);
+            } else {
+                return Err(anyhow!("Invalid range on input file: {range:?}"));
+            }
+            helper::write_file(&self.input, &data)?;
+        }
         Ok(Box::new(SignResult {
             digest: data,
             signature: result,
diff --git a/sw/host/hsmtool/src/commands/ecdsa/verify.rs b/sw/host/hsmtool/src/commands/ecdsa/verify.rs
index 30506bca24c58..6eb3dc23b5fd1 100644
--- a/sw/host/hsmtool/src/commands/ecdsa/verify.rs
+++ b/sw/host/hsmtool/src/commands/ecdsa/verify.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow};
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
+use std::ops::Range;
 use std::path::PathBuf;
 
 use crate::commands::{BasicResult, Dispatch};
@@ -23,13 +23,17 @@ pub struct Verify {
     id: Option<String>,
     #[arg(short, long)]
     label: Option<String>,
-    #[arg(short, long, value_enum, default_value = "sha256-hash")]
+    #[arg(short, long, default_value = "sha256-hash", help=SignData::HELP)]
     format: SignData,
-    /// Reverse the input data and result (for little-endian targets).
+    /// Reverse the result (for little-endian targets).
     #[arg(short = 'r', long)]
     little_endian: bool,
+    /// The signature is at the given byte range of the input file.
+    #[arg(short, long, value_parser=helper::parse_range, conflicts_with="signature")]
+    signature_at: Option<Range<usize>>,
     input: PathBuf,
-    signature: PathBuf,
+    #[arg(conflicts_with = "signature_at")]
+    signature: Option<PathBuf>,
 }
 
 #[typetag::serde(name = "ecdsa-verify")]
@@ -39,24 +43,27 @@ impl Dispatch for Verify {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Ec.try_into()?));
         attrs.push(Attribute::Verify(true));
         let object = helper::find_one_object(session, &attrs)?;
 
-        let mut data = helper::read_file(&self.input)?;
-        if self.little_endian {
-            // OpenTitanTool writes digest files in little-endian byte order,
-            // (same as the hmac peripheral's default output mode).  The ECDSA
-            // implementation performs the signature calculation with the bytes in
-            // big-endian order.
-            data.reverse();
-        }
+        let data = helper::read_file(&self.input)?;
         let data = self.format.prepare(KeyType::Ec, &data)?;
         let mechanism = self.format.mechanism(KeyType::Ec)?;
-        let mut signature = helper::read_file(&self.signature)?;
+        let mut signature = if let Some(filename) = &self.signature {
+            helper::read_file(filename)?
+        } else if let Some(range) = &self.signature_at {
+            let input = helper::read_file(&self.input)?;
+            input
+                .get(range.clone())
+                .ok_or_else(|| anyhow!("Invalid range on input file: {range:?}"))?
+                .to_vec()
+        } else {
+            unreachable!();
+        };
         if self.little_endian {
             let half = signature.len() / 2;
             signature[..half].reverse();
diff --git a/sw/host/hsmtool/src/commands/exec.rs b/sw/host/hsmtool/src/commands/exec.rs
index ad696d8ba111b..d95990029476f 100644
--- a/sw/host/hsmtool/src/commands/exec.rs
+++ b/sw/host/hsmtool/src/commands/exec.rs
@@ -5,7 +5,7 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::{Annotate, Document};
+use serde_annotate::Document;
 use std::any::Any;
 use std::path::PathBuf;
 use thiserror::Error;
@@ -18,10 +18,10 @@ pub struct Exec {
     file: PathBuf,
 }
 
-#[derive(Debug, Serialize)]
+#[derive(Serialize)]
 pub struct ExecResult {
     pub command: String,
-    pub result: Box<dyn Annotate>,
+    pub result: Box<dyn erased_serde::Serialize>,
 }
 
 #[derive(Debug, Error)]
@@ -38,7 +38,7 @@ impl Dispatch for Exec {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let commands = std::fs::read_to_string(&self.file)?;
         let commands = serde_annotate::from_str::<Vec<Box<dyn Dispatch>>>(&commands)?;
 
diff --git a/sw/host/hsmtool/src/commands/kdf/export.rs b/sw/host/hsmtool/src/commands/kdf/export.rs
new file mode 100644
index 0000000000000..efcbbe79401e3
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/kdf/export.rs
@@ -0,0 +1,63 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::helper;
+use crate::util::secret::Secret;
+use crate::util::wrap::Wrap;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Export {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    /// Wrap the exported key using a wrapping key.
+    #[arg(long)]
+    wrap: Option<String>,
+    #[arg(long, default_value = "rsa-pkcs")]
+    wrap_mechanism: Option<Wrap>,
+    #[arg(short, long)]
+    output: Option<PathBuf>,
+}
+
+#[typetag::serde(name = "kdf-export")]
+impl Dispatch for Export {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        let attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
+        let object = helper::find_one_object(session, attrs.as_slice())?;
+
+        let secret = Secret::GenericSecret;
+        let key = if self.wrap.is_some() {
+            secret.wrap_key(
+                session,
+                object,
+                self.wrap.as_deref(),
+                self.wrap_mechanism
+                    .as_ref()
+                    .ok_or(anyhow!("wrap_mechanism is required when wrap is specified"))?,
+            )?
+        } else {
+            secret.export(session, object)?
+        };
+        if let Some(output) = &self.output {
+            helper::write_file(output, key.as_slice())?;
+        }
+        Ok(Box::<BasicResult>::default())
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/kdf/generate.rs b/sw/host/hsmtool/src/commands/kdf/generate.rs
new file mode 100644
index 0000000000000..e174f2de05099
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/kdf/generate.rs
@@ -0,0 +1,55 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttrData, AttributeMap};
+use crate::util::helper;
+use crate::util::secret::Secret;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Generate {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(long)]
+    template: Option<AttributeMap>,
+}
+
+#[typetag::serde(name = "kdf-generate")]
+impl Dispatch for Generate {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
+
+        let result = Box::new(BasicResult {
+            success: true,
+            id: AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id)),
+            label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
+            error: None,
+        });
+
+        let secret = Secret::GenericSecret;
+        let _key = secret.generate(
+            session,
+            result.id.clone(),
+            result.label.clone(),
+            self.template.clone(),
+        )?;
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/kdf/import.rs b/sw/host/hsmtool/src/commands/kdf/import.rs
new file mode 100644
index 0000000000000..33a57b5435bea
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/kdf/import.rs
@@ -0,0 +1,79 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttrData, AttributeMap};
+use crate::util::helper;
+use crate::util::secret::Secret;
+use crate::util::wrap::Wrap;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Import {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(long)]
+    template: Option<AttributeMap>,
+    /// Unwrap the imported key with a wrapping key.
+    #[arg(long)]
+    unwrap: Option<String>,
+    #[arg(long, default_value = "rsa-pkcs")]
+    unwrap_mechanism: Option<Wrap>,
+    filename: PathBuf,
+}
+
+#[typetag::serde(name = "kdf-import")]
+impl Dispatch for Import {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
+
+        let result = Box::new(BasicResult {
+            success: true,
+            id: AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id)),
+            label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
+            error: None,
+        });
+
+        let secret = Secret::GenericSecret;
+        let key = helper::read_file(&self.filename)?;
+        if self.unwrap.is_some() {
+            let _object = secret.unwrap_key(
+                session,
+                result.id.clone(),
+                result.label.clone(),
+                key,
+                self.template.clone(),
+                self.unwrap.as_deref(),
+                self.unwrap_mechanism.as_ref().ok_or(anyhow!(
+                    "unwrap_mechanism is required when unwrap is specified"
+                ))?,
+            )?;
+        } else {
+            let _object = secret.import(
+                session,
+                result.id.clone(),
+                result.label.clone(),
+                key,
+                self.template.clone(),
+            )?;
+        }
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/kdf/mod.rs b/sw/host/hsmtool/src/commands/kdf/mod.rs
new file mode 100644
index 0000000000000..ecffd2e4af1d4
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/kdf/mod.rs
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+
+use crate::commands::Dispatch;
+use crate::module::Module;
+
+pub mod export;
+pub mod generate;
+pub mod import;
+
+#[derive(clap::Subcommand, Debug, Serialize, Deserialize)]
+pub enum Kdf {
+    Export(export::Export),
+    Generate(generate::Generate),
+    Import(import::Import),
+}
+
+#[typetag::serde(name = "__kdf__")]
+impl Dispatch for Kdf {
+    fn run(
+        &self,
+        context: &dyn Any,
+        hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        match self {
+            Kdf::Export(x) => x.run(context, hsm, session),
+            Kdf::Generate(x) => x.run(context, hsm, session),
+            Kdf::Import(x) => x.run(context, hsm, session),
+        }
+    }
+    fn leaf(&self) -> &dyn Dispatch
+    where
+        Self: Sized,
+    {
+        match self {
+            Kdf::Export(x) => x.leaf(),
+            Kdf::Generate(x) => x.leaf(),
+            Kdf::Import(x) => x.leaf(),
+        }
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/mod.rs b/sw/host/hsmtool/src/commands/mod.rs
index 536c56f43fbf0..504ab6c794014 100644
--- a/sw/host/hsmtool/src/commands/mod.rs
+++ b/sw/host/hsmtool/src/commands/mod.rs
@@ -12,10 +12,13 @@ use std::io::IsTerminal;
 use crate::module::Module;
 use crate::util::attribute::AttrData;
 
+mod aes;
 mod ecdsa;
 mod exec;
+mod kdf;
 mod object;
 mod rsa;
+mod spx;
 mod token;
 
 #[typetag::serde(tag = "command")]
@@ -25,7 +28,7 @@ pub trait Dispatch {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>>;
+    ) -> Result<Box<dyn erased_serde::Serialize>>;
 
     fn leaf(&self) -> &dyn Dispatch
     where
@@ -37,14 +40,20 @@ pub trait Dispatch {
 
 #[derive(clap::Subcommand, Debug, Serialize, Deserialize)]
 pub enum Commands {
+    #[command(subcommand)]
+    Aes(aes::Aes),
     #[command(subcommand)]
     Ecdsa(ecdsa::Ecdsa),
     Exec(exec::Exec),
     #[command(subcommand)]
+    Kdf(kdf::Kdf),
+    #[command(subcommand)]
     Object(object::Object),
     #[command(subcommand)]
     Rsa(rsa::Rsa),
     #[command(subcommand)]
+    Spx(spx::Spx),
+    #[command(subcommand)]
     Token(token::Token),
 }
 
@@ -55,12 +64,15 @@ impl Dispatch for Commands {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         match self {
+            Commands::Aes(x) => x.run(context, hsm, session),
             Commands::Ecdsa(x) => x.run(context, hsm, session),
             Commands::Exec(x) => x.run(context, hsm, session),
+            Commands::Kdf(x) => x.run(context, hsm, session),
             Commands::Object(x) => x.run(context, hsm, session),
             Commands::Rsa(x) => x.run(context, hsm, session),
+            Commands::Spx(x) => x.run(context, hsm, session),
             Commands::Token(x) => x.run(context, hsm, session),
         }
     }
@@ -70,16 +82,19 @@ impl Dispatch for Commands {
         Self: Sized,
     {
         match self {
+            Commands::Aes(x) => x.leaf(),
             Commands::Ecdsa(x) => x.leaf(),
             Commands::Exec(x) => x.leaf(),
+            Commands::Kdf(x) => x.leaf(),
             Commands::Object(x) => x.leaf(),
             Commands::Rsa(x) => x.leaf(),
+            Commands::Spx(x) => x.leaf(),
             Commands::Token(x) => x.leaf(),
         }
     }
 }
 
-#[derive(Debug, Serialize)]
+#[derive(Debug, Serialize, Annotate)]
 pub struct BasicResult {
     success: bool,
     #[serde(skip_serializing_if = "AttrData::is_none")]
@@ -87,6 +102,10 @@ pub struct BasicResult {
     #[serde(skip_serializing_if = "AttrData::is_none")]
     label: AttrData,
     #[serde(skip_serializing_if = "Option::is_none")]
+    #[annotate(format = block)]
+    value: Option<String>,
+    #[serde(skip_serializing_if = "Option::is_none")]
+    #[annotate(format = block)]
     error: Option<String>,
 }
 
@@ -106,17 +125,19 @@ impl Default for BasicResult {
             success: true,
             id: AttrData::None,
             label: AttrData::None,
+            value: None,
             error: None,
         }
     }
 }
 
 impl BasicResult {
-    pub fn from_error(e: &anyhow::Error) -> Box<dyn Annotate> {
+    pub fn from_error(e: &anyhow::Error) -> Box<dyn erased_serde::Serialize> {
         Box::new(BasicResult {
             success: false,
             id: AttrData::None,
             label: AttrData::None,
+            value: None,
             error: Some(format!("{:?}", e)),
         })
     }
@@ -134,7 +155,7 @@ pub fn print_result(
     format: Format,
     color: Option<bool>,
     quiet: bool,
-    result: Result<Box<dyn Annotate>>,
+    result: Result<Box<dyn erased_serde::Serialize>>,
 ) -> Result<()> {
     let (doc, result) = match result {
         Ok(value) => {
diff --git a/sw/host/hsmtool/src/commands/object/destroy.rs b/sw/host/hsmtool/src/commands/object/destroy.rs
index 4fb98154dae52..88a63918475c5 100644
--- a/sw/host/hsmtool/src/commands/object/destroy.rs
+++ b/sw/host/hsmtool/src/commands/object/destroy.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::{BasicResult, Dispatch};
@@ -28,7 +27,7 @@ impl Dispatch for Destroy {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let attr = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         let objects = session.find_objects(&attr)?;
diff --git a/sw/host/hsmtool/src/commands/object/list.rs b/sw/host/hsmtool/src/commands/object/list.rs
index a25f3df93d108..a97c3e4874bf3 100644
--- a/sw/host/hsmtool/src/commands/object/list.rs
+++ b/sw/host/hsmtool/src/commands/object/list.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::str::FromStr;
 
@@ -16,6 +15,10 @@ use crate::util::attribute::{AttributeMap, AttributeType};
 
 #[derive(clap::Args, Debug, Serialize, Deserialize)]
 pub struct List {
+    /// Optional search attributes.
+    #[arg(short, long)]
+    #[serde(default)]
+    search: Option<AttributeMap>,
     /// Attributes to show.
     #[arg(short, long, value_parser=AttributeType::from_str)]
     #[serde(default)]
@@ -34,8 +37,12 @@ impl Dispatch for List {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
+        let search = self
+            .search
+            .as_ref()
+            .map_or(Ok(Vec::new()), |s| s.to_vec())?;
         let default_attr = [
             AttributeType::Id,
             AttributeType::Label,
@@ -53,7 +60,7 @@ impl Dispatch for List {
             .collect::<Result<Vec<cryptoki::object::AttributeType>>>()?;
 
         let mut result = Box::<ListResult>::default();
-        for object in session.find_objects(&[])? {
+        for object in session.find_objects(&search)? {
             let attr = session.get_attributes(object, &attr)?;
             let attr = AttributeMap::from(attr.as_slice());
             result.objects.push(attr);
diff --git a/sw/host/hsmtool/src/commands/object/mod.rs b/sw/host/hsmtool/src/commands/object/mod.rs
index 5f190a120239e..e206a093c6476 100644
--- a/sw/host/hsmtool/src/commands/object/mod.rs
+++ b/sw/host/hsmtool/src/commands/object/mod.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::Dispatch;
@@ -13,15 +12,19 @@ use crate::module::Module;
 
 mod destroy;
 mod list;
+mod read;
 mod show;
 mod update;
+mod write;
 
 #[derive(clap::Subcommand, Debug, Serialize, Deserialize)]
 pub enum Object {
     Destroy(destroy::Destroy),
     List(list::List),
+    Read(read::Read),
     Show(show::Show),
     Update(update::Update),
+    Write(write::Write),
 }
 
 #[typetag::serde(name = "__object__")]
@@ -31,12 +34,14 @@ impl Dispatch for Object {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         match self {
             Object::Destroy(x) => x.run(context, hsm, session),
             Object::List(x) => x.run(context, hsm, session),
+            Object::Read(x) => x.run(context, hsm, session),
             Object::Show(x) => x.run(context, hsm, session),
             Object::Update(x) => x.run(context, hsm, session),
+            Object::Write(x) => x.run(context, hsm, session),
         }
     }
     fn leaf(&self) -> &dyn Dispatch
@@ -46,8 +51,10 @@ impl Dispatch for Object {
         match self {
             Object::Destroy(x) => x.leaf(),
             Object::List(x) => x.leaf(),
+            Object::Read(x) => x.leaf(),
             Object::Show(x) => x.leaf(),
             Object::Update(x) => x.leaf(),
+            Object::Write(x) => x.leaf(),
         }
     }
 }
diff --git a/sw/host/hsmtool/src/commands/object/read.rs b/sw/host/hsmtool/src/commands/object/read.rs
new file mode 100644
index 0000000000000..e992b4bd259ab
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/object/read.rs
@@ -0,0 +1,58 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttributeError, AttributeMap, AttributeType};
+use crate::util::helper;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Read {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    /// Search spec
+    #[arg(short, long)]
+    search: Option<AttributeMap>,
+    #[arg()]
+    output: PathBuf,
+}
+
+#[typetag::serde(name = "object-read")]
+impl Dispatch for Read {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+        let attr = helper::search_spec_ex(
+            self.id.as_deref(),
+            self.label.as_deref(),
+            self.search.as_ref(),
+        )?;
+        let object = helper::find_one_object(session, &attr)?;
+        let map = AttributeMap::from_object(session, object)?;
+        let value = map
+            .get(&AttributeType::Value)
+            .ok_or(AttributeError::AttributeNotFound(AttributeType::Value))?;
+        let value = Vec::<u8>::try_from(value)?;
+        let mut result = Box::<BasicResult>::default();
+        if self.output.to_str() == Some("-") {
+            result.value = Some(String::from_utf8(value)?);
+        } else {
+            std::fs::write(&self.output, value)?;
+        }
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/object/show.rs b/sw/host/hsmtool/src/commands/object/show.rs
index 3f65eeead93df..f7e94e15dccdc 100644
--- a/sw/host/hsmtool/src/commands/object/show.rs
+++ b/sw/host/hsmtool/src/commands/object/show.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::collections::HashSet;
 
@@ -53,7 +52,7 @@ impl Dispatch for Show {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let attr = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         let objects = session.find_objects(&attr)?;
diff --git a/sw/host/hsmtool/src/commands/object/update.rs b/sw/host/hsmtool/src/commands/object/update.rs
index 8e3272e0021aa..22a7b8965a7b6 100644
--- a/sw/host/hsmtool/src/commands/object/update.rs
+++ b/sw/host/hsmtool/src/commands/object/update.rs
@@ -2,10 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::Dispatch;
@@ -31,7 +30,7 @@ impl Dispatch for Update {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let attr = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         let objects = session.find_objects(&attr)?;
diff --git a/sw/host/hsmtool/src/commands/object/write.rs b/sw/host/hsmtool/src/commands/object/write.rs
new file mode 100644
index 0000000000000..eb08fb50c5dcc
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/object/write.rs
@@ -0,0 +1,91 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::{AttrData, AttributeMap, AttributeType, ObjectClass};
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Write {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(short, long, default_value = "false")]
+    private: bool,
+    #[arg(short, long)]
+    application: Option<String>,
+    #[arg(short, long)]
+    template: Option<AttributeMap>,
+    #[arg()]
+    input: PathBuf,
+}
+
+#[typetag::serde(name = "object-write")]
+impl Dispatch for Write {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let session = session.ok_or(HsmError::SessionRequired)?;
+
+        let mut attr = AttributeMap::default();
+        let id = self
+            .id
+            .as_ref()
+            .map_or(AttrData::None, |id| AttrData::Str(id.into()));
+        let label = self
+            .label
+            .as_ref()
+            .map_or(AttrData::None, |label| AttrData::Str(label.into()));
+        if !id.is_none() {
+            attr.insert(AttributeType::Id, id.clone());
+        }
+        if !label.is_none() {
+            attr.insert(AttributeType::Label, label.clone());
+        }
+        if id.is_none() && label.is_none() {
+            return Err(HsmError::NoSearchCriteria.into());
+        }
+
+        let result = Box::new(BasicResult {
+            success: true,
+            id,
+            label,
+            value: None,
+            error: None,
+        });
+
+        attr.insert(
+            AttributeType::Class,
+            AttrData::ObjectClass(ObjectClass::Data),
+        );
+        attr.insert(AttributeType::Token, AttrData::from(true));
+        attr.insert(AttributeType::Private, AttrData::from(self.private));
+        if let Some(application) = &self.application {
+            // Is this a bug in opensc-pkcs11 or in the Nitrokey?
+            // It seems the application string needs a nul terminator.
+            let mut val = application.clone();
+            val.push(0 as char);
+            attr.insert(AttributeType::Application, AttrData::Str(val));
+        }
+        if let Some(template) = &self.template {
+            attr.merge(template.clone());
+        }
+        let value = std::fs::read(&self.input)?;
+        attr.insert(AttributeType::Value, AttrData::from(value.as_slice()));
+        let attr = attr.to_vec()?;
+        session.create_object(&attr)?;
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/rsa/decrypt.rs b/sw/host/hsmtool/src/commands/rsa/decrypt.rs
index e8ec9f733842e..a9b378cdd10af 100644
--- a/sw/host/hsmtool/src/commands/rsa/decrypt.rs
+++ b/sw/host/hsmtool/src/commands/rsa/decrypt.rs
@@ -7,7 +7,6 @@ use cryptoki::mechanism::Mechanism;
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
@@ -35,7 +34,7 @@ impl Dispatch for Decrypt {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
diff --git a/sw/host/hsmtool/src/commands/rsa/encrypt.rs b/sw/host/hsmtool/src/commands/rsa/encrypt.rs
index 73c5290157731..b1547ba60e525 100644
--- a/sw/host/hsmtool/src/commands/rsa/encrypt.rs
+++ b/sw/host/hsmtool/src/commands/rsa/encrypt.rs
@@ -7,7 +7,6 @@ use cryptoki::mechanism::Mechanism;
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
@@ -35,7 +34,7 @@ impl Dispatch for Encrypt {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
diff --git a/sw/host/hsmtool/src/commands/rsa/export.rs b/sw/host/hsmtool/src/commands/rsa/export.rs
index f06fbfab5a1ad..17b804e10c0f2 100644
--- a/sw/host/hsmtool/src/commands/rsa/export.rs
+++ b/sw/host/hsmtool/src/commands/rsa/export.rs
@@ -2,12 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Result, anyhow};
 use cryptoki::object::{Attribute, ObjectHandle};
 use cryptoki::session::Session;
 use rsa::{RsaPrivateKey, RsaPublicKey};
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
@@ -16,8 +15,9 @@ use crate::error::HsmError;
 use crate::module::Module;
 use crate::util::attribute::{AttrData, AttributeMap, AttributeType, KeyType, ObjectClass};
 use crate::util::helper;
-use crate::util::key::rsa::{save_private_key, save_public_key};
 use crate::util::key::KeyEncoding;
+use crate::util::key::rsa::{save_private_key, save_public_key};
+use crate::util::wrap::{Wrap, WrapPrivateKey};
 
 #[derive(clap::Args, Debug, Serialize, Deserialize)]
 pub struct Export {
@@ -31,6 +31,9 @@ pub struct Export {
     /// Wrap the exported key a wrapping key.
     #[arg(long)]
     wrap: Option<String>,
+    // Wrapping key mechanism. Required when wrap is specified.
+    #[arg(long, default_value = "aes-key-wrap-pad")]
+    wrap_mechanism: Option<WrapPrivateKey>,
     #[arg(short, long, value_enum, default_value = "pem")]
     format: KeyEncoding,
     filename: PathBuf,
@@ -54,16 +57,14 @@ impl Export {
         Ok(())
     }
 
-    fn wrap_key(&self, session: &Session, _object: ObjectHandle) -> Result<()> {
-        let mut attrs = helper::search_spec(None, self.wrap.as_deref())?;
-        attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
-        let _wkey = helper::find_one_object(session, &attrs).context("Find wrapping key")?;
-
-        bail!("RSA export by wrapping is not supported yet!");
-        // FIXME(cfrantz): Turn this back on when cryptoki includes the correct mechanisms.
-        //let wrapped = session.wrap_key(&Mechanism::RsaPkcs, wkey, object)?;
-        //helper::write_file(&self.filename, &wrapped)?;
-        //Ok(())
+    fn wrap_key(&self, session: &Session, object: ObjectHandle) -> Result<()> {
+        let wrapper: Wrap = self
+            .wrap_mechanism
+            .ok_or(anyhow!("wrap_mechanism is required when wrap is specified"))?
+            .into();
+        let wrapped = wrapper.wrap(session, object, self.wrap.as_deref())?;
+        helper::write_file(&self.filename, &wrapped)?;
+        Ok(())
     }
 }
 
@@ -74,7 +75,7 @@ impl Dispatch for Export {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
diff --git a/sw/host/hsmtool/src/commands/rsa/generate.rs b/sw/host/hsmtool/src/commands/rsa/generate.rs
index 908826bc360f1..3810658452745 100644
--- a/sw/host/hsmtool/src/commands/rsa/generate.rs
+++ b/sw/host/hsmtool/src/commands/rsa/generate.rs
@@ -6,7 +6,6 @@ use anyhow::Result;
 use cryptoki::mechanism::Mechanism;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::str::FromStr;
 
@@ -65,7 +64,7 @@ impl Dispatch for Generate {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
         let id = AttrData::Str(self.id.as_ref().cloned().unwrap_or_else(helper::random_id));
@@ -73,6 +72,7 @@ impl Dispatch for Generate {
             success: true,
             id: id.clone(),
             label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
             error: None,
         });
 
diff --git a/sw/host/hsmtool/src/commands/rsa/import.rs b/sw/host/hsmtool/src/commands/rsa/import.rs
index 266f3c7e65370..17c815ba614ac 100644
--- a/sw/host/hsmtool/src/commands/rsa/import.rs
+++ b/sw/host/hsmtool/src/commands/rsa/import.rs
@@ -2,11 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
-use cryptoki::object::Attribute;
+use anyhow::{Result, anyhow};
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 use std::str::FromStr;
@@ -14,9 +12,10 @@ use std::str::FromStr;
 use crate::commands::{BasicResult, Dispatch};
 use crate::error::HsmError;
 use crate::module::Module;
-use crate::util::attribute::{AttrData, AttributeMap, AttributeType, ObjectClass};
+use crate::util::attribute::{AttrData, AttributeMap, AttributeType};
 use crate::util::helper;
 use crate::util::key::rsa::{load_private_key, load_public_key};
+use crate::util::wrap::{Wrap, WrapPrivateKey};
 
 #[derive(clap::Args, Debug, Serialize, Deserialize)]
 pub struct Import {
@@ -36,6 +35,9 @@ pub struct Import {
     /// Unwrap the imported key with a wrapping key.
     #[arg(long)]
     unwrap: Option<String>,
+    /// Unwrapping key mechanism. Required when unwrap is specified.
+    #[arg(long, default_value = "aes-key-wrap-pad")]
+    unwrap_mechanism: Option<WrapPrivateKey>,
     filename: PathBuf,
 }
 
@@ -58,16 +60,16 @@ impl Import {
         "CKA_SIGN": true
     }"#;
 
-    fn unwrap_key(&self, session: &Session, _template: &AttributeMap) -> Result<()> {
-        let mut attrs = helper::search_spec(None, self.unwrap.as_deref())?;
-        attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
-        let _wkey = helper::find_one_object(session, &attrs).context("Find unwrapping key")?;
-
-        bail!("RSA import by unwrapping is not supported yet!");
-        // FIXME(cfrantz): Turn this back on when cryptoki includes the correct mechanisms.
-        //let key = helper::read_file(&self.filename)?;
-        //let k = session.unwrap_key(&Mechanism::RsaPkcs, wkey, &key, &template.to_vec()?)?;
-        //Ok(())
+    fn unwrap_key(&self, session: &Session, template: &AttributeMap) -> Result<()> {
+        let key = helper::read_file(&self.filename)?;
+        let wrapper: Wrap = self
+            .unwrap_mechanism
+            .ok_or(anyhow!(
+                "unwrap_mechanism is required when wrap is specified"
+            ))?
+            .into();
+        let _key = wrapper.unwrap(session, key.as_slice(), self.unwrap.as_deref(), template)?;
+        Ok(())
     }
 }
 
@@ -78,7 +80,7 @@ impl Dispatch for Import {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         helper::no_object_exists(session, self.id.as_deref(), self.label.as_deref())?;
         let mut public_attrs =
@@ -91,6 +93,7 @@ impl Dispatch for Import {
             success: true,
             id: id.clone(),
             label: AttrData::Str(self.label.as_ref().cloned().unwrap_or_default()),
+            value: None,
             error: None,
         });
         public_attrs.insert(AttributeType::Id, id.clone());
diff --git a/sw/host/hsmtool/src/commands/rsa/mod.rs b/sw/host/hsmtool/src/commands/rsa/mod.rs
index 6049930e9095c..f3c36aeb57a93 100644
--- a/sw/host/hsmtool/src/commands/rsa/mod.rs
+++ b/sw/host/hsmtool/src/commands/rsa/mod.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::Dispatch;
@@ -37,7 +36,7 @@ impl Dispatch for Rsa {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         match self {
             Rsa::Decrypt(x) => x.run(context, hsm, session),
             Rsa::Encrypt(x) => x.run(context, hsm, session),
diff --git a/sw/host/hsmtool/src/commands/rsa/sign.rs b/sw/host/hsmtool/src/commands/rsa/sign.rs
index 8a7e40bfa2a58..3a4e6cbc24f09 100644
--- a/sw/host/hsmtool/src/commands/rsa/sign.rs
+++ b/sw/host/hsmtool/src/commands/rsa/sign.rs
@@ -2,15 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow};
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
+use std::ops::Range;
 use std::path::PathBuf;
 
-use crate::commands::{BasicResult, Dispatch};
+use crate::commands::{Dispatch, SignResult};
 use crate::error::HsmError;
 use crate::module::Module;
 use crate::util::attribute::KeyType;
@@ -23,13 +23,16 @@ pub struct Sign {
     id: Option<String>,
     #[arg(short, long)]
     label: Option<String>,
-    #[arg(short, long, value_enum, default_value = "sha256-hash")]
+    #[arg(short, long, default_value = "sha256-hash", help=SignData::HELP)]
     format: SignData,
-    /// Reverse the input data and result (for little-endian targets).
+    /// Reverse the result (for little-endian targets).
     #[arg(short = 'r', long)]
     little_endian: bool,
     #[arg(short, long)]
     output: Option<PathBuf>,
+    /// Update the given byte range in the input file.
+    #[arg(short, long, value_parser=helper::parse_range)]
+    update_in_place: Option<Range<usize>>,
     input: PathBuf,
 }
 
@@ -40,17 +43,14 @@ impl Dispatch for Sign {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
         attrs.push(Attribute::Sign(true));
         let object = helper::find_one_object(session, &attrs)?;
 
-        let mut data = helper::read_file(&self.input)?;
-        if self.little_endian {
-            data.reverse();
-        }
+        let data = helper::read_file(&self.input)?;
         let data = self.format.prepare(KeyType::Rsa, &data)?;
         let mechanism = self.format.mechanism(KeyType::Rsa)?;
         let mut result = session.sign(&mechanism, object, &data)?;
@@ -60,6 +60,18 @@ impl Dispatch for Sign {
         if let Some(output) = &self.output {
             helper::write_file(output, &result)?;
         }
-        Ok(Box::<BasicResult>::default())
+        if let Some(range) = &self.update_in_place {
+            let mut data = helper::read_file(&self.input)?;
+            if let Some(slice) = data.get_mut(range.clone()) {
+                slice.copy_from_slice(&result);
+            } else {
+                return Err(anyhow!("Invalid range on input file: {range:?}"));
+            }
+            helper::write_file(&self.input, &data)?;
+        }
+        Ok(Box::new(SignResult {
+            digest: data,
+            signature: result,
+        }))
     }
 }
diff --git a/sw/host/hsmtool/src/commands/rsa/verify.rs b/sw/host/hsmtool/src/commands/rsa/verify.rs
index 5c3a9faf9e32d..93428febb21c5 100644
--- a/sw/host/hsmtool/src/commands/rsa/verify.rs
+++ b/sw/host/hsmtool/src/commands/rsa/verify.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow};
 use cryptoki::object::Attribute;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
+use std::ops::Range;
 use std::path::PathBuf;
 
 use crate::commands::{BasicResult, Dispatch};
@@ -23,13 +23,17 @@ pub struct Verify {
     id: Option<String>,
     #[arg(short, long)]
     label: Option<String>,
-    #[arg(short, long, value_enum, default_value = "sha256-hash")]
+    #[arg(short, long, default_value = "sha256-hash", help=SignData::HELP)]
     format: SignData,
-    /// Reverse the input data and result (for little-endian targets).
+    /// Reverse the result (for little-endian targets).
     #[arg(short = 'r', long)]
     little_endian: bool,
+    /// The signature is at the given byte range of the input file.
+    #[arg(short, long, value_parser=helper::parse_range, conflicts_with="signature")]
+    signature_at: Option<Range<usize>>,
     input: PathBuf,
-    signature: PathBuf,
+    #[arg(conflicts_with = "signature_at")]
+    signature: Option<PathBuf>,
 }
 
 #[typetag::serde(name = "rsa-verify")]
@@ -39,20 +43,27 @@ impl Dispatch for Verify {
         _context: &dyn Any,
         _hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let session = session.ok_or(HsmError::SessionRequired)?;
         let mut attrs = helper::search_spec(self.id.as_deref(), self.label.as_deref())?;
         attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
         attrs.push(Attribute::Verify(true));
         let object = helper::find_one_object(session, &attrs)?;
 
-        let mut data = helper::read_file(&self.input)?;
-        if self.little_endian {
-            data.reverse();
-        }
+        let data = helper::read_file(&self.input)?;
         let data = self.format.prepare(KeyType::Rsa, &data)?;
         let mechanism = self.format.mechanism(KeyType::Rsa)?;
-        let mut signature = helper::read_file(&self.signature)?;
+        let mut signature = if let Some(filename) = &self.signature {
+            helper::read_file(filename)?
+        } else if let Some(range) = &self.signature_at {
+            let input = helper::read_file(&self.input)?;
+            input
+                .get(range.clone())
+                .ok_or_else(|| anyhow!("Invalid range on input file: {range:?}"))?
+                .to_vec()
+        } else {
+            unreachable!();
+        };
         if self.little_endian {
             signature.reverse();
         }
diff --git a/sw/host/hsmtool/src/commands/spx/export.rs b/sw/host/hsmtool/src/commands/spx/export.rs
new file mode 100644
index 0000000000000..ecafefb2e11eb
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/export.rs
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+use std::str::FromStr;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use acorn::SpxInterface;
+use sphincsplus::{EncodeKey, SphincsPlus, SpxPublicKey};
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Export {
+    #[arg(short, long)]
+    label: String,
+    filename: PathBuf,
+}
+
+impl Export {
+    fn export(&self, spx: &dyn SpxInterface) -> Result<()> {
+        let key = spx.get_key_info(&self.label)?;
+        let algorithm = SphincsPlus::from_str(&key.algorithm)?;
+        let pk = SpxPublicKey::from_bytes(algorithm, &key.public_key)?;
+        pk.write_pem_file(&self.filename)?;
+        Ok(())
+    }
+}
+
+#[typetag::serde(name = "spx-export")]
+impl Dispatch for Export {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_deref().ok_or(HsmError::SpxUnavailable)?;
+        let _token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+        self.export(spx)?;
+        Ok(Box::<BasicResult>::default())
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/generate.rs b/sw/host/hsmtool/src/commands/spx/generate.rs
new file mode 100644
index 0000000000000..2268d4bf78ca9
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/generate.rs
@@ -0,0 +1,74 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::AttrData;
+use acorn::GenerateFlags;
+use sphincsplus::{EncodeKey, SphincsPlus, SpxDomain, SpxSecretKey};
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Generate {
+    #[arg(short, long)]
+    label: String,
+    #[arg(short, long, default_value = "SHA2-128s-simple")]
+    algorithm: SphincsPlus,
+    #[arg(
+        short,
+        long,
+        default_value = "None",
+        help = "SLH-DSA domain (if the backend requires the domain to be associated with the key)"
+    )]
+    domain: SpxDomain,
+    #[arg(short, long, help = "Overwrite an existing key with the same label")]
+    overwrite: bool,
+    #[arg(short, long, help = "Export the private key material to a file")]
+    export: Option<PathBuf>,
+}
+
+#[typetag::serde(name = "spx-generate")]
+impl Dispatch for Generate {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_ref().ok_or(HsmError::SpxUnavailable)?;
+        let token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+
+        #[rustfmt::skip]
+        let flags =
+            if self.overwrite { GenerateFlags::OVERWRITE } else { GenerateFlags::NONE }
+            | if self.export.is_some() { GenerateFlags::EXPORT_PRIVATE } else { GenerateFlags::NONE };
+
+        let key = spx.generate_key(
+            &self.label,
+            &self.algorithm.to_string(),
+            self.domain,
+            token,
+            flags,
+        )?;
+
+        if let Some(path) = &self.export {
+            let sk = SpxSecretKey::from_bytes(self.algorithm, &key.private_key)?;
+            sk.write_pem_file(path)?;
+        }
+
+        Ok(Box::new(BasicResult {
+            success: true,
+            id: key.hash.map_or(AttrData::None, AttrData::Str),
+            label: AttrData::Str(key.alias),
+            value: None,
+            error: None,
+        }))
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/import.rs b/sw/host/hsmtool/src/commands/spx/import.rs
new file mode 100644
index 0000000000000..c28757187d526
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/import.rs
@@ -0,0 +1,64 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::attribute::AttrData;
+use sphincsplus::{DecodeKey, SpxDomain, SpxPublicKey, SpxSecretKey};
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Import {
+    #[arg(short, long)]
+    label: String,
+    #[arg(
+        short,
+        long,
+        default_value = "None",
+        help = "SLH-DSA domain (if the backend requires the domain to be associated with the key)"
+    )]
+    domain: SpxDomain,
+    #[arg(short, long, help = "Overwrite an existing key with the same label")]
+    overwrite: bool,
+    filename: PathBuf,
+}
+
+#[typetag::serde(name = "spx-import")]
+impl Dispatch for Import {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_ref().ok_or(HsmError::SpxUnavailable)?;
+        let token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+
+        let sk = SpxSecretKey::read_pem_file(&self.filename)?;
+        let pk = SpxPublicKey::from(&sk);
+
+        let key = spx.import_keypair(
+            &self.label,
+            &sk.algorithm().to_string(),
+            self.domain,
+            token,
+            self.overwrite,
+            pk.as_bytes(),
+            sk.as_bytes(),
+        )?;
+        Ok(Box::new(BasicResult {
+            success: true,
+            id: key.hash.map_or(AttrData::None, AttrData::Str),
+            label: AttrData::Str(key.alias),
+            value: None,
+            error: None,
+        }))
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/list.rs b/sw/host/hsmtool/src/commands/spx/list.rs
new file mode 100644
index 0000000000000..02554c97da9d5
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/list.rs
@@ -0,0 +1,59 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use sphincsplus::SpxDomain;
+use std::any::Any;
+
+use crate::commands::Dispatch;
+use crate::error::HsmError;
+use crate::module::Module;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct List {}
+
+#[derive(Default, Debug, Serialize)]
+pub struct Key {
+    pub id: String,
+    pub label: String,
+    pub algorithm: String,
+    pub domain: Option<SpxDomain>,
+}
+
+#[derive(Default, Debug, Serialize)]
+pub struct ListResult {
+    version: String,
+    objects: Vec<Key>,
+}
+
+#[typetag::serde(name = "spx-list")]
+impl Dispatch for List {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_ref().ok_or(HsmError::SpxUnavailable)?;
+        let _token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+
+        let mut result = Box::new(ListResult {
+            version: spx.get_version()?,
+            ..Default::default()
+        });
+        let keys = spx.list_keys()?;
+        for key in keys {
+            let info = spx.get_key_info(&key.alias)?;
+            result.objects.push(Key {
+                id: info.hash,
+                label: key.alias,
+                algorithm: info.algorithm,
+                domain: info.domain,
+            });
+        }
+        Ok(result)
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/mod.rs b/sw/host/hsmtool/src/commands/spx/mod.rs
new file mode 100644
index 0000000000000..44b2a0e7cb160
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/mod.rs
@@ -0,0 +1,60 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use std::any::Any;
+
+use crate::commands::Dispatch;
+use crate::module::Module;
+
+pub mod export;
+pub mod generate;
+pub mod import;
+pub mod list;
+pub mod sign;
+pub mod verify;
+
+#[derive(clap::Subcommand, Debug, Serialize, Deserialize)]
+pub enum Spx {
+    Generate(generate::Generate),
+    Export(export::Export),
+    Import(import::Import),
+    List(list::List),
+    Sign(sign::Sign),
+    Verify(verify::Verify),
+}
+
+#[typetag::serde(name = "__spx__")]
+impl Dispatch for Spx {
+    fn run(
+        &self,
+        context: &dyn Any,
+        hsm: &Module,
+        session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        match self {
+            Spx::Generate(x) => x.run(context, hsm, session),
+            Spx::Export(x) => x.run(context, hsm, session),
+            Spx::Import(x) => x.run(context, hsm, session),
+            Spx::List(x) => x.run(context, hsm, session),
+            Spx::Sign(x) => x.run(context, hsm, session),
+            Spx::Verify(x) => x.run(context, hsm, session),
+        }
+    }
+    fn leaf(&self) -> &dyn Dispatch
+    where
+        Self: Sized,
+    {
+        match self {
+            Spx::Generate(x) => x.leaf(),
+            Spx::Export(x) => x.leaf(),
+            Spx::Import(x) => x.leaf(),
+            Spx::List(x) => x.leaf(),
+            Spx::Sign(x) => x.leaf(),
+            Spx::Verify(x) => x.leaf(),
+        }
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/sign.rs b/sw/host/hsmtool/src/commands/spx/sign.rs
new file mode 100644
index 0000000000000..8cd53fd001001
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/sign.rs
@@ -0,0 +1,56 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use sphincsplus::SpxDomain;
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::helper;
+use crate::util::signing::SignData;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Sign {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(short, long, default_value = "plain-text", help=SignData::HELP)]
+    format: SignData,
+    /// The SPHINCS+ signing domain.
+    #[arg(short = 'd', long, default_value = "pure")]
+    domain: SpxDomain,
+    #[arg(short, long)]
+    output: PathBuf,
+    input: PathBuf,
+}
+
+#[typetag::serde(name = "spx-sign")]
+impl Dispatch for Sign {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_ref().ok_or(HsmError::SpxUnavailable)?;
+        let _token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+
+        let data = helper::read_file(&self.input)?;
+        let data = self.format.spx_prepare(self.domain, &data)?;
+        let result = spx.sign(
+            self.label.as_deref(),
+            self.id.as_deref(),
+            self.domain,
+            &data,
+        )?;
+        helper::write_file(&self.output, &result)?;
+        Ok(Box::<BasicResult>::default())
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/spx/verify.rs b/sw/host/hsmtool/src/commands/spx/verify.rs
new file mode 100644
index 0000000000000..410044c76b9b3
--- /dev/null
+++ b/sw/host/hsmtool/src/commands/spx/verify.rs
@@ -0,0 +1,64 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use sphincsplus::SpxDomain;
+use std::any::Any;
+use std::path::PathBuf;
+
+use crate::commands::{BasicResult, Dispatch};
+use crate::error::HsmError;
+use crate::module::Module;
+use crate::util::helper;
+use crate::util::signing::SignData;
+
+#[derive(clap::Args, Debug, Serialize, Deserialize)]
+pub struct Verify {
+    #[arg(long)]
+    id: Option<String>,
+    #[arg(short, long)]
+    label: Option<String>,
+    #[arg(short, long, default_value = "plain-text", help=SignData::HELP)]
+    format: SignData,
+    /// The SPHINCS+ signing domain.
+    #[arg(short = 'd', long, default_value = "pure")]
+    domain: SpxDomain,
+    input: PathBuf,
+    signature: PathBuf,
+}
+
+#[typetag::serde(name = "rsa-verify")]
+impl Dispatch for Verify {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        hsm: &Module,
+        _session: Option<&Session>,
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
+        let spx = hsm.spx.as_ref().ok_or(HsmError::SpxUnavailable)?;
+        let _token = hsm.token.as_deref().ok_or(HsmError::SessionRequired)?;
+
+        let data = helper::read_file(&self.input)?;
+        let data = self.format.spx_prepare(self.domain, &data)?;
+        let signature = helper::read_file(&self.signature)?;
+        let result = spx.verify(
+            self.label.as_deref(),
+            self.id.as_deref(),
+            self.domain,
+            &data,
+            &signature,
+        )?;
+        Ok(Box::new(BasicResult {
+            success: result,
+            error: if result {
+                None
+            } else {
+                Some("SPX Verify Failed".into())
+            },
+            ..Default::default()
+        }))
+    }
+}
diff --git a/sw/host/hsmtool/src/commands/token.rs b/sw/host/hsmtool/src/commands/token.rs
index 6d2a6a4d5c0c2..baf398abcd20c 100644
--- a/sw/host/hsmtool/src/commands/token.rs
+++ b/sw/host/hsmtool/src/commands/token.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use cryptoki::session::Session;
 use serde::{Deserialize, Serialize};
-use serde_annotate::Annotate;
 use std::any::Any;
 
 use crate::commands::Dispatch;
@@ -45,7 +44,7 @@ impl Dispatch for List {
         _context: &dyn Any,
         hsm: &Module,
         _session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         let mut response = Box::<ListResponse>::default();
         for slot in hsm.pkcs11.get_slots_with_token()? {
             let info = hsm.pkcs11.get_token_info(slot)?;
@@ -67,7 +66,7 @@ impl Dispatch for Token {
         context: &dyn Any,
         hsm: &Module,
         session: Option<&Session>,
-    ) -> Result<Box<dyn Annotate>> {
+    ) -> Result<Box<dyn erased_serde::Serialize>> {
         match self {
             Token::List(x) => x.run(context, hsm, session),
         }
diff --git a/sw/host/hsmtool/src/error.rs b/sw/host/hsmtool/src/error.rs
index ab10e76a04e32..53363accc9ece 100644
--- a/sw/host/hsmtool/src/error.rs
+++ b/sw/host/hsmtool/src/error.rs
@@ -34,4 +34,10 @@ pub enum HsmError {
     FilePermissionError(u32),
     #[error("DER error: {0}")]
     DerError(String),
+    #[error("This operation requires an spx module")]
+    SpxUnavailable,
+    #[error("Parse error: {0}")]
+    ParseError(String),
+    #[error("Unknown application: {0}")]
+    UnknownApplication(String),
 }
diff --git a/sw/host/hsmtool/src/extra/mod.rs b/sw/host/hsmtool/src/extra/mod.rs
new file mode 100644
index 0000000000000..44f0b4cf3f559
--- /dev/null
+++ b/sw/host/hsmtool/src/extra/mod.rs
@@ -0,0 +1,9 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+mod spxef;
+mod spxkms;
+
+pub use spxef::SpxEf;
+pub use spxkms::SpxKms;
diff --git a/sw/host/hsmtool/src/extra/spxef.rs b/sw/host/hsmtool/src/extra/spxef.rs
new file mode 100644
index 0000000000000..37155141bf513
--- /dev/null
+++ b/sw/host/hsmtool/src/extra/spxef.rs
@@ -0,0 +1,228 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use acorn::{GenerateFlags, KeyEntry, KeyInfo, SpxInterface};
+use anyhow::Result;
+use cryptoki::session::Session;
+use sphincsplus::{DecodeKey, EncodeKey};
+use sphincsplus::{SphincsPlus, SpxDomain, SpxError, SpxPublicKey, SpxSecretKey};
+use std::rc::Rc;
+use std::str::FromStr;
+use zeroize::Zeroizing;
+
+use crate::error::HsmError;
+use crate::util::attribute::{AttrData, AttributeMap, AttributeType};
+use crate::util::ef::ElementaryFile;
+
+/// SpxEf implements host-based SPHINCS+ signing with elementary files stored
+/// on a PKCS#11 token.
+///
+/// This is not as secure as signing on an HSM, but allows secure storage of
+/// the key material on a token.  Every effort is made to destroy secret key
+/// material loaded to host RAM after use to prevent unintentional leaking of
+/// keys.
+pub struct SpxEf {
+    session: Rc<Session>,
+}
+
+impl SpxEf {
+    const APPLICATION: &'static str = "hsmtool-spx";
+
+    pub fn new(session: Rc<Session>) -> Box<Self> {
+        Box::new(Self { session })
+    }
+
+    fn load_key(&self, alias: &str) -> Result<SpxSecretKey> {
+        let mut search = AttributeMap::default();
+        search.insert(AttributeType::Label, AttrData::Str(alias.into()));
+        let mut ef = ElementaryFile::find(&self.session, search)?;
+        if ef.is_empty() {
+            return Err(HsmError::ObjectNotFound(alias.into()).into());
+        } else if ef.len() > 1 {
+            return Err(HsmError::TooManyObjects(ef.len(), alias.into()).into());
+        }
+        let ef = ef.remove(0);
+        if let Some(app) = &ef.application {
+            match app.split_once(':') {
+                Some((Self::APPLICATION, _algo)) => {
+                    let data = Zeroizing::new(String::from_utf8(ef.read(&self.session)?)?);
+                    return Ok(SpxSecretKey::from_pem(data.as_str())?);
+                }
+                Some((_, _)) | None => {
+                    return Err(HsmError::UnknownApplication(app.into()).into());
+                }
+            }
+        }
+        Err(HsmError::UnknownApplication("<none>".into()).into())
+    }
+}
+
+impl SpxInterface for SpxEf {
+    /// Get the version of the backend.
+    fn get_version(&self) -> Result<String> {
+        Ok(String::from("PKCS#11 ElementaryFiles 0.0.1"))
+    }
+
+    /// List keys known to the backend.
+    fn list_keys(&self) -> Result<Vec<KeyEntry>> {
+        let mut result = Vec::new();
+        for file in ElementaryFile::list(&self.session)? {
+            if let Some(app) = file.application {
+                if let Some((Self::APPLICATION, algo)) = app.split_once(':') {
+                    result.push(KeyEntry {
+                        alias: file.name.clone(),
+                        hash: None,
+                        algorithm: algo.into(),
+                        ..Default::default()
+                    });
+                }
+            }
+        }
+        Ok(result)
+    }
+
+    /// Get the public key info.
+    fn get_key_info(&self, alias: &str) -> Result<KeyInfo> {
+        let sk = self.load_key(alias)?;
+        let pk = SpxPublicKey::from(&sk);
+
+        Ok(KeyInfo {
+            hash: "".into(),
+            algorithm: pk.algorithm().to_string(),
+            domain: None,
+            public_key: pk.as_bytes().to_vec(),
+            private_blob: Vec::new(),
+        })
+    }
+
+    /// Generate a key pair.
+    fn generate_key(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        _domain: SpxDomain,
+        _token: &str,
+        flags: GenerateFlags,
+    ) -> Result<KeyEntry> {
+        let mut search = AttributeMap::default();
+        search.insert(AttributeType::Label, AttrData::Str(alias.into()));
+        let ef = ElementaryFile::find(&self.session, search)?;
+        if flags.contains(GenerateFlags::OVERWRITE) {
+            if ef.len() <= 1 {
+                // delete files
+            } else {
+                return Err(HsmError::TooManyObjects(ef.len(), alias.into()).into());
+            }
+        } else if !ef.is_empty() {
+            return Err(HsmError::ObjectExists("<none>".into(), alias.into()).into());
+        }
+
+        let (sk, _) = SpxSecretKey::new_keypair(SphincsPlus::from_str(algorithm)?)?;
+        let app = format!("{}:{}", Self::APPLICATION, sk.algorithm());
+        let skf = ElementaryFile::new(alias.into())
+            .application(app)
+            .private(true);
+        let encoded = Zeroizing::new(sk.to_pem()?);
+        skf.write(&self.session, encoded.as_bytes())?;
+
+        let private_key = if flags.contains(GenerateFlags::EXPORT_PRIVATE) {
+            sk.as_bytes().to_vec()
+        } else {
+            Vec::new()
+        };
+
+        Ok(KeyEntry {
+            alias: alias.into(),
+            hash: Some("".into()),
+            algorithm: sk.algorithm().to_string(),
+            domain: None,
+            private_blob: Vec::new(),
+            private_key,
+        })
+    }
+
+    /// Import a key pair.
+    fn import_keypair(
+        &self,
+        alias: &str,
+        algorithm: &str,
+        _domain: SpxDomain,
+        _token: &str,
+        overwrite: bool,
+        public_key: &[u8],
+        private_key: &[u8],
+    ) -> Result<KeyEntry> {
+        let mut search = AttributeMap::default();
+        search.insert(AttributeType::Label, AttrData::Str(alias.into()));
+        let ef = ElementaryFile::find(&self.session, search)?;
+        if overwrite {
+            if ef.len() <= 1 {
+                // delete files
+            } else {
+                return Err(HsmError::TooManyObjects(ef.len(), alias.into()).into());
+            }
+        } else if !ef.is_empty() {
+            return Err(HsmError::ObjectExists("<none>".into(), alias.into()).into());
+        }
+
+        let sk = SpxSecretKey::from_bytes(SphincsPlus::from_str(algorithm)?, private_key)?;
+        let pk = SpxPublicKey::from(&sk);
+        if public_key != pk.as_bytes() {
+            return Err(HsmError::KeyError("secret/public key mismatch".into()).into());
+        }
+        let app = format!("{}:{}", Self::APPLICATION, sk.algorithm());
+        let skf = ElementaryFile::new(alias.into())
+            .application(app)
+            .private(true);
+        let encoded = Zeroizing::new(sk.to_pem()?);
+        skf.write(&self.session, encoded.as_bytes())?;
+
+        Ok(KeyEntry {
+            alias: alias.into(),
+            hash: None,
+            algorithm: sk.algorithm().to_string(),
+            domain: None,
+            private_blob: Vec::new(),
+            private_key: Vec::new(),
+        })
+    }
+
+    /// Sign a message.
+    fn sign(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+    ) -> Result<Vec<u8>> {
+        let alias = alias.ok_or(HsmError::NoSearchCriteria)?;
+        if key_hash.is_some() {
+            log::warn!("ignored key_hash {key_hash:?}");
+        }
+        let sk = self.load_key(alias)?;
+        Ok(sk.sign(domain, message)?)
+    }
+
+    /// Verify a message.
+    fn verify(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+        signature: &[u8],
+    ) -> Result<bool> {
+        let alias = alias.ok_or(HsmError::NoSearchCriteria)?;
+        if key_hash.is_some() {
+            log::warn!("ignored key_hash {key_hash:?}");
+        }
+        let sk = self.load_key(alias)?;
+        let pk = SpxPublicKey::from(&sk);
+        match pk.verify(domain, signature, message) {
+            Ok(()) => Ok(true),
+            Err(SpxError::BadSignature) => Ok(false),
+            Err(e) => Err(e.into()),
+        }
+    }
+}
diff --git a/sw/host/hsmtool/src/extra/spxkms.rs b/sw/host/hsmtool/src/extra/spxkms.rs
new file mode 100644
index 0000000000000..c7465edfb85d9
--- /dev/null
+++ b/sw/host/hsmtool/src/extra/spxkms.rs
@@ -0,0 +1,432 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use acorn::{GenerateFlags, KeyEntry, KeyInfo, SpxInterface};
+use anyhow::{Context, Result, anyhow};
+use base64ct::{Base64, Encoding};
+use indexmap::IndexMap;
+use serde::{Deserialize, Serialize, de::DeserializeOwned};
+use serde_json::Value;
+use sphincsplus::{SphincsPlus, SpxDomain, SpxPublicKey};
+use std::process::Command;
+use std::str::FromStr;
+use thiserror::Error;
+use zeroize::Zeroizing;
+
+use reqwest::blocking::Client;
+use reqwest::{IntoUrl, Url};
+
+use crate::error::HsmError;
+
+/// SpxEf implements SPHINCS+ signing via Google CloudKms.
+pub struct SpxKms {
+    keyring: Url,
+    project: String,
+    auth: Zeroizing<String>,
+}
+
+/// ApiError represents an error result from the cloud API.
+#[derive(Deserialize, Debug, Error)]
+#[error("api error: code={code} message={message:?}; details={details:?}")]
+#[serde(rename_all = "camelCase")]
+pub struct ApiError {
+    pub code: u32,
+    pub message: String,
+    pub status: String,
+    #[serde(flatten)]
+    pub details: IndexMap<String, Value>,
+}
+
+// CloudResult assists in deserializing the cloud API return into an error
+// or a specific type.
+#[derive(Deserialize, Debug)]
+enum CloudResult<T> {
+    #[serde(rename = "error")]
+    Error(ApiError),
+    #[serde(untagged)]
+    Ok(T),
+}
+
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsKeyList {
+    crypto_keys: Vec<KmsKeyRef>,
+}
+
+// Note: dead_code is allowed because some of the fields defined in this struct
+// are not used, but are fields returned by the KMS json API.
+#[allow(dead_code)]
+#[derive(Serialize, Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct VersionTemplate {
+    #[serde(default)]
+    protection_level: String,
+    #[serde(default)]
+    algorithm: String,
+}
+
+#[derive(Serialize, Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsCreateKey {
+    purpose: String,
+    version_template: VersionTemplate,
+}
+
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsKeyRef {
+    name: String,
+    version_template: VersionTemplate,
+}
+
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsKeyVersion {
+    name: String,
+    state: String,
+    #[serde(default)]
+    algorithm: String,
+}
+
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsKeyVersions {
+    crypto_key_versions: Vec<KmsKeyVersion>,
+}
+
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsPublicKeyData {
+    data: String,
+}
+
+// Note: dead_code is allowed because some of the fields defined in this struct
+// are not used, but are fields returned by the KMS json API.
+#[allow(dead_code)]
+#[derive(Deserialize, Debug, Clone)]
+#[serde(rename_all = "camelCase")]
+struct KmsPublicKey {
+    algorithm: String,
+    name: String,
+    #[serde(default)]
+    protection_level: String,
+    #[serde(default)]
+    public_key_format: String,
+    pem: Option<String>,
+    public_key: Option<KmsPublicKeyData>,
+}
+
+#[derive(Serialize, Debug)]
+struct KmsDigest {
+    sha256: String,
+}
+
+#[derive(Serialize, Debug, Default)]
+struct KmsSignRequest {
+    #[serde(skip_serializing_if = "Option::is_none")]
+    digest: Option<KmsDigest>,
+    #[serde(skip_serializing_if = "Option::is_none")]
+    data: Option<String>,
+}
+
+impl SpxKms {
+    const PURE_ALGORITHM: &'static str = "PQ_SIGN_SLH_DSA_SHA2_128S";
+    const PREHASH_ALGORITHM: &'static str = "PQ_SIGN_HASH_SLH_DSA_SHA2_128S_SHA256";
+
+    pub fn new(parameters: &str) -> Result<Box<Self>> {
+        let output = Command::new("gcloud")
+            .args(["auth", "print-access-token"])
+            .output()?;
+        if output.status.success() {
+            // Get the authorization token and strip trailing newlines.
+            let mut auth = String::from_utf8(output.stdout)?;
+            let len = auth.trim_end().len();
+            auth.truncate(len);
+
+            let mut params = IndexMap::new();
+            params.extend(parameters.split(':').map(|p| {
+                p.split_once('=')
+                    .expect("KMS parameters should be key=value")
+            }));
+
+            let project = params.get("project").ok_or(HsmError::Unsupported(
+                "KMS requires a project parameter".into(),
+            ))?;
+            let location = params.get("location").ok_or(HsmError::Unsupported(
+                "KMS requires a location parameter".into(),
+            ))?;
+            let keyring = params.get("keyring").ok_or(HsmError::Unsupported(
+                "KMS requires a keyring parameter".into(),
+            ))?;
+            let url = format!(
+                "https://cloudkms.googleapis.com/v1/projects/{project}/locations/{location}/keyRings/{keyring}/"
+            );
+            log::info!("keyring url: {url}");
+            Ok(Box::new(Self {
+                keyring: Url::parse(&url)?,
+                project: project.to_string(),
+                auth: auth.into(),
+            }))
+        } else {
+            let stderr = String::from_utf8_lossy(&output.stderr);
+            Err(anyhow!("gcloud error {:?}: {}", output.status, stderr))
+        }
+    }
+
+    fn kms_to_algorithm(kms_algo: &str) -> Result<String> {
+        match kms_algo {
+            Self::PURE_ALGORITHM | Self::PREHASH_ALGORITHM => Ok("SLH-DSA-SHA2-128S".into()),
+            _ => Err(HsmError::Unsupported(format!("algorithm {kms_algo}")).into()),
+        }
+    }
+
+    fn kms_to_domain(kms_algo: &str) -> Result<SpxDomain> {
+        match kms_algo {
+            Self::PURE_ALGORITHM => Ok(SpxDomain::Pure),
+            Self::PREHASH_ALGORITHM => Ok(SpxDomain::PreHashedSha256),
+            _ => Err(HsmError::Unsupported(format!("algorithm {kms_algo}")).into()),
+        }
+    }
+
+    fn get<RSP: DeserializeOwned>(&self, url: impl IntoUrl) -> Result<RSP> {
+        let client = Client::new();
+        log::debug!("GET {}", url.as_str());
+        let resp = client
+            .get(url)
+            .bearer_auth(&*self.auth)
+            .header("content-type", "application/json")
+            .header("X-Goog-User-Project", &self.project)
+            .send()?;
+        let data = resp.text()?;
+        log::debug!("data: {data}");
+        match serde_json::from_str::<CloudResult<RSP>>(&data)? {
+            CloudResult::Error(e) => Err(e.into()),
+            CloudResult::Ok(v) => Ok(v),
+        }
+    }
+
+    fn post<RSP: DeserializeOwned>(&self, url: impl IntoUrl, req: &impl Serialize) -> Result<RSP> {
+        let client = Client::new();
+        log::debug!("POST {}", url.as_str());
+        let resp = client
+            .post(url)
+            .bearer_auth(&*self.auth)
+            .header("content-type", "application/json")
+            .header("X-Goog-User-Project", &self.project)
+            .json(req)
+            .send()?;
+        let data = resp.text()?;
+        log::debug!("data: {data}");
+        match serde_json::from_str::<CloudResult<RSP>>(&data)? {
+            CloudResult::Error(e) => Err(e.into()),
+            CloudResult::Ok(v) => Ok(v),
+        }
+    }
+
+    fn get_key_version(&self, alias: &str) -> Result<KmsKeyVersion> {
+        let url = self
+            .keyring
+            .join(&format!("cryptoKeys/{alias}/cryptoKeyVersions"))?;
+        let versions = self.get::<KmsKeyVersions>(url)?;
+        match versions
+            .crypto_key_versions
+            .iter()
+            .filter(|v| v.state == "ENABLED" && Self::kms_to_algorithm(&v.algorithm).is_ok())
+            .last()
+        {
+            Some(key) => Ok(key.clone()),
+            None => Err(HsmError::ObjectNotFound(alias.into()).into()),
+        }
+    }
+
+    fn get_public_key(&self, alias: &str) -> Result<KmsPublicKey> {
+        let key = self.get_key_version(alias)?;
+        let mut url = self.keyring.join(&format!("/v1/{}/publicKey", key.name))?;
+        url.set_query(Some("public_key_format=NIST_PQC"));
+        self.get(url)
+    }
+}
+
+impl SpxInterface for SpxKms {
+    /// Get the version of the backend.
+    fn get_version(&self) -> Result<String> {
+        Ok(String::from("CloudKMS 0.0.1"))
+    }
+
+    /// List keys known to the backend.
+    fn list_keys(&self) -> Result<Vec<KeyEntry>> {
+        let keys = self.keyring.join("cryptoKeys")?;
+        let keys = self.get::<KmsKeyList>(keys)?;
+        let mut result = Vec::new();
+
+        for k in keys.crypto_keys.iter() {
+            let (_, name) = k
+                .name
+                .rsplit_once('/')
+                .ok_or_else(|| HsmError::ParseError("could not parse key name".into()))
+                .with_context(|| format!("key name {:?}", k.name))?;
+            if Self::kms_to_algorithm(&k.version_template.algorithm).is_err() {
+                continue;
+            }
+            let key = self.get_key_version(name)?;
+            result.push(KeyEntry {
+                alias: name.into(),
+                hash: None,
+                algorithm: Self::kms_to_algorithm(&key.algorithm)?,
+                domain: Some(Self::kms_to_domain(&key.algorithm)?),
+                ..Default::default()
+            });
+        }
+        Ok(result)
+    }
+
+    /// Get the public key info.
+    fn get_key_info(&self, alias: &str) -> Result<KeyInfo> {
+        let key = self.get_public_key(alias)?;
+        let data = if let Some(pem) = &key.pem {
+            pem.as_str()
+        } else if let Some(public_key) = &key.public_key {
+            public_key.data.as_str()
+        } else {
+            return Err(HsmError::Unsupported("did not find public key material".into()).into());
+        };
+        Ok(KeyInfo {
+            hash: "".into(),
+            algorithm: Self::kms_to_algorithm(&key.algorithm)?,
+            domain: Some(Self::kms_to_domain(&key.algorithm)?),
+            public_key: Base64::decode_vec(data)?,
+            private_blob: Vec::new(),
+        })
+    }
+
+    /// Generate a key pair.
+    fn generate_key(
+        &self,
+        alias: &str,
+        _algorithm: &str,
+        domain: SpxDomain,
+        _token: &str,
+        flags: GenerateFlags,
+    ) -> Result<KeyEntry> {
+        if flags.contains(GenerateFlags::EXPORT_PRIVATE) {
+            return Err(HsmError::Unsupported("export of private key material".into()).into());
+        }
+        let algorithm = match domain {
+            SpxDomain::Pure => Self::PURE_ALGORITHM,
+            SpxDomain::PreHashedSha256 => Self::PREHASH_ALGORITHM,
+            _ => return Err(HsmError::Unsupported(format!("domain {domain}")).into()),
+        };
+        let url = self
+            .keyring
+            .join(&format!("cryptoKeys?crypto_key_id={alias}"))?;
+        let template = KmsCreateKey {
+            purpose: "ASYMMETRIC_SIGN".into(),
+            version_template: VersionTemplate {
+                algorithm: algorithm.into(),
+                protection_level: "SOFTWARE".into(),
+            },
+        };
+        let resp = self.post::<KmsKeyRef>(url, &template)?;
+        Ok(KeyEntry {
+            alias: alias.into(),
+            algorithm: Self::kms_to_algorithm(&resp.version_template.algorithm)?,
+            domain: Some(Self::kms_to_domain(&resp.version_template.algorithm)?),
+            ..Default::default()
+        })
+    }
+
+    /// Import a key pair.
+    fn import_keypair(
+        &self,
+        _alias: &str,
+        _algorithm: &str,
+        _domain: SpxDomain,
+        _token: &str,
+        _overwrite: bool,
+        _public_key: &[u8],
+        _private_key: &[u8],
+    ) -> Result<KeyEntry> {
+        Err(HsmError::Unsupported(format!(
+            "key import is not supported by {}",
+            self.get_version()?
+        ))
+        .into())
+    }
+
+    /// Sign a message.
+    fn sign(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+    ) -> Result<Vec<u8>> {
+        let alias = alias.ok_or(HsmError::NoSearchCriteria)?;
+        if key_hash.is_some() {
+            log::warn!("ignored key_hash {key_hash:?}");
+        }
+        let key = self.get_key_version(alias)?;
+        let keydomain = Self::kms_to_domain(&key.algorithm)?;
+        if domain != keydomain {
+            return Err(HsmError::Unsupported(format!(
+                "domain {domain} not supported by key {alias}",
+            ))
+            .into());
+        }
+
+        let url = self
+            .keyring
+            .join(&format!("/v1/{}:asymmetricSign", key.name))?;
+
+        // Format the signing request:
+        // - For the "pure" domain, we place the message in the `data` field.
+        // - For the "prehashed" domain, we place the digest into the `digest` field.
+        let req = match keydomain {
+            SpxDomain::Pure => KmsSignRequest {
+                data: Some(Base64::encode_string(message)),
+                ..Default::default()
+            },
+            SpxDomain::PreHashedSha256 => KmsSignRequest {
+                digest: Some(KmsDigest {
+                    sha256: Base64::encode_string(message),
+                }),
+                ..Default::default()
+            },
+            _ => unreachable!(),
+        };
+
+        let resp = self.post::<IndexMap<String, String>>(url, &req)?;
+        let signature = Base64::decode_vec(&resp["signature"])?;
+        Ok(signature)
+    }
+
+    /// Verify a message.
+    fn verify(
+        &self,
+        alias: Option<&str>,
+        key_hash: Option<&str>,
+        domain: SpxDomain,
+        message: &[u8],
+        signature: &[u8],
+    ) -> Result<bool> {
+        let alias = alias.ok_or(HsmError::NoSearchCriteria)?;
+        if key_hash.is_some() {
+            log::warn!("ignored key_hash {key_hash:?}");
+        }
+        let info = self.get_key_info(alias)?;
+        let keydomain = info.domain.expect("kms key domain");
+        if domain != keydomain {
+            return Err(HsmError::Unsupported(format!(
+                "domain {domain} not supported by key {alias}",
+            ))
+            .into());
+        }
+        let pk =
+            SpxPublicKey::from_bytes(SphincsPlus::from_str(&info.algorithm)?, &info.public_key)?;
+        match pk.verify(domain, signature, message) {
+            Ok(_) => Ok(true),
+            Err(_) => Ok(false),
+        }
+    }
+}
diff --git a/sw/host/hsmtool/src/hsmtool.rs b/sw/host/hsmtool/src/hsmtool.rs
index eb22b949c33d1..0b31abfb93ad0 100644
--- a/sw/host/hsmtool/src/hsmtool.rs
+++ b/sw/host/hsmtool/src/hsmtool.rs
@@ -2,15 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#![feature(min_specialization)]
-use anyhow::{anyhow, Context, Result};
+use anyhow::{Context, Result, anyhow};
 use clap::Parser;
 use cryptoki::session::UserType;
 use log::LevelFilter;
 use std::path::PathBuf;
 
-use hsmtool::commands::{print_command, print_result, Commands, Dispatch, Format};
-use hsmtool::module::{self, Module};
+use hsmtool::commands::{Commands, Dispatch, Format, print_command, print_result};
+use hsmtool::module::{self, Module, SpxModule};
 use hsmtool::profile::Profile;
 use hsmtool::util::attribute::AttributeMap;
 
@@ -47,6 +46,9 @@ struct Args {
     #[arg(long, env = "HSMTOOL_MODULE")]
     module: String,
 
+    #[arg(long, env = "HSMTOOL_SPX_MODULE", help=SpxModule::HELP)]
+    spx_module: Option<SpxModule>,
+
     /// HSM Token to use.
     #[arg(short, long, env = "HSMTOOL_TOKEN")]
     token: Option<String>,
@@ -79,7 +81,9 @@ fn main() -> Result<()> {
         .as_ref()
         .map(hsmtool::util::helper::lockfile)
         .transpose()?;
-    let hsm = Module::initialize(&args.module).context(
+
+    // Initialize the HSM module interface.
+    let mut hsm = Module::initialize(&args.module).context(
         "Loading the PKCS11 module usually depends on several environent variables.  Check HSMTOOL_MODULE, SOFTHSM2_CONF or your HSM's documentation.")?;
 
     // Initialize the list of all valid attribute types early.  Disable logging
@@ -93,18 +97,19 @@ fn main() -> Result<()> {
         return print_command(args.format, args.color, args.command.leaf());
     }
 
-    let session = if let Some(profile) = &args.profile {
+    if let Some(profile) = &args.profile {
         let profiles = Profile::load(&args.profiles)?;
         let profile = profiles
             .get(profile)
             .ok_or_else(|| anyhow!("Profile {profile:?} not found."))?;
-        Some(hsm.connect(&profile.token, Some(profile.user), profile.pin.as_deref())?)
+        hsm.connect(&profile.token, Some(profile.user), profile.pin.as_deref())?;
     } else if let Some(token) = &args.token {
-        Some(hsm.connect(token, args.user, args.pin.as_deref())?)
-    } else {
-        None
-    };
+        hsm.connect(token, args.user, args.pin.as_deref())?;
+    }
+    if let Some(spx_module) = &args.spx_module {
+        hsm.initialize_spx(spx_module)?;
+    }
 
-    let result = args.command.run(&(), &hsm, session.as_ref());
+    let result = args.command.run(&(), &hsm, hsm.get_session());
     print_result(args.format, args.color, args.quiet, result)
 }
diff --git a/sw/host/hsmtool/src/lib.rs b/sw/host/hsmtool/src/lib.rs
index ff0134171ffac..37608b9a68bd8 100644
--- a/sw/host/hsmtool/src/lib.rs
+++ b/sw/host/hsmtool/src/lib.rs
@@ -2,9 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#![feature(min_specialization)]
 pub mod commands;
 pub mod error;
+pub mod extra;
 pub mod module;
 pub mod profile;
 pub mod util;
diff --git a/sw/host/hsmtool/src/module.rs b/sw/host/hsmtool/src/module.rs
index 0c58eaa13ddcb..6f1711d0da512 100644
--- a/sw/host/hsmtool/src/module.rs
+++ b/sw/host/hsmtool/src/module.rs
@@ -10,18 +10,77 @@ use cryptoki::session::UserType;
 use cryptoki::slot::Slot;
 use cryptoki::types::AuthPin;
 use serde::de::{Deserialize, Deserializer};
+use std::rc::Rc;
+use std::str::FromStr;
 
 use crate::error::HsmError;
+use crate::extra::{SpxEf, SpxKms};
+use acorn::{Acorn, SpxInterface};
+
+#[derive(Debug, Clone)]
+pub enum SpxModule {
+    Acorn(String),
+    Pkcs11Ef,
+    CloudKms(String),
+}
+
+impl SpxModule {
+    pub const HELP: &'static str = "Type of sphincs+ module [allowed values: acorn:<libpath>, cloud-kms:<keyring-params>, pkcs11-ef]";
+}
+
+impl FromStr for SpxModule {
+    type Err = HsmError;
+    fn from_str(s: &str) -> Result<Self, Self::Err> {
+        if s[..6].eq_ignore_ascii_case("acorn:") {
+            Ok(SpxModule::Acorn(s[6..].into()))
+        } else if s.eq_ignore_ascii_case("pkcs11-ef") {
+            Ok(SpxModule::Pkcs11Ef)
+        } else if s[..10].eq_ignore_ascii_case("cloud-kms:") {
+            Ok(SpxModule::CloudKms(s[10..].into()))
+        } else {
+            Err(HsmError::ParseError(format!("unknown SpxModule {s:?}")))
+        }
+    }
+}
 
 pub struct Module {
     pub pkcs11: Pkcs11,
+    pub session: Option<Rc<Session>>,
+    pub spx: Option<Box<dyn SpxInterface>>,
+    pub token: Option<String>,
 }
 
 impl Module {
     pub fn initialize(module: &str) -> Result<Self> {
         let pkcs11 = Pkcs11::new(module)?;
         pkcs11.initialize(CInitializeArgs::OsThreads)?;
-        Ok(Module { pkcs11 })
+        Ok(Module {
+            pkcs11,
+            session: None,
+            spx: None,
+            token: None,
+        })
+    }
+
+    pub fn initialize_spx(&mut self, module: &SpxModule) -> Result<()> {
+        let module = match module {
+            SpxModule::Acorn(libpath) => Acorn::new(libpath)? as Box<dyn SpxInterface>,
+            SpxModule::CloudKms(keyring) => SpxKms::new(keyring)? as Box<dyn SpxInterface>,
+            SpxModule::Pkcs11Ef => {
+                let session = self
+                    .session
+                    .as_ref()
+                    .map(Rc::clone)
+                    .ok_or(HsmError::SessionRequired)?;
+                SpxEf::new(session) as Box<dyn SpxInterface>
+            }
+        };
+        self.spx = Some(module);
+        Ok(())
+    }
+
+    pub fn get_session(&self) -> Option<&Session> {
+        self.session.as_ref().map(Rc::as_ref)
     }
 
     pub fn get_token(&self, label: &str) -> Result<Slot> {
@@ -36,11 +95,11 @@ impl Module {
     }
 
     pub fn connect(
-        &self,
+        &mut self,
         token: &str,
         user: Option<UserType>,
         pin: Option<&str>,
-    ) -> Result<Session> {
+    ) -> Result<()> {
         let slot = self.get_token(token)?;
         let session = self.pkcs11.open_rw_session(slot)?;
         if let Some(user) = user {
@@ -49,7 +108,9 @@ impl Module {
                 .login(user, pin.as_ref())
                 .context("Failed HSM Login")?;
         }
-        Ok(session)
+        self.token = Some(token.into());
+        self.session = Some(Rc::new(session));
+        Ok(())
     }
 }
 
diff --git a/sw/host/hsmtool/src/util/attribute/attr.rs b/sw/host/hsmtool/src/util/attribute/attr.rs
index a479e33b3923f..e272084b14fd6 100644
--- a/sw/host/hsmtool/src/util/attribute/attr.rs
+++ b/sw/host/hsmtool/src/util/attribute/attr.rs
@@ -258,6 +258,24 @@ impl AttributeMap {
             .as_slice()
     }
 
+    /// Generates a list of sensitive attributes that should be redacted when
+    /// exporting an object. This list is used to prevent sensitive data from
+    /// being accidentally read. Some HSMs will not mark theses attributes as
+    /// sensitive, so we have to do it manually.
+    pub fn sensitive_attrs() -> &'static [cryptoki::object::AttributeType] {
+        &[
+            // For symmetric and EC private keys.
+            cryptoki::object::AttributeType::Value,
+            // For RSA private keys.
+            cryptoki::object::AttributeType::PrivateExponent,
+            cryptoki::object::AttributeType::Prime1,
+            cryptoki::object::AttributeType::Prime2,
+            cryptoki::object::AttributeType::Exponent1,
+            cryptoki::object::AttributeType::Exponent2,
+            cryptoki::object::AttributeType::Coefficient,
+        ]
+    }
+
     /// Inserts a `key`/`value` pair into the mapping, returing the
     /// previous value (if any).
     pub fn insert(&mut self, key: AttributeType, value: AttrData) -> Option<AttrData> {
@@ -297,20 +315,57 @@ impl AttributeMap {
     /// Retrieves an object from the PKCS#11 interface as an `AttributeMap`.
     pub fn from_object(session: &Session, object: ObjectHandle) -> Result<Self> {
         let all = Self::all();
+        let sensitive_attrs = Self::sensitive_attrs();
         let info = session.get_attribute_info(object, all)?;
         let mut atypes = Vec::new();
+        let mut sensitive_types = Vec::new();
         for (&a, i) in all.iter().zip(info.iter()) {
             // Skip the AllowedMechanism as cloud-kms returns a list of
             // mechanisms that aren't understood by cryptoki's MechanismType.
             if a == cryptoki::object::AttributeType::AllowedMechanisms {
                 continue;
             }
+
+            // Skip sensitive attributes. We first have to check if the object
+            // is sensitive before being able to load it. Some Luna HSM
+            // versions will return an error if we attempt to read a sensitive
+            // attribute.
+            if sensitive_attrs.contains(&a) {
+                sensitive_types.push(a);
+                continue;
+            }
+
             if matches!(i, AttributeInfo::Available(_)) {
                 atypes.push(a);
             }
         }
+
         let attrs = session.get_attributes(object, &atypes)?;
         let mut map = AttributeMap::from(attrs.as_slice());
+
+        let sensitive = map.get(&AttributeType::Sensitive);
+        let object_sensitive = matches!(sensitive, Some(AttrData::Bool(true)));
+
+        // Use a functional iteration to query the sensitive attributes. This
+        // is necessary because some HSMs will not allow reading sensitive
+        // attributes. In this case, we have to redact the attribute.
+        sensitive_types.iter().for_each(|&attr| {
+            if object_sensitive {
+                map.insert(
+                    AttributeType::Value,
+                    AttrData::Redacted(Redacted::RedactedByHsm),
+                );
+            } else if let Ok(attrs) = session.get_attributes(object, &[attr]) {
+                if let Some(attr_obj) = attrs.into_iter().next() {
+                    if let Ok((ty, val)) = into_kv(&attr_obj) {
+                        map.insert(ty, val);
+                    }
+                }
+            }
+        });
+
+        // Finally, regardles of the above, if any attribute info explicitly marks
+        // an attribute as sensitive, redact it.
         for (&a, i) in all.iter().zip(info.iter()) {
             if matches!(i, AttributeInfo::Sensitive) {
                 map.insert(a.into(), AttrData::Redacted(Redacted::RedactedByHsm));
@@ -400,7 +455,10 @@ mod tests {
         // Currently, the best way to check that the attributes have the
         // expected values is to check the output of the Debug trait.
         let result = format!("{:x?}", a);
-        assert_eq!(result, "[Copyable(true), ModulusBits(Ulong { val: c00 }), Label([66, 6f, 6f]), ObjectId([12, 34, 56, 78]), CertificateType(CertificateType { val: 0 }), Class(ObjectClass { val: 1 }), KeyType(KeyType { val: 0 }), KeyGenMechanism(MechanismType { val: 1 }), AllowedMechanisms([MechanismType { val: 1 }, MechanismType { val: 0 }]), StartDate(Date { date: _CK_DATE { year: [32, 30, 32, 33], month: [30, 32], day: [31, 35] } })]");
+        assert_eq!(
+            result,
+            "[Copyable(true), ModulusBits(Ulong { val: c00 }), Label([66, 6f, 6f]), ObjectId([12, 34, 56, 78]), CertificateType(CertificateType { val: 0 }), Class(ObjectClass { val: 1 }), KeyType(KeyType { val: 0 }), KeyGenMechanism(MechanismType { val: 1 }), AllowedMechanisms([MechanismType { val: 1 }, MechanismType { val: 0 }]), StartDate(Date { date: CK_DATE { year: [32, 30, 32, 33], month: [30, 32], day: [31, 35] } })]"
+        );
         Ok(())
     }
 }
diff --git a/sw/host/hsmtool/src/util/attribute/attribute_type.rs b/sw/host/hsmtool/src/util/attribute/attribute_type.rs
index b1cfce5619f2f..a097d32bc5f96 100644
--- a/sw/host/hsmtool/src/util/attribute/attribute_type.rs
+++ b/sw/host/hsmtool/src/util/attribute/attribute_type.rs
@@ -42,6 +42,13 @@ pub enum AttributeType {
     #[serde(rename = "CKA_LABEL")]
     #[strum(serialize = "CKA_LABEL", serialize = "Label", serialize = "label")]
     Label = CKA_LABEL,
+    #[serde(rename = "CKA_UNIQUE_ID")]
+    #[strum(
+        serialize = "CKA_UNIQUE_ID",
+        serialize = "UniqueId",
+        serialize = "unique_id"
+    )]
+    UniqueId = CKA_UNIQUE_ID,
     #[serde(rename = "CKA_APPLICATION")]
     #[strum(
         serialize = "CKA_APPLICATION",
@@ -395,20 +402,6 @@ pub enum AttributeType {
         serialize = "ec_point"
     )]
     EcPoint = CKA_EC_POINT,
-    #[serde(rename = "CKA_SECONDARY_AUTH")]
-    #[strum(
-        serialize = "CKA_SECONDARY_AUTH",
-        serialize = "SecondaryAuth",
-        serialize = "secondary_auth"
-    )]
-    SecondaryAuth = CKA_SECONDARY_AUTH,
-    #[serde(rename = "CKA_AUTH_PIN_FLAGS")]
-    #[strum(
-        serialize = "CKA_AUTH_PIN_FLAGS",
-        serialize = "AuthPinFlags",
-        serialize = "auth_pin_flags"
-    )]
-    AuthPinFlags = CKA_AUTH_PIN_FLAGS,
     #[serde(rename = "CKA_ALWAYS_AUTHENTICATE")]
     #[strum(
         serialize = "CKA_ALWAYS_AUTHENTICATE",
@@ -479,6 +472,20 @@ pub enum AttributeType {
         serialize = "otp_pin_requirement"
     )]
     OtpPinRequirement = CKA_OTP_PIN_REQUIREMENT,
+    #[serde(rename = "CKA_OTP_COUNTER")]
+    #[strum(
+        serialize = "CKA_OTP_COUNTER",
+        serialize = "OtpCounter",
+        serialize = "otp_counter"
+    )]
+    OtpCounter = CKA_OTP_COUNTER,
+    #[serde(rename = "CKA_OTP_TIME")]
+    #[strum(
+        serialize = "CKA_OTP_TIME",
+        serialize = "OtpTime",
+        serialize = "otp_time"
+    )]
+    OtpTime = CKA_OTP_TIME,
     #[serde(rename = "CKA_OTP_USER_IDENTIFIER")]
     #[strum(
         serialize = "CKA_OTP_USER_IDENTIFIER",
@@ -507,20 +514,6 @@ pub enum AttributeType {
         serialize = "otp_service_logo_type"
     )]
     OtpServiceLogoType = CKA_OTP_SERVICE_LOGO_TYPE,
-    #[serde(rename = "CKA_OTP_COUNTER")]
-    #[strum(
-        serialize = "CKA_OTP_COUNTER",
-        serialize = "OtpCounter",
-        serialize = "otp_counter"
-    )]
-    OtpCounter = CKA_OTP_COUNTER,
-    #[serde(rename = "CKA_OTP_TIME")]
-    #[strum(
-        serialize = "CKA_OTP_TIME",
-        serialize = "OtpTime",
-        serialize = "otp_time"
-    )]
-    OtpTime = CKA_OTP_TIME,
     #[serde(rename = "CKA_GOSTR3410_PARAMS")]
     #[strum(
         serialize = "CKA_GOSTR3410_PARAMS",
@@ -649,6 +642,139 @@ pub enum AttributeType {
         serialize = "supported_cms_attributes"
     )]
     SupportedCmsAttributes = CKA_SUPPORTED_CMS_ATTRIBUTES,
+    #[serde(rename = "CKA_PROFILE_ID")]
+    #[strum(
+        serialize = "CKA_PROFILE_ID",
+        serialize = "ProfileId",
+        serialize = "profile_id"
+    )]
+    ProfileId = CKA_PROFILE_ID,
+    #[serde(rename = "CKA_X2RATCHET_BAG")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_BAG",
+        serialize = "X2ratchetBag",
+        serialize = "x2ratchet_bag"
+    )]
+    X2ratchetBag = CKA_X2RATCHET_BAG,
+    #[serde(rename = "CKA_X2RATCHET_BAGSIZE")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_BAGSIZE",
+        serialize = "X2ratchetBagsize",
+        serialize = "x2ratchet_bagsize"
+    )]
+    X2ratchetBagsize = CKA_X2RATCHET_BAGSIZE,
+    #[serde(rename = "CKA_X2RATCHET_BOBS1STMSG")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_BOBS1STMSG",
+        serialize = "X2ratchetBobs1stmsg",
+        serialize = "x2ratchet_bobs1stmsg"
+    )]
+    X2ratchetBobs1stmsg = CKA_X2RATCHET_BOBS1STMSG,
+    #[serde(rename = "CKA_X2RATCHET_CKR")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_CKR",
+        serialize = "X2ratchetCkr",
+        serialize = "x2ratchet_ckr"
+    )]
+    X2ratchetCkr = CKA_X2RATCHET_CKR,
+    #[serde(rename = "CKA_X2RATCHET_CKS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_CKS",
+        serialize = "X2ratchetCks",
+        serialize = "x2ratchet_cks"
+    )]
+    X2ratchetCks = CKA_X2RATCHET_CKS,
+    #[serde(rename = "CKA_X2RATCHET_DHP")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_DHP",
+        serialize = "X2ratchetDhp",
+        serialize = "x2ratchet_dhp"
+    )]
+    X2ratchetDhp = CKA_X2RATCHET_DHP,
+    #[serde(rename = "CKA_X2RATCHET_DHR")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_DHR",
+        serialize = "X2ratchetDhr",
+        serialize = "x2ratchet_dhr"
+    )]
+    X2ratchetDhr = CKA_X2RATCHET_DHR,
+    #[serde(rename = "CKA_X2RATCHET_DHS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_DHS",
+        serialize = "X2ratchetDhs",
+        serialize = "x2ratchet_dhs"
+    )]
+    X2ratchetDhs = CKA_X2RATCHET_DHS,
+    #[serde(rename = "CKA_X2RATCHET_HKR")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_HKR",
+        serialize = "X2ratchetHkr",
+        serialize = "x2ratchet_hkr"
+    )]
+    X2ratchetHkr = CKA_X2RATCHET_HKR,
+    #[serde(rename = "CKA_X2RATCHET_HKS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_HKS",
+        serialize = "X2ratchetHks",
+        serialize = "x2ratchet_hks"
+    )]
+    X2ratchetHks = CKA_X2RATCHET_HKS,
+    #[serde(rename = "CKA_X2RATCHET_ISALICE")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_ISALICE",
+        serialize = "X2ratchetIsalice",
+        serialize = "x2ratchet_isalice"
+    )]
+    X2ratchetIsalice = CKA_X2RATCHET_ISALICE,
+    #[serde(rename = "CKA_X2RATCHET_NHKR")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_NHKR",
+        serialize = "X2ratchetNhkr",
+        serialize = "x2ratchet_nhkr"
+    )]
+    X2ratchetNhkr = CKA_X2RATCHET_NHKR,
+    #[serde(rename = "CKA_X2RATCHET_NHKS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_NHKS",
+        serialize = "X2ratchetNhks",
+        serialize = "x2ratchet_nhks"
+    )]
+    X2ratchetNhks = CKA_X2RATCHET_NHKS,
+    #[serde(rename = "CKA_X2RATCHET_NR")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_NR",
+        serialize = "X2ratchetNr",
+        serialize = "x2ratchet_nr"
+    )]
+    X2ratchetNr = CKA_X2RATCHET_NR,
+    #[serde(rename = "CKA_X2RATCHET_NS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_NS",
+        serialize = "X2ratchetNs",
+        serialize = "x2ratchet_ns"
+    )]
+    X2ratchetNs = CKA_X2RATCHET_NS,
+    #[serde(rename = "CKA_X2RATCHET_PNS")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_PNS",
+        serialize = "X2ratchetPns",
+        serialize = "x2ratchet_pns"
+    )]
+    X2ratchetPns = CKA_X2RATCHET_PNS,
+    #[serde(rename = "CKA_X2RATCHET_RK")]
+    #[strum(
+        serialize = "CKA_X2RATCHET_RK",
+        serialize = "X2ratchetRk",
+        serialize = "x2ratchet_rk"
+    )]
+    X2ratchetRk = CKA_X2RATCHET_RK,
+    #[serde(rename = "CKA_VENDOR_DEFINED")]
+    #[strum(
+        serialize = "CKA_VENDOR_DEFINED",
+        serialize = "VendorDefined",
+        serialize = "vendor_defined"
+    )]
+    VendorDefined = CKA_VENDOR_DEFINED,
     #[serde(rename = "CKA_WRAP_TEMPLATE")]
     #[strum(
         serialize = "CKA_WRAP_TEMPLATE",
@@ -677,6 +803,20 @@ pub enum AttributeType {
         serialize = "allowed_mechanisms"
     )]
     AllowedMechanisms = CKA_ALLOWED_MECHANISMS,
+    #[serde(rename = "CKA_SECONDARY_AUTH")]
+    #[strum(
+        serialize = "CKA_SECONDARY_AUTH",
+        serialize = "SecondaryAuth",
+        serialize = "secondary_auth"
+    )]
+    SecondaryAuth = CKA_SECONDARY_AUTH,
+    #[serde(rename = "CKA_AUTH_PIN_FLAGS")]
+    #[strum(
+        serialize = "CKA_AUTH_PIN_FLAGS",
+        serialize = "AuthPinFlags",
+        serialize = "auth_pin_flags"
+    )]
+    AuthPinFlags = CKA_AUTH_PIN_FLAGS,
     #[num_enum(catch_all)]
     UnknownAttributeType(u64) = u64::MAX,
 }
diff --git a/sw/host/hsmtool/src/util/attribute/certificate_type.rs b/sw/host/hsmtool/src/util/attribute/certificate_type.rs
index a40d0aacb2750..0da0eca3c79e4 100644
--- a/sw/host/hsmtool/src/util/attribute/certificate_type.rs
+++ b/sw/host/hsmtool/src/util/attribute/certificate_type.rs
@@ -31,6 +31,8 @@ pub enum CertificateType {
     X509AttrCert = CKC_X_509_ATTR_CERT,
     #[serde(rename = "CKC_WTLS")]
     Wtls = CKC_WTLS,
+    #[serde(rename = "CKC_VENDOR_DEFINED")]
+    VendorDefined = CKC_VENDOR_DEFINED,
     #[num_enum(catch_all)]
     UnknownCertificateType(u64) = u64::MAX,
 }
diff --git a/sw/host/hsmtool/src/util/attribute/data.rs b/sw/host/hsmtool/src/util/attribute/data.rs
index 9b58c4a499c2a..89f47fe029062 100644
--- a/sw/host/hsmtool/src/util/attribute/data.rs
+++ b/sw/host/hsmtool/src/util/attribute/data.rs
@@ -138,6 +138,13 @@ impl AttrData {
             _ => Err(AttributeError::InvalidDataType),
         }
     }
+
+    pub fn try_string(&self) -> Result<String, AttributeError> {
+        match self {
+            AttrData::Str(v) => Ok(v.clone()),
+            _ => Err(AttributeError::InvalidDataType),
+        }
+    }
 }
 
 #[cfg(test)]
diff --git a/sw/host/hsmtool/src/util/attribute/error.rs b/sw/host/hsmtool/src/util/attribute/error.rs
index 0833b2687e076..6d1d74b46330d 100644
--- a/sw/host/hsmtool/src/util/attribute/error.rs
+++ b/sw/host/hsmtool/src/util/attribute/error.rs
@@ -16,4 +16,6 @@ pub enum AttributeError {
     UnknownAttribute(Attribute),
     #[error("Unknown attribute type: {0:?}")]
     UnknownAttributeType(AttributeType),
+    #[error("Attribute not found: {0:?}")]
+    AttributeNotFound(AttributeType),
 }
diff --git a/sw/host/hsmtool/src/util/attribute/key_type.rs b/sw/host/hsmtool/src/util/attribute/key_type.rs
index 36eedd2fb2871..5e6bfd8d5ebf6 100644
--- a/sw/host/hsmtool/src/util/attribute/key_type.rs
+++ b/sw/host/hsmtool/src/util/attribute/key_type.rs
@@ -107,10 +107,46 @@ pub enum KeyType {
     Gostr3411 = CKK_GOSTR3411,
     #[serde(rename = "CKK_GOST28147")]
     Gost28147 = CKK_GOST28147,
+    #[serde(rename = "CKK_CHACHA20")]
+    Chacha20 = CKK_CHACHA20,
+    #[serde(rename = "CKK_POLY1305")]
+    Poly1305 = CKK_POLY1305,
+    #[serde(rename = "CKK_AES_XTS")]
+    AesXts = CKK_AES_XTS,
+    #[serde(rename = "CKK_SHA3_224_HMAC")]
+    Sha3224Hmac = CKK_SHA3_224_HMAC,
+    #[serde(rename = "CKK_SHA3_256_HMAC")]
+    Sha3256Hmac = CKK_SHA3_256_HMAC,
+    #[serde(rename = "CKK_SHA3_384_HMAC")]
+    Sha3384Hmac = CKK_SHA3_384_HMAC,
+    #[serde(rename = "CKK_SHA3_512_HMAC")]
+    Sha3512Hmac = CKK_SHA3_512_HMAC,
+    #[serde(rename = "CKK_BLAKE2B_160_HMAC")]
+    Blake2b160Hmac = CKK_BLAKE2B_160_HMAC,
+    #[serde(rename = "CKK_BLAKE2B_256_HMAC")]
+    Blake2b256Hmac = CKK_BLAKE2B_256_HMAC,
+    #[serde(rename = "CKK_BLAKE2B_384_HMAC")]
+    Blake2b384Hmac = CKK_BLAKE2B_384_HMAC,
+    #[serde(rename = "CKK_BLAKE2B_512_HMAC")]
+    Blake2b512Hmac = CKK_BLAKE2B_512_HMAC,
+    #[serde(rename = "CKK_SALSA20")]
+    Salsa20 = CKK_SALSA20,
+    #[serde(rename = "CKK_X2RATCHET")]
+    X2ratchet = CKK_X2RATCHET,
     #[serde(rename = "CKK_EC_EDWARDS")]
     EcEdwards = CKK_EC_EDWARDS,
     #[serde(rename = "CKK_EC_MONTGOMERY")]
     EcMontgomery = CKK_EC_MONTGOMERY,
+    #[serde(rename = "CKK_HKDF")]
+    Hkdf = CKK_HKDF,
+    #[serde(rename = "CKK_SHA512_224_HMAC")]
+    Sha512224Hmac = CKK_SHA512_224_HMAC,
+    #[serde(rename = "CKK_SHA512_256_HMAC")]
+    Sha512256Hmac = CKK_SHA512_256_HMAC,
+    #[serde(rename = "CKK_SHA512_T_HMAC")]
+    Sha512THmac = CKK_SHA512_T_HMAC,
+    #[serde(rename = "CKK_VENDOR_DEFINED")]
+    VendorDefined = CKK_VENDOR_DEFINED,
     #[num_enum(catch_all)]
     UnknownKeyType(u64) = u64::MAX,
 }
diff --git a/sw/host/hsmtool/src/util/attribute/mechanism_type.rs b/sw/host/hsmtool/src/util/attribute/mechanism_type.rs
index 96eb7798ba4a0..189db3c3194fc 100644
--- a/sw/host/hsmtool/src/util/attribute/mechanism_type.rs
+++ b/sw/host/hsmtool/src/util/attribute/mechanism_type.rs
@@ -69,6 +69,14 @@ pub enum MechanismType {
     DsaSha384 = CKM_DSA_SHA384,
     #[serde(rename = "CKM_DSA_SHA512")]
     DsaSha512 = CKM_DSA_SHA512,
+    #[serde(rename = "CKM_DSA_SHA3_224")]
+    DsaSha3224 = CKM_DSA_SHA3_224,
+    #[serde(rename = "CKM_DSA_SHA3_256")]
+    DsaSha3256 = CKM_DSA_SHA3_256,
+    #[serde(rename = "CKM_DSA_SHA3_384")]
+    DsaSha3384 = CKM_DSA_SHA3_384,
+    #[serde(rename = "CKM_DSA_SHA3_512")]
+    DsaSha3512 = CKM_DSA_SHA3_512,
     #[serde(rename = "CKM_DH_PKCS_KEY_PAIR_GEN")]
     DhPkcsKeyPairGen = CKM_DH_PKCS_KEY_PAIR_GEN,
     #[serde(rename = "CKM_DH_PKCS_DERIVE")]
@@ -93,6 +101,10 @@ pub enum MechanismType {
     Sha384RsaPkcsPss = CKM_SHA384_RSA_PKCS_PSS,
     #[serde(rename = "CKM_SHA512_RSA_PKCS_PSS")]
     Sha512RsaPkcsPss = CKM_SHA512_RSA_PKCS_PSS,
+    #[serde(rename = "CKM_SHA224_RSA_PKCS")]
+    Sha224RsaPkcs = CKM_SHA224_RSA_PKCS,
+    #[serde(rename = "CKM_SHA224_RSA_PKCS_PSS")]
+    Sha224RsaPkcsPss = CKM_SHA224_RSA_PKCS_PSS,
     #[serde(rename = "CKM_SHA512_224")]
     Sha512224 = CKM_SHA512_224,
     #[serde(rename = "CKM_SHA512_224_HMAC")]
@@ -117,6 +129,22 @@ pub enum MechanismType {
     Sha512THmacGeneral = CKM_SHA512_T_HMAC_GENERAL,
     #[serde(rename = "CKM_SHA512_T_KEY_DERIVATION")]
     Sha512TKeyDerivation = CKM_SHA512_T_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_256_RSA_PKCS")]
+    Sha3256RsaPkcs = CKM_SHA3_256_RSA_PKCS,
+    #[serde(rename = "CKM_SHA3_384_RSA_PKCS")]
+    Sha3384RsaPkcs = CKM_SHA3_384_RSA_PKCS,
+    #[serde(rename = "CKM_SHA3_512_RSA_PKCS")]
+    Sha3512RsaPkcs = CKM_SHA3_512_RSA_PKCS,
+    #[serde(rename = "CKM_SHA3_256_RSA_PKCS_PSS")]
+    Sha3256RsaPkcsPss = CKM_SHA3_256_RSA_PKCS_PSS,
+    #[serde(rename = "CKM_SHA3_384_RSA_PKCS_PSS")]
+    Sha3384RsaPkcsPss = CKM_SHA3_384_RSA_PKCS_PSS,
+    #[serde(rename = "CKM_SHA3_512_RSA_PKCS_PSS")]
+    Sha3512RsaPkcsPss = CKM_SHA3_512_RSA_PKCS_PSS,
+    #[serde(rename = "CKM_SHA3_224_RSA_PKCS")]
+    Sha3224RsaPkcs = CKM_SHA3_224_RSA_PKCS,
+    #[serde(rename = "CKM_SHA3_224_RSA_PKCS_PSS")]
+    Sha3224RsaPkcsPss = CKM_SHA3_224_RSA_PKCS_PSS,
     #[serde(rename = "CKM_RC2_KEY_GEN")]
     Rc2KeyGen = CKM_RC2_KEY_GEN,
     #[serde(rename = "CKM_RC2_ECB")]
@@ -219,6 +247,12 @@ pub enum MechanismType {
     Sha256Hmac = CKM_SHA256_HMAC,
     #[serde(rename = "CKM_SHA256_HMAC_GENERAL")]
     Sha256HmacGeneral = CKM_SHA256_HMAC_GENERAL,
+    #[serde(rename = "CKM_SHA224")]
+    Sha224 = CKM_SHA224,
+    #[serde(rename = "CKM_SHA224_HMAC")]
+    Sha224Hmac = CKM_SHA224_HMAC,
+    #[serde(rename = "CKM_SHA224_HMAC_GENERAL")]
+    Sha224HmacGeneral = CKM_SHA224_HMAC_GENERAL,
     #[serde(rename = "CKM_SHA384")]
     Sha384 = CKM_SHA384,
     #[serde(rename = "CKM_SHA384_HMAC")]
@@ -243,6 +277,38 @@ pub enum MechanismType {
     Acti = CKM_ACTI,
     #[serde(rename = "CKM_ACTI_KEY_GEN")]
     ActiKeyGen = CKM_ACTI_KEY_GEN,
+    #[serde(rename = "CKM_SHA3_256")]
+    Sha3256 = CKM_SHA3_256,
+    #[serde(rename = "CKM_SHA3_256_HMAC")]
+    Sha3256Hmac = CKM_SHA3_256_HMAC,
+    #[serde(rename = "CKM_SHA3_256_HMAC_GENERAL")]
+    Sha3256HmacGeneral = CKM_SHA3_256_HMAC_GENERAL,
+    #[serde(rename = "CKM_SHA3_256_KEY_GEN")]
+    Sha3256KeyGen = CKM_SHA3_256_KEY_GEN,
+    #[serde(rename = "CKM_SHA3_224")]
+    Sha3224 = CKM_SHA3_224,
+    #[serde(rename = "CKM_SHA3_224_HMAC")]
+    Sha3224Hmac = CKM_SHA3_224_HMAC,
+    #[serde(rename = "CKM_SHA3_224_HMAC_GENERAL")]
+    Sha3224HmacGeneral = CKM_SHA3_224_HMAC_GENERAL,
+    #[serde(rename = "CKM_SHA3_224_KEY_GEN")]
+    Sha3224KeyGen = CKM_SHA3_224_KEY_GEN,
+    #[serde(rename = "CKM_SHA3_384")]
+    Sha3384 = CKM_SHA3_384,
+    #[serde(rename = "CKM_SHA3_384_HMAC")]
+    Sha3384Hmac = CKM_SHA3_384_HMAC,
+    #[serde(rename = "CKM_SHA3_384_HMAC_GENERAL")]
+    Sha3384HmacGeneral = CKM_SHA3_384_HMAC_GENERAL,
+    #[serde(rename = "CKM_SHA3_384_KEY_GEN")]
+    Sha3384KeyGen = CKM_SHA3_384_KEY_GEN,
+    #[serde(rename = "CKM_SHA3_512")]
+    Sha3512 = CKM_SHA3_512,
+    #[serde(rename = "CKM_SHA3_512_HMAC")]
+    Sha3512Hmac = CKM_SHA3_512_HMAC,
+    #[serde(rename = "CKM_SHA3_512_HMAC_GENERAL")]
+    Sha3512HmacGeneral = CKM_SHA3_512_HMAC_GENERAL,
+    #[serde(rename = "CKM_SHA3_512_KEY_GEN")]
+    Sha3512KeyGen = CKM_SHA3_512_KEY_GEN,
     #[serde(rename = "CKM_CAST_KEY_GEN")]
     CastKeyGen = CKM_CAST_KEY_GEN,
     #[serde(rename = "CKM_CAST_ECB")]
@@ -271,10 +337,10 @@ pub enum MechanismType {
     Cast128KeyGen = CKM_CAST128_KEY_GEN,
     #[serde(rename = "CKM_CAST128_ECB")]
     Cast128Ecb = CKM_CAST128_ECB,
-    #[serde(rename = "CKM_CAST128_CBC")]
-    Cast128Cbc = CKM_CAST128_CBC,
     #[serde(rename = "CKM_CAST128_MAC")]
     Cast128Mac = CKM_CAST128_MAC,
+    #[serde(rename = "CKM_CAST128_CBC")]
+    Cast128Cbc = CKM_CAST128_CBC,
     #[serde(rename = "CKM_CAST128_MAC_GENERAL")]
     Cast128MacGeneral = CKM_CAST128_MAC_GENERAL,
     #[serde(rename = "CKM_CAST128_CBC_PAD")]
@@ -349,6 +415,20 @@ pub enum MechanismType {
     Sha384KeyDerivation = CKM_SHA384_KEY_DERIVATION,
     #[serde(rename = "CKM_SHA512_KEY_DERIVATION")]
     Sha512KeyDerivation = CKM_SHA512_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA224_KEY_DERIVATION")]
+    Sha224KeyDerivation = CKM_SHA224_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_256_KEY_DERIVATION")]
+    Sha3256KeyDerivation = CKM_SHA3_256_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_224_KEY_DERIVATION")]
+    Sha3224KeyDerivation = CKM_SHA3_224_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_384_KEY_DERIVATION")]
+    Sha3384KeyDerivation = CKM_SHA3_384_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_512_KEY_DERIVATION")]
+    Sha3512KeyDerivation = CKM_SHA3_512_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHA3_512_KEY_DERIVE")]
+    Shake128KeyDerivation = CKM_SHAKE_128_KEY_DERIVATION,
+    #[serde(rename = "CKM_SHAKE_128_KEY_DERIVE")]
+    Shake256KeyDerivation = CKM_SHAKE_256_KEY_DERIVATION,
     #[serde(rename = "CKM_PBE_MD2_DES_CBC")]
     PbeMd2DesCbc = CKM_PBE_MD2_DES_CBC,
     #[serde(rename = "CKM_PBE_MD5_DES_CBC")]
@@ -423,6 +503,20 @@ pub enum MechanismType {
     KipMac = CKM_KIP_MAC,
     #[serde(rename = "CKM_CAMELLIA_KEY_GEN")]
     CamelliaKeyGen = CKM_CAMELLIA_KEY_GEN,
+    #[serde(rename = "CKM_CAMELLIA_ECB")]
+    CamelliaEcb = CKM_CAMELLIA_ECB,
+    #[serde(rename = "CKM_CAMELLIA_CBC")]
+    CamelliaCbc = CKM_CAMELLIA_CBC,
+    #[serde(rename = "CKM_CAMELLIA_MAC")]
+    CamelliaMac = CKM_CAMELLIA_MAC,
+    #[serde(rename = "CKM_CAMELLIA_MAC_GENERAL")]
+    CamelliaMacGeneral = CKM_CAMELLIA_MAC_GENERAL,
+    #[serde(rename = "CKM_CAMELLIA_CBC_PAD")]
+    CamelliaCbcPad = CKM_CAMELLIA_CBC_PAD,
+    #[serde(rename = "CKM_CAMELLIA_ECB_ENCRYPT_DATA")]
+    CamelliaEcbEncryptData = CKM_CAMELLIA_ECB_ENCRYPT_DATA,
+    #[serde(rename = "CKM_CAMELLIA_CBC_ENCRYPT_DATA")]
+    CamelliaCbcEncryptData = CKM_CAMELLIA_CBC_ENCRYPT_DATA,
     #[serde(rename = "CKM_CAMELLIA_CTR")]
     CamelliaCtr = CKM_CAMELLIA_CTR,
     #[serde(rename = "CKM_ARIA_KEY_GEN")]
@@ -483,6 +577,8 @@ pub enum MechanismType {
     KeaKeyPairGen = CKM_KEA_KEY_PAIR_GEN,
     #[serde(rename = "CKM_KEA_KEY_DERIVE")]
     KeaKeyDerive = CKM_KEA_KEY_DERIVE,
+    #[serde(rename = "CKM_KEA_DERIVE")]
+    KeaDerive = CKM_KEA_DERIVE,
     #[serde(rename = "CKM_FORTEZZA_TIMESTAMP")]
     FortezzaTimestamp = CKM_FORTEZZA_TIMESTAMP,
     #[serde(rename = "CKM_BATON_KEY_GEN")]
@@ -513,6 +609,8 @@ pub enum MechanismType {
     EcdsaSha384 = CKM_ECDSA_SHA384,
     #[serde(rename = "CKM_ECDSA_SHA512")]
     EcdsaSha512 = CKM_ECDSA_SHA512,
+    #[serde(rename = "CKM_EC_KEY_PAIR_GEN_W_EXTRA_BITS")]
+    EcKeyPairGenWExtraBits = CKM_EC_KEY_PAIR_GEN_W_EXTRA_BITS,
     #[serde(rename = "CKM_ECDH1_DERIVE")]
     Ecdh1Derive = CKM_ECDH1_DERIVE,
     #[serde(rename = "CKM_ECDH1_COFACTOR_DERIVE")]
@@ -537,6 +635,10 @@ pub enum MechanismType {
     JuniperWrap = CKM_JUNIPER_WRAP,
     #[serde(rename = "CKM_FASTHASH")]
     Fasthash = CKM_FASTHASH,
+    #[serde(rename = "CKM_AES_XTS")]
+    AesXts = CKM_AES_XTS,
+    #[serde(rename = "CKM_AES_XTS_KEY_GEN")]
+    AesXtsKeyGen = CKM_AES_XTS_KEY_GEN,
     #[serde(rename = "CKM_AES_KEY_GEN")]
     AesKeyGen = CKM_AES_KEY_GEN,
     #[serde(rename = "CKM_AES_ECB")]
@@ -615,16 +717,26 @@ pub enum MechanismType {
     Gost28147Mac = CKM_GOST28147_MAC,
     #[serde(rename = "CKM_GOST28147_KEY_WRAP")]
     Gost28147KeyWrap = CKM_GOST28147_KEY_WRAP,
+    #[serde(rename = "CKM_CHACHA20_KEY_GEN")]
+    Chacha20KeyGen = CKM_CHACHA20_KEY_GEN,
+    #[serde(rename = "CKM_CHACHA20")]
+    Chacha20 = CKM_CHACHA20,
+    #[serde(rename = "CKM_POLY1305_KEY_GEN")]
+    Poly1305KeyGen = CKM_POLY1305_KEY_GEN,
+    #[serde(rename = "CKM_POLY1305")]
+    Poly1305 = CKM_POLY1305,
     #[serde(rename = "CKM_DSA_PARAMETER_GEN")]
     DsaParameterGen = CKM_DSA_PARAMETER_GEN,
     #[serde(rename = "CKM_DH_PKCS_PARAMETER_GEN")]
     DhPkcsParameterGen = CKM_DH_PKCS_PARAMETER_GEN,
     #[serde(rename = "CKM_X9_42_DH_PARAMETER_GEN")]
     X942DhParameterGen = CKM_X9_42_DH_PARAMETER_GEN,
-    #[serde(rename = "CKM_DSA_PROBABLISTIC_PARAMETER_GEN")]
-    DsaProbablisticParameterGen = CKM_DSA_PROBABLISTIC_PARAMETER_GEN,
+    #[serde(rename = "CKM_DSA_PROBABILISTIC_PARAMETER_GEN")]
+    DsaProbabilisticParameterGen = CKM_DSA_PROBABILISTIC_PARAMETER_GEN,
     #[serde(rename = "CKM_DSA_SHAWE_TAYLOR_PARAMETER_GEN")]
     DsaShaweTaylorParameterGen = CKM_DSA_SHAWE_TAYLOR_PARAMETER_GEN,
+    #[serde(rename = "CKM_DSA_FIPS_G_GEN")]
+    DsaFipsGGen = CKM_DSA_FIPS_G_GEN,
     #[serde(rename = "CKM_AES_OFB")]
     AesOfb = CKM_AES_OFB,
     #[serde(rename = "CKM_AES_CFB64")]
@@ -635,46 +747,122 @@ pub enum MechanismType {
     AesCfb128 = CKM_AES_CFB128,
     #[serde(rename = "CKM_AES_CFB1")]
     AesCfb1 = CKM_AES_CFB1,
-    #[serde(rename = "CKM_SHA224")]
-    Sha224 = CKM_SHA224,
-    #[serde(rename = "CKM_SHA224_HMAC")]
-    Sha224Hmac = CKM_SHA224_HMAC,
-    #[serde(rename = "CKM_SHA224_HMAC_GENERAL")]
-    Sha224HmacGeneral = CKM_SHA224_HMAC_GENERAL,
-    #[serde(rename = "CKM_SHA224_RSA_PKCS")]
-    Sha224RsaPkcs = CKM_SHA224_RSA_PKCS,
-    #[serde(rename = "CKM_SHA224_RSA_PKCS_PSS")]
-    Sha224RsaPkcsPss = CKM_SHA224_RSA_PKCS_PSS,
-    #[serde(rename = "CKM_SHA224_KEY_DERIVATION")]
-    Sha224KeyDerivation = CKM_SHA224_KEY_DERIVATION,
-    #[serde(rename = "CKM_CAMELLIA_ECB")]
-    CamelliaEcb = CKM_CAMELLIA_ECB,
-    #[serde(rename = "CKM_CAMELLIA_CBC")]
-    CamelliaCbc = CKM_CAMELLIA_CBC,
-    #[serde(rename = "CKM_CAMELLIA_MAC")]
-    CamelliaMac = CKM_CAMELLIA_MAC,
-    #[serde(rename = "CKM_CAMELLIA_MAC_GENERAL")]
-    CamelliaMacGeneral = CKM_CAMELLIA_MAC_GENERAL,
-    #[serde(rename = "CKM_CAMELLIA_CBC_PAD")]
-    CamelliaCbcPad = CKM_CAMELLIA_CBC_PAD,
-    #[serde(rename = "CKM_CAMELLIA_ECB_ENCRYPT_DATA")]
-    CamelliaEcbEncryptData = CKM_CAMELLIA_ECB_ENCRYPT_DATA,
-    #[serde(rename = "CKM_CAMELLIA_CBC_ENCRYPT_DATA")]
-    CamelliaCbcEncryptData = CKM_CAMELLIA_CBC_ENCRYPT_DATA,
     #[serde(rename = "CKM_AES_KEY_WRAP")]
     AesKeyWrap = CKM_AES_KEY_WRAP,
     #[serde(rename = "CKM_AES_KEY_WRAP_PAD")]
     AesKeyWrapPad = CKM_AES_KEY_WRAP_PAD,
+    #[serde(rename = "CKM_AES_KEY_WRAP_KWP")]
+    AesKeyWrapKwp = CKM_AES_KEY_WRAP_KWP,
     #[serde(rename = "CKM_RSA_PKCS_TPM_1_1")]
     RsaPkcsTpm1_1 = CKM_RSA_PKCS_TPM_1_1,
     #[serde(rename = "CKM_RSA_PKCS_OAEP_TPM_1_1")]
     RsaPkcsOaepTpm1_1 = CKM_RSA_PKCS_OAEP_TPM_1_1,
+    #[serde(rename = "CKM_SHA_1_KEY_GEN")]
+    Sha1KeyGen = CKM_SHA_1_KEY_GEN,
+    #[serde(rename = "CKM_SHA224_KEY_GEN")]
+    Sha224KeyGen = CKM_SHA224_KEY_GEN,
+    #[serde(rename = "CKM_SHA256_KEY_GEN")]
+    Sha256KeyGen = CKM_SHA256_KEY_GEN,
+    #[serde(rename = "CKM_SHA384_KEY_GEN")]
+    Sha384KeyGen = CKM_SHA384_KEY_GEN,
+    #[serde(rename = "CKM_SHA512_KEY_GEN")]
+    Sha512KeyGen = CKM_SHA512_KEY_GEN,
+    #[serde(rename = "CKM_SHA512_224_KEY_GEN")]
+    Sha512224KeyGen = CKM_SHA512_224_KEY_GEN,
+    #[serde(rename = "CKM_SHA512_256_KEY_GEN")]
+    Sha512256KeyGen = CKM_SHA512_256_KEY_GEN,
+    #[serde(rename = "CKM_SHA512_T_KEY_GEN")]
+    Sha512TKeyGen = CKM_SHA512_T_KEY_GEN,
+    #[serde(rename = "CKM_NULL")]
+    Null = CKM_NULL,
+    #[serde(rename = "CKM_BLAKE2B_160")]
+    Blake2b160 = CKM_BLAKE2B_160,
+    #[serde(rename = "CKM_BLAKE2B_160_HMAC")]
+    Blake2b160Hmac = CKM_BLAKE2B_160_HMAC,
+    #[serde(rename = "CKM_BLAKE2B_160_HMAC_GENERAL")]
+    Blake2b160HmacGeneral = CKM_BLAKE2B_160_HMAC_GENERAL,
+    #[serde(rename = "CKM_BLAKE2B_160_KEY_DERIVE")]
+    Blake2b160KeyDerive = CKM_BLAKE2B_160_KEY_DERIVE,
+    #[serde(rename = "CKM_BLAKE2B_160_KEY_GEN")]
+    Blake2b160KeyGen = CKM_BLAKE2B_160_KEY_GEN,
+    #[serde(rename = "CKM_BLAKE2B_256")]
+    Blake2b256 = CKM_BLAKE2B_256,
+    #[serde(rename = "CKM_BLAKE2B_256_HMAC")]
+    Blake2b256Hmac = CKM_BLAKE2B_256_HMAC,
+    #[serde(rename = "CKM_BLAKE2B_256_HMAC_GENERAL")]
+    Blake2b256HmacGeneral = CKM_BLAKE2B_256_HMAC_GENERAL,
+    #[serde(rename = "CKM_BLAKE2B_256_KEY_DERIVE")]
+    Blake2b256KeyDerive = CKM_BLAKE2B_256_KEY_DERIVE,
+    #[serde(rename = "CKM_BLAKE2B_256_KEY_GEN")]
+    Blake2b256KeyGen = CKM_BLAKE2B_256_KEY_GEN,
+    #[serde(rename = "CKM_BLAKE2B_384")]
+    Blake2b384 = CKM_BLAKE2B_384,
+    #[serde(rename = "CKM_BLAKE2B_384_HMAC")]
+    Blake2b384Hmac = CKM_BLAKE2B_384_HMAC,
+    #[serde(rename = "CKM_BLAKE2B_384_HMAC_GENERAL")]
+    Blake2b384HmacGeneral = CKM_BLAKE2B_384_HMAC_GENERAL,
+    #[serde(rename = "CKM_BLAKE2B_384_KEY_DERIVE")]
+    Blake2b384KeyDerive = CKM_BLAKE2B_384_KEY_DERIVE,
+    #[serde(rename = "CKM_BLAKE2B_384_KEY_GEN")]
+    Blake2b384KeyGen = CKM_BLAKE2B_384_KEY_GEN,
+    #[serde(rename = "CKM_BLAKE2B_512")]
+    Blake2b512 = CKM_BLAKE2B_512,
+    #[serde(rename = "CKM_BLAKE2B_512_HMAC")]
+    Blake2b512Hmac = CKM_BLAKE2B_512_HMAC,
+    #[serde(rename = "CKM_BLAKE2B_512_HMAC_GENERAL")]
+    Blake2b512HmacGeneral = CKM_BLAKE2B_512_HMAC_GENERAL,
+    #[serde(rename = "CKM_BLAKE2B_512_KEY_DERIVE")]
+    Blake2b512KeyDerive = CKM_BLAKE2B_512_KEY_DERIVE,
+    #[serde(rename = "CKM_BLAKE2B_512_KEY_GEN")]
+    Blake2b512KeyGen = CKM_BLAKE2B_512_KEY_GEN,
+    #[serde(rename = "CKM_SALSA20")]
+    Salsa20 = CKM_SALSA20,
+    #[serde(rename = "CKM_CHACHA20_POLY1305")]
+    Chacha20Poly1305 = CKM_CHACHA20_POLY1305,
+    #[serde(rename = "CKM_SALSA20_POLY1305")]
+    Salsa20Poly1305 = CKM_SALSA20_POLY1305,
+    #[serde(rename = "CKM_X3DH_INITIALIZE")]
+    X3dhInitialize = CKM_X3DH_INITIALIZE,
+    #[serde(rename = "CKM_X3DH_RESPOND")]
+    X3dhRespond = CKM_X3DH_RESPOND,
+    #[serde(rename = "CKM_X2RATCHET_INITIALIZE")]
+    X2ratchetInitialize = CKM_X2RATCHET_INITIALIZE,
+    #[serde(rename = "CKM_X2RATCHET_RESPOND")]
+    X2ratchetRespond = CKM_X2RATCHET_RESPOND,
+    #[serde(rename = "CKM_X2RATCHET_ENCRYPT")]
+    X2ratchetEncrypt = CKM_X2RATCHET_ENCRYPT,
+    #[serde(rename = "CKM_X2RATCHET_DECRYPT")]
+    X2ratchetDecrypt = CKM_X2RATCHET_DECRYPT,
+    #[serde(rename = "CKM_XEDDSA")]
+    Xeddsa = CKM_XEDDSA,
+    #[serde(rename = "CKM_HKDF_DERIVE")]
+    HkdfDerive = CKM_HKDF_DERIVE,
+    #[serde(rename = "CKM_HKDF_DATA")]
+    HkdfData = CKM_HKDF_DATA,
+    #[serde(rename = "CKM_HKDF_KEY_GEN")]
+    HkdfKeyGen = CKM_HKDF_KEY_GEN,
+    #[serde(rename = "CKM_SALSA20_KEY_GEN")]
+    Salsa20KeyGen = CKM_SALSA20_KEY_GEN,
+    #[serde(rename = "CKM_ECDSA_SHA3_224")]
+    EcdsaSha3224 = CKM_ECDSA_SHA3_224,
+    #[serde(rename = "CKM_ECDSA_SHA3_256")]
+    EcdsaSha3256 = CKM_ECDSA_SHA3_256,
+    #[serde(rename = "CKM_ECDSA_SHA3_384")]
+    EcdsaSha3384 = CKM_ECDSA_SHA3_384,
+    #[serde(rename = "CKM_ECDSA_SHA3_512")]
+    EcdsaSha3512 = CKM_ECDSA_SHA3_512,
     #[serde(rename = "CKM_EC_EDWARDS_KEY_PAIR_GEN")]
     EcEdwardsKeyPairGen = CKM_EC_EDWARDS_KEY_PAIR_GEN,
     #[serde(rename = "CKM_EC_MONTGOMERY_KEY_PAIR_GEN")]
     EcMontgomeryKeyPairGen = CKM_EC_MONTGOMERY_KEY_PAIR_GEN,
     #[serde(rename = "CKM_EDDSA")]
     Eddsa = CKM_EDDSA,
+    #[serde(rename = "CKM_SP800_108_COUNTER_KDF")]
+    Sp800108CounterKdf = CKM_SP800_108_COUNTER_KDF,
+    #[serde(rename = "CKM_SP800_108_FEEDBACK_KDF")]
+    Sp800108FeedbackKdf = CKM_SP800_108_FEEDBACK_KDF,
+    #[serde(rename = "CKM_SP800_108_DOUBLE_PIPELINE_KDF")]
+    Sp800108DoublePipelineKdf = CKM_SP800_108_DOUBLE_PIPELINE_KDF,
     #[serde(rename = "CKM_VENDOR_DEFINED")]
     VendorDefined = CKM_VENDOR_DEFINED,
     #[num_enum(catch_all)]
diff --git a/sw/host/hsmtool/src/util/attribute/object_class.rs b/sw/host/hsmtool/src/util/attribute/object_class.rs
index 7a5395f7b3620..9e6ceaea8e2f4 100644
--- a/sw/host/hsmtool/src/util/attribute/object_class.rs
+++ b/sw/host/hsmtool/src/util/attribute/object_class.rs
@@ -43,6 +43,10 @@ pub enum ObjectClass {
     Mechanism = CKO_MECHANISM,
     #[serde(rename = "CKO_OTP_KEY")]
     OtpKey = CKO_OTP_KEY,
+    #[serde(rename = "CKO_PROFILE")]
+    Profile = CKO_PROFILE,
+    #[serde(rename = "CKO_VENDOR_DEFINED")]
+    VendorDefined = CKO_VENDOR_DEFINED,
     #[num_enum(catch_all)]
     UnknownObjectClass(u64) = u64::MAX,
 }
diff --git a/sw/host/hsmtool/src/util/ef.rs b/sw/host/hsmtool/src/util/ef.rs
new file mode 100644
index 0000000000000..b1d046d019970
--- /dev/null
+++ b/sw/host/hsmtool/src/util/ef.rs
@@ -0,0 +1,138 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use cryptoki::session::Session;
+
+use crate::util::attribute::{AttrData, AttributeError, AttributeMap, AttributeType, ObjectClass};
+use crate::util::helper;
+
+#[derive(Clone, Debug, Default)]
+pub struct ElementaryFile {
+    pub name: String,
+    pub application: Option<String>,
+    pub private: bool,
+}
+
+impl ElementaryFile {
+    pub fn new(name: String) -> Self {
+        Self {
+            name,
+            ..Default::default()
+        }
+    }
+
+    pub fn application(mut self, app: String) -> Self {
+        self.application = Some(app);
+        self
+    }
+
+    pub fn private(mut self, private: bool) -> Self {
+        self.private = private;
+        self
+    }
+
+    pub fn find(session: &Session, search: AttributeMap) -> Result<Vec<Self>> {
+        let mut search = search;
+        search.insert(
+            AttributeType::Class,
+            AttrData::ObjectClass(ObjectClass::Data),
+        );
+        let search = search.to_vec()?;
+        let attr = [
+            AttributeType::Label,
+            AttributeType::Application,
+            AttributeType::Private,
+        ];
+        let attr = attr
+            .iter()
+            .map(|&a| Ok(a.try_into()?))
+            .collect::<Result<Vec<cryptoki::object::AttributeType>>>()?;
+
+        let mut result = Vec::new();
+        for object in session.find_objects(&search)? {
+            let data = session.get_attributes(object, &attr)?;
+            let data = AttributeMap::from(data.as_slice());
+            result.push(Self {
+                name: data
+                    .get(&AttributeType::Label)
+                    .map(|x| x.try_string())
+                    .transpose()?
+                    .unwrap_or_else(|| String::from("<unnamed>")),
+                application: data
+                    .get(&AttributeType::Application)
+                    .map(|x| x.try_string())
+                    .transpose()?,
+                private: data
+                    .get(&AttributeType::Private)
+                    .map(|x| x.try_into())
+                    .transpose()?
+                    .unwrap_or(false),
+            });
+        }
+        Ok(result)
+    }
+
+    pub fn list(session: &Session) -> Result<Vec<Self>> {
+        Self::find(session, AttributeMap::default())
+    }
+
+    pub fn exists(self, session: &Session) -> Result<bool> {
+        let mut attr = AttributeMap::default();
+        attr.insert(
+            AttributeType::Class,
+            AttrData::ObjectClass(ObjectClass::Data),
+        );
+        attr.insert(AttributeType::Label, AttrData::Str(self.name.clone()));
+        if let Some(app) = &self.application {
+            attr.insert(AttributeType::Application, AttrData::Str(app.clone()));
+        }
+        let attr = attr.to_vec()?;
+        let objects = session.find_objects(&attr)?;
+        Ok(!objects.is_empty())
+    }
+
+    pub fn read(self, session: &Session) -> Result<Vec<u8>> {
+        let mut attr = AttributeMap::default();
+        attr.insert(
+            AttributeType::Class,
+            AttrData::ObjectClass(ObjectClass::Data),
+        );
+        attr.insert(AttributeType::Label, AttrData::Str(self.name.clone()));
+        if let Some(app) = &self.application {
+            attr.insert(AttributeType::Application, AttrData::Str(app.clone()));
+        }
+        let attr = attr.to_vec()?;
+
+        let object = helper::find_one_object(session, &attr)?;
+        let data = AttributeMap::from_object(session, object)?;
+        let value = data
+            .get(&AttributeType::Value)
+            .ok_or(AttributeError::AttributeNotFound(AttributeType::Value))?;
+        let value = Vec::<u8>::try_from(value)?;
+        Ok(value)
+    }
+
+    pub fn write(self, session: &Session, data: &[u8]) -> Result<()> {
+        let mut attr = AttributeMap::default();
+        attr.insert(
+            AttributeType::Class,
+            AttrData::ObjectClass(ObjectClass::Data),
+        );
+        attr.insert(AttributeType::Label, AttrData::Str(self.name.clone()));
+        if let Some(application) = &self.application {
+            // Is this a bug in opensc-pkcs11 or in the Nitrokey?
+            // It seems the application string needs a nul terminator.
+            let mut val = application.clone();
+            val.push(0 as char);
+            attr.insert(AttributeType::Application, AttrData::Str(val));
+        }
+        attr.insert(AttributeType::Token, AttrData::from(true));
+        attr.insert(AttributeType::Private, AttrData::from(self.private));
+        attr.insert(AttributeType::Value, AttrData::from(data));
+        let attr = attr.to_vec()?;
+        session.create_object(&attr)?;
+        Ok(())
+    }
+}
diff --git a/sw/host/hsmtool/src/util/helper.rs b/sw/host/hsmtool/src/util/helper.rs
index 4184f53daf526..418d3b876142f 100644
--- a/sw/host/hsmtool/src/util/helper.rs
+++ b/sw/host/hsmtool/src/util/helper.rs
@@ -9,6 +9,7 @@ use rand::prelude::*;
 use std::convert::AsRef;
 use std::fs::File;
 use std::io::{Read, Write};
+use std::ops::Range;
 use std::path::Path;
 
 use crate::error::HsmError;
@@ -16,8 +17,12 @@ use crate::util::attribute::{AttrData, AttributeMap, AttributeType};
 use crate::util::escape::as_hex;
 
 /// Constructs a search template given an `id` or `label`.
-pub fn search_spec(id: Option<&str>, label: Option<&str>) -> Result<Vec<Attribute>> {
-    let mut attr = AttributeMap::default();
+pub fn search_spec_ex(
+    id: Option<&str>,
+    label: Option<&str>,
+    attr: Option<&AttributeMap>,
+) -> Result<Vec<Attribute>> {
+    let mut attr = attr.map_or(Default::default(), |s| s.clone());
     if let Some(id) = id {
         attr.insert(AttributeType::Id, AttrData::Str(id.into()));
     }
@@ -30,6 +35,10 @@ pub fn search_spec(id: Option<&str>, label: Option<&str>) -> Result<Vec<Attribut
     attr.to_vec()
 }
 
+pub fn search_spec(id: Option<&str>, label: Option<&str>) -> Result<Vec<Attribute>> {
+    search_spec_ex(id, label, None)
+}
+
 /// Returns `true` if one or more objects specified by `id` or `label` exist.
 pub fn object_exists(session: &Session, id: Option<&str>, label: Option<&str>) -> Result<bool> {
     let attr = search_spec(id, label)?;
@@ -89,3 +98,27 @@ pub fn lockfile<P: AsRef<Path>>(path: P) -> Result<File> {
     log::info!("Lock acquired");
     Ok(lf)
 }
+
+fn parse_usize(s: &str) -> Result<usize> {
+    if let Some(hex) = s.strip_prefix("0x") {
+        Ok(usize::from_str_radix(hex, 16)?)
+    } else {
+        Ok(s.parse::<usize>()?)
+    }
+}
+
+/// Parse a range from a string (e.g. "10..20").  The integers in the range may be expressed in
+/// either decimal or hexadecimal.
+pub fn parse_range(s: &str) -> Result<Range<usize>> {
+    if let Some((a, b)) = s.split_once("..") {
+        let start = parse_usize(a)?;
+        let end = parse_usize(b)?;
+        if start < end {
+            Ok(Range { start, end })
+        } else {
+            Err(HsmError::Unsupported(format!("bad range: {s:?}")).into())
+        }
+    } else {
+        Err(HsmError::Unsupported(format!("bad range: {s:?}")).into())
+    }
+}
diff --git a/sw/host/hsmtool/src/util/key/ecdsa.rs b/sw/host/hsmtool/src/util/key/ecdsa.rs
index 4c8ce286a4377..dd07d33427844 100644
--- a/sw/host/hsmtool/src/util/key/ecdsa.rs
+++ b/sw/host/hsmtool/src/util/key/ecdsa.rs
@@ -3,12 +3,12 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use anyhow::{Context, Result};
-use der::{asn1::OctetStringRef, Encode, Reader, SliceReader};
+use der::{Encode, Reader, SliceReader, asn1::OctetStringRef};
 use ecdsa::elliptic_curve::pkcs8::{
     self, AssociatedOid, DecodePrivateKey, DecodePublicKey, EncodePrivateKey, EncodePublicKey,
 };
-use p256::ecdsa::{SigningKey, VerifyingKey};
 use p256::NistP256;
+use p256::ecdsa::{SigningKey, VerifyingKey};
 
 use std::convert::{AsRef, TryFrom};
 use std::path::Path;
@@ -241,7 +241,7 @@ pub fn save_public_key<P: AsRef<Path>>(
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::testdata;
 
     const TEST2_PRIVATE_KEY: &str = r#"{
   "CKA_CLASS": "CKO_PRIVATE_KEY",
@@ -259,29 +259,29 @@ mod tests {
 
     #[test]
     fn test_load_public_keys() -> Result<()> {
-        assert!(load_public_key(testdata!("test2_pkcs8.pub.der")).is_ok());
-        //let k = load_public_key(testdata!("test2_pkcs8.pub.der"))?;
+        assert!(load_public_key(testdata("key/test2_pkcs8.pub.der")).is_ok());
+        //let k = load_public_key(testdata("key/test2_pkcs8.pub.der"))?;
         //save_public_key("/tmp/test2_pkcs8.pub.pem", &k, KeyEncoding::Pkcs8Pem)?;
-        assert!(load_public_key(testdata!("test2_pkcs8.pub.pem")).is_ok());
+        assert!(load_public_key(testdata("key/test2_pkcs8.pub.pem")).is_ok());
         Ok(())
     }
 
     #[test]
     fn test_load_private_keys() -> Result<()> {
-        assert!(load_private_key(testdata!("test2_pkcs8.der")).is_ok());
-        //let k = load_private_key(testdata!("test2_pkcs8.der"))?;
+        assert!(load_private_key(testdata("key/test2_pkcs8.der")).is_ok());
+        //let k = load_private_key(testdata("key/test2_pkcs8.der"))?;
         //save_private_key("/tmp/test2_pkcs8.pem", &k, KeyEncoding::Pkcs8Pem)?;
-        assert!(load_private_key(testdata!("test2_pkcs8.pem")).is_ok());
+        assert!(load_private_key(testdata("key/test2_pkcs8.pem")).is_ok());
         Ok(())
     }
 
     #[test]
     fn test_convert_key_to_hsm() -> Result<()> {
-        let k = load_private_key(testdata!("test2_pkcs8.pem"))?;
+        let k = load_private_key(testdata("key/test2_pkcs8.pem"))?;
         let hsm = AttributeMap::try_from(&k)?;
         assert_eq!(serde_json::to_string_pretty(&hsm)?, TEST2_PRIVATE_KEY);
 
-        let k = load_public_key(testdata!("test2_pkcs8.pub.pem"))?;
+        let k = load_public_key(testdata("key/test2_pkcs8.pub.pem"))?;
         let hsm = AttributeMap::try_from(&k)?;
         assert_eq!(serde_json::to_string_pretty(&hsm)?, TEST2_PUBLIC_KEY);
         Ok(())
@@ -291,12 +291,12 @@ mod tests {
     fn test_convert_hsm_to_key() -> Result<()> {
         let hsm = serde_json::from_str::<AttributeMap>(TEST2_PRIVATE_KEY)?;
         let kpriv = SigningKey::try_from(&hsm)?;
-        let k = load_private_key(testdata!("test2_pkcs8.pem"))?;
+        let k = load_private_key(testdata("key/test2_pkcs8.pem"))?;
         assert_eq!(kpriv, k);
 
         let hsm = serde_json::from_str::<AttributeMap>(TEST2_PUBLIC_KEY)?;
         let kpub = VerifyingKey::try_from(&hsm)?;
-        let k = load_public_key(testdata!("test2_pkcs8.pub.pem"))?;
+        let k = load_public_key(testdata("key/test2_pkcs8.pub.pem"))?;
         assert_eq!(kpub, k);
         Ok(())
     }
diff --git a/sw/host/hsmtool/src/util/key/rsa.rs b/sw/host/hsmtool/src/util/key/rsa.rs
index 509adab6de1f9..ae47f3f656e12 100644
--- a/sw/host/hsmtool/src/util/key/rsa.rs
+++ b/sw/host/hsmtool/src/util/key/rsa.rs
@@ -299,7 +299,7 @@ pub fn save_public_key<P: AsRef<Path>>(
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::testdata;
 
     const TEST1_PRIVATE_KEY: &str = r#"{
   "CKA_CLASS": "CKO_PRIVATE_KEY",
@@ -323,29 +323,29 @@ mod tests {
 
     #[test]
     fn test_load_public_keys() -> Result<()> {
-        assert!(load_public_key(testdata!("test1_pkcs8.pub.pem")).is_ok());
-        assert!(load_public_key(testdata!("test1_pkcs8.pub.der")).is_ok());
-        assert!(load_public_key(testdata!("test1_pkcs1.pub.pem")).is_ok());
-        assert!(load_public_key(testdata!("test1_pkcs1.pub.der")).is_ok());
+        assert!(load_public_key(testdata("key/test1_pkcs8.pub.pem")).is_ok());
+        assert!(load_public_key(testdata("key/test1_pkcs8.pub.der")).is_ok());
+        assert!(load_public_key(testdata("key/test1_pkcs1.pub.pem")).is_ok());
+        assert!(load_public_key(testdata("key/test1_pkcs1.pub.der")).is_ok());
         Ok(())
     }
 
     #[test]
     fn test_load_private_keys() -> Result<()> {
-        assert!(load_private_key(testdata!("test1_pkcs8.pem")).is_ok());
-        assert!(load_private_key(testdata!("test1_pkcs8.der")).is_ok());
-        assert!(load_private_key(testdata!("test1_pkcs1.pem")).is_ok());
-        assert!(load_private_key(testdata!("test1_pkcs1.der")).is_ok());
+        assert!(load_private_key(testdata("key/test1_pkcs8.pem")).is_ok());
+        assert!(load_private_key(testdata("key/test1_pkcs8.der")).is_ok());
+        assert!(load_private_key(testdata("key/test1_pkcs1.pem")).is_ok());
+        assert!(load_private_key(testdata("key/test1_pkcs1.der")).is_ok());
         Ok(())
     }
 
     #[test]
     fn test_convert_key_to_hsm() -> Result<()> {
-        let k = load_private_key(testdata!("test1_pkcs8.pem"))?;
+        let k = load_private_key(testdata("key/test1_pkcs8.pem"))?;
         let hsm = AttributeMap::try_from(&k)?;
         assert_eq!(serde_json::to_string_pretty(&hsm)?, TEST1_PRIVATE_KEY);
 
-        let k = load_public_key(testdata!("test1_pkcs8.pub.pem"))?;
+        let k = load_public_key(testdata("key/test1_pkcs8.pub.pem"))?;
         let hsm = AttributeMap::try_from(&k)?;
         assert_eq!(serde_json::to_string_pretty(&hsm)?, TEST1_PUBLIC_KEY);
         Ok(())
@@ -355,12 +355,12 @@ mod tests {
     fn test_convert_hsm_to_key() -> Result<()> {
         let hsm = serde_json::from_str::<AttributeMap>(TEST1_PRIVATE_KEY)?;
         let kpriv = RsaPrivateKey::try_from(&hsm)?;
-        let k = load_private_key(testdata!("test1_pkcs8.pem"))?;
+        let k = load_private_key(testdata("key/test1_pkcs8.pem"))?;
         assert_eq!(kpriv, k);
 
         let hsm = serde_json::from_str::<AttributeMap>(TEST1_PUBLIC_KEY)?;
         let kpub = RsaPublicKey::try_from(&hsm)?;
-        let k = load_public_key(testdata!("test1_pkcs8.pub.pem"))?;
+        let k = load_public_key(testdata("key/test1_pkcs8.pub.pem"))?;
         assert_eq!(kpub, k);
         Ok(())
     }
diff --git a/sw/host/hsmtool/src/util/mod.rs b/sw/host/hsmtool/src/util/mod.rs
index c84cc4c72270e..eef62441a3993 100644
--- a/sw/host/hsmtool/src/util/mod.rs
+++ b/sw/host/hsmtool/src/util/mod.rs
@@ -3,41 +3,21 @@
 // SPDX-License-Identifier: Apache-2.0
 
 pub mod attribute;
+pub mod ef;
 pub mod escape;
 pub mod helper;
 pub mod key;
+pub mod secret;
 pub mod signing;
+pub mod wrap;
 
-/// The `testdata` macro can be used in tests to reference testdata directories.
-#[macro_export]
+/// The `testdata` function can be used in tests to reference testdata directories.
 #[cfg(test)]
-macro_rules! testdata {
-    () => {{
-        use std::path::PathBuf;
-        let mut path = PathBuf::new();
-        path.push(file!());
-        path.pop();
-        path.push("testdata");
-        path
-    }};
-    ($f:expr) => {{
-        let mut path = testdata!();
-        path.push($f);
-        path
-    }};
-}
-
-#[cfg(test)]
-mod test {
-    #[test]
-    fn test_testdata() {
-        assert_eq!(
-            testdata!().to_str().unwrap(),
-            "sw/host/hsmtool/src/util/testdata"
-        );
-        assert_eq!(
-            testdata!("my.file").to_str().unwrap(),
-            "sw/host/hsmtool/src/util/testdata/my.file"
-        );
-    }
+pub fn testdata(test: &str) -> std::path::PathBuf {
+    let mut path: std::path::PathBuf = std::env::var_os("TESTDATA").unwrap().into();
+    // TESTDATA points an arbitrary test, remove two levels to get the directory.
+    path.pop();
+    path.pop();
+    path.push(test);
+    path
 }
diff --git a/sw/host/hsmtool/src/util/secret.rs b/sw/host/hsmtool/src/util/secret.rs
new file mode 100644
index 0000000000000..3fc6a73dd523e
--- /dev/null
+++ b/sw/host/hsmtool/src/util/secret.rs
@@ -0,0 +1,194 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This module provides functionality for handling secret keys in an HSM
+// (Hardware Security Module). It supports AES and generic secret keys,
+// allowing for key generation, import, export, wrapping, and unwrapping.
+//
+// The `Secret` enum defines the types of secrets supported, and methods are
+// provided to manage these keys using the PKCS#11 interface through the
+// `cryptoki` crate.
+
+use anyhow::{Ok, Result};
+use cryptoki::mechanism::Mechanism;
+use cryptoki::object::ObjectHandle;
+use cryptoki::session::Session;
+use std::str::FromStr;
+
+use crate::error::HsmError;
+use crate::util::attribute::{AttrData, AttributeMap, AttributeType, KeyType, ObjectClass};
+use crate::util::wrap::Wrap;
+
+pub enum Secret {
+    Aes,
+    GenericSecret,
+}
+
+impl Secret {
+    const TEMPLATE_AES: &str = r#"{
+        "CKA_CLASS": "CKO_SECRET_KEY",
+        "CKA_DERIVE": true,
+        "CKA_ENCRYPT": true,
+        "CKA_DECRYPT": true,
+        "CKA_KEY_TYPE": "CKK_AES",
+        "CKA_SENSITIVE": true,
+        "CKA_TOKEN": true,
+    }"#;
+
+    const TEMPLATE_GENERIC_SECRET: &str = r#"{
+        "CKA_CLASS": "CKO_SECRET_KEY",
+        "CKA_DERIVE": true,
+        "CKA_KEY_TYPE": "CKK_GENERIC_SECRET",
+        "CKA_SENSITIVE": true,
+        "CKA_TOKEN": true,
+    }"#;
+
+    fn key_template(&self) -> Result<AttributeMap> {
+        let template = match self {
+            Secret::Aes => Self::TEMPLATE_AES,
+            Secret::GenericSecret => Self::TEMPLATE_GENERIC_SECRET,
+        };
+        Ok(AttributeMap::from_str(template).expect("error in TEMPLATE"))
+    }
+
+    fn key_type(&self) -> Result<KeyType> {
+        match self {
+            Secret::Aes => Ok(KeyType::Aes),
+            Secret::GenericSecret => Ok(KeyType::GenericSecret),
+        }
+    }
+
+    fn keygen_mechanism(&self) -> Result<Mechanism> {
+        match self {
+            Secret::Aes => Ok(Mechanism::AesKeyGen),
+            Secret::GenericSecret => Ok(Mechanism::GenericSecretKeyGen),
+        }
+    }
+
+    fn check(&self, map: &AttributeMap) -> Result<()> {
+        let class: ObjectClass = map
+            .get(&AttributeType::Class)
+            .ok_or_else(|| HsmError::KeyError("Key does not have a class attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        let key_type: KeyType = map
+            .get(&AttributeType::KeyType)
+            .ok_or_else(|| HsmError::KeyError("Key does not have a key type attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        if class != ObjectClass::SecretKey || key_type != self.key_type()? {
+            Err(HsmError::KeyError("Key is not a secret key".into()))?;
+        }
+
+        let extractable: bool = map
+            .get(&AttributeType::Extractable)
+            .ok_or_else(|| HsmError::KeyError("Key does not have an extractable attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        if !extractable {
+            Err(HsmError::KeyError("Key is not extractable".into()))?;
+        }
+        Ok(())
+    }
+
+    pub fn generate(
+        &self,
+        session: &Session,
+        id: AttrData,
+        label: AttrData,
+        attrs: Option<AttributeMap>,
+    ) -> Result<ObjectHandle> {
+        let mut template = self.key_template()?;
+        template.insert(AttributeType::Id, id);
+        template.insert(AttributeType::Label, label);
+        template.insert(AttributeType::ValueLen, 32u64.into());
+
+        if let Some(tpl) = &attrs {
+            template.merge(tpl.clone());
+        }
+
+        log::info!("template = {}", serde_json::to_string_pretty(&template)?);
+
+        let template = template.to_vec()?;
+        Ok(session.generate_key(&self.keygen_mechanism()?, &template)?)
+    }
+
+    pub fn import(
+        &self,
+        session: &Session,
+        id: AttrData,
+        label: AttrData,
+        key: Vec<u8>,
+        attrs: Option<AttributeMap>,
+    ) -> Result<ObjectHandle> {
+        let mut template = self.key_template()?;
+        template.insert(AttributeType::Id, id);
+        template.insert(AttributeType::Label, label);
+
+        if let Some(tpl) = &attrs {
+            template.merge(tpl.clone());
+        }
+
+        log::info!("template = {}", serde_json::to_string_pretty(&template)?);
+
+        template.insert(AttributeType::Value, AttrData::from(key.as_slice()));
+        let template = template.to_vec()?;
+        Ok(session.create_object(&template)?)
+    }
+
+    pub fn export(&self, session: &Session, object: ObjectHandle) -> Result<Vec<u8>> {
+        let map = AttributeMap::from_object(session, object)?;
+        self.check(&map)?;
+        let sensitive: bool = map
+            .get(&AttributeType::Sensitive)
+            .ok_or_else(|| HsmError::KeyError("Key does not have a sensitive attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        if sensitive {
+            Err(HsmError::KeyError("Key is marked as sensitive".into()))?;
+        }
+
+        let key: Vec<u8> = map
+            .get(&AttributeType::Value)
+            .ok_or_else(|| HsmError::KeyError("Key does not have a value attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        Ok(key)
+    }
+
+    pub fn wrap_key(
+        &self,
+        session: &Session,
+        object: ObjectHandle,
+        wrap_key_label: Option<&str>,
+        wrap_mechanism: &Wrap,
+    ) -> Result<Vec<u8>> {
+        let map = AttributeMap::from_object(session, object)?;
+        self.check(&map)?;
+        Ok(wrap_mechanism.wrap(session, object, wrap_key_label)?)
+    }
+
+    #[allow(clippy::too_many_arguments)]
+    pub fn unwrap_key(
+        &self,
+        session: &Session,
+        id: AttrData,
+        label: AttrData,
+        key: Vec<u8>,
+        attrs: Option<AttributeMap>,
+        wrap_key_label: Option<&str>,
+        wrap_mechanism: &Wrap,
+    ) -> Result<ObjectHandle> {
+        let mut template = self.key_template()?;
+        template.insert(AttributeType::Id, id);
+        template.insert(AttributeType::Label, label);
+
+        if let Some(tpl) = &attrs {
+            template.merge(tpl.clone());
+        }
+
+        log::info!("template = {}", serde_json::to_string_pretty(&template)?);
+        Ok(wrap_mechanism.unwrap(session, key.as_slice(), wrap_key_label, &template)?)
+    }
+}
diff --git a/sw/host/hsmtool/src/util/signing.rs b/sw/host/hsmtool/src/util/signing.rs
index afdc693b15c38..0d528588bf771 100644
--- a/sw/host/hsmtool/src/util/signing.rs
+++ b/sw/host/hsmtool/src/util/signing.rs
@@ -6,15 +6,18 @@ use anyhow::Result;
 use cryptoki::mechanism::Mechanism;
 use rsa::pkcs1v15::Pkcs1v15Sign;
 use serde::{Deserialize, Serialize};
-use sha2::digest::const_oid::AssociatedOid;
-use sha2::digest::Digest;
 use sha2::Sha256;
+use sha2::digest::Digest;
+use sha2::digest::const_oid::AssociatedOid;
+use sphincsplus::SpxDomain;
+use std::str::FromStr;
 
 use crate::error::HsmError;
 use crate::util::attribute::KeyType;
+use crate::util::helper::parse_range;
 
 /// Specify the type of data being signed or verified.
-#[derive(clap::ValueEnum, Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize)]
+#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize)]
 pub enum SignData {
     /// The data to be signed is plain text.
     /// The data will be hashed and padded as specified by the signing algorithm.
@@ -24,12 +27,41 @@ pub enum SignData {
     /// The data will be padded as specified by the signing algorithm.
     #[serde(alias = "sha256-hash")]
     Sha256Hash,
+    /// The data to be signed is a SHA-256 hash with the bytes in reverse order.
+    /// The data will be padded as specified by the signing algorithm.
+    #[serde(alias = "sha256-hash-reversed")]
+    Sha256HashReversed,
     /// The data is raw and will be passed directly to the signing functions.
     #[serde(alias = "raw")]
     Raw,
+    /// The data to be signed is plain text.
+    /// A slice of the data will be hashed and padded as specified by the signing algorithm.
+    #[serde(alias = "slice")]
+    Slice(usize, usize),
+}
+
+impl FromStr for SignData {
+    type Err = anyhow::Error;
+    fn from_str(input: &str) -> Result<Self> {
+        if input.eq_ignore_ascii_case("plain-text") {
+            Ok(SignData::PlainText)
+        } else if input.eq_ignore_ascii_case("sha256-hash") {
+            Ok(SignData::Sha256Hash)
+        } else if input.eq_ignore_ascii_case("sha256-hash-reversed") {
+            Ok(SignData::Sha256HashReversed)
+        } else if input.eq_ignore_ascii_case("raw") {
+            Ok(SignData::Raw)
+        } else if input[..6].eq_ignore_ascii_case("slice:") {
+            let r = parse_range(&input[6..])?;
+            Ok(SignData::Slice(r.start, r.end))
+        } else {
+            Err(HsmError::Unsupported(format!("invalid variant: {input}")).into())
+        }
+    }
 }
 
 impl SignData {
+    pub const HELP: &'static str = "[allowed values: plain-text, sha256-hash, raw, slice:m..n]";
     /// Prepare `input` data for signing or verification.
     pub fn prepare(&self, keytype: KeyType, input: &[u8]) -> Result<Vec<u8>> {
         match keytype {
@@ -37,19 +69,69 @@ impl SignData {
                 // Data is plaintext: hash, then add PKCSv1.5 padding.
                 SignData::PlainText => Self::pkcs15sign::<Sha256>(&Self::data_plain_text(input)?),
                 // Data is already hashed: add PKCSv1.5 padding.
-                SignData::Sha256Hash => Self::pkcs15sign::<Sha256>(input),
+                // If the `little_endian` flag is true, we assume the pre-hashed input came
+                // from opentitantool, which writes out the hash in little endian order,
+                // and therefore, needs to be reversed before the signing operation.
+                SignData::Sha256Hash => Self::pkcs15sign::<Sha256>(&Self::data_raw(input, false)?),
+                SignData::Sha256HashReversed => {
+                    Self::pkcs15sign::<Sha256>(&Self::data_raw(input, true)?)
+                }
                 // Raw data requires no transformation.
-                SignData::Raw => Self::data_raw(input),
+                SignData::Raw => Self::data_raw(input, false),
+                // Data is a slice of plaintext: hash, then add PKCSv1.5 padding.
+                SignData::Slice(a, b) => {
+                    Self::pkcs15sign::<Sha256>(&Self::data_plain_text(&input[*a..*b])?)
+                }
             },
             KeyType::Ec => match self {
                 // Data is plaintext: hash.
                 SignData::PlainText => Self::data_plain_text(input),
                 // Data is already hashed: no transformation needed.
-                SignData::Sha256Hash => Self::data_raw(input),
+                // If the `little_endian` flag is true, we assume the pre-hashed input came
+                // from opentitantool, which writes out the hash in little endian order,
+                // and therefore, needs to be reversed before the signing operation.
+                SignData::Sha256Hash => Self::data_raw(input, false),
+                SignData::Sha256HashReversed => Self::data_raw(input, true),
                 // Raw data requires no transformation.
-                SignData::Raw => Self::data_raw(input),
+                SignData::Raw => Self::data_raw(input, false),
+                // Data is a slice of plaintext: hash.
+                SignData::Slice(a, b) => Self::data_plain_text(&input[*a..*b]),
             },
-            _ => Err(HsmError::Unsupported("SignData prepare for {keytype:?}".into()).into()),
+            _ => Err(HsmError::Unsupported(format!("SignData prepare for {keytype:?}")).into()),
+        }
+    }
+
+    pub fn spx_prepare(&self, domain: SpxDomain, input: &[u8]) -> Result<Vec<u8>> {
+        match self {
+            SignData::PlainText => {
+                match domain {
+                    // Plaintext in domain None or Pure: nothing to do.
+                    SpxDomain::None | SpxDomain::Pure => Ok(input.into()),
+                    // Plaintext in domain PreHashed: compute hash.
+                    SpxDomain::PreHashedSha256 => Ok(Sha256::digest(input).as_slice().to_vec()),
+                }
+            }
+            SignData::Sha256Hash => {
+                // Sha256 input in any domain: nothing to do.
+                Ok(input.into())
+            }
+            SignData::Sha256HashReversed => {
+                // Sha256 that requires reversal in any domain: reverse the input.
+                Self::data_raw(input, /*reverse=*/ true)
+            }
+            SignData::Raw => {
+                // Raw data in any domain: nothing to do.
+                Ok(input.into())
+            }
+            SignData::Slice(a, b) => {
+                let input = &input[*a..*b];
+                match domain {
+                    // A slice of the input in domain None or Pure: nothing to do.
+                    SpxDomain::None | SpxDomain::Pure => Ok(input.into()),
+                    // A slice of the input in domain PreHashed: hash the input.
+                    SpxDomain::PreHashedSha256 => Ok(Sha256::digest(input).as_slice().to_vec()),
+                }
+            }
         }
     }
 
@@ -59,23 +141,30 @@ impl SignData {
             KeyType::Rsa => match self {
                 SignData::PlainText => Ok(Mechanism::RsaPkcs),
                 SignData::Sha256Hash => Ok(Mechanism::RsaPkcs),
+                SignData::Sha256HashReversed => Ok(Mechanism::RsaPkcs),
                 SignData::Raw => Err(HsmError::Unsupported(
                     "rust-cryptoki Mechanism doesn't include RSA_X_509".into(),
                 )
                 .into()),
+                SignData::Slice(_, _) => Ok(Mechanism::RsaPkcs),
             },
             KeyType::Ec => match self {
                 SignData::PlainText => Ok(Mechanism::Ecdsa),
                 SignData::Sha256Hash => Ok(Mechanism::Ecdsa),
+                SignData::Sha256HashReversed => Ok(Mechanism::Ecdsa),
                 SignData::Raw => Ok(Mechanism::Ecdsa),
+                SignData::Slice(_, _) => Ok(Mechanism::Ecdsa),
             },
-            _ => Err(HsmError::Unsupported("No mechanism for {keytype:?}".into()).into()),
+            _ => Err(HsmError::Unsupported(format!("No mechanism for {keytype:?}")).into()),
         }
     }
 
-    fn data_raw(input: &[u8]) -> Result<Vec<u8>> {
+    fn data_raw(input: &[u8], reverse: bool) -> Result<Vec<u8>> {
         let mut result = Vec::new();
         result.extend_from_slice(input);
+        if reverse {
+            result.reverse();
+        }
         Ok(result)
     }
 
@@ -95,7 +184,8 @@ impl SignData {
     }
 
     fn data_plain_text(input: &[u8]) -> Result<Vec<u8>> {
-        Ok(Sha256::digest(input).as_slice().to_vec())
+        let result = Sha256::digest(input).as_slice().to_vec();
+        Ok(result)
     }
 }
 
@@ -116,9 +206,17 @@ mod tests {
             KeyType::Rsa,
             b"The quick brown fox jumped over the lazy dog",
         )?;
-        assert_eq!(hex::encode(result),
+        assert_eq!(
+            hex::encode(result),
             "3031300d0609608648016503040201050004207d38b5cd25a2baf85ad3bb5b9311383e671a8a142eb302b324d4a5fba8748c69"
         );
+
+        let result = SignData::PlainText
+            .prepare(KeyType::Ec, b"The quick brown fox jumped over the lazy dog")?;
+        assert_eq!(
+            hex::encode(result),
+            "7d38b5cd25a2baf85ad3bb5b9311383e671a8a142eb302b324d4a5fba8748c69",
+        );
         Ok(())
     }
 
@@ -127,11 +225,24 @@ mod tests {
         let input =
             hex::decode("7d38b5cd25a2baf85ad3bb5b9311383e671a8a142eb302b324d4a5fba8748c69")?;
         let result = SignData::Sha256Hash.prepare(KeyType::Rsa, &input)?;
-        assert_eq!(hex::encode(result),
+        assert_eq!(
+            hex::encode(result),
             "3031300d0609608648016503040201050004207d38b5cd25a2baf85ad3bb5b9311383e671a8a142eb302b324d4a5fba8748c69"
         );
 
         assert!(SignData::Sha256Hash.prepare(KeyType::Rsa, b"").is_err());
         Ok(())
     }
+
+    #[test]
+    fn test_slice() -> Result<()> {
+        let result = SignData::Slice(0, 3)
+            .prepare(KeyType::Ec, b"The quick brown fox jumped over the lazy dog")?;
+        assert_eq!(
+            hex::encode(result),
+            // Hash of "The".
+            "b344d80e24a3679999fa964450b34bc24d1578a35509f934c1418b0a20d21a67",
+        );
+        Ok(())
+    }
 }
diff --git a/sw/host/hsmtool/src/util/wrap.rs b/sw/host/hsmtool/src/util/wrap.rs
new file mode 100644
index 0000000000000..7efaf0e5a33f3
--- /dev/null
+++ b/sw/host/hsmtool/src/util/wrap.rs
@@ -0,0 +1,190 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// This module provides functionality for wrapping and unwrapping cryptographic
+// keys using different mechanisms. It supports AES key wrap, AES key wrap with
+// padding, and RSA PKCS OAEP.
+
+use anyhow::{Ok, Result};
+use clap::ValueEnum;
+use cryptoki::mechanism::rsa::{PkcsMgfType, PkcsOaepParams, PkcsOaepSource};
+use cryptoki::mechanism::vendor_defined::{CKM_VENDOR_DEFINED, VendorDefinedMechanism};
+use cryptoki::mechanism::{Mechanism, MechanismType};
+use cryptoki::object::{Attribute, ObjectHandle};
+use cryptoki::session::Session;
+use serde::{Deserialize, Serialize};
+use strum::{Display, EnumString};
+
+use crate::error::HsmError;
+use crate::util::attribute::{AttributeMap, AttributeType, KeyType, ObjectClass};
+use crate::util::helper;
+
+/// The wrapping mechanism to use.
+#[derive(
+    Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize, Display, EnumString, ValueEnum,
+)]
+#[strum(ascii_case_insensitive)]
+pub enum Wrap {
+    AesKeyWrap,
+    AesKeyWrapPad,
+    RsaPkcs,
+    RsaPkcsOaep,
+    VendorThalesAesKw,
+    VendorThalesAesKwp,
+}
+
+/// The wrapping mechanism to use for private keys.
+#[derive(
+    Debug, Clone, Copy, PartialEq, Eq, Serialize, Deserialize, Display, EnumString, ValueEnum,
+)]
+#[strum(ascii_case_insensitive)]
+pub enum WrapPrivateKey {
+    AesKeyWrap,
+    AesKeyWrapPad,
+    VendorThalesAesKw,
+    VendorThalesAesKwp,
+}
+
+impl From<WrapPrivateKey> for Wrap {
+    fn from(wrap: WrapPrivateKey) -> Self {
+        match wrap {
+            WrapPrivateKey::AesKeyWrap => Wrap::AesKeyWrap,
+            WrapPrivateKey::AesKeyWrapPad => Wrap::AesKeyWrapPad,
+            WrapPrivateKey::VendorThalesAesKw => Wrap::VendorThalesAesKw,
+            WrapPrivateKey::VendorThalesAesKwp => Wrap::VendorThalesAesKwp,
+        }
+    }
+}
+
+impl Wrap {
+    // Vendor defined mechanisms for Thales AES key wrap.
+    const CKM_THALES_AES_KW: u64 = CKM_VENDOR_DEFINED | 0x00000170;
+    const CKM_THALES_AES_KWP: u64 = CKM_VENDOR_DEFINED | 0x00000171;
+
+    pub fn mechanism(&self) -> Result<Mechanism> {
+        match self {
+            Wrap::AesKeyWrap => Ok(Mechanism::AesKeyWrap),
+            Wrap::AesKeyWrapPad => Ok(Mechanism::AesKeyWrapPad),
+            Wrap::RsaPkcs => Ok(Mechanism::RsaPkcs),
+            Wrap::RsaPkcsOaep => Ok(Mechanism::RsaPkcsOaep(PkcsOaepParams::new(
+                MechanismType::SHA256,
+                PkcsMgfType::MGF1_SHA256,
+                PkcsOaepSource::empty(),
+            ))),
+            Wrap::VendorThalesAesKw => {
+                Ok(Mechanism::VendorDefined(VendorDefinedMechanism::new::<()>(
+                    MechanismType::new_vendor_defined(Wrap::CKM_THALES_AES_KW)?,
+                    None,
+                )))
+            }
+            Wrap::VendorThalesAesKwp => {
+                Ok(Mechanism::VendorDefined(VendorDefinedMechanism::new::<()>(
+                    MechanismType::new_vendor_defined(Wrap::CKM_THALES_AES_KWP)?,
+                    None,
+                )))
+            }
+        }
+    }
+
+    pub fn wrapping_key(&self, session: &Session, label: Option<&str>) -> Result<ObjectHandle> {
+        let mut attrs = helper::search_spec(None, label)?;
+        attrs.push(Attribute::Wrap(true));
+        match self {
+            Wrap::AesKeyWrap
+            | Wrap::AesKeyWrapPad
+            | Wrap::VendorThalesAesKw
+            | Wrap::VendorThalesAesKwp => {
+                attrs.push(Attribute::KeyType(KeyType::Aes.try_into()?));
+                attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
+                helper::find_one_object(session, &attrs)
+            }
+            Wrap::RsaPkcs | Wrap::RsaPkcsOaep => {
+                attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
+                attrs.push(Attribute::Class(ObjectClass::PublicKey.try_into()?));
+                helper::find_one_object(session, &attrs)
+            }
+        }
+    }
+
+    pub fn unwrapping_key(&self, session: &Session, label: Option<&str>) -> Result<ObjectHandle> {
+        let mut attrs = helper::search_spec(None, label)?;
+        attrs.push(Attribute::Unwrap(true));
+        match self {
+            Wrap::AesKeyWrap
+            | Wrap::AesKeyWrapPad
+            | Wrap::VendorThalesAesKw
+            | Wrap::VendorThalesAesKwp => {
+                attrs.push(Attribute::KeyType(KeyType::Aes.try_into()?));
+                attrs.push(Attribute::Class(ObjectClass::SecretKey.try_into()?));
+                helper::find_one_object(session, &attrs)
+            }
+            Wrap::RsaPkcs | Wrap::RsaPkcsOaep => {
+                attrs.push(Attribute::KeyType(KeyType::Rsa.try_into()?));
+                attrs.push(Attribute::Class(ObjectClass::PrivateKey.try_into()?));
+                helper::find_one_object(session, &attrs)
+            }
+        }
+    }
+
+    pub fn check_key(&self, session: &Session, key: ObjectHandle) -> Result<()> {
+        let map = AttributeMap::from_object(session, key)?;
+
+        let extractable: bool = map
+            .get(&AttributeType::Extractable)
+            .ok_or_else(|| HsmError::KeyError("Key does not have an extractable attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+        if !extractable {
+            Err(HsmError::KeyError("Key is not extractable".into()))?;
+        }
+
+        let key_type: KeyType = map
+            .get(&AttributeType::KeyType)
+            .ok_or_else(|| HsmError::KeyError("Key does not have a key type attribute".into()))?
+            .try_into()
+            .map_err(HsmError::AttributeError)?;
+
+        if *self == Wrap::RsaPkcsOaep || *self == Wrap::RsaPkcs {
+            let result = match key_type {
+                KeyType::Aes => Ok(()),
+                KeyType::GenericSecret => Ok(()),
+                _ => Err(HsmError::KeyError(format!(
+                    "Unsupported key type: {key_type:?}"
+                )))?,
+            };
+            result?;
+        }
+
+        Ok(())
+    }
+
+    pub fn wrap(
+        &self,
+        session: &Session,
+        key: ObjectHandle,
+        wrapping_key_label: Option<&str>,
+    ) -> Result<Vec<u8>> {
+        self.check_key(session, key)?;
+        let wrapping_key = self.wrapping_key(session, wrapping_key_label)?;
+        let mechanism = self.mechanism()?;
+        Ok(session.wrap_key(&mechanism, wrapping_key, key)?)
+    }
+
+    pub fn unwrap(
+        &self,
+        session: &Session,
+        wrapped_key: &[u8],
+        wrapping_key_label: Option<&str>,
+        template: &AttributeMap,
+    ) -> Result<ObjectHandle> {
+        let wrapping_key = self.unwrapping_key(session, wrapping_key_label)?;
+        let mechanism = self.mechanism()?;
+        Ok(session.unwrap_key(
+            &mechanism,
+            wrapping_key,
+            wrapped_key,
+            template.to_vec()?.as_slice(),
+        )?)
+    }
+}
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.der b/sw/host/hsmtool/testdata/key/test1_pkcs1.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.der
rename to sw/host/hsmtool/testdata/key/test1_pkcs1.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pem b/sw/host/hsmtool/testdata/key/test1_pkcs1.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pem
rename to sw/host/hsmtool/testdata/key/test1_pkcs1.pem
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pub.der b/sw/host/hsmtool/testdata/key/test1_pkcs1.pub.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pub.der
rename to sw/host/hsmtool/testdata/key/test1_pkcs1.pub.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pub.pem b/sw/host/hsmtool/testdata/key/test1_pkcs1.pub.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs1.pub.pem
rename to sw/host/hsmtool/testdata/key/test1_pkcs1.pub.pem
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.der b/sw/host/hsmtool/testdata/key/test1_pkcs8.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.der
rename to sw/host/hsmtool/testdata/key/test1_pkcs8.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pem b/sw/host/hsmtool/testdata/key/test1_pkcs8.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pem
rename to sw/host/hsmtool/testdata/key/test1_pkcs8.pem
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pub.der b/sw/host/hsmtool/testdata/key/test1_pkcs8.pub.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pub.der
rename to sw/host/hsmtool/testdata/key/test1_pkcs8.pub.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pub.pem b/sw/host/hsmtool/testdata/key/test1_pkcs8.pub.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test1_pkcs8.pub.pem
rename to sw/host/hsmtool/testdata/key/test1_pkcs8.pub.pem
diff --git a/sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.der b/sw/host/hsmtool/testdata/key/test2_pkcs8.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.der
rename to sw/host/hsmtool/testdata/key/test2_pkcs8.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pem b/sw/host/hsmtool/testdata/key/test2_pkcs8.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pem
rename to sw/host/hsmtool/testdata/key/test2_pkcs8.pem
diff --git a/sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pub.der b/sw/host/hsmtool/testdata/key/test2_pkcs8.pub.der
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pub.der
rename to sw/host/hsmtool/testdata/key/test2_pkcs8.pub.der
diff --git a/sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pub.pem b/sw/host/hsmtool/testdata/key/test2_pkcs8.pub.pem
similarity index 100%
rename from sw/host/hsmtool/src/util/key/testdata/test2_pkcs8.pub.pem
rename to sw/host/hsmtool/testdata/key/test2_pkcs8.pub.pem
diff --git a/sw/host/hsmtool/tests/BUILD b/sw/host/hsmtool/tests/BUILD
index cf3031bcffad7..052bcd0435fce 100644
--- a/sw/host/hsmtool/tests/BUILD
+++ b/sw/host/hsmtool/tests/BUILD
@@ -4,6 +4,11 @@
 
 package(default_visibility = ["//visibility:public"])
 
+sh_library(
+    name = "test_lib",
+    srcs = ["test_lib.sh"],
+)
+
 sh_test(
     name = "token_exists_test",
     srcs = ["hsmtool_runner.sh"],
@@ -23,3 +28,319 @@ sh_test(
         "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
     },
 )
+
+genrule(
+    name = "tqbf_digest",
+    srcs = ["tqbf.txt"],
+    outs = ["tqbf.digest"],
+    cmd = """
+        sha256sum $< | cut -f1 -d' ' | tr '[:lower:]' '[:upper:]' | basenc -d --base16 > $@
+    """,
+)
+
+# ECDSA-Sign a digest with opentitantool and then verify the signature with hsmtool.
+sh_test(
+    name = "ecdsa_opentitantool_sign_hsmtool_verify_test",
+    srcs = ["ot_hsm_runner.sh"],
+    data = [
+        ":tqbf_digest",
+        "//signing/softhsm",
+        "//signing/softhsm:conf",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset",
+        "//sw/host/hsmtool",
+        "//sw/host/opentitantool",
+        "@softhsm2//:gen_dir",
+    ],
+    env = {
+        "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+        "FIRST": "opentitantool",
+        "OTTOOL_ARGS": """
+            --rcfile=
+            ecdsa sign
+                sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der
+                --input=$(rootpath :tqbf_digest)
+                --output=tqbf.ecdsa_sig
+        """,
+        "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+        "HSMTOOL_ARGS": """
+            -t fake_keys -u user -p 123456
+            ecdsa verify
+                --little-endian
+                --label=fake_app_prod_ecdsa
+                $(rootpath :tqbf_digest)
+                tqbf.ecdsa_sig
+        """,
+    },
+    deps = [":test_lib"],
+)
+
+# ECDSA-Sign a digest with hsmtool and then verify the signature with opentitantool.
+sh_test(
+    name = "ecdsa_hsmtool_sign_opentitantool_verify_test",
+    srcs = ["ot_hsm_runner.sh"],
+    data = [
+        "tqbf.txt",
+        ":tqbf_digest",
+        "//signing/softhsm",
+        "//signing/softhsm:conf",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa_pub",
+        "//sw/host/hsmtool",
+        "//sw/host/opentitantool",
+        "@softhsm2//:gen_dir",
+    ],
+    env = {
+        "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+        "FIRST": "hsmtool",
+        "OTTOOL_ARGS": """
+            --rcfile=
+            ecdsa verify
+                --digest-file=$(rootpath :tqbf_digest)
+                --signature-file=tqbf.ecdsa_sig
+                sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+        """,
+        "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+        # This hsmtool invocation computes the digest from the plain-text `tqbf.txt` input file.
+        "HSMTOOL_ARGS": """
+            -t fake_keys -u user -p 123456
+            ecdsa sign
+                --little-endian
+                --format=plain-text
+                --label=fake_app_prod_ecdsa
+                --output=tqbf.ecdsa_sig
+                sw/host/hsmtool/tests/tqbf.txt
+        """,
+    },
+    deps = [":test_lib"],
+)
+
+_SPX_TESTS = {
+    "pure": {
+        "domain": "Pure",
+        "format": "plain-text",
+        "rev_flag": "--spx-hash-reversal-bug=false",
+    },
+    "prehashed": {
+        "domain": "PreHashedSha256",
+        "format": "sha256-hash",
+        "rev_flag": "--spx-hash-reversal-bug=false",
+    },
+    "hashreversed": {
+        "domain": "PreHashedSha256",
+        "format": "sha256-hash-reversed",
+        "rev_flag": "--spx-hash-reversal-bug=true",
+    },
+}
+
+# SPHINCS+-Sign a digest with opentitantool and then verify the signature with hsmtool.
+[
+    sh_test(
+        name = "spx_{}_opentitantool_sign_hsmtool_verify_test".format(name),
+        srcs = ["ot_hsm_runner.sh"],
+        data = [
+            ":tqbf_digest",
+            "//signing/softhsm",
+            "//signing/softhsm:conf",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset",
+            "//sw/host/hsmtool",
+            "//sw/host/opentitantool",
+            "@softhsm2//:gen_dir",
+        ],
+        env = {
+            "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+            "FIRST": "opentitantool",
+            "OTTOOL_ARGS": """
+                --rcfile=
+                spx sign {rev_flag}
+                    --domain={domain}
+                    $(rootpath :tqbf_digest)
+                    sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem
+                    --output=tqbf.spx_sig
+            """.format(
+                domain = param["domain"],
+                rev_flag = param["rev_flag"],
+            ),
+            "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+            "HSMTOOL_SPX_MODULE": "pkcs11-ef",
+            "HSMTOOL_ARGS": """
+                -t fake_keys -u user -p 123456
+                spx verify
+                    --label=fake_app_prod_spx
+                    --domain={domain}
+                    --format={fmt}
+                    $(rootpath :tqbf_digest)
+                    tqbf.spx_sig
+            """.format(
+                domain = param["domain"],
+                fmt = param["format"],
+            ),
+        },
+        deps = [":test_lib"],
+    )
+    for name, param in _SPX_TESTS.items()
+]
+
+# SPHINCS+-Sign a digest with hsmtool and then verify the signature with opentitantool.
+[
+    sh_test(
+        name = "spx_{}_hsmtool_sign_opentitantool_verify_test".format(name),
+        srcs = ["ot_hsm_runner.sh"],
+        data = [
+            ":tqbf_digest",
+            "//signing/softhsm",
+            "//signing/softhsm:conf",
+            "//sw/device/silicon_creator/lib/ownership/keys/fake:spx_keyset",
+            "//sw/host/hsmtool",
+            "//sw/host/opentitantool",
+            "@softhsm2//:gen_dir",
+        ],
+        env = {
+            "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+            "FIRST": "hsmtool",
+            "OTTOOL_ARGS": """
+                --rcfile=
+                spx verify {rev_flag}
+                    --domain={domain}
+                    sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_spx.pem
+                    $(rootpath :tqbf_digest)
+                    tqbf.spx_sig
+            """.format(
+                domain = param["domain"],
+                rev_flag = param["rev_flag"],
+            ),
+            "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+            "HSMTOOL_SPX_MODULE": "pkcs11-ef",
+            "HSMTOOL_ARGS": """
+                -t fake_keys -u user -p 123456
+                spx sign
+                    --label=fake_app_prod_spx
+                    --domain={domain}
+                    --format={fmt}
+                    --output=tqbf.spx_sig
+                    $(rootpath :tqbf_digest)
+            """.format(
+                domain = param["domain"],
+                fmt = param["format"],
+            ),
+        },
+        deps = [":test_lib"],
+    )
+    for name, param in _SPX_TESTS.items()
+]
+
+filegroup(
+    name = "image_bin",
+    # A hand assembled binary image.
+    # dd if=/dev/zero of=image.bin bs=1k count=1
+    # Then, use hexdump tools (e.g. `xxd` and `xxd -r`) to insert the following bytes:
+    #
+    # 00000330: 0000 0000 4f54 5245 476c 0200 0004 0000  ................
+    # 00000340: 0004 0000 0000 0000 0000 0000 0000 0000  ................
+    #
+    # This sets the identifier, manifest_version, signed_region_end and length fields.
+    srcs = ["image.bin"],
+)
+
+genrule(
+    name = "image_digest",
+    srcs = [":image_bin"],
+    outs = ["image.digest"],
+    # Opentitantool computes the digest by excluding the signature region of the manifest.
+    # The signature region is the first 384 bytes.
+    cmd = """
+        dd if=$< bs=1 skip=384 | sha256sum - | cut -f1 -d' ' | tr '[:lower:]' '[:upper:]' | basenc -d --base16 > $@
+    """,
+)
+
+# Verify the opentitantool image digest calculation.
+sh_test(
+    name = "image_digest_test",
+    srcs = ["image_digest_test.sh"],
+    data = [
+        ":image_bin",
+        ":image_digest",
+        "//sw/host/opentitantool",
+    ],
+    env = {
+        "IMAGE_BIN": "$(rootpath :image_bin)",
+        "KNOWN_DIGEST": "$(rootpath :image_digest)",
+    },
+    deps = [":test_lib"],
+)
+
+# ECDSA-Sign an image with opentitantool and then verify the signature with hsmtool.
+sh_test(
+    name = "manifest_opentitantool_sign_hsmtool_verify_test",
+    srcs = ["ot_hsm_runner.sh"],
+    data = [
+        ":image_bin",
+        "//signing/softhsm",
+        "//signing/softhsm:conf",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:ecdsa_keyset",
+        "//sw/host/hsmtool",
+        "//sw/host/opentitantool",
+        "@softhsm2//:gen_dir",
+    ],
+    env = {
+        "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+        "FIRST": "opentitantool",
+        "OTTOOL_ARGS": """
+            --rcfile=
+            image manifest update
+                --ecdsa-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.der
+                --output=image.signed_bin
+                $(rootpath :image_bin)
+        """,
+        "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+        "HSMTOOL_ARGS": """
+            -t fake_keys -u user -p 123456
+            ecdsa verify
+                --little-endian
+                --label=fake_app_prod_ecdsa
+                --format=slice:384..1024
+                --signature-at=0..64
+                image.signed_bin
+        """,
+    },
+    deps = [":test_lib"],
+)
+
+# ECDSA-Sign an image with hsmtool and then verify the signature with opentitantool.
+sh_test(
+    name = "manifest_hsmtool_sign_opentitantool_verify_test",
+    srcs = ["ot_hsm_runner.sh"],
+    data = [
+        ":image_bin",
+        "//signing/softhsm",
+        "//signing/softhsm:conf",
+        "//sw/device/silicon_creator/lib/ownership/keys/fake:app_prod_ecdsa_pub",
+        "//sw/host/hsmtool",
+        "//sw/host/opentitantool",
+        "@softhsm2//:gen_dir",
+    ],
+    env = {
+        "SOFTHSM2_CONF": "$(rootpath //signing/softhsm:conf)",
+        "FIRST": "hsmtool",
+        "PREPARE_CMD": """
+            sw/host/opentitantool/opentitantool image manifest update
+                --ecdsa-key=sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der
+                --output=image.signed_bin
+                $(rootpath :image_bin)
+        """,
+        "OTTOOL_ARGS": """
+            --rcfile=
+            image manifest verify
+                image.signed_bin
+        """,
+        "HSMTOOL_MODULE": "$(rootpath @softhsm2//:gen_dir)/lib/softhsm/libsofthsm2.so",
+        "HSMTOOL_ARGS": """
+            -t fake_keys -u user -p 123456
+            ecdsa sign
+                --little-endian
+                --label=fake_app_prod_ecdsa
+                --format=slice:384..1024
+                --update-in-place=0..64
+                image.signed_bin
+        """,
+    },
+    deps = [":test_lib"],
+)
diff --git a/sw/host/hsmtool/tests/image.bin b/sw/host/hsmtool/tests/image.bin
new file mode 100644
index 0000000000000..5a8fb74282be3
Binary files /dev/null and b/sw/host/hsmtool/tests/image.bin differ
diff --git a/sw/host/hsmtool/tests/image_digest_test.sh b/sw/host/hsmtool/tests/image_digest_test.sh
new file mode 100755
index 0000000000000..9d0cee9451b99
--- /dev/null
+++ b/sw/host/hsmtool/tests/image_digest_test.sh
@@ -0,0 +1,19 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+set -euo pipefail
+source sw/host/hsmtool/tests/test_lib.sh
+
+OPENTITANTOOL=sw/host/opentitantool/opentitantool
+
+run ${OPENTITANTOOL} image digest \
+  --bin image.digest ${IMAGE_BIN}
+
+echo "Opentitantool calculated digest:"
+basenc --base16 image.digest
+echo "Known digest (calculated externally with sha256sum):"
+basenc --base16 ${KNOWN_DIGEST}
+
+run cmp image.digest ${KNOWN_DIGEST}
diff --git a/sw/host/hsmtool/tests/ot_hsm_runner.sh b/sw/host/hsmtool/tests/ot_hsm_runner.sh
new file mode 100755
index 0000000000000..22aa124bc1f20
--- /dev/null
+++ b/sw/host/hsmtool/tests/ot_hsm_runner.sh
@@ -0,0 +1,35 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+set -euo pipefail
+source sw/host/hsmtool/tests/test_lib.sh
+
+OPENTITANTOOL=sw/host/opentitantool/opentitantool
+HSMTOOL=sw/host/hsmtool/hsmtool
+
+# shellcheck disable=SC2206
+OTTOOL_ARGS=(${OTTOOL_ARGS})
+# shellcheck disable=SC2206
+HSMTOOL_ARGS=(${HSMTOOL_ARGS})
+
+if [[ ${PREPARE_CMD+is_set} ]]; then
+  # shellcheck disable=SC2206
+  PREPARE_CMD=(${PREPARE_CMD})
+  run "${PREPARE_CMD[@]}"
+fi
+
+if [[ ${FIRST} == "none" ]]; then
+  # No operation requested.
+  true
+elif [[ ${FIRST} == "opentitantool" ]]; then
+  run ${OPENTITANTOOL} "${OTTOOL_ARGS[@]}"
+  run ${HSMTOOL} "${HSMTOOL_ARGS[@]}"
+elif [[ ${FIRST} == "hsmtool" ]]; then
+  run ${HSMTOOL} "${HSMTOOL_ARGS[@]}"
+  run ${OPENTITANTOOL} "${OTTOOL_ARGS[@]}"
+else
+  echo "Error: FIRST must be one of 'none, 'opentitantool' or 'hsmtool'" 1>&2
+  exit 1
+fi
diff --git a/sw/host/hsmtool/tests/test_lib.sh b/sw/host/hsmtool/tests/test_lib.sh
new file mode 100644
index 0000000000000..c339682cebf73
--- /dev/null
+++ b/sw/host/hsmtool/tests/test_lib.sh
@@ -0,0 +1,18 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+function run() {
+    echo "$@"
+    "$@"
+}
+
+# SoftHSM2 doesn't like the symlinks bazel sets up.
+# Make a copy of the token and operate on the copy.
+if [[ -n "${SOFTHSM2_CONF:+x}" ]]; then
+    DIR=$(dirname ${SOFTHSM2_CONF})
+    cp -aL $DIR/tokens $DIR/token
+    sed -e "s/tokens/token/g" $SOFTHSM2_CONF >softhsm2.conf
+    export SOFTHSM2_CONF=softhsm2.conf
+fi
diff --git a/sw/host/hsmtool/tests/tqbf.txt b/sw/host/hsmtool/tests/tqbf.txt
new file mode 100644
index 0000000000000..2fe6575e76eda
--- /dev/null
+++ b/sw/host/hsmtool/tests/tqbf.txt
@@ -0,0 +1 @@
+The quick brown fox jumps over the lazy dog.
diff --git a/sw/host/opentitanlib/BUILD b/sw/host/opentitanlib/BUILD
index 99981c33eefd6..bcbc070ba5343 100644
--- a/sw/host/opentitanlib/BUILD
+++ b/sw/host/opentitanlib/BUILD
@@ -65,9 +65,11 @@ rust_library(
         "src/app/mod.rs",
         "src/app/spi.rs",
         "src/backend/chip_whisperer.rs",
+        "src/backend/ftdi.rs",
         "src/backend/hyperdebug.rs",
         "src/backend/mod.rs",
         "src/backend/proxy.rs",
+        "src/backend/qemu.rs",
         "src/backend/ti50emulator.rs",
         "src/backend/ultradebug.rs",
         "src/backend/verilator.rs",
@@ -81,8 +83,10 @@ rust_library(
         "src/chip/boolean.rs",
         "src/chip/boot_log.rs",
         "src/chip/boot_svc.rs",
+        "src/chip/device_id.rs",
         "src/chip/helper.rs",
         "src/chip/mod.rs",
+        "src/chip/rom_error.rs",
         "src/console/mod.rs",
         "src/console/spi.rs",
         "src/crypto/ecdsa.rs",
@@ -125,26 +129,35 @@ rust_library(
         "src/ownership/application_key.rs",
         "src/ownership/flash.rs",
         "src/ownership/flash_info.rs",
+        "src/ownership/isfb.rs",
         "src/ownership/misc.rs",
         "src/ownership/mod.rs",
         "src/ownership/owner.rs",
         "src/ownership/rescue.rs",
+        "src/ownership/signature.rs",
         "src/proxy/errors.rs",
         "src/proxy/handler.rs",
         "src/proxy/mod.rs",
         "src/proxy/nonblocking_uart.rs",
         "src/proxy/protocol.rs",
         "src/proxy/socket_server.rs",
+        "src/rescue/dfu.rs",
         "src/rescue/mod.rs",
         "src/rescue/serial.rs",
+        "src/rescue/spidfu.rs",
+        "src/rescue/usbdfu.rs",
         "src/rescue/xmodem.rs",
         "src/spiflash/flash.rs",
         "src/spiflash/mod.rs",
         "src/spiflash/sfdp.rs",
         "src/test_utils/bitbanging/i2c.rs",
-        "src/test_utils/bitbanging/spi.rs",
         "src/test_utils/bitbanging/mod.rs",
+        "src/test_utils/bitbanging/pwm.rs",
+        "src/test_utils/bitbanging/spi.rs",
+        "src/test_utils/bitbanging/uart.rs",
+        "src/test_utils/bitbanging/uart_rx_sampling.rs",
         "src/test_utils/bootstrap.rs",
+        "src/test_utils/crashdump.rs",
         "src/test_utils/e2e_command.rs",
         "src/test_utils/epmp.rs",
         "src/test_utils/gpio.rs",
@@ -180,6 +193,10 @@ rust_library(
         "src/transport/dediprog/mod.rs",
         "src/transport/dediprog/spi.rs",
         "src/transport/errors.rs",
+        "src/transport/ftdi/chip.rs",
+        "src/transport/ftdi/gpio.rs",
+        "src/transport/ftdi/mod.rs",
+        "src/transport/ftdi/spi.rs",
         "src/transport/hyperdebug/c2d2.rs",
         "src/transport/hyperdebug/dfu.rs",
         "src/transport/hyperdebug/gpio.rs",
@@ -198,6 +215,14 @@ rust_library(
         "src/transport/proxy/mod.rs",
         "src/transport/proxy/spi.rs",
         "src/transport/proxy/uart.rs",
+        "src/transport/qemu/gpio.rs",
+        "src/transport/qemu/i2c.rs",
+        "src/transport/qemu/mod.rs",
+        "src/transport/qemu/monitor.rs",
+        "src/transport/qemu/reset.rs",
+        "src/transport/qemu/spi.rs",
+        "src/transport/qemu/uart.rs",
+        "src/transport/qemu/usbdev.rs",
         "src/transport/ti50emulator/emu.rs",
         "src/transport/ti50emulator/gpio.rs",
         "src/transport/ti50emulator/i2c.rs",
@@ -220,6 +245,7 @@ rust_library(
         "src/util/bitfield.rs",
         "src/util/file.rs",
         "src/util/hexdump.rs",
+        "src/util/known_keys.rs",
         "src/util/mod.rs",
         "src/util/num_de.rs",
         "src/util/parse_int.rs",
@@ -233,6 +259,7 @@ rust_library(
         "src/util/unknown.rs",
         "src/util/usb.rs",
         "src/util/usr_access.rs",
+        "src/util/vcd.rs",
         "src/util/vmem/mod.rs",
         "src/util/vmem/parser.rs",
         "src/util/voltage.rs",
@@ -241,6 +268,7 @@ rust_library(
         "//conditions:default": [
             "src/chip/autogen/earlgrey.rs",
             "src/dif/clkmgr.rs",
+            "src/dif/pinmux.rs",
             "src/test_utils/extclk.rs",
             "src/test_utils/pinmux_config.rs",
         ],
@@ -258,6 +286,7 @@ rust_library(
         "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
         "//util/openocd/target:lowrisc-earlgrey.cfg",
         "//util/openocd/target:lowrisc-earlgrey-lc.cfg",
+        "//sw/host/opentitanlib/bindgen:rom_error_enum",
     ],
     crate_features = [
         "include_hyperdebug_firmware",
@@ -274,6 +303,7 @@ rust_library(
         "i2c_target": "$(location :i2c_target)",
         "mem": "$(location :mem)",
         "pinmux_config": "$(location :pinmux_config)",
+        "rom_error_enum": "$(location //sw/host/opentitanlib/bindgen:rom_error_enum)",
         "spi_passthru": "$(location :spi_passthru)",
         "ottf": "$(location :ottf)",
         "hyperdebug_firmware": "$(location @hyperdebug_firmware//:hyperdebug/ec.bin)",
@@ -284,6 +314,7 @@ rust_library(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib/bindgen",
+        "//sw/host/opentitanlib/util",
         "//sw/host/sphincsplus",
         "@crate_index//:anyhow",
         "@crate_index//:arrayvec",
@@ -296,9 +327,12 @@ rust_library(
         "@crate_index//:deser-hjson",
         "@crate_index//:directories",
         "@crate_index//:ecdsa",
+        "@crate_index//:embedded-hal",
         "@crate_index//:env_logger",
         "@crate_index//:erased-serde",
         "@crate_index//:ftdi",
+        "@crate_index//:ftdi-embedded-hal",
+        "@crate_index//:ftdi-mpsse",
         "@crate_index//:hex",
         "@crate_index//:humantime",
         "@crate_index//:humantime-serde",
@@ -344,22 +378,15 @@ rust_test(
         "src/spiflash/SFDP_MX66L1G.bin",
     ],
     crate = ":opentitanlib",
-    data = [
-        "src/image/testdata/hello.txt",
-        "src/image/testdata/manifest.hjson",
-        "src/image/testdata/manifest_ext.hjson",
-        "src/image/testdata/manifest_missing.hjson",
-        "src/image/testdata/test_image.bin",
-        "src/image/testdata/world.txt",
-        "src/otp/testdata/lc_ctrl_state.hjson",
-        "src/otp/testdata/otp_ctrl_img_dev.hjson",
-        "src/otp/testdata/otp_ctrl_mmap.hjson",
-        "src/otp/testdata/output.vmem",
+    data = glob(["testdata/**"]) + [
         ":e2e_command",
         ":gpio",
         ":pinmux_config",
     ],
-    env = {"RUST_MIN_STACK": "4194304"},
+    env = {
+        "RUST_MIN_STACK": "4194304",
+        "TESTDATA": "$(rootpath testdata/otp/lc_ctrl_state.hjson)",
+    },
     rustc_env = {
         "e2e_command": "$(location :e2e_command)",
         "gpio": "$(location :gpio)",
diff --git a/sw/host/opentitanlib/bindgen/BUILD b/sw/host/opentitanlib/bindgen/BUILD
index 80f8b68fc8f58..0f05203a81739 100644
--- a/sw/host/opentitanlib/bindgen/BUILD
+++ b/sw/host/opentitanlib/bindgen/BUILD
@@ -2,8 +2,8 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test")
-load("@rules_rust//bindgen:bindgen.bzl", "rust_bindgen_library")
+load("@rules_rust//rust:defs.bzl", "rust_library")
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen", "rust_bindgen_library")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -16,6 +16,7 @@ _ENGLISH_BREAKFAST_DEPS = [
     "//sw/device/lib/dif:lc_ctrl",
     "//sw/device/lib/dif:otp_ctrl",
     "//sw/device/lib/dif:rstmgr",
+    "//sw/device/lib/dif:sram_ctrl",
     "//sw/device/lib/dif:uart",
 ]
 
@@ -106,6 +107,7 @@ rust_bindgen_library(
         "--allowlist-var=OTP_CTRL_.*_SIZE",
         "--allowlist-var=PATTGEN_.*_REG_OFFSET",
         "--allowlist-var=PINMUX_.*_REG_OFFSET",
+        "--allowlist-var=PINMUX_.*_BIT",
         "--allowlist-var=PWM_.*_REG_OFFSET",
         "--allowlist-var=PWRMGR_.*_REG_OFFSET",
         "--allowlist-type=dif_rstmgr_reset_info",
@@ -187,6 +189,43 @@ rust_bindgen_library(
     ],
 )
 
+# We generate the bindgen source for rom_error_t so we can post-process it
+# with the :rom_error_enum rule and build a full enum from all known
+# rom_error_t values.
+rust_bindgen(
+    name = "rom_error",
+    bindgen_flags = [
+        "--allowlist-type=rom_error_t",
+    ],
+    cc_lib = "//sw/device/silicon_creator/lib:error",
+    header = "//sw/device/silicon_creator/lib:error.h",
+)
+
+# Generate a rust source file that contains the enum definition.  This
+# will get textual-included into opentitanlib's `chip::rom_error` module.
+genrule(
+    name = "rom_error_enum",
+    srcs = [":rom_error"],
+    outs = ["rom_error_enum.rs"],
+    cmd = """
+cat >$@ <<HEADER
+with_unknown! {
+    pub enum RomError: u32 [default = Self::Unknown] {
+HEADER
+
+# The sed expression creates enumerators with idiomatic Rust names that
+# refer to the bindgen'ed constants.
+cat $(location :rom_error) \\
+    | grep const \\
+    | sed -E 's/^pub const (rom_error_kError([^:]+)).*$$/        \\2 = bindgen::rom_error::\\1,/g' >>$@
+
+cat >>$@ <<FOOTER
+    }
+}
+FOOTER
+    """,
+)
+
 rust_bindgen_library(
     name = "sram_program",
     bindgen_flags = [
@@ -217,7 +256,6 @@ rust_bindgen_library(
         "--allowlist-function=status_err",
         "--allowlist-function=status_ok",
         "--generate-inline-functions",
-        "--with-derive-custom=ot_status_create_record=zerocopy::FromZeroes",
         "--with-derive-custom=ot_status_create_record=zerocopy::FromBytes",
     ],
     cc_lib = "//sw/device/lib/base:status",
@@ -248,7 +286,10 @@ rust_bindgen_library(
 
 rust_library(
     name = "bindgen",
-    srcs = ["lib.rs"],
+    srcs = [
+        "lib.rs",
+        ":rom_error",
+    ],
     deps = [
         ":alert",
         ":dif",
diff --git a/sw/host/opentitanlib/bindgen/difs.h b/sw/host/opentitanlib/bindgen/difs.h
index 677225a3e8c1b..b63243a72846f 100644
--- a/sw/host/opentitanlib/bindgen/difs.h
+++ b/sw/host/opentitanlib/bindgen/difs.h
@@ -16,6 +16,7 @@
 #include "lc_ctrl_regs.h"    // Generated.
 #include "otp_ctrl_regs.h"   // Generated.
 #include "rstmgr_regs.h"     // Generated.
+#include "sram_ctrl_regs.h"  // Generated.
 #include "uart_regs.h"       // Generated.
 
 #else
diff --git a/sw/host/opentitanlib/bindgen/lib.rs b/sw/host/opentitanlib/bindgen/lib.rs
index 1f86312b8817f..a90b6f0ad8563 100644
--- a/sw/host/opentitanlib/bindgen/lib.rs
+++ b/sw/host/opentitanlib/bindgen/lib.rs
@@ -10,3 +10,8 @@ pub use multibits;
 pub use sram_program;
 pub use status;
 pub use test_status;
+
+#[allow(non_snake_case)]
+#[allow(non_upper_case_globals)]
+#[allow(non_camel_case_types)]
+pub mod rom_error;
diff --git a/sw/host/opentitanlib/doc/bitbanging.md b/sw/host/opentitanlib/doc/bitbanging.md
new file mode 100644
index 0000000000000..b30aad68b9ddd
--- /dev/null
+++ b/sw/host/opentitanlib/doc/bitbanging.md
@@ -0,0 +1,275 @@
+# Bitbanging Utilities
+
+OpenTitanLib provides several test utilities that can be used alongside GPIO bitbanging and monitoring transport interfaces to bitbang common protocols.
+
+These can be useful for testing different OpenTitan peripherals, by bitbanging invalid transactions or other edge cases that cannot be supported by regular transport devices.
+This allows for more thorough software testing to check that OpenTitan hardware can handle and respond to these cases correctly.
+
+Bitbanging can also be useful for custom workflows that only support bitbanging, or which require the generation of VCD files corresponding to different host/device transactions.
+One example of such a workflow might be the manufacturing process, which may require VCD files as inputs. See [*VCD Integration*](#vcd-integration) for more detail.
+
+## Supported Utilities
+
+Currently, bitbanging utilities are available for:
+* [UART](../src/test_utils/bitbanging/uart.rs)
+* [SPI](../src/test_utils/bitbanging/spi.rs)
+* [I2C](../src/test_utils/bitbanging/i2c.rs)
+* [PWM](../src/test_utils/bitbanging/pwm.rs)
+
+Each of these utilities are designed to be self-contained libraries, producing and consuming waveforms represented by uniform discrete samples, where each bit in each sample describes the state (0 or 1) of a pin at a given time.
+These are intended to be used with the OpenTitanLib `GpioBitbanging` interface directly.
+
+For asynchronous transmissions such as UART RX, this means that received edge events from the `GpioMonitoring` interface must first be sampled before being input into the UART decoding interface (see [*UART Receive*](#uart-receive)).
+
+## SPI Bitbanging
+
+The [SPI bitbanging tools](../src/test_utils/bitbanging/spi.rs) provide a `SpiBitbangEncoder`, which can be used to encode SPI writes and reads as a SPI host, and a `SpiBitbangDecoder`, which can be used to decode SPI reads from the perspective of either a SPI Host or a SPI device.
+
+These can each be configured via the `SpiBitbangConfig` provided during their creation, with options to configure the clock polarity (CPOL), clock phase (CPHA), data mode (Single, Dual or Quad) and the number of bits per SPI word.
+Dual Data Rate (DDR) is not currently supported.
+
+Additionally, delays can optionally be added to support communication with a wider range of SPI devices.
+This includes delays between CS assertion/de-assertion and the SPI words, as well as additional delays between each SPI word.
+The decoding functionality uses the varying clock and chip-select edges to decode the transaction, meaning that the decoder does not need to be provided with these delays.
+
+To bitbang SPI, samples from the SPI clock (CLK/SCK), chip select (CS) and data lines (D0/D1/D2/D3) are required.
+When using single or dual data mode, only the values of D0 (COPI) and D1 (CIPO) are used.
+
+You must also appropriately configure the corresponding GPIO pins before bitbanging:
+ * `CLK` must be PushPull, and its current idle level should match your CPOL configuration.
+ * `CS` must be PushPull, and should be idle high.
+ * The data lines are configured according to the data mode being used.
+ Standard single data mode SPI uses COPI/D0 in PushPull and CIPO/D1 in Input.
+
+To use the bitbanging tools with the `GpioBitbanging` interface, you must wrap the encoded samples in a `BitbangEntry`.
+For transactions involving only writes, it suffices to use a `BitbangEntry::Write(&samples)`, but if any read is involved then `BitbangEntry::Both(&samples, &mut read_samples)` must be used.
+Simultaneous bidirectional SPI transmissions can be achieved by simply encoding a regular SPI write, and using `BitbangEntry::Both` to get the read contents. A period equivalent to half the period of the desired clock rate should be used for bitbanging, as there are 2 samples per clock (for the falling and rising edges).
+
+One final quirk to note is that the bitbanging interface captures inputs before applying outputs, meaning that one extra sample must be appended to capture the final read input for decoding.
+
+An example illustrating how to integrate these tools is shown below:
+
+```rs
+/* Setup pins, buffers, clock rate etc... */
+
+// Encode a SPI transmission
+let config = SpiBitbangConfig {
+    cpol: false,
+    cpha: false,
+    data_mode: SpiDataMode::Single,
+    bits_per_word: 8,
+};
+let delays = SpiEncodingDelays {
+    inter_word_delay: 0,
+    cs_hold_delay: 1,
+    cs_release_delay: 1,
+};
+let mut encoder = SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(config.clone(), delays);
+let mut samples = Vec::new();
+encoder.assert_cs(true, &mut samples);
+encoder.encode_write(&wbuf, &mut samples)?; /* also use for bidirectional SPI */
+encoder.encode_read(rbuf.len(), &mut samples)?;
+encoder.assert_cs(false, &mut samples);
+
+// Add an extra sample to ensure we read the last input
+samples.push(*samples.last().unwrap());
+
+// Send the encoded transmission over the GpioBitbanging interface.
+// Make sure the order of `gpio_pins` matches the encoding generics.
+let mut read_samples = vec![0; samples.len()];
+let waveform = Box::new([BitbangEntry::Both(&samples, &mut read_samples)]);
+let period = Duration::from_nanos((1_000_000_000u64 / clock_rate as u64) / 2);
+transport
+    .gpio_bitbanging()?
+    .run(&gpio_pins, period, waveform)?;
+
+// Decoding the SPI reads (from the host's perspective)
+let decoder = SpiBitbangDecoder::<2, 3, 4, 5, 0, 1>::new(config, SpiEndpoint::Host);
+let decoded = decoder.run(read_samples[1..].to_vec())?;
+rbuf.copy_from_slice(&decoded);
+```
+
+Further examples can be seen in the unit tests in [`spi.rs`](../src/test_utils/bitbanging/spi.rs).
+
+## UART Bitbanging
+
+The [UART bitbanging tools](../src/test_utils/bitbanging/uart.rs) provide a `UartBitbangEncoder` and a `UartBitbangDecoder` for transmitting and receiving respectively.
+
+These can each be configured via the `UartBitbangConfig` provided during their creation, with options to configure the number of data & stop bits, parity, and a standard length for break conditions.
+Use of more than 8 data bits or 1.5 stop bits is currently unsupported.
+
+Bitbanging UART transmissions only requires samples from the TX or RX for pin for encoding and decoding respectively.
+These samples are assumed to be stored in the least significant bit of the provided samples.
+The `TX` pin should be configured in PushPull mode with idle high, whereas the `RX` pin should be configured in Input mode.
+
+### UART Transmit
+
+To use the encoder with the `GpioBitbanging` interface, you must wrap the encoded samples in a `BitbangEntry::Write(&samples)`, and provide a period that is calculated from the configured baud rate.
+Because UART is an asynchronous protocol and its synchronization is based on timing, you should be careful about the maximum bitbanging frequency that your backend supports.
+For example, the HyperDebug backend can accurately support 57600 Bd, but skews too much at the standard 115200 Bd, causing sent UART data to be infrequently corrupted.
+
+
+The following example shows how you might bitbang a UART transmission:
+
+```rs
+/* Setup TX pin, write buffer and baud rate... */
+
+// Encode a UART transmission
+let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+let encoder = UartBitbangEncoder::new(config);
+let mut samples = vec![];
+encoder.encode_characters(&wbuf, &mut samples);
+
+// Send the encoded transmission over the GpioBitbanging interface
+let waveform = Box::new([BitbangEntry::Write(&samples)]);
+let period = Duration::from_nanos(1_000_000_000u64 / baud_rate as u64);
+transport
+    .gpio_bitbanging()?
+    .run(&[tx_pin.borrow()], period, waveform)?;
+```
+
+To encode the transmission of a break condition, you can either use the encoding interface:
+
+```rs
+let mut samples = vec![];
+encoder.encode_break(&mut samples);
+/* Send the encoded transmission over the GpioBitbanging interface... */
+```
+
+or you can manually configure the GPIO pin directly to hold the TX pin low for the desired duration.
+
+### UART Receive
+
+Receiving a bitbanged UART transmission is more difficult due to the asynchronous nature of UART.
+You can use OpenTitanLib's `GpioMonitoring` interface to start monitoring incoming GPIO edge events on the RX pin in the background:
+
+```rs
+let gpio_monitoring = transport.gpio_monitoring()?;
+let start = gpio_monitoring.monitoring_start(&[rx_pin.borrow()])?;
+```
+
+And then at any point you can poll and read previously monitored events from the interface:
+
+```rs
+// Use `true` to continue monitoring afterwards, or `false` to stop here.
+let read_response = gpio_monitoring.monitoring_read(&[rx_pin.borrow()], true)?;
+```
+
+You can then use the additional [`UartRxMonitoringDecoder`](../src/test_utils/bitbanging/uart_rx_sampling.rs) wrapper which will consume these responses and perform the required sampling and decoding.
+When using this interface, you must pass *all* monitoring read responses to the decoder, as missing edges could cause errors.
+Note also that if you start monitoring mid-transmission, incoming UART data will be dropped until the RX line stays idle or in a break condition for at least a length of time corresponding to 1 UART frame.
+
+For example, you might use it as follows:
+
+```rs
+/* Setup rx pin, baud_rate, etc... */
+
+// Start monitoring the RX pin and set up the decoder
+let gpio_monitoring = transport.gpio_monitoring()?;
+let start = gpio_monitoring.monitoring_start(&[rx_pin.borrow()])?;
+let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+let decoder = UartBitbangDecoder::new(config);
+let clock_nature = gpio_monitoring.get_clock_nature()?;
+let mut monitor_decoder = UartRxMonitoringDecoder::new(decoder, clock_nature, start)?;
+
+// After some time has passed, read the monitoring response and decode
+let read_response = gpio_monitoring.monitoring_read(&[rx_pin.borrow()], true)?;
+let signal_index = 0u8; /* RX pin is signal 0 in our monitoring read */
+let decoded = monitor_decoder.decode_response(read_response, signal_index, baud_rate)?;
+```
+
+Further examples can be seen in the unit tests in [`uart.rs`](../src/test_utils/bitbanging/uart.rs) and [`uart_rx_sampling.rs`](../src/test_utils/bitbanging/uart_rx_sampling.rs).
+
+## VCD Integration
+
+For some flows (e.g. manufacturing), it may be useful to be able to output bitbanged transactions as VCDs, which can be used with e.g. provisioning equipment.
+This section provides further guidance on integrating these utilities.
+
+OpenTitanLib has some [VCD tools](../src/util/vcd.rs) which can be used for dumping and parsing VCD files from/to the different GPIO bitbanging formats supported by OpenTitanLib.
+These tools operate using `Vcd` structs, which can be loaded & dumped directly from/to a string using the `load_vcd` and `dump_vcd` functions.
+Alternatively, by using the `VcdParser` and `VcdWriter` implementations directly, you can write to or read from a file (or any other writable/readable context).
+
+The `vcd_from_samples` function can be used to translate the uniform samples returned by the `GpioBitbanging` interface to a `Vcd`, and the `UniformVcdSampler` does the inverse - providing an iterator over a given `Vcd` to retrieve uniform samples.
+Note that currently, signals are dumped into the generated VCD in the order that pins are provided, and loaded in the same order (the order listed in the VarDefs section of the VCD).
+The VCD sampling functionality is designed to be able to work with waveforms containing an arbitrary number of signals, so instead of directly providing `u8` samples, you should convert each sample to a slice first.
+
+Shown below is some examples of how you might use this, integrated with the bitbanging utilities:
+
+```rs
+// ... Finish encoding a bitbanged SPI transmission
+encoder.assert_cs(false, &mut samples);
+samples.push(*samples.last().unwrap());
+
+// Record it as a VCD to store and replay later
+let pin_names = vec![
+    Some("spi_sck".into()),
+    Some("spi_cs".into()),
+    Some("spi_copi".into()),
+];
+let period = Duration::from_nanos((1_000_000_000u64 / clock_rate as u64) / 2);
+let sample_slices = samples.iter().map(std::slice::from_ref).collect::<Vec<_>>();
+let vcd = vcd_from_samples(pin_names, period.as_nanos() * 1000, &sample_slices)?;
+let vcd_str = dump_vcd(&vcd)?;
+log::info!("{}", vcd_str);
+
+// Load a VCD from a string
+let vcd = load_vcd(&vcd_str)?;
+
+// Retrieve pin & timescale info (which we can use as the bitbanging period)
+log::info!("Pin names: {:?}", vcd.var_names());
+let decoded_timescale_ps = vcd.header.timescale_ps.unwrap();
+let period = Duration::from_nanos((decoded_timescale_ps / 1000) as u64);
+
+// Dump the VCD to some bitbanging samples
+let decoded = UniformVcdSampler::new(vcd, 1).collect::<Result<Vec<_>>>()?;
+let decoded_samples = decoded.iter().map(|s| s[0]).collect::<Vec<_>>();
+
+// Play the bitbanged samples from the VCD
+let waveform = Box::new([BitbangEntry::Write(&decoded_samples)]);
+transport
+    .gpio_bitbanging()?
+    .run(&gpio_pins, period, waveform)?;
+```
+
+Similarly, the `vcd_from_edges` function translates the `GpioMonitoring` edge responses to a `Vcd`, an the `vcd_to_edges` performs the inverse operation, creating an equivalent `MonitoringReadResponse`.
+This can be used for example with the UART RX samples:
+
+```rs
+// Read the RX pin samples from `GpioMonitoring`
+let gpio_monitoring = transport.gpio_monitoring()?;
+let start = gpio_monitoring.monitoring_start(&[rx_pin.borrow()])?;
+/* ... */
+let read_response = gpio_monitoring.monitoring_read(&[rx_pin.borrow()], true)?;
+
+// Record it as a VCD to store and decode later
+let clock_nature = gpio_monitoring.get_clock_nature()?;
+let ClockNature::Wallclock { resolution, .. } = clock_nature else {
+    bail!("Could not get clock resolution");
+};
+let pin_names = vec![Some("uart_rx".into())];
+let vcd = vcd_from_edges(
+    pin_names,
+    resolution,
+    start.timestamp,
+    &start.initial_levels,
+    &read_response.events,
+    read_response.timestamp,
+)?;
+let vcd_str = dump_vcd(&vcd)?;
+log::info!("{}", vcd_str);
+
+// Load a VCD from a string
+let vcd = load_vcd(&vcd_str)?;
+
+// To reproduce the exact response, you must provide the same start timestamp,
+// but this only changes the offset of the incoming edges. This should match
+// the timestamp of the start response used by the `UartRxMonitoringDecoder`.
+let decoded = vcd_to_edges(vcd, resolution, start.timestamp)?;
+log::info!("Pin variables: {:?}", decoded.pin_vars);
+
+// Decode the bitbanged samples from the VCD
+let signal_index = 0u8;
+let decoded = monitor_decoder.decode_response(read_response, signal_index, baud_rate)?;
+```
+
+Further examples can be seen in the unit tests in [`vcd.rs`](../src/util/vcd.rs).
diff --git a/sw/host/opentitanlib/opentitantool_derive/src/lib.rs b/sw/host/opentitanlib/opentitantool_derive/src/lib.rs
index b84a7aa00b164..2fcc37d8a19d9 100644
--- a/sw/host/opentitanlib/opentitantool_derive/src/lib.rs
+++ b/sw/host/opentitanlib/opentitantool_derive/src/lib.rs
@@ -4,7 +4,7 @@
 
 use proc_macro2::TokenStream;
 use quote::quote;
-use syn::{parse_macro_input, Data, DataEnum, DeriveInput, Error, Fields, Ident, Result, Variant};
+use syn::{Data, DataEnum, DeriveInput, Error, Fields, Ident, Result, Variant, parse_macro_input};
 
 /// Derives the `CommandDispatch` trait for a NewType enum.
 ///
@@ -31,7 +31,7 @@ use syn::{parse_macro_input, Data, DataEnum, DeriveInput, Error, Fields, Ident,
 ///         &self,
 ///         context: &dyn std::any::Any,
 ///         backend: &mut dyn opentitanlib::transport::Transport
-///     ) -> anyhow::Result<Option<Box<dyn serde_annotate::Annotate>>> {
+///     ) -> anyhow::Result<Option<Box<dyn erased_serde::Serialize>>> {
 ///         match self {
 ///             Hello::World(ref __field) => __field.run(context, backend),
 ///             Hello::People(ref __field) => __field.run(context, backend),
@@ -78,7 +78,7 @@ fn dispatch_enum(name: &Ident, e: &DataEnum) -> Result<TokenStream> {
                     &self,
                     context: &dyn std::any::Any,
                     backend: &opentitanlib::app::TransportWrapper,
-                ) -> anyhow::Result<Option<Box<dyn serde_annotate::Annotate>>> {
+                ) -> anyhow::Result<Option<Box<dyn erased_serde::Serialize>>> {
                     match self {
                         #(#arms),*
                     }
@@ -106,7 +106,7 @@ fn dispatch_variant(name: &Ident, variant: &Variant) -> Result<TokenStream> {
         ));
     }
     Ok(quote! {
-        #name::#ident(ref __field) =>
+        #name::#ident(__field) =>
             opentitanlib::app::command::CommandDispatch::run(__field, context, backend)
     })
 }
diff --git a/sw/host/opentitanlib/src/app/command.rs b/sw/host/opentitanlib/src/app/command.rs
index 06e5ec9a3a2de..5b798ae78680b 100644
--- a/sw/host/opentitanlib/src/app/command.rs
+++ b/sw/host/opentitanlib/src/app/command.rs
@@ -5,7 +5,6 @@
 use crate::app::TransportWrapper;
 use anyhow::Result;
 pub use opentitantool_derive::*;
-use serde_annotate::Annotate;
 use std::any::Any;
 
 /// The `CommandDispatch` trait should be implemented for all leaf structures
@@ -21,5 +20,5 @@ pub trait CommandDispatch {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>>;
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>>;
 }
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_chipwhisperer.json b/sw/host/opentitanlib/src/app/config/hyperdebug_chipwhisperer.json
index 26548de978ef4..7e1bfb7bb2a81 100644
--- a/sw/host/opentitanlib/src/app/config/hyperdebug_chipwhisperer.json
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_chipwhisperer.json
@@ -30,6 +30,8 @@
     },
     {
       "name": "IOA2",
+      "mode": "PushPull",
+      "level": false,
       "alias_of": "CN9_29"
     },
     {
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_cw310.json b/sw/host/opentitanlib/src/app/config/hyperdebug_cw310.json
index d523b58c89361..b84edb649c8d3 100644
--- a/sw/host/opentitanlib/src/app/config/hyperdebug_cw310.json
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_cw310.json
@@ -81,5 +81,34 @@
       "chip_select": "CN10_6",
       "alias_of": "QSPI"
     }
-  ]
+  ],
+  "gpios": [
+    "Ioa0",
+    "Ioa1",
+    "Ioa2",
+    "Ioa3",
+    "Ioa4",
+    "Ioa5",
+    "Ioa6",
+    "Ioa7",
+    "Ioa8",
+    "Iob4",
+    "Iob5",
+    "Iob6",
+    "Ioc0",
+    "Ioc1",
+    "Ioc2",
+    "Ioc5",
+    "Ioc6",
+    "Ioc10",
+    "Ioc11",
+    "Ioc12",
+    "Ior5",
+    "Ior6",
+    "Ior7",
+    "Ior10",
+    "Ior11",
+    "Ior12",
+    "Ior13",
+  ],
 }
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_cw340.json b/sw/host/opentitanlib/src/app/config/hyperdebug_cw340.json
index 9e09431e92a60..5f678fe380b4a 100644
--- a/sw/host/opentitanlib/src/app/config/hyperdebug_cw340.json
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_cw340.json
@@ -7,6 +7,82 @@
       "mode": "OpenDrain",
       "pull_mode": "PullUp",
       "alias_of": "CN10_29"
+    },
+    {
+      "name": "SPI_DEV_SCK",
+      "mode": "Alternate",
+      "alias_of": "CN10_24"
+    },
+    {
+      "name": "SPI_DEV_D0",
+      "mode": "Alternate",
+      "alias_of": "CN10_23"
+    },
+    {
+      "name": "SPI_DEV_D1",
+      "mode": "Alternate",
+      "alias_of": "CN10_10"
+    },
+    {
+      "name": "SPI_DEV_SCK",
+      "mode": "Alternate",
+      "alias_of": "CN10_24"
+    },
+    {
+      "name": "SPI_TPM_SCK",
+      "mode": "Input",
+      "alias_of": "CN7_15"
+    },
+    {
+      "name": "SPI_TPM_MOSI",
+      "mode": "Input",
+      "alias_of": "CN7_14"
+    },
+    {
+      "name": "SPI_TPM_MISO",
+      "mode": "Input",
+      "alias_of": "CN7_12"
+    },
+    {
+      "name": "SPI_TPM_CSB",
+      "mode": "Alternate",
+      "pull_mode": "PullUp",
+      "alias_of": "IOA7"
+    }
+  ],
+  "strappings": [
+    {
+      "name": "SPI_TPM",
+      "pins": [
+        {
+          "name": "SPI_DEV_SCK",
+          "mode": "Input"
+        },
+        {
+          "name": "SPI_DEV_D0",
+          "mode": "Input"
+        },
+        {
+          "name": "SPI_DEV_D1",
+          "mode": "Input"
+        },
+        {
+          "name": "SPI_TPM_SCK",
+          "mode": "Alternate"
+        },
+        {
+          "name": "SPI_TPM_MOSI",
+          "mode": "Alternate"
+        },
+        {
+          "name": "SPI_TPM_MISO",
+          "mode": "Alternate"
+        },
+        {
+          "name": "SPI_TPM_CSB",
+          "mode": "PushPull"
+        }
+      ]
     }
   ],
   "spi": [
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_teacup.json b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup.json
index b2aacc9087fca..92638f26b30a2 100644
--- a/sw/host/opentitanlib/src/app/config/hyperdebug_teacup.json
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup.json
@@ -48,6 +48,8 @@
     },
     {
       "name": "IOA2",
+      "mode": "PushPull",
+      "level": false,
       "alias_of": "CN9_29"
     },
     {
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_bga69.json b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_bga69.json
new file mode 100644
index 0000000000000..c3b3557866b6c
--- /dev/null
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_bga69.json
@@ -0,0 +1,271 @@
+{
+  "includes": [
+      "/__builtin__/opentitan.json"
+  ],
+  "interface": "teacup-bga69",
+  "pins": [
+  // BGA69 Starts here.
+  {
+      "name": "RESET",
+      "mode": "OpenDrain",
+      "level": true,
+      "pull_mode": "PullUp",
+      "alias_of": "CN10_29"
+    },
+    {
+      "name": "DFT_STRAP0",
+      "mode": "Alternate",
+      "alias_of": "IOR5"
+    },
+    {
+      "name": "DFT_STRAP1",
+      "mode": "Alternate",
+      "alias_of": "IOR7"
+    },
+    {
+      "name": "SPI2_CS",
+      "alias_of": "CN9_25"
+    },
+    {
+      "name": "SPI2_SCK",
+      "alias_of": "CN9_27"
+    },
+    {
+      "name": "SPI2_MOSI",
+      "alias_of": "CN9_8"
+    },
+    {
+      "name": "SPI2_MISO",
+      "alias_of": "CN9_10"
+    },
+    {
+      "name": "PMOD1_2",
+      "alias_of": "IOA4"
+    },
+    {
+      "name": "IOR3",
+      "alias_of": "CN7_1"
+    },
+    {
+      "name": "IOR4",
+      "alias_of": "CN9_1"
+    },
+    {
+      "name": "IOR14",
+      "alias_of": "CN10_1"
+    },
+    {
+      "name": "IOR15",
+      "alias_of": "CN10_3"
+    },
+    {
+      "name": "IOR2",
+      "alias_of": "CN10_4"
+    },
+    {
+      "name": "IOC1",
+      "alias_of": "CN7_5"
+    },
+    {
+      "name": "IOC2",
+      "alias_of": "CN8_16"
+    },
+    {
+      "name": "IOR0",
+      "alias_of": "CN7_7"
+    },
+    {
+      "name": "IOC10",
+      "alias_of": "CN10_34"
+    },
+    {
+      "name": "IOA8",
+      "alias_of": "CN7_2"
+    },
+    {
+      "name": "IOA7",
+      "alias_of": "CN7_4"
+    },
+    {
+      "name": "IOR1",
+      "alias_of": "CN7_16"
+    },
+    {
+      "name": "IOB2",
+      "alias_of": "CN7_18"
+    },
+    {
+      "name": "IOB0",
+      "alias_of": "CN7_20"
+    },
+    {
+      "name": "IOB7",
+      "alias_of": "CN8_4"
+    },
+    {
+      "name": "IOA0",
+      "alias_of": "CN8_6"
+    },
+    {
+      "name": "IOA1",
+      "alias_of": "CN8_8"
+    },
+    {
+      "name": "IOA5",
+      "alias_of": "CN8_10"
+    },
+    {
+      "name": "IOA4",
+      "alias_of": "CN8_12"
+    },
+    {
+      "name": "IOC5",
+      "alias_of": "CN8_14"
+    },
+    {
+      "name": "IOB6",
+      "alias_of": "CN9_2"
+    },
+    {
+      "name": "IOB9",
+      "alias_of": "CN9_9"
+    },
+    {
+      "name": "IOB10",
+      "alias_of": "CN9_11"
+    },
+    {
+      "name": "IOC6",
+      "alias_of": "CN9_13"
+    },
+    {
+      "name": "IOA2",
+      "alias_of": "CN9_15"
+    },
+    {
+      "name": "IOC0",
+      "alias_of": "CN9_17"
+    },
+    {
+      "name": "IOB12",
+      "alias_of": "CN9_19"
+    },
+    {
+      "name": "IOB11",
+      "alias_of": "CN9_21"
+    },
+    {
+      "name": "IOC4",
+      "alias_of": "CN9_4"
+    },
+    {
+      "name": "IOC3",
+      "alias_of": "CN9_6"
+    },
+    {
+      "name": "IOR5",
+      "alias_of": "CN9_14"
+    },
+    {
+      "name": "IOR6",
+      "alias_of": "CN9_16"
+    },
+    {
+      "name": "IOR7",
+      "alias_of": "CN9_18"
+    },
+    {
+      "name": "IOR8",
+      "alias_of": "CN9_20"
+    },
+    {
+      "name": "IOR9",
+      "alias_of": "CN9_22"
+    },
+    {
+      "name": "IOR10",
+      "alias_of": "CN9_24"
+    },
+    {
+      "name": "IOR11",
+      "alias_of": "CN9_26"
+    },
+    {
+      "name": "IOR12",
+      "alias_of": "CN10_15"
+    },
+    {
+      "name": "IOR13",
+      "alias_of": "CN9_30"
+    },
+    {
+      "name": "IOC8",
+      "alias_of": "CN10_7"
+    },
+    {
+      "name": "IOB1",
+      "alias_of": "CN10_31"
+    },
+    {
+      "name": "IOA3",
+      "alias_of": "CN10_33"
+    },
+    {
+      "name": "IOA6",
+      "alias_of": "CN10_2"
+    },
+    {
+      "name": "IOC12",
+      "alias_of": "CN7_3"
+    },
+    {
+      "name": "IOB4",
+      "alias_of": "CN10_14"
+    },
+    {
+      "name": "IOB5",
+      "alias_of": "CN10_16"
+    },
+    {
+      "name": "IOB8",
+      "alias_of": "CN10_18"
+    },
+    {
+      "name": "CC2",
+      "alias_of": "CN7_9"
+    },
+    {
+      "name": "CC1",
+      "alias_of": "CN7_10"
+    }
+  ],
+  "spi": [
+    {
+      "name": "BOOTSTRAP",
+      "alias_of": "SPI2"
+    }
+  ],
+  "i2c": [
+    {
+      "name": "DEBUG",
+      "alias_of": "I2C2"
+    },
+    {
+      "name": "SMBUS",
+      "alias_of": "I2C3"
+    }
+  ],
+  "uarts": [
+    {
+      "name": "console",
+      "baudrate": 115200,
+      "parity": "None",
+      "stopbits": "Stop1",
+      "alias_of": "UART2"
+    }
+  ],
+  "provides": {
+    "chip": "opentitan",
+    "testbed_type": "gsc_nt_shield_v2"
+  }
+}
diff --git a/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_default.json b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_default.json
index e4e72b3020913..78d7929d2753c 100644
--- a/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_default.json
+++ b/sw/host/opentitanlib/src/app/config/hyperdebug_teacup_default.json
@@ -36,5 +36,34 @@
         }
       ]
     }
-  ]
+  ],
+  "gpios": [
+    "Ioa0",
+    "Ioa1",
+    // IOA2 is `VBUS_EN_SENSE`
+    "Ioa3",
+    "Ioa4",
+    "Ioa5",
+    "Ioa6",
+    "Ioa7",
+    "Ioa8",
+    "Iob4",
+    "Iob5",
+    "Iob6",
+    "Ioc0",
+    "Ioc1",
+    "Ioc2",
+    "Ioc5",
+    "Ioc6",
+    "Ioc10",
+    "Ioc11",
+    "Ioc12",
+    "Ior5",
+    "Ior6",
+    "Ior7",
+    "Ior10",
+    "Ior11",
+    "Ior12",
+    "Ior13",
+  ],
 }
diff --git a/sw/host/opentitanlib/src/app/config/mod.rs b/sw/host/opentitanlib/src/app/config/mod.rs
index 43c4cba56566f..0eaeee185ebf8 100644
--- a/sw/host/opentitanlib/src/app/config/mod.rs
+++ b/sw/host/opentitanlib/src/app/config/mod.rs
@@ -67,14 +67,17 @@ static BUILTINS: Lazy<HashMap<&'static str, &'static str>> = Lazy::new(|| {
         "/__builtin__/ti50emulator.json" => include_str!("ti50emulator.json"),
         "/__builtin__/opentitan_cw310.json" => include_str!("opentitan_cw310.json"),
         "/__builtin__/opentitan_cw340.json" => include_str!("opentitan_cw340.json"),
+        "/__builtin__/opentitan_ftdi_voyager.json" => include_str!("opentitan_ftdi_voyager.json"),
         "/__builtin__/opentitan.json" => include_str!("opentitan.json"),
         "/__builtin__/hyperdebug.json" => include_str!("hyperdebug.json"),
         "/__builtin__/hyperdebug_chipwhisperer.json" => include_str!("hyperdebug_chipwhisperer.json"),
         "/__builtin__/hyperdebug_cw310.json" => include_str!("hyperdebug_cw310.json"),
         "/__builtin__/hyperdebug_cw340.json" => include_str!("hyperdebug_cw340.json"),
         "/__builtin__/hyperdebug_teacup.json" => include_str!("hyperdebug_teacup.json"),
+        "/__builtin__/hyperdebug_teacup_bga69.json" => include_str!("hyperdebug_teacup_bga69.json"),
         "/__builtin__/hyperdebug_teacup_default.json" => include_str!("hyperdebug_teacup_default.json"),
         "/__builtin__/opentitan_ultradebug.json" => include_str!("opentitan_ultradebug.json"),
         "/__builtin__/opentitan_verilator.json" => include_str!("opentitan_verilator.json"),
+        "/__builtin__/opentitan_qemu.json" => include_str!("opentitan_qemu.json"),
     }
 });
diff --git a/sw/host/opentitanlib/src/app/config/opentitan_ftdi_voyager.json b/sw/host/opentitanlib/src/app/config/opentitan_ftdi_voyager.json
new file mode 100644
index 0000000000000..38a079c575921
--- /dev/null
+++ b/sw/host/opentitanlib/src/app/config/opentitan_ftdi_voyager.json
@@ -0,0 +1,87 @@
+{
+  "includes": ["/__builtin__/opentitan.json"],
+  "interface": "ftdi",
+  "pins": [
+    {
+      "name": "RESET",
+      "mode": "PushPull",
+      "invert": false,
+      "alias_of": "adbus5",
+      "pull_mode": "None"
+    },
+    {
+      "name": "TRST",
+      "mode": "PushPull",
+      "level": false,
+      "alias_of": "adbus4",
+      "pull_mode": "None"
+    },
+    {
+      "name": "IOC0",
+      "alias_of": "bdbus4"
+    },
+    {
+      "name": "IOC1",
+      "alias_of": "bdbus5"
+    },
+    {
+      "name": "IOC2",
+      "alias_of": "bdbus6"
+    },
+    {
+      "name": "MUX_FTDI",
+      "mode": "PushPull",
+      "alias_of": "bdbus7"
+    },
+    {
+      "name": "IOC8",
+      "alias_of": "adbus6"
+    },
+    {
+      "name": "IOC5",
+      "alias_of": "adbus7"
+    },
+    {
+      "name": "SPI_DEV_CSB",
+      "alias_of": "bdbus3"
+    }
+  ],
+  "spi": [
+    {
+      "name": "BOOTSTRAP"
+    }
+  ],
+  "uarts": [
+    {
+      "name": "console",
+      "alias_of": "0"
+    },
+    {
+      "name": "dut",
+      "alias_of": "3"
+    }
+  ],
+  "strappings": [
+    {
+      "name": "ROM_BOOTSTRAP",
+      "pins": [
+        {
+          "name": "SW_STRAP0",
+          "level": true
+        },
+        {
+          "name": "SW_STRAP1",
+          "level": true
+        },
+        {
+          "name": "SW_STRAP2",
+          "level": true
+        },
+        {
+          "name": "MUX_FTDI",
+          "level": true
+        }
+      ]
+    }
+  ]
+}
diff --git a/sw/host/opentitanlib/src/app/config/opentitan_qemu.json b/sw/host/opentitanlib/src/app/config/opentitan_qemu.json
new file mode 100644
index 0000000000000..d35d0c3476252
--- /dev/null
+++ b/sw/host/opentitanlib/src/app/config/opentitan_qemu.json
@@ -0,0 +1,95 @@
+{
+  "interface": "qemu",
+  // QEMU's ROM currently runs slowly due to a hot loop (`sec_mmio` reads and
+  // writes) being placed in a mis-aligned ePMP region. We must set a long
+  // reset delay so that operations like bootstrapping do not try to use IOs
+  // like the SPI before the ROM has set them up.
+  "reset_delay": "1000ms",
+  "pins": [
+    // Resetting is done through the monitor on QEMU, but OpenTitanTool
+    // expects a pin. We map a pin-like interface to ID 255 which can be used
+    // to send reset commands to QEMU when pulled up and down.
+    {
+      "name": "RESET",
+      "alias_of": "255",
+      "level": true,
+    },
+    // VBUS control currently has to go through a special QEMU chardev because
+    // QEMU does not yet implement a real pinmux.
+    {
+      "name": "VBUS_SENSE_EN",
+      "alias_of": "254",
+      "level": false,
+    },
+    // NOTE: these pins are actually going directly to GPIOs, not through pins.
+    // This is okay for straps which have a fixed GPIO, but should not be used
+    // for muxed GPIOs.
+    {
+      "name": "SW_STRAP0",
+      "mode": "PushPull",
+      "level": false,
+      "pull_mode": "None",
+      "alias_of": "22"
+    },
+    {
+      "name": "SW_STRAP1",
+      "mode": "PushPull",
+      "level": false,
+      "pull_mode": "None",
+      "alias_of": "23"
+    },
+    {
+      "name": "SW_STRAP2",
+      "mode": "PushPull",
+      "level": false,
+      "pull_mode": "None",
+      "alias_of": "24"
+    },
+  ],
+  "strappings": [
+    {
+      "name": "RESET",
+      "pins": [
+        {
+          "name": "RESET",
+          "level": false
+        }
+      ]
+    },
+    {
+      "name": "ROM_BOOTSTRAP",
+      "pins": [
+        {
+          "name": "SW_STRAP0",
+          "level": true
+        },
+        {
+          "name": "SW_STRAP1",
+          "level": true
+        },
+        {
+          "name": "SW_STRAP2",
+          "level": true
+        }
+      ]
+    },
+    {
+      "name": "PINMUX_TAP_RISCV",
+      // QEMU does not currently model TAP straps, the JTAG interfaces are always available.
+      // For now we model this strap as a no-op without any pins.
+      "pins": [],
+    },
+    {
+      "name": "SPI_TPM"
+    }
+  ],
+  "uarts": [
+    {
+      "name": "console",
+      "alias_of": "0"
+    }
+  ],
+  "provides": {
+    "chip": "opentitan",
+  }
+}
diff --git a/sw/host/opentitanlib/src/app/config/structs.rs b/sw/host/opentitanlib/src/app/config/structs.rs
index 1c9ff7332c832..36c9243b6844b 100644
--- a/sw/host/opentitanlib/src/app/config/structs.rs
+++ b/sw/host/opentitanlib/src/app/config/structs.rs
@@ -4,11 +4,13 @@
 
 //! Schema for configuration files, exact encoding json/xml to be worked out.
 
+use std::collections::HashMap;
+use std::time::Duration;
+
 use crate::io::gpio::{PinMode, PullMode};
 use crate::io::spi::TransferMode;
 
 use serde::Deserialize;
-use std::collections::HashMap;
 
 /// Configuration of a particular GPIO pin.
 #[derive(Deserialize, Clone, Debug)]
@@ -162,6 +164,10 @@ pub struct ConfigurationFile {
     /// configuration files), in order for it to make sense to use this file.
     #[serde(default)]
     pub requires: HashMap<String, String>,
+    /// Duration of time to assert reset and wait after de-asserting reset.
+    #[serde(default)]
+    #[serde(with = "humantime_serde")]
+    pub reset_delay: Option<Duration>,
     /// List of GPIO pin configurations.
     #[serde(default)]
     pub pins: Vec<PinConfiguration>,
@@ -180,4 +186,7 @@ pub struct ConfigurationFile {
     /// List of IO expander chips.
     #[serde(default)]
     pub io_expanders: Vec<IoExpander>,
+    /// List of GPIO pins.
+    #[serde(default)]
+    pub gpios: Vec<String>,
 }
diff --git a/sw/host/opentitanlib/src/app/mod.rs b/sw/host/opentitanlib/src/app/mod.rs
index 491aa1a732f43..ba0ce8859733d 100644
--- a/sw/host/opentitanlib/src/app/mod.rs
+++ b/sw/host/opentitanlib/src/app/mod.rs
@@ -20,17 +20,17 @@ use crate::io::nonblocking_help::NonblockingHelp;
 use crate::io::spi::{Target, TransferMode};
 use crate::io::uart::Uart;
 use crate::transport::{
-    ioexpander, Capability, ProgressIndicator, ProxyOps, Transport, TransportError,
-    TransportInterfaceType,
+    Capability, ProgressIndicator, ProxyOps, Transport, TransportError, TransportInterfaceType,
+    ioexpander,
 };
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use indicatif::{ProgressBar, ProgressStyle};
-use serde_annotate::Annotate;
+
 use std::any::Any;
 use std::cell::{Cell, RefCell};
 use std::collections::hash_map::Entry;
-use std::collections::HashMap;
+use std::collections::{HashMap, HashSet};
 use std::path::PathBuf;
 use std::rc::Rc;
 use std::time::Duration;
@@ -194,6 +194,7 @@ pub struct I2cConfiguration {
 pub struct TransportWrapperBuilder {
     interface: String,
     disable_dft_on_reset: bool,
+    reset_delay: Duration,
     openocd_adapter_config: Option<PathBuf>,
     provides_list: Vec<(String, String)>,
     requires_list: Vec<(String, String)>,
@@ -205,6 +206,7 @@ pub struct TransportWrapperBuilder {
     i2c_conf_map: HashMap<String, config::I2cConfiguration>,
     strapping_conf_map: HashMap<String, Vec<(String, PinConfiguration)>>,
     io_expander_conf_map: HashMap<String, config::IoExpander>,
+    gpio_conf: HashSet<String>,
 }
 
 // This is the structure to be passed to each Command implementation,
@@ -213,6 +215,7 @@ pub struct TransportWrapperBuilder {
 pub struct TransportWrapper {
     transport: Rc<dyn Transport>,
     disable_dft_on_reset: Cell<bool>,
+    reset_delay: Cell<Duration>,
     openocd_adapter_config: Option<PathBuf>,
     provides_map: HashMap<String, String>,
     pin_map: HashMap<String, String>,
@@ -222,6 +225,7 @@ pub struct TransportWrapper {
     spi_conf_map: HashMap<String, SpiConfiguration>,
     i2c_conf_map: HashMap<String, I2cConfiguration>,
     strapping_conf_map: HashMap<String, HashMap<String, PinConfiguration>>,
+    gpio_conf: HashSet<String>,
     //
     // Below fields are lazily populated, as instances are requested.
     //
@@ -242,6 +246,7 @@ impl TransportWrapperBuilder {
         Self {
             interface,
             disable_dft_on_reset,
+            reset_delay: Duration::from_millis(100),
             openocd_adapter_config: None,
             provides_list: Vec::new(),
             requires_list: Vec::new(),
@@ -253,6 +258,7 @@ impl TransportWrapperBuilder {
             i2c_conf_map: HashMap::new(),
             strapping_conf_map: HashMap::new(),
             io_expander_conf_map: HashMap::new(),
+            gpio_conf: HashSet::new(),
         }
     }
 
@@ -347,6 +353,11 @@ impl TransportWrapperBuilder {
         for (key, value) in file.requires {
             self.requires_list.push((key, value));
         }
+
+        if let Some(reset_delay) = file.reset_delay {
+            self.reset_delay = reset_delay;
+        }
+
         // Merge content of configuration file into pin_map and other members.
         for pin_conf in file.pins {
             if let Some(alias_of) = &pin_conf.alias_of {
@@ -435,6 +446,9 @@ impl TransportWrapperBuilder {
                 )),
             }
         }
+        for pin in file.gpios {
+            self.gpio_conf.insert(pin);
+        }
         Ok(())
     }
 
@@ -636,6 +650,7 @@ impl TransportWrapperBuilder {
         let mut transport_wrapper = TransportWrapper {
             transport: Rc::from(transport),
             disable_dft_on_reset: Cell::new(self.disable_dft_on_reset),
+            reset_delay: Cell::new(self.reset_delay),
             openocd_adapter_config: self.openocd_adapter_config,
             provides_map,
             pin_map: self.pin_alias_map,
@@ -645,6 +660,7 @@ impl TransportWrapperBuilder {
             spi_conf_map,
             i2c_conf_map,
             strapping_conf_map,
+            gpio_conf: self.gpio_conf,
             pin_instance_map: RefCell::new(HashMap::new()),
             spi_physical_map: RefCell::new(HashMap::new()),
             spi_logical_map: RefCell::new(HashMap::new()),
@@ -841,6 +857,10 @@ impl TransportWrapper {
         Ok(result)
     }
 
+    pub fn gpios(&self) -> &HashSet<String> {
+        &self.gpio_conf
+    }
+
     /// Returns a [`GpioMonitoring`] implementation.
     pub fn gpio_monitoring(&self) -> Result<Rc<dyn GpioMonitoring>> {
         self.transport.gpio_monitoring()
@@ -887,7 +907,7 @@ impl TransportWrapper {
     }
 
     /// Invoke non-standard functionality of some Transport implementations.
-    pub fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn Annotate>>> {
+    pub fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         self.transport.dispatch(action)
     }
 
@@ -967,30 +987,58 @@ impl TransportWrapper {
         Ok(())
     }
 
+    #[deprecated = "use [`reset`] or [`reset_with_delay`]"]
     pub fn reset_target(&self, reset_delay: Duration, clear_uart_rx: bool) -> Result<()> {
+        let uart_rx = match clear_uart_rx {
+            true => UartRx::Clear,
+            false => UartRx::Keep,
+        };
+        self.reset_with_delay(uart_rx, reset_delay)
+    }
+
+    /// Reset the target, optionally clearing the console UART RX.
+    pub fn reset(&self, uart_rx: UartRx) -> Result<()> {
+        self.reset_with_delay(uart_rx, self.reset_delay.get())
+    }
+
+    /// Reset the target with some delay, optionally clearing the console UART RX.
+    pub fn reset_with_delay(&self, uart_rx: UartRx, delay: Duration) -> Result<()> {
         log::info!("Asserting the reset signal");
+
         if self.disable_dft_on_reset.get() {
             self.pin_strapping("PRERESET_DFT_DISABLE")?.apply()?;
         }
+
         self.pin_strapping("RESET")?.apply()?;
-        std::thread::sleep(reset_delay);
-        if clear_uart_rx {
+        std::thread::sleep(delay);
+
+        if uart_rx == UartRx::Clear {
             log::info!("Clearing the UART RX buffer");
             self.uart("console")?.clear_rx_buffer()?;
         }
+
         log::info!("Deasserting the reset signal");
         self.pin_strapping("RESET")?.remove()?;
+
         if self.disable_dft_on_reset.get() {
             std::thread::sleep(Duration::from_millis(10));
             // We remove the DFT strapping after waiting some time, as the DFT straps should have been
             // sampled by then and we can resume our desired pin configuration.
             self.pin_strapping("PRERESET_DFT_DISABLE")?.remove()?;
         }
-        std::thread::sleep(reset_delay);
+
+        std::thread::sleep(delay);
+
         Ok(())
     }
 }
 
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UartRx {
+    Clear,
+    Keep,
+}
+
 /// Given an pin/uart/spi/i2c port name, if the name is a known alias, return the underlying
 /// name/number, otherwise return the string as is.
 fn map_name(map: &HashMap<String, String>, name: &str) -> String {
diff --git a/sw/host/opentitanlib/src/app/spi.rs b/sw/host/opentitanlib/src/app/spi.rs
index 6887df696fe41..d31048fcd5bde 100644
--- a/sw/host/opentitanlib/src/app/spi.rs
+++ b/sw/host/opentitanlib/src/app/spi.rs
@@ -205,6 +205,13 @@ impl Target for LogicalSpiWrapper {
         self.physical_wrapper.underlying_target.set_voltage(voltage)
     }
 
+    fn get_flashrom_programmer(&self) -> Result<String> {
+        self.apply_settings_to_underlying()?;
+        self.physical_wrapper
+            .underlying_target
+            .get_flashrom_programmer()
+    }
+
     fn run_transaction(&self, transaction: &mut [spi::Transfer]) -> Result<()> {
         self.apply_settings_to_underlying()?;
         self.physical_wrapper
diff --git a/sw/host/opentitanlib/src/backend/chip_whisperer.rs b/sw/host/opentitanlib/src/backend/chip_whisperer.rs
index 9064bf4aeae4a..499f1d67cdf17 100644
--- a/sw/host/opentitanlib/src/backend/chip_whisperer.rs
+++ b/sw/host/opentitanlib/src/backend/chip_whisperer.rs
@@ -6,9 +6,9 @@ use anyhow::Result;
 use clap::Args;
 
 use crate::backend::BackendOpts;
-use crate::transport::chip_whisperer::board::Board;
-use crate::transport::chip_whisperer::ChipWhisperer;
 use crate::transport::Transport;
+use crate::transport::chip_whisperer::ChipWhisperer;
+use crate::transport::chip_whisperer::board::Board;
 
 #[derive(Debug, Args)]
 pub struct ChipWhispererOpts {
diff --git a/sw/host/opentitanlib/src/backend/ftdi.rs b/sw/host/opentitanlib/src/backend/ftdi.rs
new file mode 100644
index 0000000000000..fe74cbfc4d513
--- /dev/null
+++ b/sw/host/opentitanlib/src/backend/ftdi.rs
@@ -0,0 +1,14 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+
+use crate::backend::BackendOpts;
+use crate::transport::Transport;
+use crate::transport::ftdi::Ftdi;
+use crate::transport::ftdi::chip::Chip;
+
+pub fn create<C: Chip + 'static>(_args: &BackendOpts) -> Result<Box<dyn Transport>> {
+    Ok(Box::new(Ftdi::<C>::new()?))
+}
diff --git a/sw/host/opentitanlib/src/backend/hyperdebug.rs b/sw/host/opentitanlib/src/backend/hyperdebug.rs
index 1a1513eb240ce..e26f845e1c974 100644
--- a/sw/host/opentitanlib/src/backend/hyperdebug.rs
+++ b/sw/host/opentitanlib/src/backend/hyperdebug.rs
@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::transport::hyperdebug::{Flavor, Hyperdebug, HyperdebugDfu};
 use crate::transport::Transport;
+use crate::transport::hyperdebug::{Flavor, Hyperdebug, HyperdebugDfu};
 use anyhow::Result;
 
 use crate::backend::BackendOpts;
diff --git a/sw/host/opentitanlib/src/backend/mod.rs b/sw/host/opentitanlib/src/backend/mod.rs
index d6f1dcf8e4eff..1ed477020e392 100644
--- a/sw/host/opentitanlib/src/backend/mod.rs
+++ b/sw/host/opentitanlib/src/backend/mod.rs
@@ -11,18 +11,21 @@ use crate::app::config::process_config_file;
 use crate::app::{TransportWrapper, TransportWrapperBuilder};
 use crate::transport::chip_whisperer::board::{Cw310, Cw340};
 use crate::transport::dediprog::Dediprog;
+use crate::transport::ftdi::chip::Ft4232hq;
 use crate::transport::hyperdebug::{
     C2d2Flavor, ChipWhispererFlavor, ServoMicroFlavor, StandardFlavor, Ti50Flavor,
 };
 use crate::transport::{EmptyTransport, Transport};
 use crate::util::parse_int::ParseInt;
 
-mod chip_whisperer;
+pub mod chip_whisperer;
+mod ftdi;
 mod hyperdebug;
-mod proxy;
-mod ti50emulator;
+pub mod proxy;
+pub mod qemu;
+pub mod ti50emulator;
 mod ultradebug;
-mod verilator;
+pub mod verilator;
 
 #[derive(Debug, Args)]
 pub struct BackendOpts {
@@ -59,6 +62,9 @@ pub struct BackendOpts {
     #[command(flatten)]
     pub ti50emulator_opts: ti50emulator::Ti50EmulatorOpts,
 
+    #[command(flatten)]
+    pub qemu_opts: Option<qemu::QemuOpts>,
+
     /// Configuration files.
     #[arg(long, num_args = 1)]
     pub conf: Vec<PathBuf>,
@@ -108,6 +114,10 @@ pub fn create(args: &BackendOpts) -> Result<TransportWrapper> {
             hyperdebug::create::<StandardFlavor>(args)?,
             Some(Path::new("/__builtin__/hyperdebug_teacup_default.json")),
         ),
+        "teacup-bga69" => (
+            hyperdebug::create::<StandardFlavor>(args)?,
+            Some(Path::new("/__builtin__/hyperdebug_teacup_bga69.json")),
+        ),
         "hyper340" => (
             hyperdebug::create::<ChipWhispererFlavor<Cw340>>(args)?,
             Some(Path::new("/__builtin__/hyperdebug_cw340.json")),
@@ -131,6 +141,10 @@ pub fn create(args: &BackendOpts) -> Result<TransportWrapper> {
             chip_whisperer::create::<Cw340>(args)?,
             Some(Path::new("/__builtin__/opentitan_cw340.json")),
         ),
+        "ftdi" => (
+            ftdi::create::<Ft4232hq>(args)?,
+            Some(Path::new("/__builtin__/opentitan_ftdi_voyager.json")),
+        ),
         "dediprog" => {
             let dediprog: Box<dyn Transport> = Box::new(Dediprog::new(
                 args.usb_vid,
@@ -139,6 +153,10 @@ pub fn create(args: &BackendOpts) -> Result<TransportWrapper> {
             )?);
             (dediprog, Some(Path::new("/__builtin__/dediprog.json")))
         }
+        "qemu" => (
+            qemu::create(args.qemu_opts.as_ref().unwrap())?,
+            Some(Path::new("/__builtin__/opentitan_qemu.json")),
+        ),
         _ => return Err(Error::UnknownInterface(interface.to_string()).into()),
     };
     if args.conf.is_empty() {
diff --git a/sw/host/opentitanlib/src/backend/proxy.rs b/sw/host/opentitanlib/src/backend/proxy.rs
index dc882d3be2de3..e3cc766dfbf05 100644
--- a/sw/host/opentitanlib/src/backend/proxy.rs
+++ b/sw/host/opentitanlib/src/backend/proxy.rs
@@ -5,15 +5,15 @@
 use anyhow::Result;
 use clap::Args;
 
-use crate::transport::proxy::Proxy;
 use crate::transport::Transport;
+use crate::transport::proxy::Proxy;
 
 #[derive(Debug, Args)]
 pub struct ProxyOpts {
     #[arg(long)]
-    proxy: Option<String>,
+    pub proxy: Option<String>,
     #[arg(long, default_value = "9900")]
-    port: u16,
+    pub port: u16,
 }
 
 pub fn create(args: &ProxyOpts) -> Result<Box<dyn Transport>> {
diff --git a/sw/host/opentitanlib/src/backend/qemu.rs b/sw/host/opentitanlib/src/backend/qemu.rs
new file mode 100644
index 0000000000000..e50de93b96a07
--- /dev/null
+++ b/sw/host/opentitanlib/src/backend/qemu.rs
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::path::PathBuf;
+
+use anyhow::Result;
+use clap::Args;
+
+use crate::transport::Transport;
+use crate::transport::qemu::Qemu;
+
+#[derive(Clone, Debug, Args)]
+pub struct QemuOpts {
+    /// Path to the TTY connected to the QEMU monitor.
+    ///
+    /// Must be configured in `control`/QMP mode (the JSON protocol).
+    #[arg(long, required_if_eq("interface", "qemu"))]
+    pub qemu_monitor_tty: Option<PathBuf>,
+
+    /// Quit QEMU when finished.
+    #[arg(long, default_value_t = false)]
+    pub qemu_quit: bool,
+}
+
+pub fn create(args: &QemuOpts) -> Result<Box<dyn Transport>> {
+    Ok(Box::new(Qemu::from_options(args.clone())?))
+}
diff --git a/sw/host/opentitanlib/src/backend/ti50emulator.rs b/sw/host/opentitanlib/src/backend/ti50emulator.rs
index 4ce62c1ca834e..13164744cbc3e 100644
--- a/sw/host/opentitanlib/src/backend/ti50emulator.rs
+++ b/sw/host/opentitanlib/src/backend/ti50emulator.rs
@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::transport::ti50emulator::Ti50Emulator;
 use crate::transport::Transport;
+use crate::transport::ti50emulator::Ti50Emulator;
 use anyhow::Result;
 use clap::Args;
 use std::path::PathBuf;
@@ -12,13 +12,13 @@ use std::str::FromStr;
 #[derive(Debug, Args)]
 pub struct Ti50EmulatorOpts {
     #[arg(long, default_value = "ti50")]
-    instance_prefix: String,
+    pub instance_prefix: String,
 
     #[arg(long, value_parser = PathBuf::from_str, default_value = "")]
-    executable_directory: PathBuf,
+    pub executable_directory: PathBuf,
 
     #[arg(long, default_value = "")]
-    executable: String,
+    pub executable: String,
 }
 
 pub fn create(args: &Ti50EmulatorOpts) -> Result<Box<dyn Transport>> {
diff --git a/sw/host/opentitanlib/src/backend/ultradebug.rs b/sw/host/opentitanlib/src/backend/ultradebug.rs
index 16a5addde2d90..9a2d94b3a7015 100644
--- a/sw/host/opentitanlib/src/backend/ultradebug.rs
+++ b/sw/host/opentitanlib/src/backend/ultradebug.rs
@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::transport::ultradebug::Ultradebug;
 use crate::transport::Transport;
+use crate::transport::ultradebug::Ultradebug;
 use anyhow::Result;
 
 use crate::backend::BackendOpts;
diff --git a/sw/host/opentitanlib/src/backend/verilator.rs b/sw/host/opentitanlib/src/backend/verilator.rs
index ae54ec5a83c6b..87b4137766403 100644
--- a/sw/host/opentitanlib/src/backend/verilator.rs
+++ b/sw/host/opentitanlib/src/backend/verilator.rs
@@ -7,27 +7,27 @@ use clap::Args;
 use humantime::parse_duration;
 use std::time::Duration;
 
-use crate::transport::verilator::{Options, Verilator};
 use crate::transport::Transport;
+use crate::transport::verilator::{Options, Verilator};
 
 #[derive(Debug, Args)]
 pub struct VerilatorOpts {
     #[arg(long, default_value_t)]
-    verilator_bin: String,
+    pub verilator_bin: String,
 
     #[arg(long, default_value_t)]
-    verilator_rom: String,
+    pub verilator_rom: String,
     #[arg(long, required = false)]
-    verilator_flash: Vec<String>,
+    pub verilator_flash: Vec<String>,
     #[arg(long, default_value_t)]
-    verilator_otp: String,
+    pub verilator_otp: String,
 
     #[arg(long, required = false)]
-    verilator_args: Vec<String>,
+    pub verilator_args: Vec<String>,
 
     /// Verilator startup timeout.
     #[arg(long, value_parser = parse_duration, default_value = "60s")]
-    verilator_timeout: Duration,
+    pub verilator_timeout: Duration,
 }
 
 pub fn create(args: &VerilatorOpts) -> Result<Box<dyn Transport>> {
diff --git a/sw/host/opentitanlib/src/bootstrap/legacy.rs b/sw/host/opentitanlib/src/bootstrap/legacy.rs
index f84236ff963d2..dcfd39fc3a6e5 100644
--- a/sw/host/opentitanlib/src/bootstrap/legacy.rs
+++ b/sw/host/opentitanlib/src/bootstrap/legacy.rs
@@ -6,7 +6,7 @@ use anyhow::Result;
 use sha2::{Digest, Sha256};
 use std::time::Duration;
 use thiserror::Error;
-use zerocopy::AsBytes;
+use zerocopy::{Immutable, IntoBytes};
 
 use crate::app::TransportWrapper;
 use crate::bootstrap::{Bootstrap, BootstrapOptions, UpdateProtocol};
@@ -14,7 +14,7 @@ use crate::impl_serializable_error;
 use crate::io::spi::Transfer;
 use crate::transport::{Capability, ProgressIndicator};
 
-#[derive(AsBytes, Debug, Default)]
+#[derive(Immutable, IntoBytes, Debug, Default)]
 #[repr(C)]
 struct FrameHeader {
     hash: [u8; Frame::HASH_LEN],
@@ -22,7 +22,7 @@ struct FrameHeader {
     flash_offset: u32,
 }
 
-#[derive(AsBytes, Debug)]
+#[derive(Immutable, IntoBytes, Debug)]
 #[repr(C)]
 struct Frame {
     header: FrameHeader,
diff --git a/sw/host/opentitanlib/src/bootstrap/legacy_rescue.rs b/sw/host/opentitanlib/src/bootstrap/legacy_rescue.rs
index fd7f8d53a45b6..97f45e2fe564f 100644
--- a/sw/host/opentitanlib/src/bootstrap/legacy_rescue.rs
+++ b/sw/host/opentitanlib/src/bootstrap/legacy_rescue.rs
@@ -2,19 +2,19 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use sha2::{Digest, Sha256};
 use std::time::{Duration, Instant};
 use thiserror::Error;
-use zerocopy::AsBytes;
+use zerocopy::{Immutable, IntoBytes};
 
-use crate::app::TransportWrapper;
+use crate::app::{TransportWrapper, UartRx};
 use crate::bootstrap::{Bootstrap, BootstrapOptions, UpdateProtocol};
 use crate::impl_serializable_error;
 use crate::io::uart::Uart;
 use crate::transport::{Capability, ProgressIndicator};
 
-#[derive(AsBytes, Debug, Default)]
+#[derive(Immutable, IntoBytes, Debug, Default)]
 #[repr(C)]
 struct FrameHeader {
     hash: [u8; Frame::HASH_LEN],
@@ -22,7 +22,7 @@ struct FrameHeader {
     flash_offset: u32,
 }
 
-#[derive(AsBytes, Debug)]
+#[derive(Immutable, IntoBytes, Debug)]
 #[repr(C)]
 struct Frame {
     header: FrameHeader,
@@ -253,16 +253,12 @@ impl LegacyRescue {
 
     /// Reset the chip and send the magic 'r' character at the opportune moment during boot in
     /// order to enter rescue more, repeat if necessary.
-    fn enter_rescue_mode(&self, container: &Bootstrap, uart: &dyn Uart) -> Result<()> {
+    fn enter_rescue_mode(&self, transport: &TransportWrapper, uart: &dyn Uart) -> Result<()> {
         // Attempt getting the attention of the bootloader.
         let timeout = Duration::from_millis(2000);
         for _ in 0..Self::MAX_CONSECUTIVE_ERRORS {
             eprint!("Resetting...");
-            container.reset_pin.write(false)?; // Low active
-            uart.write(&[3])?; // Send a character to ensure that HyperDebug UART->USB
-                               // forwarding has "woken up", see issue #19564.
-            self.flush_rx(uart, container.reset_delay);
-            container.reset_pin.write(true)?; // Release reset
+            transport.reset(UartRx::Clear)?;
 
             let stopwatch = Instant::now();
             while stopwatch.elapsed() < timeout {
@@ -320,7 +316,7 @@ impl UpdateProtocol for LegacyRescue {
         let frames = Frame::from_payload(payload)?;
         let uart = container.uart_params.create(transport)?;
 
-        self.enter_rescue_mode(container, &*uart)?;
+        self.enter_rescue_mode(transport, &*uart)?;
 
         // Send frames one at a time.
         progress.new_stage("", frames.len() * Frame::DATA_LEN);
@@ -363,11 +359,12 @@ impl UpdateProtocol for LegacyRescue {
         }
 
         // Reset, in order to leave rescue mode.
-        container.reset_pin.write(false)?; // Low active
-        if !container.leave_in_reset {
-            std::thread::sleep(container.reset_delay);
-            container.reset_pin.write(true)?; // Release reset
+        if container.leave_in_reset {
+            container.reset_pin.write(false)?; // Low active
+        } else {
+            transport.reset(UartRx::Keep)?;
         }
+
         progress.progress(frames.len() * Frame::DATA_LEN);
         eprintln!("Success!");
         Ok(())
diff --git a/sw/host/opentitanlib/src/bootstrap/mod.rs b/sw/host/opentitanlib/src/bootstrap/mod.rs
index e013517da8d90..390a839379722 100644
--- a/sw/host/opentitanlib/src/bootstrap/mod.rs
+++ b/sw/host/opentitanlib/src/bootstrap/mod.rs
@@ -2,15 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use std::rc::Rc;
+use std::time::Duration;
+
 use anyhow::Result;
 use clap::{Args, ValueEnum};
 use humantime::parse_duration;
 use serde::{Deserialize, Serialize};
-use std::rc::Rc;
-use std::time::Duration;
 use thiserror::Error;
 
-use crate::app::{NoProgressBar, TransportWrapper};
+use crate::app::{NoProgressBar, TransportWrapper, UartRx};
 use crate::impl_serializable_error;
 use crate::io::gpio::GpioPin;
 use crate::io::spi::SpiParams;
@@ -85,9 +86,6 @@ pub struct BootstrapOptions {
     /// Whether to reset target and clear UART RX buffer after bootstrap. For Chip Whisperer board only.
     #[arg(long)]
     pub clear_uart: Option<bool>,
-    /// Duration of the reset pulse.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
     /// If set, keep the bootstrap strapping applied and do not perform the post-bootstrap reset
     /// sequence.
     #[arg(long)]
@@ -110,7 +108,6 @@ pub struct Bootstrap<'a> {
     pub uart_params: &'a UartParams,
     pub spi_params: &'a SpiParams,
     reset_pin: Rc<dyn GpioPin>,
-    reset_delay: Duration,
     leave_in_reset: bool,
     leave_in_bootstrap: bool,
 }
@@ -163,7 +160,6 @@ impl<'a> Bootstrap<'a> {
             uart_params: &options.uart_params,
             spi_params: &options.spi_params,
             reset_pin: transport.gpio_pin("RESET")?,
-            reset_delay: options.reset_delay,
             leave_in_reset: options.leave_in_reset,
             leave_in_bootstrap: options.leave_in_bootstrap,
         }
@@ -184,7 +180,11 @@ impl<'a> Bootstrap<'a> {
         if perform_bootstrap_reset {
             log::info!("Asserting bootstrap pins...");
             rom_boot_strapping.apply()?;
-            transport.reset_target(self.reset_delay, self.clear_uart_rx)?;
+            let uart_rx = match self.clear_uart_rx {
+                true => UartRx::Clear,
+                false => UartRx::Keep,
+            };
+            transport.reset(uart_rx)?;
             log::info!("Performing bootstrap...");
         }
         let result = updater.update(self, transport, payload, progress);
@@ -203,7 +203,7 @@ impl<'a> Bootstrap<'a> {
                 rom_boot_strapping.remove()?;
                 // Don't clear the UART RX buffer after bootstrap to preserve the bootstrap
                 // output.
-                transport.reset_target(self.reset_delay, false)?;
+                transport.reset(UartRx::Keep)?;
             }
         }
         result
diff --git a/sw/host/opentitanlib/src/bootstrap/primitive.rs b/sw/host/opentitanlib/src/bootstrap/primitive.rs
index 5651fe70459fe..3418060f0f43e 100644
--- a/sw/host/opentitanlib/src/bootstrap/primitive.rs
+++ b/sw/host/opentitanlib/src/bootstrap/primitive.rs
@@ -5,14 +5,14 @@
 use anyhow::Result;
 use sha2::{Digest, Sha256};
 use std::time::Duration;
-use zerocopy::AsBytes;
+use zerocopy::{Immutable, IntoBytes};
 
 use crate::app::TransportWrapper;
 use crate::bootstrap::{Bootstrap, BootstrapOptions, UpdateProtocol};
 use crate::io::spi::Transfer;
 use crate::transport::{Capability, ProgressIndicator};
 
-#[derive(AsBytes, Debug, Default)]
+#[derive(Immutable, IntoBytes, Debug, Default)]
 #[repr(C)]
 struct FrameHeader {
     hash: [u8; Frame::HASH_LEN],
@@ -20,7 +20,7 @@ struct FrameHeader {
     flash_offset: u32,
 }
 
-#[derive(AsBytes, Debug)]
+#[derive(Immutable, IntoBytes, Debug)]
 #[repr(C)]
 struct Frame {
     header: FrameHeader,
@@ -63,7 +63,7 @@ impl Frame {
     /// Creates a sequence of frames based on a `payload` binary.
     fn from_payload(payload: &[u8]) -> Vec<Frame> {
         let mut frames = Vec::new();
-        let last_frame = (payload.len() + Frame::DATA_LEN - 1) / Frame::DATA_LEN - 1;
+        let last_frame = payload.len().div_ceil(Frame::DATA_LEN) - 1;
         for (i, chunk) in payload.chunks(Frame::DATA_LEN).enumerate() {
             let mut frame = Frame {
                 header: FrameHeader {
diff --git a/sw/host/opentitanlib/src/chip/boot_log.rs b/sw/host/opentitanlib/src/chip/boot_log.rs
index b6211f7041171..c0324448d4789 100644
--- a/sw/host/opentitanlib/src/chip/boot_log.rs
+++ b/sw/host/opentitanlib/src/chip/boot_log.rs
@@ -9,15 +9,16 @@ use serde_annotate::Annotate;
 use sha2::{Digest, Sha256};
 use std::convert::TryFrom;
 
-use super::boot_svc::BootSlot;
 use super::ChipDataError;
+use super::boot_svc::BootSlot;
+use crate::chip::boolean::HardenedBool;
 use crate::with_unknown;
 
 with_unknown! {
-    pub enum OwnershipState: u32 [default = Self::None] {
-        None = 0,
+    pub enum OwnershipState: u32 [default = Self::Recovery] {
+        Recovery = 0,
         LockedOwner = 0x444e574f,
-        LockedUpdate = 0x4450554c,
+        UnlockedSelf = 0x464c5355,
         UnlockedAny = 0x594e4155,
         UnlockedEndorsed = 0x444e4555,
     }
@@ -53,9 +54,19 @@ pub struct BootLog {
     pub bl0_slot: BootSlot,
     /// The chip's ownership state.
     pub ownership_state: OwnershipState,
+    /// The number of ownership transfers performed on this chip.
+    pub ownership_transfers: u32,
+    /// Minimum security version permitted for ROM_EXT payloads.
+    pub rom_ext_min_sec_ver: u32,
+    /// Minimum security version permitted for application payloads.
+    pub bl0_min_sec_ver: u32,
+    /// The primary BL0 boot slot.
+    pub primary_bl0_slot: BootSlot,
+    /// Whether the retention RAM was initialized on this boot.
+    pub retention_ram_initialized: HardenedBool,
     /// Reserved for future use.
     #[annotate(format=hex)]
-    pub reserved: [u32; 13],
+    pub reserved: [u32; 8],
 }
 
 impl TryFrom<&[u8]> for BootLog {
@@ -79,6 +90,11 @@ impl TryFrom<&[u8]> for BootLog {
         val.rom_ext_nonce = reader.read_u64::<LittleEndian>()?;
         val.bl0_slot = BootSlot(reader.read_u32::<LittleEndian>()?);
         val.ownership_state = OwnershipState(reader.read_u32::<LittleEndian>()?);
+        val.ownership_transfers = reader.read_u32::<LittleEndian>()?;
+        val.rom_ext_min_sec_ver = reader.read_u32::<LittleEndian>()?;
+        val.bl0_min_sec_ver = reader.read_u32::<LittleEndian>()?;
+        val.primary_bl0_slot = BootSlot(reader.read_u32::<LittleEndian>()?);
+        val.retention_ram_initialized = HardenedBool(reader.read_u32::<LittleEndian>()?);
         reader.read_u32_into::<LittleEndian>(&mut val.reserved)?;
         Ok(val)
     }
diff --git a/sw/host/opentitanlib/src/chip/boot_svc.rs b/sw/host/opentitanlib/src/chip/boot_svc.rs
index f63ba9198f8ee..c4ade7a6e9e09 100644
--- a/sw/host/opentitanlib/src/chip/boot_svc.rs
+++ b/sw/host/opentitanlib/src/chip/boot_svc.rs
@@ -7,12 +7,15 @@ use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
 use serde::Serialize;
 use serde_annotate::Annotate;
 use sha2::{Digest, Sha256};
+use sphincsplus::SpxSecretKey;
 use std::convert::TryFrom;
 use std::io::{Read, Write};
 
 use super::ChipDataError;
 use crate::chip::boolean::HardenedBool;
+use crate::chip::rom_error::RomError;
 use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature};
+use crate::ownership::{DetachedSignature, OwnershipKeyAlg};
 use crate::with_unknown;
 
 with_unknown! {
@@ -20,6 +23,7 @@ with_unknown! {
         Unknown = 0,
         SlotA = u32::from_le_bytes(*b"AA__"),
         SlotB = u32::from_le_bytes(*b"__BB"),
+        Unspecified = u32::from_le_bytes(*b"UUUU"),
     }
 
     /// The unlock mode for the OwnershipUnlock command.
@@ -37,20 +41,29 @@ with_unknown! {
 
     pub enum BootSvcKind: u32 [default = Self::Unknown] {
         Unknown = 0,
-        Empty = u32::from_le_bytes(*b"EMPT"),
+        EmptyRequest = u32::from_le_bytes(*b"EMPT"),
+        EmptyResponse = u32::from_le_bytes(*b"TPME"),
         MinBl0SecVerRequest = u32::from_le_bytes(*b"MSEC"),
         MinBl0SecVerResponse = u32::from_le_bytes(*b"CESM"),
         NextBl0SlotRequest = u32::from_le_bytes(*b"NEXT"),
         NextBl0SlotResponse = u32::from_le_bytes(*b"TXEN"),
-        PrimaryBl0SlotRequest = u32::from_le_bytes(*b"PRIM"),
-        PrimaryBl0SlotResponse = u32::from_le_bytes(*b"MIRP"),
         OwnershipUnlockRequest = u32::from_le_bytes(*b"UNLK"),
-        OwnershipUnlockResponse = u32::from_le_bytes(*b"LKNU"),
+        OwnershipUnlockResponse = u32::from_le_bytes(*b"KLNU"),
         OwnershipActivateRequest = u32::from_le_bytes(*b"ACTV"),
         OwnershipActivateResponse = u32::from_le_bytes(*b"VTCA"),
     }
 }
 
+impl BootSlot {
+    pub fn opposite(self) -> Result<Self> {
+        match self {
+            BootSlot::SlotA => Ok(BootSlot::SlotB),
+            BootSlot::SlotB => Ok(BootSlot::SlotA),
+            _ => Err(ChipDataError::BadSlot(self).into()),
+        }
+    }
+}
+
 /// The Boot Services header common to all boot services commands and responses.
 #[derive(Debug, Default, Serialize, Annotate)]
 pub struct Header {
@@ -86,7 +99,8 @@ pub struct MinBl0SecVerResponse {
     /// The current minimum BL0 version.
     pub ver: u32,
     /// The status response to the request.
-    pub status: u32,
+    #[annotate(format = hex)]
+    pub status: RomError,
 }
 
 /// Request to set the next (one-time) owner stage boot slot.
@@ -94,29 +108,18 @@ pub struct MinBl0SecVerResponse {
 pub struct NextBl0SlotRequest {
     /// The slot to boot.
     pub next_bl0_slot: BootSlot,
+    /// The slot to configure as primary.
+    pub primary_bl0_slot: BootSlot,
 }
 
 /// Response to the set next boot slot request.
 #[derive(Debug, Default, Serialize, Annotate)]
 pub struct NextBl0SlotResponse {
     /// The status response to the request.
-    pub status: u32,
-}
-
-/// Request to set the primary owner stage boot slot.
-#[derive(Debug, Default, Serialize, Annotate)]
-pub struct PrimaryBl0SlotRequest {
-    /// The slot to boot.
-    pub primary_bl0_slot: BootSlot,
-}
-
-/// Response to the set primary boot slot request.
-#[derive(Debug, Default, Serialize, Annotate)]
-pub struct PrimaryBl0SlotResponse {
+    #[annotate(format = hex)]
+    pub status: RomError,
     /// The current primary slot.
     pub primary_bl0_slot: BootSlot,
-    /// The status response to the request.
-    pub status: u32,
 }
 
 /// Request to unlock ownership of the chip.
@@ -124,6 +127,8 @@ pub struct PrimaryBl0SlotResponse {
 pub struct OwnershipUnlockRequest {
     /// The desired unlock mode.
     pub unlock_mode: UnlockMode,
+    /// The Device Identification Number of the chip.
+    pub din: u64,
     /// Reserved for future use.
     #[serde(with = "serde_bytes", skip_serializing_if = "Vec::is_empty")]
     #[annotate(format=hexstr)]
@@ -131,8 +136,14 @@ pub struct OwnershipUnlockRequest {
     /// The ROM_EXT nonce.
     #[annotate(format=hex)]
     pub nonce: u64,
+    /// The algorithm of next owner's key (for unlock Endorsed mode).
+    pub next_owner_alg: OwnershipKeyAlg,
     /// The next owner's key (for unlock Endorsed mode).
     pub next_owner_key: EcdsaRawPublicKey,
+    // TODO(cfrantz): Hybrid key material
+    #[serde(with = "serde_bytes", skip_serializing_if = "Vec::is_empty")]
+    #[annotate(format=hexstr)]
+    pub hybrid_padding: Vec<u8>,
     /// A signature over [unlock_mode..next_owner_key] with the current owner unlock key.
     pub signature: EcdsaRawSignature,
 }
@@ -141,7 +152,8 @@ pub struct OwnershipUnlockRequest {
 #[derive(Debug, Default, Serialize, Annotate)]
 pub struct OwnershipUnlockResponse {
     /// The status response to the request.
-    pub status: u32,
+    #[annotate(format = hex)]
+    pub status: RomError,
 }
 
 /// Request to activate ownership of the chip.
@@ -149,6 +161,8 @@ pub struct OwnershipUnlockResponse {
 pub struct OwnershipActivateRequest {
     /// The new primary boot slot after activating ownership.
     pub primary_bl0_slot: BootSlot,
+    /// The Device Identification Number of the chip.
+    pub din: u64,
     /// Whether to erase the previous owner's data during activation.
     pub erase_previous: HardenedBool,
     /// Reserved for future use.
@@ -166,7 +180,8 @@ pub struct OwnershipActivateRequest {
 #[derive(Debug, Default, Serialize, Annotate)]
 pub struct OwnershipActivateResponse {
     /// The status response to the request.
-    pub status: u32,
+    #[annotate(format = hex)]
+    pub status: RomError,
 }
 
 #[derive(Debug, Serialize, Annotate)]
@@ -179,12 +194,10 @@ pub enum Message {
     Empty(Empty),
     MinBl0SecVerRequest(MinBl0SecVerRequest),
     NextBl0SlotRequest(NextBl0SlotRequest),
-    PrimaryBl0SlotRequest(PrimaryBl0SlotRequest),
     OwnershipUnlockRequest(OwnershipUnlockRequest),
     OwnershipActivateRequest(OwnershipActivateRequest),
     MinBl0SecVerResponse(MinBl0SecVerResponse),
     NextBl0SlotResponse(NextBl0SlotResponse),
-    PrimaryBl0SlotResponse(PrimaryBl0SlotResponse),
     OwnershipUnlockResponse(OwnershipUnlockResponse),
     OwnershipActivateResponse(OwnershipActivateResponse),
 }
@@ -210,7 +223,8 @@ impl TryFrom<&[u8]> for BootSvc {
         }
         let buf = &buf[Header::SIZE..];
         let message = match header.kind {
-            BootSvcKind::Empty => Message::Empty(TryFrom::try_from(buf)?),
+            BootSvcKind::EmptyRequest => Message::Empty(TryFrom::try_from(buf)?),
+            BootSvcKind::EmptyResponse => Message::Empty(TryFrom::try_from(buf)?),
             BootSvcKind::MinBl0SecVerRequest => {
                 Message::MinBl0SecVerRequest(TryFrom::try_from(buf)?)
             }
@@ -221,12 +235,6 @@ impl TryFrom<&[u8]> for BootSvc {
             BootSvcKind::NextBl0SlotResponse => {
                 Message::NextBl0SlotResponse(TryFrom::try_from(buf)?)
             }
-            BootSvcKind::PrimaryBl0SlotRequest => {
-                Message::PrimaryBl0SlotRequest(TryFrom::try_from(buf)?)
-            }
-            BootSvcKind::PrimaryBl0SlotResponse => {
-                Message::PrimaryBl0SlotResponse(TryFrom::try_from(buf)?)
-            }
             BootSvcKind::OwnershipUnlockRequest => {
                 Message::OwnershipUnlockRequest(TryFrom::try_from(buf)?)
             }
@@ -256,8 +264,6 @@ impl BootSvc {
             Message::MinBl0SecVerResponse(m) => m.write(&mut data)?,
             Message::NextBl0SlotRequest(m) => m.write(&mut data)?,
             Message::NextBl0SlotResponse(m) => m.write(&mut data)?,
-            Message::PrimaryBl0SlotRequest(m) => m.write(&mut data)?,
-            Message::PrimaryBl0SlotResponse(m) => m.write(&mut data)?,
             Message::OwnershipUnlockRequest(m) => m.write(&mut data)?,
             Message::OwnershipUnlockResponse(m) => m.write(&mut data)?,
             Message::OwnershipActivateRequest(m) => m.write(&mut data)?,
@@ -270,42 +276,43 @@ impl BootSvc {
         Ok(data)
     }
 
-    pub fn min_bl0_sec_ver(ver: u32) -> Self {
+    pub fn empty(payload: &[u32]) -> Self {
         BootSvc {
             header: Header {
                 digest: [0u32; 8],
                 identifier: Header::IDENTIFIER,
-                kind: BootSvcKind::MinBl0SecVerRequest,
-                length: (Header::SIZE + MinBl0SecVerRequest::SIZE) as u32,
+                kind: BootSvcKind::EmptyRequest,
+                length: (Header::SIZE + Empty::SIZE) as u32,
             },
-            message: Message::MinBl0SecVerRequest(MinBl0SecVerRequest { ver }),
+            message: Message::Empty(Empty {
+                payload: payload.to_vec(),
+            }),
         }
     }
 
-    pub fn next_boot_bl0_slot(slot: BootSlot) -> Self {
+    pub fn min_bl0_sec_ver(ver: u32) -> Self {
         BootSvc {
             header: Header {
                 digest: [0u32; 8],
                 identifier: Header::IDENTIFIER,
-                kind: BootSvcKind::NextBl0SlotRequest,
-                length: (Header::SIZE + NextBl0SlotRequest::SIZE) as u32,
+                kind: BootSvcKind::MinBl0SecVerRequest,
+                length: (Header::SIZE + MinBl0SecVerRequest::SIZE) as u32,
             },
-            message: Message::NextBl0SlotRequest(NextBl0SlotRequest {
-                next_bl0_slot: slot,
-            }),
+            message: Message::MinBl0SecVerRequest(MinBl0SecVerRequest { ver }),
         }
     }
 
-    pub fn primary_bl0_slot(slot: BootSlot) -> Self {
+    pub fn next_boot_bl0_slot(primary: BootSlot, next: BootSlot) -> Self {
         BootSvc {
             header: Header {
                 digest: [0u32; 8],
                 identifier: Header::IDENTIFIER,
-                kind: BootSvcKind::PrimaryBl0SlotRequest,
-                length: (Header::SIZE + PrimaryBl0SlotRequest::SIZE) as u32,
+                kind: BootSvcKind::NextBl0SlotRequest,
+                length: (Header::SIZE + NextBl0SlotRequest::SIZE) as u32,
             },
-            message: Message::PrimaryBl0SlotRequest(PrimaryBl0SlotRequest {
-                primary_bl0_slot: slot,
+            message: Message::NextBl0SlotRequest(NextBl0SlotRequest {
+                next_bl0_slot: next,
+                primary_bl0_slot: primary,
             }),
         }
     }
@@ -407,7 +414,7 @@ impl TryFrom<&[u8]> for MinBl0SecVerResponse {
         let mut reader = std::io::Cursor::new(buf);
         Ok(MinBl0SecVerResponse {
             ver: reader.read_u32::<LittleEndian>()?,
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
@@ -415,7 +422,7 @@ impl MinBl0SecVerResponse {
     pub const SIZE: usize = 8;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(self.ver)?;
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -426,13 +433,15 @@ impl TryFrom<&[u8]> for NextBl0SlotRequest {
         let mut reader = std::io::Cursor::new(buf);
         Ok(NextBl0SlotRequest {
             next_bl0_slot: BootSlot(reader.read_u32::<LittleEndian>()?),
+            primary_bl0_slot: BootSlot(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl NextBl0SlotRequest {
-    pub const SIZE: usize = 4;
+    pub const SIZE: usize = 8;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(u32::from(self.next_bl0_slot))?;
+        dest.write_u32::<LittleEndian>(u32::from(self.primary_bl0_slot))?;
         Ok(())
     }
 }
@@ -442,50 +451,15 @@ impl TryFrom<&[u8]> for NextBl0SlotResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(NextBl0SlotResponse {
-            status: reader.read_u32::<LittleEndian>()?,
-        })
-    }
-}
-impl NextBl0SlotResponse {
-    pub const SIZE: usize = 4;
-    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
-        Ok(())
-    }
-}
-
-impl TryFrom<&[u8]> for PrimaryBl0SlotRequest {
-    type Error = ChipDataError;
-    fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
-        let mut reader = std::io::Cursor::new(buf);
-        Ok(PrimaryBl0SlotRequest {
+            status: RomError(reader.read_u32::<LittleEndian>()?),
             primary_bl0_slot: BootSlot(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
-impl PrimaryBl0SlotRequest {
+impl NextBl0SlotResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(u32::from(self.primary_bl0_slot))?;
-        Ok(())
-    }
-}
-
-impl TryFrom<&[u8]> for PrimaryBl0SlotResponse {
-    type Error = ChipDataError;
-    fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
-        let mut reader = std::io::Cursor::new(buf);
-        Ok(PrimaryBl0SlotResponse {
-            primary_bl0_slot: BootSlot(reader.read_u32::<LittleEndian>()?),
-            status: reader.read_u32::<LittleEndian>()?,
-        })
-    }
-}
-impl PrimaryBl0SlotResponse {
-    pub const SIZE: usize = 8;
-    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(u32::from(self.primary_bl0_slot))?;
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -496,26 +470,42 @@ impl TryFrom<&[u8]> for OwnershipUnlockRequest {
         let mut reader = std::io::Cursor::new(buf);
         let mut val = Self::default();
         val.unlock_mode = UnlockMode(reader.read_u32::<LittleEndian>()?);
+        val.din = reader.read_u64::<LittleEndian>()?;
         val.reserved.resize(Self::RESERVED_SIZE, 0);
         reader.read_exact(&mut val.reserved)?;
+        val.next_owner_alg = OwnershipKeyAlg(reader.read_u32::<LittleEndian>()?);
         val.nonce = reader.read_u64::<LittleEndian>()?;
         val.next_owner_key = EcdsaRawPublicKey::read(&mut reader).map_err(ChipDataError::Anyhow)?;
+
+        // SPX+ public key size is 32 bytes.
+        val.hybrid_padding.resize(32, 0);
+        reader.read_exact(&mut val.hybrid_padding)?;
+
         val.signature = EcdsaRawSignature::read(&mut reader).map_err(ChipDataError::Anyhow)?;
         Ok(val)
     }
 }
 impl OwnershipUnlockRequest {
     pub const SIZE: usize = 212;
-    const RESERVED_SIZE: usize = 18 * std::mem::size_of::<u32>();
+    const RESERVED_SIZE: usize = 7 * std::mem::size_of::<u32>();
     const SIGNATURE_OFFSET: usize = 148;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(u32::from(self.unlock_mode))?;
+        dest.write_u64::<LittleEndian>(self.din)?;
         for i in 0..Self::RESERVED_SIZE {
             let p = self.reserved.get(i).unwrap_or(&0x00);
             dest.write_all(std::slice::from_ref(p))?;
         }
+        dest.write_u32::<LittleEndian>(u32::from(self.next_owner_alg))?;
         dest.write_u64::<LittleEndian>(self.nonce)?;
         self.next_owner_key.write(dest)?;
+
+        // SPX+ public key size is 32 bytes.
+        for i in 0..32 {
+            let p = self.hybrid_padding.get(i).unwrap_or(&0x00);
+            dest.write_all(std::slice::from_ref(p))?;
+        }
+
         self.signature.write(dest)?;
         Ok(())
     }
@@ -531,6 +521,25 @@ impl OwnershipUnlockRequest {
         self.signature = key.digest_and_sign(&data[..Self::SIGNATURE_OFFSET])?;
         Ok(())
     }
+
+    pub fn detached_sign(
+        &mut self,
+        algorithm: OwnershipKeyAlg,
+        ecdsa_key: Option<&EcdsaPrivateKey>,
+        spx_key: Option<&SpxSecretKey>,
+    ) -> Result<DetachedSignature> {
+        self.signature = Default::default();
+        let mut data = Vec::new();
+        self.write(&mut data)?;
+        DetachedSignature::new(
+            &data[..Self::SIGNATURE_OFFSET],
+            BootSvcKind::OwnershipUnlockRequest.into(),
+            algorithm,
+            self.nonce,
+            ecdsa_key,
+            spx_key,
+        )
+    }
 }
 
 impl TryFrom<&[u8]> for OwnershipUnlockResponse {
@@ -538,14 +547,14 @@ impl TryFrom<&[u8]> for OwnershipUnlockResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(OwnershipUnlockResponse {
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl OwnershipUnlockResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
@@ -556,6 +565,7 @@ impl TryFrom<&[u8]> for OwnershipActivateRequest {
         let mut reader = std::io::Cursor::new(buf);
         let mut val = Self::default();
         val.primary_bl0_slot = BootSlot(reader.read_u32::<LittleEndian>()?);
+        val.din = reader.read_u64::<LittleEndian>()?;
         val.erase_previous = HardenedBool(reader.read_u32::<LittleEndian>()?);
         val.reserved.resize(Self::RESERVED_SIZE, 0);
         reader.read_exact(&mut val.reserved)?;
@@ -566,10 +576,11 @@ impl TryFrom<&[u8]> for OwnershipActivateRequest {
 }
 impl OwnershipActivateRequest {
     pub const SIZE: usize = 212;
-    const RESERVED_SIZE: usize = 33 * std::mem::size_of::<u32>();
+    const RESERVED_SIZE: usize = 31 * std::mem::size_of::<u32>();
     const SIGNATURE_OFFSET: usize = 148;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(u32::from(self.primary_bl0_slot))?;
+        dest.write_u64::<LittleEndian>(self.din)?;
         dest.write_u32::<LittleEndian>(u32::from(self.erase_previous))?;
         for i in 0..Self::RESERVED_SIZE {
             let p = self.reserved.get(i).unwrap_or(&0x00);
@@ -586,6 +597,25 @@ impl OwnershipActivateRequest {
         self.signature = key.digest_and_sign(&data[..Self::SIGNATURE_OFFSET])?;
         Ok(())
     }
+
+    pub fn detached_sign(
+        &mut self,
+        algorithm: OwnershipKeyAlg,
+        ecdsa_key: Option<&EcdsaPrivateKey>,
+        spx_key: Option<&SpxSecretKey>,
+    ) -> Result<DetachedSignature> {
+        self.signature = Default::default();
+        let mut data = Vec::new();
+        self.write(&mut data)?;
+        DetachedSignature::new(
+            &data[..Self::SIGNATURE_OFFSET],
+            BootSvcKind::OwnershipActivateRequest.into(),
+            algorithm,
+            self.nonce,
+            ecdsa_key,
+            spx_key,
+        )
+    }
 }
 
 impl TryFrom<&[u8]> for OwnershipActivateResponse {
@@ -593,14 +623,14 @@ impl TryFrom<&[u8]> for OwnershipActivateResponse {
     fn try_from(buf: &[u8]) -> std::result::Result<Self, Self::Error> {
         let mut reader = std::io::Cursor::new(buf);
         Ok(OwnershipActivateResponse {
-            status: reader.read_u32::<LittleEndian>()?,
+            status: RomError(reader.read_u32::<LittleEndian>()?),
         })
     }
 }
 impl OwnershipActivateResponse {
     pub const SIZE: usize = 4;
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        dest.write_u32::<LittleEndian>(self.status)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.status))?;
         Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/chip/device_id.rs b/sw/host/opentitanlib/src/chip/device_id.rs
new file mode 100644
index 0000000000000..dbad9f023642c
--- /dev/null
+++ b/sw/host/opentitanlib/src/chip/device_id.rs
@@ -0,0 +1,52 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
+use serde::Serialize;
+use serde_annotate::Annotate;
+use std::io::{Read, Write};
+
+#[derive(Debug, Default, Serialize, Annotate, PartialEq, Eq)]
+pub struct DeviceId {
+    #[annotate(format=hex)]
+    pub creator: u16,
+    #[annotate(format=hex)]
+    pub product: u16,
+    #[annotate(format=hex)]
+    pub din: u64,
+    #[annotate(format=hex)]
+    pub crc32: u32,
+    #[annotate(format=hex)]
+    pub sku_specific: [u32; 4],
+}
+
+impl DeviceId {
+    pub fn read(src: &mut impl Read) -> Result<Self> {
+        let creator = src.read_u16::<LittleEndian>()?;
+        let product = src.read_u16::<LittleEndian>()?;
+        let din = src.read_u64::<LittleEndian>()?;
+        let crc32 = src.read_u32::<LittleEndian>()?;
+        let mut sku_specific = [0u32; 4];
+        src.read_u32_into::<LittleEndian>(&mut sku_specific)?;
+        Ok(Self {
+            creator,
+            product,
+            din,
+            crc32,
+            sku_specific,
+        })
+    }
+
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        dest.write_u16::<LittleEndian>(self.creator)?;
+        dest.write_u16::<LittleEndian>(self.product)?;
+        dest.write_u64::<LittleEndian>(self.din)?;
+        dest.write_u32::<LittleEndian>(self.crc32)?;
+        for sku_specific in &self.sku_specific {
+            dest.write_u32::<LittleEndian>(*sku_specific)?;
+        }
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/chip/helper.rs b/sw/host/opentitanlib/src/chip/helper.rs
index 0c43dc1e41e67..75557decdd947 100644
--- a/sw/host/opentitanlib/src/chip/helper.rs
+++ b/sw/host/opentitanlib/src/chip/helper.rs
@@ -2,55 +2,96 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::chip::boot_svc::{OwnershipActivateRequest, OwnershipUnlockRequest, UnlockMode};
-use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature};
-use crate::util::parse_int::ParseInt;
 use anyhow::Result;
 use clap::Args;
+use sphincsplus::{DecodeKey, SpxSecretKey};
 use std::fs::File;
 use std::io::Read;
 use std::path::PathBuf;
 
-#[derive(Debug, Args)]
+use crate::chip::boot_svc::{
+    BootSlot, OwnershipActivateRequest, OwnershipUnlockRequest, UnlockMode,
+};
+use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature};
+use crate::ownership::{DetachedSignature, OwnershipKeyAlg};
+use crate::util::parse_int::ParseInt;
+
+#[derive(Debug, Default, Args)]
 pub struct OwnershipUnlockParams {
     #[arg(long, value_enum, help = "Requested unlock mode")]
     pub mode: Option<UnlockMode>,
     #[arg(long, value_parser = u64::from_str, help="Current ROM_EXT nonce")]
     pub nonce: Option<u64>,
+    #[arg(long, value_parser = u64::from_str, help="Device Identification Number of the chip")]
+    pub din: Option<u64>,
     #[arg(long, help = "A path to the next owner key (for endorsed mode)")]
     pub next_owner: Option<PathBuf>,
-    #[arg(long, help = "A path to a detached signature for the unlock request")]
+    #[arg(
+        long,
+        help = "A path to an external ECDSA signature for the unlock request"
+    )]
     pub signature: Option<PathBuf>,
-    #[arg(long, help = "A path to a private key to sign the request")]
-    pub sign: Option<PathBuf>,
+    #[arg(long, default_value_t = OwnershipKeyAlg::EcdsaP256, help = "The algorithm used to sign the request")]
+    pub algorithm: OwnershipKeyAlg,
+    #[arg(long, help = "A path to a private ECDSA key to sign the request")]
+    pub ecdsa_key: Option<PathBuf>,
+    #[arg(long, help = "A path to a private SPX key to sign the request")]
+    pub spx_key: Option<PathBuf>,
+    #[arg(long, help = "Enable detached signature")]
+    pub enable_detached_sig: bool,
 }
 
 impl OwnershipUnlockParams {
     /// Applies the parameters to the unlock request.
-    pub fn apply(&self, unlock: &mut OwnershipUnlockRequest) -> Result<()> {
+    pub fn apply(&self, unlock: &mut OwnershipUnlockRequest) -> Result<Option<DetachedSignature>> {
         if let Some(mode) = &self.mode {
             unlock.unlock_mode = *mode;
         }
         if let Some(nonce) = &self.nonce {
             unlock.nonce = *nonce;
         }
+        if let Some(din) = &self.din {
+            unlock.din = *din;
+        }
         if let Some(next_owner) = &self.next_owner {
             let key = EcdsaPublicKey::load(next_owner)?;
+            // TODO: Support transferring to a different algorithm.
+            unlock.next_owner_alg = self.algorithm;
             unlock.next_owner_key = EcdsaRawPublicKey::try_from(&key)?;
         }
         if let Some(signature) = &self.signature {
+            // TODO: Recognize both a raw ECDSA signature and/or a detached signature struct
+            // containing only an ECDSA signature.
             let mut f = File::open(signature)?;
             unlock.signature = EcdsaRawSignature::read(&mut f)?;
         }
-        if let Some(sign) = &self.sign {
-            let key = EcdsaPrivateKey::load(sign)?;
-            unlock.sign(&key)?;
+        if self.signature.is_none() && (self.ecdsa_key.is_some() || self.spx_key.is_some()) {
+            let ecdsa_key = self
+                .ecdsa_key
+                .as_ref()
+                .map(EcdsaPrivateKey::load)
+                .transpose()?;
+            let spx_key = self
+                .spx_key
+                .as_ref()
+                .map(SpxSecretKey::read_pem_file)
+                .transpose()?;
+            let signature =
+                unlock.detached_sign(self.algorithm, ecdsa_key.as_ref(), spx_key.as_ref())?;
+            if !self.algorithm.is_detached() {
+                unlock.signature = signature.ecdsa.clone().expect("ECDSA signature");
+            }
+            Ok(Some(signature))
+        } else {
+            Ok(None)
         }
-        Ok(())
     }
 
     /// Reads an unlock request (or creates a default request) and applies the aprameters.
-    pub fn apply_to(&self, reader: Option<&mut impl Read>) -> Result<OwnershipUnlockRequest> {
+    pub fn apply_to(
+        &self,
+        reader: Option<&mut impl Read>,
+    ) -> Result<(OwnershipUnlockRequest, Option<DetachedSignature>)> {
         let mut unlock = if let Some(r) = reader {
             let mut data = Vec::new();
             r.read_to_end(&mut data)?;
@@ -58,40 +99,82 @@ impl OwnershipUnlockParams {
         } else {
             OwnershipUnlockRequest::default()
         };
-        self.apply(&mut unlock)?;
-        Ok(unlock)
+        let signature = self.apply(&mut unlock)?;
+        if self.enable_detached_sig {
+            // Overwrite the signature to support the detached signature.
+            unlock.signature = EcdsaRawSignature::default();
+        }
+        Ok((unlock, signature))
     }
 }
 
-#[derive(Debug, Args)]
+#[derive(Debug, Default, Args)]
 pub struct OwnershipActivateParams {
     #[arg(long, value_parser = u64::from_str, help="Current ROM_EXT nonce")]
     pub nonce: Option<u64>,
-    #[arg(long, help = "A path to a detached signature for the activate request")]
+    #[arg(long, value_parser = u64::from_str, help="Device Identification Number of the chip")]
+    pub din: Option<u64>,
+    #[arg(
+        long,
+        help = "A path to an external ECDSA signature for the activate request"
+    )]
     pub signature: Option<PathBuf>,
-    #[arg(long, help = "A path to a private key to sign the request")]
-    pub sign: Option<PathBuf>,
+    #[arg(long, default_value_t = OwnershipKeyAlg::EcdsaP256, help = "The algorithm used to sign the request")]
+    pub algorithm: OwnershipKeyAlg,
+    #[arg(long, help = "A path to a private ECDSA key to sign the request")]
+    pub ecdsa_key: Option<PathBuf>,
+    #[arg(long, help = "A path to a private SPX key to sign the request")]
+    pub spx_key: Option<PathBuf>,
+    #[arg(long, default_value = "SlotA", help = "Which bl0 slot to activate")]
+    pub primary_bl0_slot: BootSlot,
 }
 
 impl OwnershipActivateParams {
     /// Applies the parameters to the activate request.
-    pub fn apply(&self, activate: &mut OwnershipActivateRequest) -> Result<()> {
+    pub fn apply(
+        &self,
+        activate: &mut OwnershipActivateRequest,
+    ) -> Result<Option<DetachedSignature>> {
         if let Some(nonce) = &self.nonce {
             activate.nonce = *nonce;
         }
+        if let Some(din) = &self.din {
+            activate.din = *din;
+        }
         if let Some(signature) = &self.signature {
+            // TODO: Recognize both a raw ECDSA signature and/or a detached signature struct
+            // containing only an ECDSA signature.
             let mut f = File::open(signature)?;
             activate.signature = EcdsaRawSignature::read(&mut f)?;
         }
-        if let Some(sign) = &self.sign {
-            let key = EcdsaPrivateKey::load(sign)?;
-            activate.sign(&key)?;
+        activate.primary_bl0_slot = self.primary_bl0_slot;
+        if self.ecdsa_key.is_some() || self.spx_key.is_some() {
+            let ecdsa_key = self
+                .ecdsa_key
+                .as_ref()
+                .map(EcdsaPrivateKey::load)
+                .transpose()?;
+            let spx_key = self
+                .spx_key
+                .as_ref()
+                .map(SpxSecretKey::read_pem_file)
+                .transpose()?;
+            let signature =
+                activate.detached_sign(self.algorithm, ecdsa_key.as_ref(), spx_key.as_ref())?;
+            if !self.algorithm.is_detached() {
+                activate.signature = signature.ecdsa.clone().expect("ECDSA signature");
+            }
+            Ok(Some(signature))
+        } else {
+            Ok(None)
         }
-        Ok(())
     }
 
     /// Reads an activate request (or creates a default request) and applies the parameters.
-    pub fn apply_to(&self, reader: Option<&mut impl Read>) -> Result<OwnershipActivateRequest> {
+    pub fn apply_to(
+        &self,
+        reader: Option<&mut impl Read>,
+    ) -> Result<(OwnershipActivateRequest, Option<DetachedSignature>)> {
         let mut activate = if let Some(r) = reader {
             let mut data = Vec::new();
             r.read_to_end(&mut data)?;
@@ -99,7 +182,7 @@ impl OwnershipActivateParams {
         } else {
             OwnershipActivateRequest::default()
         };
-        self.apply(&mut activate)?;
-        Ok(activate)
+        let signature = self.apply(&mut activate)?;
+        Ok((activate, signature))
     }
 }
diff --git a/sw/host/opentitanlib/src/chip/mod.rs b/sw/host/opentitanlib/src/chip/mod.rs
index 4e11b910d8570..1d32afc726eeb 100644
--- a/sw/host/opentitanlib/src/chip/mod.rs
+++ b/sw/host/opentitanlib/src/chip/mod.rs
@@ -9,7 +9,9 @@ pub mod autogen;
 pub mod boolean;
 pub mod boot_log;
 pub mod boot_svc;
+pub mod device_id;
 pub mod helper;
+pub mod rom_error;
 
 #[derive(Debug, Error)]
 pub enum ChipDataError {
@@ -19,6 +21,8 @@ pub enum ChipDataError {
     Anyhow(#[from] anyhow::Error),
     #[error("bad size: expected {0} bytes, but found {1}")]
     BadSize(usize, usize),
+    #[error("bad slot: {0:x}")]
+    BadSlot(boot_svc::BootSlot),
     #[error("invalid digest")]
     InvalidDigest,
 }
diff --git a/sw/host/opentitanlib/src/chip/rom_error.rs b/sw/host/opentitanlib/src/chip/rom_error.rs
new file mode 100644
index 0000000000000..a69d9edcf49d4
--- /dev/null
+++ b/sw/host/opentitanlib/src/chip/rom_error.rs
@@ -0,0 +1,30 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use crate::with_unknown;
+use std::error::Error;
+
+include!(env!("rom_error_enum"));
+
+impl Error for RomError {}
+
+impl From<RomError> for Result<(), RomError> {
+    fn from(error: RomError) -> Self {
+        if error == RomError::Ok {
+            Ok(())
+        } else {
+            Err(error)
+        }
+    }
+}
+
+impl From<RomError> for Result<(), anyhow::Error> {
+    fn from(error: RomError) -> Self {
+        if error == RomError::Ok {
+            Ok(())
+        } else {
+            Err(error.into())
+        }
+    }
+}
diff --git a/sw/host/opentitanlib/src/console/spi.rs b/sw/host/opentitanlib/src/console/spi.rs
index ec209e3a34ebc..2fbbf3f4996f4 100644
--- a/sw/host/opentitanlib/src/console/spi.rs
+++ b/sw/host/opentitanlib/src/console/spi.rs
@@ -5,40 +5,87 @@
 use anyhow::Result;
 use std::cell::{Cell, RefCell};
 use std::collections::VecDeque;
+use std::rc::Rc;
 use std::time::Duration;
 
 use crate::io::console::ConsoleDevice;
-use crate::io::spi::{Target, Transfer};
+use crate::io::gpio::GpioPin;
+use crate::io::spi::Target;
+use crate::spiflash::flash::SpiFlash;
 
 pub struct SpiConsoleDevice<'a> {
     spi: &'a dyn Target,
+    flash: SpiFlash,
     console_next_frame_number: Cell<u32>,
     rx_buf: RefCell<VecDeque<u8>>,
+    next_read_address: Cell<u32>,
+    device_tx_ready_pin: Option<&'a Rc<dyn GpioPin>>,
+    ignore_frame_num: bool,
 }
 
 impl<'a> SpiConsoleDevice<'a> {
-    const SPI_FRAME_HEADER_SIZE: usize = 8;
-    const SPI_MAX_DATA_LENGTH: usize = 2032;
+    const SPI_FRAME_HEADER_SIZE: usize = 12;
+    const SPI_FLASH_READ_BUFFER_SIZE: u32 = 2048;
+    const SPI_MAX_DATA_LENGTH: usize = 2036;
+    const SPI_FRAME_MAGIC_NUMBER: u32 = 0xa5a5beef;
+    const SPI_FLASH_PAYLOAD_BUFFER_SIZE: usize = 256;
+    const SPI_TX_LAST_CHUNK_MAGIC_ADDRESS: u32 = 0x100;
+    const SPI_BOOT_MAGIC_PATTERN: u32 = 0xcafeb002;
 
-    pub fn new(spi: &'a dyn Target) -> Self {
-        Self {
+    pub fn new(
+        spi: &'a dyn Target,
+        device_tx_ready_pin: Option<&'a Rc<dyn GpioPin>>,
+        ignore_frame_num: bool,
+    ) -> Result<Self> {
+        let flash = SpiFlash {
+            ..Default::default()
+        };
+        Ok(Self {
             spi,
+            flash,
             rx_buf: RefCell::new(VecDeque::new()),
             console_next_frame_number: Cell::new(0),
+            next_read_address: Cell::new(0),
+            device_tx_ready_pin,
+            ignore_frame_num,
+        })
+    }
+
+    pub fn reset_frame_counter(&self) {
+        self.console_next_frame_number.set(0);
+        self.next_read_address.set(0);
+    }
+
+    fn check_device_boot_up(&self, buf: &[u8]) -> Result<usize> {
+        for i in (0..buf.len()).step_by(4) {
+            let pattern: u32 = u32::from_le_bytes(buf[i..i + 4].try_into().unwrap());
+            if pattern != SpiConsoleDevice::SPI_BOOT_MAGIC_PATTERN {
+                return Ok(0);
+            }
         }
+        // Set busy bit and wait for the device to clear the boot magic.
+        self.flash.program(self.spi, 0, buf)?;
+        self.reset_frame_counter();
+        Ok(0)
     }
 
     fn read_from_spi(&self) -> Result<usize> {
         // Read the SPI console frame header.
+        let read_address = self.next_read_address.get();
         let mut header = vec![0u8; SpiConsoleDevice::SPI_FRAME_HEADER_SIZE];
-        self.spi
-            .run_transaction(&mut [Transfer::Write(&[0xff; 4]), Transfer::Read(&mut header)])?;
-        let frame_number: u32 = u32::from_le_bytes(header[0..4].try_into().unwrap());
-        let data_len_bytes: usize = u32::from_le_bytes(header[4..8].try_into().unwrap()) as usize;
-        if frame_number != self.console_next_frame_number.get()
+        self.read_data(read_address, &mut header)?;
+
+        let magic_number: u32 = u32::from_le_bytes(header[0..4].try_into().unwrap());
+        let frame_number: u32 = u32::from_le_bytes(header[4..8].try_into().unwrap());
+        let data_len_bytes: usize = u32::from_le_bytes(header[8..12].try_into().unwrap()) as usize;
+        if magic_number != SpiConsoleDevice::SPI_FRAME_MAGIC_NUMBER
+            || (!self.ignore_frame_num && frame_number != self.console_next_frame_number.get())
             || data_len_bytes > SpiConsoleDevice::SPI_MAX_DATA_LENGTH
         {
-            // This frame is junk, so we do not read the data.
+            if self.get_tx_ready_pin()?.is_none() {
+                self.check_device_boot_up(&header)?;
+            }
+            // This frame is junk, so we do not read the data
             return Ok(0);
         }
         self.console_next_frame_number.set(frame_number + 1);
@@ -46,20 +93,65 @@ impl<'a> SpiConsoleDevice<'a> {
         // Read the SPI console frame data.
         let data_len_bytes_w_pad = (data_len_bytes + 3) & !3;
         let mut data = vec![0u8; data_len_bytes_w_pad];
-        self.spi
-            .run_transaction(&mut [Transfer::Write(&[0xff; 4]), Transfer::Read(&mut data)])?;
+        let data_address: u32 = (read_address
+            + u32::try_from(SpiConsoleDevice::SPI_FRAME_HEADER_SIZE).unwrap())
+            % SpiConsoleDevice::SPI_FLASH_READ_BUFFER_SIZE;
+        self.read_data(data_address, &mut data)?;
+
+        if self.get_tx_ready_pin()?.is_some() {
+            // When using the TX-indicator pin feature, we always write each SPI frame at the
+            // beginning of the flash buffer, and wait for the host to ready it out before writing
+            // another frame.
+            self.next_read_address.set(0);
+        } else {
+            let next_read_address: u32 = (read_address
+                + u32::try_from(SpiConsoleDevice::SPI_FRAME_HEADER_SIZE + data_len_bytes_w_pad)
+                    .unwrap())
+                % SpiConsoleDevice::SPI_FLASH_READ_BUFFER_SIZE;
+            self.next_read_address.set(next_read_address);
+        }
 
         // Copy data to the internal data queue.
         self.rx_buf.borrow_mut().extend(&data[..data_len_bytes]);
         Ok(data_len_bytes)
     }
+
+    fn read_data(&self, address: u32, buf: &mut [u8]) -> Result<&Self> {
+        let buf_len: usize = buf.len();
+        let space_to_end_of_buffer: usize =
+            usize::try_from(SpiConsoleDevice::SPI_FLASH_READ_BUFFER_SIZE - address).unwrap();
+        let first_part_size: usize = if buf_len > space_to_end_of_buffer {
+            space_to_end_of_buffer
+        } else {
+            buf_len
+        };
+        self.flash
+            .read(self.spi, address, &mut buf[0..first_part_size])?;
+        // Handle wrap-around
+        if first_part_size < buf_len {
+            self.flash
+                .read(self.spi, 0, &mut buf[first_part_size..buf_len])?;
+        }
+        Ok(self)
+    }
 }
 
 impl<'a> ConsoleDevice for SpiConsoleDevice<'a> {
     fn console_read(&self, buf: &mut [u8], _timeout: Duration) -> Result<usize> {
-        // Attempt to refill the internal data queue if it is empty.
-        if self.rx_buf.borrow().is_empty() && self.read_from_spi()? == 0 {
-            return Ok(0);
+        if self.rx_buf.borrow().is_empty() {
+            if let Some(ready_pin) = self.get_tx_ready_pin()? {
+                if ready_pin.read()? {
+                    if self.read_from_spi()? == 0 {
+                        // If we are gated by the TX-ready pin, only perform the SPI console read if
+                        // the ready pin is high.
+                        return Ok(0);
+                    }
+                } else {
+                    return Ok(0);
+                }
+            } else if self.read_from_spi()? == 0 {
+                return Ok(0);
+            }
         }
 
         // Copy from the internal data queue to the output buffer.
@@ -71,4 +163,31 @@ impl<'a> ConsoleDevice for SpiConsoleDevice<'a> {
 
         Ok(i)
     }
+
+    fn console_write(&self, buf: &[u8]) -> Result<()> {
+        let buf_len: usize = buf.len();
+        let mut written_data_len: usize = 0;
+        while written_data_len < buf_len {
+            let mut write_address = SpiConsoleDevice::SPI_TX_LAST_CHUNK_MAGIC_ADDRESS;
+            let mut data_len: usize = buf_len - written_data_len;
+
+            if data_len > SpiConsoleDevice::SPI_FLASH_PAYLOAD_BUFFER_SIZE {
+                data_len = SpiConsoleDevice::SPI_FLASH_PAYLOAD_BUFFER_SIZE;
+                write_address = 0;
+            }
+
+            self.flash.program(
+                self.spi,
+                write_address,
+                &buf[written_data_len..written_data_len + data_len],
+            )?;
+            written_data_len += data_len;
+        }
+
+        Ok(())
+    }
+
+    fn get_tx_ready_pin(&self) -> Result<Option<&'a Rc<dyn GpioPin>>> {
+        Ok(self.device_tx_ready_pin)
+    }
 }
diff --git a/sw/host/opentitanlib/src/crypto/ecdsa.rs b/sw/host/opentitanlib/src/crypto/ecdsa.rs
index 08558428db616..52e4afc8f1dac 100644
--- a/sw/host/opentitanlib/src/crypto/ecdsa.rs
+++ b/sw/host/opentitanlib/src/crypto/ecdsa.rs
@@ -2,11 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, ensure, Context, Result};
+use anyhow::{Context, Result, anyhow, ensure};
+use ecdsa::Signature;
 use ecdsa::elliptic_curve::pkcs8::{DecodePrivateKey, EncodePrivateKey};
 use ecdsa::elliptic_curve::pkcs8::{DecodePublicKey, EncodePublicKey};
 use ecdsa::signature::hazmat::PrehashVerifier;
-use p256::ecdsa::{Signature, SigningKey, VerifyingKey};
+use p256::NistP256;
+use p256::ecdsa::{SigningKey, VerifyingKey};
+use pem_rfc7468::Decoder;
 use rand::rngs::OsRng;
 use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
@@ -17,7 +20,8 @@ use std::path::Path;
 use std::str::FromStr;
 
 use super::Error;
-use crate::crypto::sha256::{sha256, Sha256Digest};
+use crate::crypto::sha256::Sha256Digest;
+use util::clean_pem_bytes_for_parsing;
 
 pub struct EcdsaPrivateKey {
     pub key: SigningKey,
@@ -57,7 +61,7 @@ impl EcdsaPrivateKey {
     }
 
     pub fn sign(&self, digest: &Sha256Digest) -> Result<EcdsaRawSignature> {
-        let (sig, _) = self.key.sign_prehash_recoverable(&digest.to_be_bytes())?;
+        let (sig, _) = self.key.sign_prehash_recoverable(digest.as_ref())?;
         let bytes = sig.to_bytes();
         let half = bytes.len() / 2;
         // The signature bytes are (R || S).  Since opentitan is a little-endian
@@ -71,12 +75,11 @@ impl EcdsaPrivateKey {
     }
 
     pub fn digest_and_sign(&self, data: &[u8]) -> Result<EcdsaRawSignature> {
-        let digest = sha256(data);
-        self.sign(&digest)
+        self.sign(&Sha256Digest::hash(data))
     }
 }
 
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Clone, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct EcdsaRawSignature {
     #[serde(with = "serde_bytes")]
     #[annotate(format = hexstr)]
@@ -98,7 +101,7 @@ impl Default for EcdsaRawSignature {
 impl TryFrom<&[u8]> for EcdsaRawSignature {
     type Error = Error;
     fn try_from(value: &[u8]) -> std::result::Result<Self, Self::Error> {
-        if value.len() != 64 {
+        if value.len() != Self::SIZE {
             return Err(Error::InvalidSignature(anyhow!(
                 "bad length: {}",
                 value.len()
@@ -110,6 +113,8 @@ impl TryFrom<&[u8]> for EcdsaRawSignature {
 }
 
 impl EcdsaRawSignature {
+    const SIZE: usize = 64;
+
     pub fn read(src: &mut impl Read) -> Result<Self> {
         let mut sig = Self::default();
         src.read_exact(&mut sig.r)?;
@@ -120,10 +125,29 @@ impl EcdsaRawSignature {
     pub fn read_from_file(path: &Path) -> Result<EcdsaRawSignature> {
         let mut file =
             File::open(path).with_context(|| format!("Failed to read file: {path:?}"))?;
-        EcdsaRawSignature::read(&mut file)
+        let file_size = std::fs::metadata(path)
+            .with_context(|| format!("Failed to get metadata for {path:?}"))?
+            .len();
+
+        let raw_size = Self::SIZE as u64;
+        if file_size == raw_size {
+            // This must be a raw signature, just read it as is.
+            EcdsaRawSignature::read(&mut file)
+        } else {
+            let mut data = Vec::<u8>::new();
+
+            file.read_to_end(&mut data)
+                .with_context(|| format!("Failed to read {path:?}"))?;
+
+            // Let's try interpreting the file as ASN.1 DER.
+            // If unsuccessful, attempt PEM decoding.
+            EcdsaRawSignature::from_der(&data)
+                .or_else(|_| EcdsaRawSignature::from_pem(&data))
+                .with_context(|| format!("Failed parsing {path:?}"))
+        }
     }
 
-    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+    pub fn write(&self, dest: &mut impl Write) -> Result<usize> {
         ensure!(
             self.r.len() == 32,
             Error::InvalidSignature(anyhow!("bad r length: {}", self.r.len()))
@@ -134,7 +158,7 @@ impl EcdsaRawSignature {
         );
         dest.write_all(&self.r)?;
         dest.write_all(&self.s)?;
-        Ok(())
+        Ok(64)
     }
 
     pub fn to_vec(&self) -> Result<Vec<u8>> {
@@ -146,6 +170,44 @@ impl EcdsaRawSignature {
     pub fn is_empty(&self) -> bool {
         self.r.iter().all(|&v| v == 0) && self.s.iter().all(|&v| v == 0)
     }
+
+    fn from_der(data: &[u8]) -> Result<EcdsaRawSignature> {
+        let sig = Signature::<NistP256>::from_der(data).with_context(|| "Failed to parse DER")?;
+
+        // R and S are integers in big endian format. The size of the numbers is
+        // not fixed, it could be 33 bytes in case the value has the top byte
+        // top bit set, and a leading zero has to be added to keep the value
+        // positive (50% chance), or it could be shorter than 32 bytes (1/256
+        // chance). Need to get around these issues and convert into little
+        // endian of exactly 32 bytes format expected by the firmware.
+        let mut r: Vec<u8> = sig.r().to_bytes().to_vec();
+        let mut s: Vec<u8> = sig.s().to_bytes().to_vec();
+
+        // Convert to little endian format.
+        r.reverse();
+        s.reverse();
+
+        r.resize(32, 0u8);
+        s.resize(32, 0u8);
+
+        Ok(EcdsaRawSignature { r, s })
+    }
+
+    fn from_pem(data: &[u8]) -> Result<EcdsaRawSignature> {
+        // Ensures valid PEM markers and a recognized label are present.
+        let _ = pem_rfc7468::decode_label(data)?;
+        let mut buf = Vec::new();
+        let result = Decoder::new(data);
+        match result {
+            Ok(mut decoder) => decoder.decode_to_end(&mut buf)?,
+            _ => {
+                let cleaned_data = clean_pem_bytes_for_parsing(data)?;
+                let mut decoder = Decoder::new(&cleaned_data)?;
+                decoder.decode_to_end(&mut buf)?
+            }
+        };
+        Self::from_der(buf.as_slice())
+    }
 }
 
 impl EcdsaPublicKey {
@@ -168,7 +230,7 @@ impl EcdsaPublicKey {
         bytes[..half].reverse();
         bytes[half..].reverse();
         let signature = Signature::from_slice(&bytes)?;
-        self.key.verify_prehash(&digest.to_be_bytes(), &signature)?;
+        self.key.verify_prehash(digest.as_ref(), &signature)?;
         Ok(())
     }
 }
@@ -193,7 +255,7 @@ impl TryFrom<&EcdsaRawPublicKey> for EcdsaPublicKey {
     }
 }
 
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct EcdsaRawPublicKey {
     #[serde(with = "serde_bytes")]
     #[annotate(format = hexstr)]
@@ -226,6 +288,13 @@ impl TryFrom<&EcdsaPublicKey> for EcdsaRawPublicKey {
     }
 }
 
+impl TryFrom<EcdsaPublicKey> for EcdsaRawPublicKey {
+    type Error = Error;
+    fn try_from(v: EcdsaPublicKey) -> Result<Self, Self::Error> {
+        EcdsaRawPublicKey::try_from(&v)
+    }
+}
+
 impl FromStr for EcdsaRawPublicKey {
     type Err = Error;
     fn from_str(s: &str) -> Result<Self, Self::Err> {
diff --git a/sw/host/opentitanlib/src/crypto/mod.rs b/sw/host/opentitanlib/src/crypto/mod.rs
index 6431666295a4c..051e325a36ea2 100644
--- a/sw/host/opentitanlib/src/crypto/mod.rs
+++ b/sw/host/opentitanlib/src/crypto/mod.rs
@@ -12,6 +12,8 @@ pub mod spx;
 
 #[derive(Debug, Error)]
 pub enum Error {
+    #[error("Invalid hash: {0}")]
+    InvalidHash(String),
     #[error("Invalid public key: {0:?}")]
     InvalidPublicKey(#[source] anyhow::Error),
     #[error("Invalid DER file: {der}")]
diff --git a/sw/host/opentitanlib/src/crypto/rsa.rs b/sw/host/opentitanlib/src/crypto/rsa.rs
index 41509cd177b8b..35d572b54fdf2 100644
--- a/sw/host/opentitanlib/src/crypto/rsa.rs
+++ b/sw/host/opentitanlib/src/crypto/rsa.rs
@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, bail, ensure, Context, Result};
-use num_bigint_dig::{traits::ModInverse, BigInt, BigUint, Sign::Minus};
+use anyhow::{Context, Result, anyhow, bail, ensure};
+use num_bigint_dig::{BigInt, BigUint, Sign::Minus, traits::ModInverse};
 use rand::rngs::OsRng;
 use rsa::pkcs1::{DecodeRsaPublicKey, EncodeRsaPublicKey};
 use rsa::pkcs1v15::Pkcs1v15Sign;
@@ -140,7 +140,7 @@ impl RsaPublicKey {
         self.key
             .verify(
                 Pkcs1v15Sign::new::<Sha256>(),
-                digest.to_be_bytes().as_slice(),
+                digest.as_ref(),
                 signature.to_be_bytes().as_slice(),
             )
             .map_err(|e| anyhow!(Error::VerifyFailed(anyhow!(e))))
@@ -196,7 +196,7 @@ impl RsaPrivateKey {
     pub fn sign(&self, digest: &Sha256Digest) -> Result<Signature> {
         let signature = self
             .key
-            .sign(Pkcs1v15Sign::new::<Sha256>(), &digest.to_be_bytes())
+            .sign(Pkcs1v15Sign::new::<Sha256>(), digest.as_ref())
             .map_err(|e| Error::SignFailed(anyhow!(e)))?;
         Ok(Signature::from_be_bytes(signature)?)
     }
@@ -244,7 +244,7 @@ impl Deref for RsaPrivateKey {
     }
 }
 
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct RsaRawPublicKey {
     #[serde(with = "serde_bytes")]
     #[annotate(format = hexstr)]
@@ -273,6 +273,13 @@ impl TryFrom<&RsaPublicKey> for RsaRawPublicKey {
     }
 }
 
+impl TryFrom<RsaPublicKey> for RsaRawPublicKey {
+    type Error = Error;
+    fn try_from(v: RsaPublicKey) -> Result<Self, Self::Error> {
+        RsaRawPublicKey::try_from(&v)
+    }
+}
+
 impl FromStr for RsaRawPublicKey {
     type Err = Error;
     fn from_str(s: &str) -> Result<Self, Self::Err> {
diff --git a/sw/host/opentitanlib/src/crypto/sha256.rs b/sw/host/opentitanlib/src/crypto/sha256.rs
index c2d6d1895d996..7d98936fd8cd8 100644
--- a/sw/host/opentitanlib/src/crypto/sha256.rs
+++ b/sw/host/opentitanlib/src/crypto/sha256.rs
@@ -2,16 +2,81 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use serde::{Deserialize, Serialize};
+use serde_annotate::Annotate;
 use sha2::Digest;
+use std::fmt;
+use std::str::FromStr;
 
-use crate::util::bigint::fixed_size_bigint;
+use crate::crypto::Error;
 
-fixed_size_bigint!(Sha256Digest, at_most 256);
+#[derive(Clone, Copy, Default, PartialEq, Eq, Annotate, Serialize, Deserialize)]
+#[serde(transparent)]
+pub struct Sha256Digest {
+    #[annotate(format=hexstr)]
+    pub digest: [u8; 32],
+}
+
+impl Sha256Digest {
+    pub fn hash(data: impl AsRef<[u8]>) -> Self {
+        let mut hasher = sha2::Sha256::new();
+        hasher.update(data);
+        Self {
+            digest: hasher.finalize().into(),
+        }
+    }
+
+    pub fn to_vec(&self) -> Vec<u8> {
+        self.digest.to_vec()
+    }
+
+    pub fn to_vec_rev(&self) -> Vec<u8> {
+        let mut result = self.to_vec();
+        result.reverse();
+        result
+    }
+}
+
+impl AsRef<[u8]> for Sha256Digest {
+    fn as_ref(&self) -> &[u8] {
+        &self.digest
+    }
+}
+
+impl TryFrom<&[u8]> for Sha256Digest {
+    type Error = Error;
+    fn try_from(data: &[u8]) -> std::result::Result<Self, Self::Error> {
+        Ok(Sha256Digest {
+            digest: data
+                .try_into()
+                .map_err(|_| Error::InvalidHash(hex::encode(data)))?,
+        })
+    }
+}
 
-pub fn sha256(data: impl AsRef<[u8]>) -> Sha256Digest {
-    let mut hasher = sha2::Sha256::new();
-    hasher.update(data);
-    Sha256Digest::from_be_bytes(hasher.finalize()).unwrap()
+impl FromStr for Sha256Digest {
+    type Err = anyhow::Error;
+    fn from_str(s: &str) -> std::result::Result<Self, Self::Err> {
+        let s = s.trim_start_matches("0x");
+        let data = hex::decode(s)?;
+        Ok(Sha256Digest {
+            digest: data.try_into().map_err(|_| Error::InvalidHash(s.into()))?,
+        })
+    }
+}
+
+impl fmt::Display for Sha256Digest {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        write!(f, "{}", hex::encode(self))
+    }
+}
+
+impl fmt::Debug for Sha256Digest {
+    fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
+        f.debug_struct("Sha256Digest")
+            .field("digest", &self.to_string())
+            .finish()
+    }
 }
 
 #[cfg(test)]
@@ -21,22 +86,22 @@ mod tests {
     #[test]
     fn test_sha256() {
         fn check(msg: &str, digest: &str) {
-            assert_eq!(sha256(msg.as_bytes()).to_string(), digest);
+            assert_eq!(Sha256Digest::hash(msg).to_string(), digest);
         }
         // The digests below can be obtained using `echo -n [msg] | shasum -a 256`.
         // The digest for "abc" is also available at
         // https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Standards-and-Guidelines/documents/examples/SHA256.pdf
         check(
             "",
-            "0xe3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855",
+            "e3b0c44298fc1c149afbf4c8996fb92427ae41e4649b934ca495991b7852b855",
         );
         check(
             "abc",
-            "0xba7816bf8f01cfea414140de5dae2223b00361a396177a9cb410ff61f20015ad",
+            "ba7816bf8f01cfea414140de5dae2223b00361a396177a9cb410ff61f20015ad",
         );
         check(
             "1111",
-            "0x0ffe1abd1a08215353c233d6e009613e95eec4253832a761af28ff37ac5a150c",
+            "0ffe1abd1a08215353c233d6e009613e95eec4253832a761af28ff37ac5a150c",
         );
     }
 }
diff --git a/sw/host/opentitanlib/src/crypto/spx.rs b/sw/host/opentitanlib/src/crypto/spx.rs
index f82656288a0d3..17c6b11962923 100644
--- a/sw/host/opentitanlib/src/crypto/spx.rs
+++ b/sw/host/opentitanlib/src/crypto/spx.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, ensure, Context, Result};
+use anyhow::{Context, Result, anyhow, ensure};
 use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
 use std::io::{Read, Write};
@@ -11,7 +11,7 @@ use std::str::FromStr;
 use super::Error;
 use sphincsplus::{DecodeKey, SpxPublicKey};
 
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct SpxRawPublicKey {
     #[serde(with = "serde_bytes")]
     #[annotate(format = hexstr)]
@@ -33,6 +33,13 @@ impl TryFrom<&sphincsplus::SpxPublicKey> for SpxRawPublicKey {
     }
 }
 
+impl TryFrom<sphincsplus::SpxPublicKey> for SpxRawPublicKey {
+    type Error = Error;
+    fn try_from(v: SpxPublicKey) -> Result<Self, Self::Error> {
+        (&v).try_into()
+    }
+}
+
 impl FromStr for SpxRawPublicKey {
     type Err = Error;
     fn from_str(s: &str) -> Result<Self, Self::Err> {
diff --git a/sw/host/opentitanlib/src/debug/dmi.rs b/sw/host/opentitanlib/src/debug/dmi.rs
index 946bfa09a62df..e4139c7179a63 100644
--- a/sw/host/opentitanlib/src/debug/dmi.rs
+++ b/sw/host/opentitanlib/src/debug/dmi.rs
@@ -5,7 +5,7 @@
 use std::ops::{Deref, DerefMut};
 use std::time::Duration;
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use thiserror::Error;
 
 use super::openocd::OpenOcd;
diff --git a/sw/host/opentitanlib/src/debug/openocd.rs b/sw/host/opentitanlib/src/debug/openocd.rs
index 8ed9d106e5d22..8c990433629e5 100644
--- a/sw/host/opentitanlib/src/debug/openocd.rs
+++ b/sw/host/opentitanlib/src/debug/openocd.rs
@@ -11,7 +11,7 @@ use std::path::Path;
 use std::process::{Child, Command, Stdio};
 use std::time::{Duration, Instant};
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use once_cell::sync::Lazy;
 use regex::Regex;
 use serde::{Deserialize, Serialize};
@@ -48,6 +48,7 @@ impl OpenOcd {
         stderr: &mut impl BufRead,
         regex: &Regex,
         timeout: Duration,
+        log_stdio: bool,
         s: &'a mut String,
     ) -> Result<regex::Captures<'a>> {
         let start = Instant::now();
@@ -58,7 +59,9 @@ impl OpenOcd {
             if n == 0 {
                 bail!("OpenOCD stopped before being ready?");
             }
-            log::info!(target: concat!(module_path!(), "::stderr"), "{}", s);
+            if log_stdio {
+                log::info!(target: concat!(module_path!(), "::stderr"), "{}", s);
+            }
             if regex.is_match(s) {
                 // This is not a `if let Some(capture) = regex.captures(s) {}` to to Rust
                 // borrow checker limitations. Can be modified if Polonius lands.
@@ -73,7 +76,7 @@ impl OpenOcd {
     }
 
     /// Spawn an OpenOCD server with given path.
-    pub fn spawn(path: &Path) -> Result<Self> {
+    pub fn spawn(path: &Path, log_stdio: bool) -> Result<Self> {
         let mut cmd = Command::new(path);
 
         // Let OpenOCD choose which port to bind to, in order to never unnecesarily run into
@@ -84,7 +87,6 @@ impl OpenOcd {
         cmd.arg("-c")
             .arg("tcl_port 0; telnet_port disabled; gdb_port disabled; noinit;");
 
-        log::info!("CWD: {:?}", std::env::current_dir());
         log::info!("Spawning OpenOCD: {cmd:?}");
 
         cmd.stdin(Stdio::null())
@@ -110,7 +112,9 @@ impl OpenOcd {
         let mut stderr = BufReader::new(child.stderr.take().unwrap());
         // Wait until we see 'Info : Listening on port XXX for tcl connections' before knowing
         // which port to connect to.
-        log::info!("Waiting for OpenOCD to be ready to accept a TCL connection...");
+        if log_stdio {
+            log::info!("Waiting for OpenOCD to be ready to accept a TCL connection...");
+        }
         static READY_REGEX: Lazy<Regex> = Lazy::new(|| {
             Regex::new("Info : Listening on port ([0-9]+) for tcl connections").unwrap()
         });
@@ -119,25 +123,28 @@ impl OpenOcd {
             &mut stderr,
             &READY_REGEX,
             Self::OPENOCD_TCL_READY_TMO,
+            log_stdio,
             &mut buf,
         )
         .context("OpenOCD was not ready in time to accept a connection")?;
         let openocd_port: u16 = regex_captures.get(1).unwrap().as_str().parse()?;
         // Print stdout and stderr with log
-        std::thread::spawn(move || {
-            printer::accumulate(
-                stdout,
-                concat!(module_path!(), "::stdout"),
-                Default::default(),
-            )
-        });
-        std::thread::spawn(move || {
-            printer::accumulate(
-                stderr,
-                concat!(module_path!(), "::stderr"),
-                Default::default(),
-            )
-        });
+        if log_stdio {
+            std::thread::spawn(move || {
+                printer::accumulate(
+                    stdout,
+                    concat!(module_path!(), "::stdout"),
+                    Default::default(),
+                )
+            });
+            std::thread::spawn(move || {
+                printer::accumulate(
+                    stderr,
+                    concat!(module_path!(), "::stderr"),
+                    Default::default(),
+                )
+            });
+        }
 
         let kill_guard = scopeguard::guard(child, |mut child| {
             let _ = child.kill();
@@ -248,7 +255,7 @@ impl_serializable_error!(OpenOcdError);
 impl OpenOcdJtagChain {
     /// Start OpenOCD with given JTAG options but do not connect any TAP.
     pub fn new(adapter_command: &str, opts: &JtagParams) -> Result<OpenOcdJtagChain> {
-        let mut openocd = OpenOcd::spawn(&opts.openocd)?;
+        let mut openocd = OpenOcd::spawn(&opts.openocd, opts.log_stdio)?;
 
         openocd.execute(adapter_command)?;
         openocd.execute(&format!("adapter speed {}", opts.adapter_speed_khz))?;
@@ -352,10 +359,9 @@ impl OpenOcdJtagTap {
         );
         let response = self.send_tcl_cmd(cmd.as_str())?;
         // the expected output format is 'reg_name 0xabcdef', e.g 'pc 0x10009858'
-        let (out_reg_name, value) = response
-            .trim()
-            .split_once(' ')
-            .context("expected response of the form 'reg value', got '{response}'")?;
+        let (out_reg_name, value) = response.trim().split_once(' ').with_context(|| {
+            format!("expected response of the form 'reg value', got '{response}'")
+        })?;
         ensure!(
             out_reg_name == reg_name,
             "OpenOCD returned the value for register '{out_reg_name}' instead of '{reg_name}"
diff --git a/sw/host/opentitanlib/src/dif/lc_ctrl.rs b/sw/host/opentitanlib/src/dif/lc_ctrl.rs
index 4f4e4288aefb6..5f3b6d74cdba5 100644
--- a/sw/host/opentitanlib/src/dif/lc_ctrl.rs
+++ b/sw/host/opentitanlib/src/dif/lc_ctrl.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use bitflags::bitflags;
 use num_enum::IntoPrimitive;
 use serde::{Deserialize, Serialize};
@@ -10,7 +10,7 @@ use serde::{Deserialize, Serialize};
 use crate::with_unknown;
 
 with_unknown! {
-    pub enum DifLcCtrlState: u32 {
+    pub enum DifLcCtrlState: u32 [default = Self::StateInvalid] {
         Raw = bindgen::dif::dif_lc_ctrl_state_kDifLcCtrlStateRaw ,
         TestUnlocked0 = bindgen::dif::dif_lc_ctrl_state_kDifLcCtrlStateTestUnlocked0 ,
         TestLocked0 = bindgen::dif::dif_lc_ctrl_state_kDifLcCtrlStateTestLocked0 ,
@@ -62,6 +62,35 @@ impl DifLcCtrlState {
         (0..6).fold(0u32, |acc, _| (acc << 5) | value)
     }
 
+    pub fn lc_state_to_str(self) -> &'static str {
+        match self {
+            DifLcCtrlState::Raw => "raw",
+            DifLcCtrlState::TestUnlocked0 => "test_unlocked0",
+            DifLcCtrlState::TestLocked0 => "test_locked0",
+            DifLcCtrlState::TestUnlocked1 => "test_unlocked1",
+            DifLcCtrlState::TestLocked1 => "test_locked1",
+            DifLcCtrlState::TestUnlocked2 => "test_unlocked2",
+            DifLcCtrlState::TestLocked2 => "test_locked2",
+            DifLcCtrlState::TestUnlocked3 => "test_unlocked3",
+            DifLcCtrlState::TestLocked3 => "test_locked3",
+            DifLcCtrlState::TestUnlocked4 => "test_unlocked4",
+            DifLcCtrlState::TestLocked4 => "test_locked4",
+            DifLcCtrlState::TestUnlocked5 => "test_unlocked5",
+            DifLcCtrlState::TestLocked5 => "test_locked5",
+            DifLcCtrlState::TestUnlocked6 => "test_unlocked6",
+            DifLcCtrlState::TestLocked6 => "test_locked6",
+            DifLcCtrlState::TestUnlocked7 => "test_unlocked7",
+            DifLcCtrlState::Dev => "dev",
+            DifLcCtrlState::Prod => "prod",
+            DifLcCtrlState::ProdEnd => "prod_end",
+            DifLcCtrlState::Rma => "rma",
+            DifLcCtrlState::Scrap => "scrap",
+            DifLcCtrlState::PostTransition => "post_transition",
+            DifLcCtrlState::Escalate => "escalate",
+            _ => "invalid",
+        }
+    }
+
     pub fn parse_lc_state_str(lc_state_str: &str) -> Result<Self> {
         match lc_state_str {
             "raw" => Ok(DifLcCtrlState::Raw),
diff --git a/sw/host/opentitanlib/src/dif/mod.rs b/sw/host/opentitanlib/src/dif/mod.rs
index f5f317e97f9f0..e692e2099958a 100644
--- a/sw/host/opentitanlib/src/dif/mod.rs
+++ b/sw/host/opentitanlib/src/dif/mod.rs
@@ -11,3 +11,6 @@ pub mod lc_ctrl;
 pub mod otp_ctrl;
 pub mod rstmgr;
 pub mod uart;
+
+#[cfg(not(feature = "english_breakfast"))]
+pub mod pinmux;
diff --git a/sw/host/opentitanlib/src/dif/pinmux.rs b/sw/host/opentitanlib/src/dif/pinmux.rs
new file mode 100644
index 0000000000000..24b6f5e9193bb
--- /dev/null
+++ b/sw/host/opentitanlib/src/dif/pinmux.rs
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use bindgen::dif;
+use bitflags::bitflags;
+
+bitflags! {
+    #[derive(Clone, Copy, Debug, Default, PartialEq, Eq)]
+    pub struct PinmuxPadAttr: u32 {
+        const OD_EN = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_OD_EN_1_BIT;
+        const SCHMITT_EN = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_SCHMITT_EN_1_BIT;
+        const KEEPER_EN = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_KEEPER_EN_1_BIT;
+        const PULL_SELECT = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_PULL_SELECT_1_BIT;
+        const PULL_EN = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_PULL_EN_1_BIT;
+        const VIRTUAL_OD_EN = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_VIRTUAL_OD_EN_1_BIT;
+        const INVERT = 0b1 << dif::PINMUX_MIO_PAD_ATTR_1_INVERT_1_BIT;
+    }
+}
diff --git a/sw/host/opentitanlib/src/image/image.rs b/sw/host/opentitanlib/src/image/image.rs
index be0b728a74dc8..96e4a898de530 100644
--- a/sw/host/opentitanlib/src/image/image.rs
+++ b/sw/host/opentitanlib/src/image/image.rs
@@ -2,9 +2,10 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use memoffset::offset_of;
 use sphincsplus::{SphincsPlus, SpxDomain, SpxPublicKey};
+use std::borrow::Cow;
 use std::collections::HashSet;
 use std::convert::TryInto;
 use std::fs::File;
@@ -12,19 +13,20 @@ use std::io::{Read, Write};
 use std::mem::{align_of, size_of};
 use std::path::{Path, PathBuf};
 use thiserror::Error;
+use zerocopy::FromBytes;
 
 use crate::crypto::ecdsa::{EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature};
 use crate::crypto::rsa::Modulus;
 use crate::crypto::rsa::RsaPublicKey;
 use crate::crypto::rsa::Signature as RsaSignature;
-use crate::crypto::sha256;
+use crate::crypto::sha256::Sha256Digest;
 use crate::image::manifest::{
-    Manifest, ManifestKind, SigverifySpxSignature, CHIP_MANIFEST_VERSION_MAJOR1,
-    CHIP_MANIFEST_VERSION_MAJOR2, CHIP_MANIFEST_VERSION_MINOR1, CHIP_ROM_EXT_IDENTIFIER,
-    CHIP_ROM_EXT_SIZE_MAX, MANIFEST_EXT_ID_SPX_KEY, MANIFEST_EXT_ID_SPX_SIGNATURE,
+    CHIP_MANIFEST_VERSION_MAJOR1, CHIP_MANIFEST_VERSION_MAJOR2, CHIP_MANIFEST_VERSION_MINOR1,
+    CHIP_ROM_EXT_IDENTIFIER, CHIP_ROM_EXT_SIZE_MAX, MANIFEST_EXT_ID_SPX_KEY,
+    MANIFEST_EXT_ID_SPX_SIGNATURE, Manifest, ManifestKind, SigverifySpxSignature,
 };
 use crate::image::manifest_def::{ManifestSigverifyBuffer, ManifestSpec};
-use crate::image::manifest_ext::{ManifestExtEntry, ManifestExtSpec};
+use crate::image::manifest_ext::{ManifestExtEntry, ManifestExtEntrySpec};
 use crate::util::file::{FromReader, ToWriter};
 use crate::util::parse_int::ParseInt;
 
@@ -63,11 +65,27 @@ pub struct SpxSignatureParams {
 pub struct SigverifyParams {
     pub main_sig_params: MainSignatureParams,
     pub spx_sig_params: Option<SpxSignatureParams>,
+    pub spx_hash_reversal_bug: bool,
 }
 
 impl SigverifyParams {
+    pub fn new(
+        main_sig_params: MainSignatureParams,
+        spx_sig_params: Option<SpxSignatureParams>,
+    ) -> Self {
+        SigverifyParams {
+            main_sig_params,
+            spx_sig_params,
+            spx_hash_reversal_bug: false,
+        }
+    }
+    pub fn with_hash_reversal_bug(mut self, bug: bool) -> Self {
+        self.spx_hash_reversal_bug = bug;
+        self
+    }
+
     // Verify the main image signature.
-    pub fn verify(&self, digest: &sha256::Sha256Digest) -> Result<()> {
+    pub fn verify(&self, digest: &Sha256Digest) -> Result<()> {
         match &self.main_sig_params {
             MainSignatureParams::Rsa(key, sig) => {
                 key.verify(digest, sig)?;
@@ -83,7 +101,15 @@ impl SigverifyParams {
     // Verify the optional SPX+ signature.
     pub fn spx_verify(&self, b: &[u8], domain: SpxDomain) -> Result<()> {
         if let Some(spx) = &self.spx_sig_params {
-            spx.key.verify(domain, &spx.signature, b)?;
+            let msg = match domain {
+                SpxDomain::PreHashedSha256 => Cow::from(if self.spx_hash_reversal_bug {
+                    Sha256Digest::hash(b).to_vec_rev()
+                } else {
+                    Sha256Digest::hash(b).to_vec()
+                }),
+                _ => Cow::from(b),
+            };
+            spx.key.verify(domain, &spx.signature, &msg)?;
         } else {
             bail!("No SPX signature found");
         }
@@ -240,19 +266,19 @@ impl Image {
         {
             let rsa_key = RsaPublicKey::new(Modulus::from_le_bytes(pub_key)?)?;
             let rsa_sig = RsaSignature::from_le_bytes(signature)?;
-            return Ok(SigverifyParams {
-                main_sig_params: MainSignatureParams::Rsa(rsa_key, rsa_sig),
+            return Ok(SigverifyParams::new(
+                MainSignatureParams::Rsa(rsa_key, rsa_sig),
                 spx_sig_params,
-            });
+            ));
         }
 
         let ecdsa_pub_key = EcdsaRawPublicKey::read(&mut std::io::Cursor::new(pub_key))?;
         let ecdsa_sig = EcdsaRawSignature::read(&mut std::io::Cursor::new(signature))?;
 
-        Ok(SigverifyParams {
-            main_sig_params: MainSignatureParams::Ecdsa(ecdsa_pub_key, ecdsa_sig),
+        Ok(SigverifyParams::new(
+            MainSignatureParams::Ecdsa(ecdsa_pub_key, ecdsa_sig),
             spx_sig_params,
-        })
+        ))
     }
 
     /// Overwrites all fields in the image's manifest that are defined in `other`.
@@ -266,31 +292,30 @@ impl Image {
 
     /// Adds an extension to the signed region of this `Image`.
     ///
-    /// This will take all the extensions in `spec.signed_region` and append them to the image.
+    /// This will take all the signed extensions in `spec` and append them to the image.
     /// This should be called before adding any unsigned extensions to ensure all extensions that
     /// are a part of the signature exist within the contiguous signed region of the image.
-    pub fn add_signed_manifest_extensions(&mut self, spec: &ManifestExtSpec) -> Result<()> {
-        for entry_spec in &spec.signed_region {
-            self.add_manifest_extension(ManifestExtEntry::from_spec(
-                entry_spec,
-                spec.source_path(),
-            )?)?;
-        }
-        Ok(())
+    pub fn add_signed_manifest_extensions(&mut self, spec: &[ManifestExtEntrySpec]) -> Result<()> {
+        spec.iter()
+            .filter(|entry_spec| entry_spec.is_signed())
+            .try_for_each(|entry_spec| {
+                self.add_manifest_extension(ManifestExtEntry::from_spec(entry_spec)?)
+            })
     }
 
     /// Adds an extension to the unsigned region of this `Image`.
     ///
-    /// This will take all the extensions in `spec.unsigned_region` and append them to the image.
+    /// This will take all the unsigned extensions in `spec` and append them to the image.
     /// This should only be called once all signed extensions have been added.
-    pub fn add_unsigned_manifest_extensions(&mut self, spec: &ManifestExtSpec) -> Result<()> {
-        for entry_spec in &spec.unsigned_region {
-            self.add_manifest_extension(ManifestExtEntry::from_spec(
-                entry_spec,
-                spec.source_path(),
-            )?)?;
-        }
-        Ok(())
+    pub fn add_unsigned_manifest_extensions(
+        &mut self,
+        spec: &[ManifestExtEntrySpec],
+    ) -> Result<()> {
+        spec.iter()
+            .filter(|entry_spec| !entry_spec.is_signed())
+            .try_for_each(|entry_spec| {
+                self.add_manifest_extension(ManifestExtEntry::from_spec(entry_spec)?)
+            })
     }
 
     /// Adds an extension to the end of this `Image`.
@@ -398,13 +423,24 @@ impl Image {
 
         // TODO(moidx): Remove check once we have migrated away from RSA keys
         // and start using a key type field in the manifest.
-        ensure!(
-            manifest.manifest_version.major == CHIP_MANIFEST_VERSION_MAJOR2,
-            ImageError::InvalidManifestVersionforEcdsa(
-                manifest.manifest_version.major,
-                CHIP_MANIFEST_VERSION_MAJOR2
-            )
-        );
+        //
+        // Note(cfrantz): I have disabled this error return because we want to test
+        // manifests with bad version numbers.  I've replaced the error return with
+        // a log message.  As stated by moidx@, we'll remove this once we've
+        // completely migrated away from RSA keys.
+        // ensure!(
+        //     manifest.manifest_version.major == CHIP_MANIFEST_VERSION_MAJOR2,
+        //     ImageError::InvalidManifestVersionforEcdsa(
+        //         manifest.manifest_version.major,
+        //         CHIP_MANIFEST_VERSION_MAJOR2
+        //     )
+        // );
+        if manifest.manifest_version.major != CHIP_MANIFEST_VERSION_MAJOR2 {
+            log::error!(
+                "Invalid manifest version for ECDSA: {:?}",
+                manifest.manifest_version
+            );
+        }
 
         let mut manifest_def: ManifestSpec = (&*manifest).try_into()?;
 
@@ -466,8 +502,9 @@ impl Image {
         // key type.
         // TODO(moidx): Replace this with a key type field in the manifest once
         // support for RSA keys is removed.
-        manifest.manifest_version.major = CHIP_MANIFEST_VERSION_MAJOR2;
-        manifest.manifest_version.minor = CHIP_MANIFEST_VERSION_MINOR1;
+        if manifest.manifest_version.major == CHIP_MANIFEST_VERSION_MAJOR1 {
+            manifest.manifest_version.major = CHIP_MANIFEST_VERSION_MAJOR2;
+        }
         Ok(())
     }
 
@@ -476,8 +513,7 @@ impl Image {
         let mut offset = 0;
         while offset < self.size {
             let m = &self.data.bytes[offset..offset + size_of::<Manifest>()];
-            let manifest: zerocopy::Ref<_, Manifest> =
-                zerocopy::Ref::new(m).ok_or(ImageError::Parse)?;
+            let manifest = Manifest::ref_from_bytes(m).map_err(|_| ImageError::Parse)?;
             let kind = ManifestKind(manifest.identifier);
             let mut size = 1;
             if kind.is_known_value() {
@@ -485,7 +521,7 @@ impl Image {
                 result.push(SubImage {
                     kind,
                     offset,
-                    manifest: manifest.into_ref(),
+                    manifest,
                     data: &self.data.bytes[offset..offset + size],
                 });
             }
@@ -501,17 +537,13 @@ impl Image {
 
     pub fn borrow_manifest(&self) -> Result<&Manifest> {
         let manifest_slice = &self.data.bytes[0..size_of::<Manifest>()];
-        let manifest_layout: zerocopy::Ref<_, Manifest> =
-            zerocopy::Ref::new(manifest_slice).ok_or(ImageError::Parse)?;
-        let manifest: &Manifest = manifest_layout.into_ref();
+        let manifest = Manifest::ref_from_bytes(manifest_slice).map_err(|_| ImageError::Parse)?;
         Ok(manifest)
     }
 
     pub fn borrow_manifest_mut(&mut self) -> Result<&mut Manifest> {
         let manifest_slice = &mut self.data.bytes[0..size_of::<Manifest>()];
-        let manifest_layout: zerocopy::Ref<_, Manifest> =
-            zerocopy::Ref::new(manifest_slice).ok_or(ImageError::Parse)?;
-        let manifest: &mut Manifest = manifest_layout.into_mut();
+        let manifest = Manifest::mut_from_bytes(manifest_slice).map_err(|_| ImageError::Parse)?;
         Ok(manifest)
     }
 
@@ -568,8 +600,24 @@ impl Image {
     }
 
     /// Compute the SHA256 digest for the signed portion of the `Image`.
-    pub fn compute_digest(&self) -> Result<sha256::Sha256Digest> {
-        self.map_signed_region(|v| sha256::sha256(v))
+    pub fn compute_digest(&self) -> Result<Sha256Digest> {
+        self.map_signed_region(|v| Sha256Digest::hash(v))
+    }
+}
+
+impl SubImage<'_> {
+    /// Operates on the signed region of the image.
+    pub fn map_signed_region<F, R>(&self, f: F) -> Result<R>
+    where
+        F: FnOnce(&[u8]) -> R,
+    {
+        Ok(f(&self.data[offset_of!(Manifest, usage_constraints)
+            ..self.manifest.signed_region_end as usize]))
+    }
+
+    /// Compute the SHA256 digest for the signed portion of the `Image`.
+    pub fn compute_digest(&self) -> Result<Sha256Digest> {
+        self.map_signed_region(|v| Sha256Digest::hash(v))
     }
 }
 
@@ -610,6 +658,10 @@ impl ImageAssembler {
     fn read(path: &Path, buf: &mut [u8]) -> Result<usize> {
         let mut file = File::open(path)?;
         let len = file.metadata()?.len() as usize;
+        ensure!(len <= buf.len(), ImageError::IncompleteRead(len, buf.len()));
+        if buf[..len].iter().any(|&c| c != 0xff) {
+            bail!("{path:?} Overlapped during image assembly");
+        }
         let n = file.read(buf)?;
         ensure!(len == n, ImageError::IncompleteRead(len, n));
         Ok(n)
@@ -646,15 +698,15 @@ impl ImageAssembler {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::testdata;
 
     #[test]
     fn test_assemble_concat() -> Result<()> {
         // Test image assembly by concatenation.
         let mut image = ImageAssembler::with_params(16, false);
         image.parse(&[
-            testdata!("hello.txt").to_str().unwrap(),
-            testdata!("world.txt").to_str().unwrap(),
+            testdata("image/hello.txt").to_str().unwrap(),
+            testdata("image/world.txt").to_str().unwrap(),
         ])?;
         let data = image.assemble()?;
         assert_eq!(data, b"HelloWorld\xff\xff\xff\xff\xff\xff");
@@ -666,8 +718,8 @@ mod tests {
         // Test image assembly by explicit offsets.
         let mut image = ImageAssembler::with_params(16, false);
         image.parse(&[
-            testdata!("hello.txt@0").to_str().unwrap(),
-            testdata!("world.txt@0x8").to_str().unwrap(),
+            testdata("image/hello.txt@0").to_str().unwrap(),
+            testdata("image/world.txt@0x8").to_str().unwrap(),
         ])?;
         let data = image.assemble()?;
         assert_eq!(data, b"Hello\xff\xff\xffWorld\xff\xff\xff");
@@ -679,8 +731,8 @@ mod tests {
         // Test image assembly with mirroring.
         let mut image = ImageAssembler::with_params(20, true);
         image.parse(&[
-            testdata!("hello.txt").to_str().unwrap(),
-            testdata!("world.txt").to_str().unwrap(),
+            testdata("image/hello.txt").to_str().unwrap(),
+            testdata("image/world.txt").to_str().unwrap(),
         ])?;
         let data = image.assemble()?;
         assert_eq!(data, b"HelloWorldHelloWorld");
@@ -692,8 +744,8 @@ mod tests {
         // Test image assembly where one of the source files isn't read completely.
         let mut image = ImageAssembler::with_params(16, true);
         image.parse(&[
-            testdata!("hello.txt@0").to_str().unwrap(),
-            testdata!("world.txt@0x5").to_str().unwrap(),
+            testdata("image/hello.txt@0").to_str().unwrap(),
+            testdata("image/world.txt@0x5").to_str().unwrap(),
         ])?;
         let err = image.assemble().unwrap_err();
         assert_eq!(
@@ -706,18 +758,18 @@ mod tests {
     #[test]
     fn test_load_image() {
         // Read and write back image.
-        let image = Image::read_from_file(&testdata!("test_image.bin")).unwrap();
+        let image = Image::read_from_file(&testdata("image/test_image.bin")).unwrap();
         image
-            .write_to_file(&testdata!("test_image_out.bin"))
+            .write_to_file(&testdata("image/test_image_out.bin"))
             .unwrap();
 
         // Ensure the result is identical to the original.
         let (mut orig_bytes, mut res_bytes) = (Vec::<u8>::new(), Vec::<u8>::new());
-        File::open(testdata!("test_image.bin"))
+        File::open(testdata("image/test_image.bin"))
             .unwrap()
             .read_to_end(&mut orig_bytes)
             .unwrap();
-        File::open(testdata!("test_image_out.bin"))
+        File::open(testdata("image/test_image_out.bin"))
             .unwrap()
             .read_to_end(&mut res_bytes)
             .unwrap();
diff --git a/sw/host/opentitanlib/src/image/manifest.rs b/sw/host/opentitanlib/src/image/manifest.rs
index c0d0524cc8cf3..0fae1191d8131 100644
--- a/sw/host/opentitanlib/src/image/manifest.rs
+++ b/sw/host/opentitanlib/src/image/manifest.rs
@@ -12,7 +12,12 @@
 #![deny(unsafe_code)]
 
 use crate::with_unknown;
-use zerocopy::{AsBytes, FromBytes, FromZeroes};
+use anyhow::Result;
+use byteorder::{LittleEndian, WriteBytesExt};
+use serde::{Deserialize, Serialize};
+use serde_annotate::Annotate;
+use std::io::Write;
+use zerocopy::{FromBytes, Immutable, IntoBytes, KnownLayout};
 
 // Currently, these definitions must be updated manually but they can be
 // generated using the following commands (requires bindgen):
@@ -37,8 +42,16 @@ pub const CHIP_MANIFEST_EXT_TABLE_COUNT: usize = 15;
 pub const MANIFEST_USAGE_CONSTRAINT_UNSELECTED_WORD_VAL: u32 = 0xa5a5a5a5;
 pub const MANIFEST_EXT_ID_SPX_KEY: u32 = 0x94ac01ec;
 pub const MANIFEST_EXT_ID_SPX_SIGNATURE: u32 = 0xad77f84a;
+pub const MANIFEST_EXT_ID_SECVER_WRITE: u32 = 0x3f086a41;
+pub const MANIFEST_EXT_ID_ISFB: u32 = 0x42465349;
+pub const MANIFEST_EXT_ID_ISFB_ERASE: u32 = 0x45465349;
+pub const MANIFEST_EXT_ID_IMAGE_TYPE: u32 = 0x494d4754;
 pub const MANIFEST_EXT_NAME_SPX_KEY: u32 = 0x30545845;
 pub const MANIFEST_EXT_NAME_SPX_SIGNATURE: u32 = 0x31545845;
+pub const MANIFEST_EXT_NAME_SECVER_WRITE: u32 = 0x56434553;
+pub const MANIFEST_EXT_NAME_ISFB: u32 = 0x42465349;
+pub const MANIFEST_EXT_NAME_ISFB_ERASE: u32 = 0x45465349;
+pub const MANIFEST_EXT_NAME_IMAGE_TYPE: u32 = 0x494d4754;
 pub const CHIP_ROM_EXT_IDENTIFIER: u32 = 0x4552544f;
 pub const CHIP_BL0_IDENTIFIER: u32 = 0x3042544f;
 pub const CHIP_ROM_EXT_SIZE_MIN: u32 = 8788;
@@ -55,7 +68,7 @@ with_unknown! {
 
 /// Manifest for boot stage images stored in flash.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(KnownLayout, Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct Manifest {
     pub signature: SigverifyBuffer,
     pub usage_constraints: ManifestUsageConstraints,
@@ -79,7 +92,7 @@ pub struct Manifest {
 
 /// A type that holds 2 16-bit values for manifest major and minor format versions.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default, Copy, Clone)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default, Copy, Clone)]
 pub struct ManifestVersion {
     pub minor: u16,
     pub major: u16,
@@ -87,7 +100,7 @@ pub struct ManifestVersion {
 
 /// A type that holds 1964 32-bit words for SPHINCS+ signatures.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Copy, Clone)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Copy, Clone)]
 pub struct SigverifySpxSignature {
     pub data: [u32; 1964usize],
 }
@@ -102,15 +115,22 @@ impl Default for SigverifySpxSignature {
 
 /// Extension header.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default, Serialize, Deserialize)]
 pub struct ManifestExtHeader {
     pub identifier: u32,
     pub name: u32,
 }
 
+impl ManifestExtHeader {
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        dest.write_all(self.as_bytes())?;
+        Ok(())
+    }
+}
+
 /// SPHINCS+ signature manifest extension.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct ManifestExtSpxSignature {
     pub header: ManifestExtHeader,
     pub signature: SigverifySpxSignature,
@@ -118,14 +138,14 @@ pub struct ManifestExtSpxSignature {
 
 /// A type that holds 8 32-bit words for SPHINCS+ public keys.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default, Copy, Clone)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default, Copy, Clone)]
 pub struct SigverifySpxKey {
     pub data: [u32; 8usize],
 }
 
 /// SPHINCS+ public key manifest extension.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct ManifestExtSpxKey {
     pub header: ManifestExtHeader,
     pub key: SigverifySpxKey,
@@ -133,7 +153,7 @@ pub struct ManifestExtSpxKey {
 
 /// A type that holds 96 32-bit words for RSA-3072.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 pub struct SigverifyBuffer {
     pub data: [u32; 96usize],
 }
@@ -144,16 +164,73 @@ impl Default for SigverifyBuffer {
     }
 }
 
+/// SecVer Write manifest extension
+#[repr(C)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
+pub struct ManifestExtSecVerWrite {
+    pub header: ManifestExtHeader,
+    pub write: u32,
+}
+
+/// Integrator Specific Firmware Binding product expression.
+#[derive(Debug, Serialize, Deserialize, Annotate)]
+pub struct ManifestExtIsfbProductExpr {
+    pub mask: u32,
+    pub value: u32,
+}
+
+/// Integrator Specific Firmware Binding manifest extension.
+#[derive(Debug, Serialize, Deserialize)]
+pub struct ManifestExtIsfb {
+    pub header: ManifestExtHeader,
+    pub strike_mask: u128,
+    pub product_expr_count: u32,
+    pub product_expr: Vec<ManifestExtIsfbProductExpr>,
+}
+
+impl ManifestExtIsfb {
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        self.header.write(dest)?;
+        dest.write_u128::<LittleEndian>(self.strike_mask)?;
+        dest.write_u32::<LittleEndian>(self.product_expr_count)?;
+        for x in &self.product_expr {
+            dest.write_u32::<LittleEndian>(x.mask)?;
+            dest.write_u32::<LittleEndian>(x.value)?;
+        }
+        Ok(())
+    }
+
+    pub fn to_vec(&self) -> Result<Vec<u8>> {
+        let mut buf = Vec::new();
+        self.write(&mut buf)?;
+        Ok(buf)
+    }
+}
+
+#[repr(C)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
+pub struct ManifestExtIsfbErasePolicy {
+    pub header: ManifestExtHeader,
+    pub erase_allowed: u32,
+}
+
+#[repr(C)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
+pub struct ManifestExtImageType {
+    pub header: ManifestExtHeader,
+    pub image_type: u32,
+}
+
 /// A type that holds the 256-bit device identifier.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct LifecycleDeviceId {
     pub device_id: [u32; 8usize],
 }
 
 /// Manifest usage constraints.
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 pub struct ManifestUsageConstraints {
     pub selector_bits: u32,
     pub device_id: LifecycleDeviceId,
@@ -178,27 +255,27 @@ impl Default for ManifestUsageConstraints {
 
 /// Manifest timestamp
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct Timestamp {
     pub timestamp_low: u32,
     pub timestamp_high: u32,
 }
 
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 pub struct KeymgrBindingValue {
     pub data: [u32; 8usize],
 }
 
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default, Copy, Clone)]
+#[derive(KnownLayout, Immutable, IntoBytes, FromBytes, Debug, Default, Copy, Clone)]
 pub struct ManifestExtTableEntry {
     pub identifier: u32,
     pub offset: u32,
 }
 
 #[repr(C)]
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default, Copy, Clone)]
+#[derive(KnownLayout, Immutable, IntoBytes, FromBytes, Debug, Default, Copy, Clone)]
 pub struct ManifestExtTable {
     pub entries: [ManifestExtTableEntry; CHIP_MANIFEST_EXT_TABLE_COUNT],
 }
diff --git a/sw/host/opentitanlib/src/image/manifest_def.rs b/sw/host/opentitanlib/src/image/manifest_def.rs
index abc046b6b99ae..f7c8a4994f044 100644
--- a/sw/host/opentitanlib/src/image/manifest_def.rs
+++ b/sw/host/opentitanlib/src/image/manifest_def.rs
@@ -3,20 +3,22 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use crate::image::manifest::*;
-use crate::image::manifest_ext::ManifestExtId;
+use crate::image::manifest_ext::{ManifestExtEntrySpec, ManifestExtId};
 use crate::util::bigint::fixed_size_bigint;
+use crate::util::known_keys::KNOWN_KEYS;
 use crate::util::num_de::HexEncoded;
 use crate::util::parse_int::ParseInt;
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use serde::{Deserialize, Serialize};
+use serde_annotate::Annotate;
 use std::convert::{TryFrom, TryInto};
 use std::fmt;
 use std::iter::IntoIterator;
 use std::path::Path;
 use thiserror::Error;
 
-use zerocopy::AsBytes;
+use zerocopy::IntoBytes;
 
 #[derive(Debug, Error)]
 pub enum ManifestError {
@@ -50,7 +52,7 @@ macro_rules! manifest_def {
             $field_name:ident: $field_type:ty,
         )*
     }, $out_type:ident) => {
-        #[derive(Clone, Default, Deserialize, Serialize, Debug)]
+        #[derive(Clone, Default, Deserialize, Serialize, Debug, Annotate)]
         $access struct $name {
             $(
                 $(#[$doc])?
@@ -177,8 +179,23 @@ impl ManifestPacked<[ManifestExtTableEntry; CHIP_MANIFEST_EXT_TABLE_COUNT]>
 
     fn overwrite(&mut self, o: Self) {
         for i in 0..self.len() {
-            if !matches!(o[i].0, ManifestExtEntryVar::None) {
-                self[i].0 = o[i].0.clone();
+            match o[i].0 {
+                ManifestExtEntryVar::Name(other_id) => match self[i].0 {
+                    ManifestExtEntryVar::IdOffset {
+                        identifier: self_id,
+                        offset: _,
+                    } => {
+                        if self_id == other_id {
+                            // Do not overwrite existing entries with matching IDs.
+                            continue;
+                        } else {
+                            self[i].0 = o[i].0.clone()
+                        }
+                    }
+                    _ => self[i].0 = o[i].0.clone(),
+                },
+                ManifestExtEntryVar::None => (),
+                _ => self[i].0 = o[i].0.clone(),
             }
         }
     }
@@ -220,27 +237,173 @@ impl<T: ParseInt + fmt::LowerHex, const N: usize> ManifestPacked<[T; N]>
     }
 }
 
-manifest_def! {
-    pub struct ManifestSpec {
-        signature: ManifestSigverifyBigInt,
-        usage_constraints: ManifestUsageConstraintsDef,
-        pub_key: ManifestSigverifyBigInt,
-        address_translation: ManifestSmallInt<u32>,
-        identifier: ManifestSmallInt<u32>,
-        manifest_version: ManifestVersionDef,
-        signed_region_end: ManifestSmallInt<u32>,
-        length: ManifestSmallInt<u32>,
-        version_major: ManifestSmallInt<u32>,
-        version_minor: ManifestSmallInt<u32>,
-        security_version: ManifestSmallInt<u32>,
-        timestamp: [ManifestSmallInt<u32>; 2],
-        binding_value: [ManifestSmallInt<u32>; 8],
-        max_key_version: ManifestSmallInt<u32>,
-        code_start: ManifestSmallInt<u32>,
-        code_end: ManifestSmallInt<u32>,
-        entry_point: ManifestSmallInt<u32>,
-        extensions: [ManifestExtTableEntryDef; CHIP_MANIFEST_EXT_TABLE_COUNT],
-    }, Manifest
+#[derive(Clone, Default, Deserialize, Serialize, Debug)]
+pub struct ManifestSpec {
+    #[serde(default)]
+    signature: ManifestSigverifyBigInt,
+
+    #[serde(default)]
+    usage_constraints: ManifestUsageConstraintsDef,
+
+    // TODO(cfrantz): Re-examine the `Annotate` trait approach
+    // in serde_annotate.
+    //#[annotate(comment = pub_key_id())]
+    #[serde(default)]
+    pub_key: ManifestSigverifyBigInt,
+
+    #[serde(default)]
+    address_translation: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    identifier: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    manifest_version: ManifestVersionDef,
+
+    #[serde(default)]
+    signed_region_end: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    length: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    version_major: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    version_minor: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    security_version: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    timestamp: [ManifestSmallInt<u32>; 2],
+
+    #[serde(default)]
+    binding_value: [ManifestSmallInt<u32>; 8],
+
+    #[serde(default)]
+    max_key_version: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    code_start: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    code_end: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    entry_point: ManifestSmallInt<u32>,
+
+    #[serde(default)]
+    extensions: [ManifestExtTableEntryDef; CHIP_MANIFEST_EXT_TABLE_COUNT],
+
+    #[serde(default)]
+    pub extension_params: Vec<ManifestExtEntrySpec>,
+}
+
+impl ManifestPacked<Manifest> for ManifestSpec {
+    fn unpack(self, _name: &'static str) -> Result<Manifest> {
+        Ok(Manifest {
+            // Call `unpack()` on each field with the field's name included for use in
+            // error messages.
+            signature: self.signature.unpack("signature")?.try_into()?,
+            usage_constraints: self.usage_constraints.unpack("usage_constraints")?,
+            pub_key: self.pub_key.unpack("pub_key")?.try_into()?,
+            address_translation: self.address_translation.unpack("address_translation")?,
+            identifier: self.identifier.unpack("identifier")?,
+            manifest_version: self.manifest_version.unpack("manifest_version")?,
+            signed_region_end: self.signed_region_end.unpack("signed_region_end")?,
+            length: self.length.unpack("length")?,
+            version_major: self.version_major.unpack("version_major")?,
+            version_minor: self.version_minor.unpack("version_minor")?,
+            security_version: self.security_version.unpack("security_version")?,
+            timestamp: self.timestamp.unpack("timestamp")?.try_into()?,
+            binding_value: self.binding_value.unpack("binding_value")?.try_into()?,
+            max_key_version: self.max_key_version.unpack("max_key_version")?,
+            code_start: self.code_start.unpack("code_start")?,
+            code_end: self.code_end.unpack("code_end")?,
+            entry_point: self.entry_point.unpack("entry_point")?,
+            extensions: self.extensions.unpack("extensions")?.into(),
+        })
+    }
+
+    fn overwrite(&mut self, o: ManifestSpec) {
+        self.signature.overwrite(o.signature);
+        self.usage_constraints.overwrite(o.usage_constraints);
+        self.pub_key.overwrite(o.pub_key);
+        self.address_translation.overwrite(o.address_translation);
+        self.identifier.overwrite(o.identifier);
+        self.manifest_version.overwrite(o.manifest_version);
+        self.signed_region_end.overwrite(o.signed_region_end);
+        self.length.overwrite(o.length);
+        self.version_major.overwrite(o.version_major);
+        self.version_minor.overwrite(o.version_minor);
+        self.security_version.overwrite(o.security_version);
+        self.timestamp.overwrite(o.timestamp);
+        self.binding_value.overwrite(o.binding_value);
+        self.max_key_version.overwrite(o.max_key_version);
+        self.code_start.overwrite(o.code_start);
+        self.code_end.overwrite(o.code_end);
+        self.entry_point.overwrite(o.entry_point);
+        self.extensions.overwrite(o.extensions);
+        // TODO(moidx): Implement extension_params overwrite.
+        // Extension params are not overwritten.
+    }
+}
+
+impl TryInto<Manifest> for ManifestSpec {
+    type Error = anyhow::Error;
+
+    fn try_into(self) -> Result<Manifest> {
+        self.unpack("")
+    }
+}
+
+impl TryFrom<&Manifest> for ManifestSpec {
+    type Error = anyhow::Error;
+
+    fn try_from(o: &Manifest) -> Result<Self> {
+        Ok(ManifestSpec {
+            signature: (&o.signature).try_into()?,
+            usage_constraints: (&o.usage_constraints).try_into()?,
+            pub_key: (&o.pub_key).try_into()?,
+            address_translation: (&o.address_translation).into(),
+            identifier: (&o.identifier).into(),
+            manifest_version: (&o.manifest_version).try_into()?,
+            signed_region_end: (&o.signed_region_end).into(),
+            length: (&o.length).into(),
+            version_major: (&o.version_major).into(),
+            version_minor: (&o.version_minor).into(),
+            security_version: (&o.security_version).into(),
+            timestamp: (&o.timestamp).into(),
+            binding_value: (&o.binding_value).into(),
+            max_key_version: (&o.max_key_version).into(),
+            code_start: (&o.code_start).into(),
+            code_end: (&o.code_end).into(),
+            entry_point: (&o.entry_point).into(),
+            extensions: (&o.extensions).into(),
+
+            // TODO(moidx): Implement extension_params extraction from Manifest.
+            extension_params: Vec::new(),
+        })
+    }
+}
+
+impl ManifestSpec {
+    // TODO(cfrantz): Re-examine the `Annotate` trait approach in serde_annotate.
+    // To avoid min_specialization, I took the approach of managing a raw pointer,
+    // but serde occasionally will hand you a &&T when you were expecting &T.
+    // This leads to a fatal problem when trying to access the data held by T.
+    #[allow(dead_code)]
+    fn pub_key_id(&self) -> Option<String> {
+        if let Some(key) = &self.pub_key.0 {
+            let b = key.to_le_bytes();
+            let w = u32::from_le_bytes([b[0], b[1], b[2], b[3]]);
+            let name = KNOWN_KEYS.get(&w).unwrap_or(&"unknown");
+            Some(format!("Public Key ID {w:08x} is {name}"))
+        } else {
+            None
+        }
+    }
 }
 
 manifest_def! {
@@ -419,13 +582,13 @@ impl From<&ManifestExtTable> for [ManifestExtTableEntryDef; CHIP_MANIFEST_EXT_TA
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::testdata;
     use deser_hjson::from_str;
 
     #[test]
     fn test_manifest_from_hjson() {
         let def: ManifestSpec =
-            from_str(&std::fs::read_to_string(testdata!("manifest.hjson")).unwrap()).unwrap();
+            from_str(&std::fs::read_to_string(testdata("image/manifest.hjson")).unwrap()).unwrap();
 
         let _: Manifest = def.try_into().unwrap();
     }
@@ -433,7 +596,7 @@ mod tests {
     #[test]
     fn test_manifest_from_hjson_missing() {
         let def: ManifestSpec =
-            from_str(&std::fs::read_to_string(testdata!("manifest_missing.hjson")).unwrap())
+            from_str(&std::fs::read_to_string(testdata("image/manifest_missing.hjson")).unwrap())
                 .unwrap();
 
         let res: Result<Manifest> = def.try_into();
@@ -443,7 +606,7 @@ mod tests {
     #[test]
     fn test_manifest_overwrite() {
         let mut base: ManifestSpec =
-            from_str(&std::fs::read_to_string(testdata!("manifest.hjson")).unwrap()).unwrap();
+            from_str(&std::fs::read_to_string(testdata("image/manifest.hjson")).unwrap()).unwrap();
         let other = ManifestSpec {
             identifier: from_str("0xabcd").unwrap(),
             binding_value: from_str(stringify!(["0", "1", "2", "3", "4", "5", "6", "7"])).unwrap(),
@@ -463,7 +626,7 @@ mod tests {
     #[test]
     fn test_manifest_convert() {
         let def1: ManifestSpec =
-            from_str(&std::fs::read_to_string(testdata!("manifest.hjson")).unwrap()).unwrap();
+            from_str(&std::fs::read_to_string(testdata("image/manifest.hjson")).unwrap()).unwrap();
         let def2 = def1.clone();
 
         let bin1: Manifest = def1.try_into().unwrap();
diff --git a/sw/host/opentitanlib/src/image/manifest_ext.rs b/sw/host/opentitanlib/src/image/manifest_ext.rs
index e4076c4c67e8c..4fb201fd4ffd9 100644
--- a/sw/host/opentitanlib/src/image/manifest_ext.rs
+++ b/sw/host/opentitanlib/src/image/manifest_ext.rs
@@ -6,8 +6,9 @@ use anyhow::Result;
 use serde::{self, Deserialize, Serialize};
 use std::path::{Path, PathBuf};
 use thiserror::Error;
-use zerocopy::AsBytes;
+use zerocopy::IntoBytes;
 
+use crate::chip::boolean::HardenedBool;
 use crate::image::manifest::*;
 use crate::image::manifest_def::le_bytes_to_word_arr;
 use crate::util::num_de::HexEncoded;
@@ -26,43 +27,63 @@ with_unknown! {
     pub enum ManifestExtId: u32 {
         spx_key = MANIFEST_EXT_ID_SPX_KEY,
         spx_signature = MANIFEST_EXT_ID_SPX_SIGNATURE,
+        secver_write = MANIFEST_EXT_ID_SECVER_WRITE,
+        isfb = MANIFEST_EXT_ID_ISFB,
+        isfb_erase = MANIFEST_EXT_ID_ISFB_ERASE,
+        image_type = MANIFEST_EXT_ID_IMAGE_TYPE,
     }
 }
 
 /// Top level spec for manifest extension HJSON files.
 #[derive(Default, Debug, Deserialize, Serialize)]
 pub struct ManifestExtSpec {
-    pub signed_region: Vec<ManifestExtEntrySpec>,
-    pub unsigned_region: Vec<ManifestExtEntrySpec>,
+    pub extension_params: Vec<ManifestExtEntrySpec>,
     #[serde(skip)]
     relative_path: Option<PathBuf>,
 }
 
+#[derive(Debug, Clone, PartialEq, Deserialize, Serialize)]
+pub struct ProductExpr {
+    pub mask: HexEncoded<u32>,
+    pub value: HexEncoded<u32>,
+}
+
 /// Specs for the known extension variants.
 ///
 /// This includes a raw variant that can take any id, name, and value.
-#[derive(Debug, Deserialize, Serialize, PartialEq)]
-#[serde(untagged)]
+#[derive(Clone, Debug, Deserialize, PartialEq, Serialize)]
 pub enum ManifestExtEntrySpec {
+    #[serde(alias = "spx_key")]
     SpxKey {
         /// The path to the SPHINCS+ public or private key.
-        ///
-        /// If a relative path is used, this path will typically be resolved relative to the path
-        /// given by `ManifestExtSpc::source_path()` of the `ManifestExtSpec` that contains this
-        /// spec.
         spx_key: PathBuf,
     },
+    #[serde(alias = "spx_signature")]
     SpxSignature {
         /// The path to the SPHINCS+ signature.
-        ///
-        /// If a relative path is used, this path will typically be resolved relative to the path
-        /// given by `ManifestExtSpc::source_path()` of the `ManifestExtSpec` that contains this
-        /// spec.
         spx_signature: PathBuf,
     },
+    #[serde(alias = "secver_write")]
+    SecVerWrite {
+        /// Whether or not to write the security version into boot data.
+        secver_write: bool,
+    },
+    #[serde(alias = "integrator_specific_firmware_binding")]
+    Isfb {
+        strike_mask: HexEncoded<u128>,
+        product_expr: Vec<ProductExpr>,
+    },
+    #[serde(alias = "isfb_erase_policy")]
+    IsfbErasePolicy { erase_allowed: bool },
+
+    #[serde(alias = "image_type")]
+    ImageType { image_type: u32 },
+
+    #[serde(alias = "raw")]
     Raw {
         name: HexEncoded<u32>,
         identifier: HexEncoded<u32>,
+        signed: bool,
         value: Vec<HexEncoded<u8>>,
     },
 }
@@ -71,6 +92,10 @@ pub enum ManifestExtEntrySpec {
 pub enum ManifestExtEntry {
     SpxKey(ManifestExtSpxKey),
     SpxSignature(Box<ManifestExtSpxSignature>),
+    SecVerWrite(ManifestExtSecVerWrite),
+    Isfb(ManifestExtIsfb),
+    IsfbErasePolicy(ManifestExtIsfbErasePolicy),
+    ImageType(ManifestExtImageType),
     Raw {
         header: ManifestExtHeader,
         data: Vec<u8>,
@@ -101,11 +126,23 @@ impl ManifestExtEntrySpec {
             ManifestExtEntrySpec::SpxSignature { spx_signature: _ } => {
                 MANIFEST_EXT_ID_SPX_SIGNATURE
             }
-            ManifestExtEntrySpec::Raw {
-                name: _,
-                identifier,
-                value: _,
-            } => **identifier,
+            ManifestExtEntrySpec::SecVerWrite { .. } => MANIFEST_EXT_ID_SECVER_WRITE,
+            ManifestExtEntrySpec::Isfb { .. } => MANIFEST_EXT_ID_ISFB,
+            ManifestExtEntrySpec::IsfbErasePolicy { .. } => MANIFEST_EXT_ID_ISFB_ERASE,
+            ManifestExtEntrySpec::ImageType { image_type: _ } => MANIFEST_EXT_ID_IMAGE_TYPE,
+            ManifestExtEntrySpec::Raw { identifier, .. } => **identifier,
+        }
+    }
+
+    pub fn is_signed(&self) -> bool {
+        match self {
+            ManifestExtEntrySpec::SpxKey { .. }
+            | ManifestExtEntrySpec::SecVerWrite { .. }
+            | ManifestExtEntrySpec::Isfb { .. }
+            | ManifestExtEntrySpec::IsfbErasePolicy { .. }
+            | ManifestExtEntrySpec::ImageType { .. } => true,
+            ManifestExtEntrySpec::SpxSignature { .. } => false,
+            ManifestExtEntrySpec::Raw { signed, .. } => *signed,
         }
     }
 }
@@ -139,25 +176,99 @@ impl ManifestExtEntry {
         )))
     }
 
+    pub fn new_secver_write_entry(write: u32) -> Result<Self> {
+        Ok(ManifestExtEntry::SecVerWrite(ManifestExtSecVerWrite {
+            header: ManifestExtHeader {
+                identifier: MANIFEST_EXT_ID_SECVER_WRITE,
+                name: MANIFEST_EXT_NAME_SECVER_WRITE,
+            },
+            write,
+        }))
+    }
+
+    pub fn new_isfb_erase_policy_entry(erase_allowed: u32) -> Result<Self> {
+        Ok(ManifestExtEntry::IsfbErasePolicy(
+            ManifestExtIsfbErasePolicy {
+                header: ManifestExtHeader {
+                    identifier: MANIFEST_EXT_ID_ISFB_ERASE,
+                    name: MANIFEST_EXT_NAME_ISFB_ERASE,
+                },
+                erase_allowed,
+            },
+        ))
+    }
+
+    pub fn new_isfb_entry(strike_mask: u128, product_expr_spec: Vec<ProductExpr>) -> Result<Self> {
+        let product_expr_count = product_expr_spec.len() as u32;
+        let product_expr = product_expr_spec
+            .into_iter()
+            .map(|expr| ManifestExtIsfbProductExpr {
+                mask: expr.mask.0,
+                value: expr.value.0,
+            })
+            .collect();
+        Ok(ManifestExtEntry::Isfb(ManifestExtIsfb {
+            header: ManifestExtHeader {
+                identifier: MANIFEST_EXT_ID_ISFB,
+                name: MANIFEST_EXT_NAME_ISFB,
+            },
+            strike_mask,
+            product_expr_count,
+            product_expr,
+        }))
+    }
+
+    pub fn new_image_type_entry(image_type: u32) -> Result<Self> {
+        Ok(ManifestExtEntry::ImageType(ManifestExtImageType {
+            header: ManifestExtHeader {
+                identifier: MANIFEST_EXT_ID_IMAGE_TYPE,
+                name: MANIFEST_EXT_NAME_IMAGE_TYPE,
+            },
+            image_type,
+        }))
+    }
+
     /// Creates a new manifest extension from a given `spec`.
-    ///
-    /// For extensions that reference other resources, such as SPHINCS+ keys or signatures, this
-    /// function will attempt to load those resources to create the extension.
-    pub fn from_spec(spec: &ManifestExtEntrySpec, relative_path: Option<&Path>) -> Result<Self> {
-        let relative_path = relative_path.unwrap_or(Path::new(""));
+    pub fn from_spec(spec: &ManifestExtEntrySpec) -> Result<Self> {
         Ok(match spec {
-            ManifestExtEntrySpec::SpxKey { spx_key } => ManifestExtEntry::new_spx_key_entry(
-                &SpxPublicKey::read_pem_file(relative_path.join(spx_key))?,
-            )?,
+            ManifestExtEntrySpec::SpxKey { spx_key } => {
+                ManifestExtEntry::new_spx_key_entry(&SpxPublicKey::read_pem_file(spx_key)?)?
+            }
             ManifestExtEntrySpec::SpxSignature { spx_signature } => {
-                ManifestExtEntry::new_spx_signature_entry(&std::fs::read(
-                    relative_path.join(spx_signature),
-                )?)?
+                ManifestExtEntry::new_spx_signature_entry(&std::fs::read(spx_signature)?)?
+            }
+            ManifestExtEntrySpec::SecVerWrite { secver_write } => {
+                ManifestExtEntry::new_secver_write_entry(
+                    (if *secver_write {
+                        HardenedBool::True
+                    } else {
+                        HardenedBool::False
+                    })
+                    .into(),
+                )?
+            }
+            ManifestExtEntrySpec::IsfbErasePolicy { erase_allowed } => {
+                ManifestExtEntry::new_isfb_erase_policy_entry(
+                    (if *erase_allowed {
+                        HardenedBool::True
+                    } else {
+                        HardenedBool::False
+                    })
+                    .into(),
+                )?
+            }
+            ManifestExtEntrySpec::Isfb {
+                strike_mask,
+                product_expr,
+            } => ManifestExtEntry::new_isfb_entry(**strike_mask, product_expr.to_vec())?,
+            ManifestExtEntrySpec::ImageType { image_type } => {
+                ManifestExtEntry::new_image_type_entry(*image_type)?
             }
             ManifestExtEntrySpec::Raw {
                 name,
                 identifier,
                 value,
+                ..
             } => ManifestExtEntry::Raw {
                 header: ManifestExtHeader {
                     identifier: **identifier,
@@ -173,6 +284,10 @@ impl ManifestExtEntry {
         match self {
             ManifestExtEntry::SpxKey(key) => &key.header,
             ManifestExtEntry::SpxSignature(sig) => &sig.header,
+            ManifestExtEntry::SecVerWrite(sv) => &sv.header,
+            ManifestExtEntry::Isfb(isfb) => &isfb.header,
+            ManifestExtEntry::IsfbErasePolicy(erase) => &erase.header,
+            ManifestExtEntry::ImageType(image_type) => &image_type.header,
             ManifestExtEntry::Raw { header, data: _ } => header,
         }
     }
@@ -182,6 +297,10 @@ impl ManifestExtEntry {
         match self {
             ManifestExtEntry::SpxKey(key) => key.as_bytes().to_vec(),
             ManifestExtEntry::SpxSignature(sig) => sig.as_bytes().to_vec(),
+            ManifestExtEntry::SecVerWrite(sv) => sv.as_bytes().to_vec(),
+            ManifestExtEntry::Isfb(isfb) => isfb.to_vec().unwrap(),
+            ManifestExtEntry::IsfbErasePolicy(erase) => erase.as_bytes().to_vec(),
+            ManifestExtEntry::ImageType(image_type) => image_type.as_bytes().to_vec(),
             ManifestExtEntry::Raw { header, data } => {
                 header.as_bytes().iter().chain(data).copied().collect()
             }
@@ -192,34 +311,108 @@ impl ManifestExtEntry {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::hexdump::hexdump_string;
     use crate::util::num_de::HexEncoded;
+    use crate::util::testdata;
 
     #[test]
     fn test_manifest_ext_from_hjson() {
-        let spec = ManifestExtSpec::read_from_file(&testdata!("manifest_ext.hjson")).unwrap();
-        assert_eq!(spec.source_path(), Some(testdata!().as_path()));
-        assert_eq!(spec.signed_region.len(), 2);
+        let spec = ManifestExtSpec::read_from_file(&testdata("image/manifest_ext.hjson")).unwrap();
+        assert_eq!(spec.source_path(), Some(testdata("image").as_path()));
+        assert_eq!(spec.extension_params.len(), 6);
         assert_eq!(
-            spec.signed_region[0],
+            spec.extension_params[0],
             ManifestExtEntrySpec::SpxKey {
                 spx_key: "test_spx.pem".into()
             }
         );
+        assert_eq!(spec.extension_params[0].is_signed(), true);
+        assert_eq!(
+            spec.extension_params[1],
+            ManifestExtEntrySpec::SecVerWrite { secver_write: true }
+        );
+        assert_eq!(spec.extension_params[1].is_signed(), true);
+        assert_eq!(
+            spec.extension_params[2],
+            ManifestExtEntrySpec::Isfb {
+                strike_mask: HexEncoded(0x0fedcba987654321fedcba9876543210),
+                product_expr: vec![
+                    ProductExpr {
+                        mask: HexEncoded(0xffffffff),
+                        value: HexEncoded(0xa5a5a5a5),
+                    },
+                    ProductExpr {
+                        mask: HexEncoded(0xf0f0f0f0),
+                        value: HexEncoded(0xa0a0a0a0),
+                    },
+                ]
+            }
+        );
+        assert_eq!(spec.extension_params[2].is_signed(), true);
         assert_eq!(
-            spec.signed_region[1],
+            spec.extension_params[3],
+            ManifestExtEntrySpec::IsfbErasePolicy {
+                erase_allowed: false
+            }
+        );
+        assert_eq!(spec.extension_params[3].is_signed(), true);
+        assert_eq!(
+            spec.extension_params[4],
             ManifestExtEntrySpec::Raw {
                 name: HexEncoded(0xbeef),
                 identifier: HexEncoded(0xabcd),
+                signed: true,
                 value: [0x01, 0x23, 0x45, 0x67].map(HexEncoded).to_vec()
             }
         );
-        assert_eq!(spec.unsigned_region.len(), 1);
+        assert_eq!(spec.extension_params[4].is_signed(), true);
         assert_eq!(
-            spec.unsigned_region[0],
+            spec.extension_params[5],
             ManifestExtEntrySpec::SpxSignature {
                 spx_signature: "test_signature.bin".into()
             }
         );
+        assert_eq!(spec.extension_params[5].is_signed(), false);
+    }
+
+    const MAN_EXT_ISFB_CONF: &str = "\
+00000000: 49 53 46 42 49 53 46 42 10 32 54 76 98 ba dc fe  ISFBISFB.2Tv....
+00000010: 21 43 65 87 a9 cb ed 0f 02 00 00 00 4f 30 50 10  !Ce.........O0P.
+00000020: 05 00 00 01 f0 f0 f0 f0 a0 a0 a0 a0              ............
+";
+    #[test]
+    fn test_man_ext_isfb_write() -> Result<()> {
+        let isfb = ManifestExtEntry::new_isfb_entry(
+            0x0fedcba987654321fedcba9876543210,
+            vec![
+                ProductExpr {
+                    mask: HexEncoded(0x1050304f),
+                    value: HexEncoded(0x01000005),
+                },
+                ProductExpr {
+                    mask: HexEncoded(0xf0f0f0f0),
+                    value: HexEncoded(0xa0a0a0a0),
+                },
+            ],
+        )?;
+
+        let bin = isfb.to_vec();
+        eprintln!("{}", hexdump_string(&bin)?);
+        assert_eq!(hexdump_string(&bin)?, MAN_EXT_ISFB_CONF);
+        Ok(())
+    }
+
+    const MAN_EXT_ISFB_ERASE_POLICY: &str = "\
+00000000: 49 53 46 45 49 53 46 45 d4 01 00 00              ISFEISFE....
+";
+
+    #[test]
+    fn test_man_ext_isfb_erase_policy_write() -> Result<()> {
+        let isfb = ManifestExtEntry::new_isfb_erase_policy_entry(HardenedBool::False.into())?;
+
+        let bin = isfb.to_vec();
+        eprintln!("{}", hexdump_string(&bin)?);
+        assert_eq!(hexdump_string(&bin)?, MAN_EXT_ISFB_ERASE_POLICY);
+        Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/image/testdata/manifest_ext.hjson b/sw/host/opentitanlib/src/image/testdata/manifest_ext.hjson
deleted file mode 100644
index ac52b416a9708..0000000000000
--- a/sw/host/opentitanlib/src/image/testdata/manifest_ext.hjson
+++ /dev/null
@@ -1,21 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-{
-  signed_region: [
-    {
-      spx_key: "test_spx.pem",
-    },
-    {
-      name: "0xbeef",
-      identifier: "0xabcd",
-      value: ["0x01", "0x23", "0x45", "0x67"],
-    }
-  ],
-  unsigned_region: [
-    {
-      spx_signature: "test_signature.bin",
-    },
-  ],
-}
diff --git a/sw/host/opentitanlib/src/io/console.rs b/sw/host/opentitanlib/src/io/console.rs
index 14870b59b9b08..c5947d4c09236 100644
--- a/sw/host/opentitanlib/src/io/console.rs
+++ b/sw/host/opentitanlib/src/io/console.rs
@@ -10,6 +10,7 @@ use thiserror::Error;
 
 use super::nonblocking_help::{NoNonblockingHelp, NonblockingHelp};
 use crate::impl_serializable_error;
+use crate::io::gpio::GpioPin;
 
 /// Errors related to the console interface.
 #[derive(Error, Debug, Serialize, Deserialize)]
@@ -36,6 +37,11 @@ pub trait ConsoleDevice {
         Err(ConsoleError::GenericError("break unsupported".into()).into())
     }
 
+    /// Query if TX-ready pin non-polling mode is supported.
+    fn get_tx_ready_pin(&self) -> Result<Option<&Rc<dyn GpioPin>>> {
+        Ok(None)
+    }
+
     /// Query if nonblocking mio mode is supported.
     fn supports_nonblocking_read(&self) -> Result<bool> {
         Ok(false)
diff --git a/sw/host/opentitanlib/src/io/gpio.rs b/sw/host/opentitanlib/src/io/gpio.rs
index a0d06f73ac7a4..2600fb06f5d95 100644
--- a/sw/host/opentitanlib/src/io/gpio.rs
+++ b/sw/host/opentitanlib/src/io/gpio.rs
@@ -42,11 +42,15 @@ pub enum GpioError {
     MismatchedDataLength(usize, usize),
     #[error("Bitbang data beyond the {0} least significant bits")]
     InvalidBitbangData(usize),
-    #[error("Bitbang delay of zero, immediately preceding `await()`, or at end of sequence, not permitted")]
+    #[error(
+        "Bitbang delay of zero, immediately preceding `await()`, or at end of sequence, not permitted"
+    )]
     InvalidBitbangDelay,
     #[error("Dac-bang samples not a multiple of number of pins")]
     InvalidDacBangData,
-    #[error("Dac-bang delay of zero or immediately adjacent to linear(), or at end of sequence, not permitted")]
+    #[error(
+        "Dac-bang delay of zero or immediately adjacent to linear(), or at end of sequence, not permitted"
+    )]
     InvalidDacBangDelay,
     #[error("Generic error: {0}")]
     Generic(String),
@@ -166,7 +170,7 @@ pub enum ClockNature {
 }
 
 /// Represents an edge detected on the GPIO pin.
-#[derive(Clone, Copy, Debug, Serialize, Deserialize)]
+#[derive(Clone, Copy, Debug, PartialEq, Serialize, Deserialize)]
 pub struct MonitoringEvent {
     /// Identification of the signal that had an event, in the form of an index into the array
     /// originally passed to `monitoring_read()`.
@@ -178,7 +182,7 @@ pub struct MonitoringEvent {
     pub timestamp: u64,
 }
 
-#[derive(Clone, Debug, Serialize, Deserialize)]
+#[derive(Clone, Debug, PartialEq, Serialize, Deserialize)]
 pub struct MonitoringStartResponse {
     /// Transport timestamp at the time monitoring started.
     pub timestamp: u64,
@@ -186,7 +190,7 @@ pub struct MonitoringStartResponse {
     pub initial_levels: Vec<bool>,
 }
 
-#[derive(Clone, Debug, Serialize, Deserialize)]
+#[derive(Clone, Debug, PartialEq, Serialize, Deserialize)]
 pub struct MonitoringReadResponse {
     /// List of events having occurred since the start or the last read.
     pub events: Vec<MonitoringEvent>,
diff --git a/sw/host/opentitanlib/src/io/jtag.rs b/sw/host/opentitanlib/src/io/jtag.rs
index 27257c81ec605..ece7964f64732 100644
--- a/sw/host/opentitanlib/src/io/jtag.rs
+++ b/sw/host/opentitanlib/src/io/jtag.rs
@@ -23,6 +23,9 @@ pub struct JtagParams {
 
     #[arg(long, default_value = "1000")]
     pub adapter_speed_khz: u64,
+
+    #[arg(long, default_value = "false")]
+    pub log_stdio: bool,
 }
 
 impl JtagParams {
diff --git a/sw/host/opentitanlib/src/io/spi.rs b/sw/host/opentitanlib/src/io/spi.rs
index a640bfd77caf6..00e1c3b75c571 100644
--- a/sw/host/opentitanlib/src/io/spi.rs
+++ b/sw/host/opentitanlib/src/io/spi.rs
@@ -12,9 +12,10 @@ use thiserror::Error;
 use super::{eeprom, gpio};
 use crate::app::TransportWrapper;
 use crate::impl_serializable_error;
+use crate::transport::TransportError;
 use crate::util::voltage::Voltage;
 
-#[derive(Clone, Debug, Args, Serialize, Deserialize)]
+#[derive(Clone, Default, Debug, Args, Serialize, Deserialize)]
 pub struct SpiParams {
     /// SPI instance.
     #[arg(long)]
@@ -202,6 +203,12 @@ pub trait Target {
         Err(SpiError::InvalidOption("This target does not support set_voltage".to_string()).into())
     }
 
+    /// Returns `"raiden_debug_spi:serial=XXX"` or similar string usable for passing via `-p`
+    /// argument to `flashrom`, in order for it to connect to this SPI port instance.
+    fn get_flashrom_programmer(&self) -> Result<String> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
     /// Runs a SPI transaction composed from the slice of [`Transfer`] objects.  Will assert the
     /// CS for the duration of the entire transactions.
     fn run_transaction(&self, transaction: &mut [Transfer]) -> Result<()>;
diff --git a/sw/host/opentitanlib/src/io/uart.rs b/sw/host/opentitanlib/src/io/uart.rs
index b9b830d5a26e2..aa73c42ce96c6 100644
--- a/sw/host/opentitanlib/src/io/uart.rs
+++ b/sw/host/opentitanlib/src/io/uart.rs
@@ -3,6 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use std::io::{self, Read};
+use std::os::fd::BorrowedFd;
 use std::rc::Rc;
 use std::time::Duration;
 
@@ -18,19 +19,19 @@ use crate::impl_serializable_error;
 use crate::io::console::ConsoleDevice;
 use crate::transport::TransportError;
 
-#[derive(Clone, Debug, Args, Serialize, Deserialize)]
+#[derive(Clone, Debug, Default, Args, Serialize, Deserialize)]
 pub struct UartParams {
     /// UART instance.
     #[arg(long, default_value = "CONSOLE")]
-    uart: String,
+    pub uart: String,
 
     /// UART baudrate.
     #[arg(long)]
-    baudrate: Option<u32>,
+    pub baudrate: Option<u32>,
 
     /// Enable software flow control.
     #[arg(long)]
-    flow_control: bool,
+    pub flow_control: bool,
 }
 
 impl UartParams {
@@ -72,6 +73,12 @@ pub trait Uart {
         Ok(())
     }
 
+    /// Returns `"/dev/ttyUSBn"` or similar OS device path usable by external programs for
+    /// directly accessing the serial port.
+    fn get_device_path(&self) -> Result<String> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
     /// Reads UART receive data into `buf`, returning the number of bytes read.
     /// This function _may_ block.
     fn read(&self, buf: &mut [u8]) -> Result<usize>;
@@ -121,6 +128,10 @@ pub trait Uart {
     fn nonblocking_help(&self) -> Result<Rc<dyn NonblockingHelp>> {
         Ok(Rc::new(NoNonblockingHelp))
     }
+
+    fn borrow_fd(&self) -> Result<BorrowedFd> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
 }
 
 impl Read for &dyn Uart {
diff --git a/sw/host/opentitanlib/src/lib.rs b/sw/host/opentitanlib/src/lib.rs
index b051cd38de911..ae58231884a7c 100644
--- a/sw/host/opentitanlib/src/lib.rs
+++ b/sw/host/opentitanlib/src/lib.rs
@@ -2,8 +2,6 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-// Stabilised in Rust 1.74, can be removed when we upgrade.
-#![feature(io_error_other)]
 // Used for serde_annotate.
 #![feature(min_specialization)]
 
diff --git a/sw/host/opentitanlib/src/otp/alert_handler.rs b/sw/host/opentitanlib/src/otp/alert_handler.rs
index 4d822f316e87f..94083a5cb820c 100644
--- a/sw/host/opentitanlib/src/otp/alert_handler.rs
+++ b/sw/host/opentitanlib/src/otp/alert_handler.rs
@@ -6,7 +6,7 @@ use crate::otp::alert_handler_regs::*;
 use crate::otp::lc_state::LcStateVal;
 use crate::otp::otp_img::OtpRead;
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use bitvec::prelude::*;
 use crc::{Crc, Digest};
 use num_enum::TryFromPrimitive;
diff --git a/sw/host/opentitanlib/src/otp/lc_state.rs b/sw/host/opentitanlib/src/otp/lc_state.rs
index fdc9e7a7ea327..3946e0b80a872 100644
--- a/sw/host/opentitanlib/src/otp/lc_state.rs
+++ b/sw/host/opentitanlib/src/otp/lc_state.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use serde::Deserialize;
 use std::fs;
 use std::path::Path;
@@ -83,14 +83,14 @@ impl LcSecded {
 #[cfg(test)]
 mod tests {
     use super::*;
-    use crate::testdata;
+    use crate::util::testdata;
     use anyhow::Result;
     use deser_hjson::from_str;
     use std::fs::read_to_string;
 
     #[test]
     fn test_lc_state_deserialize() -> Result<()> {
-        let _: LcState = from_str(&read_to_string(testdata!("lc_ctrl_state.hjson"))?)?;
+        let _: LcState = from_str(&read_to_string(testdata("otp/lc_ctrl_state.hjson"))?)?;
         Ok(())
     }
 
diff --git a/sw/host/opentitanlib/src/otp/otp_img.rs b/sw/host/opentitanlib/src/otp/otp_img.rs
index 46a4b98e53306..ee464d6980939 100644
--- a/sw/host/opentitanlib/src/otp/otp_img.rs
+++ b/sw/host/opentitanlib/src/otp/otp_img.rs
@@ -7,7 +7,7 @@ use crate::util::parse_int::ParseInt;
 use std::fmt;
 use std::path::Path;
 
-use anyhow::{anyhow, bail, Result};
+use anyhow::{Result, anyhow, bail};
 
 use serde::de::{self, Unexpected};
 use serde::{Deserialize, Serialize};
diff --git a/sw/host/opentitanlib/src/ownership/application_key.rs b/sw/host/opentitanlib/src/ownership/application_key.rs
index a75fd7c405756..a772e3a2289ea 100644
--- a/sw/host/opentitanlib/src/ownership/application_key.rs
+++ b/sw/host/opentitanlib/src/ownership/application_key.rs
@@ -9,6 +9,7 @@ use serde_annotate::Annotate;
 use std::convert::TryFrom;
 use std::io::{Read, Write};
 
+use super::GlobalFlags;
 use super::misc::{KeyMaterial, OwnershipKeyAlg, TlvHeader, TlvTag};
 use crate::with_unknown;
 
@@ -22,10 +23,13 @@ with_unknown! {
 }
 
 /// The OwnerApplicationKey is used to verify the owner's firmware payload.
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerApplicationKey {
     /// Header identifying this struct.
-    #[serde(default)]
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerApplicationKey::default_header"
+    )]
     pub header: TlvHeader,
     /// The key algorithm for this key (ECDSA, SPX+, etc).
     pub key_alg: OwnershipKeyAlg,
@@ -48,7 +52,7 @@ pub struct OwnerApplicationKey {
 impl Default for OwnerApplicationKey {
     fn default() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::ApplicationKey, 0),
+            header: Self::default_header(),
             key_alg: OwnershipKeyAlg::default(),
             key_domain: ApplicationKeyDomain::default(),
             key_diversifier: [0u32; 7],
@@ -59,6 +63,10 @@ impl Default for OwnerApplicationKey {
 }
 
 impl OwnerApplicationKey {
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::ApplicationKey, 0, "0.0")
+    }
+
     pub fn read(src: &mut impl Read, header: TlvHeader) -> Result<Self> {
         let key_alg = OwnershipKeyAlg(src.read_u32::<LittleEndian>()?);
         let key_domain = ApplicationKeyDomain(src.read_u32::<LittleEndian>()?);
@@ -77,7 +85,7 @@ impl OwnerApplicationKey {
     }
 
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        let header = TlvHeader::new(TlvTag::ApplicationKey, 48 + self.key.len());
+        let header = TlvHeader::new(TlvTag::ApplicationKey, 48 + self.key.len(), "0.0");
         header.write(dest)?;
         dest.write_u32::<LittleEndian>(u32::from(self.key_alg))?;
         dest.write_u32::<LittleEndian>(u32::from(self.key_domain))?;
@@ -106,10 +114,6 @@ mod test {
 00000060: c0 00 00 00 d0 00 00 00 e0 00 00 00 f0 00 00 00  ................\n\
 ";
     const OWNER_APPLICATION_KEY_JSON: &str = r#"{
-  header: {
-    identifier: "ApplicationKey",
-    length: 112
-  },
   key_alg: "EcdsaP256",
   key_domain: "Prod",
   key_diversifier: [
diff --git a/sw/host/opentitanlib/src/ownership/flash.rs b/sw/host/opentitanlib/src/ownership/flash.rs
index bed2c2a864421..fb71ec5636992 100644
--- a/sw/host/opentitanlib/src/ownership/flash.rs
+++ b/sw/host/opentitanlib/src/ownership/flash.rs
@@ -8,11 +8,12 @@ use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
 use std::io::{Read, Write};
 
+use super::GlobalFlags;
 use super::misc::{TlvHeader, TlvTag};
 use crate::chip::boolean::MultiBitBool4;
 
 /// Describes the proprerties of a flash region.
-#[derive(Debug, Default, Clone, Copy, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Default, Clone, Copy, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct FlashFlags {
     /// Read operations are allowed in this region.
     #[serde(default)]
@@ -32,9 +33,9 @@ pub struct FlashFlags {
     /// The high endurance feature is enabled in this region.
     #[serde(default)]
     pub high_endurance: bool,
-    /// Forbid program and erase operations when in the primary flash side.
+    /// Forbid program and erase operations when in the active flash side.
     #[serde(default)]
-    pub protect_when_primary: bool,
+    pub protect_when_active: bool,
     /// Lock the configuration of this region.
     #[serde(default)]
     pub lock: bool,
@@ -63,7 +64,7 @@ impl FlashFlags {
             read: true,
             program: true,
             erase: true,
-            protect_when_primary: true,
+            protect_when_active: true,
             ..Default::default()
         }
     }
@@ -76,7 +77,7 @@ impl FlashFlags {
             erase: true,
             scramble: true,
             ecc: true,
-            protect_when_primary: true,
+            protect_when_active: true,
             ..Default::default()
         }
     }
@@ -113,7 +114,7 @@ impl From<u64> for FlashFlags {
             read:                 flags & 0xF == Self::TRUE,
             program:              (flags >> 4) & 0xF == Self::TRUE,
             erase:                (flags >> 8) & 0xF == Self::TRUE,
-            protect_when_primary: (flags >> 24) & 0xF == Self::TRUE,
+            protect_when_active:  (flags >> 24) & 0xF == Self::TRUE,
             lock:                 (flags >> 28) & 0xF == Self::TRUE,
 
             // Second 32-bit word: flash properties.
@@ -133,7 +134,7 @@ impl From<FlashFlags> for u64 {
             if flags.read                 { FlashFlags::TRUE } else { FlashFlags::FALSE } |
             if flags.program              { FlashFlags::TRUE } else { FlashFlags::FALSE } << 4 |
             if flags.erase                { FlashFlags::TRUE } else { FlashFlags::FALSE } << 8 |
-            if flags.protect_when_primary { FlashFlags::TRUE } else { FlashFlags::FALSE } << 24 |
+            if flags.protect_when_active  { FlashFlags::TRUE } else { FlashFlags::FALSE } << 24 |
             if flags.lock                 { FlashFlags::TRUE } else { FlashFlags::FALSE } << 28 |
 
             // Second 32-bit word: flash properties.
@@ -145,7 +146,7 @@ impl From<FlashFlags> for u64 {
 }
 
 /// Describes a region to which a set of flags apply.
-#[derive(Debug, Default, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Default, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerFlashRegion {
     /// The start of the region (in pages).
     pub start: u16,
@@ -175,10 +176,13 @@ impl OwnerFlashRegion {
 }
 
 /// Describes the overall flash configuration for data pages.
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerFlashConfig {
     /// Header identifying this struct.
-    #[serde(default)]
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerFlashConfig::default_header"
+    )]
     pub header: TlvHeader,
     /// A list of flash region configurations.
     pub config: Vec<OwnerFlashRegion>,
@@ -187,7 +191,7 @@ pub struct OwnerFlashConfig {
 impl Default for OwnerFlashConfig {
     fn default() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::FlashConfig, 0),
+            header: Self::default_header(),
             config: Vec::new(),
         }
     }
@@ -195,9 +199,13 @@ impl Default for OwnerFlashConfig {
 
 impl OwnerFlashConfig {
     const BASE_SIZE: usize = 8;
+
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::FlashConfig, 0, "0.0")
+    }
     pub fn basic() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::FlashConfig, 0),
+            header: TlvHeader::new(TlvTag::FlashConfig, 0, "0.0"),
             config: vec![
                 OwnerFlashRegion::new(0, 32, FlashFlags::rom_ext()),
                 OwnerFlashRegion::new(32, 192, FlashFlags::firmware()),
@@ -221,6 +229,7 @@ impl OwnerFlashConfig {
         let header = TlvHeader::new(
             TlvTag::FlashConfig,
             Self::BASE_SIZE + self.config.len() * OwnerFlashRegion::SIZE,
+            "0.0",
         );
         header.write(dest)?;
         for (i, config) in self.config.iter().enumerate() {
@@ -244,10 +253,6 @@ r#"00000000: 46 4c 53 48 2c 00 00 00 00 00 00 00 96 09 00 99  FLSH,...........
 "#;
 
     const OWNER_FLASH_CONFIG_JSON: &str = r#"{
-  header: {
-    identifier: "FlashConfig",
-    length: 44
-  },
   config: [
     {
       start: 0,
@@ -258,7 +263,7 @@ r#"00000000: 46 4c 53 48 2c 00 00 00 00 00 00 00 96 09 00 99  FLSH,...........
       scramble: false,
       ecc: true,
       high_endurance: false,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     },
     {
@@ -270,7 +275,7 @@ r#"00000000: 46 4c 53 48 2c 00 00 00 00 00 00 00 96 09 00 99  FLSH,...........
       scramble: false,
       ecc: false,
       high_endurance: false,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     },
     {
@@ -282,7 +287,7 @@ r#"00000000: 46 4c 53 48 2c 00 00 00 00 00 00 00 96 09 00 99  FLSH,...........
       scramble: true,
       ecc: true,
       high_endurance: true,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     }
   ]
diff --git a/sw/host/opentitanlib/src/ownership/flash_info.rs b/sw/host/opentitanlib/src/ownership/flash_info.rs
index 090b79ee9193f..bcef2613791c0 100644
--- a/sw/host/opentitanlib/src/ownership/flash_info.rs
+++ b/sw/host/opentitanlib/src/ownership/flash_info.rs
@@ -8,11 +8,12 @@ use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
 use std::io::{Read, Write};
 
+use super::GlobalFlags;
 use super::flash::FlashFlags;
 use super::misc::{TlvHeader, TlvTag};
 
 /// Describes an INFO page to which a set of flags apply.
-#[derive(Debug, Default, Deserialize, Serialize, Annotate)]
+#[derive(Debug, Default, Deserialize, Serialize, Annotate, PartialEq)]
 pub struct OwnerInfoPage {
     /// The bank in which the info page resides.
     pub bank: u8,
@@ -56,10 +57,13 @@ impl OwnerInfoPage {
 }
 
 /// Describes the overall flash configuration for owner-accesssable INFO pages.
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerFlashInfoConfig {
     /// Header identifying this struct.
-    #[serde(default)]
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerFlashInfoConfig::default_header"
+    )]
     pub header: TlvHeader,
     /// A list of info page configurations.
     pub config: Vec<OwnerInfoPage>,
@@ -68,7 +72,7 @@ pub struct OwnerFlashInfoConfig {
 impl Default for OwnerFlashInfoConfig {
     fn default() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::FlashInfoConfig, 0),
+            header: Self::default_header(),
             config: Vec::new(),
         }
     }
@@ -77,9 +81,13 @@ impl Default for OwnerFlashInfoConfig {
 impl OwnerFlashInfoConfig {
     const BASE_SIZE: usize = 8;
 
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::FlashInfoConfig, 0, "0.0")
+    }
+
     pub fn basic() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::FlashInfoConfig, 0),
+            header: TlvHeader::new(TlvTag::FlashInfoConfig, 0, "0.0"),
             config: vec![
                 OwnerInfoPage::new(0, 6, FlashFlags::info_page()),
                 OwnerInfoPage::new(0, 7, FlashFlags::info_page()),
@@ -102,6 +110,7 @@ impl OwnerFlashInfoConfig {
         let header = TlvHeader::new(
             TlvTag::FlashInfoConfig,
             Self::BASE_SIZE + self.config.len() * OwnerInfoPage::SIZE,
+            "0.0",
         );
         header.write(dest)?;
         for (i, config) in self.config.iter().enumerate() {
@@ -125,10 +134,6 @@ r#"00000000: 49 4e 46 4f 2c 00 00 00 00 00 00 00 96 09 00 99  INFO,...........
 "#;
 
     const OWNER_FLASH_INFO_CONFIG_JSON: &str = r#"{
-  header: {
-    identifier: "FlashInfoConfig",
-    length: 44
-  },
   config: [
     {
       bank: 0,
@@ -140,7 +145,7 @@ r#"00000000: 49 4e 46 4f 2c 00 00 00 00 00 00 00 96 09 00 99  INFO,...........
       scramble: false,
       ecc: true,
       high_endurance: false,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     },
     {
@@ -153,7 +158,7 @@ r#"00000000: 49 4e 46 4f 2c 00 00 00 00 00 00 00 96 09 00 99  INFO,...........
       scramble: false,
       ecc: false,
       high_endurance: false,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     },
     {
@@ -166,7 +171,7 @@ r#"00000000: 49 4e 46 4f 2c 00 00 00 00 00 00 00 96 09 00 99  INFO,...........
       scramble: true,
       ecc: true,
       high_endurance: true,
-      protect_when_primary: false,
+      protect_when_active: false,
       lock: false
     }
   ]
diff --git a/sw/host/opentitanlib/src/ownership/isfb.rs b/sw/host/opentitanlib/src/ownership/isfb.rs
new file mode 100644
index 0000000000000..ee7cda856cc98
--- /dev/null
+++ b/sw/host/opentitanlib/src/ownership/isfb.rs
@@ -0,0 +1,155 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
+use serde::{Deserialize, Serialize};
+use serde_annotate::Annotate;
+use std::io::{Read, Write};
+
+use super::GlobalFlags;
+use super::application_key::ApplicationKeyDomain;
+use super::misc::{TlvHeader, TlvTag};
+
+/// The owner Integration Specific Firmware Binding (ISFB) configuration
+/// describes the configuration parameters for the ISFB region.
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
+pub struct OwnerIsfbConfig {
+    /// Header identifying this struct.
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerIsfbConfig::default_header"
+    )]
+    pub header: TlvHeader,
+    /// The flash bank where the ISFB is located.
+    pub bank: u8,
+    /// The info flash page where the ISFB is located.
+    pub page: u8,
+    /// Padding for alignment.
+    #[serde(default, skip_serializing_if = "GlobalFlags::not_debug")]
+    #[annotate(format=hex)]
+    pub pad: u16,
+
+    /// The erase policy for the ISFB region.
+    #[annotate(format=hex)]
+    pub erase_conditions: u32,
+    /// The key domain associated with the erase condition policy.
+    #[annotate(format=hex)]
+    pub key_domain: ApplicationKeyDomain,
+    /// Reserved for future use.
+    #[serde(default, skip_serializing_if = "GlobalFlags::not_debug")]
+    #[annotate(format=hex)]
+    pub reserved: [u32; 5],
+    /// Number of `uint32_t` reserved for product expressions. It has to be a
+    /// value less than or equal to 256.
+    pub product_words: u32,
+}
+
+impl Default for OwnerIsfbConfig {
+    fn default() -> Self {
+        Self {
+            header: Self::default_header(),
+            bank: 0u8,
+            page: 0u8,
+            pad: 0u16,
+            erase_conditions: 0u32,
+            key_domain: ApplicationKeyDomain::default(),
+            reserved: [0u32; 5],
+            product_words: 0u32,
+        }
+    }
+}
+
+impl OwnerIsfbConfig {
+    const SIZE: usize = 44;
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::IntegratorSpecificFirmwareBinding, Self::SIZE, "0.0")
+    }
+    pub fn read(src: &mut impl Read, header: TlvHeader) -> Result<Self> {
+        let bank = src.read_u8()?;
+        let page = src.read_u8()?;
+        let pad = src.read_u16::<LittleEndian>()?;
+        let erase_conditions = src.read_u32::<LittleEndian>()?;
+        let key_domain = ApplicationKeyDomain(src.read_u32::<LittleEndian>()?);
+        let mut reserved = [0u32; 5];
+        src.read_u32_into::<LittleEndian>(&mut reserved)?;
+        let product_words = src.read_u32::<LittleEndian>()?;
+        Ok(Self {
+            header,
+            bank,
+            page,
+            pad,
+            erase_conditions,
+            key_domain,
+            reserved,
+            product_words,
+        })
+    }
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        let header = Self::default_header();
+        header.write(dest)?;
+
+        dest.write_u8(self.bank)?;
+        dest.write_u8(self.page)?;
+        dest.write_u16::<LittleEndian>(self.pad)?;
+        dest.write_u32::<LittleEndian>(self.erase_conditions)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.key_domain))?;
+        for x in &self.reserved {
+            dest.write_u32::<LittleEndian>(*x)?;
+        }
+        dest.write_u32::<LittleEndian>(self.product_words)?;
+        Ok(())
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+    use crate::util::hexdump::{hexdump_parse, hexdump_string};
+
+    const OWNER_ISFB_CONF: &str = "\
+00000000: 49 53 46 42 2c 00 00 00 01 08 00 00 66 06 00 00  ISFB,.......f...
+00000010: 70 72 6f 64 00 00 00 00 00 00 00 00 00 00 00 00  prod............
+00000020: 00 00 00 00 00 00 00 00 80 00 00 00              ............
+";
+    const OWNER_ISFB_CONF_JSON: &str = r#"{
+  bank: 1,
+  page: 8,
+  erase_conditions: 0x666,
+  key_domain: "Prod",
+  product_words: 128
+}"#;
+
+    #[test]
+    fn test_owner_isfb_config_write() -> Result<()> {
+        let isfb = OwnerIsfbConfig {
+            header: OwnerIsfbConfig::default_header(),
+            bank: 1,
+            page: 8,
+            pad: 0,
+            erase_conditions: 0x0000_0666,
+            key_domain: ApplicationKeyDomain::Prod,
+            product_words: 128,
+            ..Default::default()
+        };
+
+        let mut bin = Vec::new();
+        isfb.write(&mut bin)?;
+        eprintln!("{}", hexdump_string(&bin)?);
+        assert_eq!(hexdump_string(&bin)?, OWNER_ISFB_CONF);
+        Ok(())
+    }
+
+    #[test]
+    fn test_owner_isfb_config_read() -> Result<()> {
+        let buf = hexdump_parse(OWNER_ISFB_CONF)?;
+        let mut cur = std::io::Cursor::new(&buf);
+        let header = TlvHeader::read(&mut cur)?;
+        let orc = OwnerIsfbConfig::read(&mut cur, header)?;
+        let doc = serde_annotate::serialize(&orc)?.to_json5().to_string();
+        eprintln!("{}", doc);
+        assert_eq!(doc, OWNER_ISFB_CONF_JSON);
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/ownership/misc.rs b/sw/host/opentitanlib/src/ownership/misc.rs
index 57c06f2ba3bcc..58971822174ac 100644
--- a/sw/host/opentitanlib/src/ownership/misc.rs
+++ b/sw/host/opentitanlib/src/ownership/misc.rs
@@ -2,17 +2,17 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
 use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
 use std::cmp::Ordering;
 use std::io::{Read, Write};
 
+use crate::crypto::Error;
 use crate::crypto::ecdsa::EcdsaRawPublicKey;
 use crate::crypto::rsa::RsaRawPublicKey;
 use crate::crypto::spx::SpxRawPublicKey;
-use crate::crypto::Error;
 use crate::util::serde::string_or_struct;
 use crate::with_unknown;
 
@@ -24,6 +24,8 @@ with_unknown! {
         FlashConfig = u32::from_le_bytes(*b"FLSH"),
         FlashInfoConfig = u32::from_le_bytes(*b"INFO"),
         Rescue = u32::from_le_bytes(*b"RESQ"),
+        DetachedSignature = u32::from_le_bytes(*b"SIGN"),
+        IntegratorSpecificFirmwareBinding = u32::from_le_bytes(*b"ISFB"),
         NotPresent = u32::from_le_bytes(*b"ZZZZ"),
     }
 
@@ -31,52 +33,180 @@ with_unknown! {
         Unknown = 0,
         Rsa = u32::from_le_bytes(*b"RSA3"),
         EcdsaP256 = u32::from_le_bytes(*b"P256"),
-        Spx = u32::from_le_bytes(*b"SPX+"),
-        Spxq20 = u32::from_le_bytes(*b"Sq20"),
+        SpxPure = u32::from_le_bytes(*b"S+Pu"),
+        SpxPrehash = u32::from_le_bytes(*b"S+S2"),
+        HybridSpxPure = u32::from_le_bytes(*b"H+Pu"),
+        HybridSpxPrehash = u32::from_le_bytes(*b"H+S2"),
+    }
+    pub enum DetachedSignatureCommand: u32 [default = Self::Unknown] {
+        Unknown = 0,
+        Owner = u32::from_le_bytes(*b"OWNR"),
+        Unlock = u32::from_le_bytes(*b"UNLK"),
+        Activate = u32::from_le_bytes(*b"ACTV"),
+    }
+}
+
+impl OwnershipKeyAlg {
+    pub fn is_detached(self) -> bool {
+        !matches!(self, Self::EcdsaP256)
+    }
+
+    pub fn is_ecdsa(self) -> bool {
+        matches!(
+            self,
+            Self::EcdsaP256 | Self::HybridSpxPure | Self::HybridSpxPrehash
+        )
+    }
+
+    pub fn is_spx(self) -> bool {
+        matches!(
+            self,
+            Self::SpxPure | Self::SpxPrehash | Self::HybridSpxPure | Self::HybridSpxPrehash
+        )
+    }
+
+    pub fn is_hybrid(self) -> bool {
+        matches!(self, Self::HybridSpxPure | Self::HybridSpxPrehash)
+    }
+
+    pub fn is_prehashed(self) -> bool {
+        matches!(self, Self::SpxPrehash | Self::HybridSpxPrehash)
+    }
+}
+
+#[derive(Clone, Debug, Default, Serialize, Deserialize, Annotate, PartialEq)]
+#[serde(try_from = "String", into = "String")]
+pub struct StructVersion {
+    pub major: u8,
+    pub minor: u8,
+}
+
+impl TryFrom<&str> for StructVersion {
+    type Error = anyhow::Error;
+
+    fn try_from(s: &str) -> Result<Self, Self::Error> {
+        if let Some((major, minor)) = s.split_once('.') {
+            Ok(StructVersion {
+                major: major.parse()?,
+                minor: minor.parse()?,
+            })
+        } else {
+            Ok(StructVersion {
+                major: s.parse()?,
+                minor: 0,
+            })
+        }
+    }
+}
+
+impl TryFrom<String> for StructVersion {
+    type Error = anyhow::Error;
+    fn try_from(s: String) -> Result<Self, Self::Error> {
+        StructVersion::try_from(s.as_str())
     }
 }
 
-#[derive(Debug, Default, Serialize, Deserialize, Annotate)]
+impl From<StructVersion> for String {
+    fn from(sv: StructVersion) -> String {
+        format!("{}.{}", sv.major, sv.minor)
+    }
+}
+
+impl StructVersion {
+    pub fn read(src: &mut impl Read) -> Result<Self> {
+        Ok(Self {
+            major: src.read_u8()?,
+            minor: src.read_u8()?,
+        })
+    }
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        dest.write_u8(self.major)?;
+        dest.write_u8(self.minor)?;
+        Ok(())
+    }
+}
+
+#[derive(Debug, Default, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct TlvHeader {
+    #[serde(default)]
     pub identifier: TlvTag,
+    #[serde(default)]
     pub length: usize,
+    #[serde(default)]
+    pub version: StructVersion,
 }
 
 impl TlvHeader {
-    pub const SIZE: usize = 6;
-    pub fn new(id: TlvTag, len: usize) -> Self {
+    pub const SIZE: usize = 8;
+    pub fn new(id: TlvTag, len: usize, version: &str) -> Self {
         Self {
             identifier: id,
             length: len,
+            version: version.try_into().expect("major.minor version string"),
         }
     }
 
     pub fn read(src: &mut impl Read) -> Result<Self> {
         Ok(Self {
             identifier: TlvTag(src.read_u32::<LittleEndian>()?),
-            length: src.read_u32::<LittleEndian>()? as usize,
+            length: src.read_u16::<LittleEndian>()? as usize,
+            version: StructVersion::read(src)?,
         })
     }
 
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
         dest.write_u32::<LittleEndian>(u32::from(self.identifier))?;
-        dest.write_u32::<LittleEndian>(self.length as u32)?;
+        dest.write_u16::<LittleEndian>(self.length as u16)?;
+        self.version.write(dest)?;
         Ok(())
     }
     pub fn write_len(&self, dest: &mut impl Write, length: usize) -> Result<()> {
         dest.write_u32::<LittleEndian>(u32::from(self.identifier))?;
-        dest.write_u32::<LittleEndian>(length as u32)?;
+        dest.write_u16::<LittleEndian>(length as u16)?;
+        self.version.write(dest)?;
+        Ok(())
+    }
+}
+
+#[derive(Debug, Serialize, Deserialize, PartialEq)]
+pub struct HybridRawPublicKey {
+    #[serde(deserialize_with = "string_or_struct")]
+    pub ecdsa: EcdsaRawPublicKey,
+    #[serde(deserialize_with = "string_or_struct")]
+    pub spx: SpxRawPublicKey,
+}
+
+impl HybridRawPublicKey {
+    const SIZE: usize = EcdsaRawPublicKey::SIZE + SpxRawPublicKey::SIZE;
+
+    pub fn read(src: &mut impl Read) -> Result<Self> {
+        Ok(Self {
+            ecdsa: EcdsaRawPublicKey::read(src)?,
+            spx: SpxRawPublicKey::read(src)?,
+        })
+    }
+
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        self.ecdsa.write(dest)?;
+        self.spx.write(dest)?;
         Ok(())
     }
 }
 
 /// Low-level key material (ie: bit representation).
-#[derive(Debug, Serialize, Deserialize)]
+#[derive(Debug, Serialize, Deserialize, PartialEq)]
+#[allow(clippy::len_without_is_empty)]
 pub enum KeyMaterial {
+    #[serde(alias = "unknown")]
     Unknown(Vec<u8>),
+    #[serde(alias = "ecdsa")]
     Ecdsa(#[serde(deserialize_with = "string_or_struct")] EcdsaRawPublicKey),
+    #[serde(alias = "rsa")]
     Rsa(#[serde(deserialize_with = "string_or_struct")] RsaRawPublicKey),
+    #[serde(alias = "spx")]
     Spx(#[serde(deserialize_with = "string_or_struct")] SpxRawPublicKey),
+    #[serde(alias = "hybrid")]
+    Hybrid(HybridRawPublicKey),
 }
 
 impl Default for KeyMaterial {
@@ -91,6 +221,7 @@ impl KeyMaterial {
             KeyMaterial::Ecdsa(_) => EcdsaRawPublicKey::SIZE,
             KeyMaterial::Rsa(_) => RsaRawPublicKey::SIZE,
             KeyMaterial::Spx(_) => SpxRawPublicKey::SIZE,
+            KeyMaterial::Hybrid(_) => HybridRawPublicKey::SIZE,
             KeyMaterial::Unknown(u) => u.len(),
         }
     }
@@ -99,7 +230,8 @@ impl KeyMaterial {
         match self {
             KeyMaterial::Ecdsa(_) => OwnershipKeyAlg::EcdsaP256,
             KeyMaterial::Rsa(_) => OwnershipKeyAlg::Rsa,
-            KeyMaterial::Spx(_) => OwnershipKeyAlg::Spx,
+            KeyMaterial::Spx(_) => OwnershipKeyAlg::SpxPure,
+            KeyMaterial::Hybrid(_) => OwnershipKeyAlg::HybridSpxPure,
             KeyMaterial::Unknown(_) => OwnershipKeyAlg::Unknown,
         }
     }
@@ -108,9 +240,12 @@ impl KeyMaterial {
         let result = match kind {
             OwnershipKeyAlg::Rsa => KeyMaterial::Rsa(RsaRawPublicKey::read(src)?),
             OwnershipKeyAlg::EcdsaP256 => KeyMaterial::Ecdsa(EcdsaRawPublicKey::read(src)?),
-            OwnershipKeyAlg::Spx | OwnershipKeyAlg::Spxq20 => {
+            OwnershipKeyAlg::SpxPure | OwnershipKeyAlg::SpxPrehash => {
                 KeyMaterial::Spx(SpxRawPublicKey::read(src)?)
             }
+            OwnershipKeyAlg::HybridSpxPure | OwnershipKeyAlg::HybridSpxPrehash => {
+                KeyMaterial::Hybrid(HybridRawPublicKey::read(src)?)
+            }
             _ => {
                 return Err(
                     Error::InvalidPublicKey(anyhow!("Unknown key algorithm {}", kind)).into(),
@@ -143,6 +278,7 @@ impl KeyMaterial {
             KeyMaterial::Ecdsa(k) => k.write(dest)?,
             KeyMaterial::Rsa(k) => k.write(dest)?,
             KeyMaterial::Spx(k) => k.write(dest)?,
+            KeyMaterial::Hybrid(k) => k.write(dest)?,
             _ => {
                 return Err(Error::InvalidPublicKey(anyhow!("Unknown key type")).into());
             }
diff --git a/sw/host/opentitanlib/src/ownership/mod.rs b/sw/host/opentitanlib/src/ownership/mod.rs
index 41fc3030ddc5b..9c1ba41d305c5 100644
--- a/sw/host/opentitanlib/src/ownership/mod.rs
+++ b/sw/host/opentitanlib/src/ownership/mod.rs
@@ -2,16 +2,41 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use std::sync::atomic::{AtomicBool, Ordering};
+
 mod application_key;
 mod flash;
 mod flash_info;
+mod isfb;
 mod misc;
 pub mod owner;
 mod rescue;
+mod signature;
 
 pub use application_key::{ApplicationKeyDomain, OwnerApplicationKey};
 pub use flash::{FlashFlags, OwnerFlashConfig, OwnerFlashRegion};
 pub use flash_info::{OwnerFlashInfoConfig, OwnerInfoPage};
-pub use misc::{OwnershipKeyAlg, TlvHeader, TlvTag};
-pub use owner::{OwnerBlock, SramExecMode};
-pub use rescue::{OwnerRescueConfig, RescueType};
+pub use isfb::OwnerIsfbConfig;
+pub use misc::{
+    DetachedSignatureCommand, HybridRawPublicKey, KeyMaterial, OwnershipKeyAlg, TlvHeader, TlvTag,
+};
+pub use owner::{OwnerBlock, OwnerConfigItem, SramExecMode};
+pub use rescue::{CommandTag, OwnerRescueConfig, RescueProtocol};
+pub use signature::DetachedSignature;
+
+pub struct GlobalFlags;
+
+static DEBUG: AtomicBool = AtomicBool::new(false);
+
+impl GlobalFlags {
+    /// Set the value of the ownership debug flag.  This controls the serialization
+    /// of header and reserved fields in the ownership structs.
+    pub fn set_debug(v: bool) {
+        DEBUG.store(v, Ordering::Relaxed);
+    }
+
+    // Used by the serde serializer to query whether or not a field should be serialized.
+    pub fn not_debug<T>(_: &T) -> bool {
+        !DEBUG.load(Ordering::Relaxed)
+    }
+}
diff --git a/sw/host/opentitanlib/src/ownership/owner.rs b/sw/host/opentitanlib/src/ownership/owner.rs
index 84d936d8b7f45..f0fa3e40aefcb 100644
--- a/sw/host/opentitanlib/src/ownership/owner.rs
+++ b/sw/host/opentitanlib/src/ownership/owner.rs
@@ -2,15 +2,22 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow, ensure};
 use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
 use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
+use sphincsplus::SpxSecretKey;
 use std::convert::TryFrom;
 use std::io::{Read, Write};
 
+use super::GlobalFlags;
 use super::misc::{KeyMaterial, OwnershipKeyAlg, TlvHeader, TlvTag};
-use super::{OwnerApplicationKey, OwnerFlashConfig, OwnerFlashInfoConfig, OwnerRescueConfig};
+use super::{
+    DetachedSignature, OwnerApplicationKey, OwnerFlashConfig, OwnerFlashInfoConfig,
+    OwnerIsfbConfig, OwnerRescueConfig,
+};
+use crate::chip::boolean::HardenedBool;
+use crate::crypto::Error as CryptoError;
 use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaRawSignature};
 use crate::with_unknown;
 
@@ -20,25 +27,57 @@ with_unknown! {
         Disabled = u32::from_le_bytes(*b"NOEX"),
         Enabled = u32::from_le_bytes(*b"EXEC"),
     }
+
+    pub enum MinSecurityVersion: u32 [default = Self::NoChange] {
+        NoChange = 0xFFFFFFFFu32,
+    }
+
+    pub enum OwnershipUpdateMode: u32 [default = Self::Open] {
+        Open = u32::from_le_bytes(*b"OPEN"),
+        UnlockSelf = u32::from_le_bytes(*b"SELF"),
+        SelfVersion = u32::from_le_bytes(*b"SELV"),
+        NewVersion = u32::from_le_bytes(*b"NEWV"),
+    }
 }
 
 /// Describes the owner configuration and key material.
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerBlock {
     /// Header identifying this struct.
-    #[serde(default)]
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerBlock::default_header"
+    )]
     pub header: TlvHeader,
-    /// Version of this structure (ie: currently, zero).
+    /// Configuraion version (monotonically increasing per owner).
     #[serde(default)]
-    pub version: u32,
+    pub config_version: u32,
     /// Whether the owner wants to permit code execution in SRAM.
     #[serde(default)]
     pub sram_exec: SramExecMode,
     /// The key algorithm of the ownership keys.
     pub ownership_key_alg: OwnershipKeyAlg,
+    /// Ownership update mode.
+    #[serde(default)]
+    pub update_mode: OwnershipUpdateMode,
+    /// Set the minimum security version to this value.
+    #[serde(default)]
+    pub min_security_version_bl0: MinSecurityVersion,
+    /// The device ID locking constraint.
+    #[serde(default)]
+    pub lock_constraint: u32,
+    /// The device ID to which this config applies.
+    #[serde(
+        default = "OwnerBlock::default_constraint",
+        skip_serializing_if = "OwnerBlock::is_default_constraint"
+    )]
+    #[annotate(format=hex)]
+    pub device_id: [u32; 8],
     #[serde(default)]
+    pub boot_svc_after_wakeup: HardenedBool,
+    #[serde(default, skip_serializing_if = "GlobalFlags::not_debug")]
     #[annotate(format=hex)]
-    pub reserved: [u32; 3],
+    pub reserved: [u32; 15],
     /// The owner identity key.
     pub owner_key: KeyMaterial,
     /// The owner activation key.
@@ -61,28 +100,37 @@ pub struct OwnerBlock {
 impl Default for OwnerBlock {
     fn default() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::Owner, 0),
-            version: 0,
+            header: Self::default_header(),
+            config_version: 0,
             sram_exec: SramExecMode::default(),
             ownership_key_alg: OwnershipKeyAlg::default(),
-            reserved: [0u32; 3],
+            update_mode: OwnershipUpdateMode::default(),
+            min_security_version_bl0: MinSecurityVersion::default(),
+            lock_constraint: 0,
+            device_id: Self::default_constraint(),
+            boot_svc_after_wakeup: HardenedBool::default(),
+            reserved: [0u32; 15],
             owner_key: KeyMaterial::default(),
             activate_key: KeyMaterial::default(),
             unlock_key: KeyMaterial::default(),
             data: Vec::new(),
             signature: EcdsaRawSignature::default(),
-            seal: vec![0xffu8; 32],
+            seal: Vec::new(),
         }
     }
 }
 
 impl OwnerBlock {
-    const SIZE: usize = 2048;
-    const DATA_SIZE: usize = 1728;
-    const SIGNATURE_OFFSET: usize = 1952;
+    pub const SIZE: usize = 2048;
+    pub const DATA_SIZE: usize = 1536;
+    pub const SIGNATURE_OFFSET: usize = 1952;
     // The not present value must be reflected in the TlvTag::NotPresent value.
     const NOT_PRESENT: u8 = 0x5a;
+    const NO_CONSTRAINT: u32 = 0x7e7e7e7e;
 
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::Owner, Self::SIZE, "0.0")
+    }
     pub fn basic() -> Self {
         Self {
             data: vec![
@@ -96,17 +144,28 @@ impl OwnerBlock {
     }
 
     pub fn write(&self, dest: &mut impl Write) -> Result<()> {
-        let header = TlvHeader::new(TlvTag::Owner, Self::SIZE);
-        header.write(dest)?;
-        dest.write_u32::<LittleEndian>(self.version)?;
+        self.header.write(dest)?;
+        dest.write_u32::<LittleEndian>(self.config_version)?;
         dest.write_u32::<LittleEndian>(u32::from(self.sram_exec))?;
         dest.write_u32::<LittleEndian>(u32::from(self.ownership_key_alg))?;
+        dest.write_u32::<LittleEndian>(u32::from(self.update_mode))?;
+        dest.write_u32::<LittleEndian>(u32::from(self.min_security_version_bl0))?;
+        dest.write_u32::<LittleEndian>(self.lock_constraint)?;
+
+        for (i, x) in self.device_id.iter().enumerate() {
+            if self.lock_constraint & (1u32 << i) == 0 {
+                dest.write_u32::<LittleEndian>(Self::NO_CONSTRAINT)?;
+            } else {
+                dest.write_u32::<LittleEndian>(*x)?;
+            }
+        }
+        dest.write_u32::<LittleEndian>(u32::from(self.boot_svc_after_wakeup))?;
         for x in &self.reserved {
             dest.write_u32::<LittleEndian>(*x)?;
         }
-        self.owner_key.write_length(dest, 64)?;
-        self.activate_key.write_length(dest, 64)?;
-        self.unlock_key.write_length(dest, 64)?;
+        self.owner_key.write_length(dest, 96)?;
+        self.activate_key.write_length(dest, 96)?;
+        self.unlock_key.write_length(dest, 96)?;
         let mut data = Vec::new();
         for item in &self.data {
             item.write(&mut data)?;
@@ -114,19 +173,30 @@ impl OwnerBlock {
         data.resize(Self::DATA_SIZE, Self::NOT_PRESENT);
         dest.write_all(&data)?;
         self.signature.write(dest)?;
-        dest.write_all(&self.seal)?;
+        if self.seal.is_empty() {
+            dest.write_all(&[0u8; 32])?;
+        } else {
+            dest.write_all(&self.seal)?;
+        }
         Ok(())
     }
 
     pub fn read(src: &mut impl Read, header: TlvHeader) -> Result<Self> {
-        let version = src.read_u32::<LittleEndian>()?;
+        let config_version = src.read_u32::<LittleEndian>()?;
         let sram_exec = SramExecMode(src.read_u32::<LittleEndian>()?);
         let ownership_key_alg = OwnershipKeyAlg(src.read_u32::<LittleEndian>()?);
-        let mut reserved = [0u32; 3];
+        let update_mode = OwnershipUpdateMode(src.read_u32::<LittleEndian>()?);
+        let min_security_version_bl0 = MinSecurityVersion(src.read_u32::<LittleEndian>()?);
+        let lock_constraint = src.read_u32::<LittleEndian>()?;
+
+        let mut device_id = [0u32; 8];
+        src.read_u32_into::<LittleEndian>(&mut device_id)?;
+        let boot_svc_after_wakeup = HardenedBool(src.read_u32::<LittleEndian>()?);
+        let mut reserved = [0u32; 15];
         src.read_u32_into::<LittleEndian>(&mut reserved)?;
-        let owner_key = KeyMaterial::read_length(src, ownership_key_alg, 64)?;
-        let activate_key = KeyMaterial::read_length(src, ownership_key_alg, 64)?;
-        let unlock_key = KeyMaterial::read_length(src, ownership_key_alg, 64)?;
+        let owner_key = KeyMaterial::read_length(src, ownership_key_alg, 96)?;
+        let activate_key = KeyMaterial::read_length(src, ownership_key_alg, 96)?;
+        let unlock_key = KeyMaterial::read_length(src, ownership_key_alg, 96)?;
         let mut bytes = vec![0u8; Self::DATA_SIZE];
         src.read_exact(&mut bytes)?;
         let mut cursor = std::io::Cursor::new(&bytes);
@@ -142,9 +212,14 @@ impl OwnerBlock {
         src.read_exact(&mut seal)?;
         Ok(Self {
             header,
-            version,
+            config_version,
             sram_exec,
             ownership_key_alg,
+            update_mode,
+            min_security_version_bl0,
+            lock_constraint,
+            device_id,
+            boot_svc_after_wakeup,
             reserved,
             owner_key,
             activate_key,
@@ -155,19 +230,60 @@ impl OwnerBlock {
         })
     }
     pub fn sign(&mut self, key: &EcdsaPrivateKey) -> Result<()> {
+        ensure!(
+            self.ownership_key_alg == OwnershipKeyAlg::EcdsaP256,
+            CryptoError::SignFailed(anyhow!(
+                "Algorithm {} requires a detached signature",
+                self.ownership_key_alg
+            ))
+        );
         let mut data = Vec::new();
         self.write(&mut data)?;
         self.signature = key.digest_and_sign(&data[..Self::SIGNATURE_OFFSET])?;
         Ok(())
     }
+
+    pub fn detached_sign(
+        &mut self,
+        nonce: u64,
+        ecdsa_key: Option<&EcdsaPrivateKey>,
+        spx_key: Option<&SpxSecretKey>,
+    ) -> Result<DetachedSignature> {
+        self.signature = Default::default();
+        let mut data = Vec::new();
+        self.write(&mut data)?;
+        DetachedSignature::new(
+            &data[..Self::SIGNATURE_OFFSET],
+            TlvTag::Owner.into(),
+            self.ownership_key_alg,
+            nonce,
+            ecdsa_key,
+            spx_key,
+        )
+    }
+
+    pub fn is_default_constraint(d: &[u32; 8]) -> bool {
+        *d == [Self::NO_CONSTRAINT; 8]
+    }
+
+    pub fn default_constraint() -> [u32; 8] {
+        [Self::NO_CONSTRAINT; 8]
+    }
 }
 
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub enum OwnerConfigItem {
+    #[serde(alias = "application_key")]
     ApplicationKey(OwnerApplicationKey),
+    #[serde(alias = "flash_info_config")]
     FlashInfoConfig(OwnerFlashInfoConfig),
+    #[serde(alias = "flash_config")]
     FlashConfig(OwnerFlashConfig),
+    #[serde(alias = "rescue_config")]
     RescueConfig(OwnerRescueConfig),
+    #[serde(alias = "isfb_config")]
+    IsfbConfig(OwnerIsfbConfig),
+    #[serde(alias = "raw")]
     Raw(
         #[serde(with = "serde_bytes")]
         #[annotate(format = hexdump)]
@@ -182,6 +298,7 @@ impl OwnerConfigItem {
             Self::FlashInfoConfig(x) => x.write(dest)?,
             Self::FlashConfig(x) => x.write(dest)?,
             Self::RescueConfig(x) => x.write(dest)?,
+            Self::IsfbConfig(x) => x.write(dest)?,
             Self::Raw(x) => dest.write_all(x)?,
         }
         Ok(())
@@ -196,6 +313,9 @@ impl OwnerConfigItem {
                 Self::FlashInfoConfig(OwnerFlashInfoConfig::read(src, header)?)
             }
             TlvTag::Rescue => Self::RescueConfig(OwnerRescueConfig::read(src, header)?),
+            TlvTag::IntegratorSpecificFirmwareBinding => {
+                Self::IsfbConfig(OwnerIsfbConfig::read(src, header)?)
+            }
             TlvTag::NotPresent => return Ok(None),
             _ => {
                 let mut data = Vec::new();
@@ -227,50 +347,50 @@ mod test {
     #[rustfmt::skip]
     const OWNER_BIN: &str =
 r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
-00000010: 50 32 35 36 00 00 00 00 00 00 00 00 00 00 00 00  P256............
-00000020: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11  ................
-00000030: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11  ................
-00000040: 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21  !!!!!!!!!!!!!!!!
-00000050: 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21  !!!!!!!!!!!!!!!!
-00000060: 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33  3333333333333333
-00000070: 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33  3333333333333333
-00000080: 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44  DDDDDDDDDDDDDDDD
-00000090: 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44  DDDDDDDDDDDDDDDD
-000000a0: 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
-000000b0: 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
-000000c0: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66  ffffffffffffffff
-000000d0: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66  ffffffffffffffff
-000000e0: 41 50 50 4b 70 00 00 00 50 32 35 36 70 72 6f 64  APPKp...P256prod
-000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-00000100: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
-00000110: aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa  ................
-00000120: aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa  ................
-00000130: bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb  ................
-00000140: bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb  ................
-00000150: 46 4c 53 48 20 00 00 00 00 00 00 01 66 06 00 99  FLSH .......f...
-00000160: 66 06 00 00 00 01 00 02 77 17 11 88 77 17 11 11  f.......w...w...
-00000170: 49 4e 46 4f 20 00 00 00 00 01 00 00 66 06 00 99  INFO .......f...
-00000180: 66 06 00 00 01 05 00 00 77 17 11 88 77 17 11 11  f.......w...w...
-00000190: 52 45 53 51 3c 00 00 00 58 4d 44 4d 20 00 e0 00  RESQ<...XMDM ...
-000001a0: 46 45 59 b4 6e 9e c5 da 46 f5 ed e1 b8 47 6c 3d  FEY.n...F....Gl=
-000001b0: 55 4e 52 51 41 4f 52 51 52 45 53 51 42 4c 4f 47  UNRQAORQRESQBLOG
-000001c0: 42 52 45 51 42 52 53 50 4f 57 4e 52 5a 5a 5a 5a  BREQBRSPOWNRZZZZ
-000001d0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-000001e0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-000001f0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000200: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000210: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000220: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000230: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000240: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000250: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000260: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000270: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000280: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-00000290: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-000002a0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-000002b0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
-000002c0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
+00000010: 50 32 35 36 4f 50 45 4e ff ff ff ff 00 00 00 00  P256OPEN........
+00000020: 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e  ~~~~~~~~~~~~~~~~
+00000030: 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e 7e  ~~~~~~~~~~~~~~~~
+00000040: d4 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000080: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11  ................
+00000090: 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11  ................
+000000a0: 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21  !!!!!!!!!!!!!!!!
+000000b0: 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21 21  !!!!!!!!!!!!!!!!
+000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+000000e0: 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33  3333333333333333
+000000f0: 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33  3333333333333333
+00000100: 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44  DDDDDDDDDDDDDDDD
+00000110: 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44  DDDDDDDDDDDDDDDD
+00000120: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000140: 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
+00000150: 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55 55  UUUUUUUUUUUUUUUU
+00000160: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66  ffffffffffffffff
+00000170: 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66 66  ffffffffffffffff
+00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+000001a0: 41 50 50 4b 70 00 00 00 50 32 35 36 70 72 6f 64  APPKp...P256prod
+000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
+000001d0: aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa  ................
+000001e0: aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa aa  ................
+000001f0: bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb  ................
+00000200: bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb bb  ................
+00000210: 46 4c 53 48 20 00 00 00 00 00 00 01 66 06 00 99  FLSH .......f...
+00000220: 66 06 00 00 00 01 00 02 77 17 11 88 77 17 11 11  f.......w...w...
+00000230: 49 4e 46 4f 20 00 00 00 00 01 00 00 66 06 00 99  INFO .......f...
+00000240: 66 06 00 00 01 05 00 00 77 17 11 88 77 17 11 11  f.......w...w...
+00000250: 52 45 53 51 50 00 00 00 58 00 00 40 20 00 e0 00  RESQP...X..@ ...
+00000260: 45 4d 50 54 4d 53 45 43 4e 45 58 54 55 4e 4c 4b  EMPTMSECNEXTUNLK
+00000270: 41 43 54 56 51 53 45 52 42 53 45 52 4f 42 45 52  ACTVQSERBSEROBER
+00000280: 47 4f 4c 42 51 45 52 42 50 53 52 42 52 4e 57 4f  GOLBQERBPSRBRNWO
+00000290: 30 47 50 4f 31 47 50 4f 44 49 54 4f 54 49 41 57  0GPO1GPODITOTIAW
+000002a0: 49 53 46 42 2c 00 00 00 01 08 00 00 66 06 00 00  ISFB,.......f...
+000002b0: 70 72 6f 64 00 00 00 00 00 00 00 00 00 00 00 00  prod............
+000002c0: 00 00 00 00 00 00 00 00 80 00 00 00 5a 5a 5a 5a  ............ZZZZ
 000002d0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
 000002e0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
 000002f0: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a  ZZZZZZZZZZZZZZZZ
@@ -357,18 +477,13 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
 "#;
 
     const OWNER_JSON: &str = r#"{
-  header: {
-    identifier: "Owner",
-    length: 2048
-  },
-  version: 0,
+  config_version: 0,
   sram_exec: "DisabledLocked",
   ownership_key_alg: "EcdsaP256",
-  reserved: [
-    0x0,
-    0x0,
-    0x0
-  ],
+  update_mode: "Open",
+  min_security_version_bl0: "NoChange",
+  lock_constraint: 0,
+  boot_svc_after_wakeup: "False",
   owner_key: {
     Ecdsa: {
       x: "1111111111111111111111111111111111111111111111111111111111111111",
@@ -390,10 +505,6 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
   data: [
     {
       ApplicationKey: {
-        header: {
-          identifier: "ApplicationKey",
-          length: 112
-        },
         key_alg: "EcdsaP256",
         key_domain: "Prod",
         key_diversifier: [
@@ -416,10 +527,6 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
     },
     {
       FlashConfig: {
-        header: {
-          identifier: "FlashConfig",
-          length: 32
-        },
         config: [
           {
             start: 0,
@@ -430,7 +537,7 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
             scramble: true,
             ecc: true,
             high_endurance: true,
-            protect_when_primary: false,
+            protect_when_active: false,
             lock: false
           },
           {
@@ -442,7 +549,7 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
             scramble: true,
             ecc: true,
             high_endurance: true,
-            protect_when_primary: false,
+            protect_when_active: false,
             lock: false
           }
         ]
@@ -450,10 +557,6 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
     },
     {
       FlashInfoConfig: {
-        header: {
-          identifier: "FlashInfoConfig",
-          length: 32
-        },
         config: [
           {
             bank: 0,
@@ -465,7 +568,7 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
             scramble: true,
             ecc: true,
             high_endurance: true,
-            protect_when_primary: false,
+            protect_when_active: false,
             lock: false
           },
           {
@@ -478,7 +581,7 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
             scramble: true,
             ecc: true,
             high_endurance: true,
-            protect_when_primary: false,
+            protect_when_active: false,
             lock: false
           }
         ]
@@ -486,27 +589,44 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
     },
     {
       RescueConfig: {
-        header: {
-          identifier: "Rescue",
-          length: 60
-        },
-        rescue_type: "Xmodem",
+        protocol: "Xmodem",
+        trigger: "UartBreak",
+        trigger_index: 0,
+        gpio_pull_en: false,
+        gpio_value: false,
+        enter_on_watchdog: false,
+        enter_on_failure: false,
+        timeout: 0,
         start: 32,
         size: 224,
         command_allow: [
           "Empty",
           "MinBl0SecVerRequest",
           "NextBl0SlotRequest",
-          "PrimaryBl0SlotRequest",
-          "UnlockOwnershipRequest",
-          "ActivateOwnerRequest",
+          "OwnershipUnlockRequest",
+          "OwnershipActivateRequest",
           "Rescue",
+          "RescueB",
+          "Reboot",
           "GetBootLog",
           "BootSvcReq",
           "BootSvcRsp",
-          "OwnerBlock"
+          "OwnerBlock",
+          "GetOwnerPage0",
+          "GetOwnerPage1",
+          "GetDeviceId",
+          "Wait"
         ]
       }
+    },
+    {
+      IsfbConfig: {
+        bank: 1,
+        page: 8,
+        erase_conditions: 0x666,
+        key_domain: "Prod",
+        product_words: 128
+      }
     }
   ],
   signature: {
@@ -519,7 +639,7 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
     #[test]
     fn test_owner_write() -> Result<()> {
         let own = OwnerBlock {
-            version: 0,
+            config_version: 0,
             sram_exec: SramExecMode::default(),
             ownership_key_alg: OwnershipKeyAlg::EcdsaP256,
             owner_key: KeyMaterial::Ecdsa(EcdsaRawPublicKey {
@@ -571,6 +691,15 @@ r#"00000000: 4f 57 4e 52 00 08 00 00 00 00 00 00 4c 4e 45 58  OWNR........LNEX
                     ..Default::default()
                 }),
                 OwnerConfigItem::RescueConfig(OwnerRescueConfig::all()),
+                OwnerConfigItem::IsfbConfig(OwnerIsfbConfig {
+                    bank: 1,
+                    page: 8,
+                    pad: 0,
+                    erase_conditions: 0x0000_0666,
+                    key_domain: ApplicationKeyDomain::Prod,
+                    product_words: 128,
+                    ..Default::default()
+                }),
             ],
             signature: EcdsaRawSignature {
                 r: hex::decode("7777777777777777777777777777777777777777777777777777777777777777")?,
diff --git a/sw/host/opentitanlib/src/ownership/rescue.rs b/sw/host/opentitanlib/src/ownership/rescue.rs
index 4f9c3db4912c4..4f579fe0d2274 100644
--- a/sw/host/opentitanlib/src/ownership/rescue.rs
+++ b/sw/host/opentitanlib/src/ownership/rescue.rs
@@ -9,39 +9,80 @@ use serde_annotate::Annotate;
 use std::convert::TryFrom;
 use std::io::{Read, Write};
 
+use super::GlobalFlags;
 use super::misc::{TlvHeader, TlvTag};
+use crate::chip::boot_svc::BootSvcKind;
 use crate::with_unknown;
 
 with_unknown! {
-    pub enum RescueType: u32 [default = Self::None] {
+    pub enum RescueProtocol: u8 [default = Self::None] {
         None = 0,
-        Xmodem = u32::from_le_bytes(*b"XMDM"),
+        Xmodem = b'X',
+        UsbDfu = b'U',
+        SpiDfu = b'S',
+    }
+
+    pub enum RescueTrigger: u8 [default = Self::UartBreak] {
+        None = 0,
+        UartBreak = 1,
+        Strapping = 2,
+        Gpio = 3,
     }
 
     pub enum CommandTag: u32 [default = Self::Unknown] {
         Unknown = 0,
-        Empty = 0xb4594546,
-        MinBl0SecVerRequest = 0xdac59e6e,
-        NextBl0SlotRequest = 0xe1edf546,
-        PrimaryBl0SlotRequest = 0x3d6c47b8,
-        UnlockOwnershipRequest = 0x51524e55,
-        ActivateOwnerRequest = 0x51524f41,
-        Rescue = u32::from_le_bytes(*b"RESQ"),
-        GetBootLog = u32::from_le_bytes(*b"BLOG"),
-        BootSvcReq = u32::from_le_bytes(*b"BREQ"),
-        BootSvcRsp = u32::from_le_bytes(*b"BRSP"),
-        OwnerBlock = u32::from_le_bytes(*b"OWNR"),
+        Empty = BootSvcKind::EmptyRequest.0,
+        MinBl0SecVerRequest = BootSvcKind::MinBl0SecVerRequest.0,
+        NextBl0SlotRequest = BootSvcKind::NextBl0SlotRequest.0,
+        OwnershipUnlockRequest = BootSvcKind::OwnershipUnlockRequest.0,
+        OwnershipActivateRequest =   BootSvcKind::OwnershipActivateRequest.0,
+
+        // The rescue protocol-level commands are represented in big-endian order.
+        Rescue = u32::from_be_bytes(*b"RESQ"),
+        RescueB = u32::from_be_bytes(*b"RESB"),
+        Reboot = u32::from_be_bytes(*b"REBO"),
+        GetBootLog = u32::from_be_bytes(*b"BLOG"),
+        BootSvcReq = u32::from_be_bytes(*b"BREQ"),
+        BootSvcRsp = u32::from_be_bytes(*b"BRSP"),
+        OwnerBlock = u32::from_be_bytes(*b"OWNR"),
+        GetOwnerPage0 = u32::from_be_bytes(*b"OPG0"),
+        GetOwnerPage1 = u32::from_be_bytes(*b"OPG1"),
+        GetDeviceId = u32::from_be_bytes(*b"OTID"),
+        Wait = u32::from_be_bytes(*b"WAIT"),
     }
 }
 
 /// Describes the configuration of the rescue feature of the ROM_EXT.
-#[derive(Debug, Serialize, Deserialize, Annotate)]
+#[derive(Debug, Serialize, Deserialize, Annotate, PartialEq)]
 pub struct OwnerRescueConfig {
     /// Header identifying this struct.
-    #[serde(default)]
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "OwnerRescueConfig::default_header"
+    )]
     pub header: TlvHeader,
     /// The type of rescue protocol to use (ie: Xmodem).
-    pub rescue_type: RescueType,
+    #[serde(alias = "rescue_type")]
+    pub protocol: RescueProtocol,
+    /// The rescue triggering mechanism (UartBreak, Strapping or Gpio).
+    #[serde(default)]
+    pub trigger: RescueTrigger,
+    /// The index of the trigger (e.g. Strapping combo or GPIO pin number).
+    #[serde(default)]
+    pub trigger_index: u8,
+    /// Whether or not to enable the GPIO pull resistor (only if trigger is GPIO).
+    #[serde(default)]
+    pub gpio_pull_en: bool,
+    /// The GPIO trigger value (only if trigger is GPIO).
+    #[serde(default)]
+    pub gpio_value: bool,
+    /// Enter rescue mode if the reboot reason is watchdog timeout.
+    #[serde(default)]
+    pub enter_on_watchdog: bool,
+    /// Enter rescue mode if boot fails.
+    pub enter_on_failure: bool,
+    /// The inactivity timeout in seconds (zero means disabled).
+    pub timeout: u8,
     /// The start of the rescue flash region (in pages).
     pub start: u16,
     /// The size of the rescue flash region (in pages).
@@ -53,8 +94,15 @@ pub struct OwnerRescueConfig {
 impl Default for OwnerRescueConfig {
     fn default() -> Self {
         Self {
-            header: TlvHeader::new(TlvTag::Rescue, 0),
-            rescue_type: RescueType::default(),
+            header: Self::default_header(),
+            protocol: RescueProtocol::default(),
+            gpio_pull_en: false,
+            gpio_value: false,
+            enter_on_watchdog: false,
+            enter_on_failure: false,
+            timeout: 0,
+            trigger: RescueTrigger::default(),
+            trigger_index: 0,
             start: 0u16,
             size: 0u16,
             command_allow: Vec::new(),
@@ -64,8 +112,22 @@ impl Default for OwnerRescueConfig {
 
 impl OwnerRescueConfig {
     const BASE_SIZE: usize = 16;
+    const MISC_GPIO_WATCHDOG_TIMEOUT_EN_BIT: u8 = 0x80;
+    const MISC_GPIO_PULL_BIT: u8 = 0x02;
+    const MISC_GPIO_VALUE_BIT: u8 = 0x01;
+    const ENTER_ON_FAIL_BIT: u8 = 0x80;
+    const TIMEOUT_MASK: u8 = 0x7f;
+    const TRIGGER_SHIFT: u8 = 6;
+    const INDEX_MASK: u8 = 0x3f;
+
+    pub fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::Rescue, 0, "0.0")
+    }
     pub fn read(src: &mut impl Read, header: TlvHeader) -> Result<Self> {
-        let rescue_type = RescueType(src.read_u32::<LittleEndian>()?);
+        let protocol = RescueProtocol(src.read_u8()?);
+        let gpio = src.read_u8()?;
+        let timeout = src.read_u8()?;
+        let trigger = src.read_u8()?;
         let start = src.read_u16::<LittleEndian>()?;
         let size = src.read_u16::<LittleEndian>()?;
         let allow_len = (header.length - Self::BASE_SIZE) / std::mem::size_of::<u32>();
@@ -75,7 +137,14 @@ impl OwnerRescueConfig {
         }
         Ok(Self {
             header,
-            rescue_type,
+            protocol,
+            gpio_pull_en: gpio & Self::MISC_GPIO_PULL_BIT != 0,
+            gpio_value: gpio & Self::MISC_GPIO_VALUE_BIT != 0,
+            enter_on_watchdog: gpio & Self::MISC_GPIO_WATCHDOG_TIMEOUT_EN_BIT != 0,
+            enter_on_failure: timeout & Self::ENTER_ON_FAIL_BIT != 0,
+            timeout: timeout & Self::TIMEOUT_MASK,
+            trigger: RescueTrigger(trigger >> Self::TRIGGER_SHIFT),
+            trigger_index: trigger & Self::INDEX_MASK,
             start,
             size,
             command_allow,
@@ -85,9 +154,36 @@ impl OwnerRescueConfig {
         let header = TlvHeader::new(
             TlvTag::Rescue,
             Self::BASE_SIZE + self.command_allow.len() * std::mem::size_of::<u32>(),
+            "0.0",
         );
         header.write(dest)?;
-        dest.write_u32::<LittleEndian>(u32::from(self.rescue_type))?;
+        dest.write_u8(u8::from(self.protocol))?;
+        dest.write_u8(
+            if self.enter_on_watchdog {
+                Self::MISC_GPIO_WATCHDOG_TIMEOUT_EN_BIT
+            } else {
+                0
+            } | if self.gpio_pull_en {
+                Self::MISC_GPIO_PULL_BIT
+            } else {
+                0
+            } | if self.gpio_value {
+                Self::MISC_GPIO_VALUE_BIT
+            } else {
+                0
+            },
+        )?;
+        dest.write_u8(
+            self.timeout & Self::TIMEOUT_MASK
+                | if self.enter_on_failure {
+                    Self::ENTER_ON_FAIL_BIT
+                } else {
+                    0
+                },
+        )?;
+        dest.write_u8(
+            self.trigger_index & Self::INDEX_MASK | u8::from(self.trigger) << Self::TRIGGER_SHIFT,
+        )?;
         dest.write_u16::<LittleEndian>(self.start)?;
         dest.write_u16::<LittleEndian>(self.size)?;
         for allow in self.command_allow.iter() {
@@ -98,7 +194,8 @@ impl OwnerRescueConfig {
 
     pub fn all() -> Self {
         OwnerRescueConfig {
-            rescue_type: RescueType::Xmodem,
+            protocol: RescueProtocol::Xmodem,
+            trigger: RescueTrigger::UartBreak,
             // Start after the ROM_EXT.
             start: 32,
             // End at the end of the partition.
@@ -107,14 +204,19 @@ impl OwnerRescueConfig {
                 CommandTag::Empty,
                 CommandTag::MinBl0SecVerRequest,
                 CommandTag::NextBl0SlotRequest,
-                CommandTag::PrimaryBl0SlotRequest,
-                CommandTag::UnlockOwnershipRequest,
-                CommandTag::ActivateOwnerRequest,
+                CommandTag::OwnershipUnlockRequest,
+                CommandTag::OwnershipActivateRequest,
                 CommandTag::Rescue,
+                CommandTag::RescueB,
+                CommandTag::Reboot,
                 CommandTag::GetBootLog,
                 CommandTag::BootSvcReq,
                 CommandTag::BootSvcRsp,
                 CommandTag::OwnerBlock,
+                CommandTag::GetOwnerPage0,
+                CommandTag::GetOwnerPage1,
+                CommandTag::GetDeviceId,
+                CommandTag::Wait,
             ],
             ..Default::default()
         }
@@ -127,31 +229,39 @@ mod test {
     use crate::util::hexdump::{hexdump_parse, hexdump_string};
 
     const OWNER_RESCUE_CONFIG_BIN: &str = "\
-00000000: 52 45 53 51 3c 00 00 00 58 4d 44 4d 20 00 64 00  RESQ<...XMDM .d.\n\
-00000010: 46 45 59 b4 6e 9e c5 da 46 f5 ed e1 b8 47 6c 3d  FEY.n...F....Gl=\n\
-00000020: 55 4e 52 51 41 4f 52 51 52 45 53 51 42 4c 4f 47  UNRQAORQRESQBLOG\n\
-00000030: 42 52 45 51 42 52 53 50 4f 57 4e 52              BREQBRSPOWNR\n\
+00000000: 52 45 53 51 4c 00 00 00 58 80 00 40 20 00 64 00  RESQL...X..@ .d.\n\
+00000010: 45 4d 50 54 4d 53 45 43 4e 45 58 54 55 4e 4c 4b  EMPTMSECNEXTUNLK\n\
+00000020: 41 43 54 56 51 53 45 52 42 53 45 52 47 4f 4c 42  ACTVQSERBSERGOLB\n\
+00000030: 51 45 52 42 50 53 52 42 52 4e 57 4f 30 47 50 4f  QERBPSRBRNWO0GPO\n\
+00000040: 31 47 50 4f 44 49 54 4f 54 49 41 57              1GPODITOTIAW\n\
 ";
     const OWNER_RESCUE_CONFIG_JSON: &str = r#"{
-  header: {
-    identifier: "Rescue",
-    length: 60
-  },
-  rescue_type: "Xmodem",
+  protocol: "Xmodem",
+  trigger: "UartBreak",
+  trigger_index: 0,
+  gpio_pull_en: false,
+  gpio_value: false,
+  enter_on_watchdog: true,
+  enter_on_failure: false,
+  timeout: 0,
   start: 32,
   size: 100,
   command_allow: [
     "Empty",
     "MinBl0SecVerRequest",
     "NextBl0SlotRequest",
-    "PrimaryBl0SlotRequest",
-    "UnlockOwnershipRequest",
-    "ActivateOwnerRequest",
+    "OwnershipUnlockRequest",
+    "OwnershipActivateRequest",
     "Rescue",
+    "RescueB",
     "GetBootLog",
     "BootSvcReq",
     "BootSvcRsp",
-    "OwnerBlock"
+    "OwnerBlock",
+    "GetOwnerPage0",
+    "GetOwnerPage1",
+    "GetDeviceId",
+    "Wait"
   ]
 }"#;
 
@@ -159,22 +269,29 @@ mod test {
     fn test_owner_rescue_config_write() -> Result<()> {
         let orc = OwnerRescueConfig {
             header: TlvHeader::default(),
-            rescue_type: RescueType::Xmodem,
+            protocol: RescueProtocol::Xmodem,
+            trigger: RescueTrigger::UartBreak,
+            enter_on_watchdog: true,
             start: 32,
             size: 100,
             command_allow: vec![
                 CommandTag::Empty,
                 CommandTag::MinBl0SecVerRequest,
                 CommandTag::NextBl0SlotRequest,
-                CommandTag::PrimaryBl0SlotRequest,
-                CommandTag::UnlockOwnershipRequest,
-                CommandTag::ActivateOwnerRequest,
+                CommandTag::OwnershipUnlockRequest,
+                CommandTag::OwnershipActivateRequest,
                 CommandTag::Rescue,
+                CommandTag::RescueB,
                 CommandTag::GetBootLog,
                 CommandTag::BootSvcReq,
                 CommandTag::BootSvcRsp,
                 CommandTag::OwnerBlock,
+                CommandTag::GetOwnerPage0,
+                CommandTag::GetOwnerPage1,
+                CommandTag::GetDeviceId,
+                CommandTag::Wait,
             ],
+            ..Default::default()
         };
 
         let mut bin = Vec::new();
diff --git a/sw/host/opentitanlib/src/ownership/signature.rs b/sw/host/opentitanlib/src/ownership/signature.rs
new file mode 100644
index 0000000000000..9e091cac5c04f
--- /dev/null
+++ b/sw/host/opentitanlib/src/ownership/signature.rs
@@ -0,0 +1,210 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
+use serde::{Deserialize, Serialize};
+use serde_annotate::Annotate;
+use sphincsplus::{SpxDomain, SpxSecretKey};
+use std::io::{Read, Write};
+use std::path::Path;
+
+use super::GlobalFlags;
+use super::misc::{OwnershipKeyAlg, TlvHeader, TlvTag};
+use crate::crypto::Error;
+use crate::crypto::ecdsa::{EcdsaPrivateKey, EcdsaRawSignature};
+use crate::crypto::sha256::Sha256Digest;
+
+#[derive(Debug, Serialize, Deserialize, Annotate)]
+pub struct DetachedSignature {
+    #[serde(
+        skip_serializing_if = "GlobalFlags::not_debug",
+        default = "DetachedSignature::default_header"
+    )]
+    pub header: TlvHeader,
+    #[serde(default, skip_serializing_if = "GlobalFlags::not_debug")]
+    #[annotate(format=hex)]
+    pub reserved: [u32; 2],
+    #[serde(default)]
+    pub command: u32,
+    #[serde(default)]
+    pub algorithm: OwnershipKeyAlg,
+    #[serde(default)]
+    pub nonce: u64,
+    #[serde(default)]
+    pub ecdsa: Option<EcdsaRawSignature>,
+    #[serde(default)]
+    pub spx: Option<Vec<u8>>,
+}
+
+impl Default for DetachedSignature {
+    fn default() -> Self {
+        Self {
+            header: Self::default_header(),
+            reserved: [0, 0],
+            command: 0,
+            algorithm: OwnershipKeyAlg::Unknown,
+            nonce: 0,
+            ecdsa: None,
+            spx: None,
+        }
+    }
+}
+
+impl DetachedSignature {
+    const SIZE: usize = 8192;
+    const SPX_SIZE: usize = 7856;
+
+    fn default_header() -> TlvHeader {
+        TlvHeader::new(TlvTag::DetachedSignature, 0, "0.0")
+    }
+
+    pub fn read(src: &mut impl Read, header: TlvHeader) -> Result<Self> {
+        let mut reserved = [0u32; 2];
+        src.read_u32_into::<LittleEndian>(&mut reserved)?;
+        let command = src.read_u32::<LittleEndian>()?;
+        let algorithm = OwnershipKeyAlg(src.read_u32::<LittleEndian>()?);
+        let nonce = src.read_u64::<LittleEndian>()?;
+        let ecdsa = if algorithm.is_ecdsa() {
+            Some(EcdsaRawSignature::read(src)?)
+        } else {
+            None
+        };
+        let spx = if algorithm.is_spx() {
+            let mut spx = vec![0u8; Self::SPX_SIZE];
+            src.read_exact(&mut spx)?;
+            Some(spx)
+        } else {
+            None
+        };
+        Ok(Self {
+            header,
+            reserved,
+            command,
+            algorithm,
+            nonce,
+            ecdsa,
+            spx,
+        })
+    }
+
+    pub fn write(&self, dest: &mut impl Write) -> Result<()> {
+        let header = TlvHeader::new(TlvTag::DetachedSignature, Self::SIZE, "0.0");
+        header.write(dest)?;
+        for x in &self.reserved {
+            dest.write_u32::<LittleEndian>(*x)?;
+        }
+        dest.write_u32::<LittleEndian>(self.command)?;
+        dest.write_u32::<LittleEndian>(u32::from(self.algorithm))?;
+        dest.write_u64::<LittleEndian>(self.nonce)?;
+        let mut len = 32;
+        if self.algorithm.is_ecdsa() {
+            let ecdsa = self.ecdsa.as_ref().ok_or_else(|| {
+                Error::InvalidSignature(anyhow!(
+                    "Algorithm {} requires an ECDSA signature",
+                    self.algorithm
+                ))
+            })?;
+            len += ecdsa.write(dest)?;
+        }
+        if self.algorithm.is_spx() {
+            let spx = self.spx.as_ref().ok_or_else(|| {
+                Error::InvalidSignature(anyhow!(
+                    "Algorithm {} requires an SPX signature",
+                    self.algorithm
+                ))
+            })?;
+            dest.write_all(spx.as_slice())?;
+            len += spx.len();
+        }
+
+        let pad = vec![0xffu8; Self::SIZE - len];
+        dest.write_all(&pad)?;
+        Ok(())
+    }
+
+    pub fn to_vec(&self) -> Result<Vec<u8>> {
+        let mut result = Vec::new();
+        self.write(&mut result)?;
+        Ok(result)
+    }
+
+    pub fn new(
+        data: &[u8],
+        command: u32,
+        algorithm: OwnershipKeyAlg,
+        nonce: u64,
+        ecdsa_key: Option<&EcdsaPrivateKey>,
+        spx_key: Option<&SpxSecretKey>,
+    ) -> Result<Self> {
+        let digest = Sha256Digest::hash(data);
+        let ecdsa = if algorithm.is_ecdsa() {
+            let key = ecdsa_key.ok_or_else(|| {
+                Error::SignFailed(anyhow!("Algorithm {algorithm} requires an ECDSA key"))
+            })?;
+            Some(key.sign(&digest)?)
+        } else {
+            None
+        };
+        let spx = if algorithm.is_spx() {
+            let key = spx_key.ok_or_else(|| {
+                Error::SignFailed(anyhow!("Algorithm {algorithm} requires an SPX key"))
+            })?;
+            let (domain, msg) = if algorithm.is_prehashed() {
+                let domain = SpxDomain::PreHashedSha256;
+                (domain, digest.as_ref())
+            } else {
+                let domain = SpxDomain::Pure;
+                (domain, data)
+            };
+            Some(key.sign(domain, msg)?)
+        } else {
+            None
+        };
+
+        Ok(Self {
+            header: Self::default_header(),
+            command,
+            algorithm,
+            nonce,
+            ecdsa,
+            spx,
+            ..Default::default()
+        })
+    }
+
+    pub fn from_raw_signatures(
+        command: u32,
+        algorithm: OwnershipKeyAlg,
+        nonce: u64,
+        ecdsa_signature_path: Option<&Path>,
+        spx_signature_path: Option<&Path>,
+    ) -> Result<Self> {
+        let mut ecdsa_sig: Option<EcdsaRawSignature> = None;
+        let mut spx_sig: Option<Vec<u8>> = None;
+
+        if algorithm.is_ecdsa() {
+            let path =
+                ecdsa_signature_path.ok_or_else(|| anyhow!("No ecdsa signature provided"))?;
+            let mut file = std::fs::File::open(path)?;
+            ecdsa_sig = Some(EcdsaRawSignature::read(&mut file)?);
+        }
+
+        if algorithm.is_spx() {
+            let path = spx_signature_path.ok_or_else(|| anyhow!("No spx signature provided"))?;
+            let spx_bytes = std::fs::read(path)?;
+            spx_sig = Some(spx_bytes);
+        }
+
+        Ok(Self {
+            header: Self::default_header(),
+            command,
+            algorithm,
+            nonce,
+            ecdsa: ecdsa_sig,
+            spx: spx_sig,
+            ..Default::default()
+        })
+    }
+}
diff --git a/sw/host/opentitanlib/src/proxy/handler.rs b/sw/host/opentitanlib/src/proxy/handler.rs
index 167ace72fb5b2..93cab9e926aa3 100644
--- a/sw/host/opentitanlib/src/proxy/handler.rs
+++ b/sw/host/opentitanlib/src/proxy/handler.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 
 use mio::{Registry, Token};
 use std::borrow::Borrow;
@@ -10,6 +10,7 @@ use std::collections::HashMap;
 use std::rc::Rc;
 use std::time::Duration;
 
+use super::CommandHandler;
 use super::errors::SerializedError;
 use super::protocol::{
     BitbangEntryRequest, BitbangEntryResponse, DacBangEntryRequest, EmuRequest, EmuResponse,
@@ -18,7 +19,6 @@ use super::protocol::{
     I2cTransferResponse, Message, ProxyRequest, ProxyResponse, Request, Response, SpiRequest,
     SpiResponse, SpiTransferRequest, SpiTransferResponse, UartRequest, UartResponse,
 };
-use super::CommandHandler;
 use crate::app::TransportWrapper;
 use crate::bootstrap::Bootstrap;
 use crate::io::gpio::{
@@ -257,10 +257,18 @@ impl<'a> TransportCommandHandler<'a> {
                         instance.set_baudrate(*rate)?;
                         Ok(Response::Uart(UartResponse::SetBaudrate))
                     }
+                    UartRequest::SetBreak(enable) => {
+                        instance.set_break(*enable)?;
+                        Ok(Response::Uart(UartResponse::SetBreak))
+                    }
                     UartRequest::SetParity(parity) => {
                         instance.set_parity(*parity)?;
                         Ok(Response::Uart(UartResponse::SetParity))
                     }
+                    UartRequest::GetDevicePath => {
+                        let path = instance.get_device_path()?;
+                        Ok(Response::Uart(UartResponse::GetDevicePath { path }))
+                    }
                     UartRequest::Read {
                         timeout_millis,
                         len,
@@ -358,6 +366,10 @@ impl<'a> TransportCommandHandler<'a> {
                         instance.set_voltage(*voltage)?;
                         Ok(Response::Spi(SpiResponse::SetVoltage))
                     }
+                    SpiRequest::GetFlashromArgs => {
+                        let programmer = instance.get_flashrom_programmer()?;
+                        Ok(Response::Spi(SpiResponse::GetFlashromArgs { programmer }))
+                    }
                     SpiRequest::RunTransaction { transaction: reqs } => {
                         // Construct proper response to each transfer in request.
                         let mut resps: Vec<SpiTransferResponse> = reqs
diff --git a/sw/host/opentitanlib/src/proxy/mod.rs b/sw/host/opentitanlib/src/proxy/mod.rs
index 7c09cd50acce0..0c966ef612514 100644
--- a/sw/host/opentitanlib/src/proxy/mod.rs
+++ b/sw/host/opentitanlib/src/proxy/mod.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use handler::TransportCommandHandler;
 use mio::event::Event;
 use mio::net::TcpListener;
diff --git a/sw/host/opentitanlib/src/proxy/nonblocking_uart.rs b/sw/host/opentitanlib/src/proxy/nonblocking_uart.rs
index e0e2b41edbc09..a9ebcdea94108 100644
--- a/sw/host/opentitanlib/src/proxy/nonblocking_uart.rs
+++ b/sw/host/opentitanlib/src/proxy/nonblocking_uart.rs
@@ -12,8 +12,8 @@ use std::ptr::hash;
 use std::rc::Rc;
 use std::time::Duration;
 
-use super::socket_server::{get_next_token, Connection};
 use super::ExtraEventHandler;
+use super::socket_server::{Connection, get_next_token};
 use crate::io::uart::Uart;
 
 pub struct NonblockingUartRegistry {
@@ -144,9 +144,8 @@ impl Hash for UartKey {
 }
 impl PartialEq for UartKey {
     /// Determines whether the two `Rc`s point to the same `Uart` instance.
-    #[allow(clippy::vtable_address_comparisons)]
     fn eq(&self, other: &Self) -> bool {
-        Rc::as_ptr(&self.0) == Rc::as_ptr(&other.0)
+        Rc::ptr_eq(&self.0, &other.0)
     }
 }
 
diff --git a/sw/host/opentitanlib/src/proxy/protocol.rs b/sw/host/opentitanlib/src/proxy/protocol.rs
index d1eb75d451114..570ed51c1f6fc 100644
--- a/sw/host/opentitanlib/src/proxy/protocol.rs
+++ b/sw/host/opentitanlib/src/proxy/protocol.rs
@@ -176,7 +176,9 @@ pub enum UartRequest {
     SetBaudrate {
         rate: u32,
     },
+    SetBreak(bool),
     SetParity(Parity),
+    GetDevicePath,
     Read {
         timeout_millis: Option<u32>,
         len: u32,
@@ -192,7 +194,9 @@ pub enum UartRequest {
 pub enum UartResponse {
     GetBaudrate { rate: u32 },
     SetBaudrate,
+    SetBreak,
     SetParity,
+    GetDevicePath { path: String },
     Read { data: Vec<u8> },
     Write,
     SupportsNonblockingRead { has_support: bool },
@@ -240,6 +244,7 @@ pub enum SpiRequest {
     SetVoltage {
         voltage: Voltage,
     },
+    GetFlashromArgs,
     RunTransaction {
         transaction: Vec<SpiTransferRequest>,
     },
@@ -275,6 +280,9 @@ pub enum SpiResponse {
         sizes: MaxSizes,
     },
     SetVoltage,
+    GetFlashromArgs {
+        programmer: String,
+    },
     RunTransaction {
         transaction: Vec<SpiTransferResponse>,
     },
diff --git a/sw/host/opentitanlib/src/proxy/socket_server.rs b/sw/host/opentitanlib/src/proxy/socket_server.rs
index 1495e93b54f3d..672d6d516a9df 100644
--- a/sw/host/opentitanlib/src/proxy/socket_server.rs
+++ b/sw/host/opentitanlib/src/proxy/socket_server.rs
@@ -2,16 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use mio::event::Event;
 use mio::net::TcpListener;
 use mio::net::TcpStream;
 use mio::{Events, Interest, Poll, Registry, Token};
 use mio_signals::{Signal, SignalSet, Signals};
-use serde::de::DeserializeOwned;
 use serde::Serialize;
-use std::collections::hash_map::Entry::{Occupied, Vacant};
+use serde::de::DeserializeOwned;
 use std::collections::HashMap;
+use std::collections::hash_map::Entry::{Occupied, Vacant};
 use std::io::{ErrorKind, Read, Write};
 use std::marker::PhantomData;
 use std::sync::atomic::{AtomicUsize, Ordering};
diff --git a/sw/host/opentitanlib/src/rescue/dfu.rs b/sw/host/opentitanlib/src/rescue/dfu.rs
new file mode 100644
index 0000000000000..20582cc261ff1
--- /dev/null
+++ b/sw/host/opentitanlib/src/rescue/dfu.rs
@@ -0,0 +1,201 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use crate::with_unknown;
+use anyhow::Result;
+use zerocopy::{FromBytes, Immutable, IntoBytes};
+
+with_unknown! {
+    #[derive(FromBytes, Immutable, IntoBytes)]
+    pub enum DfuState: u8 [default = Self::AppIdle] {
+      AppIdle = 0,
+      AppDetach= 1,
+      Idle = 2,
+      DnLoadSync = 3,
+      DnLoadBusy = 4,
+      DnLoadIdle = 5,
+      ManifestSync = 6,
+      Manifest = 7,
+      ManifestWaitReset = 8,
+      UpLoadIdle = 9,
+      Error = 10,
+    }
+}
+
+with_unknown! {
+    #[derive(FromBytes, Immutable, IntoBytes)]
+    pub enum DfuError: u8 [default = Self::Ok] {
+      Ok = 0,
+      Target = 1,
+      File = 2,
+      Write = 3,
+      Erase = 4,
+      CheckErased = 5,
+      Prog = 6,
+      Verify = 7,
+      Address = 8,
+      NotDone = 9,
+      Firmware = 10,
+      Vendor = 11,
+      UsbReset = 12,
+      PowerOnReset = 13,
+      Unknown = 14,
+      StalledPkt = 15,
+    }
+}
+
+with_unknown! {
+    pub enum DfuRequest: u8 {
+      Detach = 0,
+      DnLoad = 1,
+      UpLoad = 2,
+      GetStatus = 3,
+      ClrStatus = 4,
+      GetState = 5,
+      Abort = 6,
+      BusReset = 7,
+    }
+}
+
+#[derive(Clone, Copy)]
+#[repr(u8)]
+pub enum DfuRequestType {
+    Out = 0x21,    // direction=out, type=class, recipient=interface.
+    In = 0xA1,     // direction=in, type=class, recipient=interface.
+    Vendor = 0x40, // direction=out, type=vendor, recipient=device.
+}
+
+impl From<DfuRequestType> for u8 {
+    fn from(val: DfuRequestType) -> Self {
+        val as u8
+    }
+}
+
+#[derive(Clone, FromBytes, Immutable, IntoBytes, Default)]
+#[repr(C)]
+pub struct DfuStatus {
+    status: DfuError,
+    poll_timeout: [u8; 3],
+    state: DfuState,
+    string: u8,
+}
+
+impl std::error::Error for DfuError {}
+
+impl DfuStatus {
+    pub fn status(&self) -> std::result::Result<(), DfuError> {
+        match self.status {
+            DfuError::Ok => Ok(()),
+            e => Err(e),
+        }
+    }
+    pub fn poll_timeout(&self) -> u32 {
+        u32::from_le_bytes([
+            self.poll_timeout[0],
+            self.poll_timeout[1],
+            self.poll_timeout[2],
+            0,
+        ])
+    }
+    pub fn state(&self) -> DfuState {
+        self.state
+    }
+    pub fn string(&self) -> u8 {
+        self.string
+    }
+}
+
+pub trait DfuOperations {
+    fn write_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &[u8],
+    ) -> Result<usize>;
+
+    fn read_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &mut [u8],
+    ) -> Result<usize>;
+
+    fn get_interface(&self) -> u8;
+
+    /// Download (send) a block to the target device.
+    fn download(&self, data: &[u8]) -> Result<usize> {
+        self.write_control(
+            DfuRequestType::Out.into(),
+            DfuRequest::DnLoad.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            data,
+        )
+    }
+
+    /// Upload (receive) a block from the target device.
+    fn upload(&self, data: &mut [u8]) -> Result<usize> {
+        self.read_control(
+            DfuRequestType::In.into(),
+            DfuRequest::UpLoad.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            data,
+        )
+    }
+
+    /// Get the current DFU state.
+    fn get_state(&self) -> Result<DfuState> {
+        let mut buffer = [0u8];
+        self.read_control(
+            DfuRequestType::In.into(),
+            DfuRequest::GetState.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            &mut buffer,
+        )?;
+        Ok(DfuState(buffer[0]))
+    }
+
+    /// Get the DFU status.
+    fn get_status(&self) -> Result<DfuStatus> {
+        let mut status = DfuStatus::default();
+        self.read_control(
+            DfuRequestType::In.into(),
+            DfuRequest::GetStatus.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            status.as_mut_bytes(),
+        )?;
+        Ok(status)
+    }
+
+    /// Clear the DFU status.
+    fn clear_status(&self) -> Result<()> {
+        self.write_control(
+            DfuRequestType::Out.into(),
+            DfuRequest::ClrStatus.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            &[],
+        )?;
+        Ok(())
+    }
+
+    /// Abort a DFU operation.
+    fn abort(&self) -> Result<()> {
+        self.write_control(
+            DfuRequestType::Out.into(),
+            DfuRequest::Abort.into(),
+            /*wValue=*/ 0,
+            /*wIndex=*/ self.get_interface() as u16,
+            &[],
+        )?;
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/rescue/mod.rs b/sw/host/opentitanlib/src/rescue/mod.rs
index 319a252a961c2..860d6bbdd8b57 100644
--- a/sw/host/opentitanlib/src/rescue/mod.rs
+++ b/sw/host/opentitanlib/src/rescue/mod.rs
@@ -2,13 +2,286 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use anyhow::{Result, ensure};
+use clap::{Args, ValueEnum};
 use thiserror::Error;
 
+use crate::app::TransportWrapper;
+use crate::chip::boot_log::BootLog;
+use crate::chip::boot_svc::{BootSlot, BootSvc, OwnershipActivateRequest, OwnershipUnlockRequest};
+use crate::chip::device_id::DeviceId;
+use crate::io::gpio::PinMode;
+use crate::io::spi::SpiParams;
+use crate::io::uart::UartParams;
+use crate::util::parse_int::ParseInt;
+use crate::with_unknown;
+
+pub mod dfu;
 pub mod serial;
+pub mod spidfu;
+pub mod usbdfu;
 pub mod xmodem;
 
+pub use serial::RescueSerial;
+pub use spidfu::SpiDfu;
+pub use usbdfu::UsbDfu;
+
 #[derive(Debug, Error)]
 pub enum RescueError {
     #[error("bad mode: {0}")]
     BadMode(String),
+    #[error("configuration error: {0}")]
+    Configuration(String),
+    #[error("bad protocol: {0}")]
+    BadProtocol(String),
+    #[error("not found: {0}")]
+    NotFound(String),
+}
+
+#[derive(ValueEnum, Default, Debug, Clone, Copy, PartialEq)]
+pub enum RescueProtocol {
+    #[default]
+    Xmodem,
+    UsbDfu,
+    SpiDfu,
+}
+
+#[derive(ValueEnum, Default, Debug, Clone, Copy, PartialEq)]
+pub enum RescueTrigger {
+    #[default]
+    SerialBreak,
+    Gpio,
+    Strap,
+}
+
+#[derive(Clone, Default, Debug, Args)]
+pub struct RescueParams {
+    /// Rescue Protocol
+    #[arg(short, long, value_enum, default_value_t = RescueProtocol::Xmodem)]
+    pub protocol: RescueProtocol,
+    #[arg(short, long, value_enum, default_value_t = RescueTrigger::SerialBreak)]
+    pub trigger: RescueTrigger,
+    #[arg(short, long, default_value = "")]
+    pub value: String,
+    #[command(flatten)]
+    pub spi: SpiParams,
+    #[command(flatten)]
+    pub uart: UartParams,
+    #[arg(long)]
+    pub usb_serial: Option<String>,
+}
+
+impl RescueParams {
+    pub fn create(&self, transport: &TransportWrapper) -> Result<Box<dyn Rescue>> {
+        match self.protocol {
+            RescueProtocol::Xmodem => self.create_serial(transport),
+            RescueProtocol::UsbDfu => self.create_usbdfu(transport),
+            RescueProtocol::SpiDfu => self.create_spidfu(transport),
+        }
+    }
+
+    pub fn set_trigger(&self, transport: &TransportWrapper, trigger: bool) -> Result<()> {
+        match self.trigger {
+            RescueTrigger::SerialBreak => unimplemented!(),
+            RescueTrigger::Gpio => self.set_gpio(transport, trigger),
+            RescueTrigger::Strap => self.set_strap(transport, trigger),
+        }
+    }
+
+    fn create_serial(&self, transport: &TransportWrapper) -> Result<Box<dyn Rescue>> {
+        ensure!(
+            self.trigger == RescueTrigger::SerialBreak,
+            RescueError::Configuration(format!(
+                "Xmodem does not support trigger {:?}",
+                self.trigger
+            ))
+        );
+        ensure!(
+            self.value.is_empty(),
+            RescueError::Configuration(format!(
+                "Xmodem does not support trigger value {:?}",
+                self.value
+            ))
+        );
+        Ok(Box::new(RescueSerial::new(
+            self.uart.create(transport)?,
+            None,
+        )))
+    }
+
+    fn create_usbdfu(&self, _transport: &TransportWrapper) -> Result<Box<dyn Rescue>> {
+        ensure!(
+            self.trigger != RescueTrigger::SerialBreak,
+            RescueError::Configuration(format!(
+                "Usb-DFU does not support trigger {:?}",
+                self.trigger
+            ))
+        );
+        ensure!(
+            !self.value.is_empty(),
+            RescueError::Configuration("Usb-DFU requires a trigger value".into())
+        );
+        Ok(Box::new(UsbDfu::new(self.clone())))
+    }
+
+    fn create_spidfu(&self, transport: &TransportWrapper) -> Result<Box<dyn Rescue>> {
+        ensure!(
+            self.trigger != RescueTrigger::SerialBreak,
+            RescueError::Configuration(format!(
+                "Usb-DFU does not support trigger {:?}",
+                self.trigger
+            ))
+        );
+        ensure!(
+            !self.value.is_empty(),
+            RescueError::Configuration("Usb-DFU requires a trigger value".into())
+        );
+        Ok(Box::new(SpiDfu::new(
+            self.spi.create(transport, "BOOTSTRAP")?,
+            self.clone(),
+        )))
+    }
+
+    fn set_strap(&self, transport: &TransportWrapper, trigger: bool) -> Result<()> {
+        let mut value = if trigger {
+            u8::from_str(&self.value)?
+        } else {
+            0u8
+        };
+        for strap in ["SW_STRAP0", "SW_STRAP1", "SW_STRAP2"] {
+            let pin = transport.gpio_pin(strap)?;
+            match value & 3 {
+                0 => pin.write(false)?,
+                1 | 2 => log::error!("weak straps not supported yet"),
+                3 => pin.write(true)?,
+                _ => unreachable!(),
+            };
+            value >>= 2;
+        }
+        Ok(())
+    }
+
+    fn parse_pin(&self) -> Result<(&str, bool)> {
+        if let Some(pin) = self.value.strip_prefix('+') {
+            Ok((pin, true))
+        } else if let Some(pin) = self.value.strip_prefix('-') {
+            Ok((pin, false))
+        } else {
+            Ok((self.value.as_str(), true))
+        }
+    }
+
+    fn set_gpio(&self, transport: &TransportWrapper, trigger: bool) -> Result<()> {
+        let (name, mut value) = self.parse_pin()?;
+        if !trigger {
+            value = !value
+        };
+        let pin = transport.gpio_pin(name)?;
+        pin.set(Some(PinMode::PushPull), Some(value), None, None)?;
+        Ok(())
+    }
+}
+
+with_unknown! {
+pub enum RescueMode: u32 {
+    Rescue = u32::from_be_bytes(*b"RESQ"),
+    RescueB = u32::from_be_bytes(*b"RESB"),
+    BootLog = u32::from_be_bytes(*b"BLOG"),
+    BootSvcReq = u32::from_be_bytes(*b"BREQ"),
+    BootSvcRsp = u32::from_be_bytes(*b"BRSP"),
+    OwnerBlock = u32::from_be_bytes(*b"OWNR"),
+    GetOwnerPage0 = u32::from_be_bytes(*b"OPG0"),
+    GetOwnerPage1 = u32::from_be_bytes(*b"OPG1"),
+    DeviceId = u32::from_be_bytes(*b"OTID"),
+    EraseOwner = u32::from_be_bytes(*b"KLBR"),
+}
+}
+
+#[derive(Debug, Clone, Copy, PartialEq, Eq, clap::ValueEnum)]
+/// Determines how `Rescue::enter` should enter rescue mode.
+pub enum EntryMode {
+    /// Reset the chip using the external power-on reset signal.
+    Reset,
+    /// Assume the chip is in rescue mode and needs to soft-reboot back to rescue mode.
+    Reboot,
+    /// Do nothing; assume the chip is ready to go to rescue mode.
+    None,
+}
+
+pub trait Rescue {
+    fn enter(&self, transport: &TransportWrapper, mode: EntryMode) -> Result<()>;
+    fn set_mode(&self, mode: RescueMode) -> Result<()>;
+    fn send(&self, data: &[u8]) -> Result<()>;
+    fn recv(&self) -> Result<Vec<u8>>;
+
+    // Not supported by all backends
+    fn set_speed(&self, speed: u32) -> Result<u32>;
+    fn reboot(&self) -> Result<()>;
+
+    fn get_raw(&self, mode: RescueMode) -> Result<Vec<u8>> {
+        self.set_mode(mode)?;
+        self.recv()
+    }
+
+    fn set_raw(&self, mode: RescueMode, data: &[u8]) -> Result<()> {
+        self.set_mode(mode)?;
+        self.send(data)
+    }
+
+    fn update_firmware(&self, slot: BootSlot, image: &[u8]) -> Result<()> {
+        let mode = if slot == BootSlot::SlotB {
+            RescueMode::RescueB
+        } else {
+            RescueMode::Rescue
+        };
+        self.set_raw(mode, image)
+    }
+
+    fn get_boot_log(&self) -> Result<BootLog> {
+        let blog = self.get_raw(RescueMode::BootLog)?;
+        Ok(BootLog::try_from(blog.as_slice())?)
+    }
+
+    fn get_boot_svc(&self) -> Result<BootSvc> {
+        let bsvc = self.get_raw(RescueMode::BootSvcRsp)?;
+        Ok(BootSvc::try_from(bsvc.as_slice())?)
+    }
+
+    fn get_device_id(&self) -> Result<DeviceId> {
+        let id = self.get_raw(RescueMode::DeviceId)?;
+        DeviceId::read(&mut std::io::Cursor::new(&id))
+    }
+
+    fn empty(&self, payload: &[u32]) -> Result<()> {
+        let message = BootSvc::empty(payload);
+        self.set_raw(RescueMode::BootSvcReq, &message.to_bytes()?)
+    }
+
+    fn set_min_bl0_sec_ver(&self, ver: u32) -> Result<()> {
+        let message = BootSvc::min_bl0_sec_ver(ver);
+        self.set_raw(RescueMode::BootSvcReq, &message.to_bytes()?)
+    }
+
+    fn set_next_bl0_slot(&self, primary: BootSlot, next: BootSlot) -> Result<()> {
+        let message = BootSvc::next_boot_bl0_slot(primary, next);
+        self.set_raw(RescueMode::BootSvcReq, &message.to_bytes()?)
+    }
+
+    fn ownership_unlock(&self, unlock: OwnershipUnlockRequest) -> Result<()> {
+        let message = BootSvc::ownership_unlock(unlock);
+        self.set_raw(RescueMode::BootSvcReq, &message.to_bytes()?)
+    }
+
+    fn ownership_activate(&self, activate: OwnershipActivateRequest) -> Result<()> {
+        let message = BootSvc::ownership_activate(activate);
+        self.set_raw(RescueMode::BootSvcReq, &message.to_bytes()?)
+    }
+
+    fn set_owner_config(&self, data: &[u8]) -> Result<()> {
+        self.set_raw(RescueMode::OwnerBlock, data)
+    }
+
+    fn erase_owner(&self) -> Result<()> {
+        self.set_raw(RescueMode::EraseOwner, &[])
+    }
 }
diff --git a/sw/host/opentitanlib/src/rescue/serial.rs b/sw/host/opentitanlib/src/rescue/serial.rs
index 0e1daa4499555..3c466312c99a1 100644
--- a/sw/host/opentitanlib/src/rescue/serial.rs
+++ b/sw/host/opentitanlib/src/rescue/serial.rs
@@ -3,34 +3,32 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use anyhow::Result;
+use std::cell::Cell;
 use std::rc::Rc;
 use std::time::Duration;
 
-use crate::app::TransportWrapper;
-use crate::chip::boot_log::BootLog;
-use crate::chip::boot_svc::{BootSlot, BootSvc, OwnershipActivateRequest, OwnershipUnlockRequest};
+use crate::app::{TransportWrapper, UartRx};
 use crate::io::uart::Uart;
 use crate::rescue::xmodem::Xmodem;
-use crate::rescue::RescueError;
+use crate::rescue::{EntryMode, Rescue, RescueError, RescueMode};
 use crate::uart::console::UartConsole;
 
 pub struct RescueSerial {
     uart: Rc<dyn Uart>,
     reset_delay: Duration,
     enter_delay: Duration,
+    version: Cell<u16>,
 }
 
 impl RescueSerial {
+    // The version is encoded in a u16 with the major as the high byte and minor as the low byte.
+    const VERSION_1_0: u16 = 0x0100;
+    const VERSION_2_0: u16 = 0x0200;
+
     const ONE_SECOND: Duration = Duration::from_secs(1);
-    pub const RESCUE: [u8; 4] = *b"RESQ";
-    pub const RESCUE_B: [u8; 4] = *b"RESB";
-    pub const REBOOT: [u8; 4] = *b"REBO";
-    pub const BAUD: [u8; 4] = *b"BAUD";
-    pub const BOOT_LOG: [u8; 4] = *b"BLOG";
-    pub const BOOT_SVC_REQ: [u8; 4] = *b"BREQ";
-    pub const BOOT_SVC_RSP: [u8; 4] = *b"BRSP";
-    pub const OWNER_BLOCK: [u8; 4] = *b"OWNR";
-    pub const WAIT: [u8; 4] = *b"WAIT";
+    pub const REBOOT: RescueMode = RescueMode(u32::from_be_bytes(*b"REBO"));
+    pub const BAUD: RescueMode = RescueMode(u32::from_be_bytes(*b"BAUD"));
+    pub const WAIT: RescueMode = RescueMode(u32::from_be_bytes(*b"WAIT"));
 
     const BAUD_115K: [u8; 4] = *b"115K";
     const BAUD_230K: [u8; 4] = *b"230K";
@@ -39,28 +37,68 @@ impl RescueSerial {
     const BAUD_1M33: [u8; 4] = *b"1M33";
     const BAUD_1M50: [u8; 4] = *b"1M50";
 
-    pub fn new(uart: Rc<dyn Uart>) -> Self {
+    pub fn new(uart: Rc<dyn Uart>, enter_delay: Option<Duration>) -> Self {
         RescueSerial {
             uart,
             reset_delay: Duration::from_millis(50),
-            enter_delay: Duration::from_secs(5),
+            enter_delay: enter_delay.unwrap_or(Duration::from_secs(5)),
+            version: Cell::default(),
         }
     }
+}
 
-    pub fn enter(&self, transport: &TransportWrapper) -> Result<()> {
-        log::info!("Setting serial break to trigger rescue mode.");
-        self.uart.set_break(true)?;
-        transport.reset_target(self.reset_delay, /*clear_uart*=*/ true)?;
-        UartConsole::wait_for(&*self.uart, r"rescue:.*\r\n", self.enter_delay)?;
-        log::info!("Rescue triggered. clearing serial break.");
+impl Rescue for RescueSerial {
+    fn enter(&self, transport: &TransportWrapper, mode: EntryMode) -> Result<()> {
+        log::info!("Setting serial break to trigger rescue mode (entry via {mode:?}).");
+        match mode {
+            EntryMode::Reset => {
+                self.uart.set_break(true)?;
+                transport.reset_with_delay(UartRx::Clear, self.reset_delay)?;
+            }
+            EntryMode::Reboot => {
+                self.reboot()?;
+                self.uart.set_break(true)?;
+            }
+            EntryMode::None => {
+                self.uart.set_break(true)?;
+            }
+        }
+        let version = UartConsole::wait_for(
+            &*self.uart,
+            r"rescue:(?:(\d+)\.(\d+))?.*\r\n",
+            self.enter_delay,
+        )?;
+        let version = if !version[1].is_empty() && !version[2].is_empty() {
+            let major = version[1].parse::<u16>()?;
+            let minor = version[2].parse::<u16>()?;
+            (major << 8) | minor
+        } else {
+            0
+        };
+        self.version.set(version);
+        log::info!("Rescue triggered (version={version:04x}). Clearing serial break.");
         self.uart.set_break(false)?;
         // Upon entry, rescue is going to tell us what mode it is.
         // Consume and discard.
         let _ = UartConsole::wait_for(&*self.uart, r"(ok|error):.*\r\n", Self::ONE_SECOND);
-        Ok(())
+
+        if version < Self::VERSION_1_0 {
+            // Make the older version of the protocol compliant with the current expectations of
+            // the client.  Since the rescue client now expects the chip to wait after transfers
+            // rather than automatically reset, we put older implementations into WAIT mode.
+            self.set_mode(Self::WAIT)?;
+        }
+        if version >= Self::VERSION_2_0 {
+            Err(RescueError::BadProtocol(format!(
+                "This version of opentitantool does not support rescue protocol {version:04x}"
+            ))
+            .into())
+        } else {
+            Ok(())
+        }
     }
 
-    pub fn set_baud(&self, baud: u32) -> Result<()> {
+    fn set_speed(&self, baud: u32) -> Result<u32> {
         // Make sure the requested rate is a known rate.
         let symbol = match baud {
             115200 => Self::BAUD_115K,
@@ -72,8 +110,14 @@ impl RescueSerial {
             _ => return Err(RescueError::BadMode(format!("Unsupported badrate {baud}")).into()),
         };
 
-        // Request to change rates.
-        self.set_mode(Self::BAUD)?;
+        // Request to change rates.  We don't use `set_mode` here because changing
+        // rates isn't a "mode" request and doesn't respond the same way.
+        self.uart.write(&Self::BAUD.0.to_be_bytes())?;
+        self.uart.write(b"\r")?;
+        let result = UartConsole::wait_for(&*self.uart, r"(ok|error):.*\r\n", Self::ONE_SECOND)?;
+        if result[1] == "error" {
+            return Err(RescueError::BadMode(result[0].clone()).into());
+        }
 
         // Send the new rate and check for success.
         self.uart.write(&symbol)?;
@@ -82,103 +126,44 @@ impl RescueSerial {
             return Err(RescueError::BadMode(result[0].clone()).into());
         }
         // Change our side of the connection to the new rate.
+        let old = self.uart.get_baudrate()?;
         self.uart.set_baudrate(baud)?;
-        Ok(())
+        Ok(old)
     }
 
-    pub fn set_mode(&self, mode: [u8; 4]) -> Result<()> {
+    fn set_mode(&self, mode: RescueMode) -> Result<()> {
+        let mode = mode.0.to_be_bytes();
         self.uart.write(&mode)?;
         let enter = b'\r';
         self.uart.write(std::slice::from_ref(&enter))?;
-        let result = UartConsole::wait_for(&*self.uart, r"(ok|error):.*\r\n", Self::ONE_SECOND)?;
+        let mode = std::str::from_utf8(&mode)?;
+        let result = UartConsole::wait_for(
+            &*self.uart,
+            &format!("mode: {mode}\r\n(ok|error):.*\r\n"),
+            Self::ONE_SECOND,
+        )?;
+
         if result[1] == "error" {
             return Err(RescueError::BadMode(result[0].clone()).into());
         }
         Ok(())
     }
 
-    pub fn wait(&self) -> Result<()> {
-        self.set_mode(Self::WAIT)?;
-        Ok(())
-    }
-
-    pub fn reboot(&self) -> Result<()> {
+    fn reboot(&self) -> Result<()> {
         self.set_mode(Self::REBOOT)?;
         Ok(())
     }
 
-    pub fn update_firmware(&self, slot: BootSlot, image: &[u8]) -> Result<()> {
-        self.set_mode(if slot == BootSlot::SlotB {
-            Self::RESCUE_B
-        } else {
-            Self::RESCUE
-        })?;
-        let xm = Xmodem::new();
-        xm.send(&*self.uart, image)?;
-        Ok(())
-    }
-
-    pub fn get_boot_log_raw(&self) -> Result<Vec<u8>> {
-        self.set_mode(Self::BOOT_LOG)?;
-        let mut blog = Vec::new();
-        let xm = Xmodem::new();
-        xm.receive(&*self.uart, &mut blog)?;
-        Ok(blog)
-    }
-
-    pub fn get_boot_log(&self) -> Result<BootLog> {
-        let blog = self.get_boot_log_raw()?;
-        Ok(BootLog::try_from(blog.as_slice())?)
-    }
-
-    pub fn get_boot_svc_raw(&self) -> Result<Vec<u8>> {
-        self.set_mode(Self::BOOT_SVC_RSP)?;
-        let mut bsvc = Vec::new();
-        let xm = Xmodem::new();
-        xm.receive(&*self.uart, &mut bsvc)?;
-        Ok(bsvc)
-    }
-
-    pub fn get_boot_svc(&self) -> Result<BootSvc> {
-        let bsvc = self.get_boot_svc_raw()?;
-        Ok(BootSvc::try_from(bsvc.as_slice())?)
-    }
-
-    pub fn set_boot_svc_raw(&self, data: &[u8]) -> Result<()> {
-        self.set_mode(Self::BOOT_SVC_REQ)?;
+    fn send(&self, data: &[u8]) -> Result<()> {
         let xm = Xmodem::new();
         xm.send(&*self.uart, data)?;
         Ok(())
     }
 
-    pub fn set_next_bl0_slot(&self, slot: BootSlot) -> Result<()> {
-        let message = BootSvc::next_boot_bl0_slot(slot);
-        let data = message.to_bytes()?;
-        self.set_boot_svc_raw(&data)
-    }
-
-    pub fn set_primary_bl0_slot(&self, slot: BootSlot) -> Result<()> {
-        let message = BootSvc::primary_bl0_slot(slot);
-        let data = message.to_bytes()?;
-        self.set_boot_svc_raw(&data)
-    }
-
-    pub fn ownership_unlock(&self, unlock: OwnershipUnlockRequest) -> Result<()> {
-        let message = BootSvc::ownership_unlock(unlock);
-        let data = message.to_bytes()?;
-        self.set_boot_svc_raw(&data)
-    }
-
-    pub fn ownership_activate(&self, activate: OwnershipActivateRequest) -> Result<()> {
-        let message = BootSvc::ownership_activate(activate);
-        let data = message.to_bytes()?;
-        self.set_boot_svc_raw(&data)
-    }
-
-    pub fn set_owner_config(&self, data: &[u8]) -> Result<()> {
-        self.set_mode(Self::OWNER_BLOCK)?;
+    fn recv(&self) -> Result<Vec<u8>> {
+        let mut data = Vec::new();
         let xm = Xmodem::new();
-        xm.send(&*self.uart, data)?;
-        Ok(())
+        xm.receive(&*self.uart, &mut data)?;
+        Ok(data)
     }
 }
diff --git a/sw/host/opentitanlib/src/rescue/spidfu.rs b/sw/host/opentitanlib/src/rescue/spidfu.rs
new file mode 100644
index 0000000000000..1d0414f3f75a3
--- /dev/null
+++ b/sw/host/opentitanlib/src/rescue/spidfu.rs
@@ -0,0 +1,264 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail};
+use std::cell::RefCell;
+use std::rc::Rc;
+use std::time::{Duration, Instant};
+use zerocopy::{Immutable, IntoBytes};
+
+use crate::app::{TransportWrapper, UartRx};
+use crate::chip::rom_error::RomError;
+use crate::io::spi::Target;
+use crate::rescue::dfu::*;
+use crate::rescue::{EntryMode, Rescue, RescueError, RescueMode, RescueParams};
+use crate::spiflash::SpiFlash;
+use crate::spiflash::sfdp::Sdfu;
+
+#[repr(C)]
+#[derive(Default, Debug, Immutable, IntoBytes)]
+struct SetupData {
+    request_type: u8,
+    request: u8,
+    value: u16,
+    index: u16,
+    length: u16,
+}
+
+pub struct SpiDfu {
+    spi: Rc<dyn Target>,
+    flash: RefCell<SpiFlash>,
+    sdfu: RefCell<Sdfu>,
+    params: RescueParams,
+    reset_delay: Duration,
+    enter_delay: Duration,
+}
+
+impl SpiDfu {
+    const SET_INTERFACE: u8 = 0x0b;
+
+    pub fn new(spi: Rc<dyn Target>, params: RescueParams) -> Self {
+        SpiDfu {
+            spi,
+            flash: RefCell::default(),
+            sdfu: RefCell::default(),
+            params,
+            reset_delay: Duration::from_millis(50),
+            enter_delay: Duration::from_secs(5),
+        }
+    }
+
+    fn wait_for_device(spi: &dyn Target, timeout: Duration) -> Result<SpiFlash> {
+        let deadline = Instant::now() + timeout;
+        loop {
+            match SpiFlash::from_spi(spi) {
+                Ok(flash) => return Ok(flash),
+                Err(e) => {
+                    if Instant::now() < deadline {
+                        std::thread::sleep(Duration::from_millis(100));
+                    } else {
+                        return Err(e);
+                    }
+                }
+            }
+        }
+    }
+}
+
+impl Rescue for SpiDfu {
+    fn enter(&self, transport: &TransportWrapper, mode: EntryMode) -> Result<()> {
+        log::info!(
+            "Setting {:?}({}) to trigger rescue mode.",
+            self.params.trigger,
+            self.params.value
+        );
+        self.params.set_trigger(transport, true)?;
+        match mode {
+            EntryMode::Reset => transport.reset_with_delay(UartRx::Keep, self.reset_delay)?,
+            EntryMode::Reboot => {
+                self.reboot()?;
+                // Give the chip a chance to reset before attempting to re-read
+                // the SFDP from the SPI device.
+                std::thread::sleep(Duration::from_millis(100));
+            }
+            EntryMode::None => {}
+        }
+
+        let flash = Self::wait_for_device(&*self.spi, self.enter_delay);
+        log::info!("Rescue triggered; clearing trigger condition.");
+        self.params.set_trigger(transport, false)?;
+        let mut flash = flash?;
+        log::info!("Flash = {:?}", flash.sfdp);
+        if let Some(sdfu) = flash.sfdp.as_ref().and_then(|sfdp| sfdp.sdfu.as_ref()) {
+            self.sdfu.replace(sdfu.clone());
+        } else {
+            return Err(RescueError::NotFound(
+                "Could not find SDFU parameters in the SDFP table".into(),
+            )
+            .into());
+        }
+        flash.set_address_mode_auto(&*self.spi)?;
+        self.flash.replace(flash);
+        Ok(())
+    }
+
+    fn set_mode(&self, mode: RescueMode) -> Result<()> {
+        let setting = match mode {
+            // FIXME: Remap "send" modes to their corresponding "recv" mode.
+            // The firmware will stage the recv data, then enter the send mode.
+            RescueMode::Rescue => RescueMode::Rescue,
+            RescueMode::RescueB => RescueMode::RescueB,
+            RescueMode::DeviceId => RescueMode::DeviceId,
+            RescueMode::BootLog => RescueMode::BootLog,
+            RescueMode::BootSvcReq => RescueMode::BootSvcRsp,
+            RescueMode::BootSvcRsp => RescueMode::BootSvcRsp,
+            RescueMode::OwnerBlock => RescueMode::GetOwnerPage0,
+            RescueMode::GetOwnerPage0 => RescueMode::GetOwnerPage0,
+            _ => bail!(RescueError::BadMode(format!(
+                "mode {mode:?} not supported by DFU"
+            ))),
+        };
+
+        log::info!("Mode {mode} is AltSetting {setting}");
+        let setting = u32::from(setting);
+        // This is a proprietary version of the standard USB SetInterface command.
+        self.write_control(
+            DfuRequestType::Vendor.into(),
+            Self::SET_INTERFACE,
+            (setting >> 16) as u16,
+            setting as u16,
+            &[],
+        )?;
+        Ok(())
+    }
+
+    fn set_speed(&self, _speed: u32) -> Result<u32> {
+        log::warn!("set_speed is not implemented for DFU");
+        Ok(0)
+    }
+
+    fn reboot(&self) -> Result<()> {
+        SpiFlash::chip_reset(&*self.spi)?;
+        Ok(())
+    }
+
+    fn send(&self, data: &[u8]) -> Result<()> {
+        let sdfu = self.sdfu.borrow();
+        for chunk in data.chunks(sdfu.dfu_size as usize) {
+            let _ = self.download(chunk)?;
+            let status = loop {
+                let status = self.get_status()?;
+                match status.state() {
+                    DfuState::DnLoadIdle | DfuState::Error => {
+                        break status;
+                    }
+                    _ => {
+                        std::thread::sleep(Duration::from_millis(status.poll_timeout() as u64));
+                    }
+                }
+            };
+            status.status()?;
+        }
+        // Send a zero-length chunk to signal the end.
+        let _ = self.download(&[])?;
+        let status = self.get_status()?;
+        log::warn!("State after DFU download: {}", status.state());
+        Ok(())
+    }
+
+    fn recv(&self) -> Result<Vec<u8>> {
+        let sdfu = self.sdfu.borrow();
+        let mut data = vec![0u8; sdfu.dfu_size as usize];
+        /*
+         * FIXME: what am I supposed to do here?
+         * The spec seems to indicate that I should keep performing `upload` until I get back a
+         * short or zero length packet.
+        let mut offset = 0;
+        loop {
+            log::info!("upload at {offset}");
+            let length = self.upload(&mut data[offset..])?;
+            if length == 0 || length < data.len() - offset {
+                break;
+            }
+            offset += length;
+        }
+        */
+        self.upload(&mut data)?;
+        let status = self.get_status()?;
+        log::warn!("State after DFU upload: {}", status.state());
+        Ok(data)
+    }
+}
+
+impl DfuOperations for SpiDfu {
+    fn get_interface(&self) -> u8 {
+        0
+    }
+
+    // Implement a USB-like control write transaction using OpenTitan's SPI interface.
+    // - Prepare an 8-byte SetupData structure and write it to the Mailbox.
+    //   Note: `flash.program` polls the SPI status BUSY bit for completion.
+    // - Read the Setup status back from the mailbox.  The status will be a
+    //   single 4-byte word of type `RomError`.
+    // - Write the data phase of the control transaction to SPI addresss 0.
+    fn write_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &[u8],
+    ) -> Result<usize> {
+        let setup = SetupData {
+            request_type,
+            request,
+            value,
+            index,
+            length: data.len().try_into()?,
+        };
+        let flash = self.flash.borrow();
+        let sdfu = self.sdfu.borrow();
+        flash.program(&*self.spi, sdfu.mailbox_address, setup.as_bytes())?;
+
+        let mut result = [0u8; 4];
+        flash.read(&*self.spi, sdfu.mailbox_address, &mut result)?;
+        Result::<(), RomError>::from(RomError(u32::from_le_bytes(result)))?;
+
+        flash.program(&*self.spi, 0, data)?;
+        Ok(data.len())
+    }
+
+    // Implement a USB-like control read transaction using OpenTitan's SPI interface.
+    // - Prepare an 8-byte SetupData structure and write it to the Mailbox.
+    //   Note: `flash.program` polls the SPI status BUSY bit for completion.
+    // - Read the Setup status back from the mailbox.  The status will be a
+    //   single 4-byte word of type `RomError`.
+    // - Read the data phase from SPI address 0.
+    fn read_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &mut [u8],
+    ) -> Result<usize> {
+        let setup = SetupData {
+            request_type,
+            request,
+            value,
+            index,
+            length: data.len().try_into()?,
+        };
+        let flash = self.flash.borrow();
+        let sdfu = self.sdfu.borrow();
+        flash.program(&*self.spi, sdfu.mailbox_address, setup.as_bytes())?;
+
+        let mut result = [0u8; 4];
+        flash.read(&*self.spi, sdfu.mailbox_address, &mut result)?;
+        Result::<(), RomError>::from(RomError(u32::from_le_bytes(result)))?;
+
+        flash.read(&*self.spi, 0, data)?;
+        Ok(data.len())
+    }
+}
diff --git a/sw/host/opentitanlib/src/rescue/usbdfu.rs b/sw/host/opentitanlib/src/rescue/usbdfu.rs
new file mode 100644
index 0000000000000..98d459369c25e
--- /dev/null
+++ b/sw/host/opentitanlib/src/rescue/usbdfu.rs
@@ -0,0 +1,197 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail};
+use std::cell::{Cell, Ref, RefCell};
+use std::time::Duration;
+
+use crate::app::{TransportWrapper, UartRx};
+use crate::rescue::dfu::*;
+use crate::rescue::{EntryMode, Rescue, RescueError, RescueMode, RescueParams};
+use crate::util::usb::UsbBackend;
+
+pub struct UsbDfu {
+    usb: RefCell<Option<UsbBackend>>,
+    interface: Cell<u8>,
+    params: RescueParams,
+    reset_delay: Duration,
+    enter_delay: Duration,
+}
+
+impl UsbDfu {
+    const CLASS: u8 = 254;
+    const SUBCLASS: u8 = 1;
+    const PROTOCOL: u8 = 2;
+    pub fn new(params: RescueParams) -> Self {
+        UsbDfu {
+            usb: RefCell::new(None),
+            interface: Cell::default(),
+            params,
+            reset_delay: Duration::from_millis(50),
+            enter_delay: Duration::from_secs(5),
+        }
+    }
+
+    fn device(&self) -> Ref<'_, UsbBackend> {
+        let device = self.usb.borrow();
+        Ref::map(device, |d| d.as_ref().expect("device handle"))
+    }
+}
+
+impl Rescue for UsbDfu {
+    fn enter(&self, transport: &TransportWrapper, mode: EntryMode) -> Result<()> {
+        log::info!(
+            "Setting {:?}({}) to trigger rescue mode.",
+            self.params.trigger,
+            self.params.value
+        );
+        self.params.set_trigger(transport, true)?;
+
+        match mode {
+            EntryMode::Reset => transport.reset_with_delay(UartRx::Keep, self.reset_delay)?,
+            EntryMode::Reboot => self.reboot()?,
+            EntryMode::None => {}
+        }
+
+        let device = UsbBackend::from_interface_with_timeout(
+            Self::CLASS,
+            Self::SUBCLASS,
+            Self::PROTOCOL,
+            self.params.usb_serial.as_deref(),
+            self.enter_delay,
+        );
+        log::info!("Rescue triggered; clearing trigger condition.");
+        self.params.set_trigger(transport, false)?;
+        let device = device?;
+
+        let config = device.active_config_descriptor()?;
+        for intf in config.interfaces() {
+            for desc in intf.descriptors() {
+                if desc.class_code() == Self::CLASS
+                    && desc.sub_class_code() == Self::SUBCLASS
+                    && desc.protocol_code() == Self::PROTOCOL
+                {
+                    device.claim_interface(intf.number())?;
+                    self.interface.set(intf.number());
+                    break;
+                }
+            }
+        }
+        self.usb.replace(Some(device));
+        Ok(())
+    }
+
+    fn set_mode(&self, mode: RescueMode) -> Result<()> {
+        let setting = match mode {
+            // FIXME: the RescueMode to AltSetting values either need to be permanently fixed, or
+            // the alt interfaces need to describe themselves via a string descriptor.
+            RescueMode::Rescue => 0,
+            RescueMode::RescueB => 1,
+            RescueMode::DeviceId => 2,
+            RescueMode::BootLog => 3,
+            RescueMode::BootSvcReq => 4,
+            RescueMode::BootSvcRsp => 4,
+            RescueMode::OwnerBlock => 5,
+            RescueMode::GetOwnerPage0 => 5,
+            _ => bail!(RescueError::BadMode(format!(
+                "mode {mode:?} not supported by DFU"
+            ))),
+        };
+
+        let device = self.device();
+        log::info!("Mode {mode} is AltSetting {setting}");
+        device.set_alternate_setting(self.interface.get(), setting)?;
+        Ok(())
+    }
+
+    fn set_speed(&self, _speed: u32) -> Result<u32> {
+        log::warn!("set_speed is not implemented for DFU");
+        Ok(0)
+    }
+
+    fn reboot(&self) -> Result<()> {
+        let usb = self.device();
+        usb.release_interface(self.interface.get())?;
+        match usb.reset() {
+            Ok(_) => {}
+            Err(e) => log::warn!("USB reset: {e}"),
+        }
+        Ok(())
+    }
+
+    fn send(&self, data: &[u8]) -> Result<()> {
+        for chunk in data.chunks(2048) {
+            let _ = self.download(chunk)?;
+            let status = loop {
+                let status = self.get_status()?;
+                match status.state() {
+                    DfuState::DnLoadIdle | DfuState::Error => {
+                        break status;
+                    }
+                    _ => {
+                        std::thread::sleep(Duration::from_millis(status.poll_timeout() as u64));
+                    }
+                }
+            };
+            status.status()?;
+        }
+        // Send a zero-length chunk to signal the end.
+        let _ = self.download(&[])?;
+        let status = self.get_status()?;
+        log::warn!("State after DFU download: {}", status.state());
+        Ok(())
+    }
+
+    fn recv(&self) -> Result<Vec<u8>> {
+        let mut data = vec![0u8; 2048];
+        /*
+         * FIXME: what am I supposed to do here?
+         * The spec seems to indicate that I should keep performing `upload` until I get back a
+         * short or zero length packet.
+        let mut offset = 0;
+        loop {
+            log::info!("upload at {offset}");
+            let length = self.upload(&mut data[offset..])?;
+            if length == 0 || length < data.len() - offset {
+                break;
+            }
+            offset += length;
+        }
+        */
+        self.upload(&mut data)?;
+        let status = self.get_status()?;
+        log::warn!("State after DFU upload: {}", status.state());
+        Ok(data)
+    }
+}
+
+impl DfuOperations for UsbDfu {
+    fn write_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &[u8],
+    ) -> Result<usize> {
+        let usb = self.device();
+        usb.write_control(request_type, request, value, index, data)
+    }
+
+    fn read_control(
+        &self,
+        request_type: u8,
+        request: u8,
+        value: u16,
+        index: u16,
+        data: &mut [u8],
+    ) -> Result<usize> {
+        let usb = self.device();
+        usb.read_control(request_type, request, value, index, data)
+    }
+
+    fn get_interface(&self) -> u8 {
+        self.interface.get()
+    }
+}
diff --git a/sw/host/opentitanlib/src/rescue/xmodem.rs b/sw/host/opentitanlib/src/rescue/xmodem.rs
index 696313572af1b..6e68c362189cb 100644
--- a/sw/host/opentitanlib/src/rescue/xmodem.rs
+++ b/sw/host/opentitanlib/src/rescue/xmodem.rs
@@ -97,7 +97,10 @@ impl Xmodem {
                     }
                 }
                 _ => {
-                    log::info!("Unknown byte received while waiting for XMODEM start: {ch:#x?}");
+                    let p = ch as char;
+                    log::info!(
+                        "Unknown byte received while waiting for XMODEM start: {p:?} ({ch:#x?})"
+                    );
                 }
             }
         }
@@ -185,7 +188,8 @@ impl Xmodem {
                 }
                 _ => {
                     return Err(XmodemError::UnsupportedMode(format!(
-                        "bad start of packet: {byte:?}"
+                        "bad start of packet: {byte:02x} ({})",
+                        byte as char
                     ))
                     .into());
                 }
@@ -199,8 +203,7 @@ impl Xmodem {
             let cancel = block != bnum || bnum != 255 - bcom;
 
             // The next `block_len` bytes are the packet itself.
-            let mut buffer = Vec::new();
-            buffer.resize(block_len, 0);
+            let mut buffer = vec![0; block_len];
             let mut total = 0;
             while total < block_len {
                 let n = uart.read(&mut buffer[total..])?;
diff --git a/sw/host/opentitanlib/src/spiflash/flash.rs b/sw/host/opentitanlib/src/spiflash/flash.rs
index 94f85c8be635e..76aca352a23ae 100644
--- a/sw/host/opentitanlib/src/spiflash/flash.rs
+++ b/sw/host/opentitanlib/src/spiflash/flash.rs
@@ -3,13 +3,13 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use crate::app::NoProgressBar;
-use crate::io::eeprom::{AddressMode, Mode, Transaction, MODE_111, MODE_112, MODE_114};
+use crate::io::eeprom::{AddressMode, MODE_111, MODE_112, MODE_114, Mode, Transaction};
 use crate::io::spi::Target;
 use crate::spiflash::sfdp::{
     BlockEraseSize, FastReadParam, SectorErase, Sfdp, SupportedAddressModes,
 };
 use crate::transport::ProgressIndicator;
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::ValueEnum;
 use std::convert::TryFrom;
 use thiserror::Error;
@@ -127,6 +127,7 @@ pub struct SpiFlash {
     pub sfdp: Option<Sfdp>,
     pub read_type: ReadTypes,
     pub erase: Vec<SectorErase>,
+    pub program_ff_optimization: bool,
 }
 
 impl Default for SpiFlash {
@@ -144,6 +145,7 @@ impl Default for SpiFlash {
                 opcode: SpiFlash::SECTOR_ERASE,
                 time: None,
             }],
+            program_ff_optimization: true,
         }
     }
 }
@@ -316,6 +318,7 @@ impl SpiFlash {
             sfdp: Some(sfdp),
             read_type,
             erase,
+            program_ff_optimization: true,
         }
     }
 
@@ -507,7 +510,7 @@ impl SpiFlash {
             let chunk_end = chunk_start + chunk_size;
             let chunk = &buffer[chunk_start..chunk_end];
             // Skip this chunk if all bytes are 0xff.
-            if !chunk.iter().all(|&x| x == 0xff) {
+            if !self.program_ff_optimization || !chunk.iter().all(|&x| x == 0xff) {
                 spi.run_eeprom_transactions(&mut [
                     Transaction::Command(MODE_111.cmd(SpiFlash::WRITE_ENABLE)),
                     Transaction::Write(
diff --git a/sw/host/opentitanlib/src/spiflash/sfdp.rs b/sw/host/opentitanlib/src/spiflash/sfdp.rs
index 507521068cb3b..29804a6517fda 100644
--- a/sw/host/opentitanlib/src/spiflash/sfdp.rs
+++ b/sw/host/opentitanlib/src/spiflash/sfdp.rs
@@ -609,11 +609,7 @@ impl JedecParams {
     ];
 
     fn pow2_size(shift: u8) -> u32 {
-        if shift == 0 {
-            0
-        } else {
-            1u32 << shift
-        }
+        if shift == 0 { 0 } else { 1u32 << shift }
     }
 }
 
@@ -869,6 +865,40 @@ impl TryFrom<&[u8]> for JedecParams {
     }
 }
 
+#[derive(Default, Debug, Clone, Serialize)]
+pub struct Sdfu {
+    pub tag: u32,
+    pub length: u16,
+    pub major: u8,
+    pub minor: u8,
+    pub mailbox_address: u32,
+    pub mailbox_size: u16,
+    pub dfu_size: u16,
+}
+
+impl TryFrom<&[u8]> for Sdfu {
+    type Error = Error;
+    fn try_from(buf: &[u8]) -> Result<Self, Self::Error> {
+        const SDFU_TAG: u32 = 0x55464453;
+        log::info!("sdfu from {buf:x?}");
+
+        let mut reader = std::io::Cursor::new(buf);
+        let header = Sdfu {
+            tag: reader.read_u32::<LittleEndian>()?,
+            length: reader.read_u16::<LittleEndian>()?,
+            major: reader.read_u8()?,
+            minor: reader.read_u8()?,
+            mailbox_address: reader.read_u32::<LittleEndian>()?,
+            mailbox_size: reader.read_u16::<LittleEndian>()?,
+            dfu_size: reader.read_u16::<LittleEndian>()?,
+        };
+        match header.tag {
+            SDFU_TAG => Ok(header),
+            v => Err(Error::WrongHeaderSignature(v)),
+        }
+    }
+}
+
 /// An `UnknownParams` structure represents SFDP parameter tables for which
 /// we don't have a specialized parser.
 #[derive(Debug, Serialize)]
@@ -892,10 +922,13 @@ pub struct Sfdp {
     pub header: SfdpHeader,
     pub phdr: Vec<SfdpPhdr>,
     pub jedec: JedecParams,
+    pub sdfu: Option<Sdfu>,
     pub params: Vec<UnknownParams>,
 }
 
 impl Sfdp {
+    const LOWRISC_JEDEC_ID: u8 = 0xEF;
+
     /// Given an initial SFDP buffer calculate the number of bytes needed for
     /// the entire SFDP.
     pub fn length_required(buf: &[u8]) -> Result<usize, Error> {
@@ -944,19 +977,26 @@ impl TryFrom<&[u8]> for Sfdp {
         let jedec =
             JedecParams::try_from(buf.get(start..end).ok_or(Error::SliceRange(start, end))?)?;
 
+        let mut sdfu: Option<Sdfu> = None;
         let mut params = Vec::new();
         for ph in phdr.iter().take((header.nph as usize) + 1).skip(1) {
             let start = ph.offset as usize;
             let end = start + ph.dwords as usize * 4;
-            params.push(UnknownParams::try_from(
-                buf.get(start..end).ok_or(Error::SliceRange(start, end))?,
-            )?);
+            let data = buf.get(start..end).ok_or(Error::SliceRange(start, end))?;
+            if ph.id == Self::LOWRISC_JEDEC_ID {
+                if let Ok(s) = Sdfu::try_from(data) {
+                    sdfu = Some(s);
+                    continue;
+                }
+            }
+            params.push(UnknownParams::try_from(data)?);
         }
 
         Ok(Sfdp {
             header,
             phdr,
             jedec,
+            sdfu,
             params,
         })
     }
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/i2c.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/i2c.rs
index d9e97b2e81282..5d29733ea81f5 100644
--- a/sw/host/opentitanlib/src/test_utils/bitbanging/i2c.rs
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/i2c.rs
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use super::Bit;
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use arrayvec::ArrayVec;
 
 #[derive(Debug, PartialEq)]
@@ -24,16 +24,36 @@ impl Symbol {
         Ok(Self::Broken(buffer))
     }
 
+    // We must extend the transaction: in a given sample, if data is written to SDA at the same time as SCL
+    // being driven high, then physical factors e.g. capacitance can cause the SDA write to appear before
+    // the SCL, even though the order of bitbanging is reversed. This can then cause a mistaken "STOP" signal
+    // to be received. We instead run at half frequency: on one cycle write SDA, and on the next write SCL.
+    // This makes GPIO bitbanging of I2C signals reliable.
+    // Assumes that SCL is low (0) when called.
     pub fn bitbanging<const SDA: u8, const SCL: u8>(&self, samples: &mut Vec<u8>) {
         match self {
+            // Each sample is translated into 2 samples: the first changes the SDA, and
+            // the second changes the SCL, to ensure correct ordering.
             Symbol::Start => samples.extend([
+                // SDA high, SCL high
+                0x01 << SDA | 0x00 << SCL,
                 0x01 << SDA | 0x01 << SCL,
+                // SDA low, SCL high
+                0x00 << SDA | 0x01 << SCL,
+                0x00 << SDA | 0x01 << SCL,
+                // SDA low, SCL low
                 0x00 << SDA | 0x01 << SCL,
                 0x00 << SDA | 0x00 << SCL,
             ]),
             Symbol::Stop => samples.extend([
+                // SDA low, SCL low
+                0x00 << SDA | 0x00 << SCL,
+                0x00 << SDA | 0x00 << SCL,
+                // SDA low, SCL high
                 0x00 << SDA | 0x00 << SCL,
                 0x00 << SDA | 0x01 << SCL,
+                // SDA high, SCL high
+                0x01 << SDA | 0x01 << SCL,
                 0x01 << SDA | 0x01 << SCL,
             ]),
             Symbol::Byte { data, nack } => Self::bitbanging_byte::<SDA, SCL>(*data, *nack, samples),
@@ -45,6 +65,10 @@ impl Symbol {
         let data: u16 = (byte as u16) << 1u16 | nack as u16;
         samples.extend((0..9u8).rev().flat_map(|bit| {
             [
+                // Change SDA (to data), SCL high
+                ((((data >> bit) & 0x01) << SDA) | 0x00 << SCL) as u8,
+                ((((data >> bit) & 0x01) << SDA) | 0x01 << SCL) as u8,
+                // Maintain SDA, SCL low
                 ((((data >> bit) & 0x01) << SDA) | 0x01 << SCL) as u8,
                 ((((data >> bit) & 0x01) << SDA) | 0x00 << SCL) as u8,
             ]
@@ -54,6 +78,10 @@ impl Symbol {
     fn bitbanging_bits<const SDA: u8, const SCL: u8>(bits: &[Bit], samples: &mut Vec<u8>) {
         samples.extend(bits.iter().rev().flat_map(|bit| {
             [
+                // Change SDA (to data), SCL high
+                ((*bit as u8) << SDA) | 0x00 << SCL,
+                ((*bit as u8) << SDA) | 0x01 << SCL,
+                // Maintain SDA, SCL low
                 ((*bit as u8) << SDA) | 0x01 << SCL,
                 ((*bit as u8) << SDA) | 0x00 << SCL,
             ]
@@ -115,6 +143,9 @@ pub mod encoder {
 
     pub struct Encoder<const SDA: u8, const SCL: u8> {}
     impl<const SDA: u8, const SCL: u8> Encoder<SDA, SCL> {
+        // Note that this function will run I2C at half of the specified bitbanging sample frequency, because
+        // two cycles must be used per sample to ensure that changes to SDA appear before the rise of SCL,
+        // as otherwise I2C via GPIO bitbanging can be flaky.
         pub fn run(&self, transfer: &[Transfer]) -> Vec<u8> {
             let mut samples: Vec<u8> = Vec::new();
             for window in transfer.windows(2) {
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/mod.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/mod.rs
index e3bc96702481d..999b099e20312 100644
--- a/sw/host/opentitanlib/src/test_utils/bitbanging/mod.rs
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/mod.rs
@@ -3,15 +3,26 @@
 // SPDX-License-Identifier: Apache-2.0
 
 pub mod i2c;
+pub mod pwm;
 pub mod spi;
+pub mod uart;
+pub mod uart_rx_sampling;
+
+use serde::{Deserialize, Serialize};
 
 #[repr(u8)]
-#[derive(Debug, PartialEq, Clone, Copy)]
+#[derive(Debug, PartialEq, Clone, Copy, Serialize, Deserialize)]
 pub enum Bit {
     Low = 0,
     High = 1,
 }
 
+impl From<bool> for Bit {
+    fn from(val: bool) -> Self {
+        if val { Self::High } else { Self::Low }
+    }
+}
+
 impl From<u8> for Bit {
     fn from(val: u8) -> Self {
         match val {
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/pwm.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/pwm.rs
new file mode 100644
index 0000000000000..056532b3815ff
--- /dev/null
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/pwm.rs
@@ -0,0 +1,64 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use super::Bit;
+use anyhow::Result;
+
+#[derive(Clone, Debug)]
+pub struct PwmPeriod {
+    pub period: std::time::Duration,
+    pub duty_cycle: f32,
+}
+
+pub mod decoder {
+    use super::*;
+
+    #[derive(Clone, Debug)]
+    struct Sample<const PIN: u8> {
+        raw: u8,
+    }
+
+    impl<const PIN: u8> Sample<PIN> {
+        fn pin(&self) -> Bit {
+            ((self.raw >> PIN) & 0x01).into()
+        }
+    }
+
+    pub struct Decoder<const PIN: u8> {
+        pub active_level: Bit,
+        pub sampling_period: std::time::Duration,
+    }
+
+    impl<const PIN: u8> Decoder<PIN> {
+        fn decode_period<I>(&self, samples: &mut I) -> Option<PwmPeriod>
+        where
+            I: Iterator<Item = Sample<PIN>>,
+        {
+            let num_active_samples =
+                samples.position(|sample| sample.pin() != self.active_level)? + 1;
+
+            let num_inactive_samples =
+                samples.position(|sample| sample.pin() == self.active_level)? + 1;
+
+            let period = (num_active_samples + num_inactive_samples) as u32;
+            let duty_cycle = num_active_samples as f32 * 100.0 / period as f32;
+
+            Some(PwmPeriod {
+                period: period * self.sampling_period,
+                duty_cycle,
+            })
+        }
+
+        pub fn run(&mut self, samples: Vec<u8>) -> Result<Vec<PwmPeriod>> {
+            let mut samples = samples.into_iter().map(|raw| Sample::<PIN> { raw });
+            // Discard the first period because it may be distorted by initial conditions.
+            let _ = self.decode_period(&mut samples);
+            let mut pwms = Vec::new();
+            while let Some(pwm) = self.decode_period(&mut samples) {
+                pwms.push(pwm);
+            }
+            Ok(pwms)
+        }
+    }
+}
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/spi.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/spi.rs
index fc68148e47cad..0b425e9bc636f 100644
--- a/sw/host/opentitanlib/src/test_utils/bitbanging/spi.rs
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/spi.rs
@@ -3,154 +3,935 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use super::Bit;
-use anyhow::{bail, Context, Result};
+use serde::{Deserialize, Serialize};
+use std::iter::Peekable;
+use thiserror::Error;
 
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum SpiEndpoint {
+    Host,   // i.e. "Controller"
+    Device, // i.e. "Peripheral"
+}
+
+/// The SPI data mode, indicating how many data lines to use for transmission.
+#[derive(Clone, Copy, Debug, PartialEq)]
 pub enum SpiDataMode {
     Single,
     Dual,
     Quad,
 }
 
-pub mod encoder {}
+/// Configuration for SPI bitbanging
+#[derive(Clone, Debug)]
+pub struct SpiBitbangConfig {
+    pub cpol: bool, // Clock polarity
+    pub cpha: bool, // Clock Phase
+    pub data_mode: SpiDataMode,
+    pub bits_per_word: u32,
+    // TODO: add DDR (Dual Data Rate) support
+}
 
-pub mod decoder {
-    use super::*;
+/// Additional delays required to synchronise with a SPI device, all
+/// measured in SPI clock cycles (2 bitbanging samples per cycle).
+#[derive(Clone, Debug)]
+pub struct SpiEncodingDelays {
+    pub inter_word_delay: u32,
+    pub cs_hold_delay: u32,
+    pub cs_release_delay: u32,
+}
+
+#[derive(Error, Debug, PartialEq, Serialize, Deserialize)]
+pub enum SpiTransferEncodeError {
+    #[error("CS must be asserted before bitbanging a SPI transaction.")]
+    CsNotAsserted,
+}
+
+/// An encoder for SPI transmissions, parameterized over bits in the output
+/// bitfields to use for transmission. Does not support encoding as a SPI
+/// device (only works as a SPI host).
+pub struct SpiBitbangEncoder<
+    const D0: u8,
+    const D1: u8,
+    const D2: u8,
+    const D3: u8,
+    const CLK: u8,
+    const CS: u8,
+> {
+    pub config: SpiBitbangConfig,
+    pub delays: SpiEncodingDelays,
+    first_word: bool,
+    cs_asserted: bool,
+}
 
-    #[derive(Clone, Debug)]
-    struct Sample<
-        const D0: u8,
-        const D1: u8,
-        const D2: u8,
-        const D3: u8,
-        const CLK: u8,
-        const CS: u8,
-    > {
-        raw: u8,
+// Bits for unused pins should not be used (high-impedance), so default to low.
+const UNUSED: Bit = Bit::Low;
+const CS_LOW: Bit = Bit::Low;
+const CS_HIGH: Bit = Bit::High;
+
+impl<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8>
+    SpiBitbangEncoder<D0, D1, D2, D3, CLK, CS>
+{
+    pub fn new(config: SpiBitbangConfig, delays: SpiEncodingDelays) -> Self {
+        Self {
+            config,
+            delays,
+            first_word: true,
+            cs_asserted: false,
+        }
     }
 
-    impl<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8>
-        Sample<D0, D1, D2, D3, CLK, CS>
-    {
-        fn d0(&self) -> Bit {
-            ((self.raw >> D0) & 0x01).into()
+    // Reset the state of the SPI bitbanging encoder.
+    pub fn reset(&mut self) {
+        self.first_word = true;
+        self.cs_asserted = false;
+    }
+
+    // A helper to change the data mode that is used for encoding.
+    pub fn set_data_mode(&mut self, mode: SpiDataMode) {
+        self.config.data_mode = mode;
+    }
+
+    /// Construct a sample bitmap for a set of values on SPI pins
+    fn sample(&self, d0: Bit, d1: Bit, d2: Bit, d3: Bit, clk: Bit, cs: Bit) -> u8 {
+        ((d0 as u8) << D0)
+            | ((d1 as u8) << D1)
+            | ((d2 as u8) << D2)
+            | ((d3 as u8) << D3)
+            | ((clk as u8) << CLK)
+            | ((cs as u8) << CS)
+    }
+
+    /// Encode up to 4 data bits into 2 bitbanging samples corresponding to 1 SPI clock
+    fn encode_data(&self, d0: Bit, d1: Bit, d2: Bit, d3: Bit, samples: &mut Vec<u8>) {
+        let clk_idle = Bit::from(self.config.cpol);
+        let clk_active = Bit::from(!self.config.cpol);
+        samples.extend(if self.config.cpha {
+            // CPHA=1, so output bits on (idle->active) edges
+            [
+                self.sample(d0, d1, d2, d3, clk_active, CS_LOW),
+                self.sample(d0, d1, d2, d3, clk_idle, CS_LOW),
+            ]
+        } else {
+            // CPHA=0, so output bits on (active->idle) edges
+            [
+                self.sample(d0, d1, d2, d3, clk_idle, CS_LOW),
+                self.sample(d0, d1, d2, d3, clk_active, CS_LOW),
+            ]
+        })
+    }
+
+    /// Encode 1 SPI word into bitbanging samples. This does not handle
+    /// additional logic for wait times and CPHA that must be considered
+    /// with the first word.
+    fn encode_word(
+        &mut self,
+        words: &[u8],
+        samples: &mut Vec<u8>,
+    ) -> Result<(), SpiTransferEncodeError> {
+        if !self.cs_asserted {
+            return Err(SpiTransferEncodeError::CsNotAsserted);
         }
-        fn d1(&self) -> Bit {
-            ((self.raw >> D1) & 0x01).into()
+        if self.first_word {
+            self.first_word = false;
         }
-        fn d2(&self) -> Bit {
-            ((self.raw >> D2) & 0x01).into()
+        let mut byte = 0x00u8;
+        let mut encoded_bits = 0u32; // Count of bits in the current word
+        let mut words = words.iter();
+        while encoded_bits < self.config.bits_per_word {
+            let bits = encoded_bits % 8;
+            if bits == 0 {
+                if let Some(&next_byte) = words.next() {
+                    byte = next_byte;
+                } else {
+                    break;
+                }
+            }
+            match self.config.data_mode {
+                SpiDataMode::Single => {
+                    let d0 = Bit::from((byte >> (7 - bits)) & 0x01);
+                    self.encode_data(d0, UNUSED, UNUSED, UNUSED, samples);
+                    encoded_bits += 1;
+                }
+                SpiDataMode::Dual => {
+                    let d1 = Bit::from((byte >> (7 - bits)) & 0x01);
+                    let d0 = Bit::from((byte >> (7 - (bits + 1))) & 0x01);
+                    self.encode_data(d0, d1, UNUSED, UNUSED, samples);
+                    encoded_bits += 2;
+                }
+                SpiDataMode::Quad => {
+                    let d3 = Bit::from((byte >> (7 - bits)) & 0x01);
+                    let d2 = Bit::from((byte >> (7 - (bits + 1))) & 0x01);
+                    let d1 = Bit::from((byte >> (7 - (bits + 2))) & 0x01);
+                    let d0 = Bit::from((byte >> (7 - (bits + 3))) & 0x01);
+                    self.encode_data(d0, d1, d2, d3, samples);
+                    encoded_bits += 4;
+                }
+            }
         }
-        fn d3(&self) -> Bit {
-            ((self.raw >> D3) & 0x01).into()
+
+        // If not enough data is given, pad with 0s until it fits.
+        while encoded_bits != 0 && encoded_bits < self.config.bits_per_word {
+            match self.config.data_mode {
+                SpiDataMode::Single => {
+                    self.encode_data(Bit::Low, UNUSED, UNUSED, UNUSED, samples);
+                    encoded_bits += 1;
+                }
+                SpiDataMode::Dual => {
+                    self.encode_data(Bit::Low, Bit::Low, UNUSED, UNUSED, samples);
+                    encoded_bits += 2;
+                }
+                SpiDataMode::Quad => {
+                    self.encode_data(Bit::Low, Bit::Low, Bit::Low, Bit::Low, samples);
+                    encoded_bits += 4;
+                }
+            }
         }
-        fn clk(&self) -> Bit {
-            ((self.raw >> CLK) & 0x01).into()
+        Ok(())
+    }
+
+    /// Encode a sequence of SPI words into GPIO bitbanging samples.
+    fn encode_words(
+        &mut self,
+        words: &[u8],
+        samples: &mut Vec<u8>,
+    ) -> Result<(), SpiTransferEncodeError> {
+        // Keep encoding words in the data while more exist
+        let clk_idle = Bit::from(self.config.cpol);
+        let bytes_per_word = self.config.bits_per_word.div_ceil(8) as usize;
+        for word in words.chunks(bytes_per_word) {
+            if !self.first_word {
+                // Optional delays between words
+                for _ in 0..(self.delays.inter_word_delay * 2) {
+                    samples.push(self.sample(UNUSED, UNUSED, UNUSED, UNUSED, clk_idle, CS_LOW))
+                }
+            }
+            self.encode_word(word, samples)?;
         }
-        fn cs(&self) -> Bit {
-            ((self.raw >> CS) & 0x01).into()
+        Ok(())
+    }
+
+    /// Output GPIO bitbanging samples for pulling CS low/high (active/inactive).
+    pub fn assert_cs(&mut self, assert: bool, samples: &mut Vec<u8>) {
+        if (assert && self.cs_asserted) || (!assert && !self.cs_asserted) {
+            return;
+        }
+        self.cs_asserted = assert;
+        let clk_idle = Bit::from(self.config.cpol);
+        let cs_low = self.sample(UNUSED, UNUSED, UNUSED, UNUSED, clk_idle, CS_LOW);
+        if assert {
+            // If CPHA=0, we omit the initial CS low sample here as that is
+            // combined with the first data write.
+            let wait_samples = match self.config.cpha {
+                true => self.delays.cs_hold_delay * 2 + 1,
+                false => self.delays.cs_hold_delay * 2,
+            };
+            for _ in 0..wait_samples {
+                samples.push(cs_low);
+            }
+            self.first_word = true;
+        } else {
+            // If CPHA=0, we must do a final transition of CLK back to idle before
+            // we de-assert the CS (not accounting for release delays).
+            let wait_samples = match self.config.cpha {
+                true => self.delays.cs_release_delay * 2,
+                false => self.delays.cs_release_delay * 2 + 1,
+            };
+            for _ in 0..wait_samples {
+                samples.push(cs_low);
+            }
+            samples.push(self.sample(UNUSED, UNUSED, UNUSED, UNUSED, clk_idle, CS_HIGH));
         }
     }
 
-    pub struct Decoder<
-        const D0: u8,
-        const D1: u8,
-        const D2: u8,
-        const D3: u8,
-        const CLK: u8,
-        const CS: u8,
-    > {
-        pub cpol: bool,
-        pub cpha: bool,
-        pub data_mode: SpiDataMode,
+    /// Encode a read transmission of several SPI words into GPIO bitbanging samples.
+    /// CS should already be asserted via `assert_cs` before calling.
+    pub fn encode_read(
+        &mut self,
+        words: usize,
+        samples: &mut Vec<u8>,
+    ) -> Result<(), SpiTransferEncodeError> {
+        self.encode_words(&vec![0; words], samples)
     }
 
-    impl<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8>
-        Decoder<D0, D1, D2, D3, CLK, CS>
+    /// Encode a write transmission of several SPI words into GPIO bitbanging samples.
+    /// CS should already be asserted via `assert_cs` before calling.
+    pub fn encode_write(
+        &mut self,
+        data: &[u8],
+        samples: &mut Vec<u8>,
+    ) -> Result<(), SpiTransferEncodeError> {
+        self.encode_words(data, samples)
+    }
+
+    /// A helper function to encode a full SPI transmission, including logic for
+    /// asserting and later de-asserting the CS.
+    pub fn encode_transaction(
+        &mut self,
+        data: &[u8],
+        samples: &mut Vec<u8>,
+    ) -> Result<(), SpiTransferEncodeError> {
+        self.assert_cs(true, samples);
+        self.encode_words(data, samples)?;
+        self.assert_cs(false, samples);
+        Ok(())
+    }
+}
+
+/// A sample of SPI pins at a given instant. The const generics should all be
+/// different bit indexes to refer to different pins.
+#[derive(Clone, Debug)]
+struct Sample<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8> {
+    raw: u8,
+}
+
+impl<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8>
+    Sample<D0, D1, D2, D3, CLK, CS>
+{
+    fn d0(&self) -> Bit {
+        ((self.raw >> D0) & 0x01).into()
+    }
+    fn d1(&self) -> Bit {
+        ((self.raw >> D1) & 0x01).into()
+    }
+    fn d2(&self) -> Bit {
+        ((self.raw >> D2) & 0x01).into()
+    }
+    fn d3(&self) -> Bit {
+        ((self.raw >> D3) & 0x01).into()
+    }
+    fn clk(&self) -> Bit {
+        ((self.raw >> CLK) & 0x01).into()
+    }
+    fn cs(&self) -> Bit {
+        ((self.raw >> CS) & 0x01).into()
+    }
+}
+
+#[derive(Error, Debug, PartialEq, Serialize, Deserialize)]
+pub enum SpiTransferDecodeError {
+    #[error("Settings mismatch: Clock level when idle is {0:?}, but cpol expects {1:?}")]
+    ClockPolarityMismatch(Bit, Bit),
+    #[error("Chip select was de-asserted while a SPI transaction was in progress")]
+    ChipSelectDeassertedEarly,
+    #[error("Not enough samples were given to complete the SPI transaction")]
+    UnfinishedTransaction,
+}
+
+/// A decoder for SPI transmissions, parameterized over bits in input sample
+/// bitfields of SPI transmissions.
+pub struct SpiBitbangDecoder<
+    const D0: u8,
+    const D1: u8,
+    const D2: u8,
+    const D3: u8,
+    const CLK: u8,
+    const CS: u8,
+> {
+    pub config: SpiBitbangConfig,
+    pub endpoint: SpiEndpoint,
+}
+
+impl<const D0: u8, const D1: u8, const D2: u8, const D3: u8, const CLK: u8, const CS: u8>
+    SpiBitbangDecoder<D0, D1, D2, D3, CLK, CS>
+{
+    pub fn new(config: SpiBitbangConfig, endpoint: SpiEndpoint) -> Self {
+        Self { config, endpoint }
+    }
+
+    pub fn set_data_mode(&mut self, mode: SpiDataMode) {
+        self.config.data_mode = mode;
+    }
+
+    /// Iterate through samples until a low (active) CS level is found. Then, check
+    /// the clock level based on CPOL config. Returns `true` if a low CS was found.
+    fn wait_cs<I>(&self, samples: &mut Peekable<I>) -> Result<bool, SpiTransferDecodeError>
+    where
+        I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
     {
-        /// Loop sampling the cs until a low level is detected. Then the clock level is checked
-        /// for correctness based on the cpol configuration.
-        fn wait_cs<I>(&self, samples: &mut I) -> Result<()>
-        where
-            I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
-        {
-            let clk_idle_level = if self.cpol { Bit::High } else { Bit::Low };
-
-            let sample = samples
-                .by_ref()
-                .find(|sample| sample.cs() == Bit::Low)
-                .expect("Exhausted the samples");
-            if sample.clk() == clk_idle_level {
-                Ok(())
+        let samples = samples.by_ref();
+        let clk_idle_level = Bit::from(self.config.cpol);
+        while let Some(sample) = samples.peek() {
+            if sample.cs() != Bit::Low {
+                samples.next();
+                continue;
+            }
+            return if sample.clk() == clk_idle_level {
+                Ok(true)
             } else {
-                bail!(
-                    "Settings mismatch: Clock level when idle is {:?}, but cpol is {:?}",
+                Err(SpiTransferDecodeError::ClockPolarityMismatch(
                     sample.clk(),
-                    self.cpol
-                )
+                    clk_idle_level,
+                ))
+            };
+        }
+        Ok(false)
+    }
+
+    /// Get the sample corresponding to the next data bit, directly after an edge
+    /// that depends on CPOL/CPHA configuration. Set `first_edge=true` to indicate
+    /// that this is the first edge sampled of this SPI word transmission.
+    fn sample_on_edge<I>(
+        &self,
+        samples: &mut I,
+        first_edge: bool,
+    ) -> Result<Option<Sample<D0, D1, D2, D3, CLK, CS>>, SpiTransferDecodeError>
+    where
+        I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
+    {
+        let (wait_level, sample_level) = if self.config.cpol == self.config.cpha {
+            (Bit::Low, Bit::High)
+        } else {
+            (Bit::High, Bit::Low)
+        };
+        let mut last_sample = None;
+        for level in [wait_level, sample_level] {
+            let Some(sample) = samples
+                .by_ref()
+                .find(|sample| sample.clk() == level || sample.cs() == Bit::High)
+            else {
+                if !first_edge {
+                    return Err(SpiTransferDecodeError::UnfinishedTransaction);
+                }
+                return Ok(None);
+            };
+            if sample.cs() == Bit::High {
+                if !first_edge {
+                    return Err(SpiTransferDecodeError::ChipSelectDeassertedEarly);
+                }
+                return Ok(None);
             }
+            last_sample = Some(sample);
         }
-        /// Returns a sample when a raise or fall clock edge is detected depending on the cpol and cpha configuration.
-        fn sample_on_edge<I>(&self, samples: &mut I) -> Option<Sample<D0, D1, D2, D3, CLK, CS>>
-        where
-            I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
-        {
-            let (sample_level, wait_level) = if self.cpol == self.cpha {
-                (Bit::High, Bit::Low)
-            } else {
-                (Bit::Low, Bit::High)
+        Ok(last_sample)
+    }
+
+    /// Decode a SPI word from some input GPIO samples. Returns an error if CS
+    /// is deasserted early or the samples are unfinished.
+    fn decode_word<I>(&self, samples: &mut I) -> Result<Vec<u8>, SpiTransferDecodeError>
+    where
+        I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
+    {
+        let bytes_per_word = self.config.bits_per_word.div_ceil(8) as usize;
+        let mut byte: u8 = 0x00;
+        let mut decoded_bits = 0u32;
+        let mut word: Vec<u8> = Vec::with_capacity(bytes_per_word);
+        while decoded_bits < self.config.bits_per_word {
+            let Some(sample) = self.sample_on_edge(samples, decoded_bits == 0)? else {
+                break;
+            };
+            match self.config.data_mode {
+                SpiDataMode::Single => {
+                    byte <<= 1;
+                    // In single reads, devices read from COPI whilst hosts read from CIPO.
+                    byte |= match self.endpoint {
+                        SpiEndpoint::Device => sample.d0() as u8,
+                        SpiEndpoint::Host => sample.d1() as u8,
+                    };
+                    decoded_bits += 1;
+                }
+                SpiDataMode::Dual => {
+                    byte <<= 1;
+                    byte |= sample.d1() as u8;
+                    byte <<= 1;
+                    byte |= sample.d0() as u8;
+                    decoded_bits += 2;
+                }
+                SpiDataMode::Quad => {
+                    byte <<= 1;
+                    byte |= sample.d3() as u8;
+                    byte <<= 1;
+                    byte |= sample.d2() as u8;
+                    byte <<= 1;
+                    byte |= sample.d1() as u8;
+                    byte <<= 1;
+                    byte |= sample.d0() as u8;
+                    decoded_bits += 4;
+                }
+            }
+            if decoded_bits % 8 == 0 {
+                word.push(byte);
+                byte = 0x00;
+            }
+        }
+        if decoded_bits % 8 != 0 {
+            // For < 8 bits per word, we shift partial data back into the MSBs
+            byte <<= 8 - (decoded_bits % 8);
+            word.push(byte);
+        }
+        Ok(word)
+    }
+
+    /// Decode a full SPI transmission from input GPIO samples, which may contain many
+    /// SPI words. Expects CS to be deasserted by the end of all transactions.
+    /// Returns the SPI words as a vector of bytes, using the LSBs for partial bytes
+    /// (e.g. for 12-bit words, the mask is [0xFF, 0X0F, ...]).
+    pub fn run(&self, samples: Vec<u8>) -> Result<Vec<u8>, SpiTransferDecodeError> {
+        let mut samples = samples
+            .into_iter()
+            .map(|raw| Sample::<D0, D1, D2, D3, CLK, CS> { raw })
+            .peekable();
+        let mut bytes = Vec::new();
+        if !self.wait_cs(&mut samples)? {
+            return Ok(bytes);
+        }
+        loop {
+            let word = self.decode_word(&mut samples)?;
+            if word.is_empty() && !self.wait_cs(&mut samples)? {
+                break;
+            }
+            bytes.extend(word);
+        }
+        Ok(bytes)
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+    use anyhow::Result;
+    use std::cmp::Ordering;
+
+    fn spi_encode_decode(
+        config: SpiBitbangConfig,
+        delays: SpiEncodingDelays,
+        data: Option<&[u8]>,
+    ) -> Result<()> {
+        let bytes_per_word = config.bits_per_word.div_ceil(8) as usize;
+        let mut encoder = SpiBitbangEncoder::<0, 1, 2, 3, 4, 5>::new(config.clone(), delays);
+        let decoder =
+            SpiBitbangDecoder::<0, 1, 2, 3, 4, 5>::new(config.clone(), SpiEndpoint::Device);
+        let mut data = Vec::from(data.unwrap_or(b"Hello, this is a simple SPI test message."));
+        while data.len() % bytes_per_word != 0 {
+            data.push(0);
+        }
+        let mut samples = Vec::new();
+        encoder.encode_transaction(&data, &mut samples)?;
+        assert!(!samples.is_empty());
+        let decoded = decoder
+            .run(samples)
+            .expect("Should have decoded the bitbanged message");
+        assert_eq!(decoded, data);
+        Ok(())
+    }
+
+    #[test]
+    fn smoke() -> Result<()> {
+        // Encode and decode some test strings
+        let config = SpiBitbangConfig {
+            cpol: false,
+            cpha: false,
+            data_mode: SpiDataMode::Single,
+            bits_per_word: 8,
+        };
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 1,
+            cs_release_delay: 1,
+        };
+        spi_encode_decode(config.clone(), delays.clone(), None)?;
+        spi_encode_decode(config.clone(), delays.clone(), Some(b"abc def GHI JKL"))?;
+        spi_encode_decode(config.clone(), delays.clone(), Some(b"12345678"))?;
+
+        // Check bitbang encoding against a known sample.
+        let mut encoder = SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(config, delays);
+        let bytes = [0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF];
+        let mut samples = Vec::new();
+        encoder.encode_transaction(&bytes, &mut samples)?;
+        let expected = [
+            0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 0, 1, 0, 1, 0,
+            1, 4, 5, 4, 5, 0, 1, 4, 5, 0, 1, 0, 1, 0, 1, 4, 5, 0, 1, 4, 5, 0, 1, 4, 5, 4, 5, 0, 1,
+            0, 1, 4, 5, 4, 5, 4, 5, 4, 5, 0, 1, 0, 1, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 4, 5, 0, 1, 4,
+            5, 0, 1, 4, 5, 0, 1, 4, 5, 4, 5, 4, 5, 4, 5, 0, 1, 0, 1, 4, 5, 4, 5, 0, 1, 4, 5, 4, 5,
+            4, 5, 4, 5, 0, 1, 4, 5, 4, 5, 4, 5, 4, 5, 0, 0, 0, 2,
+        ];
+        assert_eq!(samples, expected);
+        Ok(())
+    }
+
+    #[test]
+    fn communication_modes() -> Result<()> {
+        // Test encoding/decoding all possible modes both with and without
+        // additional CS delays on either end, and between words.
+        for config_bitmap in 0..32 {
+            let config = SpiBitbangConfig {
+                cpol: config_bitmap & 0x01 > 0,
+                cpha: (config_bitmap >> 1) & 0x01 > 0,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 8,
+            };
+            let delays = SpiEncodingDelays {
+                inter_word_delay: (config_bitmap >> 2) & 0x01,
+                cs_hold_delay: (config_bitmap >> 3) & 0x01,
+                cs_release_delay: (config_bitmap >> 4) & 0x01,
             };
-            samples.by_ref().find(|sample| sample.clk() == wait_level);
-            samples.by_ref().find(|sample| sample.clk() == sample_level)
-        }
-
-        fn decode_byte<I>(&self, samples: &mut I) -> Result<u8>
-        where
-            I: Iterator<Item = Sample<D0, D1, D2, D3, CLK, CS>>,
-        {
-            let mut byte = 0u16;
-            let mut bits = 8;
-            while bits > 0 {
-                let sample = self.sample_on_edge(samples).context("Run out of samples")?;
-                match self.data_mode {
-                    SpiDataMode::Single => {
-                        byte <<= 1;
-                        byte |= sample.d0() as u16;
-                        bits -= 1;
+            spi_encode_decode(config.clone(), delays.clone(), None)?;
+            spi_encode_decode(config, delays, Some(b"communication mode test message"))?;
+        }
+
+        // Use small transfers to test that the output matches what we expect.
+        let tests = [
+            // CPOL=0,CPHA=0 so bit #1 is output with CS low on idle (low) clock in 1st sample
+            ((false, false), vec![4, 5, 0, 1]),
+            // CPOL=0,CPHA=1 so bit #1 is output with active (high) clock in 2nd sample
+            ((false, true), vec![0, 5, 4, 1]),
+            // CPOL=1,CPHA=0 so bit #1 is output with CS low on idle (high) clock in 1st sample
+            ((true, false), vec![5, 4, 1, 0]),
+            // CPOL=1,CPHA=1 so bit #1 is output with active (low) clock in 2nd sample
+            ((true, true), vec![1, 4, 5, 0]),
+        ];
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 0,
+            cs_release_delay: 0,
+        };
+        for ((cpol, cpha), expected) in tests {
+            let config = SpiBitbangConfig {
+                cpol,
+                cpha,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 8,
+            };
+            let mut samples = Vec::new();
+            SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(config, delays.clone())
+                .encode_transaction(&[0xA5], &mut samples)?;
+            assert_eq!(samples[..4], expected);
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn data_modes() -> Result<()> {
+        // Test encoding/decoding for each data channel mode.
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 1,
+            cs_release_delay: 1,
+        };
+        for data_mode in [SpiDataMode::Single, SpiDataMode::Dual, SpiDataMode::Quad] {
+            let config = SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode,
+                bits_per_word: 8,
+            };
+            spi_encode_decode(config.clone(), delays.clone(), None)?;
+            spi_encode_decode(
+                config,
+                delays.clone(),
+                Some(b"A slightly longer message that can be used to test SPI data modes"),
+            )?;
+        }
+
+        // Check that the number of transfers is being appropriately decreased.
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 0,
+            cs_release_delay: 0,
+        };
+        let tests = [
+            // (64 bits * 2 half clks) + 1 half clk to return to idle + 1 sample for CS high
+            (SpiDataMode::Single, 64 * 2 + 2),
+            (SpiDataMode::Dual, (64 / 2) * 2 + 2),
+            (SpiDataMode::Quad, (64 / 4) * 2 + 2),
+        ];
+        for (data_mode, expected_half_clocks) in tests {
+            let config = SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode,
+                bits_per_word: 8,
+            };
+            let mut samples = Vec::new();
+            SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(config, delays.clone()).encode_transaction(
+                &[0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF],
+                &mut samples,
+            )?;
+            assert_eq!(samples.len(), expected_half_clocks);
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn bits_per_word() -> Result<()> {
+        // Test encoding/decoding for a variety of bits per SPI word.
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 1,
+            cs_release_delay: 1,
+        };
+        for bits_per_word in 1..=64 {
+            let config = SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode: SpiDataMode::Single,
+                bits_per_word,
+            };
+            // Use a message with [0, 1, 2, ..., 63] bitwise reversed into the MSBs, but for
+            // each test we first mask the data so that the unused ending LSBs are zeroed for
+            // non-byte-divisible word sizes, to allow comparison of decoded results.
+            let mut bytes = (0..64).map(|b: u8| b.reverse_bits()).collect::<Vec<u8>>();
+            let mut bits_in_current_word = 0;
+            for byte in bytes.iter_mut() {
+                let mask_size = bits_per_word - bits_in_current_word;
+                match mask_size.cmp(&8) {
+                    Ordering::Greater => {
+                        bits_in_current_word += 8;
                     }
-                    SpiDataMode::Dual => {
-                        byte <<= 1;
-                        byte |= sample.d1() as u16;
-                        byte <<= 1;
-                        byte |= sample.d0() as u16;
-                        bits -= 2;
+                    Ordering::Equal => {
+                        bits_in_current_word = 0;
                     }
-                    SpiDataMode::Quad => {
-                        byte <<= 1;
-                        byte |= sample.d3() as u16;
-                        byte <<= 1;
-                        byte |= sample.d2() as u16;
-                        byte <<= 1;
-                        byte |= sample.d1() as u16;
-                        byte <<= 1;
-                        byte |= sample.d0() as u16;
-                        bits -= 4;
+                    Ordering::Less => {
+                        let zero_mask = (0x01 << (8 - mask_size)) - 1;
+                        *byte &= !zero_mask;
+                        bits_in_current_word = 0;
                     }
                 }
             }
-
-            Ok(byte as u8)
+            spi_encode_decode(config, delays.clone(), Some(&bytes))?;
         }
+        Ok(())
+    }
 
-        pub fn run(&mut self, samples: Vec<u8>) -> Result<Vec<u8>> {
-            let mut samples = samples
-                .into_iter()
-                .map(|raw| Sample::<D0, D1, D2, D3, CLK, CS> { raw });
-            self.wait_cs(&mut samples)?;
-            let mut bytes = Vec::new();
-            while let Ok(byte) = self.decode_byte(&mut samples) {
-                bytes.push(byte);
+    #[test]
+    fn encoding_delays() -> Result<()> {
+        // Test a variety of SPI encoding delays, with delays after setting CS low,
+        // before releasing CS, and between each SPI word transfer.
+        let tests = [
+            (
+                (0, 0, 0),
+                vec![4, 5, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 0, 1, 4, 5, 0, 2],
+            ),
+            (
+                (3, 0, 0),
+                vec![
+                    4, 5, 0, 1, 4, 5, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 4, 5, 0, 1, 4, 5, 0, 2,
+                ],
+            ),
+            (
+                (0, 3, 0),
+                vec![
+                    0, 0, 0, 0, 0, 0, 4, 5, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 0, 1, 4, 5, 0, 2,
+                ],
+            ),
+            (
+                (0, 0, 3),
+                vec![
+                    4, 5, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 0, 1, 4, 5, 0, 0, 0, 0, 0, 0, 0, 2,
+                ],
+            ),
+            (
+                (1, 2, 3),
+                vec![
+                    0, 0, 0, 0, 4, 5, 0, 1, 4, 5, 0, 1, 0, 0, 0, 1, 4, 5, 0, 1, 4, 5, 0, 0, 0, 0,
+                    0, 0, 0, 2,
+                ],
+            ),
+        ];
+        for ((inter_word_delay, cs_hold_delay, cs_release_delay), expected) in tests {
+            let delays = SpiEncodingDelays {
+                inter_word_delay,
+                cs_hold_delay,
+                cs_release_delay,
+            };
+            // Run an encode/decode test with these delays for each CPHA.
+            for cpha in [false, true] {
+                let config = SpiBitbangConfig {
+                    cpol: false,
+                    cpha,
+                    data_mode: SpiDataMode::Single,
+                    bits_per_word: 8,
+                };
+                spi_encode_decode(config, delays.clone(), None)?;
             }
-            Ok(bytes)
+            let config = SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 4,
+            };
+            let mut samples = Vec::new();
+            SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(config, delays)
+                .encode_transaction(&[0xA << 4, 0x5 << 4], &mut samples)?;
+            assert_eq!(samples, expected);
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn decoding_endpoints() -> Result<()> {
+        // Test decoding as both a SPI Host and Device
+        let config = SpiBitbangConfig {
+            cpol: false,
+            cpha: false,
+            data_mode: SpiDataMode::Single,
+            bits_per_word: 8,
+        };
+        let delays = SpiEncodingDelays {
+            inter_word_delay: 0,
+            cs_hold_delay: 1,
+            cs_release_delay: 1,
+        };
+        let bytes = [0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF];
+        let mut samples = Vec::new();
+        // Encode on COPI = D0 = bit 0.
+        SpiBitbangEncoder::<0, 1, 2, 3, 4, 5>::new(config.clone(), delays.clone())
+            .encode_transaction(&bytes, &mut samples)?;
+        // Decode as a SPI Device on COPI = Bit 0
+        let decoder =
+            SpiBitbangDecoder::<0, 1, 2, 3, 4, 5>::new(config.clone(), SpiEndpoint::Device);
+        let mut decoded = decoder
+            .run(samples.clone())
+            .expect("Should have decoded the bitbanged message");
+        assert_eq!(decoded, &bytes);
+        // Decode as a SPI Host on CIPO = Bit 0
+        let decoder = SpiBitbangDecoder::<1, 0, 2, 3, 4, 5>::new(config.clone(), SpiEndpoint::Host);
+        decoded = decoder
+            .run(samples)
+            .expect("Should have decoded the bitbanged message");
+        assert_eq!(decoded, &bytes);
+        Ok(())
+    }
+
+    #[test]
+    fn encode_host_reads() -> Result<()> {
+        // Encode a SPI host read
+        let mut encoder = SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(
+            SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 8,
+            },
+            SpiEncodingDelays {
+                inter_word_delay: 0,
+                cs_hold_delay: 0,
+                cs_release_delay: 0,
+            },
+        );
+        let mut samples = Vec::new();
+        encoder.assert_cs(true, &mut samples);
+        encoder.encode_read(5, &mut samples)?;
+        encoder.assert_cs(false, &mut samples);
+        // Only expect to see clock changes with CS low, no data.
+        let mut expected = vec![0];
+        expected.append(&mut [1, 0].repeat(8 * 5)); // clock cycles
+        expected.push(2); // CS high (inactive)
+        assert_eq!(samples, expected);
+        Ok(())
+    }
+
+    #[test]
+    fn encode_cs_assertions() -> Result<()> {
+        // Test errors surrounding CS assertions
+        let mut encoder = SpiBitbangEncoder::<2, 3, 4, 5, 0, 1>::new(
+            SpiBitbangConfig {
+                cpol: false,
+                cpha: true,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 8,
+            },
+            SpiEncodingDelays {
+                inter_word_delay: 0,
+                cs_hold_delay: 0,
+                cs_release_delay: 0,
+            },
+        );
+        let mut samples = vec![];
+        // No additional samples if already de-asserted
+        encoder.assert_cs(false, &mut samples);
+        assert_eq!(samples.len(), 0);
+        // Do not allow reads/writes if de-asserted
+        assert_eq!(
+            encoder.encode_write(&[0], &mut samples),
+            Err(SpiTransferEncodeError::CsNotAsserted)
+        );
+        assert_eq!(
+            encoder.encode_read(1, &mut samples),
+            Err(SpiTransferEncodeError::CsNotAsserted)
+        );
+        assert_eq!(samples.len(), 0);
+        // Samples are encoded on a CS assertion
+        encoder.assert_cs(true, &mut samples);
+        let mut sample_len = samples.len();
+        assert!(sample_len > 0);
+        // No additional samples if already asserted
+        encoder.assert_cs(true, &mut samples);
+        assert_eq!(samples.len(), sample_len);
+        // Samples are encoded on a CS de-assertion
+        encoder.assert_cs(false, &mut samples);
+        assert!(samples.len() > sample_len);
+        sample_len = samples.len();
+        // No additional samples again if already de-asserted
+        encoder.assert_cs(false, &mut samples);
+        assert_eq!(samples.len(), sample_len);
+        Ok(())
+    }
+
+    #[test]
+    fn spi_decoding_errors() -> Result<()> {
+        // Test clock polarity mismatch errors
+        assert_eq!(
+            SpiBitbangDecoder::<2, 3, 4, 5, 0, 1>::new(
+                SpiBitbangConfig {
+                    cpol: false,
+                    cpha: false,
+                    data_mode: SpiDataMode::Single,
+                    bits_per_word: 2,
+                },
+                SpiEndpoint::Device
+            )
+            .run(vec![3, 1, 0, 1, 0, 1, 0, 2]),
+            Err(SpiTransferDecodeError::ClockPolarityMismatch(
+                Bit::High,
+                Bit::Low
+            ))
+        );
+        assert_eq!(
+            SpiBitbangDecoder::<2, 3, 4, 5, 0, 1>::new(
+                SpiBitbangConfig {
+                    cpol: true,
+                    cpha: false,
+                    data_mode: SpiDataMode::Single,
+                    bits_per_word: 2,
+                },
+                SpiEndpoint::Device
+            )
+            .run(vec![2, 0, 1, 0, 1, 0, 1, 3]),
+            Err(SpiTransferDecodeError::ClockPolarityMismatch(
+                Bit::Low,
+                Bit::High
+            ))
+        );
+        // Test for errors when de-asserting the CS early at any point
+        // before a word transfer is finished.
+        let valid_samples = vec![4, 5, 0, 1, 4, 5, 0, 1, 0, 1, 4, 5, 0, 1, 4, 5, 0, 2];
+        let decoder = SpiBitbangDecoder::<2, 3, 4, 5, 0, 1>::new(
+            SpiBitbangConfig {
+                cpol: false,
+                cpha: false,
+                data_mode: SpiDataMode::Single,
+                bits_per_word: 8,
+            },
+            SpiEndpoint::Device,
+        );
+        assert!(decoder.run(valid_samples.clone()).is_ok());
+        for index in 1..(valid_samples.len() - 2) {
+            let mut invalid_samples = valid_samples.clone();
+            invalid_samples[index] |= 0x01 << 1;
+            assert_eq!(
+                decoder.run(invalid_samples),
+                Err(SpiTransferDecodeError::ChipSelectDeassertedEarly)
+            );
+        }
+        // Test errors with unfinished transactions.
+        for index in 2..(valid_samples.len() - 2) {
+            let mut invalid_samples = valid_samples.clone();
+            invalid_samples.truncate(index);
+            assert_eq!(
+                decoder.run(invalid_samples),
+                Err(SpiTransferDecodeError::UnfinishedTransaction)
+            )
         }
+        Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/uart.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/uart.rs
new file mode 100644
index 0000000000000..0812412c07913
--- /dev/null
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/uart.rs
@@ -0,0 +1,625 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail};
+use serde::{Deserialize, Serialize};
+use serialport::Parity;
+use thiserror::Error;
+
+// The number of stop bits used for UART bitbanging.
+#[derive(Clone, Copy, Debug, PartialEq)]
+pub enum UartStopBits {
+    Stop1,
+    Stop1_5,
+    Stop2,
+}
+
+/// UART frame configuration to use for UART bitbanging. Assumes LSB first.
+#[derive(Clone, Debug)]
+pub struct UartBitbangConfig {
+    pub data_bits: u8,           // Assumes <= 8 data bits
+    pub stop_bits: UartStopBits, // 1.5 bits is not currently supported
+    // The number of character cycles for which RX is held low during
+    // transmission of a break character
+    pub break_char_cycles: u8,
+    pub parity: Parity,
+}
+
+impl UartBitbangConfig {
+    pub fn new(
+        data_bits: u8,
+        stop_bits: UartStopBits,
+        break_char_cycles: u8,
+        parity: Parity,
+    ) -> Result<UartBitbangConfig> {
+        if !(5..=8).contains(&data_bits) {
+            bail!("UART bitbanging only supports between 5 and 8 bit data.");
+        }
+        if stop_bits == UartStopBits::Stop1_5 {
+            bail!("UART bitbanging only supports 1 or 2 stop bits.");
+        }
+        Ok(Self {
+            data_bits,
+            stop_bits,
+            break_char_cycles,
+            parity,
+        })
+    }
+
+    // The number of cycles to hold high for stop bits
+    fn stop_bit_time(&self) -> u8 {
+        match self.stop_bits {
+            UartStopBits::Stop1 => 1,
+            _ => 2,
+        }
+    }
+
+    /// The amount of samples (bit transmissions) in one frame.
+    pub fn bit_time_per_frame(&self) -> u32 {
+        let start_bit = 1;
+        let parity_bits = (self.parity != Parity::None) as u8;
+        let stop_bits = self.stop_bit_time();
+        (start_bit + self.data_bits + parity_bits + stop_bits).into()
+    }
+
+    /// For a break, hold logic low for (frame bit time) * break cycles
+    pub fn break_bit_time(&self) -> u32 {
+        self.bit_time_per_frame() * self.break_char_cycles as u32
+    }
+}
+
+/// Count the number of 1s in the data (& an optional parity bit).
+/// Return `true` if there is an even number of 1s, and `false` otherwise.
+#[inline]
+pub fn compute_parity(data: u8, parity_bit: Option<bool>) -> bool {
+    let data_parity = (data.count_ones() % 2) != 0;
+    if let Some(bit) = parity_bit {
+        data_parity ^ bit
+    } else {
+        data_parity
+    }
+}
+
+#[derive(Debug, PartialEq)]
+pub enum UartTransfer {
+    // Assumes <= 8 data bits.
+    Byte {
+        data: u8,
+    },
+    Broken {
+        data: u8,
+        parity: Option<bool>,
+        error: UartTransferDecodeError,
+    },
+    Break,
+}
+
+/// An encoder for creating UART bitbanging samples for transmission. `TX` is
+/// the bit in the output sample bitfield to use for TX transmissions.
+pub struct UartBitbangEncoder {
+    pub config: UartBitbangConfig,
+}
+
+impl UartBitbangEncoder {
+    pub fn new(config: UartBitbangConfig) -> Self {
+        Self { config }
+    }
+
+    /// Encode the transmission of a UART break condition into a bitbanging
+    /// sample, to be used on the TX pin.
+    pub fn encode_break(&self, samples: &mut Vec<u8>) {
+        let break_bits = self.config.break_bit_time() as usize;
+        let stop_bits = self.config.stop_bit_time() as usize;
+        samples.extend(std::iter::repeat(0x00).take(break_bits));
+        samples.extend(std::iter::repeat(0x01).take(stop_bits));
+    }
+
+    /// Encode the transmission of a character into UART bitbanging samples, to
+    /// be used on the TX pin. When configured to use X data bits, only the X
+    // LSBs of `data` will be used.
+    pub fn encode_character(&self, data: u8, samples: &mut Vec<u8>) {
+        samples.reserve(self.config.bit_time_per_frame() as usize);
+        // Start bit
+        samples.push(0x00);
+        // Data bits
+        for bit_index in 0..self.config.data_bits {
+            let bit = (data >> bit_index) & 0x01;
+            samples.push(bit);
+        }
+        // Parity bit (if applicable)
+        let parity = compute_parity(data, None);
+        match self.config.parity {
+            Parity::Even => samples.push(parity as u8),
+            Parity::Odd => samples.push(!parity as u8),
+            Parity::None => (),
+        }
+        // Stop bits
+        for _ in 0..self.config.stop_bit_time() {
+            samples.push(0x01);
+        }
+    }
+
+    /// Helper function to encode multiple characters into UART bitbanging
+    /// samples in one call.
+    pub fn encode_characters(&self, chars: &[u8], samples: &mut Vec<u8>) {
+        for char in chars {
+            self.encode_character(*char, samples);
+        }
+    }
+
+    /// Encode a UART transmission (data / break) into UART bitbanging samples,
+    // to be used on the TX pin.
+    pub fn encode_transfer(&self, transfer: &UartTransfer, samples: &mut Vec<u8>) -> Result<()> {
+        match *transfer {
+            UartTransfer::Broken { .. } => bail!("Cannot encode a broken UART transfer"),
+            UartTransfer::Break => self.encode_break(samples),
+            UartTransfer::Byte { data } => self.encode_character(data, samples),
+        }
+        Ok(())
+    }
+
+    /// Helper function to encode multiple UART transfers into UART bitbanging
+    /// samples in one call.
+    pub fn encode_transfers(
+        &self,
+        transfers: &[UartTransfer],
+        samples: &mut Vec<u8>,
+    ) -> Result<()> {
+        for transfer in transfers {
+            self.encode_transfer(transfer, samples)?;
+        }
+        Ok(())
+    }
+}
+
+#[derive(Error, Debug, PartialEq, Serialize, Deserialize)]
+pub enum UartTransferDecodeError {
+    #[error("Computed parity does not match expected parity")]
+    ParityMismatch,
+    #[error("Stop was not held high for the full stop time")]
+    InvalidStop,
+    #[error(
+        "RX held low too long for a valid transmission, but not long enough for a break condition"
+    )]
+    InvalidBreak,
+}
+
+/// Possible states for the decoder state machine to be in.
+#[derive(Debug, PartialEq)]
+enum DecodingState {
+    Idle,
+    Data {
+        data: u8, // Data encountered so far
+        bits: u8, // Number of data bits read so far
+    },
+    Parity {
+        data: u8, // Previously decoded data
+    },
+    Stop {
+        data: u8,             // Previously decoded data
+        parity: Option<bool>, // Previously decoded parity
+        stop_data: u8,        // Stop bit data encountered so far
+        stop_bits: u8,        // Number of stop bits read so far
+    },
+    Break {
+        bits: u32, // Logic low bits encountered so far
+    },
+}
+
+/// A decoder for decoding UART samples. `RX` is the bit in the input sample
+/// bitfield to use for RX transmissions.
+pub struct UartBitbangDecoder {
+    pub config: UartBitbangConfig,
+    state: DecodingState,
+}
+
+impl UartBitbangDecoder {
+    pub fn new(config: UartBitbangConfig) -> Self {
+        Self {
+            config,
+            state: DecodingState::Idle,
+        }
+    }
+
+    /// Finishes decoding a break transmission in the current UART transfer
+    fn get_decoded_break(&mut self) -> Result<UartTransfer> {
+        let DecodingState::Break { bits } = self.state else {
+            bail!("`get_decoded_break` called before decoding a break");
+        };
+        if bits < self.config.break_bit_time() {
+            let parity = if self.config.parity != Parity::None {
+                Some(false)
+            } else {
+                None
+            };
+            Ok(UartTransfer::Broken {
+                data: 0x00,
+                parity,
+                error: UartTransferDecodeError::InvalidBreak,
+            })
+        } else {
+            Ok(UartTransfer::Break)
+        }
+    }
+
+    /// Finishes decoding the current UART transfer.
+    fn get_decoded_character(&mut self) -> Result<UartTransfer> {
+        // Detect we've fully stopped, and handle invalid stop signals.
+        let DecodingState::Stop {
+            data,
+            parity,
+            stop_data,
+            stop_bits,
+        } = self.state
+        else {
+            bail!("`get_decoded_character` called before the end of a transmission");
+        };
+        if stop_bits != self.config.stop_bit_time() {
+            bail!("`get_decoded_character` called before reading all stop bits");
+        }
+        if stop_data.count_ones() as u8 != stop_bits {
+            return Ok(UartTransfer::Broken {
+                data,
+                parity,
+                error: UartTransferDecodeError::InvalidStop,
+            });
+        }
+
+        // If configured to use parity, check and report single parity errors.
+        if self.config.parity != Parity::None {
+            let decoded_parity = compute_parity(data, parity);
+            let expected_parity = self.config.parity != Parity::Even;
+            if expected_parity != decoded_parity {
+                return Ok(UartTransfer::Broken {
+                    data,
+                    parity,
+                    error: UartTransferDecodeError::ParityMismatch,
+                });
+            }
+        }
+
+        Ok(UartTransfer::Byte { data })
+    }
+
+    /// Given a sampled waveform (where bit RX is the UART RX), advance the
+    /// UART decoder state based on the contents of the sample. If the sample
+    /// is the final stop bit, return the decoded UART transfer.
+    pub fn decode_sample(&mut self, sample: u8) -> Result<Option<UartTransfer>> {
+        let rx = sample & 0x1;
+        match self.state {
+            DecodingState::Idle => {
+                if rx == 0 {
+                    self.state = DecodingState::Data {
+                        data: 0x00,
+                        bits: 0,
+                    };
+                }
+            }
+            DecodingState::Data { mut data, mut bits } => {
+                data |= rx << bits;
+                bits += 1;
+                self.state = if bits >= self.config.data_bits {
+                    if self.config.parity == Parity::None {
+                        DecodingState::Stop {
+                            data,
+                            parity: None,
+                            stop_data: 0x00,
+                            stop_bits: 0,
+                        }
+                    } else {
+                        DecodingState::Parity { data }
+                    }
+                } else {
+                    DecodingState::Data { data, bits }
+                }
+            }
+            DecodingState::Parity { data } => {
+                self.state = DecodingState::Stop {
+                    data,
+                    parity: Some(rx != 0),
+                    stop_data: 0x00,
+                    stop_bits: 0,
+                };
+            }
+            DecodingState::Stop {
+                data,
+                parity,
+                mut stop_data,
+                mut stop_bits,
+            } => {
+                stop_data |= rx << stop_bits;
+                stop_bits += 1;
+                self.state = DecodingState::Stop {
+                    data,
+                    parity,
+                    stop_data,
+                    stop_bits,
+                };
+                if stop_bits >= self.config.stop_bit_time() {
+                    if data != 0x00 || parity == Some(true) || stop_data != 0x00 {
+                        let decoded = self.get_decoded_character()?;
+                        self.state = DecodingState::Idle;
+                        return Ok(Some(decoded));
+                    }
+                    self.state = DecodingState::Break {
+                        bits: self.config.bit_time_per_frame(),
+                    }
+                }
+            }
+            DecodingState::Break { bits } => {
+                if rx != 0 {
+                    let decoded = self.get_decoded_break()?;
+                    self.state = DecodingState::Idle;
+                    return Ok(Some(decoded));
+                }
+                self.state = DecodingState::Break { bits: bits + 1 };
+            }
+        }
+        Ok(None)
+    }
+
+    /// A helper function to decode a sequence of UART waveform samples,
+    /// advancing the decoder based on the contents. If the sample contains
+    /// any final stop bits, the decoded UART transfers are returned.
+    pub fn decode_samples(&mut self, samples: &Vec<u8>) -> Result<Vec<UartTransfer>> {
+        let mut transfers = vec![];
+        for sample in samples {
+            if let Some(transfer) = self.decode_sample(*sample)? {
+                transfers.push(transfer);
+            }
+        }
+        Ok(transfers)
+    }
+
+    /// Check if the decoder is currently in the idle state or not
+    pub fn is_idle(&self) -> bool {
+        self.state == DecodingState::Idle
+    }
+
+    /// Reset the state of decoder
+    pub fn reset(&mut self) {
+        self.state = DecodingState::Idle;
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    fn compare_decoded_result(received: &[UartTransfer], expected: &[u8]) -> Result<()> {
+        assert_eq!(received.len(), expected.len());
+        for (transfer, expected) in received.iter().zip(expected.iter()) {
+            match transfer {
+                UartTransfer::Byte { data } => {
+                    assert_eq!(data, expected);
+                }
+                _ => bail!("Only expected to decode bytes"),
+            }
+        }
+        Ok(())
+    }
+
+    fn uart_encode_decode(config: UartBitbangConfig, message: Option<&[u8]>) -> Result<()> {
+        let encoder = UartBitbangEncoder::new(config.clone());
+        let mut decoder = UartBitbangDecoder::new(config);
+        let msg = message.unwrap_or(b"Hello, this is a simple UART test message.");
+        let mut samples = Vec::new();
+        encoder.encode_characters(msg, &mut samples);
+        assert!(!samples.is_empty());
+        let decoded = decoder
+            .decode_samples(&samples)
+            .expect("Should have decoded the bitbanged message");
+        assert!(decoder.is_idle());
+        compare_decoded_result(&decoded, msg)
+    }
+
+    #[test]
+    fn smoke() -> Result<()> {
+        // Encode and decode some test strings
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop2, 1, Parity::None)?;
+        uart_encode_decode(config.clone(), None)?;
+        uart_encode_decode(config.clone(), Some(b"abc def ghi jkl"))?;
+        uart_encode_decode(config.clone(), Some(b"12345"))?;
+
+        // Check bitbang encoding against a known sample.
+        let encoder = UartBitbangEncoder::new(config);
+        let bytes = [0x01, 0x23, 0x45, 0x67, 0x89, 0xAB, 0xCD, 0xEF];
+        let mut samples = Vec::new();
+        encoder.encode_characters(&bytes, &mut samples);
+        let expected = [
+            0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 1, 0, 0, 1, 1, 0, 1, 0, 1, 0, 0, 0,
+            1, 0, 1, 1, 0, 1, 1, 1, 0, 0, 1, 1, 0, 1, 1, 0, 1, 0, 0, 1, 0, 0, 0, 1, 1, 1, 0, 1, 1,
+            0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1, 0, 1, 1, 1, 1,
+            1,
+        ];
+        assert_eq!(samples, expected);
+        Ok(())
+    }
+
+    #[test]
+    fn data_bits() -> Result<()> {
+        // Check invalid configurations
+        assert!(UartBitbangConfig::new(4, UartStopBits::Stop2, 1, Parity::None).is_err());
+        assert!(UartBitbangConfig::new(9, UartStopBits::Stop2, 1, Parity::None).is_err());
+        // Check all valid configurations of 5-8 data bits
+        let test_msg = b"data_bits TEST STRING";
+        for data_bits in 5..=8 {
+            let data_mask = ((0x1u16 << data_bits) - 1) as u8;
+            let msg = test_msg.iter().map(|b| b & data_mask).collect::<Vec<_>>();
+            uart_encode_decode(
+                UartBitbangConfig::new(data_bits, UartStopBits::Stop2, 1, Parity::None)?,
+                Some(&msg),
+            )?;
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn stop_bits() -> Result<()> {
+        // Check invalid configurations
+        assert!(UartBitbangConfig::new(8, UartStopBits::Stop1_5, 1, Parity::None).is_err());
+        // Check valid configurations
+        for stop_bits in [UartStopBits::Stop1, UartStopBits::Stop2] {
+            uart_encode_decode(
+                UartBitbangConfig::new(8, stop_bits, 1, Parity::None)?,
+                Some(b"hello from the `stop_bits()` test!"),
+            )?;
+        }
+        // Check stop bits are being applied correctly
+        let mut samples = Vec::new();
+        UartBitbangEncoder::new(UartBitbangConfig::new(
+            8,
+            UartStopBits::Stop1,
+            1,
+            Parity::None,
+        )?)
+        .encode_character(0xA5, &mut samples);
+        assert_eq!(&samples, &[0, 1, 0, 1, 0, 0, 1, 0, 1, 1]);
+        samples.clear();
+        UartBitbangEncoder::new(UartBitbangConfig::new(
+            8,
+            UartStopBits::Stop2,
+            1,
+            Parity::None,
+        )?)
+        .encode_character(0xA5, &mut samples);
+        assert_eq!(&samples, &[0, 1, 0, 1, 0, 0, 1, 0, 1, 1, 1]);
+        // Check error on incorrect number of stop bits
+        assert_eq!(
+            UartBitbangDecoder::new(UartBitbangConfig::new(
+                8,
+                UartStopBits::Stop2,
+                1,
+                Parity::None
+            )?)
+            .decode_samples(&vec![0, 1, 0, 1, 0, 0, 1, 0, 1, 1, 0])?,
+            vec![UartTransfer::Broken {
+                data: 0xA5,
+                parity: None,
+                error: UartTransferDecodeError::InvalidStop,
+            }]
+        );
+        Ok(())
+    }
+
+    #[test]
+    fn parity_bits() -> Result<()> {
+        let tests = [
+            (Parity::None, vec![0, 1, 0, 1, 0, 0, 1, 0, 1, 1, 1]),
+            (Parity::Odd, vec![0, 1, 0, 1, 0, 0, 1, 0, 1, 1, 1, 1]),
+            (Parity::Even, vec![0, 1, 0, 1, 0, 0, 1, 0, 1, 0, 1, 1]),
+        ];
+        for (parity, expected) in tests {
+            // Basic encode/decode smoke test for the parity
+            uart_encode_decode(
+                UartBitbangConfig::new(8, UartStopBits::Stop2, 1, parity)?,
+                Some(b"this string is used for testing parity"),
+            )?;
+            // Check the parity bit is calculated correctly
+            let config = UartBitbangConfig::new(8, UartStopBits::Stop2, 1, parity)?;
+            let mut samples = Vec::new();
+            UartBitbangEncoder::new(config.clone()).encode_character(0xA5, &mut samples);
+            assert_eq!(&samples, &expected);
+            // Check single parity errors are caught by the decoder.
+            if parity == Parity::None {
+                continue;
+            }
+            let mut decoder = UartBitbangDecoder::new(config.clone());
+            let mut invalid_samples = expected.clone();
+            // Introduce an error on the parity bit
+            invalid_samples[9] = !invalid_samples[9] & 0x01;
+            assert_eq!(
+                decoder.decode_samples(&invalid_samples)?,
+                vec![UartTransfer::Broken {
+                    data: 0xA5,
+                    parity: Some(invalid_samples[9] != 0),
+                    error: UartTransferDecodeError::ParityMismatch,
+                }]
+            );
+            decoder.reset();
+            // Introduce an error on a single data bit
+            for data_bit in 0..8 {
+                invalid_samples = expected.clone();
+                invalid_samples[1 + data_bit] = !expected[1 + data_bit] & 0x01;
+                assert_eq!(
+                    decoder.decode_samples(&invalid_samples)?,
+                    vec![UartTransfer::Broken {
+                        data: 0xA5 ^ (0x1 << data_bit),
+                        parity: Some(expected[9] != 0),
+                        error: UartTransferDecodeError::ParityMismatch,
+                    }]
+                );
+                decoder.reset();
+            }
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn breaks() -> Result<()> {
+        // Encode/decode tests for a variety of break times
+        let break_transfer = [
+            UartTransfer::Byte { data: 0x12 },
+            UartTransfer::Byte { data: 0x34 },
+            UartTransfer::Break,
+            UartTransfer::Byte { data: 0x56 },
+            UartTransfer::Byte { data: 0x78 },
+        ];
+        for break_cycles in 1..=5 {
+            let config =
+                UartBitbangConfig::new(8, UartStopBits::Stop2, break_cycles, Parity::None)?;
+            let encoder = UartBitbangEncoder::new(config.clone());
+            let mut decoder = UartBitbangDecoder::new(config.clone());
+            let mut samples = Vec::new();
+            encoder.encode_transfers(&break_transfer, &mut samples)?;
+            assert!(
+                samples.len() > (config.bit_time_per_frame() as usize) * (break_cycles as usize)
+            );
+            let decoded = decoder
+                .decode_samples(&samples)
+                .expect("Should have decoded the bitbanged transmission");
+            assert!(decoder.is_idle());
+            assert_eq!(&break_transfer, &decoded[..]);
+        }
+        // Check error on incorrect break time when decoding
+        assert_eq!(
+            UartBitbangDecoder::new(UartBitbangConfig::new(
+                8,
+                UartStopBits::Stop2,
+                2,
+                Parity::None
+            )?)
+            .decode_samples(&vec![0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1])?,
+            vec![UartTransfer::Broken {
+                data: 0x00,
+                parity: None,
+                error: UartTransferDecodeError::InvalidBreak,
+            }]
+        );
+        Ok(())
+    }
+
+    #[test]
+    fn partial_transfers() -> Result<()> {
+        // Check that the UART decoder is stateful, and correctly handles
+        // input samples of partial UART transfers.
+        let mut decoder = UartBitbangDecoder::new(UartBitbangConfig::new(
+            8,
+            UartStopBits::Stop2,
+            1,
+            Parity::None,
+        )?);
+        assert!(decoder.is_idle());
+        for sample in [0, 1, 0, 1, 0, 0, 1, 0, 1, 1] {
+            assert!(decoder.decode_samples(&vec![sample])?.is_empty());
+            assert!(!decoder.is_idle());
+        }
+        assert_eq!(
+            decoder.decode_samples(&vec![1])?,
+            vec![UartTransfer::Byte { data: 0xA5 }]
+        );
+        assert!(decoder.is_idle());
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/test_utils/bitbanging/uart_rx_sampling.rs b/sw/host/opentitanlib/src/test_utils/bitbanging/uart_rx_sampling.rs
new file mode 100644
index 0000000000000..8af8cb012a634
--- /dev/null
+++ b/sw/host/opentitanlib/src/test_utils/bitbanging/uart_rx_sampling.rs
@@ -0,0 +1,639 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::iter::Peekable;
+use std::time::Duration;
+use std::vec::Vec;
+
+use anyhow::{Result, bail};
+use thiserror::Error;
+
+use crate::io::gpio::{
+    ClockNature, Edge, MonitoringEvent, MonitoringReadResponse, MonitoringStartResponse,
+};
+use crate::test_utils::bitbanging::uart::{UartBitbangDecoder, UartTransfer};
+
+#[derive(Error, Debug, PartialEq)]
+pub enum UartBitbangError {
+    #[error("Uart bitbanging RX monitoring needs a more reliable clock source")]
+    InaccurateMonitoringClock,
+    #[error("RX monitoring recorded double rising edge")]
+    DoubleRisingEdge,
+    #[error("RX monitoring recorded double falling edge")]
+    DoubleFallingEdge,
+    #[error("RX monitoring provided edges out-of-order")]
+    EdgesOutOfOrder,
+}
+
+/// A wrapper for the `UartBitbangDecoder` which converts the waveform returned
+/// by the `GpioMonitoring` interface into the uniform discrete samples that
+/// are understood by the decoder. This performs uniform sampling according to
+/// the baud rate from the initial response and the edges provided by monitor
+/// reads, optimized to avoid sampling whilst the UART is idle.
+pub struct UartRxMonitoringDecoder {
+    pub decoder: UartBitbangDecoder,
+    clock_resolution: u64,
+    initial_timestamp: u64,
+    last_event: Option<MonitoringEvent>,
+    last_sample_time: Option<u64>,
+}
+
+impl UartRxMonitoringDecoder {
+    pub fn new(
+        decoder: UartBitbangDecoder,
+        clock_nature: ClockNature,
+        start: MonitoringStartResponse,
+    ) -> Result<Self> {
+        let ClockNature::Wallclock { resolution, .. } = clock_nature else {
+            Err(UartBitbangError::InaccurateMonitoringClock)?
+        };
+        Ok(Self {
+            decoder,
+            clock_resolution: resolution,
+            initial_timestamp: start.timestamp,
+            last_event: None,
+            last_sample_time: None,
+        })
+    }
+
+    /// Convert a `u64` timestamp to a time in nanoseconds based on the initial
+    /// monitoring offset timestamp and configured clock resolution.
+    fn timestamp_to_nanos(&self, timestamp: u64) -> u64 {
+        let delta = (timestamp - self.initial_timestamp) as u128;
+        let nanos = delta * 1_000_000_000u128 / self.clock_resolution as u128;
+        nanos as u64
+    }
+
+    /// Calculates the number of samples between two timestamps, assuming a
+    /// sample was taken at the given `from` time.
+    fn samples_since(&self, from: u64, until: u64, period_ns: u64) -> u64 {
+        let time_elapsed = until - from;
+        // Rounding division of time_elapsed / period_ns
+        (time_elapsed + period_ns / 2) / period_ns
+    }
+
+    /// Consume edge events until several identical samples are found between
+    /// edges. Lets us wait for a break condition / idle event if monitoring
+    /// starts mid-transmission. Returns `true` if in a stable state.
+    fn sample_until_stable_state<I: Iterator<Item = MonitoringEvent>>(
+        &mut self,
+        events: &mut Peekable<I>,
+        end_time: u64,
+        period_ns: u64,
+    ) -> Result<bool> {
+        let frame_bit_time = self.decoder.config.bit_time_per_frame() as u64;
+        let last_ts = match self.last_event {
+            Some(last_event) => last_event.timestamp,
+            None => self.initial_timestamp,
+        };
+        let mut last_time = self.timestamp_to_nanos(last_ts);
+
+        while let Some(event) = events.peek() {
+            let timestamp = self.timestamp_to_nanos(event.timestamp);
+            if timestamp < last_time {
+                Err(UartBitbangError::EdgesOutOfOrder)?
+            } else if self.samples_since(last_time, timestamp, period_ns) > frame_bit_time {
+                return Ok(true);
+            }
+            last_time = timestamp;
+            self.last_event = events.next();
+        }
+        Ok(self.samples_since(last_time, end_time, period_ns) > frame_bit_time)
+    }
+
+    /// Find the previous sample time and RX value stored by the decoder. If no
+    /// sampling has been performed previously, wait for a stable RX level
+    /// (no edges for >= UART frame time) and then synchronize with the initial
+    /// falling edge.
+    ///
+    /// This will consume edge events until a stable state is found, but will
+    /// not consume the event corresponding to the first falling edge.
+    fn get_last_state<I: Iterator<Item = MonitoringEvent>>(
+        &mut self,
+        events: &mut Peekable<I>,
+        end_time: u64,
+        period_ns: u64,
+    ) -> Result<Option<(u64, u8)>> {
+        // If we have information stored from a previous sample, retrieve it.
+        if let Some(last_sample_time) = self.last_sample_time {
+            let Some(last_event) = self.last_event else {
+                bail!("Previous sampling time exists but previous event does not");
+            };
+            let value = match last_event.edge {
+                Edge::Rising => 0x01,
+                Edge::Falling => 0x00,
+            };
+            return Ok(Some((last_sample_time, value)));
+        };
+
+        // No previous sampling, so wait for a stable RX level to avoid desync
+        if !self.sample_until_stable_state(events, end_time, period_ns)? {
+            return Ok(None);
+        }
+
+        // Identify & synchronize with the first falling edge
+        let Some(first_event) = events.peek() else {
+            return Ok(None);
+        };
+
+        let edge_time = if first_event.edge == Edge::Falling {
+            self.timestamp_to_nanos(first_event.timestamp)
+        } else {
+            // If we start in a break condition, wait until the break is clear
+            // (the UART goes idle) and sync with the next (falling) edge.
+            events.next();
+            let Some(second_event) = events.peek() else {
+                return Ok(None);
+            };
+            self.timestamp_to_nanos(second_event.timestamp)
+        };
+        Ok(Some((edge_time, 0x01)))
+    }
+
+    /// Uses the bitbanging decoder to decode a given RX pin sample.
+    fn decode_sample(&mut self, sample: u8, decoded: &mut Vec<u8>) -> Result<()> {
+        if let Some(transfer) = self.decoder.decode_sample(sample)? {
+            match transfer {
+                UartTransfer::Byte { data } => decoded.push(data),
+                UartTransfer::Broken { error, .. } => {
+                    Err(error)?;
+                }
+                // TODO: handle decoding incoming break conditions
+                UartTransfer::Break => (),
+            }
+        }
+        Ok(())
+    }
+
+    /// Decode a given RX monitoring waveform edge, calculating & decoding
+    /// uniform RX pin samples between this edge and the previous one.
+    ///
+    /// Args:
+    /// - event: The `MonitoringEvent` representing an edge to decode.
+    /// - decoded: The `Vec` to place decoded UART characters into.
+    /// - period_ns: The sampling period in nanos (according to the Baud rate).
+    /// - last_sample_time: The timestamp (in nanoseconds) at which the
+    ///   previous edge/sample occurred. A sample (or several samples) will be
+    ///   taken if the edge occurs more than 1/2 a period after this time, and
+    ///   the time will then be correspondingly updated.
+    /// - value: The current value of the UART RX signal. Will be updated from
+    ///   the given edge.
+    fn decode_edge(
+        &mut self,
+        event: MonitoringEvent,
+        decoded: &mut Vec<u8>,
+        period_ns: u64,
+        last_sample_time: &mut u64,
+        value: &mut u8,
+    ) -> Result<()> {
+        if event.edge == Edge::Falling && *value == 0 {
+            Err(UartBitbangError::DoubleFallingEdge)?
+        } else if event.edge == Edge::Rising && *value == 1 {
+            Err(UartBitbangError::DoubleRisingEdge)?
+        }
+        let sampling_end = self.timestamp_to_nanos(event.timestamp);
+        if sampling_end < *last_sample_time {
+            Err(UartBitbangError::EdgesOutOfOrder)?
+        }
+
+        // Calculate & decode samples between edges
+        let num_samples = self.samples_since(*last_sample_time, sampling_end, period_ns);
+        *last_sample_time += period_ns * num_samples;
+        for _ in 0..num_samples {
+            if self.decoder.is_idle() && event.edge == Edge::Falling {
+                // Optimization: don't decode idle-high samples between frames
+                break;
+            }
+            self.decode_sample(*value, decoded)?;
+        }
+
+        if self.decoder.is_idle() && event.edge == Edge::Falling {
+            // Reset sampling time at the start of each transaction
+            *last_sample_time = self.timestamp_to_nanos(event.timestamp);
+        }
+        self.last_event = Some(event);
+        *value = if *value == 0x00 { 0x01 } else { 0x00 };
+        Ok(())
+    }
+
+    /// Decode a given RX monitoring waveform  into received bytes, where the
+    /// waveform is an ordered vector of RX edges, and the time at which the
+    /// monitoring was performed (i.e. the end).
+    ///
+    /// Args:
+    /// - events: The list of `MonitoringEvents` in the response waveform.
+    /// - signal_index: The index of the RX signal in the monitoring events.
+    /// - end_time: The final timestamp of the response waveform.
+    /// - period: The period at which to sample (according to the Baud rate).
+    fn decode_waveform(
+        &mut self,
+        events: Vec<MonitoringEvent>,
+        signal_index: u8,
+        end_time: u64,
+        period: &Duration,
+    ) -> Result<Vec<u8>> {
+        let mut decoded = Vec::new();
+        let mut events_iter = events
+            .into_iter()
+            .filter(|event| event.signal_index == signal_index)
+            .peekable();
+        let period_ns = period.as_nanos() as u64;
+        let last_state = self.get_last_state(&mut events_iter, end_time, period_ns)?;
+        let Some((mut last_sample_time, mut value)) = last_state else {
+            // Not enough events recorded to find a starting state.
+            return Ok(decoded);
+        };
+        for event in events_iter {
+            self.decode_edge(
+                event,
+                &mut decoded,
+                period_ns,
+                &mut last_sample_time,
+                &mut value,
+            )?;
+        }
+        self.last_sample_time = Some(last_sample_time);
+        // When a frame finishes, a final rising edge leaves the RX line high,
+        // but our sampling mechanism only decodes samples between edges. To
+        // avoid requiring subsequent transmissions, add idle bits until the
+        // read timestamp (while the decoder is active).
+        if value != 0x00 {
+            while !self.decoder.is_idle() {
+                if (last_sample_time + period_ns / 2) >= end_time {
+                    break;
+                }
+                last_sample_time += period_ns;
+                self.last_sample_time = Some(last_sample_time);
+                self.decode_sample(value, &mut decoded)?;
+            }
+        }
+        Ok(decoded)
+    }
+
+    /// Decode a `MonitoringReadResponse` from the `GpioMonitoring` interface,
+    /// performing uniform sampling and decoding the sampled UART output.
+    /// `signal_index` specifies the `MonitoringReadResponse` signal
+    /// corresponding to the UART RX pin (normally 0).
+    ///
+    /// Expects at least a UART frame time of idle since the initial timestamp
+    /// before it will start sampling (any malformed data is dropped).
+    ///
+    /// Note: it is expected that *all* monitor responses since monitoring
+    /// initialization are fed to the decoder through this function. If any
+    /// monitoring events are lost, this could cause the corruption of some
+    /// received UART data.
+    pub fn decode_response(
+        &mut self,
+        response: MonitoringReadResponse,
+        signal_index: u8,
+        baud_rate: u32,
+    ) -> Result<Vec<u8>> {
+        let sampling_period = Duration::from_nanos(1_000_000_000u64 / baud_rate as u64);
+        let read_end_timestamp = self.timestamp_to_nanos(response.timestamp);
+        self.decode_waveform(
+            response.events,
+            signal_index,
+            read_end_timestamp,
+            &sampling_period,
+        )
+    }
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+
+    use once_cell::sync::Lazy;
+    use serialport::Parity;
+
+    use crate::test_utils::bitbanging::uart::{UartBitbangConfig, UartStopBits};
+
+    static CLOCK_NATURE: ClockNature = ClockNature::Wallclock {
+        resolution: 1_000_000,
+        offset: None,
+    };
+    static BAUD_RATE: u32 = 57600;
+    static START_RESPONSE: Lazy<MonitoringStartResponse> = Lazy::new(|| MonitoringStartResponse {
+        timestamp: 0,
+        initial_levels: vec![true],
+    });
+    // Example UART RX waveform taken from a bitbanging test sample
+    static EVENT_TIMESTAMPS: [u64; 112] = [
+        5889252340, 5889252358, 5889252375, 5889252392, 5889252410, 5889252427, 5889252445,
+        5889252462, 5889252479, 5889252497, 5889252514, 5889252532, 5889252549, 5889252636,
+        5889252654, 5889252671, 5889252688, 5889252723, 5889252740, 5889252775, 5889252793,
+        5889252810, 5889252827, 5889252845, 5889252862, 5889252914, 5889252932, 5889252949,
+        5889252967, 5889252984, 5889253001, 5889253019, 5889253036, 5889253141, 5889253158,
+        5889253193, 5889253210, 5889253245, 5889253263, 5889253315, 5889253349, 5889253367,
+        5889253386, 5889253402, 5889253419, 5889253454, 5889253471, 5889253489, 5889253523,
+        5889253541, 5889253558, 5889253610, 5889253628, 5889253645, 5889253697, 5889253715,
+        5889253732, 5889253767, 5889253784, 5889253837, 5889253871, 5889253889, 5889253906,
+        5889253924, 5889253941, 5889254011, 5889254046, 5889254063, 5889254080, 5889254115,
+        5889254167, 5889254185, 5889254219, 5889254238, 5889254254, 5889254272, 5889254324,
+        5889254359, 5889254393, 5889254411, 5889254428, 5889254533, 5889254550, 5889254585,
+        5889254603, 5889254655, 5889254672, 5889254689, 5889254741, 5889254759, 5889254776,
+        5889254794, 5889254811, 5889254828, 5889254846, 5889254881, 5889254915, 5889254933,
+        5889254950, 5889254968, 5889255002, 5889255037, 5889255089, 5889255107, 5889255124,
+        5889255176, 5889255194, 5889255211, 5889255264, 5889255281, 5889255298, 5889255455,
+    ];
+    static READ_RESPONSE_TIMESTAMP: u64 = 5889262827;
+    static EXPECTED_RESPONSE: &str = "UART bitbang test\0";
+
+    // A helper to compactly construct `MonitoringEvent` edges.
+    fn edge(signal_index: u8, edge: Edge, timestamp: u64) -> MonitoringEvent {
+        MonitoringEvent {
+            signal_index,
+            edge,
+            timestamp,
+        }
+    }
+
+    fn sample_and_decode(
+        decoder: UartBitbangDecoder,
+        start_idle: bool,
+        start_response: MonitoringStartResponse,
+        edge_timestamps: &[u64],
+        read_timestamp: u64,
+        baud_rate: u32,
+        expected: String,
+    ) -> Result<()> {
+        let edges = if start_idle {
+            [Edge::Falling, Edge::Rising]
+        } else {
+            [Edge::Rising, Edge::Falling]
+        };
+        let events = edge_timestamps
+            .iter()
+            .enumerate()
+            .map(|(i, t)| edge(0, edges[i % 2], *t))
+            .collect::<Vec<_>>();
+        let read_response = MonitoringReadResponse {
+            events,
+            timestamp: read_timestamp,
+        };
+
+        let mut response_decoder =
+            UartRxMonitoringDecoder::new(decoder, CLOCK_NATURE, start_response)?;
+        let decoded = response_decoder.decode_response(read_response, 0, baud_rate)?;
+        assert_eq!(String::from_utf8(decoded), Ok(expected));
+        Ok(())
+    }
+
+    #[test]
+    fn smoke() -> Result<()> {
+        // Decode against a known sample test string
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+        let decoder = UartBitbangDecoder::new(config);
+        sample_and_decode(
+            decoder,
+            true,
+            START_RESPONSE.clone(),
+            &EVENT_TIMESTAMPS,
+            READ_RESPONSE_TIMESTAMP,
+            BAUD_RATE,
+            EXPECTED_RESPONSE.into(),
+        )
+    }
+
+    #[test]
+    fn baud_rates() -> Result<()> {
+        // Check we can sample at different baud rates
+        fn modify_timestamp(timestamp: u64, first_edge_timestamp: u64, divider: u32) -> u64 {
+            let delta = timestamp - first_edge_timestamp;
+            let new_delta = delta * divider as u64;
+            first_edge_timestamp + new_delta
+        }
+
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+        let first_edge_timestamp = EVENT_TIMESTAMPS[0];
+        for divider in 1..=10u32 {
+            let modified_timestamps = EVENT_TIMESTAMPS
+                .iter()
+                .map(|timestamp| modify_timestamp(*timestamp, first_edge_timestamp, divider))
+                .collect::<Vec<_>>();
+            let modified_baud = BAUD_RATE / divider;
+            let modified_response_timestamp =
+                modify_timestamp(READ_RESPONSE_TIMESTAMP, first_edge_timestamp, divider);
+            let decoder = UartBitbangDecoder::new(config.clone());
+            sample_and_decode(
+                decoder,
+                true,
+                START_RESPONSE.clone(),
+                &modified_timestamps,
+                modified_response_timestamp,
+                modified_baud,
+                EXPECTED_RESPONSE.into(),
+            )?;
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn clock_jitter_and_skew() -> Result<()> {
+        // Check we can tolerate some small +-5% jitters or skews
+        // Use a smaller baud rate to allow more accurate jitters
+        const BAUD_DIVIDER: u32 = 8;
+
+        fn modify_timestamp(
+            timestamp: u64,
+            first_edge_timestamp: u64,
+            period_ns: u64,
+            skew_pc: i32,
+            jitter_pc: i32,
+        ) -> u64 {
+            let delta = timestamp - first_edge_timestamp;
+            let new_delta = delta * BAUD_DIVIDER as u64;
+            let skew_delta = new_delta * ((100i32 + skew_pc) as u64) / 100u64;
+            let jittered_delta =
+                (skew_delta as i64) + ((period_ns as i64) * jitter_pc as i64) / 100i64;
+            (first_edge_timestamp as i64 + jittered_delta) as u64
+        }
+
+        fn clock_test(skew_pc: i32, jitter_pc: i32) -> Result<()> {
+            let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+            let modified_baud = BAUD_RATE / BAUD_DIVIDER;
+            let period_ns = 1_000_000_000u64 / modified_baud as u64;
+            let first_edge_timestamp = EVENT_TIMESTAMPS[0];
+
+            let modified_timestamps = EVENT_TIMESTAMPS
+                .iter()
+                .map(|timestamp| {
+                    modify_timestamp(
+                        *timestamp,
+                        first_edge_timestamp,
+                        period_ns,
+                        skew_pc,
+                        jitter_pc,
+                    )
+                })
+                .collect::<Vec<_>>();
+            let modified_response_timestamp = modify_timestamp(
+                READ_RESPONSE_TIMESTAMP,
+                first_edge_timestamp,
+                period_ns,
+                skew_pc,
+                jitter_pc,
+            );
+            let decoder = UartBitbangDecoder::new(config.clone());
+            sample_and_decode(
+                decoder,
+                true,
+                START_RESPONSE.clone(),
+                &modified_timestamps,
+                modified_response_timestamp,
+                modified_baud,
+                EXPECTED_RESPONSE.into(),
+            )?;
+            Ok(())
+        }
+
+        // Test -20% -> 20% jitter (unidirectional only for now)
+        for jitter_pc in -20..=20i32 {
+            clock_test(0i32, jitter_pc)?;
+        }
+
+        // UART frame time = 1 start bit + 8 data bits + 1 stop bit = 10 samples
+        // Rounding gives up to a 50% tolerance, so realistically we can test a
+        // max of -4 -> 4% skew
+        for skew_pc in -4..=4i32 {
+            clock_test(skew_pc, 0i32)?;
+        }
+
+        // Test with small jitter (-5 -> 5%) & skew (-2 -> 2%)
+        for jitter_pc in -5..=5i32 {
+            for skew_pc in -2..=2i32 {
+                clock_test(skew_pc, jitter_pc)?;
+            }
+        }
+
+        Ok(())
+    }
+
+    #[test]
+    fn start_during_break() -> Result<()> {
+        // Check that we can handle starting monitoring during a break
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+        let decoder = UartBitbangDecoder::new(config);
+
+        // Insert an extra edge just before, an start in a break condition (RX = 0)
+        let bit_time = EVENT_TIMESTAMPS[1] - EVENT_TIMESTAMPS[0];
+        let before_timestamp = EVENT_TIMESTAMPS[0] - bit_time;
+        let mut events = vec![before_timestamp];
+        events.extend_from_slice(&EVENT_TIMESTAMPS);
+        sample_and_decode(
+            decoder,
+            false,
+            START_RESPONSE.clone(),
+            &events,
+            READ_RESPONSE_TIMESTAMP,
+            BAUD_RATE,
+            EXPECTED_RESPONSE.into(),
+        )
+    }
+
+    #[test]
+    fn start_mid_transmission() -> Result<()> {
+        // Check that we can handle starting monitoring mid-transmission
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+        let decoder = UartBitbangDecoder::new(config.clone());
+
+        // Insert some spurious edges a couple of UART frames before,
+        // corresponding to the end of some partial UART transmission.
+        // The decoder should ignore this and read as normal.
+        let bit_time = EVENT_TIMESTAMPS[1] - EVENT_TIMESTAMPS[0];
+        let start_response = MonitoringStartResponse {
+            timestamp: EVENT_TIMESTAMPS[0] - bit_time * 24,
+            initial_levels: vec![true],
+        };
+        let mut events = vec![
+            EVENT_TIMESTAMPS[0] - bit_time * 23,
+            EVENT_TIMESTAMPS[0] - bit_time * 21,
+            EVENT_TIMESTAMPS[0] - bit_time * 20,
+        ];
+        events.extend_from_slice(&EVENT_TIMESTAMPS);
+        sample_and_decode(
+            decoder,
+            false,
+            start_response,
+            &events,
+            READ_RESPONSE_TIMESTAMP,
+            BAUD_RATE,
+            EXPECTED_RESPONSE.into(),
+        )?;
+
+        // Insert some spurious edges just before, corresponding to the end
+        // of some partial UART transmission. The decoder should decode nothing
+        // (instead of garbage) because it cannot find a stable state.
+        let decoder = UartBitbangDecoder::new(config);
+        let start_response = MonitoringStartResponse {
+            timestamp: EVENT_TIMESTAMPS[0] - bit_time * 5,
+            initial_levels: vec![true],
+        };
+        let mut events = vec![
+            EVENT_TIMESTAMPS[0] - bit_time * 4,
+            EVENT_TIMESTAMPS[0] - bit_time * 2,
+            EVENT_TIMESTAMPS[0] - bit_time,
+        ];
+        events.extend_from_slice(&EVENT_TIMESTAMPS);
+        let empty_response = String::new();
+        sample_and_decode(
+            decoder,
+            false,
+            start_response,
+            &events,
+            READ_RESPONSE_TIMESTAMP,
+            BAUD_RATE,
+            empty_response,
+        )
+    }
+
+    #[test]
+    fn partial_responses() -> Result<()> {
+        // Check that we can decode the data over several partial monitor reads
+        let config = UartBitbangConfig::new(8, UartStopBits::Stop1, 2, Parity::None)?;
+        let decoder = UartBitbangDecoder::new(config.clone());
+        let edges = [Edge::Falling, Edge::Rising];
+        let events = EVENT_TIMESTAMPS
+            .iter()
+            .enumerate()
+            .map(|(i, t)| edge(0, edges[i % 2], *t))
+            .collect::<Vec<_>>();
+        let mut response_decoder =
+            UartRxMonitoringDecoder::new(decoder, CLOCK_NATURE, START_RESPONSE.clone())?;
+
+        // Decode the first 60 edges 3 edges at a time
+        let mut decoded = Vec::new();
+        for partial_edges in events[..60].chunks(3) {
+            // "read" a response at last edge + 1 ns
+            let timestamp = partial_edges.last().unwrap().timestamp + 1;
+            let read_response = MonitoringReadResponse {
+                events: Vec::from(partial_edges),
+                timestamp,
+            };
+            decoded.extend(response_decoder.decode_response(read_response, 0, BAUD_RATE)?);
+        }
+
+        // Decode the remaining edges with up to 20 at a time
+        for partial_edges in events[60..].chunks(20) {
+            let timestamp = partial_edges.last().unwrap().timestamp + 1;
+            let read_response = MonitoringReadResponse {
+                events: Vec::from(partial_edges),
+                timestamp,
+            };
+            decoded.extend(response_decoder.decode_response(read_response, 0, BAUD_RATE)?);
+        }
+
+        // Final read response containing the end timestamp
+        let read_response = MonitoringReadResponse {
+            events: Vec::new(),
+            timestamp: READ_RESPONSE_TIMESTAMP,
+        };
+        decoded.extend(response_decoder.decode_response(read_response, 0, BAUD_RATE)?);
+        assert_eq!(
+            String::from_utf8(decoded),
+            Ok(String::from(EXPECTED_RESPONSE))
+        );
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/test_utils/bootstrap.rs b/sw/host/opentitanlib/src/test_utils/bootstrap.rs
index bc1ed66630a98..b0fdf3f9a7c37 100644
--- a/sw/host/opentitanlib/src/test_utils/bootstrap.rs
+++ b/sw/host/opentitanlib/src/test_utils/bootstrap.rs
@@ -4,7 +4,6 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::path::{Path, PathBuf};
 
 use crate::app::{StagedProgressBar, TransportWrapper};
@@ -22,7 +21,10 @@ pub struct Bootstrap {
 }
 
 impl Bootstrap {
-    pub fn init(&self, transport: &TransportWrapper) -> Result<Option<Box<dyn Annotate>>> {
+    pub fn init(
+        &self,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(bootstrap) = &self.bootstrap {
             self.load(transport, bootstrap)?;
         }
diff --git a/sw/host/opentitanlib/src/test_utils/crashdump.rs b/sw/host/opentitanlib/src/test_utils/crashdump.rs
new file mode 100644
index 0000000000000..e25319585448a
--- /dev/null
+++ b/sw/host/opentitanlib/src/test_utils/crashdump.rs
@@ -0,0 +1,149 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+
+use crate::app::TransportWrapper;
+use crate::dif::rstmgr::{DifRstmgrResetInfo, RstmgrReg};
+use crate::io::jtag::{JtagParams, JtagTap};
+
+use top_earlgrey::top_earlgrey;
+
+/// Reads out CPU crashdump info over JTAG.
+///
+/// Assumes we are already in a TEST_UNLOCKED* state, and TAP straps are cleared.
+pub fn read_cpu_crashdump_data(
+    transport: &TransportWrapper,
+    jtag_params: &JtagParams,
+) -> Result<()> {
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
+    let mut jtag = jtag_params.create(transport)?.connect(JtagTap::RiscvTap)?;
+
+    // Read out CPU crashdump info.
+    let mut buf = [0u32];
+    let mut cpu_crashdump_info = [0u32; 16];
+    jtag.read_memory32(
+        top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::CpuInfoAttr as u32,
+        &mut buf,
+    )?;
+    let len = buf[0];
+    log::info!("CPU Crash Dump Info ({:?} words):", len);
+    for i in 0..len {
+        jtag.write_memory32(
+            top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::CpuInfoCtrl as u32,
+            &[(i << 4) | 1u32],
+        )?;
+        jtag.read_memory32(
+            top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::CpuInfo as u32,
+            &mut buf,
+        )?;
+        cpu_crashdump_info[i as usize] = buf[0];
+    }
+    log::info!("  Current MTVAL         = 0x{:x?}", cpu_crashdump_info[0]);
+    log::info!("  Current MPEC          = 0x{:x?}", cpu_crashdump_info[1]);
+    log::info!("  Last Data Access Addr = 0x{:x?}", cpu_crashdump_info[2]);
+    log::info!("  Next PC               = 0x{:x?}", cpu_crashdump_info[3]);
+    log::info!("  PC                    = 0x{:x?}", cpu_crashdump_info[4]);
+    log::info!("  Previous MTVAL        = 0x{:x?}", cpu_crashdump_info[5]);
+    log::info!("  Previous MPEC         = 0x{:x?}", cpu_crashdump_info[6]);
+    log::info!("  Double Fault          = 0x{:x?}", cpu_crashdump_info[7]);
+
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
+    jtag.disconnect()?;
+
+    Ok(())
+}
+
+/// Reads out alert crashdump info over JTAG.
+///
+/// Assumes we are already in a TEST_UNLOCKED* state, and TAP straps are cleared.
+pub fn read_alert_crashdump_data(
+    transport: &TransportWrapper,
+    jtag_params: &JtagParams,
+) -> Result<()> {
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
+    let mut jtag = jtag_params.create(transport)?.connect(JtagTap::RiscvTap)?;
+
+    let mut buf = [0u32];
+    jtag.read_memory32(
+        top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::AlertInfoAttr as u32,
+        &mut buf,
+    )?;
+    let len = buf[0];
+    log::info!("Alert Crash Dump Info ({:?} words):", len);
+    for i in 0..len {
+        jtag.write_memory32(
+            top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::AlertInfoCtrl as u32,
+            &[(i << 4) | 1u32],
+        )?;
+        jtag.read_memory32(
+            top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::AlertInfo as u32,
+            &mut buf,
+        )?;
+        log::info!("  Word {:?} = 0x{:x?}", i, buf[0]);
+    }
+
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
+    jtag.disconnect()?;
+
+    Ok(())
+}
+
+/// Reads out reset reason over JTAG.
+///
+/// Assumes we are already in a TEST_UNLOCKED* state, and TAP straps are cleared.
+pub fn read_reset_reason(transport: &TransportWrapper, jtag_params: &JtagParams) -> Result<()> {
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
+    let mut jtag = jtag_params.create(transport)?.connect(JtagTap::RiscvTap)?;
+
+    let mut buf = [0u32];
+    jtag.read_memory32(
+        top_earlgrey::RSTMGR_AON_BASE_ADDR as u32 + RstmgrReg::ResetInfo as u32,
+        &mut buf,
+    )?;
+    let reset_reason = buf[0];
+
+    log::info!("Reset Reasons:");
+    log::info!(
+        "  PoR           = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::Por)) != 0
+    );
+    log::info!(
+        "  LowPowerExit  = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::LowPowerExit)) != 0
+    );
+    log::info!(
+        "  Sw            = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::Sw)) != 0
+    );
+    log::info!(
+        "  HwReq         = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::HwReq)) != 0
+    );
+    log::info!(
+        "  SysRstCtrl    = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::SysRstCtrl)) != 0
+    );
+    log::info!(
+        "  Watchdog      = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::Watchdog)) != 0
+    );
+    log::info!(
+        "  PowerUnstable = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::PowerUnstable)) != 0
+    );
+    log::info!(
+        "  Escalation    = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::Escalation)) != 0
+    );
+    log::info!(
+        "  Ndm           = {:?}",
+        (reset_reason & u32::from(DifRstmgrResetInfo::Ndm)) != 0
+    );
+
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
+    jtag.disconnect()?;
+
+    Ok(())
+}
diff --git a/sw/host/opentitanlib/src/test_utils/epmp.rs b/sw/host/opentitanlib/src/test_utils/epmp.rs
index 22df7d0a0fcf5..4f8d0db425a16 100644
--- a/sw/host/opentitanlib/src/test_utils/epmp.rs
+++ b/sw/host/opentitanlib/src/test_utils/epmp.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use thiserror::Error;
 
 pub mod constants {
diff --git a/sw/host/opentitanlib/src/test_utils/gpio.rs b/sw/host/opentitanlib/src/test_utils/gpio.rs
index 1d87f5fe87e70..7ef10a19750e6 100644
--- a/sw/host/opentitanlib/src/test_utils/gpio.rs
+++ b/sw/host/opentitanlib/src/test_utils/gpio.rs
@@ -7,7 +7,7 @@ use std::time::Duration;
 
 use crate::io::uart::Uart;
 use crate::test_utils::e2e_command::TestCommand;
-use crate::test_utils::rpc::{UartRecv, UartSend};
+use crate::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use crate::test_utils::status::Status;
 
 // Bring in the auto-generated sources.
@@ -17,7 +17,7 @@ impl GpioSet {
     fn execute(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::GpioSet.send(uart)?;
         self.send(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 
@@ -148,7 +148,7 @@ impl GpioSet {
 impl GpioGet {
     pub fn read_all(uart: &dyn Uart) -> Result<u32> {
         TestCommand::GpioGet.send(uart)?;
-        let data = GpioGet::recv(uart, Duration::from_secs(300), false)?;
+        let data = GpioGet::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(data.state)
     }
 }
diff --git a/sw/host/opentitanlib/src/test_utils/gpio_monitor.rs b/sw/host/opentitanlib/src/test_utils/gpio_monitor.rs
index e2d08eaf68891..6ef9ad36e7884 100644
--- a/sw/host/opentitanlib/src/test_utils/gpio_monitor.rs
+++ b/sw/host/opentitanlib/src/test_utils/gpio_monitor.rs
@@ -2,13 +2,13 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::borrow::Borrow;
-//use std::time::Duration;
 use std::rc::Rc;
 
 use crate::app::TransportWrapper;
-use crate::io::gpio::{ClockNature, Edge, GpioMonitoring, MonitoringEvent};
+use crate::io::gpio::{ClockNature, GpioMonitoring, MonitoringEvent};
+use crate::util::vcd::{dump_vcd, vcd_from_edges};
 
 // This structure makes it easier to monitor GPIOs and supports dumping a trace
 // in the VCD format for further examination. In addition, for easier debugging
@@ -20,16 +20,23 @@ pub struct GpioMon<'a> {
     monitor: Rc<dyn GpioMonitoring>,
     // Transport pins names.
     pins: Vec<String>,
-    // Human pin names.
-    pin_names: Vec<String>,
     // Whether to dump the trace on drop.
     dump_on_drop: bool,
     // Are we still monitoring?
     still_monitoring: bool,
+    // Waves.
+    waves: Waves,
+}
+
+pub struct Waves {
+    // Human pin names.
+    pin_names: Vec<String>,
     // Initial levels.
     initial_levels: Vec<bool>,
     // Initial timestamp.
     initial_timestamp: u64,
+    // Final timestamp.
+    final_timestamp: u64,
     // Clock resolution.
     resolution: u64,
     // Complete trace since the beginning.
@@ -73,26 +80,26 @@ impl<'a> GpioMon<'a> {
             transport,
             monitor,
             pins,
-            pin_names,
             dump_on_drop,
             still_monitoring: true,
-            initial_levels: start.initial_levels,
-            initial_timestamp: start.timestamp,
-            resolution,
-            events: vec![],
+            waves: Waves::new(pin_names, start.initial_levels, start.timestamp, resolution),
         })
     }
 
-    pub fn timestamp_ns(&self, timestamp: u64) -> u64 {
-        timestamp * 1000000000u64 / self.resolution
+    pub fn timestamp_to_ns(&self, timestamp: u64) -> u64 {
+        self.waves.timestamp_to_ns(timestamp)
     }
 
     pub fn signal_index(&self, name: &str) -> Option<usize> {
-        self.pin_names.iter().position(|x| x == name)
+        self.waves.signal_index(name)
     }
 
     pub fn initial_levels(&self) -> Vec<bool> {
-        self.initial_levels.clone()
+        self.waves.initial_levels()
+    }
+
+    pub fn all_events(&self) -> impl Iterator<Item = &MonitoringEvent> {
+        self.waves.all_events()
     }
 
     pub fn read(&mut self, continue_monitoring: bool) -> Result<Vec<MonitoringEvent>> {
@@ -102,42 +109,118 @@ impl<'a> GpioMon<'a> {
         );
         let gpio_pins = self.transport.gpio_pins(&self.pins)?;
         let gpios_pins = &gpio_pins.iter().map(Rc::borrow).collect::<Vec<_>>();
-        let events = self
+        let resp = self
             .monitor
             .monitoring_read(gpios_pins, continue_monitoring)?;
         self.still_monitoring = continue_monitoring;
-        self.events.extend_from_slice(&events.events);
-        Ok(events.events)
-    }
-
-    pub fn dump_vcd(&self) -> String {
-        const SYMBOLS: &[char] = &['!', '#', '$', '%', '&', '(', ')'];
-        assert!(self.pins.len() < SYMBOLS.len());
-        let mut vcd = String::new();
-        vcd.push_str("$timescale 1ns $end\n");
-        vcd.push_str("$scope module opentitanlib $end\n");
-        for (i, name) in self.pin_names.iter().enumerate() {
-            vcd.push_str(&format!("$var wire 1 {} {name} $end\n", SYMBOLS[i]));
-        }
-        vcd.push_str("$upscope $end\n");
-        vcd.push_str("$enddefinitions $end\n");
+        self.waves.add_events(&resp.events);
+        self.waves.final_timestamp = resp.timestamp;
+        Ok(resp.events)
+    }
+
+    pub fn dump_on_drop(&mut self, dump_on_drop: bool) {
+        self.dump_on_drop = dump_on_drop
+    }
+
+    pub fn dump_vcd(&self) -> Result<String> {
+        self.waves.dump_vcd()
+    }
+}
+
+/// Consume a GpioMon and return a copy of the waves. If the monitor
+/// is still active, this function will try to stop it (and return an
+/// error if this is not possible).
+impl TryFrom<GpioMon<'_>> for Waves {
+    type Error = anyhow::Error;
 
-        vcd.push_str("#0");
-        for (i, lvl) in self.initial_levels.iter().enumerate() {
-            vcd.push_str(&format!(" {}{}", if *lvl { 1 } else { 0 }, SYMBOLS[i]));
+    fn try_from(mut gpio_mon: GpioMon<'_>) -> Result<Waves> {
+        if gpio_mon.still_monitoring {
+            let _ = gpio_mon.read(false)?;
         }
-        vcd.push('\n');
-
-        for event in &self.events {
-            let ns = (event.timestamp - self.initial_timestamp) * 1000000000u64 / self.resolution;
-            vcd.push_str(&format!(
-                "#{ns} {}{}\n",
-                if event.edge == Edge::Rising { 1 } else { 0 },
-                SYMBOLS[event.signal_index as usize]
-            ));
+        gpio_mon.dump_on_drop = false;
+        let waves = std::mem::replace(
+            &mut gpio_mon.waves,
+            Waves::new(Vec::new(), Vec::new(), 0, 1),
+        );
+        Ok(waves)
+    }
+}
+
+impl Waves {
+    pub fn new(
+        pin_names: Vec<String>,
+        initial_levels: Vec<bool>,
+        initial_timestamp: u64,
+        resolution: u64,
+    ) -> Waves {
+        Waves {
+            pin_names,
+            initial_levels,
+            initial_timestamp,
+            final_timestamp: initial_timestamp,
+            resolution,
+            events: vec![],
         }
+    }
+
+    // Returns the index of the signal created.
+    pub fn add_signal(&mut self, name: String, initial_level: bool) -> usize {
+        self.pin_names.push(name);
+        self.initial_levels.push(initial_level);
+        self.pin_names.len() - 1
+    }
+
+    pub fn add_event(&mut self, event: MonitoringEvent) {
+        self.events.push(event)
+    }
+
+    pub fn add_events(&mut self, event: &[MonitoringEvent]) {
+        self.events.extend_from_slice(event)
+    }
+
+    pub fn signal_index(&self, name: &str) -> Option<usize> {
+        self.pin_names.iter().position(|x| x == name)
+    }
+
+    pub fn initial_levels(&self) -> Vec<bool> {
+        self.initial_levels.clone()
+    }
+
+    pub fn set_final_timestamp(&mut self, ts: u64) {
+        self.final_timestamp = ts;
+    }
+
+    pub fn timestamp_to_ns(&self, timestamp: u64) -> u64 {
+        (timestamp - self.initial_timestamp) * 1000000000u64 / self.resolution
+    }
+
+    pub fn ns_to_timestamp(&self, ns: u64) -> u64 {
+        self.initial_timestamp + self.resolution * ns / 1000000000u64
+    }
 
-        vcd
+    pub fn all_events(&self) -> impl Iterator<Item = &MonitoringEvent> {
+        self.events.iter()
+    }
+
+    pub fn sort_events(&mut self) {
+        self.events.sort_by(|a, b| a.timestamp.cmp(&b.timestamp));
+    }
+
+    // This function assumes that the events are sorted.
+    pub fn dump_vcd(&self) -> Result<String> {
+        let pin_names = self
+            .pin_names
+            .iter()
+            .map(|n| Some(n.to_string()))
+            .collect::<Vec<_>>();
+        dump_vcd(&vcd_from_edges(
+            pin_names,
+            self.resolution,
+            self.initial_timestamp,
+            &self.initial_levels,
+            &self.events,
+            self.final_timestamp,
+        )?)
     }
 }
 
@@ -151,11 +234,13 @@ impl Drop for GpioMon<'_> {
         };
         if self.dump_on_drop {
             if error {
-                log::error!("an error occured when reading the monitoring events, some events have been lost");
+                log::error!(
+                    "an error occured when reading the monitoring events, some events have been lost"
+                );
             }
             log::info!(
                 "====[ VCD dump ]====\n{}\n====[ end dump ]====",
-                self.dump_vcd()
+                self.dump_vcd().unwrap()
             );
         }
     }
diff --git a/sw/host/opentitanlib/src/test_utils/i2c_target.rs b/sw/host/opentitanlib/src/test_utils/i2c_target.rs
index f1fe6c247a0af..a7efb6a1b2a46 100644
--- a/sw/host/opentitanlib/src/test_utils/i2c_target.rs
+++ b/sw/host/opentitanlib/src/test_utils/i2c_target.rs
@@ -7,7 +7,7 @@ use std::time::Duration;
 
 use crate::io::uart::Uart;
 use crate::test_utils::e2e_command::TestCommand;
-use crate::test_utils::rpc::{UartRecv, UartSend};
+use crate::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use crate::test_utils::status::Status;
 
 // Bring in the auto-generated sources.
@@ -17,7 +17,7 @@ impl I2cTargetAddress {
     pub fn write(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::I2cTargetAddress.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -42,7 +42,7 @@ impl I2cTransferStart {
         TestCommand::I2cStartTransferRead.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
         f()?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 
@@ -52,7 +52,7 @@ impl I2cTransferStart {
     {
         TestCommand::I2cStartTransferWrite.send_with_crc(uart)?;
         f()?;
-        Self::recv(uart, Duration::from_secs(300), false)
+        Self::recv(uart, Duration::from_secs(300), false, false)
     }
 
     pub fn execute_write_slow<F>(uart: &dyn Uart, f: F) -> Result<Self>
@@ -61,7 +61,7 @@ impl I2cTransferStart {
     {
         TestCommand::I2cStartTransferWriteSlow.send_with_crc(uart)?;
         f()?;
-        Self::recv(uart, Duration::from_secs(300), false)
+        Self::recv(uart, Duration::from_secs(300), false, false)
     }
 
     pub fn execute_write_read<F>(&self, uart: &dyn Uart, f: F) -> Result<Self>
@@ -71,15 +71,15 @@ impl I2cTransferStart {
         TestCommand::I2cStartTransferWriteRead.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
         f()?;
-        Self::recv(uart, Duration::from_secs(300), false)
+        Self::recv(uart, Duration::from_secs(300), false, false)
     }
 }
 
 impl I2cTestConfig {
     pub fn write(&self, uart: &dyn Uart) -> Result<()> {
-        TestCommand::I2cTestConfig.send(uart)?;
-        self.send(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        TestCommand::I2cTestConfig.send_with_crc(uart)?;
+        self.send_with_crc(uart)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/test_utils/init.rs b/sw/host/opentitanlib/src/test_utils/init.rs
index de08d42ea1883..1702f4ef7ff3d 100644
--- a/sw/host/opentitanlib/src/test_utils/init.rs
+++ b/sw/host/opentitanlib/src/test_utils/init.rs
@@ -6,7 +6,6 @@ use anyhow::Result;
 use clap::Args;
 use directories::ProjectDirs;
 use log::LevelFilter;
-use serde_annotate::Annotate;
 use std::env::ArgsOs;
 use std::ffi::OsString;
 use std::io::ErrorKind;
@@ -107,7 +106,10 @@ impl InitializeTest {
 
     // Print the result of a command.
     // If there is an error and `RUST_BACKTRACE=1`, print a backtrace.
-    pub fn print_result(operation: &str, result: Result<Option<Box<dyn Annotate>>>) -> Result<()> {
+    pub fn print_result(
+        operation: &str,
+        result: Result<Option<Box<dyn erased_serde::Serialize>>>,
+    ) -> Result<()> {
         match result {
             Ok(Some(value)) => {
                 log::info!("{}: success.", operation);
diff --git a/sw/host/opentitanlib/src/test_utils/lc.rs b/sw/host/opentitanlib/src/test_utils/lc.rs
index acdfe411d653e..0cd45728a339a 100644
--- a/sw/host/opentitanlib/src/test_utils/lc.rs
+++ b/sw/host/opentitanlib/src/test_utils/lc.rs
@@ -5,8 +5,9 @@
 use std::time::Duration;
 
 use anyhow::Result;
+use arrayvec::ArrayVec;
 
-use crate::app::TransportWrapper;
+use crate::app::{TransportWrapper, UartRx};
 use crate::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg, LcCtrlStatus};
 use crate::io::jtag::{JtagParams, JtagTap};
 use crate::test_utils::lc_transition::wait_for_status;
@@ -14,14 +15,13 @@ use crate::test_utils::lc_transition::wait_for_status;
 pub fn read_lc_state(
     transport: &TransportWrapper,
     jtag_params: &JtagParams,
-    reset_delay: Duration,
 ) -> Result<DifLcCtrlState> {
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
 
     // Apply bootstrap pin to be able to connect to JTAG when ROM execution is
     // enabled.
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = jtag_params.create(transport)?.connect(JtagTap::LcTap)?;
     // We must wait for the lc_ctrl to initialize before the LC state is exposed.
     wait_for_status(
@@ -35,3 +35,38 @@ pub fn read_lc_state(
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
     DifLcCtrlState::from_redundant_encoding(raw_lc_state)
 }
+
+pub fn read_device_id(
+    transport: &TransportWrapper,
+    jtag_params: &JtagParams,
+) -> Result<ArrayVec<u32, 8>> {
+    transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
+
+    // Apply bootstrap pin to be able to connect to JTAG when ROM execution is
+    // enabled.
+    transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
+    transport.reset(UartRx::Clear)?;
+    let mut jtag = jtag_params.create(transport)?.connect(JtagTap::LcTap)?;
+    // We must wait for the lc_ctrl to initialize before the LC state is exposed.
+    wait_for_status(
+        &mut *jtag,
+        Duration::from_secs(1),
+        LcCtrlStatus::INITIALIZED,
+    )?;
+
+    let mut device_id = ArrayVec::<u32, 8>::new();
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId0)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId1)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId2)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId3)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId4)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId5)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId6)?);
+    device_id.push(jtag.read_lc_ctrl_reg(&LcCtrlReg::DeviceId7)?);
+
+    jtag.disconnect()?;
+    transport.pin_strapping("PINMUX_TAP_LC")?.remove()?;
+    transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
+
+    Ok(device_id)
+}
diff --git a/sw/host/opentitanlib/src/test_utils/lc_transition.rs b/sw/host/opentitanlib/src/test_utils/lc_transition.rs
index a376bcdb5173b..ac045506d7741 100644
--- a/sw/host/opentitanlib/src/test_utils/lc_transition.rs
+++ b/sw/host/opentitanlib/src/test_utils/lc_transition.rs
@@ -5,11 +5,11 @@
 use std::iter;
 use std::time::Duration;
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use serde::{Deserialize, Serialize};
 use thiserror::Error;
 
-use crate::app::TransportWrapper;
+use crate::app::{TransportWrapper, UartRx};
 use crate::chip::boolean::MultiBitBool8;
 use crate::dif::lc_ctrl::{
     DifLcCtrlState, LcCtrlReg, LcCtrlStatus, LcCtrlTransitionCmd, LcCtrlTransitionCtrl,
@@ -46,6 +46,37 @@ pub enum LcTransitionError {
 }
 impl_serializable_error!(LcTransitionError);
 
+pub fn claim_lc_mutex(jtag: &mut dyn Jtag, claim: bool) -> Result<()> {
+    if claim {
+        // Check the LC transition mutex has not been claimed yet.
+        if jtag.read_lc_ctrl_reg(&LcCtrlReg::ClaimTransitionIf)?
+            == u8::from(MultiBitBool8::True) as u32
+        {
+            return Err(LcTransitionError::MutexAlreadyClaimed.into());
+        }
+
+        // Attempt to claim the LC transition mutex.
+        jtag.write_lc_ctrl_reg(
+            &LcCtrlReg::ClaimTransitionIf,
+            u8::from(MultiBitBool8::True) as u32,
+        )?;
+
+        // Check the LC transition mutex was claimed.
+        if jtag.read_lc_ctrl_reg(&LcCtrlReg::ClaimTransitionIf)?
+            != u8::from(MultiBitBool8::True) as u32
+        {
+            return Err(LcTransitionError::FailedToClaimMutex.into());
+        }
+    } else {
+        // Release the LC transition mutex.
+        jtag.write_lc_ctrl_reg(
+            &LcCtrlReg::ClaimTransitionIf,
+            u8::from(MultiBitBool8::False) as u32,
+        )?;
+    }
+    Ok(())
+}
+
 fn setup_lc_transition(
     jtag: &mut dyn Jtag,
     target_lc_state: DifLcCtrlState,
@@ -58,23 +89,7 @@ fn setup_lc_transition(
         return Err(LcTransitionError::LcCtrlNotReady(status).into());
     }
 
-    // Check the LC transition mutex has not been claimed yet.
-    if jtag.read_lc_ctrl_reg(&LcCtrlReg::ClaimTransitionIf)? == u8::from(MultiBitBool8::True) as u32
-    {
-        return Err(LcTransitionError::MutexAlreadyClaimed.into());
-    }
-
-    // Attempt to claim the LC transition mutex.
-    jtag.write_lc_ctrl_reg(
-        &LcCtrlReg::ClaimTransitionIf,
-        u8::from(MultiBitBool8::True) as u32,
-    )?;
-
-    // Check the LC transition mutex was claimed.
-    if jtag.read_lc_ctrl_reg(&LcCtrlReg::ClaimTransitionIf)? != u8::from(MultiBitBool8::True) as u32
-    {
-        return Err(LcTransitionError::FailedToClaimMutex.into());
-    }
+    claim_lc_mutex(jtag, true)?;
 
     // Program the target LC state.
     jtag.write_lc_ctrl_reg(
@@ -127,7 +142,7 @@ fn setup_lc_transition(
 /// tap_lc_strapping.apply().expect("failed to apply strapping");
 ///
 /// // Reset into the new strapping.
-/// transport.reset_target(init.bootstrap.options.reset_delay, true).unwrap();
+/// transport.reset(UartRx::Clear).unwrap();
 ///
 /// // Connect to the LC controller TAP.
 /// let mut jtag = transport
@@ -144,7 +159,6 @@ fn setup_lc_transition(
 ///     DifLcCtrlState::Prod,
 ///     Some(test_exit_token.into_register_values()),
 ///     true,
-///     init.bootstrap.options.reset_delay,
 ///     Some(JtagTap::LcTap),
 /// ).expect("failed to trigger transition to prod");
 ///
@@ -165,7 +179,6 @@ pub fn trigger_lc_transition(
     target_lc_state: DifLcCtrlState,
     token: Option<[u32; 4]>,
     use_external_clk: bool,
-    reset_delay: Duration,
     reset_tap_straps: Option<JtagTap>,
 ) -> Result<()> {
     // Wait for the lc_ctrl to become initialized, claim the mutex, and program the target state
@@ -207,7 +220,7 @@ pub fn trigger_lc_transition(
             JtagTap::RiscvTap => transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?,
         }
     }
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     Ok(())
 }
diff --git a/sw/host/opentitanlib/src/test_utils/load_bitstream.rs b/sw/host/opentitanlib/src/test_utils/load_bitstream.rs
index 59b10f6ebca40..4d59fd6cf2d42 100644
--- a/sw/host/opentitanlib/src/test_utils/load_bitstream.rs
+++ b/sw/host/opentitanlib/src/test_utils/load_bitstream.rs
@@ -4,7 +4,6 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::path::{Path, PathBuf};
 use std::time::Duration;
 
@@ -32,7 +31,10 @@ pub struct LoadBitstream {
 }
 
 impl LoadBitstream {
-    pub fn init(&self, transport: &TransportWrapper) -> Result<Option<Box<dyn Annotate>>> {
+    pub fn init(
+        &self,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Clear out existing bitstream, if requested.
         if self.clear_bitstream {
             log::info!("Clearing bitstream.");
@@ -50,7 +52,7 @@ impl LoadBitstream {
         &self,
         transport: &TransportWrapper,
         file: &Path,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         log::info!("Loading bitstream: {:?}", file);
         let payload = std::fs::read(file)?;
         let progress = StagedProgressBar::new();
diff --git a/sw/host/opentitanlib/src/test_utils/load_sram_program.rs b/sw/host/opentitanlib/src/test_utils/load_sram_program.rs
index 0f82c7dfe45d1..2bd6d1e7cf4fa 100644
--- a/sw/host/opentitanlib/src/test_utils/load_sram_program.rs
+++ b/sw/host/opentitanlib/src/test_utils/load_sram_program.rs
@@ -7,8 +7,10 @@ use std::path::PathBuf;
 use std::str::FromStr;
 use std::time::Duration;
 
-use anyhow::{ensure, Context, Result};
-use bindgen::sram_program::{SRAM_MAGIC_SP_CRC_ERROR, SRAM_MAGIC_SP_EXECUTION_DONE};
+use anyhow::{Context, Result, ensure};
+use bindgen::sram_program::{
+    SRAM_MAGIC_SP_CRC_ERROR, SRAM_MAGIC_SP_CRC_SKIPPED, SRAM_MAGIC_SP_EXECUTION_DONE,
+};
 use byteorder::{ByteOrder, LittleEndian, WriteBytesExt};
 use clap::Args;
 use crc::Crc;
@@ -16,6 +18,7 @@ use object::{Object, ObjectSection, ObjectSegment, SectionKind};
 use serde::{Deserialize, Serialize};
 use thiserror::Error;
 
+use crate::chip::boolean::MultiBitBool4;
 use crate::impl_serializable_error;
 use crate::io::jtag::{Jtag, RiscvCsr, RiscvGpr, RiscvReg};
 use crate::util::parse_int::ParseInt;
@@ -37,6 +40,10 @@ pub struct SramProgramParams {
     /// Address where to load the VMEM file.
     #[arg(long, value_parser = <u32 as ParseInt>::from_str, conflicts_with="elf", default_value = None)]
     pub load_addr: Option<u32>,
+
+    /// load the VMEM file.
+    #[arg(long)]
+    pub skip_crc: bool,
 }
 
 /// Describe a file to load to SRAM.
@@ -75,7 +82,7 @@ impl SramProgramParams {
         jtag: &mut dyn Jtag,
         exec_mode: ExecutionMode,
     ) -> Result<ExecutionResult> {
-        load_and_execute_sram_program(jtag, &self.get_file(), exec_mode)
+        load_and_execute_sram_program(jtag, &self.get_file(), exec_mode, self.skip_crc)
     }
 }
 
@@ -385,21 +392,50 @@ pub fn prepare_epmp(jtag: &mut dyn Jtag) -> Result<()> {
     Ok(())
 }
 
+/// Set up the sram_ctrl to execute code.
+pub fn prepare_sram_ctrl(jtag: &mut dyn Jtag) -> Result<()> {
+    const SRAM_CTRL_EXEC_REG_OFFSET: u32 = (top_earlgrey::SRAM_CTRL_MAIN_REGS_BASE_ADDR as u32)
+        + bindgen::dif::SRAM_CTRL_EXEC_REG_OFFSET;
+    log::info!("Enabling execution from SRAM.");
+    let mut sram_ctrl_exec = [0];
+    jtag.read_memory32(SRAM_CTRL_EXEC_REG_OFFSET, &mut sram_ctrl_exec)?;
+    log::info!("Old value of sram_exec_en: {:x}", sram_ctrl_exec[0]);
+    sram_ctrl_exec[0] = u8::from(MultiBitBool4::True) as u32;
+    jtag.write_memory32(SRAM_CTRL_EXEC_REG_OFFSET, &sram_ctrl_exec)?;
+    log::info!("New value of sram_exec_en: {:x}", sram_ctrl_exec[0]);
+    Ok(())
+}
+
 /// Execute an already loaded SRAM program. It takes care of setting up the ePMP.
 pub fn execute_sram_program(
     jtag: &mut dyn Jtag,
     prog_info: &SramProgramInfo,
     exec_mode: ExecutionMode,
+    skip_crc: bool,
 ) -> Result<ExecutionResult> {
     prepare_epmp(jtag)?;
+    prepare_sram_ctrl(jtag)?;
+
     // To avoid unexpected behaviors, we always make sure that the return address
     // points to an invalid address.
     let ret_addr = 0xdeadbeefu32;
     log::info!("set RA to {:x}", ret_addr);
     jtag.write_riscv_reg(&RiscvReg::Gpr(RiscvGpr::RA), ret_addr)?;
-    // The SRAM program loader expects the CRC32 value in a0
-    log::info!("set A0 to {:x} (crc32)", prog_info.crc32);
-    jtag.write_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A0), prog_info.crc32)?;
+
+    // Potentially skip CRC check.
+    if skip_crc {
+        // The SRAM program loader will skip the CRC32 check if a0 is a magic value.
+        log::info!(
+            "skip CRC by setting A0 to {:x} (crc32)",
+            SRAM_MAGIC_SP_CRC_SKIPPED
+        );
+        jtag.write_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A0), SRAM_MAGIC_SP_CRC_SKIPPED)?;
+    } else {
+        // The SRAM program loader expects the CRC32 value in a0
+        log::info!("set A0 to {:x} (crc32)", prog_info.crc32);
+        jtag.write_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A0), prog_info.crc32)?;
+    }
+
     // OpenOCD takes care of invalidating the cache when resuming execution
     match exec_mode {
         ExecutionMode::Jump => {
@@ -421,11 +457,10 @@ pub fn execute_sram_program(
             // The SRAM's crt has a protocol to notify us that execution returned: it sets
             // the stack pointer to a certain value.
             let sp = jtag.read_riscv_reg(&RiscvReg::Gpr(RiscvGpr::SP))?;
+            log::info!("after timeout, sp = {:x}", sp);
             match sp {
-                SRAM_MAGIC_SP_EXECUTION_DONE => {
-                    let a0 = jtag.read_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A0))?;
-                    Ok(ExecutionResult::ExecutionDone(a0))
-                }
+                SRAM_MAGIC_SP_EXECUTION_DONE => Ok(ExecutionResult::ExecutionDone(sp)),
+                SRAM_MAGIC_SP_CRC_SKIPPED => Ok(ExecutionResult::ExecutionDone(sp)),
                 SRAM_MAGIC_SP_CRC_ERROR => {
                     Ok(ExecutionResult::ExecutionError(ExecutionError::CrcMismatch))
                 }
@@ -440,7 +475,9 @@ pub fn load_and_execute_sram_program(
     jtag: &mut dyn Jtag,
     file: &SramProgramFile,
     exec_mode: ExecutionMode,
+    skip_crc: bool,
 ) -> Result<ExecutionResult> {
     let prog_info = load_sram_program(jtag, file)?;
-    execute_sram_program(jtag, &prog_info, exec_mode)
+    // Never skip CRC check outside of a test.
+    execute_sram_program(jtag, &prog_info, exec_mode, skip_crc)
 }
diff --git a/sw/host/opentitanlib/src/test_utils/mem.rs b/sw/host/opentitanlib/src/test_utils/mem.rs
index c68ca26237d13..e698db351ecbf 100644
--- a/sw/host/opentitanlib/src/test_utils/mem.rs
+++ b/sw/host/opentitanlib/src/test_utils/mem.rs
@@ -6,26 +6,32 @@ use anyhow::Result;
 use arrayvec::ArrayVec;
 use std::time::Duration;
 
-use crate::io::uart::Uart;
+use crate::io::console::ConsoleDevice;
 use crate::test_utils::e2e_command::TestCommand;
-use crate::test_utils::rpc::{UartRecv, UartSend};
+use crate::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use crate::test_utils::status::Status;
 
 // Bring in the auto-generated sources.
 include!(env!("mem"));
 
 impl MemRead32Req {
-    pub fn execute(uart: &dyn Uart, address: u32) -> Result<u32> {
-        TestCommand::MemRead32.send_with_crc(uart)?;
+    pub fn execute<T>(device: &T, address: u32) -> Result<u32>
+    where
+        T: ConsoleDevice + ?Sized,
+    {
+        TestCommand::MemRead32.send_with_crc(device)?;
         let op = MemRead32Req { address };
-        op.send_with_crc(uart)?;
-        let resp = MemRead32Resp::recv(uart, Duration::from_secs(300), false)?;
+        op.send_with_crc(device)?;
+        let resp = MemRead32Resp::recv(device, Duration::from_secs(300), false, false)?;
         Ok(resp.value)
     }
 }
 
 impl MemReadReq {
-    pub fn execute(uart: &dyn Uart, start_address: u32, data: &mut [u8]) -> Result<()> {
+    pub fn execute<T>(device: &T, start_address: u32, data: &mut [u8]) -> Result<()>
+    where
+        T: ConsoleDevice + ?Sized,
+    {
         let bytes_to_read = data.len();
         let mut bytes_read = 0_usize;
         while bytes_read < bytes_to_read {
@@ -34,13 +40,13 @@ impl MemReadReq {
                 data: ArrayVec::new(),
             };
             let op_size = std::cmp::min(bytes_to_read - bytes_read, size_check.data.capacity());
-            TestCommand::MemRead.send_with_crc(uart)?;
+            TestCommand::MemRead.send_with_crc(device)?;
             let op = MemReadReq {
                 address: start_address + (bytes_read as u32),
                 data_len: op_size.try_into().unwrap(),
             };
-            op.send_with_crc(uart)?;
-            let resp = MemReadResp::recv(uart, Duration::from_secs(300), false)?;
+            op.send_with_crc(device)?;
+            let resp = MemReadResp::recv(device, Duration::from_secs(300), false, false)?;
             data[bytes_read..(bytes_read + op_size)].copy_from_slice(resp.data.as_slice());
             bytes_read += op_size;
         }
@@ -49,21 +55,27 @@ impl MemReadReq {
 }
 
 impl MemWrite32Req {
-    pub fn execute(uart: &dyn Uart, address: u32, value: u32) -> Result<()> {
-        TestCommand::MemWrite32.send_with_crc(uart)?;
+    pub fn execute<T>(device: &T, address: u32, value: u32) -> Result<()>
+    where
+        T: ConsoleDevice + ?Sized,
+    {
+        TestCommand::MemWrite32.send_with_crc(device)?;
         let op = MemWrite32Req { address, value };
-        op.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        op.send_with_crc(device)?;
+        Status::recv(device, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
 
 impl MemWriteReq {
-    pub fn execute(uart: &dyn Uart, start_address: u32, data: &[u8]) -> Result<()> {
+    pub fn execute<T>(device: &T, start_address: u32, data: &[u8]) -> Result<()>
+    where
+        T: ConsoleDevice + ?Sized,
+    {
         let bytes_to_write = data.len();
         let mut bytes_written = 0_usize;
         while bytes_written < bytes_to_write {
-            TestCommand::MemWrite.send_with_crc(uart)?;
+            TestCommand::MemWrite.send_with_crc(device)?;
             let mut op = MemWriteReq {
                 address: start_address + (bytes_written as u32),
                 data_len: 0,
@@ -73,8 +85,8 @@ impl MemWriteReq {
             op.data
                 .try_extend_from_slice(&data[bytes_written..(bytes_written + op_size)])?;
             op.data_len = op_size.try_into().unwrap();
-            op.send_with_crc(uart)?;
-            let _ = Status::recv(uart, Duration::from_secs(300), false)?;
+            op.send_with_crc(device)?;
+            let _ = Status::recv(device, Duration::from_secs(300), false, false)?;
             bytes_written += op_size;
         }
         Ok(())
diff --git a/sw/host/opentitanlib/src/test_utils/mod.rs b/sw/host/opentitanlib/src/test_utils/mod.rs
index 1f54a0db03f2c..7b018fbcf6bd7 100644
--- a/sw/host/opentitanlib/src/test_utils/mod.rs
+++ b/sw/host/opentitanlib/src/test_utils/mod.rs
@@ -4,6 +4,7 @@
 
 pub mod bitbanging;
 pub mod bootstrap;
+pub mod crashdump;
 pub mod e2e_command;
 pub mod epmp;
 // The "english breakfast" variant of the chip doesn't have the same
diff --git a/sw/host/opentitanlib/src/test_utils/otp_ctrl.rs b/sw/host/opentitanlib/src/test_utils/otp_ctrl.rs
index 639ef30fbb5a7..80d9b42076fa4 100644
--- a/sw/host/opentitanlib/src/test_utils/otp_ctrl.rs
+++ b/sw/host/opentitanlib/src/test_utils/otp_ctrl.rs
@@ -11,7 +11,7 @@
 use std::mem;
 use std::time::Duration;
 
-use anyhow::{bail, Context};
+use anyhow::{Context, bail};
 use thiserror::Error;
 
 use top_earlgrey::top_earlgrey;
diff --git a/sw/host/opentitanlib/src/test_utils/pinmux_config.rs b/sw/host/opentitanlib/src/test_utils/pinmux_config.rs
index 829f177f9b669..b989389aa0df4 100644
--- a/sw/host/opentitanlib/src/test_utils/pinmux_config.rs
+++ b/sw/host/opentitanlib/src/test_utils/pinmux_config.rs
@@ -2,79 +2,85 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use std::cmp;
 use std::collections::HashMap;
 use std::time::Duration;
 
+use anyhow::Result;
+
 use crate::chip::autogen::earlgrey::{PinmuxInsel, PinmuxMioOut, PinmuxOutsel, PinmuxPeripheralIn};
+use crate::dif::pinmux::PinmuxPadAttr;
 use crate::io::uart::Uart;
 use crate::test_utils::e2e_command::TestCommand;
-use crate::test_utils::rpc::{UartRecv, UartSend};
+use crate::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use crate::test_utils::status::Status;
 
 // Bring in the auto-generated sources.
 use crate::chip::autogen::earlgrey::ujson_alias::*;
 include!(env!("pinmux_config"));
 
-impl Default for PinmuxConfig {
-    fn default() -> Self {
-        Self {
-            input: PinmuxInputSelection {
-                peripheral: Default::default(),
-                selector: Default::default(),
-            },
-            output: PinmuxOutputSelection {
-                mio: Default::default(),
-                selector: Default::default(),
-            },
-        }
-    }
-}
+/// Capacity of a single configuration message.
+const CONFIG_CAP: usize = 16;
 
 impl PinmuxConfig {
     pub fn configure(
         uart: &dyn Uart,
         inputs: Option<&HashMap<PinmuxPeripheralIn, PinmuxInsel>>,
         outputs: Option<&HashMap<PinmuxMioOut, PinmuxOutsel>>,
+        attrs: Option<&HashMap<PinmuxMioOut, PinmuxPadAttr>>,
     ) -> Result<()> {
         // The PinmuxConfig struct can carry a limited number of input
         // and output configurations.  We'll take the whole config and
         // chunk it into as many PinmuxConfig commands as necessary.
 
-        let len = std::cmp::max(
-            inputs.map(|h| h.len()).unwrap_or(0),
-            outputs.map(|h| h.len()).unwrap_or(0),
-        );
+        let mut inputs: Vec<_> = inputs
+            .into_iter()
+            .flat_map(HashMap::iter)
+            .map(|(&key, &value)| (key, value))
+            .collect();
+        let mut outputs: Vec<_> = outputs
+            .into_iter()
+            .flat_map(HashMap::iter)
+            .map(|(&key, &value)| (key, value))
+            .collect();
+        let mut attrs: Vec<_> = attrs
+            .into_iter()
+            .flat_map(HashMap::iter)
+            .map(|(&key, &value)| (key, value.bits()))
+            .collect();
+
+        let len = cmp::max(cmp::max(inputs.len(), outputs.len()), attrs.len())
+            .next_multiple_of(CONFIG_CAP);
+
+        inputs.resize_with(len, Default::default);
+        outputs.resize_with(len, Default::default);
+        attrs.resize_with(len, Default::default);
 
-        let df_ik = PinmuxPeripheralIn::default();
-        let df_iv = PinmuxInsel::default();
-        let df_ok = PinmuxMioOut::default();
-        let df_ov = PinmuxOutsel::default();
+        while !inputs.is_empty() && !outputs.is_empty() && !attrs.is_empty() {
+            let (in_peripherals, in_selectors) = inputs.drain(..CONFIG_CAP).unzip();
+            let (out_mios, out_selectors) = outputs.drain(..CONFIG_CAP).unzip();
+            let (attr_mios, attr_flags) = attrs.drain(..CONFIG_CAP).unzip();
+
+            let config = PinmuxConfig {
+                input: PinmuxInputSelection {
+                    peripheral: in_peripherals,
+                    selector: in_selectors,
+                },
+                output: PinmuxOutputSelection {
+                    mio: out_mios,
+                    selector: out_selectors,
+                },
+                attrs: PinmuxAttrConfig {
+                    mio: attr_mios,
+                    flags: attr_flags,
+                },
+            };
 
-        let mut inputs = inputs.map(|h| h.iter());
-        let mut outputs = outputs.map(|h| h.iter());
-        let mut i = 0;
-        while i < len {
-            let mut config = Self::default();
-            for _ in 0..config.input.peripheral.capacity() {
-                let (ik, iv) = inputs
-                    .as_mut()
-                    .and_then(|i| i.next())
-                    .unwrap_or((&df_ik, &df_iv));
-                let (ok, ov) = outputs
-                    .as_mut()
-                    .and_then(|i| i.next())
-                    .unwrap_or((&df_ok, &df_ov));
-                config.input.peripheral.push(*ik);
-                config.input.selector.push(*iv);
-                config.output.mio.push(*ok);
-                config.output.selector.push(*ov);
-                i += 1;
-            }
             TestCommand::PinmuxConfig.send(uart)?;
             config.send(uart)?;
-            Status::recv(uart, Duration::from_secs(300), false)?;
+            Status::recv(uart, Duration::from_secs(300), false, false)?;
         }
+
         Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/test_utils/rpc.rs b/sw/host/opentitanlib/src/test_utils/rpc.rs
index 988cd23d8d3cb..62175cb8eaabb 100644
--- a/sw/host/opentitanlib/src/test_utils/rpc.rs
+++ b/sw/host/opentitanlib/src/test_utils/rpc.rs
@@ -1,54 +1,109 @@
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
-use anyhow::{anyhow, Result};
-use crc::{Crc, CRC_32_ISO_HDLC};
+use anyhow::{Result, anyhow};
+use crc::{CRC_32_ISO_HDLC, Crc};
 use regex::Regex;
-use serde::de::DeserializeOwned;
 use serde::Serialize;
+use serde::de::DeserializeOwned;
 use std::io::Write;
 use std::time::Duration;
 
-use crate::io::uart::{Uart, UartError};
+use crate::io::console::{ConsoleDevice, ConsoleError};
 use crate::test_utils::status::Status;
 use crate::uart::console::{ExitStatus, UartConsole};
 
 // Bring in the auto-generated sources.
 include!(env!("ottf"));
 
-pub trait UartSend {
-    fn send(&self, uart: &dyn Uart) -> Result<()>;
-
-    fn send_with_crc(&self, uart: &dyn Uart) -> Result<()>;
+pub trait ConsoleSend<T>
+where
+    T: ConsoleDevice + ?Sized,
+{
+    fn send(&self, device: &T) -> Result<String>;
+    fn send_with_crc(&self, device: &T) -> Result<String>;
+    fn send_with_padding(&self, device: &T, max_size: usize) -> Result<String>;
+    fn send_with_padding_and_crc(&self, device: &T, max_size: usize, quiet: bool)
+    -> Result<String>;
 }
 
-impl<T: Serialize> UartSend for T {
-    fn send(&self, uart: &dyn Uart) -> Result<()> {
+impl<T, U> ConsoleSend<T> for U
+where
+    T: ConsoleDevice + ?Sized,
+    U: Serialize,
+{
+    fn send(&self, device: &T) -> Result<String> {
         let s = serde_json::to_string(self)?;
         log::info!("Sending: {}", s);
-        uart.write(s.as_bytes())?;
-        Ok(())
+        device.console_write(s.as_bytes())?;
+        Ok(s)
     }
 
-    fn send_with_crc(&self, uart: &dyn Uart) -> Result<()> {
+    fn send_with_crc(&self, device: &T) -> Result<String> {
         let s = serde_json::to_string(self)?;
         log::info!("Sending: {}", s);
-        uart.write(s.as_bytes())?;
+        device.console_write(s.as_bytes())?;
+        let actual_crc = OttfCrc {
+            crc: Crc::<u32>::new(&CRC_32_ISO_HDLC).checksum(s.as_bytes()),
+        };
+        let crc_s = actual_crc.send(device)?;
+        Ok(s + &crc_s)
+    }
+
+    fn send_with_padding(&self, device: &T, max_size: usize) -> Result<String> {
+        let mut s = serde_json::to_string(self)?;
+        let pad_len = max_size - s.len();
+        let pad_str = ' '.to_string().repeat(pad_len);
+        s.insert_str(s.len() - 1, &pad_str);
+        device.console_write(s.as_bytes())?;
+        Ok(s)
+    }
+
+    fn send_with_padding_and_crc(
+        &self,
+        device: &T,
+        max_size: usize,
+        quiet: bool,
+    ) -> Result<String> {
+        // Craft the UJSON string and pad with whitespace.
+        let mut s = serde_json::to_string(self)?;
+        let pad_len = max_size - s.len();
+        let pad_str = ' '.to_string().repeat(pad_len);
+        s.insert_str(s.len() - 1, &pad_str);
+        // Craft the CRC and pad with whitespace.
         let actual_crc = OttfCrc {
             crc: Crc::<u32>::new(&CRC_32_ISO_HDLC).checksum(s.as_bytes()),
         };
-        actual_crc.send(uart)
+        let max_crc = OttfCrc { crc: u32::MAX };
+        let mut crc_s = serde_json::to_string(&actual_crc)?;
+        let max_crc_s = serde_json::to_string(&max_crc)?;
+        let crc_pad_str = ' '.to_string().repeat(max_crc_s.len() - crc_s.len());
+        crc_s.insert_str(crc_s.len() - 1, &crc_pad_str);
+        // Send bytes to the DUT.
+        if !quiet {
+            log::info!("Sending: {}", s.clone() + &crc_s);
+        }
+        device.console_write(s.as_bytes())?;
+        device.console_write(crc_s.as_bytes())?;
+        Ok(s + &crc_s)
     }
 }
 
-pub trait UartRecv {
-    fn recv(uart: &dyn Uart, timeout: Duration, quiet: bool) -> Result<Self>
+pub trait ConsoleRecv<T>
+where
+    T: ConsoleDevice + ?Sized,
+{
+    fn recv(device: &T, timeout: Duration, quiet: bool, skip_crc: bool) -> Result<Self>
     where
         Self: Sized;
 }
 
-impl<T: DeserializeOwned> UartRecv for T {
-    fn recv(uart: &dyn Uart, timeout: Duration, quiet: bool) -> Result<Self>
+impl<T, U> ConsoleRecv<T> for U
+where
+    T: ConsoleDevice + ?Sized,
+    U: DeserializeOwned,
+{
+    fn recv(device: &T, timeout: Duration, quiet: bool, skip_crc: bool) -> Result<Self>
     where
         Self: Sized,
     {
@@ -67,7 +122,7 @@ impl<T: DeserializeOwned> UartRecv for T {
         } else {
             None
         };
-        let result = console.interact(uart, None, out)?;
+        let result = console.interact(device, None, out)?;
         println!();
         match result {
             ExitStatus::ExitSuccess => {
@@ -76,7 +131,9 @@ impl<T: DeserializeOwned> UartRecv for T {
                     .expect("RESP_OK capture");
                 let json_str = cap.get(1).expect("RESP_OK group").as_str();
                 let crc_str = cap.get(2).expect("CRC group").as_str();
-                check_crc(json_str, crc_str)?;
+                if !skip_crc {
+                    check_crc(json_str, crc_str)?;
+                }
                 Ok(serde_json::from_str::<Self>(json_str)?)
             }
             ExitStatus::ExitFailure => {
@@ -89,7 +146,7 @@ impl<T: DeserializeOwned> UartRecv for T {
                 let err = serde_json::from_str::<Status>(json_str)?;
                 Err(err.into())
             }
-            ExitStatus::Timeout => Err(UartError::GenericError("Timed Out".into()).into()),
+            ExitStatus::Timeout => Err(ConsoleError::GenericError("Timed Out".into()).into()),
             _ => Err(anyhow!("Impossible result: {:?}", result)),
         }
     }
@@ -99,7 +156,9 @@ fn check_crc(json_str: &str, crc_str: &str) -> Result<()> {
     let crc = crc_str.parse::<u32>()?;
     let actual_crc = Crc::<u32>::new(&CRC_32_ISO_HDLC).checksum(json_str.as_bytes());
     if crc != actual_crc {
-        return Err(UartError::GenericError("CRC didn't match received json body.".into()).into());
+        return Err(
+            ConsoleError::GenericError("CRC didn't match received json body.".into()).into(),
+        );
     }
     Ok(())
 }
diff --git a/sw/host/opentitanlib/src/test_utils/spi_passthru.rs b/sw/host/opentitanlib/src/test_utils/spi_passthru.rs
index 1119643955b82..5984aeeadf467 100644
--- a/sw/host/opentitanlib/src/test_utils/spi_passthru.rs
+++ b/sw/host/opentitanlib/src/test_utils/spi_passthru.rs
@@ -7,7 +7,7 @@ use std::time::Duration;
 
 use crate::io::uart::Uart;
 use crate::test_utils::e2e_command::TestCommand;
-use crate::test_utils::rpc::{UartRecv, UartSend};
+use crate::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use crate::test_utils::status::Status;
 
 // Bring in the auto-generated sources.
@@ -17,7 +17,7 @@ impl ConfigJedecId {
     pub fn execute(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiConfigureJedecId.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -25,13 +25,13 @@ impl ConfigJedecId {
 impl StatusRegister {
     pub fn read(uart: &dyn Uart) -> Result<Self> {
         TestCommand::SpiReadStatus.send_with_crc(uart)?;
-        Self::recv(uart, Duration::from_secs(300), false)
+        Self::recv(uart, Duration::from_secs(300), false, false)
     }
 
     pub fn write(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiWriteStatus.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -40,7 +40,7 @@ impl SfdpData {
     pub fn write(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiWriteSfdp.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -52,14 +52,14 @@ impl UploadInfo {
     {
         TestCommand::SpiWaitForUpload.send_with_crc(uart)?;
         f()?;
-        Self::recv(uart, Duration::from_secs(300), false)
+        Self::recv(uart, Duration::from_secs(300), false, false)
     }
 }
 
 impl SpiFlashReadId {
     pub fn execute(uart: &dyn Uart) -> Result<Self> {
         TestCommand::SpiFlashReadId.send_with_crc(uart)?;
-        let data = SpiFlashReadId::recv(uart, Duration::from_secs(300), false)?;
+        let data = SpiFlashReadId::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(data)
     }
 }
@@ -68,7 +68,7 @@ impl SpiFlashReadSfdp {
     pub fn execute(&self, uart: &dyn Uart) -> Result<SfdpData> {
         TestCommand::SpiFlashReadSfdp.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        let sfdp = SfdpData::recv(uart, Duration::from_secs(300), false)?;
+        let sfdp = SfdpData::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(sfdp)
     }
 }
@@ -77,7 +77,7 @@ impl SpiFlashEraseSector {
     pub fn execute(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiFlashEraseSector.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -86,7 +86,7 @@ impl SpiFlashWrite {
     pub fn execute(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiFlashWrite.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -95,7 +95,7 @@ impl SpiPassthruSwapMap {
     pub fn apply_address_swap(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiPassthruSetAddressMap.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -104,13 +104,13 @@ impl SpiMailboxMap {
     pub fn apply(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiMailboxMap.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 
     pub fn disable(uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiMailboxUnmap.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
@@ -119,7 +119,7 @@ impl SpiMailboxWrite {
     pub fn execute(&self, uart: &dyn Uart) -> Result<()> {
         TestCommand::SpiMailboxWrite.send_with_crc(uart)?;
         self.send_with_crc(uart)?;
-        Status::recv(uart, Duration::from_secs(300), false)?;
+        Status::recv(uart, Duration::from_secs(300), false, false)?;
         Ok(())
     }
 }
diff --git a/sw/host/opentitanlib/src/tpm/driver.rs b/sw/host/opentitanlib/src/tpm/driver.rs
index 6c9f8ffc708b5..4b8c991880a44 100644
--- a/sw/host/opentitanlib/src/tpm/driver.rs
+++ b/sw/host/opentitanlib/src/tpm/driver.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use clap::ValueEnum;
 use serde::{Deserialize, Serialize};
 use std::borrow::Borrow;
@@ -104,8 +104,7 @@ pub trait Driver {
         let sz = self
             .poll_for_data_available()?
             .burst_count()
-            .max(RESPONSE_HEADER_SIZE)
-            .min(MAX_TRANSACTION_SIZE);
+            .clamp(RESPONSE_HEADER_SIZE, MAX_TRANSACTION_SIZE);
         let mut result: Vec<u8> = vec![0; sz];
         self.read_register(Register::DATA_FIFO, result.as_mut_slice())?;
         let resp_size: usize = u32::from_be_bytes(result[2..6].try_into().unwrap()) as usize;
@@ -278,6 +277,7 @@ impl SpiDriver {
                 if Instant::now().duration_since(start_time) > TIMEOUT {
                     bail!(TpmError::Timeout)
                 }
+                thread::sleep(Duration::from_millis(1));
             }
         }
         Ok(())
diff --git a/sw/host/opentitanlib/src/transport/chip_whisperer/mod.rs b/sw/host/opentitanlib/src/transport/chip_whisperer/mod.rs
index 274afa8adeb12..7ce2c64a9e720 100644
--- a/sw/host/opentitanlib/src/transport/chip_whisperer/mod.rs
+++ b/sw/host/opentitanlib/src/transport/chip_whisperer/mod.rs
@@ -2,13 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
-use serde_annotate::Annotate;
+use anyhow::{Result, ensure};
 use serialport::SerialPortType;
 use std::any::Any;
 use std::cell::RefCell;
-use std::collections::hash_map::Entry;
 use std::collections::HashMap;
+use std::collections::hash_map::Entry;
 use std::rc::Rc;
 
 use crate::io::gpio::GpioPin;
@@ -139,7 +138,7 @@ impl<B: Board + 'static> Transport for ChipWhisperer<B> {
         Ok(Rc::clone(inner.spi.as_ref().unwrap()))
     }
 
-    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn Annotate>>> {
+    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(fpga_program) = action.downcast_ref::<FpgaProgram>() {
             // Program the FPGA bitstream.
             log::info!("Programming the FPGA bitstream.");
diff --git a/sw/host/opentitanlib/src/transport/chip_whisperer/spi.rs b/sw/host/opentitanlib/src/transport/chip_whisperer/spi.rs
index e021a61fcefdb..8d132b9179353 100644
--- a/sw/host/opentitanlib/src/transport/chip_whisperer/spi.rs
+++ b/sw/host/opentitanlib/src/transport/chip_whisperer/spi.rs
@@ -8,8 +8,8 @@ use std::rc::Rc;
 
 use crate::io::gpio;
 use crate::io::spi::{AssertChipSelect, MaxSizes, SpiError, Target, Transfer, TransferMode};
-use crate::transport::chip_whisperer::usb::Backend;
 use crate::transport::TransportError;
+use crate::transport::chip_whisperer::usb::Backend;
 
 use super::board::Board;
 
diff --git a/sw/host/opentitanlib/src/transport/chip_whisperer/usb.rs b/sw/host/opentitanlib/src/transport/chip_whisperer/usb.rs
index 50a122572daef..760cdbeb3756e 100644
--- a/sw/host/opentitanlib/src/transport/chip_whisperer/usb.rs
+++ b/sw/host/opentitanlib/src/transport/chip_whisperer/usb.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use once_cell::sync::Lazy;
 use std::cmp;
 use std::collections::HashMap;
@@ -120,15 +120,27 @@ impl<B: Board> Backend<B> {
 
     /// Send a control write transaction to the Chip Whisperer board.
     pub fn send_ctrl(&self, cmd: u8, value: u16, data: &[u8]) -> Result<usize> {
-        log::debug!("WRITE_CTRL: bmRequestType: {:02x}, bRequest: {:02x}, wValue: {:04x}, wIndex: {:04x}, data: {:?}",
-                0x41, cmd, value, 0, data);
+        log::debug!(
+            "WRITE_CTRL: bmRequestType: {:02x}, bRequest: {:02x}, wValue: {:04x}, wIndex: {:04x}, data: {:?}",
+            0x41,
+            cmd,
+            value,
+            0,
+            data
+        );
         self.usb.write_control(0x41, cmd, value, 0, data)
     }
 
     /// Send a control read transaction to the Chip Whisperer board.
     pub fn read_ctrl(&self, cmd: u8, value: u16, data: &mut [u8]) -> Result<usize> {
-        log::debug!("READ_CTRL: bmRequestType: {:02x}, bRequest: {:02x}, wValue: {:04x}, wIndex: {:04x}, data: {:?}",
-                0xC1, cmd, value, 0, data);
+        log::debug!(
+            "READ_CTRL: bmRequestType: {:02x}, bRequest: {:02x}, wValue: {:04x}, wIndex: {:04x}, data: {:?}",
+            0xC1,
+            cmd,
+            value,
+            0,
+            data
+        );
         self.usb.read_control(0xC1, cmd, value, 0, data)
     }
 
@@ -584,7 +596,7 @@ impl<B: Board> Backend<B> {
             _ => {
                 return Err(
                     TransportError::PllProgramFailed(format!("Unknown PLL: {}", pll_num)).into(),
-                )
+                );
             }
         };
         data &= !(1 << pll_bit);
@@ -605,7 +617,7 @@ impl<B: Board> Backend<B> {
             _ => {
                 return Err(
                     TransportError::PllProgramFailed(format!("Unknown PLL: {}", pll_num)).into(),
-                )
+                );
             }
         };
 
diff --git a/sw/host/opentitanlib/src/transport/common/uart.rs b/sw/host/opentitanlib/src/transport/common/uart.rs
index b58e375753fc4..dce4438f2466c 100644
--- a/sw/host/opentitanlib/src/transport/common/uart.rs
+++ b/sw/host/opentitanlib/src/transport/common/uart.rs
@@ -18,6 +18,7 @@ use crate::util;
 
 /// Implementation of the `Uart` trait on top of a serial device, such as `/dev/ttyUSB0`.
 pub struct SerialPortUart {
+    port_name: String,
     flow_control: Cell<FlowControl>,
     port: RefCell<TTYPort>,
     rxbuf: RefCell<VecDeque<u8>>,
@@ -38,6 +39,7 @@ impl SerialPortUart {
             .map_err(|e| UartError::OpenError(e.to_string()))?;
         flock_serial(&port, port_name)?;
         Ok(SerialPortUart {
+            port_name: port_name.to_string(),
             flow_control: Cell::new(FlowControl::None),
             port: RefCell::new(port),
             rxbuf: RefCell::default(),
@@ -51,6 +53,7 @@ impl SerialPortUart {
             .map_err(|e| UartError::OpenError(e.to_string()))?;
         flock_serial(&port, port_name)?;
         Ok(SerialPortUart {
+            port_name: port_name.to_string(),
             flow_control: Cell::new(FlowControl::None),
             port: RefCell::new(port),
             rxbuf: RefCell::default(),
@@ -136,6 +139,10 @@ impl Uart for SerialPortUart {
         Ok(())
     }
 
+    fn get_device_path(&self) -> Result<String> {
+        Ok(self.port_name.clone())
+    }
+
     /// Reads UART receive data into `buf`, returning the number of bytes read.
     /// The `timeout` may be used to specify a duration to wait for data.
     fn read_timeout(&self, buf: &mut [u8], timeout: Duration) -> Result<usize> {
@@ -244,6 +251,13 @@ impl Uart for SerialPortUart {
         )?;
         Ok(())
     }
+
+    fn borrow_fd(&self) -> Result<BorrowedFd> {
+        let port = self.port.borrow();
+        // SAFETY: `fd` is owned by `port` and is valid.
+        let fd = unsafe { BorrowedFd::borrow_raw(port.as_raw_fd()) };
+        Ok(fd)
+    }
 }
 
 /// Invoke Linux `flock()` on the given serial port, lock will be released when the file
diff --git a/sw/host/opentitanlib/src/transport/dediprog/gpio.rs b/sw/host/opentitanlib/src/transport/dediprog/gpio.rs
index b57325b832a7c..a5e2289fed095 100644
--- a/sw/host/opentitanlib/src/transport/dediprog/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/dediprog/gpio.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use once_cell::sync::Lazy;
 use std::cell::RefCell;
 use std::collections::HashMap;
diff --git a/sw/host/opentitanlib/src/transport/dediprog/mod.rs b/sw/host/opentitanlib/src/transport/dediprog/mod.rs
index 8965677831f1f..4cd4f66092023 100644
--- a/sw/host/opentitanlib/src/transport/dediprog/mod.rs
+++ b/sw/host/opentitanlib/src/transport/dediprog/mod.rs
@@ -4,15 +4,15 @@
 #![allow(dead_code)]
 #![allow(unused_imports)]
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use once_cell::sync::Lazy;
 use regex::Regex;
 use serde_annotate::Annotate;
 use serialport::SerialPortType;
 use std::any::Any;
 use std::cell::RefCell;
-use std::collections::hash_map::Entry;
 use std::collections::HashMap;
+use std::collections::hash_map::Entry;
 use std::rc::Rc;
 
 use crate::io::gpio::{GpioError, GpioPin, PinMode, PullMode};
@@ -130,7 +130,7 @@ impl Dediprog {
         usb_pid: Option<u16>,
         usb_serial: Option<&str>,
     ) -> anyhow::Result<Self> {
-        let mut device = UsbBackend::new(
+        let device = UsbBackend::new(
             usb_vid.unwrap_or(Self::VID_ST_MICROELECTRONICS),
             usb_pid.unwrap_or(Self::PID_DEDIPROG_SF100),
             usb_serial,
@@ -252,11 +252,7 @@ impl Dediprog {
         ];
 
         let protocol_version = if product == "SF100" || product == "SF200" {
-            if version < [5, 5, 0] {
-                1
-            } else {
-                2
-            }
+            if version < [5, 5, 0] { 1 } else { 2 }
         } else if product == "SF600" {
             if version < [6, 9, 0] {
                 1
diff --git a/sw/host/opentitanlib/src/transport/dediprog/spi.rs b/sw/host/opentitanlib/src/transport/dediprog/spi.rs
index 1a714c900a570..5e23ed50fc155 100644
--- a/sw/host/opentitanlib/src/transport/dediprog/spi.rs
+++ b/sw/host/opentitanlib/src/transport/dediprog/spi.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use std::cell::RefCell;
 use std::rc::Rc;
 
@@ -252,8 +252,12 @@ impl DediprogSpi {
     ) -> Result<()> {
         loop {
             match transactions {
-                [eeprom::Transaction::Command(pre_cmd), Write(cmd, wbuf), WaitForBusyClear, rest @ ..] =>
-                {
+                [
+                    eeprom::Transaction::Command(pre_cmd),
+                    Write(cmd, wbuf),
+                    WaitForBusyClear,
+                    rest @ ..,
+                ] => {
                     transactions = rest;
                     if pre_cmd.get_opcode() == [SpiFlash::WRITE_ENABLE] {
                         // Write enable is done by eeprom_write_transaction()
@@ -266,7 +270,7 @@ impl DediprogSpi {
                     transactions = rest;
                     self.run_transaction(&mut [Transfer::Write(cmd.to_bytes()?)])?
                 }
-                [Read(cmd, ref mut rbuf), rest @ ..] => {
+                [Read(cmd, rbuf), rest @ ..] => {
                     transactions = rest;
                     self.eeprom_read_transaction(cmd, rbuf)?;
                 }
@@ -379,6 +383,27 @@ impl Target for DediprogSpi {
         inner.set_voltage()
     }
 
+    fn get_flashrom_programmer(&self) -> Result<String> {
+        let inner = self.inner.borrow();
+        let voltage = match inner.voltage {
+            super::Voltage::V0 => "0V",
+            super::Voltage::V1p8 => "1.8V",
+            super::Voltage::V2p5 => "2.5V",
+            super::Voltage::V3p5 => "3.5V",
+        };
+        let spispeed = match inner.spi_clock {
+            ClockSpeed::Clk24Mhz => "24M",
+            ClockSpeed::Clk12Mhz => "12M",
+            ClockSpeed::Clk8Mhz => "8M",
+            ClockSpeed::Clk3Mhz => "3M",
+            ClockSpeed::Clk2p18Mhz => "2.18M",
+            ClockSpeed::Clk1p5Mhz => "1.5M",
+            ClockSpeed::Clk750Khz => "750k",
+            ClockSpeed::Clk375Khz => "375k",
+        };
+        Ok(format!("dediprog:voltage={voltage},spispeed={spispeed}"))
+    }
+
     /// Dediprog has limited support for "plain" SPI transactions.  It can only hold the CS
     /// asserted across a write then optional read, both of at most 16 bytes.
     fn run_transaction(&self, transaction: &mut [Transfer]) -> Result<()> {
diff --git a/sw/host/opentitanlib/src/transport/ftdi/chip.rs b/sw/host/opentitanlib/src/transport/ftdi/chip.rs
new file mode 100644
index 0000000000000..24530653f6280
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/ftdi/chip.rs
@@ -0,0 +1,24 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+pub trait Chip {
+    const VENDOR_ID: u16 = 0x0403;
+    const PRODUCT_ID: u16;
+
+    const UART_BAUD: u32 = 115200;
+
+    const INTERFACES: &'static [ftdi::Interface];
+}
+
+pub struct Ft4232hq {}
+
+impl Chip for Ft4232hq {
+    const PRODUCT_ID: u16 = 0x6011;
+    const INTERFACES: &'static [ftdi::Interface] = &[
+        ftdi::Interface::A,
+        ftdi::Interface::B,
+        // ftdi::Interface::C,
+        ftdi::Interface::D,
+    ];
+}
diff --git a/sw/host/opentitanlib/src/transport/ftdi/gpio.rs b/sw/host/opentitanlib/src/transport/ftdi/gpio.rs
new file mode 100644
index 0000000000000..d3b7b5546b278
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/ftdi/gpio.rs
@@ -0,0 +1,140 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use std::cell::RefCell;
+use std::collections::HashMap;
+use std::rc::Rc;
+
+use embedded_hal::digital::{InputPin, OutputPin};
+use ftdi_embedded_hal as ftdi_hal;
+
+use crate::io::gpio::{GpioError, GpioPin, PinMode, PullMode};
+use crate::transport::ftdi::Chip;
+
+#[derive(Default)]
+enum PinType {
+    Output(ftdi_hal::OutputPin<ftdi::Device>),
+    Input(ftdi_hal::InputPin<ftdi::Device>),
+    #[default]
+    None,
+}
+
+pub struct Pin {
+    pin: RefCell<PinType>,
+    ftdi: Rc<HashMap<ftdi::Interface, ftdi_hal::FtHal<ftdi::Device>>>,
+    pinname: String,
+}
+
+impl Pin {
+    pub fn open<C: Chip>(
+        ftdi: &Rc<HashMap<ftdi::Interface, ftdi_hal::FtHal<ftdi::Device>>>,
+        pinname: String,
+    ) -> Result<Self> {
+        Ok(Self {
+            pin: RefCell::new(PinType::None),
+            ftdi: Rc::clone(ftdi),
+            pinname,
+        })
+    }
+
+    fn map_outpin(&self) -> Result<ftdi_hal::OutputPin<ftdi::Device>> {
+        let pinname = self.pinname.to_lowercase();
+        let interface = match &pinname[0..1] {
+            "a" => ftdi::Interface::A,
+            "b" => ftdi::Interface::B,
+            "c" => ftdi::Interface::C,
+            "d" => ftdi::Interface::D,
+            &_ => return Err(GpioError::InvalidPinName(pinname).into()),
+        };
+        let hal = self
+            .ftdi
+            .get(&interface)
+            .ok_or_else(|| GpioError::InvalidPinName(pinname.clone()))?;
+
+        let pin = match &pinname[1..] {
+            "dbus0" => hal.ad0(),
+            "dbus1" => hal.ad1(),
+            "dbus2" => hal.ad2(),
+            "dbus3" => hal.ad3(),
+            "dbus4" => hal.ad4(),
+            "dbus5" => hal.ad5(),
+            "dbus6" => hal.ad6(),
+            "dbus7" => hal.ad7(),
+            _ => return Err(GpioError::InvalidPinName(self.pinname.to_owned()).into()),
+        }?;
+        Ok(pin)
+    }
+
+    fn map_inpin(&self) -> Result<ftdi_hal::InputPin<ftdi::Device>> {
+        let pinname = self.pinname.to_lowercase();
+        let interface = match &pinname[0..1] {
+            "a" => ftdi::Interface::A,
+            "b" => ftdi::Interface::B,
+            "c" => ftdi::Interface::C,
+            "d" => ftdi::Interface::D,
+            &_ => return Err(GpioError::InvalidPinName(pinname).into()),
+        };
+        let hal = self
+            .ftdi
+            .get(&interface)
+            .ok_or_else(|| GpioError::InvalidPinName(pinname.clone()))?;
+
+        let pin = match &pinname[1..] {
+            "dbus0" => hal.adi0(),
+            "dbus1" => hal.adi1(),
+            "dbus2" => hal.adi2(),
+            "dbus3" => hal.adi3(),
+            "dbus4" => hal.adi4(),
+            "dbus5" => hal.adi5(),
+            "dbus6" => hal.adi6(),
+            "dbus7" => hal.adi7(),
+            _ => return Err(GpioError::InvalidPinName(self.pinname.to_owned()).into()),
+        }?;
+        Ok(pin)
+    }
+}
+
+impl GpioPin for Pin {
+    fn read(&self) -> Result<bool> {
+        let mut pin = self.pin.borrow_mut();
+        match *pin {
+            PinType::Input(ref mut pin) => Ok(pin.is_high()?),
+            _ => Err(GpioError::InvalidPinMode(0).into()),
+        }
+    }
+
+    fn write(&self, value: bool) -> Result<()> {
+        let mut pin = self.pin.borrow_mut();
+        if let PinType::Output(ref mut pin) = *pin {
+            if value {
+                pin.set_high()?;
+            } else {
+                pin.set_low()?;
+            }
+            return Ok(());
+        };
+        Err(GpioError::InvalidPinMode(0).into())
+    }
+
+    fn set_mode(&self, mode: PinMode) -> Result<()> {
+        let mut pin = self.pin.borrow_mut();
+        *pin = match (&*pin, mode) {
+            (PinType::None, PinMode::Input) => PinType::Input(self.map_inpin()?),
+            (PinType::None, PinMode::PushPull | PinMode::OpenDrain) => {
+                PinType::Output(self.map_outpin()?)
+            }
+            _ => return Ok(()),
+        };
+        Ok(())
+    }
+
+    fn set_pull_mode(&self, _mode: PullMode) -> Result<()> {
+        Ok(())
+    }
+
+    fn get_internal_pin_name(&self) -> Option<&str> {
+        Some(&self.pinname)
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/ftdi/mod.rs b/sw/host/opentitanlib/src/transport/ftdi/mod.rs
new file mode 100644
index 0000000000000..6cc7da3c9e1f4
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/ftdi/mod.rs
@@ -0,0 +1,137 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use std::any::Any;
+use std::cell::RefCell;
+use std::collections::HashMap;
+use std::collections::hash_map::Entry;
+use std::rc::Rc;
+
+use crate::io::gpio::{GpioPin, PinMode};
+use crate::io::spi::Target;
+use crate::io::uart::Uart;
+use crate::io::uart::UartError;
+use crate::transport::common::uart::SerialPortUart;
+use crate::transport::{
+    Capabilities, Capability, Transport, TransportError, TransportInterfaceType,
+};
+use crate::util::parse_int::ParseInt;
+use serialport::SerialPortType;
+
+use chip::Chip;
+use ftdi_embedded_hal as ftdi_hal;
+
+pub mod chip;
+pub mod gpio;
+pub mod spi;
+
+#[derive(Default)]
+struct Inner {
+    spi: Option<Rc<dyn Target>>,
+    gpio: HashMap<String, Rc<dyn GpioPin>>,
+    uart: HashMap<u32, Rc<dyn Uart>>,
+}
+
+pub struct Ftdi<C: Chip> {
+    pub(crate) ftdi_interfaces: Rc<HashMap<ftdi::Interface, ftdi_hal::FtHal<ftdi::Device>>>,
+    inner: RefCell<Inner>,
+    phantom: std::marker::PhantomData<C>,
+}
+
+impl<C: Chip> Ftdi<C> {
+    pub fn new() -> anyhow::Result<Self> {
+        let mut ftdi_interfaces = HashMap::new();
+        for interface in C::INTERFACES {
+            let device = ftdi::find_by_vid_pid(C::VENDOR_ID, C::PRODUCT_ID)
+                .interface(*interface)
+                .open()?;
+            ftdi_interfaces.insert(*interface, ftdi_hal::FtHal::init_freq(device, 8_000_000)?);
+        }
+
+        let ftdi_dev = Ftdi {
+            ftdi_interfaces: Rc::new(ftdi_interfaces),
+            inner: RefCell::default(),
+            phantom: std::marker::PhantomData,
+        };
+        Ok(ftdi_dev)
+    }
+
+    fn open_uart(&self, instance: u32) -> Result<SerialPortUart> {
+        let mut ports = serialport::available_ports()
+            .map_err(|e| UartError::EnumerationError(e.to_string()))?;
+
+        ports.retain(|port| {
+            if let SerialPortType::UsbPort(info) = &port.port_type {
+                if info.vid == C::VENDOR_ID && info.pid == C::PRODUCT_ID {
+                    return true;
+                }
+            }
+            false
+        });
+
+        let port = ports.get(instance as usize).ok_or_else(|| {
+            TransportError::InvalidInstance(TransportInterfaceType::Uart, instance.to_string())
+        })?;
+
+        SerialPortUart::open(&port.port_name, C::UART_BAUD)
+    }
+}
+
+impl<C: Chip> Transport for Ftdi<C> {
+    fn capabilities(&self) -> Result<Capabilities> {
+        Ok(Capabilities::new(
+            Capability::SPI | Capability::GPIO | Capability::UART | Capability::UART_NONBLOCKING,
+        ))
+    }
+
+    fn uart(&self, instance: &str) -> Result<Rc<dyn Uart>> {
+        let mut inner = self.inner.borrow_mut();
+        let instance = u32::from_str(instance).ok().ok_or_else(|| {
+            TransportError::InvalidInstance(TransportInterfaceType::Uart, instance.to_string())
+        })?;
+        let uart = match inner.uart.entry(instance) {
+            Entry::Vacant(v) => {
+                let u = v.insert(Rc::new(self.open_uart(instance)?));
+                Rc::clone(u)
+            }
+            Entry::Occupied(o) => Rc::clone(o.get()),
+        };
+        Ok(uart)
+    }
+
+    fn gpio_pin(&self, pinname: &str) -> Result<Rc<dyn GpioPin>> {
+        let mut inner = self.inner.borrow_mut();
+        Ok(match inner.gpio.entry(pinname.to_string()) {
+            Entry::Vacant(v) => {
+                let u = v.insert(Rc::new(gpio::Pin::open::<C>(
+                    &self.ftdi_interfaces,
+                    pinname.to_string(),
+                )?));
+                Rc::clone(u)
+            }
+            Entry::Occupied(o) => Rc::clone(o.get()),
+        })
+    }
+
+    fn spi(&self, _instance: &str) -> Result<Rc<dyn Target>> {
+        let spi_cs = gpio::Pin::open::<C>(&self.ftdi_interfaces, "bdbus3".to_string())?;
+        spi_cs.set_mode(PinMode::PushPull)?;
+        let mut inner = self.inner.borrow_mut();
+        if inner.spi.is_none() {
+            inner.spi = Some(Rc::new(spi::Spi::open(&self.ftdi_interfaces, spi_cs)?));
+        }
+        Ok(Rc::clone(inner.spi.as_ref().unwrap()))
+    }
+
+    fn dispatch(&self, _action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+}
+
+/// Command for Transport::dispatch().
+pub struct SetPll {}
+
+/// Command for Transport::dispatch(). Resets the Chip whisperer board's SAM3X chip.
+pub struct ResetSam3x {}
diff --git a/sw/host/opentitanlib/src/transport/ftdi/spi.rs b/sw/host/opentitanlib/src/transport/ftdi/spi.rs
new file mode 100644
index 0000000000000..09d4b9e360908
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/ftdi/spi.rs
@@ -0,0 +1,128 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use crate::io::spi::Transfer;
+use anyhow::Result;
+use std::cell::RefCell;
+use std::collections::HashMap;
+use std::rc::Rc;
+
+use embedded_hal::spi::SpiBus;
+
+use ftdi_embedded_hal as ftdi_hal;
+
+use crate::io::gpio;
+use crate::io::spi::AssertChipSelect;
+use crate::io::spi::MaxSizes;
+use crate::io::spi::SpiError;
+use crate::io::spi::TransferMode;
+use crate::transport::Target;
+use crate::transport::TransportError;
+
+pub struct Spi<T> {
+    spi: Rc<RefCell<ftdi_hal::Spi<ftdi::Device>>>,
+    cs: T,
+}
+
+impl<T: gpio::GpioPin> Spi<T> {
+    pub fn open(
+        ftdi_interfaces: &Rc<HashMap<ftdi::Interface, ftdi_hal::FtHal<ftdi::Device>>>,
+        cs: T,
+    ) -> Result<Self> {
+        let hal = ftdi_interfaces
+            .get(&ftdi::Interface::B)
+            .ok_or_else(|| SpiError::InvalidOption("spi interface".to_owned()))?;
+        let spi = hal.spi()?;
+        Ok(Spi {
+            spi: Rc::new(RefCell::new(spi)),
+            cs,
+        })
+    }
+
+    // Perform a SPI transaction.
+    fn spi_transaction(&self, transaction: &mut [Transfer]) -> Result<()> {
+        for transfer in transaction.iter_mut() {
+            match transfer {
+                Transfer::Read(buf) => self.spi.borrow_mut().read(buf)?,
+                Transfer::Write(buf) => self.spi.borrow_mut().write(buf)?,
+                Transfer::Both(wbuf, rbuf) => self.spi.borrow_mut().transfer(rbuf, wbuf)?,
+            }
+        }
+        Ok(())
+    }
+}
+
+impl<T: gpio::GpioPin> Target for Spi<T> {
+    fn get_transfer_mode(&self) -> Result<TransferMode> {
+        Ok(TransferMode::Mode0)
+    }
+    fn set_transfer_mode(&self, mode: TransferMode) -> Result<()> {
+        log::warn!(
+            "set_transfer_mode to {:?}, but only Mode0 is supported on this device",
+            mode
+        );
+        Ok(())
+    }
+
+    fn get_bits_per_word(&self) -> Result<u32> {
+        Ok(8)
+    }
+    fn set_bits_per_word(&self, bits_per_word: u32) -> Result<()> {
+        match bits_per_word {
+            8 => Ok(()),
+            _ => Err(SpiError::InvalidWordSize(bits_per_word).into()),
+        }
+    }
+
+    fn get_max_speed(&self) -> Result<u32> {
+        Ok(6_000_000)
+    }
+    fn set_max_speed(&self, frequency: u32) -> Result<()> {
+        log::warn!(
+            "set_max_speed to {:?}, but this device doesn't support changing speeds.",
+            frequency
+        );
+        Ok(())
+    }
+
+    fn supports_bidirectional_transfer(&self) -> Result<bool> {
+        Ok(true)
+    }
+
+    fn set_pins(
+        &self,
+        _serial_clock: Option<&Rc<dyn gpio::GpioPin>>,
+        _host_out_device_in: Option<&Rc<dyn gpio::GpioPin>>,
+        _host_in_device_out: Option<&Rc<dyn gpio::GpioPin>>,
+        _chip_select: Option<&Rc<dyn gpio::GpioPin>>,
+    ) -> Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn get_max_transfer_count(&self) -> Result<usize> {
+        // Arbitrary value: number of `Transfers` that can be in a single transaction.
+        Ok(42)
+    }
+
+    fn get_max_transfer_sizes(&self) -> Result<MaxSizes> {
+        Ok(MaxSizes {
+            read: 1024,
+            write: 1024,
+        })
+    }
+
+    fn run_transaction(&self, transaction: &mut [Transfer]) -> Result<()> {
+        // Assert CS# (drive low).
+        self.cs.write(false)?;
+        // Translate SPI Read/Write Transactions into Chip Whisperer spi operations.
+        let result = self.spi_transaction(transaction);
+        // Release CS# (allow to float high).
+        self.cs.write(true)?;
+        result
+    }
+
+    fn assert_cs(self: Rc<Self>) -> Result<AssertChipSelect> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/c2d2.rs b/sw/host/opentitanlib/src/transport/hyperdebug/c2d2.rs
index 64623d8af1c75..4a7be02e8d434 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/c2d2.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/c2d2.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::rc::Rc;
 
 use crate::io::gpio::{GpioPin, PinMode, PullMode};
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/dfu.rs b/sw/host/opentitanlib/src/transport/hyperdebug/dfu.rs
index 853e90db79791..8e9b14411ddac 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/dfu.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/dfu.rs
@@ -4,12 +4,12 @@
 
 // Firmware update protocol for HyperDebug
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Result, anyhow, bail};
 use once_cell::sync::Lazy;
 use regex::Regex;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::cell::RefCell;
+use std::cmp::Ordering;
 
 use crate::transport::{
     Capabilities, Capability, ProgressIndicator, Transport, TransportError, UpdateFirmware,
@@ -23,8 +23,12 @@ const PID_DFU_BOOTLOADER: u16 = 0xdf11;
 /// of the `opentitantool` invocation (and presenting itself with STMs VID:DID, rather than
 /// Google's).
 pub struct HyperdebugDfu {
+    // Handle to USB device which may or may not already be in DFU mode
     usb_backend: RefCell<UsbBackend>,
     current_firmware_version: Option<String>,
+    // expected USB VID:PID of the HyperDebug device when not in DFU mode
+    usb_vid: u16,
+    usb_pid: u16,
 }
 
 impl HyperdebugDfu {
@@ -41,11 +45,9 @@ impl HyperdebugDfu {
         // will put the desired firmware on the HyperDebug, both in the case of previous
         // interrupted update, as well as the ordinary case of outdated or current HyperDebug
         // firmware already running.
-        if let Ok(usb_backend) = UsbBackend::new(
-            usb_vid.unwrap_or(VID_ST_MICROELECTRONICS),
-            usb_pid.unwrap_or(PID_DFU_BOOTLOADER),
-            usb_serial,
-        ) {
+        if let Ok(usb_backend) =
+            UsbBackend::new(VID_ST_MICROELECTRONICS, PID_DFU_BOOTLOADER, usb_serial)
+        {
             // HyperDebug device is already in DFU mode, we cannot query firmware version through
             // USB strings.  (And the fact that it was left in DFU mode, probably as a result of a
             // previous incomplete update attempt, should mean that we would not want to trust the
@@ -53,6 +55,8 @@ impl HyperdebugDfu {
             return Ok(Self {
                 usb_backend: RefCell::new(usb_backend),
                 current_firmware_version: None,
+                usb_vid: usb_vid.unwrap_or(super::VID_GOOGLE),
+                usb_pid: usb_pid.unwrap_or(super::PID_HYPERDEBUG),
             });
         }
 
@@ -76,6 +80,8 @@ impl HyperdebugDfu {
         Ok(Self {
             usb_backend: RefCell::new(usb_backend),
             current_firmware_version,
+            usb_vid: usb_vid.unwrap_or(super::VID_GOOGLE),
+            usb_pid: usb_pid.unwrap_or(super::PID_HYPERDEBUG),
         })
     }
 }
@@ -86,14 +92,16 @@ impl Transport for HyperdebugDfu {
         Ok(Capabilities::new(Capability::NONE))
     }
 
-    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn Annotate>>> {
+    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(update_firmware_action) = action.downcast_ref::<UpdateFirmware>() {
             update_firmware(
-                &mut self.usb_backend.borrow_mut(),
+                &self.usb_backend.borrow(),
                 self.current_firmware_version.as_deref(),
                 &update_firmware_action.firmware,
                 update_firmware_action.progress.as_ref(),
                 update_firmware_action.force,
+                self.usb_vid,
+                self.usb_pid,
             )
         } else {
             bail!(TransportError::UnsupportedOperation)
@@ -162,12 +170,14 @@ fn get_hyperdebug_firmware_version(firmware: &[u8]) -> Result<&str> {
 /// Helper method to perform flash programming using ST's DfuSe variant of the DFU protocol.
 /// This method is used both by the `Hyperdebug` and the `HyperdebugDfu` structs.
 pub fn update_firmware(
-    usb_device: &mut UsbBackend,
+    usb_device: &UsbBackend,
     current_firmware_version: Option<&str>,
     firmware: &Option<Vec<u8>>,
     progress: &dyn ProgressIndicator,
     force: bool,
-) -> Result<Option<Box<dyn Annotate>>> {
+    usb_vid: u16,
+    usb_pid: u16,
+) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
     let firmware: &[u8] = if let Some(vec) = firmware.as_ref() {
         validate_firmware_image(vec)?;
         vec
@@ -185,6 +195,14 @@ pub fn update_firmware(
                 );
                 return Ok(None);
             }
+            if is_older_than(new_version, current_version)? {
+                log::warn!(
+                    "Will not downgrade from {} to {}.  Consider --force.",
+                    current_version,
+                    new_version,
+                );
+                return Ok(None);
+            }
         }
     }
 
@@ -196,6 +214,7 @@ pub fn update_firmware(
     if wait_for_idle(usb_device, dfu_desc.dfu_interface)? != DFU_STATE_APP_IDLE {
         // Device is already running DFU bootloader, proceed to firmware transfer.
         do_update_firmware(usb_device, dfu_desc, firmware, progress)?;
+        restablish_connection(usb_vid, usb_pid, usb_device.get_serial_number())?;
         return Ok(None);
     }
 
@@ -223,7 +242,7 @@ pub fn update_firmware(
     // same serial number as before.
     std::thread::sleep(std::time::Duration::from_millis(1000));
     log::info!("Connecting to DFU bootloader...");
-    let mut dfu_device = UsbBackend::new(
+    let dfu_device = UsbBackend::new(
         VID_ST_MICROELECTRONICS,
         PID_DFU_BOOTLOADER,
         Some(usb_device.get_serial_number()),
@@ -233,19 +252,24 @@ pub fn update_firmware(
     let dfu_desc = scan_usb_descriptor(&dfu_device)?;
     dfu_device.claim_interface(dfu_desc.dfu_interface)?;
     do_update_firmware(&dfu_device, dfu_desc, firmware, progress)?;
+    restablish_connection(usb_vid, usb_pid, usb_device.get_serial_number())?;
+    Ok(None)
+}
 
+fn restablish_connection(usb_vid: u16, usb_pid: u16, serial_number: &str) -> Result<()> {
     // At this point, the new firmware has been completely transferred, and the USB device is
-    // resetting and booting the new firmware.  Wait a second, then verify that device can now be
-    // found on the USB bus with the original DID:VID.
-    std::thread::sleep(std::time::Duration::from_millis(1000));
+    // resetting and booting the new firmware.  Wait up to five seconds, repeatedly testing if the
+    // device can be found on the USB bus with the original DID:VID.
     log::info!("Connecting to newly flashed firmware...");
-    let _new_device = UsbBackend::new(
-        usb_device.get_vendor_id(),
-        usb_device.get_product_id(),
-        Some(usb_device.get_serial_number()),
-    )
-    .context("Unable to establish connection after flashing.  Possibly bad image.")?;
-    Ok(None)
+    for _ in 0..10 {
+        std::thread::sleep(std::time::Duration::from_millis(500));
+        if UsbBackend::new(usb_vid, usb_pid, Some(serial_number)).is_ok() {
+            return Ok(());
+        }
+    }
+    bail!(TransportError::FirmwareProgramFailed(
+        "Unable to establish connection after flashing.  Possibly bad image.".to_string()
+    ));
 }
 
 fn do_update_firmware(
@@ -462,3 +486,83 @@ fn wait_for_idle(dfu_device: &UsbBackend, dfu_interface: u8) -> Result<u8> {
         }
     }
 }
+
+/// Returns true if the two version strings have the same text prefix, e.g. "hyperdebug_",
+/// differing only in the subsequent numbers, and furthermore that the numbers in `version_a` are
+/// strictly "less than" those in `version_b`.
+fn is_older_than(version_a: &str, version_b: &str) -> Result<bool> {
+    let apos = version_a.find(char::is_numeric).unwrap_or(version_a.len());
+    let bpos = version_b.find(char::is_numeric).unwrap_or(version_b.len());
+    if version_a[..apos] != version_b[..bpos] {
+        return Ok(false);
+    }
+    let version_a = &version_a[apos..];
+    let version_b = &version_b[apos..];
+    if version_a.is_empty() || version_b.is_empty() {
+        return Ok(false);
+    }
+    let apos = version_a
+        .find(|ch: char| !char::is_numeric(ch))
+        .unwrap_or(version_a.len());
+    let bpos = version_b
+        .find(|ch: char| !char::is_numeric(ch))
+        .unwrap_or(version_b.len());
+    let aval = version_a[..apos].parse::<u64>()?;
+    let bval = version_b[..bpos].parse::<u64>()?;
+    match aval.cmp(&bval) {
+        Ordering::Less => Ok(true),
+        Ordering::Greater => Ok(false),
+        // Exact match so far, recursively inspect any further numbers in the string.
+        Ordering::Equal => is_older_than(&version_a[apos..], &version_b[apos..]),
+    }
+}
+
+#[cfg(test)]
+mod tests {
+    use super::*;
+
+    #[test]
+    fn test_is_older_than() {
+        // Ordering of dates, with fallback to sequence suffix.
+        assert_eq!(
+            is_older_than("hyp_20240101_99", "hyp_20240801_01").unwrap(),
+            true
+        );
+        assert_eq!(
+            is_older_than("hyp_20240801_01", "hyp_20240101_99").unwrap(),
+            false
+        );
+        assert_eq!(
+            is_older_than("hyp_20240101_01", "hyp_20240101_02").unwrap(),
+            true
+        );
+        assert_eq!(
+            is_older_than("hyp_20240101_02", "hyp_20240101_01").unwrap(),
+            false
+        );
+        assert_eq!(
+            is_older_than("hyp_20240101_01", "hyp_20240101_01").unwrap(),
+            false
+        );
+
+        // Lexicographical ordering of version string.
+        assert_eq!(is_older_than("fancy_1.2.5", "fancy_1.11.1").unwrap(), true);
+        assert_eq!(is_older_than("fancy_1.11.1", "fancy_1.2.5").unwrap(), false);
+        assert_eq!(is_older_than("fancy_1.2.2", "fancy_1.2.11").unwrap(), true);
+        assert_eq!(is_older_than("fancy_1.2.11", "fancy_1.2.2").unwrap(), false);
+        assert_eq!(
+            is_older_than("fancy_1.2.11", "fancy_1.2.11").unwrap(),
+            false
+        );
+
+        // Not comparable, neither is considered "older" than the other.
+        assert_eq!(
+            is_older_than("fancy_1.2.5", "hyperdebug_20240101_02").unwrap(),
+            false
+        );
+        assert_eq!(
+            is_older_than("hyperdebug_20240101_02", "fancy_1.2.5").unwrap(),
+            false
+        );
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/gpio.rs b/sw/host/opentitanlib/src/transport/hyperdebug/gpio.rs
index 86980e1f9fe67..85312a766b51d 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/gpio.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use byteorder::{LittleEndian, ReadBytesExt, WriteBytesExt};
 use once_cell::sync::Lazy;
 use regex::Regex;
@@ -10,15 +10,15 @@ use std::io::Cursor;
 use std::mem::size_of;
 use std::rc::Rc;
 use std::time::Duration;
-use zerocopy::{FromBytes, FromZeroes};
+use zerocopy::FromBytes;
 
 use crate::io::gpio::{
     BitbangEntry, ClockNature, DacBangEntry, Edge, GpioBitbangOperation, GpioBitbanging,
     GpioDacBangOperation, GpioError, GpioMonitoring, GpioPin, MonitoringEvent,
     MonitoringReadResponse, MonitoringStartResponse, PinMode, PullMode,
 };
-use crate::transport::hyperdebug::{BulkInterface, Inner};
 use crate::transport::TransportError;
+use crate::transport::hyperdebug::{BulkInterface, Inner};
 
 pub struct HyperdebugGpioPin {
     inner: Rc<Inner>,
@@ -168,7 +168,7 @@ const USB_MAX_SIZE: usize = 64;
 ///
 /// The source for the HyperDebug firmware generating these responses is here:
 /// https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/board/hyperdebug/gpio.c
-#[derive(FromBytes, FromZeroes, Debug)]
+#[derive(FromBytes, Debug)]
 #[repr(C)]
 struct RspGpioMonitoringHeader {
     /// Size of the header as sent by HyperDebug (excluding one byte CMSIS-DAP header), will be at
@@ -316,7 +316,7 @@ impl GpioMonitoring for HyperdebugGpioMonitoring {
                 )
             );
             let resp: RspGpioMonitoringHeader =
-                FromBytes::read_from_prefix(&databytes[1..]).unwrap();
+                FromBytes::read_from_prefix(&databytes[1..]).unwrap().0;
             ensure!(
                 resp.struct_size as usize >= size_of::<RspGpioMonitoringHeader>(),
                 TransportError::CommunicationError(
@@ -1007,7 +1007,7 @@ fn encode_waveform(waveform: &[BitbangEntry], num_pins: usize) -> Result<Vec<u8>
 /// open drain or pure input pins).
 fn decode_waveform(
     waveform: &mut [BitbangEntry],
-    encoded_response: &Vec<u8>,
+    encoded_response: &[u8],
     num_pins: usize,
 ) -> Result<()> {
     ensure!(
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/i2c.rs b/sw/host/opentitanlib/src/transport/hyperdebug/i2c.rs
index f64942b18dc4d..f420f4e9de7ca 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/i2c.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/i2c.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::cell::Cell;
 use std::cmp;
 use std::rc::Rc;
 use std::time::Duration;
-use zerocopy::{AsBytes, FromBytes, FromZeroes};
+use zerocopy::{FromBytes, Immutable, IntoBytes};
 
 use crate::io::i2c::{self, Bus, DeviceStatus, DeviceTransfer, I2cError, ReadStatus, Transfer};
 use crate::transport::hyperdebug::{BulkInterface, Inner};
@@ -35,9 +35,9 @@ const USB_MAX_SIZE: usize = 64;
 
 /// Wire format of USB packet to request a short I2C transaction
 /// (receiving at most 127 bytes).
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[allow(dead_code)] // Fields not explicitly read anywhere
-#[repr(packed)]
+#[repr(C, packed)]
 struct CmdTransferShort {
     encapsulation_header: u8,
     port: u8,
@@ -49,9 +49,9 @@ struct CmdTransferShort {
 
 /// Wire format of USB packet to request a long I2C transaction
 /// (receiving up to 32767 bytes).
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[allow(dead_code)] // Fields not explicitly read anywhere
-#[repr(packed)]
+#[repr(C, packed)]
 struct CmdTransferLong {
     encapsulation_header: u8,
     port: u8,
@@ -64,9 +64,9 @@ struct CmdTransferLong {
 }
 
 /// Wire format of USB packet containing I2C transaction response.
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[allow(dead_code)] // Reserved field not read anywhere
-#[repr(packed)]
+#[repr(C, packed)]
 struct RspTransfer {
     encapsulation_header: u8,
     status_code: u16,
@@ -84,9 +84,9 @@ impl RspTransfer {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[allow(dead_code)] // Fields not explicitly read anywhere
-#[repr(packed)]
+#[repr(C, packed)]
 struct CmdGetDeviceStatus {
     encapsulation_header: u8,
     port: u8,
@@ -101,8 +101,8 @@ const I2C_DEVICE_CMD_PREPARE_READ_DATA: u8 = 0x01;
 // Bits for use in upper half of `CmdGetDeviceStatus.port`.
 const I2C_DEVICE_FLAG_STICKY: u8 = 0x80;
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
-#[repr(packed)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
+#[repr(C, packed)]
 struct RspGetDeviceStatus {
     encapsulation_header: u8,
     struct_size: u16,
@@ -124,9 +124,9 @@ impl RspGetDeviceStatus {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[allow(dead_code)] // Fields not explicitly read anywhere
-#[repr(packed)]
+#[repr(C, packed)]
 struct CmdPrepareReadData {
     encapsulation_header: u8,
     port: u8,
@@ -156,7 +156,7 @@ impl HyperdebugI2cBus {
             idx < 16,
             TransportError::InvalidInstance(TransportInterfaceType::I2c, idx.to_string())
         );
-        let mut usb_handle = inner.usb_device.borrow_mut();
+        let usb_handle = inner.usb_device.borrow_mut();
 
         // Exclusively claim I2C interface, preparing for bulk transfers.
         usb_handle.claim_interface(i2c_interface.interface)?;
@@ -228,7 +228,7 @@ impl HyperdebugI2cBus {
         let mut bytecount = 0;
         while bytecount < 4 + encapsulation_header_size {
             let read_count = self.usb_read_bulk(
-                &mut resp.as_bytes_mut()[1 - encapsulation_header_size + bytecount..][..64],
+                &mut resp.as_mut_bytes()[1 - encapsulation_header_size + bytecount..][..64],
             )?;
             ensure!(
                 read_count > 0,
@@ -408,7 +408,7 @@ impl Bus for HyperdebugI2cBus {
         let mut bytecount = 0;
         while bytecount < 7 {
             let read_count = self.usb_read_bulk_timeout(
-                &mut resp.as_bytes_mut()[bytecount..][..64],
+                &mut resp.as_mut_bytes()[bytecount..][..64],
                 Duration::from_millis(req.timeout_ms as u64 + 500),
             )?;
             ensure!(
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/mod.rs b/sw/host/opentitanlib/src/transport/hyperdebug/mod.rs
index d34fe330a8af5..57ab10e0cfa3f 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/mod.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/mod.rs
@@ -2,16 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use once_cell::sync::Lazy;
 use regex::Regex;
-use serde_annotate::Annotate;
 use serialport::TTYPort;
 use std::any::Any;
 use std::cell::Cell;
 use std::cell::RefCell;
-use std::collections::hash_map::Entry;
 use std::collections::HashMap;
+use std::collections::hash_map::Entry;
 use std::fs;
 use std::io::Read;
 use std::io::Write;
@@ -25,8 +24,8 @@ use crate::io::i2c::Bus;
 use crate::io::jtag::{JtagChain, JtagParams};
 use crate::io::spi::Target;
 use crate::io::uart::Uart;
-use crate::transport::chip_whisperer::board::Board;
 use crate::transport::chip_whisperer::ChipWhisperer;
+use crate::transport::chip_whisperer::board::Board;
 use crate::transport::common::fpga::{ClearBitstream, FpgaProgram};
 use crate::transport::common::uart::flock_serial;
 use crate::transport::{
@@ -143,7 +142,7 @@ impl<T: Flavor> Hyperdebug<T> {
         usb_pid: Option<u16>,
         usb_serial: Option<&str>,
     ) -> Result<Self> {
-        let mut device = UsbBackend::new(
+        let device = UsbBackend::new(
             usb_vid.unwrap_or_else(T::get_default_usb_vid),
             usb_pid.unwrap_or_else(T::get_default_usb_pid),
             usb_serial,
@@ -763,14 +762,18 @@ impl<T: Flavor> Transport for Hyperdebug<T> {
         )?))
     }
 
-    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn Annotate>>> {
+    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(update_firmware_action) = action.downcast_ref::<UpdateFirmware>() {
+            let usb_vid = self.inner.usb_device.borrow().get_vendor_id();
+            let usb_pid = self.inner.usb_device.borrow().get_product_id();
             dfu::update_firmware(
-                &mut self.inner.usb_device.borrow_mut(),
+                &self.inner.usb_device.borrow(),
                 self.current_firmware_version.as_deref(),
                 &update_firmware_action.firmware,
                 update_firmware_action.progress.as_ref(),
                 update_firmware_action.force,
+                usb_vid,
+                usb_pid,
             )
         } else if let Some(jtag_set_pins) = action.downcast_ref::<SetJtagPins>() {
             match (
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/servo_micro.rs b/sw/host/opentitanlib/src/transport/hyperdebug/servo_micro.rs
index 40f341552ff1a..28f4b9f1f38b2 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/servo_micro.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/servo_micro.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::rc::Rc;
 
 use crate::io::gpio::{GpioPin, PinMode, PullMode};
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs b/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs
index 53fdabe8f523b..4a5fabde83fa3 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/spi.rs
@@ -2,21 +2,21 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use rusb::{Direction, Recipient, RequestType};
 use std::cell::Cell;
 use std::mem::size_of;
 use std::rc::Rc;
 use std::time::Duration;
-use zerocopy::{AsBytes, FromBytes, FromZeroes};
+use zerocopy::{FromBytes, Immutable, IntoBytes};
 
 use crate::io::eeprom;
 use crate::io::gpio::GpioPin;
 use crate::io::spi::{
     AssertChipSelect, MaxSizes, SpiError, Target, TargetChipDeassert, Transfer, TransferMode,
 };
-use crate::transport::hyperdebug::{BulkInterface, Inner};
 use crate::transport::TransportError;
+use crate::transport::hyperdebug::{BulkInterface, Inner};
 
 pub struct HyperdebugSpiTarget {
     inner: Rc<Inner>,
@@ -111,7 +111,7 @@ fn status_code_description(status_code: u16) -> String {
     .to_string()
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 #[repr(C)]
 struct RspUsbSpiConfig {
     packet_id: u16,
@@ -120,7 +120,7 @@ struct RspUsbSpiConfig {
     feature_bitmap: u16,
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct CmdTransferStart {
     packet_id: u16,
@@ -139,7 +139,7 @@ impl CmdTransferStart {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct CmdEepromTransferStart {
     packet_id: u16,
@@ -158,7 +158,7 @@ impl CmdEepromTransferStart {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct CmdTransferContinue {
     packet_id: u16,
@@ -175,7 +175,7 @@ impl CmdTransferContinue {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct RspTransferStart {
     packet_id: u16,
@@ -192,7 +192,7 @@ impl RspTransferStart {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct RspTransferContinue {
     packet_id: u16,
@@ -209,7 +209,7 @@ impl RspTransferContinue {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug)]
 #[repr(C)]
 struct CmdChipSelect {
     packet_id: u16,
@@ -224,7 +224,7 @@ impl CmdChipSelect {
     }
 }
 
-#[derive(AsBytes, FromBytes, FromZeroes, Debug, Default)]
+#[derive(Immutable, IntoBytes, FromBytes, Debug, Default)]
 #[repr(C)]
 struct RspChipSelect {
     packet_id: u16,
@@ -252,7 +252,7 @@ impl HyperdebugSpiTarget {
         enable_cmd: u8,
         idx: u8,
     ) -> Result<Self> {
-        let mut usb_handle = inner.usb_device.borrow_mut();
+        let usb_handle = inner.usb_device.borrow_mut();
 
         // Tell HyperDebug to enable SPI bridge, and to address particular SPI device.
         inner.selected_spi.set(idx);
@@ -273,7 +273,7 @@ impl HyperdebugSpiTarget {
             &USB_SPI_PKT_ID_CMD_GET_USB_SPI_CONFIG.to_le_bytes(),
         )?;
         let mut resp: RspUsbSpiConfig = Default::default();
-        let rc = usb_handle.read_bulk(spi_interface.in_endpoint, resp.as_bytes_mut())?;
+        let rc = usb_handle.read_bulk(spi_interface.in_endpoint, resp.as_mut_bytes())?;
         ensure!(
             rc == size_of::<RspUsbSpiConfig>(),
             TransportError::CommunicationError(
@@ -340,7 +340,7 @@ impl HyperdebugSpiTarget {
     /// Receive data for a single SPI operation, using one or more USB packets.
     fn receive(&self, rbuf: &mut [u8]) -> Result<()> {
         let mut resp = RspTransferStart::new();
-        let bytecount = self.usb_read_bulk_timeout(resp.as_bytes_mut(), TRANSFER_START_TIMEOUT)?;
+        let bytecount = self.usb_read_bulk_timeout(resp.as_mut_bytes(), TRANSFER_START_TIMEOUT)?;
         ensure!(
             bytecount >= 4,
             TransportError::CommunicationError("Short reponse to TRANSFER_START".to_string())
@@ -364,7 +364,7 @@ impl HyperdebugSpiTarget {
         let mut index = databytes;
         while index < rbuf.len() {
             let mut resp = RspTransferContinue::new();
-            let bytecount = self.usb_read_bulk(resp.as_bytes_mut())?;
+            let bytecount = self.usb_read_bulk(resp.as_mut_bytes())?;
             ensure!(
                 bytecount > 4,
                 TransportError::CommunicationError(
@@ -393,7 +393,7 @@ impl HyperdebugSpiTarget {
 
     fn receive_first_streaming(&self) -> Result<()> {
         let mut resp = RspTransferStart::new();
-        let bytecount = self.usb_read_bulk(resp.as_bytes_mut())?;
+        let bytecount = self.usb_read_bulk(resp.as_mut_bytes())?;
         ensure!(
             bytecount >= 4,
             TransportError::CommunicationError("Short reponse to TRANSFER_START".to_string())
@@ -606,7 +606,7 @@ impl HyperdebugSpiTarget {
         self.usb_write_bulk(req.as_bytes())?;
 
         let mut resp = RspChipSelect::new();
-        let bytecount = self.usb_read_bulk(resp.as_bytes_mut())?;
+        let bytecount = self.usb_read_bulk(resp.as_mut_bytes())?;
         ensure!(
             bytecount >= 4,
             TransportError::CommunicationError("Unrecognized reponse to CHIP_SELECT".to_string())
@@ -714,6 +714,14 @@ impl Target for HyperdebugSpiTarget {
         Ok(self.max_sizes)
     }
 
+    fn get_flashrom_programmer(&self) -> Result<String> {
+        Ok(format!(
+            "raiden_debug_spi:serial={},target={}",
+            self.inner.usb_device.borrow().get_serial_number(),
+            self.target_idx
+        ))
+    }
+
     fn run_transaction(&self, transaction: &mut [Transfer]) -> Result<()> {
         let mut idx: usize = 0;
         self.select_my_spi_bus()?;
@@ -842,8 +850,12 @@ impl Target for HyperdebugSpiTarget {
         let mut stream_state = StreamState::NoPending;
         loop {
             match transactions {
-                [eeprom::Transaction::Command(pre_cmd), eeprom::Transaction::Write(cmd, wbuf), eeprom::Transaction::WaitForBusyClear, rest @ ..] =>
-                {
+                [
+                    eeprom::Transaction::Command(pre_cmd),
+                    eeprom::Transaction::Write(cmd, wbuf),
+                    eeprom::Transaction::WaitForBusyClear,
+                    rest @ ..,
+                ] => {
                     if pre_cmd.get_opcode().len() == 1 {
                         stream_state = self.eeprom_transmit(
                             Some(pre_cmd), /* write_enable */
@@ -872,13 +884,16 @@ impl Target for HyperdebugSpiTarget {
                         self.eeprom_transmit(None, cmd, &[], &mut [], false, stream_state)?;
                     transactions = rest;
                 }
-                [eeprom::Transaction::Read(cmd, ref mut rbuf), rest @ ..] => {
+                [eeprom::Transaction::Read(cmd, rbuf), rest @ ..] => {
                     stream_state =
                         self.eeprom_transmit(None, cmd, &[], rbuf, false, stream_state)?;
                     transactions = rest;
                 }
-                [eeprom::Transaction::Write(cmd, wbuf), eeprom::Transaction::WaitForBusyClear, rest @ ..] =>
-                {
+                [
+                    eeprom::Transaction::Write(cmd, wbuf),
+                    eeprom::Transaction::WaitForBusyClear,
+                    rest @ ..,
+                ] => {
                     stream_state = self.eeprom_transmit(
                         None, /* write_enable */
                         cmd,
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/ti50.rs b/sw/host/opentitanlib/src/transport/hyperdebug/ti50.rs
index 9f77f8ef0952c..f91323f35b6ae 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/ti50.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/ti50.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::rc::Rc;
 
 use crate::io::gpio::GpioPin;
diff --git a/sw/host/opentitanlib/src/transport/hyperdebug/uart.rs b/sw/host/opentitanlib/src/transport/hyperdebug/uart.rs
index 0c2403b596841..01b33d33d5550 100644
--- a/sw/host/opentitanlib/src/transport/hyperdebug/uart.rs
+++ b/sw/host/opentitanlib/src/transport/hyperdebug/uart.rs
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use std::os::fd::BorrowedFd;
 use std::rc::Rc;
 use std::time::Duration;
 
@@ -12,9 +13,9 @@ use serialport::Parity;
 use super::UartInterface;
 use crate::io::nonblocking_help::NonblockingHelp;
 use crate::io::uart::Uart;
+use crate::transport::TransportError;
 use crate::transport::common::uart::SerialPortUart;
 use crate::transport::hyperdebug::Inner;
-use crate::transport::TransportError;
 
 const UART_BAUD: u32 = 115200;
 
@@ -93,6 +94,10 @@ impl Uart for HyperdebugUart {
         self.serial_port.set_flow_control(flow_control)
     }
 
+    fn get_device_path(&self) -> Result<String> {
+        self.serial_port.get_device_path()
+    }
+
     fn read(&self, buf: &mut [u8]) -> Result<usize> {
         self.serial_port.read(buf)
     }
@@ -162,4 +167,8 @@ impl Uart for HyperdebugUart {
     fn nonblocking_help(&self) -> Result<Rc<dyn NonblockingHelp>> {
         self.serial_port.nonblocking_help()
     }
+
+    fn borrow_fd(&self) -> Result<BorrowedFd> {
+        self.serial_port.borrow_fd()
+    }
 }
diff --git a/sw/host/opentitanlib/src/transport/ioexpander/mod.rs b/sw/host/opentitanlib/src/transport/ioexpander/mod.rs
index db1b8900ab44d..f72b65aaa8b12 100644
--- a/sw/host/opentitanlib/src/transport/ioexpander/mod.rs
+++ b/sw/host/opentitanlib/src/transport/ioexpander/mod.rs
@@ -2,8 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use crate::app::config;
 use crate::app::TransportWrapper;
+use crate::app::config;
 use crate::io::ioexpander::IoExpander;
 
 use anyhow::Result;
diff --git a/sw/host/opentitanlib/src/transport/ioexpander/sx1503.rs b/sw/host/opentitanlib/src/transport/ioexpander/sx1503.rs
index 344fc8c827465..9b870e28d3f26 100644
--- a/sw/host/opentitanlib/src/transport/ioexpander/sx1503.rs
+++ b/sw/host/opentitanlib/src/transport/ioexpander/sx1503.rs
@@ -9,7 +9,7 @@ use crate::io::i2c::{self, Bus};
 use crate::io::ioexpander::IoExpander;
 use crate::transport::TransportError;
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::rc::Rc;
 use std::vec::Vec;
 
diff --git a/sw/host/opentitanlib/src/transport/mod.rs b/sw/host/opentitanlib/src/transport/mod.rs
index 52d2ed7f55822..79a0257946c66 100644
--- a/sw/host/opentitanlib/src/transport/mod.rs
+++ b/sw/host/opentitanlib/src/transport/mod.rs
@@ -22,9 +22,11 @@ use crate::io::uart::Uart;
 pub mod chip_whisperer;
 pub mod common;
 pub mod dediprog;
+pub mod ftdi;
 pub mod hyperdebug;
 pub mod ioexpander;
 pub mod proxy;
+pub mod qemu;
 pub mod ti50emulator;
 pub mod ultradebug;
 pub mod verilator;
@@ -152,7 +154,7 @@ pub trait Transport {
     }
 
     /// Invoke non-standard functionality of some Transport implementations.
-    fn dispatch(&self, _action: &dyn Any) -> Result<Option<Box<dyn serde_annotate::Annotate>>> {
+    fn dispatch(&self, _action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         Err(TransportError::UnsupportedOperation.into())
     }
 
diff --git a/sw/host/opentitanlib/src/transport/proxy/emu.rs b/sw/host/opentitanlib/src/transport/proxy/emu.rs
index 2b4d33bc842bc..21162287b3bad 100644
--- a/sw/host/opentitanlib/src/transport/proxy/emu.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/emu.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::collections::HashMap;
 use std::rc::Rc;
 
diff --git a/sw/host/opentitanlib/src/transport/proxy/gpio.rs b/sw/host/opentitanlib/src/transport/proxy/gpio.rs
index 0a533b55ecc19..93be608bdb5fa 100644
--- a/sw/host/opentitanlib/src/transport/proxy/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/gpio.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::rc::Rc;
 use std::time::Duration;
 
diff --git a/sw/host/opentitanlib/src/transport/proxy/i2c.rs b/sw/host/opentitanlib/src/transport/proxy/i2c.rs
index 1175fdb51dcb6..89f2783d7b1ca 100644
--- a/sw/host/opentitanlib/src/transport/proxy/i2c.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/i2c.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::cell::Cell;
 use std::rc::Rc;
 use std::time::Duration;
diff --git a/sw/host/opentitanlib/src/transport/proxy/mod.rs b/sw/host/opentitanlib/src/transport/proxy/mod.rs
index 3d13d748d72f7..3c2e371b62d37 100644
--- a/sw/host/opentitanlib/src/transport/proxy/mod.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/mod.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use serde::{Deserialize, Serialize};
 use std::cell::{Cell, RefCell};
 use std::collections::HashMap;
@@ -136,7 +136,7 @@ impl Inner {
         let conn: &mut std::net::TcpStream = &mut self.conn.borrow_mut();
         let mut writer = BufWriter::new(conn);
         serde_json::to_writer(&mut writer, &Message::Req(req))?;
-        writer.write_all(&[b'\n'])?;
+        writer.write_all(b"\n")?;
         writer.flush()?;
         Ok(())
     }
diff --git a/sw/host/opentitanlib/src/transport/proxy/spi.rs b/sw/host/opentitanlib/src/transport/proxy/spi.rs
index 17cb826b8f8ea..22bdcf5874c21 100644
--- a/sw/host/opentitanlib/src/transport/proxy/spi.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/spi.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::rc::Rc;
 
 use super::ProxyError;
@@ -147,6 +147,13 @@ impl Target for ProxySpi {
         }
     }
 
+    fn get_flashrom_programmer(&self) -> Result<String> {
+        match self.execute_command(SpiRequest::GetFlashromArgs)? {
+            SpiResponse::GetFlashromArgs { programmer } => Ok(programmer),
+            _ => bail!(ProxyError::UnexpectedReply()),
+        }
+    }
+
     fn run_transaction(&self, transaction: &mut [Transfer]) -> Result<()> {
         let mut req: Vec<SpiTransferRequest> = Vec::new();
         for transfer in transaction.iter() {
diff --git a/sw/host/opentitanlib/src/transport/proxy/uart.rs b/sw/host/opentitanlib/src/transport/proxy/uart.rs
index 0cb1448b0a688..05745fa436c2d 100644
--- a/sw/host/opentitanlib/src/transport/proxy/uart.rs
+++ b/sw/host/opentitanlib/src/transport/proxy/uart.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use std::cell::Cell;
 use std::io::{ErrorKind, Read};
 use std::rc::Rc;
@@ -80,6 +80,13 @@ impl Uart for ProxyUart {
         }
     }
 
+    fn set_break(&self, enable: bool) -> Result<()> {
+        match self.execute_command(UartRequest::SetBreak(enable))? {
+            UartResponse::SetBreak => Ok(()),
+            _ => bail!(ProxyError::UnexpectedReply()),
+        }
+    }
+
     fn set_parity(&self, parity: Parity) -> Result<()> {
         match self.execute_command(UartRequest::SetParity(parity))? {
             UartResponse::SetParity => Ok(()),
@@ -87,6 +94,13 @@ impl Uart for ProxyUart {
         }
     }
 
+    fn get_device_path(&self) -> Result<String> {
+        match self.execute_command(UartRequest::GetDevicePath)? {
+            UartResponse::GetDevicePath { path } => Ok(path),
+            _ => bail!(ProxyError::UnexpectedReply()),
+        }
+    }
+
     /// Reads UART receive data into `buf`, returning the number of bytes read.
     /// This function _may_ block.
     fn read(&self, buf: &mut [u8]) -> Result<usize> {
diff --git a/sw/host/opentitanlib/src/transport/qemu/gpio.rs b/sw/host/opentitanlib/src/transport/qemu/gpio.rs
new file mode 100644
index 0000000000000..08c69bd210bdc
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/gpio.rs
@@ -0,0 +1,286 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::cell::{Cell, RefCell};
+use std::collections::HashMap;
+use std::io::{BufRead, BufReader, Write};
+use std::path::Path;
+use std::rc::Rc;
+
+use anyhow::{Context, bail};
+use serialport::{SerialPort, TTYPort};
+
+use crate::io::gpio::{GpioPin, PinMode, PullMode};
+
+const QEMU_GPIO_CLEAR: char = 'C';
+const QEMU_GPIO_DIRECTION: char = 'D';
+const QEMU_GPIO_OUTPUT: char = 'O';
+const QEMU_GPIO_PULL: char = 'P';
+const QEMU_GPIO_QUERY: char = 'Q';
+const QEMU_GPIO_FLOATING: char = 'Z';
+const QEMU_GPIO_INPUT: char = 'I';
+const QEMU_GPIO_MASK: char = 'M';
+
+pub struct QemuGpio {
+    pty: BufReader<TTYPort>,
+    pub pins: HashMap<u8, Rc<dyn GpioPin>>,
+
+    /// Current outputs being driven from host to QEMU when pins are in an
+    /// outputting mode (ignored for inputs).
+    pub host_to_qemu: u32,
+
+    /// Current mask of which host pins are connected to QEMU inputs.
+    ///
+    /// - 0 indicates QEMU should ignore this pin as a host -> device input.
+    /// - 1 indicates QEMU should treat this pin as a host -> device input.
+    pub host_output_enable: u32,
+
+    /// Current outputs being driven from QEMU to host (if pin in output mode).
+    pub qemu_to_host: u32,
+
+    /// Last reported input/output directions from QEMU:
+    ///
+    /// - 0 indicates input into QEMU.
+    /// - 1 indicates output from QEMU.
+    pub qemu_outputting: u32,
+
+    /// Last reported pull up/down from QEMU:
+    ///
+    /// - 0 indicates QEMU is pulling down.
+    /// - 1 indicates QEMU is pulling up.
+    pub qemu_pull: u32,
+
+    /// Last reported high impedance mode from QEMU:
+    ///
+    /// - 0 indicates QEMU is pulling up/down (see `qemu_pull`).
+    /// - 1 indicates the pins are floating (high impedance / HiZ).
+    pub qemu_floating: u32,
+}
+
+impl QemuGpio {
+    pub fn new<P: AsRef<Path>>(gpio_pty: P) -> anyhow::Result<Self> {
+        let pty = serialport::new(gpio_pty.as_ref().to_str().unwrap(), 0)
+            .open_native()
+            .context("failed to open QEMU GPIO PTY")?;
+        let pty = BufReader::new(pty);
+
+        let qemu_gpio = QemuGpio {
+            pty,
+            pins: HashMap::default(),
+            host_to_qemu: 0x0,
+            host_output_enable: 0x0,
+            qemu_to_host: 0x0,
+            qemu_outputting: 0x0,
+            qemu_pull: 0x0,
+            qemu_floating: 0x0,
+        };
+
+        Ok(qemu_gpio)
+    }
+
+    /// Process all GPIO command frames received from QEMU over the TTY.
+    ///
+    /// QEMU will send these when the state of the pins has changed in some way.
+    /// Frames have the following format:
+    ///
+    /// ```
+    /// <command>:<value>\r\n
+    /// ```
+    ///
+    /// where `<command>` is a single uppercase character and `<value>` is four
+    /// uppercase hex characters forming a value. This is a custom protocol for
+    /// OpenTitan's QEMU machine.
+    pub fn process_frames(&mut self) -> anyhow::Result<()> {
+        while self.pty.get_ref().bytes_to_read()? > 0 {
+            let mut line = String::new();
+            self.pty
+                .read_line(&mut line)
+                .context("failed to read TTY")?;
+
+            let (cmd, value) = line
+                .split_once(":")
+                .context("bad QEMU GPIO frame: missing ':'")?;
+            let (cmd, value) = (cmd.trim(), value.trim());
+
+            let &[cmd] = cmd.as_bytes() else {
+                bail!("bad QEMU GPIO frame: expected single ascii char command, got {cmd}");
+            };
+
+            let value = u32::from_str_radix(value, 16).with_context(|| {
+                format!("bad QEMU GPIO frame: expected four-hex value, got {value}")
+            })?;
+
+            match cmd as char {
+                // QEMU wants us to clear / reset what we know about its pins.
+                QEMU_GPIO_CLEAR => {
+                    self.qemu_to_host = 0;
+                    self.qemu_outputting = 0;
+                    self.qemu_pull = 0;
+                    self.qemu_floating = 0;
+                }
+                // The direction of one or more pins has changed between input/output.
+                QEMU_GPIO_DIRECTION => self.qemu_outputting = value,
+                // The output of one or more pins has changed.
+                QEMU_GPIO_OUTPUT => self.qemu_to_host = value,
+                // The pull up/down of one or more pins has changed.
+                QEMU_GPIO_PULL => self.qemu_pull = value,
+                // QEMU is querying our inputs to its pins.
+                QEMU_GPIO_QUERY => {
+                    self.send_frame(QEMU_GPIO_MASK, self.host_to_qemu)?;
+                    self.send_frame(QEMU_GPIO_INPUT, self.host_to_qemu)?;
+                }
+                // The hi-Z value of one or more pins has changed.
+                QEMU_GPIO_FLOATING => self.qemu_floating = value,
+                _ => bail!("unknown command from QEMU: {cmd}"),
+            }
+        }
+
+        Ok(())
+    }
+
+    /// Send a GPIO command frame to QEMU telling it about how we're driving the pins.
+    ///
+    /// See [`process_frames`] for a description of the frame format.
+    ///
+    /// Frame commands currently supported by QEMU are:
+    ///
+    /// * `I:<value>`:  the inputs to the device's pads are now `<value>`, if driven.
+    /// * `M:<value>`:  the inputs are masked with `<value>`, meaning driven/connected.
+    /// * `R:00000000`: ask QEMU to repeat the last `D` and `O` frames (see [`process_frames`]).
+    pub fn send_frame(&mut self, cmd: char, value: u32) -> anyhow::Result<()> {
+        writeln!(self.pty.get_mut(), "{cmd}:{value:08x}").context("failed to send GPIO frame")?;
+
+        Ok(())
+    }
+}
+
+pub struct QemuGpioPin {
+    qemu_gpio: Rc<RefCell<QemuGpio>>,
+    idx: u8,
+
+    mode: Cell<PinMode>,
+
+    /// Pull mode of the current pin.
+    ///
+    /// NOTE: QEMU does not currently support pulling the pin from the host
+    /// side. We could attempt to emulate pulling by driving the output from
+    /// our side, but we cannot model our pull being weaker than QEMU's driven
+    /// output. For now we do not model pulling.
+    pull_mode: Cell<PullMode>,
+}
+
+impl QemuGpioPin {
+    pub(crate) fn new(qemu_gpio: Rc<RefCell<QemuGpio>>, idx: u8) -> Rc<Self> {
+        let pin = QemuGpioPin {
+            qemu_gpio,
+            idx,
+            mode: Cell::new(PinMode::Input),
+            pull_mode: Cell::new(PullMode::None),
+        };
+        Rc::new(pin)
+    }
+}
+
+impl GpioPin for QemuGpioPin {
+    fn read(&self) -> anyhow::Result<bool> {
+        if [PinMode::PushPull, PinMode::AnalogOutput].contains(&self.mode.get()) {
+            log::warn!("attempting to read from output pin {}", self.idx);
+        }
+
+        let mut gpio = self.qemu_gpio.borrow_mut();
+
+        gpio.process_frames()?;
+
+        let qemu_outputting = (gpio.qemu_outputting >> self.idx & 1) == 1;
+
+        let value = match qemu_outputting {
+            true => gpio.qemu_to_host >> self.idx & 1,
+            // For now we just give the pullup value regardless of whether it's floating.
+            false => {
+                let qemu_floating = (gpio.qemu_floating >> self.idx & 1) == 1;
+                if qemu_floating {
+                    log::warn!("attempted to read floating GPIO {}", self.idx);
+                }
+                gpio.qemu_pull >> self.idx & 1
+            }
+        };
+
+        Ok(value == 1)
+    }
+
+    fn write(&self, value: bool) -> anyhow::Result<()> {
+        let mut gpio = self.qemu_gpio.borrow_mut();
+        let mut new_value = gpio.host_to_qemu;
+
+        let mask = 1 << self.idx;
+        if value {
+            new_value |= mask;
+        } else {
+            new_value &= !mask;
+        }
+
+        if new_value != gpio.host_to_qemu {
+            gpio.send_frame(QEMU_GPIO_INPUT, new_value)?;
+            gpio.host_to_qemu = new_value;
+        }
+
+        Ok(())
+    }
+
+    fn set_mode(&self, mode: PinMode) -> anyhow::Result<()> {
+        let mut gpio = self.qemu_gpio.borrow_mut();
+        let mut new_value = gpio.host_output_enable;
+
+        let mask = 1 << self.idx;
+        if [PinMode::PushPull, PinMode::OpenDrain, PinMode::AnalogOutput].contains(&mode) {
+            new_value |= mask;
+        } else {
+            new_value &= !mask;
+        }
+
+        if new_value != gpio.host_output_enable {
+            // Note: the protocol inverts this mask so that `1` means ignored
+            // and `0` means connected.
+            gpio.send_frame(QEMU_GPIO_MASK, !new_value)?;
+            gpio.host_output_enable = new_value;
+        }
+
+        self.mode.set(mode);
+
+        Ok(())
+    }
+
+    fn set_pull_mode(&self, mode: PullMode) -> anyhow::Result<()> {
+        // Currently ignored, see [`QemuGpioPin::pull_mode`].
+        self.pull_mode.set(mode);
+
+        Ok(())
+    }
+
+    fn set(
+        &self,
+        mode: Option<PinMode>,
+        value: Option<bool>,
+        pull: Option<PullMode>,
+        analog_value: Option<f32>,
+    ) -> anyhow::Result<()> {
+        if let Some(mode) = mode {
+            self.set_mode(mode)?;
+        }
+
+        if let Some(value) = value {
+            self.write(value)?;
+        }
+
+        if let Some(pull) = pull {
+            self.set_pull_mode(pull)?;
+        }
+
+        if let Some(_analog_value) = analog_value {
+            todo!("QEMU transport does not yet support analogue GPIOs");
+        }
+
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/i2c.rs b/sw/host/opentitanlib/src/transport/qemu/i2c.rs
new file mode 100644
index 0000000000000..dcb4e7e94cda7
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/i2c.rs
@@ -0,0 +1,119 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::cell::{Cell, RefCell};
+use std::io::{Read, Write};
+use std::path::Path;
+
+use anyhow::Context;
+use anyhow::bail;
+use serialport::TTYPort;
+
+use crate::io::i2c::I2cError;
+use crate::io::i2c::{Bus, Transfer};
+use crate::transport::TransportError;
+
+pub struct QemuI2c {
+    pty: RefCell<TTYPort>,
+    default_addr: Cell<Option<u8>>,
+}
+
+impl QemuI2c {
+    pub fn new<P: AsRef<Path>>(pty: P) -> anyhow::Result<QemuI2c> {
+        let pty = pty.as_ref().to_str().context("path not UTF-8")?;
+        let pty = serialport::new(pty, 115200)
+            .timeout(std::time::Duration::from_secs(1))
+            .open_native()
+            .context("failed to open I2C PTY")?;
+        let pty = RefCell::new(pty);
+
+        Ok(QemuI2c {
+            pty,
+            default_addr: Cell::new(None),
+        })
+    }
+}
+
+fn check_response<R: Read>(pty: &mut R, s: &'static str) -> anyhow::Result<()> {
+    let mut byte_buf = [0u8; 1];
+    pty.read_exact(&mut byte_buf)?;
+    match byte_buf[0] {
+        b'.' => Ok(()),
+        b'!' => bail!(s),
+        b'x' => bail!("Malformed command"),
+        _ => unreachable!(),
+    }
+}
+
+impl Bus for QemuI2c {
+    fn get_max_speed(&self) -> anyhow::Result<u32> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn set_max_speed(&self, _max_speed: u32) -> anyhow::Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn set_default_address(&self, addr: u8) -> anyhow::Result<()> {
+        self.default_addr.set(Some(addr));
+        Ok(())
+    }
+
+    fn run_transaction(
+        &self,
+        addr: Option<u8>,
+        transaction: &mut [Transfer],
+    ) -> anyhow::Result<()> {
+        let target_addr = addr
+            .or(self.default_addr.get())
+            .ok_or(I2cError::MissingAddress)?;
+
+        let mut pty = self.pty.borrow_mut();
+
+        // Write and check protocol version
+        let i2c_protocol_version = 1_u8;
+
+        write!(pty, "i")?;
+        pty.write_all(&[i2c_protocol_version])?;
+        check_response(&mut *pty, "Protocol version mismatch")?;
+
+        for transfer in transaction.iter_mut() {
+            // Start/repeated start condition
+            write!(pty, "S")?;
+
+            match transfer {
+                Transfer::Write(buf) => {
+                    // Write I2C address + write bit (0)
+                    let start_byte: u8 = target_addr << 1;
+                    pty.write_all(std::slice::from_ref(&start_byte))?;
+                    check_response(&mut *pty, "Write transfer NACKed")?;
+
+                    // Write data byte and check for no NACKs
+                    for byte in buf.iter() {
+                        write!(pty, "W")?;
+                        pty.write_all(std::slice::from_ref(byte))?;
+                        check_response(&mut *pty, "Written byte NACKed")?;
+                    }
+                }
+
+                Transfer::Read(buf) => {
+                    // Write I2C address + read bit (1)
+                    let start_byte: u8 = (target_addr << 1) | 1;
+                    pty.write_all(std::slice::from_ref(&start_byte))?;
+                    check_response(&mut *pty, "Read transfer NACKed")?;
+
+                    // Issue read and read data byte
+                    for byte in buf.iter_mut() {
+                        write!(pty, "R")?;
+                        pty.read_exact(std::slice::from_mut(byte))?;
+                    }
+                }
+            }
+        }
+        // Stop condition
+        write!(pty, "P")?;
+
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/mod.rs b/sw/host/opentitanlib/src/transport/qemu/mod.rs
new file mode 100644
index 0000000000000..439e1b4e4ed2f
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/mod.rs
@@ -0,0 +1,338 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+pub mod gpio;
+pub mod i2c;
+pub mod monitor;
+pub mod reset;
+pub mod spi;
+pub mod uart;
+pub mod usbdev;
+
+use std::cell::RefCell;
+use std::collections::HashMap;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::str::FromStr;
+use std::thread;
+use std::time::Duration;
+
+use anyhow::{Context, bail};
+
+use crate::backend::qemu::QemuOpts;
+use crate::debug::openocd::OpenOcdJtagChain;
+use crate::io::gpio::{GpioError, GpioPin};
+use crate::io::jtag::{JtagChain, JtagParams};
+use crate::io::uart::Uart;
+use crate::transport::Bus;
+use crate::transport::Target;
+use crate::transport::common::uart::SerialPortUart;
+use crate::transport::qemu::gpio::{QemuGpio, QemuGpioPin};
+use crate::transport::qemu::i2c::QemuI2c;
+use crate::transport::qemu::monitor::{Chardev, ChardevKind, Monitor};
+use crate::transport::qemu::reset::QemuReset;
+use crate::transport::qemu::spi::QemuSpi;
+use crate::transport::qemu::uart::QemuUart;
+use crate::transport::qemu::usbdev::QemuVbusSense;
+use crate::transport::{
+    Capabilities, Capability, Transport, TransportError, TransportInterfaceType,
+};
+
+/// ID of the fake pin we use to model resets.
+const QEMU_RESET_PIN_IDX: u8 = u8::MAX;
+/* Until we have a more complete model of the pinmux, we need to model this
+ * MIO directly. */
+const QEMU_VBUS_SENSE_PIN_IDX: u8 = u8::MAX - 1;
+
+/// Baudrate for QEMU's consoles. These are PTYs so it currently doesn't matter,
+/// but we must use a non-zero value because the pacing calculations divide by
+/// this number.
+const CONSOLE_BAUDRATE: u32 = 115200;
+
+/// Represents a connection to a running QEMU emulation.
+pub struct Qemu {
+    /// Connection to the QEMU monitor which can control the emulator.
+    pub monitor: Rc<RefCell<Monitor>>,
+
+    /// Reset pin (actually goes via the `monitor`).
+    reset: Rc<dyn GpioPin>,
+
+    /// Console UART.
+    uarts: HashMap<String, Rc<dyn Uart>>,
+
+    /// SPI device.
+    spi: Option<Rc<dyn Target>>,
+
+    /// I2C devices.
+    i2cs: HashMap<String, Rc<dyn Bus>>,
+
+    /// GPIO pins (not including reset pin).
+    gpio: Option<Rc<RefCell<QemuGpio>>>,
+
+    /// VBUS sense pin (actually goes via the `usbdev-cmd` chardev).
+    vbus_sense: Option<Rc<dyn GpioPin>>,
+
+    /// QEMU log modelled as a UART.
+    log: Option<Rc<dyn Uart>>,
+
+    /// Debug module JTAG.
+    jtag_sock: Option<PathBuf>,
+}
+
+impl Qemu {
+    /// Creates a QEMU transport connection from `options`.
+    ///
+    /// The transport will configure capabilities that it can find from the running QEMU instance.
+    /// It looks for the following chardevs which should be connected to QEMU devices:
+    ///
+    /// * `uart{n}` (pty) - connect to UARTs in order using `-serial chardev:uart{n}`.
+    /// * `log`     (pty) - connect to QEMU's log using `-global ot-ibex_wrapper.logdev=log`.
+    /// * `spidev`  (pty) - automatically connected to QEMU spi device.
+    /// * `i2c{n}`  (pty) - connect to I2C bus using `-device ot-i2c_host_proxy,bus=ot-i2c{n},chardev=i2c{n}`.
+    /// * `gpio`    (pty) - connect to GPIO block using `global ot-gpio-{eg,dj}.chardev=gpio`
+    ///
+    /// You can create a chardev with `-chardev <kind>,id=<id>` and connect it
+    /// to a device using one of the flags in the list above. The kind must
+    /// match what OpenTitanLib expects to be accepted.
+    pub fn from_options(options: QemuOpts) -> anyhow::Result<Self> {
+        let monitor = Rc::new(RefCell::new(Monitor::new(
+            options.qemu_monitor_tty.unwrap(),
+            options.qemu_quit,
+        )?));
+
+        // Get list of configured chardevs from QEMU.
+        let chardevs = monitor.borrow_mut().query_chardevs()?;
+        fn find_chardev<'a>(chardevs: &'a [Chardev], id: &str) -> Option<&'a ChardevKind> {
+            chardevs
+                .iter()
+                .find_map(|c| (c.id == id).then_some(&c.kind))
+        }
+
+        // UARTs:
+        let mut uarts = HashMap::new();
+        for chardev in &chardevs {
+            let Some(id) = chardev.id.strip_prefix("uart") else {
+                continue;
+            };
+
+            let ChardevKind::Pty { ref path } = chardev.kind else {
+                continue;
+            };
+
+            let serial_port = SerialPortUart::open_pseudo(path.to_str().unwrap(), CONSOLE_BAUDRATE)
+                .context("failed to open QEMU console PTY")?;
+            let uart: Rc<dyn Uart> =
+                Rc::new(QemuUart::new(Rc::clone(&monitor), &chardev.id, serial_port));
+
+            uarts.insert(id.to_string(), uart);
+        }
+        if uarts.is_empty() {
+            log::info!(
+                "could not find pty chardevs with ids starting with `uart`, UART support disabled"
+            );
+        }
+
+        // USBDEV control:
+        let vbus_sense = match find_chardev(&chardevs, "usbdev-cmd") {
+            Some(ChardevKind::Pty { path }) => {
+                let tty = serialport::new(
+                    path.to_str().context("TTY path not UTF8")?,
+                    CONSOLE_BAUDRATE,
+                )
+                .open_native()
+                .context("failed to open QEMU usbdev-cmd PTY")?;
+
+                let vbus_sense: Rc<dyn GpioPin> = Rc::new(QemuVbusSense::new(tty));
+                Some(vbus_sense)
+            }
+            _ => {
+                log::info!("could not find pty chardev with id=usbdev, skipping USBDEV");
+                None
+            }
+        };
+
+        // QEMU log, not really a UART but modelled as one:
+        let log = match find_chardev(&chardevs, "log") {
+            Some(ChardevKind::Pty { path }) => {
+                let log: Rc<dyn Uart> = Rc::new(
+                    SerialPortUart::open_pseudo(path.to_str().unwrap(), CONSOLE_BAUDRATE)
+                        .context("failed to open QEMU log PTY")?,
+                );
+                Some(log)
+            }
+            _ => {
+                log::info!("could not find pty chardev with id=log, QEMU log unavailable");
+                None
+            }
+        };
+
+        // If there's a chardev called `spidev`, configure it as a PTY and use as the SPI bus.
+        let spi = match find_chardev(&chardevs, "spidev") {
+            Some(ChardevKind::Pty { path }) => {
+                let spi = QemuSpi::new(path).context("failed to connect to QEMU SPI PTY")?;
+                let spi: Rc<dyn Target> = Rc::new(spi);
+                Some(spi)
+            }
+            _ => {
+                log::info!("could not find pty chardev with id=spidev, SPI support disabled");
+                None
+            }
+        };
+
+        // Try connecting to each of the I2C buses.
+        let mut i2cs = HashMap::new();
+        for chardev in &chardevs {
+            let Some(id) = chardev.id.strip_prefix("i2c") else {
+                continue;
+            };
+
+            let ChardevKind::Pty { ref path } = chardev.kind else {
+                continue;
+            };
+
+            let i2c = QemuI2c::new(path).context("failed to connect to QEMU I2C PTY")?;
+            let i2c: Rc<dyn Bus> = Rc::new(i2c);
+
+            i2cs.insert(id.to_string(), i2c);
+        }
+        if i2cs.is_empty() {
+            log::info!(
+                "could not find pty chardevs with ids starting with `i2c`, I2C support disabled"
+            );
+        }
+
+        // If there's a chardev called `gpio`, configure it as a PTY and use as the GPIO pins.
+        let gpio = match find_chardev(&chardevs, "gpio") {
+            Some(ChardevKind::Pty { path }) => {
+                let gpio = QemuGpio::new(path).context("failed to connect to QEMU GPIO PTY")?;
+                let gpio = Rc::new(RefCell::new(gpio));
+                Some(gpio)
+            }
+            _ => {
+                log::info!("could not find pty chardev with id=gpio, GPIO support disabled");
+                None
+            }
+        };
+
+        // Debug module JTAG tap:
+        let jtag_sock = match find_chardev(&chardevs, "taprbb") {
+            Some(ChardevKind::Socket { path }) => Some(path.clone()),
+            _ => {
+                log::info!("could not find socket chardev with id=taprbb, skipping JTAG");
+                None
+            }
+        };
+
+        // Resetting is done over the monitor, but we model it like a pin to enable strapping it.
+        let reset = QemuReset::new(Rc::clone(&monitor));
+        let reset = Rc::new(reset);
+
+        // QEMU polls once per second to see if PTYs have been connected to. We must wait that
+        // full second to be sure that QEMU is watching all of them.
+        thread::sleep(Duration::from_secs(1));
+
+        Ok(Qemu {
+            monitor,
+            reset,
+            uarts,
+            vbus_sense,
+            log,
+            spi,
+            i2cs,
+            gpio,
+            jtag_sock,
+        })
+    }
+}
+
+impl Transport for Qemu {
+    fn capabilities(&self) -> anyhow::Result<Capabilities> {
+        // We have to unconditionally claim to support GPIO because of the reset
+        // pin which actually goes via the monitor. Attempting to use a non-reset
+        // GPIO pin in `.gpio_pin` will cause an error if GPIO isn't connected.
+        let mut cap = Capability::GPIO;
+
+        if !self.uarts.is_empty() || self.log.is_some() {
+            cap |= Capability::UART;
+        }
+
+        if self.spi.is_some() {
+            cap |= Capability::SPI;
+        }
+
+        if !self.i2cs.is_empty() {
+            cap |= Capability::I2C;
+        }
+
+        Ok(Capabilities::new(cap))
+    }
+
+    fn uart(&self, instance: &str) -> anyhow::Result<Rc<dyn Uart>> {
+        if instance == "LOG" {
+            return Ok(Rc::clone(
+                self.log.as_ref().context("QEMU log not connected")?,
+            ));
+        }
+
+        match self.uarts.get(instance) {
+            Some(uart) => Ok(Rc::clone(uart)),
+            None => Err(TransportError::InvalidInstance(
+                TransportInterfaceType::Uart,
+                instance.to_string(),
+            )
+            .into()),
+        }
+    }
+
+    fn i2c(&self, instance: &str) -> anyhow::Result<Rc<dyn Bus>> {
+        match self.i2cs.get(instance) {
+            Some(i2c) => Ok(Rc::clone(i2c)),
+            None => Err(TransportError::InvalidInstance(
+                TransportInterfaceType::I2c,
+                instance.to_string(),
+            )
+            .into()),
+        }
+    }
+
+    fn gpio_pin(&self, instance: &str) -> anyhow::Result<Rc<dyn GpioPin>> {
+        let pin = u8::from_str(instance).with_context(|| format!("can't convert {instance:?}"))?;
+
+        if pin < 32 {
+            let Some(ref gpio) = self.gpio else {
+                bail!("GPIO interface not connected");
+            };
+
+            let mut gpio = gpio.borrow_mut();
+            let gpio = gpio
+                .pins
+                .entry(pin)
+                .or_insert_with(|| QemuGpioPin::new(Rc::clone(self.gpio.as_ref().unwrap()), pin));
+
+            Ok(Rc::clone(gpio))
+        } else if pin == QEMU_RESET_PIN_IDX {
+            Ok(Rc::clone(&self.reset))
+        } else if pin == QEMU_VBUS_SENSE_PIN_IDX && self.vbus_sense.is_some() {
+            Ok(Rc::clone(self.vbus_sense.as_ref().unwrap()))
+        } else {
+            Err(GpioError::InvalidPinNumber(pin).into())
+        }
+    }
+
+    fn spi(&self, _instance: &str) -> anyhow::Result<Rc<dyn Target>> {
+        Ok(Rc::clone(self.spi.as_ref().unwrap()))
+    }
+
+    fn jtag(&self, opts: &JtagParams) -> anyhow::Result<Box<dyn JtagChain>> {
+        let jtag = OpenOcdJtagChain::new(
+            &format!(
+                "adapter driver remote_bitbang; remote_bitbang port 0; remote_bitbang host {sock}",
+                sock = self.jtag_sock.as_ref().unwrap().display(),
+            ),
+            opts,
+        )?;
+
+        Ok(Box::new(jtag))
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/monitor.rs b/sw/host/opentitanlib/src/transport/qemu/monitor.rs
new file mode 100644
index 0000000000000..1280e073b45e6
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/monitor.rs
@@ -0,0 +1,303 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::io::{BufRead, BufReader, Write};
+use std::path::{Path, PathBuf};
+use std::time::Duration;
+
+use anyhow::{Context, bail, ensure};
+use serde::Deserialize;
+use serialport::TTYPort;
+
+/// QEMU can take some time to startup and send the greeting.
+/// There's no real harm in waiting a while for that message.
+const CONNECT_TIMEOUT_S: u64 = 5;
+
+/// Interface to QEMU's monitor.
+///
+/// The monitor is expected to be configured in `control` mode for the JSON QMP
+/// protocol, not "human" mode.
+pub struct Monitor {
+    /// TTY port connected to QEMU's monitor.
+    tty: BufReader<TTYPort>,
+
+    /// Incrementing ID attached to each command and checked with each response.
+    id_counter: usize,
+
+    /// Whether to quit QEMU when dropped.
+    quit_qemu: bool,
+}
+
+impl Monitor {
+    /// Connect to the QEMU monitor over a given TTY.
+    pub fn new<P: AsRef<Path>>(tty_path: P, quit_qemu: bool) -> anyhow::Result<Self> {
+        let tty = serialport::new(
+            tty_path.as_ref().to_str().context("TTY path not UTF8")?,
+            115200,
+        )
+        .timeout(Duration::from_secs(CONNECT_TIMEOUT_S))
+        .open_native()
+        .context("failed to open QEMU monitor PTY")?;
+
+        let mut tty = BufReader::new(tty);
+
+        // QMP sends us a greeting line on every connection:
+        let mut greeting = String::new();
+        tty.read_line(&mut greeting)
+            .context("expected greeting line from QEMU monitor")?;
+
+        // Check the greeting:
+        let Greeting {
+            qmp: Qmp { version, .. },
+        } = serde_json::from_str(greeting.as_str()).context("failed to parse QEMU QMP greeting")?;
+        log::info!(
+            "connected to QEMU version {major}.{minor}.{micro}",
+            major = version.qemu.major,
+            minor = version.qemu.minor,
+            micro = version.qemu.micro
+        );
+
+        let mut monitor = Monitor {
+            tty,
+            id_counter: 0,
+            quit_qemu,
+        };
+
+        // Negotiate capabilities.
+        // We don't need any, but the protocol requires us to do this.
+        monitor.send_cmd("qmp_capabilities", None)?;
+
+        Ok(monitor)
+    }
+
+    /// Send a continue command either starting or resuming the emulation.
+    pub fn cont(&mut self) -> anyhow::Result<()> {
+        self.send_cmd("cont", None)?;
+
+        Ok(())
+    }
+
+    /// Stop the emulation (resumable, does not quit QEMU).
+    pub fn stop(&mut self) -> anyhow::Result<()> {
+        self.send_cmd("stop", None)?;
+
+        Ok(())
+    }
+
+    /// Reset the system within the emulation.
+    pub fn reset(&mut self) -> anyhow::Result<()> {
+        self.send_cmd("system_reset", None)?;
+
+        Ok(())
+    }
+
+    /// Gracefully shut down QEMU and terminate the process.
+    pub fn quit(&mut self) -> anyhow::Result<()> {
+        self.send_cmd("quit", None)?;
+
+        Ok(())
+    }
+
+    /// List the IDs of the currently configured `chardev`s.
+    pub fn query_chardevs(&mut self) -> anyhow::Result<Vec<Chardev>> {
+        let response = self.send_cmd("query-chardev", None)?;
+        let serde_json::Value::Array(response) = response else {
+            bail!("expected array of chardevs");
+        };
+
+        let mut chardevs = Vec::new();
+        for chardev in response {
+            let chardev = serde_json::from_value(chardev).context("failed to parse chardev")?;
+            chardevs.push(chardev);
+        }
+
+        Ok(chardevs)
+    }
+
+    pub fn send_chardev_break(&mut self, id: &str) -> anyhow::Result<()> {
+        self.send_cmd(
+            "chardev-send-break",
+            Some(format!(r#"{{"id": "{id}"}}"#).as_str()),
+        )?;
+
+        Ok(())
+    }
+
+    /// Send a command over the JSON QMP interface.
+    ///
+    /// The protocol goes:
+    ///
+    /// 1. Send a command with the form `{ "execute": <cmd>, "arguments": <obj>, "id": <val> }`.
+    /// 2. Skip any asynchronous event responses that arrived before the command.
+    /// 3. Check the response for success (with optional value) or error.
+    ///
+    /// We only support synchronous commands, i.e. we wait for a response before
+    /// sending anything new.
+    fn send_cmd(&mut self, cmd: &str, args: Option<&str>) -> anyhow::Result<serde_json::Value> {
+        let id = self.id_counter;
+
+        let command = match args {
+            Some(arguments) => {
+                format!(r#"{{ "execute": "{cmd}", "arguments": {arguments}, "id": {id} }}"#)
+            }
+            None => format!(r#"{{ "execute": "{cmd}", "id": {id} }}"#),
+        };
+
+        writeln!(self.tty.get_mut(), "{}", command.as_str())?;
+
+        // Increment the ID for the next message.
+        self.id_counter += 1;
+
+        // Find the response for this message, skipping over asynchronous events that came in
+        // before we sent our command.
+        let response = loop {
+            let mut line = String::new();
+            self.tty.read_line(&mut line)?;
+
+            let response: MonitorResponse = serde_json::from_str(&line)
+                .with_context(|| format!("unexpected response: {line}"))?;
+
+            // Skip asynchronous event responses.
+            if let MonitorResponse::Event { .. } = response {
+                continue;
+            }
+
+            break response;
+        };
+
+        // Check for success/failure, extracting the return value for successes.
+        match response {
+            MonitorResponse::Success {
+                r#return,
+                id: resp_id,
+            } => {
+                ensure!(id == resp_id, "response ID did not match request ID");
+                Ok(r#return)
+            }
+            MonitorResponse::Error { id: resp_id, error } => {
+                ensure!(id == resp_id, "response ID did not match request ID");
+                bail!("monitor returned error: {error:#?}");
+            }
+            MonitorResponse::Event { .. } => unreachable!("should have been skipped"),
+        }
+    }
+}
+
+impl Drop for Monitor {
+    fn drop(&mut self) {
+        // Quit QEMU when dropped if requested.
+        if self.quit_qemu {
+            self.quit().ok();
+        }
+    }
+}
+
+/// Possible responses from the server.
+#[derive(Deserialize)]
+#[serde(untagged)]
+enum MonitorResponse {
+    /// Command with `id` was successful and has optional return value.
+    Success {
+        id: usize,
+        r#return: serde_json::Value,
+    },
+    /// Command with `id` gave an error with some extra details.
+    Error { id: usize, error: serde_json::Value },
+    /// Asynchronous event arrived outside of our commands.
+    Event {
+        #[serde(rename = "event")]
+        _event: String,
+        #[serde(rename = "timestamp")]
+        _timestamp: serde_json::Value,
+        #[serde(rename = "data", default)]
+        _data: serde_json::Value,
+    },
+}
+
+/// Greeting message when connecting to QEMU.
+#[derive(Deserialize)]
+struct Greeting {
+    #[serde(alias = "QMP")]
+    qmp: Qmp,
+}
+
+/// QMP protocol information.
+#[derive(Deserialize)]
+struct Qmp {
+    /// Current version.
+    version: Version,
+    /// Optional capabilities of the monitor.
+    #[serde(rename = "capabilities")]
+    _capabilities: Vec<String>,
+}
+
+/// QMP version information.
+#[derive(Deserialize)]
+struct Version {
+    qemu: QemuVersion,
+
+    #[serde(rename = "package")]
+    _package: String,
+}
+
+/// QEMU version information.
+#[derive(Deserialize)]
+struct QemuVersion {
+    major: usize,
+    minor: usize,
+    micro: usize,
+}
+
+/// Response from QEMU's `query-chardev` describing a character device.
+#[derive(Debug, Deserialize)]
+struct ChardevJson {
+    label: String,
+    filename: String,
+
+    #[serde(rename = "frontend_open")]
+    _frontend_open: Option<bool>,
+}
+
+/// Nicer version of the chardev info that QEMU sends us.
+#[derive(Clone, Debug, Deserialize)]
+#[serde(try_from = "ChardevJson")]
+pub struct Chardev {
+    pub id: String,
+    pub kind: ChardevKind,
+}
+
+/// Possible kinds of supported chardevs.
+#[derive(Clone, Debug)]
+pub enum ChardevKind {
+    Pty { path: PathBuf },
+    Socket { path: PathBuf },
+    Other,
+}
+
+impl TryFrom<ChardevJson> for Chardev {
+    type Error = anyhow::Error;
+
+    fn try_from(json: ChardevJson) -> anyhow::Result<Chardev> {
+        let kind = if let Some(path) = json.filename.strip_prefix("pty:") {
+            let path = PathBuf::from(path);
+            ChardevKind::Pty { path }
+        } else if let Some(sock) = json.filename.strip_prefix("disconnected:unix:") {
+            let path = sock
+                .split(',')
+                .next()
+                .with_context(|| format!("bad socket path format: {sock}"))?;
+            let path = PathBuf::from(path);
+            ChardevKind::Socket { path }
+        } else {
+            ChardevKind::Other
+        };
+
+        let chardev = Chardev {
+            id: json.label,
+            kind,
+        };
+
+        Ok(chardev)
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/reset.rs b/sw/host/opentitanlib/src/transport/qemu/reset.rs
new file mode 100644
index 0000000000000..01ddb73dc5300
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/reset.rs
@@ -0,0 +1,78 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::cell::{Cell, RefCell};
+use std::rc::Rc;
+
+use crate::io::gpio::{GpioPin, PinMode, PullMode};
+use crate::transport::qemu::monitor::Monitor;
+
+/// Pin-like interface for resetting QEMU.
+///
+/// QEMU can be reset over the monitor interface, however opentitanlib expects
+/// to be able to assert a pin to reset the target. This type mimics a pin but
+/// translates asserting it to monitor commands.
+pub struct QemuReset {
+    pub monitor: Rc<RefCell<Monitor>>,
+    pub asserted: Cell<bool>,
+}
+
+impl QemuReset {
+    pub fn new(monitor: Rc<RefCell<Monitor>>) -> QemuReset {
+        QemuReset {
+            monitor,
+            asserted: Cell::new(false),
+        }
+    }
+}
+
+impl GpioPin for QemuReset {
+    fn read(&self) -> anyhow::Result<bool> {
+        Ok(self.asserted.get())
+    }
+
+    fn write(&self, value: bool) -> anyhow::Result<()> {
+        if value == self.asserted.get() {
+            return Ok(());
+        }
+
+        let mut monitor = self.monitor.borrow_mut();
+
+        match value {
+            false => {
+                monitor.stop()?;
+                monitor.reset()?;
+            }
+            true => {
+                monitor.cont()?;
+            }
+        }
+
+        self.asserted.set(value);
+
+        Ok(())
+    }
+
+    fn set_mode(&self, _mode: PinMode) -> anyhow::Result<()> {
+        Ok(())
+    }
+
+    fn set_pull_mode(&self, _mode: PullMode) -> anyhow::Result<()> {
+        Ok(())
+    }
+
+    fn set(
+        &self,
+        _mode: Option<PinMode>,
+        value: Option<bool>,
+        _pull: Option<PullMode>,
+        _analog_value: Option<f32>,
+    ) -> anyhow::Result<()> {
+        if let Some(value) = value {
+            return self.write(value);
+        }
+
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/spi.rs b/sw/host/opentitanlib/src/transport/qemu/spi.rs
new file mode 100644
index 0000000000000..14c76df2259c1
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/spi.rs
@@ -0,0 +1,225 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::cell::{Cell, RefCell};
+use std::io::{Read, Write};
+use std::path::Path;
+use std::rc::Rc;
+
+use anyhow::{Context, ensure};
+use serialport::TTYPort;
+
+use crate::io::gpio;
+use crate::io::spi::{
+    AssertChipSelect, MaxSizes, Target, TargetChipDeassert, Transfer, TransferMode,
+};
+use crate::transport::TransportError;
+use crate::util::voltage::Voltage;
+
+/// SPI clock polarity - unset = idle at low voltage, set = idle at high voltage.
+const HEADER_CPOL_BIT: u8 = 0b01;
+/// SPI phase - unset = sample when no longer idle, set = sample when idle.
+const HEADER_CPHA_BIT: u8 = 0b10;
+/// When set, CS is held asserted even after the current frame is transferred.
+const HEADER_HOLD_CS_BIT: u8 = 0b1000_0000;
+
+/// Maximum amount of SPI data that cam be transferred in one frame to QEMU (not including header).
+const MAX_PACKET_LEN: usize = u16::MAX as usize;
+
+pub struct QemuSpi {
+    tty: RefCell<TTYPort>,
+
+    mode: Cell<TransferMode>,
+}
+
+impl QemuSpi {
+    pub fn new<P: AsRef<Path>>(tty: P) -> anyhow::Result<QemuSpi> {
+        let tty = tty.as_ref().to_str().context("path not UTF-8")?;
+        let tty = serialport::new(tty, 115200)
+            .timeout(std::time::Duration::from_secs(1))
+            .open_native()
+            .context("failed to open SPI TTY")?;
+        let tty = RefCell::new(tty);
+
+        let mode = Cell::new(TransferMode::Mode0);
+
+        Ok(QemuSpi { tty, mode })
+    }
+
+    /// Send a SPI transfer header to QEMU.
+    ///
+    /// Takes the length of the transfer and whether the CS should be held
+    /// asserted afterwards or released.
+    ///
+    /// The header is a custom format for our SPI device in QEMU.
+    fn write_header(&self, len: u16, hold_cs: bool) -> anyhow::Result<()> {
+        let mut tty = self.tty.borrow_mut();
+
+        let spi_mode = match self.mode.get() {
+            TransferMode::Mode0 => 0,
+            TransferMode::Mode1 => HEADER_CPOL_BIT,
+            TransferMode::Mode2 => HEADER_CPHA_BIT,
+            TransferMode::Mode3 => HEADER_CPOL_BIT | HEADER_CPHA_BIT,
+        };
+
+        let hold_cs = match hold_cs {
+            false => 0,
+            true => HEADER_HOLD_CS_BIT,
+        };
+
+        // Assert chip select:
+        write!(tty, "/CS")?;
+        // Protocol version (zero):
+        tty.write_all(&[0])?;
+        // Flags:
+        tty.write_all(&[spi_mode | hold_cs])?;
+        // Ignored byte:
+        tty.write_all(&[0])?;
+        // Payload length:
+        tty.write_all(&len.to_le_bytes())?;
+
+        tty.flush()?;
+
+        Ok(())
+    }
+}
+
+impl Target for QemuSpi {
+    fn run_transaction(&self, transaction: &mut [Transfer]) -> anyhow::Result<()> {
+        // Send and receive over the TTY.
+        let transfer_count = transaction.len();
+
+        for (idx, transfer) in transaction.iter_mut().enumerate() {
+            let last_transfer = idx + 1 == transfer_count;
+
+            match transfer {
+                Transfer::Read(buf) => {
+                    let len: u16 = buf.len().try_into().context("read transfer too big")?;
+                    self.write_header(len, !last_transfer)?;
+
+                    // QEMU will only clock out the TX data if we send dummy data to the RX.
+                    let dummy_buf = vec![0; buf.len()];
+                    self.tty
+                        .borrow_mut()
+                        .write_all(&dummy_buf[..])
+                        .context("failed to read SPI TTY")?;
+                    self.tty.borrow_mut().flush()?;
+
+                    // Read out the TX data from QEMU:
+                    self.tty
+                        .borrow_mut()
+                        .read_exact(buf)
+                        .context("failed to read SPI TTY")?;
+                }
+                Transfer::Write(buf) => {
+                    let len: u16 = buf.len().try_into().context("write transfer too big")?;
+                    self.write_header(len, !last_transfer)?;
+
+                    // Send RX data to QEMU:
+                    self.tty
+                        .borrow_mut()
+                        .write_all(buf)
+                        .context("failed to write to SPI TTY")?;
+                    self.tty.borrow_mut().flush()?;
+
+                    // Sending data will also clock out TX data from QEMU which we need
+                    // to clear from the TTY. Read it into a buffer and drop it:
+                    let mut garbage = vec![0; buf.len()];
+                    self.tty.borrow_mut().read_exact(&mut garbage)?;
+                }
+                Transfer::Both(write_buf, read_buf) => {
+                    ensure!(
+                        write_buf.len() == read_buf.len(),
+                        "transfers must be same size"
+                    );
+                    let len: u16 = write_buf.len().try_into().context("transfer too big")?;
+                    self.write_header(len, !last_transfer)?;
+
+                    self.tty
+                        .borrow_mut()
+                        .write_all(write_buf)
+                        .context("failed to write to SPI TTY")?;
+                    self.tty.borrow_mut().flush()?;
+
+                    self.tty
+                        .borrow_mut()
+                        .read_exact(read_buf)
+                        .context("failed to read from SPI TTY")?;
+                }
+            }
+        }
+
+        Ok(())
+    }
+
+    fn get_bits_per_word(&self) -> anyhow::Result<u32> {
+        Ok(32)
+    }
+
+    fn supports_bidirectional_transfer(&self) -> anyhow::Result<bool> {
+        Ok(true)
+    }
+
+    fn get_max_transfer_count(&self) -> anyhow::Result<usize> {
+        Ok(0)
+    }
+
+    fn get_max_transfer_sizes(&self) -> anyhow::Result<MaxSizes> {
+        let sizes = MaxSizes {
+            read: MAX_PACKET_LEN,
+            write: MAX_PACKET_LEN,
+        };
+        Ok(sizes)
+    }
+
+    fn get_transfer_mode(&self) -> anyhow::Result<TransferMode> {
+        Ok(self.mode.get())
+    }
+
+    fn set_transfer_mode(&self, mode: TransferMode) -> anyhow::Result<()> {
+        self.mode.set(mode);
+        Ok(())
+    }
+
+    fn get_max_speed(&self) -> anyhow::Result<u32> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn set_max_speed(&self, _max_speed: u32) -> anyhow::Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn set_bits_per_word(&self, _bits_per_word: u32) -> anyhow::Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn set_pins(
+        &self,
+        _serial_clock: Option<&Rc<dyn gpio::GpioPin>>,
+        _host_out_device_in: Option<&Rc<dyn gpio::GpioPin>>,
+        _host_in_device_out: Option<&Rc<dyn gpio::GpioPin>>,
+        _chip_select: Option<&Rc<dyn gpio::GpioPin>>,
+    ) -> anyhow::Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn assert_cs(self: Rc<Self>) -> anyhow::Result<AssertChipSelect> {
+        // Could potentially be implemented by sending an empty packet that
+        // holds the CS and another which deasserts when dropped.
+        log::warn!("TODO: Implement CS for Qemu");
+        Ok(AssertChipSelect::new(self))
+    }
+
+    fn set_voltage(&self, _voltage: Voltage) -> anyhow::Result<()> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+
+    fn get_flashrom_programmer(&self) -> anyhow::Result<String> {
+        Err(TransportError::UnsupportedOperation.into())
+    }
+}
+
+impl TargetChipDeassert for QemuSpi {
+    fn deassert_cs(&self) {}
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/uart.rs b/sw/host/opentitanlib/src/transport/qemu/uart.rs
new file mode 100644
index 0000000000000..3b2aec740a855
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/uart.rs
@@ -0,0 +1,114 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::cell::RefCell;
+use std::os::fd::BorrowedFd;
+use std::rc::Rc;
+use std::time::Duration;
+
+use anyhow::Result;
+use serialport::Parity;
+
+use crate::io::uart::Uart;
+use crate::transport::NonblockingHelp;
+use crate::transport::common::uart::SerialPortUart;
+use crate::transport::qemu::monitor::Monitor;
+
+pub struct QemuUart {
+    /// Connection to the QEMU monitor which can control the emulator.
+    pub monitor: Rc<RefCell<Monitor>>,
+
+    // The UART CharDev's id
+    id: String,
+
+    // Underlying SerialPort used for the UART.
+    serial_port: SerialPortUart,
+
+    // Whether the UART is currently transmitting a break condition or not.
+    in_break: RefCell<bool>,
+}
+
+impl QemuUart {
+    pub fn new(monitor: Rc<RefCell<Monitor>>, id: &str, serial_port: SerialPortUart) -> Self {
+        Self {
+            monitor,
+            id: id.into(),
+            serial_port,
+            in_break: RefCell::new(false),
+        }
+    }
+}
+
+impl Uart for QemuUart {
+    fn get_baudrate(&self) -> Result<u32> {
+        self.serial_port.get_baudrate()
+    }
+
+    fn set_baudrate(&self, baudrate: u32) -> Result<()> {
+        self.serial_port.set_baudrate(baudrate)
+    }
+
+    fn set_flow_control(&self, flow_control: bool) -> Result<()> {
+        self.serial_port.set_flow_control(flow_control)
+    }
+
+    fn get_device_path(&self) -> Result<String> {
+        self.serial_port.get_device_path()
+    }
+
+    fn read(&self, buf: &mut [u8]) -> Result<usize> {
+        self.serial_port.read(buf)
+    }
+
+    fn read_timeout(&self, buf: &mut [u8], timeout: Duration) -> Result<usize> {
+        self.serial_port.read_timeout(buf, timeout)
+    }
+
+    fn write(&self, buf: &[u8]) -> Result<()> {
+        self.serial_port.write(buf)
+    }
+
+    fn clear_rx_buffer(&self) -> Result<()> {
+        self.serial_port.clear_rx_buffer()
+    }
+
+    fn set_break(&self, enable: bool) -> Result<()> {
+        // Assumes we have ot-uart.toggle-break=true, so always send break
+        if *self.in_break.borrow() ^ enable {
+            self.monitor.borrow_mut().send_chardev_break(&self.id)?;
+            *self.in_break.borrow_mut() = enable;
+        }
+        Ok(())
+    }
+
+    fn set_parity(&self, parity: Parity) -> Result<()> {
+        self.serial_port.set_parity(parity)
+    }
+
+    fn supports_nonblocking_read(&self) -> Result<bool> {
+        self.serial_port.supports_nonblocking_read()
+    }
+
+    fn register_nonblocking_read(&self, registry: &mio::Registry, token: mio::Token) -> Result<()> {
+        self.serial_port.register_nonblocking_read(registry, token)
+    }
+
+    fn nonblocking_help(&self) -> Result<Rc<dyn NonblockingHelp>> {
+        self.serial_port.nonblocking_help()
+    }
+
+    fn borrow_fd(&self) -> Result<BorrowedFd> {
+        self.serial_port.borrow_fd()
+    }
+}
+
+impl Drop for QemuUart {
+    fn drop(&mut self) {
+        // Stop transmitting break before deleting the UART
+        if *self.in_break.borrow() {
+            let _ = self.monitor.borrow_mut().send_chardev_break(&self.id);
+            *self.in_break.borrow_mut() = false;
+        }
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/qemu/usbdev.rs b/sw/host/opentitanlib/src/transport/qemu/usbdev.rs
new file mode 100644
index 0000000000000..1271f59498fca
--- /dev/null
+++ b/sw/host/opentitanlib/src/transport/qemu/usbdev.rs
@@ -0,0 +1,65 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use serialport::TTYPort;
+use std::cell::{Cell, RefCell};
+use std::io::Write;
+
+use crate::io::gpio::{GpioPin, PinMode, PullMode};
+
+/// Pin-like interface for controlling USB VBUS.
+pub struct QemuVbusSense {
+    pub usbdev: RefCell<TTYPort>,
+    pub asserted: Cell<bool>,
+}
+
+impl QemuVbusSense {
+    pub fn new(usbdev: TTYPort) -> QemuVbusSense {
+        QemuVbusSense {
+            usbdev: RefCell::new(usbdev),
+            asserted: Cell::new(false),
+        }
+    }
+}
+
+impl GpioPin for QemuVbusSense {
+    fn read(&self) -> anyhow::Result<bool> {
+        Ok(self.asserted.get())
+    }
+
+    fn write(&self, value: bool) -> anyhow::Result<()> {
+        if value == self.asserted.get() {
+            return Ok(());
+        }
+
+        let cmd = if value { "vbus_on" } else { "vbus_off" };
+        writeln!(*self.usbdev.borrow_mut(), "{}", cmd)?;
+
+        self.asserted.set(value);
+
+        Ok(())
+    }
+
+    fn set_mode(&self, _mode: PinMode) -> anyhow::Result<()> {
+        Ok(())
+    }
+
+    fn set_pull_mode(&self, _mode: PullMode) -> anyhow::Result<()> {
+        Ok(())
+    }
+
+    fn set(
+        &self,
+        _mode: Option<PinMode>,
+        value: Option<bool>,
+        _pull: Option<PullMode>,
+        _analog_value: Option<f32>,
+    ) -> anyhow::Result<()> {
+        if let Some(value) = value {
+            return self.write(value);
+        }
+
+        Ok(())
+    }
+}
diff --git a/sw/host/opentitanlib/src/transport/ti50emulator/emu.rs b/sw/host/opentitanlib/src/transport/ti50emulator/emu.rs
index dad0e433355f7..8be5bb852b86c 100644
--- a/sw/host/opentitanlib/src/transport/ti50emulator/emu.rs
+++ b/sw/host/opentitanlib/src/transport/ti50emulator/emu.rs
@@ -13,15 +13,15 @@ use std::process::{Child, Command, Stdio};
 use std::rc::Rc;
 use std::time::{Duration, Instant};
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use log;
 use rustix::process::{Pid, Signal};
 use serde::{Deserialize, Serialize};
 
 use crate::io::emu::{EmuError, EmuState, EmuValue, Emulator};
 use crate::io::gpio::{self, GpioError, PinMode, PullMode};
-use crate::transport::ti50emulator::gpio::Logic;
 use crate::transport::ti50emulator::Inner;
+use crate::transport::ti50emulator::gpio::Logic;
 use crate::util::file;
 
 const SPAWN_TIMEOUT: Duration = Duration::from_secs(10);
diff --git a/sw/host/opentitanlib/src/transport/ti50emulator/gpio.rs b/sw/host/opentitanlib/src/transport/ti50emulator/gpio.rs
index 53bea18add5b2..6623b08d84115 100644
--- a/sw/host/opentitanlib/src/transport/ti50emulator/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/ti50emulator/gpio.rs
@@ -6,7 +6,7 @@ use std::fmt;
 use std::io::{Read, Write};
 use std::rc::Rc;
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use serde::{Deserialize, Deserializer, Serialize, Serializer};
 use std::convert::TryFrom;
 use std::os::unix::net::UnixStream;
@@ -96,7 +96,7 @@ impl<'de> Deserialize<'de> for Logic {
                 return Err(serde::de::Error::custom(format!(
                     "Unrecognized logic level: {}",
                     val
-                )))
+                )));
             }
         })
     }
diff --git a/sw/host/opentitanlib/src/transport/ti50emulator/i2c.rs b/sw/host/opentitanlib/src/transport/ti50emulator/i2c.rs
index 85c72fd6e4fd9..eb9c4f30eeee8 100644
--- a/sw/host/opentitanlib/src/transport/ti50emulator/i2c.rs
+++ b/sw/host/opentitanlib/src/transport/ti50emulator/i2c.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use log;
 
 use std::cell::{Cell, RefCell};
@@ -14,9 +14,9 @@ use std::time::{Duration, Instant};
 
 use crate::io::emu::EmuState;
 use crate::io::i2c::{Bus, I2cError, Transfer};
-use crate::transport::ti50emulator::emu::EMULATOR_INVALID_ID;
-use crate::transport::ti50emulator::Inner;
 use crate::transport::TransportError;
+use crate::transport::ti50emulator::Inner;
+use crate::transport::ti50emulator::emu::EMULATOR_INVALID_ID;
 
 const MAX_READ_TIMEOUT: Duration = Duration::from_millis(35);
 const MAX_WRITE_TIMEOUT: Duration = Duration::from_millis(35);
diff --git a/sw/host/opentitanlib/src/transport/ti50emulator/uart.rs b/sw/host/opentitanlib/src/transport/ti50emulator/uart.rs
index 5698d658a150a..2a217b3b631f7 100644
--- a/sw/host/opentitanlib/src/transport/ti50emulator/uart.rs
+++ b/sw/host/opentitanlib/src/transport/ti50emulator/uart.rs
@@ -50,9 +50,9 @@ impl Ti50Uart {
     }
 
     pub fn get_socket(&self) -> Result<RefMut<UnixStream>> {
-        return Ok(RefMut::map(self.socket.borrow_mut(), |socket| {
+        Ok(RefMut::map(self.socket.borrow_mut(), |socket| {
             socket.as_mut().unwrap()
-        }));
+        }))
     }
 }
 
diff --git a/sw/host/opentitanlib/src/transport/ultradebug/gpio.rs b/sw/host/opentitanlib/src/transport/ultradebug/gpio.rs
index 2a6b91bb614c1..9566fa743b936 100644
--- a/sw/host/opentitanlib/src/transport/ultradebug/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/ultradebug/gpio.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use once_cell::sync::Lazy;
 use std::cell::RefCell;
 use std::collections::HashMap;
@@ -10,8 +10,8 @@ use std::rc::Rc;
 
 use crate::collection;
 use crate::io::gpio::{GpioError, GpioPin, PinMode, PullMode};
-use crate::transport::ultradebug::mpsse;
 use crate::transport::ultradebug::Ultradebug;
+use crate::transport::ultradebug::mpsse;
 use crate::util::parse_int::ParseInt;
 
 /// Represents the Ultradebug GPIO pins.
diff --git a/sw/host/opentitanlib/src/transport/ultradebug/mod.rs b/sw/host/opentitanlib/src/transport/ultradebug/mod.rs
index 1f57489cae489..ee435d191a05c 100644
--- a/sw/host/opentitanlib/src/transport/ultradebug/mod.rs
+++ b/sw/host/opentitanlib/src/transport/ultradebug/mod.rs
@@ -5,7 +5,7 @@
 use std::cell::RefCell;
 use std::rc::Rc;
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 
 use crate::io::gpio::GpioPin;
 use crate::io::spi::Target;
diff --git a/sw/host/opentitanlib/src/transport/ultradebug/mpsse.rs b/sw/host/opentitanlib/src/transport/ultradebug/mpsse.rs
index 77bcb54a48a64..b06ab97c6cc2d 100644
--- a/sw/host/opentitanlib/src/transport/ultradebug/mpsse.rs
+++ b/sw/host/opentitanlib/src/transport/ultradebug/mpsse.rs
@@ -5,7 +5,7 @@
 use std::io::{Read, Write};
 use std::time::{Duration, Instant};
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use bitflags::bitflags;
 use log;
 use thiserror::Error;
diff --git a/sw/host/opentitanlib/src/transport/ultradebug/spi.rs b/sw/host/opentitanlib/src/transport/ultradebug/spi.rs
index e30dbf7197f04..3049994a45f43 100644
--- a/sw/host/opentitanlib/src/transport/ultradebug/spi.rs
+++ b/sw/host/opentitanlib/src/transport/ultradebug/spi.rs
@@ -10,8 +10,8 @@ use crate::io::spi::{
     AssertChipSelect, ClockPolarity, MaxSizes, SpiError, Target, TargetChipDeassert, Transfer,
     TransferMode,
 };
-use crate::transport::ultradebug::mpsse;
 use crate::transport::ultradebug::Ultradebug;
+use crate::transport::ultradebug::mpsse;
 
 struct Inner {
     mode: TransferMode,
diff --git a/sw/host/opentitanlib/src/transport/verilator/gpio.rs b/sw/host/opentitanlib/src/transport/verilator/gpio.rs
index ea272c7ff3556..d5247527b8175 100644
--- a/sw/host/opentitanlib/src/transport/verilator/gpio.rs
+++ b/sw/host/opentitanlib/src/transport/verilator/gpio.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use std::cell::{Cell, RefCell};
 use std::collections::HashMap;
 use std::fs::{File, OpenOptions};
@@ -11,8 +11,8 @@ use std::rc::Rc;
 use std::time::Duration;
 
 use crate::io::gpio::{GpioError, GpioPin, PinMode, PullMode};
-use crate::transport::verilator::transport::Inner;
 use crate::transport::TransportError;
+use crate::transport::verilator::transport::Inner;
 use crate::util::file;
 
 pub struct VerilatorGpioPin {
diff --git a/sw/host/opentitanlib/src/transport/verilator/subprocess.rs b/sw/host/opentitanlib/src/transport/verilator/subprocess.rs
index 5ba93cee01370..8d5bc92b050a1 100644
--- a/sw/host/opentitanlib/src/transport/verilator/subprocess.rs
+++ b/sw/host/opentitanlib/src/transport/verilator/subprocess.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, ensure, Result};
+use anyhow::{Result, anyhow, ensure};
 use regex::Regex;
 use std::io::ErrorKind;
 use std::process::{Child, Command, Stdio};
diff --git a/sw/host/opentitanlib/src/transport/verilator/transport.rs b/sw/host/opentitanlib/src/transport/verilator/transport.rs
index bdcf54e3ee21a..54f6737b3e365 100644
--- a/sw/host/opentitanlib/src/transport/verilator/transport.rs
+++ b/sw/host/opentitanlib/src/transport/verilator/transport.rs
@@ -2,10 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use once_cell::sync::Lazy;
 use regex::Regex;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::cell::RefCell;
 use std::rc::Rc;
@@ -122,7 +121,7 @@ impl Transport for Verilator {
         })))
     }
 
-    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn Annotate>>> {
+    fn dispatch(&self, action: &dyn Any) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(watch) = action.downcast_ref::<Watch>() {
             let subprocess = self.subprocess.as_ref().unwrap();
             let deadline = Instant::now() + watch.timeout.unwrap_or(Watch::FOREVER);
diff --git a/sw/host/opentitanlib/src/uart/console.rs b/sw/host/opentitanlib/src/uart/console.rs
index 4a4375fc697fc..d11efd46cc3fa 100644
--- a/sw/host/opentitanlib/src/uart/console.rs
+++ b/sw/host/opentitanlib/src/uart/console.rs
@@ -2,8 +2,10 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, bail, Result};
+use anyhow::{Result, anyhow, bail};
+use crc::{CRC_32_ISO_HDLC, Crc};
 use mio::{Events, Interest, Poll, Token};
+use rand::Rng;
 use regex::{Captures, Regex};
 use std::fs::File;
 use std::io::{ErrorKind, Read, Write};
@@ -14,6 +16,17 @@ use std::time::{Duration, Instant, SystemTime};
 use crate::io::console::{ConsoleDevice, ConsoleError};
 use crate::util::file;
 
+const COVERAGE_START_ANCHOR: &str = "== COVERAGE PROFILE START ==\r\n";
+const COVERAGE_END_ANCHOR: &str = "== COVERAGE PROFILE END ==\r\n";
+const COVERAGE_SKIP_ANCHOR: &str = "== COVERAGE PROFILE SKIP ==\r\n";
+
+#[derive(Default, PartialEq)]
+pub enum BufferMode {
+    #[default]
+    Normal,
+    Coverage,
+}
+
 #[derive(Default)]
 pub struct UartConsole {
     pub logfile: Option<File>,
@@ -22,8 +35,11 @@ pub struct UartConsole {
     pub exit_success: Option<Regex>,
     pub exit_failure: Option<Regex>,
     pub timestamp: bool,
-    pub buffer: String,
+    pub buffer_mode: BufferMode,
+    pub normal_buffer: String,
+    pub coverage_buffer: String,
     pub newline: bool,
+    pub carriage_return: bool,
     pub break_en: bool,
 }
 
@@ -43,7 +59,7 @@ impl<T: Read + AsFd> ReadAsFd for T {}
 impl UartConsole {
     const CTRL_B: u8 = 2;
     const CTRL_C: u8 = 3;
-    const BUFFER_LEN: usize = 16384;
+    const BUFFER_LEN: usize = 32768;
 
     // Runs an interactive console until CTRL_C is received.
     pub fn interact<T>(
@@ -91,21 +107,8 @@ impl UartConsole {
         // HACK(nbdd0121): do a nonblocking read because the UART buffer may still have data in it.
         // If we wait for mio event now, we might be blocking forever.
         while self.uart_read(device, Duration::from_millis(0), &mut stdout)? {
-            if self
-                .exit_success
-                .as_ref()
-                .map(|rx| rx.is_match(&self.buffer))
-                == Some(true)
-            {
-                return Ok(ExitStatus::ExitSuccess);
-            }
-            if self
-                .exit_failure
-                .as_ref()
-                .map(|rx| rx.is_match(&self.buffer))
-                == Some(true)
-            {
-                return Ok(ExitStatus::ExitFailure);
+            if let Some(exit_status) = self.process_buffer()? {
+                return Ok(exit_status);
             }
         }
 
@@ -154,21 +157,8 @@ impl UartConsole {
                     // `mio` convention demands that we keep reading until a read returns zero
                     // bytes, otherwise next `poll()` is not guaranteed to notice more data.
                     while self.uart_read(device, Duration::from_millis(1), &mut stdout)? {
-                        if self
-                            .exit_success
-                            .as_ref()
-                            .map(|rx| rx.is_match(&self.buffer))
-                            == Some(true)
-                        {
-                            return Ok(ExitStatus::ExitSuccess);
-                        }
-                        if self
-                            .exit_failure
-                            .as_ref()
-                            .map(|rx| rx.is_match(&self.buffer))
-                            == Some(true)
-                        {
-                            return Ok(ExitStatus::ExitFailure);
+                        if let Some(exit_status) = self.process_buffer()? {
+                            return Ok(exit_status);
                         }
                     }
                 }
@@ -181,12 +171,123 @@ impl UartConsole {
         Token(TOKEN_COUNTER.fetch_add(1, Ordering::Relaxed))
     }
 
+    // Returns a reference to the currently active buffer (normal or coverage).
+    fn get_active_buffer(&self) -> &str {
+        match self.buffer_mode {
+            BufferMode::Normal => &self.normal_buffer,
+            BufferMode::Coverage => &self.coverage_buffer,
+        }
+    }
+
+    // Returns a mutable reference to the currently active buffer (normal or coverage).
+    fn get_active_buffer_mut(&mut self) -> &mut String {
+        match self.buffer_mode {
+            BufferMode::Normal => &mut self.normal_buffer,
+            BufferMode::Coverage => &mut self.coverage_buffer,
+        }
+    }
+
     // Maintain a buffer for the exit regexes to match against.
     fn append_buffer(&mut self, data: &[u8]) {
-        self.buffer.push_str(&String::from_utf8_lossy(data));
-        while self.buffer.len() > UartConsole::BUFFER_LEN {
-            self.buffer.remove(0);
+        let active_buffer = self.get_active_buffer_mut();
+        active_buffer.push_str(&String::from_utf8_lossy(data));
+        while active_buffer.len() > UartConsole::BUFFER_LEN {
+            active_buffer.remove(0);
+        }
+    }
+
+    // Remove the last n bytes from the active buffer
+    fn pop_buffer(&mut self, n: usize) {
+        let active_buffer = self.get_active_buffer_mut();
+        let new_len = active_buffer.len().saturating_sub(n);
+        active_buffer.truncate(new_len);
+    }
+
+    fn process_coverage_anchor(&mut self) -> Result<()> {
+        let active_buffer = self.get_active_buffer();
+        if active_buffer.ends_with(COVERAGE_START_ANCHOR) {
+            self.pop_buffer(COVERAGE_START_ANCHOR.len());
+            if self.buffer_mode == BufferMode::Coverage {
+                eprintln!("WARN: Got unterminated coverage block:");
+                eprintln!("{}", self.coverage_buffer);
+            }
+            self.buffer_mode = BufferMode::Coverage;
+            self.coverage_buffer.clear();
+        } else if active_buffer.ends_with(COVERAGE_END_ANCHOR) {
+            self.pop_buffer(COVERAGE_END_ANCHOR.len());
+            if self.buffer_mode == BufferMode::Coverage {
+                self.process_coverage_data()?;
+            } else {
+                eprintln!("WARN: Got unexpected coverage end indicator!");
+            }
+            self.buffer_mode = BufferMode::Normal;
+            self.coverage_buffer.clear();
+        } else if active_buffer.ends_with(COVERAGE_SKIP_ANCHOR) {
+            self.pop_buffer(COVERAGE_SKIP_ANCHOR.len());
+            if self.buffer_mode == BufferMode::Coverage {
+                eprintln!("WARN: Got unterminated coverage block:");
+                eprintln!("{}", self.coverage_buffer);
+            }
+            self.buffer_mode = BufferMode::Normal;
+            self.coverage_buffer.clear();
+        }
+        Ok(())
+    }
+
+    fn process_coverage_data(&mut self) -> Result<()> {
+        let response = hex::decode(&self.coverage_buffer)?;
+        if response.len() < 4 {
+            bail!(
+                "Coverage from the device is too short: {} bytes",
+                response.len()
+            );
         }
+
+        let (response, crc) = response.split_at(response.len() - 4);
+        let crc = u32::from_le_bytes(crc.try_into()?);
+        let actual = Crc::<u32>::new(&CRC_32_ISO_HDLC).checksum(response);
+        if crc != actual {
+            bail!("Coverage corrupted: crc = {crc:08x}, actual = {actual:08x}");
+        }
+
+        let path = std::env::var("LLVM_PROFILE_FILE").unwrap_or("./default.profraw".to_owned());
+        let path = path.replace("%h", "test.on.device");
+        let path = path.replace("%p", &rand::thread_rng().r#gen::<u32>().to_string());
+        let path = path.replace("%m", "0");
+        let path = path.replace(".profraw", ".xprofraw");
+
+        println!("Saving coverage profile to {path}");
+        std::fs::write(path, response)?;
+
+        Ok(())
+    }
+
+    fn process_exit_regex(&self) -> Option<ExitStatus> {
+        let active_buffer = self.get_active_buffer();
+
+        if self
+            .exit_success
+            .as_ref()
+            .map(|rx| rx.is_match(active_buffer))
+            == Some(true)
+        {
+            return Some(ExitStatus::ExitSuccess);
+        }
+        if self
+            .exit_failure
+            .as_ref()
+            .map(|rx| rx.is_match(active_buffer))
+            == Some(true)
+        {
+            return Some(ExitStatus::ExitFailure);
+        }
+        None
+    }
+
+    fn process_buffer(&mut self) -> Result<Option<ExitStatus>> {
+        let exit_result = self.process_exit_regex();
+        self.process_coverage_anchor()?;
+        Ok(exit_result)
     }
 
     // Read from the console device and process the data read.
@@ -204,25 +305,32 @@ impl UartConsole {
         if len == 0 {
             return Ok(false);
         }
-        for i in 0..len {
-            if self.timestamp && self.newline {
-                let t = humantime::format_rfc3339_millis(SystemTime::now());
+        if self.buffer_mode == BufferMode::Normal {
+            for i in 0..len {
+                if self.timestamp && self.newline {
+                    let t = humantime::format_rfc3339_millis(SystemTime::now());
+                    stdout.as_mut().map_or(Ok(()), |out| {
+                        out.write_fmt(format_args!("[{}  console]", t))
+                    })?;
+                    self.newline = false;
+                }
+                self.newline = buf[i] == b'\n';
                 stdout.as_mut().map_or(Ok(()), |out| {
-                    out.write_fmt(format_args!("[{}  console]", t))
+                    out.write_all(if self.newline && !self.carriage_return {
+                        b"\r\n"
+                    } else {
+                        &buf[i..i + 1]
+                    })
                 })?;
-                self.newline = false;
+                self.carriage_return = buf[i] == b'\r';
             }
-            self.newline = buf[i] == b'\n';
-            stdout
+            stdout.as_mut().map_or(Ok(()), |out| out.flush())?;
+
+            // If we're logging, save it to the logfile.
+            self.logfile
                 .as_mut()
-                .map_or(Ok(()), |out| out.write_all(&buf[i..i + 1]))?;
+                .map_or(Ok(()), |f| f.write_all(&buf[..len]))?;
         }
-        stdout.as_mut().map_or(Ok(()), |out| out.flush())?;
-
-        // If we're logging, save it to the logfile.
-        self.logfile
-            .as_mut()
-            .map_or(Ok(()), |f| f.write_all(&buf[..len]))?;
         self.append_buffer(&buf[..len]);
         Ok(true)
     }
@@ -294,35 +402,23 @@ impl UartConsole {
 
         // Check for input on the uart.
         self.uart_read(device, Duration::from_millis(10), stdout)?;
-        if self
-            .exit_success
-            .as_ref()
-            .map(|rx| rx.is_match(&self.buffer))
-            == Some(true)
-        {
-            return Ok(ExitStatus::ExitSuccess);
-        }
-        if self
-            .exit_failure
-            .as_ref()
-            .map(|rx| rx.is_match(&self.buffer))
-            == Some(true)
-        {
-            return Ok(ExitStatus::ExitFailure);
+        if let Some(exit_status) = self.process_buffer()? {
+            return Ok(exit_status);
         }
         self.process_input(device, stdin)
     }
 
     pub fn captures(&self, status: ExitStatus) -> Option<Captures> {
+        let active_buffer = self.get_active_buffer();
         match status {
             ExitStatus::ExitSuccess => self
                 .exit_success
                 .as_ref()
-                .and_then(|rx| rx.captures(&self.buffer)),
+                .and_then(|rx| rx.captures(active_buffer)),
             ExitStatus::ExitFailure => self
                 .exit_failure
                 .as_ref()
-                .and_then(|rx| rx.captures(&self.buffer)),
+                .and_then(|rx| rx.captures(active_buffer)),
             _ => None,
         }
     }
@@ -343,12 +439,13 @@ impl UartConsole {
         println!();
         match result {
             ExitStatus::ExitSuccess => {
-                let caps = console.captures(ExitStatus::ExitSuccess).expect("capture");
                 let mut vec = Vec::new();
-                for c in caps.iter() {
-                    match c {
-                        None => vec.push(String::new()),
-                        _ => vec.push(c.unwrap().as_str().to_owned()),
+                if let Some(caps) = console.captures(ExitStatus::ExitSuccess) {
+                    for c in caps.iter() {
+                        match c {
+                            None => vec.push(String::new()),
+                            _ => vec.push(c.unwrap().as_str().to_owned()),
+                        }
                     }
                 }
                 Ok(vec)
@@ -357,4 +454,15 @@ impl UartConsole {
             _ => Err(anyhow!("Impossible result: {:?}", result)),
         }
     }
+
+    pub fn wait_for_coverage<T>(device: &T, timeout: Duration) -> Result<()>
+    where
+        T: ConsoleDevice + ?Sized,
+    {
+        let anchor =
+            regex::escape(COVERAGE_END_ANCHOR) + "|" + &regex::escape(COVERAGE_SKIP_ANCHOR);
+
+        Self::wait_for(device, &anchor, timeout)?;
+        Ok(())
+    }
 }
diff --git a/sw/host/opentitanlib/src/util/bigint.rs b/sw/host/opentitanlib/src/util/bigint.rs
index d3e8d884b137e..4afd7d9552c64 100644
--- a/sw/host/opentitanlib/src/util/bigint.rs
+++ b/sw/host/opentitanlib/src/util/bigint.rs
@@ -33,6 +33,7 @@ pub enum ParseBigIntError {
 ///     e.g. SHA-256 digests (at most 256 bits) or RSA-3072 signatures (at most 3072 bits),
 ///   - When `EXACT_LEN` is `true`, the number of bits required to represent the integer must be
 ///     exactly `BIT_LEN` bits, e.g. RSA-3072 moduli (exactly 3072 bits).
+///
 /// Note that while the type encapsulates the size information, the actual check is performed at
 /// runtime when an instance is created (see `check_len()`).
 ///
diff --git a/sw/host/opentitanlib/src/util/bitbang.rs b/sw/host/opentitanlib/src/util/bitbang.rs
index 2207f43859248..261b87945b103 100644
--- a/sw/host/opentitanlib/src/util/bitbang.rs
+++ b/sw/host/opentitanlib/src/util/bitbang.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::collections::HashMap;
 use std::iter::Peekable;
 use std::ops::Mul;
@@ -368,8 +368,14 @@ pub fn parse_dac_sequence<'a, 'wr>(
     loop {
         match tokens {
             [Token::Numeric(_), Token::Alphabetic(_), rest @ ..]
-            | [Token::Linear, Token::LParen, Token::Numeric(_), Token::Alphabetic(_), Token::RParen, rest @ ..] =>
-            {
+            | [
+                Token::Linear,
+                Token::LParen,
+                Token::Numeric(_),
+                Token::Alphabetic(_),
+                Token::RParen,
+                rest @ ..,
+            ] => {
                 if needed_entries > run_start {
                     let run_length = needed_entries - run_start;
                     ensure!(
@@ -415,8 +421,14 @@ pub fn parse_dac_sequence<'a, 'wr>(
                 result.push(DacBangEntry::Delay(parse_delay(num, time_unit, clock)?));
                 tokens = rest;
             }
-            [Token::Linear, Token::LParen, Token::Numeric(num), Token::Alphabetic(time_unit), Token::RParen, rest @ ..] =>
-            {
+            [
+                Token::Linear,
+                Token::LParen,
+                Token::Numeric(num),
+                Token::Alphabetic(time_unit),
+                Token::RParen,
+                rest @ ..,
+            ] => {
                 result.push(DacBangEntry::Linear(parse_delay(num, time_unit, clock)?));
                 tokens = rest;
             }
diff --git a/sw/host/opentitanlib/src/util/file.rs b/sw/host/opentitanlib/src/util/file.rs
index 0f54ff2012454..769e05f287d54 100644
--- a/sw/host/opentitanlib/src/util/file.rs
+++ b/sw/host/opentitanlib/src/util/file.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use pem_rfc7468::{Decoder, Encoder, LineEnding};
 use thiserror::Error;
 
@@ -117,7 +117,7 @@ mod tests {
     use super::*;
     use anyhow::bail;
     use rustix::io::{read, write};
-    use rustix::net::{socketpair, AddressFamily, SocketFlags, SocketType};
+    use rustix::net::{AddressFamily, SocketFlags, SocketType, socketpair};
 
     #[test]
     fn test_data_ready() -> Result<()> {
diff --git a/sw/host/opentitanlib/src/util/known_keys.rs b/sw/host/opentitanlib/src/util/known_keys.rs
new file mode 100644
index 0000000000000..5a10ca7444b86
--- /dev/null
+++ b/sw/host/opentitanlib/src/util/known_keys.rs
@@ -0,0 +1,96 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use crate::collection;
+use once_cell::sync::Lazy;
+use std::collections::HashMap;
+
+pub static KNOWN_KEYS: Lazy<HashMap<u32, &'static str>> = Lazy::new(|| {
+    collection! {
+        // Earlgrey A1 SiVAL sku keys.
+        0x8aa047bb => "sv00-earlgrey-a1-root-ecdsa-prod-0 (ECDSA P256)",
+        0xc436fc3d => "sv00-earlgrey-a1-root-ecdsa-prod-1 (ECDSA P256)",
+        0xa7948feb => "sv00-earlgrey-a1-root-ecdsa-prod-2 (ECDSA P256)",
+        0x473d006d => "sv00-earlgrey-a1-root-ecdsa-test-0 (ECDSA P256)",
+        0x85eaf1aa => "sv00-earlgrey-a1-ca-dice-0 (ECDSA P256)",
+        0x9b53344b => "sv00-app-key-prod-0 (ECDSA P256)",
+        0x62d920f3 => "sv00-ownership-owner-0 (ECDSA P256)",
+        0x566482ec => "sv00-ownership-unlock-0 (ECDSA P256)",
+        0x7a7d6398 => "sv00-app-key-dev-0 (ECDSA P256)",
+        0x62b66f69 => "sv00-app-key-test-0 (ECDSA P256)",
+        0x0dcd2600 => "sv00-ownership-activate-0 (ECDSA P256)",
+
+        // Earlgrey A1 bringup sku keys.
+        0x421f9033 => "gb00-earlgrey-a1-ca-cros-sku-0 (ECDSA P256)",
+        0xd9e1bbf7 => "gb00-earlgrey-a1-ca-dice-0 (ECDSA P256)",
+        0x537f2f94 => "gb00-earlgrey-a1-root-ecdsa-prod-0 (ECDSA P256)",
+        0x068e5abd => "gb00-earlgrey-a1-root-ecdsa-prod-2 (ECDSA P256)",
+        0x80800406 => "gb00-earlgrey-a1-root-ecdsa-test-0 (ECDSA P256)",
+        0xbcf347ae => "gb00-earlgrey-a1-root-ecdsa-prod-1 (ECDSA P256)",
+        0x3cb98bb9 => "gb00-ownership-unlock-0 (ECDSA P256)",
+        0xe68fa35b => "gb00-app-key-test-0 (ECDSA P256)",
+        0x44611d1c => "gb00-app-key-dev-0 (ECDSA P256)",
+        0x7f8de7c7 => "gb00-app-key-prod-0 (ECDSA P256)",
+        0xd1456f6c => "gb00-ownership-activate-0 (ECDSA P256)",
+        0x87a76721 => "gb00-ownership-owner-0 (ECDSA P256)",
+
+        // Test-only keys used for FPGA and simulations.
+        0xc3061a8c => "sw/device/silicon_creator/rom/keys/unauthorized/ecdsa/unauthorized_key_0_ecdsa_p256.pub.der",
+        0x9bf2dafd => "sw/device/silicon_creator/rom/keys/fake/ecdsa/prod_key_0_ecdsa_p256.pub.der",
+        0x423e545e => "sw/device/silicon_creator/rom/keys/fake/ecdsa/prod_key_1_ecdsa_p256.pub.der",
+        0xc11c931c => "sw/device/silicon_creator/rom/keys/fake/ecdsa/dev_key_0_ecdsa_p256.pub.der",
+        0xee07109a => "sw/device/silicon_creator/rom/keys/fake/ecdsa/test_key_0_ecdsa_p256.pub.der",
+        0x665ff5e3 => "sw/device/silicon_creator/lib/ownership/keys/dummy/owner_ecdsa_p256.pub.der",
+        0x922bc9ea => "sw/device/silicon_creator/lib/ownership/keys/dummy/activate_ecdsa_p256.pub.der",
+        0xc8489315 => "sw/device/silicon_creator/lib/ownership/keys/dummy/unlock_ecdsa_p256.pub.der",
+        0xe264966d => "sw/device/silicon_creator/lib/ownership/keys/dummy/app_prod_ecdsa_p256.pub.der",
+        0x8e3dcb50 => "sw/device/silicon_creator/lib/ownership/keys/fake/owner_ecdsa_p256.pub.der",
+        0xced1f3c1 => "sw/device/silicon_creator/lib/ownership/keys/fake/app_test_ecdsa_p256.pub.der",
+        0x63a31253 => "sw/device/silicon_creator/lib/ownership/keys/fake/activate_ecdsa_p256.pub.der",
+        0x113f87b2 => "sw/device/silicon_creator/lib/ownership/keys/fake/unlock_ecdsa_p256.pub.der",
+        0xddd43a0c => "sw/device/silicon_creator/lib/ownership/keys/fake/app_dev_ecdsa_p256.pub.der",
+        0x265b676b => "sw/device/silicon_creator/lib/ownership/keys/fake/app_prod_ecdsa_p256.pub.der",
+        0x81401b6d => "sw/device/silicon_creator/lib/ownership/keys/fake/no_owner_recovery_ecdsa_p256.pub.der",
+        0xb0b5537f => "sw/device/silicon_creator/lib/ownership/keys/fake/app_unauthorized_ecdsa_p256.pub.der",
+        0xbd1f2453 => "sw/device/silicon_creator/rom/keys/unauthorized/rsa/unauthorized_0_rsa_3072_exp_f4.pub.der",
+        0x6a100995 => "sw/device/silicon_creator/manuf/keys/sival/rma_unlock_enc_rsa3072.pub.der",
+        0xd7a68199 => "sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der",
+
+        // RSA root keys for earlgrey_es
+        0xa721bf61 => "earlgrey_a0_prod_0 (RSA3072 earlgrey_es)",
+        0x7b3bbe01 => "earlgrey_a0_prod_1 (RSA3072 earlgrey_es)",
+        0xfd2152d1 => "earlgrey_a0_prod_2 (RSA3072 earlgrey_es)",
+        0xdb6186cd => "earlgrey_a0_dev_0 (RSA3072 earlgrey_es)",
+        0xd0456c25 => "earlgrey_a0_dev_1 (RSA3072 earlgrey_es)",
+        0xf6ccf943 => "earlgrey_a0_test_0 (RSA3072 earlgrey_es)",
+        0x5b0036ff => "earlgrey_a0_test_1 (RSA3072 earlgrey_es)",
+        0xb4bc349d => "sw/device/silicon_creator/rom/keys/fake/rsa/prod_key_0_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0x84ec3a97 => "sw/device/silicon_creator/rom/keys/fake/rsa/prod_key_1_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0x57a2fc91 => "sw/device/silicon_creator/rom/keys/fake/rsa/prod_key_2_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0xad958447 => "sw/device/silicon_creator/rom/keys/fake/rsa/dev_key_0_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0xe63058b7 => "sw/device/silicon_creator/rom/keys/fake/rsa/dev_key_1_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0x5801a2bd => "sw/device/silicon_creator/rom/keys/fake/rsa/test_key_0_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+        0xcf9d18b3 => "sw/device/silicon_creator/rom/keys/fake/rsa/test_key_1_rsa_3072_exp_f4.pub.der (earlgrey_es)",
+
+        // Application and owner keys for earlgrey_es application stage development.
+        0x29e0c28c => "appkey_test_0 (ECDSA P256 earlgrey_es proda)",
+        0xf4997f6b => "ownership_unlock_key (ECDSA P256 earlgrey_es proda)",
+        0xe394fc4e => "ownership_activate_key (ECDSA P256 earlgrey_es proda)",
+        0xdb20fed5 => "appkey_prod_0 (ECDSA P256 earlgrey_es proda)",
+        0x791e06cd => "ownership_owner_key.de (ECDSA P256 earlgrey_es proda)r",
+        0x16a849e6 => "appkey_dev_0 (ECDSA P256 earlgrey_es proda)",
+        0x644e94f3 => "appkey_test_0 (ECDSA P256 earlgrey_es sival)",
+        0xbba01e3e => "ownership_unlock_key (ECDSA P256 earlgrey_es sival)",
+        0x722fcac6 => "ownership_activate_key (ECDSA P256 earlgrey_es sival)",
+        0x03340a84 => "appkey_prod_0 (ECDSA P256 earlgrey_es sival)",
+        0x25d3e660 => "ownership_owner_key (ECDSA P256 earlgrey_es sival)",
+        0x471b4b2c => "appkey_dev_0 (ECDSA P256 earlgrey_es sival)",
+        0xbd790453 => "appkey_test_0 (ECDSA P256 earlgrey_es prodc)",
+        0xc7d8c8a4 => "ownership_unlock_key (ECDSA P256 earlgrey_es prodc)",
+        0xd2c5b6be => "ownership_activate_key (ECDSA P256 earlgrey_es prodc)",
+        0xc075a15f => "appkey_prod_0 (ECDSA P256 earlgrey_es prodc)",
+        0xb1688268 => "ownership_owner_key (ECDSA P256 earlgrey_es prodc)",
+        0x244e4e4b => "appkey_dev_0 (ECDSA P256 earlgrey_es prodc)",
+    }
+});
diff --git a/sw/host/opentitanlib/src/util/mod.rs b/sw/host/opentitanlib/src/util/mod.rs
index c3754d92ddefb..3bd3ce842de30 100644
--- a/sw/host/opentitanlib/src/util/mod.rs
+++ b/sw/host/opentitanlib/src/util/mod.rs
@@ -7,6 +7,7 @@ pub mod bitbang;
 pub mod bitfield;
 pub mod file;
 pub mod hexdump;
+pub mod known_keys;
 pub mod num_de;
 pub mod parse_int;
 pub mod present;
@@ -19,6 +20,7 @@ pub mod testing;
 pub mod unknown;
 pub mod usb;
 pub mod usr_access;
+pub mod vcd;
 pub mod vmem;
 pub mod voltage;
 
@@ -38,23 +40,15 @@ macro_rules! collection {
     }};
 }
 
-/// The `testdata` macro can be used in tests to reference testdata directories.
-#[macro_export]
+/// The `testdata` function can be used in tests to reference testdata directories.
 #[cfg(test)]
-macro_rules! testdata {
-    () => {{
-        use std::path::PathBuf;
-        let mut path = PathBuf::new();
-        path.push(file!());
-        path.pop();
-        path.push("testdata");
-        path
-    }};
-    ($f:expr) => {{
-        let mut path = testdata!();
-        path.push($f);
-        path
-    }};
+pub fn testdata(test: &str) -> std::path::PathBuf {
+    let mut path: std::path::PathBuf = std::env::var_os("TESTDATA").unwrap().into();
+    // TESTDATA points an arbitrary test, remove two levels to get the directory.
+    path.pop();
+    path.pop();
+    path.push(test);
+    path
 }
 
 /// Create a filename in a temporary directory.
@@ -68,18 +62,3 @@ pub fn tmpfilename(name: &str) -> String {
     dir.push(name);
     dir.to_str().unwrap().into()
 }
-
-#[cfg(test)]
-mod test {
-    #[test]
-    fn test_testdata() {
-        assert_eq!(
-            testdata!().to_str().unwrap(),
-            "sw/host/opentitanlib/src/util/testdata"
-        );
-        assert_eq!(
-            testdata!("my.file").to_str().unwrap(),
-            "sw/host/opentitanlib/src/util/testdata/my.file"
-        );
-    }
-}
diff --git a/sw/host/opentitanlib/src/util/present.rs b/sw/host/opentitanlib/src/util/present.rs
index 17e2022becaf2..9e802f5dc4388 100644
--- a/sw/host/opentitanlib/src/util/present.rs
+++ b/sw/host/opentitanlib/src/util/present.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use std::convert::TryInto;
 
 /// PRESENT block cipher.
diff --git a/sw/host/opentitanlib/src/util/serde.rs b/sw/host/opentitanlib/src/util/serde.rs
index bcac2d344d08c..7ccc1a07e8c96 100644
--- a/sw/host/opentitanlib/src/util/serde.rs
+++ b/sw/host/opentitanlib/src/util/serde.rs
@@ -26,7 +26,6 @@ use serde::{Deserialize, Deserializer};
 ///   }
 /// }
 /// ```
-
 // This function was taken nearly verbatim from the serde documentation.
 // The example in the serde documentation constrains the `FromStr` error
 // type to `Void`; we constrain to any type implementing std::error::Error.
diff --git a/sw/host/opentitanlib/src/util/status.rs b/sw/host/opentitanlib/src/util/status.rs
index 1b7e2787aa9ad..df47ecb1fd7cd 100644
--- a/sw/host/opentitanlib/src/util/status.rs
+++ b/sw/host/opentitanlib/src/util/status.rs
@@ -9,7 +9,7 @@ use std::convert::TryFrom;
 use std::ffi::CString;
 use std::path::PathBuf;
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use bindgen::status::{ot_status_create_record_t, status_create, status_err, status_extract};
 use num_enum::TryFromPrimitive;
 use object::{Object, ObjectSection};
@@ -203,7 +203,7 @@ impl StatusCreateRecords {
         let iter = self
             .records
             .iter()
-            .filter(|rec| rec.get_module_id().map_or(false, |id| id == *mod_id))
+            .filter(|rec| rec.get_module_id().is_ok_and(|id| id == *mod_id))
             .map(|rec| rec.filename.clone());
         std::collections::HashSet::<String>::from_iter(iter)
             .into_iter()
@@ -228,14 +228,17 @@ pub fn load_elf(elf_file: &PathBuf) -> Result<StatusCreateRecords> {
     // Make sure that the section size is a multiple of the record size.
     const RECORD_SIZE: usize = std::mem::size_of::<ot_status_create_record_t>();
     if status_create_records.len() % RECORD_SIZE != 0 {
-        bail!(".ot.status_create_record section size ({}) is not a multiple of the ot_status_create_record_t size ({})",
-              status_create_records.len(), RECORD_SIZE);
+        bail!(
+            ".ot.status_create_record section size ({}) is not a multiple of the ot_status_create_record_t size ({})",
+            status_create_records.len(),
+            RECORD_SIZE
+        );
     }
     // Conversion is unsafe but since the structure is packed and contains only POD,
     // it really is safe.
     let records = status_create_records
         .chunks(RECORD_SIZE)
-        .map(|chunk| ot_status_create_record_t::read_from(chunk).unwrap())
+        .map(|chunk| ot_status_create_record_t::read_from_bytes(chunk).unwrap())
         .map(StatusCreateRecord::try_from)
         .collect::<Result<_>>()?;
     Ok(StatusCreateRecords { records })
diff --git a/sw/host/opentitanlib/src/util/testing.rs b/sw/host/opentitanlib/src/util/testing.rs
index c45b5f8698efb..6b15e6a76a8af 100644
--- a/sw/host/opentitanlib/src/util/testing.rs
+++ b/sw/host/opentitanlib/src/util/testing.rs
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use crate::io::uart::Uart;
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use std::cell::RefCell;
 use std::ffi::OsStr;
 use std::io::{Read, Write};
diff --git a/sw/host/opentitanlib/src/util/usb.rs b/sw/host/opentitanlib/src/util/usb.rs
index a5a6604fc1dba..6df6d34e517ec 100644
--- a/sw/host/opentitanlib/src/util/usb.rs
+++ b/sw/host/opentitanlib/src/util/usb.rs
@@ -2,9 +2,9 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use rusb;
-use std::time::Duration;
+use std::time::{Duration, Instant};
 
 use crate::transport::TransportError;
 
@@ -20,8 +20,8 @@ impl UsbBackend {
     /// Scan the USB bus for a device matching VID/PID, and optionally also matching a serial
     /// number.
     pub fn scan(
-        usb_vid: u16,
-        usb_pid: u16,
+        usb_vid_pid: Option<(u16, u16)>,
+        usb_protocol: Option<(u8, u8, u8)>,
         usb_serial: Option<&str>,
     ) -> Result<Vec<(rusb::Device<rusb::GlobalContext>, String)>> {
         let mut devices = Vec::new();
@@ -39,11 +39,42 @@ impl UsbBackend {
                     continue;
                 }
             };
-            if descriptor.vendor_id() != usb_vid {
-                continue;
+
+            if let Some((vid, pid)) = usb_vid_pid {
+                if descriptor.vendor_id() != vid {
+                    continue;
+                }
+                if descriptor.product_id() != pid {
+                    continue;
+                }
             }
-            if descriptor.product_id() != usb_pid {
-                continue;
+            if let Some((class, subclass, protocol)) = usb_protocol {
+                let config = match device.active_config_descriptor() {
+                    Ok(desc) => desc,
+                    Err(e) => {
+                        deferred_log_messages.push(format!(
+                            "Could not read config descriptor for device at bus={} address={}: {}",
+                            device.bus_number(),
+                            device.address(),
+                            e,
+                        ));
+                        continue;
+                    }
+                };
+                let mut found = false;
+                for intf in config.interfaces() {
+                    for desc in intf.descriptors() {
+                        if desc.class_code() == class
+                            && desc.sub_class_code() == subclass
+                            && desc.protocol_code() == protocol
+                        {
+                            found = true;
+                        }
+                    }
+                }
+                if !found {
+                    continue;
+                }
             }
             let handle = match device.open() {
                 Ok(handle) => handle,
@@ -57,6 +88,7 @@ impl UsbBackend {
                     continue;
                 }
             };
+
             let serial_number = match handle.read_serial_number_string_ascii(&descriptor) {
                 Ok(sn) => sn,
                 Err(e) => {
@@ -88,13 +120,12 @@ impl UsbBackend {
         for s in deferred_log_messages {
             log::log!(severity, "{}", s);
         }
-
         Ok(devices)
     }
 
     /// Create a new UsbBackend.
     pub fn new(usb_vid: u16, usb_pid: u16, usb_serial: Option<&str>) -> Result<Self> {
-        let mut devices = UsbBackend::scan(usb_vid, usb_pid, usb_serial)?;
+        let mut devices = UsbBackend::scan(Some((usb_vid, usb_pid)), None, usb_serial)?;
         ensure!(!devices.is_empty(), TransportError::NoDevice);
         ensure!(devices.len() == 1, TransportError::MultipleDevices);
 
@@ -107,6 +138,50 @@ impl UsbBackend {
         })
     }
 
+    pub fn from_interface(
+        class: u8,
+        subclass: u8,
+        protocol: u8,
+        usb_serial: Option<&str>,
+    ) -> Result<Self> {
+        Self::from_interface_with_timeout(class, subclass, protocol, usb_serial, Duration::ZERO)
+    }
+
+    pub fn from_interface_with_timeout(
+        class: u8,
+        subclass: u8,
+        protocol: u8,
+        usb_serial: Option<&str>,
+        timeout: Duration,
+    ) -> Result<Self> {
+        let deadline = Instant::now() + timeout;
+        loop {
+            let mut devices =
+                UsbBackend::scan(None, Some((class, subclass, protocol)), usb_serial)?;
+            if devices.is_empty() {
+                if Instant::now() < deadline {
+                    std::thread::sleep(Duration::from_millis(100));
+                    continue;
+                } else {
+                    return Err(TransportError::NoDevice.into());
+                }
+            }
+            ensure!(devices.len() == 1, TransportError::MultipleDevices);
+
+            let (device, serial_number) = devices.remove(0);
+            return Ok(UsbBackend {
+                handle: device.open().context("USB open error")?,
+                device,
+                serial_number,
+                timeout: Duration::from_millis(500),
+            });
+        }
+    }
+
+    pub fn handle(&self) -> &rusb::DeviceHandle<rusb::GlobalContext> {
+        &self.handle
+    }
+
     pub fn get_vendor_id(&self) -> u16 {
         self.device.device_descriptor().unwrap().vendor_id()
     }
@@ -120,29 +195,35 @@ impl UsbBackend {
         self.serial_number.as_str()
     }
 
-    pub fn set_active_configuration(&mut self, config: u8) -> Result<()> {
+    pub fn set_active_configuration(&self, config: u8) -> Result<()> {
         self.handle
             .set_active_configuration(config)
             .context("USB error")
     }
 
-    pub fn claim_interface(&mut self, iface: u8) -> Result<()> {
+    pub fn claim_interface(&self, iface: u8) -> Result<()> {
         self.handle.claim_interface(iface).context("USB error")
     }
 
-    pub fn release_interface(&mut self, iface: u8) -> Result<()> {
+    pub fn release_interface(&self, iface: u8) -> Result<()> {
         self.handle.release_interface(iface).context("USB error")
     }
 
+    pub fn set_alternate_setting(&self, iface: u8, setting: u8) -> Result<()> {
+        self.handle
+            .set_alternate_setting(iface, setting)
+            .context("USB error")
+    }
+
     pub fn kernel_driver_active(&self, iface: u8) -> Result<bool> {
         self.handle.kernel_driver_active(iface).context("USB error")
     }
 
-    pub fn detach_kernel_driver(&mut self, iface: u8) -> Result<()> {
+    pub fn detach_kernel_driver(&self, iface: u8) -> Result<()> {
         self.handle.detach_kernel_driver(iface).context("USB error")
     }
 
-    pub fn attach_kernel_driver(&mut self, iface: u8) -> Result<()> {
+    pub fn attach_kernel_driver(&self, iface: u8) -> Result<()> {
         self.handle.attach_kernel_driver(iface).context("USB error")
     }
 
@@ -170,6 +251,10 @@ impl UsbBackend {
             .context("USB error")
     }
 
+    pub fn reset(&self) -> Result<()> {
+        self.handle.reset().context("USB Error")
+    }
+
     //
     // Sending and receiving data, the below methods provide a nice interface.
     //
diff --git a/sw/host/opentitanlib/src/util/vcd.rs b/sw/host/opentitanlib/src/util/vcd.rs
new file mode 100644
index 0000000000000..810a0c7e8435e
--- /dev/null
+++ b/sw/host/opentitanlib/src/util/vcd.rs
@@ -0,0 +1,1355 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail};
+use std::io;
+use thiserror::Error;
+
+use crate::io::gpio::{Edge, MonitoringEvent, MonitoringReadResponse};
+
+/// A VCD file header, containing timescale info & additional metadata
+#[derive(Debug)]
+pub struct Header {
+    pub timescale_ps: Option<u128>,
+    pub date: Option<String>,
+    pub version: Option<String>,
+}
+
+/// A signal in a VCD file, of some known type & width along with a reference name
+/// e.g. "wire 1 ... rx_en"
+#[derive(Debug)]
+pub struct Signal {
+    pub signal_type: String,
+    pub width: u32,
+    pub reference: String,
+}
+
+/// A member item of some VCD scope, which is either another nested scope or
+/// a variable definition.
+#[derive(Debug)]
+pub enum ScopeItem {
+    Scope {
+        scope_type: String,
+        identifier: String,
+        items: Vec<Self>,
+    },
+    VarDef {
+        signal: Signal,
+        identifier: String,
+    },
+}
+
+impl ScopeItem {
+    /// Get the identifiers of all variables (recursively) defined in this scope.
+    pub fn var_names(&self) -> Vec<&str> {
+        match self {
+            ScopeItem::Scope { items, .. } => {
+                let mut identifiers = Vec::new();
+                for item in items {
+                    identifiers.extend(item.var_names())
+                }
+                identifiers
+            }
+            ScopeItem::VarDef { identifier, .. } => {
+                vec![identifier]
+            }
+        }
+    }
+}
+
+/// A variable definition section of a VCD file, which features a list of top-level
+/// scopes that encapsulate all signal variable definitions (vardefs).
+#[derive(Debug)]
+pub struct VarDefs {
+    scopes: Vec<ScopeItem>,
+}
+
+impl VarDefs {
+    /// Get the identifiers of all variables defined in the entire VarDefs section.
+    pub fn var_names(&self) -> Vec<&str> {
+        let mut identifiers = Vec::new();
+        for scope in &self.scopes {
+            identifiers.extend(scope.var_names());
+        }
+        identifiers
+    }
+}
+
+/// Four-valued scalar logic values
+#[derive(Debug)]
+pub enum ScalarValue {
+    Zero,
+    One,
+    /// Unknown / Don't Care
+    X,
+    /// High Impedance
+    Z,
+}
+
+/// An item in the value change section of a VCD file, which can be a timestamp
+/// entry, a change in the value of a signal (at the last seen timestamp), or
+/// some other command (not currently supported).
+#[derive(Debug)]
+pub enum ValueChangeItem {
+    Timestamp {
+        step: u128,
+    },
+    Scalar {
+        identifier: String,
+        value: ScalarValue,
+    },
+    // TODO: add other VCD signal types (vector, real vars, strings)
+}
+
+/// The value change section of a VCD file, which contains a sequence of
+/// value change item entries.
+#[derive(Debug)]
+pub struct ValueChangeSection {
+    pub changes: Vec<ValueChangeItem>,
+}
+
+/// A full VCD file definition, containing at least a header (with a timescale),
+/// some variable definition(s) and any recorded value change section.
+#[derive(Debug)]
+pub struct Vcd {
+    pub header: Header,
+    pub vardefs: VarDefs,
+    pub value_changes: ValueChangeSection,
+}
+
+impl Vcd {
+    /// Get the identifiers of all variables defined in the VCD file
+    pub fn var_names(&self) -> Vec<&str> {
+        self.vardefs.var_names()
+    }
+}
+
+/// Errors relating to VCD encoding/dumping
+#[derive(Debug, Error)]
+pub enum VcdDumpError {
+    #[error("Cannot represent VCD timescale {0}ps")]
+    InvalidTimescale(u128),
+    #[error("Timestamps out of order: {0} and {1}")]
+    TimestampsOutOfOrder(u128, u128),
+}
+
+/// Struct implementing methods for writing VCD data to some io::Write
+#[derive(Debug)]
+pub struct VcdWriter<W: io::Write> {
+    pub writer: W,
+}
+
+impl<W: io::Write> VcdWriter<W> {
+    pub fn new(writer: W) -> Self {
+        VcdWriter { writer }
+    }
+
+    pub fn flush(&mut self) -> Result<()> {
+        self.writer.flush()?;
+        Ok(())
+    }
+
+    pub fn write_vcd(&mut self, vcd: &Vcd) -> Result<()> {
+        self.write_header(&vcd.header)?;
+        self.write_vardefs(&vcd.vardefs)?;
+        self.write_value_change_section(&vcd.value_changes, 0u128)?;
+        writeln!(self.writer)?;
+        Ok(())
+    }
+
+    pub fn write_header(&mut self, header: &Header) -> Result<()> {
+        // TODO: perhaps avoid hardcoding for picos in the future,
+        // it might be sufficient to e.g. use ns/us/ms in some cases
+        if let Some(timescale_ps) = &header.timescale_ps {
+            if *timescale_ps < 1 {
+                bail!(VcdDumpError::InvalidTimescale(*timescale_ps));
+            }
+            writeln!(self.writer, "$timescale {}ps $end", timescale_ps)?;
+        }
+        if let Some(date) = &header.date {
+            writeln!(self.writer, "$date {} $end", date)?;
+        }
+        if let Some(version) = &header.version {
+            writeln!(self.writer, "$version {} $end", version)?;
+        }
+        Ok(())
+    }
+
+    pub fn write_vardefs(&mut self, vardefs: &VarDefs) -> Result<()> {
+        for scope in &vardefs.scopes {
+            self.write_scope_item(scope)?;
+        }
+        writeln!(self.writer, "$enddefinitions $end")?;
+        Ok(())
+    }
+
+    pub fn write_scope_item(&mut self, scope: &ScopeItem) -> Result<()> {
+        match scope {
+            ScopeItem::Scope {
+                scope_type,
+                identifier,
+                items,
+            } => {
+                writeln!(self.writer, "$scope {} {} $end", &scope_type, &identifier)?;
+                for item in items {
+                    self.write_scope_item(item)?;
+                }
+                writeln!(self.writer, "$upscope $end")?;
+            }
+            ScopeItem::VarDef { signal, identifier } => {
+                writeln!(
+                    self.writer,
+                    "$var {} {} {} {} $end",
+                    &signal.signal_type, signal.width, &identifier, &signal.reference
+                )?;
+            }
+        }
+        Ok(())
+    }
+
+    pub fn write_value_change_section(
+        &mut self,
+        vcs: &ValueChangeSection,
+        initial_timestamp: u128,
+    ) -> Result<()> {
+        let mut current_timestamp = initial_timestamp;
+        for (i, value_change_item) in vcs.changes.iter().enumerate() {
+            if let ValueChangeItem::Timestamp { step } = value_change_item {
+                if *step < current_timestamp {
+                    bail!(VcdDumpError::TimestampsOutOfOrder(current_timestamp, *step));
+                }
+                current_timestamp = *step;
+                if i != 0 {
+                    writeln!(self.writer)?;
+                }
+            }
+            self.write_value_change_item(value_change_item)?;
+            write!(self.writer, " ")?;
+        }
+        Ok(())
+    }
+
+    pub fn write_value_change_item(&mut self, item: &ValueChangeItem) -> Result<()> {
+        match item {
+            ValueChangeItem::Timestamp { step } => {
+                write!(self.writer, "#{}", step)?;
+            }
+            ValueChangeItem::Scalar { identifier, value } => {
+                self.write_scalar_change(identifier, value)?;
+            }
+        }
+        Ok(())
+    }
+
+    pub fn write_scalar_change(&mut self, identifier: &str, value: &ScalarValue) -> Result<()> {
+        let value = match value {
+            ScalarValue::Zero => "0",
+            ScalarValue::One => "1",
+            ScalarValue::X => "X",
+            ScalarValue::Z => "Z",
+        };
+        write!(self.writer, "{}{}", value, identifier)?;
+        Ok(())
+    }
+}
+
+/// A helper function using a `VcdWriter` to directly dump a given Vcd to
+/// a string containing equivalent VCD file contents.
+pub fn dump_vcd(vcd: &Vcd) -> Result<String> {
+    let mut vcd_bytes = Vec::new();
+    let mut writer = VcdWriter::new(&mut vcd_bytes);
+    writer.write_vcd(vcd)?;
+    writer.flush()?;
+    Ok(String::from_utf8(vcd_bytes).expect("Generated VCD should be UTF-8 compatible"))
+}
+
+/// Errors related to VCD decoding/parsing
+#[derive(Debug, Error)]
+pub enum VcdParseError {
+    #[error("Missing required {0} value")]
+    MissingValue(String),
+    #[error("Missing required definition {0}")]
+    MissingDefinition(String),
+    #[error("Missing $end for definition {0}")]
+    MissingDefinitionEnd(String),
+    #[error("Multiple definitions for {0}")]
+    MultipleDefinitions(String),
+    #[error("Found $end when there was no definition to end")]
+    MismatchedEnd,
+    #[error("Found a $scope after already parsing $enddefinitions")]
+    DefinitionAfterEnd,
+    #[error("{0} is not yet supported by VCD parsing")]
+    UnsupportedFeature(String),
+    #[error("VCD timestamps #{0} and #{1} are out of order!")]
+    TimestampsOutOfOrder(u128, u128),
+    #[error("Unrecognized value {0}")]
+    UnknownToken(String),
+    #[error("Supplied identifier {0} does not match any defined identifier")]
+    UnknownVariable(String),
+}
+
+/// Iterator for reading whitespace-separated tokens from a given io::BufRead.
+/// Internally buffers the next line, returning tokens from that line.
+#[derive(Debug)]
+struct WhitespaceTokenizer<R: io::BufRead> {
+    reader: R,
+    line_buf: String,
+    tokens: Vec<String>,
+}
+
+impl<R: io::BufRead> WhitespaceTokenizer<R> {
+    fn new(reader: R) -> Self {
+        Self {
+            reader,
+            line_buf: String::new(),
+            tokens: Vec::new(),
+        }
+    }
+}
+
+impl<R: io::BufRead> Iterator for WhitespaceTokenizer<R> {
+    type Item = io::Result<String>;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        loop {
+            if let Some(token) = self.tokens.pop() {
+                return Some(Ok(token));
+            }
+            self.line_buf.clear();
+            match self.reader.read_line(&mut self.line_buf) {
+                Ok(0) => return None, // EOF
+                Ok(_) => {}
+                Err(e) => return Some(Err(e)),
+            };
+            // Collect tokens in reverse to efficiently pop from the back of the
+            // vec, rather than the front.
+            self.tokens = self
+                .line_buf
+                .split_whitespace()
+                .map(|s| s.to_string())
+                .rev()
+                .collect();
+        }
+    }
+}
+
+/// Struct implementing methods for parsing VCD data from some io::BufRead.
+#[derive(Debug)]
+pub struct VcdParser<R: io::BufRead> {
+    tokenizer: WhitespaceTokenizer<R>,
+    identifiers: Vec<String>,
+}
+
+impl<R: io::BufRead> VcdParser<R> {
+    pub fn new(reader: R) -> Self {
+        VcdParser {
+            tokenizer: WhitespaceTokenizer::new(reader),
+            identifiers: Vec::new(),
+        }
+    }
+
+    /// Get the next whitespace-separated VCD file token
+    pub fn next_token(&mut self) -> Result<Option<String>, io::Error> {
+        self.tokenizer.next().transpose()
+    }
+
+    pub fn parse_vcd(&mut self) -> Result<Vcd> {
+        Ok(Vcd {
+            header: self.parse_header()?,
+            vardefs: self.parse_vardefs()?,
+            value_changes: self.parse_value_change_section()?,
+        })
+    }
+
+    pub fn parse_header(&mut self) -> Result<Header> {
+        let mut header = Header {
+            timescale_ps: None,
+            date: None,
+            version: None,
+        };
+        while let Some(token) = self.next_token()?.as_deref() {
+            match token {
+                "$timescale" => {
+                    if header.timescale_ps.is_some() {
+                        bail!(VcdParseError::MultipleDefinitions("timescale".into()));
+                    }
+                    // TODO: add a custom `Duration` type that supports parsing
+                    // picoseconds (`ps`) rather than hacking slightly here
+                    let timescale_str = self.parse_header_str("timescale")?;
+                    header.timescale_ps = if timescale_str.ends_with("ps") {
+                        Some(
+                            timescale_str
+                                .strip_suffix("ps")
+                                .unwrap()
+                                .trim()
+                                .parse::<u128>()?,
+                        )
+                    } else {
+                        Some(humantime::parse_duration(&timescale_str)?.as_nanos() * 1000)
+                    }
+                }
+                "$date" => {
+                    if header.date.is_some() {
+                        bail!(VcdParseError::MultipleDefinitions("date".into()));
+                    }
+                    header.date = Some(self.parse_header_str("date")?)
+                }
+                "$version" => {
+                    if header.version.is_some() {
+                        bail!(VcdParseError::MultipleDefinitions("version".into()));
+                    }
+                    header.version = Some(self.parse_header_str("version")?)
+                }
+                "$scope" => {
+                    return Ok(header);
+                }
+                _ => (),
+            }
+        }
+        bail!(VcdParseError::MissingDefinition("scope".into()))
+    }
+
+    pub fn parse_header_str(&mut self, field: &str) -> Result<String> {
+        let Some(mut value) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue(field.into()));
+        };
+        loop {
+            match self.next_token()?.as_deref() {
+                Some("$end") => return Ok(value),
+                Some(next_val) => {
+                    value.push(' ');
+                    value.push_str(next_val);
+                }
+                None => bail!(VcdParseError::MissingDefinitionEnd(field.into())),
+            }
+        }
+    }
+
+    pub fn parse_vardefs(&mut self) -> Result<VarDefs> {
+        let mut scopes = Vec::new();
+        scopes.push(self.parse_scope()?);
+        let mut end_seen = false;
+        while let Some(token) = self.next_token()?.as_deref() {
+            match (token, end_seen) {
+                ("$scope", false) => {
+                    scopes.push(self.parse_scope()?);
+                }
+                ("$scope", true) => bail!(VcdParseError::DefinitionAfterEnd),
+                ("$enddefinitions", false) => {
+                    end_seen = true;
+                }
+                ("$enddefinitions", true) => {
+                    bail!(VcdParseError::MultipleDefinitions("$enddefinitions".into()))
+                }
+                ("$end", false) => bail!(VcdParseError::MismatchedEnd),
+                ("$end", true) => return Ok(VarDefs { scopes }),
+                _ => (),
+            }
+        }
+        bail!(VcdParseError::MissingDefinition("$enddefinitions".into()))
+    }
+
+    pub fn parse_scope(&mut self) -> Result<ScopeItem> {
+        let Some(scope_type) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("scope type".into()));
+        };
+        let Some(identifier) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("scope name".into()));
+        };
+        match self.next_token()?.as_deref() {
+            Some("$end") => (),
+            _ => bail!(VcdParseError::MissingDefinitionEnd("scope".into())),
+        };
+        let mut items = Vec::new();
+        while let Some(token) = self.next_token()?.as_deref() {
+            match token {
+                "$scope" => {
+                    items.push(self.parse_scope()?);
+                }
+                "$var" => {
+                    items.push(self.parse_variable()?);
+                }
+                "$end" => {
+                    return Ok(ScopeItem::Scope {
+                        scope_type,
+                        identifier,
+                        items,
+                    });
+                }
+                _ => (),
+            }
+        }
+        bail!(VcdParseError::MissingDefinitionEnd("scope".into()))
+    }
+
+    pub fn parse_variable(&mut self) -> Result<ScopeItem> {
+        let Some(signal_type) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("signal type".into()));
+        };
+        let Some(var_width) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("signal width".into()));
+        };
+        let width = var_width.parse::<u32>()?;
+        let Some(identifier) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("identifier".into()));
+        };
+        let Some(reference) = self.next_token()? else {
+            bail!(VcdParseError::MissingValue("signal name".into()));
+        };
+        match self.next_token()?.as_deref() {
+            Some("$end") => {
+                self.identifiers.push(identifier.to_string());
+                Ok(ScopeItem::VarDef {
+                    signal: Signal {
+                        signal_type,
+                        width,
+                        reference,
+                    },
+                    identifier,
+                })
+            }
+            _ => bail!(VcdParseError::MissingDefinitionEnd("var".into())),
+        }
+    }
+
+    pub fn parse_value_change_section(&mut self) -> Result<ValueChangeSection> {
+        let mut changes = Vec::new();
+        let current_step: u128 = 0;
+        while let Some(token) = self.next_token()? {
+            match token.as_str() {
+                // Commands
+                "$dumpvars" => {
+                    bail!(VcdParseError::UnsupportedFeature("$dumpvars".into()));
+                }
+                "$end" => bail!(VcdParseError::MismatchedEnd),
+                v if v.starts_with("$") => {
+                    bail!(VcdParseError::UnsupportedFeature("commands".into()));
+                }
+                // Timesteps
+                v if v.starts_with("#") => {
+                    let step = v.strip_prefix("#").unwrap().parse::<u128>()?;
+                    if step < current_step {
+                        bail!(VcdParseError::TimestampsOutOfOrder(current_step, step));
+                    }
+                    changes.push(ValueChangeItem::Timestamp { step });
+                }
+                // Values
+                v if v.starts_with(['0', '1', 'z', 'Z', 'x', 'X']) => {
+                    changes.push(self.parse_scalar(token)?);
+                }
+                // TODO: add support for more VCD signal types
+                v if v.starts_with(['b', 'B']) => {
+                    bail!(VcdParseError::UnsupportedFeature("vector signals".into()))
+                }
+                v if v.starts_with(['r', 'R']) => {
+                    bail!(VcdParseError::UnsupportedFeature("real vars".into()))
+                }
+                v if v.starts_with(['s', 'S']) => {
+                    bail!(VcdParseError::UnsupportedFeature("strings".into()))
+                }
+                v => bail!(VcdParseError::UnknownToken(v.into())),
+            }
+        }
+        Ok(ValueChangeSection { changes })
+    }
+
+    pub fn parse_scalar(&self, token: String) -> Result<ValueChangeItem> {
+        let value = match &token[0..1] {
+            "0" => ScalarValue::Zero,
+            "1" => ScalarValue::One,
+            "z" | "Z" => ScalarValue::Z,
+            "x" | "X" => ScalarValue::X,
+            v => bail!(VcdParseError::UnknownToken(v.into())),
+        };
+        let identifier = token[1..].to_string();
+        if !self.identifiers.contains(&identifier) {
+            bail!(VcdParseError::UnknownVariable(identifier));
+        }
+        Ok(ValueChangeItem::Scalar { identifier, value })
+    }
+}
+
+/// A helper function using a `VcdParser` to directly load given VCD file
+/// contents (as a &str) to an equivalent Vcd.
+pub fn load_vcd(vcd: &str) -> Result<Vcd> {
+    let cursor = io::Cursor::new(vcd.as_bytes());
+    let mut parser = VcdParser::new(cursor);
+    parser.parse_vcd()
+}
+
+/// Dump a single discrete waveform sample as a VCD value change based on the
+/// previous sample. Samples are given as a slice of bytes, where each bit
+/// refers to 1 value. `pin_vars` describes the variables to use for each
+/// signal in LSB order (e.g. pin_vars[0] is used for byte 0 LSB, etc.)
+fn dump_vcd_sample(
+    pin_vars: &[String],
+    timestamp: u128,
+    sample: &[u8],
+    prev_sample: Option<&[u8]>,
+) -> Vec<ValueChangeItem> {
+    let mut changes = Vec::with_capacity(pin_vars.len());
+    for (i, var) in pin_vars.iter().enumerate() {
+        // For each bit, calculate changes from the previous sample
+        let byte_index = i / 8;
+        let bit_index = i % 8;
+        let sample_byte = sample.get(byte_index).unwrap_or(&0x00);
+        let bit = (sample_byte >> bit_index) & 0x01;
+        if let Some(prev_bytes) = prev_sample {
+            let prev_byte = prev_bytes.get(byte_index).unwrap_or(&0x00);
+            let prev_bit = (prev_byte >> bit_index) & 0x01;
+            if prev_bit == bit {
+                continue;
+            }
+        }
+        // There has been a change in value (or this is the first sample),
+        // so record the change.
+        if changes.is_empty() {
+            changes.push(ValueChangeItem::Timestamp { step: timestamp });
+        }
+        changes.push(ValueChangeItem::Scalar {
+            identifier: var.to_string(),
+            value: if bit != 0 {
+                ScalarValue::One
+            } else {
+                ScalarValue::Zero
+            },
+        });
+    }
+    changes
+}
+
+/// Generate a vardefs section resulting from dumping a list of scalar (1 width)
+/// write signals into a single named scope, as a helper for easily exporting
+/// basic VCD files.
+pub fn dump_vcd_wire_vardefs(scope: String, pin_vars: Vec<(String, Option<String>)>) -> VarDefs {
+    let opentitanlib_scope = ScopeItem::Scope {
+        scope_type: String::from("module"),
+        identifier: scope,
+        items: pin_vars
+            .into_iter()
+            .enumerate()
+            .map(|(i, (identifier, pin))| ScopeItem::VarDef {
+                signal: Signal {
+                    signal_type: String::from("wire"),
+                    width: 1,
+                    reference: pin.unwrap_or(format!("pin_{}", i)),
+                },
+                identifier,
+            })
+            .collect::<Vec<_>>(),
+    };
+    VarDefs {
+        scopes: vec![opentitanlib_scope],
+    }
+}
+
+/// Construct a VCD from a uniformly (discretely) sampled waveform, represented by
+/// a list of samples (pin values over time) and a `timescale` (sampling period).
+/// Each sample is defined by a slice of bytes, where each bit index in a slice
+/// refers to a single pin over each sample.
+/// Variables are defined in order, corresponding to LSB-first sample order.
+pub fn vcd_from_samples(
+    pin_names: Vec<Option<String>>,
+    timescale_ps: u128,
+    samples: &[&[u8]],
+) -> Result<Vcd> {
+    // Generate a header sections, sequentially assigning vars '0, '1, '2, etc.
+    let header = Header {
+        timescale_ps: Some(timescale_ps),
+        date: None,
+        version: None,
+    };
+    let vars = &(0..pin_names.len())
+        .map(|c| format!("'{}", c))
+        .collect::<Vec<_>>();
+    let vardefs = dump_vcd_wire_vardefs(
+        String::from("opentitanlib"),
+        vars.clone().into_iter().zip(pin_names).collect::<Vec<_>>(),
+    );
+
+    // Compute value changes across the uniform samples to construct the
+    // value change section of the VCD
+    let mut changes = Vec::new();
+    let mut prev_sample = None;
+    let mut last_sample_index = 0;
+    let num_samples = samples.len();
+    for (i, sample) in samples.iter().enumerate() {
+        let value_change_items = dump_vcd_sample(vars, i as u128, sample, prev_sample);
+        prev_sample = Some(sample);
+        if !value_change_items.is_empty() {
+            changes.extend(value_change_items);
+            last_sample_index = i;
+        }
+    }
+
+    // Make sure we include an ending timestamp for the final sample
+    if (last_sample_index + 1) < num_samples {
+        changes.push(ValueChangeItem::Timestamp {
+            step: num_samples as u128 - 1,
+        });
+    }
+    let value_changes = ValueChangeSection { changes };
+
+    // Dump the VCD
+    Ok(Vcd {
+        header,
+        vardefs,
+        value_changes,
+    })
+}
+
+/// Transform a `u64` timestamp to a time in picoseconds given some initial
+/// offset timestamp measurement and a clock resolution
+fn timestamp_to_picos(initial: u64, timestamp: u64, clock_res: u64) -> u128 {
+    let delta = (timestamp - initial) as u128;
+    delta * 1_000_000_000_000u128 / (clock_res as u128)
+}
+
+/// Transform a time in picoseconds to a `u64` timestamp relative to some
+/// initial offset timestamp measurement and a clock resolution.
+fn timestamp_from_picos(initial: u64, picos: u128, clock_res: u64) -> u64 {
+    let delta = picos * clock_res as u128 / 1_000_000_000_000u128;
+    initial + delta as u64
+}
+
+/// Construct a VCD of a waveform represented by a chronological sequence of
+/// rising / falling edges (i.e. value changes) as is returned by the
+/// `GpioMonitoring` interface. This includes an initial & final timestamp,
+/// some initial values, and a list of edge `events`.
+pub fn vcd_from_edges(
+    pin_names: Vec<Option<String>>,
+    clock_resolution: u64,
+    initial_timestamp: u64,
+    initial_values: &[bool],
+    events: &[MonitoringEvent],
+    final_timestamp: u64,
+) -> Result<Vcd> {
+    // Generate a header sections, sequentially assigning vars '0, '1, '2, etc.
+    // We use a timescale of 1 picosecond to accurately represent different
+    // monitoring clock resolutions.
+    let header = Header {
+        timescale_ps: Some(1),
+        date: None,
+        version: None,
+    };
+    let vars = &(0..pin_names.len())
+        .map(|c| format!("'{}", c))
+        .collect::<Vec<_>>();
+    let vardefs = dump_vcd_wire_vardefs(
+        String::from("opentitanlib"),
+        vars.clone().into_iter().zip(pin_names).collect::<Vec<_>>(),
+    );
+
+    // Compute the value change section, which is mostly a 1-to-1 mapping
+    let mut changes = Vec::new();
+    // Dump the initial values
+    changes.push(ValueChangeItem::Timestamp { step: 0 });
+    for (&bit, var) in initial_values.iter().zip(vars.iter()) {
+        changes.push(ValueChangeItem::Scalar {
+            identifier: var.to_string(),
+            value: if bit {
+                ScalarValue::One
+            } else {
+                ScalarValue::Zero
+            },
+        });
+    }
+    // Edge events are essentially 1-to-1 with the VCD format
+    let mut timestamp: u128 = 0;
+    for event in events.iter() {
+        let edge_time = timestamp_to_picos(initial_timestamp, event.timestamp, clock_resolution);
+        if edge_time > timestamp {
+            timestamp = edge_time;
+            changes.push(ValueChangeItem::Timestamp { step: edge_time });
+        }
+        let index = event.signal_index as usize;
+        changes.push(ValueChangeItem::Scalar {
+            identifier: vars[index].clone(),
+            value: if event.edge == Edge::Rising {
+                ScalarValue::One
+            } else {
+                ScalarValue::Zero
+            },
+        });
+    }
+
+    // Include a final timestamp marking the final measurement
+    let end_time = timestamp_to_picos(initial_timestamp, final_timestamp, clock_resolution);
+    if end_time > timestamp {
+        changes.push(ValueChangeItem::Timestamp { step: end_time });
+    }
+    let value_changes = ValueChangeSection { changes };
+
+    // Dump the VCD
+    Ok(Vcd {
+        header,
+        vardefs,
+        value_changes,
+    })
+}
+
+/// An iterator over a VCD file, which returns uniform samples of values of
+/// VCD signals at every VCD time step. Depending on the delay between value
+/// changes, this could result in very long iteration counts.
+pub struct UniformVcdSampler {
+    pub step: u128,
+    pin_vars: Vec<String>,
+    value_changes: std::vec::IntoIter<ValueChangeItem>,
+    current_timestamp: u128,
+    next_timestamp: u128,
+    current_values: Vec<u8>,
+    depleted: bool,
+}
+
+impl UniformVcdSampler {
+    /// Create a new uniform VCD sampler. Samples every `step` steps in the VCD.
+    pub fn new(vcd: Vcd, step: u128) -> Self {
+        let pin_vars = vcd
+            .var_names()
+            .iter()
+            .map(|n| n.to_string())
+            .collect::<Vec<_>>();
+        let num_bytes = pin_vars.len().div_ceil(8);
+        Self {
+            step,
+            pin_vars,
+            value_changes: vcd.value_changes.changes.into_iter(),
+            current_timestamp: 0u128,
+            next_timestamp: 0u128,
+            current_values: std::iter::repeat(0x00).take(num_bytes).collect::<Vec<_>>(),
+            depleted: false,
+        }
+    }
+}
+
+impl Iterator for UniformVcdSampler {
+    type Item = Result<Vec<u8>>;
+
+    fn next(&mut self) -> Option<Self::Item> {
+        loop {
+            // Handle sampling in-between parsed timestamps
+            if self.next_timestamp > self.current_timestamp {
+                self.current_timestamp += self.step;
+                return Some(Ok(self.current_values.clone()));
+            }
+            match self.value_changes.next() {
+                // If we read a timestamp, sample in steps until it is reached
+                Some(ValueChangeItem::Timestamp { step }) => {
+                    self.next_timestamp = step;
+                }
+                // If we read a value, update the internal `current_values` state
+                Some(ValueChangeItem::Scalar { identifier, value }) => {
+                    let value = match value {
+                        ScalarValue::Zero => 0,
+                        ScalarValue::One => 1,
+                        _ => {
+                            return Some(Err(VcdParseError::UnsupportedFeature(
+                                "non-binary scalars".into(),
+                            )
+                            .into()));
+                        }
+                    };
+                    let Some(index) = self.pin_vars.iter().position(|id| *id == identifier) else {
+                        return Some(Err(VcdParseError::UnknownVariable(identifier).into()));
+                    };
+                    let byte_index = index / 8;
+                    let bit_index = index % 8;
+                    self.current_values[byte_index] &= !(1 << bit_index);
+                    self.current_values[byte_index] |= value << bit_index;
+                }
+                // If there are no more value changes to read, output one final
+                // sample of the current values. Otherwise return `None`.
+                None => {
+                    if self.depleted {
+                        return None;
+                    }
+                    self.depleted = true;
+                    return Some(Ok(self.current_values.clone()));
+                }
+            }
+        }
+    }
+}
+
+/// The output of parsing a VCD to a list of edges as a `MonitoringReadResponse`,
+/// which will include any parsed pin variables.
+pub struct ParsedVcdEdges {
+    pub pin_vars: Vec<String>,
+    pub events: MonitoringReadResponse,
+}
+
+/// Parses a VCD (given its contents) to a Vec of edges (value changes), with
+/// timestamps relative to the `clock_resolution` and `initial_timestamp`.
+pub fn vcd_to_edges(
+    vcd: Vcd,
+    clock_resolution: u64,
+    initial_timestamp: u64,
+) -> Result<ParsedVcdEdges> {
+    let pin_vars = vcd.var_names();
+    let timescale = vcd
+        .header
+        .timescale_ps
+        .expect("VCD must contain a timescale to parse to edges");
+
+    // Parse edges from the value changes
+    let mut events = Vec::new();
+    let mut current_time: u128 = 0;
+    let num_bytes = pin_vars.len().div_ceil(8);
+    // Assume all values are initialized at 0 if not given a value at t=0.
+    let mut current_values: Vec<u8> = std::iter::repeat(0x00).take(num_bytes).collect();
+
+    for change in &vcd.value_changes.changes {
+        match change {
+            ValueChangeItem::Timestamp { step } => {
+                current_time = *step;
+            }
+            ValueChangeItem::Scalar { identifier, value } => {
+                let value = match value {
+                    ScalarValue::Zero => 0,
+                    ScalarValue::One => 1,
+                    _ => bail!(VcdParseError::UnsupportedFeature(
+                        "non-binary scalars".into()
+                    )),
+                };
+                let Some(index) = pin_vars.iter().position(|id| id == identifier) else {
+                    bail!(VcdParseError::UnknownVariable(identifier.into()));
+                };
+                let byte_index = index / 8;
+                let bit_index = index % 8;
+                let current_value = current_values[byte_index] >> bit_index & 0x01;
+                // Only create an edge on a change of value
+                if value != current_value {
+                    current_values[byte_index] &= !(1 << bit_index);
+                    current_values[byte_index] |= value << bit_index;
+                    // Don't generate edges for initial signal values (t=0)
+                    if current_time == 0 {
+                        // TODO: maybe this should be parsed from a `$dumpvars` instead
+                        // of `#0`, so we can have an edge at `t=0`?
+                        continue;
+                    }
+                    let picos = current_time * timescale;
+                    let timestamp =
+                        timestamp_from_picos(initial_timestamp, picos, clock_resolution);
+                    events.push(MonitoringEvent {
+                        signal_index: index as u8,
+                        edge: if value == 1 {
+                            Edge::Rising
+                        } else {
+                            Edge::Falling
+                        },
+                        timestamp,
+                    });
+                }
+            }
+        }
+    }
+
+    // Determine a final timestamp for the waveform from the last step seen
+    let last_picos = current_time * timescale;
+    let last_timestamp = timestamp_from_picos(initial_timestamp, last_picos, clock_resolution);
+    let events = MonitoringReadResponse {
+        events,
+        timestamp: last_timestamp,
+    };
+    Ok(ParsedVcdEdges {
+        pin_vars: pin_vars.iter().map(|n| n.to_string()).collect(),
+        events,
+    })
+}
+
+#[cfg(test)]
+mod test {
+    use super::*;
+    use std::time::Duration;
+
+    // A helper to compactly construct `MonitoringEvent` edges.
+    fn edge(signal_index: u8, edge: Edge, timestamp: u64) -> MonitoringEvent {
+        MonitoringEvent {
+            signal_index,
+            edge,
+            timestamp,
+        }
+    }
+
+    // Test by dumping a given uniformly sampled waveform to a VCD and parsing
+    // it back, to check the decoded contents match the original.
+    fn samples_encode_decode(
+        samples: &[&[u8]],
+        pin_names: Vec<Option<String>>,
+        clock_tick: Duration,
+    ) -> Result<()> {
+        let vcd = dump_vcd(&vcd_from_samples(
+            pin_names,
+            clock_tick.as_nanos() * 1000,
+            samples,
+        )?)?;
+        assert!(!vcd.is_empty());
+        // For now this test assumes the order of bits is retained (i.e. vars
+        // are parsed into sample bit indexes in the same order they are defined).
+        let vcd = load_vcd(&vcd)?;
+        let decoded = UniformVcdSampler::new(vcd, 1).collect::<Result<Vec<_>>>()?;
+        for (decoded_sample, sample) in decoded.iter().zip(samples) {
+            assert_eq!(decoded_sample, sample);
+        }
+        Ok(())
+    }
+
+    // Test by dumping a given edge-represented waveform to a VCD and parsing it
+    // back, to check the decoded contents match the original.
+    fn edges_encode_decode(
+        clock_resolution: u64,
+        initial_timestamp: u64,
+        initial_values: &[bool],
+        events: &[MonitoringEvent],
+        final_timestamp: u64,
+        pin_names: Vec<Option<String>>,
+    ) -> Result<()> {
+        let vcd = dump_vcd(&vcd_from_edges(
+            pin_names,
+            clock_resolution,
+            initial_timestamp,
+            initial_values,
+            events,
+            final_timestamp,
+        )?)?;
+        assert!(!vcd.is_empty());
+        // For now this test assumes the order of signals is retained (i.e.
+        // vars are parsed into signal indexes in the order they are defined).
+        let vcd = load_vcd(&vcd)?;
+        let decoded = vcd_to_edges(vcd, clock_resolution, initial_timestamp)?;
+        assert_eq!(decoded.events.timestamp, final_timestamp);
+        assert_eq!(decoded.events.events, events);
+        Ok(())
+    }
+
+    #[test]
+    fn samples_waveform() -> Result<()> {
+        // Random waveform over 3 pins, with a clock_tick of 3 us.
+        let samples = [
+            4, 5, 3, 4, 1, 3, 6, 0, 2, 4, 5, 1, 7, 2, 3, 4, 0, 0, 1, 4, 0, 1, 2, 3, 4, 6,
+        ];
+        let sample_slices = samples.iter().map(std::slice::from_ref).collect::<Vec<_>>();
+        let pin_names = Vec::from([const { None }; 3]);
+        let clock_tick = Duration::from_nanos(3000);
+        samples_encode_decode(&sample_slices, pin_names.clone(), clock_tick)?;
+
+        // Example SPI waveform over 3 pins, again with a clock_tick of 3 us.
+        let pin_names = vec![
+            Some("spi_sck".into()),
+            Some("spi_cs".into()),
+            Some("spi_copi".into()),
+        ];
+        let samples = [
+            0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 4,
+            5, 4, 5, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
+            0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0,
+            1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
+            0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0,
+            1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
+            0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0,
+            1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1,
+            0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0,
+            1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2,
+            2,
+        ];
+        let sample_slices = samples.iter().map(std::slice::from_ref).collect::<Vec<_>>();
+        samples_encode_decode(&sample_slices, pin_names, clock_tick)
+    }
+
+    #[test]
+    fn raw_vcd_to_samples() -> Result<()> {
+        let vcd = "
+$timescale 1345ns $end\n\
+$scope module opentitanlib $end\n\
+$var wire 1 # CN_04_2 $end\n\
+$var wire 1 ! CN_05_3 $end\n\
+$var wire 1 ; CN_05_4 $end\n\
+$var wire 1 ? CN_15_4 $end\n\
+$upscope $end\n\
+$enddefinitions $end\n\
+#0 0# 0! 1; 0?\n\
+#1 1# 1! 0;\n\
+#2 0#\n\
+#3 1# 0!\n\
+#4 0# 1! 1;\n\
+#5 1#\n\
+#6 0# 0! 0; 1?\n\
+#7 1# 1! 1;\n\
+#8 0#\n\
+#9 1# 0; 0?\n\
+#10 0# 0! 1;\n\
+#11 1# 1! 0;\n\
+#12 0# 0!\n\
+#13 1# 1!\n\
+#14 0# 0! 1; 1?\n\
+#15 1# 0;\n\
+#16 0#\n\
+#17 1# 1! 0?\n\
+#18 0# 0!\n\
+#19 1#\n\
+#20 0#\n\
+#21 1#\n\
+#22 0#\n\
+#23 1#\n\
+#24 0#\n\
+#33 1;\n\
+#34 1# 1! 1?\n\
+#35 0#\n\
+#36 1# 0! 0; 0?\n\
+#37 0#";
+        let expected_pin_vars = [
+            String::from("#"),
+            String::from("!"),
+            String::from(";"),
+            String::from("?"),
+        ];
+        let expected_timescale = Some(1345 * 1000); // 1345 ns
+        let expected_samples: [u8; 38] = [
+            4, 3, 2, 1, 6, 7, 8, 15, 14, 3, 4, 3, 0, 3, 12, 9, 8, 3, 0, 1, 0, 1, 0, 1, 0, 0, 0, 0,
+            0, 0, 0, 0, 0, 4, 15, 14, 1, 0,
+        ];
+
+        // Load & decode the VCD, and check it matches expected contents
+        let vcd = load_vcd(vcd)?;
+        let decoded_pin_vars = vcd
+            .var_names()
+            .iter()
+            .map(|n| n.to_string())
+            .collect::<Vec<_>>();
+        let decoded_timescale_ps = vcd.header.timescale_ps;
+        let decoded_samples = UniformVcdSampler::new(vcd, 1).collect::<Result<Vec<_>>>()?;
+        for expected in expected_pin_vars {
+            assert!(decoded_pin_vars.contains(&expected));
+        }
+        assert_eq!(decoded_timescale_ps, expected_timescale);
+        for (decoded_sample, sample) in decoded_samples.iter().zip(expected_samples) {
+            assert_eq!(decoded_sample, std::slice::from_ref(&sample));
+        }
+        Ok(())
+    }
+
+    #[test]
+    fn edges_waveform() -> Result<()> {
+        // Random waveform over 3 pins, with a clock_tick of 1 us.
+        let clock_resolution = 1_000_000;
+        let initial_timestamp = 536;
+        let initial_values = vec![true, false, true];
+        let events = vec![
+            edge(2, Edge::Falling, 562),
+            edge(1, Edge::Rising, 621),
+            edge(0, Edge::Falling, 754),
+            edge(2, Edge::Rising, 832),
+            edge(2, Edge::Falling, 855),
+            edge(2, Edge::Rising, 912),
+            edge(0, Edge::Rising, 1012),
+            edge(1, Edge::Falling, 1058),
+            edge(2, Edge::Falling, 1123),
+            edge(2, Edge::Rising, 1157),
+            edge(0, Edge::Falling, 1210),
+            edge(1, Edge::Rising, 1258),
+            edge(0, Edge::Rising, 1315),
+            edge(2, Edge::Falling, 1415),
+            edge(1, Edge::Falling, 1510),
+            edge(0, Edge::Falling, 1633),
+            edge(0, Edge::Rising, 1901),
+        ];
+        let final_timestamp = 1947;
+        let pin_names = Vec::from([const { None }; 3]);
+        edges_encode_decode(
+            clock_resolution,
+            initial_timestamp,
+            &initial_values,
+            &events,
+            final_timestamp,
+            pin_names,
+        )?;
+
+        // Example UART RX waveform with 1 pin taken from a bitbanging test sample
+        let initial_timestamp = 0;
+        let initial_values = vec![true];
+        let event_timestamps = [
+            5889252340, 5889252358, 5889252375, 5889252392, 5889252410, 5889252427, 5889252445,
+            5889252462, 5889252479, 5889252497, 5889252514, 5889252532, 5889252549, 5889252636,
+            5889252654, 5889252671, 5889252688, 5889252723, 5889252740, 5889252775, 5889252793,
+            5889252810, 5889252827, 5889252845, 5889252862, 5889252914, 5889252932, 5889252949,
+            5889252967, 5889252984, 5889253001, 5889253019, 5889253036, 5889253141, 5889253158,
+            5889253193, 5889253210, 5889253245, 5889253263, 5889253315, 5889253349, 5889253367,
+            5889253386, 5889253402, 5889253419, 5889253454, 5889253471, 5889253489, 5889253523,
+            5889253541, 5889253558, 5889253610, 5889253628, 5889253645, 5889253697, 5889253715,
+            5889253732, 5889253767, 5889253784, 5889253837, 5889253871, 5889253889, 5889253906,
+            5889253924, 5889253941, 5889254011, 5889254046, 5889254063, 5889254080, 5889254115,
+            5889254167, 5889254185, 5889254219, 5889254238, 5889254254, 5889254272, 5889254324,
+            5889254359, 5889254393, 5889254411, 5889254428, 5889254533, 5889254550, 5889254585,
+            5889254603, 5889254655, 5889254672, 5889254689, 5889254741, 5889254759, 5889254776,
+            5889254794, 5889254811, 5889254828, 5889254846, 5889254881, 5889254915, 5889254933,
+            5889254950, 5889254968, 5889255002, 5889255037, 5889255089, 5889255107, 5889255124,
+            5889255176, 5889255194, 5889255211, 5889255264, 5889255281, 5889255298, 5889255455,
+        ];
+        let edges = [Edge::Falling, Edge::Rising];
+        let events = event_timestamps
+            .into_iter()
+            .enumerate()
+            .map(|(i, t)| edge(0, edges[i % 2], t))
+            .collect::<Vec<_>>();
+        let final_timestamp = 5889262827;
+        let pin_names = vec![Some("uart_rx".into())];
+        edges_encode_decode(
+            clock_resolution,
+            initial_timestamp,
+            &initial_values,
+            &events,
+            final_timestamp,
+            pin_names,
+        )
+    }
+
+    #[test]
+    fn raw_vcd_to_edges() -> Result<()> {
+        let vcd = "
+$timescale 1ns $end\n\
+$scope module opentitanlib $end\n\
+$var wire 1 # a $end\n\
+$var wire 1 ! b $end\n\
+$var wire 1 ; c $end\n\
+$var wire 1 ? d $end\n\
+$upscope $end\n\
+$enddefinitions $end\n\
+#0 0# 0! 1; 0?\n\
+#10000 1# 1! 0;\n\
+#20000 0#\n\
+#30000 1# 0!\n\
+#40000 0# 1! 1;\n\
+#50000 1#\n\
+#60000 0# 0! 0; 1?\n\
+#70000 1# 1! 1;\n\
+#80000 0#\n\
+#90000 1# 0; 0?\n\
+#100000 0# 0! 1;\n\
+#110000 1# 1! 0;\n\
+#120000 0# 0!\n\
+#130000 1# 1!\n\
+#140000 0# 0! 1; 1?\n\
+#150000 1# 0;\n\
+#160000 0#\n\
+#170000 1# 1! 0?\n\
+#180000 0# 0!\n\
+#190000 1#\n\
+#200000 0#\n\
+#210000 1#\n\
+#220000 0#\n\
+#230000 1#\n\
+#240000 0#\n\
+#330000 1;\n\
+#340000 1# 1! 1?\n\
+#350000 0#\n\
+#360000 1# 0! 0; 0?\n\
+#100000000 0#";
+        let clock_resolution = 1_000_000; // Each clock tick is 1 us.
+        let initial_timestamp = 536;
+        let vcd = load_vcd(vcd)?;
+        let decoded = vcd_to_edges(vcd, clock_resolution, initial_timestamp)?;
+
+        let expected_pin_vars = [
+            String::from("#"),
+            String::from("!"),
+            String::from(";"),
+            String::from("?"),
+        ];
+        let expected_edges = vec![
+            edge(0, Edge::Rising, 546),
+            edge(1, Edge::Rising, 546),
+            edge(2, Edge::Falling, 546),
+            edge(0, Edge::Falling, 556),
+            edge(0, Edge::Rising, 566),
+            edge(1, Edge::Falling, 566),
+            edge(0, Edge::Falling, 576),
+            edge(1, Edge::Rising, 576),
+            edge(2, Edge::Rising, 576),
+            edge(0, Edge::Rising, 586),
+            edge(0, Edge::Falling, 596),
+            edge(1, Edge::Falling, 596),
+            edge(2, Edge::Falling, 596),
+            edge(3, Edge::Rising, 596),
+            edge(0, Edge::Rising, 606),
+            edge(1, Edge::Rising, 606),
+            edge(2, Edge::Rising, 606),
+            edge(0, Edge::Falling, 616),
+            edge(0, Edge::Rising, 626),
+            edge(2, Edge::Falling, 626),
+            edge(3, Edge::Falling, 626),
+            edge(0, Edge::Falling, 636),
+            edge(1, Edge::Falling, 636),
+            edge(2, Edge::Rising, 636),
+            edge(0, Edge::Rising, 646),
+            edge(1, Edge::Rising, 646),
+            edge(2, Edge::Falling, 646),
+            edge(0, Edge::Falling, 656),
+            edge(1, Edge::Falling, 656),
+            edge(0, Edge::Rising, 666),
+            edge(1, Edge::Rising, 666),
+            edge(0, Edge::Falling, 676),
+            edge(1, Edge::Falling, 676),
+            edge(2, Edge::Rising, 676),
+            edge(3, Edge::Rising, 676),
+            edge(0, Edge::Rising, 686),
+            edge(2, Edge::Falling, 686),
+            edge(0, Edge::Falling, 696),
+            edge(0, Edge::Rising, 706),
+            edge(1, Edge::Rising, 706),
+            edge(3, Edge::Falling, 706),
+            edge(0, Edge::Falling, 716),
+            edge(1, Edge::Falling, 716),
+            edge(0, Edge::Rising, 726),
+            edge(0, Edge::Falling, 736),
+            edge(0, Edge::Rising, 746),
+            edge(0, Edge::Falling, 756),
+            edge(0, Edge::Rising, 766),
+            edge(0, Edge::Falling, 776),
+            edge(2, Edge::Rising, 866),
+            edge(0, Edge::Rising, 876),
+            edge(1, Edge::Rising, 876),
+            edge(3, Edge::Rising, 876),
+            edge(0, Edge::Falling, 886),
+            edge(0, Edge::Rising, 896),
+            edge(1, Edge::Falling, 896),
+            edge(2, Edge::Falling, 896),
+            edge(3, Edge::Falling, 896),
+            edge(0, Edge::Falling, 100536),
+        ];
+        for expected in expected_pin_vars {
+            assert!(decoded.pin_vars.contains(&expected));
+        }
+        assert_eq!(decoded.events.events, expected_edges);
+        assert!(decoded.events.timestamp >= expected_edges.last().unwrap().timestamp);
+        Ok(())
+    }
+
+    #[test]
+    fn many_signals() -> Result<()> {
+        // Test with a VCD containing 10 samples with 1024 different signals,
+        // to be sure we can handle large VCDs and large samples without restriction
+        const NUM_PINS: usize = 1024;
+        const NUM_SAMPLES: usize = 10;
+        let mut samples = Vec::new();
+        let mut prng = 0x0ACECAFE;
+        for _ in 0..NUM_SAMPLES {
+            let mut sample = Vec::new();
+            for _ in 0..NUM_PINS.div_ceil(32) {
+                // xorshift32 PRNG to distribute changes across sample bitmaps.
+                prng ^= prng << 13;
+                prng ^= prng >> 17;
+                prng ^= prng << 5;
+                sample.push(prng as u8);
+                sample.push((prng >> 8) as u8);
+                sample.push((prng >> 16) as u8);
+                sample.push((prng >> 24) as u8);
+            }
+            samples.push(sample);
+        }
+        let sample_slices = samples.iter().map(|s| s.as_ref()).collect::<Vec<_>>();
+        let pin_names = Vec::from([const { None }; NUM_PINS]);
+        let clock_tick = Duration::from_nanos(3000);
+        samples_encode_decode(&sample_slices, pin_names, clock_tick)
+    }
+}
diff --git a/sw/host/opentitanlib/src/image/testdata/hello.txt b/sw/host/opentitanlib/testdata/image/hello.txt
similarity index 100%
rename from sw/host/opentitanlib/src/image/testdata/hello.txt
rename to sw/host/opentitanlib/testdata/image/hello.txt
diff --git a/sw/host/opentitanlib/src/image/testdata/manifest.hjson b/sw/host/opentitanlib/testdata/image/manifest.hjson
similarity index 94%
rename from sw/host/opentitanlib/src/image/testdata/manifest.hjson
rename to sw/host/opentitanlib/testdata/image/manifest.hjson
index 936ce32ef6105..bf3cc8a75b93b 100644
--- a/sw/host/opentitanlib/src/image/testdata/manifest.hjson
+++ b/sw/host/opentitanlib/testdata/image/manifest.hjson
@@ -193,5 +193,27 @@
     null,
     null,
     null,
+  ],
+  extension_params: [
+    {
+      integrator_specific_firmware_binding: {
+        strike_mask: "0x0fedcba987654321fedcba9876543210",
+        product_expr: [
+          {
+            mask: "0xffffffff",
+            value: "0xa5a5a5a5"
+          },
+          {
+            mask: "0xf0f0f0f0",
+            value: "0xa0a0a0a0"
+          }
+        ]
+      }
+    },
+    {
+      isfb_erase_policy: {
+        erase_allowed: false
+      }
+    },
   ]
 }
diff --git a/sw/host/opentitanlib/testdata/image/manifest_ext.hjson b/sw/host/opentitanlib/testdata/image/manifest_ext.hjson
new file mode 100644
index 0000000000000..365602d6f75ef
--- /dev/null
+++ b/sw/host/opentitanlib/testdata/image/manifest_ext.hjson
@@ -0,0 +1,51 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  extension_params: [
+    {
+      spx_key: {
+        spx_key: "test_spx.pem"
+      }
+    },
+    {
+      secver_write: {
+        secver_write: true
+      }
+    },
+    {
+      integrator_specific_firmware_binding: {
+        strike_mask: "0x0fedcba987654321fedcba9876543210"
+        product_expr: [
+          {
+            mask: "0xffffffff",
+            value: "0xa5a5a5a5"
+          },
+          {
+            mask: "0xf0f0f0f0",
+            value: "0xa0a0a0a0"
+          }
+        ]
+      }
+    },
+    {
+      isfb_erase_policy: {
+        erase_allowed: false
+      }
+    },
+    {
+      raw: {
+        name: "0xbeef",
+        identifier: "0xabcd",
+        signed: true,
+        value: ["0x01", "0x23", "0x45", "0x67"]
+      }
+    },
+    {
+      spx_signature: {
+        spx_signature: "test_signature.bin"
+      }
+    }
+  ],
+}
diff --git a/sw/host/opentitanlib/src/image/testdata/manifest_missing.hjson b/sw/host/opentitanlib/testdata/image/manifest_missing.hjson
similarity index 100%
rename from sw/host/opentitanlib/src/image/testdata/manifest_missing.hjson
rename to sw/host/opentitanlib/testdata/image/manifest_missing.hjson
diff --git a/sw/host/opentitanlib/src/image/testdata/test_image.bin b/sw/host/opentitanlib/testdata/image/test_image.bin
similarity index 100%
rename from sw/host/opentitanlib/src/image/testdata/test_image.bin
rename to sw/host/opentitanlib/testdata/image/test_image.bin
diff --git a/sw/host/opentitanlib/src/image/testdata/world.txt b/sw/host/opentitanlib/testdata/image/world.txt
similarity index 100%
rename from sw/host/opentitanlib/src/image/testdata/world.txt
rename to sw/host/opentitanlib/testdata/image/world.txt
diff --git a/sw/host/opentitanlib/src/otp/testdata/lc_ctrl_state.hjson b/sw/host/opentitanlib/testdata/otp/lc_ctrl_state.hjson
similarity index 100%
rename from sw/host/opentitanlib/src/otp/testdata/lc_ctrl_state.hjson
rename to sw/host/opentitanlib/testdata/otp/lc_ctrl_state.hjson
diff --git a/sw/host/opentitanlib/src/otp/testdata/otp_ctrl_img_dev.hjson b/sw/host/opentitanlib/testdata/otp/otp_ctrl_img_dev.hjson
similarity index 100%
rename from sw/host/opentitanlib/src/otp/testdata/otp_ctrl_img_dev.hjson
rename to sw/host/opentitanlib/testdata/otp/otp_ctrl_img_dev.hjson
diff --git a/sw/host/opentitanlib/src/otp/testdata/otp_ctrl_mmap.hjson b/sw/host/opentitanlib/testdata/otp/otp_ctrl_mmap.hjson
similarity index 100%
rename from sw/host/opentitanlib/src/otp/testdata/otp_ctrl_mmap.hjson
rename to sw/host/opentitanlib/testdata/otp/otp_ctrl_mmap.hjson
diff --git a/sw/host/opentitanlib/src/otp/testdata/output.vmem b/sw/host/opentitanlib/testdata/otp/output.vmem
similarity index 100%
rename from sw/host/opentitanlib/src/otp/testdata/output.vmem
rename to sw/host/opentitanlib/testdata/otp/output.vmem
diff --git a/sw/host/opentitanlib/util/BUILD b/sw/host/opentitanlib/util/BUILD
new file mode 100644
index 0000000000000..174246416178b
--- /dev/null
+++ b/sw/host/opentitanlib/util/BUILD
@@ -0,0 +1,16 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "util",
+    srcs = ["src/lib.rs"],
+    deps = [
+        "@crate_index//:anyhow",
+        "@crate_index//:pem-rfc7468",
+    ],
+)
diff --git a/sw/host/opentitanlib/util/src/lib.rs b/sw/host/opentitanlib/util/src/lib.rs
new file mode 100644
index 0000000000000..7a2ab855fec06
--- /dev/null
+++ b/sw/host/opentitanlib/util/src/lib.rs
@@ -0,0 +1,61 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+use pem_rfc7468::{BASE64_WRAP_WIDTH, LineEnding};
+
+/// Cleans PEM-like byte slices for parsing, attempting to handle non-standard formats.
+///
+/// This function is primarily designed as a recovery step when input PEM bytes have
+/// already failed to be parsed by a standard PEM library.
+///
+/// Some signing tools or commands may generate custom header fields after the
+/// '-----BEGIN ...-----' marker but before the actual Base64 encoded payload.
+/// For example:
+/// -----BEGIN AUTH SIGNATURE-----
+/// ALGORITHM: ES256
+///
+/// [BASE64 PAYLOAD LINE 1]
+/// [BASE64 PAYLOAD LINE 2]
+/// -----END AUTH SIGNATURE-----
+///
+/// Such custom fields (like "ALGORITHM: ES256" and the subsequent blank line)
+/// do not strictly adhere to PEM specifications like RFC 7468 for the text encoding
+/// of the payload itself (which expects the Base64 block to follow.)
+///
+/// This function attempts to strip these non-standard intermediate lines and retain
+/// only the BEGIN/END markers and the core Base64 payload.
+///
+/// Assumptions made by this function:
+/// 1. The very first line of the `pem_bytes` input MUST be the '-----BEGIN ...-----' marker.
+///    This line is always preserved.
+/// 2. A line that is part of the actual Base64 payload is expected to have a length
+///    equal to `pem_rfc7468::BASE64_WRAP_WIDTH`. This is used as a primary trigger
+///    to identify the start of the payload.
+/// 3. Any custom lines that appear between the '-----BEGIN ...-----' marker
+///    and the Base64 payload are assumed NOT to have a length equal to
+///    `pem_rfc7468::BASE64_WRAP_WIDTH`. Such lines will be discarded.
+///
+pub fn clean_pem_bytes_for_parsing(pem_bytes: &[u8]) -> Result<Vec<u8>, pem_rfc7468::Error> {
+    let pem_content_str = std::str::from_utf8(pem_bytes)?;
+    let mut lines_iter = pem_content_str.lines();
+    let mut output_bytes: Vec<u8> = Vec::new();
+    if let Some(begin_line_str) = lines_iter.next() {
+        output_bytes.extend_from_slice(begin_line_str.as_bytes());
+        output_bytes.extend_from_slice(LineEnding::default().as_bytes());
+    } else {
+        return Err(pem_rfc7468::Error::EncapsulatedText);
+    }
+
+    let mut processing_base64_payload = false;
+
+    for line_str in lines_iter {
+        if !processing_base64_payload && line_str.len() == BASE64_WRAP_WIDTH {
+            processing_base64_payload = true;
+        }
+        if processing_base64_payload {
+            output_bytes.extend_from_slice(line_str.as_bytes());
+            output_bytes.extend_from_slice(LineEnding::default().as_bytes());
+        }
+    }
+    Ok(output_bytes)
+}
diff --git a/sw/host/opentitansession/src/main.rs b/sw/host/opentitansession/src/main.rs
index 79a5cf6d44809..e4921f77828d4 100644
--- a/sw/host/opentitansession/src/main.rs
+++ b/sw/host/opentitansession/src/main.rs
@@ -2,15 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Context, Result, anyhow, bail};
 use clap::Parser;
 use directories::{BaseDirs, ProjectDirs};
 use erased_serde::Serialize;
 use log::LevelFilter;
 use rustix::process::{Pid, Signal};
-use std::env::{self, args_os, ArgsOs};
+use std::env::{self, ArgsOs, args_os};
 use std::ffi::OsString;
-use std::fs::{self, read_to_string, File};
+use std::fs::{self, File, read_to_string};
 use std::io::{self, ErrorKind, Write};
 use std::iter::Iterator;
 use std::path::PathBuf;
diff --git a/sw/host/opentitantool/BUILD b/sw/host/opentitantool/BUILD
index 94a8115b955aa..73317f51deb57 100644
--- a/sw/host/opentitantool/BUILD
+++ b/sw/host/opentitantool/BUILD
@@ -3,13 +3,14 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_test")
-load("@rules_pkg//pkg:mappings.bzl", "pkg_filegroup", "pkg_files")
+load("@rules_pkg//pkg:mappings.bzl", "pkg_attributes", "pkg_filegroup", "pkg_files")
 
 package(default_visibility = ["//visibility:public"])
 
 rust_binary(
     name = "opentitantool",
     srcs = [
+        "src/command/bfv.rs",
         "src/command/bootstrap.rs",
         "src/command/certificate.rs",
         "src/command/clear_bitstream.rs",
@@ -35,6 +36,7 @@ rust_binary(
         "src/command/status_cmd.rs",
         "src/command/tpm.rs",
         "src/command/transport.rs",
+        "src/command/uart.rs",
         "src/command/update_usr_access.rs",
         "src/command/version.rs",
         "src/command/xmodem.rs",
@@ -52,6 +54,7 @@ rust_binary(
         "//sw/host/opentitanlib",
         "//sw/host/ot_certs",
         "//sw/host/sphincsplus",
+        "//util:bfv_decoder",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:directories",
@@ -75,6 +78,7 @@ rust_binary(
 pkg_files(
     name = "binary",
     srcs = [":opentitantool"],
+    attributes = pkg_attributes(mode = "0755"),
 )
 
 pkg_filegroup(
diff --git a/sw/host/opentitantool/src/command/bfv.rs b/sw/host/opentitantool/src/command/bfv.rs
new file mode 100644
index 0000000000000..83c48734508f1
--- /dev/null
+++ b/sw/host/opentitantool/src/command/bfv.rs
@@ -0,0 +1,54 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Context, Result};
+use clap::Args;
+use std::any::Any;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
+
+#[derive(Debug, Args)]
+/// Decode a raw status. Optionally accepts an ELF file to recover the filename.
+pub struct BfvCommand {
+    /// Hex BFV value as reported by device on failures.
+    bfv: Vec<String>,
+}
+
+unsafe extern "C" {
+    fn bfv_decoder(bfv: u32, buf: *mut u8, buf_size: usize) -> usize;
+}
+
+impl CommandDispatch for BfvCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        for value in &self.bfv {
+            // Decode status.
+            let string_bfv = if value.starts_with("0x") {
+                &value.as_str()[2..]
+            } else {
+                value.as_str()
+            };
+
+            let bfv = u32::from_str_radix(string_bfv, 16)
+                .context(format!("\"{}\" is not a valid hex value", string_bfv))?;
+            let mut text = [0u8; 80];
+            // SAFETY:  the decodr function is guaranteed to size of the string
+            // written into text.
+            let size = unsafe { bfv_decoder(bfv, text.as_mut_ptr(), text.len()) };
+
+            println!(
+                "{:08x}: {}",
+                bfv,
+                std::str::from_utf8(&text[..size]).unwrap()
+            );
+        }
+        // Separate command output from the next shell prompt.
+        println!();
+        Ok(None)
+    }
+}
diff --git a/sw/host/opentitantool/src/command/bootstrap.rs b/sw/host/opentitantool/src/command/bootstrap.rs
index 29a860cb3498a..0931a2b5f0ced 100644
--- a/sw/host/opentitantool/src/command/bootstrap.rs
+++ b/sw/host/opentitantool/src/command/bootstrap.rs
@@ -2,9 +2,8 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
@@ -35,7 +34,7 @@ impl BootstrapCommand {
     fn bootstrap_using_direct_emulator_integration(
         &self,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         ensure!(
             !(self.filename.len() > 1 || self.filename[0].contains('@')),
             "The `emulator` protocol does not support image assembly"
@@ -61,7 +60,7 @@ impl CommandDispatch for BootstrapCommand {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if self.bootstrap_options.protocol == BootstrapProtocol::Emulator {
             return self.bootstrap_using_direct_emulator_integration(transport);
         }
diff --git a/sw/host/opentitantool/src/command/certificate.rs b/sw/host/opentitantool/src/command/certificate.rs
index 30ff42a44ddb2..f6bf20cec2797 100644
--- a/sw/host/opentitantool/src/command/certificate.rs
+++ b/sw/host/opentitantool/src/command/certificate.rs
@@ -2,18 +2,19 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
-use clap::{Args, Subcommand, ValueEnum};
-use serde_annotate::Annotate;
+use anyhow::{Context, Result, bail};
+use clap::{Args, Subcommand};
 use std::any::Any;
 use std::fs::{self, File};
 use std::io::Write;
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
-use ot_certs::template::subst::{Subst, SubstData};
+use opentitanlib::app::command::CommandDispatch;
+use ot_certs::CertFormat;
+use ot_certs::cwt;
 use ot_certs::template::Template;
+use ot_certs::template::subst::{Subst, SubstData};
 use ot_certs::{codegen, x509};
 
 fn load_template(path: &PathBuf) -> Result<Template> {
@@ -44,12 +45,6 @@ pub enum CertificateCommand {
     Subst(SubstCommand),
 }
 
-/// Generate a certificate template.
-#[derive(Clone, Debug, ValueEnum)]
-pub enum CertFormat {
-    X509,
-}
-
 /// Generate a certificate template.
 #[derive(Debug, Args)]
 pub struct CodegenCommand {
@@ -78,13 +73,30 @@ impl CommandDispatch for CodegenCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let template = load_template(&self.template)?;
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let (template_name, codegen) = match self.cert_format {
+            CertFormat::X509 => {
+                let template = load_template(&self.template)?;
+                (
+                    template.name.clone(),
+                    codegen::generate_cert(&self.template.display().to_string(), &template)?,
+                )
+            }
+
+            CertFormat::Cwt => {
+                let template = cwt::load_cwt_template(&self.template)?;
+                (
+                    template.name.clone(),
+                    cwt::generate_cert(&self.template.display().to_string(), &template)?,
+                )
+            }
+        };
+
         // Generate C and header files.
         let (output_c, output_h) = if let Some(output_dir) = &self.output_dir {
             (
-                output_dir.join(format!("{}.c", &template.name)),
-                output_dir.join(format!("{}.h", &template.name)),
+                output_dir.join(format!("{}.c", &template_name)),
+                output_dir.join(format!("{}.h", &template_name)),
             )
         } else {
             (
@@ -99,7 +111,6 @@ impl CommandDispatch for CodegenCommand {
         let mut output_c = File::create(output_c)?;
         let mut output_h = File::create(output_h)?;
 
-        let codegen = codegen::generate_cert(&self.template.display().to_string(), &template)?;
         writeln!(output_c, "{}", codegen.source_c)?;
         writeln!(output_h, "{}", codegen.source_h)?;
 
@@ -132,14 +143,16 @@ impl CommandDispatch for GenCertCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Load template.
         let template = load_template(&self.template)?;
         // Load data.
         let data = self.subst.as_ref().map(load_subst).transpose()?;
         // Warn user if there is no substitution data and variables.
         if !template.variables.is_empty() && data.is_none() {
-            bail!("the template contains variable so you must specify some substition data using --subst")
+            bail!(
+                "the template contains variable so you must specify some substition data using --subst"
+            )
         }
         // Substitute
         let template = if let Some(data) = data {
@@ -183,7 +196,7 @@ impl CommandDispatch for ParseCertificate {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let cert = fs::read(&self.certificate).context("could not read certificate from file")?;
         let cert = x509::parse_certificate(&cert)?;
         Ok(Some(Box::new(cert)))
@@ -206,7 +219,7 @@ impl CommandDispatch for SubstCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Load template.
         let template = load_template(&self.template)?;
         // Load data.
diff --git a/sw/host/opentitantool/src/command/clear_bitstream.rs b/sw/host/opentitantool/src/command/clear_bitstream.rs
index f7a3574d2c783..3db6d53ccb4e2 100644
--- a/sw/host/opentitantool/src/command/clear_bitstream.rs
+++ b/sw/host/opentitantool/src/command/clear_bitstream.rs
@@ -4,11 +4,10 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::transport::common::fpga;
 
 /// Clear the bitstream of the FPGA
@@ -20,7 +19,7 @@ impl CommandDispatch for ClearBitstream {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.dispatch(&fpga::ClearBitstream)
     }
 }
diff --git a/sw/host/opentitantool/src/command/console.rs b/sw/host/opentitantool/src/command/console.rs
index 02548003cd36e..17f29c6e063e0 100644
--- a/sw/host/opentitantool/src/command/console.rs
+++ b/sw/host/opentitantool/src/command/console.rs
@@ -2,16 +2,15 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Args;
 use regex::Regex;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs::File;
 use std::time::Duration;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::io::uart::UartParams;
 use opentitanlib::transport::Capability;
 use opentitanlib::uart::console::{ExitStatus, UartConsole};
@@ -58,7 +57,7 @@ impl CommandDispatch for Console {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // We need the UART for the console command to operate.
         transport.capabilities()?.request(Capability::UART).ok()?;
 
diff --git a/sw/host/opentitantool/src/command/ecdsa.rs b/sw/host/opentitantool/src/command/ecdsa.rs
index 57dc237cb8c03..b34e638ec0ba3 100644
--- a/sw/host/opentitantool/src/command/ecdsa.rs
+++ b/sw/host/opentitantool/src/command/ecdsa.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::{Args, Subcommand};
 use regex::Regex;
 use serde_annotate::Annotate;
@@ -10,14 +10,14 @@ use std::any::Any;
 use std::fs::File;
 use std::io::Write;
 use std::path::{Path, PathBuf};
+use std::str::FromStr;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::crypto::ecdsa::{
     EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature,
 };
 use opentitanlib::crypto::sha256::Sha256Digest;
-use opentitanlib::util::parse_int::ParseInt;
 
 /// Given the path to a public key, returns the public key. Given
 /// the path to a private key, extracts the public key from the private
@@ -52,7 +52,7 @@ impl CommandDispatch for EcdsaKeyShowCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = load_pub_or_priv_key(&self.der_file)?;
 
         // The OTP creation tool is written in python and parses arbitrary
@@ -94,7 +94,7 @@ impl CommandDispatch for EcdsaKeyGenerateCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let private_key = EcdsaPrivateKey::new();
         let mut der_file = self.output_dir.to_owned();
         der_file.push(&self.basename);
@@ -123,7 +123,7 @@ impl CommandDispatch for EcdsaKeyExportCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = load_pub_or_priv_key(&self.der_file)?;
         let key = EcdsaRawPublicKey::try_from(&key)?;
 
@@ -141,7 +141,9 @@ impl CommandDispatch for EcdsaKeyExportCommand {
         // which would overwrite it. This will not detect situations where there is a symlink
         // involved so this will only catch "obvious" mistakes.
         if self.der_file == output_path {
-            bail!("the output file is the same as the key file, this would overwrite the key, not allowing this")
+            bail!(
+                "the output file is the same as the key file, this would overwrite the key, not allowing this"
+            )
         }
         println!("exporting key to {}", output_path.display());
 
@@ -197,9 +199,7 @@ pub enum EcdsaKeySubcommands {
 
 #[derive(serde::Serialize, Annotate)]
 pub struct EcdsaSignResult {
-    #[serde(with = "serde_bytes")]
-    #[annotate(format = hexstr)]
-    pub digest: Vec<u8>,
+    pub digest: Sha256Digest,
     #[serde(with = "serde_bytes")]
     #[annotate(format = hexstr)]
     pub signature: Vec<u8>,
@@ -231,35 +231,39 @@ impl CommandDispatch for EcdsaSignCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let private_key = EcdsaPrivateKey::load(&self.private_key)?;
         let digest = if let Some(input) = &self.input {
             let bytes = std::fs::read(input)?;
-            Sha256Digest::from_le_bytes(bytes)?
+            Sha256Digest::try_from(bytes.as_slice())?
         } else {
-            self.digest.clone().unwrap()
+            self.digest.unwrap()
         };
         let signature = private_key.sign(&digest)?.to_vec()?;
         if let Some(output) = &self.output {
             std::fs::write(output, &signature)?;
         }
-        Ok(Some(Box::new(EcdsaSignResult {
-            digest: digest.to_le_bytes(),
-            signature,
-        })))
+        Ok(Some(Box::new(EcdsaSignResult { digest, signature })))
     }
 }
 
 #[derive(Debug, Args)]
 pub struct EcdsaVerifyCommand {
+    /// Signature to be verified (binary file)
+    #[arg(long, short, conflicts_with = "signature")]
+    signature_file: Option<PathBuf>,
+    /// Digest to be verified (binary file)
+    #[arg(long, short, conflicts_with = "signature")]
+    digest_file: Option<PathBuf>,
     /// Key file in DER format.
     #[arg(value_name = "KEY")]
     der_file: PathBuf,
-    /// SHA256 digest of the message as a hex string (big-endian), i.e. 0x...
-    #[arg(value_name = "SHA256_DIGEST")]
-    digest: String,
+    /// SHA256 digest of the message as a hex string.
+    #[arg(value_name = "SHA256_DIGEST", conflicts_with = "digest_file")]
+    digest: Option<String>,
     /// Signature to be verified as a hex string.
-    signature: String,
+    #[arg(conflicts_with = "signature_file")]
+    signature: Option<String>,
 }
 
 impl CommandDispatch for EcdsaVerifyCommand {
@@ -267,10 +271,23 @@ impl CommandDispatch for EcdsaVerifyCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = load_pub_or_priv_key(&self.der_file)?;
-        let digest = Sha256Digest::from_str(&self.digest)?;
-        let signature = EcdsaRawSignature::try_from(hex::decode(&self.signature)?.as_slice())?;
+        let digest = if let Some(digest_file) = &self.digest_file {
+            let bytes = std::fs::read(digest_file)?;
+            Sha256Digest::try_from(bytes.as_slice())?
+        } else if let Some(digest) = &self.digest {
+            Sha256Digest::from_str(digest)?
+        } else {
+            unreachable!();
+        };
+        let signature = if let Some(signature_file) = &self.signature_file {
+            EcdsaRawSignature::read_from_file(signature_file)?
+        } else if let Some(signature) = &self.signature {
+            EcdsaRawSignature::try_from(hex::decode(signature)?.as_slice())?
+        } else {
+            unreachable!();
+        };
         key.verify(&digest, &signature)?;
         Ok(None)
     }
diff --git a/sw/host/opentitantool/src/command/emulator.rs b/sw/host/opentitantool/src/command/emulator.rs
index c5568e9bfd5a3..7ea30a87b60ad 100644
--- a/sw/host/opentitantool/src/command/emulator.rs
+++ b/sw/host/opentitantool/src/command/emulator.rs
@@ -4,13 +4,12 @@
 
 use anyhow::Result;
 use clap::{Args, Subcommand};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::collections::HashMap;
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::io::emu::{EmuState, EmuValue};
 use opentitanlib::transport::Capability;
 
@@ -28,7 +27,7 @@ impl CommandDispatch for EmuGetState {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::EMULATOR)
@@ -77,7 +76,7 @@ impl CommandDispatch for EmuStart {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::EMULATOR)
@@ -103,7 +102,7 @@ impl CommandDispatch for EmuStop {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::EMULATOR)
diff --git a/sw/host/opentitantool/src/command/gpio.rs b/sw/host/opentitantool/src/command/gpio.rs
index bbd550334dfe6..9feb1a86eeafd 100644
--- a/sw/host/opentitantool/src/command/gpio.rs
+++ b/sw/host/opentitantool/src/command/gpio.rs
@@ -4,22 +4,26 @@
 
 use anyhow::Result;
 use clap::{Args, Subcommand};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::borrow::Borrow;
 use std::collections::HashMap;
 use std::fs::File;
-use std::io::{Read, Write};
+use std::io::Read;
 use std::rc::Rc;
 use std::str::FromStr;
 use std::time::Duration;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
-use opentitanlib::io::gpio::{ClockNature, Edge, GpioPin, PinMode, PullMode};
+use opentitanlib::app::command::CommandDispatch;
+use opentitanlib::io::gpio::{
+    ClockNature, Edge, GpioPin, MonitoringReadResponse, MonitoringStartResponse, PinMode, PullMode,
+};
 use opentitanlib::transport::Capability;
 use opentitanlib::util::file;
 use opentitanlib::util::raw_tty::RawTty;
+use opentitanlib::util::vcd::{
+    Header, ScalarValue, ValueChangeItem, ValueChangeSection, VcdWriter, dump_vcd_wire_vardefs,
+};
 use opentitanlib::util::voltage::Voltage;
 
 #[derive(Debug, Args)]
@@ -40,7 +44,7 @@ impl CommandDispatch for GpioRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
         let value = gpio_pin.read()?;
@@ -66,7 +70,7 @@ impl CommandDispatch for GpioWrite {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
 
@@ -90,7 +94,7 @@ impl CommandDispatch for GpioSetMode {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
         gpio_pin.set_mode(self.mode)?;
@@ -113,7 +117,7 @@ impl CommandDispatch for GpioSetPullMode {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
         gpio_pin.set_pull_mode(self.pull_mode)?;
@@ -145,7 +149,7 @@ impl CommandDispatch for GpioSet {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
 
@@ -177,7 +181,7 @@ impl CommandDispatch for GpioAnalogRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
         let volts = gpio_pin.analog_read()?;
@@ -202,7 +206,7 @@ impl CommandDispatch for GpioAnalogWrite {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         let gpio_pin = transport.gpio_pin(&self.pin)?;
 
@@ -223,7 +227,7 @@ impl CommandDispatch for GpioApplyStrapping {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         transport.pin_strapping(&self.name)?.apply()?;
         Ok(None)
@@ -242,6 +246,10 @@ pub enum GpioMonitoringCommand {
 pub struct GpioMonitoringStart {
     /// The list of GPIO pins to monitor (space separated).
     pub pins: Vec<String>,
+
+    /// Location of optional output file to record the vcd header information.
+    #[arg(short, long)]
+    pub outfile: Option<String>,
 }
 
 #[derive(serde::Serialize)]
@@ -262,7 +270,7 @@ impl CommandDispatch for GpioMonitoringStart {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO | Capability::GPIO_MONITORING)
@@ -276,6 +284,12 @@ impl CommandDispatch for GpioMonitoringStart {
                 .map(Rc::borrow)
                 .collect::<Vec<&dyn GpioPin>>(),
         )?;
+
+        // If vcd output file was was provided, record results there.
+        if let Some(file) = &self.outfile {
+            write_vcd_header(file, &self.pins, clock_nature, &resp)?;
+        }
+
         Ok(Some(Box::new(GpioMonitoringStartResult {
             clock_nature,
             initial_levels: resp
@@ -301,6 +315,11 @@ pub struct GpioMonitoringRead {
 
     #[arg(long)]
     pub continue_monitoring: bool,
+
+    /// Optional vcd file to append data to. Note it is important that the gpios are in the same
+    /// order from the gpio start command where the vcd header was written.
+    #[arg(short, long)]
+    outfile: Option<String>,
 }
 
 #[derive(serde::Serialize)]
@@ -325,7 +344,7 @@ impl CommandDispatch for GpioMonitoringRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO | Capability::GPIO_MONITORING)
@@ -339,6 +358,10 @@ impl CommandDispatch for GpioMonitoringRead {
                 .collect::<Vec<&dyn GpioPin>>(),
             self.continue_monitoring,
         )?;
+        // If vcd output file was specified, write data there.
+        if let Some(file) = &self.outfile {
+            append_vcd_data(file, &resp, !self.continue_monitoring)?;
+        }
         Ok(Some(Box::new(GpioMonitoringReadResult {
             events: resp
                 .events
@@ -354,6 +377,90 @@ impl CommandDispatch for GpioMonitoringRead {
     }
 }
 
+/// Write the VCD header data with the given inputs
+fn write_vcd_header(
+    file: &str,
+    pins: &[String],
+    clock_nature: ClockNature,
+    start_response: &MonitoringStartResponse,
+) -> Result<()> {
+    let file = File::create(file)?;
+    let mut writer = VcdWriter::new(file);
+    let version = super::version::VersionResponse::default();
+    let version_str = format!(
+        "opentitantool {} {}",
+        version.version.as_ref().map_or("<unknown>", String::as_str),
+        match version.clean {
+            Some(true) => "clean",
+            Some(false) => "modified",
+            None => "<unknown>",
+        }
+    );
+    let timescale_ps = match clock_nature {
+        ClockNature::Wallclock { resolution, .. } => {
+            Some(1_000_000_000_000u128 / resolution as u128)
+        }
+        ClockNature::Unspecified => None,
+    };
+    writer.write_header(&Header {
+        timescale_ps,
+        date: None,
+        version: Some(version_str),
+    })?;
+    let pin_info = pins
+        .iter()
+        .enumerate()
+        .map(|(n, name)| (format!("'{}", n), Some(name.to_string())))
+        .collect::<Vec<_>>();
+    writer.write_vardefs(&dump_vcd_wire_vardefs(String::from("logic"), pin_info))?;
+    let mut changes = vec![ValueChangeItem::Timestamp {
+        step: start_response.timestamp as u128,
+    }];
+    for (n, v) in start_response.initial_levels.iter().enumerate() {
+        let value = if *v {
+            ScalarValue::One
+        } else {
+            ScalarValue::Zero
+        };
+        changes.push(ValueChangeItem::Scalar {
+            identifier: format!("'{}", n),
+            value,
+        });
+    }
+    writer.write_value_change_section(&ValueChangeSection { changes }, 0u128)?;
+    writer.flush()?;
+    Ok(())
+}
+
+/// Appends the VCD data to the end of the file specified. Note the order of the gpios should
+/// be consistent between calls and match the order from the gpio start command.
+fn append_vcd_data(file: &str, read_response: &MonitoringReadResponse, last: bool) -> Result<()> {
+    let file = std::fs::OpenOptions::new().append(true).open(file)?;
+    let mut writer = VcdWriter::new(file);
+    let mut changes = Vec::new();
+    for event in &read_response.events {
+        changes.push(ValueChangeItem::Timestamp {
+            step: event.timestamp as u128,
+        });
+        let identifier = format!("'{}", event.signal_index);
+        let value = match event.edge {
+            Edge::Rising => ScalarValue::One,
+            Edge::Falling => ScalarValue::Zero,
+        };
+        changes.push(ValueChangeItem::Scalar { identifier, value });
+    }
+    // Output timestamp of final reading (all signals remained stable from the last edge until
+    // this time.)
+    if last {
+        writer.write_value_change_item(&ValueChangeItem::Timestamp {
+            step: read_response.timestamp as u128,
+        })?;
+    }
+    writer.write_value_change_section(&ValueChangeSection { changes }, 0u128)?;
+    writer.flush()?;
+    Ok(())
+}
+
 #[derive(Debug, Args)]
 /// Whereas `monitoring start` and `monitoring read` are meant for use by scripts, this
 /// `monitoring vcd` is intended for manual use by an operator.  It will stay in the foreground,
@@ -378,14 +485,13 @@ impl CommandDispatch for GpioMonitoringVcd {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO | Capability::GPIO_MONITORING)
             .ok()?;
         let gpio_monitoring = transport.gpio_monitoring()?;
         let gpio_pins = transport.gpio_pins(&self.pins)?;
-        let mut file = File::create(&self.outfile)?;
 
         if !self.quiet {
             eprintln!("Dumping events to {}", &self.outfile);
@@ -399,50 +505,15 @@ impl CommandDispatch for GpioMonitoringVcd {
 
         // Inform the transport that we want to monitor a set of pins, and write a file header
         // with the names of each of the monitored signals.
-        let clock_nature = gpio_monitoring.get_clock_nature()?;
         let initial = gpio_monitoring.monitoring_start(
             &gpio_pins
                 .iter()
                 .map(Rc::borrow)
                 .collect::<Vec<&dyn GpioPin>>(),
         )?;
-        writeln!(&mut file, "$version")?;
-        let version = super::version::VersionResponse::default();
-        writeln!(
-            &mut file,
-            "   opentitantool {} {}",
-            version.version.unwrap_or("<unknown>".into()),
-            if let Some(clean) = version.clean {
-                if clean {
-                    "clean"
-                } else {
-                    "modified"
-                }
-            } else {
-                "<unknown>"
-            }
-        )?;
-        writeln!(&mut file, "$end")?;
-        match clock_nature {
-            ClockNature::Wallclock { resolution, .. } => {
-                writeln!(
-                    &mut file,
-                    "$timescale {}ps $end",
-                    1000000000000u64 / resolution
-                )?;
-            }
-            ClockNature::Unspecified => (),
-        }
-        writeln!(&mut file, "$scope module logic $end")?;
-        for (n, pin) in self.pins.iter().enumerate() {
-            writeln!(&mut file, "$var wire 1 '{} {} $end", n, pin)?;
-        }
-        writeln!(&mut file, "$upscope $end")?;
-        writeln!(&mut file, "$enddefinitions $end")?;
-        writeln!(&mut file, "#{}", initial.timestamp)?;
-        for (n, v) in initial.initial_levels.iter().enumerate() {
-            writeln!(&mut file, "{}'{}", if *v { 1 } else { 0 }, n)?;
-        }
+
+        let clock_nature = gpio_monitoring.get_clock_nature()?;
+        write_vcd_header(&self.outfile, &self.pins, clock_nature, &initial)?;
 
         // Now loop indefinitely, retrieving events from the internal queue of the transport and
         // printing them to the output file.
@@ -455,18 +526,7 @@ impl CommandDispatch for GpioMonitoringVcd {
                     .collect::<Vec<&dyn GpioPin>>(),
                 true,
             )?;
-            for event in &resp.events {
-                writeln!(&mut file, "#{}", event.timestamp)?;
-                writeln!(
-                    &mut file,
-                    "{}'{}",
-                    match event.edge {
-                        Edge::Rising => 1,
-                        Edge::Falling => 0,
-                    },
-                    event.signal_index
-                )?;
-            }
+            append_vcd_data(&self.outfile, &resp, false)?;
             eprint!("\u{8}{}", ['/', '-', '\\', '|'][loop_count & 3usize]);
             let delay = if resp.events.is_empty() {
                 Duration::from_millis(10)
@@ -493,21 +553,7 @@ impl CommandDispatch for GpioMonitoringVcd {
                 .collect::<Vec<&dyn GpioPin>>(),
             false,
         )?;
-        for event in &resp.events {
-            writeln!(&mut file, "#{}", event.timestamp)?;
-            writeln!(
-                &mut file,
-                "{}'{}",
-                match event.edge {
-                    Edge::Rising => 1,
-                    Edge::Falling => 0,
-                },
-                event.signal_index
-            )?;
-        }
-        // Output timestamp of final reading (all signals remained stable from the last edge until
-        // this time.)
-        writeln!(&mut file, "#{}", resp.timestamp)?;
+        append_vcd_data(&self.outfile, &resp, true)?;
         eprintln!("\r");
         Ok(None)
     }
@@ -525,7 +571,7 @@ impl CommandDispatch for GpioRemoveStrapping {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::GPIO).ok()?;
         transport.pin_strapping(&self.name)?.remove()?;
         Ok(None)
@@ -543,7 +589,7 @@ impl CommandDispatch for GpioMonitoring {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         self.command.run(context, transport)
     }
 }
@@ -591,7 +637,7 @@ impl CommandDispatch for GpioBitbang {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO_BITBANGING)
@@ -652,7 +698,7 @@ impl CommandDispatch for GpioDacBang {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO_BITBANGING)
diff --git a/sw/host/opentitantool/src/command/hello.rs b/sw/host/opentitantool/src/command/hello.rs
index 901b8337ec1e2..e8ff672f49bf2 100644
--- a/sw/host/opentitantool/src/command/hello.rs
+++ b/sw/host/opentitantool/src/command/hello.rs
@@ -9,11 +9,10 @@
 
 use anyhow::Result;
 use clap::{Args, Subcommand};
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 
 #[derive(Debug, Args)]
 /// The `hello world` command accepts an command option of `--cruel`.
@@ -33,7 +32,7 @@ impl CommandDispatch for HelloWorld {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Is the world cruel or not?
         let msg = if self.cruel {
             "Hello cruel World!"
@@ -55,7 +54,7 @@ impl CommandDispatch for HelloPeople {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // The `hello people` command produces no result.
         Ok(None)
     }
@@ -86,7 +85,7 @@ impl CommandDispatch for GoodbyeCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         Ok(Some(Box::new(GoodbyeMessage {
             message: "Goodbye!".to_owned(),
         })))
diff --git a/sw/host/opentitantool/src/command/i2c.rs b/sw/host/opentitantool/src/command/i2c.rs
index f735ef4fd9625..2202edcdff5dd 100644
--- a/sw/host/opentitantool/src/command/i2c.rs
+++ b/sw/host/opentitantool/src/command/i2c.rs
@@ -2,15 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::{Args, Subcommand, ValueEnum};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::convert::From;
 use std::time::Duration;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::io::i2c::{self, DeviceStatus, I2cParams, Transfer};
 use opentitanlib::tpm;
 use opentitanlib::transport::Capability;
@@ -34,7 +33,7 @@ impl CommandDispatch for I2cRawRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -59,7 +58,7 @@ impl CommandDispatch for I2cRawWrite {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -89,7 +88,7 @@ impl CommandDispatch for I2cRawWriteRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -131,7 +130,7 @@ impl CommandDispatch for I2cSetMode {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -219,7 +218,7 @@ impl CommandDispatch for I2cGetDeviceStatus {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -248,7 +247,7 @@ impl CommandDispatch for I2cPrepareRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::I2C).ok()?;
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let i2c_bus = context.params.create(transport, "DEFAULT")?;
@@ -272,7 +271,7 @@ impl CommandDispatch for I2cTpm {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let context = context.downcast_ref::<I2cCommand>().unwrap();
         let ready_pin = match &self.gsc_ready {
             Some(pin) => Some((transport.gpio_pin(pin)?, transport.gpio_monitoring()?)),
@@ -312,7 +311,7 @@ impl CommandDispatch for I2cCommand {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // None of the I2C commands care about the prior context, but they do
         // care about the `bus` parameter in the current node.
         self.command.run(self, transport)
diff --git a/sw/host/opentitantool/src/command/image.rs b/sw/host/opentitantool/src/command/image.rs
index 64f9c9e1447be..dd79b0251a20a 100644
--- a/sw/host/opentitantool/src/command/image.rs
+++ b/sw/host/opentitantool/src/command/image.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use clap::{Args, Subcommand};
 use serde_annotate::Annotate;
 use std::any::Any;
@@ -12,8 +12,8 @@ use std::fs::File;
 use std::io::Write;
 use std::path::{Path, PathBuf};
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 
 use opentitanlib::crypto::ecdsa::{
     EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawPublicKey, EcdsaRawSignature,
@@ -23,10 +23,10 @@ use opentitanlib::crypto::sha256::Sha256Digest;
 use opentitanlib::image::image::{self, ImageAssembler};
 use opentitanlib::image::manifest::{ManifestExtSpxSignature, ManifestKind};
 use opentitanlib::image::manifest_def::ManifestSpec;
-use opentitanlib::image::manifest_ext::{ManifestExtEntry, ManifestExtId, ManifestExtSpec};
+use opentitanlib::image::manifest_ext::{ManifestExtEntry, ManifestExtId};
 use opentitanlib::util::file::{FromReader, ToWriter};
 use opentitanlib::util::parse_int::ParseInt;
-use sphincsplus::{DecodeKey, SpxDomain, SpxPublicKey, SpxSecretKey};
+use sphincsplus::{DecodeKey, SphincsPlus, SpxDomain, SpxPublicKey, SpxRawSignature, SpxSecretKey};
 
 /// Bootstrap the target device.
 #[derive(Debug, Args)]
@@ -50,7 +50,7 @@ impl CommandDispatch for AssembleCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let mut image = ImageAssembler::with_params(self.size, self.mirror);
         // Filter out empty arguments that could appear e.g. because of bazel
         // and also trim extra spaces if necessary.
@@ -91,7 +91,7 @@ impl CommandDispatch for ManifestShowCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let image = image::Image::read_from_file(&self.image)?;
         let result = image
             .subimages()?
@@ -114,9 +114,6 @@ pub struct ManifestUpdateCommand {
     /// Filename for an HJSON configuration specifying manifest fields.
     #[arg(short, long)]
     manifest: Option<PathBuf>,
-    /// Filename for an HJSON configuration specifying manifest extension fields.
-    #[arg(long)]
-    manifest_ext: Option<PathBuf>,
     /// Update the length field of the manifest automatically.
     #[arg(long, action = clap::ArgAction::Set, default_value = "true")]
     update_length: bool,
@@ -147,9 +144,18 @@ pub struct ManifestUpdateCommand {
     /// The signature domain (None, Pure, PreHashedSha256)
     #[arg(long, default_value_t = SpxDomain::default())]
     domain: SpxDomain,
+    /// The signature algorithm (Shake128sSimple, Sha2128sSimple)
+    #[arg(long, default_value_t = SphincsPlus::Sha2128sSimple)]
+    spx_algorithm: SphincsPlus,
+    /// Set to true if the firmware uses a byte-reversed representation of the hash.
+    #[arg(long, action = clap::ArgAction::Set, default_value = "false")]
+    spx_hash_reversal_bug: bool,
     /// Filename to write the output to instead of updating the input file.
     #[arg(short, long)]
     output: Option<PathBuf>,
+    /// Sign the image when private keys are are given.
+    #[arg(long, action = clap::ArgAction::Set, default_value = "true")]
+    private_keys_sign: bool,
 }
 
 fn load_rsa_key(key_file: &Path) -> Result<(RsaPublicKey, Option<RsaPrivateKey>)> {
@@ -177,7 +183,7 @@ impl CommandDispatch for ManifestUpdateCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let mut image = image::Image::read_from_file(&self.image)?;
         let mut update_length = self.update_length;
 
@@ -185,20 +191,18 @@ impl CommandDispatch for ManifestUpdateCommand {
         image
             .manifest_sanity_check()
             .context("Image doesn't appear to contain a manifest, or the manifest is corrupted")?;
-
         // Load the manifest HJSON definition and update the image.
-        if let Some(manifest) = &self.manifest {
-            let def = ManifestSpec::read_from_file(manifest)?;
-            update_length = !def.has_length();
-            image.overwrite_manifest(def)?;
-        }
-
-        // Load the manifest extension HJSON definition and update the image.
-        let ext = self
-            .manifest_ext
+        let manifest = self
+            .manifest
             .as_deref()
-            .map(ManifestExtSpec::read_from_file)
+            .map(ManifestSpec::read_from_file)
             .unwrap_or(Ok(Default::default()))?;
+        let ext = manifest.extension_params.clone();
+
+        update_length = !manifest.has_length() && update_length;
+        image.overwrite_manifest(manifest)?;
+
+        // Update image with signed manifest extensions.
         image.add_signed_manifest_extensions(&ext)?;
 
         // Update the manifest fields that are in the signed region.
@@ -242,13 +246,21 @@ impl CommandDispatch for ManifestUpdateCommand {
             image.add_manifest_extension(key_ext)?;
             spx_private_key = sk;
 
-            // Allocate space for `spx_signature` (this impacts the manifest
-            // `length` field which is in the signed region of the image).
-            // Adding this facilitates offline signing.
-            image.allocate_manifest_extension(
-                ManifestExtId::spx_signature.into(),
-                std::mem::size_of::<ManifestExtSpxSignature>(),
-            )?;
+            if !image
+                .borrow_manifest()?
+                .extensions
+                .entries
+                .iter()
+                .any(|e| e.identifier == u32::from(ManifestExtId::spx_signature) && e.offset != 0)
+            {
+                // Allocate space for `spx_signature` (this impacts the manifest
+                // `length` field which is in the signed region of the image).
+                // Adding this facilitates offline signing.
+                image.allocate_manifest_extension(
+                    ManifestExtId::spx_signature.into(),
+                    std::mem::size_of::<ManifestExtSpxSignature>(),
+                )?;
+            }
         }
 
         // Update the manifest fields that are in the unsigned region.
@@ -264,37 +276,54 @@ impl CommandDispatch for ManifestUpdateCommand {
 
         // List out all signed extensions and set the bounds of the signed region.
         let signed_ids = ext
-            .signed_region
             .iter()
+            .filter(|entry_spec| entry_spec.is_signed())
             .map(|e| e.id())
-            .chain(vec![ManifestExtId::spx_key.into()])
+            .chain(vec![
+                ManifestExtId::spx_key.into(),
+                ManifestExtId::secver_write.into(),
+                ManifestExtId::isfb.into(),
+                ManifestExtId::isfb_erase.into(),
+                ManifestExtId::image_type.into(),
+            ])
             .collect::<HashSet<u32>>();
         image.update_signed_region(&signed_ids)?;
 
         // Remove any unused extensions in the table that do not reference extension data.
         image.drop_null_extensions()?;
 
-        // Online signing takes place if private keys are provided.
-        // Sign with RSA.
-        if let Some(key) = rsa_private_key {
-            image.update_rsa_signature(key.sign(&image.compute_digest()?)?)?;
-        }
-        // Sign with ECDSA.
-        if let Some(key) = ecdsa_private_key {
-            image.update_ecdsa_signature(key.sign(&image.compute_digest()?)?)?;
-        }
-        // Sign with SPX+.
-        if let Some(key) = spx_private_key {
-            let sig_bytes = match self.domain {
-                SpxDomain::None | SpxDomain::Pure => {
-                    image.map_signed_region(|buf| key.sign(self.domain, buf))??
-                }
-                SpxDomain::PreHashedSha256 => {
-                    let digest = image.compute_digest()?.to_le_bytes();
-                    key.sign(self.domain, &digest)?
-                }
-            };
-            image.add_manifest_extension(ManifestExtEntry::new_spx_signature_entry(&sig_bytes)?)?;
+        // This private_keys_sign gaurd is intended to sign the image
+        // There are cases in which we need to not always sign the image
+        if self.private_keys_sign {
+            // Online signing takes place if private keys are provided.
+            // Sign with RSA.
+            if let Some(key) = rsa_private_key {
+                image.update_rsa_signature(key.sign(&image.compute_digest()?)?)?;
+            }
+            // Sign with ECDSA.
+            if let Some(key) = ecdsa_private_key {
+                image.update_ecdsa_signature(key.sign(&image.compute_digest()?)?)?;
+            }
+            // Sign with SPX+.
+            if let Some(key) = spx_private_key {
+                let sig_bytes = match self.domain {
+                    SpxDomain::None | SpxDomain::Pure => {
+                        image.map_signed_region(|buf| key.sign(self.domain, buf))??
+                    }
+                    SpxDomain::PreHashedSha256 => {
+                        let digest = image.compute_digest()?;
+                        let digest = if self.spx_hash_reversal_bug {
+                            digest.to_vec_rev()
+                        } else {
+                            digest.to_vec()
+                        };
+                        key.sign(self.domain, &digest)?
+                    }
+                };
+                image.add_manifest_extension(ManifestExtEntry::new_spx_signature_entry(
+                    &sig_bytes,
+                )?)?;
+            }
         }
 
         // Offline signing takes place if signatures are provided.
@@ -318,8 +347,10 @@ impl CommandDispatch for ManifestUpdateCommand {
         }
         // Attach SPX+ signature.
         if let Some(spx_signature) = &self.spx_signature {
-            let signature = std::fs::read(spx_signature)?;
-            image.add_manifest_extension(ManifestExtEntry::new_spx_signature_entry(&signature)?)?;
+            let signature = SpxRawSignature::read_from_file(spx_signature, self.spx_algorithm)?;
+            image.add_manifest_extension(ManifestExtEntry::new_spx_signature_entry(
+                signature.as_bytes(),
+            )?)?;
         }
 
         image.write_to_file(self.output.as_ref().unwrap_or(&self.image))?;
@@ -338,6 +369,9 @@ pub struct ManifestVerifyCommand {
     /// The SPX signature domain (None, Pure, PreHashedSha256)
     #[arg(long, default_value_t = SpxDomain::default())]
     domain: SpxDomain,
+    /// The SPX signature was created with a reversed hash.
+    #[arg(long, default_value_t = false)]
+    spx_hash_reversal_bug: bool,
 }
 
 impl CommandDispatch for ManifestVerifyCommand {
@@ -345,24 +379,26 @@ impl CommandDispatch for ManifestVerifyCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let image = image::Image::read_from_file(&self.image)?;
-
-        let digest = Sha256Digest::from_le_bytes(image.compute_digest()?.to_le_bytes())?;
+        let digest = image.compute_digest()?;
 
         // Verify signature.
-        let sigverify_params = image.get_sigverify_params_from_manifest()?;
+        let sigverify_params = image
+            .get_sigverify_params_from_manifest()?
+            .with_hash_reversal_bug(self.spx_hash_reversal_bug);
         sigverify_params.verify(&digest)?;
 
         if self.spx {
             image.map_signed_region(|b| {
-                sigverify_params.spx_verify(b, self.domain).map_err(|x| {
-                    eprintln!(
-                        "SPX+ signature verification for domain '{}' failed",
-                        self.domain
-                    );
-                    x
-                })
+                sigverify_params
+                    .spx_verify(b, self.domain)
+                    .inspect_err(|_| {
+                        eprintln!(
+                            "SPX+ signature verification for domain '{}' failed",
+                            self.domain
+                        );
+                    })
             })??;
         }
 
@@ -383,9 +419,8 @@ pub struct DigestCommand {
 /// Response format for the digest command.
 #[derive(serde::Serialize, Annotate)]
 pub struct DigestResponse {
-    #[serde(with = "serde_bytes")]
     #[annotate(comment = "SHA256 Digest excluding the image signature bytes", format = hexstr)]
-    pub digest: Vec<u8>,
+    pub digest: Sha256Digest,
 }
 
 impl CommandDispatch for DigestCommand {
@@ -393,16 +428,14 @@ impl CommandDispatch for DigestCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let image = image::Image::read_from_file(&self.image)?;
         let digest = image.compute_digest()?;
         if let Some(bin) = &self.bin {
             let mut file = File::create(bin)?;
-            file.write_all(&digest.to_le_bytes())?;
+            file.write_all(digest.as_ref())?;
         }
-        Ok(Some(Box::new(DigestResponse {
-            digest: digest.to_be_bytes(),
-        })))
+        Ok(Some(Box::new(DigestResponse { digest })))
     }
 }
 
@@ -421,7 +454,7 @@ impl CommandDispatch for SpxMessageCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let image = image::Image::read_from_file(&self.image)?;
         let mut output = File::create(&self.output)?;
         // Note: the closure returns a Result R, and map_signed region
diff --git a/sw/host/opentitantool/src/command/lc.rs b/sw/host/opentitantool/src/command/lc.rs
index 07a4e27998e1d..d011fb308e863 100644
--- a/sw/host/opentitantool/src/command/lc.rs
+++ b/sw/host/opentitantool/src/command/lc.rs
@@ -2,17 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use std::any::Any;
-use std::time::Duration;
-
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::{Args, Subcommand};
 use hex::decode;
-use humantime::parse_duration;
-use serde_annotate::Annotate;
+use std::any::Any;
+use std::time::Duration;
 
 use opentitanlib::app::command::CommandDispatch;
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, DifLcCtrlToken, LcCtrlReg, LcCtrlStatus};
 use opentitanlib::io::jtag::{Jtag, JtagParams, JtagTap};
 use opentitanlib::test_utils::lc_transition::{trigger_lc_transition, trigger_volatile_raw_unlock};
@@ -73,12 +70,14 @@ fn parse_token_str(token: &str) -> Result<DifLcCtrlToken> {
 #[derive(Debug, Args)]
 /// Reads the device life cycle state over JTAG.
 pub struct LcStateRead {
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
+
+    // Skip device reset before connecting to LC controller. This is only
+    // applicable for lifecycle states that support PINMUX_TAP continuous
+    // sampling.
+    #[arg(short, long, action = clap::ArgAction::Set, default_value = "false")]
+    pub skip_reset: bool,
 }
 
 impl CommandDispatch for LcStateRead {
@@ -86,10 +85,16 @@ impl CommandDispatch for LcStateRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+
+        if !self.skip_reset {
+            transport.reset(UartRx::Clear)?;
+        } else {
+            // Unconditionally wait for the device to switch tap.
+            std::thread::sleep(Duration::from_millis(10));
+        }
 
         // Spawn an OpenOCD process and connect to the LC JTAG TAP.
         let mut jtag = self
@@ -114,10 +119,6 @@ pub struct LcRegReadResult {
 #[derive(Debug, Args)]
 /// Reads the device life cycle state over JTAG.
 pub struct LcRegRead {
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 
@@ -130,7 +131,7 @@ impl CommandDispatch for LcRegRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
 
@@ -153,10 +154,6 @@ impl CommandDispatch for LcRegRead {
 #[derive(Debug, Args)]
 /// Reads the 256bit device ID over JTAG.
 pub struct LcDeviceIdRead {
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 }
@@ -166,10 +163,10 @@ impl CommandDispatch for LcDeviceIdRead {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process and connect to the LC JTAG TAP.
         let mut jtag = self
@@ -208,9 +205,9 @@ pub struct RawUnlock {
     #[arg(long)]
     pub token: String,
 
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
+    /// Whether to use the external clock for the transition.
+    #[arg(long, default_value = "false")]
+    pub use_external_clk: bool,
 
     #[command(flatten)]
     pub jtag_params: JtagParams,
@@ -221,10 +218,10 @@ impl CommandDispatch for RawUnlock {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process and connect to the LC JTAG TAP.
         let mut jtag = self
@@ -242,8 +239,7 @@ impl CommandDispatch for RawUnlock {
             jtag,
             DifLcCtrlState::TestUnlocked0,
             Some(token.into_register_values()),
-            /*use_external_clk=*/ true,
-            self.reset_delay,
+            self.use_external_clk,
             /*reset_tap_straps=*/ Some(JtagTap::LcTap),
         )?;
 
@@ -268,14 +264,14 @@ pub struct Transition {
     #[arg(value_enum, value_parser = DifLcCtrlState::parse_lc_state_str, default_value = "test_unlocked0")]
     pub target_lc_state: DifLcCtrlState,
 
+    /// Whether to use the external clock for the transition.
+    #[arg(long, default_value = "false")]
+    pub use_external_clk: bool,
+
     /// The token needed for this transition as a hexstring.
     #[arg(long, default_value = "0x00000000000000000000000000000000")]
     pub token: String,
 
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 }
@@ -285,10 +281,10 @@ impl CommandDispatch for Transition {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process and connect to the LC JTAG TAP.
         let mut jtag = self
@@ -302,7 +298,7 @@ impl CommandDispatch for Transition {
         rom_bootstrap.apply()?;
 
         // Reset the chip so that LC_CTRL is in a clean state.
-        let _ = transport.reset_target(Duration::from_millis(50), false);
+        let _ = transport.reset_with_delay(UartRx::Keep, Duration::from_millis(50));
         std::thread::sleep(Duration::from_millis(50));
 
         // Check whether this is a valid transition.
@@ -314,8 +310,7 @@ impl CommandDispatch for Transition {
             jtag,
             self.target_lc_state,
             Some(token.into_register_values()),
-            /*use_external_clk=*/ true,
-            self.reset_delay,
+            self.use_external_clk,
             /*reset_tap_straps=*/ Some(JtagTap::LcTap),
         )?;
 
@@ -337,10 +332,6 @@ impl CommandDispatch for Transition {
 #[derive(Debug, Args)]
 /// Reads the LC controller's status register.
 pub struct Status {
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 }
@@ -366,10 +357,10 @@ impl CommandDispatch for Status {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process, connect to the LC JTAG TAP, read register, and shutdown OpenOCD.
         let mut jtag = self
@@ -399,10 +390,6 @@ impl CommandDispatch for Status {
 #[derive(Debug, Args)]
 /// Reads the LC transition count register of the LC controller.
 pub struct TransitionCount {
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 }
@@ -417,10 +404,10 @@ impl CommandDispatch for TransitionCount {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process, connect to the LC JTAG TAP, read register, and shutdown OpenOCD.
         let mut jtag = self
@@ -441,10 +428,6 @@ pub struct VolatileRawUnlock {
     #[arg(long)]
     pub token: String,
 
-    /// Reset duration when switching the LC TAP straps.
-    #[arg(long, value_parser = parse_duration, default_value = "100ms")]
-    pub reset_delay: Duration,
-
     #[command(flatten)]
     pub jtag_params: JtagParams,
 }
@@ -454,10 +437,10 @@ impl CommandDispatch for VolatileRawUnlock {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Set the TAP straps for the lifecycle controller and reset.
         transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-        transport.reset_target(self.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
 
         // Spawn an OpenOCD process and connect to the LC JTAG TAP.
         let mut jtag = self
diff --git a/sw/host/opentitantool/src/command/load_bitstream.rs b/sw/host/opentitantool/src/command/load_bitstream.rs
index cf876231a4584..3c443e5ffa580 100644
--- a/sw/host/opentitantool/src/command/load_bitstream.rs
+++ b/sw/host/opentitantool/src/command/load_bitstream.rs
@@ -4,7 +4,6 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs;
 use std::path::PathBuf;
@@ -33,7 +32,7 @@ impl CommandDispatch for LoadBitstream {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         log::info!("Loading bitstream: {:?}", self.filename);
         let bitstream = fs::read(&self.filename)?;
         let progress = StagedProgressBar::new();
diff --git a/sw/host/opentitantool/src/command/mod.rs b/sw/host/opentitantool/src/command/mod.rs
index 8452c37d96c49..d57d3b3d00998 100644
--- a/sw/host/opentitantool/src/command/mod.rs
+++ b/sw/host/opentitantool/src/command/mod.rs
@@ -2,6 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+pub mod bfv;
 pub mod bootstrap;
 pub mod certificate;
 pub mod clear_bitstream;
@@ -26,18 +27,19 @@ pub mod spx;
 pub mod status_cmd;
 pub mod tpm;
 pub mod transport;
+pub mod uart;
 pub mod update_usr_access;
 pub mod version;
 pub mod xmodem;
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
+
 use std::any::Any;
 use std::time::Duration;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 
 #[derive(Debug, Args)]
 /// No Operation.
@@ -58,7 +60,7 @@ impl CommandDispatch for NoOp {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         if let Some(d) = self.delay {
             std::thread::sleep(d);
         }
diff --git a/sw/host/opentitantool/src/command/otp.rs b/sw/host/opentitantool/src/command/otp.rs
index 2d2ffd5811c51..a53ce50bd7c7a 100644
--- a/sw/host/opentitantool/src/command/otp.rs
+++ b/sw/host/opentitantool/src/command/otp.rs
@@ -2,19 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use anyhow::Result;
+use clap::{Args, Subcommand};
+use serde_annotate::{Base, serialize};
 use std::any::Any;
 use std::fs::File;
 use std::io::Write;
 use std::path::PathBuf;
 
-use anyhow::Result;
-
-use serde_annotate::{serialize, Annotate, Base};
-
-use clap::{Args, Subcommand};
-
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::otp::alert_handler::AlertRegs;
 use opentitanlib::otp::lc_state::LcStateVal;
 use opentitanlib::otp::otp_img::{OtpImg, OtpImgItem, OtpImgPartition, OtpImgValue};
@@ -37,7 +34,7 @@ impl CommandDispatch for AlertDigest {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // From kErrorOk in ROM.
         const ERROR_OK: u32 = 0x739;
 
diff --git a/sw/host/opentitantool/src/command/ownership.rs b/sw/host/opentitantool/src/command/ownership.rs
index cd5cf2cc1238c..f62b6df28aebc 100644
--- a/sw/host/opentitantool/src/command/ownership.rs
+++ b/sw/host/opentitantool/src/command/ownership.rs
@@ -2,18 +2,23 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Result, anyhow, ensure};
 use clap::{Args, Subcommand, ValueEnum};
 use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs::{File, OpenOptions};
+use std::io::Write;
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::chip::helper::{OwnershipActivateParams, OwnershipUnlockParams};
-use opentitanlib::crypto::ecdsa::{EcdsaPrivateKey, EcdsaRawSignature};
-use opentitanlib::ownership::{OwnerBlock, TlvHeader};
+use opentitanlib::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey, EcdsaRawSignature};
+use opentitanlib::crypto::sha256::Sha256Digest;
+use opentitanlib::ownership::{
+    DetachedSignature, DetachedSignatureCommand, GlobalFlags, KeyMaterial, OwnerBlock,
+    OwnershipKeyAlg, TlvHeader,
+};
 
 #[derive(ValueEnum, Debug, Clone, Copy, PartialEq)]
 enum Format {
@@ -24,6 +29,8 @@ enum Format {
 
 #[derive(Debug, Args)]
 pub struct OwnershipConfigCommand {
+    #[arg(long, help = "Show header and reserved fields")]
+    debug: bool,
     #[arg(long, help = "Use the basic ownership block", conflicts_with = "input")]
     basic: bool,
     #[arg(
@@ -49,7 +56,8 @@ impl CommandDispatch for OwnershipConfigCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        GlobalFlags::set_debug(self.debug);
         let mut config = if self.basic {
             OwnerBlock::basic()
         } else {
@@ -85,7 +93,11 @@ impl CommandDispatch for OwnershipConfigCommand {
         }
 
         if let Some(output) = &self.output {
-            let mut f = OpenOptions::new().write(true).create(true).open(output)?;
+            let mut f = OpenOptions::new()
+                .write(true)
+                .create(true)
+                .truncate(true)
+                .open(output)?;
             config.write(&mut f)?;
             Ok(None)
         } else {
@@ -98,6 +110,8 @@ impl CommandDispatch for OwnershipConfigCommand {
 pub struct OwnershipUnlockCommand {
     #[command(flatten)]
     params: OwnershipUnlockParams,
+    #[arg(short, long, help = "Filename to write the detached signature")]
+    detached: Option<PathBuf>,
     #[arg(short, long, help = "A file containing a binary unlock request")]
     input: Option<PathBuf>,
     #[arg(
@@ -112,8 +126,8 @@ impl CommandDispatch for OwnershipUnlockCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let unlock = self
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let (unlock, signature) = self
             .params
             .apply_to(self.input.as_ref().map(File::open).transpose()?.as_mut())?;
         if let Some(output) = &self.output {
@@ -122,8 +136,30 @@ impl CommandDispatch for OwnershipUnlockCommand {
                 .create(true)
                 .truncate(true)
                 .open(output)?;
+
             unlock.write(&mut f)?;
         }
+        if self.params.algorithm.is_detached() && signature.is_some() && self.detached.is_none() {
+            log::warn!(
+                "The algorithm {} requires a detached signature, but no detach signature file was specified.",
+                self.params.algorithm
+            );
+        }
+        if let Some(detached) = &self.detached {
+            ensure!(
+                signature.is_some(),
+                anyhow!(
+                    "Requested to save the detached signature, but there is no detached signature."
+                )
+            );
+            let mut f = OpenOptions::new()
+                .write(true)
+                .create(true)
+                .truncate(true)
+                .open(detached)?;
+            signature.unwrap().write(&mut f)?;
+        }
+
         Ok(Some(Box::new(unlock)))
     }
 }
@@ -132,6 +168,8 @@ impl CommandDispatch for OwnershipUnlockCommand {
 pub struct OwnershipActivateCommand {
     #[command(flatten)]
     params: OwnershipActivateParams,
+    #[arg(short, long, help = "Filename to write the detached signature")]
+    detached: Option<PathBuf>,
     #[arg(short, long, help = "A file containing a binary unlock request")]
     input: Option<PathBuf>,
     #[arg(
@@ -146,21 +184,168 @@ impl CommandDispatch for OwnershipActivateCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let activate = self
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let (activate, signature) = self
             .params
             .apply_to(self.input.as_ref().map(File::open).transpose()?.as_mut())?;
         if let Some(output) = &self.output {
-            let mut f = OpenOptions::new().write(true).create(true).open(output)?;
+            let mut f = OpenOptions::new()
+                .write(true)
+                .create(true)
+                .truncate(true)
+                .open(output)?;
             activate.write(&mut f)?;
         }
+        if self.params.algorithm.is_detached() && signature.is_some() && self.detached.is_none() {
+            log::warn!(
+                "The algorithm {} requires a detached signature, but no detach signature file was specified.",
+                self.params.algorithm
+            );
+        }
+        if let Some(detached) = &self.detached {
+            ensure!(
+                signature.is_some(),
+                anyhow!(
+                    "Requested to save the detached signature, but there is no detached signature."
+                )
+            );
+            let mut f = OpenOptions::new()
+                .write(true)
+                .create(true)
+                .truncate(true)
+                .open(detached)?;
+            signature.unwrap().write(&mut f)?;
+        }
         Ok(Some(Box::new(activate)))
     }
 }
 
+#[derive(Debug, Args)]
+pub struct OwnershipVerifyCommand {
+    #[arg(help = "A file containing a binary ownership config block")]
+    input: PathBuf,
+    #[arg(
+        short,
+        long,
+        help = "File containing the public key to verfify against"
+    )]
+    signer_pub_key: Option<PathBuf>,
+}
+
+impl CommandDispatch for OwnershipVerifyCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let input = std::fs::read(&self.input)?;
+        let mut cursor = std::io::Cursor::new(&input);
+        let header = TlvHeader::read(&mut cursor)?;
+        let parsed_config = OwnerBlock::read(&mut cursor, header)?;
+
+        match parsed_config.ownership_key_alg {
+            OwnershipKeyAlg::EcdsaP256 => (),
+            _ => {
+                return Err(anyhow!(
+                    "The only supported verification algorithm is ECDSA"
+                ));
+            }
+        };
+
+        let ecdsa_key: EcdsaPublicKey = if let Some(key_file) = &self.signer_pub_key {
+            EcdsaPublicKey::load(key_file)?
+        } else {
+            // Retrieve the ECDSA key.
+            let pubk = match parsed_config.owner_key {
+                KeyMaterial::Ecdsa(ref raw_key) => raw_key,
+                _ => return Err(anyhow!("Owner key material does not match key algorithm!")),
+            };
+            pubk.try_into()?
+        };
+        // Digest over the TBS section of the config.
+        let digest = Sha256Digest::hash(&input[..OwnerBlock::SIGNATURE_OFFSET]);
+
+        ecdsa_key.verify(&digest, &parsed_config.signature)?;
+        Ok(None)
+    }
+}
+
+/// Compute digest command.
+#[derive(Debug, Args)]
+pub struct OwnershipDigestCommand {
+    #[arg(help = "binary ownership config block")]
+    input: PathBuf,
+    /// Filename for an output bin file.
+    #[arg(short, long)]
+    bin: Option<PathBuf>,
+}
+
+/// Response format for the digest command.
+#[derive(serde::Serialize, Annotate)]
+pub struct OwnershipDigestResponse {
+    #[annotate(comment = "SHA256 Digest excluding the signature and seal bytes", format = hexstr)]
+    pub digest: Sha256Digest,
+}
+
+impl CommandDispatch for OwnershipDigestCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let input = std::fs::read(&self.input)?;
+        let digest = Sha256Digest::hash(&input[..OwnerBlock::SIGNATURE_OFFSET]);
+
+        if let Some(bin) = &self.bin {
+            let mut file = File::create(bin)?;
+            file.write_all(digest.as_ref())?;
+        }
+        Ok(Some(Box::new(OwnershipDigestResponse { digest })))
+    }
+}
+
+#[derive(Debug, Args)]
+pub struct OwnershipDetachedSignatureCommand {
+    #[arg(short, long)]
+    command: DetachedSignatureCommand,
+    #[arg(long)]
+    key_alg: OwnershipKeyAlg,
+    #[arg(short, long)]
+    nonce: u64,
+    #[arg(long)]
+    ecdsa_sig: Option<PathBuf>,
+    #[arg(long)]
+    spx_sig: Option<PathBuf>,
+    /// Filename for an output detached signature bin file.
+    output: PathBuf,
+}
+
+impl CommandDispatch for OwnershipDetachedSignatureCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        _transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let detatch_sig = DetachedSignature::from_raw_signatures(
+            self.command.into(),
+            self.key_alg,
+            self.nonce,
+            self.ecdsa_sig.as_deref(),
+            self.spx_sig.as_deref(),
+        )?;
+
+        let mut file = File::create(&self.output)?;
+        detatch_sig.write(&mut file)?;
+        Ok(None)
+    }
+}
+
 #[derive(Debug, Subcommand, CommandDispatch)]
 pub enum OwnershipCommand {
     Config(OwnershipConfigCommand),
     Activate(OwnershipActivateCommand),
     Unlock(OwnershipUnlockCommand),
+    Verify(OwnershipVerifyCommand),
+    Digest(OwnershipDigestCommand),
+    DetachedSignature(OwnershipDetachedSignatureCommand),
 }
diff --git a/sw/host/opentitantool/src/command/rescue.rs b/sw/host/opentitantool/src/command/rescue.rs
index 8500c97b491ac..ca792c9d1cd3f 100644
--- a/sw/host/opentitantool/src/command/rescue.rs
+++ b/sw/host/opentitantool/src/command/rescue.rs
@@ -2,22 +2,21 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::{Args, Subcommand};
-use opentitanlib::io::uart::UartParams;
 use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs::File;
 use std::path::PathBuf;
-use std::rc::Rc;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::chip::boot_svc::BootSlot;
 use opentitanlib::chip::helper::{OwnershipActivateParams, OwnershipUnlockParams};
 use opentitanlib::image::image::Image;
 use opentitanlib::image::manifest::ManifestKind;
-use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::ownership::{OwnerBlock, TlvHeader};
+use opentitanlib::rescue::{EntryMode, RescueMode, RescueParams};
 use opentitanlib::util::file::FromReader;
 use opentitanlib::util::parse_int::ParseInt;
 
@@ -30,8 +29,6 @@ pub struct RawBytes(
 
 #[derive(Debug, Args)]
 pub struct Firmware {
-    #[command(flatten)]
-    params: UartParams,
     #[arg(long, help = "After connecting to rescue, negotiate faster baudrate")]
     rate: Option<u32>,
     #[arg(long, default_value = "SlotA", help = "Which flash slot to rescue")]
@@ -40,12 +37,15 @@ pub struct Firmware {
     offset: Option<usize>,
     #[arg(long, default_value_t = false, help = "Upload the file contents as-is")]
     raw: bool,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
     #[arg(
         long,
-        default_value_t = false,
-        help = "Wait after upload (no automatic reboot)"
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
     )]
-    wait: bool,
+    reset_target: EntryMode,
     #[arg(value_name = "FILE")]
     filename: PathBuf,
 }
@@ -53,9 +53,9 @@ pub struct Firmware {
 impl CommandDispatch for Firmware {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let image = Image::read_from_file(&self.filename)?;
         let payload = if self.raw {
             image.bytes()
@@ -70,28 +70,26 @@ impl CommandDispatch for Firmware {
                 .ok_or_else(|| anyhow!("No application image in {:?}", self.filename))?;
             log::info!("Found application image at offset {:#x}", subimage.offset);
             if self.slot != BootSlot::SlotA && self.offset.is_none() {
-                log::warn!("Rescuing to {} may produce unexpected results.  Use `--offset` to select the desired application image.", self.slot);
+                log::warn!(
+                    "Rescuing to {} may produce unexpected results.  Use `--offset` to select the desired application image.",
+                    self.slot
+                );
             }
             subimage.data
         };
-        let uart = self.params.create(transport)?;
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
         let mut prev_baudrate = 0u32;
-        let rescue = RescueSerial::new(Rc::clone(&uart));
-        rescue.enter(transport)?;
+        rescue.enter(transport, self.reset_target)?;
         if let Some(rate) = self.rate {
-            prev_baudrate = uart.get_baudrate()?;
-            rescue.set_baud(rate)?;
-        }
-        if self.wait {
-            rescue.wait()?;
+            prev_baudrate = rescue.set_speed(rate)?;
         }
         rescue.update_firmware(self.slot, payload)?;
         if self.rate.is_some() {
-            if self.wait {
-                rescue.set_baud(prev_baudrate)?;
-            } else {
-                uart.set_baudrate(prev_baudrate)?;
-            }
+            rescue.set_speed(prev_baudrate)?;
+        }
+        if self.reboot {
+            rescue.reboot()?;
         }
         Ok(None)
     }
@@ -99,8 +97,15 @@ impl CommandDispatch for Firmware {
 
 #[derive(Debug, Args)]
 pub struct GetBootLog {
-    #[command(flatten)]
-    params: UartParams,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
     #[arg(long, short, default_value = "false")]
     raw: bool,
 }
@@ -108,26 +113,37 @@ pub struct GetBootLog {
 impl CommandDispatch for GetBootLog {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
-        if self.raw {
-            let data = rescue.get_boot_log_raw()?;
-            Ok(Some(Box::new(RawBytes(data))))
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        let result: Box<dyn erased_serde::Serialize> = if self.raw {
+            let data = rescue.get_raw(RescueMode::BootLog)?;
+            Box::new(RawBytes(data))
         } else {
             let data = rescue.get_boot_log()?;
-            Ok(Some(Box::new(data)))
+            Box::new(data)
+        };
+        if self.reboot {
+            rescue.reboot()?;
         }
+        Ok(Some(result))
     }
 }
 
 #[derive(Debug, Args)]
 pub struct GetBootSvc {
-    #[command(flatten)]
-    params: UartParams,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
     #[arg(long, short, default_value = "false")]
     raw: bool,
 }
@@ -135,70 +151,140 @@ pub struct GetBootSvc {
 impl CommandDispatch for GetBootSvc {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
-        if self.raw {
-            let data = rescue.get_boot_svc_raw()?;
-            Ok(Some(Box::new(RawBytes(data))))
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        let result: Box<dyn erased_serde::Serialize> = if self.raw {
+            let data = rescue.get_raw(RescueMode::BootSvcRsp)?;
+            Box::new(RawBytes(data))
         } else {
             let data = rescue.get_boot_svc()?;
-            Ok(Some(Box::new(data)))
+            Box::new(data)
+        };
+        if self.reboot {
+            rescue.reboot()?;
         }
+        Ok(Some(result))
     }
 }
 
 #[derive(Debug, Args)]
-pub struct SetNextBl0Slot {
-    #[command(flatten)]
-    params: UartParams,
-    #[arg(default_value = "SlotA")]
-    slot: BootSlot,
+pub struct GetDeviceId {
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(long, short, default_value = "false")]
+    raw: bool,
 }
 
-impl CommandDispatch for SetNextBl0Slot {
+impl CommandDispatch for GetDeviceId {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
-        rescue.set_next_bl0_slot(self.slot)?;
-        Ok(None)
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        let result: Box<dyn erased_serde::Serialize> = if self.raw {
+            let data = rescue.get_raw(RescueMode::DeviceId)?;
+            Box::new(RawBytes(data))
+        } else {
+            let data = rescue.get_device_id()?;
+            Box::new(data)
+        };
+        if self.reboot {
+            rescue.reboot()?;
+        }
+        Ok(Some(result))
     }
 }
 
 #[derive(Debug, Args)]
-pub struct SetPrimaryBl0Slot {
-    #[command(flatten)]
-    params: UartParams,
-    #[arg(default_value = "SlotA")]
-    slot: BootSlot,
+pub struct SetNextBl0Slot {
+    #[arg(
+        long,
+        short,
+        default_value = "Unspecified",
+        help = "Set the primary boot slot"
+    )]
+    primary: BootSlot,
+    #[arg(
+        long,
+        short,
+        default_value = "Unspecified",
+        help = "Set the one-time next boot slot"
+    )]
+    next: BootSlot,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(
+        long,
+        default_value_t = true,
+        action = clap::ArgAction::Set,
+        help = "Get the response from the target"
+    )]
+    get_response: bool,
 }
 
-impl CommandDispatch for SetPrimaryBl0Slot {
+impl CommandDispatch for SetNextBl0Slot {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
-        rescue.set_primary_bl0_slot(self.slot)?;
-        Ok(None)
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        rescue.set_next_bl0_slot(self.primary, self.next)?;
+        let result = if self.get_response {
+            rescue.enter(transport, EntryMode::Reboot)?;
+            let response = rescue.get_boot_svc()?;
+            Some(Box::new(response) as Box<dyn erased_serde::Serialize>)
+        } else {
+            None
+        };
+        if self.reboot {
+            rescue.reboot()?;
+        }
+        Ok(result)
     }
 }
 
 #[derive(Debug, Args)]
 pub struct OwnershipUnlock {
-    #[command(flatten)]
-    params: UartParams,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(
+        long,
+        default_value_t = true,
+        action = clap::ArgAction::Set,
+        help = "Get the response from the target"
+    )]
+    get_response: bool,
     #[command(flatten)]
     unlock: OwnershipUnlockParams,
     #[arg(short, long, help = "A file containing a binary unlock request")]
@@ -208,25 +294,55 @@ pub struct OwnershipUnlock {
 impl CommandDispatch for OwnershipUnlock {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let unlock = self
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let (unlock, signature) = self
             .unlock
             .apply_to(self.input.as_ref().map(File::open).transpose()?.as_mut())?;
 
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
+        if self.unlock.algorithm.is_detached() && signature.is_some() {
+            log::warn!(
+                "The algorithm {} requires a detached signature, but rescue cannot deliver the detached signature as part of boot services.",
+                self.unlock.algorithm
+            );
+        }
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
         rescue.ownership_unlock(unlock)?;
-        Ok(None)
+        let result = if self.get_response {
+            rescue.enter(transport, EntryMode::Reboot)?;
+            let response = rescue.get_boot_svc()?;
+            Some(Box::new(response) as Box<dyn erased_serde::Serialize>)
+        } else {
+            None
+        };
+        if self.reboot {
+            rescue.reboot()?;
+        }
+        Ok(result)
     }
 }
 
 #[derive(Debug, Args)]
 pub struct OwnershipActivate {
-    #[command(flatten)]
-    params: UartParams,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(
+        long,
+        default_value_t = true,
+        action = clap::ArgAction::Set,
+        help = "Get the response from the target"
+    )]
+    get_response: bool,
     #[command(flatten)]
     activate: OwnershipActivateParams,
     #[arg(short, long, help = "A file containing a binary activate request")]
@@ -236,25 +352,48 @@ pub struct OwnershipActivate {
 impl CommandDispatch for OwnershipActivate {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let activate = self
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let (activate, signature) = self
             .activate
             .apply_to(self.input.as_ref().map(File::open).transpose()?.as_mut())?;
 
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
+        if self.activate.algorithm.is_detached() && signature.is_some() {
+            log::warn!(
+                "The algorithm {} requires a detached signature, but rescue cannot deliver the detached signature as part of boot services.",
+                self.activate.algorithm
+            );
+        }
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
         rescue.ownership_activate(activate)?;
-        Ok(None)
+        let result = if self.get_response {
+            rescue.enter(transport, EntryMode::Reboot)?;
+            let response = rescue.get_boot_svc()?;
+            Some(Box::new(response) as Box<dyn erased_serde::Serialize>)
+        } else {
+            None
+        };
+        if self.reboot {
+            rescue.reboot()?;
+        }
+        Ok(result)
     }
 }
 
 #[derive(Debug, Args)]
 pub struct SetOwnerConfig {
-    #[command(flatten)]
-    params: UartParams,
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
     #[arg(help = "A signed owner configuration block")]
     input: PathBuf,
 }
@@ -262,32 +401,179 @@ pub struct SetOwnerConfig {
 impl CommandDispatch for SetOwnerConfig {
     fn run(
         &self,
-        _context: &dyn Any,
+        context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let data = std::fs::read(&self.input)?;
-        let uart = self.params.create(transport)?;
-        let rescue = RescueSerial::new(uart);
-        rescue.enter(transport)?;
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
         rescue.set_owner_config(&data)?;
+        if self.reboot {
+            rescue.reboot()?;
+        }
         Ok(None)
     }
 }
 
+#[derive(Debug, Args)]
+pub struct GetOwnerConfig {
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(long, short, default_value = "false", conflicts_with = "output")]
+    raw: bool,
+    #[arg(long, short, default_value = "0", help = "Owner page number")]
+    page: u32,
+    #[arg(
+        short,
+        long,
+        conflicts_with = "raw",
+        help = "Write the binary form to a file"
+    )]
+    output: Option<PathBuf>,
+}
+
+impl CommandDispatch for GetOwnerConfig {
+    fn run(
+        &self,
+        context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let page = match self.page {
+            0 => RescueMode::GetOwnerPage0,
+            1 => RescueMode::GetOwnerPage1,
+            _ => return Err(anyhow!("Unsupported page {}", self.page)),
+        };
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        let data = rescue.get_raw(page)?;
+        let result = if let Some(output) = &self.output {
+            std::fs::write(output, &data)?;
+            None
+        } else if self.raw {
+            Some(Box::new(RawBytes(data)) as Box<dyn erased_serde::Serialize>)
+        } else {
+            let mut cursor = std::io::Cursor::new(&data);
+            let header = TlvHeader::read(&mut cursor)?;
+            Some(Box::new(OwnerBlock::read(&mut cursor, header)?)
+                as Box<dyn erased_serde::Serialize>)
+        };
+        if self.reboot {
+            rescue.reboot()?;
+        }
+        Ok(result)
+    }
+}
+
+#[derive(Debug, Args)]
+/// Rescue No-op.
+pub struct NoOp {
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+}
+
+impl CommandDispatch for NoOp {
+    fn run(
+        &self,
+        context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<RescueCommand>().unwrap();
+        let rescue = context.params.create(transport)?;
+        rescue.enter(transport, self.reset_target)?;
+        Ok(None)
+    }
+}
+
+#[derive(Debug, Args)]
+pub struct EraseOwner {
+    #[arg(
+        long,
+        value_enum,
+        default_value_t = EntryMode::Reset,
+        help = "Method to reset for rescue mode",
+    )]
+    reset_target: EntryMode,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Reboot after the rescue command")]
+    reboot: bool,
+    #[arg(long, default_value_t = false, help = "Really erase the owner config")]
+    really: bool,
+}
+
+impl CommandDispatch for EraseOwner {
+    fn run(
+        &self,
+        context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        if self.really {
+            let context = context.downcast_ref::<RescueCommand>().unwrap();
+            let rescue = context.params.create(transport)?;
+            rescue.enter(transport, self.reset_target)?;
+            rescue.erase_owner()?;
+            if self.reboot {
+                rescue.reboot()?;
+            }
+            Ok(None)
+        } else {
+            Err(anyhow!(
+                "The owner may only be erased on DEV lifecycle-state chips with a ROM_EXT configured to permit owner erasing.\n\nUse the `--really` flag to send the command."
+            ))
+        }
+    }
+}
+
 #[derive(Debug, Subcommand, CommandDispatch)]
-pub enum BootSvc {
+pub enum BootSvcCommand {
     Get(GetBootSvc),
     SetNextBl0Slot(SetNextBl0Slot),
-    SetPrimaryBl0Slot(SetPrimaryBl0Slot),
     OwnershipUnlock(OwnershipUnlock),
     OwnershipActivate(OwnershipActivate),
 }
 
 #[derive(Debug, Subcommand, CommandDispatch)]
-pub enum RescueCommand {
+pub enum InternalRescueCommand {
     #[command(subcommand)]
-    BootSvc(BootSvc),
+    BootSvc(BootSvcCommand),
+    EraseOwner(EraseOwner),
     GetBootLog(GetBootLog),
+    GetDeviceId(GetDeviceId),
     Firmware(Firmware),
     SetOwnerConfig(SetOwnerConfig),
+    GetOwnerConfig(GetOwnerConfig),
+    NoOp(NoOp),
+}
+
+#[derive(Debug, Args)]
+pub struct RescueCommand {
+    #[command(flatten)]
+    params: RescueParams,
+
+    #[command(subcommand)]
+    command: InternalRescueCommand,
+}
+
+impl CommandDispatch for RescueCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        // None of the SPI commands care about the prior context, but they do
+        // care about the `bus` parameter in the current node.
+        self.command.run(self, transport)
+    }
 }
diff --git a/sw/host/opentitantool/src/command/rsa.rs b/sw/host/opentitantool/src/command/rsa.rs
index 95ae5b31b58c6..b72122e1253be 100644
--- a/sw/host/opentitantool/src/command/rsa.rs
+++ b/sw/host/opentitantool/src/command/rsa.rs
@@ -2,19 +2,19 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::{Args, Subcommand};
 use regex::Regex;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs::File;
 use std::io::Write;
 use std::path::PathBuf;
+use std::str::FromStr;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::crypto::rsa::{
-    Exponent, Modulus, N0Inv, RsaPrivateKey, RsaPublicKey, Signature, RR,
+    Exponent, Modulus, N0Inv, RR, RsaPrivateKey, RsaPublicKey, Signature,
 };
 use opentitanlib::crypto::sha256::Sha256Digest;
 use opentitanlib::util::parse_int::ParseInt;
@@ -65,7 +65,7 @@ impl CommandDispatch for RsaKeyShowCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = load_pub_or_priv_key(&self.der_file)?;
 
         Ok(Some(Box::new(RsaKeyInfo {
@@ -94,7 +94,7 @@ impl CommandDispatch for RsaKeyGenerateCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let private_key = RsaPrivateKey::new()?;
         let mut der_file = self.output_dir.to_owned();
         der_file.push(&self.basename);
@@ -179,7 +179,7 @@ impl CommandDispatch for RsaKeyExportCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = load_pub_or_priv_key(&self.der_file)?;
 
         let output_path = match &self.output_file {
@@ -196,7 +196,9 @@ impl CommandDispatch for RsaKeyExportCommand {
         // which would overwrite it. This will not detect situations where there is a symlink
         // involved so this will only catch "obvious" mistakes.
         if self.der_file == output_path {
-            bail!("the output file is the same as the key file, this would overwrite the key, not allowing this")
+            bail!(
+                "the output file is the same as the key file, this would overwrite the key, not allowing this"
+            )
         }
         println!("exporting key to {}", output_path.display());
 
@@ -250,7 +252,7 @@ pub enum RsaKeySubcommands {
 
 #[derive(serde::Serialize)]
 pub struct RsaSignResult {
-    pub digest: String,
+    pub digest: Sha256Digest,
     pub signature: String,
 }
 
@@ -280,19 +282,19 @@ impl CommandDispatch for RsaSignCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let digest = if let Some(input) = &self.input {
             let bytes = std::fs::read(input)?;
-            Sha256Digest::from_le_bytes(bytes)?
+            Sha256Digest::try_from(bytes.as_slice())?
         } else {
-            self.digest.clone().unwrap()
+            self.digest.unwrap()
         };
         let signature = self.private_key.sign(&digest)?;
         if let Some(output) = &self.output {
             signature.write_to_file(output)?;
         }
         Ok(Some(Box::new(RsaSignResult {
-            digest: digest.to_string(),
+            digest,
             signature: signature.to_string(),
         })))
     }
@@ -315,7 +317,7 @@ impl CommandDispatch for RsaVerifyCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = RsaPublicKey::from_pkcs1_der_file(&self.der_file)?;
         let digest = Sha256Digest::from_str(&self.digest)?;
         let signature = Signature::from_str(&self.signature)?;
diff --git a/sw/host/opentitantool/src/command/sam3x.rs b/sw/host/opentitantool/src/command/sam3x.rs
index a7e66dfaa29bf..43481a24ad511 100644
--- a/sw/host/opentitantool/src/command/sam3x.rs
+++ b/sw/host/opentitantool/src/command/sam3x.rs
@@ -4,11 +4,10 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::transport::chip_whisperer;
 
 /// Resets the SAM3X chip on the Chip Whisperer FPGA board.
@@ -20,7 +19,7 @@ impl CommandDispatch for Reset {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         log::info!("Resetting the SAM3X chip");
         transport.dispatch(&chip_whisperer::ResetSam3x {})
     }
@@ -35,7 +34,7 @@ impl CommandDispatch for GetFwVersion {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.dispatch(&chip_whisperer::GetSam3xFwVersion {})
     }
 }
diff --git a/sw/host/opentitantool/src/command/set_pll.rs b/sw/host/opentitantool/src/command/set_pll.rs
index 98e42493e5a3a..cb6457af835ec 100644
--- a/sw/host/opentitantool/src/command/set_pll.rs
+++ b/sw/host/opentitantool/src/command/set_pll.rs
@@ -4,11 +4,10 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::transport::chip_whisperer;
 
 /// Program the CDCE906 PLL chip with defaults.
@@ -20,7 +19,7 @@ impl CommandDispatch for SetPll {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         log::info!("Programming the CDCE906 PLL chip with defaults");
         transport.dispatch(&chip_whisperer::SetPll {})
     }
diff --git a/sw/host/opentitantool/src/command/spi.rs b/sw/host/opentitantool/src/command/spi.rs
index 68111f429e63a..10be133118372 100644
--- a/sw/host/opentitantool/src/command/spi.rs
+++ b/sw/host/opentitantool/src/command/spi.rs
@@ -13,7 +13,7 @@ use std::time::Duration;
 
 use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::{StagedProgressBar, TransportWrapper};
-use opentitanlib::io::eeprom::{AddressMode, Transaction, MODE_111};
+use opentitanlib::io::eeprom::{AddressMode, MODE_111, Transaction};
 use opentitanlib::io::spi::{SpiParams, Transfer};
 use opentitanlib::spiflash::{EraseMode, ReadMode, SpiFlash};
 use opentitanlib::tpm;
@@ -38,7 +38,7 @@ impl CommandDispatch for SpiSfdp {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi = context.params.create(transport, "BOOTSTRAP")?;
@@ -80,7 +80,7 @@ impl CommandDispatch for SpiReadId {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi = context.params.create(transport, "BOOTSTRAP")?;
@@ -138,7 +138,7 @@ impl CommandDispatch for SpiRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi = context.params.create(transport, "BOOTSTRAP")?;
@@ -204,7 +204,7 @@ impl CommandDispatch for SpiErase {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi = context.params.create(transport, "BOOTSTRAP")?;
@@ -259,7 +259,7 @@ impl CommandDispatch for SpiProgram {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi = context.params.create(transport, "BOOTSTRAP")?;
@@ -292,7 +292,7 @@ impl CommandDispatch for SpiTpm {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let ready_pin = match &self.gsc_ready {
             Some(pin) => Some((transport.gpio_pin(pin)?, transport.gpio_monitoring()?)),
@@ -324,7 +324,7 @@ impl CommandDispatch for SpiRawRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi_bus = context.params.create(transport, "BOOTSTRAP")?;
@@ -349,7 +349,7 @@ impl CommandDispatch for SpiRawWrite {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi_bus = context.params.create(transport, "BOOTSTRAP")?;
@@ -375,7 +375,7 @@ impl CommandDispatch for SpiRawWriteRead {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi_bus = context.params.create(transport, "BOOTSTRAP")?;
@@ -403,7 +403,7 @@ impl CommandDispatch for SpiRawTransceive {
         &self,
         context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport.capabilities()?.request(Capability::SPI).ok()?;
         let context = context.downcast_ref::<SpiCommand>().unwrap();
         let spi_bus = context.params.create(transport, "BOOTSTRAP")?;
@@ -416,6 +416,31 @@ impl CommandDispatch for SpiRawTransceive {
     }
 }
 
+/// Produces output useful for separate invocation of `flashrom` connecting to a particular SPI
+/// bus alias.
+#[derive(Debug, Args)]
+pub struct SpiFlashromArgs {}
+
+#[derive(Debug, serde::Serialize)]
+pub struct SpiFlashromArgsResponse {
+    programmer: String,
+}
+
+impl CommandDispatch for SpiFlashromArgs {
+    fn run(
+        &self,
+        context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        transport.capabilities()?.request(Capability::SPI).ok()?;
+        let context = context.downcast_ref::<SpiCommand>().unwrap();
+        let spi_bus = context.params.create(transport, "BOOTSTRAP")?;
+        Ok(Some(Box::new(SpiFlashromArgsResponse {
+            programmer: spi_bus.get_flashrom_programmer()?,
+        })))
+    }
+}
+
 /// Commands for interacting with a SPI EEPROM.
 #[derive(Debug, Subcommand, CommandDispatch)]
 pub enum InternalSpiCommand {
@@ -429,6 +454,7 @@ pub enum InternalSpiCommand {
     RawWriteRead(SpiRawWriteRead),
     RawTransceive(SpiRawTransceive),
     Tpm(SpiTpm),
+    FlashromArgs(SpiFlashromArgs),
 }
 
 #[derive(Debug, Args)]
@@ -445,7 +471,7 @@ impl CommandDispatch for SpiCommand {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // None of the SPI commands care about the prior context, but they do
         // care about the `bus` parameter in the current node.
         self.command.run(self, transport)
diff --git a/sw/host/opentitantool/src/command/spx.rs b/sw/host/opentitantool/src/command/spx.rs
index 61868a55a05fe..4d0c4def03605 100644
--- a/sw/host/opentitantool/src/command/spx.rs
+++ b/sw/host/opentitantool/src/command/spx.rs
@@ -8,9 +8,11 @@ use serde_annotate::Annotate;
 use std::any::Any;
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
-use sphincsplus::{DecodeKey, EncodeKey, SphincsPlus, SpxDomain, SpxPublicKey, SpxSecretKey};
+use opentitanlib::app::command::CommandDispatch;
+use sphincsplus::{
+    DecodeKey, EncodeKey, SphincsPlus, SpxDomain, SpxPublicKey, SpxRawSignature, SpxSecretKey,
+};
 
 #[derive(Annotate, serde::Serialize)]
 pub struct SpxPublicKeyInfo {
@@ -34,7 +36,7 @@ impl CommandDispatch for SpxKeyShowCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let key = SpxPublicKey::read_pem_file(&self.key_file)?;
         let bytes = key.as_bytes();
 
@@ -82,7 +84,7 @@ impl CommandDispatch for SpxKeyGenerateCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let (private_key, public_key) = SpxSecretKey::new_keypair(self.algorithm)?;
         let mut file = self.output_dir.to_owned();
         file.push(&self.basename);
@@ -111,6 +113,9 @@ pub struct SpxSignResult {
 
 #[derive(Debug, Args)]
 pub struct SpxSignCommand {
+    /// Set to true if signing for a target that uses a byte-reversed representation of the hash.
+    #[arg(short='r', long, action = clap::ArgAction::Set, default_value = "false")]
+    spx_hash_reversal_bug: bool,
     /// The signature domain (Raw, Pure, PreHashedSha256)
     #[arg(long, default_value_t = SpxDomain::default())]
     domain: SpxDomain,
@@ -129,8 +134,11 @@ impl CommandDispatch for SpxSignCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let message = std::fs::read(&self.message)?;
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let mut message = std::fs::read(&self.message)?;
+        if self.spx_hash_reversal_bug {
+            message.reverse();
+        }
         let private_key = SpxSecretKey::read_pem_file(&self.private_key)?;
         let signature = private_key.sign(self.domain, &message)?;
         if let Some(output) = &self.output {
@@ -143,9 +151,15 @@ impl CommandDispatch for SpxSignCommand {
 
 #[derive(Debug, Args)]
 pub struct SpxVerifyCommand {
+    /// Set to true if verifying for a target that uses a byte-reversed representation of the hash.
+    #[arg(short='r', long, action = clap::ArgAction::Set, default_value = "false")]
+    spx_hash_reversal_bug: bool,
     /// The signature domain (Raw, Pure, PreHashedSha256)
     #[arg(long, default_value_t = SpxDomain::default())]
     domain: SpxDomain,
+    /// The signature algorithm (Shake128sSimple, Sha2128sSimple)
+    #[arg(long, default_value_t = SphincsPlus::Sha2128sSimple)]
+    spx_algorithm: SphincsPlus,
     /// The file containing the SPHINCS+ raw public key in PEM format.
     #[arg(value_name = "KEY")]
     public_key: PathBuf,
@@ -160,11 +174,14 @@ impl CommandDispatch for SpxVerifyCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
-        let message = std::fs::read(&self.message)?;
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let mut message = std::fs::read(&self.message)?;
+        if self.spx_hash_reversal_bug {
+            message.reverse();
+        }
         let public_key = SpxPublicKey::read_pem_file(&self.public_key)?;
-        let signature = std::fs::read(&self.signature)?;
-        public_key.verify(self.domain, &signature, &message)?;
+        let signature = SpxRawSignature::read_from_file(&self.signature, self.spx_algorithm)?;
+        public_key.verify(self.domain, signature.as_bytes(), &message)?;
         Ok(None)
     }
 }
diff --git a/sw/host/opentitantool/src/command/status_cmd.rs b/sw/host/opentitantool/src/command/status_cmd.rs
index 7293a357947b9..aab35615eca71 100644
--- a/sw/host/opentitantool/src/command/status_cmd.rs
+++ b/sw/host/opentitantool/src/command/status_cmd.rs
@@ -2,17 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use clap::{Args, Subcommand};
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::collections::{HashMap, HashSet};
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::util::parse_int::ParseInt;
-use opentitanlib::util::status::{load_elf, Status};
+use opentitanlib::util::status::{Status, load_elf};
 
 #[derive(Debug, Subcommand, CommandDispatch)]
 /// Commands for interacting with status.
@@ -41,11 +40,12 @@ struct ConsolidateRecord {
 }
 
 impl CommandDispatch for ListCommand {
+    #[allow(clippy::unwrap_or_default)] // or_default cannot be used due to type inference.
     fn run(
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let records = load_elf(&self.elf_file)?;
         if self.raw_records {
             return Ok(Some(Box::new(records)));
@@ -90,7 +90,7 @@ impl CommandDispatch for LintCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // We group filenames by Module ID, coming from all ELF files at once
         let mut mod_id_map: HashMap<String, HashSet<ModuleIdProvenance>> = HashMap::new();
 
@@ -104,7 +104,7 @@ impl CommandDispatch for LintCommand {
             for record in records.records {
                 mod_id_map
                     .entry(record.get_module_id()?)
-                    .or_insert_with(HashSet::new)
+                    .or_default()
                     .insert(ModuleIdProvenance {
                         filename: record.filename.into(),
                         overriden: record.module_id.is_some(),
@@ -155,7 +155,7 @@ impl CommandDispatch for DecodeCommand {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Decode status.
         let status = Status::from_u32(self.raw_status)?;
         // Find filenames
diff --git a/sw/host/opentitantool/src/command/tpm.rs b/sw/host/opentitantool/src/command/tpm.rs
index 9d226b5245392..7920228f57f70 100644
--- a/sw/host/opentitantool/src/command/tpm.rs
+++ b/sw/host/opentitantool/src/command/tpm.rs
@@ -2,14 +2,14 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::{Args, Subcommand};
 use serde::{Deserialize, Serialize};
 use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::tpm;
 
 /// Read the value of a given TPM register.
@@ -38,7 +38,7 @@ impl CommandDispatch for TpmReadRegister {
         &self,
         context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let tpm = context.downcast_ref::<Box<dyn tpm::Driver>>().unwrap();
         let length = self
             .length
@@ -102,7 +102,7 @@ impl CommandDispatch for TpmWriteRegister {
         &self,
         context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let tpm = context.downcast_ref::<Box<dyn tpm::Driver>>().unwrap();
         if let Some(hexdata) = &self.hexdata {
             tpm.write_register(self.register, &hex::decode(hexdata)?)?;
@@ -133,7 +133,7 @@ impl CommandDispatch for TpmExecuteCommand {
         &self,
         context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let tpm = context.downcast_ref::<Box<dyn tpm::Driver>>().unwrap();
         let resp = tpm.execute_command(&hex::decode(&self.hexdata)?)?;
         Ok(Some(Box::new(TpmExecuteCommandResponse {
diff --git a/sw/host/opentitantool/src/command/transport.rs b/sw/host/opentitantool/src/command/transport.rs
index 155bf945bea28..2dd352b956930 100644
--- a/sw/host/opentitantool/src/command/transport.rs
+++ b/sw/host/opentitantool/src/command/transport.rs
@@ -5,7 +5,6 @@
 use anyhow::Result;
 use clap::{Args, Subcommand};
 use regex::Regex;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::collections::HashMap;
 use std::fs;
@@ -15,10 +14,10 @@ use std::time::Duration;
 use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::{StagedProgressBar, TransportWrapper};
 use opentitanlib::io::jtag::JtagParams;
-use opentitanlib::transport::verilator::transport::Watch;
 use opentitanlib::transport::Capability;
 use opentitanlib::transport::SetJtagPins;
 use opentitanlib::transport::UpdateFirmware;
+use opentitanlib::transport::verilator::transport::Watch;
 
 /// Initialize state of a transport debugger device to fit the device under test.  This
 /// typically involves setting pins as input/output, open drain, etc. according to configuration
@@ -35,7 +34,7 @@ impl CommandDispatch for TransportInit {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         // Configure all GPIO pins to default direction and level, according to
         // configuration files provided, and configures SPI port mode/speed, etc.
         // Also apply an optional, named gpio strap while performing pin initialization.
@@ -61,7 +60,7 @@ impl CommandDispatch for TransportSetJtagPins {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         transport
             .capabilities()?
             .request(Capability::GPIO | Capability::JTAG)
@@ -97,7 +96,7 @@ impl CommandDispatch for TransportUpdateFirmware {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let firmware = match self.filename.as_ref() {
             Some(name) => Some(fs::read(name)?),
             None => None,
@@ -127,7 +126,7 @@ impl CommandDispatch for VerilatorWatch {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let watch = Watch {
             regex: Regex::new(&self.regex)?,
             timeout: self.timeout,
@@ -153,7 +152,7 @@ impl CommandDispatch for TransportQuery {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let value = transport.query_provides(&self.key)?;
         Ok(Some(Box::new(TransportQueryResult {
             key: self.key.clone(),
@@ -170,7 +169,7 @@ impl CommandDispatch for TransportQueryAll {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let value: HashMap<String, String> = transport.provides_map()?.clone();
         Ok(Some(Box::new(value)))
     }
diff --git a/sw/host/opentitantool/src/command/uart.rs b/sw/host/opentitantool/src/command/uart.rs
new file mode 100644
index 0000000000000..f8675958f9080
--- /dev/null
+++ b/sw/host/opentitantool/src/command/uart.rs
@@ -0,0 +1,62 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::{Args, Subcommand};
+use std::any::Any;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
+use opentitanlib::io::uart::UartParams;
+
+/// Outputs `"/dev/ttyUSBn"` or similar OS device path usable by external programs for directly
+/// accessing the given serial port of the debugger.
+#[derive(Debug, Args)]
+pub struct UartOsDevice {}
+
+#[derive(Debug, serde::Serialize)]
+pub struct UartOsDeviceResponse {
+    path: String,
+}
+
+impl CommandDispatch for UartOsDevice {
+    fn run(
+        &self,
+        context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        let context = context.downcast_ref::<UartCommand>().unwrap();
+        let uart = context.params.create(transport)?;
+        Ok(Some(Box::new(UartOsDeviceResponse {
+            path: uart.get_device_path()?,
+        })))
+    }
+}
+
+/// Commands for interacting with a UART.
+#[derive(Debug, Subcommand, CommandDispatch)]
+pub enum InternalUartCommand {
+    OsDevice(UartOsDevice),
+}
+
+#[derive(Debug, Args)]
+pub struct UartCommand {
+    #[command(flatten)]
+    params: UartParams,
+
+    #[command(subcommand)]
+    command: InternalUartCommand,
+}
+
+impl CommandDispatch for UartCommand {
+    fn run(
+        &self,
+        _context: &dyn Any,
+        transport: &TransportWrapper,
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
+        // None of the UART commands care about the prior context, but they do
+        // care about the `UartParams` parameter in the current node.
+        self.command.run(self, transport)
+    }
+}
diff --git a/sw/host/opentitantool/src/command/update_usr_access.rs b/sw/host/opentitantool/src/command/update_usr_access.rs
index 72dce9f02e34f..cfe5ac76ddefa 100644
--- a/sw/host/opentitantool/src/command/update_usr_access.rs
+++ b/sw/host/opentitantool/src/command/update_usr_access.rs
@@ -4,13 +4,12 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 use std::fs;
 use std::path::PathBuf;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::util::parse_int::ParseInt;
 use opentitanlib::util::usr_access::{usr_access_crc32, usr_access_set};
 
@@ -33,7 +32,7 @@ impl CommandDispatch for UpdateUsrAccess {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let mut bs = fs::read(&self.input)?;
 
         let usr_access_val = match self.usr_access {
diff --git a/sw/host/opentitantool/src/command/version.rs b/sw/host/opentitantool/src/command/version.rs
index 3913332f05632..072db262eb10d 100644
--- a/sw/host/opentitantool/src/command/version.rs
+++ b/sw/host/opentitantool/src/command/version.rs
@@ -4,11 +4,10 @@
 
 use anyhow::Result;
 use clap::Args;
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 
 #[derive(Debug, Args)]
 pub struct Version {}
@@ -47,7 +46,7 @@ impl CommandDispatch for Version {
         &self,
         _context: &dyn Any,
         _transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         Ok(Some(Box::<VersionResponse>::default()))
     }
 }
diff --git a/sw/host/opentitantool/src/command/xmodem.rs b/sw/host/opentitantool/src/command/xmodem.rs
index 3b9ecb50b035c..6c474b24ad953 100644
--- a/sw/host/opentitantool/src/command/xmodem.rs
+++ b/sw/host/opentitantool/src/command/xmodem.rs
@@ -5,11 +5,10 @@
 use anyhow::Result;
 use clap::{Args, Subcommand};
 use opentitanlib::io::uart::UartParams;
-use serde_annotate::Annotate;
 use std::any::Any;
 
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::rescue::xmodem::Xmodem;
 
 #[derive(Debug, Args)]
@@ -25,7 +24,7 @@ impl CommandDispatch for XmodemSend {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let payload = std::fs::read(&self.filename)?;
         let xmodem = Xmodem::new();
         let uart = self.params.create(transport)?;
@@ -48,7 +47,7 @@ impl CommandDispatch for XmodemRecv {
         &self,
         _context: &dyn Any,
         transport: &TransportWrapper,
-    ) -> Result<Option<Box<dyn Annotate>>> {
+    ) -> Result<Option<Box<dyn erased_serde::Serialize>>> {
         let uart = self.params.create(transport)?;
         uart.clear_rx_buffer()?;
         let xmodem = Xmodem::new();
diff --git a/sw/host/opentitantool/src/main.rs b/sw/host/opentitantool/src/main.rs
index 7588ec3256ceb..67033c6193a23 100644
--- a/sw/host/opentitantool/src/main.rs
+++ b/sw/host/opentitantool/src/main.rs
@@ -2,14 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-#![feature(min_specialization)]
 use anyhow::Result;
 use clap::{Parser, ValueEnum};
 use directories::ProjectDirs;
 use log::LevelFilter;
-use serde_annotate::Annotate;
 use serde_annotate::ColorProfile;
-use std::env::{args_os, ArgsOs};
+use std::env::{ArgsOs, args_os};
 use std::ffi::OsString;
 use std::io::ErrorKind;
 use std::io::IsTerminal;
@@ -18,13 +16,14 @@ use std::path::PathBuf;
 use std::str::FromStr;
 
 mod command;
-use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::command::CommandDispatch;
 use opentitanlib::backend;
 
 #[allow(clippy::large_enum_variant)]
 #[derive(Debug, Parser, CommandDispatch)]
 enum RootCommandHierarchy {
+    Bfv(command::bfv::BfvCommand),
     // Not flattened because `Bootstrap` is a leaf command.
     Bootstrap(command::bootstrap::BootstrapCommand),
     // Not flattened because `Console` is a leaf command.
@@ -49,7 +48,6 @@ enum RootCommandHierarchy {
     Otp(command::otp::Otp),
     #[command(subcommand)]
     Ownership(command::ownership::OwnershipCommand),
-    #[command(subcommand)]
     Rescue(command::rescue::RescueCommand),
     #[command(subcommand)]
     Rsa(command::rsa::Rsa),
@@ -58,6 +56,7 @@ enum RootCommandHierarchy {
     Spx(command::spx::Spx),
     #[command(subcommand)]
     Transport(command::transport::TransportCommand),
+    Uart(command::uart::UartCommand),
     Version(command::version::Version),
     #[command(subcommand)]
     Status(command::status_cmd::StatusCommand),
@@ -179,7 +178,10 @@ fn parse_command_line(opts: Opts, mut args: ArgsOs) -> Result<Opts> {
 
 // Print the result of a command.
 // If there is an error and `RUST_BACKTRACE=1`, print a backtrace.
-fn print_command_result(opts: &Opts, result: Result<Option<Box<dyn Annotate>>>) -> Result<()> {
+fn print_command_result(
+    opts: &Opts,
+    result: Result<Option<Box<dyn erased_serde::Serialize>>>,
+) -> Result<()> {
     match result {
         Ok(Some(value)) => {
             log::info!("Command result: success.");
diff --git a/sw/host/ot_certs/BUILD b/sw/host/ot_certs/BUILD
index bf864dc959a1b..7c27ead033798 100644
--- a/sw/host/ot_certs/BUILD
+++ b/sw/host/ot_certs/BUILD
@@ -30,7 +30,9 @@ rust_library(
         "src/asn1/dice_tcb.rs",
         "src/asn1/mod.rs",
         "src/asn1/x509.rs",
+        "src/cbor.rs",
         "src/codegen.rs",
+        "src/cwt.rs",
         "src/lib.rs",
         "src/template/mod.rs",
         "src/template/subst.rs",
@@ -44,10 +46,12 @@ rust_library(
     deps = [
         "@crate_index//:anyhow",
         "@crate_index//:asn1",
+        "@crate_index//:clap",
         "@crate_index//:deser-hjson",
         "@crate_index//:heck",
         "@crate_index//:hex",
         "@crate_index//:indexmap",
+        "@crate_index//:itertools",
         "@crate_index//:log",
         "@crate_index//:memchr",
         "@crate_index//:num-bigint-dig",
diff --git a/sw/host/ot_certs/README.md b/sw/host/ot_certs/README.md
index 33f8fed93a3c6..c585b36eb0d16 100644
--- a/sw/host/ot_certs/README.md
+++ b/sw/host/ot_certs/README.md
@@ -12,3 +12,29 @@ This crate will generate code capable of running on the device to get/set these
 fields.
 
 More detailed documentation on OpenTitan certificates will be published soon.
+
+
+### ASN1 Variable Typing
+
+The asn1 template supports four variable types: byte-array, string, integer, and
+boolean. Array types (byte-array, string, and integer) require the size in bytes
+of the value it represents to be specified.
+
+```javascript
+type: "integer", // or "string" or "byte-array"
+exact-size: 20, // or `range-size: [min, max]` if size could be variable
+```
+
+When the variable is an integer, the size is determined using its big-endian
+array representation without any additional zero prefixes.
+
+The byte-array can also be encoded as an integer. This requires the `tweak-msb`
+field to be set, and the builder will always set the MSb when encoding as an
+integer to ensure a fixed size encoding. If MSb tweak is not possible, please
+consider typing it as an integer instead.
+
+```javascript
+type: "byte-array",
+exact-size: 20, // or `range-size: [min, max]` if size could be variable
+[tweak-msb: true,] // if destination could be an integer
+```
diff --git a/sw/host/ot_certs/src/asn1/builder.rs b/sw/host/ot_certs/src/asn1/builder.rs
index f841b6e5db045..4f1ddb3b240eb 100644
--- a/sw/host/ot_certs/src/asn1/builder.rs
+++ b/sw/host/ot_certs/src/asn1/builder.rs
@@ -6,7 +6,7 @@
 //! document. The particularity of this trait is that the base values
 //! are of type `Value<T>` which can either be literals or variables.
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use num_bigint_dig::BigUint;
 
 use crate::asn1::{Oid, Tag};
@@ -72,7 +72,7 @@ pub trait Builder {
         &mut self,
         name_hint: Option<String>,
         tag: &Tag,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()>;
 
     /// Push a tagged octet string into the ASN1 output. The closure can use any available function of the builder
@@ -80,9 +80,9 @@ pub trait Builder {
     fn push_octet_string(
         &mut self,
         name_hint: Option<String>,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
-        self.push_tag(name_hint, &Tag::OctetString, |builder| gen(builder))
+        self.push_tag(name_hint, &Tag::OctetString, build)
     }
 
     /// Push a sequence into the ASN1 output. The closure can use any available function of the builder
@@ -90,9 +90,9 @@ pub trait Builder {
     fn push_seq(
         &mut self,
         name_hint: Option<String>,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
-        self.push_tag(name_hint, &Tag::Sequence, gen)
+        self.push_tag(name_hint, &Tag::Sequence, build)
     }
 
     /// Push a sequence into the ASN1 output. The closure can use any available function of the builder
@@ -100,9 +100,9 @@ pub trait Builder {
     fn push_set(
         &mut self,
         name_hint: Option<String>,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
-        self.push_tag(name_hint, &Tag::Set, gen)
+        self.push_tag(name_hint, &Tag::Set, build)
     }
 
     /// Push tagged content into the ASN1 output as a bitstring. The closure can use any available function of the builder
@@ -112,7 +112,7 @@ pub trait Builder {
         name_hint: Option<String>,
         tag: &Tag,
         unused_bits: usize,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
         self.push_tag(name_hint, tag, |builder| {
             ensure!(
@@ -120,7 +120,7 @@ pub trait Builder {
                 "unused bits value must be in the range 0 to 7"
             );
             builder.push_byte(unused_bits as u8)?;
-            gen(builder)
+            build(builder)
         })
     }
 
diff --git a/sw/host/ot_certs/src/asn1/codegen.rs b/sw/host/ot_certs/src/asn1/codegen.rs
index 627e0d258b2b9..62fd3f08392cf 100644
--- a/sw/host/ot_certs/src/asn1/codegen.rs
+++ b/sw/host/ot_certs/src/asn1/codegen.rs
@@ -2,51 +2,16 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Result};
-use heck::{ToSnakeCase, ToUpperCamelCase};
-use indexmap::IndexMap;
+use anyhow::{Result, bail, ensure};
+use itertools::Itertools;
 use num_bigint_dig::BigUint;
+use std::cmp::max;
 
 use crate::asn1::builder::Builder;
+use crate::asn1::der::Der;
 use crate::asn1::{Oid, Tag};
 use crate::template::{Conversion, Value, Variable, VariableType};
 
-struct ConstantEntry {
-    var_name: String,
-    c_decl: String,
-}
-
-/// Constant pool for code generation.
-#[derive(Default)]
-pub struct ConstantPool {
-    constants: IndexMap<Vec<u8>, ConstantEntry>,
-}
-
-impl ConstantPool {
-    pub fn new() -> ConstantPool {
-        ConstantPool {
-            constants: IndexMap::new(),
-        }
-    }
-
-    pub fn codestring(&self) -> String {
-        self.constants
-            .values()
-            .map(|x| x.c_decl.clone())
-            .collect::<Vec<_>>()
-            .join("")
-    }
-
-    pub fn get_var_name(&self, data: &Vec<u8>) -> Option<String> {
-        self.constants.get(data).map(|ent| ent.var_name.clone())
-    }
-
-    pub fn add_entry(&mut self, data: Vec<u8>, var_name: String, c_decl: String) {
-        self.constants
-            .insert(data, ConstantEntry { var_name, c_decl });
-    }
-}
-
 /// Information about how to refer to a variable in the code.
 #[derive(Debug, Clone)]
 pub enum VariableCodegenInfo {
@@ -58,7 +23,7 @@ pub enum VariableCodegenInfo {
         size_expr: String,
     },
     /// Variable is an integer.
-    Int32 {
+    Uint32 {
         // Expression generating the value.
         value_expr: String,
     },
@@ -78,113 +43,262 @@ pub struct VariableInfo {
     pub codegen: VariableCodegenInfo,
 }
 
+// Each CodegenStructure maps to a CodeOutput.
+type CodeOutput = Vec<CodeChunkWithComment>;
+
+#[derive(Debug, Clone)]
+struct CodeChunkWithComment {
+    code: CodeChunk,
+    comment: Option<String>,
+}
+
+#[derive(Clone, Debug, PartialEq, Eq)]
+enum CodeChunk {
+    // A code snippet.
+    Code(String),
+    // If all the arguments are constants, derive its resulting bytes directly.
+    ConstBytes(Vec<u8>),
+    // Patch the last two bytes with length delta.
+    SizePatchMemo(i16),
+    // Create a new nested block with left curly brace.
+    OpenBlock,
+    // Close a nested block. It should be paired with OpenBlock.
+    CloseBlock,
+}
+
+impl CodeChunk {
+    fn is_constant(&self) -> bool {
+        match self {
+            CodeChunk::Code(_) => false,
+            CodeChunk::ConstBytes(_) => true,
+            CodeChunk::SizePatchMemo(_) => true,
+            CodeChunk::OpenBlock => true,
+            CodeChunk::CloseBlock => true,
+        }
+    }
+    fn len(&self) -> usize {
+        match self {
+            CodeChunk::Code(_) => panic!("Variable has no size"),
+            CodeChunk::ConstBytes(x) => x.len(),
+            _ => 0,
+        }
+    }
+}
+
 /// ASN1 code generator.
 pub struct Codegen<'a> {
     /// Output buffer.
-    output: String,
-    /// Constant pool.
-    constants: &'a mut ConstantPool,
-    /// Indentation string.
-    indent: String,
-    /// Current indentation level.
-    indent_lvl: usize,
+    output: CodeOutput,
     /// Variable types: return information about a variable by name.
     variable_info: &'a dyn Fn(&str) -> Result<VariableInfo>,
-    /// Index of next tag (to guarantee unique names).
-    tag_idx: usize,
+    /// Minimum size of the output.
+    min_out_size: usize,
     /// Maximum size of the output.
     max_out_size: usize,
 }
 
+/// ASN1 code generator output.
+pub struct CodegenOutput {
+    /// Output code.
+    pub code: String,
+    /// Minimum size of the produced cert/TBS.
+    pub min_size: usize,
+    /// Maximum size of the produced cert/TBS.
+    pub max_size: usize,
+}
+
 impl Codegen<'_> {
     /// Generate code that corresponds to an ASN1 document described by a closure acting on a Builder.
-    /// Returns the generated code and the maximum possible size of the output.
+    /// Returns the generated code and the min/max possible size of the output.
     ///
     /// # Arguments
     ///
     /// * `buf_name` - Name of the variable holding the pointer to the output buffer.
     /// * `buf_size_name` - Name of the variable holding the size of the output buffer.
     ///   This variable is updated by the code to hold the actual size of the data after production.
-    /// * `indent` - Identation string (one level).
-    /// * `indent_lvl` - Initial identation level.
-    /// * `constants` - Constant pool used to create necessary constants for the code.
     /// * `variables` - Description of the variable types used when producing the output.
-    /// * `gen` - Closure generating the ASN1 document.
+    /// * `build` - Closure generating the ASN1 document.
     pub fn generate(
         buf_name: &str,
         buf_size_name: &str,
-        indent: &str,
-        indent_lvl: usize,
-        constants: &mut ConstantPool,
         variable_info: &dyn Fn(&str) -> Result<VariableInfo>,
-        gen: impl FnOnce(&mut Codegen) -> Result<()>,
-    ) -> Result<(String, usize)> {
+        build: impl FnOnce(&mut Codegen) -> Result<()>,
+    ) -> Result<CodegenOutput> {
         let mut builder = Codegen {
-            output: String::new(),
-            constants,
-            indent: indent.to_string(),
-            indent_lvl,
+            output: CodeOutput::new(),
             variable_info,
-            tag_idx: 0,
+            min_out_size: 0,
             max_out_size: 0,
         };
-        // Create an ASN1 state, start with the provided buffer and carry on with
-        // building the document with closure.
-        builder.push_str_with_indent("asn1_state_t state;\n");
-        builder.push_str_with_indent(&format!(
-            "RETURN_IF_ERROR(asn1_start(&state, {buf_name}, *{buf_size_name}));\n"
-        ));
-        gen(&mut builder)?;
-        // Finish the document and update the size variable.
-        builder.push_str_with_indent(&format!(
-            "RETURN_IF_ERROR(asn1_finish(&state, {buf_size_name}));\n"
-        ));
-        Ok((builder.output, builder.max_out_size))
-    }
+        build(&mut builder)?;
+
+        let mut output = String::new();
+        let mut const_bytes = Vec::<u8>::new();
+        let mut size_patches = Vec::<(usize, i16)>::new();
+
+        // For neighboring const chunks, we collect them into a single array and write them at once.
+        for (is_code, chunk) in &builder
+            .output
+            .iter()
+            .chunk_by(|inst| !inst.code.is_constant())
+        {
+            if !is_code {
+                let mut nbytes = 0;
+
+                for CodeChunkWithComment { code, comment } in chunk {
+                    nbytes += &code.len();
+                    match &code {
+                        CodeChunk::OpenBlock => output.push_str("{\n"),
+                        CodeChunk::CloseBlock => output.push_str("};\n"),
+                        CodeChunk::SizePatchMemo(delta) => {
+                            size_patches.push((const_bytes.len(), *delta));
+
+                            // The bytes in (nbytes-2..nbytes) will be patched.
+                            let patch_offset = nbytes - 2;
+                            output.push_str(&format!(
+                                "
+                                    /* Size patch with delta {delta} */
+                                    template_pos_t memo = template_save_pos(&state, {patch_offset});
+                                "
+                            ));
+                        }
+                        CodeChunk::ConstBytes(data) => {
+                            // Add comment about the const in-place.
+                            if let Some(comment) = &comment {
+                                output.push_str(&format!("/* {comment} */\n"));
+                            }
+
+                            // But collect the actual bytes to the shared pool.
+                            if !data.is_empty() {
+                                const_bytes.extend(data);
+                                let data = data.iter().map(|ch| format!("0x{:02x}", ch)).join(", ");
+                                output.push_str(&format!("/*   {data} */\n"));
+                            }
+                        }
+                        _ => unreachable!(),
+                    }
+                }
+
+                // Output the combined const segment.
+                if nbytes > 0 {
+                    output.push_str(&format!(
+                        "template_push_const(&state, /*nbytes=*/{nbytes});\n"
+                    ));
+                }
+            } else {
+                /* is_code == true */
+                for CodeChunkWithComment { code, comment } in chunk {
+                    if let Some(comment) = comment {
+                        output.push_str(&format!("/* {comment} */\n"));
+                    }
+                    match &code {
+                        CodeChunk::Code(inner) => output.push_str(inner),
+                        _ => unreachable!(),
+                    }
+                }
+            }
+        }
 
-    /// Push indentation into the output buffer.
-    fn push_indent(&mut self) {
-        let indent = self.indent.to_string();
-        for _ in 0..self.indent_lvl {
-            self.push_str(&indent);
+        // Apply the size delta to the pregenerated const bytes in the reversed order.
+        for (idx, value) in size_patches.iter().rev() {
+            let patch_point = &mut const_bytes[idx - 2..*idx];
+            let old_value = u16::from_be_bytes(patch_point.try_into().unwrap());
+            let new_value = old_value.wrapping_add_signed(*value);
+            patch_point.copy_from_slice(&new_value.to_be_bytes());
         }
+
+        let const_bytes = const_bytes
+            .iter()
+            .map(|ch| format!("0x{:02x}", ch))
+            .join(", ");
+        let max_size = builder.max_out_size;
+        output = format!(
+            "
+                if (*{buf_size_name} < {max_size}) {{
+                    return kErrorCertInvalidSize;
+                }}
+
+                const static uint8_t kTemplateConstBytes[] = {{{const_bytes}}};
+                template_state_t state;
+
+                template_init(&state, {buf_name}, kTemplateConstBytes);
+
+                {output}
+
+                *{buf_size_name} = template_finalize(&state);
+            "
+        );
+
+        Ok(CodegenOutput {
+            code: output,
+            min_size: builder.min_out_size,
+            max_size: builder.max_out_size,
+        })
     }
 
-    /// Push raw string into the output buffer.
-    fn push_str(&mut self, s: &str) {
-        self.output.push_str(s);
+    /// Push a chunk to the output stream.
+    fn push_chunk(&mut self, code: CodeChunk, comment: Option<String>) {
+        self.output.push(CodeChunkWithComment { code, comment });
     }
 
-    /// Push raw string with indentation into the output buffer.
-    fn push_str_with_indent(&mut self, s: &str) {
-        self.push_indent();
-        self.push_str(s);
+    /// Start a new nested block in the output stream.
+    /// It should be paired with an `unindent()` call.
+    fn indent(&mut self) {
+        self.push_chunk(CodeChunk::OpenBlock, None);
     }
 
-    /// Register a constant byte array.
-    fn add_constant_byte_array(&mut self, name_hint: Option<String>, data: &[u8]) -> String {
-        // If constant already exist, do not recreate it
-        if let Some(name) = self.constants.get_var_name(&data.to_vec()) {
-            return name;
-        }
+    /// Close one level of nested block.
+    /// It should be paired with an `indent()` call.
+    fn unindent(&mut self) {
+        self.push_chunk(CodeChunk::CloseBlock, None);
+    }
 
-        let const_name = format!(
-            "kConstant{}",
-            name_hint
-                .map(|x| x.to_upper_camel_case())
-                .unwrap_or("".into())
-        );
-        let bytes = data
-            .iter()
-            .map(|b| format!("{:#04x}", b))
-            .collect::<Vec<_>>()
-            .join(", ");
-        self.constants.add_entry(
-            data.to_vec(),
-            const_name.clone(),
-            format!("static const uint8_t {const_name}[] = {{ {} }};\n", bytes),
+    /// Push raw const bytes into the output stream.
+    fn push_const(&mut self, comment: Option<String>, value: &[u8]) {
+        self.min_out_size += value.len();
+        self.max_out_size += value.len();
+        self.push_chunk(CodeChunk::ConstBytes(value.to_owned()), comment);
+    }
+
+    /// Push a constified DER built by the `build` function.
+    fn push_der(
+        &mut self,
+        comment: Option<String>,
+        build: impl FnOnce(&mut Der) -> Result<()>,
+    ) -> Result<()> {
+        let content = Der::generate(build)?;
+        self.push_const(comment, &content);
+        Ok(())
+    }
+
+    /// Push raw code with size difference into the output stream.
+    fn push_function_call(&mut self, min_size: usize, max_size: usize, s: &str) {
+        self.min_out_size += min_size;
+        self.max_out_size += max_size;
+        self.push_chunk(CodeChunk::Code(s.to_owned()), None);
+    }
+
+    /// Get the placeholder for length octet encoded with DER.
+    fn get_size_placeholder(min_size: usize, max_size: usize) -> Result<Vec<u8>> {
+        // DER requires the length octet encoded in minimum bytes.
+        let tag_size = Self::tag_size(max_size);
+        ensure!(
+            Self::tag_size(min_size) == tag_size,
+            "Var-sized length octet is not supported,\
+             max={max_size},\
+             min={min_size}"
         );
-        const_name
+
+        let mut len_enc = Vec::<u8>::new();
+        if max_size <= 0x7f {
+            len_enc.push(0);
+        } else {
+            let nbytes = Self::tag_size(max_size) - 2;
+            len_enc.push(0x80 | (nbytes as u8));
+            len_enc.extend(std::iter::repeat(0).take(nbytes));
+        }
+
+        Ok(len_enc)
     }
 
     /// Return the maximum size of ASN1 tag, ie the tag itself, the length.
@@ -210,55 +324,6 @@ impl Codegen<'_> {
         };
         tag_bytes + len_bytes
     }
-
-    // Same as `tag_size` but also count the content size.
-    fn tag_and_content_size(size: usize) -> usize {
-        Self::tag_size(size) + size
-    }
-
-    /// Push a tagged raw OID into the ASN1 output, the buffer and its size are arbitrary C expressions.
-    fn push_raw_oid(&mut self, expr: &str, expr_size: &str, max_size: usize) {
-        // A tagged OID needs a tag, up to 3 bytes of length and the OID itself.
-        // Don't try to exactly compute how many bytes we need for the length.
-        self.max_out_size += Self::tag_and_content_size(max_size);
-        self.push_str_with_indent(&format!(
-            "RETURN_IF_ERROR(asn1_push_oid_raw(&state, {expr}, {expr_size}));\n"
-        ))
-    }
-
-    /// Push a bit in a bitstring.
-    fn push_bit(&mut self, bitstring_tagname: &str, val: &Value<bool>) -> Result<()> {
-        match val {
-            Value::Literal(x) => {
-                self.push_str_with_indent(&format!(
-                    "RETURN_IF_ERROR(asn1_bitstring_push_bit({bitstring_tagname}, {x}));\n"
-                ));
-            }
-            Value::Variable(Variable { name, convert }) => {
-                let VariableInfo {
-                    codegen,
-                    var_type: source_type,
-                } = (self.variable_info)(name)?;
-                match source_type {
-                    VariableType::Boolean => {
-                        ensure!(
-                            convert.is_none(),
-                            "cannot use a convertion from boolean to boolean"
-                        );
-                        let VariableCodegenInfo::Boolean { value_expr } = codegen else {
-                            bail!("internal error: boolean not represented by a VariableCodegenInfo::Boolean");
-                        };
-                        self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_bitstring_push_bit({bitstring_tagname}, {value_expr}));\n"));
-                    }
-                    _ => bail!(
-                        "conversion from to {:?} to boolean is not supported",
-                        source_type
-                    ),
-                }
-            }
-        }
-        Ok(())
-    }
 }
 
 impl Tag {
@@ -290,23 +355,17 @@ impl Tag {
 impl Builder for Codegen<'_> {
     /// Push a byte into the ASN1 output, the value can be any C expression.
     fn push_byte(&mut self, val: u8) -> Result<()> {
-        self.push_str_with_indent(&format!(
-            "RETURN_IF_ERROR(asn1_push_byte(&state, {val}));\n"
-        ));
-        self.max_out_size += 1;
+        self.push_const(Some("Byte".into()), &[val]);
         Ok(())
     }
 
     /// Push a tagged boolean into the ASN1 output.
     fn push_boolean(&mut self, tag: &Tag, val: &Value<bool>) -> Result<()> {
         match val {
-            Value::Literal(x) => {
-                let bool_str = if *x { "true" } else { "false" };
-                self.push_str_with_indent(&format!(
-                    "RETURN_IF_ERROR(asn1_push_bool(&state, {}, {}));\n",
-                    tag.codestring(),
-                    bool_str
-                ));
+            Value::Literal(_) => {
+                self.push_der(Some(tag.codestring()), |builder| {
+                    builder.push_boolean(tag, val)
+                })?;
             }
             Value::Variable(Variable { name, convert }) => {
                 let VariableInfo {
@@ -315,25 +374,30 @@ impl Builder for Codegen<'_> {
                 } = (self.variable_info)(name)?;
                 // Verify that type is correct.
                 match source_type {
-                    VariableType::Boolean =>
-                        ensure!(convert.is_none(), "using an boolean variable for an boolean field cannot specify a conversion"),
+                    VariableType::Boolean => ensure!(
+                        convert.is_none(),
+                        "using an boolean variable for an boolean field cannot specify a conversion"
+                    ),
                     _ => bail!(
                         "using a variable of type {source_type:?} for a boolean field is not supported"
-                        ),
+                    ),
                 }
                 match codegen {
                     VariableCodegenInfo::Boolean { value_expr } => {
-                        self.push_str_with_indent(&format!(
-                            "RETURN_IF_ERROR(asn1_push_bool(&state, {}, {value_expr}));\n",
-                            tag.codestring()
-                        ))
+                        self.push_tag(Some(tag.codestring()), tag, |builder| {
+                            // A boolean only requires one byte of data (plus the tag).
+                            builder.push_function_call(
+                                1,
+                                1,
+                                &format!("template_push_asn1_bool(&state, {value_expr});\n",),
+                            );
+                            Ok(())
+                        })?;
                     }
                     _ => bail!("internal error: boolean represented by a {source_type:?}"),
                 }
             }
         }
-        // A boolean only requires one byte of data (plus the tag).
-        self.max_out_size += Self::tag_and_content_size(1);
         Ok(())
     }
 
@@ -346,29 +410,10 @@ impl Builder for Codegen<'_> {
         val: &Value<BigUint>,
     ) -> Result<()> {
         match val {
-            // For a literal, try to use `asn1_push_uint32` if possible, otherwise
-            // create a constant in the pool to hold the encoding and use `asn1_push_integer`.
-            // For unsigned integers, we might need to push one more byte of data then indicated
-            // by the length since they are represented in two's completement so an unsigned number
-            // with the MSB bit set needs to be padded with a 0x00 byte so that it is not interpreted
-            // as a negative number. Therefore, always add one to estimate.
-            Value::Literal(x) => {
-                if x.bits() <= 32 {
-                    self.push_str_with_indent(&format!(
-                        "RETURN_IF_ERROR(asn1_push_uint32(&state, {}, {x}));\n",
-                        tag.codestring()
-                    ));
-                    self.max_out_size += Self::tag_and_content_size(1 + (x.bits() + 7) / 8);
-                } else {
-                    let bytes = x.to_bytes_be();
-                    let const_name = self.add_constant_byte_array(name_hint, &bytes);
-                    self.push_str_with_indent(
-                        &format!(
-                            "RETURN_IF_ERROR(asn1_push_integer(&state, {}, false, {const_name}, sizeof({const_name})));\n",
-                            tag.codestring())
-                    );
-                    self.max_out_size += Self::tag_and_content_size(1 + bytes.len())
-                }
+            Value::Literal(_) => {
+                self.push_der(name_hint.clone(), |builder| {
+                    builder.push_integer(name_hint, tag, val)
+                })?;
             }
             Value::Variable(Variable { name, convert }) => {
                 let VariableInfo {
@@ -376,40 +421,73 @@ impl Builder for Codegen<'_> {
                     var_type: source_type,
                 } = (self.variable_info)(name)?;
                 // Get the maximum size and verify that types and conversion are correct.
-                let size = match source_type {
-                    VariableType::Integer { size } => {
-                        ensure!(convert.is_none(), "using an integer variable for an integer field cannot specify a conversion");
-                        size
-                    }
-                    VariableType::ByteArray { size } => {
-                        match convert {
-                            None => bail!("using a byte array variable for an integer field must specify a conversion"),
-                            Some(Conversion::BigEndian) => (),
-                            _ => bail!("conversion {:?} from byte array to integer is not supported", convert),
-                        }
-                        size
+                match source_type {
+                    VariableType::Integer { .. } => {
+                        ensure!(
+                            convert.is_none(),
+                            "using an integer variable for an integer field cannot specify a conversion"
+                        );
                     }
+                    VariableType::ByteArray { .. } => match convert {
+                        None => bail!(
+                            "using a byte array variable for an integer field must specify a conversion"
+                        ),
+                        Some(Conversion::BigEndian) => (),
+                        _ => bail!(
+                            "conversion {:?} from byte array to integer is not supported",
+                            convert
+                        ),
+                    },
                     _ => bail!(
                         "using a variable of type {source_type:?} for an integer field is not supported"
-                        ),
+                    ),
                 };
-                self.max_out_size += Self::tag_and_content_size(1 + size);
+
+                // ASN1 integer will add one extra byte when positive integers
+                // have MSB = 1.
+                let (min_size, max_size) = source_type.int_size(1);
+
+                // Value zero will be encoded as one-byte 0x00.
+                let min_size = max(1, min_size);
+
+                ensure!(
+                    max_size < 126,
+                    "Integer more than 126 bytes is not supported."
+                );
+
+                // Two extra bytes for tag and length.
+                let (min_size, max_size) = (min_size + 2, max_size + 2);
+
                 // For variables, an integer can either be represented by a pointer to a big-endian
-                // byte array, or by a `uint32_t` for a very small integers. Use `asn1_push_uint32`
-                // or `asn1_push_integer` depending on the case.
+                // byte array, or by a `uint32_t` for a very small integers. Use `template_push_uint32`
+                // or `template_push_integer` depending on the case.
+                let msb_tweak = source_type.use_msb_tweak();
+                ensure!(
+                    !msb_tweak || source_type.has_constant_array_size(),
+                    "MSb tweak is only supported with constant array size.",
+                );
+
+                let tag_str = tag.codestring();
                 match codegen {
-                    VariableCodegenInfo::Int32 { value_expr } => {
-                        self.push_str_with_indent(&format!(
-                            "RETURN_IF_ERROR(asn1_push_uint32(&state, {}, {value_expr}));\n",
-                            tag.codestring()
-                        ))
-                    }
+                    VariableCodegenInfo::Uint32 { value_expr } => self.push_function_call(
+                        min_size,
+                        max_size,
+                        &format!(
+                            "template_asn1_uint32(&state, {tag_str}, {msb_tweak}, {value_expr});\n",
+                        ),
+                    ),
                     VariableCodegenInfo::Pointer {
                         ptr_expr,
                         size_expr,
                     } => {
                         // Make sure the type is correct and get the size.
-                        self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_push_integer(&state, {}, false, {ptr_expr}, {size_expr}));\n", tag.codestring()))
+                        self.push_function_call(
+                            min_size,
+                            max_size,
+                            &format!(
+                                "template_asn1_integer(&state, {tag_str}, {msb_tweak}, {ptr_expr}, {size_expr});\n",
+                            ),
+                        )
                     }
                     _ => bail!("internal error: integer represented by a {source_type:?}"),
                 }
@@ -427,13 +505,10 @@ impl Builder for Codegen<'_> {
         size: usize,
     ) -> Result<()> {
         match val {
-            Value::Literal(x) => {
-                let data = &x.to_bytes_be();
-                let data = [vec![0; size - data.len()], data.clone()].concat();
-                let const_name = self.add_constant_byte_array(name_hint, &data);
-                self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_push_bytes(&state, {const_name}, sizeof({const_name})));\n"));
-                // There is not tag, we are just pushing the data itself.
-                self.max_out_size += data.len();
+            Value::Literal(_) => {
+                self.push_der(name_hint.clone(), |builder| {
+                    builder.push_integer_pad(name_hint, val, size)
+                })?;
             }
             Value::Variable(Variable { name, convert }) => {
                 let VariableInfo {
@@ -441,20 +516,30 @@ impl Builder for Codegen<'_> {
                     var_type: source_type,
                 } = (self.variable_info)(name)?;
                 match source_type {
-                    VariableType::Integer { size } => {
-                        ensure!(convert.is_none(), "using an integer variable for an integer field cannot specify a conversion");
+                    VariableType::Integer { .. } => {
+                        ensure!(
+                            convert.is_none(),
+                            "using an integer variable for an integer field cannot specify a conversion"
+                        );
                         let VariableCodegenInfo::Pointer {
                             ptr_expr,
                             size_expr,
                         } = codegen
                         else {
-                            bail!("the codegen backend does not support small integers for padded integer fields");
+                            bail!(
+                                "the codegen backend does not support small integers for padded integer fields"
+                            );
                         };
+
+                        let (min_size, max_size) = source_type.array_size();
+                        ensure!(min_size == max_size, "Padding is not supported");
+
                         // There is not tag, we are just pushing the data itself.
-                        self.max_out_size += size;
-                        self.push_str_with_indent(&format!(
-                            "RETURN_IF_ERROR(asn1_push_integer_pad(&state, false, {ptr_expr}, {size_expr}, {size}));\n"
-                        ))
+                        self.push_function_call(
+                            min_size,
+                            max_size,
+                            &format!("template_push_bytes(&state, {ptr_expr}, {size_expr});\n"),
+                        )
                     }
                     _ => bail!(
                         "using a variable of type {source_type:?} for a padded integer field is not supported"
@@ -469,11 +554,10 @@ impl Builder for Codegen<'_> {
     /// the ASN1 output.
     fn push_byte_array(&mut self, name_hint: Option<String>, val: &Value<Vec<u8>>) -> Result<()> {
         match val {
-            Value::Literal(x) => {
-                let const_name = self.add_constant_byte_array(name_hint, x);
-                self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_push_bytes(&state, {const_name}, sizeof({const_name})));\n"));
-                // There is not tag, we are just pushing the data itself.
-                self.max_out_size += x.len();
+            Value::Literal(_) => {
+                self.push_der(name_hint.clone(), |builder| {
+                    builder.push_byte_array(name_hint, val)
+                })?;
             }
             Value::Variable(Variable { name, convert }) => {
                 let VariableInfo {
@@ -481,20 +565,27 @@ impl Builder for Codegen<'_> {
                     var_type: source_type,
                 } = (self.variable_info)(name)?;
                 match source_type {
-                    VariableType::ByteArray { size } => {
-                        ensure!(convert.is_none(), "using a byte-array variable for a byte-array field cannot specify a conversion");
+                    VariableType::ByteArray { .. } => {
+                        ensure!(
+                            convert.is_none(),
+                            "using a byte-array variable for a byte-array field cannot specify a conversion"
+                        );
+                        let (min_size, max_size) = source_type.array_size();
                         let VariableCodegenInfo::Pointer {
                             ptr_expr,
                             size_expr,
                         } = codegen
                         else {
-                            bail!("internal error: byte-array represented by a VariableCodegenInfo::Int32");
+                            bail!(
+                                "internal error: byte-array represented by a VariableCodegenInfo::Uint32"
+                            );
                         };
                         // There is not tag, we are just pushing the data itself.
-                        self.max_out_size += size;
-                        self.push_str_with_indent(&format!(
-                            "RETURN_IF_ERROR(asn1_push_bytes(&state, {ptr_expr}, {size_expr}));\n"
-                        ))
+                        self.push_function_call(
+                            min_size,
+                            max_size,
+                            &format!("template_push_bytes(&state, {ptr_expr}, {size_expr});\n"),
+                        )
                     }
                     _ => bail!(
                         "using a variable of type {source_type:?} for a byte-array field is not supported",
@@ -508,57 +599,79 @@ impl Builder for Codegen<'_> {
     /// Push an optionally tagged string into the ASN1 output.
     fn push_string(
         &mut self,
-        _name_hint: Option<String>,
+        name_hint: Option<String>,
         str_type: &Tag,
         val: &Value<String>,
     ) -> Result<()> {
-        let str_type = str_type.codestring();
         match val {
-            Value::Literal(x) => {
-                let len = x.len();
-                self.push_str_with_indent(&format!(
-                    "RETURN_IF_ERROR(asn1_push_string(&state, {str_type}, \"{x}\", {len}));\n"
-                ));
-                // A tagged string needs a tag (up to 3 bytes of length) and the string itself.
-                // Don't try to exactly compute how many bytes we need for the length.
-                self.max_out_size += Self::tag_and_content_size(x.len());
+            Value::Literal(_) => {
+                self.push_der(name_hint.clone(), |builder| {
+                    builder.push_string(name_hint, str_type, val)
+                })?;
             }
             Value::Variable(Variable { name, convert }) => {
                 let VariableInfo {
                     codegen,
                     var_type: source_type,
                 } = (self.variable_info)(name)?;
-                // When pushing a variable, it can either a string (use asn1_push_string) or a byte array
-                // that needs to converted (use asn1_push_hexstring).
+                // When pushing a variable, it can either a string (use template_push_bytes) or a byte array
+                // that needs to converted (use template_push_hex).
                 match source_type {
-                    VariableType::String { size } => {
+                    VariableType::String { .. } => {
                         ensure!(
                             convert.is_none(),
                             "cannot use a convertion from string to string"
                         );
+                        let (min_size, max_size) = source_type.array_size();
                         let VariableCodegenInfo::Pointer {
                             ptr_expr,
                             size_expr,
                         } = codegen
                         else {
-                            bail!("internal error: string not represented by a VariableCodegenInfo::Pointer");
+                            bail!(
+                                "internal error: string not represented by a VariableCodegenInfo::Pointer"
+                            );
                         };
-                        self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_push_string(&state, {str_type}, {ptr_expr}, {size_expr}));\n"));
-                        self.max_out_size += Self::tag_and_content_size(size);
+                        self.push_tag(Some(name.into()), str_type, |builder| {
+                            builder.push_function_call(
+                                min_size,
+                                max_size,
+                                &format!("template_push_bytes(&state, (const uint8_t*){ptr_expr}, {size_expr});\n"),
+                            );
+                            Ok(())
+                        })?;
                     }
-                    VariableType::ByteArray { size } => {
+                    VariableType::ByteArray { .. } => {
+                        let (min_size, max_size) = source_type.array_size();
                         match convert {
-                            None => bail!("using a byte array variable for an string field must to specify a conversion"),
+                            None => bail!(
+                                "using a byte array variable for an string field must to specify a conversion"
+                            ),
                             Some(Conversion::LowercaseHex) => {
-                                let VariableCodegenInfo::Pointer { ptr_expr, size_expr } = codegen else {
-                                    bail!("internal error: string not represented by a VariableCodegenInfo::Pointer");
+                                let VariableCodegenInfo::Pointer {
+                                    ptr_expr,
+                                    size_expr,
+                                } = codegen
+                                else {
+                                    bail!(
+                                        "internal error: string not represented by a VariableCodegenInfo::Pointer"
+                                    );
                                 };
                                 // The conversion doubles the size.
-                                self.max_out_size += Self::tag_and_content_size(2 * size);
-                                self.push_str_with_indent(
-                                    &format!("RETURN_IF_ERROR(asn1_push_hexstring(&state, {str_type}, {ptr_expr}, {size_expr}));\n"))
+                                self.push_tag(Some(name.into()), str_type, |builder| {
+                                    builder.push_function_call(
+                                        2 * min_size,
+                                        2 * max_size,
+                                        &format!(
+                                            "template_push_hex(&state, {ptr_expr}, {size_expr});\n"
+                                        ),
+                                    );
+                                    Ok(())
+                                })?;
                             }
-                            _ => bail!("conversion {convert:?} from byte array to string is not supported"),
+                            _ => bail!(
+                                "conversion {convert:?} from byte array to string is not supported"
+                            ),
                         }
                     }
                     _ => bail!("conversion from to {source_type:?} to string is not supported",),
@@ -574,44 +687,73 @@ impl Builder for Codegen<'_> {
         tag: &Tag,
         bits: &[Value<bool>],
     ) -> Result<()> {
-        self.push_tag(name_hint.clone(), tag, |builder| {
-            let tag_name = format!(
-                "bit{}_{}",
-                builder.tag_idx,
-                name_hint.map(|x| x.to_snake_case()).unwrap_or("".into())
-            );
-            builder.tag_idx += 1;
-            builder.push_str_with_indent(&format!("asn1_bitstring_t {tag_name};\n"));
-            builder.push_str_with_indent(&format!(
-                "RETURN_IF_ERROR(asn1_start_bitstring(&state, &{tag_name}));\n"
-            ));
-            builder.push_str_with_indent("{\n");
-            builder.indent_lvl += 1;
-            for bit in bits {
-                builder.push_bit(&format!("&{tag_name}"), bit)?;
+        let bit_consts = bits
+            .iter()
+            .map(|x| match x {
+                Value::Literal(x) => x,
+                _ => &false,
+            })
+            .collect::<Vec<_>>();
+        // See X.690 spec section 8.6 for encoding details.
+        // Note: the encoding of an empty bitstring must be the number of unused bits to 0 and have no content.
+        let nr_bytes = (bit_consts.len() + 7) / 8;
+        let mut bytes = vec![0u8; nr_bytes];
+        for (i, bit) in bit_consts.iter().enumerate() {
+            bytes[i / 8] |= (**bit as u8) << (7 - (i % 8));
+        }
+
+        let bitstring_name = format!("{}-bit BitString {}", bits.len(), tag.codestring(),);
+
+        self.push_as_bit_string(
+            Some(bitstring_name),
+            tag,
+            bytes.len() * 8 - bits.len(),
+            |builder| builder.push_byte_array(name_hint.clone(), &Value::Literal(bytes.clone())),
+        )?;
+
+        for (i, bit) in bits.iter().enumerate() {
+            let byte_offset = bytes.len() - i / 8;
+            let bit_offset = 7 - (i % 8);
+
+            if let Value::Variable(Variable { name, convert }) = bit {
+                let VariableInfo {
+                    codegen,
+                    var_type: source_type,
+                } = (self.variable_info)(name)?;
+                match source_type {
+                    VariableType::Boolean => {
+                        ensure!(
+                            convert.is_none(),
+                            "cannot use a convertion from boolean to boolean"
+                        );
+                        let VariableCodegenInfo::Boolean { value_expr } = codegen else {
+                            bail!(
+                                "internal error: boolean not represented by a VariableCodegenInfo::Boolean"
+                            );
+                        };
+                        self.push_chunk(
+                            CodeChunk::Code(format!(
+                                "template_set_bit(&state, {byte_offset}, {bit_offset}, {value_expr});\n"
+                            )),
+                            Some(name.clone()),
+                        );
+                    }
+                    _ => bail!(
+                        "conversion from to {:?} to boolean is not supported",
+                        source_type
+                    ),
+                }
             }
-            // One byte for the unused bits and then one byte per 8 bits.
-            builder.max_out_size += 1 + (bits.len() + 7) / 8;
-            builder.indent_lvl -= 1;
-            builder.push_str_with_indent("}\n");
-            builder.push_str_with_indent(&format!(
-                "RETURN_IF_ERROR(asn1_finish_bitstring(&{tag_name}));\n"
-            ));
-            Ok(())
-        })
+        }
+
+        Ok(())
     }
 
     fn push_oid(&mut self, oid: &Oid) -> Result<()> {
-        // Create constant.
-        let bytes = oid.to_der()?;
-        let oid_const_name = self.add_constant_byte_array(Some(format!("oid_{}", oid)), &bytes);
-        self.push_raw_oid(
-            &oid_const_name,
-            &format!("sizeof({oid_const_name})"),
-            bytes.len(),
-        );
-
-        Ok(())
+        // Serialize oid with tag to const.
+        self.push_der(Some(format!("Oid of {}", oid)), |builder| {
+            builder.push_oid(oid)
+        })
     }
 
     // Helper function for outputting ASN1 tags.
@@ -619,31 +761,86 @@ impl Builder for Codegen<'_> {
         &mut self,
         name_hint: Option<String>,
         tag: &Tag,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
-        let tag_name = format!(
-            "tag{}_{}",
-            self.tag_idx,
-            name_hint.map(|x| x.to_snake_case()).unwrap_or("".into())
+        let tag_name = name_hint.unwrap_or("Unnamed tag".into());
+
+        self.indent();
+
+        self.push_const(
+            Some(format!("Tag {} of {tag_name}", tag.codestring())),
+            &tag.to_der()?,
         );
-        self.tag_idx += 1;
-        self.push_str_with_indent(&format!("asn1_tag_t {tag_name};\n"));
-        self.push_str_with_indent(&format!(
-            "RETURN_IF_ERROR(asn1_start_tag(&state, &{tag_name}, {}));\n",
-            tag.codestring()
-        ));
-        self.push_str_with_indent("{\n");
-        self.indent_lvl += 1;
+
+        // Allocate placeholders in the output stream.
+        // This placeholder will be replaced by the encoded length later.
+        let len_idx = self.output.len();
+        self.push_const(None, &[]);
+        // This placeholder will be replaced by the location memo code later.
+        let memo_idx = self.output.len();
+        self.push_const(None, &[]);
+
+        let content_idx = self.output.len();
+
         // We do not yet know how many bytes the content will use: remember the current
         // value of the estimate and see by how much it increases during generation
         // to obtain a bound.
+        let old_min_size = self.min_out_size;
         let old_max_size = self.max_out_size;
-        gen(self)?;
-        let max_size = self.max_out_size - old_max_size;
-        self.max_out_size += Self::tag_size(max_size);
-        self.indent_lvl -= 1;
-        self.push_str_with_indent("}\n");
-        self.push_str_with_indent(&format!("RETURN_IF_ERROR(asn1_finish_tag(&{tag_name}));\n"));
+        self.indent();
+        build(self)?;
+        self.unindent();
+        let min_size: usize = self.min_out_size - old_min_size;
+        let max_size: usize = self.max_out_size - old_max_size;
+
+        // Generate size patching code.
+        let len_enc = Self::get_size_placeholder(min_size, max_size)?;
+        self.min_out_size += len_enc.len();
+        self.max_out_size += len_enc.len();
+
+        if min_size == max_size {
+            self.output[len_idx].comment = Some(format!("Length of fixed-sized {tag_name}"));
+
+            // Sanity check for all constants.
+            if self.output[content_idx..]
+                .iter()
+                .all(|x| x.code.is_constant())
+            {
+                let total_size: usize = self.output[content_idx..]
+                    .iter()
+                    .map(|x| x.code.len())
+                    .sum();
+                if total_size != min_size || total_size != max_size {
+                    println!("{:?}", &self.output[content_idx..]);
+                    panic!(
+                        "Invalid const size total={total_size}, \
+                         min={min_size}, M={max_size}"
+                    );
+                }
+            }
+
+            let len_enc = Der::encode_size(max_size);
+            self.output[len_idx].code = CodeChunk::ConstBytes(len_enc);
+            // The memo placeholder is left empty / no-op in this branch.
+        } else {
+            /* var-sized tag */
+            self.output[len_idx].comment = Some(format!(
+                "Length of {tag_name} between {min_size} ~ {max_size}"
+            ));
+
+            self.output[len_idx].code = CodeChunk::ConstBytes(len_enc);
+
+            // Add the memo statement.
+            self.output[memo_idx] = CodeChunkWithComment {
+                code: CodeChunk::SizePatchMemo(-2),
+                comment: Some(format!("Start of {tag_name}")),
+            };
+            self.push_chunk(
+                CodeChunk::Code("template_patch_size_be(&state, memo);\n".to_string()),
+                Some(format!("End of {tag_name}")),
+            );
+        }
+        self.unindent();
         Ok(())
     }
 }
diff --git a/sw/host/ot_certs/src/asn1/der.rs b/sw/host/ot_certs/src/asn1/der.rs
index ecae9e86cd6e9..223cd6a027a5c 100644
--- a/sw/host/ot_certs/src/asn1/der.rs
+++ b/sw/host/ot_certs/src/asn1/der.rs
@@ -6,7 +6,7 @@
 //! a DER output. This module only supports literal values for variables
 //! since it needs to know the concrete values to produce the output.
 
-use anyhow::{bail, ensure, Result};
+use anyhow::{Result, bail, ensure};
 use num_bigint_dig::BigUint;
 
 use crate::asn1::builder::Builder;
@@ -57,12 +57,29 @@ impl Der {
         Der { output: Vec::new() }
     }
 
-    pub fn generate(gen: impl FnOnce(&mut Self) -> Result<()>) -> Result<Vec<u8>> {
+    pub fn generate(build: impl FnOnce(&mut Self) -> Result<()>) -> Result<Vec<u8>> {
         let mut der = Der::new();
-        gen(&mut der)?;
+        build(&mut der)?;
         Ok(der.output)
     }
 
+    pub fn encode_size(size: usize) -> Vec<u8> {
+        // Push length, see X.690 section 8.1.3.
+        let mut encoded = Vec::<u8>::new();
+        if size <= 0x7f {
+            encoded.push(size as u8);
+        } else {
+            let mut remaining = size;
+            while remaining != 0 {
+                encoded.push((remaining & 0xff) as u8);
+                remaining >>= 8;
+            }
+            encoded.push(0x80 | (encoded.len() as u8));
+            encoded.reverse();
+        }
+        encoded
+    }
+
     fn get_value_or_error<T>(val: &Value<T>) -> Result<&T> {
         match val {
             Value::Literal(x) => Ok(x),
@@ -188,24 +205,18 @@ impl Builder for Der {
         &mut self,
         _name_hint: Option<String>,
         tag: &Tag,
-        gen: impl FnOnce(&mut Self) -> Result<()>,
+        build: impl FnOnce(&mut Self) -> Result<()>,
     ) -> Result<()> {
         let mut content = Der::new();
-        gen(&mut content)?;
+        build(&mut content)?;
         // Push identifier octets.
         self.push_bytes(&tag.to_der()?)?;
         // Push length, see X.690 section 8.1.3.
         if content.output.len() <= 0x7f {
             self.push_byte(content.output.len() as u8)?;
         } else {
-            let mut len = content.output.len();
-            let mut bytes = Vec::<u8>::new();
-            while len != 0 {
-                bytes.push((len & 0xff) as u8);
-                len >>= 8;
-            }
-            self.push_byte(0x80 | (bytes.len() as u8))?;
-            bytes.reverse();
+            let len = content.output.len();
+            let bytes = Self::encode_size(len);
             self.push_bytes(&bytes)?;
         }
         // Push content
diff --git a/sw/host/ot_certs/src/asn1/x509.rs b/sw/host/ot_certs/src/asn1/x509.rs
index 72298b55676dc..4248841dbcfe0 100644
--- a/sw/host/ot_certs/src/asn1/x509.rs
+++ b/sw/host/ot_certs/src/asn1/x509.rs
@@ -6,11 +6,11 @@ use anyhow::Result;
 use num_bigint_dig::BigUint;
 use num_traits::FromPrimitive;
 
-use crate::asn1::builder::{concat_suffix, Builder};
+use crate::asn1::builder::{Builder, concat_suffix};
 use crate::asn1::{Oid, Tag};
 use crate::template::{
     AttributeType, BasicConstraints, Certificate, CertificateExtension, EcCurve, EcPublicKeyInfo,
-    EcdsaSignature, HashAlgorithm, Name, Signature, SubjectPublicKeyInfo, Value,
+    EcdsaSignature, HashAlgorithm, KeyUsage, Name, Signature, SubjectPublicKeyInfo, Value,
 };
 
 impl HashAlgorithm {
@@ -150,9 +150,15 @@ impl X509 {
                             Self::push_basic_constraints_ext(builder, constraints)?;
                         }
                         Self::push_subject_alt_name_ext(builder, &cert.subject_alt_name)?;
-                        Self::push_key_usage_ext(builder)?;
-                        Self::push_auth_key_id_ext(builder, &cert.authority_key_identifier)?;
-                        Self::push_subject_key_id_ext(builder, &cert.subject_key_identifier)?;
+                        if let Some(key_usage) = &cert.key_usage {
+                            Self::push_key_usage_ext(builder, key_usage)?;
+                        }
+                        if let Some(auth_key_id) = &cert.authority_key_identifier {
+                            Self::push_auth_key_id_ext(builder, auth_key_id)?;
+                        }
+                        if let Some(subj_key_id) = &cert.subject_key_identifier {
+                            Self::push_subject_key_id_ext(builder, subj_key_id)?;
+                        }
                         for ext in &cert.private_extensions {
                             Self::push_cert_extension(builder, ext)?
                         }
@@ -271,7 +277,7 @@ impl X509 {
         })
     }
 
-    pub fn push_key_usage_ext<B: Builder>(builder: &mut B) -> Result<()> {
+    pub fn push_key_usage_ext<B: Builder>(builder: &mut B, key_usage: &KeyUsage) -> Result<()> {
         // From https://datatracker.ietf.org/doc/html/rfc5280#section-4.2.1.3
         // KeyUsage ::= BIT STRING {
         //    digitalSignature        (0),
@@ -284,21 +290,23 @@ impl X509 {
         //    cRLSign                 (6),
         //    encipherOnly            (7),
         //    decipherOnly            (8) }
-        //
-        // From the Open Profile for DICE specification:
-        // https://pigweed.googlesource.com/open-dice/+/refs/heads/main/docs/specification.md#certificate-details
-        // The standard extensions are fixed by the specification.
         Self::push_extension(builder, &Oid::KeyUsage, true, |builder| {
             builder.push_bitstring(
                 Some("key_usage".into()),
                 &Tag::BitString,
                 &[
-                    /* digitalSignature */ Value::Literal(false),
+                    key_usage
+                        .digital_signature
+                        .clone()
+                        .unwrap_or(Value::literal(false)),
                     /* nonRepudiation */ Value::Literal(false),
                     /* keyEncipherment */ Value::Literal(false),
                     /* dataEncipherment */ Value::Literal(false),
-                    /* keyAgreement */ Value::Literal(false),
-                    /* keyCertSign */ Value::Literal(true),
+                    key_usage
+                        .key_agreement
+                        .clone()
+                        .unwrap_or(Value::literal(false)),
+                    key_usage.cert_sign.clone().unwrap_or(Value::literal(false)),
                     /* cRLSign */ Value::Literal(false),
                     /* encipherOnly */ Value::Literal(false),
                     /* decipherOnly */ Value::Literal(false),
@@ -352,7 +360,7 @@ impl X509 {
         builder: &mut B,
         oid: &Oid,
         critical: bool,
-        gen: impl FnOnce(&mut B) -> Result<()>,
+        build: impl FnOnce(&mut B) -> Result<()>,
     ) -> Result<()> {
         // From https://datatracker.ietf.org/doc/html/rfc5280#section-4.1:
         // Extension  ::=  SEQUENCE  {
@@ -366,7 +374,7 @@ impl X509 {
         builder.push_seq(concat_suffix(&Some(oid.to_string()), "ext"), |builder| {
             builder.push_oid(oid)?;
             builder.push_boolean(&Tag::Boolean, &Value::Literal(critical))?;
-            builder.push_octet_string(concat_suffix(&Some(oid.to_string()), "ext_value"), gen)
+            builder.push_octet_string(concat_suffix(&Some(oid.to_string()), "ext_value"), build)
         })
     }
 
diff --git a/sw/host/ot_certs/src/cbor.rs b/sw/host/ot_certs/src/cbor.rs
new file mode 100644
index 0000000000000..6eb7039c5447f
--- /dev/null
+++ b/sw/host/ot_certs/src/cbor.rs
@@ -0,0 +1,83 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use serde::{Deserialize, Serialize};
+
+// For CBOR specification, it's defined in Concise Binary Object Representation (CBOR)
+// (https://datatracker.ietf.org/doc/html/rfc8949).
+
+// Section 3.1 Major Types
+#[derive(Clone, Copy, Debug, Deserialize, PartialEq, Eq, Serialize)]
+#[repr(u8)]
+enum MajorType {
+    Uint = 0,
+    Sint = 1,
+    Bstr = 2,
+    Tstr = 3,
+    Array = 4,
+    Map = 5,
+}
+
+// Section 3 Specification of the CBOR Encoding
+// The value of additionial information, describing the type of the argument.
+#[derive(Clone, Copy, Debug, Deserialize, PartialEq, Eq, Serialize)]
+#[repr(u8)]
+enum ArgType {
+    U8 = 24,
+    U16 = 25,
+    U32 = 26,
+    U64 = 27,
+}
+
+/// Given a CBOR argument, it returns:
+///   1. how many additional bytes to encode them
+///   2. the value to be filled in the header's additional information
+pub fn arg_size(arg: u64) -> (u64, u8) {
+    if arg <= ArgType::U8 as u64 {
+        (0, arg as u8)
+    } else if arg <= u8::MAX.into() {
+        (1, ArgType::U8 as u8)
+    } else if arg <= u16::MAX.into() {
+        (2, ArgType::U16 as u8)
+    } else if arg <= u32::MAX.into() {
+        (4, ArgType::U32 as u8)
+    } else {
+        (8, ArgType::U64 as u8)
+    }
+}
+
+// The first few bytes of each data item,
+// consisting of major type, additional information and argument.
+fn header(kind: MajorType, arg: u64) -> Vec<u8> {
+    let (size, info) = arg_size(arg);
+    // big-endian
+    let bytes = (0..size).map(|i| ((arg >> (i * 8)) & 0xff) as u8).rev();
+    let mut res = vec![((kind as u8) << 5) | info];
+    res.extend(bytes);
+    res
+}
+
+pub fn int(value: i64) -> Vec<u8> {
+    if value >= 0 {
+        header(MajorType::Uint, value as u64)
+    } else {
+        header(MajorType::Sint, -(value + 1) as u64)
+    }
+}
+
+pub fn byte_array_header(len: u64) -> Vec<u8> {
+    header(MajorType::Bstr, len)
+}
+
+pub fn string_header(len: u64) -> Vec<u8> {
+    header(MajorType::Tstr, len)
+}
+
+pub fn array_header(len: u64) -> Vec<u8> {
+    header(MajorType::Array, len)
+}
+
+pub fn map_header(len: u64) -> Vec<u8> {
+    header(MajorType::Map, len)
+}
diff --git a/sw/host/ot_certs/src/codegen.rs b/sw/host/ot_certs/src/codegen.rs
index 538510bd550bf..6d56e8c54ce6d 100644
--- a/sw/host/ot_certs/src/codegen.rs
+++ b/sw/host/ot_certs/src/codegen.rs
@@ -3,20 +3,24 @@
 // SPDX-License-Identifier: Apache-2.0
 
 //! This module is capable of generating C code for generating a binary X.509
-//! certificate according to a [`Template`](crate::template::Template).
+//! certificate according to a [`Template`].
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result};
 use heck::ToUpperCamelCase;
 use indexmap::IndexMap;
+use itertools::Itertools;
 use std::fmt::Write;
 
-use crate::asn1::codegen::{self, ConstantPool, VariableCodegenInfo, VariableInfo};
+use crate::asn1::codegen::{self, CodegenOutput, VariableCodegenInfo, VariableInfo};
 use crate::asn1::x509::X509;
 use crate::template::subst::{Subst, SubstValue};
-use crate::template::{EcdsaSignature, Signature, Template, Value, Variable, VariableType};
+use crate::template::{
+    EcdsaSignature, Signature, SizeRange, Template, Value, Variable, VariableType,
+};
 use crate::x509;
 
-const INDENT: &str = "  ";
+/// The amount of test cases to generate for covering more corner cases.
+const TEST_CASE_COUNT: u32 = 100;
 
 pub struct Codegen {
     /// Header.
@@ -80,6 +84,7 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     source_c.push('\n');
     writeln!(source_c, "#include \"{}.h\"", tmpl.name)?;
     source_c.push_str("#include \"sw/device/silicon_creator/lib/cert/asn1.h\"\n\n");
+    source_c.push_str("#include \"sw/device/silicon_creator/lib/cert/template.h\"\n\n");
 
     source_h.push_str("#include \"sw/device/lib/base/status.h\"\n\n");
 
@@ -99,18 +104,14 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     source_h.push_str(&generate_value_struct(&tbs_value_struct_name, &tbs_vars));
     let tbs_value_struct_name = tbs_value_struct_name + "_t";
 
-    // Create a constant pool to share between the two functions.
-    let mut const_pool = ConstantPool::new();
-
     // Generate TBS function.
     let generate_tbs_fn_name = format!("{}_build_tbs", tmpl.name);
     let generate_tbs_fn_params =
-        format!("{tbs_value_struct_name} *values, uint8_t *tbs, size_t *tbs_inout_size");
-    let (generate_tbs_fn_def, generate_tbs_fn_impl, max_tbs_size) = generate_builder(
+        format!("{tbs_value_struct_name} *values, uint8_t *out_buf, size_t *inout_size");
+    let (generate_tbs_fn_def, generate_tbs_fn_impl) = generate_builder(
         CertificateComponent::Tbs,
         &generate_tbs_fn_name,
         &generate_tbs_fn_params,
-        &mut const_pool,
         &tbs_vars,
         |builder| X509::push_tbs_certificate(builder, &tmpl.certificate),
     )?;
@@ -119,7 +120,13 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     let tbs_binary_val_name = "tbs";
     sig_vars.insert(
         tbs_binary_val_name.to_string(),
-        VariableType::ByteArray { size: max_tbs_size },
+        VariableType::ByteArray {
+            size: SizeRange::RangeSize(
+                generate_tbs_fn_impl.min_size,
+                generate_tbs_fn_impl.max_size,
+            ),
+            tweak_msb: None,
+        },
     );
     let tbs_binary_val = Value::Variable(Variable {
         name: tbs_binary_val_name.to_string(),
@@ -134,38 +141,57 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     // Generate sig function.
     let generate_cert_fn_name = format!("{}_build_cert", tmpl.name);
     let generate_cert_fn_params =
-        format!("{sig_value_struct_name} *values, uint8_t *cert, size_t *cert_inout_size");
-    let (generate_cert_fn_def, generate_cert_fn_impl, max_cert_size) = generate_builder(
+        format!("{sig_value_struct_name} *values, uint8_t *out_buf, size_t *inout_size");
+    let (generate_cert_fn_def, generate_cert_fn_impl) = generate_builder(
         CertificateComponent::Certificate,
         &generate_cert_fn_name,
         &generate_cert_fn_params,
-        &mut const_pool,
         &sig_vars,
         |builder| X509::push_certificate(builder, &tbs_binary_val, &tmpl.certificate.signature),
     )?;
 
-    // Create two constants for the maximum possible size of TBS and cert.
-    // Also generate a comment stating how this size was computed.
-    let max_tbs_size_const_name = format!("k{}MaxTbsSizeBytes", tmpl.name.to_upper_camel_case());
-    let max_cert_size_const_name = format!("k{}MaxCertSizeBytes", tmpl.name.to_upper_camel_case());
-    source_h.push_str("// Maximum possible size of a TBS and a certificate assuming:\n");
+    let tmpl_name = tmpl.name.to_upper_camel_case();
+
+    // Create constants for the variable size range.
+    source_h.push_str("enum {\n");
     for (var_name, var_type) in tbs_vars.iter().chain(sig_vars.iter()) {
-        // Only consider variables whose size can vary, ie pointers.
         let (codegen, _) = c_variable_info(var_name, "", var_type);
-        if let VariableCodegenInfo::Pointer { .. } = codegen {
-            let size = match var_type {
-                VariableType::ByteArray { size }
-                | VariableType::Integer { size }
-                | VariableType::String { size } => *size,
-                VariableType::Boolean => bail!("internal error: boolean represented by a pointer"),
-            };
-            writeln!(source_h, "// - {var_name} is of size at most {size} bytes.")?;
-        }
+        let const_name = var_name.to_upper_camel_case();
+        let (min_size, max_size) = if let VariableCodegenInfo::Pointer { .. } = codegen {
+            let (min_size, max_size) = var_type.array_size();
+            if var_type.has_constant_array_size() {
+                writeln!(
+                    source_h,
+                    "k{tmpl_name}Exact{const_name}SizeBytes = {max_size},"
+                )?;
+            }
+            (min_size, max_size)
+        } else {
+            // Arbitrary range to hold scalars.
+            (1, 100)
+        };
+        writeln!(
+            source_h,
+            "k{tmpl_name}Min{const_name}SizeBytes = {min_size},"
+        )?;
+        writeln!(
+            source_h,
+            "k{tmpl_name}Max{const_name}SizeBytes = {max_size},"
+        )?;
+    }
+    source_h.push_str("};\n");
+
+    // Create field name mapping.
+    for (var_name, _) in tbs_vars.iter().chain(sig_vars.iter()) {
+        let const_name = var_name.to_upper_camel_case();
+        writeln!(source_h, "#define k{tmpl_name}Field{const_name} {var_name}")?;
     }
+
+    let max_cert_size_const_name = format!("k{}MaxCertSizeBytes", tmpl.name.to_upper_camel_case());
+    source_h.push_str("// Maximum possible size of a certificate\n");
     source_h.push_str(&indoc::formatdoc! {"enum {{
-    {INDENT}{max_tbs_size_const_name} = {max_tbs_size},
-    {INDENT}{max_cert_size_const_name} = {max_cert_size},
-    }};"});
+        {max_cert_size_const_name} = {},
+    }};", generate_cert_fn_impl.max_size});
 
     // Output definition of the functions.
     source_h.push_str("\n\n");
@@ -173,19 +199,14 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     source_h.push_str(&generate_cert_fn_def);
     source_h.push('\n');
 
-    // Output constant pool and the implementation of the functions.
-    source_c.push_str(&const_pool.codestring());
-    source_c.push('\n');
-    source_c.push_str(&generate_tbs_fn_impl);
-    source_c.push_str(&generate_cert_fn_impl);
+    // Output the implementation of the functions.
+    source_c.push_str(&generate_tbs_fn_impl.code);
+    source_c.push_str(&generate_cert_fn_impl.code);
     source_c.push('\n');
 
     writeln!(source_h, "\n#endif /* __{}__ */", preproc_guard_include)?;
 
     // Generate unittest.
-    let unittest_data = tmpl.random_test()?;
-    let expected_cert = x509::generate_certificate(&tmpl.subst(&unittest_data)?)?;
-
     source_unittest.push_str(&license_and_warning);
     source_unittest.push('\n');
     source_unittest.push_str("extern \"C\" {\n");
@@ -193,13 +214,63 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
     source_unittest.push_str("}\n");
     source_unittest.push_str("#include \"gtest/gtest.h\"\n\n");
 
+    for idx in 0..TEST_CASE_COUNT {
+        let test_case = generate_test_case(
+            &format!("Verify{idx}"),
+            &tbs_vars,
+            &sig_vars,
+            generate_tbs_fn_impl.min_size,
+            generate_tbs_fn_impl.max_size,
+            generate_cert_fn_impl.max_size,
+            tmpl,
+        )?;
+        source_unittest.push_str(&test_case);
+    }
+
+    Ok(Codegen {
+        source_h,
+        source_c,
+        source_unittest,
+    })
+}
+
+// Generate a unit test test case with random variables.
+fn generate_test_case(
+    test_name: &str,
+    tbs_vars: &IndexMap<String, VariableType>,
+    sig_vars: &IndexMap<String, VariableType>,
+    min_tbs_size: usize,
+    max_tbs_size: usize,
+    max_cert_size: usize,
+    tmpl: &Template,
+) -> Result<String> {
+    let mut source_unittest = String::new();
+    let unittest_data = tmpl.random_test()?;
+    let expected_cert = x509::generate_certificate(&tmpl.subst(&unittest_data)?)?;
+
+    let tmpl_name = tmpl.name.to_upper_camel_case();
+    let generate_tbs_fn_name = format!("{}_build_tbs", tmpl.name);
+    let generate_cert_fn_name = format!("{}_build_cert", tmpl.name);
+    let tbs_value_struct_name = format!("{}_tbs_values_t", tmpl.name);
+    let sig_value_struct_name = format!("{}_sig_values_t", tmpl.name);
+
+    source_unittest.push_str(&format! { r#"
+        TEST({tmpl_name}, {test_name})
+    "#});
+
+    source_unittest.push_str(
+        "
+        {
+    ",
+    );
+
     // Generate constants holding the data.
     for (var_name, data) in unittest_data.values {
         match data {
             SubstValue::ByteArray(bytes) => {
                 writeln!(
                     source_unittest,
-                    "uint8_t g_{var_name}[] = {{ {} }};",
+                    "static uint8_t g_{var_name}[] = {{ {} }};",
                     bytes
                         .iter()
                         .map(|x| format!("{:#02x}", x))
@@ -207,26 +278,27 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
                         .join(", ")
                 )?;
             }
-            SubstValue::String(s) => writeln!(source_unittest, "char g_{var_name}[] = \"{s}\";")?,
-            SubstValue::Int32(val) => writeln!(source_unittest, "uint32_t g_{var_name} = {val};")?,
+            SubstValue::String(s) => {
+                let s = s.chars().map(|c| format!("'{c}'")).join(", ");
+                writeln!(source_unittest, "static char g_{var_name}[] = {{{s}}};")?
+            }
+
+            SubstValue::Uint32(val) => writeln!(source_unittest, "uint32_t g_{var_name} = {val};")?,
             SubstValue::Boolean(val) => writeln!(source_unittest, "bool g_{var_name} = {val};")?,
         }
     }
     // Generate structure to hold the TBS data.
     source_unittest.push('\n');
     writeln!(source_unittest, "{tbs_value_struct_name} g_tbs_values = {{")?;
-    source_unittest.push_str(&generate_value_struct_assignment(&tbs_vars)?);
+    source_unittest.push_str(&generate_value_struct_assignment(tbs_vars)?);
     source_unittest.push_str("};\n");
     // Generate buffer for the TBS data.
     source_unittest.push('\n');
-    writeln!(
-        source_unittest,
-        "uint8_t g_{tbs_binary_val_name}[{max_tbs_size}];"
-    )?;
+    writeln!(source_unittest, "uint8_t g_tbs[{max_tbs_size}];")?;
     // Generate structure to hold the certificate data.
     source_unittest.push('\n');
     writeln!(source_unittest, "{sig_value_struct_name} g_sig_values = {{")?;
-    source_unittest.push_str(&generate_value_struct_assignment(&sig_vars)?);
+    source_unittest.push_str(&generate_value_struct_assignment(sig_vars)?);
     source_unittest.push_str("};\n");
     // Generate buffer for the certificate data.
     source_unittest.push('\n');
@@ -238,29 +310,47 @@ pub fn generate_cert(from_file: &str, tmpl: &Template) -> Result<Codegen> {
         expected_cert.len(),
         expected_cert
             .iter()
-            .map(|x| format!("{:#02x}", x))
+            .map(|x| format!("0x{:02x}", x))
             .collect::<Vec<_>>()
             .join(", ")
     )?;
     source_unittest.push('\n');
+
+    // Comment out tbs size setter if the size is constant.
+    let no_tbs_size = if min_tbs_size == max_tbs_size {
+        "// "
+    } else {
+        ""
+    };
+
     // Generate the body of the test.
-    source_unittest.push_str(&indoc::formatdoc!{ r#"
-        TEST({}, Verify) {{
-        {INDENT}EXPECT_EQ(kErrorOk, {generate_tbs_fn_name}(&g_tbs_values, g_{tbs_binary_val_name}, &g_sig_values.{tbs_binary_val_name}_size));
-        {INDENT}size_t cert_size = sizeof(g_cert_data);
-        {INDENT}EXPECT_EQ(kErrorOk, {generate_cert_fn_name}(&g_sig_values, g_cert_data, &cert_size));
-        {INDENT}EXPECT_EQ(cert_size, sizeof(kExpectedCert));
-        {INDENT}EXPECT_EQ(0, memcmp(g_cert_data, kExpectedCert, cert_size));
-        }}
+    source_unittest.push_str(&format! { r#"
+            size_t tbs_size = sizeof(g_tbs);
+            EXPECT_EQ(kErrorOk, {generate_tbs_fn_name}(&g_tbs_values, g_tbs, &tbs_size));
+            EXPECT_GE(tbs_size, {min_tbs_size});
+            EXPECT_LE(tbs_size, {max_tbs_size});
+
+            {no_tbs_size} g_sig_values.tbs_size = tbs_size;
+
+            size_t cert_size = sizeof(g_cert_data);
+            EXPECT_EQ(kErrorOk, {generate_cert_fn_name}(&g_sig_values, g_cert_data, &cert_size));
+            EXPECT_EQ(cert_size, sizeof(kExpectedCert));
+            printf("Generated cert: \n");
+            for (size_t i=0; i<cert_size; i++) {{
+              printf("%02x, ", g_cert_data[i]);
+            }}
+            printf("\n");
+            EXPECT_EQ(0, memcmp(g_cert_data, kExpectedCert, cert_size));
         "#,
-        tmpl.name.to_upper_camel_case()
     });
 
-    Ok(Codegen {
-        source_h,
-        source_c,
-        source_unittest,
-    })
+    source_unittest.push_str(
+        "
+        }
+    ",
+    );
+
+    Ok(source_unittest)
 }
 
 // Generate a structure holding the value of the variables.
@@ -290,12 +380,14 @@ fn generate_value_struct_assignment(variables: &IndexMap<String, VariableType>)
                 ptr_expr,
                 size_expr,
             } => {
-                writeln!(source, "{INDENT}.{ptr_expr} = g_{var_name},")?;
-                writeln!(source, "{INDENT}.{size_expr} = sizeof(g_{var_name}),")?;
+                writeln!(source, ".{ptr_expr} = g_{var_name},")?;
+                if !var_type.has_constant_array_size() {
+                    writeln!(source, ".{size_expr} = sizeof(g_{var_name}),")?;
+                }
             }
-            VariableCodegenInfo::Int32 { value_expr }
+            VariableCodegenInfo::Uint32 { value_expr }
             | VariableCodegenInfo::Boolean { value_expr } => {
-                writeln!(source, "{INDENT}.{value_expr} = g_{var_name},\n")?;
+                writeln!(source, ".{value_expr} = g_{var_name},\n")?;
             }
         }
     }
@@ -320,22 +412,17 @@ enum CertificateComponent {
     Tbs,
 }
 
-// Generate a function that generates a TBS/cert. This functions returns three
-// elements: the header definition, the implementation and the maximum size of
-// the produced TBS/cert.
+/// Generate a function that generates a TBS/cert.
+///
+/// This functions returns the header definition, the generated implementation
+/// code and the produced TBS/cert size range.
 fn generate_builder(
     component: CertificateComponent,
     fn_name: &str,
     fn_params_str: &str,
-    constants: &mut ConstantPool,
     variables: &IndexMap<String, VariableType>,
-    gen: impl FnOnce(&mut codegen::Codegen) -> Result<()>,
-) -> Result<(String, String, usize)> {
-    let mut generate_fn_impl = String::new();
-    writeln!(
-        generate_fn_impl,
-        "rom_error_t {fn_name}({fn_params_str}) {{"
-    )?;
+    build: impl FnOnce(&mut codegen::Codegen) -> Result<()>,
+) -> Result<(String, CodegenOutput)> {
     let get_var_info = |var_name: &str| -> Result<VariableInfo> {
         let var_type = variables
             .get(var_name)
@@ -345,8 +432,7 @@ fn generate_builder(
         Ok(VariableInfo { var_type, codegen })
     };
     let generate_fn_def: String;
-    let implementation: String;
-    let max_size: usize;
+    let mut generated_code: CodegenOutput;
     if component == CertificateComponent::Tbs {
         generate_fn_def = indoc::formatdoc! { r#"
         /**
@@ -354,9 +440,9 @@ fn generate_builder(
          *
          * @param values Pointer to a structure giving the values to use to generate the TBS
          * portion of the certificate.
-         * @param[out] tbs Pointer to a user-allocated buffer that will contain the TBS portion of
+         * @param[out] out_buf Pointer to a user-allocated buffer that will contain the TBS portion of
          * the certificate.
-         * @param[in,out] tbs_inout_size Pointer to an integer holding the size of
+         * @param[in,out] inout_size Pointer to an integer holding the size of
          * the provided buffer; this value will be updated to reflect the actual size of
          * the output.
          * @return The result of the operation.
@@ -365,14 +451,11 @@ fn generate_builder(
 
         "#
         };
-        (implementation, max_size) = codegen::Codegen::generate(
-            /* buf_name */ "tbs",
-            /* buf_size_name */ "tbs_inout_size",
-            /* indent */ INDENT,
-            /* indent_lvl */ 1,
-            constants,
+        generated_code = codegen::Codegen::generate(
+            /* buf_name */ "out_buf",
+            /* buf_size_name */ "inout_size",
             &get_var_info,
-            gen,
+            build,
         )?;
     } else {
         generate_fn_def = indoc::formatdoc! { r#"
@@ -381,9 +464,9 @@ fn generate_builder(
          *
          * @param values Pointer to a structure giving the values to use to generate the
          * certificate (TBS and signature).
-         * @param[out] cert Pointer to a user-allocated buffer that will contain the
+         * @param[out] out_buf Pointer to a user-allocated buffer that will contain the
          * result.
-         * @param[in,out] cert_inout_size Pointer to an integer holding the size of
+         * @param[in,out] inout_size Pointer to an integer holding the size of
          * the provided buffer, this value will be updated to reflect the actual size of
          * the output.
          * @return The result of the operation.
@@ -392,21 +475,25 @@ fn generate_builder(
 
         "#
         };
-        (implementation, max_size) = codegen::Codegen::generate(
-            /* buf_name */ "cert",
-            /* buf_size_name */ "cert_inout_size",
-            /* indent */ INDENT,
-            /* indent_lvl */ 1,
-            constants,
+        generated_code = codegen::Codegen::generate(
+            /* buf_name */ "out_buf",
+            /* buf_size_name */ "inout_size",
             &get_var_info,
-            gen,
+            build,
         )?;
     }
-    generate_fn_impl.push_str(&implementation);
+
+    let mut generate_fn_impl = String::new();
+    writeln!(
+        generate_fn_impl,
+        "rom_error_t {fn_name}({fn_params_str}) {{"
+    )?;
+    generate_fn_impl.push_str(&generated_code.code);
     generate_fn_impl.push_str("  return kErrorOk;\n");
     generate_fn_impl.push_str("}\n\n");
+    generated_code.code = generate_fn_impl;
 
-    Ok((generate_fn_def, generate_fn_impl, max_size))
+    Ok((generate_fn_def, generated_code))
 }
 
 // Decide whether a integer should use a special C type instead
@@ -425,58 +512,106 @@ fn c_variable_info(
     var_type: &VariableType,
 ) -> (VariableCodegenInfo, String) {
     match var_type {
-        VariableType::ByteArray { .. } => (
-            VariableCodegenInfo::Pointer {
-                ptr_expr: format!("{struct_expr}{name}"),
-                size_expr: format!("{struct_expr}{name}_size"),
-            },
-            indoc::formatdoc! {r#"
-                {INDENT}// Pointer to an array of bytes.
-                {INDENT}uint8_t *{name};
-                {INDENT}// Size of this array in bytes.
-                {INDENT}size_t {name}_size;
-                "#
-            },
-        ),
-        VariableType::Integer { size } => match c_integer_for_length(*size) {
+        VariableType::ByteArray { .. } => {
+            if var_type.has_constant_array_size() {
+                (
+                    VariableCodegenInfo::Pointer {
+                        ptr_expr: format!("{struct_expr}{name}"),
+                        size_expr: format!("{}", var_type.size()),
+                    },
+                    indoc::formatdoc! {r#"
+                        // Pointer to an array of bytes.
+                        uint8_t *{name};
+                    "#
+                    },
+                )
+            } else {
+                (
+                    VariableCodegenInfo::Pointer {
+                        ptr_expr: format!("{struct_expr}{name}"),
+                        size_expr: format!("{struct_expr}{name}_size"),
+                    },
+                    indoc::formatdoc! {r#"
+                        // Pointer to an array of bytes.
+                        uint8_t *{name};
+                        // Size of this array in bytes.
+                        size_t {name}_size;
+                    "#
+                    },
+                )
+            }
+        }
+        VariableType::Integer { .. } => match c_integer_for_length(var_type.size()) {
             Some(c_type) => (
-                VariableCodegenInfo::Int32 {
+                VariableCodegenInfo::Uint32 {
                     value_expr: format!("{struct_expr}{name}"),
                 },
-                format!("{INDENT}{c_type} {name};\n"),
-            ),
-            None => (
-                VariableCodegenInfo::Pointer {
-                    ptr_expr: format!("{struct_expr}{name}"),
-                    size_expr: format!("{struct_expr}{name}_size"),
-                },
-                indoc::formatdoc! {r#"
-                    {INDENT}// Pointer to an unsigned big-endian in integer.
-                    {INDENT}uint8_t *{name};
-                    {INDENT}// Size of this integer in bytes.
-                    {INDENT}size_t {name}_size;
-                    "#
-                },
+                format!("    {c_type} {name};\n"),
             ),
+            None => {
+                if var_type.has_constant_array_size() {
+                    (
+                        VariableCodegenInfo::Pointer {
+                            ptr_expr: format!("{struct_expr}{name}"),
+                            size_expr: format!("{}", var_type.size()),
+                        },
+                        indoc::formatdoc! {r#"
+                            // Pointer to an unsigned big-endian in integer.
+                            uint8_t *{name};
+                        "#
+                        },
+                    )
+                } else {
+                    (
+                        VariableCodegenInfo::Pointer {
+                            ptr_expr: format!("{struct_expr}{name}"),
+                            size_expr: format!("{struct_expr}{name}_size"),
+                        },
+                        indoc::formatdoc! {r#"
+                            // Pointer to an unsigned big-endian in integer.
+                            uint8_t *{name};
+                            // Size of this array in bytes.
+                            size_t {name}_size;
+                        "#
+                        },
+                    )
+                }
+            }
         },
-        VariableType::String { .. } => (
-            VariableCodegenInfo::Pointer {
-                ptr_expr: format!("{struct_expr}{name}"),
-                size_expr: format!("{struct_expr}{name}_len"),
-            },
-            indoc::formatdoc! {r#"
-                {INDENT}// Pointer to a (not necessarily zero-terminated) string.
-                {INDENT}char *{name};
-                {INDENT}// Length of this string.
-                {INDENT}size_t {name}_len;
-                "#
-            },
-        ),
+        VariableType::String { .. } => {
+            if var_type.has_constant_array_size() {
+                (
+                    VariableCodegenInfo::Pointer {
+                        ptr_expr: format!("{struct_expr}{name}"),
+                        size_expr: format!("{}", var_type.size()),
+                    },
+                    indoc::formatdoc! {r#"
+                        // Pointer to a (not necessarily zero-terminated) string.
+                        char *{name};
+                    "#
+                    },
+                )
+            } else {
+                (
+                    VariableCodegenInfo::Pointer {
+                        ptr_expr: format!("{struct_expr}{name}"),
+                        size_expr: format!("{struct_expr}{name}_len"),
+                    },
+                    indoc::formatdoc! {r#"
+                        // Pointer to a (not necessarily zero-terminated) string.
+                        char *{name};
+                        // Length of this string.
+                        size_t {name}_len;
+                    "#
+                    },
+                )
+            }
+        }
         VariableType::Boolean => (
             VariableCodegenInfo::Boolean {
                 value_expr: format!("{struct_expr}{name}"),
             },
-            format!("{INDENT}bool {name};\n"),
+            format!("bool {name};\n"),
         ),
     }
 }
diff --git a/sw/host/ot_certs/src/cwt.rs b/sw/host/ot_certs/src/cwt.rs
new file mode 100644
index 0000000000000..d32b0c06bbb3d
--- /dev/null
+++ b/sw/host/ot_certs/src/cwt.rs
@@ -0,0 +1,968 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::iter;
+use std::path::PathBuf;
+
+use crate::cbor;
+use crate::codegen::Codegen;
+use anyhow::{Context, Result, bail};
+use heck::{ToShoutySnakeCase, ToUpperCamelCase};
+use indexmap::IndexMap;
+use itertools::Itertools;
+use serde::{Deserialize, Serialize};
+
+#[derive(Clone, Debug, Deserialize, PartialEq, Eq, Serialize)]
+#[serde(deny_unknown_fields)]
+pub struct CwtTemplate {
+    /// Name of the certificate.
+    pub name: String,
+    /// Variable declarations.
+    pub variables: IndexMap<String, TemplateVariable>,
+    /// Constant declarations.
+    pub constants: IndexMap<String, TemplateConstant>,
+    /// Structure specification.
+    pub structure: TemplateStructure,
+}
+
+#[derive(Clone, Copy, Debug, Deserialize, PartialEq, Eq, Serialize)]
+#[serde(rename_all = "kebab-case")]
+pub enum VariableSize {
+    /// The maximum size of the variable.
+    MaxSize(u64),
+    /// The exact size of the variable.
+    ExactSize(u64),
+}
+
+#[derive(Clone, Copy, Debug, PartialEq, Eq, Deserialize, Serialize)]
+#[serde(rename_all = "kebab-case")]
+pub enum VariableType {
+    /// Raw array of bytes.
+    ByteArray,
+    /// UTF-8 encoded string.
+    String,
+    /// Signed 64-bit integer.
+    Integer,
+}
+
+/// Used to parse the variables defined in the template.
+#[derive(Clone, Copy, Debug, PartialEq, Eq, Deserialize, Serialize)]
+#[serde(tag = "type", rename_all = "kebab-case")]
+pub enum TemplateVariable {
+    /// Byte-array variable.
+    ByteArray {
+        #[serde(flatten)]
+        size: VariableSize,
+    },
+    /// String variable.
+    String {
+        #[serde(flatten)]
+        size: VariableSize,
+    },
+    /// Integer variable.
+    Integer,
+}
+
+/// Used to parse the constants defined in the template.
+#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
+#[serde(tag = "type", rename_all = "kebab-case")]
+pub enum TemplateConstant {
+    /// Byte-array constant.
+    ByteArray {
+        /// Big-endian hex-encoded bytes
+        #[serde(with = "hex::serde")]
+        value: Vec<u8>,
+    },
+    /// String constant.
+    String { value: String },
+    /// Integer constant.
+    Integer { value: i64 },
+}
+
+/// Used to parse the structures defined in the template.
+#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
+#[serde(untagged)]
+pub enum TemplateStructure {
+    /// A byte-array which encodes a CBOR structure.
+    #[serde(rename_all = "kebab-case")]
+    CborByteArray {
+        cbor_byte_array: Box<TemplateStructure>,
+    },
+    /// An item is a variable or a constant.
+    Item(String),
+    /// A map that consists of key-value pairs.
+    Map(IndexMap<String, TemplateStructure>),
+    /// An array that consists of values.
+    Array(Vec<TemplateStructure>),
+}
+
+// CodegenVar is used to unify the representation of TemplateVariable and TemplateConstant.
+#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
+struct CodegenVar {
+    name: String,
+    size: VariableSize,
+    value: CodegenVarValue,
+}
+
+type CodegenVarTable = IndexMap<String, CodegenVar>;
+
+#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
+enum CodegenVarValue {
+    ByteArray(Option<Vec<u8>>),
+    String(Option<String>),
+    Integer(Option<i64>),
+}
+
+impl CodegenVar {
+    fn from_template_variable(name: &str, var: &TemplateVariable) -> Result<Self> {
+        let name = name.to_owned();
+        let (size, value) = match var {
+            TemplateVariable::ByteArray { size } => (*size, CodegenVarValue::ByteArray(None)),
+            TemplateVariable::String { size } => (*size, CodegenVarValue::String(None)),
+            TemplateVariable::Integer => (VariableSize::MaxSize(8), CodegenVarValue::Integer(None)),
+        };
+
+        Ok(Self { name, size, value })
+    }
+
+    fn from_template_constant(name: &str, var: &TemplateConstant) -> Result<Self> {
+        let name = name.to_owned();
+        let (value, size) = match var {
+            TemplateConstant::ByteArray { value } => (
+                CodegenVarValue::ByteArray(Some(value.clone())),
+                VariableSize::ExactSize(value.len().try_into().with_context(|| {
+                    format!("the size of {name} is too large for u64: {}", value.len())
+                })?),
+            ),
+            TemplateConstant::String { value } => (
+                CodegenVarValue::String(Some(value.clone())),
+                VariableSize::ExactSize(value.len().try_into().with_context(|| {
+                    format!("the size of {name} is too large for u64: {}", value.len())
+                })?),
+            ),
+            TemplateConstant::Integer { value } => {
+                let arg = if *value >= 0 { *value } else { -(*value + 1) } as u64;
+                (
+                    CodegenVarValue::Integer(Some(*value)),
+                    VariableSize::ExactSize(cbor::arg_size(arg).0),
+                )
+            }
+        };
+
+        Ok(Self { name, size, value })
+    }
+
+    fn is_constant(&self) -> bool {
+        match &self.value {
+            CodegenVarValue::ByteArray(v) => v.is_some(),
+            CodegenVarValue::String(v) => v.is_some(),
+            CodegenVarValue::Integer(v) => v.is_some(),
+        }
+    }
+
+    fn variable_type(&self) -> VariableType {
+        match &self.value {
+            CodegenVarValue::ByteArray(_) => VariableType::ByteArray,
+            CodegenVarValue::String(_) => VariableType::String,
+            CodegenVarValue::Integer(_) => VariableType::Integer,
+        }
+    }
+
+    // Generate the input fields.
+    fn declarations(&self, prefix: &str) -> String {
+        assert!(!self.is_constant());
+
+        match self.value {
+            CodegenVarValue::ByteArray(_) => {
+                indoc::formatdoc! { r#"
+                    {prefix}uint8_t *{name};
+                    {prefix}size_t {name}_size;
+                    "#,
+                    name = self.name
+                }
+            }
+            CodegenVarValue::String(_) => {
+                indoc::formatdoc! { r#"
+                    {prefix}char *{name};
+                    {prefix}size_t {name}_size;
+                    "#,
+                    name = self.name
+                }
+            }
+            CodegenVarValue::Integer(_) => indoc::formatdoc! { r#"
+                {prefix}int64_t {name};
+                "#,
+                name = self.name
+            },
+        }
+    }
+
+    // Generate the expression of the value.
+    fn value_expression(&self) -> String {
+        assert!(!self.is_constant());
+        format!("values->{}", self.name)
+    }
+
+    // Generate the expression of the value size.
+    fn size_expression(&self) -> String {
+        assert!(!self.is_constant());
+        if self.variable_type() != VariableType::Integer {
+            format!("values->{}_size", self.name)
+        } else {
+            format!("cbor_calc_int_size(values->{})", self.name)
+        }
+    }
+}
+
+// CodegenStructure are stored inside a vector, and therefore we use indices to refer to other CodegenStructure.
+// `Var` represents a leaf node, while others represent different types of internal nodes.
+#[derive(Clone, Debug, PartialEq, Eq)]
+enum CodegenStructure<'a> {
+    Var(&'a CodegenVar),
+    CborByteArray(usize),
+    Map(Vec<(usize, usize)>),
+    Array(Vec<usize>),
+}
+
+impl CodegenStructure<'_> {
+    fn from_template<'a>(
+        template: &CwtTemplate,
+        vars: &'a CodegenVarTable,
+    ) -> Result<Vec<CodegenStructure<'a>>> {
+        let mut nodes = Vec::<CodegenStructure>::new();
+        let mut id_mapping = IndexMap::<String, usize>::new();
+        Self::build_codegen_structure(&template.structure, vars, &mut nodes, &mut id_mapping)
+            .context("build_codegen_structure failed")?;
+        Ok(nodes)
+    }
+
+    // Assign the indices in postorder.
+    // For later size computations, we could just iterate the array without DFS,
+    // because child nodes are always processed before their parent node.
+    fn build_codegen_structure<'a>(
+        cur: &TemplateStructure,
+        vars: &'a CodegenVarTable,
+        nodes: &mut Vec<CodegenStructure<'a>>,
+        var_ids: &mut IndexMap<String, usize>,
+    ) -> Result<usize> {
+        let node = match cur {
+            TemplateStructure::Item(name) => {
+                let var = vars
+                    .get(name)
+                    .with_context(|| format!("cannot find item {name} in template"))?;
+                CodegenStructure::Var(var)
+            }
+            TemplateStructure::CborByteArray { cbor_byte_array } => {
+                let inner = Self::build_codegen_structure(cbor_byte_array, vars, nodes, var_ids)?;
+                CodegenStructure::CborByteArray(inner)
+            }
+            TemplateStructure::Map(items) => {
+                let mut pairs = Vec::new();
+                for (k, v) in items {
+                    let item = TemplateStructure::Item(k.clone());
+                    let first = Self::build_codegen_structure(&item, vars, nodes, var_ids)?;
+                    let second = Self::build_codegen_structure(v, vars, nodes, var_ids)?;
+                    pairs.push((first, second));
+                }
+                CodegenStructure::Map(pairs)
+            }
+            TemplateStructure::Array(items) => {
+                let mut values = Vec::new();
+                for item in items {
+                    let value = Self::build_codegen_structure(item, vars, nodes, var_ids)?;
+                    values.push(value);
+                }
+                CodegenStructure::Array(values)
+            }
+        };
+
+        if let CodegenStructure::Var(var) = node {
+            // Check if the node for this Var is created before.
+            if var_ids.contains_key(&var.name) {
+                // If so, just get its id and return.
+                // This means that if a variable or a constant is used multiple times,
+                // there will be exactly one node to represent it.
+                Ok(var_ids[&var.name])
+            } else {
+                // Otherwise, create a new node, store its id in `var_ids` and return.
+                let idx = nodes.len();
+                nodes.push(node);
+                var_ids.insert(var.name.clone(), idx);
+                Ok(idx)
+            }
+        } else {
+            // Always create a new node for it and return.
+            let idx = nodes.len();
+            nodes.push(node);
+            Ok(idx)
+        }
+    }
+}
+
+// A CBOR data item (called `item` in the source code) consists of the following parts:
+//
+//   * major type (3 bit): the type of this data item
+//
+//   * additional information (5 bit): the information of `argument`
+//
+//   * argument: different meaning for different type
+//
+//               could be omitted if less than 24,
+//               `additional information` will hold the actual value in this case
+//
+//   * content: the content of the data type
+//
+//
+// |--------------------------------------------------------------|
+// | major type | additional information | argument |   content   |
+// |--------------------------------------------------------------|
+//
+// |-------------------------------------|
+//                 1 byte
+//                                       |----------|
+//                                         arg_size
+//                                                  |-------------|
+//                                                   content_size
+// |--------------------------------------------------------------|
+//                            item_size
+//
+//
+// Since we have CodegenStructure::CborByteArray, and there might be variables in the inner nodes,
+// we need to compute the size of the whole inner structure before generating its CBOR.
+//
+// We define `content_size`, `arg_size` and `item_size` for each CodegenStructure,
+// and represent them in `SizeExpression`.
+//
+// When the size of a given child item is known before runtime, it will be accumulated into the `constant` field.
+// Otherwise, we could only know the exact size until runtime, and therefore we mark it in dependencies.
+//
+//
+// The formulations are:
+//
+//   `content_size` = constant + `item_size`` of each dependent CodegenStructure, or
+//                    constant + size expression of the CodegenVar
+//
+//   `item_size` = 1 + ArgSize::Constant + `content_size` or
+//                 1 + encoded size of `content_size` + `content_size`
+//
+#[derive(Clone, Debug, PartialEq, Eq)]
+struct SizeExpression<'a> {
+    index: usize,
+    arg_size: ArgSize,
+    constant: u64,
+    dependencies: SizeDependency<'a>,
+}
+
+#[derive(Clone, Debug, PartialEq, Eq)]
+enum ArgSize {
+    // Fixed size.
+    Constant(u64),
+    // Used for data types whose `argument` is its `content_size`.
+    LengthOfContentSize,
+}
+
+#[derive(Clone, Debug, PartialEq, Eq)]
+enum SizeDependency<'a> {
+    Var(&'a CodegenVar),
+    SubItemSize(Vec<usize>),
+}
+
+impl SizeExpression<'_> {
+    // Return a SizeExpression whose `content_size` depends on a variable.
+    fn from_codegenvar(index: usize, arg_size: ArgSize, var: &CodegenVar) -> SizeExpression<'_> {
+        SizeExpression {
+            index,
+            arg_size,
+            constant: 0,
+            dependencies: SizeDependency::Var(var),
+        }
+    }
+
+    // Return a SizeExpression with empty SubItemSize dependency.
+    fn empty_dependency(index: usize, arg_size: ArgSize, constant: u64) -> Self {
+        SizeExpression {
+            index,
+            arg_size,
+            constant,
+            dependencies: SizeDependency::SubItemSize(vec![]),
+        }
+    }
+
+    fn add_constant(&mut self, constant: u64) {
+        self.constant += constant;
+    }
+
+    fn add_dependency(&mut self, index: usize) {
+        if let SizeDependency::SubItemSize(deps) = &mut self.dependencies {
+            deps.push(index);
+        } else {
+            panic!(
+                "add_dependency should be only called on SizeExpression with SubItemSize dependency."
+            )
+        }
+    }
+
+    fn is_constant(&self) -> bool {
+        match &self.dependencies {
+            SizeDependency::Var(_) => false,
+            SizeDependency::SubItemSize(items) => items.is_empty(),
+        }
+    }
+
+    fn content_size(&self) -> u64 {
+        assert!(self.is_constant());
+        self.constant
+    }
+
+    fn item_size(&self) -> u64 {
+        assert!(self.is_constant());
+        match self.arg_size {
+            ArgSize::Constant(arg) => 1 + arg + self.constant,
+            ArgSize::LengthOfContentSize => 1 + cbor::arg_size(self.constant).0 + self.constant,
+        }
+    }
+
+    // Generate the expression to compute `content_size`.
+    fn content_size_expression(&self) -> String {
+        let mut terms = Vec::new();
+
+        if self.constant > 0 {
+            terms.push(self.constant.to_string());
+        }
+
+        match &self.dependencies {
+            SizeDependency::Var(var) => terms.push(var.size_expression()),
+            SizeDependency::SubItemSize(items) => {
+                terms.extend(items.iter().map(|idx| format!("item_size_{idx}")))
+            }
+        };
+
+        itertools::Itertools::intersperse(terms.into_iter(), " + ".to_owned()).collect()
+    }
+
+    // Generate the expression to compute `item_size`.
+    // If not a constant, the result expression will always depend on its `content_size`.
+    fn item_size_expression(&self) -> String {
+        if self.is_constant() {
+            self.item_size().to_string()
+        } else {
+            match &self.arg_size {
+                ArgSize::Constant(arg) => {
+                    format!("{k} + content_size_{idx}", k = 1 + arg, idx = self.index)
+                }
+                ArgSize::LengthOfContentSize => format!(
+                    "1 + cbor_calc_arg_size(content_size_{idx}) + content_size_{idx}",
+                    idx = self.index
+                ),
+            }
+        }
+    }
+}
+
+// Derive the size expression of each CodegenStructure.
+//
+// `get_var_size` is used to query the exact size of CodegenVar.
+// If the return value is None, it means that the size can't be determined until runtime.
+//
+// The reason to make this function as a parameter is that we currently have two scenarios:
+//
+//   1. get the exact size to generate the size computation code
+//
+//      `get_var_size` only returns a value when the size is exact.
+//
+//   2. get the maximum size of this structure
+//
+//      `get_var_size` always returns the maximum size.
+fn derive_size_expressions<'a>(
+    nodes: &'a [CodegenStructure],
+    get_var_size: &impl Fn(&CodegenVar) -> Option<u64>,
+) -> Result<Vec<SizeExpression<'a>>> {
+    let mut exps = Vec::<SizeExpression>::new();
+
+    // The items in the slice are alreay sorted in postorder.
+    for (idx, node) in nodes.iter().enumerate() {
+        // A helper function to generate a size expression from CodegenVar.
+        let from_var = |arg_size, var| {
+            if let Some(size) = get_var_size(var) {
+                SizeExpression::empty_dependency(idx, arg_size, size)
+            } else {
+                SizeExpression::from_codegenvar(idx, arg_size, var)
+            }
+        };
+
+        // A helper function to generate a size expression from dependent items.
+        let from_deps = |arg_size, idxs: &mut dyn Iterator<Item = &usize>| {
+            let mut exp = SizeExpression::empty_dependency(idx, arg_size, 0);
+            for idx in idxs {
+                let dep = &exps[*idx];
+                if dep.is_constant() {
+                    exp.add_constant(dep.item_size());
+                } else {
+                    exp.add_dependency(*idx);
+                }
+            }
+            exp
+        };
+
+        let exp = match node {
+            CodegenStructure::Var(var) => match var.variable_type() {
+                VariableType::ByteArray => from_var(ArgSize::LengthOfContentSize, var),
+                VariableType::String => from_var(ArgSize::LengthOfContentSize, var),
+                VariableType::Integer => from_var(ArgSize::Constant(0), var),
+            },
+            CodegenStructure::CborByteArray(inner) => {
+                from_deps(ArgSize::LengthOfContentSize, &mut iter::once(inner))
+            }
+            CodegenStructure::Map(items) => {
+                let len = items.len().try_into().with_context(|| {
+                    format!("the size of the map is too large for u64: {}", items.len())
+                })?;
+                from_deps(
+                    ArgSize::Constant(cbor::arg_size(len).0),
+                    &mut items.iter().flat_map(|(a, b)| [a, b]),
+                )
+            }
+            CodegenStructure::Array(items) => {
+                let len = items.len().try_into().with_context(|| {
+                    format!(
+                        "the size of the array is too large for u64: {}",
+                        items.len()
+                    )
+                })?;
+                from_deps(ArgSize::Constant(cbor::arg_size(len).0), &mut items.iter())
+            }
+        };
+
+        exps.push(exp);
+    }
+
+    Ok(exps)
+}
+
+fn collect_codegenvar(template: &CwtTemplate) -> Result<CodegenVarTable> {
+    let mut vars = IndexMap::<String, CodegenVar>::new();
+
+    for (name, var) in &template.variables {
+        let ret = vars.insert(name.clone(), CodegenVar::from_template_variable(name, var)?);
+        if ret.is_some() {
+            bail!("A variable name {} already exists", name);
+        }
+    }
+
+    for (name, var) in &template.constants {
+        let ret = vars.insert(name.clone(), CodegenVar::from_template_constant(name, var)?);
+        if ret.is_some() {
+            bail!("A constant name {} already exists", name);
+        }
+    }
+
+    Ok(vars)
+}
+
+// Generate the data members of the input structure.
+fn generate_input_fields(vars: &CodegenVarTable, indent: &str) -> String {
+    vars.iter()
+        .filter(|(_, var)| !var.is_constant())
+        .map(|(_, var)| var.declarations(indent))
+        .collect()
+}
+
+// Generate the size computation code for each item whose size can't be determined until runtime.
+fn generate_size_computations(size_exps: &[SizeExpression], prefix: &str) -> Result<String> {
+    assert!(!size_exps.is_empty());
+
+    let mut code = String::new();
+    for size_exp in size_exps.iter().filter(|exp| !exp.is_constant()) {
+        code += &format!(
+            "{prefix}const size_t content_size_{} = {};\n",
+            size_exp.index,
+            size_exp.content_size_expression()
+        );
+        code += &format!(
+            "{prefix}const size_t item_size_{} = {};\n",
+            size_exp.index,
+            size_exp.item_size_expression()
+        );
+    }
+
+    Ok(code)
+}
+
+// Generate the code to check the sizes of input arguments.
+// The first return value is used to check all input sizes.
+// The second return value is used to check the final output size.
+fn generate_size_checks(
+    vars: &CodegenVarTable,
+    whole_struct_size: &SizeExpression,
+    prefix: &str,
+) -> Result<(String, String)> {
+    let mut input_checks = String::new();
+
+    // Check the size of each input variable.
+    for (_, var) in vars
+        .iter()
+        .filter(|(_, var)| !var.is_constant() && var.variable_type() != VariableType::Integer)
+    {
+        let size_exp = var.size_expression();
+        let cond = match var.size {
+            VariableSize::ExactSize(size) => format!("!= {size}"),
+            VariableSize::MaxSize(size) => format!("> {size}"),
+        };
+
+        input_checks +=
+            &format!("{prefix}if ({size_exp} {cond}) return kErrorCertInvalidArgument;\n");
+    }
+
+    let size_bound = if whole_struct_size.is_constant() {
+        whole_struct_size.item_size().to_string()
+    } else {
+        format!("item_size_{idx}", idx = whole_struct_size.index)
+    };
+
+    // Check the input buffer size.
+    input_checks +=
+        &format!("{prefix}if (*inout_size < {size_bound}) return kErrorCertInvalidSize;\n");
+
+    // Make sure that the output size is the same as calculated root `item_size`.
+    let output_checks =
+        format!("{prefix}if (*inout_size != {size_bound}) return kErrorCertInternal;\n");
+
+    Ok((input_checks, output_checks))
+}
+
+fn collect_preorder_indicies_helper(nodes: &[CodegenStructure], root: usize, res: &mut Vec<usize>) {
+    res.push(root);
+    match &nodes[root] {
+        CodegenStructure::Var(_) => {}
+        CodegenStructure::CborByteArray(inner) => {
+            collect_preorder_indicies_helper(nodes, *inner, res);
+        }
+        CodegenStructure::Map(items) => {
+            for (k, v) in items {
+                collect_preorder_indicies_helper(nodes, *k, res);
+                collect_preorder_indicies_helper(nodes, *v, res);
+            }
+        }
+        CodegenStructure::Array(items) => {
+            for item in items {
+                collect_preorder_indicies_helper(nodes, *item, res);
+            }
+        }
+    }
+}
+
+fn collect_preorder_indicies(nodes: &[CodegenStructure]) -> Vec<usize> {
+    let mut res = Vec::new();
+    collect_preorder_indicies_helper(nodes, nodes.len() - 1, &mut res);
+    res
+}
+
+// Each CodegenStructure maps to a CodeBlock.
+type CodeBlock = Vec<GeneratedCode>;
+
+#[derive(Clone, Debug, PartialEq, Eq)]
+enum GeneratedCode {
+    // A single CBOR-function call.
+    FunctionCall(String),
+    // If all the arguments are constants, derive its resulting bytes directly.
+    CborBytes(Vec<u8>),
+}
+
+struct GeneratedCborInstructions {
+    constant_definitions: String,
+    cbor_instructions: String,
+}
+
+fn generate_cbor_instructions(
+    nodes: &[CodegenStructure],
+    size_exps: &[SizeExpression],
+    prefix: &str,
+) -> Result<GeneratedCborInstructions> {
+    assert!(nodes.len() == size_exps.len());
+
+    let call_wrapper = |func_call: String| {
+        indoc::formatdoc! { r#"
+            {prefix}{func_call};
+            "#
+        }
+    };
+
+    let gen_inst = |inst: String| GeneratedCode::FunctionCall(call_wrapper(inst));
+
+    // For each CodegenStructure, generate its CodeBlock first.
+    let mut code_blocks = Vec::<CodeBlock>::new();
+    for (idx, (node, size_exp)) in nodes.iter().zip(size_exps.iter()).enumerate() {
+        let code_block = match node {
+            CodegenStructure::Var(var) => match &var.value {
+                CodegenVarValue::ByteArray(val) => {
+                    let header = if let VariableSize::ExactSize(size) = var.size {
+                        GeneratedCode::CborBytes(cbor::byte_array_header(size))
+                    } else {
+                        gen_inst(format!("cbor_write_bstr_header(&cbor, content_size_{idx})"))
+                    };
+
+                    let content = if let Some(constant) = val {
+                        GeneratedCode::CborBytes(constant.clone())
+                    } else {
+                        let val = var.value_expression();
+                        let size = var.size_expression();
+                        gen_inst(format!("cbor_write_raw_bytes(&cbor, {val}, {size})"))
+                    };
+
+                    vec![header, content]
+                }
+                CodegenVarValue::String(val) => {
+                    let header = if let VariableSize::ExactSize(size) = var.size {
+                        GeneratedCode::CborBytes(cbor::string_header(size))
+                    } else {
+                        gen_inst(format!("cbor_write_tstr_header(&cbor, content_size_{idx})"))
+                    };
+
+                    let content = if let Some(constant) = val {
+                        GeneratedCode::CborBytes(constant.as_bytes().to_vec())
+                    } else {
+                        let val = var.value_expression();
+                        let size = var.size_expression();
+                        gen_inst(format!(
+                            "cbor_write_raw_bytes(&cbor, (uint8_t *){val}, {size})"
+                        ))
+                    };
+
+                    vec![header, content]
+                }
+                CodegenVarValue::Integer(val) => match val {
+                    Some(constant) => {
+                        vec![GeneratedCode::CborBytes(cbor::int(*constant))]
+                    }
+                    None => {
+                        let val = var.value_expression();
+                        vec![gen_inst(format!("cbor_write_int(&cbor, {val})"))]
+                    }
+                },
+            },
+            CodegenStructure::CborByteArray(_) => {
+                if size_exp.is_constant() {
+                    let size = size_exp.content_size();
+                    vec![GeneratedCode::CborBytes(cbor::byte_array_header(size))]
+                } else {
+                    vec![gen_inst(format!(
+                        "cbor_write_bstr_header(&cbor, content_size_{idx})"
+                    ))]
+                }
+            }
+            CodegenStructure::Map(items) => {
+                let len = items.len().try_into().with_context(|| {
+                    format!("the size of the map is too large for u64: {}", items.len())
+                })?;
+                vec![GeneratedCode::CborBytes(cbor::map_header(len))]
+            }
+            CodegenStructure::Array(items) => {
+                let len = items.len().try_into().with_context(|| {
+                    format!(
+                        "the size of the array is too large for u64: {}",
+                        items.len()
+                    )
+                })?;
+                vec![GeneratedCode::CborBytes(cbor::array_header(len))]
+            }
+        };
+
+        code_blocks.push(code_block);
+    }
+
+    // Collect the code blocks, and then linearize them into a sequence of single operations.
+    let order = collect_preorder_indicies(nodes);
+    let insts = order.iter().flat_map(|&idx| code_blocks[idx].clone());
+
+    let mut constant_definitions = String::new();
+    let mut cbor_instructions = String::new();
+
+    // For neighboring CBOR, we collect them into a single array and write them at once.
+    let mut idx = 0usize;
+    for (is_constant, chunk) in &insts.chunk_by(|inst| matches!(inst, GeneratedCode::CborBytes(_)))
+    {
+        if is_constant {
+            let buf = chunk.flat_map(|inst| match inst {
+                GeneratedCode::CborBytes(inner) => inner,
+                _ => panic!("Shouldn't have any non GeneratedCode::CborBytes variant."),
+            });
+
+            let bytes = buf.map(|ch| format!("{}", ch));
+            let initializer: String =
+                itertools::Itertools::intersperse(bytes, ", ".to_owned()).collect();
+
+            constant_definitions += &indoc::formatdoc! { r#"
+                {prefix}const static uint8_t binary_{idx}[] = {{{initializer}}};
+                "#};
+            cbor_instructions += &call_wrapper(format!(
+                "cbor_write_raw_bytes(&cbor, binary_{idx}, sizeof(binary_{idx}))"
+            ));
+
+            idx += 1;
+        } else {
+            for block in chunk {
+                match block {
+                    GeneratedCode::FunctionCall(inner) => cbor_instructions += &inner,
+                    _ => panic!("Shouldn't have any non GeneratedCode::FunctionCall variant."),
+                }
+            }
+        }
+    }
+
+    Ok(GeneratedCborInstructions {
+        constant_definitions,
+        cbor_instructions,
+    })
+}
+
+fn generate_header(from_file: &str, template_name: &str, max_size: u64, decls: String) -> String {
+    let preproc_guard_include = template_name.to_shouty_snake_case();
+    let enum_name = template_name.to_upper_camel_case();
+
+    indoc::formatdoc! { r#"
+        // Copyright lowRISC contributors (OpenTitan project).
+        // Licensed under the Apache License, Version 2.0, see LICENSE for details.
+        // SPDX-License-Identifier: Apache-2.0
+
+        // This file was automatically generated using opentitantool from:
+        // {from_file}
+        #ifndef __{preproc_guard_include}__
+        #define __{preproc_guard_include}__
+
+        #include "sw/device/lib/base/status.h"
+
+        typedef struct {template_name}_values {{
+        {decls}}} {template_name}_values_t;
+
+        enum {{
+          k{enum_name}MaxVariableSizeBytes = {max_size},
+        }};
+
+        rom_error_t {template_name}_build({template_name}_values_t *values, uint8_t *output, size_t *inout_size);
+
+        #endif
+    "#}
+}
+
+fn generate_source(
+    from_file: &str,
+    template_name: &str,
+    constant_definitions: &str,
+    size_computations: &str,
+    input_size_checks: &str,
+    output_size_checks: &str,
+    cbor_instructions: &str,
+) -> String {
+    let source_template = indoc::formatdoc! { r#"
+        // Copyright lowRISC contributors (OpenTitan project).
+        // Licensed under the Apache License, Version 2.0, see LICENSE for details.
+        // SPDX-License-Identifier: Apache-2.0
+
+        // This file was automatically generated using opentitantool from:
+        // {from_file}
+
+        #include "{template_name}.h"
+        #include "sw/device/silicon_creator/lib/cert/cbor.h"
+
+        {constant_definitions}
+        rom_error_t {template_name}_build({template_name}_values_t *values, uint8_t *buffer, size_t *inout_size) {{
+        {size_computations}
+        {input_size_checks}
+          cbor_out_t cbor;
+          cbor_out_init(&cbor, buffer);
+
+        {cbor_instructions}
+          *inout_size = cbor_out_size(&cbor);
+        {output_size_checks}
+          return kErrorOk;
+        }}
+    "#};
+
+    source_template
+}
+
+impl CwtTemplate {
+    pub fn from_hjson_str(content: &str) -> Result<CwtTemplate> {
+        deser_hjson::from_str(content).context("CwtTemplate::from_hjson_str failed")
+    }
+}
+
+pub fn load_cwt_template(path: &PathBuf) -> Result<CwtTemplate> {
+    let template_content = fs::read_to_string(path)
+        .with_context(|| format!("could not load the template file {}", path.display()))?;
+
+    CwtTemplate::from_hjson_str(&template_content).with_context(|| {
+        format!(
+            "failed to parse CwtTemplate from the template file {}",
+            path.display()
+        )
+    })
+}
+
+pub fn generate_cert(from_file: &str, template: &CwtTemplate) -> Result<Codegen> {
+    let vars = collect_codegenvar(template).context("collect_codegenvar failed")?;
+
+    let structures = CodegenStructure::from_template(template, &vars)
+        .context("CodegenStructure::from_template failed")?;
+
+    let max_size = {
+        let exp = derive_size_expressions(&structures, &|var| match var.size {
+            VariableSize::ExactSize(size) => Some(size),
+            VariableSize::MaxSize(size) => Some(size),
+        })
+        .context("derive_size_expressions for maximum size failed")?;
+
+        exp.last()
+            .context("there isn't any item in the structure")?
+            .item_size()
+    };
+
+    let decls = generate_input_fields(&vars, "  ");
+
+    let source_h = generate_header(from_file, &template.name, max_size, decls);
+
+    let exact_sizes = derive_size_expressions(&structures, &|var| match var.size {
+        VariableSize::ExactSize(size) => Some(size),
+        _ => None,
+    })
+    .context("derive_size_expressions for exact size failed")?;
+
+    let size_computations = generate_size_computations(&exact_sizes, "  ")
+        .context("generate_size_computations failed")?;
+
+    let (input_size_checks, output_size_checks) = generate_size_checks(
+        &vars,
+        exact_sizes
+            .last()
+            .context("there isn't any item in the structure")?,
+        "  ",
+    )
+    .context("generate_size_checks failed")?;
+
+    let GeneratedCborInstructions {
+        constant_definitions,
+        cbor_instructions,
+    } = generate_cbor_instructions(&structures, &exact_sizes, "  ")
+        .context("generate_cbor_instructions failed")?;
+
+    let source_c = generate_source(
+        from_file,
+        &template.name,
+        &constant_definitions,
+        &size_computations,
+        &input_size_checks,
+        &output_size_checks,
+        &cbor_instructions,
+    );
+
+    // TODO: finish the unittest
+    let source_unittest = String::new();
+
+    Ok(Codegen {
+        source_h,
+        source_c,
+        source_unittest,
+    })
+}
diff --git a/sw/host/ot_certs/src/lib.rs b/sw/host/ot_certs/src/lib.rs
index 8f70a4c7c2225..19f1fa6f97584 100644
--- a/sw/host/ot_certs/src/lib.rs
+++ b/sw/host/ot_certs/src/lib.rs
@@ -16,6 +16,18 @@
 //! in the future.
 
 pub mod asn1;
+pub mod cbor;
 pub mod codegen;
+pub mod cwt;
 pub mod template;
 pub mod x509;
+
+use clap::ValueEnum;
+use serde::{Deserialize, Serialize};
+
+/// Supported OpenTitan certificate formats.
+#[derive(Clone, Debug, ValueEnum, Serialize, Deserialize)]
+pub enum CertFormat {
+    X509,
+    Cwt,
+}
diff --git a/sw/host/ot_certs/src/template/mod.rs b/sw/host/ot_certs/src/template/mod.rs
index adc992235e7d5..c9cc972d350a4 100644
--- a/sw/host/ot_certs/src/template/mod.rs
+++ b/sw/host/ot_certs/src/template/mod.rs
@@ -70,11 +70,12 @@ pub struct Certificate {
     /// X509 certificate's public key.
     pub subject_public_key_info: SubjectPublicKeyInfo,
     /// X509 certificate's authority key identifier.
-    pub authority_key_identifier: Value<Vec<u8>>,
+    pub authority_key_identifier: Option<Value<Vec<u8>>>,
     /// X509 certificate's public key identifier.
-    pub subject_key_identifier: Value<Vec<u8>>,
+    pub subject_key_identifier: Option<Value<Vec<u8>>>,
     // X509 basic constraints extension, optional.
     pub basic_constraints: Option<BasicConstraints>,
+    pub key_usage: Option<KeyUsage>,
     /// X509 Subject Alternative Name extension, optional.
     #[serde(default)]
     pub subject_alt_name: Name,
@@ -99,6 +100,13 @@ pub struct BasicConstraints {
     pub ca: Value<bool>,
 }
 
+#[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
+pub struct KeyUsage {
+    pub digital_signature: Option<Value<bool>>,
+    pub key_agreement: Option<Value<bool>>,
+    pub cert_sign: Option<Value<bool>>,
+}
+
 #[derive(Clone, Debug, PartialEq, Eq, Deserialize, Serialize)]
 #[serde(tag = "type", rename_all = "snake_case")]
 pub enum CertificateExtension {
@@ -360,30 +368,121 @@ pub enum HashAlgorithm {
     Sha256,
 }
 
+/// SizeRange sets the range of the variable it represented.
+#[derive(Clone, Copy, Debug, Deserialize, PartialEq, Eq, Serialize)]
+#[serde(rename_all = "kebab-case")]
+pub enum SizeRange {
+    /// The [min, max] size of the variable in bytes.
+    RangeSize(usize, usize),
+    /// Equivalent to RangeSize(size, size).
+    ExactSize(usize),
+}
+
+impl SizeRange {
+    pub fn range(self) -> (usize, usize) {
+        match self {
+            Self::RangeSize(min_size, max_size) => (min_size, max_size),
+            Self::ExactSize(size) => (size, size),
+        }
+    }
+}
+
 /// Declaration of a variable that can be filled into the template.
 #[derive(Clone, Copy, Debug, PartialEq, Eq, Deserialize, Serialize)]
 #[serde(tag = "type", rename_all = "kebab-case")]
 pub enum VariableType {
     /// Raw array of bytes.
+    #[serde(rename_all = "kebab-case")]
     ByteArray {
-        /// Length in bytes for this variable.
-        size: usize,
+        #[serde(flatten)]
+        size: SizeRange,
+
+        /// The MSb will always be set when encoded as an integer.
+        tweak_msb: Option<bool>,
     },
     /// Signed integer: such an integer is represented by an array of
     /// in big-endian.
     Integer {
-        /// Maximum size in bytes for this variable.
-        size: usize,
+        #[serde(flatten)]
+        size: SizeRange,
     },
     /// UTF-8 encoded String.
     String {
-        /// Maximum size in bytes for this variable.
-        size: usize,
+        #[serde(flatten)]
+        size: SizeRange,
     },
     /// Boolean variable.
     Boolean,
 }
 
+impl VariableType {
+    /// Return the maximum array size of the variable.
+    pub fn size(&self) -> usize {
+        self.array_size().1
+    }
+
+    /// Return true if the variable uses msb tweak trick.
+    pub fn use_msb_tweak(&self) -> bool {
+        use VariableType::*;
+        matches!(
+            self,
+            ByteArray {
+                tweak_msb: Some(true),
+                ..
+            }
+        )
+    }
+
+    /// Return true if the user guarantees to pass a fixed-length array for
+    /// this variable.
+    pub fn has_constant_array_size(&self) -> bool {
+        let (min_size, max_size) = self.array_size();
+        min_size == max_size
+    }
+
+    /// Return the the user's guarantee on the array size passing for this
+    /// variable.
+    ///
+    /// The result is the closed range [min, max].
+    pub fn array_size(&self) -> (usize, usize) {
+        use VariableType::*;
+        match self {
+            ByteArray { size, .. } | String { size, .. } => size.range(),
+            // The array buffer for integer should always have the maximum size.
+            Integer { size, .. } => (size.range().1, size.range().1),
+            Boolean => panic!("Boolean variable has no array size"),
+        }
+    }
+
+    /// Return the the user's guarantee on the size of the integer value
+    /// represented by the u8 array.
+    ///
+    /// `extra_bytes` argument specifies the amount of extra bytes that
+    /// will be added when the MSb is set.
+    ///
+    /// The result is the closed range [min, max].
+    pub fn int_size(&self, extra_bytes: usize) -> (usize, usize) {
+        use VariableType::*;
+        match self {
+            ByteArray {
+                tweak_msb: Some(true),
+                ..
+            } => {
+                if !self.has_constant_array_size() {
+                    panic!("Tweak MSb of var-sized ByteArray is not supported");
+                }
+                (self.size() + extra_bytes, self.size() + extra_bytes)
+            }
+            ByteArray { .. } => panic!(
+                "Encoding ByteArray variable without tweak-msb as an integer is not supported"
+            ),
+            Integer { size, .. } => (size.range().0, size.range().1 + extra_bytes),
+            String { .. } => panic!("String variable has no integer size"),
+            Boolean => panic!("Boolean variable has no integer size"),
+        }
+    }
+}
+
 impl Template {
     pub fn from_hjson_str(content: &str) -> Result<Template> {
         Ok(deser_hjson::from_str(content)?)
@@ -398,6 +497,8 @@ mod tests {
     /// Test parsing a typical cdi_owner template.
     #[test]
     fn cdi_owner() {
+        use SizeRange::*;
+
         // Input string for a Hjson template.
         let input = indoc! {r#"
             {
@@ -406,43 +507,46 @@ mod tests {
               variables: {
                 owner_pub_key_ec_x: {
                   type: "integer",
-                  size: 32,
+                  exact-size: 32,
                 },
                 owner_pub_key_ec_y: {
                   type: "integer",
-                  size: 32,
+                  exact-size: 32,
                 },
                 owner_pub_key_id: {
                   type: "byte-array",
-                  size: 20,
+                  exact-size: 20,
+                  tweak-msb: true
                 },
                 signing_pub_key_id: {
                   type: "byte-array",
-                  size: 20,
+                  exact-size: 20,
+                  tweak-msb: true
                 },
                 rom_ext_hash: {
                   type: "byte-array",
-                  size: 20,
+                  exact-size: 20,
                 },
                 ownership_manifest_hash: {
                   type: "byte-array",
-                  size: 20,
+                  exact-size: 20,
                 },
                 rom_ext_security_version: {
-                  type: "integer",
-                  size: 4,
+                  type: "byte-array",
+                  exact-size: 4,
+                  tweak-msb: true,
                 }
                 layer: {
                   type: "integer",
-                  size: 4,
+                  range-size: [1, 4],
                 }
                 cert_signature_r: {
                   type: "integer",
-                  size: 32,
+                  range-size: [24, 32],
                 },
                 cert_signature_s: {
                   type: "integer",
-                  size: 32,
+                  range-size: [24, 32],
                 },
               },
 
@@ -466,12 +570,13 @@ mod tests {
                 },
                 authority_key_identifier: { var: "signing_pub_key_id" },
                 subject_key_identifier: { var: "owner_pub_key_id" },
+                key_usage: { key_agreement: true },
                 private_extensions: [
                     {
                         type: "dice_tcb_info",
                         vendor: "OpenTitan",
                         model: "ROM_EXT",
-                        svn: { var: "rom_ext_security_version" },
+                        svn: { var: "rom_ext_security_version", convert: "big-endian" },
                         layer: { var: "layer" },
                         version: "ES",
                         fw_ids: [
@@ -502,40 +607,68 @@ mod tests {
         let variables = IndexMap::from([
             (
                 "owner_pub_key_ec_x".to_string(),
-                VariableType::Integer { size: 32 },
+                VariableType::Integer {
+                    size: ExactSize(32),
+                },
             ),
             (
                 "owner_pub_key_ec_y".to_string(),
-                VariableType::Integer { size: 32 },
+                VariableType::Integer {
+                    size: ExactSize(32),
+                },
             ),
             (
                 "owner_pub_key_id".to_string(),
-                VariableType::ByteArray { size: 20 },
+                VariableType::ByteArray {
+                    size: ExactSize(20),
+                    tweak_msb: Some(true),
+                },
             ),
             (
                 "signing_pub_key_id".to_string(),
-                VariableType::ByteArray { size: 20 },
+                VariableType::ByteArray {
+                    size: ExactSize(20),
+                    tweak_msb: Some(true),
+                },
             ),
             (
                 "rom_ext_hash".to_string(),
-                VariableType::ByteArray { size: 20 },
+                VariableType::ByteArray {
+                    size: ExactSize(20),
+                    tweak_msb: None,
+                },
             ),
             (
                 "ownership_manifest_hash".to_string(),
-                VariableType::ByteArray { size: 20 },
+                VariableType::ByteArray {
+                    size: ExactSize(20),
+                    tweak_msb: None,
+                },
             ),
             (
                 "rom_ext_security_version".to_string(),
-                VariableType::Integer { size: 4 },
+                VariableType::ByteArray {
+                    size: ExactSize(4),
+                    tweak_msb: Some(true),
+                },
+            ),
+            (
+                "layer".to_string(),
+                VariableType::Integer {
+                    size: RangeSize(1, 4),
+                },
             ),
-            ("layer".to_string(), VariableType::Integer { size: 4 }),
             (
                 "cert_signature_r".to_string(),
-                VariableType::Integer { size: 32 },
+                VariableType::Integer {
+                    size: RangeSize(24, 32),
+                },
             ),
             (
                 "cert_signature_s".to_string(),
-                VariableType::Integer { size: 32 },
+                VariableType::Integer {
+                    size: RangeSize(24, 32),
+                },
             ),
         ]);
 
@@ -559,14 +692,22 @@ mod tests {
                     y: Value::variable("owner_pub_key_ec_y"),
                 },
             }),
-            authority_key_identifier: Value::variable("signing_pub_key_id"),
-            subject_key_identifier: Value::variable("owner_pub_key_id"),
+            authority_key_identifier: Some(Value::variable("signing_pub_key_id")),
+            subject_key_identifier: Some(Value::variable("owner_pub_key_id")),
             basic_constraints: None,
+            key_usage: Some(KeyUsage {
+                digital_signature: None,
+                key_agreement: Some(Value::literal(true)),
+                cert_sign: None,
+            }),
             subject_alt_name: vec![],
             private_extensions: vec![CertificateExtension::DiceTcbInfo(DiceTcbInfoExtension {
                 vendor: Some(Value::literal("OpenTitan")),
                 model: Some(Value::literal("ROM_EXT")),
-                svn: Some(Value::variable("rom_ext_security_version")),
+                svn: Some(Value::convert(
+                    "rom_ext_security_version",
+                    Conversion::BigEndian,
+                )),
                 layer: Some(Value::variable("layer")),
                 version: Some(Value::literal("ES")),
                 fw_ids: Some(Vec::from([
diff --git a/sw/host/ot_certs/src/template/subst.rs b/sw/host/ot_certs/src/template/subst.rs
index 42c3012dd1adb..47e85a2e8e137 100644
--- a/sw/host/ot_certs/src/template/subst.rs
+++ b/sw/host/ot_certs/src/template/subst.rs
@@ -5,17 +5,17 @@
 //! This module defines substitution data that can be used to replace the
 //! variables in a template by actual values.
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use hex::{FromHex, ToHex};
 use indexmap::IndexMap;
-use num_bigint_dig::{BigUint, ToBigInt};
+use num_bigint_dig::{BigUint, ToBigUint};
 use num_traits::Num;
 use serde::{Deserialize, Serialize};
 
 use crate::template::{
     BasicConstraints, Certificate, CertificateExtension, Conversion, DiceTcbInfoExtension,
-    DiceTcbInfoFlags, EcPublicKey, EcPublicKeyInfo, EcdsaSignature, FirmwareId, Signature,
-    SubjectPublicKeyInfo, Template, Value, Variable, VariableType,
+    DiceTcbInfoFlags, EcPublicKey, EcPublicKeyInfo, EcdsaSignature, FirmwareId, KeyUsage,
+    Signature, SizeRange, SubjectPublicKeyInfo, Template, Value, Variable, VariableType,
 };
 
 /// Substitution value: this is the raw value loaded from a hjson/json file
@@ -24,7 +24,7 @@ use crate::template::{
 #[serde(untagged)]
 pub enum SubstValue {
     ByteArray(Vec<u8>),
-    Int32(i32),
+    Uint32(u32),
     String(String),
     Boolean(bool),
 }
@@ -67,9 +67,9 @@ impl SubstValue {
     // the size constraint will be enforced.
     pub fn parse(&self, var_type: &VariableType) -> Result<SubstValue> {
         match *var_type {
-            VariableType::ByteArray { size } => self.parse_as_byte_array(size),
-            VariableType::Integer { size } => self.parse_as_integer(size),
-            VariableType::String { size } => self.parse_as_string(size),
+            VariableType::ByteArray { .. } => self.parse_as_byte_array(var_type.size()),
+            VariableType::Integer { .. } => self.parse_as_integer(var_type.size()),
+            VariableType::String { .. } => self.parse_as_string(var_type.size()),
             VariableType::Boolean => self.parse_as_boolean(),
         }
     }
@@ -126,12 +126,13 @@ impl SubstValue {
                 );
                 Ok(SubstValue::ByteArray(bytes))
             }
-            SubstValue::Int32(x) => {
-                let bigint = x.to_bigint().expect("cannot convert a i32 to BigInt");
-                let bytes = bigint.to_signed_bytes_be();
+            SubstValue::Uint32(x) => {
+                let bigint = x.to_biguint().expect("cannot convert a i32 to BigInt");
+                let bytes = bigint.to_bytes_be();
                 ensure!(
                     size == 0 || bytes.len() <= size,
-                    "expected an integer that fits on {size} bytes but it uses 4 bytes"
+                    "expected an integer that fits on {size} bytes but it uses {} bytes",
+                    bytes.len()
                 );
                 Ok(SubstValue::ByteArray(bytes))
             }
@@ -224,12 +225,18 @@ impl ConvertValue<Vec<u8>> for SubstValue {
     fn convert(&self, convert: &Option<Conversion>) -> Result<Vec<u8>> {
         // Calling `parse` will ensure that that the returned value is a byte
         // array, this avoids duplicating code.
-        let val = self.parse(&VariableType::ByteArray { size: 0 })?;
+        let val = self.parse(&VariableType::ByteArray {
+            size: SizeRange::ExactSize(0),
+            tweak_msb: None,
+        })?;
         // The only supported conversion to byte array is from a byte array.
         let SubstValue::ByteArray(bytes) = val else {
             bail!("cannot substitute a byte-array field with value {:?}", self);
         };
-        ensure!(convert.is_none(), "substitution of a byte-array field with a byte-array value cannot specify a conversion");
+        ensure!(
+            convert.is_none(),
+            "substitution of a byte-array field with a byte-array value cannot specify a conversion"
+        );
         Ok(bytes.clone())
     }
 
@@ -241,15 +248,18 @@ impl ConvertValue<Vec<u8>> for SubstValue {
 impl ConvertValue<BigUint> for SubstValue {
     fn convert(&self, convert: &Option<Conversion>) -> Result<BigUint> {
         // Calling `parse` will ensure that that the returned value is a byte array.
-        let val = self.parse(&VariableType::Integer { size: 0 })?;
+        let val = self.parse(&VariableType::Integer {
+            size: SizeRange::ExactSize(0),
+        })?;
         match val {
             SubstValue::ByteArray(bytes) => {
                 // No conversion means big-endian.
                 match convert {
-                    None | Some(Conversion::BigEndian) => {
-                        Ok(BigUint::from_bytes_be(&bytes))
-                    }
-                    _ => bail!("substitution of an integer field with a byte-array cannot specify conversion {:?}", convert)
+                    None | Some(Conversion::BigEndian) => Ok(BigUint::from_bytes_be(&bytes)),
+                    _ => bail!(
+                        "substitution of an integer field with a byte-array cannot specify conversion {:?}",
+                        convert
+                    ),
                 }
             }
             _ => bail!("cannot substitute an integer field with value {:?}", self),
@@ -267,17 +277,19 @@ impl ConvertValue<String> for SubstValue {
         match self {
             SubstValue::String(x) => {
                 // No conversion supported.
-                ensure!(convert.is_none(), "substitution of a string field with a string value cannot specify a conversion");
+                ensure!(
+                    convert.is_none(),
+                    "substitution of a string field with a string value cannot specify a conversion"
+                );
                 Ok(x.clone())
-            },
-            SubstValue::ByteArray(bytes) => {
-                match convert {
-                    Some(Conversion::LowercaseHex) => {
-                        Ok(bytes.encode_hex::<String>())
-                    }
-                    _ => bail!("substitution of a string field with a byte-array cannot specify conversion {:?}", convert)
-                }
             }
+            SubstValue::ByteArray(bytes) => match convert {
+                Some(Conversion::LowercaseHex) => Ok(bytes.encode_hex::<String>()),
+                _ => bail!(
+                    "substitution of a string field with a byte-array cannot specify conversion {:?}",
+                    convert
+                ),
+            },
             _ => bail!("cannot substitute a string field with value {:?}", self),
         }
     }
@@ -362,6 +374,10 @@ impl Subst for Certificate {
                 .basic_constraints
                 .subst(data)
                 .context("cannot substitute basic constraints")?,
+            key_usage: self
+                .key_usage
+                .subst(data)
+                .context("cannot substitute key usage")?,
             private_extensions: self
                 .private_extensions
                 .iter()
@@ -464,6 +480,25 @@ impl Subst for DiceTcbInfoFlags {
     }
 }
 
+impl Subst for KeyUsage {
+    fn subst(&self, data: &SubstData) -> Result<KeyUsage> {
+        Ok(KeyUsage {
+            digital_signature: self
+                .digital_signature
+                .subst(data)
+                .context("cannot substitute digital signature key usage")?,
+            key_agreement: self
+                .key_agreement
+                .subst(data)
+                .context("cannot substitute key agreement")?,
+            cert_sign: self
+                .cert_sign
+                .subst(data)
+                .context("cannot substitute cert sign")?,
+        })
+    }
+}
+
 impl Subst for SubjectPublicKeyInfo {
     fn subst(&self, data: &SubstData) -> Result<SubjectPublicKeyInfo> {
         match self {
@@ -554,46 +589,78 @@ mod tests {
         // Size 0 means any size.
         assert_eq!(
             byte_array
-                .parse(&VariableType::ByteArray { size: 0 })
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(0),
+                    tweak_msb: None
+                })
                 .unwrap(),
             byte_array
         );
         assert_eq!(
             byte_array
-                .parse(&VariableType::ByteArray { size: 4 })
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(4),
+                    tweak_msb: None
+                })
                 .unwrap(),
             byte_array
         );
-        assert!(byte_array
-            .parse(&VariableType::ByteArray { size: 3 })
-            .is_err());
+        assert!(
+            byte_array
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(3),
+                    tweak_msb: None
+                })
+                .is_err()
+        );
         // Size must match exactly.
-        assert!(byte_array
-            .parse(&VariableType::ByteArray { size: 5 })
-            .is_err());
+        assert!(
+            byte_array
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(5),
+                    tweak_msb: None
+                })
+                .is_err()
+        );
 
         // Strings are interpreted as hexstrings.
         let byte_array_str = SubstValue::String("deadbeef".into());
         // Size 0 means any size.
         assert_eq!(
             byte_array_str
-                .parse(&VariableType::ByteArray { size: 0 })
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(0),
+                    tweak_msb: None
+                })
                 .unwrap(),
             byte_array
         );
         assert_eq!(
             byte_array_str
-                .parse(&VariableType::ByteArray { size: 4 })
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(4),
+                    tweak_msb: None
+                })
                 .unwrap(),
             byte_array
         );
-        assert!(byte_array_str
-            .parse(&VariableType::ByteArray { size: 3 })
-            .is_err());
+        assert!(
+            byte_array_str
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(3),
+                    tweak_msb: None
+                })
+                .is_err()
+        );
         // Size must match exactly.
-        assert!(byte_array_str
-            .parse(&VariableType::ByteArray { size: 5 })
-            .is_err());
+        assert!(
+            byte_array_str
+                .parse(&VariableType::ByteArray {
+                    size: SizeRange::ExactSize(5),
+                    tweak_msb: None
+                })
+                .is_err()
+        );
     }
 
     /// Test parsing of integers.
@@ -605,7 +672,7 @@ mod tests {
         let byte_array_str_hex = SubstValue::String("0x3f2e1d0c".to_string());
         let byte_array_str_dec = SubstValue::String("1059986700".to_string());
         // Fixed-size integer.
-        let byte_array_int = SubstValue::Int32(0x3f2e1d0c);
+        let byte_array_int = SubstValue::Uint32(0x3f2e1d0c);
 
         for val in [
             &byte_array,
@@ -615,20 +682,34 @@ mod tests {
         ] {
             // Size 0 means any size.
             assert_eq!(
-                val.parse(&VariableType::Integer { size: 0 }).unwrap(),
+                val.parse(&VariableType::Integer {
+                    size: SizeRange::ExactSize(0),
+                })
+                .unwrap(),
                 byte_array
             );
             assert_eq!(
-                val.parse(&VariableType::Integer { size: 4 }).unwrap(),
+                val.parse(&VariableType::Integer {
+                    size: SizeRange::ExactSize(4),
+                })
+                .unwrap(),
                 byte_array
             );
             // Size does not need not match exactly.
             assert_eq!(
-                val.parse(&VariableType::Integer { size: 5 }).unwrap(),
+                val.parse(&VariableType::Integer {
+                    size: SizeRange::ExactSize(5),
+                })
+                .unwrap(),
                 byte_array
             );
             // Too small size in an error.
-            assert!(val.parse(&VariableType::Integer { size: 3 }).is_err());
+            assert!(
+                val.parse(&VariableType::Integer {
+                    size: SizeRange::ExactSize(3),
+                })
+                .is_err()
+            );
         }
     }
 
@@ -638,11 +719,34 @@ mod tests {
         // Big-endian integer.
         let s = SubstValue::String("OpenTitan".into());
         // Size 0 means any size.
-        assert_eq!(s.parse(&VariableType::String { size: 0 }).unwrap(), s);
-        assert_eq!(s.parse(&VariableType::String { size: 9 }).unwrap(), s);
+        assert_eq!(
+            s.parse(&VariableType::String {
+                size: SizeRange::ExactSize(0),
+            })
+            .unwrap(),
+            s
+        );
+        assert_eq!(
+            s.parse(&VariableType::String {
+                size: SizeRange::ExactSize(9),
+            })
+            .unwrap(),
+            s
+        );
         // A shorting string than specified is acceptable.
-        assert_eq!(s.parse(&VariableType::String { size: 10 }).unwrap(), s);
-        assert!(s.parse(&VariableType::String { size: 8 }).is_err());
+        assert_eq!(
+            s.parse(&VariableType::String {
+                size: SizeRange::ExactSize(10),
+            })
+            .unwrap(),
+            s
+        );
+        assert!(
+            s.parse(&VariableType::String {
+                size: SizeRange::ExactSize(8),
+            })
+            .is_err()
+        );
     }
 
     /// Test parsing of booleans.
diff --git a/sw/host/ot_certs/src/template/testgen.rs b/sw/host/ot_certs/src/template/testgen.rs
index 1540e1076df92..d758474a8d137 100644
--- a/sw/host/ot_certs/src/template/testgen.rs
+++ b/sw/host/ot_certs/src/template/testgen.rs
@@ -5,8 +5,8 @@
 //! This module provides functionality to generate substitute data for template
 //! to test corner cases of the certificate generator.
 
-use anyhow::{ensure, Result};
-use rand::distributions::DistString;
+use anyhow::{Result, ensure};
+use rand::distributions::{DistString, Distribution, Uniform};
 
 use openssl::bn::{BigNum, BigNumContext};
 use openssl::ec::{EcGroup, EcKey};
@@ -30,29 +30,39 @@ impl Template {
         let mut data = SubstData::new();
         for (var, var_type) in &self.variables {
             let val = match *var_type {
-                super::VariableType::ByteArray { size } => {
-                    let bytes = (0..size).map(|_| rand::random::<u8>()).collect::<Vec<_>>();
-                    SubstValue::ByteArray(bytes)
+                super::VariableType::ByteArray { .. } => {
+                    SubstValue::ByteArray(self.random_bytes(var_type))
                 }
-                super::VariableType::String { size } => {
+                super::VariableType::String { .. } => {
+                    let size = self.random_size(var_type);
                     let s = rand::distributions::Alphanumeric
                         .sample_string(&mut rand::thread_rng(), size);
                     SubstValue::String(s)
                 }
-                super::VariableType::Integer { size } => {
-                    if size == 4 {
+                super::VariableType::Integer { .. } => {
+                    if var_type.size() == 4 {
                         // FIXME the code does not properly distinguish between signed and
                         // unsigned integers so we must generate positive numbers for now.
-                        SubstValue::Int32(rand::random::<u16>() as i32)
+                        let value = self.random_bytes(var_type);
+                        let value = u32::from_be_bytes(value.try_into().unwrap());
+
+                        SubstValue::Uint32(value)
                     } else {
-                        let bytes = (0..size).map(|_| rand::random::<u8>()).collect::<Vec<_>>();
-                        SubstValue::ByteArray(bytes)
+                        SubstValue::ByteArray(self.random_bytes(var_type))
                     }
                 }
                 super::VariableType::Boolean => SubstValue::Boolean(rand::random::<bool>()),
             };
             data.values.insert(var.to_string(), val);
         }
+        // We want to make sure that we generate valid dates, otherwise tools like
+        // openssl might fail to parse the certificate.
+        if let Value::Variable(Variable { name, .. }) = &self.certificate.not_before {
+            data.values.insert(name.clone(), self.random_time());
+        }
+        if let Value::Variable(Variable { name, .. }) = &self.certificate.not_after {
+            data.values.insert(name.clone(), self.random_time());
+        }
         // We want to make sure that we generate a valid public key, otherwise
         // tools like openssl might fail to parse the certificate.
         for (key, val) in self.random_public_key()?.values {
@@ -61,6 +71,47 @@ impl Template {
         Ok(data)
     }
 
+    /// Sample a random array size for this variable.
+    fn random_size(&self, var_type: &super::VariableType) -> usize {
+        let (min_size, max_size) = var_type.array_size();
+        if min_size == max_size {
+            min_size
+        } else {
+            Uniform::from(min_size..max_size + 1).sample(&mut rand::thread_rng())
+        }
+    }
+
+    /// Sample a random byte string for this variable.
+    /// The generated values follow the size guarantees specified in the
+    /// hjson template.
+    fn random_bytes(&self, var_type: &super::VariableType) -> Vec<u8> {
+        let size = self.random_size(var_type);
+        let mut bytes = (0..size).map(|_| rand::random::<u8>()).collect::<Vec<_>>();
+
+        if var_type.use_msb_tweak() {
+            bytes[0] |= 0x80;
+        } else if matches!(var_type, super::VariableType::Integer { .. }) {
+            let (min_int_size, _) = var_type.int_size(0);
+            if min_int_size > 0 {
+                bytes[size - min_int_size] |= 0x1;
+            }
+        }
+        bytes
+    }
+
+    fn random_time(&self) -> SubstValue {
+        // The smallest possible valid GeneralizedTime is YYYYMMDDHHMMSSZ
+        let mut rng = rand::thread_rng();
+        let year = Uniform::from(1900..2100).sample(&mut rng);
+        let month = Uniform::from(1..13).sample(&mut rng);
+        let day = Uniform::from(1..29).sample(&mut rng);
+        let hour = Uniform::from(0..24).sample(&mut rng);
+        let minute = Uniform::from(0..60).sample(&mut rng);
+        let sec = Uniform::from(0..60).sample(&mut rng);
+        let time = format!("{year:04}{month:02}{day:02}{hour:02}{minute:02}{sec:02}Z");
+        SubstValue::String(time)
+    }
+
     fn random_public_key(&self) -> Result<SubstData> {
         match &self.certificate.subject_public_key_info {
             SubjectPublicKeyInfo::EcPublicKey(ec) => Self::random_ec_public_key(ec),
@@ -74,6 +125,7 @@ impl Template {
         let mut ctx = BigNumContext::new()?;
         let mut x = BigNum::new()?;
         let mut y = BigNum::new()?;
+        let nbytes: i32 = ((group.degree() + 7) / 8) as i32;
         privkey
             .public_key()
             .affine_coordinates(&group, &mut x, &mut y, &mut ctx)?;
@@ -81,19 +133,23 @@ impl Template {
         // If any of the coordinates is a variable, create a substitution for it.
         if let Value::Variable(Variable { name, convert }) = &ec_pubkey.public_key.x {
             ensure!(
-                convert.is_none(),
-                "cannot generate a random public key if 'x' a variable with conversion"
+                matches!(convert, None | Some(super::Conversion::BigEndian)),
+                "cannot generate a random public key if 'x' a variable with invalid conversion"
+            );
+            data.values.insert(
+                name.clone(),
+                SubstValue::ByteArray(x.to_vec_padded(nbytes)?),
             );
-            data.values
-                .insert(name.clone(), SubstValue::ByteArray(x.to_vec()));
         }
         if let Value::Variable(Variable { name, convert }) = &ec_pubkey.public_key.y {
             ensure!(
-                convert.is_none(),
-                "cannot generate a random public key if 'y' a variable with conversion"
+                matches!(convert, None | Some(super::Conversion::BigEndian)),
+                "cannot generate a random public key if 'y' a variable with invalid conversion"
+            );
+            data.values.insert(
+                name.clone(),
+                SubstValue::ByteArray(y.to_vec_padded(nbytes)?),
             );
-            data.values
-                .insert(name.clone(), SubstValue::ByteArray(y.to_vec()));
         }
         Ok(data)
     }
diff --git a/sw/host/ot_certs/src/x509.rs b/sw/host/ot_certs/src/x509.rs
index be131c4f75b5b..65b2f2a8abbea 100644
--- a/sw/host/ot_certs/src/x509.rs
+++ b/sw/host/ot_certs/src/x509.rs
@@ -2,27 +2,25 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use indexmap::IndexMap;
 use num_bigint_dig::BigUint;
 
 use foreign_types::ForeignTypeRef;
-use openssl::asn1::{
-    Asn1IntegerRef, Asn1ObjectRef, Asn1OctetStringRef, Asn1StringRef, Asn1TimeRef,
-};
+use openssl::asn1::{Asn1IntegerRef, Asn1ObjectRef, Asn1StringRef, Asn1TimeRef};
 use openssl::bn::{BigNum, BigNumContext, BigNumRef};
 use openssl::ec::{EcGroupRef, EcKey};
 use openssl::ecdsa::EcdsaSig;
 use openssl::nid::Nid;
 use openssl::pkey::PKey;
 use openssl::pkey::Public;
-use openssl::x509::{X509NameRef, X509};
+use openssl::x509::{X509, X509NameRef};
 
 use crate::asn1::der;
 use crate::asn1::x509;
 
 use crate::template::{
-    self, AttributeType, EcCurve, EcPublicKeyInfo, EcdsaSignature, Name, Signature,
+    self, AttributeType, EcCurve, EcPublicKeyInfo, EcdsaSignature, KeyUsage, Name, Signature,
     SubjectPublicKeyInfo, Value,
 };
 
@@ -84,10 +82,6 @@ fn asn1str_to_str(field: &str, s: &Asn1StringRef) -> Result<Value<String>> {
     ))
 }
 
-fn asn1octets_to_vec(s: &Asn1OctetStringRef) -> Value<Vec<u8>> {
-    Value::literal(s.as_slice().to_vec())
-}
-
 fn asn1time_to_string(time: &Asn1TimeRef) -> Result<Value<String>> {
     // OpenSSL guarantees that an ASN1_TIME is in fact just a typedef for ASN1_STRING
     // https://www.openssl.org/docs/man1.1.1/man3/ASN1_TIME_to_generalizedtime.html
@@ -221,6 +215,9 @@ pub fn parse_certificate(cert: &[u8]) -> Result<template::Certificate> {
         extension::x509_get_extensions(&x509).context("could not parse X509 extensions")?;
     let mut private_extensions = Vec::new();
     let mut basic_constraints = None;
+    let mut key_usage: Option<KeyUsage> = None;
+    let mut auth_key_id = None;
+    let mut subj_key_id = None;
     for ext in raw_extensions {
         match ext.object.nid() {
             // Ignore extensions that are standard and handled by openssl.
@@ -234,10 +231,29 @@ pub fn parse_certificate(cert: &[u8]) -> Result<template::Certificate> {
                         .context("could not parse X509 basic constraints")?,
                 );
             }
-            Nid::KEY_USAGE => (),
-            Nid::AUTHORITY_KEY_IDENTIFIER => (),
+            Nid::KEY_USAGE => {
+                key_usage = Some(
+                    extension::parse_key_usage(&ext).context("could not parse X509 key usage")?,
+                );
+            }
+            Nid::AUTHORITY_KEY_IDENTIFIER => {
+                // Although OpenSSL will parse the authority key identifier correctly, it will sometimes
+                // pretend that it doesn't exist if the certificate is unusual (i.e. all key usage bit
+                // set to false) without showing any error. Since this is very confusing, we may as well
+                // parse it ourselves.
+                auth_key_id = Some(Value::Literal(
+                    extension::parse_authority_key_id(&ext)
+                        .context("could not parse authority key identifier")?,
+                ));
+            }
             Nid::SUBJECT_ALT_NAME => (),
-            Nid::SUBJECT_KEY_IDENTIFIER => (),
+            Nid::SUBJECT_KEY_IDENTIFIER => {
+                // Same issue as with authority key identifier.
+                subj_key_id = Some(Value::Literal(
+                    extension::parse_subject_key_id(&ext)
+                        .context("could not parse subject key identifier")?,
+                ));
+            }
             _ => private_extensions
                 .push(extension::parse_extension(&ext).context("could not parse X509 extension")?),
         }
@@ -248,7 +264,6 @@ pub fn parse_certificate(cert: &[u8]) -> Result<template::Certificate> {
             .public_key()
             .context("the X509 does not have a valid public key!")?,
     )?;
-
     Ok(template::Certificate {
         serial_number: asn1int_to_bn("serial number", x509.serial_number())?,
         issuer: asn1name_to_name("issuer", x509.issuer_name())?,
@@ -257,15 +272,10 @@ pub fn parse_certificate(cert: &[u8]) -> Result<template::Certificate> {
             .context("cannot parse not_before time")?,
         not_after: asn1time_to_string(x509.not_after()).context("cannot parse not_after time")?,
         subject_public_key_info,
-        authority_key_identifier: asn1octets_to_vec(
-            x509.authority_key_id()
-                .context("the certificate has not authority key id")?,
-        ),
-        subject_key_identifier: asn1octets_to_vec(
-            x509.subject_key_id()
-                .context("the certificate has not subject key id")?,
-        ),
+        authority_key_identifier: auth_key_id,
+        subject_key_identifier: subj_key_id,
         basic_constraints,
+        key_usage,
         subject_alt_name: get_subject_alt_name(&x509)?,
         private_extensions,
         signature: extract_signature(&x509)?,
diff --git a/sw/host/ot_certs/src/x509/extension.rs b/sw/host/ot_certs/src/x509/extension.rs
index 37d6533881b06..93a12c105047e 100644
--- a/sw/host/ot_certs/src/x509/extension.rs
+++ b/sw/host/ot_certs/src/x509/extension.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use num_bigint_dig::BigUint;
 
 use foreign_types::{ForeignType, ForeignTypeRef};
@@ -12,7 +12,7 @@ use openssl::x509::X509;
 use crate::asn1::Oid;
 use crate::template::{
     BasicConstraints, CertificateExtension, DiceTcbInfoExtension, DiceTcbInfoFlags, FirmwareId,
-    HashAlgorithm, Value,
+    HashAlgorithm, KeyUsage, Value,
 };
 
 /// X509 extension reference.
@@ -228,6 +228,57 @@ impl<'a> asn1::SimpleAsn1Readable<'a> for DiceTcbInfoFlags {
     }
 }
 
+// From https://datatracker.ietf.org/doc/html/rfc5280#section-4.2.1.3
+// KeyUsage ::= BIT STRING {
+//    digitalSignature        (0),
+//    nonRepudiation          (1), -- recent editions of X.509 have
+//                         -- renamed this bit to contentCommitment
+//    keyEncipherment         (2),
+//    dataEncipherment        (3),
+//    keyAgreement            (4),
+//    keyCertSign             (5),
+//    cRLSign                 (6),
+//    encipherOnly            (7),
+//    decipherOnly            (8) }
+impl<'a> asn1::SimpleAsn1Readable<'a> for KeyUsage {
+    const TAG: asn1::Tag = asn1::OwnedBitString::TAG;
+    fn parse_data(_data: &'a [u8]) -> asn1::ParseResult<Self> {
+        let result = asn1::OwnedBitString::parse_data(_data)?;
+        let bs = result.as_bitstring();
+        // List of bits that this parser supports. Any bit set outside of
+        // these will be an error because we cannot record it.
+        const PARSED_BITS: &[usize] = &[0, 4, 5];
+        let len = bs.as_bytes().len() * 8 - bs.padding_bits() as usize;
+        for i in 0..len {
+            if bs.has_bit_set(i) && !PARSED_BITS.contains(&i) {
+                // FIXME This will not return a very readable error message but the asn1
+                // does not support arbitrary string errors.
+                return asn1::ParseResult::Err(asn1::ParseError::new(
+                    asn1::ParseErrorKind::ExtraData,
+                ));
+            }
+        }
+        Ok(KeyUsage {
+            digital_signature: Some(Value::Literal(bs.has_bit_set(0))),
+            key_agreement: Some(Value::Literal(bs.has_bit_set(4))),
+            cert_sign: Some(Value::Literal(bs.has_bit_set(5))),
+        })
+    }
+}
+
+// From https://datatracker.ietf.org/doc/html/rfc5280#section-4.2.1.1
+// AuthorityKeyIdentifier ::= SEQUENCE {
+//       keyIdentifier             [0] KeyIdentifier           OPTIONAL,
+//       authorityCertIssuer       [1] GeneralNames            OPTIONAL,
+//       authorityCertSerialNumber [2] CertificateSerialNumber OPTIONAL  }
+//
+// KeyIdentifier ::= OCTET STRING
+#[derive(asn1::Asn1Read)]
+struct AuthorityKeyIdentifier<'a> {
+    #[implicit(0)]
+    pub key_id: Option<&'a [u8]>,
+}
+
 /// Try to parse an X509 extension as a DICE TCB info extension.
 pub fn parse_dice_tcb_info_extension(ext: &[u8]) -> Result<DiceTcbInfoExtension> {
     asn1::parse_single::<DiceTcbInfo>(ext)
@@ -252,12 +303,33 @@ impl BasicConstraintsInternal {
     }
 }
 
+pub fn parse_key_usage(ext: &X509ExtensionRef) -> Result<KeyUsage> {
+    Ok(asn1::parse_single::<KeyUsage>(ext.data.as_slice())?)
+}
+
 pub fn parse_basic_constraints(ext: &X509ExtensionRef) -> Result<BasicConstraints> {
     asn1::parse_single::<BasicConstraintsInternal>(ext.data.as_slice())
         .context("cannot parse DICE extension")?
         .to_basic_constraints()
 }
 
+pub fn parse_authority_key_id(ext: &X509ExtensionRef) -> Result<Vec<u8>> {
+    let auth = asn1::parse_single::<AuthorityKeyIdentifier>(ext.data.as_slice())?;
+    Ok(auth
+        .key_id
+        .context("authority key identifier extension is empty")?
+        .to_vec())
+}
+
+pub fn parse_subject_key_id(ext: &X509ExtensionRef) -> Result<Vec<u8>> {
+    // From https://datatracker.ietf.org/doc/html/rfc5280#section-4.2.1.2
+    // SubjectKeyIdentifier ::= KeyIdentifier
+    //
+    //  KeyIdentifier ::= OCTET STRING
+    let subj = asn1::parse_single::<&[u8]>(ext.data.as_slice())?;
+    Ok(subj.to_vec())
+}
+
 /// Try to parse an X509 extension.
 pub fn parse_extension(ext: &X509ExtensionRef) -> Result<CertificateExtension> {
     let dice_oid =
diff --git a/sw/host/ot_certs/tests/dice_tcb_info.rs b/sw/host/ot_certs/tests/dice_tcb_info.rs
index 24654bcefac4c..6c07b055159e2 100644
--- a/sw/host/ot_certs/tests/dice_tcb_info.rs
+++ b/sw/host/ot_certs/tests/dice_tcb_info.rs
@@ -2,11 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use base64ct::Encoding;
 use num_bigint_dig::BigUint;
-use num_traits::cast::FromPrimitive;
 use num_traits::Num;
+use num_traits::cast::FromPrimitive;
 
 use ot_certs::asn1::der::Der;
 use ot_certs::template::{
diff --git a/sw/host/ot_certs/tests/example.hjson b/sw/host/ot_certs/tests/example.hjson
index f63b4fb44c267..47061ff97dd9d 100644
--- a/sw/host/ot_certs/tests/example.hjson
+++ b/sw/host/ot_certs/tests/example.hjson
@@ -40,6 +40,11 @@
             { tpm_model: "TPM Model" },
             { tpm_version: "TPM Version" },
         ],
+        key_usage: {
+            digital_signature: true,
+            key_agreement: false,
+            cert_sign: true,
+        }
         private_extensions: [
             {
                 type: "dice_tcb_info",
diff --git a/sw/host/ot_certs/tests/example_data.json b/sw/host/ot_certs/tests/example_data.json
index a9e2fc31cddf5..45b950ee93909 100644
--- a/sw/host/ot_certs/tests/example_data.json
+++ b/sw/host/ot_certs/tests/example_data.json
@@ -6,12 +6,12 @@
     "issuer_cn": "lowRISC",
     "subject_serial_number": "5498694878674878747894768746897849",
     "pub_key_ec_x": "0x6d13d8dca1d8211298d41abd8f7ac38c07333c78e652b44c5b425fce61184a",
-    "pub_key_ec_y": "4534108868468764070259928525122280184028285285512090975127203821338071542753",
+    "pub_key_ec_y": "0xa0636f5073209440adb17dd8b102bc1154dc95394abfaeecd89852e1d622be1",
     "auth_key_id": "94589abcd8744445ef329bc4186a11ff9a74bc4d",
     "pub_key_id": [4, 137, 122, 254, 200, 118, 219, 135, 109, 78, 251, 198, 163, 221, 159, 22, 73, 101, 223, 172],
     "vendor": "lowRISC",
     "model": "OpenTitan",
-    "security_version": 0,
+    "security_version": "00000000",
     "layer": [42],
     "hash_1": "465644d935385783658357583758c593583b6537",
     "hash_2": "009e9809f85978327592857a093f539078626589",
@@ -24,5 +24,8 @@
     "basic_constraints_ca": true,
     "tpm_vendor": "TPM Vendor",
     "tpm_model": "TPM Model",
-    "tpm_version": "TPM Version"
+    "tpm_version": "TPM Version",
+    "key_usage_digital_signature": true,
+    "key_usage_key_agreement": false,
+    "key_usage_cert_sign": true
 }
diff --git a/sw/host/ot_certs/tests/generic.hjson b/sw/host/ot_certs/tests/generic.hjson
index aea5c16132023..7b64e5289f324 100644
--- a/sw/host/ot_certs/tests/generic.hjson
+++ b/sw/host/ot_certs/tests/generic.hjson
@@ -7,75 +7,78 @@
     variables: {
         serial_number: {
             type: "integer",
-            size: 32,
+            range-size: [0, 32],
         },
         not_before: {
             type: "string",
-            size: 15,
+            exact-size: 15,
         }
         not_after: {
             type: "string",
-            size: 15,
+            exact-size: 15,
         }
         subject_serial_number: {
             type: "string",
-            size: 40,
+            exact-size: 40,
         },
         issuer_c: {
             type: "string",
-            size: 2,
+            exact-size: 2,
         },
         issuer_cn: {
             type: "string",
-            size: 20,
+            exact-size: 20,
         },
         vendor: {
             type: "string",
-            size: 15,
+            exact-size: 50,
         },
         model: {
             type: "string",
-            size: 20,
+            exact-size: 50,
         },
         layer: {
             type: "integer",
-            size: 4,
+            range-size: [0, 4],
         },
         pub_key_ec_x: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         pub_key_ec_y: {
             type: "integer",
-            size: 32,
+            exact-size: 32,
         },
         pub_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         auth_key_id: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
+            tweak-msb: true,
         },
         hash_1: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
         },
         hash_2: {
             type: "byte-array",
-            size: 20,
+            exact-size: 20,
         },
         security_version: {
-            type: "integer",
-            size: 4,
+            type: "byte-array",
+            exact-size: 4,
+            tweak-msb: true,
         }
         cert_signature_r: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         cert_signature_s: {
             type: "integer",
-            size: 32,
+            range-size: [24, 32],
         },
         not_configured: {
             type: "boolean",
@@ -94,15 +97,24 @@
         }
         tpm_vendor: {
             type: "string",
-            size: 100,
+            exact-size: 100,
         }
         tpm_model: {
             type: "string",
-            size: 100,
+            exact-size: 100,
         }
         tpm_version: {
             type: "string",
-            size: 100,
+            exact-size: 100,
+        }
+        key_usage_cert_sign: {
+            type: "boolean"
+        }
+        key_usage_key_agreement: {
+            type: "boolean"
+        }
+        key_usage_digital_signature: {
+            type: "boolean"
         }
     },
 
@@ -135,12 +147,17 @@
             { tpm_model: { var: "tpm_model" } },
             { tpm_version: { var: "tpm_version" } },
         ],
+        key_usage: {
+            digital_signature: {var: "key_usage_digital_signature" },
+            key_agreement: {var: "key_usage_key_agreement" },
+            cert_sign: {var: "key_usage_cert_sign" },
+        }
         private_extensions: [
             {
                 type: "dice_tcb_info",
                 vendor: { var: "vendor" },
                 model: { var: "model" },
-                svn: { var: "security_version" },
+                svn: { var: "security_version", convert: "big-endian" },
                 layer: { var: "layer" },
                 fw_ids: [
                     { hash_algorithm: "sha256", digest: { var: "hash_1" } },
diff --git a/sw/host/ot_certs/tests/parse_test.rs b/sw/host/ot_certs/tests/parse_test.rs
index 51f2b3103fbf9..6de555840d1c7 100644
--- a/sw/host/ot_certs/tests/parse_test.rs
+++ b/sw/host/ot_certs/tests/parse_test.rs
@@ -2,11 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use base64ct::Encoding;
 
-use ot_certs::template::subst::Subst;
 use ot_certs::template::Template;
+use ot_certs::template::subst::Subst;
 use ot_certs::x509;
 
 const GENERIC_CERT: &str = include_str!("generic.hjson");
@@ -18,6 +18,8 @@ fn main() -> Result<()> {
         Template::from_hjson_str(GENERIC_CERT).expect("failed to parse generic template");
     // Generate some random test data.
     let test_data = generic_tmpl.random_test()?;
+    // Print test data so we can reproduce the test on failure.
+    println!("test data: {test_data:?}");
     // Substitute data into the template.
     let cert = generic_tmpl.subst(&test_data)?;
     // Use DER to generate a binary certificate.
diff --git a/sw/host/ot_certs/tests/subst_test.rs b/sw/host/ot_certs/tests/subst_test.rs
index f9ed0c4700fb1..829bff650bfb9 100644
--- a/sw/host/ot_certs/tests/subst_test.rs
+++ b/sw/host/ot_certs/tests/subst_test.rs
@@ -2,10 +2,10 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 
-use ot_certs::template::subst::{Subst, SubstData};
 use ot_certs::template::Template;
+use ot_certs::template::subst::{Subst, SubstData};
 
 const GENERIC_CERT: &str = include_str!("generic.hjson");
 const EXAMPLE_DATA: &str = include_str!("example_data.json");
diff --git a/sw/device/silicon_creator/rom/keys/real/BUILD b/sw/host/penetrationtests/BUILD
similarity index 100%
rename from sw/device/silicon_creator/rom/keys/real/BUILD
rename to sw/host/penetrationtests/BUILD
diff --git a/sw/host/penetrationtests/python/README.md b/sw/host/penetrationtests/python/README.md
new file mode 100644
index 0000000000000..eeb40c3f87153
--- /dev/null
+++ b/sw/host/penetrationtests/python/README.md
@@ -0,0 +1,20 @@
+# Penetrationtests
+
+## Overview
+This directory contains Python scripts to work with the testOS from //sw/device/tests/penetrationtests which contains the chip/fpga interface for performing side-channel and fault injection tests. These scripts are reflected in the ot-sca repo (https://github.com/lowRISC/ot-sca).
+
+### util
+Contains the basic scripts to interact with the target such as reading or sending data or resetting/reflashing the device.
+
+### fi/sca
+The directory for fault injection or side-channel analysis related tests.
+
+#### communication
+Contains the scipts for the UART output to the chip/fpga to execute tests.
+Note thate these scripts are also present in the ot-sca repo. If these have to be updated, it makes sense to update these in the ot-sca repo as well.
+
+#### host_scripts
+Combines functions from the communication directory to perform simple tests.
+
+#### test_scripts
+Tests the host scripts to keep communication and host_scripts up-to-date.
diff --git a/sw/host/penetrationtests/python/fi/BUILD b/sw/host/penetrationtests/python/fi/BUILD
new file mode 100644
index 0000000000000..c9af46cfdf9da
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/BUILD
@@ -0,0 +1,313 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@ot_python_deps//:requirements.bzl", "requirement")
+
+package(default_visibility = ["//visibility:public"])
+
+py_binary(
+    name = "fi_ibex_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_ibex_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_ibex",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_ibex_commands",
+        "//sw/host/penetrationtests/python/fi:fi_ibex_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_crypto_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_crypto_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_crypto",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_crypto_commands",
+        "//sw/host/penetrationtests/python/fi:fi_crypto_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "fi_otbn_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_otbn_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_otbn",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_otbn_commands",
+        "//sw/host/penetrationtests/python/fi:fi_otbn_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_otp_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_otp_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_otp",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_otp_commands",
+        "//sw/host/penetrationtests/python/fi:fi_otp_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_rom_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_rom_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_rom",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_rom_commands",
+        "//sw/host/penetrationtests/python/fi:fi_rom_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_alert_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_alert_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_alert_commands",
+        "//sw/host/penetrationtests/python/fi:fi_alert_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_rng_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_rng_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+        "//sw/host/penetrationtests/python/fi/gold_responses:fi_rng",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_rng_commands",
+        "//sw/host/penetrationtests/python/fi:fi_rng_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_binary(
+    name = "fi_sym_cryptolib_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_sym_cryptolib_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_sym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/fi:fi_sym_cryptolib_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "fi_asym_cryptolib_python_test",
+    testonly = True,
+    srcs = ["test_scripts/fi_asym_cryptolib_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/fi:fi_asym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/fi:fi_asym_cryptolib_functions",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_library(
+    name = "fi_ibex_functions",
+    srcs = ["host_scripts/fi_ibex_functions.py"],
+    deps = [
+        ":fi_ibex_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_crypto_functions",
+    srcs = ["host_scripts/fi_crypto_functions.py"],
+    deps = [
+        ":fi_crypto_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_otbn_functions",
+    srcs = ["host_scripts/fi_otbn_functions.py"],
+    deps = [
+        ":fi_otbn_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_otp_functions",
+    srcs = ["host_scripts/fi_otp_functions.py"],
+    deps = [
+        ":fi_otp_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_rom_functions",
+    srcs = ["host_scripts/fi_rom_functions.py"],
+    deps = [
+        ":fi_rom_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_alert_functions",
+    srcs = ["host_scripts/fi_alert_functions.py"],
+    deps = [
+        ":fi_alert_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_rng_functions",
+    srcs = ["host_scripts/fi_rng_functions.py"],
+    deps = [
+        ":fi_rng_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_sym_cryptolib_functions",
+    srcs = ["host_scripts/fi_sym_cryptolib_functions.py"],
+    deps = [
+        ":fi_sym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_asym_cryptolib_functions",
+    srcs = ["host_scripts/fi_asym_cryptolib_functions.py"],
+    deps = [
+        ":fi_asym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/util:common_library",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "fi_ibex_commands",
+    srcs = ["communication/fi_ibex_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_crypto_commands",
+    srcs = ["communication/fi_crypto_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_otbn_commands",
+    srcs = ["communication/fi_otbn_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_otp_commands",
+    srcs = ["communication/fi_otp_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_rng_commands",
+    srcs = ["communication/fi_rng_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_rom_commands",
+    srcs = ["communication/fi_rom_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_alert_commands",
+    srcs = ["communication/fi_alert_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_sym_cryptolib_commands",
+    srcs = ["communication/fi_sym_cryptolib_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "fi_asym_cryptolib_commands",
+    srcs = ["communication/fi_asym_cryptolib_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_alert_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_alert_commands.py
new file mode 100644
index 0000000000000..6834b93536fd8
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_alert_commands.py
@@ -0,0 +1,84 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Alert FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIAlert:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_alert_fi_cmd(self) -> None:
+        self.target.write(json.dumps("AlertFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def handle_alert_trigger(self, alert) -> None:
+        # AlertFi command.
+        self._ujson_alert_fi_cmd()
+        # Trigger command.
+        self.target.write(json.dumps("Trigger").encode("ascii"))
+        alert_data = {"alert": alert}
+        self.target.write(json.dumps(alert_data).encode("ascii"))
+
+    def handle_alert_sensor_ctrl_trigger(self) -> None:
+        # AlertFi command.
+        self._ujson_alert_fi_cmd()
+        # SensorCtrlTrigger command.
+        self.target.write(json.dumps("SensorCtrlTrigger").encode("ascii"))
+
+    def handle_alert_ibex_sw_fatal(self) -> None:
+        # AlertFi command.
+        self._ujson_alert_fi_cmd()
+        # IbexSwFatal command.
+        self.target.write(json.dumps("IbexSwFatal").encode("ascii"))
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the ALERT FI code on the chip.
+        Args:
+            cfg: Config dict containing the selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # AlertFi command.
+        self._ujson_alert_fi_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_asym_cryptolib_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_asym_cryptolib_commands.py
new file mode 100644
index 0000000000000..9f8b793944082
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_asym_cryptolib_commands.py
@@ -0,0 +1,427 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Symmetric Cryptolib FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIAsymCrypto:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_asym_crypto_fi_cmd(self) -> None:
+        self.target.write(json.dumps("CryptoLibFiAsym").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the code on the chip.
+        Args:
+            cfg: Config dict containing the selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def handle_rsa_enc(
+        self,
+        data,
+        data_len,
+        e,
+        n,
+        n_len,
+        d,
+        padding,
+        hashing,
+        mode,
+        op_enc,
+        cfg,
+        trigger,
+    ) -> None:
+        """Call the cryptolib RSA to encrypt/decrypt.
+
+        Args:
+            data: Array of max 512 bytes of input data.
+            data_len: Input data length.
+            e: Integer for the public e.
+            n: Array of max 512 bytes of n.
+            n_len: Input n length.
+            d: Array of max 512 bytes of d.
+            padding: integer specifying the padding mode.
+            hashing: ingteger specifying the hashing mode.
+            mode: integer specifying the mode.
+            op_enc: Boolean specifying to encrypt or decrypt.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("RsaEnc").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "e": e,
+            "n": n,
+            "n_len": n_len,
+            "d": d,
+            "padding": padding,
+            "hashing": hashing,
+            "mode": mode,
+            "op_enc": op_enc,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_rsa_sign(
+        self,
+        data,
+        data_len,
+        e,
+        n,
+        n_len,
+        d,
+        padding,
+        hashing,
+        cfg,
+        trigger,
+    ) -> None:
+        """Call the cryptolib RSA to sign.
+
+        Args:
+            data: Array of max 512 bytes of input data.
+            data_len: Input data length.
+            e: Integer for the public e.
+            n: Array of max 512 bytes of n.
+            n_len: Input n length.
+            d: Array of max 512 bytes of d.
+            padding: integer specifying the padding mode.
+            hashing: ingteger specifying the hashing mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("RsaSign").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "e": e,
+            "n": n,
+            "n_len": n_len,
+            "d": d,
+            "padding": padding,
+            "hashing": hashing,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_rsa_verify(
+        self,
+        data,
+        data_len,
+        e,
+        n,
+        n_len,
+        sig,
+        sig_len,
+        padding,
+        hashing,
+        cfg,
+        trigger,
+    ) -> None:
+        """Call the cryptolib RSA to verify.
+
+        Args:
+            data: Array of max 512 bytes of input data.
+            data_len: Input data length.
+            e: Integer for the public e.
+            n: Array of max 512 bytes of n.
+            n_len: Input n length.
+            sig: Array of max 512 bytes of signature data.
+            sig_len: Input signature length.
+            padding: integer specifying the padding mode.
+            hashing: ingteger specifying the hashing mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("RsaVerify").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "e": e,
+            "n": n,
+            "n_len": n_len,
+            "sig": sig,
+            "sig_len": sig_len,
+            "padding": padding,
+            "hashing": hashing,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_prime_generation(self, e, cfg, trigger) -> None:
+        """Call the cryptolib to generate prime numbers.
+
+        Args:
+            e: Integer for the public e.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("Prime").encode("ascii"))
+        input_data = {
+            "e": e,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_base_mult(self, scalar, cfg, trigger) -> None:
+        """Call the cryptolib p256 base multiplication.
+
+        Args:
+            scalar: Array of 32 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P256BaseMul").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_point_mult(self, scalar_alice, scalar_bob, cfg, trigger) -> None:
+        """Call the cryptolib p256 point multiplication.
+
+        Args:
+            scalar_alice: Array of 32 bytes of scalar data.
+            scalar_bob: Array of 32 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P256PointMul").encode("ascii"))
+        input_data = {
+            "scalar_alice": scalar_alice,
+            "scalar_bob": scalar_bob,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_ecdh(self, private_key, public_x, public_y, cfg, trigger) -> None:
+        """Call the cryptolib p256 ecdh.
+
+        Args:
+            private_key: Array of 32 bytes of scalar data.
+            public_x: Array of 32 bytes of x-coord data.
+            public_y: Array of 32 bytes of y-coord data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P256Ecdh").encode("ascii"))
+        input_data = {
+            "private_key": private_key,
+            "public_x": public_x,
+            "public_y": public_y,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_sign(self, scalar, pubx, puby, message, cfg, trigger) -> None:
+        """Call the cryptolib p256 signing.
+
+        Args:
+            scalar: Array of 32 bytes of scalar data.
+            pubx: Array of 32 bytes of x-coord data.
+            puby: Array of 32 bytes of y-coord data.
+            message: Array of 32 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P256Sign").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "pubx": pubx,
+            "puby": puby,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_verify(self, pubx, puby, r, s, message, cfg, trigger) -> None:
+        """Call the cryptolib p256 verify.
+
+        Args:
+            pubx: Array of 32 bytes of x-coord data.
+            puby: Array of 32 bytes of y-coord data.
+            r: Array of 32 bytes of signature data.
+            s: Array of 32 bytes of signature data.
+            message: Array of 32 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P256Verify").encode("ascii"))
+        input_data = {
+            "pubx": pubx,
+            "puby": puby,
+            "r": r,
+            "s": s,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_base_mult(self, scalar, cfg, trigger) -> None:
+        """Call the cryptolib p384 base multiplication.
+
+        Args:
+            scalar: Array of 48 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P384BaseMul").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_point_mult(self, scalar_alice, scalar_bob, cfg, trigger) -> None:
+        """Call the cryptolib p384 point multiplication.
+
+        Args:
+            scalar_alice: Array of 48 bytes of scalar data.
+            scalar_bob: Array of 48 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P384PointMul").encode("ascii"))
+        input_data = {
+            "scalar_alice": scalar_alice,
+            "scalar_bob": scalar_bob,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_ecdh(self, private_key, public_x, public_y, cfg, trigger) -> None:
+        """Call the cryptolib p384 ecdh.
+
+        Args:
+            private_key: Array of 48 bytes of scalar data.
+            public_x: Array of 48 bytes of x-coord data.
+            public_y: Array of 48 bytes of y-coord data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P384Ecdh").encode("ascii"))
+        input_data = {
+            "private_key": private_key,
+            "public_x": public_x,
+            "public_y": public_y,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_sign(self, scalar, pubx, puby, message, cfg, trigger) -> None:
+        """Call the cryptolib p384 signing.
+
+        Args:
+            scalar: Array of 48 bytes of scalar data.
+            pubx: Array of 48 bytes of x-coord data.
+            puby: Array of 48 bytes of y-coord data.
+            message: Array of 48 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P384Sign").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "pubx": pubx,
+            "puby": puby,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_verify(self, pubx, puby, r, s, message, cfg, trigger) -> None:
+        """Call the cryptolib p384 verify.
+
+        Args:
+            pubx: Array of 48 bytes of x-coord data.
+            puby: Array of 48 bytes of y-coord data.
+            r: Array of 48 bytes of signature data.
+            s: Array of 48 bytes of signature data.
+            message: Array of 32 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_fi_cmd()
+        self.target.write(json.dumps("P384Verify").encode("ascii"))
+        input_data = {
+            "pubx": pubx,
+            "puby": puby,
+            "r": r,
+            "s": s,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_crypto_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_crypto_commands.py
new file mode 100644
index 0000000000000..ce22efa2f74bc
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_crypto_commands.py
@@ -0,0 +1,296 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Crypto FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFICrypto:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_crypto_cmd(self) -> None:
+        self.target.write(json.dumps("CryptoFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the Crypto FI code on the chip.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def crypto_shadow_reg_access(self) -> None:
+        """Starts the crypto.fi.shadow_reg_access test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # ShadowRegAccess command.
+        self.target.write(json.dumps("ShadowRegAccess").encode("ascii"))
+
+    def crypto_shadow_reg_read(self) -> None:
+        """Starts the crypto.fi.shadow_reg_read test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # ShadowRegRead command.
+        self.target.write(json.dumps("ShadowRegRead").encode("ascii"))
+
+    def crypto_aes_key(self, plaintext, key) -> None:
+        """Starts the crypto.fi.aes_key test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Aes command.
+        self.target.write(json.dumps("Aes").encode("ascii"))
+        # Plaintext and key
+        input_data = {"plaintext": plaintext, "key": key}
+        self.target.write(json.dumps(input_data).encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": True,
+            "plaintext_trigger": False,
+            "encrypt_trigger": False,
+            "ciphertext_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_aes_plaintext(self, plaintext, key) -> None:
+        """Starts the crypto.fi.aes_plaintext test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Aes command.
+        self.target.write(json.dumps("Aes").encode("ascii"))
+        # Plaintext and key
+        input_data = {"plaintext": plaintext, "key": key}
+        self.target.write(json.dumps(input_data).encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "plaintext_trigger": True,
+            "encrypt_trigger": False,
+            "ciphertext_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_aes_encrypt(self, plaintext, key) -> None:
+        """Starts the crypto.fi.aes_encrypt test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Aes command.
+        self.target.write(json.dumps("Aes").encode("ascii"))
+        # Plaintext and key
+        input_data = {"plaintext": plaintext, "key": key}
+        self.target.write(json.dumps(input_data).encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "plaintext_trigger": False,
+            "encrypt_trigger": True,
+            "ciphertext_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_aes_ciphertext(self, plaintext, key) -> None:
+        """Starts the crypto.fi.aes_ciphertext test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Aes command.
+        self.target.write(json.dumps("Aes").encode("ascii"))
+        # Plaintext and key
+        input_data = {"plaintext": plaintext, "key": key}
+        self.target.write(json.dumps(input_data).encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "plaintext_trigger": False,
+            "encrypt_trigger": False,
+            "ciphertext_trigger": True,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_kmac_key(self) -> None:
+        """Starts the crypto.fi.kmac_key test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Kmac command.
+        self.target.write(json.dumps("Kmac").encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": True,
+            "absorb_trigger": False,
+            "static_trigger": False,
+            "squeeze_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_kmac_absorb(self) -> None:
+        """Starts the crypto.fi.kmac_absorb test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Kmac command.
+        self.target.write(json.dumps("Kmac").encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "absorb_trigger": True,
+            "static_trigger": False,
+            "squeeze_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_kmac_squeeze(self) -> None:
+        """Starts the crypto.fi.kmac_squeeze test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Kmac command.
+        self.target.write(json.dumps("Kmac").encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "absorb_trigger": False,
+            "static_trigger": False,
+            "squeeze_trigger": True,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_kmac_static(self) -> None:
+        """Starts the crypto.fi.kmac_static test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Kmac command.
+        self.target.write(json.dumps("Kmac").encode("ascii"))
+        # Mode payload.
+        mode = {
+            "key_trigger": False,
+            "absorb_trigger": False,
+            "static_trigger": True,
+            "squeeze_trigger": False,
+        }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def crypto_kmac_state(self) -> None:
+        """Starts the crypto.fi.kmac_state test."""
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # KmacState command.
+        self.target.write(json.dumps("KmacState").encode("ascii"))
+
+    def crypto_hmac(
+        self,
+        msg,
+        key,
+        trigger,
+        enable_hmac,
+        message_endianness_big,
+        digest_endianness_big,
+        key_endianness_big,
+        hash_mode,
+    ) -> None:
+        # CryptoFi command.
+        self._ujson_crypto_cmd()
+        # Sha2 command.
+        self.target.write(json.dumps("Hmac").encode("ascii"))
+        data = {"message": msg, "key": key}
+        self.target.write(json.dumps(data).encode("ascii"))
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": False,
+                "enable_hmac": enable_hmac,
+                "message_endianness_big": message_endianness_big,
+                "digest_endianness_big": digest_endianness_big,
+                "key_endianness_big": key_endianness_big,
+                "hash_mode": hash_mode,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": True,
+                "process_trigger": False,
+                "finish_trigger": False,
+                "enable_hmac": enable_hmac,
+                "message_endianness_big": message_endianness_big,
+                "digest_endianness_big": digest_endianness_big,
+                "key_endianness_big": key_endianness_big,
+                "hash_mode": hash_mode,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": True,
+                "finish_trigger": False,
+                "enable_hmac": enable_hmac,
+                "message_endianness_big": message_endianness_big,
+                "digest_endianness_big": digest_endianness_big,
+                "key_endianness_big": key_endianness_big,
+                "hash_mode": hash_mode,
+            }
+        else:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": True,
+                "enable_hmac": enable_hmac,
+                "message_endianness_big": message_endianness_big,
+                "digest_endianness_big": digest_endianness_big,
+                "key_endianness_big": key_endianness_big,
+                "hash_mode": hash_mode,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def start_test(self, cfg: dict, *args, **kwargs) -> None:
+        """ Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            cfg: Config dict containing the selected test.
+            *args: Variable length argument list to be passed to the test function.
+            **kwargs: Arbitrary keyword arguments to be passed to the test function.
+        """
+        test_function = getattr(self, cfg["test"]["which_test"])
+        test_function(*args, **kwargs)
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_ibex_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_ibex_commands.py
new file mode 100644
index 0000000000000..dd8f8e8bf2642
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_ibex_commands.py
@@ -0,0 +1,409 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Ibex FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIIbex:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_ibex_fi_cmd(self) -> None:
+        self.target.write(json.dumps("IbexFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def ibex_char_unrolled_reg_op_loop(self) -> None:
+        """Starts the ibex.char.unrolled_reg_op_loop test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharUnrolledRegOpLoop command.
+        self.target.write(json.dumps("CharUnrolledRegOpLoop").encode("ascii"))
+
+    def ibex_char_unrolled_mem_op_loop(self) -> None:
+        """Starts the ibex.char.unrolled_mem_op_loop test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharUnrolledMemOpLoop command.
+        self.target.write(json.dumps("CharUnrolledMemOpLoop").encode("ascii"))
+
+    def ibex_char_reg_op_loop(self) -> None:
+        """Starts the ibex.char.reg_op_loop test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharRegOpLoop command.
+        self.target.write(json.dumps("CharRegOpLoop").encode("ascii"))
+
+    def ibex_char_unrolled_reg_op_loop_chain(self) -> None:
+        """Starts the ibex.char.reg_op_loop_chain test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharUnrolledRegOpLoopChain command.
+        self.target.write(json.dumps("CharUnrolledRegOpLoopChain").encode("ascii"))
+
+    def ibex_char_mem_op_loop(self) -> None:
+        """Starts the ibex.char.mem_op_loop test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharMemOpLoop command.
+        self.target.write(json.dumps("CharMemOpLoop").encode("ascii"))
+
+    def ibex_char_flash_read(self, flash_region=3) -> None:
+        """Starts the ibex.char.flash_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharFlashRead command.
+        self.target.write(json.dumps("CharFlashRead").encode("ascii"))
+        parameters = {"flash_region": flash_region}
+        self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def ibex_char_flash_write(self, flash_region=3) -> None:
+        """Starts the ibex.char.flash_write test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharFlashWrite command.
+        self.target.write(json.dumps("CharFlashWrite").encode("ascii"))
+        parameters = {"flash_region": flash_region}
+        self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def ibex_char_sram_read(self) -> None:
+        """Starts the ibex.char.sram_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramRead command.
+        self.target.write(json.dumps("CharSramRead").encode("ascii"))
+
+    def ibex_char_sram_read_ret(self) -> None:
+        """Starts the ibex.char.sram_read_ret test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramReadRet command.
+        self.target.write(json.dumps("CharSramReadRet").encode("ascii"))
+
+    def ibex_char_sram_write_static_unrolled(self) -> None:
+        """Starts the ibex.char.sram_write_static_unrolled test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramWriteStaticUnrolled command.
+        self.target.write(json.dumps("CharSramWriteStaticUnrolled").encode("ascii"))
+
+    def ibex_char_sram_write_read(self) -> None:
+        """Starts the ibex.char.sram_write_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramWriteRead command.
+        self.target.write(json.dumps("CharSramWriteRead").encode("ascii"))
+
+    def ibex_char_sram_write_read_alt(self) -> None:
+        """Starts the ibex.char.sram_write_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramWriteRead command.
+        self.target.write(json.dumps("CharSramWriteReadAlt").encode("ascii"))
+
+    def ibex_char_sram_write(self) -> None:
+        """Starts the ibex.char.sram_write test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramWrite command.
+        self.target.write(json.dumps("CharSramWrite").encode("ascii"))
+
+    def ibex_char_sram_static(self) -> None:
+        """Starts the ibex.char.sram_static test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSramStatic command.
+        self.target.write(json.dumps("CharSramStatic").encode("ascii"))
+
+    def ibex_char_single_beq(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSingleBeq command.
+        self.target.write(json.dumps("CharSingleBeq").encode("ascii"))
+
+    def ibex_char_addi_single_beq(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBeq command.
+        self.target.write(json.dumps("CharAddiSingleBeq").encode("ascii"))
+
+    def ibex_char_addi_single_beq_neg(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBeqNeg command.
+        self.target.write(json.dumps("CharAddiSingleBeqNeg").encode("ascii"))
+
+    def ibex_char_addi_single_beq_cm(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBeqCm command.
+        self.target.write(json.dumps("CharAddiSingleBeqCm").encode("ascii"))
+
+    def ibex_char_addi_single_beq_cm2(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBeqCm2 command.
+        self.target.write(json.dumps("CharAddiSingleBeqCm2").encode("ascii"))
+
+    def ibex_char_addi_single_bne(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBne command.
+        self.target.write(json.dumps("CharAddiSingleBne").encode("ascii"))
+
+    def ibex_char_single_bne(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharSingleBne command.
+        self.target.write(json.dumps("CharSingleBne").encode("ascii"))
+
+    def ibex_char_addi_single_bne_neg(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharAddiSingleBneNeg command.
+        self.target.write(json.dumps("CharAddiSingleBneNeg").encode("ascii"))
+
+    def ibex_char_conditional_branch_beq(self) -> None:
+        """Starts the ibex.char.conditional_branch_beq test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBeq command.
+        self.target.write(json.dumps("CharCondBranchBeq").encode("ascii"))
+
+    def ibex_char_conditional_branch_bne(self) -> None:
+        """Starts the ibex.char.conditional_branch_bne test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBne command.
+        self.target.write(json.dumps("CharCondBranchBne").encode("ascii"))
+
+    def ibex_char_conditional_branch_bge(self) -> None:
+        """Starts the ibex.char.conditional_branch_bge test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBge command.
+        self.target.write(json.dumps("CharCondBranchBge").encode("ascii"))
+
+    def ibex_char_conditional_branch_bgeu(self) -> None:
+        """Starts the ibex.char.conditional_branch_bgeu test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBgeu command.
+        self.target.write(json.dumps("CharCondBranchBgeu").encode("ascii"))
+
+    def ibex_char_conditional_branch_blt(self) -> None:
+        """Starts the ibex.char.conditional_branch_blt test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBglt command.
+        self.target.write(json.dumps("CharCondBranchBlt").encode("ascii"))
+
+    def ibex_char_conditional_branch_bltu(self) -> None:
+        """Starts the ibex.char.conditional_branch_bltu test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCondBranchBgltu command.
+        self.target.write(json.dumps("CharCondBranchBltu").encode("ascii"))
+
+    def ibex_char_unconditional_branch(self) -> None:
+        """Starts the ibex.char.unconditional_branch test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharUncondBranch command.
+        self.target.write(json.dumps("CharUncondBranch").encode("ascii"))
+
+    def ibex_char_unconditional_branch_nop(self) -> None:
+        """Starts the ibex.char.unconditional_branch_nop test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharUncondBranchNop command.
+        self.target.write(json.dumps("CharUncondBranchNop").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_complement_branch(self) -> None:
+        """Starts the ibex.char.hardened_check_eq_complement_branch test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheckComplementBranch command.
+        self.target.write(
+            json.dumps("CharHardenedCheckComplementBranch").encode("ascii")
+        )
+
+    def ibex_char_register_file(self) -> None:
+        """Starts the ibex.char.register_file test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharRegisterFile command.
+        self.target.write(json.dumps("CharRegisterFile").encode("ascii"))
+
+    def ibex_char_register_file_read(self) -> None:
+        """Starts the ibex.char.register_file_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharRegisterFileRead command.
+        self.target.write(json.dumps("CharRegisterFileRead").encode("ascii"))
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the Ibex FI code on the chip.
+
+        Returns:
+            Device id
+            The sensor control config
+            The alert config
+            The owner page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def start_test(self, cfg: dict) -> None:
+        """Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            cfg: Config dict containing the selected test.
+        """
+        test_function = getattr(self, cfg["test"]["which_test"])
+        test_function()
+
+    def ibex_char_csr_write(self) -> None:
+        """Starts the ibex.fi.char.csr_write test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCsrWrite command.
+        self.target.write(json.dumps("CharCsrWrite").encode("ascii"))
+
+    def ibex_char_csr_read(self) -> None:
+        """Starts the ibex.fi.char.csr_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCsrRead command.
+        self.target.write(json.dumps("CharCsrRead").encode("ascii"))
+
+    def ibex_char_csr_combi(self, trigger, ref_values) -> None:
+        """Starts the ibex.fi.char.csr_combi test.
+
+        Args:
+            trigger: Which triggers to raise.
+            ref_values: The values to be written in the CSRs.
+        """
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCsrCombi command.
+        self.target.write(json.dumps("CharCsrCombi").encode("ascii"))
+        data = {"trigger": trigger, "ref_values": ref_values}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_address_translation_config(self) -> None:
+        """Starts the ibex.fi.address_translation_config test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # AddressTranslationCfg command.
+        self.target.write(json.dumps("AddressTranslationCfg").encode("ascii"))
+
+    def ibex_address_translation(self) -> None:
+        """Starts the ibex.fi.address_translation test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # AddressTranslation command.
+        self.target.write(json.dumps("AddressTranslation").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_unimp(self) -> None:
+        """Starts the ibex.fi.char.hardened_check_eq_unimp test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheckUnimp command.
+        self.target.write(json.dumps("CharHardenedCheckUnimp").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_2_unimps(self) -> None:
+        """Starts the ibex.fi.char.hardened_check_eq_2_unimps test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheck2Unimps command.
+        self.target.write(json.dumps("CharHardenedCheck2Unimps").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_3_unimps(self) -> None:
+        """Starts the ibex.fi.char.hardened_check_eq_3_unimps test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheck3Unimps command.
+        self.target.write(json.dumps("CharHardenedCheck3Unimps").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_4_unimps(self) -> None:
+        """Starts the ibex.fi.char.hardened_check_eq_4_unimps test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheck4Unimps command.
+        self.target.write(json.dumps("CharHardenedCheck4Unimps").encode("ascii"))
+
+    def ibex_char_hardened_check_eq_5_unimps(self) -> None:
+        """Starts the ibex.fi.char.hardened_check_eq_5_unimps test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheck5Unimps command.
+        self.target.write(json.dumps("CharHardenedCheck5Unimps").encode("ascii"))
+
+    def ibex_char_combi(self) -> None:
+        """Starts the ibex.fi.char.combi test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharCombi command.
+        self.target.write(json.dumps("CharCombi").encode("ascii"))
+
+    def ibex_char_otp_data_read(self) -> None:
+        """Starts the ibex.fi.otp.data_read test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # OtpDataRead command.
+        self.target.write(json.dumps("OtpDataRead").encode("ascii"))
+
+    def ibex_char_otp_read_lock(self) -> None:
+        """Starts the ibex.fi.otp.read_lock test."""
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # OtpReadLock command.
+        self.target.write(json.dumps("OtpReadLock").encode("ascii"))
+
+    def ibex_characterise(self) -> None:
+        # IbexFi command.
+        self._ujson_ibex_fi_cmd()
+        # CharHardenedCheck3Unimps command.
+        self.target.write(json.dumps("Characterisation").encode("ascii"))
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_otbn_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_otbn_commands.py
new file mode 100644
index 0000000000000..a9325b1480b74
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_otbn_commands.py
@@ -0,0 +1,235 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan OTBN FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIOtbn:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_otbn_fi_cmd(self) -> None:
+        self.target.write(json.dumps("OtbnFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def otbn_char_dmem_access(self) -> None:
+        """Starts the otbn.fi.char.dmem.access test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharDmemAccess command.
+        self.target.write(json.dumps("CharDmemAccess").encode("ascii"))
+
+    def otbn_char_dmem_write(self) -> None:
+        """Starts the otbn.fi.char.dmem.write test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharDmemWrite command.
+        self.target.write(json.dumps("CharDmemWrite").encode("ascii"))
+
+    def otbn_char_rf(self) -> None:
+        """Starts the otbn.fi.char.rf test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharRF command.
+        self.target.write(json.dumps("CharRF").encode("ascii"))
+
+    def otbn_char_beq(self) -> None:
+        """Starts the otbn.fi.char.beq test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharBeq command.
+        self.target.write(json.dumps("CharBeq").encode("ascii"))
+
+    def otbn_char_jal(self) -> None:
+        """Starts the otbn.fi.char.jal test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharJal command.
+        self.target.write(json.dumps("CharJal").encode("ascii"))
+
+    def otbn_char_mem(self, byte_offset, num_words, imem, dmem, first_call) -> None:
+        """Starts the otbn.fi.char.mem test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharMem command.
+        self.target.write(json.dumps("CharMem").encode("ascii"))
+        if first_call:
+            parameters = {
+                "byte_offset": byte_offset,
+                "num_words": num_words,
+                "imem": imem,
+                "dmem": dmem,
+            }
+            self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def otbn_char_bn_sel(self, data) -> None:
+        """Starts the otbn.fi.char.bn.sel test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharBnSel command.
+        self.target.write(json.dumps("CharBnSel").encode("ascii"))
+        parameters = {"big_num": data}
+        self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def otbn_char_bne(self) -> None:
+        """Starts the otbn.fi.char.bne test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharBne command.
+        self.target.write(json.dumps("CharBne").encode("ascii"))
+
+    def otbn_char_bn_rshi(self, data) -> None:
+        """Starts the otbn.fi.char.bn.rshi test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharBnRshi command.
+        self.target.write(json.dumps("CharBnRshi").encode("ascii"))
+        parameters = {"big_num": data}
+        self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def otbn_char_bn_wsrr(self) -> None:
+        """Starts the otbn.fi.char.bn.wsrr test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharBnWsrr command.
+        self.target.write(json.dumps("CharBnWsrr").encode("ascii"))
+
+    def otbn_char_lw(self) -> None:
+        """Starts the otbn.fi.char.lw test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharLw command.
+        self.target.write(json.dumps("CharLw").encode("ascii"))
+
+    def otbn_char_unrolled_reg_op_loop(self) -> None:
+        """Starts the otbn.fi.char.unrolled.reg.op.loop test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharUnrolledRegOpLoop command.
+        self.target.write(json.dumps("CharUnrolledRegOpLoop").encode("ascii"))
+
+    def otbn_char_unrolled_dmem_op_loop(self) -> None:
+        """Starts the otbn.fi.char.unrolled.dmem.op.loop test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharUnrolledDmemOpLoop command.
+        self.target.write(json.dumps("CharUnrolledDmemOpLoop").encode("ascii"))
+
+    def otbn_char_hardware_reg_op_loop(self) -> None:
+        """Starts the otbn.fi.char.hardware.reg.op.loop test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharHardwareRegOpLoop command.
+        self.target.write(json.dumps("CharHardwareRegOpLoop").encode("ascii"))
+
+    def otbn_char_hardware_dmem_op_loop(self) -> None:
+        """Starts the otbn.fi.char.hardware.dmem.op.loop test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # CharMemOpLoop command.
+        self.target.write(json.dumps("CharHardwareDmemOpLoop").encode("ascii"))
+
+    def otbn_key_sideload(self) -> None:
+        """Starts the otbn.fi.key_sideload test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # KeySideload command.
+        self.target.write(json.dumps("KeySideload").encode("ascii"))
+
+    def otbn_load_integrity(self) -> None:
+        """Starts the otbn.fi.load_integrity test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # LoadIntegrity command.
+        self.target.write(json.dumps("LoadIntegrity").encode("ascii"))
+
+    def otbn_pc(self, pc) -> None:
+        """Starts the otbn.pc test."""
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # PC command.
+        self.target.write(json.dumps("PC").encode("ascii"))
+        parameters = {"pc": pc}
+        self.target.write(json.dumps(parameters).encode("ascii"))
+
+    def init_keymgr(self, test: str) -> None:
+        """Initialize the key manager on the chip.
+        Args:
+            test: Name of the test. Used to determine if key manager init is
+                  needed.
+        """
+        if "key_sideload" in test:
+            # OtbnFi command.
+            self._ujson_otbn_fi_cmd()
+            # InitTrigger command.
+            self.target.write(json.dumps("InitKeyMgr").encode("ascii"))
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the OTBN FI code on the chip.
+
+        Returns:
+            Device id
+            The sensor control config
+            The alert config
+            The owner page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # OtbnFi command.
+        self._ujson_otbn_fi_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def start_test(self, cfg: dict) -> None:
+        """Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            cfg: Config dict containing the selected test.
+        """
+        test_function = getattr(self, cfg["test"]["which_test"])
+        test_function()
+
+    def write_payload(self, payload: dict) -> None:
+        """Send test payload to OpenTitan.
+        Args:
+            payload: The data to send to the target.
+        """
+        self.target.write(json.dumps(payload).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_otp_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_otp_commands.py
new file mode 100644
index 0000000000000..0c889e91e578b
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_otp_commands.py
@@ -0,0 +1,104 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Otp FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIOtp:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_otp_fi_cmd(self) -> None:
+        self.target.write(json.dumps("OtpFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def otp_fi_vendor_test(self) -> None:
+        """Reads otp VENDOR_TEST partition."""
+        # IbexFi command.
+        self._ujson_otp_fi_cmd()
+        # VendorTest command.
+        self.target.write(json.dumps("VendorTest").encode("ascii"))
+
+    def otp_fi_owner_sw_cfg(self) -> None:
+        """Reads otp OWNER_SW_CFG partition."""
+        # IbexFi command.
+        self._ujson_otp_fi_cmd()
+        # OwnerSwCfg command.
+        self.target.write(json.dumps("OwnerSwCfg").encode("ascii"))
+
+    def otp_fi_hw_cfg(self) -> None:
+        """Reads otp HW_CFG partition."""
+        # IbexFi command.
+        self._ujson_otp_fi_cmd()
+        # HwCfg command.
+        self.target.write(json.dumps("HwCfg").encode("ascii"))
+
+    def otp_fi_life_cycle(self) -> None:
+        """Reads otp LIFE_CYCLE partition."""
+        # IbexFi command.
+        self._ujson_otp_fi_cmd()
+        # LifeCycle command.
+        self.target.write(json.dumps("LifeCycle").encode("ascii"))
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the Otp FI code on the chip.
+        Args:
+            cfg: Config dict containing the selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # OtpFi command.
+        self._ujson_otp_fi_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def start_test(self, cfg: dict) -> None:
+        """Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            cfg: Config dict containing the selected test.
+        """
+        test_function = getattr(self, cfg["test"]["which_test"])
+        test_function()
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_rng_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_rng_commands.py
new file mode 100644
index 0000000000000..be4b58f9edef7
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_rng_commands.py
@@ -0,0 +1,153 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan RNG FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from typing import Optional
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIRng:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_rng_cmd(self) -> None:
+        self.target.write(json.dumps("RngFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        test,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the RNG FI code on the chip.
+        Args:
+            test: The selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # Init command.
+        if "csrng" in test:
+            self.target.write(json.dumps("CsrngInit").encode("ascii"))
+        else:
+            self.target.write(json.dumps("EdnInit").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def rng_csrng_bias(self, trigger: int) -> None:
+        """Starts the rng_csrng_bias test."""
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # CsrngBias command.
+        self.target.write(json.dumps("CsrngBias").encode("ascii"))
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "valid_trigger": False,
+                "read_trigger": False,
+                "all_trigger": False,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "valid_trigger": True,
+                "read_trigger": False,
+                "all_trigger": False,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "valid_trigger": False,
+                "read_trigger": True,
+                "all_trigger": False,
+            }
+        elif trigger == 3:
+            mode = {
+                "start_trigger": False,
+                "valid_trigger": False,
+                "read_trigger": False,
+                "all_trigger": True,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def rng_edn_resp_ack(self) -> None:
+        """Starts the rng_edn_resp_ack test."""
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # EdnRespAck command.
+        self.target.write(json.dumps("EdnRespAck").encode("ascii"))
+
+    def rng_edn_bias(self) -> None:
+        """Starts the rng_edn_bias test."""
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # EdnBias command.
+        self.target.write(json.dumps("EdnBias").encode("ascii"))
+
+    def rng_entropy_bias(self) -> None:
+        """Starts the entropy_src_bias test."""
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # EntropySrcBias command.
+        self.target.write(json.dumps("EntropySrcBias").encode("ascii"))
+
+    def rng_fw_overwrite(self, disable_health_check: Optional[bool] = False) -> None:
+        """Starts the rng_fw_overwrite test.
+
+        Args:
+            disable_health_check: Turn the health check on or off.
+        """
+        # RngFi command.
+        self._ujson_rng_cmd()
+        # FWOverride command.
+        self.target.write(json.dumps("FWOverride").encode("ascii"))
+        data = {"disable_health_check": disable_health_check}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def start_test(self, cfg: dict, *args, **kwargs) -> None:
+        """Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            cfg: Config dict containing the selected test.
+            *args: Variable length argument list to be passed to the test function.
+            **kwargs: Arbitrary keyword arguments to be passed to the test function.
+        """
+        test_function = getattr(self, cfg["test"]["which_test"])
+        test_function(*args, **kwargs)
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_rom_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_rom_commands.py
new file mode 100644
index 0000000000000..67aba2e775150
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_rom_commands.py
@@ -0,0 +1,71 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Rom FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFIRom:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_rom_fi_cmd(self) -> None:
+        self.target.write(json.dumps("RomFi").encode("ascii"))
+        time.sleep(0.003)
+
+    def handle_rom_read(self) -> None:
+        """Reads Rom digest."""
+        # RomFi command.
+        self._ujson_rom_fi_cmd()
+        # Read command.
+        self.target.write(json.dumps("Read").encode("ascii"))
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the ROM FI code on the chip.
+        Args:
+            cfg: Config dict containing the selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # RomFi command.
+        self._ujson_rom_fi_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
diff --git a/sw/host/penetrationtests/python/fi/communication/fi_sym_cryptolib_commands.py b/sw/host/penetrationtests/python/fi/communication/fi_sym_cryptolib_commands.py
new file mode 100644
index 0000000000000..eb49e3a700478
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/communication/fi_sym_cryptolib_commands.py
@@ -0,0 +1,277 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for OpenTitan Symmetric Cryptolib FI framework.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTFISymCrypto:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_sym_crypto_fi_cmd(self) -> None:
+        self.target.write(json.dumps("CryptoLibFiSym").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+        alert_config: dict = common_library.default_alert_config,
+    ) -> tuple:
+        """Initialize the code on the chip.
+        Args:
+            cfg: Config dict containing the selected test.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+        self.target.write(json.dumps(alert_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        sensors = self.target.read_response()
+        alerts = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return (
+            device_id,
+            sensors,
+            alerts,
+            owner_page,
+            boot_log,
+            boot_measurements,
+            version,
+        )
+
+    def handle_aes(
+        self, data, data_len, key, key_len, iv, padding, mode, op_enc, cfg, trigger
+    ) -> None:
+        """Call the cryptolib AES.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            op_enc: Boolean specifying to encrypt or decrypt.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("Aes").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "padding": padding,
+            "mode": mode,
+            "op_enc": op_enc,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_cmac(
+        self, data, data_len, key, key_len, iv, cfg, trigger
+    ) -> None:
+        """Call the cryptolib CMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("Cmac").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_gcm(
+        self, data, data_len, key, key_len, aad, aad_len, tag, tag_len, iv, cfg, trigger
+    ) -> None:
+        """Call the cryptolib GCM.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            aad: Array of max 64 bytes of aad data.
+            aad_len: Input aad length.
+            tag: Array of max 64 bytes of tag data.
+            tag_len: Input tag length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("Gcm").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "aad": aad,
+            "aad_len": aad_len,
+            "tag": tag,
+            "tag_len": tag_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_hmac(
+        self, data, data_len, key, key_len, padding, mode, cfg, trigger
+    ) -> None:
+        """Call the cryptolib HMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 192 bytes of key data.
+            key_len: Input key length.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("Hmac").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "padding": padding,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_drbg_reseed(
+        self, entropy, entropy_len, nonce, nonce_len, reseed_interval, mode, cfg, trigger
+    ) -> None:
+        """Call the cryptolib DRBG to reseed.
+
+        Args:
+            entropy: Array of max 32 bytes of entropy data.
+            entropy_len: Input entropy length.
+            nonce: Array of max 16 bytes of nonce data.
+            nonce_len: Input nonce length.
+            reseed_interval: when to reseed.
+            mode: integer specifying the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("DrbgReseed").encode("ascii"))
+        input_data = {
+            "entropy": entropy,
+            "entropy_len": entropy_len,
+            "nonce": nonce,
+            "nonce_len": nonce_len,
+            "reseed_interval": reseed_interval,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_drbg_generate(
+        self, nonce, nonce_len, data_len, mode, cfg, trigger
+    ) -> None:
+        """Call the cryptolib DRBG to generate randomness.
+
+        Args:
+            nonce: Array of max 16 bytes of nonce data.
+            nonce_len: Input nonce length.
+            data_len: Length of the output data.
+            reseed_interval: when to reseed.
+            mode: integer specifying the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("DrbgGenerate").encode("ascii"))
+        input_data = {
+            "nonce": nonce,
+            "nonce_len": nonce_len,
+            "data_len": data_len,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_trng_init(
+        self, mode, cfg, trigger
+    ) -> None:
+        """Call the cryptolib TRNG to init.
+
+        Args:
+            mode: Integer for the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("TrngInit").encode("ascii"))
+        input_data = {
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_trng_generate(
+        self, cfg, trigger
+    ) -> None:
+        """Call the cryptolib TRNG to generate randomness.
+
+        Args:
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_fi_cmd()
+        self.target.write(json.dumps("TrngGenerate").encode("ascii"))
+        input_data = {
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/BUILD b/sw/host/penetrationtests/python/fi/gold_responses/BUILD
new file mode 100644
index 0000000000000..9d2105967debf
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/BUILD
@@ -0,0 +1,35 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "fi_rng",
+    srcs = ["fi_rng.json"],
+)
+
+filegroup(
+    name = "fi_ibex",
+    srcs = ["fi_ibex.json"],
+)
+
+filegroup(
+    name = "fi_otbn",
+    srcs = ["fi_otbn.json"],
+)
+
+filegroup(
+    name = "fi_otp",
+    srcs = ["fi_otp.json"],
+)
+
+filegroup(
+    name = "fi_rom",
+    srcs = ["fi_rom.json"],
+)
+
+filegroup(
+    name = "fi_crypto",
+    srcs = ["fi_crypto.json"],
+)
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_crypto.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_crypto.json
new file mode 100644
index 0000000000000..e00f105b4e1c5
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_crypto.json
@@ -0,0 +1,14 @@
+{
+    "char_shadow_reg_access": {
+      "result": [68162304, 0, 0],
+      "err_status": 0,
+      "alerts": [0, 0, 0],
+      "ast_alerts": [0, 0]
+    },
+    "char_shadow_reg_read": {
+      "result": [0, 0, 0],
+      "err_status": 0,
+      "alerts": [0, 0, 0],
+      "ast_alerts": [0, 0]
+    }
+}
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_ibex.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_ibex.json
new file mode 100644
index 0000000000000..55be04ea056c3
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_ibex.json
@@ -0,0 +1,1151 @@
+{
+  "char_addi_single_beq": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_addi_single_beq_neg": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_addi_single_bne": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_addi_single_bne_neg": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_combi": {
+    "data_faulty_test_1": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data_test_1": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "result_test_2": 13,
+    "result_test_3": 15,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_beq": {
+    "result1": 175,
+    "result2": 239,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_bge": {
+    "result1": 175,
+    "result2": 239,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_bgeu": {
+    "result1": 175,
+    "result2": 239,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_blt": {
+    "result1": 239,
+    "result2": 175,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_bltu": {
+    "result1": 239,
+    "result2": 175,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_conditional_branch_bne": {
+    "result1": 175,
+    "result2": 175,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_csr_read": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_csr_write": {
+    "result": 0,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_flash_read": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_flash_write": {
+    "result": 0,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_mem_op_loop": {
+    "result": [
+      10000,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_register_file": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_register_file_read": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_reg_op_loop": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_single_beq": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_single_bne": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_read": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_read_ret": {
+    "sram_err_status": 56,
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "data": [
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+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_static": {
+    "addresses": [
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0,
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+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_write": {
+    "memory": [
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+      2343432205,
+      2779096485,
+      2880154539,
+      2881141438,
+      2880293630,
+      3131746989,
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+    "err_status": 0,
+    "alerts": [
+      0,
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+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_write_read": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
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+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_write_read_alt": {
+    "memory": [
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+      3131746989,
+      3134333474,
+      2880293630,
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+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_sram_write_static_unrolled": {
+    "memory": [
+      464367618,
+      464367618,
+      464367618,
+      464367618,
+      464367618,
+      464367618,
+      464367618,
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+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_unconditional_branch": {
+    "result": 30,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_unconditional_branch_nop": {
+    "result": 0,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_unrolled_mem_op_loop": {
+    "result": 10000,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_unrolled_reg_op_loop": {
+    "result": 10000,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_unrolled_reg_op_loop_chain": {
+    "result": [
+      60,
+      55,
+      56,
+      57,
+      58,
+      59,
+      0,
+      0,
+      0,
+      0,
+      0,
+      0
+    ],
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_otp_data_read": {
+    "result": 0,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  },
+  "char_otp_read_lock": {
+    "result": 5,
+    "err_status": 0,
+    "alerts": [
+      0,
+      0,
+      0
+    ],
+    "ast_alerts": [
+      0,
+      0
+    ]
+  }
+}
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_otbn.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_otbn.json
new file mode 100644
index 0000000000000..31b0c7ec81baf
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_otbn.json
@@ -0,0 +1,146 @@
+{
+  "char_beq": {
+    "result": 0,
+    "insn_cnt": 509,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_bn_rshi": {
+    "big_num": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "insn_cnt": 109,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_bn_sel": {
+    "big_num": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "insn_cnt": 1014,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_bn_wsrr": {
+    "res": 0,
+    "insn_cnt": 1089,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_bne": {
+    "result": 0,
+    "insn_cnt": 509,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_dmem_access": {
+    "res": 0,
+    "insn_cnt": 271,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_dmem_write": {
+    "result": [
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    ],
+    "insn_cnt": 1,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_dmem_op_loop": {
+    "loop_counter": 10000,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_reg_op_loop": {
+    "loop_counter": 10000,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_jal": {
+    "result": 0,
+    "insn_cnt": 505,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_lw": {
+    "result": [
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    ],
+    "insn_cnt": 1084,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_mem": {
+    "res": 0,
+    "imem_data": [0, 0, 0, 0, 0, 0, 0, 0],
+    "imem_addr": [0, 0, 0, 0, 0, 0, 0, 0],
+    "dmem_data": [0, 0, 0, 0, 0, 0, 0, 0],
+    "dmem_addr": [0, 0, 0, 0, 0, 0, 0, 0],
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_rf": {
+    "res": 0,
+    "faulty_gpr": [
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    ],
+    "faulty_wdr": [
+      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+    ],
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_unrolled_dmem_op_loop": {
+    "loop_counter": 100,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_unrolled_reg_op_loop": {
+    "loop_counter": 100,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_load_integrity": {
+    "result": 0,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_pc": {
+    "pc_dmem": 2224,
+    "pc_otbn": 2224,
+    "insn_cnt": 472,
+    "err_otbn": 0,
+    "err_ibx": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  }
+}
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_otp.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_otp.json
new file mode 100644
index 0000000000000..450e560c7d0a4
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_otp.json
@@ -0,0 +1,292 @@
+{
+  "char_vendor_test": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "otp_error_causes": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "otp_status_codes": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_owner_sw_cfg": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "otp_error_causes": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "otp_status_codes": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_hw_cfg": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "otp_error_causes": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "otp_status_codes": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_life_cycle": {
+    "data_faulty": [
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false,
+      false
+    ],
+    "otp_error_causes": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "otp_status_codes": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  }
+}
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_rng.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_rng.json
new file mode 100644
index 0000000000000..4928e3edee3af
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_rng.json
@@ -0,0 +1,32 @@
+{
+  "char_csrng_bias": {
+    "res": 0,
+    "rand": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "err_status": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_edn_resp_ack": {
+    "collisions": 0,
+    "rand": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "err_status": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_edn_bias": {
+    "rand": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0],
+    "err_status": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_entropy_bias": {
+    "err_status": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  },
+  "char_fw_overwrite": {
+    "err_status": 0,
+    "alerts": [0, 0, 0],
+    "ast_alerts": [0, 0]
+  }
+}
diff --git a/sw/host/penetrationtests/python/fi/gold_responses/fi_rom.json b/sw/host/penetrationtests/python/fi/gold_responses/fi_rom.json
new file mode 100644
index 0000000000000..64fdb3c10b0fa
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/gold_responses/fi_rom.json
@@ -0,0 +1,8 @@
+{
+    "char_rom_read": {
+      "digest": [0, 0, 0, 0, 0, 0, 0, 0],
+      "err_status": 0,
+      "alerts": [0, 0, 0],
+      "ast_alerts": [0, 0]
+    }
+}
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_alert_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_alert_functions.py
new file mode 100644
index 0000000000000..671da4f875f0c
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_alert_functions.py
@@ -0,0 +1,48 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_alert_commands import OTFIAlert
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_alert_trigger(target, alert, reset = False):
+    alertfi = OTFIAlert(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        alertfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    alertfi.handle_alert_trigger(alert)
+    return target.check_reset_or_read_reponse()
+
+
+def char_alert_sensor_ctrl_trigger(target, reset = False):
+    alertfi = OTFIAlert(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        alertfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    alertfi.handle_alert_sensor_ctrl_trigger()
+    return target.check_reset_or_read_reponse()
+
+
+def char_alert_ibex_sw_fatal(target, reset = False):
+    alertfi = OTFIAlert(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        alertfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    alertfi.handle_alert_ibex_sw_fatal()
+    return target.check_reset_or_read_reponse()
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_asym_cryptolib_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_asym_cryptolib_functions.py
new file mode 100644
index 0000000000000..734ab5465104d
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_asym_cryptolib_functions.py
@@ -0,0 +1,309 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_asym_cryptolib_commands import (
+    OTFIAsymCrypto,
+)
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_rsa_encrypt(
+    target,
+    iterations,
+    data,
+    data_len,
+    e,
+    n,
+    n_len,
+    d,
+    padding,
+    hashing,
+    mode,
+    op_enc,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_rsa_enc(
+            data, data_len, e, n, n_len, d, padding, hashing, mode, op_enc, cfg, trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_rsa_sign(
+    target,
+    iterations,
+    data,
+    data_len,
+    e,
+    n,
+    n_len,
+    d,
+    padding,
+    hashing,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_rsa_sign(
+            data, data_len, e, n, n_len, d, padding, hashing, cfg, trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_rsa_verify(
+    target,
+    iterations,
+    data,
+    data_len,
+    e,
+    n,
+    n_len,
+    sig,
+    sig_len,
+    padding,
+    hashing,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_rsa_verify(
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            sig,
+            sig_len,
+            padding,
+            hashing,
+            cfg,
+            trigger,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_prime_generation(target, iterations, e, cfg, trigger, reset=False):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_prime_generation(e, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p256_base_mult(target, iterations, scalar, cfg, trigger, reset=False):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p256_base_mult(scalar, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p256_point_mult(
+    target, iterations, scalar_alice, scalar_bob, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p256_point_mult(scalar_alice, scalar_bob, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p256_ecdh(
+    target, iterations, private_key, public_x, public_y, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p256_ecdh(private_key, public_x, public_y, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p256_sign(
+    target, iterations, scalar, pubx, puby, message, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p256_sign(scalar, pubx, puby, message, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p256_verify(
+    target, iterations, pubx, puby, r, s, message, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p256_verify(pubx, puby, r, s, message, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p384_base_mult(target, iterations, scalar, cfg, trigger, reset=False):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p384_base_mult(scalar, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p384_point_mult(
+    target, iterations, scalar_alice, scalar_bob, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p384_point_mult(scalar_alice, scalar_bob, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p384_ecdh(
+    target, iterations, private_key, public_x, public_y, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p384_ecdh(private_key, public_x, public_y, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p384_sign(
+    target, iterations, scalar, pubx, puby, message, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p384_sign(scalar, pubx, puby, message, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_p384_verify(
+    target, iterations, pubx, puby, r, s, message, cfg, trigger, reset=False
+):
+    asymfi = OTFIAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        asymfi.handle_p384_verify(pubx, puby, r, s, message, cfg, trigger)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_crypto_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_crypto_functions.py
new file mode 100644
index 0000000000000..e5f8c1a18b5b7
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_crypto_functions.py
@@ -0,0 +1,151 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_crypto_commands import OTFICrypto
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_aes(target, iterations, plaintext, key, trigger, reset = False):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        if trigger == 0:
+            # Trigger over loading the key
+            cryptofi.crypto_aes_key(plaintext, key)
+        if trigger == 1:
+            # Trigger over loading the plaintext
+            cryptofi.crypto_aes_plaintext(plaintext, key)
+        if trigger == 2:
+            # Trigger over encryption
+            cryptofi.crypto_aes_encrypt(plaintext, key)
+        if trigger == 3:
+            # Trigger over reading the ciphertext
+            cryptofi.crypto_aes_ciphertext(plaintext, key)
+        response = target.read_response()
+    # Return the ciphertext that is read out
+    return response
+
+
+def char_kmac(target, iterations, trigger, reset = False):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        if trigger == 0:
+            # Trigger over loading the key
+            cryptofi.crypto_kmac_key()
+        if trigger == 1:
+            # Trigger over loading the input
+            cryptofi.crypto_kmac_absorb()
+        if trigger == 2:
+            # Trigger over the mac itself
+            cryptofi.crypto_kmac_static()
+        if trigger == 3:
+            # Trigger over reading the output
+            cryptofi.crypto_kmac_squeeze()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_kmac_state(target, iterations, reset = False):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        cryptofi.crypto_kmac_state()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_hmac(
+    target,
+    iterations,
+    msg,
+    key,
+    trigger,
+    enable_hmac,
+    message_endianness_big,
+    digest_endianness_big,
+    key_endianness_big,
+    hash_mode,
+    reset = False
+):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        cryptofi.crypto_hmac(
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_shadow_reg_access(target, iterations, reset = False):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        cryptofi.crypto_shadow_reg_access()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_shadow_reg_read(target, iterations, reset = False):
+    cryptofi = OTFICrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        cryptofi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        cryptofi.crypto_shadow_reg_read()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_ibex_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_ibex_functions.py
new file mode 100644
index 0000000000000..0a3d3655cae73
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_ibex_functions.py
@@ -0,0 +1,734 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_ibex_commands import OTFIIbex
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_address_translation(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_address_translation()
+        response = target.read_response()
+    return response
+
+
+def char_address_translation_config(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_address_translation_config()
+        response = target.read_response()
+    return response
+
+
+def char_addi_single_beq(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_addi_single_beq()
+        response = target.read_response()
+    return response
+
+
+def char_addi_single_beq_cm(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_addi_single_beq_cm()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_addi_single_beq_cm2(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_addi_single_beq_cm2()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_addi_single_beq_neg(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_addi_single_beq_neg()
+        response = target.read_response()
+    return response
+
+
+def char_addi_single_bne(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_addi_single_bne()
+        response = target.read_response()
+    return response
+
+
+def char_addi_single_bne_neg(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_addi_single_bne_neg()
+        response = target.read_response()
+    return response
+
+
+def char_combi(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_combi()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_beq(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_beq()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_bge(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_bge()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_bgeu(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_bgeu()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_blt(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_blt()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_bltu(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_bltu()
+        response = target.read_response()
+    return response
+
+
+def char_conditional_branch_bne(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_conditional_branch_bne()
+        response = target.read_response()
+    return response
+
+
+def char_csr_read(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_csr_read()
+        response = target.read_response()
+    return response
+
+
+def char_csr_write(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_csr_write()
+        response = target.read_response()
+    return response
+
+
+def char_csr_combi(target, trigger, ref_values, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_csr_combi(trigger, ref_values)
+        response = target.read_response()
+    return response
+
+
+def char_flash_read(target, flash_region, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_flash_read(flash_region)
+        response = target.read_response()
+    return response
+
+
+def char_flash_write(target, flash_region, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_flash_write(flash_region)
+        response = target.read_response()
+    return response
+
+
+def char_hardened_check_eq_complement_branch(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_complement_branch()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_hardened_check_eq_unimp(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_unimp()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_hardened_check_eq_2_unimps(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_2_unimps()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_hardened_check_eq_3_unimps(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_3_unimps()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_hardened_check_eq_4_unimps(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_4_unimps()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_hardened_check_eq_5_unimps(target, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    ibexfi.ibex_char_hardened_check_eq_5_unimps()
+    # This crashes the chip in a regular circumstance
+    return target.check_fault_or_read_reponse()
+
+
+def char_mem_op_loop(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_mem_op_loop()
+        response = target.read_response()
+    return response
+
+
+def char_register_file(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_register_file()
+        response = target.read_response()
+    return response
+
+
+def char_register_file_read(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_register_file_read()
+        response = target.read_response()
+    return response
+
+
+def char_reg_op_loop(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_reg_op_loop()
+        response = target.read_response()
+    return response
+
+
+def char_single_beq(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_single_beq()
+        response = target.read_response()
+    return response
+
+
+def char_single_bne(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_single_bne()
+        response = target.read_response()
+    return response
+
+
+def char_sram_read(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_read()
+        response = target.read_response()
+    return response
+
+
+def char_sram_read_ret(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_read_ret()
+        response = target.read_response()
+    return response
+
+
+def char_sram_static(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_static()
+        response = target.read_response()
+    return response
+
+
+def char_sram_write(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_write()
+        response = target.read_response()
+    return response
+
+
+def char_sram_write_read(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_write_read()
+        response = target.read_response()
+    return response
+
+
+def char_sram_write_read_alt(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_write_read_alt()
+        response = target.read_response()
+    return response
+
+
+def char_sram_write_static_unrolled(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_sram_write_static_unrolled()
+        response = target.read_response()
+    return response
+
+
+def char_unconditional_branch(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_unconditional_branch()
+        response = target.read_response()
+    return response
+
+
+def char_unconditional_branch_nop(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_unconditional_branch_nop()
+        response = target.read_response()
+    return response
+
+
+def char_unrolled_mem_op_loop(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_unrolled_mem_op_loop()
+        response = target.read_response()
+    return response
+
+
+def char_unrolled_reg_op_loop(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_unrolled_reg_op_loop()
+        response = target.read_response()
+    return response
+
+
+def char_unrolled_reg_op_loop_chain(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_unrolled_reg_op_loop_chain()
+        response = target.read_response()
+    return response
+
+
+def char_otp_data_read(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_otp_data_read()
+        response = target.read_response()
+    return response
+
+
+def char_otp_read_lock(target, iterations, reset = False):
+    ibexfi = OTFIIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        ibexfi.ibex_char_otp_read_lock()
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_otbn_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_otbn_functions.py
new file mode 100644
index 0000000000000..6f9ecb1b1710c
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_otbn_functions.py
@@ -0,0 +1,298 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_otbn_commands import OTFIOtbn
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_beq(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_beq()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_bn_rshi(target, iterations, data, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_bn_rshi(data)
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_bn_sel(target, iterations, data, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_bn_sel(data)
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_bn_wsrr(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_bn_wsrr()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_bne(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_bne()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_dmem_access(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_dmem_access()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_dmem_write(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_dmem_write()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_dmem_op_loop(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_hardware_dmem_op_loop()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_reg_op_loop(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_hardware_reg_op_loop()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_jal(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_jal()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_lw(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_lw()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_mem(target, iterations, byte_offset, num_words, imem, dmem, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    # The config is only set in the first call
+    first_call = True
+    for _ in range(iterations):
+        otbnfi.otbn_char_mem(byte_offset, num_words, imem, dmem, first_call)
+        first_call = False
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_rf(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_rf()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_unrolled_dmem_op_loop(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_unrolled_dmem_op_loop()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_unrolled_reg_op_loop(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_char_unrolled_reg_op_loop()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_load_integrity(target, iterations, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_load_integrity()
+        response = target.read_response()
+    # Return the result that is read out
+    return response
+
+
+def char_pc(target, iterations, pc, reset = False):
+    otbnfi = OTFIOtbn(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otbnfi.otbn_pc(pc)
+        response = target.read_response()
+    # Return the result that is read out
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_otp_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_otp_functions.py
new file mode 100644
index 0000000000000..dd83b78bd1667
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_otp_functions.py
@@ -0,0 +1,70 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_otp_commands import OTFIOtp
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_vendor_test(target, iterations, reset = False):
+    otpfi = OTFIOtp(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otpfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otpfi.otp_fi_vendor_test()
+        response = target.read_response()
+    return response
+
+
+def char_owner_sw_cfg(target, iterations, reset = False):
+    otpfi = OTFIOtp(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otpfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otpfi.otp_fi_owner_sw_cfg()
+        response = target.read_response()
+    return response
+
+
+def char_hw_cfg(target, iterations, reset = False):
+    otpfi = OTFIOtp(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otpfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otpfi.otp_fi_hw_cfg()
+        response = target.read_response()
+    return response
+
+
+def char_life_cycle(target, iterations, reset = False):
+    otpfi = OTFIOtp(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        otpfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        otpfi.otp_fi_life_cycle()
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_rng_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_rng_functions.py
new file mode 100644
index 0000000000000..32bf97492d648
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_rng_functions.py
@@ -0,0 +1,92 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_rng_commands import OTFIRng
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_csrng_bias(target, iterations, trigger, reset = False):
+    rngfi = OTFIRng(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        rngfi.init("char_csrng_bias",
+                   alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        rngfi.rng_csrng_bias(trigger)
+        response = target.read_response()
+    return response
+
+
+def char_edn_resp_ack(target, iterations, reset = False):
+    rngfi = OTFIRng(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        rngfi.init("char_csrng_bias",
+                   alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        rngfi.rng_edn_resp_ack()
+        response = target.read_response()
+    return response
+
+
+def char_edn_bias(target, iterations, reset = False):
+    rngfi = OTFIRng(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        rngfi.init("char_edn_bias",
+                   alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        rngfi.rng_edn_bias()
+        response = target.read_response()
+    return response
+
+
+def char_entropy_bias(target, iterations, reset = False):
+    rngfi = OTFIRng(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        rngfi.init("char_entropy_bias",
+                   alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        rngfi.rng_entropy_bias()
+        response = target.read_response()
+    return response
+
+
+def char_fw_overwrite(target, iterations, disable_health_check):
+    rngfi = OTFIRng(target)
+
+    for _ in range(iterations):
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+
+        # Initialize our chip and catch its output
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            rngfi.init("char_fw_overwrite",
+                       alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        rngfi.rng_fw_overwrite(disable_health_check)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_rom_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_rom_functions.py
new file mode 100644
index 0000000000000..d89bad0994297
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_rom_functions.py
@@ -0,0 +1,22 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_rom_commands import OTFIRom
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_rom_read(target, iterations, reset = False):
+    romfi = OTFIRom(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        romfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        romfi.handle_rom_read()
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/host_scripts/fi_sym_cryptolib_functions.py b/sw/host/penetrationtests/python/fi/host_scripts/fi_sym_cryptolib_functions.py
new file mode 100644
index 0000000000000..ad477f0339c0a
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/host_scripts/fi_sym_cryptolib_functions.py
@@ -0,0 +1,173 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.communication.fi_sym_cryptolib_commands import (
+    OTFISymCrypto,
+)
+from sw.host.penetrationtests.python.util import common_library
+
+
+def char_aes(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    iv,
+    padding,
+    mode,
+    op_enc,
+    cfg,
+    trigger,
+    reset=False,
+):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        symfi.handle_aes(
+            data, data_len, key, key_len, iv, padding, mode, op_enc, cfg, trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_cmac(
+    target, iterations, data, data_len, key, key_len, iv, cfg, trigger, reset=False
+):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        symfi.handle_cmac(data, data_len, key, key_len, iv, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_gcm(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    aad,
+    aad_len,
+    tag,
+    tag_len,
+    iv,
+    cfg,
+    trigger,
+    reset=False,
+):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        symfi.handle_gcm(
+            data, data_len, key, key_len, aad, aad_len, tag, tag_len, iv, cfg, trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_hmac(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    padding,
+    mode,
+    cfg,
+    trigger,
+    reset=False,
+):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    for _ in range(iterations):
+        symfi.handle_hmac(data, data_len, key, key_len, padding, mode, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_drbg(
+    target,
+    iterations,
+    entropy,
+    entropy_len,
+    nonce,
+    nonce_len,
+    reseed_interval,
+    data_len,
+    mode,
+    cfg,
+    trigger,
+    reset=False,
+):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    # In this test, we do not trigger the reseeding
+    symfi.handle_drbg_reseed(
+        entropy, entropy_len, nonce, nonce_len, reseed_interval, mode, 0, 0
+    )
+    response = target.read_response()
+    for _ in range(iterations):
+        # In this test, we do not add to the nonce
+        symfi.handle_drbg_generate([0], 0, data_len, mode, cfg, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_trng(target, iterations, mode, cfg, trigger, reset=False):
+    symfi = OTFISymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+        symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+    )
+    # In this test, we do not trigger the init
+    symfi.handle_trng_init(mode, 0, 0)
+    response = target.read_response()
+    for _ in range(iterations):
+        symfi.handle_trng_generate(cfg, trigger)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_alert_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_alert_python_test.py
new file mode 100644
index 0000000000000..8f90f281058e1
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_alert_python_test.py
@@ -0,0 +1,409 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_alert_functions
+from sw.host.penetrationtests.python.fi.communication.fi_alert_commands import OTFIAlert
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+
+target = None
+is_fpga = False
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+case_to_alert_list_map = [
+    42,  # Case 0 maps to alert_list index 42 ("aes_recov_ctrl_update_err")
+    43,  # Case 1 maps to alert_list index 43 ("aes_fatal_fault")
+    31,  # Case 2 maps to alert_list index 31 ("aon_timer_aon_fatal_fault")
+    25,  # Case 3 maps to alert_list index 25 ("clkmgr_aon_recov_fault")
+    26,  # Case 4 maps to alert_list index 26 ("clkmgr_aon_fatal_fault")
+    51,  # Case 5 maps to alert_list index 51 ("csrng_recov_alert")
+    52,  # Case 6 maps to alert_list index 52 ("csrng_fatal_alert")
+    55,  # Case 7 maps to alert_list index 55 ("edn0_recov_alert")
+    56,  # Case 8 maps to alert_list index 56 ("edn0_fatal_alert")
+    57,  # Case 9 maps to alert_list index 57 ("edn1_recov_alert")
+    58,  # Case 10 maps to alert_list index 58 ("edn1_fatal_alert")
+    53,  # Case 11 maps to alert_list index 53 ("entropy_src_recov_alert")
+    54,  # Case 12 maps to alert_list index 54 ("entropy_src_fatal_alert")
+    35,  # Case 13 maps to alert_list index 35 ("flash_ctrl_recov_err")
+    36,  # Case 14 maps to alert_list index 36 ("flash_ctrl_fatal_std_err")
+    37,  # Case 15 maps to alert_list index 37 ("flash_ctrl_fatal_err")
+    38,  # Case 16 maps to alert_list index 38 ("flash_ctrl_fatal_prim_flash_alert")
+    39,  # Case 17 maps to alert_list index 39 ("flash_ctrl_recov_prim_flash_alert")
+    4,  # Case 18 maps to alert_list index 4 ("gpio_fatal_fault")
+    44,  # Case 19 maps to alert_list index 44 ("hmac_fatal_fault")
+    6,  # Case 20 maps to alert_list index 6 ("i2c0_fatal_fault")
+    7,  # Case 21 maps to alert_list index 7 ("i2c1_fatal_fault")
+    8,  # Case 22 maps to alert_list index 8 ("i2c2_fatal_fault")
+    49,  # Case 23 maps to alert_list index 49 ("keymgr_recov_operation_err")
+    50,  # Case 24 maps to alert_list index 50 ("keymgr_fatal_fault_err")
+    45,  # Case 25 maps to alert_list index 45 ("kmac_recov_operation_err")
+    46,  # Case 26 maps to alert_list index 46 ("kmac_fatal_fault_err")
+    16,  # Case 27 maps to alert_list index 16 ("lc_ctrl_fatal_prog_error")
+    17,  # Case 28 maps to alert_list index 17 ("lc_ctrl_fatal_state_error")
+    18,  # Case 29 maps to alert_list index 18 ("lc_ctrl_fatal_bus_integ_error")
+    47,  # Case 30 maps to alert_list index 47 ("otbn_fatal")
+    48,  # Case 31 maps to alert_list index 48 ("otbn_recov")
+    11,  # Case 32 maps to alert_list index 11 ("otp_ctrl_fatal_macro_error")
+    12,  # Case 33 maps to alert_list index 12 ("otp_ctrl_fatal_check_error")
+    13,  # Case 34 maps to alert_list index 13 ("otp_ctrl_fatal_bus_integ_error")
+    14,  # Case 35 maps to alert_list index 14 ("otp_ctrl_fatal_prim_otp_alert")
+    15,  # Case 36 maps to alert_list index 15 ("otp_ctrl_recov_prim_otp_alert")
+    9,  # Case 37 maps to alert_list index 9 ("pattgen_fatal_fault")
+    30,  # Case 38 maps to alert_list index 30 ("pinmux_aon_fatal_fault")
+    29,  # Case 39 maps to alert_list index 29 ("pwm_aon_fatal_fault")
+    22,  # Case 40 maps to alert_list index 22 ("pwrmgr_aon_fatal_fault")
+    60,  # Case 41 maps to alert_list index 60 ("rom_ctrl_fatal")
+    23,  # Case 42 maps to alert_list index 23 ("rstmgr_aon_fatal_fault")
+    24,  # Case 43 maps to alert_list index 24 ("rstmgr_aon_fatal_cnsty_fault")
+    61,  # Case 44 maps to alert_list index 61 ("rv_core_ibex_fatal_sw_err")
+    62,  # Case 45 maps to alert_list index 62 ("rv_core_ibex_recov_sw_err")
+    63,  # Case 46 maps to alert_list index 63 ("rv_core_ibex_fatal_hw_err")
+    64,  # Case 47 maps to alert_list index 64 ("rv_core_ibex_recov_hw_err")
+    41,  # Case 48 maps to alert_list index 41 ("rv_plic_fatal_fault")
+    10,  # Case 49 maps to alert_list index 10 ("rv_timer_fatal_fault")
+    32,  # Case 50 maps to alert_list index 32 ("sensor_ctrl_recov_alert")
+    33,  # Case 51 maps to alert_list index 33 ("sensor_ctrl_fatal_alert")
+    5,  # Case 52 maps to alert_list index 5 ("spi_device_fatal_fault")
+    19,  # Case 53 maps to alert_list index 19 ("spi_host0_fatal_fault")
+    20,  # Case 54 maps to alert_list index 20 ("spi_host1_fatal_fault")
+    59,  # Case 55 maps to alert_list index 59 ("sram_ctrl_main_fatal_error")
+    34,  # Case 56 maps to alert_list index 34 ("sram_ctrl_ret_aon_fatal_error")
+    27,  # Case 57 maps to alert_list index 27 ("sysrst_ctrl_aon_fatal_fault")
+    0,  # Case 58 maps to alert_list index 0 ("uart0_fatal_fault")
+    1,  # Case 59 maps to alert_list index 1 ("uart1_fatal_fault")
+    2,  # Case 60 maps to alert_list index 2 ("uart2_fatal_fault")
+    3,  # Case 61 maps to alert_list index 3 ("uart3_fatal_fault")
+    21,  # Case 62 maps to alert_list index 21 ("usbdev_fatal_fault")
+]
+
+
+class AlertFiTest(unittest.TestCase):
+
+    def test_init(self):
+        alertfi = OTFIAlert(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            alertfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    # We check the default alert config by writing to the alert_test registers
+    def test_char_alert_trigger(self):
+        # The exception list spans spi and usb alerts since those blocks will
+        # no longer function after a recoverable alert
+        exception_list = [19, 20, 21]
+        # On the FPGA, we exclude flash_ctrl_fatal_err
+        if is_fpga:
+            exception_list.extend([37])
+        print(exception_list)
+        for alert in range(63):
+            translated_alert = case_to_alert_list_map[alert]
+            if translated_alert not in exception_list:
+                actual_result, got_response = fi_alert_functions.char_alert_trigger(
+                    target, alert, reset=True
+                )
+                alert_class = common_library.default_fpga_friendly_alert_config[
+                    "alert_classes"
+                ][translated_alert]
+                alert_enabled = common_library.default_fpga_friendly_alert_config[
+                    "enable_alerts"
+                ][translated_alert]
+                enabled_class = common_library.default_fpga_friendly_alert_config[
+                    "enable_classes"
+                ][alert_class]
+                threshold = common_library.default_fpga_friendly_alert_config[
+                    "accumulation_thresholds"
+                ][alert_class]
+                reset_enabled = (
+                    3 in common_library.default_fpga_friendly_alert_config["signals"]
+                )
+
+                if (
+                    reset_enabled and
+                    alert_enabled and
+                    enabled_class and
+                    (threshold == 0)
+                ):
+                    self.assertEqual(
+                        got_response,
+                        False,
+                        msg=f"Expected a reset but got an output. \
+                                        Failed for input {alert} and response {actual_result}",
+                    )
+                else:
+                    self.assertEqual(
+                        got_response,
+                        True,
+                        msg=f"Expected an output but got a reset. \
+                                        Failed for input {alert}",
+                    )
+                    actual_result_json = json.loads(actual_result)
+                    alert_array = [0, 0, 0]
+                    if translated_alert < 32:
+                        alert_array[0] = 1 << translated_alert
+                    elif translated_alert < 64:
+                        alert_array[1] = 1 << (translated_alert - 32)
+                    else:
+                        alert_array[2] = 1 << (translated_alert - 64)
+                    expected_result_json = {
+                        "err_status": 0,
+                        "alerts": alert_array,
+                        "ast_alerts": [0, 0],
+                    }
+                    utils.compare_json_data(
+                        actual_result_json, expected_result_json, ignored_keys_set
+                    )
+
+    # We check the default alert config by writing to the alert_trig register in the sensor control
+    def test_char_alert_sensor_ctrl_trigger(self):
+        actual_result, got_response = fi_alert_functions.char_alert_sensor_ctrl_trigger(
+            target, reset=True
+        )
+        sensor_cntr_recov = case_to_alert_list_map[50]
+        sensor_cntr_fatal = case_to_alert_list_map[51]
+        alert_recov_enabled = common_library.default_fpga_friendly_alert_config[
+            "enable_alerts"
+        ][sensor_cntr_recov]
+        alert_fatal_enabled = common_library.default_fpga_friendly_alert_config[
+            "enable_alerts"
+        ][sensor_cntr_fatal]
+        sensor_ctrl_en_fatal = common_library.default_sensor_config[
+            "sensor_ctrl_en_fatal"
+        ][0]
+        reset_enabled = (
+            3 in common_library.default_fpga_friendly_alert_config["signals"]
+        )
+
+        if reset_enabled and (
+            (sensor_ctrl_en_fatal and alert_fatal_enabled) or
+            (not sensor_ctrl_en_fatal and alert_recov_enabled)
+        ):
+            self.assertEqual(
+                got_response,
+                False,
+                msg="Expected a reset but got an output for the alert_trig.",
+            )
+        else:
+            self.assertEqual(
+                got_response,
+                True,
+                msg="Expected an output but got a reset for the alert_trig",
+            )
+
+    # We check the default alert config by writing to the fatal sw alert from ibex
+    def test_char_alert_ibex_sw_fatal(self):
+        actual_result, got_response = fi_alert_functions.char_alert_ibex_sw_fatal(
+            target, reset=True
+        )
+        ibex_sw_fatal = case_to_alert_list_map[44]
+        alert_class = common_library.default_fpga_friendly_alert_config[
+            "alert_classes"
+        ][ibex_sw_fatal]
+        alert_fatal_enabled = common_library.default_fpga_friendly_alert_config[
+            "enable_alerts"
+        ][ibex_sw_fatal]
+        reset_enabled = (
+            3 in common_library.default_fpga_friendly_alert_config["signals"]
+        )
+        enabled_class = common_library.default_fpga_friendly_alert_config[
+            "enable_classes"
+        ][alert_class]
+
+        if reset_enabled and alert_fatal_enabled and enabled_class:
+            self.assertEqual(
+                got_response,
+                False,
+                msg="Expected a reset but got an output for the ibex sw fatal.",
+            )
+        elif alert_fatal_enabled:
+            self.assertEqual(
+                got_response,
+                True,
+                msg="Expected an output but got a reset for the ibex sw fatal",
+            )
+            actual_result_json = json.loads(actual_result)
+            alert_array = [0, 0, 0]
+            if ibex_sw_fatal < 32:
+                alert_array[0] = 1 << ibex_sw_fatal
+            elif ibex_sw_fatal < 64:
+                alert_array[1] = 1 << (ibex_sw_fatal - 32)
+            else:
+                alert_array[2] = 1 << (ibex_sw_fatal - 64)
+            expected_result_json = {
+                "err_status": 0,
+                "alerts": alert_array,
+                "ast_alerts": [0, 0],
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+        else:
+            self.assertEqual(
+                got_response,
+                True,
+                msg="Expected an output but got a reset for the aes ctrl",
+            )
+            actual_result_json = json.loads(actual_result)
+            expected_result_json = {
+                "err_status": 0,
+                "alerts": [0, 0, 0],
+                "ast_alerts": [0, 0],
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+        is_fpga = True
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_asym_cryptolib_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_asym_cryptolib_python_test.py
new file mode 100644
index 0000000000000..c66fe5335f6c0
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_asym_cryptolib_python_test.py
@@ -0,0 +1,599 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_asym_cryptolib_functions
+from sw.host.penetrationtests.python.fi.communication.fi_asym_cryptolib_commands import (
+    OTFIAsymCrypto,
+)
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+import random
+from Crypto.PublicKey import RSA, ECC
+from Crypto.Signature import pkcs1_15, DSS
+from Crypto.Hash import SHA256, SHA384
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 1
+repetitions = 3
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class SymCryptolibFiTest(unittest.TestCase):
+
+    def test_init(self):
+        asymfi = OTFIAsymCrypto(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            asymfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_rsa_encrypt(self):
+        n_len = 256
+        key = RSA.generate(2048)
+        e = key.e
+        d = [x for x in (key.d).to_bytes(256, "little")]
+        n = [x for x in (key.n).to_bytes(256, "little")]
+        data_len = 13
+        data = [random.randint(0, 255) for _ in range(data_len)]
+        op_enc = True
+        cfg = 0
+        trigger = 0
+        hashing = 0
+        padding = 0
+        mode = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_rsa_encrypt(
+            target,
+            iterations,
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            mode,
+            op_enc,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        enc_ignored_keys_set = ignored_keys_set.copy()
+        enc_ignored_keys_set.add("data")
+        enc_ignored_keys_set.add("data_len")
+
+        expected_result_json = {
+            "status": 0,
+            "d": utils.pad_with_zeros(d, 512),
+            "n": utils.pad_with_zeros(n, 512),
+            "n_len": 256,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, enc_ignored_keys_set
+        )
+
+        encrypted_data = actual_result_json["data"]
+        encrypted_data_len = actual_result_json["data_len"]
+        op_enc = False
+
+        actual_result = fi_asym_cryptolib_functions.char_rsa_encrypt(
+            target,
+            iterations,
+            encrypted_data,
+            encrypted_data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            mode,
+            op_enc,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        decrypted_data = actual_result_json["data"]
+        decrypted_data_len = actual_result_json["data_len"]
+
+        assert decrypted_data_len == data_len, f"{decrypted_data_len} vs. {data_len}"
+        assert decrypted_data[:data_len] == data, f"{decrypted_data} vs. {data}"
+
+    def test_char_rsa_sign(self):
+        n_len = 256
+        key = RSA.generate(2048)
+        e = key.e
+        d = [x for x in (key.d).to_bytes(256, "little")]
+        n = [x for x in (key.n).to_bytes(256, "little")]
+        data_len = 13
+        data = [random.randint(0, 255) for _ in range(data_len)]
+        cfg = 0
+        trigger = 0
+        hashing = 0
+        padding = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_rsa_sign(
+            target,
+            iterations,
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("sig")
+
+        expected_result_json = {
+            "status": 0,
+            "d": utils.pad_with_zeros(d, 512),
+            "n": utils.pad_with_zeros(n, 512),
+            "n_len": 256,
+            "sig_len": 256,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        signature = actual_result_json["sig"]
+        signature = signature[:256]
+        signature.reverse()
+        h_verified = SHA256.new(bytes(data))
+        verifier = pkcs1_15.new(key.public_key())
+        verifier.verify(h_verified, bytes(signature))
+
+    def test_char_rsa_verify(self):
+        key = RSA.generate(2048)
+        e = key.e
+        n = [x for x in (key.n).to_bytes(256, "little")]
+        n_len = 256
+        data_len = 13
+        data = [random.randint(0, 255) for _ in range(data_len)]
+        h = SHA256.new(bytes(data))
+        signer = pkcs1_15.new(key)
+        signature = signer.sign(h)
+        sig = [x for x in signature]
+        sig.reverse()
+        sig_len = len(sig)
+        cfg = 0
+        trigger = 0
+        hashing = 0
+        padding = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_rsa_verify(
+            target,
+            iterations,
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            sig,
+            sig_len,
+            padding,
+            hashing,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        expected_result_json = {
+            "status": 0,
+            "result": True,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p256_ecdh(self):
+        private_key = ECC.generate(curve="P-256")
+        private_key_array = [x for x in private_key.d.to_bytes(32, "little")]
+        key = ECC.generate(curve="P-256")
+        public_point = key.pointQ
+        public_x = [x for x in public_point.x.to_bytes(32, "little")]
+        public_y = [x for x in public_point.y.to_bytes(32, "little")]
+        cfg = 0
+        trigger = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_p256_ecdh(
+            target,
+            iterations,
+            private_key_array,
+            public_x,
+            public_y,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        shared_secret_point = key.pointQ * private_key.d
+        shared_secret_point = [x for x in shared_secret_point.x.to_bytes(32, "little")]
+
+        expected_result_json = {
+            "status": 0,
+            "shared_key": shared_secret_point,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p256_sign(self):
+        key = ECC.generate(curve="P-256")
+        scalar = [x for x in key.d.to_bytes(32, "little")]
+        pubx = [x for x in key.pointQ.x.to_bytes(32, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(32, "little")]
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA256.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+        cfg = 0
+        trigger = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_p256_sign(
+            target,
+            iterations,
+            scalar,
+            pubx,
+            puby,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("r")
+        sign_ignored_keys_set.add("s")
+        sign_ignored_keys_set.add("pubx")
+        sign_ignored_keys_set.add("puby")
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        verifier = DSS.new(key.public_key(), "fips-186-3")
+        r = actual_result_json["r"]
+        s = actual_result_json["s"]
+        r.reverse()
+        s.reverse()
+        signature = r + s
+        verifier.verify(h, bytes(signature))
+
+    def test_char_p256_verify(self):
+        key = ECC.generate(curve="P-256")
+        pubx = [x for x in key.pointQ.x.to_bytes(32, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(32, "little")]
+
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA256.new(bytes(message))
+
+        signer = DSS.new(key, "fips-186-3")
+        signature = [x for x in signer.sign(h)]
+        r_bytes = signature[:32]
+        s_bytes = signature[32:]
+        r_bytes.reverse()
+        s_bytes.reverse()
+        cfg = 0
+        trigger = 1
+
+        h = SHA256.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+
+        actual_result = fi_asym_cryptolib_functions.char_p256_verify(
+            target,
+            iterations,
+            pubx,
+            puby,
+            r_bytes,
+            s_bytes,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        expected_result_json = {
+            "status": 0,
+            "result": True,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p384_ecdh(self):
+        private_key = ECC.generate(curve="P-384")
+        private_key_array = [x for x in private_key.d.to_bytes(48, "little")]
+        key = ECC.generate(curve="P-384")
+        public_point = key.pointQ
+        public_x = [x for x in public_point.x.to_bytes(48, "little")]
+        public_y = [x for x in public_point.y.to_bytes(48, "little")]
+        cfg = 0
+        trigger = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_p384_ecdh(
+            target,
+            iterations,
+            private_key_array,
+            public_x,
+            public_y,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        shared_secret_point = key.pointQ * private_key.d
+        shared_secret_point = [x for x in shared_secret_point.x.to_bytes(48, "little")]
+
+        expected_result_json = {
+            "status": 0,
+            "shared_key": shared_secret_point,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p384_sign(self):
+        key = ECC.generate(curve="P-384")
+        scalar = [x for x in key.d.to_bytes(48, "little")]
+        pubx = [x for x in key.pointQ.x.to_bytes(48, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(48, "little")]
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA384.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+        cfg = 0
+        trigger = 0
+
+        actual_result = fi_asym_cryptolib_functions.char_p384_sign(
+            target,
+            iterations,
+            scalar,
+            pubx,
+            puby,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("r")
+        sign_ignored_keys_set.add("s")
+        sign_ignored_keys_set.add("pubx")
+        sign_ignored_keys_set.add("puby")
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        verifier = DSS.new(key.public_key(), "fips-186-3")
+        r = actual_result_json["r"]
+        s = actual_result_json["s"]
+        r.reverse()
+        s.reverse()
+        signature = r + s
+        verifier.verify(h, bytes(signature))
+
+    def test_char_p384_verify(self):
+        key = ECC.generate(curve="P-384")
+        pubx = [x for x in key.pointQ.x.to_bytes(48, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(48, "little")]
+
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA384.new(bytes(message))
+
+        signer = DSS.new(key, "fips-186-3")
+        signature = [x for x in signer.sign(h)]
+        r_bytes = signature[:48]
+        s_bytes = signature[48:]
+        r_bytes.reverse()
+        s_bytes.reverse()
+        cfg = 0
+        trigger = 1
+
+        h = SHA384.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+
+        actual_result = fi_asym_cryptolib_functions.char_p384_verify(
+            target,
+            iterations,
+            pubx,
+            puby,
+            r_bytes,
+            s_bytes,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        expected_result_json = {
+            "status": 0,
+            "result": True,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation("lowrisc_opentitan/" + BITSTREAM)
+    # Get the firmware path.
+    firmware_path = r.Rlocation("lowrisc_opentitan/" + BOOTSTRAP)
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args,
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_crypto_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_crypto_python_test.py
new file mode 100644
index 0000000000000..69041151c3cbc
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_crypto_python_test.py
@@ -0,0 +1,520 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_crypto_functions
+from sw.host.penetrationtests.python.fi.communication.fi_crypto_commands import OTFICrypto
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+from Crypto.Hash import SHA256, SHA384, SHA512, HMAC
+from Crypto.Cipher import AES
+import unittest
+import argparse
+import sys
+
+opentitantool_path = ""
+iterations = 5
+ignored_keys_set = set(["share0", "share1"])
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_crypto.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+class CryptoFiTest(unittest.TestCase):
+
+    def test_init(self):
+        cryptofi = OTFICrypto(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            cryptofi.init(
+                alert_config=common_library.default_fpga_friendly_alert_config
+            )
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_aes(self):
+        trigger = 0
+        plaintext = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        actual_result = fi_crypto_functions.char_aes(
+            target, iterations, plaintext, key, trigger
+        )
+        actual_result_json = json.loads(actual_result)
+
+        cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+        expected_result = [x for x in cipher_gen.encrypt(bytes(plaintext))]
+        expected_result_json = {
+            "ciphertext": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_kmac(self):
+        trigger = 0
+        actual_result = fi_crypto_functions.char_kmac(target, iterations, trigger)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads(
+            '{"digest":[184,34,91,108,231,47,251,27], \
+                "digest_2nd":[142,188,186,201,216,47,203,192], \
+                    "err_status":0,"alerts":[0,0,0],"ast_alerts":[0,0]}'
+        )
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_kmac_state(self):
+        actual_result = fi_crypto_functions.char_kmac_state(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads(
+            '{"digest":[184,34,91,108,231,47,251,27],"err_status":0, \
+                "alerts":[0,0,0],"ast_alerts":[0,0]}'
+        )
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_hmac(self):
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = False
+        hash_mode = 0
+        msg = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+        key = [0, 0, 0, 0, 0, 0, 0, 0]
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sha256 = SHA256.new()
+        sha256.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(sha256.digest()))
+        expected_result.reverse()
+        # Pad the rest with zero
+        expected_result += [0] * 8
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        trigger = 0
+        message_endianness_big = True
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = False
+        hash_mode = 0
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        # Switch the endianness of the message
+        msg = [3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12]
+        sha256 = SHA256.new()
+        sha256.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(sha256.digest()))
+        expected_result.reverse()
+        # Pad the rest with zero
+        expected_result += [0] * 8
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = False
+        hash_mode = 1  # SHA384
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sha384 = SHA384.new()
+        sha384.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(sha384.digest()))
+        expected_result.reverse()
+        # Pad the rest with zero
+        expected_result += [0] * 4
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = False
+        hash_mode = 2  # SHA512
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sha512 = SHA512.new()
+        sha512.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(sha512.digest()))
+        expected_result.reverse()
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        # HMAC tests
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        key = [0, 1, 2, 3, 4, 5, 6, 7]
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = True
+        hash_mode = 0  # SHA256
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        hmac = HMAC.new(key=bytes(utils.words_to_bytes(key)), digestmod=SHA256)
+        hmac.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(hmac.digest()))
+        expected_result.reverse()
+        expected_result += [0] * 8
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11]
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = True
+        hash_mode = 1  # SHA384
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        hmac = HMAC.new(key=bytes(utils.words_to_bytes(key)), digestmod=SHA384)
+        hmac.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(hmac.digest()))
+        expected_result.reverse()
+        expected_result += [0] * 4
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        msg = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        trigger = 0
+        message_endianness_big = False
+        digest_endianness_big = False
+        key_endianness_big = False
+        enable_hmac = True
+        hash_mode = 2  # SHA512
+        actual_result = fi_crypto_functions.char_hmac(
+            target,
+            iterations,
+            msg,
+            key,
+            trigger,
+            enable_hmac,
+            message_endianness_big,
+            digest_endianness_big,
+            key_endianness_big,
+            hash_mode,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        hmac = HMAC.new(key=bytes(utils.words_to_bytes(key)), digestmod=SHA512)
+        hmac.update(bytes(msg))
+        expected_result = utils.bytes_to_words(bytearray(hmac.digest()))
+        expected_result.reverse()
+
+        expected_result_json = {
+            "tag": expected_result,
+            "err_status": 0,
+            "alerts": [0, 0, 0],
+            "ast_alerts": [0, 0],
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_shadow_reg_access(self):
+        actual_result = fi_crypto_functions.char_shadow_reg_access(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_shadow_reg_access')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_shadow_reg_read(self):
+        actual_result = fi_crypto_functions.char_shadow_reg_read(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_shadow_reg_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_ibex_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_ibex_python_test.py
new file mode 100644
index 0000000000000..136ebc3569308
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_ibex_python_test.py
@@ -0,0 +1,714 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_ibex_functions
+from sw.host.penetrationtests.python.fi.communication.fi_ibex_commands import OTFIIbex
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+opentitantool_path = ""
+iterations = 3
+ignored_keys_set = set(
+    ["registers", "registers_test_1", "registers_test_2", "registers_test_3"]
+)
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_ibex.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+# Note that these tests influence CSRs and the Ibex in general, hence, we always reset between
+# tests to ensure tests do not become flaky.
+class IbexFiTest(unittest.TestCase):
+
+    def test_init(self):
+        ibexfi = OTFIIbex(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            ibexfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_addi_single_beq(self):
+        actual_result = fi_ibex_functions.char_addi_single_beq(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_addi_single_beq')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_addi_single_beq_neg(self):
+        actual_result = fi_ibex_functions.char_addi_single_beq_neg(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_addi_single_beq_neg')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_addi_single_bne(self):
+        actual_result = fi_ibex_functions.char_addi_single_bne(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_addi_single_bne')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_addi_single_bne_neg(self):
+        actual_result = fi_ibex_functions.char_addi_single_bne_neg(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_addi_single_bne_neg')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_combi(self):
+        actual_result = fi_ibex_functions.char_combi(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_combi')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_beq(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_beq(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_beq')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_bge(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_bge(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_bge')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_bgeu_test(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_bgeu(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_bgeu')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_blt(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_blt(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_blt')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_bltu(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_bltu(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_bltu')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_conditional_branch_bne(self):
+        actual_result = fi_ibex_functions.char_conditional_branch_bne(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_conditional_branch_bne')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_csr_read(self):
+        actual_result = fi_ibex_functions.char_csr_read(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_csr_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_csr_write(self):
+        actual_result = fi_ibex_functions.char_csr_write(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_csr_write')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    @unittest.skip
+    def test_char_csr_combi(self):
+        ref_values = [
+            1,
+            5,
+            33,
+            101,
+            3,
+            5,
+            39321,
+            6,
+            5138,
+            50115,
+            39321,
+            38502,
+            39321,
+            39321,
+            1,
+            2,
+            3,
+        ]
+        actual_result = fi_ibex_functions.char_csr_combi(
+            target, trigger=0, ref_values=ref_values, iterations=iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads(
+            '{"output":[1,5,33,101,3,5,39321,6,5138,50115,39321,38502,39321,39321,1,2,3], \
+                "data_faulty": [false,false,false,false,false,false,false,false,false,false, \
+                false,false,false,false,false,false,false],"err_status":0,"alerts":[0,0,0], \
+                "ast_alerts":[0,0]}'
+        )
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        # Reset to allow the next test to start fresh
+        target.reset_target()
+        target.dump_all()
+
+        ref_values = [
+            2,
+            3,
+            16641,
+            4,
+            5,
+            6,
+            38553,
+            7,
+            5137,
+            256,
+            26214,
+            26214,
+            26214,
+            5,
+            2,
+            3,
+            4,
+        ]
+        actual_result = fi_ibex_functions.char_csr_combi(
+            target, trigger=0, ref_values=ref_values, iterations=iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads(
+            '{"output":[2,3,16641,4,5,6,38553,7,5137,256,26214,26214,26214,5,2,3,4], \
+                "data_faulty": \
+                [false,false,false,false,false,false,false,false,false,false,false,false,false,\
+                false,false,false,false],"err_status":0,"alerts":[0,0,0],"ast_alerts":[0,0]}'
+        )
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_flash_read(self):
+        for flash_region in range(2, 10):
+            actual_result = fi_ibex_functions.char_flash_read(
+                target, flash_region=flash_region, iterations=iterations
+            )
+            actual_result_json = json.loads(actual_result)
+            expected_result_json = load_test_data('char_flash_read')
+            if "success" not in actual_result_json:
+                utils.compare_json_data(
+                    actual_result_json, expected_result_json, ignored_keys_set
+                )
+
+    @unittest.skip
+    def test_char_flash_write(self):
+        for flash_region in range(2, 10):
+            actual_result = fi_ibex_functions.char_flash_write(
+                target, flash_region=flash_region, iterations=iterations
+            )
+            actual_result_json = json.loads(actual_result)
+            expected_result_json = load_test_data('char_flash_write')
+            if "success" not in actual_result_json:
+                utils.compare_json_data(
+                    actual_result_json, expected_result_json, ignored_keys_set
+                )
+
+    def test_char_mem_op_loop(self):
+        actual_result = fi_ibex_functions.char_mem_op_loop(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_mem_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_register_file(self):
+        actual_result = fi_ibex_functions.char_register_file(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_register_file')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_register_file_read(self):
+        actual_result = fi_ibex_functions.char_register_file_read(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_register_file_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_reg_op_loop(self):
+        actual_result = fi_ibex_functions.char_reg_op_loop(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_reg_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_single_beq(self):
+        actual_result = fi_ibex_functions.char_single_beq(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_single_beq')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_single_bne(self):
+        actual_result = fi_ibex_functions.char_single_bne(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_single_bne')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_read(self):
+        actual_result = fi_ibex_functions.char_sram_read(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_read_ret(self):
+        actual_result = fi_ibex_functions.char_sram_read_ret(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_read_ret')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    @unittest.skip
+    def test_char_sram_static(self):
+        actual_result = fi_ibex_functions.char_sram_static(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_static')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_write(self):
+        actual_result = fi_ibex_functions.char_sram_write(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_write')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_write_read(self):
+        actual_result = fi_ibex_functions.char_sram_write_read(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_write_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_write_read_alt(self):
+        actual_result = fi_ibex_functions.char_sram_write_read_alt(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_write_read_alt')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sram_write_static_unrolled(self):
+        actual_result = fi_ibex_functions.char_sram_write_static_unrolled(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_sram_write_static_unrolled')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unconditional_branch(self):
+        actual_result = fi_ibex_functions.char_unconditional_branch(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unconditional_branch')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unconditional_branch_nop(self):
+        actual_result = fi_ibex_functions.char_unconditional_branch_nop(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unconditional_branch_nop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unrolled_mem_op_loop(self):
+        actual_result = fi_ibex_functions.char_unrolled_mem_op_loop(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unrolled_mem_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unrolled_reg_op_loop(self):
+        actual_result = fi_ibex_functions.char_unrolled_reg_op_loop(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unrolled_reg_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unrolled_reg_op_loop_chain(self):
+        actual_result = fi_ibex_functions.char_unrolled_reg_op_loop_chain(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unrolled_reg_op_loop_chain')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    @unittest.skip
+    def test_char_otp_data_read(self):
+        actual_result = fi_ibex_functions.char_otp_data_read(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_otp_data_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_otp_read_lock(self):
+        actual_result = fi_ibex_functions.char_otp_read_lock(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_otp_read_lock')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    def test_char_addi_single_beq_cm(self):
+        actual_result, status = fi_ibex_functions.char_addi_single_beq_cm(
+            target, reset=True
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_addi_single_beq_cm2(self):
+        actual_result, status = fi_ibex_functions.char_addi_single_beq_cm2(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_complement_branch(self):
+        actual_result, status = (
+            fi_ibex_functions.char_hardened_check_eq_complement_branch(
+                target
+            )
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_unimp(self):
+        actual_result, status = fi_ibex_functions.char_hardened_check_eq_unimp(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_2_unimps(self):
+        actual_result, status = fi_ibex_functions.char_hardened_check_eq_2_unimps(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_3_unimps(self):
+        actual_result, status = fi_ibex_functions.char_hardened_check_eq_3_unimps(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_4_unimps(self):
+        actual_result, status = fi_ibex_functions.char_hardened_check_eq_4_unimps(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+    @unittest.skip
+    def test_char_hardened_check_eq_5_unimps(self):
+        actual_result, status = fi_ibex_functions.char_hardened_check_eq_5_unimps(
+            target
+        )
+        self.assertIn("FAULT", actual_result)
+
+        # Reset to allow other tests to start again
+        target.reset_target()
+        target.dump_all()
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_otbn_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_otbn_python_test.py
new file mode 100644
index 0000000000000..dfd8175d33cc8
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_otbn_python_test.py
@@ -0,0 +1,332 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_otbn_functions
+from sw.host.penetrationtests.python.fi.communication.fi_otbn_commands import OTFIOtbn
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+opentitantool_path = ""
+iterations = 3
+ignored_keys_set = set(["data"])
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_otbn.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+class OtbnFiTest(unittest.TestCase):
+
+    def test_init(self):
+        otbnfi = OTFIOtbn(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            otbnfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        print(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_beq(self):
+        actual_result = fi_otbn_functions.char_beq(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_beq')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_bn_rshi(self):
+        data = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+        actual_result = fi_otbn_functions.char_bn_rshi(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_bn_rshi')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_bn_sel(self):
+        data = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+        actual_result = fi_otbn_functions.char_bn_sel(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_bn_sel')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_bn_wsrr(self):
+        actual_result = fi_otbn_functions.char_bn_wsrr(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_bn_wsrr')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_bne(self):
+        actual_result = fi_otbn_functions.char_bne(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_bne')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_dmem_access(self):
+        actual_result = fi_otbn_functions.char_dmem_access(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_dmem_access')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_dmem_write(self):
+        actual_result = fi_otbn_functions.char_dmem_write(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_dmem_write')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_dmem_op_loop(self):
+        actual_result = fi_otbn_functions.char_dmem_op_loop(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_dmem_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_reg_op_loop(self):
+        actual_result = fi_otbn_functions.char_reg_op_loop(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_reg_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_jal(self):
+        actual_result = fi_otbn_functions.char_jal(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_jal')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_lw(self):
+        actual_result = fi_otbn_functions.char_lw(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_lw')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_mem(self):
+        byte_offset = 0
+        num_words = 4
+        imem = False
+        dmem = True
+        actual_result = fi_otbn_functions.char_mem(
+            target, iterations, byte_offset, num_words, imem, dmem
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_mem')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_rf(self):
+        actual_result = fi_otbn_functions.char_rf(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_rf')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unrolled_dmem_op_loop(self):
+        actual_result = fi_otbn_functions.char_unrolled_dmem_op_loop(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unrolled_dmem_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_unrolled_reg_op_loop(self):
+        actual_result = fi_otbn_functions.char_unrolled_reg_op_loop(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_unrolled_reg_op_loop')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_load_integrity(self):
+        actual_result = fi_otbn_functions.char_load_integrity(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_load_integrity')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_pc(self):
+        pc = 2224
+        actual_result = fi_otbn_functions.char_pc(target, iterations, pc)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_pc')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_otp_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_otp_python_test.py
new file mode 100644
index 0000000000000..e7dd878a0648d
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_otp_python_test.py
@@ -0,0 +1,218 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_otp_functions
+from sw.host.penetrationtests.python.fi.communication.fi_otp_commands import OTFIOtp
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set(["partition_ref", "partition_fi", "otp_status_codes"])
+opentitantool_path = ""
+iterations = 3
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_otp.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+class OtpFiTest(unittest.TestCase):
+
+    def test_init(self):
+        otpfi = OTFIOtp(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            otpfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_vendor_test(self):
+        actual_result = fi_otp_functions.char_vendor_test(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_vendor_test')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_owner_sw_cfg(self):
+        actual_result = fi_otp_functions.char_owner_sw_cfg(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_owner_sw_cfg')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_hw_cfg(self):
+        actual_result = fi_otp_functions.char_hw_cfg(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_hw_cfg')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_life_cycle(self):
+        actual_result = fi_otp_functions.char_life_cycle(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_life_cycle')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_rng_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_rng_python_test.py
new file mode 100644
index 0000000000000..2af8240492ab1
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_rng_python_test.py
@@ -0,0 +1,248 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_rng_functions
+from sw.host.penetrationtests.python.fi.communication.fi_rng_commands import OTFIRng
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set(["rand"])
+opentitantool_path = ""
+iterations = 3
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_rng.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+class RngFiTest(unittest.TestCase):
+
+    def test_init(self):
+        rngfi = OTFIRng(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            rngfi.init("test", alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_csrng_bias(self):
+        trigger = 0
+        actual_result = fi_rng_functions.char_csrng_bias(
+            target, iterations, trigger
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_csrng_bias')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_edn_resp_ack(self):
+        actual_result = fi_rng_functions.char_edn_resp_ack(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_edn_resp_ack')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_edn_bias(self):
+        actual_result = fi_rng_functions.char_edn_bias(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_edn_bias')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_entropy_bias(self):
+        actual_result = fi_rng_functions.char_entropy_bias(
+            target, iterations
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_entropy_bias')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    @unittest.skip
+    def test_char_fw_overwrite(self):
+        disable_health_check = False
+        actual_result = fi_rng_functions.char_fw_overwrite(
+            target, iterations, disable_health_check
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_fw_overwrite')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+        disable_health_check = True
+        actual_result = fi_rng_functions.char_fw_overwrite(
+            target, iterations, disable_health_check
+        )
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_fw_overwrite')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+        return True
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_rom_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_rom_python_test.py
new file mode 100644
index 0000000000000..c4228bf5bc571
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_rom_python_test.py
@@ -0,0 +1,194 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_rom_functions
+from sw.host.penetrationtests.python.fi.communication.fi_rom_commands import OTFIRom
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 3
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+def load_test_data(test_name):
+    data_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/penetrationtests/python/fi/gold_responses/fi_rom.json"
+    )
+
+    with open(data_path, 'r') as f:
+        data = json.load(f)
+        return data[test_name]
+
+
+class RomFiTest(unittest.TestCase):
+
+    def test_init(self):
+        romfi = OTFIRom(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            romfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_rom_read(self):
+        actual_result = fi_rom_functions.char_rom_read(target, iterations)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = load_test_data('char_rom_read')
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/fi/test_scripts/fi_sym_cryptolib_python_test.py b/sw/host/penetrationtests/python/fi/test_scripts/fi_sym_cryptolib_python_test.py
new file mode 100644
index 0000000000000..80a920ddeb73c
--- /dev/null
+++ b/sw/host/penetrationtests/python/fi/test_scripts/fi_sym_cryptolib_python_test.py
@@ -0,0 +1,398 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.fi.host_scripts import fi_sym_cryptolib_functions
+from sw.host.penetrationtests.python.fi.communication.fi_sym_cryptolib_commands import (
+    OTFISymCrypto,
+)
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+from sw.host.penetrationtests.python.util import common_library
+import json
+import unittest
+import argparse
+import sys
+import random
+from Crypto.Hash import SHA256, HMAC
+from Crypto.Cipher import AES
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 3
+repetitions = 3
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class SymCryptolibFiTest(unittest.TestCase):
+
+    def test_init(self):
+        symfi = OTFISymCrypto(target)
+        device_id, sensors, alerts, owner_page, boot_log, boot_measurements, version = (
+            symfi.init(alert_config=common_library.default_fpga_friendly_alert_config)
+        )
+        device_id_json = json.loads(device_id)
+        sensors_json = json.loads(sensors)
+        alerts_json = json.loads(alerts)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_sensors_keys = {"sensor_ctrl_en", "sensor_ctrl_fatal"}
+        actual_sensors_keys = set(sensors_json.keys())
+
+        self.assertEqual(
+            expected_sensors_keys, actual_sensors_keys, "sensor keys do not match"
+        )
+
+        expected_alerts_keys = {
+            "alert_classes",
+            "enabled_alerts",
+            "enabled_classes",
+            "accumulation_thresholds",
+            "duration_cycles",
+            "escalation_signals_en",
+            "escalation_signals_map",
+        }
+        actual_alerts_keys = set(alerts_json.keys())
+
+        self.assertEqual(
+            expected_alerts_keys, actual_alerts_keys, "alert keys do not match"
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_aes(self):
+        for _ in range(repetitions):
+            # For testing, we just take a multiple of the block size
+            data_len = random.randint(1, 3)
+            data_len *= 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            op_enc = True
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode (no padding) and the first mode (ECB)
+            padding = 0
+            mode = 0
+
+            actual_result = fi_sym_cryptolib_functions.char_aes(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                iv,
+                padding,
+                mode,
+                op_enc,
+                cfg,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            expected_result = utils.pad_with_zeros(
+                [x for x in cipher_gen.encrypt(bytes(data))], 64
+            )
+            expected_result_json = {
+                "status": 0,
+                "data": expected_result,
+                "data_len": data_len,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_gcm(self):
+        for _ in range(repetitions):
+            # For testing, we just take a multiple of the block size
+            data_len = random.randint(1, 3)
+            data_len *= 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            aad_len = random.randint(1, 3)
+            aad_len *= 16
+            aad = [random.randint(0, 255) for _ in range(aad_len)]
+            tag_len = 16
+            tag = [0 for _ in range(tag_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            cfg = 0
+            trigger = 0
+
+            actual_result = fi_sym_cryptolib_functions.char_gcm(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                aad,
+                aad_len,
+                tag,
+                tag_len,
+                iv,
+                cfg,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_GCM, bytes(iv))
+            cipher_gen.update(bytes(aad))
+            expected_ciphertext, expected_tag = cipher_gen.encrypt_and_digest(
+                bytes(data)
+            )
+            expected_ciphertext = utils.pad_with_zeros(
+                [x for x in expected_ciphertext], 64
+            )
+            expected_tag = utils.pad_with_zeros([x for x in expected_tag], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_ciphertext,
+                "data_len": data_len,
+                "tag": expected_tag,
+                "tag_len": 16,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_hmac(self):
+        for _ in range(repetitions):
+            data_len = 32
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            # We only test SHA256
+            key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode and the first mode (HMAC)
+            padding = 0
+            mode = 0
+
+            actual_result = fi_sym_cryptolib_functions.char_hmac(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                padding,
+                mode,
+                cfg,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            sha256 = HMAC.new(key=bytes(key), digestmod=SHA256)
+            sha256.update(bytes(data))
+            expected_result = [x for x in sha256.digest()]
+            # Pad the rest with zero
+            expected_result = utils.pad_with_zeros([x for x in expected_result], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_result,
+                "data_len": 32,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_drbg(self):
+        entropy_len = 32
+        entropy = [random.randint(0, 255) for _ in range(entropy_len)]
+        nonce_len = 16
+        nonce = [random.randint(0, 255) for _ in range(nonce_len)]
+        reseed_interval = 100
+        data_len = 16
+        mode = 0
+        trigger = 1
+        cfg = 0
+
+        actual_result = fi_sym_cryptolib_functions.char_drbg(
+            target,
+            iterations,
+            entropy,
+            entropy_len,
+            nonce,
+            nonce_len,
+            reseed_interval,
+            data_len,
+            mode,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        drbg_ignored_key_sets = ignored_keys_set.copy()
+        drbg_ignored_key_sets.add("data")
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, drbg_ignored_key_sets
+        )
+
+    def test_char_trng(self):
+        mode = 0
+        trigger = 1
+        cfg = 0
+
+        actual_result = fi_sym_cryptolib_functions.char_trng(
+            target, iterations, mode, cfg, trigger
+        )
+        actual_result_json = json.loads(actual_result)
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        trng_ignored_key_sets = ignored_keys_set.copy()
+        trng_ignored_key_sets.add("data")
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, trng_ignored_key_sets
+        )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation("lowrisc_opentitan/" + BITSTREAM)
+    # Get the firmware path.
+    firmware_path = r.Rlocation("lowrisc_opentitan/" + BOOTSTRAP)
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args,
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/BUILD b/sw/host/penetrationtests/python/sca/BUILD
new file mode 100644
index 0000000000000..39959148aa007
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/BUILD
@@ -0,0 +1,283 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@ot_python_deps//:requirements.bzl", "requirement")
+
+package(default_visibility = ["//visibility:public"])
+
+py_binary(
+    name = "sca_ibex_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_ibex_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_ibex_commands",
+        "//sw/host/penetrationtests/python/sca:sca_ibex_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_aes_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_aes_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_aes_commands",
+        "//sw/host/penetrationtests/python/sca:sca_aes_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_hmac_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_hmac_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_hmac_commands",
+        "//sw/host/penetrationtests/python/sca:sca_hmac_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_kmac_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_kmac_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_kmac_commands",
+        "//sw/host/penetrationtests/python/sca:sca_kmac_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_otbn_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_otbn_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_otbn_commands",
+        "//sw/host/penetrationtests/python/sca:sca_otbn_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_sha3_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_sha3_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_sha3_commands",
+        "//sw/host/penetrationtests/python/sca:sca_sha3_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_sym_cryptolib_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_sym_cryptolib_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_sym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/sca:sca_sym_cryptolib_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_binary(
+    name = "sca_asym_cryptolib_python_test",
+    testonly = True,
+    srcs = ["test_scripts/sca_asym_cryptolib_python_test.py"],
+    data = [
+        "//sw/host/opentitantool",
+    ],
+    deps = [
+        "//sw/host/penetrationtests/python/sca:sca_asym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/sca:sca_asym_cryptolib_functions",
+        "//sw/host/penetrationtests/python/util:targets",
+        "//sw/host/penetrationtests/python/util:utils",
+        "@rules_python//python/runfiles",
+        requirement("pycryptodome"),
+    ],
+)
+
+py_library(
+    name = "sca_ibex_functions",
+    srcs = ["host_scripts/sca_ibex_functions.py"],
+    deps = [
+        ":sca_ibex_commands",
+        ":sca_prng_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_aes_functions",
+    srcs = ["host_scripts/sca_aes_functions.py"],
+    deps = [
+        ":sca_aes_commands",
+        ":sca_prng_commands",
+        ":sca_trigger_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_hmac_functions",
+    srcs = ["host_scripts/sca_hmac_functions.py"],
+    deps = [
+        ":sca_hmac_commands",
+        ":sca_prng_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_kmac_functions",
+    srcs = ["host_scripts/sca_kmac_functions.py"],
+    deps = [
+        ":sca_kmac_commands",
+        ":sca_prng_commands",
+        ":sca_trigger_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_otbn_functions",
+    srcs = ["host_scripts/sca_otbn_functions.py"],
+    deps = [
+        ":sca_otbn_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_sha3_functions",
+    srcs = ["host_scripts/sca_sha3_functions.py"],
+    deps = [
+        ":sca_prng_commands",
+        ":sca_sha3_commands",
+        ":sca_trigger_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_sym_cryptolib_functions",
+    srcs = ["host_scripts/sca_sym_cryptolib_functions.py"],
+    deps = [
+        ":sca_prng_commands",
+        ":sca_sym_cryptolib_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_asym_cryptolib_functions",
+    srcs = ["host_scripts/sca_asym_cryptolib_functions.py"],
+    deps = [
+        ":sca_asym_cryptolib_commands",
+        ":sca_prng_commands",
+        "//sw/host/penetrationtests/python/util:targets",
+    ],
+)
+
+py_library(
+    name = "sca_ibex_commands",
+    srcs = ["communication/sca_ibex_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_aes_commands",
+    srcs = ["communication/sca_aes_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_hmac_commands",
+    srcs = ["communication/sca_hmac_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_kmac_commands",
+    srcs = ["communication/sca_kmac_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_otbn_commands",
+    srcs = ["communication/sca_otbn_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_prng_commands",
+    srcs = ["communication/sca_prng_commands.py"],
+)
+
+py_library(
+    name = "sca_sha3_commands",
+    srcs = ["communication/sca_sha3_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_sym_cryptolib_commands",
+    srcs = ["communication/sca_sym_cryptolib_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_asym_cryptolib_commands",
+    srcs = ["communication/sca_asym_cryptolib_commands.py"],
+    deps = ["//sw/host/penetrationtests/python/util:common_library"],
+)
+
+py_library(
+    name = "sca_trigger_commands",
+    srcs = ["communication/sca_trigger_commands.py"],
+)
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_aes_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_aes_commands.py
new file mode 100644
index 0000000000000..6269c2fe8ce22
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_aes_commands.py
@@ -0,0 +1,151 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the AES SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTAES:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_aes_sca_cmd(self):
+        self.target.write(json.dumps("AesSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        fpga_mode_bit: int,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes AES on the target.
+        Args:
+            fpga_mode_bit: Indicates whether FPGA specific AES test is started.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # Init the AES core.
+        self.target.write(json.dumps("Init").encode("ascii"))
+        # FPGA mode.
+        fpga_mode = {"fpga_mode": fpga_mode_bit}
+        self.target.write(json.dumps(fpga_mode).encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def seed_lfsr(self, seed):
+        """Seed the LFSR.
+        Args:
+            seed: The 4-byte seed.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # SeedLfsr command.
+        self.target.write(json.dumps("SeedLfsr").encode("ascii"))
+        # Seed payload.
+        seed_data = {"seed": [x for x in seed]}
+        self.target.write(json.dumps(seed_data).encode("ascii"))
+
+    def batch_daisy_chain(self, num_segments, key, text):
+        """Start encryption for batch (alternative).
+        Args:
+            key: Key to use for all encryptions.
+            text: First plaintext to use.
+            num_segments: Number of encryptions to perform.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # BatchAlternativeEncrypt command.
+        self.target.write(json.dumps("BatchDaisy").encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        text_data = {"text": text, "text_length": len(text)}
+        self.target.write(json.dumps(text_data).encode("ascii"))
+        num_encryption_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_encryption_data).encode("ascii"))
+
+    def batch_fvsr_data(self, num_segments, key, text):
+        """Start encryption for batch fixed vs. random plaintext.
+        Args:
+            key: Key to use for all encryptions.
+            text: The fixed plaintext to use.
+            num_segments: Number of encryptions to perform.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # BatchFvsrData command.
+        self.target.write(json.dumps("BatchFvsrData").encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        text_data = {"text": text, "text_length": len(text)}
+        self.target.write(json.dumps(text_data).encode("ascii"))
+        num_encryption_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_encryption_data).encode("ascii"))
+
+    def batch_fvsr_key(self, num_segments, key):
+        """Start batch encryption for FVSR key.
+        Args:
+            key: Fixed key to use.
+            num_segments: Number of encryptions to perform.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # BatchFvsrKey command.
+        self.target.write(json.dumps("BatchFvsrKey").encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        num_encryption_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_encryption_data).encode("ascii"))
+
+    def batch_random(self, num_segments, key):
+        """Start batch encryption for FVSR data.
+        Args:
+            key: Key to use for all encryptions.
+            num_segments: Number of encryptions to perform.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # BatchRandom command.
+        self.target.write(json.dumps("BatchRandom").encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        num_encryption_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_encryption_data).encode("ascii"))
+
+    def single_encrypt(self, key, text):
+        """Write plaintext to OpenTitan AES & start encryption.
+        Args:
+            key: The key.
+            text: The plaintext.
+        """
+        # AesSca command.
+        self._ujson_aes_sca_cmd()
+        # Single command.
+        self.target.write(json.dumps("Single").encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        text_data = {"text": text, "text_length": len(text)}
+        self.target.write(json.dumps(text_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_asym_cryptolib_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_asym_cryptolib_commands.py
new file mode 100644
index 0000000000000..ddb8539a01392
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_asym_cryptolib_commands.py
@@ -0,0 +1,356 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the SHA3 SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTAsymCrypto:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_asym_crypto_sca_cmd(self):
+        self.target.write(json.dumps("CryptoLibScaAsym").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes Sym Cryptolib on the target.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def handle_rsa_dec(
+        self,
+        data,
+        data_len,
+        e,
+        n,
+        n_len,
+        d,
+        padding,
+        hashing,
+        mode,
+        cfg,
+        trigger,
+    ) -> None:
+        """Call the cryptolib RSA.
+
+        Args:
+            data: Array of max 512 bytes of input data.
+            data_len: Input data length.
+            e: Integer for the public e.
+            n: Array of max 512 bytes of n.
+            n_len: Input n length.
+            d: Array of max 512 bytes of d.
+            padding: integer specifying the padding mode.
+            hashing: ingteger specifying the hashing mode.
+            mode: integer specifying the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("RsaDec").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "mode": mode,
+            "e": e,
+            "n": n,
+            "d": d,
+            "n_len": n_len,
+            "hashing": hashing,
+            "padding": padding,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_rsa_sign(
+        self,
+        data,
+        data_len,
+        e,
+        n,
+        n_len,
+        d,
+        padding,
+        hashing,
+        cfg,
+        trigger
+    ) -> None:
+        """Call the cryptolib RSA to sign.
+
+        Args:
+            data: Array of max 512 bytes of input data.
+            data_len: Input data length.
+            e: Integer for the public e.
+            n: Array of max 512 bytes of n.
+            n_len: Input n length.
+            d: Array of max 512 bytes of d.
+            padding: integer specifying the padding mode.
+            hashing: ingteger specifying the hashing mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("RsaSign").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "e": e,
+            "n": n,
+            "n_len": n_len,
+            "d": d,
+            "padding": padding,
+            "hashing": hashing,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_prime_generation(self, e, cfg, trigger) -> None:
+        """Call the cryptolib to generate prime numbers.
+
+        Args:
+            e: Integer for the public e.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("Prime").encode("ascii"))
+        input_data = {
+            "e": e,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_base_mult_fvsr(self, scalar, cfg, trigger, num_iterations) -> None:
+        """Call the cryptolib p256 base multiplication.
+
+        Args:
+            scalar: Array of 32 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P256BaseMulFvsr").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_base_mult_daisy(self, scalar, cfg, trigger, num_iterations) -> None:
+        """Call the cryptolib p256 base multiplication.
+
+        Args:
+            scalar: Array of 32 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P256BaseMulDaisy").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_point_mult(self, scalar_alice, scalar_bob, cfg, trigger) -> None:
+        """Call the cryptolib p256 point multiplication.
+
+        Args:
+            scalar_alice: Array of 32 bytes of scalar data.
+            scalar_bob: Array of 32 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P256PointMul").encode("ascii"))
+        input_data = {
+            "scalar_alice": scalar_alice,
+            "scalar_bob": scalar_bob,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_ecdh(self, private_key, public_x, public_y, cfg, trigger) -> None:
+        """Call the cryptolib p256 ecdh.
+
+        Args:
+            private_key: Array of 32 bytes of scalar data.
+            public_x: Array of 32 bytes of x-coord data.
+            public_y: Array of 32 bytes of y-coord data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P256Ecdh").encode("ascii"))
+        input_data = {
+            "private_key": private_key,
+            "public_x": public_x,
+            "public_y": public_y,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p256_sign(self, scalar, pubx, puby, message, cfg, trigger) -> None:
+        """Call the cryptolib p256 signing.
+
+        Args:
+            scalar: Array of 32 bytes of scalar data.
+            pubx: Array of 32 bytes of x-coord data.
+            puby: Array of 32 bytes of y-coord data.
+            message: Array of 32 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P256Sign").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "pubx": pubx,
+            "puby": puby,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_base_mult_fvsr(self, scalar, cfg, trigger, num_iterations) -> None:
+        """Call the cryptolib p384 base multiplication.
+
+        Args:
+            scalar: Array of 48 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P384BaseMulFvsr").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_base_mult_daisy(self, scalar, cfg, trigger, num_iterations) -> None:
+        """Call the cryptolib p384 base multiplication.
+
+        Args:
+            scalar: Array of 48 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P384BaseMulDaisy").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_point_mult(self, scalar_alice, scalar_bob, cfg, trigger) -> None:
+        """Call the cryptolib p384 point multiplication.
+
+        Args:
+            scalar_alice: Array of 48 bytes of scalar data.
+            scalar_bob: Array of 48 bytes of scalar data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P384PointMul").encode("ascii"))
+        input_data = {
+            "scalar_alice": scalar_alice,
+            "scalar_bob": scalar_bob,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_ecdh(self, private_key, public_x, public_y, cfg, trigger) -> None:
+        """Call the cryptolib p384 ecdh.
+
+        Args:
+            private_key: Array of 48 bytes of scalar data.
+            public_x: Array of 48 bytes of x-coord data.
+            public_y: Array of 48 bytes of y-coord data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P384Ecdh").encode("ascii"))
+        input_data = {
+            "private_key": private_key,
+            "public_x": public_x,
+            "public_y": public_y,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_p384_sign(self, scalar, pubx, puby, message, cfg, trigger) -> None:
+        """Call the cryptolib p384 signing.
+
+        Args:
+            scalar: Array of 48 bytes of scalar data.
+            pubx: Array of 48 bytes of x-coord data.
+            puby: Array of 48 bytes of y-coord data.
+            message: Array of 48 bytes of message data.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_asym_crypto_sca_cmd()
+        self.target.write(json.dumps("P384Sign").encode("ascii"))
+        input_data = {
+            "scalar": scalar,
+            "pubx": pubx,
+            "puby": puby,
+            "message": message,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_hmac_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_hmac_commands.py
new file mode 100644
index 0000000000000..5363c6388c7b2
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_hmac_commands.py
@@ -0,0 +1,244 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the HMAC SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJSON command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTHMAC:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_hmac_sca_cmd(self):
+        self.target.write(json.dumps("HmacSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes HMAC on the target.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # HmacSca command.
+        self._ujson_hmac_sca_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def single(self, msg: list[int], key: list[int], trigger: int):
+        """Start a single HMAC operation using the given message and key.
+        Args:
+            msg: The list containing the message.
+            key: The key containing the message.
+            trigger: Which trigger to raise.
+        """
+        # HmacSca command.
+        self._ujson_hmac_sca_cmd()
+        # Single command.
+        self.target.write(json.dumps("Single").encode("ascii"))
+        # Key payload.
+        # Key payload.
+        key_data = {"key": key}
+        key_data = {"key": key}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        # Message payload.
+        msg_data = {"message": msg}
+        self.target.write(json.dumps(msg_data).encode("ascii"))
+        # Trigger payload.
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": True,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": True,
+                "finish_trigger": False,
+            }
+        elif trigger == 3:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": True,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def fvsr_batch(self, key: list[int], num_segments: int, trigger: int):
+        """Start num_segments HMAC operation in FvsR batch mode.
+        Args:
+            key: The key containing the message.
+            num_segments: The number of iterations.
+            trigger: Which trigger to raise.
+        """
+        # HmacSca command.
+        self._ujson_hmac_sca_cmd()
+        # BatchFvsr command.
+        self.target.write(json.dumps("BatchFvsr").encode("ascii"))
+        # Key payload.
+        key_data = {"key": key}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        # Number of iterations payload.
+        num_it_data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(num_it_data).encode("ascii"))
+        # Trigger payload.
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": True,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": True,
+                "finish_trigger": False,
+            }
+        elif trigger == 3:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": True,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def random_batch(self, num_segments: int, trigger: int):
+        """Start num_segments HMAC operations in random batch mode.
+        Args:
+            num_segments: The number of iterations.
+            trigger: Which trigger to raise.
+        """
+        # HmacSca command.
+        self._ujson_hmac_sca_cmd()
+        # BatchRandom command.
+        self.target.write(json.dumps("BatchRandom").encode("ascii"))
+        # Number of iterations payload.
+        num_it_data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(num_it_data).encode("ascii"))
+        # Trigger payload.
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": True,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": True,
+                "finish_trigger": False,
+            }
+        elif trigger == 3:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": True,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
+
+    def daisy_chain(
+        self, text: list[int], key: list[int], num_segments: int, trigger: int
+    ):
+        """Start num_segments HMAC operations in daisy chain mode.
+        Args:
+            text: The input message
+            key: The HMAC key
+            num_segments: The number of iterations.
+            trigger: Which trigger to raise.
+        """
+        # HmacSca command.
+        self._ujson_hmac_sca_cmd()
+        # BatchRandom command.
+        self.target.write(json.dumps("BatchDaisy").encode("ascii"))
+        # Number of iterations payload.
+        key_data = {"key": key}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+        message_data = {"message": text}
+        self.target.write(json.dumps(message_data).encode("ascii"))
+        num_it_data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(num_it_data).encode("ascii"))
+        # Trigger payload.
+        if trigger == 0:
+            mode = {
+                "start_trigger": True,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 1:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": True,
+                "process_trigger": False,
+                "finish_trigger": False,
+            }
+        elif trigger == 2:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": True,
+                "finish_trigger": False,
+            }
+        elif trigger == 3:
+            mode = {
+                "start_trigger": False,
+                "msg_trigger": False,
+                "process_trigger": False,
+                "finish_trigger": True,
+            }
+        self.target.write(json.dumps(mode).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_ibex_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_ibex_commands.py
new file mode 100644
index 0000000000000..9bf8237a8b684
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_ibex_commands.py
@@ -0,0 +1,334 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the Ibex SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTIbex:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_ibex_sca_cmd(self):
+        self.target.write(json.dumps("IbexSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes the Ibex SCA tests on the target.
+
+        Returns:
+           Device id
+           The owner info page
+           The boot log
+           The boot measurements
+           The testOS version
+        """
+
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def ibex_sca_register_file_read_batch_random(self, num_segments: int):
+        """Start ibex.sca.register_file_read_batch_random test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFReadBatchRandom command.
+        self.target.write(json.dumps("RFReadBatchRandom").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_register_file_read(self, data: list[int]):
+        """Start ibex.sca.register_file_read test.
+        Args:
+            data: The data that is first written into the RF and then read back.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFRead command.
+        self.target.write(json.dumps("RFRead").encode("ascii"))
+        # Data payload.
+        data = {"data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_register_file_read_batch_fvsr(self, data: int, num_segments: int):
+        """Start ibex.sca.register_file_read_batch_fvsr test.
+        Args:
+            data: The data that is first written into the RF and then read back.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFReadBatchFvsr command.
+        self.target.write(json.dumps("RFReadBatchFvsr").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_register_file_write_batch_random(self, num_segments: int):
+        """Start ibex.sca.register_file_write_batch_random test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFWriteBatchRandom command.
+        self.target.write(json.dumps("RFWriteBatchRandom").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_register_file_write(self, data: list[int]):
+        """Start ibex.sca.register_file_write test.
+        Args:
+            data: The data that is written into the RF.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFWrite command.
+        self.target.write(json.dumps("RFWrite").encode("ascii"))
+        # Data payload.
+        data = {"data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_register_file_write_batch_fvsr(self, data: int, num_segments: int):
+        """Start ibex.sca.register_file_write_batch_fvsr test.
+        Args:
+            data: The data that is written into the RF.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # RFWriteBatchFvsr command.
+        self.target.write(json.dumps("RFWriteBatchFvsr").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_write_batch_random(self, num_segments: int):
+        """Start ibex.sca.tl_write_batch_random test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLWriteBatchRandom command.
+        self.target.write(json.dumps("TLWriteBatchRandom").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_write_batch_random_fix_address(self, num_segments: int):
+        """Start ibex.sca.tl_write_batch_random_fix_address test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLWriteBatchRandomFixAddress command.
+        self.target.write(json.dumps("TLWriteBatchRandomFixAddress").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_write(self, data: list[int]):
+        """Start ibex.sca.tl_write_random test.
+        Args:
+            data: The data that is written into the SRAM over Tl-UL.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLWrite command.
+        self.target.write(json.dumps("TLWrite").encode("ascii"))
+        # Data payload.
+        data = {"data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_write_batch_fvsr(self, data: int, num_segments: int):
+        """Start ibex.sca.tl_write_batch_fvsr test.
+        Args:
+            data: The data that is written into the SRAM over Tl-UL.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLWriteBatchFvsr command.
+        self.target.write(json.dumps("TLWriteBatchFvsr").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_write_batch_fvsr_fix_address(self, data: int, num_segments: int):
+        """Start ibex.sca.tl_write_batch_fvsr_fix_address test.
+        Args:
+            data: The data that is written into the SRAM over Tl-UL.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLWriteBatchFvsrFixAddress command.
+        self.target.write(json.dumps("TLWriteBatchFvsrFixAddress").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_read_batch_random(self, num_segments: int):
+        """Start ibex.sca.tl_read_batch_random test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLReadBatchRandom command.
+        self.target.write(json.dumps("TLReadBatchRandom").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_read_batch_random_fix_address(self, num_segments: int):
+        """Start ibex.sca.tl_read_batch_random_fix_address test.
+        Args:
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLReadBatchRandomFixAddress command.
+        self.target.write(json.dumps("TLReadBatchRandomFixAddress").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_read(self, data: list[int]):
+        """Start ibex.sca.tl_read test.
+        Args:
+            num_iterations: The number of iterations the RF is written.
+            data: The data that is written into the SRAM over Tl-UL.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLRead command.
+        self.target.write(json.dumps("TLRead").encode("ascii"))
+        # Data payload.
+        data = {"data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_read_batch_fvsr(self, data: int, num_segments: int):
+        """Start ibex.sca.tl_read_batch_fvsr test.
+        Args:
+            data: The data that is written into the SRAM over Tl-UL.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLReadBatchFvsr command.
+        self.target.write(json.dumps("TLReadBatchFvsr").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_tl_read_batch_fvsr_fix_address(self, data: int, num_segments: int):
+        """Start ibex.sca.tl_read_batch_fvsr_fix_address test.
+        Args:
+            data: The data that is written into the SRAM over Tl-UL.
+            num_segments: The number of iterations.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # TLReadBatchFvsrFixAddress command.
+        self.target.write(json.dumps("TLReadBatchFvsrFixAddress").encode("ascii"))
+        # Data payload.
+        data = {"num_iterations": num_segments, "fixed_data": data}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_combi_operations_batch_fvsr(
+        self, num_iterations: int, trigger: int, fixed_data1: int, fixed_data2: int
+    ):
+        """Start ibex.sca.combi_operations_batch_fvsr test.
+        Args:
+            num_iterations: The number of iterations the test is repeated.
+            trigger: 12-bit value, each bit sets the trigger for one of the 12 trigger windows.
+            fixed_data1: The first fixed value.
+            fixed_data2: The second fixed value.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # CombiOperationsBatchFvsr command.
+        self.target.write(json.dumps("CombiOperationsBatchFvsr").encode("ascii"))
+        # Input payload.
+        data = {
+            "num_iterations": num_iterations,
+            "trigger": trigger,
+            "fixed_data1": fixed_data1,
+            "fixed_data2": fixed_data2,
+        }
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ibex_sca_combi_operations_batch(
+        self, num_iterations: int, trigger: int, fixed_data1: int, fixed_data2: int
+    ):
+        """Start ibex.sca.combi_operations_batch test.
+        Args:
+            num_iterations: The number of iterations the test is repeated.
+            trigger: 12-bit value, each bit sets the trigger for one of the 12 trigger windows.
+            fixed_data1: The first fixed value.
+            fixed_data2: The second fixed value.
+        """
+        # IbexSca command.
+        self._ujson_ibex_sca_cmd()
+        # CombiOperationsBatchFvsr command.
+        self.target.write(json.dumps("CombiOperationsBatch").encode("ascii"))
+        # Input payload.
+        data = {
+            "num_iterations": num_iterations,
+            "trigger": trigger,
+            "fixed_data1": fixed_data1,
+            "fixed_data2": fixed_data2,
+        }
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def start_test(self, testname: str, arg1=None, arg2=None, arg3=None, arg4=None) -> None:
+        """Start the selected test.
+
+        Call the function selected in the config file. Uses the getattr()
+        construct to call the function.
+
+        Args:
+            testname: The test to start
+            arg1: The first argument passed to the test.
+            arg2: The second argument passed to the test.
+        """
+        test_function = getattr(self, testname)
+        if arg1 is not None and arg2 is None and arg3 is None and arg4 is None:
+            test_function(arg1)
+        elif arg2 is not None and arg3 is None and arg4 is None:
+            test_function(arg1, arg2)
+        elif arg3 is not None and arg4 is None:
+            test_function(arg1, arg2, arg3)
+        elif arg4 is not None:
+            test_function(arg1, arg2, arg3, arg4)
+        else:
+            test_function()
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_kmac_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_kmac_commands.py
new file mode 100644
index 0000000000000..12520f3af60c2
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_kmac_commands.py
@@ -0,0 +1,144 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the KMAC SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from typing import Optional
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTKMAC:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_kmac_sca_cmd(self):
+        self.target.write(json.dumps("KmacSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        fpga_mode_bit: int,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes KMAC on the target.
+        Args:
+            fpga_mode_bit: Indicates whether FPGA specific KMAC test is started.
+
+         Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+        # FPGA mode.
+        fpga_mode = {"fpga_mode": fpga_mode_bit}
+        self.target.write(json.dumps(fpga_mode).encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def write_key(self, key: list[int]):
+        """Write the key to KMAC.
+        Args:
+            key: Bytearray containing the key.
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # SetKey command.
+        self.target.write(json.dumps("SetKey").encode("ascii"))
+        # Key payload.
+        key_data = {"key": key, "key_length": 16}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+
+    def fvsr_key_set(self, key: list[int], key_length: Optional[int] = 16):
+        """Write the fixed key to KMAC.
+        Args:
+            key: Bytearray containing the key.
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # SetKey command.
+        self.target.write(json.dumps("FixedKeySet").encode("ascii"))
+        # FixedKeySet payload.
+        key_data = {"key": key, "key_length": key_length}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+
+    def write_lfsr_seed(self, seed):
+        """Seed the LFSR.
+        Args:
+            seed: The 4-byte seed.
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # SeedLfsr command.
+        self.target.write(json.dumps("SeedLfsr").encode("ascii"))
+        # Seed payload.
+        seed_int = [x for x in seed]
+        seed_data = {"seed": seed_int}
+        self.target.write(json.dumps(seed_data).encode("ascii"))
+
+    def absorb_batch(self, num_segments):
+        """Start absorb for batch.
+        Args:
+            num_segments: Number of encryptions to perform.
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # Batch command.
+        self.target.write(json.dumps("Batch").encode("ascii"))
+        # Num_segments payload.
+        num_segments_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_segments_data).encode("ascii"))
+
+    def absorb_daisy_chain(self, text, key, num_segments):
+        """Start absorb for daisy chain batch.
+        Args:
+            num_segments: Number of encryptions to perform.
+            text: The input message
+            key: The KMAC128 key
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # BatchDaisy command.
+        self.target.write(json.dumps("BatchDaisy").encode("ascii"))
+        # Num_segments payload.
+        num_it_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_it_data).encode("ascii"))
+        message_data = {"msg": text, "msg_length": len(text)}
+        self.target.write(json.dumps(message_data).encode("ascii"))
+        key_data = {"key": key, "key_length": len(key)}
+        self.target.write(json.dumps(key_data).encode("ascii"))
+
+    def absorb(self, text, text_length: Optional[int] = 16):
+        """Write plaintext to OpenTitan KMAC & start absorb.
+        Args:
+            text: The plaintext bytearray.
+        """
+        # KmacSca command.
+        self._ujson_kmac_sca_cmd()
+        # SingleAbsorb command.
+        self.target.write(json.dumps("SingleAbsorb").encode("ascii"))
+        # Msg payload.
+        text_int = [x for x in text]
+        text_data = {"msg": text_int, "msg_length": text_length}
+        self.target.write(json.dumps(text_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_otbn_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_otbn_commands.py
new file mode 100644
index 0000000000000..301744deee091
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_otbn_commands.py
@@ -0,0 +1,161 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the OTBN SCA application on OpenTitan.
+
+Communication with OpenTitan happens the uJson
+command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTOTBN:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_otbn_sca_cmd(self):
+        self.target.write(json.dumps("OtbnSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes the Otbn SCA tests on the target.
+
+        Returns:
+           Device id
+           The owner info page
+           The boot log
+           The boot measurements
+           The testOS version
+        """
+
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Init command.
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def init_keymgr(self):
+        """Initializes the key manager for OTBN on the target."""
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Init the key manager.
+        self.target.write(json.dumps("InitKeyMgr").encode("ascii"))
+
+    def key_sideload_fvsr(self, seed: int):
+        """Starts the key sidloading FvsR test on OTBN.
+        Args:
+            seed: The fixed seed used by the key manager.
+        """
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Start the KeySideloadFvsr test.
+        self.target.write(json.dumps("KeySideloadFvsr").encode("ascii"))
+        seed_data = {"fixed_seed": seed}
+        self.target.write(json.dumps(seed_data).encode("ascii"))
+
+    def ecdsa_p256_sign(self, masking_on: bool, msg, d0, k0):
+        """Starts the EcdsaP256Sign test on OTBN.
+        Args:
+            masking_on: Turn on/off masking.
+            msg: Message array (8xuint32_t)
+            d0: Message array (10xuint32_t)
+            k0: Message array (10xuint32_t)
+        """
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Start the EcdsaP256Sign test.
+        self.target.write(json.dumps("EcdsaP256Sign").encode("ascii"))
+        # Configure masking.
+        masks = {"en_masks": masking_on}
+        self.target.write(json.dumps(masks).encode("ascii"))
+        # Send msg, d0, and k0.
+        data = {"msg": msg, "d0": d0, "ko": k0}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ecdsa_p256_sign_batch(self, num_traces: int, masking_on: bool, msg, d0, k0):
+        """Starts the EcdsaP256SignBatch test on OTBN.
+        Args:
+            num_traces: Number of batch operations.
+            masking_on: Turn on/off masking.
+            msg: Message array (8xuint32_t)
+            d0: Message array (10xuint32_t)
+            k0: Message array (10xuint32_t)
+        """
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Start the EcdsaP256SignBatch test.
+        self.target.write(json.dumps("EcdsaP256Sign").encode("ascii"))
+        # Configure number of traces.
+        num_traces = {"num_traces": num_traces}
+        self.target.write(json.dumps(num_traces).encode("ascii"))
+        # Configure masking.
+        masks = {"en_masks": masking_on}
+        self.target.write(json.dumps(masks).encode("ascii"))
+        # Send msg, d0, and k0.
+        data = {"msg": msg, "d0": d0, "ko": k0}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def ecdsa_p256_sign_batch_fvsr(
+        self, num_traces: int, masking_on: bool, msg, d0, k0
+    ):
+        """Starts the EcdsaP256SignFvsrBatch test on OTBN.
+        Args:
+            num_traces: Number of batch operations.
+            masking_on: Turn on/off masking.
+            msg: Message array (8xuint32_t)
+            d0: Message array (10xuint32_t)
+            k0: Message array (10xuint32_t)
+        """
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Start the EcdsaP256SignBatch test.
+        self.target.write(json.dumps("EcdsaP256SignFvsrBatch").encode("ascii"))
+        # Configure number of traces.
+        num_traces = {"num_traces": num_traces}
+        self.target.write(json.dumps(num_traces).encode("ascii"))
+        # Configure masking.
+        masks = {"en_masks": masking_on}
+        self.target.write(json.dumps(masks).encode("ascii"))
+        # Send msg, d0, and k0.
+        data = {"msg": msg, "d0": d0, "ko": k0}
+        self.target.write(json.dumps(data).encode("ascii"))
+
+    def start_combi_ops_batch(
+        self, num_iterations, fixed_data1, fixed_data2, print_flag, trigger
+    ):
+        """Start the combi ops app in batch mode.
+        Args:
+            num_iterations: How many traces per batch.
+            fixed_data1: The first fixed input.
+            fixed_data2: The second fixed input.
+            print_flag: Whether to print an output or an empty RESP_OK.
+            trigger: Which triggers to raise.
+        """
+        # OtbnSca command.
+        self._ujson_otbn_sca_cmd()
+        # Start the CombiOps test.
+        self.target.write(json.dumps("CombiOps").encode("ascii"))
+        data = {
+            "num_iterations": num_iterations,
+            "fixed_data1": fixed_data1,
+            "fixed_data2": fixed_data2,
+            "print_flag": print_flag,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_prng_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_prng_commands.py
new file mode 100644
index 0000000000000..7b08b495200c4
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_prng_commands.py
@@ -0,0 +1,34 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the PRNG SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from typing import Optional
+
+
+class OTPRNG:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_prng_sca_cmd(self):
+        self.target.write(json.dumps("PrngSca").encode("ascii"))
+        time.sleep(0.003)
+
+    def seed_prng(self, seed, seed_length: Optional[int] = 4):
+        """Seed the PRNG.
+        Args:
+            seed: The 4-byte seed.
+        """
+        # PrngSca command.
+        self._ujson_prng_sca_cmd()
+        # SingleEncrypt command.
+        self.target.write(json.dumps("SeedPrng").encode("ascii"))
+        # Text payload.
+        seed_int = [x for x in seed]
+        seed_data = {"seed": seed_int, "seed_length": seed_length}
+        self.target.write(json.dumps(seed_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_sha3_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_sha3_commands.py
new file mode 100644
index 0000000000000..676a03460b7c9
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_sha3_commands.py
@@ -0,0 +1,157 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the SHA3 SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from typing import Optional
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTSHA3:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_sha3_sca_cmd(self):
+        self.target.write(json.dumps("Sha3Sca").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        fpga_mode_bit: int,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes SHA3 on the target.
+        Args:
+            fpga_mode_bit: Indicates whether FPGA specific KMAC test is started.
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # Init the SHA3 core.
+        self.target.write(json.dumps("Init").encode("ascii"))
+        # FPGA mode.
+        fpga_mode = {"fpga_mode": fpga_mode_bit}
+        self.target.write(json.dumps(fpga_mode).encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def _ujson_sha3_sca_ack(self, num_attempts: Optional[int] = 100):
+        # Wait for ack.
+        read_counter = 0
+        while read_counter < num_attempts:
+            read_line = str(self.target.readline())
+            if "RESP_OK" in read_line:
+                json_string = read_line.split("RESP_OK:")[1].split(" CRC:")[0]
+                try:
+                    if "status" in json_string:
+                        status = json.loads(json_string)["status"]
+                        if status != 0:
+                            raise Exception(
+                                "Acknowledge error: Device and host not in sync"
+                            )
+                        return status
+                except Exception:
+                    raise Exception("Acknowledge error: Device and host not in sync")
+            else:
+                read_counter += 1
+        raise Exception("Acknowledge error: Device and host not in sync")
+
+    def set_mask_off(self):
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # DisableMasking command.
+        self.target.write(json.dumps("DisableMasking").encode("ascii"))
+        # Num_segments payload.
+        mask = {"masks_off": 1}
+        self.target.write(json.dumps(mask).encode("ascii"))
+        # Wait for ack.
+        self._ujson_sha3_sca_ack()
+
+    def set_mask_on(self):
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # DisableMasking command.
+        self.target.write(json.dumps("DisableMasking").encode("ascii"))
+        # Num_segments payload.
+        mask = {"masks_off": 0}
+        self.target.write(json.dumps(mask).encode("ascii"))
+        # Wait for ack.
+        self._ujson_sha3_sca_ack()
+
+    def absorb(self, text, text_length: Optional[int] = 16):
+        """Write plaintext to OpenTitan SHA3 & start absorb.
+        Args:
+            text: The plaintext bytearray.
+        """
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # SingleAbsorb command.
+        self.target.write(json.dumps("SingleAbsorb").encode("ascii"))
+        # SingleAbsorb payload.
+        text_int = [x for x in text]
+        text_data = {"msg": text_int, "msg_length": text_length}
+        self.target.write(json.dumps(text_data).encode("ascii"))
+
+    def absorb_batch(self, num_segments):
+        """Start absorb for batch.
+        Args:
+            num_segments: Number of hashings to perform.
+        """
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # Batch command.
+        self.target.write(json.dumps("Batch").encode("ascii"))
+        # Num_segments payload.
+        num_segments_data = {"num_enc": num_segments}
+        self.target.write(json.dumps(num_segments_data).encode("ascii"))
+        # Wait for ack.
+        self._ujson_sha3_sca_ack()
+
+    def write_lfsr_seed(self, seed):
+        """Seed the LFSR.
+        Args:
+            seed: The 4-byte seed.
+        """
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # SeedLfsr command.
+        self.target.write(json.dumps("SeedLfsr").encode("ascii"))
+        # Seed payload.
+        seed_int = [x for x in seed]
+        seed_data = {"seed": seed_int}
+        self.target.write(json.dumps(seed_data).encode("ascii"))
+
+    def fvsr_fixed_msg_set(self, msg, msg_length: Optional[int] = 16):
+        """Write the fixed message to SHA3.
+        Args:
+            msg: Bytearray containing the message.
+        """
+        # Sha3Sca command.
+        self._ujson_sha3_sca_cmd()
+        # FixedMessageSet command.
+        self.target.write(json.dumps("FixedMessageSet").encode("ascii"))
+        # Msg payload.
+        msg_int = [x for x in msg]
+        msg_data = {"msg": msg_int, "msg_length": msg_length}
+        self.target.write(json.dumps(msg_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_sym_cryptolib_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_sym_cryptolib_commands.py
new file mode 100644
index 0000000000000..fdde17fd8e77e
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_sym_cryptolib_commands.py
@@ -0,0 +1,411 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the SHA3 SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from sw.host.penetrationtests.python.util import common_library
+
+
+class OTSymCrypto:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def _ujson_sym_crypto_sca_cmd(self):
+        self.target.write(json.dumps("CryptoLibScaSym").encode("ascii"))
+        time.sleep(0.003)
+
+    def init(
+        self,
+        core_config: dict = common_library.default_core_config,
+        sensor_config: dict = common_library.default_sensor_config,
+    ) -> tuple:
+        """Initializes Sym Cryptolib on the target.
+
+        Returns:
+            Device id
+            The owner info page
+            The boot log
+            The boot measurements
+            The testOS version
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("Init").encode("ascii"))
+
+        # Write each configuration block to the target.
+        self.target.write(json.dumps(core_config).encode("ascii"))
+        self.target.write(json.dumps(sensor_config).encode("ascii"))
+
+        device_id = self.target.read_response()
+        owner_page = self.target.read_response()
+        boot_log = self.target.read_response()
+        boot_measurements = self.target.read_response()
+        version = self.target.read_response()
+        return device_id, owner_page, boot_log, boot_measurements, version
+
+    def handle_aes_fvsr_plaintext(
+        self,
+        data,
+        data_len,
+        key,
+        key_len,
+        iv,
+        padding,
+        mode,
+        op_enc,
+        cfg,
+        trigger,
+        num_iterations,
+    ) -> None:
+        """Call the cryptolib AES.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            op_enc: Boolean specifying to encrypt or decrypt.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("AesFvsrPlaintext").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "padding": padding,
+            "mode": mode,
+            "op_enc": op_enc,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_aes_daisy(
+        self,
+        data,
+        data_len,
+        key,
+        key_len,
+        iv,
+        padding,
+        mode,
+        op_enc,
+        cfg,
+        trigger,
+        num_iterations,
+    ) -> None:
+        """Call the cryptolib AES.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            op_enc: Boolean specifying to encrypt or decrypt.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("AesDaisy").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "padding": padding,
+            "mode": mode,
+            "op_enc": op_enc,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_cmac_fvsr_plaintext(
+        self, data, data_len, key, key_len, iv, cfg, trigger, num_iterations
+    ) -> None:
+        """Call the cryptolib CMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("CmacFvsrPlaintext").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_cmac_daisy(
+        self, data, data_len, key, key_len, iv, cfg, trigger, num_iterations
+    ) -> None:
+        """Call the cryptolib CMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("CmacDaisy").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_gcm_fvsr_plaintext(
+        self,
+        data,
+        data_len,
+        key,
+        key_len,
+        aad,
+        aad_len,
+        iv,
+        cfg,
+        trigger,
+        num_iterations,
+    ) -> None:
+        """Call the cryptolib GCM.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            aad: Array of max 64 bytes of aad data.
+            aad_len: Input aad length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("GcmFvsrPlaintext").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "aad": aad,
+            "aad_len": aad_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_gcm_daisy(
+        self,
+        data,
+        data_len,
+        key,
+        key_len,
+        aad,
+        aad_len,
+        iv,
+        cfg,
+        trigger,
+        num_iterations,
+    ) -> None:
+        """Call the cryptolib GCM.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 32 bytes of key data.
+            key_len: Input key length.
+            aad: Array of max 64 bytes of aad data.
+            aad_len: Input aad length.
+            iv: Array of 16 bytes for the iv.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("GcmDaisy").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "aad": aad,
+            "aad_len": aad_len,
+            "iv": iv,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_hmac_fvsr_plaintext(
+        self, data, data_len, key, key_len, padding, mode, cfg, trigger, num_iterations
+    ) -> None:
+        """Call the cryptolib HMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 192 bytes of key data.
+            key_len: Input key length.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("HmacFvsrPlaintext").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "padding": padding,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_hmac_daisy(
+        self, data, data_len, key, key_len, padding, mode, cfg, trigger, num_iterations
+    ) -> None:
+        """Call the cryptolib HMAC.
+
+        Args:
+            data: Array of max 64 bytes of input data.
+            data_len: Input data length.
+            key: Array of max 192 bytes of key data.
+            key_len: Input key length.
+            padding: integer specifying the padding mode.
+            mode: integer specifying the mode of operations.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("HmacDaisy").encode("ascii"))
+        input_data = {
+            "data": data,
+            "data_len": data_len,
+            "key": key,
+            "key_len": key_len,
+            "padding": padding,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_drbg_reseed(
+        self,
+        entropy,
+        entropy_len,
+        nonce,
+        nonce_len,
+        reseed_interval,
+        mode,
+        cfg,
+        trigger,
+    ) -> None:
+        """Call the cryptolib DRBG to reseed.
+
+        Args:
+            entropy: Array of max 32 bytes of entropy data.
+            entropy_len: Input entropy length.
+            nonce: Array of max 16 bytes of nonce data.
+            nonce_len: Input nonce length.
+            reseed_interval: when to reseed.
+            mode: integer specifying the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("DrbgReseed").encode("ascii"))
+        input_data = {
+            "entropy": entropy,
+            "entropy_len": entropy_len,
+            "nonce": nonce,
+            "nonce_len": nonce_len,
+            "reseed_interval": reseed_interval,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
+
+    def handle_drbg_generate(
+        self, nonce, nonce_len, data_len, mode, cfg, trigger, num_iterations
+    ) -> None:
+        """Call the cryptolib DRBG to generate randomness.
+
+        Args:
+            nonce: Array of max 16 bytes of nonce data.
+            nonce_len: Input nonce length.
+            data_len: Length of the output data.
+            reseed_interval: when to reseed.
+            mode: integer specifying the mode.
+            cfg: Integer for configuration.
+            trigger: Integer specifying which triggers to set.
+            num_iterations: Number of segments in the batching.
+        """
+        self._ujson_sym_crypto_sca_cmd()
+        self.target.write(json.dumps("DrbgGenerateBatch").encode("ascii"))
+        input_data = {
+            "nonce": nonce,
+            "nonce_len": nonce_len,
+            "data_len": data_len,
+            "mode": mode,
+            "cfg": cfg,
+            "trigger": trigger,
+            "num_iterations": num_iterations,
+        }
+        self.target.write(json.dumps(input_data).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/communication/sca_trigger_commands.py b/sw/host/penetrationtests/python/sca/communication/sca_trigger_commands.py
new file mode 100644
index 0000000000000..d2e107cf8ab69
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/communication/sca_trigger_commands.py
@@ -0,0 +1,31 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Communication interface for the SHA3 SCA application on OpenTitan.
+
+Communication with OpenTitan happens over the uJson
+command interface.
+"""
+import json
+import time
+from typing import Optional
+
+
+class OTTRIGGER:
+    def __init__(self, target) -> None:
+        self.target = target
+
+    def select_trigger(self, trigger_source: Optional[int] = 0):
+        """Select the trigger source for SCA.
+        Args:
+            trigger_source:
+                            - 0: Precise, hardware-generated trigger - FPGA only.
+                            - 1: Fully software-controlled trigger.
+        """
+        self.target.write(json.dumps("TriggerSca").encode("ascii"))
+        time.sleep(0.003)
+        # SelectTriggerSource command.
+        self.target.write(json.dumps("SelectTriggerSource").encode("ascii"))
+        # Source payload.
+        src = {"source": trigger_source}
+        self.target.write(json.dumps(src).encode("ascii"))
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_aes_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_aes_functions.py
new file mode 100644
index 0000000000000..6cec14a6d6bea
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_aes_functions.py
@@ -0,0 +1,162 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_aes_commands import OTAES
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+from sw.host.penetrationtests.python.sca.communication.sca_trigger_commands import OTTRIGGER
+
+
+def char_aes_single_encrypt(target, iterations, fpga, masking, key, text, reset = False):
+    aessca = OTAES(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+
+    # Check whether we enable the masking
+    # Note that disabled masking might create errors on production chips
+    if masking:
+        lfsr_seed = 1
+    else:
+        lfsr_seed = 0
+    aessca.seed_lfsr(lfsr_seed.to_bytes(4, "little"))
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    for _ in range(iterations):
+        aessca.single_encrypt(key, text)
+        response = target.read_response()
+    return response
+
+
+def char_aes_batch_daisy_chain(
+    target, iterations, num_segments, fpga, masking, key, text, reset = False
+):
+    aessca = OTAES(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+
+    # Check whether we enable the masking
+    # Note that disabled masking might create errors on production chips
+    if masking:
+        lfsr_seed = 1
+    else:
+        lfsr_seed = 0
+    aessca.seed_lfsr(lfsr_seed.to_bytes(4, "little"))
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    # This way of coding does always start from the same plaintext
+    # and thus always encrypts the same for all iterations.
+    # Instead, one can set a random text every loop here.
+    for _ in range(iterations):
+        aessca.batch_daisy_chain(num_segments, key, text)
+        response = target.read_response()
+    return response
+
+
+def char_aes_batch_fvsr_data(
+    target, iterations, num_segments, fpga, masking, key, text, reset = False
+):
+    aessca = OTAES(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+
+    # Check whether we enable the masking
+    # Note that disabled masking might create errors on production chips
+    if masking:
+        lfsr_seed = 1
+    else:
+        lfsr_seed = 0
+    aessca.seed_lfsr(lfsr_seed.to_bytes(4, "little"))
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        aessca.batch_fvsr_data(num_segments, key, text)
+        response = target.read_response()
+    return response
+
+
+def char_aes_batch_fvsr_key(target, iterations, num_segments, fpga, masking, key, reset = False):
+    aessca = OTAES(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+
+    # Check whether we enable the masking
+    # Note that disabled masking might create errors on production chips
+    if masking:
+        lfsr_seed = 1
+    else:
+        lfsr_seed = 0
+    aessca.seed_lfsr(lfsr_seed.to_bytes(4, "little"))
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        aessca.batch_fvsr_key(num_segments, key)
+        response = target.read_response()
+    return response
+
+
+def char_aes_batch_random(target, iterations, num_segments, fpga, masking, key, reset = False):
+    aessca = OTAES(target)
+
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+        # Initialize our chip and catch its output
+        device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+
+    # Check whether we enable the masking
+    # Note that disabled masking might create errors on production chips
+    if masking:
+        lfsr_seed = 1
+    else:
+        lfsr_seed = 0
+    aessca.seed_lfsr(lfsr_seed.to_bytes(4, "little"))
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        aessca.batch_random(num_segments, key)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_asym_cryptolib_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_asym_cryptolib_functions.py
new file mode 100644
index 0000000000000..ed602dde3faad
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_asym_cryptolib_functions.py
@@ -0,0 +1,435 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_asym_cryptolib_commands import (
+    OTAsymCrypto,
+)
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+
+
+def char_rsa_dec(
+    target,
+    iterations,
+    data,
+    data_len,
+    e,
+    n,
+    n_len,
+    d,
+    padding,
+    hashing,
+    mode,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        asymsca.handle_rsa_dec(
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            mode,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_rsa_sign(
+    target,
+    iterations,
+    data,
+    data_len,
+    e,
+    n,
+    n_len,
+    d,
+    padding,
+    hashing,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        asymsca.handle_rsa_sign(
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_prime_generation(
+    target,
+    iterations,
+    e,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_prime_generation(
+            e,
+            cfg,
+            trigger,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p256_base_mult_fvsr(
+    target,
+    iterations,
+    scalar,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        asymsca.handle_p256_base_mult_fvsr(
+            scalar,
+            cfg,
+            trigger,
+            num_iterations
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p256_base_mult_daisy(
+    target,
+    iterations,
+    scalar,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p256_base_mult_daisy(
+            scalar,
+            cfg,
+            trigger,
+            num_iterations
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p256_point_mult(
+    target,
+    iterations,
+    scalar_alice,
+    scalar_bob,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p256_point_mult(
+            scalar_alice,
+            scalar_bob,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p256_ecdh(
+    target,
+    iterations,
+    private_key,
+    public_x,
+    public_y,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p256_ecdh(
+            private_key,
+            public_x,
+            public_y,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p256_sign(
+    target,
+    iterations,
+    scalar,
+    pubx,
+    puby,
+    message,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p256_sign(
+            scalar,
+            pubx,
+            puby,
+            message,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p384_base_mult_fvsr(
+    target,
+    iterations,
+    scalar,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        asymsca.handle_p384_base_mult_fvsr(
+            scalar,
+            cfg,
+            trigger,
+            num_iterations
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p384_base_mult_daisy(
+    target,
+    iterations,
+    scalar,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p384_base_mult_daisy(
+            scalar,
+            cfg,
+            trigger,
+            num_iterations
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p384_point_mult(
+    target,
+    iterations,
+    scalar_alice,
+    scalar_bob,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p384_point_mult(
+            scalar_alice,
+            scalar_bob,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p384_ecdh(
+    target,
+    iterations,
+    private_key,
+    public_x,
+    public_y,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p384_ecdh(
+            private_key,
+            public_x,
+            public_y,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
+
+
+def char_p384_sign(
+    target,
+    iterations,
+    scalar,
+    pubx,
+    puby,
+    message,
+    cfg,
+    trigger,
+    reset=False,
+):
+    asymsca = OTAsymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        asymsca.init()
+    )
+    for _ in range(iterations):
+        asymsca.handle_p384_sign(
+            scalar,
+            pubx,
+            puby,
+            message,
+            cfg,
+            trigger
+        )
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_hmac_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_hmac_functions.py
new file mode 100644
index 0000000000000..381fe5ab5cbe4
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_hmac_functions.py
@@ -0,0 +1,74 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_hmac_commands import OTHMAC
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+
+
+def char_hmac_single(target, iterations, trigger, key, text, reset = False):
+    hmacsca = OTHMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = hmacsca.init()
+
+    for _ in range(iterations):
+        hmacsca.single(text, key, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_hmac_daisy_chain(target, iterations, num_segments, trigger, key, text, reset = False):
+    hmacsca = OTHMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = hmacsca.init()
+
+    for _ in range(iterations):
+        hmacsca.daisy_chain(text, key, num_segments, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_hmac_random_batch(target, iterations, num_segments, trigger, reset = False):
+    hmacsca = OTHMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = hmacsca.init()
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        hmacsca.random_batch(num_segments, trigger)
+        response = target.read_response()
+    return response
+
+
+def char_hmac_fvsr_batch(target, iterations, num_segments, trigger, key, reset = False):
+    hmacsca = OTHMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = hmacsca.init()
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    for _ in range(iterations):
+        hmacsca.fvsr_batch(key, num_segments, trigger)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_ibex_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_ibex_functions.py
new file mode 100644
index 0000000000000..9bf3ef9584dfc
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_ibex_functions.py
@@ -0,0 +1,332 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_ibex_commands import OTIbex
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+
+
+def char_combi_operations_batch(
+    target, iterations, num_segments, trigger, fixed_data1, fixed_data2, reset = False
+):
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_combi_operations_batch(
+            num_iterations=num_segments,
+            trigger=trigger,
+            fixed_data1=fixed_data1,
+            fixed_data2=fixed_data2,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_combi_operations_batch_fvsr(
+    target, iterations, num_segments, trigger, fixed_data1, fixed_data2, reset = False
+):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_combi_operations_batch_fvsr(
+            num_iterations=num_segments,
+            trigger=trigger,
+            fixed_data1=fixed_data1,
+            fixed_data2=fixed_data2,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_register_file_read(target, iterations, data, reset = False):
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_read(data=data)
+        response = target.read_response()
+    return response
+
+
+def char_register_file_read_batch_fvsr(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_read_batch_fvsr(
+            data=data, num_segments=num_segments
+        )
+        response = target.read_response()
+    return response
+
+
+def char_register_file_read_batch_random(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_read_batch_random(num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_register_file_write(target, iterations, data, reset = False):
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_write(data=data)
+        response = target.read_response()
+    return response
+
+
+def char_register_file_write_batch_fvsr(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_write_batch_fvsr(
+            data=data, num_segments=num_segments
+        )
+        response = target.read_response()
+    return response
+
+
+def char_register_file_write_batch_random(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_register_file_write_batch_random(num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_read(target, iterations, data, reset = False):
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_read(data=data)
+        response = target.read_response()
+    return response
+
+
+def char_tl_read_batch_fvsr(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_read_batch_fvsr(data=data, num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_read_batch_fvsr_fix_address(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_read_batch_fvsr_fix_address(
+            data=data, num_segments=num_segments
+        )
+        response = target.read_response()
+    return response
+
+
+def char_tl_read_batch_random(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_read_batch_random(num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_read_batch_random_fix_address(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_read_batch_random_fix_address(num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_write(target, iterations, data, reset = False):
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_write(data=data)
+        response = target.read_response()
+    return response
+
+
+def char_tl_write_batch_fvsr(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_write_batch_fvsr(data=data, num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_write_batch_fvsr_fix_address(target, iterations, data, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_write_batch_fvsr_fix_address(
+            data=data, num_segments=num_segments
+        )
+        response = target.read_response()
+    return response
+
+
+def char_tl_write_batch_random(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_write_batch_random(num_segments=num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_tl_write_batch_random_fix_address(target, iterations, num_segments, reset = False):
+    # Seed the prng to make synchronized randomness
+    # This is the same as using python rand with seed 1
+    otprng = OTPRNG(target)
+    otprng.seed_prng([1, 0, 0, 0])
+    ibexsca = OTIbex(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+    for _ in range(iterations):
+        ibexsca.ibex_sca_tl_write_batch_random_fix_address(num_segments=num_segments)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_kmac_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_kmac_functions.py
new file mode 100644
index 0000000000000..1a0b3ee5495ec
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_kmac_functions.py
@@ -0,0 +1,92 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_kmac_commands import OTKMAC
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+from sw.host.penetrationtests.python.sca.communication.sca_trigger_commands import OTTRIGGER
+
+
+def char_kmac_single(target, iterations, fpga, masking, key, text, reset = False):
+    kmacsca = OTKMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = kmacsca.init(fpga)
+
+    if masking:
+        lfsr_seed = [0, 1, 2, 3]
+    else:
+        lfsr_seed = [0, 0, 0, 0]
+    kmacsca.write_lfsr_seed(lfsr_seed)
+
+    kmacsca.write_key(key)
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    for _ in range(iterations):
+        kmacsca.absorb(text, len(text))
+        response = target.read_response()
+    return response
+
+
+def char_kmac_batch_daisy_chain(
+    target, iterations, num_segments, fpga, masking, key, text, reset = False
+):
+    kmacsca = OTKMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = kmacsca.init(fpga)
+
+    if masking:
+        lfsr_seed = [0, 1, 2, 3]
+    else:
+        lfsr_seed = [0, 0, 0, 0]
+    kmacsca.write_lfsr_seed(lfsr_seed)
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    for _ in range(iterations):
+        kmacsca.absorb_daisy_chain(text, key, num_segments)
+        response = target.read_response()
+    return response
+
+
+def char_kmac_batch(target, iterations, num_segments, fpga, masking, key, reset = False):
+    kmacsca = OTKMAC(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = kmacsca.init(fpga)
+
+    if masking:
+        lfsr_seed = [0, 1, 2, 3]
+    else:
+        lfsr_seed = [0, 0, 0, 0]
+    kmacsca.write_lfsr_seed(lfsr_seed)
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    kmacsca.fvsr_key_set(key, len(key))
+
+    for _ in range(iterations):
+        kmacsca.absorb_batch(num_segments)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_otbn_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_otbn_functions.py
new file mode 100644
index 0000000000000..d1b650ded90ea
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_otbn_functions.py
@@ -0,0 +1,30 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_otbn_commands import OTOTBN
+
+
+def char_combi_operations_batch(
+    target,
+    iterations,
+    num_segments,
+    fixed_data1,
+    fixed_data2,
+    print_flag,
+    trigger,
+    reset = False
+):
+    otbnsca = OTOTBN(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = otbnsca.init()
+    for _ in range(iterations):
+        otbnsca.start_combi_ops_batch(
+            num_segments, fixed_data1, fixed_data2, print_flag, trigger
+        )
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_sha3_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_sha3_functions.py
new file mode 100644
index 0000000000000..d5d5f0050b9ae
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_sha3_functions.py
@@ -0,0 +1,63 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_sha3_commands import OTSHA3
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+from sw.host.penetrationtests.python.sca.communication.sca_trigger_commands import OTTRIGGER
+
+
+def char_sha3_single_absorb(target, iterations, fpga, masking, text, reset = False):
+    sha3sca = OTSHA3(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = sha3sca.init(fpga)
+
+    if masking:
+        lfsr_seed = [0, 1, 2, 3]
+        sha3sca.write_lfsr_seed(lfsr_seed)
+    else:
+        sha3sca.set_mask_off()
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    for _ in range(iterations):
+        sha3sca.absorb(text, len(text))
+        response = target.read_response()
+    return response
+
+
+def char_sha3_batch_absorb(target, iterations, num_segments, fpga, masking, text, reset = False):
+    sha3sca = OTSHA3(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = sha3sca.init(fpga)
+
+    if masking:
+        lfsr_seed = [0, 1, 2, 3]
+        sha3sca.write_lfsr_seed(lfsr_seed)
+    else:
+        sha3sca.set_mask_off()
+
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+
+    # Set the trigger
+    triggersca = OTTRIGGER(target)
+    triggersca.select_trigger(int(not fpga))
+
+    sha3sca.fvsr_fixed_msg_set(text, len(text))
+
+    for _ in range(iterations):
+        sha3sca.absorb_batch(num_segments)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/host_scripts/sca_sym_cryptolib_functions.py b/sw/host/penetrationtests/python/sca/host_scripts/sca_sym_cryptolib_functions.py
new file mode 100644
index 0000000000000..f78924fbee477
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/host_scripts/sca_sym_cryptolib_functions.py
@@ -0,0 +1,366 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.communication.sca_sym_cryptolib_commands import (
+    OTSymCrypto,
+)
+from sw.host.penetrationtests.python.sca.communication.sca_prng_commands import OTPRNG
+
+
+def char_aes_fvsr_plaintext(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    iv,
+    padding,
+    mode,
+    op_enc,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        symsca.handle_aes_fvsr_plaintext(
+            data,
+            data_len,
+            key,
+            key_len,
+            iv,
+            padding,
+            mode,
+            op_enc,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_aes_daisy(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    iv,
+    padding,
+    mode,
+    op_enc,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+
+    for _ in range(iterations):
+        symsca.handle_aes_daisy(
+            data,
+            data_len,
+            key,
+            key_len,
+            iv,
+            padding,
+            mode,
+            op_enc,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_cmac_fvsr_plaintext(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    iv,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        symsca.handle_cmac_fvsr_plaintext(
+            data,
+            data_len,
+            key,
+            key_len,
+            iv,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_cmac_daisy(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    iv,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+
+    for _ in range(iterations):
+        symsca.handle_cmac_daisy(
+            data,
+            data_len,
+            key,
+            key_len,
+            iv,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_gcm_fvsr_plaintext(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    aad,
+    aad_len,
+    iv,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        symsca.handle_gcm_fvsr_plaintext(
+            data,
+            data_len,
+            key,
+            key_len,
+            aad,
+            aad_len,
+            iv,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_gcm_daisy(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    aad,
+    aad_len,
+    iv,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+
+    for _ in range(iterations):
+        symsca.handle_gcm_daisy(
+            data,
+            data_len,
+            key,
+            key_len,
+            aad,
+            aad_len,
+            iv,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_hmac_fvsr_plaintext(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    padding,
+    mode,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        symsca.handle_hmac_fvsr_plaintext(
+            data,
+            data_len,
+            key,
+            key_len,
+            padding,
+            mode,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_hmac_daisy(
+    target,
+    iterations,
+    data,
+    data_len,
+    key,
+    key_len,
+    padding,
+    mode,
+    cfg,
+    trigger,
+    num_iterations,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+    # Set the internal prng
+    ot_prng = OTPRNG(target=target)
+    ot_prng.seed_prng([1, 0, 0, 0])
+    for _ in range(iterations):
+        symsca.handle_hmac_daisy(
+            data,
+            data_len,
+            key,
+            key_len,
+            padding,
+            mode,
+            cfg,
+            trigger,
+            num_iterations,
+        )
+        response = target.read_response()
+    return response
+
+
+def char_drbg(
+    target,
+    iterations,
+    entropy,
+    entropy_len,
+    nonce,
+    nonce_len,
+    reseed_interval,
+    data_len,
+    mode,
+    cfg,
+    trigger,
+    num_segments,
+    reset=False,
+):
+    symsca = OTSymCrypto(target)
+    if reset:
+        target.reset_target()
+        # Clear the output from the reset
+        target.dump_all()
+    # Initialize our chip and catch its output
+    device_id, owner_page, boot_log, boot_measurements, version = (
+        symsca.init()
+    )
+    # In this test, we do not trigger the reseeding
+    symsca.handle_drbg_reseed(
+        entropy, entropy_len, nonce, nonce_len, reseed_interval, mode, 0, 0
+    )
+    response = target.read_response()
+    for _ in range(iterations):
+        # In this test, we do not add to the nonce
+        symsca.handle_drbg_generate([0], 0, data_len, mode, cfg, trigger, num_segments)
+        response = target.read_response()
+    return response
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_aes_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_aes_python_test.py
new file mode 100644
index 0000000000000..4273a5ee16288
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_aes_python_test.py
@@ -0,0 +1,298 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_aes_functions
+from sw.host.penetrationtests.python.sca.communication.sca_aes_commands import OTAES
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+from Crypto.Cipher import AES
+import unittest
+import argparse
+import sys
+
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+# For testing, we only use the software trigger
+fpga = 0
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class AesScaTest(unittest.TestCase):
+
+    def test_init(self):
+        aessca = OTAES(target)
+        device_id, owner_page, boot_log, boot_measurements, version = aessca.init(fpga)
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_aes_single_encrypt(self):
+        # Note that setting this to false gives errors for production chips
+        masking = True
+        key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        actual_result = sca_aes_functions.char_aes_single_encrypt(
+            target, iterations, fpga, masking, key, text
+        )
+        actual_result_json = json.loads(actual_result)
+
+        cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+        expected_result = [x for x in cipher_gen.encrypt(bytes(text))]
+
+        expected_result_json = {"ciphertext": expected_result, "ciphertext_length": 16}
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_aes_batch_daisy_chain(self):
+        for num_segments in num_segments_list:
+            # Note that setting this to false gives errors for production chips
+            masking = True
+            key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            actual_result = sca_aes_functions.char_aes_batch_daisy_chain(
+                target, iterations, num_segments, fpga, masking, key, text
+            )
+            actual_result_json = json.loads(actual_result)
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            for _ in range(iterations):
+                chained_text = text
+                for __ in range(num_segments):
+                    chained_text = [x for x in cipher_gen.encrypt(bytes(chained_text))]
+
+            expected_result_json = {
+                "ciphertext": chained_text,
+                "ciphertext_length": len(chained_text),
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_aes_batch_fvsr_data(self):
+        for num_segments in num_segments_list:
+            # Note that setting this to false gives errors for production chips
+            masking = True
+            key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            actual_result = sca_aes_functions.char_aes_batch_fvsr_data(
+                target, iterations, num_segments, fpga, masking, key, text
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_data = text
+                    else:
+                        batch_data = [random.randint(0, 255) for _ in range(len(text))]
+                    sample_fixed = random.randint(0, 255) & 0x1
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            expected_result = [x for x in cipher_gen.encrypt(bytes(batch_data))]
+
+            expected_result_json = {
+                "ciphertext": expected_result,
+                "ciphertext_length": len(expected_result),
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_aes_batch_fvsr_key(self):
+        for num_segments in num_segments_list:
+            masking = True
+            key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            actual_result = sca_aes_functions.char_aes_batch_fvsr_key(
+                target, iterations, num_segments, fpga, masking, key
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_key = key
+                    else:
+                        batch_key = [random.randint(0, 255) for _ in range(len(key))]
+                    batch_data = [random.randint(0, 255) for _ in range(16)]
+                    sample_fixed = random.randint(0, 255) & 0x1
+
+            cipher_gen = AES.new(bytes(batch_key), AES.MODE_ECB)
+            expected_result = [x for x in cipher_gen.encrypt(bytes(batch_data))]
+
+            expected_result_json = {
+                "ciphertext": expected_result,
+                "ciphertext_length": len(expected_result),
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_aes_batch_random(self):
+        for num_segments in num_segments_list:
+            masking = True
+            key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+            actual_result = sca_aes_functions.char_aes_batch_random(
+                target, iterations, num_segments, fpga, masking, key
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = [random.randint(0, 255) for _ in range(16)]
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            expected_result = [x for x in cipher_gen.encrypt(bytes(batch_data))]
+
+            expected_result_json = {
+                "ciphertext": expected_result,
+                "ciphertext_length": len(expected_result),
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_asym_cryptolib_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_asym_cryptolib_python_test.py
new file mode 100644
index 0000000000000..f070f401659f7
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_asym_cryptolib_python_test.py
@@ -0,0 +1,366 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import (
+    sca_asym_cryptolib_functions,
+)
+from sw.host.penetrationtests.python.sca.communication.sca_asym_cryptolib_commands import (
+    OTAsymCrypto,
+)
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+import unittest
+import argparse
+import sys
+from Crypto.PublicKey import RSA, ECC
+from Crypto.Signature import pkcs1_15, DSS
+from Crypto.Hash import SHA256, SHA384
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class AsymCryptoScaTest(unittest.TestCase):
+
+    def test_init(self):
+        asymsca = OTAsymCrypto(target)
+        device_id, owner_page, boot_log, boot_measurements, version = asymsca.init()
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_rsa_sign(self):
+        n_len = 256
+        key = RSA.generate(2048)
+        e = key.e
+        d = [x for x in (key.d).to_bytes(256, "little")]
+        n = [x for x in (key.n).to_bytes(256, "little")]
+        data_len = 13
+        data = [random.randint(0, 255) for _ in range(data_len)]
+        cfg = 0
+        trigger = 0
+        hashing = 0
+        padding = 0
+
+        actual_result = sca_asym_cryptolib_functions.char_rsa_sign(
+            target,
+            iterations,
+            data,
+            data_len,
+            e,
+            n,
+            n_len,
+            d,
+            padding,
+            hashing,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("sig")
+
+        expected_result_json = {
+            "status": 0,
+            "d": utils.pad_with_zeros(d, 512),
+            "n": utils.pad_with_zeros(n, 512),
+            "n_len": 256,
+            "sig_len": 256,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        signature = actual_result_json["sig"]
+        signature = signature[:256]
+        signature.reverse()
+        h_verified = SHA256.new(bytes(data))
+        verifier = pkcs1_15.new(key.public_key())
+        verifier.verify(h_verified, bytes(signature))
+
+    def test_char_p256_ecdh(self):
+        private_key = ECC.generate(curve="P-256")
+        private_key_array = [x for x in private_key.d.to_bytes(32, "little")]
+        key = ECC.generate(curve="P-256")
+        public_point = key.pointQ
+        public_x = [x for x in public_point.x.to_bytes(32, "little")]
+        public_y = [x for x in public_point.y.to_bytes(32, "little")]
+        cfg = 0
+        trigger = 0
+
+        actual_result = sca_asym_cryptolib_functions.char_p256_ecdh(
+            target,
+            iterations,
+            private_key_array,
+            public_x,
+            public_y,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        shared_secret_point = key.pointQ * private_key.d
+        shared_secret_point = [x for x in shared_secret_point.x.to_bytes(32, "little")]
+
+        expected_result_json = {
+            "status": 0,
+            "shared_key": shared_secret_point,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p256_sign(self):
+        key = ECC.generate(curve="P-256")
+        scalar = [x for x in key.d.to_bytes(32, "little")]
+        pubx = [x for x in key.pointQ.x.to_bytes(32, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(32, "little")]
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA256.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+        cfg = 0
+        trigger = 0
+
+        actual_result = sca_asym_cryptolib_functions.char_p256_sign(
+            target,
+            iterations,
+            scalar,
+            pubx,
+            puby,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("r")
+        sign_ignored_keys_set.add("s")
+        sign_ignored_keys_set.add("pubx")
+        sign_ignored_keys_set.add("puby")
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        verifier = DSS.new(key.public_key(), "fips-186-3")
+        r = actual_result_json["r"]
+        s = actual_result_json["s"]
+        r.reverse()
+        s.reverse()
+        signature = r + s
+        verifier.verify(h, bytes(signature))
+
+    def test_char_p384_ecdh(self):
+        private_key = ECC.generate(curve="P-384")
+        private_key_array = [x for x in private_key.d.to_bytes(48, "little")]
+        key = ECC.generate(curve="P-384")
+        public_point = key.pointQ
+        public_x = [x for x in public_point.x.to_bytes(48, "little")]
+        public_y = [x for x in public_point.y.to_bytes(48, "little")]
+        cfg = 0
+        trigger = 0
+
+        actual_result = sca_asym_cryptolib_functions.char_p384_ecdh(
+            target,
+            iterations,
+            private_key_array,
+            public_x,
+            public_y,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        shared_secret_point = key.pointQ * private_key.d
+        shared_secret_point = [x for x in shared_secret_point.x.to_bytes(48, "little")]
+
+        expected_result_json = {
+            "status": 0,
+            "shared_key": shared_secret_point,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_p384_sign(self):
+        key = ECC.generate(curve="P-384")
+        scalar = [x for x in key.d.to_bytes(48, "little")]
+        pubx = [x for x in key.pointQ.x.to_bytes(48, "little")]
+        puby = [x for x in key.pointQ.y.to_bytes(48, "little")]
+        message = [random.randint(0, 255) for _ in range(16)]
+        h = SHA384.new(bytes(message))
+        message_digest = [x for x in h.digest()]
+        cfg = 0
+        trigger = 0
+
+        actual_result = sca_asym_cryptolib_functions.char_p384_sign(
+            target,
+            iterations,
+            scalar,
+            pubx,
+            puby,
+            message_digest,
+            cfg,
+            trigger,
+        )
+        actual_result_json = json.loads(actual_result)
+
+        sign_ignored_keys_set = ignored_keys_set.copy()
+        sign_ignored_keys_set.add("r")
+        sign_ignored_keys_set.add("s")
+        sign_ignored_keys_set.add("pubx")
+        sign_ignored_keys_set.add("puby")
+
+        expected_result_json = {
+            "status": 0,
+            "cfg": 0,
+        }
+
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, sign_ignored_keys_set
+        )
+
+        verifier = DSS.new(key.public_key(), "fips-186-3")
+        r = actual_result_json["r"]
+        s = actual_result_json["s"]
+        r.reverse()
+        s.reverse()
+        signature = r + s
+        verifier.verify(h, bytes(signature))
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation("lowrisc_opentitan/" + BITSTREAM)
+    # Get the firmware path.
+    firmware_path = r.Rlocation("lowrisc_opentitan/" + BOOTSTRAP)
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args,
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_hmac_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_hmac_python_test.py
new file mode 100644
index 0000000000000..ca926933d52f9
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_hmac_python_test.py
@@ -0,0 +1,359 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_hmac_functions
+from sw.host.penetrationtests.python.sca.communication.sca_hmac_commands import OTHMAC
+from python.runfiles import Runfiles
+import random
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+from Crypto.Hash import HMAC, SHA256
+import unittest
+import argparse
+import sys
+
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class HmacScaTest(unittest.TestCase):
+
+    def test_init(self):
+        hmacsca = OTHMAC(target)
+        device_id, owner_page, boot_log, boot_measurements, version = hmacsca.init()
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_hmac_single(self):
+        key = [
+            0,
+            1,
+            2,
+            3,
+            4,
+            5,
+            6,
+            7,
+            8,
+            9,
+            10,
+            11,
+            12,
+            13,
+            14,
+            15,
+            0,
+            1,
+            2,
+            3,
+            4,
+            5,
+            6,
+            7,
+            8,
+            9,
+            10,
+            11,
+            12,
+            13,
+            14,
+            15,
+        ]
+        text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        trigger = 0
+        actual_result = sca_hmac_functions.char_hmac_single(
+            target, iterations, trigger, key, text
+        )
+        actual_result_json = json.loads(actual_result)
+
+        hmac = HMAC.new(key=bytes(key), digestmod=SHA256)
+        hmac.update(bytes(text))
+        expected_result = [x for x in bytearray(hmac.digest())]
+
+        expected_result_json = {
+            "tag": expected_result,
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_hmac_daisy_chain(self):
+        for num_segments in num_segments_list:
+            key = [
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+            ]
+            text = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+            trigger = 0
+            actual_result = sca_hmac_functions.char_hmac_daisy_chain(
+                target, iterations, num_segments, trigger, key, text
+            )
+            actual_result_json = json.loads(actual_result)
+
+            for __ in range(num_segments):
+                hmac = HMAC.new(key=bytes(key), digestmod=SHA256)
+                hmac.update(bytes(text))
+                inter = [x for x in bytearray(hmac.digest())]
+                text = inter[:16]
+
+            expected_result_json = {
+                "tag": inter,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_hmac_random_batch(self):
+        for num_segments in num_segments_list:
+            trigger = 0
+            actual_result = sca_hmac_functions.char_hmac_random_batch(
+                target, iterations, num_segments, trigger
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_key = [random.randint(0, 255) for _ in range(32)]
+                    batch_data = [random.randint(0, 255) for _ in range(16)]
+
+            hmac = HMAC.new(key=bytes(batch_key), digestmod=SHA256)
+            hmac.update(bytes(batch_data))
+            expected_result = [x for x in bytearray(hmac.digest())]
+
+            expected_result_json = {
+                "tag": expected_result,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_hmac_fvsr_batch(self):
+        for num_segments in num_segments_list:
+            key = [
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+                0,
+            ]
+            trigger = 0
+            actual_result = sca_hmac_functions.char_hmac_fvsr_batch(
+                target, iterations, num_segments, trigger, key
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_key = key
+                    else:
+                        batch_key = [random.randint(0, 255) for _ in range(32)]
+                    batch_data = [random.randint(0, 255) for _ in range(16)]
+                    sample_fixed = batch_data[0] & 0x1
+
+            hmac = HMAC.new(key=bytes(batch_key), digestmod=SHA256)
+            hmac.update(bytes(batch_data))
+            expected_result = [x for x in bytearray(hmac.digest())]
+
+            expected_result_json = {
+                "tag": expected_result,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_ibex_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_ibex_python_test.py
new file mode 100644
index 0000000000000..0c7d1a192787d
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_ibex_python_test.py
@@ -0,0 +1,784 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_ibex_functions
+from sw.host.penetrationtests.python.sca.communication.sca_ibex_commands import OTIbex
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class IbexScaTest(unittest.TestCase):
+
+    def test_init(self):
+        ibexsca = OTIbex(target)
+        device_id, owner_page, boot_log, boot_measurements, version = ibexsca.init()
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_combi_operations_batch(self):
+        for num_segments in num_segments_list:
+            trigger = 0
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            expected_result_json = json.loads('{"result":[0,0,0,0,0,0,0,0,0,0,0,0]}')
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            trigger = 32
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            xor = fixed_data1 ^ fixed_data2
+            add = (fixed_data1 + fixed_data2) & 0xFFFFFFFF
+            sub = (fixed_data1 - fixed_data2) & 0xFFFFFFFF
+            shift_operand = (fixed_data2 & 0xFFFFFFFF) % 32
+            shift = (fixed_data1 << shift_operand) & 0xFFFFFFFF | (
+                fixed_data1 >> (32 - shift_operand) & 0xFFFFFFFF
+            )
+            mult = (fixed_data1 * fixed_data2) & 0xFFFFFFFF
+            if fixed_data2 == 0:
+                div = 0xFFFFFFFF
+            elif (
+                utils.to_signed32(fixed_data1) == -2147483648 and
+                utils.to_signed32(fixed_data2) == -1
+            ):
+                div = 0x80000000
+            else:
+                div = (
+                    int(utils.to_signed32(fixed_data1) / utils.to_signed32(fixed_data2)) &
+                    0xFFFFFFFF
+                )
+
+            expected_result_json = {"result": [0, 0, 0, 0, 0, div, 0, 0, 0, 0, 0, 0]}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            trigger = 256
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            expected_result_json = {
+                "result": [0, 0, 0, 0, 0, 0, 0, 0, fixed_data2, 0, 0, 0]
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            trigger = 4095
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            xor = fixed_data1 ^ fixed_data2
+            add = (fixed_data1 + fixed_data2) & 0xFFFFFFFF
+            sub = (fixed_data1 - fixed_data2) & 0xFFFFFFFF
+            shift_operand = (fixed_data2 & 0xFFFFFFFF) % 32
+            shift = (fixed_data1 << shift_operand) & 0xFFFFFFFF | (
+                fixed_data1 >> (32 - shift_operand) & 0xFFFFFFFF
+            )
+            mult = (fixed_data1 * fixed_data2) & 0xFFFFFFFF
+            if fixed_data2 == 0:
+                div = 0xFFFFFFFF
+            elif (
+                utils.to_signed32(fixed_data1) == -2147483648 and
+                utils.to_signed32(fixed_data2) == -1
+            ):
+                div = 0x80000000
+            else:
+                div = (
+                    int(utils.to_signed32(fixed_data1) / utils.to_signed32(fixed_data2)) &
+                    0xFFFFFFFF
+                )
+
+            expected_result_json = {
+                "result": [
+                    xor,
+                    add,
+                    sub,
+                    shift,
+                    mult,
+                    div,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data2,
+                    fixed_data2,
+                    fixed_data2,
+                    fixed_data2,
+                ]
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_combi_operations_batch_fvsr(self):
+        for num_segments in num_segments_list:
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            trigger = 0
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch_fvsr(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data1 = fixed_data1
+                    else:
+                        batch_data1 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data2 = fixed_data2
+                    else:
+                        batch_data2 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+            expected_result_json = json.loads('{"result":[0,0,0,0,0,0,0,0,0,0,0,0]}')
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            trigger = 32
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch_fvsr(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data1 = fixed_data1
+                    else:
+                        batch_data1 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data2 = fixed_data2
+                    else:
+                        batch_data2 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+            batch_data1 = utils.to_signed32(batch_data1)
+            batch_data2 = utils.to_signed32(batch_data2)
+            if batch_data2 == 0:
+                div = 0xFFFFFFFF
+            elif batch_data1 == -2147483648 and batch_data2 == -1:
+                div = 0x80000000
+            else:
+                div = int(batch_data1 / batch_data2) & 0xFFFFFFFF
+
+            expected_result_json = {"result": [0, 0, 0, 0, 0, div, 0, 0, 0, 0, 0, 0]}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            trigger = 256
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch_fvsr(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data1 = fixed_data1
+                    else:
+                        batch_data1 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data2 = fixed_data2
+                    else:
+                        batch_data2 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+            expected_result_json = {
+                "result": [0, 0, 0, 0, 0, 0, 0, 0, batch_data2, 0, 0, 0]
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            trigger = 4095
+            fixed_data1 = 11
+            fixed_data2 = 11
+            actual_result = sca_ibex_functions.char_combi_operations_batch_fvsr(
+                target,
+                iterations,
+                num_segments,
+                trigger,
+                fixed_data1,
+                fixed_data2,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data1 = fixed_data1
+                    else:
+                        batch_data1 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data2 = fixed_data2
+                    else:
+                        batch_data2 = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+
+            xor = batch_data1 ^ batch_data2
+            add = (batch_data1 + batch_data2) & 0xFFFFFFFF
+            sub = (batch_data1 - batch_data2) & 0xFFFFFFFF
+            shift_operand = (batch_data2 & 0xFFFFFFFF) % 32
+            shift = (batch_data1 << shift_operand) & 0xFFFFFFFF | (
+                batch_data1 >> (32 - shift_operand) & 0xFFFFFFFF
+            )
+            mult = (batch_data1 * batch_data2) & 0xFFFFFFFF
+            if batch_data2 == 0:
+                div = 0xFFFFFFFF
+            elif (
+                utils.to_signed32(batch_data1) == -2147483648 and
+                utils.to_signed32(batch_data2) == -1
+            ):
+                div = 0x80000000
+            else:
+                div = (
+                    int(utils.to_signed32(batch_data1) / utils.to_signed32(batch_data2)) &
+                    0xFFFFFFFF
+                )
+
+            expected_result_json = {
+                "result": [
+                    xor,
+                    add,
+                    sub,
+                    shift,
+                    mult,
+                    div,
+                    batch_data1,
+                    batch_data1,
+                    batch_data2,
+                    batch_data2,
+                    batch_data2,
+                    batch_data2,
+                ]
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            return True
+
+    def test_char_register_file_read(self):
+        data = [7, 6, 5, 4, 3, 2, 1, 0]
+        actual_result = sca_ibex_functions.char_register_file_read(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads('{"result":0}')
+        utils.compare_json_data(actual_result_json, expected_result_json, ignored_keys_set)
+
+    def test_char_register_file_read_batch_fvsr(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_register_file_read_batch_fvsr(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_register_file_read_batch_random(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_register_file_read_batch_random(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_register_file_write(self):
+        data = [7, 6, 5, 4, 3, 2, 1, 0]
+        actual_result = sca_ibex_functions.char_register_file_write(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads('{"result":0}')
+        utils.compare_json_data(actual_result_json, expected_result_json, ignored_keys_set)
+
+    def test_char_register_file_write_batch_fvsr(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_register_file_write_batch_fvsr(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_register_file_write_batch_random(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_register_file_write_batch_random(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                # We generate random data
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_read(self):
+        data = [255, 255, 255, 0, 0, 0, 0, 0]
+        actual_result = sca_ibex_functions.char_tl_read(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads('{"result":0}')
+        utils.compare_json_data(actual_result_json, expected_result_json, ignored_keys_set)
+
+    def test_char_tl_read_batch_fvsr(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_tl_read_batch_fvsr(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_read_batch_fvsr_fix_address(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_tl_read_batch_fvsr_fix_address(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_read_batch_random(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_tl_read_batch_random(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_read_batch_random_fix_address(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_tl_read_batch_random_fix_address(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_write(self):
+        data = [255, 255, 255, 0, 0, 0, 0, 0]
+        actual_result = sca_ibex_functions.char_tl_write(target, iterations, data)
+        actual_result_json = json.loads(actual_result)
+        expected_result_json = json.loads('{"result":0}')
+        utils.compare_json_data(actual_result_json, expected_result_json, ignored_keys_set)
+
+    def test_char_tl_write_batch_fvsr(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_tl_write_batch_fvsr(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_write_batch_fvsr_fix_address(self):
+        for num_segments in num_segments_list:
+            fixed_data = 2048
+            actual_result = sca_ibex_functions.char_tl_write_batch_fvsr_fix_address(
+                target, iterations, fixed_data, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = True
+                for __ in range(num_segments):
+                    if sample_fixed:
+                        batch_data = fixed_data
+                    else:
+                        batch_data = random.getrandbits(32)
+                    sample_fixed = random.getrandbits(32) & 0x1
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_write_batch_random(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_tl_write_batch_random(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_tl_write_batch_random_fix_address(self):
+        for num_segments in num_segments_list:
+            actual_result = sca_ibex_functions.char_tl_write_batch_random_fix_address(
+                target, iterations, num_segments
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            for _ in range(iterations):
+                for __ in range(num_segments):
+                    batch_data = random.getrandbits(32)
+            expected_result_json = {"result": batch_data}
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_kmac_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_kmac_python_test.py
new file mode 100644
index 0000000000000..9c5e70d5f2e4e
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_kmac_python_test.py
@@ -0,0 +1,236 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_kmac_functions
+from sw.host.penetrationtests.python.sca.communication.sca_kmac_commands import OTKMAC
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+from Crypto.Hash import KMAC128
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 12]
+# For testing, we only use the software trigger
+fpga = 0
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+# The KMAC implementation on the testOS works in a stateful way
+# so we reset between tests
+class KmacScaTest(unittest.TestCase):
+
+    def test_init(self):
+        kmacsca = OTKMAC(target)
+        device_id, owner_page, boot_log, boot_measurements, version = kmacsca.init(fpga)
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_kmac_single(self):
+        key = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        masking = True
+        actual_result = sca_kmac_functions.char_kmac_single(
+            target, iterations, fpga, masking, key, text, reset=True
+        )
+        actual_result_json = json.loads(actual_result)
+
+        mac = KMAC128.new(key=bytes(key), mac_len=32)
+        mac.update(bytes(text))
+        tag = bytearray(mac.digest())
+        expected_result = [x for x in tag]
+
+        expected_result_json = {
+            "batch_digest": expected_result,
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_kmac_batch_daisy_chain(self):
+        for num_segments in num_segments_list:
+            key = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+            text = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+            masking = True
+            actual_result = sca_kmac_functions.char_kmac_batch_daisy_chain(
+                target, iterations, num_segments, fpga, masking, key, text, reset=True
+            )
+            actual_result_json = json.loads(actual_result)
+
+            for i in range(num_segments):
+                mac = KMAC128.new(key=bytes(key), mac_len=32)
+                mac.update(bytes(text))
+                digest = [x for x in bytearray(mac.digest())]
+                text = digest[:16]
+
+            expected_result_json = {
+                "digest": text,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_kmac_batch(self):
+        for num_segments in num_segments_list:
+            key = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+            masking = True
+            actual_result = sca_kmac_functions.char_kmac_batch(
+                target, iterations, num_segments, fpga, masking, key
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            sample_fixed = 0
+            for _ in range(iterations):
+                xor_tag = [0 for _ in range(32)]
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_key = key
+                    else:
+                        batch_key = [random.randint(0, 255) for _ in range(16)]
+                    batch_data = [random.randint(0, 255) for _ in range(16)]
+                    sample_fixed = batch_data[0] & 0x1
+
+                    mac = KMAC128.new(key=bytes(batch_key), mac_len=32)
+                    mac.update(bytes(batch_data))
+                    tag = [x for x in bytearray(mac.digest())]
+                    xor_tag = [xor_tag[i] ^ tag[i] for i in range(32)]
+
+            expected_result_json = {
+                "batch_digest": xor_tag,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_otbn_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_otbn_python_test.py
new file mode 100644
index 0000000000000..accb1513b009e
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_otbn_python_test.py
@@ -0,0 +1,388 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_otbn_functions
+from sw.host.penetrationtests.python.sca.communication.sca_otbn_commands import OTOTBN
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class OtbnScaTest(unittest.TestCase):
+
+    def test_init(self):
+        otbnsca = OTOTBN(target)
+        device_id, owner_page, boot_log, boot_measurements, version = otbnsca.init()
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_combi_operations_batch(self):
+        for num_segments in num_segments_list:
+            trigger = 3
+            fixed_data1 = 0
+            fixed_data2 = 0
+            print_flag = True
+            actual_result = sca_otbn_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                fixed_data1,
+                fixed_data2,
+                print_flag,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            fixed_data_array1 = [fixed_data1 for _ in range(8)]
+            fixed_data_array2 = [fixed_data2 for _ in range(8)]
+            add = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) + utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            sub = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) - utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            xor = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) ^ utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            shift = utils.int_to_array((utils.array_to_int(fixed_data_array1) << 1) % (1 << 256))
+            fixed_data_array1 = [fixed_data1, fixed_data1, 0, 0, 0, 0, 0, 0]
+            fixed_data_array2 = [fixed_data2, fixed_data2, 0, 0, 0, 0, 0, 0]
+            mult = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) * utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            FG = 0
+            if fixed_data1 == fixed_data2:
+                FG += 8
+            if fixed_data1 < fixed_data2:
+                FG += 1
+            if sub[0] & 0x1:
+                FG += 4
+            if (utils.array_to_int(sub) >> 255) & 0x1:
+                FG += 2
+
+            expected_result_json = {
+                "result1": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result2": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result3": add,
+                "result4": sub,
+                "result5": xor,
+                "result6": shift,
+                "result7": mult,
+                "result8": FG,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            fixed_data1 = 1
+            fixed_data2 = 1
+            print_flag = True
+            actual_result = sca_otbn_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                fixed_data1,
+                fixed_data2,
+                print_flag,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            fixed_data_array1 = [fixed_data1 for _ in range(8)]
+            fixed_data_array2 = [fixed_data2 for _ in range(8)]
+            add = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) + utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            sub = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) - utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            xor = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) ^ utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            shift = utils.int_to_array((utils.array_to_int(fixed_data_array1) << 1) % (1 << 256))
+            fixed_data_array1 = [fixed_data1, fixed_data1, 0, 0, 0, 0, 0, 0]
+            fixed_data_array2 = [fixed_data2, fixed_data2, 0, 0, 0, 0, 0, 0]
+            mult = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) * utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            FG = 0
+            if fixed_data1 == fixed_data2:
+                FG += 8
+            if fixed_data1 < fixed_data2:
+                FG += 1
+            if sub[0] & 0x1:
+                FG += 4
+            if (utils.array_to_int(sub) >> 255) & 0x1:
+                FG += 2
+
+            expected_result_json = {
+                "result1": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result2": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result3": add,
+                "result4": sub,
+                "result5": xor,
+                "result6": shift,
+                "result7": mult,
+                "result8": FG,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+            fixed_data1 = random.getrandbits(32)
+            fixed_data2 = random.getrandbits(32)
+            print_flag = True
+            actual_result = sca_otbn_functions.char_combi_operations_batch(
+                target,
+                iterations,
+                num_segments,
+                fixed_data1,
+                fixed_data2,
+                print_flag,
+                trigger,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Calculate the expected result
+            fixed_data_array1 = [fixed_data1 for _ in range(8)]
+            fixed_data_array2 = [fixed_data2 for _ in range(8)]
+            add = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) + utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            sub = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) - utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            xor = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) ^ utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            shift = utils.int_to_array((utils.array_to_int(fixed_data_array1) << 1) % (1 << 256))
+            fixed_data_array1 = [fixed_data1, fixed_data1, 0, 0, 0, 0, 0, 0]
+            fixed_data_array2 = [fixed_data2, fixed_data2, 0, 0, 0, 0, 0, 0]
+            mult = utils.int_to_array(
+                (utils.array_to_int(fixed_data_array1) * utils.array_to_int(fixed_data_array2))
+                % (1 << 256)
+            )
+            FG = 0
+            if fixed_data1 == fixed_data2:
+                FG += 8
+            if fixed_data1 < fixed_data2:
+                FG += 1
+            if sub[0] & 0x1:
+                FG += 4
+            if (utils.array_to_int(sub) >> 255) & 0x1:
+                FG += 2
+
+            expected_result_json = {
+                "result1": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result2": [
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                    fixed_data1,
+                ],
+                "result3": add,
+                "result4": sub,
+                "result5": xor,
+                "result6": shift,
+                "result7": mult,
+                "result8": FG,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_sha3_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_sha3_python_test.py
new file mode 100644
index 0000000000000..31cad1feb38f4
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_sha3_python_test.py
@@ -0,0 +1,211 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_sha3_functions
+from sw.host.penetrationtests.python.sca.communication.sca_sha3_commands import OTSHA3
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+from Crypto.Hash import SHA3_256
+import unittest
+import argparse
+import sys
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+# For testing, we only use the software trigger
+fpga = 0
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+# The Sha3 implementation on the testOS works in a stateful way
+# so we reset between tests
+class Sha3ScaTest(unittest.TestCase):
+
+    def test_init(self):
+        sha3sca = OTSHA3(target)
+        device_id, owner_page, boot_log, boot_measurements, version = sha3sca.init(fpga)
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_sha3_single_absorb(self):
+        text = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
+        masking = True
+        actual_result = sca_sha3_functions.char_sha3_single_absorb(
+            target, iterations, fpga, masking, text, reset=True
+        )
+        actual_result_json = json.loads(actual_result)
+
+        mac = SHA3_256.new()
+        mac.update(bytes(text))
+        tag = bytearray(mac.digest())
+        expected_result = [x for x in tag]
+
+        expected_result_json = {
+            "batch_digest": expected_result,
+        }
+        utils.compare_json_data(
+            actual_result_json, expected_result_json, ignored_keys_set
+        )
+
+    def test_char_sha3_batch_absorb(self):
+        for num_segments in num_segments_list:
+            text = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0]
+            masking = True
+            actual_result = sca_sha3_functions.char_sha3_batch_absorb(
+                target, iterations, num_segments, fpga, masking, text
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Seed the synchronized randomness with the same seed as in the chip which is 1
+            random.seed(1)
+
+            # Generate the batch data
+            sample_fixed = 0
+            for _ in range(iterations):
+                xor_tag = [0 for _ in range(32)]
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_data = text
+                    else:
+                        batch_data = [random.randint(0, 255) for _ in range(16)]
+                    dummy = [random.randint(0, 255) for _ in range(16)]
+                    sample_fixed = dummy[0] & 0x1
+                    mac = SHA3_256.new()
+                    mac.update(bytes(batch_data))
+                    tag = [x for x in bytearray(mac.digest())]
+                    xor_tag = [xor_tag[i] ^ tag[i] for i in range(32)]
+
+            expected_result_json = {
+                "batch_digest": xor_tag,
+            }
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation(
+            "lowrisc_opentitan/" + BITSTREAM
+        )
+    # Get the firmware path.
+    firmware_path = r.Rlocation(
+        "lowrisc_opentitan/" + BOOTSTRAP
+    )
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/sca/test_scripts/sca_sym_cryptolib_python_test.py b/sw/host/penetrationtests/python/sca/test_scripts/sca_sym_cryptolib_python_test.py
new file mode 100644
index 0000000000000..02336186dda36
--- /dev/null
+++ b/sw/host/penetrationtests/python/sca/test_scripts/sca_sym_cryptolib_python_test.py
@@ -0,0 +1,551 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from sw.host.penetrationtests.python.sca.host_scripts import sca_sym_cryptolib_functions
+from sw.host.penetrationtests.python.sca.communication.sca_sym_cryptolib_commands import (
+    OTSymCrypto,
+)
+from python.runfiles import Runfiles
+from sw.host.penetrationtests.python.util import targets
+from sw.host.penetrationtests.python.util import utils
+import json
+import random
+import unittest
+import argparse
+import sys
+from Crypto.Hash import SHA256, HMAC
+from Crypto.Cipher import AES
+
+ignored_keys_set = set([])
+opentitantool_path = ""
+iterations = 2
+num_segments_list = [1, 5, 12]
+
+target = None
+
+# Read in the extra arguments from the opentitan_test.
+parser = argparse.ArgumentParser()
+parser.add_argument("--bitstream", type=str)
+parser.add_argument("--bootstrap", type=str)
+
+args, config_args = parser.parse_known_args()
+
+BITSTREAM = args.bitstream
+BOOTSTRAP = args.bootstrap
+
+
+class SymCryptoScaTest(unittest.TestCase):
+
+    def test_init(self):
+        symsca = OTSymCrypto(target)
+        device_id, owner_page, boot_log, boot_measurements, version = symsca.init()
+        device_id_json = json.loads(device_id)
+        owner_page_json = json.loads(owner_page)
+        boot_log_json = json.loads(boot_log)
+        boot_measurements_json = json.loads(boot_measurements)
+
+        expected_device_id_keys = {
+            "device_id",
+            "rom_digest",
+            "icache_en",
+            "dummy_instr_en",
+            "clock_jitter_locked",
+            "clock_jitter_en",
+            "sram_main_readback_locked",
+            "sram_main_readback_en",
+            "sram_ret_readback_locked",
+            "sram_ret_readback_en",
+            "data_ind_timing_en",
+        }
+        actual_device_id_keys = set(device_id_json.keys())
+
+        self.assertEqual(
+            expected_device_id_keys,
+            actual_device_id_keys,
+            "device_id keys do not match",
+        )
+
+        expected_owner_page_keys = {
+            "config_version",
+            "sram_exec_mode",
+            "ownership_key_alg",
+            "update_mode",
+            "min_security_version_bl0",
+            "lock_constraint",
+        }
+        actual_owner_page_keys = set(owner_page_json.keys())
+
+        self.assertEqual(
+            expected_owner_page_keys,
+            actual_owner_page_keys,
+            "owner_page keys do not match",
+        )
+
+        expected_boot_log_keys = {
+            "digest",
+            "identifier",
+            "scm_revision_low",
+            "scm_revision_high",
+            "rom_ext_slot",
+            "rom_ext_major",
+            "rom_ext_minor",
+            "rom_ext_size",
+            "bl0_slot",
+            "ownership_state",
+            "ownership_transfers",
+            "rom_ext_min_sec_ver",
+            "bl0_min_sec_ver",
+            "primary_bl0_slot",
+            "retention_ram_initialized",
+        }
+        actual_boot_log_keys = set(boot_log_json.keys())
+
+        self.assertEqual(
+            expected_boot_log_keys, actual_boot_log_keys, "boot_log keys do not match"
+        )
+
+        expected_boot_measurements_keys = {"bl0", "rom_ext"}
+        actual_boot_measurements_keys = set(boot_measurements_json.keys())
+
+        self.assertEqual(
+            expected_boot_measurements_keys,
+            actual_boot_measurements_keys,
+            "boot_measurements keys do not match",
+        )
+
+        self.assertIn("PENTEST", version)
+
+    def test_char_aes_fvsr_plaintext(self):
+        for num_segments in num_segments_list:
+            # For testing, we just take a multiple of the block size
+            data_len = random.randint(1, 3)
+            data_len *= 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            op_enc = True
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode (no padding) and the first mode (ECB)
+            padding = 0
+            mode = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_aes_fvsr_plaintext(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                iv,
+                padding,
+                mode,
+                op_enc,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_data = data
+                    else:
+                        batch_data = [random.randint(0, 255) for _ in range(len(data))]
+                    sample_fixed = random.randint(0, 255) & 0x1
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            expected_result = utils.pad_with_zeros(
+                [x for x in cipher_gen.encrypt(bytes(batch_data))], 64
+            )
+            expected_result_json = {
+                "status": 0,
+                "data": expected_result,
+                "data_len": data_len,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_aes_daisy(self):
+        for num_segments in num_segments_list:
+            # For daisy chaining, you can only take 1 block
+            data_len = 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            op_enc = True
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode (no padding) and the first mode (ECB)
+            padding = 0
+            mode = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_aes_daisy(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                iv,
+                padding,
+                mode,
+                op_enc,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_ECB)
+            for _ in range(iterations):
+                chained_text = data
+                for __ in range(num_segments):
+                    chained_text = [x for x in cipher_gen.encrypt(bytes(chained_text))]
+
+            expected_result_json = {
+                "status": 0,
+                "data": utils.pad_with_zeros(chained_text, 64),
+                "data_len": data_len,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_gcm_fvsr_plaintext(self):
+        for num_segments in num_segments_list:
+            # For testing, we just take a multiple of the block size
+            data_len = random.randint(1, 3)
+            data_len *= 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            aad_len = random.randint(1, 64)
+            aad = [random.randint(0, 255) for _ in range(aad_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            cfg = 0
+            trigger = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_gcm_fvsr_plaintext(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                aad,
+                aad_len,
+                iv,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_data = data
+                    else:
+                        batch_data = [random.randint(0, 255) for _ in range(len(data))]
+                    sample_fixed = random.randint(0, 255) & 0x1
+
+            cipher_gen = AES.new(bytes(key), AES.MODE_GCM, bytes(iv))
+            cipher_gen.update(bytes(aad))
+            expected_ciphertext, expected_tag = cipher_gen.encrypt_and_digest(
+                bytes(batch_data)
+            )
+            expected_ciphertext = utils.pad_with_zeros(
+                [x for x in expected_ciphertext], 64
+            )
+            expected_tag = utils.pad_with_zeros([x for x in expected_tag], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_ciphertext,
+                "data_len": data_len,
+                "tag": expected_tag,
+                "tag_len": 16,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_gcm_daisy(self):
+        for num_segments in num_segments_list:
+            # For daisy chaining, we work with 1 block
+            data_len = 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            aad_len = random.randint(1, 64)
+            aad = [random.randint(0, 255) for _ in range(aad_len)]
+            key_len_idx = random.randint(0, 2)
+            if key_len_idx == 0:
+                key_len = 16
+            elif key_len_idx == 1:
+                key_len = 24
+            else:
+                key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            iv = [random.randint(0, 255) for _ in range(16)]
+            cfg = 0
+            trigger = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_gcm_daisy(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                aad,
+                aad_len,
+                iv,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            for _ in range(iterations):
+                chained_text = data
+                for __ in range(num_segments):
+                    cipher_gen = AES.new(bytes(key), AES.MODE_GCM, bytes(iv))
+                    cipher_gen.update(bytes(aad))
+                    ciphertext, tag = cipher_gen.encrypt_and_digest(bytes(chained_text))
+                    chained_text = [x for x in ciphertext]
+
+            expected_ciphertext = utils.pad_with_zeros([x for x in chained_text], 64)
+            expected_tag = utils.pad_with_zeros([x for x in tag], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_ciphertext,
+                "data_len": data_len,
+                "tag": expected_tag,
+                "tag_len": 16,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_hmac_fvsr_plaintext(self):
+        for num_segments in num_segments_list:
+            data_len = 32
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            # We only test SHA256
+            key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode and the first mode (HMAC)
+            padding = 0
+            mode = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_hmac_fvsr_plaintext(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                padding,
+                mode,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            # Set the synchronized randomness
+            batch_prng_seed = 1
+            random.seed(batch_prng_seed)
+            # Generate the batch data
+            for _ in range(iterations):
+                sample_fixed = 1
+                for __ in range(num_segments):
+                    if sample_fixed == 1:
+                        batch_data = data
+                    else:
+                        batch_data = [random.randint(0, 255) for _ in range(len(data))]
+                    sample_fixed = random.randint(0, 255) & 0x1
+
+            sha256 = HMAC.new(key=bytes(key), digestmod=SHA256)
+            sha256.update(bytes(batch_data))
+            expected_result = [x for x in sha256.digest()]
+            # Pad the rest with zero
+            expected_result = utils.pad_with_zeros([x for x in expected_result], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_result,
+                "data_len": 32,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_hmac_daisy(self):
+        for num_segments in num_segments_list:
+            data_len = 16
+            data = [random.randint(0, 255) for _ in range(data_len)]
+            # We only test SHA256
+            key_len = 32
+            key = [random.randint(0, 255) for _ in range(key_len)]
+            cfg = 0
+            trigger = 0
+
+            # We just test the first padding mode and the first mode (HMAC)
+            padding = 0
+            mode = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_hmac_daisy(
+                target,
+                iterations,
+                data,
+                data_len,
+                key,
+                key_len,
+                padding,
+                mode,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            for _ in range(iterations):
+                chained_text = data
+                for __ in range(num_segments):
+                    chained_text = chained_text[:data_len]
+                    sha256 = HMAC.new(key=bytes(key), digestmod=SHA256)
+                    sha256.update(bytes(chained_text))
+                    chained_text = [x for x in sha256.digest()]
+
+            expected_result = utils.pad_with_zeros([x for x in chained_text], 64)
+            expected_result_json = {
+                "status": 0,
+                "data": expected_result,
+                "data_len": 32,
+                "cfg": 0,
+            }
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, ignored_keys_set
+            )
+
+    def test_char_drbg(self):
+        for num_segments in num_segments_list:
+            entropy_len = 32
+            entropy = [random.randint(0, 255) for _ in range(entropy_len)]
+            nonce_len = 16
+            nonce = [random.randint(0, 255) for _ in range(nonce_len)]
+            reseed_interval = 100
+            data_len = 16
+            mode = 0
+            trigger = 1
+            cfg = 0
+
+            actual_result = sca_sym_cryptolib_functions.char_drbg(
+                target,
+                iterations,
+                entropy,
+                entropy_len,
+                nonce,
+                nonce_len,
+                reseed_interval,
+                data_len,
+                mode,
+                cfg,
+                trigger,
+                num_segments,
+            )
+            actual_result_json = json.loads(actual_result)
+
+            expected_result_json = {
+                "status": 0,
+                "cfg": 0,
+            }
+
+            drbg_ignored_key_sets = ignored_keys_set.copy()
+            drbg_ignored_key_sets.add("data")
+
+            utils.compare_json_data(
+                actual_result_json, expected_result_json, drbg_ignored_key_sets
+            )
+
+
+if __name__ == "__main__":
+    r = Runfiles.Create()
+    # Get the opentitantool path.
+    opentitantool_path = r.Rlocation(
+        "lowrisc_opentitan/sw/host/opentitantool/opentitantool"
+    )
+    # Program the bitstream for FPGAs.
+    bitstream_path = None
+    if BITSTREAM:
+        bitstream_path = r.Rlocation("lowrisc_opentitan/" + BITSTREAM)
+    # Get the firmware path.
+    firmware_path = r.Rlocation("lowrisc_opentitan/" + BOOTSTRAP)
+
+    if "fpga" in BOOTSTRAP:
+        target_type = "fpga"
+    else:
+        target_type = "chip"
+
+    target_cfg = targets.TargetConfig(
+        target_type=target_type,
+        interface_type="hyperdebug",
+        fw_bin=firmware_path,
+        opentitantool=opentitantool_path,
+        bitstream=bitstream_path,
+        tool_args=config_args,
+    )
+
+    target = targets.Target(target_cfg)
+
+    target.initialize_target()
+
+    unittest.main(argv=[sys.argv[0]])
diff --git a/sw/host/penetrationtests/python/util/BUILD b/sw/host/penetrationtests/python/util/BUILD
new file mode 100644
index 0000000000000..cf3ee37eb3d5e
--- /dev/null
+++ b/sw/host/penetrationtests/python/util/BUILD
@@ -0,0 +1,32 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@ot_python_deps//:requirements.bzl", "requirement")
+load("@rules_python//python:defs.bzl", "py_library")
+
+package(default_visibility = ["//visibility:public"])
+
+py_library(
+    name = "utils",
+    srcs = ["utils.py"],
+)
+
+py_library(
+    name = "targets",
+    srcs = ["targets.py"],
+    deps = [
+        requirement("pyserial"),
+        ":hyperdebug",
+    ],
+)
+
+py_library(
+    name = "common_library",
+    srcs = ["common_library.py"],
+)
+
+py_library(
+    name = "hyperdebug",
+    srcs = ["hyperdebug.py"],
+)
diff --git a/sw/host/penetrationtests/python/util/common_library.py b/sw/host/penetrationtests/python/util/common_library.py
new file mode 100644
index 0000000000000..54515894b467b
--- /dev/null
+++ b/sw/host/penetrationtests/python/util/common_library.py
@@ -0,0 +1,312 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+default_core_config = {
+    "enable_icache": True,
+    "enable_dummy_instr": True,
+    "dummy_instr_count": 3,
+    "enable_jittery_clock": True,
+    "enable_sram_readback": True,
+    "enable_data_ind_timing": True,
+}
+default_sensor_config = {
+    "sensor_ctrl_enable": True,
+    "sensor_ctrl_en_fatal": [
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+        False,
+    ],
+}
+default_alert_config = {
+    "alert_classes": [
+        2,  # "uart0_fatal_fault",
+        2,  # "uart1_fatal_fault",
+        2,  # "uart2_fatal_fault",
+        2,  # "uart3_fatal_fault",
+        0,  # "gpio_fatal_fault",
+        0,  # "spi_device_fatal_fault",
+        2,  # "i2c0_fatal_fault",
+        2,  # "i2c1_fatal_fault",
+        2,  # "i2c2_fatal_fault",
+        2,  # "pattgen_fatal_fault",
+        0,  # "rv_timer_fatal_fault",
+        0,  # "otp_ctrl_fatal_macro_error",
+        0,  # "otp_ctrl_fatal_check_error",
+        0,  # "otp_ctrl_fatal_bus_integ_error",
+        0,  # "otp_ctrl_fatal_prim_otp_alert",
+        1,  # "otp_ctrl_recov_prim_otp_alert",
+        0,  # "lc_ctrl_fatal_prog_error",
+        0,  # "lc_ctrl_fatal_state_error",
+        0,  # "lc_ctrl_fatal_bus_integ_error",
+        2,  # "spi_host0_fatal_fault",
+        2,  # "spi_host1_fatal_fault",
+        2,  # "usbdev_fatal_fault",
+        0,  # "pwrmgr_aon_fatal_fault",
+        0,  # "rstmgr_aon_fatal_fault",
+        0,  # "rstmgr_aon_fatal_cnsty_fault",
+        1,  # "clkmgr_aon_recov_fault",
+        0,  # "clkmgr_aon_fatal_fault",
+        2,  # "sysrst_ctrl_aon_fatal_fault",
+        2,  # "adc_ctrl_aon_fatal_fault",
+        2,  # "pwm_aon_fatal_fault",
+        2,  # "pinmux_aon_fatal_fault",
+        0,  # "aon_timer_aon_fatal_fault",
+        1,  # "sensor_ctrl_recov_alert",
+        0,  # "sensor_ctrl_fatal_alert",
+        0,  # "sram_ctrl_ret_aon_fatal_error",
+        1,  # "flash_ctrl_recov_err",
+        0,  # "flash_ctrl_fatal_std_err",
+        0,  # "flash_ctrl_fatal_err",
+        0,  # "flash_ctrl_fatal_prim_flash_alert",
+        1,  # "flash_ctrl_recov_prim_flash_alert",
+        0,  # "rv_dm_fatal_fault",
+        0,  # "rv_plic_fatal_fault",
+        1,  # "aes_recov_ctrl_update_err",
+        0,  # "aes_fatal_fault",
+        0,  # "hmac_fatal_fault",
+        1,  # "kmac_recov_operation_err",
+        0,  # "kmac_fatal_fault_err",
+        0,  # "otbn_fatal",
+        1,  # "otbn_recov",
+        1,  # "keymgr_recov_operation_err",
+        0,  # "keymgr_fatal_fault_err",
+        1,  # "csrng_recov_alert",
+        0,  # "csrng_fatal_alert",
+        1,  # "entropy_src_recov_alert",
+        0,  # "entropy_src_fatal_alert",
+        1,  # "edn0_recov_alert",
+        0,  # "edn0_fatal_alert",
+        1,  # "edn1_recov_alert",
+        0,  # "edn1_fatal_alert",
+        0,  # "sram_ctrl_main_fatal_error",
+        0,  # "rom_ctrl_fatal",
+        0,  # "rv_core_ibex_fatal_sw_err",
+        1,  # "rv_core_ibex_recov_sw_err",
+        0,  # "rv_core_ibex_fatal_hw_err",
+        1,  # "rv_core_ibex_recov_hw_err"
+    ],
+    "enable_alerts": [
+        True,  # "uart0_fatal_fault",
+        True,  # "uart1_fatal_fault",
+        True,  # "uart2_fatal_fault",
+        True,  # "uart3_fatal_fault",
+        True,  # "gpio_fatal_fault",
+        True,  # "spi_device_fatal_fault",
+        True,  # "i2c0_fatal_fault",
+        True,  # "i2c1_fatal_fault",
+        True,  # "i2c2_fatal_fault",
+        True,  # "pattgen_fatal_fault",
+        True,  # "rv_timer_fatal_fault",
+        True,  # "otp_ctrl_fatal_macro_error",
+        True,  # "otp_ctrl_fatal_check_error",
+        True,  # "otp_ctrl_fatal_bus_integ_error",
+        True,  # "otp_ctrl_fatal_prim_otp_alert",
+        True,  # "otp_ctrl_recov_prim_otp_alert",
+        True,  # "lc_ctrl_fatal_prog_error",
+        True,  # "lc_ctrl_fatal_state_error",
+        True,  # "lc_ctrl_fatal_bus_integ_error",
+        True,  # "spi_host0_fatal_fault",
+        True,  # "spi_host1_fatal_fault",
+        True,  # "usbdev_fatal_fault",
+        True,  # "pwrmgr_aon_fatal_fault",
+        True,  # "rstmgr_aon_fatal_fault",
+        True,  # "rstmgr_aon_fatal_cnsty_fault",
+        True,  # "clkmgr_aon_recov_fault",
+        True,  # "clkmgr_aon_fatal_fault",
+        True,  # "sysrst_ctrl_aon_fatal_fault",
+        True,  # "adc_ctrl_aon_fatal_fault",
+        True,  # "pwm_aon_fatal_fault",
+        True,  # "pinmux_aon_fatal_fault",
+        True,  # "aon_timer_aon_fatal_fault",
+        True,  # "sensor_ctrl_recov_alert",
+        True,  # "sensor_ctrl_fatal_alert",
+        True,  # "sram_ctrl_ret_aon_fatal_error",
+        True,  # "flash_ctrl_recov_err",
+        True,  # "flash_ctrl_fatal_std_err",
+        True,  # "flash_ctrl_fatal_err",
+        True,  # "flash_ctrl_fatal_prim_flash_alert",
+        True,  # "flash_ctrl_recov_prim_flash_alert",
+        True,  # "rv_dm_fatal_fault",
+        True,  # "rv_plic_fatal_fault",
+        True,  # "aes_recov_ctrl_update_err",
+        True,  # "aes_fatal_fault",
+        True,  # "hmac_fatal_fault",
+        True,  # "kmac_recov_operation_err",
+        True,  # "kmac_fatal_fault_err",
+        True,  # "otbn_fatal",
+        True,  # "otbn_recov",
+        True,  # "keymgr_recov_operation_err",
+        True,  # "keymgr_fatal_fault_err",
+        True,  # "csrng_recov_alert",
+        True,  # "csrng_fatal_alert",
+        True,  # "entropy_src_recov_alert",
+        True,  # "entropy_src_fatal_alert",
+        True,  # "edn0_recov_alert",
+        True,  # "edn0_fatal_alert",
+        True,  # "edn1_recov_alert",
+        True,  # "edn1_fatal_alert",
+        True,  # "sram_ctrl_main_fatal_error",
+        True,  # "rom_ctrl_fatal",
+        True,  # "rv_core_ibex_fatal_sw_err",
+        True,  # "rv_core_ibex_recov_sw_err",
+        True,  # "rv_core_ibex_fatal_hw_err",
+        True,  # "rv_core_ibex_recov_hw_err"
+    ],
+    "enable_classes": [True, True, False, False],
+    "accumulation_thresholds": [2, 2, 2, 2],
+    "signals": [4294967295, 0, 2, 3],
+    "duration_cycles": [0, 7200, 48, 48],
+    "ping_timeout": 1200,
+}
+
+default_fpga_friendly_alert_config = {
+    "alert_classes": [
+        2,  # "uart0_fatal_fault",
+        2,  # "uart1_fatal_fault",
+        2,  # "uart2_fatal_fault",
+        2,  # "uart3_fatal_fault",
+        0,  # "gpio_fatal_fault",
+        0,  # "spi_device_fatal_fault",
+        2,  # "i2c0_fatal_fault",
+        2,  # "i2c1_fatal_fault",
+        2,  # "i2c2_fatal_fault",
+        2,  # "pattgen_fatal_fault",
+        0,  # "rv_timer_fatal_fault",
+        0,  # "otp_ctrl_fatal_macro_error",
+        0,  # "otp_ctrl_fatal_check_error",
+        0,  # "otp_ctrl_fatal_bus_integ_error",
+        0,  # "otp_ctrl_fatal_prim_otp_alert",
+        1,  # "otp_ctrl_recov_prim_otp_alert",
+        0,  # "lc_ctrl_fatal_prog_error",
+        0,  # "lc_ctrl_fatal_state_error",
+        0,  # "lc_ctrl_fatal_bus_integ_error",
+        2,  # "spi_host0_fatal_fault",
+        2,  # "spi_host1_fatal_fault",
+        2,  # "usbdev_fatal_fault",
+        0,  # "pwrmgr_aon_fatal_fault",
+        0,  # "rstmgr_aon_fatal_fault",
+        0,  # "rstmgr_aon_fatal_cnsty_fault",
+        1,  # "clkmgr_aon_recov_fault",
+        0,  # "clkmgr_aon_fatal_fault",
+        2,  # "sysrst_ctrl_aon_fatal_fault",
+        2,  # "adc_ctrl_aon_fatal_fault",
+        2,  # "pwm_aon_fatal_fault",
+        2,  # "pinmux_aon_fatal_fault",
+        0,  # "aon_timer_aon_fatal_fault",
+        1,  # "sensor_ctrl_recov_alert",
+        0,  # "sensor_ctrl_fatal_alert",
+        0,  # "sram_ctrl_ret_aon_fatal_error",
+        1,  # "flash_ctrl_recov_err",
+        0,  # "flash_ctrl_fatal_std_err",
+        0,  # "flash_ctrl_fatal_err",
+        0,  # "flash_ctrl_fatal_prim_flash_alert",
+        1,  # "flash_ctrl_recov_prim_flash_alert",
+        0,  # "rv_dm_fatal_fault",
+        0,  # "rv_plic_fatal_fault",
+        1,  # "aes_recov_ctrl_update_err",
+        0,  # "aes_fatal_fault",
+        0,  # "hmac_fatal_fault",
+        1,  # "kmac_recov_operation_err",
+        0,  # "kmac_fatal_fault_err",
+        0,  # "otbn_fatal",
+        1,  # "otbn_recov",
+        1,  # "keymgr_recov_operation_err",
+        0,  # "keymgr_fatal_fault_err",
+        1,  # "csrng_recov_alert",
+        0,  # "csrng_fatal_alert",
+        1,  # "entropy_src_recov_alert",
+        0,  # "entropy_src_fatal_alert",
+        1,  # "edn0_recov_alert",
+        0,  # "edn0_fatal_alert",
+        1,  # "edn1_recov_alert",
+        0,  # "edn1_fatal_alert",
+        0,  # "sram_ctrl_main_fatal_error",
+        0,  # "rom_ctrl_fatal",
+        0,  # "rv_core_ibex_fatal_sw_err",
+        1,  # "rv_core_ibex_recov_sw_err",
+        0,  # "rv_core_ibex_fatal_hw_err",
+        1,  # "rv_core_ibex_recov_hw_err"
+    ],
+    "enable_alerts": [
+        True,  # "uart0_fatal_fault",
+        True,  # "uart1_fatal_fault",
+        True,  # "uart2_fatal_fault",
+        True,  # "uart3_fatal_fault",
+        True,  # "gpio_fatal_fault",
+        True,  # "spi_device_fatal_fault",
+        True,  # "i2c0_fatal_fault",
+        True,  # "i2c1_fatal_fault",
+        True,  # "i2c2_fatal_fault",
+        True,  # "pattgen_fatal_fault",
+        True,  # "rv_timer_fatal_fault",
+        True,  # "otp_ctrl_fatal_macro_error",
+        True,  # "otp_ctrl_fatal_check_error",
+        True,  # "otp_ctrl_fatal_bus_integ_error",
+        True,  # "otp_ctrl_fatal_prim_otp_alert",
+        True,  # "otp_ctrl_recov_prim_otp_alert",
+        True,  # "lc_ctrl_fatal_prog_error",
+        True,  # "lc_ctrl_fatal_state_error",
+        True,  # "lc_ctrl_fatal_bus_integ_error",
+        True,  # "spi_host0_fatal_fault",
+        True,  # "spi_host1_fatal_fault",
+        True,  # "usbdev_fatal_fault",
+        True,  # "pwrmgr_aon_fatal_fault",
+        True,  # "rstmgr_aon_fatal_fault",
+        True,  # "rstmgr_aon_fatal_cnsty_fault",
+        True,  # "clkmgr_aon_recov_fault",
+        True,  # "clkmgr_aon_fatal_fault",
+        True,  # "sysrst_ctrl_aon_fatal_fault",
+        True,  # "adc_ctrl_aon_fatal_fault",
+        True,  # "pwm_aon_fatal_fault",
+        True,  # "pinmux_aon_fatal_fault",
+        True,  # "aon_timer_aon_fatal_fault",
+        True,  # "sensor_ctrl_recov_alert",
+        True,  # "sensor_ctrl_fatal_alert",
+        True,  # "sram_ctrl_ret_aon_fatal_error",
+        True,  # "flash_ctrl_recov_err",
+        True,  # "flash_ctrl_fatal_std_err",
+        # On FPGA, this alert always raised, so leave it off
+        False,  # "flash_ctrl_fatal_err",
+        True,  # "flash_ctrl_fatal_prim_flash_alert",
+        True,  # "flash_ctrl_recov_prim_flash_alert",
+        True,  # "rv_dm_fatal_fault",
+        True,  # "rv_plic_fatal_fault",
+        True,  # "aes_recov_ctrl_update_err",
+        True,  # "aes_fatal_fault",
+        True,  # "hmac_fatal_fault",
+        True,  # "kmac_recov_operation_err",
+        True,  # "kmac_fatal_fault_err",
+        True,  # "otbn_fatal",
+        True,  # "otbn_recov",
+        True,  # "keymgr_recov_operation_err",
+        True,  # "keymgr_fatal_fault_err",
+        True,  # "csrng_recov_alert",
+        True,  # "csrng_fatal_alert",
+        True,  # "entropy_src_recov_alert",
+        True,  # "entropy_src_fatal_alert",
+        True,  # "edn0_recov_alert",
+        True,  # "edn0_fatal_alert",
+        True,  # "edn1_recov_alert",
+        True,  # "edn1_fatal_alert",
+        True,  # "sram_ctrl_main_fatal_error",
+        True,  # "rom_ctrl_fatal",
+        True,  # "rv_core_ibex_fatal_sw_err",
+        True,  # "rv_core_ibex_recov_sw_err",
+        True,  # "rv_core_ibex_fatal_hw_err",
+        True,  # "rv_core_ibex_recov_hw_err"
+    ],
+    "enable_classes": [True, True, False, False],
+    "accumulation_thresholds": [2, 2, 2, 2],
+    "signals": [4294967295, 0, 2, 3],
+    "duration_cycles": [0, 7200, 48, 48],
+    "ping_timeout": 1200,
+}
diff --git a/sw/host/penetrationtests/python/util/hyperdebug.py b/sw/host/penetrationtests/python/util/hyperdebug.py
new file mode 100644
index 0000000000000..c286915a9616e
--- /dev/null
+++ b/sw/host/penetrationtests/python/util/hyperdebug.py
@@ -0,0 +1,131 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import time
+from subprocess import PIPE, Popen
+from typing import Optional
+
+import serial
+from serial.tools.list_ports import comports
+
+
+class HyperDebug():
+    """Class for the FPGA or Chip connected via a hyperdebug.
+    Initializes OpenTitan with the provided firmware & provides helper functions.
+    """
+    def __init__(self, opentitantool, fw_bin, bitstream, tool_args):
+        self.opentitantool = opentitantool
+        self.fw_bin = fw_bin
+        self.bitstream = bitstream
+        self.tool_args = tool_args
+
+    def initialize_target(self):
+        # Programming the bitstream via the opentitantool seems to block
+        # communication, programming it twice seems to solve the problem
+        self.program_bitstream(self.bitstream)
+        self.program_bitstream(self.bitstream)
+
+        self.flash_target(self.fw_bin)
+
+    def program_bitstream(self, bitstream, program_delay=2):
+        if bitstream:
+            bitstream_process = Popen(
+                [
+                    self.opentitantool,
+                ] +
+                self.tool_args +
+                [
+                    "--exec",
+                    "transport init",
+                    "--exec",
+                    "fpga load-bitstream " + bitstream,
+                    "no-op",
+                ],
+                stderr=PIPE,
+            )
+            stderr = bitstream_process.communicate()
+            rc = bitstream_process.returncode
+            if rc != 0:
+                raise RuntimeError("Error: Failed to program the bitstream.")
+                return 0
+            else:
+                stderr_str = stderr[1].decode('utf-8')
+                if "Skip loading bitstream" not in stderr_str:
+                    time.sleep(program_delay)
+                print(f"Info: FPGA programmed with {bitstream}.")
+        return 1
+
+    def flash_target(self, firmware, boot_delay=2):
+        flash_process = Popen(
+            [
+                self.opentitantool,
+            ] +
+            self.tool_args +
+            [
+                "--exec",
+                "transport init",
+                "--exec",
+                "bootstrap " + firmware,
+                "no-op",
+            ],
+            stdout=PIPE, stderr=PIPE
+        )
+        flash_process.communicate()
+        rc = flash_process.returncode
+        if rc != 0:
+            raise RuntimeError("Error: Failed to flash chip.")
+            return 0
+        else:
+            # Wait until chip finished booting.
+            time.sleep(boot_delay)
+            print(f"Info: Chip flashed with {firmware}.")
+            return 1
+
+    def init_communication(self, port, baudrate):
+        """Open the communication interface.
+
+        Configure OpenTitan on CW FPGA or the discrete chip.
+        """
+        com_interface = None
+        if not port:
+            port = self.find_target_port()
+        com_interface = serial.Serial(port)
+        com_interface.baudrate = baudrate
+        # Setting a fixed 1s timeout for the UART connection.
+        com_interface.timeout = 1
+        return com_interface
+
+    def find_target_port(self):
+        for port in comports():
+            if "UART2" in port.description and "HyperDebug" in port.description:
+                return port.device
+        print("Target not found!")
+        return None
+
+    def reset_target(self, com_reset: Optional[bool] = False, reset_delay=0.005):
+        """Resets the target."""
+        reset_process = Popen(
+            [
+                self.opentitantool,
+            ] +
+            self.tool_args +
+            [
+                "--exec",
+                "transport init",
+                "--exec",
+                "gpio write RESET false",
+                "--exec",
+                "gpio write RESET true",
+                "no-op",
+            ],
+            stdout=PIPE, stderr=PIPE
+        )
+        reset_process.communicate()
+        rc = reset_process.returncode
+        if rc != 0:
+            raise RuntimeError("Error: Failed to reset chip.")
+        else:
+            time.sleep(reset_delay)
+        if com_reset:
+            self.com_interface = self.init_communication(None, 115200)
diff --git a/sw/host/penetrationtests/python/util/targets.py b/sw/host/penetrationtests/python/util/targets.py
new file mode 100644
index 0000000000000..72cb70aad6d2d
--- /dev/null
+++ b/sw/host/penetrationtests/python/util/targets.py
@@ -0,0 +1,168 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+from typing import Optional
+from dataclasses import dataclass
+import time
+
+from sw.host.penetrationtests.python.util.hyperdebug import HyperDebug
+
+
+@dataclass
+class TargetConfig:
+    """ Target configuration.
+    Stores information about the target.
+    """
+    target_type: str
+    fw_bin: str
+    interface_type: Optional[str] = None
+    pll_frequency: Optional[int] = None
+    bitstream: Optional[str] = None
+    force_program_bitstream: Optional[bool] = False
+    port: Optional[str] = None
+    read_timeout: Optional[int] = 1
+    tool_args: Optional[str] = None
+    opentitantool: Optional[str] = None
+    usb_serial: Optional[str] = None
+    husky_serial: Optional[str] = None
+
+
+class Target:
+    """Target class.
+
+    Represents a SCA/FI target. Currently, ChipWhisperer FPGA boards
+    or the discrete OpenTitan chip are supported.
+    """
+
+    # This is a fixed baudrate.
+    baudrate = 115200
+    # Due to a bug in the UART of the CW340, we need to send each byte separately
+    # and add a small timeout before sending the next one.
+    # This contains the calculation of the delay.
+    pacing = 10 / baudrate
+
+    def __init__(self, target_cfg: TargetConfig):
+
+        self.target_cfg = target_cfg
+
+        self.target = None
+        # Currently, we only consider hyperdebug interfaces
+        if target_cfg.interface_type == "hyperdebug":
+            self.target = HyperDebug(
+                target_cfg.opentitantool,
+                target_cfg.fw_bin,
+                target_cfg.bitstream,
+                target_cfg.tool_args
+            )
+
+        self.com_interface = self.target.init_communication(target_cfg.port, self.baudrate)
+
+    def initialize_target(self):
+        self.target.initialize_target()
+        # Clear the UART
+        self.dump_all()
+
+    def reset_target(self):
+        self.target.reset_target()
+
+    def write(self, data):
+        """Write data to the target."""
+        if "fpga" in self.target_cfg.target_type:
+            # Sleep one uart character time after writing to the uart to pace characters into the
+            # usb-serial device for CW340 so that we don't fill any device-internal buffers.
+            for byte in data:
+                self.com_interface.write(bytes([byte]))
+                time.sleep(self.pacing)
+        else:
+            self.com_interface.write(data)
+
+    def readline(self):
+        """read line."""
+        return self.com_interface.readline()
+
+    def print_all(self, max_tries=50):
+        it = 0
+        while it != max_tries:
+            read_line = str(self.readline().decode().strip())
+            if len(read_line) > 0:
+                print(read_line, flush=True)
+            else:
+                break
+            it += 1
+
+    def dump_all(self, max_tries=50):
+        it = 0
+        while it != max_tries:
+            read_line = str(self.readline())
+            if len(read_line) <= 5:
+                break
+            it += 1
+
+    def check_fault_or_read_reponse(self, max_tries=50):
+        """
+        Args:
+            max_tries: Maximum number of attempts to read from UART.
+
+        Returns:
+            - The JSON response of OpenTitan or the line containing FAULT.
+            - True if the chip gave a response, False if it ran into a fault.
+        """
+        it = 0
+        while it != max_tries:
+            try:
+                read_line = str(self.readline())
+                if "FAULT" in read_line:
+                    return read_line, False
+                if "RESP_OK" in read_line:
+                    return read_line.split("RESP_OK:")[1].split(" CRC:")[0], True
+                it += 1
+            except UnicodeDecodeError:
+                it += 1
+                continue
+        return "", False
+
+    def check_reset_or_read_reponse(self, max_tries=50):
+        """
+        Args:
+            max_tries: Maximum number of attempts to read from UART.
+
+        Returns:
+            - The JSON response of OpenTitan or the line containing Chip flashed.
+            - True if the chip gave a response, False if the chip resetted.
+        """
+        it = 0
+        while it != max_tries:
+            try:
+                read_line = str(self.readline())
+                if "Chip flashed" in read_line:
+                    return read_line, False
+                if "RESP_OK" in read_line:
+                    return read_line.split("RESP_OK:")[1].split(" CRC:")[0], True
+                it += 1
+            except UnicodeDecodeError:
+                it += 1
+                continue
+        return "", False
+
+    def read_response(self, max_tries: Optional[int] = 50):
+        """
+        Args:
+            max_tries: Maximum number of attempts to read from UART.
+
+        Returns:
+            The JSON response of OpenTitan.
+        """
+        it = 0
+        while it < max_tries:
+            try:
+                read_line = str(self.readline().decode().strip())
+            except UnicodeDecodeError:
+                break
+            if len(read_line) > 0:
+                if "RESP_OK" in read_line:
+                    return read_line.split("RESP_OK:")[1].split(" CRC:")[0]
+            else:
+                break
+            it += 1
+        return ""
diff --git a/sw/host/penetrationtests/python/util/utils.py b/sw/host/penetrationtests/python/util/utils.py
new file mode 100644
index 0000000000000..db7f1dd9b2eec
--- /dev/null
+++ b/sw/host/penetrationtests/python/util/utils.py
@@ -0,0 +1,72 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import struct
+
+
+def compare_json_data(
+    actual_data: dict, expected_data: dict, ignored_keys: set
+) -> bool:
+    expected_comparable_keys = set(expected_data.keys()) - ignored_keys
+    actual_comparable_keys = set(actual_data.keys()) - ignored_keys
+
+    assert expected_comparable_keys == actual_comparable_keys
+
+    for key in expected_comparable_keys:
+        assert expected_data[key] == actual_data[key], \
+            f"Found {actual_data[key]} but expected {expected_data[key]} under the key: {key}"
+
+
+def to_signed32(n_unsigned):
+    n_unsigned = n_unsigned & 0xFFFFFFFF
+    if n_unsigned >= 0x80000000:
+        return n_unsigned - 0x100000000
+    return n_unsigned
+
+
+def bytes_to_words(byte_array):
+    if not isinstance(byte_array, (bytes, bytearray)):
+        raise TypeError("Input must be a bytes object or bytearray.")
+
+    word_list = []
+    for i in range(0, len(byte_array), 4):
+        chunk = byte_array[i: i + 4]
+        word = struct.unpack(">I", chunk)[0]
+        word_list.append(word)
+    return word_list
+
+
+def words_to_bytes(dword_array):
+    if not isinstance(dword_array, list):
+        raise TypeError("Input must be a list of 32-bit integers.")
+
+    byte_list = bytearray()
+    for dword in dword_array:
+        if not isinstance(dword, int) or not (0 <= dword <= 0xFFFFFFFF):
+            raise ValueError(
+                "Each element in the array must be a 32-bit integer (0 to 0xFFFFFFFF)."
+            )
+        byte_list.extend(struct.pack(">I", dword))
+    return bytes(byte_list)
+
+
+def array_to_int(data_array):
+    result = 0
+    for i, val in enumerate(data_array):
+        result |= (val & 0xFFFFFFFF) << (i * 32)
+    return result
+
+
+def int_to_array(large_int):
+    data_array = [0] * 8
+    for i in range(8):
+        data_array[i] = (large_int >> (i * 32)) & 0xFFFFFFFF
+    return data_array
+
+
+def pad_with_zeros(array, length):
+    padded_arr = list(array)
+    zeros_to_add = max(0, length - len(padded_arr))
+    padded_arr.extend([0] * zeros_to_add)
+    return padded_arr
diff --git a/sw/host/penetrationtests/testvectors/data/BUILD b/sw/host/penetrationtests/testvectors/data/BUILD
new file mode 100644
index 0000000000000..bbddf130efe25
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/BUILD
@@ -0,0 +1,95 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "fi_sym_cryptolib",
+    srcs = ["fi_sym_cryptolib.json"],
+)
+
+filegroup(
+    name = "fi_asym_cryptolib",
+    srcs = ["fi_asym_cryptolib.json"],
+)
+
+filegroup(
+    name = "fi_crypto",
+    srcs = ["fi_crypto.json"],
+)
+
+filegroup(
+    name = "fi_ibex",
+    srcs = ["fi_ibex.json"],
+)
+
+filegroup(
+    name = "fi_lc_ctrl",
+    srcs = ["fi_lc_ctrl.json"],
+)
+
+filegroup(
+    name = "fi_otbn",
+    srcs = ["fi_otbn.json"],
+)
+
+filegroup(
+    name = "fi_otp",
+    srcs = ["fi_otp.json"],
+)
+
+filegroup(
+    name = "fi_rng",
+    srcs = ["fi_rng.json"],
+)
+
+filegroup(
+    name = "fi_rom",
+    srcs = ["fi_rom.json"],
+)
+
+filegroup(
+    name = "sca_aes",
+    srcs = ["sca_aes.json"],
+)
+
+filegroup(
+    name = "sca_sym_cryptolib",
+    srcs = ["sca_sym_cryptolib.json"],
+)
+
+filegroup(
+    name = "sca_asym_cryptolib",
+    srcs = ["sca_asym_cryptolib.json"],
+)
+
+filegroup(
+    name = "sca_edn",
+    srcs = ["sca_edn.json"],
+)
+
+filegroup(
+    name = "sca_hmac",
+    srcs = ["sca_hmac.json"],
+)
+
+filegroup(
+    name = "sca_ibex",
+    srcs = ["sca_ibex.json"],
+)
+
+filegroup(
+    name = "sca_kmac",
+    srcs = ["sca_kmac.json"],
+)
+
+filegroup(
+    name = "sca_otbn",
+    srcs = ["sca_otbn.json"],
+)
+
+filegroup(
+    name = "sca_sha3",
+    srcs = ["sca_sha3.json"],
+)
diff --git a/sw/host/penetrationtests/testvectors/data/fi_asym_cryptolib.json b/sw/host/penetrationtests/testvectors/data/fi_asym_cryptolib.json
new file mode 100644
index 0000000000000..bc4ea67fa05ee
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_asym_cryptolib.json
@@ -0,0 +1,217 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "RsaEnc",
+    "input": "{\"op_enc\": false, \"data\": [42, 250, 78, 253, 48, 34, 80, 152, 61, 162, 64, 143, 236, 104, 188, 241, 134, 154, 192, 50, 127, 74, 163, 49, 77, 109, 195, 76, 187, 131, 222, 235, 126, 31, 100, 216, 212, 110, 194, 237, 230, 60, 216, 140, 150, 6, 62, 202, 56, 81, 66, 90, 67, 90, 213, 213, 235, 182, 102, 70, 238, 29, 3, 125, 141, 161, 146, 188, 190, 20, 127, 206, 112, 209, 104, 7, 89, 98, 178, 163, 50, 247, 140, 102, 14, 77, 180, 114, 241, 93, 243, 217, 175, 148, 225, 103, 138, 124, 164, 244, 238, 229, 11, 140, 233, 43, 19, 59, 235, 205, 151, 7, 178, 26, 196, 90, 187, 209, 11, 150, 22, 156, 95, 77, 82, 223, 64, 27, 174, 92, 200, 28, 79, 16, 127, 137, 134, 111, 213, 166, 146, 149, 213, 19, 121, 90, 27, 116, 187, 45, 115, 21, 0, 182, 146, 167, 216, 106, 26, 138, 75, 179, 146, 97, 26, 107, 81, 213, 51, 129, 108, 171, 179, 12, 130, 75, 181, 249, 197, 222, 58, 157, 71, 157, 156, 16, 232, 216, 70, 147, 231, 233, 37, 201, 228, 145, 88, 194, 48, 7, 71, 23, 231, 58, 94, 30, 171, 80, 10, 212, 27, 147, 64, 36, 29, 53, 61, 39, 233, 181, 123, 94, 122, 208, 242, 126, 72, 132, 174, 62, 44, 250, 219, 137, 162, 96, 66, 154, 61, 83, 232, 58, 71, 3, 164, 180, 67, 107, 95, 244, 68, 73, 68, 176, 136, 149], \"data_len\": 256, \"mode\": 0, \"e\": 65537, \"n\": [177, 132, 217, 64, 109, 53, 17, 54, 92, 243, 178, 158, 44, 137, 26, 3, 98, 70, 53, 22, 173, 11, 38, 106, 214, 7, 184, 178, 203, 124, 222, 183, 224, 146, 132, 39, 6, 171, 173, 65, 15, 17, 96, 158, 255, 238, 20, 20, 78, 225, 128, 139, 121, 174, 181, 94, 91, 250, 152, 13, 31, 206, 190, 88, 168, 220, 107, 207, 31, 97, 245, 130, 105, 56, 30, 53, 214, 5, 80, 7, 35, 254, 19, 232, 55, 122, 150, 221, 65, 28, 45, 104, 140, 45, 221, 159, 252, 213, 189, 33, 199, 89, 196, 79, 147, 146, 140, 80, 89, 199, 154, 31, 4, 203, 170, 85, 5, 159, 56, 88, 251, 0, 11, 13, 65, 65, 187, 89, 191, 224, 249, 104, 70, 165, 241, 194, 25, 173, 113, 10, 1, 3, 64, 156, 185, 236, 248, 164, 56, 149, 243, 205, 176, 156, 190, 170, 220, 178, 247, 217, 45, 41, 139, 14, 23, 199, 246, 142, 32, 149, 14, 114, 62, 162, 198, 176, 177, 146, 30, 218, 0, 72, 107, 139, 43, 8, 37, 47, 17, 103, 45, 127, 79, 201, 111, 66, 90, 186, 38, 153, 43, 77, 189, 137, 213, 24, 119, 151, 190, 6, 132, 90, 243, 144, 208, 135, 117, 153, 159, 99, 139, 72, 72, 89, 215, 156, 61, 29, 107, 149, 199, 40, 62, 122, 185, 235, 226, 244, 219, 30, 151, 199, 92, 16, 20, 197, 78, 146, 223, 16, 104, 20, 73, 74, 171, 177], \"d\": [91, 145, 25, 11, 230, 53, 169, 166, 16, 46, 107, 66, 41, 6, 255, 180, 59, 52, 34, 115, 213, 200, 40, 63, 206, 87, 7, 25, 107, 157, 64, 135, 43, 40, 142, 216, 42, 60, 193, 1, 137, 145, 183, 235, 185, 234, 203, 116, 84, 93, 222, 147, 10, 200, 27, 174, 242, 117, 58, 8, 41, 210, 116, 213, 110, 105, 70, 235, 182, 207, 72, 118, 54, 27, 173, 231, 178, 129, 14, 189, 3, 39, 199, 25, 133, 80, 234, 235, 82, 209, 199, 248, 77, 248, 220, 52, 127, 24, 55, 164, 142, 248, 228, 65, 159, 95, 227, 228, 248, 198, 139, 205, 242, 226, 152, 127, 202, 117, 223, 255, 110, 34, 152, 54, 86, 42, 63, 144, 220, 166, 33, 191, 83, 246, 203, 151, 179, 12, 216, 233, 133, 22, 220, 85, 33, 174, 235, 224, 24, 30, 23, 200, 109, 210, 115, 142, 193, 170, 219, 187, 7, 128, 110, 136, 164, 157, 60, 103, 152, 6, 203, 226, 45, 186, 241, 169, 10, 79, 171, 237, 12, 137, 126, 25, 54, 231, 231, 101, 36, 143, 226, 29, 55, 81, 207, 87, 65, 244, 31, 99, 66, 153, 83, 34, 65, 253, 227, 206, 138, 95, 43, 210, 122, 216, 93, 153, 92, 129, 166, 202, 211, 15, 202, 8, 147, 96, 153, 143, 70, 196, 183, 48, 247, 17, 155, 246, 0, 221, 152, 162, 32, 129, 78, 253, 2, 246, 157, 5, 104, 178, 254, 37, 158, 116, 63, 15], \"n_len\": 256, \"hashing\": 0, \"padding\":0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"cfg\":0,\"d\":[91,145,25,11,230,53,169,166,16,46,107,66,41,6,255,180,59,52,34,115,213,200,40,63,206,87,7,25,107,157,64,135,43,40,142,216,42,60,193,1,137,145,183,235,185,234,203,116,84,93,222,147,10,200,27,174,242,117,58,8,41,210,116,213,110,105,70,235,182,207,72,118,54,27,173,231,178,129,14,189,3,39,199,25,133,80,234,235,82,209,199,248,77,248,220,52,127,24,55,164,142,248,228,65,159,95,227,228,248,198,139,205,242,226,152,127,202,117,223,255,110,34,152,54,86,42,63,144,220,166,33,191,83,246,203,151,179,12,216,233,133,22,220,85,33,174,235,224,24,30,23,200,109,210,115,142,193,170,219,187,7,128,110,136,164,157,60,103,152,6,203,226,45,186,241,169,10,79,171,237,12,137,126,25,54,231,231,101,36,143,226,29,55,81,207,87,65,244,31,99,66,153,83,34,65,253,227,206,138,95,43,210,122,216,93,153,92,129,166,202,211,15,202,8,147,96,153,143,70,196,183,48,247,17,155,246,0,221,152,162,32,129,78,253,2,246,157,5,104,178,254,37,158,116,63,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data\":[84,101,115,116,32,109,101,115,115,97,103,101,46,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\":13,\"n\":[177,132,217,64,109,53,17,54,92,243,178,158,44,137,26,3,98,70,53,22,173,11,38,106,214,7,184,178,203,124,222,183,224,146,132,39,6,171,173,65,15,17,96,158,255,238,20,20,78,225,128,139,121,174,181,94,91,250,152,13,31,206,190,88,168,220,107,207,31,97,245,130,105,56,30,53,214,5,80,7,35,254,19,232,55,122,150,221,65,28,45,104,140,45,221,159,252,213,189,33,199,89,196,79,147,146,140,80,89,199,154,31,4,203,170,85,5,159,56,88,251,0,11,13,65,65,187,89,191,224,249,104,70,165,241,194,25,173,113,10,1,3,64,156,185,236,248,164,56,149,243,205,176,156,190,170,220,178,247,217,45,41,139,14,23,199,246,142,32,149,14,114,62,162,198,176,177,146,30,218,0,72,107,139,43,8,37,47,17,103,45,127,79,201,111,66,90,186,38,153,43,77,189,137,213,24,119,151,190,6,132,90,243,144,208,135,117,153,159,99,139,72,72,89,215,156,61,29,107,149,199,40,62,122,185,235,226,244,219,30,151,199,92,16,20,197,78,146,223,16,104,20,73,74,171,177,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"n_len\":256}"
+    ]
+  },
+  {
+    "test_case_id": 3,
+    "command": "RsaSign",
+    "input": "{\"data\": [84, 101, 115, 116, 32, 109, 101, 115, 115, 97, 103, 101, 46], \"data_len\": 13, \"e\": 65537, \"n\": [177, 132, 217, 64, 109, 53, 17, 54, 92, 243, 178, 158, 44, 137, 26, 3, 98, 70, 53, 22, 173, 11, 38, 106, 214, 7, 184, 178, 203, 124, 222, 183, 224, 146, 132, 39, 6, 171, 173, 65, 15, 17, 96, 158, 255, 238, 20, 20, 78, 225, 128, 139, 121, 174, 181, 94, 91, 250, 152, 13, 31, 206, 190, 88, 168, 220, 107, 207, 31, 97, 245, 130, 105, 56, 30, 53, 214, 5, 80, 7, 35, 254, 19, 232, 55, 122, 150, 221, 65, 28, 45, 104, 140, 45, 221, 159, 252, 213, 189, 33, 199, 89, 196, 79, 147, 146, 140, 80, 89, 199, 154, 31, 4, 203, 170, 85, 5, 159, 56, 88, 251, 0, 11, 13, 65, 65, 187, 89, 191, 224, 249, 104, 70, 165, 241, 194, 25, 173, 113, 10, 1, 3, 64, 156, 185, 236, 248, 164, 56, 149, 243, 205, 176, 156, 190, 170, 220, 178, 247, 217, 45, 41, 139, 14, 23, 199, 246, 142, 32, 149, 14, 114, 62, 162, 198, 176, 177, 146, 30, 218, 0, 72, 107, 139, 43, 8, 37, 47, 17, 103, 45, 127, 79, 201, 111, 66, 90, 186, 38, 153, 43, 77, 189, 137, 213, 24, 119, 151, 190, 6, 132, 90, 243, 144, 208, 135, 117, 153, 159, 99, 139, 72, 72, 89, 215, 156, 61, 29, 107, 149, 199, 40, 62, 122, 185, 235, 226, 244, 219, 30, 151, 199, 92, 16, 20, 197, 78, 146, 223, 16, 104, 20, 73, 74, 171, 177], \"n_len\": 256, \"d\": [91, 145, 25, 11, 230, 53, 169, 166, 16, 46, 107, 66, 41, 6, 255, 180, 59, 52, 34, 115, 213, 200, 40, 63, 206, 87, 7, 25, 107, 157, 64, 135, 43, 40, 142, 216, 42, 60, 193, 1, 137, 145, 183, 235, 185, 234, 203, 116, 84, 93, 222, 147, 10, 200, 27, 174, 242, 117, 58, 8, 41, 210, 116, 213, 110, 105, 70, 235, 182, 207, 72, 118, 54, 27, 173, 231, 178, 129, 14, 189, 3, 39, 199, 25, 133, 80, 234, 235, 82, 209, 199, 248, 77, 248, 220, 52, 127, 24, 55, 164, 142, 248, 228, 65, 159, 95, 227, 228, 248, 198, 139, 205, 242, 226, 152, 127, 202, 117, 223, 255, 110, 34, 152, 54, 86, 42, 63, 144, 220, 166, 33, 191, 83, 246, 203, 151, 179, 12, 216, 233, 133, 22, 220, 85, 33, 174, 235, 224, 24, 30, 23, 200, 109, 210, 115, 142, 193, 170, 219, 187, 7, 128, 110, 136, 164, 157, 60, 103, 152, 6, 203, 226, 45, 186, 241, 169, 10, 79, 171, 237, 12, 137, 126, 25, 54, 231, 231, 101, 36, 143, 226, 29, 55, 81, 207, 87, 65, 244, 31, 99, 66, 153, 83, 34, 65, 253, 227, 206, 138, 95, 43, 210, 122, 216, 93, 153, 92, 129, 166, 202, 211, 15, 202, 8, 147, 96, 153, 143, 70, 196, 183, 48, 247, 17, 155, 246, 0, 221, 152, 162, 32, 129, 78, 253, 2, 246, 157, 5, 104, 178, 254, 37, 158, 116, 63, 15], \"hashing\": 0, \"padding\":0, \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"n\":[177,132,217,64,109,53,17,54,92,243,178,158,44,137,26,3,98,70,53,22,173,11,38,106,214,7,184,178,203,124,222,183,224,146,132,39,6,171,173,65,15,17,96,158,255,238,20,20,78,225,128,139,121,174,181,94,91,250,152,13,31,206,190,88,168,220,107,207,31,97,245,130,105,56,30,53,214,5,80,7,35,254,19,232,55,122,150,221,65,28,45,104,140,45,221,159,252,213,189,33,199,89,196,79,147,146,140,80,89,199,154,31,4,203,170,85,5,159,56,88,251,0,11,13,65,65,187,89,191,224,249,104,70,165,241,194,25,173,113,10,1,3,64,156,185,236,248,164,56,149,243,205,176,156,190,170,220,178,247,217,45,41,139,14,23,199,246,142,32,149,14,114,62,162,198,176,177,146,30,218,0,72,107,139,43,8,37,47,17,103,45,127,79,201,111,66,90,186,38,153,43,77,189,137,213,24,119,151,190,6,132,90,243,144,208,135,117,153,159,99,139,72,72,89,215,156,61,29,107,149,199,40,62,122,185,235,226,244,219,30,151,199,92,16,20,197,78,146,223,16,104,20,73,74,171,177,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"d\": [91,145,25,11,230,53,169,166,16,46,107,66,41,6,255,180,59,52,34,115,213,200,40,63,206,87,7,25,107,157,64,135,43,40,142,216,42,60,193,1,137,145,183,235,185,234,203,116,84,93,222,147,10,200,27,174,242,117,58,8,41,210,116,213,110,105,70,235,182,207,72,118,54,27,173,231,178,129,14,189,3,39,199,25,133,80,234,235,82,209,199,248,77,248,220,52,127,24,55,164,142,248,228,65,159,95,227,228,248,198,139,205,242,226,152,127,202,117,223,255,110,34,152,54,86,42,63,144,220,166,33,191,83,246,203,151,179,12,216,233,133,22,220,85,33,174,235,224,24,30,23,200,109,210,115,142,193,170,219,187,7,128,110,136,164,157,60,103,152,6,203,226,45,186,241,169,10,79,171,237,12,137,126,25,54,231,231,101,36,143,226,29,55,81,207,87,65,244,31,99,66,153,83,34,65,253,227,206,138,95,43,210,122,216,93,153,92,129,166,202,211,15,202,8,147,96,153,143,70,196,183,48,247,17,155,246,0,221,152,162,32,129,78,253,2,246,157,5,104,178,254,37,158,116,63,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"n_len\":256, \"sig\":[199,198,102,171,10,252,239,151,186,205,105,152,254,9,108,123,143,210,36,33,179,132,48,121,114,75,162,77,89,134,108,79,123,162,227,99,32,209,232,187,15,25,137,135,70,254,34,23,120,49,87,37,179,189,204,58,0,202,183,30,170,64,235,232,168,33,59,29,94,146,151,153,29,248,147,23,84,143,114,18,8,6,228,102,160,87,16,75,179,62,67,186,178,115,44,112,64,23,57,169,15,113,56,248,9,241,60,243,29,238,92,89,233,27,52,7,177,82,206,207,122,186,72,91,14,90,14,247,66,140,185,219,121,105,253,133,252,96,183,205,83,149,224,210,23,164,187,112,9,38,229,4,14,66,21,194,46,36,7,36,75,103,25,79,157,106,153,93,5,29,251,242,20,252,224,136,12,143,163,225,93,147,17,209,179,245,59,210,130,168,215,220,21,35,36,15,81,125,36,215,236,214,71,194,57,39,73,226,92,17,251,61,122,234,26,3,192,9,203,205,219,141,49,41,216,13,161,208,142,1,7,51,22,86,60,225,128,219,212,152,66,42,105,80,116,74,233,65,235,121,111,10,102,92,64,28,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"sig_len\": 256, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 4,
+    "command": "RsaVerify",
+    "input": "{\"data\": [84, 101, 115, 116, 32, 109, 101, 115, 115, 97, 103, 101, 46], \"data_len\": 13, \"e\": 65537, \"n\": [177, 132, 217, 64, 109, 53, 17, 54, 92, 243, 178, 158, 44, 137, 26, 3, 98, 70, 53, 22, 173, 11, 38, 106, 214, 7, 184, 178, 203, 124, 222, 183, 224, 146, 132, 39, 6, 171, 173, 65, 15, 17, 96, 158, 255, 238, 20, 20, 78, 225, 128, 139, 121, 174, 181, 94, 91, 250, 152, 13, 31, 206, 190, 88, 168, 220, 107, 207, 31, 97, 245, 130, 105, 56, 30, 53, 214, 5, 80, 7, 35, 254, 19, 232, 55, 122, 150, 221, 65, 28, 45, 104, 140, 45, 221, 159, 252, 213, 189, 33, 199, 89, 196, 79, 147, 146, 140, 80, 89, 199, 154, 31, 4, 203, 170, 85, 5, 159, 56, 88, 251, 0, 11, 13, 65, 65, 187, 89, 191, 224, 249, 104, 70, 165, 241, 194, 25, 173, 113, 10, 1, 3, 64, 156, 185, 236, 248, 164, 56, 149, 243, 205, 176, 156, 190, 170, 220, 178, 247, 217, 45, 41, 139, 14, 23, 199, 246, 142, 32, 149, 14, 114, 62, 162, 198, 176, 177, 146, 30, 218, 0, 72, 107, 139, 43, 8, 37, 47, 17, 103, 45, 127, 79, 201, 111, 66, 90, 186, 38, 153, 43, 77, 189, 137, 213, 24, 119, 151, 190, 6, 132, 90, 243, 144, 208, 135, 117, 153, 159, 99, 139, 72, 72, 89, 215, 156, 61, 29, 107, 149, 199, 40, 62, 122, 185, 235, 226, 244, 219, 30, 151, 199, 92, 16, 20, 197, 78, 146, 223, 16, 104, 20, 73, 74, 171, 177], \"n_len\": 256, \"sig\":[199,198,102,171,10,252,239,151,186,205,105,152,254,9,108,123,143,210,36,33,179,132,48,121,114,75,162,77,89,134,108,79,123,162,227,99,32,209,232,187,15,25,137,135,70,254,34,23,120,49,87,37,179,189,204,58,0,202,183,30,170,64,235,232,168,33,59,29,94,146,151,153,29,248,147,23,84,143,114,18,8,6,228,102,160,87,16,75,179,62,67,186,178,115,44,112,64,23,57,169,15,113,56,248,9,241,60,243,29,238,92,89,233,27,52,7,177,82,206,207,122,186,72,91,14,90,14,247,66,140,185,219,121,105,253,133,252,96,183,205,83,149,224,210,23,164,187,112,9,38,229,4,14,66,21,194,46,36,7,36,75,103,25,79,157,106,153,93,5,29,251,242,20,252,224,136,12,143,163,225,93,147,17,209,179,245,59,210,130,168,215,220,21,35,36,15,81,125,36,215,236,214,71,194,57,39,73,226,92,17,251,61,122,234,26,3,192,9,203,205,219,141,49,41,216,13,161,208,142,1,7,51,22,86,60,225,128,219,212,152,66,42,105,80,116,74,233,65,235,121,111,10,102,92,64,28,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"sig_len\": 256, \"hashing\": 0, \"padding\":0, \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"result\": true, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 5,
+    "command": "Prime",
+    "input": "{\"e\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"prime\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"prime_len\": 512, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 6,
+    "command": "P256BaseMul",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 7,
+    "command": "P256PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 8,
+    "command": "P256Ecdh",
+    "input": "{\"private_key\": [177,101,82,146,221,80,170,112,109,135,24,140,227,103,29,83,28,124,200,238,162,37,236,242,2,68,226,233,184,229,201,55], \"public_x\": [71,116,22,241,120,127,83,87,143,240,151,8,245,169,13,173,172,19,2,185,170,237,103,25,43,143,252,119,51,143,2,49], \"public_y\": [107,161,202,23,43,127,134,138,106,241,210,29,215,173,81,244,198,205,73,22,189,76,172,226,189,59,54,137,1,147,161,67], \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [136,123,170,54,30,26,48,71,177,174,193,8,199,150,255,179,155,100,200,80,240,176,98,184,157,228,154,217,49,140,200,76], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 9,
+    "command": "P256Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [1194,91,234,230,56,255,141,205,55,14,3,166,248,156,89,76,85,190,209,39,126,225,77,131,187,176,239,120,58,5,23,199], \"cfg\": 1, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0], \"s\": [0], \"pubx\": [0], \"puby\": [0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 10,
+    "command": "P256Verify",
+    "input": "{\"pubx\": [253,23,41,116,11,221,87,98,152,61,94,197,51,225,3,26,161,127,114,249,34,160,196,15,41,208,102,133,235,235,141,143], \"puby\": [197,81,151,17,172,120,203,166,206,190,221,138,140,99,196,173,55,141,197,88,140,186,124,56,167,76,162,170,147,247,112,213], \"r\": [83,91,94,216,221,188,237,78,225,194,199,179,156,184,186,245,137,189,93,253,127,213,39,63,108,148,9,119,54,142,35,91], \"s\": [96,214,30,55,64,225,192,222,6,189,207,186,56,105,93,71,31,60,160,81,54,181,120,167,74,92,91,193,201,6,16,179], \"message\": [1194,91,234,230,56,255,141,205,55,14,3,166,248,156,89,76,85,190,209,39,126,225,77,131,187,176,239,120,58,5,23,199], \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"result\": true, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 11,
+    "command": "P384BaseMul",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 12,
+    "command": "P384PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 13,
+    "command": "P384Ecdh",
+    "input": "{\"private_key\": [9,155,226,195,235,187,56,84,41,100,10,164,120,182,22,95,212,213,0,177,32,75,22,143,215,238,207,228,134,192,244,144,156,224,3,8,192,209,10,53,56,44,45,37,54,238,15,184], \"public_x\": [74,11,231,113,35,86,190,184,198,169,200,86,171,234,210,4,56,30,157,251,159,69,251,230,24,230,71,8,0,95,64,192,174,97,168,216,233,36,211,12,176,126,7,158,156,90,114,70], \"public_y\": [66,175,0,31,17,19,158,77,40,93,124,83,15,33,123,237,64,72,239,34,80,141,82,231,169,27,166,129,214,142,119,69,62,53,139,106,245,13,163,189,147,137,220,66,234,18,99,229], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [41,21,134,114,36,198,36,89,8,44,93,60,253,252,243,90,56,132,155,38,217,117,29,222,116,158,201,130,84,82,51,106,163,10,0,96,154,87,157,121,113,64,215,12,104,108,246,165], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 14,
+    "command": "P384Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],  \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [249,177,39,240,216,30,188,209,123,123,160,234,19,28,102,13,52,11,5,206,85,124,130,22,14,15,121,61,224,125,56,23,144,35,148,40,113,172,183,0,45,250,253,255,252,141,234,206], \"cfg\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 15,
+    "command": "P384Verify",
+    "input": "{\"pubx\": [209,119,199,104,200,199,206,217,96,76,5,97,237,43,199,63,140,86,74,30,119,193,156,75,42,231,180,240,189,175,119,242,175,83,122,205,100,84,169,91,62,70,5,29,31,11,89,171], \"puby\": [13,167,150,132,202,0,107,171,12,184,70,204,143,13,171,249,88,207,61,150,248,223,219,0,189,172,93,151,189,90,52,55,4,226,52,195,127,134,25,40,142,84,107,201,137,204,130,84], \"r\": [80,241,185,118,63,205,7,94,68,210,33,80,161,26,33,1,44,32,44,93,123,213,216,97,79,78,247,14,189,3,181,62,207,34,74,17,47,176,62,11,229,123,5,120,211,207,116,186], \"s\": [110,96,51,214,71,50,53,75,76,92,220,139,40,175,22,171,35,105,179,126,69,119,26,244,114,242,159,244,86,200,15,202,139,58,254,255,22,223,207,144,74,46,221,39,55,253,80,166], \"message\": [249,177,39,240,216,30,188,209,123,123,160,234,19,28,102,13,52,11,5,206,85,124,130,22,14,15,121,61,224,125,56,23,144,35,148,40,113,172,183,0,45,250,253,255,252,141,234,206], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"result\": true, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 16,
+    "command": "Secp256k1BaseMul",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 17,
+    "command": "Secp256k1PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 18,
+    "command": "Secp256k1Ecdh",
+    "input": "{\"private_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 19,
+    "command": "Secp256k1Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 20,
+    "command": "Secp256k1Verify",
+    "input": "{\"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"result\": true, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 21,
+    "command": "X25519BaseMul",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 22,
+    "command": "X25519PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 23,
+    "command": "X25519Ecdh",
+    "input": "{\"private_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 24,
+    "command": "Ed25519BaseMul",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 25,
+    "command": "Ed25519Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message_len\": 128, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 26,
+    "command": "Ed25519Verify",
+    "input": "{\"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message_len\": 128, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"result\": true, \"cfg\": 0}"
+    ]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_crypto.json b/sw/host/penetrationtests/testvectors/data/fi_crypto.json
new file mode 100644
index 0000000000000..4297dd82e772f
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_crypto.json
@@ -0,0 +1,168 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "Aes",
+    "mode": "{\"key_trigger\": true,\"plaintext_trigger\": false,\"encrypt_trigger\": false,\"ciphertext_trigger\": false}",
+    "input": "{\"plaintext\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15], \"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "expected_output": ["{\"ciphertext\":[10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "Aes",
+    "mode": "{\"key_trigger\": false,\"plaintext_trigger\": true,\"encrypt_trigger\": false,\"ciphertext_trigger\": false}",
+    "input": "{\"plaintext\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15], \"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "expected_output": ["{\"ciphertext\":[10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "Aes",
+    "mode": "{\"key_trigger\": false,\"plaintext_trigger\": false,\"encrypt_trigger\": true,\"ciphertext_trigger\": false}",
+    "input": "{\"plaintext\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15], \"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "expected_output": ["{\"ciphertext\":[10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "Aes",
+    "mode": "{\"key_trigger\": false,\"plaintext_trigger\": false,\"encrypt_trigger\": false,\"ciphertext_trigger\": true}",
+    "input": "{\"plaintext\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15], \"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "expected_output": ["{\"ciphertext\":[10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "Kmac",
+    "mode": "{\"key_trigger\": true,\"absorb_trigger\": false,\"static_trigger\": false,\"squeeze_trigger\": false}",
+    "expected_output": ["{\"digest\":[184,34,91,108,231,47,251,27],\"digest_2nd\":[142,188,186,201,216,47,203,192],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "Kmac",
+    "mode": "{\"key_trigger\": false,\"absorb_trigger\": true,\"static_trigger\": false,\"squeeze_trigger\": false}",
+    "expected_output": ["{\"digest\":[184,34,91,108,231,47,251,27],\"digest_2nd\":[142,188,186,201,216,47,203,192],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 8,
+    "command": "Kmac",
+    "mode": "{\"key_trigger\": false,\"absorb_trigger\": false,\"static_trigger\": true,\"squeeze_trigger\": false}",
+    "expected_output": ["{\"digest\":[184,34,91,108,231,47,251,27],\"digest_2nd\":[142,188,186,201,216,47,203,192],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 9,
+    "command": "Kmac",
+    "mode": "{\"key_trigger\": false,\"absorb_trigger\": false,\"static_trigger\": false,\"squeeze_trigger\": true}",
+    "expected_output": ["{\"digest\":[184,34,91,108,231,47,251,27],\"digest_2nd\":[142,188,186,201,216,47,203,192],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 10,
+    "command": "KmacState",
+    "expected_output": ["{\"digest\":[184,34,91,108,231,47,251,27],\"share0\":[168,31,28,190,140,6,235,119,202,55,129,61,31,221,97,54,201,182,175,200,60,240,99,162,34,70,184,1,169,199,155,137,199,21,166,226,106,179,98,249,101,65,178,235,2,211,113,56,88,225,175,108,61,95,19,198,197,231,202,185,4,101,56,244,114,31,234,125,225,126,28,173,181,108,127,148,160,220,131,34,182,88,177,17,94,56,199,224,126,187,122,92,152,238,216,100,88,61,108,213,29,251,235,148,145,99,77,149,221,13,128,228,13,26,230,143,116,223,228,207,233,90,156,121,223,120,91,21,84,191,96,64,206,80,162,187,114,83,219,121,163,162,109,86,188,116,65,158,80,212,144,98,209,56,113,134,43,85,112,128,14,25,139,126,49,104,231,41,230,90,143,245,177,42,209,230,176,204,61,38,235,51,106,56,204,18,44,115,30,106,30,159,60,152,217,147,245,173,18,99], \"share1\": [16,61,71,210,107,41,16,108,170,255,75,141,112,27,129,192,106,34,217,60,0,9,134,114,167,165,248,253,101,35,171,138,185,143,55,87,2,191,132,184,145,19,156,5,186,11,190,103,7,53,249,90,176,27,236,206,170,101,38,115,109,136,230,237,252,163,80,180,57,81,215,109,102,224,97,53,168,152,2,43,118,77,150,109,153,47,176,198,185,117,94,130,159,28,85,216,85,93,101,95,242,84,50,129,216,139,224,215,217,68,215,28,238,249,156,219,224,30,116,181,94,13,244,179,232,1,217,35,109,31,50,174,157,31,126,158,254,106,227,249,54,150,163,32,114,31,117,24,160,167,100,139,108,127,12,236,92,245,254,144,188,30,44,151,48,78,221,38,113,206,94,4,187,19,17,217,159,162,248,255,171,51,124,205,226,207,231,86,132,74,185,169,126,221,67,204,253,13,21,24], \"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 11,
+    "command": "Hmac",
+    "input": "{\"message\": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": true,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": false, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[686569403,627255979,3962665531,1869430007,3580678696,2543765621,4151418325,927402239,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 12,
+    "command": "Hmac",
+    "input": "{\"message\": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": true,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": false, \"enable_hmac\": false, \"message_endianness_big\": true, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[686569403,627255979,3962665531,1869430007,3580678696,2543765621,4151418325,927402239,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 13,
+    "command": "Hmac",
+    "input": "{\"message\": [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": true,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": false, \"enable_hmac\": false, \"message_endianness_big\": true, \"digest_endianness_big\": true, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[3141004328,2871681829,997863916,4147932527,684879061,1976082071,3583865335,4278732599,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 14,
+    "command": "Hmac",
+    "input": "{\"message\": [255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": true,\"process_trigger\": false,\"finish_trigger\": false, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[1080378907,3894047529,4265098468,2275438372,2555095219,287412521,1595297801,1522967956,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 15,
+    "command": "Hmac",
+    "input": "{\"message\": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": true,\"finish_trigger\": false, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[3996813713,3685128488,2749163006,1137088592,438890749,3186001028,96417470,3192245030,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 16,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[956051232,3683224361,4139697432,3225996988,496274419,3147268997,3136358402,529633942,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 17,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": false, \"message_endianness_big\": true, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[2856256064,3909088473,1660650950,4117743022,1622899107,107234495,3357956274,284642735,0, 0, 0, 0, 0, 0, 0, 0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 18,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":1}",
+    "expected_output": ["{\"tag\":[956794333,2962363795,807320094,1443896907,450466098,1195137667,4279831992,1530897902,2770728890,2252409361,1392239866,1021544579,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 19,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 0, 0, 0, 0, 0, 0, 0]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": false, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":2}",
+    "expected_output": ["{\"tag\":[1817511279,2381723475,1333175416,3289336254,21289985,2726264315,3303817390,1284292231,1189285626,4048996872,1452280734,2335544134,1687508487,592318096,467060269,2055378582],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 20,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 1, 2, 3, 4, 5, 6, 7]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": true, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":0}",
+    "expected_output": ["{\"tag\":[1718936401,3934232619,660172194,642293994,832111426,1447558433,2262381463,704814822,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 21,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": true, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":1}",
+    "expected_output": ["{\"tag\":[2002654839,2171821763,3734709844,319069890,1658767967,3907547394,2147427249,4285135042,1044645490,565219722,532991724,696101234,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 22,
+    "command": "Hmac",
+    "input": "{\"message\": [15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0], \"key\": [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]}",
+    "mode": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true, \"enable_hmac\": true, \"message_endianness_big\": false, \"digest_endianness_big\": false, \"key_endianness_big\": false, \"hash_mode\":2}",
+    "expected_output": ["{\"tag\":[1709257561,1763202480,856627814,1141678823,3814690376,1695667148,1632553365,1215934345,820770384,1324704972,714820083,1277918871,1632724788,331654792,1853992088,827702048],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 23,
+    "command": "ShadowRegAccess",
+    "expected_output": ["{\"result\":[68162304,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 24,
+    "command": "ShadowRegRead",
+    "expected_output": ["{\"result\":[0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_ibex.json b/sw/host/penetrationtests/testvectors/data/fi_ibex.json
new file mode 100644
index 0000000000000..8a30ddf2eacd5
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_ibex.json
@@ -0,0 +1,248 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "CharCondBranchBeq",
+    "expected_output": ["{\"result1\":175,\"result2\":239,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "CharCondBranchBge",
+    "expected_output": ["{\"result1\":175,\"result2\":239,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "CharCondBranchBgeu",
+    "expected_output": ["{\"result1\":175,\"result2\":239,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "CharCondBranchBlt",
+    "expected_output": ["{\"result1\":239,\"result2\":175,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "CharCondBranchBltu",
+    "expected_output": ["{\"result1\":239,\"result2\":175,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "CharCondBranchBne",
+    "expected_output": ["{\"result1\":175,\"result2\":175,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 8,
+    "command": "CharCsrRead",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 9,
+    "command": "CharCsrWrite",
+    "expected_output": ["{\"result\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 10,
+    "command": "CharFlashRead",
+    "input": "{\"flash_region\": 2}",
+    "flaky_expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 11,
+    "command": "CharFlashWrite",
+    "input": "{\"flash_region\": 2}",
+    "flaky_expected_output": ["{\"result\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 12,
+    "command": "CharMemOpLoop",
+    "expected_output": ["{\"result\":[10000,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 13,
+    "command": "CharRegisterFile",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 14,
+    "command": "CharRegisterFileRead",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 15,
+    "command": "CharRegOpLoop",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 16,
+    "command": "CharSramRead",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 17,
+    "command": "CharSramStatic",
+    "expected_output": ["{\"addresses\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 18,
+    "command": "CharSramWrite",
+    "expected_output": ["{\"memory\":[464367618,2343432205,2779096485,2880154539,2881141438,2880293630,3131746989,3134333474,3148725999,3200171710,3203386062,3221229823,3405697037,3405709037,3435973836,3452816845,219540062,3735883980,3735928559,3735931646,3735929054,3735943697,3735941133,3741239533,3735936685,3490524077,3958107115,4208909997,4261281277,4276215469,4277009102,4277075694,464367618,2343432205,2779096485,2880154539,2881141438,2880293630,3131746989,3134333474,3148725999,3200171710,3203386062,3221229823,3405697037,3405709037,3435973836,3452816845,219540062,3735883980,3735928559,3735931646,3735929054,3735943697,3735941133,3741239533,3735936685,3490524077,3958107115,4208909997,4261281277,4276215469,4277009102,4277075694],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 19,
+    "command": "CharSramWriteRead",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 20,
+    "command": "CharSramWriteStaticUnrolled",
+    "expected_output": ["{\"memory\":[464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618,464367618],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 21,
+    "command": "CharUncondBranch",
+    "expected_output": ["{\"result\":30,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 22,
+    "command": "CharUncondBranchNop",
+    "expected_output": ["{\"result\":0,\"registers\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 23,
+    "command": "CharUnrolledMemOpLoop",
+    "expected_output": ["{\"result\":10000,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 24,
+    "command": "CharUnrolledRegOpLoop",
+    "expected_output": ["{\"result\":10000,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 25,
+    "command": "CharUnrolledRegOpLoopChain",
+    "expected_output": ["{\"result\":[60,55,56,57,58,59,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 26,
+    "command": "CharSingleBeq",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 27,
+    "command": "CharAddiSingleBeq",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 28,
+    "command": "CharAddiSingleBeqNeg",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 29,
+    "command": "CharSingleBne",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 30,
+    "command": "CharAddiSingleBne",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 31,
+    "command": "CharAddiSingleBneNeg",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 32,
+    "command": "CharCombi",
+    "expected_output": [
+      "{\"data_faulty_test_1\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data_test_1\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"result_test_2\":13,\"result_test_3\":15,\"registers_test_1\":[0,0,0,0,0,175,175,0,0,0,0,0,160,15,1,3,10,28,0,0,0,0,0,0,0,0,0,0,162,5,196,7],\"registers_test_2\":[0,0,0,0,0,1,2,3,0,0,0,0,4,5,6,7,8,9,0,0,0,0,0,0,0,0,0,0,10,11,12,13],\"registers_test_3\":[0,0,0,0,0,15,3131746989,3134333474,0,0,0,0,3405697037,3405709037,3435973836,3452816845,219540062,3735883980,0,0,0,0,0,0,0,0,0,0,4261281277,4276215469,4277009102,4277075694],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"
+    ]
+  },
+  {
+    "test_case_id": 33,
+    "command": "CharSramWriteReadAlt",
+    "expected_output": ["{\"memory\":[2880293630,3131746989,3134333474,2880293630,3131746989,3134333474,2880293630,3131746989,3134333474,2880293630,3131746989,3134333474,2880293630,3131746989,3134333474,2880293630,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 34,
+    "command": "CharSramReadRet",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false],\"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0], \"sram_err_status\":56}"]
+  },
+  {
+    "test_case_id": 35,
+    "command": "OtpDataRead",
+    "expected_output": ["{\"result\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 36,
+    "command": "OtpReadLock",
+    "flaky_expected_output": ["{\"result\":5,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 1,
+    "command": "",
+    "reset": true
+  },
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 37,
+    "command": "CharCsrCombi",
+    "input": "{\"trigger\": 7, \"ref_values\": [2,3,16641,4,5,6,38553,7,5137,256,26214,26214,26214,5,2,3,4]}",
+    "flaky_expected_output": ["{\"output\":[2,3,16641,4,5,6,38553,7,5137,256,26214,26214,26214,5,2,3,4], \"data_faulty\": [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false], \"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 1,
+    "command": "",
+    "reset": true
+  },
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 38,
+    "command": "CharCsrCombi",
+    "input": "{\"trigger\": 7, \"ref_values\": [1,5,33,101,3,5,39321,6,5138,50115,39321,38502,39321,39321,1,2,3]}",
+    "flaky_expected_output": ["{\"output\":[1,5,33,101,3,5,39321,6,5138,50115,39321,38502,39321,39321,1,2,3], \"data_faulty\": [false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false], \"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_lc_ctrl.json b/sw/host/penetrationtests/testvectors/data/fi_lc_ctrl.json
new file mode 100644
index 0000000000000..535715e8c49b6
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_lc_ctrl.json
@@ -0,0 +1,22 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "RuntimeCorruption",
+    "flaky_expected_output": ["{\"res\":0,\"state\":17,\"counter\":5,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_otbn.json b/sw/host/penetrationtests/testvectors/data/fi_otbn.json
new file mode 100644
index 0000000000000..776b3d17cf260
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_otbn.json
@@ -0,0 +1,106 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "CharBeq",
+    "expected_output": ["{\"result\":0,\"insn_cnt\":509,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "CharBnRshi",
+    "input": "{\"big_num\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}",
+    "expected_output": ["{\"big_num\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"insn_cnt\":109,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "CharBnSel",
+     "input": "{\"big_num\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}",
+    "expected_output": ["{\"big_num\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"insn_cnt\":1014,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "CharBnWsrr",
+    "expected_output": ["{\"res\":0,\"insn_cnt\":1089,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "CharBne",
+    "expected_output": ["{\"result\":0,\"insn_cnt\":509,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "CharDmemAccess",
+    "expected_output": ["{\"res\":0,\"insn_cnt\":271,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 8,
+    "command": "CharDmemWrite",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"insn_cnt\":1,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 9,
+    "command": "CharHardwareDmemOpLoop",
+    "expected_output": ["{\"loop_counter\":10000,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 10,
+    "command": "CharHardwareRegOpLoop",
+    "expected_output": ["{\"loop_counter\":10000,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 11,
+    "command": "CharJal",
+    "expected_output": ["{\"result\":0,\"insn_cnt\":505,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 12,
+    "command": "CharLw",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"insn_cnt\":1084,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 13,
+    "command": "CharMem",
+    "input": "{\"byte_offset\":0,\"num_words\":4,\"imem\":false,\"dmem\":true}",
+    "expected_output": ["{\"res\":0,\"imem_data\":[0,0,0,0,0,0,0,0],\"imem_addr\":[0,0,0,0,0,0,0,0],\"dmem_data\":[0,0,0,0,0,0,0,0],\"dmem_addr\":[0,0,0,0,0,0,0,0],\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 14,
+    "command": "CharRF",
+    "expected_output": ["{\"res\":0,\"faulty_gpr\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"faulty_wdr\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 15,
+    "command": "CharUnrolledDmemOpLoop",
+    "expected_output": ["{\"loop_counter\":100,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 16,
+    "command": "CharUnrolledRegOpLoop",
+    "expected_output": ["{\"loop_counter\":100,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 17,
+    "command": "LoadIntegrity",
+    "expected_output": ["{\"result\":0,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 18,
+    "command": "PC",
+    "input": "{\"pc\":2224}",
+    "expected_output": ["{\"pc_dmem\":2224,\"pc_otbn\":2224,\"insn_cnt\":472,\"err_otbn\":0,\"err_ibx\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_otp.json b/sw/host/penetrationtests/testvectors/data/fi_otp.json
new file mode 100644
index 0000000000000..1ba3558d116c5
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_otp.json
@@ -0,0 +1,37 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "HwCfg",
+    "flaky_expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false],\"otp_error_causes\":[0,0,0,0,0,0,0,0,0,0],\"otp_status_codes\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "LifeCycle",
+    "expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false],\"otp_error_causes\":[0,0,0,0,0,0,0,0,0,0],\"otp_status_codes\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id":4,
+    "command": "VendorTest",
+    "flaky_expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false],\"otp_error_causes\":[0,0,0,0,0,0,0,0,0,0],\"otp_status_codes\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "OwnerSwCfg",
+    "flaky_expected_output": ["{\"data_faulty\":[false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false],\"otp_error_causes\":[0,0,0,0,0,0,0,0,0,0],\"otp_status_codes\":0,\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_rng.json b/sw/host/penetrationtests/testvectors/data/fi_rng.json
new file mode 100644
index 0000000000000..2cd071b44e33b
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_rng.json
@@ -0,0 +1,105 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "CsrngInit",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "CsrngBias",
+    "input": "{\"start_trigger\": true,\"valid_trigger\": true,\"read_trigger\": true,\"all_trigger\": true}",
+    "expected_output": ["{\"res\":0,\"rand\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 1,
+    "command": "",
+    "reset": true
+  },
+  {
+    "test_case_id": 1,
+    "command": "EdnInit",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "EdnRespAck",
+    "expected_output": ["{\"collisions\":0,\"rand\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "EdnBias",
+    "expected_output": ["{\"rand\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 1,
+    "command": "",
+    "reset": true
+  },
+  {
+    "test_case_id": 1,
+    "command": "EdnInit",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "FWOverride",
+    "input": "{\"disable_health_check\": true}",
+    "flaky_expected_output": ["{\"rand\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  },
+  {
+    "test_case_id": 1,
+    "command": "",
+    "reset": true
+  },
+  {
+    "test_case_id": 1,
+    "command": "EdnInit",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "FWOverride",
+    "input": "{\"disable_health_check\": false}",
+    "flaky_expected_output": ["{\"rand\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_rom.json b/sw/host/penetrationtests/testvectors/data/fi_rom.json
new file mode 100644
index 0000000000000..390bf197688ee
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_rom.json
@@ -0,0 +1,22 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "Read",
+    "expected_output": ["{\"digest\":[0,0,0,0,0,0,0,0],\"err_status\":0,\"alerts\":[0,0,0],\"ast_alerts\":[0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/fi_sym_cryptolib.json b/sw/host/penetrationtests/testvectors/data/fi_sym_cryptolib.json
new file mode 100644
index 0000000000000..f47cfe0a3bc4b
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/fi_sym_cryptolib.json
@@ -0,0 +1,73 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "alerts":"{\"alert_classes\":[2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enable_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enable_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"signals\": [4294967295, 0, 2, 3], \"duration_cycles\": [0, 2400000,48,48], \"ping_timeout\": 1200}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"sensor_ctrl_en\": [true,true,true,true,true,true,true,true,true,true,true], \"sensor_ctrl_fatal\": [false,false,false,false,false,false,false,false,false,false,false]}",
+      "{\"alert_classes\": [2,2,2,2,0,0,2,2,2,2,0,0,0,0,0,1,0,0,0,2,2,2,0,0,0,1,0,2,2,2,2,0,1,0,0,1,0,2,0,1,0,0,1,0,0,1,0,0,1,1,0,1,0,1,0,1,0,1,0,0,0,0,1,0,1], \"enabled_alerts\": [true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true,true], \"enabled_classes\": [true,true,false,false], \"accumulation_thresholds\": [2,2,2,2], \"duration_cycles\": [0, 2400000,48,48], \"escalation_signals_en\": [true,false,true,true], \"escalation_signals_map\": [1, 0, 2, 3]}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "Aes",
+    "input": "{\"data\": [222,136,93,200,127,90,146,89,64,130,208,44,193,225,180,44,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16,\"key\": [128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 24,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 1, \"op_enc\": false, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 3,
+    "command": "Cmac",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 32,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 0, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 4,
+    "command": "Gcm",
+    "input": "{\"data\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 97, 110, 100, 32, 101, 110, 99, 114, 121, 112, 116, 101, 100, 32, 100, 97, 116, 97],\"data_len\": 32,\"key\": [118, 89, 39, 144, 234, 246, 99, 14, 103, 12, 229, 120, 79, 242, 58, 24, 6, 161, 234, 118, 176, 151, 123, 21, 66, 55, 71, 105, 36, 124, 196, 206],\"key_len\": 32,\"aad\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 100, 97, 116, 97],\"aad_len\": 18,\"tag\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"tag_len\": 16,\"iv\": [197, 138, 222, 210, 225, 187, 236, 186, 139, 22, 165, 117, 126, 84, 117, 189], \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[78,109,58,150,59,7,107,160,148,93,41,170,131,111,41,176,250,6,205,213,117,170,184,35,63,29,249,62,128,22,51,113,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"tag\":[50,72,149,179,210,246,86,228,250,47,140,224,86,19,112,97,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"tag_len\":16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 5,
+    "command": "Tdes",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 21,\"iv\": [0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 0, \"op_enc\": true, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 0, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 6,
+    "command": "Hmac",
+    "input": "{\"data\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"data_len\": 16,\"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31],\"key_len\": 32, \"padding\": 0, \"mode\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[216,185,159,39,9,163,202,116,23,44,190,147,130,76,31,41,178,58,12,30,156,33,189,133,31,242,210,195,157,190,241,78,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 7,
+    "command": "DrbgReseed",
+    "input": "{\"entropy\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"entropy_len\": 32,\"nonce\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"nonce_len\": 16, \"reseed_interval\": 100, \"mode\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 8,
+    "command": "TrngInit",
+    "input": "{\"mode\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"cfg\": 0}"
+    ]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_aes.json b/sw/host/penetrationtests/testvectors/data/sca_aes.json
new file mode 100644
index 0000000000000..d6bf32d819678
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_aes.json
@@ -0,0 +1,57 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "mode": "{\"fpga_mode\": 0}",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "SeedLfsr",
+    "input": "{\"seed\": [0,1,2,3]}"
+  },
+  {
+    "test_case_id": 3,
+    "command": "Single",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}",
+    "input": "{\"text\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"text_length\":16}",
+    "expected_output": ["{\"ciphertext\": [10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"ciphertext_length\":16}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "BatchDaisy",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}",
+    "message": "{\"text\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"text_length\":16}",
+    "input": "{\"num_enc\":1}",
+    "expected_output": ["{\"ciphertext\": [10,148,11,181,65,110,240,69,241,195,148,88,198,83,234,90],\"ciphertext_length\":16}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "BatchRandom",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}",
+    "input": "{\"num_enc\":5}",
+    "expected_output": ["{\"ciphertext\": [43,124,136,98,79,239,79,213,254,243,234,57,24,36,150,230],\"ciphertext_length\":16}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "BatchFvsrData",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}",
+    "message": "{\"text\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"text_length\":16}",
+    "input": "{\"num_enc\":10}",
+    "expected_output": ["{\"ciphertext\": [11,220,94,112,90,30,79,78,132,107,225,207,60,76,164,92],\"ciphertext_length\":16}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "BatchFvsrKey",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}",
+    "input": "{\"num_enc\":10}",
+    "expected_output": ["{\"ciphertext\": [16,100,21,248,236,192,48,45,173,59,69,111,175,194,18,52],\"ciphertext_length\":16}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_asym_cryptolib.json b/sw/host/penetrationtests/testvectors/data/sca_asym_cryptolib.json
new file mode 100644
index 0000000000000..092c02419025f
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_asym_cryptolib.json
@@ -0,0 +1,214 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"rom_digest\":[0,0,0,0,0,0,0,0],\"data_ind_timing_en\":true,\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "RsaDec",
+    "input": "{\"data\": [42, 250, 78, 253, 48, 34, 80, 152, 61, 162, 64, 143, 236, 104, 188, 241, 134, 154, 192, 50, 127, 74, 163, 49, 77, 109, 195, 76, 187, 131, 222, 235, 126, 31, 100, 216, 212, 110, 194, 237, 230, 60, 216, 140, 150, 6, 62, 202, 56, 81, 66, 90, 67, 90, 213, 213, 235, 182, 102, 70, 238, 29, 3, 125, 141, 161, 146, 188, 190, 20, 127, 206, 112, 209, 104, 7, 89, 98, 178, 163, 50, 247, 140, 102, 14, 77, 180, 114, 241, 93, 243, 217, 175, 148, 225, 103, 138, 124, 164, 244, 238, 229, 11, 140, 233, 43, 19, 59, 235, 205, 151, 7, 178, 26, 196, 90, 187, 209, 11, 150, 22, 156, 95, 77, 82, 223, 64, 27, 174, 92, 200, 28, 79, 16, 127, 137, 134, 111, 213, 166, 146, 149, 213, 19, 121, 90, 27, 116, 187, 45, 115, 21, 0, 182, 146, 167, 216, 106, 26, 138, 75, 179, 146, 97, 26, 107, 81, 213, 51, 129, 108, 171, 179, 12, 130, 75, 181, 249, 197, 222, 58, 157, 71, 157, 156, 16, 232, 216, 70, 147, 231, 233, 37, 201, 228, 145, 88, 194, 48, 7, 71, 23, 231, 58, 94, 30, 171, 80, 10, 212, 27, 147, 64, 36, 29, 53, 61, 39, 233, 181, 123, 94, 122, 208, 242, 126, 72, 132, 174, 62, 44, 250, 219, 137, 162, 96, 66, 154, 61, 83, 232, 58, 71, 3, 164, 180, 67, 107, 95, 244, 68, 73, 68, 176, 136, 149], \"data_len\": 256, \"mode\": 0, \"e\": 65537, \"n\": [177, 132, 217, 64, 109, 53, 17, 54, 92, 243, 178, 158, 44, 137, 26, 3, 98, 70, 53, 22, 173, 11, 38, 106, 214, 7, 184, 178, 203, 124, 222, 183, 224, 146, 132, 39, 6, 171, 173, 65, 15, 17, 96, 158, 255, 238, 20, 20, 78, 225, 128, 139, 121, 174, 181, 94, 91, 250, 152, 13, 31, 206, 190, 88, 168, 220, 107, 207, 31, 97, 245, 130, 105, 56, 30, 53, 214, 5, 80, 7, 35, 254, 19, 232, 55, 122, 150, 221, 65, 28, 45, 104, 140, 45, 221, 159, 252, 213, 189, 33, 199, 89, 196, 79, 147, 146, 140, 80, 89, 199, 154, 31, 4, 203, 170, 85, 5, 159, 56, 88, 251, 0, 11, 13, 65, 65, 187, 89, 191, 224, 249, 104, 70, 165, 241, 194, 25, 173, 113, 10, 1, 3, 64, 156, 185, 236, 248, 164, 56, 149, 243, 205, 176, 156, 190, 170, 220, 178, 247, 217, 45, 41, 139, 14, 23, 199, 246, 142, 32, 149, 14, 114, 62, 162, 198, 176, 177, 146, 30, 218, 0, 72, 107, 139, 43, 8, 37, 47, 17, 103, 45, 127, 79, 201, 111, 66, 90, 186, 38, 153, 43, 77, 189, 137, 213, 24, 119, 151, 190, 6, 132, 90, 243, 144, 208, 135, 117, 153, 159, 99, 139, 72, 72, 89, 215, 156, 61, 29, 107, 149, 199, 40, 62, 122, 185, 235, 226, 244, 219, 30, 151, 199, 92, 16, 20, 197, 78, 146, 223, 16, 104, 20, 73, 74, 171, 177], \"d\": [91, 145, 25, 11, 230, 53, 169, 166, 16, 46, 107, 66, 41, 6, 255, 180, 59, 52, 34, 115, 213, 200, 40, 63, 206, 87, 7, 25, 107, 157, 64, 135, 43, 40, 142, 216, 42, 60, 193, 1, 137, 145, 183, 235, 185, 234, 203, 116, 84, 93, 222, 147, 10, 200, 27, 174, 242, 117, 58, 8, 41, 210, 116, 213, 110, 105, 70, 235, 182, 207, 72, 118, 54, 27, 173, 231, 178, 129, 14, 189, 3, 39, 199, 25, 133, 80, 234, 235, 82, 209, 199, 248, 77, 248, 220, 52, 127, 24, 55, 164, 142, 248, 228, 65, 159, 95, 227, 228, 248, 198, 139, 205, 242, 226, 152, 127, 202, 117, 223, 255, 110, 34, 152, 54, 86, 42, 63, 144, 220, 166, 33, 191, 83, 246, 203, 151, 179, 12, 216, 233, 133, 22, 220, 85, 33, 174, 235, 224, 24, 30, 23, 200, 109, 210, 115, 142, 193, 170, 219, 187, 7, 128, 110, 136, 164, 157, 60, 103, 152, 6, 203, 226, 45, 186, 241, 169, 10, 79, 171, 237, 12, 137, 126, 25, 54, 231, 231, 101, 36, 143, 226, 29, 55, 81, 207, 87, 65, 244, 31, 99, 66, 153, 83, 34, 65, 253, 227, 206, 138, 95, 43, 210, 122, 216, 93, 153, 92, 129, 166, 202, 211, 15, 202, 8, 147, 96, 153, 143, 70, 196, 183, 48, 247, 17, 155, 246, 0, 221, 152, 162, 32, 129, 78, 253, 2, 246, 157, 5, 104, 178, 254, 37, 158, 116, 63, 15], \"n_len\": 256, \"hashing\": 0, \"padding\":0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0,\"cfg\":0,\"d\":[91,145,25,11,230,53,169,166,16,46,107,66,41,6,255,180,59,52,34,115,213,200,40,63,206,87,7,25,107,157,64,135,43,40,142,216,42,60,193,1,137,145,183,235,185,234,203,116,84,93,222,147,10,200,27,174,242,117,58,8,41,210,116,213,110,105,70,235,182,207,72,118,54,27,173,231,178,129,14,189,3,39,199,25,133,80,234,235,82,209,199,248,77,248,220,52,127,24,55,164,142,248,228,65,159,95,227,228,248,198,139,205,242,226,152,127,202,117,223,255,110,34,152,54,86,42,63,144,220,166,33,191,83,246,203,151,179,12,216,233,133,22,220,85,33,174,235,224,24,30,23,200,109,210,115,142,193,170,219,187,7,128,110,136,164,157,60,103,152,6,203,226,45,186,241,169,10,79,171,237,12,137,126,25,54,231,231,101,36,143,226,29,55,81,207,87,65,244,31,99,66,153,83,34,65,253,227,206,138,95,43,210,122,216,93,153,92,129,166,202,211,15,202,8,147,96,153,143,70,196,183,48,247,17,155,246,0,221,152,162,32,129,78,253,2,246,157,5,104,178,254,37,158,116,63,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data\":[84,101,115,116,32,109,101,115,115,97,103,101,46,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\":13,\"n\":[177,132,217,64,109,53,17,54,92,243,178,158,44,137,26,3,98,70,53,22,173,11,38,106,214,7,184,178,203,124,222,183,224,146,132,39,6,171,173,65,15,17,96,158,255,238,20,20,78,225,128,139,121,174,181,94,91,250,152,13,31,206,190,88,168,220,107,207,31,97,245,130,105,56,30,53,214,5,80,7,35,254,19,232,55,122,150,221,65,28,45,104,140,45,221,159,252,213,189,33,199,89,196,79,147,146,140,80,89,199,154,31,4,203,170,85,5,159,56,88,251,0,11,13,65,65,187,89,191,224,249,104,70,165,241,194,25,173,113,10,1,3,64,156,185,236,248,164,56,149,243,205,176,156,190,170,220,178,247,217,45,41,139,14,23,199,246,142,32,149,14,114,62,162,198,176,177,146,30,218,0,72,107,139,43,8,37,47,17,103,45,127,79,201,111,66,90,186,38,153,43,77,189,137,213,24,119,151,190,6,132,90,243,144,208,135,117,153,159,99,139,72,72,89,215,156,61,29,107,149,199,40,62,122,185,235,226,244,219,30,151,199,92,16,20,197,78,146,223,16,104,20,73,74,171,177,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"n_len\":256}"
+    ]
+  },
+  {
+    "test_case_id": 3,
+    "command": "RsaSign",
+    "input": "{\"data\": [84, 101, 115, 116, 32, 109, 101, 115, 115, 97, 103, 101, 46], \"data_len\": 13, \"e\": 65537, \"n\": [177, 132, 217, 64, 109, 53, 17, 54, 92, 243, 178, 158, 44, 137, 26, 3, 98, 70, 53, 22, 173, 11, 38, 106, 214, 7, 184, 178, 203, 124, 222, 183, 224, 146, 132, 39, 6, 171, 173, 65, 15, 17, 96, 158, 255, 238, 20, 20, 78, 225, 128, 139, 121, 174, 181, 94, 91, 250, 152, 13, 31, 206, 190, 88, 168, 220, 107, 207, 31, 97, 245, 130, 105, 56, 30, 53, 214, 5, 80, 7, 35, 254, 19, 232, 55, 122, 150, 221, 65, 28, 45, 104, 140, 45, 221, 159, 252, 213, 189, 33, 199, 89, 196, 79, 147, 146, 140, 80, 89, 199, 154, 31, 4, 203, 170, 85, 5, 159, 56, 88, 251, 0, 11, 13, 65, 65, 187, 89, 191, 224, 249, 104, 70, 165, 241, 194, 25, 173, 113, 10, 1, 3, 64, 156, 185, 236, 248, 164, 56, 149, 243, 205, 176, 156, 190, 170, 220, 178, 247, 217, 45, 41, 139, 14, 23, 199, 246, 142, 32, 149, 14, 114, 62, 162, 198, 176, 177, 146, 30, 218, 0, 72, 107, 139, 43, 8, 37, 47, 17, 103, 45, 127, 79, 201, 111, 66, 90, 186, 38, 153, 43, 77, 189, 137, 213, 24, 119, 151, 190, 6, 132, 90, 243, 144, 208, 135, 117, 153, 159, 99, 139, 72, 72, 89, 215, 156, 61, 29, 107, 149, 199, 40, 62, 122, 185, 235, 226, 244, 219, 30, 151, 199, 92, 16, 20, 197, 78, 146, 223, 16, 104, 20, 73, 74, 171, 177], \"n_len\": 256, \"d\": [91, 145, 25, 11, 230, 53, 169, 166, 16, 46, 107, 66, 41, 6, 255, 180, 59, 52, 34, 115, 213, 200, 40, 63, 206, 87, 7, 25, 107, 157, 64, 135, 43, 40, 142, 216, 42, 60, 193, 1, 137, 145, 183, 235, 185, 234, 203, 116, 84, 93, 222, 147, 10, 200, 27, 174, 242, 117, 58, 8, 41, 210, 116, 213, 110, 105, 70, 235, 182, 207, 72, 118, 54, 27, 173, 231, 178, 129, 14, 189, 3, 39, 199, 25, 133, 80, 234, 235, 82, 209, 199, 248, 77, 248, 220, 52, 127, 24, 55, 164, 142, 248, 228, 65, 159, 95, 227, 228, 248, 198, 139, 205, 242, 226, 152, 127, 202, 117, 223, 255, 110, 34, 152, 54, 86, 42, 63, 144, 220, 166, 33, 191, 83, 246, 203, 151, 179, 12, 216, 233, 133, 22, 220, 85, 33, 174, 235, 224, 24, 30, 23, 200, 109, 210, 115, 142, 193, 170, 219, 187, 7, 128, 110, 136, 164, 157, 60, 103, 152, 6, 203, 226, 45, 186, 241, 169, 10, 79, 171, 237, 12, 137, 126, 25, 54, 231, 231, 101, 36, 143, 226, 29, 55, 81, 207, 87, 65, 244, 31, 99, 66, 153, 83, 34, 65, 253, 227, 206, 138, 95, 43, 210, 122, 216, 93, 153, 92, 129, 166, 202, 211, 15, 202, 8, 147, 96, 153, 143, 70, 196, 183, 48, 247, 17, 155, 246, 0, 221, 152, 162, 32, 129, 78, 253, 2, 246, 157, 5, 104, 178, 254, 37, 158, 116, 63, 15], \"hashing\": 0, \"padding\":0, \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"n\":[177,132,217,64,109,53,17,54,92,243,178,158,44,137,26,3,98,70,53,22,173,11,38,106,214,7,184,178,203,124,222,183,224,146,132,39,6,171,173,65,15,17,96,158,255,238,20,20,78,225,128,139,121,174,181,94,91,250,152,13,31,206,190,88,168,220,107,207,31,97,245,130,105,56,30,53,214,5,80,7,35,254,19,232,55,122,150,221,65,28,45,104,140,45,221,159,252,213,189,33,199,89,196,79,147,146,140,80,89,199,154,31,4,203,170,85,5,159,56,88,251,0,11,13,65,65,187,89,191,224,249,104,70,165,241,194,25,173,113,10,1,3,64,156,185,236,248,164,56,149,243,205,176,156,190,170,220,178,247,217,45,41,139,14,23,199,246,142,32,149,14,114,62,162,198,176,177,146,30,218,0,72,107,139,43,8,37,47,17,103,45,127,79,201,111,66,90,186,38,153,43,77,189,137,213,24,119,151,190,6,132,90,243,144,208,135,117,153,159,99,139,72,72,89,215,156,61,29,107,149,199,40,62,122,185,235,226,244,219,30,151,199,92,16,20,197,78,146,223,16,104,20,73,74,171,177,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"d\": [91,145,25,11,230,53,169,166,16,46,107,66,41,6,255,180,59,52,34,115,213,200,40,63,206,87,7,25,107,157,64,135,43,40,142,216,42,60,193,1,137,145,183,235,185,234,203,116,84,93,222,147,10,200,27,174,242,117,58,8,41,210,116,213,110,105,70,235,182,207,72,118,54,27,173,231,178,129,14,189,3,39,199,25,133,80,234,235,82,209,199,248,77,248,220,52,127,24,55,164,142,248,228,65,159,95,227,228,248,198,139,205,242,226,152,127,202,117,223,255,110,34,152,54,86,42,63,144,220,166,33,191,83,246,203,151,179,12,216,233,133,22,220,85,33,174,235,224,24,30,23,200,109,210,115,142,193,170,219,187,7,128,110,136,164,157,60,103,152,6,203,226,45,186,241,169,10,79,171,237,12,137,126,25,54,231,231,101,36,143,226,29,55,81,207,87,65,244,31,99,66,153,83,34,65,253,227,206,138,95,43,210,122,216,93,153,92,129,166,202,211,15,202,8,147,96,153,143,70,196,183,48,247,17,155,246,0,221,152,162,32,129,78,253,2,246,157,5,104,178,254,37,158,116,63,15,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"n_len\":256, \"sig\":[199,198,102,171,10,252,239,151,186,205,105,152,254,9,108,123,143,210,36,33,179,132,48,121,114,75,162,77,89,134,108,79,123,162,227,99,32,209,232,187,15,25,137,135,70,254,34,23,120,49,87,37,179,189,204,58,0,202,183,30,170,64,235,232,168,33,59,29,94,146,151,153,29,248,147,23,84,143,114,18,8,6,228,102,160,87,16,75,179,62,67,186,178,115,44,112,64,23,57,169,15,113,56,248,9,241,60,243,29,238,92,89,233,27,52,7,177,82,206,207,122,186,72,91,14,90,14,247,66,140,185,219,121,105,253,133,252,96,183,205,83,149,224,210,23,164,187,112,9,38,229,4,14,66,21,194,46,36,7,36,75,103,25,79,157,106,153,93,5,29,251,242,20,252,224,136,12,143,163,225,93,147,17,209,179,245,59,210,130,168,215,220,21,35,36,15,81,125,36,215,236,214,71,194,57,39,73,226,92,17,251,61,122,234,26,3,192,9,203,205,219,141,49,41,216,13,161,208,142,1,7,51,22,86,60,225,128,219,212,152,66,42,105,80,116,74,233,65,235,121,111,10,102,92,64,28,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"sig_len\": 256, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 4,
+    "command": "Prime",
+    "input": "{\"e\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"prime\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"prime_len\": 0, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 5,
+    "command": "P256BaseMulFvsr",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 6,
+    "command": "P256BaseMulDaisy",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 7,
+    "command": "P256PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 8,
+    "command": "P256Ecdh",
+    "input": "{\"private_key\": [177,101,82,146,221,80,170,112,109,135,24,140,227,103,29,83,28,124,200,238,162,37,236,242,2,68,226,233,184,229,201,55], \"public_x\": [71,116,22,241,120,127,83,87,143,240,151,8,245,169,13,173,172,19,2,185,170,237,103,25,43,143,252,119,51,143,2,49], \"public_y\": [107,161,202,23,43,127,134,138,106,241,210,29,215,173,81,244,198,205,73,22,189,76,172,226,189,59,54,137,1,147,161,67], \"cfg\": 0, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [136,123,170,54,30,26,48,71,177,174,193,8,199,150,255,179,155,100,200,80,240,176,98,184,157,228,154,217,49,140,200,76], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 9,
+    "command": "P256Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [136,252,30,125,132,151,148,252,81,177,53,250,19,93,238,192,219,2,184,108,60,216,206,189,170,121,232,104,158,91,40,152], \"cfg\": 1, \"trigger\": 0}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0], \"s\": [0], \"pubx\": [0], \"puby\": [0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 10,
+    "command": "P384BaseMulFvsr",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 11,
+    "command": "P384BaseMulDaisy",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 12,
+    "command": "P384PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 13,
+    "command": "P384Ecdh",
+    "input": "{\"private_key\": [9,155,226,195,235,187,56,84,41,100,10,164,120,182,22,95,212,213,0,177,32,75,22,143,215,238,207,228,134,192,244,144,156,224,3,8,192,209,10,53,56,44,45,37,54,238,15,184], \"public_x\": [74,11,231,113,35,86,190,184,198,169,200,86,171,234,210,4,56,30,157,251,159,69,251,230,24,230,71,8,0,95,64,192,174,97,168,216,233,36,211,12,176,126,7,158,156,90,114,70], \"public_y\": [66,175,0,31,17,19,158,77,40,93,124,83,15,33,123,237,64,72,239,34,80,141,82,231,169,27,166,129,214,142,119,69,62,53,139,106,245,13,163,189,147,137,220,66,234,18,99,229], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [41,21,134,114,36,198,36,89,8,44,93,60,253,252,243,90,56,132,155,38,217,117,29,222,116,158,201,130,84,82,51,106,163,10,0,96,154,87,157,121,113,64,215,12,104,108,246,165], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 14,
+    "command": "P384Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [249,177,39,240,216,30,188,209,123,123,160,234,19,28,102,13,52,11,5,206,85,124,130,22,14,15,121,61,224,125,56,23,144,35,148,40,113,172,183,0,45,250,253,255,252,141,234,206], \"cfg\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 15,
+    "command": "Secp256k1BaseMulFvsr",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 16,
+    "command": "Secp256k1BaseMulDaisy",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 17,
+    "command": "Secp256k1PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 18,
+    "command": "Secp256k1Ecdh",
+    "input": "{\"private_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 19,
+    "command": "Secp256k1Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 20,
+    "command": "X25519BaseMulFvsr",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 21,
+    "command": "X25519BaseMulDaisy",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 22,
+    "command": "X25519PointMul",
+    "input": "{\"scalar_alice\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"scalar_bob\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 23,
+    "command": "X25519Ecdh",
+    "input": "{\"private_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"public_y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"shared_key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 24,
+    "command": "Ed25519BaseMulFvsr",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 25,
+    "command": "Ed25519BaseMulDaisy",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"num_iterations\": 1, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"x\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"y\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 26,
+    "command": "Ed25519Sign",
+    "input": "{\"scalar\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"message_len\": 128, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"r\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"s\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"pubx\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"puby\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0}"
+    ]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_edn.json b/sw/host/penetrationtests/testvectors/data/sca_edn.json
new file mode 100644
index 0000000000000..5642c5e5a5d86
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_edn.json
@@ -0,0 +1,25 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "BusData",
+     "expected_output": ["{\"rnd_data\":[0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "BusDataBatch",
+    "input": "{\"num_iterations\":16}",
+    "expected_output": ["{\"rnd_data\":[0,0,0,0]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_hmac.json b/sw/host/penetrationtests/testvectors/data/sca_hmac.json
new file mode 100644
index 0000000000000..4fa30ab43217e
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_hmac.json
@@ -0,0 +1,46 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "Single",
+    "key": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "input": "{\"message\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]}",
+    "triggers": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true}",
+    "expected_output": ["{\"tag\":[73,93,70,170,57,45,81,19,46,219,147,188,73,230,14,202,174,183,128,47,58,229,41,119,157,88,131,249,51,10,245,97]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "BatchFvsr",
+    "key": "{\"key\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}",
+    "input": "{\"num_iterations\":25}",
+    "triggers": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true}",
+    "expected_output": ["{\"tag\":[192,77,203,43,23,176,19,12,205,113,216,119,97,208,255,142,18,200,198,77,146,44,154,252,216,123,225,138,66,249,25,64]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "BatchRandom",
+    "input": "{\"num_iterations\":50}",
+    "triggers": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true}",
+    "expected_output": ["{\"tag\":[123,85,194,131,222,60,217,26,56,173,239,45,80,10,109,185,213,248,123,244,64,116,98,36,78,163,186,244,73,168,5,175]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "BatchDaisy",
+    "key": "{\"key\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}",
+    "message": "{\"message\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}",
+    "input": "{\"num_iterations\":50}",
+    "triggers": "{\"start_trigger\": false,\"msg_trigger\": false,\"process_trigger\": false,\"finish_trigger\": true}",
+    "expected_output": ["{\"tag\":[103,74,140,170,39,205,122,108,114,107,25,70,181,31,0,125,179,2,234,65,247,94,174,120,184,254,188,131,192,57,253,167]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_ibex.json b/sw/host/penetrationtests/testvectors/data/sca_ibex.json
new file mode 100644
index 0000000000000..b43c17b16fb3e
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_ibex.json
@@ -0,0 +1,176 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "RFRead",
+    "input": "{\"data\":[7,6,5,4,3,2,1,0]}",
+    "expected_output": ["{\"result\":0}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "RFReadBatchFvsr",
+    "input": "{\"num_iterations\":5,\"fixed_data\":2048}",
+    "expected_output": ["{\"result\":2048}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "RFWrite",
+    "input": "{\"data\":[7,6,5,4,3,2,1,0]}",
+    "expected_output": ["{\"result\":0}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "RFWriteBatchFvsr",
+    "input": "{\"num_iterations\":4,\"fixed_data\":2048}",
+    "expected_output": ["{\"result\":2048}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "TLRead",
+    "input": "{\"data\":[255,255,255,0,0,0,0,0]}",
+    "expected_output": ["{\"result\":0}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "TLReadBatchFvsr",
+    "input": "{\"num_iterations\":1,\"fixed_data\":511}",
+    "expected_output": ["{\"result\":511}"]
+  },
+  {
+    "test_case_id": 8,
+    "command": "TLReadBatchFvsrFixAddress",
+    "input": "{\"num_iterations\":1,\"fixed_data\":11}",
+    "expected_output": ["{\"result\":11}"]
+  },
+  {
+    "test_case_id": 9,
+    "command": "TLWrite",
+    "input": "{\"data\":[255,255,255,0,0,0,0,0]}",
+    "expected_output": ["{\"result\":0}"]
+  },
+  {
+    "test_case_id": 10,
+    "command": "TLWriteBatchFvsr",
+    "input": "{\"num_iterations\":1,\"fixed_data\":511}",
+    "expected_output": ["{\"result\":511}"]
+  },
+  {
+    "test_case_id": 11,
+    "command": "TLWriteBatchFvsrFixAddress",
+    "input": "{\"num_iterations\":1,\"fixed_data\":11}",
+    "expected_output": ["{\"result\":11}"]
+  },
+  {
+    "test_case_id": 12,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":1,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 13,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":2,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,22,0,0,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 14,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":4,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 15,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":8,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,22528,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 16,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":16,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,121,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 17,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":32,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,1,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 18,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":64,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,11,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 19,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":128,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,11,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 20,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":256,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,11,0,0,0]}"]
+  },
+  {
+    "test_case_id": 21,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":512,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,11,0,0]}"]
+  },
+  {
+    "test_case_id": 22,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":1024,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,11,0]}"]
+  },
+  {
+    "test_case_id": 23,
+    "command": "CombiOperationsBatchFvsr",
+    "input": "{\"num_iterations\":1, \"trigger\":2048,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,11]}"]
+  },
+  {
+    "test_case_id": 24,
+    "command": "CombiOperationsBatch",
+    "input": "{\"num_iterations\":1, \"trigger\":1,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 25,
+    "command": "CombiOperationsBatch",
+    "input": "{\"num_iterations\":1, \"trigger\":32,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,1,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 26,
+    "command": "CombiOperationsBatch",
+    "input": "{\"num_iterations\":1, \"trigger\":256,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,11,0,0,0]}"]
+  },
+  {
+    "test_case_id": 27,
+    "command": "CombiOperationsBatch",
+    "input": "{\"num_iterations\":1, \"trigger\":2048,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,0,0,0,0,0,0,0,0,0,0,11]}"]
+  },
+  {
+    "test_case_id": 28,
+    "command": "CombiOperationsBatch",
+    "input": "{\"num_iterations\":1, \"trigger\":4095,\"fixed_data1\":11,\"fixed_data2\":11}",
+    "expected_output": ["{\"result\":[0,22,0,22528,121,1,11,11,11,11,11,11]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_kmac.json b/sw/host/penetrationtests/testvectors/data/sca_kmac.json
new file mode 100644
index 0000000000000..dc44d69c55808
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_kmac.json
@@ -0,0 +1,50 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "mode": "{\"fpga_mode\": 0}",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "SeedLfsr",
+    "input": "{\"seed\": [0,1,2,3]}"
+  },
+  {
+    "test_case_id": 3,
+    "command": "SetKey",
+    "input": "{\"key\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"key_length\":16}"
+  },
+  {
+    "test_case_id": 4,
+    "command": "SingleAbsorb",
+    "input": "{\"msg\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"msg_length\":16}",
+    "expected_output": ["{\"batch_digest\": [164,89,198,16,196,31,134,182,180,36,173,139,40,56,128,186,89,124,163,233,119,44,198,95,38,114,184,190,10,27,80,241]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "FixedKeySet",
+    "input": "{\"key\":[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0],\"key_length\":16}"
+  },
+  {
+    "test_case_id": 6,
+    "command": "Batch",
+    "input": "{\"num_enc\":10}",
+    "expected_output": ["{\"batch_digest\": [157,162,35,240,232,193,138,227,70,197,185,12,160,216,226,178,89,9,133,55,40,67,253,131,60,6,111,205,70,22,142,152]}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "BatchDaisy",
+    "message": "{\"msg\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"msg_length\": 16}",
+    "key": "{\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"key_length\": 16}",
+    "input": "{\"num_enc\":10}",
+    "expected_output": ["{\"digest\": [1,62,226,137,73,51,188,40,107,173,111,241,86,168,232,212]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_otbn.json b/sw/host/penetrationtests/testvectors/data/sca_otbn.json
new file mode 100644
index 0000000000000..cd495218bf473
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_otbn.json
@@ -0,0 +1,51 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "Rsa512Decrypt",
+    "input": "{\"modu\": [1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"exp\": [2,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"msg\": [3,0,0,0,0,0,0,0,0,0,0,0,0,5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,6,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,9]}",
+    "expected_output": ["{\"out\": [1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0]}"]
+  },
+  {
+    "test_case_id": 3,
+    "command": "EcdsaP256Sign",
+    "masking": "{\"en_masks\": false}",
+    "input": "{\"msg\": [0,1,2,3,4,5,6,7],\"d0\": [0,1,2,3,4,5,6,7,8,9],\"k0\": [0,1,2,3,4,5,6,7,8,9]}",
+    "expected_output": ["{\"r\": [147,172,183,187,89,160,232,169,228,225,128,22,176,118,72,165,8,182,237,244,125,78,239,53,65,26,41,38,59,29,94,65],\"s\": [185,68,112,154,164,242,141,58,178,146,102,252,36,245,208,221,146,239,95,75,44,249,254,97,87,160,153,228,231,49,58,114]}"]
+  },
+  {
+    "test_case_id": 4,
+    "command": "CombiOps",
+    "input": "{\"num_iterations\":1,\"fixed_data1\":0,\"fixed_data2\":0, \"print_flag\": true, \"trigger\": 0}",
+    "expected_output": ["{\"result1\":[0,0,0,0,0,0,0,0], \"result2\":[0,0,0,0,0,0,0,0], \"result3\":[0,0,0,0,0,0,0,0], \"result4\":[0,0,0,0,0,0,0,0], \"result5\":[0,0,0,0,0,0,0,0], \"result6\":[0,0,0,0,0,0,0,0], \"result7\":[0,0,0,0,0,0,0,0], \"result8\":8}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "CombiOps",
+    "input": "{\"num_iterations\":1,\"fixed_data1\":1,\"fixed_data2\":1, \"print_flag\": false, \"trigger\": 0}",
+    "expected_output": ["{\"success\": true}"]
+  },
+  {
+    "test_case_id": 6,
+    "command": "CombiOps",
+    "input": "{\"num_iterations\":1,\"fixed_data1\":1,\"fixed_data2\":1, \"print_flag\": true, \"trigger\": 0}",
+    "expected_output": ["{\"result1\":[1,1,1,1,1,1,1,1], \"result2\":[1,1,1,1,1,1,1,1], \"result3\":[2,2,2,2,2,2,2,2], \"result4\":[0,0,0,0,0,0,0,0], \"result5\":[0,0,0,0,0,0,0,0], \"result6\":[2,2,2,2,2,2,2,2], \"result7\":[1,2,1,0,0,0,0,0], \"result8\":8}"]
+  },
+  {
+    "test_case_id": 7,
+    "command": "CombiOps",
+    "input": "{\"num_iterations\":1,\"fixed_data1\":1,\"fixed_data2\":0, \"print_flag\": true, \"trigger\": 0}",
+    "expected_output": ["{\"result1\":[1,1,1,1,1,1,1,1], \"result2\":[1,1,1,1,1,1,1,1], \"result3\":[1,1,1,1,1,1,1,1], \"result4\":[1,1,1,1,1,1,1,1], \"result5\":[1,1,1,1,1,1,1,1], \"result6\":[2,2,2,2,2,2,2,2], \"result7\":[0,0,0,0,0,0,0,0], \"result8\":4}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_sha3.json b/sw/host/penetrationtests/testvectors/data/sca_sha3.json
new file mode 100644
index 0000000000000..b81d3e7fb9889
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_sha3.json
@@ -0,0 +1,50 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "mode": "{\"fpga_mode\": 0}",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true, \"data_ind_timing_en\": true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "SeedLfsr",
+    "input": "{\"seed\": [0,1,2,3]}"
+  },
+  {
+    "test_case_id": 3,
+    "command": "DisableMasking",
+    "input": "{\"masks_off\":0}",
+    "status": "{\"status\":0}"
+  },
+  {
+    "test_case_id": 4,
+    "command": "SingleAbsorb",
+    "input": "{\"msg\":[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"msg_length\":16}",
+    "expected_output": ["{\"batch_digest\":[57,70,45,42,35,32,248,218,87,42,151,176,179,148,115,212,49,46,2,40,178,62,44,47,224,174,155,108,103,242,52,60]}"]
+  },
+  {
+    "test_case_id": 5,
+    "command": "DisableMasking",
+    "input": "{\"masks_off\":0}",
+    "status": "{\"status\":0}"
+  },
+  {
+    "test_case_id": 6,
+    "command": "FixedMessageSet",
+    "input": "{\"msg\":[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0],\"msg_length\":16}"
+  },
+  {
+    "test_case_id": 7,
+    "command": "Batch",
+    "input": "{\"num_enc\":5}",
+    "status": "{\"status\":0}",
+    "expected_output": ["{\"batch_digest\":[78,156,36,44,156,24,252,3,16,68,117,11,55,171,149,58,152,143,114,202,67,172,205,36,169,3,204,103,215,104,166,97]}"]
+  }
+]
diff --git a/sw/host/penetrationtests/testvectors/data/sca_sym_cryptolib.json b/sw/host/penetrationtests/testvectors/data/sca_sym_cryptolib.json
new file mode 100644
index 0000000000000..278889a23466a
--- /dev/null
+++ b/sw/host/penetrationtests/testvectors/data/sca_sym_cryptolib.json
@@ -0,0 +1,102 @@
+[
+  {
+    "test_case_id": 1,
+    "command": "Init",
+    "input": "{\"enable_icache\": true,\"enable_dummy_instr\": true,\"dummy_instr_count\": 3,\"enable_jittery_clock\": true,\"enable_sram_readback\": true, \"enable_data_ind_timing\": true}",
+    "sensors": "{\"sensor_ctrl_enable\": true, \"sensor_ctrl_en_fatal\": [false, false, false, false, false, false, false, false, false, false, false]}",
+    "expected_output": [
+      "{\"device_id\":[0,0,0,0,0,0,0,0],\"rom_digest\":[0,0,0,0,0,0,0,0],\"data_ind_timing_en\":true,\"icache_en\":true,\"dummy_instr_en\":true,\"clock_jitter_locked\":false,\"clock_jitter_en\":true,\"sram_main_readback_locked\":false,\"sram_main_readback_en\":true,\"sram_ret_readback_locked\":false,\"sram_ret_readback_en\":true}",
+      "{\"config_version\":1,\"sram_exec_mode\":0,\"ownership_key_alg\":0,\"update_mode\":0,\"min_security_version_bl0\":0,\"lock_constraint\":0}",
+      "{\"digest\":[0,0,0,0,0,0,0,0],\"identifier\":0,\"scm_revision_low\":0,\"scm_revision_high\":0,\"rom_ext_slot\":0,\"rom_ext_major\":0,\"rom_ext_minor\":1,\"rom_ext_size\":0,\"bl0_slot\":0,\"ownership_state\":0,\"ownership_transfers\":0,\"rom_ext_min_sec_ver\":0,\"bl0_min_sec_ver\":0,\"primary_bl0_slot\":16000078145,\"retention_ram_initialized\":0}",
+      "{\"bl0\":[0,0,0,0,0,0,0,0],\"rom_ext\":[0,0,0,0,0,0,0,0]}",
+      "PENTEST: v0.1.0"]
+  },
+  {
+    "test_case_id": 2,
+    "command": "AesFvsrPlaintext",
+    "input": "{\"data\": [222,136,93,200,127,90,146,89,64,130,208,44,193,225,180,44,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16,\"key\": [128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 24,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 1, \"op_enc\": false, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 3,
+    "command": "AesDaisy",
+    "input": "{\"data\": [222,136,93,200,127,90,146,89,64,130,208,44,193,225,180,44,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16,\"key\": [128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 24,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 1, \"op_enc\": false, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 4,
+    "command": "CmacFvsrPlaintext",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 32,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 5,
+    "command": "CmacDaisy",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 32,\"iv\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 6,
+    "command": "GcmFvsrPlaintext",
+    "input": "{\"data\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 97, 110, 100, 32, 101, 110, 99, 114, 121, 112, 116, 101, 100, 32, 100, 97, 116, 97],\"data_len\": 32,\"key\": [118, 89, 39, 144, 234, 246, 99, 14, 103, 12, 229, 120, 79, 242, 58, 24, 6, 161, 234, 118, 176, 151, 123, 21, 66, 55, 71, 105, 36, 124, 196, 206],\"key_len\": 32,\"aad\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 100, 97, 116, 97],\"aad_len\": 18,\"iv\": [197, 138, 222, 210, 225, 187, 236, 186, 139, 22, 165, 117, 126, 84, 117, 189], \"cfg\": 0, \"trigger\": 0, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[78,109,58,150,59,7,107,160,148,93,41,170,131,111,41,176,250,6,205,213,117,170,184,35,63,29,249,62,128,22,51,113,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"tag\":[50,72,149,179,210,246,86,228,250,47,140,224,86,19,112,97,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"tag_len\":16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 7,
+    "command": "GcmDaisy",
+    "input": "{\"data\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 97, 110, 100, 32, 101, 110, 99, 114, 121, 112, 116, 101, 100, 32, 100, 97, 116, 97],\"data_len\": 32,\"key\": [118, 89, 39, 144, 234, 246, 99, 14, 103, 12, 229, 120, 79, 242, 58, 24, 6, 161, 234, 118, 176, 151, 123, 21, 66, 55, 71, 105, 36, 124, 196, 206],\"key_len\": 32,\"aad\": [97, 117, 116, 104, 101, 110, 116, 105, 99, 97, 116, 101, 100, 32, 100, 97, 116, 97],\"aad_len\": 18,\"iv\": [197, 138, 222, 210, 225, 187, 236, 186, 139, 22, 165, 117, 126, 84, 117, 189], \"cfg\": 0, \"trigger\": 0, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[78,109,58,150,59,7,107,160,148,93,41,170,131,111,41,176,250,6,205,213,117,170,184,35,63,29,249,62,128,22,51,113,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"tag\":[50,72,149,179,210,246,86,228,250,47,140,224,86,19,112,97,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0], \"tag_len\":16, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 8,
+    "command": "TdesFvsrPlaintext",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 21,\"iv\": [0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 0, \"op_enc\": true, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 9,
+    "command": "TdesDaisy",
+    "input": "{\"data\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64,\"key\": [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"key_len\": 21,\"iv\": [0,0,0,0,0,0,0,0], \"padding\": 0, \"mode\": 0, \"op_enc\": true, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 64, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 10,
+    "command": "HmacFvsrPlaintext",
+    "input": "{\"data\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"data_len\": 16,\"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31],\"key_len\": 32, \"padding\": 0, \"mode\": 0, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[216,185,159,39,9,163,202,116,23,44,190,147,130,76,31,41,178,58,12,30,156,33,189,133,31,242,210,195,157,190,241,78,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 11,
+    "command": "HmacDaisy",
+    "input": "{\"data\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"data_len\": 16,\"key\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31],\"key_len\": 32, \"padding\": 0, \"mode\": 0, \"cfg\": 0, \"trigger\": 1, \"num_iterations\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"data\":[216,185,159,39,9,163,202,116,23,44,190,147,130,76,31,41,178,58,12,30,156,33,189,133,31,242,210,195,157,190,241,78,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0],\"data_len\": 32, \"cfg\": 0}"
+    ]
+  },
+  {
+    "test_case_id": 12,
+    "command": "DrbgReseed",
+    "input": "{\"entropy\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"entropy_len\": 32,\"nonce\": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],\"nonce_len\": 16, \"reseed_interval\": 100, \"mode\": 0, \"cfg\": 0, \"trigger\": 1}",
+    "expected_output": [
+      "{\"status\":0, \"cfg\": 0}"
+    ]
+  }
+]
diff --git a/sw/host/penetrationtests/ujson_lib/BUILD b/sw/host/penetrationtests/ujson_lib/BUILD
new file mode 100644
index 0000000000000..47a86169c8b66
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/BUILD
@@ -0,0 +1,185 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+ujson_rust(
+    name = "commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:commands"],
+)
+
+ujson_rust(
+    name = "fi_sym_cryptolib_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:cryptolib_fi_sym_commands"],
+)
+
+ujson_rust(
+    name = "fi_asym_cryptolib_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:cryptolib_fi_asym_commands"],
+)
+
+ujson_rust(
+    name = "fi_crypto_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:crypto_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_ibex_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:ibex_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_lc_ctrl_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:lc_ctrl_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_otbn_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:otbn_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_otp_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:otp_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_rng_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:rng_fi_commands"],
+)
+
+ujson_rust(
+    name = "fi_rom_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:rom_fi_commands"],
+)
+
+ujson_rust(
+    name = "pentest_lib_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:pentest_lib_commands"],
+)
+
+ujson_rust(
+    name = "sca_aes_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:aes_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_sym_cryptolib_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:cryptolib_sca_sym_commands"],
+)
+
+ujson_rust(
+    name = "sca_asym_cryptolib_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:cryptolib_sca_asym_commands"],
+)
+
+ujson_rust(
+    name = "sca_edn_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:edn_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_hmac_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:hmac_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_ibex_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:ibex_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_kmac_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:kmac_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_otbn_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:otbn_sca_commands"],
+)
+
+ujson_rust(
+    name = "sca_sha3_commands_rust",
+    srcs = ["//sw/device/tests/penetrationtests/json:sha3_sca_commands"],
+)
+
+rust_library(
+    name = "pentest_commands",
+    srcs = [
+        "src/commands.rs",
+        "src/fi_asym_cryptolib_commands.rs",
+        "src/fi_crypto_commands.rs",
+        "src/fi_ibex_commands.rs",
+        "src/fi_lc_ctrl_commands.rs",
+        "src/fi_otbn_commands.rs",
+        "src/fi_otp_commands.rs",
+        "src/fi_rng_commands.rs",
+        "src/fi_rom_commands.rs",
+        "src/fi_sym_cryptolib_commands.rs",
+        "src/lib.rs",
+        "src/pentest_lib_commands.rs",
+        "src/sca_aes_commands.rs",
+        "src/sca_asym_cryptolib_commands.rs",
+        "src/sca_edn_commands.rs",
+        "src/sca_hmac_commands.rs",
+        "src/sca_ibex_commands.rs",
+        "src/sca_kmac_commands.rs",
+        "src/sca_otbn_commands.rs",
+        "src/sca_sha3_commands.rs",
+        "src/sca_sym_cryptolib_commands.rs",
+    ],
+    compile_data = [
+        ":commands_rust",
+        ":fi_crypto_commands_rust",
+        ":fi_sym_cryptolib_commands_rust",
+        ":fi_asym_cryptolib_commands_rust",
+        ":fi_ibex_commands_rust",
+        ":fi_lc_ctrl_commands_rust",
+        ":fi_otbn_commands_rust",
+        ":fi_otp_commands_rust",
+        ":fi_rng_commands_rust",
+        ":fi_rom_commands_rust",
+        ":pentest_lib_commands_rust",
+        ":sca_aes_commands_rust",
+        ":sca_sym_cryptolib_commands_rust",
+        ":sca_asym_cryptolib_commands_rust",
+        ":sca_edn_commands_rust",
+        ":sca_hmac_commands_rust",
+        ":sca_ibex_commands_rust",
+        ":sca_kmac_commands_rust",
+        ":sca_otbn_commands_rust",
+        ":sca_sha3_commands_rust",
+    ],
+    rustc_env = {
+        "commands_loc": "$(execpath :commands_rust)",
+        "fi_crypto_commands_loc": "$(execpath :fi_crypto_commands_rust)",
+        "fi_sym_cryptolib_commands_loc": "$(execpath :fi_sym_cryptolib_commands_rust)",
+        "fi_asym_cryptolib_commands_loc": "$(execpath :fi_asym_cryptolib_commands_rust)",
+        "fi_ibex_commands_loc": "$(execpath :fi_ibex_commands_rust)",
+        "fi_lc_ctrl_commands_loc": "$(execpath :fi_lc_ctrl_commands_rust)",
+        "fi_otbn_commands_loc": "$(execpath :fi_otbn_commands_rust)",
+        "fi_otp_commands_loc": "$(execpath :fi_otp_commands_rust)",
+        "fi_rng_commands_loc": "$(execpath :fi_rng_commands_rust)",
+        "fi_rom_commands_loc": "$(execpath :fi_rom_commands_rust)",
+        "pentest_lib_commands_loc": "$(execpath :pentest_lib_commands_rust)",
+        "sca_aes_commands_loc": "$(execpath :sca_aes_commands_rust)",
+        "sca_sym_cryptolib_commands_loc": "$(execpath :sca_sym_cryptolib_commands_rust)",
+        "sca_asym_cryptolib_commands_loc": "$(execpath :sca_asym_cryptolib_commands_rust)",
+        "sca_edn_commands_loc": "$(execpath :sca_edn_commands_rust)",
+        "sca_hmac_commands_loc": "$(execpath :sca_hmac_commands_rust)",
+        "sca_ibex_commands_loc": "$(execpath :sca_ibex_commands_rust)",
+        "sca_kmac_commands_loc": "$(execpath :sca_kmac_commands_rust)",
+        "sca_otbn_commands_loc": "$(execpath :sca_otbn_commands_rust)",
+        "sca_sha3_commands_loc": "$(execpath :sca_sha3_commands_rust)",
+    },
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:arrayvec",
+        "@crate_index//:serde",
+        "@crate_index//:strum",
+    ],
+)
diff --git a/sw/host/penetrationtests/ujson_lib/src/commands.rs b/sw/host/penetrationtests/ujson_lib/src/commands.rs
new file mode 100644
index 0000000000000..40d8df77b6c3a
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_asym_cryptolib_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_asym_cryptolib_commands.rs
new file mode 100644
index 0000000000000..572152b334286
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_asym_cryptolib_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_asym_cryptolib_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_crypto_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_crypto_commands.rs
new file mode 100644
index 0000000000000..c4b4699a13c3b
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_crypto_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_crypto_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_ibex_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_ibex_commands.rs
new file mode 100644
index 0000000000000..8589a6c33f3b9
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_ibex_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_ibex_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_lc_ctrl_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_lc_ctrl_commands.rs
new file mode 100644
index 0000000000000..0a1be0136541f
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_lc_ctrl_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_lc_ctrl_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_otbn_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_otbn_commands.rs
new file mode 100644
index 0000000000000..5cee3c6d3f26a
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_otbn_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_otbn_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_otp_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_otp_commands.rs
new file mode 100644
index 0000000000000..9a6c1a5024dfa
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_otp_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_otp_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_rng_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_rng_commands.rs
new file mode 100644
index 0000000000000..580147ddd9782
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_rng_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_rng_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_rom_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_rom_commands.rs
new file mode 100644
index 0000000000000..25652d6c75578
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_rom_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_rom_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/fi_sym_cryptolib_commands.rs b/sw/host/penetrationtests/ujson_lib/src/fi_sym_cryptolib_commands.rs
new file mode 100644
index 0000000000000..60e9406fdd647
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/fi_sym_cryptolib_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("fi_sym_cryptolib_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/lib.rs b/sw/host/penetrationtests/ujson_lib/src/lib.rs
new file mode 100644
index 0000000000000..2e497f2a1f254
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/lib.rs
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+pub mod commands;
+pub mod fi_asym_cryptolib_commands;
+pub mod fi_crypto_commands;
+pub mod fi_ibex_commands;
+pub mod fi_lc_ctrl_commands;
+pub mod fi_otbn_commands;
+pub mod fi_otp_commands;
+pub mod fi_rng_commands;
+pub mod fi_rom_commands;
+pub mod fi_sym_cryptolib_commands;
+pub mod pentest_lib_commands;
+pub mod sca_aes_commands;
+pub mod sca_asym_cryptolib_commands;
+pub mod sca_edn_commands;
+pub mod sca_hmac_commands;
+pub mod sca_ibex_commands;
+pub mod sca_kmac_commands;
+pub mod sca_otbn_commands;
+pub mod sca_sha3_commands;
+pub mod sca_sym_cryptolib_commands;
diff --git a/sw/host/penetrationtests/ujson_lib/src/pentest_lib_commands.rs b/sw/host/penetrationtests/ujson_lib/src/pentest_lib_commands.rs
new file mode 100644
index 0000000000000..39a1f2a38a145
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/pentest_lib_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("pentest_lib_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_aes_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_aes_commands.rs
new file mode 100644
index 0000000000000..62c8e326ffc14
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_aes_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_aes_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_asym_cryptolib_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_asym_cryptolib_commands.rs
new file mode 100644
index 0000000000000..8696769c37f94
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_asym_cryptolib_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_asym_cryptolib_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_edn_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_edn_commands.rs
new file mode 100644
index 0000000000000..281c058fa094c
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_edn_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_edn_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_hmac_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_hmac_commands.rs
new file mode 100644
index 0000000000000..1e5ff4ef09356
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_hmac_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_hmac_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_ibex_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_ibex_commands.rs
new file mode 100644
index 0000000000000..fa92cb06a5966
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_ibex_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_ibex_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_kmac_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_kmac_commands.rs
new file mode 100644
index 0000000000000..11e93a204a812
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_kmac_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_kmac_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_otbn_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_otbn_commands.rs
new file mode 100644
index 0000000000000..fc10d4f411563
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_otbn_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_otbn_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_sha3_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_sha3_commands.rs
new file mode 100644
index 0000000000000..2f2e7cbd760fb
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_sha3_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_sha3_commands_loc"));
diff --git a/sw/host/penetrationtests/ujson_lib/src/sca_sym_cryptolib_commands.rs b/sw/host/penetrationtests/ujson_lib/src/sca_sym_cryptolib_commands.rs
new file mode 100644
index 0000000000000..dba92c2b9a67e
--- /dev/null
+++ b/sw/host/penetrationtests/ujson_lib/src/sca_sym_cryptolib_commands.rs
@@ -0,0 +1,4 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+include!(env!("sca_sym_cryptolib_commands_loc"));
diff --git a/sw/host/provisioning/cert_lib/BUILD b/sw/host/provisioning/cert_lib/BUILD
index 515b9912df50c..205135c0a76ef 100644
--- a/sw/host/provisioning/cert_lib/BUILD
+++ b/sw/host/provisioning/cert_lib/BUILD
@@ -9,18 +9,21 @@ package(default_visibility = ["//visibility:public"])
 rust_library(
     name = "cert_lib",
     srcs = ["src/lib.rs"],
-    data = ["//sw/device/silicon_creator/manuf/keys/fake:fake_ca.pem"],
+    data = ["//sw/device/silicon_creator/manuf/keys/fake:ext_ca.pem"],
     deps = [
         "//sw/host/opentitanlib",
         "//sw/host/ot_certs",
         "@crate_index//:anyhow",
         "@crate_index//:arrayvec",
+        "@crate_index//:base64ct",
         "@crate_index//:elliptic-curve",
         "@crate_index//:hex",
         "@crate_index//:log",
         "@crate_index//:num-bigint-dig",
         "@crate_index//:openssl",
         "@crate_index//:p256",
+        "@crate_index//:serde",
+        "@hwtrust",
     ],
 )
 
diff --git a/sw/host/provisioning/cert_lib/src/lib.rs b/sw/host/provisioning/cert_lib/src/lib.rs
index 8fbbc887ee9d9..359c9d223720f 100644
--- a/sw/host/provisioning/cert_lib/src/lib.rs
+++ b/sw/host/provisioning/cert_lib/src/lib.rs
@@ -2,22 +2,61 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use std::env;
 use std::fs::{self, OpenOptions};
 use std::io::{Read, Write};
+use std::path::PathBuf;
 use std::process::Command;
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
+use base64ct::{Base64, Encoding};
 use elliptic_curve::SecretKey;
+use hwtrust::dice::ChainForm;
+use hwtrust::session::Session;
 use num_bigint_dig::BigUint;
 use openssl::ecdsa::EcdsaSig;
-use p256::ecdsa::SigningKey;
 use p256::NistP256;
+use p256::ecdsa::SigningKey;
+use serde::{Deserialize, Serialize, Serializer};
 
-use opentitanlib::crypto::sha256::sha256;
+use opentitanlib::crypto::sha256::Sha256Digest;
 use opentitanlib::util::tmpfilename;
+use ot_certs::CertFormat;
+use ot_certs::cbor;
 use ot_certs::template::{EcdsaSignature, Signature, Value};
 use ot_certs::x509::generate_certificate_from_tbs;
 
+/// Certificate Authority key type.
+#[derive(Debug, Clone, Deserialize)]
+pub enum CaKeyType {
+    Raw,
+    Token,
+}
+
+/// Certificate Authority key input formats.
+///
+/// The following ECC P256 private key representations are supported:
+///   1. RawKey: provided as a file path pointing to a DER encoded key file.
+///   2. TokenKey: provided as a PKCS#11 token ID string.
+#[derive(Debug, Clone)]
+pub enum CaKey {
+    RawKey(SecretKey<NistP256>),
+    TokenKey(String),
+}
+
+/// Certificate Authority (CA) parameters.
+#[derive(Debug, Clone, Deserialize)]
+pub struct CaConfig {
+    /// CA certificate PEM file path.
+    pub certificate: PathBuf,
+    /// CA certificate key ID (160-bit hex string serial number used in CA certificate).
+    pub key_id: String,
+    /// CA key type.
+    pub key_type: CaKeyType,
+    /// CA key (file path to raw key DER file or Cloud KMS key ID).
+    pub key: String,
+}
+
 /// Execute an openssl invocation, passing the args[] as command line parameters.
 ///
 /// The intended use is openssl x509 certificate verification. cert_num is the
@@ -56,28 +95,20 @@ pub fn get_cert_size(cert: &[u8]) -> Result<usize> {
     Ok(size)
 }
 
-/// This provides two different certificate signing key representations:
-///   1. a SecretKey object in case of fake key or a String object, or
-///   2. the ID of the key used by Google Cloud KMS.
-pub enum CertEndorsementKey {
-    LocalKey(SecretKey<NistP256>),
-    CkmsKey(String),
-}
-
 /// Parses an X.509 ASN.1 DER encoded certificate, signs it with the specified
 /// key, and attaches a signature to it.
-pub fn parse_and_endorse_x509_cert(tbs: Vec<u8>, key: &CertEndorsementKey) -> Result<Vec<u8>> {
+pub fn parse_and_endorse_x509_cert(tbs: Vec<u8>, key: &CaKey) -> Result<Vec<u8>> {
     match key {
-        CertEndorsementKey::CkmsKey(key_id) => parse_and_endorse_x509_cert_ckms(tbs, key_id),
-        CertEndorsementKey::LocalKey(ca_sk) => parse_and_endorse_x509_cert_local(tbs, ca_sk),
+        CaKey::TokenKey(key_id) => parse_and_endorse_x509_cert_token(tbs, key_id),
+        CaKey::RawKey(sk) => parse_and_endorse_x509_cert_raw(tbs, sk),
     }
 }
 
-fn parse_and_endorse_x509_cert_local(tbs: Vec<u8>, ca_sk: &SecretKey<NistP256>) -> Result<Vec<u8>> {
+fn parse_and_endorse_x509_cert_raw(tbs: Vec<u8>, ca_sk: &SecretKey<NistP256>) -> Result<Vec<u8>> {
     // Hash and sign the TBS.
-    let tbs_digest = sha256(&tbs);
+    let tbs_digest = Sha256Digest::hash(&tbs);
     let signing_key = SigningKey::from(ca_sk);
-    let (tbs_signature, _) = signing_key.sign_prehash_recoverable(&tbs_digest.to_be_bytes())?;
+    let (tbs_signature, _) = signing_key.sign_prehash_recoverable(tbs_digest.as_ref())?;
     let (r, s) = tbs_signature.split_bytes();
 
     // Reformat the signature.
@@ -92,7 +123,7 @@ fn parse_and_endorse_x509_cert_local(tbs: Vec<u8>, ca_sk: &SecretKey<NistP256>)
     generate_certificate_from_tbs(tbs, &signature)
 }
 
-fn parse_and_endorse_x509_cert_ckms(tbs: Vec<u8>, ckms_key_id: &str) -> Result<Vec<u8>> {
+fn parse_and_endorse_x509_cert_token(tbs: Vec<u8>, key_id: &str) -> Result<Vec<u8>> {
     // Let openssl hash and sign the TBS.
     let base_name = tmpfilename("cert_signing");
     let binding_tbs = base_name.to_owned() + ".tbs";
@@ -110,7 +141,8 @@ fn parse_and_endorse_x509_cert_ckms(tbs: Vec<u8>, ckms_key_id: &str) -> Result<V
     file.write_all(&tbs)?;
     drop(file);
 
-    let binding_key = String::from("pkcs11:object=") + ckms_key_id;
+    let token_pin = env::var("PKCS11_TOKEN_PIN")?;
+    let key_uri = format!("pkcs11:pin-value={};object={}", token_pin, key_id);
     openssl_command(&[
         "dgst",
         "-sha256",
@@ -119,7 +151,7 @@ fn parse_and_endorse_x509_cert_ckms(tbs: Vec<u8>, ckms_key_id: &str) -> Result<V
         "-keyform",
         "engine",
         "-sign",
-        binding_key.as_str(),
+        key_uri.as_str(),
         "-out",
         sig_filename,
         tbs_filename,
@@ -150,50 +182,160 @@ fn parse_and_endorse_x509_cert_ckms(tbs: Vec<u8>, ckms_key_id: &str) -> Result<V
     generate_certificate_from_tbs(tbs, &signature)
 }
 
-/// Validate a collection of X.509 certificates using 'openssl verify ...' command.
-///
-/// Each certificate in the collection is validated against the provided CA.
-///
-/// Arguments:
-/// * ca_pem - The file name of the CA certificate saved in PEM format.
-/// * certs  - A vector of certificate binary blobs.
-pub fn validate_certs_chain(ca_pem: &str, certs: &[Vec<u8>]) -> Result<()> {
-    let base_name = tmpfilename("cert_validation");
+fn write_cert_to_temp_pem_file(der_cert_bytes: &[u8], base_filename: &str) -> Result<String> {
+    // Build temp file names for DER and PEM cert files.
+    let base_name = tmpfilename(base_filename);
     let binding_der = base_name.to_owned() + ".der";
     let binding_pem = base_name.to_owned() + ".pem";
-
     let der_filename = binding_der.as_str();
     let pem_filename = binding_pem.as_str();
 
-    for cert in certs.iter() {
-        let size = get_cert_size(cert)?;
-        let mut file = OpenOptions::new()
-            .write(true)
-            .truncate(true)
-            .create(true)
-            .open(der_filename)
-            .context("failed to open temporary der file")?;
-        file.write_all(&cert[0..size])?;
-        drop(file);
-
-        openssl_command(&[
-            "x509",
-            "-out",
-            pem_filename,
-            "-in",
-            der_filename,
-            "-inform",
-            "der",
-        ])
-        .context("failed to covert DER to PEM")?;
-
-        // Validate with the fake CA certificate.
-        openssl_command(&["verify", "-CAfile", ca_pem, pem_filename])
-            .context("failed to verify a certificate chain")?;
-    }
+    // Write DER bytes to the tmp file.
+    let size = get_cert_size(der_cert_bytes)?;
+    let mut file = OpenOptions::new()
+        .write(true)
+        .truncate(true)
+        .create(true)
+        .open(der_filename)
+        .context(format!(
+            "failed to open temporary DER file: {:?}",
+            der_filename
+        ))?;
+    file.write_all(&der_cert_bytes[0..size])?;
+    drop(file);
 
+    // Convert the DER cert file to a PEM cert file.
+    openssl_command(&[
+        "x509",
+        "-out",
+        pem_filename,
+        "-in",
+        der_filename,
+        "-inform",
+        "der",
+    ])
+    .context(format!(
+        "failed to covert DER file ({:?}) to PEM",
+        der_filename
+    ))?;
+
+    // Cleanup the intermediate DER file.
     fs::remove_file(der_filename).context("failed to remove der file")?;
-    fs::remove_file(pem_filename).context("failed to remove pem file")?;
+
+    Ok(binding_pem)
+}
+
+fn serialize_certificate<S: Serializer>(cert: &Vec<u8>, serializer: S) -> Result<S::Ok, S::Error> {
+    let s = Base64::encode_string(cert.as_slice());
+    serializer.serialize_str(&s)
+}
+
+/// Container for an endorsed certificate.
+///
+/// This is used to pass a collection of endorsed certificates, along with metadata,
+/// to various functions that check the certificates validate properly with third-party
+/// tools.
+#[derive(Clone, Debug, Serialize)]
+pub struct EndorsedCert {
+    pub format: CertFormat,
+    pub name: String,
+    #[serde(serialize_with = "serialize_certificate")]
+    pub bytes: Vec<u8>,
+    pub ignore_critical: bool,
+}
+
+/// Validate a CWT DICE chain.
+///
+/// A CWT DICE chain is validated using 'hwtrust'.
+///
+/// Arguments:
+/// * cert_chain - A slice of EndorsedCert objects representing a chain ordered from root to leaf.
+pub fn validate_cwt_dice_chain(cert_chain: &[EndorsedCert]) -> Result<()> {
+    if !cert_chain
+        .iter()
+        .all(|c| matches!(c.format, CertFormat::Cwt))
+    {
+        bail!(
+            "A non-CWT cert found in the CWT cert chain. {:?}",
+            cert_chain
+        );
+    }
+
+    let header = cbor::array_header(
+        cert_chain
+            .len()
+            .try_into()
+            .context("Cannot convert the size of the cert chain from usize to u64.")?,
+    );
+
+    let mut bytes = header;
+
+    for cert in cert_chain {
+        bytes.append(&mut cert.bytes.clone());
+    }
+
+    let session = Session::default();
+    let chain = ChainForm::from_cbor(&session, &bytes).context("Not a valid CWT DICE chain.")?;
+
+    if matches!(chain, ChainForm::Degenerate(_)) {
+        bail!("Degenerate CWT DICE chain.");
+    }
+
+    Ok(())
+}
+
+/// Validate a chain of X.509 certificates against a provided CA certificate.
+///
+/// A chain of X.509 certificates are validated against the CA using the 'openssl verify ...' command.
+///
+/// Arguments:
+/// * ca_pem - The file name of the CA certificate saved in PEM format.
+/// * cert_chain - A slice of EndorsedCert objects representing a chain ordered from root to leaf.
+pub fn validate_cert_chain(ca_pem: &str, cert_chain: &[EndorsedCert]) -> Result<()> {
+    let mut ignore_critical = false;
+
+    // Create temp CA PEM file.
+    let tmp_ca_pem_filename_binding = tmpfilename("tmp_ca_chain.pem");
+    let tmp_ca_pem_filename = tmp_ca_pem_filename_binding.as_str();
+    fs::copy(ca_pem, tmp_ca_pem_filename)?;
+
+    // Iterate over leaf certs.
+    let mut tmp_leaf_cert_pem_filename: String = "".to_string();
+    for cert in cert_chain.iter() {
+        // Overwrite the current leaf cert PEM file.
+        tmp_leaf_cert_pem_filename = write_cert_to_temp_pem_file(&cert.bytes, "leaf")?;
+
+        // If a cert in the chain has a critical custom extension, we need to
+        // tell OpenSSL to ignore it from here out. The `-ignore_critical` flag
+        // is required to verify DICE certificates that use the DiceTcbInfo
+        // custom extension that is a TCG standard (critical) extension that is
+        // not recognized by OpenSSL.
+        if cert.ignore_critical {
+            ignore_critical = true;
+        }
+
+        // Verify the cert chain up to the current leaf cert.
+        let mut args = vec!["verify", "-CAfile", tmp_ca_pem_filename];
+        if ignore_critical {
+            args.push("-ignore_critical");
+        }
+        args.push(tmp_leaf_cert_pem_filename.as_str());
+        openssl_command(&args).context(format!(
+            "failed to verify a certificate chain at {:?} cert",
+            cert.name.as_str()
+        ))?;
+
+        // Append the current leaf cert to the CA PEM file.
+        let mut tmp_ca_file = OpenOptions::new().append(true).open(tmp_ca_pem_filename)?;
+        let leaf_cert_pem_contents = fs::read(tmp_leaf_cert_pem_filename.as_str())?;
+        tmp_ca_file.write_all(&leaf_cert_pem_contents)?;
+        drop(tmp_ca_file);
+    }
+
+    // Cleanup the temp PEM cert files.
+    fs::remove_file(tmp_ca_pem_filename).context("failed to remove temp CA PEM file")?;
+    fs::remove_file(tmp_leaf_cert_pem_filename.as_str())
+        .context("failed to remove temp leaf PEM file")?;
 
     Ok(())
 }
@@ -204,109 +346,51 @@ mod tests {
 
     #[test]
     fn validate_good() {
-        let ca_pem = "./sw/device/silicon_creator/manuf/keys/fake/fake_ca.pem";
-        // The below byte blobs are proper TPM EK, TPM CEK and TPM CIK certificates
-        // generated during test runs.
-        let mut cert0: Vec<u8> = vec![
-            48, 130, 2, 30, 48, 130, 1, 195, 160, 3, 2, 1, 2, 2, 21, 0, 254, 88, 74, 231, 83, 121,
-            12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134,
-            72, 206, 61, 4, 3, 2, 48, 98, 49, 11, 48, 9, 6, 3, 85, 4, 6, 19, 2, 85, 83, 49, 11, 48,
-            9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3, 85, 4, 10, 12, 6, 71, 111, 111,
-            103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11, 69, 110, 103, 105, 110, 101,
-            101, 114, 105, 110, 103, 49, 31, 48, 29, 6, 3, 85, 4, 3, 12, 22, 71, 111, 111, 103,
-            108, 101, 32, 69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 32, 73, 67, 65, 48,
-            34, 24, 15, 50, 48, 50, 51, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 24, 15, 50, 48,
-            53, 48, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 48, 91, 49, 11, 48, 9, 6, 3, 85, 4,
-            6, 19, 2, 85, 83, 49, 11, 48, 9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3,
-            85, 4, 10, 12, 6, 71, 111, 111, 103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11,
-            69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 49, 24, 48, 22, 6, 3, 85, 4, 3,
-            12, 15, 79, 84, 32, 84, 105, 53, 48, 32, 84, 80, 77, 32, 67, 69, 75, 48, 89, 48, 19, 6,
-            7, 42, 134, 72, 206, 61, 2, 1, 6, 8, 42, 134, 72, 206, 61, 3, 1, 7, 3, 66, 0, 4, 75,
-            36, 92, 59, 242, 87, 205, 181, 243, 64, 67, 94, 55, 61, 212, 203, 207, 248, 209, 47,
-            241, 223, 36, 175, 158, 22, 108, 92, 42, 51, 192, 39, 17, 132, 53, 214, 61, 160, 143,
-            166, 32, 42, 135, 52, 200, 241, 109, 217, 83, 200, 241, 175, 120, 194, 83, 63, 228,
-            215, 73, 172, 68, 56, 35, 128, 163, 89, 48, 87, 48, 15, 6, 3, 85, 29, 15, 1, 1, 255, 4,
-            5, 3, 3, 7, 4, 0, 48, 34, 6, 3, 85, 29, 35, 1, 1, 0, 4, 24, 48, 22, 128, 20, 254, 88,
-            74, 231, 83, 121, 12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48,
-            32, 6, 3, 85, 29, 14, 1, 1, 0, 4, 22, 4, 20, 254, 88, 74, 231, 83, 121, 12, 253, 134,
-            1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134, 72, 206, 61, 4,
-            3, 2, 3, 73, 0, 48, 70, 2, 33, 0, 240, 38, 63, 102, 107, 249, 121, 172, 4, 241, 107,
-            165, 35, 37, 171, 90, 48, 66, 147, 139, 113, 70, 180, 79, 150, 47, 104, 12, 150, 152,
-            148, 164, 2, 33, 0, 230, 94, 91, 132, 244, 223, 193, 68, 55, 152, 134, 144, 23, 170,
-            127, 50, 192, 212, 197, 249, 142, 111, 169, 74, 208, 28, 153, 239, 199, 225, 252, 3,
-        ];
-        let cert1: Vec<u8> = vec![
-            48, 130, 2, 30, 48, 130, 1, 196, 160, 3, 2, 1, 2, 2, 21, 0, 254, 88, 74, 231, 83, 121,
-            12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134,
-            72, 206, 61, 4, 3, 2, 48, 98, 49, 11, 48, 9, 6, 3, 85, 4, 6, 19, 2, 85, 83, 49, 11, 48,
-            9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3, 85, 4, 10, 12, 6, 71, 111, 111,
-            103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11, 69, 110, 103, 105, 110, 101,
-            101, 114, 105, 110, 103, 49, 31, 48, 29, 6, 3, 85, 4, 3, 12, 22, 71, 111, 111, 103,
-            108, 101, 32, 69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 32, 73, 67, 65, 48,
-            34, 24, 15, 50, 48, 50, 51, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 24, 15, 50, 48,
-            53, 48, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 48, 92, 49, 12, 48, 10, 6, 3, 85,
-            4, 6, 19, 3, 85, 83, 65, 49, 11, 48, 9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13,
-            6, 3, 85, 4, 10, 12, 6, 71, 111, 111, 103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11,
-            12, 11, 69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 49, 24, 48, 22, 6, 3, 85,
-            4, 3, 12, 15, 79, 84, 32, 84, 105, 53, 48, 32, 84, 80, 77, 32, 67, 73, 75, 48, 89, 48,
-            19, 6, 7, 42, 134, 72, 206, 61, 2, 1, 6, 8, 42, 134, 72, 206, 61, 3, 1, 7, 3, 66, 0, 4,
-            23, 2, 208, 197, 46, 115, 49, 121, 86, 105, 156, 23, 214, 86, 136, 68, 165, 14, 47, 42,
-            160, 138, 115, 31, 18, 244, 254, 181, 94, 24, 82, 33, 10, 216, 173, 10, 33, 196, 106,
-            167, 143, 159, 150, 126, 119, 105, 95, 94, 173, 171, 168, 79, 117, 84, 122, 225, 159,
-            199, 136, 15, 158, 63, 203, 182, 163, 89, 48, 87, 48, 15, 6, 3, 85, 29, 15, 1, 1, 255,
-            4, 5, 3, 3, 7, 4, 0, 48, 34, 6, 3, 85, 29, 35, 1, 1, 0, 4, 24, 48, 22, 128, 20, 254,
-            88, 74, 231, 83, 121, 12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18,
-            48, 32, 6, 3, 85, 29, 14, 1, 1, 0, 4, 22, 4, 20, 254, 88, 74, 231, 83, 121, 12, 253,
-            134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134, 72, 206,
-            61, 4, 3, 2, 3, 72, 0, 48, 69, 2, 33, 0, 168, 91, 65, 85, 113, 153, 190, 161, 53, 216,
-            6, 110, 144, 236, 235, 241, 120, 29, 68, 169, 78, 127, 249, 176, 134, 165, 37, 201, 53,
-            153, 67, 23, 2, 32, 43, 141, 139, 0, 178, 8, 79, 249, 88, 149, 79, 111, 71, 89, 118,
-            215, 184, 234, 135, 64, 141, 49, 185, 235, 162, 11, 75, 151, 237, 211, 126, 3,
-        ];
-        let cert2: Vec<u8> = vec![
-            48, 130, 2, 120, 48, 130, 2, 31, 160, 3, 2, 1, 2, 2, 21, 0, 254, 88, 74, 231, 83, 121,
-            12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134,
-            72, 206, 61, 4, 3, 2, 48, 98, 49, 11, 48, 9, 6, 3, 85, 4, 6, 19, 2, 85, 83, 49, 11, 48,
-            9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3, 85, 4, 10, 12, 6, 71, 111, 111,
-            103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11, 69, 110, 103, 105, 110, 101,
-            101, 114, 105, 110, 103, 49, 31, 48, 29, 6, 3, 85, 4, 3, 12, 22, 71, 111, 111, 103,
-            108, 101, 32, 69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 32, 73, 67, 65, 48,
-            34, 24, 15, 50, 48, 50, 51, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 24, 15, 50, 48,
-            53, 48, 48, 49, 48, 49, 48, 48, 48, 48, 48, 48, 90, 48, 91, 49, 12, 48, 10, 6, 3, 85,
-            4, 6, 19, 3, 85, 83, 65, 49, 11, 48, 9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13,
-            6, 3, 85, 4, 10, 12, 6, 71, 111, 111, 103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11,
-            12, 11, 69, 110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 49, 23, 48, 21, 6, 3, 85,
-            4, 3, 12, 14, 79, 84, 32, 84, 105, 53, 48, 32, 84, 80, 77, 32, 69, 75, 48, 89, 48, 19,
-            6, 7, 42, 134, 72, 206, 61, 2, 1, 6, 8, 42, 134, 72, 206, 61, 3, 1, 7, 3, 66, 0, 4, 35,
-            64, 229, 133, 12, 236, 28, 25, 38, 236, 216, 29, 0, 26, 245, 51, 42, 42, 25, 195, 175,
-            11, 91, 100, 98, 246, 216, 83, 114, 149, 55, 0, 42, 239, 136, 47, 16, 228, 64, 214, 34,
-            187, 164, 143, 120, 232, 148, 219, 93, 47, 206, 9, 22, 74, 236, 168, 12, 71, 249, 167,
-            144, 83, 247, 113, 163, 129, 180, 48, 129, 177, 48, 15, 6, 3, 85, 29, 19, 1, 1, 255, 4,
-            5, 48, 3, 1, 1, 0, 48, 71, 6, 3, 85, 29, 17, 1, 1, 0, 4, 61, 48, 59, 164, 57, 48, 55,
-            49, 18, 48, 16, 6, 5, 103, 129, 5, 2, 1, 12, 7, 78, 117, 118, 111, 116, 111, 110, 49,
-            15, 48, 13, 6, 5, 103, 129, 5, 2, 2, 12, 4, 84, 105, 53, 48, 49, 16, 48, 14, 6, 5, 103,
-            129, 5, 2, 3, 12, 5, 48, 46, 48, 46, 49, 48, 15, 6, 3, 85, 29, 15, 1, 1, 255, 4, 5, 3,
-            3, 7, 4, 0, 48, 34, 6, 3, 85, 29, 35, 1, 1, 0, 4, 24, 48, 22, 128, 20, 254, 88, 74,
-            231, 83, 121, 12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 32, 6,
-            3, 85, 29, 14, 1, 1, 0, 4, 22, 4, 20, 254, 88, 74, 231, 83, 121, 12, 253, 134, 1, 163,
-            18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134, 72, 206, 61, 4, 3, 2,
-            3, 71, 0, 48, 68, 2, 32, 59, 137, 187, 122, 144, 29, 233, 183, 34, 136, 15, 198, 224,
-            76, 4, 142, 107, 206, 21, 193, 69, 82, 158, 66, 52, 5, 7, 143, 0, 128, 166, 12, 2, 32,
-            47, 221, 22, 12, 155, 16, 223, 208, 245, 225, 214, 31, 180, 72, 22, 35, 219, 11, 15,
-            135, 6, 228, 81, 120, 178, 122, 236, 127, 160, 134, 84, 95,
-        ];
+        let ca_pem = "./sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem";
+        // The below byte blob is a proper TPM EK certificate generated during test runs.
+        let mut cert0 = EndorsedCert {
+            format: CertFormat::X509,
+            name: "cert0".to_string(),
+            ignore_critical: false,
+            bytes: vec![
+                48, 130, 2, 30, 48, 130, 1, 195, 160, 3, 2, 1, 2, 2, 21, 0, 254, 88, 74, 231, 83,
+                121, 12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8,
+                42, 134, 72, 206, 61, 4, 3, 2, 48, 98, 49, 11, 48, 9, 6, 3, 85, 4, 6, 19, 2, 85,
+                83, 49, 11, 48, 9, 6, 3, 85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3, 85, 4, 10,
+                12, 6, 71, 111, 111, 103, 108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11, 69,
+                110, 103, 105, 110, 101, 101, 114, 105, 110, 103, 49, 31, 48, 29, 6, 3, 85, 4, 3,
+                12, 22, 71, 111, 111, 103, 108, 101, 32, 69, 110, 103, 105, 110, 101, 101, 114,
+                105, 110, 103, 32, 73, 67, 65, 48, 34, 24, 15, 50, 48, 50, 51, 48, 49, 48, 49, 48,
+                48, 48, 48, 48, 48, 90, 24, 15, 50, 48, 53, 48, 48, 49, 48, 49, 48, 48, 48, 48, 48,
+                48, 90, 48, 91, 49, 11, 48, 9, 6, 3, 85, 4, 6, 19, 2, 85, 83, 49, 11, 48, 9, 6, 3,
+                85, 4, 8, 12, 2, 67, 65, 49, 15, 48, 13, 6, 3, 85, 4, 10, 12, 6, 71, 111, 111, 103,
+                108, 101, 49, 20, 48, 18, 6, 3, 85, 4, 11, 12, 11, 69, 110, 103, 105, 110, 101,
+                101, 114, 105, 110, 103, 49, 24, 48, 22, 6, 3, 85, 4, 3, 12, 15, 79, 84, 32, 84,
+                105, 53, 48, 32, 84, 80, 77, 32, 67, 69, 75, 48, 89, 48, 19, 6, 7, 42, 134, 72,
+                206, 61, 2, 1, 6, 8, 42, 134, 72, 206, 61, 3, 1, 7, 3, 66, 0, 4, 75, 36, 92, 59,
+                242, 87, 205, 181, 243, 64, 67, 94, 55, 61, 212, 203, 207, 248, 209, 47, 241, 223,
+                36, 175, 158, 22, 108, 92, 42, 51, 192, 39, 17, 132, 53, 214, 61, 160, 143, 166,
+                32, 42, 135, 52, 200, 241, 109, 217, 83, 200, 241, 175, 120, 194, 83, 63, 228, 215,
+                73, 172, 68, 56, 35, 128, 163, 89, 48, 87, 48, 15, 6, 3, 85, 29, 15, 1, 1, 255, 4,
+                5, 3, 3, 7, 4, 0, 48, 34, 6, 3, 85, 29, 35, 1, 1, 0, 4, 24, 48, 22, 128, 20, 254,
+                88, 74, 231, 83, 121, 12, 253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209,
+                18, 48, 32, 6, 3, 85, 29, 14, 1, 1, 0, 4, 22, 4, 20, 254, 88, 74, 231, 83, 121, 12,
+                253, 134, 1, 163, 18, 251, 50, 211, 193, 184, 34, 209, 18, 48, 10, 6, 8, 42, 134,
+                72, 206, 61, 4, 3, 2, 3, 73, 0, 48, 70, 2, 33, 0, 240, 38, 63, 102, 107, 249, 121,
+                172, 4, 241, 107, 165, 35, 37, 171, 90, 48, 66, 147, 139, 113, 70, 180, 79, 150,
+                47, 104, 12, 150, 152, 148, 164, 2, 33, 0, 230, 94, 91, 132, 244, 223, 193, 68, 55,
+                152, 134, 144, 23, 170, 127, 50, 192, 212, 197, 249, 142, 111, 169, 74, 208, 28,
+                153, 239, 199, 225, 252, 3,
+            ],
+        };
 
         // Verify that the certificate validation succeeds.
-        assert!(
-            validate_certs_chain(ca_pem, &[cert0.clone(), cert1.clone(), cert2.clone()]).is_ok()
-        );
+        assert!(validate_cert_chain(ca_pem, &[cert0.clone()]).is_ok());
 
         // Corrupt the fist certificate in the chain and verify that the
         // certificate validation fails.
-        let bad_value = cert0.pop().unwrap() + 1;
-        cert0.push(bad_value);
-        assert!(
-            validate_certs_chain(ca_pem, &[cert0.clone(), cert1.clone(), cert2.clone()]).is_err()
-        );
+        let bad_value = cert0.bytes.pop().unwrap() + 1;
+        cert0.bytes.push(bad_value);
+        assert!(validate_cert_chain(ca_pem, &[cert0.clone()]).is_err());
     }
 }
diff --git a/sw/host/provisioning/cp/BUILD b/sw/host/provisioning/cp/BUILD
index d817f932562de..8fcf05540c338 100644
--- a/sw/host/provisioning/cp/BUILD
+++ b/sw/host/provisioning/cp/BUILD
@@ -8,14 +8,7 @@ package(default_visibility = ["//visibility:public"])
 
 rust_binary(
     name = "cp",
-    testonly = True,
     srcs = ["src/main.rs"],
-    data = [
-        "//sw/device/silicon_creator/manuf/base:sram_cp_provision",
-        "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
-        "//third_party/openocd:jtag_olimex_cfg",
-        "//third_party/openocd:openocd_bin",
-    ],
     deps = [
         "//sw/host/opentitanlib",
         "//sw/host/provisioning/cp_lib",
@@ -26,6 +19,7 @@ rust_binary(
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
-        "@crate_index//:tiny-keccak",
+        "@crate_index//:serde_json",
+        "@crate_index//:zerocopy",
     ],
 )
diff --git a/sw/host/provisioning/cp/src/main.rs b/sw/host/provisioning/cp/src/main.rs
index 01a5597606d11..c588211929c67 100644
--- a/sw/host/provisioning/cp/src/main.rs
+++ b/sw/host/provisioning/cp/src/main.rs
@@ -6,16 +6,17 @@ use std::time::Duration;
 
 use anyhow::Result;
 use clap::Parser;
+use zerocopy::IntoBytes;
 
-use arrayvec::ArrayVec;
-use cp_lib::{reset_and_lock, run_sram_cp_provision, ManufCpProvisioningDataInput};
+use cp_lib::{CpResponse, ManufCpProvisioningDataInput, reset_and_lock, run_sram_cp_provision};
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::dif::lc_ctrl::DifLcCtrlState;
+use opentitanlib::io::gpio::{PinMode, PullMode};
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::lc::read_lc_state;
 use opentitanlib::test_utils::load_sram_program::SramProgramParams;
-use tiny_keccak::{CShake, Hasher};
 use ujson_lib::provisioning_data::ManufCpProvisioningData;
-use util_lib::{hex_string_to_u32_arrayvec, hex_string_to_u8_arrayvec};
+use util_lib::{hash_lc_token, hex_string_to_u32_arrayvec};
 
 #[derive(Debug, Parser)]
 struct Opts {
@@ -28,53 +29,54 @@ struct Opts {
     #[command(flatten)]
     provisioning_data: ManufCpProvisioningDataInput,
 
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "IOA5")]
+    console_tx_indicator_pin: String,
+
     /// Console receive timeout.
     #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
     timeout: Duration,
-}
-
-fn cshake_it(input: &str) -> Result<ArrayVec<u64, 2>> {
-    let data = hex_string_to_u8_arrayvec::<16>(input)?;
-    let name = b"";
-    let customazation = b"LC_CTRL";
-    let mut csh = CShake::v128(name, customazation);
-    let mut output = [0u8; 16];
 
-    csh.update(&data);
-    csh.finalize(&mut output);
-
-    Ok(output
-        .chunks_exact(8)
-        .map(|chunk| {
-            let arr: [u8; 8] = chunk.try_into().expect("chunk is the wrong size");
-            u64::from_le_bytes(arr)
-        })
-        .collect::<ArrayVec<u64, 2>>())
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
 }
 
 fn main() -> Result<()> {
     let opts = Opts::parse();
     opts.init.init_logging();
     let transport = opts.init.init_target()?;
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin(&opts.console_tx_indicator_pin)?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console_device = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
 
     let provisioning_data = ManufCpProvisioningData {
-        device_id: hex_string_to_u32_arrayvec::<8>(opts.provisioning_data.device_id.as_str())?,
-        manuf_state: hex_string_to_u32_arrayvec::<8>(opts.provisioning_data.manuf_state.as_str())?,
         wafer_auth_secret: hex_string_to_u32_arrayvec::<8>(
             opts.provisioning_data.wafer_auth_secret.as_str(),
         )?,
-        test_unlock_token_hash: cshake_it(opts.provisioning_data.test_unlock_token.as_str())?,
-        test_exit_token_hash: cshake_it(opts.provisioning_data.test_exit_token.as_str())?,
+        test_unlock_token_hash: hash_lc_token(
+            hex_string_to_u32_arrayvec::<4>(opts.provisioning_data.test_unlock_token.as_str())?
+                .as_bytes(),
+        )?,
+        test_exit_token_hash: hash_lc_token(
+            hex_string_to_u32_arrayvec::<4>(opts.provisioning_data.test_exit_token.as_str())?
+                .as_bytes(),
+        )?,
     };
 
+    let mut response = CpResponse::default();
+
     // Only run CP provisioning if requested in any of the TestUnlocked states, except the last
     // state (TestUnlocked7), as this state requires special handling of the wafer authentication
     // secret, which is not yet implemented.
-    let lc_state = read_lc_state(
-        &transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
-    )?;
+    let lc_state = read_lc_state(&transport, &opts.init.jtag_params)?;
+    log::info!("CP starting LC state: {:?}", lc_state.lc_state_to_str());
     match lc_state {
         DifLcCtrlState::TestUnlocked0
         | DifLcCtrlState::TestUnlocked1
@@ -86,19 +88,16 @@ fn main() -> Result<()> {
             run_sram_cp_provision(
                 &transport,
                 &opts.init.jtag_params,
-                opts.init.bootstrap.options.reset_delay,
                 &opts.sram_program,
                 &provisioning_data,
+                &spi_console_device,
+                &mut response,
                 opts.timeout,
             )?;
             // Only perform lock if we are in TEST_UNLOCKED0, otherwise we are running from a later
             // stage and want to run FT stage directly after.
             if lc_state == DifLcCtrlState::TestUnlocked0 {
-                reset_and_lock(
-                    &transport,
-                    &opts.init.jtag_params,
-                    opts.init.bootstrap.options.reset_delay,
-                )?;
+                reset_and_lock(&transport, &opts.init.jtag_params)?;
             } else {
                 log::info!("Skipping resetting and locking the device.");
             }
@@ -108,5 +107,8 @@ fn main() -> Result<()> {
         }
     };
 
+    let doc = serde_json::to_string(&response)?;
+    println!("CHIP_PROBE_DATA: {doc}");
+
     Ok(())
 }
diff --git a/sw/host/provisioning/cp_lib/src/lib.rs b/sw/host/provisioning/cp_lib/src/lib.rs
index b1a668a191eb7..fee4026d38643 100644
--- a/sw/host/provisioning/cp_lib/src/lib.rs
+++ b/sw/host/provisioning/cp_lib/src/lib.rs
@@ -6,17 +6,19 @@ use std::time::Duration;
 
 use anyhow::{Context, Result};
 use clap::Args;
+use serde::Serialize;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, DifLcCtrlToken, LcCtrlReg};
 use opentitanlib::io::jtag::{JtagParams, JtagTap};
 use opentitanlib::test_utils::lc_transition::trigger_lc_transition;
 use opentitanlib::test_utils::load_sram_program::{
     ExecutionMode, ExecutionResult, SramProgramParams,
 };
-use opentitanlib::test_utils::rpc::UartSend;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
-use ujson_lib::provisioning_data::ManufCpProvisioningData;
+use ujson_lib::provisioning_data::{ManufCpProvisioningData, ManufCpProvisioningDataOut};
 
 // Generated by the `lc_raw_unlock_token` Bazel rule from `//rules/lc.bzl`.
 mod lc_raw_unlock_token;
@@ -24,15 +26,6 @@ mod lc_raw_unlock_token;
 /// Provisioning data command-line parameters.
 #[derive(Debug, Args, Clone)]
 pub struct ManufCpProvisioningDataInput {
-    // TODO(#19456): construct device ID from building blocks
-    /// Device ID to provision.
-    #[arg(long)]
-    pub device_id: String,
-
-    /// Manufacturing State information to provision.
-    #[arg(long)]
-    pub manuf_state: String,
-
     /// Wafer Authentication Secret to provision.
     #[arg(long)]
     pub wafer_auth_secret: String,
@@ -46,19 +39,18 @@ pub struct ManufCpProvisioningDataInput {
     pub test_exit_token: String,
 }
 
-pub fn unlock_raw(
-    transport: &TransportWrapper,
-    jtag_params: &JtagParams,
-    reset_delay: Duration,
-) -> Result<()> {
+#[derive(Debug, Clone, Default, Serialize)]
+pub struct CpResponse {
+    pub cp_device_id: String,
+}
+
+pub fn unlock_raw(transport: &TransportWrapper, jtag_params: &JtagParams) -> Result<()> {
     // Set the TAP straps for the lifecycle controller and reset.
     transport
         .pin_strapping("PINMUX_TAP_LC")?
         .apply()
         .context("failed to apply LC TAP strapping")?;
-    transport
-        .reset_target(reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the LC TAP via JTAG.
     let mut jtag = jtag_params
@@ -79,7 +71,6 @@ pub fn unlock_raw(
         Some(token_words),
         /*use_external_clk=*/
         true, // AST will NOT be calibrated yet, so we need ext_clk.
-        reset_delay,
         Some(JtagTap::LcTap),
     )
     .context("failed to transition to TEST_UNLOCKED0.")?;
@@ -95,24 +86,27 @@ pub fn unlock_raw(
     Ok(())
 }
 
+#[allow(clippy::too_many_arguments)]
 pub fn run_sram_cp_provision(
     transport: &TransportWrapper,
     jtag_params: &JtagParams,
-    reset_delay: Duration,
     sram_program: &SramProgramParams,
-    provisioning_data: &ManufCpProvisioningData,
+    data_in: &ManufCpProvisioningData,
+    spi_console: &SpiConsoleDevice,
+    response: &mut CpResponse,
     timeout: Duration,
 ) -> Result<()> {
+    // Reset the SPI console before loading the target firmware.
+    spi_console.reset_frame_counter();
+
     // Set CPU TAP straps, reset, and connect to the JTAG interface.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = jtag_params.create(transport)?.connect(JtagTap::RiscvTap)?;
 
     // Reset and halt the CPU to ensure we are in a known state, and clear out any ROM messages
     // printed over the console.
     jtag.reset(/*run=*/ false)?;
-    let uart = transport.uart("console")?;
-    uart.clear_rx_buffer()?;
 
     // Load and execute the SRAM program that contains the provisioning code.
     let result = sram_program.load_and_execute(&mut *jtag, ExecutionMode::Jump)?;
@@ -121,15 +115,28 @@ pub fn run_sram_cp_provision(
         _ => panic!("SRAM program load/execution failed: {:?}.", result),
     }
 
-    // Get UART, set flow control, and wait for test to start running.
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Waiting for CP provisioning data ...", timeout)?;
+    // Wait for test to start running.
+    let _ = UartConsole::wait_for(
+        spi_console,
+        r"Waiting for CP provisioning data ...",
+        timeout,
+    )?;
 
     // Inject provisioning data into the device.
-    provisioning_data.send(&*uart)?;
+    data_in.send(spi_console)?;
+
+    // Wait to receive CP device ID, and encode in big-endian in response.
+    let _ = UartConsole::wait_for(spi_console, r"Exporting CP device ID ...", timeout)?;
+    response.cp_device_id = ManufCpProvisioningDataOut::recv(spi_console, timeout, true, false)?
+        .cp_device_id
+        .iter()
+        .rev()
+        .map(|v| format!("{v:08X}"))
+        .collect::<Vec<String>>()
+        .join("");
 
     // Wait for provisioning operations to complete.
-    let _ = UartConsole::wait_for(&*uart, r"CP provisioning done.", timeout)?;
+    let _ = UartConsole::wait_for(spi_console, r"CP provisioning done.", timeout)?;
 
     jtag.disconnect()?;
     transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
@@ -137,19 +144,13 @@ pub fn run_sram_cp_provision(
     Ok(())
 }
 
-pub fn reset_and_lock(
-    transport: &TransportWrapper,
-    jtag_params: &JtagParams,
-    reset_delay: Duration,
-) -> Result<()> {
+pub fn reset_and_lock(transport: &TransportWrapper, jtag_params: &JtagParams) -> Result<()> {
     // Set the TAP straps for the lifecycle controller and reset.
     transport
         .pin_strapping("PINMUX_TAP_LC")?
         .apply()
         .context("failed to apply LC TAP strapping")?;
-    transport
-        .reset_target(reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the LC TAP via JTAG.
     let mut jtag = jtag_params
@@ -166,7 +167,6 @@ pub fn reset_and_lock(
         None,
         /*use_external_clk=*/
         false, // AST will be calibrated by now, so no need for ext_clk.
-        reset_delay,
         Some(JtagTap::LcTap),
     )
     .context("failed to transition to TEST_LOCKED0.")?;
diff --git a/sw/host/provisioning/ft/BUILD b/sw/host/provisioning/ft/BUILD
index ad1a47a9e339c..06c900457139b 100644
--- a/sw/host/provisioning/ft/BUILD
+++ b/sw/host/provisioning/ft/BUILD
@@ -5,32 +5,42 @@
 load("@rules_rust//rust:defs.bzl", "rust_binary")
 load(
     "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
-    "FT_PERSONALIZE_KEYS",
+    "EARLGREY_SKUS",
 )
 
 package(default_visibility = ["//visibility:public"])
 
-# Additional data dependencies on this rust binary allow the provisioning
-# orchestration scripts to invoke this binary with bazel run.
-rust_binary(
-    name = "ft",
-    testonly = True,
-    srcs = ["src/main.rs"],
-    data = [
-        "//sw/device/silicon_creator/manuf/base:ft_personalize",
-        "//sw/device/silicon_creator/manuf/base:sram_ft_individualize_all",
-        "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
-        "//third_party/openocd:jtag_olimex_cfg",
-        "//third_party/openocd:openocd_bin",
-    ] + FT_PERSONALIZE_KEYS,
-    deps = [
-        "//sw/host/opentitanlib",
-        "//sw/host/provisioning/ft_lib",
-        "//sw/host/provisioning/ujson_lib",
-        "//sw/host/provisioning/util_lib",
-        "@crate_index//:anyhow",
-        "@crate_index//:clap",
-        "@crate_index//:humantime",
-        "@crate_index//:log",
+[
+    rust_binary(
+        name = "ft_{}".format(sku),
+        srcs = ["src/main.rs"],
+        deps = [
+            "//sw/host/opentitanlib",
+            "//sw/host/provisioning/ft_lib:ft_lib_{}".format(sku),
+            "//sw/host/provisioning/cert_lib",
+            "//sw/host/provisioning/ujson_lib",
+            "//sw/host/provisioning/util_lib",
+            "@crate_index//:anyhow",
+            "@crate_index//:arrayvec",
+            "@crate_index//:base64ct",
+            "@crate_index//:clap",
+            "@crate_index//:elliptic-curve",
+            "@crate_index//:hex",
+            "@crate_index//:humantime",
+            "@crate_index//:indexmap",
+            "@crate_index//:log",
+            "@crate_index//:p256",
+            "@crate_index//:serde_json",
+            "@lowrisc_serde_annotate//serde_annotate",
+        ],
+    )
+    for sku in EARLGREY_SKUS.keys()
+]
+
+filegroup(
+    name = "ft_all",
+    srcs = [
+        ":ft_{}".format(sku)
+        for sku in EARLGREY_SKUS.keys()
     ],
 )
diff --git a/sw/host/provisioning/ft/src/main.rs b/sw/host/provisioning/ft/src/main.rs
index c90ee111c0a7b..69eb1d722a663 100644
--- a/sw/host/provisioning/ft/src/main.rs
+++ b/sw/host/provisioning/ft/src/main.rs
@@ -2,81 +2,74 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use std::collections::HashMap;
 use std::path::PathBuf;
-use std::time::Duration;
+use std::time::{Duration, Instant};
 
-use anyhow::{bail, Result};
+use anyhow::{Context, Result, bail};
+use arrayvec::ArrayVec;
+use base64ct::{Base64, Encoding};
 use clap::{Args, Parser};
+use elliptic_curve::SecretKey;
+use elliptic_curve::pkcs8::DecodePrivateKey;
+use indexmap::IndexMap;
+use p256::NistP256;
 
-use ft_lib::{run_ft_personalize, run_sram_ft_individualize, test_exit, test_unlock, KeyWrapper};
+use cert_lib::{CaConfig, CaKey, CaKeyType};
+use ft_lib::{
+    check_slot_b_boot_up, run_ft_personalize, run_sram_ft_individualize, test_exit, test_unlock,
+};
 use opentitanlib::backend;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::dif::lc_ctrl::DifLcCtrlState;
+use opentitanlib::io::gpio::{PinMode, PullMode};
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::lc::read_lc_state;
+use opentitanlib::test_utils::lc::{read_device_id, read_lc_state};
 use opentitanlib::test_utils::load_sram_program::SramProgramParams;
+use ujson_lib::UjsonPayloads;
 use ujson_lib::provisioning_data::{ManufCertgenInputs, ManufFtIndividualizeData};
-use util_lib::{hex_string_to_u32_arrayvec, hex_string_to_u8_arrayvec};
+use util_lib::response::PersonalizeResponse;
+use util_lib::{
+    encrypt_token, hex_string_to_u8_arrayvec, hex_string_to_u32_arrayvec, load_rsa_public_key,
+    random_token,
+};
 
 /// Provisioning data command-line parameters.
 #[derive(Debug, Args, Clone)]
 pub struct ManufFtProvisioningDataInput {
-    /// Device ID to provision.
+    /// FT Device ID to provision.
     ///
-    /// Must match the device ID provisioned in to flash during CP, if one was provisioned then.
+    /// Contains the SKU-specific portion of the device ID.
+    #[arg(long, default_value = "")]
+    pub ft_device_id: String,
+
+    /// Wafer Authentication Secret to verify from device.
     #[arg(long)]
-    pub device_id: String,
+    pub wafer_auth_secret: String,
 
-    /// TestUnlock token.
+    /// TestUnlock token; a 128-bit hex string.
     #[arg(long)]
     pub test_unlock_token: String,
 
-    /// TestExit token.
+    /// TestExit token; a 128-bit hex string.
     #[arg(long)]
     pub test_exit_token: String,
 
+    /// RMA unlock token; a 128-bit hex string.
+    #[arg(long)]
+    pub rma_unlock_token: Option<String>,
+
     /// LC state to transition to from TEST_UNLOCKED*.
     #[arg(long, value_parser = DifLcCtrlState::parse_lc_state_str)]
     target_mission_mode_lc_state: DifLcCtrlState,
 
-    /// Host (HSM) generated ECC (P256) private key DER file to support RMA token encryption.
-    #[arg(long)]
-    host_ecc_sk: PathBuf,
-
-    /// Measurement of the ROM_EXT image to be loaded onto the device.
-    #[arg(long)]
-    pub rom_ext_measurement: String,
-
-    /// Security version the ROM_EXT image to be loaded onto the device.
-    #[arg(long, default_value = "0")]
-    pub rom_ext_security_version: u32,
-
-    /// Measurement of the Ownership Manifest to be loaded onto the device.
-    #[arg(long)]
-    pub owner_manifest_measurement: String,
-
-    /// Measurement of the Owner image to be loaded onto the device.
-    #[arg(long)]
-    pub owner_measurement: String,
-
-    /// Security version the Owner image to be loaded onto the device.
-    #[arg(long, default_value = "0")]
-    pub owner_security_version: u32,
-
-    /// CA (ECC P256) endorsement key as a DER file path.
-    #[arg(long, default_value = None,  required = true, conflicts_with = "ca_key_ckms_id")]
-    ca_key_der_file: Option<PathBuf>,
-
-    /// CA endorsement key as a Google Cloud KMS key ID string.
-    #[arg(long, default_value = None, required = true, conflicts_with = "ca_key_der_file")]
-    pub ca_key_ckms_id: Option<String>,
-
-    /// CA key ID hexstring.
+    /// Token Encryption public key (RSA) DER file path.
     #[arg(long)]
-    pub ca_key_id: String,
+    token_encrypt_key_der_file: PathBuf,
 
-    /// CA certificate to be used for verifying a cert chain.
-    #[arg(long)]
-    pub ca_certificate: PathBuf,
+    /// Pretty-print the provisioning data output.
+    #[arg(long, default_value = "false")]
+    pretty: bool,
 }
 
 #[derive(Debug, Parser)]
@@ -90,58 +83,126 @@ struct Opts {
     #[command(flatten)]
     provisioning_data: ManufFtProvisioningDataInput,
 
+    /// CA HJSON configuration file.
+    #[arg(long)]
+    ca_config: PathBuf,
+
+    /// Second image (perso FW + ROM_EXT/Owner FW bundle) to bootstrap.
+    #[arg(long)]
+    second_bootstrap: PathBuf,
+
     /// Console receive timeout.
-    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
     timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "IOA5")]
+    console_tx_indicator_pin: String,
+
+    /// Owner's firmware string indicating successful start up.
+    #[arg(long)]
+    owner_success_text: Option<String>,
+
+    /// UJSON payload logging.
+    #[arg(long)]
+    log_ujson_payloads: bool,
 }
 
 fn main() -> Result<()> {
     let opts = Opts::parse();
     opts.init.init_logging();
 
+    let mut ujson_payloads = UjsonPayloads {
+        dut_in: IndexMap::<String, String>::new(),
+    };
+    let mut response = PersonalizeResponse::default();
+
     // We call the below functions, instead of calling `opts.init.init_target()` since we do not
     // want to perform bootstrap yet.
     let transport = backend::create(&opts.init.backend_opts)?;
     transport.apply_default_configuration(None)?;
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin(&opts.console_tx_indicator_pin)?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
     InitializeTest::print_result("load_bitstream", opts.init.load_bitstream.init(&transport))?;
 
-    // Format test tokens.
+    // Parse and format tokens.
+    let wafer_auth_secret =
+        hex_string_to_u8_arrayvec::<32>(opts.provisioning_data.wafer_auth_secret.as_str())?;
     let _test_unlock_token =
         hex_string_to_u32_arrayvec::<4>(opts.provisioning_data.test_unlock_token.as_str())?;
     let _test_exit_token =
         hex_string_to_u32_arrayvec::<4>(opts.provisioning_data.test_exit_token.as_str())?;
-
-    // Format ujson data payload(s).
-    // Individualization ujson payload.
-    let _ft_individualize_data_in = ManufFtIndividualizeData {
-        device_id: hex_string_to_u32_arrayvec::<8>(opts.provisioning_data.device_id.as_str())?,
+    let rma_unlock_token = if let Some(token) = &opts.provisioning_data.rma_unlock_token {
+        hex_string_to_u32_arrayvec::<4>(token.as_str())?
+    } else {
+        random_token::<4>()?
     };
-    // Personalization ujson payload.
-    let rom_ext_measurement =
-        hex_string_to_u32_arrayvec::<8>(opts.provisioning_data.rom_ext_measurement.as_str())?;
-    let rom_ext_security_version = opts.provisioning_data.rom_ext_security_version;
-    let owner_manifest_measurement = hex_string_to_u32_arrayvec::<8>(
-        opts.provisioning_data.owner_manifest_measurement.as_str(),
+    let token_encrypt_key =
+        load_rsa_public_key(&opts.provisioning_data.token_encrypt_key_der_file)?;
+    let encrypted_rma_unlock_token = encrypt_token(&token_encrypt_key, &rma_unlock_token)?;
+    response.rma_unlock_token = Base64::encode_string(&encrypted_rma_unlock_token);
+    log::info!("Encrypted rma_unlock_token = {}", response.rma_unlock_token);
+
+    // Parse and prepare individualization ujson data payload.
+    let mut ft_device_id = ArrayVec::<u32, 4>::from([0; 4]);
+    if !opts.provisioning_data.ft_device_id.is_empty() {
+        ft_device_id =
+            hex_string_to_u32_arrayvec::<4>(opts.provisioning_data.ft_device_id.as_str())?;
+        ft_device_id.reverse();
+    }
+    // The FT device ID is sent to the DUT in little endian order.
+    let ft_individualize_data_in = ManufFtIndividualizeData { ft_device_id };
+
+    // Parse and prepare CA key.
+    let mut ca_cfgs: HashMap<String, CaConfig> = serde_annotate::from_str(
+        &std::fs::read_to_string(opts.ca_config)
+            .with_context(|| "Failed to open CA config JSON.")?,
     )?;
-    let owner_measurement =
-        hex_string_to_u32_arrayvec::<8>(opts.provisioning_data.owner_measurement.as_str())?;
-    let owner_security_version = opts.provisioning_data.owner_security_version;
-    let ca_key_id = hex_string_to_u8_arrayvec::<20>(opts.provisioning_data.ca_key_id.as_str())?;
+    let mut ca_keys = HashMap::<String, CaKey>::new();
+    for (ca, cfg) in &mut ca_cfgs {
+        ca_keys.insert(
+            ca.to_string(),
+            match cfg.key_type {
+                CaKeyType::Raw => {
+                    log::info!("Using raw key for cert endorsement.");
+                    CaKey::RawKey(SecretKey::<NistP256>::read_pkcs8_der_file(
+                        cfg.key.as_str(),
+                    )?)
+                }
+                CaKeyType::Token => {
+                    log::info!("Using PKCS#11 token key for cert endorsement.");
+                    CaKey::TokenKey(cfg.key.clone())
+                }
+            },
+        );
+    }
+
+    // Parse and prepare personalization ujson data payload.
+    let dice_ca_key_id = hex_string_to_u8_arrayvec::<20>(ca_cfgs["dice"].key_id.as_str())?;
+    let ext_ca_key_id = if let Some(ext) = ca_cfgs.get("ext") {
+        hex_string_to_u8_arrayvec::<20>(ext.key_id.as_str())?
+    } else {
+        ArrayVec::<u8, 20>::new()
+    };
     let _perso_certgen_inputs = ManufCertgenInputs {
-        rom_ext_measurement: rom_ext_measurement.clone(),
-        rom_ext_security_version,
-        owner_manifest_measurement: owner_manifest_measurement.clone(),
-        owner_measurement: owner_measurement.clone(),
-        owner_security_version,
-        auth_key_key_id: ca_key_id.clone(),
+        dice_auth_key_key_id: dice_ca_key_id.clone(),
+        ext_auth_key_key_id: ext_ca_key_id.clone(),
     };
 
     // Only run test unlock operation if we are in a locked LC state.
-    match read_lc_state(
-        &transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
-    )? {
+    response.lc_state.initial = read_lc_state(&transport, &opts.init.jtag_params)?;
+    match response.lc_state.initial {
         DifLcCtrlState::TestLocked0
         | DifLcCtrlState::TestLocked1
         | DifLcCtrlState::TestLocked2
@@ -149,12 +210,9 @@ fn main() -> Result<()> {
         | DifLcCtrlState::TestLocked4
         | DifLcCtrlState::TestLocked5
         | DifLcCtrlState::TestLocked6 => {
-            test_unlock(
-                &transport,
-                &opts.init.jtag_params,
-                opts.init.bootstrap.options.reset_delay,
-                &_test_unlock_token,
-            )?;
+            let t0 = Instant::now();
+            test_unlock(&transport, &opts.init.jtag_params, &_test_unlock_token)?;
+            response.stats.log_elapsed_time("test-unlock", t0);
         }
         _ => {
             log::info!("Skipping test unlock operation. Device is already unlocked.");
@@ -163,11 +221,8 @@ fn main() -> Result<()> {
 
     // Only run the SRAM individualize program in a test unlocked state. If we have transitioned to
     // a mission state already, then we can skip this step.
-    match read_lc_state(
-        &transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
-    )? {
+    response.lc_state.unlocked = read_lc_state(&transport, &opts.init.jtag_params)?;
+    match response.lc_state.unlocked {
         DifLcCtrlState::TestUnlocked0 => {
             bail!("FT stage cannot be run from test unlocked 0. Run CP stage first.");
         }
@@ -178,21 +233,31 @@ fn main() -> Result<()> {
         | DifLcCtrlState::TestUnlocked5
         | DifLcCtrlState::TestUnlocked6
         | DifLcCtrlState::TestUnlocked7 => {
+            // Run FT individualize.
+            response.lc_state.individualize = Some(response.lc_state.unlocked);
+            let t0 = Instant::now();
             run_sram_ft_individualize(
                 &transport,
                 &opts.init.jtag_params,
-                opts.init.bootstrap.options.reset_delay,
                 &opts.sram_program,
-                &_ft_individualize_data_in,
+                &ft_individualize_data_in,
+                &spi_console,
                 opts.timeout,
+                &mut ujson_payloads,
             )?;
+            response.stats.log_elapsed_time("ft-individualize", t0);
+
+            // Perform test exit.
+            let t0 = Instant::now();
             test_exit(
                 &transport,
                 &opts.init.jtag_params,
-                opts.init.bootstrap.options.reset_delay,
                 &_test_exit_token,
                 opts.provisioning_data.target_mission_mode_lc_state,
             )?;
+            response.lc_state.mission_mode =
+                Some(opts.provisioning_data.target_mission_mode_lc_state);
+            response.stats.log_elapsed_time("test-exit", t0);
         }
         _ => {
             log::info!("Skipping individualize operation. Device is already in a mission mode.");
@@ -203,28 +268,61 @@ fn main() -> Result<()> {
     // every reset, as DFT is no longer enabled in mission modes.
     transport.ignore_dft_straps_on_reset()?;
 
-    let cert_endorsement_key_wrapper = match (
-        opts.provisioning_data.ca_key_ckms_id,
-        opts.provisioning_data.ca_key_der_file,
-    ) {
-        (Some(ckms), None) => KeyWrapper::CkmsKey(ckms),
-        (None, Some(local)) => KeyWrapper::LocalKey(local),
-        (_, _) => {
-            log::error!("One and only one endorsement key parameter must be included");
-            bail!("Incorrect command line endorsement key settings");
-        }
-    };
     run_ft_personalize(
         &transport,
         &opts.init,
-        opts.provisioning_data.host_ecc_sk,
-        cert_endorsement_key_wrapper,
+        &wafer_auth_secret,
+        &rma_unlock_token,
+        ca_cfgs,
+        ca_keys,
         &_perso_certgen_inputs,
+        opts.second_bootstrap,
+        &spi_console,
+        &mut ujson_payloads,
         opts.timeout,
-        opts.provisioning_data.ca_certificate,
+        &mut response,
     )?;
 
+    check_slot_b_boot_up(
+        &transport,
+        opts.timeout,
+        &mut response,
+        opts.owner_success_text,
+    )?;
     log::info!("Provisioning Done");
 
+    // Extract final device ID.
+    let mut final_device_id = read_device_id(&transport, &opts.init.jtag_params)?;
+
+    // Convert final device ID to a big-endian string.
+    final_device_id.reverse();
+    response.device_id = final_device_id
+        .iter()
+        .map(|v| format!("{v:08X}"))
+        .collect::<Vec<String>>()
+        .join("");
+
+    // Log JSON data to console.
+    let doc = if opts.provisioning_data.pretty {
+        serde_json::to_string_pretty(&response)?
+    } else {
+        serde_json::to_string(&response)?
+    };
+    println!("PROVISIONING_DATA: {doc}");
+
+    // Log UJSON payloads.
+    if opts.log_ujson_payloads {
+        println!();
+        println!("UJSON Payloads:");
+        for (name, payload) in ujson_payloads.dut_in.into_iter() {
+            print!("{:}: ", name);
+            for byte in payload.clone().into_bytes() {
+                print!("{:02x}", byte);
+            }
+            println!();
+        }
+        println!();
+    }
+
     Ok(())
 }
diff --git a/sw/host/provisioning/ft_lib/BUILD b/sw/host/provisioning/ft_lib/BUILD
index c9b2d81af4c55..cbbf1feb135c8 100644
--- a/sw/host/provisioning/ft_lib/BUILD
+++ b/sw/host/provisioning/ft_lib/BUILD
@@ -3,28 +3,35 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@rules_rust//rust:defs.bzl", "rust_library")
+load("//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl", "EARLGREY_SKUS")
 
 package(default_visibility = ["//visibility:public"])
 
-rust_library(
-    name = "ft_lib",
-    srcs = ["src/lib.rs"],
-    deps = [
-        "//sw/host/opentitanlib",
-        "//sw/host/ot_certs",
-        "//sw/host/provisioning/cert_lib",
-        "//sw/host/provisioning/ujson_lib",
-        "//sw/host/provisioning/util_lib",
-        "@crate_index//:anyhow",
-        "@crate_index//:arrayvec",
-        "@crate_index//:clap",
-        "@crate_index//:elliptic-curve",
-        "@crate_index//:hex",
-        "@crate_index//:log",
-        "@crate_index//:p256",
-        "@crate_index//:serde",
-        "@crate_index//:serde_json",
-        "@crate_index//:sha2",
-        "@crate_index//:zerocopy",
-    ],
-)
+[
+    rust_library(
+        name = "ft_lib_{}".format(sku),
+        srcs = [
+            "src/lib.rs",
+        ],
+        crate_name = "ft_lib",
+        deps = [
+            "//sw/host/opentitanlib",
+            "//sw/host/opentitanlib/bindgen",
+            "//sw/host/ot_certs",
+            "//sw/host/provisioning/cert_lib",
+            "//sw/host/provisioning/perso_tlv_lib",
+            "//sw/host/provisioning/perso_tlv_lib:perso_tlv_objects",
+            "//sw/host/provisioning/ujson_lib",
+            "//sw/host/provisioning/util_lib",
+            "@crate_index//:anyhow",
+            "@crate_index//:arrayvec",
+            "@crate_index//:clap",
+            "@crate_index//:hex",
+            "@crate_index//:hmac",
+            "@crate_index//:log",
+            "@crate_index//:sha2",
+            "@crate_index//:zerocopy",
+        ] + config["host_ext_libs"],
+    )
+    for sku, config in EARLGREY_SKUS.items()
+]
diff --git a/sw/host/provisioning/ft_lib/src/lib.rs b/sw/host/provisioning/ft_lib/src/lib.rs
index 07a9a52cd5682..5da9cfe1c0778 100644
--- a/sw/host/provisioning/ft_lib/src/lib.rs
+++ b/sw/host/provisioning/ft_lib/src/lib.rs
@@ -2,45 +2,53 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use hmac::{Hmac, Mac};
 use sha2::{Digest, Sha256};
+use std::collections::HashMap;
+use std::collections::HashSet;
 use std::path::PathBuf;
-use std::time::Duration;
+use std::time::{Duration, Instant};
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use arrayvec::ArrayVec;
-use elliptic_curve::pkcs8::DecodePrivateKey;
-use elliptic_curve::{PublicKey, SecretKey};
-use p256::NistP256;
-use zerocopy::AsBytes;
+use zerocopy::IntoBytes;
 
+use bindgen::sram_program::SRAM_MAGIC_SP_EXECUTION_DONE;
 use cert_lib::{
-    get_cert_size, parse_and_endorse_x509_cert, validate_certs_chain, CertEndorsementKey,
+    CaConfig, CaKey, EndorsedCert, parse_and_endorse_x509_cert, validate_cert_chain,
+    validate_cwt_dice_chain,
 };
-use opentitanlib::app::TransportWrapper;
+use ft_ext_lib::{ft_inject_certs_ext, ft_post_boot_ext};
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
-use opentitanlib::io::jtag::{JtagParams, JtagTap};
+use opentitanlib::io::jtag::{JtagParams, JtagTap, RiscvGpr, RiscvReg};
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::lc_transition::trigger_lc_transition;
 use opentitanlib::test_utils::load_sram_program::{
     ExecutionMode, ExecutionResult, SramProgramParams,
 };
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
+use ot_certs::CertFormat;
 use ot_certs::x509::parse_certificate;
+use perso_tlv_lib::perso_tlv_get_field;
+use perso_tlv_lib::{CertHeader, CertHeaderType, ObjHeader, ObjHeaderType, ObjType};
 use ujson_lib::provisioning_data::{
-    EccP256PublicKey, ManufCertgenInputs, ManufCerts, ManufFtIndividualizeData, SerdesSha256Hash,
-    WrappedRmaUnlockToken,
+    LcTokenHash, ManufCertgenInputs, ManufFtIndividualizeData, PersoBlob, SerdesSha256Hash,
 };
+use ujson_lib::*;
+use util_lib::hash_lc_token;
+use util_lib::response::*;
 
 pub fn test_unlock(
     transport: &TransportWrapper,
     jtag_params: &JtagParams,
-    reset_delay: Duration,
     test_unlock_token: &ArrayVec<u32, 4>,
 ) -> Result<()> {
     // Connect to LC TAP.
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = jtag_params.create(transport)?.connect(JtagTap::LcTap)?;
 
     // Check that LC state is currently `TEST_LOCKED0`.
@@ -56,7 +64,6 @@ pub fn test_unlock(
         Some(test_unlock_token.clone().into_inner().unwrap()),
         /*use_external_clk=*/
         false, // AST will be calibrated by now, so no need for ext_clk.
-        reset_delay,
         /*reset_tap_straps=*/ Some(JtagTap::LcTap),
     )?;
 
@@ -72,24 +79,27 @@ pub fn test_unlock(
     Ok(())
 }
 
+#[allow(clippy::too_many_arguments)]
 pub fn run_sram_ft_individualize(
     transport: &TransportWrapper,
     jtag_params: &JtagParams,
-    reset_delay: Duration,
     sram_program: &SramProgramParams,
     ft_individualize_data_in: &ManufFtIndividualizeData,
+    spi_console: &SpiConsoleDevice,
     timeout: Duration,
+    ujson_payloads: &mut UjsonPayloads,
 ) -> Result<()> {
+    // Reset the SPI console before loading the target firmware.
+    spi_console.reset_frame_counter();
+
     // Set CPU TAP straps, reset, and connect to the JTAG interface.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = jtag_params.create(transport)?.connect(JtagTap::RiscvTap)?;
 
     // Reset and halt the CPU to ensure we are in a known state, and clear out any ROM messages
     // printed over the console.
     jtag.reset(/*run=*/ false)?;
-    let uart = transport.uart("console")?;
-    uart.clear_rx_buffer()?;
 
     // Load and execute the SRAM program that contains the provisioning code.
     let result = sram_program.load_and_execute(&mut *jtag, ExecutionMode::Jump)?;
@@ -98,22 +108,40 @@ pub fn run_sram_ft_individualize(
         _ => panic!("SRAM program load/execution failed: {:?}.", result),
     }
 
-    // Get UART, set flow control, and wait for SRAM program to complete execution.
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(
-        &*uart,
-        r"Waiting for FT SRAM provisioning data ...",
-        timeout,
-    )?;
-
-    // Inject provisioning data into the device.
-    ft_individualize_data_in.send(&*uart)?;
+    if !ft_individualize_data_in
+        .ft_device_id
+        .iter()
+        .all(|&x| x == 0)
+    {
+        // Wait for SRAM program to complete execution.
+        let _ = UartConsole::wait_for(
+            spi_console,
+            r"Waiting for FT SRAM provisioning data ...",
+            timeout,
+        )?;
+
+        // Inject provisioning data into the device.
+        ujson_payloads.dut_in.insert(
+            "FT_INDIVIDUALIZE_DATA_IN".to_string(),
+            ft_individualize_data_in.send(spi_console)?,
+        );
+    }
 
     // Wait for provisioning operations to complete.
-    let _ = UartConsole::wait_for(&*uart, r"FT SRAM provisioning done.", timeout)?;
+    jtag.wait_halt(timeout)?;
+    jtag.halt()?;
+    let sp = jtag.read_riscv_reg(&RiscvReg::Gpr(RiscvGpr::SP))?;
+    log::info!("after timeout, sp = {:x}", sp);
+    match sp {
+        SRAM_MAGIC_SP_EXECUTION_DONE => {}
+        _ => panic!("SRAM program load/execution failed: sp = {:?}.", sp),
+    }
 
+    // Switch TAP straps to LC TAP (without resetting) to aid debugging if there are OTP issues.
+    // TAP straps are continuously sampled in TEST_UNLOCKED* LC states.
     jtag.disconnect()?;
     transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
+    transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
 
     Ok(())
 }
@@ -121,7 +149,6 @@ pub fn run_sram_ft_individualize(
 pub fn test_exit(
     transport: &TransportWrapper,
     jtag_params: &JtagParams,
-    reset_delay: Duration,
     test_exit_token: &ArrayVec<u32, 4>,
     target_mission_mode_lc_state: DifLcCtrlState,
 ) -> Result<()> {
@@ -135,9 +162,25 @@ pub fn test_exit(
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
     let mut jtag = jtag_params.create(transport)?.connect(JtagTap::LcTap)?;
 
-    // Check that LC state is currently `TEST_UNLOCKED1`.
-    let state = jtag.read_lc_ctrl_reg(&LcCtrlReg::LcState)?;
-    assert_eq!(state, DifLcCtrlState::TestUnlocked1.redundant_encoding());
+    // Check that LC state is currently `TEST_UNLOCKED*`.
+    let state =
+        DifLcCtrlState::from_redundant_encoding(jtag.read_lc_ctrl_reg(&LcCtrlReg::LcState)?)?;
+    match state {
+        DifLcCtrlState::TestUnlocked0
+        | DifLcCtrlState::TestUnlocked1
+        | DifLcCtrlState::TestUnlocked2
+        | DifLcCtrlState::TestUnlocked3
+        | DifLcCtrlState::TestUnlocked4
+        | DifLcCtrlState::TestUnlocked5
+        | DifLcCtrlState::TestUnlocked6
+        | DifLcCtrlState::TestUnlocked7 => {
+            log::info!("Starting test exit LC transition ...")
+        }
+        _ => panic!(
+            "Cannot perform test exit LC transition from {:x?} LC state.",
+            state
+        ),
+    }
 
     // ROM execution should now be enabled in OTP so we cannot safely reconnect to the LC TAP after
     // the transition without risking the chip resetting. Therefore, it is the responsibility of the
@@ -149,7 +192,6 @@ pub fn test_exit(
         Some(test_exit_token.clone().into_inner().unwrap()),
         /*use_external_clk=*/
         false, // AST will be calibrated by now, so no need for ext_clk.
-        reset_delay,
         /*reset_tap_straps=*/ None,
     )?;
 
@@ -158,146 +200,360 @@ pub fn test_exit(
     Ok(())
 }
 
-// This enum provides two different certificate signing key representations. In
-// case the local fake certificate is used for certificate chain validation, the
-// key is a path to the file containing the private key. In case a Cloud KMS
-// certificate is used, the key is a string, the ID of the key in cloud storage.
-pub enum KeyWrapper {
-    LocalKey(PathBuf),
-    CkmsKey(String),
-}
-
-fn extract_rma_unlock_token(
-    transport: &TransportWrapper,
-    host_ecc_sk: PathBuf,
+fn send_rma_unlock_token_hash(
+    rma_unlock_token: &ArrayVec<u32, 4>,
     timeout: Duration,
+    spi_console: &SpiConsoleDevice,
+    ujson_payloads: &mut UjsonPayloads,
 ) -> Result<()> {
-    let uart = transport.uart("console")?;
-
-    // Load host (HSM) generated ECC keys.
-    let host_sk = SecretKey::<NistP256>::read_pkcs8_der_file(host_ecc_sk)?;
-    let host_pk = PublicKey::<NistP256>::from_secret_scalar(&host_sk.to_nonzero_scalar());
-
-    // Format host ECC public key to inject it into the device.
-    // Note: we trim off the first byte of SEC1 formatted public key as these are not part
-    // of the key bytes, rather this byte just indicates if the key was compressed or not.
-    let host_pk_sec1_bytes = host_pk.to_sec1_bytes();
-    let num_coord_bytes: usize = (host_pk_sec1_bytes.len() - 1) / 2;
-    let mut host_pk_x = host_pk_sec1_bytes.as_ref()[1..num_coord_bytes + 1]
-        .chunks(4)
-        .map(|bytes| u32::from_be_bytes(bytes.try_into().unwrap()))
-        .collect::<ArrayVec<u32, 8>>();
-    let mut host_pk_y = host_pk_sec1_bytes.as_ref()[num_coord_bytes + 1..]
-        .chunks(4)
-        .map(|bytes| u32::from_be_bytes(bytes.try_into().unwrap()))
-        .collect::<ArrayVec<u32, 8>>();
-    host_pk_x.reverse();
-    host_pk_y.reverse();
-    let rma_token_wrapping_pubkey = EccP256PublicKey {
-        x: host_pk_x,
-        y: host_pk_y,
+    let rma_token_hash = LcTokenHash {
+        hash: hash_lc_token(rma_unlock_token.as_bytes())?,
     };
 
-    // Get UART, set flow control, and wait for test to start running.
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Waiting for host public key ...", timeout)?;
+    // Wait for test to start running.
+    let _ = UartConsole::wait_for(
+        spi_console,
+        r"Waiting For RMA Unlock Token Hash ...",
+        timeout,
+    )?;
+    ujson_payloads.dut_in.insert(
+        "FT_PERSO_RMA_TOKEN_HASH".to_string(),
+        rma_token_hash.send_with_padding_and_crc(
+            spi_console,
+            LC_TOKEN_HASH_SERIALIZED_MAX_SIZE,
+            /*quiet=*/ true,
+        )?,
+    );
+    Ok(())
+}
 
-    // Send RMA token wrapping ECC keys into the device over the console.
-    rma_token_wrapping_pubkey.send(&*uart)?;
+// Extract LTV object header from the input buffer.
+fn get_obj_header(data: &[u8]) -> Result<ObjHeader> {
+    let header_len = std::mem::size_of::<ObjHeaderType>();
+    // The header is 2 bytes in size.
+    if data.len() < header_len {
+        bail!(
+            "Insufficient amount of data ({} bytes) for object header",
+            data.len()
+        );
+    }
 
-    // Wait until device exports the wrapped RMA unlock token.
-    let _ = UartConsole::wait_for(&*uart, r"Exporting RMA token ...", timeout)?;
-    let rma_token_out_data = WrappedRmaUnlockToken::recv(&*uart, timeout, false)?;
-    log::info!("{:x?}", rma_token_out_data);
+    let typesize = u16::from_be_bytes([data[0], data[1]]);
+    let obj_size = perso_tlv_get_field!("obj", "size", typesize);
+    let obj_type = ObjType::from_usize(perso_tlv_get_field!("obj", "type", typesize))?;
+
+    if obj_size > data.len() {
+        bail!(
+            "Object {} length {} exceeds buffer size {}",
+            obj_type as u8,
+            obj_size,
+            data.len()
+        );
+    }
+    Ok(ObjHeader { obj_type, obj_size })
+}
+
+// Extract certificate payload header from the input buffer.
+fn get_cert(data: &[u8]) -> Result<CertHeader> {
+    let header_len = std::mem::size_of::<CertHeaderType>();
+
+    if data.len() < header_len {
+        bail!(
+            "Insufficient amount of data ({} bytes) for cert header",
+            data.len()
+        );
+    }
+
+    let header = u16::from_be_bytes([data[0], data[1]]);
+    let wrapped_size = perso_tlv_get_field!("crth", "size", header);
+    if wrapped_size > data.len() {
+        bail!(
+            "Cert object size {} exceeds buffer size {}",
+            wrapped_size,
+            data.len()
+        );
+    }
+
+    let name_len = perso_tlv_get_field!("crth", "name", header);
+    let cert_name = std::str::from_utf8(&data[header_len..header_len + name_len])?;
+    log::info!("processing cert {cert_name}");
+    let header_size = header_len + name_len;
+    let cert_body: Vec<u8> = data[header_size..wrapped_size].to_vec();
+
+    Ok(CertHeader {
+        wrapped_size,
+        cert_name,
+        cert_body,
+    })
+}
+
+fn push_endorsed_cert(
+    cert: &Vec<u8>,
+    ref_cert: &CertHeader,
+    output: &mut ArrayVec<u8, 5120>,
+) -> Result<()> {
+    // Need to wrap the new cert in CertHeader
+    let total_size = std::mem::size_of::<ObjHeaderType>()
+        + std::mem::size_of::<CertHeaderType>()
+        + ref_cert.cert_name.len()
+        + cert.len();
+
+    let obj_header = perso_tlv_lib::make_obj_header(total_size, ObjType::EndorsedX509Cert)?;
+    let cert_wrapper_header =
+        perso_tlv_lib::make_cert_wrapper_header(cert.len(), ref_cert.cert_name)?;
+    output.try_extend_from_slice(&obj_header.to_be_bytes())?;
+    output.try_extend_from_slice(&cert_wrapper_header.to_be_bytes())?;
+    output.try_extend_from_slice(ref_cert.cert_name.as_bytes())?;
+    output.try_extend_from_slice(cert.as_slice())?;
 
     Ok(())
 }
 
-const CERT_LABELS: [&str; 8] = [
-    "UDS", "CDI_0", "CDI_1", "TPM_EK", "CEK", "CIK", "Unknown", "Unknown",
-];
+fn process_dev_seeds(seeds: &[u8]) -> Result<Vec<Vec<u8>>> {
+    let expected_seed_num = 2usize;
+    let seed_size = 64usize;
+    let mut response = Vec::new();
 
+    if seeds.len() != seed_size * expected_seed_num {
+        bail!("Unexpected seeds perso object size {}", seeds.len())
+    }
+
+    for i in 0..expected_seed_num {
+        let seed = &seeds[i * seed_size..(i + 1) * seed_size];
+        response.push(seed.to_vec());
+        log::info!("Seed #{}: {}", i, hex::encode(seed))
+    }
+    Ok(response)
+}
+
+#[allow(clippy::too_many_arguments)]
 fn provision_certificates(
-    transport: &TransportWrapper,
-    cert_endorsement_key_wrapper: KeyWrapper,
+    wafer_auth_secret: &ArrayVec<u8, 32>,
+    ca_cfgs: HashMap<String, CaConfig>,
+    ca_keys: HashMap<String, CaKey>,
     perso_certgen_inputs: &ManufCertgenInputs,
     timeout: Duration,
-    ca_certificate: PathBuf,
+    spi_console: &SpiConsoleDevice,
+    ujson_payloads: &mut UjsonPayloads,
+    response: &mut PersonalizeResponse,
 ) -> Result<()> {
-    let uart = transport.uart("console")?;
-
     // Send attestation TCB measurements for generating DICE certificates.
-    let _ = UartConsole::wait_for(&*uart, r"Waiting for certificate inputs ...", timeout)?;
-    perso_certgen_inputs.send(&*uart)?;
+    let t0 = Instant::now();
+    let _ = UartConsole::wait_for(spi_console, r"Waiting for certificate inputs ...", timeout)?;
+    response.stats.log_elapsed_time("perso-wait-ready", t0);
+
+    let t0 = Instant::now();
+    ujson_payloads.dut_in.insert(
+        "FT_PERSO_CERTGEN_INPUTS".to_string(),
+        perso_certgen_inputs
+            .send_with_padding(spi_console, MANUF_CERTGEN_INPUTS_SERIALIZED_MAX_SIZE)?,
+    );
+    response.stats.log_elapsed_time("perso-certgen-inputs", t0);
 
     // Wait until the device exports the TBS certificates.
-    let _ = UartConsole::wait_for(&*uart, r"Exporting TBS certificates ...", timeout)?;
-    let manuf_certs = ManufCerts::recv(&*uart, timeout, true)?;
-
-    // Select the CA endorsement key to use.
-    let key = match cert_endorsement_key_wrapper {
-        KeyWrapper::LocalKey(path) => {
-            log::info!("Using local key for cert endorsement");
-            CertEndorsementKey::LocalKey(SecretKey::<NistP256>::read_pkcs8_der_file(path)?)
-        }
-        KeyWrapper::CkmsKey(key_id) => {
-            log::info!("Using Cloud KMS key for cert endorsement");
-            CertEndorsementKey::CkmsKey(key_id)
-        }
-    };
+    let t0 = Instant::now();
+    let _ = UartConsole::wait_for(spi_console, r"Exporting TBS certificates ...", timeout)?;
+    let perso_blob = PersoBlob::recv(
+        spi_console,
+        timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    response.stats.log_elapsed_time("perso-tbs-export", t0);
 
     // Extract certificate byte vectors, endorse TBS certs, and ensure they parse with OpenSSL.
-    // During the process, both:
+    // During the process:
     //   1. prepare a UJSON payload of endorsed certs to send back to the device,
-    //   2. collect the certs that were endorsed to verify their endorsement signatures with OpenSSL, and
-    //   3. hash all certs to check the integrity of what gets written back to the device.
+    //   2. collect the TBS certs to HMAC them with the WAS,
+    //   3. collect the certs that were endorsed to verify their endorsement signatures with OpenSSL, and
+    //   4. hash all certs to check the integrity of what gets written back to the device.
     let mut cert_hasher = Sha256::new();
     let mut start: usize = 0;
-    let mut host_endorsed_certs: Vec<Vec<u8>> = Vec::new();
+    let mut dice_cert_chain: Vec<EndorsedCert> = Vec::new();
+    let mut dice_cert_chain_cwt: Vec<EndorsedCert> = Vec::new();
+    let mut sku_specific_certs: Vec<EndorsedCert> = Vec::new();
     let mut num_host_endorsed_certs = 0;
-    let mut endorsed_cert_concat = ArrayVec::<u8, 4096>::new();
-    for (i, label) in CERT_LABELS.iter().enumerate().take(manuf_certs.num_certs) {
-        let cert_size = get_cert_size(&manuf_certs.certs[start..])?;
-        let mut cert_bytes = manuf_certs.certs[start..start + cert_size].to_vec();
-        start += cert_size;
-        // Not all certificates need to be endorsed, some certs are already fully endorsed.
-        if manuf_certs.tbs[i] {
+    let mut endorsed_cert_concat = ArrayVec::<u8, 5120>::new();
+    let mut device_was_hmac: Vec<u8> = Vec::new();
+    let mut device_id: Vec<u8> = Vec::new();
+    let mut host_was_hmac = Hmac::<Sha256>::new_from_slice(wafer_auth_secret.as_slice())?;
+    let mut generic_seed_id: usize = 0;
+
+    // Extract CAs.
+    let dice_ca_cert = &ca_cfgs["dice"].certificate;
+    let dice_ca_key = &ca_keys["dice"];
+
+    // DICE certificate names.
+    let dice_cert_names = HashSet::from(["UDS", "CDI_0", "CDI_1"]);
+
+    let t0 = Instant::now();
+    for _ in 0..perso_blob.num_objs {
+        let header = get_obj_header(&perso_blob.body[start..])?;
+        let obj_header_size = std::mem::size_of::<ObjHeaderType>();
+
+        if header.obj_size > (perso_blob.body.len() - start) {
+            bail!("Perso blob overflow!");
+        }
+        start += obj_header_size;
+        match header.obj_type {
+            ObjType::EndorsedX509Cert | ObjType::UnendorsedX509Cert | ObjType::EndorsedCwtCert => {}
+            ObjType::WasTbsHmac => {
+                let was_tbs_hmac_size = header.obj_size - obj_header_size;
+                device_was_hmac
+                    .extend_from_slice(&perso_blob.body[start..start + was_tbs_hmac_size]);
+                start += was_tbs_hmac_size;
+                continue;
+            }
+            ObjType::DeviceId => {
+                let device_id_size = header.obj_size - obj_header_size;
+                device_id.extend_from_slice(&perso_blob.body[start..start + device_id_size]);
+                start += device_id_size;
+                continue;
+            }
+            ObjType::DevSeed => {
+                let dev_seed_size = header.obj_size - obj_header_size;
+                let seeds = &perso_blob.body[start..start + dev_seed_size];
+                cert_hasher.update(seeds);
+                let r = process_dev_seeds(seeds)?;
+                start += dev_seed_size;
+                response.seeds.number += r.len();
+                response.seeds.seed.extend(r);
+                continue;
+            }
+            ObjType::GenericSeed => {
+                let generic_seed_size = header.obj_size - obj_header_size;
+                let generic_seed = &perso_blob.body[start..start + generic_seed_size];
+                log::info!(
+                    "Generic Seed #{}: {}",
+                    generic_seed_id,
+                    hex::encode(generic_seed)
+                );
+                start += generic_seed_size;
+                generic_seed_id += 1;
+                continue;
+            }
+            ObjType::PersoSha256Hash => {
+                let hash_size = header.obj_size - obj_header_size;
+                let hash = &perso_blob.body[start..start + hash_size];
+                log::info!(
+                    "Personalization firmware SHA256 hash: {}",
+                    hex::encode(hash)
+                );
+                start += hash_size;
+                continue;
+            }
+        }
+
+        // The next object is a cert, let's retrieve its properties (name, needs
+        // endorsement, etc.)
+        let cert = get_cert(&perso_blob.body[start..])?;
+        start += cert.wrapped_size;
+
+        // Extract the certificate bytes and endorse the cert if needed.
+        let cert_bytes = if header.obj_type == ObjType::UnendorsedX509Cert {
+            host_was_hmac.update(cert.cert_body.as_slice());
             // Endorse the cert and updates its size.
-            cert_bytes = parse_and_endorse_x509_cert(cert_bytes.clone(), &key)?;
-            // Prepare a collection of certs whose endorsements should be checked with OpenSSL.
-            // TODO: verify the endorsement of the UDS certificate with OpenSSL. It is currently
-            // failing signature verification due to the custom DiceTcbInfo extension being a
-            // non-recognizable extension that is marked "critical".
-            if i > 0 {
-                host_endorsed_certs.push(cert_bytes.clone());
+            let cert_bytes = if dice_cert_names.contains(cert.cert_name) {
+                parse_and_endorse_x509_cert(cert.cert_body.clone(), dice_ca_key)?
+            } else {
+                let ext_ca_key = &ca_keys["ext"];
+                parse_and_endorse_x509_cert(cert.cert_body.clone(), ext_ca_key)?
+            };
+
+            // Prepare a collection of (SKU-specific) certs whose endorsements should be verified.
+            if !dice_cert_names.contains(cert.cert_name) {
+                let ec = EndorsedCert {
+                    format: CertFormat::X509,
+                    name: cert.cert_name.to_string(),
+                    bytes: cert_bytes.clone(),
+                    ignore_critical: false,
+                };
+                response.certs.insert(ec.name.clone(), ec.clone());
+                sku_specific_certs.push(ec);
             }
+
             // Prepare the UJSON data payloads that will be sent back to the device.
-            endorsed_cert_concat.try_extend_from_slice(cert_bytes.as_slice())?;
+            push_endorsed_cert(&cert_bytes, &cert, &mut endorsed_cert_concat)?;
             num_host_endorsed_certs += 1;
+            cert_bytes
+        } else {
+            cert.cert_body
+        };
+
+        // Collect all DICE certs to validate the chain.
+        if dice_cert_names.contains(cert.cert_name) {
+            let (format, cert_chain) = match header.obj_type {
+                ObjType::EndorsedX509Cert | ObjType::UnendorsedX509Cert => {
+                    (CertFormat::X509, &mut dice_cert_chain)
+                }
+                ObjType::EndorsedCwtCert => (CertFormat::Cwt, &mut dice_cert_chain_cwt),
+                ObjType::WasTbsHmac
+                | ObjType::DeviceId
+                | ObjType::DevSeed
+                | ObjType::GenericSeed
+                | ObjType::PersoSha256Hash => unreachable!(),
+            };
+
+            let ec = EndorsedCert {
+                format,
+                name: cert.cert_name.to_string(),
+                bytes: cert_bytes.clone(),
+                ignore_critical: true,
+            };
+
+            response.certs.insert(ec.name.clone(), ec.clone());
+            cert_chain.push(ec);
         }
+
         // Ensure all certs parse with OpenSSL (even those that where endorsed on device).
-        log::info!("{} Cert: {}", label, hex::encode(cert_bytes.clone()));
-        let _ = parse_certificate(cert_bytes.as_slice())?;
+        log::info!("{} Cert: {}", cert.cert_name, hex::encode(&cert_bytes));
+        // CWT certs are parsed and validated below.
+        if header.obj_type != ObjType::EndorsedCwtCert {
+            let _ = parse_certificate(&cert_bytes)?;
+        }
         // Push the cert into the hasher so we can ensure the certs written to the device's flash
         // info pages match those verified on the host.
         cert_hasher.update(cert_bytes);
     }
+    response.stats.log_elapsed_time("perso-process-blobs", t0);
+
+    // Execute extension hook.
+    let t0 = Instant::now();
+    endorsed_cert_concat = ft_inject_certs_ext(endorsed_cert_concat, &mut num_host_endorsed_certs)?;
+    response.stats.log_elapsed_time("perso-ft-ext", t0);
+
+    // Authenticate WAS HMAC.
+    let host_was_hmac_bytes = host_was_hmac.finalize().into_bytes();
+    assert_eq!(host_was_hmac_bytes[..], device_was_hmac[..]);
+
+    // Complete hash of all certs that will be sent back to the device and written to flash. This
+    // is used as integrity check on what will be written to flash.
     let host_computed_certs_hash = cert_hasher.finalize();
 
     // Send endorsed certificates back to the device.
-    let manuf_endorsed_certs = ManufCerts {
-        num_certs: num_host_endorsed_certs,
+    let manuf_perso_data_back = PersoBlob {
+        num_objs: num_host_endorsed_certs,
         next_free: endorsed_cert_concat.len(),
-        tbs: ArrayVec::<bool, 8>::try_from([false; 8]).unwrap(),
-        certs: endorsed_cert_concat,
+        body: endorsed_cert_concat,
     };
-    let _ = UartConsole::wait_for(&*uart, r"Importing endorsed certificates ...", timeout)?;
-    manuf_endorsed_certs.send(&*uart)?;
-    let _ = UartConsole::wait_for(&*uart, r"Finished importing certificates.", timeout)?;
+    let t0 = Instant::now();
+    let _ = UartConsole::wait_for(spi_console, r"Importing endorsed certificates ...", timeout)?;
+    ujson_payloads.dut_in.insert(
+        "FT_PERSO_DATA_IN".to_string(),
+        manuf_perso_data_back.send_with_padding(spi_console, PERSO_BLOB_SERIALIZED_MAX_SIZE)?,
+    );
+    let _ = UartConsole::wait_for(spi_console, r"Finished importing certificates.", timeout)?;
+    response.stats.log_elapsed_time("perso-import-certs", t0);
 
     // Check the integrity of the certificates written to the device's flash by comparing a
     // SHA256 over all certificates computed on the host and device sides.
-    let device_computed_certs_hash = SerdesSha256Hash::recv(&*uart, timeout, false)?;
+    let device_computed_certs_hash = SerdesSha256Hash::recv(
+        spi_console,
+        timeout,
+        /*quiet=*/ false,
+        /*skip_crc=*/ true,
+    )?;
+
     if !device_computed_certs_hash
         .data
         .as_bytes()
@@ -314,43 +570,185 @@ fn provision_certificates(
     }
 
     // Validate the certificate endorsements with OpenSSL.
-    if !host_endorsed_certs.is_empty() {
-        validate_certs_chain(ca_certificate.to_str().unwrap(), &host_endorsed_certs)?;
+    let t0 = Instant::now();
+    if !dice_cert_chain.is_empty() {
+        log::info!(
+            "Validating DICE certificate chain with OpenSSL (root CA: {:?}) ...",
+            dice_ca_cert
+        );
+        validate_cert_chain(dice_ca_cert.to_str().unwrap(), &dice_cert_chain)?;
+        log::info!("Success.");
     }
+    response.stats.log_elapsed_time("perso-validate-dice", t0);
 
+    let t0 = Instant::now();
+    if !dice_cert_chain_cwt.is_empty() {
+        log::info!("Validating DICE certificate chain with hwtrust ...");
+        validate_cwt_dice_chain(&dice_cert_chain_cwt)?;
+        log::info!("Success.");
+    }
+    response
+        .stats
+        .log_elapsed_time("perso-validate-dice-cwt", t0);
+
+    let t0 = Instant::now();
+    if !sku_specific_certs.is_empty() {
+        let ext_ca_cert = &ca_cfgs["ext"].certificate;
+        log::info!(
+            "Validating SKU-specific certificates with OpenSSL (root CA: {:?}) ...",
+            ext_ca_cert
+        );
+        for sku_specific_cert in sku_specific_certs.iter() {
+            validate_cert_chain(ext_ca_cert.to_str().unwrap(), &[sku_specific_cert.clone()])?;
+        }
+        log::info!("Success.");
+    }
+    response.stats.log_elapsed_time("perso-validate-sku", t0);
     Ok(())
 }
 
+#[allow(clippy::too_many_arguments)]
 pub fn run_ft_personalize(
     transport: &TransportWrapper,
     init: &InitializeTest,
-    host_ecc_sk: PathBuf,
-    cert_endorsement_key_wrapper: KeyWrapper,
+    wafer_auth_secret: &ArrayVec<u8, 32>,
+    rma_unlock_token: &ArrayVec<u32, 4>,
+    ca_cfgs: HashMap<String, CaConfig>,
+    ca_keys: HashMap<String, CaKey>,
     perso_certgen_inputs: &ManufCertgenInputs,
+    second_bootstrap: PathBuf,
+    spi_console: &SpiConsoleDevice,
+    ujson_payloads: &mut UjsonPayloads,
     timeout: Duration,
-    ca_certificate: PathBuf,
+    response: &mut PersonalizeResponse,
 ) -> Result<()> {
-    let uart = transport.uart("console")?;
-
-    // Bootstrap personalization binary into flash.
-    uart.clear_rx_buffer()?;
-    init.bootstrap.init(transport)?;
-
-    // Bootstrap again since the flash scrambling seeds were provisioned in the previous step.
-    let _ = UartConsole::wait_for(&*uart, r"Bootstrap requested.", timeout)?;
-    uart.clear_rx_buffer()?;
+    // Bootstrap only personalization binary into ROM_EXT slot A in flash.
+    spi_console.reset_frame_counter();
+    let t0 = Instant::now();
     init.bootstrap.init(transport)?;
-
-    extract_rma_unlock_token(transport, host_ecc_sk, timeout)?;
+    spi_console.reset_frame_counter();
+    response.stats.log_elapsed_time("first-bootstrap", t0);
+
+    // Bootstrap personalization + ROM_EXT + Owner FW binaries into flash, since
+    // flash scrambling seeds were provisioned in the previous step.
+    let t0 = Instant::now();
+    let _ = UartConsole::wait_for(spi_console, r"Bootstrap requested.", timeout)?;
+    response.stats.log_elapsed_time("first-bootstrap-done", t0);
+    let t0 = Instant::now();
+    init.bootstrap.load(transport, &second_bootstrap)?;
+    spi_console.reset_frame_counter();
+    response.stats.log_elapsed_time("second-bootstrap", t0);
+
+    // Send RMA unlock token digest to device.
+    let second_t0 = Instant::now();
+    let t0 = second_t0;
+    send_rma_unlock_token_hash(rma_unlock_token, timeout, spi_console, ujson_payloads)?;
+    response.stats.log_elapsed_time("send-rma-unlock-token", t0);
+
+    // After the OTP SECRET2 partition is programmed, the chip performs a SW
+    // reset, so we need to reset the SPI console frame counter.
+    spi_console.reset_frame_counter();
+
+    // Provision all device certificates.
+    let t0 = Instant::now();
     provision_certificates(
-        transport,
-        cert_endorsement_key_wrapper,
+        wafer_auth_secret,
+        ca_cfgs,
+        ca_keys,
         perso_certgen_inputs,
         timeout,
-        ca_certificate,
+        spi_console,
+        ujson_payloads,
+        response,
     )?;
+    response.stats.log_elapsed_time("perso-all-certs-done", t0);
 
-    let _ = UartConsole::wait_for(&*uart, r"Personalization done.", timeout)?;
+    let _ = UartConsole::wait_for(spi_console, r"Personalization done.", timeout)?;
+    response
+        .stats
+        .log_elapsed_time("second-bootstrap-done", second_t0);
+    Ok(())
+}
+
+pub fn check_slot_b_boot_up(
+    transport: &TransportWrapper,
+    timeout: Duration,
+    response: &mut PersonalizeResponse,
+    owner_fw_success_string: Option<String>,
+) -> Result<()> {
+    transport.reset(UartRx::Clear)?;
+    let uart_console = transport.uart("console")?;
+
+    // The ROM_EXT used to print "Starting ROM_EXT 0.1", but we cleaned up the
+    // ROM_EXT output.  It now prints "ROM_EXT:0.1".
+    let result = UartConsole::wait_for(&*uart_console, r"(?:\n| )ROM_EXT[: ](.*)\r\n", timeout)?;
+    log::info!("ROM_EXT started.");
+    response.stats.log_string(
+        "rom_ext-version",
+        result
+            .get(1)
+            .as_ref()
+            .map(|s| s.as_str())
+            .unwrap_or("unknown"),
+    );
+    let t0 = Instant::now();
+
+    // Timeout for waiting for a potential error message indicating invalid UDS
+    // certificate or for the Owner firmware successful startup.
+    //
+    // These values were tested on fpga cw340 and could be potentially fine-tuned.
+    let slot_b_startup_timeout: Duration =
+        Duration::from_millis(if owner_fw_success_string.is_none() {
+            800
+        } else {
+            2000
+        });
+
+    response.stats.log_elapsed_time("rom_ext-done", t0);
+
+    // CAUTION: This error message should match the one in
+    //   //sw/device/silicon_creator/lib/cert/dice_chain.c.
+    let rom_ext_failure_msg = r"UDS certificate not valid";
+
+    let error_code_msg = r"BFV:.*\r\n";
+
+    // Optional text requried by certain SKUs.
+    let owner_ext_string = ft_post_boot_ext(response)?;
+
+    // Compile the full regex anchor including possible error messages and
+    // expected owner FW messages.
+    let errors_text = format!(r"{}|{}", rom_ext_failure_msg, error_code_msg);
+    let anchor_text = match (owner_ext_string.clone(), owner_fw_success_string.clone()) {
+        (Some(x), Some(y)) => format!(r"(?s)({errors_text}|{x}.*{y})"),
+        (Some(x), None) => format!(r"(?s)({errors_text}|{x})"),
+        (None, Some(y)) => format!(r"(?s)({errors_text}|{y})"),
+        (None, None) => format!(r"(?s)({errors_text})"),
+    };
+
+    let result =
+        UartConsole::wait_for(&*uart_console, anchor_text.as_str(), slot_b_startup_timeout);
+
+    match result {
+        Ok(captures) => {
+            if captures[0] == *rom_ext_failure_msg {
+                bail!("Invalid UDS certificate detected!");
+            }
+            if captures[0].starts_with("BFV:") {
+                bail!("Error detected!");
+            }
+        }
+        Err(e) => {
+            if owner_fw_success_string.is_none()
+                && owner_ext_string.is_none()
+                && e.to_string().contains("Timed Out")
+            {
+                // Error message not found after timeout. This is the expected behavior.
+            } else {
+                // An unexpected error occurred while waiting for the console output.
+                bail!(e);
+            }
+        }
+    }
 
     Ok(())
 }
diff --git a/sw/host/provisioning/orchestrator/README.md b/sw/host/provisioning/orchestrator/README.md
new file mode 100644
index 0000000000000..f69c0a3479f52
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/README.md
@@ -0,0 +1,75 @@
+# Provisioning Orchestrator
+
+The provisioning orchestrator is a Python script that enables running benchtop
+provisioning flows for Earlgrey chips. The script can be run in two different
+ways:
+1. via Bazel, or
+2. directly.
+
+## Running with Bazel
+
+To run on an FPGA for testing, run:
+
+```
+# Select either cw340 or hyper310
+export FPGA_TARGET=hyper310
+bazel run \
+  --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_${FPGA_TARGET}_rom_with_fake_keys \
+  --//hw/bitstream/universal:otp=//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty \
+  //sw/host/provisioning/orchestrator/src:orchestrator -- \
+    --sku-config=$(pwd)/sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+    --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+    --test-exit-token="0x22222222_22222222_22222222_22222222" \
+    --fpga=${FPGA_TARGET} \
+    --non-interactive \
+    --ast-cfg-version=0 \
+    --db-path=$(pwd)/provisioning.sqlite
+```
+
+To run on silicon, run:
+
+```
+bazel run \
+  //sw/host/provisioning/orchestrator/src:orchestrator -- \
+    --sku-config=$(pwd)/sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+    --test-unlock-token=<token as a hexstring> \
+    --test-exit-token=<token as a hexstring> \
+    --non-interactive \
+    --db-path=$(pwd)/provisioning.sqlite
+```
+
+## Running Directly
+
+Build the orchestrator package. This will build a package with all SKU
+dependencies.
+
+```
+export FPGA_TARGET=hyper310
+bazel build \
+  --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_${FPGA_TARGET}_rom_with_fake_keys \
+  --//hw/bitstream/universal:otp=//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty \
+  //sw/host/provisioning/orchestrator/src:orchestrator.zip
+```
+
+To run the packaged orchestrator script:
+
+```
+export ORCHESTRATOR_RUN_DIR=/tmp/orchestrator
+mkdir -p ${ORCHESTRATOR_RUN_DIR}
+cd ${ORCHESTRATOR_RUN_DIR}
+cp ${REPO_TOP}/bazel-bin/sw/host/provisioning/orchestrator/src/orchestrator.zip .
+
+export ORCHESTRATOR_ZIP="${ORCHESTRATOR_RUN_DIR}/orchestrator.zip"
+unzip ${ORCHESTRATOR_ZIP} "runfiles/sc_hsm/*"
+
+# Run tool. The path to the --sku-config parameter is relative to the
+# workspace root.
+export FPGA_TARGET=hyper310
+python3 ${ORCHESTRATOR_ZIP} \
+  --sku-config=sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --fpga=${FPGA_TARGET} \
+  --non-interactive \
+  --db-path=provisioning.sqlite
+```
diff --git a/sw/host/provisioning/orchestrator/configs/skus/BUILD b/sw/host/provisioning/orchestrator/configs/skus/BUILD
new file mode 100644
index 0000000000000..05cfdbd92b7d2
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/configs/skus/BUILD
@@ -0,0 +1,20 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load(
+    "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
+    "EARLGREY_SKUS",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+filegroup(
+    name = "all",
+    srcs = depset([
+        config["orchestrator_cfg"]
+        for _, config in EARLGREY_SKUS.items()
+    ]).to_list(),
+)
diff --git a/sw/host/provisioning/orchestrator/configs/skus/emulation.hjson b/sw/host/provisioning/orchestrator/configs/skus/emulation.hjson
new file mode 100644
index 0000000000000..ceb385e3430e1
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/configs/skus/emulation.hjson
@@ -0,0 +1,27 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+{
+  name: "emulation",
+  product: "earlgrey_a2",
+  si_creator: "nuvoton",
+  package: "npcr10",
+  target_lc_state: "prod",
+  otp: "em00",
+  perso_bin: "sw/device/silicon_creator/manuf/base/ft_personalize_{sku}_{target}.prod_key_0.prod_key_0.signed.bin",
+  owner_fw_boot_str: "Bare metal PASS!"
+  dice_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  ext_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  token_encrypt_key: "sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der"
+}
diff --git a/sw/host/provisioning/orchestrator/configs/skus/emulation_dice_cwt.hjson b/sw/host/provisioning/orchestrator/configs/skus/emulation_dice_cwt.hjson
new file mode 100644
index 0000000000000..3c74dab24634c
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/configs/skus/emulation_dice_cwt.hjson
@@ -0,0 +1,27 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+{
+  name: "emulation_dice_cwt",
+  product: "earlgrey_a2",
+  si_creator: "nuvoton",
+  package: "npcr10",
+  target_lc_state: "prod",
+  otp: "em00",
+  perso_bin: "sw/device/silicon_creator/manuf/base/ft_personalize_{sku}_{target}.prod_key_0.prod_key_0.signed.bin",
+  owner_fw_boot_str: "Bare metal PASS!",
+  dice_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  ext_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  token_encrypt_key: "sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der"
+}
diff --git a/sw/host/provisioning/orchestrator/configs/skus/emulation_tpm.hjson b/sw/host/provisioning/orchestrator/configs/skus/emulation_tpm.hjson
new file mode 100644
index 0000000000000..5fce75dc00c3d
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/configs/skus/emulation_tpm.hjson
@@ -0,0 +1,27 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+{
+  name: "emulation_tpm",
+  product: "earlgrey_a2",
+  si_creator: "nuvoton",
+  package: "npcr10",
+  target_lc_state: "prod",
+  otp: "em00",
+  perso_bin: "sw/device/silicon_creator/manuf/base/ft_personalize_{sku}_{target}.prod_key_0.prod_key_0.signed.bin",
+  owner_fw_boot_str: "Bare metal PASS!"
+  dice_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  ext_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/fake/ext_ca.pem",
+    key: "sw/device/silicon_creator/manuf/keys/fake/sk.pkcs8.der",
+    key_type: "Raw",
+    key_id: "0xfe584ae7_53790cfd_8601a312_fb32d3c1_b822d112"
+  }
+  token_encrypt_key: "sw/device/silicon_creator/manuf/keys/fake/rma_unlock_enc_rsa3072.pub.der"
+}
diff --git a/sw/host/provisioning/orchestrator/configs/skus/sival.hjson b/sw/host/provisioning/orchestrator/configs/skus/sival.hjson
new file mode 100644
index 0000000000000..35b11f1bd5478
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/configs/skus/sival.hjson
@@ -0,0 +1,32 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+{
+  name: "sival",
+  product: "earlgrey_a2",
+  si_creator: "nuvoton",
+  package: "npcr10",
+  target_lc_state: "prod",
+  otp: "sv00",
+  perso_bin: "sw/device/silicon_creator/manuf/base/binaries/ft_personalize_{sku}_{target}.signed.bin",
+  // TODO(cfrantz, ttrippel): This owner_fw isn't signed with the sival owner keys,
+  // so we expect the ROM_EXT to BFV with `kErrorOwnershipKeyNotFound`. Therefore,
+  // we mark success when the ROM_EXT detects a valid ownership state.
+  owner_fw_boot_str: "ownership: OWND"
+  dice_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/sival/dice_ca.pem",
+    key: "sv00-earlgrey-a1-ca-dice-0",
+    key_type: "Token",
+    key_id: "0x5398A4F090F2A95C3D52FC98DEB9F2F9AF042F6E"
+  }
+  // There are no certs provisioned in the extension portion of the firmware, so
+  // we use the same CA as the DICE CA.
+  ext_ca: {
+    certificate: "sw/device/silicon_creator/manuf/keys/sival/dice_ca.pem",
+    key: "sv00-earlgrey-a1-ca-dice-0",
+    key_type: "Token",
+    key_id: "0x5398A4F090F2A95C3D52FC98DEB9F2F9AF042F6E"
+  }
+  token_encrypt_key: "sw/device/silicon_creator/manuf/keys/sival/rma_unlock_enc_rsa3072.pub.der"
+}
diff --git a/sw/host/provisioning/orchestrator/data/BUILD b/sw/host/provisioning/orchestrator/data/BUILD
new file mode 100644
index 0000000000000..c8dcacd88fdb5
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/data/BUILD
@@ -0,0 +1,7 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
diff --git a/sw/host/provisioning/orchestrator/data/packages/BUILD b/sw/host/provisioning/orchestrator/data/packages/BUILD
new file mode 100644
index 0000000000000..c8dcacd88fdb5
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/data/packages/BUILD
@@ -0,0 +1,7 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
diff --git a/sw/host/provisioning/orchestrator/data/packages/earlgrey_a1.hjson b/sw/host/provisioning/orchestrator/data/packages/earlgrey_a1.hjson
new file mode 100644
index 0000000000000..ff0531b658153
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/data/packages/earlgrey_a1.hjson
@@ -0,0 +1,16 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Earglrey A1 package identifiers.
+#
+# Mapping of package names to package IDs. These will be encoded in the device
+# ID if required by the SKU. All IDs are encoded as a hex string.
+
+{
+  npcr10: "0x0",
+  npcr11: "0x1",
+  npcr12: "0x2",
+  npcr13: "0x3",
+  npcr1e: "0xE",
+}
diff --git a/sw/host/provisioning/orchestrator/data/packages/earlgrey_a2.hjson b/sw/host/provisioning/orchestrator/data/packages/earlgrey_a2.hjson
new file mode 100644
index 0000000000000..4060bd4486d11
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/data/packages/earlgrey_a2.hjson
@@ -0,0 +1,16 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Earglrey A2 package identifiers.
+#
+# Mapping of package names to package IDs. These will be encoded in the device
+# ID if required by the SKU. All IDs are encoded as a hex string.
+
+{
+  npcr10: "0x0",
+  npcr11: "0x1",
+  npcr12: "0x2",
+  npcr13: "0x3",
+  npcr1e: "0xE",
+}
diff --git a/sw/host/provisioning/orchestrator/data/products.hjson b/sw/host/provisioning/orchestrator/data/products.hjson
new file mode 100644
index 0000000000000..3f4a75263ac65
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/data/products.hjson
@@ -0,0 +1,17 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# OpenTitan hardware origin database.
+
+{
+  si_creator_ids: {
+    nuvoton: "0x4001"
+    none: "0xFFFF"
+  },
+  product_ids: {
+    earlgrey_a1: "0x0002",
+    earlgrey_a2: "0x0003",
+    none: "0xFFFF"
+  },
+}
diff --git a/sw/host/provisioning/orchestrator/src/BUILD b/sw/host/provisioning/orchestrator/src/BUILD
new file mode 100644
index 0000000000000..dbbbbe61b8565
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/BUILD
@@ -0,0 +1,129 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@ot_python_deps//:requirements.bzl", "requirement")
+load("@rules_python//python:defs.bzl", "py_binary", "py_library")
+
+package(default_visibility = ["//visibility:public"])
+
+py_library(
+    name = "device_id",
+    srcs = ["device_id.py"],
+    data = [
+        "//sw/host/provisioning/orchestrator/data:products.hjson",
+        "//sw/host/provisioning/orchestrator/data/packages:earlgrey_a1.hjson",
+        "//sw/host/provisioning/orchestrator/data/packages:earlgrey_a2.hjson",
+    ],
+    imports = ["."],
+    deps = [
+        ":sku_config",
+        ":util",
+        requirement("hjson"),
+    ],
+)
+
+py_binary(
+    name = "devid_header_gen",
+    srcs = ["devid_header_gen.py"],
+    data = ["//sw/device/silicon_creator/manuf/keys:ca_data_all"],
+    imports = ["."],
+    deps = [
+        ":device_id",
+        ":sku_config",
+        requirement("hjson"),
+        requirement("mako"),
+    ],
+)
+
+py_library(
+    name = "ca_config",
+    srcs = ["ca_config.py"],
+)
+
+py_library(
+    name = "db",
+    srcs = ["db.py"],
+    imports = ["."],
+    deps = [
+        ":ot_dut",
+    ],
+)
+
+py_library(
+    name = "sku_config",
+    srcs = ["sku_config.py"],
+    data = [
+        "//sw/host/provisioning/orchestrator/data:products.hjson",
+        "//sw/host/provisioning/orchestrator/data/packages:earlgrey_a1.hjson",
+        "//sw/host/provisioning/orchestrator/data/packages:earlgrey_a2.hjson",
+    ],
+    deps = [
+        ":ca_config",
+        ":util",
+        requirement("hjson"),
+    ],
+)
+
+py_library(
+    name = "util",
+    srcs = ["util.py"],
+    imports = ["."],
+    deps = [
+        requirement("hjson"),
+        "@rules_python//python/runfiles",
+    ],
+)
+
+py_library(
+    name = "ot_dut",
+    srcs = ["ot_dut.py"],
+    imports = ["."],
+    deps = [
+        ":device_id",
+        ":sku_config",
+        ":util",
+    ],
+)
+
+filegroup(
+    name = "data_dependencies",
+    testonly = True,
+    srcs = [
+        "//hw/bitstream/universal:splice",
+        "//sw/device/silicon_creator/manuf/base:ft_personalize_all",
+        "//sw/device/silicon_creator/manuf/base:sram_cp_provision",
+        "//sw/device/silicon_creator/manuf/base:sram_ft_individualize_all",
+        "//sw/device/silicon_creator/manuf/keys:ca_data_all",
+        "//sw/host/provisioning/cp",
+        "//sw/host/provisioning/ft:ft_all",
+        "//sw/host/provisioning/orchestrator/configs/skus:all",
+        "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
+        "//third_party/openocd:jtag_olimex_cfg",
+        "//third_party/openocd:openocd_bin",
+        "@sc_hsm",
+    ],
+)
+
+py_binary(
+    name = "orchestrator",
+    testonly = True,
+    srcs = ["orchestrator.py"],
+    data = [":data_dependencies"],
+    imports = ["."],
+    deps = [
+        ":db",
+        ":device_id",
+        ":ot_dut",
+        ":sku_config",
+        ":util",
+        requirement("hjson"),
+    ],
+)
+
+filegroup(
+    name = "orchestrator.zip",
+    testonly = True,
+    srcs = [":orchestrator"],
+    output_group = "python_zip_file",
+)
diff --git a/sw/host/provisioning/orchestrator/src/ca_config.py b/sw/host/provisioning/orchestrator/src/ca_config.py
new file mode 100644
index 0000000000000..8f90ad213c91a
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/ca_config.py
@@ -0,0 +1,63 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Module for loading and validating OpenTitan SKU configuration."""
+
+from dataclasses import dataclass
+from pathlib import Path
+
+from util import resolve_runfile
+
+
+@dataclass
+class CaConfig:
+    """Class for Certificate Authority configuration."""
+    name: str  # valid: must be in ["dice_ca", "ext_ca"]
+    certificate: str  # valid: any valid path to a CA PEM file
+    key_type: str  # valid: must be in ["Raw", "Token"]
+    key_id: str  # valid: 160-bit serial number of CA certificate
+    key: str  # valid: valid path to DER CA private key file or key token ID
+
+    def __post_init__(self):
+        # Update certificate and key members to Path objs if necessary.
+        self.certificate = Path(resolve_runfile(self.certificate))
+        if self.key_type == "Raw":
+            self.key = Path(resolve_runfile(self.key))
+        self.validate()
+
+    def validate(self) -> None:
+        """Validates this object's attributes."""
+        # Validate name.
+        if self.name not in {"dice_ca", "ext_ca"}:
+            raise ValueError("CA name must be in [\"dice_ca\", \"ext_ca\"]")
+        # Validate certificate path.
+        if not self.certificate.exists():
+            raise ValueError("CA certificate file ({}) does not exist.".format(
+                self.certificate))
+        if self.certificate.suffix != ".pem":
+            raise ValueError(
+                "CA certificate file ({}) must be a PEM file.".format(
+                    self.certificate))
+        # Validate key_type.
+        if self.key_type not in {"Raw", "Token"}:
+            raise ValueError("CA key type must be in [\"Raw\", \"Token\"]")
+        # TODO: validate key_id
+        # Validate key.
+        if self.key_type == "Raw":
+            if not self.key.exists():
+                raise ValueError("CA private file does not exist.")
+            if self.key.suffix != ".der":
+                raise ValueError(
+                    "CA private file ({}) must be a DER file.".format(
+                        self.key))
+        elif self.key_type == "Token":
+            # TODO: check if Cloud KMS / Nitokey token ID exists.
+            pass
+
+    def to_dict_entry(self) -> dict:
+        return {
+            "certificate": str(self.certificate),
+            "key": str(self.key),
+            "key_type": self.key_type,
+            "key_id": self.key_id,
+        }
diff --git a/sw/host/provisioning/orchestrator/src/db.py b/sw/host/provisioning/orchestrator/src/db.py
new file mode 100644
index 0000000000000..72727d9b81704
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/db.py
@@ -0,0 +1,206 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Module for interacting with a SQLite database."""
+
+import sqlite3
+import datetime
+import json
+from dataclasses import dataclass
+
+import ot_dut
+
+
+@dataclass
+class DBConfig(object):
+    db_path: str
+
+
+class DB(object):
+    """Class for interacting with a SQLite database."""
+
+    def __init__(self, db_config: DBConfig):
+        self.db_path = db_config.db_path
+        self._conn = None
+
+    def __del__(self):
+        if self._conn:
+            self._conn.close()
+
+    def try_cursor(self):
+        """Returns a cursor to the database."""
+        if not self._conn:
+            self._conn = sqlite3.connect(self.db_path)
+        return self._conn.cursor()
+
+    def commit(self):
+        """Commits the connection to the database."""
+        if not self._conn:
+            raise RuntimeError("No connection to commit")
+        self._conn.commit()
+
+
+@dataclass
+class DeviceRecord(object):
+    """Class for holding data and routines for device records."""
+    device_id: str
+    sku: str
+    provisioning_state: str
+    timestamp: int
+    rma_unlock_token: str
+    dice_uds: str
+    cp_json: str
+    ft_json: str
+    last_update: int
+
+    @staticmethod
+    def schema_list():
+        schema = []
+        type_map = {"str": "text", "int": "int"}
+        for key, value in DeviceRecord.__annotations__.items():
+            schema.append(f"{key} {type_map[value.__name__]}")
+        return schema
+
+    @staticmethod
+    def table_name() -> str:
+        return "device_records"
+
+    def columns() -> [str]:
+        return list(DeviceRecord.__annotations__.keys())
+
+    @staticmethod
+    def create_table_string(table_name: str) -> str:
+        """Returns a string to create a table in the database.
+
+        Args:
+            table_name: The name of the table to create.
+        Returns:
+            A string to create a table in the database.
+        """
+        return f"CREATE TABLE IF NOT EXISTS {table_name} ({', '.join(DeviceRecord.schema_list())})"
+
+    @staticmethod
+    def create_table(db: DB):
+        """Creates a table in the database.
+
+        Args:
+            db: The database object.
+        """
+        c = db.try_cursor()
+        c.execute(DeviceRecord.create_table_string(DeviceRecord.table_name()))
+        db.commit()
+
+    @staticmethod
+    def query(db: DB, device_id: str) -> 'DeviceRecord':
+        """Queries the database for the record.
+
+        Args:
+            db: The database object.
+        Returns:
+            The record from the database.
+        """
+        c = db.try_cursor()
+        c.execute(
+            f"SELECT * FROM {DeviceRecord.table_name()} WHERE device_id=?",
+            (device_id, ))
+        record = c.fetchone()
+        if record is None:
+            return None
+        return DeviceRecord(*record)
+
+    @staticmethod
+    def query_all(db: DB) -> ['DeviceRecord']:
+        """Queries the database for all records.
+
+        Args:
+            db: The database object.
+        Returns:
+            All records from the database.
+        """
+        c = db.try_cursor()
+        c.execute(f"SELECT * FROM {DeviceRecord.table_name()}")
+        records = c.fetchall()
+        return [DeviceRecord(*record) for record in records]
+
+    @staticmethod
+    def from_dut(dut: ot_dut.OtDut) -> 'DeviceRecord':
+        """Creates a DeviceRecord object from a DUT object.
+
+        Args:
+            dut: The DUT object.
+        Returns:
+            A DeviceRecord object.
+        """
+        dice_uds = ""
+        if "UDS" in dut.ft_data["certs"]:
+            dice_uds = dut.ft_data["certs"]["UDS"]["bytes"]
+        return DeviceRecord(
+            device_id=dut.device_id.to_hexstr(),
+            sku=str(dut.device_id.sku),
+            provisioning_state=dut.ft_data["lc_state"]["mission_mode"],
+            timestamp=0,
+            rma_unlock_token=str(dut.ft_data["rma_unlock_token"]),
+            dice_uds=str(dice_uds),
+            cp_json=json.dumps(dut.cp_data),
+            ft_json=json.dumps(dut.ft_data),
+            last_update=0,
+        )
+
+    def insert(self, db: DB):
+        """Inserts the record into the database.
+
+        Args:
+            db: The database object.
+        """
+
+        self.timestamp = int(datetime.datetime.now().timestamp())
+        self.last_update = int(datetime.datetime.now().timestamp())
+
+        c = db.try_cursor()
+        c.execute(
+            f"INSERT INTO {DeviceRecord.table_name()} VALUES (?, ?, ?, ?, ?, ?, ?, ?, ?)",
+            (
+                self.device_id,
+                self.sku,
+                self.provisioning_state,
+                self.timestamp,
+                self.rma_unlock_token,
+                self.dice_uds,
+                self.cp_json,
+                self.ft_json,
+                self.last_update,
+            ))
+        db.commit()
+
+    def update(self, db: DB):
+        """Updates the record in the database.
+
+        Args:
+            db: The database object.
+        """
+        self.last_update = int(datetime.datetime.now().timestamp())
+
+        c = db.try_cursor()
+        keys = DeviceRecord.__annotations__.keys()
+        update_params = [
+            f"{field}=?" for field in keys if field != "device_id"
+        ]
+        update_vals = [
+            getattr(self, field) for field in keys if field != "device_id"
+        ]
+        update_vals.append(self.device_id)
+        c.execute(
+            f"UPDATE {DeviceRecord.table_name()} SET {', '.join(update_params)} WHERE device_id=?",
+            update_vals)
+        db.commit()
+
+    def upsert(self, db: DB):
+        """Inserts or updates the record in the database.
+
+        Args:
+            db: The database object.
+        """
+        if DeviceRecord.query(db, self.device_id) is None:
+            self.insert(db)
+        else:
+            self.update(db)
diff --git a/sw/host/provisioning/orchestrator/src/device_id.py b/sw/host/provisioning/orchestrator/src/device_id.py
new file mode 100644
index 0000000000000..d1a4473a709a5
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/device_id.py
@@ -0,0 +1,328 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Module for computing OpenTitan device IDs."""
+
+import struct
+from dataclasses import dataclass
+
+import util
+from sku_config import SkuConfig
+
+_RESERVED_VALUE = 0
+
+# This defines the format of the "sku_specific" portion of the device ID. This
+# should be updated everytime the the "sku_specific" portion of the device ID is
+# updated.
+_SKU_SPECIFIC_FORMAT_VERSION = 1
+
+
+@dataclass
+class DeviceIdentificationNumber:
+    """Class for storing Device Identification Number portion of Device ID.
+
+    DINs for blind assembly parts have all values set to -1 or (UINT*_MAX).
+    """
+    year: int = 0  # valid range: [0, 9]
+    week: int = 0  # valid range: [0, 51]
+    lot: int = 0  # valid range: [0, 999]
+    wafer: int = 0  # valid range: [0,99]
+    wafer_x_coord: int = 0  # valid range: [0, 999]
+    wafer_y_coord: int = 0  # valid range: [0, 999]
+    blind_asm_status: bool = False  # boolean indicating if blind assembly part
+
+    def __post_init__(self):
+        # Check if blind assembly part, if so, we skip field validation.
+        if (self.year == -1 and self.week == -1 and self.lot == -1 and
+                self.wafer == -1 and self.wafer_x_coord == -1 and
+                self.wafer_y_coord == -1):
+            self.blind_asm_status = True
+        else:
+            self.blind_asm_status = False
+            self.validate()
+
+    def validate(self) -> None:
+        """Validates this object's attributes."""
+        # Validate year.
+        if not 0 <= self.year <= 9:
+            raise ValueError("Year ({}) must be in [0, 9].".format(self.year))
+        # Validate week.
+        if not 0 <= self.week <= 51:
+            raise ValueError("Week ({}) must be in [0, 51].".format(self.week))
+        # Validate lot.
+        if not 0 <= self.lot <= 999:
+            raise ValueError("Lot ({}) must be in [0, 999].".format(self.lot))
+        # Validate wafer.
+        if not 0 <= self.wafer <= 99:
+            raise ValueError("Wafer ({}) must be in [0, 99].".format(
+                self.wafer))
+        # Validate wafer X coordinate.
+        if not 0 <= self.wafer_x_coord <= 999:
+            raise ValueError(
+                "Wafer X coordinate ({}) must be in [0, 999].".format(
+                    self.wafer_x_coord))
+        # Validate wafer Y coordinate.
+        if not 0 <= self.wafer_y_coord <= 999:
+            raise ValueError(
+                "Wafer Y coordinate ({}) must be in [0, 999].".format(
+                    self.wafer_y_coord))
+
+    def to_int(self) -> int:
+        """Convert DIN to an int."""
+        # If blind assembly part, the DIN is UINT64_MAX.
+        if self.blind_asm_status:
+            return 2**64 - 1
+        din = 0
+        din |= util.bcd_encode(self.wafer_y_coord) << 44
+        din |= util.bcd_encode(self.wafer_x_coord) << 32
+        din |= util.bcd_encode(self.wafer) << 24
+        din |= util.bcd_encode(self.lot) << 12
+        din |= util.bcd_encode(self.week) << 4
+        din |= self.year
+        return din
+
+    @staticmethod
+    def from_int(din: int) -> "DeviceIdentificationNumber":
+        year = -1
+        week = -1
+        lot = -1
+        wafer = -1
+        wafer_x_coord = -1
+        wafer_y_coord = -1
+        if din != 0xFFFFFFFFFFFFFFFF:
+            year = util.bcd_decode(din & 0xF)
+            week = util.bcd_decode((din >> 4) & 0xFF)
+            lot = util.bcd_decode((din >> 12) & 0xFFF)
+            wafer = util.bcd_decode((din >> 24) & 0xFF)
+            wafer_x_coord = util.bcd_decode((din >> 32) & 0xFFF)
+            wafer_y_coord = util.bcd_decode((din >> 44) & 0xFFF)
+        return DeviceIdentificationNumber(year=year,
+                                          week=week,
+                                          lot=lot,
+                                          wafer=wafer,
+                                          wafer_x_coord=wafer_x_coord,
+                                          wafer_y_coord=wafer_y_coord)
+
+    @staticmethod
+    def blind_asm() -> "DeviceIdentificationNumber":
+        return DeviceIdentificationNumber(year=-1,
+                                          week=-1,
+                                          lot=-1,
+                                          wafer=-1,
+                                          wafer_x_coord=-1,
+                                          wafer_y_coord=-1)
+
+
+class DeviceId():
+    """An OpenTitan device ID.
+
+    This object can generate different encodings of the device ID, including:
+      - hex string, and
+      - int.
+
+    Attributes:
+        si_creator_id: A 16-bit number assigned by the OpenTitan project.
+        product_id: A 16-bit number assigned by the OpenTitan project.
+        din: A 64-bit unique identifier.
+        package_id: A 16-bit number indicating which package the chip is in.
+        sku_id: A 32-bit string indicating the SKU the chip was provisioned for.
+    """
+
+    def __init__(self, sku_config: SkuConfig, din: DeviceIdentificationNumber):
+        # Save string keys for easier printing.
+        self._product = sku_config.product
+        self._si_creator = sku_config.si_creator
+        self._package = sku_config.package
+        self.sku = sku_config.name
+
+        # Build HW origin with:
+        # - 16 bits SiliconCreator ID
+        # - 16 bits Product ID
+        self.si_creator_id = sku_config.si_creator_id
+        self.product_id = sku_config.product_id
+        self._hw_origin = util.bytes_to_int(
+            struct.pack("<HH", self.si_creator_id, self.product_id))
+
+        # Build Device Identification Number with:
+        # - Year
+        # - Week
+        # - Lot #
+        # - Wafer #
+        # - Wafer X coord.
+        # - Wafer Y coord.
+        self.din = din
+        din_as_int = self.din.to_int()
+
+        # Build base unique ID (i.e., CP device ID).
+        self.base_uid = util.bytes_to_int(
+            struct.pack("<IQI", self._hw_origin, din_as_int, 0))
+
+        # Build SKU specific field (i.e., FT device ID).
+        self.package_id = sku_config.package_id
+        self.ast_cfg_version = sku_config.ast_cfg_version
+        self.otp_id = util.bytes_to_int(
+            sku_config.otp.upper()[0:2].encode("utf-8")[::-1])
+        self.otp_version = sku_config.otp_version
+        self.sku_id = util.bytes_to_int(
+            self.sku.upper()[:4].encode("utf-8")[::-1])
+        self.sku_specific_version = _SKU_SPECIFIC_FORMAT_VERSION
+        self.sku_specific = util.bytes_to_int(
+            struct.pack(
+                "<BBHBBHIHBB",
+                self.package_id,
+                self.ast_cfg_version,
+                self.otp_id,
+                self.otp_version,
+                _RESERVED_VALUE,
+                _RESERVED_VALUE,
+                self.sku_id,
+                _RESERVED_VALUE,
+                _RESERVED_VALUE,
+                self.sku_specific_version,
+            ))
+
+        # Build full device ID.
+        self.device_id = (self.sku_specific << 128) | self.base_uid
+
+    def update_ast_cfg_version(self, other: int) -> None:
+        """Updates the AST Config Version component of the device ID.
+
+        Args:
+            other: The other AST configuration version to update with.
+        """
+        if other < 0 or other > 255:
+            raise ValueError("AST config version should be in range [0, 256).")
+        self.ast_cfg_version = other
+
+        # Rebuild SKU-specific portion of the device ID.
+        self.sku_specific = util.bytes_to_int(
+            struct.pack(
+                "<BBHBBHIHBB",
+                self.package_id,
+                self.ast_cfg_version,
+                self.otp_id,
+                self.otp_version,
+                _RESERVED_VALUE,
+                _RESERVED_VALUE,
+                self.sku_id,
+                _RESERVED_VALUE,
+                _RESERVED_VALUE,
+                self.sku_specific_version,
+            ))
+        self.device_id = (self.sku_specific << 128) | self.base_uid
+
+    def update_din(self, other: "DeviceIdentificationNumber") -> None:
+        """Updates the DIN component of the device ID with another DIN object.
+
+        Updates the DeviceIdentificationNumber (DIN) component of the device ID.
+
+        Args:
+            other: The other DeviceIdentificationNumber object to update with.
+        """
+        self.din = other
+
+        # Build base unique ID.
+        self.base_uid = util.bytes_to_int(
+            struct.pack("<IQI", self._hw_origin, self.din.to_int(), 0))
+        self.device_id = (self.sku_specific << 128) | self.base_uid
+
+    @staticmethod
+    def from_hexstr(hexstr: str) -> "DeviceId":
+        """Creates a DeviceId object from a hex string."""
+        device_id_int = util.parse_hexstring_to_int(hexstr)
+        return DeviceId.from_int(device_id_int)
+
+    @staticmethod
+    def from_int(device_id: int) -> "DeviceId":
+        """Creates a DeviceId object from an int."""
+        # Extract base unique ID.
+        mask = (1 << 128) - 1
+        base_uid = device_id & mask
+        # Extract HW origin.
+        hw_origin = base_uid & 0xFFFFFFFFFF
+        si_creator_id = hw_origin & 0xFFFF
+        product_id = (hw_origin >> 16) & 0xFFFF
+
+        # Extract SKU specific field.
+        sku_specific = device_id >> 128
+        package_id = sku_specific & 0xFF
+        ast_cfg_version = (sku_specific >> 8) & 0xFF
+        otp_id = (sku_specific >> 16) & 0xFFFF
+        otp_version = (sku_specific >> 32) & 0xFF
+        sku_id = (sku_specific >> 64) & 0xFFFFFFFF
+
+        # Unpack OTP name.
+        try:
+            otp = (struct.pack('>H', otp_id).decode('ascii') +
+                   f"{otp_version:02x}")
+        except UnicodeDecodeError:
+            otp = "Invalid"
+
+        # Extract SKU config.
+        sku_config = SkuConfig.from_ids(product_id, si_creator_id, package_id,
+                                        otp, ast_cfg_version)
+
+        # Unpack SKU name.
+        try:
+            sku_name = struct.pack('>I', sku_id).decode('ascii')
+        except UnicodeDecodeError:
+            sku_name = "Unknown"
+        sku_config.name = sku_name
+
+        # Extract DIN.
+        mask_din = (1 << 64) - 1
+        din = DeviceIdentificationNumber.from_int((base_uid >> 32) & mask_din)
+
+        return DeviceId(sku_config, din)
+
+    def base_uid_hexstr(self) -> str:
+        """Returns the Base UID portion of the device ID as a hex string."""
+        return util.format_hex(self.base_uid, width=32)
+
+    def sku_specific_hexstr(self) -> str:
+        """Returns the SKU specific portion of the device ID as a hex string."""
+        return util.format_hex(self.sku_specific, width=32)
+
+    def to_hexstr(self) -> str:
+        """Returns the device ID as a hex string."""
+        return util.format_hex(self.device_id, width=64)
+
+    def to_int(self) -> int:
+        """Returns the device ID as an int."""
+        return self.device_id
+
+    def pretty_print(self):
+        print("> Device ID:          {}".format(self))
+        print("SiliconCreator ID:    {} ({})".format(
+            util.format_hex(self.si_creator_id, width=4), self._si_creator))
+        print("Product ID:           {} ({})".format(
+            util.format_hex(self.product_id, width=4), self._product))
+        if self.din is not None:
+            print("DIN Year:             {}".format(self.din.year))
+            print("DIN Week:             {}".format(self.din.week))
+            print("DIN Lot:              {}".format(self.din.lot))
+            print("DIN Wafer:            {}".format(self.din.wafer))
+            print("DIN Wafer X Coord:    {}".format(self.din.wafer_x_coord))
+            print("DIN Wafer Y Coord:    {}".format(self.din.wafer_y_coord))
+        else:
+            print("DIN:               <unset>")
+        print("Reserved (40 bits):   {}".format(hex(_RESERVED_VALUE)))
+        print("Package ID:           {} ({})".format(self.package_id,
+                                                     self._package))
+        print("AST Config Version:   {}".format(self.ast_cfg_version))
+        print("OTP ID:               {} ({})".format(
+            hex(self.otp_id),
+            self.otp_id.to_bytes(length=4, byteorder="big").decode("utf-8")))
+        print("OTP Version:          {}".format(self.otp_version))
+        print("Reserved (24 bits):   {}".format(hex(_RESERVED_VALUE)))
+        print("SKU ID:               {} ({})".format(
+            util.format_hex(self.sku_id),
+            self.sku_id.to_bytes(length=4, byteorder="big").decode("utf-8")))
+        print("Reserved (24 bits):   {}".format(hex(_RESERVED_VALUE)))
+        print("SKU Specific Version: {}".format(self.sku_specific_version))
+
+    def __str__(self):
+        return self.to_hexstr()
+
+    def __eq__(self, other):
+        return self.device_id == other.device_id
diff --git a/sw/host/provisioning/orchestrator/src/devid_header_gen.py b/sw/host/provisioning/orchestrator/src/devid_header_gen.py
new file mode 100644
index 0000000000000..0ea6d32c22ed4
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/devid_header_gen.py
@@ -0,0 +1,79 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Script for generating OpenTitan device IDs for embedding in CP/FT FW."""
+
+import argparse
+import sys
+from pathlib import Path
+
+import hjson
+from mako.template import Template
+
+import util
+from device_id import DeviceId, DeviceIdentificationNumber
+from sku_config import SkuConfig
+
+_RESERVED_VALUE = 0
+_MAX_UINT32 = 2**32 - 1
+
+
+def main(args_in):
+    # Parse cmd line args.
+    parser = argparse.ArgumentParser(
+        prog=__doc__,
+        description="""This tool generates device ID header files.""",
+    )
+    parser.add_argument(
+        "--mode",
+        type=str,
+        choices=["cp", "ft"],
+        help="The device ID header to generate: CP or FT.",
+    )
+    parser.add_argument(
+        "--sku-config",
+        required=True,
+        type=str,
+        help="SKU HJSON configuration file.",
+    )
+    parser.add_argument(
+        "--output",
+        required=str,
+        type=str,
+        help="The output source file path.",
+    )
+    parser.add_argument(
+        "--template",
+        required=True,
+        type=str,
+        help="The template source file to be overwritten.",
+    )
+    args = parser.parse_args(args_in)
+
+    # Load and validate a SKU configuration file.
+    sku_config_args = {}
+    with open(args.sku_config, "r") as fp:
+        sku_config_args = hjson.load(fp)
+    sku_config = SkuConfig(**sku_config_args)
+
+    # Generate CP/FT portion of device ID.
+    din = DeviceIdentificationNumber.blind_asm()
+    if args.mode == "cp":
+        device_id_int = DeviceId(sku_config, din).to_int()
+    else:
+        device_id_int = DeviceId(sku_config, din).to_int() >> 128
+    devid_list = []
+    for _ in range(4):
+        devid_list.append(util.format_hex(device_id_int & _MAX_UINT32, 8))
+        device_id_int >>= 32
+    devid_str = ','.join(devid_list)
+
+    # Fill template.
+    template = Template(Path(args.template).read_text())
+    Path(args.output).write_text(template.render(device_id=devid_str))
+    print("Computed {} device ID array: {}".format(args.mode.upper(),
+                                                   devid_str))
+
+
+if __name__ == "__main__":
+    main(sys.argv[1:])
diff --git a/sw/host/provisioning/orchestrator/src/orchestrator.py b/sw/host/provisioning/orchestrator/src/orchestrator.py
new file mode 100644
index 0000000000000..ab132cbe06a85
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/orchestrator.py
@@ -0,0 +1,215 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Earlgrey benchtop provisioning orchestrator."""
+
+import argparse
+import logging
+import shlex
+import subprocess
+import sys
+from pathlib import Path
+
+import hjson
+
+import db
+from device_id import DeviceId, DeviceIdentificationNumber
+from ot_dut import OtDut
+from sku_config import SkuConfig
+from util import confirm, parse_hexstring_to_int, resolve_runfile
+
+
+def get_user_confirmation(
+    sku_config: SkuConfig,
+    device_id: DeviceId,
+    commit_hash: str,
+    args: argparse.Namespace,
+) -> None:
+    """Gets user confirmation after printing provisioning inputs to console."""
+    print(
+        "\nPlease confirm the following values (> indicates generated values):"
+    )
+    print("[DEVICE ID]")
+    device_id.pretty_print()
+    print(f"""
+[SKU CONFIG]
+SKU:      {sku_config.name}
+LC State: {sku_config.target_lc_state}
+
+[OTHER]
+fpga:          {args.fpga}
+> commit hash: {commit_hash}
+
+[DICE CA]
+certificate: {sku_config.dice_ca.certificate}
+key:         {sku_config.dice_ca.key}
+key type:    {sku_config.dice_ca.key_type}
+key ID:      {sku_config.dice_ca.key_id}
+""")
+    if sku_config.ext_ca:
+        print(f"""
+
+[EXTENSION CA]
+certificate: {sku_config.ext_ca.certificate}
+key:         {sku_config.ext_ca.key}
+key type:    {sku_config.ext_ca.key_type}
+key ID:      {sku_config.ext_ca.key_id}
+""")
+    if not args.non_interactive:
+        confirm()
+
+
+def main(args_in):
+    # Setup logging.
+    logging.basicConfig(
+        level=logging.DEBUG,
+        handlers=[
+            logging.FileHandler("orchestrator.log.txt"),
+            logging.StreamHandler(sys.stdout)
+        ],
+    )
+
+    # Parse cmd line args.
+    parser = argparse.ArgumentParser(
+        prog=__doc__,
+        description=
+        """This tool runs the CP and FT provisioning flows on a benchtop
+        provisioning setup, and records the results into a local and/or remote
+        provisioning database.""",
+    )
+    parser.add_argument(
+        "--sku-config",
+        required=True,
+        type=str,
+        help="SKU HJSON configuration file.",
+    )
+    parser.add_argument(
+        "--package",
+        type=str,
+        help="Override of package string that is in the SKU config.",
+    )
+    parser.add_argument(
+        "--test-unlock-token",
+        required=True,
+        type=parse_hexstring_to_int,
+        help="Raw test unlock token to inject into OTP SECRET0 partition.",
+    )
+    parser.add_argument(
+        "--test-exit-token",
+        required=True,
+        type=parse_hexstring_to_int,
+        help="Raw test exit token to inject into OTP SECRET0 partition.",
+    )
+    parser.add_argument(
+        "--fpga",
+        choices=["hyper310", "cw340"],
+        help="Run flow on FPGA (instead of silicon).",
+    )
+    parser.add_argument(
+        "--fpga-dont-clear-bitstream",
+        action="store_true",
+        help="If set, the FPGA bitsream will not be cleared before CP.",
+    )
+    parser.add_argument(
+        "--log-ujson-payloads",
+        action="store_true",
+        default=False,
+        help="Log UJSON host-->device payloads to console for ATE development.",
+    )
+    parser.add_argument(
+        "--non-interactive",
+        action="store_true",
+        default=False,
+        help="Skip all non-required user confirmations.",
+    )
+    parser.add_argument(
+        "--log-dir",
+        default="logs",
+        help="Root directory to store log files under.",
+    )
+    parser.add_argument(
+        "--cp-only",
+        action="store_true",
+        help="If set, only run CP stage (skips FT and database write).",
+    )
+    parser.add_argument(
+        "--use-ate-individ-bin",
+        action="store_true",
+        # The ATE individualization binary contains no UJSON communication.
+        help="If set, use the individualization binary compiled for ATE.",
+    )
+    parser.add_argument(
+        "--db-path",
+        required=False,
+        help=
+        "Path to provisioning database. The database will be created if it does not exist.",
+    )
+    args = parser.parse_args(args_in)
+
+    if not args.cp_only and args.db_path is None:
+        parser.error("--db-path is required when --cp-only is not provided")
+    if args.use_ate_individ_bin and args.package is not None:
+        parser.error("--use-ate-individ-bin may not be used with --package")
+
+    # Load and validate a SKU configuration file.
+    sku_config_path = resolve_runfile(args.sku_config)
+    sku_config_args = {}
+    with open(sku_config_path, "r") as fp:
+        sku_config_args = hjson.load(fp)
+    sku_config = SkuConfig(**sku_config_args)
+
+    # Override package ID if requested.
+    if args.package:
+        sku_config.package = args.package
+        sku_config.validate()
+        sku_config.load_hw_ids()
+
+    # The device identification number is determined during CP by extracting data
+    # from the device.
+    din = DeviceIdentificationNumber.blind_asm()
+    device_id = DeviceId(sku_config, din)
+
+    # TODO: Setup remote and/or local DB connections.
+
+    # Generate commit hash of current provisioning run.
+    commit_hash = subprocess.run(shlex.split("git rev-parse HEAD"),
+                                 capture_output=True,
+                                 text=True).stdout.strip()
+
+    # Run all provisioning flows.
+    get_user_confirmation(sku_config, device_id, commit_hash, args)
+    dut = OtDut(logs_root_dir=args.log_dir,
+                sku_config=sku_config,
+                device_id=device_id,
+                test_unlock_token=args.test_unlock_token,
+                test_exit_token=args.test_exit_token,
+                fpga=args.fpga,
+                ate_mode=args.use_ate_individ_bin,
+                fpga_dont_clear_bitstream=args.fpga_dont_clear_bitstream,
+                log_ujson_payloads=args.log_ujson_payloads,
+                require_confirmation=not args.non_interactive)
+    dut.run_cp()
+    if args.cp_only:
+        logging.info("FT skipped since --cp-only was provided")
+        return
+    dut.run_ft()
+
+    # Open the local SQLite registry database.
+    db_path = Path(args.db_path)
+    db_handle = db.DB(db.DBConfig(db_path=db_path))
+    db.DeviceRecord.create_table(db_handle)
+
+    # Check device ID exists in the database.
+    if db.DeviceRecord.query(db_handle, dut.device_id.to_hexstr()) is not None:
+        logging.warning(
+            "DeviceId already exists in database. Overwrite record?")
+        confirm()
+
+    # Register the DUT in the database.
+    device_record = db.DeviceRecord.from_dut(dut)
+    device_record.upsert(db_handle)
+    logging.info(f"Added DeviceRecord to database: {device_record}")
+
+
+if __name__ == "__main__":
+    main(sys.argv[1:])
diff --git a/sw/host/provisioning/orchestrator/src/ot_dut.py b/sw/host/provisioning/orchestrator/src/ot_dut.py
new file mode 100644
index 0000000000000..f6d2bdd1e8c0e
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/ot_dut.py
@@ -0,0 +1,342 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import json
+import logging
+import os
+import re
+import shutil
+import sys
+import tempfile
+from dataclasses import dataclass
+
+import hjson
+
+from device_id import DeviceId, DeviceIdentificationNumber
+from sku_config import SkuConfig
+from util import confirm, format_hex, resolve_runfile, run
+
+# FPGA bitstream.
+_FPGA_UNIVERSAL_SPLICE_BITSTREAM = "hw/bitstream/universal/splice.bit"
+
+# CP and FT shared flags.
+_OPENOCD_BIN = "third_party/openocd/build_openocd/bin/openocd"
+_OPENOCD_ADAPTER_CONFIG = "external/openocd/tcl/interface/cmsis-dap.cfg"
+_BASE_PROVISIONING_FLAGS = """
+    --interface={target} \
+    --openocd={openocd_bin} \
+    --openocd-adapter-config={openocd_cfg} \
+"""
+_ZERO_256BIT_HEXSTR = "0x" + "_".join(["00000000"] * 8)
+
+# yapf: disable
+# CP & FT Device Firmware
+_BASE_DEV_DIR           = "sw/device/silicon_creator/manuf/base"  # noqa: E221
+_CP_DEVICE_ELF          = "{base_dir}/sram_cp_provision_{target}.elf"  # noqa: E221
+_FT_INDIVID_DEVICE_ELF  = "{base_dir}/sram_ft_individualize_{sku}{ate_suffix}_{target}.elf"  # noqa: E221,E501
+_FT_FW_BUNDLE_BIN       = "{base_dir}/ft_fw_bundle_{sku}_{target}.img"  # noqa: E221
+# CP & FT Host Binaries
+_CP_HOST_BIN = "sw/host/provisioning/cp/cp"
+_FT_HOST_BIN = "sw/host/provisioning/ft/ft_{sku}"
+# yapf: enable
+
+
+@dataclass
+class OtDut():
+    """Class for holding data and routines for running provisioning flows."""
+    logs_root_dir: str
+    sku_config: SkuConfig
+    device_id: DeviceId
+    test_unlock_token: str
+    test_exit_token: str
+    fpga: str
+    ate_mode: bool
+    fpga_dont_clear_bitstream: bool
+    log_ujson_payloads: bool
+    require_confirmation: bool = True
+
+    def _make_log_dir(self) -> None:
+        self.log_dir = f"{self.logs_root_dir}/{str(self.device_id)[2:]}"
+        if self.require_confirmation and os.path.exists(self.log_dir):
+            logging.warning(
+                f"Log file {self.log_dir} already exists. Continue to overwrite."
+            )
+            confirm()
+        os.makedirs(self.log_dir, exist_ok=True)
+
+    def _extract_json_data(self, key: str, log_file: str) -> dict:
+        """Extracts and logs JSON data from a log file.
+
+        Args:
+            key: The key to search for in the log file.
+            log_file: The log file to search in.
+        Retuns:
+            The extracted JSON data.
+        """
+        with open(log_file, "r", encoding='utf-8', errors='ignore') as f:
+            log_data = f.read()
+
+        pattern = key + r':\s*({.*})'
+        match = re.search(pattern, log_data)
+        if match:
+            json_string = match.group(1)
+            try:
+                json_data = hjson.loads(json_string)
+            except hjson.HjsonDecodeError as e:
+                logging.error(f"Failed to parse {key}: {e}")
+                confirm()
+        else:
+            logging.error(f"{key} not found.")
+            confirm()
+        return json_data
+
+    def _base_dev_dir(self) -> str:
+        return _BASE_DEV_DIR
+
+    def run_cp(self) -> None:
+        """Runs the CP provisioning flow on the target DUT."""
+        logging.info("Running CP provisioning ...")
+
+        # Set cmd args and device ELF.
+        host_flags = _BASE_PROVISIONING_FLAGS
+        device_elf = _CP_DEVICE_ELF
+        print(f"device_elf: {device_elf}")
+
+        openocd_bin = resolve_runfile(_OPENOCD_BIN)
+        openocd_cfg = resolve_runfile(_OPENOCD_ADAPTER_CONFIG)
+        if self.fpga:
+            # Set host flags and device binary for FPGA DUT.
+            interface = self.fpga if self.fpga == "hyper310" else "hyper340"
+            host_flags = host_flags.format(target=interface,
+                                           openocd_bin=openocd_bin,
+                                           openocd_cfg=openocd_cfg)
+            if not self.fpga_dont_clear_bitstream:
+                host_flags += " --clear-bitstream"
+                bitstream = resolve_runfile(_FPGA_UNIVERSAL_SPLICE_BITSTREAM)
+                host_flags += f" --bitstream={bitstream}"
+            device_elf = device_elf.format(
+                base_dir=self._base_dev_dir(),
+                target=f"fpga_{self.fpga}_rom_with_fake_keys")
+        else:
+            # Set host flags and device binary for Silicon DUT.
+            host_flags = host_flags.format(target="teacup",
+                                           openocd_bin=openocd_bin,
+                                           openocd_cfg=openocd_cfg)
+            host_flags += " --disable-dft-on-reset"
+            device_elf = device_elf.format(base_dir=self._base_dev_dir(),
+                                           target="silicon_creator")
+        device_elf = resolve_runfile(device_elf)
+
+        # Assemble CP command.
+        cp_host_bin = resolve_runfile(_CP_HOST_BIN)
+        cmd = f"""{cp_host_bin} \
+        --rcfile= \
+        --logging=info \
+        {host_flags} \
+        --elf={device_elf} \
+        --test-unlock-token="{format_hex(self.test_unlock_token, width=32)}" \
+        --test-exit-token="{format_hex(self.test_exit_token, width=32)}" \
+        --wafer-auth-secret="{_ZERO_256BIT_HEXSTR}" \
+        """
+
+        # Get user confirmation before running command.
+        logging.info(f"Running command: {cmd}")
+        if self.require_confirmation:
+            confirm()
+
+        # Run provisioning flow and collect logs.
+        with tempfile.TemporaryDirectory() as tmpdir:
+            stdout_logfile = f"{tmpdir}/cp_out.log.txt"
+            stderr_logfile = f"{tmpdir}/cp_err.log.txt"
+            res = run(cmd, stdout_logfile, stderr_logfile)
+
+            if res.returncode != 0:
+                logging.warning(f"CP failed with exit code: {res.returncode}.")
+                confirm()
+
+            # Extract CP device ID.
+            chip_probe_data = self._extract_json_data("CHIP_PROBE_DATA",
+                                                      stdout_logfile)
+            din_from_device = None
+            if "cp_device_id" not in chip_probe_data:
+                logging.error("cp_device_id not found in CHIP_PROBE_DATA.")
+                confirm()
+            else:
+                # This can occur if the orchestrator is provisioning a chip that
+                # has already run through CP, and only needs to execute FT.
+                if chip_probe_data["cp_device_id"] == "":
+                    logging.warning(
+                        "cp_device_id empty; setting default DIN of all 0xFF.")
+                    din_from_device = DeviceIdentificationNumber.blind_asm()
+                else:
+                    din_from_device = DeviceIdentificationNumber.from_int(
+                        (int(chip_probe_data["cp_device_id"], 16) >> 32) &
+                        (2**64 - 1))
+            logging.info(
+                f"Updating device ID to: {chip_probe_data['cp_device_id']}")
+            self.device_id.update_din(din_from_device)
+            self.device_id.pretty_print()
+
+            self._make_log_dir()
+            shutil.move(stdout_logfile, f"{self.log_dir}/cp_out.log.txt")
+            shutil.move(stderr_logfile, f"{self.log_dir}/cp_err.log.txt")
+
+        self.cp_data = chip_probe_data
+        logging.info(f"CP logs saved to {self.log_dir}.")
+        logging.info("CP completed successfully.")
+
+    def run_ft(self) -> None:
+        """Runs the FT provisioning flow on the target DUT."""
+        logging.info("Running FT provisioning ...")
+
+        # Set cmd args and device binaries.
+        host_bin = _FT_HOST_BIN.format(sku=self.sku_config.name)
+        host_bin = resolve_runfile(host_bin)
+        openocd_bin = resolve_runfile(_OPENOCD_BIN)
+        openocd_cfg = resolve_runfile(_OPENOCD_ADAPTER_CONFIG)
+        host_flags = _BASE_PROVISIONING_FLAGS
+        individ_elf = _FT_INDIVID_DEVICE_ELF
+        ate_suffix = "_ate" if self.ate_mode else ""
+        # Emulation perso bins are signed online with fake keys, and therefore
+        # have different file naming patterns than production SKUs.
+        perso_bin = self.sku_config.perso_bin
+        fw_bundle_bin = _FT_FW_BUNDLE_BIN
+        if self.fpga:
+            # Set host flags and device binaries for FPGA DUT.
+            # No need to load another bitstream, we will take over where CP
+            # stage above left off.
+            interface = self.fpga if self.fpga == "hyper310" else "hyper340"
+            host_flags = host_flags.format(target=interface,
+                                           openocd_bin=openocd_bin,
+                                           openocd_cfg=openocd_cfg)
+            individ_elf = individ_elf.format(
+                base_dir=self._base_dev_dir(),
+                sku=self.sku_config.name,
+                ate_suffix=ate_suffix,
+                target=f"fpga_{self.fpga}_rom_with_fake_keys")
+            perso_bin = perso_bin.format(
+                base_dir=self._base_dev_dir(),
+                sku=self.sku_config.name,
+                target=f"fpga_{self.fpga}_rom_with_fake_keys")
+            fw_bundle_bin = fw_bundle_bin.format(
+                base_dir=self._base_dev_dir(),
+                sku=self.sku_config.name,
+                target=f"fpga_{self.fpga}_rom_with_fake_keys")
+        else:
+            # Set host flags and device binaries for Silicon DUT.
+            host_flags = host_flags.format(target="teacup",
+                                           openocd_bin=openocd_bin,
+                                           openocd_cfg=openocd_cfg)
+            host_flags += " --disable-dft-on-reset"
+            individ_elf = individ_elf.format(base_dir=self._base_dev_dir(),
+                                             sku=self.sku_config.name,
+                                             ate_suffix=ate_suffix,
+                                             target="silicon_creator")
+            perso_bin = perso_bin.format(base_dir=self._base_dev_dir(),
+                                         sku=self.sku_config.name,
+                                         target="silicon_creator")
+            fw_bundle_bin = fw_bundle_bin.format(base_dir=self._base_dev_dir(),
+                                                 sku=self.sku_config.name,
+                                                 target="silicon_creator")
+
+        individ_elf = resolve_runfile(individ_elf)
+        perso_bin = resolve_runfile(perso_bin)
+        fw_bundle_bin = resolve_runfile(fw_bundle_bin)
+
+        # Write CA configs to a JSON tmpfile.
+        ca_config_dict = {
+            "dice": self.sku_config.dice_ca.to_dict_entry(),
+        }
+        if self.sku_config.ext_ca:
+            ca_config_dict["ext"] = self.sku_config.ext_ca.to_dict_entry()
+
+        with tempfile.NamedTemporaryFile(mode="w+") as ca_config_file:
+            json.dump(ca_config_dict, ca_config_file)
+            ca_config_file.flush()
+
+            # Assemble FT command.
+            # TODO: autocompute measurements of expected ROM_EXT + Owner FW payloads
+            # TODO: add expected ROM_EXT / Owner security versions
+            cmd = f"""{host_bin}
+            --rcfile= \
+            --logging=info \
+            {host_flags} \
+            --elf={individ_elf} \
+            --bootstrap={perso_bin} \
+            --second-bootstrap={fw_bundle_bin} \
+            --wafer-auth-secret="{_ZERO_256BIT_HEXSTR}" \
+            --test-unlock-token="{format_hex(self.test_unlock_token, width=32)}" \
+            --test-exit-token="{format_hex(self.test_exit_token, width=32)}" \
+            --target-mission-mode-lc-state="{self.sku_config.target_lc_state}" \
+            --ca-config={ca_config_file.name} \
+            --token-encrypt-key-der-file={self.sku_config.token_encrypt_key} \
+            """
+
+            # Add FT device ID if we are not running in ATE mode.
+            if not self.ate_mode:
+                cmd += f" --ft-device-id=\"0x{hex(self.device_id.sku_specific)[2:].zfill(32)}\""
+
+            # Add owner FW boot success message check.
+            if self.sku_config.owner_fw_boot_str:
+                cmd += f" --owner-success-text=\"{self.sku_config.owner_fw_boot_str}\""
+
+            # Enable UJSON message logging.
+            if self.log_ujson_payloads:
+                cmd += " --log-ujson-payloads"
+
+            # Get user confirmation before running command.
+            logging.info(f"Running command: {cmd}")
+            if self.require_confirmation:
+                confirm()
+
+            # Run provisioning flow and collect logs.
+            stdout_logfile = f"{self.log_dir}/ft_out.log.txt"
+            stderr_logfile = f"{self.log_dir}/ft_err.log.txt"
+            res = run(cmd, stdout_logfile, stderr_logfile)
+            if res.returncode != 0:
+                logging.warning(f"FT failed with exit code: {res.returncode}.")
+                confirm()
+
+            self.ft_data = self._extract_json_data("PROVISIONING_DATA",
+                                                   stdout_logfile)
+
+            # Check device ID from OTP matches one constructed on host.
+            #
+            # The CP portion may not match, but the FT portion should, with the
+            # exception of the AST configuration version field as this is also
+            # set during CP. The CP portion of the device ID, and the AST
+            # configuration field of the FT device ID, are set in flash before
+            # the orchestrator.py is ever run, so the device's CP portion of the
+            # device ID should be taken as the ground truth.
+            device_id_in_otp = DeviceId.from_hexstr(self.ft_data["device_id"])
+            # Replace the AST configuration version field of the host device ID
+            # to its counterpart from of the device as this field originates
+            # from flash info page 0, not from any host configuration.
+            self.device_id.update_ast_cfg_version(
+                device_id_in_otp.ast_cfg_version)
+            if device_id_in_otp.sku_specific != self.device_id.sku_specific:
+                logging.error(
+                    "FT Device ID from OTP does not match expected on host.")
+                logging.error(
+                    f"Final (device) FT DeviceId: {device_id_in_otp.sku_specific_hexstr()}"
+                )
+                logging.error(
+                    f"Final (host)   FT DeviceId: {self.device_id.sku_specific_hexstr()}"
+                )
+                sys.exit(-1)
+            if device_id_in_otp.base_uid != self.device_id.base_uid:
+                logging.warning(
+                    "CP Device ID from OTP does not match expected on host. Use OTP variant?"
+                )
+                logging.warning(
+                    f"Final (device) CP DeviceId: {device_id_in_otp.base_uid_hexstr()}"
+                )
+                logging.warning(
+                    f"Final (host)   CP DeviceId: {self.device_id.base_uid_hexstr()}"
+                )
+                if self.require_confirmation:
+                    confirm()
+                self.device_id = device_id_in_otp
+
+            logging.info("FT completed successfully.")
diff --git a/sw/host/provisioning/orchestrator/src/sku_config.py b/sw/host/provisioning/orchestrator/src/sku_config.py
new file mode 100644
index 0000000000000..86a09d7c0eb13
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/sku_config.py
@@ -0,0 +1,156 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Module for loading and validating OpenTitan SKU configuration."""
+
+from collections import OrderedDict
+from dataclasses import dataclass
+from typing import Optional
+
+import hjson
+
+from ca_config import CaConfig
+from util import resolve_runfile
+
+_PRODUCT_IDS_HJSON = "sw/host/provisioning/orchestrator/data/products.hjson"
+_PACKAGE_IDS_HJSON = "sw/host/provisioning/orchestrator/data/packages/earlgrey_a2.hjson"
+
+
+@dataclass
+class SkuConfig:
+    """Class for storing an OpenTitan SKU configuration."""
+    name: str  # valid: lower snake case only
+    product: str  # valid: any product that exists in product database
+    si_creator: str  # valid: any SiliconCreator that exists in product database
+    package: str  # valid: any package that exists in package database
+    target_lc_state: str  # valid: must be in ["dev", "prod", "prod_end"]
+    otp: str  # valid: any 4 char string whose first char is alphabetic and last two are numeric
+    perso_bin: str  # valid: any string
+    token_encrypt_key: str  # valid: any file path that exists
+    dice_ca: Optional[OrderedDict]  # valid: see CaConfig
+    ast_cfg_version: int = 255  # valid: any positive integer < 256 (to fit in one byte)
+    ext_ca: Optional[OrderedDict] = None  # valid: see CaConfig
+    owner_fw_boot_str: str = None  # valid: any string
+
+    def __post_init__(self):
+        # Load CA configs.
+        if self.dice_ca:
+            self.dice_ca = CaConfig(name="dice_ca", **self.dice_ca)
+        if self.ext_ca:
+            self.ext_ca = CaConfig(name="ext_ca", **self.ext_ca)
+
+        # Load product IDs database.
+        product_ids_hjson = resolve_runfile(_PRODUCT_IDS_HJSON)
+        self._product_ids = None
+        with open(product_ids_hjson, "r") as fp:
+            self._product_ids = hjson.load(fp)
+
+        # Load package IDs database.
+        package_ids_hjson = resolve_runfile(_PACKAGE_IDS_HJSON)
+        self._package_ids = None
+        with open(package_ids_hjson, "r") as fp:
+            self._package_ids = hjson.load(fp)
+
+        # Validate inputs.
+        self.validate()
+
+        # Load HW IDs.
+        self.load_hw_ids()
+
+        # Resolve LC token encryption key path.
+        if self.token_encrypt_key:
+            self.token_encrypt_key = resolve_runfile(self.token_encrypt_key)
+
+    @staticmethod
+    def from_ids(product_id: int, si_creator_id: int, package_id: int,
+                 otp: str, ast_cfg_version: int) -> "SkuConfig":
+        """Creates a SKU configuration object from various subcomponent IDs."""
+        # Load product IDs database.
+        product_ids_hjson = resolve_runfile(_PRODUCT_IDS_HJSON)
+        product_ids = None
+        with open(product_ids_hjson, "r") as fp:
+            product_ids = hjson.load(fp)
+
+        # Load package IDs database.
+        package_ids_hjson = resolve_runfile(_PACKAGE_IDS_HJSON)
+        package_ids = None
+        with open(package_ids_hjson, "r") as fp:
+            package_ids = hjson.load(fp)
+
+        # Create SKU configuration object.
+        product = None
+        si_creator = None
+        package = None
+        for key, value in product_ids["product_ids"].items():
+            if int(value, 16) == product_id:
+                product = key
+                break
+        for key, value in product_ids["si_creator_ids"].items():
+            if int(value, 16) == si_creator_id:
+                si_creator = key
+                break
+        for key, value in package_ids.items():
+            if int(value, 16) == package_id:
+                package = key
+                break
+        sku_config = SkuConfig(name="cp_device_id",
+                               product=product,
+                               si_creator=si_creator,
+                               ast_cfg_version=ast_cfg_version,
+                               package=package,
+                               target_lc_state="dev",
+                               otp=otp,
+                               perso_bin="",
+                               dice_ca=OrderedDict(),
+                               ext_ca=OrderedDict(),
+                               token_encrypt_key="")
+        return sku_config
+
+    def validate(self) -> None:
+        """Validates this object's attributes."""
+        # Validate name.
+        # TODO: validate SKU name against available binaries to run.
+        # Validate product name.
+        if self.product not in self._product_ids["product_ids"]:
+            raise ValueError("Product ({}) must be product database.".format(
+                self.product))
+        # Validate SiliconCreator name.
+        if self.si_creator not in self._product_ids["si_creator_ids"]:
+            raise ValueError(
+                "SiliconCreator ({}) must be product database.".format(
+                    self.si_creator))
+        # Validate package name.
+        if self.package and self.package not in self._package_ids:
+            raise ValueError("Package ({}) must be package database.".format(
+                self.package))
+        # Validate target_lc_state.
+        if self.target_lc_state not in {"dev", "prod", "prod_end"}:
+            raise ValueError(
+                "Target LC state ({}) must be in [\"dev\", \"prod\", \"prod_end\"]"
+                .format(self.target_lc_state))
+        # Validate AST configuration version.
+        if self.ast_cfg_version < 0 or self.ast_cfg_version > 255:
+            raise ValueError("AST config version should be in range [0, 256).")
+        # Validate OTP string.
+        if len(self.otp) != 4:
+            raise ValueError("OTP must be a non-empty 4 character string.")
+        # Validate OTP ID string.
+        if not self.otp[0].isalpha() or not self.otp[1].isalpha():
+            raise ValueError(
+                "First two chars of OTP string must be alphabetic.")
+        # Validate OTP version.
+        try:
+            _ = int(self.otp[2:], 16)
+        except ValueError:
+            raise ValueError("OTP version should two digit hexstring.")
+
+    def load_hw_ids(self) -> None:
+        """Sets product, SiliconCreator, and package IDs."""
+        self.si_creator_id = int(
+            self._product_ids["si_creator_ids"][self.si_creator], 16)
+        self.product_id = int(self._product_ids["product_ids"][self.product],
+                              16)
+        self.package_id = int(self._package_ids[self.package], 16)
+        # We process the OTP str into a two character ID and version number.
+        self.otp_id = self.otp[:2]
+        self.otp_version = int(self.otp[2:], 16)
diff --git a/sw/host/provisioning/orchestrator/src/util.py b/sw/host/provisioning/orchestrator/src/util.py
new file mode 100644
index 0000000000000..d702854443cc8
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/src/util.py
@@ -0,0 +1,102 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import logging
+import os
+import shlex
+import subprocess
+
+from python.runfiles import Runfiles
+
+
+def parse_hexstring_to_int(x):
+    """Accepts hexstrings with and without the 0x."""
+    return int(x, 16)
+
+
+def parse_str_to_ascii_bytes(s):
+    return bytes(s, encoding="ascii")
+
+
+def bytes_to_int(b):
+    return int.from_bytes(b, byteorder="little")
+
+
+def format_hex(n, width=8):
+    """format_hex(5, width=4) -> '0x0005'"""
+    return format(n, f"#0{width + 2}x")  # + 2 to account for 0x chars
+
+
+def bcd_decode(x: int) -> int:
+    """Convert a BCD int to an int.
+
+    For example, `0x46` hex represents `46` decimal.
+    This encoding is a manufacturing equipment constraint.
+    """
+    return int(hex(x)[2:])
+
+
+def bcd_encode(x: int) -> int:
+    """Converts an int to a BCD int.
+
+    For example, `46` decimal is encoded as `0x46`.
+    """
+    return int(str(x), 16)
+
+
+def confirm():
+    """Get user confirmation to continue."""
+    confirm = input("Type confirm to continue: ")
+    if confirm != "confirm":
+        logging.info("Did not receive confirmation from user. Aborting.")
+        exit(1)
+
+
+def run(cmd, stdout_logfile, stderr_logfile):
+    out_tee = subprocess.Popen(['/usr/bin/tee', stdout_logfile],
+                               stdin=subprocess.PIPE)
+    err_tee = subprocess.Popen(['/usr/bin/tee', stderr_logfile],
+                               stdin=subprocess.PIPE)
+
+    cmd_list = shlex.split(cmd)
+    res = subprocess.run(cmd_list,
+                         text=True,
+                         stdout=out_tee.stdin,
+                         stderr=err_tee.stdin)
+    out_tee.stdin.close()
+    err_tee.stdin.close()
+    return res
+
+
+_runfiles = Runfiles.Create()
+
+
+def resolve_runfile(path):
+    """Resolves path to runfile.
+
+    Relative paths specified as external/<repo>/... will be resolved relative to
+    the external repository @<repo>. Otherwise, relative paths will be resolved
+    relative to the main workspace. Absolute paths are returned as-is.
+
+    Raises a ValueError if the path does not exist on the filesystem.
+    """
+
+    # orchestrator.py assumes the "old" style of runfiles tree, where paths to
+    # files within the main workspace do not include the repo name and external
+    # deps prepend external/.
+    #
+    # The old scheme does not work within a zipped py_binary, so this logic is a
+    # hack to fix up the supplied path.
+    #
+    # See https://docs.google.com/document/d/1skNx5o-8k5-YXUAyEETvr39eKoh9fecJbGUquPh5iy8/edit.
+    REPO = "lowrisc_opentitan"
+    if path.startswith("external/"):
+        corrected_path = path[len("external/"):]
+    else:
+        corrected_path = os.path.join(REPO, path)
+
+    resolved = _runfiles.Rlocation(corrected_path)
+    if resolved is None or not os.path.exists(resolved):
+        raise ValueError(f"Could not find runfile: {path}")
+    return resolved
diff --git a/sw/host/provisioning/orchestrator/tests/BUILD b/sw/host/provisioning/orchestrator/tests/BUILD
new file mode 100644
index 0000000000000..b141900e61cfe
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/BUILD
@@ -0,0 +1,191 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_python//python:defs.bzl", "py_test")
+load(
+    "//sw/device/silicon_creator/manuf/base:provisioning_inputs.bzl",
+    "EARLGREY_SKUS",
+)
+load(
+    "//sw/host/provisioning/orchestrator/tests:transition.bzl",
+    "orchestrator_cw340_test_settings_transition",
+    "orchestrator_hyper310_test_settings_transition",
+)
+load("@ot_python_deps//:requirements.bzl", "requirement")
+
+package(default_visibility = ["//visibility:public"])
+
+py_test(
+    name = "db_test",
+    srcs = ["db_test.py"],
+    deps = [
+        "//sw/host/provisioning/orchestrator/src:db",
+    ],
+)
+
+py_test(
+    name = "device_id_test",
+    srcs = ["device_id_test.py"],
+    data = [
+        "//sw/device/silicon_creator/manuf/keys/fake:dice_ca.pem",
+        "//sw/device/silicon_creator/manuf/keys/fake:ext_ca.pem",
+        "//sw/device/silicon_creator/manuf/keys/fake:rma_unlock_enc_rsa3072.pub.der",
+        "//sw/device/silicon_creator/manuf/keys/fake:sk.pkcs8.der",
+        "//sw/host/provisioning/orchestrator/configs/skus:emulation.hjson",
+    ],
+    deps = [
+        requirement("hjson"),
+        "//sw/host/provisioning/orchestrator/src:device_id",
+        "//sw/host/provisioning/orchestrator/src:sku_config",
+        "//sw/host/provisioning/orchestrator/src:util",
+    ],
+)
+
+py_test(
+    name = "util_test",
+    srcs = ["util_test.py"],
+    data = [
+        "//sw/device/silicon_creator/manuf/keys/fake:dice_ca.pem",
+        "//third_party/openocd:jtag_cmsis_dap_adapter_cfg",
+    ],
+    deps = [
+        "//sw/host/provisioning/orchestrator/src:util",
+    ],
+)
+
+# These transitions have the same effect as supplying the following flags to bazel test:
+#  --//hw/bitstream/universal:env=//hw/top_earlgrey:fpga_<fpga>_rom_with_fake_keys
+#  --//hw/bitstream/universal:otp=//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty
+orchestrator_hyper310_test_settings_transition(
+    name = "orchestrator_hyper310_zip",
+    testonly = True,
+    target = "//sw/host/provisioning/orchestrator/src:orchestrator.zip",
+)
+
+orchestrator_cw340_test_settings_transition(
+    name = "orchestrator_cw340_zip",
+    testonly = True,
+    target = "//sw/host/provisioning/orchestrator/src:orchestrator.zip",
+)
+
+sh_test(
+    name = "e2e_option_flags_test",
+    timeout = "moderate",
+    srcs = ["e2e_option_flags.sh"],
+    data = [
+        ":orchestrator_hyper310_zip",
+        "@//sw/host/provisioning/orchestrator/configs/skus:emulation.hjson",
+        "@python3",
+    ],
+    env = {
+        "PYTHON": "$(location @python3//:python3)",
+        "PACKAGE": "npcr12",
+    },
+    tags = [
+        "changes_otp",
+        "exclusive",
+        "hyper310",
+        "manuf",
+    ],
+)
+
+sh_test(
+    name = "e2e_multistage_test",
+    srcs = ["e2e_multistage.sh"],
+    data = [
+        ":orchestrator_hyper310_zip",
+        "@python3",
+    ],
+    env = {
+        "PYTHON": "$(location @python3//:python3)",
+    },
+    tags = [
+        "changes_otp",
+        "exclusive",
+        "hyper310",
+        "manuf",
+    ],
+)
+
+sh_test(
+    name = "e2e_ate_individ_test",
+    timeout = "moderate",
+    srcs = ["e2e_ate_individ.sh"],
+    data = [
+        ":orchestrator_hyper310_zip",
+        "@//sw/host/provisioning/orchestrator/configs/skus:emulation.hjson",
+        "@python3",
+    ],
+    env = {
+        "PYTHON": "$(location @python3//:python3)",
+        "PACKAGE": "npcr12",
+    },
+    tags = [
+        "changes_otp",
+        "exclusive",
+        "hyper310",
+        "manuf",
+    ],
+)
+
+[
+    sh_test(
+        name = "e2e_{}_{}_test".format(sku, fpga),
+        timeout = "moderate",
+        srcs = ["e2e.sh"],
+        data = [
+            ":orchestrator_{}_zip".format(fpga),
+            "@python3",
+            cfg["orchestrator_cfg"],
+        ],
+        env = {
+            "PYTHON": "$(location @python3//:python3)",
+            "SKU_CONFIG_PATH": "$(location {})".format(cfg["orchestrator_cfg"]),
+            "FPGA": "{}".format(fpga),
+        },
+        tags = [
+            "changes_otp",
+            "exclusive",
+            "manuf",
+        ] + [fpga] + ([
+            "manual",
+        ] if cfg.get("offline", False) else []),
+    )
+    for sku, cfg in EARLGREY_SKUS.items()
+    for fpga in [
+        "hyper310",
+        "cw340",
+    ]
+]
+
+[
+    test_suite(
+        name = "e2e_{}".format(fpga),
+        tags = ["manual"],
+        tests = [
+            ":e2e_{}_{}_test".format(sku, fpga)
+            for sku, config in EARLGREY_SKUS.items()
+            if not config.get("offline", False)
+        ],
+    )
+    for fpga in [
+        "hyper310",
+        "cw340",
+    ]
+]
+
+[
+    test_suite(
+        name = "e2e_including_offline_{}".format(fpga),
+        tags = ["manual"],
+        tests = [
+            ":e2e_{}_{}_test".format(sku, fpga)
+            for sku in EARLGREY_SKUS.keys()
+        ],
+    )
+    for fpga in [
+        "hyper310",
+        "cw340",
+    ]
+]
diff --git a/sw/host/provisioning/orchestrator/tests/db_test.py b/sw/host/provisioning/orchestrator/tests/db_test.py
new file mode 100644
index 0000000000000..36975fcc83442
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/db_test.py
@@ -0,0 +1,84 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Unittests for db.py module."""
+
+import random
+import string
+import unittest
+
+import db
+
+
+def random_string_build(length=1000) -> str:
+    """Returns a random string of the given length.
+
+    Args:
+        length: The length of the random string.
+    Returns:
+        A random string of the given length.
+    """
+    characters = string.ascii_letters + string.digits + string.punctuation
+    return ''.join(random.choice(characters) for _ in range(length))
+
+
+class TestDeviceRecord(unittest.TestCase):
+
+    def setUp(self):
+        self.db_config = db.DBConfig(db_path=':memory:')
+        self.db = db.DB(self.db_config)
+        db.DeviceRecord.create_table(self.db)
+
+    def _random_device_record(self) -> db.DeviceRecord:
+        return db.DeviceRecord(device_id=random_string_build(),
+                               sku=random_string_build(),
+                               provisioning_state=random_string_build(),
+                               timestamp=-1,
+                               rma_unlock_token=random_string_build(),
+                               dice_uds=random_string_build(),
+                               cp_json=random_string_build(),
+                               ft_json=random_string_build(),
+                               last_update=-1)
+
+    def test_insert_and_query(self):
+        device_record = self._random_device_record()
+        device_record.insert(self.db)
+        got_device_record = db.DeviceRecord.query(self.db,
+                                                  device_record.device_id)
+        self.assertEqual(device_record, got_device_record)
+
+    def test_update(self):
+        device_record = self._random_device_record()
+        device_record.insert(self.db)
+        device_record.provisioning_state = 'UNLOCKED'
+        device_record.update(self.db)
+        got_device_record = db.DeviceRecord.query(self.db,
+                                                  device_record.device_id)
+        device_record.last_update = got_device_record.last_update
+        self.assertEqual(device_record, got_device_record)
+
+    def test_upsert(self):
+        device_record = self._random_device_record()
+        device_record.upsert(self.db)
+        got_device_record = db.DeviceRecord.query(self.db,
+                                                  device_record.device_id)
+        self.assertEqual(device_record, got_device_record)
+
+        device_record.provisioning_state = 'UNLOCKED'
+        device_record.upsert(self.db)
+        got_device_record = db.DeviceRecord.query(self.db,
+                                                  device_record.device_id)
+
+        device_record.last_update = got_device_record.last_update
+        self.assertEqual(device_record, got_device_record)
+
+    def test_query_all(self):
+        device_records = [self._random_device_record() for _ in range(10)]
+        for device_record in device_records:
+            device_record.insert(self.db)
+        got_device_records = db.DeviceRecord.query_all(self.db)
+        self.assertEqual(device_records, got_device_records)
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/sw/host/provisioning/orchestrator/tests/device_id_test.py b/sw/host/provisioning/orchestrator/tests/device_id_test.py
new file mode 100644
index 0000000000000..5077d4db070f6
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/device_id_test.py
@@ -0,0 +1,201 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Unittests for device_id.py module."""
+
+import unittest
+
+import hjson
+from device_id import DeviceId, DeviceIdentificationNumber
+from sku_config import SkuConfig
+from util import bcd_encode, bytes_to_int, format_hex
+
+_SIVAL_SKU_CONFIG = "sw/host/provisioning/orchestrator/configs/skus/emulation.hjson"
+
+
+class TestDeviceId(unittest.TestCase):
+
+    def setUp(self):
+        # Create SKU config object.
+        with open(_SIVAL_SKU_CONFIG, "r") as fp:
+            sku_config_args = hjson.load(fp)
+        self.sku_config = SkuConfig(**sku_config_args)
+
+        # Override AST config version.
+        self.sku_config.ast_cfg_version = 0x7
+        self.sku_config.validate()
+
+        # Create DIN object.
+        self.din = DeviceIdentificationNumber(year=4,
+                                              week=49,
+                                              lot=343,
+                                              wafer=72,
+                                              wafer_x_coord=635,
+                                              wafer_y_coord=242)
+
+        # Create DeviceId object.
+        self.device_id = DeviceId(sku_config=self.sku_config, din=self.din)
+
+    def test_si_creator_id_field(self):
+        expected_field = 0x4001
+        actual_field = self.device_id.to_int() & 0xffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=4),
+                format_hex(expected_field, width=4)))
+
+    def test_product_id_field(self):
+        expected_field = 0x0003
+        actual_field = (self.device_id.to_int() >> 16) & 0xffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=4),
+                format_hex(expected_field, width=4)))
+
+    def test_din_year_field(self):
+        expected_field = 4
+        actual_field = (self.device_id.to_int() >> 32) & 0xf
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=1),
+                format_hex(expected_field, width=1)))
+
+    def test_din_week_field(self):
+        expected_field = bcd_encode(49)
+        actual_field = (self.device_id.to_int() >> 36) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_din_lot_field(self):
+        expected_field = bcd_encode(343)
+        actual_field = (self.device_id.to_int() >> 44) & 0xfff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=3),
+                format_hex(expected_field, width=3)))
+
+    def test_din_wafer_field(self):
+        expected_field = bcd_encode(72)
+        actual_field = (self.device_id.to_int() >> 56) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_din_wafer_x_coord_field(self):
+        expected_field = bcd_encode(635)
+        actual_field = (self.device_id.to_int() >> 64) & 0xfff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=3),
+                format_hex(expected_field, width=3)))
+
+    def test_din_wafer_y_coord_field(self):
+        expected_field = bcd_encode(242)
+        actual_field = (self.device_id.to_int() >> 76) & 0xfff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=3),
+                format_hex(expected_field, width=3)))
+
+    def test_din_reserved_field(self):
+        expected_field = 0
+        actual_field = (self.device_id.to_int() >> 88) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_uid_reserved_field(self):
+        expected_field = 0
+        actual_field = (self.device_id.to_int() >> 96) & 0xffffffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=8),
+                format_hex(expected_field, width=8)))
+
+    def test_package_id_field(self):
+        expected_field = 0x0
+        actual_field = (self.device_id.to_int() >> 128) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_ast_cfg_version_field(self):
+        expected_field = 0x7
+        actual_field = (self.device_id.to_int() >> 136) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_otp_id_field(self):
+        expected_field = bytes_to_int("ME".encode("utf-8"))
+        actual_field = (self.device_id.to_int() >> 144) & 0xffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_otp_version_field(self):
+        expected_field = 0
+        actual_field = (self.device_id.to_int() >> 160) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=2),
+                format_hex(expected_field, width=2)))
+
+    def test_sku_specific_reserved_field0(self):
+        expected_field = 0
+        actual_field = (self.device_id.to_int() >> 168) & 0xffffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=4),
+                format_hex(expected_field, width=4)))
+
+    def test_sku_id_field(self):
+        expected_field = bytes_to_int("LUME".encode("utf-8"))
+        actual_field = (self.device_id.to_int() >> 192) & 0xffffffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=8),
+                format_hex(expected_field, width=8)))
+
+    def test_sku_specific_reserved_field1(self):
+        expected_field = 0
+        actual_field = (self.device_id.to_int() >> 224) & 0xffffff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=4),
+                format_hex(expected_field, width=4)))
+
+    def test_sku_specific_version_field(self):
+        expected_field = 1
+        actual_field = (self.device_id.to_int() >> 248) & 0xff
+        self.assertEqual(
+            actual_field, expected_field, "actual: {}, expected: {}.".format(
+                format_hex(actual_field, width=4),
+                format_hex(expected_field, width=4)))
+
+    def test_pretty_print(self):
+        self.device_id.pretty_print()
+
+    def test_from_hexstr(self):
+        # Simulate getting a different base ID from CP stage.
+        din = DeviceIdentificationNumber(year=5,
+                                         week=12,
+                                         lot=398,
+                                         wafer=12,
+                                         wafer_x_coord=200,
+                                         wafer_y_coord=100)
+        expected = DeviceId(sku_config=self.sku_config, din=din)
+        hexstr = expected.to_hexstr()
+        actual = DeviceId.from_hexstr(hexstr)
+        self.assertEqual(expected.to_int(), actual.to_int())
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/sw/host/provisioning/orchestrator/tests/e2e.sh b/sw/host/provisioning/orchestrator/tests/e2e.sh
new file mode 100755
index 0000000000000..13d70e03ed4e7
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/e2e.sh
@@ -0,0 +1,32 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Test Description:
+#
+# This tests fuly provisioning an OpenTitan chip by executing both CP and FT
+# stages in a single execution of the orchestrator script.
+
+set -ex
+
+cp sw/host/provisioning/orchestrator/src/orchestrator.zip $TEST_TMPDIR
+
+ORCHESTRATOR_PATH=$TEST_TMPDIR/orchestrator.zip
+
+# This script is run by a Bazel sh_test rule, which sets RUNFILES_DIR to point
+# at the test's runfiles. However, if RUNFILES_DIR is set, orchestrator.zip will
+# inherit its value instead of setting it to the proper directory. This breaks
+# runfile resolution, so we unset this variable here.
+unset RUNFILES_DIR
+
+# Run tool. The path to the --sku-config parameter is relative to the
+# runfiles-dir.
+$PYTHON ${ORCHESTRATOR_PATH} \
+  --sku-config=${SKU_CONFIG_PATH} \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --fpga=${FPGA} \
+  --non-interactive \
+  "$@" \
+  --db-path=$TEST_TMPDIR/registry.sqlite
diff --git a/sw/host/provisioning/orchestrator/tests/e2e_ate_individ.sh b/sw/host/provisioning/orchestrator/tests/e2e_ate_individ.sh
new file mode 100755
index 0000000000000..4e73a9a6c4bae
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/e2e_ate_individ.sh
@@ -0,0 +1,36 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Test Description:
+#
+# This tests fuly provisioning an OpenTitan chip by executing both CP and FT
+# stages in a single execution of the orchestrator script, using the FT
+# individualization binary compiled for the ATE environment (i.e., with no SPI
+# console communication).
+
+set -ex
+
+cp sw/host/provisioning/orchestrator/src/orchestrator.zip $TEST_TMPDIR
+
+ORCHESTRATOR_PATH=$TEST_TMPDIR/orchestrator.zip
+
+# This script is run by a Bazel sh_test rule, which sets RUNFILES_DIR to point
+# at the test's runfiles. However, if RUNFILES_DIR is set, orchestrator.zip will
+# inherit its value instead of setting it to the proper directory. This breaks
+# runfile resolution, so we unset this variable here.
+unset RUNFILES_DIR
+
+# Run tool. The path to the --sku-config parameter is relative to the
+# runfiles-dir. Note: "use-ext-clk" flag on FPGA does nothing, but this tests
+# the flag can be piped through to the test harness.
+$PYTHON ${ORCHESTRATOR_PATH} \
+  --sku-config=sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --fpga=hyper310 \
+  --use-ate-individ-bin \
+  --log-ujson-payloads \
+  --non-interactive \
+  --db-path=$TEST_TMPDIR/registry.sqlite
diff --git a/sw/host/provisioning/orchestrator/tests/e2e_multistage.sh b/sw/host/provisioning/orchestrator/tests/e2e_multistage.sh
new file mode 100755
index 0000000000000..9c7339adce31e
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/e2e_multistage.sh
@@ -0,0 +1,48 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Test Description:
+#
+# This tests running the CP stage first, then running CP + FT stages later to
+# test the scenario where a chip is provisioned to TEST_LOCKED0 state in a
+# secure site, and then transported to another secure site where it is further
+# provisioned into a mission mode state (by runnning CP + FT stages, where this
+# time the CP stage is skipped by the host test program and only the FT stage
+# is effectively run).
+
+set -ex
+
+cp sw/host/provisioning/orchestrator/src/orchestrator.zip $TEST_TMPDIR
+
+ORCHESTRATOR_PATH=$TEST_TMPDIR/orchestrator.zip
+
+# This script is run by a Bazel sh_test rule, which sets RUNFILES_DIR to point
+# at the test's runfiles. However, if RUNFILES_DIR is set, orchestrator.zip will
+# inherit its value instead of setting it to the proper directory. This breaks
+# runfile resolution, so we unset this variable here.
+unset RUNFILES_DIR
+
+# Run tool in CP-only mode first. The path to the --sku-config parameter is
+# relative to the runfiles-dir.
+$PYTHON ${ORCHESTRATOR_PATH} \
+  --sku-config=sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --fpga=hyper310 \
+  --non-interactive \
+  --cp-only \
+  --db-path=$TEST_TMPDIR/registry.sqlite
+
+# Run tool (CP + FT will both attempt to execute). We do not clear the bitstream
+# when executing CP mode as we want to simulate a chip that has already had CP
+# run, but just needs to run FT.
+$PYTHON ${ORCHESTRATOR_PATH} \
+  --sku-config=sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --fpga=hyper310 \
+  --fpga-dont-clear-bitstream \
+  --non-interactive \
+  --db-path=$TEST_TMPDIR/registry.sqlite
diff --git a/sw/host/provisioning/orchestrator/tests/e2e_option_flags.sh b/sw/host/provisioning/orchestrator/tests/e2e_option_flags.sh
new file mode 100755
index 0000000000000..64840760f2702
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/e2e_option_flags.sh
@@ -0,0 +1,34 @@
+#!/bin/bash
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+# Test Description:
+#
+# This tests fuly provisioning an OpenTitan chip by executing both CP and FT
+# stages in a single execution of the orchestrator script.
+
+set -ex
+
+cp sw/host/provisioning/orchestrator/src/orchestrator.zip $TEST_TMPDIR
+
+ORCHESTRATOR_PATH=$TEST_TMPDIR/orchestrator.zip
+
+# This script is run by a Bazel sh_test rule, which sets RUNFILES_DIR to point
+# at the test's runfiles. However, if RUNFILES_DIR is set, orchestrator.zip will
+# inherit its value instead of setting it to the proper directory. This breaks
+# runfile resolution, so we unset this variable here.
+unset RUNFILES_DIR
+
+# Run tool. The path to the --sku-config parameter is relative to the
+# runfiles-dir. Note: "use-ext-clk" flag on FPGA does nothing, but this tests
+# the flag can be piped through to the test harness.
+$PYTHON ${ORCHESTRATOR_PATH} \
+  --sku-config=sw/host/provisioning/orchestrator/configs/skus/emulation.hjson \
+  --test-unlock-token="0x11111111_11111111_11111111_11111111" \
+  --test-exit-token="0x22222222_22222222_22222222_22222222" \
+  --package=${PACKAGE} \
+  --fpga=hyper310 \
+  --log-ujson-payloads \
+  --non-interactive \
+  --db-path=$TEST_TMPDIR/registry.sqlite
diff --git a/sw/host/provisioning/orchestrator/tests/transition.bzl b/sw/host/provisioning/orchestrator/tests/transition.bzl
new file mode 100644
index 0000000000000..15a9823f5017e
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/transition.bzl
@@ -0,0 +1,64 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+def _orchestrator_hyper310_settings_impl(settings, attr):
+    return {
+        "//hw/bitstream/universal:otp": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty",
+        "//hw/bitstream/universal:env": "//hw/top_earlgrey:fpga_hyper310_rom_with_fake_keys",
+    }
+
+_orchestrator_hyper310_settings = transition(
+    implementation = _orchestrator_hyper310_settings_impl,
+    inputs = [],
+    outputs = [
+        "//hw/bitstream/universal:otp",
+        "//hw/bitstream/universal:env",
+    ],
+)
+
+def _orchestrator_cw340_settings_impl(settings, attr):
+    return {
+        "//hw/bitstream/universal:otp": "//hw/ip/otp_ctrl/data/earlgrey_skus/emulation:otp_img_test_unlocked0_manuf_empty",
+        "//hw/bitstream/universal:env": "//hw/top_earlgrey:fpga_cw340_rom_with_fake_keys",
+    }
+
+_orchestrator_cw340_settings = transition(
+    implementation = _orchestrator_cw340_settings_impl,
+    inputs = [],
+    outputs = [
+        "//hw/bitstream/universal:otp",
+        "//hw/bitstream/universal:env",
+    ],
+)
+
+def _orchestrator_test_settings_transition_impl(ctx):
+    info = ctx.attr.target[DefaultInfo]
+    return [
+        DefaultInfo(
+            files = info.files,
+            data_runfiles = info.data_runfiles,
+        ),
+    ]
+
+orchestrator_hyper310_test_settings_transition = rule(
+    implementation = _orchestrator_test_settings_transition_impl,
+    cfg = _orchestrator_hyper310_settings,
+    attrs = {
+        "target": attr.label(),
+        "_allowlist_function_transition": attr.label(
+            default = "@bazel_tools//tools/allowlists/function_transition_allowlist",
+        ),
+    },
+)
+
+orchestrator_cw340_test_settings_transition = rule(
+    implementation = _orchestrator_test_settings_transition_impl,
+    cfg = _orchestrator_cw340_settings,
+    attrs = {
+        "target": attr.label(),
+        "_allowlist_function_transition": attr.label(
+            default = "@bazel_tools//tools/allowlists/function_transition_allowlist",
+        ),
+    },
+)
diff --git a/sw/host/provisioning/orchestrator/tests/util_test.py b/sw/host/provisioning/orchestrator/tests/util_test.py
new file mode 100644
index 0000000000000..e7dc58dc3f5c2
--- /dev/null
+++ b/sw/host/provisioning/orchestrator/tests/util_test.py
@@ -0,0 +1,34 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import os
+import unittest
+
+from util import resolve_runfile
+
+
+class TestRunfileMustResolve(unittest.TestCase):
+
+    def test_main_workspace_path(self):
+        resolved = resolve_runfile(
+            "sw/device/silicon_creator/manuf/keys/fake/dice_ca.pem")
+        self.assertTrue(os.path.exists(resolved))
+
+    def test_external_path(self):
+        resolved = resolve_runfile(
+            "external/openocd/tcl/interface/cmsis-dap.cfg")
+        self.assertTrue(os.path.exists(resolved))
+
+    def test_abs_path(self):
+        path = os.path.abspath(__file__)
+        resolved = resolve_runfile(path)
+        self.assertEqual(path, resolved)
+
+    def test_non_existent(self):
+        with self.assertRaises(ValueError):
+            resolve_runfile("file-does-not-exist")
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/sw/host/provisioning/perso_tlv_lib/BUILD b/sw/host/provisioning/perso_tlv_lib/BUILD
new file mode 100644
index 0000000000000..fba16cd2b77e7
--- /dev/null
+++ b/sw/host/provisioning/perso_tlv_lib/BUILD
@@ -0,0 +1,36 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_library")
+load("@rules_rust//rust:defs.bzl", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_bindgen_library(
+    name = "perso_tlv_objects",
+    bindgen_flags = [
+        "--allowlist-type=perso_tlv_object_type_t",
+        "--allowlist-type=perso_tlv_object_header_t",
+        "--allowlist-type=perso_tlv_cert_header_t",
+        "--allowlist-type=perso_tlv_dev_seed_header_t",
+        "--allowlist-type=perso_tlv_obj_header_fields_t",
+        "--allowlist-type=perso_tlv_cert_header_fields_t",
+    ],
+    cc_lib = "//sw/device/silicon_creator/manuf/base:perso_tlv_headers",
+    header = "//sw/device/silicon_creator/manuf/base:perso_tlv_data.h",
+    rustc_flags = [
+        "--allow=non_snake_case",
+        "--allow=non_upper_case_globals",
+        "--allow=non_camel_case_types",
+    ],
+)
+
+rust_library(
+    name = "perso_tlv_lib",
+    srcs = ["src/lib.rs"],
+    deps = [
+        "//sw/host/provisioning/perso_tlv_lib:perso_tlv_objects",
+        "@crate_index//:anyhow",
+    ],
+)
diff --git a/sw/host/provisioning/perso_tlv_lib/src/lib.rs b/sw/host/provisioning/perso_tlv_lib/src/lib.rs
new file mode 100644
index 0000000000000..5cf247bb2af6a
--- /dev/null
+++ b/sw/host/provisioning/perso_tlv_lib/src/lib.rs
@@ -0,0 +1,127 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail};
+
+// Types of objects which can come from the device in the perso blob.
+#[repr(C)]
+#[derive(Copy, Clone, Debug, PartialEq, Eq)]
+pub enum ObjType {
+    UnendorsedX509Cert = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeX509Tbs as isize,
+    EndorsedX509Cert = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeX509Cert as isize,
+    DevSeed = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeDevSeed as isize,
+    EndorsedCwtCert = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeCwtCert as isize,
+    WasTbsHmac = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeWasTbsHmac as isize,
+    DeviceId = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeDeviceId as isize,
+    GenericSeed = perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypeGenericSeed as isize,
+    PersoSha256Hash =
+        perso_tlv_objects::perso_tlv_object_type_kPersoObjectTypePersoSha256Hash as isize,
+}
+
+impl ObjType {
+    pub fn from_usize(value: usize) -> Result<ObjType> {
+        match value {
+            0 => Ok(ObjType::UnendorsedX509Cert),
+            1 => Ok(ObjType::EndorsedX509Cert),
+            2 => Ok(ObjType::DevSeed),
+            3 => Ok(ObjType::EndorsedCwtCert),
+            4 => Ok(ObjType::WasTbsHmac),
+            5 => Ok(ObjType::DeviceId),
+            6 => Ok(ObjType::GenericSeed),
+            7 => Ok(ObjType::PersoSha256Hash),
+            _ => bail!("incorrect input value of {value} for ObjType"),
+        }
+    }
+}
+
+// LTV header of the transferred object, on the wire packed in u16.
+pub type ObjHeaderType = perso_tlv_objects::perso_tlv_object_header_t;
+pub struct ObjHeader {
+    pub obj_size: usize,
+    pub obj_type: ObjType,
+}
+
+// Header of the certificate payload of the LTV object, on the wire packed in
+// u16.
+pub type CertHeaderType = perso_tlv_objects::perso_tlv_cert_header_t;
+pub struct CertHeader<'a> {
+    // Total size the certificate takes in the buffer, header + hame length +
+    // cert size.
+    pub wrapped_size: usize,
+    pub cert_name: &'a str,
+    pub cert_body: Vec<u8>,
+}
+
+// A helper macro for quick unpacking  LTV object and Certificate payload
+// headers. First parameter indicates which header is being parsed, the second
+// parameter is the field which needs to be extracted, the third parameter is
+// the packed u16 header value.
+#[macro_export]
+macro_rules! perso_tlv_get_field {
+    ($type:expr, $name:expr, $intv:expr) => {{
+        let input = $intv as u32;
+        let v = match ($type, $name) {
+            ("obj", "size") => {
+                (input >> perso_tlv_objects::perso_tlv_obj_header_fields_kObjhSizeFieldShift)
+                    & perso_tlv_objects::perso_tlv_obj_header_fields_kObjhSizeFieldMask
+            }
+
+            ("obj", "type") => {
+                (input >> perso_tlv_objects::perso_tlv_obj_header_fields_kObjhTypeFieldShift)
+                    & perso_tlv_objects::perso_tlv_obj_header_fields_kObjhTypeFieldMask
+            }
+
+            ("crth", "size") => {
+                (input >> perso_tlv_objects::perso_tlv_cert_header_fields_kCrthSizeFieldShift)
+                    & perso_tlv_objects::perso_tlv_cert_header_fields_kCrthSizeFieldMask
+            }
+
+            ("crth", "name") => {
+                (input >> perso_tlv_objects::perso_tlv_cert_header_fields_kCrthNameSizeFieldShift)
+                    & perso_tlv_objects::perso_tlv_cert_header_fields_kCrthNameSizeFieldMask
+            }
+            (&_, _) => bail!("Unexpected macro invocation"),
+        };
+        v as usize
+    }};
+}
+
+// Helper functions used to pack LTV object and Certificate payload headers.
+pub fn make_obj_header(size: usize, otype: ObjType) -> Result<ObjHeaderType> {
+    if size as u32 > perso_tlv_objects::perso_tlv_obj_header_fields_kObjhSizeFieldMask {
+        bail!("Can't create object of size {size}")
+    }
+
+    Ok(
+        (((size as u32 & perso_tlv_objects::perso_tlv_obj_header_fields_kObjhSizeFieldMask)
+            << perso_tlv_objects::perso_tlv_obj_header_fields_kObjhSizeFieldShift)
+            + (((otype as u32)
+                & perso_tlv_objects::perso_tlv_obj_header_fields_kObjhTypeFieldMask)
+                << perso_tlv_objects::perso_tlv_obj_header_fields_kObjhTypeFieldShift))
+            as u16,
+    )
+}
+
+pub fn make_cert_wrapper_header(cert_size: usize, cert_name: &str) -> Result<CertHeaderType> {
+    if cert_size as u32 > perso_tlv_objects::perso_tlv_cert_header_fields_kCrthSizeFieldMask {
+        bail!("Can't create a certificate wraper of size {cert_size}")
+    }
+
+    let name_len = cert_name.len();
+    if name_len as u32 > perso_tlv_objects::perso_tlv_cert_header_fields_kCrthNameSizeFieldMask {
+        bail!(
+            "Can't create certificate wrapper for name \"{}\"",
+            cert_name
+        )
+    }
+    let wrapped_size = (cert_size + name_len + std::mem::size_of::<CertHeaderType>()) as u32;
+    Ok(
+        (((wrapped_size & perso_tlv_objects::perso_tlv_cert_header_fields_kCrthSizeFieldMask)
+            << perso_tlv_objects::perso_tlv_cert_header_fields_kCrthSizeFieldShift)
+            + ((name_len as u32
+                & perso_tlv_objects::perso_tlv_cert_header_fields_kCrthNameSizeFieldMask)
+                << perso_tlv_objects::perso_tlv_cert_header_fields_kCrthNameSizeFieldShift))
+            as u16,
+    )
+}
diff --git a/sw/host/provisioning/ujson_lib/BUILD b/sw/host/provisioning/ujson_lib/BUILD
index 1b852eff855d2..a81691be3d3f2 100644
--- a/sw/host/provisioning/ujson_lib/BUILD
+++ b/sw/host/provisioning/ujson_lib/BUILD
@@ -25,6 +25,7 @@ rust_library(
     deps = [
         "//sw/host/opentitanlib",
         "@crate_index//:arrayvec",
+        "@crate_index//:indexmap",
         "@crate_index//:serde",
     ],
 )
diff --git a/sw/host/provisioning/ujson_lib/src/lib.rs b/sw/host/provisioning/ujson_lib/src/lib.rs
index 7888111ba231b..12071c070baad 100644
--- a/sw/host/provisioning/ujson_lib/src/lib.rs
+++ b/sw/host/provisioning/ujson_lib/src/lib.rs
@@ -2,4 +2,25 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
+use indexmap::IndexMap;
+
 pub mod provisioning_data;
+
+/// Max sizes of the UJSON structs below when they are serialized.
+///
+/// The are obtained by running the following FPGA test:
+/// bazel test --test_output=streamed \
+///  //sw/device/silicon_creator/manuf/tests:ujson_msg_size_functest
+///
+/// These should match the constants in:
+/// sw/device/lib/testing/json/provisioning_data.h
+pub const SERDES_SHA256_HASH_SERIALIZED_MAX_SIZE: usize = 98;
+pub const LC_TOKEN_HASH_SERIALIZED_MAX_SIZE: usize = 52;
+pub const MANUF_CERTGEN_INPUTS_SERIALIZED_MAX_SIZE: usize = 210;
+pub const PERSO_BLOB_SERIALIZED_MAX_SIZE: usize = 20535;
+
+pub struct UjsonPayloads {
+    /// HashMap of "Name" --> "UJSON data" sent from the Host to the Device
+    /// during provisioning.
+    pub dut_in: IndexMap<String, String>,
+}
diff --git a/sw/host/provisioning/util_lib/BUILD b/sw/host/provisioning/util_lib/BUILD
index 24a24caaaf90e..cd4d3ca60d00a 100644
--- a/sw/host/provisioning/util_lib/BUILD
+++ b/sw/host/provisioning/util_lib/BUILD
@@ -8,10 +8,21 @@ package(default_visibility = ["//visibility:public"])
 
 rust_library(
     name = "util_lib",
-    srcs = ["src/lib.rs"],
+    srcs = [
+        "src/lib.rs",
+        "src/response.rs",
+    ],
     deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/provisioning/cert_lib",
         "@crate_index//:anyhow",
         "@crate_index//:arrayvec",
         "@crate_index//:hex",
+        "@crate_index//:indexmap",
+        "@crate_index//:rand",
+        "@crate_index//:rsa",
+        "@crate_index//:serde",
+        "@crate_index//:tiny-keccak",
+        "@crate_index//:zerocopy",
     ],
 )
diff --git a/sw/host/provisioning/util_lib/src/lib.rs b/sw/host/provisioning/util_lib/src/lib.rs
index ee68cdc211f9c..1fd25c9472df2 100644
--- a/sw/host/provisioning/util_lib/src/lib.rs
+++ b/sw/host/provisioning/util_lib/src/lib.rs
@@ -2,9 +2,21 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::Result;
+use anyhow::{Context, Result};
 use arrayvec::ArrayVec;
 use hex::decode;
+use rand::rngs::OsRng;
+use rand::{CryptoRng, Rng};
+use rsa::RsaPublicKey;
+use rsa::pkcs1::DecodeRsaPublicKey;
+use rsa::pkcs1v15::Pkcs1v15Encrypt;
+use rsa::pkcs8::DecodePublicKey;
+use rsa::traits::PaddingScheme;
+use std::path::Path;
+use tiny_keccak::{CShake, Hasher};
+use zerocopy::IntoBytes;
+
+pub mod response;
 
 pub fn hex_string_to_u32_arrayvec<const N: usize>(hex_str: &str) -> Result<ArrayVec<u32, N>> {
     let hex_str_no_sep = hex_str.replace('_', "");
@@ -32,3 +44,54 @@ pub fn hex_string_to_u8_arrayvec<const N: usize>(hex_str: &str) -> Result<ArrayV
         .into_iter()
         .collect::<ArrayVec<u8, N>>())
 }
+
+/// Life cycle tokens are hashed using a keccak hashing algorithm. The result is
+/// a 16 byte value represented as a vector of two u64s.
+pub fn hash_lc_token(input: &[u8]) -> Result<ArrayVec<u64, 2>> {
+    let name = b"";
+    let customazation = b"LC_CTRL";
+    let mut csh = CShake::v128(name, customazation);
+    let mut output = [0u8; 16];
+
+    csh.update(input);
+    csh.finalize(&mut output);
+
+    Ok(output
+        .chunks_exact(8)
+        .map(|chunk| {
+            let arr: [u8; 8] = chunk.try_into().expect("chunk is the wrong size");
+            u64::from_le_bytes(arr)
+        })
+        .collect::<ArrayVec<u64, 2>>())
+}
+
+fn _random_data<RNG>(rng: &mut RNG, data: &mut [u32]) -> Result<()>
+where
+    RNG: Rng + CryptoRng,
+{
+    rng.try_fill(data)?;
+    Ok(())
+}
+
+/// Generates a random token using a CSPRNG.
+pub fn random_token<const N: usize>() -> Result<ArrayVec<u32, N>> {
+    let mut data = [0u32; N];
+    _random_data(&mut OsRng, &mut data)?;
+    Ok(ArrayVec::from(data))
+}
+
+/// Loads a DER-encoded RSA public key.
+pub fn load_rsa_public_key(path: impl AsRef<Path>) -> Result<RsaPublicKey> {
+    let path = path.as_ref();
+    match DecodeRsaPublicKey::read_pkcs1_der_file(path)
+        .with_context(|| format!("read PKCS#1 der {path:?}"))
+    {
+        Ok(key) => Ok(key),
+        Err(e) => Ok(DecodePublicKey::read_public_key_der_file(path)
+            .with_context(|| format!("read PKCS#8 der {path:?} (previous error: {e})"))?),
+    }
+}
+
+pub fn encrypt_token(pub_key: &RsaPublicKey, token: &[u32]) -> Result<Vec<u8>> {
+    Ok(Pkcs1v15Encrypt.encrypt(&mut OsRng, pub_key, token.as_bytes())?)
+}
diff --git a/sw/host/provisioning/util_lib/src/response.rs b/sw/host/provisioning/util_lib/src/response.rs
new file mode 100644
index 0000000000000..c941958462a16
--- /dev/null
+++ b/sw/host/provisioning/util_lib/src/response.rs
@@ -0,0 +1,57 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::time::Instant;
+
+use cert_lib::EndorsedCert;
+use indexmap::IndexMap;
+use opentitanlib::dif::lc_ctrl::DifLcCtrlState;
+use serde::Serialize;
+
+#[derive(Clone, Debug, Serialize)]
+#[serde(rename_all = "snake_case")]
+pub enum Stat {
+    Microseconds(u64),
+    String(String),
+}
+
+#[derive(Clone, Debug, Serialize, Default)]
+pub struct Statistics(IndexMap<String, Stat>);
+
+#[derive(Clone, Debug, Serialize, Default)]
+pub struct DevSeedResponse {
+    pub number: usize,
+    pub seed: Vec<Vec<u8>>,
+}
+
+#[derive(Clone, Debug, Serialize, Default)]
+pub struct LcStateSequence {
+    pub initial: DifLcCtrlState,
+    pub unlocked: DifLcCtrlState,
+    pub individualize: Option<DifLcCtrlState>,
+    pub mission_mode: Option<DifLcCtrlState>,
+}
+
+#[derive(Clone, Debug, Serialize, Default)]
+pub struct PersonalizeResponse {
+    pub lc_state: LcStateSequence,
+    pub device_id: String,
+    pub rma_unlock_token: String,
+    pub seeds: DevSeedResponse,
+    pub certs: IndexMap<String, EndorsedCert>,
+    pub stats: Statistics,
+}
+
+impl Statistics {
+    pub fn log_elapsed_time(&mut self, name: &str, start: Instant) {
+        let end = Instant::now();
+        let duration = end - start;
+        self.0
+            .insert(name.into(), Stat::Microseconds(duration.as_micros() as u64));
+    }
+
+    pub fn log_string(&mut self, name: &str, val: &str) {
+        self.0.insert(name.into(), Stat::String(val.into()));
+    }
+}
diff --git a/sw/host/sphincsplus/BUILD b/sw/host/sphincsplus/BUILD
index de79646ef463c..b1719e1480697 100644
--- a/sw/host/sphincsplus/BUILD
+++ b/sw/host/sphincsplus/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@rules_rust//bindgen:defs.bzl", "rust_bindgen_library")
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_library")
 load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test")
 
 package(default_visibility = ["//visibility:public"])
@@ -52,6 +52,7 @@ rust_library(
         "error.rs",
         "key.rs",
         "lib.rs",
+        "signature.rs",
         "variants.rs",
     ],
     proc_macro_deps = [
@@ -60,9 +61,13 @@ rust_library(
     deps = [
         ":bindgen_sha2_128s_simple",
         ":bindgen_shake_128s_simple",
+        "//sw/host/opentitanlib/util",
+        "@crate_index//:asn1",
         "@crate_index//:pem-rfc7468",
+        "@crate_index//:serde",
         "@crate_index//:strum",
         "@crate_index//:thiserror",
+        "@crate_index//:zeroize",
     ],
 )
 
diff --git a/sw/host/sphincsplus/key.rs b/sw/host/sphincsplus/key.rs
index 900c156821e3a..b0b1805b5b34b 100644
--- a/sw/host/sphincsplus/key.rs
+++ b/sw/host/sphincsplus/key.rs
@@ -3,11 +3,14 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use crate::{DecodeKey, EncodeKey, SphincsPlus, SpxError};
+use asn1::{BitString, ObjectIdentifier, ParseResult};
 use pem_rfc7468::LineEnding;
+use serde::{Deserialize, Serialize};
 use std::borrow::Cow;
 use std::fmt;
 use std::str::FromStr;
 use strum::{Display, EnumString};
+use zeroize::Zeroize;
 
 #[derive(Clone, PartialEq, Eq, Debug)]
 pub struct SpxPublicKey {
@@ -30,7 +33,9 @@ impl fmt::Debug for SpxSecretKey {
     }
 }
 
-#[derive(Default, Debug, Clone, Copy, EnumString, Display)]
+#[derive(
+    Default, Debug, Clone, Copy, PartialEq, Eq, EnumString, Display, Serialize, Deserialize,
+)]
 #[strum(ascii_case_insensitive)]
 pub enum SpxDomain {
     None,
@@ -51,7 +56,10 @@ impl SpxDomain {
         match self {
             Self::None => message.into(),
             Self::Pure => [&[0u8, 0u8], message].concat().into(),
-            Self::PreHashedSha256 => [&Self::SHA256_DOMAIN, message].concat().into(),
+            Self::PreHashedSha256 => {
+                assert_eq!(message.len(), 32);
+                [&Self::SHA256_DOMAIN, message].concat().into()
+            }
         }
     }
 }
@@ -104,6 +112,13 @@ impl SpxSecretKey {
     }
 }
 
+impl Drop for SpxSecretKey {
+    fn drop(&mut self) {
+        // Destroy the secret key value upon drop.
+        self.key.zeroize();
+    }
+}
+
 impl DecodeKey for SpxSecretKey {
     /// Decodes a SPHINCS+ secret key from a PEM encoded string.
     fn from_pem(s: &str) -> Result<Self, SpxError> {
@@ -156,6 +171,9 @@ impl EncodeKey for SpxSecretKey {
 }
 
 impl SpxPublicKey {
+    const OID_SHA2_128S_SPX_PUBLIC_KEY: ObjectIdentifier =
+        asn1::oid!(2, 16, 840, 1, 101, 3, 4, 3, 35);
+
     /// Creates a SPHINCS+ public key from raw bytes.
     pub fn from_bytes(algorithm: SphincsPlus, bytes: &[u8]) -> Result<Self, SpxError> {
         if algorithm.public_key_len() != bytes.len() {
@@ -182,6 +200,35 @@ impl SpxPublicKey {
         let msg = domain.prepare(msg);
         self.algorithm.verify(&self.key, signature, &msg)
     }
+
+    fn parse_asn1_public_key(key: &[u8], label: &str) -> Result<Self, SpxError> {
+        // The PEM block is not a raw key, maybe it is an ASN.1 object.
+        let r: ParseResult<(ObjectIdentifier, &[u8])> = asn1::parse(key, |d| {
+            d.read_element::<asn1::Sequence>()?.parse(|d| {
+                let oid: ObjectIdentifier = d.read_element::<asn1::Sequence>()?.parse(|d| {
+                    let oid = d.read_element::<ObjectIdentifier>()?;
+                    Ok(oid)
+                })?;
+                let key = d.read_element::<BitString>()?.as_bytes();
+                Ok((oid, key))
+            })
+        });
+        let (oid, key) = match r {
+            Ok((oid, key)) => (oid, key),
+            Err(_) => return Err(SpxError::ParseError(format!("Not a RAW key {label:?}"))),
+        };
+
+        if oid == Self::OID_SHA2_128S_SPX_PUBLIC_KEY && key.len() == 32 {
+            Ok(SpxPublicKey {
+                algorithm: SphincsPlus::Sha2128sSimple,
+                key: key.to_vec(),
+            })
+        } else {
+            Err(SpxError::ParseError(format!(
+                "Not an expected SPX ASN.1: {label:?}"
+            )))
+        }
+    }
 }
 
 impl DecodeKey for SpxPublicKey {
@@ -199,7 +246,7 @@ impl DecodeKey for SpxPublicKey {
             return Err(SpxError::ParseError(format!("not a public key: {label:?}")));
         }
         if !algorithm.starts_with("RAW:") {
-            return Err(SpxError::ParseError(format!("not a RAW key: {label:?}")));
+            return Self::parse_asn1_public_key(&key, label);
         }
         let algorithm = algorithm[4..].replace('_', "-");
         let algorithm = SphincsPlus::from_str(&algorithm).map_err(SpxError::Strum)?;
diff --git a/sw/host/sphincsplus/lib.rs b/sw/host/sphincsplus/lib.rs
index b3679bf331da4..d148cad813e1c 100644
--- a/sw/host/sphincsplus/lib.rs
+++ b/sw/host/sphincsplus/lib.rs
@@ -4,10 +4,12 @@
 
 mod error;
 mod key;
+mod signature;
 mod variants;
 
 pub use error::SpxError;
 pub use key::{SpxDomain, SpxPublicKey, SpxSecretKey};
+pub use signature::SpxRawSignature;
 pub use variants::SphincsPlus;
 
 use std::path::Path;
diff --git a/sw/host/sphincsplus/signature.rs b/sw/host/sphincsplus/signature.rs
new file mode 100644
index 0000000000000..5a6738cd9c73b
--- /dev/null
+++ b/sw/host/sphincsplus/signature.rs
@@ -0,0 +1,65 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use pem_rfc7468::Decoder;
+use std::fs::File;
+use std::io::Read;
+use std::path::Path;
+
+use crate::{SphincsPlus, SpxError};
+use util::clean_pem_bytes_for_parsing;
+
+#[derive(Clone, PartialEq, Eq, Debug)]
+pub struct SpxRawSignature {
+    raw_data: Vec<u8>,
+}
+
+impl SpxRawSignature {
+    pub fn read(src: &mut impl Read, algorithm: SphincsPlus) -> Result<Self, SpxError> {
+        let mut raw_data = vec![0; algorithm.signature_len()];
+        src.read_exact(&mut raw_data)?;
+        Ok(SpxRawSignature { raw_data })
+    }
+
+    pub fn read_from_file(path: &Path, algorithm: SphincsPlus) -> Result<Self, SpxError> {
+        let mut file = File::open(path)?;
+        let file_size = std::fs::metadata(path)?.len() as usize;
+
+        if file_size == algorithm.signature_len() {
+            // This must be a raw signature, just read it as is.
+            SpxRawSignature::read(&mut file, algorithm)
+        } else {
+            let mut data = Vec::<u8>::new();
+
+            file.read_to_end(&mut data)?;
+
+            // Try parsing as PEM decoding.
+            SpxRawSignature::from_pem(&data, algorithm)
+        }
+    }
+
+    fn from_pem(data: &[u8], algorithm: SphincsPlus) -> Result<Self, SpxError> {
+        // Ensures valid PEM markers and a recognized label are present.
+        let _ = pem_rfc7468::decode_label(data)?;
+        let mut raw_data = Vec::new();
+        let result = Decoder::new(data);
+        match result {
+            Ok(mut decoder) => decoder.decode_to_end(&mut raw_data)?,
+            _ => {
+                let cleaned_data = clean_pem_bytes_for_parsing(data)?;
+                let mut decoder = Decoder::new(&cleaned_data)?;
+                decoder.decode_to_end(&mut raw_data)?
+            }
+        };
+        if algorithm.signature_len() != raw_data.len() {
+            return Err(SpxError::BadSigLength(raw_data.len()));
+        }
+        Ok(SpxRawSignature { raw_data })
+    }
+
+    /// Returns the raw signature bytes.
+    pub fn as_bytes(&self) -> &[u8] {
+        self.raw_data.as_slice()
+    }
+}
diff --git a/sw/host/sphincsplus/variants.rs b/sw/host/sphincsplus/variants.rs
index b2aa4c535d8c3..7bd667bef1332 100644
--- a/sw/host/sphincsplus/variants.rs
+++ b/sw/host/sphincsplus/variants.rs
@@ -4,6 +4,7 @@
 
 use crate::SpxError;
 use paste::paste;
+use serde::{Deserialize, Serialize};
 use strum::{Display, EnumString};
 
 // The `algorithms` macro provides a uniform interface to the underlying C
@@ -229,12 +230,14 @@ macro_rules! algorithms {
 // the bindgen library name and `NAMESPACE` preprocessor symbol used to construct
 // that libarary.
 algorithms! {
-    #[derive(EnumString, Display)]
+    #[derive(EnumString, Display, Serialize, Deserialize)]
     #[strum(ascii_case_insensitive)]
     pub enum SphincsPlus {
-        #[strum(serialize="SPHINCS+-SHAKE-128s-simple", serialize="SHAKE-128s-simple")]
+        #[serde(rename="SLH-DSA-SHAKE-128s", alias="SPHINCS+-SHAKE-128s-simple", alias="SHAKE-128s-simple")]
+        #[strum(to_string="SLH-DSA-SHAKE-128s", serialize="SPHINCS+-SHAKE-128s-simple", serialize="SHAKE-128s-simple")]
         Shake128sSimple => shake_128s_simple,
-        #[strum(serialize="SPHINCS+-SHA2-128s-simple", serialize="SHA2-128s-simple")]
+        #[serde(rename="SLH-DSA-SHA2-128s", alias="SPHINCS+-SHA2-128s-simple", alias="SHA2-128s-simple")]
+        #[strum(to_string="SLH-DSA-SHA2-128s", serialize="SPHINCS+-SHA2-128s-simple", serialize="SHA2-128s-simple")]
         Sha2128sSimple => sha2_128s_simple,
     }
 }
diff --git a/sw/host/tests/attestation/BUILD b/sw/host/tests/attestation/BUILD
new file mode 100644
index 0000000000000..d15351a40318c
--- /dev/null
+++ b/sw/host/tests/attestation/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "attestation_test",
+    srcs = ["attestation_test.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/ot_certs",
+        "@crate_index//:anyhow",
+        "@crate_index//:base64ct",
+        "@crate_index//:clap",
+        "@crate_index//:hex",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:num-bigint-dig",
+        "@crate_index//:regex",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/attestation/attestation_test.rs b/sw/host/tests/attestation/attestation_test.rs
new file mode 100644
index 0000000000000..6b5ebe2b7a2a5
--- /dev/null
+++ b/sw/host/tests/attestation/attestation_test.rs
@@ -0,0 +1,176 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use base64ct::{Base64, Decoder};
+use clap::Parser;
+use num_bigint_dig::BigUint;
+use regex::Regex;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::crypto::sha256::Sha256Digest;
+use opentitanlib::image::image::Image;
+use opentitanlib::ownership::OwnerBlock;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use opentitanlib::util::file::FromReader;
+
+use ot_certs::template::{AttributeType, CertificateExtension, Name, SubjectPublicKeyInfo, Value};
+use ot_certs::x509;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+}
+
+// A helper trait for extracting data out of the `Value` type.
+trait GetValue<T> {
+    fn get_value(&self) -> &T;
+}
+
+impl<T: std::fmt::Debug> GetValue<T> for Value<T> {
+    fn get_value(&self) -> &T {
+        match self {
+            Value::Variable(_) => panic!("Not expecting a Variable: {self:?}"),
+            Value::Literal(x) => x,
+        }
+    }
+}
+
+impl<T: std::fmt::Debug> GetValue<T> for Option<Value<T>> {
+    fn get_value(&self) -> &T {
+        match self {
+            None => panic!("Not expecting Option::None"),
+            Some(Value::Variable(_)) => panic!("Not expecting a Variable: {self:?}"),
+            Some(Value::Literal(x)) => x,
+        }
+    }
+}
+
+fn get_base64_blob(haystack: &str, rx: &str) -> Result<Vec<u8>> {
+    let rx = Regex::new(rx)?;
+    let encoded = rx
+        .captures(haystack)
+        .ok_or(anyhow!("Encoded certificate not found"))?;
+    let mut bin = Vec::new();
+    if !encoded[1].is_empty() {
+        let mut decoder = Decoder::<Base64>::new(encoded[1].as_bytes())?;
+        decoder.decode_to_end(&mut bin)?;
+    }
+    Ok(bin)
+}
+
+fn check_public_key(key: &SubjectPublicKeyInfo, id: &[u8], subject: &Name) -> Result<bool> {
+    let SubjectPublicKeyInfo::EcPublicKey(info) = key;
+
+    let mut material = Vec::new();
+    let x = &info.public_key.x.get_value().to_bytes_be();
+    let y = &info.public_key.y.get_value().to_bytes_be();
+    material.extend(vec![0; 32 - x.len()]);
+    material.extend(x);
+    material.extend(vec![0; 32 - y.len()]);
+    material.extend(y);
+    let hash = Sha256Digest::hash(&material).to_vec();
+    let keyid = &hash[..20];
+    log::info!("computed id = {:?}", hex::encode(keyid));
+    log::info!("         id = {:?}", hex::encode(id));
+
+    let name = subject[0][&AttributeType::SerialNumber].get_value();
+    log::info!("    subject = {:?}", name);
+
+    Ok(keyid == id && &hex::encode(keyid) == name)
+}
+
+fn attestation_test(opts: &Opts, transport: &TransportWrapper, owner_history: &[u8]) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let capture = UartConsole::wait_for(
+        &*uart,
+        r"(?msR)Running.*PASS!$|FAIL!$|BFV:([0-9A-Fa-f]{8})$",
+        opts.timeout,
+    )?;
+
+    // Note: Finding UDS is allowed to fail on FPGA environments.
+    let _uds_bin = get_base64_blob(&capture[0], r"(?msR)UDS: (.*?)$");
+    let cdi0_bin = get_base64_blob(&capture[0], r"(?msR)CDI_0: (.*?)$")?;
+    let cdi1_bin = get_base64_blob(&capture[0], r"(?msR)CDI_1: (.*?)$")?;
+    let owner_page_0 = get_base64_blob(&capture[0], r"(?msR)OWNER_PAGE_0: (.*?)$")?;
+    let owner_page_1 = get_base64_blob(&capture[0], r"(?msR)OWNER_PAGE_1: (.*?)$")?;
+
+    // TODO: check UDS certificate.
+    let cdi0 = x509::parse_certificate(&cdi0_bin)?;
+    let cdi1 = x509::parse_certificate(&cdi1_bin)?;
+
+    // TODO: verify signature chain from CDI_1 to CDI_0 to UDS.
+
+    let image = Image::read_from_file(opts.init.bootstrap.bootstrap.as_deref().unwrap())?;
+
+    let measurements = image
+        .subimages()?
+        .iter()
+        .map(|s| s.compute_digest().unwrap())
+        .collect::<Vec<_>>();
+    let owner_measurements = [
+        // The owner page digests should not include the signature or seal fields.
+        Sha256Digest::hash(&owner_page_0[0..OwnerBlock::SIGNATURE_OFFSET]).to_vec(),
+        Sha256Digest::hash(&owner_page_1[0..OwnerBlock::SIGNATURE_OFFSET]).to_vec(),
+    ];
+
+    let CertificateExtension::DiceTcbInfo(dice) = &cdi0.private_extensions[0];
+    log::info!("Checking CDI_0 (ROM_EXT) DICE certificate: {cdi0:#?}");
+    // Check that the subject key and subject key identifiers match.
+    log::info!("Subject key:");
+    assert!(check_public_key(
+        &cdi0.subject_public_key_info,
+        cdi0.subject_key_identifier.get_value(),
+        &cdi0.subject,
+    )?);
+    assert_eq!(dice.model.get_value(), "ROM_EXT");
+    assert_eq!(dice.vendor.get_value(), "OpenTitan");
+    assert_eq!(dice.layer.get_value(), &BigUint::from(1u8));
+    let fw_ids = dice.fw_ids.as_ref().expect("list of fw_ids");
+    assert_eq!(fw_ids.len(), 1);
+    assert_eq!(fw_ids[0].digest.get_value(), &measurements[0].as_ref());
+
+    let CertificateExtension::DiceTcbInfo(dice) = &cdi1.private_extensions[0];
+    log::info!("Checking CDI_1 (Owner) DICE certificate: {cdi1:#?}");
+    // Check that the subject key and subject key identifiers match.
+    log::info!("Subject key:");
+    assert!(check_public_key(
+        &cdi1.subject_public_key_info,
+        cdi1.subject_key_identifier.get_value(),
+        &cdi1.subject,
+    )?);
+    // Check that the authority key identifier of CDI_1 is the subject key of CDI_0.
+    log::info!("Issuer key:");
+    assert!(check_public_key(
+        &cdi0.subject_public_key_info,
+        cdi1.authority_key_identifier.get_value(),
+        &cdi1.issuer,
+    )?);
+    assert_eq!(dice.model.get_value(), "Owner");
+    assert_eq!(dice.vendor.get_value(), "OpenTitan");
+    assert_eq!(dice.layer.get_value(), &BigUint::from(2u8));
+    let fw_ids = dice.fw_ids.as_ref().expect("list of fw_ids");
+    assert_eq!(fw_ids.len(), 3);
+    assert_eq!(fw_ids[0].digest.get_value(), &measurements[1].as_ref());
+    assert_eq!(fw_ids[1].digest.get_value(), &owner_measurements[0]);
+    assert_eq!(fw_ids[2].digest.get_value(), &owner_history);
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    // If there haven't been any ownership transfers, the owner history will be all ones.
+    attestation_test(&opts, &transport, &[255u8; 32])?;
+    Ok(())
+}
diff --git a/sw/host/tests/chip/flash_ctrl/src/main.rs b/sw/host/tests/chip/flash_ctrl/src/main.rs
index 81669f8a86923..dffa425bae9b4 100644
--- a/sw/host/tests/chip/flash_ctrl/src/main.rs
+++ b/sw/host/tests/chip/flash_ctrl/src/main.rs
@@ -15,7 +15,7 @@ use std::path::PathBuf;
 use std::time::Duration;
 
 use object::{Object, ObjectSymbol};
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -74,7 +74,7 @@ fn test_sram_load(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         .context("failed to apply ROM_BOOTSTRAP strapping")?;
 
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
@@ -114,7 +114,7 @@ fn test_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result
         .context("failed to apply PINMUX_TAP_LC strapping")?;
 
     transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
+        .reset(UartRx::Clear)
         .context("failed to reset target")?;
 
     log::info!("Connecting to JTAG interface");
@@ -149,7 +149,6 @@ fn test_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result
         DifLcCtrlState::Rma,
         Some(rma_unlock_token.into_register_values()),
         /*use_external_clk=*/ false,
-        opts.init.bootstrap.options.reset_delay,
         Some(JtagTap::LcTap),
     )
     .expect("failed to trigger transition to rma");
diff --git a/sw/host/tests/chip/gpio/BUILD b/sw/host/tests/chip/gpio/BUILD
index 53eec94fbda7f..d6829c5242624 100644
--- a/sw/host/tests/chip/gpio/BUILD
+++ b/sw/host/tests/chip/gpio/BUILD
@@ -7,9 +7,25 @@ load("@rules_rust//rust:defs.bzl", "rust_binary")
 package(default_visibility = ["//visibility:public"])
 
 rust_binary(
-    name = "gpio",
+    name = "gpio_pinmux",
     srcs = [
-        "src/main.rs",
+        "src/gpio_pinmux.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:once_cell",
+        "@crate_index//:serde_json",
+    ],
+)
+
+rust_binary(
+    name = "gpio_intr",
+    srcs = [
+        "src/gpio_intr.rs",
     ],
     deps = [
         "//sw/host/opentitanlib",
@@ -53,3 +69,19 @@ rust_binary(
         "@crate_index//:serde_json",
     ],
 )
+
+rust_binary(
+    name = "sleep_pin_wake",
+    srcs = [
+        "src/sleep_pin_wake.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+        "@crate_index//:rand",
+    ],
+)
diff --git a/sw/host/tests/chip/gpio/src/gpio_intr.rs b/sw/host/tests/chip/gpio/src/gpio_intr.rs
new file mode 100644
index 0000000000000..9b289adcb5c57
--- /dev/null
+++ b/sw/host/tests/chip/gpio/src/gpio_intr.rs
@@ -0,0 +1,385 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::Parser;
+use once_cell::sync::Lazy;
+use std::collections::HashMap;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::io::gpio::PinMode;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::gpio::{GpioGet, GpioSet};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::pinmux_config::PinmuxConfig;
+use opentitanlib::uart::console::UartConsole;
+use opentitanlib::{collection, execute_test};
+
+use opentitanlib::chip::autogen::earlgrey::{
+    PinmuxInsel, PinmuxMioOut, PinmuxOutsel, PinmuxPeripheralIn,
+};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
+    timeout: Duration,
+}
+
+struct Config {
+    input: HashMap<PinmuxPeripheralIn, PinmuxInsel>,
+    output: HashMap<PinmuxMioOut, PinmuxOutsel>,
+}
+
+static CONFIG: Lazy<HashMap<&'static str, Config>> = Lazy::new(|| {
+    collection! {
+         // from:https://github.com/lowRISC/opentitan/
+         // blob/master/hw/top_earlgrey/data/pins_cw310_hyperdebug.xdc
+        "hyper310" => Config {
+            input: collection! {
+                // The commented lines represent multi-fuction pins.  These will
+                // be added back in when the hyperdebug firmware can set these
+                // multifunction pins into GPIO mode.
+                // ioc0~2: sw strap0~2
+                // ioc5: tap strap1
+                // ioc6: pwm ext)_clk
+                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
+                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
+                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
+
+                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
+                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
+                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
+                // IOR8-9 aren't MIOs.
+                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
+                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
+                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
+                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
+
+            },
+            output: collection! {
+                // The commented lines represent multi-fuction pins.  These will
+                // be added back in when the hyperdebug firmware can set these
+                // multifunction pins into GPIO mode.
+                // ioc0~2: sw strap0~2
+                // ioc5: tap strap1
+                // ioc6: pwm ext)_clk
+                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
+                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
+                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
+
+                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
+                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
+                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
+                // IOR8-9 aren't MIOs.
+                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
+                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
+                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
+                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
+            },
+        },
+        // Replication of the hyper310 config.
+        "teacup" => Config {
+            input: collection! {
+                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
+                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
+                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
+
+                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
+                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
+                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
+
+                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
+                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
+                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
+                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
+            },
+            output: collection! {
+                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
+                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
+                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
+
+                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
+                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
+                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
+
+                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
+                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
+                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
+                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
+            },
+        },
+    }
+});
+
+fn gpio_write(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    value: u32,
+    config: &HashMap<PinmuxMioOut, PinmuxOutsel>,
+    invert: u8,
+) -> Result<()> {
+    let mask = config.values().fold(0, |acc, v| {
+        let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
+        acc | 1u32 << i
+    });
+    let masked_value = value & mask;
+
+    log::info!(
+        "write & verify pattern: {:08x} & {:08x} -> {:08x}",
+        value,
+        mask,
+        masked_value
+    );
+    if masked_value == 0 {
+        log::info!(
+            "skipping: {:08x} has no bits in common with the pinmux configuration",
+            value
+        );
+    } else {
+        // invert == 1: use for walking 0
+        // invert == 0: use for walking 1
+        let write_val = if invert == 1 {
+            !masked_value
+        } else {
+            masked_value
+        };
+        GpioSet::write_all(uart, write_val)?;
+        let mut result = 0u32;
+        for (k, v) in config.iter() {
+            let n = u32::from(transport.gpio_pin(&k.to_string())?.read()?);
+            let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
+            result |= n << i;
+        }
+        if invert == 1 {
+            assert_eq!(write_val & mask, result);
+        } else {
+            assert_eq!(write_val, result);
+        }
+        std::thread::sleep(Duration::from_millis(100));
+    }
+    Ok(())
+}
+
+fn gpio_read(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    value: u32,
+    config: &HashMap<PinmuxPeripheralIn, PinmuxInsel>,
+    invert: u32,
+) -> Result<()> {
+    let mask = if invert == 1 {
+        // all 1 for target pins.
+        GpioGet::read_all(uart)?
+    } else {
+        config.keys().fold(0, |acc, k| {
+            let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
+            acc | 1u32 << i
+        })
+    };
+    let masked_value = value & mask;
+    log::info!(
+        "read & verify pattern: {:08x} & {:08x} -> {:08x}",
+        value,
+        mask,
+        masked_value
+    );
+    if masked_value == 0 {
+        log::info!(
+            "skipping: {:08x} has no bits in common with the pinmux configuration",
+            value
+        );
+    } else {
+        for (k, v) in config.iter() {
+            let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
+            transport
+                .gpio_pin(&v.to_string())?
+                .write(((masked_value >> i) & 1) != invert)?;
+        }
+        // issue dummy read to make sure write complete.
+        let _ = GpioGet::read_all(uart)?;
+        std::thread::sleep(Duration::from_millis(100));
+    }
+    Ok(())
+}
+
+fn test_gpio_outputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    log::info!(
+        "Configuring pinmux for {:?}",
+        opts.init.backend_opts.interface
+    );
+    let config = CONFIG
+        .get(opts.init.backend_opts.interface.as_str())
+        .expect("interface");
+    PinmuxConfig::configure(&*uart, Some(&config.input), Some(&config.output), None)?;
+
+    log::info!("Configuring debugger GPIOs as inputs");
+    // The outputs (with respect to pinmux config) correspond to the input pins on the debug board.
+    for pin in config.output.keys() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::Input)?;
+    }
+
+    log::info!("Enabling outputs on the DUT");
+    GpioSet::set_input_noise_filter(&*uart, u32::MAX, 1)?;
+    GpioSet::set_enabled_all(&*uart, u32::MAX)?;
+
+    // Output level high test
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "high".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+    log::info!("test: output level high test");
+
+    // Walking 1
+    for i in 16..30 {
+        gpio_write(transport, &*uart, 1 << i, &config.output, 0)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Output Rising Edge test
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "rising".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+
+    log::info!("test: output rising edge test");
+
+    // Walking 1
+    for i in 16..30 {
+        gpio_write(transport, &*uart, 1 << i, &config.output, 0)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Output level low test
+    log::info!("test: output level low test");
+    GpioSet::write_all(&*uart, u32::MAX)?;
+
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "low".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, 0x1E7E_0000)?;
+    // Walking 0
+    for i in 0..32 {
+        gpio_write(transport, &*uart, 1 << i, &config.output, 1)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Output Falling Edge test
+    log::info!("test: output falling edge test");
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "falling".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+    GpioSet::write_all(&*uart, u32::MAX)?;
+
+    // Walking 0
+    for i in 0..32 {
+        gpio_write(transport, &*uart, 1 << i, &config.output, 1)?;
+    }
+    Ok(())
+}
+
+fn test_gpio_inputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    log::info!(
+        "Configuring pinmux for {:?}",
+        opts.init.backend_opts.interface
+    );
+    let config = CONFIG
+        .get(opts.init.backend_opts.interface.as_str())
+        .expect("interface");
+    PinmuxConfig::configure(&*uart, Some(&config.input), None, None)?;
+
+    log::info!("Configuring debugger GPIOs as outputs");
+    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
+    for pin in config.input.values() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::PushPull)?;
+    }
+
+    log::info!("Disabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0x0)?;
+    GpioSet::set_input_noise_filter(&*uart, u32::MAX, 1)?;
+
+    // Initialize pins to 0
+    for pin in config.input.values() {
+        transport.gpio_pin(&pin.to_string())?.write(false)?;
+    }
+
+    // Input level high test
+    log::info!("test: input level high test");
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "high".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+    // Walking 1
+    for i in 16..30 {
+        gpio_read(transport, &*uart, 1 << i, &config.input, 0)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Initialize pins to 0
+    for pin in config.input.values() {
+        transport.gpio_pin(&pin.to_string())?.write(false)?;
+    }
+    // Input Rising Edge test
+    log::info!("test: input rising edge test");
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "rising".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+    // Walking 1
+    for i in 16..30 {
+        gpio_read(transport, &*uart, 1 << i, &config.input, 0)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Initialize pins to 1
+    for pin in config.input.values() {
+        transport.gpio_pin(&pin.to_string())?.write(true)?;
+    }
+
+    // Input level low test
+    log::info!("test: input level low test");
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "low".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, 0x1E7E_0000)?;
+    // Walking 0
+    for i in 16..30 {
+        gpio_read(transport, &*uart, 1 << i, &config.input, 1)?;
+    }
+    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
+
+    // Initialize pins to 1
+    for pin in config.input.values() {
+        transport.gpio_pin(&pin.to_string())?.write(true)?;
+    }
+    // Input Falling Edge test
+    log::info!("test: input falling edge test");
+    GpioSet::irq_set_trigger(&*uart, u32::MAX, "falling".into())?;
+    GpioSet::irq_acknowledge_all(&*uart)?;
+    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
+
+    // Walking 0
+    for i in 16..30 {
+        gpio_read(transport, &*uart, 1 << i, &config.input, 1)?;
+    }
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"gpio_intr_test [^\r\n]*", opts.timeout)?;
+
+    execute_test!(test_gpio_inputs, &opts, &transport);
+    execute_test!(test_gpio_outputs, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/chip/gpio/src/gpio_pinmux.rs b/sw/host/tests/chip/gpio/src/gpio_pinmux.rs
new file mode 100644
index 0000000000000..47ec14747aac7
--- /dev/null
+++ b/sw/host/tests/chip/gpio/src/gpio_pinmux.rs
@@ -0,0 +1,418 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::collections::HashMap;
+use std::iter;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::Result;
+use clap::Parser;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::dif::pinmux::PinmuxPadAttr;
+use opentitanlib::execute_test;
+use opentitanlib::io::gpio::{PinMode, PullMode};
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::gpio::{GpioGet, GpioSet};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::pinmux_config::PinmuxConfig;
+use opentitanlib::uart::console::UartConsole;
+
+use opentitanlib::chip::autogen::earlgrey::{
+    PinmuxInsel, PinmuxMioOut, PinmuxOutsel, PinmuxPeripheralIn,
+};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
+    timeout: Duration,
+}
+
+struct Config {
+    input: HashMap<PinmuxPeripheralIn, PinmuxInsel>,
+    output: HashMap<PinmuxMioOut, PinmuxOutsel>,
+}
+
+static GPIOS: [(PinmuxPeripheralIn, PinmuxOutsel); 32] = [
+    (PinmuxPeripheralIn::GpioGpio0, PinmuxOutsel::GpioGpio0),
+    (PinmuxPeripheralIn::GpioGpio1, PinmuxOutsel::GpioGpio1),
+    (PinmuxPeripheralIn::GpioGpio2, PinmuxOutsel::GpioGpio2),
+    (PinmuxPeripheralIn::GpioGpio3, PinmuxOutsel::GpioGpio3),
+    (PinmuxPeripheralIn::GpioGpio4, PinmuxOutsel::GpioGpio4),
+    (PinmuxPeripheralIn::GpioGpio5, PinmuxOutsel::GpioGpio5),
+    (PinmuxPeripheralIn::GpioGpio6, PinmuxOutsel::GpioGpio6),
+    (PinmuxPeripheralIn::GpioGpio7, PinmuxOutsel::GpioGpio7),
+    (PinmuxPeripheralIn::GpioGpio8, PinmuxOutsel::GpioGpio8),
+    (PinmuxPeripheralIn::GpioGpio9, PinmuxOutsel::GpioGpio9),
+    (PinmuxPeripheralIn::GpioGpio10, PinmuxOutsel::GpioGpio10),
+    (PinmuxPeripheralIn::GpioGpio11, PinmuxOutsel::GpioGpio11),
+    (PinmuxPeripheralIn::GpioGpio12, PinmuxOutsel::GpioGpio12),
+    (PinmuxPeripheralIn::GpioGpio13, PinmuxOutsel::GpioGpio13),
+    (PinmuxPeripheralIn::GpioGpio14, PinmuxOutsel::GpioGpio14),
+    (PinmuxPeripheralIn::GpioGpio15, PinmuxOutsel::GpioGpio15),
+    (PinmuxPeripheralIn::GpioGpio16, PinmuxOutsel::GpioGpio16),
+    (PinmuxPeripheralIn::GpioGpio17, PinmuxOutsel::GpioGpio17),
+    (PinmuxPeripheralIn::GpioGpio18, PinmuxOutsel::GpioGpio18),
+    (PinmuxPeripheralIn::GpioGpio19, PinmuxOutsel::GpioGpio19),
+    (PinmuxPeripheralIn::GpioGpio20, PinmuxOutsel::GpioGpio20),
+    (PinmuxPeripheralIn::GpioGpio21, PinmuxOutsel::GpioGpio21),
+    (PinmuxPeripheralIn::GpioGpio22, PinmuxOutsel::GpioGpio22),
+    (PinmuxPeripheralIn::GpioGpio23, PinmuxOutsel::GpioGpio23),
+    (PinmuxPeripheralIn::GpioGpio24, PinmuxOutsel::GpioGpio24),
+    (PinmuxPeripheralIn::GpioGpio25, PinmuxOutsel::GpioGpio25),
+    (PinmuxPeripheralIn::GpioGpio26, PinmuxOutsel::GpioGpio26),
+    (PinmuxPeripheralIn::GpioGpio27, PinmuxOutsel::GpioGpio27),
+    (PinmuxPeripheralIn::GpioGpio28, PinmuxOutsel::GpioGpio28),
+    (PinmuxPeripheralIn::GpioGpio29, PinmuxOutsel::GpioGpio29),
+    (PinmuxPeripheralIn::GpioGpio30, PinmuxOutsel::GpioGpio30),
+    (PinmuxPeripheralIn::GpioGpio31, PinmuxOutsel::GpioGpio31),
+];
+
+static SUPPORTS_OD: [PinmuxMioOut; 14] = [
+    PinmuxMioOut::Ioa6,
+    PinmuxMioOut::Ioa7,
+    PinmuxMioOut::Ioa8,
+    PinmuxMioOut::Iob9,
+    PinmuxMioOut::Iob10,
+    PinmuxMioOut::Iob11,
+    PinmuxMioOut::Iob12,
+    PinmuxMioOut::Ioc10,
+    PinmuxMioOut::Ioc11,
+    PinmuxMioOut::Ioc12,
+    PinmuxMioOut::Ior10,
+    PinmuxMioOut::Ior11,
+    PinmuxMioOut::Ior12,
+    PinmuxMioOut::Ior13,
+];
+
+static SUPPORTS_VIRT_OD: [PinmuxMioOut; 33] = [
+    PinmuxMioOut::Ioa0,
+    PinmuxMioOut::Ioa1,
+    PinmuxMioOut::Ioa2,
+    PinmuxMioOut::Ioa3,
+    PinmuxMioOut::Ioa4,
+    PinmuxMioOut::Ioa5,
+    PinmuxMioOut::Iob0,
+    PinmuxMioOut::Iob1,
+    PinmuxMioOut::Iob2,
+    PinmuxMioOut::Iob3,
+    PinmuxMioOut::Iob4,
+    PinmuxMioOut::Iob5,
+    PinmuxMioOut::Iob6,
+    PinmuxMioOut::Iob7,
+    PinmuxMioOut::Iob8,
+    PinmuxMioOut::Ioc0,
+    PinmuxMioOut::Ioc1,
+    PinmuxMioOut::Ioc2,
+    PinmuxMioOut::Ioc3,
+    PinmuxMioOut::Ioc4,
+    PinmuxMioOut::Ioc5,
+    PinmuxMioOut::Ioc6,
+    PinmuxMioOut::Ioc7,
+    PinmuxMioOut::Ioc8,
+    PinmuxMioOut::Ioc9,
+    PinmuxMioOut::Ior0,
+    PinmuxMioOut::Ior1,
+    PinmuxMioOut::Ior2,
+    PinmuxMioOut::Ior3,
+    PinmuxMioOut::Ior4,
+    PinmuxMioOut::Ior5,
+    PinmuxMioOut::Ior6,
+    PinmuxMioOut::Ior7,
+];
+
+fn write_all_verify(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    write: u32,
+    read: u32,
+    config: &HashMap<PinmuxMioOut, PinmuxOutsel>,
+) -> Result<()> {
+    let mask = config.values().fold(0, |acc, v| {
+        let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
+        acc | 1u32 << i
+    });
+
+    let (masked_write, masked_read) = (write & mask, read & mask);
+
+    log::info!(
+        "write & verify pattern {write:08x} with mask {mask:08x}: {masked_write:08x} -> {masked_read:08x}"
+    );
+
+    if masked_write == 0 {
+        log::info!(
+            "skipping: {masked_write:08x} has no bits in common with the pinmux configuration"
+        );
+        return Ok(());
+    }
+
+    GpioSet::write_all(uart, masked_write)?;
+
+    let mut result = 0u32;
+    for (k, v) in config.iter() {
+        let n = u32::from(transport.gpio_pin(&k.to_string())?.read()?);
+        let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
+        result |= n << i;
+    }
+
+    log::info!("result = {result:08x}");
+    assert_eq!(masked_read, result);
+
+    Ok(())
+}
+
+fn read_all_verify(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    write: u32,
+    read: u32,
+    config: &HashMap<PinmuxPeripheralIn, PinmuxInsel>,
+) -> Result<()> {
+    let mask = config.keys().fold(0, |acc, k| {
+        let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
+        acc | 1u32 << i
+    });
+
+    let (masked_write, masked_read) = (write & mask, read & mask);
+
+    log::info!(
+        "read & verify pattern with mask {mask:08x}: {masked_write:08x} -> {masked_read:08x}"
+    );
+
+    if masked_write == 0 {
+        log::info!(
+            "skipping: {masked_write:08x} has no bits in common with the pinmux configuration"
+        );
+        return Ok(());
+    }
+
+    for (k, v) in config.iter() {
+        let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
+        transport
+            .gpio_pin(&v.to_string())?
+            .write((masked_write >> i) & 1 != 0)?;
+    }
+
+    let result = GpioGet::read_all(uart)? & mask;
+    log::info!("result = {result:08x}");
+    assert_eq!(masked_read, result);
+
+    Ok(())
+}
+
+fn get_config(transport: &TransportWrapper) -> Config {
+    let gpio_pins = transport.gpios();
+    let pinmux_insels = gpio_pins
+        .iter()
+        .map(|pin| PinmuxInsel::from_str(pin).unwrap());
+    let pinmux_mio_outs = gpio_pins
+        .iter()
+        .map(|pin| PinmuxMioOut::from_str(pin).unwrap());
+    let gpio_inputs = GPIOS.iter().map(|(input, _)| *input);
+    let gpio_outputs = GPIOS.iter().map(|(_, output)| *output);
+
+    let input: HashMap<_, _> = iter::zip(gpio_inputs, pinmux_insels).collect();
+    let output: HashMap<_, _> = iter::zip(pinmux_mio_outs, gpio_outputs).collect();
+
+    Config { input, output }
+}
+
+fn test_gpio_outputs(transport: &TransportWrapper, config: &Config) -> Result<()> {
+    let uart = transport.uart("console")?;
+    PinmuxConfig::configure(&*uart, None, Some(&config.output), None)?;
+
+    log::info!("Configuring debugger GPIOs as inputs");
+    // The outputs (with respect to pinmux config) correspond to the input pins on the debug board.
+    for pin in config.output.keys() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::Input)?;
+    }
+
+    log::info!("Enabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0xFFFFFFFF)?;
+    write_all_verify(transport, &*uart, 0x5555_5555, 0x5555_5555, &config.output)?;
+    write_all_verify(transport, &*uart, 0xAAAA_AAAA, 0xAAAA_AAAA, &config.output)?;
+
+    for i in 0..32 {
+        write_all_verify(transport, &*uart, 1 << i, 1 << i, &config.output)?;
+    }
+
+    Ok(())
+}
+
+fn test_gpio_inputs(transport: &TransportWrapper, config: &Config) -> Result<()> {
+    let uart = transport.uart("console")?;
+
+    PinmuxConfig::configure(&*uart, Some(&config.input), None, None)?;
+
+    log::info!("Configuring debugger GPIOs as outputs");
+    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
+    for pin in config.input.values() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::PushPull)?;
+    }
+
+    log::info!("Disabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0x0)?;
+
+    read_all_verify(transport, &*uart, 0x5555_5555, 0x5555_5555, &config.input)?;
+    read_all_verify(transport, &*uart, 0xAAAA_AAAA, 0xAAAA_AAAA, &config.input)?;
+
+    for i in 0..32 {
+        read_all_verify(transport, &*uart, 1 << i, 1 << i, &config.input)?;
+    }
+    Ok(())
+}
+
+fn test_pad_inversion(transport: &TransportWrapper, config: &Config) -> Result<()> {
+    let uart = transport.uart("console")?;
+
+    let invert_all: HashMap<_, _> = config
+        .output
+        .keys()
+        .map(|&mio| (mio, PinmuxPadAttr::INVERT))
+        .collect();
+
+    log::info!("Configuring pads as inverted inputs");
+    PinmuxConfig::configure(&*uart, Some(&config.input), None, Some(&invert_all))?;
+
+    log::info!("Configuring debugger GPIOs as outputs");
+    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
+    for pin in config.input.values() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::PushPull)?;
+    }
+
+    log::info!("Disabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0x0)?;
+
+    log::info!("Testing inverted device inputs");
+    read_all_verify(transport, &*uart, 0x5555_5555, !0x5555_5555, &config.input)?;
+    read_all_verify(transport, &*uart, 0xAAAA_AAAA, !0xAAAA_AAAA, &config.input)?;
+
+    for i in 0..32 {
+        read_all_verify(transport, &*uart, 1 << i, !(1 << i), &config.input)?;
+    }
+
+    log::info!("Configuring pads as inverted outputs");
+    PinmuxConfig::configure(&*uart, None, Some(&config.output), Some(&invert_all))?;
+
+    log::info!("Configuring debugger GPIOs as inputs");
+    // The outputs (with respect to pinmux config) correspond to the input pins on the debug board.
+    for pin in config.output.keys() {
+        transport
+            .gpio_pin(&pin.to_string())?
+            .set_mode(PinMode::Input)?;
+    }
+
+    log::info!("Enabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0xFFFFFFFF)?;
+
+    log::info!("Testing inverted device outputs");
+    write_all_verify(transport, &*uart, 0x5555_5555, !0x5555_5555, &config.output)?;
+    write_all_verify(transport, &*uart, 0xAAAA_AAAA, !0xAAAA_AAAA, &config.output)?;
+
+    for i in 0..32 {
+        write_all_verify(transport, &*uart, 1 << i, !(1 << i), &config.output)?;
+    }
+
+    Ok(())
+}
+
+/// Test opendrain feature of pads.
+///
+/// Both normal and virtual opendrain can be tested by passing a different set
+/// of pad filters and the correct pad attribute to apply.
+fn test_opendrain(
+    transport: &TransportWrapper,
+    config: &Config,
+    pad_filter: &[PinmuxMioOut],
+    pad_attr: PinmuxPadAttr,
+) -> Result<()> {
+    let uart = transport.uart("console")?;
+
+    log::info!("Configuring debugger GPIOs as pulled-up inputs");
+    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
+    let opendrain_inputs = config.input.values();
+    for pin in opendrain_inputs {
+        let pin = transport.gpio_pin(&pin.to_string())?;
+        pin.set(Some(PinMode::Input), None, Some(PullMode::PullUp), None)?;
+    }
+
+    // Filter pads to those supporting opendrain using the provided filter.
+    let opendrain_outputs: HashMap<_, _> = config
+        .output
+        .clone()
+        .into_iter()
+        .filter(|&(mio, _)| pad_filter.iter().any(|&o| o == mio))
+        .collect();
+    let opendrain_attrs: HashMap<_, _> = opendrain_outputs
+        .keys()
+        .map(|&mio| (mio, pad_attr))
+        .collect();
+
+    log::info!("Configuring pads as opendrain outputs");
+    PinmuxConfig::configure(
+        &*uart,
+        None,
+        Some(&opendrain_outputs),
+        Some(&opendrain_attrs),
+    )?;
+
+    log::info!("Enabling outputs on the DUT");
+    GpioSet::set_enabled_all(&*uart, 0xFFFFFFFF)?;
+
+    log::info!("Testing opendrain device outputs");
+    for pattern in [0x5555_5555, 0xAAAA_AAAA] {
+        write_all_verify(transport, &*uart, pattern, pattern, &opendrain_outputs)?;
+    }
+    for i in 0..32 {
+        write_all_verify(transport, &*uart, 1 << i, 1 << i, &opendrain_outputs)?;
+    }
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let config = get_config(&transport);
+
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    execute_test!(test_gpio_outputs, &transport, &config);
+    execute_test!(test_gpio_inputs, &transport, &config);
+    execute_test!(test_pad_inversion, &transport, &config);
+    // Only silicon supports OpenDrain, FPGA does not.
+    if opts.init.backend_opts.interface == "teacup" {
+        execute_test!(
+            test_opendrain,
+            &transport,
+            &config,
+            &SUPPORTS_OD,
+            PinmuxPadAttr::OD_EN,
+        );
+    }
+    execute_test!(
+        test_opendrain,
+        &transport,
+        &config,
+        &SUPPORTS_VIRT_OD,
+        PinmuxPadAttr::VIRTUAL_OD_EN
+    );
+
+    Ok(())
+}
diff --git a/sw/host/tests/chip/gpio/src/main.rs b/sw/host/tests/chip/gpio/src/main.rs
deleted file mode 100644
index f9c9670265184..0000000000000
--- a/sw/host/tests/chip/gpio/src/main.rs
+++ /dev/null
@@ -1,373 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-use anyhow::Result;
-use clap::Parser;
-use once_cell::sync::Lazy;
-use std::collections::HashMap;
-use std::time::Duration;
-
-use opentitanlib::app::TransportWrapper;
-use opentitanlib::io::gpio::PinMode;
-use opentitanlib::io::uart::Uart;
-use opentitanlib::test_utils::gpio::{GpioGet, GpioSet};
-use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::pinmux_config::PinmuxConfig;
-use opentitanlib::uart::console::UartConsole;
-use opentitanlib::{collection, execute_test};
-
-use opentitanlib::chip::autogen::earlgrey::{
-    PinmuxInsel, PinmuxMioOut, PinmuxOutsel, PinmuxPeripheralIn,
-};
-
-#[derive(Debug, Parser)]
-struct Opts {
-    #[command(flatten)]
-    init: InitializeTest,
-
-    /// Console receive timeout.
-    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
-    timeout: Duration,
-}
-
-struct Config {
-    input: HashMap<PinmuxPeripheralIn, PinmuxInsel>,
-    output: HashMap<PinmuxMioOut, PinmuxOutsel>,
-}
-
-static CONFIG: Lazy<HashMap<&'static str, Config>> = Lazy::new(|| {
-    collection! {
-        "verilator" => Config {
-            input: collection! {
-                PinmuxPeripheralIn::GpioGpio0 => PinmuxInsel::Iob6,
-                PinmuxPeripheralIn::GpioGpio1 => PinmuxInsel::Iob7,
-                PinmuxPeripheralIn::GpioGpio2 => PinmuxInsel::Iob8,
-                PinmuxPeripheralIn::GpioGpio3 => PinmuxInsel::Iob9,
-                PinmuxPeripheralIn::GpioGpio4 => PinmuxInsel::Iob10,
-                PinmuxPeripheralIn::GpioGpio5 => PinmuxInsel::Iob11,
-                PinmuxPeripheralIn::GpioGpio6 => PinmuxInsel::Iob12,
-                PinmuxPeripheralIn::GpioGpio7 => PinmuxInsel::Ior5,
-                PinmuxPeripheralIn::GpioGpio8 => PinmuxInsel::Ior6,
-                PinmuxPeripheralIn::GpioGpio9 => PinmuxInsel::Ior7,
-                // IOR8-9 aren't MIOs.
-                PinmuxPeripheralIn::GpioGpio10 => PinmuxInsel::Ior10,
-                PinmuxPeripheralIn::GpioGpio11 => PinmuxInsel::Ior11,
-                PinmuxPeripheralIn::GpioGpio12 => PinmuxInsel::Ior12,
-                PinmuxPeripheralIn::GpioGpio13 => PinmuxInsel::Ior13,
-            },
-            output: collection! {
-                PinmuxMioOut::Iob6 => PinmuxOutsel::GpioGpio0,
-                PinmuxMioOut::Iob7 => PinmuxOutsel::GpioGpio1,
-                PinmuxMioOut::Iob8 => PinmuxOutsel::GpioGpio2,
-                PinmuxMioOut::Iob9 => PinmuxOutsel::GpioGpio3,
-                PinmuxMioOut::Iob10 => PinmuxOutsel::GpioGpio4,
-                PinmuxMioOut::Iob11 => PinmuxOutsel::GpioGpio5,
-                PinmuxMioOut::Iob12 => PinmuxOutsel::GpioGpio6,
-                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio7,
-                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio8,
-                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio9,
-                // IOR8-9 aren't MIOs.
-                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio10,
-                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio11,
-                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio12,
-                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio13,
-            },
-        },
-        "hyper310" => Config {
-            input: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-
-                //PinmuxPeripheralIn::GpioGpio0 => PinmuxInsel::Ioa0,   // UART4
-                //PinmuxPeripheralIn::GpioGpio1 => PinmuxInsel::Ioa1,   // UART4
-                PinmuxPeripheralIn::GpioGpio2 => PinmuxInsel::Ioa2,
-                PinmuxPeripheralIn::GpioGpio3 => PinmuxInsel::Ioa3,
-                //PinmuxPeripheralIn::GpioGpio4 => PinmuxInsel::Ioa4,   // UART5
-                //PinmuxPeripheralIn::GpioGpio5 => PinmuxInsel::Ioa5,   // UART5
-                PinmuxPeripheralIn::GpioGpio6 => PinmuxInsel::Ioa6,
-                //PinmuxPeripheralIn::GpioGpio7 => PinmuxInsel::Ioa7,   // I2C1
-                //PinmuxPeripheralIn::GpioGpio8 => PinmuxInsel::Ioa8,   // I2C1
-                //PinmuxPeripheralIn::GpioGpio9 => PinmuxInsel::Iob4,   // UART3
-                //PinmuxPeripheralIn::GpioGpio10 => PinmuxInsel::Iob5,  // UART3
-                PinmuxPeripheralIn::GpioGpio11 => PinmuxInsel::Iob6,
-
-                PinmuxPeripheralIn::GpioGpio12 => PinmuxInsel::Ioc0,
-                PinmuxPeripheralIn::GpioGpio13 => PinmuxInsel::Ioc1,
-                PinmuxPeripheralIn::GpioGpio14 => PinmuxInsel::Ioc2,
-
-                PinmuxPeripheralIn::GpioGpio15 => PinmuxInsel::Ioc5,
-                PinmuxPeripheralIn::GpioGpio16 => PinmuxInsel::Ioc6,
-                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
-                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
-                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
-
-                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
-                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
-                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
-                // IOR8-9 aren't MIOs.
-                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
-                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
-                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
-                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
-
-            },
-            output: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-
-                //PinmuxMioOut::Ioa0 => PinmuxOutsel::GpioGpio0,   // UART4
-                //PinmuxMioOut::Ioa1 => PinmuxOutsel::GpioGpio1,   // UART4
-                PinmuxMioOut::Ioa2 => PinmuxOutsel::GpioGpio2,
-                PinmuxMioOut::Ioa3 => PinmuxOutsel::GpioGpio3,
-                //PinmuxMioOut::Ioa4 => PinmuxOutsel::GpioGpio4,   // UART5
-                //PinmuxMioOut::Ioa5 => PinmuxOutsel::GpioGpio5,   // UART5
-                PinmuxMioOut::Ioa6 => PinmuxOutsel::GpioGpio6,
-                //PinmuxMioOut::Ioa7 => PinmuxOutsel::GpioGpio7,   // I2C1
-                //PinmuxMioOut::Ioa8 => PinmuxOutsel::GpioGpio8,   // I2C1
-                //PinmuxMioOut::Iob4 => PinmuxOutsel::GpioGpio9,   // UART3
-                //PinmuxMioOut::Iob5 => PinmuxOutsel::GpioGpio10,  // UART3
-                PinmuxMioOut::Iob6 => PinmuxOutsel::GpioGpio11,
-                PinmuxMioOut::Ioc0 => PinmuxOutsel::GpioGpio12,
-                PinmuxMioOut::Ioc1 => PinmuxOutsel::GpioGpio13,
-                PinmuxMioOut::Ioc2 => PinmuxOutsel::GpioGpio14,
-                PinmuxMioOut::Ioc5 => PinmuxOutsel::GpioGpio15,
-                PinmuxMioOut::Ioc6 => PinmuxOutsel::GpioGpio16,
-                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
-                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
-                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
-                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
-                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
-                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
-                // IOR8-9 aren't MIOs.
-                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
-                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
-                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
-                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
-            },
-        },
-        "teacup" => Config {
-            input: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-
-                //PinmuxPeripheralIn::GpioGpio0 => PinmuxInsel::Ioa0,   // UART4
-                //PinmuxPeripheralIn::GpioGpio1 => PinmuxInsel::Ioa1,   // UART4
-                //PinmuxPeripheralIn::GpioGpio2 => PinmuxInsel::Ioa2,   // VBUS_EN_SENSE
-                PinmuxPeripheralIn::GpioGpio3 => PinmuxInsel::Ioa3,
-                //PinmuxPeripheralIn::GpioGpio4 => PinmuxInsel::Ioa4,   // UART5
-                //PinmuxPeripheralIn::GpioGpio5 => PinmuxInsel::Ioa5,   // UART5
-                PinmuxPeripheralIn::GpioGpio6 => PinmuxInsel::Ioa6,
-                //PinmuxPeripheralIn::GpioGpio7 => PinmuxInsel::Ioa7,   // I2C1
-                //PinmuxPeripheralIn::GpioGpio8 => PinmuxInsel::Ioa8,   // I2C1
-                //PinmuxPeripheralIn::GpioGpio9 => PinmuxInsel::Iob4,   // UART3
-                //PinmuxPeripheralIn::GpioGpio10 => PinmuxInsel::Iob5,  // UART3
-                PinmuxPeripheralIn::GpioGpio11 => PinmuxInsel::Iob6,
-
-                PinmuxPeripheralIn::GpioGpio12 => PinmuxInsel::Ioc0,
-                PinmuxPeripheralIn::GpioGpio13 => PinmuxInsel::Ioc1,
-                PinmuxPeripheralIn::GpioGpio14 => PinmuxInsel::Ioc2,
-
-                PinmuxPeripheralIn::GpioGpio15 => PinmuxInsel::Ioc5,
-                PinmuxPeripheralIn::GpioGpio16 => PinmuxInsel::Ioc6,
-                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
-                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
-                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
-
-                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
-                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
-                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
-                // IOR8-9 aren't MIOs.
-                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
-                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
-                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
-                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
-
-            },
-            output: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-
-                //PinmuxMioOut::Ioa0 => PinmuxOutsel::GpioGpio0,   // UART4
-                //PinmuxMioOut::Ioa1 => PinmuxOutsel::GpioGpio1,   // UART4
-                //PinmuxMioOut::Ioa2 => PinmuxOutsel::GpioGpio2,   // VBUS_EN_SENSE
-                PinmuxMioOut::Ioa3 => PinmuxOutsel::GpioGpio3,
-                //PinmuxMioOut::Ioa4 => PinmuxOutsel::GpioGpio4,   // UART5
-                //PinmuxMioOut::Ioa5 => PinmuxOutsel::GpioGpio5,   // UART5
-                PinmuxMioOut::Ioa6 => PinmuxOutsel::GpioGpio6,
-                //PinmuxMioOut::Ioa7 => PinmuxOutsel::GpioGpio7,   // I2C1
-                //PinmuxMioOut::Ioa8 => PinmuxOutsel::GpioGpio8,   // I2C1
-                //PinmuxMioOut::Iob4 => PinmuxOutsel::GpioGpio9,   // UART3
-                //PinmuxMioOut::Iob5 => PinmuxOutsel::GpioGpio10,  // UART3
-                PinmuxMioOut::Iob6 => PinmuxOutsel::GpioGpio11,
-                PinmuxMioOut::Ioc0 => PinmuxOutsel::GpioGpio12,
-                PinmuxMioOut::Ioc1 => PinmuxOutsel::GpioGpio13,
-                PinmuxMioOut::Ioc2 => PinmuxOutsel::GpioGpio14,
-                PinmuxMioOut::Ioc5 => PinmuxOutsel::GpioGpio15,
-                PinmuxMioOut::Ioc6 => PinmuxOutsel::GpioGpio16,
-                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
-                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
-                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
-                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
-                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
-                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
-                // IOR8-9 aren't MIOs.
-                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
-                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
-                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
-                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
-            },
-        },
-    }
-});
-
-fn write_all_verify(
-    transport: &TransportWrapper,
-    uart: &dyn Uart,
-    value: u32,
-    config: &HashMap<PinmuxMioOut, PinmuxOutsel>,
-) -> Result<()> {
-    let mask = config.values().fold(0, |acc, v| {
-        let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
-        acc | 1u32 << i
-    });
-    let masked_value = value & mask;
-    log::info!(
-        "write & verify pattern: {:08x} & {:08x} -> {:08x}",
-        value,
-        mask,
-        masked_value
-    );
-    if masked_value == 0 {
-        log::info!(
-            "skipping: {:08x} has no bits in common with the pinmux configuration",
-            value
-        );
-    } else {
-        GpioSet::write_all(uart, masked_value)?;
-        let mut result = 0u32;
-        for (k, v) in config.iter() {
-            let n = u32::from(transport.gpio_pin(&k.to_string())?.read()?);
-            let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
-            result |= n << i;
-        }
-        log::info!("result = {:08x}", result);
-        assert_eq!(masked_value, result);
-    }
-    Ok(())
-}
-
-fn read_all_verify(
-    transport: &TransportWrapper,
-    uart: &dyn Uart,
-    value: u32,
-    config: &HashMap<PinmuxPeripheralIn, PinmuxInsel>,
-) -> Result<()> {
-    let mask = config.keys().fold(0, |acc, k| {
-        let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
-        acc | 1u32 << i
-    });
-    let masked_value = value & mask;
-    log::info!(
-        "read & verify pattern: {:08x} & {:08x} -> {:08x}",
-        value,
-        mask,
-        masked_value
-    );
-    if masked_value == 0 {
-        log::info!(
-            "skipping: {:08x} has no bits in common with the pinmux configuration",
-            value
-        );
-    } else {
-        for (k, v) in config.iter() {
-            let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
-            transport
-                .gpio_pin(&v.to_string())?
-                .write((masked_value >> i) & 1 != 0)?;
-        }
-        let result = GpioGet::read_all(uart)? & mask;
-        log::info!("result = {:08x}", result);
-        assert_eq!(masked_value, result);
-    }
-    Ok(())
-}
-
-fn test_gpio_outputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    log::info!(
-        "Configuring pinmux for {:?}",
-        opts.init.backend_opts.interface
-    );
-    let config = CONFIG
-        .get(opts.init.backend_opts.interface.as_str())
-        .expect("interface");
-    PinmuxConfig::configure(&*uart, None, Some(&config.output))?;
-
-    log::info!("Configuring debugger GPIOs as inputs");
-    // The outputs (with respect to pinmux config) correspond to the input pins on the debug board.
-    for pin in config.output.keys() {
-        transport
-            .gpio_pin(&pin.to_string())?
-            .set_mode(PinMode::Input)?;
-    }
-
-    log::info!("Enabling outputs on the DUT");
-    GpioSet::set_enabled_all(&*uart, 0xFFFFFFFF)?;
-    write_all_verify(transport, &*uart, 0x5555_5555, &config.output)?;
-    write_all_verify(transport, &*uart, 0xAAAA_AAAA, &config.output)?;
-
-    for i in 0..32 {
-        write_all_verify(transport, &*uart, 1 << i, &config.output)?;
-    }
-    Ok(())
-}
-
-fn test_gpio_inputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    log::info!(
-        "Configuring pinmux for {:?}",
-        opts.init.backend_opts.interface
-    );
-    let config = CONFIG
-        .get(opts.init.backend_opts.interface.as_str())
-        .expect("interface");
-    PinmuxConfig::configure(&*uart, Some(&config.input), None)?;
-
-    log::info!("Configuring debugger GPIOs as outputs");
-    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
-    for pin in config.input.values() {
-        transport
-            .gpio_pin(&pin.to_string())?
-            .set_mode(PinMode::PushPull)?;
-    }
-
-    log::info!("Disabling outputs on the DUT");
-    GpioSet::set_enabled_all(&*uart, 0x0)?;
-
-    read_all_verify(transport, &*uart, 0x5555_5555, &config.input)?;
-    read_all_verify(transport, &*uart, 0xAAAA_AAAA, &config.input)?;
-
-    for i in 0..32 {
-        read_all_verify(transport, &*uart, 1 << i, &config.input)?;
-    }
-    Ok(())
-}
-
-fn main() -> Result<()> {
-    let opts = Opts::parse();
-    opts.init.init_logging();
-    let transport = opts.init.init_target()?;
-
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
-
-    execute_test!(test_gpio_outputs, &opts, &transport);
-    execute_test!(test_gpio_inputs, &opts, &transport);
-    Ok(())
-}
diff --git a/sw/host/tests/chip/gpio/src/sleep_pin_mio_dio_val.rs b/sw/host/tests/chip/gpio/src/sleep_pin_mio_dio_val.rs
index 3d53e10bff785..a48f9536e5940 100644
--- a/sw/host/tests/chip/gpio/src/sleep_pin_mio_dio_val.rs
+++ b/sw/host/tests/chip/gpio/src/sleep_pin_mio_dio_val.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Parser;
 use std::time::Duration;
 
diff --git a/sw/host/tests/chip/gpio/src/sleep_pin_retention.rs b/sw/host/tests/chip/gpio/src/sleep_pin_retention.rs
index 16d8de26b06e9..fbf3c99082f30 100644
--- a/sw/host/tests/chip/gpio/src/sleep_pin_retention.rs
+++ b/sw/host/tests/chip/gpio/src/sleep_pin_retention.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Parser;
 use std::time::Duration;
 
diff --git a/sw/host/tests/chip/gpio/src/sleep_pin_wake.rs b/sw/host/tests/chip/gpio/src/sleep_pin_wake.rs
new file mode 100644
index 0000000000000..698d33b4db25d
--- /dev/null
+++ b/sw/host/tests/chip/gpio/src/sleep_pin_wake.rs
@@ -0,0 +1,176 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::Parser;
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::gpio::PinMode;
+use opentitanlib::test_utils;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::mem::MemWriteReq;
+use opentitanlib::uart::console::UartConsole;
+use rand::Rng;
+use std::fs;
+use std::path::PathBuf;
+use std::time::Duration;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
+    timeout: Duration,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+}
+
+struct Pad {
+    name: &'static str,
+    valid_cw310: bool,
+    valid_silicon: bool,
+}
+
+// Valid on CW310: IOR6/7, IOR10-13
+// Valid on Silicon: IOA6, IOB6, IOC9-12, IOR5-7, IOR10-13.
+#[rustfmt::skip]
+const MIO_PADS: &[Pad] = &[
+    Pad { name: "IOA0",  valid_cw310: false, valid_silicon: false },  // MIO Pad 0
+    Pad { name: "IOA1",  valid_cw310: false, valid_silicon: false },  // MIO Pad 1
+    Pad { name: "IOA2",  valid_cw310: false, valid_silicon: false },  // MIO Pad 2
+    Pad { name: "IOA3",  valid_cw310: false, valid_silicon: false },  // MIO Pad 3
+    Pad { name: "IOA4",  valid_cw310: false, valid_silicon: false },  // MIO Pad 4
+    Pad { name: "IOA5",  valid_cw310: false, valid_silicon: false },  // MIO Pad 5
+    Pad { name: "IOA6",  valid_cw310: false, valid_silicon: true },   // MIO Pad 6
+    Pad { name: "IOA7",  valid_cw310: false, valid_silicon: false },  // MIO Pad 7
+    Pad { name: "IOA8",  valid_cw310: false, valid_silicon: false },  // MIO Pad 8
+    Pad { name: "IOB0",  valid_cw310: false, valid_silicon: false },  // MIO Pad 9
+    Pad { name: "IOB1",  valid_cw310: false, valid_silicon: false },  // MIO Pad 10
+    Pad { name: "IOB2",  valid_cw310: false, valid_silicon: false },  // MIO Pad 11
+    Pad { name: "IOB3",  valid_cw310: false, valid_silicon: false },  // MIO Pad 12
+    Pad { name: "IOB4",  valid_cw310: false, valid_silicon: false },  // MIO Pad 13
+    Pad { name: "IOB5",  valid_cw310: false, valid_silicon: false },  // MIO Pad 14
+    Pad { name: "IOB6",  valid_cw310: false, valid_silicon: true },   // MIO Pad 15
+    Pad { name: "IOB7",  valid_cw310: false, valid_silicon: false },  // MIO Pad 16
+    Pad { name: "IOB8",  valid_cw310: false, valid_silicon: false },  // MIO Pad 17
+    Pad { name: "IOB9",  valid_cw310: false, valid_silicon: false },  // MIO Pad 18
+    Pad { name: "IOB10", valid_cw310: false, valid_silicon: false },  // MIO Pad 19
+    Pad { name: "IOB11", valid_cw310: false, valid_silicon: false },  // MIO Pad 20
+    Pad { name: "IOB12", valid_cw310: false, valid_silicon: false },  // MIO Pad 21
+    Pad { name: "IOC0",  valid_cw310: false, valid_silicon: false },  // MIO Pad 22
+    Pad { name: "IOC1",  valid_cw310: false, valid_silicon: false },  // MIO Pad 23
+    Pad { name: "IOC2",  valid_cw310: false, valid_silicon: false },  // MIO Pad 24
+    Pad { name: "IOC3",  valid_cw310: false, valid_silicon: false },  // MIO Pad 25
+    Pad { name: "IOC4",  valid_cw310: false, valid_silicon: false },  // MIO Pad 26
+    Pad { name: "IOC5",  valid_cw310: false, valid_silicon: false },  // MIO Pad 27
+    Pad { name: "IOC6",  valid_cw310: false, valid_silicon: false },  // MIO Pad 28
+    Pad { name: "IOC7",  valid_cw310: false, valid_silicon: false },  // MIO Pad 29
+    Pad { name: "IOC8",  valid_cw310: false, valid_silicon: false },  // MIO Pad 30
+    Pad { name: "IOC9",  valid_cw310: false, valid_silicon: true },   // MIO Pad 31
+    Pad { name: "IOC10", valid_cw310: false, valid_silicon: true },   // MIO Pad 32
+    Pad { name: "IOC11", valid_cw310: false, valid_silicon: true },   // MIO Pad 33
+    Pad { name: "IOC12", valid_cw310: false, valid_silicon: true },   // MIO Pad 34
+    Pad { name: "IOR0",  valid_cw310: false, valid_silicon: false },  // MIO Pad 35
+    Pad { name: "IOR1",  valid_cw310: false, valid_silicon: false },  // MIO Pad 36
+    Pad { name: "IOR2",  valid_cw310: false, valid_silicon: false },  // MIO Pad 37
+    Pad { name: "IOR3",  valid_cw310: false, valid_silicon: false },  // MIO Pad 38
+    Pad { name: "IOR4",  valid_cw310: false, valid_silicon: false },  // MIO Pad 39
+    Pad { name: "IOR5",  valid_cw310: false, valid_silicon: true },   // MIO Pad 40
+    Pad { name: "IOR6",  valid_cw310: true,  valid_silicon: true },   // MIO Pad 41
+    Pad { name: "IOR7",  valid_cw310: true,  valid_silicon: true },   // MIO Pad 42
+    Pad { name: "IOR10", valid_cw310: true,  valid_silicon: true },   // MIO Pad 43
+    Pad { name: "IOR11", valid_cw310: true,  valid_silicon: true },   // MIO Pad 44
+    Pad { name: "IOR12", valid_cw310: true,  valid_silicon: true },   // MIO Pad 45
+    Pad { name: "IOR13", valid_cw310: true,  valid_silicon: true },   // MIO Pad 46
+];
+
+fn is_valid_pad(pad: &Pad, interface: &str) -> bool {
+    match interface {
+        "hyper310" => pad.valid_cw310,
+        "teacup" => pad.valid_silicon,
+        _ => false,
+    }
+}
+
+fn sleep_pin_wake_test(
+    opts: &Opts,
+    transport: &TransportWrapper,
+    sival_mio_pad_addr: u32,
+    sival_wakeup_detector_idx_addr: u32,
+    sival_ready_to_sleep_addr: u32,
+) -> Result<()> {
+    let interface = opts.init.backend_opts.interface.as_str();
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+
+    log::info!("Starting host side");
+
+    let detector_match =
+        UartConsole::wait_for(&*uart, r"detector (\d+) is selected", opts.timeout)?;
+    let detector: usize = detector_match[1].parse()?;
+
+    UartConsole::wait_for(&*uart, "SiVal: waiting for commands", opts.timeout)?;
+
+    let num_valid_pads = MIO_PADS
+        .iter()
+        .filter(|&x| is_valid_pad(x, interface))
+        .count();
+    let rand_valid_pad_index = rand::thread_rng().gen_range(0..num_valid_pads);
+    let rand_pad_index = MIO_PADS
+        .iter()
+        .enumerate()
+        .filter(|(_, x)| is_valid_pad(x, interface))
+        .nth(rand_valid_pad_index)
+        .map(|(i, _)| i)
+        .unwrap();
+
+    MemWriteReq::execute(&*uart, sival_mio_pad_addr, &[rand_pad_index as u8])?;
+
+    let pad_sel_match =
+        UartConsole::wait_for(&*uart, r"Pad Selection: (\d) / (\d+)\r\n", opts.timeout)?;
+    let pad_sel: usize = pad_sel_match[2].parse()?;
+    let wake_pin = transport.gpio_pin(MIO_PADS[pad_sel].name)?;
+
+    wake_pin.set_mode(PinMode::PushPull)?;
+    wake_pin.write(false)?; // Don't wake up yet.
+    MemWriteReq::execute(&*uart, sival_ready_to_sleep_addr, &[1])?;
+    UartConsole::wait_for(&*uart, "Entering low power mode.", opts.timeout)?;
+    wake_pin.write(true)?;
+    UartConsole::wait_for(&*uart, "Test in post-sleep pin wakeup phase", opts.timeout)?;
+
+    // After the device wakes up from a (possibly deep) sleep, remind it of
+    // what wakeup detector it had chosen (and told us about earlier).
+    MemWriteReq::execute(&*uart, sival_wakeup_detector_idx_addr, &[detector as u8])?;
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let elf_file = object::File::parse(&*elf_binary)?;
+
+    let sival_mio_pad_addr = test_utils::object::symbol_addr(&elf_file, "sival_mio_pad")?;
+    let sival_wakeup_detector_idx_addr =
+        test_utils::object::symbol_addr(&elf_file, "sival_wakeup_detector_idx")?;
+    let sival_ready_to_sleep_addr =
+        test_utils::object::symbol_addr(&elf_file, "sival_ready_to_sleep")?;
+
+    execute_test!(
+        sleep_pin_wake_test,
+        &opts,
+        &transport,
+        sival_mio_pad_addr,
+        sival_wakeup_detector_idx_addr,
+        sival_ready_to_sleep_addr,
+    );
+    Ok(())
+}
diff --git a/sw/host/tests/chip/gpio_intr/BUILD b/sw/host/tests/chip/gpio_intr/BUILD
deleted file mode 100644
index 35c73fcf59c03..0000000000000
--- a/sw/host/tests/chip/gpio_intr/BUILD
+++ /dev/null
@@ -1,23 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@rules_rust//rust:defs.bzl", "rust_binary")
-
-package(default_visibility = ["//visibility:public"])
-
-rust_binary(
-    name = "gpio_intr",
-    srcs = [
-        "src/main.rs",
-    ],
-    deps = [
-        "//sw/host/opentitanlib",
-        "@crate_index//:anyhow",
-        "@crate_index//:clap",
-        "@crate_index//:humantime",
-        "@crate_index//:log",
-        "@crate_index//:once_cell",
-        "@crate_index//:serde_json",
-    ],
-)
diff --git a/sw/host/tests/chip/gpio_intr/src/main.rs b/sw/host/tests/chip/gpio_intr/src/main.rs
deleted file mode 100644
index 0b88ac23e9e8d..0000000000000
--- a/sw/host/tests/chip/gpio_intr/src/main.rs
+++ /dev/null
@@ -1,385 +0,0 @@
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-
-use anyhow::Result;
-use clap::Parser;
-use once_cell::sync::Lazy;
-use std::collections::HashMap;
-use std::time::Duration;
-
-use opentitanlib::app::TransportWrapper;
-use opentitanlib::io::gpio::PinMode;
-use opentitanlib::io::uart::Uart;
-use opentitanlib::test_utils::gpio::{GpioGet, GpioSet};
-use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::pinmux_config::PinmuxConfig;
-use opentitanlib::uart::console::UartConsole;
-use opentitanlib::{collection, execute_test};
-
-use opentitanlib::chip::autogen::earlgrey::{
-    PinmuxInsel, PinmuxMioOut, PinmuxOutsel, PinmuxPeripheralIn,
-};
-
-#[derive(Debug, Parser)]
-struct Opts {
-    #[command(flatten)]
-    init: InitializeTest,
-
-    /// Console receive timeout.
-    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
-    timeout: Duration,
-}
-
-struct Config {
-    input: HashMap<PinmuxPeripheralIn, PinmuxInsel>,
-    output: HashMap<PinmuxMioOut, PinmuxOutsel>,
-}
-
-static CONFIG: Lazy<HashMap<&'static str, Config>> = Lazy::new(|| {
-    collection! {
-         // from:https://github.com/lowRISC/opentitan/
-         // blob/master/hw/top_earlgrey/data/pins_cw310_hyperdebug.xdc
-        "hyper310" => Config {
-            input: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-                // ioc0~2: sw strap0~2
-                // ioc5: tap strap1
-                // ioc6: pwm ext)_clk
-                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
-                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
-                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
-
-                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
-                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
-                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
-                // IOR8-9 aren't MIOs.
-                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
-                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
-                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
-                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
-
-            },
-            output: collection! {
-                // The commented lines represent multi-fuction pins.  These will
-                // be added back in when the hyperdebug firmware can set these
-                // multifunction pins into GPIO mode.
-                // ioc0~2: sw strap0~2
-                // ioc5: tap strap1
-                // ioc6: pwm ext)_clk
-                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
-                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
-                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
-
-                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
-                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
-                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
-                // IOR8-9 aren't MIOs.
-                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
-                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
-                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
-                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
-            },
-        },
-        // Replication of the hyper310 config.
-        "teacup" => Config {
-            input: collection! {
-                PinmuxPeripheralIn::GpioGpio17 => PinmuxInsel::Ioc10,
-                PinmuxPeripheralIn::GpioGpio18 => PinmuxInsel::Ioc11,
-                PinmuxPeripheralIn::GpioGpio19 => PinmuxInsel::Ioc12,
-
-                PinmuxPeripheralIn::GpioGpio20 => PinmuxInsel::Ior5,
-                PinmuxPeripheralIn::GpioGpio21 => PinmuxInsel::Ior6,
-                PinmuxPeripheralIn::GpioGpio22 => PinmuxInsel::Ior7,
-
-                PinmuxPeripheralIn::GpioGpio25 => PinmuxInsel::Ior10,
-                PinmuxPeripheralIn::GpioGpio26 => PinmuxInsel::Ior11,
-                PinmuxPeripheralIn::GpioGpio27 => PinmuxInsel::Ior12,
-                PinmuxPeripheralIn::GpioGpio28 => PinmuxInsel::Ior13,
-            },
-            output: collection! {
-                PinmuxMioOut::Ioc10 => PinmuxOutsel::GpioGpio17,
-                PinmuxMioOut::Ioc11 => PinmuxOutsel::GpioGpio18,
-                PinmuxMioOut::Ioc12 => PinmuxOutsel::GpioGpio19,
-
-                PinmuxMioOut::Ior5 => PinmuxOutsel::GpioGpio20,
-                PinmuxMioOut::Ior6 => PinmuxOutsel::GpioGpio21,
-                PinmuxMioOut::Ior7 => PinmuxOutsel::GpioGpio22,
-
-                PinmuxMioOut::Ior10 => PinmuxOutsel::GpioGpio25,
-                PinmuxMioOut::Ior11 => PinmuxOutsel::GpioGpio26,
-                PinmuxMioOut::Ior12 => PinmuxOutsel::GpioGpio27,
-                PinmuxMioOut::Ior13 => PinmuxOutsel::GpioGpio28,
-            },
-        },
-    }
-});
-
-fn gpio_write(
-    transport: &TransportWrapper,
-    uart: &dyn Uart,
-    value: u32,
-    config: &HashMap<PinmuxMioOut, PinmuxOutsel>,
-    invert: u8,
-) -> Result<()> {
-    let mask = config.values().fold(0, |acc, v| {
-        let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
-        acc | 1u32 << i
-    });
-    let masked_value = value & mask;
-
-    log::info!(
-        "write & verify pattern: {:08x} & {:08x} -> {:08x}",
-        value,
-        mask,
-        masked_value
-    );
-    if masked_value == 0 {
-        log::info!(
-            "skipping: {:08x} has no bits in common with the pinmux configuration",
-            value
-        );
-    } else {
-        // invert == 1: use for walking 0
-        // invert == 0: use for walking 1
-        let write_val = if invert == 1 {
-            !masked_value
-        } else {
-            masked_value
-        };
-        GpioSet::write_all(uart, write_val)?;
-        let mut result = 0u32;
-        for (k, v) in config.iter() {
-            let n = u32::from(transport.gpio_pin(&k.to_string())?.read()?);
-            let i = u32::from(*v) - u32::from(PinmuxOutsel::GpioGpio0);
-            result |= n << i;
-        }
-        if invert == 1 {
-            assert_eq!(write_val & mask, result);
-        } else {
-            assert_eq!(write_val, result);
-        }
-        std::thread::sleep(Duration::from_millis(100));
-    }
-    Ok(())
-}
-
-fn gpio_read(
-    transport: &TransportWrapper,
-    uart: &dyn Uart,
-    value: u32,
-    config: &HashMap<PinmuxPeripheralIn, PinmuxInsel>,
-    invert: u32,
-) -> Result<()> {
-    let mask = if invert == 1 {
-        // all 1 for target pins.
-        GpioGet::read_all(uart)?
-    } else {
-        config.keys().fold(0, |acc, k| {
-            let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
-            acc | 1u32 << i
-        })
-    };
-    let masked_value = value & mask;
-    log::info!(
-        "read & verify pattern: {:08x} & {:08x} -> {:08x}",
-        value,
-        mask,
-        masked_value
-    );
-    if masked_value == 0 {
-        log::info!(
-            "skipping: {:08x} has no bits in common with the pinmux configuration",
-            value
-        );
-    } else {
-        for (k, v) in config.iter() {
-            let i = u32::from(*k) - u32::from(PinmuxPeripheralIn::GpioGpio0);
-            transport
-                .gpio_pin(&v.to_string())?
-                .write(((masked_value >> i) & 1) != invert)?;
-        }
-        // issue dummy read to make sure write complete.
-        let _ = GpioGet::read_all(uart)?;
-        std::thread::sleep(Duration::from_millis(100));
-    }
-    Ok(())
-}
-
-fn test_gpio_outputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    log::info!(
-        "Configuring pinmux for {:?}",
-        opts.init.backend_opts.interface
-    );
-    let config = CONFIG
-        .get(opts.init.backend_opts.interface.as_str())
-        .expect("interface");
-    PinmuxConfig::configure(&*uart, Some(&config.input), Some(&config.output))?;
-
-    log::info!("Configuring debugger GPIOs as inputs");
-    // The outputs (with respect to pinmux config) correspond to the input pins on the debug board.
-    for pin in config.output.keys() {
-        transport
-            .gpio_pin(&pin.to_string())?
-            .set_mode(PinMode::Input)?;
-    }
-
-    log::info!("Enabling outputs on the DUT");
-    GpioSet::set_input_noise_filter(&*uart, u32::MAX, 1)?;
-    GpioSet::set_enabled_all(&*uart, u32::MAX)?;
-
-    // Output level high test
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "high".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-    log::info!("test: output level high test");
-
-    // Walking 1
-    for i in 16..30 {
-        gpio_write(transport, &*uart, 1 << i, &config.output, 0)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Output Rising Edge test
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "rising".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-
-    log::info!("test: output rising edge test");
-
-    // Walking 1
-    for i in 16..30 {
-        gpio_write(transport, &*uart, 1 << i, &config.output, 0)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Output level low test
-    log::info!("test: output level low test");
-    GpioSet::write_all(&*uart, u32::MAX)?;
-
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "low".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, 0x1E7E_0000)?;
-    // Walking 0
-    for i in 0..32 {
-        gpio_write(transport, &*uart, 1 << i, &config.output, 1)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Output Falling Edge test
-    log::info!("test: output falling edge test");
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "falling".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-    GpioSet::write_all(&*uart, u32::MAX)?;
-
-    // Walking 0
-    for i in 0..32 {
-        gpio_write(transport, &*uart, 1 << i, &config.output, 1)?;
-    }
-    Ok(())
-}
-
-fn test_gpio_inputs(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    log::info!(
-        "Configuring pinmux for {:?}",
-        opts.init.backend_opts.interface
-    );
-    let config = CONFIG
-        .get(opts.init.backend_opts.interface.as_str())
-        .expect("interface");
-    PinmuxConfig::configure(&*uart, Some(&config.input), None)?;
-
-    log::info!("Configuring debugger GPIOs as outputs");
-    // The inputs (with respect to pinmux config) correspond to the output pins on the debug board.
-    for pin in config.input.values() {
-        transport
-            .gpio_pin(&pin.to_string())?
-            .set_mode(PinMode::PushPull)?;
-    }
-
-    log::info!("Disabling outputs on the DUT");
-    GpioSet::set_enabled_all(&*uart, 0x0)?;
-    GpioSet::set_input_noise_filter(&*uart, u32::MAX, 1)?;
-
-    // Initialize pins to 0
-    for pin in config.input.values() {
-        transport.gpio_pin(&pin.to_string())?.write(false)?;
-    }
-
-    // Input level high test
-    log::info!("test: input level high test");
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "high".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-    // Walking 1
-    for i in 16..30 {
-        gpio_read(transport, &*uart, 1 << i, &config.input, 0)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Initialize pins to 0
-    for pin in config.input.values() {
-        transport.gpio_pin(&pin.to_string())?.write(false)?;
-    }
-    // Input Rising Edge test
-    log::info!("test: input rising edge test");
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "rising".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-    // Walking 1
-    for i in 16..30 {
-        gpio_read(transport, &*uart, 1 << i, &config.input, 0)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Initialize pins to 1
-    for pin in config.input.values() {
-        transport.gpio_pin(&pin.to_string())?.write(true)?;
-    }
-
-    // Input level low test
-    log::info!("test: input level low test");
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "low".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, 0x1E7E_0000)?;
-    // Walking 0
-    for i in 16..30 {
-        gpio_read(transport, &*uart, 1 << i, &config.input, 1)?;
-    }
-    GpioSet::irq_disable_all(&*uart, u32::MAX)?;
-
-    // Initialize pins to 1
-    for pin in config.input.values() {
-        transport.gpio_pin(&pin.to_string())?.write(true)?;
-    }
-    // Input Falling Edge test
-    log::info!("test: input falling edge test");
-    GpioSet::irq_set_trigger(&*uart, u32::MAX, "falling".into())?;
-    GpioSet::irq_acknowledge_all(&*uart)?;
-    GpioSet::irq_restore_all(&*uart, u32::MAX)?;
-
-    // Walking 0
-    for i in 16..30 {
-        gpio_read(transport, &*uart, 1 << i, &config.input, 1)?;
-    }
-    Ok(())
-}
-
-fn main() -> Result<()> {
-    let opts = Opts::parse();
-    opts.init.init_logging();
-    let transport = opts.init.init_target()?;
-
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"gpio_intr_test [^\r\n]*", opts.timeout)?;
-
-    execute_test!(test_gpio_inputs, &opts, &transport);
-    execute_test!(test_gpio_outputs, &opts, &transport);
-    Ok(())
-}
diff --git a/sw/host/tests/chip/i2c_target/src/main.rs b/sw/host/tests/chip/i2c_target/src/main.rs
index cf319f04e92fd..4344252531cb7 100644
--- a/sw/host/tests/chip/i2c_target/src/main.rs
+++ b/sw/host/tests/chip/i2c_target/src/main.rs
@@ -16,7 +16,7 @@ use opentitanlib::test_utils;
 use opentitanlib::test_utils::e2e_command::TestCommand;
 use opentitanlib::test_utils::i2c_target::{I2cTargetAddress, I2cTestConfig, I2cTransferStart};
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::test_utils::status::Status;
 use opentitanlib::uart::console::UartConsole;
 use std::borrow::Borrow;
@@ -138,7 +138,7 @@ fn test_wakeup_normal_sleep(opts: &Opts, transport: &TransportWrapper, address:
     log::info!("Issuing read transaction to sleeping chip. Expecting transaction error.");
     let result = i2c.run_transaction(Some(address), &mut [Transfer::Read(&mut buf)]);
     log::info!("Transaction error: {}", result.is_err());
-    Status::recv(&*uart, Duration::from_secs(5), false)?;
+    Status::recv(&*uart, Duration::from_secs(5), false, false)?;
     log::info!("Chip is awake.  Reissuing read transaction.");
     test_read_transaction(opts, transport, address)
 }
@@ -157,7 +157,7 @@ fn test_wakeup_deep_sleep(
     log::info!("Issuing read transaction to sleeping chip. Expecting transaction error.");
     let result = i2c.run_transaction(Some(address), &mut [Transfer::Read(&mut buf)]);
     log::info!("Transaction error: {}", result.is_err());
-    Status::recv(&*uart, Duration::from_secs(5), false)?;
+    Status::recv(&*uart, Duration::from_secs(5), false, false)?;
     log::info!("Chip is awake.  Reissuing read transaction.");
     test_set_target_address(opts, transport, instance)?;
     test_read_transaction(opts, transport, address)
diff --git a/sw/host/tests/chip/jtag/BUILD b/sw/host/tests/chip/jtag/BUILD
index d55397f2371cf..cf5934ee658a5 100644
--- a/sw/host/tests/chip/jtag/BUILD
+++ b/sw/host/tests/chip/jtag/BUILD
@@ -14,12 +14,12 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:once_cell",
+        "@crate_index//:regex",
         "@crate_index//:serde_json",
     ],
 )
@@ -32,12 +32,12 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:once_cell",
+        "@crate_index//:regex",
         "@crate_index//:serde_json",
     ],
 )
diff --git a/sw/host/tests/chip/jtag/src/openocd_test.rs b/sw/host/tests/chip/jtag/src/openocd_test.rs
index ab9a0972da162..9f84379cd36f7 100644
--- a/sw/host/tests/chip/jtag/src/openocd_test.rs
+++ b/sw/host/tests/chip/jtag/src/openocd_test.rs
@@ -8,7 +8,7 @@ use anyhow::Result;
 use clap::Parser;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::chip::boolean::MultiBitBool8;
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
 use opentitanlib::execute_test;
@@ -24,12 +24,12 @@ struct Opts {
     init: InitializeTest,
 }
 
-fn reset(transport: &TransportWrapper, strappings: &[&str], reset_delay: Duration) -> Result<()> {
+fn reset_target(transport: &TransportWrapper, strappings: &[&str]) -> Result<()> {
     log::info!("Resetting target...");
     for strapping in strappings.iter() {
         transport.pin_strapping(strapping)?.apply()?;
     }
-    transport.reset_target(reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     // we want to hold the strapping configuration here because in some life cycle states,
     // the tap multiplexing is dynamic so remove the tap strap would actually change the tap
     Ok(())
@@ -39,7 +39,7 @@ fn test_openocd(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Reset the device
     let uart = transport.uart("console")?;
 
-    reset(transport, &[], opts.init.bootstrap.options.reset_delay)?;
+    reset_target(transport, &[])?;
     const CONSOLE_TIMEOUT: Duration = Duration::from_secs(5);
 
     let mut console = UartConsole {
@@ -53,11 +53,7 @@ fn test_openocd(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     //
     // Test the RISC-V TAP
     //
-    reset(
-        transport,
-        &["PINMUX_TAP_RISCV"],
-        opts.init.bootstrap.options.reset_delay,
-    )?;
+    reset_target(transport, &["PINMUX_TAP_RISCV"])?;
 
     let mut jtag = opts
         .init
@@ -181,11 +177,7 @@ fn test_openocd(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     //
     // Test the LC TAP
     //
-    reset(
-        transport,
-        &["PINMUX_TAP_LC"],
-        opts.init.bootstrap.options.reset_delay,
-    )?;
+    reset_target(transport, &["PINMUX_TAP_LC"])?;
 
     let mut jtag = opts
         .init
diff --git a/sw/host/tests/chip/jtag/src/sram_load.rs b/sw/host/tests/chip/jtag/src/sram_load.rs
index 0ba9bf5645aea..a682496356d73 100644
--- a/sw/host/tests/chip/jtag/src/sram_load.rs
+++ b/sw/host/tests/chip/jtag/src/sram_load.rs
@@ -8,7 +8,7 @@ use anyhow::Result;
 use clap::Parser;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -32,7 +32,7 @@ fn test_sram_load(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Connect to the RISC-V TAP
     //
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
diff --git a/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/BUILD b/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/BUILD
new file mode 100644
index 0000000000000..e524243b2ebb9
--- /dev/null
+++ b/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/BUILD
@@ -0,0 +1,23 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "ottf_console_with_gpio_tx_indicator",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/provisioning/ujson_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+    ],
+)
diff --git a/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/src/main.rs b/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/src/main.rs
new file mode 100644
index 0000000000000..889baeb63dbff
--- /dev/null
+++ b/sw/host/tests/chip/ottf_console_with_gpio_tx_indicator/src/main.rs
@@ -0,0 +1,81 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::Parser;
+use std::fs;
+use std::path::PathBuf;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
+use opentitanlib::execute_test;
+use opentitanlib::io::gpio::{PinMode, PullMode};
+use opentitanlib::test_utils;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::ConsoleRecv;
+use opentitanlib::uart::console::UartConsole;
+use ujson_lib::provisioning_data::PersoBlob;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
+    timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+}
+
+fn spi_device_console_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    // Setup the SPI console with the GPIO TX indicator pin.
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin("IOA5")?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console_device = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
+
+    // Load the ELF binary and get the expect data.
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let object = object::File::parse(&*elf_binary)?;
+    let data = test_utils::object::symbol_data(&object, "kTest4KbDataStr")?;
+    let data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+
+    // Wait for generic strings to be transmitted.
+    for _ in 0..2 {
+        // Receive simple string from the device.
+        _ = UartConsole::wait_for(&spi_console_device, "ABC", opts.timeout)?;
+
+        // Receive 4K of data from the device.
+        _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+    }
+
+    // Receive the UJSON string transmitted and verify its contents.
+    let perso_blob = PersoBlob::recv(&spi_console_device, opts.timeout, true, false)?;
+    for i in 0..perso_blob.body.len() {
+        assert_eq!(perso_blob.body[i], (i % 256) as u8);
+    }
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    execute_test!(spi_device_console_test, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/chip/ottf_dual_console/BUILD b/sw/host/tests/chip/ottf_dual_console/BUILD
new file mode 100755
index 0000000000000..a000a44feaeaf
--- /dev/null
+++ b/sw/host/tests/chip/ottf_dual_console/BUILD
@@ -0,0 +1,22 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "ottf_dual_console",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+    ],
+)
diff --git a/sw/host/tests/chip/ottf_dual_console/src/main.rs b/sw/host/tests/chip/ottf_dual_console/src/main.rs
new file mode 100644
index 0000000000000..2c81069372995
--- /dev/null
+++ b/sw/host/tests/chip/ottf_dual_console/src/main.rs
@@ -0,0 +1,45 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::Parser;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
+    timeout: Duration,
+
+    /// Name of the UART interface to connect to the debug OTTF console.
+    #[arg(long, default_value = "dut")]
+    debug_console: String,
+}
+
+fn ottf_dual_console_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let debug_uart = transport.uart(&opts.debug_console)?;
+
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let _ = UartConsole::wait_for(&*uart, r"Main UART console", opts.timeout)?;
+    let _ = UartConsole::wait_for(&*debug_uart, r"Second UART console", opts.timeout)?;
+    let _ = UartConsole::wait_for(&*uart, r"PASS!", opts.timeout)?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    execute_test!(ottf_dual_console_test, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/chip/pattgen/BUILD b/sw/host/tests/chip/pattgen/BUILD
new file mode 100644
index 0000000000000..654eb4585770f
--- /dev/null
+++ b/sw/host/tests/chip/pattgen/BUILD
@@ -0,0 +1,23 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "pattgen_ios",
+    srcs = [
+        "pattgen_ios.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+        "@crate_index//:rand",
+    ],
+)
diff --git a/sw/host/tests/chip/pattgen/pattgen_ios.rs b/sw/host/tests/chip/pattgen/pattgen_ios.rs
new file mode 100644
index 0000000000000..155b7fa22f7fe
--- /dev/null
+++ b/sw/host/tests/chip/pattgen/pattgen_ios.rs
@@ -0,0 +1,593 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Context, Result, ensure};
+use clap::Parser;
+use object::{Object, ObjectSymbol};
+use rand::rngs::StdRng;
+use rand::{Rng, SeedableRng};
+use std::cmp::{max, min};
+use std::fs;
+use std::mem::size_of_val;
+use std::path::PathBuf;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::gpio::{Edge, MonitoringEvent, PinMode};
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::gpio_monitor::{GpioMon, Waves};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::mem::MemWriteReq;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(long, value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+
+    /// How many random tests to run.
+    #[arg(long, default_value = "10")]
+    test_count: usize,
+
+    /// Override the random seed used to generate parameters.
+    #[arg(long)]
+    random_seed: Option<u64>,
+
+    /// Dump waves, even on success (waves are always printed on failured).
+    #[arg(long)]
+    dump_waves: bool,
+}
+
+const PATTGEN_PINS: &[(&str, &str)] = &[
+    ("IOR10", "pda0_tx"),
+    ("IOR11", "pcl0_tx"),
+    ("IOR12", "pda1_tx"),
+    ("IOR13", "pcl1_tx"),
+];
+
+const CHANNEL_COUNT: usize = 2;
+const PATTGEN_MAX_REP: u16 = 5;
+// The minimum divisor needs to be sufficiently big so that the transport
+// can sample the GPIOs fast enough to get the entire signal.
+const PATTGEN_MIN_DIV: u32 = 1000;
+const PATTGEN_MAX_DIV: u32 = 15 * PATTGEN_MIN_DIV;
+// Maximum allowed clock jitter in ns (this is deviation between observed periods
+// and the expected period).
+const MAX_CLOCK_JITTER_NS: u64 = 10_000;
+
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+#[allow(dead_code)]
+enum TestCmd {
+    Wait = 0,
+    Configure = 1,
+    Run = 2,
+    Stop = 3,
+}
+
+#[derive(Clone)]
+struct ChannelSymbols {
+    patt_polarity: u32,
+    patt_inactive_level_pda: u32,
+    patt_inactive_level_pcl: u32,
+    patt_div: u32,
+    patt_lower: u32,
+    patt_upper: u32,
+    patt_len: u32,
+    patt_rep: u32,
+}
+
+struct Symbols {
+    test_cmd: u32,
+    channel_enable: u32,
+    channels: [ChannelSymbols; CHANNEL_COUNT],
+}
+
+#[derive(Default, Debug)]
+struct PattGenChannelParams {
+    patt_polarity: u8,
+    patt_inactive_level_pda: u8,
+    patt_inactive_level_pcl: u8,
+    patt_div: u32,
+    patt_lower: u32,
+    patt_upper: u32,
+    patt_len: u8,
+    patt_rep: u16,
+}
+
+impl PattGenChannelParams {
+    fn from_rng<T: Rng>(rng: &mut T) -> Self {
+        PattGenChannelParams {
+            patt_polarity: rng.gen_range(0..=1),
+            patt_inactive_level_pda: rng.gen_range(0..=1),
+            patt_inactive_level_pcl: rng.gen_range(0..=1),
+            patt_div: rng.gen_range(PATTGEN_MIN_DIV..=PATTGEN_MAX_DIV),
+            patt_lower: rng.r#gen(),
+            patt_upper: rng.r#gen(),
+            patt_len: rng.gen_range(1..=64),
+            patt_rep: rng.gen_range(1..=PATTGEN_MAX_REP),
+        }
+    }
+
+    // Returns the list of clock edges where the data signal changes.
+    //
+    // When the ENABLE bit is set, the pattgen will start outputting the first
+    // bit of the data. Depending on the inactive data value, this may or may
+    // not create an edge. At the same time, pattgen will also start outputting
+    // the clock signal. Depending on the inactive pcl level and the polarity,
+    // this may or may not create an edge. Let us call tFIRST_DATA_EDGE the first time
+    // where the data signal has an edge. Corresponding, call tFIRST_CLOCK_EDGE
+    // the first time where the clock signal has an edge. We number the clock edges
+    // by 0, 1, and so on so that the ith edge is at time tFIRST_CLOCK_EDGE + i*tHALF_PERIOD
+    // where tHALF_PERIOD is the half-period of the clock. Then in some combination
+    // of inactive pcl/data level, data pattern and clock polarity, it is possible for
+    // tFIRST_DATA_EDGE to occur at clock edge "-1", ie tFIRST_DATA_EDGE-tHALF_PERIOD.
+    //
+    // This function will return the clock edges at which a data edge is expected. They
+    // use the number scheme described above. In particular, it is possible for the first
+    // data edge to be at index "-1". The edges will include any potential edge needed to
+    // return to the inactive value.
+    fn pattern_clock_edges(&self) -> Vec<i32> {
+        let mut edges = Vec::new();
+        let pattern = self.patt_lower as u64 | (self.patt_upper as u64) << 32;
+        let mut previous_data = self.patt_inactive_level_pda != 0; // Data line starts at the inactive level.
+
+        // Imagine a baseline scenario where the inactive clock level is 0 and polarity is 0. Then clock edge 0
+        // is rising, edge 1 is falling and so on. In this scenario, the ith bit (i=0,1,...) of the pattern
+        // appears on the data line between clock edges 2i-1 and 2i+1. The loop below assumes this scenario
+        // and pushes a changes at edge 2i-1. To account for other scenarios, the following variable simply adds
+        // a constant shift to the 2i-1 above.
+        // If polarity is 1 and the inactive clock level is 1 then edge 0 of the clock is falling and edge 1 is
+        // rising so the ith pattern bit also appears between edges 2i-1 and 2i+1. Hence the polarity per say does
+        // not affect the edge numbering.
+        // However, if the inactive clock level does not match the polarity, for example if polarity is 0 but the
+        // inactive clock level is 1, then when ENABLE is set, the clock will have a first falling transition that
+        // does not correspond to a clock tick and the first "real" clock tick is edge 1.
+        // Hence the clock edge numbering is shifted by 1. The same happens if polarity is 1 and inactive pcl level is 0.
+        let edge_shift = if (self.patt_polarity != 0) == (self.patt_inactive_level_pcl != 0) {
+            -1
+        } else {
+            0
+        };
+
+        for rep in 0..(self.patt_rep as i32) {
+            for i in 0..(self.patt_len as i32) {
+                let cur_data = (pattern >> i) & 1 == 1;
+                if cur_data != previous_data {
+                    edges.push(2 * rep * (self.patt_len as i32) + 2 * i + edge_shift);
+                    previous_data = cur_data;
+                }
+            }
+        }
+        // After the pattern, the hardware will stop with the inactivel value which may create an edge.
+        if previous_data != (self.patt_inactive_level_pda != 0) {
+            edges.push(2 * (self.patt_rep as i32) * (self.patt_len as i32) + edge_shift)
+        }
+
+        edges
+    }
+
+    fn clock_period_ns(&self, clk_io_freq_hz: u64) -> u64 {
+        // See pattgen documentation.
+        1_000_000_000 * (self.patt_div as u64 + 1) / clk_io_freq_hz
+    }
+}
+
+#[derive(Default, Debug)]
+struct PattGenParams {
+    channel_enable: u8,
+    channels: [PattGenChannelParams; CHANNEL_COUNT],
+}
+
+impl PattGenParams {
+    fn from_rng<T: Rng>(rng: &mut T) -> Self {
+        PattGenParams {
+            // Always ensure that at least one channel is enabled.
+            channel_enable: rng.gen_range(1..(1 << CHANNEL_COUNT)),
+            channels: [(); CHANNEL_COUNT].map(|()| PattGenChannelParams::from_rng(rng)),
+        }
+    }
+}
+
+#[derive(Debug)]
+struct SignalWave {
+    initial_level: bool,
+    // Timestamps in ns.
+    edges_ns: Vec<u64>,
+}
+
+// Extract the edges from the waves.
+fn extract_signal(waves: &Waves, sig_name: &str) -> Result<SignalWave> {
+    let clk_idx = waves
+        .signal_index(sig_name)
+        .with_context(|| format!("no signal {sig_name} monitored?!"))?;
+    let initial_level = waves.initial_levels()[clk_idx];
+    let mut edges_ns = Vec::new();
+    let mut last_value = initial_level;
+    for evt in waves
+        .all_events()
+        .filter(|evt| evt.signal_index == clk_idx as u8)
+    {
+        ensure!(
+            (evt.edge == Edge::Rising && !last_value) || (evt.edge == Edge::Falling && last_value),
+            "signal recording is inconsistent, looks like some events were missed"
+        );
+        last_value = !last_value;
+        edges_ns.push(waves.timestamp_to_ns(evt.timestamp));
+    }
+    Ok(SignalWave {
+        initial_level,
+        edges_ns,
+    })
+}
+
+// Verify that a clock signal is valid: it starts with the expected value,
+// ticks the required number of times and meetings the expected timing.
+fn verify_clock(
+    params: &PattGenChannelParams,
+    signal: &SignalWave,
+    clk_io_freq_hz: u64,
+) -> Result<()> {
+    // The signal starts with the inactivel clock level.
+    ensure!(
+        signal.initial_level == (params.patt_inactive_level_pcl == 1),
+        "clock starts at the wrong level"
+    );
+    // The signal must tick exactly the required number of times and go back to the inactive level.
+    let expected_ticks = 2 * params.patt_len as usize * params.patt_rep as usize;
+    ensure!(
+        signal.edges_ns.len() == expected_ticks,
+        "clock did not tick the required number of times (expected {}, got {})",
+        expected_ticks,
+        signal.edges_ns.len()
+    );
+    // Check that the frequency matches what we expected.
+    assert!(signal.edges_ns.len() >= 2);
+    let mut min_period_ns = signal.edges_ns[1] - signal.edges_ns[0];
+    let mut max_period_ns = min_period_ns;
+    for pair in signal.edges_ns.windows(2) {
+        min_period_ns = min(min_period_ns, pair[1] - pair[0]);
+        max_period_ns = max(max_period_ns, pair[1] - pair[0]);
+    }
+    let expected_period = params.clock_period_ns(clk_io_freq_hz);
+    log::info!(
+        "Clock period: expected={expected_period}ns, min={min_period_ns}ns, max={max_period_ns}ns"
+    );
+    ensure!(
+        min_period_ns.abs_diff(expected_period) <= MAX_CLOCK_JITTER_NS,
+        "clock has unexpected slow periods"
+    );
+    ensure!(
+        max_period_ns.abs_diff(expected_period) <= MAX_CLOCK_JITTER_NS,
+        "clock has unexpected high periods"
+    );
+
+    Ok(())
+}
+
+// Verify that a data signal is valid.
+// This function will add a signal to the waves that contains
+// the expected signal.
+fn verify_data(
+    params: &PattGenChannelParams,
+    clk: &SignalWave,
+    waves: &mut Waves,
+    data_sig_name: &str,
+    clk_io_freq_hz: u64,
+) -> Result<()> {
+    // Then extract the data signal.
+    let data = extract_signal(waves, data_sig_name).context("data signal is invalid")?;
+
+    // Compute data edge timing.
+    let pattern_edges = params.pattern_clock_edges();
+
+    // Function that returns the time of the nth edge. It needs to handle edge "-1"
+    // as well as an another virtual extra edge at the end of the clock signal. See pattern_clock_edges.
+    let clk_half_period = params.clock_period_ns(clk_io_freq_hz);
+    let clock_nth_edge = |clk_edge_idx: i32| {
+        if clk_edge_idx == -1 {
+            clk.edges_ns[0] - clk_half_period
+        } else if clk_edge_idx == clk.edges_ns.len() as i32 {
+            clk.edges_ns.last().unwrap() + clk_half_period
+        } else {
+            clk.edges_ns[clk_edge_idx as usize]
+        }
+    };
+
+    // Create a signal in the waves with the expected signal.
+    let mut previous_data_val = params.patt_inactive_level_pda != 0;
+    let expected_sig_idx = waves.add_signal(format!("{data_sig_name}_expected"), previous_data_val);
+
+    for &clk_edge_idx in &pattern_edges {
+        let expected_clk_edge = clock_nth_edge(clk_edge_idx);
+        waves.add_event(MonitoringEvent {
+            signal_index: expected_sig_idx as u8,
+            edge: if previous_data_val {
+                Edge::Falling
+            } else {
+                Edge::Rising
+            },
+            timestamp: waves.ns_to_timestamp(expected_clk_edge),
+        });
+        previous_data_val = !previous_data_val;
+    }
+    waves.sort_events();
+
+    // Data signal must initially be at the inactive data.
+    ensure!(
+        data.initial_level == (params.patt_inactive_level_pda != 0),
+        "data starts at the wrong level"
+    );
+
+    for (i, &clk_edge_idx) in pattern_edges.iter().enumerate() {
+        let expected_clk_edge = clock_nth_edge(clk_edge_idx);
+        let actual_edge = data.edges_ns[i];
+        ensure!(
+            expected_clk_edge.abs_diff(actual_edge) < MAX_CLOCK_JITTER_NS,
+            "data edge {i}: expected a data edge at time {expected_clk_edge}ns (clock edge {clk_edge_idx}) but got time {actual_edge}ns"
+        );
+    }
+    // Check for spurious edges at the end.
+    ensure!(
+        pattern_edges.len() == data.edges_ns.len(),
+        "data has unexpected edges after the pattern, e.g. at time {}",
+        data.edges_ns.last().unwrap()
+    );
+
+    Ok(())
+}
+
+// Verify that the waves match the pattgen parameters.
+fn verify_waves(
+    params: &PattGenChannelParams,
+    waves: &mut Waves,
+    clk_sig: &str,
+    data_sig: &str,
+    clk_io_freq_hz: u64,
+) -> Result<()> {
+    // First extract the clock signal.
+    let clk = extract_signal(waves, clk_sig).context("clock signal is invalid")?;
+    // Verify the clock signal.
+    verify_clock(params, &clk, clk_io_freq_hz).context("clock signal is invalid")?;
+    // Verify the clock signals.
+    verify_data(params, &clk, waves, data_sig, clk_io_freq_hz).context("data signal is invalid")?;
+    Ok(())
+}
+
+fn pattgen_ios(
+    opts: &Opts,
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    syms: &Symbols,
+    clk_io_freq_hz: u64,
+) -> Result<()> {
+    // Make sure the pins are setup as inputs.
+    for (pin, _) in PATTGEN_PINS {
+        transport.gpio_pin(pin)?.set_mode(PinMode::Input)?;
+    }
+    // Create a RNG, either from a given seed or a random one.
+    let seed = opts.random_seed.unwrap_or_else(rand::random);
+    log::info!("Seed: {seed}");
+    let mut rng = StdRng::seed_from_u64(seed);
+
+    for round in 0..opts.test_count {
+        let params = PattGenParams::from_rng(&mut rng);
+        log::info!("Round {round}:");
+        log::info!("{params:#?}");
+        // Wait for device to be ready for ujson commands.
+        let _ = UartConsole::wait_for(uart, r"SiVal: waiting for commands", opts.timeout)?;
+        // Write pattgen parameters.
+        write_params(uart, syms, &params)?;
+        // Tell device to configure the channels.
+        MemWriteReq::execute(uart, syms.test_cmd, &[TestCmd::Configure as u8])?;
+        // Wait until done.
+        let _ = UartConsole::wait_for(uart, r"Channels configured", opts.timeout)?;
+        // Start GPIO monitoring.
+        let mut gpio_mon = GpioMon::start(transport, PATTGEN_PINS, true)?;
+        // Tell device to start pattern.
+        let _ = UartConsole::wait_for(uart, r"SiVal: waiting for commands", opts.timeout)?;
+        MemWriteReq::execute(uart, syms.test_cmd, &[TestCmd::Run as u8])?;
+        // Wait for device to report the end of this test.
+        let _ = UartConsole::wait_for(uart, r"TEST DONE", opts.timeout)?;
+        // Stop monitoring.
+        let _ = gpio_mon.read(false)?;
+        // Get the waves.
+        let mut waves: Waves = gpio_mon.try_into()?;
+        // Compare the waves.
+        for i in 0..CHANNEL_COUNT {
+            if (params.channel_enable >> i) & 1 == 1 {
+                let res = verify_waves(
+                    &params.channels[i],
+                    &mut waves,
+                    &format!("pcl{i}_tx"),
+                    &format!("pda{i}_tx"),
+                    clk_io_freq_hz,
+                );
+                if res.is_err() || opts.dump_waves {
+                    log::info!(
+                        "====[ VCD dump ]====\n{}\n====[ end dump ]====",
+                        waves.dump_vcd()?
+                    );
+                }
+                res.with_context(|| format!("channel {i} did not meet expectations"))?;
+            }
+        }
+    }
+    // Tell device to stop.
+    let _ = UartConsole::wait_for(uart, r"SiVal: waiting for commands", opts.timeout)?;
+    MemWriteReq::execute(uart, syms.test_cmd, &[TestCmd::Stop as u8])?;
+
+    // Wait until device has done its work.
+    let _ = UartConsole::wait_for(uart, r"PASS!", opts.timeout)?;
+
+    Ok(())
+}
+
+fn write_params(uart: &dyn Uart, syms: &Symbols, params: &PattGenParams) -> Result<()> {
+    MemWriteReq::execute(
+        uart,
+        syms.channel_enable,
+        &params.channel_enable.to_le_bytes(),
+    )?;
+    for (chan_syms, chan_param) in std::iter::zip(syms.channels.iter(), params.channels.iter()) {
+        MemWriteReq::execute(
+            uart,
+            chan_syms.patt_polarity,
+            &chan_param.patt_polarity.to_le_bytes(),
+        )?;
+        MemWriteReq::execute(
+            uart,
+            chan_syms.patt_inactive_level_pcl,
+            &chan_param.patt_inactive_level_pcl.to_le_bytes(),
+        )?;
+        MemWriteReq::execute(
+            uart,
+            chan_syms.patt_inactive_level_pda,
+            &chan_param.patt_inactive_level_pda.to_le_bytes(),
+        )?;
+        MemWriteReq::execute(uart, chan_syms.patt_div, &chan_param.patt_div.to_le_bytes())?;
+        MemWriteReq::execute(
+            uart,
+            chan_syms.patt_lower,
+            &chan_param.patt_lower.to_le_bytes(),
+        )?;
+        MemWriteReq::execute(
+            uart,
+            chan_syms.patt_upper,
+            &chan_param.patt_upper.to_le_bytes(),
+        )?;
+        MemWriteReq::execute(uart, chan_syms.patt_len, &chan_param.patt_len.to_le_bytes())?;
+        MemWriteReq::execute(uart, chan_syms.patt_rep, &chan_param.patt_rep.to_le_bytes())?;
+    }
+    Ok(())
+}
+
+fn read_symbol<'data, T: Object<'data>>(elf: &T, name: &str, size: usize) -> Result<u32> {
+    let symbol = elf
+        .symbols()
+        .find(|symbol| symbol.name() == Ok(name))
+        .with_context(|| format!("Provided ELF missing '{name}' symbol"))?;
+    assert_eq!(
+        symbol.size(),
+        size as u64,
+        "symbol '{name}Real' does not have the expected size"
+    );
+    Ok(symbol.address() as u32)
+}
+
+fn read_backdoor_symbol<'data, T: Object<'data>>(elf: &T, name: &str, size: usize) -> Result<u32> {
+    read_symbol(elf, &format!("{name}Real"), size)
+}
+
+fn read_channel_symbol<'data, T: Object<'data>>(
+    elf: &T,
+    name: &str,
+    idx: usize,
+    size: usize,
+) -> Result<u32> {
+    read_backdoor_symbol(elf, &format!("{name}{idx}"), size)
+}
+
+fn read_channel_symbols<'data, T: Object<'data>>(elf: &T, idx: usize) -> Result<ChannelSymbols> {
+    let dummy_params = PattGenChannelParams::default();
+
+    Ok(ChannelSymbols {
+        patt_polarity: read_channel_symbol(
+            elf,
+            "kPattPol",
+            idx,
+            size_of_val(&dummy_params.patt_polarity),
+        )?,
+        patt_inactive_level_pcl: read_channel_symbol(
+            elf,
+            "kPattInactiveLevelPcl",
+            idx,
+            size_of_val(&dummy_params.patt_inactive_level_pcl),
+        )?,
+        patt_inactive_level_pda: read_channel_symbol(
+            elf,
+            "kPattInactiveLevelPda",
+            idx,
+            size_of_val(&dummy_params.patt_inactive_level_pda),
+        )?,
+        patt_div: read_channel_symbol(elf, "kPattDiv", idx, size_of_val(&dummy_params.patt_div))?,
+        patt_lower: read_channel_symbol(
+            elf,
+            "kPattLower",
+            idx,
+            size_of_val(&dummy_params.patt_lower),
+        )?,
+        patt_upper: read_channel_symbol(
+            elf,
+            "kPattUpper",
+            idx,
+            size_of_val(&dummy_params.patt_upper),
+        )?,
+        patt_len: read_channel_symbol(elf, "kPattLen", idx, size_of_val(&dummy_params.patt_len))?,
+        patt_rep: read_channel_symbol(elf, "kPattRep", idx, size_of_val(&dummy_params.patt_rep))?,
+    })
+}
+
+fn read_channels_symbols<'data, T: Object<'data>>(
+    elf: &T,
+) -> Result<[ChannelSymbols; CHANNEL_COUNT]> {
+    let chans = (0..CHANNEL_COUNT)
+        .map(|i| read_channel_symbols(elf, i))
+        .collect::<Result<Vec<ChannelSymbols>>>()?;
+    let chans: &[ChannelSymbols; CHANNEL_COUNT] = chans.as_slice().try_into()?;
+    Ok(chans.clone())
+}
+
+fn read_symbols(opts: &Opts) -> Result<Symbols> {
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let elf_file = object::File::parse(&*elf_binary)?;
+    let dummy_params = PattGenParams::default();
+
+    Ok(Symbols {
+        test_cmd: read_symbol(&elf_file, "test_cmd", 1)?,
+        channel_enable: read_backdoor_symbol(
+            &elf_file,
+            "kChannelEnable",
+            size_of_val(&dummy_params.channel_enable),
+        )?,
+        channels: read_channels_symbols(&elf_file)?,
+    })
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let syms = read_symbols(&opts)?;
+
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let res = UartConsole::wait_for(&*uart, r"peripheral frequency: ([0-9]+)\r\n", opts.timeout)?;
+    let clk_io_freq_hz: u64 = res[1]
+        .parse()
+        .context("could not parse peripheral frequency")?;
+    log::info!("Peripheral clock frequency reported by device: {clk_io_freq_hz} Hz");
+
+    execute_test!(
+        pattgen_ios,
+        &opts,
+        &transport,
+        &*uart,
+        &syms,
+        clk_io_freq_hz
+    );
+    Ok(())
+}
diff --git a/sw/host/tests/chip/power_virus/BUILD b/sw/host/tests/chip/power_virus/BUILD
index e7aacc877924b..d3ed3354cb978 100644
--- a/sw/host/tests/chip/power_virus/BUILD
+++ b/sw/host/tests/chip/power_virus/BUILD
@@ -13,10 +13,10 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:regex",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
diff --git a/sw/host/tests/chip/power_virus/src/main.rs b/sw/host/tests/chip/power_virus/src/main.rs
index f55df07cd8e01..9eab78cee910d 100644
--- a/sw/host/tests/chip/power_virus/src/main.rs
+++ b/sw/host/tests/chip/power_virus/src/main.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use regex::Regex;
 use std::time::Duration;
diff --git a/sw/host/tests/chip/pwm_smoketest/BUILD b/sw/host/tests/chip/pwm_smoketest/BUILD
new file mode 100644
index 0000000000000..2b17dd16fa037
--- /dev/null
+++ b/sw/host/tests/chip/pwm_smoketest/BUILD
@@ -0,0 +1,22 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "pwm_smoketest",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+    ],
+)
diff --git a/sw/host/tests/chip/pwm_smoketest/src/main.rs b/sw/host/tests/chip/pwm_smoketest/src/main.rs
new file mode 100644
index 0000000000000..f646621bb8fad
--- /dev/null
+++ b/sw/host/tests/chip/pwm_smoketest/src/main.rs
@@ -0,0 +1,146 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::Result;
+use clap::Parser;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::gpio::BitbangEntry;
+use opentitanlib::io::gpio::GpioPin;
+use opentitanlib::io::gpio::PinMode;
+use opentitanlib::test_utils;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use std::borrow::Borrow;
+use std::fs;
+use std::path::PathBuf;
+use std::rc::Rc;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
+    timeout: Duration,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+}
+
+fn test_clock_and_duty_cycle(
+    transport: &TransportWrapper,
+    gpio_pins: &[Rc<dyn GpioPin>],
+    period: Duration,
+    duty_cycle: f64,
+) -> Result<()> {
+    let gpio_bitbanging = transport.gpio_bitbanging()?;
+
+    const SAMPLES: usize = 100_000;
+    let mut samples = vec![0x00; SAMPLES];
+    let mut output = [0x01; SAMPLES];
+    output[1] = 0x03;
+    output[output.len() - 1] = 0x03;
+    let waveform = Box::new([BitbangEntry::Both(&output, &mut samples)]);
+
+    let sampling_period = Duration::from_micros(10);
+
+    gpio_bitbanging.run(
+        &gpio_pins
+            .iter()
+            .map(Rc::borrow)
+            .collect::<Vec<&dyn GpioPin>>(),
+        sampling_period,
+        waveform,
+    )?;
+
+    let mut pwm_bitbang_decoder = test_utils::bitbanging::pwm::decoder::Decoder::<0> {
+        active_level: test_utils::bitbanging::Bit::High,
+        sampling_period,
+    };
+    let mut decoded = pwm_bitbang_decoder.run(samples)?;
+    // Discard the first and the last samples because it may be distorted.
+    decoded.pop();
+    let count = decoded.len() as f64;
+    let (sum_period, sum_duty) = decoded.iter().fold((0.0, 0.0), |(period, duty), elem| {
+        (
+            period + elem.period.as_micros() as f64,
+            duty + elem.duty_cycle as f64,
+        )
+    });
+
+    let average_period = sum_period / count;
+    let average_duty = sum_duty / count;
+    let period_error =
+        (average_period - period.as_micros() as f64).abs() / period.as_micros() as f64;
+    println!(
+        "Pwm average period: {} micros, expected: {:?}, err: {}%",
+        average_period,
+        period,
+        period_error * 100.0
+    );
+
+    let duty_error = (average_duty - duty_cycle).abs() / duty_cycle;
+    println!(
+        "Pwm average duty: {}%, expected: {},  err: {}%",
+        average_duty,
+        duty_cycle,
+        duty_error * 100.0
+    );
+
+    // The error is explained by the possible values that the clk_div can assume.
+    assert!(period_error < 0.02);
+    assert!(duty_error < 0.01);
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    transport.pin_strapping("RESET")?.apply()?;
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    uart.clear_rx_buffer()?;
+    transport.pin_strapping("RESET")?.remove()?;
+
+    // Wait until test is running.
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    /* Load the ELF binary and get the expect data.*/
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let object = object::File::parse(&*elf_binary)?;
+
+    let clocks = test_utils::object::symbol_data(&object, "kClocksHz")?;
+    let duty_cycles = test_utils::object::symbol_data(&object, "kDutyCycles")?;
+
+    //The device uses IOA8 for the pwm, and the host uses the IOA7 to let the device know when the sampling started.
+    let gpio_pins = transport.gpio_pins(&["IOA8", "IOA7"].map(str::to_owned))?;
+    for pin in &gpio_pins {
+        pin.set_mode(PinMode::OpenDrain)?;
+    }
+
+    for clock in &clocks {
+        for duty_cycle in &duty_cycles {
+            println!("Testing clock: {clock}, duty cycle: {duty_cycle}");
+            execute_test!(
+                test_clock_and_duty_cycle,
+                &transport,
+                &gpio_pins,
+                Duration::from_micros(1_000_000u64 / *clock as u64),
+                *duty_cycle as f64,
+            );
+        }
+    }
+
+    transport.apply_default_configuration(None)?;
+
+    Ok(())
+}
diff --git a/sw/host/tests/chip/pwrmgr/src/sleep_all_resets.rs b/sw/host/tests/chip/pwrmgr/src/sleep_all_resets.rs
index 79392afc6d506..768d809b5dc6b 100644
--- a/sw/host/tests/chip/pwrmgr/src/sleep_all_resets.rs
+++ b/sw/host/tests/chip/pwrmgr/src/sleep_all_resets.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use std::time::Duration;
 
diff --git a/sw/host/tests/chip/pwrmgr/src/sleep_all_wakeups.rs b/sw/host/tests/chip/pwrmgr/src/sleep_all_wakeups.rs
index bf4f9420c685b..66ad8d3b2b68a 100644
--- a/sw/host/tests/chip/pwrmgr/src/sleep_all_wakeups.rs
+++ b/sw/host/tests/chip/pwrmgr/src/sleep_all_wakeups.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use std::time::Duration;
 
diff --git a/sw/host/tests/chip/pwrmgr/src/sleep_por.rs b/sw/host/tests/chip/pwrmgr/src/sleep_por.rs
index 33252a922a609..f287dd1ffeb19 100644
--- a/sw/host/tests/chip/pwrmgr/src/sleep_por.rs
+++ b/sw/host/tests/chip/pwrmgr/src/sleep_por.rs
@@ -2,11 +2,11 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::uart::console::UartConsole;
@@ -31,7 +31,7 @@ fn sleep_por_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         "FAIL" => return Err(anyhow!("Failure result: {:?}", vec)),
         _ => {}
     };
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let vec = UartConsole::wait_for(&*uart, r"PASS|FAIL|Ready for pad POR", opts.timeout)?;
     match vec[0].as_str() {
         "Ready for pad POR" => Ok(()),
diff --git a/sw/host/tests/chip/rv_core_ibex_epmp/src/main.rs b/sw/host/tests/chip/rv_core_ibex_epmp/src/main.rs
index 00268d51ce3cb..cd28e24ca1012 100644
--- a/sw/host/tests/chip/rv_core_ibex_epmp/src/main.rs
+++ b/sw/host/tests/chip/rv_core_ibex_epmp/src/main.rs
@@ -5,10 +5,10 @@
 use regex::Regex;
 use std::time::Duration;
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Context, Result, anyhow, bail};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -32,7 +32,7 @@ struct Opts {
 
 fn ibex_epmp_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
diff --git a/sw/host/tests/chip/rv_core_ibex_isa/src/main.rs b/sw/host/tests/chip/rv_core_ibex_isa/src/main.rs
index 3d9d32a7e8efd..2d429e41dbb87 100644
--- a/sw/host/tests/chip/rv_core_ibex_isa/src/main.rs
+++ b/sw/host/tests/chip/rv_core_ibex_isa/src/main.rs
@@ -4,10 +4,10 @@
 
 use std::time::Duration;
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{JtagTap, RiscvGpr, RiscvReg};
 use opentitanlib::test_utils::init::InitializeTest;
@@ -30,7 +30,7 @@ struct Opts {
 
 fn ibex_isa_smoke_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
@@ -46,17 +46,17 @@ fn ibex_isa_smoke_test(opts: &Opts, transport: &TransportWrapper) -> Result<()>
     uart.clear_rx_buffer()?;
 
     // Load SRAM program
-    let a0 = match opts.sram_program.load_and_execute(
+    match opts.sram_program.load_and_execute(
         &mut *jtag,
         ExecutionMode::JumpAndWait(Duration::from_secs(5)),
     )? {
-        ExecutionResult::ExecutionDone(a0) => {
+        ExecutionResult::ExecutionDone(_) => {
             log::info!("program successfully ran");
-            a0
         }
         res => bail!("program execution failed: {:?}", res),
     };
 
+    let a0 = jtag.read_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A0))?;
     log::info!("Return Value (a0): {a0}");
     if a0 == 0 {
         let a1 = jtag.read_riscv_reg(&RiscvReg::Gpr(RiscvGpr::A1))?;
diff --git a/sw/host/tests/chip/rv_dm/BUILD b/sw/host/tests/chip/rv_dm/BUILD
index ac7191aacaa8a..1f288f1dc22e6 100644
--- a/sw/host/tests/chip/rv_dm/BUILD
+++ b/sw/host/tests/chip/rv_dm/BUILD
@@ -35,6 +35,7 @@ rust_binary(
         "//sw/host/opentitanlib/bindgen",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
+        "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:rand",
         "@crate_index//:rand_chacha",
diff --git a/sw/host/tests/chip/rv_dm/src/access_after_hw_reset.rs b/sw/host/tests/chip/rv_dm/src/access_after_hw_reset.rs
index 7a810201bbeaa..485b9c93a1fda 100644
--- a/sw/host/tests/chip/rv_dm/src/access_after_hw_reset.rs
+++ b/sw/host/tests/chip/rv_dm/src/access_after_hw_reset.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils;
@@ -36,7 +36,7 @@ fn test_access_after_hw_reset(
     reset_addr: u32,
 ) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Enable console and wait for the message.
     let uart = &*transport.uart("console")?;
diff --git a/sw/host/tests/chip/rv_dm/src/access_after_wakeup.rs b/sw/host/tests/chip/rv_dm/src/access_after_wakeup.rs
index d794f710a2834..3af311cc7cb8a 100644
--- a/sw/host/tests/chip/rv_dm/src/access_after_wakeup.rs
+++ b/sw/host/tests/chip/rv_dm/src/access_after_wakeup.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::gpio::PinMode;
 use opentitanlib::io::jtag::JtagTap;
@@ -37,7 +37,7 @@ fn test_access_after_wakeup(
     software_barrier_addr: u32,
 ) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let power_button = transport.gpio_pin("Ior13")?;
     power_button.set_mode(PinMode::PushPull)?;
diff --git a/sw/host/tests/chip/rv_dm/src/control_status.rs b/sw/host/tests/chip/rv_dm/src/control_status.rs
index 57e56544c3d0f..2626573ccbadb 100644
--- a/sw/host/tests/chip/rv_dm/src/control_status.rs
+++ b/sw/host/tests/chip/rv_dm/src/control_status.rs
@@ -5,8 +5,8 @@
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
-use opentitanlib::debug::dmi::{consts, DmiDebugger, OpenOcdDmi};
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::debug::dmi::{DmiDebugger, OpenOcdDmi, consts};
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
 
@@ -21,7 +21,7 @@ const RISCV_IDCODE: u32 = 0x10001cdf;
 
 fn test_control_status(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let mut openocd = opts.init.jtag_params.create(transport)?.into_raw()?;
 
diff --git a/sw/host/tests/chip/rv_dm/src/csr_rw.rs b/sw/host/tests/chip/rv_dm/src/csr_rw.rs
index cd21f20f01cdb..535a6e4e474ce 100644
--- a/sw/host/tests/chip/rv_dm/src/csr_rw.rs
+++ b/sw/host/tests/chip/rv_dm/src/csr_rw.rs
@@ -4,11 +4,11 @@
 
 use std::time::Duration;
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use clap::Parser;
 use rand::prelude::*;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{Jtag, JtagTap};
 use opentitanlib::test_utils::init::InitializeTest;
@@ -54,12 +54,12 @@ fn test(jtag: &mut dyn Jtag, base: usize, offset: u32) -> Result<()> {
 }
 
 fn test_csr_rw(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let seed = opts.seed.unwrap_or_else(|| thread_rng().gen());
+    let seed = opts.seed.unwrap_or_else(|| thread_rng().r#gen());
     log::info!("Random number generator seed is {:x}", seed);
     let mut rng = rand_chacha::ChaCha12Rng::seed_from_u64(seed);
 
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let uart = &*transport.uart("console")?;
     uart.set_flow_control(true)?;
 
@@ -68,7 +68,7 @@ fn test_csr_rw(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     } else {
         // Avoid watchdog timeout by entering bootstrap mode.
         transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-        transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
     }
 
     let jtag = &mut *opts
diff --git a/sw/host/tests/chip/rv_dm/src/dtm.rs b/sw/host/tests/chip/rv_dm/src/dtm.rs
index 50974bd78bc16..a8c3fcf5d3535 100644
--- a/sw/host/tests/chip/rv_dm/src/dtm.rs
+++ b/sw/host/tests/chip/rv_dm/src/dtm.rs
@@ -5,7 +5,7 @@
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::dmi::{DmiDebugger, OpenOcdDmi};
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -22,7 +22,7 @@ const RISCV_IDCODE: u32 = 0x10001cdf;
 #[allow(clippy::unusual_byte_groupings)]
 fn test_dtm(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let mut openocd = opts.init.jtag_params.create(transport)?.into_raw()?;
 
diff --git a/sw/host/tests/chip/rv_dm/src/jtag.rs b/sw/host/tests/chip/rv_dm/src/jtag.rs
index 166428f8b4e6f..b861bae9ec5a8 100644
--- a/sw/host/tests/chip/rv_dm/src/jtag.rs
+++ b/sw/host/tests/chip/rv_dm/src/jtag.rs
@@ -5,7 +5,7 @@
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
 
@@ -23,7 +23,7 @@ fn test_jtag(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
 
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let mut openocd = opts.init.jtag_params.create(transport)?.into_raw()?;
 
diff --git a/sw/host/tests/chip/rv_dm/src/jtag_tap_sel.rs b/sw/host/tests/chip/rv_dm/src/jtag_tap_sel.rs
index 455d2328d2836..4e6b3e43b0f4c 100644
--- a/sw/host/tests/chip/rv_dm/src/jtag_tap_sel.rs
+++ b/sw/host/tests/chip/rv_dm/src/jtag_tap_sel.rs
@@ -7,7 +7,7 @@ use clap::Parser;
 use once_cell::sync::Lazy;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -32,7 +32,7 @@ fn test_jtag_tap_sel(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
 
     // Test the LC TAP
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let mut jtag = opts
         .init
@@ -63,7 +63,7 @@ fn test_jtag_tap_sel(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Test RISC-V TAP
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
     if needs_reset {
-        transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
     }
 
     let jtag = opts
@@ -90,7 +90,7 @@ fn test_jtag_tap_sel(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Test DFT TAP
     transport.pin_strapping("PINMUX_TAP_DFT")?.apply()?;
     if needs_reset {
-        transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
     }
 
     // If RV-DM is disabled, strapping DFT tap will result in LC TAP being selected.
@@ -130,7 +130,7 @@ fn test_jtag_tap_sel(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
 
     transport.pin_strapping("PINMUX_TAP_DFT")?.remove()?;
     if needs_reset {
-        transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
     }
 
     // Now check that there's no JTAG TAP present.
diff --git a/sw/host/tests/chip/rv_dm/src/lc_disabled.rs b/sw/host/tests/chip/rv_dm/src/lc_disabled.rs
index 0161a86369401..b157c5196e96f 100644
--- a/sw/host/tests/chip/rv_dm/src/lc_disabled.rs
+++ b/sw/host/tests/chip/rv_dm/src/lc_disabled.rs
@@ -5,7 +5,7 @@
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -26,7 +26,7 @@ fn access_jtag(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Reset into RV_DM for testing.
     transport.pin_strapping("PINMUX_TAP_LC")?.remove()?;
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let jtag_result = opts
         .init
diff --git a/sw/host/tests/chip/rv_dm/src/mem_access.rs b/sw/host/tests/chip/rv_dm/src/mem_access.rs
index 76cd8dba80134..c81bb1575917f 100644
--- a/sw/host/tests/chip/rv_dm/src/mem_access.rs
+++ b/sw/host/tests/chip/rv_dm/src/mem_access.rs
@@ -3,15 +3,17 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use std::path::PathBuf;
+use std::time::Duration;
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Parser;
 use rand::prelude::*;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
 use opentitanlib::util::parse_int::ParseInt;
 
 use bindgen::dif;
@@ -26,9 +28,16 @@ struct Opts {
     #[arg(long)]
     rom: PathBuf,
 
+    #[arg(long)]
+    rv_dm_delayed_enable: bool,
+
     /// Seed for random number generator.
     #[arg(long, value_parser = u64::from_str)]
     seed: Option<u64>,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "100s")]
+    timeout: Duration,
 }
 
 const NUM_ACCESSES_PER_REGION: usize = 32;
@@ -37,15 +46,23 @@ const NUM_ACCESSES_PER_REGION: usize = 32;
 const ROM_ACCESSIBLE_BYTES: usize = top_earlgrey::ROM_SIZE_BYTES - 32;
 
 fn test_mem_access(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let seed = opts.seed.unwrap_or_else(|| thread_rng().gen());
+    let seed = opts.seed.unwrap_or_else(|| thread_rng().r#gen());
     log::info!("Random number generator seed is {:x}", seed);
     let mut rng = rand_chacha::ChaCha12Rng::seed_from_u64(seed);
 
-    // Avoid watchdog timeout by entering bootstrap mode.
-    transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
+    let uart = &*transport.uart("console")?;
+    uart.set_flow_control(true)?;
+
+    log::info!("rv_dm_delayed_enable: {}", opts.rv_dm_delayed_enable);
+    if opts.rv_dm_delayed_enable {
+        UartConsole::wait_for(uart, r"DEBUG_MODE_ENABLED", opts.timeout)?;
+    } else {
+        // Avoid watchdog timeout by entering bootstrap mode.
+        transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
+        transport.reset(UartRx::Clear)?;
+    }
 
     let jtag = &mut *opts
         .init
@@ -87,7 +104,7 @@ fn test_mem_access(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
                 .step_by(4)
                 .choose_multiple(&mut rng, NUM_ACCESSES_PER_REGION)
                 .into_iter()
-                .map(|offset| (name, base, offset, rng.gen::<u32>())),
+                .map(|offset| (name, base, offset, rng.r#gen::<u32>())),
         );
     }
 
@@ -122,7 +139,9 @@ fn test_mem_access(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         let addr = base + offset;
         let mut readback = 0;
         jtag.read_memory32(addr, std::slice::from_mut(&mut readback))?;
-        log::info!("Reading from {name} (base {base:#x}) offset {offset:#x} with value {readback:#x} (expecting {value:#x})");
+        log::info!(
+            "Reading from {name} (base {base:#x}) offset {offset:#x} with value {readback:#x} (expecting {value:#x})"
+        );
         ensure!(value == readback);
     }
 
diff --git a/sw/host/tests/chip/rv_dm/src/ndm_reset_req.rs b/sw/host/tests/chip/rv_dm/src/ndm_reset_req.rs
index 91f897f66ad92..948ef2e35a905 100644
--- a/sw/host/tests/chip/rv_dm/src/ndm_reset_req.rs
+++ b/sw/host/tests/chip/rv_dm/src/ndm_reset_req.rs
@@ -7,8 +7,8 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
-use opentitanlib::debug::dmi::{consts, DmiDebugger, OpenOcdDmi};
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::debug::dmi::{DmiDebugger, OpenOcdDmi, consts};
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::uart::console::UartConsole;
@@ -29,7 +29,7 @@ const RISCV_IDCODE: u32 = 0x10001cdf;
 fn test_ndm_reset_req(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Enable console and wait for the message.
     let uart = transport.uart("console")?;
diff --git a/sw/host/tests/chip/rv_dm/src/ndm_reset_req_when_cpu_halted.rs b/sw/host/tests/chip/rv_dm/src/ndm_reset_req_when_cpu_halted.rs
index bcdc11ff314ba..e921ef0947efc 100644
--- a/sw/host/tests/chip/rv_dm/src/ndm_reset_req_when_cpu_halted.rs
+++ b/sw/host/tests/chip/rv_dm/src/ndm_reset_req_when_cpu_halted.rs
@@ -7,7 +7,7 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{JtagTap, RiscvCsr};
 use opentitanlib::test_utils::init::InitializeTest;
@@ -31,7 +31,7 @@ const DCSR_CAUSE_HALTREQ: u32 = 0x3 << DCSR_CAUSE_SHIFT;
 fn test_ndm_reset_req_when_halted(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Enable console and wait for the message.
     let uart = transport.uart("console")?;
diff --git a/sw/host/tests/chip/spi_device/BUILD b/sw/host/tests/chip/spi_device/BUILD
index fd3d0059f3e60..8b21215dcf9c9 100644
--- a/sw/host/tests/chip/spi_device/BUILD
+++ b/sw/host/tests/chip/spi_device/BUILD
@@ -13,12 +13,12 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:regex",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
         "@crate_index//:object",
+        "@crate_index//:regex",
     ],
 )
 
@@ -29,13 +29,13 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:rand",
-        "//third_party/rust/crates:regex",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
         "@crate_index//:object",
+        "@crate_index//:rand",
+        "@crate_index//:regex",
     ],
 )
 
@@ -62,12 +62,12 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:object",
+        "@crate_index//:regex",
         "@crate_index//:serde_json",
     ],
 )
@@ -79,12 +79,12 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:object",
+        "@crate_index//:regex",
         "@crate_index//:serde_json",
     ],
 )
diff --git a/sw/host/tests/chip/spi_device/src/spi_device_flash_smoketest.rs b/sw/host/tests/chip/spi_device/src/spi_device_flash_smoketest.rs
index 62e59bea77c15..e793f1296963d 100644
--- a/sw/host/tests/chip/spi_device/src/spi_device_flash_smoketest.rs
+++ b/sw/host/tests/chip/spi_device/src/spi_device_flash_smoketest.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use regex::Regex;
 use std::fs;
@@ -46,6 +46,9 @@ fn device_tx_rx_test(
     let uart = transport.uart("console")?;
     let spi = transport.spi(&opts.spi)?;
 
+    /* Wait for sync message. */
+    let _ = UartConsole::wait_for(&*uart, SYNC_MSG, opts.timeout)?;
+
     let mut flash = SpiFlash {
         // Double the flash size so we can test 3b and 4b addresses.
         size: 32 * 1024 * 1024,
@@ -60,10 +63,11 @@ fn device_tx_rx_test(
     };
     flash.set_address_mode(&*spi, mode)?;
 
-    /* Wait sync message. */
-    let _ = UartConsole::wait_for(&*uart, SYNC_MSG, opts.timeout)?;
     flash.program(&*spi, address, data)?;
 
+    /* Wait for sync message. */
+    let _ = UartConsole::wait_for(&*uart, SYNC_MSG, opts.timeout)?;
+
     let mut buffer = vec![0xff; data.len()];
     flash.read(&*spi, address, &mut buffer)?;
 
diff --git a/sw/host/tests/chip/spi_device/src/spi_device_sleep_test.rs b/sw/host/tests/chip/spi_device/src/spi_device_sleep_test.rs
index e4cf753b3f90d..da97edfa26ead 100644
--- a/sw/host/tests/chip/spi_device/src/spi_device_sleep_test.rs
+++ b/sw/host/tests/chip/spi_device/src/spi_device_sleep_test.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use regex::Regex;
 use std::time::Duration;
diff --git a/sw/host/tests/chip/spi_device/src/spi_device_tpm_test.rs b/sw/host/tests/chip/spi_device/src/spi_device_tpm_test.rs
index bae2ca7353113..3544ac7ce092a 100644
--- a/sw/host/tests/chip/spi_device/src/spi_device_tpm_test.rs
+++ b/sw/host/tests/chip/spi_device/src/spi_device_tpm_test.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use regex::Regex;
 use std::path::PathBuf;
diff --git a/sw/host/tests/chip/spi_device/src/spi_host_config_test.rs b/sw/host/tests/chip/spi_device/src/spi_host_config_test.rs
index 4d504b6895ca1..0b5e3ea4e85e0 100644
--- a/sw/host/tests/chip/spi_device/src/spi_host_config_test.rs
+++ b/sw/host/tests/chip/spi_device/src/spi_host_config_test.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use regex::Regex;
 use std::time::Duration;
@@ -94,22 +94,28 @@ fn spi_host_config_test(
         waveform,
     )?;
 
-    let mut decoder = test_utils::bitbanging::spi::decoder::Decoder::<
+    let decoder = test_utils::bitbanging::spi::SpiBitbangDecoder::<
         SPI_PIN_D0,
         SPI_PIN_D1,
         0, // D2, not in use.
         0, // D3, not in use.
         SPI_PIN_SCL,
         SPI_PIN_CS,
-    > {
-        cpol: ctx.cpol == 1,
-        cpha: ctx.cpha == 1,
-        data_mode: test_utils::bitbanging::spi::SpiDataMode::Single,
-    };
+    >::new(
+        test_utils::bitbanging::spi::SpiBitbangConfig {
+            cpol: ctx.cpol == 1,
+            cpha: ctx.cpha == 1,
+            data_mode: test_utils::bitbanging::spi::SpiDataMode::Single,
+            bits_per_word: 8,
+        },
+        test_utils::bitbanging::spi::SpiEndpoint::Device,
+    );
     let decoded = decoder.run(samples.to_owned())?;
     assert_eq!(
         decoded,
-        vec![0x06, 0x02, 0x00, 0x00, 0x00, 0xab, 0xcd, 0xef, 0xab, 0x05, 0x80,]
+        vec![
+            0x06, 0x02, 0x00, 0x00, 0x00, 0xab, 0xcd, 0xef, 0xab, 0x05, 0x80,
+        ]
     );
     println!("decoded: {:?}", decoded);
 
diff --git a/sw/host/tests/chip/spi_device_ottf_console/BUILD b/sw/host/tests/chip/spi_device_ottf_console/BUILD
new file mode 100644
index 0000000000000..a18d407d02583
--- /dev/null
+++ b/sw/host/tests/chip/spi_device_ottf_console/BUILD
@@ -0,0 +1,23 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "spi_device_ottf_console",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+        "@crate_index//:regex",
+    ],
+)
diff --git a/sw/host/tests/chip/spi_device_ottf_console/src/main.rs b/sw/host/tests/chip/spi_device_ottf_console/src/main.rs
new file mode 100644
index 0000000000000..e8a9911f239e1
--- /dev/null
+++ b/sw/host/tests/chip/spi_device_ottf_console/src/main.rs
@@ -0,0 +1,131 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use regex::Regex;
+use std::fs;
+use std::path::PathBuf;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
+use opentitanlib::execute_test;
+use opentitanlib::io::console::ConsoleDevice;
+use opentitanlib::test_utils;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::{ExitStatus, UartConsole};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
+    timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+}
+
+const SYNC_MSG: &str = r"SYNC:.*\r\n";
+
+fn spi_device_console_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let mut console = UartConsole {
+        timeout: Some(opts.timeout),
+        exit_success: Some(Regex::new(r"PASS.*\n")?),
+        exit_failure: Some(Regex::new(r"(FAIL|FAULT).*\n")?),
+        newline: true,
+        ..Default::default()
+    };
+    let mut stdout = std::io::stdout();
+    let spi = transport.spi(&opts.console_spi)?;
+
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
+
+    /* Load the ELF binary and get the expect data.*/
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let object = object::File::parse(&*elf_binary)?;
+    let mut data = test_utils::object::symbol_data(&object, "kTestStr")?;
+    let mut data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+    _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+    log::info!("Sending test string to Device...");
+    _ = UartConsole::wait_for(&spi_console_device, SYNC_MSG, opts.timeout)?;
+    spi_console_device.console_write(&data)?;
+
+    data = test_utils::object::symbol_data(&object, "kTest64bDataStr")?;
+    data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+    _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+    log::info!("Sending 64B data to Device...");
+    _ = UartConsole::wait_for(&spi_console_device, SYNC_MSG, opts.timeout)?;
+    spi_console_device.console_write(&data)?;
+
+    data = test_utils::object::symbol_data(&object, "kTest256bDataStr")?;
+    data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+    _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+    log::info!("Sending 256 data to Device...");
+    _ = UartConsole::wait_for(&spi_console_device, SYNC_MSG, opts.timeout)?;
+    spi_console_device.console_write(&data)?;
+
+    data = test_utils::object::symbol_data(&object, "kTest1KbDataStr")?;
+    data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+    // 1KB data will be sent twice.
+    for _round in 0..2 {
+        _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+        log::info!("Sending 1KB data to Device...");
+        _ = UartConsole::wait_for(&spi_console_device, SYNC_MSG, opts.timeout)?;
+        spi_console_device.console_write(&data)?;
+    }
+
+    data = test_utils::object::symbol_data(&object, "kTest4KbDataStr")?;
+    data_str = std::str::from_utf8(&data)?.trim_matches(char::from(0));
+    _ = UartConsole::wait_for(&spi_console_device, data_str, opts.timeout)?;
+    // 4KB data will be sent twice.
+    for _round in 0..2 {
+        log::info!("Sending 4KB data to Device...");
+        _ = UartConsole::wait_for(&spi_console_device, SYNC_MSG, opts.timeout)?;
+        spi_console_device.console_write(&data)?;
+    }
+
+    let result = console.interact(&spi_console_device, None, Some(&mut stdout))?;
+    match result {
+        ExitStatus::None | ExitStatus::CtrlC => Ok(()),
+        ExitStatus::Timeout => {
+            if console.exit_success.is_some() {
+                Err(anyhow!("Console timeout exceeded"))
+            } else {
+                Ok(())
+            }
+        }
+        ExitStatus::ExitSuccess => {
+            log::info!(
+                "ExitSuccess({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Ok(())
+        }
+        ExitStatus::ExitFailure => {
+            log::info!(
+                "ExitFailure({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Err(anyhow!("Matched exit_failure expression"))
+        }
+    }
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    execute_test!(spi_device_console_test, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/chip/spi_device_ujson_console_test/BUILD b/sw/host/tests/chip/spi_device_ujson_console_test/BUILD
new file mode 100644
index 0000000000000..3945aa327a06f
--- /dev/null
+++ b/sw/host/tests/chip/spi_device_ujson_console_test/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "spi_device_ujson_console_test",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/provisioning/ujson_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+        "@crate_index//:once_cell",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/chip/spi_device_ujson_console_test/src/main.rs b/sw/host/tests/chip/spi_device_ujson_console_test/src/main.rs
new file mode 100644
index 0000000000000..fe46ff307af92
--- /dev/null
+++ b/sw/host/tests/chip/spi_device_ujson_console_test/src/main.rs
@@ -0,0 +1,130 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::Result;
+use clap::Parser;
+use object::{Object, ObjectSymbol};
+use opentitanlib::console::spi::SpiConsoleDevice;
+use opentitanlib::execute_test;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::mem::{MemRead32Req, MemReadReq, MemWrite32Req, MemWriteReq};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use std::collections::HashMap;
+use std::fs;
+use std::path::PathBuf;
+use std::time::Duration;
+use ujson_lib::provisioning_data::PersoBlob;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "60s")]
+    timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Path to the firmware's ELF file, for querying symbol addresses.
+    #[arg(value_name = "FIRMWARE_ELF")]
+    firmware_elf: PathBuf,
+}
+
+const SYNC_MSG: &str = r"SYNC:.*\r\n";
+
+fn test_perso_blob_strcut(opts: &Opts, spi_console: &SpiConsoleDevice) -> Result<()> {
+    UartConsole::wait_for(spi_console, SYNC_MSG, opts.timeout)?;
+    let perso_blob = PersoBlob::recv(spi_console, opts.timeout, true, false)?;
+    UartConsole::wait_for(spi_console, SYNC_MSG, opts.timeout)?;
+    perso_blob.send(spi_console)?;
+    Ok(())
+}
+
+fn test_mem_word_commands(
+    _opts: &Opts,
+    test_word_address: u32,
+    spi_console: &SpiConsoleDevice,
+) -> Result<()> {
+    let read_value = MemRead32Req::execute(spi_console, test_word_address)?;
+    assert!(read_value == 0xface1234_u32);
+
+    let expected_value = 0x12345678_u32;
+    MemWrite32Req::execute(spi_console, test_word_address, expected_value)?;
+    let read_value = MemRead32Req::execute(spi_console, test_word_address)?;
+    assert!(read_value == expected_value);
+    Ok(())
+}
+
+fn test_mem_array_commands(
+    _opts: &Opts,
+    test_bytes_address: u32,
+    spi_console: &SpiConsoleDevice,
+) -> Result<()> {
+    let mut data: [u8; 256] = [0; 256];
+    MemReadReq::execute(spi_console, test_bytes_address, data.as_mut_slice())?;
+    let mut expected_value = Vec::<u8>::from_iter(0..=255);
+    assert!(data.as_slice() == expected_value.as_slice());
+
+    data.reverse();
+    expected_value.reverse();
+    MemWriteReq::execute(spi_console, test_bytes_address, expected_value.as_slice())?;
+    MemReadReq::execute(spi_console, test_bytes_address, data.as_mut_slice())?;
+    assert!(data.as_slice() == expected_value.as_slice());
+    Ok(())
+}
+
+fn test_end(opts: &Opts, end_test_address: u32, spi_console: &SpiConsoleDevice) -> Result<()> {
+    let end_test_value = MemRead32Req::execute(spi_console, end_test_address)?;
+    assert!(end_test_value == 0);
+    MemWrite32Req::execute(spi_console, end_test_address, /*value=*/ 1)?;
+    let _ = UartConsole::wait_for(spi_console, r"PASS![^\r\n]*", opts.timeout)?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let elf_binary = fs::read(&opts.firmware_elf)?;
+    let elf_file = object::File::parse(&*elf_binary)?;
+    let mut symbols = HashMap::<String, u32>::new();
+    for sym in elf_file.symbols() {
+        symbols.insert(sym.name()?.to_owned(), sym.address() as u32);
+    }
+    let end_test_address = symbols
+        .get("kEndTest")
+        .expect("Provided ELF missing 'kEndTest' symbol");
+    let test_word_address = symbols
+        .get("kTestWord")
+        .expect("Provided ELF missing 'kTestWord' symbol");
+    let test_bytes_address = symbols
+        .get("kTestBytes")
+        .expect("Provided ELF missing 'kTestBytes' symbol");
+
+    let transport = opts.init.init_target()?;
+    let spi = transport.spi(&opts.console_spi)?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
+
+    execute_test!(test_perso_blob_strcut, &opts, &spi_console_device);
+    execute_test!(
+        test_mem_word_commands,
+        &opts,
+        *test_word_address,
+        &spi_console_device
+    );
+    execute_test!(
+        test_mem_array_commands,
+        &opts,
+        *test_bytes_address,
+        &spi_console_device
+    );
+    execute_test!(test_end, &opts, *end_test_address, &spi_console_device);
+    Ok(())
+}
diff --git a/sw/host/tests/chip/sram_ctrl/BUILD b/sw/host/tests/chip/sram_ctrl/BUILD
index 8a33db83e18da..6bec7ff02d32c 100644
--- a/sw/host/tests/chip/sram_ctrl/BUILD
+++ b/sw/host/tests/chip/sram_ctrl/BUILD
@@ -13,10 +13,10 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:object",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
     ],
 )
diff --git a/sw/host/tests/chip/sram_ctrl/src/sram_ctrl_lc_escalation.rs b/sw/host/tests/chip/sram_ctrl/src/sram_ctrl_lc_escalation.rs
index 3c60cbfd88f16..82204e7de8385 100644
--- a/sw/host/tests/chip/sram_ctrl/src/sram_ctrl_lc_escalation.rs
+++ b/sw/host/tests/chip/sram_ctrl/src/sram_ctrl_lc_escalation.rs
@@ -12,10 +12,10 @@ use std::fs;
 use std::path::PathBuf;
 use std::time::Duration;
 
-use anyhow::{ensure, Context, Result};
+use anyhow::{Context, Result, ensure};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{Jtag, JtagTap};
 use opentitanlib::io::uart::Uart;
@@ -115,7 +115,7 @@ fn lc_escalation(
 
     // Reset the chip and try again - the SRAMs should now be unlocked.
     jtag.disconnect()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = opts
         .init
         .jtag_params
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl.rs
index 2243d0c166ffd..18d5f2400da74 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl.rs
@@ -1,7 +1,7 @@
 // Copyright lowRISC contributors (OpenTitan project).
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 
 use opentitanlib::app::TransportWrapper;
 use opentitanlib::io::gpio::{PinMode, PullMode};
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ec_rst_l.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ec_rst_l.rs
index 4bade1f027210..b4aaf1559a3e3 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ec_rst_l.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ec_rst_l.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use clap::Parser;
 use once_cell::sync::Lazy;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::gpio::{Edge, MonitoringEvent, PinMode};
 use opentitanlib::io::uart::Uart;
@@ -16,7 +16,7 @@ use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{read_pins, set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, read_pins, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
@@ -74,9 +74,7 @@ fn chip_sw_sysrst_ctrl_input(params: &Params) -> Result<()> {
 
     // Reset target now so that we can be sure that the pins are in the right
     // configuration before running the test.
-    params
-        .transport
-        .reset_target(params.opts.init.bootstrap.options.reset_delay, true)?;
+    params.transport.reset(UartRx::Clear)?;
 
     // Wait until device has setup pins and is waiting for combo.
     sync_with_sw(params)?;
@@ -200,8 +198,8 @@ fn chip_sw_sysrst_ctrl_input(params: &Params) -> Result<()> {
             ensure!(first_index == gpio_mon.signal_index("ec_rst_l").unwrap() as u8);
             ensure!(second_index == gpio_mon.signal_index("ec_rst_l").unwrap() as u8);
             // Make sure the pulse width matches what we expect.
-            let pulse_width_us = (gpio_mon.timestamp_ns(rise_timestamp)
-                - gpio_mon.timestamp_ns(fall_timestamp))
+            let pulse_width_us = (gpio_mon.timestamp_to_ns(rise_timestamp)
+                - gpio_mon.timestamp_to_ns(fall_timestamp))
                 / 1000;
             let delta = EC_RST_STRETCH_PULSE_WIDTH_USEC.abs_diff(pulse_width_us);
             log::info!("reset pulse width =  {pulse_width_us} us, delta = {delta} us");
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_in_irq.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_in_irq.rs
index 7727f74688462..40451be214870 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_in_irq.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_in_irq.rs
@@ -18,7 +18,7 @@ use opentitanlib::test_utils::mem::MemWriteReq;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_inputs.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_inputs.rs
index af6d7ac351bcd..6520f6b369731 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_inputs.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_inputs.rs
@@ -19,7 +19,7 @@ use opentitanlib::test_utils::mem::MemWriteReq;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_outputs.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_outputs.rs
index 83924189a3f72..14568a814bc30 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_outputs.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_outputs.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Parser;
 use once_cell::sync::Lazy;
 use std::fs;
@@ -18,7 +18,7 @@ use opentitanlib::test_utils::mem::MemWriteReq;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{read_pins, set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, read_pins, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_reset.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_reset.rs
index c52211c03ba07..ba4f19d5bc70c 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_reset.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_reset.rs
@@ -2,13 +2,13 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{ensure, Result};
+use anyhow::{Result, ensure};
 use clap::Parser;
 use once_cell::sync::Lazy;
 use std::path::PathBuf;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::gpio::PinMode;
 use opentitanlib::io::uart::Uart;
@@ -16,7 +16,7 @@ use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
@@ -101,7 +101,7 @@ fn chip_sw_sysrst_ctrl_reset(
     set_test_phase(transport, TestPhase::CheckComboReset)?;
     set_pins(transport, config, PADS_VALUE_INIT)?;
     // Reset target.
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Wait until target has prepared for the test.
     UartConsole::wait_for(uart, &TestStatus::InWfi.wait_pattern(), opts.timeout)?;
diff --git a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ulp_z3_wakeup.rs b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ulp_z3_wakeup.rs
index 47eae6c42a5c1..06dda181841d7 100644
--- a/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ulp_z3_wakeup.rs
+++ b/sw/host/tests/chip/sysrst_ctrl/sysrst_ctrl_ulp_z3_wakeup.rs
@@ -2,12 +2,12 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use clap::Parser;
 use once_cell::sync::Lazy;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::gpio::{Edge, MonitoringEvent, PinMode};
 use opentitanlib::io::uart::Uart;
@@ -16,7 +16,7 @@ use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::test_status::TestStatus;
 use opentitanlib::uart::console::UartConsole;
 
-use sysrst_ctrl::{read_pins, set_pins, setup_pins, Config};
+use sysrst_ctrl::{Config, read_pins, set_pins, setup_pins};
 
 #[derive(Debug, Parser)]
 struct Opts {
@@ -103,7 +103,7 @@ fn chip_sw_sysrst_ctrl_ulp_z3_wakeup(
     set_test_phase(transport, TestPhase::Init)?;
 
     // Reset target.
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     // Set pins to zero.
     set_pins(transport, config, pins_initial)?;
 
diff --git a/sw/host/tests/chip/uart/BUILD b/sw/host/tests/chip/uart/BUILD
index f723d0f90aaf7..02cf0ed12f20a 100644
--- a/sw/host/tests/chip/uart/BUILD
+++ b/sw/host/tests/chip/uart/BUILD
@@ -13,12 +13,12 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:object",
-        "//third_party/rust/crates:serialport",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
+        "@crate_index//:serialport",
     ],
 )
 
@@ -29,11 +29,11 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:object",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
     ],
 )
 
@@ -44,11 +44,11 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:object",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
     ],
 )
 
@@ -59,10 +59,10 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:object",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:object",
     ],
 )
diff --git a/sw/host/tests/chip/uart/src/uart_baud_rate.rs b/sw/host/tests/chip/uart/src/uart_baud_rate.rs
index 2c46df4ca75b7..0f11db148dce5 100644
--- a/sw/host/tests/chip/uart/src/uart_baud_rate.rs
+++ b/sw/host/tests/chip/uart/src/uart_baud_rate.rs
@@ -10,7 +10,7 @@ use std::time::Duration;
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::uart::Uart;
 use opentitanlib::test_utils;
@@ -66,7 +66,7 @@ fn main() -> Result<()> {
     let uart_console = transport.uart("console")?;
 
     for uart_idx in 0..4 {
-        transport.reset_target(Duration::from_millis(500), true)?;
+        transport.reset_with_delay(UartRx::Clear, Duration::from_millis(500))?;
 
         let test_data = TestData {
             expected_data: expected_data.clone(),
@@ -85,6 +85,12 @@ fn main() -> Result<()> {
         );
     }
 
+    // Reset baud rate to the default.
+    // HyperDebug doesn't seem to clear this properly between tests.
+    let uart = transport.uart("dut")?;
+    uart.set_baudrate(115200)?;
+    uart.clear_rx_buffer()?;
+
     Ok(())
 }
 
@@ -122,6 +128,7 @@ fn uart_baud_rate(
         }
 
         // Read the configured baud rate and configure our side of the UART.
+        UartConsole::wait_for(console, r"waiting for commands", opts.timeout)?;
         let baud_rate = MemRead32Req::execute(console, *baud_rate_addr)?;
         uart.set_baudrate(baud_rate)?;
         uart.clear_rx_buffer()?;
diff --git a/sw/host/tests/chip/uart/src/uart_loopback.rs b/sw/host/tests/chip/uart/src/uart_loopback.rs
index e8152e5edeb59..f4834bcb519bc 100644
--- a/sw/host/tests/chip/uart/src/uart_loopback.rs
+++ b/sw/host/tests/chip/uart/src/uart_loopback.rs
@@ -11,7 +11,7 @@ use anyhow::{Context, Result};
 use clap::Parser;
 use object::read::File;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::uart::Uart;
 use opentitanlib::test_utils;
@@ -61,7 +61,7 @@ fn main() -> Result<()> {
     let uart_console = transport.uart("console")?;
 
     for uart_idx in 0..4 {
-        transport.reset_target(Duration::from_millis(500), true)?;
+        transport.reset_with_delay(UartRx::Clear, Duration::from_millis(500))?;
 
         let test_data = TestData {
             uart_idx,
diff --git a/sw/host/tests/chip/uart/src/uart_parity_break.rs b/sw/host/tests/chip/uart/src/uart_parity_break.rs
index fd09887963be1..56700fd0ff30f 100644
--- a/sw/host/tests/chip/uart/src/uart_parity_break.rs
+++ b/sw/host/tests/chip/uart/src/uart_parity_break.rs
@@ -10,7 +10,7 @@ use std::time::Duration;
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::uart::{Parity, Uart};
 use opentitanlib::test_utils;
@@ -69,7 +69,7 @@ fn main() -> Result<()> {
     // Test all four UARTs with both parities.
     for uart_id in 0..4 {
         for parity in [Parity::Odd, Parity::Even, Parity::None] {
-            transport.reset_target(Duration::from_millis(500), true)?;
+            transport.reset_with_delay(UartRx::Clear, Duration::from_millis(500))?;
 
             let test_data = TestData {
                 uart_id,
diff --git a/sw/host/tests/chip/uart/src/uart_tx_rx.rs b/sw/host/tests/chip/uart/src/uart_tx_rx.rs
index 449d76344998a..26be070e0bf5c 100644
--- a/sw/host/tests/chip/uart/src/uart_tx_rx.rs
+++ b/sw/host/tests/chip/uart/src/uart_tx_rx.rs
@@ -11,7 +11,7 @@ use anyhow::{Context, Result};
 use clap::Parser;
 use object::{Object, ObjectSymbol};
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::uart::{Parity, Uart};
 use opentitanlib::test_utils;
@@ -66,7 +66,7 @@ fn main() -> Result<()> {
     let uart_console = transport.uart("console")?;
 
     for uart_id in 0..4 {
-        transport.reset_target(Duration::from_millis(500), true)?;
+        transport.reset_with_delay(UartRx::Clear, Duration::from_millis(500))?;
 
         let test_data = TestData {
             tx_rx_data: &tx_rx_data,
diff --git a/sw/host/tests/chip/usb/BUILD b/sw/host/tests/chip/usb/BUILD
index a5babf53e81fc..35c685b548939 100644
--- a/sw/host/tests/chip/usb/BUILD
+++ b/sw/host/tests/chip/usb/BUILD
@@ -37,6 +37,23 @@ rust_binary(
     ],
 )
 
+rust_binary(
+    name = "usbdev_suspend",
+    srcs = [
+        "usbdev_suspend.rs",
+    ],
+    deps = [
+        ":usb",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:rusb",
+        "@crate_index//:strum",
+    ],
+)
+
 rust_binary(
     name = "usb_harness",
     srcs = [
@@ -51,3 +68,38 @@ rust_binary(
         "@crate_index//:log",
     ],
 )
+
+rust_binary(
+    name = "usbdev_smoketest",
+    srcs = [
+        "usbdev_smoketest.rs",
+    ],
+    deps = [
+        ":usb",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:rusb",
+        "@crate_index//:serialport",
+    ],
+)
+
+rust_binary(
+    name = "silicon_creator_harness",
+    srcs = [
+        "silicon_creator_harness.rs",
+    ],
+    deps = [
+        ":usb",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:hex",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:rand",
+        "@crate_index//:rusb",
+    ],
+)
diff --git a/sw/host/tests/chip/usb/silicon_creator_harness.rs b/sw/host/tests/chip/usb/silicon_creator_harness.rs
new file mode 100644
index 0000000000000..6fdbc8b15519d
--- /dev/null
+++ b/sw/host/tests/chip/usb/silicon_creator_harness.rs
@@ -0,0 +1,225 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail, ensure};
+use clap::Parser;
+use rand::prelude::*;
+use std::path::PathBuf;
+use std::time::{Duration, Instant};
+
+use opentitanlib::crypto::sha256::Sha256Digest;
+use opentitanlib::execute_test;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+use rusb::{Direction, Recipient, RequestType};
+use usb::{UsbDeviceHandle, UsbOpts, port_path_string};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console/USB timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "60s")]
+    timeout: Duration,
+
+    /// USB options.
+    #[command(flatten)]
+    usb: UsbOpts,
+
+    /// Do not wait for USB device to appear before continuing with the test.
+    #[arg(long, default_value_t = false)]
+    no_wait_for_usb_device: bool,
+
+    /// Executable to run after USB device connection.
+    /// This harness will spawn a process to execute and continue monitoring the UART
+    /// until the test passes (or fails). After that, the process will be killed.
+    /// Unless `no_wait_for_usb_device` is set, the harness will pass two extra arguments
+    /// to the executable to specify the bus and address of the USB device, as follows:
+    /// `--devide <bus>:<addr>`.
+    #[arg(long)]
+    exec: Option<PathBuf>,
+
+    /// Arguments to pass to the executable.
+    #[arg(long)]
+    exec_arg: Vec<std::ffi::OsString>,
+}
+
+fn wait_for_device(opts: &Opts) -> Result<UsbDeviceHandle> {
+    log::info!("waiting for device...");
+    let mut devices = opts.usb.wait_for_device(opts.timeout)?;
+    if devices.is_empty() {
+        bail!("no USB device found");
+    }
+    if devices.len() > 1 {
+        log::error!("several USB devices found:");
+        for dev in devices {
+            log::error!(
+                "- bus={} address={}",
+                dev.device().bus_number(),
+                dev.device().address()
+            );
+        }
+        bail!("several USB devices found");
+    }
+    let device = devices.remove(0);
+    log::info!(
+        "device found at bus={}, address={}, path={}",
+        device.device().bus_number(),
+        device.device().address(),
+        port_path_string(&device.device())?
+    );
+    Ok(device)
+}
+
+#[repr(u8)]
+#[allow(dead_code)]
+enum TestReq {
+    Randomize = 1,
+    Digest,
+    BulkIn,
+    BulkOut,
+    Exit,
+}
+
+const TIMEOUT: Duration = Duration::from_secs(5);
+const RQTYPE: u8 = rusb::request_type(Direction::In, RequestType::Vendor, Recipient::Device);
+
+fn receive_random_buffer(dev: &UsbDeviceHandle, short_len: Option<usize>) -> Result<()> {
+    let mut buffer = vec![0u8; 65536];
+    // Determine if the test requests a shorter length than the full buffer length.
+    // We pass this (possibly short) length in the `value` field of the control transactions
+    // to indicate to the DUT the actual length.
+    // We compute the length minus one because the `value` field is a u16 and we have a
+    // maximum size of 65536.
+    let length = (short_len.unwrap_or(buffer.len()) - 1) as u16;
+
+    // Randomize the device buffer and get the device's digest of the buffer.
+    dev.read_control(RQTYPE, TestReq::Randomize as u8, 0, 0, &mut [], TIMEOUT)?;
+    let mut dev_digest = [0u8; 32];
+    dev.read_control(
+        RQTYPE,
+        TestReq::Digest as u8,
+        length,
+        0,
+        &mut dev_digest,
+        TIMEOUT,
+    )?;
+
+    // Transfer the buffer from device to host.
+    log::info!("Starting bulk transfer");
+    dev.read_control(RQTYPE, TestReq::BulkIn as u8, length, 2, &mut [], TIMEOUT)?;
+    let t0 = Instant::now();
+
+    // Attempt to receive the full 64K buffer.  For shorter transactions, this
+    // tests the DUT properly finishes short transactions.
+    let len = dev.read_bulk(0x82, &mut buffer, TIMEOUT)?;
+    let t1 = Instant::now();
+    log::info!("Received {len} bytes in {}us", (t1 - t0).as_micros());
+    let buf_digest = Sha256Digest::hash(&buffer[..len]);
+    log::info!("DevDigest = {}", hex::encode(dev_digest));
+    log::info!("BufDigest = {}", hex::encode(buf_digest.as_ref()));
+    assert_eq!(len, length as usize + 1);
+    assert_eq!(dev_digest, buf_digest.as_ref());
+    Ok(())
+}
+
+fn send_random_buffer(dev: &UsbDeviceHandle, short_len: Option<usize>) -> Result<()> {
+    let mut buffer = vec![0u8; 65536];
+    // Determine if the test requests a shorter length than the full buffer length.
+    // We pass this (possibly short) length in the `value` field of the control transactions
+    // to indicate to the DUT the actual length.
+    // We compute the length minus one because the `value` field is a u16 and we have a
+    // maximum size of 65536.
+    let length = (short_len.unwrap_or(buffer.len()) - 1) as u16;
+    let mut rng = rand::thread_rng();
+    rng.fill_bytes(&mut buffer);
+
+    // Tell the DUT that we will transfer 65536 bytes.  For short transactions,
+    // this tests whether the DUT correctly understands shorter transactions.
+    dev.read_control(
+        RQTYPE,
+        TestReq::BulkOut as u8,
+        (buffer.len() - 1) as u16,
+        1,
+        &mut [],
+        TIMEOUT,
+    )?;
+    // Write the (possibly short) buffer to the device.
+    let t0 = Instant::now();
+    let slice = &buffer[0..(length as usize + 1)];
+    let len = dev.write_bulk(0x01, slice, TIMEOUT)?;
+    if len < buffer.len() && len % 64 == 0 {
+        // If the transfer was a multiple of the endpoint size, send a
+        // zero-length transfer to finish the transaction.
+        dev.write_bulk(0x01, &[], TIMEOUT)?;
+    }
+    let t1 = Instant::now();
+    log::info!("Sent {len} bytes in {}us", (t1 - t0).as_micros());
+    let buf_digest = Sha256Digest::hash(slice);
+    let mut dev_digest = [0u8; 32];
+    dev.read_control(
+        RQTYPE,
+        TestReq::Digest as u8,
+        length,
+        0,
+        &mut dev_digest,
+        TIMEOUT,
+    )?;
+    log::info!("DevDigest = {}", hex::encode(dev_digest));
+    log::info!("BufDigest = {}", hex::encode(buf_digest.as_ref()));
+    assert_eq!(len, length as usize + 1);
+    assert_eq!(dev_digest, buf_digest.as_ref());
+    Ok(())
+}
+
+fn test_exit(dev: &UsbDeviceHandle) -> Result<()> {
+    dev.read_control(RQTYPE, TestReq::Exit as u8, 0, 0, &mut [], TIMEOUT)?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    // Wait until test is running.
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    // Enable VBUS sense on the board if necessary.
+    if opts.usb.vbus_control_available() {
+        opts.usb.enable_vbus(&transport, true)?;
+    }
+    // Sense VBUS if available.
+    if opts.usb.vbus_sense_available() {
+        ensure!(
+            opts.usb.vbus_present(&transport)?,
+            "OT USB does not appear to be connected to a host (VBUS not detected)"
+        );
+    }
+
+    let device = wait_for_device(&opts)?;
+    device.claim_interface(1)?;
+
+    execute_test!(receive_random_buffer, &device, None);
+    execute_test!(receive_random_buffer, &device, Some(65535));
+    execute_test!(receive_random_buffer, &device, Some(65536 - 64));
+    execute_test!(send_random_buffer, &device, None);
+    execute_test!(send_random_buffer, &device, Some(65535));
+    execute_test!(send_random_buffer, &device, Some(65536 - 64));
+    test_exit(&device)?;
+
+    // Wait for test to pass.
+    log::info!("wait for pass...");
+    let res = UartConsole::wait_for(&*uart, r"PASS|FAIL", opts.timeout)?;
+    match res[0].as_str() {
+        "PASS" => (),
+        "FAIL" => bail!("device code reported a failure"),
+        _ => (),
+    };
+
+    Ok(())
+}
diff --git a/sw/host/tests/chip/usb/usb.rs b/sw/host/tests/chip/usb/usb.rs
index 3243ae14933e4..cb2c677c3b85e 100644
--- a/sw/host/tests/chip/usb/usb.rs
+++ b/sw/host/tests/chip/usb/usb.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use clap::Parser;
 use rusb::UsbContext;
 
@@ -108,10 +108,12 @@ impl UsbOpts {
                     Err(e) => {
                         // Only warned if we haven't done so before.
                         if last_seen.is_none() {
-                            log::warn!("Could not read device descriptor for device at bus={} address={}: {}",
+                            log::warn!(
+                                "Could not read device descriptor for device at bus={} address={}: {}",
                                 device.bus_number(),
                                 device.address(),
-                                e);
+                                e
+                            );
                         }
                         failed_dev.insert(dev_loc, Instant::now());
                         continue;
@@ -169,7 +171,10 @@ impl UsbOpts {
         let Some(vbus_sense_en) = &self.vbus_sense_en else {
             bail!("cannot control VBUS, you must specify --vbus-sense-en");
         };
-        log::info!("{} VBUS sensing.", if en { "Enable" } else { "Disable" });
+        log::info!(
+            "{} VBUS to OT USBDEV.",
+            if en { "Enable" } else { "Disable" }
+        );
         let vbus_sense_en_pin = transport.gpio_pin(vbus_sense_en)?;
         vbus_sense_en_pin.write(en)?;
         // Give time to hardware buffer to stabilize.
diff --git a/sw/host/tests/chip/usb/usb_harness.rs b/sw/host/tests/chip/usb/usb_harness.rs
index 6bd9a311e7d4b..46af3e2ad6796 100644
--- a/sw/host/tests/chip/usb/usb_harness.rs
+++ b/sw/host/tests/chip/usb/usb_harness.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use clap::Parser;
 use std::path::PathBuf;
 use std::process::Command;
@@ -11,7 +11,7 @@ use std::time::Duration;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::uart::console::UartConsole;
 
-use usb::{port_path_string, UsbDeviceHandle, UsbOpts};
+use usb::{UsbDeviceHandle, UsbOpts, port_path_string};
 
 #[derive(Debug, Parser)]
 struct Opts {
diff --git a/sw/host/tests/chip/usb/usbdev_aon_wake.rs b/sw/host/tests/chip/usb/usbdev_aon_wake.rs
index 3f4dd91019181..72a4ca8570060 100644
--- a/sw/host/tests/chip/usb/usbdev_aon_wake.rs
+++ b/sw/host/tests/chip/usb/usbdev_aon_wake.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{bail, ensure, Context, Result};
+use anyhow::{Context, Result, bail, ensure};
 use clap::{Parser, ValueEnum};
 use std::time::Duration;
 
diff --git a/sw/host/tests/chip/usb/usbdev_smoketest.rs b/sw/host/tests/chip/usb/usbdev_smoketest.rs
new file mode 100644
index 0000000000000..c95389ae699d5
--- /dev/null
+++ b/sw/host/tests/chip/usb/usbdev_smoketest.rs
@@ -0,0 +1,88 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Result, bail, ensure};
+use clap::Parser;
+use std::time::Duration;
+
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::transport::common::uart::SerialPortUart;
+use opentitanlib::uart::console::UartConsole;
+
+use usb::UsbOpts;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console/USB timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    /// USB options.
+    #[command(flatten)]
+    usb: UsbOpts,
+}
+
+fn usbdev_echo(opts: &Opts, uart: &dyn Uart) -> Result<()> {
+    log::info!("waiting for device...");
+    let devices = opts.usb.wait_for_device(opts.timeout)?;
+    if devices.is_empty() {
+        bail!("no USB device found");
+    }
+
+    let ports = serialport::available_ports()?;
+    //  In CI it is possible for several devices to match because we don't use a unique
+    //  VID and PID, and all devices are visible (but not accessible) to every program.
+    //  So with filter all vid:pid matches to try to open them: the ones belonging to
+    //  other containers cannot be opened.
+    let usb_uart = ports
+        .iter()
+        .find_map(|port| {
+            let serialport::SerialPortType::UsbPort(info) = &port.port_type else {
+                return None;
+            };
+            if info.vid != opts.usb.vid || info.pid != opts.usb.pid {
+                return None;
+            }
+            SerialPortUart::open(&port.port_name, 115200).ok()
+        })
+        .ok_or(anyhow::anyhow!("Could not open any tty port"))?;
+
+    let mut buffer = [0u8; 256];
+    let len = usb_uart.read(&mut buffer)?;
+
+    usb_uart.write(&buffer[0..len])?;
+
+    let _ = UartConsole::wait_for(uart, r"PASS!", opts.timeout)?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let uart = transport.uart("console")?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    // Enable VBUS sense on the board if necessary.
+    if opts.usb.vbus_control_available() {
+        opts.usb.enable_vbus(&transport, true)?;
+    }
+    // Sense VBUS if available.
+    if opts.usb.vbus_sense_available() {
+        ensure!(
+            opts.usb.vbus_present(&transport)?,
+            "OT USB does not appear to be connected to a host (VBUS not detected)"
+        );
+    }
+
+    execute_test!(usbdev_echo, &opts, &*uart);
+
+    Ok(())
+}
diff --git a/sw/host/tests/chip/usb/usbdev_suspend.rs b/sw/host/tests/chip/usb/usbdev_suspend.rs
new file mode 100644
index 0000000000000..410f7ee18b5bc
--- /dev/null
+++ b/sw/host/tests/chip/usb/usbdev_suspend.rs
@@ -0,0 +1,321 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// This harness controls a number of suspend-sleep-resume USBDEV tests:
+// - usbdev_suspend_resume_test
+// - usbdev_sleep_resume_test
+// - usbdev_sleep_reset_test
+// - usbdev_sleep_disconnect_test
+// - usbdev_sleep_resume_test
+// - usbdev_sleep_reset_test
+// - usbdev_sleep_disconnect_test
+//
+// The above are sub-sections of the following full sequence test:
+// - usbdev_suspend_full_test
+
+use anyhow::{Context, Result, anyhow, bail, ensure};
+use clap::{Parser, ValueEnum};
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+use usb::{UsbHub, UsbHubOp, UsbOpts};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console/USB timeout; test harness must allow time for device configuration by
+    // the host, as well as iterating through a number of test phases.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "60s")]
+    timeout: Duration,
+
+    /// USB options.
+    #[command(flatten)]
+    usb: UsbOpts,
+
+    // Iteration count.
+    #[arg(long, default_value = "1")]
+    num_iters: u32,
+
+    // Test phases.
+    #[arg(long)]
+    init_phase: SuspendPhase,
+    #[arg(long)]
+    fin_phase: SuspendPhase,
+}
+
+// Test phases
+// - the tests controlled by this sequence presently run a contiguous sequence of phases
+//   within this full sequence.
+#[derive(Clone, Debug, PartialEq, Eq, ValueEnum, strum::Display)]
+enum SuspendPhase {
+    // Resume Signaling stimulus when suspended but not in a sleep state.
+    Suspend,
+    // Resume Signaling when the device is in Normal Sleep
+    //  (clocks stopped but USBDEV not powered down).
+    SleepResume,
+    // Awaken from Normal Sleep in responses to a Bus Reset.
+    SleepReset,
+    // ... to a VBUS removal (disconnection).
+    SleepDisconnect,
+    // As for the above tests phases, but entering Deep Sleep rather in which power is removed also.
+    DeepResume,
+    DeepReset,
+    DeepDisconnect,
+    // Final test state; device disconnects and test completes.
+    Shutdown,
+}
+
+// Wait for a device to appear and then return the parent device and port number.
+fn wait_for_device_and_get_parent(opts: &Opts) -> Result<(rusb::Device<rusb::Context>, u8)> {
+    // Wait for USB device to appear.
+    log::info!("waiting for device...");
+    let devices = opts.usb.wait_for_device(opts.timeout)?;
+    if devices.is_empty() {
+        bail!("no USB device found");
+    }
+    if devices.len() > 1 {
+        bail!("several USB devices found");
+    }
+    let device = &devices[0];
+    log::info!(
+        "device found at bus={} address={}",
+        device.device().bus_number(),
+        device.device().address()
+    );
+
+    // Important note: here the handle will be dropped and the device handle
+    // will be closed.
+    Ok((
+        device
+            .device()
+            .get_parent()
+            .context("device has no parent, you need to connect it via a hub for this test")?,
+        device.device().port_number(),
+    ))
+}
+
+// Delay for the specified number of USB milliseconds (= bus frames).
+fn delay_millis(frames: u64) {
+    std::thread::sleep(Duration::from_millis(frames));
+}
+
+// Time intervals, in milliseconds.
+// - These are determined by the USB 2.0 Protocol specification.
+const TIME_SUSPENDING: u64 = 4;
+const TIME_RESUMING: u64 = 20;
+const TIME_RESETTING: u64 = 10;
+
+fn suspend(hub: &UsbHub, port: u8) -> Result<()> {
+    log::info!("suspending port {}", port);
+    hub.op(UsbHubOp::Suspend, port, Duration::from_millis(100))?;
+    // Device shall suspend after 3ms of Idle state.
+    delay_millis(TIME_SUSPENDING);
+    log::info!("suspended");
+    Ok(())
+}
+
+fn resume(hub: &UsbHub, port: u8) -> Result<()> {
+    log::info!("resuming device on port {}", port);
+    hub.op(UsbHubOp::Resume, port, Duration::from_millis(100))?;
+    // Resume Signaling shall be performed for at least 20ms.
+    delay_millis(TIME_RESUMING);
+    log::info!("resumed");
+    Ok(())
+}
+
+fn reset(hub: &UsbHub, port: u8) -> Result<()> {
+    log::info!("resetting device on port {}", port);
+    // Reset Signaling shall be performed for at least 10ms.
+    hub.op(UsbHubOp::Reset, port, Duration::from_millis(100))?;
+    delay_millis(TIME_RESETTING);
+    log::info!("reset");
+    Ok(())
+}
+
+fn connect(usb: &UsbOpts, transport: &TransportWrapper) -> Result<()> {
+    log::info!("connecting device");
+    usb.enable_vbus(transport, true)?;
+    log::info!("connected");
+    Ok(())
+}
+
+fn disconnect(usb: &UsbOpts, transport: &TransportWrapper) -> Result<()> {
+    log::info!("disconnecting device");
+    usb.enable_vbus(transport, false)?;
+    log::info!("disconnected");
+    Ok(())
+}
+
+// Implements the host-side component of usbdev_suspend_<>_test
+fn usbdev_suspend(
+    opts: &Opts,
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+) -> Result<(), anyhow::Error> {
+    // - These impact successful operation of the device-side software; vary them appreciably
+    //   and test failures may occur through device-side timeout or the device not being ready.
+    let time_suspended_short: u64 = 3;
+    let time_suspended_long: u64 = 50;
+
+    // - Fairly arbitrary, may be modified quite freely.
+    let time_disconnected: u64 = 1000;
+
+    // Enable VBUS sense on the board if necessary.
+    if opts.usb.vbus_control_available() {
+        opts.usb.enable_vbus(transport, true)?;
+    }
+    // Sense VBUS if available.
+    if opts.usb.vbus_sense_available() {
+        ensure!(
+            opts.usb.vbus_present(transport)?,
+            "OT USB does not appear to be connected to a host (VBUS not detected)"
+        );
+    }
+
+    // Wait for device to appear.
+    let (parent, port) = wait_for_device_and_get_parent(opts)?;
+    log::info!(
+        "parent hub at bus={}, address={}, port numbers={:?}",
+        parent.bus_number(),
+        parent.address(),
+        parent.port_numbers()?
+    );
+    log::info!("device under test is on port {}", port);
+    // At this point, we are not holding any device handle. If we really want to make sure,
+    // we could unbind the device from the driver but this requires a lot of privileges.
+
+    let _devices = opts.usb.wait_for_device(opts.timeout)?;
+
+    let hub = UsbHub::from_device(&parent).context("for this test, you need to make sure that the program has sufficient permissions to access the hub")?;
+
+    // Collect test phases.
+    let init_phase = opts.init_phase.clone();
+    let fin_phase = opts.fin_phase.clone();
+
+    // The full suspend-sleep-resume testing is decomposed into a number of shorter sequences to
+    // make chip-level simulation feasible. Most of the top-level tests that this harness supports
+    // expects to run through a short sub-sequence of these test phases.
+    log::info!(
+        "Phase sequence - {} to {} inclusive",
+        init_phase.to_string(),
+        fin_phase.to_string()
+    );
+
+    for iter in 1..=opts.num_iters {
+        log::info!("Iteration {} of {}", iter, opts.num_iters);
+        let mut phase = init_phase.clone();
+        loop {
+            log::info!("Test phase {}", phase.to_string());
+
+            // Synchronize with the device-side code; it shall always emit this message at the point
+            // of being ready to receive the stimulus within a given test phase, because we have
+            // neither this harness nor the device-side code has any control over how long it takes
+            // the host to detect and configure the device.
+            UartConsole::wait_for(uart, r"Phase awaiting stimulus", opts.timeout)?;
+
+            // All phase require a Suspend request and then wait for > 3 frames; some phases require
+            // a longer delay so that the device-side code decides to enter a sleep state.
+            suspend(&hub, port)?;
+            if phase == SuspendPhase::Suspend {
+                delay_millis(time_suspended_short);
+            } else {
+                // Longer Suspended state, a cue to enter the sleep state.
+                delay_millis(time_suspended_long);
+            }
+
+            // Next test phase; initialize to final phase (safer default than the current phase).
+            let mut next_phase = fin_phase.clone();
+            match phase {
+                // Basic test of Suspend-Resume functionality without entering a sleep state.
+                SuspendPhase::Suspend => {
+                    resume(&hub, port)?;
+                    delay_millis(10);
+                    next_phase = SuspendPhase::SleepResume;
+                }
+                // Suspend, enter Normal Sleep, and then awaken in response to Resume signaling.
+                SuspendPhase::SleepResume => {
+                    resume(&hub, port)?;
+                    next_phase = SuspendPhase::SleepReset;
+                }
+                // Suspend, enter Normal Sleep, and then awaken in response to a Bus Reset.
+                SuspendPhase::SleepReset => {
+                    reset(&hub, port)?;
+                    next_phase = SuspendPhase::SleepDisconnect;
+                }
+                // Suspend, enter Normal Sleep, and then awaken in response to a VBUS Disconnection.
+                SuspendPhase::SleepDisconnect => {
+                    if opts.usb.vbus_control_available() {
+                        disconnect(&opts.usb, transport)?;
+                        delay_millis(time_disconnected);
+                        connect(&opts.usb, transport)?;
+                    } else {
+                        log::info!("Skipping VBUS Disconnection because support unavailable");
+                        resume(&hub, port)?;
+                    }
+                    next_phase = SuspendPhase::DeepResume;
+                }
+                // Suspend, enter Deep Sleep, and then awaken in response to Resume Signaling.
+                SuspendPhase::DeepResume => {
+                    resume(&hub, port)?;
+                    next_phase = SuspendPhase::DeepReset;
+                }
+                // Suspend, enter Deep Sleep, and then awaken in response to a Bus Reset.
+                SuspendPhase::DeepReset => {
+                    reset(&hub, port)?;
+                    next_phase = SuspendPhase::DeepDisconnect;
+                }
+                // Suspend, enter Deep Sleep, and then awaken in response to a VBUS Disconnection.
+                SuspendPhase::DeepDisconnect => {
+                    if opts.usb.vbus_control_available() {
+                        disconnect(&opts.usb, transport)?;
+                        delay_millis(time_disconnected);
+                        connect(&opts.usb, transport)?;
+                    } else {
+                        log::info!("Skipping VBUS Disconnection because support unavailable");
+                        resume(&hub, port)?;
+                    }
+                    next_phase = SuspendPhase::Shutdown;
+                }
+                // Shutdown
+                SuspendPhase::Shutdown => {
+                    // Nothing or us to do, though we could spot the device disconnection.
+                }
+            }
+            // Have we completed the final phase of the sequence to be tested?
+            if phase == fin_phase {
+                break;
+            }
+            phase = next_phase;
+        }
+    }
+
+    log::info!("Awaiting verdict from device software");
+
+    // Simply await the PASS/FAIL indication from the device-side software.
+    let vec = UartConsole::wait_for(uart, r"(PASS|FAIL)!", opts.timeout)?;
+    match vec[0].as_str() {
+        "PASS!" => Ok(()),
+        _ => Err(anyhow!("Failure result: {:?}", vec)),
+    }
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    // Wait until test is running.
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    execute_test!(usbdev_suspend, &opts, &transport, &*uart);
+    Ok(())
+}
diff --git a/sw/host/tests/crypto/aes_nist_kat/src/main.rs b/sw/host/tests/crypto/aes_nist_kat/src/main.rs
index c57494ae2e4c0..7384a7c8b6aa3 100644
--- a/sw/host/tests/crypto/aes_nist_kat/src/main.rs
+++ b/sw/host/tests/crypto/aes_nist_kat/src/main.rs
@@ -17,9 +17,10 @@ use cryptotest_commands::aes_commands::{
 use cryptotest_commands::commands::CryptotestCommand;
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -55,32 +56,30 @@ const AES_BLOCK_BYTES: usize = 128 / 8;
 fn run_aes_testcase(
     test_case: &AesTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
 ) -> Result<()> {
-    let uart = transport.uart("console")?;
-
     assert_eq!(test_case.algorithm.as_str(), "aes");
-    CryptotestCommand::Aes.send(&*uart)?;
-    AesSubcommand::AesBlock.send(&*uart)?;
+    CryptotestCommand::Aes.send(spi_console)?;
+    AesSubcommand::AesBlock.send(spi_console)?;
 
     match test_case.mode.as_str() {
-        "cbc" => CryptotestAesMode::Cbc.send(&*uart)?,
-        "cfb128" => CryptotestAesMode::Cfb.send(&*uart)?,
-        "ecb" => CryptotestAesMode::Ecb.send(&*uart)?,
-        "ofb" => CryptotestAesMode::Ofb.send(&*uart)?,
+        "cbc" => CryptotestAesMode::Cbc.send(spi_console)?,
+        "cfb128" => CryptotestAesMode::Cfb.send(spi_console)?,
+        "ecb" => CryptotestAesMode::Ecb.send(spi_console)?,
+        "ofb" => CryptotestAesMode::Ofb.send(spi_console)?,
         _ => panic!("Invalid AES mode"),
-    }
+    };
     match test_case.operation.as_str() {
-        "encrypt" => CryptotestAesOperation::Encrypt.send(&*uart)?,
-        "decrypt" => CryptotestAesOperation::Decrypt.send(&*uart)?,
+        "encrypt" => CryptotestAesOperation::Encrypt.send(spi_console)?,
+        "decrypt" => CryptotestAesOperation::Decrypt.send(spi_console)?,
         _ => panic!("Invalid AES operation"),
-    }
+    };
     match test_case.padding.as_str() {
-        "null" => CryptotestAesPadding::Null.send(&*uart)?,
-        "pkcs7" => CryptotestAesPadding::Pkcs7.send(&*uart)?,
-        "iso9797m2" => CryptotestAesPadding::Iso9797M2.send(&*uart)?,
+        "null" => CryptotestAesPadding::Null.send(spi_console)?,
+        "pkcs7" => CryptotestAesPadding::Pkcs7.send(spi_console)?,
+        "iso9797m2" => CryptotestAesPadding::Iso9797M2.send(spi_console)?,
         _ => panic!("Invalid AES padding scheme"),
-    }
+    };
 
     let mut iv: ArrayVec<u8, AES_BLOCK_BYTES>;
     match &test_case.iv {
@@ -119,9 +118,9 @@ fn run_aes_testcase(
         input,
         input_len,
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
-    let aes_output = CryptotestAesOutput::recv(&*uart, opts.timeout, false)?;
+    let aes_output = CryptotestAesOutput::recv(spi_console, opts.timeout, false, false)?;
     assert_eq!(
         aes_output.output[0..input_len],
         expected_output[0..input_len]
@@ -130,9 +129,9 @@ fn run_aes_testcase(
 }
 
 fn test_aes(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let test_vector_files = &opts.aes_json;
@@ -143,7 +142,7 @@ fn test_aes(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for aes_test in &aes_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_aes_testcase(aes_test, opts, transport)?;
+            run_aes_testcase(aes_test, opts, &spi_console_device)?;
         }
     }
     Ok(())
diff --git a/sw/host/tests/crypto/drbg_kat/src/main.rs b/sw/host/tests/crypto/drbg_kat/src/main.rs
index 210bf469f6724..6cfab96f8ec55 100644
--- a/sw/host/tests/crypto/drbg_kat/src/main.rs
+++ b/sw/host/tests/crypto/drbg_kat/src/main.rs
@@ -14,9 +14,10 @@ use cryptotest_commands::commands::CryptotestCommand;
 use cryptotest_commands::drbg_commands::{CryptotestDrbgInput, CryptotestDrbgOutput};
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -52,7 +53,7 @@ struct DrbgTestCase {
 fn run_drbg_testcase(
     test_case: &DrbgTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut u32,
 ) -> Result<()> {
     log::info!(
@@ -60,9 +61,8 @@ fn run_drbg_testcase(
         test_case.vendor,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
 
-    CryptotestCommand::Drbg.send(&*uart)?;
+    CryptotestCommand::Drbg.send(spi_console)?;
 
     // Convert all inputs to little-endian
     let mut entropy_le = Vec::from(test_case.entropy.as_slice());
@@ -95,10 +95,10 @@ fn run_drbg_testcase(
         additional_input_2_len: addl_2_le.len(),
         output_len: test_case.output.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Get output
-    let drbg_output = CryptotestDrbgOutput::recv(&*uart, opts.timeout, false)?;
+    let drbg_output = CryptotestDrbgOutput::recv(spi_console, opts.timeout, false, false)?;
     // The expected output is in a mixed-endian format (32-bit words
     // are in little-endian order, but the bytes within the words are
     // in big-endian order). Convert the actual output to match this
@@ -127,9 +127,9 @@ fn run_drbg_testcase(
 }
 
 fn test_drbg(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0u32;
@@ -141,7 +141,7 @@ fn test_drbg(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for drbg_test in &drbg_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_drbg_testcase(drbg_test, opts, transport, &mut fail_counter)?;
+            run_drbg_testcase(drbg_test, opts, &spi_console_device, &mut fail_counter)?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/ecdh_kat/src/main.rs b/sw/host/tests/crypto/ecdh_kat/src/main.rs
index bef71be861177..e69e572565284 100644
--- a/sw/host/tests/crypto/ecdh_kat/src/main.rs
+++ b/sw/host/tests/crypto/ecdh_kat/src/main.rs
@@ -17,14 +17,15 @@ use cryptotest_commands::ecdh_commands::{
     CryptotestEcdhPrivateKey,
 };
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
-use p256::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP256;
 use p256::U256;
-use p384::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP384;
+use p256::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP256;
 use p384::U384;
+use p384::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP384;
 
 const ECDH_CMD_MAX_COORDINATE_BYTES_P256: usize = 32;
 const ECDH_CMD_MAX_PRIVATE_KEY_BYTES_P256: usize = 32;
@@ -65,7 +66,7 @@ struct EcdhTestCase {
 fn run_ecdh_testcase(
     test_case: &EcdhTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut usize,
     failures: &mut Vec<usize>,
 ) -> Result<()> {
@@ -74,7 +75,6 @@ fn run_ecdh_testcase(
         test_case.vendor,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
 
     assert_eq!(test_case.algorithm.as_str(), "ecdh");
     // Change byte slice parameters from big endian to little endian
@@ -82,7 +82,7 @@ fn run_ecdh_testcase(
     let qx = BigUint::from_bytes_be(&test_case.qx).to_bytes_le();
     let qy = BigUint::from_bytes_be(&test_case.qy).to_bytes_le();
 
-    CryptotestCommand::Ecdh.send(&*uart)?;
+    CryptotestCommand::Ecdh.send(spi_console)?;
 
     let (curve, d0, d1) = match test_case.curve.as_str() {
         "p256" => {
@@ -170,7 +170,7 @@ fn run_ecdh_testcase(
         _ => panic!("Invalid ECDH curve name"),
     };
 
-    curve.send(&*uart)?;
+    curve.send(spi_console)?;
 
     // Sizes were checked already, so we can unwrap() transformations
     // to `ArrayVec`s.  We can inline the `ArrayVec` initialization
@@ -182,21 +182,21 @@ fn run_ecdh_testcase(
         d1: ArrayVec::try_from(d1.as_slice()).unwrap(),
         d1_len: d1.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestEcdhCoordinate {
         coordinate: ArrayVec::try_from(qx.as_slice()).unwrap(),
         coordinate_len: qx.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestEcdhCoordinate {
         coordinate: ArrayVec::try_from(qy.as_slice()).unwrap(),
         coordinate_len: qy.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
-    let ecdh_output = CryptotestEcdhDeriveOutput::recv(&*uart, opts.timeout, false)?;
+    let ecdh_output = CryptotestEcdhDeriveOutput::recv(spi_console, opts.timeout, false, false)?;
     let out_len = ecdh_output.shared_secret_len;
     if out_len > ecdh_output.shared_secret.len() {
         panic!("ECDH returned shared secret was too long for device firmware configuration.");
@@ -219,9 +219,9 @@ fn run_ecdh_testcase(
 }
 
 fn test_ecdh(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0usize;
@@ -234,7 +234,13 @@ fn test_ecdh(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for ecdh_test in &ecdh_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_ecdh_testcase(ecdh_test, opts, transport, &mut fail_counter, &mut failures)?;
+            run_ecdh_testcase(
+                ecdh_test,
+                opts,
+                &spi_console_device,
+                &mut fail_counter,
+                &mut failures,
+            )?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/ecdsa_kat/src/main.rs b/sw/host/tests/crypto/ecdsa_kat/src/main.rs
index dc2313c1e4733..0757b81656825 100644
--- a/sw/host/tests/crypto/ecdsa_kat/src/main.rs
+++ b/sw/host/tests/crypto/ecdsa_kat/src/main.rs
@@ -9,12 +9,12 @@ use ecdsa::SignatureWithOid;
 use ecdsa::{ECDSA_SHA256_OID, ECDSA_SHA384_OID, ECDSA_SHA512_OID};
 use num_bigint_dig::BigInt;
 use num_traits::Num;
+use p256::U256;
 use p256::ecdsa::signature::Verifier;
 use p256::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP256;
 use p256::pkcs8::ObjectIdentifier;
-use p256::U256;
-use p384::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP384;
 use p384::U384;
+use p384::elliptic_curve::scalar::ScalarPrimitive as ScalarPrimitiveP384;
 use serde::Deserialize;
 use sha2::digest::generic_array::GenericArray;
 use sha2::{Digest, Sha256, Sha384, Sha512};
@@ -29,9 +29,10 @@ use cryptotest_commands::ecdsa_commands::{
 };
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -180,7 +181,7 @@ fn p384_verify_signature(
 fn run_ecdsa_testcase(
     test_case: &EcdsaTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     failures: &mut Vec<String>,
 ) -> Result<()> {
     log::info!(
@@ -188,7 +189,6 @@ fn run_ecdsa_testcase(
         test_case.vendor,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
     assert_eq!(test_case.algorithm.as_str(), "ecdsa");
     let mut qx: Vec<u8> = BigInt::from_str_radix(&test_case.qx, 16)
         .unwrap()
@@ -398,10 +398,10 @@ fn run_ecdsa_testcase(
     };
 
     // Send everything
-    CryptotestCommand::Ecdsa.send(&*uart)?;
-    operation.send(&*uart)?;
-    hash_alg.send(&*uart)?;
-    curve.send(&*uart)?;
+    CryptotestCommand::Ecdsa.send(spi_console)?;
+    operation.send(spi_console)?;
+    hash_alg.send(spi_console)?;
+    curve.send(spi_console)?;
 
     // Size of `input` is determined at compile-time by type inference
     let mut input = ArrayVec::new();
@@ -417,7 +417,7 @@ fn run_ecdsa_testcase(
         input,
         input_len: msg_len,
     };
-    msg.send(&*uart)?;
+    msg.send(spi_console)?;
 
     CryptotestEcdsaSignature {
         r: ArrayVec::try_from(r.as_slice()).unwrap(),
@@ -425,19 +425,19 @@ fn run_ecdsa_testcase(
         s: ArrayVec::try_from(s.as_slice()).unwrap(),
         s_len: s.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestEcdsaCoordinate {
         coordinate: ArrayVec::try_from(qx.as_slice()).unwrap(),
         coordinate_len: qx.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestEcdsaCoordinate {
         coordinate: ArrayVec::try_from(qy.as_slice()).unwrap(),
         coordinate_len: qy.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestEcdsaPrivateKey {
         d0: ArrayVec::try_from(d0.as_slice()).unwrap(),
@@ -446,10 +446,11 @@ fn run_ecdsa_testcase(
         d1_len: d1.len(),
         unmasked_len: d0.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
     let success = match operation {
         CryptotestEcdsaOperation::Sign => {
-            let mut output_signature = CryptotestEcdsaSignature::recv(&*uart, opts.timeout, false)?;
+            let mut output_signature =
+                CryptotestEcdsaSignature::recv(spi_console, opts.timeout, false, false)?;
             // Truncate signature values to correct size for curve and convert to big-endian
             output_signature.r.truncate(output_signature.r_len);
             output_signature.s.truncate(output_signature.s_len);
@@ -476,7 +477,8 @@ fn run_ecdsa_testcase(
             }
         }
         CryptotestEcdsaOperation::Verify => {
-            let ecdsa_output = CryptotestEcdsaVerifyOutput::recv(&*uart, opts.timeout, false)?;
+            let ecdsa_output =
+                CryptotestEcdsaVerifyOutput::recv(spi_console, opts.timeout, false, false)?;
             match ecdsa_output {
                 CryptotestEcdsaVerifyOutput::Success => true,
                 CryptotestEcdsaVerifyOutput::Failure => false,
@@ -509,9 +511,9 @@ fn run_ecdsa_testcase(
 }
 
 fn test_ecdsa(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut failures = vec![];
@@ -523,7 +525,7 @@ fn test_ecdsa(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for ecdsa_test in &ecdsa_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_ecdsa_testcase(ecdsa_test, opts, transport, &mut failures)?;
+            run_ecdsa_testcase(ecdsa_test, opts, &spi_console_device, &mut failures)?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/hash_kat/src/main.rs b/sw/host/tests/crypto/hash_kat/src/main.rs
index 6015dafe0bf97..39ac4d952499d 100644
--- a/sw/host/tests/crypto/hash_kat/src/main.rs
+++ b/sw/host/tests/crypto/hash_kat/src/main.rs
@@ -17,9 +17,10 @@ use cryptotest_commands::hash_commands::{
 };
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -54,7 +55,7 @@ const HASH_CMD_MAX_CUSTOMIZATION_STRING_BYTES: usize = 16;
 fn run_hash_testcase(
     test_case: &HashTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut u32,
 ) -> Result<()> {
     log::info!(
@@ -63,9 +64,7 @@ fn run_hash_testcase(
         test_case.algorithm,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
-
-    CryptotestCommand::Hash.send(&*uart)?;
+    CryptotestCommand::Hash.send(spi_console)?;
 
     assert!(
         test_case.message.len() <= HASH_CMD_MAX_MESSAGE_BYTES,
@@ -95,14 +94,14 @@ fn run_hash_testcase(
         "cshake-256" => CryptotestHashAlgorithm::Cshake256,
         _ => panic!("Unsupported hash algorithm"),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send required digest size for SHAKE tests (this value is
     // ignored for SHA2/3)
     CryptotestHashShakeDigestLength {
         length: test_case.digest.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send hash preimage
     CryptotestHashMessage {
@@ -112,10 +111,10 @@ fn run_hash_testcase(
             .unwrap(),
         customization_string_len: test_case.customization_string.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Get hash output
-    let hash_output = CryptotestHashOutput::recv(&*uart, opts.timeout, false)?;
+    let hash_output = CryptotestHashOutput::recv(spi_console, opts.timeout, false, false)?;
     // Stepwise hashing is currently supported by SHA2 only.
     let mut failed = false;
     match test_case.algorithm.as_str() {
@@ -158,9 +157,9 @@ fn run_hash_testcase(
 }
 
 fn test_hash(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0u32;
@@ -172,7 +171,7 @@ fn test_hash(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for hash_test in &hash_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_hash_testcase(hash_test, opts, transport, &mut fail_counter)?;
+            run_hash_testcase(hash_test, opts, &spi_console_device, &mut fail_counter)?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/hmac_kat/src/main.rs b/sw/host/tests/crypto/hmac_kat/src/main.rs
index 06b5647174782..c90926f5ac232 100644
--- a/sw/host/tests/crypto/hmac_kat/src/main.rs
+++ b/sw/host/tests/crypto/hmac_kat/src/main.rs
@@ -16,9 +16,10 @@ use cryptotest_commands::hmac_commands::{
 };
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -52,7 +53,7 @@ const HMAC_CMD_MAX_KEY_BYTES: usize = 192;
 fn run_hmac_testcase(
     test_case: &HmacTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut u32,
 ) -> Result<()> {
     log::info!(
@@ -60,10 +61,8 @@ fn run_hmac_testcase(
         test_case.vendor,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
-
     assert_eq!(test_case.algorithm.as_str(), "hmac");
-    CryptotestCommand::Hmac.send(&*uart)?;
+    CryptotestCommand::Hmac.send(spi_console)?;
 
     assert!(
         test_case.key.len() <= HMAC_CMD_MAX_KEY_BYTES,
@@ -87,21 +86,21 @@ fn run_hmac_testcase(
         "sha3-512" => CryptotestHmacHashAlg::Sha3_512,
         _ => panic!("Unsupported HMAC hash mode"),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestHmacKey {
         key: ArrayVec::try_from(test_case.key.as_slice()).unwrap(),
         key_len: test_case.key.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestHmacMessage {
         message: ArrayVec::try_from(test_case.message.as_slice()).unwrap(),
         message_len: test_case.message.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
-    let hmac_tag = CryptotestHmacTag::recv(&*uart, opts.timeout, false)?;
+    let hmac_tag = CryptotestHmacTag::recv(spi_console, opts.timeout, false, false)?;
     let success = if test_case.tag.len() > hmac_tag.tag_len {
         // If we got a shorter tag back then the test asks for, we can't accept the tag, even if
         // the beginning bytes match.
@@ -126,9 +125,9 @@ fn run_hmac_testcase(
 }
 
 fn test_hmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0u32;
@@ -140,7 +139,7 @@ fn test_hmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for hmac_test in &hmac_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_hmac_testcase(hmac_test, opts, transport, &mut fail_counter)?;
+            run_hmac_testcase(hmac_test, opts, &spi_console_device, &mut fail_counter)?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/kmac_kat/src/main.rs b/sw/host/tests/crypto/kmac_kat/src/main.rs
index 840f34d356e3a..29441b54af37a 100644
--- a/sw/host/tests/crypto/kmac_kat/src/main.rs
+++ b/sw/host/tests/crypto/kmac_kat/src/main.rs
@@ -17,9 +17,10 @@ use cryptotest_commands::kmac_commands::{
 };
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -57,7 +58,7 @@ const KMAC_CMD_MAX_KEY_BYTES: usize = 64;
 fn run_kmac_testcase(
     test_case: &KmacTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut u32,
 ) -> Result<()> {
     log::info!(
@@ -65,10 +66,8 @@ fn run_kmac_testcase(
         test_case.vendor,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
-
     assert_eq!(test_case.algorithm.as_str(), "kmac");
-    CryptotestCommand::Kmac.send(&*uart)?;
+    CryptotestCommand::Kmac.send(spi_console)?;
 
     assert!(
         test_case.key.len() <= KMAC_CMD_MAX_KEY_BYTES,
@@ -94,35 +93,35 @@ fn run_kmac_testcase(
         256 => CryptotestKmacMode::Kmac256,
         _ => panic!("Unsupported KMAC mode"),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestKmacRequiredTagLength {
         // Set this to the expected tag length, so we guarantee we perform a fair comparison with
         // the expected value.
         required_tag_length: test_case.tag.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestKmacKey {
         key: ArrayVec::try_from(test_case.key.as_slice()).unwrap(),
         key_len: test_case.key.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestKmacMessage {
         message: ArrayVec::try_from(test_case.message.as_slice()).unwrap(),
         message_len: test_case.message.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     CryptotestKmacCustomizationString {
         customization_string: ArrayVec::try_from(test_case.customization_string.as_slice())
             .unwrap(),
         customization_string_len: test_case.customization_string.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
-    let kmac_tag = CryptotestKmacTag::recv(&*uart, opts.timeout, false)?;
+    let kmac_tag = CryptotestKmacTag::recv(spi_console, opts.timeout, false, false)?;
     // Cryptolib could have chosen to return more tag bytes than we asked for. If it did, we can
     // ignore the extra ones.
     let success = test_case.tag[..] == kmac_tag.tag[..test_case.tag.len()];
@@ -141,9 +140,9 @@ fn run_kmac_testcase(
 }
 
 fn test_kmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0u32;
@@ -155,7 +154,7 @@ fn test_kmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for kmac_test in &kmac_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_kmac_testcase(kmac_test, opts, transport, &mut fail_counter)?;
+            run_kmac_testcase(kmac_test, opts, &spi_console_device, &mut fail_counter)?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/crypto/sphincsplus_kat/src/main.rs b/sw/host/tests/crypto/sphincsplus_kat/src/main.rs
index c3bc994d24c8c..577260f956e30 100644
--- a/sw/host/tests/crypto/sphincsplus_kat/src/main.rs
+++ b/sw/host/tests/crypto/sphincsplus_kat/src/main.rs
@@ -18,9 +18,10 @@ use cryptotest_commands::sphincsplus_commands::{
 };
 
 use opentitanlib::app::TransportWrapper;
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::execute_test;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 
 #[derive(Debug, Parser)]
@@ -52,7 +53,7 @@ struct SphincsPlusTestCase {
 fn run_sphincsplus_testcase(
     test_case: &SphincsPlusTestCase,
     opts: &Opts,
-    transport: &TransportWrapper,
+    spi_console: &SpiConsoleDevice,
     fail_counter: &mut u32,
 ) -> Result<()> {
     log::info!(
@@ -61,9 +62,7 @@ fn run_sphincsplus_testcase(
         test_case.algorithm,
         test_case.test_case_id
     );
-    let uart = transport.uart("console")?;
-
-    CryptotestCommand::SphincsPlus.send(&*uart)?;
+    CryptotestCommand::SphincsPlus.send(spi_console)?;
     assert_eq!(test_case.algorithm.as_str(), "sphincs+");
 
     // Send operation
@@ -71,7 +70,7 @@ fn run_sphincsplus_testcase(
         "verify" => CryptotestSphincsPlusOperation::Verify,
         _ => panic!("Unsupported SPHINCS+ operation"),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send hash algorithm
     match test_case.hash_alg.as_str() {
@@ -79,7 +78,7 @@ fn run_sphincsplus_testcase(
         "shake-256" => CryptotestSphincsPlusHashAlg::Shake256,
         _ => panic!("Unsupported hash algorithm"),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send public key
     CryptotestSphincsPlusPublicKey {
@@ -87,7 +86,7 @@ fn run_sphincsplus_testcase(
             .expect("SPHINCS+ public key was too large for device firmware configuration."),
         public_len: test_case.public.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send message
     CryptotestSphincsPlusMessage {
@@ -95,7 +94,7 @@ fn run_sphincsplus_testcase(
             .expect("SPHINCS+ message was too large for device firmware configuration."),
         message_len: test_case.message.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Send signature
     CryptotestSphincsPlusSignature {
@@ -103,16 +102,17 @@ fn run_sphincsplus_testcase(
             .expect("SPHINCS+ signature was too large for device firmware configuration."),
         signature_len: test_case.signature.len(),
     }
-    .send(&*uart)?;
+    .send(spi_console)?;
 
     // Get verification output
-    let success = match CryptotestSphincsPlusVerifyOutput::recv(&*uart, opts.timeout, false)? {
-        CryptotestSphincsPlusVerifyOutput::Success => true,
-        CryptotestSphincsPlusVerifyOutput::Failure => false,
-        CryptotestSphincsPlusVerifyOutput::IntValue(i) => {
-            panic!("Invalid SPHINCS+ verify result: {}", i)
-        }
-    };
+    let success =
+        match CryptotestSphincsPlusVerifyOutput::recv(spi_console, opts.timeout, false, false)? {
+            CryptotestSphincsPlusVerifyOutput::Success => true,
+            CryptotestSphincsPlusVerifyOutput::Failure => false,
+            CryptotestSphincsPlusVerifyOutput::IntValue(i) => {
+                panic!("Invalid SPHINCS+ verify result: {}", i)
+            }
+        };
     if test_case.result != success {
         log::info!(
             "FAILED test #{}: expected = {}, actual = {}",
@@ -126,9 +126,9 @@ fn run_sphincsplus_testcase(
 }
 
 fn test_sphincsplus(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let uart = transport.uart("console")?;
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+    let spi = transport.spi("BOOTSTRAP")?;
+    let spi_console_device = SpiConsoleDevice::new(&*spi, None, /*ignore_frame_num=*/ false)?;
+    let _ = UartConsole::wait_for(&spi_console_device, r"Running [^\r\n]*", opts.timeout)?;
 
     let mut test_counter = 0u32;
     let mut fail_counter = 0u32;
@@ -140,7 +140,12 @@ fn test_sphincsplus(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         for sphincsplus_test in &sphincsplus_tests {
             test_counter += 1;
             log::info!("Test counter: {}", test_counter);
-            run_sphincsplus_testcase(sphincsplus_test, opts, transport, &mut fail_counter)?;
+            run_sphincsplus_testcase(
+                sphincsplus_test,
+                opts,
+                &spi_console_device,
+                &mut fail_counter,
+            )?;
         }
     }
     assert_eq!(
diff --git a/sw/host/tests/manuf/cp_provision_functest/BUILD b/sw/host/tests/manuf/cp_provision_functest/BUILD
index 52b927ecfb61e..ea1d9edb5fa0c 100644
--- a/sw/host/tests/manuf/cp_provision_functest/BUILD
+++ b/sw/host/tests/manuf/cp_provision_functest/BUILD
@@ -13,13 +13,14 @@ rust_binary(
         "//sw/host/opentitanlib",
         "//sw/host/provisioning/cp_lib",
         "//sw/host/provisioning/ujson_lib",
+        "//sw/host/provisioning/util_lib",
         "@crate_index//:anyhow",
         "@crate_index//:arrayvec",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
         "@crate_index//:rand",
-        "@crate_index//:tiny-keccak",
+        "@crate_index//:serde_json",
         "@crate_index//:zerocopy",
     ],
 )
diff --git a/sw/host/tests/manuf/cp_provision_functest/src/main.rs b/sw/host/tests/manuf/cp_provision_functest/src/main.rs
index 2afe76dc67d1e..e146e041305a5 100644
--- a/sw/host/tests/manuf/cp_provision_functest/src/main.rs
+++ b/sw/host/tests/manuf/cp_provision_functest/src/main.rs
@@ -9,21 +9,23 @@ use anyhow::Result;
 use arrayvec::ArrayVec;
 use clap::Parser;
 use rand::RngCore;
-use tiny_keccak::{CShake, Hasher};
-use zerocopy::AsBytes;
+use zerocopy::IntoBytes;
 
-use cp_lib::{reset_and_lock, run_sram_cp_provision, unlock_raw, ManufCpProvisioningDataInput};
-use opentitanlib::app::TransportWrapper;
+use cp_lib::{CpResponse, reset_and_lock, run_sram_cp_provision, unlock_raw};
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::console::spi::SpiConsoleDevice;
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
+use opentitanlib::io::gpio::{PinMode, PullMode};
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::lc_transition;
 use opentitanlib::test_utils::load_sram_program::{
     ExecutionMode, ExecutionResult, SramProgramParams,
 };
-use opentitanlib::test_utils::rpc::UartSend;
+use opentitanlib::test_utils::rpc::ConsoleSend;
 use opentitanlib::uart::console::UartConsole;
-use ujson_lib::provisioning_data::ManufCpProvisioningData;
+use ujson_lib::provisioning_data::{ManufCpProvisioningData, ManufCpTestData};
+use util_lib::hash_lc_token;
 
 #[derive(Debug, Parser)]
 pub struct Opts {
@@ -36,41 +38,40 @@ pub struct Opts {
     #[arg(long)]
     pub test_sram_elf: Option<PathBuf>,
 
-    #[command(flatten)]
-    pub provisioning_data: ManufCpProvisioningDataInput,
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "IOA5")]
+    console_tx_indicator_pin: String,
 
     /// Console receive timeout.
     #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
     pub timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
 }
 
 fn cp_provision(
     opts: &Opts,
     transport: &TransportWrapper,
     provisioning_data: &ManufCpProvisioningData,
+    response: &mut CpResponse,
+    spi_console: &SpiConsoleDevice,
 ) -> Result<()> {
     let provisioning_sram_program: SramProgramParams = SramProgramParams {
         elf: opts.provisioning_sram_elf.clone(),
         ..Default::default()
     };
-    unlock_raw(
-        transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
-    )?;
     run_sram_cp_provision(
         transport,
         &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
         &provisioning_sram_program,
         provisioning_data,
+        spi_console,
+        response,
         opts.timeout,
     )?;
-    reset_and_lock(
-        transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
-    )?;
+    reset_and_lock(transport, &opts.init.jtag_params)?;
     Ok(())
 }
 
@@ -81,7 +82,7 @@ fn test_unlock(
 ) -> Result<()> {
     // Connect to LC TAP.
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = opts
         .init
         .jtag_params
@@ -100,7 +101,6 @@ fn test_unlock(
         DifLcCtrlState::TestUnlocked1,
         test_unlock_token,
         /*use_external_clk=*/ true,
-        opts.init.bootstrap.options.reset_delay,
         /*reset_tap_straps=*/ Some(JtagTap::LcTap),
     )?;
 
@@ -120,11 +120,64 @@ fn test_unlock(
     Ok(())
 }
 
+fn prep_flash_for_cp_init(
+    opts: &Opts,
+    transport: &TransportWrapper,
+    test_data: &ManufCpTestData,
+    spi_console: &SpiConsoleDevice,
+) -> Result<()> {
+    let test_sram_program: SramProgramParams = SramProgramParams {
+        elf: opts.test_sram_elf.clone(),
+        ..Default::default()
+    };
+    // Reset the SPI console before loading the target firmware.
+    spi_console.reset_frame_counter();
+
+    // Set the TAP straps for the CPU and reset.
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
+    transport.reset(UartRx::Clear)?;
+
+    // Connect to the RISCV TAP via JTAG.
+    let mut jtag = opts
+        .init
+        .jtag_params
+        .create(transport)?
+        .connect(JtagTap::RiscvTap)?;
+
+    // Reset and halt the CPU to ensure we are in a known state.
+    jtag.reset(/*run=*/ false)?;
+
+    // Load and execute the SRAM program that contains the provisioning code.
+    let result = test_sram_program.load_and_execute(&mut *jtag, ExecutionMode::Jump)?;
+    match result {
+        ExecutionResult::Executing => log::info!("SRAM program loaded and is executing."),
+        _ => panic!("SRAM program load/execution failed: {:?}.", result),
+    }
+
+    // Wait for test to start running.
+    let _ = UartConsole::wait_for(spi_console, r"Waiting for CP test data ...", opts.timeout)?;
+
+    // Inject ground truth provisioning data into the device.
+    test_data.send(spi_console)?;
+
+    // Wait for test complete.
+    let _ = UartConsole::wait_for(spi_console, r"Flash info page 0 programmed.", opts.timeout)?;
+
+    jtag.disconnect()?;
+    transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
+
+    Ok(())
+}
+
 fn check_cp_provisioning(
     opts: &Opts,
     transport: &TransportWrapper,
-    provisioning_data: &ManufCpProvisioningData,
+    test_data: &ManufCpTestData,
+    spi_console: &SpiConsoleDevice,
 ) -> Result<()> {
+    // Reset the SPI console before loading the target firmware.
+    spi_console.reset_frame_counter();
+
     let test_sram_program: SramProgramParams = SramProgramParams {
         elf: opts.test_sram_elf.clone(),
         ..Default::default()
@@ -132,7 +185,7 @@ fn check_cp_provisioning(
 
     // Set the TAP straps for the CPU and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Connect to the RISCV TAP via JTAG.
     let mut jtag = opts
@@ -144,8 +197,6 @@ fn check_cp_provisioning(
     // Reset and halt the CPU to ensure we are in a known state, and clear out any ROM messages
     // printed over the console.
     jtag.reset(/*run=*/ false)?;
-    let uart = transport.uart("console")?;
-    uart.clear_rx_buffer()?;
 
     // Load and execute the SRAM program that contains the provisioning code.
     let result = test_sram_program.load_and_execute(&mut *jtag, ExecutionMode::Jump)?;
@@ -154,19 +205,14 @@ fn check_cp_provisioning(
         _ => panic!("SRAM program load/execution failed: {:?}.", result),
     }
 
-    // Get UART, set flow control, and wait for test to start running.
-    uart.set_flow_control(true)?;
-    let _ = UartConsole::wait_for(
-        &*uart,
-        r"Waiting for expected CP provisioning data ...",
-        opts.timeout,
-    )?;
+    // Wait for test to start running.
+    let _ = UartConsole::wait_for(spi_console, r"Waiting for CP test data ...", opts.timeout)?;
 
     // Inject ground truth provisioning data into the device.
-    provisioning_data.send(&*uart)?;
+    test_data.send(spi_console)?;
 
     // Wait for test complete.
-    let _ = UartConsole::wait_for(&*uart, r"Checks complete. Success.", opts.timeout)?;
+    let _ = UartConsole::wait_for(spi_console, r"Checks complete. Success.", opts.timeout)?;
 
     jtag.disconnect()?;
     transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
@@ -174,32 +220,38 @@ fn check_cp_provisioning(
     Ok(())
 }
 
-fn cshake_it(input: &[u8]) -> Result<ArrayVec<u64, 2>> {
-    let name = b"";
-    let customazation = b"LC_CTRL";
-    let mut csh = CShake::v128(name, customazation);
-    let mut output = [0u8; 16];
-
-    csh.update(input);
-    csh.finalize(&mut output);
-
-    Ok(output
-        .chunks_exact(8)
-        .map(|chunk| {
-            let arr: [u8; 8] = chunk.try_into().expect("chunk is the wrong size");
-            u64::from_le_bytes(arr)
-        })
-        .collect::<ArrayVec<u64, 2>>())
-}
-
 fn main() -> Result<()> {
     let opts = Opts::parse();
     opts.init.init_logging();
     let transport = opts.init.init_target()?;
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin(&opts.console_tx_indicator_pin)?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console_device = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
 
-    // Generate random provisioning values for testing.
-    let mut device_id = ArrayVec::new();
-    let mut manuf_state = ArrayVec::new();
+    // Transition from RAW to TEST_UNLOCKED0.
+    unlock_raw(&transport, &opts.init.jtag_params)?;
+
+    // Generate random test wafer data.
+    let test_data = ManufCpTestData {
+        lot_name: rand::thread_rng().next_u32(),
+        wafer_number: rand::thread_rng().next_u32(),
+        wafer_x_coord: rand::thread_rng().next_u32(),
+        wafer_y_coord: rand::thread_rng().next_u32(),
+    };
+
+    // CP response to log to console in JSON format.
+    let mut response = CpResponse::default();
+
+    // Prep flash info page 0 with wafer data, CP device ID, and AST configs.
+    prep_flash_for_cp_init(&opts, &transport, &test_data, &spi_console_device)?;
+
+    // Generate random CP inputs for testing.
     let mut wafer_auth_secret = ArrayVec::new();
     let mut test_exit_token: ArrayVec<u32, 4> = ArrayVec::new();
     let mut test_unlock_token: ArrayVec<u32, 4> = ArrayVec::new();
@@ -208,28 +260,33 @@ fn main() -> Result<()> {
             test_exit_token.push(rand::thread_rng().next_u32());
             test_unlock_token.push(rand::thread_rng().next_u32());
         }
-        device_id.push(rand::thread_rng().next_u32());
-        manuf_state.push(rand::thread_rng().next_u32());
         wafer_auth_secret.push(rand::thread_rng().next_u32());
     }
 
-    // Provision values into the chip.
+    // Provision test tokens, WAS, and extract CP device ID.
     let provisioning_data = ManufCpProvisioningData {
-        device_id,
-        manuf_state,
         wafer_auth_secret,
-        test_unlock_token_hash: cshake_it(test_unlock_token.as_bytes())?,
-        test_exit_token_hash: cshake_it(test_exit_token.as_bytes())?,
+        test_unlock_token_hash: hash_lc_token(test_unlock_token.as_bytes())?,
+        test_exit_token_hash: hash_lc_token(test_exit_token.as_bytes())?,
     };
-    cp_provision(&opts, &transport, &provisioning_data)?;
+    cp_provision(
+        &opts,
+        &transport,
+        &provisioning_data,
+        &mut response,
+        &spi_console_device,
+    )?;
 
-    // Transition to TEST_UNLOCKED1 and check provisioning operations over JTAG.
+    // Transition to TEST_UNLOCKED1 and check provisioning operations.
     test_unlock(
         &opts,
         &transport,
         Some(test_unlock_token.into_inner().unwrap()),
     )?;
-    check_cp_provisioning(&opts, &transport, &provisioning_data)?;
+    check_cp_provisioning(&opts, &transport, &test_data, &spi_console_device)?;
+
+    let doc = serde_json::to_string(&response)?;
+    println!("CHIP_PROBE_DATA: {doc}");
 
     Ok(())
 }
diff --git a/sw/host/tests/manuf/individualize_sw_cfg_functest/src/main.rs b/sw/host/tests/manuf/individualize_sw_cfg_functest/src/main.rs
index 96017d6c1311a..09b7ac0dd60c8 100644
--- a/sw/host/tests/manuf/individualize_sw_cfg_functest/src/main.rs
+++ b/sw/host/tests/manuf/individualize_sw_cfg_functest/src/main.rs
@@ -4,7 +4,7 @@
 
 use std::time::Duration;
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use regex::Regex;
 
@@ -37,11 +37,22 @@ fn individualize_sw_cfg(opts: &Opts, transport: &TransportWrapper) -> Result<()>
     uart.clear_rx_buffer()?;
     opts.init.bootstrap.init(transport)?;
 
+    // Wait for each partition to be provisioned.
     let _ = UartConsole::wait_for(
         &*uart,
         r"Provisioned and locked OWNER_SW_CFG OTP partition.",
         opts.timeout,
     )?;
+    let _ = UartConsole::wait_for(
+        &*uart,
+        r"Provisioned and locked ROT_CREATOR_AUTH_CODESIGN OTP partition.",
+        opts.timeout,
+    )?;
+    let _ = UartConsole::wait_for(
+        &*uart,
+        r"Provisioned and locked ROT_CREATOR_AUTH_STATE OTP partition.",
+        opts.timeout,
+    )?;
 
     // Reset chip, run flash stage, and wait for test status pass over the UART.
     let mut console = UartConsole {
diff --git a/sw/host/tests/manuf/manuf_cp_ast_test_execution/src/main.rs b/sw/host/tests/manuf/manuf_cp_ast_test_execution/src/main.rs
index c2313c8662f1e..934863f6983d8 100644
--- a/sw/host/tests/manuf/manuf_cp_ast_test_execution/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_ast_test_execution/src/main.rs
@@ -5,10 +5,10 @@
 use regex::Regex;
 use std::time::Duration;
 
-use anyhow::{anyhow, bail, Context, Result};
+use anyhow::{Context, Result, anyhow, bail};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::otp_ctrl::DaiParam;
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{Jtag, JtagTap};
@@ -46,9 +46,7 @@ fn connect_riscv_jtag<'t>(
         .pin_strapping("PINMUX_TAP_RISCV")?
         .apply()
         .context("failed to apply RISCV TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
diff --git a/sw/host/tests/manuf/manuf_cp_device_info_flash_wr/src/main.rs b/sw/host/tests/manuf/manuf_cp_device_info_flash_wr/src/main.rs
index b4c627e13b072..0511f4a4aa263 100644
--- a/sw/host/tests/manuf/manuf_cp_device_info_flash_wr/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_device_info_flash_wr/src/main.rs
@@ -4,11 +4,11 @@
 
 use std::time::Duration;
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::backend;
 use opentitanlib::dif::lc_ctrl::DifLcCtrlState;
 use opentitanlib::execute_test;
@@ -40,7 +40,7 @@ struct Opts {
 fn manuf_cp_device_info_flash_wr(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Set CPU TAP straps, reset, and connect to the JTAG interface.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = opts
         .init
         .jtag_params
@@ -96,7 +96,6 @@ fn manuf_cp_device_info_flash_wr(opts: &Opts, transport: &TransportWrapper) -> R
         opts.target_lc_state,
         Some(TEST_EXIT_TOKEN),
         /*use_external_clk=*/ true,
-        opts.init.bootstrap.options.reset_delay,
         /*reset_tap_straps=*/ None,
     )?;
 
diff --git a/sw/host/tests/manuf/manuf_cp_test_lock/src/main.rs b/sw/host/tests/manuf/manuf_cp_test_lock/src/main.rs
index 4ea2362fa0027..5a12bf9af6ee6 100644
--- a/sw/host/tests/manuf/manuf_cp_test_lock/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_test_lock/src/main.rs
@@ -10,7 +10,7 @@
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
 use opentitanlib::dif::otp_ctrl::{DaiParam, Partition};
 use opentitanlib::execute_test;
@@ -81,9 +81,7 @@ fn provision_token(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     transport.pin_strapping("PINMUX_TAP_RISCV")?.remove()?;
 
     // Reset after locking to allow the token to be used for transitions.
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     Ok(())
 }
@@ -105,7 +103,6 @@ fn test_lock(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result<()> {
         DifLcCtrlState::TestLocked0,
         None,
         true,
-        opts.init.bootstrap.options.reset_delay,
         Some(JtagTap::LcTap),
     )
     .context("failed to trigger transition to TEST_LOCKED0")?;
@@ -142,7 +139,6 @@ fn test_unlock(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result<()>
         DifLcCtrlState::TestUnlocked1,
         Some(TEST_UNLOCK_TOKEN_PREIMAGE),
         true,
-        opts.init.bootstrap.options.reset_delay,
         Some(JtagTap::LcTap),
     )
     .context("failed to trigger transition to TEST_UNLOCKED1")?;
@@ -180,9 +176,7 @@ fn reset_to_tap<'t>(
         .pin_strapping(strapping)?
         .apply()
         .with_context(|| format!("failed to apply {strapping} strapping"))?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     let jtag = opts
         .init
diff --git a/sw/host/tests/manuf/manuf_cp_unlock_raw/src/main.rs b/sw/host/tests/manuf/manuf_cp_unlock_raw/src/main.rs
index 3438f13fbb944..93e0ebf51f233 100644
--- a/sw/host/tests/manuf/manuf_cp_unlock_raw/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_unlock_raw/src/main.rs
@@ -7,7 +7,7 @@
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, DifLcCtrlToken, LcCtrlReg};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -29,9 +29,7 @@ fn manuf_cp_unlock_raw(opts: &Opts, transport: &TransportWrapper) -> Result<()>
         .pin_strapping("PINMUX_TAP_LC")?
         .apply()
         .context("failed to apply LC TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the LC TAP via JTAG.
     let mut jtag = opts
@@ -53,7 +51,6 @@ fn manuf_cp_unlock_raw(opts: &Opts, transport: &TransportWrapper) -> Result<()>
         DifLcCtrlState::TestUnlocked0,
         Some(token_words),
         true,
-        opts.init.bootstrap.options.reset_delay,
         Some(JtagTap::LcTap),
     )
     .context("failed to transition to TEST_UNLOCKED0")?;
diff --git a/sw/host/tests/manuf/manuf_cp_volatile_unlock_raw/src/main.rs b/sw/host/tests/manuf/manuf_cp_volatile_unlock_raw/src/main.rs
index 2e19707fa945c..289a4008f4a8f 100644
--- a/sw/host/tests/manuf/manuf_cp_volatile_unlock_raw/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_volatile_unlock_raw/src/main.rs
@@ -7,7 +7,7 @@
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, DifLcCtrlToken, LcCtrlReg};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -36,9 +36,7 @@ fn volatile_raw_unlock_with_reconnection_to_lc_tap(
         .pin_strapping("PINMUX_TAP_LC")?
         .apply()
         .context("failed to apply LC TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the LC TAP via JTAG.
     let mut jtag = opts
@@ -87,9 +85,7 @@ fn volatile_raw_unlock_with_reconnection_to_rv_tap(
         .pin_strapping("PINMUX_TAP_LC")?
         .apply()
         .context("failed to apply LC TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the LC TAP via JTAG.
     let mut jtag = opts
diff --git a/sw/host/tests/manuf/manuf_cp_yield_test/src/main.rs b/sw/host/tests/manuf/manuf_cp_yield_test/src/main.rs
index dda7c7763ceec..5ddc898803258 100644
--- a/sw/host/tests/manuf/manuf_cp_yield_test/src/main.rs
+++ b/sw/host/tests/manuf/manuf_cp_yield_test/src/main.rs
@@ -13,7 +13,7 @@ use std::time::Duration;
 use anyhow::{Context, Result};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg, LcCtrlStatus};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -42,7 +42,7 @@ fn manuf_cp_yield_test(opts: &Opts, transport: &TransportWrapper) -> Result<()>
         .pin_strapping("PINMUX_TAP_RISCV")?
         .apply()
         .context("failed to apply RISCV TAP strapping")?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = opts
         .init
         .jtag_params
diff --git a/sw/host/tests/manuf/manuf_scrap/src/main.rs b/sw/host/tests/manuf/manuf_scrap/src/main.rs
index 1ac85ff63faaa..47569be59dd3b 100644
--- a/sw/host/tests/manuf/manuf_scrap/src/main.rs
+++ b/sw/host/tests/manuf/manuf_scrap/src/main.rs
@@ -5,7 +5,7 @@
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -29,7 +29,7 @@ struct Opts {
 fn manuf_scrap(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     // Reset the chip, select the LC TAP, and connect to it.
     transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let mut jtag = opts
         .init
         .jtag_params
@@ -51,7 +51,6 @@ fn manuf_scrap(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
         DifLcCtrlState::Scrap,
         None,
         /*use_external_clk=*/ false,
-        opts.init.bootstrap.options.reset_delay,
         Some(JtagTap::LcTap),
     )?;
 
diff --git a/sw/host/tests/manuf/manuf_sram_program_crc_check/BUILD b/sw/host/tests/manuf/manuf_sram_program_crc_check/BUILD
index 04740c2c8380b..6bc22d5288ad5 100644
--- a/sw/host/tests/manuf/manuf_sram_program_crc_check/BUILD
+++ b/sw/host/tests/manuf/manuf_sram_program_crc_check/BUILD
@@ -13,6 +13,7 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
+        "//sw/host/opentitanlib/bindgen",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
diff --git a/sw/host/tests/manuf/manuf_sram_program_crc_check/src/main.rs b/sw/host/tests/manuf/manuf_sram_program_crc_check/src/main.rs
index b8b0a91dd126d..12d51ea04b412 100644
--- a/sw/host/tests/manuf/manuf_sram_program_crc_check/src/main.rs
+++ b/sw/host/tests/manuf/manuf_sram_program_crc_check/src/main.rs
@@ -4,15 +4,17 @@
 
 use std::time::Duration;
 
-use anyhow::{bail, Context, Result};
+use anyhow::{Context, Result, bail};
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use bindgen::sram_program::{SRAM_MAGIC_SP_CRC_SKIPPED, SRAM_MAGIC_SP_EXECUTION_DONE};
+
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::load_sram_program::{
-    execute_sram_program, ExecutionError, ExecutionMode, ExecutionResult, SramProgramParams,
+    ExecutionError, ExecutionMode, ExecutionResult, SramProgramParams, execute_sram_program,
 };
 use opentitanlib::uart::console::UartConsole;
 
@@ -27,13 +29,18 @@ struct Opts {
     sram_program: SramProgramParams,
 }
 
-fn test_sram_load(opts: &Opts, transport: &TransportWrapper, corrupt: bool) -> Result<()> {
+fn test_sram_load(
+    opts: &Opts,
+    transport: &TransportWrapper,
+    corrupt: bool,
+    skip_crc: bool,
+) -> Result<()> {
     let uart = transport.uart("console")?;
     //
     // Connect to the RISC-V TAP
     //
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     log::info!("Connecting to RISC-V TAP");
     let mut jtag = opts
@@ -63,15 +70,42 @@ fn test_sram_load(opts: &Opts, transport: &TransportWrapper, corrupt: bool) -> R
         &mut *jtag,
         &sram_prog_info,
         ExecutionMode::JumpAndWait(Duration::from_secs(5)),
+        skip_crc,
     )?;
     match exec_res {
-        ExecutionResult::ExecutionDone(_) => {
-            if corrupt {
-                bail!("SRAM program finished successfully but expected a CRC failure")
-            } else {
-                log::info!("SRAM program finished successfully")
+        ExecutionResult::ExecutionDone(sp_val) => match sp_val {
+            SRAM_MAGIC_SP_CRC_SKIPPED => {
+                if skip_crc {
+                    log::info!("SRAM program finished successfully")
+                } else {
+                    bail!(
+                        "SRAM program finished successfully but did not expect a SKIPPED_CRC result"
+                    )
+                }
             }
-        }
+            SRAM_MAGIC_SP_EXECUTION_DONE => {
+                if !corrupt && !skip_crc {
+                    log::info!("SRAM program finished successfully")
+                } else if corrupt {
+                    bail!("SRAM program finished successfully but expected a CRC failure")
+                } else if skip_crc {
+                    bail!(
+                        "SRAM program finished successfully but did not expect a SKIPPED_CRC result"
+                    )
+                } else {
+                    bail!(
+                        "SRAM program execution failed with unexpected result {:?}",
+                        exec_res
+                    )
+                }
+            }
+            _ => {
+                bail!(
+                    "SRAM program execution failed with unexpected result {:?}",
+                    exec_res
+                )
+            }
+        },
         ExecutionResult::ExecutionError(err) => match err {
             ExecutionError::CrcMismatch if corrupt => {
                 log::info!("SRAM program correctly reported a CRC mismatch")
@@ -109,9 +143,29 @@ fn main() -> Result<()> {
     let transport = opts.init.init_target()?;
 
     // First test is normal.
-    execute_test!(test_sram_load, &opts, &transport, false);
+    execute_test!(
+        test_sram_load,
+        &opts,
+        &transport,
+        /*corrupt=*/ false,
+        /*skip_crc=*/ false
+    );
     // Second test we try to corrupt the data.
-    execute_test!(test_sram_load, &opts, &transport, true);
+    execute_test!(
+        test_sram_load,
+        &opts,
+        &transport,
+        /*corrupt=*/ true,
+        /*skip_crc=*/ false
+    );
+    // Third test we skip the CRC check.
+    execute_test!(
+        test_sram_load,
+        &opts,
+        &transport,
+        /*corrupt=*/ false,
+        /*skip_crc=*/ true
+    );
 
     Ok(())
 }
diff --git a/sw/host/tests/manuf/manuf_ujson_msg_padding/BUILD b/sw/host/tests/manuf/manuf_ujson_msg_padding/BUILD
new file mode 100644
index 0000000000000..3679fcb269001
--- /dev/null
+++ b/sw/host/tests/manuf/manuf_ujson_msg_padding/BUILD
@@ -0,0 +1,20 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "manuf_ujson_msg_padding",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/provisioning/ujson_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+    ],
+)
diff --git a/sw/host/tests/manuf/manuf_ujson_msg_padding/src/main.rs b/sw/host/tests/manuf/manuf_ujson_msg_padding/src/main.rs
new file mode 100644
index 0000000000000..c1a06760b978e
--- /dev/null
+++ b/sw/host/tests/manuf/manuf_ujson_msg_padding/src/main.rs
@@ -0,0 +1,101 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::time::Duration;
+
+use anyhow::Result;
+use clap::Parser;
+
+use opentitanlib::console::spi::SpiConsoleDevice;
+use opentitanlib::io::gpio::{PinMode, PullMode};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use ujson_lib::provisioning_data::{LcTokenHash, ManufCertgenInputs, PersoBlob, SerdesSha256Hash};
+use ujson_lib::*;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
+    timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "IOA5")]
+    console_tx_indicator_pin: String,
+}
+
+fn main() -> Result<()> {
+    // Load bitstream and bootstrap test.
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    // Initialize the console.
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin(&opts.console_tx_indicator_pin)?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
+
+    // Receive the payloads from the device.
+    let sha256_hash = SerdesSha256Hash::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let lc_token_hash = LcTokenHash::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let certgen_inputs = ManufCertgenInputs::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let perso_blob = PersoBlob::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+
+    // Send the payloads back to the device.
+    let sha256_hash_str =
+        sha256_hash.send_with_padding(&spi_console, SERDES_SHA256_HASH_SERIALIZED_MAX_SIZE)?;
+    let lc_token_hash_str =
+        lc_token_hash.send_with_padding(&spi_console, LC_TOKEN_HASH_SERIALIZED_MAX_SIZE)?;
+    let certgen_inputs_str =
+        certgen_inputs.send_with_padding(&spi_console, MANUF_CERTGEN_INPUTS_SERIALIZED_MAX_SIZE)?;
+    let perso_blob_str =
+        perso_blob.send_with_padding(&spi_console, PERSO_BLOB_SERIALIZED_MAX_SIZE)?;
+
+    // Check padded UJSON string sizes.
+    assert_eq!(
+        sha256_hash_str.len(),
+        SERDES_SHA256_HASH_SERIALIZED_MAX_SIZE
+    );
+    assert_eq!(lc_token_hash_str.len(), LC_TOKEN_HASH_SERIALIZED_MAX_SIZE);
+    assert_eq!(
+        certgen_inputs_str.len(),
+        MANUF_CERTGEN_INPUTS_SERIALIZED_MAX_SIZE
+    );
+    assert_eq!(perso_blob_str.len(), PERSO_BLOB_SERIALIZED_MAX_SIZE);
+
+    Ok(())
+}
diff --git a/sw/host/tests/manuf/manuf_ujson_msg_size/BUILD b/sw/host/tests/manuf/manuf_ujson_msg_size/BUILD
new file mode 100644
index 0000000000000..b67f8dcd8d3b3
--- /dev/null
+++ b/sw/host/tests/manuf/manuf_ujson_msg_size/BUILD
@@ -0,0 +1,20 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "manuf_ujson_msg_size",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/provisioning/ujson_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+    ],
+)
diff --git a/sw/host/tests/manuf/manuf_ujson_msg_size/src/main.rs b/sw/host/tests/manuf/manuf_ujson_msg_size/src/main.rs
new file mode 100644
index 0000000000000..08c7d9baeca14
--- /dev/null
+++ b/sw/host/tests/manuf/manuf_ujson_msg_size/src/main.rs
@@ -0,0 +1,93 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::time::Duration;
+
+use anyhow::Result;
+use clap::Parser;
+
+use opentitanlib::console::spi::SpiConsoleDevice;
+use opentitanlib::io::gpio::{PinMode, PullMode};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use ujson_lib::provisioning_data::{LcTokenHash, ManufCertgenInputs, PersoBlob, SerdesSha256Hash};
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "20s")]
+    timeout: Duration,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "BOOTSTRAP")]
+    console_spi: String,
+
+    /// Name of the SPI interface to connect to the OTTF console.
+    #[arg(long, default_value = "IOA5")]
+    console_tx_indicator_pin: String,
+}
+
+fn main() -> Result<()> {
+    // Load bitstream and bootstrap test.
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    // Initialize the console.
+    let spi = transport.spi(&opts.console_spi)?;
+    let device_console_tx_ready_pin = &transport.gpio_pin(&opts.console_tx_indicator_pin)?;
+    device_console_tx_ready_pin.set_mode(PinMode::Input)?;
+    device_console_tx_ready_pin.set_pull_mode(PullMode::None)?;
+    let spi_console = SpiConsoleDevice::new(
+        &*spi,
+        Some(device_console_tx_ready_pin),
+        /*ignore_frame_num=*/ false,
+    )?;
+
+    // Receive the payloads from the device.
+    let sha256_hash = SerdesSha256Hash::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let lc_token_hash = LcTokenHash::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let certgen_inputs = ManufCertgenInputs::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+    let perso_blob = PersoBlob::recv(
+        &spi_console,
+        opts.timeout,
+        /*quiet=*/ true,
+        /*skip_crc=*/ true,
+    )?;
+
+    // Send the payloads back to the device.
+    let sha256_hash_str = sha256_hash.send(&spi_console)?;
+    let lc_token_hash_str = lc_token_hash.send(&spi_console)?;
+    let certgen_inputs_str = certgen_inputs.send(&spi_console)?;
+    let perso_blob_str = perso_blob.send(&spi_console)?;
+
+    // Print UJSON payload sizes to the console.
+    println!("Sha256Hash Size:         {} bytes", sha256_hash_str.len());
+    println!("LcTokenHash Size:        {} bytes", lc_token_hash_str.len());
+    println!(
+        "ManufCertgenInputs Size: {} bytes",
+        certgen_inputs_str.len()
+    );
+    println!("PersoBlob Size:          {} bytes", perso_blob_str.len());
+
+    Ok(())
+}
diff --git a/sw/host/tests/manuf/otp_ctrl/src/main.rs b/sw/host/tests/manuf/otp_ctrl/src/main.rs
index bf17f82ba2476..4a2365cbe18c5 100644
--- a/sw/host/tests/manuf/otp_ctrl/src/main.rs
+++ b/sw/host/tests/manuf/otp_ctrl/src/main.rs
@@ -8,7 +8,7 @@
 use anyhow::Context;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::dif::otp_ctrl::{DaiParam, Partition};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -40,9 +40,7 @@ fn program_readback(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result
         .pin_strapping("PINMUX_TAP_RISCV")?
         .apply()
         .context("failed to apply RISCV TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the RISCV TAP via JTAG.
     let mut jtag = opts
@@ -75,9 +73,7 @@ fn lock_partition(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result<(
         .pin_strapping("PINMUX_TAP_RISCV")?
         .apply()
         .context("failed to apply RISCV TAP strapping")?;
-    transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
-        .context("failed to reset")?;
+    transport.reset(UartRx::Clear).context("failed to reset")?;
 
     // Connect to the RISCV TAP via JTAG.
     let mut jtag = opts
diff --git a/sw/host/tests/manuf/personalize_functest/BUILD b/sw/host/tests/manuf/personalize_functest/BUILD
index 03506ed1171c4..1513552c6f8a8 100644
--- a/sw/host/tests/manuf/personalize_functest/BUILD
+++ b/sw/host/tests/manuf/personalize_functest/BUILD
@@ -24,6 +24,7 @@ rust_binary(
     },
     deps = [
         "//sw/host/opentitanlib",
+        "//sw/host/provisioning/util_lib",
         "@crate_index//:aes",
         "@crate_index//:anyhow",
         "@crate_index//:arrayvec",
@@ -34,5 +35,6 @@ rust_binary(
         "@crate_index//:p256",
         "@crate_index//:serde",
         "@crate_index//:serde_json",
+        "@crate_index//:zerocopy",
     ],
 )
diff --git a/sw/host/tests/manuf/personalize_functest/src/main.rs b/sw/host/tests/manuf/personalize_functest/src/main.rs
index 3deaf2703d751..1131737624dd4 100644
--- a/sw/host/tests/manuf/personalize_functest/src/main.rs
+++ b/sw/host/tests/manuf/personalize_functest/src/main.rs
@@ -3,18 +3,11 @@
 // SPDX-License-Identifier: Apache-2.0
 
 use std::collections::HashSet;
-use std::path::PathBuf;
 use std::time::Duration;
 
-use aes::cipher::{generic_array::GenericArray, BlockDecrypt, KeyInit};
-use aes::Aes256Dec;
 use anyhow::Result;
-use arrayvec::ArrayVec;
 use clap::Parser;
-use elliptic_curve::ecdh::diffie_hellman;
-use elliptic_curve::pkcs8::DecodePrivateKey;
-use elliptic_curve::{PublicKey, SecretKey};
-use p256::NistP256;
+use zerocopy::IntoBytes;
 
 use opentitanlib::app::TransportWrapper;
 use opentitanlib::dif::lc_ctrl::DifLcCtrlState;
@@ -23,11 +16,12 @@ use opentitanlib::io::jtag::JtagTap;
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::test_utils::lc::read_lc_state;
 use opentitanlib::test_utils::lc_transition::trigger_lc_transition;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::ConsoleSend;
 use opentitanlib::uart::console::UartConsole;
+use util_lib::hash_lc_token;
 
 mod provisioning_data;
-use provisioning_data::{EccP256PublicKey, WrappedRmaUnlockToken};
+use provisioning_data::LcTokenHash;
 
 #[derive(Debug, Parser)]
 struct Opts {
@@ -37,38 +31,12 @@ struct Opts {
     /// Console receive timeout.
     #[arg(long, value_parser = humantime::parse_duration, default_value = "600s")]
     timeout: Duration,
-
-    /// Host (HSM) generated ECC (P256) private key DER file.
-    #[arg(long)]
-    host_ecc_sk: PathBuf,
 }
 
-fn rma_unlock_token_export(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+fn send_rma_unlock_token(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     let uart = transport.uart("console")?;
     uart.set_flow_control(true)?;
-
-    // Load host (HSM) generated ECC keys.
-    let host_sk = SecretKey::<NistP256>::read_pkcs8_der_file(&opts.host_ecc_sk)?;
-    let host_pk = PublicKey::<NistP256>::from_secret_scalar(&host_sk.to_nonzero_scalar());
-
-    // Format host generated ECC public key to inject it into the device.
-    let host_pk_sec1_bytes = host_pk.to_sec1_bytes();
-    let num_coord_bytes: usize = (host_pk_sec1_bytes.len() - 1) / 2;
-    let mut host_pk_x = host_pk_sec1_bytes.as_ref()[1..num_coord_bytes + 1]
-        .chunks(4)
-        .map(|bytes| u32::from_be_bytes(bytes.try_into().unwrap()))
-        .collect::<ArrayVec<u32, 8>>();
-    let mut host_pk_y = host_pk_sec1_bytes.as_ref()[num_coord_bytes + 1..]
-        .chunks(4)
-        .map(|bytes| u32::from_be_bytes(bytes.try_into().unwrap()))
-        .collect::<ArrayVec<u32, 8>>();
-    host_pk_x.reverse();
-    host_pk_y.reverse();
-    let host_pk = EccP256PublicKey {
-        x: host_pk_x,
-        y: host_pk_y,
-    };
-
+    let rma_unlock_token: [u32; 4] = [1, 2, 3, 4];
     // Wait for the program to complete SECRET1 configuration and apply a ROM
     // bootstrap operation. This is needed because the flash scrambling key
     // may cause the flash contents to be garbled after locking the SECRET1
@@ -79,57 +47,23 @@ fn rma_unlock_token_export(opts: &Opts, transport: &TransportWrapper) -> Result<
 
     let _ = UartConsole::wait_for(
         &*uart,
-        r"Ready to receive host ECC pubkey ...",
+        r"Waiting For RMA Unlock Token Hash ...",
         opts.timeout,
     )?;
 
-    // Send the host ECC public key to the device over the console.
-    host_pk.send_with_crc(&*uart)?;
-
-    // Wait for output data to be transimitted over the console.
-    let _ = UartConsole::wait_for(&*uart, r"Exporting RMA unlock token ...", opts.timeout)?;
-    let wrapped_rma_token = WrappedRmaUnlockToken::recv(&*uart, opts.timeout, false)?;
-    log::info!("{:x?}", wrapped_rma_token);
-
-    // Load device-generated EC public key.
-    let mut device_pk_sec1_bytes = Vec::new();
-    for key_word in &wrapped_rma_token.device_pk.y {
-        device_pk_sec1_bytes.extend(&key_word.to_le_bytes());
-    }
-    for key_word in &wrapped_rma_token.device_pk.x {
-        device_pk_sec1_bytes.extend(&key_word.to_le_bytes());
-    }
-    device_pk_sec1_bytes.push(0x04); // This indicates the EC public key is not compressed.
-    device_pk_sec1_bytes.reverse();
-    let device_pk = PublicKey::<NistP256>::from_sec1_bytes(&device_pk_sec1_bytes)?;
-
-    // Peform ECDH to generate shared secret (AES) key.
-    let ecdh_shared_secret = diffie_hellman(host_sk.to_nonzero_scalar(), device_pk.as_affine());
-    let mut aes_key_bytes = Vec::from(ecdh_shared_secret.raw_secret_bytes().as_slice());
-    aes_key_bytes.reverse();
-    let aes_key = GenericArray::from_slice(aes_key_bytes.as_slice());
-
-    // Load encrypted RMA unlock token into a GenericArray.
-    let mut ciphertext = Vec::new();
-    for ciphertext_word in wrapped_rma_token.data {
-        ciphertext.extend(&ciphertext_word.to_le_bytes());
-    }
-    let plaintext = GenericArray::from_mut_slice(ciphertext.as_mut_slice());
-
-    // Decrypt the RMA unlock token, and convert it to a fixed array of 32-bit words.
-    let aes_ecb_cipher = Aes256Dec::new(aes_key);
-    aes_ecb_cipher.decrypt_block(plaintext);
-    let mut rma_unlock_token = [0u32; 4];
-    for (i, word) in rma_unlock_token.iter_mut().enumerate() {
-        *word = u32::from_le_bytes(plaintext[(i * 4)..((i * 4) + 4)].try_into().unwrap());
-    }
+    let rma_token_hash = LcTokenHash {
+        hash: hash_lc_token(rma_unlock_token.as_bytes())?,
+    };
 
-    // Check the LC state is Dev or Prod.
-    let current_lc_state = read_lc_state(
-        transport,
-        &opts.init.jtag_params,
-        opts.init.bootstrap.options.reset_delay,
+    rma_token_hash.send_with_crc(&*uart)?;
+
+    let _ = UartConsole::wait_for(
+        &*uart,
+        r"Finished provisioning OTP SECRET2 and keymgr flash info pages ...",
+        opts.timeout,
     )?;
+    // Check the LC state is Dev or Prod.
+    let current_lc_state = read_lc_state(transport, &opts.init.jtag_params)?;
     let valid_lc_states = HashSet::from([DifLcCtrlState::Dev, DifLcCtrlState::Prod]);
     assert!(
         valid_lc_states.contains(&current_lc_state),
@@ -150,7 +84,6 @@ fn rma_unlock_token_export(opts: &Opts, transport: &TransportWrapper) -> Result<
         DifLcCtrlState::Rma,
         Some(rma_unlock_token),
         /*use_external_clk=*/ false,
-        opts.init.bootstrap.options.reset_delay,
         /*reset_tap_straps=*/ None,
     )?;
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
@@ -158,11 +91,7 @@ fn rma_unlock_token_export(opts: &Opts, transport: &TransportWrapper) -> Result<
 
     // Check the LC state is RMA.
     assert_eq!(
-        read_lc_state(
-            transport,
-            &opts.init.jtag_params,
-            opts.init.bootstrap.options.reset_delay,
-        )?,
+        read_lc_state(transport, &opts.init.jtag_params)?,
         DifLcCtrlState::Rma,
         "Did not transition to RMA.",
     );
@@ -175,7 +104,7 @@ fn main() -> Result<()> {
     opts.init.init_logging();
     let transport = opts.init.init_target()?;
 
-    execute_test!(rma_unlock_token_export, &opts, &transport);
+    execute_test!(send_rma_unlock_token, &opts, &transport);
 
     Ok(())
 }
diff --git a/sw/host/tests/ownership/BUILD b/sw/host/tests/ownership/BUILD
new file mode 100644
index 0000000000000..1dab1bb38ff25
--- /dev/null
+++ b/sw/host/tests/ownership/BUILD
@@ -0,0 +1,90 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+load("//rules:ujson.bzl", "ujson_rust")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "transfer_lib",
+    srcs = ["transfer_lib.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/sphincsplus",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:log",
+    ],
+)
+
+rust_binary(
+    name = "transfer_test",
+    srcs = ["transfer_test.rs"],
+    deps = [
+        ":transfer_lib",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+    ],
+)
+
+rust_binary(
+    name = "rescue_limit_test",
+    srcs = ["rescue_limit_test.rs"],
+    deps = [
+        ":transfer_lib",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+    ],
+)
+
+rust_binary(
+    name = "rescue_permission_test",
+    srcs = ["rescue_permission_test.rs"],
+    deps = [
+        ":transfer_lib",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+    ],
+)
+
+rust_binary(
+    name = "flash_permission_test",
+    srcs = ["flash_permission_test.rs"],
+    deps = [
+        ":transfer_lib",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+    ],
+)
+
+rust_binary(
+    name = "newversion_test",
+    srcs = ["newversion_test.rs"],
+    deps = [
+        ":transfer_lib",
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+    ],
+)
diff --git a/sw/host/tests/ownership/flash_permission_test.rs b/sw/host/tests/ownership/flash_permission_test.rs
new file mode 100644
index 0000000000000..20829f1d6665c
--- /dev/null
+++ b/sw/host/tests/ownership/flash_permission_test.rs
@@ -0,0 +1,407 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use regex::Regex;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::chip::boot_svc::{BootSlot, UnlockMode};
+use opentitanlib::chip::rom_error::RomError;
+use opentitanlib::ownership::OwnershipKeyAlg;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use transfer_lib::HybridPair;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+    #[arg(long, help = "Unlock private key (ECDSA P256)")]
+    unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Activate private key (ECDSA P256)")]
+    activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner private key (ECDSA P256)")]
+    next_owner_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (ECDSA P256)")]
+    next_owner_key_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (ECDSA P256)")]
+    next_activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (ECDSA P256)")]
+    next_unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner's application public key (ECDSA P256)")]
+    next_application_key: PathBuf,
+
+    #[arg(
+        long,
+        value_enum,
+        default_value = "with-flash-locked",
+        help = "Style of Owner Config for this test"
+    )]
+    config_kind: transfer_lib::OwnerConfigKind,
+
+    #[arg(
+        long,
+        help = "Load a firmware payload via rescue after activating ownership"
+    )]
+    rescue_after_activate: Option<PathBuf>,
+    #[arg(long, value_parser = humantime::parse_duration, help = "Max timeout to enter rescue mode")]
+    rescue_enter_delay: Option<Duration>,
+    #[arg(long, default_value = "SlotA", help = "Which slot to rescue into")]
+    rescue_slot: BootSlot,
+    #[arg(
+        long,
+        default_value = "SlotA",
+        help = "Which slot the ROM_EXT is expected to execute from"
+    )]
+    expected_rom_ext_slot: BootSlot,
+
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Check the firmware boot in dual-owner mode")]
+    dual_owner_boot_check: bool,
+
+    #[arg(long, default_value = "Any", help = "Mode of the unlock operation")]
+    unlock_mode: UnlockMode,
+    #[arg(long, help = "Expected error condition")]
+    expected_error: Option<String>,
+}
+
+#[derive(Debug, PartialEq, Eq)]
+struct FlashRegion<'a>(&'a str, u32, u32, u32, &'a str, &'a str);
+
+impl FlashRegion<'_> {
+    // Parse the text from the firmware into a list of FlashRegions.
+    fn find_all(v: &str) -> Result<Vec<FlashRegion<'_>>> {
+        let mut result = Vec::new();
+        let re = Regex::new(
+            // Matches strings of the following forms:
+            // data region n=0 st=0 sz=32 RD-xx-xx-xx-xx-xx UN
+            // info region bank=0 part=0 page=6 xx-xx-xx-xx-xx-xx UN
+            r"(?msR)(?<type>\w+) region (?:(?:n=(?<n>\d+) st=(?<st>\d+) sz=(?<sz>\d+))|(?:bank=(?<bank>\d+) part=(?<part>\d+) page=(?<page>\d+))) (?<perm>[^ ]+) (?<lock>\w+)$"
+        ).unwrap();
+        for cap in re.captures_iter(v) {
+            if &cap["type"] == "data" {
+                result.push(FlashRegion(
+                    cap.name("type").unwrap().as_str(),
+                    cap["n"].parse()?,
+                    cap["st"].parse()?,
+                    cap["sz"].parse()?,
+                    cap.name("perm").unwrap().as_str(),
+                    cap.name("lock").unwrap().as_str(),
+                ));
+            } else if &cap["type"] == "info" {
+                result.push(FlashRegion(
+                    cap.name("type").unwrap().as_str(),
+                    cap["bank"].parse()?,
+                    cap["part"].parse()?,
+                    cap["page"].parse()?,
+                    cap.name("perm").unwrap().as_str(),
+                    cap.name("lock").unwrap().as_str(),
+                ));
+            } else {
+                return Err(anyhow!("Unknown flash region type: {:?}", &cap["type"]));
+            }
+        }
+        Ok(result)
+    }
+}
+
+fn flash_info_check(info: &[FlashRegion<'_>], unlocked: bool) -> Result<()> {
+    // Flash info regions when no OwnerReserved pages are configured:
+    let config = [
+        FlashRegion("info", 0, 0, 0, "uu-uu-uu-uu-uu-uu", "LK"), // factory ID
+        FlashRegion("info", 0, 0, 1, "uu-uu-uu-uu-uu-uu", "LK"), // creator secret
+        FlashRegion("info", 0, 0, 2, "uu-uu-uu-uu-uu-uu", "LK"), // owner secret
+        FlashRegion("info", 0, 0, 3, "uu-uu-uu-uu-uu-uu", "LK"), // wafer auth secret
+        FlashRegion("info", 0, 0, 4, "RD-xx-xx-SC-EC-xx", "LK"), // attestation key seeds
+        FlashRegion("info", 0, 0, 5, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 0, 0, 6, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 0, 0, 7, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 0, 0, 8, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 0, 0, 9, "RD-xx-xx-SC-EC-xx", "LK"), // factory certs
+        FlashRegion("info", 1, 0, 0, "uu-uu-uu-uu-uu-uu", "LK"), // boot data 0
+        FlashRegion("info", 1, 0, 1, "uu-uu-uu-uu-uu-uu", "LK"), // boot data 1
+        FlashRegion("info", 1, 0, 2, "RD-xx-xx-SC-EC-xx", "LK"), // owner config 0
+        if unlocked {
+            // Owner Config 1 is a creator-level INFO page and is left
+            // writeable when the device is in an unlocked state.
+            FlashRegion("info", 1, 0, 3, "RD-WR-ER-SC-EC-xx", "LK") // owner config 1
+        } else {
+            FlashRegion("info", 1, 0, 3, "RD-xx-xx-SC-EC-xx", "LK") // owner config 1
+        },
+        FlashRegion("info", 1, 0, 4, "uu-uu-uu-uu-uu-uu", "LK"), // creator reserved
+        // Like DATA pages, owner-level INFO pages are left unlocked
+        // when the device is in an unlocked state and, if so configured,
+        // are locked when in the LockedOwner state.
+        if unlocked {
+            FlashRegion("info", 1, 0, 5, "RD-WR-ER-xx-xx-HE", "UN") // owner reserved
+        } else {
+            FlashRegion("info", 1, 0, 5, "RD-WR-ER-xx-xx-HE", "LK") // owner reserved
+        },
+        FlashRegion("info", 1, 0, 6, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 1, 0, 7, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 1, 0, 8, "xx-xx-xx-xx-xx-xx", "UN"), // owner reserved
+        FlashRegion("info", 1, 0, 9, "RD-xx-xx-SC-EC-xx", "LK"), // dice certs
+    ];
+    assert_eq!(info.len(), config.len());
+    let mut err = 0;
+    for i in 0..config.len() {
+        if info[i] != config[i] {
+            log::error!("INFO entry {i}: {:?} != {:?}", info[i], config[i]);
+            err += 1;
+        }
+    }
+    if err != 0 {
+        Err(anyhow!("INFO lockdown mismatch"))
+    } else {
+        Ok(())
+    }
+}
+
+fn flash_permission_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), opts.rescue_enter_delay);
+
+    log::info!("###### Get Boot Log (1/2) ######");
+    let (data, devid) = transfer_lib::get_device_info(transport, &rescue)?;
+    log::info!("###### Ownership Unlock ######");
+    transfer_lib::ownership_unlock(
+        transport,
+        &rescue,
+        opts.unlock_mode,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.unlock_key.clone(),
+        None,
+        if opts.unlock_mode == UnlockMode::Endorsed {
+            opts.next_owner_key_pub.as_deref()
+        } else {
+            None
+        },
+        None,
+        false,
+    )?;
+
+    log::info!("###### Get Boot Log (2/2) ######");
+    let (data, _) = transfer_lib::get_device_info(transport, &rescue)?;
+
+    log::info!("###### Upload Owner Block ######");
+    transfer_lib::create_owner(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        OwnershipKeyAlg::EcdsaP256,
+        HybridPair::load(opts.next_owner_key.as_deref(), None)?,
+        HybridPair::load(opts.next_activate_key.as_deref(), None)?,
+        HybridPair::load(opts.next_unlock_key.as_deref(), None)?,
+        &opts.next_application_key,
+        opts.config_kind,
+        /*customize=*/ |_| {},
+    )?;
+
+    // The expected_rom_ext_slot is where we expect the ROM_EXT to execute.
+    let romext_region = match opts.expected_rom_ext_slot {
+        BootSlot::SlotA => ["RD-xx-xx-uu-uu-uu", "RD-WR-ER-uu-uu-uu"],
+        BootSlot::SlotB => ["RD-WR-ER-uu-uu-uu", "RD-xx-xx-uu-uu-uu"],
+        _ => return Err(anyhow!("Unknown boot slot {}", data.bl0_slot)),
+    };
+
+    if opts.dual_owner_boot_check {
+        log::info!("###### Boot in Dual-Owner Mode ######");
+        // At this point, the device should be unlocked and should have accepted the owner
+        // configuration.  Owner code should run and report the ownership state.
+        //
+        // The flash configuration will be the previous owner in Side A and
+        // the new owner in SideB.
+        transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+        let capture = UartConsole::wait_for(
+            &*uart,
+            r"(?msR)Running(.*)Finished.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+            opts.timeout,
+        )?;
+        if capture[0].starts_with("BFV") {
+            return RomError(u32::from_str_radix(&capture[2], 16)?).into();
+        }
+        let region = FlashRegion::find_all(&capture[1])?;
+        // Flash SideA is the previous owner configuration.  The `fake` test owner
+        // has no flash configuration at all.
+        //
+        // Note: The number of regions and indices of the regions is currently
+        // Earlgrey-specific.
+        //
+        // Note: when in an unlocked state, flash lockdown doesn't apply, so neither
+        // the `protect_when_active` nor `lock` bits for individual regions will
+        // affect the region config.
+
+        // The ROM_EXT always protects itself in regions 0 and 1.
+        assert_eq!(
+            region[0],
+            FlashRegion("data", 0, 0, 32, romext_region[0], "LK")
+        );
+        assert_eq!(
+            region[1],
+            FlashRegion("data", 1, 256, 32, romext_region[1], "LK")
+        );
+
+        // Current owner (fake_owner in flash SideA) doesn't have a configuration,
+        // so no MP_REGION registers are programmed.
+
+        // Next owner (dummy_owner in Flash SideB) is the next owner configuration.
+        assert_eq!(
+            region[2],
+            FlashRegion("data", 2, 288, 192, "RD-WR-ER-SC-EC-xx", "UN")
+        );
+        assert_eq!(
+            region[3],
+            FlashRegion("data", 3, 480, 32, "RD-WR-ER-xx-xx-HE", "UN")
+        );
+
+        // The remaining flash regions are unused.
+        assert_eq!(
+            region[4],
+            FlashRegion("data", 4, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+        );
+        assert_eq!(
+            region[5],
+            FlashRegion("data", 5, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+        );
+        assert_eq!(
+            region[6],
+            FlashRegion("data", 6, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+        );
+        assert_eq!(
+            region[7],
+            FlashRegion("data", 7, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+        );
+
+        flash_info_check(&region[8..], /*unlocked=*/ true)?;
+    }
+
+    log::info!("###### Ownership Activate Block ######");
+    transfer_lib::ownership_activate(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.activate_key
+            .clone()
+            .or_else(|| opts.next_activate_key.clone()),
+        None,
+        BootSlot::SlotA,
+    )?;
+
+    if let Some(fw) = &opts.rescue_after_activate {
+        let data = std::fs::read(fw)?;
+        rescue.enter(transport, EntryMode::Reset)?;
+        rescue.update_firmware(opts.rescue_slot, &data)?;
+        // Clear the opposite slot because we changed the scrambling/ecc settings
+        // for the application area of flash.
+        rescue.update_firmware(opts.rescue_slot.opposite()?, &[0xFFu8])?;
+        rescue.reboot()?;
+    }
+
+    log::info!("###### Boot After Transfer Complete ######");
+    // After the activate command, the device should report the ownership state as `OWND`.
+    transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+    let capture = UartConsole::wait_for(
+        &*uart,
+        r"(?msR)Running(.*)Finished.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+        opts.timeout,
+    )?;
+    if capture[0].starts_with("BFV") {
+        return RomError(u32::from_str_radix(&capture[2], 16)?).into();
+    }
+    let region = FlashRegion::find_all(&capture[1])?;
+
+    // Since we are in a locked ownership state, we expect the region configuration
+    // to reflect both the `protect_when_active` and `lock` properties of the
+    // owner's flash configuration.
+    let locked = if opts.config_kind.is_flash_locked() {
+        "LK"
+    } else {
+        "UN"
+    };
+
+    // The rescue_slot should be the active side and has protect_when_active = true.
+    let app_region = match opts.rescue_slot {
+        BootSlot::SlotA => [
+            // Slot A protected, Slot B writable.
+            FlashRegion("data", 2, 32, 192, "RD-xx-xx-SC-EC-xx", locked),
+            FlashRegion("data", 3, 224, 32, "RD-WR-ER-xx-xx-HE", locked),
+            FlashRegion("data", 4, 288, 192, "RD-WR-ER-SC-EC-xx", locked),
+            FlashRegion("data", 5, 480, 32, "RD-WR-ER-xx-xx-HE", locked),
+        ],
+        BootSlot::SlotB => [
+            // Slot A writable, Slot B protected.
+            FlashRegion("data", 2, 32, 192, "RD-WR-ER-SC-EC-xx", locked),
+            FlashRegion("data", 3, 224, 32, "RD-WR-ER-xx-xx-HE", locked),
+            FlashRegion("data", 4, 288, 192, "RD-xx-xx-SC-EC-xx", locked),
+            FlashRegion("data", 5, 480, 32, "RD-WR-ER-xx-xx-HE", locked),
+        ],
+        _ => return Err(anyhow!("Unknown boot slot {}", data.bl0_slot)),
+    };
+
+    // The ROM_EXT always protects itself in regions 0 and 1.
+    assert_eq!(
+        region[0],
+        FlashRegion("data", 0, 0, 32, romext_region[0], "LK")
+    );
+    assert_eq!(
+        region[1],
+        FlashRegion("data", 1, 256, 32, romext_region[1], "LK")
+    );
+    // Flash Slot A:
+    assert_eq!(region[2], app_region[0]);
+    assert_eq!(region[3], app_region[1]);
+    // Flash Slot B:
+    assert_eq!(region[4], app_region[2]);
+    assert_eq!(region[5], app_region[3]);
+    // The last two regions are unused, and therefore, should be left unlocked.
+    assert_eq!(
+        region[6],
+        FlashRegion("data", 6, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+    );
+    assert_eq!(
+        region[7],
+        FlashRegion("data", 7, 0, 0, "xx-xx-xx-xx-xx-xx", "UN")
+    );
+
+    flash_info_check(&region[8..], /*unlocked=*/ false)?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let result = flash_permission_test(&opts, &transport);
+    if let Some(error) = &opts.expected_error {
+        match result {
+            Ok(_) => Err(anyhow!("Ok when expecting {error:?}")),
+            Err(e) => {
+                let re = Regex::new(error).expect("regex");
+                if re.is_match(&e.to_string()) {
+                    log::info!("Got expected error code: {e}");
+                    Ok(())
+                } else {
+                    Err(anyhow!("Expected {error:?} but got {e}"))
+                }
+            }
+        }
+    } else {
+        result
+    }
+}
diff --git a/sw/host/tests/ownership/newversion_test.rs b/sw/host/tests/ownership/newversion_test.rs
new file mode 100644
index 0000000000000..5fbf975734d78
--- /dev/null
+++ b/sw/host/tests/ownership/newversion_test.rs
@@ -0,0 +1,170 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow, ensure};
+use clap::Parser;
+use regex::Regex;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::chip::rom_error::RomError;
+use opentitanlib::ownership::OwnershipKeyAlg;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use transfer_lib::HybridPair;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+    #[arg(long, default_value_t = OwnershipKeyAlg::EcdsaP256, help = "Current Owner key algorithm")]
+    next_key_alg: OwnershipKeyAlg,
+    #[arg(long, help = "Next Owner private key (ECDSA P256)")]
+    next_owner_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (ECDSA P256)")]
+    next_owner_key_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (ECDSA P256)")]
+    next_activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (ECDSA P256)")]
+    next_unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner's application public key (ECDSA P256)")]
+    next_application_key: PathBuf,
+
+    #[arg(long, help = "Next Owner private key (SPX)")]
+    next_owner_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (SPX)")]
+    next_owner_key_spx_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (SPX)")]
+    next_activate_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (SPX)")]
+    next_unlock_key_spx: Option<PathBuf>,
+
+    #[arg(long, value_parser = humantime::parse_duration, help = "Max timeout to enter rescue mode")]
+    rescue_enter_delay: Option<Duration>,
+
+    #[arg(
+        long,
+        default_value_t = transfer_lib::TEST_OWNER_CONFIG_VERSION,
+        help = "Configuration version to put in the owner config"
+    )]
+    config_version: u32,
+
+    #[arg(
+        long,
+        help = "Lock the owner config to the device identification number"
+    )]
+    locked_to_din: Option<u64>,
+
+    #[arg(
+        long,
+        value_enum,
+        default_value = "basic",
+        help = "Style of Owner Config for this test"
+    )]
+    config_kind: transfer_lib::OwnerConfigKind,
+
+    #[arg(long, help = "Expected success conditions")]
+    expect: Vec<String>,
+
+    #[arg(long, help = "Expected error condition")]
+    expected_error: Option<String>,
+}
+
+fn newversion_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), opts.rescue_enter_delay);
+
+    log::info!("###### Get Device Info ######");
+    rescue.enter(transport, EntryMode::Reset)?;
+    let (data, devid) = transfer_lib::get_device_info(transport, &rescue)?;
+
+    log::info!("###### Upload Owner Block ######");
+    transfer_lib::create_owner(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        opts.next_key_alg,
+        HybridPair::load(
+            opts.next_owner_key.as_deref(),
+            opts.next_owner_key_spx.as_deref(),
+        )?,
+        HybridPair::load(
+            opts.next_activate_key.as_deref(),
+            opts.next_activate_key_spx.as_deref(),
+        )?,
+        HybridPair::load(
+            opts.next_unlock_key.as_deref(),
+            opts.next_unlock_key_spx.as_deref(),
+        )?,
+        &opts.next_application_key,
+        opts.config_kind,
+        /*customize=*/
+        |owner| {
+            owner.config_version = opts.config_version;
+            if let Some(din) = opts.locked_to_din {
+                let din = match din {
+                    0 => devid.din,
+                    x => x,
+                };
+                owner.lock_constraint = 0x6;
+                owner.device_id[1] = din as u32;
+                owner.device_id[2] = (din >> 32) as u32;
+            }
+        },
+    )?;
+
+    log::info!("###### Boot After Update Complete ######");
+    transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+    let capture = UartConsole::wait_for(
+        &*uart,
+        r"(?msR)Running.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+        opts.timeout,
+    )?;
+    if capture[0].starts_with("BFV") {
+        return RomError(u32::from_str_radix(&capture[1], 16)?).into();
+    }
+
+    for exp in opts.expect.iter() {
+        let erx = Regex::new(exp)?;
+        ensure!(
+            erx.is_match(&capture[0]),
+            "Did not find expected output {exp:?}"
+        );
+    }
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let result = newversion_test(&opts, &transport);
+    if let Some(error) = &opts.expected_error {
+        match result {
+            Ok(_) => Err(anyhow!("Ok when expecting {error:?}")),
+            Err(e) => {
+                let re = Regex::new(error).expect("regex");
+                if re.is_match(&e.to_string()) {
+                    log::info!("Got expected error code: {e}");
+                    Ok(())
+                } else {
+                    Err(anyhow!("Expected {error:?} but got {e}"))
+                }
+            }
+        }
+    } else {
+        result
+    }
+}
diff --git a/sw/host/tests/ownership/rescue_limit_test.rs b/sw/host/tests/ownership/rescue_limit_test.rs
new file mode 100644
index 0000000000000..e39971b71fa62
--- /dev/null
+++ b/sw/host/tests/ownership/rescue_limit_test.rs
@@ -0,0 +1,183 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use regex::Regex;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::chip::boot_svc::{BootSlot, UnlockMode};
+use opentitanlib::chip::rom_error::RomError;
+use opentitanlib::ownership::OwnershipKeyAlg;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use transfer_lib::HybridPair;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+    #[arg(long, help = "Unlock private key (ECDSA P256)")]
+    unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Activate private key (ECDSA P256)")]
+    activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner private key (ECDSA P256)")]
+    next_owner_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (ECDSA P256)")]
+    next_owner_key_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (ECDSA P256)")]
+    next_activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (ECDSA P256)")]
+    next_unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner's application public key (ECDSA P256)")]
+    next_application_key: PathBuf,
+
+    #[arg(
+        long,
+        value_enum,
+        default_value = "with-rescue",
+        help = "Style of Owner Config for this test"
+    )]
+    config_kind: transfer_lib::OwnerConfigKind,
+
+    #[arg(
+        long,
+        help = "Load a firmware payload via rescue after activating ownership"
+    )]
+    rescue_after_activate: Option<PathBuf>,
+    #[arg(long, value_parser = humantime::parse_duration, help = "Max timeout to enter rescue mode")]
+    rescue_enter_delay: Option<Duration>,
+
+    #[arg(long, default_value = "Any", help = "Mode of the unlock operation")]
+    unlock_mode: UnlockMode,
+    #[arg(long, help = "Expected error condition")]
+    expected_error: Option<String>,
+}
+
+fn flash_limit_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), opts.rescue_enter_delay);
+
+    log::info!("###### Get Boot Log (1/2) ######");
+    let (data, devid) = transfer_lib::get_device_info(transport, &rescue)?;
+    log::info!("###### Ownership Unlock ######");
+    transfer_lib::ownership_unlock(
+        transport,
+        &rescue,
+        opts.unlock_mode,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.unlock_key.clone(),
+        None,
+        if opts.unlock_mode == UnlockMode::Endorsed {
+            opts.next_owner_key_pub.as_deref()
+        } else {
+            None
+        },
+        None,
+        false,
+    )?;
+
+    log::info!("###### Get Boot Log (2/2) ######");
+    let (data, _) = transfer_lib::get_device_info(transport, &rescue)?;
+
+    log::info!("###### Upload Owner Block ######");
+    transfer_lib::create_owner(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        OwnershipKeyAlg::EcdsaP256,
+        HybridPair::load(opts.next_owner_key.as_deref(), None)?,
+        HybridPair::load(opts.next_activate_key.as_deref(), None)?,
+        HybridPair::load(opts.next_unlock_key.as_deref(), None)?,
+        &opts.next_application_key,
+        opts.config_kind,
+        /*customize=*/ |_| {},
+    )?;
+
+    log::info!("###### Ownership Activate Block ######");
+    transfer_lib::ownership_activate(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.activate_key
+            .clone()
+            .or_else(|| opts.next_activate_key.clone()),
+        None,
+        BootSlot::SlotA,
+    )?;
+
+    log::info!("###### Rescue Payload of Zeros ######");
+    // We send a 448K payload of all zeros.  The rescue config sets the size
+    // limit of the firmware section to 384K, so we expect to get a "Cancel"
+    // from the target.
+    //
+    // We should get the cancellation at XModem-1K block 386 because the rescue
+    // protocol buffers 2K blocks to write to flash.  After writing the first
+    // 384K, block 385 and 386 will be buffered in RAM and the rescue module
+    // will reject the write request and terminate the upload.
+    let data = vec![0u8; 448 * 1024];
+    rescue.enter(transport, EntryMode::Reset)?;
+    let result = rescue.update_firmware(BootSlot::SlotA, &data);
+    assert_eq!(result.unwrap_err().to_string(), "Cancelled");
+    log::info!("Got expected 'Cancel' during upload of too-large payload.");
+
+    log::info!("###### Boot After Transfer Complete ######");
+    log::info!("Expecting to see 0 before offset 0x70000 and 0xffffffff at/after offset 0x70000.");
+    // The firmware in the target will print the first word of each flash page
+    // in the range [0x10000..0x80000).  We'll capture the last word of the
+    // firmware segment and the first word of the filesystem segment and
+    // verify that the firmware segement is programmed (value 0) and the
+    // filesystem segment remains unprogramed (value ffffffff).
+    transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+    let capture = UartConsole::wait_for(
+        &*uart,
+        r"(?msR)flash 0x2006f800 = (\w+)$.*flash 0x20070000 = (\w+)$.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+        opts.timeout,
+    )?;
+
+    if capture[0].starts_with("BFV") {
+        return RomError(u32::from_str_radix(&capture[3], 16)?).into();
+    }
+    assert_eq!(capture[1], "0");
+    assert_eq!(capture[2], "ffffffff");
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let result = flash_limit_test(&opts, &transport);
+    if let Some(error) = &opts.expected_error {
+        match result {
+            Ok(_) => Err(anyhow!("Ok when expecting {error:?}")),
+            Err(e) => {
+                let re = Regex::new(error).expect("regex");
+                if re.is_match(&e.to_string()) {
+                    log::info!("Got expected error code: {e}");
+                    Ok(())
+                } else {
+                    Err(anyhow!("Expected {error:?} but got {e}"))
+                }
+            }
+        }
+    } else {
+        result
+    }
+}
diff --git a/sw/host/tests/ownership/rescue_permission_test.rs b/sw/host/tests/ownership/rescue_permission_test.rs
new file mode 100644
index 0000000000000..5479deae84e26
--- /dev/null
+++ b/sw/host/tests/ownership/rescue_permission_test.rs
@@ -0,0 +1,155 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use regex::Regex;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::chip::boot_svc::{BootSlot, UnlockMode};
+use opentitanlib::ownership::OwnershipKeyAlg;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+use opentitanlib::test_utils::init::InitializeTest;
+use transfer_lib::HybridPair;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+    #[arg(long, help = "Unlock private key (ECDSA P256)")]
+    unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Activate private key (ECDSA P256)")]
+    activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner private key (ECDSA P256)")]
+    next_owner_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (ECDSA P256)")]
+    next_owner_key_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (ECDSA P256)")]
+    next_activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (ECDSA P256)")]
+    next_unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner's application public key (ECDSA P256)")]
+    next_application_key: PathBuf,
+
+    #[arg(long, value_parser = humantime::parse_duration, help = "Max timeout to enter rescue mode")]
+    rescue_enter_delay: Option<Duration>,
+
+    #[arg(
+        long,
+        value_enum,
+        default_value = "with-rescue-restricted",
+        help = "Style of Owner Config for this test"
+    )]
+    config_kind: transfer_lib::OwnerConfigKind,
+
+    #[arg(long, default_value = "Any", help = "Mode of the unlock operation")]
+    unlock_mode: UnlockMode,
+    #[arg(long, help = "Expected error condition")]
+    expected_error: Option<String>,
+}
+
+fn rescue_permission_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), opts.rescue_enter_delay);
+
+    log::info!("###### Get Boot Log (1/2) ######");
+    let (data, devid) = transfer_lib::get_device_info(transport, &rescue)?;
+    log::info!("###### Ownership Unlock ######");
+    transfer_lib::ownership_unlock(
+        transport,
+        &rescue,
+        opts.unlock_mode,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.unlock_key.clone(),
+        None,
+        if opts.unlock_mode == UnlockMode::Endorsed {
+            opts.next_owner_key_pub.as_deref()
+        } else {
+            None
+        },
+        None,
+        false,
+    )?;
+
+    log::info!("###### Get Boot Log (2/2) ######");
+    let (data, _) = transfer_lib::get_device_info(transport, &rescue)?;
+
+    log::info!("###### Upload Owner Block ######");
+    transfer_lib::create_owner(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        OwnershipKeyAlg::EcdsaP256,
+        HybridPair::load(opts.next_owner_key.as_deref(), None)?,
+        HybridPair::load(opts.next_activate_key.as_deref(), None)?,
+        HybridPair::load(opts.next_unlock_key.as_deref(), None)?,
+        &opts.next_application_key,
+        opts.config_kind,
+        /*customize=*/ |_| {},
+    )?;
+
+    log::info!("###### Ownership Activate Block ######");
+    transfer_lib::ownership_activate(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        devid.din,
+        OwnershipKeyAlg::EcdsaP256,
+        opts.activate_key
+            .clone()
+            .or_else(|| opts.next_activate_key.clone()),
+        None,
+        BootSlot::SlotA,
+    )?;
+
+    log::info!("###### Check Rescue Dis-Allowed Command ######");
+    // We'll check a boot_svc command that has been removed from the
+    // allowlist when we use the `WithRescueRestricted` configuration.
+    rescue.enter(transport, EntryMode::Reset)?;
+    let result = rescue.set_next_bl0_slot(
+        /*primary=*/ BootSlot::Unspecified,
+        /*next=*/ BootSlot::SlotA,
+    );
+
+    let result = result.unwrap_err().to_string();
+    log::info!("Expecting 'Cancelled' in response to a dis-allowed command");
+    log::info!("set_next_bl0_slot(primary=Unspecified, next=SlotA) -> {result}");
+    assert_eq!(result, "Cancelled");
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let result = rescue_permission_test(&opts, &transport);
+    if let Some(error) = &opts.expected_error {
+        match result {
+            Ok(_) => Err(anyhow!("Ok when expecting {error:?}")),
+            Err(e) => {
+                let re = Regex::new(error).expect("regex");
+                if re.is_match(&e.to_string()) {
+                    log::info!("Got expected error code: {e}");
+                    Ok(())
+                } else {
+                    Err(anyhow!("Expected {error:?} but got {e}"))
+                }
+            }
+        }
+    } else {
+        result
+    }
+}
diff --git a/sw/host/tests/ownership/transfer_lib.rs b/sw/host/tests/ownership/transfer_lib.rs
new file mode 100644
index 0000000000000..a10defb4f4832
--- /dev/null
+++ b/sw/host/tests/ownership/transfer_lib.rs
@@ -0,0 +1,396 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::ValueEnum;
+use sphincsplus::{DecodeKey, SpxPublicKey, SpxSecretKey};
+use std::path::{Path, PathBuf};
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::chip::boot_log::BootLog;
+use opentitanlib::chip::boot_svc::BootSlot;
+use opentitanlib::chip::boot_svc::{Message, UnlockMode};
+use opentitanlib::chip::device_id::DeviceId;
+use opentitanlib::chip::helper::{OwnershipActivateParams, OwnershipUnlockParams};
+use opentitanlib::crypto::ecdsa::{EcdsaPrivateKey, EcdsaPublicKey};
+use opentitanlib::ownership::{
+    ApplicationKeyDomain, CommandTag, FlashFlags, HybridRawPublicKey, KeyMaterial,
+    OwnerApplicationKey, OwnerBlock, OwnerConfigItem, OwnerFlashConfig, OwnerFlashInfoConfig,
+    OwnerFlashRegion, OwnerInfoPage, OwnerRescueConfig, OwnershipKeyAlg,
+};
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+
+pub const TEST_OWNER_CONFIG_VERSION: u32 = 1;
+
+/// Gets the BootLog.
+pub fn get_device_info(
+    transport: &TransportWrapper,
+    rescue: &RescueSerial,
+) -> Result<(BootLog, DeviceId)> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    Ok((rescue.get_boot_log()?, rescue.get_device_id()?))
+}
+
+/// Prepares an UnlockOwnership command, sends it to the chip and gets the response.
+#[allow(clippy::too_many_arguments)]
+pub fn ownership_unlock(
+    transport: &TransportWrapper,
+    rescue: &RescueSerial,
+    mode: UnlockMode,
+    nonce: u64,
+    din: u64,
+    algorithm: OwnershipKeyAlg,
+    ecdsa_key: Option<PathBuf>,
+    spx_key: Option<PathBuf>,
+    next_owner: Option<&Path>,
+    signature: Option<PathBuf>,
+    enable_detached_sig: bool,
+) -> Result<()> {
+    let (unlock, detached_sig) = OwnershipUnlockParams {
+        mode: Some(mode),
+        nonce: Some(nonce),
+        din: Some(din),
+        next_owner: next_owner.map(|p| p.into()),
+        signature,
+        algorithm,
+        ecdsa_key,
+        spx_key,
+        enable_detached_sig,
+    }
+    .apply_to(Option::<&mut std::fs::File>::None)?;
+
+    rescue.enter(transport, EntryMode::Reset)?;
+    if enable_detached_sig || algorithm.is_detached() {
+        let sig = detached_sig.expect("algorithm is detached");
+        rescue.update_firmware(BootSlot::SlotA, sig.to_vec()?.as_slice())?;
+    }
+    rescue.ownership_unlock(unlock)?;
+    rescue.enter(transport, EntryMode::Reboot)?;
+    let result = rescue.get_boot_svc()?;
+    match result.message {
+        Message::OwnershipUnlockResponse(r) => {
+            #[cfg(feature = "ot_coverage_enabled")]
+            let _ = rescue.enter(transport, EntryMode::Reboot);
+            r.status.into()
+        }
+        _ => Err(anyhow!("Unexpected response: {result:x?}")),
+    }
+}
+
+/// Prepares an UnlockOwnership command (with UnlockMode::Any), sends it to the chip and gets the response.
+pub fn ownership_unlock_any(
+    transport: &TransportWrapper,
+    rescue: &RescueSerial,
+    nonce: u64,
+    din: u64,
+    algorithm: OwnershipKeyAlg,
+    ecdsa_key: Option<PathBuf>,
+    spx_key: Option<PathBuf>,
+) -> Result<()> {
+    ownership_unlock(
+        transport,
+        rescue,
+        UnlockMode::Any,
+        nonce,
+        din,
+        algorithm,
+        ecdsa_key,
+        spx_key,
+        None,
+        None,
+        false,
+    )
+}
+
+/// Prepares an OwnershipActivate command, sends it to the chip and gets the response.
+#[allow(clippy::too_many_arguments)]
+pub fn ownership_activate(
+    transport: &TransportWrapper,
+    rescue: &RescueSerial,
+    nonce: u64,
+    din: u64,
+    algorithm: OwnershipKeyAlg,
+    ecdsa_key: Option<PathBuf>,
+    spx_key: Option<PathBuf>,
+    bl0_slot: BootSlot,
+) -> Result<()> {
+    let (activate, detached_sig) = OwnershipActivateParams {
+        nonce: Some(nonce),
+        din: Some(din),
+        primary_bl0_slot: bl0_slot,
+        algorithm,
+        ecdsa_key,
+        spx_key,
+        ..Default::default()
+    }
+    .apply_to(Option::<&mut std::fs::File>::None)?;
+
+    rescue.enter(transport, EntryMode::Reset)?;
+    if algorithm.is_detached() {
+        let sig = detached_sig.expect("algorithm is detached");
+        rescue.update_firmware(BootSlot::SlotA, sig.to_vec()?.as_slice())?;
+    }
+    rescue.ownership_activate(activate)?;
+    rescue.enter(transport, EntryMode::Reboot)?;
+    let result = rescue.get_boot_svc()?;
+    match &result.message {
+        Message::OwnershipActivateResponse(r) => {
+            #[cfg(feature = "ot_coverage_enabled")]
+            let _ = rescue.enter(transport, EntryMode::Reboot);
+            r.status.into()
+        }
+        _ => Err(anyhow!("Unexpected response: {result:x?}")),
+    }
+}
+
+// These flags request certain features of the ownership configuration.
+// The names like "FLASH1" or "RESCUE1" don't have any special significance
+// other than to give them a distinct name.
+
+// Request to corrupt the owner config block.
+const CFG_CORRUPT: u32 = 0x0000_0001;
+// Request a config with a flash configuration.
+const CFG_FLASH1: u32 = 0x0000_0002;
+// Request flash config lockdown in the flash configuration.
+const CFG_FLASH_LOCK: u32 = 0x0000_0004;
+// Request a config with a rescue configuration.
+const CFG_RESCUE1: u32 = 0x0000_0008;
+// Request a rescue configuration that restricts the set of allowed commands
+// (e.g. this one removes "SetNextBl0Slot" from the set of allowed commands).
+const CFG_RESCUE_RESTRICT: u32 = 0x0000_0010;
+// Request a configuration where the application key has a usage constraint.
+const CFG_APP_CONSTRAINT: u32 = 0x0000_0020;
+// Request a bad ROM_EXT flash config region.
+const CFG_FLASH_ERROR: u32 = 0x0000_0040;
+// Request an invalid owner config with a correct signature.
+const CFG_INVALID: u32 = 0x000_0080;
+
+#[repr(u32)]
+#[derive(Debug, Default, Copy, Clone, PartialEq, Eq, ValueEnum)]
+pub enum OwnerConfigKind {
+    #[default]
+    Basic = 0,
+    Corrupt = CFG_CORRUPT,
+    Invalid = CFG_INVALID,
+    WithFlash = CFG_FLASH1 | CFG_RESCUE1,
+    WithFlashLocked = CFG_FLASH1 | CFG_RESCUE1 | CFG_FLASH_LOCK,
+    WithFlashError = CFG_FLASH1 | CFG_RESCUE1 | CFG_FLASH_LOCK | CFG_FLASH_ERROR,
+    WithRescue = CFG_RESCUE1,
+    WithRescueRestricted = CFG_FLASH1 | CFG_RESCUE1 | CFG_RESCUE_RESTRICT,
+    WithAppConstraint = CFG_APP_CONSTRAINT,
+}
+
+impl OwnerConfigKind {
+    pub fn is_flash_locked(self) -> bool {
+        self as u32 & CFG_FLASH_LOCK != 0
+    }
+
+    fn rom_ext(self) -> FlashFlags {
+        FlashFlags {
+            read: true,
+            program: true,
+            erase: true,
+            // Maybe turn on scrambling & ECC for the ROM_EXT region.
+            scramble: self as u32 & CFG_FLASH_ERROR != 0,
+            ecc: self as u32 & CFG_FLASH_ERROR != 0,
+            high_endurance: false,
+            protect_when_active: true,
+            lock: self.is_flash_locked(),
+        }
+    }
+
+    fn firmware(self) -> FlashFlags {
+        FlashFlags {
+            read: true,
+            program: true,
+            erase: true,
+            scramble: true,
+            ecc: true,
+            high_endurance: false,
+            protect_when_active: true,
+            lock: self.is_flash_locked(),
+        }
+    }
+
+    fn filesystem(self) -> FlashFlags {
+        FlashFlags {
+            read: true,
+            program: true,
+            erase: true,
+            scramble: false,
+            ecc: false,
+            high_endurance: true,
+            protect_when_active: false,
+            lock: self.is_flash_locked(),
+        }
+    }
+}
+
+pub struct HybridPair {
+    pub ecdsa: Option<EcdsaPrivateKey>,
+    pub spx: Option<SpxSecretKey>,
+}
+
+impl HybridPair {
+    pub fn load(ecdsa: Option<&Path>, spx: Option<&Path>) -> Result<Self> {
+        Ok(Self {
+            ecdsa: ecdsa.map(EcdsaPrivateKey::load).transpose()?,
+            spx: spx.map(SpxSecretKey::read_pem_file).transpose()?,
+        })
+    }
+
+    pub fn check(&self, key_alg: OwnershipKeyAlg, name: &str) -> Result<()> {
+        if key_alg.is_ecdsa() && self.ecdsa.is_none() {
+            return Err(anyhow!("{name} using {key_alg} requires an ECDSA key"));
+        }
+        if !key_alg.is_ecdsa() && self.ecdsa.is_some() {
+            return Err(anyhow!(
+                "{name} using {key_alg} has an ECDSA key, but doesn't need one"
+            ));
+        }
+        if key_alg.is_spx() && self.spx.is_none() {
+            return Err(anyhow!("{name} using {key_alg} requires an SPX key"));
+        }
+        Ok(())
+    }
+
+    pub fn key_material(&self) -> Result<KeyMaterial> {
+        match (&self.ecdsa, &self.spx) {
+            (Some(ecdsa), None) => Ok(KeyMaterial::Ecdsa(ecdsa.public_key().try_into()?)),
+            (None, Some(spx)) => Ok(KeyMaterial::Spx(SpxPublicKey::from(spx).try_into()?)),
+            (Some(ecdsa), Some(spx)) => Ok(KeyMaterial::Hybrid(HybridRawPublicKey {
+                ecdsa: ecdsa.public_key().try_into()?,
+                spx: SpxPublicKey::from(spx).try_into()?,
+            })),
+            _ => Err(anyhow!("No keys to load")),
+        }
+    }
+}
+
+/// Prepares an OwnerBlock and sends it to the chip.
+#[allow(clippy::too_many_arguments)]
+pub fn create_owner<F>(
+    transport: &TransportWrapper,
+    rescue: &RescueSerial,
+    nonce: u64,
+    key_alg: OwnershipKeyAlg,
+    owner_key: HybridPair,
+    activate_key: HybridPair,
+    unlock_key: HybridPair,
+    app_key: &Path,
+    config: OwnerConfigKind,
+    customize: F,
+) -> Result<()>
+where
+    F: Fn(&mut OwnerBlock),
+{
+    owner_key.check(key_alg, "owner key")?;
+    activate_key.check(key_alg, "activate key")?;
+    unlock_key.check(key_alg, "unlock key")?;
+    let cfg = config as u32;
+    let app_key = EcdsaPublicKey::load(app_key)?;
+    let constraint = if cfg & CFG_APP_CONSTRAINT == 0 {
+        0
+    } else {
+        // Constrain to the DIN field of device_id.
+        0x6
+    };
+    let mut owner = OwnerBlock {
+        ownership_key_alg: key_alg,
+        owner_key: owner_key.key_material()?,
+        activate_key: activate_key.key_material()?,
+        unlock_key: unlock_key.key_material()?,
+        data: vec![OwnerConfigItem::ApplicationKey(OwnerApplicationKey {
+            key_alg: OwnershipKeyAlg::EcdsaP256,
+            usage_constraint: constraint,
+            key_domain: ApplicationKeyDomain::Prod,
+            key: KeyMaterial::Ecdsa(app_key.try_into()?),
+            ..Default::default()
+        })],
+        ..Default::default()
+    };
+
+    if cfg & CFG_INVALID != 0 {
+        owner.header.length = 0;
+    }
+
+    if cfg & CFG_FLASH1 != 0 {
+        let flash_config = if cfg & CFG_FLASH_ERROR != 0 {
+            // It is an error set have a flash config that overlaps the ROM_EXT
+            // region.
+
+            // Side A: 0-64K romext, 64-448K firmware, 448-512K filesystem.
+            vec![
+                OwnerFlashRegion::new(0, 32, config.rom_ext()),
+                OwnerFlashRegion::new(32, 192, config.firmware()),
+                OwnerFlashRegion::new(224, 32, config.filesystem()),
+                // Side B: 0-64K romext, 64-448K firmware, 448-512K filesystem.
+                OwnerFlashRegion::new(256, 32, config.rom_ext()),
+                OwnerFlashRegion::new(256 + 32, 192, config.firmware()),
+                OwnerFlashRegion::new(256 + 224, 32, config.filesystem()),
+            ]
+        } else {
+            vec![
+                // Side A: 64-448K firmware, 448-512K filesystem.
+                OwnerFlashRegion::new(32, 192, config.firmware()),
+                OwnerFlashRegion::new(224, 32, config.filesystem()),
+                // Side B: 64-448K firmware, 448-512K filesystem.
+                OwnerFlashRegion::new(256 + 32, 192, config.firmware()),
+                OwnerFlashRegion::new(256 + 224, 32, config.filesystem()),
+            ]
+        };
+        owner
+            .data
+            .push(OwnerConfigItem::FlashConfig(OwnerFlashConfig {
+                config: flash_config,
+                ..Default::default()
+            }));
+        owner
+            .data
+            .push(OwnerConfigItem::FlashInfoConfig(OwnerFlashInfoConfig {
+                config: vec![
+                    // Bank 1, page 5, filesystem-like configuration.
+                    OwnerInfoPage::new(1, 5, config.filesystem()),
+                ],
+                ..Default::default()
+            }));
+    }
+    if cfg & CFG_RESCUE1 != 0 {
+        let mut rescue = OwnerRescueConfig::all();
+        rescue.start = 32;
+        rescue.size = 192;
+        if cfg & CFG_RESCUE_RESTRICT != 0 {
+            // Restrict one of the boot_svc commands in "restrict" mode.
+            rescue
+                .command_allow
+                .retain(|t| *t != CommandTag::NextBl0SlotRequest);
+        }
+        owner.data.push(OwnerConfigItem::RescueConfig(rescue));
+    }
+    customize(&mut owner);
+    let mut detached_sig =
+        owner.detached_sign(nonce, owner_key.ecdsa.as_ref(), owner_key.spx.as_ref())?;
+    if cfg & CFG_CORRUPT != 0 {
+        if let Some(val) = detached_sig.ecdsa.as_mut() {
+            val.r[0] ^= 1;
+        }
+        if let Some(val) = detached_sig.spx.as_mut() {
+            val[0] ^= 1;
+        }
+    }
+    if !key_alg.is_detached() {
+        owner.signature = detached_sig.ecdsa.clone().expect("ecdsa signature");
+    }
+    let mut owner_config = Vec::new();
+    owner.write(&mut owner_config)?;
+    rescue.enter(transport, EntryMode::Reset)?;
+    if key_alg.is_detached() {
+        rescue.update_firmware(BootSlot::SlotB, detached_sig.to_vec()?.as_slice())?;
+    }
+    rescue.set_owner_config(&owner_config)?;
+    rescue.reboot()?;
+    Ok(())
+}
diff --git a/sw/host/tests/ownership/transfer_test.rs b/sw/host/tests/ownership/transfer_test.rs
new file mode 100644
index 0000000000000..d842f4096f7de
--- /dev/null
+++ b/sw/host/tests/ownership/transfer_test.rs
@@ -0,0 +1,310 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use regex::Regex;
+use std::path::PathBuf;
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::chip::boot_svc::{BootSlot, UnlockMode};
+use opentitanlib::chip::rom_error::RomError;
+use opentitanlib::ownership::OwnershipKeyAlg;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use transfer_lib::HybridPair;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+    #[arg(long, default_value_t = OwnershipKeyAlg::EcdsaP256, help = "Current Owner key algorithm")]
+    key_alg: OwnershipKeyAlg,
+    #[arg(long, help = "Unlock private key (ECDSA P256)")]
+    unlock_key: Option<PathBuf>,
+    #[arg(long, help = "Activate private key (ECDSA P256)")]
+    activate_key: Option<PathBuf>,
+    #[arg(long, help = "Unlock private key (SPX)")]
+    unlock_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Activate private key (SPX)")]
+    activate_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Unlock signature")]
+    unlock_sig: Option<PathBuf>,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Skip the ownership unlock request")]
+    skip_unlock: bool,
+    #[arg(long, default_value = "SlotA", help = "Which bl0 slot to activate")]
+    activate_bl0_slot: BootSlot,
+
+    #[arg(long, default_value_t = OwnershipKeyAlg::EcdsaP256, help = "Current Owner key algorithm")]
+    next_key_alg: OwnershipKeyAlg,
+    #[arg(long, help = "Next Owner private key (ECDSA P256)")]
+    next_owner_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (ECDSA P256)")]
+    next_owner_key_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (ECDSA P256)")]
+    next_activate_key: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (ECDSA P256)")]
+    next_unlock_key: Option<PathBuf>,
+
+    #[arg(long, help = "Next Owner private key (SPX)")]
+    next_owner_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Next Owner public key (SPX)")]
+    next_owner_key_spx_pub: Option<PathBuf>,
+    #[arg(long, help = "Next Owner activate private key (SPX)")]
+    next_activate_key_spx: Option<PathBuf>,
+    #[arg(long, help = "Next Owner unlock private key (SPX)")]
+    next_unlock_key_spx: Option<PathBuf>,
+
+    #[arg(long, help = "Next Owner's application public key (ECDSA P256)")]
+    next_application_key: PathBuf,
+    #[arg(
+        long,
+        default_value_t = transfer_lib::TEST_OWNER_CONFIG_VERSION,
+        help = "Configuration version to put in the owner config"
+    )]
+    config_version: u32,
+
+    #[arg(
+        long,
+        value_enum,
+        default_value = "basic",
+        help = "Style of Owner Config for this test"
+    )]
+    config_kind: transfer_lib::OwnerConfigKind,
+
+    #[arg(
+        long,
+        help = "Load a firmware payload via rescue after activating ownership"
+    )]
+    rescue_after_activate: Option<PathBuf>,
+    #[arg(long, value_parser = humantime::parse_duration, help = "Max timeout to enter rescue mode")]
+    rescue_enter_delay: Option<Duration>,
+
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Use an invalid device id to trigger ownership unlock request")]
+    invalid_device_id: bool,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Use an invalid nonce to trigger ownership unlock request")]
+    invalid_nonce: bool,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Check the firmware boots prior to ownership transfer")]
+    pre_transfer_boot_check: bool,
+    #[arg(long, default_value_t = true, action = clap::ArgAction::Set, help = "Check the firmware boot in dual-owner mode")]
+    dual_owner_boot_check: bool,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "If true, this test is a non-transferring update")]
+    non_transfer_update: bool,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Check the sealing keys")]
+    keygen_check: bool,
+    #[arg(long, default_value_t = false, action = clap::ArgAction::Set, help = "Enable detached sig for ownership unlock request")]
+    enable_detached_sig: bool,
+
+    #[arg(long, default_value = "Any", help = "Mode of the unlock operation")]
+    unlock_mode: UnlockMode,
+    #[arg(long, help = "Expected error condition")]
+    expected_error: Option<String>,
+}
+
+fn remember(haystack: &str, re: &str, memory: &mut Vec<String>) -> bool {
+    let re = Regex::new(re).expect("regex");
+    if let Some(cap) = re.captures(haystack) {
+        memory.push(cap[cap.len() - 1].into());
+        true
+    } else {
+        false
+    }
+}
+
+fn transfer_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), opts.rescue_enter_delay);
+
+    let mut keygen = Vec::new();
+
+    if opts.pre_transfer_boot_check {
+        log::info!("###### Pre-transfer Boot Check ######");
+        let capture = UartConsole::wait_for(
+            &*uart,
+            r"(?msR)Running.*ownership_state = (\w+)$.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+            opts.timeout,
+        )?;
+        if capture[0].starts_with("BFV") {
+            return RomError(u32::from_str_radix(&capture[2], 16)?).into();
+        }
+        if opts.keygen_check && !remember(&capture[0], r"sw_key = (\w+)", &mut keygen) {
+            return Err(anyhow!("Failed to find sw_key"));
+        }
+    }
+
+    log::info!("###### Get Boot Log (1/2) ######");
+    let (mut data, mut devid) = transfer_lib::get_device_info(transport, &rescue)?;
+    if opts.invalid_device_id {
+        devid.din += 1;
+    }
+    if opts.invalid_nonce {
+        data.rom_ext_nonce += 1;
+    }
+    if !opts.skip_unlock {
+        log::info!("###### Ownership Unlock ######");
+        transfer_lib::ownership_unlock(
+            transport,
+            &rescue,
+            opts.unlock_mode,
+            data.rom_ext_nonce,
+            devid.din,
+            opts.key_alg,
+            opts.unlock_key.clone(),
+            opts.unlock_key_spx.clone(),
+            if opts.unlock_mode == UnlockMode::Endorsed {
+                opts.next_owner_key_pub.as_deref()
+            } else {
+                None
+            },
+            opts.unlock_sig.clone(),
+            opts.enable_detached_sig,
+        )?;
+    }
+
+    log::info!("###### Get Boot Log (2/2) ######");
+    let (data, _) = transfer_lib::get_device_info(transport, &rescue)?;
+
+    log::info!("###### Upload Owner Block ######");
+    transfer_lib::create_owner(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        opts.next_key_alg,
+        HybridPair::load(
+            opts.next_owner_key.as_deref(),
+            opts.next_owner_key_spx.as_deref(),
+        )?,
+        HybridPair::load(
+            opts.next_activate_key.as_deref(),
+            opts.next_activate_key_spx.as_deref(),
+        )?,
+        HybridPair::load(
+            opts.next_unlock_key.as_deref(),
+            opts.next_unlock_key_spx.as_deref(),
+        )?,
+        &opts.next_application_key,
+        opts.config_kind,
+        /*customize=*/
+        |owner| {
+            owner.config_version = opts.config_version;
+        },
+    )?;
+
+    let mut transfers0 = 0;
+    if opts.dual_owner_boot_check {
+        log::info!("###### Boot in Dual-Owner Mode ######");
+        // At this point, the device should be unlocked and should have accepted the owner
+        // configuration.  Owner code should run and report the ownership state.
+        transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+        let capture = UartConsole::wait_for(
+            &*uart,
+            r"(?msR)Running.*ownership_state = (\w+)$.*ownership_transfers = (\d+)$.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+            opts.timeout,
+        )?;
+        if capture[0].starts_with("BFV") {
+            return RomError(u32::from_str_radix(&capture[3], 16)?).into();
+        }
+        match opts.unlock_mode {
+            UnlockMode::Any => assert_eq!(capture[1], "UANY"),
+            UnlockMode::Endorsed => assert_eq!(capture[1], "UEND"),
+            UnlockMode::Update => assert_eq!(capture[1], "USLF"),
+            _ => return Err(anyhow!("Unexpected ownership state: {}", capture[1])),
+        }
+        transfers0 = capture[2].parse::<u32>()?;
+        if opts.keygen_check && !remember(&capture[0], r"sw_key = (\w+)", &mut keygen) {
+            return Err(anyhow!("Failed to find sw_key"));
+        }
+    }
+
+    log::info!("###### Ownership Activate Block ######");
+    transfer_lib::ownership_activate(
+        transport,
+        &rescue,
+        data.rom_ext_nonce,
+        devid.din,
+        opts.next_key_alg,
+        opts.activate_key
+            .clone()
+            .or_else(|| opts.next_activate_key.clone()),
+        opts.activate_key_spx
+            .clone()
+            .or_else(|| opts.next_activate_key_spx.clone()),
+        opts.activate_bl0_slot,
+    )?;
+
+    if let Some(fw) = &opts.rescue_after_activate {
+        let data = std::fs::read(fw)?;
+        rescue.enter(transport, EntryMode::Reset)?;
+        rescue.update_firmware(BootSlot::SlotA, &data)?;
+        rescue.reboot()?;
+    }
+
+    log::info!("###### Boot After Transfer Complete ######");
+    // After the activate command, the device should report the ownership state as `OWND`.
+    transport.reset_with_delay(UartRx::Clear, Duration::from_millis(50))?;
+    let capture = UartConsole::wait_for(
+        &*uart,
+        r"(?msR)Running.*ownership_state = (\w+)$.*ownership_transfers = (\d+)$.*PASS!$|BFV:([0-9A-Fa-f]{8})$",
+        opts.timeout,
+    )?;
+    if capture[0].starts_with("BFV") {
+        return RomError(u32::from_str_radix(&capture[3], 16)?).into();
+    }
+    if opts.keygen_check && !remember(&capture[0], r"sw_key = (\w+)", &mut keygen) {
+        return Err(anyhow!("Failed to find sw_key"));
+    }
+    assert_eq!(capture[1], "OWND");
+    let transfers1 = capture[2].parse::<u32>()?;
+
+    if opts.non_transfer_update {
+        assert_eq!(transfers0, transfers1);
+    } else {
+        assert_eq!(transfers0 + 1, transfers1);
+    }
+
+    if opts.keygen_check {
+        log::info!("###### Checking software keys ######");
+        log::info!("sw_keys = {keygen:?}");
+        for i in 0..keygen.len() {
+            for j in i + 1..keygen.len() {
+                log::info!("Checking that key[{i}] != key[{j}]");
+                assert_ne!(keygen[i], keygen[j]);
+            }
+        }
+    }
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    let result = transfer_test(&opts, &transport);
+    if let Some(error) = &opts.expected_error {
+        match result {
+            Ok(_) => Err(anyhow!("Ok when expecting {error:?}")),
+            Err(e) => {
+                let re = Regex::new(error).expect("regex");
+                if re.is_match(&e.to_string()) {
+                    log::info!("Got expected error code: {e}");
+                    Ok(())
+                } else {
+                    Err(anyhow!("Expected {error:?} but got {e}"))
+                }
+            }
+        }
+    } else {
+        result
+    }
+}
diff --git a/third_party/go/BUILD b/sw/host/tests/penetrationtests/BUILD
similarity index 100%
rename from third_party/go/BUILD
rename to sw/host/tests/penetrationtests/BUILD
diff --git a/sw/host/tests/penetrationtests/fi_asym_cryptolib/BUILD b/sw/host/tests/penetrationtests/fi_asym_cryptolib/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_asym_cryptolib/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_asym_cryptolib/src/main.rs b/sw/host/tests/penetrationtests/fi_asym_cryptolib/src/main.rs
new file mode 100644
index 0000000000000..2887f04a4325a
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_asym_cryptolib/src/main.rs
@@ -0,0 +1,174 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_asym_cryptolib_commands::CryptoLibFiAsymSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_asym_cryptolib_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiCryptoLibTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Filter response P256 sign operation as it is randomized.
+    map.remove("r");
+    map.remove("s");
+    map.remove("pubx");
+    map.remove("puby");
+    map
+}
+
+fn run_fi_asym_cryptolib_testcase(
+    test_case: &FiCryptoLibTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::CryptoLibFiAsym.send(uart)?;
+
+    // Send test subcommand.
+    CryptoLibFiAsymSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported CryptoLib FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_asym_cryptolib(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_asym_cryptolib_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_asym_cryptolib_tests: Vec<FiCryptoLibTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_asym_cryptolib_test in &fi_asym_cryptolib_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_asym_cryptolib_testcase(
+                fi_asym_cryptolib_test,
+                opts,
+                &*uart,
+                &mut fail_counter,
+            )?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_asym_cryptolib, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_crypto/BUILD b/sw/host/tests/penetrationtests/fi_crypto/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_crypto/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_crypto/src/main.rs b/sw/host/tests/penetrationtests/fi_crypto/src/main.rs
new file mode 100644
index 0000000000000..5e5e5bc509f5f
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_crypto/src/main.rs
@@ -0,0 +1,175 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_crypto_commands::CryptoFiSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_crypto_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiCryptoTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    mode: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Shares can be random.
+    map.remove("share0");
+    map.remove("share1");
+
+    map
+}
+
+fn run_fi_crypto_testcase(
+    test_case: &FiCryptoTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::CryptoFi.send(uart)?;
+
+    // Send test subcommand.
+    CryptoFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported Crypto FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send a mode.
+    if !test_case.mode.is_empty() {
+        let mode: serde_json::Value = serde_json::from_str(test_case.mode.as_str()).unwrap();
+        mode.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_crypto(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_crypto_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_crypto_tests: Vec<FiCryptoTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_crypto_test in &fi_crypto_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_crypto_testcase(fi_crypto_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_crypto, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_ibex/BUILD b/sw/host/tests/penetrationtests/fi_ibex/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_ibex/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_ibex/src/main.rs b/sw/host/tests/penetrationtests/fi_ibex/src/main.rs
new file mode 100644
index 0000000000000..238a00ac42b1d
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_ibex/src/main.rs
@@ -0,0 +1,208 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_ibex_commands::IbexFiSubcommand;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_ibex_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiIbexTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+    #[serde(default)]
+    flaky_expected_output: Vec<String>,
+    #[serde(default)]
+    reset: bool,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Register file dump could change.
+    map.remove("registers");
+    map
+}
+
+fn run_fi_ibex_testcase(
+    test_case: &FiIbexTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::IbexFi.send(uart)?;
+
+    // Send test subcommand.
+    IbexFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported Ibex FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    // Check flaky test outputs
+    if !test_case.flaky_expected_output.is_empty() {
+        for exp_output in test_case.flaky_expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "Flaky result of {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                }
+                // Do not let the flaky test influence the fail counter.
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_ibex(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_ibex_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_ibex_tests: Vec<FiIbexTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_ibex_test in &fi_ibex_tests {
+            if fi_ibex_test.reset {
+                transport.reset_with_delay(UartRx::Clear, Duration::from_millis(750))?;
+            } else {
+                test_counter += 1;
+                log::info!("Test counter: {}", test_counter);
+                run_fi_ibex_testcase(fi_ibex_test, opts, &*uart, &mut fail_counter)?;
+            }
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_ibex, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_lc_ctrl/BUILD b/sw/host/tests/penetrationtests/fi_lc_ctrl/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_lc_ctrl/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_lc_ctrl/src/main.rs b/sw/host/tests/penetrationtests/fi_lc_ctrl/src/main.rs
new file mode 100644
index 0000000000000..a329900395cbe
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_lc_ctrl/src/main.rs
@@ -0,0 +1,206 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_lc_ctrl_commands::LcCtrlFiSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_lc_ctrl_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiLcCtrlTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+    #[serde(default)]
+    flaky_expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Depending on the SKU, the life cycle state and counter could be different.
+    // Hence, filter it.
+    map.remove("state");
+    map.remove("counter");
+
+    map
+}
+
+fn run_fi_lc_ctrl_testcase(
+    test_case: &FiLcCtrlTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::LCCtrlFi.send(uart)?;
+
+    // Send test subcommand.
+    LcCtrlFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported LcCtrl FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    // Check flaky test outputs
+    if !test_case.flaky_expected_output.is_empty() {
+        for exp_output in test_case.flaky_expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "Flaky result of {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                }
+                // Do not let the flaky test influence the fail counter.
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_lc_ctrl(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_lc_ctrl_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_lc_ctrl_tests: Vec<FiLcCtrlTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_lc_ctrl_test in &fi_lc_ctrl_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_lc_ctrl_testcase(fi_lc_ctrl_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_lc_ctrl, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_otbn/BUILD b/sw/host/tests/penetrationtests/fi_otbn/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_otbn/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_otbn/src/main.rs b/sw/host/tests/penetrationtests/fi_otbn/src/main.rs
new file mode 100644
index 0000000000000..d1e8397cab18a
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_otbn/src/main.rs
@@ -0,0 +1,168 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_otbn_commands::OtbnFiSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_otbn_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiOtbnTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // OTBN instruction counter should be const.
+    map.remove("insn_cnt");
+    // Filter as the CharBnWsrr returns random data from OTBN.
+    map.remove("data");
+
+    map
+}
+
+fn run_fi_otbn_testcase(
+    test_case: &FiOtbnTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::OtbnFi.send(uart)?;
+
+    // Send test subcommand.
+    OtbnFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported OTBN FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_otbn(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_otbn_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_otbn_tests: Vec<FiOtbnTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_otbn_test in &fi_otbn_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_otbn_testcase(fi_otbn_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_otbn, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_otp/BUILD b/sw/host/tests/penetrationtests/fi_otp/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_otp/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_otp/src/main.rs b/sw/host/tests/penetrationtests/fi_otp/src/main.rs
new file mode 100644
index 0000000000000..d013eaa0928d2
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_otp/src/main.rs
@@ -0,0 +1,209 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_otp_commands::OtpFiSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_otp_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiOtpTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+    #[serde(default)]
+    flaky_expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Remove these entries as the test just returns the OTP content, which could
+    // be different for different configurations.
+    map.remove("partition_ref");
+    map.remove("partition_fi");
+    // Remove otp_status_codes as there could be an error already without injectin
+    // any faults.
+    map.remove("otp_status_codes");
+
+    map
+}
+
+fn run_fi_otp_testcase(
+    test_case: &FiOtpTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::OtpFi.send(uart)?;
+
+    // Send test subcommand.
+    OtpFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported Otp FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    // Check flaky test outputs
+    if !test_case.flaky_expected_output.is_empty() {
+        for exp_output in test_case.flaky_expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "Flaky result of {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                }
+                // Do not let the flaky test influence the fail counter.
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_otp(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_otp_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_otp_tests: Vec<FiOtpTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_otp_test in &fi_otp_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_otp_testcase(fi_otp_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_otp, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_rng/BUILD b/sw/host/tests/penetrationtests/fi_rng/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_rng/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_rng/src/main.rs b/sw/host/tests/penetrationtests/fi_rng/src/main.rs
new file mode 100644
index 0000000000000..4ba56cae16bf7
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_rng/src/main.rs
@@ -0,0 +1,210 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_rng_commands::RngFiSubcommand;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_rng_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiRngTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+    #[serde(default)]
+    flaky_expected_output: Vec<String>,
+    #[serde(default)]
+    reset: bool,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // RAND is random data.
+    map.remove("rand");
+
+    map
+}
+
+fn run_fi_rng_testcase(
+    test_case: &FiRngTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::RngFi.send(uart)?;
+
+    // Send test subcommand.
+    RngFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported RNG FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    // Check flaky test outputs
+    if !test_case.flaky_expected_output.is_empty() {
+        for exp_output in test_case.flaky_expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "Flaky result of {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                }
+                // Do not let the flaky test influence the fail counter.
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_rng(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_rng_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_rng_tests: Vec<FiRngTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_rng_test in &fi_rng_tests {
+            if fi_rng_test.reset {
+                transport.reset_with_delay(UartRx::Clear, Duration::from_millis(750))?;
+            } else {
+                test_counter += 1;
+                log::info!("Test counter: {}", test_counter);
+                run_fi_rng_testcase(fi_rng_test, opts, &*uart, &mut fail_counter)?;
+            }
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_rng, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_rom/BUILD b/sw/host/tests/penetrationtests/fi_rom/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_rom/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_rom/src/main.rs b/sw/host/tests/penetrationtests/fi_rom/src/main.rs
new file mode 100644
index 0000000000000..2979ebf567cf6
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_rom/src/main.rs
@@ -0,0 +1,156 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_rom_commands::RomFiSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_rom_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiRomTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn run_fi_rom_testcase(
+    test_case: &FiRomTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::RomFi.send(uart)?;
+
+    // Send test subcommand.
+    RomFiSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported Rom FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_rom(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_rom_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_rom_tests: Vec<FiRomTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_rom_test in &fi_rom_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_rom_testcase(fi_rom_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_rom, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/fi_sym_cryptolib/BUILD b/sw/host/tests/penetrationtests/fi_sym_cryptolib/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_sym_cryptolib/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/fi_sym_cryptolib/src/main.rs b/sw/host/tests/penetrationtests/fi_sym_cryptolib/src/main.rs
new file mode 100644
index 0000000000000..f69eacf296e65
--- /dev/null
+++ b/sw/host/tests/penetrationtests/fi_sym_cryptolib/src/main.rs
@@ -0,0 +1,156 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::fi_sym_cryptolib_commands::CryptoLibFiSymSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    fi_sym_cryptolib_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct FiCryptoLibTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn run_fi_sym_cryptolib_testcase(
+    test_case: &FiCryptoLibTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::CryptoLibFiSym.send(uart)?;
+
+    // Send test subcommand.
+    CryptoLibFiSymSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported CryptoLib FI subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_fi_sym_cryptolib(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.fi_sym_cryptolib_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let fi_sym_cryptolib_tests: Vec<FiCryptoLibTestCase> = serde_json::from_str(&raw_json)?;
+        for fi_sym_cryptolib_test in &fi_sym_cryptolib_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_fi_sym_cryptolib_testcase(fi_sym_cryptolib_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_fi_sym_cryptolib, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/pentest_lib/BUILD b/sw/host/tests/penetrationtests/pentest_lib/BUILD
new file mode 100644
index 0000000000000..cfa30cd405d5a
--- /dev/null
+++ b/sw/host/tests/penetrationtests/pentest_lib/BUILD
@@ -0,0 +1,15 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "pentest_lib",
+    srcs = ["src/lib.rs"],
+    deps = [
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/pentest_lib/src/lib.rs b/sw/host/tests/penetrationtests/pentest_lib/src/lib.rs
new file mode 100644
index 0000000000000..840f01a18839b
--- /dev/null
+++ b/sw/host/tests/penetrationtests/pentest_lib/src/lib.rs
@@ -0,0 +1,56 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+/// Filter pre-defined keywords from the received response.
+///
+/// Filter keywords that are either unique to each DUT (device ID) or alerts that
+/// could misfire.
+///
+/// Arguments:
+/// * response - The response received from the DUT.
+pub fn filter_response_common(
+    response: serde_json::Value,
+) -> serde_json::Map<String, serde_json::Value> {
+    let mut map: serde_json::Map<String, serde_json::Value> = response.as_object().unwrap().clone();
+    // Depending on the device configuration, alerts can sometimes fire.
+    map.remove("alerts");
+    map.remove("ast_alerts");
+    map.remove("err_status");
+    // Device ID is different for each device.
+    map.remove("device_id");
+    // Rom might be different between devices.
+    map.remove("rom_digest");
+    // When setting an alert to false, the testOS leaves it unconfigured
+    // meaning that teh response depends on the configuration in OTP
+    map.remove("enabled_alerts");
+    // Filter the clock jitter enable/disable field as on A2 it is always enabled
+    // when writing any value into the config register.
+    map.remove("clock_jitter_en");
+    // Remove device depenent configuration fields.
+    map.remove("config_version");
+    map.remove("sram_exec_mode");
+    map.remove("ownership_key_alg");
+    map.remove("update_mode");
+    map.remove("min_security_version_bl0");
+    map.remove("lock_constraint");
+    map.remove("digest");
+    map.remove("identifier");
+    map.remove("scm_revision_low");
+    map.remove("scm_revision_high");
+    map.remove("rom_ext_slot");
+    map.remove("rom_ext_major");
+    map.remove("rom_ext_minor");
+    map.remove("rom_ext_size");
+    map.remove("bl0_slot");
+    map.remove("ownership_state");
+    map.remove("ownership_transfers");
+    map.remove("rom_ext_min_sec_ver");
+    map.remove("bl0_min_sec_ver");
+    map.remove("primary_bl0_slot");
+    map.remove("retention_ram_initialized");
+    map.remove("bl0");
+    map.remove("rom_ext");
+
+    map
+}
diff --git a/sw/host/tests/penetrationtests/sca_aes/BUILD b/sw/host/tests/penetrationtests/sca_aes/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_aes/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_aes/src/main.rs b/sw/host/tests/penetrationtests/sca_aes/src/main.rs
new file mode 100644
index 0000000000000..498861f833a34
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_aes/src/main.rs
@@ -0,0 +1,170 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_aes_commands::AesScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_aes_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaAesTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    mode: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    message: String,
+    #[serde(default)]
+    key: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+}
+
+fn run_sca_aes_testcase(
+    test_case: &ScaAesTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::AesSca.send(uart)?;
+
+    // Send test subcommand.
+    AesScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported AES SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send a mode.
+    if !test_case.mode.is_empty() {
+        let mode: serde_json::Value = serde_json::from_str(test_case.mode.as_str()).unwrap();
+        mode.send(uart)?;
+    }
+
+    // Check if we need to send an input.
+    if !test_case.key.is_empty() {
+        let key: serde_json::Value = serde_json::from_str(test_case.key.as_str()).unwrap();
+        key.send(uart)?;
+    }
+
+    if !test_case.message.is_empty() {
+        let message: serde_json::Value = serde_json::from_str(test_case.message.as_str()).unwrap();
+        message.send(uart)?;
+    }
+
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_aes(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_aes_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_aes_tests: Vec<ScaAesTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_aes_test in &sca_aes_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_aes_testcase(sca_aes_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_aes, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_asym_cryptolib/BUILD b/sw/host/tests/penetrationtests/sca_asym_cryptolib/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_asym_cryptolib/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_asym_cryptolib/src/main.rs b/sw/host/tests/penetrationtests/sca_asym_cryptolib/src/main.rs
new file mode 100644
index 0000000000000..278087593a2ea
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_asym_cryptolib/src/main.rs
@@ -0,0 +1,175 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_asym_cryptolib_commands::CryptoLibScaAsymSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_asym_cryptolib_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaAsymCryptoLibTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Filter response P256 sign operation as it is randomized.
+    map.remove("r");
+    map.remove("s");
+    map.remove("pubx");
+    map.remove("puby");
+    map
+}
+
+fn run_sca_asym_cryptolib_testcase(
+    test_case: &ScaAsymCryptoLibTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::CryptoLibScaAsym.send(uart)?;
+
+    // Send test subcommand.
+    CryptoLibScaAsymSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported CryptoLib ASYM SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_asym_cryptolib(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_asym_cryptolib_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_asym_cryptolib_tests: Vec<ScaAsymCryptoLibTestCase> =
+            serde_json::from_str(&raw_json)?;
+        for sca_asym_cryptolib_test in &sca_asym_cryptolib_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_asym_cryptolib_testcase(
+                sca_asym_cryptolib_test,
+                opts,
+                &*uart,
+                &mut fail_counter,
+            )?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_asym_cryptolib, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_edn/BUILD b/sw/host/tests/penetrationtests/sca_edn/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_edn/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_edn/src/main.rs b/sw/host/tests/penetrationtests/sca_edn/src/main.rs
new file mode 100644
index 0000000000000..3aeaadc5320d1
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_edn/src/main.rs
@@ -0,0 +1,157 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_edn_commands::EdnScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_edn_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaEdnTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    expected_output: Vec<String>,
+}
+
+fn filter_response(response: serde_json::Value) -> serde_json::Map<String, serde_json::Value> {
+    // Filter common items.
+    let response_common_filtered = filter_response_common(response.clone());
+    // Filter test-specifc items.
+    let mut map: serde_json::Map<String, serde_json::Value> = response_common_filtered.clone();
+    // Ignore rnd_data as it contains random data.
+    map.remove("rnd_data");
+    map
+}
+
+fn run_sca_edn_testcase(
+    test_case: &ScaEdnTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::EdnSca.send(uart)?;
+
+    // Send test subcommand.
+    EdnScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported EDN SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_edn(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_edn_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_edn_tests: Vec<ScaEdnTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_edn_test in &sca_edn_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_edn_testcase(sca_edn_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_edn, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_hmac/BUILD b/sw/host/tests/penetrationtests/sca_hmac/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_hmac/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_hmac/src/main.rs b/sw/host/tests/penetrationtests/sca_hmac/src/main.rs
new file mode 100644
index 0000000000000..d6a90ff179faf
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_hmac/src/main.rs
@@ -0,0 +1,169 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_hmac_commands::HmacScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_hmac_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaHmacTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    message: String,
+    #[serde(default)]
+    key: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    triggers: String,
+    expected_output: Vec<String>,
+}
+
+fn run_sca_hmac_testcase(
+    test_case: &ScaHmacTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::HmacSca.send(uart)?;
+
+    // Send test subcommand.
+    HmacScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported HMAC SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.key.is_empty() {
+        let key: serde_json::Value = serde_json::from_str(test_case.key.as_str()).unwrap();
+        key.send(uart)?;
+    }
+
+    if !test_case.message.is_empty() {
+        let message: serde_json::Value = serde_json::from_str(test_case.message.as_str()).unwrap();
+        message.send(uart)?;
+    }
+
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    if !test_case.triggers.is_empty() {
+        let triggers: serde_json::Value =
+            serde_json::from_str(test_case.triggers.as_str()).unwrap();
+        triggers.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_hmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_hmac_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_hmac_tests: Vec<ScaHmacTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_hmac_test in &sca_hmac_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_hmac_testcase(sca_hmac_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_hmac, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_ibex/BUILD b/sw/host/tests/penetrationtests/sca_ibex/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_ibex/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_ibex/src/main.rs b/sw/host/tests/penetrationtests/sca_ibex/src/main.rs
new file mode 100644
index 0000000000000..5dd4beae8e4d4
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_ibex/src/main.rs
@@ -0,0 +1,147 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_ibex_commands::IbexScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_ibex_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaIbexTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    expected_output: Vec<String>,
+}
+
+fn run_sca_ibex_testcase(
+    test_case: &ScaIbexTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::IbexSca.send(uart)?;
+
+    // Send test subcommand.
+    IbexScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported Ibex SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_ibex(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_ibex_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_ibex_tests: Vec<ScaIbexTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_ibex_test in &sca_ibex_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_ibex_testcase(sca_ibex_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_ibex, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_kmac/BUILD b/sw/host/tests/penetrationtests/sca_kmac/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_kmac/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_kmac/src/main.rs b/sw/host/tests/penetrationtests/sca_kmac/src/main.rs
new file mode 100644
index 0000000000000..b58ea38beff56
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_kmac/src/main.rs
@@ -0,0 +1,169 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_kmac_commands::KmacScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_kmac_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaKmacTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    message: String,
+    #[serde(default)]
+    key: String,
+    #[serde(default)]
+    mode: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+}
+
+fn run_sca_kmac_testcase(
+    test_case: &ScaKmacTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::KmacSca.send(uart)?;
+
+    // Send test subcommand.
+    KmacScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported KMAC SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.mode.is_empty() {
+        let mode: serde_json::Value = serde_json::from_str(test_case.mode.as_str()).unwrap();
+        mode.send(uart)?;
+    }
+
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    if !test_case.message.is_empty() {
+        let message: serde_json::Value = serde_json::from_str(test_case.message.as_str()).unwrap();
+        message.send(uart)?;
+    }
+
+    if !test_case.key.is_empty() {
+        let key: serde_json::Value = serde_json::from_str(test_case.key.as_str()).unwrap();
+        key.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_kmac(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_kmac_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_kmac_tests: Vec<ScaKmacTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_kmac_test in &sca_kmac_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_kmac_testcase(sca_kmac_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_kmac, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_otbn/BUILD b/sw/host/tests/penetrationtests/sca_otbn/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_otbn/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_otbn/src/main.rs b/sw/host/tests/penetrationtests/sca_otbn/src/main.rs
new file mode 100644
index 0000000000000..a230fcff93f1e
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_otbn/src/main.rs
@@ -0,0 +1,163 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_otbn_commands::OtbnScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_otbn_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaOtbnTestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    iterations: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    masking: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+}
+
+fn run_sca_otbn_testcase(
+    test_case: &ScaOtbnTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::OtbnSca.send(uart)?;
+
+    // Send test subcommand.
+    OtbnScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported OTBN SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.iterations.is_empty() {
+        let iterations: serde_json::Value =
+            serde_json::from_str(test_case.iterations.as_str()).unwrap();
+        iterations.send(uart)?;
+    }
+
+    if !test_case.masking.is_empty() {
+        let masking: serde_json::Value = serde_json::from_str(test_case.masking.as_str()).unwrap();
+        masking.send(uart)?;
+    }
+
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_otbn(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_otbn_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_otbn_tests: Vec<ScaOtbnTestCase> = serde_json::from_str(&raw_json)?;
+        for sca_otbn_test in &sca_otbn_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_otbn_testcase(sca_otbn_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_otbn, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_sha3/BUILD b/sw/host/tests/penetrationtests/sca_sha3/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_sha3/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_sha3/src/main.rs b/sw/host/tests/penetrationtests/sca_sha3/src/main.rs
new file mode 100644
index 0000000000000..3707659a581a6
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_sha3/src/main.rs
@@ -0,0 +1,186 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_sha3_commands::Sha3ScaSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_sha3_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaSha3TestCase {
+    test_case_id: usize,
+    command: String,
+    #[serde(default)]
+    mode: String,
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    status: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    expected_output: Vec<String>,
+}
+
+fn run_sca_sha3_testcase(
+    test_case: &ScaSha3TestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::Sha3Sca.send(uart)?;
+
+    // Send test subcommand.
+    Sha3ScaSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported SHA3 SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send a mode.
+    if !test_case.mode.is_empty() {
+        let mode: serde_json::Value = serde_json::from_str(test_case.mode.as_str()).unwrap();
+        mode.send(uart)?;
+    }
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    if !test_case.status.is_empty() {
+        // Get test output & filter.
+        let output = serde_json::Value::recv(
+            uart,
+            opts.timeout,
+            /*quiet=*/ false,
+            /*skip_crc=*/ false,
+        )?;
+        let output_received = filter_response_common(output.clone());
+
+        // Filter expected output.
+        let exp_output: serde_json::Value =
+            serde_json::from_str(test_case.status.as_str()).unwrap();
+        let output_expected = filter_response_common(exp_output.clone());
+
+        // Check received with expected output.
+        if output_expected != output_received {
+            log::info!(
+                "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                test_case.command,
+                test_case.test_case_id,
+                exp_output,
+                output
+            );
+            *fail_counter += 1;
+        }
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_sha3(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_sha3_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_sha3_tests: Vec<ScaSha3TestCase> = serde_json::from_str(&raw_json)?;
+        for sca_sha3_test in &sca_sha3_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_sha3_testcase(sca_sha3_test, opts, &*uart, &mut fail_counter)?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_sha3, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/penetrationtests/sca_sym_cryptolib/BUILD b/sw/host/tests/penetrationtests/sca_sym_cryptolib/BUILD
new file mode 100644
index 0000000000000..d86a041c93314
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_sym_cryptolib/BUILD
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("//rules:ujson.bzl", "ujson_rust")
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "harness",
+    srcs = ["src/main.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "//sw/host/penetrationtests/ujson_lib:pentest_commands",
+        "//sw/host/tests/penetrationtests/pentest_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:arrayvec",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:serde",
+        "@crate_index//:serde_json",
+    ],
+)
diff --git a/sw/host/tests/penetrationtests/sca_sym_cryptolib/src/main.rs b/sw/host/tests/penetrationtests/sca_sym_cryptolib/src/main.rs
new file mode 100644
index 0000000000000..849b137285e15
--- /dev/null
+++ b/sw/host/tests/penetrationtests/sca_sym_cryptolib/src/main.rs
@@ -0,0 +1,162 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use std::fs;
+use std::str::FromStr;
+use std::time::Duration;
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use serde::Deserialize;
+
+use pentest_commands::commands::PenetrationtestCommand;
+use pentest_commands::sca_sym_cryptolib_commands::CryptoLibScaSymSubcommand;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::execute_test;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
+use opentitanlib::uart::console::UartConsole;
+use pentest_lib::filter_response_common;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    // Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[arg(long, num_args = 1..)]
+    sca_sym_cryptolib_json: Vec<String>,
+}
+
+#[derive(Debug, Deserialize)]
+struct ScaSymCryptoLibTestCase {
+    test_case_id: usize,
+    command: String,
+    // Input only needed for the "Init" subcommand.
+    #[serde(default)]
+    input: String,
+    #[serde(default)]
+    sensors: String,
+    #[serde(default)]
+    alerts: String,
+    expected_output: Vec<String>,
+}
+
+fn run_sca_sym_cryptolib_testcase(
+    test_case: &ScaSymCryptoLibTestCase,
+    opts: &Opts,
+    uart: &dyn Uart,
+    fail_counter: &mut u32,
+) -> Result<()> {
+    log::info!(
+        "test case: {}, test: {}",
+        test_case.test_case_id,
+        test_case.command
+    );
+    PenetrationtestCommand::CryptoLibScaSym.send(uart)?;
+
+    // Send test subcommand.
+    CryptoLibScaSymSubcommand::from_str(test_case.command.as_str())
+        .context("unsupported CryptoLib SYM SCA subcommand")?
+        .send(uart)?;
+
+    // Check if we need to send an input.
+    if !test_case.input.is_empty() {
+        let input: serde_json::Value = serde_json::from_str(test_case.input.as_str()).unwrap();
+        input.send(uart)?;
+    }
+
+    // Check if we need to send sensor info.
+    if !test_case.sensors.is_empty() {
+        let sensors: serde_json::Value = serde_json::from_str(test_case.sensors.as_str()).unwrap();
+        sensors.send(uart)?;
+    }
+
+    // Check if we need to send alert info.
+    if !test_case.alerts.is_empty() {
+        let alerts: serde_json::Value = serde_json::from_str(test_case.alerts.as_str()).unwrap();
+        alerts.send(uart)?;
+    }
+
+    // Check test outputs
+    if !test_case.expected_output.is_empty() {
+        for exp_output in test_case.expected_output.iter() {
+            // Get test output & filter.
+            let output = serde_json::Value::recv(
+                uart,
+                opts.timeout,
+                /*quiet=*/ false,
+                /*skip_crc=*/ false,
+            )?;
+            // Only check non empty JSON responses.
+            if output.as_object().is_some() {
+                let output_received = filter_response_common(output.clone());
+
+                // Filter expected output.
+                let exp_output: serde_json::Value =
+                    serde_json::from_str(exp_output.as_str()).unwrap();
+                let output_expected = filter_response_common(exp_output.clone());
+
+                // Check received with expected output.
+                if output_expected != output_received {
+                    log::info!(
+                        "FAILED {} test #{}: expected = '{}', actual = '{}'\n",
+                        test_case.command,
+                        test_case.test_case_id,
+                        exp_output,
+                        output
+                    );
+                    *fail_counter += 1;
+                }
+            }
+        }
+    }
+
+    Ok(())
+}
+
+fn test_sca_sym_cryptolib(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    uart.set_flow_control(true)?;
+    let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
+
+    let mut test_counter = 0u32;
+    let mut fail_counter = 0u32;
+    let test_vector_files = &opts.sca_sym_cryptolib_json;
+    for file in test_vector_files {
+        let raw_json = fs::read_to_string(file)?;
+        let sca_sym_cryptolib_tests: Vec<ScaSymCryptoLibTestCase> =
+            serde_json::from_str(&raw_json)?;
+        for sca_sym_cryptolib_test in &sca_sym_cryptolib_tests {
+            test_counter += 1;
+            log::info!("Test counter: {}", test_counter);
+            run_sca_sym_cryptolib_testcase(
+                sca_sym_cryptolib_test,
+                opts,
+                &*uart,
+                &mut fail_counter,
+            )?;
+        }
+    }
+    assert_eq!(
+        0, fail_counter,
+        "Failed {} out of {} tests.",
+        fail_counter, test_counter
+    );
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+    execute_test!(test_sca_sym_cryptolib, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/qemu/BUILD b/sw/host/tests/qemu/BUILD
new file mode 100644
index 0000000000000..41b1b0fc7a87d
--- /dev/null
+++ b/sw/host/tests/qemu/BUILD
@@ -0,0 +1,32 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "test_status",
+    srcs = [
+        "src/test_status.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+    ],
+)
+
+rust_binary(
+    name = "i2c_target",
+    srcs = [
+        "src/i2c_target.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+    ],
+)
diff --git a/sw/host/tests/qemu/src/i2c_target.rs b/sw/host/tests/qemu/src/i2c_target.rs
new file mode 100644
index 0000000000000..4666278ee6a3f
--- /dev/null
+++ b/sw/host/tests/qemu/src/i2c_target.rs
@@ -0,0 +1,106 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//! Test harness for `i2c_qemu_target_device_test`.
+//! This test harness interacts with the memory device emulated by software on
+//! opentitan through I2C. The test writes data to the device and reads it
+//! back, checking that the returned data from that memory region is the same.
+//! To terminate the test on the emulated device side, a magic value is written
+//! to a second address, which causes the device to exit the test.
+
+use std::time::Duration;
+
+use anyhow::anyhow;
+use clap::Parser;
+use opentitanlib::io::i2c::Transfer;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "60s")]
+    pub timeout: Duration,
+}
+
+fn main() -> anyhow::Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    let transport = opts.init.init_target()?;
+
+    let log = transport.uart("console")?;
+
+    let i2cs: Vec<_> = (0..3)
+        .map(|idx| transport.i2c(idx.to_string().as_str()))
+        .collect::<Result<_, _>>()?;
+
+    // Wait for device to setup and signal ready
+    _ = UartConsole::wait_for(&*log, "SYNC: Device Ready.*\n", opts.timeout)?;
+
+    for i2c in &i2cs {
+        const MEM_DEVICE_ADDR: u8 = 0x40_u8;
+
+        // Arbitary address in the memory to write to
+        const POINTER: u8 = 0x30_u8;
+
+        const NUM_BYTES: usize = 16;
+        let mut read_buf = [0u8; NUM_BYTES];
+
+        let write_values: Vec<u8> = (0..NUM_BYTES as u8).collect();
+
+        // Instead of one sequential write, split and write the values across two
+        // transaction and write back to front, to demonstrate that the data is
+        // written to the correct location based on the given pointer value
+
+        const SPLIT: usize = NUM_BYTES / 2;
+
+        let mut write_buf_first = vec![POINTER];
+        write_buf_first.extend_from_slice(&write_values[..SPLIT]);
+
+        let mut write_buf_second = vec![POINTER + SPLIT as u8];
+        write_buf_second.extend_from_slice(&write_values[SPLIT..]);
+
+        // First transaction: Write second part of data
+
+        i2c.run_transaction(
+            Some(MEM_DEVICE_ADDR),
+            &mut [Transfer::Write(&write_buf_second)],
+        )?;
+
+        // Second transaction: Write first part of data, then repeated start to
+        // reset pointer, then repeated start to read back all the written data
+
+        i2c.run_transaction(
+            Some(MEM_DEVICE_ADDR),
+            &mut [
+                Transfer::Write(&write_buf_first),
+                Transfer::Write(&[POINTER]),
+                Transfer::Read(&mut read_buf),
+            ],
+        )?;
+
+        // Expect the read back data to match
+
+        assert_eq!(&read_buf.as_slice(), &write_values.as_slice());
+    }
+
+    // Write magic value to second address, causing the test to exit successfully
+
+    const MAGIC_DEVICE_ADDR: u8 = 0x41_u8;
+    const MAGIC_VALUE: u8 = 0xAA_u8;
+
+    i2cs[0].run_transaction(
+        Some(MAGIC_DEVICE_ADDR),
+        &mut [Transfer::Write(&[MAGIC_VALUE])],
+    )?;
+
+    let res = UartConsole::wait_for(&*log, "(PASS|FAIL)!.*\n", opts.timeout)?;
+    match res[0].as_str() {
+        x if x.starts_with("PASS!") => Ok(()),
+        _ => Err(anyhow!("Failure result: {:?}", res)),
+    }
+}
diff --git a/sw/host/tests/qemu/src/test_status.rs b/sw/host/tests/qemu/src/test_status.rs
new file mode 100644
index 0000000000000..ca33d7ba8f636
--- /dev/null
+++ b/sw/host/tests/qemu/src/test_status.rs
@@ -0,0 +1,50 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//! Test harness which starts QEMU and waits for it to pass.
+//!
+//! Uses QEMU's log interface which prints `PASSED` or `FAILED` when the test
+//! status register is written rather than checking the UART. This is compatible
+//! with lower-level tests not using the UART, for example `rom_exit_immediately`.
+
+use std::time::Duration;
+
+use anyhow::anyhow;
+use clap::Parser;
+use opentitanlib::backend::qemu::QemuOpts;
+use opentitanlib::transport::Transport;
+use opentitanlib::transport::qemu::Qemu;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    qemu_opts: QemuOpts,
+
+    #[arg(long, default_value_t)]
+    rcfile: String,
+
+    #[arg(long, default_value_t)]
+    logging: String,
+
+    #[arg(long, default_value_t)]
+    interface: String,
+}
+
+fn main() -> anyhow::Result<()> {
+    let opts = Opts::parse();
+    let qemu = Qemu::from_options(opts.qemu_opts)?;
+
+    let mut monitor = qemu.monitor.borrow_mut();
+
+    monitor.cont()?;
+
+    let log = qemu.uart("LOG")?;
+    let res = UartConsole::wait_for(&*log, "PASSED|FAILED", Duration::from_secs(60))?;
+    match res[0].as_str() {
+        "PASSED" => Ok(()),
+        "FAILED" => Err(anyhow!("QEMU reported failure")),
+        _ => unreachable!(),
+    }
+}
diff --git a/sw/host/tests/rescue/BUILD b/sw/host/tests/rescue/BUILD
new file mode 100644
index 0000000000000..f12c67a86cb6f
--- /dev/null
+++ b/sw/host/tests/rescue/BUILD
@@ -0,0 +1,79 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+load("//rules:ujson.bzl", "ujson_rust")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "xmodem_protocol",
+    srcs = ["xmodem_protocol.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:rustix",
+    ],
+)
+
+rust_binary(
+    name = "usbdfu_protocol",
+    srcs = ["usbdfu_protocol.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+    ],
+)
+
+rust_binary(
+    name = "rescue_test",
+    srcs = ["rescue_test.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:base64ct",
+        "@crate_index//:clap",
+        "@crate_index//:hex",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+        "@lowrisc_serde_annotate//serde_annotate",
+    ],
+)
+
+rust_binary(
+    name = "xmodem_rescue_error_handling",
+    srcs = ["xmodem_rescue_error_handling.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:base64ct",
+        "@crate_index//:clap",
+        "@crate_index//:hex",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+        "@lowrisc_serde_annotate//serde_annotate",
+    ],
+)
+
+rust_binary(
+    name = "dfu_rescue_error_handling",
+    srcs = ["dfu_rescue_error_handling.rs"],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:regex",
+        "@lowrisc_serde_annotate//serde_annotate",
+    ],
+)
diff --git a/sw/host/tests/rescue/dfu_rescue_error_handling.rs b/sw/host/tests/rescue/dfu_rescue_error_handling.rs
new file mode 100644
index 0000000000000..f35f90f329ad0
--- /dev/null
+++ b/sw/host/tests/rescue/dfu_rescue_error_handling.rs
@@ -0,0 +1,353 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::{Args, Parser, Subcommand, ValueEnum};
+
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::io::eeprom::{AddressMode, MODE_111, Transaction};
+use opentitanlib::io::spi::SpiParams;
+use opentitanlib::rescue::dfu::{DfuOperations, DfuRequestType};
+use opentitanlib::rescue::{EntryMode, Rescue, RescueMode, RescueParams, SpiDfu, UsbDfu};
+use opentitanlib::spiflash::SpiFlash;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    #[command(subcommand)]
+    command: Commands,
+}
+
+#[derive(Clone, Debug, Args)]
+pub struct RescueCommand {
+    #[command(flatten)]
+    params: RescueParams,
+
+    #[arg(long)]
+    action: DfuRescueTestActions,
+}
+
+#[derive(Debug, Subcommand)]
+enum Commands {
+    Rescue(RescueCommand),
+}
+
+#[derive(ValueEnum, Debug, Clone, Copy, PartialEq)]
+pub enum DfuRescueTestActions {
+    SpiDfuStateTransitions,
+    InvalidSpiDfuRequests,
+    InvalidSpiFlashTransaction,
+    UsbDfuOutChunkTooBig,
+}
+
+const SET_INTERFACE: u8 = 0x0b;
+const INVALID_INTERFACE: u8 = 0xff;
+
+const DFU_REQUEST_TYPE_INTERFACE: u8 = 0x01;
+
+const DFU_REQ_DN_LOAD: u8 = 0x01;
+const DFU_REQ_CLR_STATUS: u8 = 0x04;
+const DFU_REQ_GET_STATE: u8 = 0x05;
+const DFU_REQ_ABORT: u8 = 0x06;
+const DFU_REQ_INVALID: u8 = 0xff;
+
+const USB_SETUP_REQ_GET_INTERFACE: u8 = 0x0A;
+const USB_SETUP_REQ_SET_INTERFACE: u8 = 0x0B;
+
+fn expect_usb_bad_mode_write_control(
+    rescue: &SpiDfu,
+    request_type: u8,
+    request: u8,
+    value: u16,
+    index: u16,
+) -> Result<()> {
+    let result = rescue.write_control(request_type, request, value, index, &[]);
+    match result {
+        Ok(_) => Err(anyhow!("Invalid write control should fail")),
+        Err(e) => {
+            if e.to_string().contains("UsbBadSetup") {
+                Ok(())
+            } else {
+                Err(anyhow!("Unexpected error: {}", e.to_string()))
+            }
+        }
+    }
+}
+
+fn expect_usb_bad_mode_read_control(
+    rescue: &SpiDfu,
+    request_type: u8,
+    request: u8,
+    value: u16,
+    index: u16,
+    data: &mut [u8],
+) -> Result<()> {
+    let result = rescue.read_control(request_type, request, value, index, data);
+    match result {
+        Ok(_) => Err(anyhow!("Invalid read control should fail")),
+        Err(e) => {
+            if e.to_string().contains("UsbBadSetup") {
+                Ok(())
+            } else {
+                Err(anyhow!("Unexpected error: {}", e.to_string()))
+            }
+        }
+    }
+}
+
+fn spi_dfu_state_transitions(params: &RescueParams, transport: &TransportWrapper) -> Result<()> {
+    let spi_params = SpiParams::default();
+    let spi = spi_params.create(transport, "BOOTSTRAP")?;
+    let rescue = SpiDfu::new(spi.clone(), params.clone());
+    rescue.enter(transport, EntryMode::Reset)?;
+
+    let setting = u32::from(RescueMode::BootSvcRsp);
+    rescue.write_control(
+        DfuRequestType::Vendor.into(),
+        SET_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+        &[],
+    )?;
+
+    // Test a `kDfuReqAbort` request. This should trigger the `kDfuActionNone`
+    // action, causing a state transition from `kDfuStateIdle` to `kDfuStateIdle`.
+    rescue.write_control(DfuRequestType::Out.into(), DFU_REQ_ABORT, 0, 0, &[])?;
+
+    // Test a `kDfuReqGetState` request. This should trigger the
+    // `kDfuActionStateResponse` action, causing a state transition from
+    // `kDfuStateIdle` to `kDfuStateUpLoadIdle`.
+    rescue.write_control(DfuRequestType::Out.into(), DFU_REQ_GET_STATE, 0, 0, &[])?;
+
+    // Test a `kDfuReqClrStatus` request when not in the error state. This should
+    // trigger the `kDfuActionStall` action, causing a state transition from
+    // `kDfuStateUpLoadIdle` to `kDfuStateError`.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DfuRequestType::Out.into(),
+        DFU_REQ_CLR_STATUS,
+        0,
+        0,
+    )?;
+    // Test a `kDfuReqClrStatus` request in the error state. This should trigger
+    // the `kDfuActionClearError` action, causing a state transition from
+    // `kDfuStateError` to `kDfuStateIdle`.
+    rescue.write_control(DfuRequestType::Out.into(), DFU_REQ_CLR_STATUS, 0, 0, &[])?;
+
+    // Test a `kDfuReqDnLoad` request with a payload larger than the DFU buffer.
+    // This should cause a state transition from `kDfuStateIdle` to `kDfuStateError`.
+    let mut payload_too_big = [0u8; 2050];
+    expect_usb_bad_mode_read_control(
+        &rescue,
+        DfuRequestType::Out.into(),
+        DFU_REQ_DN_LOAD,
+        0,
+        0,
+        &mut payload_too_big,
+    )?;
+
+    // Clear the error state, transitioning from `kDfuStateError` to `kDfuStateIdle`.
+    rescue.write_control(DfuRequestType::Out.into(), DFU_REQ_CLR_STATUS, 0, 0, &[])?;
+
+    // Test a `kDfuReqDnLoad` request that would write past the end of flash.
+    // This should cause a state transition from `kDfuStateIdle` to `kDfuStateError`.
+    let mut payload = [0u8; 1];
+    expect_usb_bad_mode_read_control(
+        &rescue,
+        DfuRequestType::Out.into(),
+        DFU_REQ_DN_LOAD,
+        0,
+        0,
+        &mut payload,
+    )?;
+
+    // Test an invalid DFU request.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DfuRequestType::Out.into(),
+        DFU_REQ_INVALID,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+
+    rescue.reboot()?;
+
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Finished", Duration::from_secs(5))?;
+
+    Ok(())
+}
+
+fn invalid_spi_dfu_requests(params: &RescueParams, transport: &TransportWrapper) -> Result<()> {
+    let spi_params = SpiParams::default();
+    let spi = spi_params.create(transport, "BOOTSTRAP")?;
+    let rescue = SpiDfu::new(spi.clone(), params.clone());
+    rescue.enter(transport, EntryMode::Reset)?;
+
+    let setting = u32::from_be_bytes(*b"INVA");
+    // Test an invalid rescue mode with a vendor SET_INTERFACE request.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DfuRequestType::Vendor.into(),
+        SET_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+    // Test an invalid vendor request.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DfuRequestType::Vendor.into(),
+        INVALID_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+    // Test an invalid rescue mode with a standard SET_INTERFACE request.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DFU_REQUEST_TYPE_INTERFACE,
+        USB_SETUP_REQ_SET_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+
+    // Test an invalid interface request.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        DFU_REQUEST_TYPE_INTERFACE,
+        0_u8,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+
+    // Test a valid GET_INTERFACE request.
+    rescue.write_control(
+        DFU_REQUEST_TYPE_INTERFACE,
+        USB_SETUP_REQ_GET_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+        &[],
+    )?;
+
+    // Test an unsupported setup request type.
+    expect_usb_bad_mode_write_control(
+        &rescue,
+        0_u8,
+        USB_SETUP_REQ_GET_INTERFACE,
+        (setting >> 16) as u16,
+        setting as u16,
+    )?;
+
+    rescue.reboot()?;
+
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Finished", Duration::from_secs(5))?;
+
+    Ok(())
+}
+
+fn invalid_spi_flash_transaction(
+    params: &RescueParams,
+    transport: &TransportWrapper,
+) -> Result<()> {
+    let spi_params = SpiParams::default();
+    let spi = spi_params.create(transport, "BOOTSTRAP")?;
+    let rescue = SpiDfu::new(spi.clone(), params.clone());
+    rescue.enter(transport, EntryMode::Reset)?;
+
+    // Send an unsupported flash op code (CHIP_ERASE). The `rescue_protocol` on
+    // the device will report `kErrorUsbBadSetup` in the mailbox.
+    spi.run_eeprom_transactions(&mut [
+        Transaction::Command(MODE_111.cmd(SpiFlash::RESET_ENABLE)),
+        Transaction::Command(MODE_111.cmd(SpiFlash::CHIP_ERASE)),
+    ])?;
+
+    let sfdp = SpiFlash::read_sfdp(&*spi)?;
+    let address_mode = AddressMode::from(sfdp.jedec.address_modes);
+
+    // Send a packet where the offset (2040) + payload (256) exceeds the
+    // device's 2KB buffer. The `rescue_protocol` should truncate the write.
+    let payload = [0u8; 256];
+    spi.run_eeprom_transactions(&mut [
+        Transaction::Command(MODE_111.cmd(SpiFlash::WRITE_ENABLE)),
+        Transaction::Write(
+            MODE_111.cmd_addr(SpiFlash::PAGE_PROGRAM, 2040, address_mode),
+            &payload,
+        ),
+        Transaction::WaitForBusyClear,
+    ])?;
+
+    // Send a payload of 300 bytes, which is larger than the SPI device's
+    // maximum of 256 bytes.
+    let payload_overflow = [0u8; 300];
+    spi.run_eeprom_transactions(&mut [
+        Transaction::Command(MODE_111.cmd(SpiFlash::WRITE_ENABLE)),
+        Transaction::Write(
+            MODE_111.cmd_addr(SpiFlash::PAGE_PROGRAM, 0, address_mode),
+            &payload_overflow,
+        ),
+        Transaction::WaitForBusyClear,
+    ])?;
+
+    rescue.reboot()?;
+
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Finished", Duration::from_secs(5))?;
+
+    Ok(())
+}
+
+fn usb_dfu_out_chunk_too_big(params: &RescueParams, transport: &TransportWrapper) -> Result<()> {
+    let rescue = UsbDfu::new(params.clone());
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let data = vec![0u8; 4096];
+    let result = rescue.download(&data);
+
+    if result.is_ok() {
+        return Err(anyhow!("USB transaction should fail"));
+    }
+
+    rescue.reboot()?;
+
+    let uart = transport.uart("console")?;
+    UartConsole::wait_for(&*uart, r"Finished", Duration::from_secs(5))?;
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    match opts.command {
+        Commands::Rescue(rescue) => match rescue.action {
+            DfuRescueTestActions::SpiDfuStateTransitions => {
+                spi_dfu_state_transitions(&rescue.params, &transport)?
+            }
+            DfuRescueTestActions::InvalidSpiDfuRequests => {
+                invalid_spi_dfu_requests(&rescue.params, &transport)?
+            }
+            DfuRescueTestActions::InvalidSpiFlashTransaction => {
+                invalid_spi_flash_transaction(&rescue.params, &transport)?
+            }
+            DfuRescueTestActions::UsbDfuOutChunkTooBig => {
+                usb_dfu_out_chunk_too_big(&rescue.params, &transport)?
+            }
+        },
+    }
+
+    Ok(())
+}
diff --git a/sw/host/tests/rescue/rescue_test.rs b/sw/host/tests/rescue/rescue_test.rs
new file mode 100644
index 0000000000000..0d67e091ab67c
--- /dev/null
+++ b/sw/host/tests/rescue/rescue_test.rs
@@ -0,0 +1,476 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Context, Result, anyhow};
+use base64ct::{Base64, Decoder};
+
+use clap::{Args, Parser, Subcommand, ValueEnum};
+
+use regex::Regex;
+use std::path::{Path, PathBuf};
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::chip::boot_log::OwnershipState;
+use opentitanlib::chip::boot_svc::{BootSlot, OwnershipActivateRequest, OwnershipUnlockRequest};
+use opentitanlib::image::image::{self};
+use opentitanlib::ownership::{
+    CommandTag, OwnerBlock, OwnerConfigItem, OwnerRescueConfig, TlvHeader,
+};
+use opentitanlib::rescue::{EntryMode, RescueMode, RescueParams, RescueProtocol};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+use opentitanlib::util::file::FromReader;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    #[command(subcommand)]
+    command: Commands,
+
+    // Device ID represented as a hexadecimal string.
+    // This format should correspond to how the ID is structured or stored
+    // in the device's OTP.
+    #[arg(long)]
+    device_id: Option<String>,
+
+    // Path to the owner block file. If not provided, it will be read from
+    // the device's UART console.
+    #[arg(long)]
+    owner_block: Option<PathBuf>,
+
+    /// Path to the ROM_EXT binary, for use with GetBootLog.
+    #[arg(long)]
+    rom_ext: Option<PathBuf>,
+
+    /// Expected ROM_EXT boot slot (SlotA or SlotB). Defaults to SlotA.
+    #[arg(long, value_enum, default_value_t = BootSlot::SlotA)]
+    expected_rom_ext_boot_slot: BootSlot,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+}
+
+#[derive(Clone, Debug, Args)]
+struct RescueCommand {
+    #[command(flatten)]
+    params: RescueParams,
+
+    #[arg(long)]
+    action: RescueTestActions,
+}
+
+#[derive(Debug, Subcommand)]
+enum Commands {
+    Rescue(RescueCommand),
+}
+
+#[derive(ValueEnum, Debug, Clone, Copy, PartialEq)]
+pub enum RescueTestActions {
+    GetDeviceId,
+    GetBootLog,
+    GetOwnerPage,
+    Disability,
+}
+
+fn get_device_id_test(
+    expected_device_id_regex: &String,
+    params: &RescueParams,
+    transport: &TransportWrapper,
+) -> Result<()> {
+    let rescue = params.create(transport)?;
+    rescue.enter(transport, EntryMode::Reset)?;
+    let actual_device_id_from_rescue = rescue.get_device_id()?;
+    let mut actual_id_bytes = Vec::new();
+    actual_device_id_from_rescue.write(&mut actual_id_bytes)?;
+    // Reverse the entire byte sequence to match the expected hex string format.
+    actual_id_bytes.reverse();
+    let actual_device_id_hex = hex::encode(actual_id_bytes);
+
+    let re = Regex::new(expected_device_id_regex).map_err(|e| {
+        anyhow!(
+            "Failed to parse regex string '{}': {}",
+            expected_device_id_regex,
+            e
+        )
+    })?;
+
+    if re.is_match(&actual_device_id_hex) {
+        log::info!(
+            "Device ID '{}' successfully matched regex '{}'.",
+            actual_device_id_hex,
+            expected_device_id_regex
+        );
+        Ok(())
+    } else {
+        Err(anyhow!(
+            "Device ID mismatch. Regex '{}' did not match actual device ID '{}'",
+            expected_device_id_regex,
+            actual_device_id_hex
+        ))
+    }
+}
+
+fn get_boot_log_test(
+    binary: &Path,
+    expected_rom_ext_boot_slot: BootSlot,
+    params: &RescueParams,
+    transport: &TransportWrapper,
+) -> Result<()> {
+    const BOOT_LOG_IDENTIFIER: u32 = u32::from_le_bytes(*b"BLOG");
+    let image = image::Image::read_from_file(binary)?;
+    let rescue = params.create(transport)?;
+    rescue.enter(transport, EntryMode::Reset)?;
+    let boot_log = rescue
+        .get_boot_log()
+        .context("Failed to get boot log from rescue")?;
+    let rom_ext_manifest = image
+        .subimages()?
+        .first()
+        .ok_or_else(|| anyhow!("No subimages found in the image"))?
+        .manifest;
+    if boot_log.rom_ext_major != rom_ext_manifest.version_major {
+        return Err(anyhow!(
+            "rom_ext_major mismatch. Expected: {}, but got: {}",
+            rom_ext_manifest.version_major,
+            boot_log.rom_ext_major
+        ));
+    }
+
+    if boot_log.rom_ext_minor != rom_ext_manifest.version_minor {
+        return Err(anyhow!(
+            "rom_ext_minor mismatch. Expected: {}, but got: {}",
+            rom_ext_manifest.version_minor,
+            boot_log.rom_ext_minor
+        ));
+    }
+
+    if boot_log.ownership_state != OwnershipState::LockedOwner {
+        return Err(anyhow!(
+            "ownership_state mismatch. Expected: {}, but got: {}",
+            OwnershipState::LockedOwner,
+            boot_log.ownership_state
+        ));
+    }
+
+    if boot_log.identifier != BOOT_LOG_IDENTIFIER {
+        return Err(anyhow!(
+            "identifier mismatch. Expected: {}, but got: {}",
+            BOOT_LOG_IDENTIFIER,
+            boot_log.identifier
+        ));
+    }
+
+    if boot_log.rom_ext_slot != expected_rom_ext_boot_slot {
+        return Err(anyhow!(
+            "rom_ext_slot mismatch. Expected: {}, but got: {}",
+            expected_rom_ext_boot_slot,
+            boot_log.rom_ext_slot
+        ));
+    }
+
+    Ok(())
+}
+
+fn get_owner_page_test(
+    owner_block: &OwnerBlock,
+    params: &RescueParams,
+    transport: &TransportWrapper,
+) -> Result<()> {
+    let rescue = params.create(transport)?;
+    rescue.enter(transport, EntryMode::Reset)?;
+    let data = rescue
+        .get_raw(RescueMode::GetOwnerPage0)
+        .context("Failed to get owner page from rescue")?;
+
+    let mut cursor = std::io::Cursor::new(&data);
+    let header = TlvHeader::read(&mut cursor)?;
+    let owner_block_from_rescue = OwnerBlock::read(&mut cursor, header)?;
+
+    if *owner_block == owner_block_from_rescue {
+        Ok(())
+    } else {
+        Err(anyhow!(
+            "Owner Page mismatch. Expected: {:?}, but got: {:?}",
+            owner_block,
+            owner_block_from_rescue
+        ))
+    }
+}
+
+fn load_owner_block(
+    owner_block: Option<&Path>,
+    transport: &TransportWrapper,
+) -> Result<OwnerBlock> {
+    let mut input = Vec::new();
+
+    match owner_block {
+        None => {
+            let uart = transport.uart("console")?;
+            let capture = UartConsole::wait_for(
+                &*uart,
+                r"(?msR)OWNER_PAGE_0: (.*?)\r\n",
+                Duration::from_secs(1),
+            )?;
+            if capture.len() < 2 {
+                return Err(anyhow!(
+                    "OWNER_PAGE_0 base64 data not captured from console"
+                ));
+            }
+            let owner_page_0_base64_str = &capture[1];
+            if owner_page_0_base64_str.is_empty() {
+                return Err(anyhow!("OWNER_PAGE_0 base64 string is empty"));
+            }
+            let mut decoder = Decoder::<Base64>::new(owner_page_0_base64_str.as_bytes())?;
+            decoder.decode_to_end(&mut input)?;
+        }
+        Some(block) => {
+            input = std::fs::read(block)?;
+        }
+    }
+    let mut cursor = std::io::Cursor::new(&input);
+    let header = TlvHeader::read(&mut cursor)?;
+    let owner_block_obj = OwnerBlock::read(&mut cursor, header)?;
+    Ok(owner_block_obj)
+}
+
+fn expect_err_from_rescue_result<T, E>(result: Result<T, E>, error: &str) -> Result<()>
+where
+    E: std::fmt::Display,
+{
+    match result {
+        Ok(_) => Err(anyhow!("Sending a disallowed command should fail")),
+        Err(e) => {
+            if e.to_string().contains(error) {
+                Ok(())
+            } else {
+                Err(anyhow!("Unexpected error: {}", e.to_string()))
+            }
+        }
+    }
+}
+
+macro_rules! expect_disallowed_cmd {
+    ($command_allow_list:expr, $command_tag:expr, $operation:expr, $reset:expr, $expected_err_str:expr $(,)?) => {
+        if !$command_allow_list.contains(&$command_tag) {
+            log::info!("Testing disallowed command: {}", $command_tag,);
+            expect_err_from_rescue_result($operation, $expected_err_str)?;
+            ($reset)?;
+        }
+    };
+}
+
+fn get_expected_err_msg(command: CommandTag, params: &RescueParams) -> String {
+    let command_string = String::from_utf8(command.0.to_be_bytes().to_vec()).unwrap_or_default();
+    match params.protocol {
+        RescueProtocol::Xmodem => format!(r"bad mode: mode: {}", &command_string),
+        _ => r"UsbBadSetup".to_string(),
+    }
+}
+
+fn disability_test(
+    owner_block: &mut OwnerBlock,
+    params: &RescueParams,
+    transport: &TransportWrapper,
+) -> Result<()> {
+    let rescue_config: Option<&mut OwnerRescueConfig> =
+        owner_block.data.iter_mut().find_map(|item| {
+            if let OwnerConfigItem::RescueConfig(config) = item {
+                Some(config)
+            } else {
+                None
+            }
+        });
+
+    match rescue_config {
+        None => {
+            println!("No RescueConfig found. All the rescue commands are allowed by default");
+            Ok(())
+        }
+        Some(config) => {
+            let rescue = params.create(transport)?;
+            rescue.enter(transport, EntryMode::Reset)?;
+
+            let boot_svc_req_allowed = config.command_allow.contains(&CommandTag::BootSvcReq);
+
+            if !boot_svc_req_allowed {
+                // If `BootSvcReq` is disallowed, it implicitly disallows the following
+                // boot services commands, even if they are individually specified in the allow list.
+                let targets_to_remove = [
+                    CommandTag::Empty,
+                    CommandTag::MinBl0SecVerRequest,
+                    CommandTag::NextBl0SlotRequest,
+                    CommandTag::OwnershipActivateRequest,
+                    CommandTag::OwnershipUnlockRequest,
+                ];
+                config
+                    .command_allow
+                    .retain(|cmd| !targets_to_remove.contains(cmd));
+            }
+
+            const DUMMY_BYTES: [u8; 256] = [0u8; 256];
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::Rescue,
+                rescue.update_firmware(BootSlot::SlotA, &DUMMY_BYTES),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::Rescue, params)
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::RescueB,
+                rescue.update_firmware(BootSlot::SlotB, &DUMMY_BYTES),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::RescueB, params)
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::GetDeviceId,
+                rescue.get_device_id(),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::GetDeviceId, params)
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::GetBootLog,
+                rescue.get_boot_log(),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::GetBootLog, params)
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::GetOwnerPage0,
+                rescue.get_raw(RescueMode::GetOwnerPage0),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::GetOwnerPage0, params)
+            );
+
+            // GetOwnerPage1 command is only supported in Xmodem variant.
+            if params.protocol == RescueProtocol::Xmodem {
+                expect_disallowed_cmd!(
+                    config.command_allow,
+                    CommandTag::GetOwnerPage1,
+                    rescue.get_raw(RescueMode::GetOwnerPage1),
+                    rescue.enter(transport, EntryMode::Reset),
+                    &get_expected_err_msg(CommandTag::GetOwnerPage1, params)
+                );
+            }
+
+            // When BootSvcReq is allowed but its sub-commands are not:
+            // - XMODEM propagates the rescue error as "Cancelled".
+            // - DFU reports "Vendor" error instead of "UsbBadSetup" error.
+            let boot_svc_req_sub_cmd_err_msg = if boot_svc_req_allowed {
+                if params.protocol == RescueProtocol::Xmodem {
+                    "Cancelled".to_string()
+                } else {
+                    "Vendor".to_string()
+                }
+            } else {
+                get_expected_err_msg(CommandTag::BootSvcReq, params)
+            };
+
+            const DUMMY_PAYLOAD: [u32; 64] = [0u32; 64];
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::Empty,
+                rescue.empty(DUMMY_PAYLOAD.as_ref()),
+                rescue.enter(transport, EntryMode::Reset),
+                &boot_svc_req_sub_cmd_err_msg,
+            );
+
+            const NEW_BL0_VER: u32 = 2;
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::MinBl0SecVerRequest,
+                rescue.set_min_bl0_sec_ver(NEW_BL0_VER),
+                rescue.enter(transport, EntryMode::Reset),
+                &boot_svc_req_sub_cmd_err_msg,
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::NextBl0SlotRequest,
+                rescue.set_next_bl0_slot(BootSlot::SlotA, BootSlot::SlotA),
+                rescue.enter(transport, EntryMode::Reset),
+                &boot_svc_req_sub_cmd_err_msg,
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::OwnershipUnlockRequest,
+                rescue.ownership_unlock(OwnershipUnlockRequest::default()),
+                rescue.enter(transport, EntryMode::Reset),
+                &boot_svc_req_sub_cmd_err_msg,
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::OwnershipActivateRequest,
+                rescue.ownership_activate(OwnershipActivateRequest::default()),
+                rescue.enter(transport, EntryMode::Reset),
+                &boot_svc_req_sub_cmd_err_msg,
+            );
+
+            expect_disallowed_cmd!(
+                config.command_allow,
+                CommandTag::BootSvcRsp,
+                rescue.get_boot_svc(),
+                rescue.enter(transport, EntryMode::Reset),
+                &get_expected_err_msg(CommandTag::BootSvcRsp, params)
+            );
+
+            Ok(())
+        }
+    }
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    match opts.command {
+        Commands::Rescue(rescue) => match rescue.action {
+            RescueTestActions::GetDeviceId => {
+                let device_id = &opts
+                    .device_id
+                    .as_ref()
+                    .ok_or_else(|| anyhow!("No device_id provided"))?;
+                get_device_id_test(device_id, &rescue.params, &transport)?;
+            }
+            RescueTestActions::GetBootLog => {
+                let binary = &opts
+                    .init
+                    .bootstrap
+                    .bootstrap
+                    .as_ref()
+                    .or(opts.rom_ext.as_ref())
+                    .ok_or_else(|| anyhow!("No RV32 test binary provided"))?;
+                get_boot_log_test(
+                    binary,
+                    opts.expected_rom_ext_boot_slot,
+                    &rescue.params,
+                    &transport,
+                )?;
+            }
+            RescueTestActions::GetOwnerPage => {
+                let owner_block = load_owner_block(opts.owner_block.as_deref(), &transport)?;
+                get_owner_page_test(&owner_block, &rescue.params, &transport)?;
+            }
+            RescueTestActions::Disability => {
+                let mut owner_block = load_owner_block(opts.owner_block.as_deref(), &transport)?;
+                disability_test(&mut owner_block, &rescue.params, &transport)?;
+            }
+        },
+    }
+    Ok(())
+}
diff --git a/sw/host/tests/rescue/usbdfu_protocol.rs b/sw/host/tests/rescue/usbdfu_protocol.rs
new file mode 100644
index 0000000000000..a22144dec0957
--- /dev/null
+++ b/sw/host/tests/rescue/usbdfu_protocol.rs
@@ -0,0 +1,129 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use std::process::Command;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::chip::boot_log::BootLog;
+use opentitanlib::execute_test;
+use opentitanlib::rescue::{EntryMode, RescueParams, RescueProtocol, RescueTrigger};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// The rescue protocol.
+    #[arg(short, long, value_enum, default_value_t = RescueProtocol::UsbDfu)]
+    rescue_protocol: RescueProtocol,
+    /// The rescue trigger mechanism.
+    #[arg(short, long, value_enum, default_value_t = RescueTrigger::Strap)]
+    trigger: RescueTrigger,
+    /// The rescue trigger value.
+    #[arg(short, long, default_value = "")]
+    value: String,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    /// Firmware image
+    #[arg(long)]
+    firmware: String,
+}
+
+/// Checks that we can use the primitive xmodem tools from the `lrzsz` package
+/// to perform firmware rescue.
+fn firmware_update_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let params = RescueParams {
+        protocol: opts.rescue_protocol,
+        trigger: opts.trigger,
+        value: opts.value.clone(),
+        ..Default::default()
+    };
+    let rescue = params.create(transport)?;
+
+    // It would be even cooler to do this in a python script or shell script, but
+    // opentitanlib is just too convenient for manipulating our test infrastructure.
+    // We trigger rescue and then use `dfu-util` to perform the actual operation.
+    rescue.enter(transport, EntryMode::Reset)?;
+    // Note: we drop the rescue instance to release our claim on the usb-dfu
+    // interface.  This allows `dfu-util` to claim and use the interface.
+    drop(rescue);
+
+    let mut child = Command::new("dfu-util")
+        .arg("--device=18d1:023a")
+        // AltSetting 0 is the firmware rescue setting.
+        .arg("--alt=0")
+        .arg("--reset")
+        .arg("--download")
+        .arg(&opts.firmware)
+        .spawn()?;
+
+    let status = child.wait()?;
+    log::info!("Got dfu-util exit code {status:?}");
+
+    let capture = UartConsole::wait_for(&*uart, r"PASS!$|BFV:([0-9A-Fa-f]{8})", opts.timeout)?;
+    if capture[0].starts_with("BFV") {
+        Err(anyhow!("Error: {}", capture[0]))
+    } else {
+        Ok(())
+    }
+}
+
+/// Checks that we can use the primitive xmodem tools from the `lrzsz` package
+/// to perform get the BootLog from the chip.
+fn get_boot_log_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let params = RescueParams {
+        protocol: opts.rescue_protocol,
+        trigger: opts.trigger,
+        value: opts.value.clone(),
+        ..Default::default()
+    };
+    let rescue = params.create(transport)?;
+
+    let path = format!("boot_log-{}.bin", std::process::id());
+    let _ = std::fs::remove_file(&path);
+    log::info!("Receving boot_log into {path:?}");
+
+    // It would be even cooler to do this in a python script or shell script, but
+    // opentitanlib is just too convenient for manipulating our test infrastructure.
+    // We trigger rescue and then use `dfu-util` to perform the actual operation.
+    rescue.enter(transport, EntryMode::Reset)?;
+    // Note: we drop the rescue instance to release our claim on the usb-dfu
+    // interface.  This allows `dfu-util` to claim and use the interface.
+    drop(rescue);
+
+    let mut child = Command::new("dfu-util")
+        .arg("--device=18d1:023a")
+        // AltSetting 3 is the BootLog setting.
+        .arg("--alt=3")
+        .arg("--upload")
+        .arg(&path)
+        .spawn()?;
+
+    let status = child.wait()?;
+    log::info!("Got dfu-util exit code {status:?}");
+
+    let data = std::fs::read(&path)?;
+    let blog = BootLog::try_from(data.as_slice())?;
+    log::info!("BootLog = {blog:?}");
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    execute_test!(firmware_update_test, &opts, &transport);
+    execute_test!(get_boot_log_test, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/rescue/xmodem_protocol.rs b/sw/host/tests/rescue/xmodem_protocol.rs
new file mode 100644
index 0000000000000..a2eacef895b5f
--- /dev/null
+++ b/sw/host/tests/rescue/xmodem_protocol.rs
@@ -0,0 +1,110 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::{Result, anyhow};
+use clap::Parser;
+use std::process::{Command, Stdio};
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::chip::boot_log::BootLog;
+use opentitanlib::execute_test;
+use opentitanlib::rescue::serial::RescueSerial;
+use opentitanlib::rescue::{EntryMode, Rescue, RescueMode};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+
+    /// Firmware image
+    #[arg(long)]
+    firmware: String,
+}
+
+/// Checks that we can use the primitive xmodem tools from the `lrzsz` package
+/// to perform firmware rescue.
+fn firmware_update_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), None);
+
+    // It would be even cooler to do this in a python script or shell script, but
+    // opentitanlib is just too convenient for manipulating our test infrastructure.
+    // Nevertheless, we farm out the actual work to the `sx` (send xmodem) command.
+    rescue.enter(transport, EntryMode::Reset)?;
+
+    // Get the UART file descriptor and dup it to use as the child's stdin/stdout.
+    let fd = uart.borrow_fd()?;
+    let stdin = Stdio::from(rustix::io::dup(fd)?);
+    let stdout = Stdio::from(rustix::io::dup(fd)?);
+    let mut child = Command::new("sx")
+        .arg("--1k")
+        .arg(&opts.firmware)
+        .stdin(stdin)
+        .stdout(stdout)
+        .spawn()?;
+
+    let status = child.wait()?;
+    log::info!("Got xmodem exit code {status:?}");
+    rescue.reboot()?;
+
+    let capture = UartConsole::wait_for(&*uart, r"PASS!$|BFV:([0-9A-Fa-f]{8})", opts.timeout)?;
+    if capture[0].starts_with("BFV") {
+        Err(anyhow!("Error: {}", capture[0]))
+    } else {
+        Ok(())
+    }
+}
+
+/// Checks that we can use the primitive xmodem tools from the `lrzsz` package
+/// to perform get the BootLog from the chip.
+fn get_boot_log_test(_opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), None);
+
+    // It would be even cooler to do this in a python script or shell script, but
+    // opentitanlib is just too convenient for manipulating our test infrastructure.
+    // Nevertheless, we farm out the actual work to the `rx` (recv xmodem) command.
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+
+    let path = format!("boot_log-{}.bin", std::process::id());
+    let _ = std::fs::remove_file(&path);
+    log::info!("Receving boot_log into {path:?}");
+
+    // Get the UART file descriptor and dup it to use as the child's stdin/stdout.
+    let fd = uart.borrow_fd()?;
+    let stdin = Stdio::from(rustix::io::dup(fd)?);
+    let stdout = Stdio::from(rustix::io::dup(fd)?);
+    let mut child = Command::new("rx")
+        .arg("--with-crc")
+        .arg(&path)
+        .stdin(stdin)
+        .stdout(stdout)
+        .spawn()?;
+
+    let status = child.wait()?;
+    log::info!("Got xmodem exit code {status:?}");
+    let data = std::fs::read(&path)?;
+    let blog = BootLog::try_from(data.as_slice())?;
+    log::info!("BootLog = {blog:?}");
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    execute_test!(firmware_update_test, &opts, &transport);
+    execute_test!(get_boot_log_test, &opts, &transport);
+    Ok(())
+}
diff --git a/sw/host/tests/rescue/xmodem_rescue_error_handling.rs b/sw/host/tests/rescue/xmodem_rescue_error_handling.rs
new file mode 100644
index 0000000000000..fc9a40f415a37
--- /dev/null
+++ b/sw/host/tests/rescue/xmodem_rescue_error_handling.rs
@@ -0,0 +1,365 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#![allow(clippy::bool_assert_comparison)]
+use anyhow::Result;
+use clap::Parser;
+
+use std::rc::Rc;
+use std::time::Duration;
+
+use opentitanlib::app::TransportWrapper;
+use opentitanlib::io::uart::Uart;
+use opentitanlib::rescue::xmodem::XmodemError;
+use opentitanlib::rescue::{EntryMode, Rescue, RescueMode, RescueSerial};
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::UartConsole;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "10s")]
+    timeout: Duration,
+}
+
+const POLYNOMIAL: u16 = 0x1021;
+const CRC: u8 = 0x43;
+const SOH: u8 = 0x01;
+const STX: u8 = 0x02;
+const EOF: u8 = 0x04;
+const ACK: u8 = 0x06;
+const NAK: u8 = 0x15;
+const CAN: u8 = 0x18;
+
+const BLOCK128_LEN: usize = 128;
+const CRC_LEN: usize = 2;
+const HEADER_LEN: usize = 3;
+
+fn send_packet_timeout(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CRC);
+
+    uart.write(&[STX])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn send_data_timeout(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CRC);
+
+    uart.write(&[STX, 1, 254])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn send_crc_timeout(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CRC);
+
+    let mut buf = vec![0xff; HEADER_LEN + BLOCK128_LEN];
+    buf[0] = SOH;
+    buf[1] = 1;
+    buf[2] = 255 - buf[1];
+    uart.write(&buf)?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn send_data_crc_error_cancel(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CRC);
+    let mut buf = vec![0xff; HEADER_LEN + BLOCK128_LEN + CRC_LEN];
+    buf[0] = SOH;
+    buf[1] = 1;
+    buf[2] = 255 - buf[1];
+    uart.write(&buf)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, NAK);
+    buf[1] = buf[2];
+    uart.write(&buf)?;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CAN);
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn send_packet_bad_len(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::Rescue)?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+    assert_eq!(ch, CRC);
+
+    let buf_1k = vec![0xff; 1024];
+    let buf_128 = vec![0xff; 128];
+
+    uart.write(&[STX, 1, 254])?;
+    uart.write(&buf_1k)?;
+    let crc = crc16(&buf_1k[..]);
+    uart.write(&[(crc >> 8) as u8, (crc & 0xFF) as u8])?;
+    let mut ch = 0u8;
+    uart.read(std::slice::from_mut(&mut ch))?;
+
+    uart.write(&[SOH, 2, 253])?;
+    uart.write(&buf_128)?;
+    let crc = crc16(&buf_128[..]);
+    uart.write(&[(crc >> 8) as u8, (crc & 0xFF) as u8])?;
+    uart.read(std::slice::from_mut(&mut ch))?;
+
+    uart.write(&[STX, 3, 252])?;
+    uart.write(&buf_1k)?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_start_timeout(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    let buf = vec![0xff; 29];
+    uart.write(&buf)?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_start_cancel(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    uart.write(&[CAN, CAN])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_start_nak(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    uart.write(&[NAK, NAK])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_data_timeout(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    uart.write(&[CRC])?;
+    uart.write(&[NAK])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_data_cancel(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    uart.write(&[CRC])?;
+    uart.write(&[CAN, CAN])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn recv_data_nak(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+    uart.write(&[CRC])?;
+    uart.write(&[NAK, NAK])?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn crc16(buf: &[u8]) -> u16 {
+    let mut crc = 0u16;
+    for byte in buf {
+        crc ^= (*byte as u16) << 8;
+        for _bit in 0..8 {
+            let msb = crc & 0x8000 != 0;
+            crc <<= 1;
+            if msb {
+                crc ^= POLYNOMIAL;
+            }
+        }
+    }
+    crc
+}
+
+fn recv_finish_nak(
+    transport: &TransportWrapper,
+    uart: &dyn Uart,
+    rescue: &RescueSerial,
+) -> Result<()> {
+    rescue.enter(transport, EntryMode::Reset)?;
+    rescue.set_mode(RescueMode::BootLog)?;
+
+    // Send the byte indicating the protocol we want (Xmodem-CRC).
+    uart.write(&[CRC])?;
+
+    let mut block = 1u8;
+    let mut errors = 0usize;
+    loop {
+        // The first byte of the packet is the packet type which indicates the block size.
+        let mut byte = 0u8;
+        uart.read(std::slice::from_mut(&mut byte))?;
+        let block_len = match byte {
+            SOH => 128,
+            STX => 1024,
+            EOF => {
+                // End of file. Intentionally send a NAK rather than ACK.
+                uart.write(&[NAK])?;
+                break;
+            }
+            _ => {
+                return Err(XmodemError::UnsupportedMode(format!(
+                    "bad start of packet: {byte:02x} ({})",
+                    byte as char
+                ))
+                .into());
+            }
+        };
+
+        // The next two bytes are the block number and its complement.
+        let mut bnum = 0u8;
+        let mut bcom = 0u8;
+        uart.read(std::slice::from_mut(&mut bnum))?;
+        uart.read(std::slice::from_mut(&mut bcom))?;
+        let cancel = block != bnum || bnum != 255 - bcom;
+
+        // The next `block_len` bytes are the packet itself.
+        let mut buffer = vec![0; block_len];
+        let mut total = 0;
+        while total < block_len {
+            let n = uart.read(&mut buffer[total..])?;
+            total += n;
+        }
+
+        // The final two bytes are the CRC16.
+        let mut crc1 = 0u8;
+        let mut crc2 = 0u8;
+        uart.read(std::slice::from_mut(&mut crc1))?;
+        uart.read(std::slice::from_mut(&mut crc2))?;
+        let crc = u16::from_be_bytes([crc1, crc2]);
+
+        // If we should cancel, do it now.
+        if cancel {
+            uart.write(&[CAN, CAN])?;
+            return Err(XmodemError::Cancelled.into());
+        }
+        if crc16(&buffer) == crc {
+            // CRC was good; send an ACK
+            uart.write(&[ACK])?;
+            block = block.wrapping_add(1);
+        } else {
+            uart.write(&[NAK])?;
+            errors += 1;
+        }
+        if errors >= 2 {
+            return Err(XmodemError::ExhaustedRetries(errors).into());
+        }
+    }
+    rescue.reboot()?;
+
+    // Ensure we can still boot into Owner SW.
+    UartConsole::wait_for(uart, r"Finished", Duration::from_secs(5))?;
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+    let uart = transport.uart("console")?;
+    let rescue = RescueSerial::new(Rc::clone(&uart), None);
+    send_packet_timeout(&transport, &*uart, &rescue)?;
+    send_data_timeout(&transport, &*uart, &rescue)?;
+    send_crc_timeout(&transport, &*uart, &rescue)?;
+    send_data_crc_error_cancel(&transport, &*uart, &rescue)?;
+    send_packet_bad_len(&transport, &*uart, &rescue)?;
+    recv_start_timeout(&transport, &*uart, &rescue)?;
+    recv_start_cancel(&transport, &*uart, &rescue)?;
+    recv_start_nak(&transport, &*uart, &rescue)?;
+    recv_data_timeout(&transport, &*uart, &rescue)?;
+    recv_data_cancel(&transport, &*uart, &rescue)?;
+    recv_data_nak(&transport, &*uart, &rescue)?;
+    recv_finish_nak(&transport, &*uart, &rescue)?;
+    Ok(())
+}
diff --git a/sw/host/tests/rom/e2e_bootstrap_disabled/src/main.rs b/sw/host/tests/rom/e2e_bootstrap_disabled/src/main.rs
index 02912b3929781..bdfacee536546 100644
--- a/sw/host/tests/rom/e2e_bootstrap_disabled/src/main.rs
+++ b/sw/host/tests/rom/e2e_bootstrap_disabled/src/main.rs
@@ -3,12 +3,12 @@
 // SPDX-License-Identifier: Apache-2.0
 #![allow(clippy::bool_assert_comparison)]
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use regex::Regex;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::spiflash::SpiFlash;
 use opentitanlib::test_utils::init::InitializeTest;
@@ -39,7 +39,7 @@ fn test_bootstrap_disabled_requested(opts: &Opts, transport: &TransportWrapper)
     log::info!("Applying pin strapping");
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
     log::info!("Resetting target");
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Now watch the console for the exit conditions.
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -68,7 +68,7 @@ fn test_bootstrap_disabled_not_requested(opts: &Opts, transport: &TransportWrapp
     log::info!("Not applying pin strapping");
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
     log::info!("Resetting target");
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Now watch the console for the exit conditions.
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
diff --git a/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs b/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
index a846f4ee5b701..390daa8ecc496 100644
--- a/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
+++ b/sw/host/tests/rom/e2e_bootstrap_entry/src/main.rs
@@ -3,7 +3,7 @@
 // SPDX-License-Identifier: Apache-2.0
 #![allow(clippy::bool_assert_comparison)]
 
-use anyhow::{bail, Result};
+use anyhow::{Result, bail};
 use clap::Parser;
 use humantime::parse_duration;
 use regex::Regex;
@@ -11,11 +11,11 @@ use std::matches;
 use std::ops::Drop;
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::execute_test;
 use opentitanlib::io::spi::Transfer;
 use opentitanlib::spiflash::{
-    sfdp, BlockEraseSize, SpiFlash, SupportedAddressModes, WriteGranularity,
+    BlockEraseSize, SpiFlash, SupportedAddressModes, WriteGranularity, sfdp,
 };
 use opentitanlib::test_utils::init::InitializeTest;
 use opentitanlib::uart::console::{ExitStatus, UartConsole};
@@ -55,23 +55,19 @@ struct Opts {
 /// erased when the returned struct is dropped, typically at the end of the test point.
 struct BootstrapTest<'a> {
     transport: &'a TransportWrapper,
-    reset_delay: Duration,
 }
 
 impl<'a> BootstrapTest<'a> {
-    pub fn start(transport: &'a TransportWrapper, reset_delay: Duration) -> Result<Self> {
-        let b = BootstrapTest {
-            transport,
-            reset_delay,
-        };
+    pub fn start(transport: &'a TransportWrapper) -> Result<Self> {
+        let b = BootstrapTest { transport };
         transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-        transport.reset_target(b.reset_delay, true)?;
+        transport.reset(UartRx::Clear)?;
         let spi = transport.spi("BOOTSTRAP").unwrap();
         SpiFlash::from_spi(&*spi)
             .unwrap()
             .chip_erase(&*spi)
             .unwrap();
-        transport.reset_target(reset_delay, true).unwrap();
+        transport.reset(UartRx::Clear).unwrap();
         Ok(b)
     }
 }
@@ -80,19 +76,19 @@ impl<'a> Drop for BootstrapTest<'a> {
     fn drop(&mut self) {
         let bootstrapping = self.transport.pin_strapping("ROM_BOOTSTRAP").unwrap();
         bootstrapping.apply().unwrap();
-        self.transport.reset_target(self.reset_delay, true).unwrap();
+        self.transport.reset(UartRx::Clear).unwrap();
         let spi = self.transport.spi("BOOTSTRAP").unwrap();
         SpiFlash::from_spi(&*spi)
             .unwrap()
             .chip_erase(&*spi)
             .unwrap();
         bootstrapping.remove().unwrap();
-        self.transport.reset_target(self.reset_delay, true).unwrap();
+        self.transport.reset(UartRx::Clear).unwrap();
     }
 }
 
 fn test_bootstrap_enabled_requested(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+    let _bs = BootstrapTest::start(transport)?;
 
     // TODO: Should really `opts.init.uart_params.create()` here, but we need to refactor
     // BootstrapOptions first.
@@ -106,7 +102,7 @@ fn test_bootstrap_enabled_requested(opts: &Opts, transport: &TransportWrapper) -
     };
 
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Now watch the console for the exit conditions.
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -132,7 +128,7 @@ fn test_bootstrap_enabled_not_requested(opts: &Opts, transport: &TransportWrappe
         ..Default::default()
     };
 
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // Now watch the console for the exit conditions.
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -156,7 +152,7 @@ fn test_bootstrap_enabled_not_requested(opts: &Opts, transport: &TransportWrappe
 }
 
 fn test_jedec_id(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let id = SpiFlash::read_jedec_id(&*spi, 16)?;
@@ -177,8 +173,8 @@ fn test_jedec_id(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     Ok(())
 }
 
-fn test_write_enable_disable(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_write_enable_disable(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
 
@@ -194,7 +190,7 @@ fn test_write_enable_disable(opts: &Opts, transport: &TransportWrapper) -> Resul
 }
 
 fn test_sfdp(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let sfdp = SpiFlash::read_sfdp(&*spi)?;
@@ -289,13 +285,8 @@ fn test_sfdp(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
     Ok(())
 }
 
-fn test_bootstrap_shutdown(
-    opts: &Opts,
-    transport: &TransportWrapper,
-    cmd: u8,
-    bfv: &str,
-) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_shutdown(transport: &TransportWrapper, cmd: u8, bfv: &str) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
@@ -332,8 +323,8 @@ fn test_bootstrap_shutdown(
     Ok(())
 }
 
-fn test_bootstrap_phase1_reset(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase1_reset(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
@@ -354,8 +345,8 @@ fn test_bootstrap_phase1_reset(opts: &Opts, transport: &TransportWrapper) -> Res
     Ok(())
 }
 
-fn test_bootstrap_phase1_page_program(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase1_page_program(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
@@ -373,7 +364,7 @@ fn test_bootstrap_phase1_page_program(opts: &Opts, transport: &TransportWrapper)
         .program(&*spi, 0x80330, &0x4552_544f_0000_0000_u64.to_le_bytes())?;
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     // We should see the expected BFV.
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -384,12 +375,8 @@ fn test_bootstrap_phase1_page_program(opts: &Opts, transport: &TransportWrapper)
     Ok(())
 }
 
-fn test_bootstrap_phase1_erase(
-    opts: &Opts,
-    transport: &TransportWrapper,
-    erase_cmd: u8,
-) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase1_erase(transport: &TransportWrapper, erase_cmd: u8) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     let spiflash = SpiFlash::from_spi(&*spi)?;
@@ -411,7 +398,7 @@ fn test_bootstrap_phase1_erase(
 
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     // `kErrorBootPolicyBadLength` (0242500d) is defined in `error.h`.
     console.exit_success = Some(Regex::new("BFV:0242500d")?);
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -421,11 +408,11 @@ fn test_bootstrap_phase1_erase(
 
     // Put the chip into bootstrap mode again and erase.
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     erase()?;
     uart.clear_rx_buffer()?;
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     // `kErrorBootPolicyBadLength` (0242500d) is defined in `error.h`.
     console.exit_success = Some(Regex::new("BFV:0242500d")?);
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -436,8 +423,8 @@ fn test_bootstrap_phase1_erase(
     Ok(())
 }
 
-fn test_bootstrap_phase1_read(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase1_read(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     let mut console = UartConsole {
@@ -453,7 +440,7 @@ fn test_bootstrap_phase1_read(opts: &Opts, transport: &TransportWrapper) -> Resu
 
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     // `kErrorBootPolicyBadLength` (0242500d) is defined in `error.h`.
     console.exit_success = Some(Regex::new("BFV:0242500d")?);
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
@@ -462,7 +449,7 @@ fn test_bootstrap_phase1_read(opts: &Opts, transport: &TransportWrapper) -> Resu
     }
 
     transport.pin_strapping("ROM_BOOTSTRAP")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     assert_eq!(SpiFlash::read_status(&*spi)?, 0x00);
     let mut buf: [u8; 8] = [0xa5; 8];
     SpiFlash::from_spi(&*spi)?.read(&*spi, 0x80330, &mut buf)?;
@@ -472,8 +459,8 @@ fn test_bootstrap_phase1_read(opts: &Opts, transport: &TransportWrapper) -> Resu
     Ok(())
 }
 
-fn test_bootstrap_phase2_reset(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase2_reset(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
 
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
@@ -506,8 +493,8 @@ fn test_bootstrap_phase2_reset(opts: &Opts, transport: &TransportWrapper) -> Res
     Ok(())
 }
 
-fn test_bootstrap_phase2_page_program(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase2_page_program(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     SpiFlash::from_spi(&*spi)?
@@ -524,7 +511,7 @@ fn test_bootstrap_phase2_page_program(opts: &Opts, transport: &TransportWrapper)
     };
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
     if result != ExitStatus::ExitSuccess {
         bail!("FAIL: {:?}", result);
@@ -533,12 +520,8 @@ fn test_bootstrap_phase2_page_program(opts: &Opts, transport: &TransportWrapper)
     Ok(())
 }
 
-fn test_bootstrap_phase2_erase(
-    opts: &Opts,
-    transport: &TransportWrapper,
-    erase_cmd: u8,
-) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase2_erase(transport: &TransportWrapper, erase_cmd: u8) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     let spiflash = SpiFlash::from_spi(&*spi)?;
@@ -564,7 +547,7 @@ fn test_bootstrap_phase2_erase(
     };
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
     if result != ExitStatus::ExitSuccess {
         bail!("FAIL: {:?}", result);
@@ -573,8 +556,8 @@ fn test_bootstrap_phase2_erase(
     Ok(())
 }
 
-fn test_bootstrap_phase2_read(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_phase2_read(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     let mut read_buf = [0u8; 8];
@@ -598,7 +581,7 @@ fn test_bootstrap_phase2_read(opts: &Opts, transport: &TransportWrapper) -> Resu
     };
     // Remove strapping so that chip fails to boot instead of going into bootstrap.
     transport.pin_strapping("ROM_BOOTSTRAP")?.remove()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
     let result = console.interact(&*uart, None, Some(&mut std::io::stdout()))?;
     if result != ExitStatus::ExitSuccess {
         bail!("FAIL: {:?}", result);
@@ -607,8 +590,8 @@ fn test_bootstrap_phase2_read(opts: &Opts, transport: &TransportWrapper) -> Resu
     Ok(())
 }
 
-fn test_bootstrap_watchdog_check(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
-    let _bs = BootstrapTest::start(transport, opts.init.bootstrap.options.reset_delay)?;
+fn test_bootstrap_watchdog_check(transport: &TransportWrapper) -> Result<()> {
+    let _bs = BootstrapTest::start(transport)?;
     let spi = transport.spi("BOOTSTRAP")?;
     let uart = transport.uart("console")?;
     let mut console = UartConsole {
@@ -645,28 +628,28 @@ fn main() -> Result<()> {
     execute_test!(test_bootstrap_enabled_requested, &opts, &transport);
     execute_test!(test_jedec_id, &opts, &transport);
     execute_test!(test_sfdp, &opts, &transport);
-    execute_test!(test_write_enable_disable, &opts, &transport);
+    execute_test!(test_write_enable_disable, &transport);
     for (cmd, bfv) in [
         // `kErrorBootstrapEraseAddress` (01425303) is defined in `error.h`.
         (SpiFlash::SECTOR_ERASE, "01425303"),
         // `kErrorBootstrapProgramAddress` (02425303) is defined in `error.h`.
         (SpiFlash::PAGE_PROGRAM, "02425303"),
     ] {
-        execute_test!(test_bootstrap_shutdown, &opts, &transport, cmd, bfv);
+        execute_test!(test_bootstrap_shutdown, &transport, cmd, bfv);
     }
-    execute_test!(test_bootstrap_phase1_reset, &opts, &transport);
-    execute_test!(test_bootstrap_phase1_page_program, &opts, &transport);
+    execute_test!(test_bootstrap_phase1_reset, &transport);
+    execute_test!(test_bootstrap_phase1_page_program, &transport);
     for erase_cmd in [SpiFlash::SECTOR_ERASE, SpiFlash::CHIP_ERASE] {
-        execute_test!(test_bootstrap_phase1_erase, &opts, &transport, erase_cmd);
+        execute_test!(test_bootstrap_phase1_erase, &transport, erase_cmd);
     }
-    execute_test!(test_bootstrap_phase1_read, &opts, &transport);
-    execute_test!(test_bootstrap_phase2_reset, &opts, &transport);
-    execute_test!(test_bootstrap_phase2_page_program, &opts, &transport);
+    execute_test!(test_bootstrap_phase1_read, &transport);
+    execute_test!(test_bootstrap_phase2_reset, &transport);
+    execute_test!(test_bootstrap_phase2_page_program, &transport);
     for erase_cmd in [SpiFlash::SECTOR_ERASE, SpiFlash::CHIP_ERASE] {
-        execute_test!(test_bootstrap_phase2_erase, &opts, &transport, erase_cmd);
+        execute_test!(test_bootstrap_phase2_erase, &transport, erase_cmd);
     }
-    execute_test!(test_bootstrap_phase2_read, &opts, &transport);
-    execute_test!(test_bootstrap_watchdog_check, &opts, &transport);
+    execute_test!(test_bootstrap_phase2_read, &transport);
+    execute_test!(test_bootstrap_watchdog_check, &transport);
 
     Ok(())
 }
diff --git a/sw/host/tests/rom/e2e_bootstrap_rma/BUILD b/sw/host/tests/rom/e2e_bootstrap_rma/BUILD
index 70a7fa03e2d01..d22fbb59d737e 100644
--- a/sw/host/tests/rom/e2e_bootstrap_rma/BUILD
+++ b/sw/host/tests/rom/e2e_bootstrap_rma/BUILD
@@ -13,12 +13,12 @@ rust_binary(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:num_enum",
-        "//third_party/rust/crates:regex",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:num_enum",
+        "@crate_index//:regex",
     ],
 )
 
@@ -29,12 +29,12 @@ rust_test(
     ],
     deps = [
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:anyhow",
-        "//third_party/rust/crates:clap",
-        "//third_party/rust/crates:humantime",
-        "//third_party/rust/crates:log",
-        "//third_party/rust/crates:num_enum",
-        "//third_party/rust/crates:regex",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:num_enum",
+        "@crate_index//:regex",
     ],
 )
 
diff --git a/sw/host/tests/rom/e2e_bootstrap_rma/src/main.rs b/sw/host/tests/rom/e2e_bootstrap_rma/src/main.rs
index b84ac895f578c..673fc07c8c617 100644
--- a/sw/host/tests/rom/e2e_bootstrap_rma/src/main.rs
+++ b/sw/host/tests/rom/e2e_bootstrap_rma/src/main.rs
@@ -12,11 +12,11 @@ use std::io;
 use std::iter;
 use std::time::Duration;
 
-use anyhow::{bail, Context};
+use anyhow::{Context, bail};
 use clap::Parser;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::chip::boolean::MultiBitBool8;
 use opentitanlib::dif::lc_ctrl::{
     DifLcCtrlState, DifLcCtrlToken, LcCtrlReg, LcCtrlStatus, LcCtrlTransitionCmd,
@@ -49,7 +49,7 @@ fn main() -> anyhow::Result<()> {
         .init_target()
         .context("failed to initialise target")?;
 
-    execute_test!(test_no_rma_command, &opts, &transport);
+    execute_test!(test_no_rma_command, &transport);
     execute_test!(test_rma_command, &opts, &transport);
 
     Ok(())
@@ -60,7 +60,7 @@ fn main() -> anyhow::Result<()> {
 /// Verifies that the ROM times out on spin cycles, automatically resets the
 /// device, and logs the expected reset reasons. Does not issue the life cycle
 /// RMA command.
-fn test_no_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result<()> {
+fn test_no_rma_command(transport: &TransportWrapper) -> anyhow::Result<()> {
     let uart = transport.uart("console").context("failed to get UART")?;
 
     let rma_bootstrap_strapping = transport.pin_strapping("RMA_BOOTSTRAP")?;
@@ -70,7 +70,7 @@ fn test_no_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Res
         .context("failed to apply RMA_BOOTSTRAP strapping")?;
 
     transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
+        .reset(UartRx::Clear)
         .context("failed to reset target")?;
 
     // Remove the RMA_BOOTSTRAP strapping to bring the device out of the RMA spin loop.
@@ -126,7 +126,7 @@ fn test_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result
         .context("failed to apply PINMUX_TAP_LC strapping")?;
 
     transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
+        .reset(UartRx::Clear)
         .context("failed to reset target")?;
 
     log::info!("Connecting to JTAG interface");
@@ -252,7 +252,7 @@ fn test_rma_command(opts: &Opts, transport: &TransportWrapper) -> anyhow::Result
     let uart = transport.uart("console").context("failed to get console")?;
 
     transport
-        .reset_target(opts.init.bootstrap.options.reset_delay, true)
+        .reset(UartRx::Clear)
         .context("failed to reset target")?;
 
     let rma_state = DifLcCtrlState::Rma.redundant_encoding();
diff --git a/sw/host/tests/rom/e2e_chip_specific_startup/src/main.rs b/sw/host/tests/rom/e2e_chip_specific_startup/src/main.rs
index c47f1c402817d..42f9ceff66dee 100644
--- a/sw/host/tests/rom/e2e_chip_specific_startup/src/main.rs
+++ b/sw/host/tests/rom/e2e_chip_specific_startup/src/main.rs
@@ -13,7 +13,7 @@ use opentitanlib::test_utils::e2e_command::TestCommand;
 use opentitanlib::test_utils::epmp::constants::*;
 use opentitanlib::test_utils::epmp::{Epmp, EpmpAddressRange, EpmpEntry, EpmpRegionKind};
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::uart::console::UartConsole;
 use std::time::Duration;
 
@@ -64,7 +64,9 @@ fn check_jitter(opts: &Opts, cs: &ChipStartup) -> Result<()> {
         MultiBitBool4::True => assert_eq!(cs.jitter, true),
         _ => {
             if opts.otp_unprogrammed {
-                log::info!("CREATOR_SW_CFG_AST_JITTER_EN is neither True nor False:  Checking for jitter enabled.");
+                log::info!(
+                    "CREATOR_SW_CFG_AST_JITTER_EN is neither True nor False:  Checking for jitter enabled."
+                );
                 assert_eq!(cs.jitter, true)
             } else {
                 assert!(en.is_known_value());
@@ -322,7 +324,7 @@ fn test_chip_specific_startup(opts: &Opts, transport: &TransportWrapper) -> Resu
     let _ = UartConsole::wait_for(&*uart, r"Running [^\r\n]*", opts.timeout)?;
 
     TestCommand::ChipStartup.send(&*uart)?;
-    let response = ChipStartup::recv(&*uart, opts.timeout, false)?;
+    let response = ChipStartup::recv(&*uart, opts.timeout, false, false)?;
     log::info!("{:#x?}", response);
 
     check_ast(opts, &response)?;
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/BUILD b/sw/host/tests/rom/e2e_openocd_debug_test/BUILD
index e14cc18deab2d..9ead904a5b4a2 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/BUILD
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/BUILD
@@ -14,11 +14,11 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
 
@@ -30,11 +30,11 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
 
@@ -46,11 +46,11 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
 
@@ -62,11 +62,11 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
 
@@ -78,10 +78,10 @@ rust_binary(
     deps = [
         "//hw/top_earlgrey/sw/autogen/chip:top_earlgrey",
         "//sw/host/opentitanlib",
-        "//third_party/rust/crates:regex",
         "@crate_index//:anyhow",
         "@crate_index//:clap",
         "@crate_index//:humantime",
         "@crate_index//:log",
+        "@crate_index//:regex",
     ],
 )
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_interrupt_handler.rs b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_interrupt_handler.rs
index 2114b45634078..e623cf38f5237 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_interrupt_handler.rs
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_interrupt_handler.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::elf_debugger::ElfSymbols;
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -33,7 +33,7 @@ fn asm_interrupt_handler(opts: &Opts, transport: &TransportWrapper) -> Result<()
 
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let jtag = opts
         .init
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bark.rs b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bark.rs
index 3d078d875ad5c..5d3d742a22350 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bark.rs
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bark.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::elf_debugger::ElfSymbols;
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{JtagTap, RiscvGpr};
@@ -33,7 +33,7 @@ fn asm_watchdog_bark(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
 
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let jtag = opts
         .init
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bite.rs b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bite.rs
index 3640af94d39b7..5c22c21dbb065 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bite.rs
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/src/asm_watchdog_bite.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::elf_debugger::ElfSymbols;
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{JtagTap, RiscvGpr};
@@ -35,7 +35,7 @@ fn asm_watchdog_bite(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
 
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let jtag = opts
         .init
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/src/debug_test.rs b/sw/host/tests/rom/e2e_openocd_debug_test/src/debug_test.rs
index 6a265e4c3fc64..04c0350ff845a 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/src/debug_test.rs
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/src/debug_test.rs
@@ -9,7 +9,7 @@ use anyhow::Result;
 use clap::Parser;
 use regex::Regex;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::elf_debugger::{ElfSymbols, SymbolicAddress};
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::{JtagTap, RiscvCsr, RiscvGpr};
@@ -44,7 +44,7 @@ fn debug_test(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
 
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let uart = transport.uart("console")?;
 
diff --git a/sw/host/tests/rom/e2e_openocd_debug_test/src/shutdown_execution_asm.rs b/sw/host/tests/rom/e2e_openocd_debug_test/src/shutdown_execution_asm.rs
index c3d003132486f..973b3f029d9a8 100644
--- a/sw/host/tests/rom/e2e_openocd_debug_test/src/shutdown_execution_asm.rs
+++ b/sw/host/tests/rom/e2e_openocd_debug_test/src/shutdown_execution_asm.rs
@@ -8,7 +8,7 @@ use std::time::Duration;
 use anyhow::Result;
 use clap::Parser;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{TransportWrapper, UartRx};
 use opentitanlib::debug::elf_debugger::ElfSymbols;
 use opentitanlib::execute_test;
 use opentitanlib::io::jtag::JtagTap;
@@ -35,7 +35,7 @@ fn shutdown_execution_asm(opts: &Opts, transport: &TransportWrapper) -> Result<(
 
     // This test requires RV_DM access so first strap and reset.
     transport.pin_strapping("PINMUX_TAP_RISCV")?.apply()?;
-    transport.reset_target(opts.init.bootstrap.options.reset_delay, true)?;
+    transport.reset(UartRx::Clear)?;
 
     let jtag = opts
         .init
diff --git a/sw/host/tests/rom/sw_strap_value/src/main.rs b/sw/host/tests/rom/sw_strap_value/src/main.rs
index 3ae12727b630f..e8d1987df0681 100644
--- a/sw/host/tests/rom/sw_strap_value/src/main.rs
+++ b/sw/host/tests/rom/sw_strap_value/src/main.rs
@@ -3,14 +3,14 @@
 // SPDX-License-Identifier: Apache-2.0
 
 #![allow(clippy::bool_assert_comparison)]
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use clap::Parser;
 use opentitanlib::app::TransportWrapper;
 use opentitanlib::execute_test;
 use opentitanlib::io::gpio::{PinMode, PullMode};
 use opentitanlib::test_utils::e2e_command::TestCommand;
 use opentitanlib::test_utils::init::InitializeTest;
-use opentitanlib::test_utils::rpc::{UartRecv, UartSend};
+use opentitanlib::test_utils::rpc::{ConsoleRecv, ConsoleSend};
 use opentitanlib::test_utils::status::Status;
 use opentitanlib::uart::console::UartConsole;
 use std::time::Duration;
@@ -96,7 +96,7 @@ fn strap_pattern(value: u8) -> String {
         let v = (value >> (2 * i)) & 3;
         buf[2 - i] = bits[v as usize];
     }
-    return std::str::from_utf8(&buf).unwrap().into();
+    std::str::from_utf8(&buf).unwrap().into()
 }
 
 fn test_sw_strap_values(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
@@ -122,7 +122,7 @@ fn test_sw_strap_values(opts: &Opts, transport: &TransportWrapper) -> Result<()>
             sw_strap_set_verilator(transport, value)?;
         }
         TestCommand::SwStrapRead.send(&*uart)?;
-        let response = Status::recv(&*uart, opts.timeout, false)?;
+        let response = Status::recv(&*uart, opts.timeout, false, false)?;
         assert_eq!(value, u8::try_from(response)?);
     }
     Ok(())
diff --git a/sw/host/tests/rom_ext/device_status/BUILD b/sw/host/tests/rom_ext/device_status/BUILD
new file mode 100644
index 0000000000000..d5b166f8ee05e
--- /dev/null
+++ b/sw/host/tests/rom_ext/device_status/BUILD
@@ -0,0 +1,21 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "device_status",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+    ],
+)
diff --git a/sw/host/tests/rom_ext/device_status/src/main.rs b/sw/host/tests/rom_ext/device_status/src/main.rs
new file mode 100644
index 0000000000000..077aee6328681
--- /dev/null
+++ b/sw/host/tests/rom_ext/device_status/src/main.rs
@@ -0,0 +1,99 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+use anyhow::{Context, Result};
+use clap::Parser;
+use std::time::Duration;
+
+use opentitanlib::app::{TransportWrapper, UartRx};
+use opentitanlib::dif::lc_ctrl::{DifLcCtrlState, LcCtrlReg};
+use opentitanlib::execute_test;
+use opentitanlib::io::jtag::JtagTap;
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::test_utils::lc_transition;
+use opentitanlib::uart::console::UartConsole;
+use opentitanlib::util::parse_int::ParseInt;
+
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Duration of the reset pulse.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "60s")]
+    pub timeout: Duration,
+
+    /// Wait for regex from the console before reading status from JTAG.
+    #[arg(long)]
+    wait_for: String,
+
+    #[arg(long, value_parser = u32::from_str)]
+    rom_ext_version: u32,
+    #[arg(long, value_parser = u32::from_str)]
+    rom_ext_sec_version: u32,
+    #[arg(long, value_parser = u32::from_str)]
+    owner_fw_version: u32,
+    #[arg(long, value_parser = u32::from_str)]
+    device_status: u32,
+}
+
+fn check_device_status(opts: &Opts, transport: &TransportWrapper) -> Result<()> {
+    // Reset the chip, select the LC TAP, and connect to it.
+    transport.pin_strapping("PINMUX_TAP_LC")?.apply()?;
+    transport.reset(UartRx::Clear)?;
+    let mut jtag = opts
+        .init
+        .jtag_params
+        .create(transport)?
+        .connect(JtagTap::LcTap)?;
+
+    let uart = transport.uart("console").context("failed to get UART")?;
+    let _ = UartConsole::wait_for(&*uart, &opts.wait_for, opts.timeout)?;
+
+    let lc_state = jtag.read_lc_ctrl_reg(&LcCtrlReg::LcState)?;
+    let hw0 = jtag.read_lc_ctrl_reg(&LcCtrlReg::HwRevision0)?;
+    let hw1 = jtag.read_lc_ctrl_reg(&LcCtrlReg::HwRevision1)?;
+    log::info!(
+        "Hardware device {hw0:08x}:{hw1:02x} in lc_state {}({lc_state:08x})",
+        DifLcCtrlState::from_redundant_encoding(lc_state)?.lc_state_to_str()
+    );
+
+    lc_transition::claim_lc_mutex(&mut *jtag, true)?;
+    let rom_ext_version = jtag.read_lc_ctrl_reg(&LcCtrlReg::TransitionToken0)?;
+    let rom_ext_sec_version = jtag.read_lc_ctrl_reg(&LcCtrlReg::TransitionToken1)?;
+    let owner_fw_version = jtag.read_lc_ctrl_reg(&LcCtrlReg::TransitionToken2)?;
+    let device_status = jtag.read_lc_ctrl_reg(&LcCtrlReg::TransitionToken3)?;
+    lc_transition::claim_lc_mutex(&mut *jtag, false)?;
+
+    log::info!("rom_ext_version:     {rom_ext_version}");
+    log::info!("rom_ext_sec_version: {rom_ext_sec_version}");
+    log::info!("owner_fw_version:    {owner_fw_version}");
+    log::info!("device_status:       {device_status}");
+
+    assert_eq!(
+        opts.rom_ext_version, rom_ext_version,
+        "testing rom_ext_version"
+    );
+    assert_eq!(
+        opts.rom_ext_sec_version, rom_ext_sec_version,
+        "testing rom_ext_sec_version"
+    );
+    assert_eq!(
+        opts.owner_fw_version, owner_fw_version,
+        "testing owner_fw_version"
+    );
+    assert_eq!(opts.device_status, device_status, "testing device_status");
+
+    Ok(())
+}
+
+fn main() -> Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+    let transport = opts.init.init_target()?;
+
+    execute_test!(check_device_status, &opts, &transport);
+
+    Ok(())
+}
diff --git a/sw/host/tests/rom_ext/e2e_variation_interop/BUILD b/sw/host/tests/rom_ext/e2e_variation_interop/BUILD
new file mode 100644
index 0000000000000..4e36d67f17bca
--- /dev/null
+++ b/sw/host/tests/rom_ext/e2e_variation_interop/BUILD
@@ -0,0 +1,23 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_binary(
+    name = "e2e_variation_interop",
+    srcs = [
+        "src/main.rs",
+    ],
+    deps = [
+        "//sw/host/opentitanlib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+        "@crate_index//:humantime",
+        "@crate_index//:log",
+        "@crate_index//:num_enum",
+        "@crate_index//:regex",
+    ],
+)
diff --git a/sw/host/tests/rom_ext/e2e_variation_interop/src/main.rs b/sw/host/tests/rom_ext/e2e_variation_interop/src/main.rs
new file mode 100644
index 0000000000000..e7900b8b38301
--- /dev/null
+++ b/sw/host/tests/rom_ext/e2e_variation_interop/src/main.rs
@@ -0,0 +1,95 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//! ROM_EXT E2E Variation Interoperability test.
+//!
+//! This test harness checks that an CWT ROM_EXT can be booted on a chip before and after an X.509
+//! ROM_EXT can be booted, and vice versa. In both cases, CDI_* should be regenerated by the
+//! ROM_EXT seamlessly.
+
+use std::path::PathBuf;
+use std::time::Duration;
+
+use anyhow::{Context, anyhow};
+use clap::Parser;
+use regex::Regex;
+
+use opentitanlib::test_utils::init::InitializeTest;
+use opentitanlib::uart::console::{ExitStatus, UartConsole};
+
+/// CLI args for this test.
+#[derive(Debug, Parser)]
+struct Opts {
+    #[command(flatten)]
+    init: InitializeTest,
+
+    /// Second image (ROM_EXT + Owner FW bundle) to bootstrap.
+    #[arg(long)]
+    second_bootstrap: PathBuf,
+
+    /// Console receive timeout.
+    #[arg(long, value_parser = humantime::parse_duration, default_value = "30s")]
+    timeout: Duration,
+}
+
+fn main() -> anyhow::Result<()> {
+    let opts = Opts::parse();
+    opts.init.init_logging();
+
+    // Bootstrap first ROM_EXT + Owner FW.
+    let transport = opts.init.init_target()?;
+    let uart = transport.uart("console").context("failed to get UART")?;
+
+    // Wait for CDI_* update messags.
+    for i in 0..2 {
+        let _ = UartConsole::wait_for(
+            &*uart,
+            format!(r"warning: CDI_{:?} certificate not valid; updating", i).as_str(),
+            opts.timeout,
+        )?;
+    }
+
+    // Wait for pass message from first owner firmware stage.
+    let _ = UartConsole::wait_for(&*uart, r"PASS!", opts.timeout)?;
+
+    // Bootstrap second ROM_EXT + Owner FW.
+    opts.init
+        .bootstrap
+        .load(&transport, &opts.second_bootstrap)?;
+
+    // Wait for pass message from owner firmware stage.
+    let mut console = UartConsole {
+        timeout: Some(opts.timeout),
+        exit_success: Some(Regex::new(r"PASS.*\n")?),
+        exit_failure: Some(Regex::new(r"BFV.*\n")?),
+        newline: true,
+        ..Default::default()
+    };
+    let mut stdout = std::io::stdout();
+    let result = console.interact(&*uart, None, Some(&mut stdout))?;
+    match result {
+        ExitStatus::None | ExitStatus::CtrlC => Ok(()),
+        ExitStatus::Timeout => {
+            if console.exit_success.is_some() {
+                Err(anyhow!("Console timeout exceeded"))
+            } else {
+                Ok(())
+            }
+        }
+        ExitStatus::ExitSuccess => {
+            log::info!(
+                "ExitSuccess({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Ok(())
+        }
+        ExitStatus::ExitFailure => {
+            log::info!(
+                "ExitFailure({:?})",
+                console.captures(result).unwrap().get(0).unwrap().as_str()
+            );
+            Err(anyhow!("Matched exit_failure expression"))
+        }
+    }
+}
diff --git a/sw/host/tests/usbdev/usbdev_stream/build.sh b/sw/host/tests/usbdev/usbdev_stream/build.sh
index a120bacf02a4b..ea21f9c0f7df8 100755
--- a/sw/host/tests/usbdev/usbdev_stream/build.sh
+++ b/sw/host/tests/usbdev/usbdev_stream/build.sh
@@ -3,12 +3,12 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-g++ -Wall -Werror -std=c++14 -c -o stream_test.o -DSTREAMTEST_LIBUSB=1 stream_test.cc
-g++ -Wall -Werror -std=c++14 -c -o usbdev_iso.o -DSTREAMTEST_LIBUSB=1 usbdev_iso.cc
-g++ -Wall -Werror -std=c++14 -c -o usbdev_int.o -DSTREAMTEST_LIBUSB=1 usbdev_int.cc
-g++ -Wall -Werror -std=c++14 -c -o usbdev_serial.o -DSTREAMTEST_LIBUSB=1 usbdev_serial.cc
-g++ -Wall -Werror -std=c++14 -c -o usbdev_stream.o -DSTREAMTEST_LIBUSB=1 usbdev_stream.cc
-g++ -Wall -Werror -std=c++14 -c -o usbdev_utils.o -DSTREAMTEST_LIBUSB=1 usbdev_utils.cc
-g++ -Wall -Werror -std=c++14 -c -o usb_device.o -DSTREAMTEST_LIBUSB=1 usb_device.cc
+g++ -Wall -Werror -std=c++17 -c -o stream_test.o -DSTREAMTEST_LIBUSB=1 stream_test.cc
+g++ -Wall -Werror -std=c++17 -c -o usbdev_iso.o -DSTREAMTEST_LIBUSB=1 usbdev_iso.cc
+g++ -Wall -Werror -std=c++17 -c -o usbdev_int.o -DSTREAMTEST_LIBUSB=1 usbdev_int.cc
+g++ -Wall -Werror -std=c++17 -c -o usbdev_serial.o -DSTREAMTEST_LIBUSB=1 usbdev_serial.cc
+g++ -Wall -Werror -std=c++17 -c -o usbdev_stream.o -DSTREAMTEST_LIBUSB=1 usbdev_stream.cc
+g++ -Wall -Werror -std=c++17 -c -o usbdev_utils.o -DSTREAMTEST_LIBUSB=1 usbdev_utils.cc
+g++ -Wall -Werror -std=c++17 -c -o usb_device.o -DSTREAMTEST_LIBUSB=1 usb_device.cc
 
 g++ -g -O2 -o stream_test stream_test.o usbdev_iso.o usbdev_int.o usbdev_serial.o usbdev_stream.o usbdev_utils.o usb_device.o -lusb-1.0
diff --git a/sw/host/tests/usbdev/usbdev_stream/build_standalone.sh b/sw/host/tests/usbdev/usbdev_stream/build_standalone.sh
index 82557ff8b049c..868b0262ec225 100755
--- a/sw/host/tests/usbdev/usbdev_stream/build_standalone.sh
+++ b/sw/host/tests/usbdev/usbdev_stream/build_standalone.sh
@@ -3,4 +3,4 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-g++ -std=c++14 -Wall -Werror -g -O2 -o serial_test stream_test.cc usbdev_serial.cc usbdev_stream.cc usbdev_utils.cc usb_device.cc
+g++ -std=c++17 -Wall -Werror -g -O2 -o serial_test stream_test.cc usbdev_serial.cc usbdev_stream.cc usbdev_utils.cc usb_device.cc
diff --git a/sw/host/tests/usbdev/usbdev_stream/usb_device.cc b/sw/host/tests/usbdev/usbdev_stream/usb_device.cc
index 123c46c355518..4624eacfc4386 100644
--- a/sw/host/tests/usbdev/usbdev_stream/usb_device.cc
+++ b/sw/host/tests/usbdev/usbdev_stream/usb_device.cc
@@ -12,6 +12,11 @@
 
 #include "usbdev_utils.h"
 
+// Hub Class Feature Selectors (Table 11-17. USB 2.0 Protocol Specification)
+static constexpr unsigned PORT_SUSPEND = 2u;
+static constexpr unsigned PORT_RESET = 4u;
+static constexpr unsigned PORT_POWER = 8u;
+
 // Initialize USB access, with intent to use a device with the given properties.
 bool USBDevice::Init(uint16_t vendorID, uint16_t productID, uint8_t devAddress,
                      uint8_t busNumber) {
@@ -38,6 +43,10 @@ bool USBDevice::Init(uint16_t vendorID, uint16_t productID, uint8_t devAddress,
 bool USBDevice::Fin() {
   (void)Close();
 #if STREAMTEST_LIBUSB
+  if (parenth_) {
+    libusb_close(parenth_);
+    parenth_ = nullptr;
+  }
   libusb_exit(ctx_);
 #endif
   return true;
@@ -104,6 +113,19 @@ bool USBDevice::Open() {
               // identical devices visible but access permissions may restrict
               // which device(s) may be opened.
             } else {
+              // Obtain the parent
+              libusb_device *parent = libusb_get_parent(dev);
+              if (parent) {
+                rc = libusb_open(parent, &parenth_);
+                if (rc < 0) {
+                  std::cerr << "Failed to open parent device - "
+                            << libusb_error_name(rc) << std::endl;
+                  parenth_ = nullptr;
+                } else {
+                  std::cout << "Opened parent\n";
+                }
+              }
+
               // Obtain the list of port numbers; required for suspend/resume.
               uint8_t bus = libusb_get_bus_number(dev);
               if (verbose_) {
@@ -123,6 +145,8 @@ bool USBDevice::Open() {
                     std::cout << '.';
                     devPath_ += '.';
                   }
+                  // TODO:
+                  portNumber_ = ports[idx];
                 }
                 std::cout << std::endl;
               } else {
@@ -214,6 +238,30 @@ bool USBDevice::Service() {
   return true;
 }
 
+// Return the name of a test phase
+const char *USBDevice::PhaseName(usbdev_suspend_phase_t phase) {
+  switch (phase) {
+    case kSuspendPhaseSuspend:
+      return "Suspend";
+    case kSuspendPhaseSleepResume:
+      return "SleepResume";
+    case kSuspendPhaseSleepReset:
+      return "SleepReset";
+    case kSuspendPhaseSleepDisconnect:
+      return "SleepDisconnect";
+    case kSuspendPhaseDeepResume:
+      return "DeepResume";
+    case kSuspendPhaseDeepReset:
+      return "DeepReset";
+    case kSuspendPhaseDeepDisconnect:
+      return "DeepDisconnect";
+    case kSuspendPhaseShutdown:
+      return "Shutdown";
+    default:
+      return "<Unknown>";
+  }
+}
+
 bool USBDevice::ReadTestDesc() {
   std::cout << "Reading Test Descriptor" << std::endl;
 
@@ -257,12 +305,19 @@ bool USBDevice::ReadTestDesc() {
                 << (int)dp[11] << std::dec << std::endl;
     }
 
+    // Although we needn't retain the test number, having checked it, the test
+    // phase does vary and determines the actions we must perform.
+    testPhase_ = (usbdev_suspend_phase_t)dp[8];
+
     // Retain the test number and the test arguments.
     testNumber_ = testNum;
     testArg_[0] = dp[8];
     testArg_[1] = dp[9];
     testArg_[2] = dp[10];
     testArg_[3] = dp[11];
+
+    std::cout << "Test number: " << testNum << " Test Phase: "
+              << PhaseName((usbdev_suspend_phase_t)testArg_[0]) << std::endl;
     return true;
   }
 
@@ -281,46 +336,128 @@ bool USBDevice::ReadTestDesc() {
 #endif
 }
 
-bool USBDevice::Suspend() {
-  std::cout << "Suspending Device " << devPath_ << std::endl;
+bool USBDevice::Delay(uint32_t time_us, bool with_traffic) {
+  while (time_us > 0) {
+    uint32_t delay_us = time_us;
+    if (verbose_) {
+      std::cout << "Delaying " << time_us << "us "
+                << (with_traffic ? " - with traffic" : "no traffic")
+                << std::endl;
+    }
+    if (with_traffic) {
+      delay_us = 1000u;
+      // Service streams
+    }
+    usleep(delay_us);
+    time_us -= delay_us;
+  }
+  return true;
+}
 
-  // We need to relinquish our access to the device otherwise the kernel
-  // will refuse to autosuspend the device!
-  Close();
+bool USBDevice::Reset() {
+  std::cout << "Resetting Device" << std::endl;
 
-  std::string powerPath = "/sys/bus/usb/devices/" + devPath_ + "/power/";
-  std::string filename = powerPath + "autosuspend_delay_ms";
+  // We need to forget the device address in the event of a Bus Reset
+  // because it will be assigned a new address.
+  addrSpec_ = 0u;
 
-  int fd = open(filename.c_str(), O_WRONLY);
-  if (fd < 0) {
-    std::cerr << "Failed to open '" << filename << "'" << std::endl;
-    std::cerr << "  (Note: this requires super user permissions)" << std::endl;
-    return false;
-  }
-  int rc = write(fd, "0", 1);
-  if (rc < 0) {
-    std::cerr << "Write failed" << std::endl;
-  }
-  rc = close(fd);
-  if (rc < 0) {
-    std::cerr << "Close failed" << std::endl;
-  }
+  if (parenth_) {
+    // Use the hub to reset the device.
+    const uint8_t bmRequestType = LIBUSB_ENDPOINT_OUT |
+                                  LIBUSB_REQUEST_TYPE_CLASS |
+                                  LIBUSB_RECIPIENT_OTHER;
+    if (verbose_) {
+      std::cout << "Resetting port " << portNumber_ << std::endl;
+    }
 
-  // Enable auto-suspend behavior.
-  filename = powerPath + "control";
-  fd = open(filename.c_str(), O_WRONLY);
-  if (fd < 0) {
-    std::cerr << "Failed to open '" << filename << "'" << std::endl;
-    std::cerr << "  (Note: this requires super user permissions)" << std::endl;
-    return false;
-  }
-  rc = write(fd, "auto", 4);
-  if (rc < 0) {
-    std::cerr << "Write failed" << std::endl;
+    int rc = libusb_control_transfer(parenth_, bmRequestType,
+                                     LIBUSB_REQUEST_SET_FEATURE, PORT_RESET,
+                                     portNumber_, NULL, 0u, 0u);
+    if (rc) {
+      std::cerr << "Failed to reset device - " << libusb_error_name(rc)
+                << std::endl;
+      return false;
+    }
+    if (verbose_) {
+      std::cout << "Done port reset" << std::endl;
+    }
+  } else {
+    if (!Open()) {
+      return false;
+    }
+
+    int rc = libusb_reset_device(devh_);
+    if (rc < 0) {
+      return false;
+    }
   }
-  rc = close(fd);
-  if (rc < 0) {
-    std::cerr << "Close failed" << std::endl;
+  return true;
+}
+
+bool USBDevice::Suspend() {
+  std::cout << "Suspending Device " << devPath_ << std::endl;
+
+  if (parenth_) {
+    // Use the hub to suspend the device.
+    const uint8_t bmRequestType = LIBUSB_ENDPOINT_OUT |
+                                  LIBUSB_REQUEST_TYPE_CLASS |
+                                  LIBUSB_RECIPIENT_OTHER;
+    if (verbose_) {
+      std::cout << "Suspending port " << portNumber_ << std::endl;
+    }
+
+    int rc = libusb_control_transfer(parenth_, bmRequestType,
+                                     LIBUSB_REQUEST_SET_FEATURE, PORT_SUSPEND,
+                                     portNumber_, NULL, 0u, 0u);
+    if (rc) {
+      std::cerr << "Failed to suspend device - " << libusb_error_name(rc)
+                << std::endl;
+      return false;
+    }
+    if (verbose_) {
+      std::cout << "Done suspend" << std::endl;
+    }
+  } else {
+    // We need to relinquish our access to the device otherwise the kernel
+    // will refuse to autosuspend the device!
+    Close();
+
+    std::string powerPath = "/sys/bus/usb/devices/" + devPath_ + "/power/";
+    std::string filename = powerPath + "autosuspend_delay_ms";
+
+    int fd = open(filename.c_str(), O_WRONLY);
+    if (fd < 0) {
+      std::cerr << "Failed to open '" << filename << "'" << std::endl;
+      std::cerr << "  (Note: this requires super user permissions)"
+                << std::endl;
+      return false;
+    }
+    int rc = write(fd, "0", 1);
+    if (rc < 0) {
+      std::cerr << "Write failed" << std::endl;
+    }
+    rc = close(fd);
+    if (rc < 0) {
+      std::cerr << "Close failed" << std::endl;
+    }
+
+    // Enable auto-suspend behavior.
+    filename = powerPath + "control";
+    fd = open(filename.c_str(), O_WRONLY);
+    if (fd < 0) {
+      std::cerr << "Failed to open '" << filename << "'" << std::endl;
+      std::cerr << "  (Note: this requires super user permissions)"
+                << std::endl;
+      return false;
+    }
+    rc = write(fd, "auto", 4);
+    if (rc < 0) {
+      std::cerr << "Write failed" << std::endl;
+    }
+    rc = close(fd);
+    if (rc < 0) {
+      std::cerr << "Close failed" << std::endl;
+    }
   }
 
   SetState(StateSuspending);
@@ -330,35 +467,116 @@ bool USBDevice::Suspend() {
 bool USBDevice::Resume() {
   std::cout << "Resuming Device" << std::endl;
 
-  std::string powerPath = "/sys/bus/usb/devices/" + devPath_ + "/power/";
-  std::string filename = powerPath + "control";
+  if (parenth_) {
+    // Use the hub to suspend the device.
+    const uint8_t bmRequestType = LIBUSB_ENDPOINT_OUT |
+                                  LIBUSB_REQUEST_TYPE_CLASS |
+                                  LIBUSB_RECIPIENT_OTHER;
+    if (verbose_) {
+      std::cout << "Resuming port " << portNumber_ << std::endl;
+    }
 
-  int fd = open(filename.c_str(), O_WRONLY);
-  if (fd < 0) {
-    std::cerr << "Failed to open '" << filename << "'" << std::endl;
-    return false;
-  }
-  int rc = write(fd, "on", 2);
-  if (rc < 0) {
-    std::cerr << "Write failed" << std::endl;
+    int rc = libusb_control_transfer(parenth_, bmRequestType,
+                                     LIBUSB_REQUEST_CLEAR_FEATURE, PORT_SUSPEND,
+                                     portNumber_, NULL, 0u, 0u);
+    if (rc) {
+      std::cerr << "Failed to resume device - " << libusb_error_name(rc)
+                << std::endl;
+      return false;
+    }
+    if (verbose_) {
+      std::cout << "Done resume" << std::endl;
+    }
+  } else {
+    std::string powerPath = "/sys/bus/usb/devices/" + devPath_ + "/power/";
+    std::string filename = powerPath + "control";
+
+    int fd = open(filename.c_str(), O_WRONLY);
+    if (fd < 0) {
+      std::cerr << "Failed to open '" << filename << "'" << std::endl;
+      return false;
+    }
+    int rc = write(fd, "on", 2);
+    if (rc < 0) {
+      std::cerr << "Write failed" << std::endl;
+    }
+    close(fd);
+
+    if (!Open()) {
+      return false;
+    }
   }
-  close(fd);
 
-  if (!Open()) {
+  SetState(StateResuming);
+  return true;
+}
+
+// Note: The Rust harness uses VBUS_SENSE_EN on the HyperDebug board
+// (non-portable) to achieve connect and disconnect functionality, which we
+// cannot achieve with regular hubs.
+//
+// Instead what happens with the available hub(s) is that all USB traffic
+// to/from the USB ceases but the bus remains Idle/Suspended and VBUS remains
+// asserted. Reconnect and the result is Reset Signaling and reconfiguration.
+
+bool USBDevice::Connect() {
+  std::cout << "Connecting Device " << devPath_ << std::endl;
+
+  if (parenth_) {
+    // Use the hub to suspend the device.
+    const uint8_t bmRequestType = LIBUSB_ENDPOINT_OUT |
+                                  LIBUSB_REQUEST_TYPE_CLASS |
+                                  LIBUSB_RECIPIENT_OTHER;
+    if (verbose_) {
+      std::cout << "Connecting port " << portNumber_ << std::endl;
+    }
+
+    int rc = libusb_control_transfer(parenth_, bmRequestType,
+                                     LIBUSB_REQUEST_SET_FEATURE, PORT_POWER,
+                                     portNumber_, NULL, 0u, 0u);
+    if (rc) {
+      std::cerr << "Failed to connect device - " << libusb_error_name(rc)
+                << std::endl;
+      return false;
+    }
+    if (verbose_) {
+      std::cout << "Done connect" << std::endl;
+    }
+  } else {
+    std::cout << "Connect operation not available" << std::endl;
     return false;
   }
 
-  SetState(StateResuming);
   return true;
 }
 
 bool USBDevice::Disconnect() {
-  // TODO: Are we able to implement a Disconnect/Reconnect function here?
-  //       Most hubs do not have the capacity to power cycle an individual
-  //       port.
-  //
-  // Power Off
-  // Power On
+  std::cout << "Disconnecting Device " << devPath_ << std::endl;
 
-  return false;
+  if (parenth_) {
+    // Use the hub to suspend the device.
+    const uint8_t bmRequestType = LIBUSB_ENDPOINT_OUT |
+                                  LIBUSB_REQUEST_TYPE_CLASS |
+                                  LIBUSB_RECIPIENT_OTHER;
+    if (verbose_) {
+      std::cout << "Disconnecting port " << portNumber_ << std::endl;
+    }
+
+    int rc = libusb_control_transfer(parenth_, bmRequestType,
+                                     LIBUSB_REQUEST_CLEAR_FEATURE, PORT_POWER,
+                                     portNumber_, NULL, 0u, 0u);
+    if (rc) {
+      std::cerr << "Failed to disconnect device - " << libusb_error_name(rc)
+                << std::endl;
+      return false;
+    }
+    if (verbose_) {
+      std::cout << "Done disconnect" << std::endl;
+    }
+  } else {
+    std::cout << "Disconnect operation not available" << std::endl;
+    return false;
+  }
+
+  return true;
 }
diff --git a/sw/host/tests/usbdev/usbdev_stream/usb_device.h b/sw/host/tests/usbdev/usbdev_stream/usb_device.h
index 5cbb915ebe1f4..23b7ecb6c2370 100644
--- a/sw/host/tests/usbdev/usbdev_stream/usb_device.h
+++ b/sw/host/tests/usbdev/usbdev_stream/usb_device.h
@@ -15,14 +15,18 @@
 class USBDevice {
  public:
 #if STREAMTEST_LIBUSB
-  USBDevice(bool verbose = false)
+  USBDevice(bool verbose = false, bool manual = false)
       : verbose_(verbose),
+        manual_(manual),
         state_(StateStreaming),
         ctx_(nullptr),
         devh_(nullptr) {}
 #else
-  USBDevice(bool verbose = false)
-      : verbose_(verbose), state_(StateStreaming), devh_(false) {}
+  USBDevice(bool verbose = false, bool manual = false)
+      : verbose_(verbose),
+        manual_(manual),
+        state_(StateStreaming),
+        devh_(false) {}
 #endif
 
   // Device states.
@@ -33,6 +37,50 @@ class USBDevice {
     StateResuming
   };
 
+  /**
+   * Test phases; named according to the event that we are expecting to occur.
+   */
+  typedef enum {
+    /**
+     * First test phase just tests regular Suspend/Resume signaling; after we've
+     * resumed, we expect a Bus Reset from the DPI/Host.
+     */
+    kSuspendPhaseSuspend = 0u,
+    /**
+     * This test phase instructs the DPI model to put the DUT into Suspend long
+     * enough that this software will attempt to put the device into its Normal
+     * Sleep state and exercise the AON/Wakeup module, stopping the clocks but
+     * not powering down.
+     */
+    kSuspendPhaseSleepResume,
+    /*
+     * The AON/Wakeup module will cause us to awaken in response to a bus reset.
+     */
+    kSuspendPhaseSleepReset,
+    /**
+     * As above, but this time we're expecting a VBUS/SENSE loss.
+     */
+    kSuspendPhaseSleepDisconnect,
+    /**
+     * Mirrors Resume detection for normal sleep, but this time we enter Deep
+     * Sleep and the power is removed too.
+     */
+    kSuspendPhaseDeepResume,
+    /**
+     * Mirrors Bus Reset detection for normal sleep, but this time we enter Deep
+     * Sleep and the power is removed too.
+     */
+    kSuspendPhaseDeepReset,
+    /**
+     * As above, but this time we're expecting a VBUS/SENSE loss.
+     */
+    kSuspendPhaseDeepDisconnect,
+    /**
+     * Final phase; shut down.
+     */
+    kSuspendPhaseShutdown,
+  } usbdev_suspend_phase_t;
+
   // DPI test numbers.
   typedef enum usb_testutils_test_number {
     kUsbTestNumberSmoke = 0,
@@ -243,7 +291,33 @@ class USBDevice {
     return libusb_cancel_transfer(xfr);
   }
 #endif
-
+  /**
+   * Is test progress being directed/controlled manually?
+   */
+  inline bool ManualControl() const { return manual_; }
+  /**
+   * Returns the current phase of the test
+   */
+  inline usbdev_suspend_phase_t TestPhase() const { return testPhase_; }
+  /**
+   * Returns microseconds corresponding to the given number of bus frame delays.
+   */
+  static inline uint32_t TimeFrames(unsigned frames) { return frames * 1000u; }
+  /**
+   * Delay for at least the requested number of microseconds (wall time);
+   * this is important in ensuring the appropriate time intervals (eg. Resume
+   * Signaling) are met.
+   *
+   * For verbose reporting, the also indicates whether traffic is expected, and
+   * may be visually paired up with any device-side logging or logic analyzer
+   * traces.
+   *
+   * @param time_us      Minimum time delay, in microseconds.
+   * @param with_traffic Indicates whether USB traffic is expected during this
+   * time.
+   * @return true iff delayed without error
+   */
+  bool Delay(uint32_t time_us, bool with_traffic = true);
   /**
    * Read Test Descriptor from the DUT using a Vendor-Specific command.
    *
@@ -283,11 +357,24 @@ class USBDevice {
    */
   bool Resume();
   /**
-   * Disconnect and reconnect device.
+   * Connect device to the USB.
+   *
+   * @param true iff the operation was succesful.
+   */
+  bool Connect();
+  /**
+   * Disconnect device from the USB.
    *
    * @param true iff the operation was succesful.
    */
   bool Disconnect();
+  /**
+   * Return the textual name of the specified test phase.
+   *
+   * @param  phase     Test phase.
+   * @return           Textual name.
+   */
+  static const char *PhaseName(usbdev_suspend_phase_t phase);
   /**
    * Returns the current state of the device.
    *
@@ -305,6 +392,9 @@ class USBDevice {
   // Verbose logging/reporting.
   bool verbose_;
 
+  // Test phases/behavior are being directed/controlled manually.
+  bool manual_;
+
   // Current device state.
   USBDevState state_;
 
@@ -330,6 +420,10 @@ class USBDevice {
   // Device handle.
   libusb_device_handle *devh_;
 
+  // Parent device handler.
+  libusb_device_handle *parenth_;
+  int portNumber_;
+
   // Device descriptor.
   libusb_device_descriptor devDesc_;
 #else
@@ -340,6 +434,9 @@ class USBDevice {
   // Device path (bus number - ports numbers).
   std::string devPath_;
 
+  // Current phase within the Suspend-Sleep-Wakeup-Resume testing sequence.
+  usbdev_suspend_phase_t testPhase_;
+
   usb_testutils_test_number_t testNumber_;
 
   uint8_t testArg_[4];
diff --git a/sw/host/tests/xmodem/BUILD b/sw/host/tests/xmodem/BUILD
index 9902c95ff3bea..24685f615bb24 100644
--- a/sw/host/tests/xmodem/BUILD
+++ b/sw/host/tests/xmodem/BUILD
@@ -3,7 +3,7 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@rules_rust//rust:defs.bzl", "rust_library", "rust_test")
-load("@rules_rust//bindgen:bindgen.bzl", "rust_bindgen_library")
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_library")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -12,8 +12,8 @@ rust_bindgen_library(
     bindgen_flags = [
         "--allowlist-function=xmodem_.*",
     ],
-    cc_lib = "//sw/device/silicon_creator/lib:xmodem_testlib",
-    header = "//sw/device/silicon_creator/lib:xmodem_testlib.h",
+    cc_lib = "//sw/device/silicon_creator/lib/rescue:xmodem_testlib",
+    header = "//sw/device/silicon_creator/lib/rescue:xmodem_testlib.h",
     rustc_flags = [
         "--allow=non_snake_case",
         "--allow=non_upper_case_globals",
diff --git a/sw/host/tests/xmodem/xmodem.rs b/sw/host/tests/xmodem/xmodem.rs
index 19b12dda6d887..17f6ddd8c64fe 100644
--- a/sw/host/tests/xmodem/xmodem.rs
+++ b/sw/host/tests/xmodem/xmodem.rs
@@ -9,7 +9,7 @@
 use std::io::Write;
 use std::os::raw::c_void;
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 
 use opentitanlib::io::uart::Uart;
 use opentitanlib::with_unknown;
@@ -86,6 +86,7 @@ impl XmodemFirmware {
                     io,
                     frame,
                     buf.as_mut_ptr(),
+                    buf.len(),
                     &mut rxlen as *mut usize,
                     &mut unknown_rx as *mut u8,
                 ))
@@ -125,7 +126,7 @@ impl XmodemFirmware {
 ///
 /// * `iohandle` must be a valid reference to a `dyn Uart` trait object.
 /// * `data` must be valid for `len` bytes.
-#[no_mangle]
+#[unsafe(no_mangle)]
 unsafe extern "C" fn xmodem_read(
     iohandle: *mut c_void,
     data: *mut u8,
@@ -155,7 +156,7 @@ unsafe extern "C" fn xmodem_read(
 ///
 /// * `iohandle` must be a valid reference to a `dyn Uart` trait object.
 /// * `data` must be valid for `len` bytes.
-#[no_mangle]
+#[unsafe(no_mangle)]
 unsafe extern "C" fn xmodem_write(iohandle: *mut c_void, data: *const u8, len: usize) {
     // SAFETY:
     // We know that the `iohandle` pointer is a valid reference to a `Uart`
diff --git a/sw/host/tpm2_test_server/src/interface.rs b/sw/host/tpm2_test_server/src/interface.rs
index 022e051627f17..7b130d31865fa 100644
--- a/sw/host/tpm2_test_server/src/interface.rs
+++ b/sw/host/tpm2_test_server/src/interface.rs
@@ -2,7 +2,7 @@
 // Licensed under the Apache License, Version 2.0, see LICENSE for details.
 // SPDX-License-Identifier: Apache-2.0
 
-use anyhow::{anyhow, Result};
+use anyhow::{Result, anyhow};
 use mio::net::TcpStream;
 use num_enum::TryFromPrimitive;
 use opentitanlib::tpm::Driver;
diff --git a/sw/otbn/crypto/BUILD b/sw/otbn/crypto/BUILD
index 7033477d43878..29cb9c76aa9ee 100644
--- a/sw/otbn/crypto/BUILD
+++ b/sw/otbn/crypto/BUILD
@@ -103,6 +103,13 @@ otbn_library(
     ],
 )
 
+otbn_library(
+    name = "p256_isoncurve_proj",
+    srcs = [
+        "p256_isoncurve_proj.s",
+    ],
+)
+
 otbn_library(
     name = "p256_sign",
     srcs = [
@@ -118,25 +125,15 @@ otbn_library(
 )
 
 otbn_binary(
-    name = "p256_ecdh",
+    name = "run_p256",
     srcs = [
-        "p256_ecdh.s",
+        "run_p256.s",
     ],
     deps = [
         ":p256_base",
         ":p256_isoncurve",
+        ":p256_isoncurve_proj",
         ":p256_shared_key",
-    ],
-)
-
-otbn_binary(
-    name = "p256_ecdsa",
-    srcs = [
-        "p256_ecdsa.s",
-    ],
-    deps = [
-        ":p256_base",
-        ":p256_isoncurve",
         ":p256_sign",
         ":p256_verify",
     ],
@@ -170,6 +167,20 @@ otbn_library(
     ],
 )
 
+otbn_library(
+    name = "p384_isoncurve_proj",
+    srcs = [
+        "p384_isoncurve_proj.s",
+    ],
+)
+
+otbn_library(
+    name = "p384_mem",
+    srcs = [
+        "p384_mem.s",
+    ],
+)
+
 otbn_library(
     name = "p384_sign",
     srcs = [
@@ -227,31 +238,16 @@ otbn_library(
 )
 
 otbn_library(
-    name = "primality",
+    name = "rsa_primality",
     srcs = [
-        "primality.s",
-    ],
-)
-
-otbn_binary(
-    name = "rsa",
-    srcs = [
-        "rsa.s",
-    ],
-    deps = [
-        ":modexp",
-        ":montmul",
+        "rsa_primality.s",
     ],
 )
 
-otbn_binary(
-    name = "run_rsa_modexp",
+otbn_library(
+    name = "run_rsa_mem",
     srcs = [
-        "run_rsa_modexp.s",
-    ],
-    deps = [
-        ":modexp",
-        ":montmul",
+        "run_rsa_mem.s",
     ],
 )
 
@@ -262,70 +258,56 @@ otbn_library(
     ],
 )
 
-otbn_binary(
-    name = "run_rsa_keygen",
-    srcs = [
-        "run_rsa_keygen.s",
-    ],
-    deps = [
-        ":div",
-        ":gcd",
-        ":lcm",
-        ":montmul",
-        ":mul",
-        ":primality",
-        ":rsa_keygen",
-    ],
-)
-
 otbn_library(
-    name = "rsa_verify",
+    name = "rsa_modinv_f4",
     srcs = [
-        "rsa_verify.s",
+        "rsa_modinv_f4.s",
     ],
 )
 
-otbn_library(
-    name = "rsa_verify_3072",
+otbn_binary(
+    name = "run_rsa",
     srcs = [
-        "//sw/vendor:veri-titan/gen/otbn_modexp.s",
+        "gcd.s",
+        "modexp.s",
+        "montmul.s",
+        "mul.s",
+        "rsa_keygen.s",
+        "rsa_modinv_f4.s",
+        "rsa_primality.s",
+        "run_rsa.s",
+        "run_rsa_mem.s",
     ],
 )
 
 otbn_library(
-    name = "rsa_verify_3072_m0inv",
+    name = "run_rsa_key_from_cofactor_mem",
     srcs = [
-        "rsa_verify_3072_m0inv.s",
+        "run_rsa_key_from_cofactor_mem.s",
     ],
 )
 
 otbn_library(
-    name = "rsa_verify_3072_rr",
-    srcs = [
-        "rsa_verify_3072_rr.s",
-    ],
-)
-
-otbn_binary(
-    name = "run_rsa_verify_3072",
+    name = "rsa_key_from_cofactor",
     srcs = [
-        "run_rsa_verify_3072.s",
-    ],
-    deps = [
-        ":rsa_verify_3072",
-        ":rsa_verify_3072_m0inv",
-        ":rsa_verify_3072_rr",
+        "rsa_key_from_cofactor.s",
     ],
 )
 
 otbn_binary(
-    name = "run_rsa_verify_3072_rr_modexp",
+    name = "run_rsa_key_from_cofactor",
     srcs = [
-        "run_rsa_verify_3072_rr_modexp.s",
+        "run_rsa_key_from_cofactor.s",
     ],
     deps = [
-        ":rsa_verify_3072",
-        ":rsa_verify_3072_rr",
+        ":div",
+        ":gcd",
+        ":lcm",
+        ":montmul",
+        ":mul",
+        ":rsa_key_from_cofactor",
+        ":rsa_modinv_f4",
+        ":run_rsa_key_from_cofactor_mem",
     ],
 )
 
@@ -349,6 +331,7 @@ otbn_binary(
     ],
     deps = [
         ":p256_base",
+        ":p256_isoncurve",
     ],
 )
 
@@ -359,6 +342,7 @@ otbn_binary(
     ],
     deps = [
         ":p256_base",
+        ":p256_isoncurve",
     ],
 )
 
@@ -370,26 +354,17 @@ otbn_binary(
     deps = [
         ":p384_base",
         ":p384_internal_mult",
+        ":p384_isoncurve",
+        ":p384_mem",
         ":p384_modinv",
         ":p384_sign",
     ],
 )
 
 otbn_binary(
-    name = "p384_curve_point_valid",
-    srcs = [
-        "p384_curve_point_valid.s",
-    ],
-    deps = [
-        ":p384_base",
-        ":p384_isoncurve",
-    ],
-)
-
-otbn_binary(
-    name = "p384_ecdh",
+    name = "run_p384",
     srcs = [
-        "p384_ecdh.s",
+        "run_p384.s",
     ],
     deps = [
         ":p384_a2b",
@@ -397,54 +372,14 @@ otbn_binary(
         ":p384_base",
         ":p384_base_mult",
         ":p384_internal_mult",
+        ":p384_isoncurve",
+        ":p384_isoncurve_proj",
         ":p384_keygen",
         ":p384_keygen_from_seed",
-        ":p384_scalar_mult",
-    ],
-)
-
-otbn_binary(
-    name = "p384_ecdsa_keygen",
-    srcs = [
-        "p384_ecdsa_keygen.s",
-    ],
-    deps = [
-        ":p384_b2a",
-        ":p384_base",
-        ":p384_base_mult",
-        ":p384_internal_mult",
-        ":p384_keygen",
-        ":p384_keygen_from_seed",
-    ],
-)
-
-otbn_binary(
-    name = "p384_ecdsa_sign",
-    srcs = [
-        "p384_ecdsa_sign.s",
-    ],
-    deps = [
-        ":p384_b2a",
-        ":p384_base",
-        ":p384_base_mult",
-        ":p384_internal_mult",
-        ":p384_keygen",
-        ":p384_keygen_from_seed",
+        ":p384_mem",
         ":p384_modinv",
+        ":p384_scalar_mult",
         ":p384_sign",
-    ],
-)
-
-otbn_binary(
-    name = "p384_ecdsa_verify",
-    srcs = [
-        "p384_ecdsa_verify.s",
-    ],
-    deps = [
-        ":p384_base",
-        ":p384_base_mult",
-        ":p384_internal_mult",
-        ":p384_modinv",
         ":p384_verify",
     ],
 )
diff --git a/sw/otbn/crypto/boot.s b/sw/otbn/crypto/boot.s
index f48fc51c02c65..3e0261657184a 100644
--- a/sw/otbn/crypto/boot.s
+++ b/sw/otbn/crypto/boot.s
@@ -80,6 +80,7 @@ start:
   beq   x2, x3, attestation_key_save
 
   /* Invalid mode; fail. */
+start_failed:
   unimp
   unimp
   unimp
@@ -157,6 +158,18 @@ attestation_keygen:
   la        x22, y
   bn.sid    x2, 0(x22)
 
+  /* Compute both sides of the Weierstrauss equation.
+       w18 <= (x^3 + ax + b) mod p
+       w19 <= (y^2) mod p */
+  jal      x1, p256_isoncurve
+
+  /* Compare the two sides of the equation to check if the result
+     is a valid point as an FI countermeasure.
+     The check fails if both sides are not equal.
+     FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.cmp   w18, w19
+  jal      x1, trigger_fault_if_fg0_not_z
+
   ecall
 
 /**
diff --git a/sw/otbn/crypto/modexp.s b/sw/otbn/crypto/modexp.s
index fec8b142fca2a..b378bca7d5319 100644
--- a/sw/otbn/crypto/modexp.s
+++ b/sw/otbn/crypto/modexp.s
@@ -1,174 +1,443 @@
-/* Copyright lowRISC Contributors.
- * Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE.dcrypto file.
- *
- * Derived from code in
- * https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/cr50_stab/chip/g/dcrypto/dcrypto_bn.c
- */
-
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
 
 .text
 .globl modexp_65537
 .globl modexp
 
 /**
- * Conditionally overwrite bigint in dmem
+ * Constant-time, conditional swap of two general-purpose registers
  *
- * Depending on state of FG0.C overwrites a bigint in dmem with one from
- * a buffer in the wide reg file.
+ * This routine implements a conditional, constant-time, out-of-place swap of
+ * two values in GPR registers such that
  *
- * Flags: Does not set any flags, does not use flags except FG0.C
+ * Input:  GPR0(X), GPR1(Y)
+ * Output: GPR2(Y), GPR3(X) if b == 0 else GPR2(X), GPR3(Y)
  *
- * @param[in]  x21: dptr, pointer to first limb of bigint in dmem
- * @param[in]  x8: rptr, pointer to first limb of bigint in regfile buffer
- * @param[in]  FG.C: selection condition, overwrite dmem when FG0.C==1
- * @param[in]  x30: number of limbs
- * @param[in]  x9: pointer to temp reg, must be set to 3
- * @param[in]  x11: pointer to temp reg, must be set to 2
+ * It is a direct adaption of the masked conditional swap presented in
+ *
+ *   https://ieeexplore.ieee.org/document/9581247
  *
- * clobbered registers: x8, x21, w0, w2
- * clobbered Flag Groups: none
+ * @param[in]  x23: GPR0 containing value X
+ * @param[in]  x24: GPR1 containing value Y
+ * @param[in]  x14: a conditional bit b
+ * @param[out] x19: GPR2 containing either X or Y depending on b
+ * @param[out] x20: GPR3 containing either X or Y depending on b
+ *
+ * Clobbered registers: x17, x18
  */
-sel_sqr_or_sqrmul:
-  /* iterate over all limbs */
-  loop      x30, 4
-    /* load limb from dmem */
-    bn.lid    x9, 0(x21)
+cond_swap_gprs:
+  /*
+   * Calculate Boolean mask (0 - b) = 0 if b == 0 else 0xFFFF_FFFF
+   * Randomize the destination register to soften the impact of overwritting
+   * it with all 0s or all 1s:
+   *
+   *   d = (0 - b)
+   */
+  csrrs x17, URND, x0
+  sub   x17, x0, x14
+
+  /* z = (X ^ Y) & d. */
+  xor x18, x23, x24
+  and x18, x17, x18
+
+  /* Sample a random mask r and XOR it to the intermediate result: z = z ^ r. */
+  csrrs x17, URND, x0
+  xor x18, x17, x18
+
+  /*
+   * Calculate the value of the output registers:
+   *
+   *   GPR2 = (z ^ X) ^ r
+   *   GPR3 = (z ^ Y) ^ r
+   */
+  xor x19, x18, x23
+  xor x19, x17, x19
+  xor x20, x18, x24
+  xor x20, x17, x20
 
-    /* load limb from regfile buffer */
-    bn.movr   x11, x8++
+  ret
 
-    /* conditional select: w0 = FG0.C?w[x8+i]:dmem[x21+i] */
-    bn.sel    w0, w2, w3, C
+/**
+ * Constant-time exponentiation by e-1 = F4-1 = 2^16 = 65536.
+ *
+ * Calculate C = A^(e-1) mod M in constant. A is assumed to be provided in the
+ * Montgomery domain, so is the result C.
+ *
+ * @param[in]  x16: DMEM pointer to the modulus M
+ * @param[in]  x17: DMEM pointer to the base A in the Montgomery domain.
+ * @param[out] x18: DMEM pointer to the result C in the Montgomery domain.
+ * @param[in]  x30: N, number of limbs per bignum
+ * @param[in]   x8: pointer to temp reg, must be set to 4
+ * @param[in]   x9: pointer to temp reg, must be set to 3
+ * @param[in]  x10: pointer to temp reg, must be set to 4
+ * @param[in]  x11: pointer to temp reg, must be set to 2
+ * @param[in]   w1: Montgomery Constant m0'
+ * @param[in]  w31: all-zero
+ *
+ * Clobbered registers: x2 to x4, x31, w2
+ * Clobbered flag groups: FG0, FG1
+ */
+modexp_65536:
+  /* Compute (N-1). x31 <= x30 - 1 = N - 1 */
+  addi      x31, x30, -1
 
-    /* store selected limb to dmem */
-    bn.sid    x0, 0(x21++)
+  /* Copy A into the output location. */
+  addi      x3, x17, 0
+  addi      x4, x18, 0
+  loop      x30, 2
+    bn.lid    x11, 0(x3++)
+    bn.sid    x11, 0(x4++)
 
-  ret
+  /* Perform 16 squarings to calculate A^(2^16). */
+  loopi 16, 9
+    addi      x19, x18, 0
+    addi      x20, x18, 0
+    jal       x1, montmul
+    /* Store result at output location in DMEM. */
+    addi      x2, x8, 0
+    addi      x3, x18, 0
+    loop      x30, 2
+      bn.sid    x2, 0(x3++)
+      addi      x2, x2, 1
+    nop
 
+  ret
 
 /**
- * Constant-time bigint modular exponentiation
+ * Constant-time, boolean-masked Montgomery ladder bigint exponentiation
  *
- * Returns: C = modexp(A,E) = A^E mod M
+ * Calculates: C = modexp(A, d) = A^d mod M
  *
- * This implements the square and multiply algorithm, i.e. for each bit of the
- * exponent both the squared only and the squared with multiply results are
- * computed but one result is discarded.
- * Computation is carried out in the Montgomery domain, by using the montmul
- * primitive.
- * The squared Montgomery modulus RR and the Montgomery constant m0' have to
- * be precomputed and provided at the appropriate locations in dmem.
+ * This routine implements a constant-time modular exponentation Montgomery
+ * ladder using Boolean-masked exponents in two shares (d0, d1) as proposed by
+ * Tunstall et al.
  *
- * Flags: The states of both FG0 and FG1 depend on intermediate values and are
- *        not usable after return.
+ *   [1] https://eprint.iacr.org/2018/1226.pdf
  *
- * The base bignum A is expected in the input buffer, the exponent E in the
- * exp buffer, the result C is written to the output buffer.
- * Note, that the content of both, the input buffer and the exp buffer is
- * modified during execution.
+ * The individual bits of the exponent shares randomize the memory accesses of
+ * intermediate values in each iteration thus inhibiting horizontal attacks that
+ * exploit leakage spanning multiple rounds. As the exponent is re-masked for
+ * every exponentation vertical attacks over multiple traces are mitigated as
+ * well.
  *
- * @param[in]   x2: dptr_c, dmem pointer to buffer for output C
- * @param[in]  x14: dptr_a, dmem pointer to first limb of input A
- * @param[in]  x15: dptr_e, dmem pointer to first limb of exponent E
- * @param[in]  x16: dptr_M, dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to first limb of m0'
- * @param[in]  x18: dptr_RR, dmem pointer to first limb of RR
- * @param[in]  x30: N, number of limbs per bignum
- * @param[in]  w31: all-zero
- * @param[out] dmem[dptr_c:dptr_c+N*32] C, A^E mod M
+ * The input A is blinded for each exponentiation using the inverse-free
+ * technique by technique Ebeid and Lambert where
  *
- * clobbered registers: x3 to x13, x16 to x31
- *                      w0 to w3, w24 to w30
- *                      w4 to w[4+N-1]
- * clobbered Flag Groups: FG0, FG1
+ *   A^d = ((A*R^e)^(d-1))*(A*R^(e-1)) mod M
+ *
+ * For more information on this blinding strategy, the reader is referred to the
+ * paper:
+ *
+ *   [2] https://dl.acm.org/doi/10.1145/1873548.1873556
+ *
+ * The computation is carried out in the Montgomery domain, by using the montmul
+ * primitive. The squared Montgomery modulus RR and the Montgomery constant m0'
+ * have to be precomputed and provided at the appropriate locations in DMEM.
+ *
+ * This routine operates on the pre-defined memory locations set in
+ * `run_rsa_modexp_mem`.
+ *
+ * @param[in] x29: message blinding flag (enable if non-zero)
+ * @param[in] x30: N, number of limbs per bignum
+ * @param[in]  w1: Montgomery Constant m0'
+ * @param[in] w31: all-zero
+ *
+ * Clobbered registers: x2 to x22, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
  */
 modexp:
-  /* prepare pointers to temp regs */
+  # Constant wide register pointers
   li         x8, 4
   li         x9, 3
   li        x10, 4
   li        x11, 2
 
-  /* Compute (N-1).
-       x31 <= x30 - 1 = N - 1 */
+  # Compute (N-1): x31 <= x30 - 1 = N - 1
   addi      x31, x30, -1
 
-  /* Convert input to montgomery domain.
-       dmem[dptr_a] <= montmul(A,RR) = A*R mod M */
-  addi      x19, x14, 0
-  addi      x20, x18, 0
-  addi      x21, x14, 0
-  jal       x1, montmul
-  loop      x30, 2
-    bn.sid    x8, 0(x21++)
-    addi      x8, x8, 1
+  # Convert input to Montgomery domain:
+  #
+  #   [w[4+N-1]:w4] = A' = montmul(A, RR)
+  la  x16, rsa_n
+  la  x19, r0
+  la  x20, RR
+  jal x1, montmul
+
+  # Store mont(A) back to DMEM at location r0.
+  addi x2, x8, 0
+  la   x3, r0
+  loop x30, 2
+    bn.sid  x2, 0(x3++)
+    addi    x2, x2, 1
+
+  # When message blinding is disabled use the work_buf as the location for the
+  # pre-computed random indices.
+  la x25, work_buf
+
+  beq x0, x29, _message_blinding_prologue_end
+
+  # Sample random blinding factor R of size N limbs and store it in DMEM at r1.
+  # Assume it is already in Montgomery form.
+  addi x2, x11, 0
+  la   x3, r1
+  loop x30, 2
+    bn.wsrr w2, RND
+    bn.sid  x2, 0(x3++)
+
+  # Compute R^(e-1) and store it in DMEM at location r2.
+  la x16, rsa_n
+  la x17, r1
+  la x18, r2
+  jal x1, modexp_65536
+
+  # Compute A*R^(e-1) and store it in the work buffer of the scratchpad.
+  la x19, r0
+  la x20, r2
+  jal x1, montmul
+
+  addi x2, x8, 0
+  la   x3, work_buf
+  loop x30, 2
+    bn.sid  x2, 0(x3++)
+    addi    x2, x2, 1
+
+  # Compute [w[4+N-1]:w4] = A*R^e.
+  la  x19, r1
+  la  x20, work_buf
+  jal x1, montmul
+
+  # Since d is odd d-1 must be even, hence to have d0 XOR d1 = d-1, the first
+  # bit of the share d0 must be flipped.
+  la      x16, rsa_d0
+  bn.lid  x11, 0(x16)
+  bn.addi w30, w31, 1
+  bn.xor  w2, w2, w30
+  bn.sid  x11, 0(x16)
+
+  # When the message blinding is enable to work_buf is taken by A*R^(e-1), so
+  # we need to overwrite the RR which is not needed anymore at this point.
+  la x25, RR
+
+_message_blinding_prologue_end:
+
+  # montmul clobbers the flags, clear them here.
+  bn.add w31, w31, w31, FG0
+  bn.add w31, w31, w31, FG1
+
+  # Step 1 in Algorithm 2 [1]:
+  #
+  # Initialize r0 and r1 with -M mod R. Note that this Montgomery ladder
+  # operates with redundant residuals over Z/RZ as opposed to Z/MZ which
+  # significantly simplifies the final comparison step in the Montgomery
+  # multiplication. Only the in the very last step of the exponentational, when
+  # the output is converted back from the Montgomery form, the value is mapped
+  # into Z/NZ (see Section 2.4.2 in https://eprint.iacr.org/2017/1057.pdf for
+  # more details on this optimization).
+  #
+  # [1] asks for r0 and r1 to be initialzed to 1 or montmul(1, RR) in the
+  # Montgomery domain over Z/MZ which congruent to -M in Z/RZ.
+  la  x2, r0
+  la  x3, r1
+  la  x5, rsa_n
+  loop x30, 4
+    bn.lid  x11, 0(x5++)
+    bn.subb w2, w31, w2
+    bn.sid  x11, 0(x2++)
+    bn.sid  x11, 0(x3++)
+
+  # Precomputation of the randomized indices:
+  #
+  #   `(((b' << R) | (d1 >> 1)) ^ d1) ^ d0`.
+  #
+  # Store the result in DMEM location RR, as at this point it not needed
+  # as all the inputs have been transformed into the Montgomery form.
+  #
+  # Computes the secret indices (b' ^ bi) ^ ai in Step 5 of Algorithm 2 in [1].
+  la x2, rsa_d1
+  la x3, rsa_d0
+  addi x5, x25, 0
+
+  # Use w24-w26 as intermediate WDRs.
+  addi x20, x0, 24
+  addi x21, x0, 25
+  addi x22, x0, 26
+
+  # Iterate through n-1 limbs (starting from the LSB) and compute
+  #   ((d1 >> 1) ^ d1) ^ d0
+  loop x31, 9
+    bn.lid  x20, 0(x2++)
+    bn.lid  x21, 0(x2)
+    bn.xor  w31, w31, w31 # dummy instruction
+    bn.lid  x22, 0(x3++)
+    bn.rshi w25, w25, w24 >> 1
+    bn.xor  w24, w24, w25
+    bn.xor  w31, w31, w31 # dummy instruction
+    bn.xor  w24, w24, w26
+    bn.sid  x20, 0(x5++)
+
+  # Generate random bit b'.
+  bn.wsrr w25, RND
+  bn.add  w26, w25, w25
+  csrrs   x4,  FG0, x0
+  andi    x4,  x4, 1
+
+  # The last iteration is special, it includes the random bit b' at the MSB.
+  bn.rshi w25, w31, w25 >> 255
+  bn.lid  x20, 0(x2)
+  bn.xor  w31, w31, w31 # dummy instruction
+  bn.lid  x22, 0(x3)
+  bn.rshi w25, w25, w24 >> 1
+  bn.xor  w24, w24, w25
+  bn.xor  w31, w31, w31 # dummy instruction
+  bn.xor  w24, w24, w26
+  bn.sid  x20, 0(x5)
+
+  # Store the converted input back into DMEM r[b' ^ 1] = A'.
+  la   x23, r0
+  la   x24, r1
+  xori x14, x4, 1
+  jal  x1, cond_swap_gprs
+
+  addi x2, x8, 0
+  loop x30, 2
+    bn.sid x2, 0(x19++)
+    addi   x2, x2, 1
+
+  # Compute bit length of current bigint size.
+  slli  x21, x30, 8
+
+  # Main loop of the exponentiation, iterate over all exponent bits:
+  loop x21, 68
+    bn.add w31, w31, w31
+
+    # Shift d0 and siphon the shifted out MSB into FG0, x3 = a[i] = d0[i].
+    la   x15, rsa_d0
+    loop x30, 3
+      bn.lid x11, 0(x15)
+      # w2 <= w2 << 1
+      bn.addc w2, w2, w2
+      bn.sid  x11, 0(x15++)
+    csrrs x3, FG0, x0
+    andi x3, x3, 1
+    # Restore the LSB.
+    la   x15, rsa_d0
+    lw   x22, 0(x15)
+    or   x22, x3, x22
+    sw   x22, 0(x15)
+
+    # Step 4 in Algorithm 2 [1]:
+    #
+    # Depending on a[i] assign the input buffers to calculate
+    # [w[4+N-1]:w4] = r[a[i]] * r[a[i] ^ 1] and store the result in DMEM[r2].
+    la   x23, r0
+    la   x24, r1
+    addi x14, x3, 0
+    jal  x1, cond_swap_gprs
+
+    la x16, rsa_n
+    jal x1, montmul
+
+    addi x2, x8, 0
+    la   x15, r2
+    loop x30, 2
+      bn.sid  x2, 0(x15++)
+      addi x2, x2, 1
+
+    # Shift secret indices and siphon the shifted out MSB into
+    #   x4 = c = (b' ^ bi) ^ ai
+    addi   x15, x25, 0
+    loop x30, 3
+      bn.lid x11, 0(x15)
+      # w2 <= w2 << 1
+      bn.addc w2, w2, w2
+      bn.sid  x11, 0(x15++)
+    csrrs x4, FG0, x0
+    andi  x4, x4, 1
+    # Shift in random bit to properly overwrite the shifted out secret index.
+    csrrs x16, URND, x0
+    andi  x16, x16, 1
+    addi  x15, x25, 0
+    lw    x22, 0(x15)
+    or    x22, x16, x22
+    sw    x22, 0(x15)
+
+    # Step 5 in Algorithm 2 [1]:
+    #
+    # Calculate [w[4+N-1]:w4] = DMEM[r[c]] * DMEM[r[c]].
+    la   x23, r0
+    la   x24, r1
+    addi x14, x4, 0
+    jal x1, cond_swap_gprs
+
+    la   x16, rsa_n
+    addi x20, x19, 0
+    jal x1, montmul
+
+    # Step 6 in Algorithm 2 [1]:
+    #
+    # Store r2 and r[c] * r[c] into DMEM such that
+    #  DMEM[r[a[i]]]   = r[c] * r[c]
+    #  DMEM[r[a[i]^1]] = DMEM[r2]
+    la   x23, r0
+    la   x24, r1
+    addi x14, x3, 0
+    jal x1, cond_swap_gprs
+
+    addi x5, x8, 0
+    loop x30, 2
+      bn.sid x5, 0(x19++)
+      addi   x5, x5, 1
+
+    la   x16, r2
+    loop x30, 2
+      bn.lid x11, 0(x16++)
+      bn.sid x11, 0(x20++)
 
-  /* zeroize w2 and reset flags */
-  bn.sub    w2, w2, w2
-
-  /* initialize the output buffer with -M */
-  addi      x3, x16, 0
-  addi      x21, x2, 0
-  loop      x30, 3
-    /* load limb from modulus */
-    bn.lid    x11, 0(x3++)
-
-    /* subtract limb from 0 */
-    bn.subb   w2, w31, w2
-
-    /* store limb in dmem */
-    bn.sid    x11, 0(x21++)
+    nop
 
-  /* compute bit length of current bigint size */
-  slli      x24, x30, 8
+  # Make sure the output (A*R^e)^(d-1) is in r0.
+  la   x23, r0
+  la   x24, r1
+  la   x14, rsa_d1
+  lw   x14, 0(x14)
+  andi x14, x14, 1
+  jal  x1, cond_swap_gprs
 
-  /* iterate over all bits of bigint */
-  loop      x24, 20
-    /* square: out = montmul(out,out)  */
-    addi      x19, x2, 0
-    addi      x20, x2, 0
-    addi      x21, x2, 0
-    jal       x1, montmul
-    /* Store result in dmem starting at dmem[dptr_c] */
-    loop      x30, 2
-      bn.sid    x8, 0(x21++)
-      addi      x8, x8, 1
+  beq x0, x29, _message_blinding_epilogue_end
 
-    /* multiply: out = montmul(in,out) */
-    addi      x19, x14, 0
-    addi      x20, x2, 0
-    addi      x21, x2, 0
-    jal       x1, montmul
+  # Unblind ciphertext with A*R^(e-1) such that
+  #   DMEM[r0] = A^d mod M = (A*R^e)^(d-1) * A*R^(e-1) mod M
+  la x16, rsa_n
+  la x20, work_buf
+  jal x1, montmul
 
-    /* w2 <= w2 << 1 */
-    bn.add    w2, w2, w2
+  addi x2, x8, 0
+  la   x3, r0
+  loop x30, 2
+    bn.sid  x2, 0(x3++)
+    addi    x2, x2, 1
 
-    /* the loop performs a 1-bit left shift of the exponent. Last MSB moves
-       to FG0.C, such that it can be used for selection */
-    addi      x20, x15, 0
-    loop      x30, 3
-      bn.lid    x11, 0(x20)
-      /* w2 <= w2 << 1 */
-      bn.addc   w2, w2, w2
-      bn.sid    x11, 0(x20++)
+  # Convert d0 back such that d0 XOR d1 = d.
+  la x12, rsa_d0
+  bn.lid x11, 0(x12)
+  bn.addi w30, w31, 1
+  bn.xor w2, w2, w30
+  bn.sid x11, 0(x12)
 
-    /* select squared or squared+multiplied result */
-    addi      x21, x2, 0
-    jal       x1, sel_sqr_or_sqrmul
+  la x19, r0
 
-    nop
+_message_blinding_epilogue_end:
 
-  /* convert back from montgomery domain */
-  /* out = montmul(out,1) = out/R mod M  */
-  addi      x19, x2, 0
-  addi      x21, x2, 0
-  jal       x1, montmul_mul1
+  # Convert back from Montgomery form.
+  la  x16, rsa_n
+  la  x21, r0
+  jal x1, montmul_mul1
 
   ret
 
-
 /**
  * Bigint modular exponentiation with fixed exponent of 65537
  *
@@ -192,9 +461,9 @@ modexp:
  * @param[in]   x2: dptr_c, dmem pointer to buffer for output C
  * @param[in]  x14: dptr_a, dmem pointer to first linb of input A
  * @param[in]  x16: dptr_M, dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to Mongtgomery constant m0'
- * @param[in]  x18: dptr_RR, dmem pointer to Montgmery constant RR
+ * @param[in]  x17: dptr_RR, dmem pointer to Montgmery constant RR
  * @param[in]  x30: N, number of limbs per bignum
+ * @param[in]   w1: m0d', Montgomery constant
  * @param[in]  w31: all-zero
  * @param[out] dmem[dptr_c:dptr_c+N*32] C, A^65537 mod M
  *
@@ -217,7 +486,7 @@ modexp_65537:
   /* convert to montgomery domain montmul(A,RR)
   in = montmul(A,RR) montmul(A,RR) = C*R mod M */
   addi      x19, x14, 0
-  addi      x20, x18, 0
+  addi      x20, x17, 0
   addi      x21, x14, 0
   jal       x1, montmul
   /* Store result in dmem starting at dmem[dptr_a] */
@@ -369,7 +638,6 @@ cond_sub_to_dmem:
  *        not usable after return.
  *
  * @param[in]  x16: dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to Montgomery Constant m0'
  * @param[in]  x19: dmem pointer to first limb of operand A
  * @param[in]  x21: dmem pointer to first limb of result C
  * @param[in]  x30: N, number of limbs
@@ -378,6 +646,7 @@ cond_sub_to_dmem:
  * @param[in]  x9: pointer to temp reg, must be set to 3
  * @param[in]  x10: pointer to temp reg, must be set to 4
  * @param[in]  x11: pointer to temp reg, must be set to 2
+ * @param[in]   w1: m0d', Montgomery constant
  * @param[in]  w31: all-zero
  *
  * clobbered registers: x6, x7, x8, x12, x13, x21, x22,
@@ -385,9 +654,6 @@ cond_sub_to_dmem:
  * clobbered Flag Groups: FG0, FG1
  */
 montmul_mul1:
-  /* load Montgomery constant: w3 = dmem[x17] = dmem[dptr_m0d] = m0' */
-  bn.lid    x9, 0(x17)
-
   /* init regfile bigint buffer with zeros */
   bn.mov    w2, w31
   loop      x30, 1
diff --git a/sw/otbn/crypto/montmul.s b/sw/otbn/crypto/montmul.s
index 6ae2cc26a2857..e4f563051a050 100644
--- a/sw/otbn/crypto/montmul.s
+++ b/sw/otbn/crypto/montmul.s
@@ -184,8 +184,7 @@ double_and_reduce:
 *        not usable after return.
 *
 * @param[in]  x16: dptr_M, pointer to first limb of modulus in dmem
-* @param[in]  x17: dptr_m0d, dmem pointer to Montgomery Constant m0'
-* @param[in]  x18: dptr_RR: dmem pointer to first limb of output buffer for RR
+* @param[in]  x17: dptr_RR: dmem pointer to first limb of output buffer for RR
 * @param[in]  x30: N, number of limbs
 * @param[in]  x31: N-1, number of limbs minus 1
 * @param[in]  w31: all-zero
@@ -226,7 +225,7 @@ compute_rr:
   /* Store T in output buffer (in preparation for montmul).
      dmem[dptr_RR] <= [w4:w(4+N-1)] = T */
   li        x8, 4
-  addi      x21, x18, 0
+  addi      x21, x17, 0
   loop      x30, 2
     bn.sid    x8, 0(x21++)
     addi      x8, x8, 1
@@ -242,11 +241,11 @@ compute_rr:
   /* Five montgomery squares to compute RR = (T^(2^5) * R) mod M. */
   loopi     5,9
     /* [w4:w(4+N-1)] <= montmul(dmem[rr], dmem[rr]) */
-    addi      x19, x18, 0
-    addi      x20, x18, 0
+    addi      x19, x17, 0
+    addi      x20, x17, 0
     jal       x1, montmul
     /* Store result: dmem[rr] <= [w4:w(4+N-1)] */
-    addi      x2, x18, 0
+    addi      x2, x17, 0
     addi      x3, x8, 0
     loop      x30, 2
       bn.sid    x3, 0(x2++)
@@ -402,8 +401,8 @@ cond_sub_to_reg:
  * @param[in]  x16: dmem pointer to first limb of modulus M
  * @param[in]  x19: dmem pointer to first limb operand A
  * @param[in]  x31: N-1, number of limbs minus one
- * @param[in]  w2:  current limb of operand B, b_i
- * @param[in]  w3:  Montgomery constant m0'
+ * @param[in]   w1: Montgomery constant m0'
+ * @param[in]   w2: current limb of operand B, b_i
  * @param[in]  w31: all-zero
  * @param[in]  [w[4+N-1]:w4] intermediate result A
  * @param[out] [w[4+N-1]:w4] intermediate result A
@@ -443,7 +442,7 @@ mont_loop:
   bn.addc   w29, w26, w31
 
   /* w25 = w3 = m0' */
-  bn.mov    w25, w3
+  bn.mov    w25, w1
 
   /* multiply by m0', this concludes Step 2.1 of HAC 14.36 */
   /* [_, u_i] = [w26, w27] = w30*w25 = (y[0]*x_i + A[0])*m0'*/
@@ -558,7 +557,6 @@ mont_loop:
  *        not usable after return.
  *
  * @param[in]  x16: dptr_M, dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to Montgomery Constant m0'
  * @param[in]  x19: dptr_a, dmem pointer to first limb of operand A
  * @param[in]  x20: dptr_b, dmem pointer to first limb of operand B
  * @param[in]  w31: all-zero
@@ -574,9 +572,6 @@ mont_loop:
  * clobbered Flag Groups: FG0, FG1
  */
 montmul:
-  /* load Montgomery constant: w3 = dmem[x17] = dmem[dptr_m0d] = m0' */
-  bn.lid    x9, 0(x17)
-
   /* init regfile bigint buffer with zeros */
   bn.mov    w2, w31
   loop      x30, 1
@@ -619,11 +614,10 @@ montmul:
  * Needs to be executed once per constant Modulus.
  *
  * @param[in]  x16: dptr_M, dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to buffer for m0'
- * @param[in]  x18: dptr_RR, dmem pointer to buffer for RR
+ * @param[in]  x17: dptr_RR, dmem pointer to buffer for RR
  * @param[in]  x30: N, number of limbs per bignum
  * @param[in]  w31: all-zero
- * @param[out] [dmem[dptr_m0d+31]:dmem[dptr_m0d]] computed m0'
+ * @param[out]  w0: computed m0'
  * @param[out] [dmem[dptr_RR+N*32-1]:dmem[dptr_RR]] computed RR
  */
 modload:
@@ -638,9 +632,8 @@ modload:
   /* Compute Montgomery constant */
   jal      x1, m0inv
 
-  /* Store Montgomery constant in dmem */
-  li       x9, 29
-  bn.sid   x9, 0(x17)
+  /* Store Montgomery constant in w0 */
+  bn.mov w1, w29
 
   /* Compute square of Montgomery modulus */
   jal      x1, compute_rr
diff --git a/sw/otbn/crypto/p256_base.s b/sw/otbn/crypto/p256_base.s
index 0d0f7513ade05..60cfc7fc726bf 100644
--- a/sw/otbn/crypto/p256_base.s
+++ b/sw/otbn/crypto/p256_base.s
@@ -15,7 +15,9 @@
 .globl p256_generate_k
 .globl p256_generate_random_key
 .globl p256_key_from_seed
+.globl p256_masked_scalar_reblind
 .globl trigger_fault_if_fg0_z
+.globl trigger_fault_if_fg0_not_z
 .globl mul_modp
 .globl setup_modp
 .globl mod_mul_256x256
@@ -26,6 +28,7 @@
 
 /* Exposed only for testing or SCA purposes. */
 .globl mod_inv
+.globl proj_double
 
 .text
 
@@ -70,10 +73,47 @@ trigger_fault_if_fg0_z:
 
   ret
 
+/**
+ * Trigger a fault if the FG0.Z flag is 0.
+ *
+ * If the flag is 0, then this routine will trigger an `ILLEGAL_INSN` error and
+ * abort the OTBN program. If the flag is 1, the routine will essentially do
+ * nothing.
+ *
+ * NOTE: Be careful when calling this routine that the FG0.Z flag is not
+ * sensitive; since aborting the program will be quicker than completing it,
+ * the flag's value is likely clearly visible to an attacker through timing.
+ *
+ * @param[in]    w31: all-zero
+ * @param[in]  FG0.Z: boolean indicating fault condition
+ *
+ * clobbered registers: x2
+ * clobbered flag groups: none
+ */
+trigger_fault_if_fg0_not_z:
+  /* Read the FG0.Z flag (position 3).
+       x2 <= FG0.Z */
+  csrrw     x2, FG0, x0
+  andi      x2, x2, 8
+  slli      x2, x2, 3
+
+  /* The `bn.lid` instruction causes an `BAD_DATA_ADDR` error if the
+     memory address is out of bounds. Therefore, if FG0.Z is 1, this
+     instruction causes an error, but if FG0.Z is 0 it simply loads the word at
+     address 0 into w31. */
+  li         x3, 31
+  bn.lid     x3, 0(x2)
+
+  /* If we get here, the flag must have been 1. Restore w31 to zero and return.
+       w31 <= 0 */
+  bn.xor     w31, w31, w31
+
+  ret
+
 /**
  * Reduce a 512-bit value by a 256-bit P-256 modulus (either n or p).
  *
- * Returns c = a mod m
+ * Returns c = x mod m
  *
  * Expects a 512 bit input, a 256 bit modulus and pre-computed parameter u for
  * Barrett reduction (usually greek mu in literature). u is expected without
@@ -105,8 +145,8 @@ trigger_fault_if_fg0_z:
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * @param[in]  [w19,w20]: a, input (512 bits) such that a < 2^256 * m
- * @param[in]  w22: correction factor, msb(a) * u
+ * @param[in]  [w19,w20]: x, input (512 bits) such that x < 2^256 * m
+ * @param[in]  w22: correction factor, msb(x) * u
  * @param[in]  w29: m, modulus, curve order n or finite field modulus p
  * @param[in]  w28: u, lower 256 bit of Barrett constant for m
  * @param[in]  w31: all-zero
@@ -150,59 +190,90 @@ p256_reduce:
      carried out underway. To add them in the q2 domain, they would have to be
      left shifted by 256 bit first. To directly add them we first shift q2' by
      256 bit to the right (by dropping the lower 256 bit), perform the
-     additions, and shift the result another bit to the right.
+     additions, and shift the result another bit to the right. */
 
   /* w25 = q1[256] = x[511:256] >> 255 */
   bn.rshi   w25, w31, w20 >> 255
 
   /* compensate for neglected MSB of u, by adding full q1
      this is unconditional since MSB of u is always 1
+
+     N.B. The dummy instruction below is to clear flags after subtraction,
+     as [w25, w24] contain values that may be correlated with the input to
+     p256_reduce, which in turn may be a secret share as noted above.
+
      [w25, w24] = q2'' <= q2'[511:256] + q1 = [w25, w24] <= w24 + [w25, w21] */
   bn.add    w24, w24, w21
   bn.addc   w25, w25, w31
+  bn.add    w31, w31, w31  /* dummy instruction to clear flags */
 
-  /* compensate for neglected MSB of q1, by conditionally adding u */
-  /* [w25, w24] = q2''' <= q2'' + [0 or u] = [w25, w24] + w22 */
+  /* compensate for neglected MSB of q1, by conditionally adding u
+
+     N.B. The dummy instruction below is to clear flags after subtraction,
+     as [w25, w24] contain values that may be correlated with the input to
+     p256_reduce, which in turn may be a secret share as noted above.
+
+     [w25, w24] = q2''' <= q2'' + [0 or u] = [w25, w24] + w22 */
   bn.add    w24, w24, w22
   bn.addc   w25, w25, w31
+  bn.add    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* q3 = w21 = q2''' >> 1 */
   bn.rshi   w21, w25, w24 >> 1
 
-  /* [w23, w22] <= q3 * p  */
-  bn.mulqacc.z          w29.0, w21.0,  0
-  bn.mulqacc            w29.1, w21.0, 64
-  bn.mulqacc.so  w22.L, w29.0, w21.1, 64
-  bn.mulqacc            w29.2, w21.0,  0
-  bn.mulqacc            w29.1, w21.1,  0
-  bn.mulqacc            w29.0, w21.2,  0
-  bn.mulqacc            w29.3, w21.0, 64
-  bn.mulqacc            w29.2, w21.1, 64
-  bn.mulqacc            w29.1, w21.2, 64
-  bn.mulqacc.so  w22.U, w29.0, w21.3, 64
-  bn.mulqacc            w29.3, w21.1,  0
-  bn.mulqacc            w29.2, w21.2,  0
-  bn.mulqacc            w29.1, w21.3,  0
-  bn.mulqacc            w29.3, w21.2, 64
-  bn.mulqacc.so  w23.L, w29.2, w21.3, 64
-  bn.mulqacc.so  w23.U, w29.3, w21.3,  0
-  bn.add    w23, w23, w31
-
-  /* We compute the final remainder r by subtracting the estimate q3 from x.
+  /* [w23, w22] <= q3 * p
+
+    N.B. The bn.mulqacc.so.z instruction below is to clear the value of ACC as
+    well as the flags set by the prior mulqacc.so instructions, as p256_reduce
+    may be called on secret shares of the same value back-to-back. For instance,
+    p256_sign calls mod_mul_32x128 to multiplicatively mask a pair of additive
+    secret shares; while these are indeed indistinguishable from random values
+    once reduced mod p, the values left in ACC after the below multiplications
+    are unreduced and have the potential to leak information about their
+    multiplicands. */
+  bn.mulqacc.z            w29.0, w21.0,  0
+  bn.mulqacc              w29.1, w21.0, 64
+  bn.mulqacc.so    w22.L, w29.0, w21.1, 64
+  bn.mulqacc              w29.2, w21.0,  0
+  bn.mulqacc              w29.1, w21.1,  0
+  bn.mulqacc              w29.0, w21.2,  0
+  bn.mulqacc              w29.3, w21.0, 64
+  bn.mulqacc              w29.2, w21.1, 64
+  bn.mulqacc              w29.1, w21.2, 64
+  bn.mulqacc.so    w22.U, w29.0, w21.3, 64
+  bn.mulqacc              w29.3, w21.1,  0
+  bn.mulqacc              w29.2, w21.2,  0
+  bn.mulqacc              w29.1, w21.3,  0
+  bn.mulqacc              w29.3, w21.2, 64
+  bn.mulqacc.so    w23.L, w29.2, w21.3, 64
+  bn.mulqacc.so    w23.U, w29.3, w21.3,  0
+  bn.mulqacc.so.z  w31.U, w31.0, w31.0,  0  /* dummy instruction to clear state */
+
+  /* We compute the final remainder r by subtracting the estimate q3 from a.
      In the generic algorithm, r is already the reduced result or it is off by
      either p or 2p. For the special case of the modulus of P-256 it can be
      shown that r can only be off by max p. Therefore, only a single
      conditional correction is required.
+
+     N.B. The dummy instruction below is to clear flags after subtraction, as
+     [w20, w19] contains the input to p256_reduce, which may be a secret share
+     as noted above.
+
      [w20, w22] = r <= [w20, w19] - [w23, w22] = x - q3*p  */
   bn.sub    w22, w19, w22
   bn.subb   w20, w20, w23
 
   /* r cannot be wider than 257 bit. Therefore it is r > p if bit 256 of r is
-     set and we need to subtract the modulus */
+     set and we need to subtract the modulus
+
+     N.B. The dummy instruction below is to clear flags after subtraction, as
+     w21 contains a shifted version of the input to p256_reduce, which may be a
+     secret share as noted above. */
   bn.sel    w21, w29, w31, L
   bn.sub    w21, w22, w21
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
-  /* this performs the correction in case r is only 256 bit long but still
+  /* this performs the correction in case r is only 256 bits long but still
      greater than the modulus */
   bn.addm   w19, w21, w31
 
@@ -257,8 +328,13 @@ mod_mul_256x256:
      256x256 multiplier. For the MSb of x being set we temporary store u
      (or zero) here to be used in a later constant time correction of a
      multiplication with u. Note that this requires the MSb flag being carried
-     over from the multiplication routine. */
-  bn.sel    w22, w28, w31, M
+     over from the multiplication routine.
+
+     N.B. The dummy instruction following the selection is for clearing ACC and
+     flags set by the prior multiplications which may input secret values. See
+     the block comments in p256_reduce for more details. */
+  bn.sel         w22, w28, w31, M
+  bn.mulqacc.so.z  w31.U, w31.0, w31.0,  0  /* dummy instruction to clear state */
 
   /* Reduce product modulo m (tail-call). */
   jal       x0, p256_reduce
@@ -307,8 +383,13 @@ mod_mul_320x128:
      256x256 multiplier. For the MSb of x being set we temporary store u
      (or zero) here to be used in a later constant time correction of a
      multiplication with u. Note that this requires the MSb flag being carried
-     over from the multiplication routine. */
+     over from the multiplication routine.
+
+     N.B. The dummy instruction following the selection is for clearing ACC and
+     flags set by the prior multiplications which may input secret values. See
+     the block comments in p256_reduce for more details. */
   bn.sel    w22, w28, w31, M
+  bn.mulqacc.wo.z    w31, w31.0, w31.0, 0
 
   /* Reduce product modulo m (tail-call). */
   jal       x0, p256_reduce
@@ -1057,40 +1138,115 @@ fetch_proj_randomize:
  * returns R = (x_r, y_r, z_r) <= 2*P = 2*(x_p, y_p, z_p)
  *         with R, P being valid P-256 curve points
  *
- * This routines doubles a given P-256 curve point in projective coordinate.
- * Internally this routine makes use of the point addition routine and
- * adds the point to itself.
+ * This routines doubles a given P-256 curve point in projective coordinates.
+ * The implementation is based on the following entry in the Explicit Formulas
+ * Database:
+ * http://hyperelliptic.org/EFD/g1p/auto-shortw-projective-3.html#doubling-dbl-2007-bl-2
+ *
+ * Algorithm (copied from EFD):
+ *    w = 3*(X1-Z1)*(X1+Z1)
+ *    s = 2*Y1*Z1
+ *    ss = s^2
+ *    sss = s*ss
+ *    R = Y1*s
+ *    RR = R^2
+ *    B = 2*X1*R
+ *    h = w^2-2*B
+ *    X3 = h*s
+ *    Y3 = w*(B-h)-2*RR
+ *    Z3 = sss
+ *
+ * This routine relies on the assumption that the domain parameter a of the
+ * elliptic curve is -3. It computes the result in 7 multiplies and 3 squares
+ * instead of 14 multiplies.
+ *
  * This routine runs in constant time.
  *
  * @param[in]  w8: x_p, x-coordinate of input point
  * @param[in]  w9: y_p, y-coordinate of input point
  * @param[in]  w10: z_p, z-coordinate of input point
- * @param[in]  w27: b, curve domain parameter
  * @param[in]  w28: r256, constant, 2^256 mod p = 2^256 - p
  * @param[in]  w29: r448, constant, 2^448 mod p
  * @param[in]  w31: all-zero.
  * @param[in]  MOD: p, modulus of P-256 underlying finite field
- * @param[out]  w11: x_r, x-coordinate of resulting point
- * @param[out]  w12: y_r, y-coordinate of resulting point
- * @param[out]  w13: z_r, z-coordinate of resulting point
+ * @param[out]  w8: x_r, x-coordinate of resulting point
+ * @param[out]  w9: y_r, y-coordinate of resulting point
+ * @param[out]  w10: z_r, z-coordinate of resulting point
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * clobbered registers: w11 to w25
+ * clobbered registers: w14 to w25
  * clobbered flag groups: FG0
  */
 proj_double:
+  /* w14 <= 3 * (w8 - w10) * (w8 + w10) = 3 * (X1 - Z1) * (X1 + Z1) = w */
+  bn.subm   w24, w8, w10
+  bn.addm   w25, w8, w10
+  jal       x1, mul_modp
+  bn.addm   w14, w19, w19
+  bn.addm   w14, w14, w19
+
+  /* w15 <= 2 * w9 * w10 = 2 * Y1 * Z1 = s */
+  bn.mov    w24, w9
+  bn.mov    w25, w10
+  jal       x1, mul_modp
+  bn.addm   w15, w19, w19
+
+  /* w16 <= w9 * w15 = Y1 * s = R */
+  bn.mov    w24, w9
+  bn.mov    w25, w15
+  jal       x1, mul_modp
+  bn.mov    w16, w19
+
+  /* w17 <= 2 * w8 * w16 = 2 * X1 * R = B */
+  bn.mov    w24, w8
+  bn.mov    w25, w16
+  jal       x1, mul_modp
+  bn.addm   w17, w19, w19
+
+  /* w18 <= w14^2 - 2*w17 = w^2 - 2*B = h */
+  bn.mov    w24, w14
+  bn.mov    w25, w14
+  jal       x1, mul_modp
+  bn.subm   w18, w19, w17
+  bn.subm   w18, w18, w17
+
+  /* w8 <= w18 * w15 = h * s = X1 */
+  bn.mov    w24, w18
+  bn.mov    w25, w15
+  jal       x1, mul_modp
+  bn.mov    w8, w19
+
+  /* w10 <= w15 * w15 * w15 = s * s * s = sss  = Z1 */
+  bn.mov    w24, w15
+  bn.mov    w25, w15
+  jal       x1, mul_modp
+  bn.mov    w24, w19
+  bn.mov    w25, w15
+  jal       x1, mul_modp
+  bn.mov    w10, w19
+
+  /* w15 <= w14 * (w17 - w18) = w*(B-h) */
+  bn.mov    w24, w14
+  bn.subm   w25, w17, w18
+  jal       x1, mul_modp
+  bn.mov    w15, w19
 
-  /* Q = (x_q, y_q, z_q) = (w11, w12, w13) <= P = (x_p, y_p, z_p)
-     = (w8, w9, w10) */
-  bn.mov    w11, w8
-  bn.mov    w12, w9
-  bn.mov    w13, w10
+  /* w15 <= w15 - 2 * (w16 * w16) = w*(B-h) - 2*R^2 = Y1 */
+  bn.mov    w24, w16
+  bn.mov    w25, w16
+  jal       x1, mul_modp
+  bn.subm   w15, w15, w19
+  bn.subm   w15, w15, w19
 
-  /* Tail-call to addition.
-     R = (x_r, y_r, z_r) = (w11, w12, w13) = P+Q
-       = (w8, w9, w10) + (w11, w12, w13) = (x_p, y_p, z_p) + (x_q, y_q, z_q) */
-  jal       x0, proj_add
+  /* The proj_double routine returns (0, 0, 0) when called on the point at
+     infinity (any point where Y is nonzero and both X=0 and Z=0). Detect this
+     case and select a 1 for Y if all coordinates are 0. */
+  bn.addi   w16, w31, 1
+  bn.or     w14, w8, w10
+  bn.sel    w9, w16, w15, Z
+
+  ret
 
 
 /**
@@ -1119,15 +1275,20 @@ proj_double:
  *    Q = if (k0[i] | k1[i]) then B else Q
  *
  *
- * Each share k0/k1 is 320 bits, even though it represents a 256-bit value.
- * This is a side-channel protection measure.
+ * Each share k0/k1 is 321 bits, even though it represents a 256-bit value.
+ * This allows for blinded scalars as a side-channel protection measure.
+ *
+ * 321 bit shares mean that we have 65 bits of blinding for each share. This
+ * is the minimal number of bits to protect against window attacks mentioned
+ * in Schindler.
+ * https://csrc.nist.gov/csrc/media/events/workshop-on-elliptic-curve-cryptography-standards/documents/papers/session6-schindler-werner.pdf
  *
  * @param[in]  x21: dptr_x, pointer to affine x-coordinate in dmem
  * @param[in]  x22: dptr_y, pointer to affine y-coordinate in dmem
  * @param[in]  w0: lower 256 bits of k0, first share of scalar
- * @param[in]  w1: upper 64 bits of k0, first share of scalar
+ * @param[in]  w1: upper 65 bits of k0, first share of scalar
  * @param[in]  w2: lower 256 bits of k1, second share of scalar
- * @param[in]  w3: upper 64 bits of k1, second share of scalar
+ * @param[in]  w3: upper 65 bits of k1, second share of scalar
  * @param[in]  w27: b, curve domain parameter
  * @param[in]  w31: all-zero
  * @param[in]  MOD: p, modulus, 2^256 > p > 2^255.
@@ -1165,11 +1326,22 @@ scalar_mult_int:
 
   /* Init 2P, this will be used for the addition part in the double-and-add
      loop when the bit at the current index is 1 for both shares of the scalar.
-     2P = (w4, w5, w6) <= (w11, w12, w13) <= 2*(w8, w9, w10) = 2*P */
+     2P = (w4, w5, w6) <= (w8, w8, w10) <= 2*(w8, w9, w10) = 2*P */
   jal       x1, proj_double
-  bn.mov    w4, w11
-  bn.mov    w5, w12
-  bn.mov    w6, w13
+  bn.mov    w4, w8
+  bn.mov    w5, w9
+  bn.mov    w6, w10
+
+  /* Shift first share of k so its MSB is in the most significant position of
+     a word.
+
+     N.B. This has been intentionally separated from accesses to [w2,w3] below
+     to avoid potential transient side channel leakage from accessing k0 and k1
+     in sequential instructions.
+
+     w0,w1 <= [w0, w1] << 191 = k0 << 191 */
+  bn.rshi   w1, w1, w0 >> 65
+  bn.rshi   w0, w0, w31 >> 65
 
   /* init double-and-add with point in infinity
      Q = (w8, w9, w10) <= (0, 1, 0) */
@@ -1177,22 +1349,25 @@ scalar_mult_int:
   bn.addi   w9, w31, 1
   bn.mov    w10, w31
 
-  /* Shift shares of k so their MSBs are in the most significant position of a
-     word.
-       w0,w1 <= [w0, w1] << 192 = k0 << 192
-       w2,w3 <= [w2, w3] << 192 = k1 << 192 */
-  bn.rshi   w1, w1, w0 >> 64
-  bn.rshi   w0, w0, w31 >> 64
-  bn.rshi   w3, w3, w2 >> 64
-  bn.rshi   w2, w2, w31 >> 64
+  /* Shift second share of k so its MSB is in the most significant position of a
+     word as well.
+
+     w2,w3 <= [w2, w3] << 191 = k1 << 191 */
+  bn.rshi   w3, w3, w2 >> 65
+  bn.rshi   w2, w2, w31 >> 65
 
   /* double-and-add loop with decreasing index */
-  loopi     320, 34
+  loopi     321, 42
 
     /* double point Q
-       Q = (w11, w12, w13) <= 2*(w8, w9, w10) = 2*Q */
+       Q = (w8, w9, w10) <= 2*(w8, w9, w10) = 2*Q */
     jal       x1, proj_double
 
+    /* prepare a mostly-randomized word with LSb matching the MSb of k0 for
+       performing a MSb check on k0 and k1 after the following call. */
+    bn.wsrr   w20, URND
+    bn.rshi   w7, w20, w1 >> 255
+
     /* re-fetch and randomize P again
        P = (w14, w15, w16) */
     jal       x1, fetch_proj_randomize
@@ -1201,26 +1376,37 @@ scalar_mult_int:
        - If only one MSb is set, select P for addition
        - If both MSbs are set, select 2P for addition
        - If neither MSB is set, also 2P will be selected but this will be
-         discarded later */
-    bn.xor    w20, w1, w3
+         discarded later
 
-    /* N.B. The M bit here is secret. For side channel protection in the
+       w26 <= MSb(k1) */
+    bn.rshi   w26, w31, w3 >> 255
+    bn.xor    w20, w7, w26
+
+    /* init regs with random numbers from URND */
+    bn.wsrr   w11, URND
+    bn.wsrr   w12, URND
+    bn.wsrr   w13, URND
+
+    /* N.B. The L bit here is secret. For side channel protection in the
        selects below, it is vital that neither option is equal to the
-       destionation register (e.g. bn.sel w0, w0, w1). In this case, the
+       destination register (e.g. bn.sel w0, w0, w1). In this case, the
        hamming distance from the destination's previous value to its new value
-       will be 0 in one of the cases and potentially reveal M.
+       will be 0 in one of the cases and potentially reveal L.
+
+       Note that the randomized XOR instruction before the bn.sel
+       instructions below acts both to randomize the low bits of k0 for use in a
+       MSb check, as well as to clear flags.
 
-       P = (w8, w9, w10)
+       P = (w11, w12, w13)
         <= (w0[255] xor w1[255])?P=(w14, w15, w16):2P=(w4, w5, w6) */
-    bn.sel    w8, w14, w4, M
-    bn.sel    w9, w15, w5, M
-    bn.sel    w10, w16, w6, M
+    bn.sel    w11, w14, w4, L
+    bn.sel    w12, w15, w5, L
+    bn.sel    w13, w16, w6, L
 
-    /* save doubling result to survive follow-up subroutine call
-       Q = (w7, w26, w30) <= (w11, w12, w13) */
-    bn.mov    w7, w11
-    bn.mov    w26, w12
-    bn.mov    w30, w13
+    /* prepare a mostly-randomized word with LSb matching the MSb of k0 for
+       performing a MSb check on k0 and k1 after the following call. */
+    bn.wsrr   w20, URND
+    bn.rshi   w7, w20, w1 >> 255
 
     /* add points
        Q+P = (w11, w12, w13) <= (w11, w12, w13) + (w8, w9, w10) */
@@ -1228,30 +1414,40 @@ scalar_mult_int:
 
     /* probe if MSb of either one or both of the two
        scalars (k0 or k1) is 1.*/
-    bn.or     w20, w1, w3
+    bn.or     w20, w7, w26
+
+    /* duplicate point P to allow distinct source/destination registers for
+       the select instructions below.
+       Q = (w7, w26, w30) <= (w8, w9, w10) */
+    bn.mov    w7, w8
+    bn.mov    w26, w9
+    bn.mov    w30, w10
+
+    /* init destination registers with random numbers from URND */
+    bn.wsrr   w8, URND
+    bn.wsrr   w9, URND
+    bn.wsrr   w10, URND
 
-    /* N.B. As before, the select instructions below must use distinct
-       source/destination registers to avoid revealing M.
+    /* N.B. The select instructions below must use distinct
+       source/destination registers and source and destination must not be
+       equal for any source and destination pair to avoid revealing L.
 
        Select doubling result (Q) or addition result (Q+P)
-         Q = w0[255] or w1[255]?Q_a=(w11, w12, w13):Q=(w7, w26, w30) */
-    bn.sel    w8, w11, w7, M
-    bn.sel    w9, w12, w26, M
-    bn.sel    w10, w13, w30, M
+         Q = w0[255] or w1[255]?Q+P=(w11, w12, w13):Q=(w7, w26, w30) */
+    bn.sel    w8, w11, w7, L
+    bn.sel    w9, w12, w26, L
+    bn.sel    w10, w13, w30, L
 
-    /* Shift both scalars left 1 bit. */
+    /* Shift k0 left 1 bit.
+
+     N.B. This has been intentionally separated from accesses to [w2,w3] below
+     to avoid potential transient side channel leakage from accessing k0 and k1
+     in sequential instructions. */
     bn.rshi   w1, w1, w0 >> 255
     bn.rshi   w0, w0, w31 >> 255
-    bn.rshi   w3, w3, w2 >> 255
-    bn.rshi   w2, w2, w31 >> 255
-
-    /* init regs with random numbers from URND */
-    bn.wsrr   w11, URND
-    bn.wsrr   w12, URND
-    bn.wsrr   w13, URND
 
     /* get a fresh random number from URND and scale the coordinates of
-       2P = (w3, w4, w5) (scaling each projective coordinate with same
+       2P = (w4, w5, w6) (scaling each projective coordinate with same
        factor results in same point) */
     bn.wsrr   w7, URND
 
@@ -1273,6 +1469,10 @@ scalar_mult_int:
     jal       x1, mul_modp
     bn.mov    w6, w19
 
+    /* Shift k1 left 1 bit. */
+    bn.rshi   w3, w3, w2 >> 255
+    bn.rshi   w2, w2, w31 >> 255
+
   /* Check if the z-coordinate of Q is 0. If so, fail; this represents the
      point at infinity and means the scalar was zero mod n, which likely
      indicates a fault attack. Tail-call.
@@ -1281,6 +1481,7 @@ scalar_mult_int:
   bn.cmp    w10, w31
   jal       x0, trigger_fault_if_fg0_z
 
+
 /**
  * P-256 scalar multiplication with base point G
  *
@@ -1296,18 +1497,24 @@ scalar_mult_int:
  * where:
  *   d = (d0 + d1) mod n
  *
- * The shares d0 and d1 are up to 320 bits each to provide extra redundancy.
+ * The shares d0 and d1 are up to 321 bits each to provide extra redundancy.
+ *
+ * 321 bit shares mean that we have 65 bits of blinding for each share. This
+ * is the minimal number of bits to protect against window attacks mentioned
+ * in Schindler.
+ * https://csrc.nist.gov/csrc/media/events/workshop-on-elliptic-curve-cryptography-standards/documents/papers/session6-schindler-werner.pdf
+ *
  *
  * This routine runs in constant time.
  *
- * @param[in]   dmem[d0]:  first share of scalar d (320 bits)
- * @param[in]   dmem[d1]:  second share of scalar d (320 bits)
+ * @param[in]   dmem[d0]:  first share of scalar d (321 bits)
+ * @param[in]   dmem[d1]:  second share of scalar d (321 bits)
  * @param[out]  dmem[x]:   affine x-coordinate (256 bits)
  * @param[out]  dmem[y]:   affine y-coordinate (256 bits)
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * clobbered registers: x2, x3, x16, x17, x21, x22, w0 to w26
+ * clobbered registers: x2, x3, x16, x17, x19, x20, x21, x22, w0 to w29
  * clobbered flag groups: FG0
  */
 p256_base_mult:
@@ -1331,6 +1538,9 @@ p256_base_mult:
   li        x2, 3
   bn.lid    x2, 0(x16)
 
+  /* Hide the secret key before running the scalar multiplication. */
+  jal       x1, p256_masked_scalar_reblind
+
   /* call internal scalar multiplication routine
      R = (x_p, y_p, z_p) = (w8, w9, w10) <= d*P = (w0 + w1)*P */
   la        x21, p256_gx
@@ -1350,6 +1560,18 @@ p256_base_mult:
   la        x22, y
   bn.sid    x2, 0(x22)
 
+  /* Compute both sides of the Weierstrauss equation.
+       w18 <= (x^3 + ax + b) mod p
+       w19 <= (y^2) mod p */
+  jal      x1, p256_isoncurve
+
+  /* Compare the two sides of the equation to check if the result
+     is a valid point as an FI countermeasure.
+     The check fails if both sides are not equal.
+     FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.cmp   w18, w19
+  jal      x1, trigger_fault_if_fg0_not_z
+
   ret
 
 
@@ -1435,6 +1657,7 @@ p256_random_scalar:
      w14 <= URND(127) + 1 = x */
   bn.wsrr   w14, URND
   bn.addi   w14, w14, 1
+  bn.addi   w31, w31, 0  /* dummy instruction to clear flags */
 
   /* w12 <= ([w15,w16] * w14) mod n = (seed0 * x) mod n */
   bn.mov    w24, w15
@@ -1536,7 +1759,7 @@ p256_generate_k:
   bn.sid    x2, 0(x20)
 
   /* Write second share to DMEM.
-       dmem[k1] <= w15, w16 = k0 */
+       dmem[k1] <= w17, w18 = k1 */
   la        x20, k1
   li        x2, 17
   bn.sid    x2, 0(x20++)
@@ -1599,7 +1822,7 @@ boolean_to_arithmetic:
        [w11, w10] <= s1 mod 2^320 = x1 */
   bn.rshi   w21, w21, w31 >> 64
   bn.rshi   w21, w31, w21 >> 192
-  bn.rshi   w31, w31, w31 >> 192 # dummy instruction to flush ALU datapath
+  bn.rshi   w31, w31, w31 >> 192  /* dummy instruction to flush ALU datapath */
   bn.rshi   w11, w11, w31 >> 64
   bn.rshi   w11, w31, w11 >> 192
 
@@ -1618,7 +1841,7 @@ boolean_to_arithmetic:
        [w4, w3] <= [w4, w3] - [w2, w1] = ((s0 ^ gamma) - gamma) mod 2^512 */
   bn.sub    w3, w3, w1
   bn.subb   w4, w4, w2
-  bn.sub    w31, w31, w31 # dummy instruction to clear flags
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* Truncate subtraction result to 321 bits.
        [w4, w3] <= [w4, w3] mod 2^321 = T */
@@ -1640,7 +1863,7 @@ boolean_to_arithmetic:
   /* [w21, w20] <= [w21, w20] - [w2, w1] = ((s0 ^ G) - G) mod 2^512 */
   bn.sub    w20, w20, w1
   bn.subb   w21, w21, w2
-  bn.sub    w31, w31, w31 # dummy instruction to clear flags
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w21, w20] <= [w21, w20] mod 2^321 = A */
   bn.rshi   w21, w21, w31 >> 65
@@ -1659,6 +1882,7 @@ boolean_to_arithmetic:
   /* remove fresh mask */
   bn.xor    w20, w28, w20
   bn.xor    w21, w29, w21
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
 
@@ -1757,9 +1981,17 @@ p256_key_from_seed:
   /* Compute d1. Because 2^320 < 2 * (n << 64), a conditional subtraction is
      sufficient to reduce. Similarly to the carry bit, the conditional bit here
      is not very sensitive because the shares are large relative to n.
+
+     N.B. Even though the conditional bit isn't sensitive here, other flags set
+     by the above subtraction (i.e. the LSB flag) may be; the dummy instruction
+     below serves both to clear these flags as well as to separate instructions
+     accessing w11 and w21 respectively, as these form the upper words of a
+     pair of secret shares.
+
        [w11,w10] <= x1 mod (n << 64) = d1 */
   bn.sel    w10, w10, w24, FG0.C
   bn.sel    w11, w11, w25, FG0.C
+  bn.sub    w23, w23, w23  /* dummy instruction to clear flags */
 
   /* Isolate the carry bit and shift it back into position.
        w25 <= x0[320] << 64 */
@@ -1786,6 +2018,11 @@ p256_key_from_seed:
 
   /* Compute d0 with a modular subtraction. First we add (n << 64) to protect
      against underflow, then conditionally subtract it again if needed.
+
+     N.B. we also insert a dummy instruction at the end of this routine, as
+     the flags set will reveal information regarding the partial share in w21
+     in the case that the final conditional subtraction is performed.
+
        [w21,w20] <= ([w21, w20] - [w25,w24]) mod (n << 64) = d0 */
   bn.add    w20, w20, w28
   bn.addc   w21, w21, w29
@@ -1795,6 +2032,116 @@ p256_key_from_seed:
   bn.subb   w27, w21, w29
   bn.sel    w20, w20, w26, FG0.C
   bn.sel    w21, w21, w27, FG0.C
+  bn.sub    w23, w23, w23  /* dummy instruction to clear flags */
+
+  ret
+
+/**
+ * Routine to hide a masked scalar.
+ *
+ * Adds a multiple of the curve order n to both shares of the
+ * secret scalar d.
+ *
+ * For each share s a 65 bit random number r is generated and added
+ * to the s as follows:
+ *
+ * s = (s + r * n) mod (n << 65)
+ *
+ * @param[in]           w31: all-zero
+ * @param[in,out]  [w1, w0]: first share of scalar d (321 bits)
+ * @param[in,out]  [w3, w2]: first share of scalar d (321 bits)
+ *
+ * clobbered registers: x10-x11, w0-w5, w19-w23
+ * clobbered flag groups: FG0
+ */
+p256_masked_scalar_reblind:
+  /* Initialize all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Hide first share of scalar d in [w1, w0]. */
+  bn.mov w4, w0
+  bn.mov w5, w1
+  jal    x1, p256_scalar_reblind
+  bn.mov w0, w20
+  bn.mov w1, w21
+
+  /* Clear w4 and w5 which contain the first share of scalar d. */
+  bn.xor w4, w4, w4
+  bn.xor w5, w5, w5
+
+  /* Hide second share of scalar d in [w3, w2]. */
+  bn.mov w4, w2
+  bn.mov w5, w3
+  jal    x1, p256_scalar_reblind
+  bn.mov w2, w20
+  bn.mov w3, w21
+
+  /* Clear w4 and w5 which contain the second share of scalar d. */
+  bn.xor w4, w4, w4
+  bn.xor w5, w5, w5
+
+  ret
+
+/**
+ * Helper routine to hide a scalar.
+ *
+ * Adds a multiple of the curve order n to the secret scalar d.
+ *
+ * A 65 bit random number r is generated and added
+ * to d as follows:
+ *
+ * d = (d + r * n) mod (n << 65)
+ *
+ * @param[in]         w31: all-zero
+ * @param[in]    [w5, w4]: scalar d (321 bits)
+ * @param[out] [w21, w20]: hidden scalar d (321 bits)
+ *
+ * clobbered registers: x10-x11, w19-w23
+ * clobbered flag groups: FG0
+ */
+p256_scalar_reblind:
+
+  /* Zero out multiplication registers. */
+  bn.xor w22, w22, w22
+  bn.xor w23, w23, w23
+
+  /* Get a fresh 65-bit random value r from URND.
+       w20 = URND() */
+  bn.wsrr   w20, URND
+  bn.rshi   w20, w31, w20 >> 191
+
+  /* Load curve order n from DMEM.
+       w19 <= dmem[p256_n] = n */
+  la        x10, p256_n
+  li        x11, 19
+  bn.lid    x11, 0(x10)
+
+  /* [w23,w22] <= m = r * n */
+  bn.mulqacc.z          w20.0, w19.0,  0
+  bn.mulqacc            w20.1, w19.0, 64
+  bn.mulqacc.so  w22.L, w20.0, w19.1, 64
+  bn.mulqacc            w20.1, w19.1,  0
+  bn.mulqacc            w20.0, w19.2,  0
+  bn.mulqacc            w20.1, w19.2, 64
+  bn.mulqacc.so  w22.U, w20.0, w19.3, 64
+  bn.mulqacc.so  w23.L, w20.1, w19.3,  0
+
+  /* [w21,w20] <= d + m */
+  bn.add    w20, w4, w22
+  bn.addc   w21, w5, w23
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
+
+  /* [w22,w23] <= n << 65 */
+  bn.rshi   w22, w19, w31 >> 191
+  bn.rshi   w23, w31, w19 >> 191
+
+  /* Reduce d + m modulo (n << 65) with a conditional subtraction.
+       [w20,w21] <= d + m mod (n << 65) */
+  bn.sub    w22, w20, w22
+  bn.subb   w23, w21, w23
+  bn.sel    w20, w20, w22, FG0.C
+  bn.sel    w21, w21, w23, FG0.C
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
 
diff --git a/sw/otbn/crypto/p256_ecdh.s b/sw/otbn/crypto/p256_ecdh.s
deleted file mode 100644
index 9707f1332d04a..0000000000000
--- a/sw/otbn/crypto/p256_ecdh.s
+++ /dev/null
@@ -1,277 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Elliptic-curve Diffie-Hellman (ECDH) on curve P-256.
- *
- * This binary has the following modes of operation:
- * 1. MODE_KEYGEN_RANDOM: generate a random keypair
- * 2. MODE_SHARED_KEYGEN: compute shared key
- * 3. MODE_KEYGEN_FROM_SEED: generate keypair from a sideloaded seed
- * 4. MODE_SHARED_KEYGEN_FROM_SEED: compute shared key using sideloaded seed
- */
-
-/**
- * Mode magic values generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 4 -n 11 \
- *    --avoid-zero -s 3660400884
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_KEYPAIR_RANDOM, 0x3f1
-.equ MODE_SHARED_KEY, 0x5ec
-.equ MODE_KEYPAIR_FROM_SEED, 0x29f
-.equ MODE_SHARED_KEY_FROM_SEED, 0x74b
-
-/**
- * Hardened boolean values.
- *
- * Should match the values in `hardened_asm.h`.
- */
-.equ HARDENED_BOOL_TRUE, 0x739
-.equ HARDENED_BOOL_FALSE, 0x1d4
-
-.section .text.start
-start:
-  /* Init all-zero register. */
-  bn.xor  w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la      x2, mode
-  lw      x2, 0(x2)
-
-  addi    x3, x0, MODE_KEYPAIR_RANDOM
-  beq     x2, x3, keypair_random
-
-  addi    x3, x0, MODE_SHARED_KEY
-  beq     x2, x3, shared_key
-
-  addi    x3, x0, MODE_KEYPAIR_FROM_SEED
-  beq     x2, x3, keypair_from_seed
-
-  addi    x3, x0, MODE_SHARED_KEY_FROM_SEED
-  beq     x2, x3, shared_key_from_seed
-
-  /* Unsupported mode; fail. */
-  unimp
-  unimp
-  unimp
-
-/**
- * Generate a fresh random keypair.
- *
- * Returns secret key d in 320b shares d0, d1.
- *
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * This routine runs in constant time (except potentially waiting for entropy
- * from RND).
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d1]: Second share of secret key.
- * @param[out]  dmem[x]: Public key x-coordinate.
- * @param[out]  dmem[y]: Public key y-coordinate.
- *
- * clobbered registers: x2, x3, x16, x17, x21, x22, w0 to w26
- * clobbered flag groups: FG0
- */
-keypair_random:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal   x1, p256_generate_random_key
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal      x1, p256_base_mult
-
-  ecall
-
-/**
- * Generate a shared key from a secret and public key.
- *
- * Returns the shared key, which is the affine x-coordinate of (d*Q). The
- * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
- * x1).
- *
- * If `ok` is false, the public key is invalid and the shared key is
- * meaningless. The value will be either HARDENED_BOOL_TRUE or
- * HARDENED_BOOL_FALSE.
- *
- * This routine runs in constant time.
- *
- * @param[in]       w31: all-zero
- * @param[in]  dmem[k0]: First share of secret key.
- * @param[in]  dmem[k1]: Second share of secret key.
- * @param[in]   dmem[x]: Public key (Q) x-coordinate.
- * @param[in]   dmem[y]: Public key (Q) y-coordinate.
- * @param[out] dmem[ok]: Whether the public key is valid.
- * @param[out]  dmem[x]: x0, first share of shared key.
- * @param[out]  dmem[y]: x1, second share of shared key.
- */
-shared_key:
-  /* Validate the public key (ends the program on failure). */
-  jal      x1, p256_check_public_key
-
-  /* If we got here the basic validity checks passed, so set `ok` to true. */
-  la       x2, ok
-  addi     x3, x0, HARDENED_BOOL_TRUE
-  sw       x3, 0(x2)
-
-  /* Generate boolean-masked shared key (d*Q).x.
-       dmem[x] <= x0
-       dmem[y] <= x1 */
-  jal      x1, p256_shared_key
-
-  ecall
-
-/**
- * Generate a keypair from a keymgr-derived seed.
- *
- * Returns secret key d in 320b shares d0, d1.
- *
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * This routine runs in constant time.
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d1]: Second share of secret key.
- * @param[out]  dmem[x]: Public key x-coordinate.
- * @param[out]  dmem[y]: Public key y-coordinate.
- */
-keypair_from_seed:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal   x1, secret_key_from_seed
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal      x1, p256_base_mult
-
-  ecall
-
-/**
- * Generate a shared key from a keymgr-derived seed.
- *
- * Returns the shared key, which is the affine x-coordinate of (d*Q). The
- * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
- * x1).
- *
- * If `ok` is false, the public key is invalid and the shared key is
- * meaningless. The value will be either HARDENED_BOOL_TRUE or
- * HARDENED_BOOL_FALSE.
- *
- * This routine runs in constant time.
- *
- * @param[in]       w31: all-zero
- * @param[in]   dmem[x]: Public key (Q) x-coordinate.
- * @param[in]   dmem[y]: Public key (Q) y-coordinate.
- * @param[out] dmem[ok]: Whether the public key is valid.
- * @param[out]  dmem[x]: x0, first share of shared key.
- * @param[out]  dmem[y]: x1, second share of shared key.
- */
-shared_key_from_seed:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal   x1, secret_key_from_seed
-
-  /* Tail-call shared-key generation. */
-  jal      x0, shared_key
-
-/**
- * Generate a secret key from a keymgr-derived seed.
- *
- * Returns secret key d in 320b shares d0, d1 such that:
- *   (d0 + d1) mod n = (seed0 ^ seed1) mod n
- * ...where seed0 and seed1 are the 320-bit keymgr-provided seed values stored
- * in KEY_S0_{L,H} and KEY_S1_{L,H} WSRs. Note that the keymgr actually
- * provides 384 bits, but these higher bits are ignored.
- *
- * This routine runs in constant time.
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d0]: Second share of secret key.
- *
- * clobbered registers: x2, x3, w1 to w4, w20 to w29
- * clobbered flag groups: FG0
- */
-secret_key_from_seed:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr  w20, KEY_S0_L
-  bn.wsrr  w21, KEY_S0_H
-  bn.wsrr  w10, KEY_S1_L
-  bn.wsrr  w11, KEY_S1_H
-
-  /* Generate secret key shares.
-       w20, w21 <= d0
-       w10, w11 <= d1 */
-  jal      x1, p256_key_from_seed
-
-  /* Store secret key shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  li       x2, 20
-  la       x3, d0
-  bn.sid   x2++, 0(x3)
-  bn.sid   x2++, 32(x3)
-  li       x2, 10
-  la       x3, d1
-  bn.sid   x2++, 0(x3)
-  bn.sid   x2, 32(x3)
-
-  ret
-
-.bss
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* Success code for basic validity checks on the public key. */
-.globl ok
-.balign 4
-ok:
-  .zero 4
-
-/* Public key (Q) x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 32
-
-/* Public key y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 32
-
-/* Secret key (d) in two shares: d = (d0 + d1) mod n. */
-.globl d0
-.balign 32
-d0:
-k0:
-  .zero 64
-
-.globl d1
-.balign 32
-d1:
-k1:
-  .zero 64
diff --git a/sw/otbn/crypto/p256_ecdsa.s b/sw/otbn/crypto/p256_ecdsa.s
deleted file mode 100644
index 3b3ed9695c952..0000000000000
--- a/sw/otbn/crypto/p256_ecdsa.s
+++ /dev/null
@@ -1,278 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Entrypoint for P-256 ECDSA operations.
- *
- * This binary has the following modes of operation:
- * 1. MODE_KEYGEN: generate a new keypair
- * 2. MODE_SIGN: generate signature using caller-provided secret key
- * 3. MODE_VERIFY: verify a signature
- * 4. MODE_SIDELOAD_KEYGEN: generate a keypair from a sideloaded seed
- * 5. MODE_SIDELOAD_SIGN: generate signature using sideloaded secret key/seed
- */
-
-/**
- * Mode magic values, generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 5 -n 11 \
- *     --avoid-zero -s 2205231843
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_KEYGEN, 0x3d4
-.equ MODE_SIGN, 0x15b
-.equ MODE_VERIFY, 0x727
-.equ MODE_SIDELOAD_KEYGEN, 0x5e8
-.equ MODE_SIDELOAD_SIGN, 0x49e
-
-.section .text.start
-.globl start
-start:
-  /* Read the mode and tail-call the requested operation. */
-  la    x2, mode
-  lw    x2, 0(x2)
-
-  addi  x3, x0, MODE_KEYGEN
-  beq   x2, x3, random_keygen
-
-  addi  x3, x0, MODE_SIGN
-  beq   x2, x3, ecdsa_sign
-
-  addi  x3, x0, MODE_VERIFY
-  beq   x2, x3, ecdsa_verify
-
-  addi  x3, x0, MODE_SIDELOAD_KEYGEN
-  beq   x2, x3, sideload_keygen
-
-  addi  x3, x0, MODE_SIDELOAD_SIGN
-  beq   x2, x3, sideload_ecdsa_sign
-
-  /* Invalid mode; fail. */
-  unimp
-  unimp
-  unimp
-
-/**
- * Generate a fresh, random keypair.
- *
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d1]: Second share of secret key.
- * @param[out]  dmem[x]: Public key x-coordinate.
- * @param[out]  dmem[y]: Public key y-coordinate.
- */
-random_keygen:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal      x1, p256_generate_random_key
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal      x1, p256_base_mult
-
-  ecall
-
-/**
- * Generate a signature.
- *
- * @param[in]  dmem[msg]: message to be signed (256 bits)
- * @param[in]  dmem[r]:   dmem buffer for r component of signature (256 bits)
- * @param[in]  dmem[s]:   dmem buffer for s component of signature (256 bits)
- * @param[in]  dmem[d0]:  first share of private key d (320 bits)
- * @param[in]  dmem[d1]:  second share of private key d (320 bits)
- */
-ecdsa_sign:
-  /* Generate a fresh random scalar for signing.
-       dmem[k0] <= first share of k
-       dmem[k1] <= second share of k */
-  jal      x1, p256_generate_k
-
-  /* Generate the signature. */
-  jal      x1, p256_sign
-
-  ecall
-
-/**
- * Verify a signature.
- *
- * The result of the verification is returned in two variables: `ok`
- * indicates whether the signature passed basic validity checks, and `x_r`
- * indicates the recovered value. A signature passes verification only if BOTH:
- * - `ok` is true, and
- * - `x_r` is equal to the original `r` value.
- *
- * If `ok` is false, the value in `x_r` is meaningless; callers
- * should check both.
- *
- * @param[in]  dmem[msg]: message to be verified (256 bits)
- * @param[in]  dmem[r]:   r component of signature (256 bits)
- * @param[in]  dmem[s]:   s component of signature (256 bits)
- * @param[in]  dmem[x]:   affine x-coordinate of public key (256 bits)
- * @param[in]  dmem[y]:   affine y-coordinate of public key (256 bits)
- * @param[out] dmem[ok]:  success/failure of basic checks (32 bits)
- * @param[out] dmem[x_r]: dmem buffer for reduced affine x_r-coordinate (x_1)
- */
-ecdsa_verify:
-  /* Validate the public key (ends the program on failure). */
-  jal      x1, p256_check_public_key
-
-  /* Verify the signature (compute x_r). */
-  jal      x1, p256_verify
-
-  ecall
-
-/**
- * Generate a keypair from a sideloaded seed.
- *
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d1]: Second share of secret key.
- * @param[out]  dmem[x]: Public key x-coordinate.
- * @param[out]  dmem[y]: Public key y-coordinate.
- */
-sideload_keygen:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal   x1, secret_key_from_seed
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal      x1, p256_base_mult
-
-  ecall
-
-/**
- * Generate a signature using a private key from a sideloaded seed.
- *
- * @param[in]  dmem[msg]: message to be signed (256 bits)
- * @param[in]  dmem[r]:   dmem buffer for r component of signature (256 bits)
- * @param[in]  dmem[s]:   dmem buffer for s component of signature (256 bits)
- */
-sideload_ecdsa_sign:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal   x1, secret_key_from_seed
-
-  /* Tail-call signature-generation routine. */
-  jal      x0, ecdsa_sign
-
-/**
- * Generate a secret key from a keymgr-derived seed.
- *
- * @param[out] dmem[d0]: First share of secret key.
- * @param[out] dmem[d0]: Second share of secret key.
- */
-secret_key_from_seed:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr  w20, KEY_S0_L
-  bn.wsrr  w21, KEY_S0_H
-  bn.wsrr  w10, KEY_S1_L
-  bn.wsrr  w11, KEY_S1_H
-
-  /* Init all-zero register. */
-  bn.xor   w31, w31, w31
-
-  /* Generate secret key shares.
-       w20, w21 <= d0
-       w10, w11 <= d1 */
-  jal      x1, p256_key_from_seed
-
-  /* TODO(##19875): do not store keymgr-derived values in DMEM! */
-  /* Store secret key shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  li       x2, 20
-  la       x3, d0
-  bn.sid   x2++, 0(x3)
-  bn.sid   x2++, 32(x3)
-  li       x2, 10
-  la       x3, d1
-  bn.sid   x2++, 0(x3)
-  bn.sid   x2, 32(x3)
-
-  ret
-
-.bss
-
-/* Operation mode. */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* Success code for basic validity checks on the public key and signature. */
-.globl ok
-.balign 4
-ok:
-  .zero 4
-
-/* Message digest. */
-.globl msg
-.balign 32
-msg:
-  .zero 32
-
-/* Signature R. */
-.globl r
-.balign 32
-r:
-  .zero 32
-
-/* Signature S. */
-.globl s
-.balign 32
-s:
-  .zero 32
-
-/* Public key x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 32
-
-/* Public key y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 32
-
-/* Private key (d) in two shares: d = (d0 + d1) mod n. */
-.globl d0
-.balign 32
-d0:
-  .zero 64
-.globl d1
-.balign 32
-d1:
-  .zero 64
-
-/* Verification result x_r (aka x_1). */
-.globl x_r
-.balign 32
-x_r:
-  .zero 32
-
-.section .scratchpad
-
-/* Secret scalar (k) in two shares: k = (k0 + k1) mod n */
-.globl k0
-.balign 32
-k0:
-  .zero 64
-
-.globl k1
-.balign 32
-k1:
-  .zero 64
diff --git a/sw/otbn/crypto/p256_isoncurve.s b/sw/otbn/crypto/p256_isoncurve.s
index 4840d3cf85d75..b2ae4d37cc6f2 100644
--- a/sw/otbn/crypto/p256_isoncurve.s
+++ b/sw/otbn/crypto/p256_isoncurve.s
@@ -41,7 +41,7 @@
  * @param[out]     w18: lhs, left side of equation = (x^3 + ax + b) mod p
  * @param[out]     w19: rhs, right side of equation = y^2 mod p
  *
- * clobbered registers: x2, x3, x19, x20, w0, w19 to w29
+ * clobbered registers: x2, x3, x19, x20, w0, w18 to w29
  * clobbered flag groups: FG0
  */
 p256_isoncurve:
@@ -113,7 +113,7 @@ p256_isoncurve:
  * @param[in] dmem[y]: Public key y-coordinate.
  * @param[out] dmem[ok]: success/failure of basic checks (32 bits)
  *
- * clobbered registers: x2, x3, x19, x20, w0, w2, w19 to w29
+ * clobbered registers: x2, x3, x19, x20, w0, w2, w18 to w29
  * clobbered flag groups: FG0
  */
 p256_check_public_key:
diff --git a/sw/otbn/crypto/p256_isoncurve_proj.s b/sw/otbn/crypto/p256_isoncurve_proj.s
new file mode 100644
index 0000000000000..2ce39ba18aff1
--- /dev/null
+++ b/sw/otbn/crypto/p256_isoncurve_proj.s
@@ -0,0 +1,132 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+.globl p256_isoncurve_proj
+
+/**
+ * Checks if a projective point is a valid curve point on curve P-256 (secp256r1)
+ *
+ * Returns rhs = x^3 + axz^2 + bz^3  mod p
+ *     and lhs = zy^2  mod p
+ *         with x,y,z being the projective coordinates of the curve point
+ *              a, b and p being the domain parameters of P-256
+ *
+ * This routine checks if a point with given projective x- and y-coordinate is
+ * a valid curve point on P-256.
+ * The routine checks whether the coordinates are a solution of the modified
+ * Weierstrass equation zy^2 = x^3 + axz^2 + bz^3  mod p.
+ * The routine makes use of the property that the domain parameter 'a' can be
+ * written as a=-3 for the P-256 curve, hence the routine is limited to P-256.
+ * The routine does not return a boolean result but computes the left side
+ * and the right sight of the Weierstrass equation and leaves the final
+ * comparison to the caller.
+ * The routine runs in constant time.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]      w31: all-zero
+ * @param[in]  dmem[x]: projective x-coordinate of input point
+ * @param[in]  dmem[y]: projective y-coordinate of input point
+ * @param[in]  dmem[z]: projective y-coordinate of input point
+ * @param[out]     w18: lhs, left side of equation = (x^3 + ax + b) mod p
+ * @param[out]     w19: rhs, right side of equation = y^2 mod p
+ *
+ * clobbered registers: x2, x3, x19, x20, w0, w18 to w29
+ * clobbered flag groups: FG0
+ */
+p256_isoncurve_proj:
+  /* Set up for coordinate arithmetic.
+       MOD <= p
+       w28 <= r256
+       w29 <= r448 */
+  jal       x1, setup_modp
+
+  /* load domain parameter b from dmem
+     w27 <= b = dmem[p256_b] */
+  li        x2, 27
+  la        x3, p256_b
+  bn.lid    x2, 0(x3)
+
+  /* load projective z-coordinate of curve point from dmem
+     w26 <= dmem[z] */
+  la        x3, z
+  li        x2, 26
+  bn.lid    x2, 0(x3)
+
+  /* w19 <= z^2 = w26*w26 */
+  bn.mov    w25, w26
+  bn.mov    w24, w26
+  jal       x1, mul_modp
+
+  /* for curve P-256, 'a' can be written as a = -3, therefore we subtract
+     z^2 three times from 0.
+     w18 = az^2 <= -3z^2  mod p */
+  bn.subm   w18, w31, w19
+  bn.subm   w18, w18, w19
+  bn.subm   w18, w18, w19
+
+  /* w19 <= bz^2 = w27*w19 */
+  bn.mov    w25, w27
+  bn.mov    w24, w19
+  jal       x1, mul_modp
+
+  /* w19 <= bz^3 = w26*w19 */
+  bn.mov    w25, w26
+  bn.mov    w24, w19
+  jal       x1, mul_modp
+
+  /* Move the modified b back into w27. */
+  bn.mov    w27, w19
+
+  /* load projective x-coordinate of curve point from dmem
+     w26 <= dmem[x] */
+  la        x3, x
+  li        x2, 26
+  bn.lid    x2, 0(x3)
+
+  /* w19 <= axz^2 = w26*w18 */
+  bn.mov    w25, w26
+  bn.mov    w24, w18
+  jal       x1, mul_modp
+
+  /* Move the modified axz^2 into w18. */
+  bn.mov    w18, w19
+
+  /* w19 <= x^2 = w26*w26 */
+  bn.mov    w25, w26
+  bn.mov    w24, w26
+  jal       x1, mul_modp
+
+  /* w19 = x^3 <= x^2 * x = w25*w24 = w26*w19 */
+  bn.mov    w25, w19
+  bn.mov    w24, w26
+  jal       x1, mul_modp
+
+  /* w18 <= x^3 + axz^2 mod p = w19 + w18 mod p */
+  bn.addm   w18, w19, w18
+
+  /* w18 <= x^3 + axz^2 + bz^3 mod p = w19 + w27 mod p = lhs */
+  bn.addm   w18, w18, w27
+
+  /* Load projective y-coordinate of curve point from dmem
+     w26 <= dmem[y] */
+  la        x3, y
+  li        x2, 24
+  bn.lid    x2, 0(x3)
+
+  /* w19 <= w24*w24 mod p = y^2 mod p */
+  bn.mov    w25, w24
+  jal       x1, mul_modp
+
+  /* load projective z-coordinate of curve point from dmem
+     w26 <= dmem[z] */
+  la        x3, z
+  li        x2, 24
+  bn.lid    x2, 0(x3)
+
+  /* w19 <= w26*w19 mod p = zy^2 mod p */
+  bn.mov    w25, w19
+  jal       x1, mul_modp
+
+  ret
diff --git a/sw/otbn/crypto/p256_shared_key.s b/sw/otbn/crypto/p256_shared_key.s
index 509797337af2b..ddf13a95fad30 100644
--- a/sw/otbn/crypto/p256_shared_key.s
+++ b/sw/otbn/crypto/p256_shared_key.s
@@ -57,13 +57,40 @@ p256_shared_key:
   li        x2, 3
   bn.lid    x2, 0(x16)
 
+  /* Reblind the secret key before running the scalar multiplication. */
+  jal       x1, p256_masked_scalar_reblind
+
   /* Call internal scalar multiplication routine.
      Returns point in projective coordinates.
-     R = (x, y, z) = (w8, w9, w10) <= k*P = w0*P */
+     R = (x, y, z) = (w8, w9, w10) <= d*P = ([w0,w1] + [w2,w3])*P */
   la        x21, x
   la        x22, y
   jal       x1, scalar_mult_int
 
+  /* store result (affine coordinates) in dmem
+     dmem[x] <= x = w8
+     dmem[y] <= y = w9
+     dmem[z] <= z = w10 */
+  li        x2, 8
+  la        x21, x
+  bn.sid    x2++, 0(x21)
+  la        x22, y
+  bn.sid    x2++, 0(x22)
+  la        x21, z
+  bn.sid    x2, 0(x21)
+
+  /* Compute both sides of the Weierstrauss equation.
+       w18 <= (x^3 + ax + b) mod p
+       w19 <= (y^2) mod p */
+  jal      x1, p256_isoncurve_proj
+
+  /* Compare the two sides of the equation to check if the result
+     is a valid point as an FI countermeasure.
+     The check fails if both sides are not equal.
+     FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.cmp   w18, w19
+  jal      x1, trigger_fault_if_fg0_not_z
+
   /* Arithmetic masking:
    1. Generate a random mask
    2. Subtract masks from projective x coordinate
@@ -167,21 +194,24 @@ p256_shared_key:
 arithmetic_to_boolean_mod:
   /* First step: calculate A2B from reduced values. */
 
-  /* Save inputs for second A2B execution.
-     w24 <= w19 = r
-     w25 <= w11 = A */
-  bn.mov    w24, w19
-  bn.mov    w25, w11
+  /* Save inputs for second A2B execution. Also, expand inputs r and A (w19
+     and w11) to 257-bit values [w19,w18] and [w12,w11] and prepare input for
+     257-bit A2B function.
+
+     N.B. Accesses to w19 and w11 have been intentionally made non-sequential to
+     avoid transient side channel leakage.
 
-  /* Expand inputs r and A (w19 and w11) to 257-bit values [w19,w18]
-     and [w12,w11] and prepare input for 257-bit A2B function.
+     w24 <= w19 = r
+     w25 <= w11 = A
      w18 <= w19
      w19 <= w31
      w11 <= w11 -> obsolete
      w12 <= w31 */
+  bn.mov    w24, w19
   bn.mov    w18, w19
-  bn.mov    w19, w31
   bn.mov    w12, w31
+  bn.mov    w19, w31
+  bn.mov    w25, w11
 
   /* Call 257-bit A2B function.
      [w21,w20] <= x' */
@@ -217,10 +247,15 @@ arithmetic_to_boolean_mod:
      w12 <= w12 + 0x2 = A + 2^257
             -> equal to addition of 2^257
                (w11 doesn't need to be touched)
-     [w12,w11] <= [w12,w11] - w29 = (A + 2^257) - p */
+     [w12,w11] <= [w12,w11] - w29 = (A + 2^257) - p
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the subtractions, as their state is dependent on w11 and w12, which is
+     a known constant offset (2^257 - p) from the secret share A. */
   bn.addi   w12, w12, 0x2
   bn.sub    w11, w11, w29
   bn.subb   w12, w12, w31
+  bn.sub    w22, w22, w22  /* dummy instruction to clear flags */
 
   /* Call 257-bit A2B function.
      [w21,w20] <= x' */
@@ -231,13 +266,22 @@ arithmetic_to_boolean_mod:
      w19 <= w24 */
   bn.mov    w19, w24
 
-  /* Check MSB (carry bit) of second A2B result for true or false. */
-  bn.cmp    w21, w31 /* w21 can only be 0x1 or 0x0 */
+  /* Move reduced A2B computation result to a separate register to prevent
+     below bn.sel leaking FG0.Z.
+
+     N.B. The dummy instruction below serves to make the accesses to w19
+     (containing r) and w20 (containing the lower word of x') non-sequential. */
+  bn.mov    w31, w31  /* dummy instruction to avoid transient leakage */
+  bn.mov    w25, w20
+
+  /* Check MSb (carry bit) of second A2B result for true or false. */
+  bn.cmp    w21, w31  /* w21 can only be 0x1 or 0x0 */
 
   /* Return the unreduced A2B computation (second result),
      if zero flag is set, otherwise return the reduced
      A2B computation (first result). */
-  bn.sel    w20, w20, w26, FG0.Z
+  bn.sel    w20, w25, w26, FG0.Z
+  bn.sel    w31, w31, w31, FG0.Z  /* dummy instruction to clear flags */
 
   ret
 
@@ -274,17 +318,20 @@ arithmetic_to_boolean_mod:
  */
 arithmetic_to_boolean:
   /* Initialize inputs: in case of randomness in upper part of inputs
-     truncate to 257 bits. */
-  bn.rshi   w19, w19, w31 >> 1
-  bn.rshi   w19, w31, w19 >> 255
-  bn.rshi   w12, w12, w31 >> 1
-  bn.rshi   w12, w31, w12 >> 255
+     truncate to 257 bits. Also, fetch 257 bits of randomness.
+
+     N.B. Accesses to w19 and w12 have been intentionally made non-sequential to
+     avoid transient side channel leakage.
 
-  /* Fetch 257 bits of randomness.
      [w2,w1] = gamma    <= URND */
+
+  bn.rshi   w19, w19, w31 >> 1
+  bn.rshi   w19, w31, w19 >> 255
   bn.wsrr   w1, URND
   bn.wsrr   w2, URND
   bn.rshi   w2, w31, w2 >> 255
+  bn.rshi   w12, w12, w31 >> 1
+  bn.rshi   w12, w31, w12 >> 255
 
   /* Double gamma and truncate to 257 bits.
      [w4,w3] = T        <= 2 * [w2,w1] = 2 * gamma */
@@ -293,52 +340,76 @@ arithmetic_to_boolean:
   bn.rshi   w4, w4, w31 >> 1
   bn.rshi   w4, w31, w4 >> 255
 
-  /* [w21,w20] = x'     <= [w2,w1] ^ [w19,w18] = gamma ^ r */
+  /* [w21,w20] = x'     <= [w2,w1] ^ [w19,w18] = gamma ^ r
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w18 and w19 is the secret share r. */
   bn.xor    w20, w1, w18
   bn.xor    w21, w2, w19
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w2,w1] & [w21,w20] = gamma & x' */
   bn.and    w5, w1, w20
   bn.and    w6, w2, w21
 
-  /* [w21,w20] = x'     <= [w4,w3] ^ [w12,w11] = T ^ A */
+  /* [w21,w20] = x'     <= [w4,w3] ^ [w12,w11] = T ^ A
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share A. */
   bn.xor    w20, w3, w11
   bn.xor    w21, w4, w12
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w2,w1] = gamma    <= [w2,w1] ^ [w21,w20] = gamma ^ x' */
   bn.xor    w1, w1, w20
   bn.xor    w2, w2, w21
 
-  /* [w2,w1] = gamma    <= [w2,w1] & [w19,w18] = gamma & r */
+  /* [w2,w1] = gamma    <= [w2,w1] & [w19,w18] = gamma & r
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w18 and w19 is the secret share r. */
   bn.and    w1, w1, w18
   bn.and    w2, w2, w19
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w6,w5] ^ [w2,w1] = omega ^ gamma */
   bn.xor    w5, w5, w1
   bn.xor    w6, w6, w2
 
-  /* [w2,w1] = gamma    <= [w4,w3] & [w12,w11] = T & A */
+  /* [w2,w1] = gamma    <= [w4,w3] & [w12,w11] = T & A
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share A. */
   bn.and    w1, w3, w11
   bn.and    w2, w4, w12
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w6,w5] ^ [w2,w1] = omega ^ gamma */
   bn.xor    w5, w5, w1
   bn.xor    w6, w6, w2
 
   /* Loop for k = 1 to K - 1 = 257 - 1 */
-  loopi     256, 12
+  loopi     256, 14
+
+    /* [w2,w1] = gamma  <= [w4,w3] & [w19,w18] = T & r
 
-    /* [w2,w1] = gamma  <= [w4,w3] & [w19,w18] = T & r */
+       N.B. The dummy instruction below is to clear the flags from performing
+       the XORs, as their input in w18 and w19 is the secret share r. */
     bn.and     w1, w3, w18
     bn.and     w2, w4, w19
+    bn.xor     w31, w31, w31  /* dummy instruction to clear flags */
 
     /* [w2,w1] = gamma  <= [w2,w1] ^ [w6,w5] = gamma ^ omega */
     bn.xor     w1, w1, w5
     bn.xor     w2, w2, w6
 
-    /* [w4,w3] = T      <= [w4,w3] & [w12,w11] = T & A */
+    /* [w4,w3] = T      <= [w4,w3] & [w12,w11] = T & A
+
+       N.B. The dummy instruction below is to clear the flags from performing
+       the XORs, as their input in w11 and w12 is the secret share A. */
     bn.and     w3, w3, w11
     bn.and     w4, w4, w12
+    bn.xor     w31, w31, w31  /* dummy instruction to clear flags */
 
     /* [w2,w1] = gamma  <= [w2,w1] ^ [w4,w3] = gamma ^ T */
     bn.xor     w1, w1, w3
@@ -351,8 +422,12 @@ arithmetic_to_boolean:
     bn.rshi   w4, w4, w31 >> 1
     bn.rshi   w4, w31, w4 >> 255
 
-  /* [w21,w20] = x'     <= [w21,w20] ^ [w4,w3] = x' ^ T */
+  /* [w21,w20] = x'     <= [w21,w20] ^ [w4,w3] = x' ^ T
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their result in w20 and w21 is the secret share x'. */
   bn.xor    w20, w20, w3
   bn.xor    w21, w21, w4
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
diff --git a/sw/otbn/crypto/p256_sign.s b/sw/otbn/crypto/p256_sign.s
index f4e991c88cd5a..66a186b1fd5d8 100644
--- a/sw/otbn/crypto/p256_sign.s
+++ b/sw/otbn/crypto/p256_sign.s
@@ -64,7 +64,7 @@
  * Flags: When leaving this subroutine, the M, L and Z flags of FG0 depend on
  *        the computed affine y-coordinate.
  *
- * clobbered registers: x2, x3, x16 to x23, w0 to w26
+ * clobbered registers: x2, x3, x16 to x23, w0 to w29
  * clobbered flag groups: FG0
  */
 p256_sign:
@@ -97,7 +97,8 @@ p256_sign:
   bn.lid    x2, 0(x3)
 
   /* scalar multiplication with base point (projective)
-     (x_1, y_1, z_1) = (w8, w9, w10) <= k*G = w0*(dmem[p256_gx], dmem[p256_gy]) */
+     (x_1, y_1, z_1) = (w8, w9, w10) <= k*G
+         = ([w0,w1] + [w2,w3])*(dmem[p256_gx], dmem[p256_gy]) */
   la        x21, p256_gx
   la        x22, p256_gy
   jal       x1, scalar_mult_int
@@ -106,6 +107,27 @@ p256_sign:
      R = (x_a, y_a) = (w11, w12) */
   jal       x1, proj_to_affine
 
+  /* store result (affine coordinates) in dmem
+     dmem[x] <= x_a = w11
+     dmem[y] <= y_a = w12 */
+  li        x2, 11
+  la        x21, x
+  bn.sid    x2++, 0(x21)
+  la        x22, y
+  bn.sid    x2, 0(x22)
+
+  /* Compute both sides of the Weierstrauss equation.
+       w18 <= (x^3 + ax + b) mod p
+       w19 <= (y^2) mod p */
+  jal      x1, p256_isoncurve
+
+  /* Compare the two sides of the equation to check if the result
+     is a valid point as an FI countermeasure.
+     The check fails if both sides are not equal.
+     FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.cmp   w18, w19
+  jal      x1, trigger_fault_if_fg0_not_z
+
   /* setup modulus n (curve order) and Barrett constant
      MOD <= w29 <= n = dmem[p256_n]; w28 <= u_n = dmem[p256_u_n]  */
   li        x2, 29
@@ -157,22 +179,89 @@ p256_sign:
   /* w1 <= w0^-1 mod n = (k * alpha)^-1 mod n */
   jal       x1, mod_inv
 
+  /* [w7,w0] <= n << 64 */
+  bn.rshi w0, w29, w31 >> 192
+  bn.rshi w7, w31, w29 >> 192
+
+  /* Load 320 bits of randomness into [w15,w14] */
+  bn.wsrr  w14, URND
+  bn.wsrr  w15, URND
+  bn.rshi  w15, w31, w15 >> 192
+
+  /* [w27,w26] <= [w15,w14] - [w7,w0] = rand(320) - (n << 64) */
+  bn.sub    w26, w14, w0
+  bn.subb   w27, w15, w7
+
+  /* [w25,w24] <= m mod (n << 64) */
+  bn.sel    w24, w14, w26, FG0.C
+  bn.sel    w25, w15, w27, FG0.C
+
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.wsrr    w2, URND
+  bn.wsrr    w3, URND
+  bn.wsrr   w14, URND
+  bn.wsrr   w15, URND
+  bn.wsrr   w26, URND
+  bn.wsrr   w27, URND
+
   /* Load first share of secret key d from dmem.
-       w2,w3 = dmem[d0] */
+       w14,w15 = dmem[d0] */
   la        x16, d0
-  li        x2, 2
+  li        x2, 14
   bn.lid    x2, 0(x16++)
-  li        x2, 3
+  li        x2, 15
   bn.lid    x2, 0(x16)
 
+  /* [w15,w14] <= d0 + m */
+  bn.add    w14, w14, w24
+  bn.addc   w15, w15, w25
+
+  /* [w27,w26] <= d0 + m - (n << 64) */
+  bn.sub    w26, w14, w0
+  bn.subb   w27, w15, w7
+
+  /* [w3,w2] <= d0 + m mod (n << 64) */
+  bn.sel    w2, w14, w26, FG0.C
+  bn.sel    w3, w15, w27, FG0.C
+
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.wsrr    w5, URND
+  bn.wsrr    w6, URND
+  bn.wsrr   w14, URND
+  bn.wsrr   w15, URND
+  bn.wsrr   w26, URND
+  bn.wsrr   w27, URND
+
   /* Load second share of secret key d from dmem.
-       w5,w6 = dmem[d1] */
+       w14,w15 = dmem[d1] */
   la        x16, d1
-  li        x2, 5
+  li        x2, 14
   bn.lid    x2, 0(x16++)
-  li        x2, 6
+  li        x2, 15
   bn.lid    x2, 0(x16)
 
+  /* [w15,w14] <= d1 - m */
+  bn.sub    w14, w14, w24, FG1
+  bn.subb   w15, w15, w25, FG1
+
+  /* [w27,w26] <= d1 - m + (n << 64) */
+  bn.add    w26, w14, w0
+  bn.addc   w27, w15, w7
+
+  /* [w6,w5] <= d1 - m mod (n << 64) */
+  bn.sel    w5, w26, w14, FG1.C
+  bn.sel    w6, w27, w15, FG1.C
+
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.sub    w31, w31, w31, FG1
+  bn.wsrr   w14, URND
+  bn.wsrr   w15, URND
+  bn.wsrr   w26, URND
+  bn.wsrr   w27, URND
+
   /* w0 <= ([w2,w3] * w4) mod n = (d0 * alpha) mod n */
   bn.mov    w24, w2
   bn.mov    w25, w3
diff --git a/sw/otbn/crypto/p384_a2b.s b/sw/otbn/crypto/p384_a2b.s
index 8f750b44ead5a..6fc95deac2695 100644
--- a/sw/otbn/crypto/p384_a2b.s
+++ b/sw/otbn/crypto/p384_a2b.s
@@ -50,6 +50,7 @@ p384_arithmetic_to_boolean_mod:
      [w26,w25] <= [w12,w11] = A */
   bn.mov    w23, w18
   bn.mov    w24, w19
+  bn.xor    w31, w31, w31 /* Dummy instruction to avoid consecutive share access. */
   bn.mov    w25, w11
   bn.mov    w26, w12
 
@@ -68,6 +69,7 @@ p384_arithmetic_to_boolean_mod:
      prepare input for 385-bit A2B function. */
   bn.mov    w18, w23
   bn.mov    w19, w24
+  bn.xor    w31, w31, w31 /* Dummy instruction to avoid consecutive share access. */
   bn.mov    w11, w25
   bn.mov    w12, w26
 
@@ -79,16 +81,19 @@ p384_arithmetic_to_boolean_mod:
   bn.sub    w11, w11, w13
   bn.subb   w12, w12, w14
 
+  /* Clear flags. */
+  bn.sub    w31, w31, w31
+
   /* Call 385-bit A2B function.
-     [w21,w20] <= x' */
-  jal       x1, p384_arithmetic_to_boolean
 
-  /* Restore initial mask input of w19 for consistency
-     in calling functions.
-     w18 <= w23
-     w19 <= w24 */
-  bn.mov    w18, w23
-  bn.mov    w19, w24
+     N.B. To avoid leaking the MSB of the second A2B result below, we move the
+     result from [w21,w20] to [w1,w0] so that the bn.sel instructions below
+     don't reuse their destination as a source.
+
+     [w2,w1] <= x' */
+  jal       x1, p384_arithmetic_to_boolean
+  bn.mov    w1, w20
+  bn.mov    w2, w21
 
   /* Check MSB (carry bit) of second A2B result for true or false. */
   bn.cmp    w31, w21 >> 128
@@ -96,8 +101,16 @@ p384_arithmetic_to_boolean_mod:
   /* Return the unreduced A2B computation (second result),
      if zero flag is set, otherwise return the reduced
      A2B computation (first result). */
-  bn.sel    w20, w20, w27, FG0.Z
-  bn.sel    w21, w21, w28, FG0.Z
+  bn.sel    w20, w1, w27, FG0.Z
+  bn.sel    w21, w2, w28, FG0.Z
+  bn.cmp    w31, w31  /* dummy instruction to clear flags */
+
+  /* Restore initial mask input of w19 for consistency
+     in calling functions.
+     w18 <= w23
+     w19 <= w24 */
+  bn.mov    w18, w23
+  bn.mov    w19, w24
 
   ret
 
@@ -146,52 +159,80 @@ p384_arithmetic_to_boolean:
   bn.rshi   w4, w4, w31 >> 129
   bn.rshi   w4, w31, w4 >> 127
 
-  /* [w21,w20] = x'     <= [w2,w1] ^ [w19,w18] = gamma ^ r */
+  /* Clear flags. */
+  bn.add    w31, w31, w31
+
+  /* [w21,w20] = x'     <= [w2,w1] ^ [w19,w18] = gamma ^ r
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w18 and w19 is the secret share r. */
   bn.xor    w20, w1, w18
   bn.xor    w21, w2, w19
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w2,w1] & [w21,w20] = gamma & x' */
   bn.and    w5, w1, w20
   bn.and    w6, w2, w21
+  bn.and    w31, w31, w31  /* dummy instruction to clear flags */
+
+  /* [w21,w20] = x'     <= [w4,w3] ^ [w12,w11] = T ^ A
 
-  /* [w21,w20] = x'     <= [w4,w3] ^ [w12,w11] = T ^ A */
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share A. */
   bn.xor    w20, w3, w11
   bn.xor    w21, w4, w12
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w2,w1] = gamma    <= [w2,w1] ^ [w21,w20] = gamma ^ x' */
   bn.xor    w1, w1, w20
   bn.xor    w2, w2, w21
 
-  /* [w2,w1] = gamma    <= [w2,w1] & [w19,w18] = gamma & r */
+  /* [w2,w1] = gamma    <= [w2,w1] & [w19,w18] = gamma & r
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w18 and w19 is the secret share r. */
   bn.and    w1, w1, w18
   bn.and    w2, w2, w19
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w6,w5] ^ [w2,w1] = omega ^ gamma */
   bn.xor    w5, w5, w1
   bn.xor    w6, w6, w2
 
-  /* [w2,w1] = gamma    <= [w4,w3] & [w12,w11] = T & A */
+  /* [w2,w1] = gamma    <= [w4,w3] & [w12,w11] = T & A
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share A. */
   bn.and    w1, w3, w11
   bn.and    w2, w4, w12
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w6,w5] = omega    <= [w6,w5] ^ [w2,w1] = omega ^ gamma */
   bn.xor    w5, w5, w1
   bn.xor    w6, w6, w2
 
   /* Loop for k = 1 to K - 1 = 385 - 1 */
-  loopi     384, 12
+  loopi     384, 14
+
+    /* [w2,w1] = gamma  <= [w4,w3] & [w19,w18] = T & r
 
-    /* [w2,w1] = gamma  <= [w4,w3] & [w19,w18] = T & r */
+       N.B. The dummy instruction below is to clear the flags from performing
+       the XORs, as their input in w18 and w19 is the secret share r. */
     bn.and     w1, w3, w18
     bn.and     w2, w4, w19
+    bn.xor     w31, w31, w31  /* dummy instruction to clear flags */
 
     /* [w2,w1] = gamma  <= [w2,w1] ^ [w6,w5] = gamma ^ omega */
     bn.xor     w1, w1, w5
     bn.xor     w2, w2, w6
 
-    /* [w4,w3] = T      <= [w4,w3] & [w12,w11] = T & A */
+    /* [w4,w3] = T      <= [w4,w3] & [w12,w11] = T & A
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share A. */
     bn.and     w3, w3, w11
     bn.and     w4, w4, w12
+    bn.xor     w31, w31, w31  /* dummy instruction to clear flags */
 
     /* [w2,w1] = gamma  <= [w2,w1] ^ [w4,w3] = gamma ^ T */
     bn.xor     w1, w1, w3
@@ -204,8 +245,15 @@ p384_arithmetic_to_boolean:
     bn.rshi   w4, w4, w31 >> 129
     bn.rshi   w4, w31, w4 >> 127
 
-  /* [w21,w20] = x'     <= [w21,w20] ^ [w4,w3] = x' ^ T */
+    /* Clear flags. */
+    bn.add    w31, w31, w31
+
+  /* [w21,w20] = x'     <= [w21,w20] ^ [w4,w3] = x' ^ T
+
+     N.B. The dummy instruction below is to clear the flags from performing
+     the XORs, as their input in w11 and w12 is the secret share x'. */
   bn.xor    w20, w20, w3
   bn.xor    w21, w21, w4
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
diff --git a/sw/otbn/crypto/p384_b2a.s b/sw/otbn/crypto/p384_b2a.s
index ac035627619ba..a00610b2c8815 100644
--- a/sw/otbn/crypto/p384_b2a.s
+++ b/sw/otbn/crypto/p384_b2a.s
@@ -63,7 +63,7 @@ p384_boolean_to_arithmetic:
        [w4, w3] <= [w4, w3] - [w2, w1] = ((s0 ^ gamma) - gamma) mod 2^512 */
   bn.sub    w3, w3, w1
   bn.subb   w4, w4, w2
-  bn.sub    w31, w31, w31 # dummy instruction to clear flags
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* Truncate subtraction result to 385 bits.
        [w4, w3] <= [w4, w3] mod 2^385 = T */
@@ -85,7 +85,7 @@ p384_boolean_to_arithmetic:
   /* [w21, w20] <= [w21, w20] - [w2, w1] = ((s0 ^ G) - G) mod 2^512 */
   bn.sub    w20, w20, w1
   bn.subb   w21, w21, w2
-  bn.sub    w31, w31, w31 # dummy instruction to clear flags
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   /* [w21, w20] <= [w21, w20] mod 2^385 = A */
   bn.rshi   w21, w21, w31 >> 129
@@ -104,5 +104,6 @@ p384_boolean_to_arithmetic:
   /* remove fresh mask */
   bn.xor    w20, w28, w20
   bn.xor    w21, w29, w21
+  bn.xor    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
diff --git a/sw/otbn/crypto/p384_base.s b/sw/otbn/crypto/p384_base.s
index 799f5ddd1bd73..570960a5db390 100644
--- a/sw/otbn/crypto/p384_base.s
+++ b/sw/otbn/crypto/p384_base.s
@@ -66,6 +66,9 @@ mul384:
   bn.mulqacc.so w20.L,  w11.1, w17.0,  64
   bn.mulqacc.so w20.U,  w11.1, w17.1,   0
 
+  bn.wsrw       ACC, w31                  /* clear ACC */
+  bn.mulqacc.wo w31, w31.0, w31.0, 0, FG0 /* clear flags, dummy instruction */
+
   ret
 
 /**
@@ -102,6 +105,9 @@ mul448x128:
   bn.mulqacc.so  w19.U, w11.2, w16.1, 64
   bn.mulqacc.wo    w20, w31.0, w31.0, 0
 
+  bn.wsrw       ACC, w31                  /* clear ACC */
+  bn.mulqacc.wo w31, w31.0, w31.0, 0, FG0 /* clear flags, dummy instruction */
+
   ret
 
 /**
@@ -282,6 +288,9 @@ p384_reduce_n:
   bn.mulqacc            w21.3, w14.1,   0
   bn.mulqacc.wo w24,    w21.3, w14.2,  64
 
+  bn.wsrw       ACC, w31                  /* clear ACC */
+  bn.mulqacc.wo w31, w31.0, w31.0, 0, FG0 /* clear flags, dummy instruction */
+
   /* Construct a 256-bit mask:
        w22 <= 2^256 - 1 */
   bn.not  w22, w31
@@ -311,6 +320,9 @@ p384_reduce_n:
      changing the accumulator. */
   bn.mulqacc.wo w24,    w31.0, w31.0,   0
 
+  bn.wsrw       ACC, w31                  /* clear ACC */
+  bn.mulqacc.wo w31, w31.0, w31.0, 0, FG0 /* clear flags, dummy instruction */
+
   /* Add product to the result to complete the reduction step:
        [w20:w18] = ab[383:0] + (ab[767:384] * K) */
   bn.add  w19, w19, w23
@@ -340,6 +352,9 @@ p384_reduce_n:
   bn.mulqacc.so w23.U,  w21.2, w14.1,  64
   bn.mulqacc.wo w24,    w21.2, w14.2,   0
 
+  bn.wsrw       ACC, w31                  /* clear ACC */
+  bn.mulqacc.wo w31, w31.0, w31.0, 0, FG0 /* clear flags, dummy instruction */
+
   /* Isolate the lower 384 bits:
        w19 <= r[383:256] */
   bn.and  w19, w19, w22 >> 128
diff --git a/sw/otbn/crypto/p384_base_mult.s b/sw/otbn/crypto/p384_base_mult.s
index 42cefed52af4b..58048b528cbfe 100644
--- a/sw/otbn/crypto/p384_base_mult.s
+++ b/sw/otbn/crypto/p384_base_mult.s
@@ -7,6 +7,43 @@
 
  .section .text
 
+/**
+ * Externally callable routine for P-384 base point multiplication
+ *
+ * returns Q = d (*) G
+ *         where Q is a resulting valid P-384 curve point in affine
+ *                   coordinates,
+ *               G is the base point of curve P-384, and
+ *               d is a 384-bit scalar.
+ *
+ * This routine calls the base point multiplication routine.
+ * Furthermore, this routine does an is on curve check on the result.
+ *
+ * @param[in]  dmem[d0]: 1st private key share d0 in dmem
+ * @param[in]  dmem[d1]: 2nd private key share d1 in dmem
+ * @param[out]  dmem[x]: x-coordinate in dmem
+ * @param[out]  dmem[y]: y-coordinate in dmem
+ *
+ * 384-bit quantities have to be provided in dmem in little-endian format,
+ * 512 bit aligned, with the highest 128 bit set to zero.
+ *
+ * Flags: When leaving this subroutine, the M, L and Z flags of FG0 correspond
+ *        to the computed affine y-coordinate.
+ *
+ * clobbered registers: x2, x3, x9 to x13, x17 to x23, x26 to x30
+ *                      w0 to w30
+ * clobbered flag groups: FG0
+ */
+.globl p384_base_mult_checked
+p384_base_mult_checked:
+  jal       x1, p384_base_mult
+
+  /* check if the result is on the p384 curve */
+  jal       x1, p384_isoncurve_check
+
+  ret
+
+
 /**
  * Externally callable routine for P-384 base point multiplication
  *
@@ -73,7 +110,7 @@ p384_base_mult:
 
   /* scalar multiplication in projective space
      [w30:w25] <= (x, y, z) = d * G */
-  jal       x1, scalar_mult_int_p384
+  jal       x1, scalar_mult_int_p384_reblind
 
   /* conversion into affine space
      [w28:w25] <= (x, y) */
@@ -93,39 +130,3 @@ p384_base_mult:
   bn.sid    x2++, 32(x21)
 
   ret
-
-/* variables and scratchpad memory */
-.section .data
-
-.balign 32
-
-/* 1st private key share d0 */
-.globl d0
-.weak d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 */
-.globl d1
-.weak d1
-d1:
-  .zero 64
-
-/* buffer for x-coordinate */
-.globl x
-.weak x
-x:
-  .zero 64
-
-/* buffer for y-coordinate */
-.globl y
-.weak y
-y:
-  .zero 64
-
-/* 704 bytes of scratchpad memory */
-.balign 32
-.globl scratchpad
-.weak scratchpad
-scratchpad:
-  .zero 704
diff --git a/sw/otbn/crypto/p384_curve_point_valid.s b/sw/otbn/crypto/p384_curve_point_valid.s
index f73add4fd0be0..a9eea8cc738eb 100644
--- a/sw/otbn/crypto/p384_curve_point_valid.s
+++ b/sw/otbn/crypto/p384_curve_point_valid.s
@@ -30,17 +30,3 @@ validate_point:
   jal       x1, p384_curve_point_valid
 
   ecall
-
-.data
-
-/* Public key x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* Public key y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 64
diff --git a/sw/otbn/crypto/p384_ecdh.s b/sw/otbn/crypto/p384_ecdh.s
deleted file mode 100644
index b0510208700a9..0000000000000
--- a/sw/otbn/crypto/p384_ecdh.s
+++ /dev/null
@@ -1,276 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Elliptic-curve Diffie-Hellman (ECDH) on curve P-384.
- *
- * This binary has the following modes of operation:
- * 1. MODE_KEYGEN_RANDOM: generate a random keypair
- * 2. MODE_SHARED_KEYGEN: compute shared key - !!! Attention !!! - before
- *                        shared key computation p384_curve_point_valid
- *                        binary has to be executed to check if the provided
- *                        public key is valid.
- * 3. MODE_KEYGEN_FROM_SEED: generate keypair from a sideloaded seed
- * 4. MODE_SHARED_KEYGEN_FROM_SEED: compute shared key using sideloaded seed
- *                                  !!! Attention !!! - before shared key
- *                                  computation p384_curve_point_valid
- *                                  binary has to be executed to check if
- *                                  the provided public key is valid.
- */
-
- /**
- * Mode magic values generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 4 -n 11 \
- *    --avoid-zero -s 3660400884
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_SHARED_KEY, 0x5ec
-.equ MODE_KEYPAIR_RANDOM, 0x3f1
-.equ MODE_KEYPAIR_FROM_SEED, 0x29f
-.equ MODE_SHARED_KEY_FROM_SEED, 0x74b
-
-.section .text.start
-start:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la        x2, mode
-  lw        x2, 0(x2)
-
-  addi      x3, x0, MODE_KEYPAIR_RANDOM
-  beq       x2, x3, keypair_random
-
-  addi      x3, x0, MODE_SHARED_KEY
-  beq       x2, x3, shared_key
-
-  addi      x3, x0, MODE_KEYPAIR_FROM_SEED
-  beq       x2, x3, keypair_from_seed
-
-  addi      x3, x0, MODE_SHARED_KEY_FROM_SEED
-  beq       x2, x3, shared_key_from_seed
-
-  /* Unsupported mode; fail. */
-  unimp
-  unimp
-  unimp
-
-/**
- * Generate a fresh random keypair.
- *
- * Returns secret key d in 448-bit shares d0, d1.
- *
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * This routine runs in constant time (except potentially waiting for entropy
- * from RND).
- *
- * @param[in]        w31: all-zero
- * @param[out]  dmem[d0]: 1st private key share d0
- * @param[out]  dmem[d1]: 2nd private key share d1
- * @param[out]   dmem[x]: Public key x-coordinate
- * @param[out]   dmem[y]: Public key y-coordinate
- *
- * clobbered registers: x2, x3, x9 to x13, x18 to x21, x26 to x30, w0 to w30
- * clobbered flag groups: FG0
- */
-keypair_random:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_generate_random_key
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal       x1, p384_base_mult
-
-  ecall
-
-/**
- * Generate a shared key from a secret and public key.
- *
- * Returns the shared key, which is the affine x-coordinate of (d*Q). The
- * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
- * x1).
- *
- * This routine runs in constant time.
- *
- * !!! Attention !!! - before shared key computation p384_curve_point_valid
- * binary has to be executed to check if the provided public key is valid.
- *
- * @param[in]        w31: all-zero
- * @param[in]   dmem[k0]: 1st private key share d0/k0
- * @param[in]   dmem[k1]: 2nd private key share d1/k0
- * @param[in]    dmem[x]: x-coordinate of public key
- * @param[in]    dmem[y]: y-coordinate of public key
- * @param[out]   dmem[x]: x0, first share of shared key.
- * @param[out]   dmem[y]: x1, second share of shared key.
- *
- * clobbered registers: x2, x3, x9 to x13, x17 to x21, x26 to x30, w0 to w30
- * clobbered flag groups: FG0
- */
-shared_key:
-  /* Generate arithmetically masked shared key d*Q.
-     dmem[x] <= (d*Q).x - m mod p
-     dmem[y] <= m */
-  jal       x1, p384_scalar_mult
-
-  /* Arithmetic-to-boolean conversion*/
-
-  /* load result to WDRs for a2b conversion.
-     [w12,w11] <= dmem[x] = x_m
-     [w19,w18] <= dmem[y] = m */
-  li        x2, 11
-  la        x3, x
-  bn.lid    x2++, 0(x3)
-  bn.lid    x2++, 32(x3)
-  li        x2, 18
-  la        x3, y
-  bn.lid    x2++, 0(x3)
-  bn.lid    x2, 32(x3)
-
-  /* Load domain parameter.
-     [w14,w13] = dmem[p384_p] */
-  li        x2, 13
-  la        x4, p384_p
-  bn.lid    x2++, 0(x4)
-  bn.lid    x2++, 32(x4)
-
-  jal       x1, p384_arithmetic_to_boolean_mod
-
-  /* Store arithmetically masked key to DMEM
-     dmem[x] <= [w21,w20] = x_m' */
-  li        x2, 20
-  la        x3, x
-  bn.sid    x2++, 0(x3)
-  bn.sid    x2++, 32(x3)
-
-  ecall
-
-/**
- * Generate a fresh random keypair from a sideloaded seed.
- *
- * Returns secret key d in 384-bit shares d0, d1.
- *
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * This routine runs in constant time (except potentially waiting for entropy
- * from RND).
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: 1st private key share d0
- * @param[out] dmem[d1]: 2nd private key share d1
- * @param[out]  dmem[x]: Public key x-coordinate
- * @param[out]  dmem[y]: Public key y-coordinate
- *
- * clobbered registers: x2, x3, x9 to x13, x18 to x21, x26 to x30, w0 to w30
- * clobbered flag groups: FG0
- */
-keypair_from_seed:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr   w20, KEY_S0_L
-  bn.wsrr   w21, KEY_S0_H
-  bn.wsrr   w10, KEY_S1_L
-  bn.wsrr   w11, KEY_S1_H
-
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_key_from_seed
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal       x1, p384_base_mult
-
-  ecall
-
-/**
- * Generate a shared key from a fresh secret key with sideloaded seed
- * and a given public key.
- *
- * Returns the shared key, which is the affine x-coordinate of (d*Q). The
- * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
- * x1).
- * Returns secret key d in 384-bit shares d0, d1.
- *
- * This routine runs in constant time.
- *
- * !!! Attention !!! - before shared key computation p384_curve_point_valid
- * binary has to be executed to check if the provided public key is valid.
- *
- * @param[in]        w31: all-zero
- * @param[out]   dmem[x]: x0, first share of shared key.
- * @param[out]   dmem[y]: x1, second share of shared key.
- *
- * clobbered registers: x2, x3, x9 to x13, x18 to x21, x26 to x30, w0 to w30
- * clobbered flag groups: FG0
- */
-shared_key_from_seed:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr   w20, KEY_S0_L
-  bn.wsrr   w21, KEY_S0_H
-  bn.wsrr   w10, KEY_S1_L
-  bn.wsrr   w11, KEY_S1_H
-
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_key_from_seed
-
-  /* Jump to shared key computation. */
-  jal       x0, shared_key
-
-
-.data
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* Public key x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* Public key y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 64
-
-/* Secret key (d) in two shares: d = (d0 + d1) mod n.
-
-   Note: This is also labeled k0, k1 because the `p384_scalar_mult` algorithm
-   requires k0 and k1 as labels for the scalar; in the case of ECDH, the
-   scalar in `p384_scalar_mult` is always the private key (d). */
-
-.globl d0
-.globl k0
-.balign 32
-d0:
-k0:
-  .zero 64
-
-.globl d1
-.globl k1
-.balign 32
-d1:
-k1:
-  .zero 64
diff --git a/sw/otbn/crypto/p384_ecdsa_keygen.s b/sw/otbn/crypto/p384_ecdsa_keygen.s
deleted file mode 100644
index a25b9dacb795f..0000000000000
--- a/sw/otbn/crypto/p384_ecdsa_keygen.s
+++ /dev/null
@@ -1,154 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Entrypoint for P-384 ECDSA key generation operations.
- *
- * This binary generates a new keypair.
- *
- * This binary has the following modes of operation:
- * 1. MODE_KEYGEN_RANDOM: generate a random keypair
- * 2. MODE_KEYGEN_FROM_SEED: generate a keypair from a sideloaded seed
- */
-
-.equ MODE_KEYGEN_RANDOM, 0x3d4
-.equ MODE_KEYGEN_FROM_SEED, 0x5e8
-
-.section .text.start
-.globl start
-start:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la        x2, mode
-  lw        x2, 0(x2)
-
-  addi      x3, x0, MODE_KEYGEN_RANDOM
-  beq       x2, x3, keypair_random
-
-  addi      x3, x0, MODE_KEYGEN_FROM_SEED
-  beq       x2, x3, keypair_from_seed
-
-  /* Unsupported mode; fail. */
-  unimp
-  unimp
-  unimp
-
-/**
- * Generate a fresh random keypair.
- *
- * Returns secret key d in 448-bit shares d0, d1.
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: 1st private key share d0
- * @param[out] dmem[d1]: 2nd private key share d1
- * @param[out]  dmem[x]: Public key x-coordinate
- * @param[out]  dmem[y]: Public key y-coordinate
-
- */
-keypair_random:
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_generate_random_key
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal       x1, p384_base_mult
-
-  ecall
-
-/**
- * Generate a fresh random keypair from a sideloaded seed.
- *
- * Returns secret key d in 384-bit shares d0, d1.
- *
- * Returns public key Q = d*G in affine coordinates (x, y).
- *
- * This routine runs in constant time (except potentially waiting for entropy
- * from RND).
- *
- * @param[in]       w31: all-zero
- * @param[out] dmem[d0]: 1st private key share d0
- * @param[out] dmem[d1]: 2nd private key share d1
- * @param[out]  dmem[x]: Public key x-coordinate
- * @param[out]  dmem[y]: Public key y-coordinate
- *
- * clobbered registers: x2, x3, x9 to x13, x18 to x21, x26 to x30, w0 to w30
- * clobbered flag groups: FG0
- */
-keypair_from_seed:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr   w20, KEY_S0_L
-  bn.wsrr   w21, KEY_S0_H
-  bn.wsrr   w10, KEY_S1_L
-  bn.wsrr   w11, KEY_S1_H
-
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_key_from_seed
-
-  /* Generate public key d*G.
-       dmem[x] <= (d*G).x
-       dmem[y] <= (d*G).y */
-  jal       x1, p384_base_mult
-
-  ecall
-
-.bss
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* random scalar first share */
-.globl k0
-.balign 32
-k0:
-  .zero 64
-
-/* random scalar second share */
-.globl k1
-.balign 32
-k1:
-  .zero 64
-
-/* private key first share */
-.globl d0
-.balign 32
-d0:
-  .zero 64
-
-/* private key second share */
-.globl d1
-.balign 32
-d1:
-  .zero 64
-
-/* x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 64
-
-/* 704 bytes of scratchpad memory
-  defined globally to save dmem */
-.balign 32
-.globl scratchpad
-scratchpad:
-  .zero 704
diff --git a/sw/otbn/crypto/p384_ecdsa_sca.s b/sw/otbn/crypto/p384_ecdsa_sca.s
index 6ebe22be3dc67..804dbfef25220 100644
--- a/sw/otbn/crypto/p384_ecdsa_sca.s
+++ b/sw/otbn/crypto/p384_ecdsa_sca.s
@@ -35,78 +35,8 @@ p384_ecdsa_verify:
 
 .data
 
-/* Freely available DMEM space. */
-
-/* Operation mode (1 = sign; 2 = verify) */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* All constants below must be 256b-aligned. */
-
-/* random scalar k0*/
-.global k0
-.balign 64
-k0:
-  .zero 64
-
-/* random scalar k1*/
-.globl k1
-.balign 64
-k1:
-  .zero 64
-
 /* randomness for blinding */
 .globl rnd
 .balign 64
 rnd:
   .zero 64
-
-/* message digest */
-.globl msg
-.balign 64
-msg:
-  .zero 64
-
-/* signature R */
-.globl r
-.balign 64
-r:
-  .zero 64
-
-/* signature S */
-.globl s
-.balign 64
-s:
-  .zero 64
-
-/* public key x-coordinate */
-.globl x
-.balign 64
-x:
-  .zero 64
-
-/* public key y-coordinate */
-.globl y
-.balign 64
-y:
-  .zero 64
-
-/* private key d0 */
-.globl d0
-.balign 64
-d0:
-  .zero 64
-
-/* private key d1 */
-.globl d1
-.balign 64
-d1:
-  .zero 64
-
-/* verification result x_r (aka x_1) */
-.globl x_r
-.balign 64
-x_r:
-  .zero 64
diff --git a/sw/otbn/crypto/p384_ecdsa_sign.s b/sw/otbn/crypto/p384_ecdsa_sign.s
deleted file mode 100644
index e3f0c49941842..0000000000000
--- a/sw/otbn/crypto/p384_ecdsa_sign.s
+++ /dev/null
@@ -1,169 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Entrypoint for P-384 ECDSA signing operations.
- *
- * This binary generates a signature using a caller-provided secret key.
- *
- * This binary has the following modes of operation:
- * 1. MODE_SIGN: generate signature using caller-provided secret key
- * 2. MODE_SIDELOAD_SIGN: generate signature using sideloaded secret key/seed
- */
-
- /**
- * Mode magic values, generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 5 -n 11 \
- *     --avoid-zero -s 2205231843
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_SIGN, 0x15b
-.equ MODE_SIDELOAD_SIGN, 0x49e
-
-.section .text.start
-.globl start
-start:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la    x2, mode
-  lw    x2, 0(x2)
-
-  addi  x3, x0, MODE_SIGN
-  beq   x2, x3, ecdsa_sign
-
-  addi  x3, x0, MODE_SIDELOAD_SIGN
-  beq   x2, x3, ecdsa_sign_sideload
-
-  /* Invalid mode; fail. */
-  unimp
-  unimp
-  unimp
-
-/**
- * P-384 ECDSA signature generation.
- * Generate the secret scalar k from a random seed.
- *
- * @param[in]  dmem[msg]: message to be signed in dmem
- * @param[in]   dmem[d0]: 1st private key share d0
- * @param[in]   dmem[d1]: 2nd private key share d1
- * @param[out]   dmem[r]: r component of signature
- * @param[out]   dmem[s]: s component of signature
- */
-ecdsa_sign:
-  /* Generate a fresh random scalar for signing.
-       dmem[k0] <= first share of k
-       dmem[k1] <= second share of k */
-  jal      x1, p384_generate_k
-
-  /* Generate the signature. */
-  jal      x1, p384_sign
-
-  ecall
-
-/**
- * P-384 ECDSA side-loaded signature generation.
- * Generate a signature using a private key from a
- * sideloaded seed.
- *
- * @param[in]  dmem[msg]: message to be signed in dmem
- * @param[out]   dmem[r]: r component of signature
- * @param[out]   dmem[s]: s component of signature
- */
-ecdsa_sign_sideload:
-  /* Load keymgr seeds from WSRs.
-       w20,w21 <= seed0
-       w10,w11 <= seed1 */
-  bn.wsrr   w20, KEY_S0_L
-  bn.wsrr   w21, KEY_S0_H
-  bn.wsrr   w10, KEY_S1_L
-  bn.wsrr   w11, KEY_S1_H
-
-  /* Generate secret key d in shares.
-       dmem[d0] <= d0
-       dmem[d1] <= d1 */
-  jal       x1, p384_key_from_seed
-
-  /* Tail-call signature-generation routine. */
-  jal       x0, ecdsa_sign
-
-
-.bss
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-  .zero 4
-
-/* x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 64
-
-/* random scalar first share */
-.globl k0
-.balign 32
-k0:
-  .zero 64
-
-/* random scalar second share */
-.globl k1
-.balign 32
-k1:
-  .zero 64
-
-/* r part of signature */
-.globl r
-.balign 32
-r:
-  .zero 64
-
-/* s part of signature */
-.globl s
-.balign 32
-s:
-  .zero 64
-
-.data
-
-/* private key first share */
-.globl d0
-.balign 32
-d0:
-  .zero 64
-
-/* private key second share */
-.globl d1
-.balign 32
-d1:
-  .zero 64
-
-/* hash message to sign/verify */
-.globl msg
-.balign 32
-msg:
-  .zero 64
-
-/* 704 bytes of scratchpad memory
-  defined globally to save dmem */
-.balign 32
-.globl scratchpad
-scratchpad:
-  .zero 704
diff --git a/sw/otbn/crypto/p384_ecdsa_verify.s b/sw/otbn/crypto/p384_ecdsa_verify.s
deleted file mode 100644
index 47167911186c5..0000000000000
--- a/sw/otbn/crypto/p384_ecdsa_verify.s
+++ /dev/null
@@ -1,98 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Entrypoint for P-384 ECDSA verifying operations.
- *
- * This binary verifies a signature. - !!! Attention !!! - before
- * signature verification p384_curve_point_valid
- * binary has to be executed to check if the provided
- * public key is valid.
- */
-
-.section .text.start
-.globl start
-start:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  jal       x1, ecdsa_verify
-
-  /* Invalid mode; fail. */
-  unimp
-  unimp
-  unimp
-
-
-/**
- * P-384 ECDSA signature verification
- *
- * The routine computes the x1 coordinate and places it in dmem. x1 will be
- * reduced (mod n), however, the final comparison has to be performed on the
- * host side. The signature is valid if x1 == r.
- * This routine runs in variable time.
- *
- * @param[in]  dmem[msg]: message to be verified
- * @param[in]    dmem[r]: r part of signature
- * @param[in]    dmem[s]: s part of signature
- * @param[in]    dmem[x]: x-coordinate of public key
- * @param[in]    dmem[y]: y-coordinate of public key
- * @param[out] dmem[x_r]: x1 coordinate to be compared to rs
- *
- * !!! Attention !!! - before signature verification p384_curve_point_valid
- * binary has to be executed to check if the provided public key is valid.
- *
- */
-ecdsa_verify:
-  /* Verify the signature (compute x1). */
-  jal      x1, p384_verify
-
-  ecall
-
-.bss
-
-/* result of verify (x1 coordinate) */
-.globl x_r
-.balign 32
-x_r:
-  .zero 64
-
-.data
-
-/* Public key x-coordinate. */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* Public key y-coordinate. */
-.globl y
-.balign 32
-y:
-  .zero 64
-
-/* hash message to sign/verify */
-.globl msg
-.balign 32
-msg:
-  .zero 64
-
-/* r part of signature */
-.globl r
-.balign 32
-r:
-  .zero 64
-
-/* s part of signature */
-.globl s
-.balign 32
-s:
-  .zero 64
-
-/* 896 bytes of scratchpad memory
-  defined globally to save dmem. */
-.balign 32
-.globl scratchpad
-scratchpad:
-  .zero 896
diff --git a/sw/otbn/crypto/p384_internal_mult.s b/sw/otbn/crypto/p384_internal_mult.s
index 273d49a279378..65ba759e02743 100644
--- a/sw/otbn/crypto/p384_internal_mult.s
+++ b/sw/otbn/crypto/p384_internal_mult.s
@@ -44,20 +44,24 @@
 store_proj_randomize:
 
   /* get a 384-bit random number from URND
-    [w3, w2] = random(384) */
-  bn.wsrr   w2, 2
-  bn.wsrr   w3, 2
-  bn.rshi   w3, w31, w3 >> 128
+    [w17, w16] = random(384) */
+  bn.wsrr   w16, 2
+  bn.wsrr   w17, 2
+  bn.rshi   w17, w31, w17 >> 128
 
   /* reduce random number
-     [w2, w3] = z <= [w2, w3] mod p */
-  bn.sub   w10, w2, w12
-  bn.subb  w11, w3, w13
-  bn.sel   w2, w2, w10, C
-  bn.sel   w3, w3, w11, C
-
-  bn.mov w10, w2
-  bn.mov w11, w3
+     [w23, w22] = z <= [w17, w16] mod p */
+  bn.sub   w18, w16, w12
+  bn.subb  w19, w17, w13
+  bn.sel   w22, w16, w18, C
+  bn.sel   w23, w17, w19, C
+
+  /* Move z-coordinate into regs for later use
+     [w3, w2] <= z, [w11, w10] <= z */
+  bn.mov w2,  w22
+  bn.mov w3,  w23
+  bn.mov w10, w22
+  bn.mov w11, w23
 
   /* store z-coordinate
      dmem[x20+128] = [w10, w11] */
@@ -97,6 +101,160 @@ store_proj_randomize:
 
   ret
 
+/**
+ * Wrapper function for P-384 scalar point multiplication in projective space.
+ *
+ * This function does not reblind the secret scalar before performing
+ * the scalar multiplication.
+ *
+ * @param[in]  x17: dptr_k0, pointer to first share k0 of scalar k
+ *                           (0 < k < n) in dmem (448-bit)
+ * @param[in]  x19: dptr_k1, pointer to second share k1 of scalar k
+ *                           (0 < k < n) in dmem (448-bit)
+ * @param[in]  x20: dptr_x, pointer to affine x-coordinate in dmem
+ * @param[in]  x21: dptr_y, pointer to affine y-coordinate in dmem
+ * @param[in]  x28: dptr_b, pointer to domain parameter b of P-384 in dmem
+ * @param[in]  x30: dptr_sp, pointer to 704 bytes of scratchpad memory in dmem
+ * @param[in]  [w13, w12]: p, modulus of P-384 underlying finite field
+ * @param[in]  [w11, w10]: n, domain parameter of P-384 curve
+ *                            (order of base point G)
+ * @param[in]  w31: all-zero
+ * @param[out]  [w26,w25]: x, x-coordinate of resulting point R (projective).
+ * @param[out]  [w28,w27]: y, y-coordinate of resulting point R (projective).
+ * @param[out]  [w30,w29]: z, z-coordinate of resulting point R (projective).
+ *
+ * clobbered registers: x2, x10, x11 to x13, x16, x18, x26, x27, w0 to w30
+ * clobbered flag groups: FG0
+ */
+ .globl scalar_mult_int_p384
+scalar_mult_int_p384:
+
+  /* fetch 1st share of scalar from dmem
+     s0 = [w2, w1] <= dmem[dptr_k0] = k0 */
+  li        x2, 1
+  bn.lid    x2++, 0(x17)
+  bn.lid    x2,   32(x17)
+
+  /* fetch 2nd share of scalar from dmem
+     s1 = [w5, w4] <= dmem[dptr_k1] = k1 */
+  li        x2, 4
+  bn.lid    x2++, 0(x19)
+  bn.lid    x2,   32(x19)
+
+  /* Left align both shares for probing of MSB in loop body. */
+  /* Zeroize w0 and w5 since they are not needed without reblinding. */
+
+  /* Get some randomness to pad the shares. */
+  bn.wsrr   w6, URND
+  bn.rshi   w2, w2, w1 >> 192
+  bn.rshi   w1, w1, w6 >> 192
+  /* Set w0 to rand.
+     It is unused in the unblinded scalar mult and will shift into other share regs. */
+  bn.wsrr   w0, URND
+
+  /* Get some randomness to pad the shares. */
+  bn.wsrr   w6, URND
+  bn.rshi   w5, w5, w4 >> 192
+  bn.rshi   w4, w4, w6 >> 192
+  /* Set w3 to rand.
+     It is unused in the unblinded scalar mult and will shift into other share regs. */
+  bn.wsrr   w3, URND
+
+  /* Set the loop iteration variable for the multiplication. */
+  addi      x16, x0, 448
+
+  /* perform the scalar multiplication. */
+  jal       x1, scalar_mult_int_p384_internal
+
+  addi      x2, x0, 448
+  beq       x2, x16, scalar_mult_int_p384_ret
+
+  /* The number of iterations has been faulted; fail. */
+  unimp
+  unimp
+  unimp
+
+scalar_mult_int_p384_ret:
+  ret
+
+/**
+ * Wrapper function for P-384 scalar point multiplication in projective space.
+ *
+ * This function reblinds the secret scalar before performing
+ * the scalar multiplication.
+ *
+ * @param[in]  x17: dptr_k0, pointer to first share k0 of scalar k
+ *                           (0 < k < n) in dmem (578-bit)
+ * @param[in]  x19: dptr_k1, pointer to second share k1 of scalar k
+ *                           (0 < k < n) in dmem (578-bit)
+ * @param[in]  x20: dptr_x, pointer to affine x-coordinate in dmem
+ * @param[in]  x21: dptr_y, pointer to affine y-coordinate in dmem
+ * @param[in]  x28: dptr_b, pointer to domain parameter b of P-384 in dmem
+ * @param[in]  x30: dptr_sp, pointer to 704 bytes of scratchpad memory in dmem
+ * @param[in]  [w13, w12]: p, modulus of P-384 underlying finite field
+ * @param[in]  [w11, w10]: n, domain parameter of P-384 curve
+ *                            (order of base point G)
+ * @param[in]  w31: all-zero
+ * @param[out]  [w26,w25]: x, x-coordinate of resulting point R (projective).
+ * @param[out]  [w28,w27]: y, y-coordinate of resulting point R (projective).
+ * @param[out]  [w30,w29]: z, z-coordinate of resulting point R (projective).
+ *
+ * clobbered registers: x2, x10, x11 to x13, x16, x18, x26, x27, w0 to w30
+ * clobbered flag groups: FG0
+ */
+ .globl scalar_mult_int_p384_reblind
+scalar_mult_int_p384_reblind:
+
+  /* fetch 1st share of scalar from dmem
+     s0 = [w2, w1, w0] <= dmem[dptr_k0] = k0 */
+  li        x2, 0
+  bn.lid    x2++, 0(x17)
+  bn.lid    x2++, 32(x17)
+  bn.lid    x2++, 64(x17)
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
+  /* fetch 2nd share of scalar from dmem
+     s1 = [w5, w4, w3] <= dmem[dptr_k1] = k1 */
+  bn.lid    x2++, 0(x19)
+  bn.lid    x2++, 32(x19)
+  bn.lid    x2,   64(x19)
+
+  /* reblind the masked scalar. */
+  jal       x1, p384_masked_scalar_reblind
+
+  /* left align both shares for probing of MSB in loop body */
+
+  /* Get some randomness to pad the shares. */
+  bn.wsrr   w6, URND
+  bn.rshi   w2, w2, w1 >> 66
+  bn.rshi   w1, w1, w0 >> 66
+  bn.rshi   w0, w0, w6 >> 66
+
+  /* Get some randomness to pad the shares. */
+  bn.wsrr   w6, URND
+  bn.rshi   w5, w5, w4 >> 66
+  bn.rshi   w4, w4, w3 >> 66
+  bn.rshi   w3, w3, w6 >> 66
+
+  /* Set the loop iteration variable for the multiplication. */
+  addi      x16, x0, 578
+
+  /* perform the scalar multiplication. */
+  jal       x1, scalar_mult_int_p384_internal
+
+  addi      x2, x0, 578
+  beq       x2, x16, scalar_mult_int_p384_reblind_ret
+
+  /* The number of iterations has been faulted; fail. */
+  unimp
+  unimp
+  unimp
+
+scalar_mult_int_p384_reblind_ret:
+  ret
+
 /**
  * P-384 scalar point multiplication in projective space
  *
@@ -119,26 +277,37 @@ store_proj_randomize:
  * The loop operates on both shares in parallel, computing (k0 + k1) * P as
  * follows:
  *  Q = (0, 1, 0) # origin
- *  for i in 448..0:
+ *  for i in iter..0:
  *    Q = 2 * Q
  *    A = if (k0[i] ^ k1[i]) then P else 2P
  *    B = Q + A
  *    Q = if (k0[i] | k1[i]) then B else Q
  *
- * Each share k0/k1 is 448 bits, even though it represents a 384-bit value.
+ * Each share k0/k1 is 578 bits (in the reblinded case) or 448 (in the non reblinded case),
+ * even though it represents a 384-bit value.
  * This is a side-channel protection measure.
  *
- * @param[in]  x17: dptr_k0, pointer to first share k0 of scalar k
- *                           (0 < k < n) in dmem (448-bit)
- * @param[in]  x19: dptr_k1, pointer to second share k1 of scalar k
- *                           (0 < k < n) in dmem (448-bit)
- * @param[in]  x20: dptr_x, pointer to affine x-coordinate in dmem
- * @param[in]  x21: dptr_y, pointer to affine y-coordinate in dmem
- * @param[in]  x28: dptr_b, pointer to domain parameter b of P-384 in dmem
- * @param[in]  x30: dptr_sp, pointer to 704 bytes of scratchpad memory in dmem
- * @param[in]  [w13, w12]: p, modulus of P-384 underlying finite field
- * @param[in]  [w11, w10]: n, domain parameter of P-384 curve
- *                            (order of base point G)
+ * 448 bit shares mean that we have 64 bits of blinding for each share.
+ * 578 bit shares mean that we have 194 bits of blinding for each share.
+ * 578 bits is the minimal number of bits needed to protect against window
+ * attacks mentioned in Schindler.
+ * https://csrc.nist.gov/csrc/media/events/workshop-on-elliptic-curve-cryptography-standards/documents/papers/session6-schindler-werner.pdf
+ *
+ * The reblinding is needed whenever vertical attack scenarios apply,
+ * e.g. in case of ECDH and key generation.
+ *
+ * @param[in]  x16:          iter, number of loop iterations for the main loop
+ * @param[in]  x20:          dptr_x, pointer to affine x-coordinate in dmem
+ * @param[in]  x21:          dptr_y, pointer to affine y-coordinate in dmem
+ * @param[in]  x28:          dptr_b, pointer to domain parameter b of P-384 in dmem
+ * @param[in]  x30:          dptr_sp, pointer to 704 bytes of scratchpad memory in dmem
+ * @param[in]  [w2, w1, w0]: k0, first share k0 of scalar k
+ *                           (0 < k < n) (578-bit)
+ * @param[in]  [w5, w4, w3]: k0, second share k0 of scalar k
+ *                           (0 < k < n) (578-bit)
+ * @param[in]  [w13, w12]:   p, modulus of P-384 underlying finite field
+ * @param[in]  [w11, w10]:   n, domain parameter of P-384 curve
+ *                              (order of base point G)
  * @param[in]  w31: all-zero
  * @param[out]  [w26,w25]: x, x-coordinate of resulting point R (projective).
  * @param[out]  [w28,w27]: y, y-coordinate of resulting point R (projective).
@@ -148,10 +317,10 @@ store_proj_randomize:
  * The routine expects at least 704 bytes of scratchpad memory at dmem
  * location 'scratchpad' (sp). Internally the scratchpad is used as follows:
  * dptr_sp     .. dptr_sp+191: point P, projective
- * dptr_sp+192 .. dptr_sp+255: s0, 1st share of scalar
- * dptr_sp+256 .. dptr_sp+447: point 2P, projective
- * dptr_sp+448 .. dptr_sp+511: s1, 2nd share of scalar
- * dptr_sp+512 .. dptr_sp+703: point Q, projective
+ * dptr_sp+192 .. dptr_sp+287: s0, 1st share of scalar
+ * dptr_sp+288 .. dptr_sp+479: point 2P, projective
+ * dptr_sp+480 .. dptr_sp+575: s1, 2nd share of scalar
+ * dptr_sp+576 .. dptr_sp+767: point Q, projective
  *
  * Projective coordinates of a point are kept in dmem in little endian format
  * with the individual coordinates 512 bit aligned. The coordinates are stored
@@ -164,8 +333,7 @@ store_proj_randomize:
  * clobbered registers: x2, x10, x11 to x13, x18, x26, x27, w0 to w30
  * clobbered flag groups: FG0
  */
- .globl scalar_mult_int_p384
-scalar_mult_int_p384:
+scalar_mult_int_p384_internal:
 
   /* set regfile pointers to in/out regs of Barrett routine. Set here to avoid
      resetting in very call to point addition routine */
@@ -174,29 +342,18 @@ scalar_mult_int_p384:
   li        x24, 16
   li        x25, 17
 
-  /* fetch 1st share of scalar from dmem
-     s0 = [w1, w0] <= dmem[dptr_k0] = [dmem[x17], dmem[x17+32]] = k0 */
-  li        x2, 0
-  bn.lid    x2++, 0(x17)
-  bn.lid    x2++, 32(x17)
-
-  /* fetch 2nd share of scalar from dmem
-     s0 = [w3, w2] <= dmem[dptr_k1] = [dmem[x19], dmem[x19+32]] = k1 */
-  bn.lid    x2++, 0(x19)
-  bn.lid    x2++, 32(x19)
-
-  /* left align both shares for probing of MSB in loop body */
-  bn.rshi   w1, w1, w0 >> 192
-  bn.rshi   w0, w0, w31 >> 192
-  bn.rshi   w3, w3, w2 >> 192
-  bn.rshi   w2, w2, w31 >> 192
-
    /* store shares in scratchpad */
   li        x2, 0
   bn.sid    x2++, 192(x30)
   bn.sid    x2++, 224(x30)
-  bn.sid    x2++, 448(x30)
+  bn.sid    x2++, 256(x30)
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
   bn.sid    x2++, 480(x30)
+  bn.sid    x2++, 512(x30)
+  bn.sid    x2,   544(x30)
 
   /* get randomized projective coodinates of curve point
      P = (x_p, y_p, z_p) = dmem[dptr_sp] = (x*z mod p, y*z mod p, z) */
@@ -209,19 +366,19 @@ scalar_mult_int_p384:
   add       x26, x30, x0
   jal       x1, proj_add_p384
 
-  /* store point 2P in scratchpad @w30+256
-     dmem[dptr_sc+256] = [w30:w25] = 2P */
+  /* store point 2P in scratchpad @x30+288
+     dmem[dptr_sc+288] = [w30:w25] = 2P */
   li        x2, 25
-  bn.sid    x2++, 256(x30)
   bn.sid    x2++, 288(x30)
   bn.sid    x2++, 320(x30)
   bn.sid    x2++, 352(x30)
   bn.sid    x2++, 384(x30)
   bn.sid    x2++, 416(x30)
+  bn.sid    x2,   448(x30)
 
   /* init point Q = (0,1,0) for double-and-add in scratchpad */
   /* dmem[x26] = dmem[dptr_sc+512] = Q = (0,1,0) */
-  addi      x26, x30, 512
+  addi      x26, x30, 576
   li        x2, 30
   bn.addi   w30, w31, 1
   bn.sid    x2++, 64(x26)
@@ -232,7 +389,7 @@ scalar_mult_int_p384:
   bn.sid    x2, 160(x26)
 
   /* double-and-add loop with decreasing index */
-  loopi     448, 85
+  loop      x16, 94
 
     /* double point Q
        Q = ([w30,w29], [w28,w27], [w26, w25]) <= Q + dmem[x27] */
@@ -247,7 +404,7 @@ scalar_mult_int_p384:
     bn.sid    x2++, 64(x26)
     bn.sid    x2++, 96(x26)
     bn.sid    x2++, 128(x26)
-    bn.sid    x2++, 160(x26)
+    bn.sid    x2,   160(x26)
 
     /* Probe if MSb of either of the two scalars (rnd or d-rnd) but not both
        is 1.
@@ -255,15 +412,16 @@ scalar_mult_int_p384:
        If both MSbs are set, select 2P for addition.
        (If neither MSB is set, 2P will be selected but result discarded.) */
     li        x2, 0
-    bn.lid    x2++, 224(x30)
-    bn.lid    x2, 480(x30)
+    bn.lid    x2++, 256(x30)
+    bn.lid    x2,   544(x30)
     bn.xor    w8, w0, w1
-    /* Create conditional offeset into scratchpad.
-       if (s0[512] xor s1[512]) x27 <= x30 else x27 <= x30+256 */
+    /* Create conditional offset into scratchpad.
+       if (s0[512] xor s1[512]) x27 <= x30 else x27 <= x30+288 */
     csrrs     x3, FG0, x0
-    xori      x3, x3, -1
     andi      x3, x3, 2
-    slli      x27, x3, 7
+    slli      x3, x3, 3
+    li        x27, 288
+    sra       x27, x27, x3
     add       x27, x27, x30
 
     /* Reload randomized projective coodinates for curve point P.
@@ -275,73 +433,81 @@ scalar_mult_int_p384:
     jal       x1, proj_add_p384
 
     /* load shares from scratchpad
-       [w1, w0] = s0; [w3, w2] = s1 */
+       [w2, w1, w0] = s0; [w5, w4, w3] = s1 */
     li        x2, 0
     bn.lid    x2++, 192(x30)
     bn.lid    x2++, 224(x30)
-    bn.lid    x2++, 448(x30)
+    bn.lid    x2++, 256(x30)
     bn.lid    x2++, 480(x30)
+    bn.lid    x2++, 512(x30)
+    bn.lid    x2,   544(x30)
 
     /* M = s0[511] | s1[511] */
-    bn.or     w8, w1, w3
+    bn.or     w8, w2, w5
 
     /* load q from scratchpad
-        Q = ([w9,w8], [w7,w6], [w5,w4]) <= dmem[x26] */
-    li        x2, 4
+        Q = ([w11,w10], [w9,w8], [w7,w6]) <= dmem[x26] */
+    li        x2, 6
     bn.lid    x2++, 0(x26)
     bn.lid    x2++, 32(x26)
     bn.lid    x2++, 64(x26)
     bn.lid    x2++, 96(x26)
     bn.lid    x2++, 128(x26)
-    bn.lid    x2++, 160(x26)
+    bn.lid    x2,   160(x26)
 
     /* select either Q or Q_a
-       if M: Q = ([w30,w29], [w28,w27], [w26, w25]) <= Q else: Q <= Q_a */
-    bn.sel    w25, w25, w4, M
-    bn.sel    w26, w26, w5, M
-    bn.sel    w27, w27, w6, M
-    bn.sel    w28, w28, w7, M
-    bn.sel    w29, w29, w8, M
-    bn.sel    w30, w30, w9, M
+       if M: Q = ([w21,w20], [w19,w18], [w17,w16]) <= Q else: Q <= Q_a */
+    bn.sel    w16, w25, w6, M
+    bn.sel    w17, w26, w7, M
+    bn.sel    w18, w27, w8, M
+    bn.sel    w19, w28, w9, M
+    bn.sel    w20, w29, w10, M
+    bn.sel    w21, w30, w11, M
 
     /* store Q in dmem
-     dmem[x26] = dmem[dptr_sc+512] <= [w30:w25] */
-    li        x2, 25
+     dmem[x26] = dmem[dptr_sc+512] <= [w21:w16] */
+    li        x2, 16
     bn.sid    x2++, 0(x26)
     bn.sid    x2++, 32(x26)
     bn.sid    x2++, 64(x26)
     bn.sid    x2++, 96(x26)
     bn.sid    x2++, 128(x26)
-    bn.sid    x2++, 160(x26)
+    bn.sid    x2,   160(x26)
 
     /* left shift both shares
        s0 <= s0 << 1 ; s1 <= s1 << 1 */
-    bn.add    w0, w0, w0
-    bn.addc   w1, w1, w1
-    bn.add    w2, w2, w2
-    bn.addc   w3, w3, w3
+    bn.wsrr   w10, URND
+    bn.rshi   w5, w5, w4 >> 255
+    bn.rshi   w4, w4, w3 >> 255
+    bn.rshi   w3, w3, w10 >> 255
+    bn.rshi   w10, w10, w31 >> 1
+    bn.rshi   w2, w2, w1 >> 255
+    bn.rshi   w1, w1, w0 >> 255
+    bn.rshi   w0, w0, w10 >> 255
+
     /* store both shares in scratchpad */
     li        x2, 0
     bn.sid    x2++, 192(x30)
     bn.sid    x2++, 224(x30)
-    bn.sid    x2++, 448(x30)
+    bn.sid    x2++, 256(x30)
     bn.sid    x2++, 480(x30)
-
+    bn.sid    x2++, 512(x30)
+    bn.sid    x2,   544(x30)
 
     /* Get a fresh random number from URND and scale the coordinates of 2P.
        (scaling each proj. coordinate by same factor results in same point) */
 
     /* get a 384-bit random number from URND */
-    bn.wsrr   w2, 2
-    bn.wsrr   w3, 2
-    bn.rshi   w3, w31, w3 >> 128
+    bn.wsrr   w0, URND
+    bn.wsrr   w1, URND
+    bn.rshi   w1, w31, w1 >> 128
 
     /* reduce random number
-      [w2, w3] = z <= [w2, w3] mod p */
-    bn.sub    w10, w2, w12
-    bn.subb   w11, w3, w13
-    bn.sel    w2, w2, w10, C
-    bn.sel    w3, w3, w11, C
+      [w3, w2] = z <= [w1, w0] mod p */
+    bn.sub    w10, w0, w12
+    bn.subb   w11, w1, w13
+    bn.sel    w2, w0, w10, C
+    bn.sel    w3, w1, w11, C
 
     /* scale all coordinates in scratchpad */
     li        x2, 16
@@ -349,26 +515,180 @@ scalar_mult_int_p384:
     /* x-coordinate */
     bn.mov    w10, w2
     bn.mov    w11, w3
-    bn.lid    x2, 256(x30)
-    bn.lid    x3, 288(x30)
+    bn.lid    x2, 288(x30)
+    bn.lid    x3, 320(x30)
     jal       x1, p384_mulmod_p
-    bn.sid    x2, 256(x30)
-    bn.sid    x3, 288(x30)
+    bn.sid    x2, 288(x30)
+    bn.sid    x3, 320(x30)
     /* y-coordinate */
     bn.mov    w10, w2
     bn.mov    w11, w3
-    bn.lid    x2, 320(x30)
-    bn.lid    x3, 352(x30)
+    bn.lid    x2, 352(x30)
+    bn.lid    x3, 384(x30)
     jal       x1, p384_mulmod_p
-    bn.sid    x2, 320(x30)
-    bn.sid    x3, 352(x30)
+    bn.sid    x2, 352(x30)
+    bn.sid    x3, 384(x30)
     /* z-coordinate */
     bn.mov    w10, w2
     bn.mov    w11, w3
-    bn.lid    x2, 384(x30)
-    bn.lid    x3, 416(x30)
+    bn.lid    x2, 416(x30)
+    bn.lid    x3, 448(x30)
     jal       x1, p384_mulmod_p
-    bn.sid    x2, 384(x30)
-    bn.sid    x3, 416(x30)
+    bn.sid    x2, 416(x30)
+    bn.sid    x3, 448(x30)
+
+  /* Load result Q into ([w21,w20], [w19,w18], [w17,w16]) <= Q */
+  li        x2, 25
+  bn.lid    x2++, 0(x26)
+  bn.lid    x2++, 32(x26)
+  bn.lid    x2++, 64(x26)
+  bn.lid    x2++, 96(x26)
+  bn.lid    x2++, 128(x26)
+  bn.lid    x2,   160(x26)
+
+  ret
+
+/**
+ * Routine to reblind a masked scalar.
+ *
+ * Adds a multiple of the curve order n to both shares of the
+ * secret scalar d.
+ *
+ * For each share s a 194 bit random number r is generated and added
+ * to the s as follows:
+ *
+ * s = (s + r * n) mod (n << 194)
+ *
+ * We have 194 bits of blinding for each share.
+ * This is the minimal number of bits needed to protect against window
+ * attacks mentioned in Schindler.
+ * https://csrc.nist.gov/csrc/media/events/workshop-on-elliptic-curve-cryptography-standards/documents/papers/session6-schindler-werner.pdf
+ *
+ * @param[in]       [w11, w10]: n, domain parameter of P-384 curve
+ *                              (order of base point G)
+ * @param[in]              w31: all-zero
+ * @param[in,out]  [w2, w1, w0]: first share of scalar d (578 bits)
+ * @param[in,out]  [w5, w4, w3]: second share of scalar d (578 bits)
+ *
+ * clobbered registers: x10-x11, w0-w5, w19-w23
+ * clobbered flag groups: FG0
+ */
+ .globl p384_masked_scalar_reblind
+p384_masked_scalar_reblind:
+  /* Initialize all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* reblind first share of scalar d in [w1, w0]. */
+  bn.mov    w16, w0
+  bn.mov    w17, w1
+  bn.mov    w18, w2
+  jal       x1, p384_scalar_reblind
+  bn.mov    w0, w16
+  bn.mov    w1, w17
+  bn.mov    w2, w18
+
+  /* Randomize w16, w17 and w18 which contain the first share of scalar d. */
+  bn.wsrr   w16, URND
+  bn.wsrr   w17, URND
+  bn.wsrr   w18, URND
+
+  /* reblind second share of scalar d in [w3, w2]. */
+  bn.mov    w16, w3
+  bn.mov    w17, w4
+  bn.mov    w18, w5
+  jal       x1, p384_scalar_reblind
+  bn.mov    w3, w16
+  bn.mov    w4, w17
+  bn.mov    w5, w18
+
+  /* Randomize w16, w17 and w18 which contain the second share of scalar d. */
+  bn.wsrr   w16, URND
+  bn.wsrr   w17, URND
+  bn.wsrr   w18, URND
+
+  ret
+
+/**
+ * Helper routine to reblind a scalar.
+ *
+ * Adds a multiple of the curve order n to the secret scalar d.
+ *
+ * A 194 bit random number r is generated and added
+ * to d as follows:
+ *
+ * d = (d + r * n) mod (n << 194)
+ *
+ * We have 194 bits of blinding for each share.
+ * This is the minimal number of bits needed to protect against window
+ * attacks mentioned in Schindler.
+ * https://csrc.nist.gov/csrc/media/events/workshop-on-elliptic-curve-cryptography-standards/documents/papers/session6-schindler-werner.pdf
+ *
+ * @param[in]       [w11, w10]: n, domain parameter of P-384 curve
+ *                              (order of base point G)
+ * @param[in]  [w18, w17, w16]: scalar d (578 bits)
+ * @param[in]              w31: all-zero
+ * @param[out] [w18, w17, w16]: hidden scalar d (578 bits)
+ *
+ * clobbered registers: x10-x11, w19-w24
+ * clobbered flag groups: FG0
+ */
+p384_scalar_reblind:
+
+  /* Zero out multiplication registers. */
+  bn.xor w22, w22, w22
+  bn.xor w23, w23, w23
+  bn.xor w24, w24, w24
+
+  /* Get a fresh 194-bit random value r from URND.
+       w20 = URND() */
+  bn.wsrr   w20, URND
+  bn.rshi   w20, w31, w20 >> 62
+
+  /* [w24,w23,w22] <= m = r * n */
+  bn.mulqacc.z          w20.0, w10.0,  0
+  bn.mulqacc            w20.1, w10.0, 64
+  bn.mulqacc.so  w22.L, w20.0, w10.1, 64
+  bn.mulqacc            w20.2, w10.0,  0
+  bn.mulqacc            w20.1, w10.1,  0
+  bn.mulqacc            w20.0, w10.2,  0
+  bn.mulqacc            w20.3, w10.0, 64
+  bn.mulqacc            w20.2, w10.1, 64
+  bn.mulqacc            w20.1, w10.2, 64
+  bn.mulqacc.so  w22.U, w20.0, w10.3, 64
+  bn.mulqacc            w20.3, w10.1,  0
+  bn.mulqacc            w20.2, w10.2,  0
+  bn.mulqacc            w20.1, w10.3,  0
+  bn.mulqacc            w20.0, w11.0,  0
+  bn.mulqacc            w20.3, w10.2, 64
+  bn.mulqacc            w20.2, w10.3, 64
+  bn.mulqacc            w20.1, w11.0, 64
+  bn.mulqacc.so  w23.L, w20.0, w11.1, 64
+  bn.mulqacc            w20.3, w10.3,  0
+  bn.mulqacc            w20.2, w11.0,  0
+  bn.mulqacc            w20.1, w11.1,  0
+  bn.mulqacc            w20.3, w11.0, 64
+  bn.mulqacc.so  w23.U, w20.2, w11.1, 64
+  bn.mulqacc.so  w24.L, w20.3, w11.1,  0
+
+  /* [w22,w21,w20] <= d + m */
+  bn.add    w20, w16, w22
+  bn.addc   w21, w17, w23
+  bn.addc   w22, w18, w24
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
+
+  /* [w25,w24,w23] <= n << 194 */
+  bn.rshi   w23, w10, w31 >> 62
+  bn.rshi   w24, w11, w10 >> 62
+  bn.rshi   w25, w31, w11 >> 62
+
+  /* Reduce d + m modulo (n << 194) with a conditional subtraction.
+       [w25,w24,w23] <= d + m mod (n << 194) */
+  bn.sub    w23, w20, w23
+  bn.subb   w24, w21, w24
+  bn.subb   w25, w22, w25
+  bn.sel    w16, w20, w23, FG0.C
+  bn.sel    w17, w21, w24, FG0.C
+  bn.sel    w18, w22, w25, FG0.C
+  bn.sub    w31, w31, w31  /* dummy instruction to clear flags */
 
   ret
diff --git a/sw/otbn/crypto/p384_isoncurve.s b/sw/otbn/crypto/p384_isoncurve.s
index 82db7b60dc3db..5ff17b40fa5db 100644
--- a/sw/otbn/crypto/p384_isoncurve.s
+++ b/sw/otbn/crypto/p384_isoncurve.s
@@ -6,8 +6,50 @@
  *   test.
  */
 
+/**
+ * Hardened boolean values.
+ *
+ * Should match the values in `hardened_asm.h`.
+ */
+.equ HARDENED_BOOL_TRUE, 0x739
+.equ HARDENED_BOOL_FALSE, 0x1d4
+
  .section .text
 
+/**
+ * Trigger a fault if the FG0.Z flag is 0.
+ *
+ * If the flag is 0, then this routine will trigger an `ILLEGAL_INSN` error and
+ * abort the OTBN program. If the flag is 1, the routine will essentially do
+ * nothing.
+ *
+ * NOTE: Be careful when calling this routine that the FG0.Z flag is not/**
+ * Trigger a fault if the FG0.Z flag is 0.
+ *
+ * @param[in]    w31: all-zero
+ * @param[in]  FG0.Z: boolean indicating fault condition
+ *
+ * clobbered registers: x2
+ * clobbered flag groups: none
+ */
+ .globl trigger_fault_if_fg0_not_z
+trigger_fault_if_fg0_not_z:
+  /* Fail if FG0.Z is false. */
+  csrrs     x2, FG0, x0
+  srli      x2, x2, 3
+  andi      x2, x2, 1
+  bne       x2, x0, _pt_reg_valid
+  jal       x0, p384_invalid_input
+
+  /* Extra unimps in case an attacker tries to skip the jump, since this one is
+     especially critical. */
+  unimp
+  unimp
+  unimp
+
+  _pt_reg_valid:
+  ret
+
 /**
  * Checks if a point is a valid curve point on curve P-384
  *
@@ -93,30 +135,94 @@ p384_isoncurve:
      x^3 + ax  mod p = [w17,w16] <= x^3 -3 x mod p
                      = [w17,w16] - [w1,w0] - [w1,w0] - [w1,w0] mod [w13,w12] */
   loopi     3, 6
-    bn.sub    w16, w16, w0
-    bn.subb   w17, w17, w1
-    bn.add    w10, w16, w12
-    bn.addc   w11, w17, w13
-    bn.sel    w16, w10, w16, C
-    bn.sel    w17, w11, w17, C
+    bn.sub    w2,  w16, w0
+    bn.subb   w3,  w17, w1
+    bn.add    w10, w2,  w12
+    bn.addc   w11, w3,  w13
+    bn.sel    w16, w10, w2, C
+    bn.sel    w17, w11, w3, C
 
   /* add domain parameter b
-     x^3 + ax + b mod p = [w17,w16] <= [w17,w16] + [w5,w4] mod [w13,w12] */
+     x^3 + ax + b mod p = [w3,w2] <= [w17,w16] + [w5,w4] mod [w13,w12] */
   bn.add    w16, w16, w4
   bn.addc   w17, w17, w5
   bn.sub    w10, w16, w12
   bn.subb   w11, w17, w13
-  bn.sel    w16, w16, w10, C
-  bn.sel    w17, w17, w11, C
+  bn.sel    w2, w16, w10, C
+  bn.sel    w3, w17, w11, C
 
   /* store result (right side)
-     dmem[dptr_rhs] <= x^3 + ax + b mod p = [w17,w16] */
-  li        x2, 16
+     dmem[dptr_rhs] <= x^3 + ax + b mod p = [w3,w2] */
+  li        x2, 2
   bn.sid    x2++, 0(x22)
   bn.sid    x2++, 32(x22)
 
   ret
 
+/**
+ * Checks if a point is a valid curve point on curve P-384
+ *
+ * This routine checks if a point with given x- and y-coordinate is a valid
+ * curve point on P-384.
+ * The routine checks whether the coordinates are a solution of the
+ * Weierstrass equation y^2 = x^3 + ax + b  mod p.
+ * The routine makes use of the property that the domain parameter 'a' can be
+ * written as a=-3 for the P-384 curve, hence the routine is limited to P-384.
+ *
+ * This routine sets `ok` to false if the check fails and immediately exits the
+ * program. If the check succeeds, `ok` is unmodified.
+ *
+ * The routine runs in constant time.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  [w13, w12]:  domain parameter p (modulus)
+ * @param[in]  x20:         dptr_x, pointer to dmem location containing affine
+ *                                  x-coordinate of input point
+ * @param[in]  x21:         dptr_y, pointer to dmem location containing affine
+ *                                  y-coordinate of input point
+ *
+ * clobbered registers: x2, x3, w0 to w5, w10 to w17
+ * clobbered flag groups: FG0
+ */
+ .globl p384_isoncurve_check
+p384_isoncurve_check:
+  /* Fill gpp registers with pointers to variables */
+  la        x22, rhs
+  la        x23, lhs
+
+  /* Compute both sides of the Weierstrauss equation.
+       dmem[rhs] <= (x^3 + ax + b) mod p
+       dmem[lhs] <= (y^2) mod p */
+  jal       x1, p384_isoncurve
+
+  /* Load both sides of the equation.
+       [w7, w6] <= dmem[rhs]
+       [w5, w4] <= dmem[lhs] */
+  li        x2, 6
+  bn.lid    x2++, 0(x22)
+  bn.lid    x2, 32(x22)
+  li        x2, 4
+  bn.lid    x2++, 0(x23)
+  bn.lid    x2, 32(x23)
+
+  /* Compare the two sides of the equation.
+       FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.sub    w0, w4, w6
+  bn.subb   w1, w5, w7
+
+  bn.cmp    w0, w31
+
+  /* Fail if FG0.Z is false. */
+  jal       x1, trigger_fault_if_fg0_not_z
+
+  bn.cmp    w1, w31
+
+  /* Fail if FG0.Z is false. */
+  jal       x1, trigger_fault_if_fg0_not_z
+
+  ret
+
 /**
  * Check if a provided curve point is valid.
  *
@@ -128,19 +234,20 @@ p384_isoncurve:
  * y) is the point at infinity. In some other forms such as projective
  * coordinates, we would need to check for this also.
  *
- * This routine raises a software error and halts operation if the curve point
- * is invalid.
+ * This routine sets `ok` to false if the check fails and immediately exits the
+ * program. If the check succeeds, `ok` is unmodified.
  *
- * @param[in]  dmem[x]: affine x-coordinate of input point in dmem
- * @param[in]  dmem[y]: affine y-coordinate of input point in dmem
+ * @param[in]   dmem[x]: affine x-coordinate of input point in dmem
+ * @param[in]   dmem[y]: affine y-coordinate of input point in dmem
+ * @param[out] dmem[ok]: HARDENED_BOOL_FALSE if the check failed
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
  * clobbered registers: x2, x3, x20 to x23, w0 to w17
  * clobbered flag groups: FG0
  */
- .globl p384_curve_point_valid
-p384_curve_point_valid:
+ .globl p384_check_public_key
+p384_check_public_key:
   /* Init all-zero register. */
   bn.xor    w31, w31, w31
 
@@ -168,10 +275,11 @@ p384_curve_point_valid:
   bn.sub    w0, w10, w12
   bn.subb   w0, w11, w13
 
-  /* Trigger a fault if FG0.C is false. */
+  /* Fail if FG0.C is false. */
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
   bne       x2, x0, _x_valid
+  jal       x0, p384_invalid_input
   unimp
 
   _x_valid:
@@ -187,92 +295,31 @@ p384_curve_point_valid:
   bn.sub    w0, w8, w12
   bn.subb   w0, w9, w13
 
-  /* Trigger a fault if FG0.C is false. */
+  /* Fail if FG0.C is false. */
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
   bne       x2, x0, _y_valid
+  jal       x0, p384_invalid_input
   unimp
 
   _y_valid:
-
-  /* Fill gpp registers with pointers to variables */
-  la        x22, rhs
-  la        x23, lhs
-
-  /* Compute both sides of the Weierstrauss equation.
-       dmem[rhs] <= (x^3 + ax + b) mod p
-       dmem[lhs] <= (y^2) mod p */
-  jal       x1, p384_isoncurve
-
-  /* Load both sides of the equation.
-       [w7, w6] <= dmem[rhs]
-       [w5, w4] <= dmem[lhs] */
-  li        x2, 6
-  bn.lid    x2++, 0(x22)
-  bn.lid    x2, 32(x22)
-  li        x2, 4
-  bn.lid    x2++, 0(x23)
-  bn.lid    x2, 32(x23)
-
-  /* Compare the two sides of the equation.
-       FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
-  bn.sub    w0, w4, w6
-  bn.subb   w1, w5, w7
-
-  bn.cmp    w0, w31
-
-  /* Trigger a fault if FG0.Z is false. */
-  csrrs     x2, FG0, x0
-  srli      x2, x2, 3
-  andi      x2, x2, 1
-  bne       x2, x0, _pt_1st_reg_valid
-  unimp
-  unimp
-  unimp
-
-  _pt_1st_reg_valid:
-
-  bn.cmp    w1, w31
-
-  /* Trigger a fault if FG0.Z is false. */
-  csrrs     x2, FG0, x0
-  srli      x2, x2, 3
-  andi      x2, x2, 1
-  bne       x2, x0, _pt_valid
-  unimp
-  unimp
-  unimp
-
-  _pt_valid:
+  jal       x1, p384_isoncurve_check
 
   ret
 
-.data
-
-/* x-coordinate */
-.globl x
-.weak x
-.balign 32
-x:
-  .zero 64
-
-/* y-coordinate */
-.globl y
-.weak y
-.balign 32
-y:
-  .zero 64
-
-/* Right side of Weierstrass equation */
-.globl rhs
-.weak rhs
-.balign 32
-rhs:
-  .zero 64
-
-/* Left side of Weierstrass equation */
-.globl lhs
-.weak lhs
-.balign 32
-lhs:
-  .zero 64
+/**
+ * Failure cases for basic validity checks jump here.
+ *
+ * This routine sets `ok` to false if the check fails.
+ *
+ * @param[out] dmem[ok] Set to HARDENED_BOOL_FALSE.
+ */
+.global p384_invalid_input
+p384_invalid_input:
+  /* Set the `ok` code to false. */
+  la       x2, ok
+  addi     x3, x0, HARDENED_BOOL_FALSE
+  sw       x3, 0(x2)
+
+  /* End the program. */
+  ecall
diff --git a/sw/otbn/crypto/p384_isoncurve_proj.s b/sw/otbn/crypto/p384_isoncurve_proj.s
new file mode 100644
index 0000000000000..7e05fb79794b3
--- /dev/null
+++ b/sw/otbn/crypto/p384_isoncurve_proj.s
@@ -0,0 +1,237 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+/*
+ *   P-384 specific routines for p384 is on curve check.
+ */
+
+ .section .text
+
+/**
+ * Checks if a point is a valid curve point on curve P-384.
+ *
+ * This routine checks if a point with given x-, y- and z-coordinates is a valid
+ * curve point on P-384. To this end p384_isoncurve_proj is called to compute
+ * both sides of the Weierstrass equation zy^2 = x^3 + axz^2 + bz^3  mod p.
+ *
+ * Finally, both sides of the equation are compared.
+ * This routine sets `ok` to false if the check fails and immediately exits the
+ * program. If the check succeeds, `ok` is unmodified.
+ *
+ * The routine runs in constant time.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  [w13, w12]:  domain parameter p (modulus)
+ * @param[in]  x20:         dptr_x, pointer to dmem location containing projective
+ *                                  x-coordinate of input point
+ * @param[in]  x21:         dptr_y, pointer to dmem location containing projective
+ *                                  y-coordinate of input point
+ * @param[in]  x30:         dptr_sp, pointer to 704 bytes of scratchpad memory in dmem
+ *
+ * Scratchpad memory layout:
+ * The routine expects at least 194 bytes of scratchpad memory at dmem
+ * location 'scratchpad' (sp). Internally the scratchpad is used as follows:
+ * dptr_sp     .. dptr_sp+63:   z-coordinate of input point, projective
+ * dptr_sp+64  .. dptr_sp+127:  dptr_rhs, pointer to dmem location where right
+ *                              side result will be stored
+ * dptr_sp+128 .. dptr_sp+191:  dptr_lhs, pointer to dmem location where left
+ *                              side result will be stored
+ *
+ * clobbered registers: x2, x3, w0 to w5, w10 to w17
+ * clobbered flag groups: FG0
+ */
+ .globl p384_isoncurve_proj_check
+p384_isoncurve_proj_check:
+
+  addi      x22, x30, 64
+  addi      x23, x22, 64
+
+  jal       x1, p384_isoncurve_proj
+
+  /* load result to WDRs for comparison */
+  li        x2, 2
+  bn.lid    x2++,  0(x22)
+  bn.lid    x2++, 32(x22)
+  bn.lid    x2++,  0(x23)
+  bn.lid    x2++, 32(x23)
+
+  /* Compare the two sides of the equation.
+       FG0.Z <= (y^2) mod p == (x^2 + ax + b) mod p */
+  bn.sub    w0, w4, w2
+  bn.subb   w1, w5, w3
+
+  bn.cmp    w0, w31
+
+  /* Fail if FG0.Z is false. */
+  jal       x1, trigger_fault_if_fg0_not_z
+
+  bn.cmp    w1, w31
+
+  /* Fail if FG0.Z is false. */
+  jal       x1, trigger_fault_if_fg0_not_z
+
+  ret
+
+/**
+ * Checks if a point is a valid curve point on curve P-384
+ *
+ * Returns rhs = x^3 + axz^2 + bz^3  mod p
+ *     and lhs = zy^2  mod p
+ *         where x,y,z are the projective coordinates of the curve point and
+ *              a, b and p being the domain parameters of curve P-384.
+ *
+ * This routine checks if a point with given x-, y- and z-coordinates is a valid
+ * curve point on P-384.
+ * The routine checks whether the coordinates are a solution of the modified
+ * Weierstrass equation zy^2 = x^3 + axz^2 + bz^3  mod p.
+ * The routine makes use of the property that the domain parameter 'a' can be
+ * written as a=-3 for the P-384 curve, hence the routine is limited to P-384.
+ * The routine does not return a boolean result but computes the left side
+ * and the right sight of the Weierstrass equation and leaves the final
+ * comparison to the caller.
+ * The routine runs in constant time.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  [w13, w12]:  domain parameter p (modulus)
+ * @param[in]  x20:         dptr_x,   pointer to dmem location containing projective
+ *                                    x-coordinate of input point
+ * @param[in]  x21:         dptr_y,   pointer to dmem location containing projective
+ *                                    y-coordinate of input point
+ * @param[in]  x22:         dptr_rhs, pointer to dmem location where right
+ *                                    side result will be stored
+ * @param[in]  x23:         dptr_lhs, pointer to dmem location where left side
+ *                                    result will be stored
+ * @param[in]  x30:         dptr_z,   pointer to dmem location containing projective
+ *                                    z-coordinate of input point
+ *
+ * clobbered registers: x2, x3, w0 to w5, w10 to w17
+ * clobbered flag groups: FG0
+ */
+ .globl p384_isoncurve_proj
+p384_isoncurve_proj:
+
+  /* load domain parameter b from dmem
+     [w4, w5] = b = dmem[p384_b] */
+  li        x2, 4
+  la        x3, p384_b
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2++, 32(x3)
+
+  /* load projective z-coordinate of curve point from dmem
+     [w1, w0] <= dmem[dptr_z] = dmem[19] */
+  li        x2, 0
+  bn.lid    x2++, 0(x30)
+  bn.lid    x2++, 32(x30)
+
+  /* bz^3 = [w5,w4] <= z*(z*(z*b)) = [w1,w0]*([w1,w0]*([w1,w0]*[w3,w2])) */
+  bn.mov    w10, w0
+  bn.mov    w11, w1
+  bn.mov    w16, w4
+  bn.mov    w17, w5
+  jal       x1, p384_mulmod_p
+  bn.mov    w10, w0
+  bn.mov    w11, w1
+  jal       x1, p384_mulmod_p
+  bn.mov    w10, w0
+  bn.mov    w11, w1
+  jal       x1, p384_mulmod_p
+  bn.mov    w4, w16
+  bn.mov    w5, w17
+
+  /* setup all-zero reg */
+  bn.xor    w31, w31, w31
+
+  /* load projective x-coordinate of curve point from dmem
+     [w1, w0] <= dmem[dptr_x] = dmem[20] */
+  li        x2, 0
+  bn.lid    x2++, 0(x20)
+  bn.lid    x2++, 32(x20)
+
+  /* load projective y-coordinate of curve point from dmem
+     [w3, w2] <= dmem[dptr_y] = dmem[24] */
+  bn.lid    x2++, 0(x21)
+  bn.lid    x2, 32(x21)
+
+  /* y^2 = [w17,w16] <= y*y = [w3,w2]*w[w3,w2] */
+  bn.mov    w10, w2
+  bn.mov    w11, w3
+  bn.mov    w16, w2
+  bn.mov    w17, w3
+  jal       x1, p384_mulmod_p
+
+  /* load projective z-coordinate of curve point from dmem
+     [w11, w10] <= dmem[dptr_z] = dmem[19] */
+  li        x2, 10
+  bn.lid    x2++, 0(x30)
+  bn.lid    x2++, 32(x30)
+
+  /* zy^2 = [w17,w16] <= z*y^2 = [w17,w16]*[w11,w10] */
+  jal       x1, p384_mulmod_p
+
+  /* store result (left side): dmem[dptr_lhs] <= zy^2 = [w17,w16] */
+  li        x2, 16
+  bn.sid    x2++, 0(x23)
+  bn.sid    x2++, 32(x23)
+
+  /* load projective z-coordinate of curve point from dmem
+     [w11, w10] <= dmem[dptr_z] = dmem[19] */
+  li        x2, 10
+  bn.lid    x2++, 0(x30)
+  bn.lid    x2++, 32(x30)
+
+  /* xz = [w17,w16] <= z*x = [w11,w10]*[w1,w0] */
+  bn.mov    w16, w0
+  bn.mov    w17, w1
+  jal       x1, p384_mulmod_p
+
+  /* load projective z-coordinate of curve point from dmem
+     [w11, w10] <= dmem[dptr_z] = dmem[19] */
+  li        x2, 10
+  bn.lid    x2++, 0(x30)
+  bn.lid    x2++, 32(x30)
+
+  /* xz^2 = [w3,w2] <= z*(z*x) = [w3,w2]*[w11,w10] */
+  jal       x1, p384_mulmod_p
+  bn.mov    w2, w16
+  bn.mov    w3, w17
+
+  /*  x^3 = [w17,w16] <= (x*x)*x = ([w1,w0]*(w1,w0])*[w1,w0] */
+  bn.mov    w10, w0
+  bn.mov    w11, w1
+  bn.mov    w16, w0
+  bn.mov    w17, w1
+  jal       x1, p384_mulmod_p
+  bn.mov    w10, w0
+  bn.mov    w11, w1
+  jal       x1, p384_mulmod_p
+
+  /* for curve P-384, 'a' can be written as a = -3, therefore we subtract
+     xz^2 three times from x^3.
+     x^3 + axz^2  mod p = [w17,w16] <= x^3 -3xz^2 mod p
+                        = [w17,w16] - [w3,w2] - [w3,w2] - [w3,w2] mod [w13,w12] */
+  loopi     3, 6
+    bn.sub    w0,  w16, w2
+    bn.subb   w1,  w17, w3
+    bn.add    w10, w0,  w12
+    bn.addc   w11, w1,  w13
+    bn.sel    w16, w10, w0, C
+    bn.sel    w17, w11, w1, C
+
+  /* add domain parameter bz^3
+     x^3 + axz^2 + bz^3 mod p = [w1,w0] <= [w17,w16] + [w5,w4] mod [w13,w12] */
+  bn.add    w16, w16, w4
+  bn.addc   w17, w17, w5
+  bn.sub    w10, w16, w12
+  bn.subb   w11, w17, w13
+  bn.sel    w0,  w16, w10, C
+  bn.sel    w1,  w17, w11, C
+
+  /* store result (right side)
+     dmem[dptr_rhs] <= x^3 + axz^2 + bz^3 mod p = [w1,w0] */
+  li        x2, 0
+  bn.sid    x2++, 0(x22)
+  bn.sid    x2++, 32(x22)
+
+  ret
diff --git a/sw/otbn/crypto/p384_keygen.s b/sw/otbn/crypto/p384_keygen.s
index 36463968b84d4..73bd3a4d7e5de 100644
--- a/sw/otbn/crypto/p384_keygen.s
+++ b/sw/otbn/crypto/p384_keygen.s
@@ -61,6 +61,8 @@ p384_random_scalar:
   /* Obtain 1024 bits of randomness from RND. */
   bn.wsrr   w6, RND
   bn.wsrr   w7, RND
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
   bn.wsrr   w8, RND
   bn.wsrr   w9, RND
 
@@ -70,6 +72,8 @@ p384_random_scalar:
   bn.xor    w6, w6, w5
   bn.wsrr   w5, URND
   bn.xor    w7, w7, w5
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
   bn.wsrr   w5, URND
   bn.xor    w8, w8, w5
   bn.wsrr   w5, URND
@@ -80,6 +84,8 @@ p384_random_scalar:
      w7 <= w7[192:0]
      w9 <= w9[192:0] */
   bn.rshi   w7, w31, w7 >> 64
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
   bn.rshi   w9, w31, w9 >> 64
 
   /* Compute Solinas constant k for modulus n (we know it is only 191 bits, so
@@ -119,6 +125,9 @@ p384_random_scalar:
   bn.mov    w20, w31
   jal       x1, p384_reduce_n
 
+  /* Clear flags. */
+  bn.add    w31, w31, w31
+
   /* Compare w16 to 0. */
   bn.cmp    w16, w31
 
@@ -179,11 +188,19 @@ p384_generate_random_key:
   bn.sid    x2++, 0(x20)
   bn.sid    x2++, 32(x20)
 
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
   /* Write second share to DMEM.
      dmem[d1] <= [w9,w8] = d1 */
   bn.sid    x2++, 0(x21)
   bn.sid    x2++, 32(x21)
 
+  /* Write zero to the most significant 256 bits of both shares. */
+  li        x2, 31
+  bn.sid    x2, 64(x20)
+  bn.sid    x2, 64(x21)
+
   ret
 
 /**
@@ -219,37 +236,12 @@ p384_generate_k:
   bn.sid    x2++, 0(x20)
   bn.sid    x2++, 32(x20)
 
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
   /* Write second share to DMEM.
      dmem[k1] <= [w9,w8] = k1 */
   bn.sid    x2++, 0(x21)
   bn.sid    x2++, 32(x21)
 
   ret
-
-.section .data
-
-.balign 32
-
-/* 1st scalar share d0 */
-.globl k0
-.weak k0
-k0:
-  .zero 64
-
-/* 2nd scalar share d1 */
-.globl k1
-.weak k1
-k1:
-  .zero 64
-
-/* 1st private key share d0 */
-.globl d0
-.weak d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 */
-.globl d1
-.weak d1
-d1:
-  .zero 64
diff --git a/sw/otbn/crypto/p384_keygen_from_seed.s b/sw/otbn/crypto/p384_keygen_from_seed.s
index e054da90badc1..3729a9c1150da 100644
--- a/sw/otbn/crypto/p384_keygen_from_seed.s
+++ b/sw/otbn/crypto/p384_keygen_from_seed.s
@@ -98,6 +98,9 @@ p384_key_from_seed:
   bn.sub    w24, w10, w16
   bn.subb   w25, w11, w17
 
+  /* Clear flags. */
+  bn.sub    w31, w31, w31
+
   /* Compute d1. Because 2^384 < 2 * n, a conditional subtraction is
      sufficient to reduce. Similarly to the carry bit, the conditional bit here
      is not very sensitive because the shares are large relative to n.
@@ -105,6 +108,12 @@ p384_key_from_seed:
   bn.sel    w5, w10, w24, FG0.C
   bn.sel    w6, w11, w25, FG0.C
 
+  /* Clear w25 before over writing it with a different share. */
+  bn.xor    w25, w25, w25
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
   /* Isolate the carry bit and shift it back into position.
        w25 <= x0[384] << 128 */
   bn.rshi   w25, w31, w21 >> 128
@@ -115,11 +124,11 @@ p384_key_from_seed:
   bn.xor    w21, w21, w25
 
   /* Conditionally subtract n to reduce.
-       [w21,w20] <= (x0 mod 2^384) mod n */
+       [w29,w28] <= (x0 mod 2^384) mod n */
   bn.sub    w26, w20, w16
   bn.subb   w27, w21, w17
-  bn.sel    w20, w20, w26, FG0.C
-  bn.sel    w21, w21, w27, FG0.C
+  bn.sel    w28, w20, w26, FG0.C
+  bn.sel    w29, w21, w27, FG0.C
 
   /* Compute the correction factor.
        [w25,w24] <= (x[384] << 384) mod n = c */
@@ -130,15 +139,15 @@ p384_key_from_seed:
 
   /* Compute d0 with a modular subtraction. First we add n to protect
      against underflow, then conditionally subtract it again if needed.
-       [w23,w22] <= ([w21, w20] - [w25,w24]) mod n = d0 */
-  bn.add    w20, w20, w16
-  bn.addc   w21, w21, w17
-  bn.sub    w20, w20, w24
-  bn.subb   w21, w21, w25
-  bn.sub    w26, w20, w16
-  bn.subb   w27, w21, w17
-  bn.sel    w22, w20, w26, FG0.C
-  bn.sel    w23, w21, w27, FG0.C
+       [w23,w22] <= ([w29, w28] - [w25,w24]) mod n = d0 */
+  bn.add    w28, w28, w16
+  bn.addc   w29, w29, w17
+  bn.sub    w28, w28, w24
+  bn.subb   w29, w29, w25
+  bn.sub    w26, w28, w16
+  bn.subb   w27, w29, w17
+  bn.sel    w22, w28, w26, FG0.C
+  bn.sel    w23, w29, w27, FG0.C
 
   /* Get 63 bits of randomness from RND, multiply it with n,
      and add it to the key share to get a 448-bit share. */
@@ -151,6 +160,12 @@ p384_key_from_seed:
   bn.mov    w1, w18
   bn.mov    w2, w19
 
+  /* Clear regs. */
+  bn.xor    w10, w10, w10
+  bn.xor    w11, w11, w11
+  bn.xor    w18, w18, w18
+  bn.xor    w19, w19, w19
+
   /* [w6,w5] <= [w6,w5] + [w2,w1] = d1 + (RND >> 193) * n = d1' */
   bn.add    w5, w5, w1
   bn.addc   w6, w6, w2
@@ -167,6 +182,9 @@ p384_key_from_seed:
   bn.add    w22, w22, w3
   bn.addc   w23, w23, w4
 
+  /* Clear flags. */
+  bn.add    w31, w31, w31
+
   /* Write first 448-bit share to DMEM.
      dmem[d0] <= [w23,w22] = d0' */
   la        x20, d0
@@ -174,27 +192,16 @@ p384_key_from_seed:
   bn.sid    x2++, 0(x20)
   bn.sid    x2++, 32(x20)
 
+  /* Write zero to the most significant 256 bits of both shares. */
+  li        x2, 31
+  bn.sid    x2, 64(x20)
+  la        x20, d1
+  bn.sid    x2, 64(x20)
+
   /* Write second 448-bit share to DMEM.
      dmem[d1] <= [w6,w5] = d1' */
-  la        x20, d1
   li        x2, 5
   bn.sid    x2++, 0(x20)
   bn.sid    x2++, 32(x20)
 
   ret
-
-.section .data
-
-.balign 32
-
-/* 1st private key share d0 */
-.globl d0
-.weak d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 */
-.globl d1
-.weak d1
-d1:
-  .zero 64
diff --git a/sw/otbn/crypto/p384_mem.s b/sw/otbn/crypto/p384_mem.s
new file mode 100644
index 0000000000000..930fdd0d0ea4e
--- /dev/null
+++ b/sw/otbn/crypto/p384_mem.s
@@ -0,0 +1,109 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * DMEM layout for the `p384` OTBN app.
+ */
+
+.bss
+
+/* Operational mode. */
+.globl mode
+.balign 4
+mode:
+  .zero 4
+
+/* Success code for basic validity checks on the public key and signature. */
+.globl ok
+.balign 4
+ok:
+  .zero 4
+
+/* Message digest. */
+.globl msg
+.balign 32
+msg:
+  .zero 64
+
+/* Signature R. */
+.globl r
+.balign 32
+r:
+  .zero 64
+
+/* Signature S. */
+.globl s
+.balign 32
+s:
+  .zero 64
+
+/* Public key x-coordinate. */
+.globl x
+.balign 32
+x:
+  .zero 64
+
+/* Public key y-coordinate. */
+.globl y
+.balign 32
+y:
+  .zero 64
+
+/* Private key input/output buffer. */
+.globl d0_io
+.balign 32
+d0_io:
+  .zero 64
+
+.globl d1_io
+.balign 32
+d1_io:
+  .zero 64
+
+/* Private key (d) in two shares: d = (d0 + d1) mod n. */
+.globl d0
+.balign 32
+d0:
+  .zero 96
+
+.globl d1
+.balign 32
+d1:
+  .zero 96
+
+/* Verification result x_r (aka x_1). */
+.globl x_r
+.balign 32
+x_r:
+  .zero 64
+
+/* Secret scalar (k) in two shares: k = (k0 + k1) mod n */
+.globl k0
+.balign 32
+k0:
+  .zero 64
+
+.globl k1
+.balign 32
+k1:
+  .zero 64
+
+/* Right side of Weierstrass equation */
+.globl rhs
+.balign 32
+rhs:
+  .zero 64
+
+/* Left side of Weierstrass equation */
+.globl lhs
+.balign 32
+lhs:
+  .zero 64
+
+.section .scratchpad
+/* 704 bytes of scratchpad memory */
+.balign 32
+.globl scratchpad
+scratchpad:
+  .zero 896
diff --git a/sw/otbn/crypto/p384_scalar_mult.s b/sw/otbn/crypto/p384_scalar_mult.s
index f476438b85bc2..83a553ebb1975 100644
--- a/sw/otbn/crypto/p384_scalar_mult.s
+++ b/sw/otbn/crypto/p384_scalar_mult.s
@@ -10,9 +10,9 @@
 /**
  * Externally callable wrapper for P-384 scalar point multiplication
  *
- * Calculates R = k*P = k*(x_p, y_p)
+ * Calculates R = d*P = d*(x_p, y_p)
  *         where R, P are valid P-384 curve points in affine coordinates,
- *         k is a 384-bit scalar.
+ *         d is a 384-bit scalar.
  *         The x coordinate of R is arithmetically masked.
  * Returns the masked x coordinate of R and the corresponding mask.
  *
@@ -21,8 +21,8 @@
  *
  * @param[in]   dmem[x]: affine x-coordinate in dmem
  * @param[in]   dmem[y]: affine y-coordinate in dmem
- * @param[in]  dmem[k0]: 1st scalar share k0 in dmem
- * @param[in]  dmem[k1]: 2nd scalar share k1 in dmem
+ * @param[in]  dmem[d0]: 1st scalar share d0 in dmem
+ * @param[in]  dmem[d1]: 2nd scalar share d1 in dmem
  * @param[out]  dmem[x]: masked x coordinate of R
  * @param[out]  dmem[y]: corresponding mask
  *
@@ -54,11 +54,11 @@ p384_scalar_mult:
   /* set dmem pointer to point to y-coordinate */
   la       x21, y
 
-  /* set dmem pointer to point to 1st scalar share k0 */
-  la       x17, k0
+  /* set dmem pointer to point to 1st scalar share d0 */
+  la       x17, d0
 
-  /* set dmem pointer to point to 2nd scalar share k1 */
-  la       x19, k1
+  /* set dmem pointer to point to 2nd scalar share d1 */
+  la       x19, d1
 
   /* load domain parameter p (modulus)
      [w13, w12] = p = dmem[p384_p] */
@@ -74,9 +74,26 @@ p384_scalar_mult:
   bn.lid    x2++, 0(x3)
   bn.lid    x2++, 32(x3)
 
-  /* scalar multiplication inprojective space
+  /* scalar multiplication in projective space
      [w30:w25] <= (x, y, z) = k * P */
-  jal       x1, scalar_mult_int_p384
+  jal       x1, scalar_mult_int_p384_reblind
+
+  /* load the result of the scalar multiplication into memory for
+     the projective is on curve check. */
+  li        x2, 25
+  la        x3, x
+  bn.sid    x2++, 0(x3)
+  bn.sid    x2++, 32(x3)
+  la        x3, y
+  bn.sid    x2++, 0(x3)
+  bn.sid    x2++, 32(x3)
+
+  /* store the z coordinate to scratchpad */
+  bn.sid    x2++, 0(x30)
+  bn.sid    x2++, 32(x30)
+
+  /* check if the result is on the p384 curve */
+  jal       x1, p384_isoncurve_proj_check
 
   /* Arithmetic masking:
    1. Generate a random mask r
@@ -171,37 +188,3 @@ p384_scalar_mult:
   bn.sid    x2, 32(x21)
 
   ret
-
-/* scratchpad memory */
-.section .data
-
-.balign 32
-
-/* 1st scalar share d0 */
-.globl k0
-.weak k0
-k0:
-  .zero 64
-
-/* 2nd scalar share d1 */
-.globl k1
-.weak k1
-k1:
-  .zero 64
-
-/* x-coordinate */
-.globl x
-.weak x
-x:
-  .zero 64
-
-/* y-coordinate */
-.globl y
-.weak y
-y:
-  .zero 64
-
-/* 704 bytes of scratchpad memory */
-.balign 32
-scratchpad:
-  .zero 704
diff --git a/sw/otbn/crypto/p384_sign.s b/sw/otbn/crypto/p384_sign.s
index 5266b12036588..c4a278f1ff3af 100644
--- a/sw/otbn/crypto/p384_sign.s
+++ b/sw/otbn/crypto/p384_sign.s
@@ -94,6 +94,9 @@ p384_sign:
   jal       x1, scalar_mult_int_p384
   jal       x1, proj_to_affine_p384
 
+  /* call curve point test routine in P-384 lib */
+  jal       x1, p384_isoncurve_check
+
   /* store r of signature in dmem: dmem[dptr_r] <= r = R_x = [w26,w25] */
   li        x2, 25
   bn.sid    x2++, 0(x14)
@@ -146,7 +149,31 @@ p384_sign:
   bn.mov    w27, w16
   bn.mov    w28, w17
 
-  /* Multiplicative masking of shares d0 and d1 */
+  /* [w3,w2] <= n << 64 */
+  bn.rshi w2, w12, w31 >> 192
+  bn.rshi w3, w13, w12 >> 192
+
+  /* Load 448 bits of randomness into [w30,w29] */
+  bn.wsrr  w29, URND
+  bn.wsrr  w30, URND
+  bn.rshi  w30, w31, w30 >> 64
+
+  /* [w9,w8] <= [w30,w29] - [w3,w2] = rand(448) - (n << 64) */
+  bn.sub    w8, w29, w2
+  bn.subb   w9, w30, w3
+
+  /* [w1,w0] <= m mod (n << 64) */
+  bn.sel    w0, w29, w8, FG0.C
+  bn.sel    w1, w30, w9, FG0.C
+
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.wsrr    w8, URND
+  bn.wsrr    w9, URND
+  bn.wsrr   w10, URND
+  bn.wsrr   w11, URND
+  bn.wsrr   w29, URND
+  bn.wsrr   w30, URND
 
   /* load 1st share d0 from dmem
      [w11,w10] <= d0 = dmem[dptr_d0] */
@@ -154,24 +181,70 @@ p384_sign:
   bn.lid    x2++, 0(x4)
   bn.lid    x2++, 32(x4)
 
+  /* [w9,w8] <= d0 + m */
+  bn.add    w8, w10, w0
+  bn.addc   w9, w11, w1
+
+  /* [w30,w29] <= d0 + m - (n << 64) */
+  bn.sub    w29, w8, w2
+  bn.subb   w30, w9, w3
+
+  /* [w11,w10] <= d0 + m mod (n << 64) */
+  bn.sel    w10, w8, w29, FG0.C
+  bn.sel    w11, w9, w30, FG0.C
+
   /* [w7,w6] <= ([w11,w10] * w4) mod n = (d0 * alpha) mod n */
   bn.mov    w16, w4
   jal       x1, p384_mulmod448x128_n
   bn.mov    w6, w16
   bn.mov    w7, w17
 
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.wsrr    w8, URND
+  bn.wsrr    w9, URND
+  bn.wsrr   w10, URND
+  bn.wsrr   w11, URND
+  bn.wsrr   w16, URND
+  bn.wsrr   w17, URND
+  bn.wsrr   w29, URND
+  bn.wsrr   w30, URND
+
   /* load 2nd share d1 from dmem
-     [w11,w10] <= d1 = dmem[dptr_d1] */
-  li        x2, 10
+     [w30,w29] <= d1 = dmem[dptr_d1] */
+  bn.mov    w16, w4      /* prepare for next p384_mulmod488x128_n call below */
+  li        x2, 29
   bn.lid    x2++, 0(x5)
   bn.lid    x2++, 32(x5)
 
+  /* [w30,w29] <= d1 - m */
+  bn.sub    w29, w29, w0, FG1
+  bn.subb   w30, w30, w1, FG1
+
+  /* [w9,w8] <= d1 - m + (n << 64) */
+  bn.add    w8, w29, w2
+  bn.addc   w9, w30, w3
+
+  /* [w11,w10] <= d1 - m mod (n << 64) */
+  bn.sel    w10, w8, w29, FG1.C
+  bn.sel    w11, w9, w30, FG1.C
+
   /* [w9,w8] <= ([w11,w10] * w4) mod n = (d1 * alpha) mod n */
   bn.mov    w16, w4
   jal       x1, p384_mulmod448x128_n
   bn.mov    w8, w16
   bn.mov    w9, w17
 
+  /* Clear flags and randomize registers. */
+  bn.sub    w31, w31, w31
+  bn.sub    w31, w31, w31, FG1
+  bn.wsrr   w10, URND
+  bn.wsrr   w11, URND
+  bn.wsrr   w16, URND
+  bn.wsrr   w17, URND
+  bn.wsrr   w29, URND
+  bn.wsrr   w30, URND
+
   /* Multiplicative masking of message msg */
 
   /* load message from dmem
@@ -251,58 +324,3 @@ p384_sign:
   bn.sid    x2++, 32(x15)
 
   ret
-
-
-/* scratchpad memory */
-.section .data
-
-.balign 32
-
-/* message to be signed */
-.globl msg
-.weak msg
-msg:
-  .zero 64
-
-/* r component of signature */
-.globl r
-.weak r
-r:
-  .zero 64
-
-/* s component of signature */
-.globl s
-.weak s
-s:
-  .zero 64
-
-/* 1st scalar share d0 */
-.globl k0
-.weak k0
-k0:
-  .zero 64
-
-/* 2nd scalar share d1 */
-.globl k1
-.weak k1
-k1:
-  .zero 64
-
-/* 1st private key share d0 */
-.globl d0
-.weak d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 */
-.globl d1
-.weak d1
-d1:
-  .zero 64
-
-/* 704 bytes of scratchpad memory */
-.balign 32
-.globl scratchpad
-.weak scratchpad
-scratchpad:
-  .zero 704
diff --git a/sw/otbn/crypto/p384_verify.s b/sw/otbn/crypto/p384_verify.s
index 876ad8670b399..f76c9b0517b87 100644
--- a/sw/otbn/crypto/p384_verify.s
+++ b/sw/otbn/crypto/p384_verify.s
@@ -6,6 +6,15 @@
  *   test.
  */
 
+/**
+ * Hardened boolean values.
+ *
+ * Should match the values in `hardened_asm.h`. The truthy value is XORed with
+ * 384, i.e. the expected loop counter from verify's scalar mult.
+ */
+.equ HARDENED_BOOL_TRUE_XOR_COUNTER, 0x6b9
+.equ HARDENED_BOOL_FALSE, 0x1d4
+
  .section .text
 
 /**
@@ -100,6 +109,7 @@ store_proj:
  * @param[in]  dmem[msg]: message to be verified in dmem
  * @param[in]    dmem[x]: x-coordinate of public key in dmem
  * @param[in]    dmem[y]: y-coordinate of public key in dmem
+ * @param[out] dmem[ok]:  whether the signature passed basic checks (32 bits)
  * @param[out] dmem[x_r]: verification result: reduced affine x1-coordinate
  *
  * Scratchpad memory layout:
@@ -115,7 +125,7 @@ store_proj:
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * clobbered registers: x2 to x5, x10, x11, x12, x22 to 28, w0 to w31
+ * clobbered registers: x2 to x5, x10, x11, x12, x15, x22 to 28, w0 to w31
  * clobbered flag groups: FG0
  */
 .globl p384_verify
@@ -155,19 +165,19 @@ p384_verify:
   bn.lid    x2++, 0(x7)
   bn.lid    x2++, 32(x7)
 
-  /* goto 'fail' if [w30,w29] == [w31, w31] <=> s == 0 */
+  /* Fail if [w30,w29] == [w31, w31] <=> s == 0 */
   bn.cmp    w31, w29
   bn.cmpb   w31, w30
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
-  beq       x2, x0, fail
+  beq       x2, x0, p384_invalid_input
 
-  /* goto 'fail' if [w30,w29] >= [w12,w13] <=> s >= n */
+  /* Fail if [w30,w29] >= [w12,w13] <=> s >= n */
   bn.cmp    w29, w12
   bn.cmpb   w30, w13
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
-  beq       x2, x0, fail
+  beq       x2, x0, p384_invalid_input
 
   /* Compute Solinas constant k for modulus n (we know it is only 191 bits, so
      no need to compute the high part):
@@ -194,19 +204,19 @@ p384_verify:
   bn.lid    x2++, 0(x6)
   bn.lid    x2++, 32(x6)
 
-  /* goto 'fail' if [w11, w10] == [w31, w31] <=> r == 0 */
+  /* Fail if [w11, w10] == [w31, w31] <=> r == 0 */
   bn.cmp    w31, w10
   bn.cmpb   w31, w11
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
-  beq       x2, x0, fail
+  beq       x2, x0, p384_invalid_input
 
-  /* goto 'fail' if [w11,w10] >= [w12,w13] <=> r >= n */
+  /* Fail if [w11,w10] >= [w12,w13] <=> r >= n */
   bn.cmp    w10, w12
   bn.cmpb   w11, w13
   csrrs     x2, FG0, x0
   andi      x2, x2, 1
-  beq       x2, x0, fail
+  beq       x2, x0, p384_invalid_input
 
   /* u2 = [w3,w2] <= [w17,w16] <= r*s^-1 mod n
         = [w11,w10]*[w17,w16] mod [w13,w12] */
@@ -292,6 +302,9 @@ p384_verify:
 
   la        x26, scratchpad
 
+  /* Initialize loop counter to 0. */
+  addi      x15, x0, 0
+
   /* main loop with decreasing index i (i=383 downto 0) */
   loopi     384, 35
 
@@ -370,7 +383,9 @@ p384_verify:
     jal       x1, proj_add_p384
     addi      x12, x26, 0
     jal       x1, store_proj
-    nop
+
+    /* increment counter */
+    addi     x15, x15, 1
 
   /* load domain parameter p (order of finite field)
      [w13, w12] <= p = dmem[p384_p] */
@@ -405,66 +420,15 @@ p384_verify:
   bn.sel    w4, w16, w4, C
   bn.sel    w5, w17, w5, C
 
+  /* If we got here the basic validity checks passed, so set `ok` to true. */
+  la       x2, ok
+  addi     x3, x0, HARDENED_BOOL_TRUE_XOR_COUNTER
+  xor      x3, x3, x15
+  sw       x3, 0(x2)
+
   /* store affine x-coordinate in dmem: dmem[x_r] <= x1 = [w5,w4] */
   li        x2, 4
   bn.sid    x2++, 0(x8)
   bn.sid    x2++, 32(x8)
 
   ret
-
-/**
- * Failure cases jump here.
- */
-fail:
-  unimp
-  unimp
-  unimp
-
-
-/* scratchpad memory */
-.section .data
-
-.balign 32
-
-/* message to be signed */
-.globl msg
-.weak msg
-msg:
-  .zero 64
-
-/* r component of signature */
-.globl r
-.weak r
-r:
-  .zero 64
-
-/* s component of signature */
-.globl s
-.weak s
-s:
-  .zero 64
-
-/* public key x-coordinate */
-.globl x
-.weak x
-x:
-  .zero 64
-
-/* public key y-coordinate */
-.globl y
-.weak y
-y:
-  .zero 64
-
-/* verification result (x1-coordinate) */
-.globl x_r
-.weak x_r
-x_r:
-  .zero 64
-
-/* Scratchpad memory */
-.balign 32
-.globl scratchpad
-.weak scratchpad
-scratchpad:
-  .zero 896
diff --git a/sw/otbn/crypto/primality.s b/sw/otbn/crypto/primality.s
deleted file mode 100644
index 020e5aa0d4799..0000000000000
--- a/sw/otbn/crypto/primality.s
+++ /dev/null
@@ -1,533 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/* Public interface. */
-.globl miller_rabin
-
-/* The following subroutines are intended to be internal, but are exposed for
-   testing and SCA purposes. */
-.globl test_witness
-
-/**
- * Performs the Miller-Rabin primality test.
- *
- * Returns r = 2^256-1 if w is probably prime, 0 if w is composite.
- *
- * This routine runs up to `t` rounds of Miller-Rabin primality checks, exiting
- * early if any check fails (proving w is composite). If `t` rounds succeed,
- * then we declare `w` "probably prime". The exact probability depends on `t`
- * and the size of `w`. For more algorithmic details, see
- * `test_witness`.
- *
- * Requires that the candidate prime w is exactly 2^(n*256) bits:
- *  2^(n*256 - 1) <= w < 2^(n*256)
- * ... and that w is odd.
- *
- * Expects the Montgomery constants for w to be precomputed before entry. None
- * of the input buffers may overlap in DMEM. This routine runs in constant time
- * relative to w if w is probably prime.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x10: t, number of Miller-Rabin rounds (security parameter)
- * @param[in] x14: dptr_b, pointer to temporary working buffer in dmem (n*32 bytes)
- * @param[in] x15: dptr_z, pointer to temporary working buffer in dmem (n*32 bytes)
- * @param[in] x16: dptr_w, pointer to candidate prime w in dmem, w mod 4 = 3
- * @param[in] x17: dptr_m0inv, pointer to Montgomery constant m0' (for w) in dmem
- * @param[in] x18: dptr_rr, pointer to Montgomery constant RR = R^2 mod w in dmem
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] x31: n-1, number of limbs minus 1
- * @param[in] w31: all-zero
- * @param[out] w21: result, 2^256-1 or 0
- *
- * clobbered registers: x2, x3, x5 to x13, x16, x19 to x26,
- *                      w2, w3, w4..w[4+(n-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
- */
-miller_rabin:
-  /* Initialize w21 (can be any nonzero value with a high Hamming distance from
-     the sensitive "w is prime" value). */
-  bn.addi   w21, w31, 1
-
-  loop     x10, 6
-    /* Check if w21 is 0, meaning we have already found that w is composite.
-         FG0.C <= (w21 == 0) ? 0 : 1 */
-    bn.cmp   w31, w21
-
-    /* x2 <= CSRs[FG0][0] = FG0.C */
-    csrrs    x2, FG0, x0
-    andi     x2, x2, 1
-
-    /* Skip the rest of the loop if w is composite (x2 == 0). We can't exit
-       loops early in OTBN, but we can jump past the loop body to speed up
-       computation. */
-    beq      x2, x0, _miller_rabin_loop_end
-
-    /* Call another round.  */
-    jal      x1, miller_rabin_round
-
-    /* We jump here if w has already been found to be composite. */
-    _miller_rabin_loop_end:
-    nop
-
-  ret
-
-/**
- * Performs one round of the Miller-Rabin primality test.
- *
- * Returns r = 2^256-1 if w is possibly prime, 0 if w is composite.
- *
- * This routine generates a random number in the range [2,w-2] and then calls
- * `test_witness` to check if the selected random number is a
- * witness to the primality of `w`. For more algorithmic details, see
- * `test_witness`.
- *
- * Requires that the candidate prime w is exactly 2^(n*256) bits:
- *  2^(n*256 - 1) <= w < 2^(n*256)
- * ... and that w is odd.
- *
- * Expects the Montgomery constants for w to be precomputed before entry. None
- * of the input buffers may overlap in DMEM. This routine runs in constant time
- * relative to w if w is possibly prime.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x14: dptr_b, pointer to temporary working buffer in dmem (n*32 bytes)
- * @param[in] x15: dptr_z, pointer to temporary working buffer in dmem (n*32 bytes)
- * @param[in] x16: dptr_w, pointer to candidate prime w in dmem, w mod 4 = 3
- * @param[in] x17: dptr_m0inv, pointer to Montgomery constant m0' (for w) in dmem
- * @param[in] x18: dptr_rr, pointer to Montgomery constant RR = R^2 mod w in dmem
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] x31: n-1, number of limbs minus 1
- * @param[in] w31: all-zero
- * @param[out] w21: result, 2^256-1 or 0
- *
- * clobbered registers: x2, x3, x5 to x13, x16, x19 to x26,
- *                      w2, w3, w4..w[4+(n-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
- */
-miller_rabin_round:
-  /* Generate a new random number to test. We take input from RND but xor with
-     URND as an extra protection (since it is fast and can only strengthen the
-     randomness.)
-       dmem[dptr_b:dptr_b+n*32] <= RND(n*32) ^ URND(n*32) = b */
-  li       x23, 23
-  addi     x2, x14, 0
-  loop     x30, 4
-    /* w22 <= URND() */
-    bn.wsrr  w22, URND
-    /* w23 <= RND() */
-    bn.wsrr  w23, RND
-    /* w23 <= w22 ^ w23 */
-    bn.xor   w23, w22, w23
-    /* b[i] <= w23 */
-    bn.sid   x23, 0(x2++)
-
-  /* FG0.C <= 1 */
-  bn.subi  w22, w31, 1
-
-  /* Check that b < w - 1.
-       FG0.C <= b <? w - FG0.C */
-  li       x25, 25
-  addi     x2, x14, 0
-  addi     x3, x16, 0
-  loop     x30, 3
-    /* w23 <= b[i] */
-    bn.lid   x23, 0(x2++)
-    /* w25 <= w[i] */
-    bn.lid   x25, 0(x3++)
-    /* FG0.C <= b[i] - w[i] - FG0.C */
-    bn.cmpb  w23, w25
-
-  /* Extract FG0.C into a small register and jump back to the start if it is 0.
-       x2 <= CSRs[FG0][0] = FG0.C */
-  csrrs    x2, FG0, x0
-  andi     x2, x2, 1
-  beq      x2, x0, miller_rabin_round
-
-  /* Clear flags and compute the constant 1.
-       w21 <= 1
-       FG0.C <= 0 */
-  bn.addi  w21, w31, 1
-
-  /* Check that 1 < b.
-       FG0.C <= 1 <? b */
-  addi     x2, x14, 0
-  loop     x30, 3
-    /* w23 <= b[i] */
-    bn.lid   x23, 0(x2++)
-    /* FG0.C <= (i = 0 ? 1 : 0) - b[i] - FG0.C */
-    bn.cmpb  w21, w23
-    /* w21 <= 0 */
-    bn.mov   w21, w31
-
-  /* Extract FG0.C into a small register and retry if it is 0.
-       x2 <= CSRs[FG0][0] = FG0.C */
-  csrrs    x2, FG0, x0
-  andi     x2, x2, 1
-  beq      x2, x0, miller_rabin_round
-
-  /* Check if b is a witness to primality for w (tail-call).
-       w21 <= all 1s if w is possibly prime, otherwise 0 */
-  jal      x0, test_witness
-
-
-/**
- * Tests one potential witness for the Miller-Rabin primality test.
- *
- * Returns r = 2^256-1 if w is possibly prime, 0 if w is composite.
- *
- * Corresponds to the loop body of Algorithm 4.24 of the Handbook of Applied
- * Cryptography or section B.3.1 of FIPS 186-5. The full algorithm as described
- * by FIPS 186-5 is reproduced here for reference:
- *   1. Let a be the largest integer such that 2^a divides w-1.
- *   2. m = (w-1) / 2^a
- *   3. wlen = len (w).
- *   4. For i = 1 to iterations do
- *     4.1 Obtain a string b of wlen bits from a DRBG. Convert b to an integer
- *     using the algorithm in B.2.1.
- *     4.2 If ((b <= 1) or (b >= w-1)), then go to step 4.1.
- *     4.3 z = b^m mod w.
- *     4.4 If ((z = 1) or (z = w - 1)), then go to step 4.7.
- *     4.5 For j = 1 to a - 1 do.
- *       4.5.1 z = z^2 mod w.
- *       4.5.2 If (z = w - 1), then go to step 4.7.
- *       4.5.3 If (z = 1), then go to step 4.6.
- *     4.6 Return COMPOSITE.
- *     4.7 Continue.
- *   5. Return PROBABLY PRIME.
- *
- * If we specialize to the case that w mod 4 = 3, the routine becomes much
- * simpler and easier to make constant-time, because a in step 1 is always 1.
- * In pseudocode, the modified version of steps 4.3 through 4.7 is:
- *   4.3 Compute z = b^((w-1)/2) mod w.
- *   4.4 If ((z = 1) or (z = w - 1)), then go to step 4.7.
- *   4.5 No-op.
- *   4.6 Return COMPOSITE.
- *   4.7 Continue.
- *
- * Expects the Montgomery constants for w to be precomputed before entry. For
- * this routine, R = 2^(n*256) and R/2 < w < R. None of the input buffers may
- * overlap in DMEM. This routine runs in constant time relative to w if w is
- * possibly prime.
- *
- * This routine is constant-time relative to w if w is possibly prime.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x14: dptr_b, pointer to randomly-generated witness to use for testing
- * @param[in] x15: dptr_z, pointer to temporary working buffer in dmem (n*32 bytes)
- * @param[in] x16: dptr_w, pointer to candidate prime w in dmem, w mod 4 = 3
- * @param[in] x17: dptr_m0inv, pointer to Montgomery constant m0' (for w) in dmem
- * @param[in] x18: dptr_rr, pointer to Montgomery constant RR = R^2 mod w in dmem
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] x31: n-1, number of limbs minus 1
- * @param[in] w31: all-zero
- * @param[out] w21: result, 2^256-1 or 0
- *
- * clobbered registers: x2, x3, x5 to x13, x16, x19 to x26,
- *                      w2, w3, w4..w[4+(n-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
- */
-test_witness:
-  /* Initialize constants for montgomery multiplication. */
-  li         x8, 4
-  li         x9, 3
-  li        x10, 4
-  li        x11, 2
-
-  /* Convert the witness to Montgomery form.
-       dmem[dptr_b:dptr_b+n*32] <= montmul(b, RR) = (b * R) mod w */
-  addi      x19, x14, 0
-  addi      x20, x18, 0
-  jal       x1, montmul
-  addi      x21, x14, 0
-  loop      x30, 2
-    bn.sid    x8, 0(x21++)
-    addi      x8, x8, 1
-
-  /* Initialize wide-register pointers. */
-  li        x23, 23
-  li        x25, 25
-
-  /* Ensure the last 3 bits of the candidate prime are set so that w mod 4 = 3.
-     This is a precondition of the subroutine, but re-setting the bits here
-     provides further protection from e.g. fault injection attacks. */
-  bn.lid    x25, 0(x16)
-  bn.addi   w23, w31, 3
-  bn.or    w25, w25, w23
-  bn.sid    x25, 0(x16)
-
-  /* Clear carry flag.
-       FG0.C <= 0 */
-  bn.sub    w31, w31, w31
-
-  /* Initialize work buffer to (R - w) mod w (1 in Montgomery form).
-       dmem[dptr_z:dptr_z+n*32] <= (0 - w) mod R = R - w = R mod w */
-  addi      x20, x16, 0
-  addi      x21, x15, 0
-  loop      x30, 3
-    bn.lid    x23, 0(x20++)
-    bn.subb   w23, w31, w23
-    bn.sid    x23, 0(x21++)
-
-  /* Initialize loop counter and high limb.
-       x26 <= n - 1
-       w20 <= 0 */
-  addi      x26, x31, 0
-  bn.sub    w20, w20, w20
-
-  /* Perform modular exponentiation to compute b^((w-1)/2).
-
-     Loop through the limbs, most significant first, then iterate through each
-     bit of each limb.
-
-     Loop invariants (i=n-1 to 0):
-       x15 = dptr_z
-       x16 = dptr_w
-       x26 = i
-       w20 = w[i+1] (or 0 if i=n-1)
-       dmem[dptr_z:dptr_z+n*32] <= (b^((w - 1) >> (i*256)) * R) mod w */
-  loop    x30, 27
-    /* Get the ith limb of w.
-         w25 <= dmem[dptr_w + (i << 5)] = w[i] */
-    slli      x13, x26, 5
-    add       x13, x13, x16
-    bn.lid    x25, 0(x13)
-
-    /* Get limb i of ((w-1) / 2). Since we know w is odd, we can simply
-       concatenate with the limb above and shift right by 1.
-         w22 <= (w20[0] << 255) | (w[i] >> 1) = (w >> 1)[i] */
-    bn.rshi   w22, w20, w25 >> 1
-
-    /* Save the ith limb for the next iteration.
-         w20 <= w[i] */
-    bn.mov    w20, w25
-
-   /* Loop through the bits of this limb and multiply/accumulate. */
-    loopi   256, 19
-      /* Perform the next squaring step of modular exponentiation.
-           w4..w[4+(n-1)] = montmul(z, z) */
-      addi      x19, x15, 0
-      addi      x20, x15, 0
-      jal       x1, montmul
-
-      /* Store squaring result in work buffer.
-           dmem[dptr_z:dptr_z+n*32] <= w4..w[4+(n-1)] */
-      addi      x21, x15, 0
-      loop      x30, 2
-        bn.sid    x8, 0(x21++)
-        addi      x8, x8, 1
-
-      /* Perform the next multiplication step of modular exponentiation.
-           w4..w[4+(n-1)] = montmul(z, b) */
-      addi      x19, x14, 0
-      addi      x20, x15, 0
-      jal       x1, montmul
-
-      /* Shift the exponent and update flags; FG0.C will now be the next bit of
-         the exponent.
-           w22 <= (w22 << 1) mod 2^256
-           FG0.C <= w22[255] */
-      bn.add    w22, w22, w22
-
-      /* Select either squared or squared+multiplied result based on FG0.C.
-           dmem[dptr_z:dptr_z+n*32] <=
-             FG0.C ? w4..w[4+(n-1)] : dmem[dptr_z:dptr_z+n*32] */
-      addi      x2, x15, 0
-      li        x8, 4
-      loop      x30, 4
-        /* w23 <= dmem[dptr_z+i*32] */
-        bn.lid    x23, 0(x2)
-        /* w25 <= w[4+i] */
-        bn.movr   x25, x8++
-        /* w23 = FG0.C ? w[4+i] : dmem[dptr_z+i*32] */
-        bn.sel    w23, w25, w23, FG0.C
-        /* dmem[dptr_z+i*32] <= w23 */
-        bn.sid    x23, 0(x2++)
-
-      /* End of inner loop. */
-      nop
-
-    /* Update loop counter.
-         x26 <= x26 - 1 = i - 1 */
-    li        x3, 1
-    sub       x26, x26, x3
-    /* End of outer loop. */
-
-  /* Fully reduce mod w. The `montmul` routine does not guarantee that the
-     result is < w, only < R.
-       dmem[dptr_z:dptr_z+n*32] <= dmem[dptr_z:dptr_z+n*32] mod w */
-  jal       x1, reduce_modw
-
-  /* Check if the intermediate result represents 1 in Montgomery form.
-       w22 <= all 1s if dmem[x15:x15+n*32] is R mod w, otherwise 0 */
-  jal      x1, is_mont1
-  bn.mov   w22, w26
-
-  /* Check if the work buffer is (-R) mod w, which is the Montgomery form
-     representation of (-1) mod w = w - 1.
-        w26 <= all 1s if dmem[x15:x15+n*32] is (-R) mod w, otherwise 0 */
-  jal      x1, is_mont_minus1
-
-  /* If either check returned all-ones, then the input is possibly prime. */
-  bn.or    w21, w26, w22
-
-  /* TODO: add an FI check here to ensure we completed all loop iterations if
-     the result register is all 1s. */
-
-  ret
-
-/**
- * Fully reduce modulo a candidate prime w.
- *
- * Returns x mod w = (x - w) if x >= w, otherwise x.
- *
- * This routine requires that R/2 < w < R and that R = 2^(n*256). Since x < R,
- * at most one conditional subtraction is required to reduce.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x15: dptr_x, pointer to input buffer x in dmem
- * @param[in] x16: dptr_m, pointer to modulus m in dmem
- * @param[in] x23: 23, constant
- * @param[in] x25: 25, constant
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] w31: all-zero
- *
- * clobbered registers: x2, x3, w23, w25
- * clobbered flag groups: FG0, FG1
- */
-reduce_modw:
-  /* Clear flags in group 1. */
-  bn.sub    w31, w31, w31, FG1
-
-  /* Compare input to modulus.
-       FG1.C <= if x < w then 1 else 0 */
-  addi      x2, x15, 0
-  addi      x3, x16, 0
-  loop      x30, 3
-    bn.lid    x23, 0(x2++)
-    bn.lid    x25, 0(x3++)
-    bn.cmpb   w23, w25, FG1
-
-  /* Clear flags in group 0. */
-  bn.sub    w31, w31, w31
-
-  /* Conditional subtraction.
-       dmem[dptr_x:dptr_x+n*32] <= FG1.C ? x : x - w */
-  addi      x2, x15, 0
-  addi      x3, x16, 0
-  loop      x30, 5
-    bn.lid    x23, 0(x2)
-    bn.lid    x25, 0(x3++)
-    bn.subb   w25, w23, w25
-    bn.sel    w23, w23, w25, FG1.C
-    bn.sid    x23, 0(x2++)
-
-  ret
-
-/**
- * Determine if a number represents 1 in Montgomery form.
- *
- * Returns 2^256 - 1 if (x == R mod w), otherwise 0
- *
- * This routine requires that R/2 < w < R and that R = 2^(n*256). With that
- * assumption, we know that R mod w = R - w; if x is 1, then (w + x) mod R will
- * be zero.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x15: dptr_x, pointer to input buffer x in dmem
- * @param[in] x16: dptr_m, pointer to modulus m in dmem
- * @param[in] x23: 23, constant
- * @param[in] x25: 25, constant
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] w31: all-zero
- * @param[out] w26: result, 2^256-1 or 0
- *
- * clobbered registers: x2, x3, w23, w25, w26
- * clobbered flag groups: FG0
- */
-is_mont1:
-  /* Clear flags and initialize return value.
-       w26 <= 2^256 - 1
-       FG0.C <= 0 */
-  bn.sub   w26, w26, w26
-  bn.not   w26, w26
-
-  /* Compute whether (w + x) mod R is all-zero. */
-  addi     x2, x15, 0
-  addi     x3, x16, 0
-  loop     x30, 4
-    /* w23 <= x[i] */
-    bn.lid   x23, 0(x2++)
-    /* w25 <= w[i] */
-    bn.lid   x25, 0(x3++)
-    /* w25 <= (x + w)[i]
-       FG0.C <= (x[i] + w[i] + FG0.C) >? 2^256
-       FG0.Z <= (x + w)[i] =? 0 */
-    bn.addc  w25, w23, w25
-    /* w26 <= FG0.Z ? w26 : w31 */
-    bn.sel   w26, w26, w31, FG0.Z
-
-  /* Now, the mask will be all 1s if (w + x) mod R == 0 and zero otherwise. */
-  ret
-
-/**
- * Determine if a number represents (-1) in Montgomery form.
- *
- * Returns 2^256 - 1 if (x == (-R) mod w), otherwise 0
- *
- * This routine requires that R/2 < w < R and that R = 2^(n*256). We check if
- * x represents -1 by negating the number mod w in-place, checking if it is 1,
- * and then negating back. Because of the method used for negation, this
- * routine requires that x is fully reduced (x < w).
- *
- * TODO (optimization): precompute (2w - R), which is the only possible value
- * equivalent to (-R mod w) in the RSA context because of the minimum value of
- * prime candidates (sqrt(2) * (R / 2)). Then we could simply compare directly
- * here, and also avoid the need for full modular reduction in the main loop.
- * However, it would require DMEM space and make the implementation subtly more
- * specialized and sensitive to the range of w (for some w, 3w - R could also
- * be equivalent to w - 1).
- *
- * WARNING: this routine clobbers its input in DMEM (dmem[dptr_x..dptr_x+n*32]).
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] x15: dptr_x, pointer to input buffer x in dmem
- * @param[in] x16: dptr_m, pointer to modulus m in dmem
- * @param[in] x23: 23, constant
- * @param[in] x25: 25, constant
- * @param[in] x30: n, number of limbs for all bignums (wlen / 256; n <= 16)
- * @param[in] w31: all-zero
- * @param[out] w26: result, 2^256-1 or 0
- *
- * clobbered registers: x2, x3, w23, w25, w26
- * clobbered flag groups: FG0
- */
-is_mont_minus1:
-  /* Clear flags. */
-  bn.sub   w31, w31, w31
-
-  /* Negate the input in-place.
-       dmem[dptr_x:dptr_x+n*32] <= w - dmem[dptr_x:dptr_x+n*32] */
-  addi     x2, x15, 0
-  addi     x3, x16, 0
-  loop     x30, 4
-    /* w23 <= x[i] */
-    bn.lid   x23, 0(x2)
-    /* w25 <= w[i] */
-    bn.lid   x25, 0(x3++)
-    /* w23 <= w[i] - out[i] - FG0.C */
-    bn.subb  w23, w25, w23
-    /* out[i] <= w23 */
-    bn.sid   x23, 0(x2++)
-
-  /* Check if the input is 1.
-       w26 <= all 1s if dmem[dptr_x:dptr_x+n*32] == (-R) mod w, otherwise 0 */
-  jal      x1, is_mont1
-
-  ret
diff --git a/sw/otbn/crypto/rsa.s b/sw/otbn/crypto/rsa.s
deleted file mode 100644
index 13b410a5c8c22..0000000000000
--- a/sw/otbn/crypto/rsa.s
+++ /dev/null
@@ -1,144 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-.section .text.start
-.globl start
-start:
-  /* Init all-zero register. */
-  bn.xor  w31, w31, w31
-
-  /* Load number of limbs. */
-  la    x2, n_limbs
-  lw    x30, 0(x2)
-
-  /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0d
-  la    x18, RR
-
-  /* Read mode, then tail-call either rsa_encrypt or rsa_decrypt */
-  la    x2, mode
-  lw    x2, 0(x2)
-
-  li    x3, 1
-  beq   x2, x3, rsa_encrypt
-
-  li    x3, 2
-  beq   x2, x3, rsa_decrypt
-
-  /* Mode is neither 1 (= encrypt) nor 2 (= decrypt). Fail. */
-  unimp
-
-.text
-
-/**
- * RSA encryption
- */
-rsa_encrypt:
-  /* Compute Montgomery constants. */
-  jal      x1, modload
-
-  /* Run exponentiation.
-       dmem[work_buf] = dmem[inout]^65537 mod dmem[modulus] */
-  la       x14, inout
-  la       x2, work_buf
-  jal      x1, modexp_65537
-
-  /* dmem[inout] <= dmem[work_buf] */
-  jal      x1, cp_work_buf
-  ecall
-
-/**
- * RSA decryption
- */
-rsa_decrypt:
-  /* Compute Montgomery constants. */
-  jal      x1, modload
-
-  /* Run exponentiation.
-       dmem[work_buf] = dmem[inout]^dmem[exp] mod dmem[modulus] */
-  la       x14, inout
-  la       x15, exp
-  la       x2, work_buf
-  jal      x1, modexp
-
-  /* dmem[inout] <= dmem[work_buf] */
-  jal      x1, cp_work_buf
-  ecall
-
-/**
- * Zero the contents of work_buf
- *
- * clobbered registers: x3, w0
- */
-zero_work_buf:
-  la     x3, work_buf
-  bn.xor w0, w0, w0
-  /* The buffer is 512 bytes long, which needs sixteen 256b words. */
-  loopi 16, 1
-    bn.sid x0, 0(x3++)
-  ret
-
-/**
- * Copy the contents of work_buf onto inout
- *
- * clobbered registers: x2, x3, x4, w0
- */
-cp_work_buf:
-  la    x2, n_limbs
-  lw    x30, 0(x2)
-  la    x3, work_buf
-  la    x4, inout
-  loop  x30, 2
-    bn.lid x0, 0(x3++)
-    bn.sid x0, 0(x4++)
-  ret
-
-.bss
-
-/* Mode (1 = encrypt; 2 = decrypt) */
-.globl mode
-mode:
-  .word 0x00000000
-
-/* N: Key/modulus size in 256b limbs (i.e. for RSA-1024: N = 4) */
-.globl n_limbs
-n_limbs:
-  .word 0x00000000
-
-/* Modulus (n) */
-.balign 32
-.globl modulus
-modulus:
-  .zero 512
-
-/* private exponent (d) */
-.balign 32
-.globl exp
-exp:
-  .zero 512
-
-/* input/output data */
-.balign 32
-.globl inout
-inout:
-  .zero 512
-
-/* Montgomery constant m0'. Filled by `modload`. */
-.balign 32
-m0d:
-  /* could go in scratchpad if there was space */
-  .zero 32
-
-.section .scratchpad
-
-/* Montgomery constant RR. Filled by `modload`. */
-.balign 32
-RR:
-  .zero 512
-
-/* working data */
-.balign 32
-work_buf:
-  .zero 512
diff --git a/sw/otbn/crypto/rsa_key_from_cofactor.s b/sw/otbn/crypto/rsa_key_from_cofactor.s
new file mode 100644
index 0000000000000..bcc8b6520f627
--- /dev/null
+++ b/sw/otbn/crypto/rsa_key_from_cofactor.s
@@ -0,0 +1,155 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/* Public interface. */
+.globl rsa_key_from_cofactor
+
+/**
+ * Construct an RSA key pair from a modulus and cofactor.
+ *
+ * This routine does not check the validity of the RSA key pair; it does not
+ * ensure that the factors are prime or check any other properties, simply
+ * divides the modulus by the cofactor and derives the private exponent. The
+ * only public exponent supported is e=65537.
+ *
+ * This routine will recompute the public modulus n after deriving the factors;
+ * the caller may want to check that the value matches. If the modulus is not
+ * in fact divisible by the cofactor, or the cofactor is much too small, it
+ * will not match.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  x30: n, number of 256-bit limbs for p and q
+ * @param[in]  w31: all-zero
+ * @param[in] dmem[rsa_n..rsa_n+(n*2*32)] RSA public key modulus (n)
+ * @param[in] dmem[rsa_cofactor..rsa_cofactor+(n*32)] Cofactor (p or q)
+ * @param[out] dmem[rsa_n..rsa_n+(n*2*32)] Recomputed public key modulus (n)
+ * @param[out] dmem[rsa_d..rsa_d+(n*2*32)] RSA private exponent (d)
+ *
+ * clobbered registers: x2 to x8, x10 to x15, x20 to x26, x31, w3, w20 to w28
+ * clobbered flag groups: FG0, FG1
+ */
+rsa_key_from_cofactor:
+  /* Initialize wide-register pointers.
+       x20 <= 20
+       x21 <= 21 */
+  li       x20, 20
+  li       x21, 21
+
+  /* Get a pointer to the middle of the cofactor.
+       x2 <= rsa_cofactor + n*32 */
+  slli     x2, x30, 5
+  la       x3, rsa_cofactor
+  add      x2, x2, x3
+
+  # Set the second half of the cofactor buffer to zero, so the cofactor is the
+  #    same size as the modulus for division.
+  #     dmem[rsa_cofactor+n*32..rsa_cofactor+n*2*32] <= 0
+  li       x3, 31
+  loop     x30, 1
+    bn.sid   x3, 0(x2++)
+
+  /* Update the number of limbs for division.
+       x30 <= n*2 */
+  add     x30, x30, x30
+
+  /* Compute (n / cofactor) and store the result in `rsa_pq`. The quotient will
+     only occupy the first half (`rsa_p`) if the input is valid.
+       dmem[rsa_n..rsa_n+n*2*32] <= n % cofactor
+       dmem[rsa_pq..rsa_pq+n*2*32] <= n / cofactor */
+  la       x10, rsa_n
+  la       x11, rsa_cofactor
+  la       x12, rsa_pq
+  jal      x1, div
+
+  /* Reset the limb count.
+       x30 <= (n*2) >> 1 = n */
+  srli     x30, x30, 1
+
+  /* Copy the original cofactor into `rsa_q` and compute
+     the private exponent.
+      dmem[rsa_q..rsa_q+n*32] <= dmem[rsa_cofactor..rsa_cofactor+n*32] */
+  la       x11, rsa_cofactor
+  la       x2, rsa_q
+  li       x3, 3
+  loop     x30, 2
+    bn.lid   x3, 0(x11++)
+    bn.sid   x3, 0(x2++)
+
+  /* Multiply p and q to get the public modulus n.
+       dmem[rsa_n..rsa_n+(n*2*32)] <= p * q */
+  la       x10, rsa_p
+  la       x11, rsa_q
+  la       x12, rsa_n
+  addi     x31, x30, 0
+  jal      x1, bignum_mul
+
+  # Derive the private exponent d from p and q (tail-call).
+  jal      x0, derive_d
+
+/**
+ * Derive the private RSA exponent d.
+ *
+ * Returns d = (65537^-1) mod LCM(p-1, q-1).
+ *
+ * This function overwrites p and q, and requires that they are continuous in
+ * memory. Specifically, it expects to be able to use 512 bytes of space
+ * following the label `rsa_pq`.
+ *
+ * Important: This routine uses `rsa_cofactor` as a second 512-byte work buffer
+ * and clobbers the contents.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in] dmem[rsa_p..rsa_p+(n*32)]: first prime p
+ * @param[in] dmem[rsa_q..rsa_q+(n*32)]: second prime q
+ * @param[in]  x20: 20, constant
+ * @param[in]  x21: 21, constant
+ * @param[in]  x30: n, number of 256-bit limbs for p and q
+ * @param[in]  w31: all-zero
+ * @param[out] dmem[rsa_d..rsa_d+(n*2*32)]: result, private exponent d
+ *
+ * clobbered registers: x2 to x8, x10 to x15, x20 to x26, x31, w20 to w28
+ * clobbered flag groups: FG0, FG1
+ */
+derive_d:
+  /* Load pointers to p, q, and the result buffer. */
+  la       x10, rsa_p
+  la       x11, rsa_q
+
+  # Subtract 1 from p in-place (no carry from lowest limb since p is odd).
+  #      dmem[rsa_p..rsa_p+(n*32)] <= p - 1
+  bn.lid   x20, 0(x10)
+  bn.subi  w20, w20, 1
+  bn.sid   x20, 0(x10)
+
+  /* Subtract 1 from q in-place (no carry from lowest limb since p is odd).
+       dmem[rsa_q..rsa_q+(n*32)] <= q - 1 */
+  bn.lid   x20, 0(x11)
+  bn.subi  w20, w20, 1
+  bn.sid   x20, 0(x11)
+
+  /* Compute the LCM of (p-1) and (q-1) and store in the scratchpad.
+       dmem[tmp_scratchpad] <= LCM(p-1,q-1) */
+  la       x12, tmp_scratchpad
+  jal      x1, lcm
+
+  /* Update the number of limbs for modinv.
+       x30 <= n*2 */
+  add      x30, x30, x30
+
+  /* Compute d = (65537^-1) mod LCM(p-1,q-1). The modular inverse
+     routine requires two working buffers, which we construct from
+     `rsa_cofactor` and the required-contiguous `rsa_p` and `rsa_q` buffers.
+       dmem[rsa_d..rsa_d+(n*2*32)] <= (65537^-1) mod dmem[x12..x12+(n*2*32)] */
+  la       x12, tmp_scratchpad
+  la       x13, rsa_d0
+  la       x14, rsa_cofactor
+  la       x15, rsa_pq
+  jal      x1, modinv_f4
+
+  # Reset the limb count.
+  #      x30 <= (n*2) >> 1 = n
+  srli     x30, x30, 1
+  ret
diff --git a/sw/otbn/crypto/rsa_keygen.s b/sw/otbn/crypto/rsa_keygen.s
index 8e34a40ba7a9f..dbfd5f9113d90 100644
--- a/sw/otbn/crypto/rsa_keygen.s
+++ b/sw/otbn/crypto/rsa_keygen.s
@@ -2,1408 +2,900 @@
 /* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
 /* SPDX-License-Identifier: Apache-2.0 */
 
-/* Public interface. */
+# RSA public and private key generation. The routines in this file are
+# structured around `modexp` an make use of pre-defined memory location in
+# `run_rsa_mem`.
+
+# RSA key generation is a notoriously slow algorithm due to the probabilistic
+# nature of deriving the secret primes that compose the public modulus. By the
+# prime number theorem, we know that the distribution of primes approaches
+# 1/n for large n-bit numbers, i.e., a random, odd n-bit number (as is generated
+# by `gen_prime_candidate`) is prime with probability 2/n, thus on average n/2
+# repetitions are necessary until a prime is picked. One half of the composite
+# candidates are rejected by the Fermat test while the other half will be
+# rejected with high probability by subsequent Miller-Rabin test. This means
+# that with probability 1/2 only one exponentiation will be executed and with
+# probability 1/2 there will be 2 exponentiations (assuming that the first
+# Miller-Rabin exponentiation will reject the composite number), hence on
+# average 1.5 exponentiations are executed for each composite number.
+# For example, for RSA-2048 the generation of a single 1024-bit prime number
+# will result in on average several hundred exponentiations
+# (~ 1.5 * (n=1024)/2) with high probability.
+#
+# Note that a popular way of reducing the number of exponentiations during the
+# prime generation consists in performing trial divisions with small prime
+# numbers, which efficiently filters out a significant amount of composite
+# candidiates before the first exponentiation. It is however not clear how such
+# trial division can be implemented without causing leakage on the individual
+# bits of the candidate prime.
+#
+# A running time experiment for a device with a clock frequency of 100 MHz:
+#
+# 1024-bit exponentiation: 2'770'580 cycles -> ~0.028s
+# RSA-2048 key generation: 10-60s (extrapolated from a CW340 at 24MHz).
+
+.text
 .globl rsa_keygen
-.globl rsa_key_from_cofactor
+.globl gen_d
 
-/* Exposed for testing purposes only. */
-.globl relprime_f4
-.globl check_p
-.globl check_q
-.globl modinv_f4
+# Exposed for testing only.
+.globl relprime_f4_test
+.globl distance_test
 
 /**
- * Generate a random RSA key pair.
+ * Compute the RSA public key (n, e=F4) and secret key (n, d).
  *
- * The public key is the pair (n, e), where n is the modulus and e is the
- * public exponent. and the private key is the pair (n, d), where n is the same
- * modulus as in the public key and d is the private exponent.
+ * This implementation of the RSA keygen is compliant with FIPS 186-5.
  *
- * For the official specification, see FIPS 186-5 section A.1.3. For the
- * purposes of this implementation, the RSA public exponent e is always 65537
- * (aka the Fermat number "F4", 2^16 + 1).
- *
- * This implementation supports only RSA-2048, RSA-3072, and RSA-4096. Do not
- * use with other RSA sizes; in particular, using this implementation for
- * RSA-1024 would require more primality test rounds.
- *
- * This implementation also takes some inspiration from BoringSSL's RSA key
- * generation:
- * https://boringssl.googlesource.com/boringssl/+/dcabfe2d8940529a69e007660fa7bf6c15954ecc/crypto/fipsmodule/rsa/rsa_impl.c#1162
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  x30: plen, number of 256-bit limbs for p and q
- * @param[in]  w31: all-zero
- * @param[out] dmem[rsa_n..rsa_n+(plen*2*32)] RSA public key modulus (n)
- * @param[out] dmem[rsa_d..rsa_d+(plen*2*32)] RSA private exponent (d)
- *
- * clobbered registers: x2 to x26, x31,
- *                      w2, w3, w4..w[4+(plen-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
+ * @param[in] x30: n, number of limbs in the modulus and key.
+ * @param[out] dmem[rsa_n]: rsa_n, modulus
+ * @param[out] dmem[rsa_d0]: rsa_d0, first share of secret exponent
+ * @param[out] dmem[rsa_d1]: rsa_d1, second share of secret exponent
  */
 rsa_keygen:
-  /* Compute (<# of limbs> - 1), a helpful constant for later computations.
-       x31 <= x30 - 1 */
-  addi     x2, x0, 1
-  sub      x31, x30, x2
-
-  /* Initialize wide-register pointers.
-       x20 <= 20
-       x21 <= 21 */
-  li       x20, 20
-  li       x21, 21
-
-  /* Generate the first prime, p.
-       dmem[rsa_p..rsa_p+(plen*32)] <= p */
-  jal      x1, generate_p
-  /* Generate the second prime, q.
-       dmem[rsa_q..rsa_q+(plen*32)] <= q */
-  jal      x1, generate_q
-
-  /* Multiply p and q to get the public modulus n.
-       dmem[rsa_n..rsa_n+(plen*2*32)] <= p * q */
-  la       x10, rsa_p
-  la       x11, rsa_q
-  la       x12, rsa_n
-  jal      x1, bignum_mul
-
-  /* Derive the private exponent d from p and q.
-       x2 <= zero if d is OK, otherwise nonzero */
-  jal      x1, derive_d
-
-  /* Check that d is large enough (tail-call). If d is not large enough,
-     then `check_d` will restart the key-generation process. */
-  jal      x0, check_d
+  # Temporarily store the limb count in DMEM.
+  la x16, buf7
+  sw x30, 0(x16)
+
+  # Generate the RSA primes.
+  # dmem[rsa_p] <= p.
+  # dmem[rsa_q] <= q.
+  srl x30, x30, 1
+  jal x1, gen_p
+  jal x1, gen_q
+
+  # Generate the 512-bit auxiliary primes.
+  # dmem[rsa_g] <= g.
+  # dmem[rsa_h] <= h.
+  li x30, 2
+  la x16, rsa_g
+  jal x1, gen_prime
+  la x16, rsa_h
+  jal x1, gen_prime
+
+  # Restore limb count.
+  la x16, buf7
+  lw x30, 0(x16)
+
+  jal x1, gen_d
 
-/**
- * Derive the private RSA exponent d.
- *
- * Returns d = (65537^-1) mod LCM(p-1, q-1).
- *
- * This function overwrites p and q, and requires that they are continuous in
- * memory. Specifically, it expects to be able to use 512 bytes of space
- * following the label `rsa_pq`.
- *
- * Important: This routine uses `rsa_cofactor` as a second 512-byte work buffer
- * and clobbers the contents.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] dmem[rsa_p..rsa_p+(plen*32)]: first prime p
- * @param[in] dmem[rsa_q..rsa_q+(plen*32)]: second prime q
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: plen, number of 256-bit limbs for p and q
- * @param[in]  w31: all-zero
- * @param[out] dmem[rsa_d..rsa_d+(plen*2*32)]: result, private exponent d
- *
- * clobbered registers: x2 to x8, x10 to x15, x20 to x26, x31, w20 to w28
- * clobbered flag groups: FG0, FG1
- */
-derive_d:
-  /* Load pointers to p, q, and the result buffer. */
-  la       x10, rsa_p
-  la       x11, rsa_q
-
-  /* Subtract 1 from p in-place (no carry from lowest limb since p is odd).
-       dmem[rsa_p..rsa_p+(plen*32)] <= p - 1 */
-  bn.lid   x20, 0(x10)
-  bn.subi  w20, w20, 1
-  bn.sid   x20, 0(x10)
-
-  /* Subtract 1 from q in-place (no carry from lowest limb since p is odd).
-       dmem[rsa_q..rsa_q+(plen*32)] <= q - 1 */
-  bn.lid   x20, 0(x11)
-  bn.subi  w20, w20, 1
-  bn.sid   x20, 0(x11)
-
-  /* Compute the LCM of (p-1) and (q-1) and store in the scratchpad.
-       dmem[tmp_scratchpad] <= LCM(p-1,q-1) */
-  la       x12, tmp_scratchpad
-  jal      x1, lcm
-
-  /* Update the number of limbs for modinv.
-       x30 <= plen*2 */
-  add      x30, x30, x30
-
-  /* Compute d = (65537^-1) mod LCM(p-1,q-1). The modular inverse
-     routine requires two working buffers, which we construct from
-     `rsa_cofactor` and the required-contiguous `rsa_p` and `rsa_q` buffers.
-       dmem[rsa_d..rsa_d+(plen*2*32)] <= (65537^-1) mod dmem[x12..x12+(n*2*32)] */
-  la       x12, tmp_scratchpad
-  la       x13, rsa_d
-  la       x14, rsa_cofactor
-  la       x15, rsa_pq
-  jal      x1, modinv_f4
-
-  /* Reset the limb count.
-       x30 <= (plen*2) >> 1 = n */
-  srli     x30, x30, 1
   ret
 
 /**
- * Check the private RSA exponent d.
- *
- * Calls `rsa_keygen` if d is too small, otherwise returns. Designed to be
- * tail-called by `rsa_keygen`.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  x20: 20, constant
- * @param[in]  x30: plen, number of 256-bit limbs for p and q
- * @param[in]  w31: all-zero
- * @param[out] dmem[rsa_d..rsa_d+(plen*2*32)]: result, private exponent d
- *
- * clobbered registers: x2, x3, w20, w23
- * clobbered flag groups: FG0, FG1
+ * Generate the secret key d and the public modulus n.
+ *
+ * This routine computes d = e^-1 mod LCM(p - 1, q - 1) where the modulus is
+ * given by LCM(p - 1, q - 1) = (p - 1) * (q - 1) / gcd(p - 1, q - 1).
+ *
+ * @param[in] dmem[rsa_p]: RSA prime p
+ * @param[in] dmem[rsa_q]: RSA prime q
+ * @param[in] dmem[rsa_g]: g, auxiliary 512-bit prime
+ * @param[in] dmem[rsa_h]: h, auxiliary 512-bit prime
+ * @param[in] x30: n, number of 256-bits limbs in key and modulus
+ * @param[in] w31: all-zero
+ * @param[out] dmem[rsa_d0..rsa_d0+(n*32)]: d0, first share of d
+ * @param[out] dmem[rsa_d1..rsa_d1+(n*32)]: d1, second share of d
+ * @param[out] dmem[rsa_n..rsa_n+(n*32)]: n, public modulus
  */
-check_d:
-  /* Get a pointer to the second half of d.
-       x3 <= rsa_d + plen*32 */
-  slli     x2, x30, 5
-  la       x3, rsa_d
-  add      x3, x3, x2
-
-  /* Check that d > 2^(plen*256), i.e. that the highest plen limbs are nonzero. We
-     need to retry if it's too small (see FIPS 186-5 section A.1.1), although
-     in practice this is unlikely. We do this by ORing the plen highest limbs.
-       FG0.Z <= (d >> (plen*256)) == 0 */
+gen_d:
+  # Save the limb count.
+  addi x27, x30, 0
+
+  # Calculate the n-limbed modulus n.
+  # dmem[n] = p * q
+  la   x10, rsa_p
+  la   x11, rsa_q
+  la   x12, rsa_n
+  srli x30, x30, 1
+  addi x31, x30, 0
+  jal  x1, bignum_mul
+
+  li x8, 2
+
+  # dmem[rsa_p] <= p - 1.
+  bn.lid  x8, 0(x10)
+  bn.subi w2, w2, 1
+  bn.sid  x8, 0(x10)
+
+  # dmem[rsa_p] <= q - 1.
+  bn.lid  x8, 0(x11)
+  bn.subi w2, w2, 1
+  bn.sid  x8, 0(x11)
+
+  # dmem[r0] <=  (p - 1) * (q - 1).
+  la   x10, rsa_p
+  la   x11, rsa_q
+  la   x12, r0
+  addi x31, x30, 0
+  jal  x1, bignum_mul
+
+  # dmem[rsa_g] <= (p - 1) * g
+  la x10, rsa_p
+  la x11, rsa_g
+  la x12, RR
+  li x31, 2
+  jal x1, bignum_mul
+
+  # dmem[rsa_h] <= (q - 1) * h
+  la  x10, rsa_q
+  la  x11, rsa_h
+  la  x12, work_buf
+  li  x31, 2
+  jal x1, bignum_mul
+
+  # Compute gcd(g * (p - 1), h * (q - 1)).
+  # dmem[RR] <= 0.
+  # dmem[work_buf] <= gcd(g * (p - 1), h * (q - 1)).
+  la   x10, RR
+  la   x11, work_buf
+  addi x30, x30, 2
+  jal  x1, gcd
+
+  # Check that gcd(g * (p - 1), h * (q - 1)) = gcd(p - 1, q - 1) by verifying
+  # that 0 < gcd(g * (p - 1), h * (q - 1)) < 2^256. The probability that this
+  # check fails is very low, if it does simply restart the entire key
+  # generation.
+  li x8, 2
+  li x9, 3
+
+  # Check that gcd(g * (p - 1), h * (q - 1)) > 0.
+  la     x10, work_buf
+  bn.lid x8, 0(x10++)
+  bn.cmp w2, w31
+  csrrs  x2, FG0, x0
+  andi   x2, x2, 8
+  xori   x2, x2, 8
+
+  # Check that gcd(g * (p - 1), h * (q - 1)) < 2^256.
+  addi x31, x30, -1
+  loop x31, 5
+    bn.lid x8, 0(x10++)
+    bn.cmp w2, w31
+    csrrs  x3, FG0, x0
+    andi   x3, x3, 8
+    and    x2, x2, x3
+
+  addi x30, x27, 0
+  beq  x2, x0, rsa_keygen
+
+  # For the division (p - 1)*(q - 1)/gcd(p - 1 , q - 1), the denominator
+  # gcd(p - 1, q - 1) needs to be inverted modulo 2^256 which requires the
+  # removal of even factors in both nominator and denominator.
+  # This is not constant-time, however only non-secret values are involved.
+_remove_even_factors:
+
+  # Extract the LSB of gcd(p - 1, q - 1).
+  # x2 <= gcd(p - 1, q - 1) & 1.
+  la   x10, work_buf # (p - 1) * (q - 1)
+  la   x11, r0       # gcd(p - 1, q - 1)
+  lw   x2, 0(x10)
+  andi x2, x2, 1
+  # If it the LSB is 1, we are done since the gcd(p - 1, q - 1) is odd.
+  bne x2, x0, _remove_even_factors_end
+
+  # The MSB is zero, shift the denominator by one position to right.
+  # dmem[work_buf] <= gcd(p - 1, q - 1) >> 1.
+  bn.lid  x8, 0(x10)
+  bn.rshi w2, w31, w2 >> 1
+  bn.sid  x8, 0(x10)
+
+  # Shift the numerator by one position to the right.
+  # dmem[work_buf] <= (p - 1) * (q - 1) >> 1.
+  addi x31, x30, -1
+  addi x12, x11, 32
+  loop x31, 4
+    bn.lid  x8, 0(x11)
+    bn.lid  x9, 0(x12++)
+    bn.rshi w2, w3, w2 >> 1
+    bn.sid  x8, 0(x11++)
+
+  bn.lid  x8, 0(x11)
+  bn.rshi w2, w31, w2 >> 1
+  bn.sid  x8, 0(x11)
+
+  # Start from the top to check the next MSB of gcd(p - 1, q - 1).
+  beq x0, x0, _remove_even_factors
+
+_remove_even_factors_end:
+
+  # Calculate gcd(p - 1, q - 1)^-1 mod 2^256.
+  # w21 <= gcd(p - 1, q - 1)^-1 mod 2^256.
+  li x8, 20
+  la x10, work_buf
+  bn.lid x8, 0(x10)
+  jal x1, nr_inv
+
+  # Calculate LCM(p - 1, q - 1) = (p - 1) * (q - 1) / gcd(p - 1, q - 1).
+  # dmem[r0] <= LCM(p - 1, q - 1).
+  la x16, r0
+  jal x1, nr_div
+
+  # Calculate the secret key d = e^-1 mod LCM(p - 1, q - 1).
+  # dmem[d0] <= d.
+  la x12, r0
+  la x13, rsa_d0
+  la x14, r1
+  la x15, r2
+  li x20, 20
+  li x21, 21
+  jal x1, modinv_f4
+
+  # The secret exponent d must not be too small. Make sure that it respects
+  # d > 2^(32*n/2), i.e., the upper half of words must be non-zero (see FIPS
+  # 186-5 Section A.1.1). The probability that d comes out as too small is
+  # exceedingly low.
+
+  # Get a pointer to the second half of d.
+  # x3 <= rsa_d0 + 16*n
+  slli x2, x30, 4
+  la   x3, rsa_d0
+  add  x3, x3, x2
+
+  # Check the upper half of words.
+  # FG0.Z <= (d >> (n/2*256)) == 0
   bn.mov   w23, w31
-  loop     x30, 2
-    /* w20 <= d[n+i] */
-    bn.lid  x20, 0(x3++)
-    /* w23 <= w23 | w20 */
-    bn.or   w23, w23, w20
-
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
-
-  /* If x2 != 0, then d is too small and we need to restart key generation from
-     scratch. */
-  bne      x2, x0, rsa_keygen
+  srli     x31, x30, 1
+  loop     x31, 2
+   bn.lid  x20, 0(x3++)  # w20 <= d[n+i]
+   bn.or   w23, w23, w20 # w23 <= w23 | w20
+
+  # If x2 != 0, then d is too small and we need to restart key generation.
+  csrrs x2, FG0, x0
+  andi  x2, x2, 8
+  bne   x2, x0, rsa_keygen
+
+  # Boolean-mask d0 and d1.
+  la x12, rsa_d0
+  la x13, rsa_d1
+  li x8, 2
+  li x9, 3
+  loop x30, 6
+    bn.lid  x8, 0(x12)
+    bn.wsrr w3, URND
+    bn.xor  w2, w2, w3
+    bn.sid  x8, 0(x12++)
+    bn.xor  w31, w31, w31 # dummy instruction
+    bn.sid  x9, 0(x13++)
 
   ret
 
 /**
- * Construct an RSA key pair from a modulus and cofactor.
- *
- * This routine does not check the validity of the RSA key pair; it does not
- * ensure that the factors are prime or check any other properties, simply
- * divides the modulus by the cofactor and derives the private exponent. The
- * only public exponent supported is e=65537.
- *
- * This routine will recompute the public modulus n after deriving the factors;
- * the caller may want to check that the value matches. If the modulus is not
- * in fact divisible by the cofactor, or the cofactor is much too small, it
- * will not match.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  x30: plen, number of 256-bit limbs for p and q
- * @param[in]  w31: all-zero
- * @param[in] dmem[rsa_n..rsa_n+(plen*2*32)] RSA public key modulus (n)
- * @param[in] dmem[rsa_cofactor..rsa_cofactor+(plen*32)] Cofactor (p or q)
- * @param[out] dmem[rsa_n..rsa_n+(plen*2*32)] Recomputed public key modulus (n)
- * @param[out] dmem[rsa_d..rsa_d+(plen*2*32)] RSA private exponent (d)
- *
- * clobbered registers: x2 to x8, x10 to x15, x20 to x26, x31, w3, w20 to w28
- * clobbered flag groups: FG0, FG1
- */
-rsa_key_from_cofactor:
-  /* Initialize wide-register pointers.
-       x20 <= 20
-       x21 <= 21 */
-  li       x20, 20
-  li       x21, 21
-
-  /* Get a pointer to the end of the cofactor.
-       x2 <= rsa_cofactor + plen*32 */
-  slli     x2, x30, 5
-  la       x3, rsa_cofactor
-  add      x2, x2, x3
-
-  /* Set the second half of the cofactor buffer to zero, so the cofactor is the
-     same size as the modulus for division.
-      dmem[rsa_cofactor+plen*32..rsa_cofactor+plen*2*32] <= 0 */
-  li       x3, 31
-  loop     x30, 1
-    bn.sid   x3, 0(x2++)
-
-  /* Update the number of limbs for division.
-       x30 <= plen*2 */
-  add     x30, x30, x30
-
-  /* Compute (n / cofactor) and store the result in `rsa_pq`. The quotient will
-     only occupy the first half (`rsa_p`) if the input is valid.
-       dmem[rsa_n..rsa_n+plen*2*32] <= n % cofactor
-       dmem[rsa_pq..rsa_pq+plen*2*32] <= n / cofactor */
-  la       x10, rsa_n
-  la       x11, rsa_cofactor
-  la       x12, rsa_pq
-  jal      x1, div
-
-  /* Reset the limb count.
-       x30 <= (plen*2) >> 1 = n */
-  srli     x30, x30, 1
-
-  /* Copy the original cofactor into `rsa_q` and compute
-     the private exponent.
-      dmem[rsa_q..rsa_q+plen*32] <= dmem[rsa_cofactor..rsa_cofactor+plen*32] */
-  la       x11, rsa_cofactor
-  la       x2, rsa_q
-  li       x3, 3
-  loop     x30, 2
-    bn.lid   x3, 0(x11++)
-    bn.sid   x3, 0(x2++)
-
-  /* Multiply p and q to get the public modulus n.
-       dmem[rsa_n..rsa_n+(plen*2*32)] <= p * q */
-  la       x10, rsa_p
-  la       x11, rsa_q
-  la       x12, rsa_n
-  jal      x1, bignum_mul
-
-  /* Derive the private exponent d from p and q (tail-call). */
-  jal      x0, derive_d
-
-/**
- * Compute the inverse of 65537 modulo a given number.
- *
- * Returns d such that (d*65537) = 1 mod m and 0 <= d < m.
- *
- * Requires that m is nonzero, and that GCD(m, 65537) = 1.
- *
- * This is a specialized version of binary extended GCD, as described in HAC
- * Algorithm 14.61 and implemented in constant time in BoringSSL here:
- *   https://boringssl.googlesource.com/boringssl/+/dcabfe2d8940529a69e007660fa7bf6c15954ecc/crypto/fipsmodule/bn/gcd_extra.c#170
- *
- * BoringSSL's version includes a few improvements beyond being constant-time,
- * such as avoiding signed integers. This modified algorithm has also been
- * proven mathematically correct in Coq, see:
- *   https://github.com/mit-plv/fiat-crypto/pull/333
- *
- * In pseudocode,the BoringSSL algorithm is:
- *   A, B, C, D = 1, 0, 0, 1
- *   u = x
- *   v = y
- *   // Loop invariants:
- *   //   A*x - B*y = u
- *   //   D*y - C*x = v
- *   //   gcd(u, v) = gcd(x, y)
- *   //   bitlen(u) + bitlen(v) <= i
- *   //   0 < u <= x
- *   //   0 <= v <= y
- *   //   0 <= A, C < y
- *   //   0 <= B, D <= x
- *   for i=bitlen(x) + bitlen(y)..1:
- *     if u and v both odd:
- *       if v < u:
- *         u = u - v
- *         A = (A + C) mod y
- *         B = (B + D) mod x
- *       else:
- *         v = v - u
- *         C = (A + C) mod y
- *         D = (B + D) mod x
- *     // At this point, the invariant holds and >= 1 of u and v is even
- *     if u is even:
- *       u >>= 1
- *       if (A[0] | B[0]):
- *         A = (A + y) / 2
- *         B = (B + x) / 2
- *       else:
- *         A >>= 1
- *         B >>= 1
- *     if v is even:
- *       v >>= 1
- *       if (C[0] | D[0]):
- *         C = (C + x) / 2
- *         D = (D + y) / 2
- *       else:
- *         C >>= 1
- *         D >>= 1
- *    // End of loop. Guarantees the invariant plus u = gcd(x,y).
- *
- * As described in HAC note 14.64, this algorithm computes a modular inverse
- * when gcd(x,y) = 1. Specifically, at termination, A = x^-1 mod y because:
- *   (A*x) mod y = (A*x - B*y) mod y = u mod y = 1
+ * Generate n-limbed RSA prime p.
  *
- * Of course, all the if statements are implemented with constant-time selects.
+ * Probabilistic prime generation algorithm performing a Fermat test followed
+ * by a Miller-Rabin test in accordance with Section A.1.3 of FIPS 186-5 for
+ * the usage as the prime p in RSA where gcd(F4, p-1) = 1.
  *
- * The fully specialized and constant-time version of the pseudocode is:
- *   A, C = 1, 0
- *   u = 65537
- *   v = m
- *   // Loop invariants:
- *   //   A*x - B*y = u
- *   //   D*y - C*x = v
- *   //   gcd(u, v) = gcd(x, y)
- *   //   bitlen(u) + bitlen(v) <= i
- *   //   gcd(u, v) = 1
- *   //   bitlen(u) + bitlen(v) <= i
- *   //   0 < u <= 65537
- *   //   0 <= v <= m
- *   //   0 <= A, C < m
- *   //   0 <= B,D < 65537
- *   for i=(bitlen(m) + bitlen(65537))..1:
- *     both_odd = u[0] & v[0]
- *     v_lt_u = v < u
- *     u = u - ((both_odd && v_lt_u) ? v : 0)
- *     v = v - ((both_odd && !v_lt_u) ? u : 0)
- *     ac = (A + C) mod m
- *     A = (both_odd && v_lt_u) ? ac : A
- *     C = (both_odd && !v_lt_u) ? ac : C
- *     bd = (B + D) mod 65537
- *     B = (both_odd && v_lt_u) ? bd : B
- *     D = (both_odd && !v_lt_u) ? bd : D
- *     u_even = !u[0]
- *     a_or_b_odd = A[0] | B[0]
- *     u = u_even ? u >> 1 : u
- *     A = (u_even && a_or_b_odd) ? (A + m) : A
- *     A = u_even ? (A >> 1) : A
- *     B = (u_even && a_or_b_odd) ? (B + 65537) : B
- *     B = u_even ? (B >> 1) : B
- *     v_even = !v[0]
- *     c_or_d_odd = C[0] | D[0]
- *     v = v_even ? v >> 1 : v
- *     C = (v_even && c_or_d_odd) ? (C + m) : C
- *     C = v_even ? (C >> 1) : C
- *     D = (u_even && c_or_d_odd) ? (D + 65537) : D
- *     D = u_even ? (D >> 1) : D
- *   if u != 1:
- *     FAIL("Not invertible")
- *   return A
+ * This routine is constant-time relative to p if p is possibly prime.
  *
- * This routine runs in constant time.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  x12: dptr_m, pointer to modulus m in DMEM (n limbs)
- * @param[in]  x13: dptr_A, pointer to result buffer in DMEM (n limbs)
- * @param[in]  x14: dptr_C, pointer to a temporary buffer in DMEM (n limbs)
- * @param[in]  x15: dptr_v, pointer to a temporary buffer in DMEM (n limbs)
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: nlen, number of 256-bit limbs for modulus m and result d
+ * @param[in]  x30: n, number of 256-bit limbs in the candidate prime
  * @param[in]  w31: all-zero
- * @param[out] dmem[dptr_A..dptr_A+(plen*32)]: result, modular inverse d
+ * @param[out] dmem[rsa_p..rsa_p+(n*32)]: result, probable RSA prime p.
  *
- * clobbered registers: MOD, x2 to x4, x31, w20 to w28
- * clobbered flag groups: FG0, FG1
+ * Clobbered registers: x2 to x27, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
  */
-modinv_f4:
-  /* Zero the intermediate buffers.
-       dmem[dptr_A..dptr_A+(nlen*32)] <= 0
-       dmem[dptr_C..dptr_C+(nlen*32)] <= 0 */
-  li       x2, 31
-  addi     x3, x13, 0
-  addi     x4, x14, 0
-  loop     x30, 2
-    bn.sid   x2, 0(x3++)
-    bn.sid   x2, 0(x4++)
-
-  /* Set the lowest limb of A to 1.
-       dmem[dptr_A] <= 1 */
-  bn.addi  w20, w31, 1
-  bn.sid   x20, 0(x13)
-
-  /* Initialize B to 0.
-       w27 <= 0 */
-  bn.mov   w27, w31
-
-  /* Initialize D to 1.
-       w28 <= 1 */
-  bn.addi  w28, w31, 1
-
-  /* Copy the modulus to the buffer for v.
-       dmem[dptr_v..dptr_v+(nlen*32)] <= m */
-  addi     x3, x12, 0
-  addi     x4, x15, 0
-  loop     x30, 2
-    bn.lid   x20, 0(x3++)
-    bn.sid   x20, 0(x4++)
-
-  /* Initialize u = F4.
-       w22 <= (1 << 16) + 1 = 65537 */
-  bn.addi  w23, w31, 1
-  bn.add   w22, w23, w23 << 16
-
-  /* MOD <= 65537 */
-  bn.wsrw  MOD, w22
-
-  /* Calculate number of loop iterations = bitlen(m) + bitlen(65537).
-       x31 <= (x30 << 8) + 17 = 256*n + 17 */
-  slli     x31, x30, 8
-  addi     x31, x31, 17
-
-  /* Main loop. */
-  loop     x31, 120
-    /* Load the least significant limb of v.
-         w20 <= dmem[dptr_v] = v[255:0] */
-    bn.lid   x20, 0(x15)
-
-    /* Construct a flag that is 1 if both u and v are odd.
-         FG1.L <= (w22 & w20)[0] = u[0] && v[0] */
-    bn.and   w20, w22, w20, FG1
-
-    /* Compare u and v.
-         FG0.C <= v < u */
-    bn.mov   w23, w22
-    addi     x2, x15, 0
-    loop     x30, 3
-      /* w20 <= v[i] */
-      bn.lid   x20, 0(x2++)
-      /* FG0.C <= v[i] <? w23 + FG0.C */
-      bn.cmpb  w20, w23
-      /* Higher limbs of u are all zero; set w23 = 0 for next round. */
-      bn.mov   w23, w31
-
-    /* Capture FG0.C in a mask.
-         w23 <= FG0.C ? 2^256 - 1 : 0 */
-    bn.subb  w23, w31, w31
-
-    /* Select a mask that is all 1s if we should subtract v from u.
-         w24 <= FG1.L ? w23 : w31 = (u[0] && v[0] && v < u) ? 2^256 - 1 : 0 */
-    bn.sel   w24, w23, w31, FG1.L
-
-    /* Select a mask that is all 1s if we should subtract u from v.
-         w25 <= FG1.L ? !w23 : w31 = (u[0] && v[0] && u <= v) ? 2^256 - 1 : 0 */
-    bn.not   w23, w23
-    bn.sel   w25, w23, w31, FG1.L
-
-    /* Conditionally subtract v from u. If we do this subtraction, we know that
-       v < u <= 65537, so we can use only one limb of v.
-         w22 <= w22 - (dmem[dptr_v] & w24) */
-    bn.lid   x20, 0(x15)
-    bn.and   w20, w20, w24
-    bn.sub   w22, w22, w20
-
-    /* Conditionally subtract u from v.
-         dmem[dptr_v..dptr_v+(nlen*32)] <= v - (u & w25) */
-    bn.and   w23, w22, w25
-    addi     x2, x15, 0
-    loop     x30, 4
-      /* w20 <= v[i] */
-      bn.lid   x20, 0(x2)
-      /* w20, FG0.C <= v[i] - w23 - FG0.C */
-      bn.subb  w20, w20, w23
-      /* v[i] <= w20 */
-      bn.sid   x20, 0(x2++)
-      /* Higher limbs of u are all zero; set w23 = 0 for next round. */
-      bn.mov   w23, w31
-
-    /* Calculate what we should add to B; D if we updated u in the previous
-       steps (w24 == 2^256=1), otherwise 0.
-         w20 <= (D & w24) */
-    bn.and   w20, w28, w24
-
-    /* Calculate what we should add to D; B if we updated v in the previous
-       steps (w25 == 2^256=1), otherwise 0.
-         w21 <= (B & w25) */
-    bn.and   w21, w27, w25
-
-    /* Update B.
-         w27 <= (B + (D & w24)) mod 65537 */
-    bn.addm  w27, w27, w20
-
-    /* Update D.
-         w27 <= (D + (B & w25)) mod 65537 */
-    bn.addm  w28, w28, w21
-
-    /* Clear flags for both groups. */
-    bn.sub   w31, w31, w31, FG0
-    bn.sub   w31, w31, w31, FG1
-
-    /* Compare (A + C) to m.
-         FG1.C <= A + C < m */
-    addi     x2, x12, 0
-    addi     x3, x13, 0
-    addi     x4, x14, 0
-    loop     x30, 5
-      /* w20 <= A[i] */
-      bn.lid   x20, 0(x3++)
-      /* w21 <= C[i] */
-      bn.lid   x21, 0(x4++)
-      /* w23, FG0.C <= A[i] + C[i] + FG0.C */
-      bn.addc  w23, w20, w21
-      /* w20 <= m[i] */
-      bn.lid   x20, 0(x2++)
-      /* FG1.C <= w23 <? m[i] + FG1.C */
-      bn.cmpb  w23, w20, FG1
-
-    /* Capture FG1.C as a mask that is all 1s if we should subtract the modulus.
-         w26 <= FG1.C ? 0 : 2^256 - 1 */
-    bn.subb  w26, w31, w31, FG1
-    bn.not   w26, w26
-
-    /* Clear flags for both groups. */
-    bn.sub   w31, w31, w31, FG0
-    bn.sub   w31, w31, w31, FG1
-
-    /* Update A if we updated u in the previous steps (w24 == 2^256-1). We
-       additionally subtract the modulus if *both* w24,w26 == 2^256-1.
-         dmem[dptr_A..dptr_A+(nlen*32)] <= (w24 == 2^256-1) ? (A + C) mod m : A */
-    addi     x2, x12, 0
-    addi     x3, x13, 0
-    addi     x4, x14, 0
-    loop     x30, 9
-      /* w20 <= A[i] */
-      bn.lid   x20, 0(x3)
-      /* w21 <= C[i] */
-      bn.lid   x21, 0(x4++)
-      /* w21 <= C[i] & w24 */
-      bn.and   w21, w21, w24
-      /* w20, FG0.C <= w20 + w21 + FG0.C */
-      bn.addc  w20, w20, w21
-      /* w21 <= m[i] */
-      bn.lid   x21, 0(x2++)
-      /* w21 <= m[i] & w24 */
-      bn.and   w21, w21, w24
-      /* w21 <= m[i] & w24 & w26 */
-      bn.and   w21, w21, w26
-      /* w20, FG1.C <= w20 - w21 - FG1.C  */
-      bn.subb  w20, w20, w21, FG1
-      /* A[i] <= w20 */
-      bn.sid   x20, 0(x3++)
-
-    /* Update C if we updated v in the previous steps (w25 == 2^256-1). We
-       additionally subtract the modulus if *both* w25,w26 == 2^256-1.
-         dmem[dptr_C..dptr_C+(nlen*32)] <= (w25 == 2^256-1) ? (A + C) mod m : C */
-    addi     x2, x12, 0
-    addi     x3, x13, 0
-    addi     x4, x14, 0
-    loop     x30, 9
-      /* w20 <= C[i] */
-      bn.lid   x20, 0(x4)
-      /* w21 <= A[i] */
-      bn.lid   x21, 0(x3++)
-      /* w21 <= A[i] & w25 */
-      bn.and   w21, w21, w25
-      /* w20, FG0.C <= w20 + w21 + FG0.C */
-      bn.addc  w20, w20, w21
-      /* w21 <= m[i] */
-      bn.lid   x21, 0(x2++)
-      /* w21 <= m[i] & w25 */
-      bn.and   w21, w21, w25
-      /* w21 <= m[i] & w25 & w26 */
-      bn.and   w21, w21, w26
-      /* w20, FG1.C <= w20 - w21 - FG1.C  */
-      bn.subb  w20, w20, w21, FG1
-      /* C[i] <= w20 */
-      bn.sid   x20, 0(x4++)
-
-    /* Get a flag that is set if u is odd.
-         FG1.L <= u[0] */
-    bn.or    w22, w22, w31, FG1
-
-    /* Update u if it is even.
-         w22 <= FG1.L ? w22 : w22 >> 1 */
-    bn.rshi  w23, w31, w22 >> 1
-    bn.sel   w22, w22, w23, FG1.L
-
-    /* Create an all-ones mask.
-         w23 <= 2^256 - 1 */
-    bn.not   w23, w31
-
-    /* Get a flag that is set if A or B is odd.
-         FG0.L <= A[0] | B[0] */
-    bn.lid   x20, 0(x13)
-    bn.or    w20, w20, w27
-
-    /* Select a mask for adding moduli to A and B (should do this if u is even
-       and at least one of A and B is odd).
-         w23 <= (!FG1.L && FG0.L) ? 2^256 - 1 : 0 */
-    bn.sel   w23, w31, w23, FG1.L
-    bn.sel   w23, w23, w31, FG0.L
-
-    /* Conditionally add to B.
-         w27 <= B + (65537 & w23) */
-    bn.wsrr  w24, MOD
-    bn.and   w24, w24, w23
-    bn.add   w27, w27, w24
-
-    /* Shift B if u is even.
-         w27 <= FG1.L ? B : B >> 1 */
-    bn.rshi  w24, w31, w27 >> 1
-    bn.sel   w27, w27, w24, FG1.L
-
-    /* Clear flags for group 0. */
-    bn.sub   w31, w31, w31
-
-    /* Conditionally add m to A.
-         dmem[dptr_A..dptr_A+(nlen*32)] <= (!u[0] && (A[0] | B[0])) ? A + m : A */
-    addi     x2, x12, 0
-    addi     x3, x13, 0
-    loop     x30, 5
-      /* w20 <= A[i] */
-      bn.lid   x20, 0(x3)
-      /* w21 <= m[i] */
-      bn.lid   x21, 0(x2++)
-      /* w21 <= m[i] & w23 */
-      bn.and   w21, w21, w23
-      /* w20, FG0.C <= A[i] + (m[i] & w23) + FG0.C */
-      bn.addc  w20, w20, w21
-      /* A[i] <= w20 */
-      bn.sid   x20, 0(x3++)
-
-    /* Capture the final carry bit in a register to use as the MSB for the
-       shift. */
-    bn.addc  w23, w31, w31
-
-    /* Shift A to the right 1 if FG1.L is unset.
-         dmem[dptr_A..dptr_A+(nlen*32)] <= FG1.L ? A : A >> 1 */
-    addi     x3, x13, 0
-    jal      x1, bignum_rshift1_if_not_fg1L
-
-    /* Get a flag that is set if v is odd.
-         FG1.L <= v[0] */
-    bn.lid   x20, 0(x15)
-    bn.or    w20, w20, w31, FG1
-
-    /* Shift v to the right 1 if FG1.L is unset.
-         dmem[dptr_v..dptr_v+(nlen*32)] <= FG1.L ? v : v >> 1 */
-    addi     x3, x15, 0
-    bn.mov   w23, w31
-    jal      x1, bignum_rshift1_if_not_fg1L
-
-    /* Create an all-ones mask.
-         w23 <= 2^256 - 1 */
-    bn.not   w23, w31
-
-    /* Get a flag that is set if C or D is odd.
-         FG0.L <= C[0] | D[0] */
-    bn.lid   x20, 0(x14)
-    bn.or    w20, w20, w28
-
-    /* Select a mask for adding moduli to C and D (should do this if v is even
-       and at least one of C and D is odd).
-         w23 <= (!FG1.L && FG0.L) ? 2^256 - 1 : 0 */
-    bn.sel   w23, w31, w23, FG1.L
-    bn.sel   w23, w23, w31, FG0.L
-
-    /* Conditionally add to D.
-         w28 <= D + (65537 & w23) */
-    bn.wsrr  w24, MOD
-    bn.and   w24, w24, w23
-    bn.add   w28, w28, w24
-
-    /* Shift D if u is even.
-         w28 <= FG1.L ? D : D >> 1 */
-    bn.rshi  w24, w31, w28 >> 1
-    bn.sel   w28, w28, w24, FG1.L
-
-    /* Clear flags for group 0. */
-    bn.sub   w31, w31, w31
-
-    /* Conditionally add m to C.
-         dmem[dptr_C..dptr_C+(nlen*32)] <= (!v[0] && (C[0] | D[0])) ? C + m : C */
-    addi     x2, x12, 0
-    addi     x3, x14, 0
-    loop     x30, 5
-      /* w20 <= C[i] */
-      bn.lid   x20, 0(x3)
-      /* w21 <= m[i] */
-      bn.lid   x21, 0(x2++)
-      /* w21 <= m[i] & w23 */
-      bn.and   w21, w21, w23
-      /* w20, FG0.C <= C[i] + (m[i] & w23) + FG0.C */
-      bn.addc  w20, w20, w21
-      /* A[i] <= w20 */
-      bn.sid   x20, 0(x3++)
-
-    /* Capture the final carry bit in a register to use as the MSB for the
-       shift. */
-    bn.addc  w23, w31, w31
-
-    /* Shift C to the right 1 if FG1.L is unset.
-         dmem[dptr_C..dptr_C+(nlen*32)] <= FG1.L ? C : C >> 1 */
-    addi     x3, x14, 0
-    jal      x1, bignum_rshift1_if_not_fg1L
-
-    /* End of loop; no-op so we don't end on a jump. */
-    nop
-
-  /* FG0.Z <= u == 1 */
-  bn.addi    w23, w31, 1
-  bn.cmp     w22, w23
-
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
-
-  /* If the flag is unset (x2 == 0) then u != 1; in this case GCD(65537, m) !=
-     1 and the modular inverse cannot be computed. This should never happen
-     under normal operation, so panic and abort the program immediately. */
-  bne      x2, x0, _modinv_f4_u_ok
+gen_p:
+  # Compute nlen, the bit length of the prime.
+  # x16 <= n << 8 = n * 256 = nlen
+  slli x26, x30, 8
+
+  # Initialize the attempt counter.
+  # x26 <= (((x26 << 2) + x26) << 2) = 10 * nlen
+  slli x27, x26, 2
+  add  x26, x26, x27
+  slli x26, x26, 1
+
+_gen_p_loop:
+  # Retry the prime generation as long as the attempt counter is non-zero.
+  bne x26, x0, _gen_p_body
   unimp
 
-_modinv_f4_u_ok:
-  /* Done; the modular inverse is stored in A. */
-
+_gen_p_body:
+  # Decrement attempt counter.
+  addi x26, x26, -1
+
+  # Generate a FIPS-compliant, n-limbed prime candidate p.
+  # dmem[n] <= p
+  la x16, rsa_n
+  jal x1, gen_prime_candidate
+
+  # Temporarily calculate p - 1 for the relprime F4 test.
+  la      x16, rsa_n
+  li      x8, 2
+  bn.lid  x8, 0(x16)
+  bn.subi w2, w2, 1
+  bn.sid  x8, 0(x16)
+
+  jal x1, relprime_f4_test
+  beq x2, x0, _gen_p_loop
+
+  # Restore p after successful relprime F4 test.
+  bn.lid  x8, 0(x16)
+  bn.addi w2, w2, 1
+  bn.sid  x8, 0(x16)
+
+  jal x1, fermat_test
+  beq x2, x0, _gen_p_loop
+
+  jal x1, miller_rabin_test
+  beq x2, x0, _gen_p_loop
+
+  # Move the generate prime into dmem[rsa_p].
+  li x8, 2
+  la x16, rsa_n
+  la x17, rsa_p
+  loop x30, 2
+    bn.lid x8, 0(x16++)
+    bn.sid x8, 0(x17++)
+
+  # If we get here, the check succeeded and p is OK.
   ret
 
 /**
- * Shifts input 1 bit to the right in-place if FG1.L is 0.
+ * Generate n-limbed RSA prime q.
  *
- * Returns A' = if FG1.L then A else (msb || A) >> 1.
+ * Probabilistic prime generation algorithm performing a Fermat test followed
+ * by a Miller-Rabin test in accordance with Section A.1.3 of FIPS 186-5 for
+ * the usage as the prime q in RSA with gcd(F4, q-1) = 1 and
+ * | p - q | > 2^(256*n/2 - 100). This routine must be called after having
+ * generated suitable prime p (for example with `gen_p`).
  *
- * The MSB of the final result will be the LSB of w23.
+ * This routine is constant-time relative to q if q is possibly prime.
  *
- * Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]   x3: dptr_A, pointer to input A in DMEM
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: alen, number of 256-bit limbs for input A
- * @param[in]   w23: value to use as the msb
- * @param[in]   w31: all-zero
- * @param[out] dmem[dptr_A..dptr_A+alen*32]: A', result
+ * @param[in]  dmem[rsa_p]: RSA prime p
+ * @param[in]  x30: n, number of 256-bit limbs in the candidate prime
+ * @param[in]  w31: all-zero
+ * @param[out] dmem[rsa_q..rsa_q+(n*32)]: result, probable RSA prime q
  *
- * clobbered registers: x2, x3, x4, w20, w21
- * clobbered flag groups: FG0
+ * Clobbered registers: x2 to x27, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
  */
-bignum_rshift1_if_not_fg1L:
-  /* Calculate number of loop iterations for bignum shifts.
-       x2 <= n - 1 */
-  addi     x2, x0, 1
-  sub      x2, x30, x2
-
-  /* Conditionally shift the lower limbs. */
-  addi      x4, x3, 32
-  loop      x2, 5
-    /* w20 <= dmem[x3] = A[i] */
-    bn.lid    x20, 0(x3)
-    /* w21 <= dmem[x4] = A[i+1] */
-    bn.lid    x21, 0(x4++)
-    /* w21 <= (A >> 1)[i] */
-    bn.rshi   w21, w21, w20 >> 1
-    /* w20 <= FG1.L ? w20 : w21 */
-    bn.sel    w20, w20, w21, FG1.L
-    /* dmem[x3] <= w20 */
-    bn.sid    x20, 0(x3++)
-
-  /* Last limb is special because there's no next limb; we use the provided
-     input value. */
-  bn.lid    x20, 0(x3)
-  bn.rshi   w21, w23, w20 >> 1
-  bn.sel    w21, w20, w21, FG1.L
-  bn.sid    x21, 0(x3)
+gen_q:
+  # Compute nlen, the bit length of the prime.
+  # x16 <= n << 8 = n * 256 = nlen
+  slli x26, x30, 8
+
+  # Initialize the attempt counter.
+  # x26 <= (((x26 << 2) + x26) << 2) = 10 * nlen
+  slli x27, x26, 2
+  add  x26, x26, x27
+  slli x26, x26, 1
+
+_gen_q_loop:
+  # Retry the prime generation as long as the attempt counter is non-zero.
+  bne x26, x0, _gen_q_body_outer
+  unimp
 
+_gen_q_body_outer:
+  # Decrement attempt counter.
+  addi x26, x26, -1
+
+_gen_q_body_inner:
+  # Generate a FIPS-compliant, n-limbed prime candidate q.
+  # dmem[n] <= q
+  la x16, rsa_n
+  jal x1, gen_prime_candidate
+
+  # Distance test
+  jal x1, distance_test
+  beq x2, x0, _gen_q_body_inner
+
+  # Temporarily calculate q - 1 for the relprime F4 test.
+  la      x16, rsa_n
+  li      x8, 2
+  bn.lid  x8, 0(x16)
+  bn.subi w2, w2, 1
+  bn.sid  x8, 0(x16)
+
+  jal x1, relprime_f4_test
+  beq x2, x0, _gen_q_loop
+
+  # Restore p after successful relprime F4 test.
+  bn.lid  x8, 0(x16)
+  bn.addi w2, w2, 1
+  bn.sid  x8, 0(x16)
+
+  jal x1, fermat_test
+  beq x2, x0, _gen_q_loop
+
+  jal x1, miller_rabin_test
+  beq x2, x0, _gen_q_loop
+
+  # Move the generate prime into dmem[rsa_q].
+  li x8, 2
+  la x16, rsa_n
+  la x17, rsa_q
+  loop x30, 2
+    bn.lid x8, 0(x16++)
+    bn.sid x8, 0(x17++)
+
+  # If we get here, the check succeeded and p is OK.
   ret
 
 /**
- * Generate a random prime for `p` according to FIPS 186-5.
+ * Generate n-limbed prime number.
  *
- * Repeatedly generates random numbers until one is within bounds and passes
- * the primality check, as per FIPS 186-5 section A.1.3. If the checks fail
- * 5*nlen times, where `nlen` is the bit-length of the RSA public key
- * (nlen=2048 for RSA-2048), then this routine causes an `ILLEGAL_INSN`
- * software error, since the probability of this happening by chance is very
- * low.
+ * Probabilistic prime generation algorithm performing a Fermat test followed
+ * by a Miller-Rabin test in accordance with Section A.1.3 of FIPS 186-5.
  *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
+ * This routine is constant-time relative to p if p is possibly prime.
  *
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: plen, number of 256-bit limbs in the candidate prime
- * @param[in]  x31: n-1, constant
+ * @param[in]  x16: dptr_p: location of the probable prime p in DMEM.
+ * @param[in]  x30: n, number of 256-bit limbs in the candidate prime
  * @param[in]  w31: all-zero
- * @param[out] dmem[rsa_p..rsa_p+(plen*32)]: result, probable prime p
+ * @param[out] dmem[p..p+(n*32)]: result, probable prime
  *
- * clobbered registers: x2 to x13, x16 to x19, x22 to x26,
- *                      w2, w3, w4..w[4+(plen-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
+ * Clobbered registers: x2 to x27, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
  */
-generate_p:
-  /* Compute nlen, the bit-length of the RSA modulus based on the number of
-     limbs for p.
-       x4 <= n << 9 = plen*256*2 = nlen */
-  slli     x4, x30, 9
-
-  /* Initialize counter for # of attempts.
-       x4 <= (x4 << 2) + x4 = 5*nlen */
-  slli     x5, x4, 2
-  add      x4, x4, x5
-
-_generate_p_retry:
-  /* Check if the attempt counter is nonzero. Otherwise, trigger an error that
-     immediately aborts the OTBN program. */
-  bne      x4, x0, _generate_p_counter_nonzero
+gen_prime:
+  # Compute nlen, the bit length of the prime.
+  # x16 <= n << 8 = n * 256
+  slli x26, x30, 8
+
+  # Initialize the attempt counter.
+  # x26 <= (((x26 << 2) + x26) << 2) = 10 * nlen
+  slli x27, x26, 2
+  add  x26, x26, x27
+  slli x26, x26, 1
+
+  addi x27, x16, 0
+
+_gen_prime_loop:
+  # Retry the prime generation as long as the attempt counter is non-zero. The
+  # probability that the counter reaches is exceedingly low.
+  bne x26, x0, _gen_prime_body
   unimp
 
-_generate_p_counter_nonzero:
-
-  /* Decrement attempt counter. */
-  addi     x5, x0, 1
-  sub      x4, x4, x5
+_gen_prime_body:
+  # Decrement attempt counter.
+  addi x26, x26, -1
 
-  /* Generate a new random value for p.
-       dmem[rsa_p] <= <random plen*256-bit odd value> */
-  la       x16, rsa_p
-  jal      x1, generate_prime_candidate
+  # Generate a FIPS-186-5-compliant, n-limbed prime candidate p.
+  # dmem[n] <= p
+  la x16, rsa_n
+  jal x1, gen_prime_candidate
 
-  /* Check if the random value is acceptable for p.
-       w24 <= 2^256-1 if the p value is OK, otherwise 0 */
-  jal      x1, check_p
+  # Compute both Fermat and Miller-Rabin test.
+  jal x1, fermat_test
+  beq x2, x0, _gen_prime_loop
 
-  /* Compare the result of the check to the "check passed" all-1s value.
-       FG0.Z <= (w24 == 2^256-1) */
-  bn.not   w20, w31
-  bn.cmp   w20, w24
+  jal x1, miller_rabin_test
+  beq x2, x0, _gen_prime_loop
 
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
+  # Move the generate prime into dmem[x16].
+  li   x8, 2
+  la   x16, rsa_n
+  addi x17, x27, 0
+  loop x30, 2
+    bn.lid x8, 0(x16++)
+    bn.sid x8, 0(x17++)
 
-  /* If the flag is set, then the check passed. Otherwise, retry.*/
-  beq      x2, x0, _generate_p_retry
-
-  /* If we get here, the check succeeded and p is OK. */
+  # At this point, we have generated a probable prime.
   ret
 
 /**
- * Generate a random prime for `q` according to FIPS 186-5.
- *
- * Repeatedly generates random numbers until one is within bounds, far enough
- * from the previously generated `p` value, and passes the primality check, as
- * per FIPS 186-5 section A.1.3. If the checks fail 10*nlen times, where `nlen`
- * is the bit-length of the RSA public key (nlen=2048 for RSA-2048), then this
- * routine causes an `ILLEGAL_INSN` software error, since the probability of
- * this happening by chance is very low.
+ * Check that the generated primes p and q have a large enough distance.
  *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
+ * FIPS 186-5 requires | p - q | > 2^(256*n/2 - 100). For simplicity, q is
+ * assumed to reside in DMEM[n] as is the case the beginning of the generation
+ * of q.
  *
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: plen, number of 256-bit limbs in the candidate prime
- * @param[in]  x31: n-1, constant
- * @param[in]  w31: all-zero
- * @param[out] dmem[rsa_p..rsa_p+(plen*32)]: result, probable prime p
+ * @param[in] DMEM[rsa_p]: prime p
+ * @param[in] DMEM[n]: prime q
+ * @param[in] x30: N, number of limbs of the prime
+ * @param[in] w31: all-zero
+ * @param[out] x2: result, 1 if w^(p-1) = 1 mod p else 0.
  *
- * clobbered registers: x2 to x13, x16 to x19, x22 to x26,
- *                      w2, w3, w4..w[4+(plen-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
+ * Clobbered registers: x7, x8, x20, x21, w20, w21, w22, w23
+ * Clobbered flag groups: FG0, FG1
  */
-generate_q:
-  /* Compute nlen, the bit-length of the RSA modulus based on the number of
-     limbs for q.
-       x4 <= n << 9 = plen*256*2 = nlen */
-  slli     x4, x30, 9
-
-  /* Initialize counter for # of attempts.
-       x4 <= ((x4 << 2) + x4) << 1 = 10*nlen */
-  slli     x5, x4, 2
-  add      x4, x4, x5
-  slli     x4, x4, 1
-
-_generate_q_retry:
-  /* Check if the attempt counter is nonzero. Otherwise, trigger an error that
-     immediately aborts the OTBN program. */
-  bne      x4, x0, _generate_q_counter_nonzero
-  unimp
-
-_generate_q_counter_nonzero:
-
-  /* Decrement attempt counter. */
-  addi     x5, x0, 1
-  sub      x4, x4, x5
-
-  /* Generate a new random value for q.
-       dmem[rsa_q] <= <random plen*256-bit odd value> */
-  la       x16, rsa_q
-  jal      x1, generate_prime_candidate
-
-  /* Check if the random value is acceptable for q.
-       w24 <= 2^256-1 if the q value is OK, otherwise 0 */
-  jal      x1, check_q
-
-  /* Compare the result of the check to the "check passed" all-1s value.
-       FG0.Z <= (w24 == 2^256-1) */
-  bn.not   w20, w31
-  bn.cmp   w20, w24
-
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
-
-  /* If the flag is set, then the check passed. Otherwise, retry.*/
-  beq      x2, x0, _generate_q_retry
-
-  /* If we get here, the check succeeded and q is OK. */
+distance_test:
+  # Clear flags for both groups.
+  bn.sub w31, w31, w31, FG0
+  bn.sub w31, w31, w31, FG1
+
+  # Constant wide register pointers.
+  li x20, 20
+  li x21, 21
+
+  # Compute the last limbs of (p-q) and (q-p).
+  # w22 <= (p - q) mod (2^(256*n)) >> (256*(n-1))
+  # w23 <= (q - p) mod (2^(256*n)) >> (256*(n-1))
+  la   x7, rsa_p
+  la   x8, rsa_n
+  loop x30, 4
+    bn.lid  x20, 0(x7++)       # w20 <= p[i]
+    bn.lid  x21, 0(x8++)       # w21 <= q[i]
+    bn.subb w22, w20, w21, FG0 # w22, FG0.C <= p[i] - q[i] - FG0.C
+    bn.subb w23, w21, w20, FG1 # w23, FG1.C <= q[i] - p[i] - FG1.C
+
+  # If p < q, then FG0.C will be set. Use the flag to select the last limb
+  # that matches |p-q|.
+  # w20 <= FG0.C ? w23 : w22 = (p - q) ? (q - p)[n-1] : (p - q)[n-1]
+  bn.sel w20, w23, w22, FG0.C
+
+  # Get the highest 100 bits of |p - q|.
+  # w20 <= w20 >> 156 = |p-q| >> (256*n - 100)
+  bn.rshi w20, w31, w20 >> 156
+
+  # Check if the highest 100 bits are 0 (we will need to fail if so).
+  # FG0.Z <= (w20 == 0)
+  bn.addi w20, w20, 0
+
+  # Get the FG0.Z flag into a register.
+  # x2 <= CSRs[FG0] & 8 = FG0.Z << 3
+  csrrs x2, FG0, x0
+  andi  x2, x2, 8
+  srli  x2, x2, 3
+  xori  x2, x2, 1
   ret
 
 /**
- * Check if the input is an acceptable value for p.
+ * Check if a large number is relatively prime to 65537 (aka F4).
  *
- * Returns all 1s if the check passess, and 0 if it fails.
+ * Returns a nonzero value if GCD(x,65537) == 1, and 0 otherwise
  *
- * For the candidate value p, this check passes only if:
- *   * GCD(p-1, 65537) = 1, and
- *   * p passes 5 rounds of the Miller-Rabin primality test.
+ * A naive implementation would simply check if GCD(x, F4) == 1, However, we
+ * can simplify the check for relative primality using a few helpful facts
+ * about F4 specifically:
+ *   1. It is prime.
+ *   2. It has the special form (2^16 + 1).
  *
- * Assumes that the input is an odd number (this is a precondition for the
- * primality test) and that p >= sqrt(2)*(2^(nlen/2 - 1)), where nlen = RSA
- * public key length. Internally, `generate_prime_candidate` guarantees these
- * conditions. The caller must ensure them before using this routine to check
- * untrusted or imported keys.
+ * Because F4 is prime, checking if a number x is relatively prime to F4 means
+ * simply checking if x is a direct multiple of F4; if (x % F4) != 0, then x is
+ * relatively prime to F4. This means that instead of computing GCD, we can use
+ * basic modular arithmetic.
  *
- * See FIPS 186-5 section A.1.3 for the official spec. See this comment in
- * BoringSSL's implementation for a detailed description of how to choose the
- * number of rounds for Miller-Rabin:
- *   https://boringssl.googlesource.com/boringssl/+/dcabfe2d8940529a69e007660fa7bf6c15954ecc/crypto/fipsmodule/bn/prime.c#208
+ * Here, the special form of F4, fact (2), comes in handy. Since 2^32 mod F4 =
+ * 1, we can use `fold_bignum` to bring the number down to 35 bits cheaply.
  *
- * Since this implementation supports only RSA >= 2048, 5 rounds should always
- * be enough (and is even slightly more than needed for larger primes).
+ * Since 2^16 is equivalent to -1 modulo F4, we can express the resulting
+ * number in base-2^16 and simplify as follows:
+ *   x = x0 + 2^16 * x1 + 2^32 * x2
+ *   x \equiv x0 + (-1) * x1 + (-1)^2 * x2
+ *   x \equiv x0 - x1 + x2 (mod F4)
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * @param[in]  x16: dptr_p, address of the candidate prime in DMEM
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: plen, number of 256-bit limbs in the candidate prime
- * @param[in]  x31: plen-1, constant
+ * @param[in]  x16: dptr_x, pointer to first limb of x in dmem
+ * @param[in]  x30: n, number of 256-bit limbs for x
  * @param[in]  w31: all-zero
- * @param[out] w24: result, all 1s if the check passed and 0 otherwise
+ * @param[out]  x2: result, 1 if x is relatively prime to F4 else 0
  *
- * clobbered registers: x2, x3, x5 to x13, x17 to x19, x22 to x26,
- *                      w2, w3, w4..w[4+(plen-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
+ * clobbered registers: x2, w22, w23
+ * clobbered flag groups: FG0
  */
-check_p:
-  /* Set the output to the "check passed" value (all 1s) by default.
-       w24 <= 2^256 - 1 */
-  bn.not   w24, w31
-
-  /* Subtract 1 from the lowest limb in-place.
-       dmem[x16] <= dmem[x16] - 1 = p - 1 */
-  bn.lid   x20, 0(x16)
-  bn.subi  w20, w20, 1
-  bn.sid   x20, 0(x16)
-
-  /* Check if p-1 is relatively prime to e=65537.
-       w22 <= nonzero if GCD(p-1, e) == 1, otherwise 0 */
-  jal      x1, relprime_f4
-
-  /* Check if the relprime(e) check passed (w22 is nonzero). If the check
-     failed (w22==0), select the "failure" value of 0 for the result register.
-       w24 <= (w22 == 0) ? 0 : w24 */
-  bn.add   w22, w22, w31
-  bn.sel   w24, w31, w24, FG0.Z
-
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
-
-  /* If the flag is set, then the check failed and we can skip the remaining
-     checks. */
-  bne      x2, x0, _check_prime_fail
-
-  /* Add 1 back to the lowest limb in-place (correcting for the subtraction
-     before the last check).
-       dmem[x16] <= dmem[x16] + 1 = p */
-  bn.lid   x20, 0(x16)
-  bn.addi  w20, w20, 1
-  bn.sid   x20, 0(x16)
-
-  /* Load Montgomery constants for p.
-       dmem[mont_m0inv] <= Montgomery constant m0'
-       dmem[mont_rr] <= Montgomery constant RR */
-  la       x17, mont_m0inv
-  la       x18, mont_rr
-  jal      x1, modload
-
-  /* Load pointers to temporary buffers for Miller-Rabin. Each buffer needs to
-     be at least 256 bytes for RSA-4096; we return pointers to the beginning
-     and middle of the 512-byte `tmp` buffer.
-       x14 <= tmp
-       x15 <= tmp + 256 */
-  la       x14, tmp_scratchpad
-  li       x2, 256
-  add      x15, x14, x2
-
-  /**
-   * TODO: add something like BoringSSL's is_obviously_composite to filter out
-   * numbers that are divisible by the first few hundred primes. This filters
-   * out 80-90% of composites without resorting to the very slow Miller-Rabin
-   * check.
-   */
-
-  /* Calculate the number of Miller-Rabin rounds. The number of rounds is
-     selected based on the bit-length according to FIPS 186-5, table B.1.
-     According to that table, the minimums for an error probability matching
-     the overall algorithm's security level are:
-         RSA-2048 (1024-bit primes, n=4): 5 rounds
-         RSA-3072 (1536-bit primes, n=6): 4 rounds
-         RSA-4096 (2048-bit primes, n=8): 4 rounds
-
-      x10 <= (x30 == 4) ? 5 : 4 */
-  li      x10, 4
-  bne     x10, x30, _check_p_num_rounds_done
-  addi    x10, x10, 1
-
-_check_p_num_rounds_done:
-
-  /* Finally, run the Miller-Rabin primality test.
-       w21 <= 2^256-1 if p is probably prime, 0 if p is composite */
-  jal      x1, miller_rabin
-
-  /* Restore constants. */
-  li       x20, 20
-  li       x21, 21
-
-  /* Note: the primality test will have clobbered the result register, but if
-     we got as far as the primality test at all then the previous checks must
-     have succeeded. Therefore, we can simply return the result of the
-     primality test. */
-  bn.mov   w24, w21
-  ret
+relprime_f4_test:
+  # Load F4 into the modulus register for later.
+  # MOD <= 2^16 + 1
+  bn.addi w22, w31, 1
+  bn.add  w22, w22, w22 << 16
+  bn.wsrw MOD, w22
+
+  # Generate a 256-bit mask.
+  # w24 <= 2^256 - 1
+  bn.not w24, w31
+
+  # Fold the bignum to get a 35-bit number r such that r mod F4 = x mod F4.
+  # w23 <= r
+  jal x1, fold_bignum
+
+  # Isolate the lower 16 bits of the 35-bit working sum.
+  # w22 <= w23[15:0]
+  bn.and w22, w23, w24 >> 240
+
+  # Add the lower 16 bits of the sum to the highest 3 bits to get a 17-bit
+  # result.
+  # w22 <= w22 + (w23 >> 32)
+  bn.add w22, w22, w23 >> 32
+
+  # The sum from the previous addition is at most 2^16 - 1 + 2^3 - 1 < 2 * F4,
+  # so a modular addition with zero is sufficient to fully reduce.
+  # w22 <= w22 mod F4
+  bn.addm w22, w22, w31
+
+  # Isolate the subtraction term.
+  # w23 <= w23[31:16]
+  bn.rshi w23, w23, w31 >> 32
+  bn.rshi w23, w31, w23 >> 240
+
+  # Final subtraction modulo F4.
+  # w22 <= (w22 - w23) mod F4 = x mod F4
+  bn.subm w22, w22, w23
+
+  # Return x2 = 1 if w22 != 0.
+  bn.cmp w22, w31, FG0
+  csrrs  x2, FG0, x0
+  andi   x2, x2, 8
+  srli   x2, x2, 3
+  li     x3, 1
+  xor    x2, x2, x3
 
-_check_prime_fail:
-  /* `check_p` and `check_q` jump here if they fail; set the result to 0.
-       w24 <= 0 */
-  bn.sub  w24, w24, w24
   ret
 
-
 /**
- * Check if the input is an acceptable value for q.
+ * Partially reduce a value modulo m such that 2^32 mod m == 1.
  *
- * Returns all 1s if the check passess, and 0 if it fails.
+ * Returns r such that r mod m = x mod m and r < 2^35.
  *
- * Assumes that the input is an odd number (this is a precondition for the
- * primality test). Before using this to check untrusted or imported keys, the
- * caller must check to ensure q is odd.
+ * Can be used to speed up modular reduction on certain numbers, such as 3, 5,
+ * 17, and 65537.
  *
- * The check for q is very similar to the check for p (see `check_p`), except
- * that we also need to ensure the value is not too close to p. Specifically,
- * we need to reject the value if |p-q| < 2^(nlen/2 - 100), where `nlen` is the
- * size of the RSA public key. So, for RSA-2048, the bound is 2^(1024 - 100).
+ * Because we know 2^32 mod m is 1, it follows that in general 2^(32*k) for any
+ * k are all 1 modulo m. This includes 2^256, so when we receive the input as
+ * a bignum in 256-bit limbs, we can simply all the limbs together to get an
+ * equivalent number modulo m:
+ *  x = x[0] + 2^256 * x[1] + 2^512 * x[2] + ...
+ *  x \equiv x[0] + x[1] + x[2] + ... (mod F4)
+ *
+ * From there, we can essentially use the same trick to bisect the number into
+ * 128-bit, 64-bit, and 32-bit chunks and add these together to get an
+ * equivalent number modulo m. This operation is visually sort of like folding
+ * the number over itself repeatedly, which is where the function gets its
+ * name.
  *
  * Flags: Flags have no meaning beyond the scope of this subroutine.
  *
- * @param[in]  x20: 20, constant
- * @param[in]  x21: 21, constant
- * @param[in]  x30: plen, number of 256-bit limbs in the candidate prime
- * @param[in]  x31: plen-1, constant
+ * @param[in]  x16: dptr_x, pointer to first limb of x in dmem
+ * @param[in]  x30: plen, number of 256-bit limbs for x
+ * @param[in]  w24: constant, 2^256 - 1
  * @param[in]  w31: all-zero
- * @param[in]  dmem[rsa_p..rsa_p+(plen*32)]: value for p
- * @param[in]  dmem[rsa_q..rsa_q+(plen*32)]: candidate value for q
- * @param[out] w24: result, all 1s if the check passed and 0 otherwise
+ * @param[out] w23: r, result
  *
- * clobbered registers: x2, x3, x5 to x13, x17 to x19, x22 to x26,
- *                      w2, w3, w4..w[4+(plen-1)], w20 to w30
- * clobbered flag groups: FG0, FG1
+ * clobbered registers: x2, w22, w23
+ * clobbered flag groups: FG0
  */
-check_q:
-  /* Clear flags for both groups. */
-  bn.sub   w31, w31, w31, FG0
-  bn.sub   w31, w31, w31, FG1
-
-  /* Compute the last limbs of (p-q) and (q-p).
-       w22 <= (p - q) mod (2^(256*n)) >> (256*(n-1))
-       w23 <= (q - p) mod (2^(256*n)) >> (256*(n-1)) */
-  la       x7, rsa_p
-  la       x8, rsa_q
-  loop     x30, 4
-    /* w20 <= p[i] */
-    bn.lid   x20, 0(x7++)
-    /* w21 <= q[i] */
-    bn.lid   x21, 0(x8++)
-    /* w22, FG0.C <= p[i] - q[i] - FG0.C */
-    bn.subb  w22, w20, w21, FG0
-    /* w23, FG1.C <= q[i] - p[i] - FG1.C */
-    bn.subb  w23, w21, w20, FG1
-
-  /* If p < q, then FG0.C will be set. Use the flag to select the last limb
-     that matches |p-q|.
-       w20 <= FG0.C ? w23 : w22 = (p - q) ? (q - p)[n-1] : (p - q)[n-1] */
-  bn.sel   w20, w23, w22, FG0.C
-
-  /* Get the highest 100 bits of |p - q|.
-       w20 <= w20 >> 156 = |p-q| >> (256*n - 100) */
-  bn.rshi  w20, w31, w20 >> 156
-
-  /* Check if the highest 100 bits are 0 (we will need to fail if so).
-       FG0.Z <= (w20 == 0) */
-  bn.addi  w20, w20, 0
-
-  /* Get the FG0.Z flag into a register.
-       x2 <= (CSRs[FG0] >> 3) & 1 = FG0.Z */
-  csrrs    x2, FG0, x0
-  srli     x2, x2, 3
-  andi     x2, x2, 1
-
-  /* If the flag is set, then the check failed and we can skip the remaining
-     checks. */
-  bne      x2, x0, _check_prime_fail
-
-  /* Remaining checks are the same as for p; tail call `check_p`. */
-  la   x16, rsa_q
-  jal  x0, check_p
+fold_bignum:
+  # Initialize constants for loop.
+  li x22, 22
+
+  # Copy input pointer.
+  addi x2, x16, 0
+
+  # Initialize sum to zero and clear FG0.C.
+  # w23 <= 0
+  # FG0.C <= 0
+  bn.addi w23, w31, 0
+
+  # Iterate through the limbs of x and add them together.
+  # Loop invariants for iteration i (i=0..n-1):
+  #   x2 = dptr_x + i*32
+  #   x22 = 22
+  #   (w23 + FG0.C) \equiv x[0] + x[1] + ... + x[i-1] (mod m)
+  #
+  loop x30, 2
+    # Load the next limb.
+    # w22 <= x[i]
+    bn.lid x22, 0(x2++)
+
+    # Accumulate the new limb, incorporating the carry bit from the previous
+    # round if there was one (this works because 2^256 \equiv 1 mod m).
+    # w23 <= (w23 + x[i] + FG0.C) mod 2^256
+    # FG0.C <= (w23 + x[i] + FG0.C) / 2^256
+    bn.addc w23, w23, w22
+
+  # Isolate the lower 128 bits of the sum.
+  # w22 <= w23[127:0]
+  bn.and w22, w23, w24 >> 128
+
+  # Add the two 128-bit halves of the sum, plus the carry from the last round
+  # of the sum computation. The sum is now up to 129 bits.
+  # w23 <= (w22 + (w23 >> 128) + FG0.C)
+  bn.addc w23, w22, w23 >> 128
+
+  # Isolate the lower 64 bits of the sum.
+  # w22 <= w23[63:0]
+  bn.and w22, w23, w24 >> 192
+
+  # Add the two halves of the sum (technically 64 and 65 bits). A carry was
+  # not possible in the previous addition since the value is too small. The
+  # value is now up to 66 bits.
+  # w23 <= (w22 + (w23 >> 64))
+  bn.add w23, w22, w23 >> 64
+
+  # Isolate the lower 32 bits of the sum.
+  # w22 <= w23[31:0]
+  bn.and w22, w23, w24 >> 224
+
+  # Add the two halves of the sum (technically 32 and 34 bits). A carry was
+  # not possible in the previous addition since the value is too small.
+  # w23 <= (w22 + (w23 >> 32))
+  bn.add w23, w22, w23 >> 32
+
+  ret
 
 /**
- * Generate a candidate prime (can be used for either p or q).
+ * Calculate x^-1 mod 2^256, for x < x^256 and x % 2 == 1.
  *
- * Fixes the lowest 3 bits to 1 and the highest 2 bits to 1, so the number is
- * always equivalent to 7 mod 8 and is always >= 2^(256*n - 1) * 1.5.  This
- * implies that the prime candidate is always in range, i.e. it is greater than
- * sqrt(2) * (2^(256*n - 1)), because sqrt(2) < 1.5. All other bits are fully
- * random. This follows FIPS 186-5 section A.1.3, which allows generating prime
- * candidates with a specific value mod 8 and allows the highest 2 bits to be
- * set arbitrarily.
+ * This function computes the inversion of a single 256-bit word modulo 2^256
+ * using the Newton-Raphson algorithm.
  *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
+ * The key identity is the follwing:
  *
- * @param[in]  x16: dptr_result, address of the result buffer in DMEM
- * @param[in]  x20: 20, constant
- * @param[in]  x30: plen, number of 256-bit limbs for the result
- * @param[in]  x31: plen-1, constant
- * @param[in]  w31: all-zero
- * @param[out] dmem[x16..x16+(plen*32)]: random candidate prime
+ *   x * y = 1 mod 2^k ==> x * y * (2 - x * y) mod 2^(2 * k)
  *
- * clobbered registers: x2, x3, w20, w21
- * clobbered flag groups: FG0
+ * Hence by setting k = y = 1, we can invert x in 8 iterations with 2
+ * multiplications and 1 subtraction per iteration.
+
+ * @param[in]  w20: x, an odd value to be inverted modulo 2^256
+ * @param[int] w31: all-zero
+ * @param[out] w21: y, the result y = x^-1 mod 2^256
+ *
+ * Clobbered registers: w22, w23, w24, w25, w26, w27
+ * Clobbered flag groups: FG0
  */
-generate_prime_candidate:
-  /* Generate random 256-bit limbs.
-       dmem[x16..x16+(plen*32)] <= RND(n*32) ^ URND(n*32)  */
-  addi     x2, x16, 0
-  loop     x30, 4
-    /* w20 <= RND() */
-    bn.wsrr  w20, RND
-    /* w21 <= URND() */
-    bn.wsrr  w21, URND
-    /* w20 <= w20 ^ w21 */
-    bn.xor   w20, w20, w21
-    /* dmem[x2] <= w20 */
-    bn.sid   x20, 0(x2++)
-
-  /* Fix the lowest 3 bits to 1 so the number is always 7 mod 8.
-       dmem[x16] <= dmem[x16] | 7 */
-  bn.lid   x20, 0(x16)
-  bn.addi  w21, w31, 7
-  bn.or    w20, w20, w21
-  bn.sid   x20, 0(x16)
-
-  /* Get a pointer to the last limb.
-       x2 <= x16 + ((n-1) << 5) = x16 + (n-1)*32 */
-  slli     x3, x31, 5
-  add      x2, x16, x3
-
-  /* Fix the highest 2 bits to 1.
-       dmem[x2] <= dmem[x2] | (3 << 6) << 248 = dmem[x2] | 3 << 254 */
-  bn.lid   x20, 0(x2)
-  bn.addi  w21, w31, 192
-  bn.or    w20, w20, w21 << 248
-  bn.sid   x20, 0(x2)
+nr_inv:
+
+  # We compute the following algorithm:
+  #
+  # w21 = y = 1
+  # w22 = x
+  # w23 = 2
+  # for i = 0 to 7 do
+  #     [w27, w26] = w21 * w22 = x * y
+  #     w26 = w23 - w26 = 2 - x * y
+  #     [w27, w26] = w21 * 26 = x * (2 - x * y)
+  #     w21 = w26
+  # endfor
+  # return w21
+
+  # w21 = y = 1
+  # w22 = x
+  # w23 = 2
+  bn.addi w21, w31, 1
+  bn.mov  w22, w20
+  bn.addi w23, w31, 2
+
+  loopi 8, 8
+    # x * y
+    bn.mov w24, w21
+    bn.mov w25, w22
+    jal x1, mul256_w24xw25
+
+    # 2 - x * y.
+    bn.sub w26, w23, w26
+
+    # x * (2 - x * y)
+    bn.mov w24, w21
+    bn.mov w25, w26
+    jal x1, mul256_w24xw25
+    bn.mov w21, w26
 
   ret
 
 /**
- * Check if a large number is relatively prime to 65537 (aka F4).
+ * Division x * y^-1 of an n-word integer x and a 256-bit integer y.
  *
- * Returns a nonzero value if GCD(x,65537) == 1, and 0 otherwise
+ * This algorithm computes the division of x by y through multiplications.
+ * Since y < 2^256, it possible complete the division by multiplying each word
+ * of x by y^-1. Note that the algorithm assumes that y^-1 mod 2^256 is
+ * supplied (see nr_inv on how to compute the inverse).
  *
- * A naive implementation would simply check if GCD(x, F4) == 1, However, we
- * can simplify the check for relative primality using a few helpful facts
- * about F4 specifically:
- *   1. It is prime.
- *   2. It has the special form (2^16 + 1).
+ * The algorithm is in-place, i.e., the result overwrites DMEM[dtpr_x].
  *
- * Because F4 is prime, checking if a number x is relatively prime to F4 means
- * simply checking if x is a direct multiple of F4; if (x % F4) != 0, then x is
- * relatively prime to F4. This means that instead of computing GCD, we can use
- * basic modular arithmetic.
+ * @param[in] x16: dptr_x, DMEM address of the n-limb dividend
+ * @param[in] x30: n number of limbs
+ * @param[in] w20: 256-bit divisor y
+ * @param[in] w21: 256-bit divisor y inverted y^-1 mod 2^256
+ * @param[in] w31: all-zero
+ * @param[out] DMEM[dptr_x]: result x / y
  *
- * Here, the special form of F4, fact (2), comes in handy. Note that 2^16 is
- * equivalent to -1 modulo F4. So if we express a number x in base-2^16, we can
- * simplify as
- * follows:
- *   x = x0 + 2^16 * x1 + 2^32 * x2 + 2^48 * x3 + ...
- *   x \equiv x0 + (-1) * x1 + (-1)^2 * x2 + (-1)^3 * x3 + ... (mod F4)
- *   x \equiv x0 - x1 + x2 - x3 + ... (mod F4)
- *
- * An additionally helpful observation based on fact (2) is that 2^32, 2^64,
- * and in general 2^(32*k) for any k are all 1 modulo F4. This includes 2^256,
- * so when we receive the input as a bignum in 256-bit limbs, we can simply
- * all the limbs together to get an equivalent number modulo F4:
- *  x = x[0] + 2^256 * x[1] + 2^512 * x[2] + ...
- *  x \equiv x[0] + x[1] + x[2] + ... (mod F4)
+ * Clobbered registers: x10-x15, x31, w20-27
+ * Clobbered flag groups: FG0
+ */
+nr_div:
+
+  # We compute the following algorithm:
+  #
+  # x12 = x16 = dptr_x
+  # for i = 0 to n - 1 do
+  #     [w27, w26] = w20 * w22 = x[i] * y^-1
+  #     DMEM[x12++] = w26 = (x[i] * y^-1) % 2^256
+  #     [w27, w26] = w21 * w26 = y * ((x[i] * y^-1) % 2^256)
+  #     DMEM[x12:] = DMEM[x12:] - w27 = DMEM[x12:] - (y * x[i] * y^-1) >> 2^256
+  # endfor
+
+  # Wide register and DMEM pointers.
+  addi x10, x0, 22
+  addi x11, x0, 26
+  addi x12, x16, 0
+
+  # Iteration counter.
+  li x13, 0
+
+  # Only iterate over the first n-1 limbs.
+  addi x31, x30, -1
+  loop x31, 18
+    # x[i] * y^-1
+    bn.lid x10, 0(x12)
+    bn.mov w24, w21
+    bn.mov w25, w22
+    jal x1, mul256_w24xw25
+    bn.sid x11, 0(x12++)
+
+    # y * (x[i] * y^-1 % 2^256)
+    bn.mov w24, w26
+    bn.mov w25, w20
+    jal x1, mul256_w24xw25
+
+    # Corrective subtraction. Iterate over the remaining n-1 - i limbs and
+    # subtract y * (x[i] * y^-1) >> 2^256
+    addi x14, x12, 0
+    sub  x15, x30, x13
+    addi x15, x15, -1
+    bn.add w31, w31, w31 # Clear flags.
+
+    loop x15, 4
+      bn.lid x10, 0(x14)
+      bn.subb w22, w22, w27
+      bn.sid x10, 0(x14++)
+      bn.xor w27, w27, w27
+
+    addi x13, x13, 1
+
+  # The last iteration is special. No corrective subtraction is needed.
+  bn.lid x10, 0(x12)
+  bn.mov w24, w21
+  bn.mov w25, w22
+  jal x1, mul256_w24xw25
+  bn.sid x11, 0(x12++)
+
+  ret
+
+/**
+ * Unrolled 512=256x256 bit multiplication.
  *
- * From there, we can essentially use the same trick to bisect the number into
- * 128-bit, 64-bit, and 32-bit chunks and add these together to get an
- * equivalent number modulo F4. For the final 16-bit chunks, we need to
- * subtract because 2^16 mod F4 = -1 rather than 1.
+ * Returns c = a * b.
  *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
+ * Flags: No flags are set in this subroutine.
  *
- * @param[in]  x16: dptr_x, pointer to first limb of x in dmem
- * @param[in]  x30: plen, number of 256-bit limbs for x
- * @param[in]  w31: all-zero
- * @param[out] w22: result, 0 only if x is not relatively prime to F4
+ * @param[in] w24: a, first operand
+ * @param[in] w25: b, second operand
+ * @param[out] [w26, w27]: c, result
  *
- * clobbered registers: x2, w22, w23
- * clobbered flag groups: FG0
+ * clobbered registers: w26, w27
+ * clobbered flag groups: None
  */
-relprime_f4:
-  /* Load F4 into the modulus register for later.
-       MOD <= 2^16 + 1 */
-  bn.addi  w22, w31, 1
-  bn.add   w22, w22, w22 << 16
-  bn.wsrw  MOD, w22
-
-  /* Initialize constants for loop. */
-  li      x22, 22
-
-  /* Copy input pointer. */
-  addi    x2, x16, 0
-
-  /* Initialize sum to zero and clear FG0.C.
-       w23 <= 0
-       FG0.C <= 0 */
-  bn.addi  w23, w31, 0
-
-  /* Iterate through the limbs of x and add them together.
-
-     Loop invariants for iteration i (i=0..n-1):
-       x2 = dptr_x + i*32
-       x22 = 22
-       (w23 + FG0.C) \equiv x[0] + x[1] + ... + x[i-1] (mod F4)
-   */
-  loop    x30, 2
-    /* Load the next limb.
-         w22 <= x[i] */
-    bn.lid   x22, 0(x2++)
-
-    /* Accumulate the new limb, incorporating the carry bit from the previous
-       round if there was one (this works because 2^256 \equiv 1 mod F4).
-         w23 <= (w23 + x[i] + FG0.C) mod 2^256
-         FG0.C <= (w23 + x[i] + FG0.C) / 2^256 */
-    bn.addc  w23, w23, w22
-
-  /* Isolate the lower 128 bits of the sum.
-       w22 <= w23[127:0] */
-  bn.rshi  w22, w23, w31 >> 128
-  bn.rshi  w22, w31, w22 >> 128
-
-  /* Add the two 128-bit halves of the sum, plus the carry from the last round
-     of the sum computation. The sum is now up to 129 bits.
-       w23 <= (w22 + (w23 >> 128) + FG0.C) */
-  bn.addc  w23, w22, w23 >> 128
-
-  /* Isolate the lower 64 bits of the sum.
-       w22 <= w23[63:0] */
-  bn.rshi  w22, w23, w31 >> 64
-  bn.rshi  w22, w31, w22 >> 192
-
-  /* Add the two halves of the sum (technically 64 and 65 bits). A carry was
-     not possible in the previous addition since the value is too small. The
-     value is now up to 66 bits.
-       w23 <= (w22 + (w23 >> 64)) */
-  bn.add   w23, w22, w23 >> 64
-
-  /* Isolate the lower 32 bits of the sum.
-       w22 <= w23[31:0] */
-  bn.rshi  w22, w23, w31 >> 32
-  bn.rshi  w22, w31, w22 >> 224
-
-  /* Add the two halves of the sum (technically 32 and 34 bits). A carry was
-     not possible in the previous addition since the value is too small.
-       w23 <= (w22 + (w23 >> 32)) */
-  bn.add   w23, w22, w23 >> 32
-
-  /* Note: At this point, we're down to the last few terms:
-       x \equiv (w23[15:0] - w23[31:16] + w23[34:32]) mod F4 */
-
-  /* Isolate the lower 16 bits of the 35-bit working sum.
-       w22 <= w23[15:0] */
-  bn.rshi  w22, w23, w31 >> 16
-  bn.rshi  w22, w31, w22 >> 240
-
-  /* Add the lower 16 bits of the sum to the highest 3 bits to get a 17-bit
-     result.
-       w22 <= w22 + (w23 >> 32) */
-  bn.add   w22, w22, w23 >> 32
-
-  /* The sum from the previous addition is < 2 * F4, so a modular addition with
-     zero is sufficient to fully reduce.
-       w22 <= w22 mod F4 */
-  bn.addm  w22, w22, w31
-
-  /* Isolate the subtraction term.
-       w23 <= w23[31:16] */
-  bn.rshi  w23, w23, w31 >> 32
-  bn.rshi  w23, w31, w23 >> 240
-
-  /* Final subtraction modulo F4.
-       w22 <= (w22 - w23) mod F4 = x mod F4 */
-  bn.subm  w22, w22, w23
-
+mul256_w24xw25:
+  bn.mulqacc.z          w24.0, w25.0,  0
+  bn.mulqacc            w24.1, w25.0, 64
+  bn.mulqacc.so  w26.L, w24.0, w25.1, 64
+  bn.mulqacc            w24.2, w25.0,  0
+  bn.mulqacc            w24.1, w25.1,  0
+  bn.mulqacc            w24.0, w25.2,  0
+  bn.mulqacc            w24.3, w25.0, 64
+  bn.mulqacc            w24.2, w25.1, 64
+  bn.mulqacc            w24.1, w25.2, 64
+  bn.mulqacc.so  w26.U, w24.0, w25.3, 64
+  bn.mulqacc            w24.3, w25.1,  0
+  bn.mulqacc            w24.2, w25.2,  0
+  bn.mulqacc            w24.1, w25.3,  0
+  bn.mulqacc            w24.3, w25.2, 64
+  bn.mulqacc.so  w27.L, w24.2, w25.3, 64
+  bn.mulqacc.so  w27.U, w24.3, w25.3,  0
   ret
-
-.section .scratchpad
-
-/* Extra label marking the start of p || q in memory. The `derive_d` function
-   uses this to get a 512-byte working buffer, which means p and q must be
-   continuous in memory. In addition, `rsa_key_from_cofactor` uses the
-   larger buffer for division and depends on the order of `p` and `q`. */
-.balign 32
-rsa_pq:
-
-/* Secret RSA `p` parameter (prime). Up to 2048 bits. */
-.globl rsa_p
-rsa_p:
-.zero 256
-
-/* Secret RSA `q` parameter (prime). Up to 2048 bits. */
-.globl rsa_q
-rsa_q:
-.zero 256
-
-/* Temporary working buffer (4096 bits). */
-.balign 32
-tmp_scratchpad:
-.zero 512
-
-.bss
-
-/* RSA modulus n = p*q (up to 4096 bits). */
-.balign 32
-.globl rsa_n
-rsa_n:
-.zero 512
-
-/* RSA private exponent d (up to 4096 bits). */
-.balign 32
-.globl rsa_d
-rsa_d:
-.zero 512
-
-/* Prime cofactor for n for `rsa_key_from_cofactor`; also used as a temporary
- * work buffer. */
-.balign 32
-.globl rsa_cofactor
-rsa_cofactor:
-.zero 512
-
-/* Montgomery constant m0' (256 bits). */
-.balign 32
-mont_m0inv:
-.zero 32
-
-/* Montgomery constant R^2 (up to 2048 bits). */
-.balign 32
-mont_rr:
-.zero 256
diff --git a/sw/otbn/crypto/rsa_modinv_f4.s b/sw/otbn/crypto/rsa_modinv_f4.s
new file mode 100644
index 0000000000000..8f110a6ab6a30
--- /dev/null
+++ b/sw/otbn/crypto/rsa_modinv_f4.s
@@ -0,0 +1,532 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+.text
+.globl modinv_f4
+
+/**
+ * Compute the inverse of 65537 modulo a given number.
+ *
+ * Returns d such that (d*65537) = 1 mod m and 0 <= d < m.
+ *
+ * Requires that m is nonzero, and that GCD(m, 65537) = 1.
+ *
+ * This is a specialized version of binary extended GCD, as described in HAC
+ * Algorithm 14.61 and implemented in constant time in BoringSSL here:
+ *   https://boringssl.googlesource.com/boringssl/+/dcabfe2d8940529a69e007660fa7bf6c15954ecc/crypto/fipsmodule/bn/gcd_extra.c#170
+ *
+ * BoringSSL's version includes a few improvements beyond being constant-time,
+ * such as avoiding signed integers. This modified algorithm has also been
+ * proven mathematically correct in Coq, see:
+ *   https://github.com/mit-plv/fiat-crypto/pull/333
+ *
+ * In pseudocode,the BoringSSL algorithm is:
+ *   A, B, C, D = 1, 0, 0, 1
+ *   u = x
+ *   v = y
+ *   // Loop invariants:
+ *   //   A*x - B*y = u
+ *   //   D*y - C*x = v
+ *   //   gcd(u, v) = gcd(x, y)
+ *   //   bitlen(u) + bitlen(v) <= i
+ *   //   0 < u <= x
+ *   //   0 <= v <= y
+ *   //   0 <= A, C < y
+ *   //   0 <= B, D <= x
+ *   for i=bitlen(x) + bitlen(y)..1:
+ *     if u and v both odd:
+ *       if v < u:
+ *         u = u - v
+ *         A = (A + C) mod y
+ *         B = (B + D) mod x
+ *       else:
+ *         v = v - u
+ *         C = (A + C) mod y
+ *         D = (B + D) mod x
+ *     // At this point, the invariant holds and >= 1 of u and v is even
+ *     if u is even:
+ *       u >>= 1
+ *       if (A[0] | B[0]):
+ *         A = (A + y) / 2
+ *         B = (B + x) / 2
+ *       else:
+ *         A >>= 1
+ *         B >>= 1
+ *     if v is even:
+ *       v >>= 1
+ *       if (C[0] | D[0]):
+ *         C = (C + x) / 2
+ *         D = (D + y) / 2
+ *       else:
+ *         C >>= 1
+ *         D >>= 1
+ *    // End of loop. Guarantees the invariant plus u = gcd(x,y).
+ *
+ * As described in HAC note 14.64, this algorithm computes a modular inverse
+ * when gcd(x,y) = 1. Specifically, at termination, A = x^-1 mod y because:
+ *   (A*x) mod y = (A*x - B*y) mod y = u mod y = 1
+ *
+ * Of course, all the if statements are implemented with constant-time selects.
+ *
+ * The fully specialized and constant-time version of the pseudocode is:
+ *   A, C = 1, 0
+ *   u = 65537
+ *   v = m
+ *   // Loop invariants:
+ *   //   A*x - B*y = u
+ *   //   D*y - C*x = v
+ *   //   gcd(u, v) = gcd(x, y)
+ *   //   bitlen(u) + bitlen(v) <= i
+ *   //   gcd(u, v) = 1
+ *   //   bitlen(u) + bitlen(v) <= i
+ *   //   0 < u <= 65537
+ *   //   0 <= v <= m
+ *   //   0 <= A, C < m
+ *   //   0 <= B,D < 65537
+ *   for i=(bitlen(m) + bitlen(65537))..1:
+ *     both_odd = u[0] & v[0]
+ *     v_lt_u = v < u
+ *     u = u - ((both_odd && v_lt_u) ? v : 0)
+ *     v = v - ((both_odd && !v_lt_u) ? u : 0)
+ *     ac = (A + C) mod m
+ *     A = (both_odd && v_lt_u) ? ac : A
+ *     C = (both_odd && !v_lt_u) ? ac : C
+ *     bd = (B + D) mod 65537
+ *     B = (both_odd && v_lt_u) ? bd : B
+ *     D = (both_odd && !v_lt_u) ? bd : D
+ *     u_even = !u[0]
+ *     a_or_b_odd = A[0] | B[0]
+ *     u = u_even ? u >> 1 : u
+ *     A = (u_even && a_or_b_odd) ? (A + m) : A
+ *     A = u_even ? (A >> 1) : A
+ *     B = (u_even && a_or_b_odd) ? (B + 65537) : B
+ *     B = u_even ? (B >> 1) : B
+ *     v_even = !v[0]
+ *     c_or_d_odd = C[0] | D[0]
+ *     v = v_even ? v >> 1 : v
+ *     C = (v_even && c_or_d_odd) ? (C + m) : C
+ *     C = v_even ? (C >> 1) : C
+ *     D = (u_even && c_or_d_odd) ? (D + 65537) : D
+ *     D = u_even ? (D >> 1) : D
+ *   if u != 1:
+ *     FAIL("Not invertible")
+ *   return A
+ *
+ * This routine runs in constant time.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  x12: dptr_m, pointer to modulus m in DMEM (n limbs)
+ * @param[in]  x13: dptr_A, pointer to result buffer in DMEM (n limbs)
+ * @param[in]  x14: dptr_C, pointer to a temporary buffer in DMEM (n limbs)
+ * @param[in]  x15: dptr_v, pointer to a temporary buffer in DMEM (n limbs)
+ * @param[in]  x20: 20, constant
+ * @param[in]  x21: 21, constant
+ * @param[in]  x30: nlen, number of 256-bit limbs for modulus m and result d
+ * @param[in]  w31: all-zero
+ * @param[out] dmem[dptr_A..dptr_A+(plen*32)]: result, modular inverse d
+ *
+ * clobbered registers: MOD, x2 to x4, x31, w20 to w28
+ * clobbered flag groups: FG0, FG1
+ */
+modinv_f4:
+  /* Zero the intermediate buffers.
+       dmem[dptr_A..dptr_A+(nlen*32)] <= 0
+       dmem[dptr_C..dptr_C+(nlen*32)] <= 0 */
+  li       x2, 31
+  addi     x3, x13, 0
+  addi     x4, x14, 0
+  loop     x30, 2
+    bn.sid   x2, 0(x3++)
+    bn.sid   x2, 0(x4++)
+
+  /* Set the lowest limb of A to 1.
+       dmem[dptr_A] <= 1 */
+  bn.addi  w20, w31, 1
+  bn.sid   x20, 0(x13)
+
+  /* Initialize B to 0.
+       w27 <= 0 */
+  bn.mov   w27, w31
+
+  /* Initialize D to 1.
+       w28 <= 1 */
+  bn.addi  w28, w31, 1
+
+  /* Copy the modulus to the buffer for v.
+       dmem[dptr_v..dptr_v+(nlen*32)] <= m */
+  addi     x3, x12, 0
+  addi     x4, x15, 0
+  loop     x30, 2
+    bn.lid   x20, 0(x3++)
+    bn.sid   x20, 0(x4++)
+
+  /* Initialize u = F4.
+       w22 <= (1 << 16) + 1 = 65537 */
+  bn.addi  w23, w31, 1
+  bn.add   w22, w23, w23 << 16
+
+  /* MOD <= 65537 */
+  bn.wsrw  MOD, w22
+
+  /* Calculate number of loop iterations = bitlen(m) + bitlen(65537).
+       x31 <= (x30 << 8) + 17 = 256*n + 17 */
+  slli     x31, x30, 8
+  addi     x31, x31, 17
+
+  /* Main loop. */
+  loop     x31, 120
+    /* Load the least significant limb of v.
+         w20 <= dmem[dptr_v] = v[255:0] */
+    bn.lid   x20, 0(x15)
+
+    /* Construct a flag that is 1 if both u and v are odd.
+         FG1.L <= (w22 & w20)[0] = u[0] && v[0] */
+    bn.and   w20, w22, w20, FG1
+
+    /* Compare u and v.
+         FG0.C <= v < u */
+    bn.mov   w23, w22
+    addi     x2, x15, 0
+    loop     x30, 3
+      /* w20 <= v[i] */
+      bn.lid   x20, 0(x2++)
+      /* FG0.C <= v[i] <? w23 + FG0.C */
+      bn.cmpb  w20, w23
+      /* Higher limbs of u are all zero; set w23 = 0 for next round. */
+      bn.mov   w23, w31
+
+    /* Capture FG0.C in a mask.
+         w23 <= FG0.C ? 2^256 - 1 : 0 */
+    bn.subb  w23, w31, w31
+
+    /* Select a mask that is all 1s if we should subtract v from u.
+         w24 <= FG1.L ? w23 : w31 = (u[0] && v[0] && v < u) ? 2^256 - 1 : 0 */
+    bn.sel   w24, w23, w31, FG1.L
+
+    /* Select a mask that is all 1s if we should subtract u from v.
+         w25 <= FG1.L ? !w23 : w31 = (u[0] && v[0] && u <= v) ? 2^256 - 1 : 0 */
+    bn.not   w23, w23
+    bn.sel   w25, w23, w31, FG1.L
+
+    /* Conditionally subtract v from u. If we do this subtraction, we know that
+       v < u <= 65537, so we can use only one limb of v.
+         w22 <= w22 - (dmem[dptr_v] & w24) */
+    bn.lid   x20, 0(x15)
+    bn.and   w20, w20, w24
+    bn.sub   w22, w22, w20
+
+    /* Conditionally subtract u from v.
+         dmem[dptr_v..dptr_v+(nlen*32)] <= v - (u & w25) */
+    bn.and   w23, w22, w25
+    addi     x2, x15, 0
+    loop     x30, 4
+      /* w20 <= v[i] */
+      bn.lid   x20, 0(x2)
+      /* w20, FG0.C <= v[i] - w23 - FG0.C */
+      bn.subb  w20, w20, w23
+      /* v[i] <= w20 */
+      bn.sid   x20, 0(x2++)
+      /* Higher limbs of u are all zero; set w23 = 0 for next round. */
+      bn.mov   w23, w31
+
+    /* Calculate what we should add to B; D if we updated u in the previous
+       steps (w24 == 2^256=1), otherwise 0.
+         w20 <= (D & w24) */
+    bn.and   w20, w28, w24
+
+    /* Calculate what we should add to D; B if we updated v in the previous
+       steps (w25 == 2^256=1), otherwise 0.
+         w21 <= (B & w25) */
+    bn.and   w21, w27, w25
+
+    /* Update B.
+         w27 <= (B + (D & w24)) mod 65537 */
+    bn.addm  w27, w27, w20
+
+    /* Update D.
+         w27 <= (D + (B & w25)) mod 65537 */
+    bn.addm  w28, w28, w21
+
+    /* Clear flags for both groups. */
+    bn.sub   w31, w31, w31, FG0
+    bn.sub   w31, w31, w31, FG1
+
+    /* Compare (A + C) to m.
+         FG1.C <= A + C < m */
+    addi     x2, x12, 0
+    addi     x3, x13, 0
+    addi     x4, x14, 0
+    loop     x30, 5
+      /* w20 <= A[i] */
+      bn.lid   x20, 0(x3++)
+      /* w21 <= C[i] */
+      bn.lid   x21, 0(x4++)
+      /* w23, FG0.C <= A[i] + C[i] + FG0.C */
+      bn.addc  w23, w20, w21
+      /* w20 <= m[i] */
+      bn.lid   x20, 0(x2++)
+      /* FG1.C <= w23 <? m[i] + FG1.C */
+      bn.cmpb  w23, w20, FG1
+
+    /* Capture FG1.C as a mask that is all 1s if we should subtract the modulus.
+         w26 <= FG1.C ? 0 : 2^256 - 1 */
+    bn.subb  w26, w31, w31, FG1
+    bn.not   w26, w26
+
+    /* Clear flags for both groups. */
+    bn.sub   w31, w31, w31, FG0
+    bn.sub   w31, w31, w31, FG1
+
+    /* Update A if we updated u in the previous steps (w24 == 2^256-1). We
+       additionally subtract the modulus if *both* w24,w26 == 2^256-1.
+         dmem[dptr_A..dptr_A+(nlen*32)] <= (w24 == 2^256-1) ? (A + C) mod m : A */
+    addi     x2, x12, 0
+    addi     x3, x13, 0
+    addi     x4, x14, 0
+    loop     x30, 9
+      /* w20 <= A[i] */
+      bn.lid   x20, 0(x3)
+      /* w21 <= C[i] */
+      bn.lid   x21, 0(x4++)
+      /* w21 <= C[i] & w24 */
+      bn.and   w21, w21, w24
+      /* w20, FG0.C <= w20 + w21 + FG0.C */
+      bn.addc  w20, w20, w21
+      /* w21 <= m[i] */
+      bn.lid   x21, 0(x2++)
+      /* w21 <= m[i] & w24 */
+      bn.and   w21, w21, w24
+      /* w21 <= m[i] & w24 & w26 */
+      bn.and   w21, w21, w26
+      /* w20, FG1.C <= w20 - w21 - FG1.C  */
+      bn.subb  w20, w20, w21, FG1
+      /* A[i] <= w20 */
+      bn.sid   x20, 0(x3++)
+
+    /* Update C if we updated v in the previous steps (w25 == 2^256-1). We
+       additionally subtract the modulus if *both* w25,w26 == 2^256-1.
+         dmem[dptr_C..dptr_C+(nlen*32)] <= (w25 == 2^256-1) ? (A + C) mod m : C */
+    addi     x2, x12, 0
+    addi     x3, x13, 0
+    addi     x4, x14, 0
+    loop     x30, 9
+      /* w20 <= C[i] */
+      bn.lid   x20, 0(x4)
+      /* w21 <= A[i] */
+      bn.lid   x21, 0(x3++)
+      /* w21 <= A[i] & w25 */
+      bn.and   w21, w21, w25
+      /* w20, FG0.C <= w20 + w21 + FG0.C */
+      bn.addc  w20, w20, w21
+      /* w21 <= m[i] */
+      bn.lid   x21, 0(x2++)
+      /* w21 <= m[i] & w25 */
+      bn.and   w21, w21, w25
+      /* w21 <= m[i] & w25 & w26 */
+      bn.and   w21, w21, w26
+      /* w20, FG1.C <= w20 - w21 - FG1.C  */
+      bn.subb  w20, w20, w21, FG1
+      /* C[i] <= w20 */
+      bn.sid   x20, 0(x4++)
+
+    /* Get a flag that is set if u is odd.
+         FG1.L <= u[0] */
+    bn.or    w22, w22, w31, FG1
+
+    /* Update u if it is even.
+         w22 <= FG1.L ? w22 : w22 >> 1 */
+    bn.rshi  w23, w31, w22 >> 1
+    bn.sel   w22, w22, w23, FG1.L
+
+    /* Create an all-ones mask.
+         w23 <= 2^256 - 1 */
+    bn.not   w23, w31
+
+    /* Get a flag that is set if A or B is odd.
+         FG0.L <= A[0] | B[0] */
+    bn.lid   x20, 0(x13)
+    bn.or    w20, w20, w27
+
+    /* Select a mask for adding moduli to A and B (should do this if u is even
+       and at least one of A and B is odd).
+         w23 <= (!FG1.L && FG0.L) ? 2^256 - 1 : 0 */
+    bn.sel   w23, w31, w23, FG1.L
+    bn.sel   w23, w23, w31, FG0.L
+
+    /* Conditionally add to B.
+         w27 <= B + (65537 & w23) */
+    bn.wsrr  w24, MOD
+    bn.and   w24, w24, w23
+    bn.add   w27, w27, w24
+
+    /* Shift B if u is even.
+         w27 <= FG1.L ? B : B >> 1 */
+    bn.rshi  w24, w31, w27 >> 1
+    bn.sel   w27, w27, w24, FG1.L
+
+    /* Clear flags for group 0. */
+    bn.sub   w31, w31, w31
+
+    /* Conditionally add m to A.
+         dmem[dptr_A..dptr_A+(nlen*32)] <= (!u[0] && (A[0] | B[0])) ? A + m : A */
+    addi     x2, x12, 0
+    addi     x3, x13, 0
+    loop     x30, 5
+      /* w20 <= A[i] */
+      bn.lid   x20, 0(x3)
+      /* w21 <= m[i] */
+      bn.lid   x21, 0(x2++)
+      /* w21 <= m[i] & w23 */
+      bn.and   w21, w21, w23
+      /* w20, FG0.C <= A[i] + (m[i] & w23) + FG0.C */
+      bn.addc  w20, w20, w21
+      /* A[i] <= w20 */
+      bn.sid   x20, 0(x3++)
+
+    /* Capture the final carry bit in a register to use as the MSB for the
+       shift. */
+    bn.addc  w23, w31, w31
+
+    /* Shift A to the right 1 if FG1.L is unset.
+         dmem[dptr_A..dptr_A+(nlen*32)] <= FG1.L ? A : A >> 1 */
+    addi     x3, x13, 0
+    jal      x1, bignum_rshift1_if_not_fg1L
+
+    /* Get a flag that is set if v is odd.
+         FG1.L <= v[0] */
+    bn.lid   x20, 0(x15)
+    bn.or    w20, w20, w31, FG1
+
+    /* Shift v to the right 1 if FG1.L is unset.
+         dmem[dptr_v..dptr_v+(nlen*32)] <= FG1.L ? v : v >> 1 */
+    addi     x3, x15, 0
+    bn.mov   w23, w31
+    jal      x1, bignum_rshift1_if_not_fg1L
+
+    /* Create an all-ones mask.
+         w23 <= 2^256 - 1 */
+    bn.not   w23, w31
+
+    /* Get a flag that is set if C or D is odd.
+         FG0.L <= C[0] | D[0] */
+    bn.lid   x20, 0(x14)
+    bn.or    w20, w20, w28
+
+    /* Select a mask for adding moduli to C and D (should do this if v is even
+       and at least one of C and D is odd).
+         w23 <= (!FG1.L && FG0.L) ? 2^256 - 1 : 0 */
+    bn.sel   w23, w31, w23, FG1.L
+    bn.sel   w23, w23, w31, FG0.L
+
+    /* Conditionally add to D.
+         w28 <= D + (65537 & w23) */
+    bn.wsrr  w24, MOD
+    bn.and   w24, w24, w23
+    bn.add   w28, w28, w24
+
+    /* Shift D if u is even.
+         w28 <= FG1.L ? D : D >> 1 */
+    bn.rshi  w24, w31, w28 >> 1
+    bn.sel   w28, w28, w24, FG1.L
+
+    /* Clear flags for group 0. */
+    bn.sub   w31, w31, w31
+
+    /* Conditionally add m to C.
+         dmem[dptr_C..dptr_C+(nlen*32)] <= (!v[0] && (C[0] | D[0])) ? C + m : C */
+    addi     x2, x12, 0
+    addi     x3, x14, 0
+    loop     x30, 5
+      /* w20 <= C[i] */
+      bn.lid   x20, 0(x3)
+      /* w21 <= m[i] */
+      bn.lid   x21, 0(x2++)
+      /* w21 <= m[i] & w23 */
+      bn.and   w21, w21, w23
+      /* w20, FG0.C <= C[i] + (m[i] & w23) + FG0.C */
+      bn.addc  w20, w20, w21
+      /* A[i] <= w20 */
+      bn.sid   x20, 0(x3++)
+
+    /* Capture the final carry bit in a register to use as the MSB for the
+       shift. */
+    bn.addc  w23, w31, w31
+
+    /* Shift C to the right 1 if FG1.L is unset.
+         dmem[dptr_C..dptr_C+(nlen*32)] <= FG1.L ? C : C >> 1 */
+    addi     x3, x14, 0
+    jal      x1, bignum_rshift1_if_not_fg1L
+
+    /* End of loop; no-op so we don't end on a jump. */
+    nop
+
+  /* FG0.Z <= u == 1 */
+  bn.addi    w23, w31, 1
+  bn.cmp     w22, w23
+
+  /* Get the FG0.Z flag into a register.
+       x2 <= CSRs[FG0] & 8 = FG0.Z << 3 */
+  csrrs    x2, FG0, x0
+  andi     x2, x2, 8
+
+  /* If the flag is unset (x2 == 0) then u != 1; in this case GCD(65537, m) !=
+     1 and the modular inverse cannot be computed. This should never happen
+     under normal operation, so panic and abort the program immediately. */
+  bne      x2, x0, _modinv_f4_u_ok
+  unimp
+
+_modinv_f4_u_ok:
+  /* Done; the modular inverse is stored in A. */
+
+  ret
+
+/**
+ * Shifts input 1 bit to the right in-place if FG1.L is 0.
+ *
+ * Returns A' = if FG1.L then A else (msb || A) >> 1.
+ *
+ * The MSB of the final result will be the LSB of w23.
+ *
+ * Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]   x3: dptr_A, pointer to input A in DMEM
+ * @param[in]  x20: 20, constant
+ * @param[in]  x21: 21, constant
+ * @param[in]  x30: alen, number of 256-bit limbs for input A
+ * @param[in]   w23: value to use as the msb
+ * @param[in]   w31: all-zero
+ * @param[out] dmem[dptr_A..dptr_A+alen*32]: A', result
+ *
+ * clobbered registers: x2, x3, x4, w20, w21
+ * clobbered flag groups: FG0
+ */
+bignum_rshift1_if_not_fg1L:
+  /* Calculate number of loop iterations for bignum shifts.
+       x2 <= n - 1 */
+  addi     x2, x0, 1
+  sub      x2, x30, x2
+
+  /* Conditionally shift the lower limbs. */
+  addi      x4, x3, 32
+  loop      x2, 5
+    /* w20 <= dmem[x3] = A[i] */
+    bn.lid    x20, 0(x3)
+    /* w21 <= dmem[x4] = A[i+1] */
+    bn.lid    x21, 0(x4++)
+    /* w21 <= (A >> 1)[i] */
+    bn.rshi   w21, w21, w20 >> 1
+    /* w20 <= FG1.L ? w20 : w21 */
+    bn.sel    w20, w20, w21, FG1.L
+    /* dmem[x3] <= w20 */
+    bn.sid    x20, 0(x3++)
+
+  /* Last limb is special because there's no next limb; we use the provided
+     input value. */
+  bn.lid    x20, 0(x3)
+  bn.rshi   w21, w23, w20 >> 1
+  bn.sel    w21, w20, w21, FG1.L
+  bn.sid    x21, 0(x3)
+
+  ret
diff --git a/sw/otbn/crypto/rsa_primality.s b/sw/otbn/crypto/rsa_primality.s
new file mode 100644
index 0000000000000..44a2bdde1fbd6
--- /dev/null
+++ b/sw/otbn/crypto/rsa_primality.s
@@ -0,0 +1,448 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+# Primality tests. The routines in this file are structured around `modexp` and
+# make use of pre-defined memory location in `run_rsa_mem`.
+
+.text
+.globl gen_prime_candidate
+.globl fermat_test
+.globl miller_rabin_test
+
+/**
+ * Perform the Fermat primality test.
+ *
+ * This function calculates w^(p-1) mod p for some random witness w and a prime
+ * candidate. If w is not divisble by p and p is prime, then w^(p-1) mod p = 1.
+ * The only composite numbers that pass this test are pseudoprimes which need
+ * be sieved out by an additional primality test (see miller_rabin_test).
+ *
+ * The test consists of a single exponentiation (i.e., one invocation of
+ * `modexp`).
+ *
+ * @param[in] DMEM[rsa_n]: candidate prime p to check, with p = 3 mod 4.
+ * @param[in]     x30: N, number of limbs of the prime
+ * @param[in]     w31: all-zero
+ * @param[out]     x2: result, 1 if w^(p-1) mod p else 0.
+ *
+ * This routine is constant-time.
+ *
+ * Clobbered registers: x2 to x26, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
+ */
+fermat_test:
+  # Load the Montgomery constants.
+  la  x16, rsa_n
+  la  x17, RR
+  jal x1, modload
+
+  # Constant wide register pointers.
+  li x8, 2
+  li x9, 3
+
+  # Mask the prime candidate and move it to DMEM.
+  # dmem[rsa_d0] <= p ^ m
+  # dmem[rsa_d1] <= m
+  la x12, rsa_n
+  la x13, rsa_d0
+  la x14, rsa_d1
+  loop x30, 6
+    bn.lid  x8, 0(x12++)
+    bn.wsrr w3, URND
+    bn.xor  w2, w2, w3
+    bn.sid  x8, 0(x13++)
+    bn.xor  w31, w31, w31 # dummy instruction
+    bn.sid  x9, 0(x14++)
+
+  # Since p is odd p-1 must be even, hence to have d0 XOR d1 = p-1, the first
+  # bit of the share d0 must be flipped.
+  la      x12, rsa_d0
+  bn.addi w3, w31, 1
+  bn.lid  x8, 0(x12)
+  bn.xor  w2, w2, w3
+  bn.sid  x8, 0(x12)
+
+  # Generate a witness w as the exponentation base point.
+  # dmem[r0] <= w
+  la  x16, r0
+  la  x17, rsa_n
+  jal x1, gen_witness
+
+  # Calculate w^(p-1) mod p with message blinding is disabled.
+  # dmem[r0] <= w^(p-1) mod p
+  li x29, 0
+  jal x1, modexp
+
+  # Check whether w^(p-1) mod p == 1.
+  la x16, r0
+  jal x1, is_1
+
+  ret
+
+/**
+ * Perform the Miller-Rabin primality test.
+ *
+ * Repeatedly calculate w^((p-1)/2) mod p for a random witness w and check
+ * whether it equals 1 or p-1. This is a simplified variant of the algorithm of
+ * Section A.1.3 of FIPS 186-5 for candidates primes of the form p mod 4 = 3 as
+ * they are generated by `gen_prime_candidate`. The routine unfolds as follows:
+ *
+ *   x = (p-1)/2
+ *   for i in num_iterations do
+ *     Choose a random witness w, 1 < w < p-1
+ *     y = w^x mod p
+ *     if y != 1 and y != p-1 then
+ *       return COMPOSITE
+ *     endif
+ *   endfor
+ *   return PROBABLY PRIME
+ *
+ * This routine is constant-time with respect to p, if p is prime.
+ *
+ * Clobbered registers: x2 to x26, x31
+ *                      w2, w3, w4 to w[4+N-1], w24 to w30
+ * Clobbered flag groups: FG0, FG1
+ */
+miller_rabin_test:
+  # Load the Montgomery constants.
+  la  x16, rsa_n
+  la  x17, RR
+  jal x1, modload
+
+  # Constant wide register pointers.
+  li x8, 2
+  li x9, 3
+
+  # Mask the prime candidate and move it to DMEM[d0], DMEM[d1].
+  # dmem[rsa_d0] <= p ^ m
+  # dmem[rsa_d1] <= m
+  la x12, rsa_n
+  la x13, rsa_d0
+  la x14, rsa_d1
+  loop x30, 6
+    bn.lid  x8, 0(x12++)
+    bn.wsrr w3, URND
+    bn.xor w2, w2, w3
+    bn.sid x8, 0(x13++)
+    bn.xor w31, w31, w31 # dummy instruction
+    bn.sid x9, 0(x14++)
+
+  # Since p is odd p-1 must be even, hence to have d0 XOR d1 = p-1, the first
+  # bit of the share d0 must be flipped.
+  # dmem[rsa_d0] <= (p-1) ^ m
+  # dmem[rsa_d1] <= m
+  la      x12, rsa_d0
+  bn.addi w3, w31, 1
+  bn.lid  x8, 0(x12)
+  bn.xor  w2, w2, w3
+  bn.sid  x8, 0(x12)
+
+  # Calculate (p-1)/2 by shifting the shares one position to the right.
+  # dmem[rsa_d0] <= ((p-1) ^ m) >> 1
+  # dmem[rsa_d1] <= m >> 1
+  la   x13, rsa_d0
+  la   x14, rsa_d1
+  addi x31, x30, -1
+  loop x31, 9
+    bn.lid  x8, 0(x13)
+    bn.lid  x9, 32(x13)
+    bn.rshi w2, w3, w2 >> 1
+    bn.sid  x8, 0(x13++)
+    bn.xor  w31, w31, w31 # dummy instruction
+    bn.lid  x8, 0(x14)
+    bn.lid  x9, 32(x14)
+    bn.rshi w2, w3, w2 >> 1
+    bn.sid  x8, 0(x14++)
+
+  # Insert a random bit at the MSB of the shifted last word.
+  bn.wsrr w3, URND
+  bn.rshi w3, w3, w31 >> 1
+
+  bn.lid  x8, 0(x13)
+  bn.rshi w2, w31, w2 >> 1
+  bn.or   w2, w2, w3
+  bn.sid  x8, 0(x13++)
+  bn.xor  w31, w31, w31 # dummy instruction
+  bn.lid  x8, 0(x14)
+  bn.rshi w2, w31, w2 >> 1
+  bn.or   w2, w2, w3
+  bn.sid  x8,  0(x14++)
+
+  # Fix the number of iterations to 4 in accordance with Table B.1 of
+  # FIPS 186-5 to reach an error probability of less than 2^100 for
+  # RSA-{2048,3072,4096}.
+  loopi 4, 33
+    # Generate a witness w as the exponentation base point.
+    # dmem[r0] <= w
+    la  x16, r0
+    la  x17, rsa_n
+    jal x1, gen_witness
+
+    # Calculate w^(p-1) mod p with message blinding disabled.
+    # dmem[r0] <= w^(p-1) mod p
+    li x29, 0
+    jal x1, modexp
+
+    # Check whether w^(p-1) mod p = 1.
+    # x2 <= 1 if w^(p-1) mod p = 1 else x2 <= 0.
+    la x16, r0
+    jal x1, is_1
+
+    addi x3, x2, 0
+
+    # Check whether w^(p-1) mod p = p-1.
+    # x2 <= 1 if w^(p-1) mod p = p-1 else x2 <= 0.
+    la x16, r0
+    la x17, rsa_n
+    jal x1, is_pminus1
+
+    # At this point, if neither w^(p-1) mod p = 1 or w^(p-1) mod p = p-1, then
+    # p must be a composite number.
+    or x2, x2, x3
+    beq x2, x0, _miller_rabin_epilogue
+
+    # Remask the shared exponents.
+    li   x8, 2
+    la   x13, rsa_d0
+    la   x14, rsa_d1
+    loop x30, 8
+      bn.lid  x8, 0(x13)
+      bn.wsrr w3, URND
+      bn.xor  w2, w2, w3
+      bn.sid  x8, 0(x13++)
+      bn.xor  w31, w31, w31 # dummy instruction
+      bn.lid  x8, 0(x14)
+      bn.xor  w2, w2, w3
+      bn.sid  x8, 0(x14++)
+    nop
+
+_miller_rabin_epilogue:
+  ret
+
+/**
+ * Generate a n-limbed candidate prime.
+ *
+ * Fixes the lowest 3 bits to 1 and the highest 2 bits to 1, so the number is
+ * always equivalent to 7 mod 8 and is always >= 2^(256*n - 1) * 1.5.  This
+ * implies that the prime candidate is always in range, i.e. it is greater than
+ * sqrt(2) * (2^(256*n - 1)), because sqrt(2) < 1.5. All other bits are fully
+ * random. This follows FIPS 186-5 section A.1.3, which allows generating prime
+ * candidates with a specific value mod 8 and allows the highest 2 bits to be
+ * set arbitrarily.
+ *
+ * Flags: Flags have no meaning beyond the scope of this subroutine.
+ *
+ * @param[in]  x16: dptr_result, address of the result buffer in DMEM
+ * @param[in]  x30: n, number of 256-bit limbs for the result
+ * @param[in]  w31: all-zero
+ * @param[out] dmem[x16..x16+(n*32)]: random candidate prime
+ *
+ * clobbered registers: x2, x3, w20, w21
+ * clobbered flag groups: FG0
+ */
+gen_prime_candidate:
+  # Constant wide register index.
+  li x20, 20
+
+  # Generate random 256-bit limbs.
+  # dmem[x16..x16+(n*32)] <= RND(n*32) ^ URND(n*32)
+  addi x2, x16, 0
+  loop x30, 4
+    bn.wsrr w20, RND      # w20 <= RND()
+    bn.wsrr w21, URND     # w21 <= URND()
+    bn.xor  w20, w20, w21 # w20 <= w20 ^ w21
+    bn.sid  x20, 0(x2++)  # dmem[x2] <= w20
+
+  # Fix the lowest 3 bits to 1 so the number is always 7 mod 8.
+  # dmem[x16] <= dmem[x16] | 7
+  bn.lid  x20, 0(x16)
+  bn.addi w21, w31, 7
+  bn.or   w20, w20, w21
+  bn.sid  x20, 0(x16)
+
+  # Get a pointer to the last limb.
+  # x2 <= x16 + ((n-1) << 5) = x16 + (n-1)*32
+  addi x31, x30, -1
+  slli x3, x31, 5
+  add  x2, x16, x3
+
+  # Fix the highest 2 bits to 1.
+  # dmem[x2] <= dmem[x2] | (3 << 6) << 248 = dmem[x2] | 3 << 254
+  bn.lid  x20, 0(x2)
+  bn.addi w21, w31, 192
+  bn.or   w20, w20, w21 << 248
+  bn.sid  x20, 0(x2)
+
+  ret
+
+/**
+ * Generate a new random witness for the Fermat and Miller-Rabin tests.
+ *
+ * The witness w is guaranteed to been in the interval 1 < w < b-1.
+ *
+ * @param[in] x16, dptr_w, DMEM location to result witness w
+ * @param[in] x17, dptr_b, DMEM pointer to the bound b
+ * @param[in] x30, n, number of limbs
+ */
+gen_witness:
+  li x8, 23
+  li x9, 24
+
+  # dmem[dptr_w:dptr_w+n*32] <= RND(n*32) ^ URND(n*32) = w
+  addi x10, x16, 0
+  loop x30, 4
+    bn.wsrr w22, URND     # w22  <= URND()
+    bn.wsrr w23, RND      # w23  <= RND()
+    bn.xor  w23, w22, w23 # w23  <= w22 ^ w23
+    bn.sid  x8, 0(x10++)  # b[i] <= w23
+
+  bn.subi w22, w31, 1 # FG0.C <= 1
+
+  # Check that w < b - 1.
+  # FG0.C <= w <? b - FG0.C
+  addi x10, x16, 0
+  addi x11, x17, 0
+  loop x30, 3
+    bn.lid  x8, 0(x10++) # w23   <= w[i]
+    bn.lid  x9, 0(x11++) # w24   <= b[i]
+    bn.cmpb w23, w24     # FG0.C <= b[i] - w[i] - FG0.C
+
+  # Extract FG0.C into a small register and jump back to the start if it is 0.
+  # x2 <= CSRs[FG0][0] = FG0.C
+  csrrs x2, FG0, x0
+  andi  x2, x2, 1
+  beq   x2, x0, gen_witness
+
+  # Clear flags and compute the constant 1.
+  # w21   <= 1
+  # FG0.C <= 0
+  bn.addi w22, w31, 1
+
+  # Check that 1 < b.
+  # FG0.C <= 1 <? b
+  addi x10, x16, 0
+  loop x30, 3
+    bn.lid  x8, 0(x10++) # w23   <= b[i]
+    bn.cmpb w22, w23     # FG0.C <= (i = 0 ? 1 : 0) - b[i] - FG0.C
+    bn.mov  w22, w31     # w22   <= 0
+
+  # Extract FG0.C into a small register and retry if it is 0.
+  # x2 <= CSRs[FG0][0] = FG0.C
+  csrrs x2, FG0, x0
+  andi  x2, x2, 1
+  beq   x2, x0, gen_witness
+
+  ret
+
+/**
+ * Check whether the multi-word value x is equal to 1.
+ *
+ * Returns 1 in x2 if x == 1 else 0.
+ *
+ * @param[in]  x16: dptr_x, pointer to input buffer x in dmem
+ * @param[in]  x30: n, number of limbs
+ * @param[in]  w31: all-zero
+ * @param[out]  x2: result, 1 if x == 1 else 0
+ *
+ * Clobbered Registers: x8, x9, x31, w2, w24, w25
+ * Clobbered Flag Groups: FG0
+ */
+is_1:
+  li x8, 2
+  li x9, 3
+  addi x10, x16, 0
+
+  # w24 <= 2^256-1
+  # w25 <= 2^256-1
+  bn.sub   w24, w24, w24
+  bn.not   w24, w24
+  bn.mov   w25, w24
+
+  bn.addi w4, w31, 1
+
+  # Check all the words for equality.
+  loop x30, 6
+    bn.lid x8, 0(x10++)
+    # For the lowest word use w4 for the comparison otherwise w3.
+    # FG0.Z <= 1 if w25 = 0 else 0.
+    bn.cmp w25, w31, FG0
+    bn.sel w3, w31, w4, FG0.Z
+    bn.xor w25, w25, w25
+    # Compare for equality.
+    # FG0.Z <= 1 if w2 = w3 else 0.
+    bn.cmp w2, w3, FG0
+    bn.sel w24, w24, w31, FG0.Z
+
+  # Compare the result of the check to the "check passed" all-1s value.
+  # FG0.Z <= (w24 == 2^256-1)
+  bn.not w25, w31
+  bn.cmp w25, w24
+
+  # Get the FG0.Z flag into a register.
+  # x2 <= CSRs[FG0] & 8 = FG0.Z << 3
+  csrrs x2, FG0, x0
+  andi  x2, x2, 8
+  srli  x2, x2, 3
+
+  ret
+
+/**
+ * Check whether the x is equal to the modulus p-1.
+ *
+ * Returns 1 in x2 if x == 1 else 0.
+ * Note that p-1 is assumed to an even number.
+ *
+ * @param[in]  x16: dptr_x, pointer to input buffer x in dmem
+ * @param[in]  x17: dptr_p, modulus p
+ * @param[in]  x30: n, number of limbs
+ * @param[out]  x2: result, 1 if x == (p-1) else 0
+ *
+ * Clobbered Registers: x8, x9, x10, x11, w2, w3, w24, w25
+ * Clobbered Flag Groups: FG00
+ */
+is_pminus1:
+  # Prepare DMEM and wide register pointers.
+  li x8, 2
+  li x9, 3
+  addi x10, x16, 0
+  addi x11, x17, 0
+
+  # w24 <= 2^256-1
+  # w25 <= 2^256-1
+  bn.sub   w24, w24, w24
+  bn.not   w24, w24
+  bn.mov   w25, w24
+
+  # Subtract 1 from the lowest word of p, which is results in p-1 since p is an
+  # odd number.
+  bn.lid  x9, 0(x11)
+  bn.subi w4, w3, 1
+
+  # Check all the words for equality.
+  loop x30, 7
+    bn.lid x8, 0(x10++)
+    bn.lid x9, 0(x11++)
+    # For the lowest word use w4 for the comparison otherwise w3.
+    # FG0.Z <= 1 if w25 = 0 else 0.
+    bn.cmp w25, w31, FG0
+    bn.sel w3, w3, w4, FG0.Z
+    bn.xor w25, w25, w25
+    # Compare for equality.
+    # FG0.Z <= 1 if w2 = w3 else 0.
+    bn.cmp w2, w3, FG0
+    bn.sel w24, w24, w31, FG0.Z
+
+  # Compare the result of the check to the "check passed" all-1s value.
+  # FG0.Z <= (w24 == 2^256-1)
+  bn.not w25, w31
+  bn.cmp w25, w24
+
+  # Get the FG0.Z flag into a register.
+  # x2 <= CSRs[FG0] & 8 = FG0.Z << 3
+  csrrs x2, FG0, x0
+  andi  x2, x2, 8
+  srli  x2, x2, 3
+
+  ret
diff --git a/sw/otbn/crypto/rsa_verify.s b/sw/otbn/crypto/rsa_verify.s
deleted file mode 100644
index e9b0ee3618a37..0000000000000
--- a/sw/otbn/crypto/rsa_verify.s
+++ /dev/null
@@ -1,717 +0,0 @@
-/* Copyright lowRISC Contributors.
- * Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE.dcrypto file.
- *
- * Derived from code in
- * https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/cr50_stab/chip/g/dcrypto/dcrypto_bn.c
- */
-
-
-.text
-.globl modexp_var
-
-/**
- * Precomputation of a constant m0' for Montgomery modular arithmetic
- *
- * Word-wise Montgomery modular arithmetic requires a quantity m0' to be
- * precomputed once per modulus M. m0' is the negative of the
- * modular multiplicative inverse of the lowest limb m0 of the modulus M, in
- * the field GF(2^w), where w is the number of bits per limb. w is set to 256
- * in this subroutine.
- *
- * Returns: m0' = -m0^(-1) mod 2^256
- *          with m0 being the lowest limb of the modulus M
- *
- * This subroutine implements the Dusse-Kaliski method for computing the
- * multiplicative modular inverse when the modulus is of the form 2^k.
- * [Dus] DOI https://doi.org/10.1007/3-540-46877-3_21 section 3.2
- *       (Algorithm "Modular Inverse" on p. 235)
- *
- * Flags: When leaving this subroutine, flags of FG0 depend on a
- *        the final subtraction and can be used if needed.
- *        FG0.M, FG0.L, FG0.Z depend directly on the value of the result m0'.
- *        FG0.C is always set.
- *        FG1 is not modified in this subroutine.
- *
- * @param[in]  x16: dptr_m, pointer to modulus M in dmem
- * @param[in]  x17: dptr_m0inv, pointer to dmem location to store m0inv
- * @param[in]  w31: all-zero.
- *
- * clobbered registers: x8, w0, w1, w28, w29
- * clobbered flag groups: FG0
- */
-compute_m0inv:
-
-  /* load lowest limb of modulus to w28 */
-  li       x8, 28
-  bn.lid   x8, 0(x16)
-
-  /* w0 keeps track of loop iterations in one-hot encoding, i.e.
-     w0 = 2^i in the loop body below and initialized here with w0 = 1
-     It is used for both the comparison in step 4 of [Dus] and the
-     addition in step 6 of [Dus] */
-  bn.xor    w0, w0, w0
-  bn.addi   w0, w0, 1
-
-  /* according to [Dus] the result variable y is initialized with 1 */
-  /* w29 = y_0 = 1 */
-  bn.mov    w29, w0
-
-  /* iterate over all 256 bits of m0.
-     i refers to the loop cycle 0..255 in the loop body below. */
-  loopi     256, 13
-
-    /* y_i <= m*y_{i-1] */
-    bn.mulqacc.z          w28.0, w29.0,  0
-    bn.mulqacc            w28.1, w29.0, 64
-    bn.mulqacc.so   w1.L, w28.0, w29.1, 64
-    bn.mulqacc            w28.2, w29.0,  0
-    bn.mulqacc            w28.1, w29.1,  0
-    bn.mulqacc            w28.0, w29.2,  0
-    bn.mulqacc            w28.3, w29.0, 64
-    bn.mulqacc            w28.2, w29.1, 64
-    bn.mulqacc            w28.1, w29.2, 64
-    bn.mulqacc.so   w1.U, w28.0, w29.3, 64
-
-  /* This checks if w1 = y_i = m0*y_(i-1) < 2^(i-1) mod 2^i
-     Due to the mathematical properties it can be shown that y_i at this point,
-     is either 1 or (10..0..01)_(i). Therefore, just probing the i_th bit is
-     the same as the full compare. */
-    bn.and    w1, w1, w0
-
-    /* Compute
-       y_i=w29 <= w1=m0*y_(i-1) < 2^(i-1) mod 2^i y_i ? : y_{i-1}+2^i : y_{i-1}
-       there cannot be overlaps => or'ing is as good as adding */
-    bn.or     w29, w29, w1
-
-    /* double w0 (w0 <= w0 << 1) i.e. w0=2^i */
-    bn.add    w0, w0, w0
-
-  /* finally, compute m0' (negative of inverse)
-     w29 = m0' = -(m0^-1) mod 2^256 = -y_255 = 0 - y_255 = w31 - w29 */
-  bn.sub    w29, w31, w29
-
-    /* Store Montgomery constant in dmem */
-  li       x8, 29
-  bn.sid   x8, 0(x17)
-
-  ret
-
-
-/**
- * Variable time multi-limb bigint compare
- *
- * Compares two bigints (a, b) located in regfile (a) and dmem (b).
- *
- * Flags: When leaving this subroutine, flags of FG1 depend on the comparison
- *        result of the highest unequal limba, or, if all limbs are equal on
- *        those of the lowest limbs.
- *
- * @param[in] x10: constant 3, used as pointer to w3
- * @param[in] x11: constant 2, used as pointer to w2
- * @param[in] x8: rptr_a, pointer to lowest limb of a in regfile
- * @param[in] x9: rptr_a_h, pointer to highest limb of a in regfile
- * @param[in] x17: dptr_b_h, pointer to highest limb of b in dmem
- * @param[out] x3, bit 0: (b > a), equals FG1.C
- * @param[out] x3, bit 3: (a == b), equals FG1.Z
- *
- * clobbered registers: x3, x5, x7, x9, x17, x19, w2, w3
- * clobbered flag groups: FG1
- */
-cmp_dmem_reg_buf:
-
-  addi      x19, x17, 0
-  addi      x7, x9, 0
-
-  cmp_loop:
-
-  /* load limbs from dmem and regfile: w2 <= a[i]; w3 <= b[i] */
-  bn.lid    x10, 0(x19)
-  bn.movr   x11, x7
-
-  /* compare limbs and store comparison result in x3 */
-  bn.cmp    w2, w3, FG1
-  csrrs     x3, FG1, x0
-
-  /* leave loop if lowest limb was reached */
-  beq       x8, x7, cmp_end
-
-  /* reduce limb pointers */
-  addi      x19, x19, -32
-  addi      x7, x7, -1
-
-  /* if limbs were equal (FG1.Z == 1), compare next lower limb */
-  andi      x5, x3, 8
-  bne       x5, x0, cmp_loop
-
-  cmp_end:
-  nop
-  ret
-
-
-/**
-* Compute square of Montgomery modulus
-*
-* Returns RR = R^2 mod M
-*         with M being the Modulus of length 256..4096 bit
-*              R = 2^(256*N), N is the number of limbs per bigint
-*
-* The squared Montgomery modulus (RR) is needed to transform bigints to and
-* from the Montgomery domain.
-*
-* RR is computed in this subroutine by iteratively doubling and reduction.
-*
-* Flags: The states of both FG0 and FG1 depend on intermediate values and are
-*        not usable after return.
-*
-* @param[in]  x16: dptr_n, pointer to first limb of modulus in dmem
-* @param[in]  x18: dptr_rr: dmem pointer to first limb of output buffer for RR
-* @param[in]  x30: N, number of limbs
-* @param[in]  x31: N-1, number of limbs minus 1
-* @param[in]  w31: all-zero
-* @param[out] dmem[x18+N*32:x18]: computed RR
-*
-* clobbered registers: x3, x4, x5, x8, x9, x10, x11, x16, x18, x22, x24
-*                      w0, w2, w3, w4, w5 to w20 depending on N
-* clobbered flag groups: FG0, FG1
-*/
-compute_rr:
-  /* save pointer to modulus x22 <= dptr_m = x16 */
-  addi      x22, x16, 0
-
-  /* x17 = dptr_m + (N-1)*32 points to highest limb of modulus in dmem */
-  slli      x17, x31, 5
-  add       x17, x22, x17
-
-  li        x8, 5
-
-  /* x9 = rptr_buf_h <= rptr_buf + N-1 */
-  add       x9, x31, x8
-
-  /* compute full length of current bigint size in bits
-     N*w = x24 <= N*256 = N*2^8 = x30 << 8 */
-  slli      x24, x30, 8
-
-  /* reg pointers to current limb of buffer and modulus
-  /* x10 = rptr_limb_mod = &w3 */
-  li        x10, 3
-  /* x11 = rptr_limb_buf = &w2 */
-  li        x11, 2
-
-
-  /* clear flags */
-  bn.add    w31, w31, w31
-  /* init buffer with R - m
-     buf = w[5+N-1:5] <= R - m = unsigned(0 - m) */
-
-  loop      x30, 3
-    bn.lid    x10, 0(x16++)
-    bn.subb   w3, w31, w3
-    bn.movr   x8++, x10
-
-  /* Compute R^2 mod M = R*2^(N*w) mod M.
-     R^2 mod M can be computed by performing N*w duplications of R,
-     interleaved with conditional subtractions of modulus. Modulus is
-     subtracted if dobiling result is greater than modulus, i.e. either
-     there was a final carry at the end of the doubling procedure or the lower
-     N*w bits of the result are greater than the modulus. */
-  loop      x24, 27
-
-    /* Duplicate the intermediate bigint result. This can overflow such that
-       bit 2^(N*w) (represented by the carry flag after final loop cycle)
-       is set. */
-    li        x8, 5
-    bn.add    w31, w31, w31, FG1
-    loop      x30, 3
-      bn.movr   x11, x8
-      bn.addc   w2, w2, w2, FG1
-      bn.movr   x8++, x11
-
-    /* In case of final carry in doubling procedure substract modulus */
-    /* Jump to 'rr_sub' if FG1.C == 1 */
-    csrrs     x3, FG1, x0
-    andi      x3, x3, 1
-    bne       x3, x0, rr_sub
-
-    /* In case there was no final carry in the addition, we have to check
-       wether the N*w sized bigint w/o carry is greater than the modulus. */
-    bn.lid    x10, 0(x17)
-    bn.movr   x11, x9
-    bn.cmp    w2, w3, FG1
-    csrrs     x3, FG1, x0
-
-    /* If the highest limbs of buf and mod are equal we have to run a
-       multi-limb comparison. This is very unlikely to happen. If this
-       verification is not used with keys where this situation occurs, the
-       following 3 lines and (if not needed elsewhere) the compare routine
-       can be removed. */
-    andi      x5, x3, 8
-    beq       x5, x0, rr_cmp
-    jal       x1, cmp_dmem_reg_buf
-
-    /* if m > r: jump to end_loop (without subtraction) */
-    rr_cmp:
-    andi      x5, x3, 1
-    bne       x5, x0, rr_end_loop
-
-    /* subtract modulus from current buffer
-       buf = w[5+N-1:5] <= buf - m */
-    rr_sub:
-    li        x8, 5
-    addi      x16, x22, 0
-    bn.add    w31, w31, w31, FG1
-    loop      x30, 4
-      bn.lid    x10, 0(x16++)
-      bn.movr   x11, x8
-      bn.subb   w3, w2, w3, FG1
-      bn.movr   x8++, x10
-
-    rr_end_loop:
-      nop
-
-  /* store computed RR in dmem
-     [dmem[dptr_RR+N*32-1]:dmem[dptr_RR]] <= buf = w[5+N-1:5] */
-  li        x8, 5
-  loop      x30, 2
-    bn.sid    x8, 0(x18++)
-    addi      x8, x8, 1
-
-  ret
-
-
-/**
- * Unrolled 512=256x256 bit multiplication.
- *
- * Returns c = a x b.
- *
- * Flags: No flags are set in this subroutine
- *
- * @param[in] w30: a, first operand
- * @param[in] w25: b, second operand
- * @param[out] [w26, w27]: c, result
- *
- * clobbered registers: w26, w27
- * clobbered flag groups: none
- */
-mul256_w30xw25:
-  bn.mulqacc.z          w30.0, w25.0,  0
-  bn.mulqacc            w30.1, w25.0, 64
-  bn.mulqacc.so  w27.L, w30.0, w25.1, 64
-  bn.mulqacc            w30.2, w25.0,  0
-  bn.mulqacc            w30.1, w25.1,  0
-  bn.mulqacc            w30.0, w25.2,  0
-  bn.mulqacc            w30.3, w25.0, 64
-  bn.mulqacc            w30.2, w25.1, 64
-  bn.mulqacc            w30.1, w25.2, 64
-  bn.mulqacc.so  w27.U, w30.0, w25.3, 64
-  bn.mulqacc            w30.3, w25.1,  0
-  bn.mulqacc            w30.2, w25.2,  0
-  bn.mulqacc            w30.1, w25.3,  0
-  bn.mulqacc            w30.3, w25.2, 64
-  bn.mulqacc.so  w26.L, w30.2, w25.3, 64
-  bn.mulqacc.so  w26.U, w30.3, w25.3,  0
-
-  ret
-
-
-/**
- * Unrolled 512=256x256 bit multiplication.
- *
- * Returns c = a x b.
- *
- * Flags: No flags are set in this subroutine
- *
- * @param[in] w30: a, first operand
- * @param[in] w2: b, second operand
- * @param[out] [w26, w27]: c, result
- *
- * clobbered registers: w26, w27
- * clobbered flag groups: none
- */
-mul256_w30xw2:
-  bn.mulqacc.z          w30.0, w2.0,  0
-  bn.mulqacc            w30.1, w2.0, 64
-  bn.mulqacc.so  w27.L, w30.0, w2.1, 64
-  bn.mulqacc            w30.2, w2.0,  0
-  bn.mulqacc            w30.1, w2.1,  0
-  bn.mulqacc            w30.0, w2.2,  0
-  bn.mulqacc            w30.3, w2.0, 64
-  bn.mulqacc            w30.2, w2.1, 64
-  bn.mulqacc            w30.1, w2.2, 64
-  bn.mulqacc.so  w27.U, w30.0, w2.3, 64
-  bn.mulqacc            w30.3, w2.1,  0
-  bn.mulqacc            w30.2, w2.2,  0
-  bn.mulqacc            w30.1, w2.3,  0
-  bn.mulqacc            w30.3, w2.2, 64
-  bn.mulqacc.so  w26.L, w30.2, w2.3, 64
-  bn.mulqacc.so  w26.U, w30.3, w2.3,  0
-
-  ret
-
-
-/**
- * Main loop body for variable-time Montgomery Modular Multiplication
- *
- * Returns: C <= (C + A*b_i + M*m0'*(C[0] + A[0]*b_i))/(2^WLEN) mod R
- *
- * This implements the main loop body for the Montgomery Modular Multiplication
- * as well as the conditional subtraction. See e.g. Handbook of Applied
- * Cryptography (HAC) 14.36 (steps 2.1 and 2.2) and step 3.
- * This subroutine has to be called for every iteration of the loop in step 2
- * of HAC 14.36, i.e. once per limb of operand B (x in HAC notation). The limb
- * is supplied via w2. In the comments below, the index i refers to the
- * i_th call to this subroutine within one full Montgomery Multiplication run.
- * Step 3 of HAC 14.36 is replaced by the approach to perform the conditional
- * subtraction when the intermediate result is larger than R instead of m. See
- * e.g. https://eprint.iacr.org/2017/1057 section 2.4.2 for a justification.
- * This does not omit the conditional subtraction.
- * Variable names of HAC are mapped as follows to the ones used in the
- * this library: x=B, y=A, A=C, b=2^WLEN, m=M, R=R, m' = m0', n=N.
- *
- * Flags: The states of both FG0 and FG1 depend on intermediate values and are
- *        not usable after return.
- *
- * @param[in]  x16: dmem pointer to first limb of modulus M
- * @param[in]  x19: dmem pointer to first limb operand A
- * @param[in]  x31: N-1, number of limbs minus one
- * @param[in]  w2:  current limb of operand B, b_i
- * @param[in]  w3:  Montgomery constant m0'
- * @param[in]  w31: all-zero
- * @param[in]  [w[4+N-1]:w4] intermediate result A
- * @param[out] [w[4+N-1]:w4] intermediate result A
- *
- * clobbered registers: x8, x10, x12, x13, x16, x19
- *                      w24, w25, w26, w27, w28, w29, w30, w4 to w[4+N-1]
- * clobbered Flag Groups: FG0, FG1
- */
-mont_loop:
-  /* save pointer to modulus */
-  addi      x22, x16, 0
-
-  /* pointers to temp. wregs */
-  li        x12, 30
-  li        x13, 24
-
-  /* buffer read pointer */
-  li         x8,  4
-
-  /* buffer write pointer */
-  li        x10,  4
-
-  /* load 1st limb of input y (operand a): w30 = y[0] */
-  bn.lid    x12, 0(x19++)
-
-  /* This is x_i*y_0 in step 2.1 of HAC 14.36 */
-  /* [w26, w27] = w30*w2 = y[0]*x_i */
-  jal x1,   mul256_w30xw2
-
-  /* w24 = w4 = A[0] */
-  bn.movr   x13, x8++
-
-  /* add A[0]: [w29, w30] = [w26, w27] + w24 = y[0]*x_i + A[0] */
-  bn.add    w30, w27, w24
-
-  /* this serves as c_xy in the first cycle of the loop below */
-  bn.addc   w29, w26, w31
-
-  /* w25 = w3 = m0' */
-  bn.mov    w25, w3
-
-  /* multiply by m0', this concludes Step 2.1 of HAC 14.36 */
-  /* [_, u_i] = [w26, w27] = w30*w25 = (y[0]*x_i + A[0])*m0'*/
-  jal       x1, mul256_w30xw25
-
-
-  /* With the computation of u_i, the compuations for a cycle 0 for the loop
-     below are already partly done. The following instructions (until the
-     start of the loop) implement the remaining steps, such that cylce 0 can be
-     omitted in the loop */
-
-  /* [_, u_i] = [w28, w25] = [w26, w27]  */
-  bn.mov    w25, w27
-  bn.mov    w28, w26
-
-  /* w24 = w30 =  y[0]*x_i + A[0] mod b */
-  bn.mov    w24, w30
-
-  /* load first limb of modulus: w30 = m[0] */
-  bn.lid    x12, 0(x16++)
-
-  /* [w26, w27] = w30*w25 = m[0]*u_i*/
-  jal x1,   mul256_w30xw25
-
-  /* [w28, w27] = [w26, w27] + w24 = m[0]*u_i + (y[0]*x_i + A[0] mod b) */
-  bn.add    w27, w27, w24
-  /* this serves as c_m in the first cycle of the loop below */
-  bn.addc   w28, w26, w31
-
-
-  /* This loop implements step 2.2 of HAC 14.36 with a word-by-word approach.
-     The loop body is subdivided into two steps. Each step performs one
-     multiplication and subsequently adds two WLEN sized words to the
-     2WLEN-sized result, such that there are no overflows at the end of each
-     step-
-     Two carry words are required between the cycles. Those are c_xy and c_m.
-     Assume that the variable j runs from 1 to N-1 in the explanations below.
-     A cycle 0 is omitted, since the results from the computations above are
-     re-used */
-  loop      x31, 14
-    /* Step 1: First multiplication takes a limb of each of the operands and
-       computes the product. The carry word from the previous cycle c_xy and
-       the j_th limb of the buffer A, A[j] arre added to the multiplication
-       result.
-
-    /* load limb of y (operand a) and mult. with x_i: [w26, w27] <= y[j]*x_i */
-    bn.lid    x12, 0(x19++)
-    jal       x1, mul256_w30xw2
-    /* add limb of buffer: [w26, w27] <= [w26,w27] + w24 = y[j]*x_i + A[j] */
-    bn.movr   x13, x8++
-    bn.add    w27, w27, w24
-    bn.addc   w26, w26, w31
-    /* add carry word from previous cycle:
-       [c_xy, a_tmp] = [w29, w24] <= [w26,w27] + w29 = y[j]*x_i + A[j] + c_xy*/
-    bn.add    w24, w27, w29
-    bn.addc   w29, w26, w31
-
-
-    /* Step 2:  Second multiplication computes the product of a limb m[j] of
-       the modulus with u_i. The 2nd carry word from the previous loop cycle
-       c_m and the lower word a_tmp of the result of Step 1 are added. */
-
-    /* load limb m[j] of modulus and multiply with u_i:
-       [w26, w27] = w30*w25 = m[j+1]*u_i */
-    bn.lid    x12, 0(x16++)
-    jal       x1, mul256_w30xw25
-    /* add result from first step
-       [w26, w27] <= [w26,w27] + w24 = m[j+1]*u_i + a_tmp */
-    bn.add    w27, w27, w24
-    bn.addc   w26, w26, w31
-    /* [c_m, A[j]] = [w28, w24] = m[j+1]*u_i + a_tmp + c_m */
-    bn.add    w24, w27, w28, FG1
-    /* store at w[4+j] = A[j-1]
-       This includes the reduction by 2^WLEN = 2^b in step 2.2 of HAC 14.36 */
-    bn.movr   x10++, x13
-    bn.addc   w28, w26, w31, FG1
-
-
-  /* Most significant limb of A is sum of the carry words of last loop cycle
-     A[N-1] = w24 <= w29 + w28 = c_xy + c_m */
-  bn.addc   w24, w29, w28, FG1
-  bn.movr   x10++, x13
-
-  /* No subtracion if carry bit of addition of carry words not set. */
-  csrrs     x2, FG1, x0
-  andi      x2, x2, 1
-  beq       x2, x0, mont_loop_no_sub
-
-  /* limb-wise subtraction */
-  li        x12, 30
-  li        x13, 24
-  addi      x16, x22, 0
-  li        x8, 4
-  loop      x30, 4
-    bn.lid    x13, 0(x16++)
-    bn.movr   x12, x8
-    bn.subb   w24, w30, w24
-    bn.movr   x8++, x13
-
-
-  mont_loop_no_sub:
-
-  /* restore pointers */
-  li        x8, 4
-  li        x10, 4
-
-  ret
-
-
-/**
- * Variable-time Montgomery Modular Multiplication
- *
- * Returns: C = montmul(A,B) = A*B*R^(-1) mod M
- *
- * This implements the limb-by-limb interleadved Montgomory Modular
- * Multiplication Algorithm. This is only a wrapper around the main loop body.
- * For algorithmic implementation details see the mont_loop subroutine.
- *
- * Flags: The states of both FG0 and FG1 depend on intermediate values and are
- *        not usable after return.
- *
- * @param[in]  x16: dptr_M, dmem pointer to first limb of modulus M
- * @param[in]  x17: dptr_m0d, dmem pointer to Montgomery Constant m0'
- * @param[in]  x19: dptr_a, dmem pointer to first limb of operand A
- * @param[in]  x20: dptr_b, dmem pointer to first limb of operand B
- * @param[in]  w31: all-zero
- * @param[in]  x30: N, number of limbs
- * @param[in]  x31: N-1, number of limbs minus one
- * @param[in]  x9: pointer to temp reg, must be set to 3
- * @param[in]  x10: pointer to temp reg, must be set to 4
- * @param[in]  x11: pointer to temp reg, must be set to 2
- * @param[out] [w[4+N-1]:w4]: result C
- *
- * clobbered registers: x5, x6, x7, x8, x10, x12, x13, x17, x19, x20, x21
- *                      w2, w3, w24 to w30, w4 to w[4+N-1]
- * clobbered Flag Groups: FG0, FG1
- */
-montmul:
-  /* load Montgomery constant: w3 = dmem[x17] = dmem[dptr_m0d] = m0' */
-  bn.lid    x9, 0(x17)
-
-  /* init regfile bigint buffer with zeros */
-  bn.mov    w2, w31
-  loop      x30, 1
-    bn.movr   x10++, x11
-
-  /* iterate over limbs of operand B */
-  loop      x30, 8
-
-    /* load limb of operand b */
-    bn.lid    x11, 0(x20++)
-
-    /* save some regs */
-    addi      x6, x16, 0
-    addi      x7, x19, 0
-
-    /* Main loop body of Montgomory Multiplication algorithm */
-    jal       x1, mont_loop
-
-    /* restore regs */
-    addi      x16, x6, 0
-    addi      x19, x7, 0
-
-  /* restore pointers */
-  li        x8, 4
-  li        x10, 4
-
-  ret
-
-
-/**
- * Variable time modular exponentiation with exponent of the form e=2^e'+1
- *
- * Returns: C = modexp(A,2^e'+1) = A^(2^e'+1) mod M
- *
- * This implements the square and multiply algorithm for exponents of the
- * form e=2^e'+1. Thus, the routine can be used for exponentiation with Fermat
- * primes (by setting e'=16 for e=F4=65537 and e'=1 for e=F0=3).
- *
- * The squared Montgomery modulus RR and the Montgomery constant m0' have to
- * be precomputed and provided at the appropriate locations in dmem.
- *
- * Flags: The states of both FG0 and FG1 depend on intermediate values and are
- *        not usable after return.
- *
- * The base bignum A is expected in the input buffer, the result C is written
- * to the output buffer. Note, that the content of the input buffer is
- * modified during execution.
- *
- * @param[in]  dmem[0] e': number for exponent derivation (e = 2^e+1)
- * @param[in]  dmem[4] N: Number of limbs per bignum
- * @param[in]  dmem[8] dptr_m0inv: pointer to m0' in dmem
- * @param[in]  dmem[12] dptr_rr: pointer to RR in dmem
- * @param[in]  dmem[16] dptr_m: pointer to first limb of modulus M in dmem
- * @param[in]  dmem[20] dptr_sig: pointer to signature in dmem
- * @param[in]  dmem[28] dptr_out: pointer to recovered message
- *
- * clobbered registers: x2, x5 to x13, x16 to x21, x29, x30, x31
-                        w2, w3, w24 to w31, w4 to w[4+N-1]
- * clobbered Flag Groups: FG0, FG1
- */
-modexp_var:
-  /* prepare all-zero reg */
-  bn.xor    w31, w31, w31
-
-  /* load number of limbs (x30 <= N; x31 = N-1 <= N1) */
-  lw        x30, 4(x0)
-  addi      x31, x30, -1
-
-  /* load pointer to modulus (x16 <= dptr_m) */
-  lw        x16, 16(x0)
-
-  /* load pointer to m0' (x17 <= dptr_m0inv)*/
-  lw        x17, 8(x0)
-
-  /* load pointer to RR (x18 <= dptr_rr) */
-  lw        x18, 12(x0)
-
-  /* load exponent (x29 <= e') */
-  lw        x29, 0(x0)
-
-  /* Compute Montgomery constants and reload clobbered pointers */
-  jal       x1, compute_m0inv
-  jal       x1, compute_rr
-  lw        x16, 16(x0)
-  lw        x17, 8(x0)
-  lw        x18, 12(x0)
-
-  /* prepare pointers to temp regs */
-  li         x8, 4
-  li         x9, 3
-  li        x10, 4
-  li        x11, 2
-
-  /* convert signature to Montgomery domain
-     out_buf = *x28 = *dmem[28]
-         <= montmul(*x19, *x20) = montmul(*dptr_sig, *dptr_rr) = sig*R mod M */
-  lw        x19, 20(x0)
-  lw        x20, 12(x0)
-  lw        x21, 28(x0)
-  jal       x1, montmul
-  /* store result in dmem starting at dmem[dptr_out] */
-  loop      x30, 2
-    bn.sid    x8, 0(x21++)
-    addi      x8, x8, 1
-
-  /* 16 consecutive Montgomery squares on the outbut buffer, i.e. after loop:
-     out_buf <= out_buf^65536*R mod M */
-  loop      x29, 8
-    /* out_buf  = *x28 = *dmem[28]
-               <= montmul(*x28, *x20) = montmul(*dptr_out, *dptr_out)
-                = out_buf^2*R mod M */
-    lw        x19, 28(x0)
-    lw        x20, 28(x0)
-    lw        x21, 28(x0)
-    jal       x1, montmul
-    /* Store result in dmem starting at dmem[dptr_out] */
-    loop      x30, 2
-      bn.sid    x8, 0(x21++)
-      addi      x8, x8, 1
-    nop
-
-  /* final multiplication and conversion of result from Montgomery domain
-     out_buf  = *x28 = *dmem[28]
-             <= montmul(*x28, *x20) = montmul(*dptr_sig, *dptr_out)
-              = out_buf*sig/R mod M = sig^65537 mod M */
-  lw        x19, 20(x0)
-  lw        x20, 28(x0)
-  lw        x21, 28(x0)
-  jal       x1, montmul
-
-  /* Final conditional subtraction of modulus if mod >= out_buf. This could
-     be done in variable time, but for the sake of reduced code we use a loop
-     with N cycles. */
-  bn.add    w31, w31, w31
-  li        x17, 16
-  loop      x30, 4
-    bn.movr   x11, x8++
-    bn.lid    x9, 0(x16++)
-    bn.subb   w2, w2, w3
-    bn.movr   x17++, x11
-  csrrs     x2, FG0, x0
-  /* TODO: currently we subtract the modulus if out_buf == M. This should
-            never happen in an RSA context. We could catch this and raise an
-            alert. */
-  andi      x2, x2, 1
-  li        x8, 4
-  bne       x2, x0, no_sub
-  li        x8, 16
-  no_sub:
-
-   /* store result in dmem starting at dmem[dptr_out] */
-  lw        x21, 28(x0)
-  loop      x30, 2
-    bn.sid    x8, 0(x21++)
-    addi      x8, x8, 1
-
-  ret
diff --git a/sw/otbn/crypto/rsa_verify_3072_m0inv.s b/sw/otbn/crypto/rsa_verify_3072_m0inv.s
deleted file mode 100644
index 60e02e1341d1f..0000000000000
--- a/sw/otbn/crypto/rsa_verify_3072_m0inv.s
+++ /dev/null
@@ -1,185 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/* The interface for this file can be accessed through the following symbols.
- * All of them are declared weak in this file, so can be overridden by code
- * that links against this object:
- *
- *   in_mod:   INPUT
- *             384 bytes
- *             The modulus
- *
- *   m0inv:    OUTPUT
- *             384 bytes
- *             The Montgomery constant
- */
-
-.text
-
-/**
- * Computes least significant 256 bits of a 256x256 bit product.
- *
- * Returns c = (a x b) mod (2^256).
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in] w2: a, first operand
- * @param[in] w5: b, second operand
- * @param[out] w27: c, result
- *
- * clobbered registers: w27
- * clobbered flag groups: FG0
- */
-mul256_low_w2xw5:
-  bn.mulqacc.z          w2.0, w5.0,  0
-  bn.mulqacc            w2.1, w5.0, 64
-  bn.mulqacc.so  w27.L, w2.0, w5.1, 64
-  bn.mulqacc            w2.2, w5.0,  0
-  bn.mulqacc            w2.1, w5.1,  0
-  bn.mulqacc            w2.0, w5.2,  0
-  bn.mulqacc            w2.3, w5.0, 64
-  bn.mulqacc            w2.2, w5.1, 64
-  bn.mulqacc            w2.1, w5.2, 64
-  bn.mulqacc.so  w27.U, w2.0, w5.3, 64
-
-  ret
-
-/**
- * Checks whether two wide registers have equal values.
- *
- *   Returns c = 1 if a = b, 0 otherwise.
- *
- * This routine runs in constant time.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  w6: a, first operand
- * @param[in]  w27: b, second operand
- * @param[out] x4: c, result
- *
- * clobbered registers: x3, x4
- * clobbered Flag Groups: FG0
- *
- */
-check_eq_w6w27:
-    /* Check if b < a. */
-    bn.cmp    w27, w6
-
-    /* Get value from flag register.
-         x3 <= (b < a) */
-    csrrs     x3, FG0, x0
-    andi      x3, x3, 1
-
-    /* Check if a < b. */
-    bn.cmp    w6, w27
-
-    /* Get value from flag register.
-         x4 <= (a < b) */
-    csrrs     x4, FG0, x0
-    andi      x4, x4, 1
-
-    /* If b < a or a < b, then a != b; otherwise a = b.
-         x4 <= !(b < a | a < b) = (a == b)*/
-    or        x4, x4, x3
-    xori      x4, x4, 1
-
-    ret
-
-/**
- * Computes the m0_inv Montgomery constant and stores it in DMEM.
- *
- *   Returns m0_inv = (- M') mod (2^256)
- *                    where M' is the modular multiplicative inverse of M.
- *
- * This implementation is based on ALgorithm 3 of "Montgomery Arithmetic from a
- * Software Perspective" (https://eprint.iacr.org/2017/1057). For the purposes
- * of RSA 3072, the parameters w and n from the paper are fixed (w=256, n=12).
- *
- * The result is stored in dmem[m0inv]. This routine runs in variable time.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  dmem[in_mod] pointer to first limb of modulus M in dmem
- *
- * clobbered registers: x2 to x4, x9, x16, x26, w2 to w6, w27, w31
- * clobbered Flag Groups: FG0
- */
- .globl compute_m0_inv
-compute_m0_inv:
-  /* Prepare all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* y = w2 <= 1 */
-  bn.addi   w2, w31, 1
-
-  /* i = x2 <= 1 */
-  addi   x2, x0, 1
-
-  /* pow2i = w3 <= 2^i = 2 */
-  bn.addi   w3, w31, 2
-
-  /* maski = w4 <= 2^(i+1) - 1 = 3 */
-  bn.addi   w4, w31, 3
-
-  /* w5 <= M[0] = M mod (2^256) */
-  li        x3, 5
-  la        x16, in_mod
-  bn.lid    x3, 0(x16)
-
-  /* w6 <= 1 */
-  bn.addi   w6, w31, 1
-
-  /**
-   * Main loop from i=1 to i=255.
-   *
-   * Invariants:
-   *   x2 = i
-   *   w2 = y
-   *   w3 = 2^i (powi)
-   *   w4 = 2^(i+1)-1 (maski)
-   *   w5 = M[0] (constant)
-   *   w6 = 1    (constant)
-   *   y < 2^i
-   */
-  loopi 255, 8
-    /* w27 <= (w2 * w5) mod (2^256)
-            = (y * M[0]) mod (2^256) = (M * y) mod (2^256) */
-    jal       x1, mul256_low_w2xw5
-    /* w27 <= w27 & maski = (M * y) mod (2^(i+1)) */
-    bn.and    w27, w27, w4
-    /* x4 <= 1 if w27 = 1, 0 otherwise */
-    jal       x1, check_eq_w6w27
-    /* skip addition if w27 == 1*/
-    bne       x4, x0, skip_add
-    /* y = w2 <= y + pow2i */
-    bn.add    w2, w2, w3
-    skip_add:
-    /* i = x2 <= i + 1 */
-    addi      x2, x2, 1
-    /* pow2i = w3 <= pow2i * 2 = 2^i */
-    bn.add    w3, w3, w3
-    /* maski = w4 <= maski + pow2i = 2^(i+1) - 1 */
-    bn.add    w4, w4, w3
-
-  /* m0_inv = w2 <= 2^256 - y = (0 - y) mod 2^256  */
-  bn.sub    w2, w31, w2
-
-  /* Store result in dmem[m0inv]. */
-  li        x9, 2
-  la        x26, m0inv
-  bn.sid    x9, 0(x26)
-
-  ret
-
-/* Input buffer for the modulus. */
-.section .bss.in_mod
-.weak in_mod
-in_mod:
-  .zero 384
-
-/* Output buffer for the Montgomery constant. */
-.section .bss.m0inv
-.weak m0inv
-m0inv:
-  .zero 32
diff --git a/sw/otbn/crypto/rsa_verify_3072_rr.s b/sw/otbn/crypto/rsa_verify_3072_rr.s
deleted file mode 100644
index 9bb779ff03f1c..0000000000000
--- a/sw/otbn/crypto/rsa_verify_3072_rr.s
+++ /dev/null
@@ -1,234 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/* The interface for this file can be accessed through the following symbols.
- * All of them are declared weak in this file, so can be overridden by code
- * that links against this object:
- *
- *   in_mod:   INPUT
- *             384 bytes
- *             The modulus
- *
- *   rr:    INPUT
- *             384 bytes
- *             The Montgomery transformation constant R^2 = (2^3072)^2 mod N
- */
-
-.text
-
-/**
- * Subtracts the modulus M from A.
- *
- * Flags: After this subroutine, the C flag is set to 1 if the subtraction
- * underflowed.
- *
- * This routine runs in variable time.
- * @param[in]  x16: dmem pointer to first limb of modulus M
- * @param[in]  [w4:w15]: operand A
- * @param[in]  w31: all-zero
- * @param[out] [w16:w27]: result
- *
- * clobbered registers: x8 to x12, w2, w3, w16 to w27
- * clobbered Flag Groups: FG0
- */
-subtract_modulus_var:
-
-  /* Prepare temporary registers. */
-  li        x8, 4
-  li        x9, 2
-  li        x10, 3
-  li        x11, 16
-
-  /* Copy pointer to modulus. */
-  addi      x12, x16, 0
-
-  /* Clear flags. */
-  bn.add    w31, w31, w31
-
-  /* Subtract M from A. */
-  loopi     12, 4
-    /* w2 <= A[i] */
-    bn.movr   x9, x8++
-    /* w3 <= M[i] */
-    bn.lid    x10, 0(x12++)
-    /* w2 <= w2 - w3 */
-    bn.subb   w2, w2, w3
-    /* out[i] <= w2 */
-    bn.movr   x11++, x9
-
-  ret
-
-/**
- * Doubles a number and reduces modulo M in-place.
- *
- *   Returns: C = (A + A) mod M
- *
- * Requires that A < M < 2^3072. Writes output to the A buffer in DMEM. This
- * routine runs in variable time.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  x16: dmem pointer to first limb of modulus M
- * @param[in]  [w4:w15]: operand A
- * @param[in]  w31: all-zero
- * @param[out] [w4:w15]: result C
- *
- * clobbered registers: x2, x3, x7 to x12, w2 to w27
- * clobbered Flag Groups: FG0
- */
-double_mod_var:
-  /* Save copy of pointer to modulus. */
-  addi      x12, x16, 0
-
-  /* Clear flags. */
-  bn.add    w31, w31, w31
-
-  /* Compute aa=(A + A).
-       [w4:w15] <= (A+A) mod 2^3072 = aa[0:3071]*/
-  li        x9, 2
-  li        x10, 4
-  loopi     12, 3
-    /* w2 <= a[i] */
-    bn.movr   x9, x10
-    /* w2 <= w2 + w2 */
-    bn.addc   w2, w2, w2
-    /* aa[i] <= w2 */
-    bn.movr   x10++, x9
-
-  /* Extract final carry bit from flags register.
-       x2 <= aa[3072] */
-  csrrs     x2, FG0, x0
-  andi      x2, x2, 1
-
-  jal       x1, subtract_modulus_var
-
-  /* Extract final borrow bit from flags register. */
-  csrrs     x3, FG0, x0
-  andi      x3, x3, 1
-
-  /**
-   * Select either aa or aa' based on carry/borrow bits.
-   *
-   * If aa < M, it follows that the carry bit aa[3072] = 0 (since M < 2^3072).
-   * It also follows that the borrow from subtracting M must be 1. In this
-   * case, select aa; otherwise, select aa-M.
-   */
-
-  /* x2 <= (!x2) & x3 */
-  xori      x2, x2, 1
-  and       x2, x2, x3
-
-  /* Select aa if x2 = 0, otherwise aa-M. */
-  bne       x2, x0, sel_aa
-
-  /* Copy subtraction result to w4:w15. */
-  li        x8, 4
-  li        x11, 16
-  loopi     12, 2
-    bn.movr   x8, x11++
-    addi      x8, x8, 1
-
-sel_aa:
-
-  ret
-
-/**
- * Computes the R^2 Montgomery constant and stores it in DMEM.
- *
- *   Returns RR = (2^3072)^2 mod M
- *
- * A note on bounds: This computation assumes that 2^3071 <= M < 2^3072. This
- * agrees with FIPS 186-4 section B.3.1 (page 53), which states that the prime
- * factors of the RSA modulus must be at least sqrt(2)*2^(nlen/2-1) (where nlen
- * is the key length, 3072 in this case).
- *
- * The result is stored in dmem[rr]. This routine runs in variable time.
- *
- * Flags: Flags have no meaning beyond the scope of this subroutine.
- *
- * @param[in]  dmem[in_mod] pointer to first limb of modulus M in dmem
- * @param[in]  dmem[m0inv]  Montgomery constant (-(M^-1) mod 2^256)
- * @param[out] dmem[rr]     Montgomery constant (R^2) mod M
- *
- * clobbered registers: x0 to x3, x6 to x13, x16, x17, x19 to x22, x24,
- *                      w2 to w31
- * clobbered Flag Groups: FG0, FG1
- */
- .globl compute_rr
-compute_rr:
-  /* Prepare all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Set pointers to DMEM buffers. */
-  la        x16, in_mod
-  la        x17, m0inv
-  la        x24, rr
-
-  /* Zero [w4:w15]. */
-  li        x9, 4
-  li        x10, 31
-  loopi     12, 1
-    bn.movr   x9++, x10
-
-  /* w16 <= 1 */
-  bn.addi   w16, w31, 1
-
-  /* [w4:w15] <= [w4:w16] >> 1 = 2^3701 */
-  bn.rshi   w15, w16, w15 >> 1
-
-  /* Compute T = (2^96 * R) mod M = 2^96 (montgomery form).
-     T = [w4:w15] = (2^97 * 2^3071) mod M = (2^96 * R) mod M */
-  loopi     97,2
-    jal x1, double_mod_var
-    nop
-
-  /* Store T in output buffer (in preparation for montmul).
-     dmem[rr] <= [w4:w15] = T */
-  li        x8, 4
-  addi      x21, x24, 0
-  loopi     12, 2
-    bn.sid    x8, 0(x21++)
-    addi      x8, x8, 1
-
-  /* Prepare pointers to temp regs for montmul. */
-  li        x9, 3
-  li        x10, 4
-  li        x11, 2
-
-  /* Prepare a pointer to the w4 register for storing the result. */
-  li        x8, 4
-
-  /* Five montgomery squares to compute RR = (T^(2^5) * R) mod M. */
-  loopi     5,9
-    /* [w4:w15] <= montmul(dmem[rr], dmem[rr]) */
-    addi      x19, x24, 0
-    addi      x20, x24, 0
-    jal       x1, montmul
-    /* Store result: dmem[rr] <= [w4:w15] */
-    addi      x21, x24, 0
-    addi      x22, x8, 0
-    loopi     12, 2
-      bn.sid    x22, 0(x21++)
-      addi      x22, x22, 1
-    nop
-
-  ret
-
-/* Input buffer for the Montgomery constant m0_inv. */
-.section .data.m0inv
-.weak m0inv
-m0inv:
-  .zero 32
-
-/* Input buffer for the modulus. */
-.section .bss.in_mod
-.weak in_mod
-in_mod:
-  .zero 384
-
-/* Output buffer for the Montgomery transformation constant R^2. */
-.section .bss.rr
-.weak rr
-rr:
-  .zero 384
diff --git a/sw/otbn/crypto/run_p256.s b/sw/otbn/crypto/run_p256.s
new file mode 100644
index 0000000000000..c05e95bdaf61b
--- /dev/null
+++ b/sw/otbn/crypto/run_p256.s
@@ -0,0 +1,436 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Entrypoint for P-256 ECDH and ECDSA operations.
+ *
+ * This binary has the following modes of operation:
+ * 1. MODE_KEYGEN: generate a new keypair
+ * 2. MODE_SIGN: generate an ECDSA signature using caller-provided secret key
+ * 3. MODE_VERIFY: verify an ECDSA signature
+ * 4. MODE_ECDH: ECDH key exchange using a caller-provided secret key
+ * 5. MODE_SIDELOAD_KEYGEN: generate a keypair from a sideloaded seed
+ * 6. MODE_SIDELOAD_SIGN: generate an ECDSA signature using sideloaded secret key/seed
+ * 7. MODE_SIDELOAD_ECDH: ECDH key exchange using a secret key from a sideloaded seed
+ */
+
+/**
+ * Mode magic values, generated with
+ * $ ./util/design/sparse-fsm-encode.py -d 6 -m 6 -n 11 \
+ *     --avoid-zero -s 380925547
+ *
+ * Call the same utility with the same arguments and a higher -m to generate
+ * additional value(s) without changing the others or sacrificing mutual HD.
+ *
+ * TODO(#17727): in some places the OTBN assembler support for .equ directives
+ * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
+ * as `li`. If support is added, we could use 32-bit values here instead of
+ * 11-bit.
+ */
+.equ MODE_KEYGEN, 0x5c5
+.equ MODE_SIGN, 0x31b
+.equ MODE_VERIFY, 0x1f8
+.equ MODE_ECDH, 0x6eb
+.equ MODE_SIDELOAD_KEYGEN, 0x275
+.equ MODE_SIDELOAD_SIGN, 0x45e
+.equ MODE_SIDELOAD_ECDH, 0x72c
+
+/**
+ * Make the mode constants visible to Ibex.
+ */
+.globl MODE_KEYGEN
+.globl MODE_SIGN
+.globl MODE_VERIFY
+.globl MODE_ECDH
+.globl MODE_SIDELOAD_KEYGEN
+.globl MODE_SIDELOAD_SIGN
+.globl MODE_SIDELOAD_ECDH
+
+/**
+ * Hardened boolean values.
+ *
+ * Should match the values in `hardened_asm.h`.
+ */
+.equ HARDENED_BOOL_TRUE, 0x739
+.equ HARDENED_BOOL_FALSE, 0x1d4
+
+.section .text.start
+.globl start
+start:
+  /* Read the mode and tail-call the requested operation. */
+  la    x2, mode
+  lw    x2, 0(x2)
+
+  addi  x3, x0, MODE_KEYGEN
+  beq   x2, x3, random_keygen
+
+  addi  x3, x0, MODE_VERIFY
+  beq   x2, x3, ecdsa_verify
+
+  addi  x3, x0, MODE_SIDELOAD_KEYGEN
+  beq   x2, x3, sideload_keygen
+
+  addi  x3, x0, MODE_SIDELOAD_SIGN
+  beq   x2, x3, sideload_ecdsa_sign
+
+  addi  x3, x0, MODE_SIDELOAD_ECDH
+  beq   x2, x3, shared_key_from_seed
+
+  /* Copy the caller-provided secret key shares into scratchpad memory.
+       dmem[d0] <= dmem[d0_io]
+       dmem[d1] <= dmem[d1_io] */
+  la       x13, d0_io
+  la       x14, d0
+  jal      x1, copy_share
+  la       x13, d1_io
+  la       x14, d1
+  jal      x1, copy_share
+
+  addi  x3, x0, MODE_SIGN
+  beq   x2, x3, ecdsa_sign
+
+  addi  x3, x0, MODE_ECDH
+  beq   x2, x3, shared_key
+
+  /* Invalid mode; fail. */
+  unimp
+  unimp
+  unimp
+
+/**
+ * Helper routine to copy secret key shares.
+ *
+ * Copies 64 bytes from the source to destination location in DMEM. The source
+ * and destination may be the same but should not otherwise overlap.
+ *
+ * @param x13: dptr_src, pointer to source DMEM location
+ * @param x14: dptr_dst, pointer to destination DMEM location
+ * @param      dmem[dptr_src..dptr_src+64]: source data
+ * @param[out] dmem[dptr_dst..dptr_dst+64]: copied data
+ *
+ * clobbered registers: x10, w10
+ * clobbered flag groups: none
+ */
+copy_share:
+  /* Randomize the content of w10 to prevent leakage. */
+  bn.wsrr  w10, URND
+
+  /* Copy the secret key shares into Ibex-visible memory. */
+  li       x10, 10
+  bn.lid   x10, 0(x13)
+  bn.sid   x10, 0(x14)
+  bn.lid   x10, 32(x13)
+  bn.sid   x10, 32(x14)
+  ret
+
+
+/**
+ * Generate a fresh, random keypair.
+ *
+ * @param[out] dmem[d0]: First share of secret key.
+ * @param[out] dmem[d1]: Second share of secret key.
+ * @param[out]  dmem[x]: Public key x-coordinate.
+ * @param[out]  dmem[y]: Public key y-coordinate.
+ */
+random_keygen:
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal      x1, p256_generate_random_key
+
+  /* Generate public key d*G.
+       dmem[x] <= (d*G).x
+       dmem[y] <= (d*G).y */
+  jal      x1, p256_base_mult
+
+  /* Copy the secret key shares into Ibex-visible memory.
+       dmem[d0_io] <= dmem[d0]
+       dmem[d1_io] <= dmem[d1] */
+  la       x13, d0
+  la       x14, d0_io
+  jal      x1, copy_share
+  la       x13, d1
+  la       x14, d1_io
+  jal      x1, copy_share
+
+  ecall
+
+/**
+ * Generate a signature.
+ *
+ * @param[in]  dmem[msg]: message to be signed (256 bits)
+ * @param[in]  dmem[r]:   dmem buffer for r component of signature (256 bits)
+ * @param[in]  dmem[s]:   dmem buffer for s component of signature (256 bits)
+ * @param[in]  dmem[d0]:  first share of private key d (320 bits)
+ * @param[in]  dmem[d1]:  second share of private key d (320 bits)
+ */
+ecdsa_sign:
+  /* Generate a fresh random scalar for signing.
+       dmem[k0] <= first share of k
+       dmem[k1] <= second share of k */
+  jal      x1, p256_generate_k
+
+  /* Generate the signature. */
+  jal      x1, p256_sign
+
+  ecall
+
+/**
+ * Verify a signature.
+ *
+ * The result of the verification is returned in two variables: `ok`
+ * indicates whether the signature passed basic validity checks, and `x_r`
+ * indicates the recovered value. A signature passes verification only if BOTH:
+ * - `ok` is true, and
+ * - `x_r` is equal to the original `r` value.
+ *
+ * If `ok` is false, the value in `x_r` is meaningless; callers
+ * should check both.
+ *
+ * @param[in]  dmem[msg]: message to be verified (256 bits)
+ * @param[in]  dmem[r]:   r component of signature (256 bits)
+ * @param[in]  dmem[s]:   s component of signature (256 bits)
+ * @param[in]  dmem[x]:   affine x-coordinate of public key (256 bits)
+ * @param[in]  dmem[y]:   affine y-coordinate of public key (256 bits)
+ * @param[out] dmem[ok]:  success/failure of basic checks (32 bits)
+ * @param[out] dmem[x_r]: dmem buffer for reduced affine x_r-coordinate (x_1)
+ */
+ecdsa_verify:
+  /* Validate the public key (ends the program on failure). */
+  jal      x1, p256_check_public_key
+
+  /* Verify the signature (compute x_r). */
+  jal      x1, p256_verify
+
+  ecall
+
+/**
+ * Generate a shared key from a secret and public key (ECDH).
+ *
+ * Returns the shared key, which is the affine x-coordinate of (d*Q). The
+ * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
+ * x1).
+ *
+ * If `ok` is false, the public key is invalid and the shared key is
+ * meaningless. The value will be either HARDENED_BOOL_TRUE or
+ * HARDENED_BOOL_FALSE.
+ *
+ * This routine runs in constant time.
+ *
+ * @param[in]       w31: all-zero
+ * @param[in]  dmem[k0]: First share of secret key.
+ * @param[in]  dmem[k1]: Second share of secret key.
+ * @param[in]   dmem[x]: Public key (Q) x-coordinate.
+ * @param[in]   dmem[y]: Public key (Q) y-coordinate.
+ * @param[out] dmem[ok]: Whether the public key is valid.
+ * @param[out]  dmem[x]: x0, first share of shared key.
+ * @param[out]  dmem[y]: x1, second share of shared key.
+ */
+shared_key:
+  /* Validate the public key (ends the program on failure). */
+  jal      x1, p256_check_public_key
+
+  /* If we got here the basic validity checks passed, so set `ok` to true. */
+  la       x2, ok
+  addi     x3, x0, HARDENED_BOOL_TRUE
+  sw       x3, 0(x2)
+
+  /* Generate boolean-masked shared key (d*Q).x.
+       dmem[x] <= x0
+       dmem[y] <= x1 */
+  jal      x1, p256_shared_key
+
+  ecall
+
+/**
+ * Generate a keypair from a sideloaded seed.
+ *
+ * @param[out] dmem[d0]: First share of secret key.
+ * @param[out] dmem[d1]: Second share of secret key.
+ * @param[out]  dmem[x]: Public key x-coordinate.
+ * @param[out]  dmem[y]: Public key y-coordinate.
+ */
+sideload_keygen:
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal   x1, secret_key_from_seed
+
+  /* Generate public key d*G.
+       dmem[x] <= (d*G).x
+       dmem[y] <= (d*G).y */
+  jal      x1, p256_base_mult
+
+  ecall
+
+/**
+ * Generate a signature using a private key from a sideloaded seed.
+ *
+ * @param[in]  dmem[msg]: message to be signed (256 bits)
+ * @param[in]  dmem[r]:   dmem buffer for r component of signature (256 bits)
+ * @param[in]  dmem[s]:   dmem buffer for s component of signature (256 bits)
+ */
+sideload_ecdsa_sign:
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal   x1, secret_key_from_seed
+
+  /* Tail-call signature-generation routine. */
+  jal      x0, ecdsa_sign
+
+/**
+ * Generate a shared key from a keymgr-derived seed.
+ *
+ * Returns the shared key, which is the affine x-coordinate of (d*Q). The
+ * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
+ * x1).
+ *
+ * If `ok` is false, the public key is invalid and the shared key is
+ * meaningless. The value will be either HARDENED_BOOL_TRUE or
+ * HARDENED_BOOL_FALSE.
+ *
+ * This routine runs in constant time.
+ *
+ * @param[in]       w31: all-zero
+ * @param[in]   dmem[x]: Public key (Q) x-coordinate.
+ * @param[in]   dmem[y]: Public key (Q) y-coordinate.
+ * @param[out] dmem[ok]: Whether the public key is valid.
+ * @param[out]  dmem[x]: x0, first share of shared key.
+ * @param[out]  dmem[y]: x1, second share of shared key.
+ */
+shared_key_from_seed:
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal   x1, secret_key_from_seed
+
+  /* Tail-call shared-key generation. */
+  jal      x0, shared_key
+
+/**
+ * Generate a secret key from a keymgr-derived seed.
+ *
+ * @param[out] dmem[d0]: First share of secret key.
+ * @param[out] dmem[d0]: Second share of secret key.
+ */
+secret_key_from_seed:
+  /* Load keymgr seeds from WSRs.
+       w20,w21 <= seed0
+       w10,w11 <= seed1 */
+  bn.wsrr  w20, KEY_S0_L
+  bn.wsrr  w21, KEY_S0_H
+  bn.wsrr  w10, KEY_S1_L
+  bn.wsrr  w11, KEY_S1_H
+
+  /* Init all-zero register. */
+  bn.xor   w31, w31, w31
+
+  /* Generate secret key shares.
+       w20, w21 <= d0
+       w10, w11 <= d1 */
+  jal      x1, p256_key_from_seed
+
+  /* Store secret key shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  li       x2, 20
+  la       x3, d0
+  bn.sid   x2++, 0(x3)
+  bn.sid   x2++, 32(x3)
+  li       x2, 10
+  la       x3, d1
+  bn.sid   x2++, 0(x3)
+  bn.sid   x2, 32(x3)
+
+  ret
+
+.bss
+
+/* Operation mode. */
+.globl mode
+.balign 4
+mode:
+  .zero 4
+
+/* Success code for basic validity checks on the public key and signature. */
+.globl ok
+.balign 4
+ok:
+  .zero 4
+
+/* Message digest. */
+.globl msg
+.balign 32
+msg:
+  .zero 32
+
+/* Signature R. */
+.globl r
+.balign 32
+r:
+  .zero 32
+
+/* Signature S. */
+.globl s
+.balign 32
+s:
+  .zero 32
+
+/* Public key x-coordinate. */
+.globl x
+.balign 32
+x:
+  .zero 32
+
+/* Public key y-coordinate. */
+.globl y
+.balign 32
+y:
+  .zero 32
+
+/* Public key z-coordinate. */
+.globl z
+.balign 32
+z:
+  .zero 32
+
+/* Private key input/output buffer. */
+.globl d0_io
+.balign 32
+d0_io:
+  .zero 64
+.globl d1_io
+.balign 32
+d1_io:
+  .zero 64
+
+/* Verification result x_r (aka x_1). */
+.globl x_r
+.balign 32
+x_r:
+  .zero 32
+
+.section .scratchpad
+
+/* Secret scalar (k) in two shares: k = (k0 + k1) mod n */
+.globl k0
+.balign 32
+k0:
+  .zero 64
+
+.globl k1
+.balign 32
+k1:
+  .zero 64
+
+/* Private key (d) in two shares: d = (d0 + d1) mod n. */
+.globl d0
+.balign 32
+d0:
+  .zero 64
+.globl d1
+.balign 32
+d1:
+  .zero 64
diff --git a/sw/otbn/crypto/run_p384.s b/sw/otbn/crypto/run_p384.s
new file mode 100644
index 0000000000000..84252d2f9ce77
--- /dev/null
+++ b/sw/otbn/crypto/run_p384.s
@@ -0,0 +1,397 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Entrypoint for P-384 ECDH and ECDSA operations.
+ *
+ * This binary has the following modes of operation:
+ * 1. MODE_KEYGEN: generate a new keypair
+ * 2. MODE_SIGN: generate an ECDSA signature using caller-provided secret key
+ * 3. MODE_VERIFY: verify an ECDSA signature
+ * 4. MODE_ECDH: ECDH key exchange using a caller-provided secret key
+ * 5. MODE_SIDELOAD_KEYGEN: generate a keypair from a sideloaded seed
+ * 6. MODE_SIDELOAD_SIGN: generate an ECDSA signature using sideloaded secret key/seed
+ * 7. MODE_SIDELOAD_ECDH: ECDH key exchange using a secret key from a sideloaded seed
+ */
+
+/**
+ * Mode magic values generated with
+ * $ ./util/design/sparse-fsm-encode.py -d 6 -m 4 -n 11 --avoid-zero -s 1654842154
+ *
+ * Call the same utility with the same arguments and a higher -m to generate
+ * additional value(s) without changing the others or sacrificing mutual HD.
+ *
+ * TODO(#17727): in some places the OTBN assembler support for .equ directives
+ * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
+ * as `li`. If support is added, we could use 32-bit values here instead of
+ * 11-bit.
+ */
+.equ MODE_KEYGEN, 0x0e7
+.equ MODE_SIGN, 0x633
+.equ MODE_VERIFY, 0x54d
+.equ MODE_ECDH, 0x3bd
+.equ MODE_SIDELOAD_KEYGEN, 0x4da
+.equ MODE_SIDELOAD_SIGN, 0x786
+.equ MODE_SIDELOAD_ECDH, 0x36a
+
+/**
+ * Make the mode constants visible to Ibex.
+ */
+.globl MODE_KEYGEN
+.globl MODE_SIGN
+.globl MODE_VERIFY
+.globl MODE_ECDH
+.globl MODE_SIDELOAD_KEYGEN
+.globl MODE_SIDELOAD_SIGN
+.globl MODE_SIDELOAD_ECDH
+
+/**
+ * Hardened boolean values.
+ *
+ * Should match the values in `hardened_asm.h`.
+ */
+.equ HARDENED_BOOL_TRUE, 0x739
+.equ HARDENED_BOOL_FALSE, 0x1d4
+
+.section .text.start
+.globl start
+start:
+  /* Read the mode and tail-call the requested operation. */
+  la    x2, mode
+  lw    x2, 0(x2)
+
+  addi  x3, x0, MODE_KEYGEN
+  beq   x2, x3, keypair_random
+
+  addi  x3, x0, MODE_VERIFY
+  beq   x2, x3, ecdsa_verify
+
+  addi  x3, x0, MODE_SIDELOAD_KEYGEN
+  beq   x2, x3, keypair_from_seed
+
+  addi  x3, x0, MODE_SIDELOAD_SIGN
+  beq   x2, x3, ecdsa_sign_sideloaded
+
+  addi  x3, x0, MODE_SIDELOAD_ECDH
+  beq   x2, x3, shared_key_from_seed
+
+  /* Copy the caller-provided secret key shares into scratchpad memory.
+       dmem[d0] <= dmem[d0_io]
+       dmem[d1] <= dmem[d1_io] */
+  la       x13, d0_io
+  la       x14, d0
+  jal      x1, copy_share
+  la       x13, d1_io
+  la       x14, d1
+  jal      x1, copy_share
+
+  addi  x3, x0, MODE_SIGN
+  beq   x2, x3, ecdsa_sign
+
+  addi  x3, x0, MODE_ECDH
+  beq   x2, x3, shared_key
+
+  /* Invalid mode; fail. */
+  unimp
+  unimp
+  unimp
+
+/**
+ * Helper routine to copy secret key shares.
+ *
+ * Copies 64 bytes from the source to destination location in DMEM. The source
+ * and destination may be the same but should not otherwise overlap.
+ *
+ * @param x13: dptr_src, pointer to source DMEM location
+ * @param x14: dptr_dst, pointer to destination DMEM location
+ * @param      dmem[dptr_src..dptr_src+64]: source data
+ * @param[out] dmem[dptr_dst..dptr_dst+64]: copied data
+ *
+ * clobbered registers: x10, w10, w31
+ * clobbered flag groups: none
+ */
+copy_share:
+  /* Randomize the content of w10 to prevent leakage. */
+  bn.wsrr  w10, URND
+
+  /* Copy the secret key shares into Ibex-visible memory. */
+  li       x10, 10
+  bn.lid   x10, 0(x13)
+  bn.sid   x10, 0(x14)
+  bn.lid   x10, 32(x13)
+  bn.sid   x10, 32(x14)
+
+  /* Write zero to the most significant 256 bits of the share. */
+  li       x10, 31
+  bn.xor   w31, w31, w31
+  bn.sid   x10, 64(x14)
+  ret
+
+/**
+ * Generate a fresh random keypair.
+ *
+ * Returns secret key d in 448-bit shares d0, d1.
+ *
+ * Returns public key Q = d*G in affine coordinates (x, y).
+ *
+ * This routine runs in constant time (except potentially waiting for entropy
+ * from RND).
+ *
+ * @param[in]        w31: all-zero
+ * @param[out]  dmem[d0]: 1st private key share d0
+ * @param[out]  dmem[d1]: 2nd private key share d1
+ * @param[out]   dmem[x]: Public key x-coordinate
+ * @param[out]   dmem[y]: Public key y-coordinate
+ *
+ * clobbered registers: x2, x3, x9 to x13, x18 to x23, x26 to x30, w0 to w30
+ * clobbered flag groups: FG0
+ */
+keypair_random:
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal       x1, p384_generate_random_key
+
+  /* Generate public key d*G.
+       dmem[x] <= (d*G).x
+       dmem[y] <= (d*G).y */
+  jal       x1, p384_base_mult_checked
+
+  /* Copy the secret key shares into Ibex-visible memory.
+       dmem[d0_io] <= dmem[d0]
+       dmem[d1_io] <= dmem[d1] */
+  la       x13, d0
+  la       x14, d0_io
+  jal      x1, copy_share
+  la       x13, d1
+  la       x14, d1_io
+  jal      x1, copy_share
+
+  ecall
+
+/**
+ * P-384 ECDSA signature generation.
+ * Generate the secret scalar k from a random seed.
+ *
+ * @param[in]  dmem[msg]: message to be signed in dmem
+ * @param[in]   dmem[d0]: 1st private key share d0
+ * @param[in]   dmem[d1]: 2nd private key share d1
+ * @param[out]   dmem[r]: r component of signature
+ * @param[out]   dmem[s]: s component of signature
+ */
+ecdsa_sign:
+  /* Generate a fresh random scalar for signing.
+       dmem[k0] <= first share of k
+       dmem[k1] <= second share of k */
+  jal      x1, p384_generate_k
+
+  /* Generate the signature. */
+  jal      x1, p384_sign
+
+  ecall
+
+/**
+ * P-384 ECDSA side-loaded signature generation.
+ *
+ * Generate a signature using a private key from a
+ * sideloaded seed.
+ *
+ * @param[in]  dmem[msg]: message to be signed in dmem
+ * @param[out]   dmem[r]: r component of signature
+ * @param[out]   dmem[s]: s component of signature
+ */
+ecdsa_sign_sideloaded:
+  /* Load keymgr seeds from WSRs.
+       w20,w21 <= seed0
+       w10,w11 <= seed1 */
+  bn.wsrr   w20, KEY_S0_L
+  bn.wsrr   w21, KEY_S0_H
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
+  bn.wsrr   w10, KEY_S1_L
+  bn.wsrr   w11, KEY_S1_H
+
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal       x1, p384_key_from_seed
+
+  /* Tail-call signature-generation routine. */
+  jal       x0, ecdsa_sign
+
+/**
+ * P-384 ECDSA signature verification
+ *
+ * The routine computes the x1 coordinate and places it in dmem. x1 will be
+ * reduced (mod n), however, the final comparison has to be performed on the
+ * host side. The signature is valid if x1 == r.
+ * This routine runs in variable time.
+ *
+ * @param[in]  dmem[msg]: message to be verified
+ * @param[in]    dmem[r]: r part of signature
+ * @param[in]    dmem[s]: s part of signature
+ * @param[in]    dmem[x]: x-coordinate of public key
+ * @param[in]    dmem[y]: y-coordinate of public key
+ * @param[out] dmem[x_r]: x1 coordinate to be compared to rs
+ */
+ecdsa_verify:
+  /* Validate the public key (ends the program on failure). */
+  jal      x1, p384_check_public_key
+
+  /* Verify the signature (compute x1). */
+  jal      x1, p384_verify
+
+  ecall
+
+
+/**
+ * Generate a shared key from a secret and public key.
+ *
+ * Returns the shared key, which is the affine x-coordinate of (d*Q). The
+ * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
+ * x1).
+ *
+ * This routine runs in constant time.
+ *
+ * @param[in]        w31: all-zero
+ * @param[in]   dmem[d0]: 1st private key share d0
+ * @param[in]   dmem[d1]: 2nd private key share d1
+ * @param[in]    dmem[x]: x-coordinate of public key
+ * @param[in]    dmem[y]: y-coordinate of public key
+ * @param[out]   dmem[x]: x0, first share of shared key.
+ * @param[out]   dmem[y]: x1, second share of shared key.
+ *
+ * clobbered registers: x2, x3, x9 to x13, x17 to x21, x26 to x30, w0 to w30
+ * clobbered flag groups: FG0
+ */
+shared_key:
+  /* Validate the public key (ends the program on failure). */
+  jal      x1, p384_check_public_key
+
+  /* If we got here the basic validity checks passed, so set `ok` to true. */
+  la       x2, ok
+  addi     x3, x0, HARDENED_BOOL_TRUE
+  sw       x3, 0(x2)
+
+  /* Generate arithmetically masked shared key d*Q.
+     dmem[x] <= (d*Q).x - m mod p
+     dmem[y] <= m */
+  jal       x1, p384_scalar_mult
+
+  /* Arithmetic-to-boolean conversion*/
+
+  /* load result to WDRs for a2b conversion.
+     [w12,w11] <= dmem[x] = x_m
+     [w19,w18] <= dmem[y] = m */
+  li        x2, 11
+  la        x3, x
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2++, 32(x3)
+  li        x2, 18
+  la        x3, y
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2, 32(x3)
+
+  /* Load domain parameter.
+     [w14,w13] = dmem[p384_p] */
+  li        x2, 13
+  la        x4, p384_p
+  bn.lid    x2++, 0(x4)
+  bn.lid    x2++, 32(x4)
+
+  jal       x1, p384_arithmetic_to_boolean_mod
+
+  /* Store arithmetically masked key to DMEM
+     dmem[x] <= [w21,w20] = x_m' */
+  li        x2, 20
+  la        x3, x
+  bn.sid    x2++, 0(x3)
+  bn.sid    x2++, 32(x3)
+
+  ecall
+
+/**
+ * Generate a fresh random keypair from a sideloaded seed.
+ *
+ * Returns secret key d in 384-bit shares d0, d1.
+ *
+ * Returns public key Q = d*G in affine coordinates (x, y).
+ *
+ * This routine runs in constant time (except potentially waiting for entropy
+ * from RND).
+ *
+ * @param[in]       w31: all-zero
+ * @param[out] dmem[d0]: 1st private key share d0
+ * @param[out] dmem[d1]: 2nd private key share d1
+ * @param[out]  dmem[x]: Public key x-coordinate
+ * @param[out]  dmem[y]: Public key y-coordinate
+ *
+ * clobbered registers: x2, x3, x9 to x13, x18 to x23, x26 to x30, w0 to w30
+ * clobbered flag groups: FG0
+ */
+keypair_from_seed:
+  /* Load keymgr seeds from WSRs.
+       w20,w21 <= seed0
+       w10,w11 <= seed1 */
+  bn.wsrr   w20, KEY_S0_L
+  bn.wsrr   w21, KEY_S0_H
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
+  bn.wsrr   w10, KEY_S1_L
+  bn.wsrr   w11, KEY_S1_H
+
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal       x1, p384_key_from_seed
+
+  /* Generate public key d*G.
+       dmem[x] <= (d*G).x
+       dmem[y] <= (d*G).y */
+  jal       x1, p384_base_mult_checked
+
+  ecall
+
+/**
+ * Generate a shared key from a fresh secret key with sideloaded seed
+ * and a given public key.
+ *
+ * Returns the shared key, which is the affine x-coordinate of (d*Q). The
+ * shared key is expressed in boolean shares x0, x1 such that the key is (x0 ^
+ * x1).
+ * Returns secret key d in 384-bit shares d0, d1.
+ *
+ * This routine runs in constant time.
+ *
+ * @param[in]        w31: all-zero
+ * @param[out]   dmem[x]: x0, first share of shared key.
+ * @param[out]   dmem[y]: x1, second share of shared key.
+ *
+ * clobbered registers: x2, x3, x9 to x13, x18 to x21, x26 to x30, w0 to w30
+ * clobbered flag groups: FG0
+ */
+shared_key_from_seed:
+  /* Load keymgr seeds from WSRs.
+       w20,w21 <= seed0
+       w10,w11 <= seed1 */
+  bn.wsrr   w20, KEY_S0_L
+  bn.wsrr   w21, KEY_S0_H
+
+  /* Dummy instruction to avoid consecutive share access. */
+  bn.xor    w31, w31, w31
+
+  bn.wsrr   w10, KEY_S1_L
+  bn.wsrr   w11, KEY_S1_H
+
+  /* Generate secret key d in shares.
+       dmem[d0] <= d0
+       dmem[d1] <= d1 */
+  jal       x1, p384_key_from_seed
+
+  /* Jump to shared key computation. */
+  jal       x0, shared_key
diff --git a/sw/otbn/crypto/run_rsa.s b/sw/otbn/crypto/run_rsa.s
new file mode 100644
index 0000000000000..3aeae1a09d924
--- /dev/null
+++ b/sw/otbn/crypto/run_rsa.s
@@ -0,0 +1,325 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Embeddable binary that runs RSA encryption/decryption, sign/verify and
+ * key generation for various moduli sizes.
+ */
+
+/**
+ * Mode magic values generated with
+ * $ ./util/design/sparse-fsm-encode.py -d 4 -m 14 -n 11 \
+ *    -s 347912204 --avoid-zero
+ *
+ * Call the same utility with the same arguments and a higher -m to generate
+ * additional value(s) without changing the others or sacrificing mutual HD.
+ *
+ * TODO(#17727): in some places the OTBN assembler support for .equ directives
+ * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
+ * as `li`. If support is added, we could use 32-bit values here instead of
+ * 11-bit.
+ */
+
+# Key generation modes
+
+# Testing only! These key lengths are not supported by the cryptolib.
+.equ MODE_RSA_1024_KEYGEN, 0x528
+# Supported key lengths.
+.equ MODE_RSA_2048_KEYGEN, 0x799
+.equ MODE_RSA_3072_KEYGEN, 0x4e0
+.equ MODE_RSA_4096_KEYGEN, 0x3ca
+
+# Encryption/Signature modes
+
+# Testing only! These key lengths are not supported by the cryptolib.
+.equ MODE_RSA_512_MODEXP,     0x3ad
+.equ MODE_RSA_512_MODEXP_F4,  0x37f
+.equ MODE_RSA_1024_MODEXP,    0x65c
+.equ MODE_RSA_1024_MODEXP_F4, 0x50f
+# Supported key lengths.
+.equ MODE_RSA_2048_MODEXP,    0x582
+.equ MODE_RSA_2048_MODEXP_F4, 0x095
+.equ MODE_RSA_3072_MODEXP,    0x20e
+.equ MODE_RSA_3072_MODEXP_F4, 0x1be
+.equ MODE_RSA_4096_MODEXP,    0x361
+.equ MODE_RSA_4096_MODEXP_F4, 0x3d4
+
+/**
+ * Make the mode constants visible to Ibex.
+ */
+.globl MODE_RSA_1024_KEYGEN
+.globl MODE_RSA_2048_KEYGEN
+.globl MODE_RSA_3072_KEYGEN
+.globl MODE_RSA_4096_KEYGEN
+.globl MODE_RSA_512_MODEXP
+.globl MODE_RSA_512_MODEXP_F4
+.globl MODE_RSA_1024_MODEXP
+.globl MODE_RSA_1024_MODEXP_F4
+.globl MODE_RSA_2048_MODEXP
+.globl MODE_RSA_2048_MODEXP_F4
+.globl MODE_RSA_3072_MODEXP
+.globl MODE_RSA_3072_MODEXP_F4
+.globl MODE_RSA_4096_MODEXP
+.globl MODE_RSA_4096_MODEXP_F4
+
+.section .text.start
+start:
+  /* Init all-zero register. */
+  bn.xor  w31, w31, w31
+
+  /* Read the mode and tail-call the requested operation. */
+  la      x2, mode
+  lw      x2, 0(x2)
+
+  add     x3, x0, MODE_RSA_1024_KEYGEN
+  beq     x2, x3, rsa_1024_keygen
+
+  add     x3, x0, MODE_RSA_2048_KEYGEN
+  beq     x2, x3, rsa_2048_keygen
+
+  add     x3, x0, MODE_RSA_3072_KEYGEN
+  beq     x2, x3, rsa_3072_keygen
+
+  add     x3, x0, MODE_RSA_4096_KEYGEN
+  beq     x2, x3, rsa_4096_keygen
+
+  addi    x3, x0, MODE_RSA_512_MODEXP
+  beq     x2, x3, rsa_512_modexp
+
+  addi    x3, x0, MODE_RSA_512_MODEXP_F4
+  beq     x2, x3, rsa_512_modexp_f4
+
+  addi    x3, x0, MODE_RSA_1024_MODEXP
+  beq     x2, x3, rsa_1024_modexp
+
+  addi    x3, x0, MODE_RSA_1024_MODEXP_F4
+  beq     x2, x3, rsa_1024_modexp_f4
+
+  addi    x3, x0, MODE_RSA_2048_MODEXP
+  beq     x2, x3, rsa_2048_modexp
+
+  addi    x3, x0, MODE_RSA_2048_MODEXP_F4
+  beq     x2, x3, rsa_2048_modexp_f4
+
+  addi    x3, x0, MODE_RSA_3072_MODEXP
+  beq     x2, x3, rsa_3072_modexp
+
+  addi    x3, x0, MODE_RSA_3072_MODEXP_F4
+  beq     x2, x3, rsa_3072_modexp_f4
+
+  addi    x3, x0, MODE_RSA_4096_MODEXP
+  beq     x2, x3, rsa_4096_modexp
+
+  addi    x3, x0, MODE_RSA_4096_MODEXP_F4
+  beq     x2, x3, rsa_4096_modexp_f4
+
+  /* Unsupported mode; fail. */
+  unimp
+  unimp
+  unimp
+
+rsa_1024_keygen:
+  /* Set the number of limbs for the modulus (1024 / 256 = 4). */
+  li      x30, 4
+
+  /* Tail-call keygen. */
+  jal     x0, do_keygen
+
+rsa_2048_keygen:
+  /* Set the number of limbs for the modulus (2048 / 256 = 8). */
+  li      x30, 8
+
+  /* Tail-call keygen. */
+  jal     x0, do_keygen
+
+rsa_3072_keygen:
+  /* Set the number of limbs for the modulus (3072 / 256 = 12). */
+  li      x30, 12
+
+  /* Tail-call keygen. */
+  jal     x0, do_keygen
+
+rsa_4096_keygen:
+  /* Set the number of limbs for the modulus (4096 / 256 = 16). */
+  li      x30, 16
+
+  /* Tail-call keygen. */
+  jal     x0, do_keygen
+
+rsa_512_modexp:
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Set the number of limbs for the modulus (512 / 256 = 2). */
+  li      x30, 2
+
+  /* Tail-call modexp. */
+  jal     x0, do_modexp
+
+rsa_512_modexp_f4:
+  /* Set the number of limbs for the modulus (512 / 256 = 2). */
+  li      x30, 2
+
+  /* Tail-call modexp_f4. */
+  jal     x0, do_modexp_f4
+
+rsa_1024_modexp:
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Set the number of limbs for the modulus (1024 / 256 = 4). */
+  li      x30, 4
+
+  /* Tail-call modexp. */
+  jal     x0, do_modexp
+
+rsa_1024_modexp_f4:
+  /* Set the number of limbs for the modulus (1024 / 256 = 4). */
+  li      x30, 4
+
+  /* Tail-call modexp_f4. */
+  jal     x0, do_modexp_f4
+
+rsa_2048_modexp:
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Set the number of limbs for the modulus (2048 / 256 = 8). */
+  li      x30, 8
+
+  /* Tail-call modexp. */
+  jal     x0, do_modexp
+
+rsa_2048_modexp_f4:
+  /* Set the number of limbs for the modulus (2048 / 256 = 8). */
+  li      x30, 8
+
+  /* Tail-call modexp_f4. */
+  jal     x0, do_modexp_f4
+
+rsa_3072_modexp:
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Set the number of limbs for the modulus (3072 / 256 = 12). */
+  li      x30, 12
+
+  /* Tail-call modexp. */
+  jal     x0, do_modexp
+
+rsa_3072_modexp_f4:
+  /* Set the number of limbs for the modulus (3072 / 256 = 12). */
+  li      x30, 12
+
+  /* Tail-call modexp_f4. */
+  jal     x0, do_modexp_f4
+
+rsa_4096_modexp:
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Set the number of limbs for the modulus (4096 / 256 = 16). */
+  li      x30, 16
+
+  /* Tail-call modexp. */
+  jal     x0, do_modexp
+
+rsa_4096_modexp_f4:
+  /* Set the number of limbs for the modulus (4096 / 256 = 16). */
+  li      x30, 16
+
+  /* Tail-call modexp_f4. */
+  jal     x0, do_modexp_f4
+
+/**
+ * Invoke the RSA key generation algorithm.
+ *
+ * Calls `ecall` when done; should be tail-called by mode-specific routines
+ * after the number of limbs is set.
+ *
+ * @param[in] x30: number of limbs for modulus
+ * @param[out] dmem[n]: n, modulus
+ * @param[out] dmem[d0]: d0, first share of secret exponent
+ * @param[out] dmem[d1]: d1, second share of secret exponent
+ */
+do_keygen:
+  # Save mode indicator in register.
+  la x16, mode
+  lw x28, 0(x16)
+
+  jal x1, rsa_keygen
+
+  # Restore mode indicator in DMEM.
+  la x16, mode
+  sw x28, 0(x16)
+
+  ecall
+
+/**
+ * Precompute constants and call modular exponentiation.
+ *
+ * Calls `ecall` when done; should be tail-called by mode-specific routines
+ * after the number of limbs is set.
+ *
+ * @param[in]          x30: number of limbs for modulus
+ * @param[in]      dmem[n]: n, modulus
+ * @param[in]      dmem[d]: d, exponent
+ * @param[in]  dmem[inout]: a, base for exponentiation
+ * @param[out] dmem[inout]: result, a^d mod n
+ */
+do_modexp:
+  # Save mode indicator in register.
+  la x16, mode
+  lw x28, 0(x16)
+
+  /* Load pointers to modulus and Montgomery constant buffers. */
+  la    x16, rsa_n
+  la    x17, RR
+
+  /* Compute Montgomery constants. */
+  jal      x1, modload
+
+  /* Run exponentiation.
+       dmem[inout] = dmem[inout]^dmem[d] mod dmem[n] */
+  jal      x1, modexp
+
+  # Restore mode indicator in DMEM.
+  la x16, mode
+  sw x28, 0(x16)
+
+  ecall
+
+/**
+ * Precompute constants and call modular exponentiation.
+ *
+ * Calls `ecall` when done; should be tail-called by mode-specific routines
+ * after the number of limbs is set.
+ *
+ * @param[in]          x30: number of limbs for modulus
+ * @param[in]      dmem[n]: n, modulus
+ * @param[in]  dmem[inout]: a, base for exponentiation
+ * @param[out] dmem[inout]: result, a^65537 mod n
+ */
+do_modexp_f4:
+  /* Load pointers to modulus and Montgomery constant buffers. */
+  la    x16, rsa_n
+  la    x17, RR
+
+  /* Compute Montgomery constants. */
+  jal      x1, modload
+
+  /* Run exponentiation.
+       dmem[work_buf] = dmem[inout]^65537 mod dmem[n] */
+  la       x14, inout
+  la       x2, work_buf
+  jal      x1, modexp_65537
+
+  /* Copy final result to the output buffer. */
+  la    x3, work_buf
+  la    x4, inout
+  loop  x30, 2
+    bn.lid x0, 0(x3++)
+    bn.sid x0, 0(x4++)
+
+  ecall
diff --git a/sw/otbn/crypto/run_rsa_key_from_cofactor.s b/sw/otbn/crypto/run_rsa_key_from_cofactor.s
new file mode 100644
index 0000000000000..9aab71abd1334
--- /dev/null
+++ b/sw/otbn/crypto/run_rsa_key_from_cofactor.s
@@ -0,0 +1,91 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * RSA key generation.
+ *
+ * This binary can be called in two different modes:
+ * - `GEN` mode generates a new, random keypair
+ * - `COFACTOR` mode constructs a keypair from n, e, d, and either p or q.
+ *
+ * Both modes support three sizes: RSA-2048, RSA-3072, and RSA-4096.
+ */
+
+/**
+ * Mode magic values generated with
+ * $ ./util/design/sparse-fsm-encode.py -d 6 -m 6 -n 11 \
+ *    --avoid-zero -s 561689407
+ *
+ * Call the same utility with the same arguments and a higher -m to generate
+ * additional value(s) without changing the others or sacrificing mutual HD.
+ *
+ * TODO(#17727): in some places the OTBN assembler support for .equ directives
+ * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
+ * as `li`. If support is added, we could use 32-bit values here instead of
+ * 11-bit.
+ */
+.equ MODE_COFACTOR_RSA_2048, 0x34e
+.equ MODE_COFACTOR_RSA_3072, 0x0db
+.equ MODE_COFACTOR_RSA_4096, 0x794
+
+/**
+ * Make the mode constants visible to Ibex.
+ */
+.globl MODE_COFACTOR_RSA_2048
+.globl MODE_COFACTOR_RSA_3072
+.globl MODE_COFACTOR_RSA_4096
+
+.section .text.start
+start:
+  /* Init all-zero register. */
+  bn.xor  w31, w31, w31
+
+  /* Initialize the second key share to 0.
+     TODO: Remove once hardened keygen has arrived. */
+  la x2, rsa_d1
+  li x3, 31
+  loopi 16, 1
+    bn.sid x3, 0(x2++)
+
+  /* Read the mode and tail-call the requested operation. */
+  la      x2, mode
+  lw      x2, 0(x2)
+
+  addi    x3, x0, MODE_COFACTOR_RSA_2048
+  beq     x2, x3, rsa_key_from_cofactor_2048
+
+  addi    x3, x0, MODE_COFACTOR_RSA_3072
+  beq     x2, x3, rsa_key_from_cofactor_3072
+
+  addi    x3, x0, MODE_COFACTOR_RSA_4096
+  beq     x2, x3, rsa_key_from_cofactor_4096
+
+  /* Unsupported mode; fail. */
+  unimp
+  unimp
+  unimp
+
+rsa_key_from_cofactor_2048:
+  /* Set the number of limbs for the primes (2048 / 2 / 256). */
+  li      x30, 4
+
+  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
+  jal     x1, rsa_key_from_cofactor
+  ecall
+
+rsa_key_from_cofactor_3072:
+  /* Set the number of limbs for the primes (3072 / 2 / 256). */
+  li      x30, 6
+
+  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
+  jal     x1, rsa_key_from_cofactor
+  ecall
+
+rsa_key_from_cofactor_4096:
+  /* Set the number of limbs for the primes (4096 / 2 / 256). */
+  li      x30, 8
+
+  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
+  jal     x1, rsa_key_from_cofactor
+  ecall
diff --git a/sw/otbn/crypto/run_rsa_key_from_cofactor_mem.s b/sw/otbn/crypto/run_rsa_key_from_cofactor_mem.s
new file mode 100644
index 0000000000000..8d26e308f517a
--- /dev/null
+++ b/sw/otbn/crypto/run_rsa_key_from_cofactor_mem.s
@@ -0,0 +1,93 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * DMEM layout for the `run_rsa_keygen` OTBN app.
+ */
+
+.bss
+
+/* RSA modulus n = p*q (up to 4096 bits). */
+.balign 32
+.globl rsa_n
+rsa_n:
+.zero 512
+
+/*
+ * RSA first Boolean share of the private exponent (d) for decryption and
+ * signing, up to 4096 bits.
+ */
+.globl rsa_d0
+.balign 32
+rsa_d0:
+.zero 512
+
+/*
+ * RSA second Boolean share of the private exponent (d) for decryption and
+ * signing, up to 4096 bits.
+ */
+.globl rsa_d1
+.balign 32
+rsa_d1:
+.zero 512
+
+/* Prime cofactor for n for `rsa_key_from_cofactor`; also used as a temporary
+ * work buffer. */
+.balign 32
+.globl rsa_cofactor
+rsa_cofactor:
+.zero 512
+
+/* Montgomery constant R^2 (up to 2048 bits). */
+.balign 32
+.globl mont_rr
+mont_rr:
+.zero 256
+
+/* Operational mode. */
+.globl mode
+.balign 4
+mode:
+.zero 4
+
+.section .scratchpad
+
+/* Extra label marking the start of p || q in memory. The `derive_d` function
+   uses this to get a 512-byte working buffer, which means p and q must be
+   continuous in memory. In addition, `rsa_key_from_cofactor` uses the
+   larger buffer for division and depends on the order of `p` and `q`. */
+.balign 32
+.globl rsa_pq
+rsa_pq:
+
+/* Secret RSA `p` parameter (prime). Up to 2048 bits. */
+.globl rsa_p
+rsa_p:
+.zero 256
+
+/* Secret RSA `q` parameter (prime). Up to 2048 bits. */
+.globl rsa_q
+rsa_q:
+.zero 256
+
+/* Temporary working buffer (4096 bits). */
+.balign 32
+.globl tmp_scratchpad, tmp0, tmp1, tmp2, tmp3, tmp4, tmp5, tmp6, tmp7
+tmp_scratchpad:
+tmp0:
+.zero 64
+tmp1:
+.zero 64
+tmp2:
+.zero 64
+tmp3:
+.zero 64
+tmp4:
+.zero 64
+tmp5:
+.zero 64
+tmp6:
+.zero 64
+tmp7:
+.zero 64
diff --git a/sw/otbn/crypto/run_rsa_keygen.s b/sw/otbn/crypto/run_rsa_keygen.s
deleted file mode 100644
index ba89f49559b03..0000000000000
--- a/sw/otbn/crypto/run_rsa_keygen.s
+++ /dev/null
@@ -1,121 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * RSA key generation.
- *
- * This binary can be called in two different modes:
- * - `GEN` mode generates a new, random keypair
- * - `COFACTOR` mode constructs a keypair from n, e, d, and either p or q.
- *
- * Both modes support three sizes: RSA-2048, RSA-3072, and RSA-4096.
- */
-
-/**
- * Mode magic values generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 6 -n 11 \
- *    --avoid-zero -s 561689407
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_GEN_RSA_2048, 0x137
-.equ MODE_GEN_RSA_3072, 0x4e5
-.equ MODE_GEN_RSA_4096, 0x63a
-.equ MODE_COFACTOR_RSA_2048, 0x34e
-.equ MODE_COFACTOR_RSA_3072, 0x0db
-.equ MODE_COFACTOR_RSA_4096, 0x794
-
-.section .text.start
-start:
-  /* Init all-zero register. */
-  bn.xor  w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la      x2, mode
-  lw      x2, 0(x2)
-
-  addi    x3, x0, MODE_GEN_RSA_2048
-  beq     x2, x3, rsa_keygen_2048
-
-  addi    x3, x0, MODE_GEN_RSA_3072
-  beq     x2, x3, rsa_keygen_3072
-
-  addi    x3, x0, MODE_GEN_RSA_4096
-  beq     x2, x3, rsa_keygen_4096
-
-  addi    x3, x0, MODE_COFACTOR_RSA_2048
-  beq     x2, x3, rsa_key_from_cofactor_2048
-
-  addi    x3, x0, MODE_COFACTOR_RSA_3072
-  beq     x2, x3, rsa_key_from_cofactor_3072
-
-  addi    x3, x0, MODE_COFACTOR_RSA_4096
-  beq     x2, x3, rsa_key_from_cofactor_4096
-
-  /* Unsupported mode; fail. */
-  unimp
-  unimp
-  unimp
-
-rsa_keygen_2048:
-  /* Set the number of limbs for the primes (2048 / 2 / 256). */
-  li      x30, 4
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_keygen
-  ecall
-
-rsa_keygen_3072:
-  /* Set the number of limbs for the primes (3072 / 2 / 256). */
-  li      x30, 6
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_keygen
-  ecall
-
-rsa_keygen_4096:
-  /* Set the number of limbs for the primes (4096 / 2 / 256). */
-  li      x30, 8
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_keygen
-  ecall
-
-rsa_key_from_cofactor_2048:
-  /* Set the number of limbs for the primes (2048 / 2 / 256). */
-  li      x30, 4
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_key_from_cofactor
-  ecall
-
-rsa_key_from_cofactor_3072:
-  /* Set the number of limbs for the primes (3072 / 2 / 256). */
-  li      x30, 6
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_key_from_cofactor
-  ecall
-
-rsa_key_from_cofactor_4096:
-  /* Set the number of limbs for the primes (4096 / 2 / 256). */
-  li      x30, 8
-
-  /* Generate a key (results in dmem[rsa_n] and dmem[rsa_d]). */
-  jal     x1, rsa_key_from_cofactor
-  ecall
-
-.bss
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-.zero 4
diff --git a/sw/otbn/crypto/run_rsa_mem.s b/sw/otbn/crypto/run_rsa_mem.s
new file mode 100644
index 0000000000000..782e6eed741a7
--- /dev/null
+++ b/sw/otbn/crypto/run_rsa_mem.s
@@ -0,0 +1,121 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * DMEM layout for the `run_rsa_modexp` OTBN app.
+ */
+
+.bss
+
+/* RSA modulus (n), up to 4096 bits. */
+.globl rsa_n
+.balign 32
+rsa_n:
+.zero 512
+
+# Enc/Sign: First private exponent share (d) up to 4096 bits.
+# Keygen: Temp storage for rsa_p and second exponent share for primality tests.
+.globl rsa_d0, rsa_p
+.balign 32
+/*----------------+----------+----------*
+ |                |          |          |
+ |      256B      |    d0    |          |
+ |                |          |          |
+ +----------------+----------+    d0    |
+ |                |          |          |
+ |      256B      |  rsa_p   |          |
+ |                |          |          |
+ *----------------+----------+----------*/
+rsa_d0:
+.zero 256
+rsa_p:
+.zero 256
+
+# Enc/Sign: Second private exponent share (d) for signing, up to 4096 bits.
+# Keygen: Temp storage for rsa_q and second exponent share for primality tests.
+.globl rsa_d1, rsa_q
+.balign 32
+/*----------------+----------+----------*
+ |                |          |          |
+ |      256B      |    d1    |          |
+ |                |          |          |
+ +----------------+----------+    d1    |
+ |                |          |          |
+ |      256B      |  rsa_q   |          |
+ |                |          |          |
+ *----------------+----------+----------*/
+rsa_d1:
+.zero 256
+rsa_q:
+.zero 256
+
+# r0, r1, r2 are the primary three 4096-bit computation regision for `modexp`.
+.balign 32
+.globl r0
+.globl inout
+r0:
+inout:
+.zero 512
+
+.globl r1, mode, rsa_g
+.balign 32
+/*----------------+----------+----------*
+ |                |    r1    |          |
+ |      256B      |  (mode)  |          |
+ |                |          |          |
+ +----------------+----------+    r1    |
+ |                |          |          |
+ |      256B      |  rsa_g   |          |
+ |                |          |          |
+ *----------------+----------+----------*/
+r1:
+mode:
+.zero 256
+rsa_g:
+.zero 256
+
+.globl r2, rsa_h
+.balign 32
+/*----------------+----------+----------*
+ |                |          |          |
+ |      256B      |    r2    |          |
+ |                |          |          |
+ +----------------+----------+    r2    |
+ |                |          |          |
+ |      256B      |  rsa_h   |          |
+ |                |          |          |
+ *----------------+----------+----------*/
+r2:
+.zero 256
+rsa_h:
+.zero 256
+
+.section .scratchpad
+
+/* Montgomery constant RR. Filled by `modload`. */
+.balign 32
+.globl RR
+RR:
+.zero 512
+
+/* Scratchpad working buffer. */
+.balign 32
+.globl work_buf, buf0, buf1, buf2, buf3, buf4, buf5, buf6, buf7
+work_buf:
+buf0:
+.zero 64
+buf1:
+.zero 64
+buf2:
+.zero 64
+buf3:
+.zero 64
+buf4:
+.zero 64
+buf5:
+.zero 64
+buf6:
+.zero 64
+buf7:
+.zero 64
diff --git a/sw/otbn/crypto/run_rsa_modexp.s b/sw/otbn/crypto/run_rsa_modexp.s
deleted file mode 100644
index 0880dad3c4b08..0000000000000
--- a/sw/otbn/crypto/run_rsa_modexp.s
+++ /dev/null
@@ -1,237 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Embeddable binary that runs modular exponentiation for RSA.
- *
- * The caller must always supply an RSA modulus `n` and a base `a` for the
- * exponentiation (in practice, `a` is a message or a signature). Using the
- * `mode` parameter, the caller indicates the modulus size and selects either:
- *   (a) `modexp` mode: computes a^d mod n for a caller-provided exponent d
- *   (b) `modexp_f4` mode: computes a^65537 mod n
- *
- * In `modexp_f4` mode, the caller does not need to provide an exponent.
- *
- * The base `a` and exponent `d` (if provided) should be the same size as the
- * modulus; additional bits will be ignored.
- *
- * This binary can be used for either RSA signing or encryption.
- */
-
-/**
- * Mode magic values generated with
- * $ ./util/design/sparse-fsm-encode.py -d 6 -m 6 -n 11 \
- *      -s 544077332 --avoid-zero
-
- *
- * Call the same utility with the same arguments and a higher -m to generate
- * additional value(s) without changing the others or sacrificing mutual HD.
- *
- * TODO(#17727): in some places the OTBN assembler support for .equ directives
- * is lacking, so they cannot be used in bignum instructions or pseudo-ops such
- * as `li`. If support is added, we could use 32-bit values here instead of
- * 11-bit.
- */
-.equ MODE_RSA_2048_MODEXP, 0x76b
-.equ MODE_RSA_2048_MODEXP_F4, 0x565
-.equ MODE_RSA_3072_MODEXP, 0x378
-.equ MODE_RSA_3072_MODEXP_F4, 0x6d1
-.equ MODE_RSA_4096_MODEXP, 0x70b
-.equ MODE_RSA_4096_MODEXP_F4, 0x0ee
-
-.section .text.start
-start:
-  /* Init all-zero register. */
-  bn.xor  w31, w31, w31
-
-  /* Read the mode and tail-call the requested operation. */
-  la      x2, mode
-  lw      x2, 0(x2)
-
-  addi    x3, x0, MODE_RSA_2048_MODEXP
-  beq     x2, x3, rsa_2048_modexp
-
-  addi    x3, x0, MODE_RSA_2048_MODEXP_F4
-  beq     x2, x3, rsa_2048_modexp_f4
-
-  addi    x3, x0, MODE_RSA_3072_MODEXP
-  beq     x2, x3, rsa_3072_modexp
-
-  addi    x3, x0, MODE_RSA_3072_MODEXP_F4
-  beq     x2, x3, rsa_3072_modexp_f4
-
-  addi    x3, x0, MODE_RSA_4096_MODEXP
-  beq     x2, x3, rsa_4096_modexp
-
-  addi    x3, x0, MODE_RSA_4096_MODEXP_F4
-  beq     x2, x3, rsa_4096_modexp_f4
-
-  /* Unsupported mode; fail. */
-  unimp
-  unimp
-  unimp
-
-rsa_2048_modexp:
-  /* Set the number of limbs for the modulus (2048 / 256 = 8). */
-  li      x30, 8
-
-  /* Tail-call modexp. */
-  jal     x0, do_modexp
-
-rsa_2048_modexp_f4:
-  /* Set the number of limbs for the modulus (2048 / 256 = 8). */
-  li      x30, 8
-
-  /* Tail-call modexp_f4. */
-  jal     x0, do_modexp_f4
-
-rsa_3072_modexp:
-  /* Set the number of limbs for the modulus (3072 / 256 = 12). */
-  li      x30, 12
-
-  /* Tail-call modexp. */
-  jal     x0, do_modexp
-
-rsa_3072_modexp_f4:
-  /* Set the number of limbs for the modulus (3072 / 256 = 12). */
-  li      x30, 12
-
-  /* Tail-call modexp_f4. */
-  jal     x0, do_modexp_f4
-
-rsa_4096_modexp:
-  /* Set the number of limbs for the modulus (4096 / 256 = 16). */
-  li      x30, 16
-
-  /* Tail-call modexp. */
-  jal     x0, do_modexp
-
-rsa_4096_modexp_f4:
-  /* Set the number of limbs for the modulus (4096 / 256 = 16). */
-  li      x30, 16
-
-  /* Tail-call modexp_f4. */
-  jal     x0, do_modexp_f4
-
-/**
- * Precompute constants and call modular exponentiation.
- *
- * Calls `ecall` when done; should be tail-called by mode-specific routines
- * after the number of limbs is set.
- *
- * @param[in]          x30: number of limbs for modulus
- * @param[in]      dmem[n]: n, modulus
- * @param[in]      dmem[d]: d, exponent
- * @param[in]  dmem[inout]: a, base for exponentiation
- * @param[out] dmem[inout]: result, a^d mod n
- */
-do_modexp:
-  /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, n
-  la    x17, m0d
-  la    x18, RR
-
-  /* Compute Montgomery constants. */
-  jal      x1, modload
-
-  /* Run exponentiation.
-       dmem[work_buf] = dmem[inout]^dmem[d] mod dmem[n] */
-  la       x14, inout
-  la       x15, d
-  la       x2, work_buf
-  jal      x1, modexp
-
-  /* Copy final result to the output buffer. */
-  la    x3, work_buf
-  la    x4, inout
-  loop  x30, 2
-    bn.lid x0, 0(x3++)
-    bn.sid x0, 0(x4++)
-
-  ecall
-
-/**
- * Precompute constants and call modular exponentiation.
- *
- * Calls `ecall` when done; should be tail-called by mode-specific routines
- * after the number of limbs is set.
- *
- * @param[in]          x30: number of limbs for modulus
- * @param[in]      dmem[n]: n, modulus
- * @param[in]  dmem[inout]: a, base for exponentiation
- * @param[out] dmem[inout]: result, a^65537 mod n
- */
-do_modexp_f4:
-  /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, n
-  la    x17, m0d
-  la    x18, RR
-
-  /* Compute Montgomery constants. */
-  jal      x1, modload
-
-  /* Run exponentiation.
-       dmem[work_buf] = dmem[inout]^65537 mod dmem[n] */
-  la       x14, inout
-  la       x2, work_buf
-  jal      x1, modexp_65537
-
-  /* Copy final result to the output buffer. */
-  la    x3, work_buf
-  la    x4, inout
-  loop  x30, 2
-    bn.lid x0, 0(x3++)
-    bn.sid x0, 0(x4++)
-
-  ecall
-
-.bss
-
-/* Operational mode. */
-.globl mode
-.balign 4
-mode:
-.zero 4
-
-/* RSA modulus (n), up to 4096 bits. */
-.globl n
-.balign 32
-n:
-.zero 512
-
-/* RSA private exponent (d) for signing, up to 4096 bits. */
-.globl d
-.balign 32
-d:
-.zero 512
-
-/**
- * Buffer used for both input and output, up to 4096 bits.
- *
- * - Input: Base for exponentiation (a), e.g. message digest or signature.
- * - Output: Modular exponentiation result.
- */
-.balign 32
-.globl inout
-inout:
-.zero 512
-
-
-/* Montgomery constant m0'. Filled by `modload`. */
-/* Note: m0' could go in scratchpad if there was space. */
-.balign 32
-m0d:
-.zero 32
-
-.section .scratchpad
-
-/* Montgomery constant RR. Filled by `modload`. */
-.balign 32
-RR:
-.zero 512
-
-/* Scratchpad working buffer. */
-.balign 32
-work_buf:
-.zero 512
diff --git a/sw/otbn/crypto/run_rsa_verify_3072.s b/sw/otbn/crypto/run_rsa_verify_3072.s
deleted file mode 100644
index 635c85335c639..0000000000000
--- a/sw/otbn/crypto/run_rsa_verify_3072.s
+++ /dev/null
@@ -1,106 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-.section .text.start
-
-/**
- * Standalone embeddable wrapper for 3072 bit RSA signature verification.
- * Performs either computation of Montgomery constants or modular
- * exponentiation, depending on mode.
- *
- * The only exponent supported is e=65537.
- */
-run_rsa_verify_3072:
-  /* Get the mode input value: x3 <= mode */
-  la       x2, mode
-  lw       x3, 0(x2)
-
-  /* if mode=1, compute constants (ends in ecall) */
-  li       x2, 1
-  beq      x3, x2, compute_constants
-
-  /* if mode=2, run modexp (ends in ecall) */
-  li       x2, 2
-  beq      x3, x2, modexp
-
-  /* Unexpected mode; fail */
-  unimp
-
-/**
- * Compute the two Montgomery constants for the given modulus.
- *
- * @param[in] dmem[in_mod]: Modulus of the RSA public key
- * @param[out] dmem[rr]: Montgomery constant R^2 = (2^3072)^2 mod M
- * @param[out] dmem[m0inv]: Montgomery constant m0_inv = (-(M^-1)) mod 2^256
-*/
-compute_constants:
-  jal       x1, compute_m0_inv
-  jal       x1, compute_rr
-  ecall
-
-/**
- * Run RSA-3072 modular exponentiation with e=65537 (F4 exponent).
- *
- * Computes msg=(sig^65537) mod M, where
- *          M is the public key modulus
- *          sig is the signature
- *
- * The result, msg, is the recovered message digest.
- *
- * @param[in] dmem[in_mod]: Modulus of the RSA public key
- * @param[in] dmem[in_buf]: Signature to check against
- * @param[in] dmem[rr]: Montgomery constant R^2
- * @param[in] dmem[m0inv]: Montgomery constant m0_inv
- * @param[out] dmem[out_buf]: Recovered message digest (msg)
-*/
-modexp:
-  /* Set pointers to buffers. */
-  la        x24, out_buf
-  la        x16, in_mod
-  la        x23, in_buf
-  la        x26, rr
-  la        x17, m0inv
-
-  /* run modular exponentiation */
-  jal      x1, modexp_var_3072_f4
-
-  ecall
-
-.bss
-
-/* Mode (1=constants, 2=modexp) */
-.globl mode
-.balign 4
-mode:
-.zero 4
-
-/* Modulus of RSA-3072 key */
-.globl in_mod
-.balign 32
-in_mod:
-.zero 384
-
-/* Montgomery constant m0' */
-.globl m0inv
-.balign 32
-m0inv:
-.zero 32
-
-/* Squared Mongomery Radix RR = (2^3072)^2 mod N */
-.globl rr
-.balign 32
-rr:
-.zero 384
-
-/* signature */
-.globl in_buf
-.balign 32
-in_buf:
-.zero 384
-
-/* Output buffer. */
-.globl out_buf
-.balign 32
-out_buf:
-.zero 384
diff --git a/sw/otbn/crypto/run_rsa_verify_3072_rr_modexp.s b/sw/otbn/crypto/run_rsa_verify_3072_rr_modexp.s
deleted file mode 100644
index 8c8dd0ba03481..0000000000000
--- a/sw/otbn/crypto/run_rsa_verify_3072_rr_modexp.s
+++ /dev/null
@@ -1,73 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-.section .text.start
-
-/**
- * Standalone embeddable wrapper for 3072 bit RSA signature verification.
- *
- * Computes msg = (sig^65537) mod M, where
- *          sig is the signature
- *          M is the public key modulus
- *
- * Uses the OTBN RSA 3072-bit only modular exponentiation implementation to
- * obtain the message (digest) from an input signature. Assumes that the
- * Montgomery constant m0_inv is provided, but computes the RR constant on the
- * fly.
- *
- * The only exponent supported is e=65537.
- *
- * @param[in] dmem[in_mod]: Modulus of the RSA public key
- * @param[in] dmem[in_buf]: Signature to check against
- * @param[in] dmem[m0inv]: Montgomery constant (-(M^-1)) mod 2^256
- * @param[out] dmem[out_buf]: Recovered message digest
- */
-run_rsa_verify_3072:
-
-  /* Compute R^2 (same for both exponents): dmem[rr] <= R^2 */
-  jal      x1, compute_rr
-
-  /* Set pointers to buffers for modexp. */
-  la        x24, out_buf
-  la        x16, in_mod
-  la        x23, in_buf
-  la        x26, rr
-  la        x17, m0inv
-
-  /* run modular exponentiation */
-  jal      x1, modexp_var_3072_f4
-
-  ecall
-
-.bss
-
-/* Modulus of RSA-3072 key */
-.globl in_mod
-.balign 32
-in_mod:
-.zero 384
-
-/* Montgomery constant m0' */
-.globl m0inv
-.balign 32
-m0inv:
-.zero 32
-
-/* Squared Mongomery Radix RR = (2^3072)^2 mod N */
-.globl rr
-.balign 32
-rr:
-.zero 384
-
-/* signature */
-.globl in_buf
-.balign 32
-in_buf:
-.zero 384
-
-/* Output buffer. */
-.globl out_buf
-.balign 32
-out_buf:
-.zero 384
diff --git a/sw/otbn/crypto/tests/BUILD b/sw/otbn/crypto/tests/BUILD
index 0b27d307c633f..8b8d4117a1eed 100644
--- a/sw/otbn/crypto/tests/BUILD
+++ b/sw/otbn/crypto/tests/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:otbn.bzl", "otbn_consttime_test", "otbn_library", "otbn_sim_test")
+load("//rules:otbn.bzl", "otbn_consttime_test", "otbn_library", "otbn_sim_test", "otbn_sim_test_suite")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -177,7 +177,7 @@ otbn_sim_test(
     srcs = [
         "mul_test.s",
     ],
-    exp = "mul_test.exp",
+    dexp = "mul_test.dexp",
     deps = [
         "//sw/otbn/crypto:mul",
     ],
@@ -201,6 +201,7 @@ otbn_sim_test(
     exp = "p256_base_mult_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -208,7 +209,7 @@ otbn_consttime_test(
     name = "p256_base_mult_consttime",
     subroutine = "p256_base_mult",
     deps = [
-        "//sw/otbn/crypto:p256_ecdsa",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
@@ -216,7 +217,7 @@ otbn_consttime_test(
     name = "p256_isoncurve_consttime",
     subroutine = "p256_isoncurve",
     deps = [
-        "//sw/otbn/crypto:p256_ecdsa",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
@@ -224,7 +225,7 @@ otbn_consttime_test(
     name = "p256_key_from_seed_consttime",
     subroutine = "p256_key_from_seed",
     deps = [
-        "//sw/otbn/crypto:p256_ecdsa",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
@@ -236,6 +237,7 @@ otbn_sim_test(
     exp = "p256_key_from_seed_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -247,6 +249,7 @@ otbn_sim_test(
     exp = "p256_mul_modp_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -254,7 +257,19 @@ otbn_consttime_test(
     name = "p256_proj_add_consttime",
     subroutine = "proj_add",
     deps = [
-        "//sw/otbn/crypto:p256_ecdsa",
+        "//sw/otbn/crypto:run_p256",
+    ],
+)
+
+otbn_sim_test(
+    name = "p256_scalar_reblind_test",
+    srcs = [
+        "p256_scalar_reblind_test.s",
+    ],
+    exp = "p256_scalar_reblind_test.exp",
+    deps = [
+        "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -262,7 +277,7 @@ otbn_consttime_test(
     name = "p256_shared_key_consttime",
     subroutine = "p256_shared_key",
     deps = [
-        "//sw/otbn/crypto:p256_ecdh",
+        "//sw/otbn/crypto:run_p256",
     ],
 )
 
@@ -275,7 +290,7 @@ otbn_consttime_test(
 # otbn_consttime_test(
 #   name = "p256_sign_consttime",
 #   deps = [
-#       "//sw/otbn/crypto:p256_ecdsa"
+#       "//sw/otbn/crypto:run_p256"
 #   ],
 #   subroutine = "p256_sign",
 # )
@@ -288,6 +303,7 @@ otbn_sim_test(
     exp = "p256_ecdsa_sign_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
         "//sw/otbn/crypto:p256_sign",
     ],
 )
@@ -317,6 +333,19 @@ otbn_sim_test(
     ],
 )
 
+otbn_sim_test(
+    name = "p256_isoncurve_proj_test",
+    srcs = [
+        "p256_isoncurve_proj_test.s",
+    ],
+    exp = "p256_isoncurve_proj_test.exp",
+    deps = [
+        "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
+        "//sw/otbn/crypto:p256_isoncurve_proj",
+    ],
+)
+
 otbn_sim_test(
     name = "p256_proj_add_test",
     srcs = [
@@ -325,6 +354,19 @@ otbn_sim_test(
     exp = "p256_proj_add_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
+    ],
+)
+
+otbn_sim_test(
+    name = "p256_proj_double_test",
+    srcs = [
+        "p256_proj_double_test.s",
+    ],
+    exp = "p256_proj_double_test.exp",
+    deps = [
+        "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -336,6 +378,7 @@ otbn_sim_test(
     exp = "p256_scalar_mult_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
     ],
 )
 
@@ -347,6 +390,8 @@ otbn_sim_test(
     exp = "p256_ecdh_shared_key_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
+        "//sw/otbn/crypto:p256_isoncurve_proj",
         "//sw/otbn/crypto:p256_shared_key",
     ],
 )
@@ -359,6 +404,8 @@ otbn_sim_test(
     exp = "p256_arithmetic_to_boolean_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
+        "//sw/otbn/crypto:p256_isoncurve_proj",
         "//sw/otbn/crypto:p256_shared_key",
     ],
 )
@@ -371,20 +418,37 @@ otbn_sim_test(
     exp = "p256_arithmetic_to_boolean_mod_test.exp",
     deps = [
         "//sw/otbn/crypto:p256_base",
+        "//sw/otbn/crypto:p256_isoncurve",
+        "//sw/otbn/crypto:p256_isoncurve_proj",
         "//sw/otbn/crypto:p256_shared_key",
     ],
 )
 
+otbn_sim_test_suite(
+    name = "p256_test",
+    binary = "//sw/otbn/crypto:run_p256",
+    tests = [
+        "p256_check_public_key_not_on_curve.hjson",
+        "p256_check_public_key_valid.hjson",
+        "p256_check_public_key_x_too_large.hjson",
+        "p256_check_public_key_y_too_large.hjson",
+        "p256_isoncurve_valid.hjson",
+        "p256_keygen_valid.hjson",
+    ],
+)
+
 otbn_sim_test(
     name = "p384_base_mult_test",
     srcs = [
         "p384_base_mult_test.s",
     ],
-    exp = "p384_base_mult_test.exp",
+    testcase = "p384_base_mult_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_base_mult",
         "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_mem",
     ],
 )
 
@@ -428,11 +492,14 @@ otbn_sim_test(
     srcs = [
         "p384_ecdh_shared_key_test.s",
     ],
-    exp = "p384_ecdh_shared_key_test.exp",
+    testcase = "p384_ecdh_shared_key_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_a2b",
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_isoncurve_proj",
+        "//sw/otbn/crypto:p384_mem",
         "//sw/otbn/crypto:p384_scalar_mult",
     ],
 )
@@ -442,10 +509,12 @@ otbn_sim_test(
     srcs = [
         "p384_ecdsa_sign_test.s",
     ],
-    exp = "p384_ecdsa_sign_test.exp",
+    testcase = "p384_ecdsa_sign_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_mem",
         "//sw/otbn/crypto:p384_modinv",
         "//sw/otbn/crypto:p384_sign",
     ],
@@ -456,10 +525,11 @@ otbn_sim_test(
     srcs = [
         "p384_ecdsa_verify_test.s",
     ],
-    exp = "p384_ecdsa_verify_test.exp",
+    testcase = "p384_ecdsa_verify_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_mem",
         "//sw/otbn/crypto:p384_modinv",
         "//sw/otbn/crypto:p384_verify",
     ],
@@ -470,10 +540,25 @@ otbn_sim_test(
     srcs = [
         "p384_isoncurve_test.s",
     ],
-    exp = "p384_isoncurve_test.exp",
+    testcase = "p384_isoncurve_test.hjson",
+    deps = [
+        "//sw/otbn/crypto:p384_base",
+        "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_mem",
+    ],
+)
+
+otbn_sim_test(
+    name = "p384_isoncurve_proj_test",
+    srcs = [
+        "p384_isoncurve_proj_test.s",
+    ],
+    testcase = "p384_isoncurve_proj_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_isoncurve_proj",
+        "//sw/otbn/crypto:p384_mem",
     ],
 )
 
@@ -482,10 +567,24 @@ otbn_sim_test(
     srcs = [
         "p384_curve_point_valid_test.s",
     ],
-    exp = "p384_curve_point_valid_test.exp",
+    testcase = "p384_curve_point_valid_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_mem",
+    ],
+)
+
+otbn_sim_test(
+    name = "p384_internal_mult_test",
+    srcs = [
+        "p384_internal_mult_test.s",
+    ],
+    testcase = "p384_internal_mult_test.hjson",
+    deps = [
+        "//sw/otbn/crypto:p384_base",
+        "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_mem",
     ],
 )
 
@@ -498,6 +597,7 @@ otbn_sim_test(
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_keygen",
+        "//sw/otbn/crypto:p384_mem",
     ],
 )
 
@@ -511,6 +611,7 @@ otbn_sim_test(
         "//sw/otbn/crypto:p384_b2a",
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_keygen_from_seed",
+        "//sw/otbn/crypto:p384_mem",
     ],
 )
 
@@ -525,15 +626,28 @@ otbn_sim_test(
     ],
 )
 
+otbn_sim_test(
+    name = "p384_masked_scalar_reblind_test",
+    testcase = "p384_masked_scalar_reblind_test.hjson",
+    deps = [
+        "//sw/otbn/crypto:p384_base",
+        "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_mem",
+    ],
+)
+
 otbn_sim_test(
     name = "p384_scalar_mult_test",
     srcs = [
         "p384_scalar_mult_test.s",
     ],
-    exp = "p384_scalar_mult_test.exp",
+    testcase = "p384_scalar_mult_test.hjson",
     deps = [
         "//sw/otbn/crypto:p384_base",
         "//sw/otbn/crypto:p384_internal_mult",
+        "//sw/otbn/crypto:p384_isoncurve",
+        "//sw/otbn/crypto:p384_isoncurve_proj",
+        "//sw/otbn/crypto:p384_mem",
         "//sw/otbn/crypto:p384_scalar_mult",
     ],
 )
@@ -559,6 +673,9 @@ otbn_consttime_test(
 
 otbn_consttime_test(
     name = "p384_scalar_mult_consttime",
+    ignore = [
+        "trigger_fault_if_fg0_not_z",
+    ],
     subroutine = "p384_scalar_mult",
     deps = [
         ":p384_scalar_mult_test",
@@ -617,122 +734,48 @@ otbn_library(
 )
 
 otbn_sim_test(
-    name = "primality_test",
-    timeout = "long",
-    srcs = [
-        "primality_test.s",
-    ],
-    exp = "primality_test.exp",
-    deps = [
-        "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:primality",
-    ],
-)
-
-otbn_sim_test(
-    name = "primality_test_witness_test",
+    name = "rsa_miller_rabin_test",
     timeout = "long",
     srcs = [
-        "primality_test_witness_test.s",
+        "rsa_miller_rabin_test.s",
     ],
-    exp = "primality_test_witness_test.exp",
+    testcase = "rsa_miller_rabin_test.hjson",
     deps = [
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:primality",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "primality_test_witness_negative_test",
+    name = "rsa_miller_rabin_negative_test",
     timeout = "long",
     srcs = [
-        "primality_test_witness_negative_test.s",
+        "rsa_miller_rabin_negative_test.s",
     ],
-    exp = "primality_test_witness_negative_test.exp",
+    testcase = "rsa_miller_rabin_negative_test.hjson",
     deps = [
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:primality",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "primality_negative_test",
-    timeout = "long",
+    name = "rsa_modinv_f4_test",
     srcs = [
-        "primality_negative_test.s",
+        "rsa_modinv_f4_test.s",
     ],
-    exp = "primality_negative_test.exp",
-    deps = [
-        "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:primality",
-    ],
-)
-
-# Miller-Rabin with 1024-bit primes (as in RSA-2048).
-otbn_consttime_test(
-    name = "miller_rabin_consttime_1024",
-    # 4 limbs, x30 = n and x31 = n -1
-    initial_constants = [
-        "x30:4",
-        "x31:3",
-    ],
-    # All secrets are stored in DMEM; timing is permitted to depend on the
-    # number of limbs.
-    secrets = ["dmem"],
-    subroutine = "miller_rabin",
-    deps = [
-        ":primality_test",
-    ],
-)
-
-# Miller-Rabin with 1536-bit primes (as in RSA-3072).
-otbn_consttime_test(
-    name = "miller_rabin_consttime_1536",
-    # 6 limbs, x30 = n and x31 = n -1
-    initial_constants = [
-        "x30:6",
-        "x31:5",
-    ],
-    # All secrets are stored in DMEM; timing is permitted to depend on the
-    # number of limbs.
-    secrets = ["dmem"],
-    subroutine = "miller_rabin",
-    deps = [
-        ":primality_test",
-    ],
-)
-
-# Miller-Rabin with 2048-bit primes (as in RSA-4096).
-otbn_consttime_test(
-    name = "miller_rabin_consttime_2048",
-    # 8 limbs, x30 = n and x31 = n -1
-    initial_constants = [
-        "x30:8",
-        "x31:7",
-    ],
-    # All secrets are stored in DMEM; timing is permitted to depend on the
-    # number of limbs.
-    secrets = ["dmem"],
-    subroutine = "miller_rabin",
-    deps = [
-        ":primality_test",
-    ],
-)
-
-otbn_sim_test(
-    name = "modinv_f4_test",
-    srcs = [
-        "modinv_f4_test.s",
-    ],
-    exp = "modinv_f4_test.exp",
+    testcase = "rsa_modinv_f4_test.hjson",
     deps = [
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
-        "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
-        "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_modinv_f4",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -747,24 +790,27 @@ otbn_consttime_test(
     secrets = ["dmem"],
     subroutine = "modinv_f4",
     deps = [
-        ":modinv_f4_test",
+        ":rsa_modinv_f4_test",
     ],
 )
 
 otbn_sim_test(
-    name = "relprime_f4_test",
+    name = "rsa_relprime_f4_test",
     srcs = [
-        "relprime_f4_test.s",
+        "rsa_relprime_f4_test.s",
     ],
-    exp = "relprime_f4_test.exp",
+    testcase = "rsa_relprime_f4.hjson",
     deps = [
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
         "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_modinv_f4",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -773,148 +819,102 @@ otbn_consttime_test(
     # All secrets are stored in DMEM; timing is permitted to depend on the
     # number of limbs.
     secrets = ["dmem"],
-    subroutine = "relprime_f4",
-    deps = [
-        ":relprime_f4_test",
-    ],
-)
-
-otbn_library(
-    name = "rsa_keygen_checkpq_test_data",
-    srcs = [
-        "rsa_keygen_checkpq_test_data.s",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_keygen_checkp_good_test",
-    timeout = "long",  # runs a primality test
-    srcs = [
-        "rsa_keygen_checkp_good_test.s",
-    ],
-    exp = "rsa_keygen_checkp_good_test.exp",
-    tags = ["nightly"],  # slow, do not run in CI
+    subroutine = "relprime_f4_test",
     deps = [
-        ":rsa_keygen_checkpq_test_data",
-        "//sw/otbn/crypto:div",
-        "//sw/otbn/crypto:gcd",
-        "//sw/otbn/crypto:lcm",
-        "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
-        "//sw/otbn/crypto:rsa_keygen",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_keygen_checkp_not_relprime_test",
-    srcs = [
-        "rsa_keygen_checkp_not_relprime_test.s",
-    ],
-    exp = "rsa_keygen_checkp_not_relprime_test.exp",
-    deps = [
-        ":fake_primality",
-        ":rsa_keygen_checkpq_test_data",
-        "//sw/otbn/crypto:div",
-        "//sw/otbn/crypto:gcd",
-        "//sw/otbn/crypto:lcm",
-        "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:rsa_keygen",
+        ":rsa_relprime_f4_test",
     ],
 )
 
 otbn_sim_test(
-    name = "rsa_keygen_checkp_not_prime_test",
+    name = "rsa_primality_test",
     timeout = "long",  # runs a primality test
     srcs = [
-        "rsa_keygen_checkp_not_prime_test.s",
+        "rsa_primality_test.s",
     ],
-    exp = "rsa_keygen_checkp_not_prime_test.exp",
+    tags = ["nightly"],  # slow, do not run in CI,
+    testcase = "rsa_primality_test.hjson",
     deps = [
-        ":rsa_keygen_checkpq_test_data",
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
-        "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "rsa_keygen_checkq_good_test",
-    timeout = "long",  # runs a primality test
+    name = "rsa_relprime_f4_negative_test",
     srcs = [
-        "rsa_keygen_checkq_good_test.s",
+        "rsa_relprime_f4_negative_test.s",
     ],
-    exp = "rsa_keygen_checkq_good_test.exp",
-    tags = ["nightly"],  # slow, do not run in CI
+    testcase = "rsa_relprime_f4_negative_test.hjson",
     deps = [
-        ":rsa_keygen_checkpq_test_data",
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
         "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_modinv_f4",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "rsa_keygen_checkq_not_prime_test",
+    name = "rsa_primality_negative_test",
     timeout = "long",  # runs a primality test
     srcs = [
-        "rsa_keygen_checkq_not_prime_test.s",
+        "rsa_primality_negative_test.s",
     ],
-    exp = "rsa_keygen_checkq_not_prime_test.exp",
+    testcase = "rsa_primality_negative_test.hjson",
     deps = [
-        ":rsa_keygen_checkpq_test_data",
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:primality",
-        "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "rsa_keygen_checkq_not_relprime_test",
+    name = "rsa_distance_negative_test",
     srcs = [
-        "rsa_keygen_checkq_not_relprime_test.s",
+        "rsa_distance_negative_test.s",
     ],
-    exp = "rsa_keygen_checkq_not_relprime_test.exp",
+    testcase = "rsa_distance_negative_test.hjson",
     deps = [
-        ":fake_primality",
-        ":rsa_keygen_checkpq_test_data",
         "//sw/otbn/crypto:div",
         "//sw/otbn/crypto:gcd",
         "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
         "//sw/otbn/crypto:mul",
         "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:rsa_modinv_f4",
+        "//sw/otbn/crypto:rsa_primality",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
 otbn_sim_test(
-    name = "rsa_keygen_checkq_too_close_test",
+    name = "rsa_512_dec_test",
+    timeout = "long",
     srcs = [
-        "rsa_keygen_checkq_too_close_test.s",
+        "rsa_512_dec_test.s",
     ],
-    exp = "rsa_keygen_checkq_too_close_test.exp",
+    testcase = "rsa_512_dec_test.hjson",
     deps = [
-        ":fake_primality",
-        ":rsa_keygen_checkpq_test_data",
-        "//sw/otbn/crypto:div",
-        "//sw/otbn/crypto:gcd",
-        "//sw/otbn/crypto:lcm",
+        "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
-        "//sw/otbn/crypto:mul",
-        "//sw/otbn/crypto:rsa_keygen",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -924,10 +924,11 @@ otbn_sim_test(
     srcs = [
         "rsa_1024_dec_test.s",
     ],
-    exp = "rsa_1024_dec_test.exp",
+    testcase = "rsa_1024_dec_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -936,10 +937,11 @@ otbn_sim_test(
     srcs = [
         "rsa_1024_enc_test.s",
     ],
-    exp = "rsa_1024_enc_test.exp",
+    testcase = "rsa_1024_enc_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -949,10 +951,11 @@ otbn_sim_test(
     srcs = [
         "rsa_2048_dec_test.s",
     ],
-    exp = "rsa_2048_dec_test.exp",
+    testcase = "rsa_2048_dec_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -961,10 +964,11 @@ otbn_sim_test(
     srcs = [
         "rsa_2048_enc_test.s",
     ],
-    exp = "rsa_2048_enc_test.exp",
+    testcase = "rsa_2048_enc_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -974,11 +978,12 @@ otbn_sim_test(
     srcs = [
         "rsa_3072_dec_test.s",
     ],
-    exp = "rsa_3072_dec_test.exp",
     tags = ["nightly"],  # slow, do not run in CI
+    testcase = "rsa_3072_dec_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -987,10 +992,11 @@ otbn_sim_test(
     srcs = [
         "rsa_3072_enc_test.s",
     ],
-    exp = "rsa_3072_enc_test.exp",
+    testcase = "rsa_3072_enc_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -999,56 +1005,11 @@ otbn_sim_test(
     srcs = [
         "rsa_4096_enc_test.s",
     ],
-    exp = "rsa_4096_enc_test.exp",
+    testcase = "rsa_4096_enc_test.hjson",
     deps = [
         "//sw/otbn/crypto:modexp",
         "//sw/otbn/crypto:montmul",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_verify_test",
-    srcs = [
-        "rsa_verify_test.s",
-    ],
-    exp = "rsa_verify_test.exp",
-    deps = [
-        "//sw/otbn/crypto:rsa_verify",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_verify_exp3_test",
-    srcs = [
-        "rsa_verify_exp3_test.s",
-    ],
-    exp = "rsa_verify_exp3_test.exp",
-    deps = [
-        "//sw/otbn/crypto:rsa_verify",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_verify_3072_consts_test",
-    srcs = [
-        "rsa_verify_3072_consts_test.s",
-    ],
-    exp = "rsa_verify_3072_consts_test.exp",
-    deps = [
-        "//sw/otbn/crypto:rsa_verify_3072",
-        "//sw/otbn/crypto:rsa_verify_3072_m0inv",
-        "//sw/otbn/crypto:rsa_verify_3072_rr",
-    ],
-)
-
-otbn_sim_test(
-    name = "rsa_verify_3072_test",
-    srcs = [
-        "rsa_verify_3072_test.s",
-    ],
-    exp = "rsa_verify_3072_test.exp",
-    deps = [
-        "//sw/otbn/crypto:rsa_verify_3072",
+        "//sw/otbn/crypto:run_rsa_mem",
     ],
 )
 
@@ -1138,3 +1099,15 @@ otbn_consttime_test(
         ":x25519_test1",
     ],
 )
+
+otbn_sim_test_suite(
+    name = "boot_test",
+    binary = "//sw/otbn/crypto:boot",
+    tests = [
+        "boot_key_endorse_valid.hjson",
+        "boot_key_save_valid.hjson",
+        "boot_keygen_valid.hjson",
+        "boot_mode_invalid.hjson",
+        "boot_sigverify_valid.hjson",
+    ],
+)
diff --git a/sw/otbn/crypto/tests/boot_key_endorse_valid.hjson b/sw/otbn/crypto/tests/boot_key_endorse_valid.hjson
new file mode 100644
index 0000000000000..1a261098791ef
--- /dev/null
+++ b/sw/otbn/crypto/tests/boot_key_endorse_valid.hjson
@@ -0,0 +1,48 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  /**
+   * @param[in]  dmem[msg]: Message digest (256 bits)
+   * @param[in]   dmem[d0]: First share of private key d (320 bits)
+   * @param[in]   dmem[d1]: Second share of private key d (320 bits)
+   * @param[out]   dmem[r]: Buffer for r component of signature (256 bits)
+   * @param[out]   dmem[s]: Buffer for s component of signature (256 bits)
+   */
+
+  "input": {
+    "dmem": {
+      "mode": "0x000005e8"  # MODE_ATTESTATION_ENDORSE
+
+      "msg": "0xbb5a52f42f9c9261ed4361f59422a1e30036e7c32b270c8807a419feca605023"
+      "d0":
+        '''
+          0x000000000000000000000000000000000000000000000000001cc542001cc542
+            001cc542001cc542001cc542001cc542001cc542001cc542001cc542001cc542
+        '''
+      "d1":
+        '''
+          0x000000000000000000000000000000000000000000000000baadf00dbaadf00d
+            baadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00d
+        '''
+    }
+  }
+  "output": {
+    "dmem": {
+      # Verified with:
+      # >>> import ecdsa
+      # >>> import hashlib
+      # >>> r = 0xfb9ccc2407d5f318d0dd995cbf4012e6796898fbc22829c94b691cb0df72e120
+      # >>> s = 0x3eaf474bba511934edb9aaaef0302cc337d6325fba907f26c1e76ba17a4e62a6
+      # >>> msg = b"123400"
+      # >>> x = "5868cc1d58a1ea20ee1cf22393d92a695e69ea89e85cbce80e94f900015ac2c4"
+      # >>> y = "17749c44e6401eda1e71722402d940dceeeee6b7277dac6cbc9a02a44f66aa6f"
+      # >>> p = ecdsa.VerifyingKey.from_string(bytes.fromhex(x + y), curve=ecdsa.NIST256p)
+      # >>> sig = r.to_bytes(32, 'big') + s.to_bytes(32, 'big')
+      # >>> p.verify(sig, msg, hashfunc=hashlib.sha256)
+
+      "r": "0xfb9ccc2407d5f318d0dd995cbf4012e6796898fbc22829c94b691cb0df72e120"
+      "s": "0x3eaf474bba511934edb9aaaef0302cc337d6325fba907f26c1e76ba17a4e62a6"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/boot_key_save_valid.hjson b/sw/otbn/crypto/tests/boot_key_save_valid.hjson
new file mode 100644
index 0000000000000..446757a6f4d4f
--- /dev/null
+++ b/sw/otbn/crypto/tests/boot_key_save_valid.hjson
@@ -0,0 +1,44 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  /**
+   * @param[in]  dmem[attestation_additional_seed]: DRBG output.
+   * @param[out]  dmem[d0]: First share of private key (320 bits).
+   * @param[out]  dmem[d1]: Second share of private key (320 bits).
+   */
+
+  "input": {
+    "dmem": {
+      "mode": "0x0000064d"  # MODE_ATTESTATION_KEY_SAVE
+
+      "attestation_additional_seed":
+        '''
+        0xdecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbad
+          decafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbad
+        '''
+    }
+  }
+  "output": {
+    "dmem": {
+      # Verified with:
+      # >>> d0 = 0x001cc542001cc542001cc542001cc542001cc542001cc542001cc542001cc542001cc542001cc542
+      # >>> d1 = 0xbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00d
+      # >>> consts = "deadbeef", "baadf00d", "decafbad"
+      # >>> key0, key1, seed = [int(e * 12, 16) for e in consts]
+      # >>> mask = 2^320 - 1
+      # >>> print((d0 + d1) % n == ((seed ^^ key0 ^^ key1) & mask) % n)
+
+      "d0":
+        '''
+          0x000000000000000000000000000000000000000000000000001cc542001cc542
+            001cc542001cc542001cc542001cc542001cc542001cc542001cc542001cc542
+        '''
+      "d1":
+        '''
+          0x000000000000000000000000000000000000000000000000baadf00dbaadf00d
+            baadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00dbaadf00d
+        '''
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/boot_keygen_valid.hjson b/sw/otbn/crypto/tests/boot_keygen_valid.hjson
new file mode 100644
index 0000000000000..ee1eed3fc6938
--- /dev/null
+++ b/sw/otbn/crypto/tests/boot_keygen_valid.hjson
@@ -0,0 +1,35 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  /**
+   * @param[in]  dmem[attestation_additional_seed]: DRBG output.
+   * @param[out]  dmem[x]: Public key x-coordinate.
+   * @param[out]  dmem[y]: Public key y-coordinate.
+   */
+
+  "input": {
+    "dmem": {
+      "mode": "0x000002bf"  # MODE_ATTESTATION_KEYGEN
+
+      "attestation_additional_seed":
+        '''
+        0xdecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbad
+          decafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbaddecafbad
+        '''
+    }
+  }
+  "output": {
+    "dmem": {
+      # Verified with:
+      # >>> consts = "deadbeef", "baadf00d", "decafbad"
+      # >>> key0, key1, seed = [int(e * 12, 16) for e in consts]
+      # >>> mask = 2^320 - 1
+      # >>> P = ((seed ^^ key0 ^^ key1) & mask) * G
+      # >>> print(hex(P.x()), hex(P.y()))
+
+      "x": "0x5868cc1d58a1ea20ee1cf22393d92a695e69ea89e85cbce80e94f900015ac2c4"
+      "y": "0x17749c44e6401eda1e71722402d940dceeeee6b7277dac6cbc9a02a44f66aa6f"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/boot_mode_invalid.hjson b/sw/otbn/crypto/tests/boot_mode_invalid.hjson
new file mode 100644
index 0000000000000..0692021a29679
--- /dev/null
+++ b/sw/otbn/crypto/tests/boot_mode_invalid.hjson
@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "input": {
+    "dmem": {
+      "mode": "0xdeadbeef"  # invalid mode enum
+    }
+  }
+  "output": {
+    "regs": {
+      "STOP_PC": "start_failed"
+      "ERR_BITS": "0x00000008"  # unimp trap
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/boot_sigverify_valid.hjson b/sw/otbn/crypto/tests/boot_sigverify_valid.hjson
new file mode 100644
index 0000000000000..71f0ca7b7b685
--- /dev/null
+++ b/sw/otbn/crypto/tests/boot_sigverify_valid.hjson
@@ -0,0 +1,34 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  /**
+   * Test case 1 in wycheproof ecdsa_secp256r1_sha256_p1363_test.json
+   *
+   * @param[in]  dmem[msg]: message to be verified (256 bits)
+   * @param[in]  dmem[r]:   r component of signature (256 bits)
+   * @param[in]  dmem[s]:   s component of signature (256 bits)
+   * @param[in]  dmem[x]:   affine x-coordinate of public key (256 bits)
+   * @param[in]  dmem[y]:   affine y-coordinate of public key (256 bits)
+   * @param[out] dmem[ok]:  success/failure of basic checks (32 bits)
+   * @param[out] dmem[x_r]: dmem buffer for reduced affine x_r-coordinate (x_1)
+   */
+
+  "input": {
+    "dmem": {
+      "mode": "0x000007d3", # MODE_SIGVERIFY
+
+      "msg": "0xbb5a52f42f9c9261ed4361f59422a1e30036e7c32b270c8807a419feca605023"
+      "x": "0x2927b10512bae3eddcfe467828128bad2903269919f7086069c8c4df6c732838"
+      "y": "0xc7787964eaac00e5921fb1498a60f4606766b3d9685001558d1a974e7341513e"
+      "r": "0x2ba3a8be6b94d5ec80a6d9d1190a436effe50d85a1eee859b8cc6af9bd5c2e18"
+      "s": "0x4cd60b855d442f5b3c7b11eb6c4e0ae7525fe710fab9aa7c77a67f79e6fadd76"
+    }
+  }
+  "output": {
+    "dmem": {
+      "ok": "0x00000739"  # HARDENED_TRUE
+      "x_r": "0x2ba3a8be6b94d5ec80a6d9d1190a436effe50d85a1eee859b8cc6af9bd5c2e18"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/modinv_f4_test.exp b/sw/otbn/crypto/tests/modinv_f4_test.exp
deleted file mode 100644
index 3640035ed1e74..0000000000000
--- a/sw/otbn/crypto/tests/modinv_f4_test.exp
+++ /dev/null
@@ -1,6 +0,0 @@
-# Expected modular inverse:
-# d = 0x85f60124ca5cdbc0236281c7c4dcb172e0c37d7a627cb833b146684562bedd22fa7692f31884c1b0be93e735dc6cefc647376f3c1250af54ba333bb9605c5f8081cb4893b65ee446fbd5e4a916e8a404f80cd1cb7e83dea7de9bce7a3ae2cb28acb7e2aba2a1d898cb7f35532aa814fa2b37029c36ea0c0902bdb004472177b3
-w0 = 0xacb7e2aba2a1d898cb7f35532aa814fa2b37029c36ea0c0902bdb004472177b3
-w1 = 0x81cb4893b65ee446fbd5e4a916e8a404f80cd1cb7e83dea7de9bce7a3ae2cb28
-w2 = 0xfa7692f31884c1b0be93e735dc6cefc647376f3c1250af54ba333bb9605c5f80
-w3 = 0x85f60124ca5cdbc0236281c7c4dcb172e0c37d7a627cb833b146684562bedd22
diff --git a/sw/otbn/crypto/tests/modinv_f4_test.s b/sw/otbn/crypto/tests/modinv_f4_test.s
deleted file mode 100644
index fb330026912b2..0000000000000
--- a/sw/otbn/crypto/tests/modinv_f4_test.s
+++ /dev/null
@@ -1,107 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Test for an RSA keygen subroutine: modular inverse of F4.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-
-  /* Load DMEM pointers. */
-  la        x12, modulus
-  la        x13, result
-  la        x14, tmp1
-  la        x15, tmp2
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Compute the modular inverse.
-       dmem[result] <= (65537^-1) mod dmem[modulus] */
-  jal       x1, modinv_f4
-
-  /* Read the inverse into registers for the test framework to check.
-       [w0..w3] <= dmem[result] */
-  li        x2, 0
-  loop      x30, 2
-    bn.lid    x2, 0(x13++)
-    addi      x2, x2, 1
-
-  ecall
-
-.data
-
-/*
-Modulus: randomly-generated even number in the range [2^1023,2^1024) such that
-GCD(65537, modulus) = 1.
-
-Python script to generate modulus:
-import random
-import math
-while True:
-  m = random.randrange(1 << 1022, 1 << 1023)
-  m <<= 1
-  if math.gcd(m, 65537) == 1:
-    break
-
-Full hex value for reference:
-0x90800d989b5e0aae64b49cd617492911368b9ea8b791fcfe486c1313f039c66d0d6269927d1d7fe8454a24e8c9485587e7034021b6eebc5baced24ecef2a7e1d2bddada7ca3f234df00d25f25f281cbe2e5d51f0fe27f0c79b8823851f8011d89ebbcb1c2c3b3026830818fcd810c058fd74af138b61326b4775b51e0f4d68ea
-*/
-.balign 32
-modulus:
-.word 0x0f4d68ea
-.word 0x4775b51e
-.word 0x8b61326b
-.word 0xfd74af13
-.word 0xd810c058
-.word 0x830818fc
-.word 0x2c3b3026
-.word 0x9ebbcb1c
-.word 0x1f8011d8
-.word 0x9b882385
-.word 0xfe27f0c7
-.word 0x2e5d51f0
-.word 0x5f281cbe
-.word 0xf00d25f2
-.word 0xca3f234d
-.word 0x2bddada7
-.word 0xef2a7e1d
-.word 0xaced24ec
-.word 0xb6eebc5b
-.word 0xe7034021
-.word 0xc9485587
-.word 0x454a24e8
-.word 0x7d1d7fe8
-.word 0x0d626992
-.word 0xf039c66d
-.word 0x486c1313
-.word 0xb791fcfe
-.word 0x368b9ea8
-.word 0x17492911
-.word 0x64b49cd6
-.word 0x9b5e0aae
-.word 0x90800d98
-
-/* Buffer for result (1024 bits). */
-.balign 32
-result:
-.zero 128
-
-/* Working buffer (1024 bits). */
-.balign 32
-tmp1:
-.zero 128
-
-/* Working buffer (1024 bits). */
-.balign 32
-tmp2:
-.zero 128
diff --git a/sw/otbn/crypto/tests/mul_test.dexp b/sw/otbn/crypto/tests/mul_test.dexp
new file mode 100644
index 0000000000000..4451b7c25dcb1
--- /dev/null
+++ b/sw/otbn/crypto/tests/mul_test.dexp
@@ -0,0 +1 @@
+result: 9d2bd863dcfd33177479d0a14eaeb12f382cf4afb1669647436378bf34951f41716dbfa36f20fd6205968c5db479815078c79f3411cf8bcaad4cbd835553facff5c89c3b956960fa38083011882e22e0051a9b761f4f55776e328be5f2a03373da01f020e028fecfff3b910ade3f57551a343ef7e4486d8c6ff7b440
diff --git a/sw/otbn/crypto/tests/mul_test.exp b/sw/otbn/crypto/tests/mul_test.exp
deleted file mode 100644
index ec8ddd2f609c7..0000000000000
--- a/sw/otbn/crypto/tests/mul_test.exp
+++ /dev/null
@@ -1,6 +0,0 @@
-# Expected result (w0..w3):
-# 0x920b09c59d2bd863dcfd33177479d0a14eaeb12f382cf4afb1669647436378bf34951f41716dbfa36f20fd6205968c5db479815078c79f3411cf8bcaad4cbd835553facff5c89c3b956960fa38083011882e22e0051a9b761f4f55776e328be5f2a03373da01f020e028fecfff3b910ade3f57551a343ef7e4486d8c6ff7b440
-w0 = 0xf2a03373da01f020e028fecfff3b910ade3f57551a343ef7e4486d8c6ff7b440
-w1 = 0x5553facff5c89c3b956960fa38083011882e22e0051a9b761f4f55776e328be5
-w2 = 0x34951f41716dbfa36f20fd6205968c5db479815078c79f3411cf8bcaad4cbd83
-w3 = 0x920b09c59d2bd863dcfd33177479d0a14eaeb12f382cf4afb1669647436378bf
diff --git a/sw/otbn/crypto/tests/mul_test.s b/sw/otbn/crypto/tests/mul_test.s
index 4e9ffb8e7aed0..802a65af78b84 100644
--- a/sw/otbn/crypto/tests/mul_test.s
+++ b/sw/otbn/crypto/tests/mul_test.s
@@ -21,18 +21,6 @@ main:
   la      x12, result
   jal     x1, bignum_mul
 
-  /* Load result into w0 through w3.
-       [w0..w3] <= dmem[result] */
-  la      x2, result
-  li      x3, 0
-  bn.lid  x3, 0(x2++)
-  addi    x3, x3, 1
-  bn.lid  x3, 0(x2++)
-  addi    x3, x3, 1
-  bn.lid  x3, 0(x2++)
-  addi    x3, x3, 1
-  bn.lid  x3, 0(x2)
-
   ecall
 
 
diff --git a/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_mod_test.s b/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_mod_test.s
index 8e9d7065b67e5..82f37fe1afc34 100644
--- a/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_mod_test.s
+++ b/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_mod_test.s
@@ -77,3 +77,9 @@ x:
   .word 0x8a29dc16
   .word 0xf7109d54
   .word 0x762c5d06
+
+/* Public key z-coordinate. */
+.globl z
+.balign 32
+z:
+  .zero 32
diff --git a/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_test.s b/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_test.s
index 264384de2b79f..dc224f414cb7c 100644
--- a/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_test.s
+++ b/sw/otbn/crypto/tests/p256_arithmetic_to_boolean_test.s
@@ -106,3 +106,9 @@ x_l:
   .word 0x8a29dc16
   .word 0xf7109d54
   .word 0x762c5d06
+
+/* Public key z-coordinate. */
+.globl z
+.balign 32
+z:
+  .zero 32
diff --git a/sw/otbn/crypto/tests/p256_check_public_key_not_on_curve.hjson b/sw/otbn/crypto/tests/p256_check_public_key_not_on_curve.hjson
new file mode 100644
index 0000000000000..c7359826ab650
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_check_public_key_not_on_curve.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "entrypoint": "p256_check_public_key",
+  "input": {
+    "dmem": {
+      # (x+1, y+1)
+      "x": "0x2927b10512bae3eddcfe467828128bad2903269919f7086069c8c4df6c732839"
+      "y": "0xc7787964eaac00e5921fb1498a60f4606766b3d9685001558d1a974e7341513f"
+      "ok": "0x00000739"  # HARDENED_TRUE
+    }
+  }
+  "output": {
+    "dmem": {
+      "ok": "0x000001d4"  # HARDENED_FALSE
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_check_public_key_valid.hjson b/sw/otbn/crypto/tests/p256_check_public_key_valid.hjson
new file mode 100644
index 0000000000000..9664ad2131ee0
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_check_public_key_valid.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "entrypoint": "p256_check_public_key",
+  "input": {
+    "dmem": {
+      # First public key of wycheproof ecdsa_secp256r1_sha256_p1363_test.json
+      "x": "0x2927b10512bae3eddcfe467828128bad2903269919f7086069c8c4df6c732838"
+      "y": "0xc7787964eaac00e5921fb1498a60f4606766b3d9685001558d1a974e7341513e"
+      "ok": "0x00000739"  # HARDENED_TRUE
+    }
+  }
+  "output": {
+    "dmem": {
+      "ok": "0x00000739"  # HARDENED_TRUE
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_check_public_key_x_too_large.hjson b/sw/otbn/crypto/tests/p256_check_public_key_x_too_large.hjson
new file mode 100644
index 0000000000000..d562fb2bd4e81
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_check_public_key_x_too_large.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "entrypoint": "p256_check_public_key",
+  "input": {
+    "dmem": {
+      # (p, y)
+      "x": "0xffffffff00000001000000000000000000000000ffffffffffffffffffffffff"
+      "y": "0xc7787964eaac00e5921fb1498a60f4606766b3d9685001558d1a974e7341513f"
+      "ok": "0x00000739"  # HARDENED_TRUE
+    }
+  }
+  "output": {
+    "dmem": {
+      "ok": "0x000001d4"  # HARDENED_FALSE
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_check_public_key_y_too_large.hjson b/sw/otbn/crypto/tests/p256_check_public_key_y_too_large.hjson
new file mode 100644
index 0000000000000..2cb56b32e21b8
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_check_public_key_y_too_large.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "entrypoint": "p256_check_public_key",
+  "input": {
+    "dmem": {
+      # (x, p)
+      "x": "0x2927b10512bae3eddcfe467828128bad2903269919f7086069c8c4df6c732838"
+      "y": "0xffffffff00000001000000000000000000000000ffffffffffffffffffffffff"
+      "ok": "0x00000739"  # HARDENED_TRUE
+    }
+  }
+  "output": {
+    "dmem": {
+      "ok": "0x000001d4"  # HARDENED_FALSE
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_ecdh_shared_key_test.s b/sw/otbn/crypto/tests/p256_ecdh_shared_key_test.s
index 337834d5a488e..71fee6c83bad6 100644
--- a/sw/otbn/crypto/tests/p256_ecdh_shared_key_test.s
+++ b/sw/otbn/crypto/tests/p256_ecdh_shared_key_test.s
@@ -95,6 +95,12 @@ y:
   .word 0x1f31c143
   .word 0x42a1c697
 
+/* Public key z-coordinate. */
+.globl z
+.balign 32
+z:
+  .zero 32
+
 /* affine x-coordinate value before A2B */
 .globl x_a
 .balign 32
diff --git a/sw/otbn/crypto/tests/p256_isoncurve_proj_test.exp b/sw/otbn/crypto/tests/p256_isoncurve_proj_test.exp
new file mode 100644
index 0000000000000..724a5fb41db21
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_isoncurve_proj_test.exp
@@ -0,0 +1,3 @@
+# Expected values (w18=lhs, w1=rhs):
+w18 = 0xc982e320e2baf326614c9d124c35f985e1052070e47db247028cacb8dfaf872b
+w19 = 0xc982e320e2baf326614c9d124c35f985e1052070e47db247028cacb8dfaf872b
diff --git a/sw/otbn/crypto/tests/p256_isoncurve_proj_test.s b/sw/otbn/crypto/tests/p256_isoncurve_proj_test.s
new file mode 100644
index 0000000000000..46cf45bad8d46
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_isoncurve_proj_test.s
@@ -0,0 +1,78 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for P-256 curve point test
+ *
+ * Runs the P-256 curve point test to check whether a point (given in affine
+ * space) is a valid P-256 curve point.
+ * See comment at the end of the file for expected values of result.
+ */
+
+.section .text.start
+
+p256_oncurve_proj_test:
+  /* Initialize all-zero register. */
+  bn.xor   w31, w31, w31
+
+  /* Compute both sides of the Weierstrauss equation.
+       w18 <= lhs
+       w19 <= rhs */
+  jal      x1, p256_isoncurve_proj
+
+  ecall
+
+
+.data
+
+/* buffer for right side result of Weierstrass equation */
+.globl r
+.balign 32
+r:
+  .zero 32
+
+/* buffer for left side result of Weierstrass equation */
+.globl s
+.balign 32
+s:
+  .zero 32
+
+/* point projective x-coordinate */
+.globl x
+.balign 32
+x:
+  .word 0x9212c2db
+  .word 0x1f4abc57
+  .word 0x9d3f29fd
+  .word 0xa1c262cf
+  .word 0xa626f145
+  .word 0xd69046ab
+  .word 0xf2c9e102
+  .word 0x353043ae
+
+/* point projective y-coordinate */
+.globl y
+.balign 32
+y:
+  .word 0xe35ec65c
+  .word 0x031a25ab
+  .word 0x368f7a3c
+  .word 0x3139dbcb
+  .word 0xecf31fb0
+  .word 0x5f8fde32
+  .word 0xa81acdf6
+  .word 0xad2b637b
+
+/* point projective z-coordinate */
+.globl z
+.balign 32
+z:
+  .word 0xb94a60b5
+  .word 0x67dcdbf7
+  .word 0x1ab6b4ea
+  .word 0x2cc7c056
+  .word 0x1e38fa00
+  .word 0x127d6735
+  .word 0xc96a8cc6
+  .word 0x2be5211f
diff --git a/sw/otbn/crypto/tests/p256_isoncurve_valid.hjson b/sw/otbn/crypto/tests/p256_isoncurve_valid.hjson
new file mode 100644
index 0000000000000..0ec903d9bfed3
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_isoncurve_valid.hjson
@@ -0,0 +1,21 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  "entrypoint": "p256_isoncurve",
+  "input": {
+    "dmem": {
+      "x": "0xb5511a6afacdc5461628ce58db6c8bf36ec0c0b2f36b06899773b7b3bfa8c334"
+      "y": "0x42a1c6971f31c14343dd09eab53a17fa7f7a11d0ab9c6924a87070589e008c2e"
+    }
+    "regs": {
+      "w31": "0x0"
+    }
+  }
+  "output": {
+    "regs": {
+      "w18": "0xb103b614b389c6b8e1a08330a6ce0b9c4b3726ec0bf61f6bdd66af03a4af5660"
+      "w19": "0xb103b614b389c6b8e1a08330a6ce0b9c4b3726ec0bf61f6bdd66af03a4af5660"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_keygen_valid.hjson b/sw/otbn/crypto/tests/p256_keygen_valid.hjson
new file mode 100644
index 0000000000000..fe30ea16ce06f
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_keygen_valid.hjson
@@ -0,0 +1,40 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  /**
+   * @param[out] dmem[d0]: First share of secret key.
+   * @param[out] dmem[d1]: Second share of secret key.
+   * @param[out]  dmem[x]: Public key x-coordinate.
+   * @param[out]  dmem[y]: Public key y-coordinate.
+   */
+
+  "input": {
+    "dmem": {
+      "mode": "0x000005c5"  # MODE_KEYGEN
+    }
+  }
+  "output": {
+    "dmem": {
+      # Verified that (x, y)  == (d0 + d1) * G
+      "x": "0xbc17c155181376b3197b131eac726c220cdf7ab4ad947226393afc1d82372b5e"
+      "y": "0xf00fa582f6dc92f3d9016563addf53be343e2ddf13d61a60148a10823b363b0c"
+
+      # BUG: the upper 64 bits are cleared incorrectly in p256_random_scalar.
+      #   bn.rshi   w16, w20, w31 >> 192
+      #
+      # This bug is runtime-patched by ROM_EXT (PR #27679).
+      "d0":
+        '''
+          0x0000000000000000000000000000000000000000000000000000000000000000
+            cad51b98eeb2713c8b67bf9e1701f3fac2d04d8ecf8d2a5b69240a89b4dae4e1
+        '''
+
+      "d1":
+        '''
+          0x0000000000000000000000000000000000000000000000009bac529d8188e972
+            167bff297e742904961ff21ed1bc0dcde57b792d508dd4768ae99c4d870e512b
+        '''
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p256_proj_double_test.exp b/sw/otbn/crypto/tests/p256_proj_double_test.exp
new file mode 100644
index 0000000000000..861e480f76828
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_proj_double_test.exp
@@ -0,0 +1,2 @@
+w11 = 0xe2534a3532d08fbba02dde659ee62bd0031fe2db785596ef509302446b030852
+w12 = 0xe0f1575a4c633cc719dfee5fda862d764efc96c3f30ee0055c42c23f184ed8c6
diff --git a/sw/otbn/crypto/tests/p256_proj_double_test.s b/sw/otbn/crypto/tests/p256_proj_double_test.s
new file mode 100644
index 0000000000000..abc65c575bb16
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_proj_double_test.s
@@ -0,0 +1,94 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for P-256 point doubling in projective space.
+ */
+
+.section .text.start
+
+p256_proj_add_test:
+
+  /* Init all-zero register. */
+  bn.xor   w31, w31, w31
+
+  /* load curve points to w8..w10 */
+  li       x2, 8
+  la       x3, px
+  bn.lid   x2++, 0(x3)
+  la       x3, py
+  bn.lid   x2++, 0(x3)
+  la       x3, pz
+  bn.lid   x2++, 0(x3)
+
+  /* load domain parameter b from dmem
+     w27 <= b = dmem[p256_b] */
+  li        x2, 27
+  la        x3, p256_b
+  bn.lid    x2, 0(x3)
+
+  /* load field modulus p from dmem
+     MOD <= w29 <= p = dmem[p256_p] */
+  li        x2, 29
+  la        x3, p256_p
+  bn.lid    x2, 0(x3)
+
+  /* store modulus to MOD WSR */
+  bn.wsrw   MOD, w29
+
+  /* Compute the constant r256 for reduction modulo p.
+       w28 <= 2^256 - p = r256 */
+  bn.sub   w28, w31, w29
+
+  /* Load the other constant for reduction modulo p.
+     w29 <= dmem[p256_r448] = r448 */
+  li        x2, 29
+  la        x3, p256_r448
+  bn.lid    x2, 0(x3)
+
+  /* Call doubling.
+     (w8, w9, w10) <= P + P */
+  jal      x1, proj_double
+
+  /* Convert to affine coordinates for comparison with expected result.
+       (w11, w12) <= (x, y) */
+  jal       x1, proj_to_affine
+
+  ecall
+
+
+.data
+
+/* Point X-coordinate. */
+px:
+.word 0x5751336f
+.word 0x4e4b1cf4
+.word 0x70e68481
+.word 0xffab23c9
+.word 0xe51bba8f
+.word 0x69a0be9f
+.word 0x542d5c8e
+.word 0x88b13398
+
+/* Point Y-coordinate. */
+py:
+.word 0x90d2f5d1
+.word 0xfd59be31
+.word 0x88668bd0
+.word 0xe77fc463
+.word 0xe5346d5f
+.word 0x05338238
+.word 0x7f786af9
+.word 0x4126885e
+
+/* Point Z-coordinate. */
+pz:
+.word 0x2b408ce3
+.word 0x85284209
+.word 0x4b7fce3c
+.word 0xf80baf8d
+.word 0x16bb02b6
+.word 0xafe58540
+.word 0x60e5bb67
+.word 0x8d761fd1
diff --git a/sw/otbn/crypto/tests/p256_scalar_reblind_test.exp b/sw/otbn/crypto/tests/p256_scalar_reblind_test.exp
new file mode 100644
index 0000000000000..ab7dab0bc1937
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_scalar_reblind_test.exp
@@ -0,0 +1,7 @@
+# Expected values ([w1, w0] = first share hidden scalar):
+w0 = 0x4452f19aed10de71eae096c716ed1217a1203179a058d8fb995fac7cc6ed2874
+w1 = 0x7695e18e35854643
+
+# Expected values ([w3, w2] = second share hidden scalar):
+w2 = 0xea32cfec5c7928b8a2339a57a0ad6988438c82ef9755ef2c4da39b12b71debeb
+w3 = 0x18bde0a258fa567f2
diff --git a/sw/otbn/crypto/tests/p256_scalar_reblind_test.s b/sw/otbn/crypto/tests/p256_scalar_reblind_test.s
new file mode 100644
index 0000000000000..85ec1736839c2
--- /dev/null
+++ b/sw/otbn/crypto/tests/p256_scalar_reblind_test.s
@@ -0,0 +1,72 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for P256 scalar hiding.
+ */
+
+.section .text.start
+
+p256_scalar_reblind_test:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* [w1, w0] <= scalar0 */
+  la        x16, scalar0
+  li        x2, 0
+  bn.lid    x2, 0(x16++)
+  li        x2, 1
+  bn.lid    x2, 0(x16)
+
+  /* [w3, w2] <= scalar1 */
+  la        x16, scalar1
+  li        x2, 2
+  bn.lid    x2, 0(x16++)
+  li        x2, 3
+  bn.lid    x2, 0(x16)
+
+  /* Hide the masked scalar. */
+  jal       x1, p256_masked_scalar_reblind
+
+  ecall
+
+.data
+
+/* Scalar (321 bits). */
+.balign 32
+scalar0:
+  .word 0x2335f23f
+  .word 0x3c174a16
+  .word 0x128c1339
+  .word 0xc48e8981
+  .word 0x7843d9a2
+  .word 0xbb6a0205
+  .word 0x446984cc
+  .word 0xa210c4be
+  .word 0xd7c77320
+  .word 0x2bac5b0b
+  .word 0x00000001
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
+
+scalar1:
+  .word 0x2335f23f
+  .word 0x3c174a16
+  .word 0x128c1339
+  .word 0xc48e8981
+  .word 0x7843d9a2
+  .word 0xbb6a0205
+  .word 0x446984cc
+  .word 0xa210c4be
+  .word 0xd7c77320
+  .word 0x2bac5b0b
+  .word 0x00000001
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
+  .word 0x00000000
diff --git a/sw/otbn/crypto/tests/p384_base_mult_test.exp b/sw/otbn/crypto/tests/p384_base_mult_test.exp
deleted file mode 100644
index 390f3ace325fd..0000000000000
--- a/sw/otbn/crypto/tests/p384_base_mult_test.exp
+++ /dev/null
@@ -1,7 +0,0 @@
-# Expected values (x- and y-coordinates of result):
-# [w1, w0] is affine x-coordinate of resulting point,
-# [w3, w2] is affine y-coordinate of resulting point.
-w0  = 0x394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1
-w1  = 0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e
-w2  = 0x82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f
-w3  = 0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d
diff --git a/sw/otbn/crypto/tests/p384_base_mult_test.hjson b/sw/otbn/crypto/tests/p384_base_mult_test.hjson
new file mode 100644
index 0000000000000..6d25eb25c5cce
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_base_mult_test.hjson
@@ -0,0 +1,26 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_base_mult_test",
+  "input": {
+    "dmem": {
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+    }
+  }
+  "output": {
+    "regs": {
+      # Expected values (x- and y-coordinates of result):
+      # [w1, w0] is affine x-coordinate of resulting point,
+      # [w3, w2] is affine y-coordinate of resulting point.
+      "w0": "0x394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      "w1": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e",
+      "w2": "0x82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+      "w3": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_base_mult_test.s b/sw/otbn/crypto/tests/p384_base_mult_test.s
index 8ba334b747c35..db660a67be4bc 100644
--- a/sw/otbn/crypto/tests/p384_base_mult_test.s
+++ b/sw/otbn/crypto/tests/p384_base_mult_test.s
@@ -28,74 +28,3 @@ p384_base_mult_test:
   bn.lid    x2, 32(x3)
 
   ecall
-
-
-.section .data
-
-/* 1st scalar share d0 (448-bit) */
-.globl d0
-.balign 32
-d0:
-  .word 0x5c832a51
-  .word 0x3eb17c27
-  .word 0x9a0c1b76
-  .word 0x6e001281
-  .word 0x4de8344e
-  .word 0x5b7d3b0f
-  .word 0x96d2f9e0
-  .word 0x1e9d19e7
-  .word 0x16f5c1ee
-  .word 0x800a4c94
-  .word 0xe14cd8df
-  .word 0xadb9ce1b
-  .word 0x8677a5f2
-  .word 0x32f9e2b0
-  .zero 8
-
-/* 2nd scalar share d1 (448-bit) */
-.globl d1
-.balign 32
-d1:
-  .word 0x33eae098
-  .word 0xd31b18d5
-  .word 0x507568cd
-  .word 0xab8fb14d
-  .word 0x9ef51898
-  .word 0x44676e61
-  .word 0x9cb814d9
-  .word 0x4ad22b6e
-  .word 0x8930f243
-  .word 0xb706d682
-  .word 0xa9da1611
-  .word 0x13e7014a
-  .word 0x9ec9b430
-  .word 0x9e5dc598
-  .zero 8
-
-/* scalar d = (d0 + d1) mod n (384-bit) */
-scalar:
-  .word 0xe8791ba3
-  .word 0xf549e1f7
-  .word 0x893be358
-  .word 0x100794fe
-  .word 0xbc9db95d
-  .word 0xfd7ed624
-  .word 0xc60ebab6
-  .word 0x97ba9586
-  .word 0xa026b431
-  .word 0x37112316
-  .word 0x8b26eef1
-  .word 0xc1a0cf66
-  .zero 16
-
-/* result buffer x-coordinate */
-.globl x
-.balign 32
-x:
-  .zero 64
-
-/* result buffer y-coordinate */
-.globl y
-.balign 32
-y:
-  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_curve_point_valid_test.exp b/sw/otbn/crypto/tests/p384_curve_point_valid_test.exp
index cb88c083b8417..a832a0e0b0b3f 100644
--- a/sw/otbn/crypto/tests/p384_curve_point_valid_test.exp
+++ b/sw/otbn/crypto/tests/p384_curve_point_valid_test.exp
@@ -1,2 +1,2 @@
-# This test doesn't require expected WDR values,
-# it just needs to complete without fault.
+# "ok" code should be unchanged.
+x2 = 0xffffffff
diff --git a/sw/otbn/crypto/tests/p384_curve_point_valid_test.hjson b/sw/otbn/crypto/tests/p384_curve_point_valid_test.hjson
new file mode 100644
index 0000000000000..3e56667d22f96
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_curve_point_valid_test.hjson
@@ -0,0 +1,27 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_curve_point_valid_test",
+  "input": {
+    "dmem": {
+      # Status code
+      "ok": "0xffffffff",
+      # point 1 x-cooridante x
+      "x": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      # point 1 y-cooridante y
+      "y": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+    }
+  }
+  "output": {
+    "regs": {
+      # "ok" code should be unchanged.
+      "x2": "0xffffffff",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_curve_point_valid_test.s b/sw/otbn/crypto/tests/p384_curve_point_valid_test.s
index 9bc29e520a719..c033a7111d9fe 100644
--- a/sw/otbn/crypto/tests/p384_curve_point_valid_test.s
+++ b/sw/otbn/crypto/tests/p384_curve_point_valid_test.s
@@ -15,44 +15,9 @@ p384_curve_point_valid_test:
   /* Init all-zero register. */
   bn.xor    w31, w31, w31
 
-  jal       x1, p384_curve_point_valid
+  jal       x1, p384_check_public_key
 
-  ecall
-
-.data
+  la        x2, ok
+  lw        x2, 0(x2)
 
-/* Curve point x-coordinate. */
-.globl x
-.balign 32
-x:
-  .word 0x4877f3d1
-  .word 0x7b829460
-  .word 0xb1cac609
-  .word 0x5869de54
-  .word 0xee0e2beb
-  .word 0x6c30f2d8
-  .word 0x47e80661
-  .word 0x394d8b70
-  .word 0xcf60d89e
-  .word 0x1a9ea916
-  .word 0xb439d701
-  .word 0xca230836
-  .zero 16
-
-/* Curve point y-coordinate. */
-.globl y
-.balign 32
-y:
-  .word 0xc181f90f
-  .word 0xc31ef079
-  .word 0xbf3aff6e
-  .word 0xc7e55880
-  .word 0xec18818c
-  .word 0xcea028a9
-  .word 0x928c3e92
-  .word 0x82b63bf3
-  .word 0xd65e905d
-  .word 0x68eef2d1
-  .word 0x03afe2c2
-  .word 0xaaafcad2
-  .zero 16
+  ecall
diff --git a/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.exp b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.exp
index 88b391064b20c..f46693477cf27 100644
--- a/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.exp
+++ b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.exp
@@ -1,4 +1,4 @@
 # Expected values:
 # [w1, w0] is unmasked shared key
-w0  = 0x6c5d59dbafa8ecbaf0b2d3c1e818325403634e3b86956e6ead6739217b702c4a
-w1  = 0x00000000000000000000000000000000d177aa22a7c535a28cae00d420c4cd27
+w0  = 0x00a94f93d1320a59c0007d74e572772c2722a257017480a1bfdea3697c461791
+w1  = 0x00000000000000000000000000000000f1d4b5254d1cfebc4a0deafdda8fe3c9
diff --git a/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.hjson b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.hjson
new file mode 100644
index 0000000000000..c1211cbc43c27
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.hjson
@@ -0,0 +1,27 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_ecdh_shared_key_test",
+  "input": {
+    "dmem": {
+      # point 1 x-cooridante x
+      "x": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      # point 1 y-cooridante y
+      "y": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+    }
+  }
+
+  "output": {
+    "regs": {
+      # [w1, w0] is the unmasked shared key
+      "w0": "0x00a94f93d1320a59c0007d74e572772c2722a257017480a1bfdea3697c461791",
+      "w1": "0x00000000000000000000000000000000f1d4b5254d1cfebc4a0deafdda8fe3c9"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.s b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.s
index a38cd975acee9..a4dd37e0c1f78 100644
--- a/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.s
+++ b/sw/otbn/crypto/tests/p384_ecdh_shared_key_test.s
@@ -60,96 +60,3 @@ p384_ecdh_shared_key_test:
   bn.xor    w1, w21, w19
 
   ecall
-
-
-.data
-
-.balign 32
-
-/* point 1 x-cooridante x */
-.globl x
-x:
-  .word 0x1a11808b
-  .word 0x02e3d5a9
-  .word 0x440d8db6
-  .word 0x5ef02be3
-  .word 0x2a35de10
-  .word 0xdbdb132e
-  .word 0xf84e7899
-  .word 0x7dff4c2b
-  .word 0x24705317
-  .word 0x30eda4ab
-  .word 0xb44ba799
-  .word 0x3af8f1c5
-  .zero 16
-
-/* point 1 y-cooridante y*/
-.globl y
-y:
-  .word 0xa9f8b96e
-  .word 0x82f268be
-  .word 0x8e51c662
-  .word 0x92b9c4bb
-  .word 0x757d4493
-  .word 0x26b4d3c6
-  .word 0xf491007e
-  .word 0x92a5c72a
-  .word 0x8d8d8641
-  .word 0x87498a20
-  .word 0x0fe7dbde
-  .word 0x841e4949
-  .zero 16
-
-/* 1st scalar share k0 (448-bit) */
-.globl k0
-k0:
-  .word 0x5c832a51
-  .word 0x3eb17c27
-  .word 0x9a0c1b76
-  .word 0x6e001281
-  .word 0x4de8344e
-  .word 0x5b7d3b0f
-  .word 0x96d2f9e0
-  .word 0x1e9d19e7
-  .word 0x16f5c1ee
-  .word 0x800a4c94
-  .word 0xe14cd8df
-  .word 0xadb9ce1b
-  .word 0x8677a5f2
-  .word 0x32f9e2b0
-  .zero 8
-
-/* 2nd scalar share k1 (448-bit) */
-.globl k1
-k1:
-  .word 0x33eae098
-  .word 0xd31b18d5
-  .word 0x507568cd
-  .word 0xab8fb14d
-  .word 0x9ef51898
-  .word 0x44676e61
-  .word 0x9cb814d9
-  .word 0x4ad22b6e
-  .word 0x8930f243
-  .word 0xb706d682
-  .word 0xa9da1611
-  .word 0x13e7014a
-  .word 0x9ec9b430
-  .word 0x9e5dc598
-  .zero 8
-
-/* scalar k = (k0 + k1) mod n (384-bit)*/
-scalar:
-  .word 0xe8791ba3
-  .word 0xf549e1f7
-  .word 0x893be358
-  .word 0x100794fe
-  .word 0xbc9db95d
-  .word 0xfd7ed624
-  .word 0xc60ebab6
-  .word 0x97ba9586
-  .word 0xa026b431
-  .word 0x37112316
-  .word 0x8b26eef1
-  .word 0xc1a0cf66
-  .zero 16
diff --git a/sw/otbn/crypto/tests/p384_ecdsa_sign_test.hjson b/sw/otbn/crypto/tests/p384_ecdsa_sign_test.hjson
new file mode 100644
index 0000000000000..29532ecdb7c82
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_ecdsa_sign_test.hjson
@@ -0,0 +1,31 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_ecdsa_sign_test",
+  "input": {
+    "dmem": {
+      # 1st scalar share k0 (448-bit)
+      "k0": "0x000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share k1 (448-bit)
+      "k1": "0x00000000000000009e5dc5989ec9b42febdfcb7db84cc0ba198f4d0582a3d7ab4cb12f817042f3bbe08231d67bf0f8d53521b5e860d31f0e776ad076e50b5e8e",
+      # message
+      "msg": "0x00000000000000000000000000000000555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555",
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+    }
+  }
+  "output": {
+    "regs": {
+      # Expected values (x- and y-coordinates of result):
+      # [w1, w0] is R; [w3, w2] is S.
+      "w0": "0x49d29eef0235d77ec16c09de12d35b3856e186cf9a1a30fc2b23ce3ab68c28d8",
+      "w1": "0x00000000000000000000000000000000b2fcf95c7c0d8125b45990dbd3c43053",
+      "w2": "0x80eb391d3e7f68950016f9c3a78101eb77e415a198144c27752042f524bc1bf9",
+      "w3": "0x000000000000000000000000000000001a72ebdde34d88c1fa9554e0f19a653d",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_ecdsa_sign_test.s b/sw/otbn/crypto/tests/p384_ecdsa_sign_test.s
index 9c749cf2b63cb..6b0e6c2b61a09 100644
--- a/sw/otbn/crypto/tests/p384_ecdsa_sign_test.s
+++ b/sw/otbn/crypto/tests/p384_ecdsa_sign_test.s
@@ -28,141 +28,3 @@ p384_ecdsa_sign_test:
   bn.lid    x2, 32(x3)
 
   ecall
-
-
-.data
-
-/* 1st scalar share k0 (448-bit) */
-.globl k0
-k0:
-  .word 0x5c832a51
-  .word 0x3eb17c27
-  .word 0x9a0c1b76
-  .word 0x6e001281
-  .word 0x4de8344e
-  .word 0x5b7d3b0f
-  .word 0x96d2f9e0
-  .word 0x1e9d19e7
-  .word 0x16f5c1ee
-  .word 0x800a4c94
-  .word 0xe14cd8df
-  .word 0xadb9ce1b
-  .word 0x8677a5f2
-  .word 0x32f9e2b0
-  .zero 8
-
-/* 2nd scalar share k1 (448-bit) */
-.globl k1
-k1:
-  .word 0xe50b5e8e
-  .word 0x776ad076
-  .word 0x60d31f0e
-  .word 0x3521b5e8
-  .word 0x7bf0f8d5
-  .word 0xe08231d6
-  .word 0x7042f3bb
-  .word 0x4cb12f81
-  .word 0x82a3d7ab
-  .word 0x198f4d05
-  .word 0xb84cc0ba
-  .word 0xebdfcb7d
-  .word 0x9ec9b42f
-  .word 0x9e5dc598
-  .zero 8
-
-/* nonce k = k0 + k1 mod n (n: curve order) */
-nonce_k:
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .word 0x99999999
-  .zero 16
-
-/* 1st private key share d0 (448-bit) */
-.globl d0
-d0:
-  .word 0x5c832a51
-  .word 0x3eb17c27
-  .word 0x9a0c1b76
-  .word 0x6e001281
-  .word 0x4de8344e
-  .word 0x5b7d3b0f
-  .word 0x96d2f9e0
-  .word 0x1e9d19e7
-  .word 0x16f5c1ee
-  .word 0x800a4c94
-  .word 0xe14cd8df
-  .word 0xadb9ce1b
-  .word 0x8677a5f2
-  .word 0x32f9e2b0
-  .zero 8
-
-/* 2nd private key share d1 (448-bit) */
-.globl d1
-d1:
-  .word 0x33eae098
-  .word 0xd31b18d5
-  .word 0x507568cd
-  .word 0xab8fb14d
-  .word 0x9ef51898
-  .word 0x44676e61
-  .word 0x9cb814d9
-  .word 0x4ad22b6e
-  .word 0x8930f243
-  .word 0xb706d682
-  .word 0xa9da1611
-  .word 0x13e7014a
-  .word 0x9ec9b430
-  .word 0x9e5dc598
-  .zero 8
-
-/* private key d = d0 + d1 mod n (n: curve order) */
-priv_key_d:
-  .word 0xe8791ba3
-  .word 0xf549e1f7
-  .word 0x893be358
-  .word 0x100794fe
-  .word 0xbc9db95d
-  .word 0xfd7ed624
-  .word 0xc60ebab6
-  .word 0x97ba9586
-  .word 0xa026b431
-  .word 0x37112316
-  .word 0x8b26eef1
-  .word 0xc1a0cf66
-  .zero 16
-
-/* message */
-.globl msg
-msg:
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .zero 16
-
-/* signature R */
-.globl r
-r:
-  .zero 64
-
-/* signature S */
-.globl s
-s:
-  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_ecdsa_verify_test.exp b/sw/otbn/crypto/tests/p384_ecdsa_verify_test.exp
deleted file mode 100644
index f24f12a23090e..0000000000000
--- a/sw/otbn/crypto/tests/p384_ecdsa_verify_test.exp
+++ /dev/null
@@ -1,4 +0,0 @@
-# Expected values (x-coordinate of result):
-# [w1, w0] is x_res == sig_r
-w0  = 0x49d29eef0235d77ec16c09de12d35b3856e186cf9a1a30fc2b23ce3ab68c28d8
-w1  = 0x00000000000000000000000000000000b2fcf95c7c0d8125b45990dbd3c43053
diff --git a/sw/otbn/crypto/tests/p384_ecdsa_verify_test.hjson b/sw/otbn/crypto/tests/p384_ecdsa_verify_test.hjson
new file mode 100644
index 0000000000000..7a8326f341339
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_ecdsa_verify_test.hjson
@@ -0,0 +1,35 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_ecdsa_verify_test",
+  "input": {
+    "dmem": {
+      # Status code
+      "ok": "0x000000739",
+      # point 1 x-cooridante x
+      "x": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      # point 1 y-cooridante y
+      "y": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+      # message
+      "msg": "0x00000000000000000000000000000000555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555555",
+      # signature R
+      "r": "0x00000000000000000000000000000000b2fcf95c7c0d8125b45990dbd3c4305349d29eef0235d77ec16c09de12d35b3856e186cf9a1a30fc2b23ce3ab68c28d8",
+      # signature S
+      "s": "0x000000000000000000000000000000001a72ebdde34d88c1fa9554e0f19a653d80eb391d3e7f68950016f9c3a78101eb77e415a198144c27752042f524bc1bf9",
+    }
+  }
+  "output": {
+    "dmem": {
+      # Status code
+      "ok": "0x000000739",
+    },
+    "regs": {
+      # Expected values (x-coordinate of result):
+      # [w1, w0] is x_res == sig_r
+      "w0": "0x49d29eef0235d77ec16c09de12d35b3856e186cf9a1a30fc2b23ce3ab68c28d8",
+      "w1": "0x00000000000000000000000000000000b2fcf95c7c0d8125b45990dbd3c43053",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_ecdsa_verify_test.s b/sw/otbn/crypto/tests/p384_ecdsa_verify_test.s
index 8cb613ce9bd21..5d619be168e66 100644
--- a/sw/otbn/crypto/tests/p384_ecdsa_verify_test.s
+++ b/sw/otbn/crypto/tests/p384_ecdsa_verify_test.s
@@ -24,96 +24,3 @@ p384_ecdsa_verify_test:
   bn.lid    x2, 32(x3)
 
   ecall
-
-
-.data
-
-/* message */
-.globl msg
-msg:
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .word 0x55555555
-  .zero 16
-
-/* signature R */
-.globl r
-r:
-  .word 0xb68c28d8
-  .word 0x2b23ce3a
-  .word 0x9a1a30fc
-  .word 0x56e186cf
-  .word 0x12d35b38
-  .word 0xc16c09de
-  .word 0x0235d77e
-  .word 0x49d29eef
-  .word 0xd3c43053
-  .word 0xb45990db
-  .word 0x7c0d8125
-  .word 0xb2fcf95c
-  .zero 16
-
-/* signature S */
-.globl s
-s:
-  .word 0x24bc1bf9
-  .word 0x752042f5
-  .word 0x98144c27
-  .word 0x77e415a1
-  .word 0xa78101eb
-  .word 0x0016f9c3
-  .word 0x3e7f6895
-  .word 0x80eb391d
-  .word 0xf19a653d
-  .word 0xfa9554e0
-  .word 0xe34d88c1
-  .word 0x1a72ebdd
-  .zero 16
-
-/* public key x-coordinate */
-.globl x
-x:
-  .word 0x4877f3d1
-  .word 0x7b829460
-  .word 0xb1cac609
-  .word 0x5869de54
-  .word 0xee0e2beb
-  .word 0x6c30f2d8
-  .word 0x47e80661
-  .word 0x394d8b70
-  .word 0xcf60d89e
-  .word 0x1a9ea916
-  .word 0xb439d701
-  .word 0xca230836
-  .zero 16
-
-/* public key y-coordinate */
-.globl y
-y:
-  .word 0xc181f90f
-  .word 0xc31ef079
-  .word 0xbf3aff6e
-  .word 0xc7e55880
-  .word 0xec18818c
-  .word 0xcea028a9
-  .word 0x928c3e92
-  .word 0x82b63bf3
-  .word 0xd65e905d
-  .word 0x68eef2d1
-  .word 0x03afe2c2
-  .word 0xaaafcad2
-  .zero 16
-
-/* signature verification result x_res (x_r) */
-.globl x_r
-x_r:
-  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_internal_mult_test.hjson b/sw/otbn/crypto/tests/p384_internal_mult_test.hjson
new file mode 100644
index 0000000000000..dcce6282a3630
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_internal_mult_test.hjson
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_internal_mult_test",
+  "input": {
+    "dmem": {
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+      # point 1 x-cooridante p1_x
+      "x": "0x000000000000000000000000000000003af8f1c5b44ba79930eda4ab247053177dff4c2bf84e7899dbdb132e2a35de105ef02be3440d8db602e3d5a91a11808b",
+      # point 1 y-cooridante p1_y
+      "y": "0x00000000000000000000000000000000841e49490fe7dbde87498a208d8d864192a5c72af491007e26b4d3c6757d449392b9c4bb8e51c66282f268bea9f8b96e",
+    }
+  }
+  "output": {
+    "regs": {
+      # [w26, w25] is the first x coordinate of the scalar multiplication result
+      "w25": "0x7cf187591c12a690e55f2f8550121ae69f577c66114b40a2ff02576164bf9ef1",
+      "w26": "0x00000000000000000000000000000000dafd2040abec2bbf5a4a1b5a2fec246e",
+      # [w28, w27] is the first y coordinate of the scalar multiplication result
+      "w27": "0xb721f5c72891ea5f6da220c3fee6dcc6db5daa4dcfc4721b97fc52530e6545f3",
+      "w28": "0x0000000000000000000000000000000000d48f295cfb0c5180cb9ee5b887273e",
+      # [w30, w29] is the first z coordinate of the scalar multiplication result
+      "w29": "0xdd65b9fcd12dad485696fd8bf9bee635ec6b105e8d0de070d7363088901c541e",
+      "w30": "0x0000000000000000000000000000000096d732ae3416a53f566f73f007e49267",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_internal_mult_test.s b/sw/otbn/crypto/tests/p384_internal_mult_test.s
new file mode 100644
index 0000000000000..d67b991a49f88
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_internal_mult_test.s
@@ -0,0 +1,58 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for P-384 scalar multiplication
+ *
+ * Performs multiplication of a P-384 curve point by a scalar. Both, the
+ * scalar and the affine coordinates of the point are contained in the
+ * .data section below.
+ *
+ * See comment at the end of the file for expected values of coordinates
+ * of resulting point.
+ */
+
+.section .text.start
+
+p384_internal_mult_test:
+
+  /* Init all-zero register. */
+  bn.xor  w31, w31, w31
+
+  /* set dmem pointer to domain parameter b */
+  la        x28, p384_b
+
+  /* set dmem pointer to scratchpad */
+  la        x30, scratchpad
+
+  /* set dmem pointer to point to x-coordinate */
+  la       x20, x
+
+  /* set dmem pointer to point to y-coordinate */
+  la       x21, y
+
+  /* set dmem pointer to point to 1st scalar share d0 */
+  la       x17, d0
+
+  /* set dmem pointer to point to 2nd scalar share d1 */
+  la       x19, d1
+
+  /* load domain parameter p (modulus)
+     [w13, w12] = p = dmem[p384_p] */
+  li        x2, 12
+  la        x3, p384_p
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2++, 32(x3)
+
+  /* load domain parameter n (order of base point)
+     [w11, w10] = n = dmem[p384_n] */
+  li        x2, 10
+  la        x3, p384_n
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2++, 32(x3)
+
+  /* call scalar point multiplication routine in P-384 lib */
+  jal      x1, scalar_mult_int_p384
+
+  ecall
diff --git a/sw/otbn/crypto/tests/p384_isoncurve_proj_test.hjson b/sw/otbn/crypto/tests/p384_isoncurve_proj_test.hjson
new file mode 100644
index 0000000000000..42722baf0b196
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_isoncurve_proj_test.hjson
@@ -0,0 +1,29 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_isoncurve_proj_test",
+  "input": {
+    "dmem": {
+      # point projective x-coordinate
+      "x": "0x00000000000000000000000000000000de71dad7fe36d76b1e30ae5b4152ef025f581967d12930190a41831dfd1d90f05236e1b9b5dcf3ab95c4ddb2e1deb3e8",
+      # point projective y-coordinate
+      "y": "0x000000000000000000000000000000006a90530467b628b1138b69d6688532fe6d95ffcd9c58e190e036648e2e9047697188ff4edff5032a656dc19bed9bacf5",
+      # point projective z-coordinate
+      "z": "0x000000000000000000000000000000001a17ea81dc1bf4904cb98708a6e59ab5f54595e6fe765c32d2d04a0dc656bfa9ee62d2b2a9ce9382fff2b79bdab3335b",
+    }
+  }
+  "output": {
+    "regs": {
+      # Expected values:
+      # [w1, w0] is right side result of Weierstrass equation,
+      # [w3, w2] is left side result of Weierstrass equation.
+      # Point is on curve if [w3,w2] == [w1,w0].
+      "w0": "0x00e9787385550c0f88f54f97468d45f2d0583cfa3b497875fd6cf385a91fd763",
+      "w1": "0x00000000000000000000000000000000d34440792a17aadd1866862341ff09cd",
+      "w2": "0x00e9787385550c0f88f54f97468d45f2d0583cfa3b497875fd6cf385a91fd763",
+      "w3": "0x00000000000000000000000000000000d34440792a17aadd1866862341ff09cd",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_isoncurve_proj_test.s b/sw/otbn/crypto/tests/p384_isoncurve_proj_test.s
new file mode 100644
index 0000000000000..fba892782a294
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_isoncurve_proj_test.s
@@ -0,0 +1,46 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for P-384 curve point test
+ *
+ * Runs the P-384 curve point test to check whether a point (given in projective
+ * space) is a valid P-384 curve point.
+ * See comment at the end of the file for expected values of result.
+ */
+
+.section .text.start
+
+p384_isoncurve_proj_test:
+  /* load domain parameter p (modulus)
+     [w13, w12] = p = dmem[p384_p] */
+  li        x2, 12
+  la        x3, p384_p
+  bn.lid    x2++, 0(x3)
+  bn.lid    x2++, 32(x3)
+
+  /* Fill gpr registers with pointers to variables */
+  la        x20, x
+  la        x21, y
+  la        x30, z
+
+  /* call curve point test routine in P-384 lib */
+  jal       x1, p384_isoncurve_proj_check
+
+  /* load result to WDRs for comparison with reference */
+  li        x2, 0
+  bn.lid    x2++, 0(x22)
+  bn.lid    x2++, 32(x22)
+  bn.lid    x2++, 0(x23)
+  bn.lid    x2++, 32(x23)
+
+  ecall
+
+
+.data
+
+/* point projective z-coordinate */
+.globl z
+z:
+  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_isoncurve_test.exp b/sw/otbn/crypto/tests/p384_isoncurve_test.exp
deleted file mode 100644
index a805546e52353..0000000000000
--- a/sw/otbn/crypto/tests/p384_isoncurve_test.exp
+++ /dev/null
@@ -1,8 +0,0 @@
-# Expected values:
-# [w1, w0] is right side result of Weierstrass equation,
-# [w3, w2] is right side result of Weierstrass equation.
-# Point is on curve if [w3,w2] == [w1,w0].
-w0  = 0xfb192142f51950228765c0f69371a6a63aaff417aacdf679abcbea36b6c505b8
-w1  = 0x000000000000000000000000000000008075470ebf2179fe3a1f1fdf4b445503
-w2  = 0xfb192142f51950228765c0f69371a6a63aaff417aacdf679abcbea36b6c505b8
-w3  = 0x000000000000000000000000000000008075470ebf2179fe3a1f1fdf4b445503
diff --git a/sw/otbn/crypto/tests/p384_isoncurve_test.hjson b/sw/otbn/crypto/tests/p384_isoncurve_test.hjson
new file mode 100644
index 0000000000000..c212a6151a9af
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_isoncurve_test.hjson
@@ -0,0 +1,27 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_isoncurve_test",
+  "input": {
+    "dmem": {
+      # point 1 x-cooridante x
+      "x": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      # point 1 y-cooridante y
+      "y": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+    }
+  }
+  "output": {
+    "regs": {
+      # Expected values:
+      # [w1, w0] is right side result of Weierstrass equation,
+      # [w3, w2] is left side result of Weierstrass equation.
+      # Point is on curve if [w3,w2] == [w1,w0].
+      "w0": "0xfb192142f51950228765c0f69371a6a63aaff417aacdf679abcbea36b6c505b8",
+      "w1": "0x000000000000000000000000000000008075470ebf2179fe3a1f1fdf4b445503",
+      "w2": "0xfb192142f51950228765c0f69371a6a63aaff417aacdf679abcbea36b6c505b8",
+      "w3": "0x000000000000000000000000000000008075470ebf2179fe3a1f1fdf4b445503",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_isoncurve_test.s b/sw/otbn/crypto/tests/p384_isoncurve_test.s
index 388d3b8e39a1f..b85d133ed8624 100644
--- a/sw/otbn/crypto/tests/p384_isoncurve_test.s
+++ b/sw/otbn/crypto/tests/p384_isoncurve_test.s
@@ -12,7 +12,7 @@
 
 .section .text.start
 
-p384_oncurve_test:
+p384_isoncurve_test:
   /* load domain parameter p (modulus)
      [w13, w12] = p = dmem[p384_p] */
   li        x2, 12
@@ -37,50 +37,3 @@ p384_oncurve_test:
   bn.lid    x2++, 32(x23)
 
   ecall
-
-
-.data
-
-/* buffer for right side result of Weierstrass equation */
-.globl rhs
-rhs:
-  .zero 64
-
-/* buffer for left side result of Weierstrass equation */
-.globl lhs
-lhs:
-  .zero 64
-
-/* point affine x-coordinate */
-.globl x
-x:
-  .word 0x4877f3d1
-  .word 0x7b829460
-  .word 0xb1cac609
-  .word 0x5869de54
-  .word 0xee0e2beb
-  .word 0x6c30f2d8
-  .word 0x47e80661
-  .word 0x394d8b70
-  .word 0xcf60d89e
-  .word 0x1a9ea916
-  .word 0xb439d701
-  .word 0xca230836
-  .zero 16
-
-/* point affine y-coordinate */
-.globl y
-y:
-  .word 0xc181f90f
-  .word 0xc31ef079
-  .word 0xbf3aff6e
-  .word 0xc7e55880
-  .word 0xec18818c
-  .word 0xcea028a9
-  .word 0x928c3e92
-  .word 0x82b63bf3
-  .word 0xd65e905d
-  .word 0x68eef2d1
-  .word 0x03afe2c2
-  .word 0xaaafcad2
-  .zero 16
diff --git a/sw/otbn/crypto/tests/p384_keygen_from_seed_test.s b/sw/otbn/crypto/tests/p384_keygen_from_seed_test.s
index fd7f94a5bdfcb..36ee71f8702b7 100644
--- a/sw/otbn/crypto/tests/p384_keygen_from_seed_test.s
+++ b/sw/otbn/crypto/tests/p384_keygen_from_seed_test.s
@@ -92,17 +92,3 @@ p384_keygen_from_seed_test:
   bn.subb   w1, w1, w17
 
   ecall
-
-.section .data
-
-.balign 32
-
-/* 1st private key share d0 (448-bit) */
-.globl d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 (448-bit) */
-.globl d1
-d1:
-  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_keygen_test.s b/sw/otbn/crypto/tests/p384_keygen_test.s
index ba9431ee6f0ea..805792b345e96 100644
--- a/sw/otbn/crypto/tests/p384_keygen_test.s
+++ b/sw/otbn/crypto/tests/p384_keygen_test.s
@@ -318,27 +318,3 @@ p384_keygen_test:
   keep_w1_6:
 
   ecall
-
-.section .data
-
-.balign 32
-
-/* 1st private key share d0 (448-bit) */
-.globl d0
-d0:
-  .zero 64
-
-/* 2nd private key share d1 (448-bit) */
-.globl d1
-d1:
-  .zero 64
-
-/* 1st scalar share k0 (448-bit) */
-.globl k0
-k0:
-  .zero 64
-
-/* 2nd scalar share k1 (448-bit) */
-.globl k1
-k1:
-  .zero 64
diff --git a/sw/otbn/crypto/tests/p384_masked_scalar_reblind_test.hjson b/sw/otbn/crypto/tests/p384_masked_scalar_reblind_test.hjson
new file mode 100644
index 0000000000000..3140846447635
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_masked_scalar_reblind_test.hjson
@@ -0,0 +1,38 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_masked_scalar_reblind",
+  "input": {
+    "regs": {
+      # 1st scalar share d0 (768-bit)
+      "w0": "0x1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      "w1": "0x000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee",
+      "w2": "0x0000000000000000000000000000000000000000000000000000000000000000",
+      # 2nd scalar share d1 (768-bit)
+      "w3": "0x4ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+      "w4": "0x00000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f243",
+      "w5": "0x0000000000000000000000000000000000000000000000000000000000000000",
+      # P-384 domain parameter n (order of base point)
+      "w10": "0xffffffffffffffffc7634d81f4372ddf581a0db248b0a77aecec196accc52973",
+      "w11": "0x00000000000000000000000000000000ffffffffffffffffffffffffffffffff",
+      # All zero reg
+      "w31": "0x0000000000000000000000000000000000000000000000000000000000000000",
+    }
+  }
+
+  "output": {
+    "regs": {
+      # Expected values (shares d0 and d1 of result):
+      # [w2, w1, w0] is the first share d0 of the hidden scalar d
+      "w0": "0x4d75c90825e79c647b17f342165cfcff57dcc45b122ca7efb626e9fef9a13a28",
+      "w1": "0x8009ca6d17cd39577906e058a6a79cff6e3190072f7ed2f50cb5cf4e43819cba",
+      "w2": "0x0000000000000000000000000000000000000000000000011f4aee36c32e8179",
+      # [w5, w4, w3] is the second share d1 of the hidden scalar d
+      "w3": "0xa0f1e94d94ce24495b0cfb29f6bcf528d4d5dc33647e243c96cd6da0b4071543",
+      "w4": "0xbd759ba1ecf5b4da9a3399a776678e184b367df4bc51cb713e8a404973f58312",
+      "w5": "0x0000000000000000000000000000000000000000000000038b84ac7ec5c9a3f7",
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_scalar_mult_test.exp b/sw/otbn/crypto/tests/p384_scalar_mult_test.exp
deleted file mode 100644
index 6f2f96470e94d..0000000000000
--- a/sw/otbn/crypto/tests/p384_scalar_mult_test.exp
+++ /dev/null
@@ -1,4 +0,0 @@
-# Expected values (x- and y-coordinates of result):
-# [w1, w0] is affine x-coordinate of resulting point
-w0  = 0x6c5d59dbafa8ecbaf0b2d3c1e818325403634e3b86956e6ead6739217b702c4a
-w1  = 0x00000000000000000000000000000000d177aa22a7c535a28cae00d420c4cd27
diff --git a/sw/otbn/crypto/tests/p384_scalar_mult_test.hjson b/sw/otbn/crypto/tests/p384_scalar_mult_test.hjson
new file mode 100644
index 0000000000000..e02411e7b73ba
--- /dev/null
+++ b/sw/otbn/crypto/tests/p384_scalar_mult_test.hjson
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "p384_scalar_mult_test",
+  "input": {
+    "dmem": {
+      # point 1 x-cooridante x
+      "x": "0x00000000000000000000000000000000ca230836b439d7011a9ea916cf60d89e394d8b7047e806616c30f2d8ee0e2beb5869de54b1cac6097b8294604877f3d1",
+      # point 1 y-cooridante y
+      "y": "0x00000000000000000000000000000000aaafcad203afe2c268eef2d1d65e905d82b63bf3928c3e92cea028a9ec18818cc7e55880bf3aff6ec31ef079c181f90f",
+      # 1st scalar share d0 (768-bit)
+      "d0": "0x0000000000000000000000000000000000000000000000000000000000000000000000000000000032f9e2b08677a5f2adb9ce1be14cd8df800a4c9416f5c1ee1e9d19e796d2f9e05b7d3b0f4de8344e6e0012819a0c1b763eb17c275c832a51",
+      # 2nd scalar share d1 (768-bit)
+      "d1": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000009e5dc5989ec9b43013e7014aa9da1611b706d6828930f2434ad22b6e9cb814d944676e619ef51898ab8fb14d507568cdd31b18d533eae098",
+    }
+  }
+
+  "output": {
+    "regs": {
+      # Expected values (x- and y-coordinates of result):
+      # [w1, w0] is affine x-coordinate of resulting point
+      "w0": "0x00a94f93d1320a59c0007d74e572772c2722a257017480a1bfdea3697c461791",
+      "w1": "0x00000000000000000000000000000000f1d4b5254d1cfebc4a0deafdda8fe3c9"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/p384_scalar_mult_test.s b/sw/otbn/crypto/tests/p384_scalar_mult_test.s
index 9b1805258e29b..3ca307e1a7600 100644
--- a/sw/otbn/crypto/tests/p384_scalar_mult_test.s
+++ b/sw/otbn/crypto/tests/p384_scalar_mult_test.s
@@ -51,96 +51,3 @@ p384_scalar_mult_test:
   bn.mov    w1, w17
 
   ecall
-
-
-.section .data
-
-.balign 32
-
-/* point 1 x-cooridante p1_x */
-.globl x
-x:
-  .word 0x1a11808b
-  .word 0x02e3d5a9
-  .word 0x440d8db6
-  .word 0x5ef02be3
-  .word 0x2a35de10
-  .word 0xdbdb132e
-  .word 0xf84e7899
-  .word 0x7dff4c2b
-  .word 0x24705317
-  .word 0x30eda4ab
-  .word 0xb44ba799
-  .word 0x3af8f1c5
-  .zero 16
-
-/* point 1 y-cooridante p1_y*/
-.globl y
-y:
-  .word 0xa9f8b96e
-  .word 0x82f268be
-  .word 0x8e51c662
-  .word 0x92b9c4bb
-  .word 0x757d4493
-  .word 0x26b4d3c6
-  .word 0xf491007e
-  .word 0x92a5c72a
-  .word 0x8d8d8641
-  .word 0x87498a20
-  .word 0x0fe7dbde
-  .word 0x841e4949
-  .zero 16
-
-/* 1st scalar share k0 (448-bit) */
-.globl k0
-k0:
-  .word 0x5c832a51
-  .word 0x3eb17c27
-  .word 0x9a0c1b76
-  .word 0x6e001281
-  .word 0x4de8344e
-  .word 0x5b7d3b0f
-  .word 0x96d2f9e0
-  .word 0x1e9d19e7
-  .word 0x16f5c1ee
-  .word 0x800a4c94
-  .word 0xe14cd8df
-  .word 0xadb9ce1b
-  .word 0x8677a5f2
-  .word 0x32f9e2b0
-  .zero 8
-
-/* 2nd scalar share k1 (448-bit) */
-.globl k1
-k1:
-  .word 0x33eae098
-  .word 0xd31b18d5
-  .word 0x507568cd
-  .word 0xab8fb14d
-  .word 0x9ef51898
-  .word 0x44676e61
-  .word 0x9cb814d9
-  .word 0x4ad22b6e
-  .word 0x8930f243
-  .word 0xb706d682
-  .word 0xa9da1611
-  .word 0x13e7014a
-  .word 0x9ec9b430
-  .word 0x9e5dc598
-  .zero 8
-
-/* scalar k = (k0 + k1) mod n (384-bit)*/
-scalar:
-  .word 0xe8791ba3
-  .word 0xf549e1f7
-  .word 0x893be358
-  .word 0x100794fe
-  .word 0xbc9db95d
-  .word 0xfd7ed624
-  .word 0xc60ebab6
-  .word 0x97ba9586
-  .word 0xa026b431
-  .word 0x37112316
-  .word 0x8b26eef1
-  .word 0xc1a0cf66
-  .zero 16
diff --git a/sw/otbn/crypto/tests/primality_negative_test.exp b/sw/otbn/crypto/tests/primality_negative_test.exp
deleted file mode 100644
index 0642a45f10827..0000000000000
--- a/sw/otbn/crypto/tests/primality_negative_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Input is composite, so we should get 0.
-w21 = 0x0
diff --git a/sw/otbn/crypto/tests/primality_negative_test.s b/sw/otbn/crypto/tests/primality_negative_test.s
deleted file mode 100644
index 1f1ab6b9da9fe..0000000000000
--- a/sw/otbn/crypto/tests/primality_negative_test.s
+++ /dev/null
@@ -1,108 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Standalone test for Miller-Rabin primality test.
- *
- * The test input is composite, so we expect the primality test to fail. Uses
- * n=4 limbs (i.e. a 1024-bit prime candidate, as would be used in RSA-2048).
- */
-
-.section .text.start
-
-main:
-  /* Initialize all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Number of limbs (n) and related constant.
-       x30 <= n
-       x31 <= n - 1 */
-  li        x30, 4
-  li        x31, 3
-
-  /* Compute Montgomery constants for the candidate prime.
-       dmem[mont_m0inv] <= (- dmem[input]) mod 2^256
-       dmem[mont_rr] <= (2^1024) mod dmem[input] */
-  la         x16, input
-  la         x17, mont_m0inv
-  la         x18, mont_rr
-  jal        x1, modload
-
-  /* Load pointers to temporary work buffers. */
-  la         x14, tmp1
-  la         x15, tmp2
-
-  /* Set number of Miller-Rabin rounds (see FIPS 186-5, table B.1). */
-  li        x10, 4
-
-  /* Call primality test.
-       w21 <= all 1s if dmem[input] is probably prime, otherwise 0 */
-  jal        x1, miller_rabin
-
-  ecall
-
-.data
-
-/* Candidate prime (Wycheproof test #39) =
-0xf67307e54779cfe9120bf862afc5466c5d6d0783d12df5215c0c981c51e4bfc098e9afd574f51b18c820259b692ec0bf7c9d6e56e9bb99fbd3b7ecc4082146a9d7a5b7bc6519d476c4a9975d9c3e3b12bee45b7accb07a6a68ea583ac2523ef32ee6d01bc766b59c43031f9c6980c9b4317da6825be9f7c5db03283d04c13323
-
-Note: this prime is a worst-case test for Miller-Rabin, since it has a high
-probability of producing false positives if the number of rounds is too low.
-*/
-.balign 32
-input:
-.word 0x04c13323
-.word 0xdb03283d
-.word 0x5be9f7c5
-.word 0x317da682
-.word 0x6980c9b4
-.word 0x43031f9c
-.word 0xc766b59c
-.word 0x2ee6d01b
-.word 0xc2523ef3
-.word 0x68ea583a
-.word 0xccb07a6a
-.word 0xbee45b7a
-.word 0x9c3e3b12
-.word 0xc4a9975d
-.word 0x6519d476
-.word 0xd7a5b7bc
-.word 0x082146a9
-.word 0xd3b7ecc4
-.word 0xe9bb99fb
-.word 0x7c9d6e56
-.word 0x692ec0bf
-.word 0xc820259b
-.word 0x74f51b18
-.word 0x98e9afd5
-.word 0x51e4bfc0
-.word 0x5c0c981c
-.word 0xd12df521
-.word 0x5d6d0783
-.word 0xafc5466c
-.word 0x120bf862
-.word 0x4779cfe9
-.word 0xf67307e5
-
-.section .scratchpad
-
-/* Space for Montgomery constant m0' (256 bits). */
-.balign 32
-mont_m0inv:
-.zero 32
-
-/* Space for Montgomery constant RR (1024 bits). */
-.balign 32
-mont_rr:
-.zero 128
-
-/* Temporary working buffer 1 (1024 bits). */
-.balign 32
-tmp1:
-.zero 128
-
-/* Temporary working buffer 2 (1024 bits). */
-.balign 32
-tmp2:
-.zero 128
diff --git a/sw/otbn/crypto/tests/primality_test.exp b/sw/otbn/crypto/tests/primality_test.exp
deleted file mode 100644
index 0df1a9e9104b7..0000000000000
--- a/sw/otbn/crypto/tests/primality_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Input is prime, so we should get all 1s.
-w21 = 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
diff --git a/sw/otbn/crypto/tests/primality_test.s b/sw/otbn/crypto/tests/primality_test.s
deleted file mode 100644
index 8130665399554..0000000000000
--- a/sw/otbn/crypto/tests/primality_test.s
+++ /dev/null
@@ -1,102 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Standalone test for Miller-Rabin primality test.
- *
- * The prime candidate in this case is a true prime, so we expect the primality
- * test to succeed. Uses n=2 limbs (i.e. a 512-bit prime candidate, as would be
- * used in RSA-1024).
- */
-
-.section .text.start
-
-main:
-  /* Initialize all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Number of limbs (n) and related constant.
-       x30 <= n
-       x31 <= n - 1 */
-  li        x30, 2
-  li        x31, 1
-
-  /* Compute Montgomery constants for the candidate prime.
-       dmem[mont_m0inv] <= (- dmem[input]) mod 2^256
-       dmem[mont_rr] <= (2^1024) mod dmem[input] */
-  la         x16, input
-  la         x17, mont_m0inv
-  la         x18, mont_rr
-  jal        x1, modload
-
-
-  /* Load pointers to temporary work buffers. */
-  la         x14, tmp1
-  la         x15, tmp2
-
-  /* Set number of Miller-Rabin rounds. The prime should survive any number of
-     rounds, but we set a roughly realistic number. */
-  li        x10, 4
-
-  /* Call primality test.
-       w21 <= all 1s if dmem[input] is probably prime, otherwise 0 */
-  jal        x1, miller_rabin
-
-  /* Load Mont constants.
-       w0 <= m0_inv
-       w1, w2 <= rr */
-  la         x17, mont_m0inv
-  la         x18, mont_rr
-  li         x2, 0
-  bn.lid     x2++, 0(x17)
-  bn.lid     x2++, 0(x18)
-  bn.lid     x2++, 32(x18)
-
-  ecall
-
-.data
-
-/* Candidate prime (randomly generated using pycryptodome) =
-0x83f4fb7ca746b70dd7e37ce93847ed7995ccf101bb7a9c628ebcffeeaa0114efd346ddfb53c1d31d51ab13bbcb0b2346d6689cd78210bfe05f458233d8e58e1b
-*/
-.balign 32
-input:
-.word 0xd8e58e1b
-.word 0x5f458233
-.word 0x8210bfe0
-.word 0xd6689cd7
-.word 0xcb0b2346
-.word 0x51ab13bb
-.word 0x53c1d31d
-.word 0xd346ddfb
-.word 0xaa0114ef
-.word 0x8ebcffee
-.word 0xbb7a9c62
-.word 0x95ccf101
-.word 0x3847ed79
-.word 0xd7e37ce9
-.word 0xa746b70d
-.word 0x83f4fb7c
-
-.section .scratchpad
-
-/* Space for Montgomery constant m0' (256 bits). */
-.balign 32
-mont_m0inv:
-.zero 32
-
-/* Space for Montgomery constant RR (512 bits). */
-.balign 32
-mont_rr:
-.zero 64
-
-/* Temporary working buffer 1 (512 bits). */
-.balign 32
-tmp1:
-.zero 64
-
-/* Temporary working buffer 2 (512 bits). */
-.balign 32
-tmp2:
-.zero 64
diff --git a/sw/otbn/crypto/tests/primality_test_witness_negative_test.exp b/sw/otbn/crypto/tests/primality_test_witness_negative_test.exp
deleted file mode 100644
index 411aa2c8d793f..0000000000000
--- a/sw/otbn/crypto/tests/primality_test_witness_negative_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Result from witness test: 0 (indicating "composite")
-w21 = 0
diff --git a/sw/otbn/crypto/tests/primality_test_witness_negative_test.hjson b/sw/otbn/crypto/tests/primality_test_witness_negative_test.hjson
new file mode 100644
index 0000000000000..970dbb062daf1
--- /dev/null
+++ b/sw/otbn/crypto/tests/primality_test_witness_negative_test.hjson
@@ -0,0 +1,27 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # Candidate prime (composite, randomly generated):
+      "rsa_p": "0xf7b5cc32e3c7c3ff6f220312fe4be4af76c9e51e8c17648c863751d70359bab17c1d7b4844e01d1ec0cd695ff3bae05dc51d95a001ab7b69f66d0c056c2dec3b",
+      # Random witness for testing:
+      "tmp0": "0x256943a781a24e5509455e2a4e4e957580ea393b9d7863bb082fb7fd72a5ce33e8a0ed3cf7252c678ab79fd24387fc64d0f601d098b111681262ef4d4080769c",
+      # Precomputed Montgomery constant RR (512 bits):
+      "mont_rr": "0xdf10ee865d9d6071a53b263423cbc23103cc62ac126593d5163b312e78f6cf4150805ac84e5c6583a11300bd10d84741bbd4bbb9cd184ada6f9be028c1e31e17"
+    },
+    "regs": {
+      # Precomputed Montgomery constant m0' (256 bits):
+      "w1": "0xce44dadc9ae7984c6e5afd69acafa4f9b6e8621245c4b2aff47b30a4bb5df30d",
+    },
+  }
+
+  "output": {
+    "regs": {
+      "w21": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/primality_test_witness_negative_test.s b/sw/otbn/crypto/tests/primality_test_witness_negative_test.s
index 8fc876192a61d..88a5639a02397 100644
--- a/sw/otbn/crypto/tests/primality_test_witness_negative_test.s
+++ b/sw/otbn/crypto/tests/primality_test_witness_negative_test.s
@@ -22,95 +22,11 @@ main:
   li        x31, 1
 
   /* Test the witness.
-       w21 <= all 1s if dmem[input] is possibly prime, otherwise 0 */
-  la         x14, witness
-  la         x15, tmp
-  la         x16, input
-  la         x17, mont_m0inv
-  la         x18, mont_rr
+       w21 <= all 1s if dmem[tmp0] is possibly prime, otherwise 0 */
+  la         x14, tmp0 /* witness */
+  la         x15, tmp2 /* tmp buffer */
+  la         x16, rsa_p
+  la         x17, mont_rr
   jal        x1, test_witness
 
   ecall
-
-.data
-
-/* Candidate prime (composite, randomly generated) =
-0xf7b5cc32e3c7c3ff6f220312fe4be4af76c9e51e8c17648c863751d70359bab17c1d7b4844e01d1ec0cd695ff3bae05dc51d95a001ab7b69f66d0c056c2dec3b
-*/
-.balign 32
-input:
-.word 0x6c2dec39
-.word 0xf66d0c05
-.word 0x01ab7b69
-.word 0xc51d95a0
-.word 0xf3bae05d
-.word 0xc0cd695f
-.word 0x44e01d1e
-.word 0x7c1d7b48
-.word 0x0359bab1
-.word 0x863751d7
-.word 0x8c17648c
-.word 0x76c9e51e
-.word 0xfe4be4af
-.word 0x6f220312
-.word 0xe3c7c3ff
-.word 0xf7b5cc32
-
-/* Random witness for testing. */
-.balign 32
-witness:
-.word 0x4080769c
-.word 0x1262ef4d
-.word 0x98b11168
-.word 0xd0f601d0
-.word 0x4387fc64
-.word 0x8ab79fd2
-.word 0xf7252c67
-.word 0xe8a0ed3c
-.word 0x72a5ce33
-.word 0x082fb7fd
-.word 0x9d7863bb
-.word 0x80ea393b
-.word 0x4e4e9575
-.word 0x09455e2a
-.word 0x81a24e55
-.word 0x256943a7
-
-/* Precomputed Montgomery constant m0' (256 bits). */
-.balign 32
-mont_m0inv:
-.word 0xbb5df30d
-.word 0xf47b30a4
-.word 0x45c4b2af
-.word 0xb6e86212
-.word 0xacafa4f9
-.word 0x6e5afd69
-.word 0x9ae7984c
-.word 0xce44dadc
-
-/* Precomputed Montgomery constant RR (512 bits). */
-.balign 32
-mont_rr:
-.word 0xc1e31e17
-.word 0x6f9be028
-.word 0xcd184ada
-.word 0xbbd4bbb9
-.word 0x10d84741
-.word 0xa11300bd
-.word 0x4e5c6583
-.word 0x50805ac8
-.word 0x78f6cf41
-.word 0x163b312e
-.word 0x126593d5
-.word 0x03cc62ac
-.word 0x23cbc231
-.word 0xa53b2634
-.word 0x5d9d6071
-.word 0xdf10ee86
-
-.section .scratchpad
-
-/* Temporary working buffer (512 bits). */
-.balign 32
-tmp:
-.zero 64
diff --git a/sw/otbn/crypto/tests/primality_test_witness_test.exp b/sw/otbn/crypto/tests/primality_test_witness_test.exp
deleted file mode 100644
index 16c7f2246c059..0000000000000
--- a/sw/otbn/crypto/tests/primality_test_witness_test.exp
+++ /dev/null
@@ -1,6 +0,0 @@
-# w0, w1 <= (b^((w-1) / 2) * R) % w =  (-1 * R) % w
-w0 = 0x1d52af5f320aef73e19bb975674e9e8f0e753e834de81d53938d9482527db816
-w1 = 0x1a381b439ccacf8d3ad79cd0050103cb04112d1026e29292384dc8fccc08c726
-
-# Result from witness test: all 1s (indicating "possibly prime")
-w21 = 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
diff --git a/sw/otbn/crypto/tests/primality_test_witness_test.hjson b/sw/otbn/crypto/tests/primality_test_witness_test.hjson
new file mode 100644
index 0000000000000..130e5cfe48f67
--- /dev/null
+++ b/sw/otbn/crypto/tests/primality_test_witness_test.hjson
@@ -0,0 +1,29 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # Candidate prime (true prime, randomly generated using pycryptodome):
+      "rsa_p": "0x8d1c0da1ce6567c69d6bce68028081e582089688137149491c26e47e660463930ea957af990577b9f0cddcbab3a74f47873a9f41a6f40ea9c9c6ca41293edc0b",
+      # Random witness for testing:
+      "tmp0":    "0x256943a781a24e5509455e2a4e4e957580ea393b9d7863bb082fb7fd72a5ce33e8a0ed3cf7252c678ab79fd24387fc64d0f601d098b111681262ef4d4080769c",
+      # Precomputed Montgomery constant RR (512 bits):
+      "mont_rr": "0x2bd6414c084be9c3c8277904c33f14ed6be6c4a81e3966f15f4d0e22c1edcb016424c41f28cc1d74403da1b46f17717a67ee4a0e4abf694505dbf5697cace161"
+    },
+    "regs": {
+      # Precomputed Montgomery constant m0' (256 bits):
+      "w1": "0x3da16a0485db6e31c6fea5cb09f82d11d0d2fa8c641931c662b7e8e719b8305d",
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w0":  "0x1d52af5f320aef73e19bb975674e9e8f0e753e834de81d53938d9482527db816",
+      "w1":  "0x1a381b439ccacf8d3ad79cd0050103cb04112d1026e29292384dc8fccc08c726",
+      "w21": "0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/primality_test_witness_test.s b/sw/otbn/crypto/tests/primality_test_witness_test.s
index 8a3b2df07a5a9..e80994081d10e 100644
--- a/sw/otbn/crypto/tests/primality_test_witness_test.s
+++ b/sw/otbn/crypto/tests/primality_test_witness_test.s
@@ -22,106 +22,22 @@ main:
   li        x31, 1
 
   /* Test the witness.
-       w21 <= all 1s if dmem[input] is possibly prime, otherwise 0 */
-  la         x14, witness
-  la         x15, tmp
-  la         x16, input
-  la         x17, mont_m0inv
-  la         x18, mont_rr
+       w21 <= all 1s if dmem[tmp0] is possibly prime, otherwise 0 */
+  la         x14, tmp0 /* witness */
+  la         x15, tmp2 /* tmp buffer */
+  la         x16, rsa_p
+  la         x17, mont_rr
   jal        x1, test_witness
 
   /* Load the value from the working buffer into registers. Since the candidate
      is prime and the test should have processed all bits of (w-1) without any
      early exit, we expect that the final value will be equal to
-     (witness^(input-1) * R) mod input.
-       w0,w1 <= dmem[tmp:tmp+n*32] */
+     (witness^(rsa_p-1) * R) mod input.
+       w0,w1 <= dmem[tmp2:tmp2+n*32] */
   li         x8, 0
-  la         x15, tmp
+  la         x15, tmp2
   loop       x30, 2
     bn.lid     x8, 0(x15++)
     addi       x8, x8, 1
 
   ecall
-
-.data
-
-/* Candidate prime (true prime, randomly generated using pycryptodome) =
-0x8d1c0da1ce6567c69d6bce68028081e582089688137149491c26e47e660463930ea957af990577b9f0cddcbab3a74f47873a9f41a6f40ea9c9c6ca41293edc0b
-*/
-.balign 32
-input:
-.word 0x293edc0b
-.word 0xc9c6ca41
-.word 0xa6f40ea9
-.word 0x873a9f41
-.word 0xb3a74f47
-.word 0xf0cddcba
-.word 0x990577b9
-.word 0x0ea957af
-.word 0x66046393
-.word 0x1c26e47e
-.word 0x13714949
-.word 0x82089688
-.word 0x028081e5
-.word 0x9d6bce68
-.word 0xce6567c6
-.word 0x8d1c0da1
-
-/* Random witness for testing. */
-.balign 32
-witness:
-.word 0x4080769c
-.word 0x1262ef4d
-.word 0x98b11168
-.word 0xd0f601d0
-.word 0x4387fc64
-.word 0x8ab79fd2
-.word 0xf7252c67
-.word 0xe8a0ed3c
-.word 0x72a5ce33
-.word 0x082fb7fd
-.word 0x9d7863bb
-.word 0x80ea393b
-.word 0x4e4e9575
-.word 0x09455e2a
-.word 0x81a24e55
-.word 0x256943a7
-
-/* Precomputed Montgomery constant m0' (256 bits). */
-.balign 32
-mont_m0inv:
-.word 0x19b8305d
-.word 0x62b7e8e7
-.word 0x641931c6
-.word 0xd0d2fa8c
-.word 0x09f82d11
-.word 0xc6fea5cb
-.word 0x85db6e31
-.word 0x3da16a04
-
-/* Precomputed Montgomery constant RR (512 bits). */
-.balign 32
-mont_rr:
-.word 0x7cace161
-.word 0x05dbf569
-.word 0x4abf6945
-.word 0x67ee4a0e
-.word 0x6f17717a
-.word 0x403da1b4
-.word 0x28cc1d74
-.word 0x6424c41f
-.word 0xc1edcb01
-.word 0x5f4d0e22
-.word 0x1e3966f1
-.word 0x6be6c4a8
-.word 0xc33f14ed
-.word 0xc8277904
-.word 0x084be9c3
-.word 0x2bd6414c
-
-.section .scratchpad
-
-/* Temporary working buffer (512 bits). */
-.balign 32
-tmp:
-.zero 64
diff --git a/sw/otbn/crypto/tests/relprime_f4_test.exp b/sw/otbn/crypto/tests/relprime_f4_test.exp
deleted file mode 100644
index 8c224ce82753a..0000000000000
--- a/sw/otbn/crypto/tests/relprime_f4_test.exp
+++ /dev/null
@@ -1,3 +0,0 @@
-w0 = 0
-w1 = 0
-w2 = 0
diff --git a/sw/otbn/crypto/tests/relprime_f4_test.s b/sw/otbn/crypto/tests/relprime_f4_test.s
deleted file mode 100644
index 76692a397de33..0000000000000
--- a/sw/otbn/crypto/tests/relprime_f4_test.s
+++ /dev/null
@@ -1,215 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Standalone test to check an RSA keygen subroutine.
- *
- * In RSA key generation, GCD(p,e) must be 1 for a potential prime p and an
- * exponent e. When e is fixed to 65537 (aka F4), we use a specialized routine
- * to ensure the GCD is 1.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* w0 <= 0 if simple_positive_test succeeded, 2^256-1 if it failed. */
-  jal       x1, simple_positive_test
-  /* w1 <= 0 if simple_negative_test succeeded, 2^256-1 if it failed. */
-  jal       x1, simple_negative_test
-  /* w2 <= 0 if edge_case_test succeeded, 2^256-1 if it failed. */
-  jal       x1, edge_case_test
-
-  ecall
-
-simple_positive_test:
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-
-  /* w22 <= 0 if dmem[simple_positive_input] is NOT relatively prime to F4 */
-  la        x16, simple_positive_input
-  jal       x1, relprime_f4
-
-  /* w23 <= ~w31 = 2^256-1 (failure value) */
-  bn.not    w23, w31
-
-  /* FG0.Z <= (w22 == 0) */
-  bn.add    w22, w22, w31
-
-  /* We expect a nonzero value in w22, since the input is relatively prime.
-      w0 <= (w22 == 0) ? 2^256-1 (failure) : 0 (success) */
-  bn.sel    w0, w23, w31, FG0.Z
-
-  ret
-
-simple_negative_test:
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-
-  /* w22 <= 0 if dmem[simple_positive_input] is NOT relatively prime to F4 */
-  la        x16, simple_negative_input
-  jal       x1, relprime_f4
-
-  /* w23 <= ~w31 = 2^256-1 (failure value) */
-  bn.not    w23, w31
-
-  /* FG0.Z <= (w22 == 0) */
-  bn.add    w22, w22, w31
-
-  /* We expect a zero value in w22, since the input is NOT relatively prime.
-      w1 <= (w22 == 0) ? 0 (success) : 2^256-1 (failure) */
-  bn.sel    w1, w31, w23, FG0.Z
-
-  ret
-
-edge_case_test:
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-
-  /* w22 <= 0 if dmem[edge_case_input] is NOT relatively prime to F4 */
-  la        x16, edge_case_input
-  jal       x1, relprime_f4
-
-  /* w23 <= ~w31 = 2^256-1 (failure value) */
-  bn.not    w23, w31
-
-  /* FG0.Z <= (w22 == 0) */
-  bn.add    w22, w22, w31
-
-  /* We expect a nonzero value in w22, since the input is relatively prime.
-      w2 <= (w22 == 0) ? 2^256-1 (failure) : 0 (success) */
-  bn.sel    w2, w23, w31, FG0.Z
-
-  ret
-
-.data
-
-/**
- * A 1024-bit value that *is* relatively prime to F4.
- *
- * Full value for reference =
- * 0xf473d9ff366276da71a73afbf03ff01f8ec9148a71798d74dc6f44d961bef880927cc05f07243ce92f5350972532b38bf63efbb65a272de2e9faa34f3bb3520b25e2269c231eb09b0a2b5cb604cfc7e016a2f1a20be61ac1251e0b34b589bb08d1d4542c39ef080b96e60aebb6a37039c84c5591d288465d47e7bc30bf36fc34
- */
-.balign 32
-simple_positive_input:
-  .word 0xbf36fc34
-  .word 0x47e7bc30
-  .word 0xd288465d
-  .word 0xc84c5591
-  .word 0xb6a37039
-  .word 0x96e60aeb
-  .word 0x39ef080b
-  .word 0xd1d4542c
-  .word 0xb589bb08
-  .word 0x251e0b34
-  .word 0x0be61ac1
-  .word 0x16a2f1a2
-  .word 0x04cfc7e0
-  .word 0x0a2b5cb6
-  .word 0x231eb09b
-  .word 0x25e2269c
-  .word 0x3bb3520b
-  .word 0xe9faa34f
-  .word 0x5a272de2
-  .word 0xf63efbb6
-  .word 0x2532b38b
-  .word 0x2f535097
-  .word 0x07243ce9
-  .word 0x927cc05f
-  .word 0x61bef880
-  .word 0xdc6f44d9
-  .word 0x71798d74
-  .word 0x8ec9148a
-  .word 0xf03ff01f
-  .word 0x71a73afb
-  .word 0x366276da
-  .word 0xf473d9ff
-
-
-/**
- * A 1024-bit value that is NOT relatively prime to F4.
- *
- * Full value for reference =
- * 0xfe050192e57dc8199fa8556c8104b345b1e7a0cf3701f496ea8b89a35be53ed653b50c070e9683dad6d83c72430ac46131c49506ec3c23752f6c6cadad058d7188dfc7b666b7aed729ad2e207e503c205eb284fcc501de09a2fb78c905bb0def63ac03fcc55fab5282f925064e3888eda64db2120ce8691b5bd5cd42437ed723
- */
-.balign 32
-simple_negative_input:
-  .word 0x437ed723
-  .word 0x5bd5cd42
-  .word 0x0ce8691b
-  .word 0xa64db212
-  .word 0x4e3888ed
-  .word 0x82f92506
-  .word 0xc55fab52
-  .word 0x63ac03fc
-  .word 0x05bb0def
-  .word 0xa2fb78c9
-  .word 0xc501de09
-  .word 0x5eb284fc
-  .word 0x7e503c20
-  .word 0x29ad2e20
-  .word 0x66b7aed7
-  .word 0x88dfc7b6
-  .word 0xad058d71
-  .word 0x2f6c6cad
-  .word 0xec3c2375
-  .word 0x31c49506
-  .word 0x430ac461
-  .word 0xd6d83c72
-  .word 0x0e9683da
-  .word 0x53b50c07
-  .word 0x5be53ed6
-  .word 0xea8b89a3
-  .word 0x3701f496
-  .word 0xb1e7a0cf
-  .word 0x8104b345
-  .word 0x9fa8556c
-  .word 0xe57dc819
-  .word 0xfe050192
-
-/**
- * A 1024-bit value that is equal to (F4-1) modulo F4.
- *
- * This input is constructed specifically to make sure the final borrow in the
- * implementation is correctly handled.
- *
- * Full value for reference =
- * 0xfe050192e57dc8199fa8556c8104b345b1e7a0cf3701f496ea8b89a35be53ed653b50c070e9683dad6d83c72430ac46131c49506ec3c23752f6c6cadad058d7188dfc7b666b7aed729ad2e207e503c205eb284fcc501de09a2fb78c905bb0def63ac03fcc55fab5282f925064e3888eda64db2120ce8691b5bd5cd42437ed722
- */
-.balign 32
-edge_case_input:
-  .word 0x437ed722
-  .word 0x5bd5cd42
-  .word 0x0ce8691b
-  .word 0xa64db212
-  .word 0x4e3888ed
-  .word 0x82f92506
-  .word 0xc55fab52
-  .word 0x63ac03fc
-  .word 0x05bb0def
-  .word 0xa2fb78c9
-  .word 0xc501de09
-  .word 0x5eb284fc
-  .word 0x7e503c20
-  .word 0x29ad2e20
-  .word 0x66b7aed7
-  .word 0x88dfc7b6
-  .word 0xad058d71
-  .word 0x2f6c6cad
-  .word 0xec3c2375
-  .word 0x31c49506
-  .word 0x430ac461
-  .word 0xd6d83c72
-  .word 0x0e9683da
-  .word 0x53b50c07
-  .word 0x5be53ed6
-  .word 0xea8b89a3
-  .word 0x3701f496
-  .word 0xb1e7a0cf
-  .word 0x8104b345
-  .word 0x9fa8556c
-  .word 0xe57dc819
-  .word 0xfe050192
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.hjson
new file mode 100644
index 0000000000000..b68230f36919c
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that is a multiple of 11 and NOT 3, 5, 7, 17, or 31:
+      "rsa_p": "0x5f4b97ff0ea3266cab6816c25ee524145e27e2992c3c225e87641b6684402e7ed1194a3ef57e2b6b6c47a7dc33eaf6571352294c9296d0f57938113a95548bfd66e409f111fa0022da4a60771ed7cd7a49c951310771be6419d0fec051b76bd5f9cf072d0a7ffbaae36be04a171f68fc948c97b02c301918ca52e7f30a9a411f"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.s
new file mode 100644
index 0000000000000..273fd564fc9b8
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_11_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 11.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.hjson
new file mode 100644
index 0000000000000..9f4015a66a282
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      #  A 1024-bit value that is a multiple of 17 and NOT 3, 5, 11, 17, or 31:
+      "rsa_p": "0x5143649b8bf054404d0ebedfa7a956dabd297218a15c6410335f8fc10f679ea7b4c0c055a34801e48f9a22cc124580ae9de9fda12300eb6cc6a5ab1e9edb8ff24329ef86ec8833131fbfcbbf8e97f9ac5475dc577367b017cb30d1df1c4baa3c63be79499d79f3e1fda86b6ad1790701b6156e77604ad67d9a8e49e8a4c2a845"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.s
new file mode 100644
index 0000000000000..ee629e836bf1b
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_17_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 17.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.hjson
new file mode 100644
index 0000000000000..3b622b4105ae3
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      #  A 1024-bit value that is a multiple of 31 and NOT 3, 5, 7, 11, or 17:
+      "rsa_p": "0xc6b202813cf17e3c55fefc6282020980fa205b3ccfb384f597e2c0749b1d5213c2ebbf45d5f239e911062650cd43d3c008183c6c2cf217ac48af2bcfeac39a280afd60eea8508324e97f40fa78d5d70a5b5fcb80c1e260feaa1f02f54c072a915d48a0d13a162f1e22f40b26c1eb29d4e7a44c48956c2daa5edfd222e7cf7221"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.s
new file mode 100644
index 0000000000000..e4cb80ace1383
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_31_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 31.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.hjson
new file mode 100644
index 0000000000000..0f1d4c5086a15
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that is a multiple of 3 and NOT 5, 7, 11, 17, or 31:
+      "rsa_p": "0xaf8f432e511b6294ef296e4c0c73fdad210a09a5355a5150cc190b64f9e384fbc3bff603b12bf716d6b7493876ea0aa119eb3cca8706f1cfde452289edf554350bfec6b4812f05bcfd3d799c703a901cf7bc99536b6d1c0df187a62eed3114384bba11b8132de7aed844a98ac7597ea336a01df3664d9ebf3126dc99a5896a45"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.s
new file mode 100644
index 0000000000000..22e93fea63696
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_3_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 3.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.hjson
new file mode 100644
index 0000000000000..dd42e37d7fe7c
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that is a multiple of 5 and NOT 3, 7, 11, 17, or 31:
+      "rsa_p": "0x95746f2e1cadd653af519d764878e64c332cc27a5ccd76c989ff609bdee59d4d487c89bb09057b968afd2fd69fe76d25b99c1399a7b8e7e5f9bb301f6d62651a62c9c3aea5ff9e44f2f7065b96b16fda5b776f60760644686798018c960f96eaf2fa5e0dd0cbc707c4a06380dccaeea77ac0775afa2eb98d0e560c47f2ddb2bd"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.s
new file mode 100644
index 0000000000000..f08e02818cd61
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_5_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 5.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.hjson
new file mode 100644
index 0000000000000..d8f81cc0e39ab
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that is a multiple of 7 and NOT 3, 5, 11, 17, or 31.
+      "rsa_p": "0x91986e138a0211deddc97f1f4284182b075166745a567a4866c7093a0e4ba084f82346b6572d6b3110ee488087c5b5385227e1671f48b4460afc72659e7e70521b347174161d184c63788c24b4b2e2db3fc1a6b56f86abfaeb7d19a2902a2223a2e51e15f5bc2b4a1f7ee67a1210881cb8b0c7a949efce5d4422e19865050a9f"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.s b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.s
new file mode 100644
index 0000000000000..e51dc54745d47
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_multiple_of_7_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check detects a
+ * multiple of 7.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_negative_test.hjson b/sw/otbn/crypto/tests/relprime_small_primes_negative_test.hjson
new file mode 100644
index 0000000000000..82c1dd007b04d
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_negative_test.hjson
@@ -0,0 +1,19 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that is prime:
+      "rsa_p": "0xde7d8c0eb2b3beca4db93f640590f62840bbe2435734ee154ef9dfd6eb5f8b9367a86989b88ee86dea529f5d1d62eb7fff904bd9a62d864a50aac31e5dec899a09255b18d8d61eca4b1bc038d3c655397cac166eb3ae6232e9dc11d31398fd4c0bb0af114cd5670c2c99f59cd6963500d0e9edcac0957b414a394ec915bd9377"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w22": "0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/relprime_small_primes_negative_test.s b/sw/otbn/crypto/tests/relprime_small_primes_negative_test.s
new file mode 100644
index 0000000000000..c4660e95b6c17
--- /dev/null
+++ b/sw/otbn/crypto/tests/relprime_small_primes_negative_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * The `relprime_small_primes` subroutine checks if a candidate prime is a
+ * multiple of a small prime. This test ensures that the check does not think a
+ * prime number is divisible by small primes.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[rsa_p] is NOT relatively prime to F4 */
+  la        x16, rsa_p
+  jal       x1, relprime_small_primes
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_1024_dec_test.exp b/sw/otbn/crypto/tests/rsa_1024_dec_test.exp
deleted file mode 100644
index de7f020401d08..0000000000000
--- a/sw/otbn/crypto/tests/rsa_1024_dec_test.exp
+++ /dev/null
@@ -1,5 +0,0 @@
-# Expected decrypted message:
-w0 = 0x656e637279707420616e642064656372797074207468697320666f72206d653f
-w1 = 0x0000000000000000000048656c6c6f206269676e756d2c2063616e20796f7520
-w2 = 0x0000000000000000000000000000000000000000000000000000000000000000
-w3 = 0x0000000000000000000000000000000000000000000000000000000000000000
diff --git a/sw/otbn/crypto/tests/rsa_1024_dec_test.hjson b/sw/otbn/crypto/tests/rsa_1024_dec_test.hjson
new file mode 100644
index 0000000000000..091c94a500f5d
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_1024_dec_test.hjson
@@ -0,0 +1,24 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0x962be2990a4536b45affc57cdc59f4e7c39b1e20ecf3ecf6a3998c2e127ca9e8c8033b94aafd0e567f29299521536a4e3ba5d46d8ea4f2febc7c20bccb5adf607bda03fc75a24aa4cfcc4b48db6f076fea5bb198d23f4ebfa62c908d893c882eafb68c05c8aa371ce9289a03e4d4c75234ab89fea21417f1b6e64c3bc28cf49f",
+      "r0": "0x35f506d191f560d78ade6cc060de8b63938bfd7b43f4ed0b82f3f1f6a3fe61813c0d662639f88b9a991f39d06a88ead24affcc626b4c0c56587a618e6fde2d485b9dce330a522e080d595811bcdc315aa66cf53c0539e396bfa8b28491dff899686f3abe3b47425f3810cd5179524410cda13a474a4300367ae96741e0e14a9b",
+      # d = 0x41b468dc42209f7b511778ce9550ecb55d21e91049ecbe20f9dacc793a107e7d01ca5c4ec3739e4add2f62e8c3a08e3235a9ec64951579d6581ccd6c1d63a0b917f60ed913464f06fbd588489a7a2bfd9ebad71b9741739dae51440fd9ddaef3c386c827f4ca744b41146c79ca97cdc46dfc48e4eeb788b324a2614b93a8cd95
+      "rsa_d0": "0xd50e05aff38cbc77f3223255ad04c97370335cf9286e0cb534580af3f9047b4b3d2fbc930347b079307e7f6c0ec1a881ad4f973d788ad99952ce0c3b4710a60b1cf543d4281437a028343a0c229e78cdacf0fde4776e2c6a72e307bb9ffe5da58985d16e56f43c90dc11b780b031906407bf6943135dee7bdaa0fbf95ef7fbda",
+      "rsa_d1": "0x94ba6d73b1ac230ca2354a9b385425c62d12b5e96182b295cd82c68ac31405363ce5e0ddc0342e33ed511d84cd6126b398e67b59ed9fa04f0ad2c1575a7306b20b034d0d3b5278a6d3e1b244b8e45330324a2affe02f5ff7dcb243b44623f3564a031949a23e48db9d05dbf97aa65da06a4321a7fdea66c8fe029ab2cd5f364f"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0x656e637279707420616e642064656372797074207468697320666f72206d653f",
+      "w1": "0x0000000000000000000048656c6c6f206269676e756d2c2063616e20796f7520",
+      "w2": "0x0000000000000000000000000000000000000000000000000000000000000000",
+      "w3": "0x0000000000000000000000000000000000000000000000000000000000000000"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_1024_dec_test.s b/sw/otbn/crypto/tests/rsa_1024_dec_test.s
index 2f0ea976ebf36..59baa35e220a3 100644
--- a/sw/otbn/crypto/tests/rsa_1024_dec_test.s
+++ b/sw/otbn/crypto/tests/rsa_1024_dec_test.s
@@ -14,170 +14,32 @@
  * Copies the decrypted message to wide registers for comparison (starting at
  * w0). See comment at the end of the file for expected values.
  */
- run_rsa_1024_dec:
+ main:
   /* Init all-zero register. */
   bn.xor  w31, w31, w31
 
+  /* Enable message blinding. */
+  li x29, 1
+
   /* Load number of limbs. */
   li    x30, 4
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[plaintext] = dmem[ciphertext]^dmem[exp] mod dmem[modulus] */
-  la       x14, ciphertext
-  la       x15, exp
-  la       x2, plaintext
+       dmem[r0] = dmem[r0]^dmem[d] mod dmem[n] */
   jal      x1, modexp
 
   /* copy all limbs of result to wide reg file */
-  la       x21, plaintext
+  la       x21, r0
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-
-.data
-
-/* Modulus */
-.balign 32
-modulus:
-.word 0xc28cf49f
-.word 0xb6e64c3b
-.word 0xa21417f1
-.word 0x34ab89fe
-.word 0xe4d4c752
-.word 0xe9289a03
-.word 0xc8aa371c
-.word 0xafb68c05
-
-.word 0x893c882e
-.word 0xa62c908d
-.word 0xd23f4ebf
-.word 0xea5bb198
-.word 0xdb6f076f
-.word 0xcfcc4b48
-.word 0x75a24aa4
-.word 0x7bda03fc
-
-.word 0xcb5adf60
-.word 0xbc7c20bc
-.word 0x8ea4f2fe
-.word 0x3ba5d46d
-.word 0x21536a4e
-.word 0x7f292995
-.word 0xaafd0e56
-.word 0xc8033b94
-
-.word 0x127ca9e8
-.word 0xa3998c2e
-.word 0xecf3ecf6
-.word 0xc39b1e20
-.word 0xdc59f4e7
-.word 0x5affc57c
-.word 0x0a4536b4
-.word 0x962be299
-
-
-/* encrypted message */
-.balign 32
-ciphertext:
-.word 0xe0e14a9b
-.word 0x7ae96741
-.word 0x4a430036
-.word 0xcda13a47
-.word 0x79524410
-.word 0x3810cd51
-.word 0x3b47425f
-.word 0x686f3abe
-
-.word 0x91dff899
-.word 0xbfa8b284
-.word 0x0539e396
-.word 0xa66cf53c
-.word 0xbcdc315a
-.word 0x0d595811
-.word 0x0a522e08
-.word 0x5b9dce33
-
-.word 0x6fde2d48
-.word 0x587a618e
-.word 0x6b4c0c56
-.word 0x4affcc62
-.word 0x6a88ead2
-.word 0x991f39d0
-.word 0x39f88b9a
-.word 0x3c0d6626
-
-.word 0xa3fe6181
-.word 0x82f3f1f6
-.word 0x43f4ed0b
-.word 0x938bfd7b
-.word 0x60de8b63
-.word 0x8ade6cc0
-.word 0x91f560d7
-.word 0x35f506d1
-
-
-/* private exponent */
-.balign 32
-exp:
-.word 0x93a8cd95
-.word 0x24a2614b
-.word 0xeeb788b3
-.word 0x6dfc48e4
-.word 0xca97cdc4
-.word 0x41146c79
-.word 0xf4ca744b
-.word 0xc386c827
-
-.word 0xd9ddaef3
-.word 0xae51440f
-.word 0x9741739d
-.word 0x9ebad71b
-.word 0x9a7a2bfd
-.word 0xfbd58848
-.word 0x13464f06
-.word 0x17f60ed9
-
-.word 0x1d63a0b9
-.word 0x581ccd6c
-.word 0x951579d6
-.word 0x35a9ec64
-.word 0xc3a08e32
-.word 0xdd2f62e8
-.word 0xc3739e4a
-.word 0x01ca5c4e
-
-.word 0x3a107e7d
-.word 0xf9dacc79
-.word 0x49ecbe20
-.word 0x5d21e910
-.word 0x9550ecb5
-.word 0x511778ce
-.word 0x42209f7b
-.word 0x41b468dc
-
-/* output buffer */
-.balign 32
-plaintext:
-.zero 128
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 128
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_1024_enc_test.exp b/sw/otbn/crypto/tests/rsa_1024_enc_test.exp
deleted file mode 100644
index 6e6a3097460bb..0000000000000
--- a/sw/otbn/crypto/tests/rsa_1024_enc_test.exp
+++ /dev/null
@@ -1,5 +0,0 @@
-# Expected encrypted message:
-w0 = 0x686f3abe3b47425f3810cd5179524410cda13a474a4300367ae96741e0e14a9b
-w1 = 0x5b9dce330a522e080d595811bcdc315aa66cf53c0539e396bfa8b28491dff899
-w2 = 0x3c0d662639f88b9a991f39d06a88ead24affcc626b4c0c56587a618e6fde2d48
-w3 = 0x35f506d191f560d78ade6cc060de8b63938bfd7b43f4ed0b82f3f1f6a3fe6181
diff --git a/sw/otbn/crypto/tests/rsa_1024_enc_test.hjson b/sw/otbn/crypto/tests/rsa_1024_enc_test.hjson
new file mode 100644
index 0000000000000..c6b480f2d5c79
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_1024_enc_test.hjson
@@ -0,0 +1,21 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0x962be2990a4536b45affc57cdc59f4e7c39b1e20ecf3ecf6a3998c2e127ca9e8c8033b94aafd0e567f29299521536a4e3ba5d46d8ea4f2febc7c20bccb5adf607bda03fc75a24aa4cfcc4b48db6f076fea5bb198d23f4ebfa62c908d893c882eafb68c05c8aa371ce9289a03e4d4c75234ab89fea21417f1b6e64c3bc28cf49f",
+      "inout": "0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000048656c6c6f206269676e756d2c2063616e20796f7520656e637279707420616e642064656372797074207468697320666f72206d653f"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0x686f3abe3b47425f3810cd5179524410cda13a474a4300367ae96741e0e14a9b",
+      "w1": "0x5b9dce330a522e080d595811bcdc315aa66cf53c0539e396bfa8b28491dff899",
+      "w2": "0x3c0d662639f88b9a991f39d06a88ead24affcc626b4c0c56587a618e6fde2d48",
+      "w3": "0x35f506d191f560d78ade6cc060de8b63938bfd7b43f4ed0b82f3f1f6a3fe6181"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_1024_enc_test.s b/sw/otbn/crypto/tests/rsa_1024_enc_test.s
index 9289eec953200..d061496d6c57c 100644
--- a/sw/otbn/crypto/tests/rsa_1024_enc_test.s
+++ b/sw/otbn/crypto/tests/rsa_1024_enc_test.s
@@ -15,7 +15,7 @@
  * Copies the encrypted message to wide registers for comparison (starting at
  * w0).
  */
-run_rsa_1024_enc:
+main:
   /* Init all-zero register. */
   bn.xor  w31, w31, w31
 
@@ -23,120 +23,23 @@ run_rsa_1024_enc:
   li    x30, 4
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[plaintext] = dmem[ciphertext]^dmem[exp] mod dmem[modulus] */
-  la       x14, plaintext
-  la       x2, ciphertext
+       dmem[work_buf] = dmem[inout]^dmem[d] mod dmem[n] */
+  la       x14, inout
+  la       x2, work_buf
   jal      x1, modexp_65537
 
   /* copy all limbs of result to wide reg file */
-  la       x21, ciphertext
+  la       x21, work_buf
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-.data
-
-/* Modulus */
-.balign 32
-modulus:
-.word 0xc28cf49f
-.word 0xb6e64c3b
-.word 0xa21417f1
-.word 0x34ab89fe
-.word 0xe4d4c752
-.word 0xe9289a03
-.word 0xc8aa371c
-.word 0xafb68c05
-
-.word 0x893c882e
-.word 0xa62c908d
-.word 0xd23f4ebf
-.word 0xea5bb198
-.word 0xdb6f076f
-.word 0xcfcc4b48
-.word 0x75a24aa4
-.word 0x7bda03fc
-
-.word 0xcb5adf60
-.word 0xbc7c20bc
-.word 0x8ea4f2fe
-.word 0x3ba5d46d
-.word 0x21536a4e
-.word 0x7f292995
-.word 0xaafd0e56
-.word 0xc8033b94
-
-.word 0x127ca9e8
-.word 0xa3998c2e
-.word 0xecf3ecf6
-.word 0xc39b1e20
-.word 0xdc59f4e7
-.word 0x5affc57c
-.word 0x0a4536b4
-.word 0x962be299
-
-
-/* Message */
-.balign 32
-plaintext:
-.word 0x206d653f
-.word 0x20666f72
-.word 0x74686973
-.word 0x79707420
-.word 0x64656372
-.word 0x616e6420
-.word 0x79707420
-.word 0x656e6372
-
-.word 0x796f7520
-.word 0x63616e20
-.word 0x756d2c20
-.word 0x6269676e
-.word 0x6c6c6f20
-.word 0x00004865
-.word 0x00000000
-.word 0x00000000
-
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-.word 0x00000000
-
-/* output buffer */
-.balign 32
-ciphertext:
-.zero 128
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 128
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_2048_dec_test.exp b/sw/otbn/crypto/tests/rsa_2048_dec_test.exp
deleted file mode 100644
index 51e2039287ca1..0000000000000
--- a/sw/otbn/crypto/tests/rsa_2048_dec_test.exp
+++ /dev/null
@@ -1,10 +0,0 @@
-# Expected value:
-# 0x6add9548af50f1bea3cb921205a5bb92ee325e01d160e3738a09aa0df7050e6051d693440f0d00cdd56cee5a748ff3b48b1df7be05808ad20068ad387b8b5e4c25c79bba9f87ef971da926f644c26d4273829fd69db71f9eded2cd1a33c367578550346ada160daa272940dd6fc10dae4a0facef437ece40130301c1b847203cc0defd3620ce89d96fa21d30ee63e458b0198adc842f68af8b462df6014955ab68f663a9b5e77caf15a517ab0931308bf9591cecc7691780a2f3bd99d3ce25433d31537e7cab1b4c07d99199e9517132188150d38d633c2b3ef6ba6fb40504e800fca580beb7a19f2315adb451be690fc4f87ea5914d28d5562dc1dce115a852
-w0 = 0x00fca580beb7a19f2315adb451be690fc4f87ea5914d28d5562dc1dce115a852
-w1 = 0x3d31537e7cab1b4c07d99199e9517132188150d38d633c2b3ef6ba6fb40504e8
-w2 = 0x68f663a9b5e77caf15a517ab0931308bf9591cecc7691780a2f3bd99d3ce2543
-w3 = 0xc0defd3620ce89d96fa21d30ee63e458b0198adc842f68af8b462df6014955ab
-w4 = 0x8550346ada160daa272940dd6fc10dae4a0facef437ece40130301c1b847203c
-w5 = 0x25c79bba9f87ef971da926f644c26d4273829fd69db71f9eded2cd1a33c36757
-w6 = 0x51d693440f0d00cdd56cee5a748ff3b48b1df7be05808ad20068ad387b8b5e4c
-w7 = 0x6add9548af50f1bea3cb921205a5bb92ee325e01d160e3738a09aa0df7050e60
diff --git a/sw/otbn/crypto/tests/rsa_2048_dec_test.hjson b/sw/otbn/crypto/tests/rsa_2048_dec_test.hjson
new file mode 100644
index 0000000000000..bd918a14a9716
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_2048_dec_test.hjson
@@ -0,0 +1,28 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xb5ed720fe7e1b4a65494e8e9421df94910811d23854cb07b08a34508b682b188b16fa70e4804b4c4f54a54ae2a10848abc9253ac7c6085e5b9abcbcd48515db1626b01df4e7f5f1c85b9ce1b4c8d0f77f3854c8bc4f350ad4d993a6815d0d62ac83b47a257adb40023e1acf003d27953f19c5cbede1af58e42ef12ad9907c20ca428f8b7dbb6f3434936b1108d17ee343d7127f8885ff2513eb834c17bf1c4ddec0d61cc26f5f683c10c0e48676608811e9341f2898f690bc9fafd3b7e46d375e2178a141faf0d637767da550de4c5b9939af133ceba7cd2734df4ad269c166180afd8c35060de8ac302ca911aa3f92d139ed1595523a7f6c201cfafed4c17b5",
+      "r0": "0x95fb986cd4aeee4b013effc1d183670380a9e2133ecc6a38dbbfff3f8ef20e1923a5e3741eac8772ee80f28994968fcabd6d454b7791263872bc68d97b6f4fbb76cee24f205d812ad36f2fcb6c11145943009a051c39c18c45b53ee19e51df0254b31eb991783718fb35c51dec249956bceb0276eaee88d8ecdeae2c08ac62a0018408af3923206e911a7ecf6ad786255fa69d63d333e6f44ebd3f5e6ebb7c82443c694d913e200492c89f046943f2dc7d8cf9951c6a33fa721558d1956fb552349ded082714be6a8bff775fd05162744d229fc9fac72509476bdc6434e5187bf3a1cc426cc13f0a10dcf0d15f28abcecfe5674782f232464b1a890d42b6fdd0",
+      # d = 0x51a84a52295a7da34ac3abe746edfd3e7651fdaa3be2b8340124878fe99bafe4130072934e700e537965ebac60e51918cc9b4143627050a95435703cac011974cd200aaf18a4c3242241cbe924eb0bce6357a98bf2d2e39b660128de1f2ca5747e7b5d23d906f68c398ec9f8d13e5f86f623a0dd6b03dec403f71b03207502fbb6c7d812f391e010cbed264655d11ab63c262a803196a128df72ecf1c65ed7f742371e4c4ee355f44cfae81ec0a256da9aa3eb1935fc509d366de08c7edb522411670cd7ee0053bb9395ac4cbe0af6f3cdd1c24e225ee47aa4f381764cfab389db993fed537f397fbff31362a85872993bc467dde42b66894f4cb3ce712b2ee1
+      "rsa_d0": "0x1d192a473edb5d48c18b13bbae572a71a3bea10abf46f11c7b53d3f4fdc99fa08ce05d4ba98fc7096f257219868cd6f616eb7a8fc05ca06ee2cba1ced1e30ad693fe1784dc612868722ed1f071283a808e6734dfefbe7fc9c4c4cf28b7b0ce7364a3de122d92e4509d141c16aef8e8d69eeded877762470cb8ac980fdb4de3a907205dcdc3fa8a0000b454457228785aad4391b9e0d87b5a13d7c3e01503efd8fd43ef39e223ee4be5d33a50cf7a780df85863fad22eae63dbb7178356daf3cce44c23950b9b41cc4ca8530480f4093c28d35d91a6ba829adf9c71400b8ac008b188270a0e23c993738fba3d37b39db1c4d79e745fbd2b80b73e9a8c7c1b3721",
+      "rsa_d1": "0x4cb16015178120eb8b48b85ce8bad74fd5ef5ca084a449287a77547b145230449fe02fd8e7ffc95a164099b5e669cfeeda703bcca22cf0c7b6fed1f27de213a25ede1d2bc4c5eb4c506f1a1955c3314eed309d541d6c9c52a2c5e7f6a89c6b071ad88331f49412dca49ad5ee7fc6b75068ce4d5a1c6199c8bb5b830cfb38e152b1e785df306b6a10cb59720327f962ec9165bb39d14eda72cca52f11d35d382fbf74f175acc0bbbfa929d24e0fd82ed762fb88e3e7d2fefeeddaf70f2801a1e8f52b2f42e59b1277df3dff483efeffcfe5029fdf84e466e07b6ff036477073816a1118e75d5cf0eccc7ca95f9febef28ff13f9a9bb964d09f87229420d3019c0"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0x00fca580beb7a19f2315adb451be690fc4f87ea5914d28d5562dc1dce115a852",
+      "w1": "0x3d31537e7cab1b4c07d99199e9517132188150d38d633c2b3ef6ba6fb40504e8",
+      "w2": "0x68f663a9b5e77caf15a517ab0931308bf9591cecc7691780a2f3bd99d3ce2543",
+      "w3": "0xc0defd3620ce89d96fa21d30ee63e458b0198adc842f68af8b462df6014955ab",
+      "w4": "0x8550346ada160daa272940dd6fc10dae4a0facef437ece40130301c1b847203c",
+      "w5": "0x25c79bba9f87ef971da926f644c26d4273829fd69db71f9eded2cd1a33c36757",
+      "w6": "0x51d693440f0d00cdd56cee5a748ff3b48b1df7be05808ad20068ad387b8b5e4c",
+      "w7": "0x6add9548af50f1bea3cb921205a5bb92ee325e01d160e3738a09aa0df7050e60"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_2048_dec_test.s b/sw/otbn/crypto/tests/rsa_2048_dec_test.s
index 5c841f48b9d66..81dd1d00175ad 100644
--- a/sw/otbn/crypto/tests/rsa_2048_dec_test.s
+++ b/sw/otbn/crypto/tests/rsa_2048_dec_test.s
@@ -12,261 +12,28 @@ main:
   /* Init all-zero register. */
   bn.xor  w31, w31, w31
 
+  /* Enable message blinding. */
+  li x29, 1
+
   /* Load number of limbs. */
   li    x30, 8
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[result] = dmem[base]^dmem[exp] mod dmem[modulus] */
-  la       x14, base
-  la       x15, exp
-  la       x2, result
+       dmem[inout] = dmem[inout]^dmem[d] mod dmem[n] */
   jal      x1, modexp
 
   /* copy all limbs of result to wide reg file */
-  la       x21, result
+  la       x21, r0
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-
-.data
-
-/* Modulus n =
-
-0xb5ed720fe7e1b4a65494e8e9421df94910811d23854cb07b08a34508b682b188b16fa70e4804b4c4f54a54ae2a10848abc9253ac7c6085e5b9abcbcd48515db1626b01df4e7f5f1c85b9ce1b4c8d0f77f3854c8bc4f350ad4d993a6815d0d62ac83b47a257adb40023e1acf003d27953f19c5cbede1af58e42ef12ad9907c20ca428f8b7dbb6f3434936b1108d17ee343d7127f8885ff2513eb834c17bf1c4ddec0d61cc26f5f683c10c0e48676608811e9341f2898f690bc9fafd3b7e46d375e2178a141faf0d637767da550de4c5b9939af133ceba7cd2734df4ad269c166180afd8c35060de8ac302ca911aa3f92d139ed1595523a7f6c201cfafed4c17b5
- */
-.balign 32
-modulus:
-  .word 0xed4c17b5
-  .word 0xc201cfaf
-  .word 0x5523a7f6
-  .word 0x139ed159
-  .word 0x1aa3f92d
-  .word 0xc302ca91
-  .word 0x5060de8a
-  .word 0x80afd8c3
-  .word 0x269c1661
-  .word 0x734df4ad
-  .word 0xceba7cd2
-  .word 0x939af133
-  .word 0x0de4c5b9
-  .word 0x7767da55
-  .word 0x1faf0d63
-  .word 0xe2178a14
-  .word 0x7e46d375
-  .word 0xc9fafd3b
-  .word 0x898f690b
-  .word 0x1e9341f2
-  .word 0x67660881
-  .word 0xc10c0e48
-  .word 0x26f5f683
-  .word 0xec0d61cc
-  .word 0x7bf1c4dd
-  .word 0x3eb834c1
-  .word 0x885ff251
-  .word 0x3d7127f8
-  .word 0x8d17ee34
-  .word 0x4936b110
-  .word 0xdbb6f343
-  .word 0xa428f8b7
-  .word 0x9907c20c
-  .word 0x42ef12ad
-  .word 0xde1af58e
-  .word 0xf19c5cbe
-  .word 0x03d27953
-  .word 0x23e1acf0
-  .word 0x57adb400
-  .word 0xc83b47a2
-  .word 0x15d0d62a
-  .word 0x4d993a68
-  .word 0xc4f350ad
-  .word 0xf3854c8b
-  .word 0x4c8d0f77
-  .word 0x85b9ce1b
-  .word 0x4e7f5f1c
-  .word 0x626b01df
-  .word 0x48515db1
-  .word 0xb9abcbcd
-  .word 0x7c6085e5
-  .word 0xbc9253ac
-  .word 0x2a10848a
-  .word 0xf54a54ae
-  .word 0x4804b4c4
-  .word 0xb16fa70e
-  .word 0xb682b188
-  .word 0x08a34508
-  .word 0x854cb07b
-  .word 0x10811d23
-  .word 0x421df949
-  .word 0x5494e8e9
-  .word 0xe7e1b4a6
-  .word 0xb5ed720f
-
-/* Base for exponentiation (corresponds to ciphertext for decryption or
-   message for signing).
-
-   Raw hex value =
-0x95fb986cd4aeee4b013effc1d183670380a9e2133ecc6a38dbbfff3f8ef20e1923a5e3741eac8772ee80f28994968fcabd6d454b7791263872bc68d97b6f4fbb76cee24f205d812ad36f2fcb6c11145943009a051c39c18c45b53ee19e51df0254b31eb991783718fb35c51dec249956bceb0276eaee88d8ecdeae2c08ac62a0018408af3923206e911a7ecf6ad786255fa69d63d333e6f44ebd3f5e6ebb7c82443c694d913e200492c89f046943f2dc7d8cf9951c6a33fa721558d1956fb552349ded082714be6a8bff775fd05162744d229fc9fac72509476bdc6434e5187bf3a1cc426cc13f0a10dcf0d15f28abcecfe5674782f232464b1a890d42b6fdd0
- */
-.balign 32
-base:
-  .word 0x42b6fdd0
-  .word 0x4b1a890d
-  .word 0x82f23246
-  .word 0xcfe56747
-  .word 0x5f28abce
-  .word 0x10dcf0d1
-  .word 0x6cc13f0a
-  .word 0xf3a1cc42
-  .word 0x34e5187b
-  .word 0x476bdc64
-  .word 0xfac72509
-  .word 0x4d229fc9
-  .word 0xd0516274
-  .word 0x8bff775f
-  .word 0x2714be6a
-  .word 0x349ded08
-  .word 0x956fb552
-  .word 0x721558d1
-  .word 0x1c6a33fa
-  .word 0x7d8cf995
-  .word 0x6943f2dc
-  .word 0x92c89f04
-  .word 0x913e2004
-  .word 0x443c694d
-  .word 0x6ebb7c82
-  .word 0x4ebd3f5e
-  .word 0xd333e6f4
-  .word 0x5fa69d63
-  .word 0x6ad78625
-  .word 0x911a7ecf
-  .word 0x3923206e
-  .word 0x018408af
-  .word 0x08ac62a0
-  .word 0xecdeae2c
-  .word 0xeaee88d8
-  .word 0xbceb0276
-  .word 0xec249956
-  .word 0xfb35c51d
-  .word 0x91783718
-  .word 0x54b31eb9
-  .word 0x9e51df02
-  .word 0x45b53ee1
-  .word 0x1c39c18c
-  .word 0x43009a05
-  .word 0x6c111459
-  .word 0xd36f2fcb
-  .word 0x205d812a
-  .word 0x76cee24f
-  .word 0x7b6f4fbb
-  .word 0x72bc68d9
-  .word 0x77912638
-  .word 0xbd6d454b
-  .word 0x94968fca
-  .word 0xee80f289
-  .word 0x1eac8772
-  .word 0x23a5e374
-  .word 0x8ef20e19
-  .word 0xdbbfff3f
-  .word 0x3ecc6a38
-  .word 0x80a9e213
-  .word 0xd1836703
-  .word 0x013effc1
-  .word 0xd4aeee4b
-  .word 0x95fb986c
-
-/* Private exponent d =
-0x51a84a52295a7da34ac3abe746edfd3e7651fdaa3be2b8340124878fe99bafe4130072934e700e537965ebac60e51918cc9b4143627050a95435703cac011974cd200aaf18a4c3242241cbe924eb0bce6357a98bf2d2e39b660128de1f2ca5747e7b5d23d906f68c398ec9f8d13e5f86f623a0dd6b03dec403f71b03207502fbb6c7d812f391e010cbed264655d11ab63c262a803196a128df72ecf1c65ed7f742371e4c4ee355f44cfae81ec0a256da9aa3eb1935fc509d366de08c7edb522411670cd7ee0053bb9395ac4cbe0af6f3cdd1c24e225ee47aa4f381764cfab389db993fed537f397fbff31362a85872993bc467dde42b66894f4cb3ce712b2ee1
- */
-.balign 32
-exp:
-  .word 0x712b2ee1
-  .word 0x4f4cb3ce
-  .word 0xe42b6689
-  .word 0x3bc467dd
-  .word 0xa8587299
-  .word 0xbff31362
-  .word 0x537f397f
-  .word 0xdb993fed
-  .word 0x4cfab389
-  .word 0xa4f38176
-  .word 0x225ee47a
-  .word 0xcdd1c24e
-  .word 0xbe0af6f3
-  .word 0x9395ac4c
-  .word 0xee0053bb
-  .word 0x11670cd7
-  .word 0x7edb5224
-  .word 0x366de08c
-  .word 0x35fc509d
-  .word 0x9aa3eb19
-  .word 0xc0a256da
-  .word 0x4cfae81e
-  .word 0x4ee355f4
-  .word 0x42371e4c
-  .word 0xc65ed7f7
-  .word 0xdf72ecf1
-  .word 0x3196a128
-  .word 0x3c262a80
-  .word 0x55d11ab6
-  .word 0xcbed2646
-  .word 0xf391e010
-  .word 0xb6c7d812
-  .word 0x207502fb
-  .word 0x03f71b03
-  .word 0x6b03dec4
-  .word 0xf623a0dd
-  .word 0xd13e5f86
-  .word 0x398ec9f8
-  .word 0xd906f68c
-  .word 0x7e7b5d23
-  .word 0x1f2ca574
-  .word 0x660128de
-  .word 0xf2d2e39b
-  .word 0x6357a98b
-  .word 0x24eb0bce
-  .word 0x2241cbe9
-  .word 0x18a4c324
-  .word 0xcd200aaf
-  .word 0xac011974
-  .word 0x5435703c
-  .word 0x627050a9
-  .word 0xcc9b4143
-  .word 0x60e51918
-  .word 0x7965ebac
-  .word 0x4e700e53
-  .word 0x13007293
-  .word 0xe99bafe4
-  .word 0x0124878f
-  .word 0x3be2b834
-  .word 0x7651fdaa
-  .word 0x46edfd3e
-  .word 0x4ac3abe7
-  .word 0x295a7da3
-  .word 0x51a84a52
-
-/* output buffer */
-.balign 32
-result:
-.zero 256
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 256
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_2048_enc_test.exp b/sw/otbn/crypto/tests/rsa_2048_enc_test.exp
deleted file mode 100644
index a8f658f900318..0000000000000
--- a/sw/otbn/crypto/tests/rsa_2048_enc_test.exp
+++ /dev/null
@@ -1,10 +0,0 @@
-# Expected result (base ^ 65537) mod n =
-# 0x95fb986cd4aeee4b013effc1d183670380a9e2133ecc6a38dbbfff3f8ef20e1923a5e3741eac8772ee80f28994968fcabd6d454b7791263872bc68d97b6f4fbb76cee24f205d812ad36f2fcb6c11145943009a051c39c18c45b53ee19e51df0254b31eb991783718fb35c51dec249956bceb0276eaee88d8ecdeae2c08ac62a0018408af3923206e911a7ecf6ad786255fa69d63d333e6f44ebd3f5e6ebb7c82443c694d913e200492c89f046943f2dc7d8cf9951c6a33fa721558d1956fb552349ded082714be6a8bff775fd05162744d229fc9fac72509476bdc6434e5187bf3a1cc426cc13f0a10dcf0d15f28abcecfe5674782f232464b1a890d42b6fdd0
-w0 = 0xf3a1cc426cc13f0a10dcf0d15f28abcecfe5674782f232464b1a890d42b6fdd0
-w1 = 0x349ded082714be6a8bff775fd05162744d229fc9fac72509476bdc6434e5187b
-w2 = 0x443c694d913e200492c89f046943f2dc7d8cf9951c6a33fa721558d1956fb552
-w3 = 0x018408af3923206e911a7ecf6ad786255fa69d63d333e6f44ebd3f5e6ebb7c82
-w4 = 0x54b31eb991783718fb35c51dec249956bceb0276eaee88d8ecdeae2c08ac62a0
-w5 = 0x76cee24f205d812ad36f2fcb6c11145943009a051c39c18c45b53ee19e51df02
-w6 = 0x23a5e3741eac8772ee80f28994968fcabd6d454b7791263872bc68d97b6f4fbb
-w7 = 0x95fb986cd4aeee4b013effc1d183670380a9e2133ecc6a38dbbfff3f8ef20e19
diff --git a/sw/otbn/crypto/tests/rsa_2048_enc_test.hjson b/sw/otbn/crypto/tests/rsa_2048_enc_test.hjson
new file mode 100644
index 0000000000000..12420ac069b25
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_2048_enc_test.hjson
@@ -0,0 +1,25 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xb5ed720fe7e1b4a65494e8e9421df94910811d23854cb07b08a34508b682b188b16fa70e4804b4c4f54a54ae2a10848abc9253ac7c6085e5b9abcbcd48515db1626b01df4e7f5f1c85b9ce1b4c8d0f77f3854c8bc4f350ad4d993a6815d0d62ac83b47a257adb40023e1acf003d27953f19c5cbede1af58e42ef12ad9907c20ca428f8b7dbb6f3434936b1108d17ee343d7127f8885ff2513eb834c17bf1c4ddec0d61cc26f5f683c10c0e48676608811e9341f2898f690bc9fafd3b7e46d375e2178a141faf0d637767da550de4c5b9939af133ceba7cd2734df4ad269c166180afd8c35060de8ac302ca911aa3f92d139ed1595523a7f6c201cfafed4c17b5",
+      "inout": "0x6add9548af50f1bea3cb921205a5bb92ee325e01d160e3738a09aa0df7050e6051d693440f0d00cdd56cee5a748ff3b48b1df7be05808ad20068ad387b8b5e4c25c79bba9f87ef971da926f644c26d4273829fd69db71f9eded2cd1a33c367578550346ada160daa272940dd6fc10dae4a0facef437ece40130301c1b847203cc0defd3620ce89d96fa21d30ee63e458b0198adc842f68af8b462df6014955ab68f663a9b5e77caf15a517ab0931308bf9591cecc7691780a2f3bd99d3ce25433d31537e7cab1b4c07d99199e9517132188150d38d633c2b3ef6ba6fb40504e800fca580beb7a19f2315adb451be690fc4f87ea5914d28d5562dc1dce115a852"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0xf3a1cc426cc13f0a10dcf0d15f28abcecfe5674782f232464b1a890d42b6fdd0",
+      "w1": "0x349ded082714be6a8bff775fd05162744d229fc9fac72509476bdc6434e5187b",
+      "w2": "0x443c694d913e200492c89f046943f2dc7d8cf9951c6a33fa721558d1956fb552",
+      "w3": "0x018408af3923206e911a7ecf6ad786255fa69d63d333e6f44ebd3f5e6ebb7c82",
+      "w4": "0x54b31eb991783718fb35c51dec249956bceb0276eaee88d8ecdeae2c08ac62a0",
+      "w5": "0x76cee24f205d812ad36f2fcb6c11145943009a051c39c18c45b53ee19e51df02",
+      "w6": "0x23a5e3741eac8772ee80f28994968fcabd6d454b7791263872bc68d97b6f4fbb",
+      "w7": "0x95fb986cd4aeee4b013effc1d183670380a9e2133ecc6a38dbbfff3f8ef20e19"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_2048_enc_test.s b/sw/otbn/crypto/tests/rsa_2048_enc_test.s
index 2773360673b67..39fa0562fc5fe 100644
--- a/sw/otbn/crypto/tests/rsa_2048_enc_test.s
+++ b/sw/otbn/crypto/tests/rsa_2048_enc_test.s
@@ -16,186 +16,23 @@ main:
   li    x30, 8
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[result] = dmem[base]^dmem[exp] mod dmem[modulus] */
-  la       x14, base
-  la       x2, result
+       dmem[work_buf] = dmem[inout]^dmem[d] mod dmem[n] */
+  la       x14, inout
+  la       x2, work_buf
   jal      x1, modexp_65537
 
   /* copy all limbs of result to wide reg file */
-  la       x21, result
+  la       x21, work_buf
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-.data
-
-/* Modulus n =
-
-0xb5ed720fe7e1b4a65494e8e9421df94910811d23854cb07b08a34508b682b188b16fa70e4804b4c4f54a54ae2a10848abc9253ac7c6085e5b9abcbcd48515db1626b01df4e7f5f1c85b9ce1b4c8d0f77f3854c8bc4f350ad4d993a6815d0d62ac83b47a257adb40023e1acf003d27953f19c5cbede1af58e42ef12ad9907c20ca428f8b7dbb6f3434936b1108d17ee343d7127f8885ff2513eb834c17bf1c4ddec0d61cc26f5f683c10c0e48676608811e9341f2898f690bc9fafd3b7e46d375e2178a141faf0d637767da550de4c5b9939af133ceba7cd2734df4ad269c166180afd8c35060de8ac302ca911aa3f92d139ed1595523a7f6c201cfafed4c17b5
- */
-.balign 32
-modulus:
-  .word 0xed4c17b5
-  .word 0xc201cfaf
-  .word 0x5523a7f6
-  .word 0x139ed159
-  .word 0x1aa3f92d
-  .word 0xc302ca91
-  .word 0x5060de8a
-  .word 0x80afd8c3
-  .word 0x269c1661
-  .word 0x734df4ad
-  .word 0xceba7cd2
-  .word 0x939af133
-  .word 0x0de4c5b9
-  .word 0x7767da55
-  .word 0x1faf0d63
-  .word 0xe2178a14
-  .word 0x7e46d375
-  .word 0xc9fafd3b
-  .word 0x898f690b
-  .word 0x1e9341f2
-  .word 0x67660881
-  .word 0xc10c0e48
-  .word 0x26f5f683
-  .word 0xec0d61cc
-  .word 0x7bf1c4dd
-  .word 0x3eb834c1
-  .word 0x885ff251
-  .word 0x3d7127f8
-  .word 0x8d17ee34
-  .word 0x4936b110
-  .word 0xdbb6f343
-  .word 0xa428f8b7
-  .word 0x9907c20c
-  .word 0x42ef12ad
-  .word 0xde1af58e
-  .word 0xf19c5cbe
-  .word 0x03d27953
-  .word 0x23e1acf0
-  .word 0x57adb400
-  .word 0xc83b47a2
-  .word 0x15d0d62a
-  .word 0x4d993a68
-  .word 0xc4f350ad
-  .word 0xf3854c8b
-  .word 0x4c8d0f77
-  .word 0x85b9ce1b
-  .word 0x4e7f5f1c
-  .word 0x626b01df
-  .word 0x48515db1
-  .word 0xb9abcbcd
-  .word 0x7c6085e5
-  .word 0xbc9253ac
-  .word 0x2a10848a
-  .word 0xf54a54ae
-  .word 0x4804b4c4
-  .word 0xb16fa70e
-  .word 0xb682b188
-  .word 0x08a34508
-  .word 0x854cb07b
-  .word 0x10811d23
-  .word 0x421df949
-  .word 0x5494e8e9
-  .word 0xe7e1b4a6
-  .word 0xb5ed720f
-
-
-/* Base for exponentiation (corresponds to plaintext for encryption or
-   signature for verification).
-
-   Raw hex value (randomly generated) =
-0x6add9548af50f1bea3cb921205a5bb92ee325e01d160e3738a09aa0df7050e6051d693440f0d00cdd56cee5a748ff3b48b1df7be05808ad20068ad387b8b5e4c25c79bba9f87ef971da926f644c26d4273829fd69db71f9eded2cd1a33c367578550346ada160daa272940dd6fc10dae4a0facef437ece40130301c1b847203cc0defd3620ce89d96fa21d30ee63e458b0198adc842f68af8b462df6014955ab68f663a9b5e77caf15a517ab0931308bf9591cecc7691780a2f3bd99d3ce25433d31537e7cab1b4c07d99199e9517132188150d38d633c2b3ef6ba6fb40504e800fca580beb7a19f2315adb451be690fc4f87ea5914d28d5562dc1dce115a852
- */
-.balign 32
-base:
-  .word 0xe115a852
-  .word 0x562dc1dc
-  .word 0x914d28d5
-  .word 0xc4f87ea5
-  .word 0x51be690f
-  .word 0x2315adb4
-  .word 0xbeb7a19f
-  .word 0x00fca580
-  .word 0xb40504e8
-  .word 0x3ef6ba6f
-  .word 0x8d633c2b
-  .word 0x188150d3
-  .word 0xe9517132
-  .word 0x07d99199
-  .word 0x7cab1b4c
-  .word 0x3d31537e
-  .word 0xd3ce2543
-  .word 0xa2f3bd99
-  .word 0xc7691780
-  .word 0xf9591cec
-  .word 0x0931308b
-  .word 0x15a517ab
-  .word 0xb5e77caf
-  .word 0x68f663a9
-  .word 0x014955ab
-  .word 0x8b462df6
-  .word 0x842f68af
-  .word 0xb0198adc
-  .word 0xee63e458
-  .word 0x6fa21d30
-  .word 0x20ce89d9
-  .word 0xc0defd36
-  .word 0xb847203c
-  .word 0x130301c1
-  .word 0x437ece40
-  .word 0x4a0facef
-  .word 0x6fc10dae
-  .word 0x272940dd
-  .word 0xda160daa
-  .word 0x8550346a
-  .word 0x33c36757
-  .word 0xded2cd1a
-  .word 0x9db71f9e
-  .word 0x73829fd6
-  .word 0x44c26d42
-  .word 0x1da926f6
-  .word 0x9f87ef97
-  .word 0x25c79bba
-  .word 0x7b8b5e4c
-  .word 0x0068ad38
-  .word 0x05808ad2
-  .word 0x8b1df7be
-  .word 0x748ff3b4
-  .word 0xd56cee5a
-  .word 0x0f0d00cd
-  .word 0x51d69344
-  .word 0xf7050e60
-  .word 0x8a09aa0d
-  .word 0xd160e373
-  .word 0xee325e01
-  .word 0x05a5bb92
-  .word 0xa3cb9212
-  .word 0xaf50f1be
-  .word 0x6add9548
-
-/* output buffer */
-.balign 32
-result:
-.zero 256
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 256
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_3072_dec_test.exp b/sw/otbn/crypto/tests/rsa_3072_dec_test.exp
deleted file mode 100644
index 55a478ea26c50..0000000000000
--- a/sw/otbn/crypto/tests/rsa_3072_dec_test.exp
+++ /dev/null
@@ -1,14 +0,0 @@
-# Expected value:
-# 0x77d133acf99844910deadefd84b95fc010959a01e040c559c691ac8ff0410b369453478a7ca56f74e3f6a1ea1fef9ef490d8a9c0bd385c49e7b3934e93a52e44d49a7737b8153b295d9baf4ef032d00c61609458ddeeaf73a243670ce7fb188e20fb15b6c01c08c825d5f67547c679a1693dd04360813be3cd28c6e5a0d1dca66b410977470710a1f0b3463659be0e6d5946a4adccfae5e555a9360f44dec7b2a311ea186a6bc574fe00b89dc254481c78db835a1971ae2b22ce2caa06dee69a6b25fbef290e351a3aafc3850265ed51dc3237ea918727f9419aa4c335ba80f69a5205d277ff71b47b939780366179f7471ba6b451c21c2d4c288daa2ffc9fc4349e498c2d869021dc9214406c51ee9735d0341225efbb549f3e7b2939e90d211ebeaf5a2711926d53a32c790616502d02c483f3b357d23b958d554e478246175a12b90c2970c8ed47e9d376923812f8913cda3a6d88bd93f576cb143072c473156ae1e3925977b3b76bc804f2a5feeec49499c54463b55921e4c0d24e0bb41d
-w0 = 0x156ae1e3925977b3b76bc804f2a5feeec49499c54463b55921e4c0d24e0bb41d
-w1 = 0x5a12b90c2970c8ed47e9d376923812f8913cda3a6d88bd93f576cb143072c473
-w2 = 0x1ebeaf5a2711926d53a32c790616502d02c483f3b357d23b958d554e47824617
-w3 = 0x349e498c2d869021dc9214406c51ee9735d0341225efbb549f3e7b2939e90d21
-w4 = 0x9a5205d277ff71b47b939780366179f7471ba6b451c21c2d4c288daa2ffc9fc4
-w5 = 0x6b25fbef290e351a3aafc3850265ed51dc3237ea918727f9419aa4c335ba80f6
-w6 = 0xa311ea186a6bc574fe00b89dc254481c78db835a1971ae2b22ce2caa06dee69a
-w7 = 0x6b410977470710a1f0b3463659be0e6d5946a4adccfae5e555a9360f44dec7b2
-w8 = 0x20fb15b6c01c08c825d5f67547c679a1693dd04360813be3cd28c6e5a0d1dca6
-w9 = 0xd49a7737b8153b295d9baf4ef032d00c61609458ddeeaf73a243670ce7fb188e
-w10 = 0x9453478a7ca56f74e3f6a1ea1fef9ef490d8a9c0bd385c49e7b3934e93a52e44
-w11 = 0x77d133acf99844910deadefd84b95fc010959a01e040c559c691ac8ff0410b36
diff --git a/sw/otbn/crypto/tests/rsa_3072_dec_test.hjson b/sw/otbn/crypto/tests/rsa_3072_dec_test.hjson
new file mode 100644
index 0000000000000..66ce317dbce1f
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_3072_dec_test.hjson
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xb2e73fd1e1dce003def2f2795a1400f2514256a70fe83d64ae8464f114839c94d975c89f97b3598b48de7a560b867b4967ae92d3552f0b204c000b0841f5fac3ef0ba000acfb517a995cf708e46c670a885626d7865ebc5bccc509bc562a4ffc956eb3b859e43bc83debe4888e3e6a55de852c027a874b9c803598a78f4196800db785d91730e8708b8cef986c6d326c9a003201737cb3f5e42cd601c47d74898105671d446b9a5c8a835286f419682fc4b69e79a8d2f9f6aabca5b0c311dabe6fb19d3e03045a729b3107f21370935c6de2316876afae55aeb4da07b8a04aafc1f7717f8d571f47c1a0f395e4ce78ed581db853bda1cb6f224fc4b2c6244611d416b2e729c54ef638d7bd94483b11b56b7b613c06b2564c08de82ef33dff23892e183fd6e96713bfaf76b792c4e8071f3dd5ad695e3748179bebb97140efaabce02687b401b93a513b80b5ec334d38c0b331f90d1454c9b8f3b87017b5174f1d2b75c27fff6e89a3ae099fb0455b5cc9d3bd4840baf510e4d80dbbac4049efb",
+      "r0": "0x1273e84d4509b08a748a9bf81808f0a2387616159d3b04b32ab172285440f09f69f53e37a7cb6a6fc3fb0626a4dad7b64417570b4e112843bd3c82030fb4a01ba9ba2c194e98d51372b9a63153d7279c62452592d597c85dc493d167735918d89c4aa86d20073a0d6ce2a3bf7dc603d73efb38c5ff6fb191db117f8cf4cb0b46e995bfa0e4cee3a055fc44e496989f7248e95c6e3f4879d2c38118f51a0910d37030ddf0a39a0e6e0e3e4be9b0d12e8d25f337657e7f752fa63defebd91b2c107a00475fde78b38da4ca12c17160a8d68f6eecb60481e6ae3f3a0dc03ebb82f327dfe85f850d05215af5f7c07cd5932aaec3d17339e75b2ec803d231188942231edd8c43a6bd9b7be638da9911604a3308117ad41cf697273550765bac72a499cf21d4c4406668f569e4b002d75de22d3e5e7d5c7b33131389cffad951b362865106352780474b3c79378169c6998388e5d2782557c228f0fcf1e132e0fc2d14fe03cca340568cfb5c07a00b052304fa0923f1dfcf627a58e0ea093a97af836",
+      # d = 0x1bf6782bb27d670843db3e5a0861d30a0cf86cf9dccb24796daba4e96796f0acf5566b1ec2c3d62da69c9b8b826ea92b7e88b34b53e7affa02d708e26808ee029d04f8a3d265cfc4f55eaa001a4ff54518ad3a91fa5f295ac1e55451bb380edb8071d6a66c6a778ba35e1110e506cd711180483234fb9bae60fdbf980514afd4e10ffbdc443b314192165bc6bbbfcf9f58ecc9e41f2c7126705d2fb00409c5e2ce274d882e0f1188006069504dac00f4626f56d2d637efb905d3c9a418c15c2a9f1b2f1d3fca1461d2b483d3ce354e56f24ebbea9197c2359af199d89cdaf737668626719923e8718ee4f5085ecb1b09aed5f539795ef462f173451e18d04939b2b090fdc6e75bd438be26cc7b0b8244810176d366e6f1b38144510d956f5ed8f5f3f51e50092b54945cf6ecc0a6f317cc44e487dd38f8b3e0f42841ff538d87b75d592fdca3ee5f1eedc81f0d9b2652b5058a3e50b9ab7d266eb0c681f6f829daec744b0cbf7d22d099e96cd3d1e29cb675ecaef5a7d99d35b84ca4d35c6b8d
+      "rsa_d0": "0xfa3ef12b69d911478d3fa233412f197b3db3ff39a8eb5fe82324a0ee8f8a302a353514836c50efe10471240963bd734e4d7485797d2cabca65bf360c8028a9d66c0ffac2e3bbc375adbf3588839118b1f452d565088cd75afab2ad85b9fc9caa117a9dabf4146ff4ad3d0f60fb32259a18bfb65ee36a219402a3c19277c508f0052bb54a238f99d3a78c8a0b90cdc82ff1c194de1f0143b4e6ffce260d225f2dede0299b1bd8e2985a19dd1d3670a7ee260ae7d4b32d09cdbe2a43ea6f4e10a1502e572519ac9f23c43545726de9ba8ee7c93711bbd6d35c2bf220363bd61f7f270055a18cae1c028c4bf8a037294b8aa3d2cd8052c7a26c224c399d81da281db8019ae806bda4abc50bb008a743cfcde0c2584ee3baa81e86b318c50d3d98f6edc15a80faf55d0aaa5e8cba28f628f0a44df121be1213dfefc0d5460712bd46ceefc4d39b40911065c508ac9ba55f0a8cdac34fe5c2243eaf949a6ef727e4ba24ea5ca92931f586b7144237b3774a5f5fecec7f946ea22ce9d54ec47f9f5e89",
+      "rsa_d1": "0xe1c88900dba4764fcee49c69494eca71314b93c074207b914e8f0407e81cc086c0637f9dae9339cca2edbf82e1d3da6533fc36322ecb043067683eeee82047d4f10b026131de0cb158e19f8899deedf4ecffeff4f2d3fe003b57f9d402c49271910b4b0d987e187f0e631e701e34e8eb093ffe6cd791ba3a625e7e0a72d1a724e4244e9667b4a892359ad1cd2b7207b0a92d5d3a002d329296a2e196092b9acf23c7641335d7f3105a79b44d7bdca71a4465b106651ae674bbf98a4e778f4c8bcf35783826668b421681c6a1a3dcf4d815878cfb2a411169b103b9eea70ce848418673d0158df47302af0da869e250830d0738b92b99560ed33f7c83990a61240ab10a15c05aff7ffdb596c4dc484d8961c32e9d855c59ad07f749c89852c62e1832af9eaafc765e3e027a56e850dbe7680915a6632aeb6c0f34fd07f84130c179b29dfc47e37f4f7b28c0b3963e795839df4971b57b8f4389fa2aa876d11c93fe0628e2258e88a4678dab5b60a6a8c3e99900d161c97bb1dc6d0260acc33504"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0":  "0x156ae1e3925977b3b76bc804f2a5feeec49499c54463b55921e4c0d24e0bb41d",
+      "w1":  "0x5a12b90c2970c8ed47e9d376923812f8913cda3a6d88bd93f576cb143072c473",
+      "w2":  "0x1ebeaf5a2711926d53a32c790616502d02c483f3b357d23b958d554e47824617",
+      "w3":  "0x349e498c2d869021dc9214406c51ee9735d0341225efbb549f3e7b2939e90d21",
+      "w4":  "0x9a5205d277ff71b47b939780366179f7471ba6b451c21c2d4c288daa2ffc9fc4",
+      "w5":  "0x6b25fbef290e351a3aafc3850265ed51dc3237ea918727f9419aa4c335ba80f6",
+      "w6":  "0xa311ea186a6bc574fe00b89dc254481c78db835a1971ae2b22ce2caa06dee69a",
+      "w7":  "0x6b410977470710a1f0b3463659be0e6d5946a4adccfae5e555a9360f44dec7b2",
+      "w8":  "0x20fb15b6c01c08c825d5f67547c679a1693dd04360813be3cd28c6e5a0d1dca6",
+      "w9":  "0xd49a7737b8153b295d9baf4ef032d00c61609458ddeeaf73a243670ce7fb188e",
+      "w10": "0x9453478a7ca56f74e3f6a1ea1fef9ef490d8a9c0bd385c49e7b3934e93a52e44",
+      "w11": "0x77d133acf99844910deadefd84b95fc010959a01e040c559c691ac8ff0410b36"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_3072_dec_test.s b/sw/otbn/crypto/tests/rsa_3072_dec_test.s
index 017fa99bfe5c8..c5de67e592bde 100644
--- a/sw/otbn/crypto/tests/rsa_3072_dec_test.s
+++ b/sw/otbn/crypto/tests/rsa_3072_dec_test.s
@@ -12,357 +12,28 @@ main:
   /* Init all-zero register. */
   bn.xor  w31, w31, w31
 
+  /* Enable message blinding. */
+  li x29, 1
+
   /* Load number of limbs. */
   li    x30, 12
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[result] = dmem[base]^dmem[exp] mod dmem[modulus] */
-  la       x14, base
-  la       x15, exp
-  la       x2, result
+       dmem[inout] = dmem[inout]^dmem[d] mod dmem[n] */
   jal      x1, modexp
 
   /* copy all limbs of result to wide reg file */
-  la       x21, result
+  la       x21, r0
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-
-.data
-
-/* Modulus n =
-0xb2e73fd1e1dce003def2f2795a1400f2514256a70fe83d64ae8464f114839c94d975c89f97b3598b48de7a560b867b4967ae92d3552f0b204c000b0841f5fac3ef0ba000acfb517a995cf708e46c670a885626d7865ebc5bccc509bc562a4ffc956eb3b859e43bc83debe4888e3e6a55de852c027a874b9c803598a78f4196800db785d91730e8708b8cef986c6d326c9a003201737cb3f5e42cd601c47d74898105671d446b9a5c8a835286f419682fc4b69e79a8d2f9f6aabca5b0c311dabe6fb19d3e03045a729b3107f21370935c6de2316876afae55aeb4da07b8a04aafc1f7717f8d571f47c1a0f395e4ce78ed581db853bda1cb6f224fc4b2c6244611d416b2e729c54ef638d7bd94483b11b56b7b613c06b2564c08de82ef33dff23892e183fd6e96713bfaf76b792c4e8071f3dd5ad695e3748179bebb97140efaabce02687b401b93a513b80b5ec334d38c0b331f90d1454c9b8f3b87017b5174f1d2b75c27fff6e89a3ae099fb0455b5cc9d3bd4840baf510e4d80dbbac4049efb
- */
-.balign 32
-modulus:
-  .word 0xc4049efb
-  .word 0x4d80dbba
-  .word 0x0baf510e
-  .word 0x9d3bd484
-  .word 0x0455b5cc
-  .word 0x3ae099fb
-  .word 0xfff6e89a
-  .word 0xd2b75c27
-  .word 0x7b5174f1
-  .word 0x8f3b8701
-  .word 0xd1454c9b
-  .word 0x0b331f90
-  .word 0xc334d38c
-  .word 0x13b80b5e
-  .word 0x401b93a5
-  .word 0xce02687b
-  .word 0x140efaab
-  .word 0x79bebb97
-  .word 0x95e37481
-  .word 0xf3dd5ad6
-  .word 0x2c4e8071
-  .word 0xfaf76b79
-  .word 0x6e96713b
-  .word 0x92e183fd
-  .word 0x33dff238
-  .word 0x08de82ef
-  .word 0x06b2564c
-  .word 0x6b7b613c
-  .word 0x483b11b5
-  .word 0x38d7bd94
-  .word 0x29c54ef6
-  .word 0xd416b2e7
-  .word 0xc6244611
-  .word 0x224fc4b2
-  .word 0xbda1cb6f
-  .word 0x581db853
-  .word 0xe4ce78ed
-  .word 0xc1a0f395
-  .word 0x8d571f47
-  .word 0xc1f7717f
-  .word 0xb8a04aaf
-  .word 0xaeb4da07
-  .word 0x76afae55
-  .word 0x6de23168
-  .word 0x1370935c
-  .word 0x9b3107f2
-  .word 0x03045a72
-  .word 0x6fb19d3e
-  .word 0xc311dabe
-  .word 0xaabca5b0
-  .word 0xa8d2f9f6
-  .word 0xc4b69e79
-  .word 0xf419682f
-  .word 0x8a835286
-  .word 0x446b9a5c
-  .word 0x8105671d
-  .word 0xc47d7489
-  .word 0xe42cd601
-  .word 0x737cb3f5
-  .word 0x9a003201
-  .word 0x6c6d326c
-  .word 0x8b8cef98
-  .word 0x1730e870
-  .word 0x0db785d9
-  .word 0x8f419680
-  .word 0x803598a7
-  .word 0x7a874b9c
-  .word 0xde852c02
-  .word 0x8e3e6a55
-  .word 0x3debe488
-  .word 0x59e43bc8
-  .word 0x956eb3b8
-  .word 0x562a4ffc
-  .word 0xccc509bc
-  .word 0x865ebc5b
-  .word 0x885626d7
-  .word 0xe46c670a
-  .word 0x995cf708
-  .word 0xacfb517a
-  .word 0xef0ba000
-  .word 0x41f5fac3
-  .word 0x4c000b08
-  .word 0x552f0b20
-  .word 0x67ae92d3
-  .word 0x0b867b49
-  .word 0x48de7a56
-  .word 0x97b3598b
-  .word 0xd975c89f
-  .word 0x14839c94
-  .word 0xae8464f1
-  .word 0x0fe83d64
-  .word 0x514256a7
-  .word 0x5a1400f2
-  .word 0xdef2f279
-  .word 0xe1dce003
-  .word 0xb2e73fd1
-
-/* Base for exponentiation (corresponds to ciphertext for decryption or
-   message for signing).
-
-   Raw hex value =
-0x1273e84d4509b08a748a9bf81808f0a2387616159d3b04b32ab172285440f09f69f53e37a7cb6a6fc3fb0626a4dad7b64417570b4e112843bd3c82030fb4a01ba9ba2c194e98d51372b9a63153d7279c62452592d597c85dc493d167735918d89c4aa86d20073a0d6ce2a3bf7dc603d73efb38c5ff6fb191db117f8cf4cb0b46e995bfa0e4cee3a055fc44e496989f7248e95c6e3f4879d2c38118f51a0910d37030ddf0a39a0e6e0e3e4be9b0d12e8d25f337657e7f752fa63defebd91b2c107a00475fde78b38da4ca12c17160a8d68f6eecb60481e6ae3f3a0dc03ebb82f327dfe85f850d05215af5f7c07cd5932aaec3d17339e75b2ec803d231188942231edd8c43a6bd9b7be638da9911604a3308117ad41cf697273550765bac72a499cf21d4c4406668f569e4b002d75de22d3e5e7d5c7b33131389cffad951b362865106352780474b3c79378169c6998388e5d2782557c228f0fcf1e132e0fc2d14fe03cca340568cfb5c07a00b052304fa0923f1dfcf627a58e0ea093a97af836
- */
-.balign 32
-base:
-  .word 0xa97af836
-  .word 0x8e0ea093
-  .word 0xfcf627a5
-  .word 0xa0923f1d
-  .word 0xb052304f
-  .word 0xb5c07a00
-  .word 0x340568cf
-  .word 0x4fe03cca
-  .word 0x2e0fc2d1
-  .word 0x0fcf1e13
-  .word 0x557c228f
-  .word 0x8e5d2782
-  .word 0x9c699838
-  .word 0xc7937816
-  .word 0x780474b3
-  .word 0x65106352
-  .word 0x951b3628
-  .word 0x389cffad
-  .word 0xc7b33131
-  .word 0xd3e5e7d5
-  .word 0x2d75de22
-  .word 0x569e4b00
-  .word 0x4406668f
-  .word 0x9cf21d4c
-  .word 0xbac72a49
-  .word 0x73550765
-  .word 0x41cf6972
-  .word 0x308117ad
-  .word 0x911604a3
-  .word 0xbe638da9
-  .word 0x3a6bd9b7
-  .word 0x31edd8c4
-  .word 0x11889422
-  .word 0xec803d23
-  .word 0x339e75b2
-  .word 0xaaec3d17
-  .word 0x07cd5932
-  .word 0x15af5f7c
-  .word 0xf850d052
-  .word 0x327dfe85
-  .word 0x03ebb82f
-  .word 0xe3f3a0dc
-  .word 0x60481e6a
-  .word 0x68f6eecb
-  .word 0x17160a8d
-  .word 0xda4ca12c
-  .word 0xfde78b38
-  .word 0x07a00475
-  .word 0xbd91b2c1
-  .word 0xfa63defe
-  .word 0x57e7f752
-  .word 0xd25f3376
-  .word 0x9b0d12e8
-  .word 0xe0e3e4be
-  .word 0x0a39a0e6
-  .word 0x37030ddf
-  .word 0x51a0910d
-  .word 0x2c38118f
-  .word 0xe3f4879d
-  .word 0x248e95c6
-  .word 0x496989f7
-  .word 0x055fc44e
-  .word 0x0e4cee3a
-  .word 0x6e995bfa
-  .word 0xcf4cb0b4
-  .word 0x1db117f8
-  .word 0x5ff6fb19
-  .word 0x73efb38c
-  .word 0xf7dc603d
-  .word 0xd6ce2a3b
-  .word 0xd20073a0
-  .word 0x89c4aa86
-  .word 0x7735918d
-  .word 0xdc493d16
-  .word 0x2d597c85
-  .word 0xc6245259
-  .word 0x153d7279
-  .word 0x372b9a63
-  .word 0x94e98d51
-  .word 0xba9ba2c1
-  .word 0x30fb4a01
-  .word 0x3bd3c820
-  .word 0xb4e11284
-  .word 0x64417570
-  .word 0x6a4dad7b
-  .word 0xfc3fb062
-  .word 0x7a7cb6a6
-  .word 0xf69f53e3
-  .word 0x85440f09
-  .word 0x32ab1722
-  .word 0x59d3b04b
-  .word 0x23876161
-  .word 0x81808f0a
-  .word 0xa748a9bf
-  .word 0xd4509b08
-  .word 0x01273e84
-
-/* Private exponent d =
-0x1bf6782bb27d670843db3e5a0861d30a0cf86cf9dccb24796daba4e96796f0acf5566b1ec2c3d62da69c9b8b826ea92b7e88b34b53e7affa02d708e26808ee029d04f8a3d265cfc4f55eaa001a4ff54518ad3a91fa5f295ac1e55451bb380edb8071d6a66c6a778ba35e1110e506cd711180483234fb9bae60fdbf980514afd4e10ffbdc443b314192165bc6bbbfcf9f58ecc9e41f2c7126705d2fb00409c5e2ce274d882e0f1188006069504dac00f4626f56d2d637efb905d3c9a418c15c2a9f1b2f1d3fca1461d2b483d3ce354e56f24ebbea9197c2359af199d89cdaf737668626719923e8718ee4f5085ecb1b09aed5f539795ef462f173451e18d04939b2b090fdc6e75bd438be26cc7b0b8244810176d366e6f1b38144510d956f5ed8f5f3f51e50092b54945cf6ecc0a6f317cc44e487dd38f8b3e0f42841ff538d87b75d592fdca3ee5f1eedc81f0d9b2652b5058a3e50b9ab7d266eb0c681f6f829daec744b0cbf7d22d099e96cd3d1e29cb675ecaef5a7d99d35b84ca4d35c6b8d
- */
-.balign 32
-exp:
-  .word 0xd35c6b8d
-  .word 0x35b84ca4
-  .word 0xf5a7d99d
-  .word 0xb675ecae
-  .word 0xd3d1e29c
-  .word 0xd099e96c
-  .word 0x0cbf7d22
-  .word 0xdaec744b
-  .word 0x81f6f829
-  .word 0x266eb0c6
-  .word 0x50b9ab7d
-  .word 0xb5058a3e
-  .word 0x0d9b2652
-  .word 0x1eedc81f
-  .word 0xdca3ee5f
-  .word 0xb75d592f
-  .word 0xff538d87
-  .word 0xe0f42841
-  .word 0xdd38f8b3
-  .word 0xcc44e487
-  .word 0xc0a6f317
-  .word 0x945cf6ec
-  .word 0x50092b54
-  .word 0xf5f3f51e
-  .word 0x956f5ed8
-  .word 0x8144510d
-  .word 0x66e6f1b3
-  .word 0x810176d3
-  .word 0x7b0b8244
-  .word 0x38be26cc
-  .word 0xc6e75bd4
-  .word 0xb2b090fd
-  .word 0x18d04939
-  .word 0xf173451e
-  .word 0x795ef462
-  .word 0xaed5f539
-  .word 0x5ecb1b09
-  .word 0x8ee4f508
-  .word 0x9923e871
-  .word 0x66862671
-  .word 0x9cdaf737
-  .word 0x9af199d8
-  .word 0x9197c235
-  .word 0xf24ebbea
-  .word 0xce354e56
-  .word 0xd2b483d3
-  .word 0x3fca1461
-  .word 0x9f1b2f1d
-  .word 0x18c15c2a
-  .word 0x05d3c9a4
-  .word 0xd637efb9
-  .word 0x626f56d2
-  .word 0x4dac00f4
-  .word 0x00606950
-  .word 0x2e0f1188
-  .word 0xce274d88
-  .word 0x0409c5e2
-  .word 0x705d2fb0
-  .word 0x1f2c7126
-  .word 0x58ecc9e4
-  .word 0xbbbfcf9f
-  .word 0x92165bc6
-  .word 0x443b3141
-  .word 0xe10ffbdc
-  .word 0x0514afd4
-  .word 0x60fdbf98
-  .word 0x34fb9bae
-  .word 0x11804832
-  .word 0xe506cd71
-  .word 0xa35e1110
-  .word 0x6c6a778b
-  .word 0x8071d6a6
-  .word 0xbb380edb
-  .word 0xc1e55451
-  .word 0xfa5f295a
-  .word 0x18ad3a91
-  .word 0x1a4ff545
-  .word 0xf55eaa00
-  .word 0xd265cfc4
-  .word 0x9d04f8a3
-  .word 0x6808ee02
-  .word 0x02d708e2
-  .word 0x53e7affa
-  .word 0x7e88b34b
-  .word 0x826ea92b
-  .word 0xa69c9b8b
-  .word 0xc2c3d62d
-  .word 0xf5566b1e
-  .word 0x6796f0ac
-  .word 0x6daba4e9
-  .word 0xdccb2479
-  .word 0x0cf86cf9
-  .word 0x0861d30a
-  .word 0x43db3e5a
-  .word 0xb27d6708
-  .word 0x1bf6782b
-
-
-/* output buffer */
-.balign 32
-result:
-.zero 384
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 384
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_3072_enc_test.exp b/sw/otbn/crypto/tests/rsa_3072_enc_test.exp
deleted file mode 100644
index 6ef8409ea67ed..0000000000000
--- a/sw/otbn/crypto/tests/rsa_3072_enc_test.exp
+++ /dev/null
@@ -1,14 +0,0 @@
-# Expected value:
-# 0x1273e84d4509b08a748a9bf81808f0a2387616159d3b04b32ab172285440f09f69f53e37a7cb6a6fc3fb0626a4dad7b64417570b4e112843bd3c82030fb4a01ba9ba2c194e98d51372b9a63153d7279c62452592d597c85dc493d167735918d89c4aa86d20073a0d6ce2a3bf7dc603d73efb38c5ff6fb191db117f8cf4cb0b46e995bfa0e4cee3a055fc44e496989f7248e95c6e3f4879d2c38118f51a0910d37030ddf0a39a0e6e0e3e4be9b0d12e8d25f337657e7f752fa63defebd91b2c107a00475fde78b38da4ca12c17160a8d68f6eecb60481e6ae3f3a0dc03ebb82f327dfe85f850d05215af5f7c07cd5932aaec3d17339e75b2ec803d231188942231edd8c43a6bd9b7be638da9911604a3308117ad41cf697273550765bac72a499cf21d4c4406668f569e4b002d75de22d3e5e7d5c7b33131389cffad951b362865106352780474b3c79378169c6998388e5d2782557c228f0fcf1e132e0fc2d14fe03cca340568cfb5c07a00b052304fa0923f1dfcf627a58e0ea093a97af836
-w0 = 0x4fe03cca340568cfb5c07a00b052304fa0923f1dfcf627a58e0ea093a97af836
-w1 = 0x65106352780474b3c79378169c6998388e5d2782557c228f0fcf1e132e0fc2d1
-w2 = 0x9cf21d4c4406668f569e4b002d75de22d3e5e7d5c7b33131389cffad951b3628
-w3 = 0x31edd8c43a6bd9b7be638da9911604a3308117ad41cf697273550765bac72a49
-w4 = 0x327dfe85f850d05215af5f7c07cd5932aaec3d17339e75b2ec803d2311889422
-w5 = 0x07a00475fde78b38da4ca12c17160a8d68f6eecb60481e6ae3f3a0dc03ebb82f
-w6 = 0x37030ddf0a39a0e6e0e3e4be9b0d12e8d25f337657e7f752fa63defebd91b2c1
-w7 = 0x6e995bfa0e4cee3a055fc44e496989f7248e95c6e3f4879d2c38118f51a0910d
-w8 = 0x89c4aa86d20073a0d6ce2a3bf7dc603d73efb38c5ff6fb191db117f8cf4cb0b4
-w9 = 0xba9ba2c194e98d51372b9a63153d7279c62452592d597c85dc493d167735918d
-w10 = 0xf69f53e37a7cb6a6fc3fb0626a4dad7b64417570b4e112843bd3c82030fb4a01
-w11 = 0x01273e84d4509b08a748a9bf81808f0a2387616159d3b04b32ab172285440f09
diff --git a/sw/otbn/crypto/tests/rsa_3072_enc_test.hjson b/sw/otbn/crypto/tests/rsa_3072_enc_test.hjson
new file mode 100644
index 0000000000000..329082894abc4
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_3072_enc_test.hjson
@@ -0,0 +1,29 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xb2e73fd1e1dce003def2f2795a1400f2514256a70fe83d64ae8464f114839c94d975c89f97b3598b48de7a560b867b4967ae92d3552f0b204c000b0841f5fac3ef0ba000acfb517a995cf708e46c670a885626d7865ebc5bccc509bc562a4ffc956eb3b859e43bc83debe4888e3e6a55de852c027a874b9c803598a78f4196800db785d91730e8708b8cef986c6d326c9a003201737cb3f5e42cd601c47d74898105671d446b9a5c8a835286f419682fc4b69e79a8d2f9f6aabca5b0c311dabe6fb19d3e03045a729b3107f21370935c6de2316876afae55aeb4da07b8a04aafc1f7717f8d571f47c1a0f395e4ce78ed581db853bda1cb6f224fc4b2c6244611d416b2e729c54ef638d7bd94483b11b56b7b613c06b2564c08de82ef33dff23892e183fd6e96713bfaf76b792c4e8071f3dd5ad695e3748179bebb97140efaabce02687b401b93a513b80b5ec334d38c0b331f90d1454c9b8f3b87017b5174f1d2b75c27fff6e89a3ae099fb0455b5cc9d3bd4840baf510e4d80dbbac4049efb",
+      "inout": "0x77d133acf99844910deadefd84b95fc010959a01e040c559c691ac8ff0410b369453478a7ca56f74e3f6a1ea1fef9ef490d8a9c0bd385c49e7b3934e93a52e44d49a7737b8153b295d9baf4ef032d00c61609458ddeeaf73a243670ce7fb188e20fb15b6c01c08c825d5f67547c679a1693dd04360813be3cd28c6e5a0d1dca66b410977470710a1f0b3463659be0e6d5946a4adccfae5e555a9360f44dec7b2a311ea186a6bc574fe00b89dc254481c78db835a1971ae2b22ce2caa06dee69a6b25fbef290e351a3aafc3850265ed51dc3237ea918727f9419aa4c335ba80f69a5205d277ff71b47b939780366179f7471ba6b451c21c2d4c288daa2ffc9fc4349e498c2d869021dc9214406c51ee9735d0341225efbb549f3e7b2939e90d211ebeaf5a2711926d53a32c790616502d02c483f3b357d23b958d554e478246175a12b90c2970c8ed47e9d376923812f8913cda3a6d88bd93f576cb143072c473156ae1e3925977b3b76bc804f2a5feeec49499c54463b55921e4c0d24e0bb41d"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0":  "0x4fe03cca340568cfb5c07a00b052304fa0923f1dfcf627a58e0ea093a97af836",
+      "w1":  "0x65106352780474b3c79378169c6998388e5d2782557c228f0fcf1e132e0fc2d1",
+      "w2":  "0x9cf21d4c4406668f569e4b002d75de22d3e5e7d5c7b33131389cffad951b3628",
+      "w3":  "0x31edd8c43a6bd9b7be638da9911604a3308117ad41cf697273550765bac72a49",
+      "w4":  "0x327dfe85f850d05215af5f7c07cd5932aaec3d17339e75b2ec803d2311889422",
+      "w5":  "0x07a00475fde78b38da4ca12c17160a8d68f6eecb60481e6ae3f3a0dc03ebb82f",
+      "w6":  "0x37030ddf0a39a0e6e0e3e4be9b0d12e8d25f337657e7f752fa63defebd91b2c1",
+      "w7":  "0x6e995bfa0e4cee3a055fc44e496989f7248e95c6e3f4879d2c38118f51a0910d",
+      "w8":  "0x89c4aa86d20073a0d6ce2a3bf7dc603d73efb38c5ff6fb191db117f8cf4cb0b4",
+      "w9":  "0xba9ba2c194e98d51372b9a63153d7279c62452592d597c85dc493d167735918d",
+      "w10": "0xf69f53e37a7cb6a6fc3fb0626a4dad7b64417570b4e112843bd3c82030fb4a01",
+      "w11": "0x01273e84d4509b08a748a9bf81808f0a2387616159d3b04b32ab172285440f09"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_3072_enc_test.s b/sw/otbn/crypto/tests/rsa_3072_enc_test.s
index 8f0d511ade992..e8b85fc206d74 100644
--- a/sw/otbn/crypto/tests/rsa_3072_enc_test.s
+++ b/sw/otbn/crypto/tests/rsa_3072_enc_test.s
@@ -16,249 +16,23 @@ main:
   li    x30, 12
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[result] = dmem[base]^dmem[exp] mod dmem[modulus] */
-  la       x14, base
-  la       x2, result
+       dmem[work_buf] = dmem[inout]^dmem[d] mod dmem[n] */
+  la       x14, inout
+  la       x2, work_buf
   jal      x1, modexp_65537
 
   /* copy all limbs of result to wide reg file */
-  la       x21, result
+  la       x21, work_buf
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-.data
-
-/* Modulus n =
-0xb2e73fd1e1dce003def2f2795a1400f2514256a70fe83d64ae8464f114839c94d975c89f97b3598b48de7a560b867b4967ae92d3552f0b204c000b0841f5fac3ef0ba000acfb517a995cf708e46c670a885626d7865ebc5bccc509bc562a4ffc956eb3b859e43bc83debe4888e3e6a55de852c027a874b9c803598a78f4196800db785d91730e8708b8cef986c6d326c9a003201737cb3f5e42cd601c47d74898105671d446b9a5c8a835286f419682fc4b69e79a8d2f9f6aabca5b0c311dabe6fb19d3e03045a729b3107f21370935c6de2316876afae55aeb4da07b8a04aafc1f7717f8d571f47c1a0f395e4ce78ed581db853bda1cb6f224fc4b2c6244611d416b2e729c54ef638d7bd94483b11b56b7b613c06b2564c08de82ef33dff23892e183fd6e96713bfaf76b792c4e8071f3dd5ad695e3748179bebb97140efaabce02687b401b93a513b80b5ec334d38c0b331f90d1454c9b8f3b87017b5174f1d2b75c27fff6e89a3ae099fb0455b5cc9d3bd4840baf510e4d80dbbac4049efb
- */
-.balign 32
-modulus:
-  .word 0xc4049efb
-  .word 0x4d80dbba
-  .word 0x0baf510e
-  .word 0x9d3bd484
-  .word 0x0455b5cc
-  .word 0x3ae099fb
-  .word 0xfff6e89a
-  .word 0xd2b75c27
-  .word 0x7b5174f1
-  .word 0x8f3b8701
-  .word 0xd1454c9b
-  .word 0x0b331f90
-  .word 0xc334d38c
-  .word 0x13b80b5e
-  .word 0x401b93a5
-  .word 0xce02687b
-  .word 0x140efaab
-  .word 0x79bebb97
-  .word 0x95e37481
-  .word 0xf3dd5ad6
-  .word 0x2c4e8071
-  .word 0xfaf76b79
-  .word 0x6e96713b
-  .word 0x92e183fd
-  .word 0x33dff238
-  .word 0x08de82ef
-  .word 0x06b2564c
-  .word 0x6b7b613c
-  .word 0x483b11b5
-  .word 0x38d7bd94
-  .word 0x29c54ef6
-  .word 0xd416b2e7
-  .word 0xc6244611
-  .word 0x224fc4b2
-  .word 0xbda1cb6f
-  .word 0x581db853
-  .word 0xe4ce78ed
-  .word 0xc1a0f395
-  .word 0x8d571f47
-  .word 0xc1f7717f
-  .word 0xb8a04aaf
-  .word 0xaeb4da07
-  .word 0x76afae55
-  .word 0x6de23168
-  .word 0x1370935c
-  .word 0x9b3107f2
-  .word 0x03045a72
-  .word 0x6fb19d3e
-  .word 0xc311dabe
-  .word 0xaabca5b0
-  .word 0xa8d2f9f6
-  .word 0xc4b69e79
-  .word 0xf419682f
-  .word 0x8a835286
-  .word 0x446b9a5c
-  .word 0x8105671d
-  .word 0xc47d7489
-  .word 0xe42cd601
-  .word 0x737cb3f5
-  .word 0x9a003201
-  .word 0x6c6d326c
-  .word 0x8b8cef98
-  .word 0x1730e870
-  .word 0x0db785d9
-  .word 0x8f419680
-  .word 0x803598a7
-  .word 0x7a874b9c
-  .word 0xde852c02
-  .word 0x8e3e6a55
-  .word 0x3debe488
-  .word 0x59e43bc8
-  .word 0x956eb3b8
-  .word 0x562a4ffc
-  .word 0xccc509bc
-  .word 0x865ebc5b
-  .word 0x885626d7
-  .word 0xe46c670a
-  .word 0x995cf708
-  .word 0xacfb517a
-  .word 0xef0ba000
-  .word 0x41f5fac3
-  .word 0x4c000b08
-  .word 0x552f0b20
-  .word 0x67ae92d3
-  .word 0x0b867b49
-  .word 0x48de7a56
-  .word 0x97b3598b
-  .word 0xd975c89f
-  .word 0x14839c94
-  .word 0xae8464f1
-  .word 0x0fe83d64
-  .word 0x514256a7
-  .word 0x5a1400f2
-  .word 0xdef2f279
-  .word 0xe1dce003
-  .word 0xb2e73fd1
-
-
-/* Base for exponentiation (corresponds to plaintext for encryption or
-   signature for verification).
-
-   Raw hex value (randomly generated) =
-0x77d133acf99844910deadefd84b95fc010959a01e040c559c691ac8ff0410b369453478a7ca56f74e3f6a1ea1fef9ef490d8a9c0bd385c49e7b3934e93a52e44d49a7737b8153b295d9baf4ef032d00c61609458ddeeaf73a243670ce7fb188e20fb15b6c01c08c825d5f67547c679a1693dd04360813be3cd28c6e5a0d1dca66b410977470710a1f0b3463659be0e6d5946a4adccfae5e555a9360f44dec7b2a311ea186a6bc574fe00b89dc254481c78db835a1971ae2b22ce2caa06dee69a6b25fbef290e351a3aafc3850265ed51dc3237ea918727f9419aa4c335ba80f69a5205d277ff71b47b939780366179f7471ba6b451c21c2d4c288daa2ffc9fc4349e498c2d869021dc9214406c51ee9735d0341225efbb549f3e7b2939e90d211ebeaf5a2711926d53a32c790616502d02c483f3b357d23b958d554e478246175a12b90c2970c8ed47e9d376923812f8913cda3a6d88bd93f576cb143072c473156ae1e3925977b3b76bc804f2a5feeec49499c54463b55921e4c0d24e0bb41d
- */
-.balign 32
-base:
-  .word 0x4e0bb41d
-  .word 0x21e4c0d2
-  .word 0x4463b559
-  .word 0xc49499c5
-  .word 0xf2a5feee
-  .word 0xb76bc804
-  .word 0x925977b3
-  .word 0x156ae1e3
-  .word 0x3072c473
-  .word 0xf576cb14
-  .word 0x6d88bd93
-  .word 0x913cda3a
-  .word 0x923812f8
-  .word 0x47e9d376
-  .word 0x2970c8ed
-  .word 0x5a12b90c
-  .word 0x47824617
-  .word 0x958d554e
-  .word 0xb357d23b
-  .word 0x02c483f3
-  .word 0x0616502d
-  .word 0x53a32c79
-  .word 0x2711926d
-  .word 0x1ebeaf5a
-  .word 0x39e90d21
-  .word 0x9f3e7b29
-  .word 0x25efbb54
-  .word 0x35d03412
-  .word 0x6c51ee97
-  .word 0xdc921440
-  .word 0x2d869021
-  .word 0x349e498c
-  .word 0x2ffc9fc4
-  .word 0x4c288daa
-  .word 0x51c21c2d
-  .word 0x471ba6b4
-  .word 0x366179f7
-  .word 0x7b939780
-  .word 0x77ff71b4
-  .word 0x9a5205d2
-  .word 0x35ba80f6
-  .word 0x419aa4c3
-  .word 0x918727f9
-  .word 0xdc3237ea
-  .word 0x0265ed51
-  .word 0x3aafc385
-  .word 0x290e351a
-  .word 0x6b25fbef
-  .word 0x06dee69a
-  .word 0x22ce2caa
-  .word 0x1971ae2b
-  .word 0x78db835a
-  .word 0xc254481c
-  .word 0xfe00b89d
-  .word 0x6a6bc574
-  .word 0xa311ea18
-  .word 0x44dec7b2
-  .word 0x55a9360f
-  .word 0xccfae5e5
-  .word 0x5946a4ad
-  .word 0x59be0e6d
-  .word 0xf0b34636
-  .word 0x470710a1
-  .word 0x6b410977
-  .word 0xa0d1dca6
-  .word 0xcd28c6e5
-  .word 0x60813be3
-  .word 0x693dd043
-  .word 0x47c679a1
-  .word 0x25d5f675
-  .word 0xc01c08c8
-  .word 0x20fb15b6
-  .word 0xe7fb188e
-  .word 0xa243670c
-  .word 0xddeeaf73
-  .word 0x61609458
-  .word 0xf032d00c
-  .word 0x5d9baf4e
-  .word 0xb8153b29
-  .word 0xd49a7737
-  .word 0x93a52e44
-  .word 0xe7b3934e
-  .word 0xbd385c49
-  .word 0x90d8a9c0
-  .word 0x1fef9ef4
-  .word 0xe3f6a1ea
-  .word 0x7ca56f74
-  .word 0x9453478a
-  .word 0xf0410b36
-  .word 0xc691ac8f
-  .word 0xe040c559
-  .word 0x10959a01
-  .word 0x84b95fc0
-  .word 0x0deadefd
-  .word 0xf9984491
-  .word 0x77d133ac
-
-/* output buffer */
-.balign 32
-result:
-.zero 384
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 384
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 384
diff --git a/sw/otbn/crypto/tests/rsa_4096_enc_test.exp b/sw/otbn/crypto/tests/rsa_4096_enc_test.exp
deleted file mode 100644
index c4b751cb8b87e..0000000000000
--- a/sw/otbn/crypto/tests/rsa_4096_enc_test.exp
+++ /dev/null
@@ -1,18 +0,0 @@
-# Expected result:
-# 0x74798a179a6112dcfabdd7a1b39dab868d30bf4bcd359bc6eaf3c9b3626089ecd0851b9d077cb5deafe302f71035e179b528af0b9bfc0055caee605fd12f7f1b2251bde06b292a7c1a69227ba00945bacf857252571fb71a94bd353ea9d0a94d0068060b44c7f5bd416be032723581c824799f44ed947eba9008d1cf0c1a21a139f0125494b07540be6f55b53bcdcd51ea2b8fd0af22d08a3a74d0ad55b7e2481dc14fec2bc701276175f9eaa84298536d21de5d92b970760fd8898a2b9212145ce94070d2e5d75a85cbed16c660ecab4e71bac82519d367336e5975676e58cc08208d24dce920812f607713415ba58038bd9745d4aba1de2b11788baaa5146e0ef5f8da023c7049dabfc84434f02c9bb5d488e0caaa2794374396420f3c29456fd16448c13a3da797e741879aa4b55b6eb69313c02366393bc7e64b0220fb46a0eb481afb669af2192964a13e37b8050bf5472456905fb224ef27d4e86684024766be8859d7ebc910b35af5ef334497929e2120afa5f0b46539a9b58a9e725a84db8c290f547733085ae8970cda95069c67064461c368c38e10c5e3f4ae84f7a87ae5850c73cde81c3021d50b0aa1af472dd0b08d5d983ec8fdec9366ef9c52ddf7de6f81bd22e1bb4f7356fa1d40d0384b46c2997ce8d85d6bb594624b8e97f5e6134ee2bd795d89b996000f2c2e49c13d808b1b46f0fde6a8e6715403e9ad
-w0 = 0xf5e6134ee2bd795d89b996000f2c2e49c13d808b1b46f0fde6a8e6715403e9ad
-w1 = 0xddf7de6f81bd22e1bb4f7356fa1d40d0384b46c2997ce8d85d6bb594624b8e97
-w2 = 0xa87ae5850c73cde81c3021d50b0aa1af472dd0b08d5d983ec8fdec9366ef9c52
-w3 = 0x84db8c290f547733085ae8970cda95069c67064461c368c38e10c5e3f4ae84f7
-w4 = 0x4766be8859d7ebc910b35af5ef334497929e2120afa5f0b46539a9b58a9e725a
-w5 = 0xa0eb481afb669af2192964a13e37b8050bf5472456905fb224ef27d4e8668402
-w6 = 0x6fd16448c13a3da797e741879aa4b55b6eb69313c02366393bc7e64b0220fb46
-w7 = 0x0ef5f8da023c7049dabfc84434f02c9bb5d488e0caaa2794374396420f3c2945
-w8 = 0x08208d24dce920812f607713415ba58038bd9745d4aba1de2b11788baaa5146e
-w9 = 0x5ce94070d2e5d75a85cbed16c660ecab4e71bac82519d367336e5975676e58cc
-w10 = 0x1dc14fec2bc701276175f9eaa84298536d21de5d92b970760fd8898a2b921214
-w11 = 0x39f0125494b07540be6f55b53bcdcd51ea2b8fd0af22d08a3a74d0ad55b7e248
-w12 = 0x0068060b44c7f5bd416be032723581c824799f44ed947eba9008d1cf0c1a21a1
-w13 = 0x2251bde06b292a7c1a69227ba00945bacf857252571fb71a94bd353ea9d0a94d
-w14 = 0xd0851b9d077cb5deafe302f71035e179b528af0b9bfc0055caee605fd12f7f1b
-w15 = 0x74798a179a6112dcfabdd7a1b39dab868d30bf4bcd359bc6eaf3c9b3626089ec
diff --git a/sw/otbn/crypto/tests/rsa_4096_enc_test.hjson b/sw/otbn/crypto/tests/rsa_4096_enc_test.hjson
new file mode 100644
index 0000000000000..c08e85c7d3c26
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_4096_enc_test.hjson
@@ -0,0 +1,33 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xb25ab5439b6a703a7ba169f099a766944a86466bd18324b2149a23564261af44f1087a7df201eb2dc9583de79d9db60edd4a17aee8ed7b9384de837d70f5f99ad91695d9c780dde5401f160ce02a6135df0ea2339617b962250cf810a2be45acd43b602eddf1be6321d236e6338272e5bd5cda251a896d1d65eb10e2308f9ba8bcf4fb0836a5439c8a86394acdf2a2a3d0b4ae41b75d52894a8d79adfd1cb8db977d42d4865cd9a426bf1156b86e541469ac5a54bc06231da1db901d548cf53f3f003f7cdeee9b1b9ca7b4049b0e36b8cc7fc6d62967ffbffa593aa5cfbb41c68df57003911cf3ba2516378eaa9ee36da6ce4b09d71f072a79615d5619c8132c5467b56eae8a5e2aaa56ac4aa5dc9f696f89dd0cd0f818cdc8b58c938b336f87179cbb52a6a2965a7fcd619a5b315d370bdefeca9cbd6ea39e853f39d39c14f797ca5c31535c89f883cdfbb3bb1934490b136e46f99d8e5411a2a8b73b2519f43d78ee5cc675dcbcfeac8ef693c09a1aa87785cb5713298fa2edfcc67497cc6dbbc5d911edf7b1b5a735f14ab1870b481cd35279c932c74902faf5f047d84e6bedb88c28fced24b3728c5d9dc1114c46bfded6531873e718372dad28aae0a3c4f06dd81542cb9192783a9107a0263c8add0f23b250472f50b18f0e7719a3ba58ba38bc9ab906f86d0507a44690aba5ee96ef1083c237f2f004bff60bc4ecfb99",
+      "inout": "0x9e67bf21cfb170bd70edb7b9ffb99fbfe6a681f9e17bc8a966bf55d54794b95f9c4ff3657f3eef86433035ec3cc1fd4c092498a59f3fb5ac0b29c1a7a429130509229a001a86f72182354886779211a3f38ae8b864d094f875cc30bfce8df4a999cd6e43ab25c786ebb4d78bd6f439b278937d6d092be28d986564faab071878f0b4982b70af87c2261a0fc4d58b4c5d227cd880b40af25828988a730746b711cd6aaeec67f07b40df881cc8b784f944f4dc9fccac096631baf8ec17201fbacab0f09cbd2e816495820f6a5d7263ab5dd72cee1c1145327e2696066b6103304206c29ace7f13d92b3a7edf3cb9dc3fe5d2da7c22d16319f2fcdf44a9cf14de57cc75f9395b0d1ebd90c107b74ca88d8c99be1e5a4a41d1fa2285ccd8580f4a6206fb4d0cae5945bcd33b5f1308025f660bf96e3e448216b02da98b86d8e9d633e311b2f19fce4dbaa6317d04aaf360ea9245bd0bb70811e64d87accf8ab6339b063ba26b085c85e369f37c2c62a485fab7f2b22edd5f4f6365c3e47fae372ea3e530796473835384e77187ac856b9ebbc3c10f1a0394e9a9c25a8e635a55ac907a011119aa5d00edc26f0b64e9972391ba545a03e003624e0624f824c22710237e8f97a07ffcff0106684f0c17b8df6f975bdd5f286a95f7635416b3e9129aa81e4cee9932dfe177f7f33897412fdde0e8b87f6cc0c54ab2c8f022dcb7fef768"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0":  "0xf5e6134ee2bd795d89b996000f2c2e49c13d808b1b46f0fde6a8e6715403e9ad",
+      "w1":  "0xddf7de6f81bd22e1bb4f7356fa1d40d0384b46c2997ce8d85d6bb594624b8e97",
+      "w2":  "0xa87ae5850c73cde81c3021d50b0aa1af472dd0b08d5d983ec8fdec9366ef9c52",
+      "w3":  "0x84db8c290f547733085ae8970cda95069c67064461c368c38e10c5e3f4ae84f7",
+      "w4":  "0x4766be8859d7ebc910b35af5ef334497929e2120afa5f0b46539a9b58a9e725a",
+      "w5":  "0xa0eb481afb669af2192964a13e37b8050bf5472456905fb224ef27d4e8668402",
+      "w6":  "0x6fd16448c13a3da797e741879aa4b55b6eb69313c02366393bc7e64b0220fb46",
+      "w7":  "0x0ef5f8da023c7049dabfc84434f02c9bb5d488e0caaa2794374396420f3c2945",
+      "w8":  "0x08208d24dce920812f607713415ba58038bd9745d4aba1de2b11788baaa5146e",
+      "w9":  "0x5ce94070d2e5d75a85cbed16c660ecab4e71bac82519d367336e5975676e58cc",
+      "w10": "0x1dc14fec2bc701276175f9eaa84298536d21de5d92b970760fd8898a2b921214",
+      "w11": "0x39f0125494b07540be6f55b53bcdcd51ea2b8fd0af22d08a3a74d0ad55b7e248",
+      "w12": "0x0068060b44c7f5bd416be032723581c824799f44ed947eba9008d1cf0c1a21a1",
+      "w13": "0x2251bde06b292a7c1a69227ba00945bacf857252571fb71a94bd353ea9d0a94d",
+      "w14": "0xd0851b9d077cb5deafe302f71035e179b528af0b9bfc0055caee605fd12f7f1b",
+      "w15": "0x74798a179a6112dcfabdd7a1b39dab868d30bf4bcd359bc6eaf3c9b3626089ec"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_4096_enc_test.s b/sw/otbn/crypto/tests/rsa_4096_enc_test.s
index 5bcefb955e9ac..efa4269f07034 100644
--- a/sw/otbn/crypto/tests/rsa_4096_enc_test.s
+++ b/sw/otbn/crypto/tests/rsa_4096_enc_test.s
@@ -16,314 +16,23 @@ main:
   li    x30, 16
 
   /* Load pointers to modulus and Montgomery constant buffers. */
-  la    x16, modulus
-  la    x17, m0inv
-  la    x18, RR
+  la    x16, rsa_n
+  la    x17, RR
 
   /* Compute Montgomery constants. */
   jal      x1, modload
 
   /* Run exponentiation.
-       dmem[result] = dmem[base]^dmem[exp] mod dmem[modulus] */
-  la       x14, base
-  la       x2, result
+       dmem[work_buf] = dmem[inout]^dmem[d] mod dmem[n] */
+  la       x14, inout
+  la       x2, work_buf
   jal      x1, modexp_65537
 
   /* copy all limbs of result to wide reg file */
-  la       x21, result
+  la       x21, work_buf
   li       x8, 0
   loop     x30, 2
     bn.lid   x8, 0(x21++)
     addi     x8, x8, 1
 
   ecall
-
-.data
-
-/* Modulus n =
-0xb25ab5439b6a703a7ba169f099a766944a86466bd18324b2149a23564261af44f1087a7df201eb2dc9583de79d9db60edd4a17aee8ed7b9384de837d70f5f99ad91695d9c780dde5401f160ce02a6135df0ea2339617b962250cf810a2be45acd43b602eddf1be6321d236e6338272e5bd5cda251a896d1d65eb10e2308f9ba8bcf4fb0836a5439c8a86394acdf2a2a3d0b4ae41b75d52894a8d79adfd1cb8db977d42d4865cd9a426bf1156b86e541469ac5a54bc06231da1db901d548cf53f3f003f7cdeee9b1b9ca7b4049b0e36b8cc7fc6d62967ffbffa593aa5cfbb41c68df57003911cf3ba2516378eaa9ee36da6ce4b09d71f072a79615d5619c8132c5467b56eae8a5e2aaa56ac4aa5dc9f696f89dd0cd0f818cdc8b58c938b336f87179cbb52a6a2965a7fcd619a5b315d370bdefeca9cbd6ea39e853f39d39c14f797ca5c31535c89f883cdfbb3bb1934490b136e46f99d8e5411a2a8b73b2519f43d78ee5cc675dcbcfeac8ef693c09a1aa87785cb5713298fa2edfcc67497cc6dbbc5d911edf7b1b5a735f14ab1870b481cd35279c932c74902faf5f047d84e6bedb88c28fced24b3728c5d9dc1114c46bfded6531873e718372dad28aae0a3c4f06dd81542cb9192783a9107a0263c8add0f23b250472f50b18f0e7719a3ba58ba38bc9ab906f86d0507a44690aba5ee96ef1083c237f2f004bff60bc4ecfb99
- */
-.balign 32
-modulus:
-  .word 0xc4ecfb99
-  .word 0x04bff60b
-  .word 0xc237f2f0
-  .word 0x96ef1083
-  .word 0x90aba5ee
-  .word 0x0507a446
-  .word 0xb906f86d
-  .word 0xba38bc9a
-  .word 0x19a3ba58
-  .word 0xb18f0e77
-  .word 0x50472f50
-  .word 0xdd0f23b2
-  .word 0xa0263c8a
-  .word 0x783a9107
-  .word 0x42cb9192
-  .word 0xf06dd815
-  .word 0xaae0a3c4
-  .word 0x372dad28
-  .word 0x1873e718
-  .word 0xbfded653
-  .word 0xc1114c46
-  .word 0x728c5d9d
-  .word 0xfced24b3
-  .word 0xedb88c28
-  .word 0x47d84e6b
-  .word 0x02faf5f0
-  .word 0xc932c749
-  .word 0x1cd35279
-  .word 0xb1870b48
-  .word 0xa735f14a
-  .word 0xedf7b1b5
-  .word 0xbbc5d911
-  .word 0x7497cc6d
-  .word 0xa2edfcc6
-  .word 0x5713298f
-  .word 0xa87785cb
-  .word 0x93c09a1a
-  .word 0xfeac8ef6
-  .word 0xc675dcbc
-  .word 0x3d78ee5c
-  .word 0x3b2519f4
-  .word 0x11a2a8b7
-  .word 0xf99d8e54
-  .word 0x0b136e46
-  .word 0xbb193449
-  .word 0x83cdfbb3
-  .word 0x535c89f8
-  .word 0x97ca5c31
-  .word 0xd39c14f7
-  .word 0x9e853f39
-  .word 0x9cbd6ea3
-  .word 0x0bdefeca
-  .word 0x5b315d37
-  .word 0x7fcd619a
-  .word 0xa6a2965a
-  .word 0x179cbb52
-  .word 0x8b336f87
-  .word 0xc8b58c93
-  .word 0xd0f818cd
-  .word 0x6f89dd0c
-  .word 0xa5dc9f69
-  .word 0xaa56ac4a
-  .word 0xae8a5e2a
-  .word 0x5467b56e
-  .word 0x19c8132c
-  .word 0x79615d56
-  .word 0xd71f072a
-  .word 0xa6ce4b09
-  .word 0xaa9ee36d
-  .word 0x2516378e
-  .word 0x911cf3ba
-  .word 0x8df57003
-  .word 0xcfbb41c6
-  .word 0xfa593aa5
-  .word 0x2967ffbf
-  .word 0xcc7fc6d6
-  .word 0x9b0e36b8
-  .word 0x9ca7b404
-  .word 0xdeee9b1b
-  .word 0x3f003f7c
-  .word 0x548cf53f
-  .word 0xa1db901d
-  .word 0xbc06231d
-  .word 0x69ac5a54
-  .word 0xb86e5414
-  .word 0x26bf1156
-  .word 0x865cd9a4
-  .word 0x977d42d4
-  .word 0xfd1cb8db
-  .word 0x4a8d79ad
-  .word 0xb75d5289
-  .word 0xd0b4ae41
-  .word 0xcdf2a2a3
-  .word 0x8a86394a
-  .word 0x36a5439c
-  .word 0xbcf4fb08
-  .word 0x308f9ba8
-  .word 0x65eb10e2
-  .word 0x1a896d1d
-  .word 0xbd5cda25
-  .word 0x338272e5
-  .word 0x21d236e6
-  .word 0xddf1be63
-  .word 0xd43b602e
-  .word 0xa2be45ac
-  .word 0x250cf810
-  .word 0x9617b962
-  .word 0xdf0ea233
-  .word 0xe02a6135
-  .word 0x401f160c
-  .word 0xc780dde5
-  .word 0xd91695d9
-  .word 0x70f5f99a
-  .word 0x84de837d
-  .word 0xe8ed7b93
-  .word 0xdd4a17ae
-  .word 0x9d9db60e
-  .word 0xc9583de7
-  .word 0xf201eb2d
-  .word 0xf1087a7d
-  .word 0x4261af44
-  .word 0x149a2356
-  .word 0xd18324b2
-  .word 0x4a86466b
-  .word 0x99a76694
-  .word 0x7ba169f0
-  .word 0x9b6a703a
-  .word 0xb25ab543
-
-
-/* Base for exponentiation (corresponds to plaintext for encryption or
-   signature for verification).
-
-   Raw hex value (randomly generated) =
-0x9e67bf21cfb170bd70edb7b9ffb99fbfe6a681f9e17bc8a966bf55d54794b95f9c4ff3657f3eef86433035ec3cc1fd4c092498a59f3fb5ac0b29c1a7a429130509229a001a86f72182354886779211a3f38ae8b864d094f875cc30bfce8df4a999cd6e43ab25c786ebb4d78bd6f439b278937d6d092be28d986564faab071878f0b4982b70af87c2261a0fc4d58b4c5d227cd880b40af25828988a730746b711cd6aaeec67f07b40df881cc8b784f944f4dc9fccac096631baf8ec17201fbacab0f09cbd2e816495820f6a5d7263ab5dd72cee1c1145327e2696066b6103304206c29ace7f13d92b3a7edf3cb9dc3fe5d2da7c22d16319f2fcdf44a9cf14de57cc75f9395b0d1ebd90c107b74ca88d8c99be1e5a4a41d1fa2285ccd8580f4a6206fb4d0cae5945bcd33b5f1308025f660bf96e3e448216b02da98b86d8e9d633e311b2f19fce4dbaa6317d04aaf360ea9245bd0bb70811e64d87accf8ab6339b063ba26b085c85e369f37c2c62a485fab7f2b22edd5f4f6365c3e47fae372ea3e530796473835384e77187ac856b9ebbc3c10f1a0394e9a9c25a8e635a55ac907a011119aa5d00edc26f0b64e9972391ba545a03e003624e0624f824c22710237e8f97a07ffcff0106684f0c17b8df6f975bdd5f286a95f7635416b3e9129aa81e4cee9932dfe177f7f33897412fdde0e8b87f6cc0c54ab2c8f022dcb7fef768
- */
-.balign 32
-base:
-  .word 0xb7fef768
-  .word 0xc8f022dc
-  .word 0xc0c54ab2
-  .word 0xe8b87f6c
-  .word 0x412fdde0
-  .word 0xf7f33897
-  .word 0x32dfe177
-  .word 0x1e4cee99
-  .word 0xe9129aa8
-  .word 0x635416b3
-  .word 0x286a95f7
-  .word 0x975bdd5f
-  .word 0x17b8df6f
-  .word 0x06684f0c
-  .word 0x7ffcff01
-  .word 0x7e8f97a0
-  .word 0xc2271023
-  .word 0x0624f824
-  .word 0xe003624e
-  .word 0xba545a03
-  .word 0xe9972391
-  .word 0xc26f0b64
-  .word 0xaa5d00ed
-  .word 0x7a011119
-  .word 0x5a55ac90
-  .word 0xc25a8e63
-  .word 0x0394e9a9
-  .word 0xc3c10f1a
-  .word 0x856b9ebb
-  .word 0xe77187ac
-  .word 0x73835384
-  .word 0xe5307964
-  .word 0xae372ea3
-  .word 0x65c3e47f
-  .word 0xdd5f4f63
-  .word 0xb7f2b22e
-  .word 0x62a485fa
-  .word 0x69f37c2c
-  .word 0x085c85e3
-  .word 0x063ba26b
-  .word 0x8ab6339b
-  .word 0x4d87accf
-  .word 0xb70811e6
-  .word 0x9245bd0b
-  .word 0xaaf360ea
-  .word 0xa6317d04
-  .word 0x9fce4dba
-  .word 0xe311b2f1
-  .word 0xd8e9d633
-  .word 0x2da98b86
-  .word 0x448216b0
-  .word 0x0bf96e3e
-  .word 0x08025f66
-  .word 0xd33b5f13
-  .word 0xae5945bc
-  .word 0x06fb4d0c
-  .word 0x580f4a62
-  .word 0x2285ccd8
-  .word 0x4a41d1fa
-  .word 0x99be1e5a
-  .word 0x4ca88d8c
-  .word 0x90c107b7
-  .word 0x5b0d1ebd
-  .word 0xcc75f939
-  .word 0xcf14de57
-  .word 0xfcdf44a9
-  .word 0xd16319f2
-  .word 0xd2da7c22
-  .word 0xb9dc3fe5
-  .word 0x3a7edf3c
-  .word 0x7f13d92b
-  .word 0x06c29ace
-  .word 0x61033042
-  .word 0x2696066b
-  .word 0x1145327e
-  .word 0xd72cee1c
-  .word 0x7263ab5d
-  .word 0x820f6a5d
-  .word 0x2e816495
-  .word 0xb0f09cbd
-  .word 0x201fbaca
-  .word 0xbaf8ec17
-  .word 0xac096631
-  .word 0xf4dc9fcc
-  .word 0xb784f944
-  .word 0xdf881cc8
-  .word 0x67f07b40
-  .word 0xcd6aaeec
-  .word 0x0746b711
-  .word 0x28988a73
-  .word 0xb40af258
-  .word 0x227cd880
-  .word 0xd58b4c5d
-  .word 0x261a0fc4
-  .word 0x70af87c2
-  .word 0xf0b4982b
-  .word 0xab071878
-  .word 0x986564fa
-  .word 0x092be28d
-  .word 0x78937d6d
-  .word 0xd6f439b2
-  .word 0xebb4d78b
-  .word 0xab25c786
-  .word 0x99cd6e43
-  .word 0xce8df4a9
-  .word 0x75cc30bf
-  .word 0x64d094f8
-  .word 0xf38ae8b8
-  .word 0x779211a3
-  .word 0x82354886
-  .word 0x1a86f721
-  .word 0x09229a00
-  .word 0xa4291305
-  .word 0x0b29c1a7
-  .word 0x9f3fb5ac
-  .word 0x092498a5
-  .word 0x3cc1fd4c
-  .word 0x433035ec
-  .word 0x7f3eef86
-  .word 0x9c4ff365
-  .word 0x4794b95f
-  .word 0x66bf55d5
-  .word 0xe17bc8a9
-  .word 0xe6a681f9
-  .word 0xffb99fbf
-  .word 0x70edb7b9
-  .word 0xcfb170bd
-  .word 0x9e67bf21
-
-
-/* output buffer */
-.balign 32
-result:
-.zero 512
-
-/* buffer for Montgomery constant RR */
-.balign 32
-RR:
-.zero 512
-
-/* buffer for Montgomery constant m0inv */
-.balign 32
-m0inv:
-.zero 32
diff --git a/sw/otbn/crypto/tests/rsa_512_dec_test.hjson b/sw/otbn/crypto/tests/rsa_512_dec_test.hjson
new file mode 100644
index 0000000000000..b521c22a6c54a
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_512_dec_test.hjson
@@ -0,0 +1,23 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n":  "0x906ce5d361397c1ce1f5b75760a23b20786e52ca82f66ec7216e982b5945a19afe4aba4e1c59d1aa020b035ef4c08da0658e9702c9bb46392d3b81ce594dec21",
+      #"RR": "0xe41dec1529f88db96d067d9dd33b5e4eb719df8540b69ea856e9d39b217dd7ebe046983a7c234e50e68696ba5b63dc8926f0b5d4e14152df4696f3677acfdeaa",
+      "r0": "0xd487ce1eaf19922ad9b8a714e61a441c12e0c8b2bad640fb19488dec4f65d4d9259f4329e6f4590b9a164106cf6a659eb4862b21fb97d43588561712e8e5216a",
+      #"rsa_d0": "0x322c127f274460106c92fed934f1c6d695dfc595227fd7a607c032cec45983351d0b0bc8f3dff3b6c9ad7832dd18d46d82a6173a921aaf8adaa5b31fa0d07f7d",
+      "rsa_d0": "0x354d9c10865d447ebaac7fe326a9d65724726953c74d2e9098051a5b9148bcfed742487a13f0350dbb897a967fb872e83acd05430c8ba533fe8b2e91e902ef79",
+      "rsa_d1": "0x07618e6fa119246ed63e813a12581081b1adacc6e532f9369fc5289555113fcbca4943b2e02fc6bb722402a4a2a0a685b86b12799e910ab9242e9d8e49d29004"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0x522f58f7cc0e2971020550a2bf80e650a172bb25393f68db30d7b96871709409",
+      "w1": "0x89e0dede890cac09c541eaa8145dcd94cbd323ca35fce003aab0a9dd5624cc11"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_512_dec_test.s b/sw/otbn/crypto/tests/rsa_512_dec_test.s
new file mode 100644
index 0000000000000..02d49b6fa8847
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_512_dec_test.s
@@ -0,0 +1,44 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+.section .text.start
+
+/**
+ * Standalone RSA 512 decrypt
+ *
+ * Uses OTBN modexp bignum lib to decrypt the message from the .data segment
+ * in this file with the private key contained in .data segment of this file.
+ *
+ * Copies the decrypted message to wide registers for comparison (starting at
+ * w0). See comment at the end of the file for expected values.
+ */
+ main:
+  /* Init all-zero register. */
+  bn.xor  w31, w31, w31
+
+  /* Enable message blinding. */
+  li x29, 1
+
+  /* Load number of limbs. */
+  li  x30, 2
+
+  /* Load pointers to modulus and Montgomery constant buffers. */
+  la    x16, rsa_n
+  la    x17, RR
+
+  /* Compute Montgomery constants. */
+  jal      x1, modload
+
+  /* Run exponentiation.
+       dmem[r0] = dmem[r0]^dmem[d] mod dmem[n] */
+  jal      x1, modexp
+
+  /* copy all limbs of result to wide reg file */
+  la       x21, r0
+  li       x8, 0
+  loop     x30, 2
+    bn.lid   x8, 0(x21++)
+    addi     x8, x8, 1
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_distance_negative_test.hjson b/sw/otbn/crypto/tests/rsa_distance_negative_test.hjson
new file mode 100644
index 0000000000000..3de82e3930710
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_distance_negative_test.hjson
@@ -0,0 +1,54 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// An acceptable value for p.
+//
+// To make sure the checks on q are being tested, this value is specifically
+// chosen to be far enough away from the "bad" values of q that they wouldn't
+// be rejected on that basis.
+//
+// Python script for generating p (using PyCryptoDome's Crypto.Util.number
+// package for the primality check):
+// while True:
+//   p = random.randrange(lower_bound, 1 << 1024)
+//   p |= 3
+//   if abs(p - too_small) < (1 << 924):
+//     continue
+//   if abs(p - not_relprime) < (1 << 924):
+//     continue
+//   if abs(p - not_prime) < (1 << 924):
+//     continue
+//   if math.gcd(p-1, 65537) != 1:
+//     continue
+//   if number.isPrime(p):
+//     break
+
+// A value for q that is too close to p, but meets other requirements.
+//
+// Python script for generating test data (using PyCryptoDome's
+// Crypto.Util.number package for the primality check):
+// while True:
+//   too_close = random.randrange(p - (1 << 924), p + (1 << 924))
+//   too_close |= 3
+//   if too_close < lower_bound:
+//     continue
+//   if math.gcd(too_close - 1, 65537) != 1:
+//     continue
+//   if number.isPrime(too_close):
+//     break
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_p": "0xd10b3338d7d2cca85be7b76c5497f2fe89a9f9b73e613262565636dbc5901c386b1df3c7b8eb3ac8548a9062a5958b33c84dfe0fa9e2c61250d75683be1585008f926d5cfc4d3a3f003746a3beefcc71d287133768fc0268e1f84cb791be8e6dfc48b706ee0515089ff618c0a648854d6a93e9a0452552e93720ffa2021fd53b",
+      "rsa_n": "0xd10b3338d7d2cca85be7b76c479a213a2646058cc86df4e6fb59ec553c4e93bcf9eab3ddcf6caf42e690294667a03e9bc11a94f9b78df5311f5ea7890eb161e7067d759143ff20425120197025aac542ca2cfd1dcfe3ebddeae1f19ece50583c83597856830a0827333d1b67d6d887a16c3f8fe156d119ee6a0b2ca6ba4f62fb"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x00000000"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_distance_negative_test.s b/sw/otbn/crypto/tests/rsa_distance_negative_test.s
new file mode 100644
index 0000000000000..56072ac3d1c64
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_distance_negative_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Ensure that a value for q which is too close to p fails RSA keygen checks.
+ *
+ * Uses the test data from `rsa_distance_negative_test`, which is sized
+ * for RSA-2048.
+ */
+
+.section .text.start
+
+main:
+  /* Initialize all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Number of limbs (n).
+       x30 <= n */
+  li        x30, 4
+
+  /* Call primality test.
+       x2 <= 1 if dmem[n] is probably prime, otherwise 0 */
+  jal        x1, distance_test
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.exp
deleted file mode 100644
index 250028a7d63f7..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 2^256 - 1 (check passed).
-w24 = 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.s
deleted file mode 100644
index 6324d38669d68..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_good_test.s
+++ /dev/null
@@ -1,31 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a good value for p passes RSA keygen checks.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Check an acceptable value of p.
-       w24 <= 2^256-1 if the check passed, otherwise 0 */
-  la        x16, good_p
-  jal       x1, check_p
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.exp
deleted file mode 100644
index 75275f176e56d..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 0 (check failed).
-w24 = 0
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.s
deleted file mode 100644
index f79cfdc953611..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_prime_test.s
+++ /dev/null
@@ -1,31 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a nonprime value for p fails RSA keygen checks.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Check a value of p that is nonprime.
-       w24 <= 2^256-1 if the check passed, otherwise 0 */
-  la        x16, not_prime
-  jal       x1, check_p
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.exp
deleted file mode 100644
index 75275f176e56d..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 0 (check failed).
-w24 = 0
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.s
deleted file mode 100644
index 78ca1153769c8..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkp_not_relprime_test.s
+++ /dev/null
@@ -1,31 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a multiple of F4 fails RSA keygen checks for p.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Check a value of p that is not relatively prime to F4.
-       w24 <= 2^256-1 if the check passed, otherwise 0 */
-  la        x16, not_relprime
-  jal       x1, check_p
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkpq_test_data.s b/sw/otbn/crypto/tests/rsa_keygen_checkpq_test_data.s
deleted file mode 100644
index bf8a3a6a4e3ff..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkpq_test_data.s
+++ /dev/null
@@ -1,371 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Data to test checks on RSA keygen p and q values.
- *
- * See FIPS 186-5 section A.1.3 for the full specification of requirements on p
- * and q. The value for p must satisfy:
- *   - p % 2 = 1
- *   - p >= sqrt(2)*(2^(nlen/2 - 1)), where nlen = RSA public key length
- *   - GCD(p-1,65537) = 1
- *   - p is probably prime
- *
- * For q, we need to satisfy the same requirements as p plus one more: q must
- * not be too close to p.  Specifically, we need to reject the value if:
- *   |p-q| < 2^(nlen/2 - 100).
- *
- * This test data includes values of p and q that each fail exactly one
- * condition, as well as two "good" values of p and q that are compatible with
- * each other.
- *
- * This test data uses 4-limb (1024-bit) values for p and q, which correspond
- * to RSA-2048.
- */
-
-.data
-
-/* Note: Some of the Python scripts shown below reference the lower bound for
-   p/q as a Python variable called lower_bound. This value was generated and
-   checked for RSA-4096 as specified in BoringSSL:
-     https://boringssl.googlesource.com/boringssl/+/dcabfe2d8940529a69e007660fa7bf6c15954ecc/crypto/fipsmodule/rsa/rsa_impl.c#1006
-
-   The value for RSA-2048, as used in these tests, is simply the value for
-   RSA-4096 shifted right by 1024 bits. We can check it using:
-   >> lower_bound**2 < 2**2047 < (lower_bound+1)**2
-   True
-
-   For reference, the hex value of the RSA-2048 lower bound is:
-   0xb504f333f9de6484597d89b3754abe9f1d6f60ba893ba84ced17ac85833399154afc83043ab8a2c3a8b1fe6fdc83db390f74a85e439c7b4a780487363dfa2768d2202e8742af1f4e53059c6011bc337bcab1bc911688458a460abc722f7c4e33c6d5a8a38bb7e9dccb2a634331f3c84df52f120f836e582eeaa4a0899040ca4a
-*/
-
-/**
- * An odd 1024-bit value that is too small to be used for p or q.
- *
- * Specifically, this value is the highest prime number below the lower bound.
- *
- * Python script for generating the test data (using PyCryptoDome's
- * Crypto.Util.number package for the primality check):
-too_small = lower_bound - 1
-while True:
-  if math.gcd(too_small-1, 65537) != 1:
-    continue
-  if number.isPrime(too_small):
-    break
-  too_small -= 2
- *
- * Hex value for reference:
- * 0xb504f333f9de6484597d89b3754abe9f1d6f60ba893ba84ced17ac85833399154afc83043ab8a2c3a8b1fe6fdc83db390f74a85e439c7b4a780487363dfa2768d2202e8742af1f4e53059c6011bc337bcab1bc911688458a460abc722f7c4e33c6d5a8a38bb7e9dccb2a634331f3c84df52f120f836e582eeaa4a0899040c619
- */
-.balign 32
-.globl too_small
-too_small:
-  .word 0x9040c619
-  .word 0xeaa4a089
-  .word 0x836e582e
-  .word 0xf52f120f
-  .word 0x31f3c84d
-  .word 0xcb2a6343
-  .word 0x8bb7e9dc
-  .word 0xc6d5a8a3
-  .word 0x2f7c4e33
-  .word 0x460abc72
-  .word 0x1688458a
-  .word 0xcab1bc91
-  .word 0x11bc337b
-  .word 0x53059c60
-  .word 0x42af1f4e
-  .word 0xd2202e87
-  .word 0x3dfa2768
-  .word 0x78048736
-  .word 0x439c7b4a
-  .word 0x0f74a85e
-  .word 0xdc83db39
-  .word 0xa8b1fe6f
-  .word 0x3ab8a2c3
-  .word 0x4afc8304
-  .word 0x83339915
-  .word 0xed17ac85
-  .word 0x893ba84c
-  .word 0x1d6f60ba
-  .word 0x754abe9f
-  .word 0x597d89b3
-  .word 0xf9de6484
-  .word 0xb504f333
-
-/**
- * An 1024-bit value that doesn't satisfy relative primality with 65537.
- *
- * This number is selected to be larger than the lower bound and prime, so it
- * doesn't fail any other checks than GCD(p-1,e)=1.
- *
- * Python script for generating the test data (using PyCryptoDome's
- * Crypto.Util.number package for the primality check):
-while True:
-  y = random.randrange(lower_bound, (1 << 1024))
-  y -= (y % 65537)
-  if (y & 1 == 0) and number.isPrime(y+1):
-    break
-not_relprime = y+1
- *
- * Hex value for reference:
- * 0xf36b245b0051285df9f46be79c821a95584a00007b907c4102578d6c8c5d459c4328a174859c703e66bc706a9224e20f387da68e80a362fb1f0f36a912df95c26dc8b40902bff546d3aff671eea79a86df507180e0fba265c0ab601e582580f9fb18a62f9ff4e92d8d698408be08d7c24507244c6d3859be3804f2a7d9f16867
- */
-.balign 32
-.globl not_relprime
-not_relprime:
-  .word 0xd9f16867
-  .word 0x3804f2a7
-  .word 0x6d3859be
-  .word 0x4507244c
-  .word 0xbe08d7c2
-  .word 0x8d698408
-  .word 0x9ff4e92d
-  .word 0xfb18a62f
-  .word 0x582580f9
-  .word 0xc0ab601e
-  .word 0xe0fba265
-  .word 0xdf507180
-  .word 0xeea79a86
-  .word 0xd3aff671
-  .word 0x02bff546
-  .word 0x6dc8b409
-  .word 0x12df95c2
-  .word 0x1f0f36a9
-  .word 0x80a362fb
-  .word 0x387da68e
-  .word 0x9224e20f
-  .word 0x66bc706a
-  .word 0x859c703e
-  .word 0x4328a174
-  .word 0x8c5d459c
-  .word 0x02578d6c
-  .word 0x7b907c41
-  .word 0x584a0000
-  .word 0x9c821a95
-  .word 0xf9f46be7
-  .word 0x0051285d
-  .word 0xf36b245b
-
-/**
- * An 1024-bit value that passes other checks but isn't prime.
- *
- * Python script for generating the test data (using PyCryptoDome's
- * Crypto.Util.number package for the primality check):
-while True:
-  not_prime = random.randrange(lower_bound, (1 << 1024))
-  not_prime |= 3
-  if math.gcd(not_prime, 65537) != 1:
-    continue
-  if not number.isPrime(not_prime):
-    break
- *
- * Hex value for reference:
- * 0xecbbd72477e406de8ff72a93afbe19ed4258d3dd8cfa5b2a8b5c76d22053504710a8460c30c5141fc581df484e58a2bd019c03a1acab6c7fd70f9865ac6dcdcce4cca95266e4d2dea9a408b8ded6591daa4416bb7ca78357cad5c7d527d46a06807337d6845484589c8010eb6b674194608e1b9732db4e8cee053d2572158cf7
- */
-.balign 32
-.globl not_prime
-not_prime:
-  .word 0x72158cf7
-  .word 0xee053d25
-  .word 0x32db4e8c
-  .word 0x608e1b97
-  .word 0x6b674194
-  .word 0x9c8010eb
-  .word 0x84548458
-  .word 0x807337d6
-  .word 0x27d46a06
-  .word 0xcad5c7d5
-  .word 0x7ca78357
-  .word 0xaa4416bb
-  .word 0xded6591d
-  .word 0xa9a408b8
-  .word 0x66e4d2de
-  .word 0xe4cca952
-  .word 0xac6dcdcc
-  .word 0xd70f9865
-  .word 0xacab6c7f
-  .word 0x019c03a1
-  .word 0x4e58a2bd
-  .word 0xc581df48
-  .word 0x30c5141f
-  .word 0x10a8460c
-  .word 0x20535047
-  .word 0x8b5c76d2
-  .word 0x8cfa5b2a
-  .word 0x4258d3dd
-  .word 0xafbe19ed
-  .word 0x8ff72a93
-  .word 0x77e406de
-  .word 0xecbbd724
-
-/**
- * An acceptable value for p.
- *
- * To make sure the checks on q are being tested, this value is specifically
- * chosen to be far enough away from the "bad" values of q that they wouldn't
- * be rejected on that basis.
- *
- * Python script for generating p (using PyCryptoDome's Crypto.Util.number
- * package for the primality check):
-while True:
-  p = random.randrange(lower_bound, 1 << 1024)
-  p |= 3
-  if abs(p - too_small) < (1 << 924):
-    continue
-  if abs(p - not_relprime) < (1 << 924):
-    continue
-  if abs(p - not_prime) < (1 << 924):
-    continue
-  if math.gcd(p-1, 65537) != 1:
-    continue
-  if number.isPrime(p):
-    break
- *
- * Hex value for reference:
- * 0xd10b3338d7d2cca85be7b76c5497f2fe89a9f9b73e613262565636dbc5901c386b1df3c7b8eb3ac8548a9062a5958b33c84dfe0fa9e2c61250d75683be1585008f926d5cfc4d3a3f003746a3beefcc71d287133768fc0268e1f84cb791be8e6dfc48b706ee0515089ff618c0a648854d6a93e9a0452552e93720ffa2021fd53b
- */
-.balign 32
-.globl good_p
-good_p:
-  .word 0x021fd53b
-  .word 0x3720ffa2
-  .word 0x452552e9
-  .word 0x6a93e9a0
-  .word 0xa648854d
-  .word 0x9ff618c0
-  .word 0xee051508
-  .word 0xfc48b706
-  .word 0x91be8e6d
-  .word 0xe1f84cb7
-  .word 0x68fc0268
-  .word 0xd2871337
-  .word 0xbeefcc71
-  .word 0x003746a3
-  .word 0xfc4d3a3f
-  .word 0x8f926d5c
-  .word 0xbe158500
-  .word 0x50d75683
-  .word 0xa9e2c612
-  .word 0xc84dfe0f
-  .word 0xa5958b33
-  .word 0x548a9062
-  .word 0xb8eb3ac8
-  .word 0x6b1df3c7
-  .word 0xc5901c38
-  .word 0x565636db
-  .word 0x3e613262
-  .word 0x89a9f9b7
-  .word 0x5497f2fe
-  .word 0x5be7b76c
-  .word 0xd7d2cca8
-  .word 0xd10b3338
-
-/**
- * A value for q that is too close to p, but meets other requirements.
- *
- * Python script for generating test data (using PyCryptoDome's
- * Crypto.Util.number package for the primality check):
-while True:
-  too_close = random.randrange(p - (1 << 924), p + (1 << 924))
-  too_close |= 3
-  if too_close < lower_bound:
-    continue
-  if math.gcd(too_close - 1, 65537) != 1:
-    continue
-  if number.isPrime(too_close):
-    break
- *
- * Hex value for reference:
- * 0xd10b3338d7d2cca85be7b76c479a213a2646058cc86df4e6fb59ec553c4e93bcf9eab3ddcf6caf42e690294667a03e9bc11a94f9b78df5311f5ea7890eb161e7067d759143ff20425120197025aac542ca2cfd1dcfe3ebddeae1f19ece50583c83597856830a0827333d1b67d6d887a16c3f8fe156d119ee6a0b2ca6ba4f62fb
- */
-.balign 32
-.globl too_close
-too_close:
-  .word 0xba4f62fb
-  .word 0x6a0b2ca6
-  .word 0x56d119ee
-  .word 0x6c3f8fe1
-  .word 0xd6d887a1
-  .word 0x333d1b67
-  .word 0x830a0827
-  .word 0x83597856
-  .word 0xce50583c
-  .word 0xeae1f19e
-  .word 0xcfe3ebdd
-  .word 0xca2cfd1d
-  .word 0x25aac542
-  .word 0x51201970
-  .word 0x43ff2042
-  .word 0x067d7591
-  .word 0x0eb161e7
-  .word 0x1f5ea789
-  .word 0xb78df531
-  .word 0xc11a94f9
-  .word 0x67a03e9b
-  .word 0xe6902946
-  .word 0xcf6caf42
-  .word 0xf9eab3dd
-  .word 0x3c4e93bc
-  .word 0xfb59ec55
-  .word 0xc86df4e6
-  .word 0x2646058c
-  .word 0x479a213a
-  .word 0x5be7b76c
-  .word 0xd7d2cca8
-  .word 0xd10b3338
-
-/**
- * An acceptable value for q.
- *
- * Python script for generating q (using PyCryptoDome's Crypto.Util.number
- * package for the primality check):
-while True:
-  q = random.randrange(lower_bound, 1 << 1024)
-  q |= 3
-  if abs(p - q) < (1 << 924):
-    continue
-  if math.gcd(q-1, 65537) != 1:
-    continue
-  if number.isPrime(q):
-    break
- *
- * Hex value for reference:
- * 0xf83da3592c89b3b8972d1a8dd1de78d7b64a0b1cce4a54ca5125bfc16105ce43ebe4bc6b5e0088e37281d264d2081cf1097671eb3299e91a6c571e4b71cdd1144ca96ad7c45bd05e8e25e371ca8e2043cf73a30ba5e9c979f259bbc9476c1ab3693136e403ebe4e47542c7a6f4164d1a7e2938e65191c9aee6a3534a87c3f1ff
- */
-.balign 32
-.globl good_q
-good_q:
-  .word 0x87c3f1ff
-  .word 0xe6a3534a
-  .word 0x5191c9ae
-  .word 0x7e2938e6
-  .word 0xf4164d1a
-  .word 0x7542c7a6
-  .word 0x03ebe4e4
-  .word 0x693136e4
-  .word 0x476c1ab3
-  .word 0xf259bbc9
-  .word 0xa5e9c979
-  .word 0xcf73a30b
-  .word 0xca8e2043
-  .word 0x8e25e371
-  .word 0xc45bd05e
-  .word 0x4ca96ad7
-  .word 0x71cdd114
-  .word 0x6c571e4b
-  .word 0x3299e91a
-  .word 0x097671eb
-  .word 0xd2081cf1
-  .word 0x7281d264
-  .word 0x5e0088e3
-  .word 0xebe4bc6b
-  .word 0x6105ce43
-  .word 0x5125bfc1
-  .word 0xce4a54ca
-  .word 0xb64a0b1c
-  .word 0xd1de78d7
-  .word 0x972d1a8d
-  .word 0x2c89b3b8
-  .word 0xf83da359
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.exp
deleted file mode 100644
index 250028a7d63f7..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 2^256 - 1 (check passed).
-w24 = 0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.s
deleted file mode 100644
index 9d9782333297b..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_good_test.s
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that an acceptable value for q passes RSA keygen checks.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Copy a "good" p value into `rsa_p`. */
-  la        x16, good_p
-  la        x3, rsa_p
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* Copy the good value into `rsa_q`. */
-  la        x16, good_q
-  la        x3, rsa_q
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* w24 <= 2^256-1 if the check passed, otherwise 0 */
-  jal       x1, check_q
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.exp
deleted file mode 100644
index 75275f176e56d..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 0 (check failed).
-w24 = 0
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.s
deleted file mode 100644
index 92f0864398b99..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_prime_test.s
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a nonprime value for q fails RSA keygen checks.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Copy a "good" p value into `rsa_p`. */
-  la        x16, good_p
-  la        x3, rsa_p
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* Copy the nonprime value into `rsa_q`. */
-  la        x16, not_prime
-  la        x3, rsa_q
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* w24 <= 2^256-1 if the check passed, otherwise 0 */
-  jal       x1, check_q
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.exp
deleted file mode 100644
index 75275f176e56d..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 0 (check failed).
-w24 = 0
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.s
deleted file mode 100644
index c6b46b88a803b..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_not_relprime_test.s
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a multiple of F4 fails RSA keygen checks for q.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Copy a "good" p value into `rsa_p`. */
-  la        x16, good_p
-  la        x3, rsa_p
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* Copy the bad value into `rsa_q`. */
-  la        x16, not_relprime
-  la        x3, rsa_q
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* w24 <= 2^256-1 if the check passed, otherwise 0 */
-  jal       x1, check_q
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.exp b/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.exp
deleted file mode 100644
index 75275f176e56d..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.exp
+++ /dev/null
@@ -1,2 +0,0 @@
-# Expect 0 (check failed).
-w24 = 0
diff --git a/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.s b/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.s
deleted file mode 100644
index a15d73564cde6..0000000000000
--- a/sw/otbn/crypto/tests/rsa_keygen_checkq_too_close_test.s
+++ /dev/null
@@ -1,43 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-/**
- * Ensure that a value for q which is too close to p fails RSA keygen checks.
- *
- * Uses the test data from `rsa_keygen_checkpq_test_data`, which is sized for
- * RSA-2048.
- */
-
-.section .text.start
-
-main:
-  /* Init all-zero register. */
-  bn.xor    w31, w31, w31
-
-  /* Load the number of limbs for this test. */
-  li        x30, 4
-  li        x31, 3
-
-  /* Load required constants. */
-  li        x20, 20
-  li        x21, 21
-
-  /* Copy a "good" p value into `rsa_p`. */
-  la        x16, good_p
-  la        x3, rsa_p
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* Copy the too-close value into `rsa_q`. */
-  la        x16, too_close
-  la        x3, rsa_q
-  loop      x30, 2
-    bn.lid   x20, 0(x16++)
-    bn.sid   x20, 0(x3++)
-
-  /* w24 <= 2^256-1 if the check passed, otherwise 0 */
-  jal       x1, check_q
-
-  ecall
diff --git a/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.hjson b/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.hjson
new file mode 100644
index 0000000000000..942dfbe2ae82f
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.hjson
@@ -0,0 +1,20 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # Candidate prime (Wycheproof test #39):
+      # Note: this prime is a worst-case test for Miller-Rabin, since it has a high
+      # probability of producing false positives if the number of rounds is too low.
+      "rsa_n": "0xf67307e54779cfe9120bf862afc5466c5d6d0783d12df5215c0c981c51e4bfc098e9afd574f51b18c820259b692ec0bf7c9d6e56e9bb99fbd3b7ecc4082146a9d7a5b7bc6519d476c4a9975d9c3e3b12bee45b7accb07a6a68ea583ac2523ef32ee6d01bc766b59c43031f9c6980c9b4317da6825be9f7c5db03283d04c13323"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x00000000"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.s b/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.s
new file mode 100644
index 0000000000000..0191f853d5656
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_miller_rabin_negative_test.s
@@ -0,0 +1,26 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for Miller-Rabin primality test.
+ *
+ * The test input is composite, so we expect the primality test to fail. Uses
+ * n=4 limbs (i.e. a 1024-bit prime candidate, as would be used in RSA-2048).
+ */
+
+.section .text.start
+
+main:
+  /* Initialize all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Number of limbs (n).
+       x30 <= n */
+  li        x30, 4
+
+  /* Call primality test.
+       x2 <= 1 if dmem[n] is probably prime, otherwise 0 */
+  jal        x1, miller_rabin_test
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_miller_rabin_test.hjson b/sw/otbn/crypto/tests/rsa_miller_rabin_test.hjson
new file mode 100644
index 0000000000000..d27f6abfef602
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_miller_rabin_test.hjson
@@ -0,0 +1,17 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0x83f4fb7ca746b70dd7e37ce93847ed7995ccf101bb7a9c628ebcffeeaa0114efd346ddfb53c1d31d51ab13bbcb0b2346d6689cd78210bfe05f458233d8e58e1b"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x00000001"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_miller_rabin_test.s b/sw/otbn/crypto/tests/rsa_miller_rabin_test.s
new file mode 100644
index 0000000000000..4a3cddd4b189d
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_miller_rabin_test.s
@@ -0,0 +1,27 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test for Miller-Rabin primality test.
+ *
+ * The prime candidate in this case is a true prime, so we expect the primality
+ * test to succeed. Uses n=2 limbs (i.e. a 512-bit prime candidate, as would be
+ * used in RSA-1024).
+ */
+
+.section .text.start
+
+main:
+  /* Initialize all-zero register. */
+  bn.xor w31, w31, w31
+
+  /* Number of limbs (n)
+       x30 <= n */
+  li x30, 2
+
+  /* Call primality test.
+       x2 <= 1 if dmem[n] is probably prime, otherwise 0 */
+  jal x1, miller_rabin_test
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_modinv_f4_test.hjson b/sw/otbn/crypto/tests/rsa_modinv_f4_test.hjson
new file mode 100644
index 0000000000000..39796122f7e6f
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_modinv_f4_test.hjson
@@ -0,0 +1,32 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # Modulus: randomly-generated even number in the range [2^1023,2^1024) such that
+      # GCD(65537, modulus) = 1.
+
+      # Python script to generate modulus:
+      # import random
+      # import math
+      # while True:
+      #   m = random.randrange(1 << 1022, 1 << 1023)
+      #   m <<= 1
+      #   if math.gcd(m, 65537) == 1:
+      #     break
+      "rsa_n": "0x90800d989b5e0aae64b49cd617492911368b9ea8b791fcfe486c1313f039c66d0d6269927d1d7fe8454a24e8c9485587e7034021b6eebc5baced24ecef2a7e1d2bddada7ca3f234df00d25f25f281cbe2e5d51f0fe27f0c79b8823851f8011d89ebbcb1c2c3b3026830818fcd810c058fd74af138b61326b4775b51e0f4d68ea"
+    }
+  }
+
+  "output": {
+    "regs": {
+      "w0": "0xacb7e2aba2a1d898cb7f35532aa814fa2b37029c36ea0c0902bdb004472177b3",
+      "w1": "0x81cb4893b65ee446fbd5e4a916e8a404f80cd1cb7e83dea7de9bce7a3ae2cb28",
+      "w2": "0xfa7692f31884c1b0be93e735dc6cefc647376f3c1250af54ba333bb9605c5f80",
+      "w3": "0x85f60124ca5cdbc0236281c7c4dcb172e0c37d7a627cb833b146684562bedd22"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_modinv_f4_test.s b/sw/otbn/crypto/tests/rsa_modinv_f4_test.s
new file mode 100644
index 0000000000000..7d07d2b783275
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_modinv_f4_test.s
@@ -0,0 +1,39 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Test for an RSA keygen subroutine: modular inverse of F4.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* Load DMEM pointers. */
+  la        x12, rsa_n
+  la        x13, rsa_d0
+  la        x14, r1
+  la        x15, r2
+
+  /* Load required constants. */
+  li        x20, 20
+  li        x21, 21
+
+  /* Compute the modular inverse.
+       dmem[result] <= (65537^-1) mod dmem[modulus] */
+  jal       x1, modinv_f4
+
+  /* Read the inverse into registers for the test framework to check.
+       [w0..w3] <= dmem[result] */
+  li        x2, 0
+  loop      x30, 2
+    bn.lid    x2, 0(x13++)
+    addi      x2, x2, 1
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_primality_negative_test.hjson b/sw/otbn/crypto/tests/rsa_primality_negative_test.hjson
new file mode 100644
index 0000000000000..15a10d000a94d
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_primality_negative_test.hjson
@@ -0,0 +1,29 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// An 1024-bit value that passes other checks but isn't prime.
+//
+// Python script for generating the test data (using PyCryptoDome's
+// Crypto.Util.number package for the primality check):
+// while True:
+//   not_prime = random.randrange(lower_bound, (1 << 1024))
+//   not_prime |= 3
+//   if math.gcd(not_prime, 65537) != 1:
+//     continue
+//  if not number.isPrime(not_prime):
+//    break
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xecbbd72477e406de8ff72a93afbe19ed4258d3dd8cfa5b2a8b5c76d22053504710a8460c30c5141fc581df484e58a2bd019c03a1acab6c7fd70f9865ac6dcdcce4cca95266e4d2dea9a408b8ded6591daa4416bb7ca78357cad5c7d527d46a06807337d6845484589c8010eb6b674194608e1b9732db4e8cee053d2572158cf7"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x0000000"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_primality_negative_test.s b/sw/otbn/crypto/tests/rsa_primality_negative_test.s
new file mode 100644
index 0000000000000..825d8554ed6a5
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_primality_negative_test.s
@@ -0,0 +1,30 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Ensure that a good value for p passes RSA keygen checks.
+ *
+ * Uses the test data from `rsa_keygen_checkp_good_test.hjson`, which is sized
+ * for RSA-2048.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  jal x1, fermat_test
+  bne x2, x0, _end_test
+
+  addi x3, x2, 0
+
+  jal x1, miller_rabin_test
+  or x2, x2, x3
+
+_end_test:
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_primality_test.hjson b/sw/otbn/crypto/tests/rsa_primality_test.hjson
new file mode 100644
index 0000000000000..faf8d5f778581
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_primality_test.hjson
@@ -0,0 +1,39 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+// An acceptable value for p.
+//
+// To make sure the checks on q are being tested, this value is specifically
+// chosen to be far enough away from the "bad" values of q that they wouldn't
+// be rejected on that basis.
+//
+// Python script for generating p (using PyCryptoDome's Crypto.Util.number
+// package for the primality check):
+// while True:
+//   p = random.randrange(lower_bound, 1 << 1024)
+//   p |= 3
+//   if abs(p - too_small) < (1 << 924):
+//     continue
+//   if abs(p - not_relprime) < (1 << 924):
+//     continue
+//   if abs(p - not_prime) < (1 << 924):
+//     continue
+//   if math.gcd(p-1, 65537) != 1:
+//     continue
+//   if number.isPrime(p):
+//     break
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xd10b3338d7d2cca85be7b76c5497f2fe89a9f9b73e613262565636dbc5901c386b1df3c7b8eb3ac8548a9062a5958b33c84dfe0fa9e2c61250d75683be1585008f926d5cfc4d3a3f003746a3beefcc71d287133768fc0268e1f84cb791be8e6dfc48b706ee0515089ff618c0a648854d6a93e9a0452552e93720ffa2021fd53b"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x00000001"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_primality_test.s b/sw/otbn/crypto/tests/rsa_primality_test.s
new file mode 100644
index 0000000000000..3cce008d89b92
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_primality_test.s
@@ -0,0 +1,30 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Ensure that a good value for p passes RSA keygen checks.
+ *
+ * Uses the test data from `rsa_keygen_checkp_good_test.hjson`, which is sized
+ * for RSA-2048.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  jal x1, fermat_test
+  beq x2, x0, _end_test
+
+  addi x3, x2, 0
+
+  jal x1, miller_rabin_test
+  and x2, x2, x3
+
+_end_test:
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_relprime_f4.hjson b/sw/otbn/crypto/tests/rsa_relprime_f4.hjson
new file mode 100644
index 0000000000000..cbda289669e64
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_relprime_f4.hjson
@@ -0,0 +1,24 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      # A 1024-bit value that *is* relatively prime to F4:
+      "r0": "0xf473d9ff366276da71a73afbf03ff01f8ec9148a71798d74dc6f44d961bef880927cc05f07243ce92f5350972532b38bf63efbb65a272de2e9faa34f3bb3520b25e2269c231eb09b0a2b5cb604cfc7e016a2f1a20be61ac1251e0b34b589bb08d1d4542c39ef080b96e60aebb6a37039c84c5591d288465d47e7bc30bf36fc34",
+      # A 1024-bit value that is NOT relatively prime to F4:
+      "r1": "0xfe050192e57dc8199fa8556c8104b345b1e7a0cf3701f496ea8b89a35be53ed653b50c070e9683dad6d83c72430ac46131c49506ec3c23752f6c6cadad058d7188dfc7b666b7aed729ad2e207e503c205eb284fcc501de09a2fb78c905bb0def63ac03fcc55fab5282f925064e3888eda64db2120ce8691b5bd5cd42437ed723",
+      #  A 1024-bit value that is equal to (F4-1) modulo F4:
+      "r2": "0xfe050192e57dc8199fa8556c8104b345b1e7a0cf3701f496ea8b89a35be53ed653b50c070e9683dad6d83c72430ac46131c49506ec3c23752f6c6cadad058d7188dfc7b666b7aed729ad2e207e503c205eb284fcc501de09a2fb78c905bb0def63ac03fcc55fab5282f925064e3888eda64db2120ce8691b5bd5cd42437ed722"
+    }
+  }
+  "output": {
+    "regs": {
+      "w0": "0x0",
+      "w1": "0x0",
+      "w2": "0x0"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.hjson b/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.hjson
new file mode 100644
index 0000000000000..c63dfb2ae0e66
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.hjson
@@ -0,0 +1,31 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//  An 1024-bit value that doesn't satisfy relative primality with 65537.
+//
+//  This number is selected to be larger than the lower bound and prime, so it
+//  doesn't fail any other checks than GCD(p-1,e)=1.
+//
+//  Python script for generating the test data (using PyCryptoDome's
+//  Crypto.Util.number package for the primality check):
+//  while True:
+//    y = random.randrange(lower_bound, (1 << 1024))
+//    y -= (y % 65537)
+//    if (y & 1 == 0) and number.isPrime(y+1):
+//      break
+//  not_relprime = y+1
+
+{
+  "entrypoint": "main",
+  "input": {
+    "dmem": {
+      "rsa_n": "0xf36b245b0051285df9f46be79c821a95584a00007b907c4102578d6c8c5d459c4328a174859c703e66bc706a9224e20f387da68e80a362fb1f0f36a912df95c26dc8b40902bff546d3aff671eea79a86df507180e0fba265c0ab601e582580f9fb18a62f9ff4e92d8d698408be08d7c24507244c6d3859be3804f2a7d9f16866"
+    }
+  }
+  "output": {
+    "regs": {
+      "x2": "0x000000000"
+    }
+  }
+}
diff --git a/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.s b/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.s
new file mode 100644
index 0000000000000..97f2bcbd8ac27
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_relprime_f4_negative_test.s
@@ -0,0 +1,23 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Ensure that a multiple of F4 fails RSA keygen checks for p.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* Check a value of p that is not relatively prime to F4.
+       w24 <= 2^256-1 if the check passed, otherwise 0 */
+  la        x16, rsa_n
+  jal       x1, relprime_f4_test
+
+  ecall
diff --git a/sw/otbn/crypto/tests/rsa_relprime_f4_test.s b/sw/otbn/crypto/tests/rsa_relprime_f4_test.s
new file mode 100644
index 0000000000000..7a0792b9e60f9
--- /dev/null
+++ b/sw/otbn/crypto/tests/rsa_relprime_f4_test.s
@@ -0,0 +1,86 @@
+/* Copyright lowRISC contributors (OpenTitan project). */
+/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
+/* SPDX-License-Identifier: Apache-2.0 */
+
+/**
+ * Standalone test to check an RSA keygen subroutine.
+ *
+ * In RSA key generation, GCD(p,e) must be 1 for a potential prime p and an
+ * exponent e. When e is fixed to 65537 (aka F4), we use a specialized routine
+ * to ensure the GCD is 1.
+ */
+
+.section .text.start
+
+main:
+  /* Init all-zero register. */
+  bn.xor    w31, w31, w31
+
+  /* w0 <= 0 if simple_positive_test succeeded, 2^256-1 if it failed. */
+  jal       x1, simple_positive_test
+  /* w1 <= 0 if simple_negative_test succeeded, 2^256-1 if it failed. */
+  jal       x1, simple_negative_test
+  /* w2 <= 0 if edge_case_test succeeded, 2^256-1 if it failed. */
+  jal       x1, edge_case_test
+
+  ecall
+
+simple_positive_test:
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[tmp0] is NOT relatively prime to F4 */
+  la        x16, r0
+  jal       x1, relprime_f4_test
+
+  /* w23 <= ~w31 = 2^256-1 (failure value) */
+  bn.not    w23, w31
+
+  /* FG0.Z <= (w22 == 0) */
+  bn.add    w22, w22, w31
+
+  /* We expect a nonzero value in w22, since the input is relatively prime.
+      w0 <= (w22 == 0) ? 2^256-1 (failure) : 0 (success) */
+  bn.sel    w0, w23, w31, FG0.Z
+
+  ret
+
+simple_negative_test:
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[tmp2] is NOT relatively prime to F4 */
+  la        x16, r1
+  jal       x1, relprime_f4_test
+
+  /* w23 <= ~w31 = 2^256-1 (failure value) */
+  bn.not    w23, w31
+
+  /* FG0.Z <= (w22 == 0) */
+  bn.add    w22, w22, w31
+
+  /* We expect a zero value in w22, since the input is NOT relatively prime.
+      w1 <= (w22 == 0) ? 0 (success) : 2^256-1 (failure) */
+  bn.sel    w1, w31, w23, FG0.Z
+
+  ret
+
+edge_case_test:
+  /* Load the number of limbs for this test. */
+  li        x30, 4
+
+  /* w22 <= 0 if dmem[tmp4] is NOT relatively prime to F4 */
+  la        x16, r2
+  jal       x1, relprime_f4_test
+
+  /* w23 <= ~w31 = 2^256-1 (failure value) */
+  bn.not    w23, w31
+
+  /* FG0.Z <= (w22 == 0) */
+  bn.add    w22, w22, w31
+
+  /* We expect a nonzero value in w22, since the input is relatively prime.
+      w2 <= (w22 == 0) ? 2^256-1 (failure) : 0 (success) */
+  bn.sel    w2, w23, w31, FG0.Z
+
+  ret
diff --git a/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.exp b/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.exp
deleted file mode 100644
index c67599ba5f8ca..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.exp
+++ /dev/null
@@ -1,15 +0,0 @@
-# m0inv:
-w0  = 0x1dfc9779711cad8ba96ced374965995095d310b20b908e3bfd3e34f7f09b71df
-# rr:
-w1  = 0x546a7cfeeb165cd3d0f4fddadd38f5fbfb5be1e72c19d4ae9db9a2aca3eb77fa
-w2  = 0x32318a29f49dd5f776e77ababab5ae26da2e21031185bcae73f5cf6bcd410c5c
-w3  = 0x90b209bf6c65ac0e6563c81a9ccd73f2b61eab77538c240e8aa862a9689a85bc
-w4  = 0x3d3d07f301dc7990ebc2405fe0112362c75cbb02879a18307e351549e642e25e
-w5  = 0x9849163aeabe1810c204b9ca0dbdc0cbce301343dd65e10898d8cc33c5b9a5be
-w6  = 0x05f49af51ce689f5d9c77317ba59c5f5079883be4b4c22269bc14e3b234c8ff7
-w7  = 0x4043add66878ec0dd9691ef573649941093520a20811a95fc509b5ca7a83d42a
-w8  = 0x524b09b77a58d0479774620afe4319c4f209e1234ce52e1d5c7070ff7516d8b7
-w9  = 0xb60788f6d9ee19c42966d4f8d21be300e4b83ed6514995dc2a9044a296cbf044
-w10 = 0xda9c946b472a10b49fe0c3630ad2fbbcba9fc09693718edca7e13295f8d074ab
-w11 = 0x7d0c0fc36ca4d02fb5822d5649619ddda277ef0ed19233b504e452fc37276997
-w12 = 0x9e2dcea821e64d84fcb4969387993424eaee3c24785b7552b6988a4fa29196e2
diff --git a/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.s b/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.s
deleted file mode 100644
index e5af2e0739ea2..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_3072_consts_test.s
+++ /dev/null
@@ -1,152 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-.section .text.start
-
-/**
- * Standalone test for 3072 bit RSA Montgomery constant computation.
- *
- * Copies the message to wide registers for comparison (starting at
- * w0). See comment at the end of the file for expected values.
- */
-run_rsa_verify_3072_consts_test:
-  /* Compute m0_inv = (- (M^-1)) mod 2^256 */
-  jal      x1, compute_m0_inv
-
-  /* Compute R^2 = (2^3072)^2 mod M */
-  jal      x1, compute_rr
-
-  /* Copy m0_inv to w0 */
-  li       x8, 0
-  la       x21, m0inv
-  bn.lid   x8++, 0(x21)
-
-  /* copy all limbs of R^2 to wide reg file */
-  la       x21, rr
-  loopi    12, 2
-    bn.lid   x8, 0(x21++)
-    addi     x8, x8, 1
-
-  ecall
-
-
-.data
-
-/* Modulus of test key */
-.globl in_mod
-in_mod:
-  .word 0x6a6a75e1
-  .word 0xa018ddc5
-  .word 0x687bb168
-  .word 0x8e8205a5
-  .word 0x7dbfffa7
-  .word 0xc8722ac5
-  .word 0xf84d21cf
-  .word 0xe1312531
-  .word 0x0ce3f8a3
-  .word 0xa825f988
-  .word 0x57f51964
-  .word 0xb27e206a
-  .word 0x8e1dd008
-  .word 0x1c4fb8d7
-  .word 0x824fb142
-  .word 0x1c8be7b3
-  .word 0x7b9d6366
-  .word 0xc56ad0f2
-  .word 0xef762d5b
-  .word 0x4b1431e3
-  .word 0x8ae28eb9
-  .word 0xd41db7aa
-  .word 0x43cccdf7
-  .word 0x91b74a84
-  .word 0x80183850
-  .word 0x30e74d0d
-  .word 0xb62ed015
-  .word 0x235574d2
-  .word 0x8c28f251
-  .word 0x4f40def2
-  .word 0x24e2efdb
-  .word 0x9ebd1ff2
-  .word 0xfa7b49ee
-  .word 0x2819a938
-  .word 0x6e66b8c8
-  .word 0x24e41546
-  .word 0x4d783a7c
-  .word 0xd2947d3d
-  .word 0x1ab269e9
-  .word 0xfad39f16
-  .word 0xaab78f7b
-  .word 0x49d8b510
-  .word 0x35bf0dfb
-  .word 0xeb274754
-  .word 0x069eccc9
-  .word 0xc13c437e
-  .word 0xe3bc0f60
-  .word 0xc9e0e12f
-  .word 0xc253ac43
-  .word 0x89c240e0
-  .word 0xc4aba4e5
-  .word 0xedf34bc0
-  .word 0x5402c462
-  .word 0x4021b0bd
-  .word 0x996b6241
-  .word 0xc3d9945f
-  .word 0xa137ac60
-  .word 0xf0250bf5
-  .word 0xc8c7100f
-  .word 0xb70d6b88
-  .word 0x78916a8c
-  .word 0x33370e5d
-  .word 0x3970dcb9
-  .word 0xaf4c58b4
-  .word 0x5f78cb0d
-  .word 0xb02d90b7
-  .word 0xeb6c3d05
-  .word 0x04afc71a
-  .word 0x45185f0f
-  .word 0x987caa5b
-  .word 0x33976249
-  .word 0x565afdbc
-  .word 0x80a85056
-  .word 0x59e07655
-  .word 0x9a29e77d
-  .word 0x7a8dfb7f
-  .word 0x782e0204
-  .word 0x4d6713ff
-  .word 0x131000ea
-  .word 0xe18e1206
-  .word 0x21f57f30
-  .word 0xf24f038b
-  .word 0x59cf874d
-  .word 0x24c50525
-  .word 0xb52f170d
-  .word 0x46c9adde
-  .word 0x90e82c73
-  .word 0x1344ceaf
-  .word 0x663209f2
-  .word 0x24bd4fbf
-  .word 0x5e4ed04d
-  .word 0x0fce770a
-  .word 0x81f78793
-  .word 0xa792e13e
-  .word 0xa6c7bf58
-  .word 0xe1df9be8
-
-/* Output: Montgomery constant m0' */
-.globl m0inv
-m0inv:
-.zero 32
-
-/* Output: squared Mongomery Radix RR = (2^3072)^2 mod N */
-.globl rr
-rr:
-.zero 384
-
-/* Full key for reference:
-   modulus                       n = 0xe1df9be8a6c7bf58a792e13e81f787930fce770a5e4ed04d24bd4fbf663209f21344ceaf90e82c7346c9addeb52f170d24c5052559cf874df24f038b21f57f30e18e1206131000ea4d6713ff782e02047a8dfb7f9a29e77d59e0765580a85056565afdbc33976249987caa5b45185f0f04afc71aeb6c3d05b02d90b75f78cb0daf4c58b43970dcb933370e5d78916a8cb70d6b88c8c7100ff0250bf5a137ac60c3d9945f996b62414021b0bd5402c462edf34bc0c4aba4e589c240e0c253ac43c9e0e12fe3bc0f60c13c437e069eccc9eb27475435bf0dfb49d8b510aab78f7bfad39f161ab269e9d2947d3d4d783a7c24e415466e66b8c82819a938fa7b49ee9ebd1ff224e2efdb4f40def28c28f251235574d2b62ed01530e74d0d8018385091b74a8443cccdf7d41db7aa8ae28eb94b1431e3ef762d5bc56ad0f27b9d63661c8be7b3824fb1421c4fb8d78e1dd008b27e206a57f51964a825f9880ce3f8a3e1312531f84d21cfc8722ac57dbfffa78e8205a5687bb168a018ddc56a6a75e1
-   private exponent              d = 0x6041730707bffad6947efef72cdaa80f6f3e7cb351f2434984bd1a5585ff1006f5d82e3e5a41dee37748ae0c48e91ae93280b58b2fc545335dedf7241d222a045232c1928e20154bc41587cba852eef02aac03ffe25a3638d08adbd2df239b2cd7db29e34097243f19b912be176965e51809b28f51c14c15f6f8cc01a1317052d21ff67343414a06b081276184e66f622d060e8bf987ff5bd36a6e38cc6dd5cb5cdb05a461d485c829c4d1b5352e82b36814f4f4debb08e7fab769ff7e40bb19514af9168c9b773570c58f2c3e177edfe43d4e29ae72329a25d7da234ce73407d2619e5072dffbec1d9601446417d968de1e8772ce4b46fd5224cc0a6ddc889aedec8247de9a6b93f166df6981c487dc111b4eb0ec7bc15782db65570158da4523eab41c7455bd70c72a52e015a7cba482581bed16fef89213158c94f15592482069a742973b55372ced7d20dc9312980ce4696fa4d5715098c927fc12ab013af8df4b83869ef22b53c176f4a83b89cab93ce7f6e619ae0c59d7e511bebf06e3
-   public exponent               e = 65537
-   squared Montgomery radix     RR = 0x9e2dcea821e64d84fcb4969387993424eaee3c24785b7552b6988a4fa29196e27d0c0fc36ca4d02fb5822d5649619ddda277ef0ed19233b504e452fc37276997da9c946b472a10b49fe0c3630ad2fbbcba9fc09693718edca7e13295f8d074abb60788f6d9ee19c42966d4f8d21be300e4b83ed6514995dc2a9044a296cbf044524b09b77a58d0479774620afe4319c4f209e1234ce52e1d5c7070ff7516d8b74043add66878ec0dd9691ef573649941093520a20811a95fc509b5ca7a83d42a05f49af51ce689f5d9c77317ba59c5f5079883be4b4c22269bc14e3b234c8ff79849163aeabe1810c204b9ca0dbdc0cbce301343dd65e10898d8cc33c5b9a5be3d3d07f301dc7990ebc2405fe0112362c75cbb02879a18307e351549e642e25e90b209bf6c65ac0e6563c81a9ccd73f2b61eab77538c240e8aa862a9689a85bc32318a29f49dd5f776e77ababab5ae26da2e21031185bcae73f5cf6bcd410c5c546a7cfeeb165cd3d0f4fddadd38f5fbfb5be1e72c19d4ae9db9a2aca3eb77fa
-   Montgomery constant       d0inv = 0x98a44f84397e684144214c83228ab43e1972189cbba34b5a4edbef91d022772d589d52b3b503299cf32a0c7b9aa9f8ed9c9c366b607da6fdb89991c29ccb146c2a85b6f413e358be5d5dc40e0aa492340f1f6d2a6eb015203f7b91bfe789377dfeed5e6ba3ea7bb2efeb980bce2895730b4b884748224db64040f5917fab212b3e8a289c370861d6760493e5323d6bf82669e60cd77df7f292c7833225f0b060359d1271ff80f3647dd87f7c876d545bdd643fd577de4ec7c80fe2308ecbd78cdaabc95e174c58c3b93cabc138c679a617c756ff3fb6fca8d912be11297cf059830b54188eb1161e1a7476270a3514789414cf662c4e04da7672f3ea877446b2996af70106f38a77aafcc273ff441e5f0fc30d8cef33be30b15cfe44727c0936dc64262c4c771d236ad834fefc6f3228def492fa69ece22f8cdd6115f0a5133e7da9803aadf07cd11406fb58bda827cfc90a25828f25ef9512e25f1fcdf1cc061dfc9779711cad8ba96ced374965995095d310b20b908e3bfd3e34f7f09b71df
-*/
diff --git a/sw/otbn/crypto/tests/rsa_verify_3072_test.exp b/sw/otbn/crypto/tests/rsa_verify_3072_test.exp
deleted file mode 100644
index 97d2777ce8036..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_3072_test.exp
+++ /dev/null
@@ -1,17 +0,0 @@
-# Expected recovered message:
-w0  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w1  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w2  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w3  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w4  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w5  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w6  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w7  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w8  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w9  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w10 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w11 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w12 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w13 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w14 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w15 = 0x5555555555555555555555555555555555555555555555555555555555555555
diff --git a/sw/otbn/crypto/tests/rsa_verify_3072_test.s b/sw/otbn/crypto/tests/rsa_verify_3072_test.s
deleted file mode 100644
index 0182673bc2066..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_3072_test.s
+++ /dev/null
@@ -1,371 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-.section .text.start
-
-/**
- * Standalone test for 3072 bit RSA signature verification
- *
- * Uses the OTBN RSA 3072-bit only verification implementation to
- * obtain the message (digest) from a test signature.
- *
- * Copies the message to wide registers for comparison (starting at
- * w0). See comment at the end of the file for expected values.
- */
-run_rsa_verify_3072:
-  /* Set pointers to buffers. */
-  la        x24, out_buf
-  la        x16, in_mod
-  la        x23, in_buf
-  la        x26, rr
-  la        x17, m0inv
-
-  /* run modular exponentiation */
-  jal      x1, modexp_var_3072_f4
-
-  /* copy all limbs of result to wide reg file */
-  la       x8, 0
-  la       x21, out_buf
-  loopi    12, 2
-    bn.lid   x8, 0(x21++)
-    addi     x8, x8, 1
-
-  ecall
-
-
-.data
-
-/* Output buffer */
-.globl out_buf
-out_buf:
-  .zero 384
-
-/* Modulus of test key */
-.globl in_mod
-in_mod:
-  .word 0x6a6a75e1
-  .word 0xa018ddc5
-  .word 0x687bb168
-  .word 0x8e8205a5
-  .word 0x7dbfffa7
-  .word 0xc8722ac5
-  .word 0xf84d21cf
-  .word 0xe1312531
-  .word 0x0ce3f8a3
-  .word 0xa825f988
-  .word 0x57f51964
-  .word 0xb27e206a
-  .word 0x8e1dd008
-  .word 0x1c4fb8d7
-  .word 0x824fb142
-  .word 0x1c8be7b3
-  .word 0x7b9d6366
-  .word 0xc56ad0f2
-  .word 0xef762d5b
-  .word 0x4b1431e3
-  .word 0x8ae28eb9
-  .word 0xd41db7aa
-  .word 0x43cccdf7
-  .word 0x91b74a84
-  .word 0x80183850
-  .word 0x30e74d0d
-  .word 0xb62ed015
-  .word 0x235574d2
-  .word 0x8c28f251
-  .word 0x4f40def2
-  .word 0x24e2efdb
-  .word 0x9ebd1ff2
-  .word 0xfa7b49ee
-  .word 0x2819a938
-  .word 0x6e66b8c8
-  .word 0x24e41546
-  .word 0x4d783a7c
-  .word 0xd2947d3d
-  .word 0x1ab269e9
-  .word 0xfad39f16
-  .word 0xaab78f7b
-  .word 0x49d8b510
-  .word 0x35bf0dfb
-  .word 0xeb274754
-  .word 0x069eccc9
-  .word 0xc13c437e
-  .word 0xe3bc0f60
-  .word 0xc9e0e12f
-  .word 0xc253ac43
-  .word 0x89c240e0
-  .word 0xc4aba4e5
-  .word 0xedf34bc0
-  .word 0x5402c462
-  .word 0x4021b0bd
-  .word 0x996b6241
-  .word 0xc3d9945f
-  .word 0xa137ac60
-  .word 0xf0250bf5
-  .word 0xc8c7100f
-  .word 0xb70d6b88
-  .word 0x78916a8c
-  .word 0x33370e5d
-  .word 0x3970dcb9
-  .word 0xaf4c58b4
-  .word 0x5f78cb0d
-  .word 0xb02d90b7
-  .word 0xeb6c3d05
-  .word 0x04afc71a
-  .word 0x45185f0f
-  .word 0x987caa5b
-  .word 0x33976249
-  .word 0x565afdbc
-  .word 0x80a85056
-  .word 0x59e07655
-  .word 0x9a29e77d
-  .word 0x7a8dfb7f
-  .word 0x782e0204
-  .word 0x4d6713ff
-  .word 0x131000ea
-  .word 0xe18e1206
-  .word 0x21f57f30
-  .word 0xf24f038b
-  .word 0x59cf874d
-  .word 0x24c50525
-  .word 0xb52f170d
-  .word 0x46c9adde
-  .word 0x90e82c73
-  .word 0x1344ceaf
-  .word 0x663209f2
-  .word 0x24bd4fbf
-  .word 0x5e4ed04d
-  .word 0x0fce770a
-  .word 0x81f78793
-  .word 0xa792e13e
-  .word 0xa6c7bf58
-  .word 0xe1df9be8
-
-/* Montgomery constant m0' */
-.globl m0inv
-m0inv:
-.word 0xf09b71df
-.word 0xfd3e34f7
-.word 0x0b908e3b
-.word 0x95d310b2
-.word 0x49659950
-.word 0xa96ced37
-.word 0x711cad8b
-.word 0x1dfc9779
-.word 0xcdf1cc06
-.word 0x12e25f1f
-.word 0x8f25ef95
-.word 0xc90a2582
-.word 0xbda827cf
-.word 0x1406fb58
-.word 0xadf07cd1
-.word 0x7da9803a
-
-/* Squared Mongomery Radix RR = (2^3072)^2 mod N */
-.globl rr
-rr:
-.word 0xa3eb77fa
-.word 0x9db9a2ac
-.word 0x2c19d4ae
-.word 0xfb5be1e7
-.word 0xdd38f5fb
-.word 0xd0f4fdda
-.word 0xeb165cd3
-.word 0x546a7cfe
-.word 0xcd410c5c
-.word 0x73f5cf6b
-.word 0x1185bcae
-.word 0xda2e2103
-.word 0xbab5ae26
-.word 0x76e77aba
-.word 0xf49dd5f7
-.word 0x32318a29
-.word 0x689a85bc
-.word 0x8aa862a9
-.word 0x538c240e
-.word 0xb61eab77
-.word 0x9ccd73f2
-.word 0x6563c81a
-.word 0x6c65ac0e
-.word 0x90b209bf
-.word 0xe642e25e
-.word 0x7e351549
-.word 0x879a1830
-.word 0xc75cbb02
-.word 0xe0112362
-.word 0xebc2405f
-.word 0x01dc7990
-.word 0x3d3d07f3
-.word 0xc5b9a5be
-.word 0x98d8cc33
-.word 0xdd65e108
-.word 0xce301343
-.word 0x0dbdc0cb
-.word 0xc204b9ca
-.word 0xeabe1810
-.word 0x9849163a
-.word 0x234c8ff7
-.word 0x9bc14e3b
-.word 0x4b4c2226
-.word 0x079883be
-.word 0xba59c5f5
-.word 0xd9c77317
-.word 0x1ce689f5
-.word 0x05f49af5
-.word 0x7a83d42a
-.word 0xc509b5ca
-.word 0x0811a95f
-.word 0x093520a2
-.word 0x73649941
-.word 0xd9691ef5
-.word 0x6878ec0d
-.word 0x4043add6
-.word 0x7516d8b7
-.word 0x5c7070ff
-.word 0x4ce52e1d
-.word 0xf209e123
-.word 0xfe4319c4
-.word 0x9774620a
-.word 0x7a58d047
-.word 0x524b09b7
-.word 0x96cbf044
-.word 0x2a9044a2
-.word 0x514995dc
-.word 0xe4b83ed6
-.word 0xd21be300
-.word 0x2966d4f8
-.word 0xd9ee19c4
-.word 0xb60788f6
-.word 0xf8d074ab
-.word 0xa7e13295
-.word 0x93718edc
-.word 0xba9fc096
-.word 0x0ad2fbbc
-.word 0x9fe0c363
-.word 0x472a10b4
-.word 0xda9c946b
-.word 0x37276997
-.word 0x04e452fc
-.word 0xd19233b5
-.word 0xa277ef0e
-.word 0x49619ddd
-.word 0xb5822d56
-.word 0x6ca4d02f
-.word 0x7d0c0fc3
-.word 0xa29196e2
-.word 0xb6988a4f
-.word 0x785b7552
-.word 0xeaee3c24
-.word 0x87993424
-.word 0xfcb49693
-.word 0x21e64d84
-.word 0x9e2dcea8
-
-/* signature */
-.globl in_buf
-in_buf:
-.word 0xceb7e983
-.word 0xe693b200
-.word 0xf9153989
-.word 0xcf899599
-.word 0x1ec09fae
-.word 0xf2f88007
-.word 0x2a24eed5
-.word 0x9c5b7c4e
-.word 0x21a153b2
-.word 0xaf7583ae
-.word 0x04fdd694
-.word 0x7550094b
-.word 0xb2a69ac4
-.word 0xe49d8022
-.word 0x7ed6f162
-.word 0x14bb3a1b
-.word 0xbb29d8dd
-.word 0x5c5815c2
-.word 0x7a80d848
-.word 0xb122f449
-.word 0x59dca808
-.word 0xbc1443e2
-.word 0xe304ff93
-.word 0xcc97ee4b
-.word 0x42ef6b57
-.word 0x1436839f
-.word 0xae860b45
-.word 0x6a843a17
-.word 0x2381fb91
-.word 0x09fd0635
-.word 0xa431aac3
-.word 0xd7220269
-.word 0xdf3e2697
-.word 0x35e2915e
-.word 0xedba6956
-.word 0x1d387448
-.word 0x930006df
-.word 0x961e5f00
-.word 0xf2a7e960
-.word 0x884e4add
-.word 0x7dfe76b1
-.word 0x4079aa79
-.word 0x1f3a378d
-.word 0x96c20697
-.word 0x268aea57
-.word 0x2c8569a4
-.word 0x0474f512
-.word 0x2388555c
-.word 0x58679953
-.word 0xe73da3a0
-.word 0x43431b9a
-.word 0x699f04d3
-.word 0xfc0be066
-.word 0xcce606f2
-.word 0xd94cdfa0
-.word 0x6c1ddca3
-.word 0xe96c11f6
-.word 0xfc635db4
-.word 0x3bdb4f69
-.word 0xa621c3e7
-.word 0x9f292111
-.word 0xb86e1e6b
-.word 0xb74f923b
-.word 0x592967a0
-.word 0xc412097f
-.word 0x8c1c8ca7
-.word 0x494fcdb6
-.word 0x87c5fe0f
-.word 0x50c01aee
-.word 0x8a26368e
-.word 0xeaf12232
-.word 0x7dade4d8
-.word 0x39eb2ac6
-.word 0x744f8aaa
-.word 0xf34908ca
-.word 0x1e0c656c
-.word 0xe96d4e29
-.word 0x8575d194
-.word 0xe439bd31
-.word 0xa74a77e3
-.word 0x0f465b88
-.word 0xf4e21152
-.word 0x80400ad8
-.word 0xe58501ec
-.word 0xa29d7536
-.word 0x55c19326
-.word 0x9ebbc63e
-.word 0x20c75aee
-.word 0xef6783d7
-.word 0x59ffdba5
-.word 0x879b937b
-.word 0x43a5c74c
-.word 0x82b8f825
-.word 0xfdf04b3a
-.word 0x8fc62fbe
-.word 0x114e6da5
-
-
-/* Full key for reference:
-   modulus                       n = 0xe1df9be8a6c7bf58a792e13e81f787930fce770a5e4ed04d24bd4fbf663209f21344ceaf90e82c7346c9addeb52f170d24c5052559cf874df24f038b21f57f30e18e1206131000ea4d6713ff782e02047a8dfb7f9a29e77d59e0765580a85056565afdbc33976249987caa5b45185f0f04afc71aeb6c3d05b02d90b75f78cb0daf4c58b43970dcb933370e5d78916a8cb70d6b88c8c7100ff0250bf5a137ac60c3d9945f996b62414021b0bd5402c462edf34bc0c4aba4e589c240e0c253ac43c9e0e12fe3bc0f60c13c437e069eccc9eb27475435bf0dfb49d8b510aab78f7bfad39f161ab269e9d2947d3d4d783a7c24e415466e66b8c82819a938fa7b49ee9ebd1ff224e2efdb4f40def28c28f251235574d2b62ed01530e74d0d8018385091b74a8443cccdf7d41db7aa8ae28eb94b1431e3ef762d5bc56ad0f27b9d63661c8be7b3824fb1421c4fb8d78e1dd008b27e206a57f51964a825f9880ce3f8a3e1312531f84d21cfc8722ac57dbfffa78e8205a5687bb168a018ddc56a6a75e1
-   private exponent              d = 0x6041730707bffad6947efef72cdaa80f6f3e7cb351f2434984bd1a5585ff1006f5d82e3e5a41dee37748ae0c48e91ae93280b58b2fc545335dedf7241d222a045232c1928e20154bc41587cba852eef02aac03ffe25a3638d08adbd2df239b2cd7db29e34097243f19b912be176965e51809b28f51c14c15f6f8cc01a1317052d21ff67343414a06b081276184e66f622d060e8bf987ff5bd36a6e38cc6dd5cb5cdb05a461d485c829c4d1b5352e82b36814f4f4debb08e7fab769ff7e40bb19514af9168c9b773570c58f2c3e177edfe43d4e29ae72329a25d7da234ce73407d2619e5072dffbec1d9601446417d968de1e8772ce4b46fd5224cc0a6ddc889aedec8247de9a6b93f166df6981c487dc111b4eb0ec7bc15782db65570158da4523eab41c7455bd70c72a52e015a7cba482581bed16fef89213158c94f15592482069a742973b55372ced7d20dc9312980ce4696fa4d5715098c927fc12ab013af8df4b83869ef22b53c176f4a83b89cab93ce7f6e619ae0c59d7e511bebf06e3
-   public exponent               e = 65537
-   squared Montgomery radix     RR = 0x9e2dcea821e64d84fcb4969387993424eaee3c24785b7552b6988a4fa29196e27d0c0fc36ca4d02fb5822d5649619ddda277ef0ed19233b504e452fc37276997da9c946b472a10b49fe0c3630ad2fbbcba9fc09693718edca7e13295f8d074abb60788f6d9ee19c42966d4f8d21be300e4b83ed6514995dc2a9044a296cbf044524b09b77a58d0479774620afe4319c4f209e1234ce52e1d5c7070ff7516d8b74043add66878ec0dd9691ef573649941093520a20811a95fc509b5ca7a83d42a05f49af51ce689f5d9c77317ba59c5f5079883be4b4c22269bc14e3b234c8ff79849163aeabe1810c204b9ca0dbdc0cbce301343dd65e10898d8cc33c5b9a5be3d3d07f301dc7990ebc2405fe0112362c75cbb02879a18307e351549e642e25e90b209bf6c65ac0e6563c81a9ccd73f2b61eab77538c240e8aa862a9689a85bc32318a29f49dd5f776e77ababab5ae26da2e21031185bcae73f5cf6bcd410c5c546a7cfeeb165cd3d0f4fddadd38f5fbfb5be1e72c19d4ae9db9a2aca3eb77fa
-   Montgomery constant       d0inv = 0x98a44f84397e684144214c83228ab43e1972189cbba34b5a4edbef91d022772d589d52b3b503299cf32a0c7b9aa9f8ed9c9c366b607da6fdb89991c29ccb146c2a85b6f413e358be5d5dc40e0aa492340f1f6d2a6eb015203f7b91bfe789377dfeed5e6ba3ea7bb2efeb980bce2895730b4b884748224db64040f5917fab212b3e8a289c370861d6760493e5323d6bf82669e60cd77df7f292c7833225f0b060359d1271ff80f3647dd87f7c876d545bdd643fd577de4ec7c80fe2308ecbd78cdaabc95e174c58c3b93cabc138c679a617c756ff3fb6fca8d912be11297cf059830b54188eb1161e1a7476270a3514789414cf662c4e04da7672f3ea877446b2996af70106f38a77aafcc273ff441e5f0fc30d8cef33be30b15cfe44727c0936dc64262c4c771d236ad834fefc6f3228def492fa69ece22f8cdd6115f0a5133e7da9803aadf07cd11406fb58bda827cfc90a25828f25ef9512e25f1fcdf1cc061dfc9779711cad8ba96ced374965995095d310b20b908e3bfd3e34f7f09b71df
-*/
diff --git a/sw/otbn/crypto/tests/rsa_verify_exp3_test.exp b/sw/otbn/crypto/tests/rsa_verify_exp3_test.exp
deleted file mode 100644
index 97d2777ce8036..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_exp3_test.exp
+++ /dev/null
@@ -1,17 +0,0 @@
-# Expected recovered message:
-w0  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w1  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w2  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w3  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w4  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w5  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w6  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w7  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w8  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w9  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w10 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w11 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w12 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w13 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w14 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w15 = 0x5555555555555555555555555555555555555555555555555555555555555555
diff --git a/sw/otbn/crypto/tests/rsa_verify_exp3_test.s b/sw/otbn/crypto/tests/rsa_verify_exp3_test.s
deleted file mode 100644
index 6cc739bdd51ac..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_exp3_test.s
+++ /dev/null
@@ -1,382 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-
-.section .text.start
-
-/**
- * Standalone RSA 1024 encrypt
- *
- * Uses OTBN modexp bignum lib to encrypt the message from the .data segment
- * in this file with the public key consisting of e=65537 and modulus from
- * .data segment in this file.
- *
- * Copies the encrypted message to wide registers for comparison (starting at
- * w0). See comment at the end of the file for expected values.
- */
-run_rsa_verify_exp3:
-  jal      x1, modexp_var
-  /* pointer to out buffer */
-  lw        x21, 28(x0)
-
-  /* copy all limbs of result to wide reg file */
-  li       x8, 0
-  loop     x30, 2
-    bn.lid   x8, 0(x21++)
-    addi     x8, x8, 1
-
-  ecall
-
-
-.data
-
-/*
- * The words below are used by the code above, but the linker can't tell
- * because we reference them by absolute address. Make a global symbol
- * (cfg_data), which will refer to the whole lot and ensure that gc-sections
- * doesn't discard them.
- */
-.globl cfg_data
-cfg_data:
-
-/* exponent of the exponent (e') (Full exponent is e=2^e'+1) */
-.word 0x00000001
-
-/* number of limbs (N) */
-.word 0x0000000C
-
-/* pointer to m0' (dptr_m0d) */
-.word 0x00000280
-
-/* pointer to RR (dptr_rr) */
-.word 0x000002c0
-
-/* load pointer to modulus (dptr_m) */
-.word 0x00000080
-
-/* pointer to base bignum buffer (dptr_in) */
-.word 0x000004c0
-
-/* pointer to exponent buffer (dptr_exp, unused for encrypt) */
-.word 0x000006c0
-
-/* pointer to out buffer (dptr_out) */
-.word 0x000008c0
-
-/* Modulus */
-.org 0x80
-.word 0x3489eab3
-.word 0x23e3d222
-.word 0xbe69ae96
-.word 0xccc537fa
-.word 0xf83c6774
-.word 0xe683f91b
-.word 0x9c588896
-.word 0x44654dec
-.word 0x96729ce1
-.word 0x625a6410
-.word 0x6435e750
-.word 0xec42933f
-.word 0x130c9e34
-.word 0xeb1834b6
-.word 0x2a117689
-.word 0xb3b2f7bf
-.word 0x21f92171
-.word 0x4c1a1765
-.word 0x9a92fe4b
-.word 0xac9b5286
-.word 0x0049c14f
-.word 0x2531d556
-.word 0x3f6e28ae
-.word 0xe12124a6
-.word 0x40b11690
-.word 0xecfb1d29
-.word 0x9af61602
-.word 0x3d0f71b9
-.word 0x1b9246cf
-.word 0xbe254ff6
-.word 0xb2003ba0
-.word 0x440c6682
-.word 0x251589aa
-.word 0xb65e34bb
-.word 0x3c17861f
-.word 0xc24717a0
-.word 0x35588598
-.word 0xf8b64e80
-.word 0x71cd790b
-.word 0xa7ba410a
-.word 0x98ece611
-.word 0x3502cc9b
-.word 0xc75ac49f
-.word 0x415dd4ee
-.word 0x657989ed
-.word 0x784146ac
-.word 0x3d6dada5
-.word 0xb59e1a7a
-.word 0x4a97c7c6
-.word 0xc52b7408
-.word 0x269bfd6f
-.word 0x48caa59f
-.word 0x0a0e9ccf
-.word 0xd8274c58
-.word 0x34c920c7
-.word 0x731753c9
-.word 0xe258a425
-.word 0x62ca945e
-.word 0x7f200856
-.word 0xae144df9
-.word 0xbdd551af
-.word 0xfed9fe6e
-.word 0xd44e4c37
-.word 0x47388b19
-.word 0x576d7435
-.word 0xc0765a63
-.word 0xd8a3456f
-.word 0x4ffd380b
-.word 0xf99066a2
-.word 0xc83187e8
-.word 0xa17dfa22
-.word 0x41a5e04a
-.word 0x6b42c9bd
-.word 0x65f90f0e
-.word 0x73895904
-.word 0x76b858bf
-.word 0x1fd2a0db
-.word 0x3aa32a9d
-.word 0x642602f8
-.word 0xa8fc97ea
-.word 0xe5791ce9
-.word 0xc061288e
-.word 0xa20ed540
-.word 0x0bcc76ac
-.word 0x16031fd5
-.word 0x2d000229
-.word 0x54b087c4
-.word 0x789ffa18
-.word 0x25d78dc9
-.word 0xc7b8caf1
-.word 0x1d64086d
-.word 0xbc0904be
-.word 0x6a071710
-.word 0xdce0936a
-.word 0x569ca381
-.word 0xb6a5ac8b
-
-/* Montgomery constant m0' */
-.org 0x280
-.word 0x88df2b85
-.word 0xd4626f97
-.word 0x7f951ca7
-.word 0xec3ab561
-.word 0x711421b2
-.word 0x6d7fb66f
-.word 0x0811a625
-.word 0x2c21c9d7
-
-/* Squared Mongomery Radix RR = (2^3072)^2 mod N */
-.org 0x2c0
-.word 0x3863b1be
-.word 0x2913ebf7
-.word 0x4fc03d0e
-.word 0x482a3973
-.word 0xa3b8f6a9
-.word 0xf7473acb
-.word 0xbf4bd684
-.word 0xa22a9423
-.word 0x8d2fa6f6
-.word 0x7f1acc71
-.word 0x718c39ed
-.word 0xffeaa651
-.word 0xba592ce4
-.word 0xa05e4c98
-.word 0x89d5b580
-.word 0x7f394220
-.word 0xd02c350b
-.word 0x71692df1
-.word 0xf896a5b7
-.word 0x791e5249
-.word 0x0c7bf245
-.word 0x80c8c8b2
-.word 0x8bb7ca49
-.word 0xc91f3f3a
-.word 0x223bc9b1
-.word 0x22b07bc8
-.word 0xce145fbc
-.word 0xa04cd67e
-.word 0x3d7999d4
-.word 0xaac652fc
-.word 0x70380397
-.word 0x7ad5512a
-.word 0x605df8bb
-.word 0x6e694ebf
-.word 0x498901cb
-.word 0x6966203d
-.word 0x34ae90b6
-.word 0x0859c604
-.word 0x16b2ebaa
-.word 0x44d734e0
-.word 0x39caa18e
-.word 0x76d1d9a3
-.word 0x985570c8
-.word 0xbd4216e8
-.word 0x6ee8a815
-.word 0xf45f6b13
-.word 0xcafa40e9
-.word 0xb8884042
-.word 0xcda1fc24
-.word 0x34e64f10
-.word 0xeee01c26
-.word 0x6b42d326
-.word 0xe26972cd
-.word 0x71f6230c
-.word 0x27febf17
-.word 0xdafc774b
-.word 0x75777ad5
-.word 0x6e5c4c40
-.word 0x7995b95e
-.word 0x2465f6f7
-.word 0x6783399a
-.word 0xe571421a
-.word 0x8faf084a
-.word 0xd303dd08
-.word 0x92cc413e
-.word 0x1029f59f
-.word 0x08bec8f5
-.word 0x8d3ae156
-.word 0xbe3b3cae
-.word 0x4a52fd6a
-.word 0xc9979f63
-.word 0x66dc5646
-.word 0x315f0f71
-.word 0xf867366a
-.word 0x809ce4b1
-.word 0xb69b56d3
-.word 0xb0b219d7
-.word 0xede105a6
-.word 0xfc70656a
-.word 0x7f27b7bd
-.word 0x74e0004b
-.word 0xe8bb9577
-.word 0x2df61aba
-.word 0x4ef701ea
-.word 0x2d1f4d03
-.word 0x17961c80
-.word 0x7b01bded
-.word 0x852a41bb
-.word 0x5e173716
-.word 0xf48a5071
-.word 0x3dba1742
-.word 0xa3a5c9ae
-.word 0xfd275d1c
-.word 0x2f3937f9
-.word 0x45579413
-.word 0x2951778f
-
-/* signature */
-.org 0x4c0
-.word 0xca60cb6e
-.word 0xd3a786de
-.word 0x37623afb
-.word 0x7f6cbc1a
-.word 0x5366d957
-.word 0xe69ffe2f
-.word 0x3560dc40
-.word 0xf8b205c5
-.word 0xa612764f
-.word 0xb0415cf7
-.word 0x5c5b87d9
-.word 0xe0081c67
-.word 0xadc8d9bd
-.word 0xdd072b18
-.word 0x8e22b48b
-.word 0x758b9df3
-.word 0xb208d5ab
-.word 0x5f1bcb08
-.word 0xb16f9e88
-.word 0xf2d37daf
-.word 0xf7fc6ecb
-.word 0x5a102bb9
-.word 0xe61a9b3f
-.word 0x96541e3e
-.word 0x3718d3ef
-.word 0x769b35c2
-.word 0xf571f77a
-.word 0x82a6f325
-.word 0xaa5ef30c
-.word 0x17048840
-.word 0xc71ddc21
-.word 0xc7bc71ed
-.word 0x14f7ed74
-.word 0x7a3d6a80
-.word 0xebb0c73d
-.word 0x5f28b2c2
-.word 0x56a502db
-.word 0x39a3814f
-.word 0x37df9ba4
-.word 0x397e700d
-.word 0x6c03a24d
-.word 0x9efa0232
-.word 0x257c4b77
-.word 0xa928a03a
-.word 0x43455edd
-.word 0x57e509fb
-.word 0x32458a00
-.word 0x09941f22
-.word 0xca9af629
-.word 0x76a01068
-.word 0x4c638cbe
-.word 0x9b8a3ff6
-.word 0x3979752d
-.word 0x6d4c9bb8
-.word 0x3ee6189c
-.word 0xab9b7212
-.word 0x2116de70
-.word 0x429344c4
-.word 0x072412c7
-.word 0x747fff3d
-.word 0x9d07cc3f
-.word 0xb188d846
-.word 0xcf4959ed
-.word 0xc622387c
-.word 0x32aeb26b
-.word 0xf2921d28
-.word 0x60793032
-.word 0x061e4108
-.word 0x6d70682b
-.word 0x062ffa0b
-.word 0x2b1f1696
-.word 0x507a26f5
-.word 0x1401059c
-.word 0x202485a9
-.word 0xfe963ae9
-.word 0x54423a9d
-.word 0x9731f9bb
-.word 0x227e9788
-.word 0x50846b54
-.word 0x1e9f59f1
-.word 0x3f158119
-.word 0xc36f0b7b
-.word 0xbef3b349
-.word 0xf9172b6f
-.word 0x3daf21c0
-.word 0x819ee37e
-.word 0x0bba9299
-.word 0x90727884
-.word 0xc74908f9
-.word 0xec095a40
-.word 0x8e2120dd
-.word 0xfbefd497
-.word 0x2227f721
-.word 0xb7abdc98
-.word 0xf7e55656
-.word 0x3be75b5c
-
-
-/* Full key for reference:
-   modulus                       n = 0xb6a5ac8b569ca381dce0936a6a071710bc0904be1d64086dc7b8caf125d78dc9789ffa1854b087c42d00022916031fd50bcc76aca20ed540c061288ee5791ce9a8fc97ea642602f83aa32a9d1fd2a0db76b858bf7389590465f90f0e6b42c9bd41a5e04aa17dfa22c83187e8f99066a24ffd380bd8a3456fc0765a63576d743547388b19d44e4c37fed9fe6ebdd551afae144df97f20085662ca945ee258a425731753c934c920c7d8274c580a0e9ccf48caa59f269bfd6fc52b74084a97c7c6b59e1a7a3d6dada5784146ac657989ed415dd4eec75ac49f3502cc9b98ece611a7ba410a71cd790bf8b64e8035588598c24717a03c17861fb65e34bb251589aa440c6682b2003ba0be254ff61b9246cf3d0f71b99af61602ecfb1d2940b11690e12124a63f6e28ae2531d5560049c14fac9b52869a92fe4b4c1a176521f92171b3b2f7bf2a117689eb1834b6130c9e34ec42933f6435e750625a641096729ce144654dec9c588896e683f91bf83c6774ccc537fabe69ae9623e3d2223489eab3
-   private exponent              d = 0x1e70f217391a1b404f7ac33c67012e82ca0180ca5a3b56bcf69ecc7d864e97a1941aa9aeb8c816a0b22aab06d900854e2ca213c77057ce35756586c27b942f7c46d4c3fc660655d409c5dc6f854dc579e91eb9753dec3980bba982826735cc4a359ba561c594ff05cc0841517eed667062aa3401f9708b92a013b9bb393ce8b38bdec1d9a36262095524551274f8e2f29d0362543fdaac0e65cc6e0fd0641b5b932e8df6de218576a4068cb957026f77e1771b9a866f54e7f631e8ac0c6ea14b80c0e7c91cb13c916bc6189e79956f79cccc6d1e921ad67b72ae9ccf28593dc148e7fb42114d4a638a9fb6ee029e67873fc10cdd2914896ecdab80365ec3810e0de1a5ab64b7ea15de699fc14c8756e110a5cdbb58b5313d9c82b2e4c0860d670bfd31a7b01bd973a8b5a2756bd63e65310a128e3a3d6426b85f886ef3a3d23641c9533cb083e2af898e7523f61cd1981466b1895870f4aa8ce9d3c4cdf98cbaed118f4d29091c15fcf87ab572c55992b814ecacdfec2aca13e47956129c022b
-   public exponent               e = 3
-   squared Montgomery radix     RR = 0x2951778f455794132f3937f9fd275d1ca3a5c9ae3dba1742f48a50715e173716852a41bb7b01bded17961c802d1f4d034ef701ea2df61abae8bb957774e0004b7f27b7bdfc70656aede105a6b0b219d7b69b56d3809ce4b1f867366a315f0f7166dc5646c9979f634a52fd6abe3b3cae8d3ae15608bec8f51029f59f92cc413ed303dd088faf084ae571421a6783399a2465f6f77995b95e6e5c4c4075777ad5dafc774b27febf1771f6230ce26972cd6b42d326eee01c2634e64f10cda1fc24b8884042cafa40e9f45f6b136ee8a815bd4216e8985570c876d1d9a339caa18e44d734e016b2ebaa0859c60434ae90b66966203d498901cb6e694ebf605df8bb7ad5512a70380397aac652fc3d7999d4a04cd67ece145fbc22b07bc8223bc9b1c91f3f3a8bb7ca4980c8c8b20c7bf245791e5249f896a5b771692df1d02c350b7f39422089d5b580a05e4c98ba592ce4ffeaa651718c39ed7f1acc718d2fa6f6a22a9423bf4bd684f7473acba3b8f6a9482a39734fc03d0e2913ebf73863b1be
-   Montgomery constant       m0inv = 0x468118b0b73114b22b37b480f5223ce79d8c695e44f9d7feae6d8747ab64a2e3d5bef3ff92e12a0bd0991ec4ce51d4403425247e409601732a860ad7adbfca840eb7c08bf2bda3d9ba65cbfb9e298d827ca479116700eab481933bf0bc4d09d99077ef3276b79066ddab13883d8f02d4a4592e13d9869353a26581ef88d52601b93c4337f3d1ec19b1eb9e58863344d38be53f29062cb0f4d6709586d29dedeae2a58841294a5fe2fcc9734a56aea4c10e82a7ff570c841e4ac15a3950e20a39a0bf581914ae8c00b0ed1644df6d2623c10b7977869a542d6c9958fb7a6695ed0e4e0e2798b3e149c4876ba5c2f02cfa6ec27b1ecb399f33a5dd45946c81a9ac9a6e1ef7dfa5c8d2eefc8af9f4ba8ec447fa654908fb78aeaed772d36c63cf58369abeeaf3ec5b48ba384dda0fba63a055e9e1d2d8068b200fcf15ce4d12b89654ac4dd294c04ee07207ff2801b3623cefc77abe66d238b9e010f1cd8d9f47e92c21c9d70811a6256d7fb66f711421b2ec3ab5617f951ca7d4626f9788df2b85
-*/
diff --git a/sw/otbn/crypto/tests/rsa_verify_test.exp b/sw/otbn/crypto/tests/rsa_verify_test.exp
deleted file mode 100644
index 97d2777ce8036..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_test.exp
+++ /dev/null
@@ -1,17 +0,0 @@
-# Expected recovered message:
-w0  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w1  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w2  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w3  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w4  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w5  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w6  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w7  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w8  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w9  = 0x5555555555555555555555555555555555555555555555555555555555555555
-w10 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w11 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w12 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w13 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w14 = 0x5555555555555555555555555555555555555555555555555555555555555555
-w15 = 0x5555555555555555555555555555555555555555555555555555555555555555
diff --git a/sw/otbn/crypto/tests/rsa_verify_test.s b/sw/otbn/crypto/tests/rsa_verify_test.s
deleted file mode 100644
index 1bf37e89358fd..0000000000000
--- a/sw/otbn/crypto/tests/rsa_verify_test.s
+++ /dev/null
@@ -1,390 +0,0 @@
-/* Copyright lowRISC contributors (OpenTitan project). */
-/* Licensed under the Apache License, Version 2.0, see LICENSE for details. */
-/* SPDX-License-Identifier: Apache-2.0 */
-
-
-.section .text.start
-
-/**
- * Standalone RSA 1024 encrypt
- *
- * Uses OTBN modexp bignum lib to encrypt the message from the .data segment
- * in this file with the public key consisting of e=65537 and modulus from
- * .data segment in this file.
- *
- * Copies the encrypted message to wide registers for comparison (starting at
- * w0). See comment at the end of the file for expected values.
- */
-run_rsa_verify:
-  jal      x1, modexp_var
-  /* pointer to out buffer */
-  lw        x21, 28(x0)
-
-  /* copy all limbs of result to wide reg file */
-  li       x8, 0
-  loop     x30, 2
-    bn.lid   x8, 0(x21++)
-    addi     x8, x8, 1
-
-  ecall
-
-
-.data
-
-/*
- * The words below are used by the code above, but the linker can't tell
- * because we reference them by absolute address. Make a global symbol
- * (cfg_data), which will refer to the whole lot and ensure that gc-sections
- * doesn't discard them.
- */
-.globl cfg_data
-cfg_data:
-
-/* exponent of the exponent (e') (Full exponent is e=2^e'+1) */
-.word 0x00000010
-
-/* number of limbs (N) */
-.word 0x0000000C
-
-/* pointer to m0' (dptr_m0d) */
-.word 0x00000280
-
-/* pointer to RR (dptr_rr) */
-.word 0x000002c0
-
-/* load pointer to modulus (dptr_m) */
-.word 0x00000080
-
-/* pointer to base bignum buffer (dptr_in) */
-.word 0x000004c0
-
-/* pointer to exponent buffer (dptr_exp, unused for encrypt) */
-.word 0x000006c0
-
-/* pointer to out buffer (dptr_out) */
-.word 0x000008c0
-
-/* Modulus */
-.org 0x80
-.word 0x6a6a75e1
-.word 0xa018ddc5
-.word 0x687bb168
-.word 0x8e8205a5
-.word 0x7dbfffa7
-.word 0xc8722ac5
-.word 0xf84d21cf
-.word 0xe1312531
-.word 0x0ce3f8a3
-.word 0xa825f988
-.word 0x57f51964
-.word 0xb27e206a
-.word 0x8e1dd008
-.word 0x1c4fb8d7
-.word 0x824fb142
-.word 0x1c8be7b3
-.word 0x7b9d6366
-.word 0xc56ad0f2
-.word 0xef762d5b
-.word 0x4b1431e3
-.word 0x8ae28eb9
-.word 0xd41db7aa
-.word 0x43cccdf7
-.word 0x91b74a84
-.word 0x80183850
-.word 0x30e74d0d
-.word 0xb62ed015
-.word 0x235574d2
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-.word 0x4f40def2
-.word 0x24e2efdb
-.word 0x9ebd1ff2
-.word 0xfa7b49ee
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-.word 0xc9e0e12f
-.word 0xc253ac43
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-.word 0xc4aba4e5
-.word 0xedf34bc0
-.word 0x5402c462
-.word 0x4021b0bd
-.word 0x996b6241
-.word 0xc3d9945f
-.word 0xa137ac60
-.word 0xf0250bf5
-.word 0xc8c7100f
-.word 0xb70d6b88
-.word 0x78916a8c
-.word 0x33370e5d
-.word 0x3970dcb9
-.word 0xaf4c58b4
-.word 0x5f78cb0d
-.word 0xb02d90b7
-.word 0xeb6c3d05
-.word 0x04afc71a
-.word 0x45185f0f
-.word 0x987caa5b
-.word 0x33976249
-.word 0x565afdbc
-.word 0x80a85056
-.word 0x59e07655
-.word 0x9a29e77d
-.word 0x7a8dfb7f
-.word 0x782e0204
-.word 0x4d6713ff
-.word 0x131000ea
-.word 0xe18e1206
-.word 0x21f57f30
-.word 0xf24f038b
-.word 0x59cf874d
-.word 0x24c50525
-.word 0xb52f170d
-.word 0x46c9adde
-.word 0x90e82c73
-.word 0x1344ceaf
-.word 0x663209f2
-.word 0x24bd4fbf
-.word 0x5e4ed04d
-.word 0x0fce770a
-.word 0x81f78793
-.word 0xa792e13e
-.word 0xa6c7bf58
-.word 0xe1df9be8
-
-/* Montgomery constant m0' */
-.org 0x280
-.word 0xf09b71df
-.word 0xfd3e34f7
-.word 0x0b908e3b
-.word 0x95d310b2
-.word 0x49659950
-.word 0xa96ced37
-.word 0x711cad8b
-.word 0x1dfc9779
-.word 0xcdf1cc06
-.word 0x12e25f1f
-.word 0x8f25ef95
-.word 0xc90a2582
-.word 0xbda827cf
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-
-/* Squared Mongomery Radix RR = (2^3072)^2 mod N */
-.org 0x2c0
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-
-/* signature */
-.org 0x4c0
-.word 0xceb7e983
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-.word 0xf9153989
-.word 0xcf899599
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-
-
-/* Full key for reference:
-   modulus                       n = 0xe1df9be8a6c7bf58a792e13e81f787930fce770a5e4ed04d24bd4fbf663209f21344ceaf90e82c7346c9addeb52f170d24c5052559cf874df24f038b21f57f30e18e1206131000ea4d6713ff782e02047a8dfb7f9a29e77d59e0765580a85056565afdbc33976249987caa5b45185f0f04afc71aeb6c3d05b02d90b75f78cb0daf4c58b43970dcb933370e5d78916a8cb70d6b88c8c7100ff0250bf5a137ac60c3d9945f996b62414021b0bd5402c462edf34bc0c4aba4e589c240e0c253ac43c9e0e12fe3bc0f60c13c437e069eccc9eb27475435bf0dfb49d8b510aab78f7bfad39f161ab269e9d2947d3d4d783a7c24e415466e66b8c82819a938fa7b49ee9ebd1ff224e2efdb4f40def28c28f251235574d2b62ed01530e74d0d8018385091b74a8443cccdf7d41db7aa8ae28eb94b1431e3ef762d5bc56ad0f27b9d63661c8be7b3824fb1421c4fb8d78e1dd008b27e206a57f51964a825f9880ce3f8a3e1312531f84d21cfc8722ac57dbfffa78e8205a5687bb168a018ddc56a6a75e1
-   private exponent              d = 0x6041730707bffad6947efef72cdaa80f6f3e7cb351f2434984bd1a5585ff1006f5d82e3e5a41dee37748ae0c48e91ae93280b58b2fc545335dedf7241d222a045232c1928e20154bc41587cba852eef02aac03ffe25a3638d08adbd2df239b2cd7db29e34097243f19b912be176965e51809b28f51c14c15f6f8cc01a1317052d21ff67343414a06b081276184e66f622d060e8bf987ff5bd36a6e38cc6dd5cb5cdb05a461d485c829c4d1b5352e82b36814f4f4debb08e7fab769ff7e40bb19514af9168c9b773570c58f2c3e177edfe43d4e29ae72329a25d7da234ce73407d2619e5072dffbec1d9601446417d968de1e8772ce4b46fd5224cc0a6ddc889aedec8247de9a6b93f166df6981c487dc111b4eb0ec7bc15782db65570158da4523eab41c7455bd70c72a52e015a7cba482581bed16fef89213158c94f15592482069a742973b55372ced7d20dc9312980ce4696fa4d5715098c927fc12ab013af8df4b83869ef22b53c176f4a83b89cab93ce7f6e619ae0c59d7e511bebf06e3
-   public exponent               e = 65537
-   squared Montgomery radix     RR = 0x9e2dcea821e64d84fcb4969387993424eaee3c24785b7552b6988a4fa29196e27d0c0fc36ca4d02fb5822d5649619ddda277ef0ed19233b504e452fc37276997da9c946b472a10b49fe0c3630ad2fbbcba9fc09693718edca7e13295f8d074abb60788f6d9ee19c42966d4f8d21be300e4b83ed6514995dc2a9044a296cbf044524b09b77a58d0479774620afe4319c4f209e1234ce52e1d5c7070ff7516d8b74043add66878ec0dd9691ef573649941093520a20811a95fc509b5ca7a83d42a05f49af51ce689f5d9c77317ba59c5f5079883be4b4c22269bc14e3b234c8ff79849163aeabe1810c204b9ca0dbdc0cbce301343dd65e10898d8cc33c5b9a5be3d3d07f301dc7990ebc2405fe0112362c75cbb02879a18307e351549e642e25e90b209bf6c65ac0e6563c81a9ccd73f2b61eab77538c240e8aa862a9689a85bc32318a29f49dd5f776e77ababab5ae26da2e21031185bcae73f5cf6bcd410c5c546a7cfeeb165cd3d0f4fddadd38f5fbfb5be1e72c19d4ae9db9a2aca3eb77fa
-   Montgomery constant       d0inv = 0x98a44f84397e684144214c83228ab43e1972189cbba34b5a4edbef91d022772d589d52b3b503299cf32a0c7b9aa9f8ed9c9c366b607da6fdb89991c29ccb146c2a85b6f413e358be5d5dc40e0aa492340f1f6d2a6eb015203f7b91bfe789377dfeed5e6ba3ea7bb2efeb980bce2895730b4b884748224db64040f5917fab212b3e8a289c370861d6760493e5323d6bf82669e60cd77df7f292c7833225f0b060359d1271ff80f3647dd87f7c876d545bdd643fd577de4ec7c80fe2308ecbd78cdaabc95e174c58c3b93cabc138c679a617c756ff3fb6fca8d912be11297cf059830b54188eb1161e1a7476270a3514789414cf662c4e04da7672f3ea877446b2996af70106f38a77aafcc273ff441e5f0fc30d8cef33be30b15cfe44727c0936dc64262c4c771d236ad834fefc6f3228def492fa69ece22f8cdd6115f0a5133e7da9803aadf07cd11406fb58bda827cfc90a25828f25ef9512e25f1fcdf1cc061dfc9779711cad8ba96ced374965995095d310b20b908e3bfd3e34f7f09b71df
-*/
diff --git a/third_party/README.md b/third_party/README.md
index 1228e4a364a8e..10b149d492b28 100644
--- a/third_party/README.md
+++ b/third_party/README.md
@@ -1,39 +1,105 @@
-OpenTitan `//third_party`
-==========
-
-OpenTitan depends on a number of third party components. This directory consists of:
-- Bazel files describing how to acquire them from the Internet, and incorporate them
-  into the OpenTitan workspace.
-- Glue code for plugging dependencies into first-party software.
-
-Every dependency lives in a subdirectory; each subdirectory consists of at least three
-files:
-1.  A (usually empty) `BUILD` file to specify that file as a Bazel package.
-2.  A `repos.bzl`, which exports a macro called `blah_repos()` that can be called in the
-    `WORKSPACE` to declare the remote repositories required for the dependency.
-3.  A `deps.bzl`, which exports a macro called `blah_deps()` that uses the repositories
-    created by `blah_repos()` to set up any other requirements of the dependency. It must
-    be called in the `WORKSPACE` file after `blah_repos()` is called. Some dependencies
-    can skip this step.
-
-Thus, for each third party dependency, a stanza like the following should appear in the
-`WORKSPACE`:
-
-```bazel
-load("//third_party/<dep>/repos.bzl", "<dep>_repos")
-<dep>_repos()
-load("//third_party/<dep>/deps.bzl", "<dep>_deps")
-<dep>_deps()
+# OpenTitan external dependencies
+
+OpenTitan depends on a number of third-party components.
+
+These include:
+
+* Bazel rule dependencies (e.g. `rules_rust` for building Rust code).
+* Package dependencies (e.g. Rust crates, Python packages, APT packages).
+* Source dependencies (e.g. the source for OpenOCD, test vectors).
+* External silicon RTL.
+
+This document describes how we manage each of these kinds of dependency.
+
+## Bazel rule dependencies
+
+This repository forms a Bazel module described by the `MODULE.bazel` file at the
+root. We use a feature called [Bzlmod] to depend on other modules by adding `bazel_dep`
+directives to the `MODULE.bazel` file.
+
+Some Bazel modules expose "extensions" for extra features such as registering
+toolchains and downloading package dependencies. This example uses an extension from
+`rules_python` to create a specific Python toolchain that we can register:
+
+```python
+python = use_extension("@rules_python//python/extensions:python.bzl", "python")
+python.toolchain(
+    is_default = True,
+    python_version = "3.9",
+)
+use_repo(python, "pythons_hub")
+register_toolchains("@pythons_hub//:all")
 ```
 
-In some cases, the `BUILD` file for the dependency will declare rules for tests, such as
-`rv-compliance`. As a rule of thumb, if a dependency is being pulled in specifically for
-some kind of test suite, the test rules should live in `//third_party`, where they can depend
-on other parts of the tree.
+Extensions generate Bazel repositories (`pythons_hub` in this example) that
+can be imported our module's namespace.
+
+If a Bazel dependency requires lots of extension calls, consider extracting them
+to a new `third_party/${name}/${name}.MODULE.bazel` file and `include`ing it in
+the main `MODULE.bazel`.
+
+[Bzlmod]: https://bazel.build/external/overview#bzlmod
+
+## Package dependencies
+
+We tend to use an ecosystem's package definition format to list our dependencies and
+then install them manually or within Bazel depending on how they're used.
+
+These package manifests can be found at:
+
+* Python: `pyproject.toml` in the root of the repository.
+* Rust: `third_party/rust/Cargo.toml` for most dependencies.
+
+  * We have additional `Cargo.toml` files to allow certain projects to use
+  different dependency versions.
+
+* Bzlmod: `MODULE.bazel` in the root of the repository.
+* APT: `apt-requirements.txt` in the root of the repository.
+
+Some of these manifests have lock files which ensure we're using exactly the same
+versions on different builds. These must be kept up to date with changes to the
+manifests. Use `./ci/scripts/check-lock-files.sh` to check and regenerate lock files.
+
+## Source dependencies
+
+Sometimes we need access to external source and data files. These are brought into
+our Bazel module using Bzlmod extensions.
+
+To add a new source dependency:
+
+1. Create a new file `third_party/my_dep/extensions.bzl` for your extension.
+2. Create a Starlark function to download any repositories you need:
+
+   ```python
+   def _my_repos():
+       http_archive(
+           name = "my_repo",
+           url = "...",
+           sha256 = "...",
+       )
+   ```
+
+3. Create a Bzlmod extension for your function:
+
+   ```python
+   my_extension = module_extension(
+       implementation = lambda _: _my_repos(),
+   )
+   ```
+
+4. Use your extension from `MODULE.bazel` like you would with external modules:
+
+   ```python
+   my_extension = use_extension("//third_party/my_dep:extensions.bzl", "my_extension")
+   use_repo(my_extension, "my_repo")
+   ```
+
+You should now be able to access your repository's files from Bazel using
+`@my_repo//:path/to/file`.
 
 ## Third-party Silicon IP
 
-Currently, silicon uses a separate vendoring mechanism: `util/vendor.py`. There are no
-concrete plans to migrate off of this script for hardware. This script should not be
-used for new software dependencies; instead, use the `//third_party` directory and Bazel
-repositories instead.
\ No newline at end of file
+Currently, silicon uses a separate vendoring mechanism: `util/vendor.py`.
+There are no concrete plans to migrate off of this script for hardware. This
+script should not be used for new software dependencies; instead, use the
+`//third_party` directory and Bzlmod extensions instead.
diff --git a/third_party/coremark/BUILD.coremark.bazel b/third_party/coremark/BUILD.coremark.bazel
index bf306721651c2..a65cba8df203d 100644
--- a/third_party/coremark/BUILD.coremark.bazel
+++ b/third_party/coremark/BUILD.coremark.bazel
@@ -16,9 +16,12 @@ cc_library(
     hdrs = [
         "coremark.h",
     ],
-    features = [
-        "-implicit_conversion_warnings",
-        "-strict_prototypes_warnings",
+    copts = [
+        "-Wno-implicit-fallthrough",
+        "-Wno-strict-prototypes",
+        "-Wno-implicit-int-conversion",
+        "-Wno-sign-conversion",
+        "-Wno-shorten-64-to-32",
     ],
     includes = ["."],
     deps = [
diff --git a/third_party/coremark/extensions.bzl b/third_party/coremark/extensions.bzl
new file mode 100644
index 0000000000000..4a803198aa779
--- /dev/null
+++ b/third_party/coremark/extensions.bzl
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+coremark = module_extension(
+    implementation = lambda _: _coremark_repos(),
+)
+
+def _coremark_repos():
+    http_archive(
+        name = "coremark",
+        build_file = Label("//third_party/coremark:BUILD.coremark.bazel"),
+        sha256 = "a5964bf215786d65d08941b6f9a9a4f4e50524f5391fa3826db2994c47d5e7f3",
+        strip_prefix = "coremark-eefc986ebd3452d6adde22eafaff3e5c859f29e4",
+        urls = [
+            "https://github.com/eembc/coremark/archive/eefc986ebd3452d6adde22eafaff3e5c859f29e4.tar.gz",
+        ],
+        patches = [
+            Label("//third_party/coremark/patches:use_ottf_main.patch"),
+            Label("//third_party/coremark/patches:print_coremark_per_mhz.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/google/BUILD b/third_party/coremark/patches/BUILD
similarity index 100%
rename from third_party/google/BUILD
rename to third_party/coremark/patches/BUILD
diff --git a/third_party/coremark/print_coremark_per_mhz.patch b/third_party/coremark/patches/print_coremark_per_mhz.patch
similarity index 100%
rename from third_party/coremark/print_coremark_per_mhz.patch
rename to third_party/coremark/patches/print_coremark_per_mhz.patch
diff --git a/third_party/coremark/use_ottf_main.patch b/third_party/coremark/patches/use_ottf_main.patch
similarity index 100%
rename from third_party/coremark/use_ottf_main.patch
rename to third_party/coremark/patches/use_ottf_main.patch
diff --git a/third_party/coremark/repos.bzl b/third_party/coremark/repos.bzl
deleted file mode 100644
index 16f3c486f5fb5..0000000000000
--- a/third_party/coremark/repos.bzl
+++ /dev/null
@@ -1,21 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def coremark_repos():
-    http_archive(
-        name = "coremark",
-        build_file = Label("//third_party/coremark:BUILD.coremark.bazel"),
-        sha256 = "a5964bf215786d65d08941b6f9a9a4f4e50524f5391fa3826db2994c47d5e7f3",
-        strip_prefix = "coremark-eefc986ebd3452d6adde22eafaff3e5c859f29e4",
-        urls = [
-            "https://github.com/eembc/coremark/archive/eefc986ebd3452d6adde22eafaff3e5c859f29e4.tar.gz",
-        ],
-        patches = [
-            Label("//third_party/coremark:use_ottf_main.patch"),
-            Label("//third_party/coremark:print_coremark_per_mhz.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/third_party/coremark/top_earlgrey/BUILD b/third_party/coremark/top_earlgrey/BUILD
index fc2fefe76d244..7ae5a089416e9 100644
--- a/third_party/coremark/top_earlgrey/BUILD
+++ b/third_party/coremark/top_earlgrey/BUILD
@@ -28,7 +28,6 @@ opentitan_test(
     name = "coremark_test",
     srcs = [
         "core_portme.c",
-        "cvt.c",
         "ee_printf.c",
     ],
     copts = [
@@ -48,6 +47,9 @@ opentitan_test(
     ),
     verilator = verilator_params(
         timeout = "eternal",
+        # This test can take > 60 minutes, so mark it manual as it shouldn't
+        # run in CI/nightlies.
+        tags = ["manual"],
     ),
     deps = [
         ":core_portme",
diff --git a/third_party/coremark/top_earlgrey/cvt.c b/third_party/coremark/top_earlgrey/cvt.c
deleted file mode 100644
index 333e8ead2533b..0000000000000
--- a/third_party/coremark/top_earlgrey/cvt.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
-Copyright 2018 Embedded Microprocessor Benchmark Consortium (EEMBC)
-
-Licensed under the Apache License, Version 2.0 (the "License");
-you may not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    http://www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an "AS IS" BASIS,
-WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-*/
-#include <math.h>
-#define CVTBUFSIZE 80
-static char CVTBUF[CVTBUFSIZE];
-
-static char *
-cvt(double arg, int ndigits, int *decpt, int *sign, char *buf, int eflag)
-{
-    int    r2;
-    double fi, fj;
-    char * p, *p1;
-
-    if (ndigits < 0)
-        ndigits = 0;
-    if (ndigits >= CVTBUFSIZE - 1)
-        ndigits = CVTBUFSIZE - 2;
-    r2    = 0;
-    *sign = 0;
-    p     = &buf[0];
-    if (arg < 0)
-    {
-        *sign = 1;
-        arg   = -arg;
-    }
-    arg = modf(arg, &fi);
-    p1  = &buf[CVTBUFSIZE];
-
-    if (fi != 0)
-    {
-        p1 = &buf[CVTBUFSIZE];
-        while (fi != 0)
-        {
-            fj    = modf(fi / 10, &fi);
-            *--p1 = (int)((fj + .03) * 10) + '0';
-            r2++;
-        }
-        while (p1 < &buf[CVTBUFSIZE])
-            *p++ = *p1++;
-    }
-    else if (arg > 0)
-    {
-        while ((fj = arg * 10) < 1)
-        {
-            arg = fj;
-            r2--;
-        }
-    }
-    p1 = &buf[ndigits];
-    if (eflag == 0)
-        p1 += r2;
-    *decpt = r2;
-    if (p1 < &buf[0])
-    {
-        buf[0] = '\0';
-        return buf;
-    }
-    while (p <= p1 && p < &buf[CVTBUFSIZE])
-    {
-        arg *= 10;
-        arg  = modf(arg, &fj);
-        *p++ = (int)fj + '0';
-    }
-    if (p1 >= &buf[CVTBUFSIZE])
-    {
-        buf[CVTBUFSIZE - 1] = '\0';
-        return buf;
-    }
-    p = p1;
-    *p1 += 5;
-    while (*p1 > '9')
-    {
-        *p1 = '0';
-        if (p1 > buf)
-            ++*--p1;
-        else
-        {
-            *p1 = '1';
-            (*decpt)++;
-            if (eflag == 0)
-            {
-                if (p > buf)
-                    *p = '0';
-                p++;
-            }
-        }
-    }
-    *p = '\0';
-    return buf;
-}
-
-char *
-ecvt(double arg, int ndigits, int *decpt, int *sign)
-{
-    return cvt(arg, ndigits, decpt, sign, CVTBUF, 1);
-}
-
-char *
-ecvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf)
-{
-    return cvt(arg, ndigits, decpt, sign, buf, 1);
-}
-
-char *
-fcvt(double arg, int ndigits, int *decpt, int *sign)
-{
-    return cvt(arg, ndigits, decpt, sign, CVTBUF, 0);
-}
-
-char *
-fcvtbuf(double arg, int ndigits, int *decpt, int *sign, char *buf)
-{
-    return cvt(arg, ndigits, decpt, sign, buf, 0);
-}
diff --git a/third_party/crt/repos.bzl b/third_party/crt/repos.bzl
deleted file mode 100644
index a43fbc771e4c6..0000000000000
--- a/third_party/crt/repos.bzl
+++ /dev/null
@@ -1,21 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def crt_repos(local = None):
-    if local:
-        native.local_repository(
-            name = "crt",
-            path = local,
-        )
-    else:
-        maybe(
-            http_archive,
-            name = "crt",
-            url = "https://github.com/lowRISC/crt/archive/refs/tags/v0.4.10.tar.gz",
-            strip_prefix = "crt-0.4.10",
-            sha256 = "655a7cd56d22485a96e9ffca8dd2b4b8b3134099407899300354367ce708ed32",
-        )
diff --git a/third_party/crt/BUILD.bazel b/third_party/foreign_cc/BUILD
similarity index 100%
rename from third_party/crt/BUILD.bazel
rename to third_party/foreign_cc/BUILD
diff --git a/third_party/foreign_cc/patches/BUILD b/third_party/foreign_cc/patches/BUILD
new file mode 100644
index 0000000000000..c85882e64fe2c
--- /dev/null
+++ b/third_party/foreign_cc/patches/BUILD
@@ -0,0 +1,5 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
diff --git a/third_party/foreign_cc/patches/rules_foreign_cc.remove_log_output.patch b/third_party/foreign_cc/patches/rules_foreign_cc.remove_log_output.patch
new file mode 100644
index 0000000000000..f7ef020d62ae6
--- /dev/null
+++ b/third_party/foreign_cc/patches/rules_foreign_cc.remove_log_output.patch
@@ -0,0 +1,13 @@
+diff --git foreign_cc/private/framework.bzl foreign_cc/private/framework.bzl
+index c84c217..f43da2c 100644
+--- foreign_cc/private/framework.bzl
++++ foreign_cc/private/framework.bzl
+@@ -561,7 +561,7 @@ def wrap_outputs(ctx, lib_name, configure_name, script_text, build_script_file =
+     cleanup_on_success_function = create_function(
+         ctx,
+         "cleanup_on_success",
+-        "rm -rf $BUILD_TMPDIR $EXT_BUILD_DEPS",
++        "rm -rf $BUILD_TMPDIR $EXT_BUILD_DEPS && echo > $BUILD_LOG",
+     )
+     cleanup_on_failure_function = create_function(
+         ctx,
diff --git a/third_party/freertos/BUILD b/third_party/freertos/BUILD
index 0d947c69329df..662e4cefee7b0 100644
--- a/third_party/freertos/BUILD
+++ b/third_party/freertos/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/third_party/freertos/BUILD.freertos.bazel b/third_party/freertos/BUILD.freertos.bazel
index 3404163487f10..a91505525bd1d 100644
--- a/third_party/freertos/BUILD.freertos.bazel
+++ b/third_party/freertos/BUILD.freertos.bazel
@@ -7,13 +7,14 @@ package(default_visibility = ["//visibility:public"])
 cc_library(
     name = "portmacro",
     hdrs = ["portable/GCC/RISC-V/portmacro.h"],
+    include_prefix = "external/freertos",
     includes = ["portable/GCC/RISC-V"],
     target_compatible_with = ["@platforms//cpu:riscv32"],
 )
 
 cc_library(
     name = "hdrs",
-    srcs = [
+    hdrs = [
         "include/FreeRTOS.h",
         "include/StackMacros.h",
         "include/atomic.h",
@@ -33,6 +34,7 @@ cc_library(
         "include/task.h",
         "include/timers.h",
     ],
+    include_prefix = "external/freertos",
     includes = ["include"],
     deps = [
         ":portmacro",
diff --git a/third_party/freertos/extensions.bzl b/third_party/freertos/extensions.bzl
new file mode 100644
index 0000000000000..939d5a27eefc7
--- /dev/null
+++ b/third_party/freertos/extensions.bzl
@@ -0,0 +1,26 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+freertos = module_extension(
+    implementation = lambda _: _freertos_repos(),
+)
+
+def _freertos_repos():
+    http_archive(
+        name = "freertos",
+        build_file = Label("//third_party/freertos:BUILD.freertos.bazel"),
+        sha256 = "c4c29136071b84841c3f00675da35f5e61e83c1fa18ac43841c478f99190dd7d",
+        strip_prefix = "FreeRTOS-Kernel-0b1e9d79c82c1bf00e93142f9d5b1b7b62446995",
+        urls = [
+            "https://github.com/FreeRTOS/FreeRTOS-Kernel/archive/0b1e9d79c82c1bf00e93142f9d5b1b7b62446995.tar.gz",
+        ],
+        patches = [
+            Label("//third_party/freertos/patches:0001-Remove-mtime-address-macros.patch"),
+            Label("//third_party/freertos/patches:0002-Remove-references-to-stdlib.h.patch"),
+            Label("//third_party/freertos/patches:0003-Replace-string.h-with-references-to-OT-memory.h.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/freertos/0001-Remove-mtime-address-macros.patch b/third_party/freertos/patches/0001-Remove-mtime-address-macros.patch
similarity index 100%
rename from third_party/freertos/0001-Remove-mtime-address-macros.patch
rename to third_party/freertos/patches/0001-Remove-mtime-address-macros.patch
diff --git a/third_party/freertos/0002-Remove-references-to-stdlib.h.patch b/third_party/freertos/patches/0002-Remove-references-to-stdlib.h.patch
similarity index 100%
rename from third_party/freertos/0002-Remove-references-to-stdlib.h.patch
rename to third_party/freertos/patches/0002-Remove-references-to-stdlib.h.patch
diff --git a/third_party/freertos/0003-Replace-string.h-with-references-to-OT-memory.h.patch b/third_party/freertos/patches/0003-Replace-string.h-with-references-to-OT-memory.h.patch
similarity index 100%
rename from third_party/freertos/0003-Replace-string.h-with-references-to-OT-memory.h.patch
rename to third_party/freertos/patches/0003-Replace-string.h-with-references-to-OT-memory.h.patch
diff --git a/third_party/lint/BUILD b/third_party/freertos/patches/BUILD
similarity index 100%
rename from third_party/lint/BUILD
rename to third_party/freertos/patches/BUILD
diff --git a/third_party/freertos/repos.bzl b/third_party/freertos/repos.bzl
deleted file mode 100644
index 20962660a1c04..0000000000000
--- a/third_party/freertos/repos.bzl
+++ /dev/null
@@ -1,22 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def freertos_repos():
-    http_archive(
-        name = "freertos",
-        build_file = Label("//third_party/freertos:BUILD.freertos.bazel"),
-        sha256 = "c4c29136071b84841c3f00675da35f5e61e83c1fa18ac43841c478f99190dd7d",
-        strip_prefix = "FreeRTOS-Kernel-0b1e9d79c82c1bf00e93142f9d5b1b7b62446995",
-        urls = [
-            "https://github.com/FreeRTOS/FreeRTOS-Kernel/archive/0b1e9d79c82c1bf00e93142f9d5b1b7b62446995.tar.gz",
-        ],
-        patches = [
-            Label("//third_party/freertos:0001-Remove-mtime-address-macros.patch"),
-            Label("//third_party/freertos:0002-Remove-references-to-stdlib.h.patch"),
-            Label("//third_party/freertos:0003-Replace-string.h-with-references-to-OT-memory.h.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/third_party/github/extensions.bzl b/third_party/github/extensions.bzl
new file mode 100644
index 0000000000000..d6e8967455e7e
--- /dev/null
+++ b/third_party/github/extensions.bzl
@@ -0,0 +1,18 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+github_tools = module_extension(
+    implementation = lambda _: _github_tools_repos(),
+)
+
+def _github_tools_repos():
+    http_archive(
+        name = "com_github_gh",
+        url = "https://github.com/cli/cli/releases/download/v2.13.0/gh_2.13.0_linux_amd64.tar.gz",
+        sha256 = "9e833e02428cd49e0af73bc7dc4cafa329fe3ecba1bfe92f0859bf5b11916401",
+        build_file = Label("//third_party/github:BUILD.gh.bazel"),
+        strip_prefix = "gh_2.13.0_linux_amd64",
+    )
diff --git a/third_party/github/repos.bzl b/third_party/github/repos.bzl
deleted file mode 100644
index acddb1498202c..0000000000000
--- a/third_party/github/repos.bzl
+++ /dev/null
@@ -1,14 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def github_tools_repos():
-    http_archive(
-        name = "com_github_gh",
-        url = "https://github.com/cli/cli/releases/download/v2.13.0/gh_2.13.0_linux_amd64.tar.gz",
-        sha256 = "9e833e02428cd49e0af73bc7dc4cafa329fe3ecba1bfe92f0859bf5b11916401",
-        build_file = Label("//third_party/github:BUILD.gh.bazel"),
-        strip_prefix = "gh_2.13.0_linux_amd64",
-    )
diff --git a/third_party/go/deps.bzl b/third_party/go/deps.bzl
deleted file mode 100644
index d877f5201dc4f..0000000000000
--- a/third_party/go/deps.bzl
+++ /dev/null
@@ -1,43 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load(
-    "@io_bazel_rules_go//go:deps.bzl",
-    "go_download_sdk",
-    "go_rules_dependencies",
-)
-load("@bazel_gazelle//:deps.bzl", "gazelle_dependencies")
-
-def go_deps():
-    go_download_sdk(
-        name = "go_sdk",
-        version = "1.19.1",
-        sdks = {
-            # NOTE: In most cases the whole sdks attribute is not needed. We use
-            # it to avoid the dependency on the index file for the
-            # SHA-256 checksums, which is downloaded via a `ctx.download` action
-            # which does not seem to cache files in the repository cache like
-            # the `ctx.download_and_extract` action does. Therefore, we avoid
-            # relying on `rules_go` to download the version and get the expected
-            # filenames and checksums from https://go.dev/dl/ manually.
-            "linux_amd64": (
-                "go1.19.1.linux-amd64.tar.gz",
-                "acc512fbab4f716a8f97a8b3fbaa9ddd39606a28be6c2515ef7c6c6311acffde",
-            ),
-            "linux_arm64": (
-                "go1.19.1.linux-arm64.tar.gz",
-                "49960821948b9c6b14041430890eccee58c76b52e2dbaafce971c3c38d43df9f",
-            ),
-            "darwin_amd64": (
-                "go1.19.1.darwin-amd64.tar.gz",
-                "b2828a2b05f0d2169afc74c11ed010775bf7cf0061822b275697b2f470495fb7",
-            ),
-            "darwin_arm64": (
-                "go1.19.1.darwin-arm64.tar.gz",
-                "e46aecce83a9289be16ce4ba9b8478a5b89b8aa0230171d5c6adbc0c66640548",
-            ),
-        },
-    )
-    go_rules_dependencies()
-    gazelle_dependencies()
diff --git a/third_party/go/repos.bzl b/third_party/go/repos.bzl
deleted file mode 100644
index b61fb36bf2bc8..0000000000000
--- a/third_party/go/repos.bzl
+++ /dev/null
@@ -1,17 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def go_repos():
-    http_archive(
-        name = "io_bazel_rules_go",
-        sha256 = "d6b2513456fe2229811da7eb67a444be7785f5323c6708b38d851d2b51e54d83",
-        urls = ["https://github.com/bazelbuild/rules_go/releases/download/v0.30.0/rules_go-v0.30.0.zip"],
-    )
-    http_archive(
-        name = "bazel_gazelle",
-        sha256 = "501deb3d5695ab658e82f6f6f549ba681ea3ca2a5fb7911154b5aa45596183fa",
-        urls = ["https://github.com/bazelbuild/bazel-gazelle/releases/download/v0.26.0/bazel-gazelle-v0.26.0.tar.gz"],
-    )
diff --git a/third_party/google/deps.bzl b/third_party/google/deps.bzl
deleted file mode 100644
index 6e0ea0c451465..0000000000000
--- a/third_party/google/deps.bzl
+++ /dev/null
@@ -1,18 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@rules_pkg//:deps.bzl", "rules_pkg_dependencies")
-load("@rules_foreign_cc//foreign_cc:repositories.bzl", "rules_foreign_cc_dependencies")
-load("@rules_fuzzing//fuzzing:repositories.bzl", "rules_fuzzing_dependencies")
-load("@rules_fuzzing//fuzzing:init.bzl", "rules_fuzzing_init")
-
-def google_deps():
-    rules_pkg_dependencies()
-
-    # Finish setting up rules_foreign_cc, per instructions:
-    # https://bazelbuild.github.io/rules_foreign_cc/0.9.0/index.html
-    rules_foreign_cc_dependencies()
-
-    rules_fuzzing_dependencies()
-    rules_fuzzing_init()
diff --git a/third_party/google/repos.bzl b/third_party/google/repos.bzl
deleted file mode 100644
index e6a50f539a5ff..0000000000000
--- a/third_party/google/repos.bzl
+++ /dev/null
@@ -1,58 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:repo.bzl", "http_archive_or_local")
-
-def google_repos(
-        rules_cc = None,
-        rules_pkg = None,
-        absl = None,
-        googletest = None):
-    http_archive_or_local(
-        name = "rules_cc",
-        local = rules_cc,
-        sha256 = "123ababe4be661f2fc9189d3b24deabc003926e87d991832cd46b6ae59f7b3c8",
-        strip_prefix = "rules_cc-a636005ba28c0344da5110bd8532184c74b6ffdf",
-        url = "https://github.com/bazelbuild/rules_cc/archive/a636005ba28c0344da5110bd8532184c74b6ffdf.tar.gz",
-    )
-
-    http_archive_or_local(
-        name = "rules_pkg",
-        local = rules_pkg,
-        urls = [
-            "https://mirror.bazel.build/github.com/bazelbuild/rules_pkg/releases/download/0.7.0/rules_pkg-0.7.0.tar.gz",
-            "https://github.com/bazelbuild/rules_pkg/releases/download/0.7.0/rules_pkg-0.7.0.tar.gz",
-        ],
-        sha256 = "8a298e832762eda1830597d64fe7db58178aa84cd5926d76d5b744d6558941c2",
-    )
-
-    http_archive_or_local(
-        name = "com_google_absl",
-        local = absl,
-        sha256 = "59d2976af9d6ecf001a81a35749a6e551a335b949d34918cfade07737b9d93c5",
-        strip_prefix = "abseil-cpp-20230802.0",
-        url = "https://github.com/abseil/abseil-cpp/archive/refs/tags/20230802.0.tar.gz",
-    )
-
-    http_archive_or_local(
-        name = "googletest",
-        local = googletest,
-        sha256 = "353571c2440176ded91c2de6d6cd88ddd41401d14692ec1f99e35d013feda55a",
-        strip_prefix = "googletest-release-1.11.0",
-        url = "https://github.com/google/googletest/archive/refs/tags/release-1.11.0.zip",
-    )
-
-    http_archive_or_local(
-        name = "rules_foreign_cc",
-        strip_prefix = "rules_foreign_cc-0.9.0",
-        sha256 = "2a4d07cd64b0719b39a7c12218a3e507672b82a97b98c6a89d38565894cf7c51",
-        url = "https://github.com/bazelbuild/rules_foreign_cc/archive/refs/tags/0.9.0.tar.gz",
-    )
-
-    http_archive_or_local(
-        name = "rules_fuzzing",
-        sha256 = "f85dc70bb9672af0e350686461fe6fdd0d61e10e75645f9e44fedf549b21e369",
-        strip_prefix = "rules_fuzzing-0.3.2",
-        urls = ["https://github.com/bazelbuild/rules_fuzzing/archive/v0.3.2.tar.gz"],
-    )
diff --git a/third_party/hsm/BUILD.opensc.bazel b/third_party/hsm/BUILD.opensc.bazel
new file mode 100644
index 0000000000000..7a00b5ea34b4d
--- /dev/null
+++ b/third_party/hsm/BUILD.opensc.bazel
@@ -0,0 +1,46 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_foreign_cc//foreign_cc:configure.bzl", "configure_make")
+
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "all_srcs",
+    srcs = glob(["**"]),
+)
+
+configure_make(
+    name = "opensc",
+    args = ["-j"],
+    autoreconf = True,
+    autoreconf_options = ["-fi"],
+    configure_in_place = True,
+    configure_options = [
+        # Lie about the completions dir so that "make install" won't get
+        # confused about what is already installed on the host.
+        # This doesn't affect the build, as the installation happens in
+        # a bazel-supplied target directory, but it does prevent make from
+        # seeing the system's `/usr/share/bash-completion/completions`
+        # directory and complaining that it will be unable to install there.
+        "--with-completiondir=xxx-completions",
+    ],
+    lib_source = ":all_srcs",
+    out_shared_libs = [
+        # It would be nice to configure this package to build `opensc-pkcs11.so`
+        # as a shared object that statically links `libopensc`, but I don't see
+        # a way to do that via the configure script.  Users of this library
+        # will have to set LD_LIBRARY_PATH appropriately to see the needed
+        # shared libraries (e.g. `//signing/tokens:nitrokey`).
+        "libopensc.so",
+        "libopensc.so.12",
+        "opensc-pkcs11.so",
+    ],
+)
+
+filegroup(
+    name = "gen_dir",
+    srcs = [":opensc"],
+    output_group = "gen_dir",
+)
diff --git a/third_party/hsm/extensions.bzl b/third_party/hsm/extensions.bzl
new file mode 100644
index 0000000000000..1c97fba9c2340
--- /dev/null
+++ b/third_party/hsm/extensions.bzl
@@ -0,0 +1,43 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+hsm = module_extension(
+    implementation = lambda _: _hsm_repos(),
+)
+
+def _hsm_repos():
+    http_archive(
+        name = "softhsm2",
+        build_file = Label("//third_party/hsm:BUILD.softhsm2.bazel"),
+        url = "https://github.com/opendnssec/SoftHSMv2/archive/4975c0df4c7090e97a3860ae21079a9597cfedc6.tar.gz",
+        strip_prefix = "SoftHSMv2-4975c0df4c7090e97a3860ae21079a9597cfedc6",
+        sha256 = "72cf979ec4f74ca4555861dcae45cf7d1b667cc2e4f3ee3fb26e6ff1b99aec95",
+        patches = [
+            Label("//third_party/hsm/patches:0001-Disable-filename-logging.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
+    http_archive(
+        name = "sc_hsm",
+        build_file = Label("//third_party/hsm:BUILD.sc_hsm.bazel"),
+        url = "https://github.com/CardContact/sc-hsm-embedded/archive/refs/tags/V2.12.tar.gz",
+        strip_prefix = "sc-hsm-embedded-2.12",
+        sha256 = "707fca9df630708e0e59a7d4a8a7a016c56c83a585957f0fd9f806c0762f1944",
+    )
+    http_archive(
+        name = "opensc",
+        build_file = Label("//third_party/hsm:BUILD.opensc.bazel"),
+        url = "https://github.com/OpenSC/OpenSC/archive/refs/tags/0.26.0.tar.gz",
+        strip_prefix = "OpenSC-0.26.0",
+        sha256 = "c692ac7639fa398f7f07b1070ea5358344000d49d08dcb825296d4cec94c6b1f",
+    )
+    http_archive(
+        name = "cloud_kms_hsm",
+        build_file = Label("//third_party/hsm:BUILD.cloud_kms_hsm.bazel"),
+        url = "https://github.com/GoogleCloudPlatform/kms-integrations/releases/download/pkcs11-v1.8/libkmsp11-1.8-linux-amd64.tar.gz",
+        strip_prefix = "libkmsp11-1.8-linux-amd64",
+        sha256 = "3b932f22a8abb631442c3276e9c309554c81855526b74fbc9edaddcb57a557f7",
+    )
diff --git a/third_party/hsm/0001-Disable-filename-logging.patch b/third_party/hsm/patches/0001-Disable-filename-logging.patch
similarity index 100%
rename from third_party/hsm/0001-Disable-filename-logging.patch
rename to third_party/hsm/patches/0001-Disable-filename-logging.patch
diff --git a/third_party/protobuf/BUILD b/third_party/hsm/patches/BUILD
similarity index 100%
rename from third_party/protobuf/BUILD
rename to third_party/hsm/patches/BUILD
diff --git a/third_party/hsm/repos.bzl b/third_party/hsm/repos.bzl
deleted file mode 100644
index d011ad78a35f2..0000000000000
--- a/third_party/hsm/repos.bzl
+++ /dev/null
@@ -1,32 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def hsm_repos():
-    http_archive(
-        name = "softhsm2",
-        build_file = Label("//third_party/hsm:BUILD.softhsm2.bazel"),
-        url = "https://github.com/opendnssec/SoftHSMv2/archive/4975c0df4c7090e97a3860ae21079a9597cfedc6.tar.gz",
-        strip_prefix = "SoftHSMv2-4975c0df4c7090e97a3860ae21079a9597cfedc6",
-        sha256 = "72cf979ec4f74ca4555861dcae45cf7d1b667cc2e4f3ee3fb26e6ff1b99aec95",
-        patches = [
-            Label("//third_party/hsm:0001-Disable-filename-logging.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
-    http_archive(
-        name = "sc_hsm",
-        build_file = Label("//third_party/hsm:BUILD.sc_hsm.bazel"),
-        url = "https://github.com/CardContact/sc-hsm-embedded/archive/refs/tags/V2.12.tar.gz",
-        strip_prefix = "sc-hsm-embedded-2.12",
-        sha256 = "707fca9df630708e0e59a7d4a8a7a016c56c83a585957f0fd9f806c0762f1944",
-    )
-    http_archive(
-        name = "cloud_kms_hsm",
-        build_file = Label("//third_party/hsm:BUILD.cloud_kms_hsm.bazel"),
-        url = "https://github.com/GoogleCloudPlatform/kms-integrations/releases/download/pkcs11-v1.2/libkmsp11-1.2-linux-amd64.tar.gz",
-        strip_prefix = "libkmsp11-1.2-linux-amd64",
-        sha256 = "81fff58d5835f05d550ff86c88fa6fb92a733bde8b232e1482d85a3cf07c6396",
-    )
diff --git a/third_party/hwtrust/BUILD b/third_party/hwtrust/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/hwtrust/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/hwtrust/BUILD.hwtrust.bazel b/third_party/hwtrust/BUILD.hwtrust.bazel
new file mode 100644
index 0000000000000..ed3a5642b5f7b
--- /dev/null
+++ b/third_party/hwtrust/BUILD.hwtrust.bazel
@@ -0,0 +1,31 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "hwtrust",
+    srcs = glob(["src/**/*.rs"]),
+    # compile hwtrust with Rust 2021, as it doesn't adhere to 2024 match ergonomics
+    edition = "2021",
+    tags = [
+        "noclippy",
+        "norustfmt",
+    ],
+    deps = [
+        "@crate_index//:anyhow",
+        "@crate_index//:base64",
+        "@crate_index//:chrono",
+        "@crate_index//:ciborium",
+        "@crate_index//:clap",
+        "@crate_index//:coset",
+        "@crate_index//:hex",
+        "@crate_index//:itertools",
+        "@crate_index//:openssl",
+        "@crate_index//:serde_json",
+        "@crate_index//:thiserror",
+    ],
+)
diff --git a/third_party/hwtrust/extensions.bzl b/third_party/hwtrust/extensions.bzl
new file mode 100644
index 0000000000000..66956dde0011d
--- /dev/null
+++ b/third_party/hwtrust/extensions.bzl
@@ -0,0 +1,17 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+hwtrust = module_extension(
+    implementation = lambda _: _hwtrust_repos(),
+)
+
+def _hwtrust_repos():
+    http_archive(
+        name = "hwtrust",
+        urls = ["https://android.googlesource.com/platform/tools/security/+archive/da7738aaf3ece666272adab6b3091f72ce027e9c.tar.gz"],
+        strip_prefix = "remote_provisioning/hwtrust",
+        build_file = Label("//third_party/hwtrust:BUILD.hwtrust.bazel"),
+    )
diff --git a/third_party/hyperdebug/extensions.bzl b/third_party/hyperdebug/extensions.bzl
new file mode 100644
index 0000000000000..e93190ccc7922
--- /dev/null
+++ b/third_party/hyperdebug/extensions.bzl
@@ -0,0 +1,17 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+hyperdebug = module_extension(
+    implementation = lambda _: _hyperdebug_repos(),
+)
+
+def _hyperdebug_repos():
+    http_archive(
+        name = "hyperdebug_firmware",
+        urls = ["https://github.com/lowRISC/hyperdebug-firmware/releases/download/20250131_01/hyperdebug-firmware.tar.gz"],
+        sha256 = "8595340b347531438ce07f7d678ec24038b4fa2edd7f4a620bd8c5130d72c2ce",
+        build_file = "@lowrisc_opentitan//third_party/hyperdebug:BUILD",
+    )
diff --git a/third_party/hyperdebug/repos.bzl b/third_party/hyperdebug/repos.bzl
deleted file mode 100644
index a70b4faba8ce1..0000000000000
--- a/third_party/hyperdebug/repos.bzl
+++ /dev/null
@@ -1,13 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def hyperdebug_repos():
-    http_archive(
-        name = "hyperdebug_firmware",
-        urls = ["https://github.com/lowRISC/hyperdebug-firmware/releases/download/20240621_01/hyperdebug-firmware.tar.gz"],
-        sha256 = "649a8cd6d183bc3fb286ea5895c752cfec3aa29b9990f44bb9e7621c0414c7de",
-        build_file = "@//third_party/hyperdebug:BUILD",
-    )
diff --git a/third_party/lint/0001-enable-buildifier-test-without-sandbox.patch b/third_party/lint/0001-enable-buildifier-test-without-sandbox.patch
deleted file mode 100644
index bb2b5059371a3..0000000000000
--- a/third_party/lint/0001-enable-buildifier-test-without-sandbox.patch
+++ /dev/null
@@ -1,137 +0,0 @@
-diff --git a/buildifier/buildifier.bzl b/buildifier/buildifier.bzl
-index 42445e7..0957f94 100644
---- a/buildifier/buildifier.bzl
-+++ b/buildifier/buildifier.bzl
-@@ -34,8 +34,25 @@ def buildifier(**kwargs):
- def _buildifier_test_impl(ctx):
-     return [buildifier_impl_factory(ctx, test_rule = True)]
- 
--buildifier_test = rule(
-+_buildifier_test = rule(
-     implementation = _buildifier_test_impl,
-     attrs = buildifier_attr_factory(True),
-     test = True,
- )
-+
-+def buildifier_test(**kwargs):
-+    """
-+    Wrapper for the _buildifier_test rule. Optionally disables sandboxing and caching.
-+
-+    Args:
-+      **kwargs: all parameters for _buildifier_test
-+    """
-+    if kwargs.get("no_sandbox", False):
-+        tags = kwargs.get("tags", [])
-+
-+        # Note: the "external" tag is a workaround for bazelbuild#15516.
-+        for t in ["no-sandbox", "no-cache", "external"]:
-+            if t not in tags:
-+                tags.append(t)
-+        kwargs["tags"] = tags
-+    _buildifier_test(**kwargs)
-diff --git a/buildifier/internal/factory.bzl b/buildifier/internal/factory.bzl
-index 779c789..34a4997 100644
---- a/buildifier/internal/factory.bzl
-+++ b/buildifier/internal/factory.bzl
-@@ -46,6 +46,10 @@ def buildifier_attr_factory(test_rule = False):
-         "verbose": attr.bool(
-             doc = "Print verbose information on standard error",
-         ),
-+        "exclude_patterns": attr.string_list(
-+            allow_empty = True,
-+            doc = "A list of glob patterns passed to the find command. E.g. './vendor/*' to exclude the Go vendor directory. In test rules, this attribute requires the use of the no_sandbox attribute.",
-+        ),
-         "mode": attr.string(
-             default = "fix" if not test_rule else "diff",
-             doc = "Formatting mode",
-@@ -80,7 +84,6 @@ def buildifier_attr_factory(test_rule = False):
-     if test_rule:
-         attrs.update({
-             "srcs": attr.label_list(
--                allow_empty = False,
-                 allow_files = [
-                     ".bazel",
-                     ".bzl",
-@@ -91,12 +94,13 @@ def buildifier_attr_factory(test_rule = False):
-                 ],
-                 doc = "A list of labels representing the starlark files to include in the test",
-             ),
--        })
--    else:
--        attrs.update({
--            "exclude_patterns": attr.string_list(
--                allow_empty = True,
--                doc = "A list of glob patterns passed to the find command. E.g. './vendor/*' to exclude the Go vendor directory",
-+            "no_sandbox": attr.bool(
-+                default = False,
-+                doc = "Set to True to enable running buildifier on all files on the workspace",
-+            ),
-+            "workspace": attr.label(
-+                allow_single_file = True,
-+                doc = "Label of the WORKSPACE file; required when the no-sandbox attribute is True",
-             ),
-         })
- 
-@@ -147,15 +151,24 @@ def buildifier_impl_factory(ctx, test_rule = False):
-         args.append("-add_tables=%s" % ctx.file.add_tables.path)
- 
-     exclude_patterns_str = ""
--    if not test_rule and ctx.attr.exclude_patterns:
-+    if ctx.attr.exclude_patterns:
-+        if test_rule and not ctx.attr.no_sandbox:
-+            fail("Cannot use 'exclude_patterns' in a test rule without 'no_sandbox'")
-         exclude_patterns = ["\\! -path %s" % shell.quote(pattern) for pattern in ctx.attr.exclude_patterns]
-         exclude_patterns_str = " ".join(exclude_patterns)
- 
-+    workspace = ""
-+    if test_rule and ctx.attr.no_sandbox:
-+        if not ctx.file.workspace:
-+            fail("Cannot use 'no_sandbox' without a 'workspace'")
-+        workspace = ctx.file.workspace.path
-+
-     out_file = ctx.actions.declare_file(ctx.label.name + ".bash")
-     substitutions = {
-         "@@ARGS@@": shell.array_literal(args),
-         "@@BUILDIFIER_SHORT_PATH@@": shell.quote(ctx.executable.buildifier.short_path),
-         "@@EXCLUDE_PATTERNS@@": exclude_patterns_str,
-+        "@@WORKSPACE@@": workspace,
-     }
-     ctx.actions.expand_template(
-         template = ctx.file._runner,
-@@ -167,6 +180,8 @@ def buildifier_impl_factory(ctx, test_rule = False):
-     runfiles = [ctx.executable.buildifier]
-     if test_rule:
-         runfiles.extend(ctx.files.srcs)
-+        if ctx.attr.no_sandbox:
-+            runfiles.append(ctx.file.workspace)
- 
-     return DefaultInfo(
-         files = depset([out_file]),
-diff --git a/buildifier/runner.bash.template b/buildifier/runner.bash.template
-index 17e6a4b..fbe3e75 100644
---- a/buildifier/runner.bash.template
-+++ b/buildifier/runner.bash.template
-@@ -2,6 +2,7 @@
- 
- BUILDIFIER_SHORT_PATH=@@BUILDIFIER_SHORT_PATH@@
- ARGS=@@ARGS@@
-+WORKSPACE="@@WORKSPACE@@"
- 
- # Get the absolute path to the buildifier executable
- buildifier_short_path=$(readlink "$BUILDIFIER_SHORT_PATH")
-@@ -9,6 +10,15 @@ buildifier_short_path=$(readlink "$BUILDIFIER_SHORT_PATH")
- # Use TEST_WORKSPACE to determine if the script is being ran under a test
- if [[ ! -z "${TEST_WORKSPACE+x}" && -z "${BUILD_WORKSPACE_DIRECTORY+x}" ]]; then
-   FIND_FILE_TYPE="l"
-+  # If WORKSPACE was provided, then the script is being run under a test in no_sandbox mode
-+  # cd to the directory contatining the WORKSPACE file
-+  if [[ ! -z "${WORKSPACE+x}" ]]; then
-+    FIND_FILE_TYPE="f"
-+    WORKSPACE_PATH="$(dirname "$(realpath ${WORKSPACE})")"
-+    if ! cd "$WORKSPACE_PATH" ; then
-+      echo "Unable to change to workspace (WORKSPACE_PATH: ${WORKSPACE_PATH})"
-+    fi
-+  fi
- else
-   # Change into the workspace directory if this is _not_ a test
-   if ! cd "$BUILD_WORKSPACE_DIRECTORY"; then
diff --git a/third_party/lint/deps.bzl b/third_party/lint/deps.bzl
deleted file mode 100644
index fdfd645c8ed79..0000000000000
--- a/third_party/lint/deps.bzl
+++ /dev/null
@@ -1,10 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@lowrisc_lint//rules:deps.bzl", "lowrisc_misc_linters_dependencies")
-load("@lowrisc_lint//rules:pip.bzl", "lowrisc_misc_linters_pip_dependencies")
-
-def lint_deps():
-    lowrisc_misc_linters_dependencies()
-    lowrisc_misc_linters_pip_dependencies()
diff --git a/third_party/lint/repos.bzl b/third_party/lint/repos.bzl
deleted file mode 100644
index 84217f2611ae7..0000000000000
--- a/third_party/lint/repos.bzl
+++ /dev/null
@@ -1,35 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-load("//rules:repo.bzl", "http_archive_or_local")
-
-def lint_repos(lowrisc_lint = None):
-    # We have a 'vendored' copy of the google_verible_verilog_syntax_py repo
-    native.local_repository(
-        name = "google_verible_verilog_syntax_py",
-        path = "hw/ip/prim/util/vendor/google_verible_verilog_syntax_py",
-    )
-
-    # FIXME: The buildtools aren't hacked; the hack is the local name of the repository.
-    # We've renamed the repo locally so as to not conflict with the version of buildtools
-    # that golang depends on.
-    http_archive(
-        name = "ot_hack_bazelbuild_buildtools",
-        sha256 = "e3bb0dc8b0274ea1aca75f1f8c0c835adbe589708ea89bf698069d0790701ea3",
-        strip_prefix = "buildtools-5.1.0",
-        url = "https://github.com/bazelbuild/buildtools/archive/refs/tags/5.1.0.tar.gz",
-        patches = [
-            Label("//third_party/lint:0001-enable-buildifier-test-without-sandbox.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
-
-    http_archive_or_local(
-        name = "lowrisc_lint",
-        local = lowrisc_lint,
-        sha256 = "ff4e14b2a8ace83a7f6a1536c7489c29f8c2b97d345ae9bb8b2d0f68059ec265",
-        strip_prefix = "misc-linters-20240423_01",
-        url = "https://github.com/lowRISC/misc-linters/archive/refs/tags/20240423_01.tar.gz",
-    )
diff --git a/third_party/llvm_compiler_rt/BUILD b/third_party/llvm_compiler_rt/BUILD
index d1108b6abd828..9d2983251b8fc 100644
--- a/third_party/llvm_compiler_rt/BUILD
+++ b/third_party/llvm_compiler_rt/BUILD
@@ -2,7 +2,7 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("//rules:opentitan.bzl", "OPENTITAN_CPU")
+load("//rules/opentitan:defs.bzl", "OPENTITAN_CPU")
 
 package(default_visibility = ["//visibility:public"])
 
diff --git a/third_party/llvm_compiler_rt/BUILD.llvm_compiler_rt.bazel b/third_party/llvm_compiler_rt/BUILD.llvm_compiler_rt.bazel
index 3513fb28649ef..7846059dcca06 100644
--- a/third_party/llvm_compiler_rt/BUILD.llvm_compiler_rt.bazel
+++ b/third_party/llvm_compiler_rt/BUILD.llvm_compiler_rt.bazel
@@ -26,7 +26,10 @@ cc_library(
     name = "hdrs",
     srcs = [
         "include/profile/InstrProfData.inc",
+    ],
+    hdrs = [
         "lib/profile/InstrProfiling.h",
     ],
+    include_prefix = "external/llvm_compiler_rt",
     includes = ["include"],
 )
diff --git a/third_party/llvm_compiler_rt/extensions.bzl b/third_party/llvm_compiler_rt/extensions.bzl
new file mode 100644
index 0000000000000..bf8c2efa56df6
--- /dev/null
+++ b/third_party/llvm_compiler_rt/extensions.bzl
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+llvm_compiler_rt = module_extension(
+    implementation = lambda _: _llvm_compiler_rt_repos(),
+)
+
+def _llvm_compiler_rt_repos():
+    http_archive(
+        name = "llvm_compiler_rt",
+        build_file = Label("//third_party/llvm_compiler_rt:BUILD.llvm_compiler_rt.bazel"),
+        sha256 = "46abe68f006646c15f6d551a2be0ac27e681c5fcc646d712389a5e50ddf69c60",
+        strip_prefix = "compiler-rt-16.0.2.src",
+        urls = [
+            "https://github.com/llvm/llvm-project/releases/download/llvmorg-16.0.2/compiler-rt-16.0.2.src.tar.xz",
+        ],
+        patches = [
+            Label("//third_party/llvm_compiler_rt/patches:0001-Headers.patch"),
+            Label("//third_party/llvm_compiler_rt/patches:0002-invalid-data.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/llvm_compiler_rt/0001-Headers.patch b/third_party/llvm_compiler_rt/patches/0001-Headers.patch
similarity index 100%
rename from third_party/llvm_compiler_rt/0001-Headers.patch
rename to third_party/llvm_compiler_rt/patches/0001-Headers.patch
diff --git a/third_party/llvm_compiler_rt/0002-invalid-data.patch b/third_party/llvm_compiler_rt/patches/0002-invalid-data.patch
similarity index 100%
rename from third_party/llvm_compiler_rt/0002-invalid-data.patch
rename to third_party/llvm_compiler_rt/patches/0002-invalid-data.patch
diff --git a/third_party/llvm_compiler_rt/patches/BUILD b/third_party/llvm_compiler_rt/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/llvm_compiler_rt/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/llvm_compiler_rt/repos.bzl b/third_party/llvm_compiler_rt/repos.bzl
deleted file mode 100644
index 6bcdae7714cb1..0000000000000
--- a/third_party/llvm_compiler_rt/repos.bzl
+++ /dev/null
@@ -1,21 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def llvm_compiler_rt_repos():
-    http_archive(
-        name = "llvm_compiler_rt",
-        build_file = Label("//third_party/llvm_compiler_rt:BUILD.llvm_compiler_rt.bazel"),
-        sha256 = "46abe68f006646c15f6d551a2be0ac27e681c5fcc646d712389a5e50ddf69c60",
-        strip_prefix = "compiler-rt-16.0.2.src",
-        urls = [
-            "https://github.com/llvm/llvm-project/releases/download/llvmorg-16.0.2/compiler-rt-16.0.2.src.tar.xz",
-        ],
-        patches = [
-            Label("//third_party/llvm_compiler_rt:0001-Headers.patch"),
-            Label("//third_party/llvm_compiler_rt:0002-invalid-data.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/third_party/lowrisc/BUILD b/third_party/lowrisc/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/lowrisc/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/lowrisc/BUILD.lowrisc_rv32imcb_toolchain.bazel b/third_party/lowrisc/BUILD.lowrisc_rv32imcb_toolchain.bazel
new file mode 100644
index 0000000000000..2b2784541a8bf
--- /dev/null
+++ b/third_party/lowrisc/BUILD.lowrisc_rv32imcb_toolchain.bazel
@@ -0,0 +1,79 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_skylib//rules/directory:directory.bzl", "directory")
+load("@bazel_skylib//rules/directory:subdirectory.bzl", "subdirectory")
+load("@rules_cc//cc/toolchains:tool.bzl", "cc_tool")
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+# Define certain binaries as `cc_tool`s so they can be used in a toolchain.
+# Each tool has access to all the other libraries and binaries in this repository
+# because some tools execute one another and access various libraries.
+[
+    cc_tool(
+        name = tool,
+        src = ":bin/riscv32-unknown-elf-{}".format(tool),
+        data = [":root"],
+    )
+    for tool in [
+        "clang",
+        "clang++",
+        "ar",
+        "objcopy",
+        "objdump",
+        "strip",
+    ]
+]
+
+[
+    cc_tool(
+        name = "llvm_{}".format(tool),
+        src = ":bin/llvm-{}".format(tool),
+        data = [":root"],
+    )
+    for tool in [
+        "profdata",
+        "cov",
+    ]
+]
+
+directory(
+    name = "root",
+    srcs = glob(["**/*"]),
+)
+
+# System library include directories (for `-isystem`):
+
+subdirectory(
+    name = "lib-clang-include",
+    parent = ":root",
+    path = "lib/clang/16/include",
+)
+
+subdirectory(
+    name = "riscv32-unknown-elf-include",
+    parent = ":root",
+    path = "riscv32-unknown-elf/include",
+)
+
+subdirectory(
+    name = "cxx-include",
+    parent = ":root",
+    path = "riscv32-unknown-elf/include/c++/10.2.0",
+)
+
+subdirectory(
+    name = "cxx-backward",
+    parent = ":root",
+    path = "riscv32-unknown-elf/include/c++/10.2.0/backward",
+)
+
+subdirectory(
+    name = "cxx-riscv32-unknown-elf",
+    parent = ":root",
+    path = "riscv32-unknown-elf/include/c++/10.2.0/riscv32-unknown-elf",
+)
diff --git a/third_party/lowrisc/extensions.bzl b/third_party/lowrisc/extensions.bzl
new file mode 100644
index 0000000000000..da583f1fd6b67
--- /dev/null
+++ b/third_party/lowrisc/extensions.bzl
@@ -0,0 +1,19 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+def _lowrisc_repos():
+    VERSION = "20250710-1"
+    http_archive(
+        name = "lowrisc_rv32imcb_toolchain",
+        url = "https://github.com/lowRISC/lowrisc-toolchains/releases/download/{v}/lowrisc-toolchain-rv32imcb-x86_64-{v}.tar.xz".format(v = VERSION),
+        sha256 = "6f02aae27c097c71a2875a215896a0301e32ab56d6d26e917dae59d124c573fb",
+        strip_prefix = "lowrisc-toolchain-rv32imcb-x86_64-{}".format(VERSION),
+        build_file = ":BUILD.lowrisc_rv32imcb_toolchain.bazel",
+    )
+
+lowrisc_rv32imcb_toolchain = module_extension(
+    implementation = lambda _: _lowrisc_repos(),
+)
diff --git a/third_party/lychee/extensions.bzl b/third_party/lychee/extensions.bzl
new file mode 100644
index 0000000000000..879f25e7b96df
--- /dev/null
+++ b/third_party/lychee/extensions.bzl
@@ -0,0 +1,28 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+lychee = module_extension(
+    implementation = lambda _: _lychee_repos(),
+)
+
+def _lychee_repos():
+    LYCHEE_VERSION = "v0.14.3"
+
+    url = "/".join([
+        "https://github.com/lycheeverse/lychee/releases/download",
+        LYCHEE_VERSION,
+        "lychee-{}-x86_64-unknown-linux-gnu.tar.gz".format(LYCHEE_VERSION),
+    ])
+
+    http_archive(
+        name = "lychee",
+        url = url,
+        build_file_content = """
+package(default_visibility = ["//visibility:public"])
+exports_files(glob(["**"]))
+""",
+        sha256 = "2a47a11d7fd3498ea3e0f8f58909e1673d652f917205d41dcf852fed1ad56ff7",
+    )
diff --git a/third_party/lychee/repos.bzl b/third_party/lychee/repos.bzl
deleted file mode 100644
index 6881dd715ccd3..0000000000000
--- a/third_party/lychee/repos.bzl
+++ /dev/null
@@ -1,25 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:repo.bzl", "http_archive_or_local")
-
-def lychee_repos(local = None):
-    LYCHEE_VERSION = "v0.14.3"
-
-    url = "/".join([
-        "https://github.com/lycheeverse/lychee/releases/download",
-        LYCHEE_VERSION,
-        "lychee-{}-x86_64-unknown-linux-gnu.tar.gz".format(LYCHEE_VERSION),
-    ])
-
-    http_archive_or_local(
-        name = "lychee",
-        url = url,
-        local = local,
-        build_file_content = """
-package(default_visibility = ["//visibility:public"])
-exports_files(glob(["**"]))
-""",
-        sha256 = "2a47a11d7fd3498ea3e0f8f58909e1673d652f917205d41dcf852fed1ad56ff7",
-    )
diff --git a/third_party/nist_cavp_testvectors/extensions.bzl b/third_party/nist_cavp_testvectors/extensions.bzl
new file mode 100644
index 0000000000000..4d8b9275ba653
--- /dev/null
+++ b/third_party/nist_cavp_testvectors/extensions.bzl
@@ -0,0 +1,122 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+nist_cavp = module_extension(
+    implementation = lambda _: _nist_cavp_repos(),
+)
+
+def _nist_cavp_repos():
+    """Load NIST CAVP test vectors
+
+    The NIST website that serves the test vectors (csrc.nist.gov) is sometimes
+    unreliable. To improve availability, the NIST test vectors are hosted in a
+    lowRISC GCS storage bucket (ot-crypto-test-vectors). To add new test
+    vectors, upload the zip file to the GCS bucket, update the manifest there
+    to indicate the original download URL, and use the public link to fetch the
+    archive instead of the NIST website.
+    """
+    http_archive(
+        name = "nist_cavp_drbg_sp_800_90a_root",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "5f7e5658ebd5b4e6785a7b12fa32333511d2acc2f2d9c5ae1ffa16b699377769",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/drbg/drbgtestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/drbgtestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_ecdsa_fips_186_4",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        strip_prefix = "186-4ecdsatestvectors",
+        sha256 = "fe47cc92b4cee418236125c9ffbcd9bb01c8c34e74a4ba195d954bcb72824752",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/dss/186-4ecdsatestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/186-4ecdsatestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_sha2_fips_180_4",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        strip_prefix = "shabytetestvectors",
+        sha256 = "929ef80b7b3418aca026643f6f248815913b60e01741a44bba9e118067f4c9b8",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/shs/shabytetestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/shabytetestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_sha3_fips_202",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "cd07701af2e47f5cc889d642528b4bf11f8b6eb55797c7307a96828ed8d8fc8c",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/sha3/sha-3bytetestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/sha-3bytetestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_shake_fips_202",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "debfebc3157b3ceea002b84ca38476420389a3bf7e97dc5f53ea4689a16de4c7",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/sha3/shakebytetestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/shakebytetestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_aes_kat",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "a203b16c9246b2ebae31dee5de21a606be80cf78ceabaca37150236fa098eb60",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/aes/KAT_AES.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/KAT_AES.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_aes_kw_sp_800_38f",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        strip_prefix = "kwtestvectors",
+        sha256 = "04a4a82e4de65bca505125295003f9c75a5a815afda046dc83661b8b580dfdf3",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/kwtestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/kwtestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_aes_gcm",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "f9fc479e134cde2980b3bb7cddbcb567b2cd96fd753835243ed067699f26a023",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/gcmtestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/gcmtestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_ecdh_sp_800_56a",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "5fff092551f2d72e89a3d9362711878708f9a14b502f0dfae819649105b0ea39",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/components/ecccdhtestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/ecccdhtestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_rsa_fips_186_3",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "8405aeb3572a4f98ed4b1a3ccb3f2f49e725462dd28ec4759d6a15d88855d19c",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/dss/186-3rsatestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/186-3rsatestvectors.zip",
+        ],
+    )
+    http_archive(
+        name = "nist_cavp_hmac_fips_198_1",
+        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
+        sha256 = "418c3837d38f249d6668146bd0090db24dd3c02d2e6797e3de33860a387ae4bd",
+        urls = [
+            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/hmactestvectors.zip",
+            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/hmactestvectors.zip",
+        ],
+    )
diff --git a/third_party/nist_cavp_testvectors/repos.bzl b/third_party/nist_cavp_testvectors/repos.bzl
deleted file mode 100644
index 36c6abf423ee4..0000000000000
--- a/third_party/nist_cavp_testvectors/repos.bzl
+++ /dev/null
@@ -1,109 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def nist_cavp_repos():
-    """Load NIST CAVP test vectors
-
-    The NIST website that serves the test vectors (csrc.nist.gov) is sometimes
-    unreliable. To improve availability, the NIST test vectors are hosted in a
-    lowRISC GCS storage bucket (ot-crypto-test-vectors). To add new test
-    vectors, upload the zip file to the GCS bucket, update the manifest there
-    to indicate the original download URL, and use the public link to fetch the
-    archive instead of the NIST website.
-    """
-    http_archive(
-        name = "nist_cavp_drbg_sp_800_90a_root",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "5f7e5658ebd5b4e6785a7b12fa32333511d2acc2f2d9c5ae1ffa16b699377769",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/drbg/drbgtestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/drbgtestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_ecdsa_fips_186_4",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        strip_prefix = "186-4ecdsatestvectors",
-        sha256 = "fe47cc92b4cee418236125c9ffbcd9bb01c8c34e74a4ba195d954bcb72824752",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/dss/186-4ecdsatestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/186-4ecdsatestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_sha2_fips_180_4",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        strip_prefix = "shabytetestvectors",
-        sha256 = "929ef80b7b3418aca026643f6f248815913b60e01741a44bba9e118067f4c9b8",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/shs/shabytetestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/shabytetestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_sha3_fips_202",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "cd07701af2e47f5cc889d642528b4bf11f8b6eb55797c7307a96828ed8d8fc8c",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/sha3/sha-3bytetestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/sha-3bytetestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_shake_fips_202",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "debfebc3157b3ceea002b84ca38476420389a3bf7e97dc5f53ea4689a16de4c7",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/sha3/shakebytetestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/shakebytetestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_aes_kw_sp_800_38f",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        strip_prefix = "kwtestvectors",
-        sha256 = "04a4a82e4de65bca505125295003f9c75a5a815afda046dc83661b8b580dfdf3",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/kwtestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/kwtestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_aes_gcm",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "f9fc479e134cde2980b3bb7cddbcb567b2cd96fd753835243ed067699f26a023",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/gcmtestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/gcmtestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_ecdh_sp_800_56a",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "5fff092551f2d72e89a3d9362711878708f9a14b502f0dfae819649105b0ea39",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/components/ecccdhtestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/ecccdhtestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_rsa_fips_186_3",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "8405aeb3572a4f98ed4b1a3ccb3f2f49e725462dd28ec4759d6a15d88855d19c",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/dss/186-3rsatestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/186-3rsatestvectors.zip",
-        ],
-    )
-    http_archive(
-        name = "nist_cavp_hmac_fips_198_1",
-        build_file = Label("//third_party/nist_cavp_testvectors:BUILD.nist_cavp_common.bazel"),
-        sha256 = "418c3837d38f249d6668146bd0090db24dd3c02d2e6797e3de33860a387ae4bd",
-        urls = [
-            "https://csrc.nist.gov/CSRC/media/Projects/Cryptographic-Algorithm-Validation-Program/documents/mac/hmactestvectors.zip",
-            "https://storage.googleapis.com/ot-crypto-test-vectors/nist/hmactestvectors.zip",
-        ],
-    )
diff --git a/third_party/open-dice/BUILD b/third_party/open-dice/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/open-dice/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/open-dice/BUILD.open-dice.bazel b/third_party/open-dice/BUILD.open-dice.bazel
new file mode 100644
index 0000000000000..2ea8c1d5400f9
--- /dev/null
+++ b/third_party/open-dice/BUILD.open-dice.bazel
@@ -0,0 +1,16 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+package(default_visibility = ["//visibility:public"])
+
+cc_library(
+    name = "cbor_reader_writer",
+    srcs = [
+        "src/cbor_reader.c",
+    ],
+    hdrs = [
+        "include/dice/cbor_reader.h",
+    ],
+    includes = ["include"],
+    visibility = ["//visibility:public"],
+)
diff --git a/third_party/open-dice/extensions.bzl b/third_party/open-dice/extensions.bzl
new file mode 100644
index 0000000000000..87de10e88100a
--- /dev/null
+++ b/third_party/open-dice/extensions.bzl
@@ -0,0 +1,22 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+open_dice = module_extension(
+    implementation = lambda _: _open_dice_repos(),
+)
+
+def _open_dice_repos():
+    http_archive(
+        name = "open-dice",
+        build_file = Label("//third_party/open-dice:BUILD.open-dice.bazel"),
+        strip_prefix = "open-dice-cf3f4cc7a3506a33ee3a437544ef6f40056b3563",
+        urls = ["https://github.com/google/open-dice/archive/cf3f4cc7a3506a33ee3a437544ef6f40056b3563.zip"],
+        sha256 = "d7ce830111451afe2a255cac3b750f82e50efe2aaf6bac0b076881c964cfe78d",
+        patches = [
+            Label("//third_party/open-dice/patches:Add-a-local-strlen-implementation.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/open-dice/patches/Add-a-local-strlen-implementation.patch b/third_party/open-dice/patches/Add-a-local-strlen-implementation.patch
new file mode 100644
index 0000000000000..f4db0d74c9fc4
--- /dev/null
+++ b/third_party/open-dice/patches/Add-a-local-strlen-implementation.patch
@@ -0,0 +1,39 @@
+From 1a2ead40e2e15ca058882ad86f4ac32e5c5b6177 Mon Sep 17 00:00:00 2001
+From: Tommy Chiu <tommychiu@google.com>
+Date: Thu, 17 Oct 2024 13:23:43 +0800
+Subject: [PATCH] Add a local strlen implementation
+
+Not all developing environments have access to strlen.
+---
+ src/cbor_writer.c | 8 +++++++-
+ 1 file changed, 7 insertions(+), 1 deletion(-)
+
+diff --git a/src/cbor_writer.c b/src/cbor_writer.c
+index 6c70129..c473543 100644
+--- a/src/cbor_writer.c
++++ b/src/cbor_writer.c
+@@ -30,6 +30,12 @@ enum CborType {
+   CBOR_TYPE_SIMPLE = 7,
+ };
+ 
++static unsigned long _strlen(const char* in) {
++  unsigned long ret;
++  for (ret = 0; *in++; ret++);
++  return ret;
++}
++
+ static bool CborWriteWouldOverflowCursor(size_t size, struct CborOut* out) {
+   return size > SIZE_MAX - out->cursor;
+ }
+@@ -127,7 +133,7 @@ uint8_t* CborAllocBstr(size_t data_size, struct CborOut* out) {
+ }
+ 
+ void CborWriteTstr(const char* str, struct CborOut* out) {
+-  CborWriteStr(CBOR_TYPE_TSTR, strlen(str), str, out);
++  CborWriteStr(CBOR_TYPE_TSTR, _strlen(str), str, out);
+ }
+ 
+ char* CborAllocTstr(size_t size, struct CborOut* out) {
+-- 
+2.47.0.rc1.288.g06298d1525-goog
+
diff --git a/third_party/open-dice/patches/BUILD b/third_party/open-dice/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/open-dice/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/openocd/BUILD b/third_party/openocd/BUILD
index d6299bb9ce465..c077b139444e9 100644
--- a/third_party/openocd/BUILD
+++ b/third_party/openocd/BUILD
@@ -62,7 +62,13 @@ configure_make(
         "--disable-vsllink",
         "--enable-remote-bitbang",
     ],
-    copts = ["-Wno-error=unused-variable"],
+    copts = [
+        "-Wno-error=unused-variable",
+        "-Wno-unused-but-set-variable",
+        "-Wno-strict-prototypes",
+        "-Wno-unused-but-set-parameter",
+        "-Wno-fuse-ld-path",
+    ],
     env = {"CCACHE": "none"},
     lib_source = "@openocd//:all_srcs",
     out_binaries = ["openocd"],
diff --git a/third_party/openocd/extensions.bzl b/third_party/openocd/extensions.bzl
new file mode 100644
index 0000000000000..71fb889cae2d0
--- /dev/null
+++ b/third_party/openocd/extensions.bzl
@@ -0,0 +1,31 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+openocd = module_extension(
+    implementation = lambda _: _openocd_repos(),
+)
+
+def _openocd_repos():
+    OPENOCD_VERSION = "0.12.0"
+    http_archive(
+        name = "openocd",
+        urls = [
+            # The sourceforge URL is the canonical one, but the site is not reliable and slow to download.
+            # Prefer to use Debian mirror of the tar ball and have sourceforge as backup.
+            "https://deb.debian.org/debian/pool/main/o/openocd/openocd_{version}.orig.tar.bz2".format(version = OPENOCD_VERSION),
+            "https://sourceforge.net/projects/openocd/files/openocd/{version}/openocd-{version}.tar.gz".format(version = OPENOCD_VERSION),
+        ],
+        strip_prefix = "openocd-" + OPENOCD_VERSION,
+        build_file = "@lowrisc_opentitan//third_party/openocd:BUILD.openocd.bazel",
+        sha256 = "af254788be98861f2bd9103fe6e60a774ec96a8c374744eef9197f6043075afa",
+        # See Issue(#18087)
+        patches = [
+            Label("@lowrisc_opentitan//third_party/openocd/patches:calloc_transpose.patch"),
+            Label("@lowrisc_opentitan//third_party/openocd/patches:reset_on_dmi_op_error.patch"),
+            Label("@lowrisc_opentitan//third_party/openocd/patches:string_truncate_build_error.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/openocd/patches/BUILD b/third_party/openocd/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/openocd/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/openocd/patches/calloc_transpose.patch b/third_party/openocd/patches/calloc_transpose.patch
new file mode 100644
index 0000000000000..305347f939a9a
--- /dev/null
+++ b/third_party/openocd/patches/calloc_transpose.patch
@@ -0,0 +1,166 @@
+diff --git a/jimtcl/linenoise.c b/jimtcl/linenoise.c
+index 1c01853..cca2160 100644
+--- a/jimtcl/linenoise.c
++++ b/jimtcl/linenoise.c
+@@ -2153,7 +2153,7 @@ notinserted:
+         return 0;
+     }
+     if (history == NULL) {
+-        history = (char **)calloc(sizeof(char*), history_max_len);
++        history = (char **)calloc(history_max_len, sizeof(char*));
+     }
+ 
+     /* do not insert duplicate lines into history */
+@@ -2186,7 +2186,7 @@ int linenoiseHistorySetMaxLen(int len) {
+     if (history) {
+         int tocopy = history_len;
+ 
+-        newHistory = (char **)calloc(sizeof(char*), len);
++        newHistory = (char **)calloc(len, sizeof(char*));
+ 
+         /* If we can't copy everything, free the elements we'll not use. */
+         if (len < tocopy) {
+diff --git a/src/flash/nor/ambiqmicro.c b/src/flash/nor/ambiqmicro.c
+index 2b458bc..bb89377 100644
+--- a/src/flash/nor/ambiqmicro.c
++++ b/src/flash/nor/ambiqmicro.c
+@@ -124,7 +124,7 @@ FLASH_BANK_COMMAND_HANDLER(ambiqmicro_flash_bank_command)
+ 	if (CMD_ARGC < 6)
+ 		return ERROR_COMMAND_SYNTAX_ERROR;
+ 
+-	ambiqmicro_info = calloc(sizeof(struct ambiqmicro_flash_bank), 1);
++	ambiqmicro_info = calloc(1, sizeof(struct ambiqmicro_flash_bank));
+ 
+ 	bank->driver_priv = ambiqmicro_info;
+ 
+diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
+index 7137b4a..2de3b91 100644
+--- a/src/flash/nor/kinetis.c
++++ b/src/flash/nor/kinetis.c
+@@ -898,7 +898,7 @@ FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
+ 	k_chip = kinetis_get_chip(target);
+ 
+ 	if (!k_chip) {
+-		k_chip = calloc(sizeof(struct kinetis_chip), 1);
++		k_chip = calloc(1, sizeof(struct kinetis_chip));
+ 		if (!k_chip) {
+ 			LOG_ERROR("No memory");
+ 			return ERROR_FAIL;
+@@ -999,7 +999,7 @@ static int kinetis_create_missing_banks(struct kinetis_chip *k_chip)
+ 					 bank_idx - k_chip->num_pflash_blocks);
+ 		}
+ 
+-		bank = calloc(sizeof(struct flash_bank), 1);
++		bank = calloc(1, sizeof(struct flash_bank));
+ 		if (!bank)
+ 			return ERROR_FAIL;
+ 
+diff --git a/src/flash/nor/max32xxx.c b/src/flash/nor/max32xxx.c
+index 51d6ae2..59a14af 100644
+--- a/src/flash/nor/max32xxx.c
++++ b/src/flash/nor/max32xxx.c
+@@ -87,7 +87,7 @@ FLASH_BANK_COMMAND_HANDLER(max32xxx_flash_bank_command)
+ 		return ERROR_FLASH_BANK_INVALID;
+ 	}
+ 
+-	info = calloc(sizeof(struct max32xxx_flash_bank), 1);
++	info = calloc(1, sizeof(struct max32xxx_flash_bank));
+ 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[2], info->flash_size);
+ 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[6], info->flc_base);
+ 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[7], info->sector_size);
+diff --git a/src/flash/nor/msp432.c b/src/flash/nor/msp432.c
+index d9b9695..cad7c6e 100644
+--- a/src/flash/nor/msp432.c
++++ b/src/flash/nor/msp432.c
+@@ -937,7 +937,7 @@ static int msp432_probe(struct flash_bank *bank)
+ 
+ 	if (is_main && MSP432P4 == msp432_bank->family_type) {
+ 		/* Create the info flash bank needed by MSP432P4 variants */
+-		struct flash_bank *info = calloc(sizeof(struct flash_bank), 1);
++		struct flash_bank *info = calloc(1, sizeof(struct flash_bank));
+ 		if (!info)
+ 			return ERROR_FAIL;
+ 
+diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
+index 3a78952..8c582b2 100644
+--- a/src/flash/nor/stellaris.c
++++ b/src/flash/nor/stellaris.c
+@@ -453,7 +453,7 @@ FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
+ 	if (CMD_ARGC < 6)
+ 		return ERROR_COMMAND_SYNTAX_ERROR;
+ 
+-	stellaris_info = calloc(sizeof(struct stellaris_flash_bank), 1);
++	stellaris_info = calloc(1, sizeof(struct stellaris_flash_bank));
+ 	bank->base = 0x0;
+ 	bank->driver_priv = stellaris_info;
+ 
+diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c
+index 36b7a0d..99bd994 100644
+--- a/src/flash/nor/stm32f2x.c
++++ b/src/flash/nor/stm32f2x.c
+@@ -1018,7 +1018,7 @@ static int stm32x_probe(struct flash_bank *bank)
+ 		assert(num_sectors > 0);
+ 
+ 		bank->num_sectors = num_sectors;
+-		bank->sectors = calloc(sizeof(struct flash_sector), num_sectors);
++		bank->sectors = calloc(num_sectors, sizeof(struct flash_sector));
+ 
+ 		if (stm32x_otp_is_f7(bank))
+ 			bank->size = STM32F7_OTP_SIZE;
+diff --git a/src/jtag/drivers/ulink.c b/src/jtag/drivers/ulink.c
+index fd29f12..e70780c 100644
+--- a/src/jtag/drivers/ulink.c
++++ b/src/jtag/drivers/ulink.c
+@@ -1473,7 +1473,7 @@ static int ulink_queue_scan(struct ulink *device, struct jtag_command *cmd)
+ 
+ 	/* Allocate TDO buffer if required */
+ 	if ((type == SCAN_IN) || (type == SCAN_IO)) {
+-		tdo_buffer_start = calloc(sizeof(uint8_t), scan_size_bytes);
++		tdo_buffer_start = calloc(scan_size_bytes, sizeof(uint8_t));
+ 
+ 		if (!tdo_buffer_start)
+ 			return ERROR_FAIL;
+diff --git a/src/target/arc_jtag.c b/src/target/arc_jtag.c
+index ddb4f62..a186709 100644
+--- a/src/target/arc_jtag.c
++++ b/src/target/arc_jtag.c
+@@ -298,7 +298,7 @@ static int arc_jtag_read_registers(struct arc_jtag *jtag_info, uint32_t type,
+ 			ARC_JTAG_READ_FROM_CORE_REG : ARC_JTAG_READ_FROM_AUX_REG);
+ 	arc_jtag_enque_set_transaction(jtag_info, transaction, TAP_DRPAUSE);
+ 
+-	uint8_t *data_buf = calloc(sizeof(uint8_t), count * 4);
++	uint8_t *data_buf = calloc(count * 4, sizeof(uint8_t));
+ 
+ 	arc_jtag_enque_register_rw(jtag_info, addr, data_buf, NULL, count);
+ 
+@@ -498,7 +498,7 @@ int arc_jtag_read_memory(struct arc_jtag *jtag_info, uint32_t addr,
+ 	if (!count)
+ 		return ERROR_OK;
+ 
+-	data_buf = calloc(sizeof(uint8_t), count * 4);
++	data_buf = calloc(count * 4, sizeof(uint8_t));
+ 	arc_jtag_enque_reset_transaction(jtag_info);
+ 
+ 	/* We are reading from memory. */
+diff --git a/src/target/nds32.c b/src/target/nds32.c
+index bd30976..9fb13d6 100644
+--- a/src/target/nds32.c
++++ b/src/target/nds32.c
+@@ -381,7 +381,7 @@ static const struct reg_arch_type nds32_reg_access_type_64 = {
+ static struct reg_cache *nds32_build_reg_cache(struct target *target,
+ 		struct nds32 *nds32)
+ {
+-	struct reg_cache *cache = calloc(sizeof(struct reg_cache), 1);
++	struct reg_cache *cache = calloc(1, sizeof(struct reg_cache));
+ 	struct reg *reg_list = calloc(TOTAL_REG_NUM, sizeof(struct reg));
+ 	struct nds32_reg *reg_arch_info = calloc(TOTAL_REG_NUM, sizeof(struct nds32_reg));
+ 	int i;
+@@ -409,7 +409,7 @@ static struct reg_cache *nds32_build_reg_cache(struct target *target,
+ 		reg_list[i].size = nds32_reg_size(i);
+ 		reg_list[i].arch_info = &reg_arch_info[i];
+ 
+-		reg_list[i].reg_data_type = calloc(sizeof(struct reg_data_type), 1);
++		reg_list[i].reg_data_type = calloc(1, sizeof(struct reg_data_type));
+ 
+ 		if (reg_arch_info[i].num >= FD0 && reg_arch_info[i].num <= FD31) {
+ 			reg_list[i].value = reg_arch_info[i].value;
diff --git a/third_party/openocd/reset_on_dmi_op_error.patch b/third_party/openocd/patches/reset_on_dmi_op_error.patch
similarity index 100%
rename from third_party/openocd/reset_on_dmi_op_error.patch
rename to third_party/openocd/patches/reset_on_dmi_op_error.patch
diff --git a/third_party/openocd/string_truncate_build_error.patch b/third_party/openocd/patches/string_truncate_build_error.patch
similarity index 100%
rename from third_party/openocd/string_truncate_build_error.patch
rename to third_party/openocd/patches/string_truncate_build_error.patch
diff --git a/third_party/openocd/repos.bzl b/third_party/openocd/repos.bzl
deleted file mode 100644
index 7604d49166d9d..0000000000000
--- a/third_party/openocd/repos.bzl
+++ /dev/null
@@ -1,22 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:repo.bzl", "http_archive_or_local")
-
-def openocd_repos(local = None):
-    OPENOCD_VERSION = "0.12.0"
-    http_archive_or_local(
-        name = "openocd",
-        local = local,
-        url = "https://sourceforge.net/projects/openocd/files/openocd/{version}/openocd-{version}.tar.gz".format(version = OPENOCD_VERSION),
-        strip_prefix = "openocd-" + OPENOCD_VERSION,
-        build_file = "//third_party/openocd:BUILD.openocd.bazel",
-        sha256 = "bb367fd19ab96a65ee5b269b60326d9f36bca1c64d9865cc36985d3651aba563",
-        # See Issue(#18087)
-        patches = [
-            Label("//third_party/openocd:reset_on_dmi_op_error.patch"),
-            Label("//third_party/openocd:string_truncate_build_error.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/third_party/protobuf/deps.bzl b/third_party/protobuf/deps.bzl
deleted file mode 100644
index c5a2419dd4cc6..0000000000000
--- a/third_party/protobuf/deps.bzl
+++ /dev/null
@@ -1,8 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@com_google_protobuf//:protobuf_deps.bzl", _protobuf_deps = "protobuf_deps")
-
-def protobuf_deps():
-    _protobuf_deps()
diff --git a/third_party/protobuf/repos.bzl b/third_party/protobuf/repos.bzl
deleted file mode 100644
index 5d48e35dbe153..0000000000000
--- a/third_party/protobuf/repos.bzl
+++ /dev/null
@@ -1,13 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def protobuf_repos():
-    http_archive(
-        name = "com_google_protobuf",
-        sha256 = "e661431858c1c7672a77446a7732d397dc5ae422eddfe07d02ed2c0619ae5d2b",
-        strip_prefix = "protobuf-520c601c99012101c816b6ccc89e8d6fc28fdbb8",
-        url = "https://github.com/protocolbuffers/protobuf/archive/520c601c99012101c816b6ccc89e8d6fc28fdbb8.tar.gz",
-    )
diff --git a/third_party/python/BUILD b/third_party/python/BUILD
index b199cc4648ab4..c85882e64fe2c 100644
--- a/third_party/python/BUILD
+++ b/third_party/python/BUILD
@@ -3,7 +3,3 @@
 # SPDX-License-Identifier: Apache-2.0
 
 package(default_visibility = ["//visibility:public"])
-
-exports_files([
-    "gen_requirements.sh",
-])
diff --git a/third_party/python/deps.bzl b/third_party/python/deps.bzl
deleted file mode 100644
index 070056e706f20..0000000000000
--- a/third_party/python/deps.bzl
+++ /dev/null
@@ -1,11 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@rules_python//python:repositories.bzl", "python_register_toolchains")
-
-def python_deps():
-    python_register_toolchains(
-        name = "python3",
-        python_version = "3.9",
-    )
diff --git a/third_party/python/gen_requirements.sh b/third_party/python/gen_requirements.sh
deleted file mode 100755
index a09eff7396789..0000000000000
--- a/third_party/python/gen_requirements.sh
+++ /dev/null
@@ -1,20 +0,0 @@
-#!/bin/bash
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-#
-# A shell script for building a python-requirements.txt file based on a
-# directory of wheels that have been pre-downloaded.
-
-set -e
-
-WHEEL_DIR="."
-OUTPUT_FILE="sanitized_requirements.txt"
-
-for wheel in $(ls -1 ${WHEEL_DIR}/*.whl); do
-  wheel_basename=$(echo ${wheel} | tr '\n' '\0' | xargs -0 -n 1 basename)
-  IFS='-' read -ra WHEEL_NAME_ARRAY <<<"${wheel_basename}"
-  PACKAGE_NAME=${WHEEL_NAME_ARRAY[0]}
-  PACKAGE_VERSION=${WHEEL_NAME_ARRAY[1]}
-  echo "${PACKAGE_NAME}==${PACKAGE_VERSION}" >>${OUTPUT_FILE}
-done
diff --git a/third_party/python/pip.bzl b/third_party/python/pip.bzl
deleted file mode 100644
index f48ec93ded67f..0000000000000
--- a/third_party/python/pip.bzl
+++ /dev/null
@@ -1,153 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@rules_python//python:pip.bzl", "pip_install")
-load("@python3//:defs.bzl", "interpreter")
-
-_WHEEL_BUILD_FILE_CONTENTS = """\
-package(default_visibility = ["//visibility:public"])
-
-exports_files([
-    "sanitized_requirements.txt",
-])
-
-filegroup(
-    name = "all_wheels",
-    srcs = glob(["**/*.whl"])
-)
-"""
-
-def _pip_wheel_impl(rctx):
-    # First, check if an existing pre-built Python wheels repo exists, and if
-    # so, use it instead of building one.
-    python_wheel_repo_path = rctx.os.environ.get(
-        "BAZEL_PYTHON_WHEELS_REPO",
-        None,
-    )
-    if python_wheel_repo_path:
-        rctx.report_progress("Mounting existing Python wheels repo")
-        rctx.symlink(python_wheel_repo_path, ".")
-        return
-
-    # If a pre-built Python wheels repo does not exist, we need to build it.
-    rctx.report_progress("No Python wheels repo detected, building it instead")
-
-    # First, we install the Python wheel package so we can build other wheels.
-    args = [
-        rctx.path(rctx.attr.python_interpreter),
-        "-m",
-        "pip",
-        "install",
-        "-U",
-        "--ignore-installed",
-        "--user",
-        "wheel",
-    ]
-    rctx.report_progress("Installing the Python wheel package")
-    result = rctx.execute(
-        args,
-        environment = {
-            "SOURCE_DATE_EPOCH": "315532800",
-            "PYTHONHASHSEED": "0",
-        },
-        timeout = rctx.attr.timeout,
-        quiet = rctx.attr.quiet,
-    )
-    if result.return_code:
-        fail("pip_wheel failed: {} ({})".format(result.stdout, result.stderr))
-
-    # Next, we download/build all the Python wheels for each requirement.
-    args = [
-        rctx.path(rctx.attr.python_interpreter),
-        "-m",
-        "pip",
-        "wheel",
-        "--use-pep517",
-        "-r",
-        rctx.path(rctx.attr.requirements),
-        "-w",
-        "./",
-    ]
-    rctx.report_progress("Pre-building Python wheels")
-    result = rctx.execute(
-        args,
-        environment = {
-            "SOURCE_DATE_EPOCH": "315532800",
-            "PYTHONHASHSEED": "0",
-        },
-        timeout = rctx.attr.timeout,
-        quiet = rctx.attr.quiet,
-    )
-    if result.return_code:
-        fail("pip_wheel failed: {} ({})".format(result.stdout, result.stderr))
-
-    # Last, we generate a new Python requirements file that does not contain any
-    # VCS links. We avoid just patching the existing python_requirements.txt
-    # file, and instead generate a requirements file based on the wheels that
-    # were built above. This enables us to make changes to the main
-    # python_requirements.txt file without impacting this step.
-    args = [rctx.path(rctx.attr._gen_requirements_script)]
-    rctx.report_progress("Generating sanitzed requirements file")
-    result = rctx.execute(
-        args,
-        environment = {
-            "SOURCE_DATE_EPOCH": "315532800",
-            "PYTHONHASHSEED": "0",
-        },
-        timeout = rctx.attr.timeout,
-        quiet = rctx.attr.quiet,
-        working_directory = "./",
-    )
-    if result.return_code:
-        fail("pip_wheel failed: {} ({})".format(result.stdout, result.stderr))
-
-    # We need a BUILD file to load the downloaded Python packages.
-    rctx.file(
-        "BUILD.bazel",
-        _WHEEL_BUILD_FILE_CONTENTS,
-    )
-
-pip_wheel = repository_rule(
-    implementation = _pip_wheel_impl,
-    attrs = {
-        "python_interpreter": attr.label(
-            default = interpreter,
-            allow_single_file = True,
-            doc = "Python interpreter to use.",
-        ),
-        "requirements": attr.label(
-            default = "//:python-requirements.txt",
-            allow_single_file = True,
-            doc = "Python requirements file describing package dependencies.",
-        ),
-        "quiet": attr.bool(
-            default = True,
-            doc = "If True, suppress printing stdout/stderr to the terminal.",
-        ),
-        "timeout": attr.int(
-            default = 300,
-            doc = "Timeout (in seconds) on the rule's execution duration.",
-        ),
-        "_gen_requirements_script": attr.label(
-            default = "//third_party/python:gen_requirements.sh",
-            allow_single_file = True,
-            doc = "Shell script that generates a requirements file without VCS links.",
-            executable = True,
-            cfg = "exec",
-        ),
-    },
-    environ = ["BAZEL_PYTHON_WHEELS_REPO"],
-)
-
-def pip_deps():
-    pip_wheel(
-        name = "ot_python_wheels",
-    )
-    pip_install(
-        name = "ot_python_deps",
-        python_interpreter_target = interpreter,
-        requirements = "@ot_python_wheels//:sanitized_requirements.txt",
-        find_links = "@ot_python_wheels//:all_wheels",
-        extra_pip_args = ["--no-index"],
-    )
diff --git a/third_party/python/repos.bzl b/third_party/python/repos.bzl
deleted file mode 100644
index a9e6080c6b1d2..0000000000000
--- a/third_party/python/repos.bzl
+++ /dev/null
@@ -1,13 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def python_repos():
-    http_archive(
-        name = "rules_python",
-        sha256 = "9e9a58cff49f80afd1c9fcc7137b719531f7a7427cce4fda1d30ca27b4a46a8a",
-        strip_prefix = "rules_python-07c3f8547abbd5b97839a48af226a0fbcfaa5e7c",
-        url = "https://github.com/lowRISC/rules_python/archive/07c3f8547abbd5b97839a48af226a0fbcfaa5e7c.tar.gz",
-    )
diff --git a/third_party/qemu/BUILD b/third_party/qemu/BUILD
new file mode 100644
index 0000000000000..747a56968775e
--- /dev/null
+++ b/third_party/qemu/BUILD
@@ -0,0 +1,49 @@
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+load("@ot_python_deps//:requirements.bzl", "requirement")
+load("@rules_python//python:defs.bzl", "py_binary", "py_library")
+
+py_binary(
+    name = "cfggen",
+    srcs = ["@qemu_opentitan//:scripts/opentitan/cfggen.py"],
+    deps = [
+        ":ot",
+        requirement("hjson"),
+    ],
+)
+
+py_binary(
+    name = "flashgen",
+    srcs = ["@qemu_opentitan//:scripts/opentitan/flashgen.py"],
+    deps = [
+        ":ot",
+        requirement("pyelftools"),
+    ],
+)
+
+py_binary(
+    name = "otptool",
+    srcs = ["@qemu_opentitan//:scripts/opentitan/otptool.py"],
+    deps = [":ot"],
+)
+
+py_library(
+    name = "ot",
+    srcs = ["@qemu_opentitan//:ot"],
+)
+
+alias(
+    name = "qemu-system-riscv32",
+    actual = "@qemu_opentitan//:build/qemu-system-riscv32",
+)
+
+alias(
+    name = "qemu-img",
+    actual = "@qemu_opentitan//:build/qemu-img",
+)
+
+exports_files(["build_qemu.sh"])
diff --git a/third_party/qemu/BUILD.qemu_opentitan.bazel b/third_party/qemu/BUILD.qemu_opentitan.bazel
new file mode 100644
index 0000000000000..a55f9a4f62378
--- /dev/null
+++ b/third_party/qemu/BUILD.qemu_opentitan.bazel
@@ -0,0 +1,19 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+package(default_visibility = ["//visibility:public"])
+
+exports_files(glob(["**"]))
+
+filegroup(
+    name = "qemu_src",
+    srcs = glob(["**"]),
+)
+
+filegroup(
+    name = "ot",
+    srcs = glob([
+        "python/qemu/ot/**",
+    ]),
+)
diff --git a/third_party/qemu/README.md b/third_party/qemu/README.md
new file mode 100644
index 0000000000000..f97088da80a6c
--- /dev/null
+++ b/third_party/qemu/README.md
@@ -0,0 +1,157 @@
+# QEMU
+
+For instructions on setting up QEMU for local development and troubleshooting steps, see the [setup guide](./setup.md).
+
+## Introduction
+
+[QEMU](https://www.qemu.org/) is an open-source project which primarily aims to support virtualization, user-mode emulation and full-system (machine) emulation flows.
+Its primary goal is to provide fast functional emulation in a generic manner that supports many host devices, at the cost of losing the accuracy offered by simulation.
+OpenTitan is an example of full-system emulation, where we emulate an OpenTitan RISC-V 32-bit machine to support running OpenTitan programs on any supported host, such as an x86-64 PC.
+In this context, a QEMU OpenTitan "machine" is a system consisting of an Ibex core, optionally including other cores and attached peripherals (equivalent to a "top").
+
+The predominant advantage of QEMU is its speed: internally, QEMU uses a dynamic translation backend called [TCG](https://www.qemu.org/docs/master/devel/tcg.html) (_Tiny Code Generator_) which translates blocks of guest code (RISC-V for the Ibex core used in OpenTitan) into equivalent optimized host code (e.g. x86-64) for execution.
+By using QEMU, tests and custom software stacks for OpenTitan can be executed and tested by integrators, all running on a single host device without requiring any specialized hardware.
+This can often allow parallel execution at faster speeds than hardware simulation, at the cost of completely accurate behavior.
+
+OpenTitan's emulated machines are currently developed on a [fork](https://github.com/lowRISC/qemu) of upstream QEMU to better facilitate the implementation of non-standard RISC-V extensions implemented in the Ibex CPU, and other extensions required to support OpenTitan functionality.
+There are currently two main emulation targets: Earlgrey 1.0.0, and Darjeeling (targeting the moving `master` branch).
+You can refer to the QEMU repository's documentation for more information on the development and usage of the QEMU OpenTitan machines - this page instead focuses on providing details for testing software with QEMU.
+
+## Scope
+
+Currently only the Earlgrey machine (`ot-earlgrey`) has any support within OpenTitanLib for test integration, primarily on the `earlgrey_1.0.0` branch.
+It is important to note that emulation is **ongoing** and **incomplete** - there are many devices and features which are not yet implemented or are infeasible to emulate within QEMU.
+Before using QEMU, it is strongly advised to read relevant QEMU [Earlgrey](https://github.com/lowRISC/qemu/blob/ot-9.2.0/docs/opentitan/earlgrey.md) and [Darjeeling](https://github.com/lowRISC/qemu/blob/ot-9.2.0/docs/opentitan/darjeeling.md) documentation pages to better understand whether the devices and features that you need are supported.
+Note that these also may not be up-to-date compared to the implementation, and as such the source files should be treated as the root source of truth.
+Furthermore, QEMU releases are pinned in Bazel, meaning that the supported features may differ compared to when this release was taken (see the [setup guide](./setup.md)).
+
+As of the time of writing, there are several unimplemented devices and many devices with partial emulation / missing features.
+The most important such examples to be aware of are:
+* The Power manager slow FSM is bypassed, with no support for low pow power entry / deep sleeps.
+* A pinmux block is implemented, but all connections currently go via a CharDev and do not interact with pinmux.
+* Non-Maskable Interrupts (NMIs) are not implemented.
+* Many other unsupported features, see the QEMU documentation.
+
+Furthermore, note that synchronous (e.g. I2C) or timing-based (UART) communication peripherals are often limited in supported due to the inherent inaccuracy of emulation with QEMU.
+As such, there may be limitations on what you can do using these peripherals.
+
+## Considerations & Constraints
+
+### Timing and Cycle Accuracy
+
+QEMU is _not_ a cycle-accurate emulator, as its main goal is emulation speed:
+* The instruction count reported in `mcycle` will not accurately reflect the number of instructions that have been executed.
+* When using a hardware timer (e.g. the `aon_timer` or `rv_timer`), the timer will expire after _approximately_ the correct amount of time, but will not be exactly accurate.
+
+QEMU has mechanisms for pacing the virtual CPU to match hardware timers, but in general it should be expected that both hardware timers and instruction counts are not correct in QEMU.
+This can be a particular challenge for security countermeasures and software mechanisms that opt to set tight timing thresholds.
+One potential solution is modifying the `icount` shift parameter, which informs the TCG's instruction counting feature for system emulation.
+When providing an icount shift of `N`, the virtual CPU will execute one instruction every `2^N` nanoseconds of virtual time, meaning that changing this parameter may allow emulation to "pass" tighter timing checks at the cost of less accurate timing overall.
+By default, an `icount` of 6 is used to align execution time with wall-clock time.
+
+### The TLB and PMP
+
+Hardware will often use a Translation Lookaside Buffer (TLB) as a high-speed cache to accelerate translation from virtual addresses to physical addresses.
+QEMU mimics this concept with its own address translation cache that it calls the [TLB](https://www.qemu.org/docs/master/devel/tcg.html#mmu-emulation), which it uses to speed up translation of guest virtual addresses to guest RAM or to the operation handlers for MMIO regions defined by emulated devices.
+
+It is worth being aware that partially or entirely invalidating the TLB (via mechanisms such as self-modifying flash code, or writes to PMP CSRs) can therefore decrease performance, as QEMU will temporarily lose the speedup from cached address translations.
+
+One particularly important note is that for RISC-V target emulation, 4 KiB pages are used for caching.
+When a PMP configuration is used that is not aligned to this page size, any address translation that falls within the misaligned region will not be cached nor make use of the TLB, due to the possibility of more granular PMP regions splitting a page with different permissions.
+As a result, any code that falls in a misaligned PMP region will be executed with a _significant_ slowdown compared to regular execution.
+
+Earlgrey's current PMP configurations tend to make use of fine-grained ranges for permissions to increase security posture, which means more potential for QEMU emulation to be slowed.
+In particular, Earlgrey's ROM & ROM_EXT text sections (containing the executable code) and owner firmware are all delineated using fine-grained PMP ranges, meaning code at the end (and start, if starting at a misaligned offset) will see performance decreases.
+The 4 byte stack guard placed at the top of stack may also cause issues when using all available stack.
+For any hot loops in the code, this can result in a substantial increase in emulation time.
+For example, the `sec_mmio` checks often cause large slowdowns in the ROM.
+
+### Host Performance and Parallelism
+
+As QEMU emulates by translating guest code to host instructions, the performance of QEMU will depend on the performance characteristics and processing load of the host device.
+Although QEMU has mechanisms for pacing, this can mean that different behaviors or outcomes are observed when executing QEMU on different host devices - particularly with regards to timing.
+One major advantage of QEMU is that tests can be executed in parallel, but doing so will also increase host processing load and may exacerbate timing differences.
+Hence, if the most reliable performance is required, instances of QEMU should be serially executed (e.g. passing `--test_output=streamed` or using `-j 1` for Bazel testing).
+
+Currently, large amounts of OpenTitan code are designed to only execute in FPGA or silicon environments, or sometimes in cycle-accurate simulation.
+This means that there may be segments of code which make implicit timing assumptions that no longer hold true when emulating in QEMU.
+As such, it may be required to conditionally change these timing assumptions for QEMU environments, or to modify the [`icount` parameter](#timing-and-cycle-accuracy) for a test to be able to meet timing checks.
+Where possible, the host and device should ideally synchronize without making any implicit timing assumptions.
+
+### Host Communication
+
+For communication between host and device (e.g. via UART, SPI, GPIO, etc.) QEMU allows for the creation of [CharDevs](https://www.qemu.org/docs/master/system/device-emulation.html).
+CharDevs are generic and flexible interfaces for communication, introducing an abstraction layer that supports a variety of protocols.
+Host-device communication in OpenTitanTool mainly uses PTYs (pseudo serial ports) and TCP sockets.
+
+Importantly, QEMU's lack of accurate cycle & timing emulation can limit the features that it is possible to emulate for these interfaces.
+For example, all UART communication goes via the CharDev and is not based on sampling at timing intervals, and so it is not possible to support the [UART oversampling](https://opentitan.org/book/hw/ip/uart/doc/theory_of_operation.html#reception) mechanism.
+
+### Flash Images and Bootstrapping
+
+There is sufficient Earlgrey emulation and support for QEMU in OpenTitanLib to run flows that require bootstrapping firmware.
+In spite of this, [slow emulation of the ROM](#the-tlb-and-pmp) means that we generally prefer to splice firmware into the initial flash image and avoid bootstrapping entirely.
+This avoids the delay of bootstrapping and additional boot times from resetting, which can compound to a large increase in execution time across multiple test runs.
+
+For software flows where it is genuinely desired to bootstrap firmware, appropriate [test parameters](#test-parameters) can be configured to use the bootstrapping flow instead, or a custom host harness or test command can be used.
+
+## Testing
+
+From the perspective of OpenTitan testing, QEMU is treated as a separate set of execution environments (e.g. `sim_qemu_rom_ext`) which use the QEMU transport interface in OpenTitanLib, allowing communication between the the host Rust code and the emulated QEMU OpenTitan device.
+
+### Test parameters
+
+Tests with a `sim_qemu_*` execution environment can be further configured by adding `qemu_params` to the test target.
+The currently supported parameters are:
+
+* `icount` (`int`): scale for Ibex's reported execution speed (`1GHz >> icount`) (defaults to 6).
+* `globals` (`dict[str, str]`): global properties for the QEMU machine.
+* `traces` (`[str]`): globs of [QEMU traces](https://qemu-project.gitlab.io/qemu/devel/tracing.html) to enable for debugging purposes.
+QEMU accepts different trace event patterns with support for wildcard matching with an `"*"`.
+* `qemu_args` (`[str]`): additional command line flags to pass to QEMU.
+* `bootstrap` (`bool`): by setting to `True`, bootstrap test firmware instead of splicing a flash image.
+Mutually exclusive with specifying a custom test harness.
+
+Example:
+
+```python
+opentitan_test(
+    name = "my_test",
+    exec_env = {
+      "//hw/top_earlgrey:sim_qemu_rom_with_fake_keys": None,
+    },
+    qemu = qemu_params(
+      icount = 5,
+      globals = {
+        "ot-aes.fast-mode": "false",
+      },
+      qemu_args = {
+        "-s", # spawn GDB server
+      },
+      traces = [
+        "ot_spi_device*",
+      ],
+    ),
+    # ...
+)
+```
+
+### Command-line arguments
+
+It can often be inconvenient to manually modify test targets to contain the desired list of QEMU arguments whilst debugging.
+In particular, manually adding and removing traces can quickly become unwieldy.
+
+Instead, you can pass in arguments to QEMU as command-line arguments using the form `--qemu-arg="X"` or `--qemu-args="X Y Z"`.
+The former forwards a single argument `X` to QEMU, whereas the latter forwards `X`, `Y` and `Z` each as _different_ arguments to QEMU.
+
+For example, to manually add some traces for the USB device and alert updates whilst debugging a test, you might run:
+```
+./bazelisk.sh test //path_to_qemu_test:my_test --test_arg=--qemu-args="--trace ot_usbdev* --trace ot*update_alert*"
+```
+
+### Logging
+
+When executing a test in a QEMU execution environment, the default behavior is that the QEMU log output stream is combined with the regular UART console output stream.
+When both interfaces are simultaneously written, it is possible that output may be disrupted by the characters interleaved from both streams.
+This can be particularly noticeable when tracing, where the QEMU log is often written much faster than regular console output.
+These outputs are not currently buffered by line breaks before combining the streams, meaning that it is possible for one line of console output to be split across multiple QEMU log lines.
diff --git a/third_party/qemu/build_qemu.sh b/third_party/qemu/build_qemu.sh
new file mode 100755
index 0000000000000..16c1234030315
--- /dev/null
+++ b/third_party/qemu/build_qemu.sh
@@ -0,0 +1,64 @@
+#!/usr/bin/env bash
+#
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+set -e
+
+if [ "$#" -ne 2 ]; then
+    echo "usage: build_qemu.sh <path to QEMU source> <output archive path>"
+    exit 1
+fi
+
+QEMU_ROOT="$1"
+OUT_ARCHIVE="$(realpath "$2")"
+
+# Go to the QEMU source directory.
+cd "$QEMU_ROOT"
+# Create the build directory if needed.
+mkdir -p build
+cd build
+# Run configure if necessary.
+if [ -f config-host.mak ];
+then
+    echo "Skipping configure, delete $PWD/config-host.mak to reconfigure"
+else
+    config_log="$PWD/qemu_config.log"
+    echo "Configuring QEMU (output log in $config_log)..."
+    if ! "$QEMU_ROOT/configure" \
+        --target-list=riscv32-softmmu \
+        --without-default-features \
+        --enable-tcg \
+        --enable-tools \
+        --enable-trace-backends=log \
+        &> "$config_log" ;
+    then
+        echo "Failed (see $config_log)"
+        exit 1
+    fi
+fi
+
+# Build QEMU
+build_log="$PWD/qemu_build.log"
+echo "Building QEMU (output log in $build_log)..."
+if ! ninja qemu-system-riscv32 &> "$build_log" ; then
+    echo "Failed (see $build_log)"
+    exit 1
+fi
+if ! ninja qemu-img &>> "$build_log" ; then
+    echo "Failed (see $build_log)"
+    exit 1
+fi
+
+# Run the make release script to create the requested archive.
+# Some versions have a bug and except PWD to be the source directory.
+archive_log="$PWD/qemu_archive.log"
+echo "Creating archive (output log in $archive_log)..."
+cd "$QEMU_ROOT"
+if ! "./scripts/opentitan/make_release.sh" \
+        "$OUT_ARCHIVE" . "build" &> "$archive_log" ;
+then
+    echo "Failed (see $archive_log)"
+    exit 1
+fi
diff --git a/third_party/qemu/extensions.bzl b/third_party/qemu/extensions.bzl
new file mode 100644
index 0000000000000..09351c646403b
--- /dev/null
+++ b/third_party/qemu/extensions.bzl
@@ -0,0 +1,107 @@
+# Copyright lowRISC contributors.
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+_ARCHIVE_MARKER_FILE = ".this.is.the.archive"
+
+def _qemu_bazel_build_or_forward_impl(rctx):
+    qemu_root = rctx.path(rctx.attr.qemu_src).dirname
+
+    # Determine whether the source repo was overridden with a local source directory.
+    if qemu_root.get_child(_ARCHIVE_MARKER_FILE).exists:
+        # Symlink everything to the release directory. Also watch everything.
+        for child in qemu_root.readdir():
+            rctx.symlink(child, child.basename)
+            if not child.is_dir:
+                rctx.watch(child)
+            elif child.is_dir:
+                rctx.watch_tree(child)
+    else:
+        print(
+            "QEMU source archive override detected:",
+            "will be using {} as the source directory".format(qemu_root.realpath),
+        )
+
+        # Sanity checks.
+        configure_script = qemu_root.get_child("configure")
+        if not configure_script.exists:
+            fail("There is no configure script in the source directory, did you override the QEMU source correctly?")
+
+        # Run the build script which will produce a release archive
+        release_archive = "build_archive.tar.gz"
+        rctx.watch(rctx.attr._build_qemu)
+        res = rctx.execute(
+            [
+                rctx.attr._build_qemu,
+                qemu_root.realpath,
+                release_archive,
+            ],
+            quiet = False,
+        )
+        if res.return_code != 0:
+            fail("Failed to build QEMU")
+
+        # Extract archive here.
+        rctx.extract(rctx.path(release_archive))
+
+        # Watch everything in the source directory.
+        for child in qemu_root.readdir():
+            # Skip the build directory because it can cause weird bazel behaviour:
+            # this directory has symlinks and cycles.
+            if not child.is_dir:
+                rctx.watch(child)
+            elif child.is_dir and child.basename != "build":
+                rctx.watch_tree(child)
+
+        # Create a single BUILD file that exports everything.
+        rctx.file("BUILD", rctx.read(rctx.path(rctx.attr._build_file)))
+
+qemu_bazel_build_or_forward = repository_rule(
+    implementation = _qemu_bazel_build_or_forward_impl,
+    attrs = {
+        # This attribute is used to locate the source repository so that we don't have to guess
+        # its name.
+        "qemu_src": attr.label(doc = "This is a label to any file at the root of the QEMU source repository."),
+        "_build_qemu": attr.label(
+            default = ":build_qemu.sh",
+            executable = True,
+            cfg = "exec",
+        ),
+        "_build_file": attr.label(
+            default = ":BUILD.qemu_opentitan.bazel",
+        ),
+    },
+    # Allow the repository to be refetched by running
+    # bazel configure fetch --force
+    configure = True,
+    # Make sure to refetch on restart.
+    local = True,
+)
+
+def _qemu_opentitan_repos():
+    QEMU_VERSION = "v9.2.0-2025-10-16"
+
+    url = "/".join([
+        "https://github.com/lowRISC/qemu/releases/download",
+        QEMU_VERSION,
+        "qemu-ot-earlgrey-{}-x86_64-unknown-linux-gnu.tar.gz".format(QEMU_VERSION),
+    ])
+
+    http_archive(
+        name = "qemu_opentitan_src",
+        url = url,
+        build_file = Label(":BUILD.qemu_opentitan.bazel"),
+        sha256 = "614d3fac9de4f002bb335f86eccf346f642d59e934ebfe625c507fc46b13fbf1",
+        patch_cmds = ["touch {}".format(_ARCHIVE_MARKER_FILE)],
+    )
+
+    qemu_bazel_build_or_forward(
+        name = "qemu_opentitan",
+        qemu_src = "@qemu_opentitan_src//:qemu_src",
+    )
+
+qemu = module_extension(
+    implementation = lambda _: _qemu_opentitan_repos(),
+)
diff --git a/third_party/qemu/setup.md b/third_party/qemu/setup.md
new file mode 100644
index 0000000000000..2d879025d4d68
--- /dev/null
+++ b/third_party/qemu/setup.md
@@ -0,0 +1,58 @@
+# Setting up OpenTitan for local QEMU development
+
+By default, the build system will download a pre-built release of our [QEMU fork](https://github.com/lowRISC/qemu/).
+In order to support local development and testing, the build system also supports a way to build QEMU from source.
+See instructions below.
+
+## Building from source using Bazel
+
+To perform local development, you first need to check out a copy of [QEMU fork](https://github.com/lowRISC/qemu/) and switch to the correct branch.
+
+The following step must only be done once:
+```bash
+# Run the following commands at the root of your QEMU checkout.
+touch REPO.bazel
+ln -s "/path/to/your/opentitan/repo/third_party/qemu/BUILD.qemu_opentitan.bazel" "BUILD.bazel"
+```
+
+Once done, every time you compile something using QEMU in OpenTitan, you need to tell Bazel to use your QEMU repository instead of downloading a release archive.
+This is done by passing the following command-line argument to bazel:
+```
+--override_repository="+qemu+qemu_opentitan_src=/path/to/your/qemu/repo/"
+```
+For example:
+```bash
+./bazelisk.sh cquery --override_repository=... @qemu_opentitan//:build/qemu-system-riscv32
+```
+Since this can become quite tedious, you also have the option of adding this to your local bazelrc file. The recommended way of doing is to create a `.bazelrc-site` file at the root of the repo (if does not exists) and add:
+```
+common --override_repository=...
+```
+
+**Important note:** when using this override, Bazel will essentially share your QEMU source repository.
+In particular, the content of the `build/` directory will be used to support incremental compilation in Bazel.
+The content of this directory can change when you run Bazel command.
+Bazel will automatically watch all files in the QEMU repository so that it can rebuild it if it changes.
+
+## Troubleshooting
+
+### Bazel tells me that `+qemu+qemu_opentitan_src` is not a valid repository name
+
+Unfortunately bazel requires the canonical name of the repository to be given on the command line and this name may change in the future.
+If this happens, you can run the following commands to figure out the canonical name:
+```bash
+./bazelisk.sh mod dump_repo_mapping "" | jq .qemu_opentitan_src
+```
+If the opentitan repository is not the root repository,
+you will need to update the above command to pass the canonical name of the opentitan repository
+instead of `""`.
+
+### How does it work?
+
+When passing `--override_repository="+qemu+qemu_opentitan_src=/path/to/your/qemu/repo/"`, the `qemu_bazel_build_or_forward` repository rules
+detect the override by looking for a specific marker file which is added to the release archive.
+If an override is detected, the repository rule will run the `build_qemu.sh` script inside the user's QEMU source directory.
+This script configures QEMU if necessary and then builds everything using ninja.
+Finally, it uses the OpenTitan release script to create a fake release archive.
+The repository rule then extracts this archive into the repository so that the content looks identical to normal, downloaded release.
+Finally, the repository rule also asks Bazel to watch all the files in the QEMU source directory, except for the `build/` directory.
diff --git a/third_party/riscv-compliance/defs.bzl b/third_party/riscv-compliance/defs.bzl
index b91b5c0dbf8ba..9b7ed5132403b 100644
--- a/third_party/riscv-compliance/defs.bzl
+++ b/third_party/riscv-compliance/defs.bzl
@@ -52,14 +52,7 @@ def rv_compliance_test(name, arch):
         verilator = verilator_params(
             timeout = "long",
         ),
-        # TODO(#22871): Remove "broken" tag once the tests are fixed.
-        broken = fpga_params(tags = ["broken"]),
-        exec_env = dicts.add(
-            EARLGREY_TEST_ENVS,
-            {
-                "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
-            },
-        ),
+        exec_env = EARLGREY_TEST_ENVS,
         linkopts = ["-Wl,--no-relax"],
         deps = [
             "//sw/device/lib/testing/test_framework:ottf_main",
diff --git a/third_party/riscv-compliance/extensions.bzl b/third_party/riscv-compliance/extensions.bzl
new file mode 100644
index 0000000000000..c56b39a9b796d
--- /dev/null
+++ b/third_party/riscv-compliance/extensions.bzl
@@ -0,0 +1,24 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+riscv_compliance = module_extension(
+    implementation = lambda _: _riscv_compliance_repos(),
+)
+
+def _riscv_compliance_repos():
+    http_archive(
+        name = "riscv-compliance",
+        build_file = Label("//third_party/riscv-compliance:BUILD.riscv-compliance.bazel"),
+        sha256 = "e77d823189c145314e48d4c29bcecc844b9c1582826ff406ec499cad7e95d0e4",
+        strip_prefix = "riscv-arch-test-2636302c27557b42d99bed7e0537beffdf8e1ab4",
+        urls = [
+            "https://github.com/riscv/riscv-compliance/archive/2636302c27557b42d99bed7e0537beffdf8e1ab4.tar.gz",
+        ],
+        patches = [
+            Label("//third_party/riscv-compliance/patches:0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/riscv-compliance/0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch b/third_party/riscv-compliance/patches/0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch
similarity index 100%
rename from third_party/riscv-compliance/0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch
rename to third_party/riscv-compliance/patches/0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch
diff --git a/third_party/riscv-compliance/patches/BUILD b/third_party/riscv-compliance/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/riscv-compliance/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/riscv-compliance/repos.bzl b/third_party/riscv-compliance/repos.bzl
deleted file mode 100644
index 09cc0fe345671..0000000000000
--- a/third_party/riscv-compliance/repos.bzl
+++ /dev/null
@@ -1,20 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def riscv_compliance_repos():
-    http_archive(
-        name = "riscv-compliance",
-        build_file = Label("//third_party/riscv-compliance:BUILD.riscv-compliance.bazel"),
-        sha256 = "e77d823189c145314e48d4c29bcecc844b9c1582826ff406ec499cad7e95d0e4",
-        strip_prefix = "riscv-arch-test-2636302c27557b42d99bed7e0537beffdf8e1ab4",
-        urls = [
-            "https://github.com/riscv/riscv-compliance/archive/2636302c27557b42d99bed7e0537beffdf8e1ab4.tar.gz",
-        ],
-        patches = [
-            Label("//third_party/riscv-compliance:0001-Add-configurable-trap-alignment-and-entry-point-to-p.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/third_party/rust/BUILD b/third_party/rust/BUILD
index 96bbb11cfd936..46196a4188564 100644
--- a/third_party/rust/BUILD
+++ b/third_party/rust/BUILD
@@ -3,8 +3,8 @@
 # SPDX-License-Identifier: Apache-2.0
 
 load("@bazel_skylib//rules:common_settings.bzl", "string_flag")
-load("@rules_rust//bindgen:bindgen.bzl", "rust_bindgen_toolchain")
-load("@rules_rust//crate_universe:defs.bzl", "crate", "crates_vendor")
+load("@rules_rust_bindgen//:defs.bzl", "rust_bindgen_toolchain")
+load("@rules_cc//cc:defs.bzl", "cc_import")
 
 package(default_visibility = ["//visibility:public"])
 
@@ -19,64 +19,30 @@ string_flag(
     make_variable = "OPENSSL_PKG_CONFIG_PATH",
 )
 
+# Since rules_rust 0.23.0, bindgen depends on the llvm project and builds the
+# llvm libaries from source. Building llvm from source has a huge impact on
+# build times. Instead, we depend on a pre-built llvm release and instantiate
+# the bindgen toolchain with the prebuilt binaries.
+cc_import(
+    name = "libclang",
+    shared_library = "@llvm_toolchain_llvm//:lib/libclang.so",
+)
+
+cc_import(
+    name = "libc++",
+    shared_library = "@llvm_toolchain_llvm//:lib/libc++.so",
+)
+
 rust_bindgen_toolchain(
     name = "bindgen_toolchain_impl",
-    bindgen = "@rules_rust//bindgen/3rdparty:bindgen",
-    clang = "@bindgen_clang_linux//:clang",
-    libclang = "@bindgen_clang_linux//:libclang",
-    libstdcxx = select({
-        ":specify_bindgen_libstdcxx": "@bindgen_libstdcxx_linux//:libstdc++",
-        "//conditions:default": None,
-    }),
-    system_includes = "@bindgen_clang_linux//:system_includes",
+    bindgen = "@rules_rust_bindgen//3rdparty:bindgen",
+    clang = "@llvm_toolchain_llvm//:bin/clang",
+    libclang = ":libclang",
+    libstdcxx = ":libc++",
 )
 
 toolchain(
     name = "bindgen_toolchain",
     toolchain = "bindgen_toolchain_impl",
-    toolchain_type = "@rules_rust//bindgen:toolchain_type",
-)
-
-crates_vendor(
-    name = "crate_index",
-    annotations = {
-        "libudev-sys": [crate.annotation(
-            patch_args = ["-p1"],
-            patches = ["@//third_party/rust/patches:libudev-sys-0.1.4.patch"],
-        )],
-        "mdbook": [crate.annotation(
-            gen_binaries = True,
-            patch_args = ["-p1"],
-            patches = ["@//third_party/rust/patches:mdbook-landing-page-links.patch"],
-        )],
-        "cryptoki": [crate.annotation(
-            patch_args = ["-p2"],
-            patches = [
-                "@//third_party/rust/patches:cryptoki-vendor-defined-mechanism-type.patch",
-            ],
-        )],
-        "cryptoki-sys": [crate.annotation(
-            additive_build_file_content = """
-                filegroup(
-                    name = "binding_srcs",
-                    srcs = [
-                        "src/lib.rs",
-                        "src/bindings/x86_64-unknown-linux-gnu.rs",
-                    ],
-                )
-            """,
-        )],
-        "openssl-sys": [crate.annotation(
-            build_script_env = {
-                "PKG_CONFIG_PATH": "$(OPENSSL_PKG_CONFIG_PATH)",
-                "OPENSSL_STATIC": "1",
-            },
-            build_script_toolchains = ["@//third_party/rust:openssl_pkg_config_path"],
-        )],
-    },
-    cargo_lockfile = "//third_party/rust:Cargo.lock",
-    manifests = ["//third_party/rust:Cargo.toml"],
-    mode = "remote",
-    tags = ["manual"],
-    vendor_path = "crates",
+    toolchain_type = "@rules_rust_bindgen//:toolchain_type",
 )
diff --git a/third_party/rust/Cargo.lock b/third_party/rust/Cargo.lock
index 72875405188fe..2f8bbcf5719e4 100644
--- a/third_party/rust/Cargo.lock
+++ b/third_party/rust/Cargo.lock
@@ -1,6 +1,6 @@
 # This file is automatically @generated by Cargo.
 # It is not intended for manual editing.
-version = 3
+version = 4
 
 [[package]]
 name = "CoreFoundation-sys"
@@ -169,9 +169,15 @@ checksum = "861af988fac460ac69a09f41e6217a8fb9178797b76fcc9478444be6a59be19c"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
+[[package]]
+name = "atomic-waker"
+version = "1.1.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1505bd5d3d116872e7271a6d4e16d81d0c8570876c8de68093a09ac269d8aac0"
+
 [[package]]
 name = "autocfg"
 version = "1.1.0"
@@ -189,7 +195,7 @@ dependencies = [
  "cfg-if",
  "libc",
  "miniz_oxide",
- "object",
+ "object 0.32.1",
  "rustc-demangle",
 ]
 
@@ -205,6 +211,12 @@ version = "0.21.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "35636a1494ede3b646cc98f74f8e62c773a38a659ebc777a2cf26b9b74171df9"
 
+[[package]]
+name = "base64"
+version = "0.22.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "72b3254f16251a8381aa12e40e3c4d2f0199f8c6508fbecb9d91f575e0fbb8c6"
+
 [[package]]
 name = "base64ct"
 version = "1.6.0"
@@ -270,6 +282,12 @@ version = "1.5.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1fd0f2584146f6f2ef48085050886acf353beff7305ebd1ae69500e27c67f64b"
 
+[[package]]
+name = "bytes"
+version = "1.9.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "325918d6fe32f23b19878fe4b34794ae41fc19ddbe53b10571a4874d44ffd39b"
+
 [[package]]
 name = "cargo_raze_deps"
 version = "0.0.0"
@@ -279,14 +297,17 @@ dependencies = [
  "anyhow",
  "arrayvec",
  "asn1",
+ "base64 0.21.5",
  "base64ct",
  "bitflags 2.4.0",
  "bitvec",
  "byteorder",
  "chrono",
+ "ciborium",
  "clap",
  "clap-num",
  "const-oid",
+ "coset",
  "crc",
  "cryptoki",
  "cryptoki-sys",
@@ -296,27 +317,34 @@ dependencies = [
  "ecdsa",
  "elf",
  "elliptic-curve",
+ "embedded-hal 1.0.0",
  "env_logger",
- "erased-serde",
+ "erased-serde 0.3.31",
  "foreign-types",
  "ftdi",
+ "ftdi-embedded-hal",
+ "ftdi-mpsse",
  "heck",
  "hex",
+ "hmac",
  "humantime",
  "humantime-serde",
  "indexmap 2.0.0",
  "indicatif",
  "indoc",
+ "inventory",
+ "itertools",
+ "libloading 0.8.3",
  "log",
  "mdbook",
  "memchr",
  "memoffset",
- "mio",
+ "mio 0.8.8",
  "mio-signals",
  "num-bigint-dig",
  "num-traits",
  "num_enum",
- "object",
+ "object 0.36.7",
  "once_cell",
  "openssl",
  "openssl-sys",
@@ -331,7 +359,8 @@ dependencies = [
  "rand 0.8.5",
  "rand_chacha",
  "regex",
- "ring",
+ "reqwest",
+ "ring 0.16.20",
  "rsa",
  "rsa-der",
  "rusb",
@@ -348,13 +377,15 @@ dependencies = [
  "sha3",
  "shellwords",
  "strum",
- "syn 2.0.38",
+ "syn 2.0.101",
  "tar",
  "tempfile",
  "thiserror",
  "tiny-keccak",
  "typetag",
+ "x509-cert",
  "zerocopy",
+ "zeroize",
 ]
 
 [[package]]
@@ -374,9 +405,9 @@ checksum = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd"
 
 [[package]]
 name = "chrono"
-version = "0.4.31"
+version = "0.4.40"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7f2c685bad3eb3d45a01354cedb7d5faa66194d1d58ba6e267a8de788f79db38"
+checksum = "1a7964611d71df112cb1730f2ee67324fcf4d0fc6606acbbe9bfe06df124637c"
 dependencies = [
  "android-tzdata",
  "iana-time-zone",
@@ -384,7 +415,34 @@ dependencies = [
  "num-traits",
  "serde",
  "wasm-bindgen",
- "windows-targets 0.48.5",
+ "windows-link",
+]
+
+[[package]]
+name = "ciborium"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "42e69ffd6f0917f5c029256a24d0161db17cea3997d185db0d35926308770f0e"
+dependencies = [
+ "ciborium-io",
+ "ciborium-ll",
+ "serde",
+]
+
+[[package]]
+name = "ciborium-io"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "05afea1e0a06c9be33d539b876f1ce3692f4afea2cb41f740e7743225ed1c757"
+
+[[package]]
+name = "ciborium-ll"
+version = "0.2.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "57663b653d948a338bfb3eeba9bb2fd5fcfaecb9e199e87e1eda4d9e8b240fd9"
+dependencies = [
+ "ciborium-io",
+ "half",
 ]
 
 [[package]]
@@ -447,7 +505,7 @@ dependencies = [
  "heck",
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -481,11 +539,31 @@ version = "0.9.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "c2459377285ad874054d797f3ccebf984978aa39129f6eafde5cdc8315b612f8"
 
+[[package]]
+name = "core-foundation"
+version = "0.9.4"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "91e195e091a93c46f7102ec7818a2aa394e1e1771c3ab4825963fa03e45afb8f"
+dependencies = [
+ "core-foundation-sys",
+ "libc",
+]
+
 [[package]]
 name = "core-foundation-sys"
-version = "0.8.4"
+version = "0.8.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "773648b94d0e5d620f64f280777445740e61fe701025087ec8b57f45c791888b"
+
+[[package]]
+name = "coset"
+version = "0.3.8"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e496a50fda8aacccc86d7529e2c1e0892dbd0f898a6b5645b5561b89c3210efa"
+checksum = "f4c8cc80f631f8307b887faca24dcc3abc427cd0367f6eb6188f6e8f5b7ad8fb"
+dependencies = [
+ "ciborium",
+ "ciborium-io",
+]
 
 [[package]]
 name = "cpufeatures"
@@ -550,13 +628,13 @@ dependencies = [
 
 [[package]]
 name = "cryptoki"
-version = "0.5.0"
+version = "0.8.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "95d9fb68c88020896fa3741a10e41f206b2ace927724170a753a3f2ba5f77c2b"
+checksum = "2e45b5f1ddb06ae54aea3f6d60e88c493356c51f43b8e741c9d5ac661f4d02d3"
 dependencies = [
  "bitflags 1.3.2",
  "cryptoki-sys",
- "libloading",
+ "libloading 0.7.4",
  "log",
  "paste",
  "secrecy",
@@ -564,12 +642,11 @@ dependencies = [
 
 [[package]]
 name = "cryptoki-sys"
-version = "0.1.6"
+version = "0.2.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4bc9943e09928a84ed6e76dbaea1699b7678e95b2487b0de31075af300221095"
+checksum = "062316aeb324b15a0b10c9475a9e67d613b7409056c33fbe33b7c12027408cfb"
 dependencies = [
- "libloading",
- "target-lexicon",
+ "libloading 0.7.4",
 ]
 
 [[package]]
@@ -593,7 +670,7 @@ dependencies = [
  "proc-macro2",
  "quote",
  "strsim",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -604,7 +681,7 @@ checksum = "836a9bbc7ad63342d6d6e7b815ccab164bc77a2d95d84bc3117a8c0d5c98e2d5"
 dependencies = [
  "darling_core",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -614,16 +691,30 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "fffa369a668c8af7dbf8b5e56c9f744fbd399949ed171606040001947de40b1c"
 dependencies = [
  "const-oid",
+ "der_derive",
+ "flagset",
  "pem-rfc7468",
  "zeroize",
 ]
 
+[[package]]
+name = "der_derive"
+version = "0.7.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8034092389675178f570469e6c3b0465d3d30b4505c294a6550db47f3c17ad18"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn 2.0.101",
+]
+
 [[package]]
 name = "deranged"
-version = "0.3.8"
+version = "0.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f2696e8a945f658fd14dc3b87242e6b80cd0f36ff04ea560fa39082368847946"
+checksum = "9c9e6a11ca8224451684bc0d7d5a7adbf8f2fd6887261a1cfc3c0432f9d4068e"
 dependencies = [
+ "powerfmt",
  "serde",
 ]
 
@@ -684,6 +775,12 @@ dependencies = [
  "spki",
 ]
 
+[[package]]
+name = "either"
+version = "1.13.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "60b1af1c220855b6ceac025d3f6ecdd2b7c4894bfe9cd9bda4fbb4bc7c0d4cf0"
+
 [[package]]
 name = "elasticlunr-rs"
 version = "3.0.2"
@@ -723,12 +820,47 @@ dependencies = [
  "zeroize",
 ]
 
+[[package]]
+name = "embedded-hal"
+version = "0.2.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "35949884794ad573cf46071e41c9b60efb0cb311e3ca01f7af807af1debc66ff"
+dependencies = [
+ "nb 0.1.3",
+ "void",
+]
+
+[[package]]
+name = "embedded-hal"
+version = "1.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "361a90feb7004eca4019fb28352a9465666b24f840f5c3cddf0ff13920590b89"
+
+[[package]]
+name = "embedded-hal-nb"
+version = "1.0.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "fba4268c14288c828995299e59b12babdbe170f6c6d73731af1b4648142e8605"
+dependencies = [
+ "embedded-hal 1.0.0",
+ "nb 1.1.0",
+]
+
 [[package]]
 name = "encode_unicode"
 version = "0.3.6"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "a357d28ed41a50f9c765dbfe56cbc04a64e53e5fc58ba79fbc34c10ef3df831f"
 
+[[package]]
+name = "encoding_rs"
+version = "0.8.35"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "75030f3c4f45dafd7586dd6780965a8c7e8e285a5ecb86713e63a79c5b2766f3"
+dependencies = [
+ "cfg-if",
+]
+
 [[package]]
 name = "env_logger"
 version = "0.10.0"
@@ -757,6 +889,16 @@ dependencies = [
  "serde",
 ]
 
+[[package]]
+name = "erased-serde"
+version = "0.4.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e004d887f51fcb9fef17317a2f3525c887d8aa3f4f50fed920816a688284a5b7"
+dependencies = [
+ "serde",
+ "typeid",
+]
+
 [[package]]
 name = "errno"
 version = "0.3.5"
@@ -795,6 +937,12 @@ dependencies = [
  "windows-sys 0.48.0",
 ]
 
+[[package]]
+name = "flagset"
+version = "0.4.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "b7ac824320a75a52197e8f2d787f6a38b6718bb6897a35142d749af3c0e8f4fe"
+
 [[package]]
 name = "flate2"
 version = "1.0.28"
@@ -846,6 +994,19 @@ dependencies = [
  "thiserror",
 ]
 
+[[package]]
+name = "ftdi-embedded-hal"
+version = "0.22.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5e328c2738c104e2649586bda4baabf376825db50014eb0d41bee74fb6064deb"
+dependencies = [
+ "embedded-hal 0.2.7",
+ "embedded-hal 1.0.0",
+ "embedded-hal-nb",
+ "ftdi-mpsse",
+ "nb 1.1.0",
+]
+
 [[package]]
 name = "ftdi-mpsse"
 version = "0.1.1"
@@ -877,6 +1038,56 @@ dependencies = [
  "new_debug_unreachable",
 ]
 
+[[package]]
+name = "futures-channel"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2dff15bf788c671c1934e366d07e30c1814a8ef514e1af724a602e8a2fbe1b10"
+dependencies = [
+ "futures-core",
+ "futures-sink",
+]
+
+[[package]]
+name = "futures-core"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "05f29059c0c2090612e8d742178b0580d2dc940c837851ad723096f87af6663e"
+
+[[package]]
+name = "futures-io"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9e5c1b78ca4aae1ac06c48a526a655760685149f0d465d21f37abfe57ce075c6"
+
+[[package]]
+name = "futures-sink"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e575fab7d1e0dcb8d0c7bcf9a63ee213816ab51902e6d244a95819acacf1d4f7"
+
+[[package]]
+name = "futures-task"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f90f7dce0722e95104fcb095585910c0977252f286e354b5e3bd38902cd99988"
+
+[[package]]
+name = "futures-util"
+version = "0.3.31"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9fa08315bb612088cc391249efdc3bc77536f16c91f6cf495e6fbe85b20a4a81"
+dependencies = [
+ "futures-core",
+ "futures-io",
+ "futures-sink",
+ "futures-task",
+ "memchr",
+ "pin-project-lite",
+ "pin-utils",
+ "slab",
+]
+
 [[package]]
 name = "gcc"
 version = "0.3.55"
@@ -922,6 +1133,35 @@ dependencies = [
  "subtle",
 ]
 
+[[package]]
+name = "h2"
+version = "0.4.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ccae279728d634d083c00f6099cb58f01cc99c145b84b8be2f6c74618d79922e"
+dependencies = [
+ "atomic-waker",
+ "bytes",
+ "fnv",
+ "futures-core",
+ "futures-sink",
+ "http",
+ "indexmap 2.0.0",
+ "slab",
+ "tokio",
+ "tokio-util",
+ "tracing",
+]
+
+[[package]]
+name = "half"
+version = "2.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "459196ed295495a68f7d7fe1d84f6c4b7ff0e21fe3017b2f283c6fac3ad803c9"
+dependencies = [
+ "cfg-if",
+ "crunchy",
+]
+
 [[package]]
 name = "handlebars"
 version = "4.3.7"
@@ -965,6 +1205,9 @@ name = "hex"
 version = "0.4.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "7f24254aa9a54b5c858eaee2f5bccdb46aaf0e486a595ed5fd8f86ba55232a70"
+dependencies = [
+ "serde",
+]
 
 [[package]]
 name = "hkdf"
@@ -998,6 +1241,46 @@ dependencies = [
  "syn 1.0.109",
 ]
 
+[[package]]
+name = "http"
+version = "1.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "f16ca2af56261c99fba8bac40a10251ce8188205a4c448fbb745a2e4daa76fea"
+dependencies = [
+ "bytes",
+ "fnv",
+ "itoa",
+]
+
+[[package]]
+name = "http-body"
+version = "1.0.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1efedce1fb8e6913f23e0c92de8e62cd5b772a67e7b3946df930a62566c93184"
+dependencies = [
+ "bytes",
+ "http",
+]
+
+[[package]]
+name = "http-body-util"
+version = "0.1.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "793429d76616a256bcb62c2a2ec2bed781c8307e797e2598c50010f2bee2544f"
+dependencies = [
+ "bytes",
+ "futures-util",
+ "http",
+ "http-body",
+ "pin-project-lite",
+]
+
+[[package]]
+name = "httparse"
+version = "1.9.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "7d71d3574edd2771538b901e6549113b4006ece66150fb69c0fb6d9a2adae946"
+
 [[package]]
 name = "humantime"
 version = "2.1.0"
@@ -1014,6 +1297,78 @@ dependencies = [
  "serde",
 ]
 
+[[package]]
+name = "hyper"
+version = "1.5.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "256fb8d4bd6413123cc9d91832d78325c48ff41677595be797d90f42969beae0"
+dependencies = [
+ "bytes",
+ "futures-channel",
+ "futures-util",
+ "h2",
+ "http",
+ "http-body",
+ "httparse",
+ "itoa",
+ "pin-project-lite",
+ "smallvec",
+ "tokio",
+ "want",
+]
+
+[[package]]
+name = "hyper-rustls"
+version = "0.27.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2d191583f3da1305256f22463b9bb0471acad48a4e534a5218b9963e9c1f59b2"
+dependencies = [
+ "futures-util",
+ "http",
+ "hyper",
+ "hyper-util",
+ "rustls",
+ "rustls-pki-types",
+ "tokio",
+ "tokio-rustls",
+ "tower-service",
+]
+
+[[package]]
+name = "hyper-tls"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "70206fc6890eaca9fde8a0bf71caa2ddfc9fe045ac9e5c70df101a7dbde866e0"
+dependencies = [
+ "bytes",
+ "http-body-util",
+ "hyper",
+ "hyper-util",
+ "native-tls",
+ "tokio",
+ "tokio-native-tls",
+ "tower-service",
+]
+
+[[package]]
+name = "hyper-util"
+version = "0.1.10"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "df2dcfbe0677734ab2f3ffa7fa7bfd4706bfdc1ef393f2ee30184aed67e631b4"
+dependencies = [
+ "bytes",
+ "futures-channel",
+ "futures-util",
+ "http",
+ "http-body",
+ "hyper",
+ "pin-project-lite",
+ "socket2",
+ "tokio",
+ "tower-service",
+ "tracing",
+]
+
 [[package]]
 name = "iana-time-zone"
 version = "0.1.58"
@@ -1114,9 +1469,18 @@ dependencies = [
 
 [[package]]
 name = "inventory"
-version = "0.3.12"
+version = "0.3.17"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3b31349d02fe60f80bbbab1a9402364cad7460626d6030494b08ac4a2075bf81"
+dependencies = [
+ "rustversion",
+]
+
+[[package]]
+name = "ipnet"
+version = "2.10.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e1be380c410bf0595e94992a648ea89db4dd3f3354ba54af206fd2a68cf5ac8e"
+checksum = "ddc24109865250148c2e0f3d25d4f0f479571723792d3802153c60922a4fb708"
 
 [[package]]
 name = "is-terminal"
@@ -1129,6 +1493,15 @@ dependencies = [
  "windows-sys 0.48.0",
 ]
 
+[[package]]
+name = "itertools"
+version = "0.13.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "413ee7dfc52ee1a4949ceeb7dbc8a33f2d6c088194d9f922fb8318faf1f01186"
+dependencies = [
+ "either",
+]
+
 [[package]]
 name = "itoa"
 version = "1.0.9"
@@ -1159,14 +1532,14 @@ version = "1.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "e2abad23fbc42b3700f2f279844dc832adb2b2eb069b2df918f455c4e18cc646"
 dependencies = [
- "spin",
+ "spin 0.5.2",
 ]
 
 [[package]]
 name = "libc"
-version = "0.2.149"
+version = "0.2.169"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "a08173bc88b7955d1b3145aa561539096c421ac8debde8cbc3612ec635fee29b"
+checksum = "b5aba8db14291edd000dfcc4d620c7ebfb122c613afb886ca8803fa4e128a20a"
 
 [[package]]
 name = "libftdi1-sys"
@@ -1190,6 +1563,16 @@ dependencies = [
  "winapi",
 ]
 
+[[package]]
+name = "libloading"
+version = "0.8.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0c2a198fb6b0eada2a8df47933734e6d35d350665a33a3593d7164fa52c75c19"
+dependencies = [
+ "cfg-if",
+ "windows-targets 0.52.6",
+]
+
 [[package]]
 name = "libm"
 version = "0.2.8"
@@ -1218,9 +1601,9 @@ dependencies = [
 
 [[package]]
 name = "libusb1-sys"
-version = "0.6.4"
+version = "0.7.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "f9d0e2afce4245f2c9a418511e5af8718bcaf2fa408aefb259504d1a9cb25f27"
+checksum = "da050ade7ac4ff1ba5379af847a10a10a8e284181e060105bf8d86960ce9ce0f"
 dependencies = [
  "cc",
  "libc",
@@ -1337,6 +1720,12 @@ dependencies = [
  "autocfg",
 ]
 
+[[package]]
+name = "mime"
+version = "0.3.17"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6877bb514081ee2a7ff5ef9de3281f14a4dd4bceac4c09388074a6b5df8a139a"
+
 [[package]]
 name = "miniz_oxide"
 version = "0.7.1"
@@ -1358,6 +1747,17 @@ dependencies = [
  "windows-sys 0.48.0",
 ]
 
+[[package]]
+name = "mio"
+version = "1.0.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2886843bf800fba2e3377cff24abf6379b4c4d5c6681eaf9ea5b0d15090450bd"
+dependencies = [
+ "libc",
+ "wasi 0.11.0+wasi-snapshot-preview1",
+ "windows-sys 0.52.0",
+]
+
 [[package]]
 name = "mio-signals"
 version = "0.2.0"
@@ -1366,9 +1766,41 @@ checksum = "21e9524e26c8749824640a1282b68a695b21d55862efa6d465b5f71107c93368"
 dependencies = [
  "libc",
  "log",
- "mio",
+ "mio 0.8.8",
+]
+
+[[package]]
+name = "native-tls"
+version = "0.2.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "a8614eb2c83d59d1c8cc974dd3f920198647674a0a035e1af1fa58707e317466"
+dependencies = [
+ "libc",
+ "log",
+ "openssl",
+ "openssl-probe",
+ "openssl-sys",
+ "schannel",
+ "security-framework",
+ "security-framework-sys",
+ "tempfile",
 ]
 
+[[package]]
+name = "nb"
+version = "0.1.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "801d31da0513b6ec5214e9bf433a77966320625a37860f910be265be6e18d06f"
+dependencies = [
+ "nb 1.1.0",
+]
+
+[[package]]
+name = "nb"
+version = "1.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8d5439c4ad607c3c23abf66de8c8bf57ba8adcd1f129e699851a6e43935d339d"
+
 [[package]]
 name = "new_debug_unreachable"
 version = "1.0.4"
@@ -1424,6 +1856,12 @@ dependencies = [
  "zeroize",
 ]
 
+[[package]]
+name = "num-conv"
+version = "0.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "51d515d32fb182ee37cda2ccdcb92950d6a3c2893aa280e540671c2cd0f3b1d9"
+
 [[package]]
 name = "num-integer"
 version = "0.1.45"
@@ -1473,7 +1911,7 @@ dependencies = [
  "proc-macro-crate",
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -1488,13 +1926,22 @@ version = "0.32.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "9cf5f9dd3933bd50a9e1f149ec995f39ae2c496d31fd772c1fd45ebc27e902b0"
 dependencies = [
- "flate2",
  "memchr",
- "ruzstd",
 ]
 
 [[package]]
-name = "once_cell"
+name = "object"
+version = "0.36.7"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "62948e14d923ea95ea2c7c86c71013138b66525b86bdc08d2dcc262bdb497b87"
+dependencies = [
+ "flate2",
+ "memchr",
+ "ruzstd",
+]
+
+[[package]]
+name = "once_cell"
 version = "1.18.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "dd8b5dd2ae5ed71462c540258bedcb51965123ad7e7ccf4b9a8cafaa4a63576d"
@@ -1533,9 +1980,15 @@ checksum = "a948666b637a0f465e8564c73e89d4dde00d72d4d473cc972f390fc3dcee7d9c"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
+[[package]]
+name = "openssl-probe"
+version = "0.1.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ff011a302c396a5197692431fc1948019154afc178baf7d8e37367442a4601cf"
+
 [[package]]
 name = "openssl-sys"
 version = "0.9.102"
@@ -1653,7 +2106,7 @@ dependencies = [
  "pest_meta",
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -1705,6 +2158,18 @@ dependencies = [
  "siphasher",
 ]
 
+[[package]]
+name = "pin-project-lite"
+version = "0.2.16"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3b3cff922bd51709b605d9ead9aa71031d81447142d828eb4a6eba76fe619f9b"
+
+[[package]]
+name = "pin-utils"
+version = "0.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8b870d8c151b6f2fb93e84a13146138f05d02ed11c7e7c54f8826aaaf7c9f184"
+
 [[package]]
 name = "pkcs1"
 version = "0.7.5"
@@ -1738,6 +2203,12 @@ version = "1.4.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "31114a898e107c51bb1609ffaf55a0e011cf6a4d7f1170d0015a165082c0338b"
 
+[[package]]
+name = "powerfmt"
+version = "0.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391"
+
 [[package]]
 name = "ppv-lite86"
 version = "0.2.17"
@@ -1771,9 +2242,9 @@ dependencies = [
 
 [[package]]
 name = "proc-macro2"
-version = "1.0.69"
+version = "1.0.95"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "134c189feb4956b20f6f547d2cf727d4c0fe06722b20a0eec87ed445a97f92da"
+checksum = "02b3e5e68a3a1a02aad3ec490a98007cbc13c37cbe84a3cd7b8e406d76e7f778"
 dependencies = [
  "unicode-ident",
 ]
@@ -1791,9 +2262,9 @@ dependencies = [
 
 [[package]]
 name = "quote"
-version = "1.0.33"
+version = "1.0.40"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5267fca4496028628a95160fc423a33e8b2e6af8a5302579e322e4b520293cae"
+checksum = "1885c039570dc00dcb4ff087a89e185fd56bae234ddc7f056a945bf36467248d"
 dependencies = [
  "proc-macro2",
 ]
@@ -1939,6 +2410,51 @@ version = "0.7.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "dbb5fb1acd8a1a18b3dd5be62d25485eb770e05afb408a9627d14d451bae12da"
 
+[[package]]
+name = "reqwest"
+version = "0.12.12"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "43e734407157c3c2034e0258f5e4473ddb361b1e85f95a66690d67264d7cd1da"
+dependencies = [
+ "base64 0.22.1",
+ "bytes",
+ "encoding_rs",
+ "futures-channel",
+ "futures-core",
+ "futures-util",
+ "h2",
+ "http",
+ "http-body",
+ "http-body-util",
+ "hyper",
+ "hyper-rustls",
+ "hyper-tls",
+ "hyper-util",
+ "ipnet",
+ "js-sys",
+ "log",
+ "mime",
+ "native-tls",
+ "once_cell",
+ "percent-encoding",
+ "pin-project-lite",
+ "rustls-pemfile",
+ "serde",
+ "serde_json",
+ "serde_urlencoded",
+ "sync_wrapper",
+ "system-configuration",
+ "tokio",
+ "tokio-native-tls",
+ "tower",
+ "tower-service",
+ "url",
+ "wasm-bindgen",
+ "wasm-bindgen-futures",
+ "web-sys",
+ "windows-registry",
+]
+
 [[package]]
 name = "rfc6979"
 version = "0.4.0"
@@ -1958,12 +2474,27 @@ dependencies = [
  "cc",
  "libc",
  "once_cell",
- "spin",
- "untrusted",
+ "spin 0.5.2",
+ "untrusted 0.7.1",
  "web-sys",
  "winapi",
 ]
 
+[[package]]
+name = "ring"
+version = "0.17.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c17fa4cb658e3583423e915b9f3acc01cceaee1860e33d59ebae66adc3a2dc0d"
+dependencies = [
+ "cc",
+ "cfg-if",
+ "getrandom",
+ "libc",
+ "spin 0.9.8",
+ "untrusted 0.9.0",
+ "windows-sys 0.52.0",
+]
+
 [[package]]
 name = "rsa"
 version = "0.9.2"
@@ -1997,9 +2528,9 @@ dependencies = [
 
 [[package]]
 name = "rusb"
-version = "0.9.3"
+version = "0.9.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "45fff149b6033f25e825cbb7b2c625a11ee8e6dac09264d49beb125e39aa97bf"
+checksum = "ab9f9ff05b63a786553a4c02943b74b34a988448671001e9a27e2f0565cc05a4"
 dependencies = [
  "libc",
  "libusb1-sys",
@@ -2043,6 +2574,45 @@ dependencies = [
  "windows-sys 0.48.0",
 ]
 
+[[package]]
+name = "rustls"
+version = "0.23.21"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8f287924602bf649d949c63dc8ac8b235fa5387d394020705b80c4eb597ce5b8"
+dependencies = [
+ "once_cell",
+ "rustls-pki-types",
+ "rustls-webpki",
+ "subtle",
+ "zeroize",
+]
+
+[[package]]
+name = "rustls-pemfile"
+version = "2.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "dce314e5fee3f39953d46bb63bb8a46d40c2f8fb7cc5a3b6cab2bde9721d6e50"
+dependencies = [
+ "rustls-pki-types",
+]
+
+[[package]]
+name = "rustls-pki-types"
+version = "1.10.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d2bf47e6ff922db3825eb750c4e2ff784c6ff8fb9e13046ef6a1d1c5401b0b37"
+
+[[package]]
+name = "rustls-webpki"
+version = "0.102.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "64ca1bc8749bd4cf37b5ce386cc146580777b4e8572c7b97baf22c83f444bee9"
+dependencies = [
+ "ring 0.17.8",
+ "rustls-pki-types",
+ "untrusted 0.9.0",
+]
+
 [[package]]
 name = "rustversion"
 version = "1.0.14"
@@ -2051,12 +2621,10 @@ checksum = "7ffc183a10b4478d04cbbbfc96d0873219d962dd5accaff2ffbd4ceb7df837f4"
 
 [[package]]
 name = "ruzstd"
-version = "0.4.0"
+version = "0.7.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ac3ffab8f9715a0d455df4bbb9d21e91135aab3cd3ca187af0cd0c3c3f868fdc"
+checksum = "fad02996bfc73da3e301efe90b1837be9ed8f4a462b6ed410aa35d00381de89f"
 dependencies = [
- "byteorder",
- "thiserror-core",
  "twox-hash",
 ]
 
@@ -2066,6 +2634,15 @@ version = "1.0.15"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1ad4cc8da4ef723ed60bced201181d83791ad433213d8c24efffda1eec85d741"
 
+[[package]]
+name = "schannel"
+version = "0.1.27"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1f29ebaa345f945cec9fbbc532eb307f0fdad8161f281b6369539c8d84876b3d"
+dependencies = [
+ "windows-sys 0.59.0",
+]
+
 [[package]]
 name = "scopeguard"
 version = "1.2.0"
@@ -2095,11 +2672,34 @@ dependencies = [
  "zeroize",
 ]
 
+[[package]]
+name = "security-framework"
+version = "2.10.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "770452e37cad93e0a50d5abc3990d2bc351c36d0328f86cefec2f2fb206eaef6"
+dependencies = [
+ "bitflags 1.3.2",
+ "core-foundation",
+ "core-foundation-sys",
+ "libc",
+ "security-framework-sys",
+]
+
+[[package]]
+name = "security-framework-sys"
+version = "2.14.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "49db231d56a190491cb4aeda9527f1ad45345af50b0851622a7adb8c03b01c32"
+dependencies = [
+ "core-foundation-sys",
+ "libc",
+]
+
 [[package]]
 name = "serde"
-version = "1.0.189"
+version = "1.0.219"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "8e422a44e74ad4001bdc8eede9a4570ab52f71190e9c076d14369f38b9200537"
+checksum = "5f0e2c6ed6606019b4e29e69dbaba95b11854410e5347d525002456dbbb786b6"
 dependencies = [
  "serde_derive",
 ]
@@ -2115,13 +2715,13 @@ dependencies = [
 
 [[package]]
 name = "serde_derive"
-version = "1.0.189"
+version = "1.0.219"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1e48d1f918009ce3145511378cf68d613e3b3d9137d67272562080d68a2b32d5"
+checksum = "5b0276cf7f2c73365f7157c8123c21cd9a50fbbd844757af28ca1f5925fc2a00"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -2135,13 +2735,25 @@ dependencies = [
  "serde",
 ]
 
+[[package]]
+name = "serde_urlencoded"
+version = "0.7.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d3491c14715ca2294c4d6a88f15e84739788c1d030eed8c110436aafdaa2f3fd"
+dependencies = [
+ "form_urlencoded",
+ "itoa",
+ "ryu",
+ "serde",
+]
+
 [[package]]
 name = "serde_with"
 version = "3.4.0"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "64cd236ccc1b7a29e7e2739f27c0b2dd199804abc4290e32f59f3b68d6405c23"
 dependencies = [
- "base64",
+ "base64 0.21.5",
  "chrono",
  "hex",
  "indexmap 1.9.3",
@@ -2149,7 +2761,7 @@ dependencies = [
  "serde",
  "serde_json",
  "serde_with_macros",
- "time 0.3.28",
+ "time 0.3.41",
 ]
 
 [[package]]
@@ -2161,7 +2773,7 @@ dependencies = [
  "darling",
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -2239,7 +2851,7 @@ dependencies = [
  "num-bigint",
  "num-traits",
  "thiserror",
- "time 0.3.28",
+ "time 0.3.41",
 ]
 
 [[package]]
@@ -2248,11 +2860,30 @@ version = "0.3.11"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "38b58827f4464d87d377d175e90bf58eb00fd8716ff0a62f80356b5e61555d0d"
 
+[[package]]
+name = "slab"
+version = "0.4.9"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8f92a496fb766b417c996b9c5e57daf2f7ad3b0bebe1ccfca4856390e3d3bb67"
+dependencies = [
+ "autocfg",
+]
+
 [[package]]
 name = "smallvec"
-version = "1.11.0"
+version = "1.13.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "62bb4feee49fdd9f707ef802e22365a35de4b7b299de4763d44bfea899442ff9"
+checksum = "3c5e1a9a646d36c3599cd173a41282daf47c44583ad367b8e6837255952e5c67"
+
+[[package]]
+name = "socket2"
+version = "0.5.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c970269d99b64e60ec3bd6ad27270092a5394c4e309314b18ae3fe575695fbe8"
+dependencies = [
+ "libc",
+ "windows-sys 0.52.0",
+]
 
 [[package]]
 name = "spin"
@@ -2260,11 +2891,17 @@ version = "0.5.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"
 
+[[package]]
+name = "spin"
+version = "0.9.8"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67"
+
 [[package]]
 name = "spki"
-version = "0.7.2"
+version = "0.7.3"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9d1e996ef02c474957d681f1b05213dfb0abab947b446a62d37770b23500184a"
+checksum = "d91ed6c858b01f942cd56b37a94b3e0a1798290327d1236e4d9cf4eaca44d29d"
 dependencies = [
  "base64ct",
  "der",
@@ -2327,7 +2964,7 @@ dependencies = [
  "proc-macro2",
  "quote",
  "rustversion",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -2349,15 +2986,45 @@ dependencies = [
 
 [[package]]
 name = "syn"
-version = "2.0.38"
+version = "2.0.101"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "e96b79aaa137db8f61e26363a0c9b47d8b4ec75da28b7d1d614c2303e232408b"
+checksum = "8ce2b7fc941b3a24138a0a7cf8e858bfc6a992e7978a068a5c760deb0ed43caf"
 dependencies = [
  "proc-macro2",
  "quote",
  "unicode-ident",
 ]
 
+[[package]]
+name = "sync_wrapper"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0bf256ce5efdfa370213c1dabab5935a12e49f2c58d15e9eac2870d3b4f27263"
+dependencies = [
+ "futures-core",
+]
+
+[[package]]
+name = "system-configuration"
+version = "0.6.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3c879d448e9d986b661742763247d3693ed13609438cf3d006f51f5368a5ba6b"
+dependencies = [
+ "bitflags 2.4.0",
+ "core-foundation",
+ "system-configuration-sys",
+]
+
+[[package]]
+name = "system-configuration-sys"
+version = "0.6.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8e1d1b10ced5ca923a1fcb8d03e96b8d3268065d724548c0211415ff6ac6bac4"
+dependencies = [
+ "core-foundation-sys",
+ "libc",
+]
+
 [[package]]
 name = "tap"
 version = "1.0.1"
@@ -2375,12 +3042,6 @@ dependencies = [
  "xattr",
 ]
 
-[[package]]
-name = "target-lexicon"
-version = "0.12.11"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "9d0e916b1148c8e263850e1ebcbd046f333e0683c724876bb0da63ea4373dc8a"
-
 [[package]]
 name = "tempfile"
 version = "3.8.0"
@@ -2433,26 +3094,6 @@ dependencies = [
  "thiserror-impl",
 ]
 
-[[package]]
-name = "thiserror-core"
-version = "1.0.38"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "0d97345f6437bb2004cd58819d8a9ef8e36cdd7661c2abc4bbde0a7c40d9f497"
-dependencies = [
- "thiserror-core-impl",
-]
-
-[[package]]
-name = "thiserror-core-impl"
-version = "1.0.38"
-source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "10ac1c5050e43014d16b2f94d0d2ce79e65ffdd8b38d8048f9c8f6a8a6da62ac"
-dependencies = [
- "proc-macro2",
- "quote",
- "syn 1.0.109",
-]
-
 [[package]]
 name = "thiserror-impl"
 version = "1.0.49"
@@ -2461,7 +3102,7 @@ checksum = "10712f02019e9288794769fba95cd6847df9874d49d871d062172f9dd41bc4cc"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -2477,12 +3118,14 @@ dependencies = [
 
 [[package]]
 name = "time"
-version = "0.3.28"
+version = "0.3.41"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "17f6bb557fd245c28e6411aa56b6403c689ad95061f50e4be16c274e70a17e48"
+checksum = "8a7619e19bc266e0f9c5e6686659d394bc57973859340060a69221e57dbc0c40"
 dependencies = [
  "deranged",
  "itoa",
+ "num-conv",
+ "powerfmt",
  "serde",
  "time-core",
  "time-macros",
@@ -2490,16 +3133,17 @@ dependencies = [
 
 [[package]]
 name = "time-core"
-version = "0.1.1"
+version = "0.1.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7300fbefb4dadc1af235a9cef3737cea692a9d97e1b9cbcd4ebdae6f8868e6fb"
+checksum = "c9e9a38711f559d9e3ce1cdb06dd7c5b8ea546bc90052da6d06bb76da74bb07c"
 
 [[package]]
 name = "time-macros"
-version = "0.2.14"
+version = "0.2.22"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "1a942f44339478ef67935ab2bbaec2fb0322496cf3cbe84b261e06ac3814c572"
+checksum = "3526739392ec93fd8b359c8e98514cb3e8e021beb4e5f597b00a0221f8ed8a49"
 dependencies = [
+ "num-conv",
  "time-core",
 ]
 
@@ -2527,6 +3171,75 @@ version = "0.1.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "1f3ccbac311fea05f86f61904b462b55fb3df8837a366dfc601a0161d0532f20"
 
+[[package]]
+name = "tls_codec"
+version = "0.4.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0de2e01245e2bb89d6f05801c564fa27624dbd7b1846859876c7dad82e90bf6b"
+dependencies = [
+ "tls_codec_derive",
+ "zeroize",
+]
+
+[[package]]
+name = "tls_codec_derive"
+version = "0.4.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "2d2e76690929402faae40aebdda620a2c0e25dd6d3b9afe48867dfd95991f4bd"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn 2.0.101",
+]
+
+[[package]]
+name = "tokio"
+version = "1.43.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "3d61fa4ffa3de412bfea335c6ecff681de2b609ba3c77ef3e00e521813a9ed9e"
+dependencies = [
+ "backtrace",
+ "bytes",
+ "libc",
+ "mio 1.0.3",
+ "pin-project-lite",
+ "socket2",
+ "windows-sys 0.52.0",
+]
+
+[[package]]
+name = "tokio-native-tls"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bbae76ab933c85776efabc971569dd6119c580d8f5d448769dec1764bf796ef2"
+dependencies = [
+ "native-tls",
+ "tokio",
+]
+
+[[package]]
+name = "tokio-rustls"
+version = "0.26.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "5f6d0975eaace0cf0fcadee4e4aaa5da15b5c079146f2cffb67c113be122bf37"
+dependencies = [
+ "rustls",
+ "tokio",
+]
+
+[[package]]
+name = "tokio-util"
+version = "0.7.13"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d7fcaa8d55a2bdd6b83ace262b016eca0d79ee02818c5c1bcdf0305114081078"
+dependencies = [
+ "bytes",
+ "futures-core",
+ "futures-sink",
+ "pin-project-lite",
+ "tokio",
+]
+
 [[package]]
 name = "toml"
 version = "0.5.11"
@@ -2559,6 +3272,58 @@ version = "0.2.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "ea68304e134ecd095ac6c3574494fc62b909f416c4fca77e440530221e549d3d"
 
+[[package]]
+name = "tower"
+version = "0.5.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "d039ad9159c98b70ecfd540b2573b97f7f52c3e8d9f8ad57a24b916a536975f9"
+dependencies = [
+ "futures-core",
+ "futures-util",
+ "pin-project-lite",
+ "sync_wrapper",
+ "tokio",
+ "tower-layer",
+ "tower-service",
+]
+
+[[package]]
+name = "tower-layer"
+version = "0.3.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "121c2a6cda46980bb0fcd1647ffaf6cd3fc79a013de288782836f6df9c48780e"
+
+[[package]]
+name = "tower-service"
+version = "0.3.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8df9b6e13f2d32c91b9bd719c00d1958837bc7dec474d94952798cc8e69eeec3"
+
+[[package]]
+name = "tracing"
+version = "0.1.41"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "784e0ac535deb450455cbfa28a6f0df145ea1bb7ae51b821cf5e7927fdcfbdd0"
+dependencies = [
+ "pin-project-lite",
+ "tracing-core",
+]
+
+[[package]]
+name = "tracing-core"
+version = "0.1.33"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e672c95779cf947c5311f83787af4fa8fffd12fb27e4993211a84bdfd9610f9c"
+dependencies = [
+ "once_cell",
+]
+
+[[package]]
+name = "try-lock"
+version = "0.2.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e421abadd41a4225275504ea4d6566923418b7f05506fbc9c0fe86ba7396114b"
+
 [[package]]
 name = "twox-hash"
 version = "1.6.3"
@@ -2569,6 +3334,12 @@ dependencies = [
  "static_assertions",
 ]
 
+[[package]]
+name = "typeid"
+version = "1.0.3"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bc7d623258602320d5c55d1bc22793b57daff0ec7efc270ea7d55ce1d5f5471c"
+
 [[package]]
 name = "typenum"
 version = "1.17.0"
@@ -2577,11 +3348,11 @@ checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825"
 
 [[package]]
 name = "typetag"
-version = "0.2.13"
+version = "0.2.20"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "80960fd143d4c96275c0e60b08f14b81fbb468e79bc0ef8fbda69fb0afafae43"
+checksum = "73f22b40dd7bfe8c14230cf9702081366421890435b2d625fa92b4acc4c3de6f"
 dependencies = [
- "erased-serde",
+ "erased-serde 0.4.6",
  "inventory",
  "once_cell",
  "serde",
@@ -2590,13 +3361,13 @@ dependencies = [
 
 [[package]]
 name = "typetag-impl"
-version = "0.2.13"
+version = "0.2.20"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "bfc13d450dc4a695200da3074dacf43d449b968baee95e341920e47f61a3b40f"
+checksum = "35f5380909ffc31b4de4f4bdf96b877175a016aa2ca98cee39fcfd8c4d53d952"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
@@ -2647,6 +3418,12 @@ version = "0.7.1"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "a156c684c91ea7d62626509bce3cb4e1d9ed5c4d978f7b4352658f96a4c26b4a"
 
+[[package]]
+name = "untrusted"
+version = "0.9.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8ecb6da28b8a351d773b68d5825ac39017e680750f980f3a1a85cd8dd28a47c1"
+
 [[package]]
 name = "url"
 version = "2.4.1"
@@ -2682,6 +3459,21 @@ version = "0.9.4"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f"
 
+[[package]]
+name = "void"
+version = "1.0.2"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "6a02e4885ed3bc0f2de90ea6dd45ebcbb66dacffe03547fadbb0eeae2770887d"
+
+[[package]]
+name = "want"
+version = "0.3.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "bfa7760aed19e106de2c7c0b581b509f2f25d3dacaf737cb82ac61bc6d760b0e"
+dependencies = [
+ "try-lock",
+]
+
 [[package]]
 name = "wasi"
 version = "0.10.0+wasi-snapshot-preview1"
@@ -2696,34 +3488,47 @@ checksum = "9c8d87e72b64a3b4db28d11ce29237c246188f4f51057d65a7eab63b7987e423"
 
 [[package]]
 name = "wasm-bindgen"
-version = "0.2.87"
+version = "0.2.100"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "7706a72ab36d8cb1f80ffbf0e071533974a60d0a308d01a5d0375bf60499a342"
+checksum = "1edc8929d7499fc4e8f0be2262a241556cfc54a0bea223790e71446f2aab1ef5"
 dependencies = [
  "cfg-if",
+ "once_cell",
+ "rustversion",
  "wasm-bindgen-macro",
 ]
 
 [[package]]
 name = "wasm-bindgen-backend"
-version = "0.2.87"
+version = "0.2.100"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "5ef2b6d3c510e9625e5fe6f509ab07d66a760f0885d858736483c32ed7809abd"
+checksum = "2f0a0651a5c2bc21487bde11ee802ccaf4c51935d0d3d42a6101f98161700bc6"
 dependencies = [
  "bumpalo",
  "log",
- "once_cell",
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
  "wasm-bindgen-shared",
 ]
 
+[[package]]
+name = "wasm-bindgen-futures"
+version = "0.4.37"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "c02dbc21516f9f1f04f187958890d7e6026df8d16540b7ad9492bc34a67cea03"
+dependencies = [
+ "cfg-if",
+ "js-sys",
+ "wasm-bindgen",
+ "web-sys",
+]
+
 [[package]]
 name = "wasm-bindgen-macro"
-version = "0.2.87"
+version = "0.2.100"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "dee495e55982a3bd48105a7b947fd2a9b4a8ae3010041b9e0faab3f9cd028f1d"
+checksum = "7fe63fc6d09ed3792bd0897b314f53de8e16568c2b3f7982f468c0bf9bd0b407"
 dependencies = [
  "quote",
  "wasm-bindgen-macro-support",
@@ -2731,22 +3536,25 @@ dependencies = [
 
 [[package]]
 name = "wasm-bindgen-macro-support"
-version = "0.2.87"
+version = "0.2.100"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "54681b18a46765f095758388f2d0cf16eb8d4169b639ab575a8f5693af210c7b"
+checksum = "8ae87ea40c9f689fc23f209965b6fb8a99ad69aeeb0231408be24920604395de"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
  "wasm-bindgen-backend",
  "wasm-bindgen-shared",
 ]
 
 [[package]]
 name = "wasm-bindgen-shared"
-version = "0.2.87"
+version = "0.2.100"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "ca6ad05a4870b2bf5fe995117d3728437bd27d7cd5f06f13c17443ef369775a1"
+checksum = "1a05d73b933a847d6cccdda8f838a22ff101ad9bf93e33684f39c1f5f0eece3d"
+dependencies = [
+ "unicode-ident",
+]
 
 [[package]]
 name = "web-sys"
@@ -2798,6 +3606,42 @@ dependencies = [
  "windows-targets 0.48.5",
 ]
 
+[[package]]
+name = "windows-link"
+version = "0.1.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "76840935b766e1b0a05c0066835fb9ec80071d4c09a16f6bd5f7e655e3c14c38"
+
+[[package]]
+name = "windows-registry"
+version = "0.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "e400001bb720a623c1c69032f8e3e4cf09984deec740f007dd2b03ec864804b0"
+dependencies = [
+ "windows-result",
+ "windows-strings",
+ "windows-targets 0.52.6",
+]
+
+[[package]]
+name = "windows-result"
+version = "0.2.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1d1043d8214f791817bab27572aaa8af63732e11bf84aa21a45a78d6c317ae0e"
+dependencies = [
+ "windows-targets 0.52.6",
+]
+
+[[package]]
+name = "windows-strings"
+version = "0.1.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "4cd9b125c486025df0eabcb585e62173c6c9eddcec5d117d3b6e8c30e2ee4d10"
+dependencies = [
+ "windows-result",
+ "windows-targets 0.52.6",
+]
+
 [[package]]
 name = "windows-sys"
 version = "0.45.0"
@@ -2816,6 +3660,24 @@ dependencies = [
  "windows-targets 0.48.5",
 ]
 
+[[package]]
+name = "windows-sys"
+version = "0.52.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "282be5f36a8ce781fad8c8ae18fa3f9beff57ec1b52cb3de0789201425d9a33d"
+dependencies = [
+ "windows-targets 0.52.6",
+]
+
+[[package]]
+name = "windows-sys"
+version = "0.59.0"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1e38bc4d79ed67fd075bcc251a1c39b32a1776bbe92e5bef1f0bf1f8c531853b"
+dependencies = [
+ "windows-targets 0.52.6",
+]
+
 [[package]]
 name = "windows-targets"
 version = "0.42.2"
@@ -2846,6 +3708,22 @@ dependencies = [
  "windows_x86_64_msvc 0.48.5",
 ]
 
+[[package]]
+name = "windows-targets"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "9b724f72796e036ab90c1021d4780d4d3d648aca59e491e6b98e725b84e99973"
+dependencies = [
+ "windows_aarch64_gnullvm 0.52.6",
+ "windows_aarch64_msvc 0.52.6",
+ "windows_i686_gnu 0.52.6",
+ "windows_i686_gnullvm",
+ "windows_i686_msvc 0.52.6",
+ "windows_x86_64_gnu 0.52.6",
+ "windows_x86_64_gnullvm 0.52.6",
+ "windows_x86_64_msvc 0.52.6",
+]
+
 [[package]]
 name = "windows_aarch64_gnullvm"
 version = "0.42.2"
@@ -2858,6 +3736,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "2b38e32f0abccf9987a4e3079dfb67dcd799fb61361e53e2882c3cbaf0d905d8"
 
+[[package]]
+name = "windows_aarch64_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "32a4622180e7a0ec044bb555404c800bc9fd9ec262ec147edd5989ccd0c02cd3"
+
 [[package]]
 name = "windows_aarch64_msvc"
 version = "0.42.2"
@@ -2870,6 +3754,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "dc35310971f3b2dbbf3f0690a219f40e2d9afcf64f9ab7cc1be722937c26b4bc"
 
+[[package]]
+name = "windows_aarch64_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "09ec2a7bb152e2252b53fa7803150007879548bc709c039df7627cabbd05d469"
+
 [[package]]
 name = "windows_i686_gnu"
 version = "0.42.2"
@@ -2882,6 +3772,18 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "a75915e7def60c94dcef72200b9a8e58e5091744960da64ec734a6c6e9b3743e"
 
+[[package]]
+name = "windows_i686_gnu"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "8e9b5ad5ab802e97eb8e295ac6720e509ee4c243f69d781394014ebfe8bbfa0b"
+
+[[package]]
+name = "windows_i686_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "0eee52d38c090b3caa76c563b86c3a4bd71ef1a819287c19d586d7334ae8ed66"
+
 [[package]]
 name = "windows_i686_msvc"
 version = "0.42.2"
@@ -2894,6 +3796,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "8f55c233f70c4b27f66c523580f78f1004e8b5a8b659e05a4eb49d4166cca406"
 
+[[package]]
+name = "windows_i686_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "240948bc05c5e7c6dabba28bf89d89ffce3e303022809e73deaefe4f6ec56c66"
+
 [[package]]
 name = "windows_x86_64_gnu"
 version = "0.42.2"
@@ -2906,6 +3814,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e"
 
+[[package]]
+name = "windows_x86_64_gnu"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "147a5c80aabfbf0c7d901cb5895d1de30ef2907eb21fbbab29ca94c5b08b1a78"
+
 [[package]]
 name = "windows_x86_64_gnullvm"
 version = "0.42.2"
@@ -2918,6 +3832,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc"
 
+[[package]]
+name = "windows_x86_64_gnullvm"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "24d5b23dc417412679681396f2b49f3de8c1473deb516bd34410872eff51ed0d"
+
 [[package]]
 name = "windows_x86_64_msvc"
 version = "0.42.2"
@@ -2930,6 +3850,12 @@ version = "0.48.5"
 source = "registry+https://github.com/rust-lang/crates.io-index"
 checksum = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538"
 
+[[package]]
+name = "windows_x86_64_msvc"
+version = "0.52.6"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "589f6da84c646204747d1270a2a5661ea66ed1cced2631d546fdfb155959f9ec"
+
 [[package]]
 name = "winnow"
 version = "0.5.15"
@@ -2948,6 +3874,18 @@ dependencies = [
  "tap",
 ]
 
+[[package]]
+name = "x509-cert"
+version = "0.2.5"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "1301e935010a701ae5f8655edc0ad17c44bad3ac5ce8c39185f75453b720ae94"
+dependencies = [
+ "const-oid",
+ "der",
+ "spki",
+ "tls_codec",
+]
+
 [[package]]
 name = "xattr"
 version = "1.0.1"
@@ -2959,27 +3897,40 @@ dependencies = [
 
 [[package]]
 name = "zerocopy"
-version = "0.7.11"
+version = "0.8.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "4c19fae0c8a9efc6a8281f2e623db8af1db9e57852e04cde3e754dd2dc29340f"
+checksum = "0894878a5fa3edfd6da3f88c4805f4c8558e2b996227a3d864f47fe11e38282c"
 dependencies = [
- "byteorder",
  "zerocopy-derive",
 ]
 
 [[package]]
 name = "zerocopy-derive"
-version = "0.7.11"
+version = "0.8.27"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "fc56589e9ddd1f1c28d4b4b5c773ce232910a6bb67a70133d61c9e347585efe9"
+checksum = "88d2b8d9c68ad2b9e4340d7832716a4d21a22a1154777ad56ea55c51a9cf3831"
 dependencies = [
  "proc-macro2",
  "quote",
- "syn 2.0.38",
+ "syn 2.0.101",
 ]
 
 [[package]]
 name = "zeroize"
-version = "1.7.0"
+version = "1.8.1"
+source = "registry+https://github.com/rust-lang/crates.io-index"
+checksum = "ced3678a2879b30306d323f4542626697a464a97c0a07c9aebf7ebca65cd4dde"
+dependencies = [
+ "zeroize_derive",
+]
+
+[[package]]
+name = "zeroize_derive"
+version = "1.4.2"
 source = "registry+https://github.com/rust-lang/crates.io-index"
-checksum = "525b4ec142c6b68a2d10f01f7bbf6755599ca3f81ea53b8431b7dd348f5fdb2d"
+checksum = "ce36e65b0d2999d2aafac989fb249189a141aee1f53c612c1f37d72631959f69"
+dependencies = [
+ "proc-macro2",
+ "quote",
+ "syn 2.0.101",
+]
diff --git a/third_party/rust/Cargo.toml b/third_party/rust/Cargo.toml
index 11b1a324782fb..2a229f038ca10 100644
--- a/third_party/rust/Cargo.toml
+++ b/third_party/rust/Cargo.toml
@@ -12,17 +12,23 @@ path = "empty_file_to_appease_cargo.rs"
 
 # Keep sorted.
 # Please avoid version numbers that only have one component.
+#
+# Do not modify the Cargo.lock file via cargo.
 [dependencies]
 aes = "0.8.2"
 anyhow = { version = "1.0.57", features=["backtrace"] }
 arrayvec = { version = "0.7", features=["serde"] }
 asn1 = "0.15.5"
+base64 = "0.21.0"
+base64ct = "1.6.0"
 bitflags = { version = "2.1", features = ["serde"] }
 bitvec = "1.0.1"
 byteorder = "1.4.3"
-chrono = "0.4"
+chrono = "0.4.40"
+ciborium = "0.2.0"
 const-oid = { version = "0.9.6", features=["std"] }
 clap = { version = "4.4", features = ["derive", "env", "deprecated"] }
+coset = { version = "0.3.5", features = ["std"] }
 crc = "3.0"
 der = { version = "0.7.8", features = ["alloc"] }
 deser-hjson = "2.0.0"
@@ -35,11 +41,17 @@ erased-serde = "0.3.12"
 # too recent version because it break things.
 foreign-types = "0.3.2"
 ftdi = "0.1.3"
+ftdi-embedded-hal = "0.22.0"
+ftdi-mpsse = "0.1.1"
+embedded-hal = "1.0.0"
 heck = "0.4.1"
-hex = "0.4.3"
+hex = { version = "0.4.3", features = ["serde"] }
+hmac = "0.12.1"
 humantime = "2.1.0"
 humantime-serde = "1.1"
 indicatif = "0.17.6"
+inventory = "0.3.17"
+itertools = "0.13.0"
 log = "0.4"
 memchr = "2.6.4"
 memoffset = "0.9.0"
@@ -48,7 +60,7 @@ mio-signals = "0.2.0"
 num-bigint-dig = "0.8"
 num-traits = "0.2.14"
 num_enum = "0.7"
-object = "0.32.0"
+object = "0.36.0"
 once_cell = "1.17"
 openssl = "0.10.64"
 openssl-sys = "0.9.102"
@@ -61,8 +73,9 @@ quote = "1.0"
 rand = "0.8.4"
 rand_chacha = "0.3"
 regex = "1.7"
+reqwest = { version = "0.12.9", features = ["http2", "default-tls", "blocking", "json"] }
 rsa = "0.9.2"
-rusb = "0.9.3"
+rusb = "0.9.4"
 rust-crypto = "0.2.36"
 rustix = { version = "0.38", features = ["event", "fs", "net", "process", "stdio", "termios"] }
 scopeguard = "1.2"
@@ -79,14 +92,17 @@ tempfile = "3.3.0"
 thiserror = "1.0"
 tiny-keccak = {version = "2.0.2", features = ["cshake"]}
 typetag = "0.2"
-zerocopy = { version = "0.7.1", features = ["derive"] }
+x509-cert = "0.2.5"
+zerocopy = { version = "0.8", features = ["derive"] }
+zeroize = "1.8.1"
 
 # hsmtool dependencies
-cryptoki = "0.5.0"
-cryptoki-sys = "0.1.6"
+cryptoki = "0.8.0"
+cryptoki-sys = "0.2.0"
 indexmap = { version = "2.0", features = ["serde"] }
 secrecy = "0.8"
 strum = { version = "0.25", features = ["derive"] }
+libloading = "0.8"
 
 # We'd like to reference serde_annotate by its Git repo, but we also need to
 # support airgapped builds and bazel does not support git repo references
@@ -113,5 +129,4 @@ ring = "0.16.20"
 rsa-der = "0.3.0"
 
 [dev-dependencies]
-base64ct = "1.6.0"
 indoc = "2.0.4"
diff --git a/third_party/rust/crates/BUILD.CoreFoundation-sys-0.1.4.bazel b/third_party/rust/crates/BUILD.CoreFoundation-sys-0.1.4.bazel
deleted file mode 100644
index 6a960694348cd..0000000000000
--- a/third_party/rust/crates/BUILD.CoreFoundation-sys-0.1.4.bazel
+++ /dev/null
@@ -1,120 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "CoreFoundation_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=CoreFoundation-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.4",
-    deps = [
-        "@crate_index__CoreFoundation-sys-0.1.4//:build_script_build",
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__mach-0.1.2//:mach",
-    ],
-)
-
-cargo_build_script(
-    name = "CoreFoundation-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    links = "CoreFoundation",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=CoreFoundation-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.4",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "CoreFoundation-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.IOKit-sys-0.1.5.bazel b/third_party/rust/crates/BUILD.IOKit-sys-0.1.5.bazel
deleted file mode 100644
index e8c074d383da3..0000000000000
--- a/third_party/rust/crates/BUILD.IOKit-sys-0.1.5.bazel
+++ /dev/null
@@ -1,124 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "IOKit_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=IOKit-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.5",
-    deps = [
-        "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",
-        "@crate_index__IOKit-sys-0.1.5//:build_script_build",
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__mach-0.1.2//:mach",
-    ],
-)
-
-cargo_build_script(
-    name = "IOKit-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    link_deps = [
-        "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",
-    ],
-    links = "IOKit",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=IOKit-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "IOKit-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.addr2line-0.21.0.bazel b/third_party/rust/crates/BUILD.addr2line-0.21.0.bazel
deleted file mode 100644
index 2d1f1cae796a8..0000000000000
--- a/third_party/rust/crates/BUILD.addr2line-0.21.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "addr2line",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=addr2line",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.21.0",
-    deps = [
-        "@crate_index__gimli-0.28.0//:gimli",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.adler-1.0.2.bazel b/third_party/rust/crates/BUILD.adler-1.0.2.bazel
deleted file mode 100644
index 1f430a18eae73..0000000000000
--- a/third_party/rust/crates/BUILD.adler-1.0.2.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # 0BSD OR MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "adler",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=adler",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.2",
-)
diff --git a/third_party/rust/crates/BUILD.aes-0.8.3.bazel b/third_party/rust/crates/BUILD.aes-0.8.3.bazel
deleted file mode 100644
index 4534fe307624f..0000000000000
--- a/third_party/rust/crates/BUILD.aes-0.8.3.bazel
+++ /dev/null
@@ -1,142 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "aes",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=aes",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.3",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__cipher-0.4.4//:cipher",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.aho-corasick-1.0.5.bazel b/third_party/rust/crates/BUILD.aho-corasick-1.0.5.bazel
deleted file mode 100644
index 00c8cafccb405..0000000000000
--- a/third_party/rust/crates/BUILD.aho-corasick-1.0.5.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Unlicense OR MIT
-# ])
-
-rust_library(
-    name = "aho_corasick",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "perf-literal",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=aho-corasick",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.5",
-    deps = [
-        "@crate_index__memchr-2.6.4//:memchr",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ammonia-3.3.0.bazel b/third_party/rust/crates/BUILD.ammonia-3.3.0.bazel
deleted file mode 100644
index 691193c577dfb..0000000000000
--- a/third_party/rust/crates/BUILD.ammonia-3.3.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "ammonia",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ammonia",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.3.0",
-    deps = [
-        "@crate_index__html5ever-0.26.0//:html5ever",
-        "@crate_index__maplit-1.0.2//:maplit",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__tendril-0.4.3//:tendril",
-        "@crate_index__url-2.4.1//:url",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.android-tzdata-0.1.1.bazel b/third_party/rust/crates/BUILD.android-tzdata-0.1.1.bazel
deleted file mode 100644
index df1d398a8d03a..0000000000000
--- a/third_party/rust/crates/BUILD.android-tzdata-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "android_tzdata",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=android-tzdata",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.android_system_properties-0.1.5.bazel b/third_party/rust/crates/BUILD.android_system_properties-0.1.5.bazel
deleted file mode 100644
index 841dd8aed1c9b..0000000000000
--- a/third_party/rust/crates/BUILD.android_system_properties-0.1.5.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "android_system_properties",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=android_system_properties",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.5",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.anstream-0.6.4.bazel b/third_party/rust/crates/BUILD.anstream-0.6.4.bazel
deleted file mode 100644
index 81a3c314341de..0000000000000
--- a/third_party/rust/crates/BUILD.anstream-0.6.4.bazel
+++ /dev/null
@@ -1,99 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anstream",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "auto",
-        "default",
-        "wincon",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anstream",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.4",
-    deps = [
-        "@crate_index__anstyle-1.0.4//:anstyle",
-        "@crate_index__anstyle-parse-0.2.2//:anstyle_parse",
-        "@crate_index__anstyle-query-1.0.0//:anstyle_query",
-        "@crate_index__colorchoice-1.0.0//:colorchoice",
-        "@crate_index__utf8parse-0.2.1//:utf8parse",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__anstyle-wincon-3.0.1//:anstyle_wincon",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__anstyle-wincon-3.0.1//:anstyle_wincon",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__anstyle-wincon-3.0.1//:anstyle_wincon",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.anstyle-1.0.4.bazel b/third_party/rust/crates/BUILD.anstyle-1.0.4.bazel
deleted file mode 100644
index 65d1b347bcfb3..0000000000000
--- a/third_party/rust/crates/BUILD.anstyle-1.0.4.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anstyle",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anstyle",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.4",
-)
diff --git a/third_party/rust/crates/BUILD.anstyle-parse-0.2.2.bazel b/third_party/rust/crates/BUILD.anstyle-parse-0.2.2.bazel
deleted file mode 100644
index 71f867a21befd..0000000000000
--- a/third_party/rust/crates/BUILD.anstyle-parse-0.2.2.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anstyle_parse",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "utf8",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anstyle-parse",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.2",
-    deps = [
-        "@crate_index__utf8parse-0.2.1//:utf8parse",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.anstyle-query-1.0.0.bazel b/third_party/rust/crates/BUILD.anstyle-query-1.0.0.bazel
deleted file mode 100644
index 7f217a51d4265..0000000000000
--- a/third_party/rust/crates/BUILD.anstyle-query-1.0.0.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anstyle_query",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anstyle-query",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.0",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.anstyle-wincon-3.0.1.bazel b/third_party/rust/crates/BUILD.anstyle-wincon-3.0.1.bazel
deleted file mode 100644
index 23159bc052d23..0000000000000
--- a/third_party/rust/crates/BUILD.anstyle-wincon-3.0.1.bazel
+++ /dev/null
@@ -1,90 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anstyle_wincon",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anstyle-wincon",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.0.1",
-    deps = [
-        "@crate_index__anstyle-1.0.4//:anstyle",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.anyhow-1.0.75.bazel b/third_party/rust/crates/BUILD.anyhow-1.0.75.bazel
deleted file mode 100644
index e7fec0e153da2..0000000000000
--- a/third_party/rust/crates/BUILD.anyhow-1.0.75.bazel
+++ /dev/null
@@ -1,128 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "anyhow",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "backtrace",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anyhow",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.75",
-    deps = [
-        "@crate_index__anyhow-1.0.75//:build_script_build",
-        "@crate_index__backtrace-0.3.69//:backtrace",
-    ],
-)
-
-cargo_build_script(
-    name = "anyhow_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "backtrace",
-        "default",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=anyhow",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.75",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "anyhow_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.arrayvec-0.7.4.bazel b/third_party/rust/crates/BUILD.arrayvec-0.7.4.bazel
deleted file mode 100644
index 9b3438fccb6dc..0000000000000
--- a/third_party/rust/crates/BUILD.arrayvec-0.7.4.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "arrayvec",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "serde",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=arrayvec",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.4",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.asn1-0.15.5.bazel b/third_party/rust/crates/BUILD.asn1-0.15.5.bazel
deleted file mode 100644
index a2f6cab520a2b..0000000000000
--- a/third_party/rust/crates/BUILD.asn1-0.15.5.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause
-# ])
-
-rust_library(
-    name = "asn1",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__asn1_derive-0.15.5//:asn1_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=asn1",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.15.5",
-)
diff --git a/third_party/rust/crates/BUILD.asn1_derive-0.15.5.bazel b/third_party/rust/crates/BUILD.asn1_derive-0.15.5.bazel
deleted file mode 100644
index 6f1fd0ab7b5cf..0000000000000
--- a/third_party/rust/crates/BUILD.asn1_derive-0.15.5.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause
-# ])
-
-rust_proc_macro(
-    name = "asn1_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=asn1_derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.15.5",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.autocfg-1.1.0.bazel b/third_party/rust/crates/BUILD.autocfg-1.1.0.bazel
deleted file mode 100644
index 82fb2662d2756..0000000000000
--- a/third_party/rust/crates/BUILD.autocfg-1.1.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "autocfg",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=autocfg",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.0",
-)
diff --git a/third_party/rust/crates/BUILD.backtrace-0.3.69.bazel b/third_party/rust/crates/BUILD.backtrace-0.3.69.bazel
deleted file mode 100644
index 777fd8e694264..0000000000000
--- a/third_party/rust/crates/BUILD.backtrace-0.3.69.bazel
+++ /dev/null
@@ -1,300 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "backtrace",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=backtrace",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.69",
-    deps = [
-        "@crate_index__backtrace-0.3.69//:build_script_build",
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__rustc-demangle-0.1.23//:rustc_demangle",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__addr2line-0.21.0//:addr2line",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-            "@crate_index__object-0.32.1//:object",  # cfg(not(all(windows, target_env = "msvc", not(target_vendor = "uwp"))))
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-cargo_build_script(
-    name = "backtrace_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=backtrace",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.3.69",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cc-1.0.83//:cc",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "backtrace_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.base16ct-0.2.0.bazel b/third_party/rust/crates/BUILD.base16ct-0.2.0.bazel
deleted file mode 100644
index fac3bb179bd02..0000000000000
--- a/third_party/rust/crates/BUILD.base16ct-0.2.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "base16ct",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=base16ct",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.0",
-)
diff --git a/third_party/rust/crates/BUILD.base64-0.21.5.bazel b/third_party/rust/crates/BUILD.base64-0.21.5.bazel
deleted file mode 100644
index e69084e69f5d6..0000000000000
--- a/third_party/rust/crates/BUILD.base64-0.21.5.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "base64",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=base64",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.21.5",
-)
diff --git a/third_party/rust/crates/BUILD.base64ct-1.6.0.bazel b/third_party/rust/crates/BUILD.base64ct-1.6.0.bazel
deleted file mode 100644
index 625c7e36a7bf3..0000000000000
--- a/third_party/rust/crates/BUILD.base64ct-1.6.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "base64ct",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=base64ct",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.6.0",
-)
diff --git a/third_party/rust/crates/BUILD.bazel b/third_party/rust/crates/BUILD.bazel
deleted file mode 100644
index 7d56fb59a0969..0000000000000
--- a/third_party/rust/crates/BUILD.bazel
+++ /dev/null
@@ -1,519 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-package(default_visibility = ["//visibility:public"])
-
-exports_files(
-    [
-        "cargo-bazel.json",
-        "crates.bzl",
-        "defs.bzl",
-    ] + glob(["*.bazel"]),
-)
-
-filegroup(
-    name = "srcs",
-    srcs = glob([
-        "*.bazel",
-        "*.bzl",
-    ]),
-)
-
-# Workspace Member Dependencies
-alias(
-    name = "aes",
-    actual = "@crate_index__aes-0.8.3//:aes",
-    tags = ["manual"],
-)
-
-alias(
-    name = "anstyle",
-    actual = "@crate_index__anstyle-1.0.4//:anstyle",
-    tags = ["manual"],
-)
-
-alias(
-    name = "anyhow",
-    actual = "@crate_index__anyhow-1.0.75//:anyhow",
-    tags = ["manual"],
-)
-
-alias(
-    name = "arrayvec",
-    actual = "@crate_index__arrayvec-0.7.4//:arrayvec",
-    tags = ["manual"],
-)
-
-alias(
-    name = "asn1",
-    actual = "@crate_index__asn1-0.15.5//:asn1",
-    tags = ["manual"],
-)
-
-alias(
-    name = "base64ct",
-    actual = "@crate_index__base64ct-1.6.0//:base64ct",
-    tags = ["manual"],
-)
-
-alias(
-    name = "bitflags",
-    actual = "@crate_index__bitflags-2.4.0//:bitflags",
-    tags = ["manual"],
-)
-
-alias(
-    name = "bitvec",
-    actual = "@crate_index__bitvec-1.0.1//:bitvec",
-    tags = ["manual"],
-)
-
-alias(
-    name = "byteorder",
-    actual = "@crate_index__byteorder-1.5.0//:byteorder",
-    tags = ["manual"],
-)
-
-alias(
-    name = "chrono",
-    actual = "@crate_index__chrono-0.4.31//:chrono",
-    tags = ["manual"],
-)
-
-alias(
-    name = "clap",
-    actual = "@crate_index__clap-4.4.7//:clap",
-    tags = ["manual"],
-)
-
-alias(
-    name = "clap-num",
-    actual = "@crate_index__clap-num-1.0.2//:clap_num",
-    tags = ["manual"],
-)
-
-alias(
-    name = "const-oid",
-    actual = "@crate_index__const-oid-0.9.6//:const_oid",
-    tags = ["manual"],
-)
-
-alias(
-    name = "crc",
-    actual = "@crate_index__crc-3.0.1//:crc",
-    tags = ["manual"],
-)
-
-alias(
-    name = "cryptoki",
-    actual = "@crate_index__cryptoki-0.5.0//:cryptoki",
-    tags = ["manual"],
-)
-
-alias(
-    name = "cryptoki-sys",
-    actual = "@crate_index__cryptoki-sys-0.1.6//:cryptoki_sys",
-    tags = ["manual"],
-)
-
-alias(
-    name = "der",
-    actual = "@crate_index__der-0.7.8//:der",
-    tags = ["manual"],
-)
-
-alias(
-    name = "deser-hjson",
-    actual = "@crate_index__deser-hjson-2.1.0//:deser_hjson",
-    tags = ["manual"],
-)
-
-alias(
-    name = "directories",
-    actual = "@crate_index__directories-5.0.1//:directories",
-    tags = ["manual"],
-)
-
-alias(
-    name = "ecdsa",
-    actual = "@crate_index__ecdsa-0.16.9//:ecdsa",
-    tags = ["manual"],
-)
-
-alias(
-    name = "elf",
-    actual = "@crate_index__elf-0.7.2//:elf",
-    tags = ["manual"],
-)
-
-alias(
-    name = "elliptic-curve",
-    actual = "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-    tags = ["manual"],
-)
-
-alias(
-    name = "env_logger",
-    actual = "@crate_index__env_logger-0.10.0//:env_logger",
-    tags = ["manual"],
-)
-
-alias(
-    name = "erased-serde",
-    actual = "@crate_index__erased-serde-0.3.31//:erased_serde",
-    tags = ["manual"],
-)
-
-alias(
-    name = "foreign-types",
-    actual = "@crate_index__foreign-types-0.3.2//:foreign_types",
-    tags = ["manual"],
-)
-
-alias(
-    name = "ftdi",
-    actual = "@crate_index__ftdi-0.1.3//:ftdi",
-    tags = ["manual"],
-)
-
-alias(
-    name = "heck",
-    actual = "@crate_index__heck-0.4.1//:heck",
-    tags = ["manual"],
-)
-
-alias(
-    name = "hex",
-    actual = "@crate_index__hex-0.4.3//:hex",
-    tags = ["manual"],
-)
-
-alias(
-    name = "humantime",
-    actual = "@crate_index__humantime-2.1.0//:humantime",
-    tags = ["manual"],
-)
-
-alias(
-    name = "humantime-serde",
-    actual = "@crate_index__humantime-serde-1.1.1//:humantime_serde",
-    tags = ["manual"],
-)
-
-alias(
-    name = "indexmap",
-    actual = "@crate_index__indexmap-2.0.0//:indexmap",
-    tags = ["manual"],
-)
-
-alias(
-    name = "indicatif",
-    actual = "@crate_index__indicatif-0.17.6//:indicatif",
-    tags = ["manual"],
-)
-
-alias(
-    name = "indoc",
-    actual = "@crate_index__indoc-2.0.4//:indoc",
-    tags = ["manual"],
-)
-
-alias(
-    name = "log",
-    actual = "@crate_index__log-0.4.20//:log",
-    tags = ["manual"],
-)
-
-alias(
-    name = "mdbook",
-    actual = "@crate_index__mdbook-0.4.34//:mdbook",
-    tags = ["manual"],
-)
-
-alias(
-    name = "memchr",
-    actual = "@crate_index__memchr-2.6.4//:memchr",
-    tags = ["manual"],
-)
-
-alias(
-    name = "memoffset",
-    actual = "@crate_index__memoffset-0.9.0//:memoffset",
-    tags = ["manual"],
-)
-
-alias(
-    name = "mio",
-    actual = "@crate_index__mio-0.8.8//:mio",
-    tags = ["manual"],
-)
-
-alias(
-    name = "mio-signals",
-    actual = "@crate_index__mio-signals-0.2.0//:mio_signals",
-    tags = ["manual"],
-)
-
-alias(
-    name = "num-bigint-dig",
-    actual = "@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig",
-    tags = ["manual"],
-)
-
-alias(
-    name = "num-traits",
-    actual = "@crate_index__num-traits-0.2.17//:num_traits",
-    tags = ["manual"],
-)
-
-alias(
-    name = "num_enum",
-    actual = "@crate_index__num_enum-0.7.0//:num_enum",
-    tags = ["manual"],
-)
-
-alias(
-    name = "object",
-    actual = "@crate_index__object-0.32.1//:object",
-    tags = ["manual"],
-)
-
-alias(
-    name = "once_cell",
-    actual = "@crate_index__once_cell-1.18.0//:once_cell",
-    tags = ["manual"],
-)
-
-alias(
-    name = "openssl",
-    actual = "@crate_index__openssl-0.10.64//:openssl",
-    tags = ["manual"],
-)
-
-alias(
-    name = "openssl-sys",
-    actual = "@crate_index__openssl-sys-0.9.102//:openssl_sys",
-    tags = ["manual"],
-)
-
-alias(
-    name = "p256",
-    actual = "@crate_index__p256-0.13.2//:p256",
-    tags = ["manual"],
-)
-
-alias(
-    name = "p384",
-    actual = "@crate_index__p384-0.13.0//:p384",
-    tags = ["manual"],
-)
-
-alias(
-    name = "paste",
-    actual = "@crate_index__paste-1.0.14//:paste",
-    tags = ["manual"],
-)
-
-alias(
-    name = "pem-rfc7468",
-    actual = "@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468",
-    tags = ["manual"],
-)
-
-alias(
-    name = "pest",
-    actual = "@crate_index__pest-2.7.3//:pest",
-    tags = ["manual"],
-)
-
-alias(
-    name = "pest_derive",
-    actual = "@crate_index__pest_derive-2.7.3//:pest_derive",
-    tags = ["manual"],
-)
-
-alias(
-    name = "proc-macro2",
-    actual = "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-    tags = ["manual"],
-)
-
-alias(
-    name = "quote",
-    actual = "@crate_index__quote-1.0.33//:quote",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rand",
-    actual = "@crate_index__rand-0.8.5//:rand",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rand_chacha",
-    actual = "@crate_index__rand_chacha-0.3.1//:rand_chacha",
-    tags = ["manual"],
-)
-
-alias(
-    name = "regex",
-    actual = "@crate_index__regex-1.9.4//:regex",
-    tags = ["manual"],
-)
-
-alias(
-    name = "ring",
-    actual = "@crate_index__ring-0.16.20//:ring",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rsa",
-    actual = "@crate_index__rsa-0.9.2//:rsa",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rsa-der",
-    actual = "@crate_index__rsa-der-0.3.0//:rsa_der",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rusb",
-    actual = "@crate_index__rusb-0.9.3//:rusb",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rust-crypto",
-    actual = "@crate_index__rust-crypto-0.2.36//:crypto",
-    tags = ["manual"],
-)
-
-alias(
-    name = "rustix",
-    actual = "@crate_index__rustix-0.38.10//:rustix",
-    tags = ["manual"],
-)
-
-alias(
-    name = "scopeguard",
-    actual = "@crate_index__scopeguard-1.2.0//:scopeguard",
-    tags = ["manual"],
-)
-
-alias(
-    name = "secrecy",
-    actual = "@crate_index__secrecy-0.8.0//:secrecy",
-    tags = ["manual"],
-)
-
-alias(
-    name = "serde",
-    actual = "@crate_index__serde-1.0.189//:serde",
-    tags = ["manual"],
-)
-
-alias(
-    name = "serde_bytes",
-    actual = "@crate_index__serde_bytes-0.11.12//:serde_bytes",
-    tags = ["manual"],
-)
-
-alias(
-    name = "serde_json",
-    actual = "@crate_index__serde_json-1.0.107//:serde_json",
-    tags = ["manual"],
-)
-
-alias(
-    name = "serde_with",
-    actual = "@crate_index__serde_with-3.4.0//:serde_with",
-    tags = ["manual"],
-)
-
-alias(
-    name = "serialport",
-    actual = "@crate_index__serialport-4.2.2//:serialport",
-    tags = ["manual"],
-)
-
-alias(
-    name = "sha2",
-    actual = "@crate_index__sha2-0.10.7//:sha2",
-    tags = ["manual"],
-)
-
-alias(
-    name = "sha3",
-    actual = "@crate_index__sha3-0.10.8//:sha3",
-    tags = ["manual"],
-)
-
-alias(
-    name = "shellwords",
-    actual = "@crate_index__shellwords-1.1.0//:shellwords",
-    tags = ["manual"],
-)
-
-alias(
-    name = "strum",
-    actual = "@crate_index__strum-0.25.0//:strum",
-    tags = ["manual"],
-)
-
-alias(
-    name = "syn",
-    actual = "@crate_index__syn-2.0.38//:syn",
-    tags = ["manual"],
-)
-
-alias(
-    name = "tar",
-    actual = "@crate_index__tar-0.4.40//:tar",
-    tags = ["manual"],
-)
-
-alias(
-    name = "tempfile",
-    actual = "@crate_index__tempfile-3.8.0//:tempfile",
-    tags = ["manual"],
-)
-
-alias(
-    name = "thiserror",
-    actual = "@crate_index__thiserror-1.0.49//:thiserror",
-    tags = ["manual"],
-)
-
-alias(
-    name = "tiny-keccak",
-    actual = "@crate_index__tiny-keccak-2.0.2//:tiny_keccak",
-    tags = ["manual"],
-)
-
-alias(
-    name = "typetag",
-    actual = "@crate_index__typetag-0.2.13//:typetag",
-    tags = ["manual"],
-)
-
-alias(
-    name = "zerocopy",
-    actual = "@crate_index__zerocopy-0.7.11//:zerocopy",
-    tags = ["manual"],
-)
-
-# Binaries
-alias(
-    name = "mdbook__mdbook",
-    actual = "@crate_index__mdbook-0.4.34//:mdbook__bin",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.bitflags-1.3.2.bazel b/third_party/rust/crates/BUILD.bitflags-1.3.2.bazel
deleted file mode 100644
index 82f31fd7d6862..0000000000000
--- a/third_party/rust/crates/BUILD.bitflags-1.3.2.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "bitflags",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=bitflags",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.3.2",
-)
diff --git a/third_party/rust/crates/BUILD.bitflags-2.4.0.bazel b/third_party/rust/crates/BUILD.bitflags-2.4.0.bazel
deleted file mode 100644
index 93c829b3a00b2..0000000000000
--- a/third_party/rust/crates/BUILD.bitflags-2.4.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "bitflags",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "serde",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=bitflags",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.4.0",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.bitvec-1.0.1.bazel b/third_party/rust/crates/BUILD.bitvec-1.0.1.bazel
deleted file mode 100644
index 56b326cdd4ee5..0000000000000
--- a/third_party/rust/crates/BUILD.bitvec-1.0.1.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "bitvec",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "atomic",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=bitvec",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.1",
-    deps = [
-        "@crate_index__funty-2.0.0//:funty",
-        "@crate_index__radium-0.7.0//:radium",
-        "@crate_index__tap-1.0.1//:tap",
-        "@crate_index__wyz-0.5.1//:wyz",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.block-buffer-0.10.4.bazel b/third_party/rust/crates/BUILD.block-buffer-0.10.4.bazel
deleted file mode 100644
index 6306d27dd7fe0..0000000000000
--- a/third_party/rust/crates/BUILD.block-buffer-0.10.4.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "block_buffer",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=block-buffer",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.4",
-    deps = [
-        "@crate_index__generic-array-0.14.7//:generic_array",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.bstr-1.6.2.bazel b/third_party/rust/crates/BUILD.bstr-1.6.2.bazel
deleted file mode 100644
index 3b862f0d8292c..0000000000000
--- a/third_party/rust/crates/BUILD.bstr-1.6.2.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "bstr",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-        "unicode",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=bstr",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.6.2",
-    deps = [
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__regex-automata-0.3.7//:regex_automata",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.bumpalo-3.14.0.bazel b/third_party/rust/crates/BUILD.bumpalo-3.14.0.bazel
deleted file mode 100644
index b71a78f18f6bd..0000000000000
--- a/third_party/rust/crates/BUILD.bumpalo-3.14.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "bumpalo",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=bumpalo",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.14.0",
-)
diff --git a/third_party/rust/crates/BUILD.byteorder-1.5.0.bazel b/third_party/rust/crates/BUILD.byteorder-1.5.0.bazel
deleted file mode 100644
index da07752f6c1ee..0000000000000
--- a/third_party/rust/crates/BUILD.byteorder-1.5.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Unlicense OR MIT
-# ])
-
-rust_library(
-    name = "byteorder",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=byteorder",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.5.0",
-)
diff --git a/third_party/rust/crates/BUILD.cc-1.0.83.bazel b/third_party/rust/crates/BUILD.cc-1.0.83.bazel
deleted file mode 100644
index 4941e2bcf6a7c..0000000000000
--- a/third_party/rust/crates/BUILD.cc-1.0.83.bazel
+++ /dev/null
@@ -1,142 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "cc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.83",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.cfg-if-1.0.0.bazel b/third_party/rust/crates/BUILD.cfg-if-1.0.0.bazel
deleted file mode 100644
index 29f2bb6502150..0000000000000
--- a/third_party/rust/crates/BUILD.cfg-if-1.0.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "cfg_if",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cfg-if",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.0",
-)
diff --git a/third_party/rust/crates/BUILD.chrono-0.4.31.bazel b/third_party/rust/crates/BUILD.chrono-0.4.31.bazel
deleted file mode 100644
index f3e02cf738b84..0000000000000
--- a/third_party/rust/crates/BUILD.chrono-0.4.31.bazel
+++ /dev/null
@@ -1,175 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "chrono",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "android-tzdata",
-        "clock",
-        "default",
-        "iana-time-zone",
-        "js-sys",
-        "oldtime",
-        "std",
-        "wasm-bindgen",
-        "wasmbind",
-        "winapi",
-        "windows-targets",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=chrono",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.31",
-    deps = [
-        "@crate_index__num-traits-0.2.17//:num_traits",
-        "@crate_index__serde-1.0.189//:serde",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__android-tzdata-0.1.1//:android_tzdata",  # cfg(target_os = "android")
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__android-tzdata-0.1.1//:android_tzdata",  # cfg(target_os = "android")
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__android-tzdata-0.1.1//:android_tzdata",  # cfg(target_os = "android")
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__js-sys-0.3.64//:js_sys",  # cfg(all(target_arch = "wasm32", not(any(target_os = "emscripten", target_os = "wasi"))))
-            "@crate_index__wasm-bindgen-0.2.87//:wasm_bindgen",  # cfg(all(target_arch = "wasm32", not(any(target_os = "emscripten", target_os = "wasi"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__android-tzdata-0.1.1//:android_tzdata",  # cfg(target_os = "android")
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__iana-time-zone-0.1.58//:iana_time_zone",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.cipher-0.4.4.bazel b/third_party/rust/crates/BUILD.cipher-0.4.4.bazel
deleted file mode 100644
index 1e818462cdc91..0000000000000
--- a/third_party/rust/crates/BUILD.cipher-0.4.4.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "cipher",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cipher",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.4",
-    deps = [
-        "@crate_index__crypto-common-0.1.6//:crypto_common",
-        "@crate_index__inout-0.1.3//:inout",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap-4.4.7.bazel b/third_party/rust/crates/BUILD.clap-4.4.7.bazel
deleted file mode 100644
index 370e288096430..0000000000000
--- a/third_party/rust/crates/BUILD.clap-4.4.7.bazel
+++ /dev/null
@@ -1,96 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "clap",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "cargo",
-        "color",
-        "default",
-        "deprecated",
-        "derive",
-        "env",
-        "error-context",
-        "help",
-        "std",
-        "suggestions",
-        "usage",
-        "wrap_help",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__clap_derive-4.4.7//:clap_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.4.7",
-    deps = [
-        "@crate_index__clap_builder-4.4.7//:clap_builder",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap-num-1.0.2.bazel b/third_party/rust/crates/BUILD.clap-num-1.0.2.bazel
deleted file mode 100644
index ee7d24bf9aefe..0000000000000
--- a/third_party/rust/crates/BUILD.clap-num-1.0.2.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "clap_num",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap-num",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.2",
-    deps = [
-        "@crate_index__num-traits-0.2.17//:num_traits",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap_builder-4.4.7.bazel b/third_party/rust/crates/BUILD.clap_builder-4.4.7.bazel
deleted file mode 100644
index 75b0805bf37cc..0000000000000
--- a/third_party/rust/crates/BUILD.clap_builder-4.4.7.bazel
+++ /dev/null
@@ -1,95 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "clap_builder",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "cargo",
-        "color",
-        "deprecated",
-        "env",
-        "error-context",
-        "help",
-        "std",
-        "suggestions",
-        "usage",
-        "wrap_help",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap_builder",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.4.7",
-    deps = [
-        "@crate_index__anstream-0.6.4//:anstream",
-        "@crate_index__anstyle-1.0.4//:anstyle",
-        "@crate_index__clap_lex-0.6.0//:clap_lex",
-        "@crate_index__strsim-0.10.0//:strsim",
-        "@crate_index__terminal_size-0.3.0//:terminal_size",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap_complete-4.4.0.bazel b/third_party/rust/crates/BUILD.clap_complete-4.4.0.bazel
deleted file mode 100644
index 28bb33003f3be..0000000000000
--- a/third_party/rust/crates/BUILD.clap_complete-4.4.0.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "clap_complete",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap_complete",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.4.0",
-    deps = [
-        "@crate_index__clap-4.4.7//:clap",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap_derive-4.4.7.bazel b/third_party/rust/crates/BUILD.clap_derive-4.4.7.bazel
deleted file mode 100644
index 0b32d56b8e35d..0000000000000
--- a/third_party/rust/crates/BUILD.clap_derive-4.4.7.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "clap_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "deprecated",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap_derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.4.7",
-    deps = [
-        "@crate_index__heck-0.4.1//:heck",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.clap_lex-0.6.0.bazel b/third_party/rust/crates/BUILD.clap_lex-0.6.0.bazel
deleted file mode 100644
index c2233b098c4da..0000000000000
--- a/third_party/rust/crates/BUILD.clap_lex-0.6.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "clap_lex",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=clap_lex",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.0",
-)
diff --git a/third_party/rust/crates/BUILD.colorchoice-1.0.0.bazel b/third_party/rust/crates/BUILD.colorchoice-1.0.0.bazel
deleted file mode 100644
index 3218502578d9f..0000000000000
--- a/third_party/rust/crates/BUILD.colorchoice-1.0.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "colorchoice",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=colorchoice",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.0",
-)
diff --git a/third_party/rust/crates/BUILD.console-0.15.7.bazel b/third_party/rust/crates/BUILD.console-0.15.7.bazel
deleted file mode 100644
index 25f2d990cd8b6..0000000000000
--- a/third_party/rust/crates/BUILD.console-0.15.7.bazel
+++ /dev/null
@@ -1,99 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "console",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "ansi-parsing",
-        "unicode-width",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=console",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.15.7",
-    deps = [
-        "@crate_index__lazy_static-1.4.0//:lazy_static",
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__unicode-width-0.1.10//:unicode_width",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__encode_unicode-0.3.6//:encode_unicode",  # cfg(windows)
-            "@crate_index__windows-sys-0.45.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__encode_unicode-0.3.6//:encode_unicode",  # cfg(windows)
-            "@crate_index__windows-sys-0.45.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__encode_unicode-0.3.6//:encode_unicode",  # cfg(windows)
-            "@crate_index__windows-sys-0.45.0//:windows_sys",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.const-oid-0.9.6.bazel b/third_party/rust/crates/BUILD.const-oid-0.9.6.bazel
deleted file mode 100644
index 3c1b92f3255bd..0000000000000
--- a/third_party/rust/crates/BUILD.const-oid-0.9.6.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "const_oid",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=const-oid",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.6",
-)
diff --git a/third_party/rust/crates/BUILD.core-foundation-sys-0.8.4.bazel b/third_party/rust/crates/BUILD.core-foundation-sys-0.8.4.bazel
deleted file mode 100644
index cba96555d623a..0000000000000
--- a/third_party/rust/crates/BUILD.core-foundation-sys-0.8.4.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT / Apache-2.0
-# ])
-
-rust_library(
-    name = "core_foundation_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=core-foundation-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.4",
-)
diff --git a/third_party/rust/crates/BUILD.cpufeatures-0.2.9.bazel b/third_party/rust/crates/BUILD.cpufeatures-0.2.9.bazel
deleted file mode 100644
index 07d64e0bc8356..0000000000000
--- a/third_party/rust/crates/BUILD.cpufeatures-0.2.9.bazel
+++ /dev/null
@@ -1,94 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "cpufeatures",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cpufeatures",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.9",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # aarch64-linux-android
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(target_arch = "aarch64", target_os = "linux"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.crc-3.0.1.bazel b/third_party/rust/crates/BUILD.crc-3.0.1.bazel
deleted file mode 100644
index 8df5a162ea1f2..0000000000000
--- a/third_party/rust/crates/BUILD.crc-3.0.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "crc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.0.1",
-    deps = [
-        "@crate_index__crc-catalog-2.2.0//:crc_catalog",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.crc-catalog-2.2.0.bazel b/third_party/rust/crates/BUILD.crc-catalog-2.2.0.bazel
deleted file mode 100644
index 5f99823bfdad2..0000000000000
--- a/third_party/rust/crates/BUILD.crc-catalog-2.2.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "crc_catalog",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crc-catalog",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.2.0",
-)
diff --git a/third_party/rust/crates/BUILD.crc32fast-1.3.2.bazel b/third_party/rust/crates/BUILD.crc32fast-1.3.2.bazel
deleted file mode 100644
index a30ea0972139b..0000000000000
--- a/third_party/rust/crates/BUILD.crc32fast-1.3.2.bazel
+++ /dev/null
@@ -1,126 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "crc32fast",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crc32fast",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.3.2",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__crc32fast-1.3.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "crc32fast_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crc32fast",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.3.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "crc32fast_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.crunchy-0.2.2.bazel b/third_party/rust/crates/BUILD.crunchy-0.2.2.bazel
deleted file mode 100644
index 74b04f84123d3..0000000000000
--- a/third_party/rust/crates/BUILD.crunchy-0.2.2.bazel
+++ /dev/null
@@ -1,125 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "crunchy",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "limit_128",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crunchy",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.2",
-    deps = [
-        "@crate_index__crunchy-0.2.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "crunchy_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "limit_128",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crunchy",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "crunchy_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.crypto-bigint-0.5.2.bazel b/third_party/rust/crates/BUILD.crypto-bigint-0.5.2.bazel
deleted file mode 100644
index ef627a48f9700..0000000000000
--- a/third_party/rust/crates/BUILD.crypto-bigint-0.5.2.bazel
+++ /dev/null
@@ -1,87 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "crypto_bigint",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "generic-array",
-        "rand_core",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crypto-bigint",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.2",
-    deps = [
-        "@crate_index__generic-array-0.14.7//:generic_array",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-        "@crate_index__subtle-2.5.0//:subtle",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.crypto-common-0.1.6.bazel b/third_party/rust/crates/BUILD.crypto-common-0.1.6.bazel
deleted file mode 100644
index 7024e43bd81e4..0000000000000
--- a/third_party/rust/crates/BUILD.crypto-common-0.1.6.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "crypto_common",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=crypto-common",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.6",
-    deps = [
-        "@crate_index__generic-array-0.14.7//:generic_array",
-        "@crate_index__typenum-1.17.0//:typenum",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.cryptoki-0.5.0.bazel b/third_party/rust/crates/BUILD.cryptoki-0.5.0.bazel
deleted file mode 100644
index 2b02eae68c812..0000000000000
--- a/third_party/rust/crates/BUILD.cryptoki-0.5.0.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0
-# ])
-
-rust_library(
-    name = "cryptoki",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__paste-1.0.14//:paste",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cryptoki",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.0",
-    deps = [
-        "@crate_index__bitflags-1.3.2//:bitflags",
-        "@crate_index__cryptoki-sys-0.1.6//:cryptoki_sys",
-        "@crate_index__libloading-0.7.4//:libloading",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__secrecy-0.8.0//:secrecy",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.cryptoki-sys-0.1.6.bazel b/third_party/rust/crates/BUILD.cryptoki-sys-0.1.6.bazel
deleted file mode 100644
index b5dd9a100106a..0000000000000
--- a/third_party/rust/crates/BUILD.cryptoki-sys-0.1.6.bazel
+++ /dev/null
@@ -1,131 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0
-# ])
-
-rust_library(
-    name = "cryptoki_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cryptoki-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.6",
-    deps = [
-        "@crate_index__cryptoki-sys-0.1.6//:build_script_build",
-        "@crate_index__libloading-0.7.4//:libloading",
-    ],
-)
-
-cargo_build_script(
-    name = "cryptoki-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cryptoki-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.6",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__target-lexicon-0.12.11//:target_lexicon",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "cryptoki-sys_build_script",
-    tags = ["manual"],
-)
-
-# Additive BUILD file content
-
-filegroup(
-    name = "binding_srcs",
-    srcs = [
-        "src/bindings/x86_64-unknown-linux-gnu.rs",
-        "src/lib.rs",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.darling-0.20.3.bazel b/third_party/rust/crates/BUILD.darling-0.20.3.bazel
deleted file mode 100644
index 5b0dc0bfe8a1c..0000000000000
--- a/third_party/rust/crates/BUILD.darling-0.20.3.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "darling",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "suggestions",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__darling_macro-0.20.3//:darling_macro",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=darling",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.20.3",
-    deps = [
-        "@crate_index__darling_core-0.20.3//:darling_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.darling_core-0.20.3.bazel b/third_party/rust/crates/BUILD.darling_core-0.20.3.bazel
deleted file mode 100644
index 28cc694be7db4..0000000000000
--- a/third_party/rust/crates/BUILD.darling_core-0.20.3.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "darling_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "strsim",
-        "suggestions",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=darling_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.20.3",
-    deps = [
-        "@crate_index__fnv-1.0.7//:fnv",
-        "@crate_index__ident_case-1.0.1//:ident_case",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__strsim-0.10.0//:strsim",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.darling_macro-0.20.3.bazel b/third_party/rust/crates/BUILD.darling_macro-0.20.3.bazel
deleted file mode 100644
index 48f9db8a70d3b..0000000000000
--- a/third_party/rust/crates/BUILD.darling_macro-0.20.3.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_proc_macro(
-    name = "darling_macro",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=darling_macro",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.20.3",
-    deps = [
-        "@crate_index__darling_core-0.20.3//:darling_core",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.der-0.7.8.bazel b/third_party/rust/crates/BUILD.der-0.7.8.bazel
deleted file mode 100644
index eddcf9a94eda5..0000000000000
--- a/third_party/rust/crates/BUILD.der-0.7.8.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "der",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "oid",
-        "pem",
-        "std",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=der",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.8",
-    deps = [
-        "@crate_index__const-oid-0.9.6//:const_oid",
-        "@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.deranged-0.3.8.bazel b/third_party/rust/crates/BUILD.deranged-0.3.8.bazel
deleted file mode 100644
index c4e6151eecf57..0000000000000
--- a/third_party/rust/crates/BUILD.deranged-0.3.8.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "deranged",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=deranged",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.8",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.deser-hjson-2.1.0.bazel b/third_party/rust/crates/BUILD.deser-hjson-2.1.0.bazel
deleted file mode 100644
index db8de6ff17fc8..0000000000000
--- a/third_party/rust/crates/BUILD.deser-hjson-2.1.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "deser_hjson",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=deser-hjson",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.1.0",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.digest-0.10.7.bazel b/third_party/rust/crates/BUILD.digest-0.10.7.bazel
deleted file mode 100644
index 65f13cb3478f1..0000000000000
--- a/third_party/rust/crates/BUILD.digest-0.10.7.bazel
+++ /dev/null
@@ -1,93 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "digest",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "block-buffer",
-        "const-oid",
-        "core-api",
-        "default",
-        "mac",
-        "oid",
-        "std",
-        "subtle",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=digest",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.7",
-    deps = [
-        "@crate_index__block-buffer-0.10.4//:block_buffer",
-        "@crate_index__const-oid-0.9.6//:const_oid",
-        "@crate_index__crypto-common-0.1.6//:crypto_common",
-        "@crate_index__subtle-2.5.0//:subtle",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.directories-5.0.1.bazel b/third_party/rust/crates/BUILD.directories-5.0.1.bazel
deleted file mode 100644
index 94a84fe10e9f5..0000000000000
--- a/third_party/rust/crates/BUILD.directories-5.0.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "directories",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=directories",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "5.0.1",
-    deps = [
-        "@crate_index__dirs-sys-0.4.1//:dirs_sys",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.dirs-sys-0.4.1.bazel b/third_party/rust/crates/BUILD.dirs-sys-0.4.1.bazel
deleted file mode 100644
index 1d22455baa0c1..0000000000000
--- a/third_party/rust/crates/BUILD.dirs-sys-0.4.1.bazel
+++ /dev/null
@@ -1,153 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "dirs_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=dirs-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.1",
-    deps = [
-        "@crate_index__option-ext-0.2.0//:option_ext",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.ecdsa-0.16.9.bazel b/third_party/rust/crates/BUILD.ecdsa-0.16.9.bazel
deleted file mode 100644
index fa88cfe164d17..0000000000000
--- a/third_party/rust/crates/BUILD.ecdsa-0.16.9.bazel
+++ /dev/null
@@ -1,101 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "ecdsa",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "arithmetic",
-        "default",
-        "der",
-        "digest",
-        "hazmat",
-        "pem",
-        "pkcs8",
-        "rfc6979",
-        "sha2",
-        "signing",
-        "spki",
-        "std",
-        "verifying",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ecdsa",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.16.9",
-    deps = [
-        "@crate_index__der-0.7.8//:der",
-        "@crate_index__digest-0.10.7//:digest",
-        "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-        "@crate_index__rfc6979-0.4.0//:rfc6979",
-        "@crate_index__sha2-0.10.7//:sha2",
-        "@crate_index__signature-2.1.0//:signature",
-        "@crate_index__spki-0.7.2//:spki",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.elasticlunr-rs-3.0.2.bazel b/third_party/rust/crates/BUILD.elasticlunr-rs-3.0.2.bazel
deleted file mode 100644
index 0da5f61c88f16..0000000000000
--- a/third_party/rust/crates/BUILD.elasticlunr-rs-3.0.2.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "elasticlunr",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__serde_derive-1.0.189//:serde_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=elasticlunr-rs",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.0.2",
-    deps = [
-        "@crate_index__regex-1.9.4//:regex",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__serde_json-1.0.107//:serde_json",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.elf-0.7.2.bazel b/third_party/rust/crates/BUILD.elf-0.7.2.bazel
deleted file mode 100644
index 87eb695dcdee5..0000000000000
--- a/third_party/rust/crates/BUILD.elf-0.7.2.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "elf",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-        "to_str",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=elf",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.2",
-)
diff --git a/third_party/rust/crates/BUILD.elliptic-curve-0.13.8.bazel b/third_party/rust/crates/BUILD.elliptic-curve-0.13.8.bazel
deleted file mode 100644
index 6bea6541465d3..0000000000000
--- a/third_party/rust/crates/BUILD.elliptic-curve-0.13.8.bazel
+++ /dev/null
@@ -1,105 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "elliptic_curve",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "arithmetic",
-        "default",
-        "digest",
-        "ecdh",
-        "ff",
-        "group",
-        "hazmat",
-        "pem",
-        "pkcs8",
-        "sec1",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=elliptic-curve",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.8",
-    deps = [
-        "@crate_index__base16ct-0.2.0//:base16ct",
-        "@crate_index__crypto-bigint-0.5.2//:crypto_bigint",
-        "@crate_index__digest-0.10.7//:digest",
-        "@crate_index__ff-0.13.0//:ff",
-        "@crate_index__generic-array-0.14.7//:generic_array",
-        "@crate_index__group-0.13.0//:group",
-        "@crate_index__hkdf-0.12.3//:hkdf",
-        "@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468",
-        "@crate_index__pkcs8-0.10.2//:pkcs8",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-        "@crate_index__sec1-0.7.3//:sec1",
-        "@crate_index__subtle-2.5.0//:subtle",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.encode_unicode-0.3.6.bazel b/third_party/rust/crates/BUILD.encode_unicode-0.3.6.bazel
deleted file mode 100644
index 1c4125bb799dd..0000000000000
--- a/third_party/rust/crates/BUILD.encode_unicode-0.3.6.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "encode_unicode",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=encode_unicode",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.6",
-)
diff --git a/third_party/rust/crates/BUILD.env_logger-0.10.0.bazel b/third_party/rust/crates/BUILD.env_logger-0.10.0.bazel
deleted file mode 100644
index ab079a54d5eb7..0000000000000
--- a/third_party/rust/crates/BUILD.env_logger-0.10.0.bazel
+++ /dev/null
@@ -1,90 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "env_logger",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "auto-color",
-        "color",
-        "default",
-        "humantime",
-        "regex",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=env_logger",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0",
-    deps = [
-        "@crate_index__humantime-2.1.0//:humantime",
-        "@crate_index__is-terminal-0.4.9//:is_terminal",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__regex-1.9.4//:regex",
-        "@crate_index__termcolor-1.2.0//:termcolor",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.equivalent-1.0.1.bazel b/third_party/rust/crates/BUILD.equivalent-1.0.1.bazel
deleted file mode 100644
index 22d081b4a5eb9..0000000000000
--- a/third_party/rust/crates/BUILD.equivalent-1.0.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "equivalent",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=equivalent",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.1",
-)
diff --git a/third_party/rust/crates/BUILD.erased-serde-0.3.31.bazel b/third_party/rust/crates/BUILD.erased-serde-0.3.31.bazel
deleted file mode 100644
index 06be47a0a3470..0000000000000
--- a/third_party/rust/crates/BUILD.erased-serde-0.3.31.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "erased_serde",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=erased-serde",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.31",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.errno-0.3.5.bazel b/third_party/rust/crates/BUILD.errno-0.3.5.bazel
deleted file mode 100644
index 306a0ce2cb4b8..0000000000000
--- a/third_party/rust/crates/BUILD.errno-0.3.5.bazel
+++ /dev/null
@@ -1,154 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "errno",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=errno",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.5",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(target_os = "wasi")
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.fastrand-2.0.0.bazel b/third_party/rust/crates/BUILD.fastrand-2.0.0.bazel
deleted file mode 100644
index c2cdd61e7e695..0000000000000
--- a/third_party/rust/crates/BUILD.fastrand-2.0.0.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "fastrand",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=fastrand",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.0",
-)
diff --git a/third_party/rust/crates/BUILD.ff-0.13.0.bazel b/third_party/rust/crates/BUILD.ff-0.13.0.bazel
deleted file mode 100644
index 5ae698d94a8c3..0000000000000
--- a/third_party/rust/crates/BUILD.ff-0.13.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "ff",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ff",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.0",
-    deps = [
-        "@crate_index__rand_core-0.6.4//:rand_core",
-        "@crate_index__subtle-2.5.0//:subtle",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.filetime-0.2.22.bazel b/third_party/rust/crates/BUILD.filetime-0.2.22.bazel
deleted file mode 100644
index 4d865c20577ce..0000000000000
--- a/third_party/rust/crates/BUILD.filetime-0.2.22.bazel
+++ /dev/null
@@ -1,153 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "filetime",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=filetime",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.22",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.flate2-1.0.28.bazel b/third_party/rust/crates/BUILD.flate2-1.0.28.bazel
deleted file mode 100644
index d7354b4820bcb..0000000000000
--- a/third_party/rust/crates/BUILD.flate2-1.0.28.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "flate2",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "any_impl",
-        "default",
-        "miniz_oxide",
-        "rust_backend",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=flate2",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.28",
-    deps = [
-        "@crate_index__crc32fast-1.3.2//:crc32fast",
-        "@crate_index__miniz_oxide-0.7.1//:miniz_oxide",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.fnv-1.0.7.bazel b/third_party/rust/crates/BUILD.fnv-1.0.7.bazel
deleted file mode 100644
index b76aeeedb807e..0000000000000
--- a/third_party/rust/crates/BUILD.fnv-1.0.7.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 / MIT
-# ])
-
-rust_library(
-    name = "fnv",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=fnv",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.7",
-)
diff --git a/third_party/rust/crates/BUILD.foreign-types-0.3.2.bazel b/third_party/rust/crates/BUILD.foreign-types-0.3.2.bazel
deleted file mode 100644
index 2063e35174915..0000000000000
--- a/third_party/rust/crates/BUILD.foreign-types-0.3.2.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "foreign_types",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=foreign-types",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.2",
-    deps = [
-        "@crate_index__foreign-types-shared-0.1.1//:foreign_types_shared",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.foreign-types-shared-0.1.1.bazel b/third_party/rust/crates/BUILD.foreign-types-shared-0.1.1.bazel
deleted file mode 100644
index 891e550e412b7..0000000000000
--- a/third_party/rust/crates/BUILD.foreign-types-shared-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "foreign_types_shared",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=foreign-types-shared",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.form_urlencoded-1.2.0.bazel b/third_party/rust/crates/BUILD.form_urlencoded-1.2.0.bazel
deleted file mode 100644
index 4b172145be345..0000000000000
--- a/third_party/rust/crates/BUILD.form_urlencoded-1.2.0.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "form_urlencoded",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=form_urlencoded",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.2.0",
-    deps = [
-        "@crate_index__percent-encoding-2.3.0//:percent_encoding",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ftdi-0.1.3.bazel b/third_party/rust/crates/BUILD.ftdi-0.1.3.bazel
deleted file mode 100644
index 1330104ebab2b..0000000000000
--- a/third_party/rust/crates/BUILD.ftdi-0.1.3.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "ftdi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ftdi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.3",
-    deps = [
-        "@crate_index__ftdi-mpsse-0.1.1//:ftdi_mpsse",
-        "@crate_index__libftdi1-sys-1.1.2//:libftdi1_sys",
-        "@crate_index__thiserror-1.0.49//:thiserror",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ftdi-mpsse-0.1.1.bazel b/third_party/rust/crates/BUILD.ftdi-mpsse-0.1.1.bazel
deleted file mode 100644
index 647ababbdfd81..0000000000000
--- a/third_party/rust/crates/BUILD.ftdi-mpsse-0.1.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "ftdi_mpsse",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ftdi-mpsse",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-    deps = [
-        "@crate_index__static_assertions-1.1.0//:static_assertions",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.fuchsia-cprng-0.1.1.bazel b/third_party/rust/crates/BUILD.fuchsia-cprng-0.1.1.bazel
deleted file mode 100644
index 194d38a16d366..0000000000000
--- a/third_party/rust/crates/BUILD.fuchsia-cprng-0.1.1.bazel
+++ /dev/null
@@ -1,72 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-rust_library(
-    name = "fuchsia_cprng",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=fuchsia-cprng",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.funty-2.0.0.bazel b/third_party/rust/crates/BUILD.funty-2.0.0.bazel
deleted file mode 100644
index 94dfe3186f972..0000000000000
--- a/third_party/rust/crates/BUILD.funty-2.0.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "funty",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=funty",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.0",
-)
diff --git a/third_party/rust/crates/BUILD.futf-0.1.5.bazel b/third_party/rust/crates/BUILD.futf-0.1.5.bazel
deleted file mode 100644
index 9e30237ee91b9..0000000000000
--- a/third_party/rust/crates/BUILD.futf-0.1.5.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT / Apache-2.0
-# ])
-
-rust_library(
-    name = "futf",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=futf",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.5",
-    deps = [
-        "@crate_index__mac-0.1.1//:mac",
-        "@crate_index__new_debug_unreachable-1.0.4//:debug_unreachable",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.gcc-0.3.55.bazel b/third_party/rust/crates/BUILD.gcc-0.3.55.bazel
deleted file mode 100644
index 782b269829fc2..0000000000000
--- a/third_party/rust/crates/BUILD.gcc-0.3.55.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "gcc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=gcc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.55",
-)
diff --git a/third_party/rust/crates/BUILD.generic-array-0.14.7.bazel b/third_party/rust/crates/BUILD.generic-array-0.14.7.bazel
deleted file mode 100644
index 04d8a8c14fb18..0000000000000
--- a/third_party/rust/crates/BUILD.generic-array-0.14.7.bazel
+++ /dev/null
@@ -1,130 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "generic_array",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "more_lengths",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=generic-array",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.14.7",
-    deps = [
-        "@crate_index__generic-array-0.14.7//:build_script_build",
-        "@crate_index__typenum-1.17.0//:typenum",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
-
-cargo_build_script(
-    name = "generic-array_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "more_lengths",
-        "zeroize",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=generic-array",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.14.7",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__version_check-0.9.4//:version_check",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "generic-array_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.getrandom-0.2.10.bazel b/third_party/rust/crates/BUILD.getrandom-0.2.10.bazel
deleted file mode 100644
index 62ccad8f2cdc2..0000000000000
--- a/third_party/rust/crates/BUILD.getrandom-0.2.10.bazel
+++ /dev/null
@@ -1,150 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "getrandom",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=getrandom",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.10",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__wasi-0.11.0-wasi-snapshot-preview1//:wasi",  # cfg(target_os = "wasi")
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.gimli-0.28.0.bazel b/third_party/rust/crates/BUILD.gimli-0.28.0.bazel
deleted file mode 100644
index 3e306c899d7e3..0000000000000
--- a/third_party/rust/crates/BUILD.gimli-0.28.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "gimli",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "read",
-        "read-core",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=gimli",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.28.0",
-)
diff --git a/third_party/rust/crates/BUILD.group-0.13.0.bazel b/third_party/rust/crates/BUILD.group-0.13.0.bazel
deleted file mode 100644
index f6d1c64f0d4fb..0000000000000
--- a/third_party/rust/crates/BUILD.group-0.13.0.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "group",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=group",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.0",
-    deps = [
-        "@crate_index__ff-0.13.0//:ff",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-        "@crate_index__subtle-2.5.0//:subtle",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.handlebars-4.3.7.bazel b/third_party/rust/crates/BUILD.handlebars-4.3.7.bazel
deleted file mode 100644
index cd5aafb95e166..0000000000000
--- a/third_party/rust/crates/BUILD.handlebars-4.3.7.bazel
+++ /dev/null
@@ -1,89 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "handlebars",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__pest_derive-2.7.3//:pest_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=handlebars",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.3.7",
-    deps = [
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__pest-2.7.3//:pest",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__serde_json-1.0.107//:serde_json",
-        "@crate_index__thiserror-1.0.49//:thiserror",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.hashbrown-0.12.3.bazel b/third_party/rust/crates/BUILD.hashbrown-0.12.3.bazel
deleted file mode 100644
index 9b551434b6e6b..0000000000000
--- a/third_party/rust/crates/BUILD.hashbrown-0.12.3.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hashbrown",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hashbrown",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.12.3",
-)
diff --git a/third_party/rust/crates/BUILD.hashbrown-0.14.0.bazel b/third_party/rust/crates/BUILD.hashbrown-0.14.0.bazel
deleted file mode 100644
index d87689c1b3961..0000000000000
--- a/third_party/rust/crates/BUILD.hashbrown-0.14.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hashbrown",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "raw",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hashbrown",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.14.0",
-)
diff --git a/third_party/rust/crates/BUILD.heck-0.4.1.bazel b/third_party/rust/crates/BUILD.heck-0.4.1.bazel
deleted file mode 100644
index 0b5efcabe6816..0000000000000
--- a/third_party/rust/crates/BUILD.heck-0.4.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "heck",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=heck",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.1",
-)
diff --git a/third_party/rust/crates/BUILD.hermit-abi-0.3.3.bazel b/third_party/rust/crates/BUILD.hermit-abi-0.3.3.bazel
deleted file mode 100644
index 6367fee30639b..0000000000000
--- a/third_party/rust/crates/BUILD.hermit-abi-0.3.3.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hermit_abi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hermit-abi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.3",
-)
diff --git a/third_party/rust/crates/BUILD.hex-0.4.3.bazel b/third_party/rust/crates/BUILD.hex-0.4.3.bazel
deleted file mode 100644
index 51e7d8995d417..0000000000000
--- a/third_party/rust/crates/BUILD.hex-0.4.3.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hex",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hex",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.3",
-)
diff --git a/third_party/rust/crates/BUILD.hkdf-0.12.3.bazel b/third_party/rust/crates/BUILD.hkdf-0.12.3.bazel
deleted file mode 100644
index 2b1632fe8b45c..0000000000000
--- a/third_party/rust/crates/BUILD.hkdf-0.12.3.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hkdf",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hkdf",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.12.3",
-    deps = [
-        "@crate_index__hmac-0.12.1//:hmac",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.hmac-0.12.1.bazel b/third_party/rust/crates/BUILD.hmac-0.12.1.bazel
deleted file mode 100644
index eed16749e62a1..0000000000000
--- a/third_party/rust/crates/BUILD.hmac-0.12.1.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "hmac",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "reset",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=hmac",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.12.1",
-    deps = [
-        "@crate_index__digest-0.10.7//:digest",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.html5ever-0.26.0.bazel b/third_party/rust/crates/BUILD.html5ever-0.26.0.bazel
deleted file mode 100644
index 1275a92c250ea..0000000000000
--- a/third_party/rust/crates/BUILD.html5ever-0.26.0.bazel
+++ /dev/null
@@ -1,125 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "html5ever",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=html5ever",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.26.0",
-    deps = [
-        "@crate_index__html5ever-0.26.0//:build_script_build",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__mac-0.1.1//:mac",
-        "@crate_index__markup5ever-0.11.0//:markup5ever",
-    ],
-)
-
-cargo_build_script(
-    name = "html5ever_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=html5ever",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.26.0",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-1.0.109//:syn",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "html5ever_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.humantime-2.1.0.bazel b/third_party/rust/crates/BUILD.humantime-2.1.0.bazel
deleted file mode 100644
index db8ecfe69c8df..0000000000000
--- a/third_party/rust/crates/BUILD.humantime-2.1.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "humantime",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=humantime",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.1.0",
-)
diff --git a/third_party/rust/crates/BUILD.humantime-serde-1.1.1.bazel b/third_party/rust/crates/BUILD.humantime-serde-1.1.1.bazel
deleted file mode 100644
index 025fad6cc29a0..0000000000000
--- a/third_party/rust/crates/BUILD.humantime-serde-1.1.1.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "humantime_serde",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=humantime-serde",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.1",
-    deps = [
-        "@crate_index__humantime-2.1.0//:humantime",
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.iana-time-zone-0.1.58.bazel b/third_party/rust/crates/BUILD.iana-time-zone-0.1.58.bazel
deleted file mode 100644
index d6d68f66f24e9..0000000000000
--- a/third_party/rust/crates/BUILD.iana-time-zone-0.1.58.bazel
+++ /dev/null
@@ -1,129 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "iana_time_zone",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "fallback",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=iana-time-zone",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.58",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__android_system_properties-0.1.5//:android_system_properties",  # cfg(target_os = "android")
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-core-0.51.1//:windows_core",  # cfg(target_os = "windows")
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__android_system_properties-0.1.5//:android_system_properties",  # cfg(target_os = "android")
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__android_system_properties-0.1.5//:android_system_properties",  # cfg(target_os = "android")
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-core-0.51.1//:windows_core",  # cfg(target_os = "windows")
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__js-sys-0.3.64//:js_sys",  # cfg(target_arch = "wasm32")
-            "@crate_index__wasm-bindgen-0.2.87//:wasm_bindgen",  # cfg(target_arch = "wasm32")
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__js-sys-0.3.64//:js_sys",  # cfg(target_arch = "wasm32")
-            "@crate_index__wasm-bindgen-0.2.87//:wasm_bindgen",  # cfg(target_arch = "wasm32")
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__core-foundation-sys-0.8.4//:core_foundation_sys",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__android_system_properties-0.1.5//:android_system_properties",  # cfg(target_os = "android")
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-core-0.51.1//:windows_core",  # cfg(target_os = "windows")
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.iana-time-zone-haiku-0.1.2.bazel b/third_party/rust/crates/BUILD.iana-time-zone-haiku-0.1.2.bazel
deleted file mode 100644
index 62c9a0e95a620..0000000000000
--- a/third_party/rust/crates/BUILD.iana-time-zone-haiku-0.1.2.bazel
+++ /dev/null
@@ -1,120 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "iana_time_zone_haiku",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=iana-time-zone-haiku",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.2",
-    deps = [
-        "@crate_index__iana-time-zone-haiku-0.1.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "iana-time-zone-haiku_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=iana-time-zone-haiku",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.2",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cc-1.0.83//:cc",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "iana-time-zone-haiku_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.ident_case-1.0.1.bazel b/third_party/rust/crates/BUILD.ident_case-1.0.1.bazel
deleted file mode 100644
index 06441dc596175..0000000000000
--- a/third_party/rust/crates/BUILD.ident_case-1.0.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "ident_case",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ident_case",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.1",
-)
diff --git a/third_party/rust/crates/BUILD.idna-0.4.0.bazel b/third_party/rust/crates/BUILD.idna-0.4.0.bazel
deleted file mode 100644
index c6de79e8d43ee..0000000000000
--- a/third_party/rust/crates/BUILD.idna-0.4.0.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "idna",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=idna",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__unicode-bidi-0.3.13//:unicode_bidi",
-        "@crate_index__unicode-normalization-0.1.22//:unicode_normalization",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.indexmap-1.9.3.bazel b/third_party/rust/crates/BUILD.indexmap-1.9.3.bazel
deleted file mode 100644
index f80aa28729f5f..0000000000000
--- a/third_party/rust/crates/BUILD.indexmap-1.9.3.bazel
+++ /dev/null
@@ -1,122 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "indexmap",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=indexmap",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.9.3",
-    deps = [
-        "@crate_index__hashbrown-0.12.3//:hashbrown",
-        "@crate_index__indexmap-1.9.3//:build_script_build",
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
-
-cargo_build_script(
-    name = "indexmap_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=indexmap",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.9.3",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "indexmap_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.indexmap-2.0.0.bazel b/third_party/rust/crates/BUILD.indexmap-2.0.0.bazel
deleted file mode 100644
index 2ecfb77673cf1..0000000000000
--- a/third_party/rust/crates/BUILD.indexmap-2.0.0.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "indexmap",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "serde",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=indexmap",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.0",
-    deps = [
-        "@crate_index__equivalent-1.0.1//:equivalent",
-        "@crate_index__hashbrown-0.14.0//:hashbrown",
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.indicatif-0.17.6.bazel b/third_party/rust/crates/BUILD.indicatif-0.17.6.bazel
deleted file mode 100644
index 1d3b8e2452b6d..0000000000000
--- a/third_party/rust/crates/BUILD.indicatif-0.17.6.bazel
+++ /dev/null
@@ -1,94 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "indicatif",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "unicode-width",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=indicatif",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.17.6",
-    deps = [
-        "@crate_index__console-0.15.7//:console",
-        "@crate_index__number_prefix-0.4.0//:number_prefix",
-        "@crate_index__portable-atomic-1.4.3//:portable_atomic",
-        "@crate_index__unicode-width-0.1.10//:unicode_width",
-    ] + select({
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__instant-0.1.12//:instant",  # cfg(target_arch = "wasm32")
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__instant-0.1.12//:instant",  # cfg(target_arch = "wasm32")
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.indoc-2.0.4.bazel b/third_party/rust/crates/BUILD.indoc-2.0.4.bazel
deleted file mode 100644
index b92e6f8616615..0000000000000
--- a/third_party/rust/crates/BUILD.indoc-2.0.4.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "indoc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=indoc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.4",
-)
diff --git a/third_party/rust/crates/BUILD.inout-0.1.3.bazel b/third_party/rust/crates/BUILD.inout-0.1.3.bazel
deleted file mode 100644
index 44c4ca70f8e5c..0000000000000
--- a/third_party/rust/crates/BUILD.inout-0.1.3.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "inout",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=inout",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.3",
-    deps = [
-        "@crate_index__generic-array-0.14.7//:generic_array",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.instant-0.1.12.bazel b/third_party/rust/crates/BUILD.instant-0.1.12.bazel
deleted file mode 100644
index 4de8e91cbdcab..0000000000000
--- a/third_party/rust/crates/BUILD.instant-0.1.12.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause
-# ])
-
-rust_library(
-    name = "instant",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=instant",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.12",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.inventory-0.3.12.bazel b/third_party/rust/crates/BUILD.inventory-0.3.12.bazel
deleted file mode 100644
index a8f255fff0d00..0000000000000
--- a/third_party/rust/crates/BUILD.inventory-0.3.12.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "inventory",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=inventory",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.12",
-)
diff --git a/third_party/rust/crates/BUILD.is-terminal-0.4.9.bazel b/third_party/rust/crates/BUILD.is-terminal-0.4.9.bazel
deleted file mode 100644
index 49db9099bfbc8..0000000000000
--- a/third_party/rust/crates/BUILD.is-terminal-0.4.9.bazel
+++ /dev/null
@@ -1,169 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "is_terminal",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=is-terminal",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.9",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(any(windows, target_os = "hermit", target_os = "unknown")))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.itoa-1.0.9.bazel b/third_party/rust/crates/BUILD.itoa-1.0.9.bazel
deleted file mode 100644
index 80ee2819b648c..0000000000000
--- a/third_party/rust/crates/BUILD.itoa-1.0.9.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "itoa",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=itoa",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.9",
-)
diff --git a/third_party/rust/crates/BUILD.js-sys-0.3.64.bazel b/third_party/rust/crates/BUILD.js-sys-0.3.64.bazel
deleted file mode 100644
index 9320da35cbeae..0000000000000
--- a/third_party/rust/crates/BUILD.js-sys-0.3.64.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "js_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=js-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.64",
-    deps = [
-        "@crate_index__wasm-bindgen-0.2.87//:wasm_bindgen",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.keccak-0.1.5.bazel b/third_party/rust/crates/BUILD.keccak-0.1.5.bazel
deleted file mode 100644
index a87c17db762d9..0000000000000
--- a/third_party/rust/crates/BUILD.keccak-0.1.5.bazel
+++ /dev/null
@@ -1,100 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "keccak",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=keccak",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.5",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(target_arch = "aarch64")
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.lazy_static-1.4.0.bazel b/third_party/rust/crates/BUILD.lazy_static-1.4.0.bazel
deleted file mode 100644
index f16ab5a389f01..0000000000000
--- a/third_party/rust/crates/BUILD.lazy_static-1.4.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "lazy_static",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "spin",
-        "spin_no_std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=lazy_static",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.4.0",
-    deps = [
-        "@crate_index__spin-0.5.2//:spin",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.libc-0.2.149.bazel b/third_party/rust/crates/BUILD.libc-0.2.149.bazel
deleted file mode 100644
index 36fbeb003432d..0000000000000
--- a/third_party/rust/crates/BUILD.libc-0.2.149.bazel
+++ /dev/null
@@ -1,127 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "libc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "extra_traits",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.149",
-    deps = [
-        "@crate_index__libc-0.2.149//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "extra_traits",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.149",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.libftdi1-sys-1.1.2.bazel b/third_party/rust/crates/BUILD.libftdi1-sys-1.1.2.bazel
deleted file mode 100644
index 371c3bb889b6c..0000000000000
--- a/third_party/rust/crates/BUILD.libftdi1-sys-1.1.2.bazel
+++ /dev/null
@@ -1,224 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "libftdi1_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libftdi1-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.2",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__libftdi1-sys-1.1.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libftdi1-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    links = "ftdi1",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libftdi1-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.1.2",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(all(windows, target_env = "msvc"))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(all(windows, target_env = "msvc"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(all(windows, target_env = "msvc"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__pkg-config-0.3.27//:pkg_config",  # cfg(not(all(windows, target_env = "msvc")))
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libftdi1-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.libloading-0.7.4.bazel b/third_party/rust/crates/BUILD.libloading-0.7.4.bazel
deleted file mode 100644
index b5a239367541b..0000000000000
--- a/third_party/rust/crates/BUILD.libloading-0.7.4.bazel
+++ /dev/null
@@ -1,151 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # ISC
-# ])
-
-rust_library(
-    name = "libloading",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libloading",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.4",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.libm-0.2.8.bazel b/third_party/rust/crates/BUILD.libm-0.2.8.bazel
deleted file mode 100644
index 4369cf3c794c8..0000000000000
--- a/third_party/rust/crates/BUILD.libm-0.2.8.bazel
+++ /dev/null
@@ -1,123 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "libm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.8",
-    deps = [
-        "@crate_index__libm-0.2.8//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.8",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.libudev-0.3.0.bazel b/third_party/rust/crates/BUILD.libudev-0.3.0.bazel
deleted file mode 100644
index 22b62db168e88..0000000000000
--- a/third_party/rust/crates/BUILD.libudev-0.3.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "libudev",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libudev",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.0",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__libudev-sys-0.1.4//:libudev_sys",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.libudev-sys-0.1.4.bazel b/third_party/rust/crates/BUILD.libudev-sys-0.1.4.bazel
deleted file mode 100644
index 8143cd44928df..0000000000000
--- a/third_party/rust/crates/BUILD.libudev-sys-0.1.4.bazel
+++ /dev/null
@@ -1,122 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "libudev_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libudev-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.4",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__libudev-sys-0.1.4//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libudev-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    links = "libudev",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libudev-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.4",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__pkg-config-0.3.27//:pkg_config",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libudev-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.libusb1-sys-0.6.4.bazel b/third_party/rust/crates/BUILD.libusb1-sys-0.6.4.bazel
deleted file mode 100644
index 6e0caff3cd69d..0000000000000
--- a/third_party/rust/crates/BUILD.libusb1-sys-0.6.4.bazel
+++ /dev/null
@@ -1,134 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "libusb1_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libusb1-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.4",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__libusb1-sys-0.6.4//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libusb1-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    links = "usb-1.0",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libusb1-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.6.4",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cc-1.0.83//:cc",
-        "@crate_index__pkg-config-0.3.27//:pkg_config",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(target_env = "msvc")
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(target_env = "msvc")
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__vcpkg-0.2.15//:vcpkg",  # cfg(target_env = "msvc")
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libusb1-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.linux-raw-sys-0.4.5.bazel b/third_party/rust/crates/BUILD.linux-raw-sys-0.4.5.bazel
deleted file mode 100644
index e876034f91a87..0000000000000
--- a/third_party/rust/crates/BUILD.linux-raw-sys-0.4.5.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 WITH LLVM-exception OR Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "linux_raw_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "errno",
-        "general",
-        "if_ether",
-        "ioctl",
-        "net",
-        "netlink",
-        "no_std",
-        "prctl",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=linux-raw-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.5",
-)
diff --git a/third_party/rust/crates/BUILD.lock_api-0.4.10.bazel b/third_party/rust/crates/BUILD.lock_api-0.4.10.bazel
deleted file mode 100644
index a539c915a4183..0000000000000
--- a/third_party/rust/crates/BUILD.lock_api-0.4.10.bazel
+++ /dev/null
@@ -1,129 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "lock_api",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "atomic_usize",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=lock_api",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.10",
-    deps = [
-        "@crate_index__lock_api-0.4.10//:build_script_build",
-        "@crate_index__scopeguard-1.2.0//:scopeguard",
-    ],
-)
-
-cargo_build_script(
-    name = "lock_api_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "atomic_usize",
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=lock_api",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.4.10",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "lock_api_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.log-0.4.20.bazel b/third_party/rust/crates/BUILD.log-0.4.20.bazel
deleted file mode 100644
index 35dbaa51b6fa8..0000000000000
--- a/third_party/rust/crates/BUILD.log-0.4.20.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "log",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=log",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.20",
-)
diff --git a/third_party/rust/crates/BUILD.mac-0.1.1.bazel b/third_party/rust/crates/BUILD.mac-0.1.1.bazel
deleted file mode 100644
index b1fef5137aeaf..0000000000000
--- a/third_party/rust/crates/BUILD.mac-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "mac",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mac",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.mach-0.1.2.bazel b/third_party/rust/crates/BUILD.mach-0.1.2.bazel
deleted file mode 100644
index 57a25ca14e4cd..0000000000000
--- a/third_party/rust/crates/BUILD.mach-0.1.2.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-2-Clause
-# ])
-
-rust_library(
-    name = "mach",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mach",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.2",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.mach2-0.4.1.bazel b/third_party/rust/crates/BUILD.mach2-0.4.1.bazel
deleted file mode 100644
index 9f34b8780d731..0000000000000
--- a/third_party/rust/crates/BUILD.mach2-0.4.1.bazel
+++ /dev/null
@@ -1,100 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-2-Clause OR MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "mach2",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mach2",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.1",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "macos", target_os = "ios"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.maplit-1.0.2.bazel b/third_party/rust/crates/BUILD.maplit-1.0.2.bazel
deleted file mode 100644
index 15936fd29e632..0000000000000
--- a/third_party/rust/crates/BUILD.maplit-1.0.2.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "maplit",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=maplit",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.2",
-)
diff --git a/third_party/rust/crates/BUILD.markup5ever-0.11.0.bazel b/third_party/rust/crates/BUILD.markup5ever-0.11.0.bazel
deleted file mode 100644
index f3c12016353dd..0000000000000
--- a/third_party/rust/crates/BUILD.markup5ever-0.11.0.bazel
+++ /dev/null
@@ -1,125 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "markup5ever",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=markup5ever",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.11.0",
-    deps = [
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__markup5ever-0.11.0//:build_script_build",
-        "@crate_index__phf-0.10.1//:phf",
-        "@crate_index__string_cache-0.8.7//:string_cache",
-        "@crate_index__tendril-0.4.3//:tendril",
-    ],
-)
-
-cargo_build_script(
-    name = "markup5ever_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=markup5ever",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.11.0",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__phf_codegen-0.10.0//:phf_codegen",
-        "@crate_index__string_cache_codegen-0.5.2//:string_cache_codegen",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "markup5ever_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.mdbook-0.4.34.bazel b/third_party/rust/crates/BUILD.mdbook-0.4.34.bazel
deleted file mode 100644
index c75d722428178..0000000000000
--- a/third_party/rust/crates/BUILD.mdbook-0.4.34.bazel
+++ /dev/null
@@ -1,192 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load(
-    "@rules_rust//rust:defs.bzl",
-    "rust_binary",
-    "rust_library",
-)
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MPL-2.0
-# ])
-
-rust_library(
-    name = "mdbook",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "search",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mdbook",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.34",
-    deps = [
-        "@crate_index__ammonia-3.3.0//:ammonia",
-        "@crate_index__anyhow-1.0.75//:anyhow",
-        "@crate_index__chrono-0.4.31//:chrono",
-        "@crate_index__clap-4.4.7//:clap",
-        "@crate_index__clap_complete-4.4.0//:clap_complete",
-        "@crate_index__elasticlunr-rs-3.0.2//:elasticlunr",
-        "@crate_index__env_logger-0.10.0//:env_logger",
-        "@crate_index__handlebars-4.3.7//:handlebars",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__opener-0.6.1//:opener",
-        "@crate_index__pulldown-cmark-0.9.3//:pulldown_cmark",
-        "@crate_index__regex-1.9.4//:regex",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__serde_json-1.0.107//:serde_json",
-        "@crate_index__shlex-1.1.0//:shlex",
-        "@crate_index__tempfile-3.8.0//:tempfile",
-        "@crate_index__toml-0.5.11//:toml",
-        "@crate_index__topological-sort-0.2.2//:topological_sort",
-    ],
-)
-
-rust_binary(
-    name = "mdbook__bin",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "search",
-    ],
-    crate_root = "src/main.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mdbook",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.34",
-    deps = [
-        ":mdbook",
-        "@crate_index__ammonia-3.3.0//:ammonia",
-        "@crate_index__anyhow-1.0.75//:anyhow",
-        "@crate_index__chrono-0.4.31//:chrono",
-        "@crate_index__clap-4.4.7//:clap",
-        "@crate_index__clap_complete-4.4.0//:clap_complete",
-        "@crate_index__elasticlunr-rs-3.0.2//:elasticlunr",
-        "@crate_index__env_logger-0.10.0//:env_logger",
-        "@crate_index__handlebars-4.3.7//:handlebars",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__opener-0.6.1//:opener",
-        "@crate_index__pulldown-cmark-0.9.3//:pulldown_cmark",
-        "@crate_index__regex-1.9.4//:regex",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__serde_json-1.0.107//:serde_json",
-        "@crate_index__shlex-1.1.0//:shlex",
-        "@crate_index__tempfile-3.8.0//:tempfile",
-        "@crate_index__toml-0.5.11//:toml",
-        "@crate_index__topological-sort-0.2.2//:topological_sort",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.memchr-2.6.4.bazel b/third_party/rust/crates/BUILD.memchr-2.6.4.bazel
deleted file mode 100644
index 9733716aaca21..0000000000000
--- a/third_party/rust/crates/BUILD.memchr-2.6.4.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Unlicense OR MIT
-# ])
-
-rust_library(
-    name = "memchr",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=memchr",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.6.4",
-)
diff --git a/third_party/rust/crates/BUILD.memoffset-0.9.0.bazel b/third_party/rust/crates/BUILD.memoffset-0.9.0.bazel
deleted file mode 100644
index 6a77b862438d3..0000000000000
--- a/third_party/rust/crates/BUILD.memoffset-0.9.0.bazel
+++ /dev/null
@@ -1,126 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "memoffset",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=memoffset",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.0",
-    deps = [
-        "@crate_index__memoffset-0.9.0//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "memoffset_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=memoffset",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.9.0",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "memoffset_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.miniz_oxide-0.7.1.bazel b/third_party/rust/crates/BUILD.miniz_oxide-0.7.1.bazel
deleted file mode 100644
index a7233f4138d9f..0000000000000
--- a/third_party/rust/crates/BUILD.miniz_oxide-0.7.1.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Zlib OR Apache-2.0
-# ])
-
-rust_library(
-    name = "miniz_oxide",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "with-alloc",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=miniz_oxide",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.1",
-    deps = [
-        "@crate_index__adler-1.0.2//:adler",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.mio-0.8.8.bazel b/third_party/rust/crates/BUILD.mio-0.8.8.bazel
deleted file mode 100644
index 09224682d49e0..0000000000000
--- a/third_party/rust/crates/BUILD.mio-0.8.8.bazel
+++ /dev/null
@@ -1,164 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "mio",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "log",
-        "net",
-        "os-ext",
-        "os-poll",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mio",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.8",
-    deps = [
-        "@crate_index__log-0.4.20//:log",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(target_os = "wasi")
-            "@crate_index__wasi-0.11.0-wasi-snapshot-preview1//:wasi",  # cfg(target_os = "wasi")
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.mio-signals-0.2.0.bazel b/third_party/rust/crates/BUILD.mio-signals-0.2.0.bazel
deleted file mode 100644
index 4cdec49693d6a..0000000000000
--- a/third_party/rust/crates/BUILD.mio-signals-0.2.0.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "mio_signals",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=mio-signals",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.0",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__mio-0.8.8//:mio",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.new_debug_unreachable-1.0.4.bazel b/third_party/rust/crates/BUILD.new_debug_unreachable-1.0.4.bazel
deleted file mode 100644
index 981f4a8d5a6d8..0000000000000
--- a/third_party/rust/crates/BUILD.new_debug_unreachable-1.0.4.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "debug_unreachable",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=new_debug_unreachable",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.4",
-)
diff --git a/third_party/rust/crates/BUILD.nix-0.26.4.bazel b/third_party/rust/crates/BUILD.nix-0.26.4.bazel
deleted file mode 100644
index eff33b2e46eeb..0000000000000
--- a/third_party/rust/crates/BUILD.nix-0.26.4.bazel
+++ /dev/null
@@ -1,89 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "nix",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "fs",
-        "ioctl",
-        "poll",
-        "process",
-        "signal",
-        "term",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=nix",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.26.4",
-    deps = [
-        "@crate_index__bitflags-1.3.2//:bitflags",
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__libc-0.2.149//:libc",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.normpath-1.1.1.bazel b/third_party/rust/crates/BUILD.normpath-1.1.1.bazel
deleted file mode 100644
index 131acd4ad79ab..0000000000000
--- a/third_party/rust/crates/BUILD.normpath-1.1.1.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "normpath",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=normpath",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.1",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.num-bigint-0.4.4.bazel b/third_party/rust/crates/BUILD.num-bigint-0.4.4.bazel
deleted file mode 100644
index 1043340ecfd66..0000000000000
--- a/third_party/rust/crates/BUILD.num-bigint-0.4.4.bazel
+++ /dev/null
@@ -1,122 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "num_bigint",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-bigint",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.4",
-    deps = [
-        "@crate_index__num-bigint-0.4.4//:build_script_build",
-        "@crate_index__num-integer-0.1.45//:num_integer",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-    ],
-)
-
-cargo_build_script(
-    name = "num-bigint_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-bigint",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.4.4",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "num-bigint_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.num-bigint-dig-0.8.4.bazel b/third_party/rust/crates/BUILD.num-bigint-dig-0.8.4.bazel
deleted file mode 100644
index bae210f6b7ae7..0000000000000
--- a/third_party/rust/crates/BUILD.num-bigint-dig-0.8.4.bazel
+++ /dev/null
@@ -1,147 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "num_bigint_dig",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "i128",
-        "prime",
-        "rand",
-        "serde",
-        "std",
-        "u64_digit",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-bigint-dig",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.4",
-    deps = [
-        "@crate_index__byteorder-1.5.0//:byteorder",
-        "@crate_index__lazy_static-1.4.0//:lazy_static",
-        "@crate_index__libm-0.2.8//:libm",
-        "@crate_index__num-bigint-dig-0.8.4//:build_script_build",
-        "@crate_index__num-integer-0.1.45//:num_integer",
-        "@crate_index__num-iter-0.1.43//:num_iter",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-        "@crate_index__rand-0.8.5//:rand",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__smallvec-1.11.0//:smallvec",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
-
-cargo_build_script(
-    name = "num-bigint-dig_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "i128",
-        "prime",
-        "rand",
-        "serde",
-        "std",
-        "u64_digit",
-        "zeroize",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-bigint-dig",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.8.4",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "num-bigint-dig_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.num-integer-0.1.45.bazel b/third_party/rust/crates/BUILD.num-integer-0.1.45.bazel
deleted file mode 100644
index 6e94214f99745..0000000000000
--- a/third_party/rust/crates/BUILD.num-integer-0.1.45.bazel
+++ /dev/null
@@ -1,129 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "num_integer",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "i128",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-integer",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.45",
-    deps = [
-        "@crate_index__num-integer-0.1.45//:build_script_build",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-    ],
-)
-
-cargo_build_script(
-    name = "num-integer_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "i128",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-integer",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.45",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "num-integer_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.num-iter-0.1.43.bazel b/third_party/rust/crates/BUILD.num-iter-0.1.43.bazel
deleted file mode 100644
index 905911fe4393c..0000000000000
--- a/third_party/rust/crates/BUILD.num-iter-0.1.43.bazel
+++ /dev/null
@@ -1,122 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "num_iter",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-iter",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.43",
-    deps = [
-        "@crate_index__num-integer-0.1.45//:num_integer",
-        "@crate_index__num-iter-0.1.43//:build_script_build",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-    ],
-)
-
-cargo_build_script(
-    name = "num-iter_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-iter",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.1.43",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "num-iter_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.num-traits-0.2.17.bazel b/third_party/rust/crates/BUILD.num-traits-0.2.17.bazel
deleted file mode 100644
index 4a4ae8a61c96e..0000000000000
--- a/third_party/rust/crates/BUILD.num-traits-0.2.17.bazel
+++ /dev/null
@@ -1,133 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "num_traits",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "i128",
-        "libm",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-traits",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.17",
-    deps = [
-        "@crate_index__libm-0.2.8//:libm",
-        "@crate_index__num-traits-0.2.17//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "num-traits_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "i128",
-        "libm",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num-traits",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.17",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__autocfg-1.1.0//:autocfg",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "num-traits_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.num_enum-0.7.0.bazel b/third_party/rust/crates/BUILD.num_enum-0.7.0.bazel
deleted file mode 100644
index a957d17f927d9..0000000000000
--- a/third_party/rust/crates/BUILD.num_enum-0.7.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause OR MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "num_enum",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__num_enum_derive-0.7.0//:num_enum_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num_enum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.0",
-)
diff --git a/third_party/rust/crates/BUILD.num_enum_derive-0.7.0.bazel b/third_party/rust/crates/BUILD.num_enum_derive-0.7.0.bazel
deleted file mode 100644
index ba06d5167dc22..0000000000000
--- a/third_party/rust/crates/BUILD.num_enum_derive-0.7.0.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause OR MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "num_enum_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "proc-macro-crate",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=num_enum_derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.0",
-    deps = [
-        "@crate_index__proc-macro-crate-1.3.1//:proc_macro_crate",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.number_prefix-0.4.0.bazel b/third_party/rust/crates/BUILD.number_prefix-0.4.0.bazel
deleted file mode 100644
index b1fc1fc3207bd..0000000000000
--- a/third_party/rust/crates/BUILD.number_prefix-0.4.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "number_prefix",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=number_prefix",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-)
diff --git a/third_party/rust/crates/BUILD.object-0.32.1.bazel b/third_party/rust/crates/BUILD.object-0.32.1.bazel
deleted file mode 100644
index 48b1c75a13b99..0000000000000
--- a/third_party/rust/crates/BUILD.object-0.32.1.bazel
+++ /dev/null
@@ -1,95 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "object",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "archive",
-        "coff",
-        "compression",
-        "default",
-        "elf",
-        "macho",
-        "pe",
-        "read",
-        "read_core",
-        "std",
-        "unaligned",
-        "xcoff",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=object",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.32.1",
-    deps = [
-        "@crate_index__flate2-1.0.28//:flate2",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__ruzstd-0.4.0//:ruzstd",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.once_cell-1.18.0.bazel b/third_party/rust/crates/BUILD.once_cell-1.18.0.bazel
deleted file mode 100644
index b87b6f48c1446..0000000000000
--- a/third_party/rust/crates/BUILD.once_cell-1.18.0.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "once_cell",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "race",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=once_cell",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.18.0",
-)
diff --git a/third_party/rust/crates/BUILD.opener-0.6.1.bazel b/third_party/rust/crates/BUILD.opener-0.6.1.bazel
deleted file mode 100644
index ba12c283d9524..0000000000000
--- a/third_party/rust/crates/BUILD.opener-0.6.1.bazel
+++ /dev/null
@@ -1,112 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "opener",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=opener",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.1",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__normpath-1.1.1//:normpath",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__normpath-1.1.1//:normpath",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__normpath-1.1.1//:normpath",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__bstr-1.6.2//:bstr",  # cfg(target_os = "linux")
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.openssl-0.10.64.bazel b/third_party/rust/crates/BUILD.openssl-0.10.64.bazel
deleted file mode 100644
index 924728042866a..0000000000000
--- a/third_party/rust/crates/BUILD.openssl-0.10.64.bazel
+++ /dev/null
@@ -1,138 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0
-# ])
-
-rust_library(
-    name = "openssl",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__openssl-sys-0.9.102//:openssl_sys": "ffi",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__openssl-macros-0.1.1//:openssl_macros",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=openssl",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.64",
-    deps = [
-        "@crate_index__bitflags-2.4.0//:bitflags",
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__foreign-types-0.3.2//:foreign_types",
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__openssl-0.10.64//:build_script_build",
-        "@crate_index__openssl-sys-0.9.102//:openssl_sys",
-    ],
-)
-
-cargo_build_script(
-    name = "openssl_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    link_deps = [
-        "@crate_index__openssl-sys-0.9.102//:openssl_sys",
-    ],
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=openssl",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.10.64",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "openssl_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.openssl-macros-0.1.1.bazel b/third_party/rust/crates/BUILD.openssl-macros-0.1.1.bazel
deleted file mode 100644
index 6fa5e194248a9..0000000000000
--- a/third_party/rust/crates/BUILD.openssl-macros-0.1.1.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "openssl_macros",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=openssl-macros",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.openssl-sys-0.9.102.bazel b/third_party/rust/crates/BUILD.openssl-sys-0.9.102.bazel
deleted file mode 100644
index 7d562be091385..0000000000000
--- a/third_party/rust/crates/BUILD.openssl-sys-0.9.102.bazel
+++ /dev/null
@@ -1,129 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "openssl_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=openssl-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.102",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__openssl-sys-0.9.102//:build_script_main",
-    ],
-)
-
-cargo_build_script(
-    name = "openssl-sys_build_script",
-    srcs = glob(["**/*.rs"]),
-    build_script_env = {
-        "OPENSSL_STATIC": "1",
-        "PKG_CONFIG_PATH": "$(OPENSSL_PKG_CONFIG_PATH)",
-    },
-    crate_name = "build_script_main",
-    crate_root = "build/main.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    links = "openssl",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=openssl-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    toolchains = ["@//third_party/rust:openssl_pkg_config_path"],
-    version = "0.9.102",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cc-1.0.83//:cc",
-        "@crate_index__pkg-config-0.3.27//:pkg_config",
-        "@crate_index__vcpkg-0.2.15//:vcpkg",
-    ],
-)
-
-alias(
-    name = "build_script_main",
-    actual = "openssl-sys_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.option-ext-0.2.0.bazel b/third_party/rust/crates/BUILD.option-ext-0.2.0.bazel
deleted file mode 100644
index cd490dadb14ef..0000000000000
--- a/third_party/rust/crates/BUILD.option-ext-0.2.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MPL-2.0
-# ])
-
-rust_library(
-    name = "option_ext",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=option-ext",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.0",
-)
diff --git a/third_party/rust/crates/BUILD.p256-0.13.2.bazel b/third_party/rust/crates/BUILD.p256-0.13.2.bazel
deleted file mode 100644
index 618d15e6e8673..0000000000000
--- a/third_party/rust/crates/BUILD.p256-0.13.2.bazel
+++ /dev/null
@@ -1,98 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "p256",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__ecdsa-0.16.9//:ecdsa": "ecdsa_core",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "arithmetic",
-        "default",
-        "digest",
-        "ecdsa",
-        "ecdsa-core",
-        "pem",
-        "pkcs8",
-        "sha2",
-        "sha256",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=p256",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.2",
-    deps = [
-        "@crate_index__ecdsa-0.16.9//:ecdsa",
-        "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-        "@crate_index__primeorder-0.13.2//:primeorder",
-        "@crate_index__sha2-0.10.7//:sha2",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.p384-0.13.0.bazel b/third_party/rust/crates/BUILD.p384-0.13.0.bazel
deleted file mode 100644
index 6b7a072c2b05c..0000000000000
--- a/third_party/rust/crates/BUILD.p384-0.13.0.bazel
+++ /dev/null
@@ -1,99 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "p384",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__ecdsa-0.16.9//:ecdsa": "ecdsa_core",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "arithmetic",
-        "default",
-        "digest",
-        "ecdh",
-        "ecdsa",
-        "ecdsa-core",
-        "pem",
-        "pkcs8",
-        "sha2",
-        "sha384",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=p384",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.0",
-    deps = [
-        "@crate_index__ecdsa-0.16.9//:ecdsa",
-        "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-        "@crate_index__primeorder-0.13.2//:primeorder",
-        "@crate_index__sha2-0.10.7//:sha2",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.parking_lot-0.12.1.bazel b/third_party/rust/crates/BUILD.parking_lot-0.12.1.bazel
deleted file mode 100644
index 17f34ef467d6f..0000000000000
--- a/third_party/rust/crates/BUILD.parking_lot-0.12.1.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "parking_lot",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=parking_lot",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.12.1",
-    deps = [
-        "@crate_index__lock_api-0.4.10//:lock_api",
-        "@crate_index__parking_lot_core-0.9.8//:parking_lot_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.parking_lot_core-0.9.8.bazel b/third_party/rust/crates/BUILD.parking_lot_core-0.9.8.bazel
deleted file mode 100644
index 9c676c45b7d20..0000000000000
--- a/third_party/rust/crates/BUILD.parking_lot_core-0.9.8.bazel
+++ /dev/null
@@ -1,193 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "parking_lot_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=parking_lot_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.8",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__parking_lot_core-0.9.8//:build_script_build",
-        "@crate_index__smallvec-1.11.0//:smallvec",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.48.5//:windows_targets",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-cargo_build_script(
-    name = "parking_lot_core_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=parking_lot_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.9.8",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "parking_lot_core_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.paste-1.0.14.bazel b/third_party/rust/crates/BUILD.paste-1.0.14.bazel
deleted file mode 100644
index f35039fb57595..0000000000000
--- a/third_party/rust/crates/BUILD.paste-1.0.14.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "paste",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=paste",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.14",
-    deps = [
-        "@crate_index__paste-1.0.14//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "paste_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=paste",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.14",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "paste_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.pem-rfc7468-0.7.0.bazel b/third_party/rust/crates/BUILD.pem-rfc7468-0.7.0.bazel
deleted file mode 100644
index db6af911a2a8f..0000000000000
--- a/third_party/rust/crates/BUILD.pem-rfc7468-0.7.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "pem_rfc7468",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pem-rfc7468",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.0",
-    deps = [
-        "@crate_index__base64ct-1.6.0//:base64ct",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.percent-encoding-2.3.0.bazel b/third_party/rust/crates/BUILD.percent-encoding-2.3.0.bazel
deleted file mode 100644
index ef97452893f9b..0000000000000
--- a/third_party/rust/crates/BUILD.percent-encoding-2.3.0.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "percent_encoding",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=percent-encoding",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.3.0",
-)
diff --git a/third_party/rust/crates/BUILD.pest-2.7.3.bazel b/third_party/rust/crates/BUILD.pest-2.7.3.bazel
deleted file mode 100644
index 6f2548f7a7267..0000000000000
--- a/third_party/rust/crates/BUILD.pest-2.7.3.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "pest",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "memchr",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pest",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.7.3",
-    deps = [
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__thiserror-1.0.49//:thiserror",
-        "@crate_index__ucd-trie-0.1.6//:ucd_trie",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pest_derive-2.7.3.bazel b/third_party/rust/crates/BUILD.pest_derive-2.7.3.bazel
deleted file mode 100644
index ff7d23f5dc4c9..0000000000000
--- a/third_party/rust/crates/BUILD.pest_derive-2.7.3.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "pest_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pest_derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.7.3",
-    deps = [
-        "@crate_index__pest-2.7.3//:pest",
-        "@crate_index__pest_generator-2.7.3//:pest_generator",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pest_generator-2.7.3.bazel b/third_party/rust/crates/BUILD.pest_generator-2.7.3.bazel
deleted file mode 100644
index 7d976c2d1fe5b..0000000000000
--- a/third_party/rust/crates/BUILD.pest_generator-2.7.3.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "pest_generator",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pest_generator",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.7.3",
-    deps = [
-        "@crate_index__pest-2.7.3//:pest",
-        "@crate_index__pest_meta-2.7.3//:pest_meta",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pest_meta-2.7.3.bazel b/third_party/rust/crates/BUILD.pest_meta-2.7.3.bazel
deleted file mode 100644
index 7541c4795092b..0000000000000
--- a/third_party/rust/crates/BUILD.pest_meta-2.7.3.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "pest_meta",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pest_meta",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.7.3",
-    deps = [
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__pest-2.7.3//:pest",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.phf-0.10.1.bazel b/third_party/rust/crates/BUILD.phf-0.10.1.bazel
deleted file mode 100644
index b63eb04928108..0000000000000
--- a/third_party/rust/crates/BUILD.phf-0.10.1.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "phf",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=phf",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.1",
-    deps = [
-        "@crate_index__phf_shared-0.10.0//:phf_shared",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.phf_codegen-0.10.0.bazel b/third_party/rust/crates/BUILD.phf_codegen-0.10.0.bazel
deleted file mode 100644
index 9a3d667f72cb0..0000000000000
--- a/third_party/rust/crates/BUILD.phf_codegen-0.10.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "phf_codegen",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=phf_codegen",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0",
-    deps = [
-        "@crate_index__phf_generator-0.10.0//:phf_generator",
-        "@crate_index__phf_shared-0.10.0//:phf_shared",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.phf_generator-0.10.0.bazel b/third_party/rust/crates/BUILD.phf_generator-0.10.0.bazel
deleted file mode 100644
index 0512806bbfd4f..0000000000000
--- a/third_party/rust/crates/BUILD.phf_generator-0.10.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "phf_generator",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=phf_generator",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0",
-    deps = [
-        "@crate_index__phf_shared-0.10.0//:phf_shared",
-        "@crate_index__rand-0.8.5//:rand",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.phf_shared-0.10.0.bazel b/third_party/rust/crates/BUILD.phf_shared-0.10.0.bazel
deleted file mode 100644
index 2556abe076bf6..0000000000000
--- a/third_party/rust/crates/BUILD.phf_shared-0.10.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "phf_shared",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=phf_shared",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0",
-    deps = [
-        "@crate_index__siphasher-0.3.11//:siphasher",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pkcs1-0.7.5.bazel b/third_party/rust/crates/BUILD.pkcs1-0.7.5.bazel
deleted file mode 100644
index b55978813dc2c..0000000000000
--- a/third_party/rust/crates/BUILD.pkcs1-0.7.5.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "pkcs1",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "pem",
-        "pkcs8",
-        "std",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pkcs1",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.5",
-    deps = [
-        "@crate_index__der-0.7.8//:der",
-        "@crate_index__pkcs8-0.10.2//:pkcs8",
-        "@crate_index__spki-0.7.2//:spki",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pkcs8-0.10.2.bazel b/third_party/rust/crates/BUILD.pkcs8-0.10.2.bazel
deleted file mode 100644
index 54f5816d003e6..0000000000000
--- a/third_party/rust/crates/BUILD.pkcs8-0.10.2.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "pkcs8",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "pem",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pkcs8",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.2",
-    deps = [
-        "@crate_index__der-0.7.8//:der",
-        "@crate_index__spki-0.7.2//:spki",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.pkg-config-0.3.27.bazel b/third_party/rust/crates/BUILD.pkg-config-0.3.27.bazel
deleted file mode 100644
index 1a4ac54a73040..0000000000000
--- a/third_party/rust/crates/BUILD.pkg-config-0.3.27.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "pkg_config",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pkg-config",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.27",
-)
diff --git a/third_party/rust/crates/BUILD.portable-atomic-1.4.3.bazel b/third_party/rust/crates/BUILD.portable-atomic-1.4.3.bazel
deleted file mode 100644
index ad16561f51991..0000000000000
--- a/third_party/rust/crates/BUILD.portable-atomic-1.4.3.bazel
+++ /dev/null
@@ -1,125 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "portable_atomic",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "fallback",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=portable-atomic",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.4.3",
-    deps = [
-        "@crate_index__portable-atomic-1.4.3//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "portable-atomic_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "fallback",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=portable-atomic",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.4.3",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "portable-atomic_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.ppv-lite86-0.2.17.bazel b/third_party/rust/crates/BUILD.ppv-lite86-0.2.17.bazel
deleted file mode 100644
index 6440009e5e2b9..0000000000000
--- a/third_party/rust/crates/BUILD.ppv-lite86-0.2.17.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "ppv_lite86",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "simd",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ppv-lite86",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.17",
-)
diff --git a/third_party/rust/crates/BUILD.precomputed-hash-0.1.1.bazel b/third_party/rust/crates/BUILD.precomputed-hash-0.1.1.bazel
deleted file mode 100644
index 896c014b8dc10..0000000000000
--- a/third_party/rust/crates/BUILD.precomputed-hash-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "precomputed_hash",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=precomputed-hash",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.primeorder-0.13.2.bazel b/third_party/rust/crates/BUILD.primeorder-0.13.2.bazel
deleted file mode 100644
index 8999cbdde907f..0000000000000
--- a/third_party/rust/crates/BUILD.primeorder-0.13.2.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "primeorder",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=primeorder",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.13.2",
-    deps = [
-        "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.proc-macro-crate-1.3.1.bazel b/third_party/rust/crates/BUILD.proc-macro-crate-1.3.1.bazel
deleted file mode 100644
index 4c5499f025a7e..0000000000000
--- a/third_party/rust/crates/BUILD.proc-macro-crate-1.3.1.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "proc_macro_crate",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=proc-macro-crate",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.3.1",
-    deps = [
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__toml_edit-0.19.14//:toml_edit",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.proc-macro2-1.0.69.bazel b/third_party/rust/crates/BUILD.proc-macro2-1.0.69.bazel
deleted file mode 100644
index 3f0f082a3b16d..0000000000000
--- a/third_party/rust/crates/BUILD.proc-macro2-1.0.69.bazel
+++ /dev/null
@@ -1,126 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "proc_macro2",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "proc-macro",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=proc-macro2",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.69",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:build_script_build",
-        "@crate_index__unicode-ident-1.0.12//:unicode_ident",
-    ],
-)
-
-cargo_build_script(
-    name = "proc-macro2_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "proc-macro",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=proc-macro2",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.69",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "proc-macro2_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.pulldown-cmark-0.9.3.bazel b/third_party/rust/crates/BUILD.pulldown-cmark-0.9.3.bazel
deleted file mode 100644
index 79f39f4b01e04..0000000000000
--- a/third_party/rust/crates/BUILD.pulldown-cmark-0.9.3.bazel
+++ /dev/null
@@ -1,120 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "pulldown_cmark",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pulldown-cmark",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.3",
-    deps = [
-        "@crate_index__bitflags-1.3.2//:bitflags",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__pulldown-cmark-0.9.3//:build_script_build",
-        "@crate_index__unicase-2.7.0//:unicase",
-    ],
-)
-
-cargo_build_script(
-    name = "pulldown-cmark_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=pulldown-cmark",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.9.3",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "pulldown-cmark_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.quote-1.0.33.bazel b/third_party/rust/crates/BUILD.quote-1.0.33.bazel
deleted file mode 100644
index 120bdd7e069e6..0000000000000
--- a/third_party/rust/crates/BUILD.quote-1.0.33.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "quote",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "proc-macro",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=quote",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.33",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.radium-0.7.0.bazel b/third_party/rust/crates/BUILD.radium-0.7.0.bazel
deleted file mode 100644
index d50a97d1ed926..0000000000000
--- a/third_party/rust/crates/BUILD.radium-0.7.0.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "radium",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=radium",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.0",
-    deps = [
-        "@crate_index__radium-0.7.0//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "radium_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=radium",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.7.0",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "radium_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.rand-0.3.23.bazel b/third_party/rust/crates/BUILD.rand-0.3.23.bazel
deleted file mode 100644
index 9576a24780866..0000000000000
--- a/third_party/rust/crates/BUILD.rand-0.3.23.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rand",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.23",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__rand-0.4.6//:rand",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rand-0.4.6.bazel b/third_party/rust/crates/BUILD.rand-0.4.6.bazel
deleted file mode 100644
index f4712d996ff2e..0000000000000
--- a/third_party/rust/crates/BUILD.rand-0.4.6.bazel
+++ /dev/null
@@ -1,158 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rand",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "libc",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.6",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__fuchsia-cprng-0.1.1//:fuchsia_cprng",  # cfg(target_os = "fuchsia")
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__fuchsia-cprng-0.1.1//:fuchsia_cprng",  # cfg(target_os = "fuchsia")
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.rand-0.8.5.bazel b/third_party/rust/crates/BUILD.rand-0.8.5.bazel
deleted file mode 100644
index cef0cae087731..0000000000000
--- a/third_party/rust/crates/BUILD.rand-0.8.5.bazel
+++ /dev/null
@@ -1,155 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "rand",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "getrandom",
-        "libc",
-        "rand_chacha",
-        "small_rng",
-        "std",
-        "std_rng",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.5",
-    deps = [
-        "@crate_index__rand_chacha-0.3.1//:rand_chacha",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.rand_chacha-0.3.1.bazel b/third_party/rust/crates/BUILD.rand_chacha-0.3.1.bazel
deleted file mode 100644
index 68fd1284e0a7e..0000000000000
--- a/third_party/rust/crates/BUILD.rand_chacha-0.3.1.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "rand_chacha",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand_chacha",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.1",
-    deps = [
-        "@crate_index__ppv-lite86-0.2.17//:ppv_lite86",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rand_core-0.3.1.bazel b/third_party/rust/crates/BUILD.rand_core-0.3.1.bazel
deleted file mode 100644
index 635834b51108d..0000000000000
--- a/third_party/rust/crates/BUILD.rand_core-0.3.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rand_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.1",
-    deps = [
-        "@crate_index__rand_core-0.4.2//:rand_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rand_core-0.4.2.bazel b/third_party/rust/crates/BUILD.rand_core-0.4.2.bazel
deleted file mode 100644
index f108876f49cab..0000000000000
--- a/third_party/rust/crates/BUILD.rand_core-0.4.2.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rand_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.2",
-)
diff --git a/third_party/rust/crates/BUILD.rand_core-0.6.4.bazel b/third_party/rust/crates/BUILD.rand_core-0.6.4.bazel
deleted file mode 100644
index 40d021a1028aa..0000000000000
--- a/third_party/rust/crates/BUILD.rand_core-0.6.4.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "rand_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "getrandom",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rand_core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.4",
-    deps = [
-        "@crate_index__getrandom-0.2.10//:getrandom",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rdrand-0.4.0.bazel b/third_party/rust/crates/BUILD.rdrand-0.4.0.bazel
deleted file mode 100644
index 0e459887b0a0b..0000000000000
--- a/third_party/rust/crates/BUILD.rdrand-0.4.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # ISC
-# ])
-
-rust_library(
-    name = "rdrand",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rdrand",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__rand_core-0.3.1//:rand_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.redox_syscall-0.2.16.bazel b/third_party/rust/crates/BUILD.redox_syscall-0.2.16.bazel
deleted file mode 100644
index 275276d17da60..0000000000000
--- a/third_party/rust/crates/BUILD.redox_syscall-0.2.16.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "syscall",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=redox_syscall",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.16",
-    deps = [
-        "@crate_index__bitflags-1.3.2//:bitflags",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.redox_syscall-0.3.5.bazel b/third_party/rust/crates/BUILD.redox_syscall-0.3.5.bazel
deleted file mode 100644
index 1e0fc67d3b631..0000000000000
--- a/third_party/rust/crates/BUILD.redox_syscall-0.3.5.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "syscall",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=redox_syscall",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.5",
-    deps = [
-        "@crate_index__bitflags-1.3.2//:bitflags",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.redox_users-0.4.3.bazel b/third_party/rust/crates/BUILD.redox_users-0.4.3.bazel
deleted file mode 100644
index cff4132d166a7..0000000000000
--- a/third_party/rust/crates/BUILD.redox_users-0.4.3.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "redox_users",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=redox_users",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.3",
-    deps = [
-        "@crate_index__getrandom-0.2.10//:getrandom",
-        "@crate_index__redox_syscall-0.2.16//:syscall",
-        "@crate_index__thiserror-1.0.49//:thiserror",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.regex-1.9.4.bazel b/third_party/rust/crates/BUILD.regex-1.9.4.bazel
deleted file mode 100644
index 0a5a72f496b34..0000000000000
--- a/third_party/rust/crates/BUILD.regex-1.9.4.bazel
+++ /dev/null
@@ -1,101 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "regex",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "perf",
-        "perf-backtrack",
-        "perf-cache",
-        "perf-dfa",
-        "perf-inline",
-        "perf-literal",
-        "perf-onepass",
-        "std",
-        "unicode",
-        "unicode-age",
-        "unicode-bool",
-        "unicode-case",
-        "unicode-gencat",
-        "unicode-perl",
-        "unicode-script",
-        "unicode-segment",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=regex",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.9.4",
-    deps = [
-        "@crate_index__aho-corasick-1.0.5//:aho_corasick",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__regex-automata-0.3.7//:regex_automata",
-        "@crate_index__regex-syntax-0.7.5//:regex_syntax",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.regex-automata-0.3.7.bazel b/third_party/rust/crates/BUILD.regex-automata-0.3.7.bazel
deleted file mode 100644
index a9ba54212bc08..0000000000000
--- a/third_party/rust/crates/BUILD.regex-automata-0.3.7.bazel
+++ /dev/null
@@ -1,106 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "regex_automata",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "dfa-onepass",
-        "dfa-search",
-        "hybrid",
-        "meta",
-        "nfa-backtrack",
-        "nfa-pikevm",
-        "nfa-thompson",
-        "perf-inline",
-        "perf-literal",
-        "perf-literal-multisubstring",
-        "perf-literal-substring",
-        "std",
-        "syntax",
-        "unicode",
-        "unicode-age",
-        "unicode-bool",
-        "unicode-case",
-        "unicode-gencat",
-        "unicode-perl",
-        "unicode-script",
-        "unicode-segment",
-        "unicode-word-boundary",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=regex-automata",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.7",
-    deps = [
-        "@crate_index__aho-corasick-1.0.5//:aho_corasick",
-        "@crate_index__memchr-2.6.4//:memchr",
-        "@crate_index__regex-syntax-0.7.5//:regex_syntax",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.regex-syntax-0.7.5.bazel b/third_party/rust/crates/BUILD.regex-syntax-0.7.5.bazel
deleted file mode 100644
index a2af23adcd79d..0000000000000
--- a/third_party/rust/crates/BUILD.regex-syntax-0.7.5.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "regex_syntax",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-        "unicode",
-        "unicode-age",
-        "unicode-bool",
-        "unicode-case",
-        "unicode-gencat",
-        "unicode-perl",
-        "unicode-script",
-        "unicode-segment",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=regex-syntax",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.5",
-)
diff --git a/third_party/rust/crates/BUILD.rfc6979-0.4.0.bazel b/third_party/rust/crates/BUILD.rfc6979-0.4.0.bazel
deleted file mode 100644
index e96d704261f14..0000000000000
--- a/third_party/rust/crates/BUILD.rfc6979-0.4.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "rfc6979",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rfc6979",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__hmac-0.12.1//:hmac",
-        "@crate_index__subtle-2.5.0//:subtle",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ring-0.16.20.bazel b/third_party/rust/crates/BUILD.ring-0.16.20.bazel
deleted file mode 100644
index e3387976b063a..0000000000000
--- a/third_party/rust/crates/BUILD.ring-0.16.20.bazel
+++ /dev/null
@@ -1,225 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-rust_library(
-    name = "ring",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "dev_urandom_fallback",
-        "once_cell",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ring",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.16.20",
-    deps = [
-        "@crate_index__ring-0.16.20//:build_script_build",
-        "@crate_index__untrusted-0.7.1//:untrusted",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(target_os = "windows")
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(target_os = "windows")
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "dragonfly", target_os = "freebsd", target_os = "illumos", target_os = "netbsd", target_os = "openbsd", target_os = "solaris"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__web-sys-0.3.64//:web_sys",  # cfg(all(target_arch = "wasm32", target_vendor = "unknown", target_os = "unknown", target_env = ""))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(target_os = "windows")
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "dragonfly", target_os = "freebsd", target_os = "illumos", target_os = "netbsd", target_os = "openbsd", target_os = "solaris"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__once_cell-1.18.0//:once_cell",  # cfg(any(target_os = "android", target_os = "linux"))
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__spin-0.5.2//:spin",  # cfg(any(target_arch = "x86", target_arch = "x86_64", all(any(target_arch = "aarch64", target_arch = "arm"), any(target_os = "android", target_os = "fuchsia", target_os = "linux"))))
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-cargo_build_script(
-    name = "ring_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "alloc",
-        "default",
-        "dev_urandom_fallback",
-        "once_cell",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    links = "ring-asm",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ring",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.16.20",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__cc-1.0.83//:cc",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "ring_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.rsa-0.9.2.bazel b/third_party/rust/crates/BUILD.rsa-0.9.2.bazel
deleted file mode 100644
index b4f3579ae9ce4..0000000000000
--- a/third_party/rust/crates/BUILD.rsa-0.9.2.bazel
+++ /dev/null
@@ -1,101 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "rsa",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig": "num_bigint",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "pem",
-        "std",
-        "u64_digit",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rsa",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.2",
-    deps = [
-        "@crate_index__byteorder-1.5.0//:byteorder",
-        "@crate_index__const-oid-0.9.6//:const_oid",
-        "@crate_index__digest-0.10.7//:digest",
-        "@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig",
-        "@crate_index__num-integer-0.1.45//:num_integer",
-        "@crate_index__num-iter-0.1.43//:num_iter",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-        "@crate_index__pkcs1-0.7.5//:pkcs1",
-        "@crate_index__pkcs8-0.10.2//:pkcs8",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-        "@crate_index__signature-2.1.0//:signature",
-        "@crate_index__spki-0.7.2//:spki",
-        "@crate_index__subtle-2.5.0//:subtle",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rsa-der-0.3.0.bazel b/third_party/rust/crates/BUILD.rsa-der-0.3.0.bazel
deleted file mode 100644
index d8f7a4d6e6ce5..0000000000000
--- a/third_party/rust/crates/BUILD.rsa-der-0.3.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rsa_der",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rsa-der",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.0",
-    deps = [
-        "@crate_index__simple_asn1-0.6.2//:simple_asn1",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.rusb-0.9.3.bazel b/third_party/rust/crates/BUILD.rusb-0.9.3.bazel
deleted file mode 100644
index f83b7111f48fe..0000000000000
--- a/third_party/rust/crates/BUILD.rusb-0.9.3.bazel
+++ /dev/null
@@ -1,122 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "rusb",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rusb",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.3",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__libusb1-sys-0.6.4//:libusb1_sys",
-        "@crate_index__rusb-0.9.3//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "rusb_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    link_deps = [
-        "@crate_index__libusb1-sys-0.6.4//:libusb1_sys",
-    ],
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rusb",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.9.3",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "rusb_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.rust-crypto-0.2.36.bazel b/third_party/rust/crates/BUILD.rust-crypto-0.2.36.bazel
deleted file mode 100644
index dd0d8e87123ea..0000000000000
--- a/third_party/rust/crates/BUILD.rust-crypto-0.2.36.bazel
+++ /dev/null
@@ -1,124 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "crypto",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rust-crypto",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.36",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-        "@crate_index__rand-0.3.23//:rand",
-        "@crate_index__rust-crypto-0.2.36//:build_script_build",
-        "@crate_index__rustc-serialize-0.3.25//:rustc_serialize",
-        "@crate_index__time-0.1.45//:time",
-    ],
-)
-
-cargo_build_script(
-    name = "rust-crypto_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rust-crypto",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.36",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__gcc-0.3.55//:gcc",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "rust-crypto_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.rustc-demangle-0.1.23.bazel b/third_party/rust/crates/BUILD.rustc-demangle-0.1.23.bazel
deleted file mode 100644
index 55b800c5b093e..0000000000000
--- a/third_party/rust/crates/BUILD.rustc-demangle-0.1.23.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rustc_demangle",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustc-demangle",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.23",
-)
diff --git a/third_party/rust/crates/BUILD.rustc-serialize-0.3.25.bazel b/third_party/rust/crates/BUILD.rustc-serialize-0.3.25.bazel
deleted file mode 100644
index ea135663514b0..0000000000000
--- a/third_party/rust/crates/BUILD.rustc-serialize-0.3.25.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "rustc_serialize",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustc-serialize",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.25",
-)
diff --git a/third_party/rust/crates/BUILD.rustix-0.38.10.bazel b/third_party/rust/crates/BUILD.rustix-0.38.10.bazel
deleted file mode 100644
index 071656a325c27..0000000000000
--- a/third_party/rust/crates/BUILD.rustix-0.38.10.bazel
+++ /dev/null
@@ -1,350 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 WITH LLVM-exception OR Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "rustix",
-    srcs = glob(["**/*.rs"]),
-    aliases = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:aarch64-apple-ios": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:aarch64-fuchsia": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:aarch64-linux-android": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(windows)
-        },
-        "@rules_rust//rust/platform:armv7-linux-androideabi": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:i686-apple-darwin": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:i686-linux-android": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(windows)
-        },
-        "@rules_rust//rust/platform:i686-unknown-freebsd": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:wasm32-wasi": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-apple-darwin": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-apple-ios": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-fuchsia": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-linux-android": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(windows)
-        },
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "@rules_rust//rust/platform:x86_64-unknown-none": {
-            "@crate_index__errno-0.3.5//:errno": "libc_errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        },
-        "//conditions:default": {},
-    }),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "event",
-        "fs",
-        "net",
-        "process",
-        "std",
-        "stdio",
-        "termios",
-        "use-libc-auxv",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustix",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.38.10",
-    deps = [
-        "@crate_index__bitflags-2.4.0//:bitflags",
-        "@crate_index__rustix-0.38.10//:build_script_build",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(windows)
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"))))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"))))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"))))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(windows)
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"))))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(any(target_os = "android", target_os = "linux"), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(windows)
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__linux-raw-sys-0.4.5//:linux_raw_sys",  # cfg(all(not(rustix_use_libc), not(miri), target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64"))))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__errno-0.3.5//:errno",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-            "@crate_index__libc-0.2.149//:libc",  # cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = "linux", target_endian = "little", any(target_arch = "arm", all(target_arch = "aarch64", target_pointer_width = "64"), target_arch = "riscv64", all(rustix_use_experimental_asm, target_arch = "powerpc64"), all(rustix_use_experimental_asm, target_arch = "mips"), all(rustix_use_experimental_asm, target_arch = "mips32r6"), all(rustix_use_experimental_asm, target_arch = "mips64"), all(rustix_use_experimental_asm, target_arch = "mips64r6"), target_arch = "x86", all(target_arch = "x86_64", target_pointer_width = "64")))))))
-        ],
-        "//conditions:default": [],
-    }),
-)
-
-cargo_build_script(
-    name = "rustix_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "alloc",
-        "default",
-        "event",
-        "fs",
-        "net",
-        "process",
-        "std",
-        "stdio",
-        "termios",
-        "use-libc-auxv",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustix",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.38.10",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "rustix_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.rustversion-1.0.14.bazel b/third_party/rust/crates/BUILD.rustversion-1.0.14.bazel
deleted file mode 100644
index 705ffabb2cb42..0000000000000
--- a/third_party/rust/crates/BUILD.rustversion-1.0.14.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "rustversion",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustversion",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.14",
-    deps = [
-        "@crate_index__rustversion-1.0.14//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "rustversion_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build/build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=rustversion",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.14",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "rustversion_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.ruzstd-0.4.0.bazel b/third_party/rust/crates/BUILD.ruzstd-0.4.0.bazel
deleted file mode 100644
index d94cd76213448..0000000000000
--- a/third_party/rust/crates/BUILD.ruzstd-0.4.0.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "ruzstd",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__thiserror-core-1.0.38//:thiserror_core": "thiserror",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ruzstd",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__byteorder-1.5.0//:byteorder",
-        "@crate_index__thiserror-core-1.0.38//:thiserror_core",
-        "@crate_index__twox-hash-1.6.3//:twox_hash",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ryu-1.0.15.bazel b/third_party/rust/crates/BUILD.ryu-1.0.15.bazel
deleted file mode 100644
index a639582e07f07..0000000000000
--- a/third_party/rust/crates/BUILD.ryu-1.0.15.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR BSL-1.0
-# ])
-
-rust_library(
-    name = "ryu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ryu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.15",
-)
diff --git a/third_party/rust/crates/BUILD.scopeguard-1.2.0.bazel b/third_party/rust/crates/BUILD.scopeguard-1.2.0.bazel
deleted file mode 100644
index 8997208a00a46..0000000000000
--- a/third_party/rust/crates/BUILD.scopeguard-1.2.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "scopeguard",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "use_std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=scopeguard",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.2.0",
-)
diff --git a/third_party/rust/crates/BUILD.sec1-0.7.3.bazel b/third_party/rust/crates/BUILD.sec1-0.7.3.bazel
deleted file mode 100644
index 215c6938bdcff..0000000000000
--- a/third_party/rust/crates/BUILD.sec1-0.7.3.bazel
+++ /dev/null
@@ -1,95 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "sec1",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "der",
-        "pem",
-        "pkcs8",
-        "point",
-        "std",
-        "subtle",
-        "zeroize",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=sec1",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.3",
-    deps = [
-        "@crate_index__base16ct-0.2.0//:base16ct",
-        "@crate_index__der-0.7.8//:der",
-        "@crate_index__generic-array-0.14.7//:generic_array",
-        "@crate_index__pkcs8-0.10.2//:pkcs8",
-        "@crate_index__subtle-2.5.0//:subtle",
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.secrecy-0.8.0.bazel b/third_party/rust/crates/BUILD.secrecy-0.8.0.bazel
deleted file mode 100644
index 2f9028bfeb6c4..0000000000000
--- a/third_party/rust/crates/BUILD.secrecy-0.8.0.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "secrecy",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=secrecy",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.0",
-    deps = [
-        "@crate_index__zeroize-1.7.0//:zeroize",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.serde-1.0.189.bazel b/third_party/rust/crates/BUILD.serde-1.0.189.bazel
deleted file mode 100644
index f145580b8973d..0000000000000
--- a/third_party/rust/crates/BUILD.serde-1.0.189.bazel
+++ /dev/null
@@ -1,134 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "serde",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "derive",
-        "serde_derive",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__serde_derive-1.0.189//:serde_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.189",
-    deps = [
-        "@crate_index__serde-1.0.189//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "serde_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "alloc",
-        "default",
-        "derive",
-        "serde_derive",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.189",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "serde_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.serde_bytes-0.11.12.bazel b/third_party/rust/crates/BUILD.serde_bytes-0.11.12.bazel
deleted file mode 100644
index 0c5d6dd483bb8..0000000000000
--- a/third_party/rust/crates/BUILD.serde_bytes-0.11.12.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "serde_bytes",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_bytes",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.11.12",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.serde_derive-1.0.189.bazel b/third_party/rust/crates/BUILD.serde_derive-1.0.189.bazel
deleted file mode 100644
index 43e251884ec66..0000000000000
--- a/third_party/rust/crates/BUILD.serde_derive-1.0.189.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "serde_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.189",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.serde_json-1.0.107.bazel b/third_party/rust/crates/BUILD.serde_json-1.0.107.bazel
deleted file mode 100644
index a0eaa406c6ff2..0000000000000
--- a/third_party/rust/crates/BUILD.serde_json-1.0.107.bazel
+++ /dev/null
@@ -1,128 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "serde_json",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_json",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.107",
-    deps = [
-        "@crate_index__itoa-1.0.9//:itoa",
-        "@crate_index__ryu-1.0.15//:ryu",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__serde_json-1.0.107//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "serde_json_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_json",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.107",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "serde_json_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.serde_with-3.4.0.bazel b/third_party/rust/crates/BUILD.serde_with-3.4.0.bazel
deleted file mode 100644
index 6a9a30e594f20..0000000000000
--- a/third_party/rust/crates/BUILD.serde_with-3.4.0.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "serde_with",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "macros",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__serde_with_macros-3.4.0//:serde_with_macros",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_with",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.4.0",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.serde_with_macros-3.4.0.bazel b/third_party/rust/crates/BUILD.serde_with_macros-3.4.0.bazel
deleted file mode 100644
index 21b043e291121..0000000000000
--- a/third_party/rust/crates/BUILD.serde_with_macros-3.4.0.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "serde_with_macros",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serde_with_macros",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.4.0",
-    deps = [
-        "@crate_index__darling-0.20.3//:darling",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.serialport-4.2.2.bazel b/third_party/rust/crates/BUILD.serialport-4.2.2.bazel
deleted file mode 100644
index 74d7cb3ec69fc..0000000000000
--- a/third_party/rust/crates/BUILD.serialport-4.2.2.bazel
+++ /dev/null
@@ -1,229 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MPL-2.0
-# ])
-
-rust_library(
-    name = "serialport",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "libudev",
-        "serde",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=serialport",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "4.2.2",
-    deps = [
-        "@crate_index__scopeguard-1.2.0//:scopeguard",
-        "@crate_index__serde-1.0.189//:serde",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__regex-1.9.4//:regex",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__regex-1.9.4//:regex",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__CoreFoundation-sys-0.1.4//:CoreFoundation_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__IOKit-sys-0.1.5//:IOKit_sys",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__mach2-0.4.1//:mach2",  # cfg(any(target_os = "ios", target_os = "macos"))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__regex-1.9.4//:regex",  # cfg(windows)
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__bitflags-1.3.2//:bitflags",  # cfg(unix)
-            "@crate_index__cfg-if-1.0.0//:cfg_if",  # cfg(unix)
-            "@crate_index__libudev-0.3.0//:libudev",  # cfg(all(target_os = "linux", not(target_env = "musl")))
-            "@crate_index__nix-0.26.4//:nix",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.sha2-0.10.7.bazel b/third_party/rust/crates/BUILD.sha2-0.10.7.bazel
deleted file mode 100644
index fd8d1c8e6f562..0000000000000
--- a/third_party/rust/crates/BUILD.sha2-0.10.7.bazel
+++ /dev/null
@@ -1,147 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "sha2",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "oid",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=sha2",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.7",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__digest-0.10.7//:digest",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.sha3-0.10.8.bazel b/third_party/rust/crates/BUILD.sha3-0.10.8.bazel
deleted file mode 100644
index 1e02680edbcdb..0000000000000
--- a/third_party/rust/crates/BUILD.sha3-0.10.8.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "sha3",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "oid",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=sha3",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.8",
-    deps = [
-        "@crate_index__digest-0.10.7//:digest",
-        "@crate_index__keccak-0.1.5//:keccak",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.shellwords-1.1.0.bazel b/third_party/rust/crates/BUILD.shellwords-1.1.0.bazel
deleted file mode 100644
index 606be7ac70424..0000000000000
--- a/third_party/rust/crates/BUILD.shellwords-1.1.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "shellwords",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=shellwords",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.0",
-    deps = [
-        "@crate_index__lazy_static-1.4.0//:lazy_static",
-        "@crate_index__regex-1.9.4//:regex",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.shlex-1.1.0.bazel b/third_party/rust/crates/BUILD.shlex-1.1.0.bazel
deleted file mode 100644
index d33afdc19bcec..0000000000000
--- a/third_party/rust/crates/BUILD.shlex-1.1.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "shlex",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=shlex",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.0",
-)
diff --git a/third_party/rust/crates/BUILD.signature-2.1.0.bazel b/third_party/rust/crates/BUILD.signature-2.1.0.bazel
deleted file mode 100644
index dc0346c7a8b21..0000000000000
--- a/third_party/rust/crates/BUILD.signature-2.1.0.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "signature",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "digest",
-        "rand_core",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=signature",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.1.0",
-    deps = [
-        "@crate_index__digest-0.10.7//:digest",
-        "@crate_index__rand_core-0.6.4//:rand_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.simple_asn1-0.6.2.bazel b/third_party/rust/crates/BUILD.simple_asn1-0.6.2.bazel
deleted file mode 100644
index 72f3073c0e113..0000000000000
--- a/third_party/rust/crates/BUILD.simple_asn1-0.6.2.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # ISC
-# ])
-
-rust_library(
-    name = "simple_asn1",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=simple_asn1",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.2",
-    deps = [
-        "@crate_index__num-bigint-0.4.4//:num_bigint",
-        "@crate_index__num-traits-0.2.17//:num_traits",
-        "@crate_index__thiserror-1.0.49//:thiserror",
-        "@crate_index__time-0.3.28//:time",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.siphasher-0.3.11.bazel b/third_party/rust/crates/BUILD.siphasher-0.3.11.bazel
deleted file mode 100644
index c01c798b00e15..0000000000000
--- a/third_party/rust/crates/BUILD.siphasher-0.3.11.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "siphasher",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=siphasher",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.11",
-)
diff --git a/third_party/rust/crates/BUILD.smallvec-1.11.0.bazel b/third_party/rust/crates/BUILD.smallvec-1.11.0.bazel
deleted file mode 100644
index aa9e5b0c29259..0000000000000
--- a/third_party/rust/crates/BUILD.smallvec-1.11.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "smallvec",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "write",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=smallvec",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.11.0",
-)
diff --git a/third_party/rust/crates/BUILD.spin-0.5.2.bazel b/third_party/rust/crates/BUILD.spin-0.5.2.bazel
deleted file mode 100644
index 322e401d0cbed..0000000000000
--- a/third_party/rust/crates/BUILD.spin-0.5.2.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "spin",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=spin",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.2",
-)
diff --git a/third_party/rust/crates/BUILD.spki-0.7.2.bazel b/third_party/rust/crates/BUILD.spki-0.7.2.bazel
deleted file mode 100644
index c06af26f03514..0000000000000
--- a/third_party/rust/crates/BUILD.spki-0.7.2.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "spki",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "pem",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=spki",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.2",
-    deps = [
-        "@crate_index__der-0.7.8//:der",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.static_assertions-1.1.0.bazel b/third_party/rust/crates/BUILD.static_assertions-1.1.0.bazel
deleted file mode 100644
index af45ebd6ee75b..0000000000000
--- a/third_party/rust/crates/BUILD.static_assertions-1.1.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "static_assertions",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=static_assertions",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.1.0",
-)
diff --git a/third_party/rust/crates/BUILD.string_cache-0.8.7.bazel b/third_party/rust/crates/BUILD.string_cache-0.8.7.bazel
deleted file mode 100644
index 2c1012353867f..0000000000000
--- a/third_party/rust/crates/BUILD.string_cache-0.8.7.bazel
+++ /dev/null
@@ -1,89 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "string_cache",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "serde",
-        "serde_support",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=string_cache",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.8.7",
-    deps = [
-        "@crate_index__new_debug_unreachable-1.0.4//:debug_unreachable",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__parking_lot-0.12.1//:parking_lot",
-        "@crate_index__phf_shared-0.10.0//:phf_shared",
-        "@crate_index__precomputed-hash-0.1.1//:precomputed_hash",
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.string_cache_codegen-0.5.2.bazel b/third_party/rust/crates/BUILD.string_cache_codegen-0.5.2.bazel
deleted file mode 100644
index 3dd6cc2ec2709..0000000000000
--- a/third_party/rust/crates/BUILD.string_cache_codegen-0.5.2.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "string_cache_codegen",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=string_cache_codegen",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.2",
-    deps = [
-        "@crate_index__phf_generator-0.10.0//:phf_generator",
-        "@crate_index__phf_shared-0.10.0//:phf_shared",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.strsim-0.10.0.bazel b/third_party/rust/crates/BUILD.strsim-0.10.0.bazel
deleted file mode 100644
index c937f4773f3e1..0000000000000
--- a/third_party/rust/crates/BUILD.strsim-0.10.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "strsim",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=strsim",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0",
-)
diff --git a/third_party/rust/crates/BUILD.strum-0.25.0.bazel b/third_party/rust/crates/BUILD.strum-0.25.0.bazel
deleted file mode 100644
index bca0f5bf202d9..0000000000000
--- a/third_party/rust/crates/BUILD.strum-0.25.0.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "strum",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "derive",
-        "std",
-        "strum_macros",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__strum_macros-0.25.2//:strum_macros",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=strum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.25.0",
-)
diff --git a/third_party/rust/crates/BUILD.strum_macros-0.25.2.bazel b/third_party/rust/crates/BUILD.strum_macros-0.25.2.bazel
deleted file mode 100644
index 6b5281e37e1ec..0000000000000
--- a/third_party/rust/crates/BUILD.strum_macros-0.25.2.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_proc_macro(
-    name = "strum_macros",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__rustversion-1.0.14//:rustversion",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=strum_macros",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.25.2",
-    deps = [
-        "@crate_index__heck-0.4.1//:heck",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.subtle-2.5.0.bazel b/third_party/rust/crates/BUILD.subtle-2.5.0.bazel
deleted file mode 100644
index 3fa6eb011b766..0000000000000
--- a/third_party/rust/crates/BUILD.subtle-2.5.0.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause
-# ])
-
-rust_library(
-    name = "subtle",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "i128",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=subtle",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.5.0",
-)
diff --git a/third_party/rust/crates/BUILD.syn-1.0.109.bazel b/third_party/rust/crates/BUILD.syn-1.0.109.bazel
deleted file mode 100644
index cd3c2059a063c..0000000000000
--- a/third_party/rust/crates/BUILD.syn-1.0.109.bazel
+++ /dev/null
@@ -1,144 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "syn",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "clone-impls",
-        "default",
-        "derive",
-        "extra-traits",
-        "fold",
-        "full",
-        "parsing",
-        "printing",
-        "proc-macro",
-        "quote",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=syn",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.109",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-1.0.109//:build_script_build",
-        "@crate_index__unicode-ident-1.0.12//:unicode_ident",
-    ],
-)
-
-cargo_build_script(
-    name = "syn_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "clone-impls",
-        "default",
-        "derive",
-        "extra-traits",
-        "fold",
-        "full",
-        "parsing",
-        "printing",
-        "proc-macro",
-        "quote",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=syn",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.109",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "syn_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.syn-2.0.38.bazel b/third_party/rust/crates/BUILD.syn-2.0.38.bazel
deleted file mode 100644
index 9e910c66092e9..0000000000000
--- a/third_party/rust/crates/BUILD.syn-2.0.38.bazel
+++ /dev/null
@@ -1,93 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "syn",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "clone-impls",
-        "default",
-        "derive",
-        "extra-traits",
-        "full",
-        "parsing",
-        "printing",
-        "proc-macro",
-        "quote",
-        "visit",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=syn",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.38",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__unicode-ident-1.0.12//:unicode_ident",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.tap-1.0.1.bazel b/third_party/rust/crates/BUILD.tap-1.0.1.bazel
deleted file mode 100644
index 13e7385c3c8ba..0000000000000
--- a/third_party/rust/crates/BUILD.tap-1.0.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "tap",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tap",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.1",
-)
diff --git a/third_party/rust/crates/BUILD.tar-0.4.40.bazel b/third_party/rust/crates/BUILD.tar-0.4.40.bazel
deleted file mode 100644
index 6f06932761fdc..0000000000000
--- a/third_party/rust/crates/BUILD.tar-0.4.40.bazel
+++ /dev/null
@@ -1,169 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "tar",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "xattr",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tar",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.40",
-    deps = [
-        "@crate_index__filetime-0.2.22//:filetime",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__libc-0.2.149//:libc",  # cfg(unix)
-            "@crate_index__xattr-1.0.1//:xattr",  # cfg(unix)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.target-lexicon-0.12.11.bazel b/third_party/rust/crates/BUILD.target-lexicon-0.12.11.bazel
deleted file mode 100644
index ef85aa098a47a..0000000000000
--- a/third_party/rust/crates/BUILD.target-lexicon-0.12.11.bazel
+++ /dev/null
@@ -1,123 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 WITH LLVM-exception
-# ])
-
-rust_library(
-    name = "target_lexicon",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=target-lexicon",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.12.11",
-    deps = [
-        "@crate_index__target-lexicon-0.12.11//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "target-lexicon_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=target-lexicon",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.12.11",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "target-lexicon_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.tempfile-3.8.0.bazel b/third_party/rust/crates/BUILD.tempfile-3.8.0.bazel
deleted file mode 100644
index 53d859558278f..0000000000000
--- a/third_party/rust/crates/BUILD.tempfile-3.8.0.bazel
+++ /dev/null
@@ -1,157 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "tempfile",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tempfile",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "3.8.0",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__fastrand-2.0.0//:fastrand",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(any(unix, target_os = "wasi"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.tendril-0.4.3.bazel b/third_party/rust/crates/BUILD.tendril-0.4.3.bazel
deleted file mode 100644
index 82b123defac8e..0000000000000
--- a/third_party/rust/crates/BUILD.tendril-0.4.3.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "tendril",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tendril",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.3",
-    deps = [
-        "@crate_index__futf-0.1.5//:futf",
-        "@crate_index__mac-0.1.1//:mac",
-        "@crate_index__utf-8-0.7.6//:utf8",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.termcolor-1.2.0.bazel b/third_party/rust/crates/BUILD.termcolor-1.2.0.bazel
deleted file mode 100644
index 4e5afaedb093a..0000000000000
--- a/third_party/rust/crates/BUILD.termcolor-1.2.0.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Unlicense OR MIT
-# ])
-
-rust_library(
-    name = "termcolor",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=termcolor",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.2.0",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-util-0.1.5//:winapi_util",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__winapi-util-0.1.5//:winapi_util",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__winapi-util-0.1.5//:winapi_util",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.terminal_size-0.3.0.bazel b/third_party/rust/crates/BUILD.terminal_size-0.3.0.bazel
deleted file mode 100644
index c49b2415c5dbb..0000000000000
--- a/third_party/rust/crates/BUILD.terminal_size-0.3.0.bazel
+++ /dev/null
@@ -1,172 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "terminal_size",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=terminal_size",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.0",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-sys-0.48.0//:windows_sys",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__rustix-0.38.10//:rustix",  # cfg(not(windows))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.thiserror-1.0.49.bazel b/third_party/rust/crates/BUILD.thiserror-1.0.49.bazel
deleted file mode 100644
index 70c1d106315af..0000000000000
--- a/third_party/rust/crates/BUILD.thiserror-1.0.49.bazel
+++ /dev/null
@@ -1,120 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "thiserror",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__thiserror-impl-1.0.49//:thiserror_impl",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.49",
-    deps = [
-        "@crate_index__thiserror-1.0.49//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "thiserror_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2021",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.49",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "thiserror_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.thiserror-core-1.0.38.bazel b/third_party/rust/crates/BUILD.thiserror-core-1.0.38.bazel
deleted file mode 100644
index d335558ebc932..0000000000000
--- a/third_party/rust/crates/BUILD.thiserror-core-1.0.38.bazel
+++ /dev/null
@@ -1,129 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "thiserror_core",
-    srcs = glob(["**/*.rs"]),
-    aliases = {
-        "@crate_index__thiserror-core-impl-1.0.38//:thiserror_core_impl": "thiserror_impl",
-    },
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__thiserror-core-impl-1.0.38//:thiserror_core_impl",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror-core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.38",
-    deps = [
-        "@crate_index__thiserror-core-1.0.38//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "thiserror-core_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror-core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.0.38",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "thiserror-core_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.thiserror-core-impl-1.0.38.bazel b/third_party/rust/crates/BUILD.thiserror-core-impl-1.0.38.bazel
deleted file mode 100644
index ce451068ceafc..0000000000000
--- a/third_party/rust/crates/BUILD.thiserror-core-impl-1.0.38.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "thiserror_core_impl",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror-core-impl",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.38",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-1.0.109//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.thiserror-impl-1.0.49.bazel b/third_party/rust/crates/BUILD.thiserror-impl-1.0.49.bazel
deleted file mode 100644
index 94e39315faca8..0000000000000
--- a/third_party/rust/crates/BUILD.thiserror-impl-1.0.49.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "thiserror_impl",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=thiserror-impl",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.49",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.time-0.1.45.bazel b/third_party/rust/crates/BUILD.time-0.1.45.bazel
deleted file mode 100644
index 4f290027756d6..0000000000000
--- a/third_party/rust/crates/BUILD.time-0.1.45.bazel
+++ /dev/null
@@ -1,93 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "time",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=time",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.45",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__wasi-0.10.0-wasi-snapshot-preview1//:wasi",  # cfg(target_os = "wasi")
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.time-0.3.28.bazel b/third_party/rust/crates/BUILD.time-0.3.28.bazel
deleted file mode 100644
index b2aca166485b8..0000000000000
--- a/third_party/rust/crates/BUILD.time-0.3.28.bazel
+++ /dev/null
@@ -1,92 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "time",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "formatting",
-        "macros",
-        "parsing",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__time-macros-0.2.14//:time_macros",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=time",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.28",
-    deps = [
-        "@crate_index__deranged-0.3.8//:deranged",
-        "@crate_index__itoa-1.0.9//:itoa",
-        "@crate_index__serde-1.0.189//:serde",
-        "@crate_index__time-core-0.1.1//:time_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.time-core-0.1.1.bazel b/third_party/rust/crates/BUILD.time-core-0.1.1.bazel
deleted file mode 100644
index b9f3d8f17a1e0..0000000000000
--- a/third_party/rust/crates/BUILD.time-core-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "time_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=time-core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.time-macros-0.2.14.bazel b/third_party/rust/crates/BUILD.time-macros-0.2.14.bazel
deleted file mode 100644
index b3d692dbec8ad..0000000000000
--- a/third_party/rust/crates/BUILD.time-macros-0.2.14.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "time_macros",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "formatting",
-        "parsing",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=time-macros",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.14",
-    deps = [
-        "@crate_index__time-core-0.1.1//:time_core",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.tiny-keccak-2.0.2.bazel b/third_party/rust/crates/BUILD.tiny-keccak-2.0.2.bazel
deleted file mode 100644
index 792af39c756e7..0000000000000
--- a/third_party/rust/crates/BUILD.tiny-keccak-2.0.2.bazel
+++ /dev/null
@@ -1,126 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # CC0-1.0
-# ])
-
-rust_library(
-    name = "tiny_keccak",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "cshake",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tiny-keccak",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.0.2",
-    deps = [
-        "@crate_index__crunchy-0.2.2//:crunchy",
-        "@crate_index__tiny-keccak-2.0.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "tiny-keccak_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "cshake",
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tiny-keccak",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "2.0.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "tiny-keccak_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.tinyvec-1.6.0.bazel b/third_party/rust/crates/BUILD.tinyvec-1.6.0.bazel
deleted file mode 100644
index b5c2a5d1fc082..0000000000000
--- a/third_party/rust/crates/BUILD.tinyvec-1.6.0.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Zlib OR Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "tinyvec",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "tinyvec_macros",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tinyvec",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.6.0",
-    deps = [
-        "@crate_index__tinyvec_macros-0.1.1//:tinyvec_macros",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.tinyvec_macros-0.1.1.bazel b/third_party/rust/crates/BUILD.tinyvec_macros-0.1.1.bazel
deleted file mode 100644
index 34d030b6d8f86..0000000000000
--- a/third_party/rust/crates/BUILD.tinyvec_macros-0.1.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0 OR Zlib
-# ])
-
-rust_library(
-    name = "tinyvec_macros",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=tinyvec_macros",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.1",
-)
diff --git a/third_party/rust/crates/BUILD.toml-0.5.11.bazel b/third_party/rust/crates/BUILD.toml-0.5.11.bazel
deleted file mode 100644
index c29f0d06ba266..0000000000000
--- a/third_party/rust/crates/BUILD.toml-0.5.11.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "toml",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=toml",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.11",
-    deps = [
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.toml_datetime-0.6.3.bazel b/third_party/rust/crates/BUILD.toml_datetime-0.6.3.bazel
deleted file mode 100644
index f26257c3e2027..0000000000000
--- a/third_party/rust/crates/BUILD.toml_datetime-0.6.3.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "toml_datetime",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=toml_datetime",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.6.3",
-)
diff --git a/third_party/rust/crates/BUILD.toml_edit-0.19.14.bazel b/third_party/rust/crates/BUILD.toml_edit-0.19.14.bazel
deleted file mode 100644
index 4ab77bc4f3804..0000000000000
--- a/third_party/rust/crates/BUILD.toml_edit-0.19.14.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "toml_edit",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=toml_edit",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.19.14",
-    deps = [
-        "@crate_index__indexmap-2.0.0//:indexmap",
-        "@crate_index__toml_datetime-0.6.3//:toml_datetime",
-        "@crate_index__winnow-0.5.15//:winnow",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.topological-sort-0.2.2.bazel b/third_party/rust/crates/BUILD.topological-sort-0.2.2.bazel
deleted file mode 100644
index 540f8f4e2c18c..0000000000000
--- a/third_party/rust/crates/BUILD.topological-sort-0.2.2.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "topological_sort",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=topological-sort",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.2",
-)
diff --git a/third_party/rust/crates/BUILD.twox-hash-1.6.3.bazel b/third_party/rust/crates/BUILD.twox-hash-1.6.3.bazel
deleted file mode 100644
index dc285891077f6..0000000000000
--- a/third_party/rust/crates/BUILD.twox-hash-1.6.3.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "twox_hash",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=twox-hash",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.6.3",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__static_assertions-1.1.0//:static_assertions",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.typenum-1.17.0.bazel b/third_party/rust/crates/BUILD.typenum-1.17.0.bazel
deleted file mode 100644
index 7049bf0fa581d..0000000000000
--- a/third_party/rust/crates/BUILD.typenum-1.17.0.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "typenum",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typenum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.17.0",
-    deps = [
-        "@crate_index__typenum-1.17.0//:build_script_main",
-    ],
-)
-
-cargo_build_script(
-    name = "typenum_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_main",
-    crate_root = "build/main.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typenum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.17.0",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_main",
-    actual = "typenum_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.typetag-0.2.13.bazel b/third_party/rust/crates/BUILD.typetag-0.2.13.bazel
deleted file mode 100644
index 8673267a67cc4..0000000000000
--- a/third_party/rust/crates/BUILD.typetag-0.2.13.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "typetag",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__typetag-impl-0.2.13//:typetag_impl",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typetag",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.13",
-    deps = [
-        "@crate_index__erased-serde-0.3.31//:erased_serde",
-        "@crate_index__inventory-0.3.12//:inventory",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__serde-1.0.189//:serde",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.typetag-impl-0.2.13.bazel b/third_party/rust/crates/BUILD.typetag-impl-0.2.13.bazel
deleted file mode 100644
index 2ce56eb2c5663..0000000000000
--- a/third_party/rust/crates/BUILD.typetag-impl-0.2.13.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "typetag_impl",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typetag-impl",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.13",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.ucd-trie-0.1.6.bazel b/third_party/rust/crates/BUILD.ucd-trie-0.1.6.bazel
deleted file mode 100644
index 158475888d9ad..0000000000000
--- a/third_party/rust/crates/BUILD.ucd-trie-0.1.6.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "ucd_trie",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ucd-trie",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.6",
-)
diff --git a/third_party/rust/crates/BUILD.unicase-2.7.0.bazel b/third_party/rust/crates/BUILD.unicase-2.7.0.bazel
deleted file mode 100644
index 2c9d26076122e..0000000000000
--- a/third_party/rust/crates/BUILD.unicase-2.7.0.bazel
+++ /dev/null
@@ -1,120 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "unicase",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicase",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.7.0",
-    deps = [
-        "@crate_index__unicase-2.7.0//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "unicase_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicase",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "2.7.0",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@crate_index__version_check-0.9.4//:version_check",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "unicase_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.unicode-bidi-0.3.13.bazel b/third_party/rust/crates/BUILD.unicode-bidi-0.3.13.bazel
deleted file mode 100644
index fc703a4c8ac54..0000000000000
--- a/third_party/rust/crates/BUILD.unicode-bidi-0.3.13.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "unicode_bidi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "hardcoded-data",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicode-bidi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.13",
-)
diff --git a/third_party/rust/crates/BUILD.unicode-ident-1.0.12.bazel b/third_party/rust/crates/BUILD.unicode-ident-1.0.12.bazel
deleted file mode 100644
index 7fd1987b29def..0000000000000
--- a/third_party/rust/crates/BUILD.unicode-ident-1.0.12.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # (MIT OR Apache-2.0) AND Unicode-DFS-2016
-# ])
-
-rust_library(
-    name = "unicode_ident",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicode-ident",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.12",
-)
diff --git a/third_party/rust/crates/BUILD.unicode-normalization-0.1.22.bazel b/third_party/rust/crates/BUILD.unicode-normalization-0.1.22.bazel
deleted file mode 100644
index 0f7c649fe95f7..0000000000000
--- a/third_party/rust/crates/BUILD.unicode-normalization-0.1.22.bazel
+++ /dev/null
@@ -1,82 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "unicode_normalization",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicode-normalization",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.22",
-    deps = [
-        "@crate_index__tinyvec-1.6.0//:tinyvec",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.unicode-width-0.1.10.bazel b/third_party/rust/crates/BUILD.unicode-width-0.1.10.bazel
deleted file mode 100644
index aa8e9db58c631..0000000000000
--- a/third_party/rust/crates/BUILD.unicode-width-0.1.10.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "unicode_width",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=unicode-width",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.10",
-)
diff --git a/third_party/rust/crates/BUILD.untrusted-0.7.1.bazel b/third_party/rust/crates/BUILD.untrusted-0.7.1.bazel
deleted file mode 100644
index 8b531341bef88..0000000000000
--- a/third_party/rust/crates/BUILD.untrusted-0.7.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # ISC
-# ])
-
-rust_library(
-    name = "untrusted",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/untrusted.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=untrusted",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.1",
-)
diff --git a/third_party/rust/crates/BUILD.url-2.4.1.bazel b/third_party/rust/crates/BUILD.url-2.4.1.bazel
deleted file mode 100644
index 41131b85792ed..0000000000000
--- a/third_party/rust/crates/BUILD.url-2.4.1.bazel
+++ /dev/null
@@ -1,84 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "url",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=url",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.4.1",
-    deps = [
-        "@crate_index__form_urlencoded-1.2.0//:form_urlencoded",
-        "@crate_index__idna-0.4.0//:idna",
-        "@crate_index__percent-encoding-2.3.0//:percent_encoding",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.utf-8-0.7.6.bazel b/third_party/rust/crates/BUILD.utf-8-0.7.6.bazel
deleted file mode 100644
index 55bed7167532b..0000000000000
--- a/third_party/rust/crates/BUILD.utf-8-0.7.6.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "utf8",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=utf-8",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.6",
-)
diff --git a/third_party/rust/crates/BUILD.utf8parse-0.2.1.bazel b/third_party/rust/crates/BUILD.utf8parse-0.2.1.bazel
deleted file mode 100644
index f7ce1435cb83b..0000000000000
--- a/third_party/rust/crates/BUILD.utf8parse-0.2.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "utf8parse",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=utf8parse",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.1",
-)
diff --git a/third_party/rust/crates/BUILD.vcpkg-0.2.15.bazel b/third_party/rust/crates/BUILD.vcpkg-0.2.15.bazel
deleted file mode 100644
index 17a9a5faba14a..0000000000000
--- a/third_party/rust/crates/BUILD.vcpkg-0.2.15.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "vcpkg",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=vcpkg",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.15",
-)
diff --git a/third_party/rust/crates/BUILD.version_check-0.9.4.bazel b/third_party/rust/crates/BUILD.version_check-0.9.4.bazel
deleted file mode 100644
index 17b0197707177..0000000000000
--- a/third_party/rust/crates/BUILD.version_check-0.9.4.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "version_check",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=version_check",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.4",
-)
diff --git a/third_party/rust/crates/BUILD.wasi-0.10.0+wasi-snapshot-preview1.bazel b/third_party/rust/crates/BUILD.wasi-0.10.0+wasi-snapshot-preview1.bazel
deleted file mode 100644
index 22472cf220bd3..0000000000000
--- a/third_party/rust/crates/BUILD.wasi-0.10.0+wasi-snapshot-preview1.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 WITH LLVM-exception OR Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "wasi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.10.0+wasi-snapshot-preview1",
-)
diff --git a/third_party/rust/crates/BUILD.wasi-0.11.0+wasi-snapshot-preview1.bazel b/third_party/rust/crates/BUILD.wasi-0.11.0+wasi-snapshot-preview1.bazel
deleted file mode 100644
index 95f77a69899dc..0000000000000
--- a/third_party/rust/crates/BUILD.wasi-0.11.0+wasi-snapshot-preview1.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 WITH LLVM-exception OR Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "wasi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.11.0+wasi-snapshot-preview1",
-)
diff --git a/third_party/rust/crates/BUILD.wasm-bindgen-0.2.87.bazel b/third_party/rust/crates/BUILD.wasm-bindgen-0.2.87.bazel
deleted file mode 100644
index 6fc62b14a800c..0000000000000
--- a/third_party/rust/crates/BUILD.wasm-bindgen-0.2.87.bazel
+++ /dev/null
@@ -1,131 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "wasm_bindgen",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "spans",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    proc_macro_deps = [
-        "@crate_index__wasm-bindgen-macro-0.2.87//:wasm_bindgen_macro",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.87",
-    deps = [
-        "@crate_index__cfg-if-1.0.0//:cfg_if",
-        "@crate_index__wasm-bindgen-0.2.87//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "wasm-bindgen_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "spans",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.87",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "wasm-bindgen_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.wasm-bindgen-backend-0.2.87.bazel b/third_party/rust/crates/BUILD.wasm-bindgen-backend-0.2.87.bazel
deleted file mode 100644
index ae8ca03c021c2..0000000000000
--- a/third_party/rust/crates/BUILD.wasm-bindgen-backend-0.2.87.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "wasm_bindgen_backend",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "spans",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen-backend",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.87",
-    deps = [
-        "@crate_index__bumpalo-3.14.0//:bumpalo",
-        "@crate_index__log-0.4.20//:log",
-        "@crate_index__once_cell-1.18.0//:once_cell",
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-        "@crate_index__wasm-bindgen-shared-0.2.87//:wasm_bindgen_shared",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.wasm-bindgen-macro-0.2.87.bazel b/third_party/rust/crates/BUILD.wasm-bindgen-macro-0.2.87.bazel
deleted file mode 100644
index 381433864c4c0..0000000000000
--- a/third_party/rust/crates/BUILD.wasm-bindgen-macro-0.2.87.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_proc_macro(
-    name = "wasm_bindgen_macro",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "spans",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen-macro",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.87",
-    deps = [
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__wasm-bindgen-macro-support-0.2.87//:wasm_bindgen_macro_support",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.wasm-bindgen-macro-support-0.2.87.bazel b/third_party/rust/crates/BUILD.wasm-bindgen-macro-support-0.2.87.bazel
deleted file mode 100644
index 061ce0ca430c7..0000000000000
--- a/third_party/rust/crates/BUILD.wasm-bindgen-macro-support-0.2.87.bazel
+++ /dev/null
@@ -1,86 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "wasm_bindgen_macro_support",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "spans",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen-macro-support",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.87",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-        "@crate_index__wasm-bindgen-backend-0.2.87//:wasm_bindgen_backend",
-        "@crate_index__wasm-bindgen-shared-0.2.87//:wasm_bindgen_shared",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.wasm-bindgen-shared-0.2.87.bazel b/third_party/rust/crates/BUILD.wasm-bindgen-shared-0.2.87.bazel
deleted file mode 100644
index 9629c9ba7e1a8..0000000000000
--- a/third_party/rust/crates/BUILD.wasm-bindgen-shared-0.2.87.bazel
+++ /dev/null
@@ -1,118 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "wasm_bindgen_shared",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen-shared",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.87",
-    deps = [
-        "@crate_index__wasm-bindgen-shared-0.2.87//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "wasm-bindgen-shared_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    links = "wasm_bindgen",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wasm-bindgen-shared",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.87",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "wasm-bindgen-shared_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.web-sys-0.3.64.bazel b/third_party/rust/crates/BUILD.web-sys-0.3.64.bazel
deleted file mode 100644
index 4a8b8b2bee670..0000000000000
--- a/third_party/rust/crates/BUILD.web-sys-0.3.64.bazel
+++ /dev/null
@@ -1,85 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "web_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "Crypto",
-        "EventTarget",
-        "Window",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=web-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.64",
-    deps = [
-        "@crate_index__js-sys-0.3.64//:js_sys",
-        "@crate_index__wasm-bindgen-0.2.87//:wasm_bindgen",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.winapi-0.3.9.bazel b/third_party/rust/crates/BUILD.winapi-0.3.9.bazel
deleted file mode 100644
index ac1cce9743cb9..0000000000000
--- a/third_party/rust/crates/BUILD.winapi-0.3.9.bazel
+++ /dev/null
@@ -1,169 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "winapi",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "cguid",
-        "commapi",
-        "consoleapi",
-        "errhandlingapi",
-        "fileapi",
-        "guiddef",
-        "handleapi",
-        "libloaderapi",
-        "minwinbase",
-        "minwindef",
-        "ntdef",
-        "ntsecapi",
-        "processenv",
-        "profileapi",
-        "setupapi",
-        "shellapi",
-        "std",
-        "sysinfoapi",
-        "timezoneapi",
-        "winbase",
-        "wincon",
-        "winerror",
-        "winnt",
-        "wtypesbase",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.9",
-    deps = [
-        "@crate_index__winapi-0.3.9//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "winapi_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "cguid",
-        "commapi",
-        "consoleapi",
-        "errhandlingapi",
-        "fileapi",
-        "guiddef",
-        "handleapi",
-        "libloaderapi",
-        "minwinbase",
-        "minwindef",
-        "ntdef",
-        "ntsecapi",
-        "processenv",
-        "profileapi",
-        "setupapi",
-        "shellapi",
-        "std",
-        "sysinfoapi",
-        "timezoneapi",
-        "winbase",
-        "wincon",
-        "winerror",
-        "winnt",
-        "wtypesbase",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.3.9",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "winapi_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.winapi-i686-pc-windows-gnu-0.4.0.bazel b/third_party/rust/crates/BUILD.winapi-i686-pc-windows-gnu-0.4.0.bazel
deleted file mode 100644
index e9fa7c15487ba..0000000000000
--- a/third_party/rust/crates/BUILD.winapi-i686-pc-windows-gnu-0.4.0.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "winapi_i686_pc_windows_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi-i686-pc-windows-gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__winapi-i686-pc-windows-gnu-0.4.0//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "winapi-i686-pc-windows-gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi-i686-pc-windows-gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.4.0",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "winapi-i686-pc-windows-gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.winapi-util-0.1.5.bazel b/third_party/rust/crates/BUILD.winapi-util-0.1.5.bazel
deleted file mode 100644
index 101f96a520aca..0000000000000
--- a/third_party/rust/crates/BUILD.winapi-util-0.1.5.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Unlicense/MIT
-# ])
-
-rust_library(
-    name = "winapi_util",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi-util",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.1.5",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__winapi-0.3.9//:winapi",  # cfg(windows)
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.winapi-x86_64-pc-windows-gnu-0.4.0.bazel b/third_party/rust/crates/BUILD.winapi-x86_64-pc-windows-gnu-0.4.0.bazel
deleted file mode 100644
index 44fc976264ad2..0000000000000
--- a/third_party/rust/crates/BUILD.winapi-x86_64-pc-windows-gnu-0.4.0.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "winapi_x86_64_pc_windows_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi-x86_64-pc-windows-gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.0",
-    deps = [
-        "@crate_index__winapi-x86_64-pc-windows-gnu-0.4.0//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "winapi-x86_64-pc-windows-gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winapi-x86_64-pc-windows-gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.4.0",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "winapi-x86_64-pc-windows-gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows-core-0.51.1.bazel b/third_party/rust/crates/BUILD.windows-core-0.51.1.bazel
deleted file mode 100644
index 9f9b972d4fb3e..0000000000000
--- a/third_party/rust/crates/BUILD.windows-core-0.51.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_core",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows-core",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.51.1",
-    deps = [
-        "@crate_index__windows-targets-0.48.5//:windows_targets",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.windows-sys-0.45.0.bazel b/third_party/rust/crates/BUILD.windows-sys-0.45.0.bazel
deleted file mode 100644
index d60e47b40d8b8..0000000000000
--- a/third_party/rust/crates/BUILD.windows-sys-0.45.0.bazel
+++ /dev/null
@@ -1,184 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "Win32",
-        "Win32_Foundation",
-        "Win32_Storage",
-        "Win32_Storage_FileSystem",
-        "Win32_System",
-        "Win32_System_Console",
-        "Win32_UI",
-        "Win32_UI_Input",
-        "Win32_UI_Input_KeyboardAndMouse",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.45.0",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:wasm32-wasi": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@crate_index__windows-targets-0.42.2//:windows_targets",  # cfg(not(windows_raw_dylib))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.windows-sys-0.48.0.bazel b/third_party/rust/crates/BUILD.windows-sys-0.48.0.bazel
deleted file mode 100644
index b2e796d217163..0000000000000
--- a/third_party/rust/crates/BUILD.windows-sys-0.48.0.bazel
+++ /dev/null
@@ -1,103 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_sys",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "Win32",
-        "Win32_Foundation",
-        "Win32_Globalization",
-        "Win32_NetworkManagement",
-        "Win32_NetworkManagement_IpHelper",
-        "Win32_Networking",
-        "Win32_Networking_WinSock",
-        "Win32_Security",
-        "Win32_Storage",
-        "Win32_Storage_FileSystem",
-        "Win32_System",
-        "Win32_System_Com",
-        "Win32_System_Console",
-        "Win32_System_Diagnostics",
-        "Win32_System_Diagnostics_Debug",
-        "Win32_System_IO",
-        "Win32_System_Pipes",
-        "Win32_System_Threading",
-        "Win32_System_WindowsProgramming",
-        "Win32_UI",
-        "Win32_UI_Shell",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows-sys",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.0",
-    deps = [
-        "@crate_index__windows-targets-0.48.5//:windows_targets",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.windows-targets-0.42.2.bazel b/third_party/rust/crates/BUILD.windows-targets-0.42.2.bazel
deleted file mode 100644
index ac72c6c155dcf..0000000000000
--- a/third_party/rust/crates/BUILD.windows-targets-0.42.2.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_targets",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows-targets",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows_aarch64_msvc-0.42.2//:windows_aarch64_msvc",  # aarch64-pc-windows-msvc
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows_i686_msvc-0.42.2//:windows_i686_msvc",  # i686-pc-windows-msvc
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows_x86_64_msvc-0.42.2//:windows_x86_64_msvc",  # x86_64-pc-windows-msvc
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.windows-targets-0.48.5.bazel b/third_party/rust/crates/BUILD.windows-targets-0.48.5.bazel
deleted file mode 100644
index bc96a34b3e207..0000000000000
--- a/third_party/rust/crates/BUILD.windows-targets-0.48.5.bazel
+++ /dev/null
@@ -1,94 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_targets",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows-targets",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@crate_index__windows_aarch64_msvc-0.48.5//:windows_aarch64_msvc",  # cfg(all(target_arch = "aarch64", target_env = "msvc", not(windows_raw_dylib)))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@crate_index__windows_i686_msvc-0.48.5//:windows_i686_msvc",  # cfg(all(target_arch = "x86", target_env = "msvc", not(windows_raw_dylib)))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@crate_index__windows_i686_gnu-0.48.5//:windows_i686_gnu",  # cfg(all(target_arch = "x86", target_env = "gnu", not(windows_raw_dylib)))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@crate_index__windows_x86_64_msvc-0.48.5//:windows_x86_64_msvc",  # cfg(all(target_arch = "x86_64", target_env = "msvc", not(windows_raw_dylib)))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@crate_index__windows_x86_64_gnu-0.48.5//:windows_x86_64_gnu",  # cfg(all(target_arch = "x86_64", target_env = "gnu", not(target_abi = "llvm"), not(windows_raw_dylib)))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.42.2.bazel
deleted file mode 100644
index 2906ccc9b0c0f..0000000000000
--- a/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_aarch64_gnullvm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_aarch64_gnullvm-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_aarch64_gnullvm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_aarch64_gnullvm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.48.5.bazel
deleted file mode 100644
index 9454d6caff12f..0000000000000
--- a/third_party/rust/crates/BUILD.windows_aarch64_gnullvm-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_aarch64_gnullvm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_aarch64_gnullvm-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_aarch64_gnullvm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_aarch64_gnullvm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.42.2.bazel
deleted file mode 100644
index a8f4f0bf2880c..0000000000000
--- a/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_aarch64_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_aarch64_msvc-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_aarch64_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_aarch64_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.48.5.bazel
deleted file mode 100644
index 1233b20a24171..0000000000000
--- a/third_party/rust/crates/BUILD.windows_aarch64_msvc-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_aarch64_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_aarch64_msvc-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_aarch64_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_aarch64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_aarch64_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_i686_gnu-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_i686_gnu-0.42.2.bazel
deleted file mode 100644
index 7844222d7e1b7..0000000000000
--- a/third_party/rust/crates/BUILD.windows_i686_gnu-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_i686_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_i686_gnu-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_i686_gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_i686_gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_i686_gnu-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_i686_gnu-0.48.5.bazel
deleted file mode 100644
index e0cdf7e6eaed3..0000000000000
--- a/third_party/rust/crates/BUILD.windows_i686_gnu-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_i686_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_i686_gnu-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_i686_gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_i686_gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_i686_msvc-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_i686_msvc-0.42.2.bazel
deleted file mode 100644
index 2aefc1fad3d95..0000000000000
--- a/third_party/rust/crates/BUILD.windows_i686_msvc-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_i686_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_i686_msvc-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_i686_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_i686_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_i686_msvc-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_i686_msvc-0.48.5.bazel
deleted file mode 100644
index bcdf781d12ef1..0000000000000
--- a/third_party/rust/crates/BUILD.windows_i686_msvc-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_i686_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_i686_msvc-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_i686_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_i686_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_i686_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.42.2.bazel
deleted file mode 100644
index d8512473bb3b5..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_x86_64_gnu-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.48.5.bazel
deleted file mode 100644
index b84a3009bd4fe..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_gnu-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_gnu",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_x86_64_gnu-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_gnu_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnu",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_gnu_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.42.2.bazel
deleted file mode 100644
index 3fc3a984f732c..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_gnullvm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_x86_64_gnullvm-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_gnullvm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_gnullvm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.48.5.bazel
deleted file mode 100644
index 210d578ebcd11..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_gnullvm-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_gnullvm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_x86_64_gnullvm-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_gnullvm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_gnullvm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_gnullvm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.42.2.bazel b/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.42.2.bazel
deleted file mode 100644
index b627bf0317adb..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.42.2.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.42.2",
-    deps = [
-        "@crate_index__windows_x86_64_msvc-0.42.2//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.42.2",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.48.5.bazel b/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.48.5.bazel
deleted file mode 100644
index 847d5e35697b5..0000000000000
--- a/third_party/rust/crates/BUILD.windows_x86_64_msvc-0.48.5.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "windows_x86_64_msvc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.48.5",
-    deps = [
-        "@crate_index__windows_x86_64_msvc-0.48.5//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "windows_x86_64_msvc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=windows_x86_64_msvc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.48.5",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "windows_x86_64_msvc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/rust/crates/BUILD.winnow-0.5.15.bazel b/third_party/rust/crates/BUILD.winnow-0.5.15.bazel
deleted file mode 100644
index 0174affdb9703..0000000000000
--- a/third_party/rust/crates/BUILD.winnow-0.5.15.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "winnow",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=winnow",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.15",
-)
diff --git a/third_party/rust/crates/BUILD.wyz-0.5.1.bazel b/third_party/rust/crates/BUILD.wyz-0.5.1.bazel
deleted file mode 100644
index 5c4b3d4c473f1..0000000000000
--- a/third_party/rust/crates/BUILD.wyz-0.5.1.bazel
+++ /dev/null
@@ -1,79 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "wyz",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=wyz",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.1",
-    deps = [
-        "@crate_index__tap-1.0.1//:tap",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.xattr-1.0.1.bazel b/third_party/rust/crates/BUILD.xattr-1.0.1.bazel
deleted file mode 100644
index 20d385fcddd2e..0000000000000
--- a/third_party/rust/crates/BUILD.xattr-1.0.1.bazel
+++ /dev/null
@@ -1,83 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "xattr",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "unsupported",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=xattr",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.1",
-    deps = [
-        "@crate_index__libc-0.2.149//:libc",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.zerocopy-0.7.11.bazel b/third_party/rust/crates/BUILD.zerocopy-0.7.11.bazel
deleted file mode 100644
index d378b43c2dac9..0000000000000
--- a/third_party/rust/crates/BUILD.zerocopy-0.7.11.bazel
+++ /dev/null
@@ -1,88 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-2-Clause
-# ])
-
-rust_library(
-    name = "zerocopy",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "byteorder",
-        "default",
-        "derive",
-        "zerocopy-derive",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    proc_macro_deps = [
-        "@crate_index__zerocopy-derive-0.7.11//:zerocopy_derive",
-    ],
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=zerocopy",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.11",
-    deps = [
-        "@crate_index__byteorder-1.5.0//:byteorder",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.zerocopy-derive-0.7.11.bazel b/third_party/rust/crates/BUILD.zerocopy-derive-0.7.11.bazel
deleted file mode 100644
index 05689a66d5b58..0000000000000
--- a/third_party/rust/crates/BUILD.zerocopy-derive-0.7.11.bazel
+++ /dev/null
@@ -1,81 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_proc_macro")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-2-Clause
-# ])
-
-rust_proc_macro(
-    name = "zerocopy_derive",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=zerocopy-derive",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.7.11",
-    deps = [
-        "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-        "@crate_index__quote-1.0.33//:quote",
-        "@crate_index__syn-2.0.38//:syn",
-    ],
-)
diff --git a/third_party/rust/crates/BUILD.zeroize-1.7.0.bazel b/third_party/rust/crates/BUILD.zeroize-1.7.0.bazel
deleted file mode 100644
index 3e2889912ea5c..0000000000000
--- a/third_party/rust/crates/BUILD.zeroize-1.7.0.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "zeroize",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "alloc",
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2021",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=zeroize",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.7.0",
-)
diff --git a/third_party/rust/crates/crates.bzl b/third_party/rust/crates/crates.bzl
deleted file mode 100644
index 55d9ab246125a..0000000000000
--- a/third_party/rust/crates/crates.bzl
+++ /dev/null
@@ -1,25 +0,0 @@
-###############################################################################
-# @generated
-# This file is auto-generated by the cargo-bazel tool.
-#
-# DO NOT MODIFY: Local changes may be replaced in future executions.
-###############################################################################
-"""Rules for defining repositories for remote `crates_vendor` repositories"""
-
-load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
-
-# buildifier: disable=bzl-visibility
-load("@lowrisc_opentitan//third_party/rust/crates:defs.bzl", _crate_repositories = "crate_repositories")
-
-# buildifier: disable=bzl-visibility
-load("@rules_rust//crate_universe/private:crates_vendor.bzl", "crates_vendor_remote_repository")
-
-def crate_repositories():
-    maybe(
-        crates_vendor_remote_repository,
-        name = "crate_index",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.bazel"),
-        defs_module = Label("@lowrisc_opentitan//third_party/rust/crates:defs.bzl"),
-    )
-
-    _crate_repositories()
diff --git a/third_party/rust/crates/defs.bzl b/third_party/rust/crates/defs.bzl
deleted file mode 100644
index fba62d072c580..0000000000000
--- a/third_party/rust/crates/defs.bzl
+++ /dev/null
@@ -1,3675 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/rust:crate_index
-###############################################################################
-"""
-# `crates_repository` API
-
-- [aliases](#aliases)
-- [crate_deps](#crate_deps)
-- [all_crate_deps](#all_crate_deps)
-- [crate_repositories](#crate_repositories)
-
-"""
-
-load("@bazel_skylib//lib:selects.bzl", "selects")
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
-
-###############################################################################
-# MACROS API
-###############################################################################
-
-# An identifier that represent common dependencies (unconditional).
-_COMMON_CONDITION = ""
-
-def _flatten_dependency_maps(all_dependency_maps):
-    """Flatten a list of dependency maps into one dictionary.
-
-    Dependency maps have the following structure:
-
-    ```python
-    DEPENDENCIES_MAP = {
-        # The first key in the map is a Bazel package
-        # name of the workspace this file is defined in.
-        "workspace_member_package": {
-
-            # Not all dependencies are supported for all platforms.
-            # the condition key is the condition required to be true
-            # on the host platform.
-            "condition": {
-
-                # An alias to a crate target.     # The label of the crate target the
-                # Aliases are only crate names.   # package name refers to.
-                "package_name":                   "@full//:label",
-            }
-        }
-    }
-    ```
-
-    Args:
-        all_dependency_maps (list): A list of dicts as described above
-
-    Returns:
-        dict: A dictionary as described above
-    """
-    dependencies = {}
-
-    for workspace_deps_map in all_dependency_maps:
-        for pkg_name, conditional_deps_map in workspace_deps_map.items():
-            if pkg_name not in dependencies:
-                non_frozen_map = dict()
-                for key, values in conditional_deps_map.items():
-                    non_frozen_map.update({key: dict(values.items())})
-                dependencies.setdefault(pkg_name, non_frozen_map)
-                continue
-
-            for condition, deps_map in conditional_deps_map.items():
-                # If the condition has not been recorded, do so and continue
-                if condition not in dependencies[pkg_name]:
-                    dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))
-                    continue
-
-                # Alert on any miss-matched dependencies
-                inconsistent_entries = []
-                for crate_name, crate_label in deps_map.items():
-                    existing = dependencies[pkg_name][condition].get(crate_name)
-                    if existing and existing != crate_label:
-                        inconsistent_entries.append((crate_name, existing, crate_label))
-                    dependencies[pkg_name][condition].update({crate_name: crate_label})
-
-    return dependencies
-
-def crate_deps(deps, package_name = None):
-    """Finds the fully qualified label of the requested crates for the package where this macro is called.
-
-    Args:
-        deps (list): The desired list of crate targets.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()`.
-
-    Returns:
-        list: A list of labels to generated rust targets (str)
-    """
-
-    if not deps:
-        return []
-
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Join both sets of dependencies
-    dependencies = _flatten_dependency_maps([
-        _NORMAL_DEPENDENCIES,
-        _NORMAL_DEV_DEPENDENCIES,
-        _PROC_MACRO_DEPENDENCIES,
-        _PROC_MACRO_DEV_DEPENDENCIES,
-        _BUILD_DEPENDENCIES,
-        _BUILD_PROC_MACRO_DEPENDENCIES,
-    ]).pop(package_name, {})
-
-    # Combine all conditional packages so we can easily index over a flat list
-    # TODO: Perhaps this should actually return select statements and maintain
-    # the conditionals of the dependencies
-    flat_deps = {}
-    for deps_set in dependencies.values():
-        for crate_name, crate_label in deps_set.items():
-            flat_deps.update({crate_name: crate_label})
-
-    missing_crates = []
-    crate_targets = []
-    for crate_target in deps:
-        if crate_target not in flat_deps:
-            missing_crates.append(crate_target)
-        else:
-            crate_targets.append(flat_deps[crate_target])
-
-    if missing_crates:
-        fail("Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`".format(
-            missing_crates,
-            package_name,
-            dependencies,
-        ))
-
-    return crate_targets
-
-def all_crate_deps(
-        normal = False,
-        normal_dev = False,
-        proc_macro = False,
-        proc_macro_dev = False,
-        build = False,
-        build_proc_macro = False,
-        package_name = None):
-    """Finds the fully qualified label of all requested direct crate dependencies \
-    for the package where this macro is called.
-
-    If no parameters are set, all normal dependencies are returned. Setting any one flag will
-    otherwise impact the contents of the returned list.
-
-    Args:
-        normal (bool, optional): If True, normal dependencies are included in the
-            output list.
-        normal_dev (bool, optional): If True, normal dev dependencies will be
-            included in the output list..
-        proc_macro (bool, optional): If True, proc_macro dependencies are included
-            in the output list.
-        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are
-            included in the output list.
-        build (bool, optional): If True, build dependencies are included
-            in the output list.
-        build_proc_macro (bool, optional): If True, build proc_macro dependencies are
-            included in the output list.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()` when unset.
-
-    Returns:
-        list: A list of labels to generated rust targets (str)
-    """
-
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Determine the relevant maps to use
-    all_dependency_maps = []
-    if normal:
-        all_dependency_maps.append(_NORMAL_DEPENDENCIES)
-    if normal_dev:
-        all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)
-    if proc_macro:
-        all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)
-    if proc_macro_dev:
-        all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)
-    if build:
-        all_dependency_maps.append(_BUILD_DEPENDENCIES)
-    if build_proc_macro:
-        all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)
-
-    # Default to always using normal dependencies
-    if not all_dependency_maps:
-        all_dependency_maps.append(_NORMAL_DEPENDENCIES)
-
-    dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)
-
-    if not dependencies:
-        if dependencies == None:
-            fail("Tried to get all_crate_deps for package " + package_name + " but that package had no Cargo.toml file")
-        else:
-            return []
-
-    crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())
-    for condition, deps in dependencies.items():
-        crate_deps += selects.with_or({
-            tuple(_CONDITIONS[condition]): deps.values(),
-            "//conditions:default": [],
-        })
-
-    return crate_deps
-
-def aliases(
-        normal = False,
-        normal_dev = False,
-        proc_macro = False,
-        proc_macro_dev = False,
-        build = False,
-        build_proc_macro = False,
-        package_name = None):
-    """Produces a map of Crate alias names to their original label
-
-    If no dependency kinds are specified, `normal` and `proc_macro` are used by default.
-    Setting any one flag will otherwise determine the contents of the returned dict.
-
-    Args:
-        normal (bool, optional): If True, normal dependencies are included in the
-            output list.
-        normal_dev (bool, optional): If True, normal dev dependencies will be
-            included in the output list..
-        proc_macro (bool, optional): If True, proc_macro dependencies are included
-            in the output list.
-        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are
-            included in the output list.
-        build (bool, optional): If True, build dependencies are included
-            in the output list.
-        build_proc_macro (bool, optional): If True, build proc_macro dependencies are
-            included in the output list.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()` when unset.
-
-    Returns:
-        dict: The aliases of all associated packages
-    """
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Determine the relevant maps to use
-    all_aliases_maps = []
-    if normal:
-        all_aliases_maps.append(_NORMAL_ALIASES)
-    if normal_dev:
-        all_aliases_maps.append(_NORMAL_DEV_ALIASES)
-    if proc_macro:
-        all_aliases_maps.append(_PROC_MACRO_ALIASES)
-    if proc_macro_dev:
-        all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)
-    if build:
-        all_aliases_maps.append(_BUILD_ALIASES)
-    if build_proc_macro:
-        all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)
-
-    # Default to always using normal aliases
-    if not all_aliases_maps:
-        all_aliases_maps.append(_NORMAL_ALIASES)
-        all_aliases_maps.append(_PROC_MACRO_ALIASES)
-
-    aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)
-
-    if not aliases:
-        return dict()
-
-    common_items = aliases.pop(_COMMON_CONDITION, {}).items()
-
-    # If there are only common items in the dictionary, immediately return them
-    if not len(aliases.keys()) == 1:
-        return dict(common_items)
-
-    # Build a single select statement where each conditional has accounted for the
-    # common set of aliases.
-    crate_aliases = {"//conditions:default": dict(common_items)}
-    for condition, deps in aliases.items():
-        condition_triples = _CONDITIONS[condition]
-        for triple in condition_triples:
-            if triple in crate_aliases:
-                crate_aliases[triple].update(deps)
-            else:
-                crate_aliases.update({triple: dict(deps.items() + common_items)})
-
-    return select(crate_aliases)
-
-###############################################################################
-# WORKSPACE MEMBER DEPS AND ALIASES
-###############################################################################
-
-_NORMAL_DEPENDENCIES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-            "aes": "@crate_index__aes-0.8.3//:aes",
-            "anstyle": "@crate_index__anstyle-1.0.4//:anstyle",
-            "anyhow": "@crate_index__anyhow-1.0.75//:anyhow",
-            "arrayvec": "@crate_index__arrayvec-0.7.4//:arrayvec",
-            "asn1": "@crate_index__asn1-0.15.5//:asn1",
-            "bitflags": "@crate_index__bitflags-2.4.0//:bitflags",
-            "bitvec": "@crate_index__bitvec-1.0.1//:bitvec",
-            "byteorder": "@crate_index__byteorder-1.5.0//:byteorder",
-            "chrono": "@crate_index__chrono-0.4.31//:chrono",
-            "clap": "@crate_index__clap-4.4.7//:clap",
-            "clap-num": "@crate_index__clap-num-1.0.2//:clap_num",
-            "const-oid": "@crate_index__const-oid-0.9.6//:const_oid",
-            "crc": "@crate_index__crc-3.0.1//:crc",
-            "cryptoki": "@crate_index__cryptoki-0.5.0//:cryptoki",
-            "cryptoki-sys": "@crate_index__cryptoki-sys-0.1.6//:cryptoki_sys",
-            "der": "@crate_index__der-0.7.8//:der",
-            "deser-hjson": "@crate_index__deser-hjson-2.1.0//:deser_hjson",
-            "directories": "@crate_index__directories-5.0.1//:directories",
-            "ecdsa": "@crate_index__ecdsa-0.16.9//:ecdsa",
-            "elf": "@crate_index__elf-0.7.2//:elf",
-            "elliptic-curve": "@crate_index__elliptic-curve-0.13.8//:elliptic_curve",
-            "env_logger": "@crate_index__env_logger-0.10.0//:env_logger",
-            "erased-serde": "@crate_index__erased-serde-0.3.31//:erased_serde",
-            "foreign-types": "@crate_index__foreign-types-0.3.2//:foreign_types",
-            "ftdi": "@crate_index__ftdi-0.1.3//:ftdi",
-            "heck": "@crate_index__heck-0.4.1//:heck",
-            "hex": "@crate_index__hex-0.4.3//:hex",
-            "humantime": "@crate_index__humantime-2.1.0//:humantime",
-            "humantime-serde": "@crate_index__humantime-serde-1.1.1//:humantime_serde",
-            "indexmap": "@crate_index__indexmap-2.0.0//:indexmap",
-            "indicatif": "@crate_index__indicatif-0.17.6//:indicatif",
-            "log": "@crate_index__log-0.4.20//:log",
-            "mdbook": "@crate_index__mdbook-0.4.34//:mdbook",
-            "memchr": "@crate_index__memchr-2.6.4//:memchr",
-            "memoffset": "@crate_index__memoffset-0.9.0//:memoffset",
-            "mio": "@crate_index__mio-0.8.8//:mio",
-            "mio-signals": "@crate_index__mio-signals-0.2.0//:mio_signals",
-            "num-bigint-dig": "@crate_index__num-bigint-dig-0.8.4//:num_bigint_dig",
-            "num-traits": "@crate_index__num-traits-0.2.17//:num_traits",
-            "num_enum": "@crate_index__num_enum-0.7.0//:num_enum",
-            "object": "@crate_index__object-0.32.1//:object",
-            "once_cell": "@crate_index__once_cell-1.18.0//:once_cell",
-            "openssl": "@crate_index__openssl-0.10.64//:openssl",
-            "openssl-sys": "@crate_index__openssl-sys-0.9.102//:openssl_sys",
-            "p256": "@crate_index__p256-0.13.2//:p256",
-            "p384": "@crate_index__p384-0.13.0//:p384",
-            "pem-rfc7468": "@crate_index__pem-rfc7468-0.7.0//:pem_rfc7468",
-            "pest": "@crate_index__pest-2.7.3//:pest",
-            "proc-macro2": "@crate_index__proc-macro2-1.0.69//:proc_macro2",
-            "quote": "@crate_index__quote-1.0.33//:quote",
-            "rand": "@crate_index__rand-0.8.5//:rand",
-            "rand_chacha": "@crate_index__rand_chacha-0.3.1//:rand_chacha",
-            "regex": "@crate_index__regex-1.9.4//:regex",
-            "ring": "@crate_index__ring-0.16.20//:ring",
-            "rsa": "@crate_index__rsa-0.9.2//:rsa",
-            "rsa-der": "@crate_index__rsa-der-0.3.0//:rsa_der",
-            "rusb": "@crate_index__rusb-0.9.3//:rusb",
-            "rust-crypto": "@crate_index__rust-crypto-0.2.36//:crypto",
-            "rustix": "@crate_index__rustix-0.38.10//:rustix",
-            "scopeguard": "@crate_index__scopeguard-1.2.0//:scopeguard",
-            "secrecy": "@crate_index__secrecy-0.8.0//:secrecy",
-            "serde": "@crate_index__serde-1.0.189//:serde",
-            "serde_bytes": "@crate_index__serde_bytes-0.11.12//:serde_bytes",
-            "serde_json": "@crate_index__serde_json-1.0.107//:serde_json",
-            "serde_with": "@crate_index__serde_with-3.4.0//:serde_with",
-            "serialport": "@crate_index__serialport-4.2.2//:serialport",
-            "sha2": "@crate_index__sha2-0.10.7//:sha2",
-            "sha3": "@crate_index__sha3-0.10.8//:sha3",
-            "shellwords": "@crate_index__shellwords-1.1.0//:shellwords",
-            "strum": "@crate_index__strum-0.25.0//:strum",
-            "syn": "@crate_index__syn-2.0.38//:syn",
-            "tar": "@crate_index__tar-0.4.40//:tar",
-            "tempfile": "@crate_index__tempfile-3.8.0//:tempfile",
-            "thiserror": "@crate_index__thiserror-1.0.49//:thiserror",
-            "tiny-keccak": "@crate_index__tiny-keccak-2.0.2//:tiny_keccak",
-            "typetag": "@crate_index__typetag-0.2.13//:typetag",
-            "zerocopy": "@crate_index__zerocopy-0.7.11//:zerocopy",
-        },
-    },
-}
-
-_NORMAL_ALIASES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-        },
-    },
-}
-
-_NORMAL_DEV_DEPENDENCIES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-            "base64ct": "@crate_index__base64ct-1.6.0//:base64ct",
-        },
-    },
-}
-
-_NORMAL_DEV_ALIASES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-        },
-    },
-}
-
-_PROC_MACRO_DEPENDENCIES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-            "paste": "@crate_index__paste-1.0.14//:paste",
-            "pest_derive": "@crate_index__pest_derive-2.7.3//:pest_derive",
-        },
-    },
-}
-
-_PROC_MACRO_ALIASES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-        },
-    },
-}
-
-_PROC_MACRO_DEV_DEPENDENCIES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-            "indoc": "@crate_index__indoc-2.0.4//:indoc",
-        },
-    },
-}
-
-_PROC_MACRO_DEV_ALIASES = {
-    "third_party/rust": {
-        _COMMON_CONDITION: {
-        },
-    },
-}
-
-_BUILD_DEPENDENCIES = {
-    "third_party/rust": {
-    },
-}
-
-_BUILD_ALIASES = {
-    "third_party/rust": {
-    },
-}
-
-_BUILD_PROC_MACRO_DEPENDENCIES = {
-    "third_party/rust": {
-    },
-}
-
-_BUILD_PROC_MACRO_ALIASES = {
-    "third_party/rust": {
-    },
-}
-
-_CONDITIONS = {
-    "aarch64-apple-darwin": ["@rules_rust//rust/platform:aarch64-apple-darwin"],
-    "aarch64-apple-ios": ["@rules_rust//rust/platform:aarch64-apple-ios"],
-    "aarch64-apple-ios-sim": ["@rules_rust//rust/platform:aarch64-apple-ios-sim"],
-    "aarch64-fuchsia": ["@rules_rust//rust/platform:aarch64-fuchsia"],
-    "aarch64-linux-android": ["@rules_rust//rust/platform:aarch64-linux-android"],
-    "aarch64-pc-windows-gnullvm": [],
-    "aarch64-pc-windows-msvc": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc"],
-    "aarch64-unknown-linux-gnu": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu"],
-    "aarch64-uwp-windows-msvc": [],
-    "arm-unknown-linux-gnueabi": ["@rules_rust//rust/platform:arm-unknown-linux-gnueabi"],
-    "armv7-linux-androideabi": ["@rules_rust//rust/platform:armv7-linux-androideabi"],
-    "armv7-unknown-linux-gnueabi": ["@rules_rust//rust/platform:armv7-unknown-linux-gnueabi"],
-    "cfg(all(any(target_os = \"android\", target_os = \"linux\"), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))": ["@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-linux-android"],
-    "cfg(all(not(rustix_use_libc), not(miri), target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\"))))": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(all(not(windows), any(rustix_use_libc, miri, not(all(target_os = \"linux\", target_endian = \"little\", any(target_arch = \"arm\", all(target_arch = \"aarch64\", target_pointer_width = \"64\"), target_arch = \"riscv64\", all(rustix_use_experimental_asm, target_arch = \"powerpc64\"), all(rustix_use_experimental_asm, target_arch = \"mips\"), all(rustix_use_experimental_asm, target_arch = \"mips32r6\"), all(rustix_use_experimental_asm, target_arch = \"mips64\"), all(rustix_use_experimental_asm, target_arch = \"mips64r6\"), target_arch = \"x86\", all(target_arch = \"x86_64\", target_pointer_width = \"64\")))))))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(all(target_arch = \"aarch64\", target_env = \"msvc\", not(windows_raw_dylib)))": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc"],
-    "cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu"],
-    "cfg(all(target_arch = \"aarch64\", target_vendor = \"apple\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim"],
-    "cfg(all(target_arch = \"wasm32\", not(any(target_os = \"emscripten\", target_os = \"wasi\"))))": ["@rules_rust//rust/platform:wasm32-unknown-unknown"],
-    "cfg(all(target_arch = \"wasm32\", target_vendor = \"unknown\", target_os = \"unknown\", target_env = \"\"))": ["@rules_rust//rust/platform:wasm32-unknown-unknown"],
-    "cfg(all(target_arch = \"x86\", target_env = \"gnu\", not(windows_raw_dylib)))": ["@rules_rust//rust/platform:i686-unknown-linux-gnu"],
-    "cfg(all(target_arch = \"x86\", target_env = \"msvc\", not(windows_raw_dylib)))": ["@rules_rust//rust/platform:i686-pc-windows-msvc"],
-    "cfg(all(target_arch = \"x86_64\", target_env = \"gnu\", not(target_abi = \"llvm\"), not(windows_raw_dylib)))": ["@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(all(target_arch = \"x86_64\", target_env = \"msvc\", not(windows_raw_dylib)))": ["@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "cfg(all(target_os = \"linux\", not(target_env = \"musl\")))": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(all(windows, target_env = \"msvc\"))": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(any(target_arch = \"x86\", target_arch = \"x86_64\", all(any(target_arch = \"aarch64\", target_arch = \"arm\"), any(target_os = \"android\", target_os = \"fuchsia\", target_os = \"linux\"))))": ["@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(any(target_os = \"android\", target_os = \"linux\"))": ["@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(any(target_os = \"dragonfly\", target_os = \"freebsd\", target_os = \"illumos\", target_os = \"netbsd\", target_os = \"openbsd\", target_os = \"solaris\"))": ["@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-freebsd"],
-    "cfg(any(target_os = \"ios\", target_os = \"macos\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios"],
-    "cfg(any(target_os = \"macos\", target_os = \"ios\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios"],
-    "cfg(any(unix, target_os = \"wasi\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(not(all(windows, target_env = \"msvc\")))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(not(all(windows, target_env = \"msvc\", not(target_vendor = \"uwp\"))))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(not(any(windows, target_os = \"hermit\", target_os = \"unknown\")))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(not(windows))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(not(windows_raw_dylib))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:riscv32imc-unknown-none-elf", "@rules_rust//rust/platform:riscv64gc-unknown-none-elf", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:thumbv7em-none-eabi", "@rules_rust//rust/platform:thumbv8m.main-none-eabi", "@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-    "cfg(target_arch = \"aarch64\")": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu"],
-    "cfg(target_arch = \"wasm32\")": ["@rules_rust//rust/platform:wasm32-unknown-unknown", "@rules_rust//rust/platform:wasm32-wasi"],
-    "cfg(target_env = \"msvc\")": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "cfg(target_env = \"sgx\")": [],
-    "cfg(target_os = \"android\")": ["@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:x86_64-linux-android"],
-    "cfg(target_os = \"fuchsia\")": ["@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:x86_64-fuchsia"],
-    "cfg(target_os = \"haiku\")": [],
-    "cfg(target_os = \"hermit\")": [],
-    "cfg(target_os = \"linux\")": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(target_os = \"redox\")": [],
-    "cfg(target_os = \"wasi\")": ["@rules_rust//rust/platform:wasm32-wasi"],
-    "cfg(target_os = \"windows\")": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "cfg(unix)": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:arm-unknown-linux-gnueabi", "@rules_rust//rust/platform:armv7-linux-androideabi", "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:powerpc-unknown-linux-gnu", "@rules_rust//rust/platform:s390x-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "cfg(windows)": ["@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "i686-apple-darwin": ["@rules_rust//rust/platform:i686-apple-darwin"],
-    "i686-linux-android": ["@rules_rust//rust/platform:i686-linux-android"],
-    "i686-pc-windows-gnu": [],
-    "i686-pc-windows-msvc": ["@rules_rust//rust/platform:i686-pc-windows-msvc"],
-    "i686-unknown-freebsd": ["@rules_rust//rust/platform:i686-unknown-freebsd"],
-    "i686-unknown-linux-gnu": ["@rules_rust//rust/platform:i686-unknown-linux-gnu"],
-    "i686-uwp-windows-gnu": [],
-    "i686-uwp-windows-msvc": [],
-    "powerpc-unknown-linux-gnu": ["@rules_rust//rust/platform:powerpc-unknown-linux-gnu"],
-    "riscv32imc-unknown-none-elf": ["@rules_rust//rust/platform:riscv32imc-unknown-none-elf"],
-    "riscv64gc-unknown-none-elf": ["@rules_rust//rust/platform:riscv64gc-unknown-none-elf"],
-    "s390x-unknown-linux-gnu": ["@rules_rust//rust/platform:s390x-unknown-linux-gnu"],
-    "thumbv7em-none-eabi": ["@rules_rust//rust/platform:thumbv7em-none-eabi"],
-    "thumbv8m.main-none-eabi": ["@rules_rust//rust/platform:thumbv8m.main-none-eabi"],
-    "wasm32-unknown-unknown": ["@rules_rust//rust/platform:wasm32-unknown-unknown"],
-    "wasm32-wasi": ["@rules_rust//rust/platform:wasm32-wasi"],
-    "x86_64-apple-darwin": ["@rules_rust//rust/platform:x86_64-apple-darwin"],
-    "x86_64-apple-ios": ["@rules_rust//rust/platform:x86_64-apple-ios"],
-    "x86_64-fuchsia": ["@rules_rust//rust/platform:x86_64-fuchsia"],
-    "x86_64-linux-android": ["@rules_rust//rust/platform:x86_64-linux-android"],
-    "x86_64-pc-windows-gnu": [],
-    "x86_64-pc-windows-gnullvm": [],
-    "x86_64-pc-windows-msvc": ["@rules_rust//rust/platform:x86_64-pc-windows-msvc"],
-    "x86_64-unknown-freebsd": ["@rules_rust//rust/platform:x86_64-unknown-freebsd"],
-    "x86_64-unknown-linux-gnu": ["@rules_rust//rust/platform:x86_64-unknown-linux-gnu"],
-    "x86_64-unknown-none": ["@rules_rust//rust/platform:x86_64-unknown-none"],
-    "x86_64-uwp-windows-gnu": [],
-    "x86_64-uwp-windows-msvc": [],
-}
-
-###############################################################################
-
-def crate_repositories():
-    """A macro for defining repositories for all generated crates"""
-    maybe(
-        http_archive,
-        name = "crate_index__CoreFoundation-sys-0.1.4",
-        sha256 = "d0e9889e6db118d49d88d84728d0e964d973a5680befb5f85f55141beea5c20b",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/CoreFoundation-sys/0.1.4/download"],
-        strip_prefix = "CoreFoundation-sys-0.1.4",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.CoreFoundation-sys-0.1.4.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__IOKit-sys-0.1.5",
-        sha256 = "99696c398cbaf669d2368076bdb3d627fb0ce51a26899d7c61228c5c0af3bf4a",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/IOKit-sys/0.1.5/download"],
-        strip_prefix = "IOKit-sys-0.1.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.IOKit-sys-0.1.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__addr2line-0.21.0",
-        sha256 = "8a30b2e23b9e17a9f90641c7ab1549cd9b44f296d3ccbf309d2863cfe398a0cb",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/addr2line/0.21.0/download"],
-        strip_prefix = "addr2line-0.21.0",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.addr2line-0.21.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__adler-1.0.2",
-        sha256 = "f26201604c87b1e01bd3d98f8d5d9a8fcbb815e8cedb41ffccbeb4bf593a35fe",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/adler/1.0.2/download"],
-        strip_prefix = "adler-1.0.2",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.adler-1.0.2.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__aes-0.8.3",
-        sha256 = "ac1f845298e95f983ff1944b728ae08b8cebab80d684f0a832ed0fc74dfa27e2",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/aes/0.8.3/download"],
-        strip_prefix = "aes-0.8.3",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.aes-0.8.3.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__aho-corasick-1.0.5",
-        sha256 = "0c378d78423fdad8089616f827526ee33c19f2fddbd5de1629152c9593ba4783",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/aho-corasick/1.0.5/download"],
-        strip_prefix = "aho-corasick-1.0.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.aho-corasick-1.0.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__ammonia-3.3.0",
-        sha256 = "64e6d1c7838db705c9b756557ee27c384ce695a1c51a6fe528784cb1c6840170",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/ammonia/3.3.0/download"],
-        strip_prefix = "ammonia-3.3.0",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.ammonia-3.3.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__android-tzdata-0.1.1",
-        sha256 = "e999941b234f3131b00bc13c22d06e8c5ff726d1b6318ac7eb276997bbb4fef0",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/android-tzdata/0.1.1/download"],
-        strip_prefix = "android-tzdata-0.1.1",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.android-tzdata-0.1.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__android_system_properties-0.1.5",
-        sha256 = "819e7219dbd41043ac279b19830f2efc897156490d7fd6ea916720117ee66311",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/android_system_properties/0.1.5/download"],
-        strip_prefix = "android_system_properties-0.1.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.android_system_properties-0.1.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anstream-0.6.4",
-        sha256 = "2ab91ebe16eb252986481c5b62f6098f3b698a45e34b5b98200cf20dd2484a44",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anstream/0.6.4/download"],
-        strip_prefix = "anstream-0.6.4",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.anstream-0.6.4.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anstyle-1.0.4",
-        sha256 = "7079075b41f533b8c61d2a4d073c4676e1f8b249ff94a393b0595db304e0dd87",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anstyle/1.0.4/download"],
-        strip_prefix = "anstyle-1.0.4",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.anstyle-1.0.4.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anstyle-parse-0.2.2",
-        sha256 = "317b9a89c1868f5ea6ff1d9539a69f45dffc21ce321ac1fd1160dfa48c8e2140",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anstyle-parse/0.2.2/download"],
-        strip_prefix = "anstyle-parse-0.2.2",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.anstyle-parse-0.2.2.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anstyle-query-1.0.0",
-        sha256 = "5ca11d4be1bab0c8bc8734a9aa7bf4ee8316d462a08c6ac5052f888fef5b494b",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anstyle-query/1.0.0/download"],
-        strip_prefix = "anstyle-query-1.0.0",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.anstyle-query-1.0.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anstyle-wincon-3.0.1",
-        sha256 = "f0699d10d2f4d628a98ee7b57b289abbc98ff3bad977cb3152709d4bf2330628",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anstyle-wincon/3.0.1/download"],
-        strip_prefix = "anstyle-wincon-3.0.1",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.anstyle-wincon-3.0.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__anyhow-1.0.75",
-        sha256 = "a4668cab20f66d8d020e1fbc0ebe47217433c1b6c8f2040faf858554e394ace6",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/anyhow/1.0.75/download"],
-        strip_prefix = "anyhow-1.0.75",
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-    maybe(
-        http_archive,
-        name = "crate_index__windows_x86_64_gnu-0.48.5",
-        sha256 = "53d40abd2583d23e4718fddf1ebec84dbff8381c07cae67ff7768bbf19c6718e",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/windows_x86_64_gnu/0.48.5/download"],
-        strip_prefix = "windows_x86_64_gnu-0.48.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.windows_x86_64_gnu-0.48.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__windows_x86_64_gnullvm-0.42.2",
-        sha256 = "26d41b46a36d453748aedef1486d5c7a85db22e56aff34643984ea85514e94a3",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/windows_x86_64_gnullvm/0.42.2/download"],
-        strip_prefix = "windows_x86_64_gnullvm-0.42.2",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.windows_x86_64_gnullvm-0.42.2.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__windows_x86_64_gnullvm-0.48.5",
-        sha256 = "0b7b52767868a23d5bab768e390dc5f5c55825b6d30b86c844ff2dc7414044cc",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/windows_x86_64_gnullvm/0.48.5/download"],
-        strip_prefix = "windows_x86_64_gnullvm-0.48.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.windows_x86_64_gnullvm-0.48.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__windows_x86_64_msvc-0.42.2",
-        sha256 = "9aec5da331524158c6d1a4ac0ab1541149c0b9505fde06423b02f5ef0106b9f0",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/windows_x86_64_msvc/0.42.2/download"],
-        strip_prefix = "windows_x86_64_msvc-0.42.2",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.windows_x86_64_msvc-0.42.2.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__windows_x86_64_msvc-0.48.5",
-        sha256 = "ed94fce61571a4006852b7389a063ab983c02eb1bb37b47f8272ce92d06d9538",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/windows_x86_64_msvc/0.48.5/download"],
-        strip_prefix = "windows_x86_64_msvc-0.48.5",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.windows_x86_64_msvc-0.48.5.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__winnow-0.5.15",
-        sha256 = "7c2e3184b9c4e92ad5167ca73039d0c42476302ab603e2fec4487511f38ccefc",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/winnow/0.5.15/download"],
-        strip_prefix = "winnow-0.5.15",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.winnow-0.5.15.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__wyz-0.5.1",
-        sha256 = "05f360fc0b24296329c78fda852a1e9ae82de9cf7b27dae4b7f62f118f77b9ed",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/wyz/0.5.1/download"],
-        strip_prefix = "wyz-0.5.1",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.wyz-0.5.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__xattr-1.0.1",
-        sha256 = "f4686009f71ff3e5c4dbcf1a282d0a44db3f021ba69350cd42086b3e5f1c6985",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/xattr/1.0.1/download"],
-        strip_prefix = "xattr-1.0.1",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.xattr-1.0.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__zerocopy-0.7.11",
-        sha256 = "4c19fae0c8a9efc6a8281f2e623db8af1db9e57852e04cde3e754dd2dc29340f",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/zerocopy/0.7.11/download"],
-        strip_prefix = "zerocopy-0.7.11",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.zerocopy-0.7.11.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__zerocopy-derive-0.7.11",
-        sha256 = "fc56589e9ddd1f1c28d4b4b5c773ce232910a6bb67a70133d61c9e347585efe9",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/zerocopy-derive/0.7.11/download"],
-        strip_prefix = "zerocopy-derive-0.7.11",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.zerocopy-derive-0.7.11.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "crate_index__zeroize-1.7.0",
-        sha256 = "525b4ec142c6b68a2d10f01f7bbf6755599ca3f81ea53b8431b7dd348f5fdb2d",
-        type = "tar.gz",
-        urls = ["https://static.crates.io/crates/zeroize/1.7.0/download"],
-        strip_prefix = "zeroize-1.7.0",
-        build_file = Label("@lowrisc_opentitan//third_party/rust/crates:BUILD.zeroize-1.7.0.bazel"),
-    )
diff --git a/third_party/rust/deps.bzl b/third_party/rust/deps.bzl
deleted file mode 100644
index ea5dba2a2e891..0000000000000
--- a/third_party/rust/deps.bzl
+++ /dev/null
@@ -1,27 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@rules_rust//bindgen:repositories.bzl", "rust_bindgen_dependencies")
-load("@rules_rust//rust:repositories.bzl", "rules_rust_dependencies", "rust_register_toolchains", "rust_repository_set")
-load("@rules_rust//tools/rust_analyzer:deps.bzl", "rust_analyzer_dependencies")
-
-def rust_deps():
-    rules_rust_dependencies()
-    rust_register_toolchains(
-        # TODO(#15300): set this to `True` to support rust-analyzer, after fixing
-        # upstream `rules_rust`.
-        #include_rustc_srcs = False,
-        edition = "2021",
-        versions = ["1.71.1", "nightly/2023-07-30"],
-        extra_target_triples = [
-            "riscv32imc-unknown-none-elf",
-        ],
-    )
-
-    rust_bindgen_dependencies()
-    native.register_toolchains(
-        "//third_party/rust:bindgen_toolchain",
-    )
-
-    rust_analyzer_dependencies()
diff --git a/third_party/rust/extensions.bzl b/third_party/rust/extensions.bzl
new file mode 100644
index 0000000000000..0c70eda70fd86
--- /dev/null
+++ b/third_party/rust/extensions.bzl
@@ -0,0 +1,17 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+serde_annotate = module_extension(
+    implementation = lambda _: _serde_annotate_repo(),
+)
+
+def _serde_annotate_repo():
+    http_archive(
+        name = "lowrisc_serde_annotate",
+        sha256 = "7300ed093fa3de679512ffdab7d0f1824be2b11f499bb852df29c3ae12e1348d",
+        strip_prefix = "serde-annotate-0.0.12",
+        url = "https://github.com/lowRISC/serde-annotate/archive/refs/tags/v0.0.12.tar.gz",
+    )
diff --git a/third_party/rust/patches/cryptoki-profile.patch b/third_party/rust/patches/cryptoki-profile.patch
new file mode 100644
index 0000000000000..ac4fdcefac4aa
--- /dev/null
+++ b/third_party/rust/patches/cryptoki-profile.patch
@@ -0,0 +1,22 @@
+diff --git a/cryptoki/src/object.rs b/cryptoki/src/object.rs
+index 19c74de..f85ac60 100644
+--- a/cryptoki/src/object.rs
++++ b/cryptoki/src/object.rs
+@@ -1007,6 +1007,9 @@ impl ObjectClass {
+     /// An OTP key object
+     pub const OTP_KEY: ObjectClass = ObjectClass { val: CKO_OTP_KEY };
+ 
++    /// A profile object
++    pub const PROFILE: ObjectClass = ObjectClass { val: 9 };
++
+     pub(crate) fn stringify(class: CK_OBJECT_CLASS) -> String {
+         match class {
+             CKO_DATA => String::from(stringify!(CKO_DATA)),
+@@ -1057,6 +1060,7 @@ impl TryFrom<CK_OBJECT_CLASS> for ObjectClass {
+             CKO_DOMAIN_PARAMETERS => Ok(ObjectClass::DOMAIN_PARAMETERS),
+             CKO_MECHANISM => Ok(ObjectClass::MECHANISM),
+             CKO_OTP_KEY => Ok(ObjectClass::OTP_KEY),
++            9 => Ok(ObjectClass::PROFILE),
+ 
+             _ => {
+                 error!("Object class {} is not supported.", object_class);
diff --git a/third_party/rust/patches/cryptoki-vendor-defined-mechanism-type.patch b/third_party/rust/patches/cryptoki-vendor-defined-mechanism-type.patch
index 4773ab4251fda..4275b7e5e6802 100644
--- a/third_party/rust/patches/cryptoki-vendor-defined-mechanism-type.patch
+++ b/third_party/rust/patches/cryptoki-vendor-defined-mechanism-type.patch
@@ -1,10 +1,10 @@
 diff --git a/cryptoki/src/mechanism/mod.rs b/cryptoki/src/mechanism/mod.rs
-index f00d0ef..b4e346e 100644
+index 4b9041e..0986133 100644
 --- a/cryptoki/src/mechanism/mod.rs
 +++ b/cryptoki/src/mechanism/mod.rs
-@@ -637,8 +637,12 @@ impl TryFrom<CK_MECHANISM_TYPE> for MechanismType {
-             CKM_SHA384_RSA_PKCS => Ok(MechanismType::SHA384_RSA_PKCS),
-             CKM_SHA512_RSA_PKCS => Ok(MechanismType::SHA512_RSA_PKCS),
+@@ -765,8 +765,12 @@ impl TryFrom<CK_MECHANISM_TYPE> for MechanismType {
+             CKM_HKDF_DERIVE => Ok(MechanismType::HKDF_DERIVE),
+             CKM_HKDF_DATA => Ok(MechanismType::HKDF_DATA),
              other => {
 -                error!("Mechanism type {} is not supported.", other);
 -                Err(Error::NotSupported)
diff --git a/third_party/rust/patches/rules_rust.bindgen_static_lib.patch b/third_party/rust/patches/rules_rust.bindgen_static_lib.patch
new file mode 100644
index 0000000000000..78eef1a6c72cb
--- /dev/null
+++ b/third_party/rust/patches/rules_rust.bindgen_static_lib.patch
@@ -0,0 +1,15 @@
+diff --git a/extensions/bindgen/private/bindgen.bzl b/extensions/bindgen/private/bindgen.bzl
+--- private/bindgen.bzl
++++ private/bindgen.bzl
+@@ -152,11 +152,6 @@ def _generate_cc_link_build_info(ctx, cc_lib):
+                 linker_search_paths.append(lib.pic_static_library.dirname)
+                 compile_data.append(lib.pic_static_library)
+ 
+-    if not compile_data:
+-        fail("No static libraries found in {}".format(
+-            cc_lib.label,
+-        ))
+-
+     rustc_flags_file = ctx.actions.declare_file("{}.rustc_flags".format(ctx.label.name))
+     ctx.actions.write(
+         output = rustc_flags_file,
diff --git a/third_party/rust/patches/rules_rust.experimental.patch b/third_party/rust/patches/rules_rust.experimental.patch
new file mode 100644
index 0000000000000..8935aeebe02cb
--- /dev/null
+++ b/third_party/rust/patches/rules_rust.experimental.patch
@@ -0,0 +1,15 @@
+diff --git a/rust/private/rustc.bzl b/rust/private/rustc.bzl
+--- rust/private/rustc.bzl
++++ rust/private/rustc.bzl
+@@ -1518,11 +1518,6 @@ def rustc_compile_action(
+         "source_attributes": ["srcs"],
+     }
+ 
+-    if experimental_use_coverage_metadata_files:
+-        instrumented_files_kwargs.update({
+-            "metadata_files": coverage_runfiles + [executable] if executable else [],
+-        })
+-
+     providers = [
+         DefaultInfo(
+             # nb. This field is required for cc_library to depend on our output.
diff --git a/third_party/rust/patches/rules_rust.extra_rustc_toolchain_dirs.patch b/third_party/rust/patches/rules_rust.extra_rustc_toolchain_dirs.patch
new file mode 100644
index 0000000000000..3840281533031
--- /dev/null
+++ b/third_party/rust/patches/rules_rust.extra_rustc_toolchain_dirs.patch
@@ -0,0 +1,173 @@
+commit 9ae095002fa2050f09f86e20f804ca2e96fd66c9
+Author: Tim Trippel <ttrippel@google.com>
+Date:   Wed Sep 13 09:56:21 2023 -0700
+
+    Add build setting to enable specifying other tool locations
+    
+    On some systems, the CC toolchain discovered by bazel uses a different
+    path for the linker than where the linker (that is specified by the
+    `-fuse-ld=` flag) actually lives on the system.
+    
+    The issue stems from rules_rust deciding to pass `-fuse-ld=lld` a link arg,
+    rather than just using what was detected by the CC toolchain. This results
+    in the linker not being found, as reported by
+    https://github.com/lowRISC/opentitan/issues/12448
+    
+    This is a workaround that enables telling rules_rust where other linker
+    directories might be on your system. It is used by passing
+    `--@rules_rust//:extra_rustc_toolchain_dirs=/path/to/somewhere/else` to
+    `bazel ...` invocations.
+    
+    Signed-off-by: Tim Trippel <ttrippel@google.com>
+
+diff --git a/BUILD.bazel b/BUILD.bazel
+index 3dfbda71..cafb693e 100644
+--- BUILD.bazel
++++ BUILD.bazel
+@@ -72,6 +72,12 @@ alias(
+     visibility = ["//visibility:public"],
+ )
+ 
++alias(
++    name = "extra_rustc_toolchain_dirs",
++    actual = "//rust/settings:extra_rustc_toolchain_dirs",
++    visibility = ["//visibility:public"],
++)
++
+ alias(
+     name = "clippy.toml",
+     actual = "//rust/settings:clippy.toml",
+diff --git a/rust/defs.bzl b/rust/defs.bzl
+index e05c4ada..604e1aeb 100644
+--- rust/defs.bzl
++++ rust/defs.bzl
+@@ -53,6 +53,7 @@ load(
+     _extra_exec_rustc_flags = "extra_exec_rustc_flags",
+     _extra_rustc_flag = "extra_rustc_flag",
+     _extra_rustc_flags = "extra_rustc_flags",
++    _extra_rustc_toolchain_dirs = "extra_rustc_toolchain_dirs",
+     _no_std = "no_std",
+     _per_crate_rustc_flag = "per_crate_rustc_flag",
+     _rustc_output_diagnostics = "rustc_output_diagnostics",
+@@ -137,6 +138,9 @@ extra_rustc_flag = _extra_rustc_flag
+ extra_rustc_flags = _extra_rustc_flags
+ # See @rules_rust//rust/private:rustc.bzl for a complete description.
+ 
++extra_rustc_toolchain_dirs = _extra_rustc_toolchain_dirs
++# See @rules_rust//rust/private:rustc.bzl for a complete description.
++
+ extra_exec_rustc_flag = _extra_exec_rustc_flag
+ # See @rules_rust//rust/private:rustc.bzl for a complete description.
+ 
+diff --git a/rust/private/rust.bzl b/rust/private/rust.bzl
+index 74d458ee..f5168968 100644
+--- rust/private/rust.bzl
++++ rust/private/rust.bzl
+@@ -543,6 +543,9 @@ RUSTC_ATTRS = {
+     "_extra_rustc_flags": attr.label(
+         default = Label("//rust/settings:extra_rustc_flags"),
+     ),
++    "_extra_rustc_toolchain_dirs": attr.label(
++        default = Label("//:extra_rustc_toolchain_dirs"),
++    ),
+     "_is_proc_macro_dep": attr.label(
+         default = Label("//rust/private:is_proc_macro_dep"),
+     ),
+diff --git a/rust/private/rustc.bzl b/rust/private/rustc.bzl
+index 93c84408..ac6e20b9 100644
+--- rust/private/rustc.bzl
++++ rust/private/rustc.bzl
+@@ -82,6 +82,11 @@ PerCrateRustcFlagsInfo = provider(
+     fields = {"per_crate_rustc_flags": "List[string] Extra flags to pass to rustc in non-exec configuration"},
+ )
+ 
++ExtraRustcToolchainDirsInfo = provider(
++    doc = "Pass each value as an additional `-B` flag to rustc invocations. Enables use of linkers placed in different directories on the system.",
++    fields = {"extra_rustc_toolchain_dirs": "List[string] Extra `-B` flags to pass to rustc."},
++)
++
+ IsProcMacroDepInfo = provider(
+     doc = "Records if this is a transitive dependency of a proc-macro.",
+     fields = {"is_proc_macro_dep": "Boolean"},
+@@ -452,6 +457,10 @@ def get_linker_and_args(ctx, crate_type, cc_toolchain, feature_configuration, rp
+         action_name = action_name,
+         variables = link_variables,
+     )
++
++    # Make sure linker is locateable.
++    if hasattr(ctx.attr, "_extra_rustc_toolchain_dirs"):
++        link_args = link_args + ctx.attr._extra_rustc_toolchain_dirs[ExtraRustcToolchainDirsInfo].extra_rustc_toolchain_dirs
+     link_env = cc_common.get_environment_variables(
+         feature_configuration = feature_configuration,
+         action_name = action_name,
+@@ -2322,6 +2331,19 @@ per_crate_rustc_flag = rule(
+     build_setting = config.string_list(flag = True, repeatable = True),
+ )
+ 
++def _extra_rustc_toolchain_dirs_impl(ctx):
++    return ExtraRustcToolchainDirsInfo(extra_rustc_toolchain_dirs = ["-B" + f for f in ctx.build_setting_value if f != ""])
++
++extra_rustc_toolchain_dirs = rule(
++    doc = (
++        "Add additional `-B` rustc toolchain flags to specificy where CC toolchain executables are located on the system by" +
++        "using the command line switch `--@rules_rust//:extra_rustc_toolchain_dirs`. " +
++        "Multiple uses are accumulated."
++    ),
++    implementation = _extra_rustc_toolchain_dirs_impl,
++    build_setting = config.string(flag = True, allow_multiple = True),
++)
++
+ def _no_std_impl(ctx):
+     value = str(ctx.attr._no_std[BuildSettingInfo].value)
+     if is_exec_configuration(ctx):
+diff --git a/rust/settings/BUILD.bazel b/rust/settings/BUILD.bazel
+index 8fb46461..c5e7d6e5 100644
+--- rust/settings/BUILD.bazel
++++ rust/settings/BUILD.bazel
+@@ -17,6 +17,7 @@ load(
+     "extra_exec_rustc_flags",
+     "extra_rustc_flag",
+     "extra_rustc_flags",
++    "extra_rustc_toolchain_dirs",
+     "incompatible_change_rust_test_compilation_output_directory",
+     "incompatible_do_not_include_data_in_compile_data",
+     "lto",
+@@ -81,6 +82,8 @@ extra_rustc_flag()
+ 
+ extra_rustc_flags()
+ 
++extra_rustc_toolchain_dirs()
++
+ incompatible_change_rust_test_compilation_output_directory()
+ 
+ incompatible_do_not_include_data_in_compile_data()
+diff --git a/rust/settings/settings.bzl b/rust/settings/settings.bzl
+index 2f235df0..249bbac3 100644
+--- rust/settings/settings.bzl
++++ rust/settings/settings.bzl
+@@ -23,6 +23,7 @@ load(
+     _extra_exec_rustc_flags = "extra_exec_rustc_flags",
+     _extra_rustc_flag = "extra_rustc_flag",
+     _extra_rustc_flags = "extra_rustc_flags",
++    _extra_rustc_toolchain_dirs = "extra_rustc_toolchain_dirs",
+     _no_std = "no_std",
+     _per_crate_rustc_flag = "per_crate_rustc_flag",
+     _rustc_output_diagnostics = "rustc_output_diagnostics",
+@@ -269,6 +270,17 @@ def clippy_flag():
+         build_setting_default = [],
+     )
+ 
++# buildifier: disable=unnamed-macro
++def extra_rustc_toolchain_dirs():
++    """This setting is to enable passing additional `-B` options to the CC toolchain driver binary to
++    aid in locating toolchain directories on systems where not all toolchain tools are installed in
++    the same system location.
++    """
++    _extra_rustc_toolchain_dirs(
++        name = "extra_rustc_toolchain_dirs",
++        build_setting_default = "",
++    )
++
+ # buildifier: disable=unnamed-macro
+ def extra_rustc_flags():
+     """This setting may be used to pass extra options to rustc from the command line in non-exec configuration.
diff --git a/third_party/rust/patches/rules_rust.transition.patch b/third_party/rust/patches/rules_rust.transition.patch
new file mode 100644
index 0000000000000..952516832536d
--- /dev/null
+++ b/third_party/rust/patches/rules_rust.transition.patch
@@ -0,0 +1,13 @@
+diff --git a/extensions/bindgen/private/llvm_utils.bzl b/extensions/bindgen/private/llvm_utils.bzl
+--- private/llvm_utils.bzl
++++ private/llvm_utils.bzl
+@@ -42,6 +42,9 @@ _COMMON_ATTRS = {
+         doc = "The target to transition.",
+         mandatory = True,
+     ),
++    "_allowlist_function_transition": attr.label(
++        default = "@bazel_tools//tools/allowlists/function_transition_allowlist",
++    ),
+ }
+ 
+ def _cc_stdcc17_transitioned_target_impl(ctx):
diff --git a/third_party/rust/repos.bzl b/third_party/rust/repos.bzl
deleted file mode 100644
index 38dfb5d42faaa..0000000000000
--- a/third_party/rust/repos.bzl
+++ /dev/null
@@ -1,109 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@//rules:repo.bzl", "http_archive_or_local")
-
-_CLANG_BUILD_FILE = """\
-load("@rules_cc//cc:defs.bzl", "cc_import")
-
-package(default_visibility = ["//visibility:public"])
-
-sh_binary(
-    name = "clang",
-    srcs = ["bin/clang"],
-)
-
-filegroup(
-    name = "system_includes",
-    srcs = glob(["lib/clang/{version}/include/**"]),
-)
-
-cc_import(
-    name = "libclang",
-    shared_library = "lib/libclang.{suffix}",
-)
-
-cc_import(
-    name = "libc++",
-    shared_library = "lib/libc++.{suffix}"
-)
-"""
-
-_LIBSTDCXX_BUILD_FILE = """\
-load("@rules_cc//cc:defs.bzl", "cc_import")
-
-package(default_visibility = ["//visibility:public"])
-
-cc_import(
-    name = "libstdc++",
-    shared_library = "lib64/libstdc++.so.6"
-)
-"""
-
-_NO_LIBSTDCXX_BUILD_FILE = """\
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "libstdc++",
-    srcs = [],
-)
-"""
-
-def _rust_bindgen_libstdcxx_impl(rctx):
-    libstdcxx_path = rctx.os.environ.get("RULES_RUST_BINDGEN_LIBSTDCXX_DIR")
-    if libstdcxx_path:
-        rctx.file("BUILD.bazel", _LIBSTDCXX_BUILD_FILE)
-        rctx.symlink(libstdcxx_path, "lib64")
-    else:
-        # We need an empty `libstdc++` target for the analysis performed
-        # by the airgapped environment preparation.
-        rctx.file("BUILD.bazel", _NO_LIBSTDCXX_BUILD_FILE)
-
-rust_bindgen_libstdcxx = repository_rule(
-    implementation = _rust_bindgen_libstdcxx_impl,
-    environ = ["RULES_RUST_BINDGEN_LIBSTDCXX_DIR"],
-)
-
-def rust_repos(rules_rust = None, serde_annotate = None):
-    # Since rules_rust 0.23.0, bindgen depedns on the llvm project and
-    # builds the llvm libaries from source.  Building llvm from source has a
-    # huge impact on build times.  Instead, we depend on a pre-built llvm
-    # release and instantiate the bindgen toolchain with the prebuilt
-    # binaries.
-    # Releases @ http://releases.llvm.org/download.html
-    http_archive_or_local(
-        name = "bindgen_clang_linux",
-        urls = ["https://github.com/llvm/llvm-project/releases/download/llvmorg-10.0.0/clang+llvm-10.0.0-x86_64-linux-gnu-ubuntu-18.04.tar.xz"],
-        strip_prefix = "clang+llvm-10.0.0-x86_64-linux-gnu-ubuntu-18.04",
-        sha256 = "b25f592a0c00686f03e3b7db68ca6dc87418f681f4ead4df4745a01d9be63843",
-        build_file_content = _CLANG_BUILD_FILE.format(
-            version = "10.0.0",
-            suffix = "so",
-        ),
-    )
-
-    # If an appropriate version of `libstdc++.so.6` is not available as part of
-    # the default system libraries (e.g. if running on an old OS because of
-    # EDA tooling), then an appopriate version can be supplied by setting
-    # RULES_RUST_BINDGEN_LIBSTDCXX_DIR to the location of the library.
-    rust_bindgen_libstdcxx(name = "bindgen_libstdcxx_linux")
-
-    # We use forked/patched Rust Bazel rules to enable caching repository rules
-    # required for air-gapped Bazel builds. See lowRISC/opentitan:#15300 for
-    # more details.
-    http_archive_or_local(
-        name = "rules_rust",
-        local = rules_rust,
-        sha256 = "1a110ae8bfa34091e2a62e4c0325f8231f934b2956f3a585d4cafba5c81c2676",
-        strip_prefix = "rules_rust-rebase-20231115_01",
-        url = "https://github.com/lowRISC/rules_rust/archive/refs/tags/rebase-20231115_01.tar.gz",
-    )
-
-    http_archive_or_local(
-        name = "lowrisc_serde_annotate",
-        local = serde_annotate,
-        sha256 = "7d6db7c811469f3abd6b58745bd2b8ebb7596a68974739da51bc8b6568c8002a",
-        strip_prefix = "serde-annotate-0.0.11",
-        url = "https://github.com/lowRISC/serde-annotate/archive/refs/tags/v0.0.11.tar.gz",
-    )
diff --git a/third_party/shellcheck/extensions.bzl b/third_party/shellcheck/extensions.bzl
new file mode 100644
index 0000000000000..aa5651afd2113
--- /dev/null
+++ b/third_party/shellcheck/extensions.bzl
@@ -0,0 +1,25 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+shellcheck = module_extension(
+    implementation = lambda _: _shellcheck_repos(),
+)
+
+def _shellcheck_repos():
+    SHELLCHECK_VERSION = "v0.9.0"
+
+    http_archive(
+        name = "shellcheck",
+        url = "https://github.com/koalaman/shellcheck/releases/download/{version}/shellcheck-{version}.linux.x86_64.tar.xz".format(
+            version = SHELLCHECK_VERSION,
+        ),
+        sha256 = "700324c6dd0ebea0117591c6cc9d7350d9c7c5c287acbad7630fa17b1d4d9e2f",
+        strip_prefix = "shellcheck-" + SHELLCHECK_VERSION,
+        build_file_content = """
+package(default_visibility = ["//visibility:public"])
+exports_files(glob(["**"]))
+""",
+    )
diff --git a/third_party/shellcheck/repos.bzl b/third_party/shellcheck/repos.bzl
deleted file mode 100644
index 645a79d77760d..0000000000000
--- a/third_party/shellcheck/repos.bzl
+++ /dev/null
@@ -1,22 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:repo.bzl", "http_archive_or_local")
-
-def shellcheck_repos(local = None):
-    SHELLCHECK_VERSION = "v0.9.0"
-
-    http_archive_or_local(
-        name = "shellcheck",
-        local = local,
-        url = "https://github.com/koalaman/shellcheck/releases/download/{version}/shellcheck-{version}.linux.x86_64.tar.xz".format(
-            version = SHELLCHECK_VERSION,
-        ),
-        sha256 = "700324c6dd0ebea0117591c6cc9d7350d9c7c5c287acbad7630fa17b1d4d9e2f",
-        strip_prefix = "shellcheck-" + SHELLCHECK_VERSION,
-        build_file_content = """
-package(default_visibility = ["//visibility:public"])
-exports_files(glob(["**"]))
-""",
-    )
diff --git a/third_party/skylib/repos.bzl b/third_party/skylib/repos.bzl
index 1b6e8d899de02..c8a8b4613be25 100644
--- a/third_party/skylib/repos.bzl
+++ b/third_party/skylib/repos.bzl
@@ -15,8 +15,8 @@ def bazel_skylib_repos(local = None):
         maybe(
             http_archive,
             name = "bazel_skylib",
-            sha256 = "cd55a062e763b9349921f0f5db8c3933288dc8ba4f76dd9416aac68acee3cb94",
+            sha256 = "bc283cdfcd526a52c3201279cda4bc298652efa898b10b4db0837dc51652756f",
             urls = [
-                "https://github.com/bazelbuild/bazel-skylib/releases/download/1.5.0/bazel-skylib-1.5.0.tar.gz",
+                "https://github.com/bazelbuild/bazel-skylib/releases/download/1.7.1/bazel-skylib-1.7.1.tar.gz",
             ],
         )
diff --git a/third_party/sphincsplus/extensions.bzl b/third_party/sphincsplus/extensions.bzl
new file mode 100644
index 0000000000000..00a7dec4a27a3
--- /dev/null
+++ b/third_party/sphincsplus/extensions.bzl
@@ -0,0 +1,44 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+sphincsplus = module_extension(
+    implementation = lambda _: _sphincsplus_repos(),
+)
+
+def _sphincsplus_repos(local = None):
+    http_archive(
+        name = "sphincsplus_shake256_kat",
+        build_file = Label("@lowrisc_opentitan//third_party/sphincsplus:BUILD.sphincsplus_common.bazel"),
+        sha256 = "95f5c79995ad8a3bc752c760f93ec409763cf2b23d1a7a7404219f26d665f7ab",
+        urls = [
+            # Self-hosted GCP ZIP that contains the 128s/SHAKE256 test
+            # vectors for the FIPS-205 Initial Public Draft (fips205-ipd),
+            # which does not have an official NIST-hosted release yet.
+            "https://storage.googleapis.com/ot-crypto-test-vectors/sphincsplus/sphincsplus_shake256_128s_fips205-ipd.zip",
+        ],
+    )
+    http_archive(
+        name = "sphincsplus_sha256_kat",
+        build_file = Label("@lowrisc_opentitan//third_party/sphincsplus:BUILD.sphincsplus_common.bazel"),
+        sha256 = "1656a6aa06d731905ef72fcfbdf65f365d4c0fe89cbf3b24d1dbb64669a25e35",
+        urls = [
+            # Self-hosted GCP ZIP that contains the 128s/SHAKE256 test
+            # vectors for the FIPS-205 Initial Public Draft (fips205-ipd),
+            # which does not have an official NIST-hosted release yet.
+            "https://storage.googleapis.com/ot-crypto-test-vectors/sphincsplus/sphincsplus_sha256_128s_fips205-ipd.zip",
+        ],
+    )
+    http_archive(
+        name = "sphincsplus_fips205_ipd",
+        url = "https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz",
+        strip_prefix = "sphincsplus-129b72c80e122a22a61f71b5d2b042770890ccee/ref",
+        build_file = "@lowrisc_opentitan//third_party/sphincsplus:BUILD.sphincsplus.bazel",
+        sha256 = "b301faa7a42ef538323a732929d49341b1cbd8375f643f7d98ca32cd6efacc32",
+        patches = [
+            Label("@lowrisc_opentitan//third_party/sphincsplus/patches:sphincsplus-namespace.patch"),
+        ],
+        patch_args = ["-p2"],
+    )
diff --git a/third_party/sphincsplus/patches/BUILD b/third_party/sphincsplus/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/sphincsplus/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/sphincsplus/sphincsplus-namespace.patch b/third_party/sphincsplus/patches/sphincsplus-namespace.patch
similarity index 100%
rename from third_party/sphincsplus/sphincsplus-namespace.patch
rename to third_party/sphincsplus/patches/sphincsplus-namespace.patch
diff --git a/third_party/sphincsplus/repos.bzl b/third_party/sphincsplus/repos.bzl
deleted file mode 100644
index 7fe1f50cc046b..0000000000000
--- a/third_party/sphincsplus/repos.bzl
+++ /dev/null
@@ -1,42 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("//rules:repo.bzl", "http_archive_or_local")
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def sphincsplus_repos(local = None):
-    http_archive(
-        name = "sphincsplus_shake256_kat",
-        build_file = Label("//third_party/sphincsplus:BUILD.sphincsplus_common.bazel"),
-        sha256 = "95f5c79995ad8a3bc752c760f93ec409763cf2b23d1a7a7404219f26d665f7ab",
-        urls = [
-            # Self-hosted GCP ZIP that contains the 128s/SHAKE256 test
-            # vectors for the FIPS-205 Initial Public Draft (fips205-ipd),
-            # which does not have an official NIST-hosted release yet.
-            "https://storage.googleapis.com/ot-crypto-test-vectors/sphincsplus/sphincsplus_shake256_128s_fips205-ipd.zip",
-        ],
-    )
-    http_archive(
-        name = "sphincsplus_sha256_kat",
-        build_file = Label("//third_party/sphincsplus:BUILD.sphincsplus_common.bazel"),
-        sha256 = "1656a6aa06d731905ef72fcfbdf65f365d4c0fe89cbf3b24d1dbb64669a25e35",
-        urls = [
-            # Self-hosted GCP ZIP that contains the 128s/SHAKE256 test
-            # vectors for the FIPS-205 Initial Public Draft (fips205-ipd),
-            # which does not have an official NIST-hosted release yet.
-            "https://storage.googleapis.com/ot-crypto-test-vectors/sphincsplus/sphincsplus_sha256_128s_fips205-ipd.zip",
-        ],
-    )
-    http_archive_or_local(
-        name = "sphincsplus_fips205_ipd",
-        local = local,
-        url = "https://github.com/sphincs/sphincsplus/archive/129b72c80e122a22a61f71b5d2b042770890ccee.tar.gz",
-        strip_prefix = "sphincsplus-129b72c80e122a22a61f71b5d2b042770890ccee/ref",
-        build_file = "//third_party/sphincsplus:BUILD.sphincsplus.bazel",
-        sha256 = "b301faa7a42ef538323a732929d49341b1cbd8375f643f7d98ca32cd6efacc32",
-        patches = [
-            Label("//third_party/sphincsplus:sphincsplus-namespace.patch"),
-        ],
-        patch_args = ["-p2"],
-    )
diff --git a/third_party/tock/BUILD b/third_party/tock/BUILD
index 6e55c918c2edf..e352100e3b9e8 100644
--- a/third_party/tock/BUILD
+++ b/third_party/tock/BUILD
@@ -1,13 +1,12 @@
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-load("@rules_rust//crate_universe:defs.bzl", "crate", "crates_vendor")
 
-crates_vendor(
-    name = "tock_index",
-    cargo_lockfile = "//third_party/tock:Cargo.lock",
-    manifests = ["//third_party/tock:Cargo.toml"],
-    mode = "remote",
-    tags = ["manual"],
-    vendor_path = "crates",
+load("@rules_python//python/entry_points:py_console_script_binary.bzl", "py_console_script_binary")
+
+package(default_visibility = ["//visibility:public"])
+
+py_console_script_binary(
+    name = "tockloader",
+    pkg = "@ot_python_deps//tockloader",
 )
diff --git a/third_party/tock/crates/BUILD.bazel b/third_party/tock/crates/BUILD.bazel
deleted file mode 100644
index 56449aed0e9b4..0000000000000
--- a/third_party/tock/crates/BUILD.bazel
+++ /dev/null
@@ -1,38 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-package(default_visibility = ["//visibility:public"])
-
-exports_files(
-    [
-        "cargo-bazel.json",
-        "crates.bzl",
-        "defs.bzl",
-    ] + glob(["*.bazel"]),
-)
-
-filegroup(
-    name = "srcs",
-    srcs = glob([
-        "*.bazel",
-        "*.bzl",
-    ]),
-)
-
-# Workspace Member Dependencies
-alias(
-    name = "ghash",
-    actual = "@tock_index__ghash-0.4.4//:ghash",
-    tags = ["manual"],
-)
-
-alias(
-    name = "libm",
-    actual = "@tock_index__libm-0.2.7//:libm",
-    tags = ["manual"],
-)
diff --git a/third_party/tock/crates/BUILD.cfg-if-1.0.0.bazel b/third_party/tock/crates/BUILD.cfg-if-1.0.0.bazel
deleted file mode 100644
index d12b31a9d3959..0000000000000
--- a/third_party/tock/crates/BUILD.cfg-if-1.0.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "cfg_if",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cfg-if",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.0.0",
-)
diff --git a/third_party/tock/crates/BUILD.cpufeatures-0.2.9.bazel b/third_party/tock/crates/BUILD.cpufeatures-0.2.9.bazel
deleted file mode 100644
index fb25eb2d70a3b..0000000000000
--- a/third_party/tock/crates/BUILD.cpufeatures-0.2.9.bazel
+++ /dev/null
@@ -1,94 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "cpufeatures",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=cpufeatures",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.9",
-    deps = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@tock_index__libc-0.2.147//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@tock_index__libc-0.2.147//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@tock_index__libc-0.2.147//:libc",  # cfg(all(target_arch = "aarch64", target_vendor = "apple"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@tock_index__libc-0.2.147//:libc",  # aarch64-linux-android
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@tock_index__libc-0.2.147//:libc",  # cfg(all(target_arch = "aarch64", target_os = "linux"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/tock/crates/BUILD.generic-array-0.14.7.bazel b/third_party/tock/crates/BUILD.generic-array-0.14.7.bazel
deleted file mode 100644
index c81497d1915fb..0000000000000
--- a/third_party/tock/crates/BUILD.generic-array-0.14.7.bazel
+++ /dev/null
@@ -1,121 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT
-# ])
-
-rust_library(
-    name = "generic_array",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=generic-array",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.14.7",
-    deps = [
-        "@tock_index__generic-array-0.14.7//:build_script_build",
-        "@tock_index__typenum-1.16.0//:typenum",
-    ],
-)
-
-cargo_build_script(
-    name = "generic-array_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=generic-array",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.14.7",
-    visibility = ["//visibility:private"],
-    deps = [
-        "@tock_index__version_check-0.9.4//:version_check",
-    ],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "generic-array_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/tock/crates/BUILD.ghash-0.4.4.bazel b/third_party/tock/crates/BUILD.ghash-0.4.4.bazel
deleted file mode 100644
index 50be2b6e39803..0000000000000
--- a/third_party/tock/crates/BUILD.ghash-0.4.4.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "ghash",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=ghash",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.4",
-    deps = [
-        "@tock_index__opaque-debug-0.3.0//:opaque_debug",
-        "@tock_index__polyval-0.5.3//:polyval",
-    ],
-)
diff --git a/third_party/tock/crates/BUILD.libc-0.2.147.bazel b/third_party/tock/crates/BUILD.libc-0.2.147.bazel
deleted file mode 100644
index 5f4c37cb49fa3..0000000000000
--- a/third_party/tock/crates/BUILD.libc-0.2.147.bazel
+++ /dev/null
@@ -1,125 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "libc",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.147",
-    deps = [
-        "@tock_index__libc-0.2.147//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libc_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-        "std",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2015",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libc",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.147",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libc_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/tock/crates/BUILD.libm-0.2.7.bazel b/third_party/tock/crates/BUILD.libm-0.2.7.bazel
deleted file mode 100644
index 5d32cf7bf5c14..0000000000000
--- a/third_party/tock/crates/BUILD.libm-0.2.7.bazel
+++ /dev/null
@@ -1,123 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "libm",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_features = [
-        "default",
-    ],
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.2.7",
-    deps = [
-        "@tock_index__libm-0.2.7//:build_script_build",
-    ],
-)
-
-cargo_build_script(
-    name = "libm_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_features = [
-        "default",
-    ],
-    crate_name = "build_script_build",
-    crate_root = "build.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=libm",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "0.2.7",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_build",
-    actual = "libm_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/tock/crates/BUILD.opaque-debug-0.3.0.bazel b/third_party/tock/crates/BUILD.opaque-debug-0.3.0.bazel
deleted file mode 100644
index 8bc37d86575ad..0000000000000
--- a/third_party/tock/crates/BUILD.opaque-debug-0.3.0.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "opaque_debug",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=opaque-debug",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.3.0",
-)
diff --git a/third_party/tock/crates/BUILD.polyval-0.5.3.bazel b/third_party/tock/crates/BUILD.polyval-0.5.3.bazel
deleted file mode 100644
index fec9119bfd662..0000000000000
--- a/third_party/tock/crates/BUILD.polyval-0.5.3.bazel
+++ /dev/null
@@ -1,143 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # Apache-2.0 OR MIT
-# ])
-
-rust_library(
-    name = "polyval",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=polyval",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.5.3",
-    deps = [
-        "@tock_index__cfg-if-1.0.0//:cfg_if",
-        "@tock_index__opaque-debug-0.3.0//:opaque_debug",
-        "@tock_index__universal-hash-0.4.1//:universal_hash",
-    ] + select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-linux-android": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-apple-darwin": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-linux-android": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-linux-android": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [
-            "@tock_index__cpufeatures-0.2.9//:cpufeatures",  # cfg(any(target_arch = "aarch64", target_arch = "x86_64", target_arch = "x86"))
-        ],
-        "//conditions:default": [],
-    }),
-)
diff --git a/third_party/tock/crates/BUILD.subtle-2.4.1.bazel b/third_party/tock/crates/BUILD.subtle-2.4.1.bazel
deleted file mode 100644
index 77dbe9b7e67c2..0000000000000
--- a/third_party/tock/crates/BUILD.subtle-2.4.1.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # BSD-3-Clause
-# ])
-
-rust_library(
-    name = "subtle",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=subtle",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "2.4.1",
-)
diff --git a/third_party/tock/crates/BUILD.typenum-1.16.0.bazel b/third_party/tock/crates/BUILD.typenum-1.16.0.bazel
deleted file mode 100644
index 766168c7ed2f1..0000000000000
--- a/third_party/tock/crates/BUILD.typenum-1.16.0.bazel
+++ /dev/null
@@ -1,117 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//cargo:defs.bzl", "cargo_build_script")
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "typenum",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typenum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "1.16.0",
-    deps = [
-        "@tock_index__typenum-1.16.0//:build_script_main",
-    ],
-)
-
-cargo_build_script(
-    name = "typenum_build_script",
-    srcs = glob(["**/*.rs"]),
-    crate_name = "build_script_main",
-    crate_root = "build/main.rs",
-    data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    edition = "2018",
-    rustc_flags = [
-        "--cap-lints=allow",
-    ],
-    tags = [
-        "cargo-bazel",
-        "crate-name=typenum",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    version = "1.16.0",
-    visibility = ["//visibility:private"],
-)
-
-alias(
-    name = "build_script_main",
-    actual = "typenum_build_script",
-    tags = ["manual"],
-)
diff --git a/third_party/tock/crates/BUILD.universal-hash-0.4.1.bazel b/third_party/tock/crates/BUILD.universal-hash-0.4.1.bazel
deleted file mode 100644
index 2b475d59f1d0a..0000000000000
--- a/third_party/tock/crates/BUILD.universal-hash-0.4.1.bazel
+++ /dev/null
@@ -1,80 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT OR Apache-2.0
-# ])
-
-rust_library(
-    name = "universal_hash",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2018",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=universal-hash",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.4.1",
-    deps = [
-        "@tock_index__generic-array-0.14.7//:generic_array",
-        "@tock_index__subtle-2.4.1//:subtle",
-    ],
-)
diff --git a/third_party/tock/crates/BUILD.version_check-0.9.4.bazel b/third_party/tock/crates/BUILD.version_check-0.9.4.bazel
deleted file mode 100644
index 81bb59aded180..0000000000000
--- a/third_party/tock/crates/BUILD.version_check-0.9.4.bazel
+++ /dev/null
@@ -1,76 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-
-load("@rules_rust//rust:defs.bzl", "rust_library")
-
-package(default_visibility = ["//visibility:public"])
-
-# licenses([
-#     "TODO",  # MIT/Apache-2.0
-# ])
-
-rust_library(
-    name = "version_check",
-    srcs = glob(["**/*.rs"]),
-    compile_data = glob(
-        include = ["**"],
-        exclude = [
-            "**/* *",
-            ".tmp_git_root/**/*",
-            "BUILD",
-            "BUILD.bazel",
-            "WORKSPACE",
-            "WORKSPACE.bazel",
-        ],
-    ),
-    crate_root = "src/lib.rs",
-    edition = "2015",
-    rustc_flags = ["--cap-lints=allow"],
-    tags = [
-        "cargo-bazel",
-        "crate-name=version_check",
-        "manual",
-        "noclippy",
-        "norustfmt",
-    ],
-    target_compatible_with = select({
-        "@rules_rust//rust/platform:aarch64-apple-darwin": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios": [],
-        "@rules_rust//rust/platform:aarch64-apple-ios-sim": [],
-        "@rules_rust//rust/platform:aarch64-fuchsia": [],
-        "@rules_rust//rust/platform:aarch64-linux-android": [],
-        "@rules_rust//rust/platform:aarch64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:aarch64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:arm-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:armv7-linux-androideabi": [],
-        "@rules_rust//rust/platform:armv7-unknown-linux-gnueabi": [],
-        "@rules_rust//rust/platform:i686-apple-darwin": [],
-        "@rules_rust//rust/platform:i686-linux-android": [],
-        "@rules_rust//rust/platform:i686-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:i686-unknown-freebsd": [],
-        "@rules_rust//rust/platform:i686-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:powerpc-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:riscv32imc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:riscv64gc-unknown-none-elf": [],
-        "@rules_rust//rust/platform:s390x-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:thumbv7em-none-eabi": [],
-        "@rules_rust//rust/platform:thumbv8m.main-none-eabi": [],
-        "@rules_rust//rust/platform:wasm32-unknown-unknown": [],
-        "@rules_rust//rust/platform:wasm32-wasi": [],
-        "@rules_rust//rust/platform:x86_64-apple-darwin": [],
-        "@rules_rust//rust/platform:x86_64-apple-ios": [],
-        "@rules_rust//rust/platform:x86_64-fuchsia": [],
-        "@rules_rust//rust/platform:x86_64-linux-android": [],
-        "@rules_rust//rust/platform:x86_64-pc-windows-msvc": [],
-        "@rules_rust//rust/platform:x86_64-unknown-freebsd": [],
-        "@rules_rust//rust/platform:x86_64-unknown-linux-gnu": [],
-        "@rules_rust//rust/platform:x86_64-unknown-none": [],
-        "//conditions:default": ["@platforms//:incompatible"],
-    }),
-    version = "0.9.4",
-)
diff --git a/third_party/tock/crates/crates.bzl b/third_party/tock/crates/crates.bzl
deleted file mode 100644
index 656ccc0263462..0000000000000
--- a/third_party/tock/crates/crates.bzl
+++ /dev/null
@@ -1,25 +0,0 @@
-###############################################################################
-# @generated
-# This file is auto-generated by the cargo-bazel tool.
-#
-# DO NOT MODIFY: Local changes may be replaced in future executions.
-###############################################################################
-"""Rules for defining repositories for remote `crates_vendor` repositories"""
-
-load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
-
-# buildifier: disable=bzl-visibility
-load("@lowrisc_opentitan//third_party/tock/crates:defs.bzl", _crate_repositories = "crate_repositories")
-
-# buildifier: disable=bzl-visibility
-load("@rules_rust//crate_universe/private:crates_vendor.bzl", "crates_vendor_remote_repository")
-
-def crate_repositories():
-    maybe(
-        crates_vendor_remote_repository,
-        name = "tock_index",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.bazel"),
-        defs_module = Label("@lowrisc_opentitan//third_party/tock/crates:defs.bzl"),
-    )
-
-    _crate_repositories()
diff --git a/third_party/tock/crates/defs.bzl b/third_party/tock/crates/defs.bzl
deleted file mode 100644
index 5794e8e4cc49d..0000000000000
--- a/third_party/tock/crates/defs.bzl
+++ /dev/null
@@ -1,490 +0,0 @@
-###############################################################################
-# @generated
-# DO NOT MODIFY: This file is auto-generated by a crate_universe tool. To
-# regenerate this file, run the following:
-#
-#     bazel run @//third_party/tock:tock_index
-###############################################################################
-"""
-# `crates_repository` API
-
-- [aliases](#aliases)
-- [crate_deps](#crate_deps)
-- [all_crate_deps](#all_crate_deps)
-- [crate_repositories](#crate_repositories)
-
-"""
-
-load("@bazel_skylib//lib:selects.bzl", "selects")
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-load("@bazel_tools//tools/build_defs/repo:utils.bzl", "maybe")
-
-###############################################################################
-# MACROS API
-###############################################################################
-
-# An identifier that represent common dependencies (unconditional).
-_COMMON_CONDITION = ""
-
-def _flatten_dependency_maps(all_dependency_maps):
-    """Flatten a list of dependency maps into one dictionary.
-
-    Dependency maps have the following structure:
-
-    ```python
-    DEPENDENCIES_MAP = {
-        # The first key in the map is a Bazel package
-        # name of the workspace this file is defined in.
-        "workspace_member_package": {
-
-            # Not all dependencies are supported for all platforms.
-            # the condition key is the condition required to be true
-            # on the host platform.
-            "condition": {
-
-                # An alias to a crate target.     # The label of the crate target the
-                # Aliases are only crate names.   # package name refers to.
-                "package_name":                   "@full//:label",
-            }
-        }
-    }
-    ```
-
-    Args:
-        all_dependency_maps (list): A list of dicts as described above
-
-    Returns:
-        dict: A dictionary as described above
-    """
-    dependencies = {}
-
-    for workspace_deps_map in all_dependency_maps:
-        for pkg_name, conditional_deps_map in workspace_deps_map.items():
-            if pkg_name not in dependencies:
-                non_frozen_map = dict()
-                for key, values in conditional_deps_map.items():
-                    non_frozen_map.update({key: dict(values.items())})
-                dependencies.setdefault(pkg_name, non_frozen_map)
-                continue
-
-            for condition, deps_map in conditional_deps_map.items():
-                # If the condition has not been recorded, do so and continue
-                if condition not in dependencies[pkg_name]:
-                    dependencies[pkg_name].setdefault(condition, dict(deps_map.items()))
-                    continue
-
-                # Alert on any miss-matched dependencies
-                inconsistent_entries = []
-                for crate_name, crate_label in deps_map.items():
-                    existing = dependencies[pkg_name][condition].get(crate_name)
-                    if existing and existing != crate_label:
-                        inconsistent_entries.append((crate_name, existing, crate_label))
-                    dependencies[pkg_name][condition].update({crate_name: crate_label})
-
-    return dependencies
-
-def crate_deps(deps, package_name = None):
-    """Finds the fully qualified label of the requested crates for the package where this macro is called.
-
-    Args:
-        deps (list): The desired list of crate targets.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()`.
-
-    Returns:
-        list: A list of labels to generated rust targets (str)
-    """
-
-    if not deps:
-        return []
-
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Join both sets of dependencies
-    dependencies = _flatten_dependency_maps([
-        _NORMAL_DEPENDENCIES,
-        _NORMAL_DEV_DEPENDENCIES,
-        _PROC_MACRO_DEPENDENCIES,
-        _PROC_MACRO_DEV_DEPENDENCIES,
-        _BUILD_DEPENDENCIES,
-        _BUILD_PROC_MACRO_DEPENDENCIES,
-    ]).pop(package_name, {})
-
-    # Combine all conditional packages so we can easily index over a flat list
-    # TODO: Perhaps this should actually return select statements and maintain
-    # the conditionals of the dependencies
-    flat_deps = {}
-    for deps_set in dependencies.values():
-        for crate_name, crate_label in deps_set.items():
-            flat_deps.update({crate_name: crate_label})
-
-    missing_crates = []
-    crate_targets = []
-    for crate_target in deps:
-        if crate_target not in flat_deps:
-            missing_crates.append(crate_target)
-        else:
-            crate_targets.append(flat_deps[crate_target])
-
-    if missing_crates:
-        fail("Could not find crates `{}` among dependencies of `{}`. Available dependencies were `{}`".format(
-            missing_crates,
-            package_name,
-            dependencies,
-        ))
-
-    return crate_targets
-
-def all_crate_deps(
-        normal = False,
-        normal_dev = False,
-        proc_macro = False,
-        proc_macro_dev = False,
-        build = False,
-        build_proc_macro = False,
-        package_name = None):
-    """Finds the fully qualified label of all requested direct crate dependencies \
-    for the package where this macro is called.
-
-    If no parameters are set, all normal dependencies are returned. Setting any one flag will
-    otherwise impact the contents of the returned list.
-
-    Args:
-        normal (bool, optional): If True, normal dependencies are included in the
-            output list.
-        normal_dev (bool, optional): If True, normal dev dependencies will be
-            included in the output list..
-        proc_macro (bool, optional): If True, proc_macro dependencies are included
-            in the output list.
-        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are
-            included in the output list.
-        build (bool, optional): If True, build dependencies are included
-            in the output list.
-        build_proc_macro (bool, optional): If True, build proc_macro dependencies are
-            included in the output list.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()` when unset.
-
-    Returns:
-        list: A list of labels to generated rust targets (str)
-    """
-
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Determine the relevant maps to use
-    all_dependency_maps = []
-    if normal:
-        all_dependency_maps.append(_NORMAL_DEPENDENCIES)
-    if normal_dev:
-        all_dependency_maps.append(_NORMAL_DEV_DEPENDENCIES)
-    if proc_macro:
-        all_dependency_maps.append(_PROC_MACRO_DEPENDENCIES)
-    if proc_macro_dev:
-        all_dependency_maps.append(_PROC_MACRO_DEV_DEPENDENCIES)
-    if build:
-        all_dependency_maps.append(_BUILD_DEPENDENCIES)
-    if build_proc_macro:
-        all_dependency_maps.append(_BUILD_PROC_MACRO_DEPENDENCIES)
-
-    # Default to always using normal dependencies
-    if not all_dependency_maps:
-        all_dependency_maps.append(_NORMAL_DEPENDENCIES)
-
-    dependencies = _flatten_dependency_maps(all_dependency_maps).pop(package_name, None)
-
-    if not dependencies:
-        if dependencies == None:
-            fail("Tried to get all_crate_deps for package " + package_name + " but that package had no Cargo.toml file")
-        else:
-            return []
-
-    crate_deps = list(dependencies.pop(_COMMON_CONDITION, {}).values())
-    for condition, deps in dependencies.items():
-        crate_deps += selects.with_or({
-            tuple(_CONDITIONS[condition]): deps.values(),
-            "//conditions:default": [],
-        })
-
-    return crate_deps
-
-def aliases(
-        normal = False,
-        normal_dev = False,
-        proc_macro = False,
-        proc_macro_dev = False,
-        build = False,
-        build_proc_macro = False,
-        package_name = None):
-    """Produces a map of Crate alias names to their original label
-
-    If no dependency kinds are specified, `normal` and `proc_macro` are used by default.
-    Setting any one flag will otherwise determine the contents of the returned dict.
-
-    Args:
-        normal (bool, optional): If True, normal dependencies are included in the
-            output list.
-        normal_dev (bool, optional): If True, normal dev dependencies will be
-            included in the output list..
-        proc_macro (bool, optional): If True, proc_macro dependencies are included
-            in the output list.
-        proc_macro_dev (bool, optional): If True, dev proc_macro dependencies are
-            included in the output list.
-        build (bool, optional): If True, build dependencies are included
-            in the output list.
-        build_proc_macro (bool, optional): If True, build proc_macro dependencies are
-            included in the output list.
-        package_name (str, optional): The package name of the set of dependencies to look up.
-            Defaults to `native.package_name()` when unset.
-
-    Returns:
-        dict: The aliases of all associated packages
-    """
-    if package_name == None:
-        package_name = native.package_name()
-
-    # Determine the relevant maps to use
-    all_aliases_maps = []
-    if normal:
-        all_aliases_maps.append(_NORMAL_ALIASES)
-    if normal_dev:
-        all_aliases_maps.append(_NORMAL_DEV_ALIASES)
-    if proc_macro:
-        all_aliases_maps.append(_PROC_MACRO_ALIASES)
-    if proc_macro_dev:
-        all_aliases_maps.append(_PROC_MACRO_DEV_ALIASES)
-    if build:
-        all_aliases_maps.append(_BUILD_ALIASES)
-    if build_proc_macro:
-        all_aliases_maps.append(_BUILD_PROC_MACRO_ALIASES)
-
-    # Default to always using normal aliases
-    if not all_aliases_maps:
-        all_aliases_maps.append(_NORMAL_ALIASES)
-        all_aliases_maps.append(_PROC_MACRO_ALIASES)
-
-    aliases = _flatten_dependency_maps(all_aliases_maps).pop(package_name, None)
-
-    if not aliases:
-        return dict()
-
-    common_items = aliases.pop(_COMMON_CONDITION, {}).items()
-
-    # If there are only common items in the dictionary, immediately return them
-    if not len(aliases.keys()) == 1:
-        return dict(common_items)
-
-    # Build a single select statement where each conditional has accounted for the
-    # common set of aliases.
-    crate_aliases = {"//conditions:default": dict(common_items)}
-    for condition, deps in aliases.items():
-        condition_triples = _CONDITIONS[condition]
-        for triple in condition_triples:
-            if triple in crate_aliases:
-                crate_aliases[triple].update(deps)
-            else:
-                crate_aliases.update({triple: dict(deps.items() + common_items)})
-
-    return select(crate_aliases)
-
-###############################################################################
-# WORKSPACE MEMBER DEPS AND ALIASES
-###############################################################################
-
-_NORMAL_DEPENDENCIES = {
-    "third_party/tock": {
-        _COMMON_CONDITION: {
-            "ghash": "@tock_index__ghash-0.4.4//:ghash",
-            "libm": "@tock_index__libm-0.2.7//:libm",
-        },
-    },
-}
-
-_NORMAL_ALIASES = {
-    "third_party/tock": {
-        _COMMON_CONDITION: {
-        },
-    },
-}
-
-_NORMAL_DEV_DEPENDENCIES = {
-    "third_party/tock": {
-    },
-}
-
-_NORMAL_DEV_ALIASES = {
-    "third_party/tock": {
-    },
-}
-
-_PROC_MACRO_DEPENDENCIES = {
-    "third_party/tock": {
-    },
-}
-
-_PROC_MACRO_ALIASES = {
-    "third_party/tock": {
-    },
-}
-
-_PROC_MACRO_DEV_DEPENDENCIES = {
-    "third_party/tock": {
-    },
-}
-
-_PROC_MACRO_DEV_ALIASES = {
-    "third_party/tock": {
-    },
-}
-
-_BUILD_DEPENDENCIES = {
-    "third_party/tock": {
-    },
-}
-
-_BUILD_ALIASES = {
-    "third_party/tock": {
-    },
-}
-
-_BUILD_PROC_MACRO_DEPENDENCIES = {
-    "third_party/tock": {
-    },
-}
-
-_BUILD_PROC_MACRO_ALIASES = {
-    "third_party/tock": {
-    },
-}
-
-_CONDITIONS = {
-    "aarch64-linux-android": ["@rules_rust//rust/platform:aarch64-linux-android"],
-    "cfg(all(target_arch = \"aarch64\", target_os = \"linux\"))": ["@rules_rust//rust/platform:aarch64-unknown-linux-gnu"],
-    "cfg(all(target_arch = \"aarch64\", target_vendor = \"apple\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim"],
-    "cfg(any(target_arch = \"aarch64\", target_arch = \"x86_64\", target_arch = \"x86\"))": ["@rules_rust//rust/platform:aarch64-apple-darwin", "@rules_rust//rust/platform:aarch64-apple-ios", "@rules_rust//rust/platform:aarch64-apple-ios-sim", "@rules_rust//rust/platform:aarch64-fuchsia", "@rules_rust//rust/platform:aarch64-linux-android", "@rules_rust//rust/platform:aarch64-pc-windows-msvc", "@rules_rust//rust/platform:aarch64-unknown-linux-gnu", "@rules_rust//rust/platform:i686-apple-darwin", "@rules_rust//rust/platform:i686-linux-android", "@rules_rust//rust/platform:i686-pc-windows-msvc", "@rules_rust//rust/platform:i686-unknown-freebsd", "@rules_rust//rust/platform:i686-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-apple-darwin", "@rules_rust//rust/platform:x86_64-apple-ios", "@rules_rust//rust/platform:x86_64-fuchsia", "@rules_rust//rust/platform:x86_64-linux-android", "@rules_rust//rust/platform:x86_64-pc-windows-msvc", "@rules_rust//rust/platform:x86_64-unknown-freebsd", "@rules_rust//rust/platform:x86_64-unknown-linux-gnu", "@rules_rust//rust/platform:x86_64-unknown-none"],
-}
-
-###############################################################################
-
-def crate_repositories():
-    """A macro for defining repositories for all generated crates"""
-    maybe(
-        http_archive,
-        name = "tock_index__cfg-if-1.0.0",
-        sha256 = "baf1de4339761588bc0619e3cbc0120ee582ebb74b53b4efbf79117bd2da40fd",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/cfg-if/1.0.0/download"],
-        strip_prefix = "cfg-if-1.0.0",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.cfg-if-1.0.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__cpufeatures-0.2.9",
-        sha256 = "a17b76ff3a4162b0b27f354a0c87015ddad39d35f9c0c36607a3bdd175dde1f1",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/cpufeatures/0.2.9/download"],
-        strip_prefix = "cpufeatures-0.2.9",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.cpufeatures-0.2.9.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__generic-array-0.14.7",
-        sha256 = "85649ca51fd72272d7821adaf274ad91c288277713d9c18820d8499a7ff69e9a",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/generic-array/0.14.7/download"],
-        strip_prefix = "generic-array-0.14.7",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.generic-array-0.14.7.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__ghash-0.4.4",
-        sha256 = "1583cc1656d7839fd3732b80cf4f38850336cdb9b8ded1cd399ca62958de3c99",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/ghash/0.4.4/download"],
-        strip_prefix = "ghash-0.4.4",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.ghash-0.4.4.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__libc-0.2.147",
-        sha256 = "b4668fb0ea861c1df094127ac5f1da3409a82116a4ba74fca2e58ef927159bb3",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/libc/0.2.147/download"],
-        strip_prefix = "libc-0.2.147",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.libc-0.2.147.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__libm-0.2.7",
-        sha256 = "f7012b1bbb0719e1097c47611d3898568c546d597c2e74d66f6087edd5233ff4",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/libm/0.2.7/download"],
-        strip_prefix = "libm-0.2.7",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.libm-0.2.7.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__opaque-debug-0.3.0",
-        sha256 = "624a8340c38c1b80fd549087862da4ba43e08858af025b236e509b6649fc13d5",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/opaque-debug/0.3.0/download"],
-        strip_prefix = "opaque-debug-0.3.0",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.opaque-debug-0.3.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__polyval-0.5.3",
-        sha256 = "8419d2b623c7c0896ff2d5d96e2cb4ede590fed28fcc34934f4c33c036e620a1",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/polyval/0.5.3/download"],
-        strip_prefix = "polyval-0.5.3",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.polyval-0.5.3.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__subtle-2.4.1",
-        sha256 = "6bdef32e8150c2a081110b42772ffe7d7c9032b606bc226c8260fd97e0976601",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/subtle/2.4.1/download"],
-        strip_prefix = "subtle-2.4.1",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.subtle-2.4.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__typenum-1.16.0",
-        sha256 = "497961ef93d974e23eb6f433eb5fe1b7930b659f06d12dec6fc44a8f554c0bba",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/typenum/1.16.0/download"],
-        strip_prefix = "typenum-1.16.0",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.typenum-1.16.0.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__universal-hash-0.4.1",
-        sha256 = "9f214e8f697e925001e66ec2c6e37a4ef93f0f78c2eed7814394e10c62025b05",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/universal-hash/0.4.1/download"],
-        strip_prefix = "universal-hash-0.4.1",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.universal-hash-0.4.1.bazel"),
-    )
-
-    maybe(
-        http_archive,
-        name = "tock_index__version_check-0.9.4",
-        sha256 = "49874b5167b65d7193b8aba1567f5c7d93d001cafc34600cee003eda787e483f",
-        type = "tar.gz",
-        urls = ["https://crates.io/api/v1/crates/version_check/0.9.4/download"],
-        strip_prefix = "version_check-0.9.4",
-        build_file = Label("@lowrisc_opentitan//third_party/tock/crates:BUILD.version_check-0.9.4.bazel"),
-    )
diff --git a/third_party/tock/extensions.bzl b/third_party/tock/extensions.bzl
new file mode 100644
index 0000000000000..e62f8edc6f207
--- /dev/null
+++ b/third_party/tock/extensions.bzl
@@ -0,0 +1,299 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+load("//rules:repo.bzl", "bare_repository")
+load("//rules:rust.bzl", "crate_build")
+
+# Exports the kernel_layout.ld file so it can be used in opentitan rules.
+_KERNEL_LAYOUT = """
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "kernel_layout",
+    srcs = ["kernel_layout.ld"],
+)
+"""
+
+# Exports the libtock_layout.ld file so it can be used in opentitan rules.
+_LIBTOCK_LAYOUT = """
+filegroup(
+    name = "layout",
+    srcs = ["libtock_layout.ld"],
+)
+"""
+
+# Exports the earlgrey-cw310 crate sources so we can build a local copy
+# of the upstream kernel.
+_EARLGREY_CW310_BUILD = """
+package(default_visibility = ["//visibility:public"])
+
+filegroup(
+    name = "kernel_srcs",
+    srcs = glob(["**/*.rs"]),
+)
+"""
+
+tock = module_extension(
+    implementation = lambda _: _tock_repos(),
+)
+
+def _tock_repos():
+    bare_repository(
+        name = "tock",
+        strip_prefix = "tock-e81987f6a41e9b92f60fda1d5283f46b3cb597b5",
+        url = "https://github.com/tock/tock/archive/e81987f6a41e9b92f60fda1d5283f46b3cb597b5.tar.gz",
+        sha256 = "b7c239f3bd7e7727eee99814661424e1e50587fe9068cec1943a7bb6743ed777",
+        additional_files_content = {
+            "BUILD": """exports_files(glob(["**"]))""",
+            "arch/riscv/BUILD": crate_build(
+                name = "riscv",
+                deps = [
+                    "//kernel",
+                    "//libraries/tock-register-interface:tock-registers",
+                    "//libraries/riscv-csr",
+                ],
+            ),
+            "arch/rv32i/BUILD": crate_build(
+                name = "rv32i",
+                deps = [
+                    "//arch/riscv",
+                    "//kernel",
+                    "//libraries/tock-register-interface:tock-registers",
+                    "//libraries/riscv-csr",
+                ],
+            ),
+            "boards/BUILD": _KERNEL_LAYOUT,
+            "boards/components/BUILD": crate_build(
+                name = "components",
+                deps = [
+                    "//kernel",
+                    "//capsules/core:capsules-core",
+                    "//capsules/extra:capsules-extra",
+                ],
+            ),
+            "boards/opentitan/earlgrey-cw310/BUILD": _EARLGREY_CW310_BUILD,
+            "capsules/aes_gcm/BUILD": crate_build(
+                name = "capsules-aes-gcm",
+                deps = [
+                    "//kernel",
+                    "//libraries/enum_primitive",
+                    "//libraries/tickv",
+                    "@tock_index//:ghash",
+                ],
+            ),
+            "capsules/core/BUILD": crate_build(
+                name = "capsules-core",
+                deps = [
+                    "//kernel",
+                    "//libraries/enum_primitive",
+                    "//libraries/tickv",
+                ],
+            ),
+            "capsules/extra/BUILD": crate_build(
+                name = "capsules-extra",
+                deps = [
+                    "//kernel",
+                    "//libraries/enum_primitive",
+                    "//libraries/tickv",
+                    "//capsules/core:capsules-core",
+                ],
+            ),
+            "chips/earlgrey/BUILD": crate_build(
+                name = "earlgrey",
+                deps = [
+                    "//chips/lowrisc",
+                    "//arch/rv32i",
+                    "//kernel",
+                ],
+            ),
+            "chips/lowrisc/BUILD": crate_build(
+                name = "lowrisc",
+                deps = [
+                    "//arch/rv32i",
+                    "//kernel",
+                ],
+            ),
+            "libraries/enum_primitive/BUILD": crate_build(
+                name = "enum_primitive",
+            ),
+            "libraries/riscv-csr/BUILD": crate_build(
+                name = "riscv-csr",
+                deps = [
+                    "//libraries/tock-register-interface:tock-registers",
+                ],
+            ),
+            "libraries/tickv/BUILD": crate_build(
+                name = "tickv",
+            ),
+            "libraries/tock-cells/BUILD": crate_build(
+                name = "tock-cells",
+            ),
+            "libraries/tock-tbf/BUILD": crate_build(
+                name = "tock-tbf",
+            ),
+            "libraries/tock-register-interface/BUILD": crate_build(
+                name = "tock-registers",
+                crate_features = [
+                    "default",
+                    "register_types",
+                ],
+            ),
+            "kernel/BUILD": crate_build(
+                name = "kernel",
+                deps = [
+                    "//libraries/tock-register-interface:tock-registers",
+                    "//libraries/tock-cells",
+                    "//libraries/tock-tbf",
+                ],
+            ),
+        },
+    )
+
+    bare_repository(
+        name = "libtock",
+        strip_prefix = "libtock-rs-a2c6ad80648e3ba073e7433b4330706df052a6ae",
+        url = "https://github.com/tock/libtock-rs/archive/a2c6ad80648e3ba073e7433b4330706df052a6ae.tar.gz",
+        sha256 = "888d1925cd760e818385d13187286d6b87f763c548a4dc1bb26e55786dc95636",
+        additional_files_content = {
+            "BUILD": crate_build(
+                name = "libtock",
+                deps = [
+                    "//apis/adc",
+                    "//apis/air_quality",
+                    "//apis/alarm",
+                    "//apis/ambient_light",
+                    "//apis/buttons",
+                    "//apis/buzzer",
+                    "//apis/console",
+                    "//apis/gpio",
+                    "//apis/leds",
+                    "//apis/low_level_debug",
+                    "//apis/ninedof",
+                    "//apis/proximity",
+                    "//apis/sound_pressure",
+                    "//apis/temperature",
+                    "//panic_handlers/debug_panic",
+                    "//platform",
+                    "//runtime",
+                ],
+            ),
+            "apis/adc/BUILD": crate_build(
+                name = "adc",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/air_quality/BUILD": crate_build(
+                name = "air_quality",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/alarm/BUILD": crate_build(
+                name = "alarm",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/ambient_light/BUILD": crate_build(
+                name = "ambient_light",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/buttons/BUILD": crate_build(
+                name = "buttons",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/buzzer/BUILD": crate_build(
+                name = "buzzer",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/console/BUILD": crate_build(
+                name = "console",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/gpio/BUILD": crate_build(
+                name = "gpio",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/leds/BUILD": crate_build(
+                name = "leds",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/low_level_debug/BUILD": crate_build(
+                name = "low_level_debug",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/ninedof/BUILD": crate_build(
+                name = "ninedof",
+                crate_name = "libtock_{name}",
+                deps = [
+                    "//platform",
+                    "@tock_index//:libm",
+                ],
+            ),
+            "apis/proximity/BUILD": crate_build(
+                name = "proximity",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/sound_pressure/BUILD": crate_build(
+                name = "sound_pressure",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "apis/temperature/BUILD": crate_build(
+                name = "temperature",
+                crate_name = "libtock_{name}",
+                deps = ["//platform"],
+            ),
+            "build_scripts/BUILD": crate_build(
+                name = "build_scripts",
+                crate_name = "libtock_{name}",
+                additional_build_file_content = _LIBTOCK_LAYOUT,
+            ),
+            "panic_handlers/debug_panic/BUILD": crate_build(
+                name = "debug_panic",
+                crate_name = "libtock_{name}",
+                deps = [
+                    "//apis/console",
+                    "//apis/low_level_debug",
+                    "//platform",
+                    "//runtime",
+                ],
+            ),
+            "panic_handlers/small_panic/BUILD": crate_build(
+                name = "small_panic",
+                crate_name = "libtock_{name}",
+                deps = [
+                    "//apis/low_level_debug",
+                    "//platform",
+                    "//runtime",
+                ],
+            ),
+            "platform/BUILD": crate_build(
+                name = "platform",
+                crate_name = "libtock_{name}",
+            ),
+            "runtime/BUILD": crate_build(
+                name = "runtime",
+                crate_name = "libtock_{name}",
+                deps = [
+                    "//platform",
+                ],
+            ),
+        },
+    )
+
+    http_archive(
+        name = "elf2tab",
+        url = "https://github.com/tock/elf2tab/archive/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz",
+        sha256 = "b8b2ec7d8b9d052667d34190f98a0f5e69a0ba93ce69f00f2fdda7b5e241b963",
+        strip_prefix = "elf2tab-2f0e2f0ef01e37799850d1b12f48b93a0b32a203",
+        build_file = Label("//third_party/tock:BUILD.elf2tab.bazel"),
+    )
diff --git a/third_party/tock/repos.bzl b/third_party/tock/repos.bzl
deleted file mode 100644
index 59d47d25f4766..0000000000000
--- a/third_party/tock/repos.bzl
+++ /dev/null
@@ -1,305 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@//rules:repo.bzl", "bare_repository", "http_archive_or_local")
-load("@//rules:rust.bzl", "crate_build")
-load("@python3//:defs.bzl", "interpreter")
-load("@rules_python//python:pip.bzl", "pip_install")
-
-# Exports the kernel_layout.ld file so it can be used in opentitan rules.
-_KERNEL_LAYOUT = """
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "kernel_layout",
-    srcs = ["kernel_layout.ld"],
-)
-"""
-
-# Exports the libtock_layout.ld file so it can be used in opentitan rules.
-_LIBTOCK_LAYOUT = """
-filegroup(
-    name = "layout",
-    srcs = ["libtock_layout.ld"],
-)
-"""
-
-# Exports the earlgrey-cw310 crate sources so we can build a local copy
-# of the upstream kernel.
-_EARLGREY_CW310_BUILD = """
-package(default_visibility = ["//visibility:public"])
-
-filegroup(
-    name = "kernel_srcs",
-    srcs = glob(["**/*.rs"]),
-)
-"""
-
-def tock_repos(tock = None, libtock = None, elf2tab = None):
-    bare_repository(
-        name = "tock",
-        local = tock,
-        strip_prefix = "tock-e81987f6a41e9b92f60fda1d5283f46b3cb597b5",
-        url = "https://github.com/tock/tock/archive/e81987f6a41e9b92f60fda1d5283f46b3cb597b5.tar.gz",
-        sha256 = "b7c239f3bd7e7727eee99814661424e1e50587fe9068cec1943a7bb6743ed777",
-        additional_files_content = {
-            "BUILD": """exports_files(glob(["**"]))""",
-            "arch/riscv/BUILD": crate_build(
-                name = "riscv",
-                deps = [
-                    "//kernel",
-                    "//libraries/tock-register-interface:tock-registers",
-                    "//libraries/riscv-csr",
-                ],
-            ),
-            "arch/rv32i/BUILD": crate_build(
-                name = "rv32i",
-                deps = [
-                    "//arch/riscv",
-                    "//kernel",
-                    "//libraries/tock-register-interface:tock-registers",
-                    "//libraries/riscv-csr",
-                ],
-            ),
-            "boards/BUILD": _KERNEL_LAYOUT,
-            "boards/components/BUILD": crate_build(
-                name = "components",
-                deps = [
-                    "//kernel",
-                    "//capsules/core:capsules-core",
-                    "//capsules/extra:capsules-extra",
-                ],
-            ),
-            "boards/opentitan/earlgrey-cw310/BUILD": _EARLGREY_CW310_BUILD,
-            "capsules/aes_gcm/BUILD": crate_build(
-                name = "capsules-aes-gcm",
-                deps = [
-                    "//kernel",
-                    "//libraries/enum_primitive",
-                    "//libraries/tickv",
-                    "@tock_index//:ghash",
-                ],
-            ),
-            "capsules/core/BUILD": crate_build(
-                name = "capsules-core",
-                deps = [
-                    "//kernel",
-                    "//libraries/enum_primitive",
-                    "//libraries/tickv",
-                ],
-            ),
-            "capsules/extra/BUILD": crate_build(
-                name = "capsules-extra",
-                deps = [
-                    "//kernel",
-                    "//libraries/enum_primitive",
-                    "//libraries/tickv",
-                    "//capsules/core:capsules-core",
-                ],
-            ),
-            "chips/earlgrey/BUILD": crate_build(
-                name = "earlgrey",
-                deps = [
-                    "//chips/lowrisc",
-                    "//arch/rv32i",
-                    "//kernel",
-                ],
-            ),
-            "chips/lowrisc/BUILD": crate_build(
-                name = "lowrisc",
-                deps = [
-                    "//arch/rv32i",
-                    "//kernel",
-                ],
-            ),
-            "libraries/enum_primitive/BUILD": crate_build(
-                name = "enum_primitive",
-            ),
-            "libraries/riscv-csr/BUILD": crate_build(
-                name = "riscv-csr",
-                deps = [
-                    "//libraries/tock-register-interface:tock-registers",
-                ],
-            ),
-            "libraries/tickv/BUILD": crate_build(
-                name = "tickv",
-            ),
-            "libraries/tock-cells/BUILD": crate_build(
-                name = "tock-cells",
-            ),
-            "libraries/tock-tbf/BUILD": crate_build(
-                name = "tock-tbf",
-            ),
-            "libraries/tock-register-interface/BUILD": crate_build(
-                name = "tock-registers",
-                crate_features = [
-                    "default",
-                    "register_types",
-                ],
-            ),
-            "kernel/BUILD": crate_build(
-                name = "kernel",
-                deps = [
-                    "//libraries/tock-register-interface:tock-registers",
-                    "//libraries/tock-cells",
-                    "//libraries/tock-tbf",
-                ],
-            ),
-        },
-    )
-
-    bare_repository(
-        name = "libtock",
-        local = libtock,
-        strip_prefix = "libtock-rs-a2c6ad80648e3ba073e7433b4330706df052a6ae",
-        url = "https://github.com/tock/libtock-rs/archive/a2c6ad80648e3ba073e7433b4330706df052a6ae.tar.gz",
-        sha256 = "888d1925cd760e818385d13187286d6b87f763c548a4dc1bb26e55786dc95636",
-        additional_files_content = {
-            "BUILD": crate_build(
-                name = "libtock",
-                deps = [
-                    "//apis/adc",
-                    "//apis/air_quality",
-                    "//apis/alarm",
-                    "//apis/ambient_light",
-                    "//apis/buttons",
-                    "//apis/buzzer",
-                    "//apis/console",
-                    "//apis/gpio",
-                    "//apis/leds",
-                    "//apis/low_level_debug",
-                    "//apis/ninedof",
-                    "//apis/proximity",
-                    "//apis/sound_pressure",
-                    "//apis/temperature",
-                    "//panic_handlers/debug_panic",
-                    "//platform",
-                    "//runtime",
-                ],
-            ),
-            "apis/adc/BUILD": crate_build(
-                name = "adc",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/air_quality/BUILD": crate_build(
-                name = "air_quality",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/alarm/BUILD": crate_build(
-                name = "alarm",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/ambient_light/BUILD": crate_build(
-                name = "ambient_light",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/buttons/BUILD": crate_build(
-                name = "buttons",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/buzzer/BUILD": crate_build(
-                name = "buzzer",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/console/BUILD": crate_build(
-                name = "console",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/gpio/BUILD": crate_build(
-                name = "gpio",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/leds/BUILD": crate_build(
-                name = "leds",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/low_level_debug/BUILD": crate_build(
-                name = "low_level_debug",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/ninedof/BUILD": crate_build(
-                name = "ninedof",
-                crate_name = "libtock_{name}",
-                deps = [
-                    "//platform",
-                    "@tock_index//:libm",
-                ],
-            ),
-            "apis/proximity/BUILD": crate_build(
-                name = "proximity",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/sound_pressure/BUILD": crate_build(
-                name = "sound_pressure",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "apis/temperature/BUILD": crate_build(
-                name = "temperature",
-                crate_name = "libtock_{name}",
-                deps = ["//platform"],
-            ),
-            "build_scripts/BUILD": crate_build(
-                name = "build_scripts",
-                crate_name = "libtock_{name}",
-                additional_build_file_content = _LIBTOCK_LAYOUT,
-            ),
-            "panic_handlers/debug_panic/BUILD": crate_build(
-                name = "debug_panic",
-                crate_name = "libtock_{name}",
-                deps = [
-                    "//apis/console",
-                    "//apis/low_level_debug",
-                    "//platform",
-                    "//runtime",
-                ],
-            ),
-            "panic_handlers/small_panic/BUILD": crate_build(
-                name = "small_panic",
-                crate_name = "libtock_{name}",
-                deps = [
-                    "//apis/low_level_debug",
-                    "//platform",
-                    "//runtime",
-                ],
-            ),
-            "platform/BUILD": crate_build(
-                name = "platform",
-                crate_name = "libtock_{name}",
-            ),
-            "runtime/BUILD": crate_build(
-                name = "runtime",
-                crate_name = "libtock_{name}",
-                deps = [
-                    "//platform",
-                ],
-            ),
-        },
-    )
-
-    http_archive_or_local(
-        name = "elf2tab",
-        local = elf2tab,
-        url = "https://github.com/tock/elf2tab/archive/2f0e2f0ef01e37799850d1b12f48b93a0b32a203.tar.gz",
-        sha256 = "b8b2ec7d8b9d052667d34190f98a0f5e69a0ba93ce69f00f2fdda7b5e241b963",
-        strip_prefix = "elf2tab-2f0e2f0ef01e37799850d1b12f48b93a0b32a203",
-        build_file = Label("//third_party/tock:BUILD.elf2tab.bazel"),
-    )
-
-    pip_install(
-        name = "tockloader_deps",
-        python_interpreter_target = interpreter,
-        requirements = "//:third_party/tock/tockloader_requirements.txt",
-    )
diff --git a/third_party/tock/tockloader_requirements.txt b/third_party/tock/tockloader_requirements.txt
deleted file mode 100644
index b8b793257d498..0000000000000
--- a/third_party/tock/tockloader_requirements.txt
+++ /dev/null
@@ -1,10 +0,0 @@
-argcomplete==3.1.1
-colorama==0.4.6
-crcmod==1.7
-pycryptodome==3.18.0
-pyserial==3.5
-questionary==1.10.0
-siphash==0.0.1
-tockloader@git+https://github.com/tock/tockloader.git@122fe2c2626d00c499282b04eba22413f2e122be
-toml==0.10.2
-tqdm==4.65.0
diff --git a/third_party/toolchains_llvm/patches/BUILD b/third_party/toolchains_llvm/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/toolchains_llvm/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/toolchains_llvm/patches/toolchains_llvm-distroname.patch b/third_party/toolchains_llvm/patches/toolchains_llvm-distroname.patch
new file mode 100644
index 0000000000000..5997c3703bf77
--- /dev/null
+++ b/third_party/toolchains_llvm/patches/toolchains_llvm-distroname.patch
@@ -0,0 +1,13 @@
+diff --git a/toolchain/internal/release_name.bzl b/toolchain/internal/release_name.bzl
+index e3d4a54..d2e5a92 100755
+--- a/toolchain/internal/release_name.bzl
++++ b/toolchain/internal/release_name.bzl
+@@ -151,7 +151,7 @@ def _linux(llvm_version, distname, version, arch):
+         os_name = _ubuntu_osname(arch, "20.04", major_llvm_version, llvm_version)
+     elif distname == "linuxmint" and version.startswith("18"):
+         os_name = "linux-gnu-ubuntu-16.04"
+-    elif distname == "debian":
++    elif distname in ["cros_sdk", "debian"]:
+         int_version = 0
+         if version.isdigit():
+             int_version = int(version)
diff --git a/third_party/wycheproof/extensions.bzl b/third_party/wycheproof/extensions.bzl
new file mode 100644
index 0000000000000..dcbdfd734eae0
--- /dev/null
+++ b/third_party/wycheproof/extensions.bzl
@@ -0,0 +1,18 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+wycheproof = module_extension(
+    implementation = lambda _: _wycheproof_repos(),
+)
+
+def _wycheproof_repos():
+    http_archive(
+        name = "wycheproof",
+        build_file = Label("//third_party/wycheproof:BUILD.wycheproof_common.bazel"),
+        sha256 = "a7a4c18d0d5609b26f3341dc7a9dd6829174d542ee6f0434f5fa7319e0811b75",
+        strip_prefix = "wycheproof-snapshot-d9f6ec7d8bd8c96da05368999094e4a75ba5cb3d",
+        url = "https://github.com/lowRISC/wycheproof/archive/refs/tags/snapshot-d9f6ec7d8bd8c96da05368999094e4a75ba5cb3d.tar.gz",
+    )
diff --git a/third_party/wycheproof/repos.bzl b/third_party/wycheproof/repos.bzl
deleted file mode 100644
index cbbb512e5458b..0000000000000
--- a/third_party/wycheproof/repos.bzl
+++ /dev/null
@@ -1,14 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def wycheproof_repos():
-    http_archive(
-        name = "wycheproof",
-        build_file = Label("//third_party/wycheproof:BUILD.wycheproof_common.bazel"),
-        sha256 = "a7a4c18d0d5609b26f3341dc7a9dd6829174d542ee6f0434f5fa7319e0811b75",
-        strip_prefix = "wycheproof-snapshot-d9f6ec7d8bd8c96da05368999094e4a75ba5cb3d",
-        url = "https://github.com/lowRISC/wycheproof/archive/refs/tags/snapshot-d9f6ec7d8bd8c96da05368999094e4a75ba5cb3d.tar.gz",
-    )
diff --git a/third_party/xkcp/extensions.bzl b/third_party/xkcp/extensions.bzl
new file mode 100644
index 0000000000000..4b2878249d6d9
--- /dev/null
+++ b/third_party/xkcp/extensions.bzl
@@ -0,0 +1,26 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
+
+xkcp = module_extension(
+    implementation = lambda _: _xkcp_repos(),
+)
+
+def _xkcp_repos():
+    http_archive(
+        name = "xkcp",
+        build_file = Label("//third_party/xkcp:BUILD.xkcp.bazel"),
+        sha256 = "bfd50261e0196988f7c4f45871b82e5ec9c3a74e18276f50dda48ab51f3cdb53",
+        # We only need lib of XKCP, so drop everything else except lib
+        strip_prefix = "XKCP-56ae09923153c3e801a6891eb19e4a3b5bb6f6e2/lib",
+        urls = [
+            "https://github.com/XKCP/XKCP/archive/56ae09923153c3e801a6891eb19e4a3b5bb6f6e2.tar.gz",
+        ],
+        patches = [
+            Label("//third_party/xkcp/patches:add_config_header.patch"),
+            Label("//third_party/xkcp/patches:add_main_license.patch"),
+        ],
+        patch_args = ["-p1"],
+    )
diff --git a/third_party/xkcp/patches/BUILD b/third_party/xkcp/patches/BUILD
new file mode 100644
index 0000000000000..3e8bb41965a28
--- /dev/null
+++ b/third_party/xkcp/patches/BUILD
@@ -0,0 +1,3 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
diff --git a/third_party/xkcp/add_config_header.patch b/third_party/xkcp/patches/add_config_header.patch
similarity index 100%
rename from third_party/xkcp/add_config_header.patch
rename to third_party/xkcp/patches/add_config_header.patch
diff --git a/third_party/xkcp/add_main_license.patch b/third_party/xkcp/patches/add_main_license.patch
similarity index 100%
rename from third_party/xkcp/add_main_license.patch
rename to third_party/xkcp/patches/add_main_license.patch
diff --git a/third_party/xkcp/repos.bzl b/third_party/xkcp/repos.bzl
deleted file mode 100644
index 56433cc1afd0a..0000000000000
--- a/third_party/xkcp/repos.bzl
+++ /dev/null
@@ -1,22 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-load("@bazel_tools//tools/build_defs/repo:http.bzl", "http_archive")
-
-def xkcp_repos():
-    http_archive(
-        name = "xkcp",
-        build_file = Label("//third_party/xkcp:BUILD.xkcp.bazel"),
-        sha256 = "bfd50261e0196988f7c4f45871b82e5ec9c3a74e18276f50dda48ab51f3cdb53",
-        # We only need lib of XKCP, so drop everything else except lib
-        strip_prefix = "XKCP-56ae09923153c3e801a6891eb19e4a3b5bb6f6e2/lib",
-        urls = [
-            "https://github.com/XKCP/XKCP/archive/56ae09923153c3e801a6891eb19e4a3b5bb6f6e2.tar.gz",
-        ],
-        patches = [
-            Label("//third_party/xkcp:add_config_header.patch"),
-            Label("//third_party/xkcp:add_main_license.patch"),
-        ],
-        patch_args = ["-p1"],
-    )
diff --git a/tool_requirements.py b/tool_requirements.py
index bd8e72969e476..b9bc5d74e6687 100644
--- a/tool_requirements.py
+++ b/tool_requirements.py
@@ -16,6 +16,7 @@
 #                 entry gives the required version.
 #
 __TOOL_REQUIREMENTS__ = {
+    'python': '3.8',
     'edalize': '0.2.0',
     'ninja': {
         'min_version': '1.8.2',
diff --git a/toolchain/BUILD b/toolchain/BUILD
new file mode 100644
index 0000000000000..ef5c225c52d25
--- /dev/null
+++ b/toolchain/BUILD
@@ -0,0 +1,494 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_cc//cc/toolchains:actions.bzl", "cc_action_type")
+load("@rules_cc//cc/toolchains:args.bzl", "cc_args")
+load("@rules_cc//cc/toolchains:args_list.bzl", "cc_args_list")
+load("@rules_cc//cc/toolchains:feature.bzl", "cc_feature")
+load("@rules_cc//cc/toolchains:feature_constraint.bzl", "cc_feature_constraint")
+load("@rules_cc//cc/toolchains:feature_set.bzl", "cc_feature_set")
+load("@rules_cc//cc/toolchains:tool_map.bzl", "cc_tool_map")
+load("@rules_cc//cc/toolchains:toolchain.bzl", "cc_toolchain")
+load("//rules:actions.bzl", "OT_ACTION_LLVM_PROFDATA", "OT_ACTION_OBJDUMP")
+
+package(default_visibility = ["//visibility:public"])
+
+constraint_setting(
+    name = "target",
+)
+
+constraint_value(
+    name = "host",
+    constraint_setting = "target",
+)
+
+constraint_value(
+    name = "device",
+    constraint_setting = "target",
+)
+
+config_setting(
+    name = "on_device_config",
+    constraint_values = [
+        ":device",
+    ],
+)
+
+platform(
+    name = "opentitan_platform",
+    constraint_values = [
+        "@platforms//cpu:riscv32",
+        "@platforms//os:none",
+        ":device",
+    ],
+)
+
+toolchain(
+    name = "cc_toolchain_opentitan",
+    exec_compatible_with = ["@platforms//cpu:x86_64"],
+    target_compatible_with = [
+        "@platforms//cpu:riscv32",
+        "@platforms//os:none",
+    ],
+    toolchain = ":opentitan_toolchain",
+    toolchain_type = "@bazel_tools//tools/cpp:toolchain_type",
+)
+
+# Collects a set of tools, arguments, and features into a C/C++ toolchain.
+cc_toolchain(
+    name = "opentitan_toolchain",
+    args = [
+        ":system_includes",
+        ":arch_rv32imc",
+        ":arch_rv32imcb",
+        ":abi",
+        ":sys_spec",
+        ":warnings",
+        ":reproducible",
+        ":symbol_garbage_collection",
+        ":constructor_destructor",
+        ":nostdinc",
+    ],
+    enabled_features = [
+        "@rules_cc//cc/toolchains/args:experimental_replace_legacy_action_config_features",
+        ":feat_rv32_bitmanip",
+        ":feat_warnings_as_errors",
+    ],
+    known_features = [
+        "@rules_cc//cc/toolchains/args:experimental_replace_legacy_action_config_features",
+        ":feat_warnings_as_errors",
+        ":feat_guards",
+        ":feat_coverage",
+        ":feat_use_lld",
+        ":feat_lto",
+        ":feat_minsize",
+        ":feat_dbg",
+        ":feat_fastbuild",
+        ":feat_opt",
+        ":feat_rv32_bitmanip",
+    ],
+    tool_map = ":tool_map",
+)
+
+# Map from C/C++ compilation actions to tools.
+cc_tool_map(
+    name = "tool_map",
+    tools = {
+        "@rules_cc//cc/toolchains/actions:ar_actions": "@lowrisc_rv32imcb_toolchain//:ar",
+        "@rules_cc//cc/toolchains/actions:assembly_actions": "@lowrisc_rv32imcb_toolchain//:clang",
+        "@rules_cc//cc/toolchains/actions:c_compile": "@lowrisc_rv32imcb_toolchain//:clang",
+        "@rules_cc//cc/toolchains/actions:cpp_compile_actions": "@lowrisc_rv32imcb_toolchain//:clang++",
+        "@rules_cc//cc/toolchains/actions:link_actions": "@lowrisc_rv32imcb_toolchain//:clang",
+        "@rules_cc//cc/toolchains/actions:llvm_cov": "@lowrisc_rv32imcb_toolchain//:llvm_cov",
+        "@rules_cc//cc/toolchains/actions:objcopy_embed_data": "@lowrisc_rv32imcb_toolchain//:objcopy",
+        "@rules_cc//cc/toolchains/actions:strip": "@lowrisc_rv32imcb_toolchain//:strip",
+        ":action_llvm_profdata": "@lowrisc_rv32imcb_toolchain//:llvm_profdata",
+        ":action_objdump": "@lowrisc_rv32imcb_toolchain//:objdump",
+    },
+)
+
+cc_action_type(
+    name = "action_llvm_profdata",
+    action_name = OT_ACTION_LLVM_PROFDATA,
+)
+
+cc_action_type(
+    name = "action_objdump",
+    action_name = OT_ACTION_OBJDUMP,
+)
+
+# minsize feature to switch between Os and Oz.
+cc_feature(
+    name = "feat_minsize",
+    feature_name = "minsize",
+)
+
+cc_feature_constraint(
+    name = "constraint_minsize",
+    all_of = [":feat_minsize"],
+)
+
+cc_feature_constraint(
+    name = "constraint_no_minsize",
+    none_of = [":feat_minsize"],
+)
+
+cc_feature_constraint(
+    name = "constraint_minsize_lld",
+    all_of = [
+        ":feat_minsize",
+        ":feat_use_lld",
+    ],
+)
+
+# Built-in Bazel feature enabled for optimized builds.
+cc_feature(
+    name = "feat_opt",
+    args = [
+        ":optsize",
+        ":minsize",
+        ":minsize_inline_cc",
+        ":minsize_inline_ld",
+        ":default_debug_info",
+        ":lto",
+    ],
+    overrides = "@rules_cc//cc/toolchains/features:opt",
+)
+
+cc_args(
+    name = "default_debug_info",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-g",
+        "-gdwarf-4",
+    ],
+)
+
+cc_args(
+    name = "optsize",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-Os",
+    ],
+    requires_any_of = [":constraint_no_minsize"],
+)
+
+cc_args(
+    name = "minsize",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-Oz",
+    ],
+    requires_any_of = [":constraint_minsize"],
+)
+
+# Inline slightly more which is actually smaller.
+cc_args(
+    name = "minsize_inline_cc",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-mllvm",
+        "--inline-threshold=10",
+    ],
+    requires_any_of = [":constraint_minsize_lld"],
+)
+
+cc_args(
+    name = "minsize_inline_ld",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = [
+        "-Wl,-mllvm",
+        "-Wl,--inline-threshold=10",
+    ],
+    requires_any_of = [":constraint_minsize_lld"],
+)
+
+# Built-in Bazel feature enabled for debug builds.
+cc_feature(
+    name = "feat_dbg",
+    args = [":dbg"],
+    overrides = "@rules_cc//cc/toolchains/features:dbg",
+)
+
+cc_args(
+    name = "dbg",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-O0",
+        "-g3",
+    ],
+)
+
+# Built-in Bazel feature for fast builds.
+cc_feature(
+    name = "feat_fastbuild",
+    args = [
+        ":optsize",
+        ":minsize",
+        ":minsize_inline_cc",
+        ":minsize_inline_ld",
+        ":default_debug_info",
+    ],
+    overrides = "@rules_cc//cc/toolchains/features:fastbuild",
+)
+
+cc_args(
+    name = "nostdinc",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = ["-nostdinc"],
+)
+
+cc_args(
+    name = "system_includes",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-isystem",
+        "{clang-include}",
+        "-isystem",
+        "{riscv32-include}",
+        "-isystem",
+        "{cxx-include}",
+        "-isystem",
+        "{cxx-backward}",
+        "-isystem",
+        "{cxx-riscv32}",
+    ],
+    data = [
+        "@lowrisc_rv32imcb_toolchain//:cxx-backward",
+        "@lowrisc_rv32imcb_toolchain//:cxx-include",
+        "@lowrisc_rv32imcb_toolchain//:cxx-riscv32-unknown-elf",
+        "@lowrisc_rv32imcb_toolchain//:lib-clang-include",
+        "@lowrisc_rv32imcb_toolchain//:riscv32-unknown-elf-include",
+    ],
+    format = {
+        "clang-include": "@lowrisc_rv32imcb_toolchain//:lib-clang-include",
+        "riscv32-include": "@lowrisc_rv32imcb_toolchain//:riscv32-unknown-elf-include",
+        "cxx-include": "@lowrisc_rv32imcb_toolchain//:cxx-include",
+        "cxx-backward": "@lowrisc_rv32imcb_toolchain//:cxx-backward",
+        "cxx-riscv32": "@lowrisc_rv32imcb_toolchain//:cxx-riscv32-unknown-elf",
+    },
+)
+
+# This feature can be disabled to remove the bitmanip extensions.
+cc_feature(
+    name = "feat_rv32_bitmanip",
+    feature_name = "rv32_bitmanip",
+)
+
+cc_feature_constraint(
+    name = "constraint_bitmanip",
+    all_of = [":feat_rv32_bitmanip"],
+)
+
+cc_feature_constraint(
+    name = "constraint_no_bitmanip",
+    none_of = [":feat_rv32_bitmanip"],
+)
+
+cc_args(
+    name = "arch_rv32imcb",
+    actions = [
+        "@rules_cc//cc/toolchains/actions:compile_actions",
+        "@rules_cc//cc/toolchains/actions:link_actions",
+    ],
+    args = ["-march=rv32imc_zba_zbb_zbc_zbs"],
+    requires_any_of = [":constraint_bitmanip"],
+)
+
+cc_args(
+    name = "arch_rv32imc",
+    actions = [
+        "@rules_cc//cc/toolchains/actions:compile_actions",
+        "@rules_cc//cc/toolchains/actions:link_actions",
+    ],
+    args = ["-march=rv32imc"],
+    requires_any_of = [":constraint_no_bitmanip"],
+)
+
+cc_args(
+    name = "abi",
+    actions = [
+        "@rules_cc//cc/toolchains/actions:compile_actions",
+        "@rules_cc//cc/toolchains/actions:link_actions",
+    ],
+    args = [
+        "-mabi=ilp32",
+        "-mcmodel=medany",
+        "-mlittle-endian",
+    ],
+)
+
+cc_args(
+    name = "warnings",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-Wall",
+        "-Wconversion",
+        "-Wextra",
+        "-Wgnu",
+        "-Wimplicit-fallthrough",
+        "-Winvalid-pch",
+        "-Wno-covered-switch-default",
+        "-Wno-error=unused",
+        "-Wno-error=unused-function",
+        "-Wno-error=unused-parameter",
+        "-Wno-gnu-statement-expression-from-macro-expansion",
+        "-Wno-gnu-zero-variadic-macro-arguments",
+        "-Wno-missing-field-initializers",
+        "-Wno-sign-compare",
+        "-Wstrict-prototypes",
+        "-Wswitch-default",
+        "-Wunused",
+        "-Wunused-parameter",
+    ],
+)
+
+# Feature which turns all warnings into fatal errors.
+cc_feature(
+    name = "feat_warnings_as_errors",
+    args = [":warnings_as_errors"],
+    feature_name = "warnings_as_errors",
+)
+
+cc_args(
+    name = "warnings_as_errors",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = ["-Werror"],
+)
+
+cc_args(
+    name = "reproducible",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = ["-Werror=date-time"],
+)
+
+cc_feature(
+    name = "feat_guards",
+    args = [":guards"],
+    feature_name = "guards",
+)
+
+cc_args(
+    name = "guards",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = ["-mguards"],
+)
+
+cc_feature(
+    name = "feat_coverage",
+    args = [
+        ":coverage_indicator_cc",
+        ":coverage_indicator_ld",
+        ":coverage_profile",
+        ":coverage_single_byte",
+        ":sha1_build_id",
+    ],
+    overrides = "@rules_cc//cc/toolchains/features/legacy:coverage",
+)
+
+cc_args(
+    name = "coverage_single_byte",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-mllvm",
+        "--enable-single-byte-coverage",
+    ],
+)
+
+cc_args(
+    name = "coverage_profile",
+    actions = [
+        "@rules_cc//cc/toolchains/actions:compile_actions",
+        "@rules_cc//cc/toolchains/actions:link_actions",
+    ],
+    args = [
+        "-fprofile-instr-generate",
+        "-fcoverage-mapping",
+    ],
+)
+
+cc_args(
+    name = "coverage_indicator_cc",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = ["-DOT_COVERAGE_INSTRUMENTED=1"],
+)
+
+cc_args(
+    name = "coverage_indicator_ld",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = ["-Wl,--defsym=_ot_coverage_instrumented=1"],
+)
+
+cc_args(
+    name = "sha1_build_id",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = ["-Wl,--build-id=sha1"],
+)
+
+cc_feature(
+    name = "feat_use_lld",
+    args = [":use_lld"],
+    feature_name = "use_lld",
+)
+
+cc_args(
+    name = "use_lld",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = ["-fuse-ld=lld"],
+)
+
+cc_feature(
+    name = "feat_lto",
+    args = [":lto"],
+    feature_name = "lto",
+)
+
+cc_args(
+    name = "lto",
+    actions = [
+        "@rules_cc//cc/toolchains/actions:compile_actions",
+        "@rules_cc//cc/toolchains/actions:link_actions",
+    ],
+    args = ["-flto"],
+)
+
+cc_args(
+    name = "unique_sections",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        "-ffunction-sections",
+        "-fdata-sections",
+    ],
+)
+
+cc_args(
+    name = "gc_sections",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = ["-Wl,--gc-sections"],
+)
+
+cc_args_list(
+    name = "symbol_garbage_collection",
+    args = [
+        ":unique_sections",
+        ":gc_sections",
+    ],
+)
+
+cc_args(
+    name = "sys_spec",
+    actions = ["@rules_cc//cc/toolchains/actions:link_actions"],
+    args = ["-lnosys"],
+)
+
+cc_args(
+    name = "constructor_destructor",
+    actions = ["@rules_cc//cc/toolchains/actions:compile_actions"],
+    args = [
+        # Indicate that this program may not neccesarily be able to use standard system calls.
+        "-ffreestanding",
+        # Instantiate global variables only once.
+        "-fno-common",
+    ],
+)
diff --git a/toolchain/README.md b/toolchain/README.md
new file mode 100644
index 0000000000000..1336b4c1d50c4
--- /dev/null
+++ b/toolchain/README.md
@@ -0,0 +1,31 @@
+# OpenTitan RISC-V toolchain
+
+This directory contains the Bazel configuration for OpenTitan's RISC-V
+toolchain.
+
+This LLVM toolchain comes from the [lowrisc-toolchains] repository. See
+`third_party/lowrisc/BUILD.lowrisc_toolchain.bazel` for changing the toolchain
+version.
+
+[lowrisc-toolchains]: https://github.com/lowRISC/lowrisc-toolchains
+
+## Configuration
+
+There are four rules used to configure the toolchain:
+
+1. `cc_toolchain`: groups flags, features, and tools into a toolchain.
+2. `cc_tool_map`: assigns tools to actions.
+3. `cc_args`: defines flags to add to tools based on actions.
+3. `cc_feature`: allows `cc_args` flags to be conditionally enabled.
+
+To add new flags to a tool in the toolchain, define a new `cc_args` target
+and assign it to some actions (e.g. compiling C code, linking, etc.). Add the
+new flags to `cc_toolchain.args`.
+
+To make flags optional, define a new `cc_feature` for those `cc_args`. Features
+can be enabled at the command line using `bazel --features=$feature_name`. Add
+the flags to `cc_toolchain.known_features` and optionally to
+`cc_toolchain.enabled_features`.
+
+Bazel has three built-in features called `dbg`, `fastbuild`, and `opt` that can
+be used to enable and disable flags at different optimization levels.
diff --git a/util/BUILD b/util/BUILD
index 94b9e1672e307..6403d5f4cacc1 100644
--- a/util/BUILD
+++ b/util/BUILD
@@ -21,18 +21,23 @@ py_binary(
 )
 
 py_binary(
-    name = "rom_chip_info",
-    srcs = ["rom_chip_info.py"],
+    name = "build_info",
+    srcs = ["build_info.py"],
 )
 
 py_test(
-    name = "rom_chip_info_test",
+    name = "build_info_test",
     srcs = [
-        "rom_chip_info.py",
-        "rom_chip_info_test.py",
+        "build_info.py",
+        "build_info_test.py",
     ],
 )
 
+py_binary(
+    name = "cryptolib_build_info",
+    srcs = ["cryptolib_build_info.py"],
+)
+
 py_binary(
     name = "regtool",
     srcs = ["regtool.py"],
@@ -80,3 +85,16 @@ py_binary(
     srcs = ["fusesoc_build.py"],
     deps = all_requirements,
 )
+
+cc_library(
+    name = "bfv_decoder",
+    srcs = ["bfv_decoder.c"],
+    deps = [
+        "//sw/device/silicon_creator/lib:error",
+    ],
+)
+
+py_binary(
+    name = "gen_stamped_tarball",
+    srcs = ["gen_stamped_tarball.py"],
+)
diff --git a/util/bfv_decoder.c b/util/bfv_decoder.c
new file mode 100644
index 0000000000000..6c6ffdba53143
--- /dev/null
+++ b/util/bfv_decoder.c
@@ -0,0 +1,59 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include "sw/device/silicon_creator/lib/error.h"
+
+typedef struct {
+  const char *text;
+  int value;
+} error_descriptor_t;
+
+#define ERROR_TABLE_ENTRY(name, value) \
+  { #name, value }
+
+// Add an empty element in the end to make it easier to stop iterating over the
+// table.
+const static error_descriptor_t error_table[] = {
+    DEFINE_ERRORS(ERROR_TABLE_ENTRY){}};
+
+size_t bfv_decoder(uint32_t bfv, uint8_t *buf, size_t buf_size) {
+  char *str = (char *)buf;
+
+  const error_descriptor_t *edesc = error_table;
+
+  while (edesc->value) {
+    if (edesc->value == bfv) {
+      snprintf(str, buf_size, "%s", edesc->text);
+      break;
+    }
+    edesc++;
+  }
+  if (!edesc->value) {
+    // This was not an encoded BFV, must have been an exception.
+    unsigned char mod_high = (bfv >> 16) & 0xff;
+    unsigned char mod_low = (bfv >> 8) & 0xff;
+
+    if (((mod_high == 'R') && (mod_low == 'I')) ||
+        ((mod_high == 'I') && (mod_low == 'R'))) {
+      // This is an interrupt/exception error, retrieve the encoded mcause.
+      uint32_t mcause = (bfv & (1 << 31)) | ((bfv >> 24) & 0x7f);
+      const char *prefix = "";
+
+      if (mod_high == 'R') {
+        prefix = "ROM_EXT ";
+      }
+
+      snprintf(str, buf_size,
+               "%sinterrupt/exception, mcause 0x%08x, status 0x%02x", prefix,
+               mcause, bfv & 0xff);
+    } else {
+      snprintf(str, buf_size, "unknown error code");
+    }
+  }
+  return strlen(str);
+}
diff --git a/util/build_info.py b/util/build_info.py
new file mode 100755
index 0000000000000..abef0acfd24f2
--- /dev/null
+++ b/util/build_info.py
@@ -0,0 +1,101 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Generates build_info.c for ROM build."""
+
+import argparse
+import logging as log
+from pathlib import Path
+
+import version_file
+
+
+def generate_build_info_c_source(scm_revision: int) -> str:
+    """Return the contents of a C source file that defines `kBuildInfo`.
+
+    Args:
+        scm_revision: SHA1 sum identifying the current SCM revision.
+    """
+    SHA1_BYTE_CNT = 20
+    assert 0 < scm_revision < 2**(SHA1_BYTE_CNT * 8)
+    scm_rev_byte_be = scm_revision.to_bytes(SHA1_BYTE_CNT, "big")
+    scm_revision_high = int.from_bytes(scm_rev_byte_be[0:4], "big")
+    scm_revision_low = int.from_bytes(scm_rev_byte_be[4:8], "big")
+
+    return f"""
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
+
+#include "sw/device/silicon_creator/lib/build_info.h"
+
+#include "sw/device/lib/base/macros.h"
+
+OT_USED
+OT_SECTION(".build_info")
+const build_info_t kBuildInfo = {{
+  .scm_revision = (build_info_scm_revision_t){{
+    .scm_revision_low = {scm_revision_low:#010x},
+    .scm_revision_high = {scm_revision_high:#010x},
+  }},
+  .version = (uint32_t)kBuildInfoVersion1,
+}};
+"""
+
+
+def read_version_file(version_info_path, default_version) -> int:
+    """
+    Search for the scm revision variable and interprets
+    the contents as a big-endian hex literal. Return an error
+    if the revision cannot be found.
+    """
+
+    version_info = version_file.VersionInformation(version_info_path)
+    version = version_info.scm_revision(default_version)
+    return int(version, base=16)
+
+
+def write_source_file(outdir: Path, contents: str) -> Path:
+    """Creates build_info.c in `outdir`. Returns the path to the new file."""
+
+    source_out_path = outdir / "build_info.c"
+
+    outdir.mkdir(parents=True, exist_ok=True)
+    with source_out_path.open(mode='w', encoding='utf-8') as fout:
+        fout.write(contents)
+
+    return source_out_path
+
+
+def main():
+    log.basicConfig(format="%(levelname)s: %(message)s")
+
+    parser = argparse.ArgumentParser(prog="rom_build_info")
+    parser.add_argument('--outdir',
+                        '-o',
+                        required=True,
+                        type=Path,
+                        help='Output Directory')
+    parser.add_argument('--ot_version_file',
+                        type=Path,
+                        help='Path to a file with the OpenTitan Version')
+    parser.add_argument('--default_version',
+                        type=str,
+                        help='Version to use if the version file does not indicate a version')
+
+    args = parser.parse_args()
+
+    # Extract version stamp from file
+    version = read_version_file(args.ot_version_file, args.default_version)
+    log.info("Version: %x" % (version, ))
+
+    generated_source = generate_build_info_c_source(version)
+    out_path = write_source_file(args.outdir, generated_source)
+    log.info("Generated new source file: %s" % (out_path))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/util/build_info_test.py b/util/build_info_test.py
new file mode 100644
index 0000000000000..146b5b9102c51
--- /dev/null
+++ b/util/build_info_test.py
@@ -0,0 +1,122 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import pathlib
+import unittest
+from unittest.mock import mock_open
+from unittest.mock import patch
+
+import build_info
+
+
+EXAMPLE_SHA1_DIGEST = 0x4bbd966dcbfc4aa39291f4de9f52bc0f66ca32a4
+
+
+class TestGenerateBuildInfoCSource(unittest.TestCase):
+    def test_simple(self):
+        source = build_info.generate_build_info_c_source(EXAMPLE_SHA1_DIGEST)
+        expected = """
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
+
+#include "sw/device/silicon_creator/lib/build_info.h"
+
+#include "sw/device/lib/base/macros.h"
+
+OT_USED
+OT_SECTION(".build_info")
+const build_info_t kBuildInfo = {
+  .scm_revision = (build_info_scm_revision_t){
+    .scm_revision_low = 0xcbfc4aa3,
+    .scm_revision_high = 0x4bbd966d,
+  },
+  .version = (uint32_t)kBuildInfoVersion1,
+};
+"""
+        self.assertEqual(source, expected)
+
+    def test_sha1_digest_leading_zero_byte(self):
+        digest = EXAMPLE_SHA1_DIGEST >> 8
+        source = build_info.generate_build_info_c_source(digest)
+        expected = """
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
+
+#include "sw/device/silicon_creator/lib/build_info.h"
+
+#include "sw/device/lib/base/macros.h"
+
+OT_USED
+OT_SECTION(".build_info")
+const build_info_t kBuildInfo = {
+  .scm_revision = (build_info_scm_revision_t){
+    .scm_revision_low = 0x6dcbfc4a,
+    .scm_revision_high = 0x004bbd96,
+  },
+  .version = (uint32_t)kBuildInfoVersion1,
+};
+"""
+        self.assertEqual(source, expected)
+
+    def test_sha1_digest_too_large(self):
+        # Compute the max SHA1 digest plus one.
+        INVALID_SHA1_DIGEST_LARGE = 2**(20 * 8)
+        with self.assertRaises(AssertionError):
+            build_info.generate_build_info_c_source(
+                INVALID_SHA1_DIGEST_LARGE)
+
+    def test_sha1_digest_too_small(self):
+        INVALID_SHA1_DIGEST_SMALL = -1
+        with self.assertRaises(AssertionError):
+            build_info.generate_build_info_c_source(
+                INVALID_SHA1_DIGEST_SMALL)
+
+
+class TestFileOperations(unittest.TestCase):
+    @patch('version_file.open',
+           mock_open(read_data=f'BUILD_SCM_REVISION {EXAMPLE_SHA1_DIGEST:x}'))
+    def test_read_version_file(self):
+        """Reading a properly-formatted version file produces the expected int.
+        """
+        version = build_info.read_version_file(
+            pathlib.Path("fake/path/version.txt"), None)
+        self.assertEqual(version, EXAMPLE_SHA1_DIGEST)
+
+    @patch("version_file.open", mock_open(read_data=''))
+    def test_read_version_file_empty(self):
+        """Reading an empty version file raises an exception.
+        """
+        version = build_info.read_version_file(
+            pathlib.Path("fake/path/version.txt"), f'{EXAMPLE_SHA1_DIGEST:x}')
+        self.assertEqual(version, EXAMPLE_SHA1_DIGEST)
+
+    @patch("version_file.open", mock_open(read_data='BUILD_SCM_REVISION xyz'))
+    def test_read_version_file_invalid_hex(self):
+        """Reading an invalid version file raises an exception.
+        """
+        with self.assertRaisesRegex(ValueError, "invalid literal for int"):
+            build_info.read_version_file(
+                pathlib.Path("fake/path/version.txt"), None)
+
+    @patch("pathlib.Path.open", new_callable=mock_open)
+    def test_write_source_file(self, mock_path_open):
+        """Calling write_source_file() produces the expected file.
+        """
+        src_path = build_info.write_source_file(pathlib.Path("fake/out/"),
+                                                "// This is a C program")
+        self.assertEqual(src_path, pathlib.Path("fake/out/build_info.c"))
+        mock_path_open.assert_called_once_with(mode='w', encoding='utf-8')
+
+        handle = mock_path_open()
+        handle.write.assert_called_once_with('// This is a C program')
+
+
+if __name__ == '__main__':
+    unittest.main()
diff --git a/util/check_tool_requirements.py b/util/check_tool_requirements.py
index e46feed2d88bc..2e6f269be805b 100755
--- a/util/check_tool_requirements.py
+++ b/util/check_tool_requirements.py
@@ -4,9 +4,9 @@
 # SPDX-License-Identifier: Apache-2.0
 
 import argparse
-from distutils.version import StrictVersion
 import logging as log
 import os
+from packaging.version import Version
 import re
 import shlex
 import subprocess
@@ -15,6 +15,14 @@
 # Display INFO log messages and up.
 log.basicConfig(level=log.INFO, format="%(levelname)s: %(message)s")
 
+try:
+    from importlib.metadata import version
+except ModuleNotFoundError:
+    log.error("importlib cannot be found. "
+              "This likely means that you're using a very old version of Python. "
+              "Please update Python to the version defined in tool_requirements.py and retry.")
+    sys.exit(1)
+
 
 def get_tool_requirements_path():
     '''Return the path to tool_requirements.py, at the top of the repo'''
@@ -156,7 +164,7 @@ def check(self):
                     'Failed to convert requirement to semantic version: {}'
                     .format(err))
         try:
-            min_sv = StrictVersion(min_semver)
+            min_sv = Version(min_semver)
         except ValueError as err:
             return (False,
                     'Bad semver inferred from required version ({}): {}'
@@ -174,7 +182,7 @@ def check(self):
                     'Failed to convert installed to semantic version: {}'
                     .format(err))
         try:
-            actual_sv = StrictVersion(actual_semver)
+            actual_sv = Version(actual_semver)
         except ValueError as err:
             return (False,
                     'Bad semver inferred from installed version ({}): {}'
@@ -212,7 +220,7 @@ class VeribleToolReq(ToolReq):
 
     def to_semver(self, version, from_req):
         # Drop the hash suffix and convert into version string that
-        # is compatible with StrictVersion in check_version below.
+        # is compatible with Version in check_version below.
         # Example: v0.0-808-g1e17daa -> 0.0.808
         m = re.fullmatch(r'v([0-9]+)\.([0-9]+)-([0-9]+)-g[0-9a-f]+$', version)
         if m is None:
@@ -252,7 +260,7 @@ def to_semver(self, version, from_req):
         # already. A version always has the "2020.03" (year and month) part,
         # and may also have an -SP<n> and/or -<patch> suffix.
         #
-        # Since StrictVersion expects a 3 digit versioning scheme, we multiply
+        # Since Version expects a 3 digit versioning scheme, we multiply
         # any SP number by 100, which should work as long as the patch version
         # isn't greater than 99.
         #
@@ -292,11 +300,12 @@ def to_semver(self, version, from_req):
 
 
 class PyModuleToolReq(ToolReq):
-    '''A tool in a Python module (its version can be found by running pip)'''
-    version_regex = re.compile(r'Version: (.*)')
+    '''A tool in a Python module (its version can be found by reading its metadata)'''
 
-    def _get_tool_cmd(self):
-        return ['pip3', 'show', self.tool]
+    # For Python modules, use metadata directly instead of call into pip3, which
+    # may not always be available for some systems.
+    def get_version(self):
+        return version(self.tool)
 
 
 def dict_to_tool_req(path, tool, raw):
diff --git a/util/container/Dockerfile b/util/container/Dockerfile
index 14c820bbea9bb..e85402d823c17 100644
--- a/util/container/Dockerfile
+++ b/util/container/Dockerfile
@@ -11,19 +11,16 @@ ARG VERIBLE_VERSION=v0.0-3622-g07b310a3
 # The RISCV toolchain version should match the release tag used in GitHub.
 ARG RISCV_TOOLCHAIN_TAR_VERSION=20220210-1
 # This should match the version in bazelish.sh.
-ARG BAZELISK_VERSION=v1.11.0
-# This should match the version in ci/install-package-dependencies.sh
-ARG GCC_VERSION=9
+ARG BAZELISK_VERSION=v1.24.1
 # This should match the version of the lowRISC RISC-V toolchain.
 ARG CLANG_VERSION=16
 
 # Main container image.
-FROM ubuntu:20.04 AS opentitan
+FROM ubuntu:22.04 AS opentitan
 ARG VERILATOR_VERSION
 ARG VERIBLE_VERSION
 ARG RISCV_TOOLCHAIN_TAR_VERSION
 ARG BAZELISK_VERSION
-ARG GCC_VERSION
 ARG CLANG_VERSION
 
 LABEL version="1.0"
@@ -66,13 +63,6 @@ RUN sed -i -e '/^$/d' -e '/^#/d' -e 's/#.*//' /tmp/apt-requirements.txt \
     && apt-get clean; \
     rm -rf /var/lib/apt/lists/* /tmp/* /var/tmp/* /usr/share/doc/*
 
-# Install the CI version of gcc and g++
-RUN add-apt-repository ppa:ubuntu-toolchain-r/test \
-    && apt-get update \
-    && apt-get install -y gcc-${GCC_VERSION} g++-${GCC_VERSION} \
-    && update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-${GCC_VERSION} 90 \
-    && update-alternatives --install /usr/bin/g++ g++ /usr/bin/g++-${GCC_VERSION} 90
-
 # RISC-V device toolchain
 COPY util/get-toolchain.py /tmp/get-toolchain.py
 RUN /tmp/get-toolchain.py -r ${RISCV_TOOLCHAIN_TAR_VERSION} \
@@ -83,7 +73,7 @@ RUN /tmp/get-toolchain.py -r ${RISCV_TOOLCHAIN_TAR_VERSION} \
 # build. These are kept intentionally since we plan to use them in the future, e.g.
 # `llvm-remark-size-diff` and `llvm-tli-checker`.
 RUN curl https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add \
-    && add-apt-repository "deb https://apt.llvm.org/focal/ llvm-toolchain-focal-${CLANG_VERSION} main" \
+    && add-apt-repository "deb https://apt.llvm.org/jammy/ llvm-toolchain-jammy-${CLANG_VERSION} main" \
     && apt update \
     && apt install -y clang-${CLANG_VERSION} lldb-${CLANG_VERSION} lld-${CLANG_VERSION} \
         clangd-${CLANG_VERSION} clang-tidy-${CLANG_VERSION} clang-format-${CLANG_VERSION} \
@@ -129,19 +119,19 @@ RUN curl https://apt.llvm.org/llvm-snapshot.gpg.key | apt-key add \
 # Install verilator prebuild binary
 RUN mkdir -p /tools/verilator \
     && curl -sSfL https://storage.googleapis.com/verilator-builds/verilator-v${VERILATOR_VERSION}.tar.gz | tar -C /tools/verilator -xvzf -
-ENV PATH "/tools/verilator/v${VERILATOR_VERSION}/bin:${PATH}"
+ENV PATH="/tools/verilator/v${VERILATOR_VERSION}/bin:${PATH}"
 
 # Install Verible
 RUN curl -f -Ls -o verible.tar.gz \
         https://github.com/chipsalliance/verible/releases/download/${VERIBLE_VERSION}/verible-${VERIBLE_VERSION}-linux-static-x86_64.tar.gz \
     && mkdir -p /tools/verible \
     && tar -C /tools/verible -xf verible.tar.gz --strip-components=1
-ENV PATH "/tools/verible/bin:${PATH}"
+ENV PATH="/tools/verible/bin:${PATH}"
 
 # Set Locale to utf-8 everywhere
-ENV LC_ALL en_US.UTF-8
-ENV LANG en_US.UTF-8
-ENV LANGUAGE en_US:en
+ENV LC_ALL=en_US.UTF-8
+ENV LANG=en_US.UTF-8
+ENV LANGUAGE=en_US:en
 
 # Scripting for use within this container.
 COPY util/container/start.sh /start.sh
@@ -163,7 +153,7 @@ USER dev:dev
 # specify that an older version of a package must be used for a certain
 # Python version. If that information is not read, pip installs the latest
 # version, which then fails to run.
-ENV PATH "/home/dev/.local/bin:${PATH}"
+ENV PATH="/home/dev/.local/bin:${PATH}"
 COPY --chown=dev:dev python-requirements.txt /tmp/python-requirements.txt
 RUN python3 -m pip install --user -U pip "setuptools<66.0.0" \
     && python3 -m pip install --user -r /tmp/python-requirements.txt \
diff --git a/util/container/README.md b/util/container/README.md
index 3a433605255b1..b98a34e7bb83d 100644
--- a/util/container/README.md
+++ b/util/container/README.md
@@ -1,6 +1,6 @@
 # Docker Container
 
-Docker container based on Ubuntu 20.04 LTS containing various hardware and
+Docker container based on Ubuntu 22.04 LTS containing various hardware and
 software development tools for OpenTitan, as listed in the
 [OpenTitan documentation](../../doc/getting_started/README.md).
 
diff --git a/util/coverage/BUILD b/util/coverage/BUILD
index 5882e4cf3c8a0..019aaca8394dc 100644
--- a/util/coverage/BUILD
+++ b/util/coverage/BUILD
@@ -2,48 +2,11 @@
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
 
-load("@ot_python_deps//:requirements.bzl", "requirement")
+load("@rules_python//python:defs.bzl", "py_binary", "py_library")
 
-py_test(
-    name = "device_profile_data_test",
-    srcs = [
-        "device_profile_data.py",
-        "device_profile_data_test.py",
-    ],
-)
-
-py_test(
-    name = "common_test",
-    srcs = [
-        "common.py",
-        "common_test.py",
-    ],
-)
-
-py_test(
-    name = "unittest_coverage_test",
-    srcs = [
-        "unittest_coverage.py",
-        "unittest_coverage_test.py",
-    ],
-)
-
-py_test(
-    name = "functest_coverage_test",
-    srcs = [
-        "functest_coverage.py",
-        "functest_coverage_test.py",
-    ],
-)
+package(default_visibility = ["//visibility:public"])
 
-py_test(
-    name = "coverage_test",
-    srcs = [
-        "coverage.py",
-        "coverage_test.py",
-    ],
-    deps = [
-        requirement("beautifulsoup4"),
-        requirement("typer"),
-    ],
+py_binary(
+    name = "check_initial_coverage",
+    srcs = ["check_initial_coverage.py"],
 )
diff --git a/util/coverage/check_initial_coverage.py b/util/coverage/check_initial_coverage.py
new file mode 100755
index 0000000000000..37191b0fcdd43
--- /dev/null
+++ b/util/coverage/check_initial_coverage.py
@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+import sys
+
+with open(sys.argv[1], 'rb') as f:
+    data = f.read()
+
+# Remove gap fill
+data = data.rstrip(b'\xa5')
+
+# Asserts the section are all 0xff (uncovered).
+assert data.strip(b'\xff') == b'', data
+
+# Bazel's action requires an output.
+with open(sys.argv[2], 'w') as f:
+    f.write('ok')
diff --git a/util/coverage/collect_cc_coverage/BUILD b/util/coverage/collect_cc_coverage/BUILD
new file mode 100644
index 0000000000000..9895670ef20ff
--- /dev/null
+++ b/util/coverage/collect_cc_coverage/BUILD
@@ -0,0 +1,34 @@
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+load("@rules_rust//rust:defs.bzl", "rust_binary", "rust_library")
+
+package(default_visibility = ["//visibility:public"])
+
+rust_library(
+    name = "coverage_lib",
+    srcs = ["coverage_lib.rs"],
+    data = [
+        "//toolchain:opentitan_toolchain",
+    ],
+    deps = [
+        "@crate_index//:anyhow",
+        "@crate_index//:byteorder",
+        "@crate_index//:hex",
+        "@crate_index//:object",
+        "@crate_index//:rand",
+        "@crate_index//:zerocopy",
+        "@rules_rust//rust/runfiles",
+    ],
+)
+
+rust_binary(
+    name = "collect_cc_coverage",
+    srcs = ["collect_cc_coverage.rs"],
+    deps = [
+        ":coverage_lib",
+        "@crate_index//:anyhow",
+        "@crate_index//:clap",
+    ],
+)
diff --git a/util/coverage/collect_cc_coverage/collect_cc_coverage.rs b/util/coverage/collect_cc_coverage/collect_cc_coverage.rs
new file mode 100644
index 0000000000000..11f6722e3378a
--- /dev/null
+++ b/util/coverage/collect_cc_coverage/collect_cc_coverage.rs
@@ -0,0 +1,96 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//! This tool collects code coverage data for OpenTitan FPGA profiles.
+//!
+//! By taking advantage of Bazel C++ code coverage collection, this script is
+//! able to be executed by the existing coverage collection mechanics.
+//!
+//! Bazel uses the lcov tool for gathering coverage data. There is also
+//! an experimental support for clang llvm coverage, which uses the .profraw
+//! data files to compute the coverage report.
+//!
+//! This tool assumes the following environment variables are set:
+//! - `ROOT`: Location from where the code coverage collection was invoked.
+//! - `RUNFILES_DIR`: Location of the test's runfiles.
+//! - `VERBOSE_COVERAGE`: Print debug info from the coverage scripts
+//! - `COVERAGE_DIR`: The directory where coverage artifacts are stored.
+//! - `TEST_UNDECLARED_OUTPUTS_DIR`: The directory where extra coverage report is stored.
+//!
+//! The script looks in $COVERAGE_DIR for the OpenTitan compressed counters
+//! (`.xprofraw`) and uses lcov to get the coverage data. The coverage data
+//! is placed in $COVERAGE_DIR with `.dat` extension.
+
+use anyhow::Result;
+use clap::Parser;
+use std::env;
+use std::fs;
+
+use coverage_lib::{
+    debug_environ, debug_log, llvm_cov_export, llvm_profdata_merge, search_by_extension,
+    ProfileCounter, ProfileRegistry,
+};
+
+#[derive(Debug, Parser)]
+#[command(
+    name = "collect-cc-coverage",
+    about = "Collects On-Device C++ code coverage data"
+)]
+struct Opts {
+    /// Directory where coverage artifacts are stored.
+    #[arg(long, env = "COVERAGE_DIR")]
+    coverage_dir: Option<std::path::PathBuf>,
+
+    /// Directory where the elf files are stored.
+    #[arg(long)]
+    elf_dir: Option<std::path::PathBuf>,
+
+    /// Directory where extra coverage report is stored.
+    #[arg(long, env = "TEST_UNDECLARED_OUTPUTS_DIR")]
+    output_dir: Option<std::path::PathBuf>,
+}
+
+fn main() -> Result<()> {
+    debug_environ();
+
+    let opts = Opts::parse();
+    let coverage_dir = opts.coverage_dir.unwrap();
+    let profile_registry = match opts.elf_dir {
+        Some(elf_dir) => ProfileRegistry::load_from_dir(&elf_dir),
+        None => ProfileRegistry::load_from_runfiles(),
+    }?;
+
+    let xprofraw_files = search_by_extension(&coverage_dir, "xprofraw");
+    debug_log!("xprofraw_files: {:?}", xprofraw_files);
+
+    // Correlate profile data with counters from the device.
+    for path in &xprofraw_files {
+        debug_log!("Processing {path:?}");
+        // We use .xprofdata instead of .profdata to avoid lcov_merger from parsing it.
+        let profdata_file = path.with_extension("xprofdata");
+        let profraw_file = path.with_extension("profraw");
+        let lcov_file = path.with_extension("dat");
+
+        let counter = ProfileCounter::load(path).unwrap();
+        let profile = profile_registry.get(&counter.build_id).unwrap();
+
+        eprintln!("Profile:");
+        eprintln!("  Profraw:  {:?}", path);
+        eprintln!("  BuildID:  {}", &profile.build_id);
+        eprintln!("  Firmware: {:?}", &profile.file_name);
+        debug_log!("{:?}", &profile.elf);
+
+        profile.generate_profraw(&counter, &profraw_file).unwrap();
+        llvm_profdata_merge(&profraw_file, &profdata_file);
+        llvm_cov_export("lcov", &profdata_file, &profile.elf, &lcov_file);
+
+        if let Some(ref output_dir) = opts.output_dir {
+            let output_lcov_file = output_dir.join(lcov_file.file_name().unwrap());
+            fs::copy(&lcov_file, &output_lcov_file)?;
+        }
+    }
+
+    debug_log!("Success!");
+    Ok(())
+}
diff --git a/util/coverage/collect_cc_coverage/coverage_lib.rs b/util/coverage/collect_cc_coverage/coverage_lib.rs
new file mode 100644
index 0000000000000..0e7e67da8e4d0
--- /dev/null
+++ b/util/coverage/collect_cc_coverage/coverage_lib.rs
@@ -0,0 +1,528 @@
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+//! This module provides utilities to handle coverage profiles for OpenTitan.
+//!
+//! This module assumes the following environment variables are set:
+//! - `RUNFILES_DIR`: Location of the test's runfiles.
+//! - `VERBOSE_COVERAGE`: Print debug info from the coverage scripts
+
+use anyhow::{bail, Context, Result};
+use byteorder::{LittleEndian, ReadBytesExt};
+use object::{Object, ObjectSection};
+use runfiles::{rlocation, Runfiles};
+use std::collections::HashMap;
+use std::env;
+use std::fs;
+use std::io::{Read, Seek, Write};
+use std::path::PathBuf;
+use std::process;
+use zerocopy::{Immutable, IntoBytes};
+
+/// Size of SHA-1 build id.
+pub const BUILD_ID_SIZE: usize = 20;
+/// LLVM's INSTR_PROF_RAW_MAGIC_32.
+/// https://github.com/llvm/llvm-project/blob/llvmorg-16.0.2/compiler-rt/include/profile/InstrProfData.inc#L635-L647
+pub const PRF_MAGIC: u64 = 0xff6c70726f665281; // File magic: \x81Rforpl\xff
+/// OpenTitan specific compressed counter format.
+pub const OTC_MAGIC: u64 = 0xff65766f43544f81; // File magic: \x81OTCove\xff
+/// LLVM's INSTR_PROF_RAW_VERSION.
+/// https://github.com/llvm/llvm-project/blob/llvmorg-16.0.2/compiler-rt/include/profile/InstrProfData.inc#L649-L651
+pub const PRF_VERSION: u64 = 8;
+/// LLVM's VARIANT_MASK_BYTE_COVERAGE.
+/// https://github.com/llvm/llvm-project/blob/llvmorg-16.0.2/compiler-rt/include/profile/InstrProfData.inc#L673
+pub const VARIANT_MASK_BYTE_COVERAGE: u64 = 0x1 << 60;
+/// Size of each entry in __llvm_prf_data section.
+pub const PRF_DATA_ENTRY_SIZE: u64 = 40;
+
+#[macro_export]
+macro_rules! debug_log {
+    ($($arg:tt)*) => {
+        if env::var("VERBOSE_COVERAGE").is_ok() {
+            eprintln!($($arg)*);
+        }
+    };
+}
+
+/// Prints out environment variables to stderr if `VERBOSE_COVERAGE` is set.
+///
+/// This function is primarily used for debugging purposes, providing visibility
+/// into the environment variables to debug bazel integration.
+pub fn debug_environ() {
+    debug_log!("Environment variables::");
+    for (key, value) in env::vars() {
+        debug_log!("{}={}", key, value);
+    }
+}
+
+/// Retrieves a `PathBuf` from an environment variable, panicking if it's empty.
+pub fn path_from_env(name: &str) -> PathBuf {
+    let path = PathBuf::from(env::var(name).unwrap());
+    if path.as_os_str().is_empty() {
+        panic!("Environment variable `{name}` cannot be empty.");
+    }
+    path
+}
+
+/// Searches a directory and its subdirectories for files with a specific extension.
+///
+/// This function recursively traverses the given directory `dir` and all its
+/// subdirectories. It collects and returns a vector of `PathBuf` for all
+/// files whose extension matches the provided `extension` string.
+pub fn search_by_extension(dir: &PathBuf, extension: &str) -> Vec<PathBuf> {
+    let mut paths = Vec::new();
+    if let Ok(entries) = fs::read_dir(dir) {
+        for entry in entries.flatten() {
+            let path = entry.path();
+            if path.is_dir() {
+                paths.extend(search_by_extension(&path, extension));
+            } else if let Some(ext) = path.extension() {
+                if ext == extension {
+                    paths.push(path);
+                }
+            }
+        }
+    }
+    paths
+}
+
+/// LLVM profraw file header.
+///
+/// This represents the INSTR_PROF_RAW_HEADER structure defined in:
+/// http://github.com/llvm/llvm-project/blob/llvmorg-16.0.2/compiler-rt/include/profile/InstrProfData.inc#L128-L141
+#[derive(Debug, Default, Immutable, IntoBytes)]
+#[repr(C)]
+pub struct ProfileHeader {
+    pub magic: u64,
+    pub version: u64,
+    pub binary_ids_size: u64,
+    pub num_data: u64,
+    pub padding_bytes_before_counters: u64,
+    pub num_counters: u64,
+    pub padding_bytes_after_counters: u64,
+    pub names_size: u64,
+    pub counters_delta: u64,
+    pub names_delta: u64,
+    pub value_kind_last: u64,
+}
+
+/// Represents collected profile counter data from a device.
+pub struct ProfileCounter {
+    pub build_id: String,
+    pub cnts: Vec<u8>,
+}
+
+/// Represents coverage metadata from elf files.
+pub struct ProfileData {
+    pub build_id: String,
+    pub elf: PathBuf,
+    pub file_name: String,
+    pub header: ProfileHeader,
+    pub cnts_size: u64,
+    pub data: Vec<u8>,
+    pub names: Vec<u8>,
+}
+
+/// Registry for `ProfileData` instances, indexed by build ID.
+///
+/// This struct manages a collection of `ProfileData` objects, providing a
+/// convenient way to look up coverage metadata by the unique build ID of the
+/// ELF file they originate from.
+pub struct ProfileRegistry {
+    map: HashMap<String, ProfileData>,
+}
+
+fn decompress_counters<T: Read>(f: &mut T) -> Result<Vec<u8>> {
+    let mut cnts: Vec<u8> = Vec::new();
+
+    let mut byte = [0u8; 1];
+    while f.read_exact(&mut byte).is_ok() {
+        if byte[0] == 0 || byte[0] == 0xff {
+            let tag = byte[0];
+            // Compressed padding.
+            f.read_exact(&mut byte)?; // Read the padding marker/size.
+
+            // Determine the padding length.
+            let pad = match byte[0] {
+                0xFE => {
+                    let mut pad = [0u8; 2];
+                    f.read_exact(&mut pad)?;
+                    u16::from_le_bytes(pad) as usize
+                }
+                0xFF => {
+                    let mut pad = [0u8; 4];
+                    f.read_exact(&mut pad[..3])?;
+                    u32::from_le_bytes(pad) as usize
+                }
+                // Any other value is the padding length itself.
+                _ => byte[0] as usize,
+            };
+            let new_size = cnts.len() + pad;
+            // Prevent excessive counter than what can be held on OpenTitan.
+            if new_size > 1024 * 1024 {
+                bail!("Decompressed counter is too large");
+            }
+            cnts.resize(new_size, tag);
+        } else {
+            // Packed data byte.
+            for k in 0..8 {
+                let bit = (byte[0] >> k) & 1;
+                // If bit is 0, original value is 0xff. Otherwise 0x00.
+                cnts.push(if bit == 0 { 0xff } else { 0x00 });
+            }
+        }
+    }
+
+    Ok(cnts)
+}
+
+impl ProfileCounter {
+    /// Loads `ProfileCounter` from a compressed counter file.
+    pub fn load(path: &PathBuf) -> Result<ProfileCounter> {
+        let mut f = std::fs::File::open(path)?;
+
+        // Check header
+        let magic_bytes = f.read_u64::<LittleEndian>()?;
+        if magic_bytes != OTC_MAGIC {
+            bail!("Unknown profraw file magic bytes.");
+        }
+
+        // Read build id
+        let mut build_id = [0u8; BUILD_ID_SIZE];
+        f.read_exact(&mut build_id)?;
+
+        // Decompressed cnts
+        Ok(ProfileCounter {
+            build_id: hex::encode(build_id),
+            cnts: decompress_counters(&mut f)?,
+        })
+    }
+}
+
+impl ProfileData {
+    /// Creates a `ProfileData` instance by extracting coverage metadata from an ELF file.
+    pub fn from_elf(path: &PathBuf) -> Result<ProfileData> {
+        let elf = fs::read(path).context("failed to read ELF")?;
+        let elf = object::File::parse(&*elf).context("failed to parse ELF")?;
+        let file_name = path.file_name().context("Missing filename")?;
+        let file_name = file_name.to_str().context("Missing filename")?.to_string();
+
+        let prf_cnts = elf
+            .section_by_name("__llvm_prf_cnts")
+            .context("__llvm_prf_cnts not found")?;
+        let prf_data = elf
+            .section_by_name("__llvm_prf_data")
+            .context("__llvm_prf_data not found")?;
+        let prf_names = elf
+            .section_by_name("__llvm_prf_names")
+            .context("__llvm_prf_names not found")?;
+        let build_id = elf
+            .section_by_name(".note.gnu.build-id")
+            .context(".note.gnu.build-id not found")?;
+
+        let build_id = build_id.data()?;
+        let build_id = &build_id[build_id.len() - BUILD_ID_SIZE..];
+        let build_id = hex::encode(build_id);
+        debug_log!("Got build_id = {build_id:?}");
+
+        if prf_data.size() % PRF_DATA_ENTRY_SIZE != 0 {
+            bail!("Invalid __llvm_prf_data section size");
+        }
+
+        Ok(ProfileData {
+            build_id,
+            elf: path.clone(),
+            file_name,
+            header: ProfileHeader {
+                magic: PRF_MAGIC,
+                version: PRF_VERSION | VARIANT_MASK_BYTE_COVERAGE,
+                binary_ids_size: 0,
+                num_data: prf_data.size() / PRF_DATA_ENTRY_SIZE,
+                padding_bytes_before_counters: 0,
+                num_counters: 0, // The field will be set later.
+                padding_bytes_after_counters: 0,
+                names_size: prf_names.size(),
+                counters_delta: prf_cnts.address().wrapping_sub(prf_data.address()) as u32 as u64,
+                names_delta: prf_names.address() as u32 as u64,
+                value_kind_last: 1,
+            },
+            cnts_size: prf_cnts.size(),
+            data: prf_data.data()?.to_vec(),
+            names: prf_names.data()?.to_vec(),
+        })
+    }
+
+    /// Generates a `profraw` file from `ProfileData` and a `ProfileCounter`.
+    ///
+    /// This function takes a `ProfileData` instance (which contains coverage
+    /// metadata from an ELF) and a `ProfileCounter` instance (which contains
+    /// the actual counter values from a runtime profile). It combines them to
+    /// produce a `profraw` file in the format expected by LLVM's `llvm-profdata`
+    /// tool.
+    pub fn generate_profraw(&self, counter: &ProfileCounter, output: &PathBuf) -> Result<()> {
+        let ProfileCounter { cnts, .. } = counter;
+
+        if self.cnts_size != cnts.len() as u64 {
+            bail!("cnts size mismatched");
+        }
+
+        let header = ProfileHeader {
+            num_counters: cnts.len() as u64,
+            ..self.header
+        };
+        debug_log!("{:#?}", header);
+        assert_eq!(
+            self.data.len() as u64,
+            header.num_data * PRF_DATA_ENTRY_SIZE
+        );
+        assert_eq!(self.names.len() as u64, header.names_size);
+
+        let mut f = std::fs::File::create(output)?;
+        f.write_all(header.as_bytes())?;
+        f.write_all(&self.data)?;
+        f.write_all(cnts)?;
+        f.write_all(&self.names)?;
+
+        let size = f.stream_position()?;
+        if size % 8 != 0 {
+            let buf = [0; 8];
+            let pad: usize = (8 - (size % 8)) as usize;
+            f.write_all(&buf[..pad])?;
+        }
+
+        Ok(())
+    }
+
+    /// Generates a `profraw` file with all counters covered.
+    ///
+    /// This function creates a synthetic `profraw` file based on the
+    /// `ProfileData`, considering all counters as covered.
+    pub fn generate_view_profraw(&self, output_path: &PathBuf) -> Result<()> {
+        let cnts = vec![0x00; self.cnts_size as usize];
+        let counter = ProfileCounter {
+            build_id: self.build_id.clone(),
+            cnts,
+        };
+        self.generate_profraw(&counter, output_path)
+    }
+}
+
+impl ProfileRegistry {
+    /// Loads all available `ProfileData` from ELF files found in the runfiles directory
+    /// and indexes them by their build ID.
+    pub fn load_from_runfiles() -> Result<ProfileRegistry> {
+        let runfiles_dir = runfiles::find_runfiles_dir().unwrap();
+        debug_log!("runfiles_dir: {:?}", runfiles_dir);
+        Self::load_from_dir(&runfiles_dir)
+    }
+
+    /// Loads all available `ProfileData` from ELF files found in the given directory
+    /// and indexes them by their build ID.
+    pub fn load_from_dir(dir: &PathBuf) -> Result<ProfileRegistry> {
+        // Collect all elf files in the runfiles.
+        let elf_files: Vec<PathBuf> = search_by_extension(dir, "elf");
+
+        debug_log!("elf_files: {:?}", elf_files);
+
+        // Index elf profile data with build id.
+        let mut profile_map = HashMap::new();
+        for path in &elf_files {
+            match ProfileData::from_elf(path) {
+                Ok(profile) => {
+                    debug_log!("Loaded {:?} = {}", profile.file_name, profile.build_id);
+                    profile_map.insert(profile.build_id.clone(), profile);
+                }
+                Err(err) => eprintln!("Skip {path:?}: {err:?}"),
+            }
+        }
+        debug_log!("All elf files are loaded!");
+
+        Ok(ProfileRegistry { map: profile_map })
+    }
+
+    /// Returns the `ProfileData` for the given build ID.
+    pub fn get(&self, build_id: &str) -> Result<&ProfileData> {
+        // Counters only, try to correlate with elf data.
+        let profile = match self.map.get(build_id) {
+            Some(profile) => profile,
+            None => {
+                eprintln!("ERROR: Missing profile with build-id {build_id:?}.");
+                eprintln!("Loaded elf profiles:");
+                for (bid, profile) in &self.map {
+                    eprintln!("  {bid} : {:?}", profile.elf);
+                }
+                bail!("Missing profile with build-id {build_id:?}.");
+            }
+        };
+        Ok(profile)
+    }
+}
+
+fn find_tool(file_name: &str) -> Result<PathBuf> {
+    let r = Runfiles::create().unwrap();
+    let path = PathBuf::from("lowrisc_rv32imcb_toolchain/bin").join(file_name);
+    if let Some(path) = rlocation!(r, path) {
+        debug_log!("Testing {file_name} path: {}", path.display());
+        if path.exists() {
+            return Ok(path);
+        }
+    };
+    bail!("ERROR: missing {file_name} tool.");
+}
+
+/// Executes the llvm-profdata tool to merge multiple profraw files into a single profdata file.
+///
+/// This function constructs and executes an `llvm-profdata merge` command.
+///
+/// $ llvm-profdata merge \
+///     --sparse \
+///     "${profraw_file}" \
+///     --output "${profdata_file}"
+pub fn llvm_profdata_merge(profraw_file: &PathBuf, profdata_file: &PathBuf) {
+    let llvm_profdata = find_tool("llvm-profdata").unwrap();
+
+    // "${LLVM_PROFDATA}" merge -output "${profdata_file}" "${profraw_file}"
+    let mut llvm_profdata_cmd = process::Command::new(llvm_profdata);
+    llvm_profdata_cmd
+        .arg("merge")
+        .arg("--sparse")
+        .arg(profraw_file)
+        .arg("--output")
+        .arg(profdata_file);
+
+    debug_log!("Spawning {:#?}", llvm_profdata_cmd);
+    let status = llvm_profdata_cmd
+        .status()
+        .expect("Failed to spawn llvm-profdata process");
+
+    if !status.success() {
+        process::exit(status.code().unwrap_or(1));
+    }
+}
+
+/// Executes the llvm-cov tool to export coverage data in a specified format.
+///
+/// This function constructs and executes an `llvm-cov export` command.
+///
+/// $ llvm-cov export \
+///     -format="${format}" \
+///     -instr-profile "${profdata_file}" \
+///     -ignore-filename-regex='.*external/.+' \
+///     -ignore-filename-regex='^/tmp/.+' \
+///     "${elf}" \
+///   | sed 's#/proc/self/cwd/##' > "${output_file}"
+pub fn llvm_cov_export(
+    format: &str,
+    profdata_file: &PathBuf,
+    elf: &PathBuf,
+    output_file: &PathBuf,
+) {
+    let llvm_cov = find_tool("llvm-cov").unwrap();
+
+    let mut llvm_cov_cmd = process::Command::new(llvm_cov);
+    llvm_cov_cmd
+        .arg("export")
+        .arg(format!("-format={format}"))
+        .arg("-instr-profile")
+        .arg(profdata_file)
+        .arg("-ignore-filename-regex='.*external/.+'")
+        .arg("-ignore-filename-regex='/tmp/.+'")
+        .arg(elf)
+        .stdout(process::Stdio::piped());
+
+    debug_log!("Spawning {:#?}", llvm_cov_cmd);
+    let child = llvm_cov_cmd
+        .spawn()
+        .expect("Failed to spawn llvm-cov process");
+
+    let output = child.wait_with_output().expect("llvm-cov process failed");
+
+    // Parse the child process's stdout to a string now that it's complete.
+    debug_log!("Parsing llvm-cov output");
+    let mut report_str = std::str::from_utf8(&output.stdout)
+        .expect("Failed to parse llvm-cov output")
+        .replace("/proc/self/cwd/", "");
+
+    if format == "lcov" {
+        report_str = merge_lcov_count_copies(&report_str).unwrap();
+    }
+
+    debug_log!("Writing output to {}", output_file.display());
+    fs::write(output_file, report_str).unwrap();
+}
+
+/// Merges function and line coverage counts for duplicate entries within a single source file.
+///
+/// This helper function is used by `merge_lcov_count_copies` to process
+/// an individual source file block (`SF:`) from an LCOV report. It aggregates
+/// `FNDA:` (function data) and `DA:` (line data) entries, summing up counts
+/// for any duplicates.
+fn merge_sf_count_copies(contents: &str) -> Result<String> {
+    if !contents.starts_with("SF:") {
+        bail!("Expected contents to start with SF:, got: {}", contents);
+    }
+
+    let mut out = String::new();
+    let mut fnda = HashMap::<String, u64>::new();
+    let mut da = HashMap::<u64, u64>::new();
+
+    for line in contents.lines() {
+        if line.starts_with("FNDA:") {
+            // FNDA:<count>,<name>
+            let line = line.strip_prefix("FNDA:").unwrap();
+            let parts: Vec<&str> = line.split(',').collect();
+            let count = parts[0].parse::<u64>()?;
+            let name = parts[1].to_string();
+            *fnda.entry(name).or_insert(0) += count;
+        } else if line.starts_with("DA:") {
+            // DA:<lineno>,<count>
+            let line = line.strip_prefix("DA:").unwrap();
+            let parts: Vec<&str> = line.split(',').collect();
+            let lineno = parts[0].parse::<u64>()?;
+            let count = parts[1].parse::<u64>()?;
+            *da.entry(lineno).or_insert(0) += count;
+        } else {
+            out.push_str(&format!("{line}\n"));
+        }
+    }
+
+    // Construct merged FNDA/DA entries
+    let mut sorted_fnda: Vec<_> = fnda.into_iter().collect();
+    sorted_fnda.sort_by(|a, b| a.0.cmp(&b.0));
+    for (name, count) in sorted_fnda {
+        out.push_str(&format!("FNDA:{count},{name}\n"));
+    }
+    let mut sorted_da: Vec<_> = da.into_iter().collect();
+    sorted_da.sort_by(|a, b| a.0.cmp(&b.0));
+    for (lineno, count) in sorted_da {
+        out.push_str(&format!("DA:{lineno},{count}\n"));
+    }
+
+    Ok(out)
+}
+
+/// Merges function and line coverage counts for each source file within an LCOV report.
+///
+/// LCOV reports can sometimes contain multiple FNDA entries for the same function in the same
+/// source file, and bazel's lcov_merger cannot handle them properly.
+///
+/// This function processes an entire LCOV report, identifies each `SF:` blocks, and merges all
+/// duplicated `FNDA:` (function data) and `DA:` (line data) counts into a single consolidated
+/// entry for each source file path.
+fn merge_lcov_count_copies(contents: &str) -> Result<String> {
+    let mut out = String::new();
+
+    // Iterate through each SF by splitting with end_of_record
+    for record in contents.split("\nend_of_record\n") {
+        if record.trim().is_empty() {
+            continue;
+        }
+
+        let record = merge_sf_count_copies(record)?;
+        out.push_str(&record);
+        out.push_str("end_of_record\n");
+    }
+
+    Ok(out)
+}
diff --git a/util/coverage/combined_report.py b/util/coverage/combined_report.py
deleted file mode 100644
index 2873fa9418494..0000000000000
--- a/util/coverage/combined_report.py
+++ /dev/null
@@ -1,126 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import logging as log
-import os
-from pathlib import Path, PurePath
-from typing import Any
-
-from bs4 import BeautifulSoup
-from common import (LLVM_COV, LLVM_PROFDATA, CoverageType, LogLevel,
-                    artifacts_relpath, run)
-
-
-def add_test_type_to_combined_report(out_root_dir: Path = Path("coverage")) -> None:
-    """Adds the "Test Type" column to the combined report HTML report.
-
-    This new column contains links to the actual coverage reports that cover each line.
-    """
-    combined = out_root_dir / artifacts_relpath() / "combined" / "coverage"
-    func = out_root_dir / artifacts_relpath() / "func" / "coverage"
-    unit = out_root_dir / artifacts_relpath() / "unit" / "coverage"
-
-    def covered_rows(path: Path):
-        """Returns the rows of a coverage report that are covered by tests."""
-
-        def second_col_non_zero(row: Any) -> bool:
-            """Return True if the second column is non-zero."""
-            if row.name == 'tr':
-                cols = row.find_all('td')
-                return len(cols) > 1 and cols[1].getText().strip().lower(
-                ) not in ["0", "", "count"]
-            return False
-
-        return BeautifulSoup(path.read_text(),
-                             "html.parser").find_all(second_col_non_zero)
-
-    def add_back_link(target_row, combined_rows, string: str, relpath) -> None:
-        """Adds a link that points to `target_row` to the corresponding row in
-        `combined_rows`."""
-        link_in_target = target_row.contents[0].contents[0]
-        line_num = int(link_in_target.string)
-        pre = combined_html.new_tag("pre")
-        pre.append(string)
-        link_to_target = combined_html.new_tag("a",
-                                               href=relpath +
-                                               link_in_target["href"])
-        link_to_target.append(pre)
-        cell = combined_rows[line_num].contents[1]
-        if cell.contents:
-            span = combined_html.new_tag("span")
-            span.append(" ")
-            cell.append(span)
-        cell.append(link_to_target)
-
-    for combined_file in combined.rglob("*.html"):
-        relpath = combined_file.relative_to(combined)
-        combined_html = BeautifulSoup(combined_file.read_text(), "html.parser")
-        # Skip the first row in the table which is the path of the source file.
-        combined_rows = combined_html.find("table",
-                                           recursive=True).contents[1:]
-        # Add the column to the header row and subsequent rows.
-        header_cell = combined_html.new_tag("td", style="text-align: center;")
-        header_pre = combined_html.new_tag("pre")
-        header_pre.append("Test Type")
-        header_cell.append(header_pre)
-        combined_rows[0].insert(1, header_cell)
-        for row in combined_rows[1:]:
-            row.insert(
-                1, combined_html.new_tag("td", style="text-align: center;"))
-        # Add links to functional test report.
-        func_file = func / relpath
-        if func_file.exists():
-            for row in covered_rows(func_file):
-                add_back_link(
-                    row, combined_rows, "func",
-                    os.path.relpath(func_file, start=combined_file.parent))
-        # Add links to unit test report.
-        unit_file = unit / relpath
-        if unit_file.exists():
-            for row in covered_rows(unit_file):
-                add_back_link(
-                    row, combined_rows, "unit",
-                    os.path.relpath(unit_file, start=combined_file.parent))
-        # Write changes.
-        combined_file.write_text(str(combined_html))
-
-
-def combined_report(out_root_dir: Path = Path("coverage"),
-                    log_level: LogLevel = LogLevel.NONE,
-                    print_text_report: bool = False) -> None:
-    """Generates a combined coverage report from functional and unit test coverage
-    reports.
-    """
-    if log_level != LogLevel.NONE:
-        log.basicConfig(level=log.getLevelName(log_level.upper()))
-    out_dir = out_root_dir / artifacts_relpath() / "combined"
-    out_dir.mkdir(parents=False, exist_ok=True)
-    merged_profile = out_dir / "merged.profdata"
-    # Merge functional and unit test profile data.
-    coverage_paths = [
-        out_root_dir / artifacts_relpath() / PurePath(c.value)
-        for c in [CoverageType.FUNCTEST, CoverageType.UNITTEST]
-    ]
-    libraries = [str(p / "merged.so") for p in coverage_paths]
-    profiles = [str(p / "merged.profdata") for p in coverage_paths]
-    run(LLVM_PROFDATA, "merge", "--sparse", "--output", str(merged_profile),
-        *profiles)
-    # Generate html coverage report.
-    run(LLVM_COV, "show", "--show-line-counts", "--show-regions",
-        "--project-title=OpenTitan Combined Coverage Report",
-        "--format=html", f"--output-dir=./{out_dir}", "--instr-profile",
-        str(merged_profile), libraries[0], f"--object={libraries[1]}")
-    add_test_type_to_combined_report(out_root_dir)
-    # Generate text coverage report.
-    with (out_dir / "report.txt").open("w") as f:
-        f.write("\n".join(
-            run(LLVM_COV, "report", "--instr-profile", str(merged_profile),
-                libraries[0], f"--object={libraries[1]}")))
-    if print_text_report:
-        print("\n".join(
-            run(LLVM_COV, "report", "--use-color", "--instr-profile",
-                str(merged_profile), libraries[0],
-                f"--object={libraries[1]}")))
-    print(f"Saved coverage artifacts in {out_dir}")
diff --git a/util/coverage/common.py b/util/coverage/common.py
deleted file mode 100644
index 41413adfedadf..0000000000000
--- a/util/coverage/common.py
+++ /dev/null
@@ -1,277 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import logging as log
-import os
-import subprocess
-from collections import namedtuple
-from enum import Enum
-from pathlib import Path, PurePath
-from pprint import pformat
-from typing import Callable, List
-
-# Commands used by the coverage scripts.
-BAZEL: str = "./bazelisk.sh"
-LLVM_PROFDATA: str = "llvm-profdata"
-LLVM_COV: str = "llvm-cov"
-LLD_HOST: str = "ld.lld"
-LLD_TARGET: str = "/tools/riscv/bin/riscv32-unknown-elf-ld"
-
-# Query for device libraries to be instrumented.
-DEVICE_LIBS_INC: List[str] = [
-    "//sw/device/lib/...",
-    "//sw/device/silicon_creator/...",
-]
-DEVICE_LIBS_EXC: List[str] = [
-    "//sw/device/lib/arch/...",
-    "//sw/device/lib/base:mmio_on_device_do_not_use_directly",
-    "//sw/device/lib/base:mmio_on_host_do_not_use_directly",
-    "//sw/device/lib/base:status",
-    "//sw/device/lib/base:status_report_unittest_c",
-    "//sw/device/lib/crypto/...",
-    "//sw/device/lib/dif/...",
-    "//sw/device/lib/runtime/...",
-    "//sw/device/lib/testing/... ",
-    "//sw/device/lib/ujson/...",
-    "//sw/device/silicon_creator/manuf/...",
-    "//sw/device/silicon_creator/rom/keys/real:real",
-    "//sw/device/silicon_creator/rom_ext/...",
-]
-DEVICE_LIBS_QUERY: str = (
-    f"kind('^cc_library rule$', ({' + '.join(DEVICE_LIBS_INC)}) "
-    f"- ({' + '.join(DEVICE_LIBS_EXC)}))")
-
-
-class LogLevel(str, Enum):
-    NONE: str = "none"
-    INFO: str = "info"
-    DEBUG: str = "debug"
-
-
-class CoverageType(str, Enum):
-    UNITTEST: str = "unit"
-    FUNCTEST: str = "func"
-    E2ETEST: str = "e2e"
-
-
-class BazelTestType(str, Enum):
-    CC_TEST: str = "cc_test"
-    SH_TEST: str = "sh_test"
-
-
-def run(*args) -> List[str]:
-    """Run the given command in a subprocess.
-
-    Args:
-        args: Command (the first parameter) and arguments (remaining arguments).
-
-    Returns:
-        Stdout lines in a list. Empty lines are filtered out.
-    """
-    log.debug(f"command: {' '.join(args)}")
-    try:
-        res = subprocess.run(args,
-                             env=os.environ.copy(),
-                             stdout=subprocess.PIPE,
-                             stderr=subprocess.PIPE,
-                             encoding='ascii',
-                             errors='ignore',
-                             check=True)
-    except subprocess.CalledProcessError as e:
-        log.error(f"stdout: {e.stdout if e.stdout else '(empty)'}")
-        log.error(f"stderr: {e.stderr if e.stderr else '(empty)'}")
-        raise
-    log.debug(f"stdout: {res.stdout if res.stdout else '(empty)'}")
-    log.debug(f"stderr: {res.stderr if res.stderr else '(empty)'}")
-    return [line for line in res.stdout.splitlines() if line]
-
-
-def instrument_device_libs(device_libs: List[str], config: str) -> List[str]:
-    """Instrument device libraries.
-
-    A coverage report can be created from multiple object files as long as they have
-    coverage data. However, unused inline functions can trigger confusing hash-mismatch
-    warnings and functions that appear in more than one object file can cause
-    undercounting. This function builds the given device libraries with coverage
-    instrumentation, gathers and returns their object files which can then be combined
-    into a single library to avoid such problems.
-
-    Args:
-        device_libs: List of device libraries to be instrumented.
-        config: Bazel configuration to use.
-
-    Returns:
-        Instrumented object files of the given device libraries.
-    """
-    log.info(f"libraries to be instrumented: {pformat(device_libs)}")
-    run(BAZEL, "build", f"--config={config}", *device_libs)
-    starlark_list = "[f.path for f in target.output_groups.compilation_outputs.to_list()]"
-    obj_files = run(BAZEL, "cquery", f"--config={config}",
-                    f"({' + '.join(device_libs)})", "--output=starlark",
-                    f"--starlark:expr='\\n'.join({starlark_list})")
-    log.info(f"object files with coverage data: {pformat(obj_files)}")
-    return obj_files
-
-
-def get_test_log_dirs(test_targets: List[str]) -> List[Path]:
-    """Get log directories for the given test targets.
-
-    Args:
-        test_targets: Test targets.
-
-    Returns:
-        Log directories of the given test targets.
-    """
-    [test_log_dir_root] = run(BAZEL, "info", "bazel-testlogs")
-    test_log_dirs = []
-    for t in test_targets:
-        # Test targets are of the form: //foo/bar:test_name. Drop the first two
-        # characters and replace ':' to get a path relative to `test_log_dir_root`.
-        test_log_dir = Path(test_log_dir_root) / t[2:].replace(':', '/')
-        test_log_dirs.append(test_log_dir)
-    return test_log_dirs
-
-
-def generate_report(out_dir: Path, merged_profile: Path, merged_library: Path,
-                    report_title: str, print_text_report: bool) -> None:
-    """Generate a coverage report.
-
-    This function generates a coverage report from the given merged profile and library.
-
-    Args:
-        out_dir: Path where to save the html report.
-        merged_profile: Path of merged profile data.
-        merged_library: Path of the merged library with coverage data.
-        print_text_report: Whether to print the text report.
-    """
-    # Generate html coverage report.
-    run(LLVM_COV, "show", "--show-line-counts", "--show-regions",
-        f"--project-title={report_title}", "--format=html",
-        f"--output-dir=./{out_dir}", "--instr-profile", str(merged_profile),
-        str(merged_library))
-    # Generate text coverage report.
-    with (out_dir / "report.txt").open("w") as f:
-        f.write("\n".join(
-            run(LLVM_COV, "report", "--instr-profile", str(merged_profile),
-                str(merged_library))))
-    if print_text_report:
-        print("\n".join(
-            run(LLVM_COV, "report", "--use-color", "--instr-profile",
-                str(merged_profile), str(merged_library))))
-    print(f"Saved coverage artifacts in {out_dir}")
-
-
-# Query for test targets
-TEST_TARGETS_INC = [
-    "//sw/device/silicon_creator/...",
-]
-TEST_TARGETS_EXC = [
-    "//sw/device/silicon_creator/rom_ext/...",
-    "//sw/device/lib/base:status_unittest",
-    "//sw/device/lib/base:status_report_unittest",
-    "attr(tags, '[\\[ ]dv[,\\]]', //sw/device/silicon_creator/...)",
-    "attr(tags, '[\\[ ]verilator[,\\]]', //sw/device/silicon_creator/...)",
-    "attr(tags, '[\\[ ]broken[,\\]]', //sw/device/silicon_creator/...)",
-]
-
-
-def test_targets_query(test_type: BazelTestType) -> str:
-    return (f"kind('^{test_type} rule$', ({' + '.join(TEST_TARGETS_INC)})"
-            f" - ({' + '.join(TEST_TARGETS_EXC)}))")
-
-
-CoverageParams = namedtuple("CoverageParams", [
-    "config",
-    "libs_fn",
-    "objs_fn",
-    "test_targets_fn",
-    "test_log_dirs_fn",
-    "bazel_test_type",
-    "report_title",
-])
-
-
-def measure_coverage(*, log_level: LogLevel, out_dir: Path, config: str,
-                     libs_fn: Callable[[List[str]], List[str]],
-                     objs_fn: Callable[[Path, List[str]], None],
-                     test_targets_fn: Callable[[List[str]], List[str]],
-                     test_log_dirs_fn: Callable[[List[Path]], List[Path]],
-                     bazel_test_type: BazelTestType, report_title: str,
-                     print_text_report: bool) -> None:
-    """Measure test coverage.
-
-    Args:
-        log_level: Log level.
-        out_dir: Coverage artifacts directory.
-        config: Bazel configuration to use.
-        libs_fn: A callable for modifying the set of device libraries if needed.
-        objs_fn: A callable for modifying the set of object files if needed.
-        test_targets_fn: A callable for modifying the set of tests if needed.
-        test_log_dirs_fn: A callable that returns profile files for the given tests.
-        bazel_test_type: Type of bazel test to search for.
-        report_title: Title of the HTML report.
-        print_text_report: Whether to print the text report.
-    """
-    if log_level != LogLevel.NONE:
-        log.basicConfig(level=log.getLevelName(log_level.upper()))
-    out_dir.mkdir(parents=True, exist_ok=True)
-    # Create a merged library to avoid potential issues due to inline functions or
-    # duplicate definitions.
-    merged_library = out_dir / "merged.so"
-    device_libs_all = run(
-        BAZEL,
-        "query",
-        DEVICE_LIBS_QUERY,
-    )
-    device_libs = libs_fn(device_libs_all)
-    obj_files = instrument_device_libs(device_libs, config)
-    objs_fn(merged_library, obj_files)
-    # Gather, filter, and run tests.
-    test_targets_all = run(
-        BAZEL,
-        "query",
-        test_targets_query(bazel_test_type),
-    )
-    test_targets = test_targets_fn(test_targets_all)
-    # Instrumented ROM overflows the space allocated for ROM. `test_targets_fn` for
-    # functional tests programs the FPGA with the non-instrumented test ROM and we skip
-    # bitstream loading during tests.
-    run(
-        BAZEL,
-        "coverage",
-        "--define",
-        "bitstream=skip",
-        f"--config={config}",
-        "--test_output=all",
-        *test_targets,
-    )
-    # Merge profile data of individual tests to be able to generate a single report
-    # for all targets that we are interested in.
-    merged_profile = out_dir / "merged.profdata"
-    test_log_dirs = get_test_log_dirs(test_targets)
-    profile_files = test_log_dirs_fn(test_log_dirs)
-    run(
-        LLVM_PROFDATA,
-        "merge",
-        "--sparse",
-        "--output",
-        str(merged_profile),
-        *[str(p) for p in profile_files],
-    )
-    # Generate a report from the merged profile data and the merged library.
-    generate_report(out_dir, merged_profile, merged_library, report_title,
-                    print_text_report)
-
-
-def artifacts_relpath() -> PurePath:
-    """Relative path for coverage artifacts.
-
-    Returns:
-        "<HEAD_TIMESTAMP>-<HEAD_HASH>"
-    """
-    [head_hash] = run("git", "rev-parse", "HEAD")
-    [head_timestamp] = run("git", "show", "-s", "--format=%ct", "HEAD")
-    path = PurePath(f"{head_timestamp}-{head_hash}")
-    return path
diff --git a/util/coverage/common_test.py b/util/coverage/common_test.py
deleted file mode 100644
index eebe39baf9449..0000000000000
--- a/util/coverage/common_test.py
+++ /dev/null
@@ -1,262 +0,0 @@
-#!/usr/bin/env python3
-
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import subprocess
-import unittest
-from collections import namedtuple
-from pathlib import Path, PurePath
-from unittest.mock import Mock, mock_open, patch
-
-import common
-
-
-class AnyStringWith(str):
-
-    def __eq__(self, other):
-        return self in other
-
-
-class AnyDict(dict):
-
-    def __eq__(self, other):
-        return True
-
-
-class TestCommon(unittest.TestCase):
-
-    RUN_ARGS = {
-        "check": True,
-        "encoding": "ascii",
-        "errors": "ignore",
-        "env": AnyDict(),
-        "stderr": subprocess.PIPE,
-        "stdout": subprocess.PIPE,
-    }
-
-    @patch("common.subprocess.run")
-    def test_run_single_arg_error(self, mock_run):
-        mock_run.side_effect = Exception("foo")
-        with self.assertRaisesRegex(Exception, "foo"):
-            common.run("ls")
-        mock_run.assert_called_once_with(("ls", ), **self.RUN_ARGS)
-
-    @patch("common.subprocess.run")
-    def test_run_multi_arg_error(self, mock_run):
-        mock_run.side_effect = Exception("foo")
-        with self.assertRaisesRegex(Exception, "foo"):
-            common.run("ls", "-la", "./")
-        mock_run.assert_called_once_with(("ls", "-la", "./"), **self.RUN_ARGS)
-
-    @patch("common.subprocess.run")
-    def test_run_single_arg_success(self, mock_run):
-        MockStreams = namedtuple("MockStdout", ["stdout", "stderr"])
-        mock_run.side_effect = (MockStreams(
-            stdout="\nline 1\n\nline 2\nline3\n\n", stderr=""), )
-        self.assertEqual(common.run("ls"), ["line 1", "line 2", "line3"])
-        mock_run.assert_called_once_with(("ls", ), **self.RUN_ARGS)
-
-    @patch("common.subprocess.run")
-    def test_run_multi_arg_success(self, mock_run):
-        common.run("ls", "-la", "./")
-        mock_run.assert_called_once_with(("ls", "-la", "./"), **self.RUN_ARGS)
-
-    @patch("common.run")
-    def test_artifacts_relpath(self, mock_run):
-        head_hash = ["abcdef"]
-        head_timestamp = ["123456"]
-        expected_relpath = PurePath(f"{head_timestamp[0]}-{head_hash[0]}")
-
-        mock_run.side_effect = (head_hash, head_timestamp)
-
-        self.assertEqual(common.artifacts_relpath(), expected_relpath)
-
-        calls_run = mock_run.call_args_list
-        self.assertEqual(len(calls_run), 2)
-        self.assertEqual(calls_run[0][0], ("git", "rev-parse", "HEAD"))
-        self.assertEqual(calls_run[1][0],
-                         ("git", "show", "-s", "--format=%ct", "HEAD"))
-
-    @patch("common.run")
-    def test_instrument_device_libs(self, mock_run):
-        device_libs = ["//foo:bar", "//foo:baz"]
-        obj_files = ["foo.o", "bar.o", "baz.o"]
-
-        mock_run.side_effect = (None, obj_files)
-
-        self.assertEqual(common.instrument_device_libs(device_libs, 'qux'),
-                         obj_files)
-        calls_run = mock_run.call_args_list
-        self.assertEqual(len(calls_run), 2)
-        self.assertEqual(calls_run[0][0],
-                         (common.BAZEL, "build", "--config=qux", *device_libs))
-        starlark_list = "[f.path for f in target.output_groups.compilation_outputs.to_list()]"
-        self.assertEqual(calls_run[1][0],
-                         (common.BAZEL, "cquery", "--config=qux",
-                          "(//foo:bar + //foo:baz)", '--output=starlark',
-                          f"--starlark:expr='\\n'.join({starlark_list})"))
-
-    @patch("common.run")
-    def test_get_test_log_dirs(self, mock_run):
-        test_targets = ["//foo:bar", "//foo:baz"]
-        test_log_dir = ["/qux/testlogs"]
-
-        mock_run.side_effect = (test_log_dir, )
-
-        self.assertEqual(
-            common.get_test_log_dirs(test_targets),
-            [Path("/qux/testlogs/foo/bar"),
-             Path("/qux/testlogs/foo/baz")])
-        mock_run.assert_called_once_with(common.BAZEL, "info",
-                                         "bazel-testlogs")
-
-    @patch("common.print")
-    @patch("pathlib.Path.open", new_callable=mock_open)
-    @patch("pathlib.Path.__truediv__",
-           side_effect=Path.__truediv__,
-           autospec=True)
-    @patch("common.run")
-    def test_generate_report(self, mock_run, mock_path_div, mock_path_open,
-                             mock_print):
-        for print_text_report in (True, False):
-            for m in [mock_run, mock_path_div, mock_path_open, mock_print]:
-                m.reset_mock()
-            with self.subTest(f"print_text_report:{print_text_report}"):
-                out_dir = Path("foo")
-                merged_profile = Path("merged.profdata")
-                merged_library = Path("merged.so")
-                report_title = "My Report"
-                text_report_content = [
-                    "<contents of coverage report in text format>"
-                ]
-                # (1) html report, (2) text report, (3) print text report (if requested)
-                mock_run.side_effect = ([], text_report_content,
-                                        text_report_content)
-
-                common.generate_report(out_dir, merged_profile, merged_library,
-                                       report_title, print_text_report)
-
-                calls_run = mock_run.call_args_list
-                self.assertEqual(
-                    calls_run[0][0],
-                    (common.LLVM_COV, "show", "--show-line-counts",
-                     "--show-regions", f"--project-title={report_title}",
-                     "--format=html", "--output-dir=./foo", "--instr-profile",
-                     str(merged_profile), str(merged_library)))
-                self.assertEqual(calls_run[1][0],
-                                 (common.LLVM_COV, "report", "--instr-profile",
-                                  str(merged_profile), str(merged_library)))
-                mock_path_div.assert_called_once_with(out_dir, "report.txt")
-                mock_path_open.assert_called_once_with("w")
-                mock_path_open().write.assert_called_once_with(
-                    *text_report_content)
-
-                if print_text_report:
-                    self.assertEqual(len(calls_run), 3)
-                    self.assertEqual(calls_run[2][0],
-                                     (common.LLVM_COV, "report", "--use-color",
-                                      "--instr-profile", str(merged_profile),
-                                      str(merged_library)))
-
-                    calls_print = mock_print.call_args_list
-                    self.assertEqual(len(calls_print), 2)
-                    self.assertEqual(calls_print[0][0],
-                                     (*text_report_content, ))
-                    self.assertEqual(calls_print[1][0],
-                                     AnyStringWith("coverage artifacts in"))
-                else:
-                    self.assertEqual(len(calls_run), 2)
-                    mock_print.assert_called_once_with(
-                        AnyStringWith("coverage artifacts in"))
-
-    @patch("common.generate_report")
-    @patch("common.get_test_log_dirs")
-    @patch("common.instrument_device_libs")
-    # Use `autospec=True` to mock the unbounded `Path.mkdir` and `Path.__truediv__`
-    # methods so that we can assert the values of both the `self` and the `other`
-    # arguments of calls.
-    @patch("pathlib.Path.mkdir", autospec=True)
-    @patch("pathlib.Path.__truediv__", autospec=True)
-    @patch("common.run")
-    def test_measure_coverage(self, mock_run, mock_path_div, mock_path_mkdir,
-                              mock_instrument_device_libs,
-                              mock_get_test_logs_dir, mock_generate_report):
-        out_dir = Path("{out_root_dir}/123456-cafecafe/{out_sub_dir}")
-        device_libs_all = ["//foo:bar1", "//foo:bar2", "//foo:bar3"]
-        device_libs = ["//for:bar2", "//foo:bar3"]
-        obj_files = ["//foo:bar2.o", "//foo:bar3.o"]
-        merged_library = out_dir / "merged.so"
-        bazel_test_type = common.BazelTestType.CC_TEST
-        config = "my_config"
-        test_targets_all = ["//foo:test1", "//foo:test2", "//foo:test3"]
-        test_targets = ["//foo:test1", "//foo:test3"]
-        test_log_dirs = ["/testlogs/foo/test1", "/testlogs/foo/test3"]
-        profile_files = [
-            "/testlogs/foo/test1/coverage.profdata",
-            "/testlogs/foo/test3/coverage.profdata"
-        ]
-        merged_profile = out_dir / "merged.profdata"
-        report_title = "My Report"
-        print_text_report = True
-
-        mock_libs_fn = Mock(side_effect=(device_libs, ))
-        mock_objs_fn = Mock(side_effect=(obj_files, ))
-        mock_test_targets_fn = Mock(side_effect=(test_targets, ))
-        mock_test_log_dirs_fn = Mock(side_effect=(profile_files, ))
-
-        mock_run.side_effect = (
-            device_libs_all,
-            test_targets_all,
-            None,
-            None,
-        )
-        mock_instrument_device_libs.side_effect = (obj_files, )
-        mock_get_test_logs_dir.side_effect = (test_log_dirs, )
-
-        common.measure_coverage(
-            bazel_test_type=bazel_test_type,
-            config=config,
-            libs_fn=mock_libs_fn,
-            log_level=common.LogLevel.NONE,
-            objs_fn=mock_objs_fn,
-            out_dir=out_dir,
-            print_text_report=print_text_report,
-            report_title=report_title,
-            test_log_dirs_fn=mock_test_log_dirs_fn,
-            test_targets_fn=mock_test_targets_fn,
-        )
-
-        mock_path_mkdir.assert_called_once_with(out_dir,
-                                                parents=True,
-                                                exist_ok=True)
-        calls_run = mock_run.call_args_list
-        self.assertEqual(len(calls_run), 4)
-        self.assertEqual(calls_run[0][0],
-                         (common.BAZEL, "query", common.DEVICE_LIBS_QUERY))
-        mock_libs_fn.assert_called_once_with(device_libs_all)
-        mock_instrument_device_libs.assert_called_once_with(
-            device_libs, config)
-        mock_objs_fn.assert_called_once_with(out_dir / "merged.so", obj_files)
-        self.assertEqual(
-            calls_run[1][0],
-            (common.BAZEL, "query", AnyStringWith(bazel_test_type.value)))
-        mock_test_targets_fn.assert_called_once_with(test_targets_all)
-        self.assertEqual(
-            calls_run[2][0],
-            (common.BAZEL, "coverage", "--define", "bitstream=skip",
-             f"--config={config}", "--test_output=all", *test_targets))
-        mock_get_test_logs_dir.assert_called_once_with(test_targets)
-        mock_test_log_dirs_fn.assert_called_once_with(test_log_dirs)
-        self.assertEqual(calls_run[3][0],
-                         (common.LLVM_PROFDATA, "merge", "--sparse",
-                          "--output", str(merged_profile), *profile_files))
-        mock_generate_report.assert_called_once_with(out_dir, merged_profile,
-                                                     merged_library,
-                                                     report_title,
-                                                     print_text_report)
-
-
-if __name__ == "__main__":
-    unittest.main()
diff --git a/util/coverage/coverage.py b/util/coverage/coverage.py
deleted file mode 100755
index f00c10e82fa3a..0000000000000
--- a/util/coverage/coverage.py
+++ /dev/null
@@ -1,67 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-"""Measure unit test coverage of silicon creator code.
-
-Given a directory `out_root_dir` the coverage artifacts will be saved in
-`out_root_dir`/<HEAD_TIMESTAMP>-<HEAD_HASH>/unittest/`.
-
-Typical usage:
-    util/coverage/coverage_off_target.py --print-text-report
-"""
-
-from pathlib import Path, PurePath
-from typing import Dict
-
-import typer
-from combined_report import combined_report
-from common import (CoverageParams, CoverageType, LogLevel, artifacts_relpath,
-                    measure_coverage)
-from functest_coverage import PARAMS as FUNCTEST_PARAMS
-from unittest_coverage import PARAMS as UNITTEST_PARAMS
-
-app = typer.Typer(pretty_exceptions_enable=False, add_completion=False)
-
-PARAMS: Dict[str, CoverageParams] = {
-    CoverageType.UNITTEST: UNITTEST_PARAMS,
-    CoverageType.FUNCTEST: FUNCTEST_PARAMS,
-}
-
-
-@app.command()
-def combine_reports(out_root_dir: Path = Path("coverage"),
-                    log_level: LogLevel = LogLevel.NONE,
-                    print_text_report: bool = False) -> None:
-    """Generates a combined coverage report from functional and unit test coverage
-    reports.
-    """
-    return combined_report(out_root_dir, log_level, print_text_report)
-
-
-@app.command("artifacts-relpath")
-def artifacts_relpath_cmd() -> None:
-    """Prints the relative path for coverage artifacts.
-    """
-    print(artifacts_relpath())
-
-
-@app.command()
-def measure(
-    coverage_type: CoverageType,
-    out_root_dir: Path = Path("coverage"),
-    log_level: LogLevel = LogLevel.NONE,
-    print_text_report: bool = False,
-) -> None:
-    """Measures coverage of silicon creator code."""
-    measure_coverage(
-        log_level=log_level,
-        out_dir=out_root_dir / artifacts_relpath() /
-        PurePath(coverage_type.value),
-        print_text_report=print_text_report,
-        **PARAMS[coverage_type]._asdict(),
-    )
-
-
-if __name__ == "__main__":
-    app()
diff --git a/util/coverage/coverage_test.py b/util/coverage/coverage_test.py
deleted file mode 100644
index 2f7864a92cf10..0000000000000
--- a/util/coverage/coverage_test.py
+++ /dev/null
@@ -1,39 +0,0 @@
-#!/usr/bin/env python3
-
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import unittest
-from collections import namedtuple
-from pathlib import Path
-from unittest.mock import patch
-
-import common
-
-import coverage
-
-MockParams = namedtuple("MockParams", ["foo"])
-
-
-class TestExtractProfileData(unittest.TestCase):
-
-    @patch.dict("coverage.PARAMS",
-                {common.CoverageType.UNITTEST: MockParams("bar")},
-                clear=True)
-    @patch("coverage.measure")
-    def test_measure(self, mock_measure_coverage):
-        coverage_type = common.CoverageType.UNITTEST
-        out_dir = Path("foo")
-        log_level = common.LogLevel.DEBUG
-        print_text_report = True
-
-        coverage.measure(coverage_type, out_dir, log_level, print_text_report)
-
-        mock_measure_coverage.assert_called_once_with(coverage_type, out_dir,
-                                                      log_level,
-                                                      print_text_report)
-
-
-if __name__ == "__main__":
-    unittest.main()
diff --git a/util/coverage/device_profile_data.py b/util/coverage/device_profile_data.py
deleted file mode 100755
index cbb4c8709d874..0000000000000
--- a/util/coverage/device_profile_data.py
+++ /dev/null
@@ -1,90 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-"""Parse device output to extract LLVM profile data.
-
-The profile data obtained from the device is raw. Thus, it must be indexed
-before it can be used to generate coverage reports.
-
-Typical usage:
-    stty -F /dev/ttyUSB0 icanon
-    cat /dev/ttyUSB0 | ./device_profile_data.py foo.profraw
-    llvm-profdata merge -sparse foo.profraw -o foo.profdata
-    llvm-cov show OBJECT_FILE -instr-profile=foo.profdata
-"""
-import argparse
-import zlib
-import re
-import sys
-
-
-def extract_profile_data(device_output):
-    """Parse device output to extract LLVM profile data.
-
-    This function returns the LLVM profile data as a byte array after
-    verifying its length and checksum.
-
-    Args:
-        device_output: Device output.
-    Returns:
-        LLVM profile data.
-    Raises:
-        ValueError: If LLVM profile data cannot be detected in the device
-            output or its length or checksum is incorrect.
-    """
-    device_output = re.sub(r'^.*] (.*)$',
-                           r'\1',
-                           device_output,
-                           flags=re.MULTILINE)
-    device_output = device_output.translate(
-        device_output.maketrans('', '', '\r\n'))
-    match = re.search(
-        r"""
-            LLVM\ profile\ data\ \(length:\ (?P<len>\d+)\ bytes,\ CRC32:\ (?P<crc>0x[0-9a-f]*)\):
-            (?P<data> 0x [0-9a-f]+)
-            \x04
-        """, device_output, re.VERBOSE)
-    if not match:
-        raise ValueError(
-            'Could not detect LLVM profile data in device output.')
-    exp_length = int(match.group('len'))
-    exp_checksum = int(match.group('crc'), 0)
-    byte_array = int(match.group('data'), 0).to_bytes(len(match.group('data')) // 2 - 1,
-                                                      byteorder='little',
-                                                      signed=False)
-    # Check length
-    act_length = len(byte_array)
-    if act_length != exp_length:
-        raise ValueError(('Length check failed! ',
-                          f'Expected: {exp_length}, actual: {act_length}.'))
-    # Check checksum
-    act_checksum = zlib.crc32(byte_array)
-    if act_checksum != exp_checksum:
-        raise ValueError(
-            ('Checksum check failed! ',
-             f'Expected: {exp_checksum}, actual: {act_checksum}.'))
-    return byte_array
-
-
-def main():
-    """Parses command line arguments and extracts the profile data from device
-    output."""
-    argparser = argparse.ArgumentParser(
-        description='Extract LLVM profile data from device output.')
-    argparser.add_argument(dest='output_file',
-                           type=argparse.FileType('wb'),
-                           default=sys.stdout,
-                           help='output file for writing LLVM profile data')
-    argparser.add_argument('--input_file',
-                           type=argparse.FileType('rb'),
-                           default=sys.stdin.buffer,
-                           help='device output')
-    args = argparser.parse_args()
-
-    args.output_file.write(
-        extract_profile_data(args.input_file.read().decode('ascii', 'ignore')))
-
-
-if __name__ == '__main__':
-    main()
diff --git a/util/coverage/device_profile_data_test.py b/util/coverage/device_profile_data_test.py
deleted file mode 100644
index 3f0f168f72c34..0000000000000
--- a/util/coverage/device_profile_data_test.py
+++ /dev/null
@@ -1,196 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import unittest
-import zlib
-
-from device_profile_data import extract_profile_data
-
-
-class TestExtractProfileData(unittest.TestCase):
-
-    def test_missing_profile_header(self):
-        # Missing header.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, ".*detect LLVM profile data.*"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_incomplete_data(self):
-        # 79 bytes of profile data with a bad checksum.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 1184 bytes, CRC32: 0x79a3fcf1):\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, "Length.*1184.*79"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_extra_data(self):
-        # 79 bytes of profile data with a bad checksum.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 10 bytes, CRC32: 0x79a3fcf1):\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, "Length.*10.*79"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_bad_data(self):
-        # LSB is incremented.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 1184 bytes, CRC32: 0x79a3fcf1):\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-I00006 coverage_llvm.c:55] 21b5c39055cf3e522491837772d58214efb175afb67fa75921d375aff63d3170acbb0b258e4fbf9d\r
-I00007 coverage_llvm.c:55] 71a8309b0df2e74ce77a7c5a7cc3c14c36b35552a3d8180c0c9ddd0e6ed93e91253b8051342b20b4\r
-I00008 coverage_llvm.c:55] 5b00bc66f5fdf731fc858fa3be43ba74ac22d76cffd1068e5b686758a673f44f49901f04c5a8405e\r
-I00009 coverage_llvm.c:55] f4113c55d8e64903086e9341fd35c05aeed3facf17810084057d386e0595d8319a245b08d1b7a5e7\r
-I00010 coverage_llvm.c:55] f51b87840c3083725d906dda7801f6058cc6a9e2031feb0e20d852cd71f0bdbf1fdd52a7b75c7407\r
-I00011 coverage_llvm.c:55] 973eb601ae27538bb483be5da633bbcd90e7ee0e40ca07cf7f486e28ca999a1a6df9275286d4ae3d\r
-I00012 coverage_llvm.c:55] e15775281fed2ad11181648aad8734261abeadd492d1c8bcf5fd8a6514ffa66b380edac12d3bfe12\r
-I00013 coverage_llvm.c:55] 1f196fb35e482501b905675ac17ede534dd32bdc220c24a5869b1af052b58e754971425f082834b9\r
-I00014 coverage_llvm.c:55] 0baeb2a6272ff99760be528401bbde859d0de23c74061a1c72503d707b49cd818733e31243a44fdd\r
-I00015 coverage_llvm.c:55] 1534b704e0a6ab8dd182da6817938e70e9ded660ded169c3025a2e95a73d34e6e07c39766ae7a71b\r
-I00016 coverage_llvm.c:55] a4299ae6493291d78f6e493019a0edb36675080b9de3f3d60a36a3d48aeef7b4060da47929b3a32a\r
-I00017 coverage_llvm.c:55] 1cd4c68fa17e9845f097e4918c0cce83af01f2e7e4de8c8ba916804f0a24bcf74f4d82f6482eea28\r
-I00018 coverage_llvm.c:55] cfafd10860608b53370162999f95b2e487287f2c10208472cb527dda7802cc08e600000000000000\r
-I00019 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00020 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00021 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000010000000000000000100020\r
-I00022 coverage_llvm.c:55] b80000000000000000e5c91135ef4ad0040000000000000000000000010000000000000000100020\r
-I00023 coverage_llvm.c:55] b000000000000000001e6f988c0f30fc690000000000000000000000010000000000000000100020\r
-I00024 coverage_llvm.c:55] a80000000000000018033aa10a754487ea0000000000000000000000010000000000000000100020\r
-I00025 coverage_llvm.c:55] a000000000000000182866785ba88630d10000000000000000000000020000000000000000100020\r
-I00026 coverage_llvm.c:55] 900000000000002458432fb3b3752212ac0000000000000000000000010000000000000000100020\r
-I00027 coverage_llvm.c:55] 88000000000000001855b0dadd552fc7f40000000000000000000000010000000000000000100020\r
-I00028 coverage_llvm.c:55] 800000000000000018f68439af15ff54f00000000000000000000000030000000000000000100020\r
-I00029 coverage_llvm.c:55] 680000000002442691b76b703b9eedfc350000000000000000000000010000000000000000100020\r
-I00030 coverage_llvm.c:55] 600000000000000000e244489b389e5e0b0000000000000000000000010000000000000000100020\r
-I00031 coverage_llvm.c:55] 5800000000000000189e484bc850eb41db00000000000000010000000020004c1400000000100020\r
-I00032 coverage_llvm.c:55] 58000000000000024a0000000000000000000000000000000d000000000000000000000000000000\r
-I00033 coverage_llvm.c:55] 0a00000000000000000000000000000007ff6c70726f665282\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, "Checksum.*"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_missing_eot(self):
-        # Missing EOT character, wrong length, bad checksum.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 1184 bytes, CRC32: 0x79a3fcf1):\r
-I00031 coverage_llvm.c:55] 5800000000000000189e484bc850eb41db00000000000000010000000020004c1400000000100020\r
-I00032 coverage_llvm.c:55] 58000000000000024a0000000000000000000000000000000d000000000000000000000000000000\r
-\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, ".*detect LLVM profile data.*"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_bad_checksum(self):
-        # Checksum is incremented.
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 1184 bytes, CRC32: 0x79a3fcf2):\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-I00006 coverage_llvm.c:55] 21b5c39055cf3e522491837772d58214efb175afb67fa75921d375aff63d3170acbb0b258e4fbf9d\r
-I00007 coverage_llvm.c:55] 71a8309b0df2e74ce77a7c5a7cc3c14c36b35552a3d8180c0c9ddd0e6ed93e91253b8051342b20b4\r
-I00008 coverage_llvm.c:55] 5b00bc66f5fdf731fc858fa3be43ba74ac22d76cffd1068e5b686758a673f44f49901f04c5a8405e\r
-I00009 coverage_llvm.c:55] f4113c55d8e64903086e9341fd35c05aeed3facf17810084057d386e0595d8319a245b08d1b7a5e7\r
-I00010 coverage_llvm.c:55] f51b87840c3083725d906dda7801f6058cc6a9e2031feb0e20d852cd71f0bdbf1fdd52a7b75c7407\r
-I00011 coverage_llvm.c:55] 973eb601ae27538bb483be5da633bbcd90e7ee0e40ca07cf7f486e28ca999a1a6df9275286d4ae3d\r
-I00012 coverage_llvm.c:55] e15775281fed2ad11181648aad8734261abeadd492d1c8bcf5fd8a6514ffa66b380edac12d3bfe12\r
-I00013 coverage_llvm.c:55] 1f196fb35e482501b905675ac17ede534dd32bdc220c24a5869b1af052b58e754971425f082834b9\r
-I00014 coverage_llvm.c:55] 0baeb2a6272ff99760be528401bbde859d0de23c74061a1c72503d707b49cd818733e31243a44fdd\r
-I00015 coverage_llvm.c:55] 1534b704e0a6ab8dd182da6817938e70e9ded660ded169c3025a2e95a73d34e6e07c39766ae7a71b\r
-I00016 coverage_llvm.c:55] a4299ae6493291d78f6e493019a0edb36675080b9de3f3d60a36a3d48aeef7b4060da47929b3a32a\r
-I00017 coverage_llvm.c:55] 1cd4c68fa17e9845f097e4918c0cce83af01f2e7e4de8c8ba916804f0a24bcf74f4d82f6482eea28\r
-I00018 coverage_llvm.c:55] cfafd10860608b53370162999f95b2e487287f2c10208472cb527dda7802cc08e600000000000000\r
-I00019 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00020 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00021 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000010000000000000000100020\r
-I00022 coverage_llvm.c:55] b80000000000000000e5c91135ef4ad0040000000000000000000000010000000000000000100020\r
-I00023 coverage_llvm.c:55] b000000000000000001e6f988c0f30fc690000000000000000000000010000000000000000100020\r
-I00024 coverage_llvm.c:55] a80000000000000018033aa10a754487ea0000000000000000000000010000000000000000100020\r
-I00025 coverage_llvm.c:55] a000000000000000182866785ba88630d10000000000000000000000020000000000000000100020\r
-I00026 coverage_llvm.c:55] 900000000000002458432fb3b3752212ac0000000000000000000000010000000000000000100020\r
-I00027 coverage_llvm.c:55] 88000000000000001855b0dadd552fc7f40000000000000000000000010000000000000000100020\r
-I00028 coverage_llvm.c:55] 800000000000000018f68439af15ff54f00000000000000000000000030000000000000000100020\r
-I00029 coverage_llvm.c:55] 680000000002442691b76b703b9eedfc350000000000000000000000010000000000000000100020\r
-I00030 coverage_llvm.c:55] 600000000000000000e244489b389e5e0b0000000000000000000000010000000000000000100020\r
-I00031 coverage_llvm.c:55] 5800000000000000189e484bc850eb41db00000000000000010000000020004c1400000000100020\r
-I00032 coverage_llvm.c:55] 58000000000000024a0000000000000000000000000000000d000000000000000000000000000000\r
-I00033 coverage_llvm.c:55] 0a00000000000000000000000000000007ff6c70726f665281\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        with self.assertRaisesRegex(ValueError, "Checksum.*"):
-            extract_profile_data(DEVICE_OUTPUT)
-
-    def test_good_data(self):
-        DEVICE_OUTPUT = """
-I00001 coverage_test.c:37] Collecting coverage data.\r
-|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\r|\r/\r-\r\\rI00002 ottf_main.c:100] Finished sw/device/tests/coverage_test.c\r
-I00003 coverage_llvm.c:40] LLVM profile data (length: 1184 bytes, CRC32: 0x79a3fcf1):\r
-I00004 coverage_llvm.c:49] 0x00000000000021f394013fcb9ab28abed597d935c6d97871b5c22d4be3bf454ff545a1a3a088fb\r
-I00005 coverage_llvm.c:55] 3952aa7a33c228d552a9b24f3bec051b44b406c4090b85b38cf6982e5287fb61c7a56d0c0e7b34c5\r
-I00006 coverage_llvm.c:55] 21b5c39055cf3e522491837772d58214efb175afb67fa75921d375aff63d3170acbb0b258e4fbf9d\r
-I00007 coverage_llvm.c:55] 71a8309b0df2e74ce77a7c5a7cc3c14c36b35552a3d8180c0c9ddd0e6ed93e91253b8051342b20b4\r
-I00008 coverage_llvm.c:55] 5b00bc66f5fdf731fc858fa3be43ba74ac22d76cffd1068e5b686758a673f44f49901f04c5a8405e\r
-I00009 coverage_llvm.c:55] f4113c55d8e64903086e9341fd35c05aeed3facf17810084057d386e0595d8319a245b08d1b7a5e7\r
-I00010 coverage_llvm.c:55] f51b87840c3083725d906dda7801f6058cc6a9e2031feb0e20d852cd71f0bdbf1fdd52a7b75c7407\r
-I00011 coverage_llvm.c:55] 973eb601ae27538bb483be5da633bbcd90e7ee0e40ca07cf7f486e28ca999a1a6df9275286d4ae3d\r
-I00012 coverage_llvm.c:55] e15775281fed2ad11181648aad8734261abeadd492d1c8bcf5fd8a6514ffa66b380edac12d3bfe12\r
-I00013 coverage_llvm.c:55] 1f196fb35e482501b905675ac17ede534dd32bdc220c24a5869b1af052b58e754971425f082834b9\r
-I00014 coverage_llvm.c:55] 0baeb2a6272ff99760be528401bbde859d0de23c74061a1c72503d707b49cd818733e31243a44fdd\r
-I00015 coverage_llvm.c:55] 1534b704e0a6ab8dd182da6817938e70e9ded660ded169c3025a2e95a73d34e6e07c39766ae7a71b\r
-I00016 coverage_llvm.c:55] a4299ae6493291d78f6e493019a0edb36675080b9de3f3d60a36a3d48aeef7b4060da47929b3a32a\r
-I00017 coverage_llvm.c:55] 1cd4c68fa17e9845f097e4918c0cce83af01f2e7e4de8c8ba916804f0a24bcf74f4d82f6482eea28\r
-I00018 coverage_llvm.c:55] cfafd10860608b53370162999f95b2e487287f2c10208472cb527dda7802cc08e600000000000000\r
-I00019 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00020 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000000000000000000000000000\r
-I00021 coverage_llvm.c:55] 00000000000000000000000000000000000000000000000000000000010000000000000000100020\r
-I00022 coverage_llvm.c:55] b80000000000000000e5c91135ef4ad0040000000000000000000000010000000000000000100020\r
-I00023 coverage_llvm.c:55] b000000000000000001e6f988c0f30fc690000000000000000000000010000000000000000100020\r
-I00024 coverage_llvm.c:55] a80000000000000018033aa10a754487ea0000000000000000000000010000000000000000100020\r
-I00025 coverage_llvm.c:55] a000000000000000182866785ba88630d10000000000000000000000020000000000000000100020\r
-I00026 coverage_llvm.c:55] 900000000000002458432fb3b3752212ac0000000000000000000000010000000000000000100020\r
-I00027 coverage_llvm.c:55] 88000000000000001855b0dadd552fc7f40000000000000000000000010000000000000000100020\r
-I00028 coverage_llvm.c:55] 800000000000000018f68439af15ff54f00000000000000000000000030000000000000000100020\r
-I00029 coverage_llvm.c:55] 680000000002442691b76b703b9eedfc350000000000000000000000010000000000000000100020\r
-I00030 coverage_llvm.c:55] 600000000000000000e244489b389e5e0b0000000000000000000000010000000000000000100020\r
-I00031 coverage_llvm.c:55] 5800000000000000189e484bc850eb41db00000000000000010000000020004c1400000000100020\r
-I00032 coverage_llvm.c:55] 58000000000000024a0000000000000000000000000000000d000000000000000000000000000000\r
-I00033 coverage_llvm.c:55] 0a00000000000000000000000000000007ff6c70726f665281\r
-\x04\r
-I00034 status.c:28] PASS!\r
-"""  # noqa: E501
-        raw_profile_data = extract_profile_data(DEVICE_OUTPUT)
-        self.assertEqual(len(raw_profile_data), 1184)
-        self.assertEqual(zlib.crc32(raw_profile_data), 0x79a3fcf1)
-
-
-if __name__ == '__main__':
-    unittest.main()
diff --git a/util/coverage/functest_coverage.py b/util/coverage/functest_coverage.py
deleted file mode 100644
index 86d6985fa4db6..0000000000000
--- a/util/coverage/functest_coverage.py
+++ /dev/null
@@ -1,129 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import logging
-from pathlib import Path, PurePath
-from pprint import pformat
-from typing import List
-
-from device_profile_data import extract_profile_data
-from common import (
-    BAZEL,
-    LLD_TARGET,
-    BazelTestType,
-    CoverageParams,
-    run,
-)
-
-# Commands that this script uses
-LLVM_PROFDATA = "llvm-profdata"
-
-# Bazel target for locally spliced test ROM bitstream
-BITSTREAM_TARGET = "//hw/bitstream:gcp_spliced_test_rom"
-
-
-def handle_libs(device_libs_all: List[str]) -> List[str]:
-    """Filter device libraries that are not compatible with the target.
-
-    Args:
-        device_libs_all: A list of device libraries.
-
-    Returns:
-        `device_libs_all` with incompatible libraries filtered out.
-    """
-    # Remove on_host libs
-    device_libs_incompat = [lib for lib in device_libs_all if "on_host" in lib]
-    logging.info(f"incompatible libraries: {pformat(device_libs_incompat)}")
-    # TODO: may want to add the coverage runtime to avoid undefined symbol warnings
-    return sorted(list(set(device_libs_all) - set(device_libs_incompat)))
-
-
-def handle_objs(merged_library: Path, obj_files: List[str]) -> None:
-    """Create a library from the given object files.
-
-    Args:
-        merged_library: Path where to save the merged library.
-        obj_files: A list of object files.
-    """
-    # Remove `pic.o` files.
-    # Note: Bazel started generating these since
-    # 4ff2301bf37230f75ac6fb2e288f111489e383e4.
-    obj_files = [o for o in obj_files if not o.endswith(".pic.o")]
-
-    # Note: We allow unresolved symbols and multiple definitions because this library is
-    # used only for generating a coverage report and we link only and all instrumented
-    # object files.
-    # TODO(#16761): Try to remove these flags.
-    fake_entry_point = "0x0"
-    run(LLD_TARGET, "--unresolved-symbols=ignore-all", "-e", fake_entry_point,
-        "--defsym", "__llvm_profile_register_names_function=0", "--defsym",
-        "__llvm_profile_register_function=0", "--defsym",
-        "__llvm_profile_runtime=0", "-o", str(merged_library), *obj_files)
-
-
-def handle_test_targets(test_targets: List[str]) -> List[str]:
-    """Choose cw310_test_rom tests from the given list of tests.
-
-    This function also
-    - Programs the FPGA with the non-instrumented test ROM since the instrumented one
-      overflows the ROM memory, and
-    - Filters wycheproof tests since they take a long time to run.
-
-    Args:
-        test_targets: A list of test targets.
-
-    Returns:
-        cw310_test_rom tests without wycheproof tests.
-    """
-    # Instrumented ROM overflows the space allocated for ROM. Program the fpga with the
-    # non-instrumented test ROM and skip bitstream loading during tests.
-    run(BAZEL, "build", BITSTREAM_TARGET)
-    [workspace] = run(BAZEL, "info", "workspace")
-    [bitstream] = run(BAZEL, "cquery", "--output=starlark", "--starlark:expr",
-                      "target.files.to_list()[0].path", BITSTREAM_TARGET)
-    bitstream_path = PurePath(workspace) / PurePath(bitstream)
-    run(BAZEL, "run", "//sw/host/opentitantool", "--", "fpga",
-        "load-bitstream", str(bitstream_path))
-    return [
-        t for t in test_targets
-        if "cw310_test_rom" in t and "wycheproof" not in t
-    ]
-
-
-def handle_test_log_dirs(test_log_dirs: List[Path]) -> List[Path]:
-    """Get coverage profiles.
-
-    This function processes the logs in the given list of test log directories to
-    produce raw profiles and returns their paths. These profiles can then be indexed and
-    merged to produce a single profile file.
-
-    Args:
-        test_log_dirs: A list of test log directories.
-
-    Returns:
-        Paths of individual raw coverage profiles.
-
-    """
-    raw_profiles = []
-    for d in test_log_dirs:
-        with (Path(d) / "test.log").open("rb") as test_log, (
-                Path(d) / "prof.raw").open("wb") as raw_profile:
-            raw_profile.write(
-                extract_profile_data(test_log.read().decode("ascii",
-                                                            "ignore")))
-            raw_profiles += [Path(raw_profile.name)]
-    logging.info(f"raw profiles: {pformat(raw_profiles)}")
-    return raw_profiles
-
-
-PARAMS = CoverageParams(
-    bazel_test_type=BazelTestType.SH_TEST,
-    config="ot_coverage_on_target",
-    libs_fn=handle_libs,
-    objs_fn=handle_objs,
-    test_targets_fn=handle_test_targets,
-    test_log_dirs_fn=handle_test_log_dirs,
-    report_title="OpenTitan Functional Test Coverage",
-)
diff --git a/util/coverage/functest_coverage_test.py b/util/coverage/functest_coverage_test.py
deleted file mode 100644
index 050ea0d70aa1d..0000000000000
--- a/util/coverage/functest_coverage_test.py
+++ /dev/null
@@ -1,162 +0,0 @@
-#!/usr/bin/env python3
-
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import unittest
-from unittest.mock import (
-    MagicMock,
-    patch,
-)
-from pathlib import Path
-from io import BytesIO
-
-import functest_coverage
-
-
-class AnyStringWith(str):
-
-    def __eq__(self, other):
-        return self in other
-
-
-class TestFunc(unittest.TestCase):
-
-    def test_handle_libs(self):
-        device_libs_all = [
-            "//foo/a", "//foo/b_on_host_do_not", "//foo/c_on_host", "//foo/d"
-        ]
-        device_libs = ["//foo/a", "//foo/d"]
-
-        self.assertEqual(functest_coverage.handle_libs(device_libs_all),
-                         device_libs)
-
-    @patch("functest_coverage.LLD_TARGET", "<lld_target>")
-    @patch("functest_coverage.run")
-    def test_handle_objs(self, mock_run):
-        merged_library = Path("/foo/merged.so")
-        obj_files = ["//foo/a.o", "//foo/d.o"]
-
-        functest_coverage.handle_objs(merged_library, obj_files)
-
-        mock_run.assert_called_once_with(
-            "<lld_target>", AnyStringWith("unresolved"), "-e", "0x0",
-            "--defsym", '__llvm_profile_register_names_function=0', '--defsym',
-            '__llvm_profile_register_function=0', '--defsym',
-            '__llvm_profile_runtime=0', '-o', str(merged_library), *obj_files)
-
-    @patch("functest_coverage.run")
-    def test_handle_test_targets(self, mock_run):
-        test_targets = [
-            "//foo/test", "//bar/test_cw310_test_rom",
-            "//qux/long_wycheproof_test"
-        ]
-        mock_run.side_effect = (
-            None,
-            ["workspace_path"],
-            ["bitstream_file.bit"],
-            None,
-        )
-
-        res = functest_coverage.handle_test_targets(test_targets)
-
-        self.assertEqual(res, ["//bar/test_cw310_test_rom"])
-        calls_mock_run = mock_run.call_args_list
-        self.assertEqual(len(calls_mock_run), 4)
-        self.assertEqual(calls_mock_run[0][0],
-                         (functest_coverage.BAZEL, "build",
-                          functest_coverage.BITSTREAM_TARGET))
-        self.assertEqual(calls_mock_run[1][0],
-                         (functest_coverage.BAZEL, "info", "workspace"))
-        self.assertEqual(
-            calls_mock_run[2][0],
-            (functest_coverage.BAZEL, "cquery", "--output=starlark",
-             "--starlark:expr", "target.files.to_list()[0].path",
-             functest_coverage.BITSTREAM_TARGET))
-        self.assertEqual(
-            calls_mock_run[3][0],
-            (functest_coverage.BAZEL, "run", "//sw/host/opentitantool", "--",
-             "fpga", "load-bitstream", "workspace_path/bitstream_file.bit"))
-
-    def mock_binary_file(self: unittest.TestCase,
-                         name: str,
-                         contents: bytes = None) -> MagicMock:
-        mock_file = MagicMock(autospec=BytesIO)
-        mock_file.__enter__.side_effect = [mock_file]
-        mock_file.name = name
-        if contents:
-            mock_file.read.side_effect = [contents]
-        return mock_file
-
-    @patch("pathlib.Path.open", autospec=True)
-    @patch("functest_coverage.extract_profile_data")
-    @patch("pathlib.Path.__truediv__",
-           side_effect=Path.__truediv__,
-           autospec=True)
-    def test_handle_test_log_dirs(self, mock_path_div,
-                                  mock_extract_profile_data, mock_path_open):
-        test_log_dirs = [Path("/testlogs/foo"), Path("/testlogs/bar")]
-        test_logs = [
-            Path("/testlogs/foo/test.log"),
-            Path("/testlogs/bar/test.log")
-        ]
-        profiles = [
-            Path("/testlogs/foo/prof.raw"),
-            Path("/testlogs/bar/prof.raw")
-        ]
-
-        mock_files = [
-            self.mock_binary_file(name=test_logs[0], contents=b"<log_0>"),
-            self.mock_binary_file(name=profiles[0]),
-            self.mock_binary_file(name=test_logs[1], contents=b"<log_1>"),
-            self.mock_binary_file(name=profiles[1]),
-        ]
-        mock_path_open.side_effect = mock_files
-        mock_extract_profile_data.side_effect = (b"<raw_profile_0>",
-                                                 b"<raw_profile_1>")
-
-        self.assertEqual(functest_coverage.handle_test_log_dirs(test_log_dirs),
-                         profiles)
-
-        calls_path_div = mock_path_div.call_args_list
-        self.assertEqual(len(calls_path_div), 4)
-        self.assertEqual(calls_path_div[0][0], (test_log_dirs[0], "test.log"))
-        self.assertEqual(calls_path_div[1][0], (test_log_dirs[0], "prof.raw"))
-        self.assertEqual(calls_path_div[2][0], (test_log_dirs[1], "test.log"))
-        self.assertEqual(calls_path_div[3][0], (test_log_dirs[1], "prof.raw"))
-
-        calls_path_open = mock_path_open.call_args_list
-        self.assertEqual(len(calls_path_open), 4)
-        self.assertEqual(calls_path_open[0][0], (test_logs[0], "rb"))
-        self.assertEqual(calls_path_open[1][0], (profiles[0], "wb"))
-        self.assertEqual(calls_path_open[2][0], (test_logs[1], "rb"))
-        self.assertEqual(calls_path_open[3][0], (profiles[1], "wb"))
-
-        calls_extract_profile_data = mock_extract_profile_data.call_args_list
-        self.assertEqual(len(calls_extract_profile_data), 2)
-        self.assertEqual(calls_extract_profile_data[0][0], ("<log_0>", ))
-        self.assertEqual(calls_extract_profile_data[1][0], ("<log_1>", ))
-
-        mock_files[1].write.assert_called_once_with(b"<raw_profile_0>")
-        mock_files[3].write.assert_called_once_with(b"<raw_profile_1>")
-
-    def test_params(self):
-        self.assertEqual(functest_coverage.PARAMS.bazel_test_type,
-                         AnyStringWith("sh_test"))
-        self.assertEqual(functest_coverage.PARAMS.config,
-                         "ot_coverage_on_target")
-        self.assertEqual(functest_coverage.PARAMS.libs_fn,
-                         functest_coverage.handle_libs)
-        self.assertEqual(functest_coverage.PARAMS.objs_fn,
-                         functest_coverage.handle_objs)
-        self.assertEqual(functest_coverage.PARAMS.test_targets_fn,
-                         functest_coverage.handle_test_targets)
-        self.assertEqual(functest_coverage.PARAMS.test_log_dirs_fn,
-                         functest_coverage.handle_test_log_dirs)
-        self.assertEqual(functest_coverage.PARAMS.report_title,
-                         AnyStringWith("Functional Test"))
-
-
-if __name__ == "__main__":
-    unittest.main()
diff --git a/util/coverage/unittest_coverage.py b/util/coverage/unittest_coverage.py
deleted file mode 100644
index 2a680489fbafd..0000000000000
--- a/util/coverage/unittest_coverage.py
+++ /dev/null
@@ -1,109 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import logging
-from pathlib import (
-    Path,
-    PurePath,
-)
-from pprint import pformat
-from typing import List
-
-from common import (
-    BAZEL,
-    DEVICE_LIBS_QUERY,
-    LLD_HOST,
-    BazelTestType,
-    CoverageParams,
-    run,
-)
-
-
-def handle_libs(device_libs_all: List[str]) -> List[str]:
-    """Filter device libraries that are not compatible with the host.
-
-    Args:
-        device_libs_all: A list of device libraries.
-
-    Returns:
-        `device_libs_all` with incompatible libraries filtered out.
-    """
-    device_libs_incompat = run(
-        BAZEL,
-        "cquery",
-        DEVICE_LIBS_QUERY,
-        "--output=starlark",
-        ("--starlark:expr=target.label"
-         " if 'IncompatiblePlatformProvider' in providers(target)"
-         " else ''"),
-    )
-    logging.info(f"incompatible libraries: {pformat(device_libs_incompat)}")
-    return sorted(list(set(device_libs_all) - set(device_libs_incompat)))
-
-
-def handle_objs(merged_library: Path, obj_files: List[str]):
-    """Create a shared library from the given object files.
-
-    This function also filters the object files of mocks.
-
-    Args:
-        merged_library: Path where to save the merged library.
-        obj_files: A list of object files.
-    """
-    # Note that we exclude mock_*.o since they contain duplicate definitions that we
-    # are not interested in.
-    logging.info(f"object files with coverage data: {pformat(obj_files)}")
-    run(
-        LLD_HOST,
-        "--shared",
-        "-o",
-        str(merged_library),
-        *[o for o in obj_files if not PurePath(o).name.startswith("mock_")],
-    )
-
-
-def handle_test_targets(test_targets: List[str]) -> List[str]:
-    """Add some base library tests to the given list of tests.
-
-    Args:
-        test_targets: A list of test targets.
-
-    Returns:
-        The given list of targets along with some base library tests.
-    """
-    res = test_targets + [
-        "//sw/device/lib/base:hardened_memory_unittest",
-        "//sw/device/lib/base:math_unittest",
-        "//sw/device/lib/base:memory_unittest",
-    ]
-    logging.info(f"test targets: {pformat(res)}")
-    return res
-
-
-def handle_test_log_dirs(test_log_dirs: List[Path]) -> List[Path]:
-    """Get coverage profiles.
-
-    This function returns the paths of individual coverage profiles for the given list of
-    test log directories.
-
-    Args:
-        test_log_dirs: A list of test log directories.
-
-    Returns:
-        Paths of individual coverage profiles.
-
-    """
-    return [d / "coverage.dat" for d in test_log_dirs]
-
-
-PARAMS = CoverageParams(
-    bazel_test_type=BazelTestType.CC_TEST,
-    config="ot_coverage_off_target",
-    libs_fn=handle_libs,
-    objs_fn=handle_objs,
-    test_targets_fn=handle_test_targets,
-    test_log_dirs_fn=handle_test_log_dirs,
-    report_title="OpenTitan Unit Test Coverage",
-)
diff --git a/util/coverage/unittest_coverage_test.py b/util/coverage/unittest_coverage_test.py
deleted file mode 100644
index 2998d580734cb..0000000000000
--- a/util/coverage/unittest_coverage_test.py
+++ /dev/null
@@ -1,84 +0,0 @@
-#!/usr/bin/env python3
-
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import unittest
-from unittest.mock import patch
-from pathlib import Path
-
-import unittest_coverage
-
-
-class AnyStringWith(str):
-
-    def __eq__(self, other):
-        return self in other
-
-
-class TestUnit(unittest.TestCase):
-
-    @patch("unittest_coverage.BAZEL", "<bazel>")
-    @patch("unittest_coverage.DEVICE_LIBS_QUERY", "<device libs query>")
-    @patch("unittest_coverage.run")
-    def test_handle_libs(self, mock_run):
-        device_libs_all = ["//foo/a", "//foo/b", "//foo/c", "//foo/d"]
-        device_libs_incompat = ["//foo/b", "//foo/c"]
-        device_libs = ["//foo/a", "//foo/d"]
-        mock_run.side_effect = (device_libs_incompat, )
-
-        self.assertEqual(unittest_coverage.handle_libs(device_libs_all),
-                         device_libs)
-
-        mock_run.assert_called_once_with(
-            "<bazel>", "cquery", "<device libs query>", "--output=starlark",
-            AnyStringWith("IncompatiblePlatformProvider"))
-
-    @patch("unittest_coverage.LLD_HOST", "<lld_host>")
-    @patch("unittest_coverage.run")
-    def test_handle_objs(self, mock_run):
-        merged_library = Path("/foo/merged.so")
-        obj_files = ["//foo/a.o", "//foo/mock_a.o", "//foo/d.o"]
-
-        unittest_coverage.handle_objs(merged_library, obj_files)
-
-        mock_run.assert_called_once_with("<lld_host>", "--shared", "-o",
-                                         str(merged_library), "//foo/a.o",
-                                         "//foo/d.o")
-
-    def test_handle_test_targets(self):
-        test_targets = ["//foo", "//bar"]
-
-        res = unittest_coverage.handle_test_targets(test_targets)
-        self.assertTrue(set(res) > set(test_targets))
-        self.assertTrue(len([test for test in res if "unittest" in test]) > 0)
-
-    def test_handle_test_log_dirs(self):
-        test_log_dirs = [Path("/testlogs/foo"), Path("/testlogs/bar")]
-        profiles = [
-            Path("/testlogs/foo/coverage.dat"),
-            Path("/testlogs/bar/coverage.dat")
-        ]
-        self.assertEqual(unittest_coverage.handle_test_log_dirs(test_log_dirs),
-                         profiles)
-
-    def test_params(self):
-        self.assertEqual(unittest_coverage.PARAMS.bazel_test_type,
-                         AnyStringWith("cc_test"))
-        self.assertEqual(unittest_coverage.PARAMS.config,
-                         "ot_coverage_off_target")
-        self.assertEqual(unittest_coverage.PARAMS.libs_fn,
-                         unittest_coverage.handle_libs)
-        self.assertEqual(unittest_coverage.PARAMS.objs_fn,
-                         unittest_coverage.handle_objs)
-        self.assertEqual(unittest_coverage.PARAMS.test_targets_fn,
-                         unittest_coverage.handle_test_targets)
-        self.assertEqual(unittest_coverage.PARAMS.test_log_dirs_fn,
-                         unittest_coverage.handle_test_log_dirs)
-        self.assertEqual(unittest_coverage.PARAMS.report_title,
-                         AnyStringWith("Unit Test"))
-
-
-if __name__ == "__main__":
-    unittest.main()
diff --git a/util/cryptolib_build_info.py b/util/cryptolib_build_info.py
new file mode 100755
index 0000000000000..e22d2906f62c4
--- /dev/null
+++ b/util/cryptolib_build_info.py
@@ -0,0 +1,101 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Generates cryptolib_build_info.c for cryptolib build."""
+
+import argparse
+import logging as log
+from pathlib import Path
+
+import version_file
+
+
+def generate_build_info_c_source(scm_revision: int) -> str:
+    """Return the contents of a C source file that defines `kCryptoLibBuildInfo`.
+
+    Args:
+        scm_revision: SHA1 sum identifying the current SCM revision.
+    """
+    SHA1_BYTE_CNT = 20
+    assert 0 < scm_revision < 2**(SHA1_BYTE_CNT * 8)
+    scm_rev_byte_be = scm_revision.to_bytes(SHA1_BYTE_CNT, "big")
+    scm_revision_high = int.from_bytes(scm_rev_byte_be[0:4], "big")
+    scm_revision_low = int.from_bytes(scm_rev_byte_be[4:8], "big")
+
+    return f"""
+// Copyright lowRISC contributors (OpenTitan project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+//
+// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
+
+#include "sw/device/lib/crypto/drivers/cryptolib_build_info.h"
+
+#include "sw/device/lib/crypto/include/datatypes.h"
+
+OT_USED
+const cryptolib_build_info_t kCryptoLibBuildInfo = {{
+  .scm_revision = (cryptolib_build_info_scm_revision_t){{
+    .scm_revision_low = {scm_revision_low:#010x},
+    .scm_revision_high = {scm_revision_high:#010x},
+  }},
+  .version = (uint32_t)kCryptoLibVersion,
+  .released = (bool)kCryptoLibReleased,
+}};
+"""
+
+
+def read_version_file(version_info_path, default_version) -> int:
+    """
+    Search for the scm revision variable and interprets
+    the contents as a big-endian hex literal. Return an error
+    if the revision cannot be found.
+    """
+
+    version_info = version_file.VersionInformation(version_info_path)
+    version = version_info.cryptolib_scm_revision(default_version)
+    return int(version, base=16)
+
+
+def write_source_file(outdir: Path, contents: str) -> Path:
+    """Creates cryptolib_build_info.c in `outdir`. Returns the path to the new file."""
+
+    source_out_path = outdir / "cryptolib_build_info.c"
+
+    outdir.mkdir(parents=True, exist_ok=True)
+    with source_out_path.open(mode='w', encoding='utf-8') as fout:
+        fout.write(contents)
+
+    return source_out_path
+
+
+def main():
+    log.basicConfig(format="%(levelname)s: %(message)s")
+
+    parser = argparse.ArgumentParser(prog="cryptolib_build_info")
+    parser.add_argument('--outdir',
+                        '-o',
+                        required=True,
+                        type=Path,
+                        help='Output Directory')
+    parser.add_argument('--ot_version_file',
+                        type=Path,
+                        help='Path to a file with the OpenTitan Version')
+    parser.add_argument('--default_version',
+                        type=str,
+                        help='Version to use if the version file does not indicate a version')
+
+    args = parser.parse_args()
+
+    # Extract version stamp from file
+    version = read_version_file(args.ot_version_file, args.default_version)
+    log.info("Version: %x" % (version, ))
+
+    generated_source = generate_build_info_c_source(version)
+    out_path = write_source_file(args.outdir, generated_source)
+    log.info("Generated new source file: %s" % (out_path))
+
+
+if __name__ == "__main__":
+    main()
diff --git a/util/design/BUILD b/util/design/BUILD
index 7f4d3d59222f3..dcf649a723477 100644
--- a/util/design/BUILD
+++ b/util/design/BUILD
@@ -71,9 +71,8 @@ py_binary(
     srcs = ["gen-otp-immutable-rom-ext-json.py"],
     imports = ["."],
     deps = [
+        "//util/design/lib:immutable_section_processor",
         requirement("hjson"),
-        requirement("pycryptodome"),
-        requirement("pyelftools"),
     ],
 )
 
diff --git a/util/design/gen-otp-img.py b/util/design/gen-otp-img.py
index 1660a04478c6b..f4a83006ff594 100755
--- a/util/design/gen-otp-img.py
+++ b/util/design/gen-otp-img.py
@@ -79,6 +79,12 @@ def main():
                         '-q',
                         action='store_true',
                         help='''Don't print out progress messages.''')
+    parser.add_argument('--stamp',
+                        action='store_true',
+                        help='''
+                        Add a comment 'Generated on [Date] with [Command]' to
+                        generated output files.
+                        ''')
     parser.add_argument('--seed',
                         type=int,
                         metavar='<seed>',
@@ -249,10 +255,12 @@ def main():
                 a = a.resolve() if isinstance(a, Path) else a
                 argstr += ' \\\n//   --' + argname + ' ' + str(a) + ''
 
-    dt = datetime.datetime.now(datetime.timezone.utc)
-    dtstr = dt.strftime("%a, %d %b %Y %H:%M:%S %Z")
-    file_header = '// Generated on {} with\n// $ gen-otp-img.py {}\n//\n'.format(
-        dtstr, argstr)
+    file_header = '//\n'
+    if args.stamp:
+        dt = datetime.datetime.now(datetime.timezone.utc)
+        dtstr = dt.strftime("%a, %d %b %Y %H:%M:%S %Z")
+        file_header = '// Generated on {} with\n// $ gen-otp-img.py {}\n//\n'.format(
+            dtstr, argstr)
 
     if args.c_out:
         log.info(f'Generating C file: {args.c_out}')
diff --git a/util/design/gen-otp-immutable-rom-ext-json.py b/util/design/gen-otp-immutable-rom-ext-json.py
index a0d4bd7b1c13a..782d5ea577f27 100644
--- a/util/design/gen-otp-immutable-rom-ext-json.py
+++ b/util/design/gen-otp-immutable-rom-ext-json.py
@@ -6,53 +6,28 @@
 
 import argparse
 import json
-import logging
-import sys
 
 import hjson
-from Crypto.Hash import SHA256
-from elftools.elf import elffile
+from lib.ImmutableSectionProcessor import ImmutableSectionProcessor
+from typing import Optional
 
 _OTP_PARTITION_NAME = "CREATOR_SW_CFG"
 
-# TODO(#23425): extract this from the ELF file as well.
-_EARLGREY_EFLASH_START_ADDR = 0x20000000
-_ROM_EXT_IMMUTABLE_SECTION_NAME = ".rom_ext_immutable"
-
+_ENABLE_FIELD_NAME = "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_EN"
 _START_OFFSET_FIELD_NAME = "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_START_OFFSET"
 _SIZE_FIELD_NAME = "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_LENGTH"
 _HASH_FIELD_NAME = "CREATOR_SW_CFG_IMMUTABLE_ROM_EXT_SHA256_HASH"
 
+# This must match the definitions in hardened.h.
+_HARDENED_TRUE = 0x739
+
 
-class RomExtImmutableSectionOtpFields:
+class RomExtImmutableSectionOtpFields(ImmutableSectionProcessor):
 
     def __init__(self, rom_ext_elf, json_data):
-        self.rom_ext_elf = rom_ext_elf
-        self.json_data = json_data
-        self.immutable_section_idx = None
-        self.start_offset = None
-        self.size_in_bytes = None
-        self.hash = None
-        with open(self.rom_ext_elf, 'rb') as f:
-            elf = elffile.ELFFile(f)
-            for section_idx in range(elf.num_sections()):
-                section = elf.get_section(section_idx)
-                if section.name == _ROM_EXT_IMMUTABLE_SECTION_NAME:
-                    self.immutable_section_idx = section_idx
-                    self.start_offset = (int(section.header['sh_addr']) -
-                                         _EARLGREY_EFLASH_START_ADDR)
-                    self.size_in_bytes = int(section.header['sh_size'])
-                    assert self.size_in_bytes == len(section.data())
-                    # Prepend the start offset and length to section data
-                    data_to_hash = bytearray()
-                    data_to_hash += self.start_offset.to_bytes(
-                        4, byteorder='little')
-                    data_to_hash += self.size_in_bytes.to_bytes(
-                        4, byteorder='little')
-                    data_to_hash += section.data()
-                    self.hash = bytearray(SHA256.new(data_to_hash).digest())
-
-    def insert_key_value(self, item_name: str, value: str):
+        super().__init__(rom_ext_elf, json_data)
+
+    def insert_key_value(self, item_name: str, value: str) -> None:
         """Insert the value of the item if it does not exist.
         Args:
             item_name: The name of the item to insert.
@@ -67,7 +42,21 @@ def insert_key_value(self, item_name: str, value: str):
                         return
                 partition["items"].append({"name": item_name, "value": value})
 
-    def update_json_with_immutable_rom_ext_section_data(self):
+    def get_key_value(self, item_name: str) -> Optional[str]:
+        """Get the value of the item if it exists.
+        Args:
+            item_name: The name of the item to insert.
+        Returns:
+            The value of the item if found, otherwise None.
+        """
+        for partition in self.json_data["partitions"]:
+            if partition["name"] == _OTP_PARTITION_NAME:
+                for item in partition["items"]:
+                    if item["name"] == item_name:
+                        return str(item["value"])
+        return None
+
+    def update_json_with_immutable_rom_ext_section_data(self) -> None:
         """Update the JSON with the ROM_EXT immutable section data.
         Args:
             None
@@ -79,8 +68,23 @@ def update_json_with_immutable_rom_ext_section_data(self):
         self.insert_key_value(_SIZE_FIELD_NAME, f"{hex(self.size_in_bytes)}")
         self.insert_key_value(_HASH_FIELD_NAME, f"0x{self.hash.hex()}")
 
+    def immutable_rom_ext_enable(self) -> bool:
+        """Checks if immutable ROM extension is enabled.
 
-def main():
+        This method retrieves the value of the enable field from the OTP
+        partition and compares it with the hardened true value.
+
+        Returns:
+            True if immutable ROM extension is enabled, False otherwise.
+        """
+        immutable_rom_ext_en = self.get_key_value(_ENABLE_FIELD_NAME)
+        if immutable_rom_ext_en is None:
+            return False
+        immutable_rom_ext_en_value = int(immutable_rom_ext_en, 0)
+        return immutable_rom_ext_en_value == _HARDENED_TRUE
+
+
+def main() -> None:
     parser = argparse.ArgumentParser(
         prog="gen-otp-immutable-rom-ext-json",
         description=__doc__,
@@ -110,11 +114,9 @@ def main():
     # Extract the immutable ROM_EXT section data, compute hash, and update OTP
     # CREATOR_SW_CFG partition fields.
     imm_section_otp = RomExtImmutableSectionOtpFields(args.elf, json_in)
-    if not imm_section_otp.immutable_section_idx:
-        logging.error("Cannot find {} section in ROM_EXT ELF {}.".format(
-            _ROM_EXT_IMMUTABLE_SECTION_NAME, args.elf))
-        sys.exit(1)
-    imm_section_otp.update_json_with_immutable_rom_ext_section_data()
+
+    if imm_section_otp.immutable_rom_ext_enable():
+        imm_section_otp.update_json_with_immutable_rom_ext_section_data()
 
     # Write out the OTP fields to a JSON file.
     with open(args.output, 'w') as f:
diff --git a/util/design/gen-otp-mmap.py b/util/design/gen-otp-mmap.py
index 6a2938b4d8ad0..a7f4bac4c8c2f 100755
--- a/util/design/gen-otp-mmap.py
+++ b/util/design/gen-otp-mmap.py
@@ -12,11 +12,12 @@
 from typing import Dict
 
 import hjson
-from lib.common import wrapped_docstring
-from lib.OtpMemMap import OtpMemMap
 from mako import exceptions
 from mako.template import Template
 
+from lib.common import wrapped_docstring
+from lib.OtpMemMap import OtpMemMap
+
 # This makes topgen libraries available to template files.
 sys.path.append(Path(__file__).parent)
 
@@ -37,6 +38,7 @@
 PARTITIONS_TABLE_FILE = "hw/ip/otp_ctrl/doc/otp_ctrl_partitions.md"
 DIGESTS_TABLE_FILE = "hw/ip/otp_ctrl/doc/otp_ctrl_digests.md"
 MMAP_TABLE_FILE = "hw/ip/otp_ctrl/doc/otp_ctrl_mmap.md"
+DESC_TABLE_FILE = "hw/ip/otp_ctrl/doc/otp_ctrl_field_descriptions.md"
 
 # code templates to render
 COV_TEMPLATES = ["hw/ip/otp_ctrl/data/otp_ctrl_cov_bind.sv.tpl"]
@@ -133,6 +135,11 @@ def main():
             outfile.write(otp_mmap.create_mmap_table().encode('utf-8'))
             outfile.write('\n'.encode('utf-8'))
 
+        with open(DESC_TABLE_FILE, 'wb', buffering=2097152) as outfile:
+            outfile.write(TABLE_HEADER_COMMENT.encode('utf-8'))
+            outfile.write(otp_mmap.create_description_table().encode('utf-8'))
+            outfile.write('\n'.encode('utf-8'))
+
         # render all templates
         for template in COV_TEMPLATES:
             stem_path = Path(template).stem
diff --git a/util/design/lib/BUILD b/util/design/lib/BUILD
index 03b5db45e88ed..ece88a813e057 100644
--- a/util/design/lib/BUILD
+++ b/util/design/lib/BUILD
@@ -21,6 +21,16 @@ py_test(
     deps = [":common"],
 )
 
+py_library(
+    name = "immutable_section_processor",
+    srcs = ["ImmutableSectionProcessor.py"],
+    imports = ["../../"],
+    deps = [
+        requirement("pycryptodome"),
+        requirement("pyelftools"),
+    ],
+)
+
 py_library(
     name = "lc_st_enc",
     srcs = ["LcStEnc.py"],
diff --git a/util/design/lib/ImmutableSectionProcessor.py b/util/design/lib/ImmutableSectionProcessor.py
new file mode 100644
index 0000000000000..e6d2420318016
--- /dev/null
+++ b/util/design/lib/ImmutableSectionProcessor.py
@@ -0,0 +1,100 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+r"""Extract the immutable ROM_EXT section data from ELF file."""
+
+import logging
+import sys
+
+from Crypto.Hash import SHA256
+from elftools.elf import elffile
+
+_OTTF_START_OFFSET_SYMBOL_NAME = "_ottf_start_address"
+_ROM_EXT_SATRT_OFFSET_SYMBOL_NAME = "_rom_ext_start_address"
+_ROM_EXT_IMMUTABLE_SECTION_NAME = ".rom_ext_immutable"
+
+_PREFIX_FOR_HEX = "0x"
+
+
+class ImmutableSectionProcessor:
+
+    def __init__(self, rom_ext_elf, json_data):
+        self.rom_ext_elf = rom_ext_elf
+        self.json_data = json_data
+        self.immutable_section_idx = None
+        self.manifest_offset = None
+        self.start_offset = None
+        self.size_in_bytes = None
+        self.hash = None
+
+        with open(self.rom_ext_elf, 'rb') as f:
+            elf = elffile.ELFFile(f)
+            # Find the offset of the current slot we are in.
+            for symbol in elf.get_section_by_name(".symtab").iter_symbols():
+                if symbol.name in [
+                    _OTTF_START_OFFSET_SYMBOL_NAME,
+                    _ROM_EXT_SATRT_OFFSET_SYMBOL_NAME,
+                ]:
+                    if self.manifest_offset is not None:
+                        raise ValueError(
+                            f"More than one manifest start address exists. "
+                            f"Current offset: {self.manifest_offset}, "
+                            f"new offset: {symbol.entry['st_value']}"
+                        )
+                    self.manifest_offset = symbol.entry["st_value"]
+            assert self.manifest_offset, "Manifest start address not found."
+
+            # Find the immutable section and compute the OTP values.
+            for section_idx in range(elf.num_sections()):
+                section = elf.get_section(section_idx)
+                if section.name == _ROM_EXT_IMMUTABLE_SECTION_NAME:
+                    self.immutable_section_idx = section_idx
+                    self.start_offset = (int(section.header['sh_addr']) -
+                                         self.manifest_offset)
+                    self.size_in_bytes = int(section.header['sh_size'])
+                    assert self.size_in_bytes == len(section.data())
+                    # Prepend the start offset and length to section data
+                    data_to_hash = bytearray()
+                    data_to_hash += self.start_offset.to_bytes(
+                        4, byteorder='little')
+                    data_to_hash += self.size_in_bytes.to_bytes(
+                        4, byteorder='little')
+                    data_to_hash += section.data()
+                    self.hash = bytearray(SHA256.new(data_to_hash).digest())
+
+        if not self.immutable_section_idx:
+            logging.error("Cannot find {} section in ROM_EXT ELF {}.".format(
+                _ROM_EXT_IMMUTABLE_SECTION_NAME, self.rom_ext_elf))
+            sys.exit(1)
+
+    def update_creator_manuf_state_data(self, im_ext_hash) -> None:
+        """Update the creator's manufacturing state with the immutable ROM_EXT hash.
+        Args:
+            im_ext_hash: The immutable ROM_EXT hash as a hexadecimal string.
+        Returns:
+            The updated manufacturing state as a hexadecimal string.
+        Raises:
+            ValueError: If the immutable ROM_EXT hash are all zeros in the
+                        first four bytes.
+        """
+
+        # Check if the hash value starts with the hexadecimal prefix.
+        if im_ext_hash[:2] == _PREFIX_FOR_HEX:
+            # Remove the hexadecimal prefix.
+            im_ext_hash = im_ext_hash[2:]
+        # Pad with leading zeros to ensure 4 bytes long.
+        im_ext_hash = im_ext_hash.zfill(8)
+
+        # Ensure the hash is different from the `PERSO_INITIAL` defined in
+        # rules/const.bzl.
+        if im_ext_hash[:8] == "0" * 8:
+            raise ValueError("The hash value are all zeros.")
+
+        # Embed the first four bytes of `IMMUTABLE_ROM_EXT_SHA256_HASH` into
+        # `CREATOR_MANUF_STATE`
+        creator_manuf_state = (
+            _PREFIX_FOR_HEX + im_ext_hash[:8]
+        )
+
+        return creator_manuf_state
diff --git a/util/design/lib/LcStEnc.py b/util/design/lib/LcStEnc.py
index 7f9e5bb80fbf9..4e992cefc6869 100644
--- a/util/design/lib/LcStEnc.py
+++ b/util/design/lib/LcStEnc.py
@@ -8,9 +8,8 @@
 from collections import OrderedDict
 
 from Crypto.Hash import cSHAKE128
-from lib.common import (check_int, ecc_encode, expand_seed, get_hd,
-                        hd_histogram, is_valid_codeword, random_or_hexvalue,
-                        scatter_bits)
+from lib.common import (check_int, ecc_encode, get_hd, hd_histogram,
+                        is_valid_codeword, random_or_hexvalue, scatter_bits)
 from topgen import secure_prng as sp
 
 # Seed diversification constant for LcStEnc (this enables to use
@@ -288,7 +287,7 @@ def __init__(self, config):
         log.info('Seed: {0:x}'.format(config['seed']))
         log.info('')
 
-        sp.reseed(expand_seed(LC_SEED_DIVERSIFIER + int(config['seed'])))
+        sp.reseed(LC_SEED_DIVERSIFIER + int(config['seed']))
 
         log.info('Checking SECDED.')
         _validate_secded(config)
diff --git a/util/design/lib/OtpMemImg.py b/util/design/lib/OtpMemImg.py
index 2973c3efbd869..8cc987a6cf816 100644
--- a/util/design/lib/OtpMemImg.py
+++ b/util/design/lib/OtpMemImg.py
@@ -11,21 +11,21 @@
 from pathlib import Path
 from typing import List, Tuple
 
+from mako.template import Template
+from mubi.prim_mubi import mubi_value_as_int
+from topgen import secure_prng as sp
+
 from lib import common
 from lib.LcStEnc import LcStEnc
 from lib.OtpMemMap import OtpMemMap
 from lib.Present import Present
-from mako.template import Template
-from mubi.prim_mubi import mubi_value_as_int
-from topgen import secure_prng as sp
 
 # Seed diversification constant for OtpMemImg (this enables to use
 # the same seed for different classes)
 OTP_IMG_SEED_DIVERSIFIER = 1941661965323525198146
 
-_OTP_SW_SKIP_FROM_HEADER = ('VENDOR_TEST', 'LIFE_CYCLE')
-_OTP_SW_SKIP_DIGEST_FIELDS = ('HW_CFG_DIGEST', 'SECRET0_DIGEST',
-                              'SECRET1_DIGEST', 'SECRET2_DIGEST')
+_OTP_SW_SKIP_FROM_HEADER = ('VENDOR_TEST', 'HW_CFG0', 'HW_CFG1', 'SECRET0',
+                            'SECRET1', 'SECRET2', 'LIFE_CYCLE')
 _OTP_SW_WRITE_BYTE_ALIGNMENT = {
     'CREATOR_SW_CFG': 4,
     'OWNER_SW_CFG': 4,
@@ -145,7 +145,7 @@ def _to_memfile_with_ecc(data, annotation, config,
         # count ECC bits. In a comment, we also include any annotations
         # associated with the word.
         line = '@{:06x} {} // {}'.format(i_word, word_hex,
-                                         ', '.join(word_annotations))
+                                         ', '.join(sorted(word_annotations)))
         mem_lines.append(line)
 
     log.info('Done.')
@@ -224,7 +224,7 @@ def __init__(self, lc_state_config, otp_mmap_config, img_config,
         log.info('')
 
         # Re-initialize with seed to make results reproducible.
-        sp.reseed(common.expand_seed(OTP_IMG_SEED_DIVERSIFIER + int(img_config['seed'])))
+        sp.reseed(OTP_IMG_SEED_DIVERSIFIER + int(img_config['seed']))
 
         if 'partitions' not in img_config:
             raise RuntimeError('Missing partitions key in configuration.')
@@ -542,8 +542,7 @@ def generate_c_file(self, fileheader: str, templatefile: Path) -> str:
                 continue
             items = []
             for item in part["items"]:
-                if 'value' not in item.keys(
-                ) or item['name'] in _OTP_SW_SKIP_DIGEST_FIELDS:
+                if 'value' not in item.keys():
                     continue
 
                 alignment = _OTP_SW_WRITE_BYTE_ALIGNMENT[part['name']]
@@ -554,9 +553,16 @@ def generate_c_file(self, fileheader: str, templatefile: Path) -> str:
                 assert (item['size'] %
                         alignment) == 0, "invalid field alignment"
 
+                # TODO: this is a bug in how reggen generates parameter defines
+                item_offset_name = item["name"] + "_OFFSET"
+                if item_offset_name == "ROT_CREATOR_AUTH_CODESIGN_BLOCK_SHA2_256_HASH_OFFSET":
+                    item_offset_name = "ROTCREATORAUTHCODESIGNBLOCKSHA2_256HASHOFFSET"
+
                 items.append({
                     'name':
                     item['name'],
+                    'offset_name':
+                    item_offset_name,
                     'values':
                     _int_to_hex_array(item['value'], item['size'], alignment),
                     'ismubi':
@@ -564,10 +570,11 @@ def generate_c_file(self, fileheader: str, templatefile: Path) -> str:
                     'num_items':
                     item['size'] / alignment,
                 })
-            data[part['name']] = {
-                'alignment': alignment,
-                'items': items,
-            }
+            if len(items):
+                data[part['name']] = {
+                    'alignment': alignment,
+                    'items': items,
+                }
 
         with open(templatefile, 'r') as tplfile:
             tpl = Template(tplfile.read())
diff --git a/util/design/lib/OtpMemMap.py b/util/design/lib/OtpMemMap.py
index 0f9d8976fb8ca..0627a50abb364 100644
--- a/util/design/lib/OtpMemMap.py
+++ b/util/design/lib/OtpMemMap.py
@@ -7,12 +7,13 @@
 """
 import logging as log
 from math import ceil, log2
+from typing import Dict, List
 
-from lib.common import check_bool, check_int, expand_seed, random_or_hexvalue
 from mubi.prim_mubi import is_width_valid, mubi_value_as_int
 from tabulate import tabulate
 from topgen import secure_prng as sp
-from typing import List, Dict
+
+from lib.common import check_bool, check_int, random_or_hexvalue
 
 DIGEST_SUFFIX = "_DIGEST"
 DIGEST_SIZE = 8
@@ -405,7 +406,7 @@ def __init__(self, config):
         config["seed"] = check_int(config["seed"])
 
         # Initialize RNG.
-        sp.reseed(expand_seed(OTP_SEED_DIVERSIFIER + int(config['seed'])))
+        sp.reseed(OTP_SEED_DIVERSIFIER + int(config['seed']))
         log.info('Seed: {0:x}'.format(config['seed']))
         log.info('')
 
@@ -498,6 +499,40 @@ def create_mmap_table(self) -> str:
                         tablefmt="pipe",
                         colalign=colalign)
 
+    def create_description_table(self) -> str:
+        header = ["Partition", "Item", "Size [B]", "Description"]
+        table = [header]
+        # Everything column center aligned, except the descriptions.
+        colalign = ["center"] * len(header)
+        colalign[-1] = "left"
+
+        for k, part in enumerate(self.config["partitions"]):
+            for j, item in enumerate(part["items"]):
+                if part["secret"] or part["name"] in {
+                        "VENDOR_TEST", "LIFE_CYCLE"
+                }:
+                    continue
+
+                name = None
+                if check_bool(item["isdigest"]):
+                    continue
+                else:
+                    name = item["name"]
+
+                if j == 0:
+                    row = [part["name"]]
+                else:
+                    row = [""]
+                desc = " ".join(item.get("desc", "").split("\n"))
+                row.extend([name, str(item["size"]), desc])
+
+                table.append(row)
+
+        return tabulate(table,
+                        headers="firstrow",
+                        tablefmt="pipe",
+                        colalign=colalign)
+
     def create_digests_table(self) -> str:
         header = ["Digest Name", " Affected Partition", "Calculated by HW"]
         table = [header]
diff --git a/util/design/lib/common.py b/util/design/lib/common.py
index 820ce0f6b1abe..cff546dc31034 100644
--- a/util/design/lib/common.py
+++ b/util/design/lib/common.py
@@ -7,7 +7,7 @@
 import re
 import sys
 import textwrap
-from math import ceil, log, log2
+from math import ceil, log2
 from pathlib import Path
 
 sys.path.append(os.path.join(os.path.dirname(__file__), '../../'))
@@ -56,7 +56,7 @@ def check_bool(x):
     '''
     if isinstance(x, bool):
         return x
-    if not x.lower() in ["true", "false"]:
+    if x.lower() not in ["true", "false"]:
         raise RuntimeError("{} is not a boolean value.".format(x))
     else:
         return (x.lower() == "true")
@@ -116,19 +116,6 @@ def blockify(s, size, limit):
     return (",\n  ".join(s_list))
 
 
-def expand_seed(seed):
-    '''Checks if the input seed is shorter than 256 bits and expands it if
-    it's not.
-    '''
-    new_seed = seed
-    seed_bytes = ceil(log(seed + 1, 256))
-    while new_seed < (1 << 256):
-        new_seed <<= seed_bytes * 8
-        new_seed += seed
-    new_seed %= (1 << 256)
-    return new_seed
-
-
 def get_random_perm_hex_literal(numel):
     '''Compute a random permutation of 'numel' elements and
     return as packed hex literal.'''
diff --git a/util/device_sw_utils/extract_sw_logs.py b/util/device_sw_utils/extract_sw_logs.py
index 37ec715fca3f9..7d75d91ca5c60 100755
--- a/util/device_sw_utils/extract_sw_logs.py
+++ b/util/device_sw_utils/extract_sw_logs.py
@@ -65,13 +65,20 @@ def cleanup_format(_format):
     so they're converted to pointers instead.
     - Change %![N]?s        --> %[N]?s[%d].
     - Change %![N]?[xXyY]   --> %[N]?h.
-    - Change %![N]?b        --> %[N]?d.'''
+    - Change %![N]?b        --> %[N]?d.
+
+    Status values are printed as hexadecimal values which can be manually decoded
+    by users as necessary, to prevent errors occuring in tests due to lacking
+    support for this formatting specifier. JSON support for status printing is
+    likewise just replaced by displaying the hex.
+    - Change %!?[N]?r        --> %8h'''
     _format = re.sub(r"%(-?\d*)[iu]", r"%\1d", _format)
     _format = re.sub(r"%(-?\d*)[xp]", r"%\1h", _format)
     _format = re.sub(r"%(-?\d*)X", r"%\1H", _format)
     _format = re.sub(r"%!(-?\d*)s", r"%\1s[%d]", _format)
     _format = re.sub(r"%!(-?\d*)[xXyY]", r"%\1h[%d]", _format)
     _format = re.sub(r"%!(-?\d*)b", r"%\1d[%d]", _format)
+    _format = re.sub(r"%!?(-?\d*)r", r"%8h", _format)
     _format = re.sub(r"%([bcodhHs])", r"%0\1", _format)
     return cleanup_newlines(_format)
 
@@ -188,6 +195,8 @@ def extract_sw_logs(elf_file, logs_fields_section):
             # Ignore the debug sections.
             if section.name.startswith(".debug"):
                 continue
+            if section.name.startswith("__llvm"):
+                continue
 
             base_addr = int(section.header['sh_addr'])
             size = int(section.header['sh_size'])
@@ -206,7 +215,6 @@ def extract_sw_logs(elf_file, logs_fields_section):
         # Parse the logs fields section to extract the logs.
         section = elf.get_section_by_name(name=logs_fields_section)
         if section:
-            logs_base_addr = int(section.header['sh_addr'])
             logs_size = int(section.header['sh_size'])
             logs_data = section.data()
         else:
@@ -214,15 +222,18 @@ def extract_sw_logs(elf_file, logs_fields_section):
                 logs_fields_section, elf_file))
             sys.exit(1)
 
+        header_size = 4
+        logs_offset, = struct.unpack('I', logs_data[0:header_size])
+
         # Dump the logs with fields.
         result = ""
-        num_logs = logs_size // LOGS_FIELDS_SIZE
+        num_logs = (logs_size - header_size) // LOGS_FIELDS_SIZE
         for i in range(num_logs):
-            start = i * LOGS_FIELDS_SIZE
+            start = header_size + i * LOGS_FIELDS_SIZE
             end = start + LOGS_FIELDS_SIZE
             severity, file_addr, line, nargs, format_addr = struct.unpack(
                 'IIIII', logs_data[start:end])
-            result += "addr: {}\n".format(hex(logs_base_addr + start)[2:])
+            result += "addr: {}\n".format(hex(logs_offset + start)[2:])
             result += "severity: {}\n".format(severity)
             result += "file: {}\n".format(
                 prune_filename(get_str_at_addr(file_addr, addr_strings)))
diff --git a/util/dvsim/utils.py b/util/dvsim/utils.py
index 75680b314d388..6c75ac9150ee6 100644
--- a/util/dvsim/utils.py
+++ b/util/dvsim/utils.py
@@ -631,7 +631,7 @@ def check_bool(x):
     """
     if isinstance(x, bool):
         return x
-    if not x.lower() in ["true", "false"]:
+    if x.lower() not in ["true", "false"]:
         raise RuntimeError("{} is not a boolean value.".format(x))
     else:
         return (x.lower() == "true")
diff --git a/util/dvsim/verixcdc-report-parser.py b/util/dvsim/verixcdc-report-parser.py
deleted file mode 100755
index c3a18fc66dd6d..0000000000000
--- a/util/dvsim/verixcdc-report-parser.py
+++ /dev/null
@@ -1,240 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-r"""Parses cdc report and dump filtered messages in hjson format.
-"""
-import argparse
-import logging as log
-import re
-import sys
-
-from pathlib import Path
-from LintParser import LintParser
-
-
-def extract_rule_patterns(file_path: Path):
-    '''
-    This parses the CDC summary table to get the message totals,
-    rule names and corresponding severities.
-    '''
-
-    rule_patterns = []
-    full_file = ''
-    try:
-        with Path(file_path).open() as f:
-            full_file = f.read()
-    except IOError:
-        # We will attempt read this file again in a second pass to parse out
-        # the details, this error will get caught and reported.
-        pass
-
-    category = ''
-    severity = ''
-    known_rule_names = {}
-    # extract the summary table
-    m = re.findall(
-        r'^Summary of Policy: NEW((?:.|\n|\r\n)*)Rule Details of Policy: NEW',
-        full_file, flags=re.MULTILINE)
-    if m:
-        # step through the table and identify rule names and their
-        # category and severity
-        for line in m[0].split('\n'):
-            if re.match(r'^ GROUP\s+SDC_ENV_LINT', line):
-                category = 'sdc'
-            elif re.match(r'^ GROUP\s+VCDC_SETUP_CHECKS', line):
-                category = 'setup'
-            elif re.match(r'^ GROUP\s+VCDC_ANALYSIS_CHECKS', line):
-                category = 'cdc'
-            elif re.match(r'^ GROUP\s+ERROR', line):
-                severity = 'error'
-            elif re.match(r'^ GROUP\s+WARNING', line):
-                severity = 'warning'
-            elif re.match(r'^ GROUP\s+INFO', line):
-                severity = 'info'
-            elif re.match(r'^ GROUP\s+REVIEW', line):
-                severity = 'review'
-            elif re.match(r'^  INSTANCE', line):
-                # we've found a new rule. convert it to a known rule pattern
-                # with the correct category and severity
-                rule = re.findall(
-                    r'^  INSTANCE\s+([a-zA-Z0-9\_]+)\s+([0-9\_]+)', line)
-                name = rule[0][0]
-                # a few rules produce messages with different severities but
-                # the same rule labels. for simplicity, we promote messages
-                # from lower severity buckets to the severity bucket where
-                # this rule name has first been encountered. since higher
-                # severity messages are listed first in this summary table, it
-                # is straightforward to check whether the rule name has
-                # already appeared in a higher severity bucket.
-                if name in known_rule_names:
-                    msg_group = known_rule_names[name]
-                    log.warning('Rule {} is reported in multiple severity '
-                                'classes. All messages of this rule are '
-                                'promoted to {}'.format(name, msg_group))
-
-                else:
-                    msg_group = category + '_' + severity
-                    known_rule_names.update({name: msg_group})
-                    rule_patterns.append((msg_group, r'^{}:.*'.format(name)))
-
-    return rule_patterns
-
-
-# Reuse the lint parser, but add more buckets.
-class CdcParser(LintParser):
-
-    def __init__(self) -> None:
-        self.buckets = {
-            'flow_info': [],
-            'flow_warning': [],
-            'flow_error': [],
-            'sdc_info': [],
-            'sdc_review': [],
-            'sdc_warning': [],
-            'sdc_error': [],
-            'setup_info': [],
-            'setup_review': [],
-            'setup_warning': [],
-            'setup_error': [],
-            'cdc_info': [],
-            'cdc_review': [],
-            'cdc_warning': [],
-            'cdc_error': [],
-            # this bucket is temporary and will be removed at the end of the
-            # parsing pass.
-            'fusesoc-error': []
-        }
-        self.severities = {
-            'flow_info': 'info',
-            'flow_warning': 'warning',
-            'flow_error': 'error',
-            'sdc_info': 'info',
-            'sdc_review': 'warning',
-            'sdc_warning': 'warning',
-            'sdc_error': 'error',
-            'setup_info': 'info',
-            'setup_review': 'warning',
-            'setup_warning': 'warning',
-            'setup_error': 'error',
-            'cdc_info': 'info',
-            'cdc_review': 'warning',
-            'cdc_warning': 'warning',
-            'cdc_error': 'error'
-        }
-
-
-# TODO(#9079): this script will be removed long term once the
-# parser has been merged with the Dvsim core code.
-def main():
-    parser = argparse.ArgumentParser(
-        description="""This script parses AscentLint log and report files from
-        a lint run, filters the messages and creates an aggregated result
-        .hjson file with lint messages and their severities.
-
-        The script returns nonzero status if any warnings or errors are
-        present.
-        """)
-    parser.add_argument('--repdir',
-                        type=lambda p: Path(p).resolve(),
-                        default="./",
-                        help="""The script searches the 'vcdc.log' and
-                        'vcdc.rpt' files in this directory.
-                        Defaults to './'""")
-
-    parser.add_argument('--outfile',
-                        type=lambda p: Path(p).resolve(),
-                        default="./results.hjson",
-                        help="""Path to the results Hjson file.
-                        Defaults to './results.hjson'""")
-
-    args = parser.parse_args()
-
-    # Define warning/error patterns for each logfile
-    parser_args = {}
-
-    # Patterns for lint.log
-    parser_args.update({
-        args.repdir.joinpath('build.log'): [
-            # If lint warnings have been found, the lint tool will exit
-            # with a nonzero status code and fusesoc will always spit out
-            # an error like
-            #
-            #    ERROR: Failed to build ip:core:name:0.1 : 'make' exited with an error code
-            #
-            # If we found any other warnings or errors, there's no point in
-            # listing this too. BUT we want to make sure we *do* see this
-            # error if there are no other errors or warnings, since that
-            # shows something has come unstuck. (Probably the lint tool
-            # spat out a warning that we don't understand)
-            ("fusesoc-error",
-             r"^ERROR: Failed to build .* : 'make' exited with an error code")
-        ]
-    })
-
-    # Patterns for vcdc.log
-    parser_args.update({
-        args.repdir.joinpath('syn-icarus/vcdc.log'): [
-            ("flow_error", r"^FlexNet Licensing error.*"),
-            ("flow_error", r"^Error: .*"),
-            ("flow_error", r"^ERROR.*"),
-            ("flow_error", r"^  ERR .*"),
-            ("flow_warning", r"^Warning: .*"),
-            # We ignore several messages here:
-            # #25010: unused signals
-            # #25011: unused signals
-            # #25012: unused port
-            # #25013: unused signals
-            # #26038: unused or RTL constant
-            # #39035: parameter becomes local
-            # #39122: non-positive repeat
-            # #39491: parameter in package
-            ("flow_warning", r"^  "
-                             "(?!WARN \[#25010\])"  # noqa: W605
-                             "(?!WARN \[#25011\])"  # noqa: W605
-                             "(?!WARN \[#25012\])"  # noqa: W605
-                             "(?!WARN \[#25013\])"  # noqa: W605
-                             "(?!WARN \[#26038\])"  # noqa: W605
-                             "(?!WARN \[#39035\])"  # noqa: W605
-                             "(?!WARN \[#39122\])"  # noqa: W605
-                             "(?!WARN \[#39491\])"  # noqa: W605
-                             "WARN .*"),
-            ("flow_info", r"^  INFO .*")
-        ]
-    })
-
-    # The CDC messages are a bit more involved to parse out, since we
-    # need to know the names and associated severities to do this.
-    # The tool prints out an overview table in the report, which we are
-    # going to parse first in order to get this information.
-    # This is then used to construct the regex patterns to look for
-    # in a second pass to get the actual CDC messages.
-    cdc_rule_patterns = extract_rule_patterns(
-        args.repdir.joinpath('REPORT/vcdc.new.rpt'))
-
-    # Patterns for vcdc.rpt
-    parser_args.update({
-        args.repdir.joinpath('REPORT/vcdc.new.rpt'): cdc_rule_patterns
-    })
-
-    # Parse logs
-    parser = CdcParser()
-    num_messages = parser.get_results(parser_args)
-
-    # Write out results file
-    parser.write_results_as_hjson(args.outfile)
-
-    # return nonzero status if any warnings or errors are present
-    # lint infos do not count as failures
-    if num_messages['error'] > 0 or num_messages['warning'] > 0:
-        log.info("Found %d lint errors and %d lint warnings",
-                 num_messages['error'],
-                 num_messages['warning'])
-        sys.exit(1)
-
-    log.info("Lint logfile parsed succesfully")
-    sys.exit(0)
-
-
-if __name__ == "__main__":
-    main()
diff --git a/util/fix_trailing_whitespace.py b/util/fix_trailing_whitespace.py
index 6c99f159182c5..f582b44ef2a8a 100755
--- a/util/fix_trailing_whitespace.py
+++ b/util/fix_trailing_whitespace.py
@@ -77,7 +77,7 @@ def main():
         path = Path(path).resolve().relative_to(REPO_TOP)
         if not path.is_file() or path.is_symlink() or is_ignored(path):
             continue
-        if 'vendor' in path.parts or path.suffix in ['.patch', '.svg', '.tpl']:
+        if 'vendor' in path.parts or path.suffix in ['.patch', '.svg', '.tpl', '.bin']:
             continue
         if args.verbose:
             print(f'Checking: "{path}"')
diff --git a/util/fpga/splice_rom.sh b/util/fpga/splice_rom.sh
index dcf4b14a11b32..166a4bf96719b 100755
--- a/util/fpga/splice_rom.sh
+++ b/util/fpga/splice_rom.sh
@@ -106,8 +106,8 @@ if [[ ! -f "${TARGET_PATH}" ]]; then
   exit 1
 fi
 
-if [[ ! -f "${FPGA_BIN_DIR}/rom.mmi" ]]; then
-  echo "Unable to find ${FPGA_BIN_DIR}/rom.mmi." >&2
+if [[ ! -f "${FPGA_BIN_DIR}/memories.mmi" ]]; then
+  echo "Unable to find ${FPGA_BIN_DIR}/memories.mmi." >&2
   exit 1
 fi
 
@@ -128,9 +128,9 @@ hw/ip/rom_ctrl/util/gen_vivado_mem_image.py \
 # the implemented design in Vivado and then inspecting the cell properties of
 # the corresponding BRAM cells. This information is very useful when debugging
 # the splicing flow.
-updatemem -force --meminfo "${FPGA_BIN_DIR}/rom.mmi" \
+updatemem -force --meminfo "${FPGA_BIN_DIR}/meomries.mmi" \
   --data "${TARGET}.updatemem.mem" \
-  --bit "${FPGA_BIN_DIR}/${FPGA_BIT_NAME}.bit"  --proc dummy \
+  --bit "${FPGA_BIN_DIR}/${FPGA_BIT_NAME}.bit"  --proc rom \
   --out "${FPGA_BIN_DIR}/${FPGA_BIT_NAME}.splice.bit" \
   --debug
 
diff --git a/util/gen_stamped_tarball.py b/util/gen_stamped_tarball.py
new file mode 100755
index 0000000000000..465885bfeed56
--- /dev/null
+++ b/util/gen_stamped_tarball.py
@@ -0,0 +1,45 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+"""
+Create release tarball with filename stamping.
+"""
+
+import argparse
+import tarfile
+import datetime
+
+from pathlib import Path
+
+
+def main(args):
+    with open(args.stamp_file) as f:
+        stamp = dict(line.split(' ', 1) for line in f.readlines())
+
+    version = args.version
+    build_date = datetime.datetime.now().strftime('%Y-%m-%d')
+    commit_hash = stamp["BUILD_SCM_REVISION_SHORT"].strip()
+    commit_status = stamp["BUILD_SCM_STATUS"].strip()
+
+    package_dir = f'{build_date}-v{version}-{commit_hash}'
+    if commit_status != 'clean':
+        package_dir += f'-{commit_status}'
+
+    with tarfile.open(args.out, 'w', dereference=True) as tar:
+        for path in args.files:
+            path = Path(path)
+            tar.add(path, arcname=f'{package_dir}/{path.name}')
+
+
+if __name__ == '__main__':
+    parser = argparse.ArgumentParser()
+    parser.add_argument('--out', required=True, help='Path of the output tarball.')
+    parser.add_argument('--stamp_file', required=True, help='Path of stamp variables.')
+    parser.add_argument('--version', required=True, help='Release version string.')
+    parser.add_argument('files', nargs='+')
+
+    args = parser.parse_args()
+
+    main(args)
diff --git a/util/get_workspace_status.sh b/util/get_workspace_status.sh
index b8144d0b28914..9b0ffe3dff528 100755
--- a/util/get_workspace_status.sh
+++ b/util/get_workspace_status.sh
@@ -13,12 +13,29 @@
 # If this script exits with a non-zero exit code, it's considered as a failure
 # and the output will be discarded.
 
+# Some of the variables are also exported as "stable variables" to ensure the
+# values are always up-to-date when building with --stamp, including:
+#
+#   * git commit hash - only changes when switching commit.
+#   * git working tree status (i.e. clean / modified).
+#
+# More info about the difference between stable and volatile variables is
+# available in https://bazel.build/docs/user-manual#workspace-status-command.
+
 git_rev=$(git rev-parse HEAD)
 if [[ $? != 0 ]];
 then
   exit 1
 fi
 echo "BUILD_SCM_REVISION ${git_rev}"
+echo "STABLE_BUILD_SCM_REVISION ${git_rev}"
+
+git_rev_short=$(git rev-parse --short=8 HEAD)
+if [[ $? != 0 ]];
+then
+  exit 1
+fi
+echo "BUILD_SCM_REVISION_SHORT ${git_rev_short}"
 
 git_version=$(git describe --always --tags)
 if [[ $? != 0 ]];
@@ -35,3 +52,11 @@ else
   tree_status="modified"
 fi
 echo "BUILD_SCM_STATUS ${tree_status}"
+echo "STABLE_BUILD_SCM_STATUS ${tree_status}"
+
+git_cl_rev=$(git log --pretty=tformat:"%H" -n 1 sw/device/lib/crypto/)
+if [[ $? != 0 ]];
+then
+  exit 1
+fi
+echo "BUILD_CRYPTOLIB_SCM_REVISION ${git_cl_rev}"
diff --git a/util/lintpy.py b/util/lintpy.py
index ec4e81630cd65..8d8539f077eeb 100755
--- a/util/lintpy.py
+++ b/util/lintpy.py
@@ -9,7 +9,8 @@
 import subprocess
 import sys
 
-import pkg_resources
+from typing import List
+import importlib.metadata
 
 # A map from tool name to the tuple (check, fix). These are two commands which
 # should be run to check for and fix errors, respectively. If the tool doesn't
@@ -22,7 +23,7 @@
 
 
 # include here because in hook case don't want to import reggen
-def show_and_exit(clitool, packages):
+def show_and_exit(clitool: str, packages: List[str]) -> None:
     util_path = os.path.dirname(os.path.realpath(clitool))
     os.chdir(util_path)
     ver = subprocess.check_output(
@@ -32,7 +33,7 @@ def show_and_exit(clitool, packages):
         ver = 'not found (not in Git repository?)'
     sys.stderr.write(clitool + " Git version " + ver + '\n')
     for p in packages:
-        sys.stderr.write(p + ' ' + pkg_resources.require(p)[0].version + '\n')
+        sys.stderr.write(p + ' ' + importlib.metadata.version(p) + '\n')
     sys.exit(0)
 
 
diff --git a/util/otbn_build.py b/util/otbn_build.py
index d66f373ee6f1f..fcfe29848faa8 100755
--- a/util/otbn_build.py
+++ b/util/otbn_build.py
@@ -83,7 +83,7 @@ def run_tool(tool, out_file: Path, args) -> None:
                                           dir=out_dir,
                                           delete=False)
     try:
-        if type(tool) == str:
+        if isinstance(tool, str):
             run_cmd([tool, '-o', tmpfile.name] + args,
                     cmd_to_str([tool, '-o', out_file] + args))
         else:
@@ -310,6 +310,7 @@ def main() -> int:
             '-O', 'elf32-littleriscv',
             '--set-section-flags=*=alloc,load,readonly',
             '--remove-section=.scratchpad', '--remove-section=.bss',
+            '--remove-section=.debug*',
             '--prefix-sections=.rodata.otbn', '--prefix-symbols', host_side_pfx
         ]
         for name, addr in get_otbn_syms(out_elf):
@@ -334,7 +335,7 @@ def main() -> int:
             emb_file.write(b'\1\0')
 
         if archive:
-            out_embedded_a = out_dir / (app_name + '.rv32embed.a')
+            out_embedded_a = out_dir / ('lib' + app_name + '.rv32embed.a')
             call_rv32_ar(['rcs', out_embedded_a, out_embedded_obj])
 
     except subprocess.CalledProcessError as e:
diff --git a/util/prep-bazel-airgapped-build.sh b/util/prep-bazel-airgapped-build.sh
index ed3be8e8fecd1..68300027b4275 100755
--- a/util/prep-bazel-airgapped-build.sh
+++ b/util/prep-bazel-airgapped-build.sh
@@ -13,9 +13,9 @@ set -euo pipefail
 : "${BAZEL_AIRGAPPED_DIR:=bazel-airgapped}"
 : "${BAZEL_DISTDIR:=bazel-distdir}"
 : "${BAZEL_CACHEDIR:=bazel-cache}"
+: "${BAZEL_VENDORDIR:=bazel-vendor}"
 : "${BAZEL_BITSTREAMS_CACHE:=bitstreams-cache}"
 : "${BAZEL_BITSTREAMS_CACHEDIR:=${BAZEL_BITSTREAMS_CACHE}/cache}"
-: "${BAZEL_PYTHON_WHEEL_REPO:=ot_python_wheels}"
 : "${BAZEL_BITSTREAMS_REPO:=bitstreams}"
 
 LINE_SEP="====================================================================="
@@ -115,16 +115,16 @@ if [[ ${AIRGAPPED_DIR_CONTENTS} == "ALL" || \
     https://github.com/bazelbuild/bazel/releases/download/${BAZEL_VERSION}/bazel-${BAZEL_VERSION}-linux-x86_64 \
     --output bazel
   chmod +x bazel
-  git clone -b "${BAZEL_VERSION}" --depth 1 https://github.com/bazelbuild/bazel bazel-repo
-  cd bazel-repo
-  echo "Cloned bazel repo @ \"${BAZEL_VERSION}\" (commit $(git rev-parse HEAD))"
-  ../bazel build @additional_distfiles//:archives.tar
-  tar xvf bazel-bin/external/additional_distfiles/archives.tar \
-    -C "../${BAZEL_DISTDIR}" \
-    --strip-components=3
-  cd ..
-  rm -rf bazel-repo
-  echo "Done."
+
+  # Make Bazel fetch its own dependencies to the repository cache:
+  # https://bazel.build/run/build#repository_cache_with_bazel_7_or_later
+  mkdir -p "${BAZEL_AIRGAPPED_DIR}/empty_workspace"
+  pushd "${BAZEL_AIRGAPPED_DIR}/empty_workspace"
+    touch MODULE.bazel
+    cp "${REPO_TOP}/.bazelversion" .
+    bazel fetch --repository_cache="${BAZEL_AIRGAPPED_DIR}/${BAZEL_CACHEDIR}"
+  popd
+  rm -rf "${BAZEL_AIRGAPPED_DIR}/empty_workspace"
 fi
 
 ################################################################################
@@ -138,30 +138,7 @@ if [[ ${AIRGAPPED_DIR_CONTENTS} == "ALL" || \
   mkdir -p ${BAZEL_AIRGAPPED_DIR}/${BAZEL_CACHEDIR}
   # Make bazel forget everything it knows, then download everything.
   ${BAZELISK} clean --expunge
-  ${BAZELISK} fetch \
-    --repository_cache=${BAZEL_AIRGAPPED_DIR}/${BAZEL_CACHEDIR} \
-    //... \
-    @remote_java_tools//... \
-    @remote_java_tools_linux//... \
-    @bindgen_clang_linux//... \
-    @rules_rust_bindgen__bindgen-0.65.1//... \
-    @go_sdk//... \
-    @lowrisc_rv32imcb_files//... \
-    @local_config_cc_toolchains//... \
-    @local_config_platform//... \
-    @local_config_sh//... \
-    @python3_toolchains//... \
-    @remotejdk11_linux//... \
-    @riscv-compliance//... \
-    @rules_foreign_cc//toolchains/... \
-    @ninja_1.10.2_linux//... \
-    @cmake-3.22.2-linux-x86_64//... \
-    @rustfmt_nightly-2023-10-05__x86_64-unknown-linux-gnu_tools//... \
-    @rust_analyzer_1.71.1_tools//... \
-    @rust_linux_x86_64__x86_64-unknown-linux-gnu__nightly_tools//... \
-    @rust_linux_x86_64__riscv32imc-unknown-none-elf__nightly_tools//...
-  cp -R "$(${BAZELISK} info output_base)"/external/${BAZEL_PYTHON_WHEEL_REPO} \
-    ${BAZEL_AIRGAPPED_DIR}/
+  ${BAZELISK} vendor --vendor_dir=${BAZEL_AIRGAPPED_DIR}/${BAZEL_VENDORDIR} //...
   # We don't need all bitstreams in the cache, we just need the latest one so
   # that the cache is "initialized" and "offline" mode will work correctly.
   mkdir -p ${BAZEL_AIRGAPPED_DIR}/${BAZEL_BITSTREAMS_CACHEDIR}
@@ -170,7 +147,7 @@ if [[ ${AIRGAPPED_DIR_CONTENTS} == "ALL" || \
   readonly LATEST_BISTREAM_HASH_FILE="${SYSTEM_BITSTREAM_CACHE}/latest.txt"
   # The revision named in latest.txt is not necessarily on disk. Induce the
   # cache backend to fetch the latest bitstreams.
-  BITSTREAM=latest ${BAZELISK} fetch @bitstreams//...
+  BITSTREAM="latest" ${BAZELISK} fetch @bitstreams//...
   cp "${LATEST_BISTREAM_HASH_FILE}" \
     "${BAZEL_AIRGAPPED_DIR}/${BAZEL_BITSTREAMS_CACHE}/"
   LATEST_BISTREAM_HASH=$(cat "${LATEST_BISTREAM_HASH_FILE}")
@@ -186,5 +163,5 @@ if [[ ${AIRGAPPED_DIR_CONTENTS} == "ALL" ]]; then
   echo $LINE_SEP
   echo "To perform an airgapped build, ship the contents of ${BAZEL_AIRGAPPED_DIR} to your airgapped environment and then:"
   echo ""
-  echo "bazel build --distdir=${BAZEL_AIRGAPPED_DIR}/${BAZEL_DISTDIR} --repository_cache=${BAZEL_AIRGAPPED_DIR}/${BAZEL_CACHEDIR} <label>"
+  echo "bazel build --distdir=${BAZEL_AIRGAPPED_DIR}/${BAZEL_DISTDIR} --vendor_dir=${BAZEL_AIRGAPPED_DIR}/${BAZEL_VENDORDIR} <label>"
 fi
diff --git a/util/py/scripts/bitstream_cache_create.py b/util/py/scripts/bitstream_cache_create.py
index c4a81831594d1..b845b39902c24 100755
--- a/util/py/scripts/bitstream_cache_create.py
+++ b/util/py/scripts/bitstream_cache_create.py
@@ -45,10 +45,9 @@ def collect_file_map(fragment: Dict, fragment_dir: Path):
         bitstream = os.path.join(fragment_dir, metadata['bitstream']['file'])
         bitstream_renamed = os.path.join(design, os.path.basename(bitstream))
         file_map[bitstream] = bitstream_renamed
-        for mmi in metadata['memory_map_info'].values():
-            mmi_file = os.path.join(fragment_dir, mmi['file'])
-            mmi_renamed = os.path.join(design, os.path.basename(mmi_file))
-            file_map[mmi_file] = mmi_renamed
+        mmi_file = os.path.join(fragment_dir, metadata['memory_map_info']['file'])
+        mmi_renamed = os.path.join(design, os.path.basename(mmi_file))
+        file_map[mmi_file] = mmi_renamed
     return file_map
 
 
@@ -94,7 +93,7 @@ def main(argv: list[str]):
     args = parser.parse_args(args=argv[1:])
     stamp = get_scm_revision(args.stamp_file)
     manifest = {
-        'schema_version': 2,
+        'schema_version': 3,
         'designs': {},
     }
     file_map = {}
diff --git a/util/py/scripts/bitstreams_fragment_from_manifest.py b/util/py/scripts/bitstreams_fragment_from_manifest.py
index 2fc28eacb6c74..b9e2e8a28c508 100755
--- a/util/py/scripts/bitstreams_fragment_from_manifest.py
+++ b/util/py/scripts/bitstreams_fragment_from_manifest.py
@@ -51,13 +51,12 @@ def main(argv):
     if (args.create_symlinks):
         os.symlink(bitstream, os.path.join(args.out, bitstream_renamed))
 
-    # Replace the MMI paths.
-    for mmi in metadata['memory_map_info'].values():
-        mmi_file = os.path.join(manifest_dir, mmi['file'])
-        mmi_renamed = os.path.join(args.design, os.path.basename(mmi_file))
-        mmi['file'] = mmi_renamed
-        if (args.create_symlinks):
-            os.symlink(mmi_file, os.path.join(args.out, mmi_renamed))
+    # Replace the MMI path.
+    mmi_file = os.path.join(manifest_dir, metadata['memory_map_info']['file'])
+    mmi_renamed = os.path.join(args.design, os.path.basename(mmi_file))
+    metadata['memory_map_info']['file'] = mmi_renamed
+    if (args.create_symlinks):
+        os.symlink(mmi_file, os.path.join(args.out, mmi_renamed))
 
     # Dump the manifest to the specified location.
     manifest_path = os.path.join(args.out, 'manifest.json')
diff --git a/util/py/scripts/build_sw_collateral_for_sim.py b/util/py/scripts/build_sw_collateral_for_sim.py
new file mode 100755
index 0000000000000..6514001fcd998
--- /dev/null
+++ b/util/py/scripts/build_sw_collateral_for_sim.py
@@ -0,0 +1,563 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+"""Script that invokes Bazel to build and deploy software collateral for a simulation.
+
+MOTIVE
+------
+Bazel is used to build device software for OpenTitan.
+Many different software binaries may be run on or loaded into an OpenTitan
+system in simulation, which Bazel Targets are used to define and build.
+
+Bazel rules can output multiple files, and the software collateral that
+is actually needed by the simulator may be different depending on configuration,
+such as if the binary is scrambled/unscrambled, .vmem or .bin format, etc.
+Our rules are designed to build many possible pieces of collateral at once, all
+with the same common root filename, but with different suffixes and file extensions
+that differentiate their formats and uses.
+To 'connect' a particular piece of software collateral with the correct
+mechanism to load it into the sim, we append some extra metadata to the Bazel
+Label. We refer to this extra data as 'flags'. The first flag is always the
+integer 'index', which identifies which device memory system the image should be
+loaded into (e.g. ROM, OTP, Flash, etc). The flag "signed" is used to set the SW
+image extension correctly. The flag "test_in_rom" is used to indicate a test runs
+directly out of ROM instead of flash. There are more possible flags documented below.
+
+A string for each sw image (root filename + index + flags) is also passed through
+to the tesbench, which re-parses it (in chip_env_cfg.sv) to extract the index and
+flags which determines which piece of collateral should be loaded (by filename)
+to which simulated memory model.
+
+ACTIONS
+-------
+- Loop through the list of 'sw_images' provided (label + flags)
+- Build the Bazel Target for each label
+- Use Bazel 'cquery' to locate the output files for the target
+- Copy the output files to the simulation working directory
+
+DETAILS
+-------
+The arg `sw_images` is a space-separated list of images required for a test.
+Each item in the list may have additional metadata / flags appended using
+the delimiter ':'.
+
+Expected format:
+
+  <package>:<target>:<index>:<flag1>:<flag2>:...
+  ↑                 ↑
+  └──────label──────┘
+
+e.g.
+
+  //sw/device/silicon_creator/manuf/base/binaries:ft_personalize_sival:1:silicon_creator:signed
+  ↑                                                                   ↑ ↑               ↑     ↑
+  └──────────────────────────────label────────────────────────────────┴─┴─────flag1─────┴flag2┘
+                                                                     index
+
+If one delimiter is detected, then the full string is considered to be the
+<label> (i.e. package+target).
+If two delimiters are detected, then it must be <label> followed by <index>.
+All trailing <flags> after the <index> are optional.
+Flags have no specific schema, and ordering of flags (after the index) is not significant.
+A list 'KNOWN_FLAGS' is maintained in this file to ensure each flag is documented.
+
+After the Bazel Target is built, we use `bazel cquery` to locate the built
+software artifacts so they can be copied to the test bench run directory.
+We only copy device SW images, and do not copy host-side artifacts (like
+opentitantool) that are also dependencies of the Bazel test target.
+"""
+
+import argparse
+from pathlib import Path
+import subprocess
+import os
+import sys
+import shutil
+from dataclasses import dataclass, field
+from enum import Enum
+import textwrap
+
+import logging
+logger = logging.getLogger(__name__)
+
+BAZEL_COMMON_CQUERY_FLAGS = ["--ui_event_filters=-info",
+                             "--noshow_progress"]
+
+# Query files (passed via --starlark:file)
+BAZEL_STARLARK_FILE_DATA_RUNFILES_FILES_QUERY = \
+    (Path(__file__).parent / 'queries' / 'DATA_RUNFILES_FILES_QUERY.cquery').absolute()
+BAZEL_STARLARK_FILE_FILES_QUERY = \
+    (Path(__file__).parent / 'queries' / 'FILES_QUERY.cquery').absolute()
+
+# The following dict maps rule kinds to the starlark expression required
+# to print the files we need to deploy from them.
+BAZEL_STARLARK_QUERY_RULE_KIND = {
+    "opentitan_test": BAZEL_STARLARK_FILE_DATA_RUNFILES_FILES_QUERY,
+    "opentitan_binary": BAZEL_STARLARK_FILE_FILES_QUERY,
+    "alias": BAZEL_STARLARK_FILE_FILES_QUERY,
+}
+
+ENV = os.environ.copy()
+
+# Keep all flags documented.
+KNOWN_FLAGS = [
+    # Rules generated by the 'opentitan_test' macro
+    "new_rules",
+    # Tests that run in ROM instead of Flash
+    "test_in_rom",
+    # For pre-compiled binaries (i.e. outside of the normal flow)
+    "prebuilt",
+    # Manually added when instantiating rules to use a flash image built for
+    # the `silicon_creator` device. This is used for GLS tests that integrate
+    # the ROM macro, which is built for the `silicon_creator` device, not the
+    # `sim_dv` device.
+    "silicon_creator",
+    # Used to mark tests generated by the `opentitan_flash_binary` or `opentitan_binary`
+    # Bazel macros directly, instead of the `opentitan_test` macro.
+    "ot_flash_binary",
+    # If the image builds a signed binary, then this flag should be added to
+    # correctly locate the output binary by name.
+    "signed",
+    # Also used to mark images that build binaries signed with fake keys, to
+    # then also correctly locate the output binary by name.
+    "fake_ecdsa_dev_key_0",
+    "fake_ecdsa_prod_key_0",
+    "fake_ecdsa_test_key_0",
+    "fake_rsa_dev_key_0",
+    "fake_rsa_prod_key_0",
+    "fake_rsa_test_key_0",
+    # Don't filter out runfiles for other sw_build_devices if this flag is present
+    "dont_filter"
+]
+
+
+class sw_type_e(Enum):
+    SwTypeRom = 0        # Ibex SW - first stage boot ROM.
+    SwTypeTestSlotA = 1  # Ibex SW - test SW in (flash) slot A.
+    SwTypeTestSlotB = 2  # Ibex SW - test SW in (flash) slot B.
+    SwTypeOtbn = 3       # Otbn SW
+    SwTypeOtp = 4        # Customized OTP image
+    SwTypeDebug = 5      # Debug SW - injected into SRAM.
+
+
+class BazelRunner:
+    """A collection of functions useful for running Bazel operations."""
+
+    def __init__(self):
+        self.cmd = ""
+        self.airgapped_opts = []
+        self.build_opts = []
+        self.cquery_opts_common = BAZEL_COMMON_CQUERY_FLAGS
+
+    def __str__(self):
+        s = textwrap.dedent(f"""
+        BazelRunner:
+          cmd={self.cmd}
+          airgapped_opts={self.airgapped_opts}
+          build_opts={self.build_opts}
+          cquery_common_opts={self.cquery_opts_common}
+        """)
+        return s
+
+    def build(self, labels: list[str], opts: list[str] = []) -> None:
+        build_cmd = (
+            self.cmd,
+            "build",
+            *self.airgapped_opts,
+            *self.build_opts,
+            *labels,
+            *opts,
+        )
+        logger.info(f'build_cmd = {" ".join(build_cmd)}')
+        self._run_cmd(build_cmd)
+
+    def query(self, label: str, opts: list[str]) -> list[str]:
+        query_cmd = (
+            self.cmd,
+            "query",
+            *self.airgapped_opts,
+            label,
+            *opts,
+        )
+        logger.info(f'query_cmd = {" ".join(query_cmd)}')
+        return self._run_cmd(query_cmd)
+
+    def cquery(self, label: str, opts: list[str]) -> list[str]:
+        cquery_cmd = (
+            self.cmd,
+            "cquery",
+            *self.airgapped_opts,
+            label,
+            *self.cquery_opts_common,
+            *opts,
+        )
+        logger.info(f'cquery_cmd = {" ".join(cquery_cmd)}')
+        return self._run_cmd(cquery_cmd)
+
+    def _run_cmd(self, cmd: list[str]) -> list[str]:
+        """Run a single subprocess command.
+
+        Returns:
+            Each (non-empty) line of the stdout as a list of strings.
+        """
+
+        cmd = [x for x in cmd if x]  # Remove empty strings
+        logger.debug(f'_run_cmd -> cmd:\n{cmd}')
+
+        res = subprocess.run(cmd, capture_output=True, encoding='utf-8', text=True)
+
+        if res.returncode != 0:
+            print(res.stdout, flush=True)
+            print(res.stderr, flush=True)
+            sys.exit(f"_run_cmd -> had a non-zero return code of {res.returncode}.")
+
+        logger.debug(f"_run_cmd -> stdout:\n{res.stdout}")
+        logger.debug(f"_run_cmd -> stderr:\n{res.stderr}")
+
+        stdout_lines = res.stdout.split('\n')
+        return [s for s in stdout_lines if s]
+
+
+@dataclass
+class ImageString:
+    """Parse the custom format used to add metadata to bazel targets for loading in simulation."""
+
+    raw: str
+    label: str = field(init = False)
+    package: str = field(init = False)
+    target: str = field(init = False)
+    index: int = field(init = False)
+    flags: set[str] = field(init = False)
+
+    def __post_init__(self):
+        parts = self.raw.split(':')
+        assert len(parts) >= 3, "Image string needs at least label+index at minimum."
+
+        self.package = parts[0]
+        self.target = parts[1]
+        self.index = int(parts[2])
+        self.flags = parts[3:] if len(parts) > 3 else ()
+        self.label = f"{self.package}:{self.target}"
+
+        assert all((f in KNOWN_FLAGS) for f in self.flags), "Unknown FLAG used in sw_image"
+        logger.debug(f"flags={self}")
+
+
+@dataclass
+class ImageQuery:
+    """The metadata for each image required to locate all artifacts after building.
+
+    The ImageQuery.label (runfile query) may be different to the ImageString.label
+    (+sw_images input label) as sometimes the query label is modified to append extra metadata
+    to locate the correct rule.
+    One example of this is if the 'silicon_creator' flag is present, in which case
+    '_silicon_creator' is appended to the query label.
+    """
+    image_string: ImageString
+    label: str
+    cquery: str
+    kind: str
+
+
+def _deploy_software_collateral(args) -> None:
+    """Build, then deploy the software collateral"""
+
+    images_str = '\n'.join(args.sw_images)
+    logger.info(
+        "Building and deploying collateral for the following images:\n"
+        "[IMAGES]\n"
+        f"{images_str}\n"
+        "[RUN_DIR]\n"
+        f"{args.run_dir}\n"
+    )
+
+    bazel_runner = BazelRunner()
+
+    bazel_runner.cmd = "./bazelisk.sh"
+    bazel_runner.build_opts = \
+        args.sw_build_opts + \
+        [
+            "--define", "DISABLE_VERILATOR_BUILD=true",
+            # The simulation run-time seed is passed to seed the generation of all OTP
+            # partition item values that are set to '<random>' in the final image config.
+            f'--//hw/ip/otp_ctrl/data:img_seed={args.seed}',
+        ]
+
+    # In the Air-gapped environment, the following Environment Variable will exist.
+    if ENV.get("BAZEL_PYTHON_WHEELS_REPO"):
+        # We need to change our bazel invocation as follows when running air-gapped.
+        bazel_runner.cmd = "bazel"
+        bazel_runner.airgapped_opts = [
+            "--define", "SPECIFY_BINDGEN_LIBSTDCXX=true",
+            f'--distdir={ENV.get("BAZEL_DISTDIR")}',
+            f'--repository_cache={ENV.get("BAZEL_CACHE")}',
+        ]
+
+    # Export this environment variable to build with a non-default OTP permuation
+    if ENV.get("BAZEL_OTP_DATA_PERM_FLAG"):
+        bazel_runner.build_opts += [
+            f'--//hw/ip/otp_ctrl/data:data_perm={ENV.get("BAZEL_OTP_DATA_PERM_FLAG")}',
+        ]
+
+    # If build_seed is provided, feed this value into bazel when building the OTP pre-load images.
+    # This overrides the default seed value and is needed for reproducibility to match the
+    # synthesized hardware from the 'build' stage. (sw build happens in the 'run' stage)
+    if (args.build_seed != 'None'):
+        bazel_runner.build_opts += [
+            f"--//hw/ip/otp_ctrl/data:lc_seed={args.build_seed}",
+            f"--//hw/ip/otp_ctrl/data:otp_seed={args.build_seed}",
+        ]
+
+    # Print a summary of the accumulated bazel_runner configuration that we will use to
+    # assemble all further bazel operations.
+    logger.info(bazel_runner)
+
+    # Determine the final label and cquery expression to build and get the
+    # artifacts for each image.
+    image_query_set = {}
+    for image in args.sw_images:
+
+        image_string = ImageString(image)
+
+        if sw_type_e(image_string.index) in (sw_type_e.SwTypeRom,
+                                             sw_type_e.SwTypeTestSlotA,
+                                             sw_type_e.SwTypeTestSlotB,
+                                             sw_type_e.SwTypeOtbn):
+
+            if "silicon_creator" in image_string.flags:
+                # Add the flag `silicon_creator` when using a flash image built
+                # for the `silicon_creator` device.
+                # This is used for GLS tests that integrate the ROM macro, which
+                # is built for the `silicon_creator` device, not the `sim_dv` device.
+                #
+                # Currently, the '_silicon_creator' suffix is added manually when
+                # instantiating rules.
+                label = f"{image_string.label}_silicon_creator"
+            else:
+                # If test type is `opentitan_test` and the flash image was generated
+                # by the `opentitan_test` Bazel macro itself, or it was generated
+                # by the `opentitan_flash_binary` or `opentitan_binary` Bazel macros,
+                # then we need to append the device suffix.
+                label = f"{image_string.label}_{args.sw_build_device}"
+
+            # For this type of image, relevant files may be present in both the 'data'
+            # and 'srcs' attributes of the target. Query for both.
+            cquery = f"labels(data, {label}) union labels(srcs, {label})"
+
+        else:
+
+            # For all other values of sw_type_e, the label/query is just the label
+            # passed as input (minus all trailing flags).
+            label = image_string.label
+            cquery = image_string.label
+
+        # Query to determine what 'kind' the target is
+        kind_query = bazel_runner.cquery(label, ["--output=label_kind"])
+        kind = kind_query[0].split(' ')[0]
+
+        # Add a query object to the set for this image
+        image_query_set[image] = ImageQuery(image_string, label, cquery, kind)
+
+    logger.info('Image query parameters determined.\n')
+
+    # Build all the software artifacts
+    bazel_labels = (v.label for v in image_query_set.values())
+    logger.info('Building all labels...')
+    bazel_runner.build(bazel_labels)
+    logger.info('All labels built.\n')
+
+    # Now the build is complete, deploy the files for each target
+    for image in args.sw_images:
+        logger.info(f'Querying runfiles for image : {image}')
+
+        iq = image_query_set[image]
+
+        # First, run the query to get the maximal set of runfiles for the image
+        runfiles = _get_image_runfiles(iq, bazel_runner)
+
+        # Some rules may return runfiles for many different software devices, but
+        # we only require the files for a specific device (passed by --sw-build-device)
+        # Our bazel rules always append the device as the final element of the filename
+        # before any extensions (the final string fragment before the first period)
+        # Perform a crude string-contains check to determine if this is one of those rules,
+        # and if so, remove files unrelated to this device
+        dev = args.sw_build_device
+
+        def _f_endswith_dev(f: Path) -> bool:
+            f_stem = str(f).split('.')[0]
+            return f_stem.endswith(dev)
+        is_device_specific = any([_f_endswith_dev(Path(f)) for f in runfiles])
+        if is_device_specific and ('dont_filter' not in iq.image_string.flags):
+            logger.info(
+                f"This query returned device_specific '{dev}' files, filtering "
+                "out runfiles for other devices...")
+            runfiles = list(filter(lambda f: _f_endswith_dev(Path(f)), runfiles))
+
+        # Now copy any runfiles for this image to the test's working directory so they
+        # can be accessed easily via relative path.
+        _copy_files_to_run_dir(runfiles, args.run_dir)
+        runfiles_str = '\n'.join(runfiles)
+        logger.info(
+            "Deployed the following collateral:\n"
+            "[IMAGE]\n"
+            f"{image}\n"
+            "[FILES]\n"
+            f"{runfiles_str}\n"
+        )
+
+
+def _get_image_runfiles(iq: ImageQuery, bazel_runner: BazelRunner) -> list[str]:
+    """Run the target/kind-specific Bazel queries to get the runfiles list for this image."""
+
+    if logger.level <= logging.INFO:
+        location_query = bazel_runner.query(iq.label, ["--output=location"])
+        location = location_query[0].split(' ')[0]
+        logger.info(f"bazel target location: {location}")
+
+    # Depending on the target 'kind', we may need to query differently to get the
+    # path inside the bazel build hierarchy to the build results, and also to filter
+    # the query only for targets / files which are strictly necessary for simulation.
+    # _Note_
+    # We may also want to extract collateral to assist debug and development, such as
+    # disassembly files for given binaries.
+    runfiles: list[str] = []
+
+    logger.info(f'kind = {iq.kind}')
+    if (iq.kind in ("opentitan_test", "opentitan_binary", "alias")):
+        # For targets of this kind, we can query directly for the set of runfiles.
+        # The query may have a slightly different starlark expression to extract the
+        # files from the target depending on the kind.
+
+        runfiles = bazel_runner.cquery(
+            label=iq.label,
+            opts=[
+                "--output=starlark",
+                f"--starlark:file={BAZEL_STARLARK_QUERY_RULE_KIND[iq.kind]}",
+            ]
+        )
+
+    else:
+        # For all other kinds, we have to do two queries to reach the runfiles. The first
+        # query may return a list of labels from the rule's attributes (e.g. data, srcs),
+        # which we tidy up and filter out targets which we know will return unused dependencies.
+        deps = bazel_runner.cquery(
+            label=f'{iq.cquery}',
+            opts=[
+                "--output=starlark",
+            ]
+        )
+
+        # Bazel 6 cquery outputs repository targets in canonical format (@//blabla)
+        # whereas bazel 5 does not, so strip leading @ if present.
+        deps = [dep.lstrip('@') for dep in deps]
+        logger.info(f'deps = {deps}')
+
+        for label in deps:
+            if any([
+                    # - OTP preload images are copied
+                    label.startswith('//hw/ip/otp_ctrl/data'),
+                    # - Any deps from the following directories/packages are _not_ copied:
+                    #   - hw/
+                    #   - util/
+                    #   - sw/host/
+                    (not any(label.startswith(s) for s in ("//hw", "//util", "//sw/host"))),
+            ]):
+
+                runfiles += bazel_runner.cquery(
+                    label,
+                    [
+                        "--output=starlark",
+                        f"--starlark:file={BAZEL_STARLARK_FILE_FILES_QUERY}",
+                    ]
+                )
+
+    return runfiles
+
+
+def _copy_files_to_run_dir(files: list[str], run_dir: Path) -> None:
+    """Copy all target artifacts to the run directory.
+
+    If the artifact is a .bin, and a .elf file of the same name also exists,
+    also copy the equivalent .elf file.
+    """
+
+    for f in [Path(f) for f in files]:
+        shutil.copyfile(f, run_dir / f.name)
+        # If we are copying a .bin file, and the corresponding .elf file exists, also copy that
+        maybe_elf = f.with_suffix('.elf')
+        if f.suffix == 'bin' and maybe_elf.exists():
+            shutil.copy(maybe_elf, run_dir)
+
+
+def _main() -> None:
+
+    def _space_sep_str(value):
+        return list(filter(None, value.split(' ')))
+
+    def _int_or_str(value):
+        try:
+            return int(value)
+        except Exception:
+            return value
+
+    mod_doc = sys.modules[__name__].__doc__
+    parser = argparse.ArgumentParser(
+        # Use the module description to generate CLI --help docs
+        description=(mod_doc.split('\n')[0]),
+        epilog=(80 * '-' + f"\n\n{mod_doc}"),
+        formatter_class=argparse.RawDescriptionHelpFormatter,
+    )
+    parser.add_argument(
+        "--sw-images",
+        type=_space_sep_str,
+        default=[],
+        help="Bazel label + additional metadata to describe the needed sw collateral")
+    parser.add_argument(
+        "--sw-build-opts",
+        type=_space_sep_str,
+        default=[],
+        help="Additional opts to be passed while building software")
+    parser.add_argument(
+        "--sw-build-device",
+        type=str,
+        help="")
+    parser.add_argument(
+        "--seed",
+        type=int,
+        help="Seed")
+    parser.add_argument(
+        "--build-seed",
+        type=_int_or_str,
+        help="Build Seed")
+    parser.add_argument(
+        "--run-dir",
+        type=Path,
+        help="Run directory where the software artifacts should be deployed to")
+    args = parser.parse_args()
+
+    log_level = logging.INFO
+    log_format = '%(levelname)s: [%(filename)s:%(lineno)d] %(message)s'
+    logging.basicConfig(level=log_level, format=log_format)
+
+    # Generate string of script arguments
+    def _mk_argstr(args) -> str:
+        argstr = ''
+        for arg, argval in sorted(vars(args).items()):
+            if argval:
+                if not isinstance(argval, list):
+                    argval = [argval]
+                for a in argval:
+                    argname = '-'.join(arg.split('_'))
+                    # Get absolute paths for all files specified.
+                    a = a.resolve() if isinstance(a, Path) else a
+                    argstr += ' \\\n//   --' + argname + ' ' + str(a) + ''
+        return argstr
+    # Log the script name and invocation arguments
+    logger.info(f"\n// {sys.argv[0]} {_mk_argstr(args)}\n")
+
+    _deploy_software_collateral(args)
+
+
+if __name__ == "__main__":
+    sys.exit(_main())
diff --git a/util/py/scripts/gh_testplan.py b/util/py/scripts/gh_testplan.py
index 6ee967e73ac13..c7e9c3985876d 100755
--- a/util/py/scripts/gh_testplan.py
+++ b/util/py/scripts/gh_testplan.py
@@ -30,6 +30,10 @@
                    action=argparse.BooleanOptionalAction,
                    default=True,
                    help='Do not perform any github API actions')
+flags.add_argument('--num',
+                   default=None,
+                   type=int,
+                   help="Number of issues to create before exiting")
 flags.add_argument('testplan', type=str, help='The testplan to process')
 
 
@@ -145,7 +149,7 @@ def create_issue(self, issue):
         return self.call(cmd, self.dry_run)
 
 
-def create_issues(testplan, gh):
+def create_issues(testplan, gh, num):
     """Create issues in the testplan.
 
     Creates the issues in the testplan and updates the testplan with the
@@ -157,6 +161,7 @@ def create_issues(testplan, gh):
       gh: GithubApi; a GithubApi instance.
     """
     allowed_labels = gh.get_valid_labels()
+    n = 0
     for key in testplan.keys():
         # First get the issue creation template from the testplan
         # and check if the issue has already been created.
@@ -182,17 +187,23 @@ def create_issues(testplan, gh):
         # Save the testplan so if there is a crash later, we've
         # recorded that we created this issue.
         url = gh.create_issue(template)
-        if 'github' not in testpoint:
-            testpoint['github'] = {}
-        testpoint['github']['url'] = url
+        if url:
+            url = url.decode('utf-8').strip()
+            if 'github' not in testpoint:
+                testpoint['github'] = {}
+            testpoint['github']['url'] = url
+            print(f'{testpoint["name"]}: {url}')
         testplan.save()
+        n += 1
+        if num is not None and n >= num:
+            break
 
 
 def main(args):
     gh = GithubApi(args.gh_bin, args.repo, args.dry_run)
     testplan = Testplan(args.testplan)
     testplan.load()
-    create_issues(testplan, gh)
+    create_issues(testplan, gh, args.num)
 
 
 if __name__ == '__main__':
diff --git a/util/py/scripts/mapfile_to_json.py b/util/py/scripts/mapfile_to_json.py
index 77bcb7dbe4757..82c73bed42fdb 100755
--- a/util/py/scripts/mapfile_to_json.py
+++ b/util/py/scripts/mapfile_to_json.py
@@ -107,13 +107,20 @@
   .join("g")
     .attr("transform", d => `translate(${d.x0},${d.y0})`);
 
+function maybe_size(sz) {
+  if (sz) return "(0x" + sz.toString(16) + ")";
+  return "";
+}
+
 function symlist(d) {
-  if (d.data.symbols) {
-    return d.data.symbols.map(d => d.name + ": 0x" + d.addr.toString(16)).join("  \n");
-  } else if (d.children) {
-    return d.children.map(d => symlist(d)).join("  \n");
+  if (d.children) {
+      return d.children.map(d => symlist(d)).join("\n");
+  } else if (d.data.symbols.length) {
+    return d.data.symbols.map(
+        d => d.name + ": 0x" + d.addr.toString(16) + maybe_size(d.size)
+    ).join("\n");
   } else {
-    return "";
+    return "(noname): 0x" + d.data.addr.toString(16) + maybe_size(d.data.size);
   }
 }
 
@@ -124,7 +131,7 @@
 `${d.ancestors().reverse().map(d => d.data.name).join(".")}
 Size: ${format(d.value)}
 Symbols:
-  ${symlist(d)}`);
+${symlist(d)}`);
 
 node.append("rect")
     .attr("id", d => (d.nodeUid = DOM.uid("node")).id)
diff --git a/util/py/scripts/queries/DATA_RUNFILES_FILES_QUERY.cquery b/util/py/scripts/queries/DATA_RUNFILES_FILES_QUERY.cquery
new file mode 100644
index 0000000000000..03cecc30a3f4d
--- /dev/null
+++ b/util/py/scripts/queries/DATA_RUNFILES_FILES_QUERY.cquery
@@ -0,0 +1,2 @@
+def format(target):
+    return "\n".join([f.path for f in target.data_runfiles.files.to_list()])
diff --git a/util/py/scripts/queries/FILES_QUERY.cquery b/util/py/scripts/queries/FILES_QUERY.cquery
new file mode 100644
index 0000000000000..f433b791c0044
--- /dev/null
+++ b/util/py/scripts/queries/FILES_QUERY.cquery
@@ -0,0 +1,2 @@
+def format(target):
+    return "\n".join([f.path for f in target.files.to_list()])
diff --git a/util/reggen/BUILD b/util/reggen/BUILD
index 46e072cbd9216..bbc312a024a75 100644
--- a/util/reggen/BUILD
+++ b/util/reggen/BUILD
@@ -217,6 +217,7 @@ py_library(
         ":window",
         requirement("mako"),
         requirement("pyyaml"),
+        requirement("importlib_resources"),
     ],
 )
 
@@ -227,6 +228,7 @@ py_library(
         ":ip_block",
         requirement("mako"),
         requirement("pyyaml"),
+        requirement("importlib_resources"),
     ],
 )
 
@@ -260,6 +262,7 @@ py_library(
         ":reg_base",
         ":register",
         requirement("mako"),
+        requirement("importlib_resources"),
     ],
 )
 
@@ -298,6 +301,7 @@ py_library(
         ":ip_block",
         requirement("hjson"),
         requirement("mako"),
+        requirement("importlib_resources"),
     ],
 )
 
diff --git a/util/reggen/fpv_csr.sv.tpl b/util/reggen/fpv_csr.sv.tpl
index bceaa41733b0c..07458ee82ce2b 100644
--- a/util/reggen/fpv_csr.sv.tpl
+++ b/util/reggen/fpv_csr.sv.tpl
@@ -86,6 +86,14 @@ module ${mod_base}_csr_assert_fpv import tlul_pkg::*;
   // accesses).
   bit [${hro_idx_width-1}:0] hro_idx;
   bit [${addr_msb}:0] normalized_addr;
+  % if lblock == "clkmgr":
+    % for hro_reg in hro_regs_list:
+      % if hro_reg.name.lower() == "jitter_enable":
+  // The jitter_enable CSR needs some special handling below.
+  localparam bit [${hro_idx_width-1}:0] JitterEnableHroIdx = ${hro_map.get(hro_reg.offset)[0]};
+      % endif
+    % endfor
+  % endif
 
   `ifdef FPV_ON
     // For FPV, we restrict the pend_trans array by giving its size a smaller upper bound. This
@@ -191,7 +199,14 @@ module ${mod_base}_csr_assert_fpv import tlul_pkg::*;
       if (d2h.d_valid) begin
         if (pend_trans[d_source_idx].wr_pending == 1) begin
           if (!d2h.d_error && regwen[hro_idx]) begin
+            % if lblock == "clkmgr":
+            if (hro_idx == JitterEnableHroIdx) begin
+              // Any write to the jitter_enable CSR writes MuBi4True.
+              exp_vals[hro_idx] <= prim_mubi_pkg::MuBi4True;
+            end else if (access_policy[hro_idx] == FpvRw0c) begin
+            % else:
             if (access_policy[hro_idx] == FpvRw0c) begin
+            % endif
               // Assume FpvWr0c policy only has one field that is wr0c.
               exp_vals[hro_idx] <= exp_vals[hro_idx][0] == 0 ? 0 : pend_trans[d_source_idx].wr_data;
             end else begin
diff --git a/util/reggen/gen_dv.py b/util/reggen/gen_dv.py
index fdeb9b62032e6..86f40fdff30e4 100644
--- a/util/reggen/gen_dv.py
+++ b/util/reggen/gen_dv.py
@@ -13,7 +13,7 @@
 
 from mako import exceptions  # type: ignore
 from mako.lookup import TemplateLookup  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from reggen.ip_block import IpBlock
 from reggen.multi_register import MultiRegister
@@ -152,7 +152,7 @@ def get_block_base_name(dv_base_names_map: Dict[str, DvBaseNames], block: str) -
 def gen_dv(block: IpBlock, dv_base_names: List[str], outdir: str) -> int:
     '''Generate DV files for an IpBlock'''
 
-    lookup = TemplateLookup(directories=[resource_filename('reggen', '.')])
+    lookup = TemplateLookup(directories=[str(importlib_resources.files('reggen'))])
     uvm_reg_tpl = lookup.get_template('uvm_reg.sv.tpl')
 
     # Generate the RAL package(s). For a device interface with no name we
diff --git a/util/reggen/gen_fpv.py b/util/reggen/gen_fpv.py
index e69a4592d5a05..58e599d2593c5 100644
--- a/util/reggen/gen_fpv.py
+++ b/util/reggen/gen_fpv.py
@@ -12,7 +12,7 @@
 import yaml
 from mako import exceptions  # type: ignore
 from mako.template import Template  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from reggen.ip_block import IpBlock
 
@@ -20,7 +20,7 @@
 def gen_fpv(block: IpBlock, outdir: str) -> int:
     # Read Register templates
     fpv_csr_tpl = Template(
-        filename=resource_filename('reggen', 'fpv_csr.sv.tpl'))
+        filename=str(importlib_resources.files('reggen') / "fpv_csr.sv.tpl"))
 
     device_hier_paths = block.bus_interfaces.device_hier_paths
 
diff --git a/util/reggen/gen_rtl.py b/util/reggen/gen_rtl.py
index 5d719d2fc3f67..e5b02b86f79ac 100644
--- a/util/reggen/gen_rtl.py
+++ b/util/reggen/gen_rtl.py
@@ -9,7 +9,7 @@
 
 from mako import exceptions  # type: ignore
 from mako.template import Template  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from reggen.ip_block import IpBlock
 from reggen.lib import check_int
@@ -94,9 +94,9 @@ def get_reg_tx_type(block: IpBlock, reg: RegBase, hw2reg: bool) -> str:
 def gen_rtl(block: IpBlock, outdir: str) -> int:
     # Read Register templates
     reg_top_tpl = Template(
-        filename=resource_filename('reggen', 'reg_top.sv.tpl'))
+        filename=str(importlib_resources.files('reggen') / 'reg_top.sv.tpl'))
     reg_pkg_tpl = Template(
-        filename=resource_filename('reggen', 'reg_pkg.sv.tpl'))
+        filename=str(importlib_resources.files('reggen') / 'reg_pkg.sv.tpl'))
 
     # In case the generated package contains alias definitions, we add
     # the alias implementation identifier to the package name so that it
diff --git a/util/reggen/gen_sec_cm_testplan.py b/util/reggen/gen_sec_cm_testplan.py
index 9a68d865564ee..d44f219b8ebc6 100644
--- a/util/reggen/gen_sec_cm_testplan.py
+++ b/util/reggen/gen_sec_cm_testplan.py
@@ -9,7 +9,7 @@
 import hjson  # type: ignore
 from mako import exceptions  # type: ignore
 from mako.lookup import TemplateLookup  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from reggen.ip_block import IpBlock
 
@@ -51,7 +51,7 @@ def gen_sec_cm_testplan(block: IpBlock, outdir: str) -> int:
 
         return 0
 
-    lookup = TemplateLookup(directories=[resource_filename('reggen', '.')])
+    lookup = TemplateLookup(directories=[str(importlib_resources.files('reggen'))])
     sec_cm_testplan_tpl = lookup.get_template('sec_cm_testplan.hjson.tpl')
     with open(outfile, 'w', encoding='UTF-8') as f:
         try:
diff --git a/util/reggen/reg_top.sv.tpl b/util/reggen/reg_top.sv.tpl
index 06b281eb63acb..f1175d6083e36 100644
--- a/util/reggen/reg_top.sv.tpl
+++ b/util/reggen/reg_top.sv.tpl
@@ -824,6 +824,13 @@ ${rdata_gen(f, r.name.lower() + "_" + f.name.lower())}\
 % endif
 
   // Unused signal tieoff
+% if lblock == "clkmgr":
+
+  // Any write to the jitter_enable CSR writes MuBi4True.
+  // The actual write data is ignored.
+  logic unused_jitter_enable_wd;
+  assign unused_jitter_enable_wd = ^jitter_enable_wd;
+% endif
 % if rb.all_regs:
 
   // wdata / byte enable are not always fully used
@@ -904,13 +911,16 @@ ${bits.msb}\
       we_expr = f'{clk_base_name}{reg_name}{gated_suffix}_{we_suffix}'
 
       # when async, pick from the cdc handled data
-      wd_expr = f'{finst_name}_wd'
-      if reg.async_clk:
-        if field.bits.msb == field.bits.lsb:
-          bit_sel = f'{field.bits.msb}'
-        else:
-          bit_sel = f'{field.bits.msb}:{field.bits.lsb}'
-        wd_expr = f'{clk_base_name}{reg_name}_wdata[{bit_sel}]'
+      if lblock == "clkmgr" and reg_name == "jitter_enable":
+        wd_expr = "prim_mubi_pkg::MuBi4True"
+      else:
+        wd_expr = f'{finst_name}_wd'
+        if reg.async_clk:
+          if field.bits.msb == field.bits.lsb:
+            bit_sel = f'{field.bits.msb}'
+          else:
+            bit_sel = f'{field.bits.msb}:{field.bits.lsb}'
+          wd_expr = f'{clk_base_name}{reg_name}_wdata[{bit_sel}]'
 
     else:
       we_expr = "1'b0"
@@ -986,6 +996,32 @@ ${bits.msb}\
       % if reg.async_clk and reg.shadowed:
   logic async_${finst_name}_err_update;
   logic async_${finst_name}_err_storage;
+<%
+        excl_deglitcher = mod_name == "clkmgr_reg_top" and finst_name in [
+          "io_div2_meas_ctrl_shadowed_hi",
+          "io_div2_meas_ctrl_shadowed_lo",
+          "io_div4_meas_ctrl_shadowed_hi",
+          "io_div4_meas_ctrl_shadowed_lo",
+          "io_meas_ctrl_shadowed_hi",
+          "io_meas_ctrl_shadowed_lo",
+          "usb_meas_ctrl_shadowed_hi",
+          "usb_meas_ctrl_shadowed_lo",
+        ]
+%>\
+        % if not excl_deglitcher:
+  logic deglitched_${finst_name}_err_storage;
+
+  // flop storage error to filter combinational glitches before sending it across CDC
+  prim_flop #(
+    .Width(1),
+    .ResetValue('0)
+  ) u_${finst_name}_err_storage_deglitch (
+    .clk_i (${reg.async_clk.clock}),
+    .rst_ni(${reg.async_clk.reset}),
+    .d_i   (async_${finst_name}_err_storage),
+    .q_o   (deglitched_${finst_name}_err_storage)
+  );
+        % endif
 
   // storage error is persistent and can be sampled at any time
   prim_flop_2sync #(
@@ -994,7 +1030,11 @@ ${bits.msb}\
   ) u_${finst_name}_err_storage_sync (
     .clk_i,
     .rst_ni,
+        % if not excl_deglitcher:
+    .d_i(deglitched_${finst_name}_err_storage),
+        % else:
     .d_i(async_${finst_name}_err_storage),
+        % endif
     .q_o(${finst_name}_storage_err)
   );
 
diff --git a/util/reggen/validate.py b/util/reggen/validate.py
index dca91c9c5457a..8d10e21568850 100644
--- a/util/reggen/validate.py
+++ b/util/reggen/validate.py
@@ -51,7 +51,7 @@ def check_bool(x: Union[bool, str], err_prefix: str) -> Tuple[bool, bool]:
     if isinstance(x, bool):
         # if Bool returns as it is
         return x, False
-    if not x.lower() in ["true", "false"]:
+    if x.lower() not in ["true", "false"]:
         log.error(err_prefix + ": Bad field value " + x)
         return False, True
     else:
diff --git a/util/reggen/version.py b/util/reggen/version.py
index d738d1532d29f..bcbc9b844c3c4 100644
--- a/util/reggen/version.py
+++ b/util/reggen/version.py
@@ -8,7 +8,7 @@
 import sys
 from typing import List
 
-import pkg_resources  # part of setuptools
+from importlib.metadata import version
 
 
 def show_and_exit(clitool: str, packages: List[str]) -> None:
@@ -21,5 +21,5 @@ def show_and_exit(clitool: str, packages: List[str]) -> None:
         ver = 'not found (not in Git repository?)'
     sys.stderr.write(clitool + " Git version " + ver + '\n')
     for p in packages:
-        sys.stderr.write(p + ' ' + pkg_resources.require(p)[0].version + '\n')
+        sys.stderr.write(p + ' ' + version(p) + '\n')
     exit(0)
diff --git a/util/rom_chip_info.py b/util/rom_chip_info.py
deleted file mode 100755
index b20394fd1b4a3..0000000000000
--- a/util/rom_chip_info.py
+++ /dev/null
@@ -1,100 +0,0 @@
-#!/usr/bin/env python3
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-"""Generates chip_info.c for ROM build."""
-
-import argparse
-import logging as log
-from pathlib import Path
-
-import version_file
-
-
-def generate_chip_info_c_source(scm_revision: int) -> str:
-    """Return the contents of a C source file that defines `kChipInfo`.
-
-    Args:
-        scm_revision: SHA1 sum identifying the current SCM revision.
-    """
-    SHA1_BYTE_CNT = 20
-    assert 0 < scm_revision < 2**(SHA1_BYTE_CNT * 8)
-    scm_rev_byte_be = scm_revision.to_bytes(SHA1_BYTE_CNT, "big")
-    scm_revision_high = int.from_bytes(scm_rev_byte_be[0:4], "big")
-    scm_revision_low = int.from_bytes(scm_rev_byte_be[4:8], "big")
-
-    return f"""
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
-
-#include "sw/device/silicon_creator/lib/chip_info.h"
-
-#include "sw/device/lib/base/macros.h"
-
-OT_SECTION(".chip_info")
-const chip_info_t kChipInfo = {{
-  .scm_revision = (chip_info_scm_revision_t){{
-    .scm_revision_low = {scm_revision_low:#010x},
-    .scm_revision_high = {scm_revision_high:#010x},
-  }},
-  .version = (uint32_t)kChipInfoVersion1,
-}};
-"""
-
-
-def read_version_file(version_info_path, default_version) -> int:
-    """
-    Search for the scm revision variable and interprets
-    the contents as a big-endian hex literal. Return an error
-    if the revision cannot be found.
-    """
-
-    version_info = version_file.VersionInformation(version_info_path)
-    version = version_info.scm_revision(default_version)
-    return int(version, base=16)
-
-
-def write_source_file(outdir: Path, contents: str) -> Path:
-    """Creates chip_info.c in `outdir`. Returns the path to the new file."""
-
-    source_out_path = outdir / "chip_info.c"
-
-    outdir.mkdir(parents=True, exist_ok=True)
-    with source_out_path.open(mode='w', encoding='utf-8') as fout:
-        fout.write(contents)
-
-    return source_out_path
-
-
-def main():
-    log.basicConfig(format="%(levelname)s: %(message)s")
-
-    parser = argparse.ArgumentParser(prog="rom_chip_info")
-    parser.add_argument('--outdir',
-                        '-o',
-                        required=True,
-                        type=Path,
-                        help='Output Directory')
-    parser.add_argument('--ot_version_file',
-                        type=Path,
-                        help='Path to a file with the OpenTitan Version')
-    parser.add_argument('--default_version',
-                        type=str,
-                        help='Version to use if the version file does not indicate a version')
-
-    args = parser.parse_args()
-
-    # Extract version stamp from file
-    version = read_version_file(args.ot_version_file, args.default_version)
-    log.info("Version: %x" % (version, ))
-
-    generated_source = generate_chip_info_c_source(version)
-    out_path = write_source_file(args.outdir, generated_source)
-    log.info("Generated new source file: %s" % (out_path))
-
-
-if __name__ == "__main__":
-    main()
diff --git a/util/rom_chip_info_test.py b/util/rom_chip_info_test.py
deleted file mode 100644
index 82d90be8556e4..0000000000000
--- a/util/rom_chip_info_test.py
+++ /dev/null
@@ -1,120 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-import pathlib
-import unittest
-from unittest.mock import mock_open
-from unittest.mock import patch
-
-import rom_chip_info
-
-
-EXAMPLE_SHA1_DIGEST = 0x4bbd966dcbfc4aa39291f4de9f52bc0f66ca32a4
-
-
-class TestGenerateChipInfoCSource(unittest.TestCase):
-    def test_simple(self):
-        source = rom_chip_info.generate_chip_info_c_source(EXAMPLE_SHA1_DIGEST)
-        expected = """
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
-
-#include "sw/device/silicon_creator/lib/chip_info.h"
-
-#include "sw/device/lib/base/macros.h"
-
-OT_SECTION(".chip_info")
-const chip_info_t kChipInfo = {
-  .scm_revision = (chip_info_scm_revision_t){
-    .scm_revision_low = 0xcbfc4aa3,
-    .scm_revision_high = 0x4bbd966d,
-  },
-  .version = (uint32_t)kChipInfoVersion1,
-};
-"""
-        self.assertEqual(source, expected)
-
-    def test_sha1_digest_leading_zero_byte(self):
-        digest = EXAMPLE_SHA1_DIGEST >> 8
-        source = rom_chip_info.generate_chip_info_c_source(digest)
-        expected = """
-// Copyright lowRISC contributors (OpenTitan project).
-// Licensed under the Apache License, Version 2.0, see LICENSE for details.
-// SPDX-License-Identifier: Apache-2.0
-//
-// --------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! ---------//
-
-#include "sw/device/silicon_creator/lib/chip_info.h"
-
-#include "sw/device/lib/base/macros.h"
-
-OT_SECTION(".chip_info")
-const chip_info_t kChipInfo = {
-  .scm_revision = (chip_info_scm_revision_t){
-    .scm_revision_low = 0x6dcbfc4a,
-    .scm_revision_high = 0x004bbd96,
-  },
-  .version = (uint32_t)kChipInfoVersion1,
-};
-"""
-        self.assertEqual(source, expected)
-
-    def test_sha1_digest_too_large(self):
-        # Compute the max SHA1 digest plus one.
-        INVALID_SHA1_DIGEST_LARGE = 2**(20 * 8)
-        with self.assertRaises(AssertionError):
-            rom_chip_info.generate_chip_info_c_source(
-                INVALID_SHA1_DIGEST_LARGE)
-
-    def test_sha1_digest_too_small(self):
-        INVALID_SHA1_DIGEST_SMALL = -1
-        with self.assertRaises(AssertionError):
-            rom_chip_info.generate_chip_info_c_source(
-                INVALID_SHA1_DIGEST_SMALL)
-
-
-class TestFileOperations(unittest.TestCase):
-    @patch('version_file.open',
-           mock_open(read_data=f'BUILD_SCM_REVISION {EXAMPLE_SHA1_DIGEST:x}'))
-    def test_read_version_file(self):
-        """Reading a properly-formatted version file produces the expected int.
-        """
-        version = rom_chip_info.read_version_file(
-            pathlib.Path("fake/path/version.txt"), None)
-        self.assertEqual(version, EXAMPLE_SHA1_DIGEST)
-
-    @patch("version_file.open", mock_open(read_data=''))
-    def test_read_version_file_empty(self):
-        """Reading an empty version file raises an exception.
-        """
-        version = rom_chip_info.read_version_file(
-            pathlib.Path("fake/path/version.txt"), f'{EXAMPLE_SHA1_DIGEST:x}')
-        self.assertEqual(version, EXAMPLE_SHA1_DIGEST)
-
-    @patch("version_file.open", mock_open(read_data='BUILD_SCM_REVISION xyz'))
-    def test_read_version_file_invalid_hex(self):
-        """Reading an invalid version file raises an exception.
-        """
-        with self.assertRaisesRegex(ValueError, "invalid literal for int"):
-            rom_chip_info.read_version_file(
-                pathlib.Path("fake/path/version.txt"), None)
-
-    @patch("pathlib.Path.open", new_callable=mock_open)
-    def test_write_source_file(self, mock_path_open):
-        """Calling write_source_file() produces the expected file.
-        """
-        src_path = rom_chip_info.write_source_file(pathlib.Path("fake/out/"),
-                                                   "// This is a C program")
-        self.assertEqual(src_path, pathlib.Path("fake/out/chip_info.c"))
-        mock_path_open.assert_called_once_with(mode='w', encoding='utf-8')
-
-        handle = mock_path_open()
-        handle.write.assert_called_once_with('// This is a C program')
-
-
-if __name__ == '__main__':
-    unittest.main()
diff --git a/util/sh/scripts/BUILD b/util/sh/scripts/BUILD
index 126337e9e90d0..b153c71075805 100644
--- a/util/sh/scripts/BUILD
+++ b/util/sh/scripts/BUILD
@@ -4,4 +4,8 @@
 
 package(default_visibility = ["//visibility:public"])
 
-exports_files(["run-shellcheck.sh"])
+exports_files([
+    "run-shellcheck.sh",
+    "bin2c.sh",
+    "c.hexdump",
+])
diff --git a/util/sh/scripts/c.hexdump b/util/sh/scripts/c.hexdump
index bab63ee899cd4..3e7b383f6cdec 100644
--- a/util/sh/scripts/c.hexdump
+++ b/util/sh/scripts/c.hexdump
@@ -1,3 +1,3 @@
 16/1 "0x%02x,"
-" // %08_ax  " "%_p"
-"\n"
+" // %08_ax |" "%_p"
+"|\n"
diff --git a/util/sh/scripts/gen-python-requirements.sh b/util/sh/scripts/gen-python-requirements.sh
index 19c33bf582b58..f86e4db3d3ead 100755
--- a/util/sh/scripts/gen-python-requirements.sh
+++ b/util/sh/scripts/gen-python-requirements.sh
@@ -7,17 +7,18 @@ source util/sh/lib/banners.sh
 source util/sh/lib/strict.sh
 
 : "${REPO_TOP:=$(git rev-parse --show-toplevel)}"
-PYTHON_REQS_IN_FILE="$REPO_TOP/python-requirements.in"
+PYTHON_REQS_IN_FILE="$REPO_TOP/pyproject.toml"
 PYTHON_REQS_OUT_FILE="$REPO_TOP/python-requirements.txt"
 
 # The below shellcode autogenerates the `python-requirements.txt`, with hashes,
 # and prepends the license and auto-generated banners at the top of the file.
-pip-compile \
+uv pip compile \
   --allow-unsafe \
   --generate-hashes \
   --no-annotate \
   --no-header \
-  "$PYTHON_REQS_IN_FILE"
+  "$PYTHON_REQS_IN_FILE" \
+  -o "$PYTHON_REQS_OUT_FILE"
 echo -e "\n$(cat "$PYTHON_REQS_OUT_FILE")" > "$PYTHON_REQS_OUT_FILE"
 add_autogen_banner "$PYTHON_REQS_OUT_FILE" \
   "./util/sh/scripts/gen-python-requirements.sh"
diff --git a/util/sh/scripts/run-shellcheck.sh b/util/sh/scripts/run-shellcheck.sh
index 0d67f304121b4..adc1fbbb30c7d 100755
--- a/util/sh/scripts/run-shellcheck.sh
+++ b/util/sh/scripts/run-shellcheck.sh
@@ -6,12 +6,12 @@
 set -e
 
 # Escape the sandbox when running under `bazel test`. This script assumes that
-# when it's invoked by Bazel, the Bazel target will depend on `//:WORKSPACE`.
+# when it's invoked by Bazel, the Bazel target will depend on `//:MODULE.bazel`.
 # This assumption enables us to infer that we're running in the sandbox when we
-# see a symlink named "WORKSPACE".
-if [[ -L WORKSPACE ]]; then
-    SHELLCHECK="$(realpath external/shellcheck/shellcheck)"
-    REPO_TOP="$(dirname "$(realpath WORKSPACE)")"
+# see a symlink named "MODULE.bazel".
+if [[ -L MODULE.bazel ]]; then
+    SHELLCHECK="$(realpath "${SHELLCHECK}")"
+    REPO_TOP="$(dirname "$(realpath MODULE.bazel)")"
     cd "${REPO_TOP}"
 else
     REPO_TOP="$(git rev-parse --show-toplevel)"
@@ -19,7 +19,7 @@ else
     SHELLCHECK="./bazelisk.sh run @shellcheck//:shellcheck --"
 fi
 
-EXCLUDED_DIRS="-name third_party -o -name vendor -o -name lowrisc_misc-linters"
+EXCLUDED_DIRS="-name third_party -o -name vendor -o -name build-site -o -name lowrisc_misc-linters"
 # Get an array of all shell scripts to check using input redirection and
 # process substitution. For details on this syntax, see ShellCheck SC2046.
 # shellcheck disable=SC2046
diff --git a/util/site/fetch_block_stats.py b/util/site/fetch_block_stats.py
index 560f04ce0daa8..08154c3ef89cf 100755
--- a/util/site/fetch_block_stats.py
+++ b/util/site/fetch_block_stats.py
@@ -19,39 +19,39 @@
 REPO_TOP = Path(__file__).parents[2].resolve()
 
 block_level_urls = {
-    "adc-controller": "hw/ip/adc_ctrl/dv/2024.01.22_10.44.44/",
-    "aes": "hw/ip/aes_masked/dv/2024.01.22_10.46.01/",
-    "alert-handler": "hw/top_earlgrey/ip_autogen/alert_handler/dv/2024.01.22_11.16.07/",
-    "aon-timers": "hw/ip/aon_timer/dv/2024.01.22_10.46.17/",
-    "clkrst-managers": "hw/top_earlgrey/ip_autogen/clkmgr/dv/2024.01.22_10.47.21/",
-    "csrng": "hw/ip/csrng/dv/2024.01.22_10.48.06/",
-    "edn": "hw/ip/edn/dv/2024.01.22_10.48.55/",
-    "entropy-source": "hw/ip/entropy_src/dv/2024.01.22_10.49.35/",
-    "flash": "hw/top_earlgrey/ip_autogen/flash_ctrl/dv/2024.01.22_10.51.11/",
-    "gpio": "hw/ip/gpio/dv/2024.01.22_10.52.52/",
-    "hmac": "hw/ip/hmac/dv/2024.01.22_10.53.53/",
-    "i2c": "hw/ip/i2c/dv/2024.01.22_10.54.47/",
-    "key-manager": "hw/ip/keymgr/dv/2024.01.22_10.56.00/",
-    "kmac": "hw/ip/kmac_masked/dv/2024.01.22_10.57.17/",
-    "life-cycle": "hw/ip/lc_ctrl/dv/2024.01.22_10.59.35/",
-    "otbn": "hw/ip/otbn/dv/uvm/2024.01.22_11.00.27/",
-    "otp-fuse-controller": "hw/ip/otp_ctrl/dv/2024.01.22_11.01.45/",
-    "pattern-generators": "hw/ip/pattgen/dv/2024.01.22_11.02.37/",
-    "pwm": "hw/ip/pwm/dv/2024.01.22_11.04.36/",
-    "power-manager": "hw/top_earlgrey/ip_autogen/pwrmgr/dv/2024.01.22_11.16.53/",
-    "rom": "hw/ip/rom_ctrl/dv/2024.01.22_11.05.21/",
-    "debug-module": "hw/ip/rv_dm/dv/2024.01.22_11.06.19/",
-    "timers": "hw/ip/rv_timer/dv/2024.01.22_11.07.05/",
-    "spi-device": "hw/ip/spi_device/dv/2024.01.22_11.09.05/",
-    "spi-host-0": "hw/ip/spi_host/dv/2024.01.22_11.07.40/",
-    "spi-host-1": "hw/ip/spi_host/dv/2024.01.22_11.07.40/",
-    "main-sram": "hw/ip/sram_ctrl_main/dv/2024.01.22_11.10.19/",
-    "retention-sram": "hw/ip/sram_ctrl_ret/dv/2024.01.22_11.11.17/",
-    "sysrst-controller": "hw/ip/sysrst_ctrl/dv/2024.01.22_11.12.25/",
-    "uart": "hw/ip/uart/dv/2024.01.22_11.13.24/",
-    "usb": "hw/ip/usbdev/dv/2024.01.22_11.14.22/",
-    "high-speed-crossbar": "hw/top_earlgrey/ip/xbar_main/dv/autogen/2024.01.22_11.18.04/",
-    "peripheral-crossbar": "hw/top_earlgrey/ip/xbar_peri/dv/autogen/2024.01.22_11.19.10/",
+    "adc-controller": "hw/ip/adc_ctrl/dv/latest",
+    "aes": "hw/ip/aes_masked/dv/latest",
+    "alert-handler": "hw/top_earlgrey/ip_autogen/alert_handler/dv/latest",
+    "aon-timers": "hw/ip/aon_timer/dv/latest",
+    "clkrst-managers": "hw/top_earlgrey/ip_autogen/clkmgr/dv/latest",
+    "csrng": "hw/ip/csrng/dv/latest",
+    "edn": "hw/ip/edn/dv/latest",
+    "entropy-source": "hw/ip/entropy_src/dv/latest",
+    "flash": "hw/top_earlgrey/ip_autogen/flash_ctrl/dv/latest",
+    "gpio": "hw/ip/gpio/dv/latest",
+    "hmac": "hw/ip/hmac/dv/latest",
+    "i2c": "hw/ip/i2c/dv/latest",
+    "key-manager": "hw/ip/keymgr/dv/latest",
+    "kmac": "hw/ip/kmac_masked/dv/latest",
+    "life-cycle": "hw/ip/lc_ctrl/dv/latest",
+    "otbn": "hw/ip/otbn/dv/uvm/latest",
+    "otp-fuse-controller": "hw/ip/otp_ctrl/dv/latest",
+    "pattern-generators": "hw/ip/pattgen/dv/latest",
+    "pwm": "hw/ip/pwm/dv/latest",
+    "power-manager": "hw/top_earlgrey/ip_autogen/pwrmgr/dv/latest",
+    "rom": "hw/ip/rom_ctrl/dv/latest",
+    "debug-module": "hw/ip/rv_dm/dv/latest",
+    "timers": "hw/ip/rv_timer/dv/latest",
+    "spi-device": "hw/ip/spi_device/dv/latest",
+    "spi-host-0": "hw/ip/spi_host/dv/latest",
+    "spi-host-1": "hw/ip/spi_host/dv/latest",
+    "main-sram": "hw/ip/sram_ctrl_main/dv/latest",
+    "retention-sram": "hw/ip/sram_ctrl_ret/dv/latest",
+    "sysrst-controller": "hw/ip/sysrst_ctrl/dv/latest",
+    "uart": "hw/ip/uart/dv/latest",
+    "usb": "hw/ip/usbdev/dv/latest",
+    "high-speed-crossbar": "hw/top_earlgrey/ip/xbar_main/dv/autogen/latest",
+    "peripheral-crossbar": "hw/top_earlgrey/ip/xbar_peri/dv/autogen/latest",
     "ibex": "https://ibex.reports.lowrisc.org/opentitan/latest",
 }
 
diff --git a/util/site/site-builder/README.md b/util/site/site-builder/README.md
deleted file mode 100644
index 790ffa70fd27c..0000000000000
--- a/util/site/site-builder/README.md
+++ /dev/null
@@ -1,7 +0,0 @@
-# Site-Builder Container
-
-`util/container/Dockerfile` defines a container with all of the required dependencies to build the site + documentation.
-
-In order to speed up the deployment, an image of this container is deployed to the Google Container Registry (GCR) (`gcr.io/gold-hybrid-255313/builder`).
-This image is used to spawn a Gcloud 'Cloud Build' job whenever a PR is merged into master, which runs the steps in `cloudbuild-deploy-docs.yaml`.
-After running the site build script (`util/site/build-docs.sh`), this job copies the generated artifacts to the Gcloud bucket which serves the website.
diff --git a/util/site/site-builder/cloudbuild-deploy-docs.yaml b/util/site/site-builder/cloudbuild-deploy-docs.yaml
deleted file mode 100644
index ce9f13c821779..0000000000000
--- a/util/site/site-builder/cloudbuild-deploy-docs.yaml
+++ /dev/null
@@ -1,56 +0,0 @@
-# Copyright lowRISC contributors (OpenTitan project).
-# Licensed under the Apache License, Version 2.0, see LICENSE for details.
-# SPDX-License-Identifier: Apache-2.0
-
-steps:
-# Use the 'gold-hybrid-255313/builder' container image (util/container/Dockerfile) to perform the build
-# > We override the 'ENTRYPOINT', as the default 'start.sh' script is currently incompatible with the Gcloud environment
-# > The default working directory is '/workspace'
-  - name: 'gcr.io/gold-hybrid-255313/builder'
-    entrypoint: bash
-    args:
-      - '-c'
-      - |
-        chown -R dev:dev /workspace
-        exec gosu dev:dev /bin/bash -c "./util/site/build-docs.sh build"
-  - name: 'gcr.io/cloud-builders/gcloud'
-    env:
-    - 'PROJECT=gold-hybrid-255313'
-    script: |
-      #!/usr/bin/env bash
-      build_dir="/workspace/build-site"
-
-      # First, upload all (uncompressed) files
-      gcloud storage cp -R --gzip-in-flight=js,css,html "${build_dir}/*" gs://${PROJECT}-prod
-  - name: 'gcr.io/gold-hybrid-255313/builder'
-    entrypoint: bash
-    args:
-      - '-c'
-      - |
-        # This script compresses the searchindex files, replacing the originals in-place.
-        # (This is how 'content-encoding'-tagged files should be uploaded to gcloud buckets)
-        exec gosu dev:dev /bin/bash -c "./util/site/post-build.sh compress_br"
-  - name: 'gcr.io/cloud-builders/gcloud'
-    env:
-    - 'PROJECT=gold-hybrid-255313'
-    script: |
-      #!/usr/bin/env bash
-      build_dir="/workspace/build-site"
-
-      # Next, upload the brotli-compressed files.
-      search_indexes=$(find ${build_dir}/ -type f -name '*searchindex.json')
-      for f in $search_indexes; do
-          echo "Uploading compressed file ${f}"
-          # Get directory of file, relative to the build directory.
-          # - var=${var#*//} # removes stuff from the begining up to //
-          dir=$(dirname "${f#*"${build_dir}"/}")
-          # When serving from gcloud buckets, file should be uploaded with an identical name as the
-          # original, but compressed and with the matching 'content-encoding' and 'content-type' tags applied.
-          gcloud storage cp \
-                 --content-encoding=br \
-                 --content-type=application/json \
-                 -R \
-                 "$f" "gs://${PROJECT}-prod/${dir}/"
-      done
-options:
-  machineType: 'N1_HIGHCPU_8'
diff --git a/util/tlgen/BUILD b/util/tlgen/BUILD
index 96a7ad97c3321..1cb089e2778ae 100644
--- a/util/tlgen/BUILD
+++ b/util/tlgen/BUILD
@@ -23,6 +23,7 @@ py_library(
     deps = [
         "//util/reggen:validate",
         requirement("mako"),
+        requirement("importlib_resources"),
     ],
 )
 
diff --git a/util/tlgen/generate.py b/util/tlgen/generate.py
index 5e9e441dc2a42..b0652240c132e 100644
--- a/util/tlgen/generate.py
+++ b/util/tlgen/generate.py
@@ -9,7 +9,7 @@
 
 from mako import exceptions  # type: ignore
 from mako.template import Template  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from .xbar import Xbar
 
@@ -21,13 +21,13 @@ def generate(xbar: Xbar, library_name: str = "ip") -> List[Tuple[str, Any]]:
     pairs of files to write, each in the form (path, contents).
     """
     xbar_rtl_tpl = Template(
-        filename=resource_filename('tlgen', 'xbar.rtl.sv.tpl'))
+        filename=str(importlib_resources.files('tlgen') / 'xbar.rtl.sv.tpl'))
     xbar_pkg_tpl = Template(
-        filename=resource_filename('tlgen', 'xbar.pkg.sv.tpl'))
+        filename=str(importlib_resources.files('tlgen') / 'xbar.pkg.sv.tpl'))
     xbar_core_tpl = Template(
-        filename=resource_filename('tlgen', 'xbar.core.tpl'))
+        filename=str(importlib_resources.files('tlgen') / 'xbar.core.tpl'))
     xbar_hjson_tpl = Template(
-        filename=resource_filename('tlgen', 'xbar.hjson.tpl'))
+        filename=str(importlib_resources.files('tlgen') / 'xbar.hjson.tpl'))
     try:
         out_rtl = xbar_rtl_tpl.render(xbar=xbar)
         out_pkg = xbar_pkg_tpl.render(xbar=xbar)
diff --git a/util/tlgen/generate_tb.py b/util/tlgen/generate_tb.py
index d4dd7c084a21e..909e60f958440 100644
--- a/util/tlgen/generate_tb.py
+++ b/util/tlgen/generate_tb.py
@@ -9,7 +9,7 @@
 
 from mako import exceptions  # type: ignore
 from mako.template import Template  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from .xbar import Xbar
 
@@ -25,7 +25,7 @@ def generate_tb(xbar: Xbar,
     ]
 
     for fname in tb_files:
-        tpl = Template(filename=resource_filename('tlgen', fname + '.tpl'))
+        tpl = Template(filename=str(importlib_resources.files('tlgen') / (fname + '.tpl')))
 
         # some files need to be renamed
         if fname == "xbar.sim.core":
diff --git a/util/topgen.py b/util/topgen.py
index df4534447c2c3..51c52eb4ed2cb 100755
--- a/util/topgen.py
+++ b/util/topgen.py
@@ -19,7 +19,6 @@
 import hjson
 import tlgen
 import version_file
-from design.lib.common import expand_seed
 from ipgen import (IpBlockRenderer, IpConfig, IpDescriptionOnlyRenderer,
                    IpTemplate, TemplateRenderError)
 from mako import exceptions
@@ -1081,7 +1080,8 @@ def main():
     elif "rnd_cnst_seed" not in topcfg:
         log.error('Seed "rnd_cnst_seed" not found in configuration HJSON.')
         exit(1)
-    secure_prng.reseed(expand_seed(topcfg["rnd_cnst_seed"]))
+
+    secure_prng.reseed(topcfg["rnd_cnst_seed"])
 
     # TODO, long term, the levels of dependency should be automatically
     # determined instead of hardcoded.  The following are a few examples:
diff --git a/util/topgen/BUILD b/util/topgen/BUILD
index 815f9f30a6d6d..eaf54ffc169e5 100644
--- a/util/topgen/BUILD
+++ b/util/topgen/BUILD
@@ -42,6 +42,7 @@ py_library(
         "//util/reggen:params",
         "//util/reggen:window",
         requirement("mako"),
+        requirement("importlib_resources"),
     ],
 )
 
diff --git a/util/topgen/gen_dv.py b/util/topgen/gen_dv.py
index e24b9dafe1872..75b5b9f37471a 100644
--- a/util/topgen/gen_dv.py
+++ b/util/topgen/gen_dv.py
@@ -7,7 +7,7 @@
 
 from mako import exceptions  # type: ignore
 from mako.lookup import TemplateLookup  # type: ignore
-from pkg_resources import resource_filename
+import importlib_resources
 
 from reggen.gen_dv import gen_core_file
 
@@ -24,8 +24,8 @@ def gen_dv(top: Top,
            outdir: str) -> int:
     '''Generate DV RAL model for a Top'''
     # Read template
-    lookup = TemplateLookup(directories=[resource_filename('topgen', '.'),
-                                         resource_filename('reggen', '.')])
+    lookup = TemplateLookup(directories=[str(importlib_resources.files('topgen')),
+                                         str(importlib_resources.files('reggen'))])
     uvm_reg_tpl = lookup.get_template('top_uvm_reg.sv.tpl')
 
     # Expand template
diff --git a/util/topgen/merge.py b/util/topgen/merge.py
index 4e749a6c44509..33c1011e73da0 100644
--- a/util/topgen/merge.py
+++ b/util/topgen/merge.py
@@ -406,7 +406,7 @@ def amend_xbar(top: Dict[str, object],
     - size: from top["module"]
     """
     xbar_list = [x["name"] for x in top["xbar"]]
-    if not xbar["name"] in xbar_list:
+    if xbar["name"] not in xbar_list:
         log.info(
             "Xbar %s doesn't belong to the top %s. Check if the xbar doesn't need"
             % (xbar["name"], top["name"]))
@@ -496,7 +496,7 @@ def xbar_cross_node(node_name, device_xbar, xbars, visited=[]):
     devices = host_xbar["connections"][device_xbar["name"]]
 
     for node in host_xbar["nodes"]:
-        if not node["name"] in devices:
+        if node["name"] not in devices:
             continue
         if "xbar" in node and node["xbar"] is True:
             if "addr_range" not in node:
diff --git a/util/topgen/secure_prng.py b/util/topgen/secure_prng.py
index f036b5fcc9a31..ce025f1d34f46 100644
--- a/util/topgen/secure_prng.py
+++ b/util/topgen/secure_prng.py
@@ -173,23 +173,25 @@ def reseed(self, seed):
         from previous instantiation.
         """
         if seed == 0:
-            entropy_input = seed.to_bytes(32, 'big')
             log.error("ERROR: PRNG seeded with 0.")
             sys.exit(1)
-        # Check if the provided seed is at least 32 bytes long.
-        elif sys.getsizeof(seed) < sys.getsizeof(1 << 255):
-            # Error out if seed is shorter than 256 bits.
-            log.error("ERROR: Seed shorter than 256 bits.")
-            sys.exit(1)
+
+        if seed.bit_length() < 250:
+            # Warn, but don't fail, because the DV logic always passes in 32-bit
+            # seeds and this can naturally happen about 1% of the time.
+            log.warn('PRNG seed is only {seed.bit_length()} bits long, which is '
+                     'unlikely for a sample from a 256-bit distribution. Please '
+                     'double-check the logic.')
         # Check if the seed is longer than 256 bits. Trim the excess bits and
         # issue a warning if it is.
-        elif seed > (1 << 256):
+        if seed.bit_length() > 256:
             new_seed = seed % (1 << 256)
             log.warning("Seed longer than 256 bits. CTR_DRBG seeded with: " +
                         hex(new_seed))
             entropy_input = new_seed.to_bytes(32, 'big')
         else:
             entropy_input = seed.to_bytes(32, 'big')
+
         self.CTR_DRBG_Instantiate(entropy_input)
         self.returned_bits = []
 
diff --git a/util/topgen/templates/BUILD.tpl b/util/topgen/templates/BUILD.tpl
index ded1c608063f2..d304239cd012d 100644
--- a/util/topgen/templates/BUILD.tpl
+++ b/util/topgen/templates/BUILD.tpl
@@ -40,7 +40,12 @@ package(default_visibility = ["//visibility:public"])
         ),
         verilator = verilator_params(
             timeout = "eternal",
-            tags = ["flaky"],
+            tags = [
+                "flaky",
+                "manual",
+            ],
+            # This test can take > 60 minutes, so mark it manual as it
+            # shouldn't run in CI/nightlies.
             # often times out in 3600s on 4 cores
         ),
         deps = [
@@ -73,15 +78,12 @@ test_suite(
 opentitan_test(
     name = "alert_test",
     srcs = ["alert_test.c"],
-    # TODO(#22871): Remove "broken" tag once the tests are fixed.
-    broken = fpga_params(tags = ["broken"]),
     exec_env = dicts.add(
         EARLGREY_TEST_ENVS,
         EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:fpga_cw310_test_rom": None,
             "//hw/top_earlgrey:fpga_cw310_sival": None,
-            "//hw/top_earlgrey:fpga_cw310_sival_rom_ext": "broken",
             "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl
index 152537a468dcc..9d29c75ef0c11 100644
--- a/util/topgen/templates/chiplevel.sv.tpl
+++ b/util/topgen/templates/chiplevel.sv.tpl
@@ -1165,6 +1165,7 @@ module chip_${top["name"]}_${target["name"]} #(
     .SecAesAllowForcingMasks(1'b1),
     .SecAesSkipPRNGReseeding(1'b1),
     .UsbdevStub(1'b1),
+    .RvCoreIbexSecureIbex(0),
 % else:
     .SecAesMasking(1'b0),
     .SecAesSBoxImpl(aes_pkg::SBoxImplLut),
@@ -1185,16 +1186,17 @@ module chip_${top["name"]}_${target["name"]} #(
     .KmacEnMasking(1),
     .KmacSwKeyMasked(1),
     .KeymgrKmacEnMasking(1),
+    .RvCoreIbexSecureIbex(1),
 % elif target["name"] == "cw310":
     .KmacEnMasking(0),
     .KmacSwKeyMasked(1),
     .KeymgrKmacEnMasking(0),
     .SecKmacCmdDelay(0),
     .SecKmacIdleAcceptSwMsg(1'b0),
+    .RvCoreIbexSecureIbex(0),
 % endif
     .RomCtrlBootRomInitFile(BootRomInitFile),
     .RvCoreIbexRegFile(ibex_pkg::RegFileFPGA),
-    .RvCoreIbexSecureIbex(0),
     .SramCtrlMainInstrExec(1),
     .PinmuxAonTargetCfg(PinmuxTargetCfg)
   ) top_${top["name"]} (
diff --git a/util/uvmdvgen/gen_agent.py b/util/uvmdvgen/gen_agent.py
index ee81ae1453e3d..fa4f6836cb577 100644
--- a/util/uvmdvgen/gen_agent.py
+++ b/util/uvmdvgen/gen_agent.py
@@ -8,7 +8,7 @@
 
 from mako import exceptions
 from mako.template import Template
-from pkg_resources import resource_filename
+import importlib_resources
 
 
 def gen_agent(name, has_separate_host_device_driver, root_dir, vendor):
@@ -50,7 +50,7 @@ def gen_agent(name, has_separate_host_device_driver, root_dir, vendor):
         fname = src_prefix + src + src_suffix
 
         # read template
-        tpl = Template(filename=resource_filename('uvmdvgen', ftpl))
+        tpl = Template(filename=str(importlib_resources.files('uvmdvgen') / ftpl))
 
         if not os.path.exists(path_dir): os.system("mkdir -p " + path_dir)
         with open(path_dir + "/" + fname, 'w') as fout:
diff --git a/util/uvmdvgen/gen_env.py b/util/uvmdvgen/gen_env.py
index 61c08b03fa024..622ad89fa0f40 100644
--- a/util/uvmdvgen/gen_env.py
+++ b/util/uvmdvgen/gen_env.py
@@ -8,7 +8,7 @@
 import logging as log
 
 from mako.template import Template
-from pkg_resources import resource_filename
+import importlib_resources
 from uvmdvgen import VENDOR_DEFAULT
 
 
@@ -69,7 +69,7 @@ def gen_env(name, is_cip, has_ral, has_interrupts, has_alerts, num_edn,
             continue
 
         # read template
-        tpl = Template(filename=resource_filename('uvmdvgen', ftpl))
+        tpl = Template(filename=str(importlib_resources.files('uvmdvgen') / ftpl))
 
         # create rendered file
         with open(file_path, 'w') as fout:
diff --git a/util/validate_testplans.py b/util/validate_testplans.py
new file mode 100755
index 0000000000000..c81328961201c
--- /dev/null
+++ b/util/validate_testplans.py
@@ -0,0 +1,79 @@
+#!/usr/bin/env python3
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+
+"""
+This script validates the various opentitan testplan.hjson files.
+Usage:
+    ./util/validate_testplans.py --schema hw/lint/sival_testplan_schema.hjson \
+                                 --dir hw/top_earlgrey/data/
+    ./util/validate_testplans.py --schema hw/lint/sival_testplan_schema.hjson \
+                                 --dir hw/top_earlgrey/data/ip/
+"""
+
+import argparse
+import glob
+import logging
+import sys
+import pathlib
+import hjson
+import jsonschema
+
+
+def main(args: argparse.Namespace) -> int:
+    files = [f for f in glob.glob(f"{args.dir}/*.hjson")]
+
+    assert args.schema
+    return SchemaValidator(args.schema).check(files)
+
+
+class SchemaValidator:
+    def __init__(self, schema_file: str):
+        self.schema = hjson.load(open(schema_file, "r", encoding="utf-8"))
+
+    def check(self, files: str) -> int:
+        res: int = 0
+        for f in files:
+            try:
+                testplan = hjson.load(open(f, "r", encoding="utf-8"))
+                jsonschema.validate(testplan, schema=self.schema)
+
+            except jsonschema.ValidationError as e:
+                logging.info("Validation failed on file %s: %s", f, e)
+                res = -1
+            except hjson.scanner.HjsonDecodeError as e:
+                logging.info("Failed to decode file %s: %s", f, e)
+                res = -1
+                break
+
+        if res == 0:
+            logging.info("No errors found!")
+        else:
+            logging.info("Errors found - run validation locally with %s", " ".join(sys.argv))
+        return res
+
+
+if __name__ == "__main__":
+    parser = argparse.ArgumentParser()
+    parser.add_argument(
+        "--logging",
+        default="info",
+        choices=["debug", "info", "warning", "error", "critical"],
+        help="Logging level",
+    )
+    parser.add_argument(
+        "--dir",
+        required=True,
+        help="A directory containing testplan.hjson files.",
+    )
+    parser.add_argument(
+        "--schema",
+        required=True,
+        type=pathlib.Path,
+        help="A hjson file with the validation rules to be used.",
+    )
+
+    args = parser.parse_args()
+    logging.basicConfig(level=args.logging.upper())
+    sys.exit(main(args))
diff --git a/util/version_file.py b/util/version_file.py
index 6a6be91979e80..94a2327f53e1d 100644
--- a/util/version_file.py
+++ b/util/version_file.py
@@ -33,3 +33,6 @@ def scm_revision(self, default: Union[str, None] = None) -> Union[str, None]:
 
     def scm_status(self, default: Union[str, None] = None) -> Union[str, None]:
         return self.version_stamp.get('BUILD_SCM_STATUS', default)
+
+    def cryptolib_scm_revision(self, default: Union[str, None] = None) -> Union[str, None]:
+        return self.version_stamp.get('BUILD_CRYPTOLIB_SCM_REVISION', default)